iLLD_TC38A: IFX Low Level Drivers

iLLD User Documentation
Device:TC38A Version: 1.0.1.12.0
 IFX Logo
IFX Low Level Drivers

Introduction

The aim of the IFX Low Level Driver library (iLLD) is to provide access and configuration functions for the integrated peripherals of Infineon microcontrollers - from a simple timer register access up to 3 phases PWM driver for inverter applications. Together with SFR header files they are a fundamental part of the infrastructure for tests and applications which are developed by several teams at IFX ATV.

All drivers follow the same coding style to ensure a common "Look&Feel". The application interfaces (APIs) are defined and implemented by Hardware/Software experts, already tested pre-silicon with a virtual prototype or in RTL simulations, and then shared by all teams which are involved in programming software:

iLLD Usage at Infineon

This cross usage model should not only help to reduce development efforts, but also improve the quality/reliability of the drivers.

The strict iLLD coding guidelines allow layering of drivers for multi-dimensional system scenarios. There is no dependency between the peripheral drivers. Optionally they can be isolated from the library and provided as a separate package (e.g. for application notes delivered to customers).

iLLDs are currently planned for Aurix and Aurix 2G derivatives.

Each derivative has its own set of iLLD sources, which are located in GIT. Versionized packages are also distributed via MyICP.

Table Of Contents

  • General Structure of iLLDs
  • iLLD APIs
  • Naming Conventions
  • Coding rules
  • Doxygen rules
  • Files and Configuration
  • Package versioning
  • Do's and don't

[Next page]

iLLD User Manual
Release
Copyright © Infineon Technologies AG 2020
www.infineon.com
Version 1.0.1.12.0
2020


iLLD_TC38A: General Structure of iLLDs

General Structure of iLLDs

We can basically differ between two types of iLLDs:

Unifunctional Peripheral Drivers

Unifunctional peripheral drivers are simple modules where the target peripheral is able to carry out one type of functionality.

Example: VADC peripheral for analog-to-digital conversion. Multican for CAN protocol communication, DMA for DMA functionality, etc.

Unifunctional Peripheral Driver

Multifunctional Peripheral Drivers

These kind of peripheral drivers are complex to handle, and here the target peripheral can carry out multiple functionalities ("use cases").

Example: AscLin peripheral can be configured as a common UART, but also as a LIN or even a SPI.
GTM TOM/ATOM can be used as PWM generator, complex waveform generator and any generic timer, etc.

Multifunctional Peripheral Driver

Content of Peripheral Drivers

iLLDs consist of following components:

  • Peripheral Register Memory Map (SFR header file)
  • a Standard Layer with (verbose) access functions to SFRs which are changed during application runtime
  • an Interface Layer with configuration and handling functions
    Multiple Interface Layers could be available if the peripheral is used for different purposes.
  • Pinmaps to configure I/O multiplexers

Configuration Data Structures

A configuration structure, which is part of an interface layer, holds the parameters to configure the driver. Depending on the iLLD and its associated peripheral there could be multiple levels of configuration data structures. As in case of VADC there could be data structure to configure the VADC module, a structure for the configuring the group and another for the channels.

The data structure shall be defined in a memory optimised way considering the structures are non-packed in the memory map. All the structure elements shall be organised in a way that they are ordered in the descending order of their physical memory size.

Usage: In normal cases configuration data structures are locally stored (on the stack) inside specific initialization routines. They can also be placed in the flash/ROM

Example for a configuration struct:

typedef struct
{
const IfxVadc_Adc *module; /**< \brief Specifies pointer to the IfxVadc_Adc module handle */
IfxVadc_GroupId groupId; /**< \brief Specifies the group/kernel id */
IfxVadc_GroupId master; /**< \brief Specifies the master group if own group is different master slave is configured */
IfxVadc_Adc_ArbiterConfig arbiter; /**< \brief Specifies arbiter configuration */
IfxVadc_Adc_ClassConfig inputClass[IFXVADC_NUMBER_OF_INPUTCLASS]; /**< \brief Specifies conversion settings one and two */
IfxVadc_Adc_ScanConfig scanRequest; /**< \brief Specifies scan mode configuration */
IfxVadc_Adc_QueueConfig queueRequest; /**< \brief Specifies queued mode configuration */
IfxVadc_Adc_ScanConfig backgroundScanReq; /**< \brief Specifies back ground scan configuration */
boolean disablePostCalibration; /**< \brief Specifies if calibration after conversion (post calibration) should be disabled */
} IfxVadc_Adc_GroupConfig;

Runtime Variables (Handles)

Runtime variables are usually stored in so called "handles". This structure is separated from the configuration structure mentioned above (because such structures are only needed during initialization phase).

Handles are used to reference resources of a peripheral by interface functions without unnecessary calculation or parameter passing overhead. A handle struct contains at least a pointer to the base address of the peripheral which should be accessed, pointers to peripheral subcomponents where required, and/or indices (such as a channel or timer number).

Handles are to be instantiated per instance of the used peripheral. Higher SW layers store knows number of instances required for the intended application and it reserves the memory for these many data structures.

The data structure must be made to be available in the DMI RAM of the Cpu from which lld API calls are more frequently done.

Example for an handle:

typedef struct
{
IfxVadc_Adc module; /**< \brief The VADC handle structure */
Ifx_VADC_G *group; /**< \brief Pointer to the group registers */
IfxVadc_GroupId groupId; /**< \brief Specifies the group index */
} IfxVadc_Adc_Group;

[Previous page] [Next page]

iLLD User Manual


iLLD_TC38A: iLLD APIs

iLLD APIs

This section provides the generic overview of APIs required for a iLLD

iLLD Init APIs

iLLDs which need the user configuration data, shall declare the data type for configuration. These data structures are instantiated by the higher level software. Following are the requirements for the driver.

Initialization of configuration data structure

Any driver which uses the configuration data structure shall provide an interface to initialize these data structure elements to their default values. Main used case of such implementation is, when a driver is upgraded with an additional configuration parameter, such initialization would provide correct value to the variable so that the driver works correctly when used with legacy application software which used the previous version of the driver. The API shall be made as one instance in the flash but shall be able to function on any number of identical peripherals.

Data structure shall be instantiated per HW instance for which the driver is targeted

The generic prototype shall be as
<Driver Prefix>_initConfig(<Driver Prefix>_Config *cfg);
where Driver Prefix example is IfxVadc or IfxGtmTom_Pwm.

Driver Initialization

The iLLD shall provide an API to initialize the driver peripheral based on the user configuration. Configuration data shall be previously initialized to default values with init config interface. The API shall be made as one instance in the flash but shall be able to function on any number of identical peripherals.

The driver initialization API shall initialize the peripheral registers to make the peripheral to work as drivers functionality. This API shall also initialize the driver internal data structure to their required init values.

The generic prototype shall be as
<Driver Prefix>_init(<Driver Prefix>_Handle *handle, <Driver Prefix>_Config *cfg);
where Driver Prefix example is IfxVadc or IfxGtmTom_Pwm.

Driver De-Initialization

iLLD may provide an API to reset the driver to default reset state and to make to consume least power. The API shall be made as one instance in the flash but shall be able to function on any number of identical peripherals. The generic prototype shall be as
<Driver Prefix>_deInit(<Driver Prefix>_Handle *handle);
where Driver Prefix example is IfxVadc or IfxGtmTom_Pwm.

iLLD functional APIs

iLLD shall provide API for each of the needed functionality the user may use. The API shall be made as one instance in the flash but shall be able to function on any number of identical peripherals. For each of the peripherals instances the parameter passed will be deferring.

The generic prototype shall be as
<Driver Prefix>_<functionality>(<Driver Prefix>_Handle *handle); where Driver Prefix example is IfxVadc or IfxGtmTom_Pwm.

iLLD internal methods

For better modularisation readability reasons the driver implementations shall use the internal static functions. In such cases the function definitions shall be defined in the similar way as iLLD functional APIs

[Previous page] [Next page]


iLLD_TC38A: Naming Conventions

Naming Conventions

This section provides the naming convention to be followed during development.

As general rule all the "exported" types/definitions/class/objects (i.e. Function, enum, typedef, constant, variable, ...) should start with the filename + underscore "_".

Example: in file IfxScuWdt.c/h the function shall be:

  • IfxScuWdt_enableEndinit()
  • IfxScuWdt_disableEndinit()

iLLD Files

Ifx<HW Module name>[<HW Sub module name>][_SW Driver if special][sub SW module name].c/h

Example:

  • 1) With HW module only without sub-module: IfxPort.c/.h
  • 2) With HW module and sub-module: IfxScuWdt.c/.h
  • 3) With HW module sub-module and SW driver: IfxGtmTom_Pwm.c/.h
  • 4) With HW module sub-module and SW driver + SW sub module: IfxGtmTom_PwmHl.c/.h (only if it makes sense to split the 10:files to make it modular)

Important things to check during review/ or with static code check tools:

  • 1) Prefix: Ifx (in title case)
  • 2) <module name>[<HW Sub module name>] (in camel case)
  • 3) [_SW Driver if special] (an underscore to separate and title case SW driver name)
  • 4) .c and .h in the small case

Data Types

typedef <standard type> Ifx<HW Module name>[<HW Sub module name>][SW Driver if special]<user type name>;

<Standard type> structure/union/enum definitions with its elements, and other C data types

Example:

typedef struct
{
uint32 pllFreqInHz;
uint32 stepFreqInHz;
uint8 stepPerIn_uSec;
uint8 pDivider;
uint8 nDivider;
uint8 k2Divider;
} IfxScu_Pll_Config;

Important things to check:

  • 1) Points 1 to 3 for filenames
  • 2) _<user type name >: an underscore to separate with the rest and Camel case letters (first letter also capital).

Structures

To define structure types the convention shall be followed as in type defines above.

For structure elements simple name with camel case letters with first letter small shall be used.

Refer to the example for naming convention for type defines

Enum

To define enum types the convention shall be followed as in type defines above.

For enum elements following naming convention to be followed:
Ifx<HW Module name>[<HW Sub module name>][SW Driver if special]<Enum Name>_<Enum element>

<Enum element> camel case letter <Enum Name> Camel case letter

Example:

typedef enum {
IfxDma_ChannelPriority_low = 0,
IfxDma_ChannelPriority_medium,
IfxDma_ChannelPriority_high
} IfxDma_ChannelPriority;

Important things to check:

  • 1) Points 1 to 3 for filenames
  • 2) _<Enum Element>: an underscore to separate with the rest and Camel case letters (first letter lower case).

#define Constants or Macros

#define IFX<MODULE>[<HW SUB MODULE NAME>][SW DRIVER]<FUNCTIONALITY NAME>

<FUNCTIONALITY NAME>: Meaningful name to represent the functionality. With "_" to separate words

Example:

#define IFXSCUCCU_PLL_FREE_RUNNING_FREQ (100000000U)

Important things to check:

  • 1) all capital letters

Functions

All exported functions: Ifx<HW Module name>[<HW Sub module name>][SW Driver if special]<Functionality>

Example:

IfxGtmTom_Pwm_setDutyCycle(..)

Important things to check:

  • 1) Points 1 to 3 for filenames
  • 2)_<Functionality>: an underscore to separate and Camel case letters with first letter small. (Convention used with object oriented programming). Functionality shall start with the main action (verb) to be fulfilled with the interface.

For example:

  • An interface to set pin level high, the function name is setPinHigh.
  • An interface to read the result of ADC conversion is readResult
  • An interface to send the data byte over communication peripheral sendByte

Function's parameter & struct members

Function parameter are not doing an action done but does set values for confiuguration, then there is no verb in the name.

Examples:

typedef struct
{
boolean hardwareRequestEnabled; // \brief Enabling the hardware channel request
} IfxDma_Dma_ChannelConfig;

Inline Functions

All inline functions as:
IFX_INLINE <function definition>

Shall follow the naming conventions as in Functions

Infineon definitions for Standard Data Types

Located in Cpu/Std/Platform_Types.h

[Previous page] [Next page]


iLLD_TC38A: Coding rules

Coding rules
  1. Code formating
  2. General rules
  3. Code checking
  4. APIs common to many module drivers

[Previous page] [Next page]


iLLD_TC38A: Code formating

Code formating

Auto-formating

Only use the code formating as defined by following script: $VERIF_LLD/bin/indent_rec

Ignore auto-formating

In case the source code shall not be formated by the formating tool the following command can be used:

// *INDENT-OFF* Note: this file was indented manually by the author.
... place here code that shall not be formated by the tool
// *INDENT-ON*

File structure

The source code in a file should be grouped using doxygen groups. Groups should be sorted in the file by alphabetical order of the group name. Inside a group, code shall be sorted by alphabetical order of the API names.

[Previous page] [Next page]


iLLD_TC38A: General rules

General rules

Always use curly braces for if, for, while, do, ...

Correct:
static void IfxDma_Dma_configureTransactionSet(Ifx_DMA_CH* channel, IfxDma_Dma_ChannelConfig* config)
{
...
if( config->shadowControl != 0)
{
channel->SHADR.U = config->shadowAddress;
}
}

Wrong:

static void IfxDma_Dma_configureTransactionSet(Ifx_DMA_CH* channel, IfxDma_Dma_ChannelConfig* config)
{
...
if( config->shadowControl != 0)
channel->SHADR.U = config->shadowAddress;
}

[Previous page] [Next page]


iLLD_TC38A: Code checking

Code checking

Parameter check

In case the parameter can not be checked by the compiler for valid values, it shall be checked using the assertion function.

Example:

IFX_INLINE void IfxDma_setChannelTransaction(Ifx_DMA* dma,IfxDma_ChannelId channelId, uint32 transferCount)
{
IFX_ASSERT(VERBOSE_LEVEL_ERROR,transferCount < 32);
}

[Previous page] [Next page]


iLLD_TC38A: APIs common to many module drivers

APIs common to many module drivers

<modue>_get<Interrupt>Src()

For each interrupt service request control register, an API that returns the register address shall be available. The API syntax is as follow: volatile Ifx_SRC_SRCR* <driverName>_get<Interrupt>Src(<ModuleType>*module);

Example: The transmit interrupt of the QSPI driver has the following API:

volatile Ifx_SRC_SRCR* IfxQspi_getTransmitSrc(Ifx_QSPI* module);

<modue>_getIndex()

The API Ifx<Module>_getIndex(Ifx_<MODULE>* module) shall be implemented in the file Ifx<Module>.c/h and use an array define in Ifx<Module>_cfg.c/h;

Example:

In file Ifxcpu.h

IFX_EXTERN IfxCpu_ResourceCpu IfxCpu_getIndex(Ifx_CPU* cpu);

In file Ifxcpu.c

// brief Return cpu index
//
// \param cpu Specifies cpu module
//
// \return Return cpu index.
//
IfxCpu_ResourceCpu IfxCpu_getIndex(Ifx_CPU* cpu)
{
IfxCpu_ResourceCpu result = IfxCpu_ResourceCpu_none, index;
for (index = 0; index < IFXCPU_COUNT; index++)
{
if (IfxCpu_cfg_indexMap[index].module == cpu)
{
result = IfxCpu_cfg_indexMap[index].index;
break;
}
}
return result;
}

In file Ifxcpu_cfg.h

// List of the available CPU resources
typedef enum
{
IfxCpu_ResourceCpu_0 = 0, // CPU 0
IfxCpu_ResourceCpu_1, // CPU 1
IfxCpu_ResourceCpu_2, // CPU 2
IfxCpu_ResourceCpu_none // None of the CPU
} IfxCpu_ResourceCpu;
IFX_EXTERN IfxCpu_ResourceCpu IfxCpu_getIndex(Ifx_CPU* cpu);

In file Ifxcpu_cfg.c

const IfxModule_IndexMap IfxCpu_cfg_indexMap[IFXCPU_COUNT] =
{
{&MODULE_CPU0, IfxCpu_ResourceCpu_0},
{&MODULE_CPU1, IfxCpu_ResourceCpu_1},
{&MODULE_CPU2, IfxCpu_ResourceCpu_2},
};

[Previous page] [Next page]


iLLD_TC38A: Doxygen rules

Doxygen rules

Microcontroller root group

The microcontroller documentation root group is IfxLld. The group is defined in the file info.dox located in the microcontroller derivative root directory.

Example:

\defgroup IfxLld TC27x B-Step Microcontroller

Modules group

Module's group names have the follwing syntax: '\defgroup IfxLld_<Module>'. The group is direct child of the Microcontroller root group.

v <Module> is the module short name in with the 1st letter upper case and then lower case. The group name is defined in the Ifx<Module>_regdef.h file. Example:

\defgroup IfxLld_Dma DMA
\ingroup IfxLld

The following groups are also defined in the Ifx<Module>_regdef.h file for each modules:

  • IfxLld_<Module>_Bitfields : Bitfield macro definition
  • IfxLld_<Module>_Union : module union types
  • IfxLld_<Module>_Struct : module struct types

Module standard driver group

Module's standard driver group have the follwing syntax: '\defgroup IfxLld_<Module>_Std'. The group is direct child of the Modules group.

Example:

\defgroup IfxLld_Asclin_Std Basic functionality
\ingroup IfxLld_Asclin

Module interface driver group

Module's interface driver group have the follwing syntax: '\defgroup IfxLld_<Module>_<Interface>'. The group is direct child of the Modules group.

<Interface> is the interface driver name.

Example:

\defgroup IfxLld_Asclin_AscIf ASC interface driver
Implements the standard ASC interface
\ingroup IfxLld_Asclin

General rules

  • As group name are global names, a group name shall start with the parent group name.
  • Group names are 1st letter upper case, then camel case, group levels are separated by underscore

Example:

  • |–IfxLld
  • | |–IfxLld_Dma
  • | | |–IfxLld_Dma_Std
  • | | |–IfxLld_Dma_Std_ChannelTransaction
  • | | |–IfxLld_Dma_Dma

Documentation of return values

The return value shall be documented using \return when docuementation is provided for a single case.

The return value shall be documented using \retval when docuementation is provided for a multiple case.

Example (single case):

\return Return the raw converted analog value.

Output:

Returns
Return the raw converted analog value.

Example (multiple case):

\retval TRUE in case of success
\retval FALSE in case of error

Output:

Return values
TRUE | in case of success
FALSE | in case of error

parameterDocumentation

Documentation shall provide range for parameters when not entirely defined.

Example:

// \param transferCount Number of transaction, Range=[0,32]
IFX_INLINE void IfxDma_setChannelTransaction(Ifx_DMA* dma,IfxDma_ChannelId channelId, uint32 transferCount)
{ ... }

[Previous page] [Next page]


iLLD_TC38A: Files and Configuration

Files and Configuration

Folder structure

Starting from Src/BaseSw/: iLLD contains the iLLD files for all derivatives

  1. Inside Src/BaseSw/iLLD/<DUT>/Tricore:
  2. _Build contains the set of files to be included to build the specific driver. Mostly used by internal tools
  3. _Impl contains derivative specific configuration which could also be adapted by the user
  4. _PinMap contains I/O configurations in pin tables
  5. _Lib contains derivative dependent library functions
  6. <module> contains the actual peripheral driver

Infra contains the header files for all derivatives, compiler specific files and application start-up software files for Aurix2G derivatives

  1. Inside Src/BaseSw/Infra/Platform/Tricore/Compilers contains the compiler specific files
  2. Inside Src/BaseSw/Infra/Sfr/<DUT> contains the header files
  3. Inside Src/BaseSw/Infra/Ssw/<DUT>/Tricore contains the application start-up software files

Service contains derivative independent service software sources

VERIF_DUT stands for the derivative which should be selected

Ifx_Cfg.h

Please create a configuration file with the name "Ifx_Cfg.h" in your application to configure the iLLD library components.

Currently it only requires to select the external oscillator frequency (XTAL) and the desired system frequency.

In addition, this file allows you to specify how assertions should be print out.

Minimal Ifx_Cfg.h file:

#ifndef IFX_CFG_H
#define IFX_CFG_H
// XTAL/PLL frequency
#define IFX_CFG_SCU_XTAL_FREQUENCY (20000000)
#define IFX_CFG_SCU_PLL_FREQUENCY (200000000)
// Assertions
#define IFX_ASSERT(level, expr)
#endif /* IFX_CFG_H */

The configuration macros mentioned below can be overridden in Ifx_Cfg.h:

  • IFX_CFG_DISABLE_DEFAULT_INTRINSICS - IFX_CFG_DISABLE_DEFAULT_INTRINSICS shall be defined in Ifx_Cfg.h to disable the default intrinsics provided For Ex. NOP,CRC
  • IFX_CFG_USE_COMPILER_DEFAULT_LINKER - IFX_CFG_USE_COMPILER_DEFAULT_LINKER shall be defined in Ifx_Cfg.h to use the default compiler provided linker varaibles and startup
  • IFX_USE_SW_MANAGED_INT - IFX_USE_SW_MANAGED_INT shall be defined in Ifx_Cfg.h to use the software based interrupts SCU related Macros:
  • IFX_CFG_SCU_XTAL_FREQUENCY - IFX_CFG_SCU_XTAL_FREQUENCY shall be defined to respective XTAL frequency in Ifx_Cfg.h
  • IFX_CFG_SCU_PLL_FREQUENCY - IFX_CFG_SCU_PLL_FREQUENCY shall be defined to desired PLL frequency in Ifx_Cfg.h
  • IFX_CFG_SCU_PLL1_FREQUENCY - IFX_CFG_SCU_PLL1_FREQUENCY shall be defined to desired PLL1 frequency in Ifx_Cfg.h
  • IFX_CFG_SCU_PLL2_FREQUENCY - IFX_CFG_SCU_PLL2_FREQUENCY shall be defined to desired PLL2 frequency in Ifx_Cfg.h
  • Applicable for only Aurix2G devices:
  • Application Start-up related Macros:
  • IFX_CFG_SSW_ENABLE_TRICOREx (x=0-5) - IFX_CFG_SSW_ENABLE_TRICOREx shall be defined to 0 in Ifx_Cfg.h to disable the CPUx.
  • IFX_CFG_SSW_ENABLE_TRICOREx_PCACHE (x=0-5) - IFX_CFG_SSW_ENABLE_TRICOREx_PCACHE shall be defined to 0 in Ifx_Cfg.h to disable the PCACHE of CPUx
  • IFX_CFG_SSW_ENABLE_TRICOREx_DCACHE (x=0-5) - IFX_CFG_SSW_ENABLE_TRICOREx_DCACHE shall be defined to 0 in Ifx_Cfg.h to disable the DCACHE of CPUx

Example for Assertion output via printf:

#ifdef __cplusplus
extern "C" {
#endif
// defined in main.c
extern const char* verboseLevelStr[6];
#define IFX_ASSERT(level, expr) (((expr) || (level > IFX_VERBOSE_LEVEL_ERROR)) ? ((void)0) : (void)printf("[ASSERT:%s] '%s' in %s:%d (function '%s')\n", verboseLevelStr[level], #expr, __FILE__, __LINE__, __func__))
#endif

And in your main.c file (or somewhere else):

//! this global array is used by IFX_ASSERT of iLLDs
const char* verboseLevelStr[6] = {
"OFF",
"FAILURE",
"ERROR",
"WARNING",
"INFO",
"DEBUG"
};

Minimal Set of Driver sources

If you prefer to use (resp. compile) only a minimal set of drivers for your application, please add at least following "infrastructural resources":

  • Src/BaseSw/Infra/Sfr/<DUT>/_Reg directory
  • Src/BaseSw/iLLD/<DUT>/Tricore/_Lib directory
  • Src/BaseSw/Service directory
  • CPU driver: Src/BaseSw/iLLD/<DUT>/Tricore/Cpu and Src/BaseSw/iLLD/<DUT>/Tricore/_Impl/IfxCpu_cfg.*
  • DMA driver: Src/BaseSw/iLLD/<DUT>/Tricore/Dma and Src/BaseSw/iLLD/<DUT>/Tricore/_Impl/IfxDma_cfg.*
  • Port driver: Src/BaseSw/iLLD/<DUT>/Tricore/Port, Src/BaseSw/iLLD/<DUT>/Tricore/_Impl/IfxPort_cfg.* and src/ifx/$(VERIF_DUT)/_PinMap/IfxPort_PinMap.*
  • SCU driver: Src/BaseSw/iLLD/<DUT>/Tricore/Scu and Src/BaseSw/iLLD/<DUT>/Tricore/_Impl/IfxScu_cfg.*
  • Src driver: Src/BaseSw/iLLD/<DUT>/Tricore/Src and Src/BaseSw/iLLD/<DUT>/Tricore/_Impl/IfxSrc_cfg.*
  • Stm driver: Src/BaseSw/iLLD/<DUT>/Tricore/Stm and Src/BaseSw/iLLD/<DUT>/Tricore/_Impl/IfxStm_cfg.*

Whenever additional drivers should be added, you typically have to copy following files/directories:

  • Src/BaseSw/iLLD/<DUT>/Tricore/<driver>
  • Src/BaseSw/iLLD/<DUT>/Tricore/_Impl/<driver>_cfg.*
  • Src/BaseSw/iLLD/<DUT>/Tricore/_PinMap/<driver>_cfg.*
  • For more information you can refer the BIFACES User Manual.

[Previous page] [Next page]


iLLD_TC38A: Package versioning

Package versioning

Package version number

Each released package is assigned a unique identifier that consists of four numbers that represent the major and the minor version numbers separated by underscores '_'.

For example: version 1_0_0_0_0

With each new release:

  • either the minor version is incremented
  • or the major version number is incremented and the minor and "major update" version number reset

the increment step for the minor and major number is >= 1.

Note
The package version number is independent from the clearcase file version numbers

The version number is available in the IfxLldVersion.h header file, so that it can be referenced (and compared) by application software. The content:

#define IFX_LLD_VERSION_GENERATION 1 /**< \brief Indicates the driver generation */
#define IFX_LLD_VERSION_MAJOR 0 /**< \brief Informs about changes which could lead to incompatibilities */
#define IFX_LLD_VERSION_MAJOR_UPDATE 0 /**< \brief Informs about a release for a new derivative without further API changes */
#define IFX_LLD_VERSION_MINOR 0 /**< \brief Informs about new additions to the library */
#define IFX_LLD_VERSION_REVISION 0 /**< \brief Informs about patches and/or documentation changes */

Change significance

Change in the major version number

Change in the major version number indicates that the version may not be fully compatible with other major version numbers. The reason for the incompatibility could be:

  • changes in the API names, parameters...

Change in the "major update" version number

This part of the version number indicates that the library has been released for a new derivative without further API changes.

Change in the minor version number

Change in the minor version number indicates that the version is backward compatible with smaller minor version number with identical major version number. The difference between minor version number are:

  • new feature introduced
  • bug fix
  • update of documentation

[Previous page] [Next page]


iLLD_TC38A: Do's and don't

Do's and don't
  1. Naming convention
  2. Coding rules
  3. Documentation
  4. Optimisation
  5. Usage of enums

[Previous page] [Next page]


iLLD_TC38A: Naming convention

Naming convention

Enum

[link: Enum]

   Enumeration items must be prefixed with the enumeration type.

   Correct:
typedef enum
{
IfxDma_ChannelPriority_low = 0,
IfxDma_ChannelPriority_medium,
IfxDma_ChannelPriority_high
} IfxDma_ChannelPriority;

Wrong (IfxDma_ChannelPrioritySelect):

typedef enum
{
IfxDma_ChannelPriority_low = 0,
IfxDma_ChannelPriority_medium,
IfxDma_ChannelPriority_high
} IfxDma_ChannelPrioritySelect;

Directory name

[link: Directory name]

   Dirtectory shall have the same name as the driver name without the Ifx prefix.

       Correct:
       - Dma
           - Dma
               - IfxDma.c
               - IfxDma.h

       Wrong:
       - Dma
           - <SPAN style="color:red">Interface</SPAN>
               - IfxDma.c
               - IfxDma.h

Function's parameter & struct members

[link: Function's parameter & struct members]

Function parameter are not doing an action done but does set values for confiuguration, then there is no verb in the name.

Correct:

typedef struct
{
boolean hardwareRequestEnabled; // \brief Enabling the hardware channel request
} IfxDma_Dma_ChannelConfig;

Wrong(enableHardwareRequest):

typedef struct
{
boolean enableHardwareRequest; // \brief Enabling the hardware channel request
} IfxDma_Dma_ChannelConfig;

Static function names shall also be prefixed

[link: Static function names shall also be prefixed]

Correct:
static void IfxDma_Dma_configureTransactionSet(Ifx_DMA_CH* channel, IfxDma_Dma_ChannelConfig* config)

Wrong:

static void configureTransactionSet(Ifx_DMA_CH* channel, IfxDma_Dma_ChannelConfig* config)

Do not explicitely use 'handle' in the parameter name

[link: Do not explicitely use 'handle' in the parameter name]

Remove the name ‘handle’ from the parameter’s name, even we hnow that it is an handle. It does not add information but increase the source code length.

Correct:

IFX_EXTERN void IfxDma_Dma_initChannelConfig(IfxDma_Dma_ChannelConfig* config, IfxDma_Dma* dma);

Wrong(dmaHandle):

IFX_EXTERN void IfxDma_Dma_initChannelConfig(IfxDma_Dma_ChannelConfig* config, IfxDma_Dma* dmaHandle);

[Previous page] [Next page]


iLLD_TC38A: Coding rules

Coding rules

Type assumption

[link: Type assumption]

Bitfield values should not be assumed as Boolean.

Correct:

IFX_INLINE boolean IfxDma_getChannelPatternDetectionOldValue(Ifx_DMA* dma,IfxDma_ChannelId channelId)
{
return dma->CH[channelId].CHCSR.B.LXO != 0;
}

Wrong:

IFX_INLINE boolean IfxDma_getChannelPatternDetectionOldValue(Ifx_DMA* dma,IfxDma_ChannelId channelId)
{
return dma->CH[channelId].CHCSR.B.LXO;
}

Variable names

[link: Variable names]

   Use explicit names for variable.
   Example:
   With
Ifx_DMA* dma;
dma->source = 0x123;

the code can be easier understand than with

Ifx_DMA* baseAddr;
baseAddr->source = 0x123;

Avoid numbers, use constant instead

[link: Avoid numbers, use constant instead]

Correct:
#define IFXDMA_DMA_ENABLE_SHADOW_ADDRESS (2) // Position of the shadow address enable bit
static void IfxDma_Dma_configureTransactionSet(Ifx_DMA_CH* channel, IfxDma_Dma_ChannelConfig* config)
{
...
if( config->shadowControl & (1 << IFXDMA_DMA_ENABLE_SHADOW_ADDRESS) )
{
channel->SHADR.U = config->shadowAddress;
}
}

Wrong:

static void IfxDma_Dma_configureTransactionSet(Ifx_DMA_CH* channel, IfxDma_Dma_ChannelConfig* config)
{
...
if( config->shadowControl & (1 << 2) )
{
channel->SHADR.U = config->shadowAddress;
}
}

. Example(1 << 2) below

[Previous page] [Next page]


iLLD_TC38A: Documentation

Documentation

Avoid 'the same' in documentation

[link: Avoid 'the same' in documentation]

Correct:

boolean channelInterrupt; // \brief Determines the setting of the channel transfer interrupt flag and interrupt service request

Wrong(for the same):

boolean channelInterrupt; // \brief Determines the setting of the channel transfer interrupt flag and interrupt service request for the same

[Previous page] [Next page]


iLLD_TC38A: Optimisation

Optimisation

Module register access (array)

[link: Module register access (array)]

   Code should be optimised by using array index instead of if..else.

   Correct:
dma->BLK[index]. ...

Wrong:

if( moveEngine == IfxDma_MoveEngine_1 )
{
dma->BLK1. ...
}
else
{
dma->BLK0. ...
}

In case the array is not available in the module structure definition, please request for implementation. The reasons could be:

  • it has been forgotten to build the array during the register header file generation
  • the module address map does not currently supports the array access

Module register access (read modify write)

[link: Module register access (read modify write)]

   Runtime optimisation should be done by utilizing a local variable when more than one bitfield of a register is to be modified.

   Correct:
IFX_INLINE void IfxDma_setChannelSourceIncrementStep(Ifx_DMA* dma,IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size)
{
Ifx_DMA_BLK_ME_ADICR adicr;
adicr.U = dma->CH[channelId].ADICR.U;
adicr.B.SMF = incStep;
adicr.B.INCS = direction;
adicr.B.CBLS = size;
dma->CH[channelId].ADICR.U = adicr.U;
}

Wrong:

IFX_INLINE void IfxDma_setChannelSourceIncrementStep(Ifx_DMA* dma,IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size)
{
dma->CH[channelId].ADICR.B.SMF = incStep;
dma->CH[channelId].ADICR.B.INCS = direction;
dma->CH[channelId].ADICR.B.CBLS = size;
}

[Previous page] [Next page]


iLLD_TC38A: Usage of enums

Usage of enums

enum convention in microcontroller /Std drivers

[link: enum convention in microcontroller /Std drivers]

    In case an enum represents a register bitfield value, then the following rules apply:
    - The enum type shall have an explicit name. The name shall not include register or bitfield short names. This is to abstract the setting when passed as a parameter to a function in the same way the function APIs names does.
    - Each enum member shall define explicitly an enum value with '='.
    - The enum documentation shall state for which register bitfield the enum has been defined with "Definition for <ModuleType>.<REGISTER NAME>.B.<BITFIELDNAME>", this to avoid misuse of the enum.
    - Each of the member shall have a documentation, that explain to users what is the enum for without reading the user manual.
    - Only enum defined in the current Std or base drivers shall be used.

    Correct:
// File Std/IfxQspi.h
// QSPI controller mode
// Definition for Ifx_QSPI.GLOBALCON.B.MS
typedef enum
{
IfxQspi_Mode_master = 0, // QSPI in "master" mode
IfxQspi_Mode_pwmOverSpi = 1, // QSPI in "PWM over SPI" mode
IfxQspi_Mode_slave = 2 // QSPI in "slave" mode
} IfxQspi_Mode;
void IfxQspi_foo(IfxQSPI* module)
{
if (module->GLOBALCON.B.MS != IfxQspi_Mode_slave)
{ //...
}
else
{ // ...
}
}

Wrong:

// File 1_SrvSw/If/SscIf.h
// SSC operation modes
typedef enum
{
SscIf_Mode_master, // Master mode
SscIf_Mode_slave, // Slave mode
SscIf_Mode_undefined // Undefined mode
} SscIf_Mode;
// File Std/IfxQspi.h
// QSPI controller mode
typedef enum
{
IfxQspi_GLOBALCON_MS_master = 0, // Corresponds with GLOBALCON.B.MS == 0
IfxQspi_GLOBALCON_MS_pwmOverSpi, // Corresponds with GLOBALCON.B.MS == 1
IfxQspi_GLOBALCON_MS_slave // Corresponds with GLOBALCON.B.MS == 2
} IfxQspi_GLOBALCON_MS;
void IfxQspi_foo(IfxQSPI* module)
{
if (module->GLOBALCON.B.MS != SscIf_Mode_slave)
{ //...
}
else
{ // ...
}
}

Usage of enums in microcontroller interface drivers

[link: Usage of enums in microcontroller interface drivers]

    The code dependencies shall be limited to the microcontroller HAL and service software interface /1_SrvSw/If, therefore only enums from this files can be used.
// File 1_SrvSw/If/SscIf.h
// SSC operation modes
typedef enum
{
SscIf_Mode_master, // Master mode
SscIf_Mode_slave, // Slave mode
SscIf_Mode_undefined // Undefined mode
} SscIf_Mode;
// File Ssc/IfxQspi_Ssc.h
// QSPI controller mode
// Definition for Ifx_QSPI.GLOBALCON.B.MS
typedef enum
{
IfxQspi_Mode_master = 0, // QSPI in "master" mode
IfxQspi_Mode_pwmOverSpi = 1, // QSPI in "PWM over SPI" mode
IfxQspi_Mode_slave = 2 // QSPI in "slave" mode
} IfxQspi_Mode;
SscIf_Mode IfxQspi_Ssc_foo(void)
{
SscIf_Mode mode;
switch ( IfxQspi_getMode(&MODULE_QSPI0))
{
case IfxQspi_Mode_master:
mode = SscIf_Mode_master;
break;
case IfxQspi_Mode_slave:
mode = IfxQspi_Mode_slave;
break;
default:
mode = SscIf_Mode_undefined;
break;
}
}

Enum name with index

[link: Enum name with index]

Do not use left zero padding for enum names, because the highest index number can not be assumed to be fixed.

Correct:

typedef enum
{
Dma_Channel_0 = 0,
Dma_Channel_1 = 1,
Dma_Channel_2 = 2,
Dma_Channel_3 = 3
} IfxQspi_Mode;

Wrong:

typedef enum
{
Dma_Channel_00 = 0,
Dma_Channel_01 = 1,
Dma_Channel_02 = 2,
Dma_Channel_03 = 3
} IfxQspi_Mode;

Enum members shall be prefixed with the enum type

[link: Enum members shall be prefixed with the enum type]

Correct:
typedef enum
{
IfxDma_Channel_0 = 0,
} IfxDma_Channel;

Wrong(IfxDma_ChannelId):

typedef enum
{
Dma_Channel_0 = 0,
} IfxDma_ChannelId;

[Previous page]


iLLD_TC38A: Modules

Modules
Here is a list of all modules:
[detail level 123456]
▼ iLLD |
▼ ASCLIN |
▼ Implementation |
Enumerations |
▼ Standard Driver |
Enumerations |
Operative Functions |
Utility Functions |
Configuration Functions |
External Functions |
IO Pin Configuration Functions |
ASCLIN Pin Mapping |
How to use the ASCLIN ASC Interface driver? |
▼ ASC |
Data Structures |
Interrupt Functions |
Simple Communication |
Stream based Communication (STDIO) |
Module Functions |
How to use the ASCLIN LIN Interface driver? |
▼ LIN |
Data Structures |
Elementary Transactions |
Module Functions |
Error Handling Functions |
Interrupt Functions |
Enumerations |
How to use the ASCLIN SPI Interface driver? |
▼ SPI |
Data Structures |
Module Functions |
Interrupt Functions |
Communication Functions |
▼ CAN |
▼ Implementation Interface |
Enumerations |
▼ Standard Interface |
Enumerations |
Data Structures |
Node Functions |
Tx Element Functions |
Rx Element Functions |
Filter Functions |
Interrupt Functions |
Module Functions |
Tx Event FIFO Element Functions |
CAN Pin Mapping |
How to use the CAN Interface driver? |
▼ CAN Interface Driver |
Data Structures |
Module Initialize Functions |
Data Transfer Functions |
Filter Configuration Functions |
Node Initialize Functions |
▼ CCU6 |
▼ Implementation |
Enumerations |
▼ Standard Driver |
Enumerations |
Operative Functions |
Utility Functions |
Configuration Functions |
IO Pin Configuration Functions |
CCU6 Pin Mapping |
▼ ICU Interface driver |
How to use the CCU6 ICU Interface driver? |
Data Structures |
Module Initialize Functions |
Capture Control Functions |
Channel Initialize Functions |
▼ PWMBC Interface driver |
How to use the CCU6 PWMBC Interface driver? |
Data Structures |
Module Initialize Functions |
Modulation Control Functions |
Hall Pattern Functions |
▼ PWM Interface Driver |
How to use the CCU6 PWM Driver |
Data Structures |
PwmHl Functions |
StdIf Functions |
▼ TIMER Interface driver |
How to use the CCU6 TIMER Interface driver? |
Data Structures |
Module Initialize Functions |
Timer Control Functions |
▼ TimerWithTrigger Interface driver |
How to use the CCU6 TimerWithTrigger Interface driver? |
Data Structures |
Timer StdIf Functions |
Timer Functions |
▼ TPWM Interface driver |
How to use the CCU6 TPWM Interface driver? |
Data Structures |
Module Initialize Functions |
Modultion Control Functions |
▼ CONVCTRL |
Implementation |
▼ Standard Driver |
Configuration Functions |
Initialization Functions |
Enums |
▼ CPU |
Implementation |
▼ Standard Driver |
Cpu Core Functions |
Interrupt Utility Functions |
Cache Management Functions |
Performance Counter Functions |
Synchronization Functions |
Cpu Utility Functions |
Enumerations |
Data Structures |
▼ Intrinsics |
▼ intrinsics for DCC compiler |
Minimum and Maximum of (Short) Integers |
Cross type arithmetic operation |
Floating point operation |
Fractional Arithmetic Support |
Insert / Extract Bit-fields and Bits |
Interrupt Handling |
Miscellaneous Intrinsic Functions |
Packed Data Type Support |
Register Handling |
Saturation Arithmetic Support |
Insert Single Assembly Instruction |
▼ Intrinsics for GNU compiler |
Cross type arithmetic operation |
Signed integer operation |
Unsigned integer operation |
Floating point operation |
Fractional Arithmetic Support |
Insert / Extract Bit-fields and Bits |
Interrupt Handling |
Miscellaneous Intrinsic Functions |
Packed Data Type Support |
Insert Single Assembly Instruction |
▼ Intrinsics for GNU compiler |
Cross type arithmetic operation |
Signed integer operation |
Unsigned integer operation |
Minimum and Maximum of (sint16) Integers |
Floating point operation |
Fractional Arithmetic Support |
Insert / Extract Bit-fields and Bits |
Interrupt Handling |
Miscellaneous Intrinsic Functions |
Packed Data Type Support |
Register Handling |
Saturation Arithmetic Support |
Insert Single Assembly Instruction |
▼ Intrinsics for TASKING compiler |
Cross type arithmetic operation |
Signed integer operation |
Unsigned integer operation |
Floating point operation |
Fractional Arithmetic Support |
Insert / Extract Bit-fields and Bits |
Interrupt Handling |
Miscellaneous Intrinsic Functions |
Packed Data Type Support |
Register Handling |
Saturation Arithmetic Support |
Insert Single Assembly Instruction |
▼ Interrupt Functions |
How to define Interrupts? |
▼ Trap Functions |
Trap Function Hooks |
How to use the Trap Function Hooks? | Macro to define the trap vector table. This macro is provided to define the trap vector table in the frameowrk. User shall not use this macro. Refer to the documentation to extend the trap with hook functions. How to use the Trap Function Hooks?
▼ DMA |
Implementation |
▼ Standard Driver |
Enumerations |
Reset Functions |
Channel Transaction Functions |
Move Engine functions |
Channel configuration Functions |
Channel Halt Functions |
Double Buffer functions |
Interrupt functions |
How to use the DMA Interface driver? |
▼ DMA |
Data Structures |
Module Initialization |
Channel Initialization |
Linked Lists |
Channel Transactions |
▼ DTS |
Implementation |
▼ Standard Driver |
Control functions |
Status functions |
How to use the DTS Interface driver? |
▼ DTS |
Data Structures |
Module Initialisation functions |
Sensor Functions |
Conversion Functions |
▼ EDSADC |
Implementation |
▼ Standard Driver |
Enumerations |
Operative Functions |
Support Functions |
Interrupt Functions |
IO Pin Configuration Functions |
EDSADC Pin Mapping |
How to use the EDSADC Interface driver? |
▼ EDSADC |
Data Structures |
Module Functions |
Channel Functions |
Operative Functions |
Result Functions |
Interrupt Functions |
▼ ERAY |
▼ Implementation |
Enumerations |
▼ Standard Driver |
Enumerations |
Interrupt Functions |
IO Pin Configuration Functions |
Module Functions |
Status Functions |
Configuration Functions |
Data Structures |
Operative Functions |
ERAY Pin Mapping |
How to use the ERAY Interface driver? |
▼ ERAY |
Data Structures |
Module Initialisation Functions |
Node Initialisation Functions |
Operative Functions |
Status Functions |
Interrupt Functions |
▼ EVADC |
Implementation |
▼ Standard Driver |
Enumerations |
Global Functions |
Queue Request Functions |
IO Pin Configuration Functions |
Frequency Calculation |
Group Functions |
Module Functions |
Channel Functions |
Emux Functions |
Fast Compare functions |
EVADC Pin Mapping |
How to use the EVADC ADC Interface driver? |
▼ Interface Driver |
Data Structures |
Module Functions |
Group Functions |
Channel Functions |
Queue Functions |
Clock Functions |
Interrupt Functions |
Variables |
Global Functions |
Emux Functions |
Fast Compare Functions |
▼ FCE |
Implementation |
▼ Standard Driver |
Enumerations |
Module Functions |
Support Function |
Interrupt Status Functions |
How to use the FCE CRC Interface driver? |
▼ CRC |
Data Structures |
Module Initialise Functions |
CRC Operation Functions |
Interrupt Status Function |
▼ FLASH |
Implementation |
▼ Standard Driver |
Enumerations |
CommandSequence Functions |
▼ GETH |
▼ Implementation |
Enumerations |
▼ Standard Driver |
Enumerations |
MAC Functions |
Module Functions |
MTL Functions |
DMA Functions |
DataStructures |
Unions |
GETH Pin Mapping |
How to use the Geth Eth Interface driver? |
▼ ETH |
DataStructures |
MAC Functions |
Module Functions |
MTL Functions |
DMA Functions |
Variables |
Global Definitions |
▼ GPT12 |
Implementation |
▼ Standard Driver |
Enumerations |
Interrupt Functions |
Configuration Functions |
Utility Functions |
Operative Functions |
GPT12 Pin Mapping |
▼ INCRENC |
How to use the GPT12 Incremental Encoder Driver |
Data structures |
Functions |
StdIf Functions |
▼ GTM |
▼ Implementation |
Enumerations |
Data Structures |
▼ Standard Driver |
Basic Functions |
Enumerations |
▼ Atom Basic Functionality |
ATOM Enumerations |
ATOM Channel Functions |
ATOM AGC Functions |
ATOM Module Functions |
▼ Cmu Basic Functionality |
CMU Enumerations |
CMU Basic Functions |
▼ Dpll Basic Functionality |
DPLL Basic Functions |
▼ Dtm Basic Functionality |
DTM Enumerations |
DTM Functions |
▼ PSM |
PSM Data Structures |
PSM Enumerations |
PSM Functions |
▼ Spe Basic Functionality |
SPE Data Structures |
SPE Enumerations |
SPE Functions |
▼ Tbu Basic Functionality |
TBU Enumerations |
TBU Basic Functions |
▼ Tim Basic Functionality |
TIM Enumerations |
TIM Channel Functions |
▼ Tom Basic Functionality |
TOM Enumerations |
TOM Channel Functions |
TOM TGC Functions |
TOM Module Functions |
▼ Atom Interface Drivers |
ATOM DTM Interface Driver |
▼ ATOM PWM Interface Driver |
How to use the GTM ATOM PWM Driver |
ATOM PWM DataStructures |
Pwm Functions |
▼ ATOM PWM HL Interface Driver |
How to use the GTM ATOM PWM Driver |
Data Structures |
PwmHl Functions |
PwmHl StdIf Functions |
▼ ATOM Timer Interface Driver |
How to use the GTM ATOM Timer Driver |
Timer StdIf Functions |
Timer Functions |
Data Structures |
▼ TOM Interface Drivers |
TOM DTM Interface Driver |
▼ TOM PWM Interface Driver |
How to use the GTM TOM PWM Driver |
TOM PWM DataStructures |
Pwm Functions |
▼ TOM PWM HL Interface Driver |
How to use the GTM TOM PWM Driver |
Data Structures |
PwmHl Functions |
PwmHl StdIf Functions |
▼ TOM Timer Interface Driver |
How to use the GTM TOM Timer Driver |
Data Structures |
Timer Functions |
Timer StdIf Functions |
▼ Tim Interface Drivers |
▼ TIM Input Interface |
Data Structures |
Enumerations |
Funtions |
TIM Timer Interface |
GTM Pin Mapping |
▼ GTM Trigger Configuration |
Enumerations |
Data Structures |
Trigger Functions |
▼ HSSL |
▼ Implementation |
Enumerations |
▼ Standard Driver |
Enumerations |
Hsct Functions |
Data Structures |
Hssl Functions |
How to use the HSSL Interface driver? |
▼ HSSL |
Data Structures |
Enumerations |
Module Functions |
Channel Functions |
Simple Communication |
Error Handling |
Streaming Communication |
▼ I2C |
▼ Implementation |
Enumerations |
▼ Standard Driver |
Enumerations |
Functions |
Data Structures |
I2C Pin Mapping |
How to use the I2c driver? |
▼ I2C |
Module Functions |
Enumerations |
Data Structures |
▼ IOM |
▼ Implementation |
Enum input signals |
Enumeration inputs |
▼ Standard Driver |
Enumeration |
Utility Functions |
Enumeration Obsolete (NOt recommended for use) |
Module Functions Obsolete (NOt recommended for use) |
▼ IOM Driver |
Driver Functions |
Structures |
▼ Obselete Interface for backward compatibility, (Not recommended for use) |
How to use the IOM Iom Interface driver? |
▼ Obselete Interface for backward compatibility, (Not recommended for use) |
Data Structures |
Module Functions |
Operative Functions |
▼ Lmu |
Implementation |
▼ MSC |
▼ Implementation |
Enumerations |
▼ Standard Driver |
Enumerations |
Configure Flags |
Set Command Target |
Set Data |
Get Data |
Enable Module |
Reset Module |
Baud Calculator |
IO Pin Configuration Functions |
Module Functions |
MSC Pin Mapping |
How to use the MSC Interface driver? |
▼ MSC |
Enumerations |
Data Structures |
Module Initialize Functions |
Send Functions |
Receive Functions |
Target Read Write Functions |
▼ MTU |
Implementation |
▼ Standard Driver |
Utility Functions |
MBIST Operations |
MBIST Error Tracking |
How to use the Mtu driver? |
▼ PMS |
Implementation |
▼ Pm and Evr Drivers |
▼ EVR |
Enumerations |
Over Voltage Functions |
Module Functions |
Under Voltage Functions |
EVRC Functions |
EVR33 Functions |
SWD Functions |
▼ PM |
Enumerations |
Data Structures |
System Modes |
Cpu Modes |
WakeupModes |
PMS Pin Mapping |
▼ PORTS |
Implementation |
▼ Standard Driver |
Enumerations |
Data structures |
Single Pin Functions |
Group Access Functions |
PORT Pin Mapping |
How to use the PORT I/O driver? |
▼ Interface Driver |
Data Structures |
Module Functions |
▼ PSI5 |
▼ Implementation |
Enumerations |
▼ Standard Driver |
Enumerations |
Channel Status Functions |
IO Pin Configuration Functions |
Interrupt configuration function |
Operative functions |
PSI5 Pin Mapping |
How to use the PSI5 PSI5 Interface driver? |
▼ PSI5 |
Data Structures |
Module Initialisation functions |
Channel functions |
Clock Intialisation functions |
▼ PSI5S |
Implementation |
▼ Standard Driver |
Enumerations |
Channel Operative Functions |
IO Pin Configuration Functions |
Interrupt configuration functions |
Module Functions |
PSI5S Pin Mapping |
How to use the PSI5S PSI5S Interface driver? |
▼ PSI5S |
Data Structures |
Module Initialise Functions |
Channel Functions |
Utility Functions |
Interrupt configuration Function |
▼ QSPI |
▼ Implementation |
Enumerations |
▼ Standard Driver |
Enumerations |
Operative Functions |
Support Functions |
Interrupt Functions |
IO Pin Configuration Functions |
QSPI Pin Mapping |
How to use the SPI Master Interface driver? |
▼ SPI Master Driver |
Data Structures |
Module Functions |
Channel Functions |
Support Functions |
Communication |
Interrupt Functions |
Direct FIFO Access |
How to use the SPI Slave Interface driver? |
▼ SPI Slave Driver |
Data Structures |
Module Functions |
Support Functions |
Communication |
Interrupt Functions |
Direct FIFO Access |
▼ SCU |
Implementation |
▼ Standard Driver |
▼ Ccu Basic Functionality |
Clock Control Functions |
Clock Control Operative Functions |
Clock Control Configuration Functions |
Enumerations |
▼ Eru Basic Functionality |
ERU: Enumerations |
ERU: External Request Selection |
ERU: Event Trigger Logic |
ERU: Connecting Matrix |
ERU: Output Gating Unit |
ERU: Data Structures |
ERU: Input Filtering |
Lbist Basic Functionality |
Rcu Basic Functionality |
▼ Wdt Basic Functionality |
Wdt Operative Functionality |
Watchdog Configuration functions |
Watchdog Endinit functions |
Watchdog Operative functions |
How to use Endinit APIs? |
SCU Pin Mapping |
How to use the Scu Clock driver? |
▼ SENT |
Implementation |
▼ Standard Driver |
Enumerations |
Configuration Functions |
Interrupts |
Operative Functions |
Baudrate Configuration |
IO Pin Configuration Functions |
SENT Pin Mapping |
How to use the SENT Interface driver? |
▼ Interface Driver |
Data Structures |
Module Functions |
Channel Functions |
▼ SMU |
▼ Implementation |
Alarm Group Enumeration |
List of Alarms Enumeration |
▼ Standard Driver |
Enumerations |
Module Functions |
▼ STDBY |
Enumerations |
StdBy Functions |
SMU Pin Mapping |
▼ SMU |
Data Structures |
Smu Functions |
▼ SRC |
▼ Implementation |
Enumerations |
▼ Standard Driver |
Service Request Functions |
Module Functions |
How to use Service Request Mechanism? |
▼ STM |
▼ Implementation |
Enumerations |
Global Variables |
▼ Standard Driver |
Enumerations |
Data Structures |
Module Functions |
Timer Functions |
Comparator Functions |
How to use the Stm driver? |
▼ STM Timer Interface |
STM Timer Data Structures |
global function |
▼ General functionalities |
▼ Data handling |
Circular buffer |
FIFO |
▼ Internal Mux |
FIFO |
▼ Service software |
▼ Utilities |
Assertion |
▼ Standard interface (Obsolete) |
ICU interface |
PWM HL interface |
Timer interface |
TPWM interface |
SPI interface |
▼ Standard interface |
Standard interface: Data Pipe |
Standard interface: Position interface |
Standard interface: Multi-channels, dual-complementary PWM interface |
Standard interface: Timer |
▼ System Engineering |
▼ Board support package |
Assertion |
Board support package |
▼ Communication |
Console |
Shell |
▼ General |
Global resources |
▼ Math |
CRC |
▼ Look-ups |
▼ Look-ups float32 |
ATAN lookup table |
Indexes look-up table (with linear interpolation) |
Look-up table (with linear interpolation) |
Linear trigonometric Look-ups |
Sinus and cosinus Look-ups |
▼ Math 32bit floating point |
Angle-Tracking Observer |
Floating point signal, vector, and matrix library |
Floating-point FFT |
Discrete Integral Approximation |
Low-pass Filter: Type PT1 |
Ramp |
Window functions |
▼ Time |
DateTime |
DMU Pin Mapping |


iLLD_TC38A: iLLD

Modules | Files
iLLD
Collaboration diagram for iLLD:

Modules

ASCLIN
CAN
CCU6
CONVCTRL
CPU
DMA
DTS
EDSADC
ERAY
EVADC
FCE
FLASH
GETH
Global Definitions
GPT12
GTM
HSSL
I2C
IOM
Lmu
MSC
MTU
PMS
PORTS
PSI5
PSI5S
QSPI
SCU
SENT
SMU
SRC
STM
General functionalities

Files

file IfxStdIf.h
Standard interface types.

Detailed Description


iLLD_TC38A: ASCLIN

Modules | Files
ASCLIN
iLLD
Collaboration diagram for ASCLIN:

Modules

Implementation
Standard Driver
ASCLIN Pin Mapping
How to use the ASCLIN ASC Interface driver?
ASC
How to use the ASCLIN LIN Interface driver?
LIN
How to use the ASCLIN SPI Interface driver?
SPI

Files

file | IfxAsclin_cfg.h
ASCLIN on-chip implementation data.
file | IfxAsclin_PinMap.c
ASCLIN I/O map.
file | IfxAsclin_PinMap.h
ASCLIN I/O map.
file | IfxAsclin_Asc.h
ASCLIN ASC details.
file | IfxAsclin_Lin.h
ASCLIN LIN details.
file | IfxAsclin_Spi.h
ASCLIN SPI details.
file | IfxAsclin.h
ASCLIN basic functionality.

Detailed Description


iLLD_TC38A: Implementation

Modules
Implementation
iLLD » ASCLIN
Collaboration diagram for Implementation:

Modules

Enumerations

Detailed Description


iLLD_TC38A: Enumerations

Enumerations
Enumerations
iLLD » ASCLIN » Implementation
Collaboration diagram for Enumerations:

Enumerations

enum IfxAsclin_Index {
IfxAsclin_Index_none = -1,
IfxAsclin_Index_0 = 0,
IfxAsclin_Index_1,
IfxAsclin_Index_2,
IfxAsclin_Index_3,
IfxAsclin_Index_4,
IfxAsclin_Index_5,
IfxAsclin_Index_6,
IfxAsclin_Index_7,
IfxAsclin_Index_8,
IfxAsclin_Index_9,
IfxAsclin_Index_10,
IfxAsclin_Index_11,
IfxAsclin_Index_12,
IfxAsclin_Index_13,
IfxAsclin_Index_14,
IfxAsclin_Index_15,
IfxAsclin_Index_16,
IfxAsclin_Index_17,
IfxAsclin_Index_18,
IfxAsclin_Index_19,
IfxAsclin_Index_20,
IfxAsclin_Index_21,
IfxAsclin_Index_22,
IfxAsclin_Index_23
}
List of the available Asclin resources. More...

Detailed Description

Enumeration Type Documentation

◆ IfxAsclin_Index

enum IfxAsclin_Index

List of the available Asclin resources.

Enumerator
IfxAsclin_Index_none | Not Selected.
IfxAsclin_Index_0 | ASCLIN Index 0.
IfxAsclin_Index_1 | ASCLIN Index 1.
IfxAsclin_Index_2 | ASCLIN Index 2.
IfxAsclin_Index_3 | ASCLIN Index 3.
IfxAsclin_Index_4 | ASCLIN Index 4.
IfxAsclin_Index_5 | ASCLIN Index 5.
IfxAsclin_Index_6 | ASCLIN Index 6.
IfxAsclin_Index_7 | ASCLIN Index 7.
IfxAsclin_Index_8 | ASCLIN Index 8.
IfxAsclin_Index_9 | ASCLIN Index 9.
IfxAsclin_Index_10 | ASCLIN Index 10.
IfxAsclin_Index_11 | ASCLIN Index 11.
IfxAsclin_Index_12 | ASCLIN Index 12.
IfxAsclin_Index_13 | ASCLIN Index 13.
IfxAsclin_Index_14 | ASCLIN Index 14.
IfxAsclin_Index_15 | ASCLIN Index 15.
IfxAsclin_Index_16 | ASCLIN Index 16.
IfxAsclin_Index_17 | ASCLIN Index 17.
IfxAsclin_Index_18 | ASCLIN Index 18.
IfxAsclin_Index_19 | ASCLIN Index 19.
IfxAsclin_Index_20 | ASCLIN Index 20.
IfxAsclin_Index_21 | ASCLIN Index 21.
IfxAsclin_Index_22 | ASCLIN Index 22.
IfxAsclin_Index_23 | ASCLIN Index 23.

Definition at line 77 of file IfxAsclin_cfg.h.


iLLD_TC38A: Standard Driver

Modules
Standard Driver
iLLD » ASCLIN
Collaboration diagram for Standard Driver:

Modules

Enumerations
Operative Functions
Utility Functions
Configuration Functions
External Functions
IO Pin Configuration Functions

Detailed Description


iLLD_TC38A: Enumerations

Enumerations
Enumerations
iLLD » ASCLIN » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxAsclin_Checksum {
IfxAsclin_Checksum_classic = 0,
IfxAsclin_Checksum_enhanced = 1
}
Defines if the classic or the enhanced checksum will be calculated by the checksum block.
Definition in Ifx_ASCLIN.DATCON.B.CSM. More...
enum IfxAsclin_ChecksumInjection {
IfxAsclin_ChecksumInjection_notWritten = 0,
IfxAsclin_ChecksumInjection_written = 1
}
Defines if the received checksum byte is written into the RXFifo or not.
Definition in Ifx_ASCLIN.LIN.CON.B.CSI. More...
enum IfxAsclin_ClockPolarity {
IfxAsclin_ClockPolarity_idleLow = 0,
IfxAsclin_ClockPolarity_idleHigh = 1
}
CPOL defines the idle level of the clock signal in the SPI mode.
Idle level is the level outside the data transmission time intervals.
Definition in Ifx_ASCLIN.IOCR.B.CPOL. More...
enum IfxAsclin_ClockSource {
IfxAsclin_ClockSource_noClock = 0,
IfxAsclin_ClockSource_ascFastClock = 2,
IfxAsclin_ClockSource_ascSlowClock = 4
}
Selection of clock source
Definition in Ifx_ASCLIN.CSR.B.CLKSEL. More...
enum IfxAsclin_CtsInputSelect {
IfxAsclin_CtsInputSelect_0,
IfxAsclin_CtsInputSelect_1,
IfxAsclin_CtsInputSelect_2,
IfxAsclin_CtsInputSelect_3
}
CTS input pin selection
Definition in Ifx_ASCLIN.IOCR.B.CTS. More...
enum IfxAsclin_DataLength {
IfxAsclin_DataLength_1 = 0,
IfxAsclin_DataLength_2,
IfxAsclin_DataLength_3,
IfxAsclin_DataLength_4,
IfxAsclin_DataLength_5,
IfxAsclin_DataLength_6,
IfxAsclin_DataLength_7,
IfxAsclin_DataLength_8,
IfxAsclin_DataLength_9,
IfxAsclin_DataLength_10,
IfxAsclin_DataLength_11,
IfxAsclin_DataLength_12,
IfxAsclin_DataLength_13,
IfxAsclin_DataLength_14,
IfxAsclin_DataLength_15,
IfxAsclin_DataLength_16
}
Number of bits per transfer
Definition in Ifx_ASCLIN.FRAMECON.B.DATALEN. More...
enum IfxAsclin_FifoInterruptMode {
IfxAsclin_FifoInterruptMode_combined,
IfxAsclin_FifoInterruptMode_single,
IfxAsclin_FifoInterruptMode_batch
}
Defines the interrupt generation modes of Tx FIFO and Rx FIFO
Definition in Ifx_ASCLIN.RXFIFOCON.B.FM and Ifx_ASCLIN.TXFIFOCON.B.FM. More...
enum IfxAsclin_FrameMode {
IfxAsclin_FrameMode_initialise = 0,
IfxAsclin_FrameMode_asc = 1,
IfxAsclin_FrameMode_spi = 2,
IfxAsclin_FrameMode_lin = 3
}
Defines the basic operating mode of the module. Changing the mode must be done by switching first to initialize mode, and then to the other mode.
Definition in Ifx_ASCLIN.FRAMECON.B.MODE. More...
enum IfxAsclin_HeaderResponseSelect {
IfxAsclin_HeaderResponseSelect_headerAndResponse = 0,
IfxAsclin_HeaderResponseSelect_headerOnly = 1
}
Defines if LIN frame shall consist of a header and response or of a header only.
Definition in Ifx_ASCLIN.DATCON.B.HO. More...
enum IfxAsclin_IdleDelay {
IfxAsclin_IdleDelay_0,
IfxAsclin_IdleDelay_1,
IfxAsclin_IdleDelay_2,
IfxAsclin_IdleDelay_3,
IfxAsclin_IdleDelay_4,
IfxAsclin_IdleDelay_5,
IfxAsclin_IdleDelay_6,
IfxAsclin_IdleDelay_7
}
Defines the duration of the IDLE delay in bit times.
SPI mode: this is the idle time between the frames.
ASC and LIN mode: this is the pause inserted between transmission of bytes.
Definition in Ifx_ASCLIN.FRAMECON.B.IDLE. More...
enum IfxAsclin_LeadDelay {
IfxAsclin_LeadDelay_0,
IfxAsclin_LeadDelay_1,
IfxAsclin_LeadDelay_2,
IfxAsclin_LeadDelay_3,
IfxAsclin_LeadDelay_4,
IfxAsclin_LeadDelay_5,
IfxAsclin_LeadDelay_6,
IfxAsclin_LeadDelay_7
}
Defines the leading delay in bit times in SPI mode. ASC mode: not applicable.
LIN mode: delay between the end of the break and the start of the sync character.
Definition in Ifx_ASCLIN.FRAMECON.B.LEAD. More...
enum IfxAsclin_LinMode {
IfxAsclin_LinMode_slave = 0,
IfxAsclin_LinMode_master = 1
}
Configures if the module in LIN mode operates as master or slave
Definition in Ifx_ASCLIN.LIN.CON.B.MS. More...
enum IfxAsclin_LinResponseTimeoutMode {
IfxAsclin_LinResponseTimeoutMode_frameTimeout = 0,
IfxAsclin_LinResponseTimeoutMode_responseTimeout = 1
}
Defines the timeout threshold of RESPOSE bit is for LIN response timeout or LIN frame timeout.
Definition in Ifx_ASCLIN.DATCON.B.RM. More...
enum IfxAsclin_OversamplingFactor {
IfxAsclin_OversamplingFactor_4 = 3,
IfxAsclin_OversamplingFactor_5 = 4,
IfxAsclin_OversamplingFactor_6 = 5,
IfxAsclin_OversamplingFactor_7 = 6,
IfxAsclin_OversamplingFactor_8 = 7,
IfxAsclin_OversamplingFactor_9 = 8,
IfxAsclin_OversamplingFactor_10 = 9,
IfxAsclin_OversamplingFactor_11 = 10,
IfxAsclin_OversamplingFactor_12 = 11,
IfxAsclin_OversamplingFactor_13 = 12,
IfxAsclin_OversamplingFactor_14 = 13,
IfxAsclin_OversamplingFactor_15 = 14,
IfxAsclin_OversamplingFactor_16 = 15
}
Defines the bit length in ticks in the range of 1 to 16. The lengths of 1 to 3 are not allowed
Definition in Ifx_ASCLIN.BITCON.B.OVERSAMPLING. More...
enum IfxAsclin_ParityType {
IfxAsclin_ParityType_even = 0,
IfxAsclin_ParityType_odd = 1
}
Type of parity bit attached to data bits
Definition in Ifx_ASCLIN.FRAMECON.B.ODD. More...
enum IfxAsclin_ReceiveBufferMode {
IfxAsclin_ReceiveBufferMode_rxFifo = 0,
IfxAsclin_ReceiveBufferMode_rxBuffer = 1
}
Receive buffer mode
Definition in Ifx_ASCLIN.RXFIFOCON.B.BUF. More...
enum IfxAsclin_RtsCtsPolarity {
IfxAsclin_RtsCtsPolarity_activeHigh = 0,
IfxAsclin_RtsCtsPolarity_activeLow = 1
}
Polarity of the RTS and CTS signals
Definition in Ifx_ASCLIN.IOCR.B.RCPOL. More...
enum IfxAsclin_RxFifoInterruptLevel {
IfxAsclin_RxFifoInterruptLevel_1,
IfxAsclin_RxFifoInterruptLevel_2,
IfxAsclin_RxFifoInterruptLevel_3,
IfxAsclin_RxFifoInterruptLevel_4,
IfxAsclin_RxFifoInterruptLevel_5,
IfxAsclin_RxFifoInterruptLevel_6,
IfxAsclin_RxFifoInterruptLevel_7,
IfxAsclin_RxFifoInterruptLevel_8,
IfxAsclin_RxFifoInterruptLevel_9,
IfxAsclin_RxFifoInterruptLevel_10,
IfxAsclin_RxFifoInterruptLevel_11,
IfxAsclin_RxFifoInterruptLevel_12,
IfxAsclin_RxFifoInterruptLevel_13,
IfxAsclin_RxFifoInterruptLevel_14,
IfxAsclin_RxFifoInterruptLevel_15,
IfxAsclin_RxFifoInterruptLevel_16
}
Defines the filling level that triggers a drain (RX) interrupt or DMA access
Definition in Ifx_ASCLIN.RXFIFOCON.B.INTLEVEL. More...
enum IfxAsclin_RxFifoOutletWidth {
IfxAsclin_RxFifoOutletWidth_0,
IfxAsclin_RxFifoOutletWidth_1,
IfxAsclin_RxFifoOutletWidth_2,
IfxAsclin_RxFifoOutletWidth_3
}
Defines the number of bytes read from the Rx FIFO with one FPI bus read
Definition in Ifx_ASCLIN.RXFIFOCON.B.OUTW. More...
enum IfxAsclin_RxInputSelect {
IfxAsclin_RxInputSelect_0,
IfxAsclin_RxInputSelect_1,
IfxAsclin_RxInputSelect_2,
IfxAsclin_RxInputSelect_3,
IfxAsclin_RxInputSelect_4,
IfxAsclin_RxInputSelect_5,
IfxAsclin_RxInputSelect_6,
IfxAsclin_RxInputSelect_7
}
Alternate input selection for Rx signal.
Definition in Ifx_ASCLIN.IOCR.B.ALTI. More...
enum IfxAsclin_SamplePointPosition {
IfxAsclin_SamplePointPosition_1 = 1,
IfxAsclin_SamplePointPosition_2 = 2,
IfxAsclin_SamplePointPosition_3 = 3,
IfxAsclin_SamplePointPosition_4 = 4,
IfxAsclin_SamplePointPosition_5 = 5,
IfxAsclin_SamplePointPosition_6 = 6,
IfxAsclin_SamplePointPosition_7 = 7,
IfxAsclin_SamplePointPosition_8 = 8,
IfxAsclin_SamplePointPosition_9 = 9,
IfxAsclin_SamplePointPosition_10 = 10,
IfxAsclin_SamplePointPosition_11 = 11,
IfxAsclin_SamplePointPosition_12 = 12,
IfxAsclin_SamplePointPosition_13 = 13,
IfxAsclin_SamplePointPosition_14 = 14,
IfxAsclin_SamplePointPosition_15 = 15
}
Sample point position
Definition in Ifx_ASCLIN.BITCON.B.SAMPLEPOINT. More...
enum IfxAsclin_SamplesPerBit {
IfxAsclin_SamplesPerBit_one = 0,
IfxAsclin_SamplesPerBit_three = 1
}
Number of samples per bit, sample mode/medianfilter
Definition in Ifx_ASCLIN.BITCON.B.SM. More...
enum IfxAsclin_ShiftDirection {
IfxAsclin_ShiftDirection_lsbFirst = 0,
IfxAsclin_ShiftDirection_msbFirst = 1
}
SPI mode: defines the shift direction of the shift register.
ASC and LIN mode: should be set to 0.
Definition in Ifx_ASCLIN.FRAMECON.B.MSB. More...
enum IfxAsclin_SlavePolarity {
IfxAsclin_SlavePolarity_idleLow = 0,
IfxAsclin_SlavePolarity_idlehigh = 1
}
Defines the idle level of the SLSO signal, which is the level.
Outside the data transmission, leading and trailing time intervals.
Definition in Ifx_ASCLIN.IOCR.B.SPOL. More...
enum IfxAsclin_SleepMode {
IfxAsclin_SleepMode_enable = 0,
IfxAsclin_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_ASCLIN.CLC.B.EDIS. More...
enum IfxAsclin_Status {
IfxAsclin_Status_configurationError = 0,
IfxAsclin_Status_noError = 1
}
Error status. More...
enum IfxAsclin_StopBit {
IfxAsclin_StopBit_0,
IfxAsclin_StopBit_1,
IfxAsclin_StopBit_2,
IfxAsclin_StopBit_3,
IfxAsclin_StopBit_4,
IfxAsclin_StopBit_5,
IfxAsclin_StopBit_6,
IfxAsclin_StopBit_7
}
ASC and LIN mode: number of stop bits (0 is not allowed), SPI mode: trailing delay.
Definition in Ifx_ASCLIN.FRAMECON.B.STOP. More...
enum IfxAsclin_SuspendMode {
IfxAsclin_SuspendMode_none = 0,
IfxAsclin_SuspendMode_hard = 1,
IfxAsclin_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxAsclin_TxFifoInletWidth {
IfxAsclin_TxFifoInletWidth_0,
IfxAsclin_TxFifoInletWidth_1,
IfxAsclin_TxFifoInletWidth_2,
IfxAsclin_TxFifoInletWidth_3
}
Defines the number of bytes written to the Tx FIFO with one FPI bus write
Definition in Ifx_ASCLIN.TXFIFOCON.B.INW. More...
enum IfxAsclin_TxFifoInterruptLevel {
IfxAsclin_TxFifoInterruptLevel_0,
IfxAsclin_TxFifoInterruptLevel_1,
IfxAsclin_TxFifoInterruptLevel_2,
IfxAsclin_TxFifoInterruptLevel_3,
IfxAsclin_TxFifoInterruptLevel_4,
IfxAsclin_TxFifoInterruptLevel_5,
IfxAsclin_TxFifoInterruptLevel_6,
IfxAsclin_TxFifoInterruptLevel_7,
IfxAsclin_TxFifoInterruptLevel_8,
IfxAsclin_TxFifoInterruptLevel_9,
IfxAsclin_TxFifoInterruptLevel_10,
IfxAsclin_TxFifoInterruptLevel_11,
IfxAsclin_TxFifoInterruptLevel_12,
IfxAsclin_TxFifoInterruptLevel_13,
IfxAsclin_TxFifoInterruptLevel_14,
IfxAsclin_TxFifoInterruptLevel_15
}
Defines the filling level that triggers a refill (TX) interrupt or DMA access
Definition in Ifx_ASCLIN.TXFIFOCON.B.INTLEVEL. More...

Detailed Description

Enumeration Type Documentation

◆ IfxAsclin_Checksum

enum IfxAsclin_Checksum

Defines if the classic or the enhanced checksum will be calculated by the checksum block.
Definition in Ifx_ASCLIN.DATCON.B.CSM.

Enumerator
IfxAsclin_Checksum_classic | classic checksum
IfxAsclin_Checksum_enhanced | enhanced checksum

Definition at line 81 of file IfxAsclin.h.

◆ IfxAsclin_ChecksumInjection

enum IfxAsclin_ChecksumInjection

Defines if the received checksum byte is written into the RXFifo or not.
Definition in Ifx_ASCLIN.LIN.CON.B.CSI.

Enumerator
IfxAsclin_ChecksumInjection_notWritten | checksum byte is not written
IfxAsclin_ChecksumInjection_written | checksum byte is written

Definition at line 90 of file IfxAsclin.h.

◆ IfxAsclin_ClockPolarity

enum IfxAsclin_ClockPolarity

CPOL defines the idle level of the clock signal in the SPI mode.
Idle level is the level outside the data transmission time intervals.
Definition in Ifx_ASCLIN.IOCR.B.CPOL.

Enumerator
IfxAsclin_ClockPolarity_idleLow | idle low
IfxAsclin_ClockPolarity_idleHigh | idle high

Definition at line 100 of file IfxAsclin.h.

◆ IfxAsclin_ClockSource

enum IfxAsclin_ClockSource

Selection of clock source
Definition in Ifx_ASCLIN.CSR.B.CLKSEL.

Enumerator
IfxAsclin_ClockSource_noClock | no clock will be supplied
IfxAsclin_ClockSource_ascFastClock | f asclinf wiil be supplied
IfxAsclin_ClockSource_ascSlowClock | f asclins will be supplied

Definition at line 109 of file IfxAsclin.h.

◆ IfxAsclin_CtsInputSelect

enum IfxAsclin_CtsInputSelect

CTS input pin selection
Definition in Ifx_ASCLIN.IOCR.B.CTS.

Enumerator
IfxAsclin_CtsInputSelect_0 | CTS input pin 0.
IfxAsclin_CtsInputSelect_1 | CTS input pin 1.
IfxAsclin_CtsInputSelect_2 | CTS input pin 2.
IfxAsclin_CtsInputSelect_3 | CTS input pin 3.

Definition at line 119 of file IfxAsclin.h.

◆ IfxAsclin_DataLength

enum IfxAsclin_DataLength

Number of bits per transfer
Definition in Ifx_ASCLIN.FRAMECON.B.DATALEN.

Enumerator
IfxAsclin_DataLength_1 | number of bits per transfer 0
IfxAsclin_DataLength_2 | number of bits per transfer 1
IfxAsclin_DataLength_3 | number of bits per transfer 2
IfxAsclin_DataLength_4 | number of bits per transfer 3
IfxAsclin_DataLength_5 | number of bits per transfer 4
IfxAsclin_DataLength_6 | number of bits per transfer 5
IfxAsclin_DataLength_7 | number of bits per transfer 6
IfxAsclin_DataLength_8 | number of bits per transfer 7
IfxAsclin_DataLength_9 | number of bits per transfer 8
IfxAsclin_DataLength_10 | number of bits per transfer 9
IfxAsclin_DataLength_11 | number of bits per transfer 10
IfxAsclin_DataLength_12 | number of bits per transfer 11
IfxAsclin_DataLength_13 | number of bits per transfer 12
IfxAsclin_DataLength_14 | number of bits per transfer 13
IfxAsclin_DataLength_15 | number of bits per transfer 14
IfxAsclin_DataLength_16 | number of bits per transfer 15

Definition at line 130 of file IfxAsclin.h.

◆ IfxAsclin_FifoInterruptMode

enum IfxAsclin_FifoInterruptMode

Defines the interrupt generation modes of Tx FIFO and Rx FIFO
Definition in Ifx_ASCLIN.RXFIFOCON.B.FM and Ifx_ASCLIN.TXFIFOCON.B.FM.

Enumerator
IfxAsclin_FifoInterruptMode_combined | Combined Move Mode.
IfxAsclin_FifoInterruptMode_single | Single Move Mode.
IfxAsclin_FifoInterruptMode_batch | Batch Move Mode.

Definition at line 153 of file IfxAsclin.h.

◆ IfxAsclin_FrameMode

enum IfxAsclin_FrameMode

Defines the basic operating mode of the module. Changing the mode must be done by switching first to initialize mode, and then to the other mode.
Definition in Ifx_ASCLIN.FRAMECON.B.MODE.

Enumerator
IfxAsclin_FrameMode_initialise | initialise mode
IfxAsclin_FrameMode_asc | asc mode
IfxAsclin_FrameMode_spi | spi mode
IfxAsclin_FrameMode_lin | lin mode

Definition at line 163 of file IfxAsclin.h.

◆ IfxAsclin_HeaderResponseSelect

enum IfxAsclin_HeaderResponseSelect

Defines if LIN frame shall consist of a header and response or of a header only.
Definition in Ifx_ASCLIN.DATCON.B.HO.

Enumerator
IfxAsclin_HeaderResponseSelect_headerAndResponse | header and response expected
IfxAsclin_HeaderResponseSelect_headerOnly | header only expected

Definition at line 174 of file IfxAsclin.h.

◆ IfxAsclin_IdleDelay

enum IfxAsclin_IdleDelay

Defines the duration of the IDLE delay in bit times.
SPI mode: this is the idle time between the frames.
ASC and LIN mode: this is the pause inserted between transmission of bytes.
Definition in Ifx_ASCLIN.FRAMECON.B.IDLE.

Enumerator
IfxAsclin_IdleDelay_0 | idle delay in 0 bit times
IfxAsclin_IdleDelay_1 | idle delay in 1 bit times
IfxAsclin_IdleDelay_2 | idle delay in 2 bit times
IfxAsclin_IdleDelay_3 | idle delay in 3 bit times
IfxAsclin_IdleDelay_4 | idle delay in 4 bit times
IfxAsclin_IdleDelay_5 | idle delay in 5 bit times
IfxAsclin_IdleDelay_6 | idle delay in 6 bit times
IfxAsclin_IdleDelay_7 | idle delay in 7 bit times

Definition at line 185 of file IfxAsclin.h.

◆ IfxAsclin_LeadDelay

enum IfxAsclin_LeadDelay

Defines the leading delay in bit times in SPI mode. ASC mode: not applicable.
LIN mode: delay between the end of the break and the start of the sync character.
Definition in Ifx_ASCLIN.FRAMECON.B.LEAD.

Enumerator
IfxAsclin_LeadDelay_0 | lead delay in 0 bit times
IfxAsclin_LeadDelay_1 | lead delay in 1 bit times
IfxAsclin_LeadDelay_2 | lead delay in 2 bit times
IfxAsclin_LeadDelay_3 | lead delay in 3 bit times
IfxAsclin_LeadDelay_4 | lead delay in 4 bit times
IfxAsclin_LeadDelay_5 | lead delay in 5 bit times
IfxAsclin_LeadDelay_6 | lead delay in 6 bit times
IfxAsclin_LeadDelay_7 | lead delay in 7 bit times

Definition at line 201 of file IfxAsclin.h.

◆ IfxAsclin_LinMode

enum IfxAsclin_LinMode

Configures if the module in LIN mode operates as master or slave
Definition in Ifx_ASCLIN.LIN.CON.B.MS.

Enumerator
IfxAsclin_LinMode_slave | operates in slave mode
IfxAsclin_LinMode_master | operates in master mode

Definition at line 216 of file IfxAsclin.h.

◆ IfxAsclin_LinResponseTimeoutMode

enum IfxAsclin_LinResponseTimeoutMode

Defines the timeout threshold of RESPOSE bit is for LIN response timeout or LIN frame timeout.
Definition in Ifx_ASCLIN.DATCON.B.RM.

Enumerator
IfxAsclin_LinResponseTimeoutMode_frameTimeout | timeout threshold is for frame
IfxAsclin_LinResponseTimeoutMode_responseTimeout | timeout threshold is for reponse

Definition at line 225 of file IfxAsclin.h.

◆ IfxAsclin_OversamplingFactor

enum IfxAsclin_OversamplingFactor

Defines the bit length in ticks in the range of 1 to 16. The lengths of 1 to 3 are not allowed
Definition in Ifx_ASCLIN.BITCON.B.OVERSAMPLING.

Enumerator
IfxAsclin_OversamplingFactor_4 | oversampling factor 4
IfxAsclin_OversamplingFactor_5 | oversampling factor 5
IfxAsclin_OversamplingFactor_6 | oversampling factor 6
IfxAsclin_OversamplingFactor_7 | oversampling factor 7
IfxAsclin_OversamplingFactor_8 | oversampling factor 8
IfxAsclin_OversamplingFactor_9 | oversampling factor 9
IfxAsclin_OversamplingFactor_10 | oversampling factor 10
IfxAsclin_OversamplingFactor_11 | oversampling factor 11
IfxAsclin_OversamplingFactor_12 | oversampling factor 12
IfxAsclin_OversamplingFactor_13 | oversampling factor 13
IfxAsclin_OversamplingFactor_14 | oversampling factor 14
IfxAsclin_OversamplingFactor_15 | oversampling factor 15
IfxAsclin_OversamplingFactor_16 | oversampling factor 16

Definition at line 234 of file IfxAsclin.h.

◆ IfxAsclin_ParityType

enum IfxAsclin_ParityType

Type of parity bit attached to data bits
Definition in Ifx_ASCLIN.FRAMECON.B.ODD.

Enumerator
IfxAsclin_ParityType_even | even parity
IfxAsclin_ParityType_odd | odd parity

Definition at line 254 of file IfxAsclin.h.

◆ IfxAsclin_ReceiveBufferMode

enum IfxAsclin_ReceiveBufferMode

Receive buffer mode
Definition in Ifx_ASCLIN.RXFIFOCON.B.BUF.

Enumerator
IfxAsclin_ReceiveBufferMode_rxFifo | RxFIFO mode.
IfxAsclin_ReceiveBufferMode_rxBuffer | single stage Rx buffer

Definition at line 263 of file IfxAsclin.h.

◆ IfxAsclin_RtsCtsPolarity

enum IfxAsclin_RtsCtsPolarity

Polarity of the RTS and CTS signals
Definition in Ifx_ASCLIN.IOCR.B.RCPOL.

Enumerator
IfxAsclin_RtsCtsPolarity_activeHigh | ready/clear are active-high
IfxAsclin_RtsCtsPolarity_activeLow | ready/clear are active-low

Definition at line 272 of file IfxAsclin.h.

◆ IfxAsclin_RxFifoInterruptLevel

enum IfxAsclin_RxFifoInterruptLevel

Defines the filling level that triggers a drain (RX) interrupt or DMA access
Definition in Ifx_ASCLIN.RXFIFOCON.B.INTLEVEL.

Enumerator
IfxAsclin_RxFifoInterruptLevel_1 | RX FIFO level 1.
IfxAsclin_RxFifoInterruptLevel_2 | RX FIFO level 2.
IfxAsclin_RxFifoInterruptLevel_3 | RX FIFO level 3.
IfxAsclin_RxFifoInterruptLevel_4 | RX FIFO level 4.
IfxAsclin_RxFifoInterruptLevel_5 | RX FIFO level 5.
IfxAsclin_RxFifoInterruptLevel_6 | RX FIFO level 6.
IfxAsclin_RxFifoInterruptLevel_7 | RX FIFO level 7.
IfxAsclin_RxFifoInterruptLevel_8 | RX FIFO level 8.
IfxAsclin_RxFifoInterruptLevel_9 | RX FIFO level 9.
IfxAsclin_RxFifoInterruptLevel_10 | RX FIFO level 10.
IfxAsclin_RxFifoInterruptLevel_11 | RX FIFO level 11.
IfxAsclin_RxFifoInterruptLevel_12 | RX FIFO level 12.
IfxAsclin_RxFifoInterruptLevel_13 | RX FIFO level 13.
IfxAsclin_RxFifoInterruptLevel_14 | RX FIFO level 14.
IfxAsclin_RxFifoInterruptLevel_15 | RX FIFO level 15.
IfxAsclin_RxFifoInterruptLevel_16 | RX FIFO level 16.

Definition at line 281 of file IfxAsclin.h.

◆ IfxAsclin_RxFifoOutletWidth

enum IfxAsclin_RxFifoOutletWidth

Defines the number of bytes read from the Rx FIFO with one FPI bus read
Definition in Ifx_ASCLIN.RXFIFOCON.B.OUTW.

Enumerator
IfxAsclin_RxFifoOutletWidth_0 | number of bytes 0
IfxAsclin_RxFifoOutletWidth_1 | number of bytes 1
IfxAsclin_RxFifoOutletWidth_2 | number of bytes 2
IfxAsclin_RxFifoOutletWidth_3 | number of bytes 3

Definition at line 304 of file IfxAsclin.h.

◆ IfxAsclin_RxInputSelect

enum IfxAsclin_RxInputSelect

Alternate input selection for Rx signal.
Definition in Ifx_ASCLIN.IOCR.B.ALTI.

Enumerator
IfxAsclin_RxInputSelect_0 | alternate input selection 0
IfxAsclin_RxInputSelect_1 | alternate input selection 1
IfxAsclin_RxInputSelect_2 | alternate input selection 2
IfxAsclin_RxInputSelect_3 | alternate input selection 3
IfxAsclin_RxInputSelect_4 | alternate input selection 4
IfxAsclin_RxInputSelect_5 | alternate input selection 5
IfxAsclin_RxInputSelect_6 | alternate input selection 6
IfxAsclin_RxInputSelect_7 | alternate input selection 7

Definition at line 315 of file IfxAsclin.h.

◆ IfxAsclin_SamplePointPosition

enum IfxAsclin_SamplePointPosition

Sample point position
Definition in Ifx_ASCLIN.BITCON.B.SAMPLEPOINT.

Enumerator
IfxAsclin_SamplePointPosition_1 | sample point position at 1
IfxAsclin_SamplePointPosition_2 | sample point position at 2
IfxAsclin_SamplePointPosition_3 | sample point position at 3
IfxAsclin_SamplePointPosition_4 | sample point position at 4
IfxAsclin_SamplePointPosition_5 | sample point position at 5
IfxAsclin_SamplePointPosition_6 | sample point position at 6
IfxAsclin_SamplePointPosition_7 | sample point position at 7
IfxAsclin_SamplePointPosition_8 | sample point position at 8
IfxAsclin_SamplePointPosition_9 | sample point position at 9
IfxAsclin_SamplePointPosition_10 | sample point position at 10
IfxAsclin_SamplePointPosition_11 | sample point position at 11
IfxAsclin_SamplePointPosition_12 | sample point position at 12
IfxAsclin_SamplePointPosition_13 | sample point position at 13
IfxAsclin_SamplePointPosition_14 | sample point position at 14
IfxAsclin_SamplePointPosition_15 | sample point position at 15

Definition at line 330 of file IfxAsclin.h.

◆ IfxAsclin_SamplesPerBit

enum IfxAsclin_SamplesPerBit

Number of samples per bit, sample mode/medianfilter
Definition in Ifx_ASCLIN.BITCON.B.SM.

Enumerator
IfxAsclin_SamplesPerBit_one | one sample per bit
IfxAsclin_SamplesPerBit_three | three samples per bit

Definition at line 352 of file IfxAsclin.h.

◆ IfxAsclin_ShiftDirection

enum IfxAsclin_ShiftDirection

SPI mode: defines the shift direction of the shift register.
ASC and LIN mode: should be set to 0.
Definition in Ifx_ASCLIN.FRAMECON.B.MSB.

Enumerator
IfxAsclin_ShiftDirection_lsbFirst | LSB first.
IfxAsclin_ShiftDirection_msbFirst | MSB first.

Definition at line 362 of file IfxAsclin.h.

◆ IfxAsclin_SlavePolarity

enum IfxAsclin_SlavePolarity

Defines the idle level of the SLSO signal, which is the level.
Outside the data transmission, leading and trailing time intervals.
Definition in Ifx_ASCLIN.IOCR.B.SPOL.

Enumerator
IfxAsclin_SlavePolarity_idleLow | idle low
IfxAsclin_SlavePolarity_idlehigh | idle high

Definition at line 372 of file IfxAsclin.h.

◆ IfxAsclin_SleepMode

enum IfxAsclin_SleepMode

Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_ASCLIN.CLC.B.EDIS.

Enumerator
IfxAsclin_SleepMode_enable | enables sleep mode
IfxAsclin_SleepMode_disable | disables sleep mode

Definition at line 381 of file IfxAsclin.h.

◆ IfxAsclin_Status

enum IfxAsclin_Status

Error status.

Enumerator
IfxAsclin_Status_configurationError | Configuration error.
IfxAsclin_Status_noError | No error.

Definition at line 389 of file IfxAsclin.h.

◆ IfxAsclin_StopBit

enum IfxAsclin_StopBit

ASC and LIN mode: number of stop bits (0 is not allowed), SPI mode: trailing delay.
Definition in Ifx_ASCLIN.FRAMECON.B.STOP.

Enumerator
IfxAsclin_StopBit_0 | number of stop bits 0
IfxAsclin_StopBit_1 | number of stop bits 1
IfxAsclin_StopBit_2 | number of stop bits 2
IfxAsclin_StopBit_3 | number of stop bits 3
IfxAsclin_StopBit_4 | number of stop bits 4
IfxAsclin_StopBit_5 | number of stop bits 5
IfxAsclin_StopBit_6 | number of stop bits 6
IfxAsclin_StopBit_7 | number of stop bits 7

Definition at line 398 of file IfxAsclin.h.

◆ IfxAsclin_SuspendMode

enum IfxAsclin_SuspendMode

OCDS Suspend Control (OCDS.SUS)

Enumerator
IfxAsclin_SuspendMode_none | No suspend.
IfxAsclin_SuspendMode_hard | Hard Suspend.
IfxAsclin_SuspendMode_soft | Soft Suspend.

Definition at line 412 of file IfxAsclin.h.

◆ IfxAsclin_TxFifoInletWidth

enum IfxAsclin_TxFifoInletWidth

Defines the number of bytes written to the Tx FIFO with one FPI bus write
Definition in Ifx_ASCLIN.TXFIFOCON.B.INW.

Enumerator
IfxAsclin_TxFifoInletWidth_0 | number of bytes 0
IfxAsclin_TxFifoInletWidth_1 | number of bytes 1
IfxAsclin_TxFifoInletWidth_2 | number of bytes 2
IfxAsclin_TxFifoInletWidth_3 | number of bytes 3

Definition at line 422 of file IfxAsclin.h.

◆ IfxAsclin_TxFifoInterruptLevel

enum IfxAsclin_TxFifoInterruptLevel

Defines the filling level that triggers a refill (TX) interrupt or DMA access
Definition in Ifx_ASCLIN.TXFIFOCON.B.INTLEVEL.

Enumerator
IfxAsclin_TxFifoInterruptLevel_0 | TX FIFO level 0.
IfxAsclin_TxFifoInterruptLevel_1 | TX FIFO level 1.
IfxAsclin_TxFifoInterruptLevel_2 | TX FIFO level 2.
IfxAsclin_TxFifoInterruptLevel_3 | TX FIFO level 3.
IfxAsclin_TxFifoInterruptLevel_4 | TX FIFO level 4.
IfxAsclin_TxFifoInterruptLevel_5 | TX FIFO level 5.
IfxAsclin_TxFifoInterruptLevel_6 | TX FIFO level 6.
IfxAsclin_TxFifoInterruptLevel_7 | TX FIFO level 7.
IfxAsclin_TxFifoInterruptLevel_8 | TX FIFO level 8.
IfxAsclin_TxFifoInterruptLevel_9 | TX FIFO level 9.
IfxAsclin_TxFifoInterruptLevel_10 | TX FIFO level 10.
IfxAsclin_TxFifoInterruptLevel_11 | TX FIFO level 11.
IfxAsclin_TxFifoInterruptLevel_12 | TX FIFO level 12.
IfxAsclin_TxFifoInterruptLevel_13 | TX FIFO level 13.
IfxAsclin_TxFifoInterruptLevel_14 | TX FIFO level 14.
IfxAsclin_TxFifoInterruptLevel_15 | TX FIFO level 15.

Definition at line 433 of file IfxAsclin.h.


iLLD_TC38A: Operative Functions

Functions
Operative Functions
iLLD » ASCLIN » Standard Driver
Collaboration diagram for Operative Functions:

Functions

IFX_INLINE void | IfxAsclin_clearAllFlags (Ifx_ASCLIN *asclin)
clears all the flags More...
IFX_INLINE void | IfxAsclin_clearBreakDetectedFlag (Ifx_ASCLIN *asclin)
Clears the break detected flag. More...
IFX_INLINE void | IfxAsclin_clearCollisionDetectionErrorFlag (Ifx_ASCLIN *asclin)
Clears the collision detection error flag. More...
IFX_INLINE void | IfxAsclin_clearFallingEdgeDetectedFlag (Ifx_ASCLIN *asclin)
Clears the falling edge detected flag. More...
IFX_INLINE void | IfxAsclin_clearFrameErrorFlag (Ifx_ASCLIN *asclin)
Clears the frame error flag. More...
IFX_INLINE void | IfxAsclin_clearHeaderTimeoutFlag (Ifx_ASCLIN *asclin)
Clears the header timeout flag. More...
IFX_INLINE void | IfxAsclin_clearKernelResetStatus (Ifx_ASCLIN *asclin)
Clears the kernel reset status. More...
IFX_INLINE void | IfxAsclin_clearLinAutoBaudDetectionErrorFlag (Ifx_ASCLIN *asclin)
Clears the auto baudrate detection error flag. More...
IFX_INLINE void | IfxAsclin_clearLinChecksumErrorFlag (Ifx_ASCLIN *asclin)
Clears the LIN checksum error flag. More...
IFX_INLINE void | IfxAsclin_clearLinParityErrorFlag (Ifx_ASCLIN *asclin)
Clears the LIN parity error flag. More...
IFX_INLINE void | IfxAsclin_clearParityErrorFlag (Ifx_ASCLIN *asclin)
Clears the parity error flag. More...
IFX_INLINE void | IfxAsclin_clearRaisingEdgeDetectedFlag (Ifx_ASCLIN *asclin)
Clears the raising edge detected flag. More...
IFX_INLINE void | IfxAsclin_clearResponseTimeoutFlag (Ifx_ASCLIN *asclin)
Clears the response timeout flag. More...
IFX_INLINE void | IfxAsclin_clearRxFifoFillLevelFlag (Ifx_ASCLIN *asclin)
Clears the Rx FIFO level flag. More...
IFX_INLINE void | IfxAsclin_clearRxFifoOverflowFlag (Ifx_ASCLIN *asclin)
Clears the Rx FIFO overflow flag. More...
IFX_INLINE void | IfxAsclin_clearRxFifoUnderflowFlag (Ifx_ASCLIN *asclin)
Clears the Rx FIFO underflow flag. More...
IFX_INLINE void | IfxAsclin_clearRxHeaderEndFlag (Ifx_ASCLIN *asclin)
Clears the receive header end flag. More...
IFX_INLINE void | IfxAsclin_clearRxResponseEndFlag (Ifx_ASCLIN *asclin)
Clears the receive response end flag. More...
IFX_INLINE void | IfxAsclin_clearTransmissionCompletedFlag (Ifx_ASCLIN *asclin)
Clears the transmission pending flag. More...
IFX_INLINE void | IfxAsclin_clearTxFifoFillLevelFlag (Ifx_ASCLIN *asclin)
Clears the Tx FIFO level flag. More...
IFX_INLINE void | IfxAsclin_clearTxFifoOverflowFlag (Ifx_ASCLIN *asclin)
Clears the Tx FIFO overflow flag. More...
IFX_INLINE void | IfxAsclin_clearTxHeaderEndFlag (Ifx_ASCLIN *asclin)
Clears the transmit header end flag. More...
IFX_INLINE void | IfxAsclin_clearTxResponseEndFlag (Ifx_ASCLIN *asclin)
Clears the transmit response end flag. More...
IFX_INLINE void | IfxAsclin_flushRxFifo (Ifx_ASCLIN *asclin)
Flushes (empties) the Rx FIFO. More...
IFX_INLINE void | IfxAsclin_flushTxFifo (Ifx_ASCLIN *asclin)
Flushes (empties) the Tx FIFO. More...
IFX_INLINE void | IfxAsclin_setBrdLowerlimt (Ifx_ASCLIN *asclin, uint8 limit)
Sets the baudrate detection's lower limit. More...
IFX_INLINE void | IfxAsclin_setBrdUpperlimt (Ifx_ASCLIN *asclin, uint8 limit)
Sets the baudrate detection's upper limit. More...
IFX_INLINE void | IfxAsclin_setChecksumInjection (Ifx_ASCLIN *asclin, IfxAsclin_ChecksumInjection csi)
Sets the checksum injection. More...
IFX_INLINE void | IfxAsclin_setChecksumMode (Ifx_ASCLIN *asclin, IfxAsclin_Checksum mode)
Sets the checksum mode. More...
IFX_INLINE void | IfxAsclin_setDataLength (Ifx_ASCLIN *asclin, IfxAsclin_DataLength length)
Sets the data length (number of bits per transfer) More...
IFX_INLINE void | IfxAsclin_setDenominator (Ifx_ASCLIN *asclin, uint16 denominator)
Sets the denominator of the fractional divider. More...
IFX_INLINE void | IfxAsclin_setDisableModuleRequest (Ifx_ASCLIN *asclin)
Sets the disable module request. More...
IFX_INLINE void | IfxAsclin_setEnableModuleRequest (Ifx_ASCLIN *asclin)
Sets the enable module request. More...
IFX_INLINE void | IfxAsclin_setFilterDepth (Ifx_ASCLIN *asclin, uint8 depth)
Sets digital glitch filter depth. More...
IFX_INLINE void | IfxAsclin_setHeaderResponseSelect (Ifx_ASCLIN *asclin, IfxAsclin_HeaderResponseSelect type)
Sets the header response selection. More...
IFX_INLINE void | IfxAsclin_setIdleDelay (Ifx_ASCLIN *asclin, IfxAsclin_IdleDelay delay)
Sets the idle delay. More...
IFX_INLINE void | IfxAsclin_setKernelResetOne (Ifx_ASCLIN *asclin)
Sets the kernal reset of the KRST1. More...
IFX_INLINE void | IfxAsclin_setKernelResetZero (Ifx_ASCLIN *asclin)
Sets the kernel reset of the KRST0. More...
IFX_INLINE void | IfxAsclin_setLeadDelay (Ifx_ASCLIN *asclin, IfxAsclin_LeadDelay delay)
Sets the lead delay. More...
IFX_INLINE void | IfxAsclin_setLinBreakLength (Ifx_ASCLIN *asclin, uint8 length)
Sets the LIN break length. More...
IFX_INLINE void | IfxAsclin_setLinHeaderTimeout (Ifx_ASCLIN *asclin, uint8 timeout)
Sets the LIN header timeout. More...
IFX_INLINE void | IfxAsclin_setLinMode (Ifx_ASCLIN *asclin, IfxAsclin_LinMode mode)
Sets the LIN mode of operation. More...
IFX_INLINE void | IfxAsclin_setLinResponseTimeoutMode (Ifx_ASCLIN *asclin, IfxAsclin_LinResponseTimeoutMode mode)
Sets the LIN response timeout mode. More...
IFX_INLINE void | IfxAsclin_setLinResponseTimeoutThreshold (Ifx_ASCLIN *asclin, uint16 threshold)
Sets the LIN response timeout threshold. More...
IFX_INLINE void | IfxAsclin_setNumerator (Ifx_ASCLIN *asclin, uint16 numerator)
Sets the numerator of the fractional divider. More...
IFX_INLINE void | IfxAsclin_setOversampling (Ifx_ASCLIN *asclin, IfxAsclin_OversamplingFactor ovsFactor)
Sets the division ratio of the baudrate post divider. More...
IFX_INLINE void | IfxAsclin_setParityType (Ifx_ASCLIN *asclin, IfxAsclin_ParityType type)
Sets the parity type. More...
IFX_INLINE void | IfxAsclin_setPrescaler (Ifx_ASCLIN *asclin, uint16 prescaler)
Sets the division ratio of the predivider (prescaler) More...
IFX_INLINE void | IfxAsclin_setRxBufferMode (Ifx_ASCLIN *asclin, IfxAsclin_ReceiveBufferMode mode)
Sets the receive buffer mode. More...
IFX_INLINE void | IfxAsclin_setRxFifoInterruptLevel (Ifx_ASCLIN *asclin, IfxAsclin_RxFifoInterruptLevel level)
Sets the Tx FIFO interrupt level. More...
IFX_INLINE void | IfxAsclin_setRxFifoOutletWidth (Ifx_ASCLIN *asclin, IfxAsclin_RxFifoOutletWidth width)
Sets the receive FIFO outlet width. More...
IFX_INLINE void | IfxAsclin_setSampleMode (Ifx_ASCLIN *asclin, IfxAsclin_SamplesPerBit medianFilter)
Sets the sample mode (number of samples per bit / median filter) More...
IFX_INLINE void | IfxAsclin_setSamplePointPosition (Ifx_ASCLIN *asclin, IfxAsclin_SamplePointPosition spPosition)
Sets the sampling point position. More...
IFX_INLINE void | IfxAsclin_setShiftDirection (Ifx_ASCLIN *asclin, IfxAsclin_ShiftDirection dir)
Sets the shift direction. More...
IFX_INLINE void | IfxAsclin_setStopBit (Ifx_ASCLIN *asclin, IfxAsclin_StopBit stopBit)
Sets the number of stop bits. More...
IFX_INLINE void | IfxAsclin_setTransmitHeaderRequestFlag (Ifx_ASCLIN *asclin)
Sets the transmit header request flag. More...
IFX_INLINE void | IfxAsclin_setTransmitResponseRequestFlag (Ifx_ASCLIN *asclin)
Sets the transmit response request flag. More...
IFX_INLINE void | IfxAsclin_setTransmitWakeRequestFlag (Ifx_ASCLIN *asclin)
Sets the transmission wake request flag. More...
IFX_INLINE void | IfxAsclin_setTxFifoInletWidth (Ifx_ASCLIN *asclin, IfxAsclin_TxFifoInletWidth width)
Sets the transmit FIFO inlet width. More...
IFX_INLINE void | IfxAsclin_setTxFifoInterruptLevel (Ifx_ASCLIN *asclin, IfxAsclin_TxFifoInterruptLevel level)
Sets the Tx FIFO interrupt level. More...

Detailed Description

Function Documentation

◆ IfxAsclin_clearAllFlags()

IFX_INLINE void IfxAsclin_clearAllFlags ( Ifx_ASCLIN * asclin )

clears all the flags

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1616 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_ignoreHeader(), IfxAsclin_Lin_initModule(), IfxAsclin_Lin_prepareHeaderReception(), IfxAsclin_Lin_prepareResponseReception(), IfxAsclin_Lin_sendFrame(), IfxAsclin_Lin_sendHeader(), IfxAsclin_Lin_sendResponse(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_clearBreakDetectedFlag()

IFX_INLINE void IfxAsclin_clearBreakDetectedFlag ( Ifx_ASCLIN * asclin )

Clears the break detected flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1622 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedResponseFlags(), IfxAsclin_Lin_checkForTransmittedResponseFlags(), and IfxAsclin_Lin_isrError().

◆ IfxAsclin_clearCollisionDetectionErrorFlag()

IFX_INLINE void IfxAsclin_clearCollisionDetectionErrorFlag ( Ifx_ASCLIN * asclin )

Clears the collision detection error flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1628 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedHeaderFlags(), IfxAsclin_Lin_checkForReceivedResponseFlags(), IfxAsclin_Lin_checkForTransmittedHeaderFlags(), IfxAsclin_Lin_checkForTransmittedResponseFlags(), and IfxAsclin_Lin_isrError().

◆ IfxAsclin_clearFallingEdgeDetectedFlag()

IFX_INLINE void IfxAsclin_clearFallingEdgeDetectedFlag ( Ifx_ASCLIN * asclin )

Clears the falling edge detected flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1634 of file IfxAsclin.h.

◆ IfxAsclin_clearFrameErrorFlag()

IFX_INLINE void IfxAsclin_clearFrameErrorFlag ( Ifx_ASCLIN * asclin )

Clears the frame error flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1640 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_isrError(), IfxAsclin_Lin_checkForReceivedHeaderFlags(), IfxAsclin_Lin_checkForReceivedResponseFlags(), IfxAsclin_Lin_checkForTransmittedHeaderFlags(), IfxAsclin_Lin_isrError(), and IfxAsclin_Spi_isrError().

◆ IfxAsclin_clearHeaderTimeoutFlag()

IFX_INLINE void IfxAsclin_clearHeaderTimeoutFlag ( Ifx_ASCLIN * asclin )

Clears the header timeout flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1646 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedHeaderFlags(), IfxAsclin_Lin_checkForTransmittedHeaderFlags(), and IfxAsclin_Lin_isrError().

◆ IfxAsclin_clearKernelResetStatus()

IFX_INLINE void IfxAsclin_clearKernelResetStatus ( Ifx_ASCLIN * asclin )

Clears the kernel reset status.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1652 of file IfxAsclin.h.

◆ IfxAsclin_clearLinAutoBaudDetectionErrorFlag()

IFX_INLINE void IfxAsclin_clearLinAutoBaudDetectionErrorFlag ( Ifx_ASCLIN * asclin )

Clears the auto baudrate detection error flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1658 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedHeaderFlags(), and IfxAsclin_Lin_isrError().

◆ IfxAsclin_clearLinChecksumErrorFlag()

IFX_INLINE void IfxAsclin_clearLinChecksumErrorFlag ( Ifx_ASCLIN * asclin )

Clears the LIN checksum error flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1664 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedResponseFlags(), and IfxAsclin_Lin_isrError().

◆ IfxAsclin_clearLinParityErrorFlag()

IFX_INLINE void IfxAsclin_clearLinParityErrorFlag ( Ifx_ASCLIN * asclin )

Clears the LIN parity error flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1670 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedHeaderFlags(), IfxAsclin_Lin_checkForTransmittedHeaderFlags(), and IfxAsclin_Lin_isrError().

◆ IfxAsclin_clearParityErrorFlag()

IFX_INLINE void IfxAsclin_clearParityErrorFlag ( Ifx_ASCLIN * asclin )

Clears the parity error flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1676 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_isrError().

◆ IfxAsclin_clearRaisingEdgeDetectedFlag()

IFX_INLINE void IfxAsclin_clearRaisingEdgeDetectedFlag ( Ifx_ASCLIN * asclin )

Clears the raising edge detected flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1682 of file IfxAsclin.h.

◆ IfxAsclin_clearResponseTimeoutFlag()

IFX_INLINE void IfxAsclin_clearResponseTimeoutFlag ( Ifx_ASCLIN * asclin )

Clears the response timeout flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1688 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedResponseFlags(), IfxAsclin_Lin_checkForTransmittedResponseFlags(), and IfxAsclin_Lin_isrError().

◆ IfxAsclin_clearRxFifoFillLevelFlag()

IFX_INLINE void IfxAsclin_clearRxFifoFillLevelFlag ( Ifx_ASCLIN * asclin )

Clears the Rx FIFO level flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1694 of file IfxAsclin.h.

Referenced by IfxAsclin_Spi_isrReceive().

◆ IfxAsclin_clearRxFifoOverflowFlag()

IFX_INLINE void IfxAsclin_clearRxFifoOverflowFlag ( Ifx_ASCLIN * asclin )

Clears the Rx FIFO overflow flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1700 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_isrError(), IfxAsclin_Lin_checkForReceivedResponseFlags(), IfxAsclin_Lin_isrError(), and IfxAsclin_Spi_isrError().

◆ IfxAsclin_clearRxFifoUnderflowFlag()

IFX_INLINE void IfxAsclin_clearRxFifoUnderflowFlag ( Ifx_ASCLIN * asclin )

Clears the Rx FIFO underflow flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1706 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_isrError(), and IfxAsclin_Spi_isrError().

◆ IfxAsclin_clearRxHeaderEndFlag()

IFX_INLINE void IfxAsclin_clearRxHeaderEndFlag ( Ifx_ASCLIN * asclin )

Clears the receive header end flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1712 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedHeaderFlags(), and IfxAsclin_Lin_isrReceive().

◆ IfxAsclin_clearRxResponseEndFlag()

IFX_INLINE void IfxAsclin_clearRxResponseEndFlag ( Ifx_ASCLIN * asclin )

Clears the receive response end flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1718 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedResponseFlags(), and IfxAsclin_Lin_isrReceive().

◆ IfxAsclin_clearTransmissionCompletedFlag()

IFX_INLINE void IfxAsclin_clearTransmissionCompletedFlag ( Ifx_ASCLIN * asclin )

Clears the transmission pending flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1724 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_isrError().

◆ IfxAsclin_clearTxFifoFillLevelFlag()

IFX_INLINE void IfxAsclin_clearTxFifoFillLevelFlag ( Ifx_ASCLIN * asclin )

Clears the Tx FIFO level flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1730 of file IfxAsclin.h.

Referenced by IfxAsclin_Spi_isrTransmit().

◆ IfxAsclin_clearTxFifoOverflowFlag()

IFX_INLINE void IfxAsclin_clearTxFifoOverflowFlag ( Ifx_ASCLIN * asclin )

Clears the Tx FIFO overflow flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1736 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_isrError(), IfxAsclin_Lin_checkForTransmittedResponseFlags(), IfxAsclin_Lin_isrError(), and IfxAsclin_Spi_isrError().

◆ IfxAsclin_clearTxHeaderEndFlag()

IFX_INLINE void IfxAsclin_clearTxHeaderEndFlag ( Ifx_ASCLIN * asclin )

Clears the transmit header end flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1742 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForTransmittedHeaderFlags(), and IfxAsclin_Lin_isrTransmit().

◆ IfxAsclin_clearTxResponseEndFlag()

IFX_INLINE void IfxAsclin_clearTxResponseEndFlag ( Ifx_ASCLIN * asclin )

Clears the transmit response end flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1748 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForTransmittedResponseFlags(), and IfxAsclin_Lin_isrTransmit().

◆ IfxAsclin_flushRxFifo()

IFX_INLINE void IfxAsclin_flushRxFifo ( Ifx_ASCLIN * asclin )

Flushes (empties) the Rx FIFO.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1934 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_clearRx(), IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), IfxAsclin_Lin_prepareHeaderReception(), IfxAsclin_Lin_prepareResponseReception(), IfxAsclin_Lin_sendHeader(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_flushTxFifo()

IFX_INLINE void IfxAsclin_flushTxFifo ( Ifx_ASCLIN * asclin )

Flushes (empties) the Tx FIFO.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1940 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_clearTx(), IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), IfxAsclin_Lin_sendHeader(), IfxAsclin_Lin_sendResponse(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_setBrdLowerlimt()

IFX_INLINE void IfxAsclin_setBrdLowerlimt | ( | Ifx_ASCLIN * | asclin,
 |  | uint8 | limit
 | ) |  |

Sets the baudrate detection's lower limit.

Parameters
asclin | pointer to ASCLIN registers
limit | value of the lower limit
Returns
None

Definition at line 2207 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_initModule().

◆ IfxAsclin_setBrdUpperlimt()

IFX_INLINE void IfxAsclin_setBrdUpperlimt | ( | Ifx_ASCLIN * | asclin,
 |  | uint8 | limit
 | ) |  |

Sets the baudrate detection's upper limit.

Parameters
asclin | pointer to ASCLIN registers
limit | value of the upper limit
Returns
None

Definition at line 2213 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_initModule().

◆ IfxAsclin_setChecksumInjection()

IFX_INLINE void IfxAsclin_setChecksumInjection | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_ChecksumInjection | csi
 | ) |  |

Sets the checksum injection.

Parameters
asclin | pointer to ASCLIN registers
csi | checksum injection selection (not written / written)
Returns
None

Definition at line 2219 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_initModule().

◆ IfxAsclin_setChecksumMode()

IFX_INLINE void IfxAsclin_setChecksumMode | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_Checksum | mode
 | ) |  |

Sets the checksum mode.

Parameters
asclin | pointer to ASCLIN registers
mode | checksum mode selection (classic / enhanced)
Returns
None

Definition at line 2225 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_initModule(), and IfxAsclin_Lin_sendFrame().

◆ IfxAsclin_setDataLength()

IFX_INLINE void IfxAsclin_setDataLength | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_DataLength | length
 | ) |  |

Sets the data length (number of bits per transfer)

Parameters
asclin | pointer to ASCLIN registers
length | data length selection
Returns
None

Definition at line 2243 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), IfxAsclin_Lin_prepareResponseReception(), IfxAsclin_Lin_sendFrame(), IfxAsclin_Lin_sendResponse(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_setDenominator()

IFX_INLINE void IfxAsclin_setDenominator | ( | Ifx_ASCLIN * | asclin,
 |  | uint16 | denominator
 | ) |  |

Sets the denominator of the fractional divider.

Parameters
asclin | pointer to ASCLIN registers
denominator | value of the denominator
Returns
None

Definition at line 2249 of file IfxAsclin.h.

Referenced by IfxAsclin_setBaudrateBitFields().

◆ IfxAsclin_setDisableModuleRequest()

IFX_INLINE void IfxAsclin_setDisableModuleRequest ( Ifx_ASCLIN * asclin )

Sets the disable module request.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 2255 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_disableModule(), IfxAsclin_disableModule(), IfxAsclin_Lin_disableModule(), and IfxAsclin_Spi_disableModule().

◆ IfxAsclin_setEnableModuleRequest()

IFX_INLINE void IfxAsclin_setEnableModuleRequest ( Ifx_ASCLIN * asclin )

Sets the enable module request.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 2261 of file IfxAsclin.h.

Referenced by IfxAsclin_enableModule().

◆ IfxAsclin_setFilterDepth()

IFX_INLINE void IfxAsclin_setFilterDepth | ( | Ifx_ASCLIN * | asclin,
 |  | uint8 | depth
 | ) |  |

Sets digital glitch filter depth.

Parameters
asclin | pointer to ASCLIN registers
depth | digital glitch filter depth selection (1 to 63)
Returns
None

Definition at line 2267 of file IfxAsclin.h.

◆ IfxAsclin_setHeaderResponseSelect()

IFX_INLINE void IfxAsclin_setHeaderResponseSelect | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_HeaderResponseSelect | type
 | ) |  |

Sets the header response selection.

Parameters
asclin | pointer to ASCLIN registers
type | type of selection (header and response or header only)
Returns
None

Definition at line 2279 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_ignoreHeader(), and IfxAsclin_Lin_initModule().

◆ IfxAsclin_setIdleDelay()

IFX_INLINE void IfxAsclin_setIdleDelay | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_IdleDelay | delay
 | ) |  |

Sets the idle delay.

Parameters
asclin | pointer to ASCLIN registers
delay | idle delay selection
Returns
None

Definition at line 2285 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_setKernelResetOne()

IFX_INLINE void IfxAsclin_setKernelResetOne ( Ifx_ASCLIN * asclin )

Sets the kernal reset of the KRST1.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 2291 of file IfxAsclin.h.

◆ IfxAsclin_setKernelResetZero()

IFX_INLINE void IfxAsclin_setKernelResetZero ( Ifx_ASCLIN * asclin )

Sets the kernel reset of the KRST0.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 2297 of file IfxAsclin.h.

◆ IfxAsclin_setLeadDelay()

IFX_INLINE void IfxAsclin_setLeadDelay | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_LeadDelay | delay
 | ) |  |

Sets the lead delay.

Parameters
asclin | pointer to ASCLIN registers
delay | lead delay selection
Returns
None

Definition at line 2303 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_setLinBreakLength()

IFX_INLINE void IfxAsclin_setLinBreakLength | ( | Ifx_ASCLIN * | asclin,
 |  | uint8 | length
 | ) |  |

Sets the LIN break length.

Parameters
asclin | pointer to ASCLIN registers
length | value of the break length
Returns
None

Definition at line 2309 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_initModule().

◆ IfxAsclin_setLinHeaderTimeout()

IFX_INLINE void IfxAsclin_setLinHeaderTimeout | ( | Ifx_ASCLIN * | asclin,
 |  | uint8 | timeout
 | ) |  |

Sets the LIN header timeout.

Parameters
asclin | pointer to ASCLIN registers
timeout | value of the header timeout
Returns
None

Definition at line 2315 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_initModule().

◆ IfxAsclin_setLinMode()

IFX_INLINE void IfxAsclin_setLinMode | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_LinMode | mode
 | ) |  |

Sets the LIN mode of operation.

Parameters
asclin | pointer to ASCLIN registers
mode | mode selection (slave / master)
Returns
None

Definition at line 2321 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_initModule().

◆ IfxAsclin_setLinResponseTimeoutMode()

IFX_INLINE void IfxAsclin_setLinResponseTimeoutMode | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_LinResponseTimeoutMode | mode
 | ) |  |

Sets the LIN response timeout mode.

Parameters
asclin | pointer to ASCLIN registers
mode | LIN response timeout mode selection
Returns
None

Definition at line 2327 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_initModule().

◆ IfxAsclin_setLinResponseTimeoutThreshold()

IFX_INLINE void IfxAsclin_setLinResponseTimeoutThreshold | ( | Ifx_ASCLIN * | asclin,
 |  | uint16 | threshold
 | ) |  |

Sets the LIN response timeout threshold.

Parameters
asclin | pointer to ASCLIN registers
threshold | value of the tomeout threshold (1 to 256 bit times)
Returns
None

Definition at line 2333 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_initModule().

◆ IfxAsclin_setNumerator()

IFX_INLINE void IfxAsclin_setNumerator | ( | Ifx_ASCLIN * | asclin,
 |  | uint16 | numerator
 | ) |  |

Sets the numerator of the fractional divider.

Parameters
asclin | pointer to ASCLIN registers
numerator | value of the numerator
Returns
None

Definition at line 2339 of file IfxAsclin.h.

Referenced by IfxAsclin_setBaudrateBitFields().

◆ IfxAsclin_setOversampling()

IFX_INLINE void IfxAsclin_setOversampling | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_OversamplingFactor | ovsFactor
 | ) |  |

Sets the division ratio of the baudrate post divider.

Parameters
asclin | pointer to ASCLIN registers
ovsFactor | value of oversampling factor
Returns
None

Definition at line 2345 of file IfxAsclin.h.

Referenced by IfxAsclin_setBaudrateBitFields().

◆ IfxAsclin_setParityType()

IFX_INLINE void IfxAsclin_setParityType | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_ParityType | type
 | ) |  |

Sets the parity type.

Parameters
asclin | pointer to ASCLIN registers
type | parity type selction (even / odd)
Returns
None

Definition at line 2351 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), and IfxAsclin_Lin_initModule().

◆ IfxAsclin_setPrescaler()

IFX_INLINE void IfxAsclin_setPrescaler | ( | Ifx_ASCLIN * | asclin,
 |  | uint16 | prescaler
 | ) |  |

Sets the division ratio of the predivider (prescaler)

Parameters
asclin | pointer to ASCLIN registers
prescaler | value of prescaler
Returns
None

Definition at line 2357 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), IfxAsclin_setBaudrateBitFields(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_setRxBufferMode()

IFX_INLINE void IfxAsclin_setRxBufferMode | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_ReceiveBufferMode | mode
 | ) |  |

Sets the receive buffer mode.

Parameters
asclin | pointer to ASCLIN registers
mode | receive buffer mode selection (Rx FIFO or single stage Rx buffer)
Returns
None

Definition at line 2369 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_setRxFifoInterruptLevel()

IFX_INLINE void IfxAsclin_setRxFifoInterruptLevel | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_RxFifoInterruptLevel | level
 | ) |  |

Sets the Tx FIFO interrupt level.

Parameters
asclin | pointer to ASCLIN registers
level | interrupt level selection
Returns
None

Definition at line 2375 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_setRxFifoOutletWidth()

IFX_INLINE void IfxAsclin_setRxFifoOutletWidth | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_RxFifoOutletWidth | width
 | ) |  |

Sets the receive FIFO outlet width.

Parameters
asclin | pointer to ASCLIN registers
width | number of bytes read to the Rx FIFO with one FPI bus read
Returns
None

Definition at line 2387 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_setSampleMode()

IFX_INLINE void IfxAsclin_setSampleMode | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_SamplesPerBit | medianFilter
 | ) |  |

Sets the sample mode (number of samples per bit / median filter)

Parameters
asclin | pointer to ASCLIN registers
medianFilter | value of the median filter
Returns
None

Definition at line 2399 of file IfxAsclin.h.

◆ IfxAsclin_setSamplePointPosition()

IFX_INLINE void IfxAsclin_setSamplePointPosition | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_SamplePointPosition | spPosition
 | ) |  |

Sets the sampling point position.

Parameters
asclin | pointer to ASCLIN registers
spPosition | sample point position selection
Returns
None

Definition at line 2405 of file IfxAsclin.h.

◆ IfxAsclin_setShiftDirection()

IFX_INLINE void IfxAsclin_setShiftDirection | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_ShiftDirection | dir
 | ) |  |

Sets the shift direction.

Parameters
asclin | pointer to ASCLIN registers
dir | shift direction selection (LSB / MSB first)
Returns
None

Definition at line 2411 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_setStopBit()

IFX_INLINE void IfxAsclin_setStopBit | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_StopBit | stopBit
 | ) |  |

Sets the number of stop bits.

Parameters
asclin | pointer to ASCLIN registers
stopBit | number of stop bits selection
Returns
None

Definition at line 2432 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_setTransmitHeaderRequestFlag()

IFX_INLINE void IfxAsclin_setTransmitHeaderRequestFlag ( Ifx_ASCLIN * asclin )

Sets the transmit header request flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 2449 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_sendHeader().

◆ IfxAsclin_setTransmitResponseRequestFlag()

IFX_INLINE void IfxAsclin_setTransmitResponseRequestFlag ( Ifx_ASCLIN * asclin )

Sets the transmit response request flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 2455 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_sendResponse().

◆ IfxAsclin_setTransmitWakeRequestFlag()

IFX_INLINE void IfxAsclin_setTransmitWakeRequestFlag ( Ifx_ASCLIN * asclin )

Sets the transmission wake request flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 2461 of file IfxAsclin.h.

◆ IfxAsclin_setTxFifoInletWidth()

IFX_INLINE void IfxAsclin_setTxFifoInletWidth | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_TxFifoInletWidth | width
 | ) |  |

Sets the transmit FIFO inlet width.

Parameters
asclin | pointer to ASCLIN registers
width | number of bytes written to the Tx FIFO with one FPI bus write
Returns
None

Definition at line 2467 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_setTxFifoInterruptLevel()

IFX_INLINE void IfxAsclin_setTxFifoInterruptLevel | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_TxFifoInterruptLevel | level
 | ) |  |

Sets the Tx FIFO interrupt level.

Parameters
asclin | pointer to ASCLIN registers
level | interrupt level selection
Returns
None

Definition at line 2473 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), and IfxAsclin_Spi_initModule().


iLLD_TC38A: Utility Functions

Functions
Utility Functions
iLLD » ASCLIN » Standard Driver
Collaboration diagram for Utility Functions:

Functions

IFX_INLINE boolean | IfxAsclin_getBreakDetectedFlagStatus (Ifx_ASCLIN *asclin)
Returns the break detected flag status. More...
IFX_INLINE uint8 | IfxAsclin_getClockSource (Ifx_ASCLIN *asclin)
Returns the clock source. More...
IFX_INLINE boolean | IfxAsclin_getClockStatus (Ifx_ASCLIN *asclin)
Returns the clock status. More...
IFX_INLINE boolean | IfxAsclin_getCollisionDetectionErrorFlagStatus (Ifx_ASCLIN *asclin)
Returns the collision detection error flag status. More...
IFX_INLINE boolean | IfxAsclin_getFallingEdgeDetectedFlagStatus (Ifx_ASCLIN *asclin)
Returns the falling edge detected flag status. More...
IFX_INLINE boolean | IfxAsclin_getFrameErrorFlagStatus (Ifx_ASCLIN *asclin)
Returns the frame error flag status. More...
IFX_INLINE boolean | IfxAsclin_getHeaderTimeoutFlagStatus (Ifx_ASCLIN *asclin)
Returns the header timeout flag status. More...
IFX_INLINE boolean | IfxAsclin_getKernelResetStatus (Ifx_ASCLIN *asclin)
Returns the kernel reset status. More...
IFX_INLINE boolean | IfxAsclin_getLinAutoBaudDetectionErrorFlagStatus (Ifx_ASCLIN *asclin)
Returns the LIN auto baudrate detection error flag status. More...
IFX_INLINE boolean | IfxAsclin_getLinChecksumErrorFlagStatus (Ifx_ASCLIN *asclin)
Returns the LIN checksum error flag status. More...
IFX_INLINE boolean | IfxAsclin_getLinParityErrorFlagStatus (Ifx_ASCLIN *asclin)
Returns the LIN parity error flag status. More...
IFX_INLINE boolean | IfxAsclin_getModuleStatus (Ifx_ASCLIN *asclin)
Returns the module status. More...
IFX_INLINE boolean | IfxAsclin_getParityErrorFlagStatus (Ifx_ASCLIN *asclin)
Returns the parity error flag status. More...
IFX_INLINE uint16 | IfxAsclin_getPrescaler (Ifx_ASCLIN *asclin)
Returns the division ratio of the predivider (prescaler) More...
IFX_INLINE boolean | IfxAsclin_getRaisingEdgeDetectedFlagStatus (Ifx_ASCLIN *asclin)
Returns the raising edge detected flag status. More...
IFX_INLINE boolean | IfxAsclin_getReceiveSignalStatus (Ifx_ASCLIN *asclin)
Returns the received signal status. More...
IFX_INLINE boolean | IfxAsclin_getResponseTimeoutFlagStatus (Ifx_ASCLIN *asclin)
Returns the response timeout flag status. More...
IFX_INLINE uint8 | IfxAsclin_getRxFifoFillLevel (Ifx_ASCLIN *asclin)
Returns the current filling level of Tx FIFO. More...
IFX_INLINE boolean | IfxAsclin_getRxFifoFillLevelFlagStatus (Ifx_ASCLIN *asclin)
Returns the Rx FIFO level flag status. More...
IFX_INLINE uint8 | IfxAsclin_getRxFifoOutletWidth (Ifx_ASCLIN *asclin)
Returns the receive FIFO inlet width. More...
IFX_INLINE boolean | IfxAsclin_getRxFifoOverflowFlagStatus (Ifx_ASCLIN *asclin)
Returns the Rx FIFO overflow flag status. More...
IFX_INLINE boolean | IfxAsclin_getRxFifoUnderflowFlagStatus (Ifx_ASCLIN *asclin)
Returns the Rx FIFO underflow flag status. More...
IFX_INLINE boolean | IfxAsclin_getRxHeaderEndFlagStatus (Ifx_ASCLIN *asclin)
Returns the receive header end flag status. More...
IFX_INLINE boolean | IfxAsclin_getRxResponseEndFlagStatus (Ifx_ASCLIN *asclin)
Returns the receive response end flag status. More...
IFX_INLINE boolean | IfxAsclin_getTransmissionCompletedFlagStatus (Ifx_ASCLIN *asclin)
Returns the transmission pending flag status. More...
IFX_INLINE boolean | IfxAsclin_getTransmitSignalStatus (Ifx_ASCLIN *asclin)
Returns the transmit signal status. More...
IFX_INLINE uint8 | IfxAsclin_getTxFifoFillLevel (Ifx_ASCLIN *asclin)
Returns the current filling level of Tx FIFO. More...
IFX_INLINE boolean | IfxAsclin_getTxFifoFillLevelFlagStatus (Ifx_ASCLIN *asclin)
Returns the Tx FIFO level flag status. More...
IFX_INLINE uint8 | IfxAsclin_getTxFifoInletWidth (Ifx_ASCLIN *asclin)
Returns the transmit FIFO inlet width. More...
IFX_INLINE boolean | IfxAsclin_getTxFifoOverflowFlagStatus (Ifx_ASCLIN *asclin)
Returns the Tx FIFO overflow flag status. More...
IFX_INLINE boolean | IfxAsclin_getTxHeaderEndFlagStatus (Ifx_ASCLIN *asclin)
Returns the transmit header end flag status. More...
IFX_INLINE boolean | IfxAsclin_getTxResponseEndFlagStatus (Ifx_ASCLIN *asclin)
Returns the transmit response end flag status. More...
IFX_INLINE void | IfxAsclin_setSleepMode (Ifx_ASCLIN *asclin, IfxAsclin_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_EXTERN Ifx_ASCLIN * | IfxAsclin_getAddress (IfxAsclin_Index asclin)
API to get the address for ASCLIN HW module register memory map. More...
IFX_EXTERN float32 | IfxAsclin_getFaFrequency (Ifx_ASCLIN *asclin)
Returns the ASCLIN module FA frequency in Hz. More...
IFX_EXTERN IfxAsclin_Index | IfxAsclin_getIndex (Ifx_ASCLIN *asclin)
API to get the resource index of the ASCLIN specified. More...
IFX_EXTERN float32 | IfxAsclin_getOvsFrequency (Ifx_ASCLIN *asclin)
Returns the OVS frequency. More...
IFX_EXTERN float32 | IfxAsclin_getPdFrequency (Ifx_ASCLIN *asclin)
Returns the PD frequency. More...
IFX_EXTERN float32 | IfxAsclin_getShiftFrequency (Ifx_ASCLIN *asclin)
Returns the SHIFT frequency. More...
IFX_EXTERN void | IfxAsclin_resetModule (Ifx_ASCLIN *asclin)
resets Asclin kernel More...

Detailed Description

Function Documentation

◆ IfxAsclin_getAddress()

IFX_EXTERN Ifx_ASCLIN* IfxAsclin_getAddress ( IfxAsclin_Index asclin )

API to get the address for ASCLIN HW module register memory map.

Parameters
asclin Resource index of the ASCLIN
Returns
ASCLIN module register address

Definition at line 79 of file IfxAsclin.c.

◆ IfxAsclin_getBreakDetectedFlagStatus()

IFX_INLINE boolean IfxAsclin_getBreakDetectedFlagStatus ( Ifx_ASCLIN * asclin )

Returns the break detected flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
break detected flag status

Definition at line 1946 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedResponseFlags(), IfxAsclin_Lin_checkForTransmittedResponseFlags(), and IfxAsclin_Lin_isrError().

◆ IfxAsclin_getClockSource()

IFX_INLINE uint8 IfxAsclin_getClockSource ( Ifx_ASCLIN * asclin )

Returns the clock source.

Parameters
asclin pointer to ASCLIN registers
Returns
clock source

Definition at line 1952 of file IfxAsclin.h.

Referenced by IfxAsclin_getFaFrequency(), IfxAsclin_setBaudrateBitFields(), and IfxAsclin_setBitTiming().

◆ IfxAsclin_getClockStatus()

IFX_INLINE boolean IfxAsclin_getClockStatus ( Ifx_ASCLIN * asclin )

Returns the clock status.

Parameters
asclin pointer to ASCLIN registers
Returns
clock status (off / on)

Definition at line 1958 of file IfxAsclin.h.

Referenced by IfxAsclin_setClockSource().

◆ IfxAsclin_getCollisionDetectionErrorFlagStatus()

IFX_INLINE boolean IfxAsclin_getCollisionDetectionErrorFlagStatus ( Ifx_ASCLIN * asclin )

Returns the collision detection error flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
collision detection error flag status

Definition at line 1964 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedHeaderFlags(), IfxAsclin_Lin_checkForReceivedResponseFlags(), IfxAsclin_Lin_checkForTransmittedHeaderFlags(), IfxAsclin_Lin_checkForTransmittedResponseFlags(), and IfxAsclin_Lin_isrError().

◆ IfxAsclin_getFaFrequency()

IFX_EXTERN float32 IfxAsclin_getFaFrequency ( Ifx_ASCLIN * asclin )

Returns the ASCLIN module FA frequency in Hz.

Parameters
asclin pointer to ASCLIN registers
Returns
Returns the ASCLIN module FA frequency in Hz

Definition at line 96 of file IfxAsclin.c.

Referenced by IfxAsclin_getPdFrequency().

◆ IfxAsclin_getFallingEdgeDetectedFlagStatus()

IFX_INLINE boolean IfxAsclin_getFallingEdgeDetectedFlagStatus ( Ifx_ASCLIN * asclin )

Returns the falling edge detected flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
falling edge detected flag status

Definition at line 1970 of file IfxAsclin.h.

◆ IfxAsclin_getFrameErrorFlagStatus()

IFX_INLINE boolean IfxAsclin_getFrameErrorFlagStatus ( Ifx_ASCLIN * asclin )

Returns the frame error flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
frame error flag status

Definition at line 1976 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_isrError(), IfxAsclin_Lin_checkForReceivedHeaderFlags(), IfxAsclin_Lin_checkForReceivedResponseFlags(), IfxAsclin_Lin_checkForTransmittedHeaderFlags(), IfxAsclin_Lin_isrError(), and IfxAsclin_Spi_isrError().

◆ IfxAsclin_getHeaderTimeoutFlagStatus()

IFX_INLINE boolean IfxAsclin_getHeaderTimeoutFlagStatus ( Ifx_ASCLIN * asclin )

Returns the header timeout flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
header timeout flag status

Definition at line 1982 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedHeaderFlags(), IfxAsclin_Lin_checkForTransmittedHeaderFlags(), and IfxAsclin_Lin_isrError().

◆ IfxAsclin_getIndex()

IFX_EXTERN IfxAsclin_Index IfxAsclin_getIndex ( Ifx_ASCLIN * asclin )

API to get the resource index of the ASCLIN specified.

Returns
asclin resource index

Definition at line 121 of file IfxAsclin.c.

Referenced by IfxAsclin_getSrcPointerEr(), IfxAsclin_getSrcPointerRx(), and IfxAsclin_getSrcPointerTx().

◆ IfxAsclin_getKernelResetStatus()

IFX_INLINE boolean IfxAsclin_getKernelResetStatus ( Ifx_ASCLIN * asclin )

Returns the kernel reset status.

Parameters
asclin pointer to ASCLIN registers
Returns
kernel reset status

Definition at line 1988 of file IfxAsclin.h.

◆ IfxAsclin_getLinAutoBaudDetectionErrorFlagStatus()

IFX_INLINE boolean IfxAsclin_getLinAutoBaudDetectionErrorFlagStatus ( Ifx_ASCLIN * asclin )

Returns the LIN auto baudrate detection error flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
LIN auto baudrate detection error flag status

Definition at line 1994 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedHeaderFlags(), and IfxAsclin_Lin_isrError().

◆ IfxAsclin_getLinChecksumErrorFlagStatus()

IFX_INLINE boolean IfxAsclin_getLinChecksumErrorFlagStatus ( Ifx_ASCLIN * asclin )

Returns the LIN checksum error flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
LIN checksum error flag status

Definition at line 2000 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedResponseFlags(), and IfxAsclin_Lin_isrError().

◆ IfxAsclin_getLinParityErrorFlagStatus()

IFX_INLINE boolean IfxAsclin_getLinParityErrorFlagStatus ( Ifx_ASCLIN * asclin )

Returns the LIN parity error flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
LIN parity error flag status

Definition at line 2006 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedHeaderFlags(), IfxAsclin_Lin_checkForTransmittedHeaderFlags(), and IfxAsclin_Lin_isrError().

◆ IfxAsclin_getModuleStatus()

IFX_INLINE boolean IfxAsclin_getModuleStatus ( Ifx_ASCLIN * asclin )

Returns the module status.

Parameters
asclin pointer to ASCLIN registers
Returns
module status (enabled / disabled)

Definition at line 2012 of file IfxAsclin.h.

◆ IfxAsclin_getOvsFrequency()

IFX_EXTERN float32 IfxAsclin_getOvsFrequency ( Ifx_ASCLIN * asclin )

Returns the OVS frequency.

Parameters
asclin pointer to ASCLIN registers
Returns
Returns the ASCLIN module OVS frequency in Hz

Definition at line 141 of file IfxAsclin.c.

Referenced by IfxAsclin_getShiftFrequency().

◆ IfxAsclin_getParityErrorFlagStatus()

IFX_INLINE boolean IfxAsclin_getParityErrorFlagStatus ( Ifx_ASCLIN * asclin )

Returns the parity error flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
parity error flag status

Definition at line 2018 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_isrError().

◆ IfxAsclin_getPdFrequency()

IFX_EXTERN float32 IfxAsclin_getPdFrequency ( Ifx_ASCLIN * asclin )

Returns the PD frequency.

Parameters
asclin pointer to ASCLIN registers
Returns
Returns the ASCLIN module PD frequency in Hz

Definition at line 147 of file IfxAsclin.c.

Referenced by IfxAsclin_getOvsFrequency(), and IfxAsclin_setBitTiming().

◆ IfxAsclin_getPrescaler()

IFX_INLINE uint16 IfxAsclin_getPrescaler ( Ifx_ASCLIN * asclin )

Returns the division ratio of the predivider (prescaler)

Parameters
asclin pointer to ASCLIN registers
Returns
value of prescaler

Definition at line 2024 of file IfxAsclin.h.

◆ IfxAsclin_getRaisingEdgeDetectedFlagStatus()

IFX_INLINE boolean IfxAsclin_getRaisingEdgeDetectedFlagStatus ( Ifx_ASCLIN * asclin )

Returns the raising edge detected flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
raising edge detected flag status

Definition at line 2030 of file IfxAsclin.h.

◆ IfxAsclin_getReceiveSignalStatus()

IFX_INLINE boolean IfxAsclin_getReceiveSignalStatus ( Ifx_ASCLIN * asclin )

Returns the received signal status.

Parameters
asclin pointer to ASCLIN registers
Returns
received signal status (0 is low & 1 is high)

Definition at line 2036 of file IfxAsclin.h.

◆ IfxAsclin_getResponseTimeoutFlagStatus()

IFX_INLINE boolean IfxAsclin_getResponseTimeoutFlagStatus ( Ifx_ASCLIN * asclin )

Returns the response timeout flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
response timeout flag status

Definition at line 2042 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedResponseFlags(), IfxAsclin_Lin_checkForTransmittedResponseFlags(), and IfxAsclin_Lin_isrError().

◆ IfxAsclin_getRxFifoFillLevel()

IFX_INLINE uint8 IfxAsclin_getRxFifoFillLevel ( Ifx_ASCLIN * asclin )

Returns the current filling level of Tx FIFO.

Parameters
asclin pointer to ASCLIN registers
Returns
current filling level of Rx FIFO

Definition at line 2048 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_isrReceive(), and IfxAsclin_Spi_read().

◆ IfxAsclin_getRxFifoFillLevelFlagStatus()

IFX_INLINE boolean IfxAsclin_getRxFifoFillLevelFlagStatus ( Ifx_ASCLIN * asclin )

Returns the Rx FIFO level flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
Rx FIFO level flag status

Definition at line 2054 of file IfxAsclin.h.

◆ IfxAsclin_getRxFifoOutletWidth()

IFX_INLINE uint8 IfxAsclin_getRxFifoOutletWidth ( Ifx_ASCLIN * asclin )

Returns the receive FIFO inlet width.

Parameters
asclin pointer to ASCLIN registers
Returns
number of bytes read to the Rx FIFO with one FPI bus read

Definition at line 2060 of file IfxAsclin.h.

◆ IfxAsclin_getRxFifoOverflowFlagStatus()

IFX_INLINE boolean IfxAsclin_getRxFifoOverflowFlagStatus ( Ifx_ASCLIN * asclin )

Returns the Rx FIFO overflow flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
Rx FIFO overflow flag status

Definition at line 2066 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_isrError(), IfxAsclin_Lin_checkForReceivedResponseFlags(), IfxAsclin_Lin_isrError(), and IfxAsclin_Spi_isrError().

◆ IfxAsclin_getRxFifoUnderflowFlagStatus()

IFX_INLINE boolean IfxAsclin_getRxFifoUnderflowFlagStatus ( Ifx_ASCLIN * asclin )

Returns the Rx FIFO underflow flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
Rx FIFO underflow flag status

Definition at line 2072 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_isrError(), and IfxAsclin_Spi_isrError().

◆ IfxAsclin_getRxHeaderEndFlagStatus()

IFX_INLINE boolean IfxAsclin_getRxHeaderEndFlagStatus ( Ifx_ASCLIN * asclin )

Returns the receive header end flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
receive header end flag status

Definition at line 2078 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedHeaderFlags(), and IfxAsclin_Lin_isrReceive().

◆ IfxAsclin_getRxResponseEndFlagStatus()

IFX_INLINE boolean IfxAsclin_getRxResponseEndFlagStatus ( Ifx_ASCLIN * asclin )

Returns the receive response end flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
receive response end flag status

Definition at line 2084 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedResponseFlags(), and IfxAsclin_Lin_isrReceive().

◆ IfxAsclin_getShiftFrequency()

IFX_EXTERN float32 IfxAsclin_getShiftFrequency ( Ifx_ASCLIN * asclin )

Returns the SHIFT frequency.

Parameters
asclin pointer to ASCLIN registers
Returns
Returns the ASCLIN module SHIFT frequency in Hz

Definition at line 153 of file IfxAsclin.c.

◆ IfxAsclin_getTransmissionCompletedFlagStatus()

IFX_INLINE boolean IfxAsclin_getTransmissionCompletedFlagStatus ( Ifx_ASCLIN * asclin )

Returns the transmission pending flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
transmission pending flag status

Definition at line 2090 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_isrError().

◆ IfxAsclin_getTransmitSignalStatus()

IFX_INLINE boolean IfxAsclin_getTransmitSignalStatus ( Ifx_ASCLIN * asclin )

Returns the transmit signal status.

Parameters
asclin pointer to ASCLIN registers
Returns
transmit signal status (0 is low & 1 is high)

Definition at line 2096 of file IfxAsclin.h.

◆ IfxAsclin_getTxFifoFillLevel()

IFX_INLINE uint8 IfxAsclin_getTxFifoFillLevel ( Ifx_ASCLIN * asclin )

Returns the current filling level of Tx FIFO.

Parameters
asclin pointer to ASCLIN registers
Returns
current filling level of Tx FIFO

Definition at line 2102 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_flushTx(), IfxAsclin_Asc_isrTransmit(), and IfxAsclin_Spi_write().

◆ IfxAsclin_getTxFifoFillLevelFlagStatus()

IFX_INLINE boolean IfxAsclin_getTxFifoFillLevelFlagStatus ( Ifx_ASCLIN * asclin )

Returns the Tx FIFO level flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
Tx FIFO level flag status

Definition at line 2108 of file IfxAsclin.h.

◆ IfxAsclin_getTxFifoInletWidth()

IFX_INLINE uint8 IfxAsclin_getTxFifoInletWidth ( Ifx_ASCLIN * asclin )

Returns the transmit FIFO inlet width.

Parameters
asclin pointer to ASCLIN registers
Returns
number of bytes written to the Tx FIFO with one FPI bus write

Definition at line 2114 of file IfxAsclin.h.

◆ IfxAsclin_getTxFifoOverflowFlagStatus()

IFX_INLINE boolean IfxAsclin_getTxFifoOverflowFlagStatus ( Ifx_ASCLIN * asclin )

Returns the Tx FIFO overflow flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
Tx FIFO overflow flag status

Definition at line 2120 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_isrError(), IfxAsclin_Lin_checkForTransmittedResponseFlags(), IfxAsclin_Lin_isrError(), and IfxAsclin_Spi_isrError().

◆ IfxAsclin_getTxHeaderEndFlagStatus()

IFX_INLINE boolean IfxAsclin_getTxHeaderEndFlagStatus ( Ifx_ASCLIN * asclin )

Returns the transmit header end flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
transmit header end flag status

Definition at line 2126 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForTransmittedHeaderFlags(), and IfxAsclin_Lin_isrTransmit().

◆ IfxAsclin_getTxResponseEndFlagStatus()

IFX_INLINE boolean IfxAsclin_getTxResponseEndFlagStatus ( Ifx_ASCLIN * asclin )

Returns the transmit response end flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
transmit response end flag status

Definition at line 2132 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForTransmittedResponseFlags(), and IfxAsclin_Lin_isrTransmit().

◆ IfxAsclin_resetModule()

IFX_EXTERN void IfxAsclin_resetModule ( Ifx_ASCLIN * asclin )

resets Asclin kernel

Parameters
asclin pointer to ASCLIN resgisters
Returns
None

Definition at line 300 of file IfxAsclin.c.

◆ IfxAsclin_setSleepMode()

IFX_INLINE void IfxAsclin_setSleepMode | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_SleepMode | mode
 | ) |  |

Sets the sensitivity of the module to sleep signal.

Parameters
asclin | pointer to ASCLIN registers
mode | mode selection (enable / disable)
Returns
None

Definition at line 2423 of file IfxAsclin.h.


iLLD_TC38A: Configuration Functions

Functions
Configuration Functions
iLLD » ASCLIN » Standard Driver
Collaboration diagram for Configuration Functions:

Functions

IFX_INLINE void | IfxAsclin_disableAllFlags (Ifx_ASCLIN *asclin)
disables all flags More...
IFX_INLINE void | IfxAsclin_enableAutoBaudrateDetection (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the auto baudrate detection. More...
IFX_INLINE void | IfxAsclin_enableBreakDetectedFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables break detected flag. More...
IFX_INLINE void | IfxAsclin_enableCollisionDetection (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the collision detection. More...
IFX_INLINE void | IfxAsclin_enableCollisionDetectionErrorFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables LIN collision detection error flag. More...
IFX_INLINE void | IfxAsclin_enableCts (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables CTS. More...
IFX_INLINE void | IfxAsclin_enableFallingEdgeDetectedFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables falling edge detected flag. More...
IFX_INLINE void | IfxAsclin_enableFrameErrorFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables frame error flag. More...
IFX_INLINE void | IfxAsclin_enableHardwareChecksum (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the hardware checksum. More...
IFX_INLINE void | IfxAsclin_enableHeaderTimeoutFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables header timeout flag. More...
IFX_INLINE void | IfxAsclin_enableLinAutoBaudDetectionErrorFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables LIN auto baudrate detection error flag. More...
IFX_INLINE void | IfxAsclin_enableLinChecksumErrorFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables LIN checksum error flag. More...
IFX_INLINE void | IfxAsclin_enableLinParityErrorFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables LIN parity error flag. More...
IFX_INLINE void | IfxAsclin_enableLoopBackMode (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the loop back mode. More...
IFX_INLINE void | IfxAsclin_enableParity (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the parity bit attachment to tha data bits. More...
IFX_INLINE void | IfxAsclin_enableParityErrorFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables parity error flag. More...
IFX_INLINE void | IfxAsclin_enableRaisingEdgeDetectedFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables raising edge detected flag. More...
IFX_INLINE void | IfxAsclin_enableResponseTimeoutFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables response timeout flag. More...
IFX_INLINE void | IfxAsclin_enableRxFifoFillLevelFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Rx FIFO level flag. More...
IFX_INLINE void | IfxAsclin_enableRxFifoInlet (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the receive FIFO outlet to allow filling of Rx FIFO through shift register. More...
IFX_INLINE void | IfxAsclin_enableRxFifoOverflowFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Rx FIFO overflow flag. More...
IFX_INLINE void | IfxAsclin_enableRxFifoUnderflowFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Rx FIFO underflow flag. More...
IFX_INLINE void | IfxAsclin_enableRxHeaderEndFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables receive header end flag. More...
IFX_INLINE void | IfxAsclin_enableRxResponseEndFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables receive response end flag. More...
IFX_INLINE void | IfxAsclin_enableTransmissionCompletedFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables transmission completed flag. More...
IFX_INLINE void | IfxAsclin_enableTxFifoFillLevelFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Tx FIFO level flag. More...
IFX_INLINE void | IfxAsclin_enableTxFifoOutlet (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the transmit FIFO outlet to allow transmission. More...
IFX_INLINE void | IfxAsclin_enableTxFifoOverflowFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Tx FIFO overflow flag. More...
IFX_INLINE void | IfxAsclin_enableTxHeaderEndFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables transmit header end flag. More...
IFX_INLINE void | IfxAsclin_enableTxResponseEndFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables transmit response end flag. More...
IFX_INLINE boolean | IfxAsclin_isModuleSuspended (Ifx_ASCLIN *asclin)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxAsclin_setClockPolarity (Ifx_ASCLIN *asclin, IfxAsclin_ClockPolarity cpol)
Selects the clock polarity. More...
IFX_INLINE void | IfxAsclin_setCtsInput (Ifx_ASCLIN *asclin, IfxAsclin_CtsInputSelect ctsi)
Selects the CTS input pin. More...
IFX_INLINE void | IfxAsclin_setFrameMode (Ifx_ASCLIN *asclin, IfxAsclin_FrameMode mode)
Selects the module's mode of operation. More...
IFX_INLINE void | IfxAsclin_setRtsCtsPolarity (Ifx_ASCLIN *asclin, IfxAsclin_RtsCtsPolarity rcpol)
Selects the RTS/CTS polarity. More...
IFX_INLINE void | IfxAsclin_setRxFifoInterruptMode (Ifx_ASCLIN *asclin, IfxAsclin_FifoInterruptMode mode)
Selects the Rx FIFO interupt generation mode. More...
IFX_INLINE void | IfxAsclin_setRxInput (Ifx_ASCLIN *asclin, IfxAsclin_RxInputSelect alti)
Selects the alternate input for Rx signal. More...
IFX_INLINE void | IfxAsclin_setSlavePolarity (Ifx_ASCLIN *asclin, IfxAsclin_SlavePolarity spol)
Selects the slave polarity. More...
IFX_INLINE void | IfxAsclin_setSuspendMode (Ifx_ASCLIN *asclin, IfxAsclin_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_INLINE void | IfxAsclin_setTxFifoInterruptMode (Ifx_ASCLIN *asclin, IfxAsclin_FifoInterruptMode mode)
Selects the Tx FIFO interupt generation mode. More...
IFX_EXTERN boolean | IfxAsclin_setBitTiming (Ifx_ASCLIN *asclin, float32 baudrate, IfxAsclin_OversamplingFactor oversampling, IfxAsclin_SamplePointPosition samplepoint, IfxAsclin_SamplesPerBit medianFilter)
Set the bit timing. More...

Detailed Description

Function Documentation

◆ IfxAsclin_disableAllFlags()

IFX_INLINE void IfxAsclin_disableAllFlags ( Ifx_ASCLIN * asclin )

disables all flags

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1754 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_enableAutoBaudrateDetection()

IFX_INLINE void IfxAsclin_enableAutoBaudrateDetection | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables the auto baudrate detection.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1760 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_initModule().

◆ IfxAsclin_enableBreakDetectedFlag()

IFX_INLINE void IfxAsclin_enableBreakDetectedFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables break detected flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1766 of file IfxAsclin.h.

◆ IfxAsclin_enableCollisionDetection()

IFX_INLINE void IfxAsclin_enableCollisionDetection | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables the collision detection.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable/disable)
Returns
None

Definition at line 1772 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_initModule().

◆ IfxAsclin_enableCollisionDetectionErrorFlag()

IFX_INLINE void IfxAsclin_enableCollisionDetectionErrorFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables LIN collision detection error flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1778 of file IfxAsclin.h.

◆ IfxAsclin_enableCts()

IFX_INLINE void IfxAsclin_enableCts | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables CTS.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable/disable)
Returns
None

Definition at line 1784 of file IfxAsclin.h.

Referenced by IfxAsclin_initCtsPin().

◆ IfxAsclin_enableFallingEdgeDetectedFlag()

IFX_INLINE void IfxAsclin_enableFallingEdgeDetectedFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables falling edge detected flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1790 of file IfxAsclin.h.

◆ IfxAsclin_enableFrameErrorFlag()

IFX_INLINE void IfxAsclin_enableFrameErrorFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables frame error flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1796 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_enableHardwareChecksum()

IFX_INLINE void IfxAsclin_enableHardwareChecksum | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables the hardware checksum.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1802 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_initModule().

◆ IfxAsclin_enableHeaderTimeoutFlag()

IFX_INLINE void IfxAsclin_enableHeaderTimeoutFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables header timeout flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1808 of file IfxAsclin.h.

◆ IfxAsclin_enableLinAutoBaudDetectionErrorFlag()

IFX_INLINE void IfxAsclin_enableLinAutoBaudDetectionErrorFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables LIN auto baudrate detection error flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1814 of file IfxAsclin.h.

◆ IfxAsclin_enableLinChecksumErrorFlag()

IFX_INLINE void IfxAsclin_enableLinChecksumErrorFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables LIN checksum error flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1820 of file IfxAsclin.h.

◆ IfxAsclin_enableLinParityErrorFlag()

IFX_INLINE void IfxAsclin_enableLinParityErrorFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables LIN parity error flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1826 of file IfxAsclin.h.

◆ IfxAsclin_enableLoopBackMode()

IFX_INLINE void IfxAsclin_enableLoopBackMode | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables the loop back mode.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable/disable)
Returns
None

Definition at line 1832 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_enableParity()

IFX_INLINE void IfxAsclin_enableParity | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables the parity bit attachment to tha data bits.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable/disable)
Returns
None

Definition at line 1838 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_enableParityErrorFlag()

IFX_INLINE void IfxAsclin_enableParityErrorFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables parity error flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1844 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), and IfxAsclin_enableAscErrorFlags().

◆ IfxAsclin_enableRaisingEdgeDetectedFlag()

IFX_INLINE void IfxAsclin_enableRaisingEdgeDetectedFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables raising edge detected flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1850 of file IfxAsclin.h.

◆ IfxAsclin_enableResponseTimeoutFlag()

IFX_INLINE void IfxAsclin_enableResponseTimeoutFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables response timeout flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1856 of file IfxAsclin.h.

◆ IfxAsclin_enableRxFifoFillLevelFlag()

IFX_INLINE void IfxAsclin_enableRxFifoFillLevelFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables Rx FIFO level flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1862 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_enableRxFifoInlet()

IFX_INLINE void IfxAsclin_enableRxFifoInlet | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables the receive FIFO outlet to allow filling of Rx FIFO through shift register.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable/disable)
Returns
None

Definition at line 1868 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_ignoreHeader(), IfxAsclin_Lin_initModule(), IfxAsclin_Lin_prepareHeaderReception(), IfxAsclin_Lin_prepareResponseReception(), IfxAsclin_Lin_sendHeader(), IfxAsclin_Lin_sendResponse(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_enableRxFifoOverflowFlag()

IFX_INLINE void IfxAsclin_enableRxFifoOverflowFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables Rx FIFO overflow flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1874 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), and IfxAsclin_enableAscErrorFlags().

◆ IfxAsclin_enableRxFifoUnderflowFlag()

IFX_INLINE void IfxAsclin_enableRxFifoUnderflowFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables Rx FIFO underflow flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1880 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule().

◆ IfxAsclin_enableRxHeaderEndFlag()

IFX_INLINE void IfxAsclin_enableRxHeaderEndFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables receive header end flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1886 of file IfxAsclin.h.

◆ IfxAsclin_enableRxResponseEndFlag()

IFX_INLINE void IfxAsclin_enableRxResponseEndFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables receive response end flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1892 of file IfxAsclin.h.

◆ IfxAsclin_enableTransmissionCompletedFlag()

IFX_INLINE void IfxAsclin_enableTransmissionCompletedFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables transmission completed flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1898 of file IfxAsclin.h.

◆ IfxAsclin_enableTxFifoFillLevelFlag()

IFX_INLINE void IfxAsclin_enableTxFifoFillLevelFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables Tx FIFO level flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1904 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_enableTxFifoOutlet()

IFX_INLINE void IfxAsclin_enableTxFifoOutlet | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables the transmit FIFO outlet to allow transmission.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable/disable)
Returns
None

Definition at line 1910 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), IfxAsclin_Lin_prepareHeaderReception(), IfxAsclin_Lin_prepareResponseReception(), IfxAsclin_Lin_sendHeader(), IfxAsclin_Lin_sendResponse(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_enableTxFifoOverflowFlag()

IFX_INLINE void IfxAsclin_enableTxFifoOverflowFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables Tx FIFO overflow flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1916 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule().

◆ IfxAsclin_enableTxHeaderEndFlag()

IFX_INLINE void IfxAsclin_enableTxHeaderEndFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables transmit header end flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1922 of file IfxAsclin.h.

◆ IfxAsclin_enableTxResponseEndFlag()

IFX_INLINE void IfxAsclin_enableTxResponseEndFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables transmit response end flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1928 of file IfxAsclin.h.

◆ IfxAsclin_isModuleSuspended()

IFX_INLINE boolean IfxAsclin_isModuleSuspended ( Ifx_ASCLIN * asclin )

Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended.

Parameters
asclin Pointer to ASCLIN module registers
Returns
Suspend status (TRUE / FALSE)

Definition at line 2189 of file IfxAsclin.h.

◆ IfxAsclin_setBitTiming()

IFX_EXTERN boolean IfxAsclin_setBitTiming | ( | Ifx_ASCLIN * | asclin,
 |  | float32 | baudrate,
 |  | IfxAsclin_OversamplingFactor | oversampling,
 |  | IfxAsclin_SamplePointPosition | samplepoint,
 |  | IfxAsclin_SamplesPerBit | medianFilter
 | ) |  |

Set the bit timing.

Note
this function required FA source and the PD frequency to be set to their final values
Parameters
asclin | pointer to ASCLIN registers
baudrate | Required baudrate
oversampling | The oversampling factor
samplepoint | The sample point position
medianFilter | Number of samples per bit (median filter)
Returns
TRUE if configuration was successfull

Definition at line 331 of file IfxAsclin.c.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_setClockPolarity()

IFX_INLINE void IfxAsclin_setClockPolarity | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_ClockPolarity | cpol
 | ) |  |

Selects the clock polarity.

Parameters
asclin | pointer to ASCLIN registers
cpol | CPOL selection
Returns
None

Definition at line 2231 of file IfxAsclin.h.

Referenced by IfxAsclin_Spi_initModule().

◆ IfxAsclin_setCtsInput()

IFX_INLINE void IfxAsclin_setCtsInput | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_CtsInputSelect | ctsi
 | ) |  |

Selects the CTS input pin.

Parameters
asclin | pointer to ASCLIN registers
ctsi | CTS input pin selection
Returns
None

Definition at line 2237 of file IfxAsclin.h.

Referenced by IfxAsclin_initCtsPin().

◆ IfxAsclin_setFrameMode()

IFX_INLINE void IfxAsclin_setFrameMode | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_FrameMode | mode
 | ) |  |

Selects the module's mode of operation.

Parameters
asclin | pointer to ASCLIN registers
mode | mode selction
Returns
None

Definition at line 2273 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_setRtsCtsPolarity()

IFX_INLINE void IfxAsclin_setRtsCtsPolarity | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_RtsCtsPolarity | rcpol
 | ) |  |

Selects the RTS/CTS polarity.

Parameters
asclin | pointer to ASCLIN registers
rcpol | RCPOL selection
Returns
None

Definition at line 2363 of file IfxAsclin.h.

◆ IfxAsclin_setRxFifoInterruptMode()

IFX_INLINE void IfxAsclin_setRxFifoInterruptMode | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_FifoInterruptMode | mode
 | ) |  |

Selects the Rx FIFO interupt generation mode.

Parameters
asclin | pointer to ASCLIN registers
mode | mode selction
Returns
None

Definition at line 2381 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_setRxInput()

IFX_INLINE void IfxAsclin_setRxInput | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_RxInputSelect | alti
 | ) |  |

Selects the alternate input for Rx signal.

Parameters
asclin | pointer to ASCLIN registers
alti | alternate input selection of Rx signal
Returns
None

Definition at line 2393 of file IfxAsclin.h.

Referenced by IfxAsclin_initRxPin(), IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_setSlavePolarity()

IFX_INLINE void IfxAsclin_setSlavePolarity | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_SlavePolarity | spol
 | ) |  |

Selects the slave polarity.

Parameters
asclin | pointer to ASCLIN registers
spol | SPOL selection
Returns
None

Definition at line 2417 of file IfxAsclin.h.

Referenced by IfxAsclin_Spi_initModule().

◆ IfxAsclin_setSuspendMode()

IFX_INLINE void IfxAsclin_setSuspendMode | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_SuspendMode | mode
 | ) |  |

Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.

Parameters
asclin | Pointer to ASCLIN module registers
mode | Module suspend mode
Returns
None

Definition at line 2438 of file IfxAsclin.h.

◆ IfxAsclin_setTxFifoInterruptMode()

IFX_INLINE void IfxAsclin_setTxFifoInterruptMode | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_FifoInterruptMode | mode
 | ) |  |

Selects the Tx FIFO interupt generation mode.

Parameters
asclin | pointer to ASCLIN registers
mode | mode selction
Returns
None

Definition at line 2479 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), and IfxAsclin_Spi_initModule().


iLLD_TC38A: External Functions

Functions
External Functions
iLLD » ASCLIN » Standard Driver
Collaboration diagram for External Functions:

Functions

IFX_EXTERN void | IfxAsclin_disableModule (Ifx_ASCLIN *asclin)
Disables the module. More...
IFX_EXTERN void | IfxAsclin_enableAscErrorFlags (Ifx_ASCLIN *asclin, boolean parEnable, boolean rfoEnable)
Enables the ASC error interrupt Flags. More...
IFX_EXTERN void | IfxAsclin_enableModule (Ifx_ASCLIN *asclin)
Enables the module. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxAsclin_getSrcPointerEr (Ifx_ASCLIN *asclin)
Returns the SRC pointer for ERR. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxAsclin_getSrcPointerRx (Ifx_ASCLIN *asclin)
Returns the SRC pointer for Rx. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxAsclin_getSrcPointerTx (Ifx_ASCLIN *asclin)
Returns the SRC pointer for Tx. More...
IFX_EXTERN uint32 | IfxAsclin_read16 (Ifx_ASCLIN *asclin, uint16 *data, uint32 count)
Reads data up to 16 bits. More...
IFX_EXTERN uint32 | IfxAsclin_read32 (Ifx_ASCLIN *asclin, uint32 *data, uint32 count)
Reads data up to 32 bits. More...
IFX_EXTERN uint32 | IfxAsclin_read8 (Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
Reads data up to 8 bits. More...
IFX_EXTERN void | IfxAsclin_setBaudrateBitFields (Ifx_ASCLIN *asclin, uint16 prescaler, uint16 numerator, uint16 denominator, IfxAsclin_OversamplingFactor oversampling)
Sets the baudrate bit fields. More...
IFX_EXTERN void | IfxAsclin_setClockSource (Ifx_ASCLIN *asclin, IfxAsclin_ClockSource clockSource)
Sets the clock source. More...
IFX_EXTERN uint32 | IfxAsclin_write16 (Ifx_ASCLIN *asclin, uint16 *data, uint32 count)
Writes data up to 16 bits. More...
IFX_EXTERN uint32 | IfxAsclin_write32 (Ifx_ASCLIN *asclin, uint32 *data, uint32 count)
Writes data up to 32 bits. More...
IFX_EXTERN uint32 | IfxAsclin_write8 (Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
Writes data up to 8 bits. More...

Detailed Description

Function Documentation

◆ IfxAsclin_disableModule()

IFX_EXTERN void IfxAsclin_disableModule ( Ifx_ASCLIN * asclin )

Disables the module.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 54 of file IfxAsclin.c.

◆ IfxAsclin_enableAscErrorFlags()

IFX_EXTERN void IfxAsclin_enableAscErrorFlags | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | parEnable,
 |  | boolean | rfoEnable
 | ) |  |

Enables the ASC error interrupt Flags.

Parameters
asclin | pointer to ASCLIN registers
parEnable | parity error
rfoEnable | Rx FIFO overflow error
Returns
None

Definition at line 63 of file IfxAsclin.c.

◆ IfxAsclin_enableModule()

IFX_EXTERN void IfxAsclin_enableModule ( Ifx_ASCLIN * asclin )

Enables the module.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 70 of file IfxAsclin.c.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_getSrcPointerEr()

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxAsclin_getSrcPointerEr ( Ifx_ASCLIN * asclin )

Returns the SRC pointer for ERR.

Parameters
asclin pointer to ASCLIN registers

Definition at line 159 of file IfxAsclin.c.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_getSrcPointerRx()

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxAsclin_getSrcPointerRx ( Ifx_ASCLIN * asclin )

Returns the SRC pointer for Rx.

Parameters
asclin pointer to ASCLIN registers

Definition at line 192 of file IfxAsclin.c.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_getSrcPointerTx()

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxAsclin_getSrcPointerTx ( Ifx_ASCLIN * asclin )

Returns the SRC pointer for Tx.

Parameters
asclin pointer to ASCLIN registers

Definition at line 225 of file IfxAsclin.c.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_read16()

IFX_EXTERN uint32 IfxAsclin_read16 | ( | Ifx_ASCLIN * | asclin,
 |  | uint16 * | data,
 |  | uint32 | count
 | ) |  |

Reads data up to 16 bits.

Parameters
asclin | pointer to ASCLIN registers
data | Array where the read data shall be stored
count | number of items to read
Returns
number of items that could not be read

Definition at line 258 of file IfxAsclin.c.

Referenced by IfxAsclin_Spi_read().

◆ IfxAsclin_read32()

IFX_EXTERN uint32 IfxAsclin_read32 | ( | Ifx_ASCLIN * | asclin,
 |  | uint32 * | data,
 |  | uint32 | count
 | ) |  |

Reads data up to 32 bits.

Parameters
asclin | pointer to ASCLIN registers
data | Array where the read data shall be stored
count | number of items to read
Returns
number of items that could not be read

Definition at line 272 of file IfxAsclin.c.

◆ IfxAsclin_read8()

IFX_EXTERN uint32 IfxAsclin_read8 | ( | Ifx_ASCLIN * | asclin,
 |  | uint8 * | data,
 |  | uint32 | count
 | ) |  |

Reads data up to 8 bits.

Parameters
asclin | pointer to ASCLIN registers
data | Array where the read data shall be stored
count | number of items to read
Returns
number of items that could not be read

Definition at line 286 of file IfxAsclin.c.

Referenced by IfxAsclin_Asc_isrReceive(), IfxAsclin_Lin_readHeader(), IfxAsclin_Lin_readResponse(), and IfxAsclin_Spi_read().

◆ IfxAsclin_setBaudrateBitFields()

IFX_EXTERN void IfxAsclin_setBaudrateBitFields | ( | Ifx_ASCLIN * | asclin,
 |  | uint16 | prescaler,
 |  | uint16 | numerator,
 |  | uint16 | denominator,
 |  | IfxAsclin_OversamplingFactor | oversampling
 | ) |  |

Sets the baudrate bit fields.

Parameters
asclin | pointer to ASCLIN registers
prescaler | division ratio of the predivider
numerator | numerator of the fractional divider
denominator | denominator of the fractional divider
oversampling | division ratio of the baudrate postdivider
Returns
None

Definition at line 319 of file IfxAsclin.c.

◆ IfxAsclin_setClockSource()

IFX_EXTERN void IfxAsclin_setClockSource | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_ClockSource | clockSource
 | ) |  |

Sets the clock source.

Parameters
asclin | pointer to ASCLIN registers
clockSource | clock source selection
Returns
None

Definition at line 430 of file IfxAsclin.c.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), IfxAsclin_setBaudrateBitFields(), IfxAsclin_setBitTiming(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_write16()

IFX_EXTERN uint32 IfxAsclin_write16 | ( | Ifx_ASCLIN * | asclin,
 |  | uint16 * | data,
 |  | uint32 | count
 | ) |  |

Writes data up to 16 bits.

Parameters
asclin | pointer to ASCLIN registers
data | Array of data to be send
count | number of items to be send
Returns
the number of items that could not be send

Definition at line 448 of file IfxAsclin.c.

Referenced by IfxAsclin_Spi_write().

◆ IfxAsclin_write32()

IFX_EXTERN uint32 IfxAsclin_write32 | ( | Ifx_ASCLIN * | asclin,
 |  | uint32 * | data,
 |  | uint32 | count
 | ) |  |

Writes data up to 32 bits.

Parameters
asclin | pointer to ASCLIN registers
data | Array of data to be send
count | number of items to be send
Returns
the number of items that could not be send

Definition at line 462 of file IfxAsclin.c.

◆ IfxAsclin_write8()

IFX_EXTERN uint32 IfxAsclin_write8 | ( | Ifx_ASCLIN * | asclin,
 |  | uint8 * | data,
 |  | uint32 | count
 | ) |  |

Writes data up to 8 bits.

Parameters
asclin | pointer to ASCLIN registers
data | Array of data to be send
count | number of items to be send
Returns
the number of items that could not be send

Definition at line 476 of file IfxAsclin.c.

Referenced by IfxAsclin_Asc_initiateTransmission(), IfxAsclin_Asc_isrTransmit(), IfxAsclin_Lin_sendFrame(), IfxAsclin_Lin_sendHeader(), IfxAsclin_Lin_sendResponse(), and IfxAsclin_Spi_write().


iLLD_TC38A: IO Pin Configuration Functions

Functions
IO Pin Configuration Functions
iLLD » ASCLIN » Standard Driver
Collaboration diagram for IO Pin Configuration Functions:

Functions

IFX_INLINE void | IfxAsclin_initCtsPin (const IfxAsclin_Cts_In *cts, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a CTS input. More...
IFX_INLINE void | IfxAsclin_initRtsPin (const IfxAsclin_Rts_Out *rts, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a RTS output. More...
IFX_INLINE void | IfxAsclin_initRxPin (const IfxAsclin_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a RX input. More...
IFX_INLINE void | IfxAsclin_initSclkPin (const IfxAsclin_Sclk_Out *sclk, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a SCLK output. More...
IFX_INLINE void | IfxAsclin_initSlsoPin (const IfxAsclin_Slso_Out *slso, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a SLSO output. More...
IFX_INLINE void | IfxAsclin_initTxPin (const IfxAsclin_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a TX output. More...

Detailed Description

Function Documentation

◆ IfxAsclin_initCtsPin()

IFX_INLINE void IfxAsclin_initCtsPin | ( | const IfxAsclin_Cts_In * | cts,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a CTS input.

Attention: the kernel clock has to be disabled whenever the input multiplexer is changed.

This can be done with IfxAsclin_setClockSource(asclinSFR, IfxAsclin_ClockSource_noClock);

After the function call, the current clock can be enabled again.

Parameters
cts | the CTS Pin which should be configured
inputMode | the pin input mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 2138 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule().

◆ IfxAsclin_initRtsPin()

IFX_INLINE void IfxAsclin_initRtsPin | ( | const IfxAsclin_Rts_Out * | rts,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a RTS output.

Parameters
rts | the RTS Pin which should be configured
outputMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 2150 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule().

◆ IfxAsclin_initRxPin()

IFX_INLINE void IfxAsclin_initRxPin | ( | const IfxAsclin_Rx_In * | rx,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a RX input.

Attention: the kernel clock has to be disabled whenever the input multiplexer is changed.

This can be done with IfxAsclin_setClockSource(asclinSFR, IfxAsclin_ClockSource_noClock);

After the function call, the current clock can be enabled again.

Parameters
rx | the RX Pin which should be configured
inputMode | the pin input mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 2157 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_initSclkPin()

IFX_INLINE void IfxAsclin_initSclkPin | ( | const IfxAsclin_Sclk_Out * | sclk,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a SCLK output.

Parameters
sclk | the SCLK Pin which should be configured
outputMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 2168 of file IfxAsclin.h.

Referenced by IfxAsclin_Spi_initModule().

◆ IfxAsclin_initSlsoPin()

IFX_INLINE void IfxAsclin_initSlsoPin | ( | const IfxAsclin_Slso_Out * | slso,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a SLSO output.

Parameters
slso | the SLSO Pin which should be configured
outputMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 2175 of file IfxAsclin.h.

Referenced by IfxAsclin_Spi_initModule().

◆ IfxAsclin_initTxPin()

IFX_INLINE void IfxAsclin_initTxPin | ( | const IfxAsclin_Tx_Out * | tx,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a TX output.

Parameters
tx | the TX Pin which should be configured
outputMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 2182 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().


iLLD_TC38A: ASCLIN Pin Mapping

Data Structures | Macros | Variables
ASCLIN Pin Mapping
iLLD » ASCLIN
Collaboration diagram for ASCLIN Pin Mapping:

Data Structures

struct | IfxAsclin_Cts_In
CTS pin mapping structure. More...
struct | IfxAsclin_Rx_In
RX pin mapping structure. More...
struct | IfxAsclin_Rts_Out
RTS pin mapping structure. More...
struct | IfxAsclin_Sclk_Out
SCLK pin mapping structure. More...
struct | IfxAsclin_Slso_Out
SLSO pin mapping structure. More...
struct | IfxAsclin_Tx_Out
TX pin mapping structure. More...

Macros

#define | IFXASCLIN_PINMAP_NUM_MODULES 24
Table dimensions. More...
#define | IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS 2
#define | IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS 2
#define | IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS 8
#define | IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS 11
#define | IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS 6
#define | IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS 14

Variables

IFX_EXTERN IfxAsclin_Cts_In IfxAsclin0_CTSA_P14_9_IN
Clear to send input. More...
IFX_EXTERN IfxAsclin_Cts_In IfxAsclin1_CTSA_P20_7_IN
Clear to send input. More...
IFX_EXTERN IfxAsclin_Cts_In IfxAsclin1_CTSB_P32_4_IN
Clear to send input. More...
IFX_EXTERN IfxAsclin_Cts_In IfxAsclin2_CTSA_P10_7_IN
Clear to send input. More...
IFX_EXTERN IfxAsclin_Cts_In IfxAsclin2_CTSB_P33_5_IN
Clear to send input. More...
IFX_EXTERN IfxAsclin_Cts_In IfxAsclin3_CTSA_P00_12_IN
Clear to send input. More...
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin0_RTS_P14_7_OUT
Ready to send output. More...
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin1_RTS_P20_6_OUT
Ready to send output. More...
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin1_RTS_P23_1_OUT
Ready to send output. More...
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin2_RTS_P10_8_OUT
Ready to send output. More...
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin2_RTS_P33_4_OUT
Ready to send output. More...
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin3_RTS_P00_9_OUT
Ready to send output. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin0_RXA_P14_1_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin0_RXB_P15_3_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin0_RXC_P01_8_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin0_RXD_P33_10_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin0_RXE_P13_11_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin10_RXA_P00_4_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin10_RXB_P00_8_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin10_RXC_P13_0_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin10_RXD_P13_1_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin11_RXA_P10_0_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin11_RXB_P10_4_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin11_RXC_P21_0_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin11_RXD_P21_1_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin11_RXE_P21_2_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin11_RXF_P21_5_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin12_RXA_P00_3_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin12_RXB_P00_5_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin13_RXA_P00_9_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin13_RXB_P00_11_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin14_RXA_P33_3_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin14_RXB_P33_4_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin15_RXA_P32_4_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin15_RXB_P32_7_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin16_RXA_P23_5_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin16_RXB_P23_7_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin17_RXA_P22_11_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin17_RXB_P21_0_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin18_RXA_P21_1_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin18_RXB_P21_4_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin19_RXA_P15_6_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin19_RXB_P15_7_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXA_P15_1_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXB_P15_5_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXC_P20_9_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXD_P14_8_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXE_P11_10_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXF_P33_13_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXG_P02_3_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin20_RXA_P14_7_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin20_RXB_P14_9_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin21_RXA_P13_0_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin21_RXB_P13_3_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin22_RXA_P10_4_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin22_RXB_P10_5_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin23_RXA_P10_6_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin23_RXB_P10_7_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXA_P14_3_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXB_P02_1_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXC_P02_10_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXD_P10_6_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXE_P33_8_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXF_P32_6_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXG_P02_0_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXA_P15_7_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXB_P11_0_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXC_P20_3_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXD_P32_2_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXE_P00_1_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXF_P21_6_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXG_P21_2_IN
Differential Receive input (low active) More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXG_P21_3_IN
Differential Receive input (high active) More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXH_P13_12_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin4_RXA_P00_12_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin4_RXB_P34_2_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin4_RXC_P22_6_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin4_RXD_P22_9_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin5_RXA_P00_6_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin5_RXB_P33_4_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin5_RXC_P22_3_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin5_RXD_P14_15_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin6_RXA_P23_3_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin6_RXB_P01_0_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin6_RXC_P32_6_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin6_RXD_P10_9_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin6_RXE_P22_0_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin6_RXF_P23_1_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin7_RXA_P14_15_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin7_RXB_P01_8_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin7_RXC_P23_2_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin7_RXD_P13_11_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin7_RXE_P22_1_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin7_RXF_P22_4_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin8_RXA_P02_9_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin8_RXB_P02_10_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin8_RXC_P33_1_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin8_RXD_P33_6_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin8_RXE_P34_5_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin9_RXA_P01_5_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin9_RXB_P01_7_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin9_RXC_P14_7_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin9_RXD_P14_9_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin9_RXE_P20_6_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin9_RXF_P20_7_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P14_0_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P15_2_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin10_SCLK_P13_2_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin11_SCLK_P21_3_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P15_0_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P20_10_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_11_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_12_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P02_4_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P10_6_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P14_2_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_7_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_9_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_0_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_2_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P11_1_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P11_4_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_6_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_8_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P20_0_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_5_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_7_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P32_3_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P33_2_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin4_SCLK_P00_10_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin4_SCLK_P22_7_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin4_SCLK_P34_3_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin5_SCLK_P14_12_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin5_SCLK_P22_8_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin5_SCLK_P33_3_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin6_SCLK_P02_14_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin6_SCLK_P10_11_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin6_SCLK_P23_1_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin7_SCLK_P01_10_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin7_SCLK_P13_13_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin7_SCLK_P14_12_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin8_SCLK_P02_8_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin9_SCLK_P01_6_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin10_SLSO_P13_3_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin11_SLSO_P21_4_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin1_SLSO_P14_3_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin1_SLSO_P20_8_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin1_SLSO_P33_10_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin2_SLSO_P02_3_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin2_SLSO_P10_5_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin2_SLSO_P33_6_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P00_3_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P12_1_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P14_3_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_2_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_6_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P33_1_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin4_SLSO_P00_11_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin4_SLSO_P22_11_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin4_SLSO_P22_4_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin4_SLSO_P34_4_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin5_SLSO_P14_8_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin5_SLSO_P33_5_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin6_SLSO_P02_12_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin6_SLSO_P10_13_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin6_SLSO_P23_4_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin7_SLSO_P01_11_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin7_SLSO_P13_15_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin7_SLSO_P14_8_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin8_SLSO_P02_11_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin9_SLSO_P01_4_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P01_13_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P13_10_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P14_0_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P14_1_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P15_2_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P15_3_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P33_9_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin10_TX_P00_8_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin10_TX_P13_0_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin11_TX_P10_0_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin11_TX_P21_0_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin11_TX_P21_5_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin12_TX_P00_3_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin12_TX_P01_6_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin13_TX_P00_10_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin13_TX_P00_11_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin14_TX_P33_2_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin14_TX_P33_3_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin15_TX_P32_7_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin15_TX_P33_0_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin16_TX_P23_6_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin16_TX_P23_7_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin17_TX_P22_11_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin17_TX_P22_7_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin18_TX_P21_3_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin18_TX_P21_4_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin19_TX_P15_4_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin19_TX_P15_7_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P02_2_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P11_12_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P14_10_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P14_15_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_0_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_1_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_4_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_5_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P20_10_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P33_12_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P33_13_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin20_TX_P14_7_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin20_TX_P14_8_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin21_TX_P13_2_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin21_TX_P13_3_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin22_TX_P10_0_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin22_TX_P10_4_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin23_TX_P10_7_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin23_TX_P10_8_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P02_0_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P02_9_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P10_5_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P14_2_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P14_3_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P32_5_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P33_8_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P33_9_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P00_0_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P00_1_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P11_0_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P11_1_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P13_9_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P15_6_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P15_7_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P20_0_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P20_3_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P21_7_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P22_0_OUT
Differential Transmit output (low active) More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P22_1_OUT
Differential Transmit output (high active) More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P32_2_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P32_3_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin4_TX_P00_9_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin4_TX_P22_10_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin4_TX_P22_5_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin4_TX_P34_1_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin5_TX_P00_7_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin5_TX_P14_14_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin5_TX_P22_2_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin5_TX_P33_0_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin6_TX_P01_1_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin6_TX_P02_15_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin6_TX_P10_10_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin6_TX_P22_0_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin6_TX_P23_5_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin6_TX_P32_7_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin7_TX_P01_12_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin7_TX_P01_9_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin7_TX_P13_12_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin7_TX_P14_14_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin7_TX_P22_1_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin7_TX_P23_3_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin8_TX_P02_9_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin8_TX_P33_7_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin8_TX_P34_5_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin9_TX_P01_7_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin9_TX_P14_7_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin9_TX_P20_7_OUT
Transmit output. More...
IFX_EXTERN const IfxAsclin_Cts_In * | IfxAsclin_Cts_In_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS]
IfxAsclin_Cts_In table. More...
IFX_EXTERN const IfxAsclin_Rts_Out * | IfxAsclin_Rts_Out_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS]
IfxAsclin_Rts_Out table. More...
IFX_EXTERN const IfxAsclin_Rx_In * | IfxAsclin_Rx_In_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS]
IfxAsclin_Rx_In table. More...
IFX_EXTERN const IfxAsclin_Sclk_Out * | IfxAsclin_Sclk_Out_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS]
IfxAsclin_Sclk_Out table. More...
IFX_EXTERN const IfxAsclin_Slso_Out * | IfxAsclin_Slso_Out_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS]
IfxAsclin_Slso_Out table. More...
IFX_EXTERN const IfxAsclin_Tx_Out * | IfxAsclin_Tx_Out_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS]
IfxAsclin_Tx_Out table. More...

Detailed Description

Data Structure Documentation

◆ IfxAsclin_Cts_In

struct IfxAsclin_Cts_In

CTS pin mapping structure.

Definition at line 56 of file IfxAsclin_PinMap.h.

Collaboration diagram for IfxAsclin_Cts_In:
[legend]
Data Fields
Ifx_ASCLIN * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxAsclin_Rx_In

struct IfxAsclin_Rx_In

RX pin mapping structure.

Definition at line 64 of file IfxAsclin_PinMap.h.

Collaboration diagram for IfxAsclin_Rx_In:
[legend]
Data Fields
Ifx_ASCLIN * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxAsclin_Rts_Out

struct IfxAsclin_Rts_Out

RTS pin mapping structure.

Definition at line 72 of file IfxAsclin_PinMap.h.

Collaboration diagram for IfxAsclin_Rts_Out:
[legend]
Data Fields
Ifx_ASCLIN * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxAsclin_Sclk_Out

struct IfxAsclin_Sclk_Out

SCLK pin mapping structure.

Definition at line 80 of file IfxAsclin_PinMap.h.

Collaboration diagram for IfxAsclin_Sclk_Out:
[legend]
Data Fields
Ifx_ASCLIN * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxAsclin_Slso_Out

struct IfxAsclin_Slso_Out

SLSO pin mapping structure.

Definition at line 88 of file IfxAsclin_PinMap.h.

Collaboration diagram for IfxAsclin_Slso_Out:
[legend]
Data Fields
Ifx_ASCLIN * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxAsclin_Tx_Out

struct IfxAsclin_Tx_Out

TX pin mapping structure.

Definition at line 96 of file IfxAsclin_PinMap.h.

Collaboration diagram for IfxAsclin_Tx_Out:
[legend]
Data Fields
Ifx_ASCLIN * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

Macro Definition Documentation

◆ IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS

#define IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS 2

Definition at line 372 of file IfxAsclin_PinMap.h.

◆ IFXASCLIN_PINMAP_NUM_MODULES

#define IFXASCLIN_PINMAP_NUM_MODULES 24

Table dimensions.

Definition at line 371 of file IfxAsclin_PinMap.h.

◆ IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS

#define IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS 2

Definition at line 373 of file IfxAsclin_PinMap.h.

◆ IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS

#define IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS 8

Definition at line 374 of file IfxAsclin_PinMap.h.

◆ IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS

#define IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS 11

Definition at line 375 of file IfxAsclin_PinMap.h.

◆ IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS

#define IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS 6

Definition at line 376 of file IfxAsclin_PinMap.h.

◆ IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS

#define IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS 14

Definition at line 377 of file IfxAsclin_PinMap.h.

Variable Documentation

◆ IfxAsclin0_CTSA_P14_9_IN

IFX_EXTERN IfxAsclin_Cts_In IfxAsclin0_CTSA_P14_9_IN

Clear to send input.

Definition at line 103 of file IfxAsclin_PinMap.h.

◆ IfxAsclin0_RTS_P14_7_OUT

IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin0_RTS_P14_7_OUT

Ready to send output.

Definition at line 109 of file IfxAsclin_PinMap.h.

◆ IfxAsclin0_RXA_P14_1_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin0_RXA_P14_1_IN

Receive input.

Definition at line 115 of file IfxAsclin_PinMap.h.

◆ IfxAsclin0_RXB_P15_3_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin0_RXB_P15_3_IN

Receive input.

Definition at line 116 of file IfxAsclin_PinMap.h.

◆ IfxAsclin0_RXC_P01_8_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin0_RXC_P01_8_IN

Receive input.

Definition at line 117 of file IfxAsclin_PinMap.h.

◆ IfxAsclin0_RXD_P33_10_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin0_RXD_P33_10_IN

Receive input.

Definition at line 118 of file IfxAsclin_PinMap.h.

◆ IfxAsclin0_RXE_P13_11_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin0_RXE_P13_11_IN

Receive input.

Definition at line 119 of file IfxAsclin_PinMap.h.

◆ IfxAsclin0_SCLK_P14_0_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P14_0_OUT

Shift clock output.

Definition at line 208 of file IfxAsclin_PinMap.h.

◆ IfxAsclin0_SCLK_P15_2_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P15_2_OUT

Shift clock output.

Definition at line 209 of file IfxAsclin_PinMap.h.

◆ IfxAsclin0_TX_P01_13_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P01_13_OUT

Transmit output.

Definition at line 274 of file IfxAsclin_PinMap.h.

◆ IfxAsclin0_TX_P13_10_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P13_10_OUT

Transmit output.

Definition at line 275 of file IfxAsclin_PinMap.h.

◆ IfxAsclin0_TX_P14_0_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P14_0_OUT

Transmit output.

Definition at line 276 of file IfxAsclin_PinMap.h.

◆ IfxAsclin0_TX_P14_1_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P14_1_OUT

Transmit output.

Definition at line 277 of file IfxAsclin_PinMap.h.

◆ IfxAsclin0_TX_P15_2_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P15_2_OUT

Transmit output.

Definition at line 278 of file IfxAsclin_PinMap.h.

◆ IfxAsclin0_TX_P15_3_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P15_3_OUT

Transmit output.

Definition at line 279 of file IfxAsclin_PinMap.h.

◆ IfxAsclin0_TX_P33_9_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P33_9_OUT

Transmit output.

Definition at line 280 of file IfxAsclin_PinMap.h.

◆ IfxAsclin10_RXA_P00_4_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin10_RXA_P00_4_IN

Receive input.

Definition at line 120 of file IfxAsclin_PinMap.h.

◆ IfxAsclin10_RXB_P00_8_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin10_RXB_P00_8_IN

Receive input.

Definition at line 121 of file IfxAsclin_PinMap.h.

◆ IfxAsclin10_RXC_P13_0_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin10_RXC_P13_0_IN

Receive input.

Definition at line 122 of file IfxAsclin_PinMap.h.

◆ IfxAsclin10_RXD_P13_1_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin10_RXD_P13_1_IN

Receive input.

Definition at line 123 of file IfxAsclin_PinMap.h.

◆ IfxAsclin10_SCLK_P13_2_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin10_SCLK_P13_2_OUT

Shift clock output.

Definition at line 210 of file IfxAsclin_PinMap.h.

◆ IfxAsclin10_SLSO_P13_3_OUT

IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin10_SLSO_P13_3_OUT

Slave select signal output.

Definition at line 246 of file IfxAsclin_PinMap.h.

◆ IfxAsclin10_TX_P00_8_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin10_TX_P00_8_OUT

Transmit output.

Definition at line 281 of file IfxAsclin_PinMap.h.

◆ IfxAsclin10_TX_P13_0_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin10_TX_P13_0_OUT

Transmit output.

Definition at line 282 of file IfxAsclin_PinMap.h.

◆ IfxAsclin11_RXA_P10_0_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin11_RXA_P10_0_IN

Receive input.

Definition at line 124 of file IfxAsclin_PinMap.h.

◆ IfxAsclin11_RXB_P10_4_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin11_RXB_P10_4_IN

Receive input.

Definition at line 125 of file IfxAsclin_PinMap.h.

◆ IfxAsclin11_RXC_P21_0_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin11_RXC_P21_0_IN

Receive input.

Definition at line 126 of file IfxAsclin_PinMap.h.

◆ IfxAsclin11_RXD_P21_1_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin11_RXD_P21_1_IN

Receive input.

Definition at line 127 of file IfxAsclin_PinMap.h.

◆ IfxAsclin11_RXE_P21_2_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin11_RXE_P21_2_IN

Receive input.

Definition at line 128 of file IfxAsclin_PinMap.h.

◆ IfxAsclin11_RXF_P21_5_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin11_RXF_P21_5_IN

Receive input.

Definition at line 129 of file IfxAsclin_PinMap.h.

◆ IfxAsclin11_SCLK_P21_3_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin11_SCLK_P21_3_OUT

Shift clock output.

Definition at line 211 of file IfxAsclin_PinMap.h.

◆ IfxAsclin11_SLSO_P21_4_OUT

IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin11_SLSO_P21_4_OUT

Slave select signal output.

Definition at line 247 of file IfxAsclin_PinMap.h.

◆ IfxAsclin11_TX_P10_0_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin11_TX_P10_0_OUT

Transmit output.

Definition at line 283 of file IfxAsclin_PinMap.h.

◆ IfxAsclin11_TX_P21_0_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin11_TX_P21_0_OUT

Transmit output.

Definition at line 284 of file IfxAsclin_PinMap.h.

◆ IfxAsclin11_TX_P21_5_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin11_TX_P21_5_OUT

Transmit output.

Definition at line 285 of file IfxAsclin_PinMap.h.

◆ IfxAsclin12_RXA_P00_3_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin12_RXA_P00_3_IN

Receive input.

Definition at line 130 of file IfxAsclin_PinMap.h.

◆ IfxAsclin12_RXB_P00_5_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin12_RXB_P00_5_IN

Receive input.

Definition at line 131 of file IfxAsclin_PinMap.h.

◆ IfxAsclin12_TX_P00_3_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin12_TX_P00_3_OUT

Transmit output.

Definition at line 286 of file IfxAsclin_PinMap.h.

◆ IfxAsclin12_TX_P01_6_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin12_TX_P01_6_OUT

Transmit output.

Definition at line 287 of file IfxAsclin_PinMap.h.

◆ IfxAsclin13_RXA_P00_9_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin13_RXA_P00_9_IN

Receive input.

Definition at line 132 of file IfxAsclin_PinMap.h.

◆ IfxAsclin13_RXB_P00_11_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin13_RXB_P00_11_IN

Receive input.

Definition at line 133 of file IfxAsclin_PinMap.h.

◆ IfxAsclin13_TX_P00_10_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin13_TX_P00_10_OUT

Transmit output.

Definition at line 288 of file IfxAsclin_PinMap.h.

◆ IfxAsclin13_TX_P00_11_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin13_TX_P00_11_OUT

Transmit output.

Definition at line 289 of file IfxAsclin_PinMap.h.

◆ IfxAsclin14_RXA_P33_3_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin14_RXA_P33_3_IN

Receive input.

Definition at line 134 of file IfxAsclin_PinMap.h.

◆ IfxAsclin14_RXB_P33_4_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin14_RXB_P33_4_IN

Receive input.

Definition at line 135 of file IfxAsclin_PinMap.h.

◆ IfxAsclin14_TX_P33_2_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin14_TX_P33_2_OUT

Transmit output.

Definition at line 290 of file IfxAsclin_PinMap.h.

◆ IfxAsclin14_TX_P33_3_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin14_TX_P33_3_OUT

Transmit output.

Definition at line 291 of file IfxAsclin_PinMap.h.

◆ IfxAsclin15_RXA_P32_4_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin15_RXA_P32_4_IN

Receive input.

Definition at line 136 of file IfxAsclin_PinMap.h.

◆ IfxAsclin15_RXB_P32_7_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin15_RXB_P32_7_IN

Receive input.

Definition at line 137 of file IfxAsclin_PinMap.h.

◆ IfxAsclin15_TX_P32_7_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin15_TX_P32_7_OUT

Transmit output.

Definition at line 292 of file IfxAsclin_PinMap.h.

◆ IfxAsclin15_TX_P33_0_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin15_TX_P33_0_OUT

Transmit output.

Definition at line 293 of file IfxAsclin_PinMap.h.

◆ IfxAsclin16_RXA_P23_5_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin16_RXA_P23_5_IN

Receive input.

Definition at line 138 of file IfxAsclin_PinMap.h.

◆ IfxAsclin16_RXB_P23_7_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin16_RXB_P23_7_IN

Receive input.

Definition at line 139 of file IfxAsclin_PinMap.h.

◆ IfxAsclin16_TX_P23_6_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin16_TX_P23_6_OUT

Transmit output.

Definition at line 294 of file IfxAsclin_PinMap.h.

◆ IfxAsclin16_TX_P23_7_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin16_TX_P23_7_OUT

Transmit output.

Definition at line 295 of file IfxAsclin_PinMap.h.

◆ IfxAsclin17_RXA_P22_11_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin17_RXA_P22_11_IN

Receive input.

Definition at line 140 of file IfxAsclin_PinMap.h.

◆ IfxAsclin17_RXB_P21_0_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin17_RXB_P21_0_IN

Receive input.

Definition at line 141 of file IfxAsclin_PinMap.h.

◆ IfxAsclin17_TX_P22_11_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin17_TX_P22_11_OUT

Transmit output.

Definition at line 296 of file IfxAsclin_PinMap.h.

◆ IfxAsclin17_TX_P22_7_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin17_TX_P22_7_OUT

Transmit output.

Definition at line 297 of file IfxAsclin_PinMap.h.

◆ IfxAsclin18_RXA_P21_1_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin18_RXA_P21_1_IN

Receive input.

Definition at line 142 of file IfxAsclin_PinMap.h.

◆ IfxAsclin18_RXB_P21_4_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin18_RXB_P21_4_IN

Receive input.

Definition at line 143 of file IfxAsclin_PinMap.h.

◆ IfxAsclin18_TX_P21_3_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin18_TX_P21_3_OUT

Transmit output.

Definition at line 298 of file IfxAsclin_PinMap.h.

◆ IfxAsclin18_TX_P21_4_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin18_TX_P21_4_OUT

Transmit output.

Definition at line 299 of file IfxAsclin_PinMap.h.

◆ IfxAsclin19_RXA_P15_6_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin19_RXA_P15_6_IN

Receive input.

Definition at line 144 of file IfxAsclin_PinMap.h.

◆ IfxAsclin19_RXB_P15_7_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin19_RXB_P15_7_IN

Receive input.

Definition at line 145 of file IfxAsclin_PinMap.h.

◆ IfxAsclin19_TX_P15_4_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin19_TX_P15_4_OUT

Transmit output.

Definition at line 300 of file IfxAsclin_PinMap.h.

◆ IfxAsclin19_TX_P15_7_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin19_TX_P15_7_OUT

Transmit output.

Definition at line 301 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_CTSA_P20_7_IN

IFX_EXTERN IfxAsclin_Cts_In IfxAsclin1_CTSA_P20_7_IN

Clear to send input.

Definition at line 104 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_CTSB_P32_4_IN

IFX_EXTERN IfxAsclin_Cts_In IfxAsclin1_CTSB_P32_4_IN

Clear to send input.

Definition at line 105 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_RTS_P20_6_OUT

IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin1_RTS_P20_6_OUT

Ready to send output.

Definition at line 110 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_RTS_P23_1_OUT

IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin1_RTS_P23_1_OUT

Ready to send output.

Definition at line 111 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_RXA_P15_1_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXA_P15_1_IN

Receive input.

Definition at line 146 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_RXB_P15_5_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXB_P15_5_IN

Receive input.

Definition at line 147 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_RXC_P20_9_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXC_P20_9_IN

Receive input.

Definition at line 148 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_RXD_P14_8_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXD_P14_8_IN

Receive input.

Definition at line 149 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_RXE_P11_10_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXE_P11_10_IN

Receive input.

Definition at line 150 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_RXF_P33_13_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXF_P33_13_IN

Receive input.

Definition at line 151 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_RXG_P02_3_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXG_P02_3_IN

Receive input.

Definition at line 152 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_SCLK_P15_0_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P15_0_OUT

Shift clock output.

Definition at line 212 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_SCLK_P20_10_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P20_10_OUT

Shift clock output.

Definition at line 213 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_SCLK_P33_11_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_11_OUT

Shift clock output.

Definition at line 214 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_SCLK_P33_12_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_12_OUT

Shift clock output.

Definition at line 215 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_SLSO_P14_3_OUT

IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin1_SLSO_P14_3_OUT

Slave select signal output.

Definition at line 248 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_SLSO_P20_8_OUT

IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin1_SLSO_P20_8_OUT

Slave select signal output.

Definition at line 249 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_SLSO_P33_10_OUT

IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin1_SLSO_P33_10_OUT

Slave select signal output.

Definition at line 250 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_TX_P02_2_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P02_2_OUT

Transmit output.

Definition at line 302 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_TX_P11_12_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P11_12_OUT

Transmit output.

Definition at line 303 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_TX_P14_10_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P14_10_OUT

Transmit output.

Definition at line 304 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_TX_P14_15_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P14_15_OUT

Transmit output.

Definition at line 305 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_TX_P15_0_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_0_OUT

Transmit output.

Definition at line 306 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_TX_P15_1_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_1_OUT

Transmit output.

Definition at line 307 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_TX_P15_4_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_4_OUT

Transmit output.

Definition at line 308 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_TX_P15_5_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_5_OUT

Transmit output.

Definition at line 309 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_TX_P20_10_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P20_10_OUT

Transmit output.

Definition at line 310 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_TX_P33_12_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P33_12_OUT

Transmit output.

Definition at line 311 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_TX_P33_13_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P33_13_OUT

Transmit output.

Definition at line 312 of file IfxAsclin_PinMap.h.

◆ IfxAsclin20_RXA_P14_7_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin20_RXA_P14_7_IN

Receive input.

Definition at line 153 of file IfxAsclin_PinMap.h.

◆ IfxAsclin20_RXB_P14_9_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin20_RXB_P14_9_IN

Receive input.

Definition at line 154 of file IfxAsclin_PinMap.h.

◆ IfxAsclin20_TX_P14_7_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin20_TX_P14_7_OUT

Transmit output.

Definition at line 313 of file IfxAsclin_PinMap.h.

◆ IfxAsclin20_TX_P14_8_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin20_TX_P14_8_OUT

Transmit output.

Definition at line 314 of file IfxAsclin_PinMap.h.

◆ IfxAsclin21_RXA_P13_0_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin21_RXA_P13_0_IN

Receive input.

Definition at line 155 of file IfxAsclin_PinMap.h.

◆ IfxAsclin21_RXB_P13_3_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin21_RXB_P13_3_IN

Receive input.

Definition at line 156 of file IfxAsclin_PinMap.h.

◆ IfxAsclin21_TX_P13_2_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin21_TX_P13_2_OUT

Transmit output.

Definition at line 315 of file IfxAsclin_PinMap.h.

◆ IfxAsclin21_TX_P13_3_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin21_TX_P13_3_OUT

Transmit output.

Definition at line 316 of file IfxAsclin_PinMap.h.

◆ IfxAsclin22_RXA_P10_4_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin22_RXA_P10_4_IN

Receive input.

Definition at line 157 of file IfxAsclin_PinMap.h.

◆ IfxAsclin22_RXB_P10_5_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin22_RXB_P10_5_IN

Receive input.

Definition at line 158 of file IfxAsclin_PinMap.h.

◆ IfxAsclin22_TX_P10_0_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin22_TX_P10_0_OUT

Transmit output.

Definition at line 317 of file IfxAsclin_PinMap.h.

◆ IfxAsclin22_TX_P10_4_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin22_TX_P10_4_OUT

Transmit output.

Definition at line 318 of file IfxAsclin_PinMap.h.

◆ IfxAsclin23_RXA_P10_6_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin23_RXA_P10_6_IN

Receive input.

Definition at line 159 of file IfxAsclin_PinMap.h.

◆ IfxAsclin23_RXB_P10_7_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin23_RXB_P10_7_IN

Receive input.

Definition at line 160 of file IfxAsclin_PinMap.h.

◆ IfxAsclin23_TX_P10_7_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin23_TX_P10_7_OUT

Transmit output.

Definition at line 319 of file IfxAsclin_PinMap.h.

◆ IfxAsclin23_TX_P10_8_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin23_TX_P10_8_OUT

Transmit output.

Definition at line 320 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_CTSA_P10_7_IN

IFX_EXTERN IfxAsclin_Cts_In IfxAsclin2_CTSA_P10_7_IN

Clear to send input.

Definition at line 106 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_CTSB_P33_5_IN

IFX_EXTERN IfxAsclin_Cts_In IfxAsclin2_CTSB_P33_5_IN

Clear to send input.

Definition at line 107 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_RTS_P10_8_OUT

IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin2_RTS_P10_8_OUT

Ready to send output.

Definition at line 112 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_RTS_P33_4_OUT

IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin2_RTS_P33_4_OUT

Ready to send output.

Definition at line 113 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_RXA_P14_3_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXA_P14_3_IN

Receive input.

Definition at line 161 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_RXB_P02_1_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXB_P02_1_IN

Receive input.

Definition at line 162 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_RXC_P02_10_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXC_P02_10_IN

Receive input.

Definition at line 163 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_RXD_P10_6_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXD_P10_6_IN

Receive input.

Definition at line 164 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_RXE_P33_8_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXE_P33_8_IN

Receive input.

Definition at line 165 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_RXF_P32_6_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXF_P32_6_IN

Receive input.

Definition at line 166 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_RXG_P02_0_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXG_P02_0_IN

Receive input.

Definition at line 167 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_SCLK_P02_4_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P02_4_OUT

Shift clock output.

Definition at line 216 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_SCLK_P10_6_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P10_6_OUT

Shift clock output.

Definition at line 217 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_SCLK_P14_2_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P14_2_OUT

Shift clock output.

Definition at line 218 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_SCLK_P33_7_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_7_OUT

Shift clock output.

Definition at line 219 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_SCLK_P33_9_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_9_OUT

Shift clock output.

Definition at line 220 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_SLSO_P02_3_OUT

IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin2_SLSO_P02_3_OUT

Slave select signal output.

Definition at line 251 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_SLSO_P10_5_OUT

IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin2_SLSO_P10_5_OUT

Slave select signal output.

Definition at line 252 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_SLSO_P33_6_OUT

IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin2_SLSO_P33_6_OUT

Slave select signal output.

Definition at line 253 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_TX_P02_0_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P02_0_OUT

Transmit output.

Definition at line 321 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_TX_P02_9_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P02_9_OUT

Transmit output.

Definition at line 322 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_TX_P10_5_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P10_5_OUT

Transmit output.

Definition at line 323 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_TX_P14_2_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P14_2_OUT

Transmit output.

Definition at line 324 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_TX_P14_3_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P14_3_OUT

Transmit output.

Definition at line 325 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_TX_P32_5_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P32_5_OUT

Transmit output.

Definition at line 326 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_TX_P33_8_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P33_8_OUT

Transmit output.

Definition at line 327 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_TX_P33_9_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P33_9_OUT

Transmit output.

Definition at line 328 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_CTSA_P00_12_IN

IFX_EXTERN IfxAsclin_Cts_In IfxAsclin3_CTSA_P00_12_IN

Clear to send input.

Definition at line 108 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_RTS_P00_9_OUT

IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin3_RTS_P00_9_OUT

Ready to send output.

Definition at line 114 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_RXA_P15_7_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXA_P15_7_IN

Receive input.

Definition at line 168 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_RXB_P11_0_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXB_P11_0_IN

Receive input.

Definition at line 169 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_RXC_P20_3_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXC_P20_3_IN

Receive input.

Definition at line 170 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_RXD_P32_2_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXD_P32_2_IN

Receive input.

Definition at line 171 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_RXE_P00_1_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXE_P00_1_IN

Receive input.

Definition at line 172 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_RXF_P21_6_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXF_P21_6_IN

Receive input.

Definition at line 173 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_RXG_P21_2_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXG_P21_2_IN

Differential Receive input (low active)

Definition at line 174 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_RXG_P21_3_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXG_P21_3_IN

Differential Receive input (high active)

Definition at line 175 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_RXH_P13_12_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXH_P13_12_IN

Receive input.

Definition at line 176 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_SCLK_P00_0_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_0_OUT

Shift clock output.

Definition at line 221 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_SCLK_P00_2_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_2_OUT

Shift clock output.

Definition at line 222 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_SCLK_P11_1_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P11_1_OUT

Shift clock output.

Definition at line 223 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_SCLK_P11_4_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P11_4_OUT

Shift clock output.

Definition at line 224 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_SCLK_P15_6_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_6_OUT

Shift clock output.

Definition at line 225 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_SCLK_P15_8_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_8_OUT

Shift clock output.

Definition at line 226 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_SCLK_P20_0_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P20_0_OUT

Shift clock output.

Definition at line 227 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_SCLK_P21_5_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_5_OUT

Shift clock output.

Definition at line 228 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_SCLK_P21_7_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_7_OUT

Shift clock output.

Definition at line 229 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_SCLK_P32_3_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P32_3_OUT

Shift clock output.

Definition at line 230 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_SCLK_P33_2_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P33_2_OUT

Shift clock output.

Definition at line 231 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_SLSO_P00_3_OUT

IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P00_3_OUT

Slave select signal output.

Definition at line 254 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_SLSO_P12_1_OUT

IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P12_1_OUT

Slave select signal output.

Definition at line 255 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_SLSO_P14_3_OUT

IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P14_3_OUT

Slave select signal output.

Definition at line 256 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_SLSO_P21_2_OUT

IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_2_OUT

Slave select signal output.

Definition at line 257 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_SLSO_P21_6_OUT

IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_6_OUT

Slave select signal output.

Definition at line 258 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_SLSO_P33_1_OUT

IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P33_1_OUT

Slave select signal output.

Definition at line 259 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_TX_P00_0_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P00_0_OUT

Transmit output.

Definition at line 329 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_TX_P00_1_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P00_1_OUT

Transmit output.

Definition at line 330 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_TX_P11_0_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P11_0_OUT

Transmit output.

Definition at line 331 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_TX_P11_1_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P11_1_OUT

Transmit output.

Definition at line 332 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_TX_P13_9_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P13_9_OUT

Transmit output.

Definition at line 333 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_TX_P15_6_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P15_6_OUT

Transmit output.

Definition at line 334 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_TX_P15_7_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P15_7_OUT

Transmit output.

Definition at line 335 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_TX_P20_0_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P20_0_OUT

Transmit output.

Definition at line 336 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_TX_P20_3_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P20_3_OUT

Transmit output.

Definition at line 337 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_TX_P21_7_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P21_7_OUT

Transmit output.

Definition at line 338 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_TX_P22_0_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P22_0_OUT

Differential Transmit output (low active)

Definition at line 339 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_TX_P22_1_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P22_1_OUT

Differential Transmit output (high active)

Definition at line 340 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_TX_P32_2_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P32_2_OUT

Transmit output.

Definition at line 341 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_TX_P32_3_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P32_3_OUT

Transmit output.

Definition at line 342 of file IfxAsclin_PinMap.h.

◆ IfxAsclin4_RXA_P00_12_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin4_RXA_P00_12_IN

Receive input.

Definition at line 177 of file IfxAsclin_PinMap.h.

◆ IfxAsclin4_RXB_P34_2_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin4_RXB_P34_2_IN

Receive input.

Definition at line 178 of file IfxAsclin_PinMap.h.

◆ IfxAsclin4_RXC_P22_6_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin4_RXC_P22_6_IN

Receive input.

Definition at line 179 of file IfxAsclin_PinMap.h.

◆ IfxAsclin4_RXD_P22_9_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin4_RXD_P22_9_IN

Receive input.

Definition at line 180 of file IfxAsclin_PinMap.h.

◆ IfxAsclin4_SCLK_P00_10_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin4_SCLK_P00_10_OUT

Shift clock output.

Definition at line 232 of file IfxAsclin_PinMap.h.

◆ IfxAsclin4_SCLK_P22_7_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin4_SCLK_P22_7_OUT

Shift clock output.

Definition at line 233 of file IfxAsclin_PinMap.h.

◆ IfxAsclin4_SCLK_P34_3_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin4_SCLK_P34_3_OUT

Shift clock output.

Definition at line 234 of file IfxAsclin_PinMap.h.

◆ IfxAsclin4_SLSO_P00_11_OUT

IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin4_SLSO_P00_11_OUT

Slave select signal output.

Definition at line 260 of file IfxAsclin_PinMap.h.

◆ IfxAsclin4_SLSO_P22_11_OUT

IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin4_SLSO_P22_11_OUT

Slave select signal output.

Definition at line 261 of file IfxAsclin_PinMap.h.

◆ IfxAsclin4_SLSO_P22_4_OUT

IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin4_SLSO_P22_4_OUT

Slave select signal output.

Definition at line 262 of file IfxAsclin_PinMap.h.

◆ IfxAsclin4_SLSO_P34_4_OUT

IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin4_SLSO_P34_4_OUT

Slave select signal output.

Definition at line 263 of file IfxAsclin_PinMap.h.

◆ IfxAsclin4_TX_P00_9_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin4_TX_P00_9_OUT

Transmit output.

Definition at line 343 of file IfxAsclin_PinMap.h.

◆ IfxAsclin4_TX_P22_10_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin4_TX_P22_10_OUT

Transmit output.

Definition at line 344 of file IfxAsclin_PinMap.h.

◆ IfxAsclin4_TX_P22_5_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin4_TX_P22_5_OUT

Transmit output.

Definition at line 345 of file IfxAsclin_PinMap.h.

◆ IfxAsclin4_TX_P34_1_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin4_TX_P34_1_OUT

Transmit output.

Definition at line 346 of file IfxAsclin_PinMap.h.

◆ IfxAsclin5_RXA_P00_6_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin5_RXA_P00_6_IN

Receive input.

Definition at line 181 of file IfxAsclin_PinMap.h.

◆ IfxAsclin5_RXB_P33_4_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin5_RXB_P33_4_IN

Receive input.

Definition at line 182 of file IfxAsclin_PinMap.h.

◆ IfxAsclin5_RXC_P22_3_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin5_RXC_P22_3_IN

Receive input.

Definition at line 183 of file IfxAsclin_PinMap.h.

◆ IfxAsclin5_RXD_P14_15_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin5_RXD_P14_15_IN

Receive input.

Definition at line 184 of file IfxAsclin_PinMap.h.

◆ IfxAsclin5_SCLK_P14_12_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin5_SCLK_P14_12_OUT

Shift clock output.

Definition at line 235 of file IfxAsclin_PinMap.h.

◆ IfxAsclin5_SCLK_P22_8_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin5_SCLK_P22_8_OUT

Shift clock output.

Definition at line 236 of file IfxAsclin_PinMap.h.

◆ IfxAsclin5_SCLK_P33_3_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin5_SCLK_P33_3_OUT

Shift clock output.

Definition at line 237 of file IfxAsclin_PinMap.h.

◆ IfxAsclin5_SLSO_P14_8_OUT

IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin5_SLSO_P14_8_OUT

Slave select signal output.

Definition at line 264 of file IfxAsclin_PinMap.h.

◆ IfxAsclin5_SLSO_P33_5_OUT

IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin5_SLSO_P33_5_OUT

Slave select signal output.

Definition at line 265 of file IfxAsclin_PinMap.h.

◆ IfxAsclin5_TX_P00_7_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin5_TX_P00_7_OUT

Transmit output.

Definition at line 347 of file IfxAsclin_PinMap.h.

◆ IfxAsclin5_TX_P14_14_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin5_TX_P14_14_OUT

Transmit output.

Definition at line 348 of file IfxAsclin_PinMap.h.

◆ IfxAsclin5_TX_P22_2_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin5_TX_P22_2_OUT

Transmit output.

Definition at line 349 of file IfxAsclin_PinMap.h.

◆ IfxAsclin5_TX_P33_0_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin5_TX_P33_0_OUT

Transmit output.

Definition at line 350 of file IfxAsclin_PinMap.h.

◆ IfxAsclin6_RXA_P23_3_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin6_RXA_P23_3_IN

Receive input.

Definition at line 185 of file IfxAsclin_PinMap.h.

◆ IfxAsclin6_RXB_P01_0_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin6_RXB_P01_0_IN

Receive input.

Definition at line 186 of file IfxAsclin_PinMap.h.

◆ IfxAsclin6_RXC_P32_6_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin6_RXC_P32_6_IN

Receive input.

Definition at line 187 of file IfxAsclin_PinMap.h.

◆ IfxAsclin6_RXD_P10_9_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin6_RXD_P10_9_IN

Receive input.

Definition at line 188 of file IfxAsclin_PinMap.h.

◆ IfxAsclin6_RXE_P22_0_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin6_RXE_P22_0_IN

Receive input.

Definition at line 189 of file IfxAsclin_PinMap.h.

◆ IfxAsclin6_RXF_P23_1_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin6_RXF_P23_1_IN

Receive input.

Definition at line 190 of file IfxAsclin_PinMap.h.

◆ IfxAsclin6_SCLK_P02_14_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin6_SCLK_P02_14_OUT

Shift clock output.

Definition at line 238 of file IfxAsclin_PinMap.h.

◆ IfxAsclin6_SCLK_P10_11_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin6_SCLK_P10_11_OUT

Shift clock output.

Definition at line 239 of file IfxAsclin_PinMap.h.

◆ IfxAsclin6_SCLK_P23_1_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin6_SCLK_P23_1_OUT

Shift clock output.

Definition at line 240 of file IfxAsclin_PinMap.h.

◆ IfxAsclin6_SLSO_P02_12_OUT

IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin6_SLSO_P02_12_OUT

Slave select signal output.

Definition at line 266 of file IfxAsclin_PinMap.h.

◆ IfxAsclin6_SLSO_P10_13_OUT

IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin6_SLSO_P10_13_OUT

Slave select signal output.

Definition at line 267 of file IfxAsclin_PinMap.h.

◆ IfxAsclin6_SLSO_P23_4_OUT

IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin6_SLSO_P23_4_OUT

Slave select signal output.

Definition at line 268 of file IfxAsclin_PinMap.h.

◆ IfxAsclin6_TX_P01_1_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin6_TX_P01_1_OUT

Transmit output.

Definition at line 351 of file IfxAsclin_PinMap.h.

◆ IfxAsclin6_TX_P02_15_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin6_TX_P02_15_OUT

Transmit output.

Definition at line 352 of file IfxAsclin_PinMap.h.

◆ IfxAsclin6_TX_P10_10_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin6_TX_P10_10_OUT

Transmit output.

Definition at line 353 of file IfxAsclin_PinMap.h.

◆ IfxAsclin6_TX_P22_0_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin6_TX_P22_0_OUT

Transmit output.

Definition at line 354 of file IfxAsclin_PinMap.h.

◆ IfxAsclin6_TX_P23_5_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin6_TX_P23_5_OUT

Transmit output.

Definition at line 355 of file IfxAsclin_PinMap.h.

◆ IfxAsclin6_TX_P32_7_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin6_TX_P32_7_OUT

Transmit output.

Definition at line 356 of file IfxAsclin_PinMap.h.

◆ IfxAsclin7_RXA_P14_15_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin7_RXA_P14_15_IN

Receive input.

Definition at line 191 of file IfxAsclin_PinMap.h.

◆ IfxAsclin7_RXB_P01_8_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin7_RXB_P01_8_IN

Receive input.

Definition at line 192 of file IfxAsclin_PinMap.h.

◆ IfxAsclin7_RXC_P23_2_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin7_RXC_P23_2_IN

Receive input.

Definition at line 193 of file IfxAsclin_PinMap.h.

◆ IfxAsclin7_RXD_P13_11_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin7_RXD_P13_11_IN

Receive input.

Definition at line 194 of file IfxAsclin_PinMap.h.

◆ IfxAsclin7_RXE_P22_1_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin7_RXE_P22_1_IN

Receive input.

Definition at line 195 of file IfxAsclin_PinMap.h.

◆ IfxAsclin7_RXF_P22_4_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin7_RXF_P22_4_IN

Receive input.

Definition at line 196 of file IfxAsclin_PinMap.h.

◆ IfxAsclin7_SCLK_P01_10_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin7_SCLK_P01_10_OUT

Shift clock output.

Definition at line 241 of file IfxAsclin_PinMap.h.

◆ IfxAsclin7_SCLK_P13_13_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin7_SCLK_P13_13_OUT

Shift clock output.

Definition at line 242 of file IfxAsclin_PinMap.h.

◆ IfxAsclin7_SCLK_P14_12_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin7_SCLK_P14_12_OUT

Shift clock output.

Definition at line 243 of file IfxAsclin_PinMap.h.

◆ IfxAsclin7_SLSO_P01_11_OUT

IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin7_SLSO_P01_11_OUT

Slave select signal output.

Definition at line 269 of file IfxAsclin_PinMap.h.

◆ IfxAsclin7_SLSO_P13_15_OUT

IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin7_SLSO_P13_15_OUT

Slave select signal output.

Definition at line 270 of file IfxAsclin_PinMap.h.

◆ IfxAsclin7_SLSO_P14_8_OUT

IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin7_SLSO_P14_8_OUT

Slave select signal output.

Definition at line 271 of file IfxAsclin_PinMap.h.

◆ IfxAsclin7_TX_P01_12_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin7_TX_P01_12_OUT

Transmit output.

Definition at line 357 of file IfxAsclin_PinMap.h.

◆ IfxAsclin7_TX_P01_9_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin7_TX_P01_9_OUT

Transmit output.

Definition at line 358 of file IfxAsclin_PinMap.h.

◆ IfxAsclin7_TX_P13_12_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin7_TX_P13_12_OUT

Transmit output.

Definition at line 359 of file IfxAsclin_PinMap.h.

◆ IfxAsclin7_TX_P14_14_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin7_TX_P14_14_OUT

Transmit output.

Definition at line 360 of file IfxAsclin_PinMap.h.

◆ IfxAsclin7_TX_P22_1_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin7_TX_P22_1_OUT

Transmit output.

Definition at line 361 of file IfxAsclin_PinMap.h.

◆ IfxAsclin7_TX_P23_3_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin7_TX_P23_3_OUT

Transmit output.

Definition at line 362 of file IfxAsclin_PinMap.h.

◆ IfxAsclin8_RXA_P02_9_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin8_RXA_P02_9_IN

Receive input.

Definition at line 197 of file IfxAsclin_PinMap.h.

◆ IfxAsclin8_RXB_P02_10_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin8_RXB_P02_10_IN

Receive input.

Definition at line 198 of file IfxAsclin_PinMap.h.

◆ IfxAsclin8_RXC_P33_1_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin8_RXC_P33_1_IN

Receive input.

Definition at line 199 of file IfxAsclin_PinMap.h.

◆ IfxAsclin8_RXD_P33_6_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin8_RXD_P33_6_IN

Receive input.

Definition at line 200 of file IfxAsclin_PinMap.h.

◆ IfxAsclin8_RXE_P34_5_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin8_RXE_P34_5_IN

Receive input.

Definition at line 201 of file IfxAsclin_PinMap.h.

◆ IfxAsclin8_SCLK_P02_8_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin8_SCLK_P02_8_OUT

Shift clock output.

Definition at line 244 of file IfxAsclin_PinMap.h.

◆ IfxAsclin8_SLSO_P02_11_OUT

IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin8_SLSO_P02_11_OUT

Slave select signal output.

Definition at line 272 of file IfxAsclin_PinMap.h.

◆ IfxAsclin8_TX_P02_9_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin8_TX_P02_9_OUT

Transmit output.

Definition at line 363 of file IfxAsclin_PinMap.h.

◆ IfxAsclin8_TX_P33_7_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin8_TX_P33_7_OUT

Transmit output.

Definition at line 364 of file IfxAsclin_PinMap.h.

◆ IfxAsclin8_TX_P34_5_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin8_TX_P34_5_OUT

Transmit output.

Definition at line 365 of file IfxAsclin_PinMap.h.

◆ IfxAsclin9_RXA_P01_5_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin9_RXA_P01_5_IN

Receive input.

Definition at line 202 of file IfxAsclin_PinMap.h.

◆ IfxAsclin9_RXB_P01_7_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin9_RXB_P01_7_IN

Receive input.

Definition at line 203 of file IfxAsclin_PinMap.h.

◆ IfxAsclin9_RXC_P14_7_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin9_RXC_P14_7_IN

Receive input.

Definition at line 204 of file IfxAsclin_PinMap.h.

◆ IfxAsclin9_RXD_P14_9_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin9_RXD_P14_9_IN

Receive input.

Definition at line 205 of file IfxAsclin_PinMap.h.

◆ IfxAsclin9_RXE_P20_6_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin9_RXE_P20_6_IN

Receive input.

Definition at line 206 of file IfxAsclin_PinMap.h.

◆ IfxAsclin9_RXF_P20_7_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin9_RXF_P20_7_IN

Receive input.

Definition at line 207 of file IfxAsclin_PinMap.h.

◆ IfxAsclin9_SCLK_P01_6_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin9_SCLK_P01_6_OUT

Shift clock output.

Definition at line 245 of file IfxAsclin_PinMap.h.

◆ IfxAsclin9_SLSO_P01_4_OUT

IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin9_SLSO_P01_4_OUT

Slave select signal output.

Definition at line 273 of file IfxAsclin_PinMap.h.

◆ IfxAsclin9_TX_P01_7_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin9_TX_P01_7_OUT

Transmit output.

Definition at line 366 of file IfxAsclin_PinMap.h.

◆ IfxAsclin9_TX_P14_7_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin9_TX_P14_7_OUT

Transmit output.

Definition at line 367 of file IfxAsclin_PinMap.h.

◆ IfxAsclin9_TX_P20_7_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin9_TX_P20_7_OUT

Transmit output.

Definition at line 368 of file IfxAsclin_PinMap.h.

◆ IfxAsclin_Cts_In_pinTable

IFX_EXTERN const IfxAsclin_Cts_In* IfxAsclin_Cts_In_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS]

IfxAsclin_Cts_In table.

Definition at line 381 of file IfxAsclin_PinMap.h.

◆ IfxAsclin_Rts_Out_pinTable

IFX_EXTERN const IfxAsclin_Rts_Out* IfxAsclin_Rts_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS]

IfxAsclin_Rts_Out table.

Definition at line 384 of file IfxAsclin_PinMap.h.

◆ IfxAsclin_Rx_In_pinTable

IFX_EXTERN const IfxAsclin_Rx_In* IfxAsclin_Rx_In_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS]

IfxAsclin_Rx_In table.

Definition at line 387 of file IfxAsclin_PinMap.h.

◆ IfxAsclin_Sclk_Out_pinTable

IFX_EXTERN const IfxAsclin_Sclk_Out* IfxAsclin_Sclk_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS]

IfxAsclin_Sclk_Out table.

Definition at line 390 of file IfxAsclin_PinMap.h.

◆ IfxAsclin_Slso_Out_pinTable

IFX_EXTERN const IfxAsclin_Slso_Out* IfxAsclin_Slso_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS]

IfxAsclin_Slso_Out table.

Definition at line 393 of file IfxAsclin_PinMap.h.

◆ IfxAsclin_Tx_Out_pinTable

IFX_EXTERN const IfxAsclin_Tx_Out* IfxAsclin_Tx_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS]

IfxAsclin_Tx_Out table.

Definition at line 396 of file IfxAsclin_PinMap.h.


iLLD_TC38A: How to use the ASCLIN ASC Interface driver?

How to use the ASCLIN ASC Interface driver?
iLLD » ASCLIN
Collaboration diagram for How to use the ASCLIN ASC Interface driver?:

The ASC interface driver provides a default ASCLIN configuration for asynchronous serial communication in 8bit mode, and a set of data transfer routines.

Data transfers are buffered by the hardware based FIFOs, and in addition by software based FIFOs with a configurable size. Incoming and outgoing data is transfered in background from/to the ASCLIN peripheral by interrupt service handlers, which are part of this driver as well. This allows a nonblocking communication without stalling the thread(s) from where data is sent and received.

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Asclin/Asc/IfxAsclin_Asc.h>

Variables

Declare the ASC handle and the FIFOs as global variables in your C code:

// used globally
static IfxAsclin_Asc asc;
#define ASC_TX_BUFFER_SIZE 64
static uint8 ascTxBuffer[ASC_TX_BUFFER_SIZE + sizeof(Ifx_Fifo) + 8];
#define ASC_RX_BUFFER_SIZE 64
static uint8 ascRxBuffer[ASC_RX_BUFFER_SIZE + sizeof(Ifx_Fifo) + 8];

As you can see above, the transfer buffers allocate not only memory for the data itself, but also for FIFO runtime variables. 8 bytes have to be added to ensure a proper circular buffer handling independent from the address to which the buffers have been located.

Interrupt Handler Installation

See also How to define Interrupts?

Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:

// priorities are normally defined in Ifx_IntPrioDef.h
#define IFX_INTPRIO_ASCLIN0_TX 1
#define IFX_INTPRIO_ASCLIN0_RX 2
#define IFX_INTPRIO_ASCLIN0_ER 3

Add the interrupt service routines to your C code. They have to call the ASC interrupt handlers by passing the asc handle:

IFX_INTERRUPT(asclin0TxISR, 0, IFX_INTPRIO_ASCLIN0_TX)
{
IfxAsclin_Asc_isrTransmit(&asc);
}
IFX_INTERRUPT(asclin0RxISR, 0, IFX_INTPRIO_ASCLIN0_RX)
{
IfxAsclin_Asc_isrReceive(&asc);
}
IFX_INTERRUPT(asclin0ErISR, 0, IFX_INTPRIO_ASCLIN0_ER)
{
IfxAsclin_Asc_isrError(&asc);
}

Finally install the interrupt handlers in your initialisation function:

// install interrupt handlers
IfxCpu_Irq_installInterruptHandler(&asclin0TxISR, IFX_INTPRIO_ASCLIN0_TX);
IfxCpu_Irq_installInterruptHandler(&asclin0RxISR, IFX_INTPRIO_ASCLIN0_RX);
IfxCpu_Irq_installInterruptHandler(&asclin0ErISR, IFX_INTPRIO_ASCLIN0_ER);
IfxCpu_enableInterrupts();

Module Initialisation

The module initialisation can be done in the same function. Here an example:

// create module config
IfxAsclin_Asc_Config ascConfig;
IfxAsclin_Asc_initModuleConfig(&ascConfig, &MODULE_ASCLIN0);
// set the desired baudrate
ascConfig.baudrate.prescaler = 1;
ascConfig.baudrate.baudrate = 1000000; // FDR values will be calculated in initModule
// ISR priorities and interrupt target
ascConfig.interrupt.txPriority = IFX_INTPRIO_ASCLIN0_TX;
ascConfig.interrupt.rxPriority = IFX_INTPRIO_ASCLIN0_RX;
ascConfig.interrupt.erPriority = IFX_INTPRIO_ASCLIN0_ER;
ascConfig.interrupt.typeOfService = IfxCpu_Irq_getTos(IfxCpu_getCoreIndex());
// FIFO configuration
ascConfig.txBuffer = &ascTxBuffer;
ascConfig.txBufferSize = ASC_TX_BUFFER_SIZE;
ascConfig.rxBuffer = &ascRxBuffer;
ascConfig.rxBufferSize = ASC_RX_BUFFER_SIZE;
// pin configuration
const IfxAsclin_Asc_Pins pins = {
NULL, IfxPort_InputMode_pullUp, // CTS pin not used
&IfxAsclin0_RXA_P14_1_IN, IfxPort_InputMode_pullUp, // Rx pin
NULL, IfxPort_OutputMode_pushPull, // RTS pin not used
&IfxAsclin0_TX_P14_0_OUT, IfxPort_OutputMode_pushPull, // Tx pin
IfxPort_PadDriver_cmosAutomotiveSpeed1
};
ascConfig.pins = &pins;
// initialize module
//IfxAsclin_Asc asc; // defined globally
IfxAsclin_Asc_initModule(&asc, &ascConfig);

The ASC is ready for use now!

Data Transfers

Simple Transfers

The ASC driver provides simple to use transfer functions, which are blocking.

This means: you can send as much data as you want without taking care for the fill state of the FIFO. If the FIFO is full, the blocking function will wait until the next byte has been transfered to ASCLIN before putting the new byte into the FIFO:

// send 3 bytes
IfxAsclin_Asc_blockingWrite(&asc, 0x01);
IfxAsclin_Asc_blockingWrite(&asc, 0x02);
IfxAsclin_Asc_blockingWrite(&asc, 0x03);

A simple to use receive function is available as well. If no data is in the receive FIFO, it will wait until the next byte has been received:

// receive a byte
uint8 data = IfxAsclin_Asc_blockingRead(&asc);

Streamed Transfers

Streamed transfers are handled faster by the ASC driver and therefore they are recommended whenever a large bulk of data should be sent. Here an example:

uint8 txData[9] = { 0x49, 0x6e, 0x66, 0x69, 0x6e, 0x65, 0x6f, 0x6e, 0x0a };
{
Ifx_SizeT count = 9;
IfxAsclin_Asc_write(&asc, txData, &count, TIME_INFINITE);
}

Data can be received the following way:

uint8 rxData[5];
{
// wait until 5 bytes have been received
Ifx_SizeT count = 5;
IfxAsclin_Asc_read(&asc, rxData, &count, TIME_INFINITE);
}

Or alternatively with:

uint8 rxData[5];
{
// how many bytes have been received?
Ifx_SizeT count = IfxAsclin_Asc_getReadCount(&asc);
// limit to our buffer size
count = count < 5 ? count : 5;
// transfer received data into buffer
IfxAsclin_Asc_read(&asc, rxData, &count, TIME_INFINITE);
}


iLLD_TC38A: ASC

Modules
ASC
iLLD » ASCLIN
Collaboration diagram for ASC:

Modules

Data Structures
Interrupt Functions
Simple Communication
Stream based Communication (STDIO)
Module Functions

Detailed Description


iLLD_TC38A: Data Structures

Data Structures
Data Structures
iLLD » ASCLIN » ASC
Collaboration diagram for Data Structures:

Data Structures

struct | IfxAsclin_Asc_BaudRate
Structure for baudrate. More...
struct | IfxAsclin_Asc_BitTimingControl
Structure for bit timings. More...
struct | IfxAsclin_Asc_FifoControl
Structure for FIFO control. More...
struct | IfxAsclin_Asc_FrameControl
Structure for frame control. More...
struct | IfxAsclin_Asc_InterruptConfig
Structure for interrupt configuration. More...
struct | IfxAsclin_Asc_Pins
Structure for ASC pin configuration. More...
struct | IfxAsclin_Asc
Module Handle. More...
struct | IfxAsclin_Asc_Config
Configuration structure of the module. More...

Detailed Description

Data Structure Documentation

◆ IfxAsclin_Asc_BaudRate

struct IfxAsclin_Asc_BaudRate

Structure for baudrate.

Definition at line 262 of file IfxAsclin_Asc.h.

Data Fields
float32 | baudrate | value of the required baudrate
IfxAsclin_OversamplingFactor | oversampling | BITCON.OVERSAMPLING, division ratio of the baudrate post devider.
uint16 | prescaler | BITCON.PRESCALER, the division ratio of the predevider.

◆ IfxAsclin_Asc_BitTimingControl

struct IfxAsclin_Asc_BitTimingControl

Structure for bit timings.

Definition at line 271 of file IfxAsclin_Asc.h.

Data Fields
IfxAsclin_SamplesPerBit | medianFilter | BITCON.SM, number of samples per bit (1 or 3), sample mode/median filter.
IfxAsclin_SamplePointPosition | samplePointPosition | BITCON.SAMPLEPOINT, sample point position.

◆ IfxAsclin_Asc_FifoControl

struct IfxAsclin_Asc_FifoControl

Structure for FIFO control.

Definition at line 279 of file IfxAsclin_Asc.h.

Data Fields
IfxAsclin_ReceiveBufferMode | buffMode | RXFIFOCON.BUFF, receive buffer mode (Rx FIFO or Rx buffer)
IfxAsclin_TxFifoInletWidth | inWidth | TXFIFOCON.INW, transmit FIFO inlet width.
IfxAsclin_RxFifoOutletWidth | outWidth | RXFIFOCON.OTW, receive FIFO oulet width.
IfxAsclin_RxFifoInterruptLevel | rxFifoInterruptLevel | RXFIFOCON.INTLEVEL, Rx FIFO interrupt level.
IfxAsclin_FifoInterruptMode | rxFifoInterruptMode | RXFIFOCON.FM, Rx FIFO interrupt generation mode.
IfxAsclin_TxFifoInterruptLevel | txFifoInterruptLevel | TXFIFOCON.INTLEVEL, Tx FIFO interrupt level.
IfxAsclin_FifoInterruptMode | txFifoInterruptMode | TXFIFOCON.FM, Tx FIFO interrupt generation mode.

◆ IfxAsclin_Asc_FrameControl

struct IfxAsclin_Asc_FrameControl

Structure for frame control.

Definition at line 292 of file IfxAsclin_Asc.h.

Data Fields
IfxAsclin_DataLength | dataLength | DATCON.DATALENGTH, data length, number of bits per transfer.
IfxAsclin_FrameMode | frameMode | FRAMECON.MODE, mode of operation of the module.
IfxAsclin_IdleDelay | idleDelay | FRAMECON.IDLE, idle delay.
boolean | parityBit | FRAMECON.PEN, parity enable.
IfxAsclin_ParityType | parityType | FRAMECON.ODD, parity type (even or odd)
IfxAsclin_ShiftDirection | shiftDir | FRAMECON.MSB, shift direction.
IfxAsclin_StopBit | stopBit | FRAMECON.STOP, number of stop bits.

◆ IfxAsclin_Asc_InterruptConfig

struct IfxAsclin_Asc_InterruptConfig

Structure for interrupt configuration.

Definition at line 305 of file IfxAsclin_Asc.h.

Data Fields
uint16 | erPriority | error interrupt priority
uint16 | rxPriority | receive interrupt priority
uint16 | txPriority | transmit interrupt priority
IfxSrc_Tos | typeOfService | type of interrupt service

◆ IfxAsclin_Asc_Pins

struct IfxAsclin_Asc_Pins

Structure for ASC pin configuration.

Definition at line 315 of file IfxAsclin_Asc.h.

Collaboration diagram for IfxAsclin_Asc_Pins:
[legend]
Data Fields
IFX_CONST IfxAsclin_Cts_In * | cts | ASC clear to send (CTS) pin.
IfxPort_InputMode | ctsMode | Cts pin as input.
IfxPort_PadDriver | pinDriver | pad driver
IFX_CONST IfxAsclin_Rts_Out * | rts | ASC (request to send) RTS pin.
IfxPort_OutputMode | rtsMode | Rts as output.
IFX_CONST IfxAsclin_Rx_In * | rx | ASC Rx pin.
IfxPort_InputMode | rxMode | Rx pin as input.
IFX_CONST IfxAsclin_Tx_Out * | tx | ASC Tx pin.
IfxPort_OutputMode | txMode | Tx as output.

◆ IfxAsclin_Asc

struct IfxAsclin_Asc

Module Handle.

Definition at line 342 of file IfxAsclin_Asc.h.

Collaboration diagram for IfxAsclin_Asc:
[legend]
Data Fields
Ifx_ASCLIN * | asclin | pointer to ASCLIN registers
Ifx_DataBufferMode | dataBufferMode | Rx buffer mode.
IfxAsclin_Asc_ErrorFlagsUnion | errorFlags | error reported by ASCLIN during runtime (written by IfxAsclin_Asc_isrError)
Ifx_Fifo * | rx | Receive FIFO buffer.
volatile boolean | rxSwFifoOverflow | Will be set by IfxAsclin_Asc_isrReceive if the SW Fifo overflowed.
volatile uint32 | sendCount | Number of byte that are send out, this value is reset with the function Asc_If_resetSendCount()
Ifx_Fifo * | tx | Transmit FIFO buffer.
volatile boolean | txInProgress | Ongoing transfer. Will be set by IfxAsclin_Asc_initiateTransmission, and cleared by IfxAsclin_Asc_isrTransmit.
volatile Ifx_TickTime | txTimestamp | Time stamp of the latest send byte.

◆ IfxAsclin_Asc_Config

struct IfxAsclin_Asc_Config

Configuration structure of the module.

Definition at line 357 of file IfxAsclin_Asc.h.

Collaboration diagram for IfxAsclin_Asc_Config:
[legend]
Data Fields
Ifx_ASCLIN * | asclin | pointer to ASCLIN registers
IfxAsclin_Asc_BaudRate | baudrate | structure for baudrate
IfxAsclin_Asc_BitTimingControl | bitTiming | structure for bit timings
IfxAsclin_ClockSource | clockSource | CSR.CLKSEL, clock source selection.
Ifx_DataBufferMode | dataBufferMode | Rx buffer mode.
IfxAsclin_Asc_ErrorFlagsUnion | errorFlags | structure for error flags
IfxAsclin_Asc_FifoControl | fifo | structure for FIFO control
IfxAsclin_Asc_FrameControl | frame | structure for frame control
IfxAsclin_Asc_InterruptConfig | interrupt | structure for interrupt configuration
boolean | loopBack | IOCR.LB, loop back mode selection, 0 for disable, 1 for enable.
IFX_CONST IfxAsclin_Asc_Pins * | pins | structure for ASC pins
void * | rxBuffer | The buffer parameter must point on a free memory location where the buffer object will be Initialised. The Size of this area must be at least equals to "rxBufferSize + sizeof(Ifx_Fifo) + 8". Not tacking this in account may result in unpredictable behavior. If set to NULL, the buffer will be allocated dynamically according to rxBufferSize
Ifx_SizeT | rxBufferSize | Size of the rx buffer.
void * | txBuffer | The buffer parameter must point on a free memory location where the buffer object will be Initialised. The Size of this area must be at least equals to "txBufferSize + sizeof(Ifx_Fifo) + 8". Not tacking this in account may result in unpredictable behavior. If set to NULL_PTR, the buffer will be allocated dynamically according to txBufferSize
Ifx_SizeT | txBufferSize | Size of the tx buffer.


iLLD_TC38A: Interrupt Functions

Functions
Interrupt Functions
iLLD » ASCLIN » ASC
Collaboration diagram for Interrupt Functions:

Functions

IFX_EXTERN void | IfxAsclin_Asc_isrError (IfxAsclin_Asc *asclin)
ISR error routine. More...
IFX_EXTERN void | IfxAsclin_Asc_isrReceive (IfxAsclin_Asc *asclin)
ISR receive routine. More...
IFX_EXTERN void | IfxAsclin_Asc_isrTransmit (IfxAsclin_Asc *asclin)
ISR transmit routine. More...

Detailed Description

Function Documentation

◆ IfxAsclin_Asc_isrError()

IFX_EXTERN void IfxAsclin_Asc_isrError ( IfxAsclin_Asc * asclin )

ISR error routine.

See also
IfxSdtIf_DPipe_OnError

Currently it only stores error flags in the handle (asclin->errorFlags) whenever an error happened. The user software could react on these flags, e.g. it could re-initialize the module.

Parameters
asclin module handler
Returns
None

Definition at line 437 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_stdIfDPipeInit().

◆ IfxAsclin_Asc_isrReceive()

IFX_EXTERN void IfxAsclin_Asc_isrReceive ( IfxAsclin_Asc * asclin )

ISR receive routine.

See also
IfxSdtIf_DPipe_OnReceive
Parameters
asclin module handler
Returns
None

Definition at line 474 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_stdIfDPipeInit().

◆ IfxAsclin_Asc_isrTransmit()

IFX_EXTERN void IfxAsclin_Asc_isrTransmit ( IfxAsclin_Asc * asclin )

ISR transmit routine.

See also
IfxSdtIf_DPipe_OnTransmit
Parameters
asclin module handler
Returns
None

Definition at line 516 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_stdIfDPipeInit().


iLLD_TC38A: Simple Communication

Functions
Simple Communication
iLLD » ASCLIN » ASC
Collaboration diagram for Simple Communication:

Functions

IFX_EXTERN uint8 | IfxAsclin_Asc_blockingRead (IfxAsclin_Asc *asclin)
Reads data from the Rx FIFO. More...
IFX_EXTERN boolean | IfxAsclin_Asc_blockingWrite (IfxAsclin_Asc *asclin, uint8 data)
Writes data into the Tx FIFO. More...

Detailed Description

Function Documentation

◆ IfxAsclin_Asc_blockingRead()

IFX_EXTERN uint8 IfxAsclin_Asc_blockingRead ( IfxAsclin_Asc * asclin )

Reads data from the Rx FIFO.

Parameters
asclin module handle
Returns
number of received data words

A coding example can be found in How to use the ASCLIN ASC Interface driver?

Definition at line 53 of file IfxAsclin_Asc.c.

◆ IfxAsclin_Asc_blockingWrite()

IFX_EXTERN boolean IfxAsclin_Asc_blockingWrite | ( | IfxAsclin_Asc * | asclin,
 |  | uint8 | data
 | ) |  |

Writes data into the Tx FIFO.

Parameters
asclin | module handle
data | the data byte which should be sent
Returns
Returns TRUE if data could be written

A coding example can be found in How to use the ASCLIN ASC Interface driver?

Definition at line 65 of file IfxAsclin_Asc.c.


iLLD_TC38A: Stream based Communication (STDIO)

Functions
Stream based Communication (STDIO)
iLLD » ASCLIN » ASC
Collaboration diagram for Stream based Communication (STDIO):

Functions

IFX_EXTERN boolean | IfxAsclin_Asc_canReadCount (IfxAsclin_Asc *asclin, Ifx_SizeT count, Ifx_TickTime timeout)
IFX_EXTERN boolean | IfxAsclin_Asc_canWriteCount (IfxAsclin_Asc *asclin, Ifx_SizeT count, Ifx_TickTime timeout)
IFX_EXTERN void | IfxAsclin_Asc_clearRx (IfxAsclin_Asc *asclin)
IFX_EXTERN void | IfxAsclin_Asc_clearTx (IfxAsclin_Asc *asclin)
IFX_EXTERN boolean | IfxAsclin_Asc_flushTx (IfxAsclin_Asc *asclin, Ifx_TickTime timeout)
IFX_EXTERN sint32 | IfxAsclin_Asc_getReadCount (IfxAsclin_Asc *asclin)
IFX_EXTERN IfxStdIf_DPipe_ReadEvent | IfxAsclin_Asc_getReadEvent (IfxAsclin_Asc *asclin)
IFX_EXTERN uint32 | IfxAsclin_Asc_getSendCount (IfxAsclin_Asc *asclin)
IFX_EXTERN Ifx_TickTime | IfxAsclin_Asc_getTxTimeStamp (IfxAsclin_Asc *asclin)
IFX_EXTERN sint32 | IfxAsclin_Asc_getWriteCount (IfxAsclin_Asc *asclin)
IFX_EXTERN IfxStdIf_DPipe_WriteEvent | IfxAsclin_Asc_getWriteEvent (IfxAsclin_Asc *asclin)
IFX_EXTERN boolean | IfxAsclin_Asc_read (IfxAsclin_Asc *asclin, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
IFX_EXTERN void | IfxAsclin_Asc_resetSendCount (IfxAsclin_Asc *asclin)
IFX_EXTERN boolean | IfxAsclin_Asc_write (IfxAsclin_Asc *asclin, const void *data, Ifx_SizeT *count, Ifx_TickTime timeout)

Detailed Description

Function Documentation

◆ IfxAsclin_Asc_canReadCount()

IFX_EXTERN boolean IfxAsclin_Asc_canReadCount | ( | IfxAsclin_Asc * | asclin,
 |  | Ifx_SizeT | count,
 |  | Ifx_TickTime | timeout
 | ) |  |
See also
IfxStdIf_DPipe_CanReadCount
Parameters
asclin | module handle
count | Count of data which should be checked (in bytes)
timeout | in system timer ticks
Returns
Returns TRUE if at least count bytes are available for read in the rx buffer, if not the Event is armed to be set when the buffer count is bigger or equal to the requested count.

Definition at line 73 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_stdIfDPipeInit().

◆ IfxAsclin_Asc_canWriteCount()

IFX_EXTERN boolean IfxAsclin_Asc_canWriteCount | ( | IfxAsclin_Asc * | asclin,
 |  | Ifx_SizeT | count,
 |  | Ifx_TickTime | timeout
 | ) |  |
See also
IfxStdIf_DPipe_CanWriteCount
Parameters
asclin | module handle
count | Count of data which should be checked (in bytes)
timeout | in system timer ticks
Returns
Returns TRUE if at least count bytes can be written to the tx buffer, if not the Event is armed to be set when the buffer free count is bigger or equal to the requested count

Definition at line 79 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_stdIfDPipeInit().

◆ IfxAsclin_Asc_clearRx()

IFX_EXTERN void IfxAsclin_Asc_clearRx ( IfxAsclin_Asc * asclin )
See also
IfxStdIf_DPipe_ClearRx
Parameters
asclin module handle
Returns
None

Definition at line 85 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_stdIfDPipeInit().

◆ IfxAsclin_Asc_clearTx()

IFX_EXTERN void IfxAsclin_Asc_clearTx ( IfxAsclin_Asc * asclin )
See also
IfxStdIf_DPipe_ClearTx
Parameters
asclin module handle
Returns
None

Definition at line 92 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_stdIfDPipeInit().

◆ IfxAsclin_Asc_flushTx()

IFX_EXTERN boolean IfxAsclin_Asc_flushTx | ( | IfxAsclin_Asc * | asclin,
 |  | Ifx_TickTime | timeout
 | ) |  |
See also
IfxStdIf_DPipe_FlushTx
Parameters
asclin | module handle
timeout | in system timer ticks
Returns
Returns TRUE if the FIFO is empty

Definition at line 109 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_stdIfDPipeInit().

◆ IfxAsclin_Asc_getReadCount()

IFX_EXTERN sint32 IfxAsclin_Asc_getReadCount ( IfxAsclin_Asc * asclin )
See also
IfxStdIf_DPipe_GetReadCount
Parameters
asclin module handle
Returns
The number of bytes in the rx buffer

Definition at line 130 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_stdIfDPipeInit().

◆ IfxAsclin_Asc_getReadEvent()

IFX_EXTERN IfxStdIf_DPipe_ReadEvent IfxAsclin_Asc_getReadEvent ( IfxAsclin_Asc * asclin )
See also
IIfxStdIf_DPipe_GetReadEvent
Parameters
asclin module handle
Returns
Read event object

Definition at line 136 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_stdIfDPipeInit().

◆ IfxAsclin_Asc_getSendCount()

IFX_EXTERN uint32 IfxAsclin_Asc_getSendCount ( IfxAsclin_Asc * asclin )
See also
IfxStdIf_DPipe_GetSendCount
Parameters
asclin module handle
Returns
number of bytes send

Definition at line 142 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_stdIfDPipeInit().

◆ IfxAsclin_Asc_getTxTimeStamp()

IFX_EXTERN Ifx_TickTime IfxAsclin_Asc_getTxTimeStamp ( IfxAsclin_Asc * asclin )
See also
IfxStdIf_DPipe_GetTxTimeStamp
Parameters
asclin module handle
Returns
Time in ticks

Definition at line 148 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_stdIfDPipeInit().

◆ IfxAsclin_Asc_getWriteCount()

IFX_EXTERN sint32 IfxAsclin_Asc_getWriteCount ( IfxAsclin_Asc * asclin )
See also
IfxStdIf_DPipe_GetWriteCount
Parameters
asclin module handle
Returns
The number of free bytes in the tx buffer

Definition at line 154 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_stdIfDPipeInit().

◆ IfxAsclin_Asc_getWriteEvent()

IFX_EXTERN IfxStdIf_DPipe_WriteEvent IfxAsclin_Asc_getWriteEvent ( IfxAsclin_Asc * asclin )
See also
IIfxStdIf_DPipe_GetWriteEvent
Parameters
asclin module handle
Returns
Write event object

Definition at line 160 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_stdIfDPipeInit().

◆ IfxAsclin_Asc_read()

IFX_EXTERN boolean IfxAsclin_Asc_read | ( | IfxAsclin_Asc * | asclin,
 |  | void * | data,
 |  | Ifx_SizeT * | count,
 |  | Ifx_TickTime | timeout
 | ) |  |
See also
IfxStdIf_DPipe_Read
Parameters
asclin | module handle
data | Pointer to the start of data
count | Pointer to the count of data (in bytes).
timeout | in system timer ticks
Returns
Returns TRUE if all items could be read
Returns FALSE if not all the items could be read

A coding example can be found in How to use the ASCLIN ASC Interface driver?

Definition at line 568 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_blockingRead(), and IfxAsclin_Asc_stdIfDPipeInit().

◆ IfxAsclin_Asc_resetSendCount()

IFX_EXTERN void IfxAsclin_Asc_resetSendCount ( IfxAsclin_Asc * asclin )
See also
IfxStdIf_DPipe_ResetSendCount
Parameters
asclin module handle
Returns
None

Definition at line 578 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_stdIfDPipeInit().

◆ IfxAsclin_Asc_write()

IFX_EXTERN boolean IfxAsclin_Asc_write | ( | IfxAsclin_Asc * | asclin,
 |  | const void * | data,
 |  | Ifx_SizeT * | count,
 |  | Ifx_TickTime | timeout
 | ) |  |
See also
IfxStdIf_DPipe_Write
Parameters
asclin | module handle
data | Pointer to the start of data
count | Pointer to the count of data (in bytes).
timeout | in system timer ticks
Returns
Returns TRUE if all items could be written
Returns FALSE if not all the items could be written

A coding example can be found in How to use the ASCLIN ASC Interface driver?

Definition at line 613 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_blockingWrite(), and IfxAsclin_Asc_stdIfDPipeInit().


iLLD_TC38A: Module Functions

Functions
Module Functions
iLLD » ASCLIN » ASC
Collaboration diagram for Module Functions:

Functions

IFX_EXTERN void | IfxAsclin_Asc_disableModule (IfxAsclin_Asc *asclin)
Disables the module. More...
IFX_EXTERN IfxAsclin_Status | IfxAsclin_Asc_initModule (IfxAsclin_Asc *asclin, const IfxAsclin_Asc_Config *config)
Initialises the module. More...
IFX_EXTERN void | IfxAsclin_Asc_initModuleConfig (IfxAsclin_Asc_Config *config, Ifx_ASCLIN *asclin)
Fills the config structure with default values. More...

Detailed Description

Function Documentation

◆ IfxAsclin_Asc_disableModule()

IFX_EXTERN void IfxAsclin_Asc_disableModule ( IfxAsclin_Asc * asclin )

Disables the module.

Parameters
asclin module handle
Returns
None

Definition at line 99 of file IfxAsclin_Asc.c.

◆ IfxAsclin_Asc_initModule()

IFX_EXTERN IfxAsclin_Status IfxAsclin_Asc_initModule | ( | IfxAsclin_Asc * | asclin,
 |  | const IfxAsclin_Asc_Config * | config
 | ) |  |

Initialises the module.

Parameters
asclin | module handle
config | predefined configuration structure of the module
Returns
Status

A coding example can be found in How to use the ASCLIN ASC Interface driver?

Definition at line 166 of file IfxAsclin_Asc.c.

◆ IfxAsclin_Asc_initModuleConfig()

IFX_EXTERN void IfxAsclin_Asc_initModuleConfig | ( | IfxAsclin_Asc_Config * | config,
 |  | Ifx_ASCLIN * | asclin
 | ) |  |

Fills the config structure with default values.

Parameters
config | configuration structure of the module
asclin | pointer to ASCLIN registers
Returns
None

A coding example can be found in How to use the ASCLIN ASC Interface driver?

Definition at line 351 of file IfxAsclin_Asc.c.


iLLD_TC38A: How to use the ASCLIN LIN Interface driver?

How to use the ASCLIN LIN Interface driver?
iLLD » ASCLIN
Collaboration diagram for How to use the ASCLIN LIN Interface driver?:

The LIN interface driver provides a default ASCLIN configuration for asynchronous serial communication in 8bit mode, and a set of data transfer routines. It supports all four elementary LIN transactions in polling mode. TxH - Transmission of Header TxR - Transmission of Response RxH - Reception of Header RxR - Reception of Response

The driver also provides a LIN Master to be configured in Interrupt mode. In interrupt mode, following Lin frame transactions are provided. 1.Transmit Header only. 2.Transmit both Header and Response. 3.Transmit Header and Receive Response.

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Asclin/Lin/IfxAsclin_Lin.h>

Variables

Declare the LIN handle as global variable in your C code:

// used globally
static IfxAsclin_Lin linMaster;
static IfxAsclin_Lin linSlave;

Interrupt Handler Installation

Define priorities for the Interrrupt handlers.

#define IFX_INTPRIO_ASCLIN1_RX 4 // Define the LIN1 receive interrupt priority.
#define IFX_INTPRIO_ASCLIN1_TX 8 // Define the LIN1 transmit interrupt priority.
#define IFX_INTPRIO_ASCLIN1_EX 12 // Define the LIN1 error interrupt priority.

Add the interrupt service routines to your C code. They have to call the LIN interrupt handlers by passing the lin handle:

IFX_INTERRUPT(ISR_Lin1_rx, 0, IFX_INTPRIO_ASCLIN1_RX);
IFX_INTERRUPT(ISR_Lin1_tx, 0, IFX_INTPRIO_ASCLIN1_TX);
IFX_INTERRUPT(ISR_Lin1_ex, 0, IFX_INTPRIO_ASCLIN1_EX);
void ISR_Lin1_rx(void)
{
IfxAsclin_Lin_isrReceive(&linMaster);
}
void ISR_Lin1_tx(void)
{
IfxAsclin_Lin_isrTransmit(&linMaster);
}
void ISR_Lin1_ex(void)
{
IfxAsclin_Lin_isrError(&linMaster);
}

Module Initialisation

The module can be initialised as either Master or Slave. Here an example:

Module Initialisation as Master

// create module config
IfxAsclin_Lin_Config linMasterConfig;
IfxAsclin_Lin_initModuleConfig(&linMasterConfig, &MODULE_ASCLIN1);
// set the lin mode of operation
linMasterConfig.linMode = IfxAsclin_LinMode_master;
// set the desired baudrate
linMasterConfig.btc.prescaler = 4;
linMasterConfig.brg.baudrate = 19200; // FDR values will be calculated in initModule
// pin configuration
const IfxAsclin_Lin_Pins pins = {
&IfxAsclin1_RXB_P15_5_IN, IfxPort_InputMode_pullUp, // Rx pin
&IfxAsclin1_TX_P15_4_OUT, IfxPort_OutputMode_pushPull, // Tx pin
IfxPort_PadDriver_cmosAutomotiveSpeed1
};
linMasterConfig.pins = &pins;
//Lin Master Interrupt Config. Only needed for interrupt mode.
linConfig.isInterruptMode = TRUE;
linConfig.interrupt.rxPriority = ISR_PRIORITY(INTERRUPT_LIN1_RX);
linConfig.interrupt.txPriority = ISR_PRIORITY(INTERRUPT_LIN1_TX);
linConfig.interrupt.exPriority = ISR_PRIORITY(INTERRUPT_LIN1_EX);
//Optionally, if any interrupt has to be enabled during initialisation it can be done as follows.
//Otherwise the driver will enable required interrupts during run time.
linConfig.interrupt.enabledInterrupt.exCollisionDetectionError = TRUE; //This is optional example.
linConfig.lin.csi = FALSE;//checksum injection not written into RxFIFO
// initialize module
IfxAsclin_Lin_initModule(&linMaster, &linMasterConfig);

Module Initialisation as Slave

// create module config
IfxAsclin_Lin_Config linSlaveConfig;
IfxAsclin_Lin_initModuleConfig(&linSlaveConfig, &MODULE_ASCLIN1);
// set the lin mode of operation
linSlaveConfig.linMode = IfxAsclin_LinMode_slave;
// set the desired baudrate
linSlaveConfig.btc.prescaler = 4;
linSlaveConfig.brg.baudrate = 19200; // FDR values will be calculated in initModule
// choose the auto baudrate detection configuration
linSlaveConfig.brd.abd = FALSE;
linSlaveConfig.brd.lowerLimit = 0x4;
linSlaveConfig.brd.upperLimit = 0xF0;
// pin configuration
const IfxAsclin_Lin_Pins pins = {
&IfxAsclin1_RXB_P15_5_IN, IfxPort_InputMode_pullUp, // Rx pin
&IfxAsclin1_TX_P15_4_OUT, IfxPort_OutputMode_pushPull, // Tx pin
IfxPort_PadDriver_cmosAutomotiveSpeed1
};
linSlaveConfig.pins = &pins;
// initialize module
//IfxAsclin_Lin linSlave; // defined globally
IfxAsclin_Lin_initModule(&linSlave, &linSlaveConfig);

The LIN is ready for use now!

Data Transfers

Master Transfers

The LIN driver provides all three master elementary transfers.

This means: you can send a header and based on the id byte, after transmission of header you can send or receive response and also can ignore the header based on the id:

// set the id bytes
uint8 txId = 0x80; // for sending respose after header
uint8 rxId = 0xC1; // for receiving respose after header
// prepare transmit bytes incase of sending response
uint8 txData[8] = { 1, 2, 3, 4, 5, 6, 7, 8 };
// prepare receive buffer incase of receiving response
uint8 rxData[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
uint32 size = 8;
//Polling mode APIs
//send response case
IfxAsclin_Lin_sendHeader(&linMaster, &txId);
if (lin.acknowledgmentFlags.txHeaderEnd == 1) // if the header is been transmitted succesfully
{
IfxAsclin_Lin_sendResponse(&linMaster, txData, size);
}
//receive response case
IfxAsclin_Lin_sendHeader(&linMaster, &rxId);
if (lin.acknowledgmentFlags.txHeaderEnd == 1) // if the header is been transmitted succesfully
{
IfxAsclin_Lin_receiveResponse(&linMaster, rxData, size);
}
//Interrupt mode APIs
IfxAsclin_Lin_PduType pdu;
pdu.pid = 0x42;
pdu.checksumMode = IfxAsclin_Checksum_enhanced;
pdu.dataLength = 8;
pdu.direction = IfxAsclin_Lin_Direction_TransmitHeaderAndResponse; //Transmits both Header and Response
pdu.dataPtr = &txData[0];
IfxAsclin_Lin_sendFrame(&linMaster,&pdu);
//Here Poll for linMaster.acknowledgmentFlags.txResponseEnd to detect end of transmission of frame.
pdu.pid = 0xC4;
pdu.direction = IfxAsclin_Lin_Direction_TransmitHeaderAndReceiveResponse; //Transmits Header and expects slave to respond
IfxAsclin_Lin_sendFrame(&linMaster,&pdu);
//Here Poll for linMaster.acknowledgmentFlags.rxResponseEnd
//linMaster.linFrameData.rxResponseData[8] will have received response data if slave replies.

Slave Transfers

Same as master the LIN driver provides all three slave elemnatry tranfers.

This means: you can receive a header and based on the id byte received, you can send or receive response and can also ignore the header based on the id:

uint8 id; // for storing received id byte
// prepare transmit bytes incase of sending response
uint8 txData[8] = { 1, 2, 3, 4, 5, 6, 7, 8 };
// prepare receive buffer incase of receiving response
uint8 rxData[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
uint32 size = 8;
// receive header
IfxAsclin_Lin_receiveHeader(&linSlave, &id);
// if data is requsted by master
if(id == txId)
{
IfxAsclin_Lin_sendResponse(&linSlave, txData, size); // send response
}
// if header is follwed by response
else if(id == rxId)
{
IfxAsclin_Lin_receiveResponse(&linSlave, rxData, size); // receive response
}
// if header is not for this slave
else
{
IfxAsclin_Lin_ignoreHeader(&linSlave);
}


iLLD_TC38A: LIN

Modules
LIN
iLLD » ASCLIN
Collaboration diagram for LIN:

Modules

Data Structures
Elementary Transactions
Module Functions
Error Handling Functions
Interrupt Functions
Enumerations

Detailed Description


iLLD_TC38A: Data Structures

Data Structures
Data Structures
iLLD » ASCLIN » LIN
Collaboration diagram for Data Structures:

Data Structures

struct | IfxAsclin_Lin_EnabledInterrupts
Structure to store interrupts which are enabled during initialisation. More...
struct | IfxAsclin_Lin_FrameControlFlags
Structure for Lin Frame Control flags. More...
struct | IfxAsclin_Lin_AcknowledgementFlags
Structure for Acknowledgement Flags. More...
struct | IfxAsclin_Lin_BaudrateDetection
Structure for Baudrate Detection. More...
struct | IfxAsclin_Lin_BaudrateGeneration
Structure for Baudrate Generation. More...
struct | IfxAsclin_Lin_BitSamplingControl
Structure for Bit Sampling. More...
struct | IfxAsclin_Lin_BitTimingControl
Structure for Bit Timing. More...
struct | IfxAsclin_Lin_DataControl
Structure for Data Control. More...
struct | IfxAsclin_Lin_ErrorFlags
Structure for Error Flags. More...
struct | IfxAsclin_Lin_FifoControl
Structure for FIFO Control. More...
struct | IfxAsclin_Lin_FrameControl
Structure for Frame Control. More...
struct | IfxAsclin_Lin_FrameDataControl
Structure for Frame Data and Control flags. More...
struct | IfxAsclin_Lin_InterruptConfig
Structure for LIN Interrupt Configuration. More...
struct | IfxAsclin_Lin_LinControl
Structure for lin Control. More...
struct | IfxAsclin_Lin_Pins
Structure for LIN pin configuration. More...
struct | IfxAsclin_Lin
struct | IfxAsclin_Lin_Config
Configuration structure of the module. More...
struct | IfxAsclin_Lin_PduType
Structure to hold Lin Pdu data. More...

Detailed Description

Data Structure Documentation

◆ IfxAsclin_Lin_EnabledInterrupts

struct IfxAsclin_Lin_EnabledInterrupts

Structure to store interrupts which are enabled during initialisation.

Definition at line 346 of file IfxAsclin_Lin.h.

Data Fields
uint16 | exBreakDetected: 1 | Break Detected.
uint16 | exCollisionDetectionError: 1 | Collision Detection Error.
uint16 | exFramingError: 1 | Framing Error.
uint16 | exHeaderTimeout: 1 | Header Timeout.
uint16 | exLinAutobaudDetectionError: 1 | Lin Autobaud Detection Error.
uint16 | exLinChecksumError: 1 | Lin Checksum Error.
uint16 | exLinParityError: 1 | Lin Parity Error.
uint16 | exReceiveFIFOOverflow: 1 | Receive FIFO Overflow.
uint16 | exResponseTimeout: 1 | Response Timeout.
uint16 | exTransmissionCompleted: 1 | Transmission Completed.
uint16 | exTransmitFIFOOverflow: 1 | Transmit FIFO Overflow.
uint16 | rxReceivedHeader: 1 | Received Header.
uint16 | rxReceivedResponse: 1 | Received Response.
uint16 | txTransmittedHeader: 1 | Transmitted Header.
uint16 | txTransmittedResponse: 1 | Transmitted Response.

◆ IfxAsclin_Lin_FrameControlFlags

struct IfxAsclin_Lin_FrameControlFlags

Structure for Lin Frame Control flags.

Definition at line 367 of file IfxAsclin_Lin.h.

Data Fields
uint16 | rxHeaderErrorOccurred: 1 | Flag to indicate error occurred during reception of Header.
uint16 | rxHeaderInProgress: 1 | Flag to indicate Header reception is initiated and is in progress.
uint16 | rxResponseErrorOccurred: 1 | Flag to indicate error occurred during reception of Response.
uint16 | rxResponseInProgress: 1 | Flag to indicate Response reception is initiated and is in progress.
uint16 | txHeaderErrorOccurred: 1 | Flag to indicate error occurred during transmission of Header.
uint16 | txHeaderInProgress: 1 | Flag to indicate Header transmission is initiated and is in progress.
uint16 | txResponseErrorOccurred: 1 | Flag to indicate error occurred during transmission of Response.
uint16 | txResponseInProgress: 1 | Flag to indicate Response transmission is initiated and is in progress.
uint16 | txSendHeaderOnly: 1 | Flag indicating that only Header is transmitted.
uint16 | txSendResponse: 1 | Flag to indicate Response is transmitted.

◆ IfxAsclin_Lin_AcknowledgementFlags

struct IfxAsclin_Lin_AcknowledgementFlags

Structure for Acknowledgement Flags.

Definition at line 387 of file IfxAsclin_Lin.h.

Data Fields
uint8 | rxHeaderEnd: 1 | receive header end
uint8 | rxResponseEnd: 1 | receive response end
uint8 | txCompleted: 1 | transmission completed
uint8 | txHeaderEnd: 1 | transmit header end
uint8 | txResponseEnd: 1 | transmit response end

◆ IfxAsclin_Lin_BaudrateDetection

struct IfxAsclin_Lin_BaudrateDetection

Structure for Baudrate Detection.

Definition at line 398 of file IfxAsclin_Lin.h.

Data Fields
boolean | abd | LINCON.ABD, autobaud detection enable.
uint8 | lowerLimit | BRD.LOWERLIMIT, auto baudrate detection lowerlimit.
uint8 | measured | BRD.MEASURED, measured time interval between the first and the fifth falling edge of the sync byte.
uint8 | upperLimit | BRD.UPPERLIMIT, auto baudrate detection upperlimit.

◆ IfxAsclin_Lin_BaudrateGeneration

struct IfxAsclin_Lin_BaudrateGeneration

Structure for Baudrate Generation.

Definition at line 409 of file IfxAsclin_Lin.h.

Data Fields
float32 | baudrate | value of the required baudrate
uint16 | denominator | BRG.DENOMINATOR, defines the denominator of fractional divider.
uint16 | numerator | BRG.NUMERATOR, defines the numerator of fractional divider.

◆ IfxAsclin_Lin_BitSamplingControl

struct IfxAsclin_Lin_BitSamplingControl

Structure for Bit Sampling.

Definition at line 418 of file IfxAsclin_Lin.h.

Data Fields
uint8 | filterDepth | IOCR.DEPTH, digital glitch filter depth.
IfxAsclin_SamplesPerBit | medianFilter | BITCON.SM, no. of samples per bit 1 or 3.
IfxAsclin_SamplePointPosition | samplePointPosition | BITCON.SAMPLEPOINT, sample point position.

◆ IfxAsclin_Lin_BitTimingControl

struct IfxAsclin_Lin_BitTimingControl

Structure for Bit Timing.

Definition at line 427 of file IfxAsclin_Lin.h.

Data Fields
IfxAsclin_OversamplingFactor | oversampling | BITCON.OVERSAMPLING, postdivider, used for oversampling.
uint16 | prescaler | BITCON.PRESCALER, predivider to generate the baud rate.

◆ IfxAsclin_Lin_DataControl

struct IfxAsclin_Lin_DataControl

Structure for Data Control.

Definition at line 435 of file IfxAsclin_Lin.h.

Data Fields
IfxAsclin_Checksum | checksum | DATCON.CSM, checksum mode (classic or enhanced)
IfxAsclin_DataLength | dataLength | DATCON.DATALENGTH, data length, number of bits per transfer.
IfxAsclin_HeaderResponseSelect | headerOnly | DATCON.HO, Lin frame with header and response or header only.
uint16 | responseTimeout | DATCON.RESPONSE, timeout limit.
IfxAsclin_LinResponseTimeoutMode | responseTimeoutMode | DATCON.RM, response mode (response or frame timeout threshold)

◆ IfxAsclin_Lin_ErrorFlags

struct IfxAsclin_Lin_ErrorFlags

Structure for Error Flags.

Definition at line 446 of file IfxAsclin_Lin.h.

Data Fields
uint8 | breakDetected: 1 | break detected
uint8 | collisionDetectionError: 1 | collision detection error
uint8 | frameError: 1 | frame error
uint8 | headerTimeout: 1 | header timeout
uint8 | linAutobaudDetectionError: 1 | lin autobaud detection error
uint8 | linChecksumError: 1 | lin checksum error
uint8 | linParityError: 1 | lin parity error
uint8 | responseTimeout: 1 | response timeout
uint8 | rxFifoOverflow: 1 | receive FIFO overflow error
uint8 | txFifoOverflow: 1 | transmit FIFO overflow error

◆ IfxAsclin_Lin_FifoControl

struct IfxAsclin_Lin_FifoControl

Structure for FIFO Control.

Definition at line 462 of file IfxAsclin_Lin.h.

Data Fields
IfxAsclin_ReceiveBufferMode | buffMode | RXFIFOCON.BUF, receive buffer mode (RXFIFO or RXBuffer)
IfxAsclin_TxFifoInletWidth | inWidth | TXFIFOCON.INW, transmit FIFO inlet width.
IfxAsclin_RxFifoOutletWidth | outWidth | RXFIFOCON.OTW, receive FIFO oulet width.

◆ IfxAsclin_Lin_FrameControl

struct IfxAsclin_Lin_FrameControl

Structure for Frame Control.

Definition at line 471 of file IfxAsclin_Lin.h.

Data Fields
boolean | collisionDetectionEnable | FRAMECON.CEN, collision detection enable.
IfxAsclin_IdleDelay | idleDelay | FRAMECON.IDLE, idle delay.
IfxAsclin_LeadDelay | leadDelay | FRAMECON.LEAD, lead delay.
boolean | parityEnable | FRAMECON.PEN, parity enable.
IfxAsclin_ParityType | parityType | FRAMECON.ODD, parity type (even or odd)
IfxAsclin_ShiftDirection | shiftDir | FRAMECON.MSB, shift direction.
IfxAsclin_StopBit | stopBit | FRAMECON.STOP, number of stop bits.

◆ IfxAsclin_Lin_FrameDataControl

struct IfxAsclin_Lin_FrameDataControl

Structure for Frame Data and Control flags.

Definition at line 484 of file IfxAsclin_Lin.h.

Collaboration diagram for IfxAsclin_Lin_FrameDataControl:
[legend]
Data Fields
IfxAsclin_Lin_FrameControlFlags | flags | LIN frame control flags.
uint8 | headerID | header ID
uint8 | rxResponseData[8] | Array to store received response data.
uint8 | rxResponseLength | Length of received response.
uint8 | txResponseLength | Length of transmitted response.

◆ IfxAsclin_Lin_InterruptConfig

struct IfxAsclin_Lin_InterruptConfig

Structure for LIN Interrupt Configuration.

Definition at line 495 of file IfxAsclin_Lin.h.

Collaboration diagram for IfxAsclin_Lin_InterruptConfig:
[legend]
Data Fields
IfxAsclin_Lin_EnabledInterrupts | enabledInterrupt | Interrupts which have to be enabled during initialisation as configured by application. Does not reflect current status of FLAGSENABLE register.
uint16 | exPriority | error interrupt priority
uint16 | rxPriority | receive interrupt priority
uint16 | txPriority | transmit interrupt priority
IfxSrc_Tos | typeOfService | type of interrupt service

◆ IfxAsclin_Lin_LinControl

struct IfxAsclin_Lin_LinControl

Structure for lin Control.

Definition at line 506 of file IfxAsclin_Lin.h.

Data Fields
uint8 | breakLength | LINBTIMER.BREAK, break pulse generation and detection length.
boolean | csEnable | LINCON.CSEN, hardware checksum generation and checking.
IfxAsclin_ChecksumInjection | csi | LINCON.CSI, checksum injection (not written or written) into RxFIFO.
uint8 | headerTimeout | LINHTIMER.HEADER, header timeout threshold value.

◆ IfxAsclin_Lin_Pins

struct IfxAsclin_Lin_Pins

Structure for LIN pin configuration.

Definition at line 516 of file IfxAsclin_Lin.h.

Collaboration diagram for IfxAsclin_Lin_Pins:
[legend]
Data Fields
IfxPort_PadDriver | pinDriver | pad driver
IFX_CONST IfxAsclin_Rx_In * | rx | LIN Rx pin.
IfxPort_InputMode | rxMode | rx pin as input
IFX_CONST IfxAsclin_Tx_Out * | tx | LIN Tx pin.
IfxPort_OutputMode | txMode | tx as output

◆ IfxAsclin_Lin

struct IfxAsclin_Lin

Definition at line 529 of file IfxAsclin_Lin.h.

Collaboration diagram for IfxAsclin_Lin:
[legend]
Data Fields
IfxAsclin_Lin_AcknowledgementFlags | acknowledgmentFlags | structure for acknowledgement flags
Ifx_ASCLIN * | asclin | pointer to ASCLIN registers
IfxAsclin_Lin_ErrorFlags | errorFlagsStatus | structure for error flags status
boolean | isInterruptMode | Value to indicate if APIs work in Polling mode or Interrupt mode.
IfxAsclin_Lin_FrameDataControl | linFrameData | Structure for Lin Frame Data and Control.
IfxAsclin_LinMode | linMode | LINCON.MS, lin mode of operation (master or slave)
boolean | receiveIdEnable | setting to receive Id in Rx Fifo after sending it

◆ IfxAsclin_Lin_Config

struct IfxAsclin_Lin_Config

Configuration structure of the module.

Definition at line 542 of file IfxAsclin_Lin.h.

Collaboration diagram for IfxAsclin_Lin_Config:
[legend]
Data Fields
IfxAsclin_RxInputSelect | alti | IOCR.ALTI, Rx input (alternate input) pin selection.
Ifx_ASCLIN * | asclin | pointer to ASCLIN registers
IfxAsclin_Lin_BaudrateDetection | brd | structure for baudrate detection
IfxAsclin_Lin_BaudrateGeneration | brg | structure for baudrate generation
IfxAsclin_Lin_BitSamplingControl | bsc | structure for bit sampling
IfxAsclin_Lin_BitTimingControl | btc | structure for bit timings
IfxAsclin_ClockSource | clockSource | CSR.CLKSEL, clock source selection.
IfxAsclin_Lin_DataControl | data | structure for data control
IfxAsclin_Lin_FifoControl | fifo | structure for FIFO control
IfxAsclin_Lin_FrameControl | frame | structure for frame control
IfxAsclin_FrameMode | frameMode | FRAMECON.MODE, mode of operation of the module (ASC, SPI, LIN)
IfxAsclin_Lin_InterruptConfig | interrupt | structure for lin interrupt configuration
boolean | isInterruptMode | flag to indicate Interrupt Mode (TRUE) or Polling Mode (FALSE)
IfxAsclin_Lin_LinControl | lin | structure for lin control
IfxAsclin_LinMode | linMode | LINCON.MS, lin mode of operation (master or slave)
IFX_CONST IfxAsclin_Lin_Pins * | pins | structure for LIN pins
boolean | receiveIdEnable | setting to receive Id in Rx Fifo after sending it

◆ IfxAsclin_Lin_PduType

struct IfxAsclin_Lin_PduType

Structure to hold Lin Pdu data.

Definition at line 565 of file IfxAsclin_Lin.h.

Data Fields
IfxAsclin_Checksum | checksumMode | LIN Checksum Mode.
uint8 | dataLength | Length of LIN Response.
uint8 * | dataPtr | Pointer for LIN Response data.
IfxAsclin_Lin_Direction | direction | Direction Control (Tx Header only, Tx both Header and Response, Tx Header and Rx Response)
uint8 | pid | PID of LIN Header.


iLLD_TC38A: Elementary Transactions

Functions
Elementary Transactions
iLLD » ASCLIN » LIN
Collaboration diagram for Elementary Transactions:

Functions

IFX_INLINE void | IfxAsclin_Lin_prepareHeaderReception (IfxAsclin_Lin *asclin)
Prepares the module to receive the header. More...
IFX_INLINE void | IfxAsclin_Lin_prepareResponseReception (IfxAsclin_Lin *asclin, uint32 length)
Prepares the module to Receive the response. More...
IFX_INLINE void | IfxAsclin_Lin_readHeader (IfxAsclin_Lin *asclin, uint8 *id)
Reads the header. More...
IFX_INLINE void | IfxAsclin_Lin_readResponse (IfxAsclin_Lin *asclin, uint8 *data, uint32 length)
Reads the response. More...
IFX_EXTERN void | IfxAsclin_Lin_ignoreHeader (IfxAsclin_Lin *asclin)
Ignores the latest header. More...
IFX_EXTERN void | IfxAsclin_Lin_receiveHeader (IfxAsclin_Lin *asclin, uint8 *id)
Receives the header. More...
IFX_EXTERN void | IfxAsclin_Lin_receiveResponse (IfxAsclin_Lin *asclin, uint8 *data, uint32 length)
Receives the response. More...
IFX_EXTERN void | IfxAsclin_Lin_sendHeader (IfxAsclin_Lin *asclin, uint8 *id)
Sends the header. More...
IFX_EXTERN void | IfxAsclin_Lin_sendResponse (IfxAsclin_Lin *asclin, uint8 *data, uint32 length)
sends the response More...

Detailed Description

Function Documentation

◆ IfxAsclin_Lin_ignoreHeader()

IFX_EXTERN void IfxAsclin_Lin_ignoreHeader ( IfxAsclin_Lin * asclin )

Ignores the latest header.

Parameters
asclin module handle
Returns
None

A coding example can be found in How to use the ASCLIN LIN Interface driver?

Definition at line 257 of file IfxAsclin_Lin.c.

◆ IfxAsclin_Lin_prepareHeaderReception()

IFX_INLINE void IfxAsclin_Lin_prepareHeaderReception ( IfxAsclin_Lin * asclin )

Prepares the module to receive the header.

Parameters
asclin module handle
Returns
None

A coding example can be found in How to use the ASCLIN LIN Interface driver?

Definition at line 822 of file IfxAsclin_Lin.h.

Referenced by IfxAsclin_Lin_receiveHeader().

◆ IfxAsclin_Lin_prepareResponseReception()

IFX_INLINE void IfxAsclin_Lin_prepareResponseReception | ( | IfxAsclin_Lin * | asclin,
 |  | uint32 | length
 | ) |  |

Prepares the module to Receive the response.

Parameters
asclin | module handle
length | count of data (in bytes).
Returns
None

A coding example can be found in How to use the ASCLIN LIN Interface driver?

Definition at line 832 of file IfxAsclin_Lin.h.

Referenced by IfxAsclin_Lin_receiveResponse().

◆ IfxAsclin_Lin_readHeader()

IFX_INLINE void IfxAsclin_Lin_readHeader | ( | IfxAsclin_Lin * | asclin,
 |  | uint8 * | id
 | ) |  |

Reads the header.

Parameters
asclin | module handle
id | the id byte which should be received
Returns
None

A coding example can be found in How to use the ASCLIN LIN Interface driver?

Definition at line 843 of file IfxAsclin_Lin.h.

Referenced by IfxAsclin_Lin_isrReceive(), and IfxAsclin_Lin_receiveHeader().

◆ IfxAsclin_Lin_readResponse()

IFX_INLINE void IfxAsclin_Lin_readResponse | ( | IfxAsclin_Lin * | asclin,
 |  | uint8 * | data,
 |  | uint32 | length
 | ) |  |

Reads the response.

Parameters
asclin | module handle
data | Pointer to the start of data which should be received
length | count of data (in bytes).
Returns
None

A coding example can be found in How to use the ASCLIN LIN Interface driver?

Definition at line 850 of file IfxAsclin_Lin.h.

Referenced by IfxAsclin_Lin_isrReceive(), and IfxAsclin_Lin_receiveResponse().

◆ IfxAsclin_Lin_receiveHeader()

IFX_EXTERN void IfxAsclin_Lin_receiveHeader | ( | IfxAsclin_Lin * | asclin,
 |  | uint8 * | id
 | ) |  |

Receives the header.

Parameters
asclin | module handle
id | the id byte which should be received
Returns
None

A coding example can be found in How to use the ASCLIN LIN Interface driver?

Definition at line 516 of file IfxAsclin_Lin.c.

◆ IfxAsclin_Lin_receiveResponse()

IFX_EXTERN void IfxAsclin_Lin_receiveResponse | ( | IfxAsclin_Lin * | asclin,
 |  | uint8 * | data,
 |  | uint32 | length
 | ) |  |

Receives the response.

Parameters
asclin | module handle
data | Pointer to the start of data which should be received
length | count of data (in bytes).
Returns
None

A coding example can be found in How to use the ASCLIN LIN Interface driver?

Definition at line 533 of file IfxAsclin_Lin.c.

◆ IfxAsclin_Lin_sendHeader()

IFX_EXTERN void IfxAsclin_Lin_sendHeader | ( | IfxAsclin_Lin * | asclin,
 |  | uint8 * | id
 | ) |  |

Sends the header.

Parameters
asclin | module handle
id | the id byte which should be sent
Returns
None

A coding example of send header in polling mode can be found in How to use the ASCLIN LIN Interface driver?. For interrupt mode, this fuction is internally used by IfxAsclin_Lin_sendFrame API and the the polling part is bypassed.

Definition at line 550 of file IfxAsclin_Lin.c.

Referenced by IfxAsclin_Lin_sendFrame().

◆ IfxAsclin_Lin_sendResponse()

IFX_EXTERN void IfxAsclin_Lin_sendResponse | ( | IfxAsclin_Lin * | asclin,
 |  | uint8 * | data,
 |  | uint32 | length
 | ) |  |

sends the response

Parameters
asclin | module handle
data | Pointer to the start of data which should be sent
length | count of data (in bytes).
Returns
None

A coding example can be found in How to use the ASCLIN LIN Interface driver?

Definition at line 589 of file IfxAsclin_Lin.c.


iLLD_TC38A: Module Functions

Functions
Module Functions
iLLD » ASCLIN » LIN
Collaboration diagram for Module Functions:

Functions

IFX_EXTERN void | IfxAsclin_Lin_disableModule (IfxAsclin_Lin *asclin)
Disables the module. More...
IFX_EXTERN IfxAsclin_Status | IfxAsclin_Lin_initModule (IfxAsclin_Lin *asclin, const IfxAsclin_Lin_Config *config)
Initialises the module. More...
IFX_EXTERN void | IfxAsclin_Lin_initModuleConfig (IfxAsclin_Lin_Config *config, Ifx_ASCLIN *asclin)
Fills the config structure with default values. More...
IFX_EXTERN void | IfxAsclin_Lin_sendFrame (IfxAsclin_Lin *asclin, IfxAsclin_Lin_PduType *pduptr)
This API must be used in interrupt mode. It can be used to 1.Send Header 2.Send both Header and Response 3.Send Header and Receive Response. More...

Detailed Description

Function Documentation

◆ IfxAsclin_Lin_disableModule()

IFX_EXTERN void IfxAsclin_Lin_disableModule ( IfxAsclin_Lin * asclin )

Disables the module.

Parameters
asclin module handle
Returns
None

Definition at line 247 of file IfxAsclin_Lin.c.

◆ IfxAsclin_Lin_initModule()

IFX_EXTERN IfxAsclin_Status IfxAsclin_Lin_initModule | ( | IfxAsclin_Lin * | asclin,
 |  | const IfxAsclin_Lin_Config * | config
 | ) |  |

Initialises the module.

Parameters
asclin | module handle
config | predefined configuration structure of the module
Returns
Status

A coding example can be found in How to use the ASCLIN LIN Interface driver?

Definition at line 266 of file IfxAsclin_Lin.c.

◆ IfxAsclin_Lin_initModuleConfig()

IFX_EXTERN void IfxAsclin_Lin_initModuleConfig | ( | IfxAsclin_Lin_Config * | config,
 |  | Ifx_ASCLIN * | asclin
 | ) |  |

Fills the config structure with default values.

Parameters
config | predefined configuration structure of the module
asclin | pointer to ASCLIN registers
Returns
None

A coding example can be found in How to use the ASCLIN LIN Interface driver?

Definition at line 439 of file IfxAsclin_Lin.c.

◆ IfxAsclin_Lin_sendFrame()

IFX_EXTERN void IfxAsclin_Lin_sendFrame | ( | IfxAsclin_Lin * | asclin,
 |  | IfxAsclin_Lin_PduType * | pduptr
 | ) |  |

This API must be used in interrupt mode. It can be used to 1.Send Header 2.Send both Header and Response 3.Send Header and Receive Response.

Parameters
asclin | asclin module handle
pduptr | lin pdu configuration
Returns
None

A coding example of sendFrame in interrupt mode can be found in How to use the ASCLIN LIN Interface driver?.

Definition at line 874 of file IfxAsclin_Lin.c.


iLLD_TC38A: Error Handling Functions

Functions
Error Handling Functions
iLLD » ASCLIN » LIN
Collaboration diagram for Error Handling Functions:

Functions

IFX_EXTERN void | IfxAsclin_Lin_checkForReceivedHeaderFlags (IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for received header More...
IFX_EXTERN void | IfxAsclin_Lin_checkForReceivedResponseFlags (IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for received response More...
IFX_EXTERN void | IfxAsclin_Lin_checkForTransmittedHeaderFlags (IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for transmitted header More...
IFX_EXTERN void | IfxAsclin_Lin_checkForTransmittedResponseFlags (IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for transmitted response More...
IFX_EXTERN void | IfxAsclin_Lin_clearFlagsStatus (IfxAsclin_Lin *asclin)
clears the flags status structures More...
IFX_EXTERN boolean | IfxAsclin_Lin_waitForReceivedHeader (IfxAsclin_Lin *asclin)
waits until receive header end acknowledgemnet or an error has been detected More...
IFX_EXTERN boolean | IfxAsclin_Lin_waitForReceivedResponse (IfxAsclin_Lin *asclin)
waits until receive response end acknowledgemnet or an error has been detected More...
IFX_EXTERN boolean | IfxAsclin_Lin_waitForTransmittedHeader (IfxAsclin_Lin *asclin)
waits until transmit header end acknowledgemnet or an error has been detected More...
IFX_EXTERN boolean | IfxAsclin_Lin_waitForTransmittedResponse (IfxAsclin_Lin *asclin)
waits until transmit response end acknowledgemnet or an error has been detected More...

Detailed Description

Function Documentation

◆ IfxAsclin_Lin_checkForReceivedHeaderFlags()

IFX_EXTERN void IfxAsclin_Lin_checkForReceivedHeaderFlags ( IfxAsclin_Lin * asclin )

checks for acknowledgement and error flags for received header

Parameters
asclin module handle
Returns
None

Definition at line 54 of file IfxAsclin_Lin.c.

Referenced by IfxAsclin_Lin_waitForReceivedHeader().

◆ IfxAsclin_Lin_checkForReceivedResponseFlags()

IFX_EXTERN void IfxAsclin_Lin_checkForReceivedResponseFlags ( IfxAsclin_Lin * asclin )

checks for acknowledgement and error flags for received response

Parameters
asclin module handle
Returns
None

Definition at line 98 of file IfxAsclin_Lin.c.

Referenced by IfxAsclin_Lin_waitForReceivedResponse().

◆ IfxAsclin_Lin_checkForTransmittedHeaderFlags()

IFX_EXTERN void IfxAsclin_Lin_checkForTransmittedHeaderFlags ( IfxAsclin_Lin * asclin )

checks for acknowledgement and error flags for transmitted header

Parameters
asclin module handle
Returns
None

Definition at line 148 of file IfxAsclin_Lin.c.

Referenced by IfxAsclin_Lin_waitForTransmittedHeader().

◆ IfxAsclin_Lin_checkForTransmittedResponseFlags()

IFX_EXTERN void IfxAsclin_Lin_checkForTransmittedResponseFlags ( IfxAsclin_Lin * asclin )

checks for acknowledgement and error flags for transmitted response

Parameters
asclin module handle
Returns
None

Definition at line 186 of file IfxAsclin_Lin.c.

Referenced by IfxAsclin_Lin_waitForTransmittedResponse().

◆ IfxAsclin_Lin_clearFlagsStatus()

IFX_EXTERN void IfxAsclin_Lin_clearFlagsStatus ( IfxAsclin_Lin * asclin )

clears the flags status structures

Parameters
asclin module handle
Returns
None

Definition at line 224 of file IfxAsclin_Lin.c.

Referenced by IfxAsclin_Lin_sendFrame(), IfxAsclin_Lin_sendHeader(), IfxAsclin_Lin_waitForReceivedHeader(), IfxAsclin_Lin_waitForReceivedResponse(), IfxAsclin_Lin_waitForTransmittedHeader(), and IfxAsclin_Lin_waitForTransmittedResponse().

◆ IfxAsclin_Lin_waitForReceivedHeader()

IFX_EXTERN boolean IfxAsclin_Lin_waitForReceivedHeader ( IfxAsclin_Lin * asclin )

waits until receive header end acknowledgemnet or an error has been detected

Parameters
asclin module handle
Returns
Result, TRUE: if error, FALSE: is no error

Definition at line 609 of file IfxAsclin_Lin.c.

Referenced by IfxAsclin_Lin_receiveHeader().

◆ IfxAsclin_Lin_waitForReceivedResponse()

IFX_EXTERN boolean IfxAsclin_Lin_waitForReceivedResponse ( IfxAsclin_Lin * asclin )

waits until receive response end acknowledgemnet or an error has been detected

Parameters
asclin module handle
Returns
Result, TRUE: if error, FALSE: is no error

Definition at line 634 of file IfxAsclin_Lin.c.

Referenced by IfxAsclin_Lin_receiveResponse().

◆ IfxAsclin_Lin_waitForTransmittedHeader()

IFX_EXTERN boolean IfxAsclin_Lin_waitForTransmittedHeader ( IfxAsclin_Lin * asclin )

waits until transmit header end acknowledgemnet or an error has been detected

Parameters
asclin module handle
Returns
Result, TRUE: if error, FALSE: is no error

Definition at line 660 of file IfxAsclin_Lin.c.

Referenced by IfxAsclin_Lin_sendHeader().

◆ IfxAsclin_Lin_waitForTransmittedResponse()

IFX_EXTERN boolean IfxAsclin_Lin_waitForTransmittedResponse ( IfxAsclin_Lin * asclin )

waits until transmit response end acknowledgemnet or an error has been detected

Parameters
asclin module handle
Returns
Result, TRUE: if error, FALSE: is no error

Definition at line 684 of file IfxAsclin_Lin.c.

Referenced by IfxAsclin_Lin_sendResponse().


iLLD_TC38A: Interrupt Functions

Functions
Interrupt Functions
iLLD » ASCLIN » LIN
Collaboration diagram for Interrupt Functions:

Functions

IFX_EXTERN void | IfxAsclin_Lin_isrError (IfxAsclin_Lin *asclin)
ISR error routine. More...
IFX_EXTERN void | IfxAsclin_Lin_isrReceive (IfxAsclin_Lin *asclin)
ISR receive routine. More...
IFX_EXTERN void | IfxAsclin_Lin_isrTransmit (IfxAsclin_Lin *asclin)
ISR transmit routine. More...

Detailed Description

Function Documentation

◆ IfxAsclin_Lin_isrError()

IFX_EXTERN void IfxAsclin_Lin_isrError ( IfxAsclin_Lin * asclin )

ISR error routine.

Parameters
asclin module handle
Returns
None

Definition at line 708 of file IfxAsclin_Lin.c.

◆ IfxAsclin_Lin_isrReceive()

IFX_EXTERN void IfxAsclin_Lin_isrReceive ( IfxAsclin_Lin * asclin )

ISR receive routine.

Parameters
asclin module handle
Returns
None

Definition at line 830 of file IfxAsclin_Lin.c.

◆ IfxAsclin_Lin_isrTransmit()

IFX_EXTERN void IfxAsclin_Lin_isrTransmit ( IfxAsclin_Lin * asclin )

ISR transmit routine.

Parameters
asclin module handle
Returns
None

Definition at line 853 of file IfxAsclin_Lin.c.


iLLD_TC38A: Enumerations

Enumerations
Enumerations
iLLD » ASCLIN » LIN
Collaboration diagram for Enumerations:

Enumerations

enum IfxAsclin_Lin_Direction {
IfxAsclin_Lin_Direction_TransmitHeader = 0,
IfxAsclin_Lin_Direction_TransmitHeaderAndResponse = 1,
IfxAsclin_Lin_Direction_TransmitHeaderAndReceiveResponse = 2
}
Defines the type of Lin Master Frame. (Transmit Header only) or (Transmit Header and Response) or (Transmit Header and Receive Response). More...

Detailed Description

Enumeration Type Documentation

◆ IfxAsclin_Lin_Direction

enum IfxAsclin_Lin_Direction

Defines the type of Lin Master Frame. (Transmit Header only) or (Transmit Header and Response) or (Transmit Header and Receive Response).

Enumerator
IfxAsclin_Lin_Direction_TransmitHeader | Transmit Header.
IfxAsclin_Lin_Direction_TransmitHeaderAndResponse | Transmit both Header and Response.
IfxAsclin_Lin_Direction_TransmitHeaderAndReceiveResponse | Transmit Header and Receive Response.

Definition at line 329 of file IfxAsclin_Lin.h.


iLLD_TC38A: How to use the ASCLIN SPI Interface driver?

How to use the ASCLIN SPI Interface driver?
iLLD » ASCLIN
Collaboration diagram for How to use the ASCLIN SPI Interface driver?:

The SPI interface driver provides a default ASCLIN configuration for synchronous serial communication in 8 and 16 bit mode, and a set of data transfer routines.

Data transfers are buffered by the hardware based FIFOs. Incoming and outgoing data is transfered in background from/to the ASCLIN peripheral by interrupt service handlers, which are part of this driver as well. This allows a nonblocking communication without stalling the thread(s) from where data is sent and received.

The SPI interface driver works only as Master

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Asclin/Spi/IfxAsclin_Spi.h>

Variables

Declare the Spi handle as global variable in your C code:

// used globally
static IfxAsclin_Spi spi;

In addition, declare global transmit and receive buffers for the data transfers:

#define SPI_BUFFER_SIZE 8
uint8 spiTxBuffer[SPI_BUFFER_SIZE];
uint8 spiRxBuffer[SPI_BUFFER_SIZE];

Interrupt Handler Installation

See also How to define Interrupts?

Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:

// priorities are normally defined in Ifx_IntPrioDef.h
#define IFX_INTPRIO_ASCLIN1_TX 1
#define IFX_INTPRIO_ASCLIN1_RX 2
#define IFX_INTPRIO_ASCLIN1_ER 3

Add the interrupt service routines to your C code. They have to call the SPI interrupt handlers by passing the spi handle:

IFX_INTERRUPT(asclin1TxISR, 0, IFX_INTPRIO_ASCLIN1_TX)
{
IfxAsclin_Spi_isrTransmit(&spi);
}
IFX_INTERRUPT(asclin1RxISR, 0, IFX_INTPRIO_ASCLIN1_RX)
{
IfxAsclin_Spi_isrReceive(&spi);
}
IFX_INTERRUPT(asclin1ErISR, 0, IFX_INTPRIO_ASCLIN1_ER)
{
IfxAsclin_Spi_isrError(&spi);
}

Finally install the interrupt handlers in your initialisation function:

// install interrupt handlers
IfxCpu_Irq_installInterruptHandler(&asclin1TxISR, IFX_INTPRIO_ASCLIN1_TX);
IfxCpu_Irq_installInterruptHandler(&asclin1RxISR, IFX_INTPRIO_ASCLIN1_RX);
IfxCpu_Irq_installInterruptHandler(&asclin1ErISR, IFX_INTPRIO_ASCLIN1_ER);
IfxCpu_enableInterrupts();

Module Initialisation

The module initialisation can be done in the same function. Here an example:

// create module config
IfxAsclin_Spi_Config spiConfig;
IfxAsclin_Spi_initModuleConfig(&spiConfig, &MODULE_ASCLIN1);
// set the desired baudrate
spiConfig.baudrate.prescaler = 1;
spiConfig.baudrate.baudrate = 1000000; // FDR values will be calculated in initModule
// ISR priorities and interrupt target
spiConfig.interrupt.txPriority = IFX_INTPRIO_ASCLIN1_TX; // see also \ref IfxLld_Asclin
spiConfig.interrupt.rxPriority = IFX_INTPRIO_ASCLIN1_RX; // see also \ref IfxLld_Asclin
spiConfig.interrupt.erPriority = IFX_INTPRIO_ASCLIN1_ER; // see also \ref IfxLld_Asclin
spiConfig.interrupt.typeOfService = IfxCpu_Irq_getTos(IfxCpu_getCoreIndex());
// pin configuration
const IfxAsclin_Spi_Pins pins = {
&IfxAsclin1_SCLK_P15_0_OUT, IfxPort_OutputMode_pushPull, // Clock out pin
&IfxAsclin1_RXA_P15_1_IN, IfxPort_InputMode_pullUp, // Rx pin
&IfxAsclin1_TX_P15_4_OUT, IfxPort_OutputMode_pushPull, // Tx pin
&IfxAsclin1_SLSO_P20_8_OUT, IfxPort_OutputMode_pushPull, // Slave select pin
IfxPort_PadDriver_cmosAutomotiveSpeed1
};
spiConfig.pins = &pins;
// initialize module
//IfxAsclin_Spi spi; // defined globally
IfxAsclin_Spi_initModule(&spi, &spiConfig);

The SPI is ready for use now!

Data Transfers

In following examples we assume, that following buffers are declared globally:

// load the data buffers
int i;
for (i = 0; i < SPI_BUFFER_SIZE; i++)
{
spiTxBuffer[i] = i + 1;
spiRxBuffer[i] = 0;
}

Sending and Receiving a data stream:

// wait until transfer of previous data stream is finished
while( IfxAsclin_Spi_getStatus(&spi) == IfxAsclin_Spi_Status_busy );
// send/receive new stream
IfxAsclin_Spi_exchange(&spi, spiTxBuffer, spiRxBuffer, 8);

Send only, discard received data:

// wait until transfer of previous data stream is finished
while( IfxAsclin_Spi_getStatus(&spi) == IfxAsclin_Spi_Status_busy );
// send new stream
IfxAsclin_Spi_exchange(&spi, spiTxBuffer, NULL_PTR, 8);

Receive only, send all 1's

// wait until transfer of previous data stream is finished
while( IfxAsclin_Spi_getStatus(&spi) == IfxAsclin_Spi_Status_busy );
// receive new stream
IfxAsclin_Spi_exchange(&spi, NULL_PTR, spiRxBuffer, 8);


iLLD_TC38A: SPI

Modules
SPI
iLLD » ASCLIN
Collaboration diagram for SPI:

Modules

Data Structures
Module Functions
Interrupt Functions
Communication Functions

Detailed Description


iLLD_TC38A: Data Structures

Data Structures
Data Structures
iLLD » ASCLIN » SPI
Collaboration diagram for Data Structures:

Data Structures

struct | IfxAsclin_Spi_Baudrate
Structure for Baudrate Generation. More...
struct | IfxAsclin_Spi_BitSamplingControl
Structure for Bit Sampling. More...
struct | IfxAsclin_Spi_ErrorFlags
Structure for Error Flags. More...
struct | IfxAsclin_Spi_FifoControl
Structure for FIFO Control. More...
struct | IfxAsclin_Spi_FrameControl
Structure for Frame Control. More...
struct | IfxAsclin_Spi_InputOutputControl
Structure for input output control. More...
struct | IfxAsclin_Spi_InterruptConfig
Structure for interrupt configuration. More...
struct | IfxAsclin_Spi_Job
Structure for data transfer jobs. More...
struct | IfxAsclin_Spi_Pins
Structure for SPI pin configuration. More...
struct | IfxAsclin_Spi
Module handle. More...
struct | IfxAsclin_Spi_Config
Configuration structure of the module. More...

Detailed Description

Data Structure Documentation

◆ IfxAsclin_Spi_Baudrate

struct IfxAsclin_Spi_Baudrate

Structure for Baudrate Generation.

Definition at line 246 of file IfxAsclin_Spi.h.

Data Fields
float32 | baudrate | value of the required baudrate
IfxAsclin_OversamplingFactor | oversampling | BITCON.OVERSAMPLING, postdivider, used for oversampling.
uint16 | prescaler | BITCON.PRESCALER, predivider to generate the baud rate.

◆ IfxAsclin_Spi_BitSamplingControl

struct IfxAsclin_Spi_BitSamplingControl

Structure for Bit Sampling.

Definition at line 255 of file IfxAsclin_Spi.h.

Data Fields
IfxAsclin_SamplesPerBit medianFilter BITCON.SM, no. of samples per bit 1 or 3.

◆ IfxAsclin_Spi_ErrorFlags

struct IfxAsclin_Spi_ErrorFlags

Structure for Error Flags.

Definition at line 262 of file IfxAsclin_Spi.h.

Data Fields
uint8 | frameError: 1 | frame error
uint8 | rxFifoOverflow: 1 | receive FIFO overflow error
uint8 | rxFifoUnderflow: 1 | receive FIFO underflow error
uint8 | txFifoOverflow: 1 | transmit FIFO overflow error

◆ IfxAsclin_Spi_FifoControl

struct IfxAsclin_Spi_FifoControl

Structure for FIFO Control.

Definition at line 272 of file IfxAsclin_Spi.h.

Data Fields
IfxAsclin_ReceiveBufferMode | buffMode | RXFIFOCON.BUF, receive buffer mode (RXFIFO or RXBuffer)
IfxAsclin_TxFifoInletWidth | inWidth | TXFIFOCON.INW, transmit FIFO inlet width.
IfxAsclin_RxFifoOutletWidth | outWidth | RXFIFOCON.OTW, receive FIFO oulet width.
IfxAsclin_RxFifoInterruptLevel | rxFifoInterruptLevel | RXFIFOCON.INTLEVEL, Rx FIFO interrupt level.
IfxAsclin_FifoInterruptMode | rxFifoInterruptMode | RXFIFOCON.FM, Rx FIFO interrupt generation mode.
IfxAsclin_TxFifoInterruptLevel | txFifoInterruptLevel | TXFIFOCON.INTLEVEL, Tx FIFO interrupt level.
IfxAsclin_FifoInterruptMode | txFifoInterruptMode | TXFIFOCON.FM, Tx FIFO interrupt generation mode.

◆ IfxAsclin_Spi_FrameControl

struct IfxAsclin_Spi_FrameControl

Structure for Frame Control.

Definition at line 285 of file IfxAsclin_Spi.h.

Data Fields
IfxAsclin_IdleDelay | idleDelay | FRAMECON.IDLE, idle delay.
IfxAsclin_LeadDelay | leadDelay | FRAMECON.LEAD, lead delay.
IfxAsclin_ShiftDirection | shiftDir | FRAMECON.MSB, shift direction.
IfxAsclin_StopBit | stopBit | FRAMECON.STOP, number of stop bits.

◆ IfxAsclin_Spi_InputOutputControl

struct IfxAsclin_Spi_InputOutputControl

Structure for input output control.

Definition at line 295 of file IfxAsclin_Spi.h.

Data Fields
IfxAsclin_RxInputSelect | alti | IOCR.ALTI, Rx input (alternate input) pin selection.
IfxAsclin_ClockPolarity | cpol | IOCR.CPOL clock polarity selection.
boolean | loopBack | IOCR.LB, loop back mode selection, 0 for disable, 1 for enable.
IfxAsclin_SlavePolarity | spol | IOCR.SPOL slave polarity selection.

◆ IfxAsclin_Spi_InterruptConfig

struct IfxAsclin_Spi_InterruptConfig

Structure for interrupt configuration.

Definition at line 305 of file IfxAsclin_Spi.h.

Data Fields
uint16 | erPriority | error interrupt priority
uint16 | rxPriority | receive interrupt priority
uint16 | txPriority | transmit interrupt priority
IfxSrc_Tos | typeOfService | type of interrupt service

◆ IfxAsclin_Spi_Job

struct IfxAsclin_Spi_Job

Structure for data transfer jobs.

Definition at line 315 of file IfxAsclin_Spi.h.

Data Fields
void * | data | pointer to user data
uint32 | pending | job remaining (count of the data)

◆ IfxAsclin_Spi_Pins

struct IfxAsclin_Spi_Pins

Structure for SPI pin configuration.

Definition at line 323 of file IfxAsclin_Spi.h.

Collaboration diagram for IfxAsclin_Spi_Pins:
[legend]
Data Fields
IfxPort_PadDriver | pinDriver | pad driver
IFX_CONST IfxAsclin_Rx_In * | rx | SPI Rx pin.
IfxPort_InputMode | rxMode | rx pin as input
IFX_CONST IfxAsclin_Sclk_Out * | sclk | SPI clock select pin.
IfxPort_OutputMode | sclkMode | sclk as output
IFX_CONST IfxAsclin_Slso_Out * | slso | SPI slave select pin.
IfxPort_OutputMode | slsoMode | slso as output
IFX_CONST IfxAsclin_Tx_Out * | tx | SPI Tx pin.
IfxPort_OutputMode | txMode | tx as output

◆ IfxAsclin_Spi

struct IfxAsclin_Spi

Module handle.

Definition at line 342 of file IfxAsclin_Spi.h.

Collaboration diagram for IfxAsclin_Spi:
[legend]
Data Fields
Ifx_ASCLIN * | asclin | pointer to ASCLIN registers
uint8 | dataWidth | width of the data in bytes
IfxAsclin_Spi_ErrorFlags | errorFlags | structure for error flags status
IfxAsclin_Spi_Job | rxJob | structure for Rx job
uint32 | sending | sending in progress status
boolean | transferInProgress | status of the transfer In progress
IfxAsclin_Spi_Job | txJob | structure for Tx job

◆ IfxAsclin_Spi_Config

struct IfxAsclin_Spi_Config

Configuration structure of the module.

Definition at line 355 of file IfxAsclin_Spi.h.

Collaboration diagram for IfxAsclin_Spi_Config:
[legend]
Data Fields
Ifx_ASCLIN * | asclin | pointer to ASCLIN registers
IfxAsclin_Spi_Baudrate | baudrate | structure for baudrate
IfxAsclin_Spi_BitSamplingControl | bitSampling | structure for bit sampling
IfxAsclin_ClockSource | clockSource | CSR.CLKSEL, clock source selection.
IfxAsclin_DataLength | dataLength | DATCON.DATALENGTH, data length, number of bits per transfer.
IfxAsclin_Spi_FifoControl | fifo | structure for FIFO control
IfxAsclin_Spi_FrameControl | frame | structure for frame control
IfxAsclin_FrameMode | frameMode | FRAMECON.MODE, mode of operation of the module (ASC, SPI, LIN)
IfxAsclin_Spi_InputOutputControl | inputOutput | structure for input output control
IfxAsclin_Spi_InterruptConfig | interrupt | structure for interrupt configuration
IFX_CONST IfxAsclin_Spi_Pins * | pins | structure for SPI pins


iLLD_TC38A: Module Functions

Functions
Module Functions
iLLD » ASCLIN » SPI
Collaboration diagram for Module Functions:

Functions

IFX_EXTERN void | IfxAsclin_Spi_disableModule (IfxAsclin_Spi *asclin)
Disables the module. More...
IFX_EXTERN IfxAsclin_Status | IfxAsclin_Spi_initModule (IfxAsclin_Spi *asclin, const IfxAsclin_Spi_Config *config)
Initialises the module. More...
IFX_EXTERN void | IfxAsclin_Spi_initModuleConfig (IfxAsclin_Spi_Config *config, Ifx_ASCLIN *asclin)
Fills the configuration structure with default values. More...

Detailed Description

Function Documentation

◆ IfxAsclin_Spi_disableModule()

IFX_EXTERN void IfxAsclin_Spi_disableModule ( IfxAsclin_Spi * asclin )

Disables the module.

Parameters
asclin module handle
Returns
None

Definition at line 70 of file IfxAsclin_Spi.c.

◆ IfxAsclin_Spi_initModule()

IFX_EXTERN IfxAsclin_Status IfxAsclin_Spi_initModule | ( | IfxAsclin_Spi * | asclin,
 |  | const IfxAsclin_Spi_Config * | config
 | ) |  |

Initialises the module.

Parameters
asclin | module handle
config | predefined configuration structure of the module
Returns
Status

A coding example can be found in How to use the ASCLIN SPI Interface driver?

Definition at line 112 of file IfxAsclin_Spi.c.

◆ IfxAsclin_Spi_initModuleConfig()

IFX_EXTERN void IfxAsclin_Spi_initModuleConfig | ( | IfxAsclin_Spi_Config * | config,
 |  | Ifx_ASCLIN * | asclin
 | ) |  |

Fills the configuration structure with default values.

Parameters
config | predefined configuration structure of the module
asclin | pointer to ASCLIN registers
Returns
None

A coding example can be found in How to use the ASCLIN SPI Interface driver?

Definition at line 259 of file IfxAsclin_Spi.c.


iLLD_TC38A: Interrupt Functions

Functions
Interrupt Functions
iLLD » ASCLIN » SPI
Collaboration diagram for Interrupt Functions:

Functions

IFX_EXTERN void | IfxAsclin_Spi_isrError (IfxAsclin_Spi *asclin)
ISR error routine. More...
IFX_EXTERN void | IfxAsclin_Spi_isrReceive (IfxAsclin_Spi *asclin)
ISR receive routine. More...
IFX_EXTERN void | IfxAsclin_Spi_isrTransmit (IfxAsclin_Spi *asclin)
ISR transmit routine. More...

Detailed Description

Function Documentation

◆ IfxAsclin_Spi_isrError()

IFX_EXTERN void IfxAsclin_Spi_isrError ( IfxAsclin_Spi * asclin )

ISR error routine.

Currently it only stores error flags in the handle (asclin->errorFlags) whenever an error happens. The user software could react on these flags, e.g. re-initialising the module.

Parameters
asclin module handle
Returns
None

Definition at line 327 of file IfxAsclin_Spi.c.

◆ IfxAsclin_Spi_isrReceive()

IFX_EXTERN void IfxAsclin_Spi_isrReceive ( IfxAsclin_Spi * asclin )

ISR receive routine.

Parameters
asclin module handle
Returns
None

Definition at line 358 of file IfxAsclin_Spi.c.

◆ IfxAsclin_Spi_isrTransmit()

IFX_EXTERN void IfxAsclin_Spi_isrTransmit ( IfxAsclin_Spi * asclin )

ISR transmit routine.

Parameters
asclin module handle
Returns
None

Definition at line 366 of file IfxAsclin_Spi.c.


iLLD_TC38A: Communication Functions

Functions
Communication Functions
iLLD » ASCLIN » SPI
Collaboration diagram for Communication Functions:

Functions

IFX_EXTERN IfxAsclin_Spi_Status | IfxAsclin_Spi_exchange (IfxAsclin_Spi *asclin, void *src, void *dest, uint32 count)
starts the data exchange More...
IFX_EXTERN void | IfxAsclin_Spi_read (IfxAsclin_Spi *asclin)
Reads data from the Rx FIFO based on the outlet width. More...
IFX_EXTERN void | IfxAsclin_Spi_write (IfxAsclin_Spi *asclin)
Writes data into the Tx FIFO based on the inlet width. More...

Detailed Description

Function Documentation

◆ IfxAsclin_Spi_exchange()

IFX_EXTERN IfxAsclin_Spi_Status IfxAsclin_Spi_exchange | ( | IfxAsclin_Spi * | asclin,
 |  | void * | src,
 |  | void * | dest,
 |  | uint32 | count
 | ) |  |

starts the data exchange

Parameters
asclin | module handle
src | pointer to transmit data buffer
dest | pointer to receive data buffer
count | count of the data
Returns
status

A coding example can be found in How to use the ASCLIN SPI Interface driver?

Definition at line 80 of file IfxAsclin_Spi.c.

◆ IfxAsclin_Spi_read()

IFX_EXTERN void IfxAsclin_Spi_read ( IfxAsclin_Spi * asclin )

Reads data from the Rx FIFO based on the outlet width.

Parameters
asclin module handle
Returns
None

Definition at line 381 of file IfxAsclin_Spi.c.

Referenced by IfxAsclin_Spi_isrReceive().

◆ IfxAsclin_Spi_write()

IFX_EXTERN void IfxAsclin_Spi_write ( IfxAsclin_Spi * asclin )

Writes data into the Tx FIFO based on the inlet width.

Parameters
asclin module handle
Returns
None

Definition at line 432 of file IfxAsclin_Spi.c.

Referenced by IfxAsclin_Spi_exchange(), and IfxAsclin_Spi_isrTransmit().


iLLD_TC38A: IfxAsclin_cfg.h File Reference

  • _Impl
Macros | Enumerations | Variables
IfxAsclin_cfg.h File Reference
iLLD » ASCLIN

ASCLIN on-chip implementation data. More...

#include "Cpu/Std/Ifx_Types.h"
#include "IfxAsclin_reg.h"
Include dependency graph for IfxAsclin_cfg.h:

Go to the source code of this file.

Macros

#define IFXASCLIN_NUM_MODULES (24)

Enumerations

enum IfxAsclin_Index {
IfxAsclin_Index_none = -1,
IfxAsclin_Index_0 = 0,
IfxAsclin_Index_1,
IfxAsclin_Index_2,
IfxAsclin_Index_3,
IfxAsclin_Index_4,
IfxAsclin_Index_5,
IfxAsclin_Index_6,
IfxAsclin_Index_7,
IfxAsclin_Index_8,
IfxAsclin_Index_9,
IfxAsclin_Index_10,
IfxAsclin_Index_11,
IfxAsclin_Index_12,
IfxAsclin_Index_13,
IfxAsclin_Index_14,
IfxAsclin_Index_15,
IfxAsclin_Index_16,
IfxAsclin_Index_17,
IfxAsclin_Index_18,
IfxAsclin_Index_19,
IfxAsclin_Index_20,
IfxAsclin_Index_21,
IfxAsclin_Index_22,
IfxAsclin_Index_23
}
List of the available Asclin resources. More...

Variables

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxAsclin_cfg_indexMap [IFXASCLIN_NUM_MODULES]

Detailed Description

ASCLIN on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxAsclin_cfg.h.

Macro Definition Documentation

◆ IFXASCLIN_NUM_MODULES

#define IFXASCLIN_NUM_MODULES (24)

Definition at line 67 of file IfxAsclin_cfg.h.

Referenced by IfxAsclin_getAddress(), and IfxAsclin_getIndex().

Variable Documentation

◆ IfxAsclin_cfg_indexMap

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxAsclin_cfg_indexMap[IFXASCLIN_NUM_MODULES]

Definition at line 111 of file IfxAsclin_cfg.h.


iLLD_TC38A: IfxAsclin_PinMap.c File Reference

  • _PinMap
Variables
IfxAsclin_PinMap.c File Reference
iLLD » ASCLIN

ASCLIN I/O map. More...

#include "IfxAsclin_PinMap.h"
Include dependency graph for IfxAsclin_PinMap.c:

Go to the source code of this file.

Variables

IfxAsclin_Cts_In | IfxAsclin0_CTSA_P14_9_IN = {&MODULE_ASCLIN0, {&MODULE_P14, 9}, Ifx_RxSel_a}
IfxAsclin_Cts_In | IfxAsclin1_CTSA_P20_7_IN = {&MODULE_ASCLIN1, {&MODULE_P20, 7}, Ifx_RxSel_a}
IfxAsclin_Cts_In | IfxAsclin1_CTSB_P32_4_IN = {&MODULE_ASCLIN1, {&MODULE_P32, 4}, Ifx_RxSel_b}
IfxAsclin_Cts_In | IfxAsclin2_CTSA_P10_7_IN = {&MODULE_ASCLIN2, {&MODULE_P10, 7}, Ifx_RxSel_a}
IfxAsclin_Cts_In | IfxAsclin2_CTSB_P33_5_IN = {&MODULE_ASCLIN2, {&MODULE_P33, 5}, Ifx_RxSel_b}
IfxAsclin_Cts_In | IfxAsclin3_CTSA_P00_12_IN = {&MODULE_ASCLIN3, {&MODULE_P00,12}, Ifx_RxSel_a}
IfxAsclin_Rts_Out | IfxAsclin0_RTS_P14_7_OUT = {&MODULE_ASCLIN0, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt2}
IfxAsclin_Rts_Out | IfxAsclin1_RTS_P20_6_OUT = {&MODULE_ASCLIN1, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt2}
IfxAsclin_Rts_Out | IfxAsclin1_RTS_P23_1_OUT = {&MODULE_ASCLIN1, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt2}
IfxAsclin_Rts_Out | IfxAsclin2_RTS_P10_8_OUT = {&MODULE_ASCLIN2, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt2}
IfxAsclin_Rts_Out | IfxAsclin2_RTS_P33_4_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt2}
IfxAsclin_Rts_Out | IfxAsclin3_RTS_P00_9_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt3}
IfxAsclin_Rx_In | IfxAsclin0_RXA_P14_1_IN = {&MODULE_ASCLIN0, {&MODULE_P14, 1}, Ifx_RxSel_a}
IfxAsclin_Rx_In | IfxAsclin0_RXB_P15_3_IN = {&MODULE_ASCLIN0, {&MODULE_P15, 3}, Ifx_RxSel_b}
IfxAsclin_Rx_In | IfxAsclin0_RXC_P01_8_IN = {&MODULE_ASCLIN0, {&MODULE_P01, 8}, Ifx_RxSel_c}
IfxAsclin_Rx_In | IfxAsclin0_RXD_P33_10_IN = {&MODULE_ASCLIN0, {&MODULE_P33,10}, Ifx_RxSel_d}
IfxAsclin_Rx_In | IfxAsclin0_RXE_P13_11_IN = {&MODULE_ASCLIN0, {&MODULE_P13,11}, Ifx_RxSel_e}
IfxAsclin_Rx_In | IfxAsclin10_RXA_P00_4_IN = {&MODULE_ASCLIN10, {&MODULE_P00, 4}, Ifx_RxSel_a}
IfxAsclin_Rx_In | IfxAsclin10_RXB_P00_8_IN = {&MODULE_ASCLIN10, {&MODULE_P00, 8}, Ifx_RxSel_b}
IfxAsclin_Rx_In | IfxAsclin10_RXC_P13_0_IN = {&MODULE_ASCLIN10, {&MODULE_P13, 0}, Ifx_RxSel_c}
IfxAsclin_Rx_In | IfxAsclin10_RXD_P13_1_IN = {&MODULE_ASCLIN10, {&MODULE_P13, 1}, Ifx_RxSel_d}
IfxAsclin_Rx_In | IfxAsclin11_RXA_P10_0_IN = {&MODULE_ASCLIN11, {&MODULE_P10, 0}, Ifx_RxSel_a}
IfxAsclin_Rx_In | IfxAsclin11_RXB_P10_4_IN = {&MODULE_ASCLIN11, {&MODULE_P10, 4}, Ifx_RxSel_b}
IfxAsclin_Rx_In | IfxAsclin11_RXC_P21_0_IN = {&MODULE_ASCLIN11, {&MODULE_P21, 0}, Ifx_RxSel_c}
IfxAsclin_Rx_In | IfxAsclin11_RXD_P21_1_IN = {&MODULE_ASCLIN11, {&MODULE_P21, 1}, Ifx_RxSel_d}
IfxAsclin_Rx_In | IfxAsclin11_RXE_P21_2_IN = {&MODULE_ASCLIN11, {&MODULE_P21, 2}, Ifx_RxSel_e}
IfxAsclin_Rx_In | IfxAsclin11_RXF_P21_5_IN = {&MODULE_ASCLIN11, {&MODULE_P21, 5}, Ifx_RxSel_f}
IfxAsclin_Rx_In | IfxAsclin12_RXA_P00_3_IN = {&MODULE_ASCLIN12, {&MODULE_P00, 3}, Ifx_RxSel_a}
IfxAsclin_Rx_In | IfxAsclin12_RXB_P00_5_IN = {&MODULE_ASCLIN12, {&MODULE_P00, 5}, Ifx_RxSel_b}
IfxAsclin_Rx_In | IfxAsclin13_RXA_P00_9_IN = {&MODULE_ASCLIN13, {&MODULE_P00, 9}, Ifx_RxSel_a}
IfxAsclin_Rx_In | IfxAsclin13_RXB_P00_11_IN = {&MODULE_ASCLIN13, {&MODULE_P00,11}, Ifx_RxSel_b}
IfxAsclin_Rx_In | IfxAsclin14_RXA_P33_3_IN = {&MODULE_ASCLIN14, {&MODULE_P33, 3}, Ifx_RxSel_a}
IfxAsclin_Rx_In | IfxAsclin14_RXB_P33_4_IN = {&MODULE_ASCLIN14, {&MODULE_P33, 4}, Ifx_RxSel_b}
IfxAsclin_Rx_In | IfxAsclin15_RXA_P32_4_IN = {&MODULE_ASCLIN15, {&MODULE_P32, 4}, Ifx_RxSel_a}
IfxAsclin_Rx_In | IfxAsclin15_RXB_P32_7_IN = {&MODULE_ASCLIN15, {&MODULE_P32, 7}, Ifx_RxSel_b}
IfxAsclin_Rx_In | IfxAsclin16_RXA_P23_5_IN = {&MODULE_ASCLIN16, {&MODULE_P23, 5}, Ifx_RxSel_a}
IfxAsclin_Rx_In | IfxAsclin16_RXB_P23_7_IN = {&MODULE_ASCLIN16, {&MODULE_P23, 7}, Ifx_RxSel_b}
IfxAsclin_Rx_In | IfxAsclin17_RXA_P22_11_IN = {&MODULE_ASCLIN17, {&MODULE_P22,11}, Ifx_RxSel_a}
IfxAsclin_Rx_In | IfxAsclin17_RXB_P21_0_IN = {&MODULE_ASCLIN17, {&MODULE_P21, 0}, Ifx_RxSel_b}
IfxAsclin_Rx_In | IfxAsclin18_RXA_P21_1_IN = {&MODULE_ASCLIN18, {&MODULE_P21, 1}, Ifx_RxSel_a}
IfxAsclin_Rx_In | IfxAsclin18_RXB_P21_4_IN = {&MODULE_ASCLIN18, {&MODULE_P21, 4}, Ifx_RxSel_b}
IfxAsclin_Rx_In | IfxAsclin19_RXA_P15_6_IN = {&MODULE_ASCLIN19, {&MODULE_P15, 6}, Ifx_RxSel_a}
IfxAsclin_Rx_In | IfxAsclin19_RXB_P15_7_IN = {&MODULE_ASCLIN19, {&MODULE_P15, 7}, Ifx_RxSel_b}
IfxAsclin_Rx_In | IfxAsclin1_RXA_P15_1_IN = {&MODULE_ASCLIN1, {&MODULE_P15, 1}, Ifx_RxSel_a}
IfxAsclin_Rx_In | IfxAsclin1_RXB_P15_5_IN = {&MODULE_ASCLIN1, {&MODULE_P15, 5}, Ifx_RxSel_b}
IfxAsclin_Rx_In | IfxAsclin1_RXC_P20_9_IN = {&MODULE_ASCLIN1, {&MODULE_P20, 9}, Ifx_RxSel_c}
IfxAsclin_Rx_In | IfxAsclin1_RXD_P14_8_IN = {&MODULE_ASCLIN1, {&MODULE_P14, 8}, Ifx_RxSel_d}
IfxAsclin_Rx_In | IfxAsclin1_RXE_P11_10_IN = {&MODULE_ASCLIN1, {&MODULE_P11,10}, Ifx_RxSel_e}
IfxAsclin_Rx_In | IfxAsclin1_RXF_P33_13_IN = {&MODULE_ASCLIN1, {&MODULE_P33,13}, Ifx_RxSel_f}
IfxAsclin_Rx_In | IfxAsclin1_RXG_P02_3_IN = {&MODULE_ASCLIN1, {&MODULE_P02, 3}, Ifx_RxSel_g}
IfxAsclin_Rx_In | IfxAsclin20_RXA_P14_7_IN = {&MODULE_ASCLIN20, {&MODULE_P14, 7}, Ifx_RxSel_a}
IfxAsclin_Rx_In | IfxAsclin20_RXB_P14_9_IN = {&MODULE_ASCLIN20, {&MODULE_P14, 9}, Ifx_RxSel_b}
IfxAsclin_Rx_In | IfxAsclin21_RXA_P13_0_IN = {&MODULE_ASCLIN21, {&MODULE_P13, 0}, Ifx_RxSel_a}
IfxAsclin_Rx_In | IfxAsclin21_RXB_P13_3_IN = {&MODULE_ASCLIN21, {&MODULE_P13, 3}, Ifx_RxSel_b}
IfxAsclin_Rx_In | IfxAsclin22_RXA_P10_4_IN = {&MODULE_ASCLIN22, {&MODULE_P10, 4}, Ifx_RxSel_a}
IfxAsclin_Rx_In | IfxAsclin22_RXB_P10_5_IN = {&MODULE_ASCLIN22, {&MODULE_P10, 5}, Ifx_RxSel_b}
IfxAsclin_Rx_In | IfxAsclin23_RXA_P10_6_IN = {&MODULE_ASCLIN23, {&MODULE_P10, 6}, Ifx_RxSel_a}
IfxAsclin_Rx_In | IfxAsclin23_RXB_P10_7_IN = {&MODULE_ASCLIN23, {&MODULE_P10, 7}, Ifx_RxSel_b}
IfxAsclin_Rx_In | IfxAsclin2_RXA_P14_3_IN = {&MODULE_ASCLIN2, {&MODULE_P14, 3}, Ifx_RxSel_a}
IfxAsclin_Rx_In | IfxAsclin2_RXB_P02_1_IN = {&MODULE_ASCLIN2, {&MODULE_P02, 1}, Ifx_RxSel_b}
IfxAsclin_Rx_In | IfxAsclin2_RXC_P02_10_IN = {&MODULE_ASCLIN2, {&MODULE_P02,10}, Ifx_RxSel_c}
IfxAsclin_Rx_In | IfxAsclin2_RXD_P10_6_IN = {&MODULE_ASCLIN2, {&MODULE_P10, 6}, Ifx_RxSel_d}
IfxAsclin_Rx_In | IfxAsclin2_RXE_P33_8_IN = {&MODULE_ASCLIN2, {&MODULE_P33, 8}, Ifx_RxSel_e}
IfxAsclin_Rx_In | IfxAsclin2_RXF_P32_6_IN = {&MODULE_ASCLIN2, {&MODULE_P32, 6}, Ifx_RxSel_f}
IfxAsclin_Rx_In | IfxAsclin2_RXG_P02_0_IN = {&MODULE_ASCLIN2, {&MODULE_P02, 0}, Ifx_RxSel_g}
IfxAsclin_Rx_In | IfxAsclin3_RXA_P15_7_IN = {&MODULE_ASCLIN3, {&MODULE_P15, 7}, Ifx_RxSel_a}
IfxAsclin_Rx_In | IfxAsclin3_RXB_P11_0_IN = {&MODULE_ASCLIN3, {&MODULE_P11, 0}, Ifx_RxSel_b}
IfxAsclin_Rx_In | IfxAsclin3_RXC_P20_3_IN = {&MODULE_ASCLIN3, {&MODULE_P20, 3}, Ifx_RxSel_c}
IfxAsclin_Rx_In | IfxAsclin3_RXD_P32_2_IN = {&MODULE_ASCLIN3, {&MODULE_P32, 2}, Ifx_RxSel_d}
IfxAsclin_Rx_In | IfxAsclin3_RXE_P00_1_IN = {&MODULE_ASCLIN3, {&MODULE_P00, 1}, Ifx_RxSel_e}
IfxAsclin_Rx_In | IfxAsclin3_RXF_P21_6_IN = {&MODULE_ASCLIN3, {&MODULE_P21, 6}, Ifx_RxSel_f}
IfxAsclin_Rx_In | IfxAsclin3_RXG_P21_2_IN = {&MODULE_ASCLIN3, {&MODULE_P21, 2}, Ifx_RxSel_g}
IfxAsclin_Rx_In | IfxAsclin3_RXG_P21_3_IN = {&MODULE_ASCLIN3, {&MODULE_P21, 3}, Ifx_RxSel_g}
IfxAsclin_Rx_In | IfxAsclin3_RXH_P13_12_IN = {&MODULE_ASCLIN3, {&MODULE_P13,12}, Ifx_RxSel_h}
IfxAsclin_Rx_In | IfxAsclin4_RXA_P00_12_IN = {&MODULE_ASCLIN4, {&MODULE_P00,12}, Ifx_RxSel_a}
IfxAsclin_Rx_In | IfxAsclin4_RXB_P34_2_IN = {&MODULE_ASCLIN4, {&MODULE_P34, 2}, Ifx_RxSel_b}
IfxAsclin_Rx_In | IfxAsclin4_RXC_P22_6_IN = {&MODULE_ASCLIN4, {&MODULE_P22, 6}, Ifx_RxSel_c}
IfxAsclin_Rx_In | IfxAsclin4_RXD_P22_9_IN = {&MODULE_ASCLIN4, {&MODULE_P22, 9}, Ifx_RxSel_d}
IfxAsclin_Rx_In | IfxAsclin5_RXA_P00_6_IN = {&MODULE_ASCLIN5, {&MODULE_P00, 6}, Ifx_RxSel_a}
IfxAsclin_Rx_In | IfxAsclin5_RXB_P33_4_IN = {&MODULE_ASCLIN5, {&MODULE_P33, 4}, Ifx_RxSel_b}
IfxAsclin_Rx_In | IfxAsclin5_RXC_P22_3_IN = {&MODULE_ASCLIN5, {&MODULE_P22, 3}, Ifx_RxSel_c}
IfxAsclin_Rx_In | IfxAsclin5_RXD_P14_15_IN = {&MODULE_ASCLIN5, {&MODULE_P14,15}, Ifx_RxSel_d}
IfxAsclin_Rx_In | IfxAsclin6_RXA_P23_3_IN = {&MODULE_ASCLIN6, {&MODULE_P23, 3}, Ifx_RxSel_a}
IfxAsclin_Rx_In | IfxAsclin6_RXB_P01_0_IN = {&MODULE_ASCLIN6, {&MODULE_P01, 0}, Ifx_RxSel_b}
IfxAsclin_Rx_In | IfxAsclin6_RXC_P32_6_IN = {&MODULE_ASCLIN6, {&MODULE_P32, 6}, Ifx_RxSel_c}
IfxAsclin_Rx_In | IfxAsclin6_RXD_P10_9_IN = {&MODULE_ASCLIN6, {&MODULE_P10, 9}, Ifx_RxSel_d}
IfxAsclin_Rx_In | IfxAsclin6_RXE_P22_0_IN = {&MODULE_ASCLIN6, {&MODULE_P22, 0}, Ifx_RxSel_e}
IfxAsclin_Rx_In | IfxAsclin6_RXF_P23_1_IN = {&MODULE_ASCLIN6, {&MODULE_P23, 1}, Ifx_RxSel_f}
IfxAsclin_Rx_In | IfxAsclin7_RXA_P14_15_IN = {&MODULE_ASCLIN7, {&MODULE_P14,15}, Ifx_RxSel_a}
IfxAsclin_Rx_In | IfxAsclin7_RXB_P01_8_IN = {&MODULE_ASCLIN7, {&MODULE_P01, 8}, Ifx_RxSel_b}
IfxAsclin_Rx_In | IfxAsclin7_RXC_P23_2_IN = {&MODULE_ASCLIN7, {&MODULE_P23, 2}, Ifx_RxSel_c}
IfxAsclin_Rx_In | IfxAsclin7_RXD_P13_11_IN = {&MODULE_ASCLIN7, {&MODULE_P13,11}, Ifx_RxSel_d}
IfxAsclin_Rx_In | IfxAsclin7_RXE_P22_1_IN = {&MODULE_ASCLIN7, {&MODULE_P22, 1}, Ifx_RxSel_e}
IfxAsclin_Rx_In | IfxAsclin7_RXF_P22_4_IN = {&MODULE_ASCLIN7, {&MODULE_P22, 4}, Ifx_RxSel_f}
IfxAsclin_Rx_In | IfxAsclin8_RXA_P02_9_IN = {&MODULE_ASCLIN8, {&MODULE_P02, 9}, Ifx_RxSel_a}
IfxAsclin_Rx_In | IfxAsclin8_RXB_P02_10_IN = {&MODULE_ASCLIN8, {&MODULE_P02,10}, Ifx_RxSel_b}
IfxAsclin_Rx_In | IfxAsclin8_RXC_P33_1_IN = {&MODULE_ASCLIN8, {&MODULE_P33, 1}, Ifx_RxSel_c}
IfxAsclin_Rx_In | IfxAsclin8_RXD_P33_6_IN = {&MODULE_ASCLIN8, {&MODULE_P33, 6}, Ifx_RxSel_d}
IfxAsclin_Rx_In | IfxAsclin8_RXE_P34_5_IN = {&MODULE_ASCLIN8, {&MODULE_P34, 5}, Ifx_RxSel_e}
IfxAsclin_Rx_In | IfxAsclin9_RXA_P01_5_IN = {&MODULE_ASCLIN9, {&MODULE_P01, 5}, Ifx_RxSel_a}
IfxAsclin_Rx_In | IfxAsclin9_RXB_P01_7_IN = {&MODULE_ASCLIN9, {&MODULE_P01, 7}, Ifx_RxSel_b}
IfxAsclin_Rx_In | IfxAsclin9_RXC_P14_7_IN = {&MODULE_ASCLIN9, {&MODULE_P14, 7}, Ifx_RxSel_c}
IfxAsclin_Rx_In | IfxAsclin9_RXD_P14_9_IN = {&MODULE_ASCLIN9, {&MODULE_P14, 9}, Ifx_RxSel_d}
IfxAsclin_Rx_In | IfxAsclin9_RXE_P20_6_IN = {&MODULE_ASCLIN9, {&MODULE_P20, 6}, Ifx_RxSel_e}
IfxAsclin_Rx_In | IfxAsclin9_RXF_P20_7_IN = {&MODULE_ASCLIN9, {&MODULE_P20, 7}, Ifx_RxSel_f}
IfxAsclin_Sclk_Out | IfxAsclin0_SCLK_P14_0_OUT = {&MODULE_ASCLIN0, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt6}
IfxAsclin_Sclk_Out | IfxAsclin0_SCLK_P15_2_OUT = {&MODULE_ASCLIN0, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt6}
IfxAsclin_Sclk_Out | IfxAsclin10_SCLK_P13_2_OUT = {&MODULE_ASCLIN10, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt2}
IfxAsclin_Sclk_Out | IfxAsclin11_SCLK_P21_3_OUT = {&MODULE_ASCLIN11, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt2}
IfxAsclin_Sclk_Out | IfxAsclin1_SCLK_P15_0_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt6}
IfxAsclin_Sclk_Out | IfxAsclin1_SCLK_P20_10_OUT = {&MODULE_ASCLIN1, {&MODULE_P20,10}, IfxPort_OutputIdx_alt6}
IfxAsclin_Sclk_Out | IfxAsclin1_SCLK_P33_11_OUT = {&MODULE_ASCLIN1, {&MODULE_P33,11}, IfxPort_OutputIdx_alt2}
IfxAsclin_Sclk_Out | IfxAsclin1_SCLK_P33_12_OUT = {&MODULE_ASCLIN1, {&MODULE_P33,12}, IfxPort_OutputIdx_alt4}
IfxAsclin_Sclk_Out | IfxAsclin2_SCLK_P02_4_OUT = {&MODULE_ASCLIN2, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt2}
IfxAsclin_Sclk_Out | IfxAsclin2_SCLK_P10_6_OUT = {&MODULE_ASCLIN2, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt2}
IfxAsclin_Sclk_Out | IfxAsclin2_SCLK_P14_2_OUT = {&MODULE_ASCLIN2, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt6}
IfxAsclin_Sclk_Out | IfxAsclin2_SCLK_P33_7_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt2}
IfxAsclin_Sclk_Out | IfxAsclin2_SCLK_P33_9_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt4}
IfxAsclin_Sclk_Out | IfxAsclin3_SCLK_P00_0_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt2}
IfxAsclin_Sclk_Out | IfxAsclin3_SCLK_P00_2_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt2}
IfxAsclin_Sclk_Out | IfxAsclin3_SCLK_P11_1_OUT = {&MODULE_ASCLIN3, {&MODULE_P11, 1}, IfxPort_OutputIdx_alt2}
IfxAsclin_Sclk_Out | IfxAsclin3_SCLK_P11_4_OUT = {&MODULE_ASCLIN3, {&MODULE_P11, 4}, IfxPort_OutputIdx_alt2}
IfxAsclin_Sclk_Out | IfxAsclin3_SCLK_P15_6_OUT = {&MODULE_ASCLIN3, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt6}
IfxAsclin_Sclk_Out | IfxAsclin3_SCLK_P15_8_OUT = {&MODULE_ASCLIN3, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt6}
IfxAsclin_Sclk_Out | IfxAsclin3_SCLK_P20_0_OUT = {&MODULE_ASCLIN3, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt3}
IfxAsclin_Sclk_Out | IfxAsclin3_SCLK_P21_5_OUT = {&MODULE_ASCLIN3, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt2}
IfxAsclin_Sclk_Out | IfxAsclin3_SCLK_P21_7_OUT = {&MODULE_ASCLIN3, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt3}
IfxAsclin_Sclk_Out | IfxAsclin3_SCLK_P32_3_OUT = {&MODULE_ASCLIN3, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt4}
IfxAsclin_Sclk_Out | IfxAsclin3_SCLK_P33_2_OUT = {&MODULE_ASCLIN3, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt2}
IfxAsclin_Sclk_Out | IfxAsclin4_SCLK_P00_10_OUT = {&MODULE_ASCLIN4, {&MODULE_P00,10}, IfxPort_OutputIdx_alt2}
IfxAsclin_Sclk_Out | IfxAsclin4_SCLK_P22_7_OUT = {&MODULE_ASCLIN4, {&MODULE_P22, 7}, IfxPort_OutputIdx_alt2}
IfxAsclin_Sclk_Out | IfxAsclin4_SCLK_P34_3_OUT = {&MODULE_ASCLIN4, {&MODULE_P34, 3}, IfxPort_OutputIdx_alt2}
IfxAsclin_Sclk_Out | IfxAsclin5_SCLK_P14_12_OUT = {&MODULE_ASCLIN5, {&MODULE_P14,12}, IfxPort_OutputIdx_alt2}
IfxAsclin_Sclk_Out | IfxAsclin5_SCLK_P22_8_OUT = {&MODULE_ASCLIN5, {&MODULE_P22, 8}, IfxPort_OutputIdx_alt2}
IfxAsclin_Sclk_Out | IfxAsclin5_SCLK_P33_3_OUT = {&MODULE_ASCLIN5, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt2}
IfxAsclin_Sclk_Out | IfxAsclin6_SCLK_P02_14_OUT = {&MODULE_ASCLIN6, {&MODULE_P02,14}, IfxPort_OutputIdx_alt2}
IfxAsclin_Sclk_Out | IfxAsclin6_SCLK_P10_11_OUT = {&MODULE_ASCLIN6, {&MODULE_P10,11}, IfxPort_OutputIdx_alt2}
IfxAsclin_Sclk_Out | IfxAsclin6_SCLK_P23_1_OUT = {&MODULE_ASCLIN6, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt7}
IfxAsclin_Sclk_Out | IfxAsclin7_SCLK_P01_10_OUT = {&MODULE_ASCLIN7, {&MODULE_P01,10}, IfxPort_OutputIdx_alt2}
IfxAsclin_Sclk_Out | IfxAsclin7_SCLK_P13_13_OUT = {&MODULE_ASCLIN7, {&MODULE_P13,13}, IfxPort_OutputIdx_alt2}
IfxAsclin_Sclk_Out | IfxAsclin7_SCLK_P14_12_OUT = {&MODULE_ASCLIN7, {&MODULE_P14,12}, IfxPort_OutputIdx_alt3}
IfxAsclin_Sclk_Out | IfxAsclin8_SCLK_P02_8_OUT = {&MODULE_ASCLIN8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt3}
IfxAsclin_Sclk_Out | IfxAsclin9_SCLK_P01_6_OUT = {&MODULE_ASCLIN9, {&MODULE_P01, 6}, IfxPort_OutputIdx_alt3}
IfxAsclin_Slso_Out | IfxAsclin10_SLSO_P13_3_OUT = {&MODULE_ASCLIN10, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt2}
IfxAsclin_Slso_Out | IfxAsclin11_SLSO_P21_4_OUT = {&MODULE_ASCLIN11, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt2}
IfxAsclin_Slso_Out | IfxAsclin1_SLSO_P14_3_OUT = {&MODULE_ASCLIN1, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt4}
IfxAsclin_Slso_Out | IfxAsclin1_SLSO_P20_8_OUT = {&MODULE_ASCLIN1, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt2}
IfxAsclin_Slso_Out | IfxAsclin1_SLSO_P33_10_OUT = {&MODULE_ASCLIN1, {&MODULE_P33,10}, IfxPort_OutputIdx_alt4}
IfxAsclin_Slso_Out | IfxAsclin2_SLSO_P02_3_OUT = {&MODULE_ASCLIN2, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt2}
IfxAsclin_Slso_Out | IfxAsclin2_SLSO_P10_5_OUT = {&MODULE_ASCLIN2, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt6}
IfxAsclin_Slso_Out | IfxAsclin2_SLSO_P33_6_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt2}
IfxAsclin_Slso_Out | IfxAsclin3_SLSO_P00_3_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt2}
IfxAsclin_Slso_Out | IfxAsclin3_SLSO_P12_1_OUT = {&MODULE_ASCLIN3, {&MODULE_P12, 1}, IfxPort_OutputIdx_alt2}
IfxAsclin_Slso_Out | IfxAsclin3_SLSO_P14_3_OUT = {&MODULE_ASCLIN3, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt5}
IfxAsclin_Slso_Out | IfxAsclin3_SLSO_P21_2_OUT = {&MODULE_ASCLIN3, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt2}
IfxAsclin_Slso_Out | IfxAsclin3_SLSO_P21_6_OUT = {&MODULE_ASCLIN3, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt2}
IfxAsclin_Slso_Out | IfxAsclin3_SLSO_P33_1_OUT = {&MODULE_ASCLIN3, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt2}
IfxAsclin_Slso_Out | IfxAsclin4_SLSO_P00_11_OUT = {&MODULE_ASCLIN4, {&MODULE_P00,11}, IfxPort_OutputIdx_alt2}
IfxAsclin_Slso_Out | IfxAsclin4_SLSO_P22_11_OUT = {&MODULE_ASCLIN4, {&MODULE_P22,11}, IfxPort_OutputIdx_alt2}
IfxAsclin_Slso_Out | IfxAsclin4_SLSO_P22_4_OUT = {&MODULE_ASCLIN4, {&MODULE_P22, 4}, IfxPort_OutputIdx_alt2}
IfxAsclin_Slso_Out | IfxAsclin4_SLSO_P34_4_OUT = {&MODULE_ASCLIN4, {&MODULE_P34, 4}, IfxPort_OutputIdx_alt2}
IfxAsclin_Slso_Out | IfxAsclin5_SLSO_P14_8_OUT = {&MODULE_ASCLIN5, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt2}
IfxAsclin_Slso_Out | IfxAsclin5_SLSO_P33_5_OUT = {&MODULE_ASCLIN5, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt7}
IfxAsclin_Slso_Out | IfxAsclin6_SLSO_P02_12_OUT = {&MODULE_ASCLIN6, {&MODULE_P02,12}, IfxPort_OutputIdx_alt4}
IfxAsclin_Slso_Out | IfxAsclin6_SLSO_P10_13_OUT = {&MODULE_ASCLIN6, {&MODULE_P10,13}, IfxPort_OutputIdx_alt2}
IfxAsclin_Slso_Out | IfxAsclin6_SLSO_P23_4_OUT = {&MODULE_ASCLIN6, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt2}
IfxAsclin_Slso_Out | IfxAsclin7_SLSO_P01_11_OUT = {&MODULE_ASCLIN7, {&MODULE_P01,11}, IfxPort_OutputIdx_alt2}
IfxAsclin_Slso_Out | IfxAsclin7_SLSO_P13_15_OUT = {&MODULE_ASCLIN7, {&MODULE_P13,15}, IfxPort_OutputIdx_alt2}
IfxAsclin_Slso_Out | IfxAsclin7_SLSO_P14_8_OUT = {&MODULE_ASCLIN7, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt3}
IfxAsclin_Slso_Out | IfxAsclin8_SLSO_P02_11_OUT = {&MODULE_ASCLIN8, {&MODULE_P02,11}, IfxPort_OutputIdx_alt3}
IfxAsclin_Slso_Out | IfxAsclin9_SLSO_P01_4_OUT = {&MODULE_ASCLIN9, {&MODULE_P01, 4}, IfxPort_OutputIdx_alt3}
IfxAsclin_Tx_Out | IfxAsclin0_TX_P01_13_OUT = {&MODULE_ASCLIN0, {&MODULE_P01,13}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin0_TX_P13_10_OUT = {&MODULE_ASCLIN0, {&MODULE_P13,10}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin0_TX_P14_0_OUT = {&MODULE_ASCLIN0, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin0_TX_P14_1_OUT = {&MODULE_ASCLIN0, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin0_TX_P15_2_OUT = {&MODULE_ASCLIN0, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin0_TX_P15_3_OUT = {&MODULE_ASCLIN0, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin0_TX_P33_9_OUT = {&MODULE_ASCLIN0, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt6}
IfxAsclin_Tx_Out | IfxAsclin10_TX_P00_8_OUT = {&MODULE_ASCLIN10, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt3}
IfxAsclin_Tx_Out | IfxAsclin10_TX_P13_0_OUT = {&MODULE_ASCLIN10, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin11_TX_P10_0_OUT = {&MODULE_ASCLIN11, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin11_TX_P21_0_OUT = {&MODULE_ASCLIN11, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin11_TX_P21_5_OUT = {&MODULE_ASCLIN11, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt3}
IfxAsclin_Tx_Out | IfxAsclin12_TX_P00_3_OUT = {&MODULE_ASCLIN12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt3}
IfxAsclin_Tx_Out | IfxAsclin12_TX_P01_6_OUT = {&MODULE_ASCLIN12, {&MODULE_P01, 6}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin13_TX_P00_10_OUT = {&MODULE_ASCLIN13, {&MODULE_P00,10}, IfxPort_OutputIdx_alt3}
IfxAsclin_Tx_Out | IfxAsclin13_TX_P00_11_OUT = {&MODULE_ASCLIN13, {&MODULE_P00,11}, IfxPort_OutputIdx_alt3}
IfxAsclin_Tx_Out | IfxAsclin14_TX_P33_2_OUT = {&MODULE_ASCLIN14, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt7}
IfxAsclin_Tx_Out | IfxAsclin14_TX_P33_3_OUT = {&MODULE_ASCLIN14, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt7}
IfxAsclin_Tx_Out | IfxAsclin15_TX_P32_7_OUT = {&MODULE_ASCLIN15, {&MODULE_P32, 7}, IfxPort_OutputIdx_alt4}
IfxAsclin_Tx_Out | IfxAsclin15_TX_P33_0_OUT = {&MODULE_ASCLIN15, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt4}
IfxAsclin_Tx_Out | IfxAsclin16_TX_P23_6_OUT = {&MODULE_ASCLIN16, {&MODULE_P23, 6}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin16_TX_P23_7_OUT = {&MODULE_ASCLIN16, {&MODULE_P23, 7}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin17_TX_P22_11_OUT = {&MODULE_ASCLIN17, {&MODULE_P22,11}, IfxPort_OutputIdx_alt3}
IfxAsclin_Tx_Out | IfxAsclin17_TX_P22_7_OUT = {&MODULE_ASCLIN17, {&MODULE_P22, 7}, IfxPort_OutputIdx_alt3}
IfxAsclin_Tx_Out | IfxAsclin18_TX_P21_3_OUT = {&MODULE_ASCLIN18, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt3}
IfxAsclin_Tx_Out | IfxAsclin18_TX_P21_4_OUT = {&MODULE_ASCLIN18, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt3}
IfxAsclin_Tx_Out | IfxAsclin19_TX_P15_4_OUT = {&MODULE_ASCLIN19, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt4}
IfxAsclin_Tx_Out | IfxAsclin19_TX_P15_7_OUT = {&MODULE_ASCLIN19, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt4}
IfxAsclin_Tx_Out | IfxAsclin1_TX_P02_2_OUT = {&MODULE_ASCLIN1, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin1_TX_P11_12_OUT = {&MODULE_ASCLIN1, {&MODULE_P11,12}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin1_TX_P14_10_OUT = {&MODULE_ASCLIN1, {&MODULE_P14,10}, IfxPort_OutputIdx_alt4}
IfxAsclin_Tx_Out | IfxAsclin1_TX_P14_15_OUT = {&MODULE_ASCLIN1, {&MODULE_P14,15}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin1_TX_P15_0_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin1_TX_P15_1_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin1_TX_P15_4_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin1_TX_P15_5_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin1_TX_P20_10_OUT = {&MODULE_ASCLIN1, {&MODULE_P20,10}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin1_TX_P33_12_OUT = {&MODULE_ASCLIN1, {&MODULE_P33,12}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin1_TX_P33_13_OUT = {&MODULE_ASCLIN1, {&MODULE_P33,13}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin20_TX_P14_7_OUT = {&MODULE_ASCLIN20, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt7}
IfxAsclin_Tx_Out | IfxAsclin20_TX_P14_8_OUT = {&MODULE_ASCLIN20, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt7}
IfxAsclin_Tx_Out | IfxAsclin21_TX_P13_2_OUT = {&MODULE_ASCLIN21, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt7}
IfxAsclin_Tx_Out | IfxAsclin21_TX_P13_3_OUT = {&MODULE_ASCLIN21, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt6}
IfxAsclin_Tx_Out | IfxAsclin22_TX_P10_0_OUT = {&MODULE_ASCLIN22, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt6}
IfxAsclin_Tx_Out | IfxAsclin22_TX_P10_4_OUT = {&MODULE_ASCLIN22, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin23_TX_P10_7_OUT = {&MODULE_ASCLIN23, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin23_TX_P10_8_OUT = {&MODULE_ASCLIN23, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt4}
IfxAsclin_Tx_Out | IfxAsclin2_TX_P02_0_OUT = {&MODULE_ASCLIN2, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin2_TX_P02_9_OUT = {&MODULE_ASCLIN2, {&MODULE_P02, 9}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin2_TX_P10_5_OUT = {&MODULE_ASCLIN2, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin2_TX_P14_2_OUT = {&MODULE_ASCLIN2, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin2_TX_P14_3_OUT = {&MODULE_ASCLIN2, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin2_TX_P32_5_OUT = {&MODULE_ASCLIN2, {&MODULE_P32, 5}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin2_TX_P33_8_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin2_TX_P33_9_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin3_TX_P00_0_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt3}
IfxAsclin_Tx_Out | IfxAsclin3_TX_P00_1_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin3_TX_P11_0_OUT = {&MODULE_ASCLIN3, {&MODULE_P11, 0}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin3_TX_P11_1_OUT = {&MODULE_ASCLIN3, {&MODULE_P11, 1}, IfxPort_OutputIdx_alt3}
IfxAsclin_Tx_Out | IfxAsclin3_TX_P13_9_OUT = {&MODULE_ASCLIN3, {&MODULE_P13, 9}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin3_TX_P15_6_OUT = {&MODULE_ASCLIN3, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin3_TX_P15_7_OUT = {&MODULE_ASCLIN3, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin3_TX_P20_0_OUT = {&MODULE_ASCLIN3, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin3_TX_P20_3_OUT = {&MODULE_ASCLIN3, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin3_TX_P21_7_OUT = {&MODULE_ASCLIN3, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin3_TX_P22_0_OUT = {&MODULE_ASCLIN3, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin3_TX_P22_1_OUT = {&MODULE_ASCLIN3, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin3_TX_P32_2_OUT = {&MODULE_ASCLIN3, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin3_TX_P32_3_OUT = {&MODULE_ASCLIN3, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin4_TX_P00_9_OUT = {&MODULE_ASCLIN4, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt5}
IfxAsclin_Tx_Out | IfxAsclin4_TX_P22_10_OUT = {&MODULE_ASCLIN4, {&MODULE_P22,10}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin4_TX_P22_5_OUT = {&MODULE_ASCLIN4, {&MODULE_P22, 5}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin4_TX_P34_1_OUT = {&MODULE_ASCLIN4, {&MODULE_P34, 1}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin5_TX_P00_7_OUT = {&MODULE_ASCLIN5, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin5_TX_P14_14_OUT = {&MODULE_ASCLIN5, {&MODULE_P14,14}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin5_TX_P22_2_OUT = {&MODULE_ASCLIN5, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin5_TX_P33_0_OUT = {&MODULE_ASCLIN5, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin6_TX_P01_1_OUT = {&MODULE_ASCLIN6, {&MODULE_P01, 1}, IfxPort_OutputIdx_alt4}
IfxAsclin_Tx_Out | IfxAsclin6_TX_P02_15_OUT = {&MODULE_ASCLIN6, {&MODULE_P02,15}, IfxPort_OutputIdx_alt4}
IfxAsclin_Tx_Out | IfxAsclin6_TX_P10_10_OUT = {&MODULE_ASCLIN6, {&MODULE_P10,10}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin6_TX_P22_0_OUT = {&MODULE_ASCLIN6, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt7}
IfxAsclin_Tx_Out | IfxAsclin6_TX_P23_5_OUT = {&MODULE_ASCLIN6, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin6_TX_P32_7_OUT = {&MODULE_ASCLIN6, {&MODULE_P32, 7}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin7_TX_P01_12_OUT = {&MODULE_ASCLIN7, {&MODULE_P01,12}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin7_TX_P01_9_OUT = {&MODULE_ASCLIN7, {&MODULE_P01, 9}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin7_TX_P13_12_OUT = {&MODULE_ASCLIN7, {&MODULE_P13,12}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin7_TX_P14_14_OUT = {&MODULE_ASCLIN7, {&MODULE_P14,14}, IfxPort_OutputIdx_alt3}
IfxAsclin_Tx_Out | IfxAsclin7_TX_P22_1_OUT = {&MODULE_ASCLIN7, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt7}
IfxAsclin_Tx_Out | IfxAsclin7_TX_P23_3_OUT = {&MODULE_ASCLIN7, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin8_TX_P02_9_OUT = {&MODULE_ASCLIN8, {&MODULE_P02, 9}, IfxPort_OutputIdx_alt3}
IfxAsclin_Tx_Out | IfxAsclin8_TX_P33_7_OUT = {&MODULE_ASCLIN8, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt4}
IfxAsclin_Tx_Out | IfxAsclin8_TX_P34_5_OUT = {&MODULE_ASCLIN8, {&MODULE_P34, 5}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin9_TX_P01_7_OUT = {&MODULE_ASCLIN9, {&MODULE_P01, 7}, IfxPort_OutputIdx_alt3}
IfxAsclin_Tx_Out | IfxAsclin9_TX_P14_7_OUT = {&MODULE_ASCLIN9, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt4}
IfxAsclin_Tx_Out | IfxAsclin9_TX_P20_7_OUT = {&MODULE_ASCLIN9, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt2}
const IfxAsclin_Cts_In * | IfxAsclin_Cts_In_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS]
const IfxAsclin_Rts_Out * | IfxAsclin_Rts_Out_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS]
const IfxAsclin_Rx_In * | IfxAsclin_Rx_In_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS]
const IfxAsclin_Sclk_Out * | IfxAsclin_Sclk_Out_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS]
const IfxAsclin_Slso_Out * | IfxAsclin_Slso_Out_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS]
const IfxAsclin_Tx_Out * | IfxAsclin_Tx_Out_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS]

Detailed Description

ASCLIN I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxAsclin_PinMap.c.

Variable Documentation

◆ IfxAsclin0_CTSA_P14_9_IN

IfxAsclin_Cts_In IfxAsclin0_CTSA_P14_9_IN = {&MODULE_ASCLIN0, {&MODULE_P14, 9}, Ifx_RxSel_a}

Definition at line 45 of file IfxAsclin_PinMap.c.

◆ IfxAsclin0_RTS_P14_7_OUT

IfxAsclin_Rts_Out IfxAsclin0_RTS_P14_7_OUT = {&MODULE_ASCLIN0, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt2}

Definition at line 51 of file IfxAsclin_PinMap.c.

◆ IfxAsclin0_RXA_P14_1_IN

IfxAsclin_Rx_In IfxAsclin0_RXA_P14_1_IN = {&MODULE_ASCLIN0, {&MODULE_P14, 1}, Ifx_RxSel_a}

Definition at line 57 of file IfxAsclin_PinMap.c.

◆ IfxAsclin0_RXB_P15_3_IN

IfxAsclin_Rx_In IfxAsclin0_RXB_P15_3_IN = {&MODULE_ASCLIN0, {&MODULE_P15, 3}, Ifx_RxSel_b}

Definition at line 58 of file IfxAsclin_PinMap.c.

◆ IfxAsclin0_RXC_P01_8_IN

IfxAsclin_Rx_In IfxAsclin0_RXC_P01_8_IN = {&MODULE_ASCLIN0, {&MODULE_P01, 8}, Ifx_RxSel_c}

Definition at line 59 of file IfxAsclin_PinMap.c.

◆ IfxAsclin0_RXD_P33_10_IN

IfxAsclin_Rx_In IfxAsclin0_RXD_P33_10_IN = {&MODULE_ASCLIN0, {&MODULE_P33,10}, Ifx_RxSel_d}

Definition at line 60 of file IfxAsclin_PinMap.c.

◆ IfxAsclin0_RXE_P13_11_IN

IfxAsclin_Rx_In IfxAsclin0_RXE_P13_11_IN = {&MODULE_ASCLIN0, {&MODULE_P13,11}, Ifx_RxSel_e}

Definition at line 61 of file IfxAsclin_PinMap.c.

◆ IfxAsclin0_SCLK_P14_0_OUT

IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P14_0_OUT = {&MODULE_ASCLIN0, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt6}

Definition at line 150 of file IfxAsclin_PinMap.c.

◆ IfxAsclin0_SCLK_P15_2_OUT

IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P15_2_OUT = {&MODULE_ASCLIN0, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt6}

Definition at line 151 of file IfxAsclin_PinMap.c.

◆ IfxAsclin0_TX_P01_13_OUT

IfxAsclin_Tx_Out IfxAsclin0_TX_P01_13_OUT = {&MODULE_ASCLIN0, {&MODULE_P01,13}, IfxPort_OutputIdx_alt2}

Definition at line 216 of file IfxAsclin_PinMap.c.

◆ IfxAsclin0_TX_P13_10_OUT

IfxAsclin_Tx_Out IfxAsclin0_TX_P13_10_OUT = {&MODULE_ASCLIN0, {&MODULE_P13,10}, IfxPort_OutputIdx_alt2}

Definition at line 217 of file IfxAsclin_PinMap.c.

◆ IfxAsclin0_TX_P14_0_OUT

IfxAsclin_Tx_Out IfxAsclin0_TX_P14_0_OUT = {&MODULE_ASCLIN0, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt2}

Definition at line 218 of file IfxAsclin_PinMap.c.

◆ IfxAsclin0_TX_P14_1_OUT

IfxAsclin_Tx_Out IfxAsclin0_TX_P14_1_OUT = {&MODULE_ASCLIN0, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt2}

Definition at line 219 of file IfxAsclin_PinMap.c.

◆ IfxAsclin0_TX_P15_2_OUT

IfxAsclin_Tx_Out IfxAsclin0_TX_P15_2_OUT = {&MODULE_ASCLIN0, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt2}

Definition at line 220 of file IfxAsclin_PinMap.c.

◆ IfxAsclin0_TX_P15_3_OUT

IfxAsclin_Tx_Out IfxAsclin0_TX_P15_3_OUT = {&MODULE_ASCLIN0, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt2}

Definition at line 221 of file IfxAsclin_PinMap.c.

◆ IfxAsclin0_TX_P33_9_OUT

IfxAsclin_Tx_Out IfxAsclin0_TX_P33_9_OUT = {&MODULE_ASCLIN0, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt6}

Definition at line 222 of file IfxAsclin_PinMap.c.

◆ IfxAsclin10_RXA_P00_4_IN

IfxAsclin_Rx_In IfxAsclin10_RXA_P00_4_IN = {&MODULE_ASCLIN10, {&MODULE_P00, 4}, Ifx_RxSel_a}

Definition at line 62 of file IfxAsclin_PinMap.c.

◆ IfxAsclin10_RXB_P00_8_IN

IfxAsclin_Rx_In IfxAsclin10_RXB_P00_8_IN = {&MODULE_ASCLIN10, {&MODULE_P00, 8}, Ifx_RxSel_b}

Definition at line 63 of file IfxAsclin_PinMap.c.

◆ IfxAsclin10_RXC_P13_0_IN

IfxAsclin_Rx_In IfxAsclin10_RXC_P13_0_IN = {&MODULE_ASCLIN10, {&MODULE_P13, 0}, Ifx_RxSel_c}

Definition at line 64 of file IfxAsclin_PinMap.c.

◆ IfxAsclin10_RXD_P13_1_IN

IfxAsclin_Rx_In IfxAsclin10_RXD_P13_1_IN = {&MODULE_ASCLIN10, {&MODULE_P13, 1}, Ifx_RxSel_d}

Definition at line 65 of file IfxAsclin_PinMap.c.

◆ IfxAsclin10_SCLK_P13_2_OUT

IfxAsclin_Sclk_Out IfxAsclin10_SCLK_P13_2_OUT = {&MODULE_ASCLIN10, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt2}

Definition at line 152 of file IfxAsclin_PinMap.c.

◆ IfxAsclin10_SLSO_P13_3_OUT

IfxAsclin_Slso_Out IfxAsclin10_SLSO_P13_3_OUT = {&MODULE_ASCLIN10, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt2}

Definition at line 188 of file IfxAsclin_PinMap.c.

◆ IfxAsclin10_TX_P00_8_OUT

IfxAsclin_Tx_Out IfxAsclin10_TX_P00_8_OUT = {&MODULE_ASCLIN10, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt3}

Definition at line 223 of file IfxAsclin_PinMap.c.

◆ IfxAsclin10_TX_P13_0_OUT

IfxAsclin_Tx_Out IfxAsclin10_TX_P13_0_OUT = {&MODULE_ASCLIN10, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt2}

Definition at line 224 of file IfxAsclin_PinMap.c.

◆ IfxAsclin11_RXA_P10_0_IN

IfxAsclin_Rx_In IfxAsclin11_RXA_P10_0_IN = {&MODULE_ASCLIN11, {&MODULE_P10, 0}, Ifx_RxSel_a}

Definition at line 66 of file IfxAsclin_PinMap.c.

◆ IfxAsclin11_RXB_P10_4_IN

IfxAsclin_Rx_In IfxAsclin11_RXB_P10_4_IN = {&MODULE_ASCLIN11, {&MODULE_P10, 4}, Ifx_RxSel_b}

Definition at line 67 of file IfxAsclin_PinMap.c.

◆ IfxAsclin11_RXC_P21_0_IN

IfxAsclin_Rx_In IfxAsclin11_RXC_P21_0_IN = {&MODULE_ASCLIN11, {&MODULE_P21, 0}, Ifx_RxSel_c}

Definition at line 68 of file IfxAsclin_PinMap.c.

◆ IfxAsclin11_RXD_P21_1_IN

IfxAsclin_Rx_In IfxAsclin11_RXD_P21_1_IN = {&MODULE_ASCLIN11, {&MODULE_P21, 1}, Ifx_RxSel_d}

Definition at line 69 of file IfxAsclin_PinMap.c.

◆ IfxAsclin11_RXE_P21_2_IN

IfxAsclin_Rx_In IfxAsclin11_RXE_P21_2_IN = {&MODULE_ASCLIN11, {&MODULE_P21, 2}, Ifx_RxSel_e}

Definition at line 70 of file IfxAsclin_PinMap.c.

◆ IfxAsclin11_RXF_P21_5_IN

IfxAsclin_Rx_In IfxAsclin11_RXF_P21_5_IN = {&MODULE_ASCLIN11, {&MODULE_P21, 5}, Ifx_RxSel_f}

Definition at line 71 of file IfxAsclin_PinMap.c.

◆ IfxAsclin11_SCLK_P21_3_OUT

IfxAsclin_Sclk_Out IfxAsclin11_SCLK_P21_3_OUT = {&MODULE_ASCLIN11, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt2}

Definition at line 153 of file IfxAsclin_PinMap.c.

◆ IfxAsclin11_SLSO_P21_4_OUT

IfxAsclin_Slso_Out IfxAsclin11_SLSO_P21_4_OUT = {&MODULE_ASCLIN11, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt2}

Definition at line 189 of file IfxAsclin_PinMap.c.

◆ IfxAsclin11_TX_P10_0_OUT

IfxAsclin_Tx_Out IfxAsclin11_TX_P10_0_OUT = {&MODULE_ASCLIN11, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt2}

Definition at line 225 of file IfxAsclin_PinMap.c.

◆ IfxAsclin11_TX_P21_0_OUT

IfxAsclin_Tx_Out IfxAsclin11_TX_P21_0_OUT = {&MODULE_ASCLIN11, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt2}

Definition at line 226 of file IfxAsclin_PinMap.c.

◆ IfxAsclin11_TX_P21_5_OUT

IfxAsclin_Tx_Out IfxAsclin11_TX_P21_5_OUT = {&MODULE_ASCLIN11, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt3}

Definition at line 227 of file IfxAsclin_PinMap.c.

◆ IfxAsclin12_RXA_P00_3_IN

IfxAsclin_Rx_In IfxAsclin12_RXA_P00_3_IN = {&MODULE_ASCLIN12, {&MODULE_P00, 3}, Ifx_RxSel_a}

Definition at line 72 of file IfxAsclin_PinMap.c.

◆ IfxAsclin12_RXB_P00_5_IN

IfxAsclin_Rx_In IfxAsclin12_RXB_P00_5_IN = {&MODULE_ASCLIN12, {&MODULE_P00, 5}, Ifx_RxSel_b}

Definition at line 73 of file IfxAsclin_PinMap.c.

◆ IfxAsclin12_TX_P00_3_OUT

IfxAsclin_Tx_Out IfxAsclin12_TX_P00_3_OUT = {&MODULE_ASCLIN12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt3}

Definition at line 228 of file IfxAsclin_PinMap.c.

◆ IfxAsclin12_TX_P01_6_OUT

IfxAsclin_Tx_Out IfxAsclin12_TX_P01_6_OUT = {&MODULE_ASCLIN12, {&MODULE_P01, 6}, IfxPort_OutputIdx_alt2}

Definition at line 229 of file IfxAsclin_PinMap.c.

◆ IfxAsclin13_RXA_P00_9_IN

IfxAsclin_Rx_In IfxAsclin13_RXA_P00_9_IN = {&MODULE_ASCLIN13, {&MODULE_P00, 9}, Ifx_RxSel_a}

Definition at line 74 of file IfxAsclin_PinMap.c.

◆ IfxAsclin13_RXB_P00_11_IN

IfxAsclin_Rx_In IfxAsclin13_RXB_P00_11_IN = {&MODULE_ASCLIN13, {&MODULE_P00,11}, Ifx_RxSel_b}

Definition at line 75 of file IfxAsclin_PinMap.c.

◆ IfxAsclin13_TX_P00_10_OUT

IfxAsclin_Tx_Out IfxAsclin13_TX_P00_10_OUT = {&MODULE_ASCLIN13, {&MODULE_P00,10}, IfxPort_OutputIdx_alt3}

Definition at line 230 of file IfxAsclin_PinMap.c.

◆ IfxAsclin13_TX_P00_11_OUT

IfxAsclin_Tx_Out IfxAsclin13_TX_P00_11_OUT = {&MODULE_ASCLIN13, {&MODULE_P00,11}, IfxPort_OutputIdx_alt3}

Definition at line 231 of file IfxAsclin_PinMap.c.

◆ IfxAsclin14_RXA_P33_3_IN

IfxAsclin_Rx_In IfxAsclin14_RXA_P33_3_IN = {&MODULE_ASCLIN14, {&MODULE_P33, 3}, Ifx_RxSel_a}

Definition at line 76 of file IfxAsclin_PinMap.c.

◆ IfxAsclin14_RXB_P33_4_IN

IfxAsclin_Rx_In IfxAsclin14_RXB_P33_4_IN = {&MODULE_ASCLIN14, {&MODULE_P33, 4}, Ifx_RxSel_b}

Definition at line 77 of file IfxAsclin_PinMap.c.

◆ IfxAsclin14_TX_P33_2_OUT

IfxAsclin_Tx_Out IfxAsclin14_TX_P33_2_OUT = {&MODULE_ASCLIN14, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt7}

Definition at line 232 of file IfxAsclin_PinMap.c.

◆ IfxAsclin14_TX_P33_3_OUT

IfxAsclin_Tx_Out IfxAsclin14_TX_P33_3_OUT = {&MODULE_ASCLIN14, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt7}

Definition at line 233 of file IfxAsclin_PinMap.c.

◆ IfxAsclin15_RXA_P32_4_IN

IfxAsclin_Rx_In IfxAsclin15_RXA_P32_4_IN = {&MODULE_ASCLIN15, {&MODULE_P32, 4}, Ifx_RxSel_a}

Definition at line 78 of file IfxAsclin_PinMap.c.

◆ IfxAsclin15_RXB_P32_7_IN

IfxAsclin_Rx_In IfxAsclin15_RXB_P32_7_IN = {&MODULE_ASCLIN15, {&MODULE_P32, 7}, Ifx_RxSel_b}

Definition at line 79 of file IfxAsclin_PinMap.c.

◆ IfxAsclin15_TX_P32_7_OUT

IfxAsclin_Tx_Out IfxAsclin15_TX_P32_7_OUT = {&MODULE_ASCLIN15, {&MODULE_P32, 7}, IfxPort_OutputIdx_alt4}

Definition at line 234 of file IfxAsclin_PinMap.c.

◆ IfxAsclin15_TX_P33_0_OUT

IfxAsclin_Tx_Out IfxAsclin15_TX_P33_0_OUT = {&MODULE_ASCLIN15, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt4}

Definition at line 235 of file IfxAsclin_PinMap.c.

◆ IfxAsclin16_RXA_P23_5_IN

IfxAsclin_Rx_In IfxAsclin16_RXA_P23_5_IN = {&MODULE_ASCLIN16, {&MODULE_P23, 5}, Ifx_RxSel_a}

Definition at line 80 of file IfxAsclin_PinMap.c.

◆ IfxAsclin16_RXB_P23_7_IN

IfxAsclin_Rx_In IfxAsclin16_RXB_P23_7_IN = {&MODULE_ASCLIN16, {&MODULE_P23, 7}, Ifx_RxSel_b}

Definition at line 81 of file IfxAsclin_PinMap.c.

◆ IfxAsclin16_TX_P23_6_OUT

IfxAsclin_Tx_Out IfxAsclin16_TX_P23_6_OUT = {&MODULE_ASCLIN16, {&MODULE_P23, 6}, IfxPort_OutputIdx_alt2}

Definition at line 236 of file IfxAsclin_PinMap.c.

◆ IfxAsclin16_TX_P23_7_OUT

IfxAsclin_Tx_Out IfxAsclin16_TX_P23_7_OUT = {&MODULE_ASCLIN16, {&MODULE_P23, 7}, IfxPort_OutputIdx_alt2}

Definition at line 237 of file IfxAsclin_PinMap.c.

◆ IfxAsclin17_RXA_P22_11_IN

IfxAsclin_Rx_In IfxAsclin17_RXA_P22_11_IN = {&MODULE_ASCLIN17, {&MODULE_P22,11}, Ifx_RxSel_a}

Definition at line 82 of file IfxAsclin_PinMap.c.

◆ IfxAsclin17_RXB_P21_0_IN

IfxAsclin_Rx_In IfxAsclin17_RXB_P21_0_IN = {&MODULE_ASCLIN17, {&MODULE_P21, 0}, Ifx_RxSel_b}

Definition at line 83 of file IfxAsclin_PinMap.c.

◆ IfxAsclin17_TX_P22_11_OUT

IfxAsclin_Tx_Out IfxAsclin17_TX_P22_11_OUT = {&MODULE_ASCLIN17, {&MODULE_P22,11}, IfxPort_OutputIdx_alt3}

Definition at line 238 of file IfxAsclin_PinMap.c.

◆ IfxAsclin17_TX_P22_7_OUT

IfxAsclin_Tx_Out IfxAsclin17_TX_P22_7_OUT = {&MODULE_ASCLIN17, {&MODULE_P22, 7}, IfxPort_OutputIdx_alt3}

Definition at line 239 of file IfxAsclin_PinMap.c.

◆ IfxAsclin18_RXA_P21_1_IN

IfxAsclin_Rx_In IfxAsclin18_RXA_P21_1_IN = {&MODULE_ASCLIN18, {&MODULE_P21, 1}, Ifx_RxSel_a}

Definition at line 84 of file IfxAsclin_PinMap.c.

◆ IfxAsclin18_RXB_P21_4_IN

IfxAsclin_Rx_In IfxAsclin18_RXB_P21_4_IN = {&MODULE_ASCLIN18, {&MODULE_P21, 4}, Ifx_RxSel_b}

Definition at line 85 of file IfxAsclin_PinMap.c.

◆ IfxAsclin18_TX_P21_3_OUT

IfxAsclin_Tx_Out IfxAsclin18_TX_P21_3_OUT = {&MODULE_ASCLIN18, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt3}

Definition at line 240 of file IfxAsclin_PinMap.c.

◆ IfxAsclin18_TX_P21_4_OUT

IfxAsclin_Tx_Out IfxAsclin18_TX_P21_4_OUT = {&MODULE_ASCLIN18, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt3}

Definition at line 241 of file IfxAsclin_PinMap.c.

◆ IfxAsclin19_RXA_P15_6_IN

IfxAsclin_Rx_In IfxAsclin19_RXA_P15_6_IN = {&MODULE_ASCLIN19, {&MODULE_P15, 6}, Ifx_RxSel_a}

Definition at line 86 of file IfxAsclin_PinMap.c.

◆ IfxAsclin19_RXB_P15_7_IN

IfxAsclin_Rx_In IfxAsclin19_RXB_P15_7_IN = {&MODULE_ASCLIN19, {&MODULE_P15, 7}, Ifx_RxSel_b}

Definition at line 87 of file IfxAsclin_PinMap.c.

◆ IfxAsclin19_TX_P15_4_OUT

IfxAsclin_Tx_Out IfxAsclin19_TX_P15_4_OUT = {&MODULE_ASCLIN19, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt4}

Definition at line 242 of file IfxAsclin_PinMap.c.

◆ IfxAsclin19_TX_P15_7_OUT

IfxAsclin_Tx_Out IfxAsclin19_TX_P15_7_OUT = {&MODULE_ASCLIN19, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt4}

Definition at line 243 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_CTSA_P20_7_IN

IfxAsclin_Cts_In IfxAsclin1_CTSA_P20_7_IN = {&MODULE_ASCLIN1, {&MODULE_P20, 7}, Ifx_RxSel_a}

Definition at line 46 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_CTSB_P32_4_IN

IfxAsclin_Cts_In IfxAsclin1_CTSB_P32_4_IN = {&MODULE_ASCLIN1, {&MODULE_P32, 4}, Ifx_RxSel_b}

Definition at line 47 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_RTS_P20_6_OUT

IfxAsclin_Rts_Out IfxAsclin1_RTS_P20_6_OUT = {&MODULE_ASCLIN1, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt2}

Definition at line 52 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_RTS_P23_1_OUT

IfxAsclin_Rts_Out IfxAsclin1_RTS_P23_1_OUT = {&MODULE_ASCLIN1, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt2}

Definition at line 53 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_RXA_P15_1_IN

IfxAsclin_Rx_In IfxAsclin1_RXA_P15_1_IN = {&MODULE_ASCLIN1, {&MODULE_P15, 1}, Ifx_RxSel_a}

Definition at line 88 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_RXB_P15_5_IN

IfxAsclin_Rx_In IfxAsclin1_RXB_P15_5_IN = {&MODULE_ASCLIN1, {&MODULE_P15, 5}, Ifx_RxSel_b}

Definition at line 89 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_RXC_P20_9_IN

IfxAsclin_Rx_In IfxAsclin1_RXC_P20_9_IN = {&MODULE_ASCLIN1, {&MODULE_P20, 9}, Ifx_RxSel_c}

Definition at line 90 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_RXD_P14_8_IN

IfxAsclin_Rx_In IfxAsclin1_RXD_P14_8_IN = {&MODULE_ASCLIN1, {&MODULE_P14, 8}, Ifx_RxSel_d}

Definition at line 91 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_RXE_P11_10_IN

IfxAsclin_Rx_In IfxAsclin1_RXE_P11_10_IN = {&MODULE_ASCLIN1, {&MODULE_P11,10}, Ifx_RxSel_e}

Definition at line 92 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_RXF_P33_13_IN

IfxAsclin_Rx_In IfxAsclin1_RXF_P33_13_IN = {&MODULE_ASCLIN1, {&MODULE_P33,13}, Ifx_RxSel_f}

Definition at line 93 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_RXG_P02_3_IN

IfxAsclin_Rx_In IfxAsclin1_RXG_P02_3_IN = {&MODULE_ASCLIN1, {&MODULE_P02, 3}, Ifx_RxSel_g}

Definition at line 94 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_SCLK_P15_0_OUT

IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P15_0_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt6}

Definition at line 154 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_SCLK_P20_10_OUT

IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P20_10_OUT = {&MODULE_ASCLIN1, {&MODULE_P20,10}, IfxPort_OutputIdx_alt6}

Definition at line 155 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_SCLK_P33_11_OUT

IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_11_OUT = {&MODULE_ASCLIN1, {&MODULE_P33,11}, IfxPort_OutputIdx_alt2}

Definition at line 156 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_SCLK_P33_12_OUT

IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_12_OUT = {&MODULE_ASCLIN1, {&MODULE_P33,12}, IfxPort_OutputIdx_alt4}

Definition at line 157 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_SLSO_P14_3_OUT

IfxAsclin_Slso_Out IfxAsclin1_SLSO_P14_3_OUT = {&MODULE_ASCLIN1, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt4}

Definition at line 190 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_SLSO_P20_8_OUT

IfxAsclin_Slso_Out IfxAsclin1_SLSO_P20_8_OUT = {&MODULE_ASCLIN1, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt2}

Definition at line 191 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_SLSO_P33_10_OUT

IfxAsclin_Slso_Out IfxAsclin1_SLSO_P33_10_OUT = {&MODULE_ASCLIN1, {&MODULE_P33,10}, IfxPort_OutputIdx_alt4}

Definition at line 192 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_TX_P02_2_OUT

IfxAsclin_Tx_Out IfxAsclin1_TX_P02_2_OUT = {&MODULE_ASCLIN1, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt2}

Definition at line 244 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_TX_P11_12_OUT

IfxAsclin_Tx_Out IfxAsclin1_TX_P11_12_OUT = {&MODULE_ASCLIN1, {&MODULE_P11,12}, IfxPort_OutputIdx_alt2}

Definition at line 245 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_TX_P14_10_OUT

IfxAsclin_Tx_Out IfxAsclin1_TX_P14_10_OUT = {&MODULE_ASCLIN1, {&MODULE_P14,10}, IfxPort_OutputIdx_alt4}

Definition at line 246 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_TX_P14_15_OUT

IfxAsclin_Tx_Out IfxAsclin1_TX_P14_15_OUT = {&MODULE_ASCLIN1, {&MODULE_P14,15}, IfxPort_OutputIdx_alt2}

Definition at line 247 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_TX_P15_0_OUT

IfxAsclin_Tx_Out IfxAsclin1_TX_P15_0_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt2}

Definition at line 248 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_TX_P15_1_OUT

IfxAsclin_Tx_Out IfxAsclin1_TX_P15_1_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt2}

Definition at line 249 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_TX_P15_4_OUT

IfxAsclin_Tx_Out IfxAsclin1_TX_P15_4_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt2}

Definition at line 250 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_TX_P15_5_OUT

IfxAsclin_Tx_Out IfxAsclin1_TX_P15_5_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt2}

Definition at line 251 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_TX_P20_10_OUT

IfxAsclin_Tx_Out IfxAsclin1_TX_P20_10_OUT = {&MODULE_ASCLIN1, {&MODULE_P20,10}, IfxPort_OutputIdx_alt2}

Definition at line 252 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_TX_P33_12_OUT

IfxAsclin_Tx_Out IfxAsclin1_TX_P33_12_OUT = {&MODULE_ASCLIN1, {&MODULE_P33,12}, IfxPort_OutputIdx_alt2}

Definition at line 253 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_TX_P33_13_OUT

IfxAsclin_Tx_Out IfxAsclin1_TX_P33_13_OUT = {&MODULE_ASCLIN1, {&MODULE_P33,13}, IfxPort_OutputIdx_alt2}

Definition at line 254 of file IfxAsclin_PinMap.c.

◆ IfxAsclin20_RXA_P14_7_IN

IfxAsclin_Rx_In IfxAsclin20_RXA_P14_7_IN = {&MODULE_ASCLIN20, {&MODULE_P14, 7}, Ifx_RxSel_a}

Definition at line 95 of file IfxAsclin_PinMap.c.

◆ IfxAsclin20_RXB_P14_9_IN

IfxAsclin_Rx_In IfxAsclin20_RXB_P14_9_IN = {&MODULE_ASCLIN20, {&MODULE_P14, 9}, Ifx_RxSel_b}

Definition at line 96 of file IfxAsclin_PinMap.c.

◆ IfxAsclin20_TX_P14_7_OUT

IfxAsclin_Tx_Out IfxAsclin20_TX_P14_7_OUT = {&MODULE_ASCLIN20, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt7}

Definition at line 255 of file IfxAsclin_PinMap.c.

◆ IfxAsclin20_TX_P14_8_OUT

IfxAsclin_Tx_Out IfxAsclin20_TX_P14_8_OUT = {&MODULE_ASCLIN20, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt7}

Definition at line 256 of file IfxAsclin_PinMap.c.

◆ IfxAsclin21_RXA_P13_0_IN

IfxAsclin_Rx_In IfxAsclin21_RXA_P13_0_IN = {&MODULE_ASCLIN21, {&MODULE_P13, 0}, Ifx_RxSel_a}

Definition at line 97 of file IfxAsclin_PinMap.c.

◆ IfxAsclin21_RXB_P13_3_IN

IfxAsclin_Rx_In IfxAsclin21_RXB_P13_3_IN = {&MODULE_ASCLIN21, {&MODULE_P13, 3}, Ifx_RxSel_b}

Definition at line 98 of file IfxAsclin_PinMap.c.

◆ IfxAsclin21_TX_P13_2_OUT

IfxAsclin_Tx_Out IfxAsclin21_TX_P13_2_OUT = {&MODULE_ASCLIN21, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt7}

Definition at line 257 of file IfxAsclin_PinMap.c.

◆ IfxAsclin21_TX_P13_3_OUT

IfxAsclin_Tx_Out IfxAsclin21_TX_P13_3_OUT = {&MODULE_ASCLIN21, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt6}

Definition at line 258 of file IfxAsclin_PinMap.c.

◆ IfxAsclin22_RXA_P10_4_IN

IfxAsclin_Rx_In IfxAsclin22_RXA_P10_4_IN = {&MODULE_ASCLIN22, {&MODULE_P10, 4}, Ifx_RxSel_a}

Definition at line 99 of file IfxAsclin_PinMap.c.

◆ IfxAsclin22_RXB_P10_5_IN

IfxAsclin_Rx_In IfxAsclin22_RXB_P10_5_IN = {&MODULE_ASCLIN22, {&MODULE_P10, 5}, Ifx_RxSel_b}

Definition at line 100 of file IfxAsclin_PinMap.c.

◆ IfxAsclin22_TX_P10_0_OUT

IfxAsclin_Tx_Out IfxAsclin22_TX_P10_0_OUT = {&MODULE_ASCLIN22, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt6}

Definition at line 259 of file IfxAsclin_PinMap.c.

◆ IfxAsclin22_TX_P10_4_OUT

IfxAsclin_Tx_Out IfxAsclin22_TX_P10_4_OUT = {&MODULE_ASCLIN22, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt2}

Definition at line 260 of file IfxAsclin_PinMap.c.

◆ IfxAsclin23_RXA_P10_6_IN

IfxAsclin_Rx_In IfxAsclin23_RXA_P10_6_IN = {&MODULE_ASCLIN23, {&MODULE_P10, 6}, Ifx_RxSel_a}

Definition at line 101 of file IfxAsclin_PinMap.c.

◆ IfxAsclin23_RXB_P10_7_IN

IfxAsclin_Rx_In IfxAsclin23_RXB_P10_7_IN = {&MODULE_ASCLIN23, {&MODULE_P10, 7}, Ifx_RxSel_b}

Definition at line 102 of file IfxAsclin_PinMap.c.

◆ IfxAsclin23_TX_P10_7_OUT

IfxAsclin_Tx_Out IfxAsclin23_TX_P10_7_OUT = {&MODULE_ASCLIN23, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt2}

Definition at line 261 of file IfxAsclin_PinMap.c.

◆ IfxAsclin23_TX_P10_8_OUT

IfxAsclin_Tx_Out IfxAsclin23_TX_P10_8_OUT = {&MODULE_ASCLIN23, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt4}

Definition at line 262 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_CTSA_P10_7_IN

IfxAsclin_Cts_In IfxAsclin2_CTSA_P10_7_IN = {&MODULE_ASCLIN2, {&MODULE_P10, 7}, Ifx_RxSel_a}

Definition at line 48 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_CTSB_P33_5_IN

IfxAsclin_Cts_In IfxAsclin2_CTSB_P33_5_IN = {&MODULE_ASCLIN2, {&MODULE_P33, 5}, Ifx_RxSel_b}

Definition at line 49 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_RTS_P10_8_OUT

IfxAsclin_Rts_Out IfxAsclin2_RTS_P10_8_OUT = {&MODULE_ASCLIN2, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt2}

Definition at line 54 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_RTS_P33_4_OUT

IfxAsclin_Rts_Out IfxAsclin2_RTS_P33_4_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt2}

Definition at line 55 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_RXA_P14_3_IN

IfxAsclin_Rx_In IfxAsclin2_RXA_P14_3_IN = {&MODULE_ASCLIN2, {&MODULE_P14, 3}, Ifx_RxSel_a}

Definition at line 103 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_RXB_P02_1_IN

IfxAsclin_Rx_In IfxAsclin2_RXB_P02_1_IN = {&MODULE_ASCLIN2, {&MODULE_P02, 1}, Ifx_RxSel_b}

Definition at line 104 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_RXC_P02_10_IN

IfxAsclin_Rx_In IfxAsclin2_RXC_P02_10_IN = {&MODULE_ASCLIN2, {&MODULE_P02,10}, Ifx_RxSel_c}

Definition at line 105 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_RXD_P10_6_IN

IfxAsclin_Rx_In IfxAsclin2_RXD_P10_6_IN = {&MODULE_ASCLIN2, {&MODULE_P10, 6}, Ifx_RxSel_d}

Definition at line 106 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_RXE_P33_8_IN

IfxAsclin_Rx_In IfxAsclin2_RXE_P33_8_IN = {&MODULE_ASCLIN2, {&MODULE_P33, 8}, Ifx_RxSel_e}

Definition at line 107 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_RXF_P32_6_IN

IfxAsclin_Rx_In IfxAsclin2_RXF_P32_6_IN = {&MODULE_ASCLIN2, {&MODULE_P32, 6}, Ifx_RxSel_f}

Definition at line 108 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_RXG_P02_0_IN

IfxAsclin_Rx_In IfxAsclin2_RXG_P02_0_IN = {&MODULE_ASCLIN2, {&MODULE_P02, 0}, Ifx_RxSel_g}

Definition at line 109 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_SCLK_P02_4_OUT

IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P02_4_OUT = {&MODULE_ASCLIN2, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt2}

Definition at line 158 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_SCLK_P10_6_OUT

IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P10_6_OUT = {&MODULE_ASCLIN2, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt2}

Definition at line 159 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_SCLK_P14_2_OUT

IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P14_2_OUT = {&MODULE_ASCLIN2, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt6}

Definition at line 160 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_SCLK_P33_7_OUT

IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_7_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt2}

Definition at line 161 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_SCLK_P33_9_OUT

IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_9_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt4}

Definition at line 162 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_SLSO_P02_3_OUT

IfxAsclin_Slso_Out IfxAsclin2_SLSO_P02_3_OUT = {&MODULE_ASCLIN2, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt2}

Definition at line 193 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_SLSO_P10_5_OUT

IfxAsclin_Slso_Out IfxAsclin2_SLSO_P10_5_OUT = {&MODULE_ASCLIN2, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt6}

Definition at line 194 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_SLSO_P33_6_OUT

IfxAsclin_Slso_Out IfxAsclin2_SLSO_P33_6_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt2}

Definition at line 195 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_TX_P02_0_OUT

IfxAsclin_Tx_Out IfxAsclin2_TX_P02_0_OUT = {&MODULE_ASCLIN2, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt2}

Definition at line 263 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_TX_P02_9_OUT

IfxAsclin_Tx_Out IfxAsclin2_TX_P02_9_OUT = {&MODULE_ASCLIN2, {&MODULE_P02, 9}, IfxPort_OutputIdx_alt2}

Definition at line 264 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_TX_P10_5_OUT

IfxAsclin_Tx_Out IfxAsclin2_TX_P10_5_OUT = {&MODULE_ASCLIN2, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt2}

Definition at line 265 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_TX_P14_2_OUT

IfxAsclin_Tx_Out IfxAsclin2_TX_P14_2_OUT = {&MODULE_ASCLIN2, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt2}

Definition at line 266 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_TX_P14_3_OUT

IfxAsclin_Tx_Out IfxAsclin2_TX_P14_3_OUT = {&MODULE_ASCLIN2, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt2}

Definition at line 267 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_TX_P32_5_OUT

IfxAsclin_Tx_Out IfxAsclin2_TX_P32_5_OUT = {&MODULE_ASCLIN2, {&MODULE_P32, 5}, IfxPort_OutputIdx_alt2}

Definition at line 268 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_TX_P33_8_OUT

IfxAsclin_Tx_Out IfxAsclin2_TX_P33_8_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt2}

Definition at line 269 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_TX_P33_9_OUT

IfxAsclin_Tx_Out IfxAsclin2_TX_P33_9_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt2}

Definition at line 270 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_CTSA_P00_12_IN

IfxAsclin_Cts_In IfxAsclin3_CTSA_P00_12_IN = {&MODULE_ASCLIN3, {&MODULE_P00,12}, Ifx_RxSel_a}

Definition at line 50 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_RTS_P00_9_OUT

IfxAsclin_Rts_Out IfxAsclin3_RTS_P00_9_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt3}

Definition at line 56 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_RXA_P15_7_IN

IfxAsclin_Rx_In IfxAsclin3_RXA_P15_7_IN = {&MODULE_ASCLIN3, {&MODULE_P15, 7}, Ifx_RxSel_a}

Definition at line 110 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_RXB_P11_0_IN

IfxAsclin_Rx_In IfxAsclin3_RXB_P11_0_IN = {&MODULE_ASCLIN3, {&MODULE_P11, 0}, Ifx_RxSel_b}

Definition at line 111 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_RXC_P20_3_IN

IfxAsclin_Rx_In IfxAsclin3_RXC_P20_3_IN = {&MODULE_ASCLIN3, {&MODULE_P20, 3}, Ifx_RxSel_c}

Definition at line 112 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_RXD_P32_2_IN

IfxAsclin_Rx_In IfxAsclin3_RXD_P32_2_IN = {&MODULE_ASCLIN3, {&MODULE_P32, 2}, Ifx_RxSel_d}

Definition at line 113 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_RXE_P00_1_IN

IfxAsclin_Rx_In IfxAsclin3_RXE_P00_1_IN = {&MODULE_ASCLIN3, {&MODULE_P00, 1}, Ifx_RxSel_e}

Definition at line 114 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_RXF_P21_6_IN

IfxAsclin_Rx_In IfxAsclin3_RXF_P21_6_IN = {&MODULE_ASCLIN3, {&MODULE_P21, 6}, Ifx_RxSel_f}

Definition at line 115 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_RXG_P21_2_IN

IfxAsclin_Rx_In IfxAsclin3_RXG_P21_2_IN = {&MODULE_ASCLIN3, {&MODULE_P21, 2}, Ifx_RxSel_g}

Definition at line 116 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_RXG_P21_3_IN

IfxAsclin_Rx_In IfxAsclin3_RXG_P21_3_IN = {&MODULE_ASCLIN3, {&MODULE_P21, 3}, Ifx_RxSel_g}

Definition at line 117 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_RXH_P13_12_IN

IfxAsclin_Rx_In IfxAsclin3_RXH_P13_12_IN = {&MODULE_ASCLIN3, {&MODULE_P13,12}, Ifx_RxSel_h}

Definition at line 118 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_SCLK_P00_0_OUT

IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_0_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt2}

Definition at line 163 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_SCLK_P00_2_OUT

IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_2_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt2}

Definition at line 164 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_SCLK_P11_1_OUT

IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P11_1_OUT = {&MODULE_ASCLIN3, {&MODULE_P11, 1}, IfxPort_OutputIdx_alt2}

Definition at line 165 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_SCLK_P11_4_OUT

IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P11_4_OUT = {&MODULE_ASCLIN3, {&MODULE_P11, 4}, IfxPort_OutputIdx_alt2}

Definition at line 166 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_SCLK_P15_6_OUT

IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_6_OUT = {&MODULE_ASCLIN3, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt6}

Definition at line 167 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_SCLK_P15_8_OUT

IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_8_OUT = {&MODULE_ASCLIN3, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt6}

Definition at line 168 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_SCLK_P20_0_OUT

IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P20_0_OUT = {&MODULE_ASCLIN3, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt3}

Definition at line 169 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_SCLK_P21_5_OUT

IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_5_OUT = {&MODULE_ASCLIN3, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt2}

Definition at line 170 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_SCLK_P21_7_OUT

IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_7_OUT = {&MODULE_ASCLIN3, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt3}

Definition at line 171 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_SCLK_P32_3_OUT

IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P32_3_OUT = {&MODULE_ASCLIN3, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt4}

Definition at line 172 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_SCLK_P33_2_OUT

IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P33_2_OUT = {&MODULE_ASCLIN3, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt2}

Definition at line 173 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_SLSO_P00_3_OUT

IfxAsclin_Slso_Out IfxAsclin3_SLSO_P00_3_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt2}

Definition at line 196 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_SLSO_P12_1_OUT

IfxAsclin_Slso_Out IfxAsclin3_SLSO_P12_1_OUT = {&MODULE_ASCLIN3, {&MODULE_P12, 1}, IfxPort_OutputIdx_alt2}

Definition at line 197 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_SLSO_P14_3_OUT

IfxAsclin_Slso_Out IfxAsclin3_SLSO_P14_3_OUT = {&MODULE_ASCLIN3, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt5}

Definition at line 198 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_SLSO_P21_2_OUT

IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_2_OUT = {&MODULE_ASCLIN3, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt2}

Definition at line 199 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_SLSO_P21_6_OUT

IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_6_OUT = {&MODULE_ASCLIN3, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt2}

Definition at line 200 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_SLSO_P33_1_OUT

IfxAsclin_Slso_Out IfxAsclin3_SLSO_P33_1_OUT = {&MODULE_ASCLIN3, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt2}

Definition at line 201 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_TX_P00_0_OUT

IfxAsclin_Tx_Out IfxAsclin3_TX_P00_0_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt3}

Definition at line 271 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_TX_P00_1_OUT

IfxAsclin_Tx_Out IfxAsclin3_TX_P00_1_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt2}

Definition at line 272 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_TX_P11_0_OUT

IfxAsclin_Tx_Out IfxAsclin3_TX_P11_0_OUT = {&MODULE_ASCLIN3, {&MODULE_P11, 0}, IfxPort_OutputIdx_alt2}

Definition at line 273 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_TX_P11_1_OUT

IfxAsclin_Tx_Out IfxAsclin3_TX_P11_1_OUT = {&MODULE_ASCLIN3, {&MODULE_P11, 1}, IfxPort_OutputIdx_alt3}

Definition at line 274 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_TX_P13_9_OUT

IfxAsclin_Tx_Out IfxAsclin3_TX_P13_9_OUT = {&MODULE_ASCLIN3, {&MODULE_P13, 9}, IfxPort_OutputIdx_alt2}

Definition at line 275 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_TX_P15_6_OUT

IfxAsclin_Tx_Out IfxAsclin3_TX_P15_6_OUT = {&MODULE_ASCLIN3, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt2}

Definition at line 276 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_TX_P15_7_OUT

IfxAsclin_Tx_Out IfxAsclin3_TX_P15_7_OUT = {&MODULE_ASCLIN3, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt2}

Definition at line 277 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_TX_P20_0_OUT

IfxAsclin_Tx_Out IfxAsclin3_TX_P20_0_OUT = {&MODULE_ASCLIN3, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt2}

Definition at line 278 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_TX_P20_3_OUT

IfxAsclin_Tx_Out IfxAsclin3_TX_P20_3_OUT = {&MODULE_ASCLIN3, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt2}

Definition at line 279 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_TX_P21_7_OUT

IfxAsclin_Tx_Out IfxAsclin3_TX_P21_7_OUT = {&MODULE_ASCLIN3, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt2}

Definition at line 280 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_TX_P22_0_OUT

IfxAsclin_Tx_Out IfxAsclin3_TX_P22_0_OUT = {&MODULE_ASCLIN3, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt2}

Definition at line 281 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_TX_P22_1_OUT

IfxAsclin_Tx_Out IfxAsclin3_TX_P22_1_OUT = {&MODULE_ASCLIN3, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt2}

Definition at line 282 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_TX_P32_2_OUT

IfxAsclin_Tx_Out IfxAsclin3_TX_P32_2_OUT = {&MODULE_ASCLIN3, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt2}

Definition at line 283 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_TX_P32_3_OUT

IfxAsclin_Tx_Out IfxAsclin3_TX_P32_3_OUT = {&MODULE_ASCLIN3, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt2}

Definition at line 284 of file IfxAsclin_PinMap.c.

◆ IfxAsclin4_RXA_P00_12_IN

IfxAsclin_Rx_In IfxAsclin4_RXA_P00_12_IN = {&MODULE_ASCLIN4, {&MODULE_P00,12}, Ifx_RxSel_a}

Definition at line 119 of file IfxAsclin_PinMap.c.

◆ IfxAsclin4_RXB_P34_2_IN

IfxAsclin_Rx_In IfxAsclin4_RXB_P34_2_IN = {&MODULE_ASCLIN4, {&MODULE_P34, 2}, Ifx_RxSel_b}

Definition at line 120 of file IfxAsclin_PinMap.c.

◆ IfxAsclin4_RXC_P22_6_IN

IfxAsclin_Rx_In IfxAsclin4_RXC_P22_6_IN = {&MODULE_ASCLIN4, {&MODULE_P22, 6}, Ifx_RxSel_c}

Definition at line 121 of file IfxAsclin_PinMap.c.

◆ IfxAsclin4_RXD_P22_9_IN

IfxAsclin_Rx_In IfxAsclin4_RXD_P22_9_IN = {&MODULE_ASCLIN4, {&MODULE_P22, 9}, Ifx_RxSel_d}

Definition at line 122 of file IfxAsclin_PinMap.c.

◆ IfxAsclin4_SCLK_P00_10_OUT

IfxAsclin_Sclk_Out IfxAsclin4_SCLK_P00_10_OUT = {&MODULE_ASCLIN4, {&MODULE_P00,10}, IfxPort_OutputIdx_alt2}

Definition at line 174 of file IfxAsclin_PinMap.c.

◆ IfxAsclin4_SCLK_P22_7_OUT

IfxAsclin_Sclk_Out IfxAsclin4_SCLK_P22_7_OUT = {&MODULE_ASCLIN4, {&MODULE_P22, 7}, IfxPort_OutputIdx_alt2}

Definition at line 175 of file IfxAsclin_PinMap.c.

◆ IfxAsclin4_SCLK_P34_3_OUT

IfxAsclin_Sclk_Out IfxAsclin4_SCLK_P34_3_OUT = {&MODULE_ASCLIN4, {&MODULE_P34, 3}, IfxPort_OutputIdx_alt2}

Definition at line 176 of file IfxAsclin_PinMap.c.

◆ IfxAsclin4_SLSO_P00_11_OUT

IfxAsclin_Slso_Out IfxAsclin4_SLSO_P00_11_OUT = {&MODULE_ASCLIN4, {&MODULE_P00,11}, IfxPort_OutputIdx_alt2}

Definition at line 202 of file IfxAsclin_PinMap.c.

◆ IfxAsclin4_SLSO_P22_11_OUT

IfxAsclin_Slso_Out IfxAsclin4_SLSO_P22_11_OUT = {&MODULE_ASCLIN4, {&MODULE_P22,11}, IfxPort_OutputIdx_alt2}

Definition at line 203 of file IfxAsclin_PinMap.c.

◆ IfxAsclin4_SLSO_P22_4_OUT

IfxAsclin_Slso_Out IfxAsclin4_SLSO_P22_4_OUT = {&MODULE_ASCLIN4, {&MODULE_P22, 4}, IfxPort_OutputIdx_alt2}

Definition at line 204 of file IfxAsclin_PinMap.c.

◆ IfxAsclin4_SLSO_P34_4_OUT

IfxAsclin_Slso_Out IfxAsclin4_SLSO_P34_4_OUT = {&MODULE_ASCLIN4, {&MODULE_P34, 4}, IfxPort_OutputIdx_alt2}

Definition at line 205 of file IfxAsclin_PinMap.c.

◆ IfxAsclin4_TX_P00_9_OUT

IfxAsclin_Tx_Out IfxAsclin4_TX_P00_9_OUT = {&MODULE_ASCLIN4, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt5}

Definition at line 285 of file IfxAsclin_PinMap.c.

◆ IfxAsclin4_TX_P22_10_OUT

IfxAsclin_Tx_Out IfxAsclin4_TX_P22_10_OUT = {&MODULE_ASCLIN4, {&MODULE_P22,10}, IfxPort_OutputIdx_alt2}

Definition at line 286 of file IfxAsclin_PinMap.c.

◆ IfxAsclin4_TX_P22_5_OUT

IfxAsclin_Tx_Out IfxAsclin4_TX_P22_5_OUT = {&MODULE_ASCLIN4, {&MODULE_P22, 5}, IfxPort_OutputIdx_alt2}

Definition at line 287 of file IfxAsclin_PinMap.c.

◆ IfxAsclin4_TX_P34_1_OUT

IfxAsclin_Tx_Out IfxAsclin4_TX_P34_1_OUT = {&MODULE_ASCLIN4, {&MODULE_P34, 1}, IfxPort_OutputIdx_alt2}

Definition at line 288 of file IfxAsclin_PinMap.c.

◆ IfxAsclin5_RXA_P00_6_IN

IfxAsclin_Rx_In IfxAsclin5_RXA_P00_6_IN = {&MODULE_ASCLIN5, {&MODULE_P00, 6}, Ifx_RxSel_a}

Definition at line 123 of file IfxAsclin_PinMap.c.

◆ IfxAsclin5_RXB_P33_4_IN

IfxAsclin_Rx_In IfxAsclin5_RXB_P33_4_IN = {&MODULE_ASCLIN5, {&MODULE_P33, 4}, Ifx_RxSel_b}

Definition at line 124 of file IfxAsclin_PinMap.c.

◆ IfxAsclin5_RXC_P22_3_IN

IfxAsclin_Rx_In IfxAsclin5_RXC_P22_3_IN = {&MODULE_ASCLIN5, {&MODULE_P22, 3}, Ifx_RxSel_c}

Definition at line 125 of file IfxAsclin_PinMap.c.

◆ IfxAsclin5_RXD_P14_15_IN

IfxAsclin_Rx_In IfxAsclin5_RXD_P14_15_IN = {&MODULE_ASCLIN5, {&MODULE_P14,15}, Ifx_RxSel_d}

Definition at line 126 of file IfxAsclin_PinMap.c.

◆ IfxAsclin5_SCLK_P14_12_OUT

IfxAsclin_Sclk_Out IfxAsclin5_SCLK_P14_12_OUT = {&MODULE_ASCLIN5, {&MODULE_P14,12}, IfxPort_OutputIdx_alt2}

Definition at line 177 of file IfxAsclin_PinMap.c.

◆ IfxAsclin5_SCLK_P22_8_OUT

IfxAsclin_Sclk_Out IfxAsclin5_SCLK_P22_8_OUT = {&MODULE_ASCLIN5, {&MODULE_P22, 8}, IfxPort_OutputIdx_alt2}

Definition at line 178 of file IfxAsclin_PinMap.c.

◆ IfxAsclin5_SCLK_P33_3_OUT

IfxAsclin_Sclk_Out IfxAsclin5_SCLK_P33_3_OUT = {&MODULE_ASCLIN5, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt2}

Definition at line 179 of file IfxAsclin_PinMap.c.

◆ IfxAsclin5_SLSO_P14_8_OUT

IfxAsclin_Slso_Out IfxAsclin5_SLSO_P14_8_OUT = {&MODULE_ASCLIN5, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt2}

Definition at line 206 of file IfxAsclin_PinMap.c.

◆ IfxAsclin5_SLSO_P33_5_OUT

IfxAsclin_Slso_Out IfxAsclin5_SLSO_P33_5_OUT = {&MODULE_ASCLIN5, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt7}

Definition at line 207 of file IfxAsclin_PinMap.c.

◆ IfxAsclin5_TX_P00_7_OUT

IfxAsclin_Tx_Out IfxAsclin5_TX_P00_7_OUT = {&MODULE_ASCLIN5, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt2}

Definition at line 289 of file IfxAsclin_PinMap.c.

◆ IfxAsclin5_TX_P14_14_OUT

IfxAsclin_Tx_Out IfxAsclin5_TX_P14_14_OUT = {&MODULE_ASCLIN5, {&MODULE_P14,14}, IfxPort_OutputIdx_alt2}

Definition at line 290 of file IfxAsclin_PinMap.c.

◆ IfxAsclin5_TX_P22_2_OUT

IfxAsclin_Tx_Out IfxAsclin5_TX_P22_2_OUT = {&MODULE_ASCLIN5, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt2}

Definition at line 291 of file IfxAsclin_PinMap.c.

◆ IfxAsclin5_TX_P33_0_OUT

IfxAsclin_Tx_Out IfxAsclin5_TX_P33_0_OUT = {&MODULE_ASCLIN5, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt2}

Definition at line 292 of file IfxAsclin_PinMap.c.

◆ IfxAsclin6_RXA_P23_3_IN

IfxAsclin_Rx_In IfxAsclin6_RXA_P23_3_IN = {&MODULE_ASCLIN6, {&MODULE_P23, 3}, Ifx_RxSel_a}

Definition at line 127 of file IfxAsclin_PinMap.c.

◆ IfxAsclin6_RXB_P01_0_IN

IfxAsclin_Rx_In IfxAsclin6_RXB_P01_0_IN = {&MODULE_ASCLIN6, {&MODULE_P01, 0}, Ifx_RxSel_b}

Definition at line 128 of file IfxAsclin_PinMap.c.

◆ IfxAsclin6_RXC_P32_6_IN

IfxAsclin_Rx_In IfxAsclin6_RXC_P32_6_IN = {&MODULE_ASCLIN6, {&MODULE_P32, 6}, Ifx_RxSel_c}

Definition at line 129 of file IfxAsclin_PinMap.c.

◆ IfxAsclin6_RXD_P10_9_IN

IfxAsclin_Rx_In IfxAsclin6_RXD_P10_9_IN = {&MODULE_ASCLIN6, {&MODULE_P10, 9}, Ifx_RxSel_d}

Definition at line 130 of file IfxAsclin_PinMap.c.

◆ IfxAsclin6_RXE_P22_0_IN

IfxAsclin_Rx_In IfxAsclin6_RXE_P22_0_IN = {&MODULE_ASCLIN6, {&MODULE_P22, 0}, Ifx_RxSel_e}

Definition at line 131 of file IfxAsclin_PinMap.c.

◆ IfxAsclin6_RXF_P23_1_IN

IfxAsclin_Rx_In IfxAsclin6_RXF_P23_1_IN = {&MODULE_ASCLIN6, {&MODULE_P23, 1}, Ifx_RxSel_f}

Definition at line 132 of file IfxAsclin_PinMap.c.

◆ IfxAsclin6_SCLK_P02_14_OUT

IfxAsclin_Sclk_Out IfxAsclin6_SCLK_P02_14_OUT = {&MODULE_ASCLIN6, {&MODULE_P02,14}, IfxPort_OutputIdx_alt2}

Definition at line 180 of file IfxAsclin_PinMap.c.

◆ IfxAsclin6_SCLK_P10_11_OUT

IfxAsclin_Sclk_Out IfxAsclin6_SCLK_P10_11_OUT = {&MODULE_ASCLIN6, {&MODULE_P10,11}, IfxPort_OutputIdx_alt2}

Definition at line 181 of file IfxAsclin_PinMap.c.

◆ IfxAsclin6_SCLK_P23_1_OUT

IfxAsclin_Sclk_Out IfxAsclin6_SCLK_P23_1_OUT = {&MODULE_ASCLIN6, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt7}

Definition at line 182 of file IfxAsclin_PinMap.c.

◆ IfxAsclin6_SLSO_P02_12_OUT

IfxAsclin_Slso_Out IfxAsclin6_SLSO_P02_12_OUT = {&MODULE_ASCLIN6, {&MODULE_P02,12}, IfxPort_OutputIdx_alt4}

Definition at line 208 of file IfxAsclin_PinMap.c.

◆ IfxAsclin6_SLSO_P10_13_OUT

IfxAsclin_Slso_Out IfxAsclin6_SLSO_P10_13_OUT = {&MODULE_ASCLIN6, {&MODULE_P10,13}, IfxPort_OutputIdx_alt2}

Definition at line 209 of file IfxAsclin_PinMap.c.

◆ IfxAsclin6_SLSO_P23_4_OUT

IfxAsclin_Slso_Out IfxAsclin6_SLSO_P23_4_OUT = {&MODULE_ASCLIN6, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt2}

Definition at line 210 of file IfxAsclin_PinMap.c.

◆ IfxAsclin6_TX_P01_1_OUT

IfxAsclin_Tx_Out IfxAsclin6_TX_P01_1_OUT = {&MODULE_ASCLIN6, {&MODULE_P01, 1}, IfxPort_OutputIdx_alt4}

Definition at line 293 of file IfxAsclin_PinMap.c.

◆ IfxAsclin6_TX_P02_15_OUT

IfxAsclin_Tx_Out IfxAsclin6_TX_P02_15_OUT = {&MODULE_ASCLIN6, {&MODULE_P02,15}, IfxPort_OutputIdx_alt4}

Definition at line 294 of file IfxAsclin_PinMap.c.

◆ IfxAsclin6_TX_P10_10_OUT

IfxAsclin_Tx_Out IfxAsclin6_TX_P10_10_OUT = {&MODULE_ASCLIN6, {&MODULE_P10,10}, IfxPort_OutputIdx_alt2}

Definition at line 295 of file IfxAsclin_PinMap.c.

◆ IfxAsclin6_TX_P22_0_OUT

IfxAsclin_Tx_Out IfxAsclin6_TX_P22_0_OUT = {&MODULE_ASCLIN6, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt7}

Definition at line 296 of file IfxAsclin_PinMap.c.

◆ IfxAsclin6_TX_P23_5_OUT

IfxAsclin_Tx_Out IfxAsclin6_TX_P23_5_OUT = {&MODULE_ASCLIN6, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt2}

Definition at line 297 of file IfxAsclin_PinMap.c.

◆ IfxAsclin6_TX_P32_7_OUT

IfxAsclin_Tx_Out IfxAsclin6_TX_P32_7_OUT = {&MODULE_ASCLIN6, {&MODULE_P32, 7}, IfxPort_OutputIdx_alt2}

Definition at line 298 of file IfxAsclin_PinMap.c.

◆ IfxAsclin7_RXA_P14_15_IN

IfxAsclin_Rx_In IfxAsclin7_RXA_P14_15_IN = {&MODULE_ASCLIN7, {&MODULE_P14,15}, Ifx_RxSel_a}

Definition at line 133 of file IfxAsclin_PinMap.c.

◆ IfxAsclin7_RXB_P01_8_IN

IfxAsclin_Rx_In IfxAsclin7_RXB_P01_8_IN = {&MODULE_ASCLIN7, {&MODULE_P01, 8}, Ifx_RxSel_b}

Definition at line 134 of file IfxAsclin_PinMap.c.

◆ IfxAsclin7_RXC_P23_2_IN

IfxAsclin_Rx_In IfxAsclin7_RXC_P23_2_IN = {&MODULE_ASCLIN7, {&MODULE_P23, 2}, Ifx_RxSel_c}

Definition at line 135 of file IfxAsclin_PinMap.c.

◆ IfxAsclin7_RXD_P13_11_IN

IfxAsclin_Rx_In IfxAsclin7_RXD_P13_11_IN = {&MODULE_ASCLIN7, {&MODULE_P13,11}, Ifx_RxSel_d}

Definition at line 136 of file IfxAsclin_PinMap.c.

◆ IfxAsclin7_RXE_P22_1_IN

IfxAsclin_Rx_In IfxAsclin7_RXE_P22_1_IN = {&MODULE_ASCLIN7, {&MODULE_P22, 1}, Ifx_RxSel_e}

Definition at line 137 of file IfxAsclin_PinMap.c.

◆ IfxAsclin7_RXF_P22_4_IN

IfxAsclin_Rx_In IfxAsclin7_RXF_P22_4_IN = {&MODULE_ASCLIN7, {&MODULE_P22, 4}, Ifx_RxSel_f}

Definition at line 138 of file IfxAsclin_PinMap.c.

◆ IfxAsclin7_SCLK_P01_10_OUT

IfxAsclin_Sclk_Out IfxAsclin7_SCLK_P01_10_OUT = {&MODULE_ASCLIN7, {&MODULE_P01,10}, IfxPort_OutputIdx_alt2}

Definition at line 183 of file IfxAsclin_PinMap.c.

◆ IfxAsclin7_SCLK_P13_13_OUT

IfxAsclin_Sclk_Out IfxAsclin7_SCLK_P13_13_OUT = {&MODULE_ASCLIN7, {&MODULE_P13,13}, IfxPort_OutputIdx_alt2}

Definition at line 184 of file IfxAsclin_PinMap.c.

◆ IfxAsclin7_SCLK_P14_12_OUT

IfxAsclin_Sclk_Out IfxAsclin7_SCLK_P14_12_OUT = {&MODULE_ASCLIN7, {&MODULE_P14,12}, IfxPort_OutputIdx_alt3}

Definition at line 185 of file IfxAsclin_PinMap.c.

◆ IfxAsclin7_SLSO_P01_11_OUT

IfxAsclin_Slso_Out IfxAsclin7_SLSO_P01_11_OUT = {&MODULE_ASCLIN7, {&MODULE_P01,11}, IfxPort_OutputIdx_alt2}

Definition at line 211 of file IfxAsclin_PinMap.c.

◆ IfxAsclin7_SLSO_P13_15_OUT

IfxAsclin_Slso_Out IfxAsclin7_SLSO_P13_15_OUT = {&MODULE_ASCLIN7, {&MODULE_P13,15}, IfxPort_OutputIdx_alt2}

Definition at line 212 of file IfxAsclin_PinMap.c.

◆ IfxAsclin7_SLSO_P14_8_OUT

IfxAsclin_Slso_Out IfxAsclin7_SLSO_P14_8_OUT = {&MODULE_ASCLIN7, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt3}

Definition at line 213 of file IfxAsclin_PinMap.c.

◆ IfxAsclin7_TX_P01_12_OUT

IfxAsclin_Tx_Out IfxAsclin7_TX_P01_12_OUT = {&MODULE_ASCLIN7, {&MODULE_P01,12}, IfxPort_OutputIdx_alt2}

Definition at line 299 of file IfxAsclin_PinMap.c.

◆ IfxAsclin7_TX_P01_9_OUT

IfxAsclin_Tx_Out IfxAsclin7_TX_P01_9_OUT = {&MODULE_ASCLIN7, {&MODULE_P01, 9}, IfxPort_OutputIdx_alt2}

Definition at line 300 of file IfxAsclin_PinMap.c.

◆ IfxAsclin7_TX_P13_12_OUT

IfxAsclin_Tx_Out IfxAsclin7_TX_P13_12_OUT = {&MODULE_ASCLIN7, {&MODULE_P13,12}, IfxPort_OutputIdx_alt2}

Definition at line 301 of file IfxAsclin_PinMap.c.

◆ IfxAsclin7_TX_P14_14_OUT

IfxAsclin_Tx_Out IfxAsclin7_TX_P14_14_OUT = {&MODULE_ASCLIN7, {&MODULE_P14,14}, IfxPort_OutputIdx_alt3}

Definition at line 302 of file IfxAsclin_PinMap.c.

◆ IfxAsclin7_TX_P22_1_OUT

IfxAsclin_Tx_Out IfxAsclin7_TX_P22_1_OUT = {&MODULE_ASCLIN7, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt7}

Definition at line 303 of file IfxAsclin_PinMap.c.

◆ IfxAsclin7_TX_P23_3_OUT

IfxAsclin_Tx_Out IfxAsclin7_TX_P23_3_OUT = {&MODULE_ASCLIN7, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt2}

Definition at line 304 of file IfxAsclin_PinMap.c.

◆ IfxAsclin8_RXA_P02_9_IN

IfxAsclin_Rx_In IfxAsclin8_RXA_P02_9_IN = {&MODULE_ASCLIN8, {&MODULE_P02, 9}, Ifx_RxSel_a}

Definition at line 139 of file IfxAsclin_PinMap.c.

◆ IfxAsclin8_RXB_P02_10_IN

IfxAsclin_Rx_In IfxAsclin8_RXB_P02_10_IN = {&MODULE_ASCLIN8, {&MODULE_P02,10}, Ifx_RxSel_b}

Definition at line 140 of file IfxAsclin_PinMap.c.

◆ IfxAsclin8_RXC_P33_1_IN

IfxAsclin_Rx_In IfxAsclin8_RXC_P33_1_IN = {&MODULE_ASCLIN8, {&MODULE_P33, 1}, Ifx_RxSel_c}

Definition at line 141 of file IfxAsclin_PinMap.c.

◆ IfxAsclin8_RXD_P33_6_IN

IfxAsclin_Rx_In IfxAsclin8_RXD_P33_6_IN = {&MODULE_ASCLIN8, {&MODULE_P33, 6}, Ifx_RxSel_d}

Definition at line 142 of file IfxAsclin_PinMap.c.

◆ IfxAsclin8_RXE_P34_5_IN

IfxAsclin_Rx_In IfxAsclin8_RXE_P34_5_IN = {&MODULE_ASCLIN8, {&MODULE_P34, 5}, Ifx_RxSel_e}

Definition at line 143 of file IfxAsclin_PinMap.c.

◆ IfxAsclin8_SCLK_P02_8_OUT

IfxAsclin_Sclk_Out IfxAsclin8_SCLK_P02_8_OUT = {&MODULE_ASCLIN8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt3}

Definition at line 186 of file IfxAsclin_PinMap.c.

◆ IfxAsclin8_SLSO_P02_11_OUT

IfxAsclin_Slso_Out IfxAsclin8_SLSO_P02_11_OUT = {&MODULE_ASCLIN8, {&MODULE_P02,11}, IfxPort_OutputIdx_alt3}

Definition at line 214 of file IfxAsclin_PinMap.c.

◆ IfxAsclin8_TX_P02_9_OUT

IfxAsclin_Tx_Out IfxAsclin8_TX_P02_9_OUT = {&MODULE_ASCLIN8, {&MODULE_P02, 9}, IfxPort_OutputIdx_alt3}

Definition at line 305 of file IfxAsclin_PinMap.c.

◆ IfxAsclin8_TX_P33_7_OUT

IfxAsclin_Tx_Out IfxAsclin8_TX_P33_7_OUT = {&MODULE_ASCLIN8, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt4}

Definition at line 306 of file IfxAsclin_PinMap.c.

◆ IfxAsclin8_TX_P34_5_OUT

IfxAsclin_Tx_Out IfxAsclin8_TX_P34_5_OUT = {&MODULE_ASCLIN8, {&MODULE_P34, 5}, IfxPort_OutputIdx_alt2}

Definition at line 307 of file IfxAsclin_PinMap.c.

◆ IfxAsclin9_RXA_P01_5_IN

IfxAsclin_Rx_In IfxAsclin9_RXA_P01_5_IN = {&MODULE_ASCLIN9, {&MODULE_P01, 5}, Ifx_RxSel_a}

Definition at line 144 of file IfxAsclin_PinMap.c.

◆ IfxAsclin9_RXB_P01_7_IN

IfxAsclin_Rx_In IfxAsclin9_RXB_P01_7_IN = {&MODULE_ASCLIN9, {&MODULE_P01, 7}, Ifx_RxSel_b}

Definition at line 145 of file IfxAsclin_PinMap.c.

◆ IfxAsclin9_RXC_P14_7_IN

IfxAsclin_Rx_In IfxAsclin9_RXC_P14_7_IN = {&MODULE_ASCLIN9, {&MODULE_P14, 7}, Ifx_RxSel_c}

Definition at line 146 of file IfxAsclin_PinMap.c.

◆ IfxAsclin9_RXD_P14_9_IN

IfxAsclin_Rx_In IfxAsclin9_RXD_P14_9_IN = {&MODULE_ASCLIN9, {&MODULE_P14, 9}, Ifx_RxSel_d}

Definition at line 147 of file IfxAsclin_PinMap.c.

◆ IfxAsclin9_RXE_P20_6_IN

IfxAsclin_Rx_In IfxAsclin9_RXE_P20_6_IN = {&MODULE_ASCLIN9, {&MODULE_P20, 6}, Ifx_RxSel_e}

Definition at line 148 of file IfxAsclin_PinMap.c.

◆ IfxAsclin9_RXF_P20_7_IN

IfxAsclin_Rx_In IfxAsclin9_RXF_P20_7_IN = {&MODULE_ASCLIN9, {&MODULE_P20, 7}, Ifx_RxSel_f}

Definition at line 149 of file IfxAsclin_PinMap.c.

◆ IfxAsclin9_SCLK_P01_6_OUT

IfxAsclin_Sclk_Out IfxAsclin9_SCLK_P01_6_OUT = {&MODULE_ASCLIN9, {&MODULE_P01, 6}, IfxPort_OutputIdx_alt3}

Definition at line 187 of file IfxAsclin_PinMap.c.

◆ IfxAsclin9_SLSO_P01_4_OUT

IfxAsclin_Slso_Out IfxAsclin9_SLSO_P01_4_OUT = {&MODULE_ASCLIN9, {&MODULE_P01, 4}, IfxPort_OutputIdx_alt3}

Definition at line 215 of file IfxAsclin_PinMap.c.

◆ IfxAsclin9_TX_P01_7_OUT

IfxAsclin_Tx_Out IfxAsclin9_TX_P01_7_OUT = {&MODULE_ASCLIN9, {&MODULE_P01, 7}, IfxPort_OutputIdx_alt3}

Definition at line 308 of file IfxAsclin_PinMap.c.

◆ IfxAsclin9_TX_P14_7_OUT

IfxAsclin_Tx_Out IfxAsclin9_TX_P14_7_OUT = {&MODULE_ASCLIN9, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt4}

Definition at line 309 of file IfxAsclin_PinMap.c.

◆ IfxAsclin9_TX_P20_7_OUT

IfxAsclin_Tx_Out IfxAsclin9_TX_P20_7_OUT = {&MODULE_ASCLIN9, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt2}

Definition at line 310 of file IfxAsclin_PinMap.c.

◆ IfxAsclin_Cts_In_pinTable

const IfxAsclin_Cts_In* IfxAsclin_Cts_In_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS]

Definition at line 313 of file IfxAsclin_PinMap.c.

◆ IfxAsclin_Rts_Out_pinTable

const IfxAsclin_Rts_Out* IfxAsclin_Rts_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS]

Definition at line 412 of file IfxAsclin_PinMap.c.

◆ IfxAsclin_Rx_In_pinTable

const IfxAsclin_Rx_In* IfxAsclin_Rx_In_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS]

Definition at line 511 of file IfxAsclin_PinMap.c.

◆ IfxAsclin_Sclk_Out_pinTable

const IfxAsclin_Sclk_Out* IfxAsclin_Sclk_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS]

Definition at line 754 of file IfxAsclin_PinMap.c.

◆ IfxAsclin_Slso_Out_pinTable

const IfxAsclin_Slso_Out* IfxAsclin_Slso_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS]

Definition at line 1069 of file IfxAsclin_PinMap.c.

◆ IfxAsclin_Tx_Out_pinTable

const IfxAsclin_Tx_Out* IfxAsclin_Tx_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS]

Definition at line 1264 of file IfxAsclin_PinMap.c.


iLLD_TC38A: IfxAsclin_PinMap.h File Reference

  • _PinMap
Data Structures | Macros | Variables
IfxAsclin_PinMap.h File Reference
iLLD » ASCLIN

ASCLIN I/O map. More...

#include <IfxAsclin_reg.h>
#include <_Impl/IfxAsclin_cfg.h>
#include <Port/Std/IfxPort.h>
Include dependency graph for IfxAsclin_PinMap.h:

Go to the source code of this file.

Data Structures

struct | IfxAsclin_Cts_In
CTS pin mapping structure. More...
struct | IfxAsclin_Rx_In
RX pin mapping structure. More...
struct | IfxAsclin_Rts_Out
RTS pin mapping structure. More...
struct | IfxAsclin_Sclk_Out
SCLK pin mapping structure. More...
struct | IfxAsclin_Slso_Out
SLSO pin mapping structure. More...
struct | IfxAsclin_Tx_Out
TX pin mapping structure. More...

Macros

#define | IFXASCLIN_PINMAP_NUM_MODULES 24
Table dimensions. More...
#define | IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS 2
#define | IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS 2
#define | IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS 8
#define | IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS 11
#define | IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS 6
#define | IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS 14

Variables

IFX_EXTERN IfxAsclin_Cts_In IfxAsclin0_CTSA_P14_9_IN
Clear to send input. More...
IFX_EXTERN IfxAsclin_Cts_In IfxAsclin1_CTSA_P20_7_IN
Clear to send input. More...
IFX_EXTERN IfxAsclin_Cts_In IfxAsclin1_CTSB_P32_4_IN
Clear to send input. More...
IFX_EXTERN IfxAsclin_Cts_In IfxAsclin2_CTSA_P10_7_IN
Clear to send input. More...
IFX_EXTERN IfxAsclin_Cts_In IfxAsclin2_CTSB_P33_5_IN
Clear to send input. More...
IFX_EXTERN IfxAsclin_Cts_In IfxAsclin3_CTSA_P00_12_IN
Clear to send input. More...
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin0_RTS_P14_7_OUT
Ready to send output. More...
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin1_RTS_P20_6_OUT
Ready to send output. More...
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin1_RTS_P23_1_OUT
Ready to send output. More...
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin2_RTS_P10_8_OUT
Ready to send output. More...
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin2_RTS_P33_4_OUT
Ready to send output. More...
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin3_RTS_P00_9_OUT
Ready to send output. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin0_RXA_P14_1_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin0_RXB_P15_3_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin0_RXC_P01_8_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin0_RXD_P33_10_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin0_RXE_P13_11_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin10_RXA_P00_4_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin10_RXB_P00_8_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin10_RXC_P13_0_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin10_RXD_P13_1_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin11_RXA_P10_0_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin11_RXB_P10_4_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin11_RXC_P21_0_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin11_RXD_P21_1_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin11_RXE_P21_2_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin11_RXF_P21_5_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin12_RXA_P00_3_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin12_RXB_P00_5_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin13_RXA_P00_9_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin13_RXB_P00_11_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin14_RXA_P33_3_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin14_RXB_P33_4_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin15_RXA_P32_4_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin15_RXB_P32_7_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin16_RXA_P23_5_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin16_RXB_P23_7_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin17_RXA_P22_11_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin17_RXB_P21_0_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin18_RXA_P21_1_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin18_RXB_P21_4_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin19_RXA_P15_6_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin19_RXB_P15_7_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXA_P15_1_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXB_P15_5_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXC_P20_9_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXD_P14_8_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXE_P11_10_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXF_P33_13_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXG_P02_3_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin20_RXA_P14_7_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin20_RXB_P14_9_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin21_RXA_P13_0_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin21_RXB_P13_3_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin22_RXA_P10_4_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin22_RXB_P10_5_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin23_RXA_P10_6_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin23_RXB_P10_7_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXA_P14_3_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXB_P02_1_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXC_P02_10_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXD_P10_6_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXE_P33_8_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXF_P32_6_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXG_P02_0_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXA_P15_7_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXB_P11_0_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXC_P20_3_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXD_P32_2_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXE_P00_1_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXF_P21_6_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXG_P21_2_IN
Differential Receive input (low active) More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXG_P21_3_IN
Differential Receive input (high active) More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXH_P13_12_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin4_RXA_P00_12_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin4_RXB_P34_2_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin4_RXC_P22_6_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin4_RXD_P22_9_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin5_RXA_P00_6_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin5_RXB_P33_4_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin5_RXC_P22_3_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin5_RXD_P14_15_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin6_RXA_P23_3_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin6_RXB_P01_0_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin6_RXC_P32_6_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin6_RXD_P10_9_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin6_RXE_P22_0_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin6_RXF_P23_1_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin7_RXA_P14_15_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin7_RXB_P01_8_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin7_RXC_P23_2_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin7_RXD_P13_11_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin7_RXE_P22_1_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin7_RXF_P22_4_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin8_RXA_P02_9_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin8_RXB_P02_10_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin8_RXC_P33_1_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin8_RXD_P33_6_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin8_RXE_P34_5_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin9_RXA_P01_5_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin9_RXB_P01_7_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin9_RXC_P14_7_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin9_RXD_P14_9_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin9_RXE_P20_6_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin9_RXF_P20_7_IN
Receive input. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P14_0_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P15_2_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin10_SCLK_P13_2_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin11_SCLK_P21_3_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P15_0_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P20_10_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_11_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_12_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P02_4_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P10_6_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P14_2_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_7_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_9_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_0_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_2_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P11_1_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P11_4_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_6_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_8_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P20_0_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_5_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_7_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P32_3_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P33_2_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin4_SCLK_P00_10_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin4_SCLK_P22_7_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin4_SCLK_P34_3_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin5_SCLK_P14_12_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin5_SCLK_P22_8_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin5_SCLK_P33_3_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin6_SCLK_P02_14_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin6_SCLK_P10_11_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin6_SCLK_P23_1_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin7_SCLK_P01_10_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin7_SCLK_P13_13_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin7_SCLK_P14_12_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin8_SCLK_P02_8_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin9_SCLK_P01_6_OUT
Shift clock output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin10_SLSO_P13_3_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin11_SLSO_P21_4_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin1_SLSO_P14_3_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin1_SLSO_P20_8_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin1_SLSO_P33_10_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin2_SLSO_P02_3_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin2_SLSO_P10_5_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin2_SLSO_P33_6_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P00_3_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P12_1_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P14_3_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_2_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_6_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P33_1_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin4_SLSO_P00_11_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin4_SLSO_P22_11_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin4_SLSO_P22_4_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin4_SLSO_P34_4_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin5_SLSO_P14_8_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin5_SLSO_P33_5_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin6_SLSO_P02_12_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin6_SLSO_P10_13_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin6_SLSO_P23_4_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin7_SLSO_P01_11_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin7_SLSO_P13_15_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin7_SLSO_P14_8_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin8_SLSO_P02_11_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin9_SLSO_P01_4_OUT
Slave select signal output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P01_13_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P13_10_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P14_0_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P14_1_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P15_2_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P15_3_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P33_9_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin10_TX_P00_8_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin10_TX_P13_0_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin11_TX_P10_0_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin11_TX_P21_0_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin11_TX_P21_5_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin12_TX_P00_3_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin12_TX_P01_6_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin13_TX_P00_10_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin13_TX_P00_11_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin14_TX_P33_2_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin14_TX_P33_3_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin15_TX_P32_7_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin15_TX_P33_0_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin16_TX_P23_6_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin16_TX_P23_7_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin17_TX_P22_11_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin17_TX_P22_7_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin18_TX_P21_3_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin18_TX_P21_4_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin19_TX_P15_4_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin19_TX_P15_7_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P02_2_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P11_12_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P14_10_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P14_15_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_0_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_1_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_4_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_5_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P20_10_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P33_12_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P33_13_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin20_TX_P14_7_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin20_TX_P14_8_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin21_TX_P13_2_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin21_TX_P13_3_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin22_TX_P10_0_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin22_TX_P10_4_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin23_TX_P10_7_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin23_TX_P10_8_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P02_0_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P02_9_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P10_5_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P14_2_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P14_3_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P32_5_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P33_8_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P33_9_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P00_0_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P00_1_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P11_0_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P11_1_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P13_9_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P15_6_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P15_7_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P20_0_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P20_3_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P21_7_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P22_0_OUT
Differential Transmit output (low active) More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P22_1_OUT
Differential Transmit output (high active) More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P32_2_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P32_3_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin4_TX_P00_9_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin4_TX_P22_10_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin4_TX_P22_5_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin4_TX_P34_1_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin5_TX_P00_7_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin5_TX_P14_14_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin5_TX_P22_2_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin5_TX_P33_0_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin6_TX_P01_1_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin6_TX_P02_15_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin6_TX_P10_10_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin6_TX_P22_0_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin6_TX_P23_5_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin6_TX_P32_7_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin7_TX_P01_12_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin7_TX_P01_9_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin7_TX_P13_12_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin7_TX_P14_14_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin7_TX_P22_1_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin7_TX_P23_3_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin8_TX_P02_9_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin8_TX_P33_7_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin8_TX_P34_5_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin9_TX_P01_7_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin9_TX_P14_7_OUT
Transmit output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin9_TX_P20_7_OUT
Transmit output. More...
IFX_EXTERN const IfxAsclin_Cts_In * | IfxAsclin_Cts_In_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS]
IfxAsclin_Cts_In table. More...
IFX_EXTERN const IfxAsclin_Rts_Out * | IfxAsclin_Rts_Out_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS]
IfxAsclin_Rts_Out table. More...
IFX_EXTERN const IfxAsclin_Rx_In * | IfxAsclin_Rx_In_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS]
IfxAsclin_Rx_In table. More...
IFX_EXTERN const IfxAsclin_Sclk_Out * | IfxAsclin_Sclk_Out_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS]
IfxAsclin_Sclk_Out table. More...
IFX_EXTERN const IfxAsclin_Slso_Out * | IfxAsclin_Slso_Out_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS]
IfxAsclin_Slso_Out table. More...
IFX_EXTERN const IfxAsclin_Tx_Out * | IfxAsclin_Tx_Out_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS]
IfxAsclin_Tx_Out table. More...

Detailed Description

ASCLIN I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxAsclin_PinMap.h.


iLLD_TC38A: IfxAsclin_Asc.h File Reference

  • Asclin
  • Asc
Data Structures | Functions
IfxAsclin_Asc.h File Reference
iLLD » ASCLIN

ASCLIN ASC details. More...

#include "Asclin/Std/IfxAsclin.h"
#include "_Lib/DataHandling/Ifx_Fifo.h"
#include "Stm/Std/IfxStm.h"
#include "StdIf/IfxStdIf_DPipe.h"
Include dependency graph for IfxAsclin_Asc.h:

Go to the source code of this file.

Data Structures

struct | IfxAsclin_Asc_ErrorFlags
Structure for Error Flags. More...
struct | IfxAsclin_Asc_BaudRate
Structure for baudrate. More...
struct | IfxAsclin_Asc_BitTimingControl
Structure for bit timings. More...
struct | IfxAsclin_Asc_FifoControl
Structure for FIFO control. More...
struct | IfxAsclin_Asc_FrameControl
Structure for frame control. More...
struct | IfxAsclin_Asc_InterruptConfig
Structure for interrupt configuration. More...
struct | IfxAsclin_Asc_Pins
Structure for ASC pin configuration. More...
union | IfxAsclin_Asc_ErrorFlagsUnion
This union contains the error flags. In addition it allows to write and read to/from all flags as once via the ALL member. More...
struct | IfxAsclin_Asc
Module Handle. More...
struct | IfxAsclin_Asc_Config
Configuration structure of the module. More...

Functions

IFX_EXTERN void | IfxAsclin_Asc_isrError (IfxAsclin_Asc *asclin)
ISR error routine. More...
IFX_EXTERN void | IfxAsclin_Asc_isrReceive (IfxAsclin_Asc *asclin)
ISR receive routine. More...
IFX_EXTERN void | IfxAsclin_Asc_isrTransmit (IfxAsclin_Asc *asclin)
ISR transmit routine. More...
IFX_EXTERN uint8 | IfxAsclin_Asc_blockingRead (IfxAsclin_Asc *asclin)
Reads data from the Rx FIFO. More...
IFX_EXTERN boolean | IfxAsclin_Asc_blockingWrite (IfxAsclin_Asc *asclin, uint8 data)
Writes data into the Tx FIFO. More...
IFX_EXTERN boolean | IfxAsclin_Asc_canReadCount (IfxAsclin_Asc *asclin, Ifx_SizeT count, Ifx_TickTime timeout)
IFX_EXTERN boolean | IfxAsclin_Asc_canWriteCount (IfxAsclin_Asc *asclin, Ifx_SizeT count, Ifx_TickTime timeout)
IFX_EXTERN void | IfxAsclin_Asc_clearRx (IfxAsclin_Asc *asclin)
IFX_EXTERN void | IfxAsclin_Asc_clearTx (IfxAsclin_Asc *asclin)
IFX_EXTERN boolean | IfxAsclin_Asc_flushTx (IfxAsclin_Asc *asclin, Ifx_TickTime timeout)
IFX_EXTERN sint32 | IfxAsclin_Asc_getReadCount (IfxAsclin_Asc *asclin)
IFX_EXTERN IfxStdIf_DPipe_ReadEvent | IfxAsclin_Asc_getReadEvent (IfxAsclin_Asc *asclin)
IFX_EXTERN uint32 | IfxAsclin_Asc_getSendCount (IfxAsclin_Asc *asclin)
IFX_EXTERN Ifx_TickTime | IfxAsclin_Asc_getTxTimeStamp (IfxAsclin_Asc *asclin)
IFX_EXTERN sint32 | IfxAsclin_Asc_getWriteCount (IfxAsclin_Asc *asclin)
IFX_EXTERN IfxStdIf_DPipe_WriteEvent | IfxAsclin_Asc_getWriteEvent (IfxAsclin_Asc *asclin)
IFX_EXTERN boolean | IfxAsclin_Asc_read (IfxAsclin_Asc *asclin, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
IFX_EXTERN void | IfxAsclin_Asc_resetSendCount (IfxAsclin_Asc *asclin)
IFX_EXTERN boolean | IfxAsclin_Asc_write (IfxAsclin_Asc *asclin, const void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
IFX_EXTERN void | IfxAsclin_Asc_disableModule (IfxAsclin_Asc *asclin)
Disables the module. More...
IFX_EXTERN IfxAsclin_Status | IfxAsclin_Asc_initModule (IfxAsclin_Asc *asclin, const IfxAsclin_Asc_Config *config)
Initialises the module. More...
IFX_EXTERN void | IfxAsclin_Asc_initModuleConfig (IfxAsclin_Asc_Config *config, Ifx_ASCLIN *asclin)
Fills the config structure with default values. More...
IFX_EXTERN void | IfxAsclin_Asc_initiateTransmission (IfxAsclin_Asc *asclin)
Initiate the data transmission. More...
IFX_EXTERN boolean | IfxAsclin_Asc_stdIfDPipeInit (IfxStdIf_DPipe *stdif, IfxAsclin_Asc *asclin)
Initialize the standard interface to the device driver. More...

Detailed Description

ASCLIN ASC details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxAsclin_Asc.h.

Data Structure Documentation

◆ IfxAsclin_Asc_ErrorFlags

struct IfxAsclin_Asc_ErrorFlags

Structure for Error Flags.

Definition at line 249 of file IfxAsclin_Asc.h.

Data Fields
uint8 | frameError: 1 | transmit complete/pending error
uint8 | parityError: 1 | parity error
uint8 | rxFifoOverflow: 1 | receive FIFO overflow error
uint8 | rxFifoUnderflow: 1 | receive FIFO underflow error
uint8 | txFifoOverflow: 1 | transmit FIFO overflow error

◆ IfxAsclin_Asc_ErrorFlagsUnion

union IfxAsclin_Asc_ErrorFlagsUnion

This union contains the error flags. In addition it allows to write and read to/from all flags as once via the ALL member.

Definition at line 332 of file IfxAsclin_Asc.h.

Collaboration diagram for IfxAsclin_Asc_ErrorFlagsUnion:
[legend]
Data Fields
uint8 | ALL
IfxAsclin_Asc_ErrorFlags | flags

Function Documentation

◆ IfxAsclin_Asc_initiateTransmission()

IFX_EXTERN void IfxAsclin_Asc_initiateTransmission ( IfxAsclin_Asc * asclin )

Initiate the data transmission.

Parameters
asclin module handle
Returns
None

A coding example can be found in How to use the ASCLIN ASC Interface driver?

Definition at line 406 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_write().

◆ IfxAsclin_Asc_stdIfDPipeInit()

IFX_EXTERN boolean IfxAsclin_Asc_stdIfDPipeInit | ( | IfxStdIf_DPipe * | stdif,
 |  | IfxAsclin_Asc * | asclin
 | ) |  |

Initialize the standard interface to the device driver.

Parameters
stdif | standard interface object, will be initialized by the function
asclin | device driver object used by the standard interface. must be initialised separately
Returns
TRUE on success, else FALSE

Definition at line 584 of file IfxAsclin_Asc.c.


iLLD_TC38A: IfxAsclin_Lin.h File Reference

  • Asclin
  • Lin
Data Structures | Macros | Enumerations | Functions
IfxAsclin_Lin.h File Reference
iLLD » ASCLIN

ASCLIN LIN details. More...

#include "Asclin/Std/IfxAsclin.h"
#include "_Utilities/Ifx_Assert.h"
Include dependency graph for IfxAsclin_Lin.h:

Go to the source code of this file.

Data Structures

struct | IfxAsclin_Lin_EnabledInterrupts
Structure to store interrupts which are enabled during initialisation. More...
struct | IfxAsclin_Lin_FrameControlFlags
Structure for Lin Frame Control flags. More...
struct | IfxAsclin_Lin_AcknowledgementFlags
Structure for Acknowledgement Flags. More...
struct | IfxAsclin_Lin_BaudrateDetection
Structure for Baudrate Detection. More...
struct | IfxAsclin_Lin_BaudrateGeneration
Structure for Baudrate Generation. More...
struct | IfxAsclin_Lin_BitSamplingControl
Structure for Bit Sampling. More...
struct | IfxAsclin_Lin_BitTimingControl
Structure for Bit Timing. More...
struct | IfxAsclin_Lin_DataControl
Structure for Data Control. More...
struct | IfxAsclin_Lin_ErrorFlags
Structure for Error Flags. More...
struct | IfxAsclin_Lin_FifoControl
Structure for FIFO Control. More...
struct | IfxAsclin_Lin_FrameControl
Structure for Frame Control. More...
struct | IfxAsclin_Lin_FrameDataControl
Structure for Frame Data and Control flags. More...
struct | IfxAsclin_Lin_InterruptConfig
Structure for LIN Interrupt Configuration. More...
struct | IfxAsclin_Lin_LinControl
Structure for lin Control. More...
struct | IfxAsclin_Lin_Pins
Structure for LIN pin configuration. More...
struct | IfxAsclin_Lin
struct | IfxAsclin_Lin_Config
Configuration structure of the module. More...
struct | IfxAsclin_Lin_PduType
Structure to hold Lin Pdu data. More...

Macros

#define | IFXASCLIN_LIN_SEND_RESPONSE (0x80)
#define | IFXASCLIN_LIN_RECEIVE_RESPONSE (0xC1)

Enumerations

enum IfxAsclin_Lin_Direction {
IfxAsclin_Lin_Direction_TransmitHeader = 0,
IfxAsclin_Lin_Direction_TransmitHeaderAndResponse = 1,
IfxAsclin_Lin_Direction_TransmitHeaderAndReceiveResponse = 2
}
Defines the type of Lin Master Frame. (Transmit Header only) or (Transmit Header and Response) or (Transmit Header and Receive Response). More...

Functions

IFX_INLINE void | IfxAsclin_Lin_prepareHeaderReception (IfxAsclin_Lin *asclin)
Prepares the module to receive the header. More...
IFX_INLINE void | IfxAsclin_Lin_prepareResponseReception (IfxAsclin_Lin *asclin, uint32 length)
Prepares the module to Receive the response. More...
IFX_INLINE void | IfxAsclin_Lin_readHeader (IfxAsclin_Lin *asclin, uint8 *id)
Reads the header. More...
IFX_INLINE void | IfxAsclin_Lin_readResponse (IfxAsclin_Lin *asclin, uint8 *data, uint32 length)
Reads the response. More...
IFX_EXTERN void | IfxAsclin_Lin_ignoreHeader (IfxAsclin_Lin *asclin)
Ignores the latest header. More...
IFX_EXTERN void | IfxAsclin_Lin_receiveHeader (IfxAsclin_Lin *asclin, uint8 *id)
Receives the header. More...
IFX_EXTERN void | IfxAsclin_Lin_receiveResponse (IfxAsclin_Lin *asclin, uint8 *data, uint32 length)
Receives the response. More...
IFX_EXTERN void | IfxAsclin_Lin_sendHeader (IfxAsclin_Lin *asclin, uint8 *id)
Sends the header. More...
IFX_EXTERN void | IfxAsclin_Lin_sendResponse (IfxAsclin_Lin *asclin, uint8 *data, uint32 length)
sends the response More...
IFX_EXTERN void | IfxAsclin_Lin_disableModule (IfxAsclin_Lin *asclin)
Disables the module. More...
IFX_EXTERN IfxAsclin_Status | IfxAsclin_Lin_initModule (IfxAsclin_Lin *asclin, const IfxAsclin_Lin_Config *config)
Initialises the module. More...
IFX_EXTERN void | IfxAsclin_Lin_initModuleConfig (IfxAsclin_Lin_Config *config, Ifx_ASCLIN *asclin)
Fills the config structure with default values. More...
IFX_EXTERN void | IfxAsclin_Lin_sendFrame (IfxAsclin_Lin *asclin, IfxAsclin_Lin_PduType *pduptr)
This API must be used in interrupt mode. It can be used to 1.Send Header 2.Send both Header and Response 3.Send Header and Receive Response. More...
IFX_EXTERN void | IfxAsclin_Lin_checkForReceivedHeaderFlags (IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for received header More...
IFX_EXTERN void | IfxAsclin_Lin_checkForReceivedResponseFlags (IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for received response More...
IFX_EXTERN void | IfxAsclin_Lin_checkForTransmittedHeaderFlags (IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for transmitted header More...
IFX_EXTERN void | IfxAsclin_Lin_checkForTransmittedResponseFlags (IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for transmitted response More...
IFX_EXTERN void | IfxAsclin_Lin_clearFlagsStatus (IfxAsclin_Lin *asclin)
clears the flags status structures More...
IFX_EXTERN boolean | IfxAsclin_Lin_waitForReceivedHeader (IfxAsclin_Lin *asclin)
waits until receive header end acknowledgemnet or an error has been detected More...
IFX_EXTERN boolean | IfxAsclin_Lin_waitForReceivedResponse (IfxAsclin_Lin *asclin)
waits until receive response end acknowledgemnet or an error has been detected More...
IFX_EXTERN boolean | IfxAsclin_Lin_waitForTransmittedHeader (IfxAsclin_Lin *asclin)
waits until transmit header end acknowledgemnet or an error has been detected More...
IFX_EXTERN boolean | IfxAsclin_Lin_waitForTransmittedResponse (IfxAsclin_Lin *asclin)
waits until transmit response end acknowledgemnet or an error has been detected More...
IFX_EXTERN void | IfxAsclin_Lin_isrError (IfxAsclin_Lin *asclin)
ISR error routine. More...
IFX_EXTERN void | IfxAsclin_Lin_isrReceive (IfxAsclin_Lin *asclin)
ISR receive routine. More...
IFX_EXTERN void | IfxAsclin_Lin_isrTransmit (IfxAsclin_Lin *asclin)
ISR transmit routine. More...

Detailed Description

ASCLIN LIN details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxAsclin_Lin.h.

Macro Definition Documentation

◆ IFXASCLIN_LIN_RECEIVE_RESPONSE

#define IFXASCLIN_LIN_RECEIVE_RESPONSE (0xC1)

Definition at line 316 of file IfxAsclin_Lin.h.

◆ IFXASCLIN_LIN_SEND_RESPONSE

#define IFXASCLIN_LIN_SEND_RESPONSE (0x80)

Definition at line 314 of file IfxAsclin_Lin.h.


iLLD_TC38A: IfxAsclin_Spi.h File Reference

  • Asclin
  • Spi
Data Structures | Enumerations | Functions
IfxAsclin_Spi.h File Reference
iLLD » ASCLIN

ASCLIN SPI details. More...

#include "Asclin/Std/IfxAsclin.h"
Include dependency graph for IfxAsclin_Spi.h:

Go to the source code of this file.

Data Structures

struct | IfxAsclin_Spi_Baudrate
Structure for Baudrate Generation. More...
struct | IfxAsclin_Spi_BitSamplingControl
Structure for Bit Sampling. More...
struct | IfxAsclin_Spi_ErrorFlags
Structure for Error Flags. More...
struct | IfxAsclin_Spi_FifoControl
Structure for FIFO Control. More...
struct | IfxAsclin_Spi_FrameControl
Structure for Frame Control. More...
struct | IfxAsclin_Spi_InputOutputControl
Structure for input output control. More...
struct | IfxAsclin_Spi_InterruptConfig
Structure for interrupt configuration. More...
struct | IfxAsclin_Spi_Job
Structure for data transfer jobs. More...
struct | IfxAsclin_Spi_Pins
Structure for SPI pin configuration. More...
struct | IfxAsclin_Spi
Module handle. More...
struct | IfxAsclin_Spi_Config
Configuration structure of the module. More...

Enumerations

enum IfxAsclin_Spi_Status {
IfxAsclin_Spi_Status_ok = 0,
IfxAsclin_Spi_Status_busy = 1,
IfxAsclin_Spi_Status_unknown = 2
}
Enumeration for job status. More...

Functions

IFX_EXTERN void | IfxAsclin_Spi_disableModule (IfxAsclin_Spi *asclin)
Disables the module. More...
IFX_EXTERN IfxAsclin_Status | IfxAsclin_Spi_initModule (IfxAsclin_Spi *asclin, const IfxAsclin_Spi_Config *config)
Initialises the module. More...
IFX_EXTERN void | IfxAsclin_Spi_initModuleConfig (IfxAsclin_Spi_Config *config, Ifx_ASCLIN *asclin)
Fills the configuration structure with default values. More...
IFX_EXTERN void | IfxAsclin_Spi_isrError (IfxAsclin_Spi *asclin)
ISR error routine. More...
IFX_EXTERN void | IfxAsclin_Spi_isrReceive (IfxAsclin_Spi *asclin)
ISR receive routine. More...
IFX_EXTERN void | IfxAsclin_Spi_isrTransmit (IfxAsclin_Spi *asclin)
ISR transmit routine. More...
IFX_EXTERN IfxAsclin_Spi_Status | IfxAsclin_Spi_exchange (IfxAsclin_Spi *asclin, void *src, void *dest, uint32 count)
starts the data exchange More...
IFX_EXTERN void | IfxAsclin_Spi_read (IfxAsclin_Spi *asclin)
Reads data from the Rx FIFO based on the outlet width. More...
IFX_EXTERN void | IfxAsclin_Spi_write (IfxAsclin_Spi *asclin)
Writes data into the Tx FIFO based on the inlet width. More...
IFX_EXTERN IfxAsclin_Spi_Status | IfxAsclin_Spi_getStatus (IfxAsclin_Spi *asclin)

Detailed Description

ASCLIN SPI details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxAsclin_Spi.h.

Enumeration Type Documentation

◆ IfxAsclin_Spi_Status

enum IfxAsclin_Spi_Status

Enumeration for job status.

Enumerator
IfxAsclin_Spi_Status_ok
IfxAsclin_Spi_Status_busy
IfxAsclin_Spi_Status_unknown

Definition at line 231 of file IfxAsclin_Spi.h.

Function Documentation

◆ IfxAsclin_Spi_getStatus()

IFX_EXTERN IfxAsclin_Spi_Status IfxAsclin_Spi_getStatus ( IfxAsclin_Spi * asclin )
Parameters
asclin module handle
Returns
status of the on going job

Definition at line 99 of file IfxAsclin_Spi.c.


iLLD_TC38A: IfxAsclin.h File Reference

  • Asclin
  • Std
Enumerations | Functions
IfxAsclin.h File Reference
iLLD » ASCLIN

ASCLIN basic functionality. More...

#include "_Impl/IfxAsclin_cfg.h"
#include "Scu/Std/IfxScuCcu.h"
#include "Scu/Std/IfxScuWdt.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "IfxAsclin_reg.h"
#include "Src/Std/IfxSrc.h"
#include "_PinMap/IfxAsclin_PinMap.h"
Include dependency graph for IfxAsclin.h:

Go to the source code of this file.

Enumerations

enum IfxAsclin_Checksum {
IfxAsclin_Checksum_classic = 0,
IfxAsclin_Checksum_enhanced = 1
}
Defines if the classic or the enhanced checksum will be calculated by the checksum block.
Definition in Ifx_ASCLIN.DATCON.B.CSM. More...
enum IfxAsclin_ChecksumInjection {
IfxAsclin_ChecksumInjection_notWritten = 0,
IfxAsclin_ChecksumInjection_written = 1
}
Defines if the received checksum byte is written into the RXFifo or not.
Definition in Ifx_ASCLIN.LIN.CON.B.CSI. More...
enum IfxAsclin_ClockPolarity {
IfxAsclin_ClockPolarity_idleLow = 0,
IfxAsclin_ClockPolarity_idleHigh = 1
}
CPOL defines the idle level of the clock signal in the SPI mode.
Idle level is the level outside the data transmission time intervals.
Definition in Ifx_ASCLIN.IOCR.B.CPOL. More...
enum IfxAsclin_ClockSource {
IfxAsclin_ClockSource_noClock = 0,
IfxAsclin_ClockSource_ascFastClock = 2,
IfxAsclin_ClockSource_ascSlowClock = 4
}
Selection of clock source
Definition in Ifx_ASCLIN.CSR.B.CLKSEL. More...
enum IfxAsclin_CtsInputSelect {
IfxAsclin_CtsInputSelect_0,
IfxAsclin_CtsInputSelect_1,
IfxAsclin_CtsInputSelect_2,
IfxAsclin_CtsInputSelect_3
}
CTS input pin selection
Definition in Ifx_ASCLIN.IOCR.B.CTS. More...
enum IfxAsclin_DataLength {
IfxAsclin_DataLength_1 = 0,
IfxAsclin_DataLength_2,
IfxAsclin_DataLength_3,
IfxAsclin_DataLength_4,
IfxAsclin_DataLength_5,
IfxAsclin_DataLength_6,
IfxAsclin_DataLength_7,
IfxAsclin_DataLength_8,
IfxAsclin_DataLength_9,
IfxAsclin_DataLength_10,
IfxAsclin_DataLength_11,
IfxAsclin_DataLength_12,
IfxAsclin_DataLength_13,
IfxAsclin_DataLength_14,
IfxAsclin_DataLength_15,
IfxAsclin_DataLength_16
}
Number of bits per transfer
Definition in Ifx_ASCLIN.FRAMECON.B.DATALEN. More...
enum IfxAsclin_FifoInterruptMode {
IfxAsclin_FifoInterruptMode_combined,
IfxAsclin_FifoInterruptMode_single,
IfxAsclin_FifoInterruptMode_batch
}
Defines the interrupt generation modes of Tx FIFO and Rx FIFO
Definition in Ifx_ASCLIN.RXFIFOCON.B.FM and Ifx_ASCLIN.TXFIFOCON.B.FM. More...
enum IfxAsclin_FrameMode {
IfxAsclin_FrameMode_initialise = 0,
IfxAsclin_FrameMode_asc = 1,
IfxAsclin_FrameMode_spi = 2,
IfxAsclin_FrameMode_lin = 3
}
Defines the basic operating mode of the module. Changing the mode must be done by switching first to initialize mode, and then to the other mode.
Definition in Ifx_ASCLIN.FRAMECON.B.MODE. More...
enum IfxAsclin_HeaderResponseSelect {
IfxAsclin_HeaderResponseSelect_headerAndResponse = 0,
IfxAsclin_HeaderResponseSelect_headerOnly = 1
}
Defines if LIN frame shall consist of a header and response or of a header only.
Definition in Ifx_ASCLIN.DATCON.B.HO. More...
enum IfxAsclin_IdleDelay {
IfxAsclin_IdleDelay_0,
IfxAsclin_IdleDelay_1,
IfxAsclin_IdleDelay_2,
IfxAsclin_IdleDelay_3,
IfxAsclin_IdleDelay_4,
IfxAsclin_IdleDelay_5,
IfxAsclin_IdleDelay_6,
IfxAsclin_IdleDelay_7
}
Defines the duration of the IDLE delay in bit times.
SPI mode: this is the idle time between the frames.
ASC and LIN mode: this is the pause inserted between transmission of bytes.
Definition in Ifx_ASCLIN.FRAMECON.B.IDLE. More...
enum IfxAsclin_LeadDelay {
IfxAsclin_LeadDelay_0,
IfxAsclin_LeadDelay_1,
IfxAsclin_LeadDelay_2,
IfxAsclin_LeadDelay_3,
IfxAsclin_LeadDelay_4,
IfxAsclin_LeadDelay_5,
IfxAsclin_LeadDelay_6,
IfxAsclin_LeadDelay_7
}
Defines the leading delay in bit times in SPI mode. ASC mode: not applicable.
LIN mode: delay between the end of the break and the start of the sync character.
Definition in Ifx_ASCLIN.FRAMECON.B.LEAD. More...
enum IfxAsclin_LinMode {
IfxAsclin_LinMode_slave = 0,
IfxAsclin_LinMode_master = 1
}
Configures if the module in LIN mode operates as master or slave
Definition in Ifx_ASCLIN.LIN.CON.B.MS. More...
enum IfxAsclin_LinResponseTimeoutMode {
IfxAsclin_LinResponseTimeoutMode_frameTimeout = 0,
IfxAsclin_LinResponseTimeoutMode_responseTimeout = 1
}
Defines the timeout threshold of RESPOSE bit is for LIN response timeout or LIN frame timeout.
Definition in Ifx_ASCLIN.DATCON.B.RM. More...
enum IfxAsclin_OversamplingFactor {
IfxAsclin_OversamplingFactor_4 = 3,
IfxAsclin_OversamplingFactor_5 = 4,
IfxAsclin_OversamplingFactor_6 = 5,
IfxAsclin_OversamplingFactor_7 = 6,
IfxAsclin_OversamplingFactor_8 = 7,
IfxAsclin_OversamplingFactor_9 = 8,
IfxAsclin_OversamplingFactor_10 = 9,
IfxAsclin_OversamplingFactor_11 = 10,
IfxAsclin_OversamplingFactor_12 = 11,
IfxAsclin_OversamplingFactor_13 = 12,
IfxAsclin_OversamplingFactor_14 = 13,
IfxAsclin_OversamplingFactor_15 = 14,
IfxAsclin_OversamplingFactor_16 = 15
}
Defines the bit length in ticks in the range of 1 to 16. The lengths of 1 to 3 are not allowed
Definition in Ifx_ASCLIN.BITCON.B.OVERSAMPLING. More...
enum IfxAsclin_ParityType {
IfxAsclin_ParityType_even = 0,
IfxAsclin_ParityType_odd = 1
}
Type of parity bit attached to data bits
Definition in Ifx_ASCLIN.FRAMECON.B.ODD. More...
enum IfxAsclin_ReceiveBufferMode {
IfxAsclin_ReceiveBufferMode_rxFifo = 0,
IfxAsclin_ReceiveBufferMode_rxBuffer = 1
}
Receive buffer mode
Definition in Ifx_ASCLIN.RXFIFOCON.B.BUF. More...
enum IfxAsclin_RtsCtsPolarity {
IfxAsclin_RtsCtsPolarity_activeHigh = 0,
IfxAsclin_RtsCtsPolarity_activeLow = 1
}
Polarity of the RTS and CTS signals
Definition in Ifx_ASCLIN.IOCR.B.RCPOL. More...
enum IfxAsclin_RxFifoInterruptLevel {
IfxAsclin_RxFifoInterruptLevel_1,
IfxAsclin_RxFifoInterruptLevel_2,
IfxAsclin_RxFifoInterruptLevel_3,
IfxAsclin_RxFifoInterruptLevel_4,
IfxAsclin_RxFifoInterruptLevel_5,
IfxAsclin_RxFifoInterruptLevel_6,
IfxAsclin_RxFifoInterruptLevel_7,
IfxAsclin_RxFifoInterruptLevel_8,
IfxAsclin_RxFifoInterruptLevel_9,
IfxAsclin_RxFifoInterruptLevel_10,
IfxAsclin_RxFifoInterruptLevel_11,
IfxAsclin_RxFifoInterruptLevel_12,
IfxAsclin_RxFifoInterruptLevel_13,
IfxAsclin_RxFifoInterruptLevel_14,
IfxAsclin_RxFifoInterruptLevel_15,
IfxAsclin_RxFifoInterruptLevel_16
}
Defines the filling level that triggers a drain (RX) interrupt or DMA access
Definition in Ifx_ASCLIN.RXFIFOCON.B.INTLEVEL. More...
enum IfxAsclin_RxFifoOutletWidth {
IfxAsclin_RxFifoOutletWidth_0,
IfxAsclin_RxFifoOutletWidth_1,
IfxAsclin_RxFifoOutletWidth_2,
IfxAsclin_RxFifoOutletWidth_3
}
Defines the number of bytes read from the Rx FIFO with one FPI bus read
Definition in Ifx_ASCLIN.RXFIFOCON.B.OUTW. More...
enum IfxAsclin_RxInputSelect {
IfxAsclin_RxInputSelect_0,
IfxAsclin_RxInputSelect_1,
IfxAsclin_RxInputSelect_2,
IfxAsclin_RxInputSelect_3,
IfxAsclin_RxInputSelect_4,
IfxAsclin_RxInputSelect_5,
IfxAsclin_RxInputSelect_6,
IfxAsclin_RxInputSelect_7
}
Alternate input selection for Rx signal.
Definition in Ifx_ASCLIN.IOCR.B.ALTI. More...
enum IfxAsclin_SamplePointPosition {
IfxAsclin_SamplePointPosition_1 = 1,
IfxAsclin_SamplePointPosition_2 = 2,
IfxAsclin_SamplePointPosition_3 = 3,
IfxAsclin_SamplePointPosition_4 = 4,
IfxAsclin_SamplePointPosition_5 = 5,
IfxAsclin_SamplePointPosition_6 = 6,
IfxAsclin_SamplePointPosition_7 = 7,
IfxAsclin_SamplePointPosition_8 = 8,
IfxAsclin_SamplePointPosition_9 = 9,
IfxAsclin_SamplePointPosition_10 = 10,
IfxAsclin_SamplePointPosition_11 = 11,
IfxAsclin_SamplePointPosition_12 = 12,
IfxAsclin_SamplePointPosition_13 = 13,
IfxAsclin_SamplePointPosition_14 = 14,
IfxAsclin_SamplePointPosition_15 = 15
}
Sample point position
Definition in Ifx_ASCLIN.BITCON.B.SAMPLEPOINT. More...
enum IfxAsclin_SamplesPerBit {
IfxAsclin_SamplesPerBit_one = 0,
IfxAsclin_SamplesPerBit_three = 1
}
Number of samples per bit, sample mode/medianfilter
Definition in Ifx_ASCLIN.BITCON.B.SM. More...
enum IfxAsclin_ShiftDirection {
IfxAsclin_ShiftDirection_lsbFirst = 0,
IfxAsclin_ShiftDirection_msbFirst = 1
}
SPI mode: defines the shift direction of the shift register.
ASC and LIN mode: should be set to 0.
Definition in Ifx_ASCLIN.FRAMECON.B.MSB. More...
enum IfxAsclin_SlavePolarity {
IfxAsclin_SlavePolarity_idleLow = 0,
IfxAsclin_SlavePolarity_idlehigh = 1
}
Defines the idle level of the SLSO signal, which is the level.
Outside the data transmission, leading and trailing time intervals.
Definition in Ifx_ASCLIN.IOCR.B.SPOL. More...
enum IfxAsclin_SleepMode {
IfxAsclin_SleepMode_enable = 0,
IfxAsclin_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_ASCLIN.CLC.B.EDIS. More...
enum IfxAsclin_Status {
IfxAsclin_Status_configurationError = 0,
IfxAsclin_Status_noError = 1
}
Error status. More...
enum IfxAsclin_StopBit {
IfxAsclin_StopBit_0,
IfxAsclin_StopBit_1,
IfxAsclin_StopBit_2,
IfxAsclin_StopBit_3,
IfxAsclin_StopBit_4,
IfxAsclin_StopBit_5,
IfxAsclin_StopBit_6,
IfxAsclin_StopBit_7
}
ASC and LIN mode: number of stop bits (0 is not allowed), SPI mode: trailing delay.
Definition in Ifx_ASCLIN.FRAMECON.B.STOP. More...
enum IfxAsclin_SuspendMode {
IfxAsclin_SuspendMode_none = 0,
IfxAsclin_SuspendMode_hard = 1,
IfxAsclin_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxAsclin_TxFifoInletWidth {
IfxAsclin_TxFifoInletWidth_0,
IfxAsclin_TxFifoInletWidth_1,
IfxAsclin_TxFifoInletWidth_2,
IfxAsclin_TxFifoInletWidth_3
}
Defines the number of bytes written to the Tx FIFO with one FPI bus write
Definition in Ifx_ASCLIN.TXFIFOCON.B.INW. More...
enum IfxAsclin_TxFifoInterruptLevel {
IfxAsclin_TxFifoInterruptLevel_0,
IfxAsclin_TxFifoInterruptLevel_1,
IfxAsclin_TxFifoInterruptLevel_2,
IfxAsclin_TxFifoInterruptLevel_3,
IfxAsclin_TxFifoInterruptLevel_4,
IfxAsclin_TxFifoInterruptLevel_5,
IfxAsclin_TxFifoInterruptLevel_6,
IfxAsclin_TxFifoInterruptLevel_7,
IfxAsclin_TxFifoInterruptLevel_8,
IfxAsclin_TxFifoInterruptLevel_9,
IfxAsclin_TxFifoInterruptLevel_10,
IfxAsclin_TxFifoInterruptLevel_11,
IfxAsclin_TxFifoInterruptLevel_12,
IfxAsclin_TxFifoInterruptLevel_13,
IfxAsclin_TxFifoInterruptLevel_14,
IfxAsclin_TxFifoInterruptLevel_15
}
Defines the filling level that triggers a refill (TX) interrupt or DMA access
Definition in Ifx_ASCLIN.TXFIFOCON.B.INTLEVEL. More...

Functions

IFX_INLINE void | IfxAsclin_clearAllFlags (Ifx_ASCLIN *asclin)
clears all the flags More...
IFX_INLINE void | IfxAsclin_clearBreakDetectedFlag (Ifx_ASCLIN *asclin)
Clears the break detected flag. More...
IFX_INLINE void | IfxAsclin_clearCollisionDetectionErrorFlag (Ifx_ASCLIN *asclin)
Clears the collision detection error flag. More...
IFX_INLINE void | IfxAsclin_clearFallingEdgeDetectedFlag (Ifx_ASCLIN *asclin)
Clears the falling edge detected flag. More...
IFX_INLINE void | IfxAsclin_clearFrameErrorFlag (Ifx_ASCLIN *asclin)
Clears the frame error flag. More...
IFX_INLINE void | IfxAsclin_clearHeaderTimeoutFlag (Ifx_ASCLIN *asclin)
Clears the header timeout flag. More...
IFX_INLINE void | IfxAsclin_clearKernelResetStatus (Ifx_ASCLIN *asclin)
Clears the kernel reset status. More...
IFX_INLINE void | IfxAsclin_clearLinAutoBaudDetectionErrorFlag (Ifx_ASCLIN *asclin)
Clears the auto baudrate detection error flag. More...
IFX_INLINE void | IfxAsclin_clearLinChecksumErrorFlag (Ifx_ASCLIN *asclin)
Clears the LIN checksum error flag. More...
IFX_INLINE void | IfxAsclin_clearLinParityErrorFlag (Ifx_ASCLIN *asclin)
Clears the LIN parity error flag. More...
IFX_INLINE void | IfxAsclin_clearParityErrorFlag (Ifx_ASCLIN *asclin)
Clears the parity error flag. More...
IFX_INLINE void | IfxAsclin_clearRaisingEdgeDetectedFlag (Ifx_ASCLIN *asclin)
Clears the raising edge detected flag. More...
IFX_INLINE void | IfxAsclin_clearResponseTimeoutFlag (Ifx_ASCLIN *asclin)
Clears the response timeout flag. More...
IFX_INLINE void | IfxAsclin_clearRxFifoFillLevelFlag (Ifx_ASCLIN *asclin)
Clears the Rx FIFO level flag. More...
IFX_INLINE void | IfxAsclin_clearRxFifoOverflowFlag (Ifx_ASCLIN *asclin)
Clears the Rx FIFO overflow flag. More...
IFX_INLINE void | IfxAsclin_clearRxFifoUnderflowFlag (Ifx_ASCLIN *asclin)
Clears the Rx FIFO underflow flag. More...
IFX_INLINE void | IfxAsclin_clearRxHeaderEndFlag (Ifx_ASCLIN *asclin)
Clears the receive header end flag. More...
IFX_INLINE void | IfxAsclin_clearRxResponseEndFlag (Ifx_ASCLIN *asclin)
Clears the receive response end flag. More...
IFX_INLINE void | IfxAsclin_clearTransmissionCompletedFlag (Ifx_ASCLIN *asclin)
Clears the transmission pending flag. More...
IFX_INLINE void | IfxAsclin_clearTxFifoFillLevelFlag (Ifx_ASCLIN *asclin)
Clears the Tx FIFO level flag. More...
IFX_INLINE void | IfxAsclin_clearTxFifoOverflowFlag (Ifx_ASCLIN *asclin)
Clears the Tx FIFO overflow flag. More...
IFX_INLINE void | IfxAsclin_clearTxHeaderEndFlag (Ifx_ASCLIN *asclin)
Clears the transmit header end flag. More...
IFX_INLINE void | IfxAsclin_clearTxResponseEndFlag (Ifx_ASCLIN *asclin)
Clears the transmit response end flag. More...
IFX_INLINE void | IfxAsclin_flushRxFifo (Ifx_ASCLIN *asclin)
Flushes (empties) the Rx FIFO. More...
IFX_INLINE void | IfxAsclin_flushTxFifo (Ifx_ASCLIN *asclin)
Flushes (empties) the Tx FIFO. More...
IFX_INLINE void | IfxAsclin_setBrdLowerlimt (Ifx_ASCLIN *asclin, uint8 limit)
Sets the baudrate detection's lower limit. More...
IFX_INLINE void | IfxAsclin_setBrdUpperlimt (Ifx_ASCLIN *asclin, uint8 limit)
Sets the baudrate detection's upper limit. More...
IFX_INLINE void | IfxAsclin_setChecksumInjection (Ifx_ASCLIN *asclin, IfxAsclin_ChecksumInjection csi)
Sets the checksum injection. More...
IFX_INLINE void | IfxAsclin_setChecksumMode (Ifx_ASCLIN *asclin, IfxAsclin_Checksum mode)
Sets the checksum mode. More...
IFX_INLINE void | IfxAsclin_setDataLength (Ifx_ASCLIN *asclin, IfxAsclin_DataLength length)
Sets the data length (number of bits per transfer) More...
IFX_INLINE void | IfxAsclin_setDenominator (Ifx_ASCLIN *asclin, uint16 denominator)
Sets the denominator of the fractional divider. More...
IFX_INLINE void | IfxAsclin_setDisableModuleRequest (Ifx_ASCLIN *asclin)
Sets the disable module request. More...
IFX_INLINE void | IfxAsclin_setEnableModuleRequest (Ifx_ASCLIN *asclin)
Sets the enable module request. More...
IFX_INLINE void | IfxAsclin_setFilterDepth (Ifx_ASCLIN *asclin, uint8 depth)
Sets digital glitch filter depth. More...
IFX_INLINE void | IfxAsclin_setHeaderResponseSelect (Ifx_ASCLIN *asclin, IfxAsclin_HeaderResponseSelect type)
Sets the header response selection. More...
IFX_INLINE void | IfxAsclin_setIdleDelay (Ifx_ASCLIN *asclin, IfxAsclin_IdleDelay delay)
Sets the idle delay. More...
IFX_INLINE void | IfxAsclin_setKernelResetOne (Ifx_ASCLIN *asclin)
Sets the kernal reset of the KRST1. More...
IFX_INLINE void | IfxAsclin_setKernelResetZero (Ifx_ASCLIN *asclin)
Sets the kernel reset of the KRST0. More...
IFX_INLINE void | IfxAsclin_setLeadDelay (Ifx_ASCLIN *asclin, IfxAsclin_LeadDelay delay)
Sets the lead delay. More...
IFX_INLINE void | IfxAsclin_setLinBreakLength (Ifx_ASCLIN *asclin, uint8 length)
Sets the LIN break length. More...
IFX_INLINE void | IfxAsclin_setLinHeaderTimeout (Ifx_ASCLIN *asclin, uint8 timeout)
Sets the LIN header timeout. More...
IFX_INLINE void | IfxAsclin_setLinMode (Ifx_ASCLIN *asclin, IfxAsclin_LinMode mode)
Sets the LIN mode of operation. More...
IFX_INLINE void | IfxAsclin_setLinResponseTimeoutMode (Ifx_ASCLIN *asclin, IfxAsclin_LinResponseTimeoutMode mode)
Sets the LIN response timeout mode. More...
IFX_INLINE void | IfxAsclin_setLinResponseTimeoutThreshold (Ifx_ASCLIN *asclin, uint16 threshold)
Sets the LIN response timeout threshold. More...
IFX_INLINE void | IfxAsclin_setNumerator (Ifx_ASCLIN *asclin, uint16 numerator)
Sets the numerator of the fractional divider. More...
IFX_INLINE void | IfxAsclin_setOversampling (Ifx_ASCLIN *asclin, IfxAsclin_OversamplingFactor ovsFactor)
Sets the division ratio of the baudrate post divider. More...
IFX_INLINE void | IfxAsclin_setParityType (Ifx_ASCLIN *asclin, IfxAsclin_ParityType type)
Sets the parity type. More...
IFX_INLINE void | IfxAsclin_setPrescaler (Ifx_ASCLIN *asclin, uint16 prescaler)
Sets the division ratio of the predivider (prescaler) More...
IFX_INLINE void | IfxAsclin_setRxBufferMode (Ifx_ASCLIN *asclin, IfxAsclin_ReceiveBufferMode mode)
Sets the receive buffer mode. More...
IFX_INLINE void | IfxAsclin_setRxFifoInterruptLevel (Ifx_ASCLIN *asclin, IfxAsclin_RxFifoInterruptLevel level)
Sets the Tx FIFO interrupt level. More...
IFX_INLINE void | IfxAsclin_setRxFifoOutletWidth (Ifx_ASCLIN *asclin, IfxAsclin_RxFifoOutletWidth width)
Sets the receive FIFO outlet width. More...
IFX_INLINE void | IfxAsclin_setSampleMode (Ifx_ASCLIN *asclin, IfxAsclin_SamplesPerBit medianFilter)
Sets the sample mode (number of samples per bit / median filter) More...
IFX_INLINE void | IfxAsclin_setSamplePointPosition (Ifx_ASCLIN *asclin, IfxAsclin_SamplePointPosition spPosition)
Sets the sampling point position. More...
IFX_INLINE void | IfxAsclin_setShiftDirection (Ifx_ASCLIN *asclin, IfxAsclin_ShiftDirection dir)
Sets the shift direction. More...
IFX_INLINE void | IfxAsclin_setStopBit (Ifx_ASCLIN *asclin, IfxAsclin_StopBit stopBit)
Sets the number of stop bits. More...
IFX_INLINE void | IfxAsclin_setTransmitHeaderRequestFlag (Ifx_ASCLIN *asclin)
Sets the transmit header request flag. More...
IFX_INLINE void | IfxAsclin_setTransmitResponseRequestFlag (Ifx_ASCLIN *asclin)
Sets the transmit response request flag. More...
IFX_INLINE void | IfxAsclin_setTransmitWakeRequestFlag (Ifx_ASCLIN *asclin)
Sets the transmission wake request flag. More...
IFX_INLINE void | IfxAsclin_setTxFifoInletWidth (Ifx_ASCLIN *asclin, IfxAsclin_TxFifoInletWidth width)
Sets the transmit FIFO inlet width. More...
IFX_INLINE void | IfxAsclin_setTxFifoInterruptLevel (Ifx_ASCLIN *asclin, IfxAsclin_TxFifoInterruptLevel level)
Sets the Tx FIFO interrupt level. More...
IFX_INLINE boolean | IfxAsclin_getBreakDetectedFlagStatus (Ifx_ASCLIN *asclin)
Returns the break detected flag status. More...
IFX_INLINE uint8 | IfxAsclin_getClockSource (Ifx_ASCLIN *asclin)
Returns the clock source. More...
IFX_INLINE boolean | IfxAsclin_getClockStatus (Ifx_ASCLIN *asclin)
Returns the clock status. More...
IFX_INLINE boolean | IfxAsclin_getCollisionDetectionErrorFlagStatus (Ifx_ASCLIN *asclin)
Returns the collision detection error flag status. More...
IFX_INLINE boolean | IfxAsclin_getFallingEdgeDetectedFlagStatus (Ifx_ASCLIN *asclin)
Returns the falling edge detected flag status. More...
IFX_INLINE boolean | IfxAsclin_getFrameErrorFlagStatus (Ifx_ASCLIN *asclin)
Returns the frame error flag status. More...
IFX_INLINE boolean | IfxAsclin_getHeaderTimeoutFlagStatus (Ifx_ASCLIN *asclin)
Returns the header timeout flag status. More...
IFX_INLINE boolean | IfxAsclin_getKernelResetStatus (Ifx_ASCLIN *asclin)
Returns the kernel reset status. More...
IFX_INLINE boolean | IfxAsclin_getLinAutoBaudDetectionErrorFlagStatus (Ifx_ASCLIN *asclin)
Returns the LIN auto baudrate detection error flag status. More...
IFX_INLINE boolean | IfxAsclin_getLinChecksumErrorFlagStatus (Ifx_ASCLIN *asclin)
Returns the LIN checksum error flag status. More...
IFX_INLINE boolean | IfxAsclin_getLinParityErrorFlagStatus (Ifx_ASCLIN *asclin)
Returns the LIN parity error flag status. More...
IFX_INLINE boolean | IfxAsclin_getModuleStatus (Ifx_ASCLIN *asclin)
Returns the module status. More...
IFX_INLINE boolean | IfxAsclin_getParityErrorFlagStatus (Ifx_ASCLIN *asclin)
Returns the parity error flag status. More...
IFX_INLINE uint16 | IfxAsclin_getPrescaler (Ifx_ASCLIN *asclin)
Returns the division ratio of the predivider (prescaler) More...
IFX_INLINE boolean | IfxAsclin_getRaisingEdgeDetectedFlagStatus (Ifx_ASCLIN *asclin)
Returns the raising edge detected flag status. More...
IFX_INLINE boolean | IfxAsclin_getReceiveSignalStatus (Ifx_ASCLIN *asclin)
Returns the received signal status. More...
IFX_INLINE boolean | IfxAsclin_getResponseTimeoutFlagStatus (Ifx_ASCLIN *asclin)
Returns the response timeout flag status. More...
IFX_INLINE uint8 | IfxAsclin_getRxFifoFillLevel (Ifx_ASCLIN *asclin)
Returns the current filling level of Tx FIFO. More...
IFX_INLINE boolean | IfxAsclin_getRxFifoFillLevelFlagStatus (Ifx_ASCLIN *asclin)
Returns the Rx FIFO level flag status. More...
IFX_INLINE uint8 | IfxAsclin_getRxFifoOutletWidth (Ifx_ASCLIN *asclin)
Returns the receive FIFO inlet width. More...
IFX_INLINE boolean | IfxAsclin_getRxFifoOverflowFlagStatus (Ifx_ASCLIN *asclin)
Returns the Rx FIFO overflow flag status. More...
IFX_INLINE boolean | IfxAsclin_getRxFifoUnderflowFlagStatus (Ifx_ASCLIN *asclin)
Returns the Rx FIFO underflow flag status. More...
IFX_INLINE boolean | IfxAsclin_getRxHeaderEndFlagStatus (Ifx_ASCLIN *asclin)
Returns the receive header end flag status. More...
IFX_INLINE boolean | IfxAsclin_getRxResponseEndFlagStatus (Ifx_ASCLIN *asclin)
Returns the receive response end flag status. More...
IFX_INLINE boolean | IfxAsclin_getTransmissionCompletedFlagStatus (Ifx_ASCLIN *asclin)
Returns the transmission pending flag status. More...
IFX_INLINE boolean | IfxAsclin_getTransmitSignalStatus (Ifx_ASCLIN *asclin)
Returns the transmit signal status. More...
IFX_INLINE uint8 | IfxAsclin_getTxFifoFillLevel (Ifx_ASCLIN *asclin)
Returns the current filling level of Tx FIFO. More...
IFX_INLINE boolean | IfxAsclin_getTxFifoFillLevelFlagStatus (Ifx_ASCLIN *asclin)
Returns the Tx FIFO level flag status. More...
IFX_INLINE uint8 | IfxAsclin_getTxFifoInletWidth (Ifx_ASCLIN *asclin)
Returns the transmit FIFO inlet width. More...
IFX_INLINE boolean | IfxAsclin_getTxFifoOverflowFlagStatus (Ifx_ASCLIN *asclin)
Returns the Tx FIFO overflow flag status. More...
IFX_INLINE boolean | IfxAsclin_getTxHeaderEndFlagStatus (Ifx_ASCLIN *asclin)
Returns the transmit header end flag status. More...
IFX_INLINE boolean | IfxAsclin_getTxResponseEndFlagStatus (Ifx_ASCLIN *asclin)
Returns the transmit response end flag status. More...
IFX_INLINE void | IfxAsclin_setSleepMode (Ifx_ASCLIN *asclin, IfxAsclin_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_EXTERN Ifx_ASCLIN * | IfxAsclin_getAddress (IfxAsclin_Index asclin)
API to get the address for ASCLIN HW module register memory map. More...
IFX_EXTERN float32 | IfxAsclin_getFaFrequency (Ifx_ASCLIN *asclin)
Returns the ASCLIN module FA frequency in Hz. More...
IFX_EXTERN IfxAsclin_Index | IfxAsclin_getIndex (Ifx_ASCLIN *asclin)
API to get the resource index of the ASCLIN specified. More...
IFX_EXTERN float32 | IfxAsclin_getOvsFrequency (Ifx_ASCLIN *asclin)
Returns the OVS frequency. More...
IFX_EXTERN float32 | IfxAsclin_getPdFrequency (Ifx_ASCLIN *asclin)
Returns the PD frequency. More...
IFX_EXTERN float32 | IfxAsclin_getShiftFrequency (Ifx_ASCLIN *asclin)
Returns the SHIFT frequency. More...
IFX_EXTERN void | IfxAsclin_resetModule (Ifx_ASCLIN *asclin)
resets Asclin kernel More...
IFX_INLINE void | IfxAsclin_disableAllFlags (Ifx_ASCLIN *asclin)
disables all flags More...
IFX_INLINE void | IfxAsclin_enableAutoBaudrateDetection (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the auto baudrate detection. More...
IFX_INLINE void | IfxAsclin_enableBreakDetectedFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables break detected flag. More...
IFX_INLINE void | IfxAsclin_enableCollisionDetection (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the collision detection. More...
IFX_INLINE void | IfxAsclin_enableCollisionDetectionErrorFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables LIN collision detection error flag. More...
IFX_INLINE void | IfxAsclin_enableCts (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables CTS. More...
IFX_INLINE void | IfxAsclin_enableFallingEdgeDetectedFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables falling edge detected flag. More...
IFX_INLINE void | IfxAsclin_enableFrameErrorFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables frame error flag. More...
IFX_INLINE void | IfxAsclin_enableHardwareChecksum (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the hardware checksum. More...
IFX_INLINE void | IfxAsclin_enableHeaderTimeoutFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables header timeout flag. More...
IFX_INLINE void | IfxAsclin_enableLinAutoBaudDetectionErrorFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables LIN auto baudrate detection error flag. More...
IFX_INLINE void | IfxAsclin_enableLinChecksumErrorFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables LIN checksum error flag. More...
IFX_INLINE void | IfxAsclin_enableLinParityErrorFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables LIN parity error flag. More...
IFX_INLINE void | IfxAsclin_enableLoopBackMode (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the loop back mode. More...
IFX_INLINE void | IfxAsclin_enableParity (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the parity bit attachment to tha data bits. More...
IFX_INLINE void | IfxAsclin_enableParityErrorFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables parity error flag. More...
IFX_INLINE void | IfxAsclin_enableRaisingEdgeDetectedFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables raising edge detected flag. More...
IFX_INLINE void | IfxAsclin_enableResponseTimeoutFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables response timeout flag. More...
IFX_INLINE void | IfxAsclin_enableRxFifoFillLevelFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Rx FIFO level flag. More...
IFX_INLINE void | IfxAsclin_enableRxFifoInlet (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the receive FIFO outlet to allow filling of Rx FIFO through shift register. More...
IFX_INLINE void | IfxAsclin_enableRxFifoOverflowFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Rx FIFO overflow flag. More...
IFX_INLINE void | IfxAsclin_enableRxFifoUnderflowFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Rx FIFO underflow flag. More...
IFX_INLINE void | IfxAsclin_enableRxHeaderEndFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables receive header end flag. More...
IFX_INLINE void | IfxAsclin_enableRxResponseEndFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables receive response end flag. More...
IFX_INLINE void | IfxAsclin_enableTransmissionCompletedFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables transmission completed flag. More...
IFX_INLINE void | IfxAsclin_enableTxFifoFillLevelFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Tx FIFO level flag. More...
IFX_INLINE void | IfxAsclin_enableTxFifoOutlet (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the transmit FIFO outlet to allow transmission. More...
IFX_INLINE void | IfxAsclin_enableTxFifoOverflowFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Tx FIFO overflow flag. More...
IFX_INLINE void | IfxAsclin_enableTxHeaderEndFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables transmit header end flag. More...
IFX_INLINE void | IfxAsclin_enableTxResponseEndFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables transmit response end flag. More...
IFX_INLINE boolean | IfxAsclin_isModuleSuspended (Ifx_ASCLIN *asclin)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxAsclin_setClockPolarity (Ifx_ASCLIN *asclin, IfxAsclin_ClockPolarity cpol)
Selects the clock polarity. More...
IFX_INLINE void | IfxAsclin_setCtsInput (Ifx_ASCLIN *asclin, IfxAsclin_CtsInputSelect ctsi)
Selects the CTS input pin. More...
IFX_INLINE void | IfxAsclin_setFrameMode (Ifx_ASCLIN *asclin, IfxAsclin_FrameMode mode)
Selects the module's mode of operation. More...
IFX_INLINE void | IfxAsclin_setRtsCtsPolarity (Ifx_ASCLIN *asclin, IfxAsclin_RtsCtsPolarity rcpol)
Selects the RTS/CTS polarity. More...
IFX_INLINE void | IfxAsclin_setRxFifoInterruptMode (Ifx_ASCLIN *asclin, IfxAsclin_FifoInterruptMode mode)
Selects the Rx FIFO interupt generation mode. More...
IFX_INLINE void | IfxAsclin_setRxInput (Ifx_ASCLIN *asclin, IfxAsclin_RxInputSelect alti)
Selects the alternate input for Rx signal. More...
IFX_INLINE void | IfxAsclin_setSlavePolarity (Ifx_ASCLIN *asclin, IfxAsclin_SlavePolarity spol)
Selects the slave polarity. More...
IFX_INLINE void | IfxAsclin_setSuspendMode (Ifx_ASCLIN *asclin, IfxAsclin_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_INLINE void | IfxAsclin_setTxFifoInterruptMode (Ifx_ASCLIN *asclin, IfxAsclin_FifoInterruptMode mode)
Selects the Tx FIFO interupt generation mode. More...
IFX_EXTERN boolean | IfxAsclin_setBitTiming (Ifx_ASCLIN *asclin, float32 baudrate, IfxAsclin_OversamplingFactor oversampling, IfxAsclin_SamplePointPosition samplepoint, IfxAsclin_SamplesPerBit medianFilter)
Set the bit timing. More...
IFX_EXTERN void | IfxAsclin_disableModule (Ifx_ASCLIN *asclin)
Disables the module. More...
IFX_EXTERN void | IfxAsclin_enableAscErrorFlags (Ifx_ASCLIN *asclin, boolean parEnable, boolean rfoEnable)
Enables the ASC error interrupt Flags. More...
IFX_EXTERN void | IfxAsclin_enableModule (Ifx_ASCLIN *asclin)
Enables the module. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxAsclin_getSrcPointerEr (Ifx_ASCLIN *asclin)
Returns the SRC pointer for ERR. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxAsclin_getSrcPointerRx (Ifx_ASCLIN *asclin)
Returns the SRC pointer for Rx. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxAsclin_getSrcPointerTx (Ifx_ASCLIN *asclin)
Returns the SRC pointer for Tx. More...
IFX_EXTERN uint32 | IfxAsclin_read16 (Ifx_ASCLIN *asclin, uint16 *data, uint32 count)
Reads data up to 16 bits. More...
IFX_EXTERN uint32 | IfxAsclin_read32 (Ifx_ASCLIN *asclin, uint32 *data, uint32 count)
Reads data up to 32 bits. More...
IFX_EXTERN uint32 | IfxAsclin_read8 (Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
Reads data up to 8 bits. More...
IFX_EXTERN void | IfxAsclin_setBaudrateBitFields (Ifx_ASCLIN *asclin, uint16 prescaler, uint16 numerator, uint16 denominator, IfxAsclin_OversamplingFactor oversampling)
Sets the baudrate bit fields. More...
IFX_EXTERN void | IfxAsclin_setClockSource (Ifx_ASCLIN *asclin, IfxAsclin_ClockSource clockSource)
Sets the clock source. More...
IFX_EXTERN uint32 | IfxAsclin_write16 (Ifx_ASCLIN *asclin, uint16 *data, uint32 count)
Writes data up to 16 bits. More...
IFX_EXTERN uint32 | IfxAsclin_write32 (Ifx_ASCLIN *asclin, uint32 *data, uint32 count)
Writes data up to 32 bits. More...
IFX_EXTERN uint32 | IfxAsclin_write8 (Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
Writes data up to 8 bits. More...
IFX_INLINE void | IfxAsclin_initCtsPin (const IfxAsclin_Cts_In *cts, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a CTS input. More...
IFX_INLINE void | IfxAsclin_initRtsPin (const IfxAsclin_Rts_Out *rts, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a RTS output. More...
IFX_INLINE void | IfxAsclin_initRxPin (const IfxAsclin_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a RX input. More...
IFX_INLINE void | IfxAsclin_initSclkPin (const IfxAsclin_Sclk_Out *sclk, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a SCLK output. More...
IFX_INLINE void | IfxAsclin_initSlsoPin (const IfxAsclin_Slso_Out *slso, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a SLSO output. More...
IFX_INLINE void | IfxAsclin_initTxPin (const IfxAsclin_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a TX output. More...
IFX_INLINE uint32 | IfxAsclin_readRxData (Ifx_ASCLIN *asclin)
IFX_INLINE void | IfxAsclin_writeTxData (Ifx_ASCLIN *asclin, uint32 data)
IFX_INLINE uint16 | IfxAsclin_getAllErrorFlagsStatus (Ifx_ASCLIN *asclin)
Returns the status of all error flags. More...

Detailed Description

ASCLIN basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxAsclin.h.

Function Documentation

◆ IfxAsclin_getAllErrorFlagsStatus()

IFX_INLINE uint16 IfxAsclin_getAllErrorFlagsStatus ( Ifx_ASCLIN * asclin )

Returns the status of all error flags.

Parameters
asclin pointer to ASCLIN registers
Returns
status

Definition at line 2491 of file IfxAsclin.h.

◆ IfxAsclin_readRxData()

IFX_INLINE uint32 IfxAsclin_readRxData ( Ifx_ASCLIN * asclin )
Parameters
asclin pointer to ASCLIN registers
Returns
returns the value of RxDATA register

Definition at line 2201 of file IfxAsclin.h.

Referenced by IfxAsclin_Spi_read().

◆ IfxAsclin_writeTxData()

IFX_INLINE void IfxAsclin_writeTxData | ( | Ifx_ASCLIN * | asclin,
 |  | uint32 | data
 | ) |  |
Parameters
asclin | pointer to ASCLIN registers
data | data to be written
Returns
None

Definition at line 2485 of file IfxAsclin.h.

Referenced by IfxAsclin_Spi_write().


iLLD_TC38A: CAN

Modules | Files
CAN
iLLD
Collaboration diagram for CAN:

Modules

Implementation Interface
Standard Interface
CAN Pin Mapping
How to use the CAN Interface driver?
CAN Interface Driver

Files

file | IfxCan_cfg.h
CAN on-chip implementation data.
file | IfxCan_PinMap.c
CAN I/O map.
file | IfxCan_PinMap.h
CAN I/O map.
file | IfxCan_Can.h
CAN CAN details.
file | IfxCan.h
CAN basic functionality.

Detailed Description


iLLD_TC38A: Implementation Interface

Modules
Implementation Interface
iLLD » CAN
Collaboration diagram for Implementation Interface:

Modules

Enumerations

Detailed Description


iLLD_TC38A: Enumerations

Enumerations
Enumerations
iLLD » CAN » Implementation Interface
Collaboration diagram for Enumerations:

Enumerations

enum IfxCan_Index {
IfxCan_Index_none = -1,
IfxCan_Index_0 = 0,
IfxCan_Index_1,
IfxCan_Index_2
}
List of the available can resources. More...
enum IfxCan_NodeId {
IfxCan_NodeId_none = -1,
IfxCan_NodeId_0,
IfxCan_NodeId_1,
IfxCan_NodeId_2,
IfxCan_NodeId_3
}
CAN Node number. More...

Detailed Description

Enumeration Type Documentation

◆ IfxCan_Index

enum IfxCan_Index

List of the available can resources.

Enumerator
IfxCan_Index_none | Not Selected.
IfxCan_Index_0 | CAN index 0.
IfxCan_Index_1 | CAN index 1.
IfxCan_Index_2 | CAN index 2.

Definition at line 83 of file IfxCan_cfg.h.

◆ IfxCan_NodeId

enum IfxCan_NodeId

CAN Node number.

Enumerator
IfxCan_NodeId_none | None of the CAN Nodes.
IfxCan_NodeId_0 | Node Id 0.
IfxCan_NodeId_1 | Node Id 1.
IfxCan_NodeId_2 | Node Id 2.
IfxCan_NodeId_3 | Node Id 3.

Definition at line 93 of file IfxCan_cfg.h.


iLLD_TC38A: Standard Interface

Modules
Standard Interface
iLLD » CAN
Collaboration diagram for Standard Interface:

Modules

Enumerations
Data Structures
Node Functions
Tx Element Functions
Rx Element Functions
Filter Functions
Interrupt Functions
Module Functions
Tx Event FIFO Element Functions

Detailed Description


iLLD_TC38A: Enumerations

Enumerations
Enumerations
iLLD » CAN » Standard Interface
Collaboration diagram for Enumerations:

Enumerations

enum IfxCan_CanNodeErrorWarningLimitStatus {
IfxCan_CanNodeErrorWarningLimitStatus_notReached = 0,
IfxCan_CanNodeErrorWarningLimitStatus_reached = 1
}
Status of warning limit for error counters in CAN node. More...
enum IfxCan_ClockSelect {
IfxCan_ClockSelect_0,
IfxCan_ClockSelect_1,
IfxCan_ClockSelect_2,
IfxCan_ClockSelect_3
}
Clock selection option
Description in Ifx_CAN.MCR.CLKSELx, (x = 0,1,2) More...
enum IfxCan_ClockSource {
IfxCan_ClockSource_noClock = 0,
IfxCan_ClockSource_asynchronous = 1,
IfxCan_ClockSource_synchronous = 2,
IfxCan_ClockSource_both = 3
}
Type of Clock Source selection
Description in Ifx_CAN.MCR.CLKSELx, (x = 0,1,2) More...
enum IfxCan_DataFieldSize {
IfxCan_DataFieldSize_8,
IfxCan_DataFieldSize_12,
IfxCan_DataFieldSize_16,
IfxCan_DataFieldSize_20,
IfxCan_DataFieldSize_24,
IfxCan_DataFieldSize_32,
IfxCan_DataFieldSize_48,
IfxCan_DataFieldSize_64
}
Data Field Size
Definition in Ifx_CAN.N[x]TX.ESC.B.TBDS, Ifx_CAN.N[x].RX.ESC.B.RBDS, Ifx_CAN.N[x].RX.ESC.B.FyDS (x= 0,1,2,3; y = 0, 1) More...
enum IfxCan_DataLengthCode {
IfxCan_DataLengthCode_0,
IfxCan_DataLengthCode_1,
IfxCan_DataLengthCode_2,
IfxCan_DataLengthCode_3,
IfxCan_DataLengthCode_4,
IfxCan_DataLengthCode_5,
IfxCan_DataLengthCode_6,
IfxCan_DataLengthCode_7,
IfxCan_DataLengthCode_8,
IfxCan_DataLengthCode_12,
IfxCan_DataLengthCode_16,
IfxCan_DataLengthCode_20,
IfxCan_DataLengthCode_24,
IfxCan_DataLengthCode_32,
IfxCan_DataLengthCode_48,
IfxCan_DataLengthCode_64
}
Data Length code of the Message. More...
enum IfxCan_FilterElementConfiguration {
IfxCan_FilterElementConfiguration_disable,
IfxCan_FilterElementConfiguration_storeInRxFifo0,
IfxCan_FilterElementConfiguration_storeInRxFifo1,
IfxCan_FilterElementConfiguration_rejectId,
IfxCan_FilterElementConfiguration_setPriority,
IfxCan_FilterElementConfiguration_setPriorityAndStoreInFifo0,
IfxCan_FilterElementConfiguration_setPriorityAndStoreInFifo1,
IfxCan_FilterElementConfiguration_storeInRxBuffer
}
Filter Element Configuration. More...
enum IfxCan_FilterType {
IfxCan_FilterType_range,
IfxCan_FilterType_dualId,
IfxCan_FilterType_classic,
IfxCan_FilterType_none
}
Filter Type. More...
enum IfxCan_FrameMode {
IfxCan_FrameMode_standard,
IfxCan_FrameMode_fdLong,
IfxCan_FrameMode_fdLongAndFast
}
CAN Frame mode
Description in Ifx_CAN.N[x].CCCR.CME, (x= 0 to 3) More...
enum IfxCan_FrameType {
IfxCan_FrameType_receive,
IfxCan_FrameType_transmit,
IfxCan_FrameType_transmitAndReceive,
IfxCan_FrameType_remoteRequest,
IfxCan_FrameType_remoteAnswer
}
CAN frame type. More...
enum IfxCan_Interrupt {
IfxCan_Interrupt_rxFifo0NewMessage,
IfxCan_Interrupt_rxFifo0WatermarkReached,
IfxCan_Interrupt_rxFifo0Full,
IfxCan_Interrupt_rxFifo0MessageLost,
IfxCan_Interrupt_rxFifo1NewMessage,
IfxCan_Interrupt_rxFifo1WatermarkReached,
IfxCan_Interrupt_rxFifo1Full,
IfxCan_Interrupt_rxFifo1MessageLost,
IfxCan_Interrupt_highPriorityMessage,
IfxCan_Interrupt_transmissionCompleted,
IfxCan_Interrupt_transmissionCancellationFinished,
IfxCan_Interrupt_txFifoEmpty,
IfxCan_Interrupt_txEventFifoNewEntry,
IfxCan_Interrupt_txEventFifoWatermarkReached,
IfxCan_Interrupt_txEventFifoFull,
IfxCan_Interrupt_txEventFifoEventLost,
IfxCan_Interrupt_timestampWraparound,
IfxCan_Interrupt_messageRAMAccessFailure,
IfxCan_Interrupt_timeoutOccurred,
IfxCan_Interrupt_messageStoredToDedicatedRxBuffer,
IfxCan_Interrupt_bitErrorCorrected,
IfxCan_Interrupt_bitErrorUncorrected,
IfxCan_Interrupt_errorLoggingOverflow,
IfxCan_Interrupt_errorPassive,
IfxCan_Interrupt_warningStatus,
IfxCan_Interrupt_busOffStatus,
IfxCan_Interrupt_watchdog,
IfxCan_Interrupt_protocolErrorArbitration,
IfxCan_Interrupt_protocolErrorData,
IfxCan_Interrupt_AccessToReservedAddress
}
Type of interrupt
Definition in Ifx_CAN.N[x].IE, Ifx_CAN.N[x].IR, Ifx_CAN.N[x].ILS, (x= 0 to 3) More...
enum IfxCan_InterruptGroup {
IfxCan_InterruptGroup_tefifo,
IfxCan_InterruptGroup_hpe,
IfxCan_InterruptGroup_wati,
IfxCan_InterruptGroup_alrt,
IfxCan_InterruptGroup_moer,
IfxCan_InterruptGroup_safe,
IfxCan_InterruptGroup_boff,
IfxCan_InterruptGroup_loi,
IfxCan_InterruptGroup_reint,
IfxCan_InterruptGroup_rxf1f,
IfxCan_InterruptGroup_rxf0f,
IfxCan_InterruptGroup_rxf1n,
IfxCan_InterruptGroup_rxf0n,
IfxCan_InterruptGroup_reti,
IfxCan_InterruptGroup_traq,
IfxCan_InterruptGroup_traco
}
Type of interrupt
Definition in Ifx_CAN.GRINT[x] (x= 0 , 1) More...
enum IfxCan_InterruptLine {
IfxCan_InterruptLine_0,
IfxCan_InterruptLine_1,
IfxCan_InterruptLine_2,
IfxCan_InterruptLine_3,
IfxCan_InterruptLine_4,
IfxCan_InterruptLine_5,
IfxCan_InterruptLine_6,
IfxCan_InterruptLine_7,
IfxCan_InterruptLine_8,
IfxCan_InterruptLine_9,
IfxCan_InterruptLine_10,
IfxCan_InterruptLine_11,
IfxCan_InterruptLine_12,
IfxCan_InterruptLine_13,
IfxCan_InterruptLine_14,
IfxCan_InterruptLine_15
}
Interrupt line number INT_Ox (x= 0 - 15)
. More...
enum IfxCan_LastErrorCodeType {
IfxCan_LastErrorCodeType_noError = 0,
IfxCan_LastErrorCodeType_stuffError = 1,
IfxCan_LastErrorCodeType_formError = 2,
IfxCan_LastErrorCodeType_ackError = 3,
IfxCan_LastErrorCodeType_bit1Error = 4,
IfxCan_LastErrorCodeType_bit0Error = 5,
IfxCan_LastErrorCodeType_crcError = 6,
IfxCan_LastErrorCodeType_noCANBusEvent = 7
}
Type of last error to occur on the CAN node. More...
enum IfxCan_MessageIdLength {
IfxCan_MessageIdLength_standard,
IfxCan_MessageIdLength_extended,
IfxCan_MessageIdLength_both
}
Message Id length (Standard / Extended) More...
enum IfxCan_NonMatchingFrame {
IfxCan_NonMatchingFrame_acceptToRxFifo0 = 0,
IfxCan_NonMatchingFrame_acceptToRxFifo1 = 1,
IfxCan_NonMatchingFrame_reject = 2
}
Indicate the action to be taken with the messages which do not match with any element of the filter. More...
enum IfxCan_RxBufferId {
IfxCan_RxBufferId_0,
IfxCan_RxBufferId_1,
IfxCan_RxBufferId_2,
IfxCan_RxBufferId_3,
IfxCan_RxBufferId_4,
IfxCan_RxBufferId_5,
IfxCan_RxBufferId_6,
IfxCan_RxBufferId_7,
IfxCan_RxBufferId_8,
IfxCan_RxBufferId_9,
IfxCan_RxBufferId_10,
IfxCan_RxBufferId_11,
IfxCan_RxBufferId_12,
IfxCan_RxBufferId_13,
IfxCan_RxBufferId_14,
IfxCan_RxBufferId_15,
IfxCan_RxBufferId_16,
IfxCan_RxBufferId_17,
IfxCan_RxBufferId_18,
IfxCan_RxBufferId_19,
IfxCan_RxBufferId_20,
IfxCan_RxBufferId_21,
IfxCan_RxBufferId_22,
IfxCan_RxBufferId_23,
IfxCan_RxBufferId_24,
IfxCan_RxBufferId_25,
IfxCan_RxBufferId_26,
IfxCan_RxBufferId_27,
IfxCan_RxBufferId_28,
IfxCan_RxBufferId_29,
IfxCan_RxBufferId_30,
IfxCan_RxBufferId_31,
IfxCan_RxBufferId_32,
IfxCan_RxBufferId_33,
IfxCan_RxBufferId_34,
IfxCan_RxBufferId_35,
IfxCan_RxBufferId_36,
IfxCan_RxBufferId_37,
IfxCan_RxBufferId_38,
IfxCan_RxBufferId_39,
IfxCan_RxBufferId_40,
IfxCan_RxBufferId_41,
IfxCan_RxBufferId_42,
IfxCan_RxBufferId_43,
IfxCan_RxBufferId_44,
IfxCan_RxBufferId_45,
IfxCan_RxBufferId_46,
IfxCan_RxBufferId_47,
IfxCan_RxBufferId_48,
IfxCan_RxBufferId_49,
IfxCan_RxBufferId_50,
IfxCan_RxBufferId_51,
IfxCan_RxBufferId_52,
IfxCan_RxBufferId_53,
IfxCan_RxBufferId_54,
IfxCan_RxBufferId_55,
IfxCan_RxBufferId_56,
IfxCan_RxBufferId_57,
IfxCan_RxBufferId_58,
IfxCan_RxBufferId_59,
IfxCan_RxBufferId_60,
IfxCan_RxBufferId_61,
IfxCan_RxBufferId_62,
IfxCan_RxBufferId_63
}
Rx Buffer number. More...
enum IfxCan_RxFifoMode {
IfxCan_RxFifoMode_blocking,
IfxCan_RxFifoMode_overwrite
}
Rx FIFO 0/1 operating mode
Description in Ifx_CAN.N[x].RXFyC.FyOM, (x= 0 to 3; y = 0, 1) More...
enum IfxCan_RxMode {
IfxCan_RxMode_dedicatedBuffers,
IfxCan_RxMode_fifo0,
IfxCan_RxMode_fifo1,
IfxCan_RxMode_sharedFifo0,
IfxCan_RxMode_sharedFifo1,
IfxCan_RxMode_sharedAll
}
Rx Buffers or FIFO 0 or combination Mode of reception. More...
enum IfxCan_SleepMode {
IfxCan_SleepMode_enable = 0,
IfxCan_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_CAN.CLC.B.EDIS. More...
enum IfxCan_Status {
IfxCan_Status_ok = 0x00000000,
IfxCan_Status_notInitialised = 0x00000001,
IfxCan_Status_busOff = 0x00000010,
IfxCan_Status_notSentBusy = 0x00000020,
IfxCan_Status_receiveEmpty = 0x00000040,
IfxCan_Status_messageLost = 0x00000080,
IfxCan_Status_newData = 0x00000100,
IfxCan_Status_newDataButOneLost = 0x00000180
}
CAN API status definition. More...
enum IfxCan_SuspendMode {
IfxCan_SuspendMode_none = 0,
IfxCan_SuspendMode_hard = 1,
IfxCan_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxCan_TxBufferId {
IfxCan_TxBufferId_0,
IfxCan_TxBufferId_1,
IfxCan_TxBufferId_2,
IfxCan_TxBufferId_3,
IfxCan_TxBufferId_4,
IfxCan_TxBufferId_5,
IfxCan_TxBufferId_6,
IfxCan_TxBufferId_7,
IfxCan_TxBufferId_8,
IfxCan_TxBufferId_9,
IfxCan_TxBufferId_10,
IfxCan_TxBufferId_11,
IfxCan_TxBufferId_12,
IfxCan_TxBufferId_13,
IfxCan_TxBufferId_14,
IfxCan_TxBufferId_15,
IfxCan_TxBufferId_16,
IfxCan_TxBufferId_17,
IfxCan_TxBufferId_18,
IfxCan_TxBufferId_19,
IfxCan_TxBufferId_20,
IfxCan_TxBufferId_21,
IfxCan_TxBufferId_22,
IfxCan_TxBufferId_23,
IfxCan_TxBufferId_24,
IfxCan_TxBufferId_25,
IfxCan_TxBufferId_26,
IfxCan_TxBufferId_27,
IfxCan_TxBufferId_28,
IfxCan_TxBufferId_29,
IfxCan_TxBufferId_30,
IfxCan_TxBufferId_31
}
Tx Buffer number. More...
enum IfxCan_TxMode {
IfxCan_TxMode_fifo,
IfxCan_TxMode_queue,
IfxCan_TxMode_dedicatedBuffers,
IfxCan_TxMode_sharedFifo,
IfxCan_TxMode_sharedQueue
}
Tx FIFO/Queue Mode. More...

Detailed Description

Enumeration Type Documentation

◆ IfxCan_CanNodeErrorWarningLimitStatus

enum IfxCan_CanNodeErrorWarningLimitStatus

Status of warning limit for error counters in CAN node.

Enumerator
IfxCan_CanNodeErrorWarningLimitStatus_notReached | Error counters are below the warning limit.
IfxCan_CanNodeErrorWarningLimitStatus_reached | Error counter reached the warning limit.

Definition at line 86 of file IfxCan.h.

◆ IfxCan_ClockSelect

enum IfxCan_ClockSelect

Clock selection option
Description in Ifx_CAN.MCR.CLKSELx, (x = 0,1,2)

Enumerator
IfxCan_ClockSelect_0 | clock selection 0
IfxCan_ClockSelect_1 | clock selection 1
IfxCan_ClockSelect_2 | clock selection 2
IfxCan_ClockSelect_3 | clock selection 3

Definition at line 95 of file IfxCan.h.

◆ IfxCan_ClockSource

enum IfxCan_ClockSource

Type of Clock Source selection
Description in Ifx_CAN.MCR.CLKSELx, (x = 0,1,2)

Enumerator
IfxCan_ClockSource_noClock | No clock is switched on.
IfxCan_ClockSource_asynchronous | The Asynchronous clock source is switched on.
IfxCan_ClockSource_synchronous | The Synchronous clock source is switched on.
IfxCan_ClockSource_both | Both clock sources are switched on.

Definition at line 106 of file IfxCan.h.

◆ IfxCan_DataFieldSize

enum IfxCan_DataFieldSize

Data Field Size
Definition in Ifx_CAN.N[x]TX.ESC.B.TBDS, Ifx_CAN.N[x].RX.ESC.B.RBDS, Ifx_CAN.N[x].RX.ESC.B.FyDS (x= 0,1,2,3; y = 0, 1)

Enumerator
IfxCan_DataFieldSize_8 | 8 byte data field
IfxCan_DataFieldSize_12 | 12 byte data field
IfxCan_DataFieldSize_16 | 16 byte data field
IfxCan_DataFieldSize_20 | 20 byte data field
IfxCan_DataFieldSize_24 | 24 byte data field
IfxCan_DataFieldSize_32 | 32 byte data field
IfxCan_DataFieldSize_48 | 48 byte data field
IfxCan_DataFieldSize_64 | 64 byte data field

Definition at line 117 of file IfxCan.h.

◆ IfxCan_DataLengthCode

enum IfxCan_DataLengthCode

Data Length code of the Message.

Enumerator
IfxCan_DataLengthCode_0 | 0 data bytes
IfxCan_DataLengthCode_1 | 1 data bytes
IfxCan_DataLengthCode_2 | 2 data bytes
IfxCan_DataLengthCode_3 | 3 data bytes
IfxCan_DataLengthCode_4 | 4 data bytes
IfxCan_DataLengthCode_5 | 5 data bytes
IfxCan_DataLengthCode_6 | 6 data bytes
IfxCan_DataLengthCode_7 | 7 data bytes
IfxCan_DataLengthCode_8 | 8 data bytes
IfxCan_DataLengthCode_12 | 12 data bytes
IfxCan_DataLengthCode_16 | 16 data bytes
IfxCan_DataLengthCode_20 | 20 data bytes
IfxCan_DataLengthCode_24 | 24 data bytes
IfxCan_DataLengthCode_32 | 32 data bytes
IfxCan_DataLengthCode_48 | 48 data bytes
IfxCan_DataLengthCode_64 | 64 data bytes

Definition at line 131 of file IfxCan.h.

◆ IfxCan_FilterElementConfiguration

enum IfxCan_FilterElementConfiguration

Filter Element Configuration.

Enumerator
IfxCan_FilterElementConfiguration_disable | Disable filter element.
IfxCan_FilterElementConfiguration_storeInRxFifo0 | Store in Rx FIFO 0 if filter matches.
IfxCan_FilterElementConfiguration_storeInRxFifo1 | Store in Rx FIFO 1 if filter matches.
IfxCan_FilterElementConfiguration_rejectId | Reject ID if filter matches.
IfxCan_FilterElementConfiguration_setPriority | Set priority if filter matches.
IfxCan_FilterElementConfiguration_setPriorityAndStoreInFifo0 | Set priority and store in FIFO 0 if filter matches.
IfxCan_FilterElementConfiguration_setPriorityAndStoreInFifo1 | Set priority and store in FIFO 1 if filter matches.
IfxCan_FilterElementConfiguration_storeInRxBuffer | Store into Rx Buffer.

Definition at line 153 of file IfxCan.h.

◆ IfxCan_FilterType

enum IfxCan_FilterType

Filter Type.

Enumerator
IfxCan_FilterType_range | Range filter from SF1ID to SF2ID (SF2ID is greater than SF1ID)
IfxCan_FilterType_dualId | Dual ID filter for SF1ID or SF2ID.
IfxCan_FilterType_classic | Classic filter: SF1ID = filter, SF2ID = mask.
IfxCan_FilterType_none | Reserved.

Definition at line 167 of file IfxCan.h.

◆ IfxCan_FrameMode

enum IfxCan_FrameMode

CAN Frame mode
Description in Ifx_CAN.N[x].CCCR.CME, (x= 0 to 3)

Enumerator
IfxCan_FrameMode_standard | Standard CAN frame (transmit and receive)
IfxCan_FrameMode_fdLong | CAN FD long frame in transmit and CAN FD long and fast frame in receive.
IfxCan_FrameMode_fdLongAndFast | CAN FD long and fast frames (transmit and receive)

Definition at line 178 of file IfxCan.h.

◆ IfxCan_FrameType

enum IfxCan_FrameType

CAN frame type.

Enumerator
IfxCan_FrameType_receive | Data frame is received.
IfxCan_FrameType_transmit | Data frame is generated.
IfxCan_FrameType_transmitAndReceive | for both transmit and receive frames
IfxCan_FrameType_remoteRequest | Remote request frame is generated.
IfxCan_FrameType_remoteAnswer | Answer frame is generated on reception of the corresponding remote request.

Definition at line 187 of file IfxCan.h.

◆ IfxCan_Interrupt

enum IfxCan_Interrupt

Type of interrupt
Definition in Ifx_CAN.N[x].IE, Ifx_CAN.N[x].IR, Ifx_CAN.N[x].ILS, (x= 0 to 3)

Enumerator
IfxCan_Interrupt_rxFifo0NewMessage | Rx FIFO 0 New Message Interrupt.
IfxCan_Interrupt_rxFifo0WatermarkReached | Rx FIFO 0 Watermark Reached Interrupt.
IfxCan_Interrupt_rxFifo0Full | Rx FIFO 0 Full Interrupt.
IfxCan_Interrupt_rxFifo0MessageLost | Rx FIFO 0 Message Lost Interrupt.
IfxCan_Interrupt_rxFifo1NewMessage | Rx FIFO 1 New Message Interrupt.
IfxCan_Interrupt_rxFifo1WatermarkReached | Rx FIFO 1 Watermark Reached Interrupt.
IfxCan_Interrupt_rxFifo1Full | Rx FIFO 1 Full Interrupt.
IfxCan_Interrupt_rxFifo1MessageLost | Rx FIFO 1 Message Lost Interrupt.
IfxCan_Interrupt_highPriorityMessage | High Priority Message Interrupt.
IfxCan_Interrupt_transmissionCompleted | Transmission Completed Interrupt.
IfxCan_Interrupt_transmissionCancellationFinished | Transmission Cancellation Finished Interrupt.
IfxCan_Interrupt_txFifoEmpty | Tx FIFO Empty Interrupt.
IfxCan_Interrupt_txEventFifoNewEntry | Tx Event FIFO New Entry Interrupt.
IfxCan_Interrupt_txEventFifoWatermarkReached | Tx Event FIFO Watermark Reached Interrupt.
IfxCan_Interrupt_txEventFifoFull | Tx Event FIFO Full Interrupt.
IfxCan_Interrupt_txEventFifoEventLost | Tx Event FIFO Event Lost Interrupt.
IfxCan_Interrupt_timestampWraparound | Timestamp Wraparound Interrupt.
IfxCan_Interrupt_messageRAMAccessFailure | Message RAM Access Failure Interrupt.
IfxCan_Interrupt_timeoutOccurred | Timeout Occurred Interrupt.
IfxCan_Interrupt_messageStoredToDedicatedRxBuffer | Message stored to Dedicated Rx Buffer Interrupt.
IfxCan_Interrupt_bitErrorCorrected | Bit Error Corrected Interrupt.
IfxCan_Interrupt_bitErrorUncorrected | Bit Error Uncorrected Interrupt.
IfxCan_Interrupt_errorLoggingOverflow | Error Logging Overflow Interrupt.
IfxCan_Interrupt_errorPassive | Error Passive Interrupt.
IfxCan_Interrupt_warningStatus | Warning Status Interrupt.
IfxCan_Interrupt_busOffStatus | Bus_Off Status Interrupt.
IfxCan_Interrupt_watchdog | Watchdog Interrupt.
IfxCan_Interrupt_protocolErrorArbitration | Protocol Error in Arbitration phase Interrupt.
IfxCan_Interrupt_protocolErrorData | Protocol Error in Data phase Interrupt.
IfxCan_Interrupt_AccessToReservedAddress | Access to Reserved Address Interrupt.

Definition at line 199 of file IfxCan.h.

◆ IfxCan_InterruptGroup

enum IfxCan_InterruptGroup

Type of interrupt
Definition in Ifx_CAN.GRINT[x] (x= 0 , 1)

Enumerator
IfxCan_InterruptGroup_tefifo | Transmit Event FIFO Incidents.
IfxCan_InterruptGroup_hpe | High Priority Events.
IfxCan_InterruptGroup_wati | Watermark interrupts are mapped here.
IfxCan_InterruptGroup_alrt | Alerts.
IfxCan_InterruptGroup_moer | Module errors.
IfxCan_InterruptGroup_safe | Safety counter overflow.
IfxCan_InterruptGroup_boff | Bus Off.
IfxCan_InterruptGroup_loi | Last Error Interrupts.
IfxCan_InterruptGroup_reint | Message stored in dedicated receive buffer interrupt (IR.DRX)
IfxCan_InterruptGroup_rxf1f | Receive FIFO1 full interrupt.
IfxCan_InterruptGroup_rxf0f | Receive FIFO0 full interrupt.
IfxCan_InterruptGroup_rxf1n | Receive FIFO1 new message Interrupt.
IfxCan_InterruptGroup_rxf0n | Receive FIFO0 new message Interrupt.
IfxCan_InterruptGroup_reti | Receive timeouts.
IfxCan_InterruptGroup_traq | Transmission Queue Events.
IfxCan_InterruptGroup_traco | Interrupts of the transmission control.

Definition at line 236 of file IfxCan.h.

◆ IfxCan_InterruptLine

enum IfxCan_InterruptLine

Interrupt line number INT_Ox (x= 0 - 15)
.

Enumerator
IfxCan_InterruptLine_0 | Interrupt Line 0.
IfxCan_InterruptLine_1 | Interrupt Line 1.
IfxCan_InterruptLine_2 | Interrupt Line 2.
IfxCan_InterruptLine_3 | Interrupt Line 3.
IfxCan_InterruptLine_4 | Interrupt Line 4.
IfxCan_InterruptLine_5 | Interrupt Line 5.
IfxCan_InterruptLine_6 | Interrupt Line 6.
IfxCan_InterruptLine_7 | Interrupt Line 7.
IfxCan_InterruptLine_8 | Interrupt Line 8.
IfxCan_InterruptLine_9 | Interrupt Line 9.
IfxCan_InterruptLine_10 | Interrupt Line 10.
IfxCan_InterruptLine_11 | Interrupt Line 11.
IfxCan_InterruptLine_12 | Interrupt Line 12.
IfxCan_InterruptLine_13 | Interrupt Line 13.
IfxCan_InterruptLine_14 | Interrupt Line 14.
IfxCan_InterruptLine_15 | Interrupt Line 15.

Definition at line 258 of file IfxCan.h.

◆ IfxCan_LastErrorCodeType

enum IfxCan_LastErrorCodeType

Type of last error to occur on the CAN node.

Enumerator
IfxCan_LastErrorCodeType_noError | No Error occured in the recent CAN message transmission or reception.
IfxCan_LastErrorCodeType_stuffError | More than 5 consecutive equal bits recieved in CAN message.
IfxCan_LastErrorCodeType_formError | Fixed format part of recieved frame has wrong format.
IfxCan_LastErrorCodeType_ackError | No ACK recieved from another node for transmitted CAN message.
IfxCan_LastErrorCodeType_bit1Error | Transmitted recessive and read back dominant on the CAN bus.
IfxCan_LastErrorCodeType_bit0Error | Transmitted dominant and read back recessive on the CAN bus.
IfxCan_LastErrorCodeType_crcError | CRC Error.
IfxCan_LastErrorCodeType_noCANBusEvent | No CAN bus event occured.

Definition at line 280 of file IfxCan.h.

◆ IfxCan_MessageIdLength

enum IfxCan_MessageIdLength

Message Id length (Standard / Extended)

Enumerator
IfxCan_MessageIdLength_standard | Standard Message ID.
IfxCan_MessageIdLength_extended | Extended Message ID.
IfxCan_MessageIdLength_both | Both Standard and Extended message IDs.

Definition at line 294 of file IfxCan.h.

◆ IfxCan_NonMatchingFrame

enum IfxCan_NonMatchingFrame

Indicate the action to be taken with the messages which do not match with any element of the filter.

Enumerator
IfxCan_NonMatchingFrame_acceptToRxFifo0 | Accept the non matching messages into Rx FIFO 0.
IfxCan_NonMatchingFrame_acceptToRxFifo1 | Accepts the non matching messages into Rx FIFO 1.
IfxCan_NonMatchingFrame_reject | Reject the non-matching messages.

Definition at line 303 of file IfxCan.h.

◆ IfxCan_RxBufferId

enum IfxCan_RxBufferId

Rx Buffer number.

Enumerator
IfxCan_RxBufferId_0 | Rx buffer 0.
IfxCan_RxBufferId_1 | Rx buffer 1.
IfxCan_RxBufferId_2 | Rx buffer 2.
IfxCan_RxBufferId_3 | Rx buffer 3.
IfxCan_RxBufferId_4 | Rx buffer 4.
IfxCan_RxBufferId_5 | Rx buffer 5.
IfxCan_RxBufferId_6 | Rx buffer 6.
IfxCan_RxBufferId_7 | Rx buffer 7.
IfxCan_RxBufferId_8 | Rx buffer 8.
IfxCan_RxBufferId_9 | Rx buffer 9.
IfxCan_RxBufferId_10 | Rx buffer 10.
IfxCan_RxBufferId_11 | Rx buffer 11.
IfxCan_RxBufferId_12 | Rx buffer 12.
IfxCan_RxBufferId_13 | Rx buffer 13.
IfxCan_RxBufferId_14 | Rx buffer 14.
IfxCan_RxBufferId_15 | Rx buffer 15.
IfxCan_RxBufferId_16 | Rx buffer 16.
IfxCan_RxBufferId_17 | Rx buffer 17.
IfxCan_RxBufferId_18 | Rx buffer 18.
IfxCan_RxBufferId_19 | Rx buffer 19.
IfxCan_RxBufferId_20 | Rx buffer 20.
IfxCan_RxBufferId_21 | Rx buffer 21.
IfxCan_RxBufferId_22 | Rx buffer 22.
IfxCan_RxBufferId_23 | Rx buffer 23.
IfxCan_RxBufferId_24 | Rx buffer 24.
IfxCan_RxBufferId_25 | Rx buffer 25.
IfxCan_RxBufferId_26 | Rx buffer 26.
IfxCan_RxBufferId_27 | Rx buffer 27.
IfxCan_RxBufferId_28 | Rx buffer 28.
IfxCan_RxBufferId_29 | Rx buffer 29.
IfxCan_RxBufferId_30 | Rx buffer 30.
IfxCan_RxBufferId_31 | Rx buffer 31.
IfxCan_RxBufferId_32 | Rx buffer 32.
IfxCan_RxBufferId_33 | Rx buffer 33.
IfxCan_RxBufferId_34 | Rx buffer 34.
IfxCan_RxBufferId_35 | Rx buffer 35.
IfxCan_RxBufferId_36 | Rx buffer 36.
IfxCan_RxBufferId_37 | Rx buffer 37.
IfxCan_RxBufferId_38 | Rx buffer 38.
IfxCan_RxBufferId_39 | Rx buffer 39.
IfxCan_RxBufferId_40 | Rx buffer 40.
IfxCan_RxBufferId_41 | Rx buffer 41.
IfxCan_RxBufferId_42 | Rx buffer 42.
IfxCan_RxBufferId_43 | Rx buffer 43.
IfxCan_RxBufferId_44 | Rx buffer 44.
IfxCan_RxBufferId_45 | Rx buffer 45.
IfxCan_RxBufferId_46 | Rx buffer 46.
IfxCan_RxBufferId_47 | Rx buffer 47.
IfxCan_RxBufferId_48 | Rx buffer 48.
IfxCan_RxBufferId_49 | Rx buffer 49.
IfxCan_RxBufferId_50 | Rx buffer 50.
IfxCan_RxBufferId_51 | Rx buffer 51.
IfxCan_RxBufferId_52 | Rx buffer 52.
IfxCan_RxBufferId_53 | Rx buffer 53.
IfxCan_RxBufferId_54 | Rx buffer 54.
IfxCan_RxBufferId_55 | Rx buffer 55.
IfxCan_RxBufferId_56 | Rx buffer 56.
IfxCan_RxBufferId_57 | Rx buffer 57.
IfxCan_RxBufferId_58 | Rx buffer 58.
IfxCan_RxBufferId_59 | Rx buffer 59.
IfxCan_RxBufferId_60 | Rx buffer 60.
IfxCan_RxBufferId_61 | Rx buffer 61.
IfxCan_RxBufferId_62 | Rx buffer 62.
IfxCan_RxBufferId_63 | Rx buffer 63.

Definition at line 312 of file IfxCan.h.

◆ IfxCan_RxFifoMode

enum IfxCan_RxFifoMode

Rx FIFO 0/1 operating mode
Description in Ifx_CAN.N[x].RXFyC.FyOM, (x= 0 to 3; y = 0, 1)

Enumerator
IfxCan_RxFifoMode_blocking | Blocking mode.
IfxCan_RxFifoMode_overwrite | Overwrite mode.

Definition at line 383 of file IfxCan.h.

◆ IfxCan_RxMode

enum IfxCan_RxMode

Rx Buffers or FIFO 0 or combination Mode of reception.

Enumerator
IfxCan_RxMode_dedicatedBuffers | Rx dedicated buffers operation.
IfxCan_RxMode_fifo0 | Rx FIFO 0 operation.
IfxCan_RxMode_fifo1 | Rx FIFO 1 operation.
IfxCan_RxMode_sharedFifo0 | Rx shared dedicated buffers and Rx FIFO 0 operation.
IfxCan_RxMode_sharedFifo1 | Rx shared dedicated buffers and Rx FIFO 1 operation.
IfxCan_RxMode_sharedAll | Rx shared dedicated buffers and Rx FIFO 0 and Rx FIFO 1 operation.

Definition at line 391 of file IfxCan.h.

◆ IfxCan_SleepMode

enum IfxCan_SleepMode

Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_CAN.CLC.B.EDIS.

Enumerator
IfxCan_SleepMode_enable | enables sleep mode
IfxCan_SleepMode_disable | disables sleep mode

Definition at line 404 of file IfxCan.h.

◆ IfxCan_Status

enum IfxCan_Status

CAN API status definition.

Enumerator
IfxCan_Status_ok
IfxCan_Status_notInitialised
IfxCan_Status_busOff
IfxCan_Status_notSentBusy
IfxCan_Status_receiveEmpty
IfxCan_Status_messageLost
IfxCan_Status_newData
IfxCan_Status_newDataButOneLost

Definition at line 412 of file IfxCan.h.

◆ IfxCan_SuspendMode

enum IfxCan_SuspendMode

OCDS Suspend Control (OCDS.SUS)

Enumerator
IfxCan_SuspendMode_none | No suspend.
IfxCan_SuspendMode_hard | Hard Suspend.
IfxCan_SuspendMode_soft | Soft Suspend.

Definition at line 426 of file IfxCan.h.

◆ IfxCan_TxBufferId

enum IfxCan_TxBufferId

Tx Buffer number.

Enumerator
IfxCan_TxBufferId_0 | Tx buffer 0.
IfxCan_TxBufferId_1 | Tx buffer 1.
IfxCan_TxBufferId_2 | Tx buffer 2.
IfxCan_TxBufferId_3 | Tx buffer 3.
IfxCan_TxBufferId_4 | Tx buffer 4.
IfxCan_TxBufferId_5 | Tx buffer 5.
IfxCan_TxBufferId_6 | Tx buffer 6.
IfxCan_TxBufferId_7 | Tx buffer 7.
IfxCan_TxBufferId_8 | Tx buffer 8.
IfxCan_TxBufferId_9 | Tx buffer 9.
IfxCan_TxBufferId_10 | Tx buffer 10.
IfxCan_TxBufferId_11 | Tx buffer 11.
IfxCan_TxBufferId_12 | Tx buffer 12.
IfxCan_TxBufferId_13 | Tx buffer 13.
IfxCan_TxBufferId_14 | Tx buffer 14.
IfxCan_TxBufferId_15 | Tx buffer 15.
IfxCan_TxBufferId_16 | Tx buffer 16.
IfxCan_TxBufferId_17 | Tx buffer 17.
IfxCan_TxBufferId_18 | Tx buffer 18.
IfxCan_TxBufferId_19 | Tx buffer 19.
IfxCan_TxBufferId_20 | Tx buffer 20.
IfxCan_TxBufferId_21 | Tx buffer 21.
IfxCan_TxBufferId_22 | Tx buffer 22.
IfxCan_TxBufferId_23 | Tx buffer 23.
IfxCan_TxBufferId_24 | Tx buffer 24.
IfxCan_TxBufferId_25 | Tx buffer 25.
IfxCan_TxBufferId_26 | Tx buffer 26.
IfxCan_TxBufferId_27 | Tx buffer 27.
IfxCan_TxBufferId_28 | Tx buffer 28.
IfxCan_TxBufferId_29 | Tx buffer 29.
IfxCan_TxBufferId_30 | Tx buffer 30.
IfxCan_TxBufferId_31 | Tx buffer 31.

Definition at line 435 of file IfxCan.h.

◆ IfxCan_TxMode

enum IfxCan_TxMode

Tx FIFO/Queue Mode.

Enumerator
IfxCan_TxMode_fifo | Tx FIFO operation.
IfxCan_TxMode_queue | Tx Queue operation.
IfxCan_TxMode_dedicatedBuffers | Tx dedicated buffers operation.
IfxCan_TxMode_sharedFifo | Tx shared dedicated buffers and Tx FIFO operation.
IfxCan_TxMode_sharedQueue | Tx shared dedicated buffers and Tx Queue operation.

Definition at line 473 of file IfxCan.h.


iLLD_TC38A: Data Structures

Data Structures
Data Structures
iLLD » CAN » Standard Interface
Collaboration diagram for Data Structures:

Data Structures

struct | IfxCan_Filter
tructure for Filter configuration More...
struct | IfxCan_GroupInterruptConfig
Configuration for Interrupt groups. More...
struct | IfxCan_Message
Structure for CAN Message configuration (transmit/receive) More...
struct | IfxCan_MessageRAM
Structure for Message RAM configuration. More...

Detailed Description

Data Structure Documentation

◆ IfxCan_Filter

struct IfxCan_Filter

tructure for Filter configuration

Definition at line 510 of file IfxCan.h.

Data Fields
IfxCan_FilterElementConfiguration | elementConfiguration | *FEC, Filter Element Configuration of (standard / extended ID) filter element
uint32 | id1 | *FID1 First ID of (standard / extended ID) filter element
uint32 | id2 | *FID2 Second ID of (standard / extended ID) filter element
uint8 | number | Filter Number.
IfxCan_RxBufferId | rxBufferOffset | Rx Buffer number to set the offset to the Rx Buffer Start Address.
IfxCan_FilterType | type | *FT, Filter Type of (standard / extended ID) filter element

◆ IfxCan_GroupInterruptConfig

struct IfxCan_GroupInterruptConfig

Configuration for Interrupt groups.

Definition at line 522 of file IfxCan.h.

Data Fields
IfxCan_InterruptLine | interruptLine | Intterupt line to which this interruipt has to be connetced to.
Ifx_Priority | priority | Priority of the interrupt.
IfxSrc_Tos | typeOfService | Type of Service.

◆ IfxCan_Message

struct IfxCan_Message

Structure for CAN Message configuration (transmit/receive)

Definition at line 531 of file IfxCan.h.

Data Fields
uint8 | bufferNumber | (Tx / Rx) Buffer Element number
IfxCan_DataLengthCode | dataLengthCode | DLC, Data Length Code.
boolean | errorStateIndicator | ESI, Error State Indicator (enable / disable)
IfxCan_FrameMode | frameMode | CAN frame mode.
uint32 | messageId | ID, Identifier.
IfxCan_MessageIdLength | messageIdLength | XTD, Message Id length (Standard / Extended)
boolean | readFromRxFifo0 | Read message from Rx FIFO 0.
boolean | readFromRxFifo1 | Read message from Rx FIFO 1.
boolean | remoteTransmitRequest | RTR, Remote Transmit Request (enable / disable)
boolean | storeInTxFifoQueue | Write message in Tx FIFO/QUEUE.
boolean | txEventFifoControl | EFC, Tx Event FIFO Control (enable / disable)

◆ IfxCan_MessageRAM

struct IfxCan_MessageRAM

Structure for Message RAM configuration.

Definition at line 548 of file IfxCan.h.

Data Fields
uint32 | baseAddress | Message RAM base address of the CAN.
uint16 | extendedFilterListStartAddress | Start address of Extended Message ID filter list (32-bit word address)
uint16 | rxBuffersStartAddress | Start address of Rx Buffers section in the Message RAM (32-bit word address).
uint16 | rxFifo0StartAddress | Start address of Rx FIFO 0 in Message RAM (32-bit word address)
uint16 | rxFifo1StartAddress | Start address of Rx FIFO 1 in Message RAM (32-bit word address)
uint16 | standardFilterListStartAddress | Start address of Standard Message ID filter list (32-bit word address)
uint16 | txBuffersStartAddress | Start address of Tx Buffers section in the Message RAM (32-bit word address).
uint16 | txEventFifoStartAddress | Start address of Tx Event FIFO in Message RAM (32-bit w ord address)


iLLD_TC38A: Node Functions

Functions
Node Functions
iLLD » CAN » Standard Interface
Collaboration diagram for Node Functions:

Functions

IFX_INLINE void | IfxCan_Node_disableConfigurationChange (Ifx_CAN_N *node)
Disables the configuration change
The CPU has no write access to the protected configuration registers. More...
IFX_INLINE void | IfxCan_Node_enableConfigurationChange (Ifx_CAN_N *node)
Enables the configuration change
The CPU has write access to the protected configuration registers (while CCCR.INIT = 1) More...
IFX_INLINE void | IfxCan_Node_enableLoopbackMode (Ifx_CAN_N *node)
Enables the internal Virtual CAN bus loopback mode. More...
IFX_INLINE boolean | IfxCan_Node_isNodeSynchronized (Ifx_CAN_N *node)
Returns the status of whether the CAN Node is synchronised or not. More...
IFX_INLINE void | IfxCan_Node_setInitialisation (Ifx_CAN_N *node, boolean enable)
Initialises the node
0= Normal Operation
1= Initialization is started. More...
IFX_INLINE void | IfxCan_Node_setTransceiverDelayCompensationOffset (Ifx_CAN_N *node, uint8 delay)
Sets Transceiver Delay Compensation offset. More...
IFX_INLINE IfxCan_LastErrorCodeType | IfxCan_Node_getLastErroCodeStatus (Ifx_CAN_N *node)
Get the LEC error status of the CAN node. More...
IFX_INLINE boolean | IfxCan_Node_isErrorPassive (Ifx_CAN_N *node)
Error Passive status of the CAN node. TRUE: CAN node in error passive. FALSE: CAN node not in error passive. More...
IFX_INLINE IfxCan_CanNodeErrorWarningLimitStatus | IfxCan_Node_getWarningStatus (Ifx_CAN_N *node)
Get the warning status of the CAN node. More...
IFX_INLINE IfxCan_CanNodeBusOffErrorStatus | IfxCan_Node_getBusOffStatus (Ifx_CAN_N *node)
Get the Bus Off status of the CAN node. More...
IFX_INLINE IfxCan_CanNodeCommunicationState | IfxCan_Node_getActivityStatus (Ifx_CAN_N *node)
Get the Activity status of the CAN node. More...
IFX_INLINE IfxCan_LastErrorCodeType | IfxCan_Node_getDataPhaseLastErrorCode (Ifx_CAN_N *node)
Get the Error status in data phase of the CAN node in the recent CANFD operation with bit rate switch. More...
IFX_INLINE boolean | IfxCan_Node_isProtocolExceptionEventOccured (Ifx_CAN_N *node)
Protocol Exception Event status TRUE: Protocol Exception event occured. FALSE: Protocol Exception event not occured. More...
IFX_INLINE boolean | IfxCan_Node_isErrorStatusIndicatorEnabled (Ifx_CAN_N *node)
Returns the error status of the recent recieved CAN FD message. TRUE : Error status indicator is enabled FALSE: Erro status indicator not enabled. More...
IFX_INLINE boolean | IfxCan_Node_isBitRateSwitchFlagEnabled (Ifx_CAN_N *node)
Bit Rate Switch status of the last recieved CAN FD message. TRUE: Bit rate switch is enabled. FALSE: Bit rate switch is disabled. More...
IFX_INLINE IfxCan_DataLengthCode | IfxCan_Node_getCodeFromDataLengthInBytes (uint32 dataLength)
Return the DLC code corresponding to the data length in bytes. More...
IFX_EXTERN uint32 | IfxCan_Node_getDataLength (IfxCan_DataLengthCode dataLengthCode)
Converts data length code (DLC) into number of words. More...
IFX_EXTERN uint32 | IfxCan_Node_getDataLengthFromCode (Ifx_CAN_N *node, IfxCan_DataLengthCode dataLengthCode)
Converts data length code (DLC) into number of data words. This function is deprecated. Use new function IfxCan_Node_getDataLength. More...
IFX_EXTERN IfxCan_FrameMode | IfxCan_Node_getFrameMode (Ifx_CAN_RXMSG *rxBufferElement)
Returns CAN frame mode of operation for a received frame. More...
IFX_EXTERN boolean | IfxCan_Node_initRxPin (Ifx_CAN_N *node, IfxCan_Rxd_In *rxd, IfxPort_InputMode mode, IfxPort_PadDriver padDriver)
Select and initialise the CAN node receive pin. More...
IFX_EXTERN boolean | IfxCan_Node_initTxPin (IfxCan_Txd_Out *txd, IfxPort_OutputMode mode, IfxPort_PadDriver padDriver)
Select and initialise the CAN node transmit pin. More...
IFX_EXTERN void | IfxCan_Node_setBitTiming (Ifx_CAN_N *node, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 syncJumpWidth)
Calculates and Sets the CAN baudrate for standard frames and arbitration phase of CAND FD frames. More...
IFX_EXTERN void | IfxCan_Node_setBitTimingValues (Ifx_CAN_N *node, uint16 syncJumpWidth, uint8 timeSegment2, uint8 timeSegment1, uint16 prescaler)
Sets the values of CAN baudrate for standard frames. More...
IFX_EXTERN void | IfxCan_Node_setFastBitTiming (Ifx_CAN_N *node, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 syncJumpWidth)
Calulates and Sets the CAN fast baudrate for CAN FD frames data phase. More...
IFX_EXTERN void | IfxCan_Node_setFastBitTimingValues (Ifx_CAN_N *node, uint16 syncJumpWidth, uint8 timeSegment2, uint8 timeSegment1, uint16 prescaler)
Sets the values of CAN fast baudrate for CAN FD frames data phase. More...
IFX_EXTERN void | IfxCan_Node_setFrameMode (Ifx_CAN_N *node, IfxCan_FrameMode frameMode)
Enables the CAN frame mode for transmission. More...
IFX_EXTERN void | IfxCan_Node_setFrameModeReq (Ifx_CAN_TXMSG *txBufferElement, IfxCan_FrameMode frameMode)
Sets CAN frame mode request for transmission. More...
IFX_EXTERN void | IfxCan_Node_setFrameModeRequest (Ifx_CAN_N *node, Ifx_CAN_TXMSG *txBufferElement, IfxCan_FrameMode frameMode)
Sets CAN frame mode request for transmission. This function is deprecated. Use new function IfxCan_Node_setFrameModeReq. More...
IFX_EXTERN uint32 | IfxCan_Node_getDataLengthInBytes (IfxCan_DataLengthCode dataLengthCode)
Converts data length code (DLC) into number of bytes. More...

Detailed Description

Function Documentation

◆ IfxCan_Node_disableConfigurationChange()

IFX_INLINE void IfxCan_Node_disableConfigurationChange ( Ifx_CAN_N * node )

Disables the configuration change
The CPU has no write access to the protected configuration registers.

Parameters
node Specifies the pointer to the CAN Node registers
Returns
None

Definition at line 1784 of file IfxCan.h.

Referenced by IfxCan_Can_initNode(), IfxCan_Can_setExtendedFilter(), and IfxCan_Can_setStandardFilter().

◆ IfxCan_Node_enableConfigurationChange()

IFX_INLINE void IfxCan_Node_enableConfigurationChange ( Ifx_CAN_N * node )

Enables the configuration change
The CPU has write access to the protected configuration registers (while CCCR.INIT = 1)

Parameters
node Specifies the pointer to the CAN Node registers
Returns
None

Definition at line 1819 of file IfxCan.h.

Referenced by IfxCan_Can_initNode(), IfxCan_Can_setExtendedFilter(), and IfxCan_Can_setStandardFilter().

◆ IfxCan_Node_enableLoopbackMode()

IFX_INLINE void IfxCan_Node_enableLoopbackMode ( Ifx_CAN_N * node )

Enables the internal Virtual CAN bus loopback mode.

Parameters
node Specifies the pointer to the CAN Node registers
Returns
None

Definition at line 1859 of file IfxCan.h.

Referenced by IfxCan_Can_initNode().

◆ IfxCan_Node_getActivityStatus()

IFX_INLINE IfxCan_CanNodeCommunicationState IfxCan_Node_getActivityStatus ( Ifx_CAN_N * node )

Get the Activity status of the CAN node.

Parameters
node Specifies the pointer to CAN node registers
Returns
Activity status of CAN node

Definition at line 2489 of file IfxCan.h.

◆ IfxCan_Node_getBusOffStatus()

IFX_INLINE IfxCan_CanNodeBusOffErrorStatus IfxCan_Node_getBusOffStatus ( Ifx_CAN_N * node )

Get the Bus Off status of the CAN node.

Parameters
node Specifies the pointer to CAN node registers
Returns
Bus Off Error status in CAN node

Definition at line 2483 of file IfxCan.h.

◆ IfxCan_Node_getCodeFromDataLengthInBytes()

IFX_INLINE IfxCan_DataLengthCode IfxCan_Node_getCodeFromDataLengthInBytes ( uint32 dataLength )

Return the DLC code corresponding to the data length in bytes.

Parameters
dataLength Data length in bytes
Returns
Data length code

Definition at line 2525 of file IfxCan.h.

◆ IfxCan_Node_getDataLength()

IFX_EXTERN uint32 IfxCan_Node_getDataLength ( IfxCan_DataLengthCode dataLengthCode )

Converts data length code (DLC) into number of words.

Parameters
dataLengthCode DLC, Data Length Code
Returns
Number of data words

Definition at line 71 of file IfxCan.c.

Referenced by IfxCan_Node_readData(), IfxCan_Node_writeData(), and IfxCan_Node_writeTxBufData().

◆ IfxCan_Node_getDataLengthFromCode()

IFX_EXTERN uint32 IfxCan_Node_getDataLengthFromCode | ( | Ifx_CAN_N * | node,
 |  | IfxCan_DataLengthCode | dataLengthCode
 | ) |  |

Converts data length code (DLC) into number of data words. This function is deprecated. Use new function IfxCan_Node_getDataLength.

Parameters
node | Specifies the pointer to the CAN Node registers
dataLengthCode | DLC, Data Length Code
Returns
Number of data words

Definition at line 92 of file IfxCan.c.

◆ IfxCan_Node_getDataLengthInBytes()

IFX_EXTERN uint32 IfxCan_Node_getDataLengthInBytes ( IfxCan_DataLengthCode dataLengthCode )

Converts data length code (DLC) into number of bytes.

Parameters
dataLengthCode Data length code
Returns
Data length in bytes

Definition at line 1036 of file IfxCan.c.

◆ IfxCan_Node_getDataPhaseLastErrorCode()

IFX_INLINE IfxCan_LastErrorCodeType IfxCan_Node_getDataPhaseLastErrorCode ( Ifx_CAN_N * node )

Get the Error status in data phase of the CAN node in the recent CANFD operation with bit rate switch.

Parameters
node Specifies the pointer to CAN node registers
Returns
Error status of the recent CAN FD with BRS flag set.

Definition at line 2495 of file IfxCan.h.

◆ IfxCan_Node_getFrameMode()

IFX_EXTERN IfxCan_FrameMode IfxCan_Node_getFrameMode ( Ifx_CAN_RXMSG * rxBufferElement )

Returns CAN frame mode of operation for a received frame.

Parameters
rxBufferElement Rx Buffer Element
Returns
CAN frame mode

Definition at line 125 of file IfxCan.c.

Referenced by IfxCan_Can_readMessage().

◆ IfxCan_Node_getLastErroCodeStatus()

IFX_INLINE IfxCan_LastErrorCodeType IfxCan_Node_getLastErroCodeStatus ( Ifx_CAN_N * node )

Get the LEC error status of the CAN node.

Parameters
node Specifies the pointer to CAN node registers
Returns
LEC error status in CAN node PSR register

Definition at line 2465 of file IfxCan.h.

◆ IfxCan_Node_getWarningStatus()

IFX_INLINE IfxCan_CanNodeErrorWarningLimitStatus IfxCan_Node_getWarningStatus ( Ifx_CAN_N * node )

Get the warning status of the CAN node.

Parameters
node Specifies the pointer to CAN node registers
Returns
Warning status in CAN node

Definition at line 2477 of file IfxCan.h.

◆ IfxCan_Node_initRxPin()

IFX_EXTERN boolean IfxCan_Node_initRxPin | ( | Ifx_CAN_N * | node,
 |  | IfxCan_Rxd_In * | rxd,
 |  | IfxPort_InputMode | mode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Select and initialise the CAN node receive pin.

Parameters
node | Specifies the pointer to the CAN Node registers
rxd | Rx pin
mode | Input mode
padDriver | Pad Driver Configuration
Returns
TRUE: Returns TRUE if the operation was successful
FALSE: Returns FALSE if the operation was errorneous

Definition at line 331 of file IfxCan.c.

Referenced by IfxCan_Can_initNode().

◆ IfxCan_Node_initTxPin()

IFX_EXTERN boolean IfxCan_Node_initTxPin | ( | IfxCan_Txd_Out * | txd,
 |  | IfxPort_OutputMode | mode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Select and initialise the CAN node transmit pin.

Parameters
txd | Tx pin
mode | Output mode
padDriver | Pad driver Configuration
Returns
TRUE: Returns TRUE if the operation was successful
FALSE: Returns FALSE if the operation was errorneous

Definition at line 341 of file IfxCan.c.

Referenced by IfxCan_Can_initNode().

◆ IfxCan_Node_isBitRateSwitchFlagEnabled()

IFX_INLINE boolean IfxCan_Node_isBitRateSwitchFlagEnabled ( Ifx_CAN_N * node )

Bit Rate Switch status of the last recieved CAN FD message. TRUE: Bit rate switch is enabled. FALSE: Bit rate switch is disabled.

Parameters
node Specifies the pointer to CAN node registers
Returns
Bit Rate Switch flag status (TRUE/FALSE)

Definition at line 2513 of file IfxCan.h.

◆ IfxCan_Node_isErrorPassive()

IFX_INLINE boolean IfxCan_Node_isErrorPassive ( Ifx_CAN_N * node )

Error Passive status of the CAN node. TRUE: CAN node in error passive. FALSE: CAN node not in error passive.

Parameters
node Specifies the pointer to CAN node registers
Returns
Error Passive error status of CAN node (TRUE/FALSE).

Definition at line 2471 of file IfxCan.h.

◆ IfxCan_Node_isErrorStatusIndicatorEnabled()

IFX_INLINE boolean IfxCan_Node_isErrorStatusIndicatorEnabled ( Ifx_CAN_N * node )

Returns the error status of the recent recieved CAN FD message. TRUE : Error status indicator is enabled FALSE: Erro status indicator not enabled.

Parameters
node Specifies the pointer to CAN node registers
Returns
Error indicator for recent received CAN FD message (TRUE/FALSE)

Definition at line 2507 of file IfxCan.h.

◆ IfxCan_Node_isNodeSynchronized()

IFX_INLINE boolean IfxCan_Node_isNodeSynchronized ( Ifx_CAN_N * node )

Returns the status of whether the CAN Node is synchronised or not.

Parameters
node Specifies the pointer to the CAN Node registers
Returns
Status TRUE: synchronized, FALSE : Sync in progress

Definition at line 2027 of file IfxCan.h.

Referenced by IfxCan_Can_isNodeSynchronized().

◆ IfxCan_Node_isProtocolExceptionEventOccured()

IFX_INLINE boolean IfxCan_Node_isProtocolExceptionEventOccured ( Ifx_CAN_N * node )

Protocol Exception Event status TRUE: Protocol Exception event occured. FALSE: Protocol Exception event not occured.

Parameters
node Specifies the pointer to CAN node registers
Returns
Get the Protocol Exception event status (TRUE/FALSE)

Definition at line 2501 of file IfxCan.h.

◆ IfxCan_Node_setBitTiming()

IFX_EXTERN void IfxCan_Node_setBitTiming | ( | Ifx_CAN_N * | node,
 |  | float32 | moduleFreq,
 |  | uint32 | baudrate,
 |  | uint16 | samplePoint,
 |  | uint16 | syncJumpWidth
 | ) |  |

Calculates and Sets the CAN baudrate for standard frames and arbitration phase of CAND FD frames.

Parameters
node | Specifies the pointer to the CAN Node registers
moduleFreq | Specifies the CAN module frequency
baudrate | Specifies the baud rate. Unit: baud
samplePoint | Specifies the sample point. Range = [0, 10000] resp. [0%, 100%] of the total bit time.
syncJumpWidth | Specifies the re-synchronization jump width
Returns
None

Definition at line 385 of file IfxCan.c.

Referenced by IfxCan_Can_initNode().

◆ IfxCan_Node_setBitTimingValues()

IFX_EXTERN void IfxCan_Node_setBitTimingValues | ( | Ifx_CAN_N * | node,
 |  | uint16 | syncJumpWidth,
 |  | uint8 | timeSegment2,
 |  | uint8 | timeSegment1,
 |  | uint16 | prescaler
 | ) |  |

Sets the values of CAN baudrate for standard frames.

Parameters
node | Specifies the pointer to the CAN Node registers
syncJumpWidth | Synchronization Jump Width
timeSegment2 | Time segment after sample point
timeSegment1 | Time segment before sample point
prescaler | Baud Rate Prescaler
Returns
None

Definition at line 535 of file IfxCan.c.

Referenced by IfxCan_Can_initNode().

◆ IfxCan_Node_setFastBitTiming()

IFX_EXTERN void IfxCan_Node_setFastBitTiming | ( | Ifx_CAN_N * | node,
 |  | float32 | moduleFreq,
 |  | uint32 | baudrate,
 |  | uint16 | samplePoint,
 |  | uint16 | syncJumpWidth
 | ) |  |

Calulates and Sets the CAN fast baudrate for CAN FD frames data phase.

Parameters
node | Specifies the pointer to the CAN Node registers
moduleFreq | Specifies the CAN module frequency
baudrate | Specifies the baud rate. Unit: baud
samplePoint | Specifies the sample point. Range = [0, 10000] resp. [0%, 100%] of the total bit time.
syncJumpWidth | Specifies the re-synchronization jump width
Returns
None

Definition at line 548 of file IfxCan.c.

Referenced by IfxCan_Can_initNode().

◆ IfxCan_Node_setFastBitTimingValues()

IFX_EXTERN void IfxCan_Node_setFastBitTimingValues | ( | Ifx_CAN_N * | node,
 |  | uint16 | syncJumpWidth,
 |  | uint8 | timeSegment2,
 |  | uint8 | timeSegment1,
 |  | uint16 | prescaler
 | ) |  |

Sets the values of CAN fast baudrate for CAN FD frames data phase.

Parameters
node | Specifies the pointer to the CAN Node registers
syncJumpWidth | Synchronization Jump Width
timeSegment2 | Time segment after sample point
timeSegment1 | Time segment before sample point
prescaler | Baud Rate Prescaler
Returns
None

Definition at line 697 of file IfxCan.c.

Referenced by IfxCan_Can_initNode().

◆ IfxCan_Node_setFrameMode()

IFX_EXTERN void IfxCan_Node_setFrameMode | ( | Ifx_CAN_N * | node,
 |  | IfxCan_FrameMode | frameMode
 | ) |  |

Enables the CAN frame mode for transmission.

Parameters
node | Specifies the pointer to the CAN Node registers
frameMode | CAN frame mode
Returns
None

Definition at line 710 of file IfxCan.c.

Referenced by IfxCan_Can_initNode().

◆ IfxCan_Node_setFrameModeReq()

IFX_EXTERN void IfxCan_Node_setFrameModeReq | ( | Ifx_CAN_TXMSG * | txBufferElement,
 |  | IfxCan_FrameMode | frameMode
 | ) |  |

Sets CAN frame mode request for transmission.

Parameters
txBufferElement | Tx Buffer Element
frameMode | CAN frame mode
Returns
None

Definition at line 730 of file IfxCan.c.

Referenced by IfxCan_Can_sendMessage().

◆ IfxCan_Node_setFrameModeRequest()

IFX_EXTERN void IfxCan_Node_setFrameModeRequest | ( | Ifx_CAN_N * | node,
 |  | Ifx_CAN_TXMSG * | txBufferElement,
 |  | IfxCan_FrameMode | frameMode
 | ) |  |

Sets CAN frame mode request for transmission. This function is deprecated. Use new function IfxCan_Node_setFrameModeReq.

Parameters
node | Specifies the pointer to the CAN Node registers
txBufferElement | Tx Buffer Element
frameMode | CAN frame mode
Returns
None

Definition at line 750 of file IfxCan.c.

◆ IfxCan_Node_setInitialisation()

IFX_INLINE void IfxCan_Node_setInitialisation | ( | Ifx_CAN_N * | node,
 |  | boolean | enable
 | ) |  |

Initialises the node
0= Normal Operation
1= Initialization is started.

Parameters
node | Specifies the pointer to the CAN Node registers
enable | Enable / Disable choice
Returns
None

Definition at line 2166 of file IfxCan.h.

◆ IfxCan_Node_setTransceiverDelayCompensationOffset()

IFX_INLINE void IfxCan_Node_setTransceiverDelayCompensationOffset | ( | Ifx_CAN_N * | node,
 |  | uint8 | delay
 | ) |  |

Sets Transceiver Delay Compensation offset.

Parameters
node | Specifies the pointer to the CAN Node registers
delay | delay offset value
Returns
None

Definition at line 2336 of file IfxCan.h.

Referenced by IfxCan_Can_initNode().


iLLD_TC38A: Tx Element Functions

Functions
Tx Element Functions
iLLD » CAN » Standard Interface
Collaboration diagram for Tx Element Functions:

Functions

IFX_INLINE IfxCan_TxBufferId | IfxCan_Node_getTxFifoQueuePutIndex (Ifx_CAN_N *node)
Returns Tx FIFO/Queue Put Index. More...
IFX_INLINE boolean | IfxCan_Node_isTxBufferCancellationFinished (Ifx_CAN_N *node, IfxCan_TxBufferId txBufferId)
Returns the status of whether cancellation is finished on the selected Tx buffer. More...
IFX_INLINE boolean | IfxCan_Node_isTxBufferRequestPending (Ifx_CAN_N *node, IfxCan_TxBufferId txBufferId)
Returns the status of pending request of the selected Tx buffer. More...
IFX_INLINE boolean | IfxCan_Node_isTxBufferTransmissionOccured (Ifx_CAN_N *node, IfxCan_TxBufferId txBufferId)
Returns the status of whether transmission occured on the selected Tx buffer. More...
IFX_INLINE boolean | IfxCan_Node_isTxFifoQueueFull (Ifx_CAN_N *node)
Returns the status of Tx Fifo/Queue is full or not. More...
IFX_INLINE void | IfxCan_Node_pauseTransmission (Ifx_CAN_N *node, boolean enable)
pauses the CAN Node for two CAN bit times before starting the next transmission More...
IFX_INLINE void | IfxCan_Node_setDataLength (Ifx_CAN_TXMSG *txBufferElement, IfxCan_DataLengthCode dataLengthCode)
Sets the Data Length Code (DLC) for transmit frame. More...
IFX_INLINE void | IfxCan_Node_setDataLengthCode (Ifx_CAN_N *node, Ifx_CAN_TXMSG *txBufferElement, IfxCan_DataLengthCode dataLengthCode)
Sets the Data Length Code (DLC) for transmit frame. This function is deprecated. Use new function IfxCan_Node_setDataLength. More...
IFX_INLINE void | IfxCan_Node_setDedicatedTxBuffersNumber (Ifx_CAN_N *node, uint8 number)
Sets the number of dedicated Tx Buffers. More...
IFX_INLINE void | IfxCan_Node_setErrStateIndicator (Ifx_CAN_TXMSG *txBufferElement, boolean enable)
Sets the Error State Indicator (ESI) for transmit frame. More...
IFX_INLINE void | IfxCan_Node_setErrorStateIndicator (Ifx_CAN_N *node, Ifx_CAN_TXMSG *txBufferElement, boolean enable)
Sets the Error State Indicator (ESI) for transmit frame. This function is decprecated. Use new function IfxCan_Node_setErrStateIndicator. More...
IFX_INLINE void | IfxCan_Node_setMessageMarker (Ifx_CAN_TXMSG *txBufferElement, IfxCan_TxBufferId bufferId)
Sets the Message Marker (MM) for transmit frame. More...
IFX_INLINE void | IfxCan_Node_setMsgId (Ifx_CAN_TXMSG *txBufferElement, uint32 messageId, IfxCan_MessageIdLength messageIdLength)
Sets the identifier (ID) for transmit frame. More...
IFX_INLINE void | IfxCan_Node_setMesssageId (Ifx_CAN_N *node, Ifx_CAN_TXMSG *txBufferElement, uint32 messageId, IfxCan_MessageIdLength messageIdLength)
Sets the identifier (ID) for transmit frame. This function is deprecated. Use the new function IfxCan_Node_setMsgId. More...
IFX_INLINE void | IfxCan_Node_setRemoteTransmitReq (Ifx_CAN_TXMSG *txBufferElement, boolean enable)
Sets the remote Transmit Request (RTR) for transmit frame. More...
IFX_INLINE void | IfxCan_Node_setRemoteTransmitRequest (Ifx_CAN_N *node, Ifx_CAN_TXMSG *txBufferElement, boolean enable)
Sets the remote Transmit Request (RTR) for transmit frame. This function is deprecated. Use new function IfxCan_Node_setRemoteTransmitReq. More...
IFX_INLINE void | IfxCan_Node_setTransmitFifoQueueMode (Ifx_CAN_N *node, IfxCan_TxMode mode)
Sets Transmit FIFO/Queue Mode. More...
IFX_INLINE void | IfxCan_Node_setTransmitFifoQueueSize (Ifx_CAN_N *node, uint8 number)
Sets Transmit FIFO/Queue Size. More...
IFX_INLINE void | IfxCan_Node_setTxBufferAddRequest (Ifx_CAN_N *node, IfxCan_TxBufferId txBufferId)
Sets the Add Request for the selected Tx buffer. More...
IFX_INLINE void | IfxCan_Node_setTxBufferCancellationRequest (Ifx_CAN_N *node, IfxCan_TxBufferId txBufferId)
Sets the Cancellation Request for the selected Tx buffer. More...
IFX_INLINE void | IfxCan_Node_setTxBufferDataFieldSize (Ifx_CAN_N *node, IfxCan_DataFieldSize size)
Sets Tx Buffer Data Field Size. More...
IFX_INLINE void | IfxCan_Node_setTxBuffersStartAddress (Ifx_CAN_N *node, uint16 address)
Sets the start address of Tx Buffers section in the Message RAM (32-bit word address) More...
IFX_INLINE void | IfxCan_Node_setTxEventFifoCtrl (Ifx_CAN_TXMSG *txBufferElement, boolean enable)
Sets the Tx Event Fifo Control (EFC) for transmit frame. More...
IFX_INLINE void | IfxCan_Node_setTxEventFifoControl (Ifx_CAN_N *node, Ifx_CAN_TXMSG *txBufferElement, boolean enable)
Sets the Tx Event Fifo Control (EFC) for transmit frame. This function is deprecated. Use new function IfxCan_Node_setTxEventFifoCtrl. More...
IFX_EXTERN uint8 | IfxCan_Node_getTxBufferDataFieldSize (Ifx_CAN_N *node)
Returns Tx Buffer Data Field Size in bytes. More...
IFX_EXTERN Ifx_CAN_TXMSG * | IfxCan_Node_getTxBufferElementAddress (Ifx_CAN_N *node, uint32 ramBaseAddress, uint16 txBuffersStartAddress, IfxCan_TxBufferId txBufferNumber)
Returns the address of selected Tx buffer element. More...
IFX_EXTERN void | IfxCan_Node_writeTxBufData (Ifx_CAN_TXMSG *txBufferElement, IfxCan_DataLengthCode dataLengthCode, uint32 *data)
Writes Data into Tx buffer element Node_writeTxBufData. More...
IFX_EXTERN void | IfxCan_Node_writeData (Ifx_CAN_N *node, Ifx_CAN_TXMSG *txBufferElement, IfxCan_DataLengthCode dataLengthCode, uint32 *data)
Writes Data into Tx buffer element. This function is deprecated. Use new function IfxCan_Node_writeTxBufData. More...

Detailed Description

Function Documentation

◆ IfxCan_Node_getTxBufferDataFieldSize()

IFX_EXTERN uint8 IfxCan_Node_getTxBufferDataFieldSize ( Ifx_CAN_N * node )

Returns Tx Buffer Data Field Size in bytes.

Parameters
node Specifies the pointer to the CAN Node registers
Returns
Data field size

Definition at line 288 of file IfxCan.c.

Referenced by IfxCan_Node_getTxBufferElementAddress().

◆ IfxCan_Node_getTxBufferElementAddress()

IFX_EXTERN Ifx_CAN_TXMSG* IfxCan_Node_getTxBufferElementAddress | ( | Ifx_CAN_N * | node,
 |  | uint32 | ramBaseAddress,
 |  | uint16 | txBuffersStartAddress,
 |  | IfxCan_TxBufferId | txBufferNumber
 | ) |  |

Returns the address of selected Tx buffer element.

Parameters
node | Specifies the pointer to the CAN Node registers
ramBaseAddress | Message RAM base address of CAN module
txBuffersStartAddress | Start address of Tx Buffers section in the Message RAM
txBufferNumber | Tx buffer element number
Returns
Tx Buffer Element Address

Definition at line 307 of file IfxCan.c.

Referenced by IfxCan_Can_sendMessage().

◆ IfxCan_Node_getTxFifoQueuePutIndex()

IFX_INLINE IfxCan_TxBufferId IfxCan_Node_getTxFifoQueuePutIndex ( Ifx_CAN_N * node )

Returns Tx FIFO/Queue Put Index.

Parameters
node Specifies the pointer to the CAN Node registers
Returns
Tx Buffer Element Number

Definition at line 2021 of file IfxCan.h.

Referenced by IfxCan_Can_sendMessage().

◆ IfxCan_Node_isTxBufferCancellationFinished()

IFX_INLINE boolean IfxCan_Node_isTxBufferCancellationFinished | ( | Ifx_CAN_N * | node,
 |  | IfxCan_TxBufferId | txBufferId
 | ) |  |

Returns the status of whether cancellation is finished on the selected Tx buffer.

Parameters
node | Specifies the pointer to the CAN Node registers
txBufferId | Tx Buffer number
Returns
Status

Definition at line 2033 of file IfxCan.h.

◆ IfxCan_Node_isTxBufferRequestPending()

IFX_INLINE boolean IfxCan_Node_isTxBufferRequestPending | ( | Ifx_CAN_N * | node,
 |  | IfxCan_TxBufferId | txBufferId
 | ) |  |

Returns the status of pending request of the selected Tx buffer.

Parameters
node | Specifies the pointer to the CAN Node registers
txBufferId | Tx Buffer number
Returns
Status

Definition at line 2041 of file IfxCan.h.

Referenced by IfxCan_Can_isTxBufferRequestPending().

◆ IfxCan_Node_isTxBufferTransmissionOccured()

IFX_INLINE boolean IfxCan_Node_isTxBufferTransmissionOccured | ( | Ifx_CAN_N * | node,
 |  | IfxCan_TxBufferId | txBufferId
 | ) |  |

Returns the status of whether transmission occured on the selected Tx buffer.

Parameters
node | Specifies the pointer to the CAN Node registers
txBufferId | Tx Buffer number
Returns
Status

Definition at line 2049 of file IfxCan.h.

◆ IfxCan_Node_isTxFifoQueueFull()

IFX_INLINE boolean IfxCan_Node_isTxFifoQueueFull ( Ifx_CAN_N * node )

Returns the status of Tx Fifo/Queue is full or not.

Parameters
node Specifies the pointer to the CAN Node registers
Returns
Status

Definition at line 2068 of file IfxCan.h.

Referenced by IfxCan_Can_isTxFifoQueueFull().

◆ IfxCan_Node_pauseTransmission()

IFX_INLINE void IfxCan_Node_pauseTransmission | ( | Ifx_CAN_N * | node,
 |  | boolean | enable
 | ) |  |

pauses the CAN Node for two CAN bit times before starting the next transmission

Parameters
node | Specifies the pointer to the CAN Node registers
enable | Enable / Disable choice
Returns
None

Definition at line 2074 of file IfxCan.h.

◆ IfxCan_Node_setDataLength()

IFX_INLINE void IfxCan_Node_setDataLength | ( | Ifx_CAN_TXMSG * | txBufferElement,
 |  | IfxCan_DataLengthCode | dataLengthCode
 | ) |  |

Sets the Data Length Code (DLC) for transmit frame.

Parameters
txBufferElement | Tx Buffer Element
dataLengthCode | DLC, data length code
Returns
None

Definition at line 2092 of file IfxCan.h.

Referenced by IfxCan_Can_sendMessage().

◆ IfxCan_Node_setDataLengthCode()

IFX_INLINE void IfxCan_Node_setDataLengthCode | ( | Ifx_CAN_N * | node,
 |  | Ifx_CAN_TXMSG * | txBufferElement,
 |  | IfxCan_DataLengthCode | dataLengthCode
 | ) |  |

Sets the Data Length Code (DLC) for transmit frame. This function is deprecated. Use new function IfxCan_Node_setDataLength.

Parameters
node | Specifies the pointer to the CAN Node registers
txBufferElement | Tx Buffer Element
dataLengthCode | DLC, data length code
Returns
None

Definition at line 2098 of file IfxCan.h.

◆ IfxCan_Node_setDedicatedTxBuffersNumber()

IFX_INLINE void IfxCan_Node_setDedicatedTxBuffersNumber | ( | Ifx_CAN_N * | node,
 |  | uint8 | number
 | ) |  |

Sets the number of dedicated Tx Buffers.

Parameters
node | Specifies the pointer to the CAN Node registers
number | Number of Tx Buffers
Returns
None

Definition at line 2105 of file IfxCan.h.

Referenced by IfxCan_Can_initNode().

◆ IfxCan_Node_setErrorStateIndicator()

IFX_INLINE void IfxCan_Node_setErrorStateIndicator | ( | Ifx_CAN_N * | node,
 |  | Ifx_CAN_TXMSG * | txBufferElement,
 |  | boolean | enable
 | ) |  |

Sets the Error State Indicator (ESI) for transmit frame. This function is decprecated. Use new function IfxCan_Node_setErrStateIndicator.

Parameters
node | Specifies the pointer to the CAN Node registers
txBufferElement | Tx Buffer Element
enable | Choice (True/ False)
Returns
None

Definition at line 2117 of file IfxCan.h.

◆ IfxCan_Node_setErrStateIndicator()

IFX_INLINE void IfxCan_Node_setErrStateIndicator | ( | Ifx_CAN_TXMSG * | txBufferElement,
 |  | boolean | enable
 | ) |  |

Sets the Error State Indicator (ESI) for transmit frame.

Parameters
txBufferElement | Tx Buffer Element
enable | Choice (True/ False)
Returns
None

Definition at line 2111 of file IfxCan.h.

Referenced by IfxCan_Can_sendMessage().

◆ IfxCan_Node_setMessageMarker()

IFX_INLINE void IfxCan_Node_setMessageMarker | ( | Ifx_CAN_TXMSG * | txBufferElement,
 |  | IfxCan_TxBufferId | bufferId
 | ) |  |

Sets the Message Marker (MM) for transmit frame.

Parameters
txBufferElement | Tx Buffer Element
bufferId | MM, Message Marker , Buffer Id
Returns
None

Definition at line 2172 of file IfxCan.h.

Referenced by IfxCan_Can_sendMessage().

◆ IfxCan_Node_setMesssageId()

IFX_INLINE void IfxCan_Node_setMesssageId | ( | Ifx_CAN_N * | node,
 |  | Ifx_CAN_TXMSG * | txBufferElement,
 |  | uint32 | messageId,
 |  | IfxCan_MessageIdLength | messageIdLength
 | ) |  |

Sets the identifier (ID) for transmit frame. This function is deprecated. Use the new function IfxCan_Node_setMsgId.

Parameters
node | Specifies the pointer to the CAN Node registers
txBufferElement | Tx Buffer Element
messageId | Identifier
messageIdLength | Message Id length (Standard / Extended)
Returns
None

Definition at line 2187 of file IfxCan.h.

◆ IfxCan_Node_setMsgId()

IFX_INLINE void IfxCan_Node_setMsgId | ( | Ifx_CAN_TXMSG * | txBufferElement,
 |  | uint32 | messageId,
 |  | IfxCan_MessageIdLength | messageIdLength
 | ) |  |

Sets the identifier (ID) for transmit frame.

Parameters
txBufferElement | Tx Buffer Element
messageId | Identifier
messageIdLength | Message Id length (Standard / Extended)
Returns
None

Definition at line 2178 of file IfxCan.h.

Referenced by IfxCan_Can_sendMessage().

◆ IfxCan_Node_setRemoteTransmitReq()

IFX_INLINE void IfxCan_Node_setRemoteTransmitReq | ( | Ifx_CAN_TXMSG * | txBufferElement,
 |  | boolean | enable
 | ) |  |

Sets the remote Transmit Request (RTR) for transmit frame.

Parameters
txBufferElement | Tx Buffer Element
enable | Choice (True/ False)
Returns
None

Definition at line 2197 of file IfxCan.h.

Referenced by IfxCan_Can_sendMessage().

◆ IfxCan_Node_setRemoteTransmitRequest()

IFX_INLINE void IfxCan_Node_setRemoteTransmitRequest | ( | Ifx_CAN_N * | node,
 |  | Ifx_CAN_TXMSG * | txBufferElement,
 |  | boolean | enable
 | ) |  |

Sets the remote Transmit Request (RTR) for transmit frame. This function is deprecated. Use new function IfxCan_Node_setRemoteTransmitReq.

Parameters
node | Specifies the pointer to the CAN Node registers
txBufferElement | Tx Buffer Element
enable | Choice (True/ False)
Returns
None

Definition at line 2203 of file IfxCan.h.

◆ IfxCan_Node_setTransmitFifoQueueMode()

IFX_INLINE void IfxCan_Node_setTransmitFifoQueueMode | ( | Ifx_CAN_N * | node,
 |  | IfxCan_TxMode | mode
 | ) |  |

Sets Transmit FIFO/Queue Mode.

Parameters
node | Specifies the pointer to the CAN Node registers
mode | Tx FIFO/Queue Mode
Returns
None

Definition at line 2345 of file IfxCan.h.

Referenced by IfxCan_Can_initNode().

◆ IfxCan_Node_setTransmitFifoQueueSize()

IFX_INLINE void IfxCan_Node_setTransmitFifoQueueSize | ( | Ifx_CAN_N * | node,
 |  | uint8 | number
 | ) |  |

Sets Transmit FIFO/Queue Size.

Parameters
node | Specifies the pointer to the CAN Node registers
number | Number of Tx Buffers used for Tx FIFO/Queue
Returns
None

Definition at line 2358 of file IfxCan.h.

Referenced by IfxCan_Can_initNode().

◆ IfxCan_Node_setTxBufferAddRequest()

IFX_INLINE void IfxCan_Node_setTxBufferAddRequest | ( | Ifx_CAN_N * | node,
 |  | IfxCan_TxBufferId | txBufferId
 | ) |  |

Sets the Add Request for the selected Tx buffer.

Parameters
node | Specifies the pointer to the CAN Node registers
txBufferId | Tx Buffer number
Returns
None

Definition at line 2364 of file IfxCan.h.

Referenced by IfxCan_Can_sendMessage().

◆ IfxCan_Node_setTxBufferCancellationRequest()

IFX_INLINE void IfxCan_Node_setTxBufferCancellationRequest | ( | Ifx_CAN_N * | node,
 |  | IfxCan_TxBufferId | txBufferId
 | ) |  |

Sets the Cancellation Request for the selected Tx buffer.

Parameters
node | Specifies the pointer to the CAN Node registers
txBufferId | Tx Buffer number
Returns
None

Definition at line 2371 of file IfxCan.h.

◆ IfxCan_Node_setTxBufferDataFieldSize()

IFX_INLINE void IfxCan_Node_setTxBufferDataFieldSize | ( | Ifx_CAN_N * | node,
 |  | IfxCan_DataFieldSize | size
 | ) |  |

Sets Tx Buffer Data Field Size.

Parameters
node | Specifies the pointer to the CAN Node registers
size | Tx Buffer Data Field Size
Returns
None

Definition at line 2378 of file IfxCan.h.

Referenced by IfxCan_Can_initNode().

◆ IfxCan_Node_setTxBuffersStartAddress()

IFX_INLINE void IfxCan_Node_setTxBuffersStartAddress | ( | Ifx_CAN_N * | node,
 |  | uint16 | address
 | ) |  |

Sets the start address of Tx Buffers section in the Message RAM (32-bit word address)

Parameters
node | Specifies the pointer to the CAN Node registers
address | Start address of Tx Buffers in the message RAM
Returns
None

Definition at line 2384 of file IfxCan.h.

Referenced by IfxCan_Can_initNode().

◆ IfxCan_Node_setTxEventFifoControl()

IFX_INLINE void IfxCan_Node_setTxEventFifoControl | ( | Ifx_CAN_N * | node,
 |  | Ifx_CAN_TXMSG * | txBufferElement,
 |  | boolean | enable
 | ) |  |

Sets the Tx Event Fifo Control (EFC) for transmit frame. This function is deprecated. Use new function IfxCan_Node_setTxEventFifoCtrl.

Parameters
node | Specifies the pointer to the CAN Node registers
txBufferElement | Tx Buffer Element
enable | Choice (True/ False)
Returns
None

Definition at line 2396 of file IfxCan.h.

◆ IfxCan_Node_setTxEventFifoCtrl()

IFX_INLINE void IfxCan_Node_setTxEventFifoCtrl | ( | Ifx_CAN_TXMSG * | txBufferElement,
 |  | boolean | enable
 | ) |  |

Sets the Tx Event Fifo Control (EFC) for transmit frame.

Parameters
txBufferElement | Tx Buffer Element
enable | Choice (True/ False)
Returns
None

Definition at line 2390 of file IfxCan.h.

Referenced by IfxCan_Can_sendMessage().

◆ IfxCan_Node_writeData()

IFX_EXTERN void IfxCan_Node_writeData | ( | Ifx_CAN_N * | node,
 |  | Ifx_CAN_TXMSG * | txBufferElement,
 |  | IfxCan_DataLengthCode | dataLengthCode,
 |  | uint32 * | data
 | ) |  |

Writes Data into Tx buffer element. This function is deprecated. Use new function IfxCan_Node_writeTxBufData.

Parameters
node | Specifies the pointer to the CAN Node registers
txBufferElement | Tx Buffer Element
dataLengthCode | DLC, Data Length Code
data | Pointer to data (in words)
Returns
None

Definition at line 873 of file IfxCan.c.

◆ IfxCan_Node_writeTxBufData()

IFX_EXTERN void IfxCan_Node_writeTxBufData | ( | Ifx_CAN_TXMSG * | txBufferElement,
 |  | IfxCan_DataLengthCode | dataLengthCode,
 |  | uint32 * | data
 | ) |  |

Writes Data into Tx buffer element Node_writeTxBufData.

Parameters
txBufferElement | Tx Buffer Element
dataLengthCode | DLC, Data Length Code
data | Pointer to data (in words)
Returns
None

Definition at line 857 of file IfxCan.c.

Referenced by IfxCan_Can_sendMessage().


iLLD_TC38A: Rx Element Functions

Functions
Rx Element Functions
iLLD » CAN » Standard Interface
Collaboration diagram for Rx Element Functions:

Functions

IFX_INLINE uint32 | IfxCan_Node_getDataLengthCode (Ifx_CAN_RXMSG *rxBufferElement)
Returns the Data Length Code from the received frame. More...
IFX_INLINE uint32 | IfxCan_Node_getMesssageId (Ifx_CAN_RXMSG *rxBufferElement)
Returns the identifier (ID) from the received frame. More...
IFX_INLINE uint8 | IfxCan_Node_getRxFifo0FillLevel (Ifx_CAN_N *node)
Returns Rx FIFO 0 Fill Level. More...
IFX_INLINE IfxCan_RxBufferId | IfxCan_Node_getRxFifo0GetIndex (Ifx_CAN_N *node)
Returns Rx FIFO 0 get index. More...
IFX_INLINE uint8 | IfxCan_Node_getRxFifo1FillLevel (Ifx_CAN_N *node)
Returns Rx FIFO 1 Fill Level. More...
IFX_INLINE IfxCan_RxBufferId | IfxCan_Node_getRxFifo1GetIndex (Ifx_CAN_N *node)
Returns Rx FIFO 1 get index. More...
IFX_INLINE void | IfxCan_Node_setRxBufferDataFieldSize (Ifx_CAN_N *node, IfxCan_DataFieldSize size)
Sets Rx Buffer Data Field Size. More...
IFX_INLINE void | IfxCan_Node_setRxBuffersStartAddress (Ifx_CAN_N *node, uint16 address)
Sets the start address of Rx Buffers section in the Message RAM (32-bit word address) More...
IFX_INLINE void | IfxCan_Node_setRxFifo0AcknowledgeIndex (Ifx_CAN_N *node, IfxCan_RxBufferId RxBufferNumber)
Sets Rx FIFO 0 Acknowledge Index. More...
IFX_INLINE void | IfxCan_Node_setRxFifo0DataFieldSize (Ifx_CAN_N *node, IfxCan_DataFieldSize size)
Sets Rx Buffer Fifo 0 Data Field Size. More...
IFX_INLINE void | IfxCan_Node_setRxFifo0OperatingMode (Ifx_CAN_N *node, IfxCan_RxFifoMode mode)
Sets Rx Buffer Fifo 0 operating mode. More...
IFX_INLINE void | IfxCan_Node_setRxFifo0Size (Ifx_CAN_N *node, uint8 size)
Sets Rx FIFO 0 Size. More...
IFX_INLINE void | IfxCan_Node_setRxFifo0StartAddress (Ifx_CAN_N *node, uint16 address)
Sets the start address of Rx FIFO 0 section in the Message RAM (32-bit word address) More...
IFX_INLINE void | IfxCan_Node_setRxFifo0WatermarkLevel (Ifx_CAN_N *node, uint8 level)
Sets Rx FIFO 0 Watermark Level. More...
IFX_INLINE void | IfxCan_Node_setRxFifo1AcknowledgeIndex (Ifx_CAN_N *node, IfxCan_RxBufferId RxBufferNumber)
Sets Rx FIFO 1 Acknowledge Index. More...
IFX_INLINE void | IfxCan_Node_setRxFifo1DataFieldSize (Ifx_CAN_N *node, IfxCan_DataFieldSize size)
Sets Rx Buffer Fifo 1 Data Field Size. More...
IFX_INLINE void | IfxCan_Node_setRxFifo1OperatingMode (Ifx_CAN_N *node, IfxCan_RxFifoMode mode)
Sets Rx Buffer Fifo 1 operating mode. More...
IFX_INLINE void | IfxCan_Node_setRxFifo1Size (Ifx_CAN_N *node, uint8 size)
Sets Rx FIFO 1 Size. More...
IFX_INLINE void | IfxCan_Node_setRxFifo1StartAddress (Ifx_CAN_N *node, uint16 address)
Sets the start address of Rx FIFO 1 section in the Message RAM (32-bit word address) More...
IFX_INLINE void | IfxCan_Node_setRxFifo1WatermarkLevel (Ifx_CAN_N *node, uint8 level)
Sets Rx FIFO 1 Watermark Level. More...
IFX_EXTERN void | IfxCan_Node_clearRxBufferNewDataFlag (Ifx_CAN_N *node, IfxCan_RxBufferId rxBufferId)
Clears the New Data flag of the selected Rx buffer. More...
IFX_EXTERN uint8 | IfxCan_Node_getRxBufferDataFieldSize (Ifx_CAN_N *node)
Returns Rx Buffer Data Field Size in bytes. More...
IFX_EXTERN Ifx_CAN_RXMSG * | IfxCan_Node_getRxBufferElementAddress (Ifx_CAN_N *node, uint32 ramBaseAddress, uint16 rxBuffersStartAddress, IfxCan_RxBufferId rxBufferNumber)
Returns the address of selected Rx buffer element. More...
IFX_EXTERN uint8 | IfxCan_Node_getRxFifo0DataFieldSize (Ifx_CAN_N *node)
Returns Rx FIFO 0 Data Field Size in bytes. More...
IFX_EXTERN Ifx_CAN_RXMSG * | IfxCan_Node_getRxFifo0ElementAddress (Ifx_CAN_N *node, uint32 ramBaseAddress, uint16 rxFifo0StartAddress, IfxCan_RxBufferId rxBufferNumber)
Returns the address of selected Rx FIFO 0 element. More...
IFX_EXTERN uint8 | IfxCan_Node_getRxFifo1DataFieldSize (Ifx_CAN_N *node)
Returns Rx FIFO 1 Data Field Size in bytes. More...
IFX_EXTERN Ifx_CAN_RXMSG * | IfxCan_Node_getRxFifo1ElementAddress (Ifx_CAN_N *node, uint32 ramBaseAddress, uint16 rxFifo1StartAddress, IfxCan_RxBufferId rxBufferNumber)
Returns the address of selected Rx FIFO 1 element. More...
IFX_EXTERN boolean | IfxCan_Node_isRxBufferNewDataUpdated (Ifx_CAN_N *node, IfxCan_RxBufferId rxBufferId)
Returns the status of whether the selcted Rx buffer has been updated from new data. More...
IFX_EXTERN void | IfxCan_Node_readData (Ifx_CAN_RXMSG *rxBufferElement, IfxCan_DataLengthCode dataLengthCode, uint32 *data)
Reads data from Rx buffer element. More...

Detailed Description

Function Documentation

◆ IfxCan_Node_clearRxBufferNewDataFlag()

IFX_EXTERN void IfxCan_Node_clearRxBufferNewDataFlag | ( | Ifx_CAN_N * | node,
 |  | IfxCan_RxBufferId | rxBufferId
 | ) |  |

Clears the New Data flag of the selected Rx buffer.

Parameters
node | Specifies the pointer to the CAN Node registers
rxBufferId | Rx Buffer number
Returns
None

Definition at line 54 of file IfxCan.c.

Referenced by IfxCan_Can_readMessage().

◆ IfxCan_Node_getDataLengthCode()

IFX_INLINE uint32 IfxCan_Node_getDataLengthCode ( Ifx_CAN_RXMSG * rxBufferElement )

Returns the Data Length Code from the received frame.

Parameters
rxBufferElement Rx Buffer Element
Returns
Data Length Code

Definition at line 1891 of file IfxCan.h.

Referenced by IfxCan_Can_readMessage().

◆ IfxCan_Node_getMesssageId()

IFX_INLINE uint32 IfxCan_Node_getMesssageId ( Ifx_CAN_RXMSG * rxBufferElement )

Returns the identifier (ID) from the received frame.

Parameters
rxBufferElement Rx Buffer Element
Returns
Identifier

Definition at line 1923 of file IfxCan.h.

Referenced by IfxCan_Can_readMessage().

◆ IfxCan_Node_getRxBufferDataFieldSize()

IFX_EXTERN uint8 IfxCan_Node_getRxBufferDataFieldSize ( Ifx_CAN_N * node )

Returns Rx Buffer Data Field Size in bytes.

Parameters
node Specifies the pointer to the CAN Node registers
Returns
Data field size

Definition at line 181 of file IfxCan.c.

Referenced by IfxCan_Node_getRxBufferElementAddress().

◆ IfxCan_Node_getRxBufferElementAddress()

IFX_EXTERN Ifx_CAN_RXMSG* IfxCan_Node_getRxBufferElementAddress | ( | Ifx_CAN_N * | node,
 |  | uint32 | ramBaseAddress,
 |  | uint16 | rxBuffersStartAddress,
 |  | IfxCan_RxBufferId | rxBufferNumber
 | ) |  |

Returns the address of selected Rx buffer element.

Parameters
node | Specifies the pointer to the CAN Node registers
ramBaseAddress | Message RAM base address of CAN Module
rxBuffersStartAddress | Start address of Rx Buffers section in the Message RAM
rxBufferNumber | Rx buffer element number
Returns
Rx Buffer Element Address

Definition at line 200 of file IfxCan.c.

Referenced by IfxCan_Can_readMessage().

◆ IfxCan_Node_getRxFifo0DataFieldSize()

IFX_EXTERN uint8 IfxCan_Node_getRxFifo0DataFieldSize ( Ifx_CAN_N * node )

Returns Rx FIFO 0 Data Field Size in bytes.

Parameters
node Specifies the pointer to the CAN Node registers
Returns
Data field size

Definition at line 213 of file IfxCan.c.

Referenced by IfxCan_Node_getRxFifo0ElementAddress().

◆ IfxCan_Node_getRxFifo0ElementAddress()

IFX_EXTERN Ifx_CAN_RXMSG* IfxCan_Node_getRxFifo0ElementAddress | ( | Ifx_CAN_N * | node,
 |  | uint32 | ramBaseAddress,
 |  | uint16 | rxFifo0StartAddress,
 |  | IfxCan_RxBufferId | rxBufferNumber
 | ) |  |

Returns the address of selected Rx FIFO 0 element.

Parameters
node | Specifies the pointer to the CAN Node registers
ramBaseAddress | Message RAM base address of CAN Module
rxFifo0StartAddress | Start address of Rx FIFO 0 section in the Message RAM
rxBufferNumber | Rx buffer element number
Returns
Rx FIFO 0 Element Address

Definition at line 232 of file IfxCan.c.

Referenced by IfxCan_Can_readMessage().

◆ IfxCan_Node_getRxFifo0FillLevel()

IFX_INLINE uint8 IfxCan_Node_getRxFifo0FillLevel ( Ifx_CAN_N * node )

Returns Rx FIFO 0 Fill Level.

Parameters
node Specifies the pointer to the CAN Node registers
Returns
Fill level

Definition at line 1949 of file IfxCan.h.

Referenced by IfxCan_Can_getRxFifo0FillLevel().

◆ IfxCan_Node_getRxFifo0GetIndex()

IFX_INLINE IfxCan_RxBufferId IfxCan_Node_getRxFifo0GetIndex ( Ifx_CAN_N * node )

Returns Rx FIFO 0 get index.

Parameters
node Specifies the pointer to the CAN Node registers
Returns
Rx Buffer Element Number

Definition at line 1955 of file IfxCan.h.

Referenced by IfxCan_Can_readMessage().

◆ IfxCan_Node_getRxFifo1DataFieldSize()

IFX_EXTERN uint8 IfxCan_Node_getRxFifo1DataFieldSize ( Ifx_CAN_N * node )

Returns Rx FIFO 1 Data Field Size in bytes.

Parameters
node Specifies the pointer to the CAN Node registers
Returns
Data field size

Definition at line 245 of file IfxCan.c.

Referenced by IfxCan_Node_getRxFifo1ElementAddress().

◆ IfxCan_Node_getRxFifo1ElementAddress()

IFX_EXTERN Ifx_CAN_RXMSG* IfxCan_Node_getRxFifo1ElementAddress | ( | Ifx_CAN_N * | node,
 |  | uint32 | ramBaseAddress,
 |  | uint16 | rxFifo1StartAddress,
 |  | IfxCan_RxBufferId | rxBufferNumber
 | ) |  |

Returns the address of selected Rx FIFO 1 element.

Parameters
node | Specifies the pointer to the CAN Node registers
ramBaseAddress | Message RAM base address of CAN Module
rxFifo1StartAddress | Start address of Rx FIFO 1 section in the Message RAM
rxBufferNumber | Rx buffer element number
Returns
Rx FIFO 1 Element Address

Definition at line 264 of file IfxCan.c.

Referenced by IfxCan_Can_readMessage().

◆ IfxCan_Node_getRxFifo1FillLevel()

IFX_INLINE uint8 IfxCan_Node_getRxFifo1FillLevel ( Ifx_CAN_N * node )

Returns Rx FIFO 1 Fill Level.

Parameters
node Specifies the pointer to the CAN Node registers
Returns
Fill level

Definition at line 1961 of file IfxCan.h.

Referenced by IfxCan_Can_getRxFifo1FillLevel().

◆ IfxCan_Node_getRxFifo1GetIndex()

IFX_INLINE IfxCan_RxBufferId IfxCan_Node_getRxFifo1GetIndex ( Ifx_CAN_N * node )

Returns Rx FIFO 1 get index.

Parameters
node Specifies the pointer to the CAN Node registers
Returns
Rx Buffer Element Number

Definition at line 1967 of file IfxCan.h.

Referenced by IfxCan_Can_readMessage().

◆ IfxCan_Node_isRxBufferNewDataUpdated()

IFX_EXTERN boolean IfxCan_Node_isRxBufferNewDataUpdated | ( | Ifx_CAN_N * | node,
 |  | IfxCan_RxBufferId | rxBufferId
 | ) |  |

Returns the status of whether the selcted Rx buffer has been updated from new data.

Parameters
node | Specifies the pointer to the CAN Node registers
rxBufferId | Rx Buffer number
Returns
Status

Definition at line 350 of file IfxCan.c.

Referenced by IfxCan_Can_isNewDataReceived().

◆ IfxCan_Node_readData()

IFX_EXTERN void IfxCan_Node_readData | ( | Ifx_CAN_RXMSG * | rxBufferElement,
 |  | IfxCan_DataLengthCode | dataLengthCode,
 |  | uint32 * | data
 | ) |  |

Reads data from Rx buffer element.

Parameters
rxBufferElement | Rx Buffer Element
dataLengthCode | DLC, Data Length Code
data | Pointer to data (in words)
Returns
None

Definition at line 370 of file IfxCan.c.

Referenced by IfxCan_Can_readMessage().

◆ IfxCan_Node_setRxBufferDataFieldSize()

IFX_INLINE void IfxCan_Node_setRxBufferDataFieldSize | ( | Ifx_CAN_N * | node,
 |  | IfxCan_DataFieldSize | size
 | ) |  |

Sets Rx Buffer Data Field Size.

Parameters
node | Specifies the pointer to the CAN Node registers
size | Rx Buffer Data Field Size
Returns
None

Definition at line 2210 of file IfxCan.h.

Referenced by IfxCan_Can_initNode().

◆ IfxCan_Node_setRxBuffersStartAddress()

IFX_INLINE void IfxCan_Node_setRxBuffersStartAddress | ( | Ifx_CAN_N * | node,
 |  | uint16 | address
 | ) |  |

Sets the start address of Rx Buffers section in the Message RAM (32-bit word address)

Parameters
node | Specifies the pointer to the CAN Node registers
address | Start address of Rx Buffers in the Message RAM
Returns
None

Definition at line 2216 of file IfxCan.h.

Referenced by IfxCan_Can_initNode().

◆ IfxCan_Node_setRxFifo0AcknowledgeIndex()

IFX_INLINE void IfxCan_Node_setRxFifo0AcknowledgeIndex | ( | Ifx_CAN_N * | node,
 |  | IfxCan_RxBufferId | RxBufferNumber
 | ) |  |

Sets Rx FIFO 0 Acknowledge Index.

Parameters
node | Specifies the pointer to the CAN Node registers
RxBufferNumber | Rx buffer element number
Returns
None

Definition at line 2222 of file IfxCan.h.

Referenced by IfxCan_Can_readMessage().

◆ IfxCan_Node_setRxFifo0DataFieldSize()

IFX_INLINE void IfxCan_Node_setRxFifo0DataFieldSize | ( | Ifx_CAN_N * | node,
 |  | IfxCan_DataFieldSize | size
 | ) |  |

Sets Rx Buffer Fifo 0 Data Field Size.

Parameters
node | Specifies the pointer to the CAN Node registers
size | Rx FIFO 0 Data Field Size
Returns
None

Definition at line 2228 of file IfxCan.h.

Referenced by IfxCan_Can_initNode().

◆ IfxCan_Node_setRxFifo0OperatingMode()

IFX_INLINE void IfxCan_Node_setRxFifo0OperatingMode | ( | Ifx_CAN_N * | node,
 |  | IfxCan_RxFifoMode | mode
 | ) |  |

Sets Rx Buffer Fifo 0 operating mode.

Parameters
node | Specifies the pointer to the CAN Node registers
mode | Rx FIFO 0 operating Mode
Returns
None

Definition at line 2234 of file IfxCan.h.

Referenced by IfxCan_Can_initNode().

◆ IfxCan_Node_setRxFifo0Size()

IFX_INLINE void IfxCan_Node_setRxFifo0Size | ( | Ifx_CAN_N * | node,
 |  | uint8 | size
 | ) |  |

Sets Rx FIFO 0 Size.

Parameters
node | Specifies the pointer to the CAN Node registers
size | Rx FIFO 0 Size
Returns
None

Definition at line 2240 of file IfxCan.h.

Referenced by IfxCan_Can_initNode().

◆ IfxCan_Node_setRxFifo0StartAddress()

IFX_INLINE void IfxCan_Node_setRxFifo0StartAddress | ( | Ifx_CAN_N * | node,
 |  | uint16 | address
 | ) |  |

Sets the start address of Rx FIFO 0 section in the Message RAM (32-bit word address)

Parameters
node | Specifies the pointer to the CAN Node registers
address | Start address of Rx FIFO 0 in the Message RAM
Returns
None

Definition at line 2246 of file IfxCan.h.

Referenced by IfxCan_Can_initNode().

◆ IfxCan_Node_setRxFifo0WatermarkLevel()

IFX_INLINE void IfxCan_Node_setRxFifo0WatermarkLevel | ( | Ifx_CAN_N * | node,
 |  | uint8 | level
 | ) |  |

Sets Rx FIFO 0 Watermark Level.

Parameters
node | Specifies the pointer to the CAN Node registers
level | Rx FIFO 0 Watermark Level
Returns
None

Definition at line 2252 of file IfxCan.h.

Referenced by IfxCan_Can_initNode().

◆ IfxCan_Node_setRxFifo1AcknowledgeIndex()

IFX_INLINE void IfxCan_Node_setRxFifo1AcknowledgeIndex | ( | Ifx_CAN_N * | node,
 |  | IfxCan_RxBufferId | RxBufferNumber
 | ) |  |

Sets Rx FIFO 1 Acknowledge Index.

Parameters
node | Specifies the pointer to the CAN Node registers
RxBufferNumber | Rx buffer element number
Returns
None

Definition at line 2258 of file IfxCan.h.

Referenced by IfxCan_Can_readMessage().

◆ IfxCan_Node_setRxFifo1DataFieldSize()

IFX_INLINE void IfxCan_Node_setRxFifo1DataFieldSize | ( | Ifx_CAN_N * | node,
 |  | IfxCan_DataFieldSize | size
 | ) |  |

Sets Rx Buffer Fifo 1 Data Field Size.

Parameters
node | Specifies the pointer to the CAN Node registers
size | Rx FIFO 1 Data Field Size
Returns
None

Definition at line 2264 of file IfxCan.h.

Referenced by IfxCan_Can_initNode().

◆ IfxCan_Node_setRxFifo1OperatingMode()

IFX_INLINE void IfxCan_Node_setRxFifo1OperatingMode | ( | Ifx_CAN_N * | node,
 |  | IfxCan_RxFifoMode | mode
 | ) |  |

Sets Rx Buffer Fifo 1 operating mode.

Parameters
node | Specifies the pointer to the CAN Node registers
mode | Rx FIFO 1 operating Mode
Returns
None

Definition at line 2270 of file IfxCan.h.

Referenced by IfxCan_Can_initNode().

◆ IfxCan_Node_setRxFifo1Size()

IFX_INLINE void IfxCan_Node_setRxFifo1Size | ( | Ifx_CAN_N * | node,
 |  | uint8 | size
 | ) |  |

Sets Rx FIFO 1 Size.

Parameters
node | Specifies the pointer to the CAN Node registers
size | Rx FIFO 1 Size
Returns
None

Definition at line 2276 of file IfxCan.h.

Referenced by IfxCan_Can_initNode().

◆ IfxCan_Node_setRxFifo1StartAddress()

IFX_INLINE void IfxCan_Node_setRxFifo1StartAddress | ( | Ifx_CAN_N * | node,
 |  | uint16 | address
 | ) |  |

Sets the start address of Rx FIFO 1 section in the Message RAM (32-bit word address)

Parameters
node | Specifies the pointer to the CAN Node registers
address | Start address of Rx FIFO 1 in the Message RAM
Returns
None

Definition at line 2282 of file IfxCan.h.

Referenced by IfxCan_Can_initNode().

◆ IfxCan_Node_setRxFifo1WatermarkLevel()

IFX_INLINE void IfxCan_Node_setRxFifo1WatermarkLevel | ( | Ifx_CAN_N * | node,
 |  | uint8 | level
 | ) |  |

Sets Rx FIFO 1 Watermark Level.

Parameters
node | Specifies the pointer to the CAN Node registers
level | Rx FIFO 1 Watermark Level
Returns
None

Definition at line 2288 of file IfxCan.h.

Referenced by IfxCan_Can_initNode().


iLLD_TC38A: Filter Functions

Functions
Filter Functions
iLLD » CAN » Standard Interface
Collaboration diagram for Filter Functions:

Functions

IFX_INLINE void | IfxCan_Node_acceptRemoteFramesWithStandardId (Ifx_CAN_N *node)
Disables the selected interrupt. More...
IFX_INLINE void | IfxCan_Node_acceptRemoteFrameswithExtendedId (Ifx_CAN_N *node)
Disables the selected interrupt. More...
IFX_INLINE void | IfxCan_Node_configureExtendedFilterForNonMatchingFrames (Ifx_CAN_N *node, IfxCan_NonMatchingFrame filter)
Configure the filter for non matching frames with extended id. More...
IFX_INLINE void | IfxCan_Node_configureStandardFilterForNonMatchingFrames (Ifx_CAN_N *node, IfxCan_NonMatchingFrame filter)
Configure the filter for non matching frames with standard id. More...
IFX_INLINE void | IfxCan_Node_rejectRemoteFramesWithExtendedId (Ifx_CAN_N *node)
Reject the remote frames with extended id. More...
IFX_INLINE void | IfxCan_Node_rejectRemoteFramesWithStandardId (Ifx_CAN_N *node)
Reject the remote frames with standard id. More...
IFX_INLINE void | IfxCan_Node_setExtendedFilterConfiguration (Ifx_CAN_EXTMSG *extendedFilterElement, IfxCan_FilterElementConfiguration filterElementConfiguration)
Sets the Extended Filter Element Configuration. More...
IFX_INLINE void | IfxCan_Node_setExtendedFilterId1 (Ifx_CAN_EXTMSG *extendedFilterElement, uint32 id)
Sets the Extended Filter ID 1 for Extended Filter Element. More...
IFX_INLINE void | IfxCan_Node_setExtendedFilterId2 (Ifx_CAN_EXTMSG *extendedFilterElement, uint32 id)
Sets the Extended Filter ID 2 for Extended Filter Element. More...
IFX_INLINE void | IfxCan_Node_setExtendedFilterListSize (Ifx_CAN_N *node, uint8 size)
Sets the Extended Message ID filter list size. More...
IFX_INLINE void | IfxCan_Node_setExtendedFilterListStartAddress (Ifx_CAN_N *node, uint16 address)
Sets the start address of Extended Message ID filter list (32-bit word address) More...
IFX_INLINE void | IfxCan_Node_setExtendedFilterRxBufferOffset (Ifx_CAN_EXTMSG *extendedFilterElement, IfxCan_RxBufferId rxBufferNumber)
Sets the Offset to the Rx Buffer Start Address RXBC.RBSA for storage of a matching message for Extended filter element. More...
IFX_INLINE void | IfxCan_Node_setExtendedFilterType (Ifx_CAN_EXTMSG *extendedFilterElement, IfxCan_FilterType filterType)
Sets the Extended Filter Type for Extended Filter Element. More...
IFX_INLINE void | IfxCan_Node_setStandardFilterConfiguration (Ifx_CAN_STDMSG *standardFilterElement, IfxCan_FilterElementConfiguration filterElementConfiguration)
Sets the Standard Filter Element Configuration. More...
IFX_INLINE void | IfxCan_Node_setStandardFilterId1 (Ifx_CAN_STDMSG *standardFilterElement, uint32 id)
Sets the Standard Filter ID 1 for Standard Filter Element. More...
IFX_INLINE void | IfxCan_Node_setStandardFilterId2 (Ifx_CAN_STDMSG *standardFilterElement, uint32 id)
Sets the Standard Filter ID 2 for Standard Filter Element. More...
IFX_INLINE void | IfxCan_Node_setStandardFilterListSize (Ifx_CAN_N *node, uint8 size)
Sets the Standard Message ID filter list size. More...
IFX_INLINE void | IfxCan_Node_setStandardFilterListStartAddress (Ifx_CAN_N *node, uint16 address)
Sets the start address of Standard Message ID filter list (32-bit word address) More...
IFX_INLINE void | IfxCan_Node_setStandardFilterRxBufferOffset (Ifx_CAN_STDMSG *standardFilterElement, IfxCan_RxBufferId rxBufferNumber)
Sets the Offset to the Rx Buffer Start Address RXBC.RBSA for storage of a matching message for standard filter element. More...
IFX_INLINE void | IfxCan_Node_setStandardFilterType (Ifx_CAN_STDMSG *standardFilterElement, IfxCan_FilterType filterType)
Sets the Standard Filter Type for Standard Filter Element. More...
IFX_EXTERN Ifx_CAN_EXTMSG * | IfxCan_Node_getExtendedFilterElementAddress (uint32 ramBaseAddress, uint16 extendedFilterListStartAddress, uint8 filterNumber)
Returns the address of selected extended filter element. More...
IFX_EXTERN Ifx_CAN_STDMSG * | IfxCan_Node_getStandardFilterElementAddress (uint32 ramBaseAddress, uint16 standardFilterListStartAddress, uint8 filterNumber)
Returns the address of selected standard filter element. More...

Detailed Description

Function Documentation

◆ IfxCan_Node_acceptRemoteFrameswithExtendedId()

IFX_INLINE void IfxCan_Node_acceptRemoteFrameswithExtendedId ( Ifx_CAN_N * node )

Disables the selected interrupt.

Parameters
node Specifies the pointer to the CAN Node registers
Returns
None

Definition at line 1759 of file IfxCan.h.

◆ IfxCan_Node_acceptRemoteFramesWithStandardId()

IFX_INLINE void IfxCan_Node_acceptRemoteFramesWithStandardId ( Ifx_CAN_N * node )

Disables the selected interrupt.

Parameters
node Specifies the pointer to the CAN Node registers
Returns
None

Definition at line 1753 of file IfxCan.h.

◆ IfxCan_Node_configureExtendedFilterForNonMatchingFrames()

IFX_INLINE void IfxCan_Node_configureExtendedFilterForNonMatchingFrames | ( | Ifx_CAN_N * | node,
 |  | IfxCan_NonMatchingFrame | filter
 | ) |  |

Configure the filter for non matching frames with extended id.

Parameters
node | Specifies the pointer to the CAN Node registers
filter | action to be performed on non matching messages.
Returns
None

Definition at line 1772 of file IfxCan.h.

Referenced by IfxCan_Can_initNode().

◆ IfxCan_Node_configureStandardFilterForNonMatchingFrames()

IFX_INLINE void IfxCan_Node_configureStandardFilterForNonMatchingFrames | ( | Ifx_CAN_N * | node,
 |  | IfxCan_NonMatchingFrame | filter
 | ) |  |

Configure the filter for non matching frames with standard id.

Parameters
node | Specifies the pointer to the CAN Node registers
filter | action to be performed on non matching messages.
Returns
None

Definition at line 1778 of file IfxCan.h.

Referenced by IfxCan_Can_initNode().

◆ IfxCan_Node_getExtendedFilterElementAddress()

IFX_EXTERN Ifx_CAN_EXTMSG* IfxCan_Node_getExtendedFilterElementAddress | ( | uint32 | ramBaseAddress,
 |  | uint16 | extendedFilterListStartAddress,
 |  | uint8 | filterNumber
 | ) |  |

Returns the address of selected extended filter element.

Parameters
ramBaseAddress | Message RAM base address of CAN Module
extendedFilterListStartAddress | Start address of Extended Message ID filter list (32-bit word address)
filterNumber | extended filter element number
Returns
Extended Filter Element Address

Definition at line 114 of file IfxCan.c.

Referenced by IfxCan_Can_setExtendedFilter().

◆ IfxCan_Node_getStandardFilterElementAddress()

IFX_EXTERN Ifx_CAN_STDMSG* IfxCan_Node_getStandardFilterElementAddress | ( | uint32 | ramBaseAddress,
 |  | uint16 | standardFilterListStartAddress,
 |  | uint8 | filterNumber
 | ) |  |

Returns the address of selected standard filter element.

Parameters
ramBaseAddress | Message RAM base address of CAN Module
standardFilterListStartAddress | Start address of Standard Message ID filter list (32-bit word address)
filterNumber | Standard filter element number
Returns
Standard Filter Element Address

Definition at line 277 of file IfxCan.c.

Referenced by IfxCan_Can_setStandardFilter().

◆ IfxCan_Node_rejectRemoteFramesWithExtendedId()

IFX_INLINE void IfxCan_Node_rejectRemoteFramesWithExtendedId ( Ifx_CAN_N * node )

Reject the remote frames with extended id.

Parameters
node Specifies the pointer to the CAN Node registers
Returns
None

Definition at line 2080 of file IfxCan.h.

Referenced by IfxCan_Can_initNode().

◆ IfxCan_Node_rejectRemoteFramesWithStandardId()

IFX_INLINE void IfxCan_Node_rejectRemoteFramesWithStandardId ( Ifx_CAN_N * node )

Reject the remote frames with standard id.

Parameters
node Specifies the pointer to the CAN Node registers
Returns
None

Definition at line 2086 of file IfxCan.h.

Referenced by IfxCan_Can_initNode().

◆ IfxCan_Node_setExtendedFilterConfiguration()

IFX_INLINE void IfxCan_Node_setExtendedFilterConfiguration | ( | Ifx_CAN_EXTMSG * | extendedFilterElement,
 |  | IfxCan_FilterElementConfiguration | filterElementConfiguration
 | ) |  |

Sets the Extended Filter Element Configuration.

Parameters
extendedFilterElement | Extended Filter Element
filterElementConfiguration | Filter Element Configuration
Returns
None

Definition at line 2124 of file IfxCan.h.

Referenced by IfxCan_Can_setExtendedFilter().

◆ IfxCan_Node_setExtendedFilterId1()

IFX_INLINE void IfxCan_Node_setExtendedFilterId1 | ( | Ifx_CAN_EXTMSG * | extendedFilterElement,
 |  | uint32 | id
 | ) |  |

Sets the Extended Filter ID 1 for Extended Filter Element.

Parameters
extendedFilterElement | Extended Filter Element
id | Filter ID 1
Returns
None

Definition at line 2130 of file IfxCan.h.

Referenced by IfxCan_Can_setExtendedFilter().

◆ IfxCan_Node_setExtendedFilterId2()

IFX_INLINE void IfxCan_Node_setExtendedFilterId2 | ( | Ifx_CAN_EXTMSG * | extendedFilterElement,
 |  | uint32 | id
 | ) |  |

Sets the Extended Filter ID 2 for Extended Filter Element.

Parameters
extendedFilterElement | Extended Filter Element
id | Filter ID 2
Returns
None

Definition at line 2136 of file IfxCan.h.

Referenced by IfxCan_Can_setExtendedFilter().

◆ IfxCan_Node_setExtendedFilterListSize()

IFX_INLINE void IfxCan_Node_setExtendedFilterListSize | ( | Ifx_CAN_N * | node,
 |  | uint8 | size
 | ) |  |

Sets the Extended Message ID filter list size.

Parameters
node | Specifies the pointer to the CAN Node registers
size | Number of Extended Message ID filter elements
Returns
None

Definition at line 2142 of file IfxCan.h.

Referenced by IfxCan_Can_initNode().

◆ IfxCan_Node_setExtendedFilterListStartAddress()

IFX_INLINE void IfxCan_Node_setExtendedFilterListStartAddress | ( | Ifx_CAN_N * | node,
 |  | uint16 | address
 | ) |  |

Sets the start address of Extended Message ID filter list (32-bit word address)

Parameters
node | Specifies the pointer to the CAN Node registers
address | Start address of Extended Message ID filter list in the Message RAM
Returns
None

Definition at line 2148 of file IfxCan.h.

Referenced by IfxCan_Can_initNode().

◆ IfxCan_Node_setExtendedFilterRxBufferOffset()

IFX_INLINE void IfxCan_Node_setExtendedFilterRxBufferOffset | ( | Ifx_CAN_EXTMSG * | extendedFilterElement,
 |  | IfxCan_RxBufferId | rxBufferNumber
 | ) |  |

Sets the Offset to the Rx Buffer Start Address RXBC.RBSA for storage of a matching message for Extended filter element.

Parameters
extendedFilterElement | Extended Filter Element
rxBufferNumber | Offset to the Rx Buffer Start Address RXBC.RBSA for storage of a matching message (Rx buffer number)
Returns
None

Definition at line 2154 of file IfxCan.h.

Referenced by IfxCan_Can_setExtendedFilter().

◆ IfxCan_Node_setExtendedFilterType()

IFX_INLINE void IfxCan_Node_setExtendedFilterType | ( | Ifx_CAN_EXTMSG * | extendedFilterElement,
 |  | IfxCan_FilterType | filterType
 | ) |  |

Sets the Extended Filter Type for Extended Filter Element.

Parameters
extendedFilterElement | Extended Filter Element
filterType | Filter Type
Returns
None

Definition at line 2160 of file IfxCan.h.

Referenced by IfxCan_Can_setExtendedFilter().

◆ IfxCan_Node_setStandardFilterConfiguration()

IFX_INLINE void IfxCan_Node_setStandardFilterConfiguration | ( | Ifx_CAN_STDMSG * | standardFilterElement,
 |  | IfxCan_FilterElementConfiguration | filterElementConfiguration
 | ) |  |

Sets the Standard Filter Element Configuration.

Parameters
standardFilterElement | Standard Filter Element
filterElementConfiguration | Filter Element Configuration
Returns
None

Definition at line 2294 of file IfxCan.h.

Referenced by IfxCan_Can_setStandardFilter().

◆ IfxCan_Node_setStandardFilterId1()

IFX_INLINE void IfxCan_Node_setStandardFilterId1 | ( | Ifx_CAN_STDMSG * | standardFilterElement,
 |  | uint32 | id
 | ) |  |

Sets the Standard Filter ID 1 for Standard Filter Element.

Parameters
standardFilterElement | Standard Filter Element
id | Filter ID 1
Returns
None

Definition at line 2300 of file IfxCan.h.

Referenced by IfxCan_Can_setStandardFilter().

◆ IfxCan_Node_setStandardFilterId2()

IFX_INLINE void IfxCan_Node_setStandardFilterId2 | ( | Ifx_CAN_STDMSG * | standardFilterElement,
 |  | uint32 | id
 | ) |  |

Sets the Standard Filter ID 2 for Standard Filter Element.

Parameters
standardFilterElement | Standard Filter Element
id | Filter ID 2
Returns
None

Definition at line 2306 of file IfxCan.h.

Referenced by IfxCan_Can_setStandardFilter().

◆ IfxCan_Node_setStandardFilterListSize()

IFX_INLINE void IfxCan_Node_setStandardFilterListSize | ( | Ifx_CAN_N * | node,
 |  | uint8 | size
 | ) |  |

Sets the Standard Message ID filter list size.

Parameters
node | Specifies the pointer to the CAN Node registers
size | Number of Standard Message ID filter elements
Returns
None

Definition at line 2312 of file IfxCan.h.

Referenced by IfxCan_Can_initNode().

◆ IfxCan_Node_setStandardFilterListStartAddress()

IFX_INLINE void IfxCan_Node_setStandardFilterListStartAddress | ( | Ifx_CAN_N * | node,
 |  | uint16 | address
 | ) |  |

Sets the start address of Standard Message ID filter list (32-bit word address)

Parameters
node | Specifies the pointer to the CAN Node registers
address | Start address of Standard Message ID filter in the Message RAM
Returns
None

Definition at line 2318 of file IfxCan.h.

Referenced by IfxCan_Can_initNode().

◆ IfxCan_Node_setStandardFilterRxBufferOffset()

IFX_INLINE void IfxCan_Node_setStandardFilterRxBufferOffset | ( | Ifx_CAN_STDMSG * | standardFilterElement,
 |  | IfxCan_RxBufferId | rxBufferNumber
 | ) |  |

Sets the Offset to the Rx Buffer Start Address RXBC.RBSA for storage of a matching message for standard filter element.

Parameters
standardFilterElement | Standard Filter Element
rxBufferNumber | Offset to the Rx Buffer Start Address RXBC.RBSA for storage of a matching message (Rx buffer number)
Returns
None

Definition at line 2324 of file IfxCan.h.

Referenced by IfxCan_Can_setStandardFilter().

◆ IfxCan_Node_setStandardFilterType()

IFX_INLINE void IfxCan_Node_setStandardFilterType | ( | Ifx_CAN_STDMSG * | standardFilterElement,
 |  | IfxCan_FilterType | filterType
 | ) |  |

Sets the Standard Filter Type for Standard Filter Element.

Parameters
standardFilterElement | Standard Filter Element
filterType | Filter Type
Returns
None

Definition at line 2330 of file IfxCan.h.

Referenced by IfxCan_Can_setStandardFilter().


iLLD_TC38A: Interrupt Functions

Functions
Interrupt Functions
iLLD » CAN » Standard Interface
Collaboration diagram for Interrupt Functions:

Functions

IFX_INLINE void | IfxCan_Node_clearInterruptFlag (Ifx_CAN_N *node, IfxCan_Interrupt interrupt)
Clears the selected interrupt Flag. More...
IFX_INLINE void | IfxCan_Node_disableInterrupt (Ifx_CAN_N *node, IfxCan_Interrupt interrupt)
Disables the selected interrupt. More...
IFX_INLINE void | IfxCan_Node_disableTxBufferCancellationFinishedInterrupt (Ifx_CAN_N *node, IfxCan_TxBufferId txBufferId)
Disables the Cancellation Finished Interrupt of the selected Tx buffer. More...
IFX_INLINE void | IfxCan_Node_disableTxBufferTransmissionInterrupt (Ifx_CAN_N *node, IfxCan_TxBufferId txBufferId)
Disables the Transmission Interrupt of the selected Tx buffer. More...
IFX_INLINE void | IfxCan_Node_enableInterrupt (Ifx_CAN_N *node, IfxCan_Interrupt interrupt)
Enables the selected interrupt. More...
IFX_INLINE void | IfxCan_Node_enableTxBufferCancellationFinishedInterrupt (Ifx_CAN_N *node, IfxCan_TxBufferId txBufferId)
Enables the Cancellation Finished Interrupt of the selected Tx buffer. More...
IFX_INLINE void | IfxCan_Node_enableTxBufferTransmissionInterrupt (Ifx_CAN_N *node, IfxCan_TxBufferId txBufferId)
Enables the Transmission Interrupt of the selected Tx buffer. More...
IFX_INLINE boolean | IfxCan_Node_getInterruptFlagStatus (Ifx_CAN_N *node, IfxCan_Interrupt interrupt)
Returns the status of selected interrupt flag. More...
IFX_EXTERN void | IfxCan_Node_setGroupInterruptLine (Ifx_CAN_N *node, IfxCan_InterruptGroup interruptGroup, IfxCan_InterruptLine interruptLine)
Sets the slected interrupt to the selcted interrupt line. More...
IFX_EXTERN void | IfxCan_Node_setInterruptLine (Ifx_CAN_N *node, IfxCan_Interrupt interrupt, IfxCan_InterruptLine interruptLine)
Sets the slected interrupt to the selcted interrupt line. More...

Detailed Description

Function Documentation

◆ IfxCan_Node_clearInterruptFlag()

IFX_INLINE void IfxCan_Node_clearInterruptFlag | ( | Ifx_CAN_N * | node,
 |  | IfxCan_Interrupt | interrupt
 | ) |  |

Clears the selected interrupt Flag.

Parameters
node | Specifies the pointer to the CAN Node registers
interrupt | Type of Interrupt
Returns
None

Definition at line 1765 of file IfxCan.h.

◆ IfxCan_Node_disableInterrupt()

IFX_INLINE void IfxCan_Node_disableInterrupt | ( | Ifx_CAN_N * | node,
 |  | IfxCan_Interrupt | interrupt
 | ) |  |

Disables the selected interrupt.

Parameters
node | Specifies the pointer to the CAN Node registers
interrupt | Type of Interrupt
Returns
None

Definition at line 1798 of file IfxCan.h.

◆ IfxCan_Node_disableTxBufferCancellationFinishedInterrupt()

IFX_INLINE void IfxCan_Node_disableTxBufferCancellationFinishedInterrupt | ( | Ifx_CAN_N * | node,
 |  | IfxCan_TxBufferId | txBufferId
 | ) |  |

Disables the Cancellation Finished Interrupt of the selected Tx buffer.

Parameters
node | Specifies the pointer to the CAN Node registers
txBufferId | Tx Buffer number
Returns
None

Definition at line 1805 of file IfxCan.h.

◆ IfxCan_Node_disableTxBufferTransmissionInterrupt()

IFX_INLINE void IfxCan_Node_disableTxBufferTransmissionInterrupt | ( | Ifx_CAN_N * | node,
 |  | IfxCan_TxBufferId | txBufferId
 | ) |  |

Disables the Transmission Interrupt of the selected Tx buffer.

Parameters
node | Specifies the pointer to the CAN Node registers
txBufferId | Tx Buffer number
Returns
None

Definition at line 1812 of file IfxCan.h.

◆ IfxCan_Node_enableInterrupt()

IFX_INLINE void IfxCan_Node_enableInterrupt | ( | Ifx_CAN_N * | node,
 |  | IfxCan_Interrupt | interrupt
 | ) |  |

Enables the selected interrupt.

Parameters
node | Specifies the pointer to the CAN Node registers
interrupt | Type of Interrupt
Returns
None

Definition at line 1852 of file IfxCan.h.

Referenced by IfxCan_Can_initNode().

◆ IfxCan_Node_enableTxBufferCancellationFinishedInterrupt()

IFX_INLINE void IfxCan_Node_enableTxBufferCancellationFinishedInterrupt | ( | Ifx_CAN_N * | node,
 |  | IfxCan_TxBufferId | txBufferId
 | ) |  |

Enables the Cancellation Finished Interrupt of the selected Tx buffer.

Parameters
node | Specifies the pointer to the CAN Node registers
txBufferId | Tx Buffer number
Returns
None

Definition at line 1865 of file IfxCan.h.

◆ IfxCan_Node_enableTxBufferTransmissionInterrupt()

IFX_INLINE void IfxCan_Node_enableTxBufferTransmissionInterrupt | ( | Ifx_CAN_N * | node,
 |  | IfxCan_TxBufferId | txBufferId
 | ) |  |

Enables the Transmission Interrupt of the selected Tx buffer.

Parameters
node | Specifies the pointer to the CAN Node registers
txBufferId | Tx Buffer number
Returns
None

Definition at line 1872 of file IfxCan.h.

Referenced by IfxCan_Can_initNode().

◆ IfxCan_Node_getInterruptFlagStatus()

IFX_INLINE boolean IfxCan_Node_getInterruptFlagStatus | ( | Ifx_CAN_N * | node,
 |  | IfxCan_Interrupt | interrupt
 | ) |  |

Returns the status of selected interrupt flag.

Parameters
node | Specifies the pointer to the CAN Node registers
interrupt | Type of Interrupt
Returns
Status TRUE / FALSE

Definition at line 1909 of file IfxCan.h.

◆ IfxCan_Node_setGroupInterruptLine()

IFX_EXTERN void IfxCan_Node_setGroupInterruptLine | ( | Ifx_CAN_N * | node,
 |  | IfxCan_InterruptGroup | interruptGroup,
 |  | IfxCan_InterruptLine | interruptLine
 | ) |  |

Sets the slected interrupt to the selcted interrupt line.

Parameters
node | Specifies the pointer to the CAN Node registers
interruptGroup | Type of Interrupt group
interruptLine | Interrupt line number
Returns
None

Definition at line 772 of file IfxCan.c.

Referenced by IfxCan_Can_initNode().

◆ IfxCan_Node_setInterruptLine()

IFX_EXTERN void IfxCan_Node_setInterruptLine | ( | Ifx_CAN_N * | node,
 |  | IfxCan_Interrupt | interrupt,
 |  | IfxCan_InterruptLine | interruptLine
 | ) |  |

Sets the slected interrupt to the selcted interrupt line.

Parameters
node | Specifies the pointer to the CAN Node registers
interrupt | Type of Interrupt
interruptLine | Interrupt line number
Returns
None

Definition at line 785 of file IfxCan.c.


iLLD_TC38A: Module Functions

Functions
Module Functions
iLLD » CAN » Standard Interface
Collaboration diagram for Module Functions:

Functions

IFX_INLINE Ifx_CAN_N * | IfxCan_getNodePointer (Ifx_CAN *can, IfxCan_NodeId nodeId)
Returns the base adress of the selected Node of CAN module. More...
IFX_INLINE boolean | IfxCan_isModuleEnabled (Ifx_CAN *can)
Returns the status of module enabled or disabled. More...
IFX_INLINE boolean | IfxCan_isModuleSuspended (Ifx_CAN *can)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxCan_setSleepMode (Ifx_CAN *can, IfxCan_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxCan_setSuspendMode (Ifx_CAN *can, IfxCan_SuspendMode mode)
Set the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN void | IfxCan_disableModule (Ifx_CAN *can)
Disables the module (sets the disable request) More...
IFX_EXTERN void | IfxCan_enableModule (Ifx_CAN *can)
Enables the module (clears the disable request) More...
IFX_EXTERN Ifx_CAN * | IfxCan_getAddress (IfxCan_Index can)
IFX_EXTERN IfxCan_Index | IfxCan_getIndex (Ifx_CAN *can)
API to get the resource index of the CAN specified. More...
IFX_EXTERN float32 | IfxCan_getModuleFrequency (void)
Returns the operatinf frequency of the CAN module. More...
IFX_EXTERN void | IfxCan_resetModule (Ifx_CAN *can)
resets CAN kernel More...
IFX_EXTERN void | IfxCan_setClockSource (Ifx_CAN *can, IfxCan_ClockSelect clockSelect, IfxCan_ClockSource clockSource)
sets the clocksource selection More...

Detailed Description

Function Documentation

◆ IfxCan_disableModule()

IFX_EXTERN void IfxCan_disableModule ( Ifx_CAN * can )

Disables the module (sets the disable request)

Parameters
can Specifies the pointer to the CAN registers
Returns
None

Definition at line 890 of file IfxCan.c.

◆ IfxCan_enableModule()

IFX_EXTERN void IfxCan_enableModule ( Ifx_CAN * can )

Enables the module (clears the disable request)

Parameters
can Specifies the pointer to the CAN registers
Returns
None

Definition at line 906 of file IfxCan.c.

Referenced by IfxCan_Can_initModule().

◆ IfxCan_getAddress()

IFX_EXTERN Ifx_CAN* IfxCan_getAddress ( IfxCan_Index can )
Parameters
can Module index of the CAN
Returns
CAN module register address

Definition at line 922 of file IfxCan.c.

◆ IfxCan_getIndex()

IFX_EXTERN IfxCan_Index IfxCan_getIndex ( Ifx_CAN * can )

API to get the resource index of the CAN specified.

Returns
can resource index

Definition at line 939 of file IfxCan.c.

Referenced by IfxCan_getSrcPointer().

◆ IfxCan_getModuleFrequency()

IFX_EXTERN float32 IfxCan_getModuleFrequency ( void )

Returns the operatinf frequency of the CAN module.

Returns
Module Frequency

Definition at line 959 of file IfxCan.c.

Referenced by IfxCan_Can_initNode().

◆ IfxCan_getNodePointer()

IFX_INLINE Ifx_CAN_N * IfxCan_getNodePointer | ( | Ifx_CAN * | can,
 |  | IfxCan_NodeId | nodeId
 | ) |  |

Returns the base adress of the selected Node of CAN module.

Parameters
can | Specifies the pointer to the CAN registers
nodeId | Node number of the module
Returns
Specifies the pointer to the CAN Node registers

Definition at line 2421 of file IfxCan.h.

Referenced by IfxCan_Can_initNode().

◆ IfxCan_isModuleEnabled()

IFX_INLINE boolean IfxCan_isModuleEnabled ( Ifx_CAN * can )

Returns the status of module enabled or disabled.

Parameters
can Specifies the pointer to the CAN registers
Returns
Status (TRUE / FALSE)

Definition at line 2427 of file IfxCan.h.

Referenced by IfxCan_Can_initModule(), IfxCan_disableModule(), and IfxCan_enableModule().

◆ IfxCan_isModuleSuspended()

IFX_INLINE boolean IfxCan_isModuleSuspended ( Ifx_CAN * can )

Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended.

Parameters
can Pointer to CAN module registers
Returns
Suspend status (TRUE / FALSE)

Definition at line 2433 of file IfxCan.h.

◆ IfxCan_resetModule()

IFX_EXTERN void IfxCan_resetModule ( Ifx_CAN * can )

resets CAN kernel

Parameters
can pointer to CAN registers
Returns
None

Definition at line 981 of file IfxCan.c.

◆ IfxCan_setClockSource()

IFX_EXTERN void IfxCan_setClockSource | ( | Ifx_CAN * | can,
 |  | IfxCan_ClockSelect | clockSelect,
 |  | IfxCan_ClockSource | clockSource
 | ) |  |

sets the clocksource selection

Parameters
can | Specifies the pointer to the CAN registers
clockSelect | Clock selection option
clockSource | Type of Clock Source selection
Returns
None

Definition at line 1000 of file IfxCan.c.

Referenced by IfxCan_Can_initNode().

◆ IfxCan_setSleepMode()

IFX_INLINE void IfxCan_setSleepMode | ( | Ifx_CAN * | can,
 |  | IfxCan_SleepMode | mode
 | ) |  |

Sets the sensitivity of the module to sleep signal.

Parameters
can | pointer to CAN registers
mode | mode selection (enable/disable)
Returns
None

Definition at line 2445 of file IfxCan.h.

◆ IfxCan_setSuspendMode()

IFX_INLINE void IfxCan_setSuspendMode | ( | Ifx_CAN * | can,
 |  | IfxCan_SuspendMode | mode
 | ) |  |

Set the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.

Parameters
can | Pointer to CAN module registers
mode | Module suspend mode
Returns
None

Definition at line 2454 of file IfxCan.h.


iLLD_TC38A: Tx Event FIFO Element Functions

Functions
Tx Event FIFO Element Functions
iLLD » CAN » Standard Interface
Collaboration diagram for Tx Event FIFO Element Functions:

Functions

IFX_INLINE boolean | IfxCan_Node_getBRSFromTxEventFifo (Ifx_CAN_TXEVENT *txEventFifoElement)
Returns the Bit Rate Switch (BRS) from the Tx Event Fifo element. More...
IFX_INLINE uint32 | IfxCan_Node_getDLCFromTxEventFifo (Ifx_CAN_TXEVENT *txEventFifoElement)
Returns the Data Length Code from the Tx Event Fifo Element. More...
IFX_INLINE boolean | IfxCan_Node_getESIFromTxEventFifo (Ifx_CAN_TXEVENT *txEventFifoElement)
Returns the Error State Indicator (ESI) from the Tx Event Fifo element. More...
IFX_INLINE boolean | IfxCan_Node_getFDFFromTxEventFifo (Ifx_CAN_TXEVENT *txEventFifoElement)
Returns the FD Format (FDF) from the Tx Event Fifo element. More...
IFX_INLINE uint8 | IfxCan_Node_getMMFromTxEventFifo (Ifx_CAN_TXEVENT *txEventFifoElement)
Returns the Message Marker (MM) from the Tx Event Fifo element. More...
IFX_INLINE uint32 | IfxCan_Node_getMesssageIdFromTxEventFifo (Ifx_CAN_TXEVENT *txEventFifoElement)
Returns the identifier (ID) from the Tx Event Fifo element. More...
IFX_INLINE boolean | IfxCan_Node_getRTRFromTxEventFifo (Ifx_CAN_TXEVENT *txEventFifoElement)
Returns the Remote Transmission Request Status (RTR) from the Tx Event Fifo element. More...
IFX_INLINE uint16 | IfxCan_Node_getTXTSFromTxEventFifo (Ifx_CAN_TXEVENT *txEventFifoElement)
Returns the Tx Time Stamp (TXTS) from the Tx Event Fifo element. More...
IFX_INLINE uint8 | IfxCan_Node_getTxEventFifoAcknowledgeIndex (Ifx_CAN_N *node)
Returns the Tx Event Fifo Acknowledge Index. More...
IFX_INLINE uint8 | IfxCan_Node_getTxEventFifoFillLevel (Ifx_CAN_N *node)
Returns the Tx Event Fifo Fill Level. More...
IFX_INLINE uint8 | IfxCan_Node_getTxEventFifoGetIndex (Ifx_CAN_N *node)
Returns the Tx Event Fifo Get Index. More...
IFX_INLINE uint8 | IfxCan_Node_getTxEventFifoPutIndex (Ifx_CAN_N *node)
Returns the Tx Event Fifo Put Index. More...
IFX_INLINE uint8 | IfxCan_Node_getTxEventFifoSize (Ifx_CAN_N *node)
Returns Tx Event Fifo Size. More...
IFX_INLINE uint16 | IfxCan_Node_getTxEventFifoStartAddress (Ifx_CAN_N *node)
Returns Tx Event Fifo Start Address. More...
IFX_INLINE uint8 | IfxCan_Node_getTxEventFifoWatermarkLevel (Ifx_CAN_N *node)
Returns Tx Event Fifo Watermark Level. More...
IFX_INLINE boolean | IfxCan_Node_isTxEventFifoElementLost (Ifx_CAN_N *node)
Returns the status of Tx Event Fifo Element lost. More...
IFX_INLINE boolean | IfxCan_Node_isTxEventFifoFull (Ifx_CAN_N *node)
Returns the status of Tx Event Fifo Full. More...
IFX_INLINE void | IfxCan_Node_setTxEventFifoSize (Ifx_CAN_N *node, uint8 size)
Sets Tx Event Fifo Size. More...
IFX_INLINE void | IfxCan_Node_setTxEventFifoStartAddress (Ifx_CAN_N *node, uint16 address)
Sets Tx Event Fifo Start Address. More...
IFX_INLINE void | IfxCan_Node_setTxEventFifoWatermarkLevel (Ifx_CAN_N *node, uint8 level)
Sets Tx Event Fifo Watermark Level. More...
IFX_EXTERN IfxCan_FrameMode | IfxCan_Node_getFrameModeFromTxEventFifo (Ifx_CAN_TXEVENT *txEventFifoElement)
Returns CAN frame mode of operation for a Tx Event Fifo Element. More...
IFX_EXTERN Ifx_CAN_TXEVENT * | IfxCan_Node_getTxEventFifoElementAddress (uint32 ramBaseAddress, uint16 txEventFifoStartAddress, uint8 txEventFifoNumber)
Returns the address of selected Tx Event Fifo element. More...

Detailed Description

Function Documentation

◆ IfxCan_Node_getBRSFromTxEventFifo()

IFX_INLINE boolean IfxCan_Node_getBRSFromTxEventFifo ( Ifx_CAN_TXEVENT * txEventFifoElement )

Returns the Bit Rate Switch (BRS) from the Tx Event Fifo element.

Parameters
txEventFifoElement Tx Event FIFO Element
Returns
Bit Rate Switch (TRUE/FALSE)

Definition at line 1879 of file IfxCan.h.

◆ IfxCan_Node_getDLCFromTxEventFifo()

IFX_INLINE uint32 IfxCan_Node_getDLCFromTxEventFifo ( Ifx_CAN_TXEVENT * txEventFifoElement )

Returns the Data Length Code from the Tx Event Fifo Element.

Parameters
txEventFifoElement Tx Event Fifo Element
Returns
Data Length Code

Definition at line 1885 of file IfxCan.h.

◆ IfxCan_Node_getESIFromTxEventFifo()

IFX_INLINE boolean IfxCan_Node_getESIFromTxEventFifo ( Ifx_CAN_TXEVENT * txEventFifoElement )

Returns the Error State Indicator (ESI) from the Tx Event Fifo element.

Parameters
txEventFifoElement Tx Event FIFO Element
Returns
Error State Indicator

Definition at line 1897 of file IfxCan.h.

◆ IfxCan_Node_getFDFFromTxEventFifo()

IFX_INLINE boolean IfxCan_Node_getFDFFromTxEventFifo ( Ifx_CAN_TXEVENT * txEventFifoElement )

Returns the FD Format (FDF) from the Tx Event Fifo element.

Parameters
txEventFifoElement Tx Event FIFO Element
Returns
FD format (TRUE/FALSE)

Definition at line 1903 of file IfxCan.h.

◆ IfxCan_Node_getFrameModeFromTxEventFifo()

IFX_EXTERN IfxCan_FrameMode IfxCan_Node_getFrameModeFromTxEventFifo ( Ifx_CAN_TXEVENT * txEventFifoElement )

Returns CAN frame mode of operation for a Tx Event Fifo Element.

Parameters
txEventFifoElement Tx Event Fifo Element
Returns
CAN frame mode

Definition at line 153 of file IfxCan.c.

◆ IfxCan_Node_getMesssageIdFromTxEventFifo()

IFX_INLINE uint32 IfxCan_Node_getMesssageIdFromTxEventFifo ( Ifx_CAN_TXEVENT * txEventFifoElement )

Returns the identifier (ID) from the Tx Event Fifo element.

Parameters
txEventFifoElement Tx Event FIFO Element
Returns
Identifier

Definition at line 1933 of file IfxCan.h.

◆ IfxCan_Node_getMMFromTxEventFifo()

IFX_INLINE uint8 IfxCan_Node_getMMFromTxEventFifo ( Ifx_CAN_TXEVENT * txEventFifoElement )

Returns the Message Marker (MM) from the Tx Event Fifo element.

Parameters
txEventFifoElement Tx Event FIFO Element
Returns
Message Marker

Definition at line 1917 of file IfxCan.h.

◆ IfxCan_Node_getRTRFromTxEventFifo()

IFX_INLINE boolean IfxCan_Node_getRTRFromTxEventFifo ( Ifx_CAN_TXEVENT * txEventFifoElement )

Returns the Remote Transmission Request Status (RTR) from the Tx Event Fifo element.

Parameters
txEventFifoElement Tx Event FIFO Element
Returns
Remote Transmission Request Status

Definition at line 1943 of file IfxCan.h.

◆ IfxCan_Node_getTxEventFifoAcknowledgeIndex()

IFX_INLINE uint8 IfxCan_Node_getTxEventFifoAcknowledgeIndex ( Ifx_CAN_N * node )

Returns the Tx Event Fifo Acknowledge Index.

Parameters
node Specifies the pointer to the CAN Node registers
Returns
Returns Tx Event Fifo Acknowledge Index

Definition at line 1979 of file IfxCan.h.

◆ IfxCan_Node_getTxEventFifoElementAddress()

IFX_EXTERN Ifx_CAN_TXEVENT* IfxCan_Node_getTxEventFifoElementAddress | ( | uint32 | ramBaseAddress,
 |  | uint16 | txEventFifoStartAddress,
 |  | uint8 | txEventFifoNumber
 | ) |  |

Returns the address of selected Tx Event Fifo element.

Parameters
ramBaseAddress | Message RAM base address of CAN module
txEventFifoStartAddress | Start address of Tx Event Fifo section in the Message RAM
txEventFifoNumber | Tx Event Fifo element number
Returns
Tx Event Fifo Element Address

Definition at line 320 of file IfxCan.c.

◆ IfxCan_Node_getTxEventFifoFillLevel()

IFX_INLINE uint8 IfxCan_Node_getTxEventFifoFillLevel ( Ifx_CAN_N * node )

Returns the Tx Event Fifo Fill Level.

Parameters
node Specifies the pointer to the CAN Node registers
Returns
Returns Tx Event Fifo Fill Level

Definition at line 1985 of file IfxCan.h.

◆ IfxCan_Node_getTxEventFifoGetIndex()

IFX_INLINE uint8 IfxCan_Node_getTxEventFifoGetIndex ( Ifx_CAN_N * node )

Returns the Tx Event Fifo Get Index.

Parameters
node Specifies the pointer to the CAN Node registers
Returns
Returns Tx Event Fifo Get Index

Definition at line 1991 of file IfxCan.h.

◆ IfxCan_Node_getTxEventFifoPutIndex()

IFX_INLINE uint8 IfxCan_Node_getTxEventFifoPutIndex ( Ifx_CAN_N * node )

Returns the Tx Event Fifo Put Index.

Parameters
node Specifies the pointer to the CAN Node registers
Returns
Returns Tx Event Fifo Put Index

Definition at line 1997 of file IfxCan.h.

◆ IfxCan_Node_getTxEventFifoSize()

IFX_INLINE uint8 IfxCan_Node_getTxEventFifoSize ( Ifx_CAN_N * node )

Returns Tx Event Fifo Size.

Parameters
node Specifies the pointer to the CAN Node registers
Returns
Tx Event Fifo Size

Definition at line 2003 of file IfxCan.h.

◆ IfxCan_Node_getTxEventFifoStartAddress()

IFX_INLINE uint16 IfxCan_Node_getTxEventFifoStartAddress ( Ifx_CAN_N * node )

Returns Tx Event Fifo Start Address.

Parameters
node Specifies the pointer to the CAN Node registers
Returns
Tx Event Fifo Start Address

Definition at line 2009 of file IfxCan.h.

◆ IfxCan_Node_getTxEventFifoWatermarkLevel()

IFX_INLINE uint8 IfxCan_Node_getTxEventFifoWatermarkLevel ( Ifx_CAN_N * node )

Returns Tx Event Fifo Watermark Level.

Parameters
node Specifies the pointer to the CAN Node registers
Returns
Tx Event Fifo Watermark Level

Definition at line 2015 of file IfxCan.h.

◆ IfxCan_Node_getTXTSFromTxEventFifo()

IFX_INLINE uint16 IfxCan_Node_getTXTSFromTxEventFifo ( Ifx_CAN_TXEVENT * txEventFifoElement )

Returns the Tx Time Stamp (TXTS) from the Tx Event Fifo element.

Parameters
txEventFifoElement Tx Event FIFO Element
Returns
Tx Time Stamp

Definition at line 1973 of file IfxCan.h.

◆ IfxCan_Node_isTxEventFifoElementLost()

IFX_INLINE boolean IfxCan_Node_isTxEventFifoElementLost ( Ifx_CAN_N * node )

Returns the status of Tx Event Fifo Element lost.

Parameters
node Specifies the pointer to the CAN Node registers
Returns
Returns status of Tx Event Fifo Element Lost
True : elemnt lost
False : element not lost

Definition at line 2056 of file IfxCan.h.

◆ IfxCan_Node_isTxEventFifoFull()

IFX_INLINE boolean IfxCan_Node_isTxEventFifoFull ( Ifx_CAN_N * node )

Returns the status of Tx Event Fifo Full.

Parameters
node Specifies the pointer to the CAN Node registers
Returns
Returns status of Tx Event Fifo Full
True : Fifo full
False : Fifo not full

Definition at line 2062 of file IfxCan.h.

◆ IfxCan_Node_setTxEventFifoSize()

IFX_INLINE void IfxCan_Node_setTxEventFifoSize | ( | Ifx_CAN_N * | node,
 |  | uint8 | size
 | ) |  |

Sets Tx Event Fifo Size.

Parameters
node | Specifies the pointer to the CAN Node registers
size | Tx Event Fifo Size
Returns
None

Definition at line 2403 of file IfxCan.h.

Referenced by IfxCan_Can_initNode().

◆ IfxCan_Node_setTxEventFifoStartAddress()

IFX_INLINE void IfxCan_Node_setTxEventFifoStartAddress | ( | Ifx_CAN_N * | node,
 |  | uint16 | address
 | ) |  |

Sets Tx Event Fifo Start Address.

Parameters
node | Specifies the pointer to the CAN Node registers
address | Tx Event Fifo Start Address
Returns
None

Definition at line 2409 of file IfxCan.h.

Referenced by IfxCan_Can_initNode().

◆ IfxCan_Node_setTxEventFifoWatermarkLevel()

IFX_INLINE void IfxCan_Node_setTxEventFifoWatermarkLevel | ( | Ifx_CAN_N * | node,
 |  | uint8 | level
 | ) |  |

Sets Tx Event Fifo Watermark Level.

Parameters
node | Specifies the pointer to the CAN Node registers
level | Tx Event Fifo Watermark Level
Returns
None

Definition at line 2415 of file IfxCan.h.


iLLD_TC38A: CAN Pin Mapping

Data Structures | Macros | Variables
CAN Pin Mapping
iLLD » CAN
Collaboration diagram for CAN Pin Mapping:

Data Structures

struct | IfxCan_Rxd_In
RXD pin mapping structure. More...
struct | IfxCan_Txd_Out
TXD pin mapping structure. More...

Macros

#define | IFXCAN_PINMAP_NUM_MODULES 3
Table dimensions. More...
#define | IFXCAN_PINMAP_NUM_NODES 4
#define | IFXCAN_PINMAP_RXD_IN_NUM_ITEMS 8
#define | IFXCAN_PINMAP_TXD_OUT_NUM_ITEMS 8

Variables

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD00A_P02_1_IN
CAN receive input node 0. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD00B_P20_7_IN
CAN receive input node 0. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD00C_P12_0_IN
CAN receive input node 0. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD00D_P33_12_IN
CAN receive input node 0. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD00E_P33_7_IN
CAN receive input node 0. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD00F_P01_8_IN
CAN receive input node 0. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD00G_P34_2_IN
CAN receive input node 0. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD00H_P02_14_IN
CAN receive input node 0. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD01A_P15_3_IN
CAN receive input node 1. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD01B_P14_1_IN
CAN receive input node 1. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD01C_P01_4_IN
CAN receive input node 1. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD01D_P33_10_IN
CAN receive input node 1. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD01E_P02_10_IN
CAN receive input node 1. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD02A_P15_1_IN
CAN receive input node 2. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD02B_P02_3_IN
CAN receive input node 2. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD02C_P32_6_IN
CAN receive input node 2. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD02D_P14_8_IN
CAN receive input node 2. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD02E_P10_2_IN
CAN receive input node 2. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD03A_P00_3_IN
CAN receive input node 3. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD03B_P32_2_IN
CAN receive input node 3. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD03C_P20_0_IN
CAN receive input node 3. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD03D_P11_10_IN
CAN receive input node 3. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD03E_P20_9_IN
CAN receive input node 3. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD03F_P01_0_IN
CAN receive input node 3. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD10A_P00_1_IN
CAN receive input node 0. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD10B_P14_7_IN
CAN receive input node 0. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD10C_P23_0_IN
CAN receive input node 0. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD10D_P13_1_IN
CAN receive input node 0. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD11A_P02_4_IN
CAN receive input node 1. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD11B_P00_5_IN
CAN receive input node 1. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD11C_P23_7_IN
CAN receive input node 1. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD11D_P11_7_IN
CAN receive input node 1. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD12A_P20_6_IN
CAN receive input node 2. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD12B_P10_8_IN
CAN receive input node 2. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD12C_P23_3_IN
CAN receive input node 2. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD12D_P11_8_IN
CAN receive input node 2. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD13A_P14_7_IN
CAN receive input node 3. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD13B_P33_5_IN
CAN receive input node 3. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD13C_P22_5_IN
CAN receive input node 3. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD13D_P11_13_IN
CAN receive input node 3. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD20A_P10_5_IN
CAN receive input node 0. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD20B_P10_8_IN
CAN receive input node 0. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD20C_P34_2_IN
CAN receive input node 0. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD20D_P02_14_IN
CAN receive input node 0. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD20E_P01_8_IN
CAN receive input node 0. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD20F_P11_14_IN
CAN receive input node 0. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD21A_P00_3_IN
CAN receive input node 1. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD21B_P13_12_IN
CAN receive input node 1. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD21C_P20_0_IN
CAN receive input node 1. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD21D_P32_2_IN
CAN receive input node 1. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD21E_P01_0_IN
CAN receive input node 1. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD21F_P22_7_IN
CAN receive input node 1. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD22A_P33_13_IN
CAN receive input node 2. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD22B_P32_7_IN
CAN receive input node 2. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD22C_P23_6_IN
CAN receive input node 2. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD22D_P14_14_IN
CAN receive input node 2. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD22E_P22_9_IN
CAN receive input node 2. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD23A_P14_10_IN
CAN receive input node 3. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD23B_P23_3_IN
CAN receive input node 3. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD23C_P14_15_IN
CAN receive input node 3. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD23D_P13_5_IN
CAN receive input node 3. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD23E_P22_11_IN
CAN receive input node 3. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD00_P01_13_OUT
CAN transmit output node 0. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD00_P02_0_OUT
CAN transmit output node 0. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD00_P02_13_OUT
CAN transmit output node 0. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD00_P12_1_OUT
CAN transmit output node 0. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD00_P20_8_OUT
CAN transmit output node 0. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD00_P33_13_OUT
CAN transmit output node 0. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD00_P33_8_OUT
CAN transmit output node 0. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD00_P34_1_OUT
CAN transmit output node 0. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD01_P01_3_OUT
CAN transmit output node 1. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD01_P02_9_OUT
CAN transmit output node 1. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD01_P14_0_OUT
CAN transmit output node 1. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD01_P15_2_OUT
CAN transmit output node 1. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD01_P33_9_OUT
CAN transmit output node 1. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD02_P02_2_OUT
CAN transmit output node 2. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD02_P10_3_OUT
CAN transmit output node 2. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD02_P14_10_OUT
CAN transmit output node 2. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD02_P15_0_OUT
CAN transmit output node 2. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD02_P32_5_OUT
CAN transmit output node 2. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD03_P00_2_OUT
CAN transmit output node 3. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD03_P01_2_OUT
CAN transmit output node 3. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD03_P11_12_OUT
CAN transmit output node 3. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD03_P20_10_OUT
CAN transmit output node 3. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD03_P20_3_OUT
CAN transmit output node 3. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD03_P32_3_OUT
CAN transmit output node 3. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD10_P00_0_OUT
CAN transmit output node 0. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD10_P13_0_OUT
CAN transmit output node 0. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD10_P14_9_OUT
CAN transmit output node 0. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD10_P23_1_OUT
CAN transmit output node 0. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD11_P00_4_OUT
CAN transmit output node 1. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD11_P02_5_OUT
CAN transmit output node 1. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD11_P11_0_OUT
CAN transmit output node 1. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD11_P23_6_OUT
CAN transmit output node 1. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD12_P10_7_OUT
CAN transmit output node 2. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD12_P11_1_OUT
CAN transmit output node 2. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD12_P20_7_OUT
CAN transmit output node 2. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD12_P23_2_OUT
CAN transmit output node 2. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD13_P11_4_OUT
CAN transmit output node 3. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD13_P14_6_OUT
CAN transmit output node 3. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD13_P22_4_OUT
CAN transmit output node 3. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD13_P33_4_OUT
CAN transmit output node 3. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD20_P01_13_OUT
CAN transmit output node 0. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD20_P02_13_OUT
CAN transmit output node 0. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD20_P10_6_OUT
CAN transmit output node 0. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD20_P10_7_OUT
CAN transmit output node 0. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD20_P11_5_OUT
CAN transmit output node 0. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD20_P34_1_OUT
CAN transmit output node 0. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD21_P00_2_OUT
CAN transmit output node 1. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD21_P01_2_OUT
CAN transmit output node 1. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD21_P13_9_OUT
CAN transmit output node 1. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD21_P20_3_OUT
CAN transmit output node 1. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD21_P22_6_OUT
CAN transmit output node 1. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD21_P32_3_OUT
CAN transmit output node 1. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD22_P14_13_OUT
CAN transmit output node 2. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD22_P22_8_OUT
CAN transmit output node 2. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD22_P23_5_OUT
CAN transmit output node 2. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD22_P32_6_OUT
CAN transmit output node 2. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD22_P33_12_OUT
CAN transmit output node 2. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD23_P13_4_OUT
CAN transmit output node 3. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD23_P14_14_OUT
CAN transmit output node 3. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD23_P14_9_OUT
CAN transmit output node 3. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD23_P22_10_OUT
CAN transmit output node 3. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD23_P23_2_OUT
CAN transmit output node 3. More...
IFX_EXTERN const IfxCan_Rxd_In * | IfxCan_Rxd_In_pinTable [IFXCAN_PINMAP_NUM_MODULES][IFXCAN_PINMAP_NUM_NODES][IFXCAN_PINMAP_RXD_IN_NUM_ITEMS]
IfxCan_Rxd_In table. More...
IFX_EXTERN const IfxCan_Txd_Out * | IfxCan_Txd_Out_pinTable [IFXCAN_PINMAP_NUM_MODULES][IFXCAN_PINMAP_NUM_NODES][IFXCAN_PINMAP_TXD_OUT_NUM_ITEMS]
IfxCan_Txd_Out table. More...

Detailed Description

Data Structure Documentation

◆ IfxCan_Rxd_In

struct IfxCan_Rxd_In

RXD pin mapping structure.

Definition at line 56 of file IfxCan_PinMap.h.

Collaboration diagram for IfxCan_Rxd_In:
[legend]
Data Fields
Ifx_CAN * | module | Base address.
IfxCan_NodeId | nodeId | Node ID.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxCan_Txd_Out

struct IfxCan_Txd_Out

TXD pin mapping structure.

Definition at line 65 of file IfxCan_PinMap.h.

Collaboration diagram for IfxCan_Txd_Out:
[legend]
Data Fields
Ifx_CAN * | module | Base address.
IfxCan_NodeId | nodeId | Node ID.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

Macro Definition Documentation

◆ IFXCAN_PINMAP_NUM_MODULES

#define IFXCAN_PINMAP_NUM_MODULES 3

Table dimensions.

Definition at line 199 of file IfxCan_PinMap.h.

◆ IFXCAN_PINMAP_NUM_NODES

#define IFXCAN_PINMAP_NUM_NODES 4

Definition at line 200 of file IfxCan_PinMap.h.

◆ IFXCAN_PINMAP_RXD_IN_NUM_ITEMS

#define IFXCAN_PINMAP_RXD_IN_NUM_ITEMS 8

Definition at line 201 of file IfxCan_PinMap.h.

◆ IFXCAN_PINMAP_TXD_OUT_NUM_ITEMS

#define IFXCAN_PINMAP_TXD_OUT_NUM_ITEMS 8

Definition at line 202 of file IfxCan_PinMap.h.

Variable Documentation

◆ IfxCan_RXD00A_P02_1_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD00A_P02_1_IN

CAN receive input node 0.

Definition at line 73 of file IfxCan_PinMap.h.

◆ IfxCan_RXD00B_P20_7_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD00B_P20_7_IN

CAN receive input node 0.

Definition at line 74 of file IfxCan_PinMap.h.

◆ IfxCan_RXD00C_P12_0_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD00C_P12_0_IN

CAN receive input node 0.

Definition at line 75 of file IfxCan_PinMap.h.

◆ IfxCan_RXD00D_P33_12_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD00D_P33_12_IN

CAN receive input node 0.

Definition at line 76 of file IfxCan_PinMap.h.

◆ IfxCan_RXD00E_P33_7_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD00E_P33_7_IN

CAN receive input node 0.

Definition at line 77 of file IfxCan_PinMap.h.

◆ IfxCan_RXD00F_P01_8_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD00F_P01_8_IN

CAN receive input node 0.

Definition at line 78 of file IfxCan_PinMap.h.

◆ IfxCan_RXD00G_P34_2_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD00G_P34_2_IN

CAN receive input node 0.

Definition at line 79 of file IfxCan_PinMap.h.

◆ IfxCan_RXD00H_P02_14_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD00H_P02_14_IN

CAN receive input node 0.

Definition at line 80 of file IfxCan_PinMap.h.

◆ IfxCan_RXD01A_P15_3_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD01A_P15_3_IN

CAN receive input node 1.

Definition at line 81 of file IfxCan_PinMap.h.

◆ IfxCan_RXD01B_P14_1_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD01B_P14_1_IN

CAN receive input node 1.

Definition at line 82 of file IfxCan_PinMap.h.

◆ IfxCan_RXD01C_P01_4_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD01C_P01_4_IN

CAN receive input node 1.

Definition at line 83 of file IfxCan_PinMap.h.

◆ IfxCan_RXD01D_P33_10_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD01D_P33_10_IN

CAN receive input node 1.

Definition at line 84 of file IfxCan_PinMap.h.

◆ IfxCan_RXD01E_P02_10_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD01E_P02_10_IN

CAN receive input node 1.

Definition at line 85 of file IfxCan_PinMap.h.

◆ IfxCan_RXD02A_P15_1_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD02A_P15_1_IN

CAN receive input node 2.

Definition at line 86 of file IfxCan_PinMap.h.

◆ IfxCan_RXD02B_P02_3_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD02B_P02_3_IN

CAN receive input node 2.

Definition at line 87 of file IfxCan_PinMap.h.

◆ IfxCan_RXD02C_P32_6_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD02C_P32_6_IN

CAN receive input node 2.

Definition at line 88 of file IfxCan_PinMap.h.

◆ IfxCan_RXD02D_P14_8_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD02D_P14_8_IN

CAN receive input node 2.

Definition at line 89 of file IfxCan_PinMap.h.

◆ IfxCan_RXD02E_P10_2_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD02E_P10_2_IN

CAN receive input node 2.

Definition at line 90 of file IfxCan_PinMap.h.

◆ IfxCan_RXD03A_P00_3_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD03A_P00_3_IN

CAN receive input node 3.

Definition at line 91 of file IfxCan_PinMap.h.

◆ IfxCan_RXD03B_P32_2_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD03B_P32_2_IN

CAN receive input node 3.

Definition at line 92 of file IfxCan_PinMap.h.

◆ IfxCan_RXD03C_P20_0_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD03C_P20_0_IN

CAN receive input node 3.

Definition at line 93 of file IfxCan_PinMap.h.

◆ IfxCan_RXD03D_P11_10_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD03D_P11_10_IN

CAN receive input node 3.

Definition at line 94 of file IfxCan_PinMap.h.

◆ IfxCan_RXD03E_P20_9_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD03E_P20_9_IN

CAN receive input node 3.

Definition at line 95 of file IfxCan_PinMap.h.

◆ IfxCan_RXD03F_P01_0_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD03F_P01_0_IN

CAN receive input node 3.

Definition at line 96 of file IfxCan_PinMap.h.

◆ IfxCan_RXD10A_P00_1_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD10A_P00_1_IN

CAN receive input node 0.

Definition at line 97 of file IfxCan_PinMap.h.

◆ IfxCan_RXD10B_P14_7_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD10B_P14_7_IN

CAN receive input node 0.

Definition at line 98 of file IfxCan_PinMap.h.

◆ IfxCan_RXD10C_P23_0_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD10C_P23_0_IN

CAN receive input node 0.

Definition at line 99 of file IfxCan_PinMap.h.

◆ IfxCan_RXD10D_P13_1_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD10D_P13_1_IN

CAN receive input node 0.

Definition at line 100 of file IfxCan_PinMap.h.

◆ IfxCan_RXD11A_P02_4_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD11A_P02_4_IN

CAN receive input node 1.

Definition at line 101 of file IfxCan_PinMap.h.

◆ IfxCan_RXD11B_P00_5_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD11B_P00_5_IN

CAN receive input node 1.

Definition at line 102 of file IfxCan_PinMap.h.

◆ IfxCan_RXD11C_P23_7_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD11C_P23_7_IN

CAN receive input node 1.

Definition at line 103 of file IfxCan_PinMap.h.

◆ IfxCan_RXD11D_P11_7_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD11D_P11_7_IN

CAN receive input node 1.

Definition at line 104 of file IfxCan_PinMap.h.

◆ IfxCan_RXD12A_P20_6_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD12A_P20_6_IN

CAN receive input node 2.

Definition at line 105 of file IfxCan_PinMap.h.

◆ IfxCan_RXD12B_P10_8_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD12B_P10_8_IN

CAN receive input node 2.

Definition at line 106 of file IfxCan_PinMap.h.

◆ IfxCan_RXD12C_P23_3_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD12C_P23_3_IN

CAN receive input node 2.

Definition at line 107 of file IfxCan_PinMap.h.

◆ IfxCan_RXD12D_P11_8_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD12D_P11_8_IN

CAN receive input node 2.

Definition at line 108 of file IfxCan_PinMap.h.

◆ IfxCan_RXD13A_P14_7_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD13A_P14_7_IN

CAN receive input node 3.

Definition at line 109 of file IfxCan_PinMap.h.

◆ IfxCan_RXD13B_P33_5_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD13B_P33_5_IN

CAN receive input node 3.

Definition at line 110 of file IfxCan_PinMap.h.

◆ IfxCan_RXD13C_P22_5_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD13C_P22_5_IN

CAN receive input node 3.

Definition at line 111 of file IfxCan_PinMap.h.

◆ IfxCan_RXD13D_P11_13_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD13D_P11_13_IN

CAN receive input node 3.

Definition at line 112 of file IfxCan_PinMap.h.

◆ IfxCan_RXD20A_P10_5_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD20A_P10_5_IN

CAN receive input node 0.

Definition at line 113 of file IfxCan_PinMap.h.

◆ IfxCan_RXD20B_P10_8_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD20B_P10_8_IN

CAN receive input node 0.

Definition at line 114 of file IfxCan_PinMap.h.

◆ IfxCan_RXD20C_P34_2_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD20C_P34_2_IN

CAN receive input node 0.

Definition at line 115 of file IfxCan_PinMap.h.

◆ IfxCan_RXD20D_P02_14_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD20D_P02_14_IN

CAN receive input node 0.

Definition at line 116 of file IfxCan_PinMap.h.

◆ IfxCan_RXD20E_P01_8_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD20E_P01_8_IN

CAN receive input node 0.

Definition at line 117 of file IfxCan_PinMap.h.

◆ IfxCan_RXD20F_P11_14_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD20F_P11_14_IN

CAN receive input node 0.

Definition at line 118 of file IfxCan_PinMap.h.

◆ IfxCan_RXD21A_P00_3_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD21A_P00_3_IN

CAN receive input node 1.

Definition at line 119 of file IfxCan_PinMap.h.

◆ IfxCan_RXD21B_P13_12_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD21B_P13_12_IN

CAN receive input node 1.

Definition at line 120 of file IfxCan_PinMap.h.

◆ IfxCan_RXD21C_P20_0_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD21C_P20_0_IN

CAN receive input node 1.

Definition at line 121 of file IfxCan_PinMap.h.

◆ IfxCan_RXD21D_P32_2_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD21D_P32_2_IN

CAN receive input node 1.

Definition at line 122 of file IfxCan_PinMap.h.

◆ IfxCan_RXD21E_P01_0_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD21E_P01_0_IN

CAN receive input node 1.

Definition at line 123 of file IfxCan_PinMap.h.

◆ IfxCan_RXD21F_P22_7_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD21F_P22_7_IN

CAN receive input node 1.

Definition at line 124 of file IfxCan_PinMap.h.

◆ IfxCan_RXD22A_P33_13_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD22A_P33_13_IN

CAN receive input node 2.

Definition at line 125 of file IfxCan_PinMap.h.

◆ IfxCan_RXD22B_P32_7_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD22B_P32_7_IN

CAN receive input node 2.

Definition at line 126 of file IfxCan_PinMap.h.

◆ IfxCan_RXD22C_P23_6_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD22C_P23_6_IN

CAN receive input node 2.

Definition at line 127 of file IfxCan_PinMap.h.

◆ IfxCan_RXD22D_P14_14_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD22D_P14_14_IN

CAN receive input node 2.

Definition at line 128 of file IfxCan_PinMap.h.

◆ IfxCan_RXD22E_P22_9_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD22E_P22_9_IN

CAN receive input node 2.

Definition at line 129 of file IfxCan_PinMap.h.

◆ IfxCan_RXD23A_P14_10_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD23A_P14_10_IN

CAN receive input node 3.

Definition at line 130 of file IfxCan_PinMap.h.

◆ IfxCan_RXD23B_P23_3_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD23B_P23_3_IN

CAN receive input node 3.

Definition at line 131 of file IfxCan_PinMap.h.

◆ IfxCan_RXD23C_P14_15_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD23C_P14_15_IN

CAN receive input node 3.

Definition at line 132 of file IfxCan_PinMap.h.

◆ IfxCan_RXD23D_P13_5_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD23D_P13_5_IN

CAN receive input node 3.

Definition at line 133 of file IfxCan_PinMap.h.

◆ IfxCan_RXD23E_P22_11_IN

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD23E_P22_11_IN

CAN receive input node 3.

Definition at line 134 of file IfxCan_PinMap.h.

◆ IfxCan_Rxd_In_pinTable

IFX_EXTERN const IfxCan_Rxd_In* IfxCan_Rxd_In_pinTable[IFXCAN_PINMAP_NUM_MODULES][IFXCAN_PINMAP_NUM_NODES][IFXCAN_PINMAP_RXD_IN_NUM_ITEMS]

IfxCan_Rxd_In table.

Definition at line 206 of file IfxCan_PinMap.h.

◆ IfxCan_TXD00_P01_13_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD00_P01_13_OUT

CAN transmit output node 0.

Definition at line 135 of file IfxCan_PinMap.h.

◆ IfxCan_TXD00_P02_0_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD00_P02_0_OUT

CAN transmit output node 0.

Definition at line 136 of file IfxCan_PinMap.h.

◆ IfxCan_TXD00_P02_13_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD00_P02_13_OUT

CAN transmit output node 0.

Definition at line 137 of file IfxCan_PinMap.h.

◆ IfxCan_TXD00_P12_1_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD00_P12_1_OUT

CAN transmit output node 0.

Definition at line 138 of file IfxCan_PinMap.h.

◆ IfxCan_TXD00_P20_8_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD00_P20_8_OUT

CAN transmit output node 0.

Definition at line 139 of file IfxCan_PinMap.h.

◆ IfxCan_TXD00_P33_13_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD00_P33_13_OUT

CAN transmit output node 0.

Definition at line 140 of file IfxCan_PinMap.h.

◆ IfxCan_TXD00_P33_8_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD00_P33_8_OUT

CAN transmit output node 0.

Definition at line 141 of file IfxCan_PinMap.h.

◆ IfxCan_TXD00_P34_1_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD00_P34_1_OUT

CAN transmit output node 0.

Definition at line 142 of file IfxCan_PinMap.h.

◆ IfxCan_TXD01_P01_3_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD01_P01_3_OUT

CAN transmit output node 1.

Definition at line 143 of file IfxCan_PinMap.h.

◆ IfxCan_TXD01_P02_9_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD01_P02_9_OUT

CAN transmit output node 1.

Definition at line 144 of file IfxCan_PinMap.h.

◆ IfxCan_TXD01_P14_0_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD01_P14_0_OUT

CAN transmit output node 1.

Definition at line 145 of file IfxCan_PinMap.h.

◆ IfxCan_TXD01_P15_2_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD01_P15_2_OUT

CAN transmit output node 1.

Definition at line 146 of file IfxCan_PinMap.h.

◆ IfxCan_TXD01_P33_9_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD01_P33_9_OUT

CAN transmit output node 1.

Definition at line 147 of file IfxCan_PinMap.h.

◆ IfxCan_TXD02_P02_2_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD02_P02_2_OUT

CAN transmit output node 2.

Definition at line 148 of file IfxCan_PinMap.h.

◆ IfxCan_TXD02_P10_3_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD02_P10_3_OUT

CAN transmit output node 2.

Definition at line 149 of file IfxCan_PinMap.h.

◆ IfxCan_TXD02_P14_10_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD02_P14_10_OUT

CAN transmit output node 2.

Definition at line 150 of file IfxCan_PinMap.h.

◆ IfxCan_TXD02_P15_0_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD02_P15_0_OUT

CAN transmit output node 2.

Definition at line 151 of file IfxCan_PinMap.h.

◆ IfxCan_TXD02_P32_5_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD02_P32_5_OUT

CAN transmit output node 2.

Definition at line 152 of file IfxCan_PinMap.h.

◆ IfxCan_TXD03_P00_2_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD03_P00_2_OUT

CAN transmit output node 3.

Definition at line 153 of file IfxCan_PinMap.h.

◆ IfxCan_TXD03_P01_2_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD03_P01_2_OUT

CAN transmit output node 3.

Definition at line 154 of file IfxCan_PinMap.h.

◆ IfxCan_TXD03_P11_12_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD03_P11_12_OUT

CAN transmit output node 3.

Definition at line 155 of file IfxCan_PinMap.h.

◆ IfxCan_TXD03_P20_10_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD03_P20_10_OUT

CAN transmit output node 3.

Definition at line 156 of file IfxCan_PinMap.h.

◆ IfxCan_TXD03_P20_3_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD03_P20_3_OUT

CAN transmit output node 3.

Definition at line 157 of file IfxCan_PinMap.h.

◆ IfxCan_TXD03_P32_3_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD03_P32_3_OUT

CAN transmit output node 3.

Definition at line 158 of file IfxCan_PinMap.h.

◆ IfxCan_TXD10_P00_0_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD10_P00_0_OUT

CAN transmit output node 0.

Definition at line 159 of file IfxCan_PinMap.h.

◆ IfxCan_TXD10_P13_0_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD10_P13_0_OUT

CAN transmit output node 0.

Definition at line 160 of file IfxCan_PinMap.h.

◆ IfxCan_TXD10_P14_9_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD10_P14_9_OUT

CAN transmit output node 0.

Definition at line 161 of file IfxCan_PinMap.h.

◆ IfxCan_TXD10_P23_1_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD10_P23_1_OUT

CAN transmit output node 0.

Definition at line 162 of file IfxCan_PinMap.h.

◆ IfxCan_TXD11_P00_4_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD11_P00_4_OUT

CAN transmit output node 1.

Definition at line 163 of file IfxCan_PinMap.h.

◆ IfxCan_TXD11_P02_5_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD11_P02_5_OUT

CAN transmit output node 1.

Definition at line 164 of file IfxCan_PinMap.h.

◆ IfxCan_TXD11_P11_0_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD11_P11_0_OUT

CAN transmit output node 1.

Definition at line 165 of file IfxCan_PinMap.h.

◆ IfxCan_TXD11_P23_6_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD11_P23_6_OUT

CAN transmit output node 1.

Definition at line 166 of file IfxCan_PinMap.h.

◆ IfxCan_TXD12_P10_7_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD12_P10_7_OUT

CAN transmit output node 2.

Definition at line 167 of file IfxCan_PinMap.h.

◆ IfxCan_TXD12_P11_1_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD12_P11_1_OUT

CAN transmit output node 2.

Definition at line 168 of file IfxCan_PinMap.h.

◆ IfxCan_TXD12_P20_7_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD12_P20_7_OUT

CAN transmit output node 2.

Definition at line 169 of file IfxCan_PinMap.h.

◆ IfxCan_TXD12_P23_2_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD12_P23_2_OUT

CAN transmit output node 2.

Definition at line 170 of file IfxCan_PinMap.h.

◆ IfxCan_TXD13_P11_4_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD13_P11_4_OUT

CAN transmit output node 3.

Definition at line 171 of file IfxCan_PinMap.h.

◆ IfxCan_TXD13_P14_6_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD13_P14_6_OUT

CAN transmit output node 3.

Definition at line 172 of file IfxCan_PinMap.h.

◆ IfxCan_TXD13_P22_4_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD13_P22_4_OUT

CAN transmit output node 3.

Definition at line 173 of file IfxCan_PinMap.h.

◆ IfxCan_TXD13_P33_4_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD13_P33_4_OUT

CAN transmit output node 3.

Definition at line 174 of file IfxCan_PinMap.h.

◆ IfxCan_TXD20_P01_13_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD20_P01_13_OUT

CAN transmit output node 0.

Definition at line 175 of file IfxCan_PinMap.h.

◆ IfxCan_TXD20_P02_13_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD20_P02_13_OUT

CAN transmit output node 0.

Definition at line 176 of file IfxCan_PinMap.h.

◆ IfxCan_TXD20_P10_6_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD20_P10_6_OUT

CAN transmit output node 0.

Definition at line 177 of file IfxCan_PinMap.h.

◆ IfxCan_TXD20_P10_7_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD20_P10_7_OUT

CAN transmit output node 0.

Definition at line 178 of file IfxCan_PinMap.h.

◆ IfxCan_TXD20_P11_5_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD20_P11_5_OUT

CAN transmit output node 0.

Definition at line 179 of file IfxCan_PinMap.h.

◆ IfxCan_TXD20_P34_1_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD20_P34_1_OUT

CAN transmit output node 0.

Definition at line 180 of file IfxCan_PinMap.h.

◆ IfxCan_TXD21_P00_2_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD21_P00_2_OUT

CAN transmit output node 1.

Definition at line 181 of file IfxCan_PinMap.h.

◆ IfxCan_TXD21_P01_2_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD21_P01_2_OUT

CAN transmit output node 1.

Definition at line 182 of file IfxCan_PinMap.h.

◆ IfxCan_TXD21_P13_9_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD21_P13_9_OUT

CAN transmit output node 1.

Definition at line 183 of file IfxCan_PinMap.h.

◆ IfxCan_TXD21_P20_3_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD21_P20_3_OUT

CAN transmit output node 1.

Definition at line 184 of file IfxCan_PinMap.h.

◆ IfxCan_TXD21_P22_6_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD21_P22_6_OUT

CAN transmit output node 1.

Definition at line 185 of file IfxCan_PinMap.h.

◆ IfxCan_TXD21_P32_3_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD21_P32_3_OUT

CAN transmit output node 1.

Definition at line 186 of file IfxCan_PinMap.h.

◆ IfxCan_TXD22_P14_13_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD22_P14_13_OUT

CAN transmit output node 2.

Definition at line 187 of file IfxCan_PinMap.h.

◆ IfxCan_TXD22_P22_8_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD22_P22_8_OUT

CAN transmit output node 2.

Definition at line 188 of file IfxCan_PinMap.h.

◆ IfxCan_TXD22_P23_5_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD22_P23_5_OUT

CAN transmit output node 2.

Definition at line 189 of file IfxCan_PinMap.h.

◆ IfxCan_TXD22_P32_6_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD22_P32_6_OUT

CAN transmit output node 2.

Definition at line 190 of file IfxCan_PinMap.h.

◆ IfxCan_TXD22_P33_12_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD22_P33_12_OUT

CAN transmit output node 2.

Definition at line 191 of file IfxCan_PinMap.h.

◆ IfxCan_TXD23_P13_4_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD23_P13_4_OUT

CAN transmit output node 3.

Definition at line 192 of file IfxCan_PinMap.h.

◆ IfxCan_TXD23_P14_14_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD23_P14_14_OUT

CAN transmit output node 3.

Definition at line 193 of file IfxCan_PinMap.h.

◆ IfxCan_TXD23_P14_9_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD23_P14_9_OUT

CAN transmit output node 3.

Definition at line 194 of file IfxCan_PinMap.h.

◆ IfxCan_TXD23_P22_10_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD23_P22_10_OUT

CAN transmit output node 3.

Definition at line 195 of file IfxCan_PinMap.h.

◆ IfxCan_TXD23_P23_2_OUT

IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD23_P23_2_OUT

CAN transmit output node 3.

Definition at line 196 of file IfxCan_PinMap.h.

◆ IfxCan_Txd_Out_pinTable

IFX_EXTERN const IfxCan_Txd_Out* IfxCan_Txd_Out_pinTable[IFXCAN_PINMAP_NUM_MODULES][IFXCAN_PINMAP_NUM_NODES][IFXCAN_PINMAP_TXD_OUT_NUM_ITEMS]

IfxCan_Txd_Out table.

Definition at line 209 of file IfxCan_PinMap.h.


iLLD_TC38A: How to use the CAN Interface driver?

How to use the CAN Interface driver?
iLLD » CAN
Collaboration diagram for How to use the CAN Interface driver?:

The CAN interface driver provides a default configuration for various modes.

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Can/Can/IfxCan_Can.h>

Variables

Declare the CAN handles as global variables in your C code:

#define TESTED_NODES 2
#define NODE0_RAM_OFFSET 0x0
#define NODE1_RAM_OFFSET 0x1000
// CAN handle
IfxCan_Can can;
// CAN Node handles
IfxCan_Can_Node canNode[TESTED_NODES];
// data buffers
uint32 txData[2];
uint32 rxData[2];

Module Initialisation

The module initialisation can be done as followed:

// create module configuration
IfxCan_Can_Config canConfig;
IfxCan_Can_initModuleConfig(&canConfig, &MODULE_CAN0);
// choose the interrupt groups configuration
// Tx interrupts
canConfig.traco.priority = 10;
canConfig.traco.typeOfService = IfxSrc_Tos_cpu0;
canConfig.traco.interruptLine = IfxCan_InterruptLine_0;
// Rx interrupts
canConfig.reint.priority = 11;
canConfig.reint.typeOfService = IfxSrc_Tos_cpu0;
canConfig.reint.interruptLine = IfxCan_InterruptLine_1;
// initialize module
// IfxCan_Can can; // defined globally
IfxCan_Can_initModule(&can, &canConfig);

Note: Application should explicitly configure the system DMA, if system DMA is selected as the service provider for the interrupt.

Node Initialisation

The Node initialisation can be done as followed:

// create node configuration
// Node 0 as receive node
{
IfxCan_Can_NodeConfig nodeConfig;
IfxCan_Can_initNodeConfig(&nodeConfig, &can);
// initialize Node 0
nodeConfig.nodeId = IfxCan_NodeId_0;
nodeConfig.clockSource = IfxCan_ClockSource_both;
nodeConfig.frame.type = IfxCan_FrameType_receive;
nodeConfig.filterConfig.standardListSize = 2;
nodeConfig.messageRAM.standardFilterListStartAddress = 0x100;
nodeConfig.messageRAM.rxBuffersStartAddress = 0x200;
nodeConfig.messageRAM.baseAddress = MODULE_CAN0_RAM + NODE0_RAM_OFFSET;
// enable the required interrupts with respective to group interrupts configuration at module level
nodeConfig.interruptConfig.messageStoredToDedicatedRxBufferEnabled = TRUE;
// initialize Node 0
IfxCan_Can_initNode(&canNode[0], &nodeConfig);
}
// Node 1 as transmit node
{
IfxCan_Can_NodeConfig nodeConfig;
IfxCan_Can_initNodeConfig(&nodeConfig, &can);
nodeConfig.nodeId = IfxCan_NodeId_1;
nodeConfig.clockSource = IfxCan_ClockSource_both;
nodeConfig.frame.type = IfxCan_FrameType_transmit;
nodeConfig.txConfig.dedicatedTxBuffersNumber = 2;
nodeConfig.messageRAM.txBuffersStartAddress = 0x400;
nodeConfig.messageRAM.baseAddress = MODULE_CAN0_RAM + NODE1_RAM_OFFSET;
// enable the required interrupts with respective to group interrupts configuration at module level
nodeConfig.interruptConfig.transmissionCompletedEnabled = TRUE;
// initialize Node 1;
IfxCan_Can_initNode(&canNode[1], &nodeConfig);
}

Filter Initialisation

The filters can be set as following, number of filters can be chosen from nodeConfig.filterConfig.standardListSize or nodeConfig.filterConfig.extendedListSize
based on the type of filter in the receive node configuration

// set filters
// set filter for Rx Buffer 0
{
// Initialize the filter structure
IfxCan_Filter filter;
filter.number = 0;
filter.elementConfiguration = IfxCan_FilterElementConfiguration_storeInRxBuffer;
filter.id1 = 0x00;
filter.rxBufferOffset = IfxCan_RxBufferId_0;
IfxCan_Can_setStandardFilter(&canNode[0], &filter);
}
// set filter for rxBuffer 1
{
IfxCan_Filter filter;
filter.number = 1;
filter.elementConfiguration = IfxCan_FilterElementConfiguration_storeInRxBuffer;
filter.id1 = 0x7ff;
filter.rxBufferOffset = IfxCan_RxBufferId_1;
IfxCan_Can_setStandardFilter(&canNode[0], &filter);
}

Nodes Synchronization

wait until the Node (M_CAN) is synchronised

while (IfxCan_Can_isNodeSynchronized(&canNode[0]) != TRUE);
while (IfxCan_Can_isNodeSynchronized(&canNode[1]) != TRUE);

The CAN is ready for use now!

Standard Data Transfers

The CAN driver provides simple to use transfer functions

Data can be sent by the following way:

//data that needs to be transmitted
txData[0] = 0xC0CAC01A;
txData[1] = 0xBA5EBA11;
// Initialise the message strcture with defualt values
IfxCan_Message txMsg;
IfxCan_Can_initMessage(&txMsg);
// change the relevent members of message structure
txMsg.bufferNumber = 0;
txMsg.messageId = 0x0;
// Transmit Data
while( IfxCan_Can_sendMessage(&canNode[1], &txMsg, txData) == IfxCan_Status_notSentBusy );

Data can be received by the following way:

// Receiving Data
// will be replaced by the received values
rxData[0] = 0xdeadbeef;
rxData[1] = 0xdeadbeef;
// Initialise the message structure with default values, will be replaced by the received values
IfxCan_Message rxMsg;
IfxCan_Can_initMessage(&rxMsg);
// specify the rx buffer number where the data will be received based on the filter configuration
rxMsg.bufferNumber = 0;
// wait until node receives the data
while ((IfxCan_Can_isNewDataReceived(&canNode[0], (IfxCan_RxBufferId)rxMsg.bufferNumber)) == 0)
{ }
// read message
IfxCan_Can_readMessage(&canNode[0], &rxMsg, rxData);
// data is now available at rxData[0] and rxData[1]

FD Transfers

CAN driver supports FD transfers both long frame trasfers and long & fast frame transfers, FD transfers has to be selected in the node initialisation phase

define data buffers globally

uint32 txData[16];
uint32 rxData[16];

FD initialisation can be done as followed at node level after initialising the module please refer to Module Initialisation subsection previously

// create node configuration
// Node 0 as receive node
{
IfxCan_Can_NodeConfig nodeConfig;
IfxCan_Can_initNodeConfig(&nodeConfig, &can);
// initialize Node 0
nodeConfig.nodeId = IfxCan_NodeId_0;
nodeConfig.clockSource = IfxCan_ClockSource_both;
nodeConfig.frame.type = IfxCan_FrameType_receive;
nodeConfig.frame.mode = IfxCan_FrameMode_fdLong; // incase of long and fast frames choose IfxCan_FrameMode_fdLongAndFast
nodeConfig.rxConfig.rxBufferDataFieldSize = IfxCan_DataFieldSize_64; // choose the data field size to allocate rx elements in th emessage RAM
// this is not the data length (DLC) of the message
nodeConfig.filterConfig.standardListSize = 2;
nodeConfig.messageRAM.standardFilterListStartAddress = 0x100;
nodeConfig.messageRAM.rxBuffersStartAddress = 0x200;
nodeConfig.messageRAM.baseAddress = MODULE_CAN0_RAM + NODE0_RAM_OFFSET;
// initialize Node 0
IfxCan_Can_initNode(&canNode[0], &nodeConfig);
}
// Node 1 as transmit node
{
IfxCan_Can_NodeConfig nodeConfig;
IfxCan_Can_initNodeConfig(&nodeConfig, &can);
nodeConfig.nodeId = IfxCan_NodeId_1;
nodeConfig.clockSource = IfxCan_ClockSource_both;
nodeConfig.frame.type = IfxCan_FrameType_transmit;
nodeConfig.frame.mode = IfxCan_FrameMode_fdLong; // incase of long and fast frames choose IfxCan_FrameMode_fdLongAndFast
// it can also be standard frame when the receive node is configured into FD mode
nodeConfig.txConfig.dedicatedTxBuffersNumber = 2;
nodeConfig.txConfig.txBufferDataFieldSize = IfxCan_DataFieldSize_64; // choose the data field size to allocate tx elements in the message RAM
// this is not the data length (DLC) of the message
nodeConfig.messageRAM.txBuffersStartAddress = 0x400;
nodeConfig.messageRAM.baseAddress = MODULE_CAN0_RAM + NODE1_RAM_OFFSET;
// initialize Node 1;
IfxCan_Can_initNode(&canNode[1], &nodeConfig);
}

filter configuration can be set using IfxCan_Can_setStandardFilter function, please refer to Filter Initialisation subsection previously

then wait for the nodes to be synchronized, before sending and receiving, please refer to Nodes Synchronization subsection previously

data can be sent and received similarly as standard data transfers except the FD configuration, choose the FD related configuration accordingly in the message structure before sending and receiving

transmit example

//data that needs to be transmitted
int i;
for (i = 0; i<8; i++)
{
// uint32 txData[16]; //defined globally
txData[i] = 0x11223300 + i;
}
// Initialise the message structure with defualt values
IfxCan_Message txMsg;
IfxCan_Can_initMessage(&txMsg);
// change the relevent members of the message structure
txMsg.bufferNumber = 1;
txMsg.messageId = 0x7ff;
txMsg.dataLengthCode = IfxCan_DataLengthCode_32; // accordingly txData array is loaded upto txData[8]
// so it doesn't always have to be 64 bytes, it can be changed in the run time
txMsg.frameMode = IfxCan_FrameMode_fdLong;
// Transmit Data
while( IfxCan_Can_sendMessage(&canNode[1], &txMsg, txData) == IfxCan_Status_notSentBusy );

Receiving Data

// Initialise the message structure with default values, will be replaced by the received values
IfxCan_Message rxMsg;
IfxCan_initMessage(&rxMsg);
// specify the rx buffer number where the data will be received
rxMsg.bufferNumber = 1; // choose the buffer number based on the filter configuration an message ID of the TX message
// wait until node receives the data
while ((IfxCan_Can_isNewDataReceived(&canNode[0], (IfxCan_RxBufferId)rxMsg.bufferNumber)) == 0)
{ }
// read message
// uint32 rxData[16] // defined globally
IfxCan_Can_readMessage(&canNode[0], &rxMsg, rxData);
// data is now available at rxData

FIFO Standard Transfers

CAN driver supports FIFO transfers for both standard and FD data, FIFO transfers has to be selected in the node initialisation phase

FIFO initialisation can be done as followed at node level after initialising the module please refer to Module Initialisation subsection previously

// create node configuration
// Node 0 as receive node
{
IfxCan_Can_NodeConfig nodeConfig;
IfxCan_Can_initNodeConfig(&nodeConfig, &can);
// initialize Node 0
nodeConfig.nodeId = IfxCan_NodeId_0;
nodeConfig.clockSource = IfxCan_ClockSource_both;
nodeConfig.frame.type = IfxCan_FrameType_receive;
nodeConfig.filterConfig.standardListSize = 2;
nodeConfig.rxConfig.rxMode = IfxCan_RxMode_sharedFifo0; // see the Rx mode optins to select between Rx buffers and Rx fifos or the combination
nodeConfig.rxConfig.rxFifo0Size = 64;
nodeConfig.messageRAM.standardFilterListStartAddress = 0x100;
nodeConfig.messageRAM.rxBuffersStartAddress = 0x200;
nodeConfig.messageRAM.rxFifo0StartAddress = 0x300;
nodeConfig.messageRAM.baseAddress = MODULE_CAN0_RAM + NODE0_RAM_OFFSET;
// initialize Node 0
IfxCan_Can_initNode(&canNode[0], &nodeConfig);
}
// Node 1 as transmit node
{
IfxCan_Can_NodeConfig nodeConfig;
IfxCan_Can_initNodeConfig(&nodeConfig, &can);
nodeConfig.nodeId = IfxCan_NodeId_1;
nodeConfig.clockSource = IfxCan_ClockSource_both;
nodeConfig.frame.type = IfxCan_FrameType_transmit;
nodeConfig.txConfig.txMode = IfxCan_TxMode_fifo; // see the Rx mode optins to select between Tx buffers and Tx fifo/Queue or the combination
nodeConfig.txConfig.dedicatedTxBuffersNumber = 0; // since Tx mode is chosen as only FIFO
nodeConfig.txConfig.txFifoQueueSize = 32;
nodeConfig.messageRAM.txBuffersStartAddress = 0x400;
nodeConfig.messageRAM.baseAddress = MODULE_CAN0_RAM + NODE1_RAM_OFFSET;
// initialize Node 1;
IfxCan_Can_initNode(&canNode[1], &nodeConfig);
}

filter configuration can be set using IfxCan_Can_setStandardFilter function,
filter configuration example for FIFO transfers,
here one filter is set for Rx FIFO and one for RX Buffers because Rx Mode is chosen as sharedFifo0 in nodeConfig.rxConfig of receive node

// set filters
// set filter for Rx FIFO 0
{
// Initialize the filter structure
IfxCan_Filter filter;
filter.number = 0;
filter.elementConfiguration = IfxCan_FilterElementConfiguration_storeInRxFifo1;
filter.type = IfxCan_FilterType_range;
filter.id1 = 0x00;
filter.id2 = 0x00;
IfxCan_Can_setStandardFilter(&canNode[0], &filter);
}
// set filter for rxBuffer 0
{
IfxCan_Filter filter;
filter.number = 1;
filter.elementConfiguration = IfxCan_FilterElementConfiguration_storeInRxBuffer;
filter.id1 = 0x7f;
filter.rxBufferOffset = IfxCan_RxBufferId_0;
IfxCan_Can_setStandardFilter(&canNode[0], &filter);
}

wait for the nodes to be synchronized, before sending and receiving, please refer to Nodes Synchronization subsection previously

data can be sent and received similarly as standard data transfers except the FIFO configuration, choose the FIFO related configuration accordingly in the message structure before sending and receiving

transmit and receive example

//data that needs to be transmitted
txData[0] = 0x55555555;
txData[1] = 0xAAAAAAAA;
// will be replaced by the received values
rxData[0] = 0xdeadbeef;
rxData[1] = 0xdeadbeef;
// Initialise the tx message structure with defualt values
IfxCan_Message txMsg;
IfxCan_Can_initMessage(&txMsg);
// change the relevant members of transmit message structure
txMsg.messageId = 0x0; // since the tx mode is configured as FIFO the ID should be constant for all the messages
// if the tx mode is configured as Queue then the ID can be changed during run time
txMsg.storeInTxFifoQueue = TRUE; // enable writing the data into FIFO/Queue,
// this will enable the sendMessage API to get the next Tx element based on the put index of the Tx FIFO
// Initialise the rx message structure with defualt values
IfxCan_Message rxMsg;
IfxCan_Can_initMessage(&rxMsg);
// change the relevant members of receive message structure
rxMsg.readFromRxFifo0 = TRUE; // enable reading the data from Rx FIFO 0
// this will enable the readMessage API to get the next Rx element based on the get index of Rx FIFO 0
// send and receive through FIFO
uint32 i = 0;
// #define FIFO_LENGTH 20 // define globally
for (i = 0; i < FIFO_LENGTH; ++i)
{
// Transmit Data
if (IfxCan_Can_isTxFifoQueueFull(&canNode[1]) != TRUE)
{
while( IfxCan_Can_sendMessage(&canNode[1], &txMsg, txData) == IfxCan_Status_notSentBusy );
}
// Receive Data
// wait until RX FIFO 0 receives new data
while(IfxCan_Can_getRxFifo0FillLevel(&canNode[0]) == 0);
if (IfxCan_Can_getRxFifo0FillLevel(&canNode[0]) > 0)
{
// read message
IfxCan_Can_readMessage(&canNode[0], &rxMsg, rxData);
}
// data is now available at rxData[0] and rxData[1]
result |= clib_trace(rxData[0], txData[0]);
result |= clib_trace(rxData[1], txData[1]);
txData[0]++;
txData[1]++;
}

FIFO FD Transfers

FD transfers through FIFO is similar to FIFO standard transfers except the FD configuration please refer to FD transfers section and FIFO Standard transfers section, and choose the FD configuration accordingly


iLLD_TC38A: CAN Interface Driver

Modules
CAN Interface Driver
iLLD » CAN
Collaboration diagram for CAN Interface Driver:

Modules

Data Structures
Module Initialize Functions
Data Transfer Functions
Filter Configuration Functions
Node Initialize Functions

Detailed Description


iLLD_TC38A: Data Structures

Data Structures
Data Structures
iLLD » CAN » CAN Interface Driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxCan_Can_BaudRate
Structure for nominal baudrate. More...
struct | IfxCan_Can_FastBaudRate
Structure for fast baudrate. More...
struct | IfxCan_Can_FilterConfig
Structure for Acceptance filter configuration. More...
struct | IfxCan_Can_Frame
Structure for Frame Configuration. More...
struct | IfxCan_Can_InterruptConfig
Structure for Interrupt configuration. More...
struct | IfxCan_Can_Pins
Structure for CAN pin configuration. More...
struct | IfxCan_Can_RxConfig
Structure for Rx handle Configuration. More...
struct | IfxCan_Can_TxConfig
Structure for Tx handle Configuration. More...
struct | IfxCan_Can
Module handle. More...
struct | IfxCan_Can_Config
Configuration Structure of the Module. More...
struct | IfxCan_Can_Node
Node handle. More...
struct | IfxCan_Can_NodeConfig
Configuration Structure of the Node. More...

Detailed Description

Data Structure Documentation

◆ IfxCan_Can_BaudRate

struct IfxCan_Can_BaudRate

Structure for nominal baudrate.

Definition at line 562 of file IfxCan_Can.h.

Data Fields
uint32 | baudrate | Specifies the baud rate. Unit: baud.
uint16 | prescaler | Baud Rate Prescaler.
uint16 | samplePoint | Specifies the baud rate. Unit: baud.
uint16 | syncJumpWidth | Synchronization Jump Width.
uint8 | timeSegment1 | Time segment before sample point.
uint8 | timeSegment2 | Time segment after sample point.

◆ IfxCan_Can_FastBaudRate

struct IfxCan_Can_FastBaudRate

Structure for fast baudrate.

Definition at line 574 of file IfxCan_Can.h.

Data Fields
uint32 | baudrate | Specifies the baud rate. Unit: baud.
uint16 | prescaler | Baud Rate Prescaler.
uint16 | samplePoint | Specifies the baud rate. Unit: baud.
uint16 | syncJumpWidth | Synchronization Jump Width.
uint8 | timeSegment1 | Time segment before sample point.
uint8 | timeSegment2 | Time segment after sample point.
uint8 | tranceiverDelayOffset | transceiver delay compensation offset

◆ IfxCan_Can_FilterConfig

struct IfxCan_Can_FilterConfig

Structure for Acceptance filter configuration.

Definition at line 587 of file IfxCan_Can.h.

Data Fields
IfxCan_NonMatchingFrame | extendedFilterForNonMatchingFrames | action to be taken on the frames with ids, which are not matching with the extended filter.
uint8 | extendedListSize | List Size Extended.
IfxCan_MessageIdLength | messageIdLength | Message Id length (Standard / Extended)
boolean | rejectRemoteFramesWithExtendedId | set whether to reject the remote frames with extended id.
boolean | rejectRemoteFramesWithStandardId | set whether to reject the remote frames with standard id.
IfxCan_NonMatchingFrame | standardFilterForNonMatchingFrames | action to be taken on the frames with ids, which are not matching with the standard filter.
uint8 | standardListSize | List Size Standard.

◆ IfxCan_Can_Frame

struct IfxCan_Can_Frame

Structure for Frame Configuration.

Definition at line 600 of file IfxCan_Can.h.

Data Fields
IfxCan_FrameMode | mode | Specifies the frame mode.
IfxCan_FrameType | type | Specifies the frame type.

◆ IfxCan_Can_InterruptConfig

struct IfxCan_Can_InterruptConfig

Structure for Interrupt configuration.

Definition at line 608 of file IfxCan_Can.h.

Collaboration diagram for IfxCan_Can_InterruptConfig:
[legend]
Data Fields
IfxCan_GroupInterruptConfig | alrt | Configuration for Alerts interrupts.
IfxCan_GroupInterruptConfig | boff | Configuration for Bus Off interrupt.
boolean | busOffStatusEnabled | Bus_Off Status Interrupt enable/Disable.
boolean | errorLoggingOverflowEnabled | Error Logging Overflow Interrupt enable/Disable.
boolean | errorPassiveEnabled | Error Passive Interrupt enable/Disable.
boolean | highPriorityMessageEnabled | High Priority Message Interrupt enable/Disable.
IfxCan_GroupInterruptConfig | hpe | Configuration for High Priority Events interrupts.
IfxCan_GroupInterruptConfig | loi | Configuration for Last Error interrupts.
boolean | messageRAMAccessFailureEnabled | Message RAM Access Failure Interrupt enable/Disable.
boolean | messageStoredToDedicatedRxBufferEnabled | Message stored to Dedicated Rx Buffer Interrupt enable/Disable.
IfxCan_GroupInterruptConfig | moer | Configuration for Module errors interrupts.
boolean | protocolErrorArbitrationEnabled | Protocol Error in Arbitration phase Interrupt enable/Disable.
boolean | protocolErrorDataEnabled | Protocol Error in Data phase Interrupt enable/Disable.
IfxCan_GroupInterruptConfig | reint | Configuration for iMessage stored in dedicated receive buffer interrupts.
IfxCan_GroupInterruptConfig | reti | Configuration for Receive Timeouts interrupts.
IfxCan_GroupInterruptConfig | rxf0f | Configuration for Receive FIFO0 full interrupts.
IfxCan_GroupInterruptConfig | rxf0n | Configuration for Receive FIFO0 new message interrupts.
IfxCan_GroupInterruptConfig | rxf1f | Configuration for Receive FIFO1 full interrupts.
IfxCan_GroupInterruptConfig | rxf1n | Configuration for Receive FIFO1 new message interrupts.
boolean | rxFifo0FullEnabled | Rx Fifo 0 Full Interrupt enable/Disable.
boolean | rxFifo0MessageLostEnabled | Rx FIFO 0 Message Lost Interrupt enable/Disable.
boolean | rxFifo0NewMessageEnabled | Rx FIFO 0 New Message Interrupt enable/Disable.
boolean | rxFifo0WatermarkEnabled | Rx Fifo 0 Watermark Interrupt enable/Disable.
boolean | rxFifo1FullEnabled | Rx FIFO 1 Full Interrupt enable/Disable.
boolean | rxFifo1MessageLostEnabled | Rx FIFO 1 Message Lost Interrupt enable/Disable.
boolean | rxFifo1NewMessageEnabled | Rx FIFO 1 New Message Interrupt enable/Disable.
boolean | rxFifo1WatermarkEnabled | Rx FIFO 1 Watermark Reached Interrupt enable/Disable.
IfxCan_GroupInterruptConfig | safe | Configuration for Safety counter overflow interrupt.
IfxCan_GroupInterruptConfig | tefifo | Configuration for Transmit Event FIFO Incidents interrupts.
boolean | timeoutOccurredEnabled | Timeout Occurred Interrupt enable/Disable.
boolean | timestampWraparoundEnabled | Timestamp Wraparound Interrupt enable/Disable.
IfxCan_GroupInterruptConfig | traco | Configuration for interrupts of the transmission control.
boolean | transmissionCancellationFinishedEnabled | Transmission Cancellation Finished Interrupt enable/Disable.
boolean | transmissionCompletedEnabled | Transmission Completed Interrupt enable/Disable.
IfxCan_GroupInterruptConfig | traq | Configuration for Transmission Queue Events interrupts.
boolean | txEventFifoEventLostEnabled | Tx Event FIFO Event Lost Interrupt enable/Disable.
boolean | txEventFifoFullEnabled | Tx Event FIFO Full Interrupt enable/Disable.
boolean | txEventFifoNewEntryEnabled | Tx Event FIFO New Entry Interrupt enable/Disable.
boolean | txEventFifoWatermarkEnabled | Tx Event FIFO Watermark Reached Interrupt enable/Disable.
boolean | txFifoEmptyEnabled | Tx FIFO Empty Interrupt enable/Disable.
boolean | warningStatusEnabled | Warning Status Interrupt enable/Disable.
boolean | watchdogEnabled | Watchdog Interrupt enable/Disable.
IfxCan_GroupInterruptConfig | wati | Configuration for Watermark interrupts.

◆ IfxCan_Can_Pins

struct IfxCan_Can_Pins

Structure for CAN pin configuration.

Definition at line 657 of file IfxCan_Can.h.

Collaboration diagram for IfxCan_Can_Pins:
[legend]
Data Fields
IfxPort_PadDriver | padDriver | Pad driver IfxPort_PadDriver_cmosAutomotiveSpeed2.
IfxCan_Rxd_In * | rxPin | Specifies the receive pin.
IfxPort_InputMode | rxPinMode | Specifies the receive pin as input mode IfxPort_InputMode_noPullDevice.
IfxCan_Txd_Out * | txPin | Specifies the transmit pin.
IfxPort_OutputMode | txPinMode | Specifies the transmit pin output mode IfxPort_OutputMode_pushPull.

◆ IfxCan_Can_RxConfig

struct IfxCan_Can_RxConfig

Structure for Rx handle Configuration.

Definition at line 668 of file IfxCan_Can.h.

Data Fields
IfxCan_DataFieldSize | rxBufferDataFieldSize | Rx Buffer Data Field Size.
IfxCan_DataFieldSize | rxFifo0DataFieldSize | Rx FIFO 0 Data Field Size.
IfxCan_RxFifoMode | rxFifo0OperatingMode | Rx FIFO 0 operating mode.
uint8 | rxFifo0Size | Rx FIFO 0 Size.
uint8 | rxFifo0WatermarkLevel | Rx FIFO 0 watermark level.
IfxCan_DataFieldSize | rxFifo1DataFieldSize | Rx FIFO 1 Data Field Size.
IfxCan_RxFifoMode | rxFifo1OperatingMode | Rx FIFO 1 operating mode.
uint8 | rxFifo1Size | Rx FIFO 1 Size.
uint8 | rxFifo1WatermarkLevel | Rx FIFO 1 watermark level.
IfxCan_RxMode | rxMode | Rx Buffers or FIFO 0 or combination Mode of reception.

◆ IfxCan_Can_TxConfig

struct IfxCan_Can_TxConfig

Structure for Tx handle Configuration.

Definition at line 684 of file IfxCan_Can.h.

Data Fields
uint8 | dedicatedTxBuffersNumber | Number of Dedicated Transmit Buffers.
IfxCan_DataFieldSize | txBufferDataFieldSize | Tx Buffer Data Field Size.
uint8 | txEventFifoSize | Transmit Event FIFO Size.
uint8 | txFifoQueueSize | Transmit FIFO/Queue Size.
IfxCan_TxMode | txMode | Tx FIFO/Queue Mode.

◆ IfxCan_Can

struct IfxCan_Can

Module handle.

Definition at line 699 of file IfxCan_Can.h.

Data Fields
Ifx_CAN * can Specifies the pointer to the CAN registers.

◆ IfxCan_Can_Config

struct IfxCan_Can_Config

Configuration Structure of the Module.

Definition at line 706 of file IfxCan_Can.h.

Data Fields
Ifx_CAN * can Specifies the pointer to the CAN registers.

◆ IfxCan_Can_Node

struct IfxCan_Can_Node

Node handle.

Definition at line 713 of file IfxCan_Can.h.

Collaboration diagram for IfxCan_Can_Node:
[legend]
Data Fields
Ifx_CAN * | can | Specifies the pointer to the CAN registers.
IfxCan_FrameMode | frameMode | Specifies the selected frame mode.
IfxCan_MessageRAM | messageRAM | Structure for Message RAM.
Ifx_CAN_N * | node | Specifies the pointer to the CAN Node registers.

◆ IfxCan_Can_NodeConfig

struct IfxCan_Can_NodeConfig

Configuration Structure of the Node.

Definition at line 723 of file IfxCan_Can.h.

Collaboration diagram for IfxCan_Can_NodeConfig:
[legend]
Data Fields
IfxCan_Can_BaudRate | baudRate | Structure for nominal baudrate.
boolean | busLoopbackEnabled | Internal Virtual CAN bus loopback mode enable / disable choice.
boolean | calculateBitTimingValues | Enable / Disable auto calculation of bit timing values for selected CAN node.
Ifx_CAN * | can | Specifies the pointer to the CAN registers.
IfxCan_ClockSource | clockSource | Clock source.
IfxCan_Can_FastBaudRate | fastBaudRate | Structure for fast baudrate.
IfxCan_Can_FilterConfig | filterConfig | Structure for Acceptance filter configuration.
IfxCan_Can_Frame | frame | Structure for Frame Configuration.
IfxCan_Can_InterruptConfig | interruptConfig | Structure for Interrupt configuration.
IfxCan_MessageRAM | messageRAM | Structure for Message RAM.
IfxCan_NodeId | nodeId | Specifies the Node number of the MCan.
IFX_CONST IfxCan_Can_Pins * | pins | structure for CAN pins
IfxCan_Can_RxConfig | rxConfig | Structure for Rx handle Configuration.
IfxCan_Can_TxConfig | txConfig | Structure for Tx handle Configuration.


iLLD_TC38A: Module Initialize Functions

Functions
Module Initialize Functions
iLLD » CAN » CAN Interface Driver
Collaboration diagram for Module Initialize Functions:

Functions

IFX_EXTERN void | IfxCan_Can_initModule (IfxCan_Can *can, IfxCan_Can_Config *config)
Initialises the CAN Module. More...
IFX_EXTERN void | IfxCan_Can_initModuleConfig (IfxCan_Can_Config *config, Ifx_CAN *can)
Fills the configuration stucture of the CAN Module with default values. More...

Detailed Description

Function Documentation

◆ IfxCan_Can_initModule()

IFX_EXTERN void IfxCan_Can_initModule | ( | IfxCan_Can * | can,
 |  | IfxCan_Can_Config * | config
 | ) |  |

Initialises the CAN Module.

Parameters
can | Specifies the module handle
config | Configuration structure of the module
Returns
None

A coding example can be found in How to use the CAN Interface driver?

Definition at line 74 of file IfxCan_Can.c.

◆ IfxCan_Can_initModuleConfig()

IFX_EXTERN void IfxCan_Can_initModuleConfig | ( | IfxCan_Can_Config * | config,
 |  | Ifx_CAN * | can
 | ) |  |

Fills the configuration stucture of the CAN Module with default values.

Parameters
config | Configuration structure to be filled with default values
can | Specifies the pointer to the CAN registers
Returns
None

A coding example can be found in How to use the CAN Interface driver?

Definition at line 87 of file IfxCan_Can.c.


iLLD_TC38A: Data Transfer Functions

Functions
Data Transfer Functions
iLLD » CAN » CAN Interface Driver
Collaboration diagram for Data Transfer Functions:

Functions

IFX_INLINE uint8 | IfxCan_Can_getRxFifo0FillLevel (IfxCan_Can_Node *node)
Returns Rx FIFO 1 Fill Level. More...
IFX_INLINE uint8 | IfxCan_Can_getRxFifo1FillLevel (IfxCan_Can_Node *node)
Returns Rx FIFO 1 Fill Level. More...
IFX_INLINE boolean | IfxCan_Can_isNewDataReceived (IfxCan_Can_Node *node, IfxCan_RxBufferId rxBufferId)
Returns the status of whether the selcted Rx buffer has been updated from new data. More...
IFX_INLINE boolean | IfxCan_Can_isTxFifoQueueFull (IfxCan_Can_Node *node)
Returns the status of whether Tx Fifo/Queue is full or not. More...
IFX_EXTERN void | IfxCan_Can_initMessage (IfxCan_Message *message)
Initialises the message frame with defualt values. More...
IFX_EXTERN void | IfxCan_Can_readMessage (IfxCan_Can_Node *node, IfxCan_Message *message, uint32 *data)
Reads the CAN received message. More...
IFX_EXTERN IfxCan_Status | IfxCan_Can_sendMessage (IfxCan_Can_Node *node, IfxCan_Message *message, uint32 *data)
Transmits the CAN message. More...

Detailed Description

Function Documentation

◆ IfxCan_Can_getRxFifo0FillLevel()

IFX_INLINE uint8 IfxCan_Can_getRxFifo0FillLevel ( IfxCan_Can_Node * node )

Returns Rx FIFO 1 Fill Level.

Parameters
node CAN Node handle
Returns
Fill level

A coding example can be found in How to use the CAN Interface driver?

Definition at line 936 of file IfxCan_Can.h.

◆ IfxCan_Can_getRxFifo1FillLevel()

IFX_INLINE uint8 IfxCan_Can_getRxFifo1FillLevel ( IfxCan_Can_Node * node )

Returns Rx FIFO 1 Fill Level.

Parameters
node CAN Node handle
Returns
Fill level

A coding example can be found in How to use the CAN Interface driver?

Definition at line 942 of file IfxCan_Can.h.

◆ IfxCan_Can_initMessage()

IFX_EXTERN void IfxCan_Can_initMessage ( IfxCan_Message * message )

Initialises the message frame with defualt values.

Parameters
message Structure for CAN Message
Returns
None

A coding example can be found in How to use the CAN Interface driver?

Definition at line 53 of file IfxCan_Can.c.

◆ IfxCan_Can_isNewDataReceived()

IFX_INLINE boolean IfxCan_Can_isNewDataReceived | ( | IfxCan_Can_Node * | node,
 |  | IfxCan_RxBufferId | rxBufferId
 | ) |  |

Returns the status of whether the selcted Rx buffer has been updated from new data.

Parameters
node | CAN Node handle
rxBufferId | Rx Buffer number
Returns
Status

A coding example can be found in How to use the CAN Interface driver?

Definition at line 948 of file IfxCan_Can.h.

◆ IfxCan_Can_isTxFifoQueueFull()

IFX_INLINE boolean IfxCan_Can_isTxFifoQueueFull ( IfxCan_Can_Node * node )

Returns the status of whether Tx Fifo/Queue is full or not.

Parameters
node CAN Node handle
Returns
Status

A coding example can be found in How to use the CAN Interface driver?

Definition at line 966 of file IfxCan_Can.h.

◆ IfxCan_Can_readMessage()

IFX_EXTERN void IfxCan_Can_readMessage | ( | IfxCan_Can_Node * | node,
 |  | IfxCan_Message * | message,
 |  | uint32 * | data
 | ) |  |

Reads the CAN received message.

Parameters
node | CAN Node handle
message | Structure for Message configuration filled with dummy values and will be relpaced by read values. see IfxCan_Can_initMessage
data | Pointer to data (in words)
Returns
None

A coding example can be found in How to use the CAN Interface driver?

Definition at line 807 of file IfxCan_Can.c.

◆ IfxCan_Can_sendMessage()

IFX_EXTERN IfxCan_Status IfxCan_Can_sendMessage | ( | IfxCan_Can_Node * | node,
 |  | IfxCan_Message * | message,
 |  | uint32 * | data
 | ) |  |

Transmits the CAN message.

Parameters
node | CAN Node handle
message | Structure for Message configuration. see IfxCan_Can_initMessage
data | Pointer to data (in words)
Returns
status

A coding example can be found in How to use the CAN Interface driver?

Definition at line 861 of file IfxCan_Can.c.


iLLD_TC38A: Filter Configuration Functions

Functions
Filter Configuration Functions
iLLD » CAN » CAN Interface Driver
Collaboration diagram for Filter Configuration Functions:

Functions

IFX_EXTERN void | IfxCan_Can_setExtendedFilter (IfxCan_Can_Node *node, IfxCan_Filter *filter)
Sets the Extended Filter element configuration. More...
IFX_EXTERN void | IfxCan_Can_setStandardFilter (IfxCan_Can_Node *node, IfxCan_Filter *filter)
Sets the Standard Filter element configuration. More...

Detailed Description

Function Documentation

◆ IfxCan_Can_setExtendedFilter()

IFX_EXTERN void IfxCan_Can_setExtendedFilter | ( | IfxCan_Can_Node * | node,
 |  | IfxCan_Filter * | filter
 | ) |  |

Sets the Extended Filter element configuration.

Parameters
node | CAN Node handle
filter | Structure for Filter Configuration
Returns
None

A coding example can be found in How to use the CAN Interface driver?

Definition at line 921 of file IfxCan_Can.c.

◆ IfxCan_Can_setStandardFilter()

IFX_EXTERN void IfxCan_Can_setStandardFilter | ( | IfxCan_Can_Node * | node,
 |  | IfxCan_Filter * | filter
 | ) |  |

Sets the Standard Filter element configuration.

Parameters
node | CAN Node handle
filter | Structure for Filter Configuration
Returns
None

A coding example can be found in How to use the CAN Interface driver?

Definition at line 947 of file IfxCan_Can.c.


iLLD_TC38A: Node Initialize Functions

Functions
Node Initialize Functions
iLLD » CAN » CAN Interface Driver
Collaboration diagram for Node Initialize Functions:

Functions

IFX_INLINE boolean | IfxCan_Can_isNodeSynchronized (IfxCan_Can_Node *node)
Returns the status of whether the NODE is synchronised or not. More...
IFX_INLINE boolean | IfxCan_Can_isTxBufferRequestPending (IfxCan_Can_Node *node, IfxCan_TxBufferId txBufferId)
Returns the status of pending request of the selected Tx buffer. More...
IFX_EXTERN boolean | IfxCan_Can_initNode (IfxCan_Can_Node *node, const IfxCan_Can_NodeConfig *config)
Initialises the CAN Node. More...
IFX_EXTERN void | IfxCan_Can_initNodeConfig (IfxCan_Can_NodeConfig *config, IfxCan_Can *can)
Fills the configuration stucture of the Node with default values. More...

Detailed Description

Function Documentation

◆ IfxCan_Can_initNode()

IFX_EXTERN boolean IfxCan_Can_initNode | ( | IfxCan_Can_Node * | node,
 |  | const IfxCan_Can_NodeConfig * | config
 | ) |  |

Initialises the CAN Node.

Parameters
node | CAN Node handle
config | Configuration structure of the Node
Returns
TRUE: Returns TRUE if the operation was successful
FALSE: Returns FALSE if the operation was errorneous

A coding example can be found in How to use the CAN Interface driver?

Definition at line 101 of file IfxCan_Can.c.

◆ IfxCan_Can_initNodeConfig()

IFX_EXTERN void IfxCan_Can_initNodeConfig | ( | IfxCan_Can_NodeConfig * | config,
 |  | IfxCan_Can * | can
 | ) |  |

Fills the configuration stucture of the Node with default values.

Parameters
config | Configuration structure of the Node
can | Specifies the module handle
Returns
None

A coding example can be found in How to use the CAN Interface driver?

Definition at line 620 of file IfxCan_Can.c.

◆ IfxCan_Can_isNodeSynchronized()

IFX_INLINE boolean IfxCan_Can_isNodeSynchronized ( IfxCan_Can_Node * node )

Returns the status of whether the NODE is synchronised or not.

Parameters
node CAN Node handle
Returns
Status TRUE: synchronized, FALSE : Sync in progress

A coding example can be found in How to use the CAN Interface driver?

Definition at line 954 of file IfxCan_Can.h.

◆ IfxCan_Can_isTxBufferRequestPending()

IFX_INLINE boolean IfxCan_Can_isTxBufferRequestPending | ( | IfxCan_Can_Node * | node,
 |  | IfxCan_TxBufferId | txBufferId
 | ) |  |

Returns the status of pending request of the selected Tx buffer.

Parameters
node | CAN Node handle
txBufferId | Tx Buffer number
Returns
Status

Definition at line 960 of file IfxCan_Can.h.

Referenced by IfxCan_Can_sendMessage().


iLLD_TC38A: IfxCan_cfg.h File Reference

  • _Impl
Macros | Enumerations | Variables
IfxCan_cfg.h File Reference
iLLD » CAN

CAN on-chip implementation data. More...

#include "Cpu/Std/Ifx_Types.h"
#include "IfxCan_reg.h"
Include dependency graph for IfxCan_cfg.h:

Go to the source code of this file.

Macros

#define | IFXCAN_NUM_MODULES (3)
Number of CAN modules. More...
#define | IFXCAN_NUM_NODES 4
Number of nodes per each CAN module. More...

Enumerations

enum IfxCan_Index {
IfxCan_Index_none = -1,
IfxCan_Index_0 = 0,
IfxCan_Index_1,
IfxCan_Index_2
}
List of the available can resources. More...
enum IfxCan_NodeId {
IfxCan_NodeId_none = -1,
IfxCan_NodeId_0,
IfxCan_NodeId_1,
IfxCan_NodeId_2,
IfxCan_NodeId_3
}
CAN Node number. More...

Variables

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxCan_cfg_indexMap [IFXCAN_NUM_MODULES]

Detailed Description

CAN on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCan_cfg.h.

Macro Definition Documentation

◆ IFXCAN_NUM_MODULES

#define IFXCAN_NUM_MODULES (3)

Number of CAN modules.

Definition at line 69 of file IfxCan_cfg.h.

Referenced by IfxCan_getAddress(), IfxCan_getIndex(), and IfxCan_getSrcPointer().

◆ IFXCAN_NUM_NODES

#define IFXCAN_NUM_NODES 4

Number of nodes per each CAN module.

Definition at line 73 of file IfxCan_cfg.h.

Variable Documentation

◆ IfxCan_cfg_indexMap

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxCan_cfg_indexMap[IFXCAN_NUM_MODULES]

Definition at line 108 of file IfxCan_cfg.h.


iLLD_TC38A: IfxCan_PinMap.c File Reference

  • _PinMap
Variables
IfxCan_PinMap.c File Reference
iLLD » CAN

CAN I/O map. More...

#include "IfxCan_PinMap.h"
Include dependency graph for IfxCan_PinMap.c:

Go to the source code of this file.

Variables

IfxCan_Rxd_In | IfxCan_RXD00A_P02_1_IN = {&MODULE_CAN0, IfxCan_NodeId_0, {&MODULE_P02, 1}, Ifx_RxSel_a}
IfxCan_Rxd_In | IfxCan_RXD00B_P20_7_IN = {&MODULE_CAN0, IfxCan_NodeId_0, {&MODULE_P20, 7}, Ifx_RxSel_b}
IfxCan_Rxd_In | IfxCan_RXD00C_P12_0_IN = {&MODULE_CAN0, IfxCan_NodeId_0, {&MODULE_P12, 0}, Ifx_RxSel_c}
IfxCan_Rxd_In | IfxCan_RXD00D_P33_12_IN = {&MODULE_CAN0, IfxCan_NodeId_0, {&MODULE_P33,12}, Ifx_RxSel_d}
IfxCan_Rxd_In | IfxCan_RXD00E_P33_7_IN = {&MODULE_CAN0, IfxCan_NodeId_0, {&MODULE_P33, 7}, Ifx_RxSel_e}
IfxCan_Rxd_In | IfxCan_RXD00F_P01_8_IN = {&MODULE_CAN0, IfxCan_NodeId_0, {&MODULE_P01, 8}, Ifx_RxSel_f}
IfxCan_Rxd_In | IfxCan_RXD00G_P34_2_IN = {&MODULE_CAN0, IfxCan_NodeId_0, {&MODULE_P34, 2}, Ifx_RxSel_g}
IfxCan_Rxd_In | IfxCan_RXD00H_P02_14_IN = {&MODULE_CAN0, IfxCan_NodeId_0, {&MODULE_P02,14}, Ifx_RxSel_h}
IfxCan_Rxd_In | IfxCan_RXD01A_P15_3_IN = {&MODULE_CAN0, IfxCan_NodeId_1, {&MODULE_P15, 3}, Ifx_RxSel_a}
IfxCan_Rxd_In | IfxCan_RXD01B_P14_1_IN = {&MODULE_CAN0, IfxCan_NodeId_1, {&MODULE_P14, 1}, Ifx_RxSel_b}
IfxCan_Rxd_In | IfxCan_RXD01C_P01_4_IN = {&MODULE_CAN0, IfxCan_NodeId_1, {&MODULE_P01, 4}, Ifx_RxSel_c}
IfxCan_Rxd_In | IfxCan_RXD01D_P33_10_IN = {&MODULE_CAN0, IfxCan_NodeId_1, {&MODULE_P33,10}, Ifx_RxSel_d}
IfxCan_Rxd_In | IfxCan_RXD01E_P02_10_IN = {&MODULE_CAN0, IfxCan_NodeId_1, {&MODULE_P02,10}, Ifx_RxSel_e}
IfxCan_Rxd_In | IfxCan_RXD02A_P15_1_IN = {&MODULE_CAN0, IfxCan_NodeId_2, {&MODULE_P15, 1}, Ifx_RxSel_a}
IfxCan_Rxd_In | IfxCan_RXD02B_P02_3_IN = {&MODULE_CAN0, IfxCan_NodeId_2, {&MODULE_P02, 3}, Ifx_RxSel_b}
IfxCan_Rxd_In | IfxCan_RXD02C_P32_6_IN = {&MODULE_CAN0, IfxCan_NodeId_2, {&MODULE_P32, 6}, Ifx_RxSel_c}
IfxCan_Rxd_In | IfxCan_RXD02D_P14_8_IN = {&MODULE_CAN0, IfxCan_NodeId_2, {&MODULE_P14, 8}, Ifx_RxSel_d}
IfxCan_Rxd_In | IfxCan_RXD02E_P10_2_IN = {&MODULE_CAN0, IfxCan_NodeId_2, {&MODULE_P10, 2}, Ifx_RxSel_e}
IfxCan_Rxd_In | IfxCan_RXD03A_P00_3_IN = {&MODULE_CAN0, IfxCan_NodeId_3, {&MODULE_P00, 3}, Ifx_RxSel_a}
IfxCan_Rxd_In | IfxCan_RXD03B_P32_2_IN = {&MODULE_CAN0, IfxCan_NodeId_3, {&MODULE_P32, 2}, Ifx_RxSel_b}
IfxCan_Rxd_In | IfxCan_RXD03C_P20_0_IN = {&MODULE_CAN0, IfxCan_NodeId_3, {&MODULE_P20, 0}, Ifx_RxSel_c}
IfxCan_Rxd_In | IfxCan_RXD03D_P11_10_IN = {&MODULE_CAN0, IfxCan_NodeId_3, {&MODULE_P11,10}, Ifx_RxSel_d}
IfxCan_Rxd_In | IfxCan_RXD03E_P20_9_IN = {&MODULE_CAN0, IfxCan_NodeId_3, {&MODULE_P20, 9}, Ifx_RxSel_e}
IfxCan_Rxd_In | IfxCan_RXD03F_P01_0_IN = {&MODULE_CAN0, IfxCan_NodeId_3, {&MODULE_P01, 0}, Ifx_RxSel_f}
IfxCan_Rxd_In | IfxCan_RXD10A_P00_1_IN = {&MODULE_CAN1, IfxCan_NodeId_0, {&MODULE_P00, 1}, Ifx_RxSel_a}
IfxCan_Rxd_In | IfxCan_RXD10B_P14_7_IN = {&MODULE_CAN1, IfxCan_NodeId_0, {&MODULE_P14, 7}, Ifx_RxSel_b}
IfxCan_Rxd_In | IfxCan_RXD10C_P23_0_IN = {&MODULE_CAN1, IfxCan_NodeId_0, {&MODULE_P23, 0}, Ifx_RxSel_c}
IfxCan_Rxd_In | IfxCan_RXD10D_P13_1_IN = {&MODULE_CAN1, IfxCan_NodeId_0, {&MODULE_P13, 1}, Ifx_RxSel_d}
IfxCan_Rxd_In | IfxCan_RXD11A_P02_4_IN = {&MODULE_CAN1, IfxCan_NodeId_1, {&MODULE_P02, 4}, Ifx_RxSel_a}
IfxCan_Rxd_In | IfxCan_RXD11B_P00_5_IN = {&MODULE_CAN1, IfxCan_NodeId_1, {&MODULE_P00, 5}, Ifx_RxSel_b}
IfxCan_Rxd_In | IfxCan_RXD11C_P23_7_IN = {&MODULE_CAN1, IfxCan_NodeId_1, {&MODULE_P23, 7}, Ifx_RxSel_c}
IfxCan_Rxd_In | IfxCan_RXD11D_P11_7_IN = {&MODULE_CAN1, IfxCan_NodeId_1, {&MODULE_P11, 7}, Ifx_RxSel_d}
IfxCan_Rxd_In | IfxCan_RXD12A_P20_6_IN = {&MODULE_CAN1, IfxCan_NodeId_2, {&MODULE_P20, 6}, Ifx_RxSel_a}
IfxCan_Rxd_In | IfxCan_RXD12B_P10_8_IN = {&MODULE_CAN1, IfxCan_NodeId_2, {&MODULE_P10, 8}, Ifx_RxSel_b}
IfxCan_Rxd_In | IfxCan_RXD12C_P23_3_IN = {&MODULE_CAN1, IfxCan_NodeId_2, {&MODULE_P23, 3}, Ifx_RxSel_c}
IfxCan_Rxd_In | IfxCan_RXD12D_P11_8_IN = {&MODULE_CAN1, IfxCan_NodeId_2, {&MODULE_P11, 8}, Ifx_RxSel_d}
IfxCan_Rxd_In | IfxCan_RXD13A_P14_7_IN = {&MODULE_CAN1, IfxCan_NodeId_3, {&MODULE_P14, 7}, Ifx_RxSel_a}
IfxCan_Rxd_In | IfxCan_RXD13B_P33_5_IN = {&MODULE_CAN1, IfxCan_NodeId_3, {&MODULE_P33, 5}, Ifx_RxSel_b}
IfxCan_Rxd_In | IfxCan_RXD13C_P22_5_IN = {&MODULE_CAN1, IfxCan_NodeId_3, {&MODULE_P22, 5}, Ifx_RxSel_c}
IfxCan_Rxd_In | IfxCan_RXD13D_P11_13_IN = {&MODULE_CAN1, IfxCan_NodeId_3, {&MODULE_P11,13}, Ifx_RxSel_d}
IfxCan_Rxd_In | IfxCan_RXD20A_P10_5_IN = {&MODULE_CAN2, IfxCan_NodeId_0, {&MODULE_P10, 5}, Ifx_RxSel_a}
IfxCan_Rxd_In | IfxCan_RXD20B_P10_8_IN = {&MODULE_CAN2, IfxCan_NodeId_0, {&MODULE_P10, 8}, Ifx_RxSel_b}
IfxCan_Rxd_In | IfxCan_RXD20C_P34_2_IN = {&MODULE_CAN2, IfxCan_NodeId_0, {&MODULE_P34, 2}, Ifx_RxSel_c}
IfxCan_Rxd_In | IfxCan_RXD20D_P02_14_IN = {&MODULE_CAN2, IfxCan_NodeId_0, {&MODULE_P02,14}, Ifx_RxSel_d}
IfxCan_Rxd_In | IfxCan_RXD20E_P01_8_IN = {&MODULE_CAN2, IfxCan_NodeId_0, {&MODULE_P01, 8}, Ifx_RxSel_e}
IfxCan_Rxd_In | IfxCan_RXD20F_P11_14_IN = {&MODULE_CAN2, IfxCan_NodeId_0, {&MODULE_P11,14}, Ifx_RxSel_f}
IfxCan_Rxd_In | IfxCan_RXD21A_P00_3_IN = {&MODULE_CAN2, IfxCan_NodeId_1, {&MODULE_P00, 3}, Ifx_RxSel_a}
IfxCan_Rxd_In | IfxCan_RXD21B_P13_12_IN = {&MODULE_CAN2, IfxCan_NodeId_1, {&MODULE_P13,12}, Ifx_RxSel_b}
IfxCan_Rxd_In | IfxCan_RXD21C_P20_0_IN = {&MODULE_CAN2, IfxCan_NodeId_1, {&MODULE_P20, 0}, Ifx_RxSel_c}
IfxCan_Rxd_In | IfxCan_RXD21D_P32_2_IN = {&MODULE_CAN2, IfxCan_NodeId_1, {&MODULE_P32, 2}, Ifx_RxSel_d}
IfxCan_Rxd_In | IfxCan_RXD21E_P01_0_IN = {&MODULE_CAN2, IfxCan_NodeId_1, {&MODULE_P01, 0}, Ifx_RxSel_e}
IfxCan_Rxd_In | IfxCan_RXD21F_P22_7_IN = {&MODULE_CAN2, IfxCan_NodeId_1, {&MODULE_P22, 7}, Ifx_RxSel_f}
IfxCan_Rxd_In | IfxCan_RXD22A_P33_13_IN = {&MODULE_CAN2, IfxCan_NodeId_2, {&MODULE_P33,13}, Ifx_RxSel_a}
IfxCan_Rxd_In | IfxCan_RXD22B_P32_7_IN = {&MODULE_CAN2, IfxCan_NodeId_2, {&MODULE_P32, 7}, Ifx_RxSel_b}
IfxCan_Rxd_In | IfxCan_RXD22C_P23_6_IN = {&MODULE_CAN2, IfxCan_NodeId_2, {&MODULE_P23, 6}, Ifx_RxSel_c}
IfxCan_Rxd_In | IfxCan_RXD22D_P14_14_IN = {&MODULE_CAN2, IfxCan_NodeId_2, {&MODULE_P14,14}, Ifx_RxSel_d}
IfxCan_Rxd_In | IfxCan_RXD22E_P22_9_IN = {&MODULE_CAN2, IfxCan_NodeId_2, {&MODULE_P22, 9}, Ifx_RxSel_e}
IfxCan_Rxd_In | IfxCan_RXD23A_P14_10_IN = {&MODULE_CAN2, IfxCan_NodeId_3, {&MODULE_P14,10}, Ifx_RxSel_a}
IfxCan_Rxd_In | IfxCan_RXD23B_P23_3_IN = {&MODULE_CAN2, IfxCan_NodeId_3, {&MODULE_P23, 3}, Ifx_RxSel_b}
IfxCan_Rxd_In | IfxCan_RXD23C_P14_15_IN = {&MODULE_CAN2, IfxCan_NodeId_3, {&MODULE_P14,15}, Ifx_RxSel_c}
IfxCan_Rxd_In | IfxCan_RXD23D_P13_5_IN = {&MODULE_CAN2, IfxCan_NodeId_3, {&MODULE_P13, 5}, Ifx_RxSel_d}
IfxCan_Rxd_In | IfxCan_RXD23E_P22_11_IN = {&MODULE_CAN2, IfxCan_NodeId_3, {&MODULE_P22,11}, Ifx_RxSel_e}
IfxCan_Txd_Out | IfxCan_TXD00_P01_13_OUT = {&MODULE_CAN0, IfxCan_NodeId_0, {&MODULE_P01,13}, IfxPort_OutputIdx_alt4}
IfxCan_Txd_Out | IfxCan_TXD00_P02_0_OUT = {&MODULE_CAN0, IfxCan_NodeId_0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt5}
IfxCan_Txd_Out | IfxCan_TXD00_P02_13_OUT = {&MODULE_CAN0, IfxCan_NodeId_0, {&MODULE_P02,13}, IfxPort_OutputIdx_alt4}
IfxCan_Txd_Out | IfxCan_TXD00_P12_1_OUT = {&MODULE_CAN0, IfxCan_NodeId_0, {&MODULE_P12, 1}, IfxPort_OutputIdx_alt5}
IfxCan_Txd_Out | IfxCan_TXD00_P20_8_OUT = {&MODULE_CAN0, IfxCan_NodeId_0, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt5}
IfxCan_Txd_Out | IfxCan_TXD00_P33_13_OUT = {&MODULE_CAN0, IfxCan_NodeId_0, {&MODULE_P33,13}, IfxPort_OutputIdx_alt5}
IfxCan_Txd_Out | IfxCan_TXD00_P33_8_OUT = {&MODULE_CAN0, IfxCan_NodeId_0, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt5}
IfxCan_Txd_Out | IfxCan_TXD00_P34_1_OUT = {&MODULE_CAN0, IfxCan_NodeId_0, {&MODULE_P34, 1}, IfxPort_OutputIdx_alt4}
IfxCan_Txd_Out | IfxCan_TXD01_P01_3_OUT = {&MODULE_CAN0, IfxCan_NodeId_1, {&MODULE_P01, 3}, IfxPort_OutputIdx_alt5}
IfxCan_Txd_Out | IfxCan_TXD01_P02_9_OUT = {&MODULE_CAN0, IfxCan_NodeId_1, {&MODULE_P02, 9}, IfxPort_OutputIdx_alt5}
IfxCan_Txd_Out | IfxCan_TXD01_P14_0_OUT = {&MODULE_CAN0, IfxCan_NodeId_1, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt5}
IfxCan_Txd_Out | IfxCan_TXD01_P15_2_OUT = {&MODULE_CAN0, IfxCan_NodeId_1, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt5}
IfxCan_Txd_Out | IfxCan_TXD01_P33_9_OUT = {&MODULE_CAN0, IfxCan_NodeId_1, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt5}
IfxCan_Txd_Out | IfxCan_TXD02_P02_2_OUT = {&MODULE_CAN0, IfxCan_NodeId_2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt5}
IfxCan_Txd_Out | IfxCan_TXD02_P10_3_OUT = {&MODULE_CAN0, IfxCan_NodeId_2, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt6}
IfxCan_Txd_Out | IfxCan_TXD02_P14_10_OUT = {&MODULE_CAN0, IfxCan_NodeId_2, {&MODULE_P14,10}, IfxPort_OutputIdx_alt5}
IfxCan_Txd_Out | IfxCan_TXD02_P15_0_OUT = {&MODULE_CAN0, IfxCan_NodeId_2, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt5}
IfxCan_Txd_Out | IfxCan_TXD02_P32_5_OUT = {&MODULE_CAN0, IfxCan_NodeId_2, {&MODULE_P32, 5}, IfxPort_OutputIdx_alt6}
IfxCan_Txd_Out | IfxCan_TXD03_P00_2_OUT = {&MODULE_CAN0, IfxCan_NodeId_3, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt5}
IfxCan_Txd_Out | IfxCan_TXD03_P01_2_OUT = {&MODULE_CAN0, IfxCan_NodeId_3, {&MODULE_P01, 2}, IfxPort_OutputIdx_alt3}
IfxCan_Txd_Out | IfxCan_TXD03_P11_12_OUT = {&MODULE_CAN0, IfxCan_NodeId_3, {&MODULE_P11,12}, IfxPort_OutputIdx_alt5}
IfxCan_Txd_Out | IfxCan_TXD03_P20_10_OUT = {&MODULE_CAN0, IfxCan_NodeId_3, {&MODULE_P20,10}, IfxPort_OutputIdx_alt5}
IfxCan_Txd_Out | IfxCan_TXD03_P20_3_OUT = {&MODULE_CAN0, IfxCan_NodeId_3, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt5}
IfxCan_Txd_Out | IfxCan_TXD03_P32_3_OUT = {&MODULE_CAN0, IfxCan_NodeId_3, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt5}
IfxCan_Txd_Out | IfxCan_TXD10_P00_0_OUT = {&MODULE_CAN1, IfxCan_NodeId_0, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt5}
IfxCan_Txd_Out | IfxCan_TXD10_P13_0_OUT = {&MODULE_CAN1, IfxCan_NodeId_0, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt7}
IfxCan_Txd_Out | IfxCan_TXD10_P14_9_OUT = {&MODULE_CAN1, IfxCan_NodeId_0, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt4}
IfxCan_Txd_Out | IfxCan_TXD10_P23_1_OUT = {&MODULE_CAN1, IfxCan_NodeId_0, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt5}
IfxCan_Txd_Out | IfxCan_TXD11_P00_4_OUT = {&MODULE_CAN1, IfxCan_NodeId_1, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt3}
IfxCan_Txd_Out | IfxCan_TXD11_P02_5_OUT = {&MODULE_CAN1, IfxCan_NodeId_1, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt2}
IfxCan_Txd_Out | IfxCan_TXD11_P11_0_OUT = {&MODULE_CAN1, IfxCan_NodeId_1, {&MODULE_P11, 0}, IfxPort_OutputIdx_alt5}
IfxCan_Txd_Out | IfxCan_TXD11_P23_6_OUT = {&MODULE_CAN1, IfxCan_NodeId_1, {&MODULE_P23, 6}, IfxPort_OutputIdx_alt5}
IfxCan_Txd_Out | IfxCan_TXD12_P10_7_OUT = {&MODULE_CAN1, IfxCan_NodeId_2, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt6}
IfxCan_Txd_Out | IfxCan_TXD12_P11_1_OUT = {&MODULE_CAN1, IfxCan_NodeId_2, {&MODULE_P11, 1}, IfxPort_OutputIdx_alt5}
IfxCan_Txd_Out | IfxCan_TXD12_P20_7_OUT = {&MODULE_CAN1, IfxCan_NodeId_2, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt5}
IfxCan_Txd_Out | IfxCan_TXD12_P23_2_OUT = {&MODULE_CAN1, IfxCan_NodeId_2, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt5}
IfxCan_Txd_Out | IfxCan_TXD13_P11_4_OUT = {&MODULE_CAN1, IfxCan_NodeId_3, {&MODULE_P11, 4}, IfxPort_OutputIdx_alt5}
IfxCan_Txd_Out | IfxCan_TXD13_P14_6_OUT = {&MODULE_CAN1, IfxCan_NodeId_3, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt4}
IfxCan_Txd_Out | IfxCan_TXD13_P22_4_OUT = {&MODULE_CAN1, IfxCan_NodeId_3, {&MODULE_P22, 4}, IfxPort_OutputIdx_alt6}
IfxCan_Txd_Out | IfxCan_TXD13_P33_4_OUT = {&MODULE_CAN1, IfxCan_NodeId_3, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt7}
IfxCan_Txd_Out | IfxCan_TXD20_P01_13_OUT = {&MODULE_CAN2, IfxCan_NodeId_0, {&MODULE_P01,13}, IfxPort_OutputIdx_alt5}
IfxCan_Txd_Out | IfxCan_TXD20_P02_13_OUT = {&MODULE_CAN2, IfxCan_NodeId_0, {&MODULE_P02,13}, IfxPort_OutputIdx_alt5}
IfxCan_Txd_Out | IfxCan_TXD20_P10_6_OUT = {&MODULE_CAN2, IfxCan_NodeId_0, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt5}
IfxCan_Txd_Out | IfxCan_TXD20_P10_7_OUT = {&MODULE_CAN2, IfxCan_NodeId_0, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt5}
IfxCan_Txd_Out | IfxCan_TXD20_P11_5_OUT = {&MODULE_CAN2, IfxCan_NodeId_0, {&MODULE_P11, 5}, IfxPort_OutputIdx_alt5}
IfxCan_Txd_Out | IfxCan_TXD20_P34_1_OUT = {&MODULE_CAN2, IfxCan_NodeId_0, {&MODULE_P34, 1}, IfxPort_OutputIdx_alt5}
IfxCan_Txd_Out | IfxCan_TXD21_P00_2_OUT = {&MODULE_CAN2, IfxCan_NodeId_1, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt3}
IfxCan_Txd_Out | IfxCan_TXD21_P01_2_OUT = {&MODULE_CAN2, IfxCan_NodeId_1, {&MODULE_P01, 2}, IfxPort_OutputIdx_alt5}
IfxCan_Txd_Out | IfxCan_TXD21_P13_9_OUT = {&MODULE_CAN2, IfxCan_NodeId_1, {&MODULE_P13, 9}, IfxPort_OutputIdx_alt5}
IfxCan_Txd_Out | IfxCan_TXD21_P20_3_OUT = {&MODULE_CAN2, IfxCan_NodeId_1, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt6}
IfxCan_Txd_Out | IfxCan_TXD21_P22_6_OUT = {&MODULE_CAN2, IfxCan_NodeId_1, {&MODULE_P22, 6}, IfxPort_OutputIdx_alt5}
IfxCan_Txd_Out | IfxCan_TXD21_P32_3_OUT = {&MODULE_CAN2, IfxCan_NodeId_1, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt6}
IfxCan_Txd_Out | IfxCan_TXD22_P14_13_OUT = {&MODULE_CAN2, IfxCan_NodeId_2, {&MODULE_P14,13}, IfxPort_OutputIdx_alt5}
IfxCan_Txd_Out | IfxCan_TXD22_P22_8_OUT = {&MODULE_CAN2, IfxCan_NodeId_2, {&MODULE_P22, 8}, IfxPort_OutputIdx_alt5}
IfxCan_Txd_Out | IfxCan_TXD22_P23_5_OUT = {&MODULE_CAN2, IfxCan_NodeId_2, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt6}
IfxCan_Txd_Out | IfxCan_TXD22_P32_6_OUT = {&MODULE_CAN2, IfxCan_NodeId_2, {&MODULE_P32, 6}, IfxPort_OutputIdx_alt5}
IfxCan_Txd_Out | IfxCan_TXD22_P33_12_OUT = {&MODULE_CAN2, IfxCan_NodeId_2, {&MODULE_P33,12}, IfxPort_OutputIdx_alt5}
IfxCan_Txd_Out | IfxCan_TXD23_P13_4_OUT = {&MODULE_CAN2, IfxCan_NodeId_3, {&MODULE_P13, 4}, IfxPort_OutputIdx_alt7}
IfxCan_Txd_Out | IfxCan_TXD23_P14_14_OUT = {&MODULE_CAN2, IfxCan_NodeId_3, {&MODULE_P14,14}, IfxPort_OutputIdx_alt5}
IfxCan_Txd_Out | IfxCan_TXD23_P14_9_OUT = {&MODULE_CAN2, IfxCan_NodeId_3, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt2}
IfxCan_Txd_Out | IfxCan_TXD23_P22_10_OUT = {&MODULE_CAN2, IfxCan_NodeId_3, {&MODULE_P22,10}, IfxPort_OutputIdx_alt5}
IfxCan_Txd_Out | IfxCan_TXD23_P23_2_OUT = {&MODULE_CAN2, IfxCan_NodeId_3, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt4}
const IfxCan_Rxd_In * | IfxCan_Rxd_In_pinTable [IFXCAN_PINMAP_NUM_MODULES][IFXCAN_PINMAP_NUM_NODES][IFXCAN_PINMAP_RXD_IN_NUM_ITEMS]
const IfxCan_Txd_Out * | IfxCan_Txd_Out_pinTable [IFXCAN_PINMAP_NUM_MODULES][IFXCAN_PINMAP_NUM_NODES][IFXCAN_PINMAP_TXD_OUT_NUM_ITEMS]

Detailed Description

CAN I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCan_PinMap.c.

Variable Documentation

◆ IfxCan_RXD00A_P02_1_IN

IfxCan_Rxd_In IfxCan_RXD00A_P02_1_IN = {&MODULE_CAN0, IfxCan_NodeId_0, {&MODULE_P02, 1}, Ifx_RxSel_a}

Definition at line 45 of file IfxCan_PinMap.c.

◆ IfxCan_RXD00B_P20_7_IN

IfxCan_Rxd_In IfxCan_RXD00B_P20_7_IN = {&MODULE_CAN0, IfxCan_NodeId_0, {&MODULE_P20, 7}, Ifx_RxSel_b}

Definition at line 46 of file IfxCan_PinMap.c.

◆ IfxCan_RXD00C_P12_0_IN

IfxCan_Rxd_In IfxCan_RXD00C_P12_0_IN = {&MODULE_CAN0, IfxCan_NodeId_0, {&MODULE_P12, 0}, Ifx_RxSel_c}

Definition at line 47 of file IfxCan_PinMap.c.

◆ IfxCan_RXD00D_P33_12_IN

IfxCan_Rxd_In IfxCan_RXD00D_P33_12_IN = {&MODULE_CAN0, IfxCan_NodeId_0, {&MODULE_P33,12}, Ifx_RxSel_d}

Definition at line 48 of file IfxCan_PinMap.c.

◆ IfxCan_RXD00E_P33_7_IN

IfxCan_Rxd_In IfxCan_RXD00E_P33_7_IN = {&MODULE_CAN0, IfxCan_NodeId_0, {&MODULE_P33, 7}, Ifx_RxSel_e}

Definition at line 49 of file IfxCan_PinMap.c.

◆ IfxCan_RXD00F_P01_8_IN

IfxCan_Rxd_In IfxCan_RXD00F_P01_8_IN = {&MODULE_CAN0, IfxCan_NodeId_0, {&MODULE_P01, 8}, Ifx_RxSel_f}

Definition at line 50 of file IfxCan_PinMap.c.

◆ IfxCan_RXD00G_P34_2_IN

IfxCan_Rxd_In IfxCan_RXD00G_P34_2_IN = {&MODULE_CAN0, IfxCan_NodeId_0, {&MODULE_P34, 2}, Ifx_RxSel_g}

Definition at line 51 of file IfxCan_PinMap.c.

◆ IfxCan_RXD00H_P02_14_IN

IfxCan_Rxd_In IfxCan_RXD00H_P02_14_IN = {&MODULE_CAN0, IfxCan_NodeId_0, {&MODULE_P02,14}, Ifx_RxSel_h}

Definition at line 52 of file IfxCan_PinMap.c.

◆ IfxCan_RXD01A_P15_3_IN

IfxCan_Rxd_In IfxCan_RXD01A_P15_3_IN = {&MODULE_CAN0, IfxCan_NodeId_1, {&MODULE_P15, 3}, Ifx_RxSel_a}

Definition at line 53 of file IfxCan_PinMap.c.

◆ IfxCan_RXD01B_P14_1_IN

IfxCan_Rxd_In IfxCan_RXD01B_P14_1_IN = {&MODULE_CAN0, IfxCan_NodeId_1, {&MODULE_P14, 1}, Ifx_RxSel_b}

Definition at line 54 of file IfxCan_PinMap.c.

◆ IfxCan_RXD01C_P01_4_IN

IfxCan_Rxd_In IfxCan_RXD01C_P01_4_IN = {&MODULE_CAN0, IfxCan_NodeId_1, {&MODULE_P01, 4}, Ifx_RxSel_c}

Definition at line 55 of file IfxCan_PinMap.c.

◆ IfxCan_RXD01D_P33_10_IN

IfxCan_Rxd_In IfxCan_RXD01D_P33_10_IN = {&MODULE_CAN0, IfxCan_NodeId_1, {&MODULE_P33,10}, Ifx_RxSel_d}

Definition at line 56 of file IfxCan_PinMap.c.

◆ IfxCan_RXD01E_P02_10_IN

IfxCan_Rxd_In IfxCan_RXD01E_P02_10_IN = {&MODULE_CAN0, IfxCan_NodeId_1, {&MODULE_P02,10}, Ifx_RxSel_e}

Definition at line 57 of file IfxCan_PinMap.c.

◆ IfxCan_RXD02A_P15_1_IN

IfxCan_Rxd_In IfxCan_RXD02A_P15_1_IN = {&MODULE_CAN0, IfxCan_NodeId_2, {&MODULE_P15, 1}, Ifx_RxSel_a}

Definition at line 58 of file IfxCan_PinMap.c.

◆ IfxCan_RXD02B_P02_3_IN

IfxCan_Rxd_In IfxCan_RXD02B_P02_3_IN = {&MODULE_CAN0, IfxCan_NodeId_2, {&MODULE_P02, 3}, Ifx_RxSel_b}

Definition at line 59 of file IfxCan_PinMap.c.

◆ IfxCan_RXD02C_P32_6_IN

IfxCan_Rxd_In IfxCan_RXD02C_P32_6_IN = {&MODULE_CAN0, IfxCan_NodeId_2, {&MODULE_P32, 6}, Ifx_RxSel_c}

Definition at line 60 of file IfxCan_PinMap.c.

◆ IfxCan_RXD02D_P14_8_IN

IfxCan_Rxd_In IfxCan_RXD02D_P14_8_IN = {&MODULE_CAN0, IfxCan_NodeId_2, {&MODULE_P14, 8}, Ifx_RxSel_d}

Definition at line 61 of file IfxCan_PinMap.c.

◆ IfxCan_RXD02E_P10_2_IN

IfxCan_Rxd_In IfxCan_RXD02E_P10_2_IN = {&MODULE_CAN0, IfxCan_NodeId_2, {&MODULE_P10, 2}, Ifx_RxSel_e}

Definition at line 62 of file IfxCan_PinMap.c.

◆ IfxCan_RXD03A_P00_3_IN

IfxCan_Rxd_In IfxCan_RXD03A_P00_3_IN = {&MODULE_CAN0, IfxCan_NodeId_3, {&MODULE_P00, 3}, Ifx_RxSel_a}

Definition at line 63 of file IfxCan_PinMap.c.

◆ IfxCan_RXD03B_P32_2_IN

IfxCan_Rxd_In IfxCan_RXD03B_P32_2_IN = {&MODULE_CAN0, IfxCan_NodeId_3, {&MODULE_P32, 2}, Ifx_RxSel_b}

Definition at line 64 of file IfxCan_PinMap.c.

◆ IfxCan_RXD03C_P20_0_IN

IfxCan_Rxd_In IfxCan_RXD03C_P20_0_IN = {&MODULE_CAN0, IfxCan_NodeId_3, {&MODULE_P20, 0}, Ifx_RxSel_c}

Definition at line 65 of file IfxCan_PinMap.c.

◆ IfxCan_RXD03D_P11_10_IN

IfxCan_Rxd_In IfxCan_RXD03D_P11_10_IN = {&MODULE_CAN0, IfxCan_NodeId_3, {&MODULE_P11,10}, Ifx_RxSel_d}

Definition at line 66 of file IfxCan_PinMap.c.

◆ IfxCan_RXD03E_P20_9_IN

IfxCan_Rxd_In IfxCan_RXD03E_P20_9_IN = {&MODULE_CAN0, IfxCan_NodeId_3, {&MODULE_P20, 9}, Ifx_RxSel_e}

Definition at line 67 of file IfxCan_PinMap.c.

◆ IfxCan_RXD03F_P01_0_IN

IfxCan_Rxd_In IfxCan_RXD03F_P01_0_IN = {&MODULE_CAN0, IfxCan_NodeId_3, {&MODULE_P01, 0}, Ifx_RxSel_f}

Definition at line 68 of file IfxCan_PinMap.c.

◆ IfxCan_RXD10A_P00_1_IN

IfxCan_Rxd_In IfxCan_RXD10A_P00_1_IN = {&MODULE_CAN1, IfxCan_NodeId_0, {&MODULE_P00, 1}, Ifx_RxSel_a}

Definition at line 69 of file IfxCan_PinMap.c.

◆ IfxCan_RXD10B_P14_7_IN

IfxCan_Rxd_In IfxCan_RXD10B_P14_7_IN = {&MODULE_CAN1, IfxCan_NodeId_0, {&MODULE_P14, 7}, Ifx_RxSel_b}

Definition at line 70 of file IfxCan_PinMap.c.

◆ IfxCan_RXD10C_P23_0_IN

IfxCan_Rxd_In IfxCan_RXD10C_P23_0_IN = {&MODULE_CAN1, IfxCan_NodeId_0, {&MODULE_P23, 0}, Ifx_RxSel_c}

Definition at line 71 of file IfxCan_PinMap.c.

◆ IfxCan_RXD10D_P13_1_IN

IfxCan_Rxd_In IfxCan_RXD10D_P13_1_IN = {&MODULE_CAN1, IfxCan_NodeId_0, {&MODULE_P13, 1}, Ifx_RxSel_d}

Definition at line 72 of file IfxCan_PinMap.c.

◆ IfxCan_RXD11A_P02_4_IN

IfxCan_Rxd_In IfxCan_RXD11A_P02_4_IN = {&MODULE_CAN1, IfxCan_NodeId_1, {&MODULE_P02, 4}, Ifx_RxSel_a}

Definition at line 73 of file IfxCan_PinMap.c.

◆ IfxCan_RXD11B_P00_5_IN

IfxCan_Rxd_In IfxCan_RXD11B_P00_5_IN = {&MODULE_CAN1, IfxCan_NodeId_1, {&MODULE_P00, 5}, Ifx_RxSel_b}

Definition at line 74 of file IfxCan_PinMap.c.

◆ IfxCan_RXD11C_P23_7_IN

IfxCan_Rxd_In IfxCan_RXD11C_P23_7_IN = {&MODULE_CAN1, IfxCan_NodeId_1, {&MODULE_P23, 7}, Ifx_RxSel_c}

Definition at line 75 of file IfxCan_PinMap.c.

◆ IfxCan_RXD11D_P11_7_IN

IfxCan_Rxd_In IfxCan_RXD11D_P11_7_IN = {&MODULE_CAN1, IfxCan_NodeId_1, {&MODULE_P11, 7}, Ifx_RxSel_d}

Definition at line 76 of file IfxCan_PinMap.c.

◆ IfxCan_RXD12A_P20_6_IN

IfxCan_Rxd_In IfxCan_RXD12A_P20_6_IN = {&MODULE_CAN1, IfxCan_NodeId_2, {&MODULE_P20, 6}, Ifx_RxSel_a}

Definition at line 77 of file IfxCan_PinMap.c.

◆ IfxCan_RXD12B_P10_8_IN

IfxCan_Rxd_In IfxCan_RXD12B_P10_8_IN = {&MODULE_CAN1, IfxCan_NodeId_2, {&MODULE_P10, 8}, Ifx_RxSel_b}

Definition at line 78 of file IfxCan_PinMap.c.

◆ IfxCan_RXD12C_P23_3_IN

IfxCan_Rxd_In IfxCan_RXD12C_P23_3_IN = {&MODULE_CAN1, IfxCan_NodeId_2, {&MODULE_P23, 3}, Ifx_RxSel_c}

Definition at line 79 of file IfxCan_PinMap.c.

◆ IfxCan_RXD12D_P11_8_IN

IfxCan_Rxd_In IfxCan_RXD12D_P11_8_IN = {&MODULE_CAN1, IfxCan_NodeId_2, {&MODULE_P11, 8}, Ifx_RxSel_d}

Definition at line 80 of file IfxCan_PinMap.c.

◆ IfxCan_RXD13A_P14_7_IN

IfxCan_Rxd_In IfxCan_RXD13A_P14_7_IN = {&MODULE_CAN1, IfxCan_NodeId_3, {&MODULE_P14, 7}, Ifx_RxSel_a}

Definition at line 81 of file IfxCan_PinMap.c.

◆ IfxCan_RXD13B_P33_5_IN

IfxCan_Rxd_In IfxCan_RXD13B_P33_5_IN = {&MODULE_CAN1, IfxCan_NodeId_3, {&MODULE_P33, 5}, Ifx_RxSel_b}

Definition at line 82 of file IfxCan_PinMap.c.

◆ IfxCan_RXD13C_P22_5_IN

IfxCan_Rxd_In IfxCan_RXD13C_P22_5_IN = {&MODULE_CAN1, IfxCan_NodeId_3, {&MODULE_P22, 5}, Ifx_RxSel_c}

Definition at line 83 of file IfxCan_PinMap.c.

◆ IfxCan_RXD13D_P11_13_IN

IfxCan_Rxd_In IfxCan_RXD13D_P11_13_IN = {&MODULE_CAN1, IfxCan_NodeId_3, {&MODULE_P11,13}, Ifx_RxSel_d}

Definition at line 84 of file IfxCan_PinMap.c.

◆ IfxCan_RXD20A_P10_5_IN

IfxCan_Rxd_In IfxCan_RXD20A_P10_5_IN = {&MODULE_CAN2, IfxCan_NodeId_0, {&MODULE_P10, 5}, Ifx_RxSel_a}

Definition at line 85 of file IfxCan_PinMap.c.

◆ IfxCan_RXD20B_P10_8_IN

IfxCan_Rxd_In IfxCan_RXD20B_P10_8_IN = {&MODULE_CAN2, IfxCan_NodeId_0, {&MODULE_P10, 8}, Ifx_RxSel_b}

Definition at line 86 of file IfxCan_PinMap.c.

◆ IfxCan_RXD20C_P34_2_IN

IfxCan_Rxd_In IfxCan_RXD20C_P34_2_IN = {&MODULE_CAN2, IfxCan_NodeId_0, {&MODULE_P34, 2}, Ifx_RxSel_c}

Definition at line 87 of file IfxCan_PinMap.c.

◆ IfxCan_RXD20D_P02_14_IN

IfxCan_Rxd_In IfxCan_RXD20D_P02_14_IN = {&MODULE_CAN2, IfxCan_NodeId_0, {&MODULE_P02,14}, Ifx_RxSel_d}

Definition at line 88 of file IfxCan_PinMap.c.

◆ IfxCan_RXD20E_P01_8_IN

IfxCan_Rxd_In IfxCan_RXD20E_P01_8_IN = {&MODULE_CAN2, IfxCan_NodeId_0, {&MODULE_P01, 8}, Ifx_RxSel_e}

Definition at line 89 of file IfxCan_PinMap.c.

◆ IfxCan_RXD20F_P11_14_IN

IfxCan_Rxd_In IfxCan_RXD20F_P11_14_IN = {&MODULE_CAN2, IfxCan_NodeId_0, {&MODULE_P11,14}, Ifx_RxSel_f}

Definition at line 90 of file IfxCan_PinMap.c.

◆ IfxCan_RXD21A_P00_3_IN

IfxCan_Rxd_In IfxCan_RXD21A_P00_3_IN = {&MODULE_CAN2, IfxCan_NodeId_1, {&MODULE_P00, 3}, Ifx_RxSel_a}

Definition at line 91 of file IfxCan_PinMap.c.

◆ IfxCan_RXD21B_P13_12_IN

IfxCan_Rxd_In IfxCan_RXD21B_P13_12_IN = {&MODULE_CAN2, IfxCan_NodeId_1, {&MODULE_P13,12}, Ifx_RxSel_b}

Definition at line 92 of file IfxCan_PinMap.c.

◆ IfxCan_RXD21C_P20_0_IN

IfxCan_Rxd_In IfxCan_RXD21C_P20_0_IN = {&MODULE_CAN2, IfxCan_NodeId_1, {&MODULE_P20, 0}, Ifx_RxSel_c}

Definition at line 93 of file IfxCan_PinMap.c.

◆ IfxCan_RXD21D_P32_2_IN

IfxCan_Rxd_In IfxCan_RXD21D_P32_2_IN = {&MODULE_CAN2, IfxCan_NodeId_1, {&MODULE_P32, 2}, Ifx_RxSel_d}

Definition at line 94 of file IfxCan_PinMap.c.

◆ IfxCan_RXD21E_P01_0_IN

IfxCan_Rxd_In IfxCan_RXD21E_P01_0_IN = {&MODULE_CAN2, IfxCan_NodeId_1, {&MODULE_P01, 0}, Ifx_RxSel_e}

Definition at line 95 of file IfxCan_PinMap.c.

◆ IfxCan_RXD21F_P22_7_IN

IfxCan_Rxd_In IfxCan_RXD21F_P22_7_IN = {&MODULE_CAN2, IfxCan_NodeId_1, {&MODULE_P22, 7}, Ifx_RxSel_f}

Definition at line 96 of file IfxCan_PinMap.c.

◆ IfxCan_RXD22A_P33_13_IN

IfxCan_Rxd_In IfxCan_RXD22A_P33_13_IN = {&MODULE_CAN2, IfxCan_NodeId_2, {&MODULE_P33,13}, Ifx_RxSel_a}

Definition at line 97 of file IfxCan_PinMap.c.

◆ IfxCan_RXD22B_P32_7_IN

IfxCan_Rxd_In IfxCan_RXD22B_P32_7_IN = {&MODULE_CAN2, IfxCan_NodeId_2, {&MODULE_P32, 7}, Ifx_RxSel_b}

Definition at line 98 of file IfxCan_PinMap.c.

◆ IfxCan_RXD22C_P23_6_IN

IfxCan_Rxd_In IfxCan_RXD22C_P23_6_IN = {&MODULE_CAN2, IfxCan_NodeId_2, {&MODULE_P23, 6}, Ifx_RxSel_c}

Definition at line 99 of file IfxCan_PinMap.c.

◆ IfxCan_RXD22D_P14_14_IN

IfxCan_Rxd_In IfxCan_RXD22D_P14_14_IN = {&MODULE_CAN2, IfxCan_NodeId_2, {&MODULE_P14,14}, Ifx_RxSel_d}

Definition at line 100 of file IfxCan_PinMap.c.

◆ IfxCan_RXD22E_P22_9_IN

IfxCan_Rxd_In IfxCan_RXD22E_P22_9_IN = {&MODULE_CAN2, IfxCan_NodeId_2, {&MODULE_P22, 9}, Ifx_RxSel_e}

Definition at line 101 of file IfxCan_PinMap.c.

◆ IfxCan_RXD23A_P14_10_IN

IfxCan_Rxd_In IfxCan_RXD23A_P14_10_IN = {&MODULE_CAN2, IfxCan_NodeId_3, {&MODULE_P14,10}, Ifx_RxSel_a}

Definition at line 102 of file IfxCan_PinMap.c.

◆ IfxCan_RXD23B_P23_3_IN

IfxCan_Rxd_In IfxCan_RXD23B_P23_3_IN = {&MODULE_CAN2, IfxCan_NodeId_3, {&MODULE_P23, 3}, Ifx_RxSel_b}

Definition at line 103 of file IfxCan_PinMap.c.

◆ IfxCan_RXD23C_P14_15_IN

IfxCan_Rxd_In IfxCan_RXD23C_P14_15_IN = {&MODULE_CAN2, IfxCan_NodeId_3, {&MODULE_P14,15}, Ifx_RxSel_c}

Definition at line 104 of file IfxCan_PinMap.c.

◆ IfxCan_RXD23D_P13_5_IN

IfxCan_Rxd_In IfxCan_RXD23D_P13_5_IN = {&MODULE_CAN2, IfxCan_NodeId_3, {&MODULE_P13, 5}, Ifx_RxSel_d}

Definition at line 105 of file IfxCan_PinMap.c.

◆ IfxCan_RXD23E_P22_11_IN

IfxCan_Rxd_In IfxCan_RXD23E_P22_11_IN = {&MODULE_CAN2, IfxCan_NodeId_3, {&MODULE_P22,11}, Ifx_RxSel_e}

Definition at line 106 of file IfxCan_PinMap.c.

◆ IfxCan_Rxd_In_pinTable

const IfxCan_Rxd_In* IfxCan_Rxd_In_pinTable[IFXCAN_PINMAP_NUM_MODULES][IFXCAN_PINMAP_NUM_NODES][IFXCAN_PINMAP_RXD_IN_NUM_ITEMS]

Definition at line 171 of file IfxCan_PinMap.c.

◆ IfxCan_TXD00_P01_13_OUT

IfxCan_Txd_Out IfxCan_TXD00_P01_13_OUT = {&MODULE_CAN0, IfxCan_NodeId_0, {&MODULE_P01,13}, IfxPort_OutputIdx_alt4}

Definition at line 107 of file IfxCan_PinMap.c.

◆ IfxCan_TXD00_P02_0_OUT

IfxCan_Txd_Out IfxCan_TXD00_P02_0_OUT = {&MODULE_CAN0, IfxCan_NodeId_0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt5}

Definition at line 108 of file IfxCan_PinMap.c.

◆ IfxCan_TXD00_P02_13_OUT

IfxCan_Txd_Out IfxCan_TXD00_P02_13_OUT = {&MODULE_CAN0, IfxCan_NodeId_0, {&MODULE_P02,13}, IfxPort_OutputIdx_alt4}

Definition at line 109 of file IfxCan_PinMap.c.

◆ IfxCan_TXD00_P12_1_OUT

IfxCan_Txd_Out IfxCan_TXD00_P12_1_OUT = {&MODULE_CAN0, IfxCan_NodeId_0, {&MODULE_P12, 1}, IfxPort_OutputIdx_alt5}

Definition at line 110 of file IfxCan_PinMap.c.

◆ IfxCan_TXD00_P20_8_OUT

IfxCan_Txd_Out IfxCan_TXD00_P20_8_OUT = {&MODULE_CAN0, IfxCan_NodeId_0, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt5}

Definition at line 111 of file IfxCan_PinMap.c.

◆ IfxCan_TXD00_P33_13_OUT

IfxCan_Txd_Out IfxCan_TXD00_P33_13_OUT = {&MODULE_CAN0, IfxCan_NodeId_0, {&MODULE_P33,13}, IfxPort_OutputIdx_alt5}

Definition at line 112 of file IfxCan_PinMap.c.

◆ IfxCan_TXD00_P33_8_OUT

IfxCan_Txd_Out IfxCan_TXD00_P33_8_OUT = {&MODULE_CAN0, IfxCan_NodeId_0, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt5}

Definition at line 113 of file IfxCan_PinMap.c.

◆ IfxCan_TXD00_P34_1_OUT

IfxCan_Txd_Out IfxCan_TXD00_P34_1_OUT = {&MODULE_CAN0, IfxCan_NodeId_0, {&MODULE_P34, 1}, IfxPort_OutputIdx_alt4}

Definition at line 114 of file IfxCan_PinMap.c.

◆ IfxCan_TXD01_P01_3_OUT

IfxCan_Txd_Out IfxCan_TXD01_P01_3_OUT = {&MODULE_CAN0, IfxCan_NodeId_1, {&MODULE_P01, 3}, IfxPort_OutputIdx_alt5}

Definition at line 115 of file IfxCan_PinMap.c.

◆ IfxCan_TXD01_P02_9_OUT

IfxCan_Txd_Out IfxCan_TXD01_P02_9_OUT = {&MODULE_CAN0, IfxCan_NodeId_1, {&MODULE_P02, 9}, IfxPort_OutputIdx_alt5}

Definition at line 116 of file IfxCan_PinMap.c.

◆ IfxCan_TXD01_P14_0_OUT

IfxCan_Txd_Out IfxCan_TXD01_P14_0_OUT = {&MODULE_CAN0, IfxCan_NodeId_1, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt5}

Definition at line 117 of file IfxCan_PinMap.c.

◆ IfxCan_TXD01_P15_2_OUT

IfxCan_Txd_Out IfxCan_TXD01_P15_2_OUT = {&MODULE_CAN0, IfxCan_NodeId_1, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt5}

Definition at line 118 of file IfxCan_PinMap.c.

◆ IfxCan_TXD01_P33_9_OUT

IfxCan_Txd_Out IfxCan_TXD01_P33_9_OUT = {&MODULE_CAN0, IfxCan_NodeId_1, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt5}

Definition at line 119 of file IfxCan_PinMap.c.

◆ IfxCan_TXD02_P02_2_OUT

IfxCan_Txd_Out IfxCan_TXD02_P02_2_OUT = {&MODULE_CAN0, IfxCan_NodeId_2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt5}

Definition at line 120 of file IfxCan_PinMap.c.

◆ IfxCan_TXD02_P10_3_OUT

IfxCan_Txd_Out IfxCan_TXD02_P10_3_OUT = {&MODULE_CAN0, IfxCan_NodeId_2, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt6}

Definition at line 121 of file IfxCan_PinMap.c.

◆ IfxCan_TXD02_P14_10_OUT

IfxCan_Txd_Out IfxCan_TXD02_P14_10_OUT = {&MODULE_CAN0, IfxCan_NodeId_2, {&MODULE_P14,10}, IfxPort_OutputIdx_alt5}

Definition at line 122 of file IfxCan_PinMap.c.

◆ IfxCan_TXD02_P15_0_OUT

IfxCan_Txd_Out IfxCan_TXD02_P15_0_OUT = {&MODULE_CAN0, IfxCan_NodeId_2, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt5}

Definition at line 123 of file IfxCan_PinMap.c.

◆ IfxCan_TXD02_P32_5_OUT

IfxCan_Txd_Out IfxCan_TXD02_P32_5_OUT = {&MODULE_CAN0, IfxCan_NodeId_2, {&MODULE_P32, 5}, IfxPort_OutputIdx_alt6}

Definition at line 124 of file IfxCan_PinMap.c.

◆ IfxCan_TXD03_P00_2_OUT

IfxCan_Txd_Out IfxCan_TXD03_P00_2_OUT = {&MODULE_CAN0, IfxCan_NodeId_3, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt5}

Definition at line 125 of file IfxCan_PinMap.c.

◆ IfxCan_TXD03_P01_2_OUT

IfxCan_Txd_Out IfxCan_TXD03_P01_2_OUT = {&MODULE_CAN0, IfxCan_NodeId_3, {&MODULE_P01, 2}, IfxPort_OutputIdx_alt3}

Definition at line 126 of file IfxCan_PinMap.c.

◆ IfxCan_TXD03_P11_12_OUT

IfxCan_Txd_Out IfxCan_TXD03_P11_12_OUT = {&MODULE_CAN0, IfxCan_NodeId_3, {&MODULE_P11,12}, IfxPort_OutputIdx_alt5}

Definition at line 127 of file IfxCan_PinMap.c.

◆ IfxCan_TXD03_P20_10_OUT

IfxCan_Txd_Out IfxCan_TXD03_P20_10_OUT = {&MODULE_CAN0, IfxCan_NodeId_3, {&MODULE_P20,10}, IfxPort_OutputIdx_alt5}

Definition at line 128 of file IfxCan_PinMap.c.

◆ IfxCan_TXD03_P20_3_OUT

IfxCan_Txd_Out IfxCan_TXD03_P20_3_OUT = {&MODULE_CAN0, IfxCan_NodeId_3, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt5}

Definition at line 129 of file IfxCan_PinMap.c.

◆ IfxCan_TXD03_P32_3_OUT

IfxCan_Txd_Out IfxCan_TXD03_P32_3_OUT = {&MODULE_CAN0, IfxCan_NodeId_3, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt5}

Definition at line 130 of file IfxCan_PinMap.c.

◆ IfxCan_TXD10_P00_0_OUT

IfxCan_Txd_Out IfxCan_TXD10_P00_0_OUT = {&MODULE_CAN1, IfxCan_NodeId_0, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt5}

Definition at line 131 of file IfxCan_PinMap.c.

◆ IfxCan_TXD10_P13_0_OUT

IfxCan_Txd_Out IfxCan_TXD10_P13_0_OUT = {&MODULE_CAN1, IfxCan_NodeId_0, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt7}

Definition at line 132 of file IfxCan_PinMap.c.

◆ IfxCan_TXD10_P14_9_OUT

IfxCan_Txd_Out IfxCan_TXD10_P14_9_OUT = {&MODULE_CAN1, IfxCan_NodeId_0, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt4}

Definition at line 133 of file IfxCan_PinMap.c.

◆ IfxCan_TXD10_P23_1_OUT

IfxCan_Txd_Out IfxCan_TXD10_P23_1_OUT = {&MODULE_CAN1, IfxCan_NodeId_0, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt5}

Definition at line 134 of file IfxCan_PinMap.c.

◆ IfxCan_TXD11_P00_4_OUT

IfxCan_Txd_Out IfxCan_TXD11_P00_4_OUT = {&MODULE_CAN1, IfxCan_NodeId_1, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt3}

Definition at line 135 of file IfxCan_PinMap.c.

◆ IfxCan_TXD11_P02_5_OUT

IfxCan_Txd_Out IfxCan_TXD11_P02_5_OUT = {&MODULE_CAN1, IfxCan_NodeId_1, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt2}

Definition at line 136 of file IfxCan_PinMap.c.

◆ IfxCan_TXD11_P11_0_OUT

IfxCan_Txd_Out IfxCan_TXD11_P11_0_OUT = {&MODULE_CAN1, IfxCan_NodeId_1, {&MODULE_P11, 0}, IfxPort_OutputIdx_alt5}

Definition at line 137 of file IfxCan_PinMap.c.

◆ IfxCan_TXD11_P23_6_OUT

IfxCan_Txd_Out IfxCan_TXD11_P23_6_OUT = {&MODULE_CAN1, IfxCan_NodeId_1, {&MODULE_P23, 6}, IfxPort_OutputIdx_alt5}

Definition at line 138 of file IfxCan_PinMap.c.

◆ IfxCan_TXD12_P10_7_OUT

IfxCan_Txd_Out IfxCan_TXD12_P10_7_OUT = {&MODULE_CAN1, IfxCan_NodeId_2, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt6}

Definition at line 139 of file IfxCan_PinMap.c.

◆ IfxCan_TXD12_P11_1_OUT

IfxCan_Txd_Out IfxCan_TXD12_P11_1_OUT = {&MODULE_CAN1, IfxCan_NodeId_2, {&MODULE_P11, 1}, IfxPort_OutputIdx_alt5}

Definition at line 140 of file IfxCan_PinMap.c.

◆ IfxCan_TXD12_P20_7_OUT

IfxCan_Txd_Out IfxCan_TXD12_P20_7_OUT = {&MODULE_CAN1, IfxCan_NodeId_2, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt5}

Definition at line 141 of file IfxCan_PinMap.c.

◆ IfxCan_TXD12_P23_2_OUT

IfxCan_Txd_Out IfxCan_TXD12_P23_2_OUT = {&MODULE_CAN1, IfxCan_NodeId_2, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt5}

Definition at line 142 of file IfxCan_PinMap.c.

◆ IfxCan_TXD13_P11_4_OUT

IfxCan_Txd_Out IfxCan_TXD13_P11_4_OUT = {&MODULE_CAN1, IfxCan_NodeId_3, {&MODULE_P11, 4}, IfxPort_OutputIdx_alt5}

Definition at line 143 of file IfxCan_PinMap.c.

◆ IfxCan_TXD13_P14_6_OUT

IfxCan_Txd_Out IfxCan_TXD13_P14_6_OUT = {&MODULE_CAN1, IfxCan_NodeId_3, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt4}

Definition at line 144 of file IfxCan_PinMap.c.

◆ IfxCan_TXD13_P22_4_OUT

IfxCan_Txd_Out IfxCan_TXD13_P22_4_OUT = {&MODULE_CAN1, IfxCan_NodeId_3, {&MODULE_P22, 4}, IfxPort_OutputIdx_alt6}

Definition at line 145 of file IfxCan_PinMap.c.

◆ IfxCan_TXD13_P33_4_OUT

IfxCan_Txd_Out IfxCan_TXD13_P33_4_OUT = {&MODULE_CAN1, IfxCan_NodeId_3, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt7}

Definition at line 146 of file IfxCan_PinMap.c.

◆ IfxCan_TXD20_P01_13_OUT

IfxCan_Txd_Out IfxCan_TXD20_P01_13_OUT = {&MODULE_CAN2, IfxCan_NodeId_0, {&MODULE_P01,13}, IfxPort_OutputIdx_alt5}

Definition at line 147 of file IfxCan_PinMap.c.

◆ IfxCan_TXD20_P02_13_OUT

IfxCan_Txd_Out IfxCan_TXD20_P02_13_OUT = {&MODULE_CAN2, IfxCan_NodeId_0, {&MODULE_P02,13}, IfxPort_OutputIdx_alt5}

Definition at line 148 of file IfxCan_PinMap.c.

◆ IfxCan_TXD20_P10_6_OUT

IfxCan_Txd_Out IfxCan_TXD20_P10_6_OUT = {&MODULE_CAN2, IfxCan_NodeId_0, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt5}

Definition at line 149 of file IfxCan_PinMap.c.

◆ IfxCan_TXD20_P10_7_OUT

IfxCan_Txd_Out IfxCan_TXD20_P10_7_OUT = {&MODULE_CAN2, IfxCan_NodeId_0, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt5}

Definition at line 150 of file IfxCan_PinMap.c.

◆ IfxCan_TXD20_P11_5_OUT

IfxCan_Txd_Out IfxCan_TXD20_P11_5_OUT = {&MODULE_CAN2, IfxCan_NodeId_0, {&MODULE_P11, 5}, IfxPort_OutputIdx_alt5}

Definition at line 151 of file IfxCan_PinMap.c.

◆ IfxCan_TXD20_P34_1_OUT

IfxCan_Txd_Out IfxCan_TXD20_P34_1_OUT = {&MODULE_CAN2, IfxCan_NodeId_0, {&MODULE_P34, 1}, IfxPort_OutputIdx_alt5}

Definition at line 152 of file IfxCan_PinMap.c.

◆ IfxCan_TXD21_P00_2_OUT

IfxCan_Txd_Out IfxCan_TXD21_P00_2_OUT = {&MODULE_CAN2, IfxCan_NodeId_1, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt3}

Definition at line 153 of file IfxCan_PinMap.c.

◆ IfxCan_TXD21_P01_2_OUT

IfxCan_Txd_Out IfxCan_TXD21_P01_2_OUT = {&MODULE_CAN2, IfxCan_NodeId_1, {&MODULE_P01, 2}, IfxPort_OutputIdx_alt5}

Definition at line 154 of file IfxCan_PinMap.c.

◆ IfxCan_TXD21_P13_9_OUT

IfxCan_Txd_Out IfxCan_TXD21_P13_9_OUT = {&MODULE_CAN2, IfxCan_NodeId_1, {&MODULE_P13, 9}, IfxPort_OutputIdx_alt5}

Definition at line 155 of file IfxCan_PinMap.c.

◆ IfxCan_TXD21_P20_3_OUT

IfxCan_Txd_Out IfxCan_TXD21_P20_3_OUT = {&MODULE_CAN2, IfxCan_NodeId_1, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt6}

Definition at line 156 of file IfxCan_PinMap.c.

◆ IfxCan_TXD21_P22_6_OUT

IfxCan_Txd_Out IfxCan_TXD21_P22_6_OUT = {&MODULE_CAN2, IfxCan_NodeId_1, {&MODULE_P22, 6}, IfxPort_OutputIdx_alt5}

Definition at line 157 of file IfxCan_PinMap.c.

◆ IfxCan_TXD21_P32_3_OUT

IfxCan_Txd_Out IfxCan_TXD21_P32_3_OUT = {&MODULE_CAN2, IfxCan_NodeId_1, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt6}

Definition at line 158 of file IfxCan_PinMap.c.

◆ IfxCan_TXD22_P14_13_OUT

IfxCan_Txd_Out IfxCan_TXD22_P14_13_OUT = {&MODULE_CAN2, IfxCan_NodeId_2, {&MODULE_P14,13}, IfxPort_OutputIdx_alt5}

Definition at line 159 of file IfxCan_PinMap.c.

◆ IfxCan_TXD22_P22_8_OUT

IfxCan_Txd_Out IfxCan_TXD22_P22_8_OUT = {&MODULE_CAN2, IfxCan_NodeId_2, {&MODULE_P22, 8}, IfxPort_OutputIdx_alt5}

Definition at line 160 of file IfxCan_PinMap.c.

◆ IfxCan_TXD22_P23_5_OUT

IfxCan_Txd_Out IfxCan_TXD22_P23_5_OUT = {&MODULE_CAN2, IfxCan_NodeId_2, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt6}

Definition at line 161 of file IfxCan_PinMap.c.

◆ IfxCan_TXD22_P32_6_OUT

IfxCan_Txd_Out IfxCan_TXD22_P32_6_OUT = {&MODULE_CAN2, IfxCan_NodeId_2, {&MODULE_P32, 6}, IfxPort_OutputIdx_alt5}

Definition at line 162 of file IfxCan_PinMap.c.

◆ IfxCan_TXD22_P33_12_OUT

IfxCan_Txd_Out IfxCan_TXD22_P33_12_OUT = {&MODULE_CAN2, IfxCan_NodeId_2, {&MODULE_P33,12}, IfxPort_OutputIdx_alt5}

Definition at line 163 of file IfxCan_PinMap.c.

◆ IfxCan_TXD23_P13_4_OUT

IfxCan_Txd_Out IfxCan_TXD23_P13_4_OUT = {&MODULE_CAN2, IfxCan_NodeId_3, {&MODULE_P13, 4}, IfxPort_OutputIdx_alt7}

Definition at line 164 of file IfxCan_PinMap.c.

◆ IfxCan_TXD23_P14_14_OUT

IfxCan_Txd_Out IfxCan_TXD23_P14_14_OUT = {&MODULE_CAN2, IfxCan_NodeId_3, {&MODULE_P14,14}, IfxPort_OutputIdx_alt5}

Definition at line 165 of file IfxCan_PinMap.c.

◆ IfxCan_TXD23_P14_9_OUT

IfxCan_Txd_Out IfxCan_TXD23_P14_9_OUT = {&MODULE_CAN2, IfxCan_NodeId_3, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt2}

Definition at line 166 of file IfxCan_PinMap.c.

◆ IfxCan_TXD23_P22_10_OUT

IfxCan_Txd_Out IfxCan_TXD23_P22_10_OUT = {&MODULE_CAN2, IfxCan_NodeId_3, {&MODULE_P22,10}, IfxPort_OutputIdx_alt5}

Definition at line 167 of file IfxCan_PinMap.c.

◆ IfxCan_TXD23_P23_2_OUT

IfxCan_Txd_Out IfxCan_TXD23_P23_2_OUT = {&MODULE_CAN2, IfxCan_NodeId_3, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt4}

Definition at line 168 of file IfxCan_PinMap.c.

◆ IfxCan_Txd_Out_pinTable

const IfxCan_Txd_Out* IfxCan_Txd_Out_pinTable[IFXCAN_PINMAP_NUM_MODULES][IFXCAN_PINMAP_NUM_NODES][IFXCAN_PINMAP_TXD_OUT_NUM_ITEMS]

Definition at line 300 of file IfxCan_PinMap.c.


iLLD_TC38A: IfxCan_PinMap.h File Reference

  • _PinMap
Data Structures | Macros | Variables
IfxCan_PinMap.h File Reference
iLLD » CAN

CAN I/O map. More...

#include <IfxCan_reg.h>
#include <_Impl/IfxCan_cfg.h>
#include <Port/Std/IfxPort.h>
Include dependency graph for IfxCan_PinMap.h:

Go to the source code of this file.

Data Structures

struct | IfxCan_Rxd_In
RXD pin mapping structure. More...
struct | IfxCan_Txd_Out
TXD pin mapping structure. More...

Macros

#define | IFXCAN_PINMAP_NUM_MODULES 3
Table dimensions. More...
#define | IFXCAN_PINMAP_NUM_NODES 4
#define | IFXCAN_PINMAP_RXD_IN_NUM_ITEMS 8
#define | IFXCAN_PINMAP_TXD_OUT_NUM_ITEMS 8

Variables

IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD00A_P02_1_IN
CAN receive input node 0. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD00B_P20_7_IN
CAN receive input node 0. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD00C_P12_0_IN
CAN receive input node 0. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD00D_P33_12_IN
CAN receive input node 0. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD00E_P33_7_IN
CAN receive input node 0. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD00F_P01_8_IN
CAN receive input node 0. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD00G_P34_2_IN
CAN receive input node 0. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD00H_P02_14_IN
CAN receive input node 0. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD01A_P15_3_IN
CAN receive input node 1. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD01B_P14_1_IN
CAN receive input node 1. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD01C_P01_4_IN
CAN receive input node 1. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD01D_P33_10_IN
CAN receive input node 1. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD01E_P02_10_IN
CAN receive input node 1. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD02A_P15_1_IN
CAN receive input node 2. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD02B_P02_3_IN
CAN receive input node 2. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD02C_P32_6_IN
CAN receive input node 2. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD02D_P14_8_IN
CAN receive input node 2. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD02E_P10_2_IN
CAN receive input node 2. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD03A_P00_3_IN
CAN receive input node 3. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD03B_P32_2_IN
CAN receive input node 3. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD03C_P20_0_IN
CAN receive input node 3. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD03D_P11_10_IN
CAN receive input node 3. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD03E_P20_9_IN
CAN receive input node 3. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD03F_P01_0_IN
CAN receive input node 3. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD10A_P00_1_IN
CAN receive input node 0. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD10B_P14_7_IN
CAN receive input node 0. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD10C_P23_0_IN
CAN receive input node 0. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD10D_P13_1_IN
CAN receive input node 0. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD11A_P02_4_IN
CAN receive input node 1. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD11B_P00_5_IN
CAN receive input node 1. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD11C_P23_7_IN
CAN receive input node 1. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD11D_P11_7_IN
CAN receive input node 1. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD12A_P20_6_IN
CAN receive input node 2. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD12B_P10_8_IN
CAN receive input node 2. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD12C_P23_3_IN
CAN receive input node 2. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD12D_P11_8_IN
CAN receive input node 2. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD13A_P14_7_IN
CAN receive input node 3. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD13B_P33_5_IN
CAN receive input node 3. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD13C_P22_5_IN
CAN receive input node 3. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD13D_P11_13_IN
CAN receive input node 3. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD20A_P10_5_IN
CAN receive input node 0. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD20B_P10_8_IN
CAN receive input node 0. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD20C_P34_2_IN
CAN receive input node 0. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD20D_P02_14_IN
CAN receive input node 0. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD20E_P01_8_IN
CAN receive input node 0. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD20F_P11_14_IN
CAN receive input node 0. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD21A_P00_3_IN
CAN receive input node 1. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD21B_P13_12_IN
CAN receive input node 1. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD21C_P20_0_IN
CAN receive input node 1. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD21D_P32_2_IN
CAN receive input node 1. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD21E_P01_0_IN
CAN receive input node 1. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD21F_P22_7_IN
CAN receive input node 1. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD22A_P33_13_IN
CAN receive input node 2. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD22B_P32_7_IN
CAN receive input node 2. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD22C_P23_6_IN
CAN receive input node 2. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD22D_P14_14_IN
CAN receive input node 2. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD22E_P22_9_IN
CAN receive input node 2. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD23A_P14_10_IN
CAN receive input node 3. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD23B_P23_3_IN
CAN receive input node 3. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD23C_P14_15_IN
CAN receive input node 3. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD23D_P13_5_IN
CAN receive input node 3. More...
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD23E_P22_11_IN
CAN receive input node 3. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD00_P01_13_OUT
CAN transmit output node 0. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD00_P02_0_OUT
CAN transmit output node 0. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD00_P02_13_OUT
CAN transmit output node 0. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD00_P12_1_OUT
CAN transmit output node 0. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD00_P20_8_OUT
CAN transmit output node 0. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD00_P33_13_OUT
CAN transmit output node 0. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD00_P33_8_OUT
CAN transmit output node 0. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD00_P34_1_OUT
CAN transmit output node 0. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD01_P01_3_OUT
CAN transmit output node 1. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD01_P02_9_OUT
CAN transmit output node 1. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD01_P14_0_OUT
CAN transmit output node 1. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD01_P15_2_OUT
CAN transmit output node 1. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD01_P33_9_OUT
CAN transmit output node 1. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD02_P02_2_OUT
CAN transmit output node 2. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD02_P10_3_OUT
CAN transmit output node 2. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD02_P14_10_OUT
CAN transmit output node 2. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD02_P15_0_OUT
CAN transmit output node 2. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD02_P32_5_OUT
CAN transmit output node 2. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD03_P00_2_OUT
CAN transmit output node 3. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD03_P01_2_OUT
CAN transmit output node 3. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD03_P11_12_OUT
CAN transmit output node 3. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD03_P20_10_OUT
CAN transmit output node 3. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD03_P20_3_OUT
CAN transmit output node 3. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD03_P32_3_OUT
CAN transmit output node 3. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD10_P00_0_OUT
CAN transmit output node 0. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD10_P13_0_OUT
CAN transmit output node 0. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD10_P14_9_OUT
CAN transmit output node 0. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD10_P23_1_OUT
CAN transmit output node 0. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD11_P00_4_OUT
CAN transmit output node 1. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD11_P02_5_OUT
CAN transmit output node 1. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD11_P11_0_OUT
CAN transmit output node 1. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD11_P23_6_OUT
CAN transmit output node 1. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD12_P10_7_OUT
CAN transmit output node 2. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD12_P11_1_OUT
CAN transmit output node 2. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD12_P20_7_OUT
CAN transmit output node 2. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD12_P23_2_OUT
CAN transmit output node 2. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD13_P11_4_OUT
CAN transmit output node 3. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD13_P14_6_OUT
CAN transmit output node 3. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD13_P22_4_OUT
CAN transmit output node 3. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD13_P33_4_OUT
CAN transmit output node 3. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD20_P01_13_OUT
CAN transmit output node 0. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD20_P02_13_OUT
CAN transmit output node 0. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD20_P10_6_OUT
CAN transmit output node 0. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD20_P10_7_OUT
CAN transmit output node 0. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD20_P11_5_OUT
CAN transmit output node 0. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD20_P34_1_OUT
CAN transmit output node 0. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD21_P00_2_OUT
CAN transmit output node 1. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD21_P01_2_OUT
CAN transmit output node 1. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD21_P13_9_OUT
CAN transmit output node 1. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD21_P20_3_OUT
CAN transmit output node 1. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD21_P22_6_OUT
CAN transmit output node 1. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD21_P32_3_OUT
CAN transmit output node 1. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD22_P14_13_OUT
CAN transmit output node 2. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD22_P22_8_OUT
CAN transmit output node 2. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD22_P23_5_OUT
CAN transmit output node 2. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD22_P32_6_OUT
CAN transmit output node 2. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD22_P33_12_OUT
CAN transmit output node 2. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD23_P13_4_OUT
CAN transmit output node 3. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD23_P14_14_OUT
CAN transmit output node 3. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD23_P14_9_OUT
CAN transmit output node 3. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD23_P22_10_OUT
CAN transmit output node 3. More...
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD23_P23_2_OUT
CAN transmit output node 3. More...
IFX_EXTERN const IfxCan_Rxd_In * | IfxCan_Rxd_In_pinTable [IFXCAN_PINMAP_NUM_MODULES][IFXCAN_PINMAP_NUM_NODES][IFXCAN_PINMAP_RXD_IN_NUM_ITEMS]
IfxCan_Rxd_In table. More...
IFX_EXTERN const IfxCan_Txd_Out * | IfxCan_Txd_Out_pinTable [IFXCAN_PINMAP_NUM_MODULES][IFXCAN_PINMAP_NUM_NODES][IFXCAN_PINMAP_TXD_OUT_NUM_ITEMS]
IfxCan_Txd_Out table. More...

Detailed Description

CAN I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCan_PinMap.h.


iLLD_TC38A: IfxCan_Can.h File Reference

  • Can
  • Can
Data Structures | Functions
IfxCan_Can.h File Reference
iLLD » CAN

CAN CAN details. More...

#include "Can/Std/IfxCan.h"
#include "Scu/Std/IfxScuWdt.h"
Include dependency graph for IfxCan_Can.h:

Go to the source code of this file.

Data Structures

struct | IfxCan_Can_BaudRate
Structure for nominal baudrate. More...
struct | IfxCan_Can_FastBaudRate
Structure for fast baudrate. More...
struct | IfxCan_Can_FilterConfig
Structure for Acceptance filter configuration. More...
struct | IfxCan_Can_Frame
Structure for Frame Configuration. More...
struct | IfxCan_Can_InterruptConfig
Structure for Interrupt configuration. More...
struct | IfxCan_Can_Pins
Structure for CAN pin configuration. More...
struct | IfxCan_Can_RxConfig
Structure for Rx handle Configuration. More...
struct | IfxCan_Can_TxConfig
Structure for Tx handle Configuration. More...
struct | IfxCan_Can
Module handle. More...
struct | IfxCan_Can_Config
Configuration Structure of the Module. More...
struct | IfxCan_Can_Node
Node handle. More...
struct | IfxCan_Can_NodeConfig
Configuration Structure of the Node. More...

Functions

IFX_EXTERN void | IfxCan_Can_initModule (IfxCan_Can *can, IfxCan_Can_Config *config)
Initialises the CAN Module. More...
IFX_EXTERN void | IfxCan_Can_initModuleConfig (IfxCan_Can_Config *config, Ifx_CAN *can)
Fills the configuration stucture of the CAN Module with default values. More...
IFX_INLINE uint8 | IfxCan_Can_getRxFifo0FillLevel (IfxCan_Can_Node *node)
Returns Rx FIFO 1 Fill Level. More...
IFX_INLINE uint8 | IfxCan_Can_getRxFifo1FillLevel (IfxCan_Can_Node *node)
Returns Rx FIFO 1 Fill Level. More...
IFX_INLINE boolean | IfxCan_Can_isNewDataReceived (IfxCan_Can_Node *node, IfxCan_RxBufferId rxBufferId)
Returns the status of whether the selcted Rx buffer has been updated from new data. More...
IFX_INLINE boolean | IfxCan_Can_isTxFifoQueueFull (IfxCan_Can_Node *node)
Returns the status of whether Tx Fifo/Queue is full or not. More...
IFX_EXTERN void | IfxCan_Can_initMessage (IfxCan_Message *message)
Initialises the message frame with defualt values. More...
IFX_EXTERN void | IfxCan_Can_readMessage (IfxCan_Can_Node *node, IfxCan_Message *message, uint32 *data)
Reads the CAN received message. More...
IFX_EXTERN IfxCan_Status | IfxCan_Can_sendMessage (IfxCan_Can_Node *node, IfxCan_Message *message, uint32 *data)
Transmits the CAN message. More...
IFX_EXTERN void | IfxCan_Can_setExtendedFilter (IfxCan_Can_Node *node, IfxCan_Filter *filter)
Sets the Extended Filter element configuration. More...
IFX_EXTERN void | IfxCan_Can_setStandardFilter (IfxCan_Can_Node *node, IfxCan_Filter *filter)
Sets the Standard Filter element configuration. More...
IFX_INLINE boolean | IfxCan_Can_isNodeSynchronized (IfxCan_Can_Node *node)
Returns the status of whether the NODE is synchronised or not. More...
IFX_INLINE boolean | IfxCan_Can_isTxBufferRequestPending (IfxCan_Can_Node *node, IfxCan_TxBufferId txBufferId)
Returns the status of pending request of the selected Tx buffer. More...
IFX_EXTERN boolean | IfxCan_Can_initNode (IfxCan_Can_Node *node, const IfxCan_Can_NodeConfig *config)
Initialises the CAN Node. More...
IFX_EXTERN void | IfxCan_Can_initNodeConfig (IfxCan_Can_NodeConfig *config, IfxCan_Can *can)
Fills the configuration stucture of the Node with default values. More...

Detailed Description

CAN CAN details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCan_Can.h.


iLLD_TC38A: IfxCan.h File Reference

  • Can
  • Std
Data Structures | Enumerations | Functions
IfxCan.h File Reference
iLLD » CAN

CAN basic functionality. More...

#include "_Impl/IfxCan_cfg.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "_Utilities/Ifx_Assert.h"
#include "_PinMap/IfxCan_PinMap.h"
#include "Scu/Std/IfxScuCcu.h"
#include "Src/Std/IfxSrc.h"
Include dependency graph for IfxCan.h:

Go to the source code of this file.

Data Structures

struct | IfxCan_Filter
tructure for Filter configuration More...
struct | IfxCan_GroupInterruptConfig
Configuration for Interrupt groups. More...
struct | IfxCan_Message
Structure for CAN Message configuration (transmit/receive) More...
struct | IfxCan_MessageRAM
Structure for Message RAM configuration. More...

Enumerations

enum IfxCan_CanNodeErrorWarningLimitStatus {
IfxCan_CanNodeErrorWarningLimitStatus_notReached = 0,
IfxCan_CanNodeErrorWarningLimitStatus_reached = 1
}
Status of warning limit for error counters in CAN node. More...
enum IfxCan_ClockSelect {
IfxCan_ClockSelect_0,
IfxCan_ClockSelect_1,
IfxCan_ClockSelect_2,
IfxCan_ClockSelect_3
}
Clock selection option
Description in Ifx_CAN.MCR.CLKSELx, (x = 0,1,2) More...
enum IfxCan_ClockSource {
IfxCan_ClockSource_noClock = 0,
IfxCan_ClockSource_asynchronous = 1,
IfxCan_ClockSource_synchronous = 2,
IfxCan_ClockSource_both = 3
}
Type of Clock Source selection
Description in Ifx_CAN.MCR.CLKSELx, (x = 0,1,2) More...
enum IfxCan_DataFieldSize {
IfxCan_DataFieldSize_8,
IfxCan_DataFieldSize_12,
IfxCan_DataFieldSize_16,
IfxCan_DataFieldSize_20,
IfxCan_DataFieldSize_24,
IfxCan_DataFieldSize_32,
IfxCan_DataFieldSize_48,
IfxCan_DataFieldSize_64
}
Data Field Size
Definition in Ifx_CAN.N[x]TX.ESC.B.TBDS, Ifx_CAN.N[x].RX.ESC.B.RBDS, Ifx_CAN.N[x].RX.ESC.B.FyDS (x= 0,1,2,3; y = 0, 1) More...
enum IfxCan_DataLengthCode {
IfxCan_DataLengthCode_0,
IfxCan_DataLengthCode_1,
IfxCan_DataLengthCode_2,
IfxCan_DataLengthCode_3,
IfxCan_DataLengthCode_4,
IfxCan_DataLengthCode_5,
IfxCan_DataLengthCode_6,
IfxCan_DataLengthCode_7,
IfxCan_DataLengthCode_8,
IfxCan_DataLengthCode_12,
IfxCan_DataLengthCode_16,
IfxCan_DataLengthCode_20,
IfxCan_DataLengthCode_24,
IfxCan_DataLengthCode_32,
IfxCan_DataLengthCode_48,
IfxCan_DataLengthCode_64
}
Data Length code of the Message. More...
enum IfxCan_FilterElementConfiguration {
IfxCan_FilterElementConfiguration_disable,
IfxCan_FilterElementConfiguration_storeInRxFifo0,
IfxCan_FilterElementConfiguration_storeInRxFifo1,
IfxCan_FilterElementConfiguration_rejectId,
IfxCan_FilterElementConfiguration_setPriority,
IfxCan_FilterElementConfiguration_setPriorityAndStoreInFifo0,
IfxCan_FilterElementConfiguration_setPriorityAndStoreInFifo1,
IfxCan_FilterElementConfiguration_storeInRxBuffer
}
Filter Element Configuration. More...
enum IfxCan_FilterType {
IfxCan_FilterType_range,
IfxCan_FilterType_dualId,
IfxCan_FilterType_classic,
IfxCan_FilterType_none
}
Filter Type. More...
enum IfxCan_FrameMode {
IfxCan_FrameMode_standard,
IfxCan_FrameMode_fdLong,
IfxCan_FrameMode_fdLongAndFast
}
CAN Frame mode
Description in Ifx_CAN.N[x].CCCR.CME, (x= 0 to 3) More...
enum IfxCan_FrameType {
IfxCan_FrameType_receive,
IfxCan_FrameType_transmit,
IfxCan_FrameType_transmitAndReceive,
IfxCan_FrameType_remoteRequest,
IfxCan_FrameType_remoteAnswer
}
CAN frame type. More...
enum IfxCan_Interrupt {
IfxCan_Interrupt_rxFifo0NewMessage,
IfxCan_Interrupt_rxFifo0WatermarkReached,
IfxCan_Interrupt_rxFifo0Full,
IfxCan_Interrupt_rxFifo0MessageLost,
IfxCan_Interrupt_rxFifo1NewMessage,
IfxCan_Interrupt_rxFifo1WatermarkReached,
IfxCan_Interrupt_rxFifo1Full,
IfxCan_Interrupt_rxFifo1MessageLost,
IfxCan_Interrupt_highPriorityMessage,
IfxCan_Interrupt_transmissionCompleted,
IfxCan_Interrupt_transmissionCancellationFinished,
IfxCan_Interrupt_txFifoEmpty,
IfxCan_Interrupt_txEventFifoNewEntry,
IfxCan_Interrupt_txEventFifoWatermarkReached,
IfxCan_Interrupt_txEventFifoFull,
IfxCan_Interrupt_txEventFifoEventLost,
IfxCan_Interrupt_timestampWraparound,
IfxCan_Interrupt_messageRAMAccessFailure,
IfxCan_Interrupt_timeoutOccurred,
IfxCan_Interrupt_messageStoredToDedicatedRxBuffer,
IfxCan_Interrupt_bitErrorCorrected,
IfxCan_Interrupt_bitErrorUncorrected,
IfxCan_Interrupt_errorLoggingOverflow,
IfxCan_Interrupt_errorPassive,
IfxCan_Interrupt_warningStatus,
IfxCan_Interrupt_busOffStatus,
IfxCan_Interrupt_watchdog,
IfxCan_Interrupt_protocolErrorArbitration,
IfxCan_Interrupt_protocolErrorData,
IfxCan_Interrupt_AccessToReservedAddress
}
Type of interrupt
Definition in Ifx_CAN.N[x].IE, Ifx_CAN.N[x].IR, Ifx_CAN.N[x].ILS, (x= 0 to 3) More...
enum IfxCan_InterruptGroup {
IfxCan_InterruptGroup_tefifo,
IfxCan_InterruptGroup_hpe,
IfxCan_InterruptGroup_wati,
IfxCan_InterruptGroup_alrt,
IfxCan_InterruptGroup_moer,
IfxCan_InterruptGroup_safe,
IfxCan_InterruptGroup_boff,
IfxCan_InterruptGroup_loi,
IfxCan_InterruptGroup_reint,
IfxCan_InterruptGroup_rxf1f,
IfxCan_InterruptGroup_rxf0f,
IfxCan_InterruptGroup_rxf1n,
IfxCan_InterruptGroup_rxf0n,
IfxCan_InterruptGroup_reti,
IfxCan_InterruptGroup_traq,
IfxCan_InterruptGroup_traco
}
Type of interrupt
Definition in Ifx_CAN.GRINT[x] (x= 0 , 1) More...
enum IfxCan_InterruptLine {
IfxCan_InterruptLine_0,
IfxCan_InterruptLine_1,
IfxCan_InterruptLine_2,
IfxCan_InterruptLine_3,
IfxCan_InterruptLine_4,
IfxCan_InterruptLine_5,
IfxCan_InterruptLine_6,
IfxCan_InterruptLine_7,
IfxCan_InterruptLine_8,
IfxCan_InterruptLine_9,
IfxCan_InterruptLine_10,
IfxCan_InterruptLine_11,
IfxCan_InterruptLine_12,
IfxCan_InterruptLine_13,
IfxCan_InterruptLine_14,
IfxCan_InterruptLine_15
}
Interrupt line number INT_Ox (x= 0 - 15)
. More...
enum IfxCan_LastErrorCodeType {
IfxCan_LastErrorCodeType_noError = 0,
IfxCan_LastErrorCodeType_stuffError = 1,
IfxCan_LastErrorCodeType_formError = 2,
IfxCan_LastErrorCodeType_ackError = 3,
IfxCan_LastErrorCodeType_bit1Error = 4,
IfxCan_LastErrorCodeType_bit0Error = 5,
IfxCan_LastErrorCodeType_crcError = 6,
IfxCan_LastErrorCodeType_noCANBusEvent = 7
}
Type of last error to occur on the CAN node. More...
enum IfxCan_MessageIdLength {
IfxCan_MessageIdLength_standard,
IfxCan_MessageIdLength_extended,
IfxCan_MessageIdLength_both
}
Message Id length (Standard / Extended) More...
enum IfxCan_NonMatchingFrame {
IfxCan_NonMatchingFrame_acceptToRxFifo0 = 0,
IfxCan_NonMatchingFrame_acceptToRxFifo1 = 1,
IfxCan_NonMatchingFrame_reject = 2
}
Indicate the action to be taken with the messages which do not match with any element of the filter. More...
enum IfxCan_RxBufferId {
IfxCan_RxBufferId_0,
IfxCan_RxBufferId_1,
IfxCan_RxBufferId_2,
IfxCan_RxBufferId_3,
IfxCan_RxBufferId_4,
IfxCan_RxBufferId_5,
IfxCan_RxBufferId_6,
IfxCan_RxBufferId_7,
IfxCan_RxBufferId_8,
IfxCan_RxBufferId_9,
IfxCan_RxBufferId_10,
IfxCan_RxBufferId_11,
IfxCan_RxBufferId_12,
IfxCan_RxBufferId_13,
IfxCan_RxBufferId_14,
IfxCan_RxBufferId_15,
IfxCan_RxBufferId_16,
IfxCan_RxBufferId_17,
IfxCan_RxBufferId_18,
IfxCan_RxBufferId_19,
IfxCan_RxBufferId_20,
IfxCan_RxBufferId_21,
IfxCan_RxBufferId_22,
IfxCan_RxBufferId_23,
IfxCan_RxBufferId_24,
IfxCan_RxBufferId_25,
IfxCan_RxBufferId_26,
IfxCan_RxBufferId_27,
IfxCan_RxBufferId_28,
IfxCan_RxBufferId_29,
IfxCan_RxBufferId_30,
IfxCan_RxBufferId_31,
IfxCan_RxBufferId_32,
IfxCan_RxBufferId_33,
IfxCan_RxBufferId_34,
IfxCan_RxBufferId_35,
IfxCan_RxBufferId_36,
IfxCan_RxBufferId_37,
IfxCan_RxBufferId_38,
IfxCan_RxBufferId_39,
IfxCan_RxBufferId_40,
IfxCan_RxBufferId_41,
IfxCan_RxBufferId_42,
IfxCan_RxBufferId_43,
IfxCan_RxBufferId_44,
IfxCan_RxBufferId_45,
IfxCan_RxBufferId_46,
IfxCan_RxBufferId_47,
IfxCan_RxBufferId_48,
IfxCan_RxBufferId_49,
IfxCan_RxBufferId_50,
IfxCan_RxBufferId_51,
IfxCan_RxBufferId_52,
IfxCan_RxBufferId_53,
IfxCan_RxBufferId_54,
IfxCan_RxBufferId_55,
IfxCan_RxBufferId_56,
IfxCan_RxBufferId_57,
IfxCan_RxBufferId_58,
IfxCan_RxBufferId_59,
IfxCan_RxBufferId_60,
IfxCan_RxBufferId_61,
IfxCan_RxBufferId_62,
IfxCan_RxBufferId_63
}
Rx Buffer number. More...
enum IfxCan_RxFifoMode {
IfxCan_RxFifoMode_blocking,
IfxCan_RxFifoMode_overwrite
}
Rx FIFO 0/1 operating mode
Description in Ifx_CAN.N[x].RXFyC.FyOM, (x= 0 to 3; y = 0, 1) More...
enum IfxCan_RxMode {
IfxCan_RxMode_dedicatedBuffers,
IfxCan_RxMode_fifo0,
IfxCan_RxMode_fifo1,
IfxCan_RxMode_sharedFifo0,
IfxCan_RxMode_sharedFifo1,
IfxCan_RxMode_sharedAll
}
Rx Buffers or FIFO 0 or combination Mode of reception. More...
enum IfxCan_SleepMode {
IfxCan_SleepMode_enable = 0,
IfxCan_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_CAN.CLC.B.EDIS. More...
enum IfxCan_Status {
IfxCan_Status_ok = 0x00000000,
IfxCan_Status_notInitialised = 0x00000001,
IfxCan_Status_busOff = 0x00000010,
IfxCan_Status_notSentBusy = 0x00000020,
IfxCan_Status_receiveEmpty = 0x00000040,
IfxCan_Status_messageLost = 0x00000080,
IfxCan_Status_newData = 0x00000100,
IfxCan_Status_newDataButOneLost = 0x00000180
}
CAN API status definition. More...
enum IfxCan_SuspendMode {
IfxCan_SuspendMode_none = 0,
IfxCan_SuspendMode_hard = 1,
IfxCan_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxCan_TxBufferId {
IfxCan_TxBufferId_0,
IfxCan_TxBufferId_1,
IfxCan_TxBufferId_2,
IfxCan_TxBufferId_3,
IfxCan_TxBufferId_4,
IfxCan_TxBufferId_5,
IfxCan_TxBufferId_6,
IfxCan_TxBufferId_7,
IfxCan_TxBufferId_8,
IfxCan_TxBufferId_9,
IfxCan_TxBufferId_10,
IfxCan_TxBufferId_11,
IfxCan_TxBufferId_12,
IfxCan_TxBufferId_13,
IfxCan_TxBufferId_14,
IfxCan_TxBufferId_15,
IfxCan_TxBufferId_16,
IfxCan_TxBufferId_17,
IfxCan_TxBufferId_18,
IfxCan_TxBufferId_19,
IfxCan_TxBufferId_20,
IfxCan_TxBufferId_21,
IfxCan_TxBufferId_22,
IfxCan_TxBufferId_23,
IfxCan_TxBufferId_24,
IfxCan_TxBufferId_25,
IfxCan_TxBufferId_26,
IfxCan_TxBufferId_27,
IfxCan_TxBufferId_28,
IfxCan_TxBufferId_29,
IfxCan_TxBufferId_30,
IfxCan_TxBufferId_31
}
Tx Buffer number. More...
enum IfxCan_TxMode {
IfxCan_TxMode_fifo,
IfxCan_TxMode_queue,
IfxCan_TxMode_dedicatedBuffers,
IfxCan_TxMode_sharedFifo,
IfxCan_TxMode_sharedQueue
}
Tx FIFO/Queue Mode. More...
enum IfxCan_CanNodeBusOffErrorStatus {
IfxCan_CanNodeBusOffErrorStatus_NoErr = 0,
IfxCan_CanNodeBusOffErrorStatus_BusOffErr = 1
}
CAN node Bus Off status. More...
enum IfxCan_CanNodeCommunicationState {
IfxCan_CanNodeCommunicationState_synchronize = 0,
IfxCan_CanNodeCommunicationState_idle = 1,
IfxCan_CanNodeCommunicationState_receive = 2,
IfxCan_CanNodeCommunicationState_transmit = 3
}
CAN node communication state. More...

Functions

IFX_INLINE void | IfxCan_Node_disableConfigurationChange (Ifx_CAN_N *node)
Disables the configuration change
The CPU has no write access to the protected configuration registers. More...
IFX_INLINE void | IfxCan_Node_enableConfigurationChange (Ifx_CAN_N *node)
Enables the configuration change
The CPU has write access to the protected configuration registers (while CCCR.INIT = 1) More...
IFX_INLINE void | IfxCan_Node_enableLoopbackMode (Ifx_CAN_N *node)
Enables the internal Virtual CAN bus loopback mode. More...
IFX_INLINE boolean | IfxCan_Node_isNodeSynchronized (Ifx_CAN_N *node)
Returns the status of whether the CAN Node is synchronised or not. More...
IFX_INLINE void | IfxCan_Node_setInitialisation (Ifx_CAN_N *node, boolean enable)
Initialises the node
0= Normal Operation
1= Initialization is started. More...
IFX_INLINE void | IfxCan_Node_setTransceiverDelayCompensationOffset (Ifx_CAN_N *node, uint8 delay)
Sets Transceiver Delay Compensation offset. More...
IFX_INLINE IfxCan_LastErrorCodeType | IfxCan_Node_getLastErroCodeStatus (Ifx_CAN_N *node)
Get the LEC error status of the CAN node. More...
IFX_INLINE boolean | IfxCan_Node_isErrorPassive (Ifx_CAN_N *node)
Error Passive status of the CAN node. TRUE: CAN node in error passive. FALSE: CAN node not in error passive. More...
IFX_INLINE IfxCan_CanNodeErrorWarningLimitStatus | IfxCan_Node_getWarningStatus (Ifx_CAN_N *node)
Get the warning status of the CAN node. More...
IFX_INLINE IfxCan_CanNodeBusOffErrorStatus | IfxCan_Node_getBusOffStatus (Ifx_CAN_N *node)
Get the Bus Off status of the CAN node. More...
IFX_INLINE IfxCan_CanNodeCommunicationState | IfxCan_Node_getActivityStatus (Ifx_CAN_N *node)
Get the Activity status of the CAN node. More...
IFX_INLINE IfxCan_LastErrorCodeType | IfxCan_Node_getDataPhaseLastErrorCode (Ifx_CAN_N *node)
Get the Error status in data phase of the CAN node in the recent CANFD operation with bit rate switch. More...
IFX_INLINE boolean | IfxCan_Node_isProtocolExceptionEventOccured (Ifx_CAN_N *node)
Protocol Exception Event status TRUE: Protocol Exception event occured. FALSE: Protocol Exception event not occured. More...
IFX_INLINE boolean | IfxCan_Node_isErrorStatusIndicatorEnabled (Ifx_CAN_N *node)
Returns the error status of the recent recieved CAN FD message. TRUE : Error status indicator is enabled FALSE: Erro status indicator not enabled. More...
IFX_INLINE boolean | IfxCan_Node_isBitRateSwitchFlagEnabled (Ifx_CAN_N *node)
Bit Rate Switch status of the last recieved CAN FD message. TRUE: Bit rate switch is enabled. FALSE: Bit rate switch is disabled. More...
IFX_INLINE IfxCan_DataLengthCode | IfxCan_Node_getCodeFromDataLengthInBytes (uint32 dataLength)
Return the DLC code corresponding to the data length in bytes. More...
IFX_EXTERN uint32 | IfxCan_Node_getDataLength (IfxCan_DataLengthCode dataLengthCode)
Converts data length code (DLC) into number of words. More...
IFX_EXTERN uint32 | IfxCan_Node_getDataLengthFromCode (Ifx_CAN_N *node, IfxCan_DataLengthCode dataLengthCode)
Converts data length code (DLC) into number of data words. This function is deprecated. Use new function IfxCan_Node_getDataLength. More...
IFX_EXTERN IfxCan_FrameMode | IfxCan_Node_getFrameMode (Ifx_CAN_RXMSG *rxBufferElement)
Returns CAN frame mode of operation for a received frame. More...
IFX_EXTERN boolean | IfxCan_Node_initRxPin (Ifx_CAN_N *node, IfxCan_Rxd_In *rxd, IfxPort_InputMode mode, IfxPort_PadDriver padDriver)
Select and initialise the CAN node receive pin. More...
IFX_EXTERN boolean | IfxCan_Node_initTxPin (IfxCan_Txd_Out *txd, IfxPort_OutputMode mode, IfxPort_PadDriver padDriver)
Select and initialise the CAN node transmit pin. More...
IFX_EXTERN void | IfxCan_Node_setBitTiming (Ifx_CAN_N *node, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 syncJumpWidth)
Calculates and Sets the CAN baudrate for standard frames and arbitration phase of CAND FD frames. More...
IFX_EXTERN void | IfxCan_Node_setBitTimingValues (Ifx_CAN_N *node, uint16 syncJumpWidth, uint8 timeSegment2, uint8 timeSegment1, uint16 prescaler)
Sets the values of CAN baudrate for standard frames. More...
IFX_EXTERN void | IfxCan_Node_setFastBitTiming (Ifx_CAN_N *node, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 syncJumpWidth)
Calulates and Sets the CAN fast baudrate for CAN FD frames data phase. More...
IFX_EXTERN void | IfxCan_Node_setFastBitTimingValues (Ifx_CAN_N *node, uint16 syncJumpWidth, uint8 timeSegment2, uint8 timeSegment1, uint16 prescaler)
Sets the values of CAN fast baudrate for CAN FD frames data phase. More...
IFX_EXTERN void | IfxCan_Node_setFrameMode (Ifx_CAN_N *node, IfxCan_FrameMode frameMode)
Enables the CAN frame mode for transmission. More...
IFX_EXTERN void | IfxCan_Node_setFrameModeReq (Ifx_CAN_TXMSG *txBufferElement, IfxCan_FrameMode frameMode)
Sets CAN frame mode request for transmission. More...
IFX_EXTERN void | IfxCan_Node_setFrameModeRequest (Ifx_CAN_N *node, Ifx_CAN_TXMSG *txBufferElement, IfxCan_FrameMode frameMode)
Sets CAN frame mode request for transmission. This function is deprecated. Use new function IfxCan_Node_setFrameModeReq. More...
IFX_EXTERN uint32 | IfxCan_Node_getDataLengthInBytes (IfxCan_DataLengthCode dataLengthCode)
Converts data length code (DLC) into number of bytes. More...
IFX_INLINE IfxCan_TxBufferId | IfxCan_Node_getTxFifoQueuePutIndex (Ifx_CAN_N *node)
Returns Tx FIFO/Queue Put Index. More...
IFX_INLINE boolean | IfxCan_Node_isTxBufferCancellationFinished (Ifx_CAN_N *node, IfxCan_TxBufferId txBufferId)
Returns the status of whether cancellation is finished on the selected Tx buffer. More...
IFX_INLINE boolean | IfxCan_Node_isTxBufferRequestPending (Ifx_CAN_N *node, IfxCan_TxBufferId txBufferId)
Returns the status of pending request of the selected Tx buffer. More...
IFX_INLINE boolean | IfxCan_Node_isTxBufferTransmissionOccured (Ifx_CAN_N *node, IfxCan_TxBufferId txBufferId)
Returns the status of whether transmission occured on the selected Tx buffer. More...
IFX_INLINE boolean | IfxCan_Node_isTxFifoQueueFull (Ifx_CAN_N *node)
Returns the status of Tx Fifo/Queue is full or not. More...
IFX_INLINE void | IfxCan_Node_pauseTransmission (Ifx_CAN_N *node, boolean enable)
pauses the CAN Node for two CAN bit times before starting the next transmission More...
IFX_INLINE void | IfxCan_Node_setDataLength (Ifx_CAN_TXMSG *txBufferElement, IfxCan_DataLengthCode dataLengthCode)
Sets the Data Length Code (DLC) for transmit frame. More...
IFX_INLINE void | IfxCan_Node_setDataLengthCode (Ifx_CAN_N *node, Ifx_CAN_TXMSG *txBufferElement, IfxCan_DataLengthCode dataLengthCode)
Sets the Data Length Code (DLC) for transmit frame. This function is deprecated. Use new function IfxCan_Node_setDataLength. More...
IFX_INLINE void | IfxCan_Node_setDedicatedTxBuffersNumber (Ifx_CAN_N *node, uint8 number)
Sets the number of dedicated Tx Buffers. More...
IFX_INLINE void | IfxCan_Node_setErrStateIndicator (Ifx_CAN_TXMSG *txBufferElement, boolean enable)
Sets the Error State Indicator (ESI) for transmit frame. More...
IFX_INLINE void | IfxCan_Node_setErrorStateIndicator (Ifx_CAN_N *node, Ifx_CAN_TXMSG *txBufferElement, boolean enable)
Sets the Error State Indicator (ESI) for transmit frame. This function is decprecated. Use new function IfxCan_Node_setErrStateIndicator. More...
IFX_INLINE void | IfxCan_Node_setMessageMarker (Ifx_CAN_TXMSG *txBufferElement, IfxCan_TxBufferId bufferId)
Sets the Message Marker (MM) for transmit frame. More...
IFX_INLINE void | IfxCan_Node_setMsgId (Ifx_CAN_TXMSG *txBufferElement, uint32 messageId, IfxCan_MessageIdLength messageIdLength)
Sets the identifier (ID) for transmit frame. More...
IFX_INLINE void | IfxCan_Node_setMesssageId (Ifx_CAN_N *node, Ifx_CAN_TXMSG *txBufferElement, uint32 messageId, IfxCan_MessageIdLength messageIdLength)
Sets the identifier (ID) for transmit frame. This function is deprecated. Use the new function IfxCan_Node_setMsgId. More...
IFX_INLINE void | IfxCan_Node_setRemoteTransmitReq (Ifx_CAN_TXMSG *txBufferElement, boolean enable)
Sets the remote Transmit Request (RTR) for transmit frame. More...
IFX_INLINE void | IfxCan_Node_setRemoteTransmitRequest (Ifx_CAN_N *node, Ifx_CAN_TXMSG *txBufferElement, boolean enable)
Sets the remote Transmit Request (RTR) for transmit frame. This function is deprecated. Use new function IfxCan_Node_setRemoteTransmitReq. More...
IFX_INLINE void | IfxCan_Node_setTransmitFifoQueueMode (Ifx_CAN_N *node, IfxCan_TxMode mode)
Sets Transmit FIFO/Queue Mode. More...
IFX_INLINE void | IfxCan_Node_setTransmitFifoQueueSize (Ifx_CAN_N *node, uint8 number)
Sets Transmit FIFO/Queue Size. More...
IFX_INLINE void | IfxCan_Node_setTxBufferAddRequest (Ifx_CAN_N *node, IfxCan_TxBufferId txBufferId)
Sets the Add Request for the selected Tx buffer. More...
IFX_INLINE void | IfxCan_Node_setTxBufferCancellationRequest (Ifx_CAN_N *node, IfxCan_TxBufferId txBufferId)
Sets the Cancellation Request for the selected Tx buffer. More...
IFX_INLINE void | IfxCan_Node_setTxBufferDataFieldSize (Ifx_CAN_N *node, IfxCan_DataFieldSize size)
Sets Tx Buffer Data Field Size. More...
IFX_INLINE void | IfxCan_Node_setTxBuffersStartAddress (Ifx_CAN_N *node, uint16 address)
Sets the start address of Tx Buffers section in the Message RAM (32-bit word address) More...
IFX_INLINE void | IfxCan_Node_setTxEventFifoCtrl (Ifx_CAN_TXMSG *txBufferElement, boolean enable)
Sets the Tx Event Fifo Control (EFC) for transmit frame. More...
IFX_INLINE void | IfxCan_Node_setTxEventFifoControl (Ifx_CAN_N *node, Ifx_CAN_TXMSG *txBufferElement, boolean enable)
Sets the Tx Event Fifo Control (EFC) for transmit frame. This function is deprecated. Use new function IfxCan_Node_setTxEventFifoCtrl. More...
IFX_EXTERN uint8 | IfxCan_Node_getTxBufferDataFieldSize (Ifx_CAN_N *node)
Returns Tx Buffer Data Field Size in bytes. More...
IFX_EXTERN Ifx_CAN_TXMSG * | IfxCan_Node_getTxBufferElementAddress (Ifx_CAN_N *node, uint32 ramBaseAddress, uint16 txBuffersStartAddress, IfxCan_TxBufferId txBufferNumber)
Returns the address of selected Tx buffer element. More...
IFX_EXTERN void | IfxCan_Node_writeTxBufData (Ifx_CAN_TXMSG *txBufferElement, IfxCan_DataLengthCode dataLengthCode, uint32 *data)
Writes Data into Tx buffer element Node_writeTxBufData. More...
IFX_EXTERN void | IfxCan_Node_writeData (Ifx_CAN_N *node, Ifx_CAN_TXMSG *txBufferElement, IfxCan_DataLengthCode dataLengthCode, uint32 *data)
Writes Data into Tx buffer element. This function is deprecated. Use new function IfxCan_Node_writeTxBufData. More...
IFX_INLINE uint32 | IfxCan_Node_getDataLengthCode (Ifx_CAN_RXMSG *rxBufferElement)
Returns the Data Length Code from the received frame. More...
IFX_INLINE uint32 | IfxCan_Node_getMesssageId (Ifx_CAN_RXMSG *rxBufferElement)
Returns the identifier (ID) from the received frame. More...
IFX_INLINE uint8 | IfxCan_Node_getRxFifo0FillLevel (Ifx_CAN_N *node)
Returns Rx FIFO 0 Fill Level. More...
IFX_INLINE IfxCan_RxBufferId | IfxCan_Node_getRxFifo0GetIndex (Ifx_CAN_N *node)
Returns Rx FIFO 0 get index. More...
IFX_INLINE uint8 | IfxCan_Node_getRxFifo1FillLevel (Ifx_CAN_N *node)
Returns Rx FIFO 1 Fill Level. More...
IFX_INLINE IfxCan_RxBufferId | IfxCan_Node_getRxFifo1GetIndex (Ifx_CAN_N *node)
Returns Rx FIFO 1 get index. More...
IFX_INLINE void | IfxCan_Node_setRxBufferDataFieldSize (Ifx_CAN_N *node, IfxCan_DataFieldSize size)
Sets Rx Buffer Data Field Size. More...
IFX_INLINE void | IfxCan_Node_setRxBuffersStartAddress (Ifx_CAN_N *node, uint16 address)
Sets the start address of Rx Buffers section in the Message RAM (32-bit word address) More...
IFX_INLINE void | IfxCan_Node_setRxFifo0AcknowledgeIndex (Ifx_CAN_N *node, IfxCan_RxBufferId RxBufferNumber)
Sets Rx FIFO 0 Acknowledge Index. More...
IFX_INLINE void | IfxCan_Node_setRxFifo0DataFieldSize (Ifx_CAN_N *node, IfxCan_DataFieldSize size)
Sets Rx Buffer Fifo 0 Data Field Size. More...
IFX_INLINE void | IfxCan_Node_setRxFifo0OperatingMode (Ifx_CAN_N *node, IfxCan_RxFifoMode mode)
Sets Rx Buffer Fifo 0 operating mode. More...
IFX_INLINE void | IfxCan_Node_setRxFifo0Size (Ifx_CAN_N *node, uint8 size)
Sets Rx FIFO 0 Size. More...
IFX_INLINE void | IfxCan_Node_setRxFifo0StartAddress (Ifx_CAN_N *node, uint16 address)
Sets the start address of Rx FIFO 0 section in the Message RAM (32-bit word address) More...
IFX_INLINE void | IfxCan_Node_setRxFifo0WatermarkLevel (Ifx_CAN_N *node, uint8 level)
Sets Rx FIFO 0 Watermark Level. More...
IFX_INLINE void | IfxCan_Node_setRxFifo1AcknowledgeIndex (Ifx_CAN_N *node, IfxCan_RxBufferId RxBufferNumber)
Sets Rx FIFO 1 Acknowledge Index. More...
IFX_INLINE void | IfxCan_Node_setRxFifo1DataFieldSize (Ifx_CAN_N *node, IfxCan_DataFieldSize size)
Sets Rx Buffer Fifo 1 Data Field Size. More...
IFX_INLINE void | IfxCan_Node_setRxFifo1OperatingMode (Ifx_CAN_N *node, IfxCan_RxFifoMode mode)
Sets Rx Buffer Fifo 1 operating mode. More...
IFX_INLINE void | IfxCan_Node_setRxFifo1Size (Ifx_CAN_N *node, uint8 size)
Sets Rx FIFO 1 Size. More...
IFX_INLINE void | IfxCan_Node_setRxFifo1StartAddress (Ifx_CAN_N *node, uint16 address)
Sets the start address of Rx FIFO 1 section in the Message RAM (32-bit word address) More...
IFX_INLINE void | IfxCan_Node_setRxFifo1WatermarkLevel (Ifx_CAN_N *node, uint8 level)
Sets Rx FIFO 1 Watermark Level. More...
IFX_EXTERN void | IfxCan_Node_clearRxBufferNewDataFlag (Ifx_CAN_N *node, IfxCan_RxBufferId rxBufferId)
Clears the New Data flag of the selected Rx buffer. More...
IFX_EXTERN uint8 | IfxCan_Node_getRxBufferDataFieldSize (Ifx_CAN_N *node)
Returns Rx Buffer Data Field Size in bytes. More...
IFX_EXTERN Ifx_CAN_RXMSG * | IfxCan_Node_getRxBufferElementAddress (Ifx_CAN_N *node, uint32 ramBaseAddress, uint16 rxBuffersStartAddress, IfxCan_RxBufferId rxBufferNumber)
Returns the address of selected Rx buffer element. More...
IFX_EXTERN uint8 | IfxCan_Node_getRxFifo0DataFieldSize (Ifx_CAN_N *node)
Returns Rx FIFO 0 Data Field Size in bytes. More...
IFX_EXTERN Ifx_CAN_RXMSG * | IfxCan_Node_getRxFifo0ElementAddress (Ifx_CAN_N *node, uint32 ramBaseAddress, uint16 rxFifo0StartAddress, IfxCan_RxBufferId rxBufferNumber)
Returns the address of selected Rx FIFO 0 element. More...
IFX_EXTERN uint8 | IfxCan_Node_getRxFifo1DataFieldSize (Ifx_CAN_N *node)
Returns Rx FIFO 1 Data Field Size in bytes. More...
IFX_EXTERN Ifx_CAN_RXMSG * | IfxCan_Node_getRxFifo1ElementAddress (Ifx_CAN_N *node, uint32 ramBaseAddress, uint16 rxFifo1StartAddress, IfxCan_RxBufferId rxBufferNumber)
Returns the address of selected Rx FIFO 1 element. More...
IFX_EXTERN boolean | IfxCan_Node_isRxBufferNewDataUpdated (Ifx_CAN_N *node, IfxCan_RxBufferId rxBufferId)
Returns the status of whether the selcted Rx buffer has been updated from new data. More...
IFX_EXTERN void | IfxCan_Node_readData (Ifx_CAN_RXMSG *rxBufferElement, IfxCan_DataLengthCode dataLengthCode, uint32 *data)
Reads data from Rx buffer element. More...
IFX_INLINE void | IfxCan_Node_acceptRemoteFramesWithStandardId (Ifx_CAN_N *node)
Disables the selected interrupt. More...
IFX_INLINE void | IfxCan_Node_acceptRemoteFrameswithExtendedId (Ifx_CAN_N *node)
Disables the selected interrupt. More...
IFX_INLINE void | IfxCan_Node_configureExtendedFilterForNonMatchingFrames (Ifx_CAN_N *node, IfxCan_NonMatchingFrame filter)
Configure the filter for non matching frames with extended id. More...
IFX_INLINE void | IfxCan_Node_configureStandardFilterForNonMatchingFrames (Ifx_CAN_N *node, IfxCan_NonMatchingFrame filter)
Configure the filter for non matching frames with standard id. More...
IFX_INLINE void | IfxCan_Node_rejectRemoteFramesWithExtendedId (Ifx_CAN_N *node)
Reject the remote frames with extended id. More...
IFX_INLINE void | IfxCan_Node_rejectRemoteFramesWithStandardId (Ifx_CAN_N *node)
Reject the remote frames with standard id. More...
IFX_INLINE void | IfxCan_Node_setExtendedFilterConfiguration (Ifx_CAN_EXTMSG *extendedFilterElement, IfxCan_FilterElementConfiguration filterElementConfiguration)
Sets the Extended Filter Element Configuration. More...
IFX_INLINE void | IfxCan_Node_setExtendedFilterId1 (Ifx_CAN_EXTMSG *extendedFilterElement, uint32 id)
Sets the Extended Filter ID 1 for Extended Filter Element. More...
IFX_INLINE void | IfxCan_Node_setExtendedFilterId2 (Ifx_CAN_EXTMSG *extendedFilterElement, uint32 id)
Sets the Extended Filter ID 2 for Extended Filter Element. More...
IFX_INLINE void | IfxCan_Node_setExtendedFilterListSize (Ifx_CAN_N *node, uint8 size)
Sets the Extended Message ID filter list size. More...
IFX_INLINE void | IfxCan_Node_setExtendedFilterListStartAddress (Ifx_CAN_N *node, uint16 address)
Sets the start address of Extended Message ID filter list (32-bit word address) More...
IFX_INLINE void | IfxCan_Node_setExtendedFilterRxBufferOffset (Ifx_CAN_EXTMSG *extendedFilterElement, IfxCan_RxBufferId rxBufferNumber)
Sets the Offset to the Rx Buffer Start Address RXBC.RBSA for storage of a matching message for Extended filter element. More...
IFX_INLINE void | IfxCan_Node_setExtendedFilterType (Ifx_CAN_EXTMSG *extendedFilterElement, IfxCan_FilterType filterType)
Sets the Extended Filter Type for Extended Filter Element. More...
IFX_INLINE void | IfxCan_Node_setStandardFilterConfiguration (Ifx_CAN_STDMSG *standardFilterElement, IfxCan_FilterElementConfiguration filterElementConfiguration)
Sets the Standard Filter Element Configuration. More...
IFX_INLINE void | IfxCan_Node_setStandardFilterId1 (Ifx_CAN_STDMSG *standardFilterElement, uint32 id)
Sets the Standard Filter ID 1 for Standard Filter Element. More...
IFX_INLINE void | IfxCan_Node_setStandardFilterId2 (Ifx_CAN_STDMSG *standardFilterElement, uint32 id)
Sets the Standard Filter ID 2 for Standard Filter Element. More...
IFX_INLINE void | IfxCan_Node_setStandardFilterListSize (Ifx_CAN_N *node, uint8 size)
Sets the Standard Message ID filter list size. More...
IFX_INLINE void | IfxCan_Node_setStandardFilterListStartAddress (Ifx_CAN_N *node, uint16 address)
Sets the start address of Standard Message ID filter list (32-bit word address) More...
IFX_INLINE void | IfxCan_Node_setStandardFilterRxBufferOffset (Ifx_CAN_STDMSG *standardFilterElement, IfxCan_RxBufferId rxBufferNumber)
Sets the Offset to the Rx Buffer Start Address RXBC.RBSA for storage of a matching message for standard filter element. More...
IFX_INLINE void | IfxCan_Node_setStandardFilterType (Ifx_CAN_STDMSG *standardFilterElement, IfxCan_FilterType filterType)
Sets the Standard Filter Type for Standard Filter Element. More...
IFX_EXTERN Ifx_CAN_EXTMSG * | IfxCan_Node_getExtendedFilterElementAddress (uint32 ramBaseAddress, uint16 extendedFilterListStartAddress, uint8 filterNumber)
Returns the address of selected extended filter element. More...
IFX_EXTERN Ifx_CAN_STDMSG * | IfxCan_Node_getStandardFilterElementAddress (uint32 ramBaseAddress, uint16 standardFilterListStartAddress, uint8 filterNumber)
Returns the address of selected standard filter element. More...
IFX_INLINE void | IfxCan_Node_clearInterruptFlag (Ifx_CAN_N *node, IfxCan_Interrupt interrupt)
Clears the selected interrupt Flag. More...
IFX_INLINE void | IfxCan_Node_disableInterrupt (Ifx_CAN_N *node, IfxCan_Interrupt interrupt)
Disables the selected interrupt. More...
IFX_INLINE void | IfxCan_Node_disableTxBufferCancellationFinishedInterrupt (Ifx_CAN_N *node, IfxCan_TxBufferId txBufferId)
Disables the Cancellation Finished Interrupt of the selected Tx buffer. More...
IFX_INLINE void | IfxCan_Node_disableTxBufferTransmissionInterrupt (Ifx_CAN_N *node, IfxCan_TxBufferId txBufferId)
Disables the Transmission Interrupt of the selected Tx buffer. More...
IFX_INLINE void | IfxCan_Node_enableInterrupt (Ifx_CAN_N *node, IfxCan_Interrupt interrupt)
Enables the selected interrupt. More...
IFX_INLINE void | IfxCan_Node_enableTxBufferCancellationFinishedInterrupt (Ifx_CAN_N *node, IfxCan_TxBufferId txBufferId)
Enables the Cancellation Finished Interrupt of the selected Tx buffer. More...
IFX_INLINE void | IfxCan_Node_enableTxBufferTransmissionInterrupt (Ifx_CAN_N *node, IfxCan_TxBufferId txBufferId)
Enables the Transmission Interrupt of the selected Tx buffer. More...
IFX_INLINE boolean | IfxCan_Node_getInterruptFlagStatus (Ifx_CAN_N *node, IfxCan_Interrupt interrupt)
Returns the status of selected interrupt flag. More...
IFX_EXTERN void | IfxCan_Node_setGroupInterruptLine (Ifx_CAN_N *node, IfxCan_InterruptGroup interruptGroup, IfxCan_InterruptLine interruptLine)
Sets the slected interrupt to the selcted interrupt line. More...
IFX_EXTERN void | IfxCan_Node_setInterruptLine (Ifx_CAN_N *node, IfxCan_Interrupt interrupt, IfxCan_InterruptLine interruptLine)
Sets the slected interrupt to the selcted interrupt line. More...
IFX_INLINE Ifx_CAN_N * | IfxCan_getNodePointer (Ifx_CAN *can, IfxCan_NodeId nodeId)
Returns the base adress of the selected Node of CAN module. More...
IFX_INLINE boolean | IfxCan_isModuleEnabled (Ifx_CAN *can)
Returns the status of module enabled or disabled. More...
IFX_INLINE boolean | IfxCan_isModuleSuspended (Ifx_CAN *can)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxCan_setSleepMode (Ifx_CAN *can, IfxCan_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxCan_setSuspendMode (Ifx_CAN *can, IfxCan_SuspendMode mode)
Set the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN void | IfxCan_disableModule (Ifx_CAN *can)
Disables the module (sets the disable request) More...
IFX_EXTERN void | IfxCan_enableModule (Ifx_CAN *can)
Enables the module (clears the disable request) More...
IFX_EXTERN Ifx_CAN * | IfxCan_getAddress (IfxCan_Index can)
IFX_EXTERN IfxCan_Index | IfxCan_getIndex (Ifx_CAN *can)
API to get the resource index of the CAN specified. More...
IFX_EXTERN float32 | IfxCan_getModuleFrequency (void)
Returns the operatinf frequency of the CAN module. More...
IFX_EXTERN void | IfxCan_resetModule (Ifx_CAN *can)
resets CAN kernel More...
IFX_EXTERN void | IfxCan_setClockSource (Ifx_CAN *can, IfxCan_ClockSelect clockSelect, IfxCan_ClockSource clockSource)
sets the clocksource selection More...
IFX_INLINE boolean | IfxCan_Node_getBRSFromTxEventFifo (Ifx_CAN_TXEVENT *txEventFifoElement)
Returns the Bit Rate Switch (BRS) from the Tx Event Fifo element. More...
IFX_INLINE uint32 | IfxCan_Node_getDLCFromTxEventFifo (Ifx_CAN_TXEVENT *txEventFifoElement)
Returns the Data Length Code from the Tx Event Fifo Element. More...
IFX_INLINE boolean | IfxCan_Node_getESIFromTxEventFifo (Ifx_CAN_TXEVENT *txEventFifoElement)
Returns the Error State Indicator (ESI) from the Tx Event Fifo element. More...
IFX_INLINE boolean | IfxCan_Node_getFDFFromTxEventFifo (Ifx_CAN_TXEVENT *txEventFifoElement)
Returns the FD Format (FDF) from the Tx Event Fifo element. More...
IFX_INLINE uint8 | IfxCan_Node_getMMFromTxEventFifo (Ifx_CAN_TXEVENT *txEventFifoElement)
Returns the Message Marker (MM) from the Tx Event Fifo element. More...
IFX_INLINE uint32 | IfxCan_Node_getMesssageIdFromTxEventFifo (Ifx_CAN_TXEVENT *txEventFifoElement)
Returns the identifier (ID) from the Tx Event Fifo element. More...
IFX_INLINE boolean | IfxCan_Node_getRTRFromTxEventFifo (Ifx_CAN_TXEVENT *txEventFifoElement)
Returns the Remote Transmission Request Status (RTR) from the Tx Event Fifo element. More...
IFX_INLINE uint16 | IfxCan_Node_getTXTSFromTxEventFifo (Ifx_CAN_TXEVENT *txEventFifoElement)
Returns the Tx Time Stamp (TXTS) from the Tx Event Fifo element. More...
IFX_INLINE uint8 | IfxCan_Node_getTxEventFifoAcknowledgeIndex (Ifx_CAN_N *node)
Returns the Tx Event Fifo Acknowledge Index. More...
IFX_INLINE uint8 | IfxCan_Node_getTxEventFifoFillLevel (Ifx_CAN_N *node)
Returns the Tx Event Fifo Fill Level. More...
IFX_INLINE uint8 | IfxCan_Node_getTxEventFifoGetIndex (Ifx_CAN_N *node)
Returns the Tx Event Fifo Get Index. More...
IFX_INLINE uint8 | IfxCan_Node_getTxEventFifoPutIndex (Ifx_CAN_N *node)
Returns the Tx Event Fifo Put Index. More...
IFX_INLINE uint8 | IfxCan_Node_getTxEventFifoSize (Ifx_CAN_N *node)
Returns Tx Event Fifo Size. More...
IFX_INLINE uint16 | IfxCan_Node_getTxEventFifoStartAddress (Ifx_CAN_N *node)
Returns Tx Event Fifo Start Address. More...
IFX_INLINE uint8 | IfxCan_Node_getTxEventFifoWatermarkLevel (Ifx_CAN_N *node)
Returns Tx Event Fifo Watermark Level. More...
IFX_INLINE boolean | IfxCan_Node_isTxEventFifoElementLost (Ifx_CAN_N *node)
Returns the status of Tx Event Fifo Element lost. More...
IFX_INLINE boolean | IfxCan_Node_isTxEventFifoFull (Ifx_CAN_N *node)
Returns the status of Tx Event Fifo Full. More...
IFX_INLINE void | IfxCan_Node_setTxEventFifoSize (Ifx_CAN_N *node, uint8 size)
Sets Tx Event Fifo Size. More...
IFX_INLINE void | IfxCan_Node_setTxEventFifoStartAddress (Ifx_CAN_N *node, uint16 address)
Sets Tx Event Fifo Start Address. More...
IFX_INLINE void | IfxCan_Node_setTxEventFifoWatermarkLevel (Ifx_CAN_N *node, uint8 level)
Sets Tx Event Fifo Watermark Level. More...
IFX_EXTERN IfxCan_FrameMode | IfxCan_Node_getFrameModeFromTxEventFifo (Ifx_CAN_TXEVENT *txEventFifoElement)
Returns CAN frame mode of operation for a Tx Event Fifo Element. More...
IFX_EXTERN Ifx_CAN_TXEVENT * | IfxCan_Node_getTxEventFifoElementAddress (uint32 ramBaseAddress, uint16 txEventFifoStartAddress, uint8 txEventFifoNumber)
Returns the address of selected Tx Event Fifo element. More...
IFX_INLINE boolean | IfxCan_Node_isCanFDMsgReceived (Ifx_CAN_N *node)
CAN frame format of the last received message. TRUE: CAN FD frame received FALSE: CAN FD frame not received. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxCan_getSrcPointer (Ifx_CAN *can, IfxCan_InterruptLine interruptLine)
Returns the address of interrupt node source register. More...

Detailed Description

CAN basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCan.h.

Enumeration Type Documentation

◆ IfxCan_CanNodeBusOffErrorStatus

enum IfxCan_CanNodeBusOffErrorStatus

CAN node Bus Off status.

Enumerator
IfxCan_CanNodeBusOffErrorStatus_NoErr | CAN node not in Bus Off state.
IfxCan_CanNodeBusOffErrorStatus_BusOffErr | CAN node in Bus Off state.

Definition at line 486 of file IfxCan.h.

◆ IfxCan_CanNodeCommunicationState

enum IfxCan_CanNodeCommunicationState

CAN node communication state.

Enumerator
IfxCan_CanNodeCommunicationState_synchronize | CAN node is synchronizing on CAN communication.
IfxCan_CanNodeCommunicationState_idle | Node is neither receiving nor transmitting.
IfxCan_CanNodeCommunicationState_receive | Node is operating as receiver.
IfxCan_CanNodeCommunicationState_transmit | Node is operating as transmitter.

Definition at line 494 of file IfxCan.h.

Function Documentation

◆ IfxCan_getSrcPointer()

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxCan_getSrcPointer | ( | Ifx_CAN * | can,
 |  | IfxCan_InterruptLine | interruptLine
 | ) |  |

Returns the address of interrupt node source register.

Parameters
can | Specifies the pointer to the CAN registers
interruptLine | Interrupt line number
Returns
Address of interrupt node source register

Definition at line 969 of file IfxCan.c.

Referenced by IfxCan_Can_initNode().

◆ IfxCan_Node_isCanFDMsgReceived()

IFX_INLINE boolean IfxCan_Node_isCanFDMsgReceived ( Ifx_CAN_N * node )

CAN frame format of the last received message. TRUE: CAN FD frame received FALSE: CAN FD frame not received.

Parameters
node Specifies the pointer to CAN node registers
Returns
CAN Frame format (TRUE/FALSE)

Definition at line 2519 of file IfxCan.h.


iLLD_TC38A: CCU6

Modules | Files
CCU6
iLLD
Collaboration diagram for CCU6:

Modules

Implementation
Standard Driver
CCU6 Pin Mapping
ICU Interface driver
PWMBC Interface driver
PWM Interface Driver
TIMER Interface driver
TimerWithTrigger Interface driver
TPWM Interface driver

Files

file | IfxCcu6_cfg.h
CCU6 on-chip implementation data.
file | IfxCcu6_PinMap.c
CCU6 I/O map.
file | IfxCcu6_PinMap.h
CCU6 I/O map.
file | IfxCcu6_Icu.h
CCU6 ICU details.
file | IfxCcu6_PwmBc.h
CCU6 PWMBC details.
file | IfxCcu6_PwmHl.h
CCU6 PWMHL details.
file | IfxCcu6.h
CCU6 basic functionality.
file | IfxCcu6_Timer.h
CCU6 TIMER details.
file | IfxCcu6_TimerWithTrigger.h
CCU6 TIMERWITHTRIGGER details.
file | IfxCcu6_TPwm.h
CCU6 TPWM details.

Detailed Description


iLLD_TC38A: Implementation

Modules
Implementation
iLLD » CCU6
Collaboration diagram for Implementation:

Modules

Enumerations

Detailed Description


iLLD_TC38A: Enumerations

Enumerations
iLLD » CCU6 » Implementation
Collaboration diagram for Enumerations:


iLLD_TC38A: Standard Driver

Modules
Standard Driver
iLLD » CCU6
Collaboration diagram for Standard Driver:

Modules

Enumerations
Operative Functions
Utility Functions
Configuration Functions
IO Pin Configuration Functions

Detailed Description


iLLD_TC38A: Enumerations

Enumerations
Enumerations
iLLD » CCU6 » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxCcu6_CaptureCompareInput {
IfxCcu6_CaptureCompareInput_cC60 = IFX_CCU6_PISEL0_ISCC60_OFF,
IfxCcu6_CaptureCompareInput_cC61 = IFX_CCU6_PISEL0_ISCC61_OFF,
IfxCcu6_CaptureCompareInput_cC62 = IFX_CCU6_PISEL0_ISCC62_OFF,
IfxCcu6_CaptureCompareInput_cTRAP = IFX_CCU6_PISEL0_ISTRP_OFF,
IfxCcu6_CaptureCompareInput_cCPOS0 = IFX_CCU6_PISEL0_ISPOS0_OFF,
IfxCcu6_CaptureCompareInput_cCPOS1 = IFX_CCU6_PISEL0_ISPOS1_OFF,
IfxCcu6_CaptureCompareInput_cCPOS2 = IFX_CCU6_PISEL0_ISPOS2_OFF
}
Input selection, ( CC6x capture input / CTRAP input / CCPOSx input )
Definition in Ifx_CCU.PISEL0. More...
enum IfxCcu6_CaptureCompareInputSignal {
IfxCcu6_CaptureCompareInputSignal_a = 0,
IfxCcu6_CaptureCompareInputSignal_b = 1,
IfxCcu6_CaptureCompareInputSignal_c = 2,
IfxCcu6_CaptureCompareInputSignal_d = 3
}
Selection of actual input signal for the capture compare inputs. More...
enum IfxCcu6_CaptureCompareState {
IfxCcu6_CaptureCompareState_set = 0,
IfxCcu6_CaptureCompareState_clear = 1,
IfxCcu6_CaptureCompareState_toggle = 2
}
capture/compare state to set / clear the CC6xST-bits More...
enum IfxCcu6_ChannelOut {
IfxCcu6_ChannelOut_cc0 = 0,
IfxCcu6_ChannelOut_cout0 = 1,
IfxCcu6_ChannelOut_cc1 = 2,
IfxCcu6_ChannelOut_cout1 = 3,
IfxCcu6_ChannelOut_cc2 = 4,
IfxCcu6_ChannelOut_cout2 = 5,
IfxCcu6_ChannelOut_cout3 = 6
}
Capture compare output pins. More...
enum IfxCcu6_CountingInputMode {
IfxCcu6_CountingInputMode_internal = 0,
IfxCcu6_CountingInputMode_manual = 1,
IfxCcu6_CountingInputMode_externalRising = 2,
IfxCcu6_CountingInputMode_externalFalling = 3
}
Defines the input event leading to a counting action of the timer (T12 / T13)
Definition in Ifx_CCU.PISEL2.B.ISCNT12 / Ifx_CCU.PISEL2.B.ISCNT13. More...
enum IfxCcu6_DelayBypass {
IfxCcu6_DelayBypass_notActive = 0,
IfxCcu6_DelayBypass_active = 1
}
Controls whether the source signal for the sampling of the Hall input pattern (selected by HSYNC) is delayed by the Dead-Time Counter 0
Definition in Ifx_CCU.T12MSEL.B.DBYP. More...
enum IfxCcu6_ExternalTriggerMode {
IfxCcu6_ExternalTriggerMode_disable = 0,
IfxCcu6_ExternalTriggerMode_risingEdge = 1,
IfxCcu6_ExternalTriggerMode_fallingEdge = 2,
IfxCcu6_ExternalTriggerMode_anyEdge = 3
}
Defines the event of signal T1xHR that can set the run bit T1xR by HW
Definition in Ifx_CCU.TCTR2.B.T12RSEL / IIfx_CCU.TCTR2.B.T13RSEL. More...
enum IfxCcu6_HallSensorTriggerMode {
IfxCcu6_HallSensorTriggerMode_permanentCheck = 0,
IfxCcu6_HallSensorTriggerMode_cM63 = 1,
IfxCcu6_HallSensorTriggerMode_t13PM = 2,
IfxCcu6_HallSensorTriggerMode_off = 3,
IfxCcu6_HallSensorTriggerMode_t12PMCountingUp = 4,
IfxCcu6_HallSensorTriggerMode_t12OMCountingDown = 5,
IfxCcu6_HallSensorTriggerMode_cM61CountingUp = 6,
IfxCcu6_HallSensorTriggerMode_cM61CountingDown = 7
}
Defines the source for the sampling of the Hall input pattern and the comparison to the current and the expected Hall pattern bit fields
Definition in Ifx_CCU.T12MSEL.HSYNC. More...
enum IfxCcu6_InterruptSource {
IfxCcu6_InterruptSource_cc60RisingEdge = IFX_CCU6_IS_ICC60R_OFF,
IfxCcu6_InterruptSource_cc60FallingEdge = IFX_CCU6_IS_ICC60F_OFF,
IfxCcu6_InterruptSource_cc61RisingEdge = IFX_CCU6_IS_ICC61R_OFF,
IfxCcu6_InterruptSource_cc61FallingEdge = IFX_CCU6_IS_ICC61F_OFF,
IfxCcu6_InterruptSource_cc62RisingEdge = IFX_CCU6_IS_ICC62R_OFF,
IfxCcu6_InterruptSource_cc62FallingEdge = IFX_CCU6_IS_ICC62F_OFF,
IfxCcu6_InterruptSource_t12OneMatch = IFX_CCU6_IS_T12OM_OFF,
IfxCcu6_InterruptSource_t12PeriodMatch = IFX_CCU6_IS_T12PM_OFF,
IfxCcu6_InterruptSource_t13CompareMatch = IFX_CCU6_IS_T13CM_OFF,
IfxCcu6_InterruptSource_t13PeriodMatch = IFX_CCU6_IS_T13PM_OFF,
IfxCcu6_InterruptSource_trap = IFX_CCU6_IS_TRPF_OFF,
IfxCcu6_InterruptSource_correctHallEvent = IFX_CCU6_IS_CHE_OFF,
IfxCcu6_InterruptSource_wrongHallEvent = IFX_CCU6_IS_WHE_OFF
}
Interrupt source selection Description in Ifx_CCU.IEN. More...
enum IfxCcu6_MultiChannelSwitchingSelect {
IfxCcu6_MultiChannelSwitchingSelect_noEvent = 0,
IfxCcu6_MultiChannelSwitchingSelect_correctHallEvent = 1,
IfxCcu6_MultiChannelSwitchingSelect_t13PeriodMatch = 2,
IfxCcu6_MultiChannelSwitchingSelect_t12OneMatch = 3,
IfxCcu6_MultiChannelSwitchingSelect_t12Channel1CompareMatch = 4,
IfxCcu6_MultiChannelSwitchingSelect_t12PeriodMatch = 5
}
Selection of the trigger request source (next multi-channel event) for the shadow transfer MCM_ST from MCMPS to MCMP
Definition in Ifx_CCU.MCMCTR.B.SWSEL. More...
enum IfxCcu6_MultiChannelSwitchingSync {
IfxCcu6_MultiChannelSwitchingSync_direct = 0,
IfxCcu6_MultiChannelSwitchingSync_t13ZeroMatch = 1,
IfxCcu6_MultiChannelSwitchingSync_t12ZeroMatch = 2
}
Selection of the synchronization mechanism for the shadow transfer event MCM_ST
Definition in Ifx_CCU.MCMCTR.B.SWSYN. More...
enum IfxCcu6_ServiceRequest {
IfxCcu6_ServiceRequest_0 = 0,
IfxCcu6_ServiceRequest_1,
IfxCcu6_ServiceRequest_2,
IfxCcu6_ServiceRequest_3
}
Selection of service request outputs. More...
enum IfxCcu6_SleepMode {
IfxCcu6_SleepMode_enable = 0,
IfxCcu6_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_CCU6.CLC.B.EDIS. More...
enum IfxCcu6_SuspendMode {
IfxCcu6_SuspendMode_none = 0,
IfxCcu6_SuspendMode_hard = 1,
IfxCcu6_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxCcu6_T12Channel {
IfxCcu6_T12Channel_0 = 0,
IfxCcu6_T12Channel_1,
IfxCcu6_T12Channel_2
}
Capture compare channel of Timer12. More...
enum IfxCcu6_T12ChannelMode {
IfxCcu6_T12ChannelMode_off = 0,
IfxCcu6_T12ChannelMode_compareMode = 1,
IfxCcu6_T12ChannelMode_doubleRegisterCaptureRisingAndFalling = 4,
IfxCcu6_T12ChannelMode_doubleRegisterCaptureRising = 5,
IfxCcu6_T12ChannelMode_doubleRegisterCaptureFalling = 6,
IfxCcu6_T12ChannelMode_doubleRegisterCaptureAny = 7,
IfxCcu6_T12ChannelMode_hallSensor = 8,
IfxCcu6_T12ChannelMode_hysteresisLikecompare = 9,
IfxCcu6_T12ChannelMode_multiInputCaptureRisingAndFalling = 10,
IfxCcu6_T12ChannelMode_multiInputCaptureFallingAndRising = 11,
IfxCcu6_T12ChannelMode_multiInputCaptureBothRising = 12,
IfxCcu6_T12ChannelMode_multiInputCaptureBothFalling = 13,
IfxCcu6_T12ChannelMode_multiInputCaptureAny = 14
}
The operating mode for the T12 channels are defined by the bit fields Ifx_CCU.T12MSEL.MSEL6x. More...
enum IfxCcu6_T12CountDirection {
IfxCcu6_T12CountDirection_up = 0,
IfxCcu6_T12CountDirection_down = 1
}
Counting direction of Timer12
Definition in Ifx_CCU.TCTR0.B.CDIR. More...
enum IfxCcu6_T12CountMode {
IfxCcu6_T12CountMode_edgeAligned = 0,
IfxCcu6_T12CountMode_centerAligned = 1
}
Operating mode of Timer 12
Definition in Ifx_CCU.TCTR0.B.CTM. More...
enum IfxCcu6_T13TriggerDirection {
IfxCcu6_T13TriggerDirection_noAction = 0,
IfxCcu6_T13TriggerDirection_onT12CountingUp = 1,
IfxCcu6_T13TriggerDirection_onT12CountingDown = 2,
IfxCcu6_T13TriggerDirection_anyT12 = 3
}
Delivers additional information to control the automatic set of bit T13R in the case that the trigger action defined by T13 trigger event control (T13TEC) is detected.
Definition in Ifx_CCU.TCTR2.B.T13TED. More...
enum IfxCcu6_T13TriggerEvent {
IfxCcu6_T13TriggerEvent_noAction = 0,
IfxCcu6_T13TriggerEvent_onCC60RCompare = 1,
IfxCcu6_T13TriggerEvent_onCC61RCompare = 2,
IfxCcu6_T13TriggerEvent_onCC62RCompare = 3,
IfxCcu6_T13TriggerEvent_onAnyT12Compare = 4,
IfxCcu6_T13TriggerEvent_onT12Period = 5,
IfxCcu6_T13TriggerEvent_onT12Zero = 6,
IfxCcu6_T13TriggerEvent_onCCPOSxEdge = 7
}
Selects the trigger event to start T13 (automatic set of T13R for synchronization to T12 compare signals)
Definition in Ifx_CCU.TCTR2.B.T13TEC. More...
enum IfxCcu6_TimerId {
IfxCcu6_TimerId_t12 = 0,
IfxCcu6_TimerId_t13 = 1
}
Timer number ( T12 / T13 ) More...
enum IfxCcu6_TimerInputClock {
IfxCcu6_TimerInputClock_fcc6 = 0,
IfxCcu6_TimerInputClock_fcc6By2 = 1,
IfxCcu6_TimerInputClock_fcc6By4 = 2,
IfxCcu6_TimerInputClock_fcc6By8 = 3,
IfxCcu6_TimerInputClock_fcc6By16 = 4,
IfxCcu6_TimerInputClock_fcc6By32 = 5,
IfxCcu6_TimerInputClock_fcc6By64 = 6,
IfxCcu6_TimerInputClock_fcc6By128 = 7
}
Selects the input clock for timers (T12 or T13) that is derived from the peripheral clock according to the equation
Definition in Ifx_CCU.TCTR0.B.T12CLK / Ifx_CCU.TCTR0.B.T13CLK. More...
enum IfxCcu6_TimerInputSignal {
IfxCcu6_TimerInputSignal_a = 0,
IfxCcu6_TimerInputSignal_b = 1,
IfxCcu6_TimerInputSignal_c = 2,
IfxCcu6_TimerInputSignal_d = 3,
IfxCcu6_TimerInputSignal_e = 0,
IfxCcu6_TimerInputSignal_f = 1,
IfxCcu6_TimerInputSignal_g = 2,
IfxCcu6_TimerInputSignal_h = 3
}
Selection of actual input signal for the timer inputs. More...
enum IfxCcu6_TimerRunStatus {
IfxCcu6_TimerRunStatus_stopped = 0,
IfxCcu6_TimerRunStatus_running = 1
}
Timer (T12 / T13) run status
Definition in Ifx_CCU.TCTR0.B.T12R and Ifx_CCU.TCTR0.B.T13R. More...
enum IfxCcu6_TrapMode {
IfxCcu6_TrapMode_automatic = 0,
IfxCcu6_TrapMode_manual = 1
}
Defines how the trap flag TRPF can be cleared after the trap input condition is no longer valid (either by CTRAP = 1 or by TRPPEN = 0)
Definition in Ifx_CCU.TRPCTR.B.TRPM2. More...
enum IfxCcu6_TrapState {
IfxCcu6_TrapState_t12Sync = 0,
IfxCcu6_TrapState_t13Sync = 1,
IfxCcu6_TrapState_immediate = 3
}
Defines the behavior of the selected outputs when leaving the trap state, after the trap condition has become inactive again
Definition in Ifx_CCU.TRPCTR.B.TRPMx (x = 0, 1) More...

Detailed Description

Enumeration Type Documentation

◆ IfxCcu6_CaptureCompareInput

enum IfxCcu6_CaptureCompareInput

Input selection, ( CC6x capture input / CTRAP input / CCPOSx input )
Definition in Ifx_CCU.PISEL0.

Enumerator
IfxCcu6_CaptureCompareInput_cC60 | CC60 capture input.
IfxCcu6_CaptureCompareInput_cC61 | CC61 capture input.
IfxCcu6_CaptureCompareInput_cC62 | CC62 capture input.
IfxCcu6_CaptureCompareInput_cTRAP | CTRAP input.
IfxCcu6_CaptureCompareInput_cCPOS0 | CCPOS0 input.
IfxCcu6_CaptureCompareInput_cCPOS1 | CCPOS1 input.
IfxCcu6_CaptureCompareInput_cCPOS2 | CCPOS2 input.

Definition at line 78 of file IfxCcu6.h.

◆ IfxCcu6_CaptureCompareInputSignal

enum IfxCcu6_CaptureCompareInputSignal

Selection of actual input signal for the capture compare inputs.

Enumerator
IfxCcu6_CaptureCompareInputSignal_a | defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input.
IfxCcu6_CaptureCompareInputSignal_b | defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input.
IfxCcu6_CaptureCompareInputSignal_c | defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input.
IfxCcu6_CaptureCompareInputSignal_d | defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input.

Definition at line 91 of file IfxCcu6.h.

◆ IfxCcu6_CaptureCompareState

enum IfxCcu6_CaptureCompareState

capture/compare state to set / clear the CC6xST-bits

Enumerator
IfxCcu6_CaptureCompareState_set | Bit CC6xST is set.
IfxCcu6_CaptureCompareState_clear | Bit CC6xST is cleared.
IfxCcu6_CaptureCompareState_toggle | Bit CC6xST is toggled.

Definition at line 101 of file IfxCcu6.h.

◆ IfxCcu6_ChannelOut

enum IfxCcu6_ChannelOut

Capture compare output pins.

Enumerator
IfxCcu6_ChannelOut_cc0 | CC60 compare output CC0.
IfxCcu6_ChannelOut_cout0 | CC60 compare output COUT0.
IfxCcu6_ChannelOut_cc1 | CC61 compare output CC1.
IfxCcu6_ChannelOut_cout1 | CC61 compare output COUT1.
IfxCcu6_ChannelOut_cc2 | CC62 compare output CC2.
IfxCcu6_ChannelOut_cout2 | CC62 compare output COUT2.
IfxCcu6_ChannelOut_cout3 | CC63 compare output COUT3.

Definition at line 110 of file IfxCcu6.h.

◆ IfxCcu6_CountingInputMode

enum IfxCcu6_CountingInputMode

Defines the input event leading to a counting action of the timer (T12 / T13)
Definition in Ifx_CCU.PISEL2.B.ISCNT12 / Ifx_CCU.PISEL2.B.ISCNT13.

Enumerator
IfxCcu6_CountingInputMode_internal | The T1x prescaler generates the counting events, Bit TCTR4.T1xCNT is not taken into account.
IfxCcu6_CountingInputMode_manual | Bit TCTR4.T1xCNT written with 1 is a counting event. The T1x prescaler is not taken into account.
IfxCcu6_CountingInputMode_externalRising | The timer T1x is counting each rising edge detected in the selected T1xHR signal.
IfxCcu6_CountingInputMode_externalFalling | The timer T1x is counting each falling edge detected in the selected T1xHR signal.

Definition at line 124 of file IfxCcu6.h.

◆ IfxCcu6_DelayBypass

enum IfxCcu6_DelayBypass

Controls whether the source signal for the sampling of the Hall input pattern (selected by HSYNC) is delayed by the Dead-Time Counter 0
Definition in Ifx_CCU.T12MSEL.B.DBYP.

Enumerator
IfxCcu6_DelayBypass_notActive | Dead-Time Counter 0 is generating a delay after the source signal becomes active.
IfxCcu6_DelayBypass_active | Dead-Time Counter 0 is not used for a delay.

Definition at line 139 of file IfxCcu6.h.

◆ IfxCcu6_ExternalTriggerMode

enum IfxCcu6_ExternalTriggerMode

Defines the event of signal T1xHR that can set the run bit T1xR by HW
Definition in Ifx_CCU.TCTR2.B.T12RSEL / IIfx_CCU.TCTR2.B.T13RSEL.

Enumerator
IfxCcu6_ExternalTriggerMode_disable | The external setting of T1xR is disabled.
IfxCcu6_ExternalTriggerMode_risingEdge | Bit T1xR is set if a rising edge of signal T1xHR is detected.
IfxCcu6_ExternalTriggerMode_fallingEdge | Bit T1xR is set if a falling edge of signal T1xHR is detected.
IfxCcu6_ExternalTriggerMode_anyEdge | Bit T1xR is set if an edge of signal T1xHR is detected.

Definition at line 149 of file IfxCcu6.h.

◆ IfxCcu6_HallSensorTriggerMode

enum IfxCcu6_HallSensorTriggerMode

Defines the source for the sampling of the Hall input pattern and the comparison to the current and the expected Hall pattern bit fields
Definition in Ifx_CCU.T12MSEL.HSYNC.

Enumerator
IfxCcu6_HallSensorTriggerMode_permanentCheck | Any edge at any of the inputs CCPOSx, independent from any PWM signal.
IfxCcu6_HallSensorTriggerMode_cM63 | A T13 Compare-Match.
IfxCcu6_HallSensorTriggerMode_t13PM | A T13 Period-Match.
IfxCcu6_HallSensorTriggerMode_off | Hall sampling triggered by HW sources is switched off.
IfxCcu6_HallSensorTriggerMode_t12PMCountingUp | A T12 Period-Match while counting up (T12_PM and CDIR = 0)
IfxCcu6_HallSensorTriggerMode_t12OMCountingDown | A T12 One-Match while counting down (T12_PM and CDIR = 1)
IfxCcu6_HallSensorTriggerMode_cM61CountingUp | A T12 Compare-Match of compare channel CC61 while counting up (CM_61 and CDIR = 0)
IfxCcu6_HallSensorTriggerMode_cM61CountingDown | A T12 Compare-Match of compare channel CC61 while counting down (CM_61 and CDIR = 1)

Definition at line 163 of file IfxCcu6.h.

◆ IfxCcu6_InterruptSource

enum IfxCcu6_InterruptSource

Interrupt source selection Description in Ifx_CCU.IEN.

Enumerator
IfxCcu6_InterruptSource_cc60RisingEdge | Capture compare match rising edge interrupt enable for channel CC60.
IfxCcu6_InterruptSource_cc60FallingEdge | Capture compare match falling edge interrupt enable for channel CC60.
IfxCcu6_InterruptSource_cc61RisingEdge | Capture compare match rising edge interrupt enable for channel CC61.
IfxCcu6_InterruptSource_cc61FallingEdge | Capture compare match falling edge interrupt enable for channel CC61.
IfxCcu6_InterruptSource_cc62RisingEdge | Capture compare match rising edge interrupt enable for channel CC62.
IfxCcu6_InterruptSource_cc62FallingEdge | Capture compare match falling edge interrupt enable for channel CC62.
IfxCcu6_InterruptSource_t12OneMatch | Interrupt enable for T12 one-match.
IfxCcu6_InterruptSource_t12PeriodMatch | Interrupt enable for T12 period-match.
IfxCcu6_InterruptSource_t13CompareMatch | Interrupt enable for T13 compare-match.
IfxCcu6_InterruptSource_t13PeriodMatch | Interrupt enable for T13 period-match.
IfxCcu6_InterruptSource_trap | Interrupt enable for trap flag.
IfxCcu6_InterruptSource_correctHallEvent | Interrupt enable for correct hall event.
IfxCcu6_InterruptSource_wrongHallEvent | Interrupt enable for wrong hall event.

Definition at line 179 of file IfxCcu6.h.

◆ IfxCcu6_MultiChannelSwitchingSelect

enum IfxCcu6_MultiChannelSwitchingSelect

Selection of the trigger request source (next multi-channel event) for the shadow transfer MCM_ST from MCMPS to MCMP
Definition in Ifx_CCU.MCMCTR.B.SWSEL.

Enumerator
IfxCcu6_MultiChannelSwitchingSelect_noEvent | No trigger request will be generated.
IfxCcu6_MultiChannelSwitchingSelect_correctHallEvent | Correct Hall pattern detected (CM_CHE)
IfxCcu6_MultiChannelSwitchingSelect_t13PeriodMatch | T13 period-match detected (while counting up)
IfxCcu6_MultiChannelSwitchingSelect_t12OneMatch | T12 one-match (while counting down)
IfxCcu6_MultiChannelSwitchingSelect_t12Channel1CompareMatch | T12 channel 1 compare-match detected (phase delay function)
IfxCcu6_MultiChannelSwitchingSelect_t12PeriodMatch | T12 period match detected (while counting up)

Definition at line 205 of file IfxCcu6.h.

◆ IfxCcu6_MultiChannelSwitchingSync

enum IfxCcu6_MultiChannelSwitchingSync

Selection of the synchronization mechanism for the shadow transfer event MCM_ST
Definition in Ifx_CCU.MCMCTR.B.SWSYN.

Enumerator
IfxCcu6_MultiChannelSwitchingSync_direct | Direct, the trigger event immediately leads to the shadow transfer.
IfxCcu6_MultiChannelSwitchingSync_t13ZeroMatch | A T13 zero-match triggers the shadow transfer.
IfxCcu6_MultiChannelSwitchingSync_t12ZeroMatch | A T12 zero-match (while counting up) triggers the shadow transfer.

Definition at line 219 of file IfxCcu6.h.

◆ IfxCcu6_ServiceRequest

enum IfxCcu6_ServiceRequest

Selection of service request outputs.

Enumerator
IfxCcu6_ServiceRequest_0 | Service request output SR0.
IfxCcu6_ServiceRequest_1 | Service request output SR1.
IfxCcu6_ServiceRequest_2 | Service request output SR2.
IfxCcu6_ServiceRequest_3 | Service request output SR3.

Definition at line 230 of file IfxCcu6.h.

◆ IfxCcu6_SleepMode

enum IfxCcu6_SleepMode

Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_CCU6.CLC.B.EDIS.

Enumerator
IfxCcu6_SleepMode_enable | enables sleep mode
IfxCcu6_SleepMode_disable | disables sleep mode

Definition at line 241 of file IfxCcu6.h.

◆ IfxCcu6_SuspendMode

enum IfxCcu6_SuspendMode

OCDS Suspend Control (OCDS.SUS)

Enumerator
IfxCcu6_SuspendMode_none | No suspend.
IfxCcu6_SuspendMode_hard | Hard Suspend.
IfxCcu6_SuspendMode_soft | Soft Suspend.

Definition at line 249 of file IfxCcu6.h.

◆ IfxCcu6_T12Channel

enum IfxCcu6_T12Channel

Capture compare channel of Timer12.

Enumerator
IfxCcu6_T12Channel_0 | T12 channel CC60.
IfxCcu6_T12Channel_1 | T12 channel CC61.
IfxCcu6_T12Channel_2 | T12 channel CC62.

Definition at line 258 of file IfxCcu6.h.

◆ IfxCcu6_T12ChannelMode

enum IfxCcu6_T12ChannelMode

The operating mode for the T12 channels are defined by the bit fields Ifx_CCU.T12MSEL.MSEL6x.

Enumerator
IfxCcu6_T12ChannelMode_off | Capture/Compare modes switched off.
IfxCcu6_T12ChannelMode_compareMode | Compare mode.
IfxCcu6_T12ChannelMode_doubleRegisterCaptureRisingAndFalling | CC6xIN rising edge: T12 stored in CC6xR, falling edge: T12 stored in CC6xSR.
IfxCcu6_T12ChannelMode_doubleRegisterCaptureRising | CC6xIN rising edge: CC6nSR stored in CC6xR, falling edge: T12 stored in CC6xSR.
IfxCcu6_T12ChannelMode_doubleRegisterCaptureFalling | CC6xIN rising edge: CC6nSR stored in CC6xR, falling edge: T12 stored in CC6xSR.
IfxCcu6_T12ChannelMode_doubleRegisterCaptureAny | CC6xIN any active edge: CC6nSR stored in CC6xR, any active edge: T12 stored in CC6xSR.
IfxCcu6_T12ChannelMode_hallSensor | Hall Sensor Mode, In order to properly enable this mode, all three MSEL6x fields have to be programmed to Hall Sensor mode.
IfxCcu6_T12ChannelMode_hysteresisLikecompare | Hysteresis-like compare mode.
IfxCcu6_T12ChannelMode_multiInputCaptureRisingAndFalling | CC6xIN rising edge: T12 stored in CC6xR, CCPOSx falling edge: T12 stored in CC6xSR.
IfxCcu6_T12ChannelMode_multiInputCaptureFallingAndRising | CC6xIN falling edge: T12 stored in CC6xR, CCPOSx rising edge: T12 stored in CC6xSR.
IfxCcu6_T12ChannelMode_multiInputCaptureBothRising | CC6xIN rising edge: T12 stored in CC6xR, CCPOSx rising edge: T12 stored in CC6xSR.
IfxCcu6_T12ChannelMode_multiInputCaptureBothFalling | CC6xIN falling edge: T12 stored in CC6xR, CCPOSx falling edge: T12 stored in CC6xSR.
IfxCcu6_T12ChannelMode_multiInputCaptureAny | CC6xIN any active edge : T12 stored in CC6xR, CCPOSx any active edge: T12 stored in CC6xSR.

Definition at line 267 of file IfxCcu6.h.

◆ IfxCcu6_T12CountDirection

enum IfxCcu6_T12CountDirection

Counting direction of Timer12
Definition in Ifx_CCU.TCTR0.B.CDIR.

Enumerator
IfxCcu6_T12CountDirection_up | Counting up.
IfxCcu6_T12CountDirection_down | Counting down.

Definition at line 288 of file IfxCcu6.h.

◆ IfxCcu6_T12CountMode

enum IfxCcu6_T12CountMode

Operating mode of Timer 12
Definition in Ifx_CCU.TCTR0.B.CTM.

Enumerator
IfxCcu6_T12CountMode_edgeAligned | T12 always counts up and continues counting from zero after reaching the period value.
IfxCcu6_T12CountMode_centerAligned | T12 counts down after detecting a period-match and counts up after detecting a one-match.

Definition at line 297 of file IfxCcu6.h.

◆ IfxCcu6_T13TriggerDirection

enum IfxCcu6_T13TriggerDirection

Delivers additional information to control the automatic set of bit T13R in the case that the trigger action defined by T13 trigger event control (T13TEC) is detected.
Definition in Ifx_CCU.TCTR2.B.T13TED.

Enumerator
IfxCcu6_T13TriggerDirection_noAction | no action
IfxCcu6_T13TriggerDirection_onT12CountingUp | while T12 is counting up
IfxCcu6_T13TriggerDirection_onT12CountingDown | while T12 is counting down
IfxCcu6_T13TriggerDirection_anyT12 | independent on the count direction of T12

Definition at line 308 of file IfxCcu6.h.

◆ IfxCcu6_T13TriggerEvent

enum IfxCcu6_T13TriggerEvent

Selects the trigger event to start T13 (automatic set of T13R for synchronization to T12 compare signals)
Definition in Ifx_CCU.TCTR2.B.T13TEC.

Enumerator
IfxCcu6_T13TriggerEvent_noAction | no action
IfxCcu6_T13TriggerEvent_onCC60RCompare | set T13R on a T12 compare event on channel 0
IfxCcu6_T13TriggerEvent_onCC61RCompare | set T13R on a T12 compare event on channel 1
IfxCcu6_T13TriggerEvent_onCC62RCompare | set T13R on a T12 compare event on channel 2
IfxCcu6_T13TriggerEvent_onAnyT12Compare | set T13R on any T12 compare event (ch. 0, 1, 2)
IfxCcu6_T13TriggerEvent_onT12Period | set T13R upon a period-match of T12
IfxCcu6_T13TriggerEvent_onT12Zero | set T13R upon a zero-match of T12 (while counting up)
IfxCcu6_T13TriggerEvent_onCCPOSxEdge | set T13R on any edge of inputs CCPOSx

Definition at line 319 of file IfxCcu6.h.

◆ IfxCcu6_TimerId

enum IfxCcu6_TimerId

Timer number ( T12 / T13 )

Enumerator
IfxCcu6_TimerId_t12 | Timer 12.
IfxCcu6_TimerId_t13 | Timer 13.

Definition at line 334 of file IfxCcu6.h.

◆ IfxCcu6_TimerInputClock

enum IfxCcu6_TimerInputClock

Selects the input clock for timers (T12 or T13) that is derived from the peripheral clock according to the equation
Definition in Ifx_CCU.TCTR0.B.T12CLK / Ifx_CCU.TCTR0.B.T13CLK.

Enumerator
IfxCcu6_TimerInputClock_fcc6 | fcc6
IfxCcu6_TimerInputClock_fcc6By2 | fcc6 / 2
IfxCcu6_TimerInputClock_fcc6By4 | fcc6 / 4
IfxCcu6_TimerInputClock_fcc6By8 | fcc6 / 8
IfxCcu6_TimerInputClock_fcc6By16 | fcc6 / 16
IfxCcu6_TimerInputClock_fcc6By32 | fcc6 / 32
IfxCcu6_TimerInputClock_fcc6By64 | fcc6 / 64
IfxCcu6_TimerInputClock_fcc6By128 | fcc6 / 128

Definition at line 343 of file IfxCcu6.h.

◆ IfxCcu6_TimerInputSignal

enum IfxCcu6_TimerInputSignal

Selection of actual input signal for the timer inputs.

Enumerator
IfxCcu6_TimerInputSignal_a | defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input.
IfxCcu6_TimerInputSignal_b | defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input.
IfxCcu6_TimerInputSignal_c | defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input.
IfxCcu6_TimerInputSignal_d | defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input.
IfxCcu6_TimerInputSignal_e | defines the input signal used as T1xHR input.
IfxCcu6_TimerInputSignal_f | defines the input signal used as T1xHR input.
IfxCcu6_TimerInputSignal_g | defines the input signal used as T1xHR input.
IfxCcu6_TimerInputSignal_h | defines the input signal used as T1xHR input.

Definition at line 357 of file IfxCcu6.h.

◆ IfxCcu6_TimerRunStatus

enum IfxCcu6_TimerRunStatus

Timer (T12 / T13) run status
Definition in Ifx_CCU.TCTR0.B.T12R and Ifx_CCU.TCTR0.B.T13R.

Enumerator
IfxCcu6_TimerRunStatus_stopped | Timer T1x is stopped.
IfxCcu6_TimerRunStatus_running | Timer T1x is running.

Definition at line 372 of file IfxCcu6.h.

◆ IfxCcu6_TrapMode

enum IfxCcu6_TrapMode

Defines how the trap flag TRPF can be cleared after the trap input condition is no longer valid (either by CTRAP = 1 or by TRPPEN = 0)
Definition in Ifx_CCU.TRPCTR.B.TRPM2.

Enumerator
IfxCcu6_TrapMode_automatic | Bit TRPF is cleared by HW.
IfxCcu6_TrapMode_manual | Bit TRPF stays 0, It has to be cleared by SW by writing ISR.RTRPF = 1.

Definition at line 381 of file IfxCcu6.h.

◆ IfxCcu6_TrapState

enum IfxCcu6_TrapState

Defines the behavior of the selected outputs when leaving the trap state, after the trap condition has become inactive again
Definition in Ifx_CCU.TRPCTR.B.TRPMx (x = 0, 1)

Enumerator
IfxCcu6_TrapState_t12Sync | The trap state is left when a zero-match of T12 (while counting up) is detected.
IfxCcu6_TrapState_t13Sync | The trap state is left when a zeromatch of T13 is detected.
IfxCcu6_TrapState_immediate | The trap state is left immediately without any synchronization to T12 or T13.

Definition at line 391 of file IfxCcu6.h.


iLLD_TC38A: Operative Functions

Functions
Operative Functions
iLLD » CCU6 » Standard Driver
Collaboration diagram for Operative Functions:

Functions

IFX_INLINE void | IfxCcu6_clearCounter (Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Clears the counters of the Timers (T12, T13 individually or together based on the selection) More...
IFX_INLINE void | IfxCcu6_clearDeadTimeCounters (Ifx_CCU6 *ccu6)
Clears all the three dead-time counter channels to zero. More...
IFX_INLINE void | IfxCcu6_clearInterruptStatusFlag (Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Clears the selected interrupt flag. More...
IFX_INLINE void | IfxCcu6_clearT12OneNotification (Ifx_CCU6 *ccu6)
Clears the T12 One notification. More...
IFX_INLINE void | IfxCcu6_clearT12PeriodNotification (Ifx_CCU6 *ccu6)
Clears the T12 period notification. More...
IFX_INLINE void | IfxCcu6_clearT13CompareNotification (Ifx_CCU6 *ccu6)
Clears the T13 compare notification. More...
IFX_INLINE volatile uint32 * | IfxCcu6_getT12TimerPointer (Ifx_CCU6 *ccu6)
Returns the Timer pointer. More...
IFX_INLINE boolean | IfxCcu6_isModuleEnabled (Ifx_CCU6 *ccu6)
Returns the status of module enabled or disabled. More...
IFX_INLINE boolean | IfxCcu6_isT12OneNotification (Ifx_CCU6 *ccu6)
Returns the status of T12 one notification. More...
IFX_INLINE boolean | IfxCcu6_isT12PeriodNotification (Ifx_CCU6 *ccu6)
Returns the status of T12 period notification. More...
IFX_INLINE boolean | IfxCcu6_isT13CompareNotification (Ifx_CCU6 *ccu6)
Returns the status of T13 compare notification. More...
IFX_INLINE void | IfxCcu6_setCountingInputMode (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_CountingInputMode mode)
Sets the input event leading to a counting action of Timers (T12 / T13). More...
IFX_INLINE void | IfxCcu6_setCurrentHallPattern (Ifx_CCU6 *ccu6, uint8 pattern)
Sets the current hall pattern for the multichannel mode (writes into shadow register) More...
IFX_INLINE void | IfxCcu6_setDeadTimeValue (Ifx_CCU6 *ccu6, uint8 value)
Sets the delay between switching from the passive state to the active state of the selected outputs (dead time) More...
IFX_INLINE void | IfxCcu6_setExpectedHallPattern (Ifx_CCU6 *ccu6, uint8 pattern)
Sets the expected hall pattern for the multichannel mode (writes into shadow register) More...
IFX_INLINE void | IfxCcu6_setExternalRunMode (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ExternalTriggerMode mode)
Sets the event of signal T1xHR that can set the run bit T1xR by HW. More...
IFX_INLINE void | IfxCcu6_setHallSensorTriggerMode (Ifx_CCU6 *ccu6, IfxCcu6_HallSensorTriggerMode mode)
Sets source for the sampling of the Hall input pattern and the comparison to the current and the expected Hall pattern bit fields. More...
IFX_INLINE void | IfxCcu6_setInputClockFrequency (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_TimerInputClock frequency)
Sets the input clock for timers (T12 or T13) More...
IFX_INLINE void | IfxCcu6_setInterruptStatusFlag (Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Sets the selected interrupt flag. More...
IFX_INLINE void | IfxCcu6_setMultiChannelPwmPattern (Ifx_CCU6 *ccu6, uint8 pattern)
Sets the output pattern for the multichannel mode (writes into shadow register) More...
IFX_INLINE void | IfxCcu6_setMultiChannelSwitchingMode (Ifx_CCU6 *ccu6, IfxCcu6_MultiChannelSwitchingSelect mode)
Sets the trigger request source (next multi-channel event) for the shadow transfer MCM_ST from MCMPS to MCMP. More...
IFX_INLINE void | IfxCcu6_setMultiChannelSwitchingSync (Ifx_CCU6 *ccu6, IfxCcu6_MultiChannelSwitchingSync sync)
Sets the synchronization mechanism of the shadow transfer event MCM_ST
if it has been requested before (flag R set by an event selected by SWSEL) and if MCMEN = 1. More...
IFX_INLINE void | IfxCcu6_setOutputPassiveState (Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut, boolean state)
Sets the state of the corresponding compare channel, that is considered to be the passive state. More...
IFX_INLINE void | IfxCcu6_setSingleShotModeEnable (Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Enables / Disables the single shot mode of Timers (T12, T13 individually or together based on the selection) More...
IFX_INLINE void | IfxCcu6_setT12ChannelMode (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, IfxCcu6_T12ChannelMode mode)
Sets the operating mode of the Timer12 capture/compare channels. More...
IFX_INLINE void | IfxCcu6_setT12CountMode (Ifx_CCU6 *ccu6, IfxCcu6_T12CountMode mode)
IFX_INLINE void | IfxCcu6_setT12CounterValue (Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit counter value of Timer12. More...
IFX_INLINE void | IfxCcu6_setT12PeriodValue (Ifx_CCU6 *ccu6, uint16 value)
Sets the period value that leads Timer12 counter value to a period-match. More...
IFX_INLINE void | IfxCcu6_setT13CompareValue (Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit compare value of Timer13 (writes into shadow register) More...
IFX_INLINE void | IfxCcu6_setT13CounterValue (Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit counter value of Timer13. More...
IFX_INLINE void | IfxCcu6_setT13PeriodValue (Ifx_CCU6 *ccu6, uint16 value)
Sets the period value that leads Timer13 counter value to a period-match. More...
IFX_INLINE void | IfxCcu6_setT13TriggerEventDirection (Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerDirection direction)
Sets the Timer13 trigger event direction. More...
IFX_INLINE void | IfxCcu6_setT13TriggerEventMode (Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerEvent mode)
Sets the trigger event to start Timer13 (automatic set of T13R for synchronization to Timer12 compare signals) More...
IFX_INLINE void | IfxCcu6_setTrapMode (Ifx_CCU6 *ccu6, IfxCcu6_TrapMode mode)
Sets the mode of clearing the trap flag TRPF after the trap input condition is no longer valid. More...
IFX_INLINE void | IfxCcu6_setTrapState (Ifx_CCU6 *ccu6, IfxCcu6_TrapState state)
Sets behaviour of the selected outputs when leaving the trap state after the trap condition has become inactive again. More...
IFX_INLINE void | IfxCcu6_startTimer (Ifx_CCU6 *ccu6, boolean t12, boolean t13)
starts the timers (T12, T13 individually or together based on the selection) More...
IFX_INLINE void | IfxCcu6_stopTimer (Ifx_CCU6 *ccu6, boolean t12, boolean t13)
starts the timers (T12, T13 individually or together based on the selection) More...
IFX_INLINE void | IfxCcu6_updateHallPattern (Ifx_CCU6 *ccu6, uint8 currentHall, uint8 expectedHall, uint8 output)
Updates the hall pattern (current hall, expected hall, moduleation output), in a single write. More...
IFX_EXTERN void | IfxCcu6_connectTrigger (Ifx_CCU6 *ccu6, IfxCcu6_TrigOut outputLine, IfxCcu6_TrigSel selectedTrigger)
IFX_EXTERN void | IfxCcu6_routeInterruptNode (Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source, IfxCcu6_ServiceRequest serviceRequest)
Routes the interrupt node pointer to the selected service requests. More...
IFX_EXTERN void | IfxCcu6_setOutputPassiveLevel (Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut, boolean state)
Sets the passive state level of the PWM outputs of the module. More...
IFX_EXTERN void | IfxCcu6_setT12CaptureCompareState (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, IfxCcu6_CaptureCompareState state)
Sets software-control (independent set and clear conditions) for the Timer12 channel state bits CC6xST (x=0,1,2) More...
IFX_EXTERN void | IfxCcu6_setT12CompareValue (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, uint16 value)
Sets the 16-bit compare value of Timer12 (writes into shadow registers) More...
IFX_EXTERN float32 | IfxCcu6_setT12Frequency (Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period, IfxCcu6_T12CountMode countMode)
Sets the frequency and clock input of the Timer 12. Caution: If desired frequency cannot achieved (by successive divisions by 2) : Then the nearest frequency value is set ( >= desired value) The resulting frequency is captured in the handler element : CaptureFrequency. More...
IFX_EXTERN void | IfxCcu6_setT12InputSignal (Ifx_CCU6 *ccu6, IfxCcu6_T12hr_In *extInput)
selects the actual input signal for the timer inputs. More...
IFX_EXTERN void | IfxCcu6_setT13CaptureCompareState (Ifx_CCU6 *ccu6, IfxCcu6_CaptureCompareState state)
Sets software-control (independent set and clear conditions) for the Timer13 channel state bits CC63ST. More...
IFX_EXTERN float32 | IfxCcu6_setT13Frequency (Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period)
Sets the frequency and clock input of the Timer 13 Caution: If desired frequency cannot achieved (by successive divisions by 2) : Then the nearest frequency value is set ( >= desired value) The resulting frequency is captured in the handler element : captureFrequency. More...
IFX_EXTERN void | IfxCcu6_setT13InputSignal (Ifx_CCU6 *ccu6, IfxCcu6_T13hr_In *extInput)
selects the actual input signal for the timer inputs. More...

Detailed Description

Function Documentation

◆ IfxCcu6_clearCounter()

IFX_INLINE void IfxCcu6_clearCounter | ( | Ifx_CCU6 * | ccu6,
 |  | boolean | t12,
 |  | boolean | t13
 | ) |  |

Clears the counters of the Timers (T12, T13 individually or together based on the selection)

Parameters
ccu6 | Pointer to the base of CCU6 registers
t12 | Timer12 choice (enable / disable)
t13 | Timer13 choice (enable / disable)
Returns
None

Definition at line 1402 of file IfxCcu6.h.

◆ IfxCcu6_clearDeadTimeCounters()

IFX_INLINE void IfxCcu6_clearDeadTimeCounters ( Ifx_CCU6 * ccu6 )

Clears all the three dead-time counter channels to zero.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1412 of file IfxCcu6.h.

◆ IfxCcu6_clearInterruptStatusFlag()

IFX_INLINE void IfxCcu6_clearInterruptStatusFlag | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_InterruptSource | source
 | ) |  |

Clears the selected interrupt flag.

Parameters
ccu6 | Pointer to the base of CCU6 registers
source | Interrupt source selection
Returns
None

Definition at line 1418 of file IfxCcu6.h.

Referenced by IfxCcu6_TimerWithTrigger_init().

◆ IfxCcu6_clearT12OneNotification()

IFX_INLINE void IfxCcu6_clearT12OneNotification ( Ifx_CCU6 * ccu6 )

Clears the T12 One notification.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1425 of file IfxCcu6.h.

Referenced by IfxCcu6_TimerWithTrigger_acknowledgeTimerIrq().

◆ IfxCcu6_clearT12PeriodNotification()

IFX_INLINE void IfxCcu6_clearT12PeriodNotification ( Ifx_CCU6 * ccu6 )

Clears the T12 period notification.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1431 of file IfxCcu6.h.

◆ IfxCcu6_clearT13CompareNotification()

IFX_INLINE void IfxCcu6_clearT13CompareNotification ( Ifx_CCU6 * ccu6 )

Clears the T13 compare notification.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1437 of file IfxCcu6.h.

Referenced by IfxCcu6_TimerWithTrigger_acknowledgeTriggerIrq().

◆ IfxCcu6_connectTrigger()

IFX_EXTERN void IfxCcu6_connectTrigger | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TrigOut | outputLine,
 |  | IfxCcu6_TrigSel | selectedTrigger
 | ) |  |
Parameters
ccu6 | Specifies Ccu6 module
outputLine | Output Line
selectedTrigger | Trigger selection
Returns
None

Definition at line 53 of file IfxCcu6.c.

Referenced by IfxCcu6_PwmBc_initModule(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_getT12TimerPointer()

IFX_INLINE volatile uint32 * IfxCcu6_getT12TimerPointer ( Ifx_CCU6 * ccu6 )

Returns the Timer pointer.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
Timer pointer

Definition at line 1703 of file IfxCcu6.h.

Referenced by IfxCcu6_TimerWithTrigger_getPointer().

◆ IfxCcu6_isModuleEnabled()

IFX_INLINE boolean IfxCcu6_isModuleEnabled ( Ifx_CCU6 * ccu6 )

Returns the status of module enabled or disabled.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
Status (TRUE / FALSE)

Definition at line 1914 of file IfxCcu6.h.

Referenced by IfxCcu6_disableModule(), IfxCcu6_enableModule(), IfxCcu6_Icu_initModule(), IfxCcu6_PwmBc_initModule(), IfxCcu6_Timer_initModule(), IfxCcu6_TimerWithTrigger_init(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_isT12OneNotification()

IFX_INLINE boolean IfxCcu6_isT12OneNotification ( Ifx_CCU6 * ccu6 )

Returns the status of T12 one notification.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
Status (TRUE / FALSE)

Definition at line 1932 of file IfxCcu6.h.

Referenced by IfxCcu6_TimerWithTrigger_acknowledgeTimerIrq().

◆ IfxCcu6_isT12PeriodNotification()

IFX_INLINE boolean IfxCcu6_isT12PeriodNotification ( Ifx_CCU6 * ccu6 )

Returns the status of T12 period notification.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
Status (TRUE / FALSE)

Definition at line 1938 of file IfxCcu6.h.

◆ IfxCcu6_isT13CompareNotification()

IFX_INLINE boolean IfxCcu6_isT13CompareNotification ( Ifx_CCU6 * ccu6 )

Returns the status of T13 compare notification.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
Status (TRUE / FALSE)

Definition at line 1944 of file IfxCcu6.h.

Referenced by IfxCcu6_TimerWithTrigger_acknowledgeTriggerIrq().

◆ IfxCcu6_routeInterruptNode()

IFX_EXTERN void IfxCcu6_routeInterruptNode | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_InterruptSource | source,
 |  | IfxCcu6_ServiceRequest | serviceRequest
 | ) |  |

Routes the interrupt node pointer to the selected service requests.

Parameters
ccu6 | Pointer to the base of CCU6 registers
source | Interrupt source selection
serviceRequest | Selection of service request outputs
Returns
None

Definition at line 254 of file IfxCcu6.c.

Referenced by IfxCcu6_Icu_initChannel(), IfxCcu6_PwmBc_initModule(), IfxCcu6_Timer_initModule(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_setCountingInputMode()

IFX_INLINE void IfxCcu6_setCountingInputMode | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TimerId | timer,
 |  | IfxCcu6_CountingInputMode | mode
 | ) |  |

Sets the input event leading to a counting action of Timers (T12 / T13).

Parameters
ccu6 | Pointer to the base of CCU6 registers
timer | Timer selection, ( Timer12 / Timer13 )
mode | Input event leading to a counting action of the timer (T12 / T13)
Returns
None

Definition at line 1958 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_initModule(), IfxCcu6_Timer_countOneStep(), IfxCcu6_Timer_initModule(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_setCurrentHallPattern()

IFX_INLINE void IfxCcu6_setCurrentHallPattern | ( | Ifx_CCU6 * | ccu6,
 |  | uint8 | pattern
 | ) |  |

Sets the current hall pattern for the multichannel mode (writes into shadow register)

Parameters
ccu6 | Pointer to the base of CCU6 registers
pattern | Current hall pattern
Returns
None

Definition at line 1966 of file IfxCcu6.h.

◆ IfxCcu6_setDeadTimeValue()

IFX_INLINE void IfxCcu6_setDeadTimeValue | ( | Ifx_CCU6 * | ccu6,
 |  | uint8 | value
 | ) |  |

Sets the delay between switching from the passive state to the active state of the selected outputs (dead time)

Parameters
ccu6 | Pointer to the base of CCU6 registers
value | Value of the dead time to be induced
Returns
None

Definition at line 1972 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), IfxCcu6_PwmHl_setDeadtime(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_setExpectedHallPattern()

IFX_INLINE void IfxCcu6_setExpectedHallPattern | ( | Ifx_CCU6 * | ccu6,
 |  | uint8 | pattern
 | ) |  |

Sets the expected hall pattern for the multichannel mode (writes into shadow register)

Parameters
ccu6 | Pointer to the base of CCU6 registers
pattern | Expected hall pattern
Returns
None

Definition at line 1978 of file IfxCcu6.h.

◆ IfxCcu6_setExternalRunMode()

IFX_INLINE void IfxCcu6_setExternalRunMode | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TimerId | timer,
 |  | IfxCcu6_ExternalTriggerMode | mode
 | ) |  |

Sets the event of signal T1xHR that can set the run bit T1xR by HW.

Parameters
ccu6 | Pointer to the base of CCU6 registers
timer | Timer selection, ( Timer12 / Timer13 )
mode | External trigger mode
Returns
None

Definition at line 1984 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_startCapture(), IfxCcu6_Icu_stopCapture(), IfxCcu6_PwmBc_start(), IfxCcu6_PwmBc_stop(), IfxCcu6_Timer_start(), IfxCcu6_Timer_startSingleShotMode(), IfxCcu6_Timer_stop(), IfxCcu6_TPwm_start(), and IfxCcu6_TPwm_stop().

◆ IfxCcu6_setHallSensorTriggerMode()

IFX_INLINE void IfxCcu6_setHallSensorTriggerMode | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_HallSensorTriggerMode | mode
 | ) |  |

Sets source for the sampling of the Hall input pattern and the comparison to the current and the expected Hall pattern bit fields.

Parameters
ccu6 | Pointer to the base of CCU6 registers
mode | Hall sensor input trigger event
Returns
None

Definition at line 1992 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule().

◆ IfxCcu6_setInputClockFrequency()

IFX_INLINE void IfxCcu6_setInputClockFrequency | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TimerId | timer,
 |  | IfxCcu6_TimerInputClock | frequency
 | ) |  |

Sets the input clock for timers (T12 or T13)

Parameters
ccu6 | Pointer to the base of CCU6 registers
timer | Timer selection, ( Timer12 / Timer13 )
frequency | Input clock for timers (T12 or T13)
Returns
None

Definition at line 2000 of file IfxCcu6.h.

Referenced by IfxCcu6_setT12Frequency(), and IfxCcu6_setT13Frequency().

◆ IfxCcu6_setInterruptStatusFlag()

IFX_INLINE void IfxCcu6_setInterruptStatusFlag | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_InterruptSource | source
 | ) |  |

Sets the selected interrupt flag.

Parameters
ccu6 | Pointer to the base of CCU6 registers
source | Interrupt source selection
Returns
None

Definition at line 2008 of file IfxCcu6.h.

◆ IfxCcu6_setMultiChannelPwmPattern()

IFX_INLINE void IfxCcu6_setMultiChannelPwmPattern | ( | Ifx_CCU6 * | ccu6,
 |  | uint8 | pattern
 | ) |  |

Sets the output pattern for the multichannel mode (writes into shadow register)

Parameters
ccu6 | Pointer to the base of CCU6 registers
pattern | Output pattern for the multichannel mode.
Returns
None

Definition at line 2015 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmHl_setupChannels().

◆ IfxCcu6_setMultiChannelSwitchingMode()

IFX_INLINE void IfxCcu6_setMultiChannelSwitchingMode | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_MultiChannelSwitchingSelect | mode
 | ) |  |

Sets the trigger request source (next multi-channel event) for the shadow transfer MCM_ST from MCMPS to MCMP.

Parameters
ccu6 | Pointer to the base of CCU6 registers
mode | Trigger request source (next multi-channel event) for the shadow transfer MCM_ST
Returns
None

Definition at line 2021 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), and IfxCcu6_PwmHl_init().

◆ IfxCcu6_setMultiChannelSwitchingSync()

IFX_INLINE void IfxCcu6_setMultiChannelSwitchingSync | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_MultiChannelSwitchingSync | sync
 | ) |  |

Sets the synchronization mechanism of the shadow transfer event MCM_ST
if it has been requested before (flag R set by an event selected by SWSEL) and if MCMEN = 1.

Parameters
ccu6 | Pointer to the base of CCU6 registers
sync | Synchronization mechanism of the shadow transfer event MCM_ST
Returns
None

Definition at line 2027 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), and IfxCcu6_PwmHl_init().

◆ IfxCcu6_setOutputPassiveLevel()

IFX_EXTERN void IfxCcu6_setOutputPassiveLevel | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_ChannelOut | channelOut,
 |  | boolean | state
 | ) |  |

Sets the passive state level of the PWM outputs of the module.

Parameters
ccu6 | Pointer to the base of CCU6 registers
channelOut | Capture compare output selection
state | FALSE: The passive level is 0. TRUE : The passive level is 1.
Returns
None

Definition at line 291 of file IfxCcu6.c.

Referenced by IfxCcu6_TimerWithTrigger_init().

◆ IfxCcu6_setOutputPassiveState()

IFX_INLINE void IfxCcu6_setOutputPassiveState | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_ChannelOut | channelOut,
 |  | boolean | state
 | ) |  |

Sets the state of the corresponding compare channel, that is considered to be the passive state.

Parameters
ccu6 | Pointer to the base of CCU6 registers
channelOut | Capture compare output selection
state FALSE: passive state when CC6xST == 0
TRUE : passive state when CC6xST == 1
Returns
None

Definition at line 2033 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_setSingleShotModeEnable()

IFX_INLINE void IfxCcu6_setSingleShotModeEnable | ( | Ifx_CCU6 * | ccu6,
 |  | boolean | t12,
 |  | boolean | t13
 | ) |  |

Enables / Disables the single shot mode of Timers (T12, T13 individually or together based on the selection)

Parameters
ccu6 | Pointer to the base of CCU6 registers
t12 | Timer12 choice (enable / disable)
t13 | Timer13 choice (enable / disable)
Returns
None

Definition at line 2041 of file IfxCcu6.h.

Referenced by IfxCcu6_TimerWithTrigger_init().

◆ IfxCcu6_setT12CaptureCompareState()

IFX_EXTERN void IfxCcu6_setT12CaptureCompareState | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_T12Channel | channel,
 |  | IfxCcu6_CaptureCompareState | state
 | ) |  |

Sets software-control (independent set and clear conditions) for the Timer12 channel state bits CC6xST (x=0,1,2)

Parameters
ccu6 | Pointer to the base of CCU6 registers
channel | Timer12 Capture compare channel number
state | capture/compare state selection (set / clear / toggle)
Returns
None

Definition at line 306 of file IfxCcu6.c.

◆ IfxCcu6_setT12ChannelMode()

IFX_INLINE void IfxCcu6_setT12ChannelMode | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_T12Channel | channel,
 |  | IfxCcu6_T12ChannelMode | mode
 | ) |  |

Sets the operating mode of the Timer12 capture/compare channels.

Parameters
ccu6 | Pointer to the base of CCU6 registers
channel | Timer12 Capture compare channel number
mode | The operating mode for the T12 channels
Returns
None

Definition at line 2071 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_startCapture(), IfxCcu6_Icu_stopCapture(), IfxCcu6_PwmBc_initModule(), IfxCcu6_PwmHl_init(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_setT12CompareValue()

IFX_EXTERN void IfxCcu6_setT12CompareValue | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_T12Channel | channel,
 |  | uint16 | value
 | ) |  |

Sets the 16-bit compare value of Timer12 (writes into shadow registers)

Parameters
ccu6 | Pointer to the base of CCU6 registers
channel | Timer12 Capture compare channel number
value | Compare value
Returns
None

Definition at line 331 of file IfxCcu6.c.

Referenced by IfxCcu6_PwmBc_initModule(), IfxCcu6_PwmHl_setOnTime(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_setT12CounterValue()

IFX_INLINE void IfxCcu6_setT12CounterValue | ( | Ifx_CCU6 * | ccu6,
 |  | uint16 | value
 | ) |  |

Sets the 16-bit counter value of Timer12.

Parameters
ccu6 | Pointer to the base of CCU6 registers
value | Counter value
Returns
None

Definition at line 2085 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_initModule(), IfxCcu6_PwmBc_initModule(), IfxCcu6_Timer_initModule(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_setT12CountMode()

IFX_INLINE void IfxCcu6_setT12CountMode | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_T12CountMode | mode
 | ) |  |
Parameters
ccu6 | Pointer to the base of CCU6 registers
mode | Operating mode of Timer 12
Returns
None

Definition at line 2079 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_initModule(), IfxCcu6_setT12Frequency(), IfxCcu6_Timer_initModule(), IfxCcu6_TimerWithTrigger_init(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_setT12Frequency()

IFX_EXTERN float32 IfxCcu6_setT12Frequency | ( | Ifx_CCU6 * | ccu6,
 |  | float32 | frequency,
 |  | Ifx_TimerValue | period,
 |  | IfxCcu6_T12CountMode | countMode
 | ) |  |

Sets the frequency and clock input of the Timer 12. Caution: If desired frequency cannot achieved (by successive divisions by 2) : Then the nearest frequency value is set ( >= desired value) The resulting frequency is captured in the handler element : CaptureFrequency.

Parameters
ccu6 | Pointer to the base of CCU6 registers
frequency | Requested timer frequency in Hz
period | period value to be configured
countMode | Counting mode of Timer12
Returns
Zero, if the function failed to fulfill requested frequency and resolution
Positive, if the function can find settings close to the requested frequency and resolution above the requested

Definition at line 337 of file IfxCcu6.c.

Referenced by IfxCcu6_Icu_initModule(), IfxCcu6_PwmBc_initModule(), IfxCcu6_Timer_initModule(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_setT12InputSignal()

IFX_EXTERN void IfxCcu6_setT12InputSignal | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_T12hr_In * | extInput
 | ) |  |

selects the actual input signal for the timer inputs.

Parameters
ccu6 | Pointer to the base of CCU6 registers
extInput | External input signal for the Timer 12
Returns
None

Definition at line 386 of file IfxCcu6.c.

Referenced by IfxCcu6_Icu_initModule(), IfxCcu6_Icu_startCapture(), IfxCcu6_initT12hrPin(), IfxCcu6_initT12hrPinWithPadLevel(), IfxCcu6_PwmBc_start(), IfxCcu6_Timer_initModule(), IfxCcu6_Timer_start(), IfxCcu6_Timer_startSingleShotMode(), IfxCcu6_TPwm_initModule(), and IfxCcu6_TPwm_start().

◆ IfxCcu6_setT12PeriodValue()

IFX_INLINE void IfxCcu6_setT12PeriodValue | ( | Ifx_CCU6 * | ccu6,
 |  | uint16 | value
 | ) |  |

Sets the period value that leads Timer12 counter value to a period-match.

Parameters
ccu6 | Pointer to the base of CCU6 registers
value | Period value
Returns
None

Definition at line 2091 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_initModule(), IfxCcu6_setT12Frequency(), IfxCcu6_Timer_initModule(), IfxCcu6_TimerWithTrigger_setPeriod(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_setT13CaptureCompareState()

IFX_EXTERN void IfxCcu6_setT13CaptureCompareState | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_CaptureCompareState | state
 | ) |  |

Sets software-control (independent set and clear conditions) for the Timer13 channel state bits CC63ST.

Parameters
ccu6 | Pointer to the base of CCU6 registers
state | capture/compare state selection (set / clear / toggle)
Returns
None

Definition at line 395 of file IfxCcu6.c.

◆ IfxCcu6_setT13CompareValue()

IFX_INLINE void IfxCcu6_setT13CompareValue | ( | Ifx_CCU6 * | ccu6,
 |  | uint16 | value
 | ) |  |

Sets the 16-bit compare value of Timer13 (writes into shadow register)

Parameters
ccu6 | Pointer to the base of CCU6 registers
value | Compare value
Returns
None

Definition at line 2097 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_setT13CounterValue()

IFX_INLINE void IfxCcu6_setT13CounterValue | ( | Ifx_CCU6 * | ccu6,
 |  | uint16 | value
 | ) |  |

Sets the 16-bit counter value of Timer13.

Parameters
ccu6 | Pointer to the base of CCU6 registers
value | counter value
Returns
None

Definition at line 2103 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), IfxCcu6_Timer_initModule(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_setT13Frequency()

IFX_EXTERN float32 IfxCcu6_setT13Frequency | ( | Ifx_CCU6 * | ccu6,
 |  | float32 | frequency,
 |  | Ifx_TimerValue | period
 | ) |  |

Sets the frequency and clock input of the Timer 13 Caution: If desired frequency cannot achieved (by successive divisions by 2) : Then the nearest frequency value is set ( >= desired value) The resulting frequency is captured in the handler element : captureFrequency.

Parameters
ccu6 | Pointer to the base of CCU6 registers
frequency | Requested timer frequency in Hz
period | period value to be configured
Returns
Zero, if the function failed to fulfill requested frequency and resolution
Positive, if the function can find settings close to the requested frequency and resolution above the requested
Return values
IfxCcu6_Stat_wrongPwmFreq if the T12 prescaler can't fulfill the required frequency

Definition at line 421 of file IfxCcu6.c.

Referenced by IfxCcu6_PwmBc_initModule(), IfxCcu6_Timer_initModule(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_setT13InputSignal()

IFX_EXTERN void IfxCcu6_setT13InputSignal | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_T13hr_In * | extInput
 | ) |  |

selects the actual input signal for the timer inputs.

Parameters
ccu6 | Pointer to the base of CCU6 registers
extInput | External input signal for the Timer 13
Returns
None

Definition at line 470 of file IfxCcu6.c.

Referenced by IfxCcu6_initT13hrPin(), IfxCcu6_initT13hrPinWithPadLevel(), IfxCcu6_PwmBc_start(), IfxCcu6_Timer_initModule(), IfxCcu6_Timer_start(), IfxCcu6_Timer_startSingleShotMode(), IfxCcu6_TPwm_initModule(), and IfxCcu6_TPwm_start().

◆ IfxCcu6_setT13PeriodValue()

IFX_INLINE void IfxCcu6_setT13PeriodValue | ( | Ifx_CCU6 * | ccu6,
 |  | uint16 | value
 | ) |  |

Sets the period value that leads Timer13 counter value to a period-match.

Parameters
ccu6 | Pointer to the base of CCU6 registers
value | period value
Returns
None

Definition at line 2109 of file IfxCcu6.h.

Referenced by IfxCcu6_setT13Frequency(), IfxCcu6_Timer_initModule(), IfxCcu6_TimerWithTrigger_init(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_setT13TriggerEventDirection()

IFX_INLINE void IfxCcu6_setT13TriggerEventDirection | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_T13TriggerDirection | direction
 | ) |  |

Sets the Timer13 trigger event direction.

Parameters
ccu6 | Pointer to the base of CCU6 registers
direction | T13 trigger event direction
Returns
None

Definition at line 2115 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), IfxCcu6_PwmBc_stop(), IfxCcu6_Timer_initModule(), IfxCcu6_Timer_stop(), IfxCcu6_TimerWithTrigger_init(), IfxCcu6_TPwm_initModule(), and IfxCcu6_TPwm_stop().

◆ IfxCcu6_setT13TriggerEventMode()

IFX_INLINE void IfxCcu6_setT13TriggerEventMode | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_T13TriggerEvent | mode
 | ) |  |

Sets the trigger event to start Timer13 (automatic set of T13R for synchronization to Timer12 compare signals)

Parameters
ccu6 | Pointer to the base of CCU6 registers
mode | The trigger event to start T13
Returns
None

Definition at line 2121 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), IfxCcu6_PwmBc_stop(), IfxCcu6_Timer_initModule(), IfxCcu6_Timer_stop(), IfxCcu6_TimerWithTrigger_init(), IfxCcu6_TPwm_initModule(), and IfxCcu6_TPwm_stop().

◆ IfxCcu6_setTrapMode()

IFX_INLINE void IfxCcu6_setTrapMode | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TrapMode | mode
 | ) |  |

Sets the mode of clearing the trap flag TRPF after the trap input condition is no longer valid.

Parameters
ccu6 | Pointer to the base of CCU6 registers
mode | Trap mode selection
Returns
None

Definition at line 2127 of file IfxCcu6.h.

◆ IfxCcu6_setTrapState()

IFX_INLINE void IfxCcu6_setTrapState | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TrapState | state
 | ) |  |

Sets behaviour of the selected outputs when leaving the trap state after the trap condition has become inactive again.

Parameters
ccu6 | Pointer to the base of CCU6 registers
state | Trap state selection
Returns
None

Definition at line 2133 of file IfxCcu6.h.

◆ IfxCcu6_startTimer()

IFX_INLINE void IfxCcu6_startTimer | ( | Ifx_CCU6 * | ccu6,
 |  | boolean | t12,
 |  | boolean | t13
 | ) |  |

starts the timers (T12, T13 individually or together based on the selection)

Parameters
ccu6 | Pointer to the base of CCU6 registers
t12 | Timer12 start choice (enable / disable)
t13 | Timer13 start choice (enable / disable)
Returns
None

Definition at line 2140 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_startCapture(), IfxCcu6_PwmBc_start(), IfxCcu6_Timer_start(), IfxCcu6_Timer_startSingleShotMode(), IfxCcu6_Timer_synchronousStart(), IfxCcu6_TimerWithTrigger_run(), and IfxCcu6_TPwm_start().

◆ IfxCcu6_stopTimer()

IFX_INLINE void IfxCcu6_stopTimer | ( | Ifx_CCU6 * | ccu6,
 |  | boolean | t12,
 |  | boolean | t13
 | ) |  |

starts the timers (T12, T13 individually or together based on the selection)

Parameters
ccu6 | Pointer to the base of CCU6 registers
t12 | Timer12 stop choice (enable / disable)
t13 | Timer13 stop choice (enable / disable)
Returns
None

Definition at line 2150 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_stopCapture(), IfxCcu6_PwmBc_stop(), IfxCcu6_Timer_stop(), IfxCcu6_Timer_synchronousStop(), IfxCcu6_TimerWithTrigger_stop(), and IfxCcu6_TPwm_stop().

◆ IfxCcu6_updateHallPattern()

IFX_INLINE void IfxCcu6_updateHallPattern | ( | Ifx_CCU6 * | ccu6,
 |  | uint8 | currentHall,
 |  | uint8 | expectedHall,
 |  | uint8 | output
 | ) |  |

Updates the hall pattern (current hall, expected hall, moduleation output), in a single write.

Parameters
ccu6 | Pointer to the base of CCU6 registers
currentHall | Current hall pattern
expectedHall | Expected hall pattern
output | Output pattern for the multichannel mode.
Returns
None

Definition at line 2160 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_updateHallPattern().


iLLD_TC38A: Utility Functions

Functions
Utility Functions
iLLD » CCU6 » Standard Driver
Collaboration diagram for Utility Functions:

Functions

IFX_INLINE boolean | IfxCcu6_getDeadTimeStatus (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Indicate the status of the dead time generation for each compare channel (0, 1, 2) of timer T12. More...
IFX_INLINE boolean | IfxCcu6_getHallPatternSampleState (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the value of the input Hall pattern of the Timer12 capture/compare channels CC6POS6x (x = 0, 1, 2)
that has been compared to the current and expected value. More...
IFX_INLINE boolean | IfxCcu6_getInterruptStatusFlag (Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Gets the status of the selected interrupt flag. More...
IFX_INLINE boolean | IfxCcu6_getMultiChannelModeAvailabilityStatus (Ifx_CCU6 *ccu6)
indicates if the multi-channel mode functionality is available More...
IFX_INLINE boolean | IfxCcu6_getMultiChannelPWMPatternShadowTransferStatus (Ifx_CCU6 *ccu6)
Gets the status of the shadow transfer request from MCMPS to MCMP. More...
IFX_INLINE boolean | IfxCcu6_getShadowTransferStatus (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Returns the Timer (T12 / T13) shadow transfer enable status. More...
IFX_INLINE boolean | IfxCcu6_getT12CaptureCompareState (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the state of the Timer12 capture/compare channels CC6xST (x = 0, 1, 2) More...
IFX_INLINE IfxCcu6_T12CountDirection | IfxCcu6_getT12CountDirection (Ifx_CCU6 *ccu6)
Returns the current counting direction of Timer12. More...
IFX_INLINE boolean | IfxCcu6_getT13CaptureCompareState (Ifx_CCU6 *ccu6)
Returns the state of the Timer13 capture/compare channel CC63ST. More...
IFX_INLINE boolean | IfxCcu6_getTimerAvailabilityStatus (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
indicates the Timer blocks (T12 / T13) availability More...
IFX_INLINE IfxCcu6_TimerRunStatus | IfxCcu6_getTimerRunStatus (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Returns the Timer (T12 / T13) run status. More...
IFX_INLINE boolean | IfxCcu6_isModuleSuspended (Ifx_CCU6 *ccu6)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxCcu6_setSuspendMode (Ifx_CCU6 *ccu6, IfxCcu6_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN Ifx_CCU6 * | IfxCcu6_getAddress (IfxCcu6_Index ccu6)
Returns the module index of the selected CCU6 module. More...
IFX_EXTERN uint32 | IfxCcu6_getCaptureRegisterValue (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the capture register value of the selected channel. More...
IFX_EXTERN uint32 | IfxCcu6_getCaptureShadowRegisterValue (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the capture shadow register value of the selected channel. More...
IFX_EXTERN IfxCcu6_Index | IfxCcu6_getIndex (Ifx_CCU6 *ccu6)
Returns CCU6 index. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxCcu6_getSrcAddress (Ifx_CCU6 *ccu6, IfxCcu6_ServiceRequest serviceRequest)
Returns the service request register. More...
IFX_EXTERN uint32 | IfxCcu6_readTimer (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Returns the current value of the timer register. More...

Detailed Description

Function Documentation

◆ IfxCcu6_getAddress()

IFX_EXTERN Ifx_CCU6* IfxCcu6_getAddress ( IfxCcu6_Index ccu6 )

Returns the module index of the selected CCU6 module.

Parameters
ccu6 Pointer to CCU6 module registers
Returns
CCU6 module register address

Definition at line 158 of file IfxCcu6.c.

◆ IfxCcu6_getCaptureRegisterValue()

IFX_EXTERN uint32 IfxCcu6_getCaptureRegisterValue | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_T12Channel | channel
 | ) |  |

Returns the capture register value of the selected channel.

Parameters
ccu6 | Pointer to the base of CCU6 registers
channel | Timer12 Capture compare channel number
Returns
current value of the capture register of a selected channel

Definition at line 175 of file IfxCcu6.c.

Referenced by IfxCcu6_PwmBc_getMotorSpeed().

◆ IfxCcu6_getCaptureShadowRegisterValue()

IFX_EXTERN uint32 IfxCcu6_getCaptureShadowRegisterValue | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_T12Channel | channel
 | ) |  |

Returns the capture shadow register value of the selected channel.

Parameters
ccu6 | Pointer to the base of CCU6 registers
channel | Timer12 Capture compare channel number
Returns
current value of the capture shadow register of a selected channel

Definition at line 181 of file IfxCcu6.c.

Referenced by IfxCcu6_Icu_getTimeStamp(), and IfxCcu6_PwmBc_getMotorSpeed().

◆ IfxCcu6_getDeadTimeStatus()

IFX_INLINE boolean IfxCcu6_getDeadTimeStatus | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_T12Channel | channel
 | ) |  |

Indicate the status of the dead time generation for each compare channel (0, 1, 2) of timer T12.

Parameters
ccu6 | Pointer to the base of CCU6 registers
channel | Timer12 Capture compare channel number
Returns
Status TRUE or FALSE

Definition at line 1647 of file IfxCcu6.h.

◆ IfxCcu6_getHallPatternSampleState()

IFX_INLINE boolean IfxCcu6_getHallPatternSampleState | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_T12Channel | channel
 | ) |  |

Returns the value of the input Hall pattern of the Timer12 capture/compare channels CC6POS6x (x = 0, 1, 2)
that has been compared to the current and expected value.

Parameters
ccu6 | Pointer to the base of CCU6 registers
channel | Timer12 Capture compare channel number
Returns
Status
TRUE : The input CCPOSx has been sampled as 0
FALSE : The input CCPOSx has been sampled as 1

Definition at line 1655 of file IfxCcu6.h.

◆ IfxCcu6_getIndex()

IFX_EXTERN IfxCcu6_Index IfxCcu6_getIndex ( Ifx_CCU6 * ccu6 )

Returns CCU6 index.

Parameters
ccu6 Specifies the pointer to the base of CCU6 registers
Returns
Returns index. returns -1 in case of unknown index

Definition at line 187 of file IfxCcu6.c.

Referenced by IfxCcu6_getSrcAddress().

◆ IfxCcu6_getInterruptStatusFlag()

IFX_INLINE boolean IfxCcu6_getInterruptStatusFlag | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_InterruptSource | source
 | ) |  |

Gets the status of the selected interrupt flag.

Parameters
ccu6 | Pointer to the base of CCU6 registers
source | Interrupt source selection
Returns
Status (TRUE / FALSE)

Definition at line 1663 of file IfxCcu6.h.

◆ IfxCcu6_getMultiChannelModeAvailabilityStatus()

IFX_INLINE boolean IfxCcu6_getMultiChannelModeAvailabilityStatus ( Ifx_CCU6 * ccu6 )

indicates if the multi-channel mode functionality is available

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
Status (TRUE / FALSE)

Definition at line 1670 of file IfxCcu6.h.

◆ IfxCcu6_getMultiChannelPWMPatternShadowTransferStatus()

IFX_INLINE boolean IfxCcu6_getMultiChannelPWMPatternShadowTransferStatus ( Ifx_CCU6 * ccu6 )

Gets the status of the shadow transfer request from MCMPS to MCMP.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
Status
FALSE: A shadow transfer MCM_ST is not requested
TRUE: A shadow transfer MCM_ST is requested, but has not yet been executed

Definition at line 1676 of file IfxCcu6.h.

◆ IfxCcu6_getShadowTransferStatus()

IFX_INLINE boolean IfxCcu6_getShadowTransferStatus | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TimerId | timer
 | ) |  |

Returns the Timer (T12 / T13) shadow transfer enable status.

Parameters
ccu6 | Pointer to the base of CCU6 registers
timer | Timer selection, ( Timer12 / Timer13 )
Returns
Status (TRUE: enable / FALSE: disable)

Definition at line 1682 of file IfxCcu6.h.

◆ IfxCcu6_getSrcAddress()

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxCcu6_getSrcAddress | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_ServiceRequest | serviceRequest
 | ) |  |

Returns the service request register.

Parameters
ccu6 | Specifies Ccu6 module
serviceRequest | Selection of service request outputs
Returns
The service request register

Definition at line 207 of file IfxCcu6.c.

Referenced by IfxCcu6_Icu_initChannel(), IfxCcu6_PwmBc_initModule(), IfxCcu6_Timer_initModule(), IfxCcu6_TimerWithTrigger_init(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_getT12CaptureCompareState()

IFX_INLINE boolean IfxCcu6_getT12CaptureCompareState | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_T12Channel | channel
 | ) |  |

Returns the state of the Timer12 capture/compare channels CC6xST (x = 0, 1, 2)

Parameters
ccu6 | Pointer to the base of CCU6 registers
channel | Timer12 Capture compare channel number
Returns
Status TRUE or FALSE

Definition at line 1690 of file IfxCcu6.h.

◆ IfxCcu6_getT12CountDirection()

IFX_INLINE IfxCcu6_T12CountDirection IfxCcu6_getT12CountDirection ( Ifx_CCU6 * ccu6 )

Returns the current counting direction of Timer12.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
direction (up / down)

Definition at line 1697 of file IfxCcu6.h.

◆ IfxCcu6_getT13CaptureCompareState()

IFX_INLINE boolean IfxCcu6_getT13CaptureCompareState ( Ifx_CCU6 * ccu6 )

Returns the state of the Timer13 capture/compare channel CC63ST.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
Status TRUE or FALSE

Definition at line 1709 of file IfxCcu6.h.

◆ IfxCcu6_getTimerAvailabilityStatus()

IFX_INLINE boolean IfxCcu6_getTimerAvailabilityStatus | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TimerId | timer
 | ) |  |

indicates the Timer blocks (T12 / T13) availability

Parameters
ccu6 | Pointer to the base of CCU6 registers
timer | Timer selection, ( Timer12 / Timer13 )
Returns
Status (TRUE / FALSE)

Definition at line 1715 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_initModule(), IfxCcu6_PwmBc_initModule(), IfxCcu6_Timer_initModule(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_getTimerRunStatus()

IFX_INLINE IfxCcu6_TimerRunStatus IfxCcu6_getTimerRunStatus | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TimerId | timer
 | ) |  |

Returns the Timer (T12 / T13) run status.

Parameters
ccu6 | Pointer to the base of CCU6 registers
timer | Timer selection, ( Timer12 / Timer13 )
Returns
Status (stopped / running)

Definition at line 1722 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_startCapture().

◆ IfxCcu6_isModuleSuspended()

IFX_INLINE boolean IfxCcu6_isModuleSuspended ( Ifx_CCU6 * ccu6 )

Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended.

Parameters
ccu6 Pointer to CCU6 module registers
Returns
Suspend status (TRUE / FALSE)

Definition at line 1920 of file IfxCcu6.h.

◆ IfxCcu6_readTimer()

IFX_EXTERN uint32 IfxCcu6_readTimer | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TimerId | timer
 | ) |  |

Returns the current value of the timer register.

Parameters
ccu6 | Pointer to the base of CCU6 registers
timer | Timer selection, ( Timer12 / Timer13 )
Returns
current value of the timer register

Definition at line 218 of file IfxCcu6.c.

◆ IfxCcu6_setSuspendMode()

IFX_INLINE void IfxCcu6_setSuspendMode | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_SuspendMode | mode
 | ) |  |

Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.

Parameters
ccu6 | Pointer to CCU6 module registers
mode | Module suspend mode
Returns
None

Definition at line 2060 of file IfxCcu6.h.


iLLD_TC38A: Configuration Functions

Functions
Configuration Functions
iLLD » CCU6 » Standard Driver
Collaboration diagram for Configuration Functions:

Functions

IFX_INLINE void | IfxCcu6_clearAllInterruptStatusFlags (Ifx_CCU6 *ccu6)
Clears all Interrupt flags. More...
IFX_INLINE void | IfxCcu6_disableAdditionalPrescaler (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Disables the additional prescaler of 1/256 can be enabled for the prescaler of T12 or T13 to support higher clock frequencies. More...
IFX_INLINE void | IfxCcu6_disableDeadTime (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Disables the dead time generation for each compare channel (0, 1, 2) of Timer12. More...
IFX_INLINE void | IfxCcu6_disableDelayBypass (Ifx_CCU6 *ccu6)
Disables the delay of the source signal for the sampling of the Hall input pattern (selected by HSYNC) More...
IFX_INLINE void | IfxCcu6_disableInterrupt (Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Disables the selected interrupt. More...
IFX_INLINE void | IfxCcu6_disableMultiChannelMode (Ifx_CCU6 *ccu6)
Sets multi channel mode unavailable, A write access to MCMOUTS is ignored. More...
IFX_INLINE void | IfxCcu6_disableShadowTransfer (Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Disables shadow transfers of the timers (T12, T13 individually or together based on the selection) More...
IFX_INLINE void | IfxCcu6_disableSingleShotMode (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Disables the single shot-mode of Timers (T12 T13). More...
IFX_INLINE void | IfxCcu6_disableT13InvertedModulation (Ifx_CCU6 *ccu6)
Disables the Inversion of T13 signal for the modulation of the CC6x and COUT6x (x = 0, 1, 2) signals
T13 output CC63_O is equal to CC63ST. More...
IFX_INLINE void | IfxCcu6_disableTimer (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Sets Timer12 block unavailable, A write access to T12PR is ignored. More...
IFX_INLINE void | IfxCcu6_disableTrap (Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut)
Disables the trap functionality for the corresponding output signals. More...
IFX_INLINE void | IfxCcu6_disableTrapPin (Ifx_CCU6 *ccu6)
Disables the input (pin) function for the trap generation. More...
IFX_INLINE void | IfxCcu6_enableAdditionalPrescaler (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Enables the additional prescaler of 1/256 can be enabled for the prescaler of T12 or T13 to support higher clock frequencies. More...
IFX_INLINE void | IfxCcu6_enableCountEvent (Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Sets the single shot-mode of Timers (T12, T13). More...
IFX_INLINE void | IfxCcu6_enableDeadTime (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Enables the dead time generation for each compare channel (0, 1, 2) of Timer12. More...
IFX_INLINE void | IfxCcu6_enableDelayBypass (Ifx_CCU6 *ccu6)
Enables the delay of the source signal for the sampling of the Hall input pattern (selected by HSYNC) by the Dead-Time Counter 0. More...
IFX_INLINE void | IfxCcu6_enableHallPatternShadowTransfer (Ifx_CCU6 *ccu6)
Sets HP_ST immediately to update bit fields EXPH and CURH by EXPHS and CURHS. More...
IFX_INLINE void | IfxCcu6_enableInterrupt (Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Enables the selected interrupt. More...
IFX_INLINE void | IfxCcu6_enableMultiChannelMode (Ifx_CCU6 *ccu6)
Sets multi channel mode available, A write access to MCMOUTS is executed. More...
IFX_INLINE void | IfxCcu6_enableMultiChannelModeAvailability (Ifx_CCU6 *ccu6)
Enables the Multi Channel Mode Availability. More...
IFX_INLINE void | IfxCcu6_enableMultiChannelPwmPatternShadowTransfer (Ifx_CCU6 *ccu6)
Sets MCM_ST immediately to update bit field MCMP by the value of MCMPS. More...
IFX_INLINE void | IfxCcu6_enableMultiChannelT12DowncountingShadowTransfer (Ifx_CCU6 *ccu6)
Enables the shadow transfer T12_ST if flag MCMOUT.R is set or
becomes set while a T12 one match is detected while counting down. More...
IFX_INLINE void | IfxCcu6_enableMultiChannelT12UpcountingShadowTransfer (Ifx_CCU6 *ccu6)
Enables the shadow transfer T12_ST if flag MCMOUT.R is set or
becomes set while a T12 period match is detected while counting up. More...
IFX_INLINE void | IfxCcu6_enableMultiChannelT13UpcountingShadowTransfer (Ifx_CCU6 *ccu6)
Enables the shadow transfer T13_ST if flag MCMOUT.R is set or
becomes set while a T13 period match is detected. More...
IFX_INLINE void | IfxCcu6_enableShadowTransfer (Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Enables shadow transfers of the timers (T12, T13 individually or together based on the selection) More...
IFX_INLINE void | IfxCcu6_enableSingleShotMode (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Enables the single shot-mode of Timers (T12 T13). More...
IFX_INLINE void | IfxCcu6_enableT13InvertedModulation (Ifx_CCU6 *ccu6)
Enables the Inversion of T13 signal for the modulation of the CC6x and COUT6x (x = 0, 1, 2) signals
T13 output CC63_O is equal to CC63ST. More...
IFX_INLINE void | IfxCcu6_enableTimer (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Sets Timer12 block available, A write access to T12PR is executed. More...
IFX_INLINE void | IfxCcu6_enableTrap (Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut)
Enables the trap functionality for the corresponding output signals. More...
IFX_INLINE void | IfxCcu6_enableTrapPin (Ifx_CCU6 *ccu6)
Enables the input (pin) function for the trap generation. More...
IFX_INLINE void | IfxCcu6_setCaptureCompareInputSignal (Ifx_CCU6 *ccu6, IfxCcu6_CaptureCompareInput input, IfxCcu6_CaptureCompareInputSignal signal)
selects the actual input signal for the capture compare inputs. More...
IFX_EXTERN void | IfxCcu6_disableModulationOutput (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut)
Disables the modulation of the corresponding output signal by PWM pattern generated by the timers T12 and T13. More...
IFX_EXTERN void | IfxCcu6_disableModule (Ifx_CCU6 *ccu6)
Disables the selected CCU6 kernel. More...
IFX_EXTERN void | IfxCcu6_enableModulationOutput (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut)
Enables the modulation of the corresponding output signal by PWM pattern generated by the timers T12 and T13. More...
IFX_EXTERN void | IfxCcu6_enableModule (Ifx_CCU6 *ccu6)
Enables the selected CCU6 kernel. More...

Detailed Description

Function Documentation

◆ IfxCcu6_clearAllInterruptStatusFlags()

IFX_INLINE void IfxCcu6_clearAllInterruptStatusFlags ( Ifx_CCU6 * ccu6 )

Clears all Interrupt flags.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1396 of file IfxCcu6.h.

◆ IfxCcu6_disableAdditionalPrescaler()

IFX_INLINE void IfxCcu6_disableAdditionalPrescaler | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TimerId | timer
 | ) |  |

Disables the additional prescaler of 1/256 can be enabled for the prescaler of T12 or T13 to support higher clock frequencies.

Parameters
ccu6 | Pointer to the base of CCU6 registers
timer | Timer selection, ( Timer12 / Timer13 )
Returns
None

Definition at line 1443 of file IfxCcu6.h.

◆ IfxCcu6_disableDeadTime()

IFX_INLINE void IfxCcu6_disableDeadTime | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_T12Channel | channel
 | ) |  |

Disables the dead time generation for each compare channel (0, 1, 2) of Timer12.

Parameters
ccu6 | Pointer to the base of CCU6 registers
channel | Timer12 Capture compare channel number
Returns
None

Definition at line 1451 of file IfxCcu6.h.

◆ IfxCcu6_disableDelayBypass()

IFX_INLINE void IfxCcu6_disableDelayBypass ( Ifx_CCU6 * ccu6 )

Disables the delay of the source signal for the sampling of the Hall input pattern (selected by HSYNC)

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1459 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule().

◆ IfxCcu6_disableInterrupt()

IFX_INLINE void IfxCcu6_disableInterrupt | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_InterruptSource | source
 | ) |  |

Disables the selected interrupt.

Parameters
ccu6 | Pointer to the base of CCU6 registers
source | Interrupt source selection
Returns
None

Definition at line 1465 of file IfxCcu6.h.

◆ IfxCcu6_disableModulationOutput()

IFX_EXTERN void IfxCcu6_disableModulationOutput | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TimerId | timer,
 |  | IfxCcu6_ChannelOut | channelOut
 | ) |  |

Disables the modulation of the corresponding output signal by PWM pattern generated by the timers T12 and T13.

Parameters
ccu6 | Pointer to the base of CCU6 registers
timer | Timer selection, ( Timer12 / Timer13 )
channelOut | Capture compare output selection
Returns
None

Definition at line 70 of file IfxCcu6.c.

Referenced by IfxCcu6_PwmBc_stop(), IfxCcu6_TPwm_pause(), and IfxCcu6_TPwm_stop().

◆ IfxCcu6_disableModule()

IFX_EXTERN void IfxCcu6_disableModule ( Ifx_CCU6 * ccu6 )

Disables the selected CCU6 kernel.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 101 of file IfxCcu6.c.

◆ IfxCcu6_disableMultiChannelMode()

IFX_INLINE void IfxCcu6_disableMultiChannelMode ( Ifx_CCU6 * ccu6 )

Sets multi channel mode unavailable, A write access to MCMOUTS is ignored.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1472 of file IfxCcu6.h.

◆ IfxCcu6_disableShadowTransfer()

IFX_INLINE void IfxCcu6_disableShadowTransfer | ( | Ifx_CCU6 * | ccu6,
 |  | boolean | t12,
 |  | boolean | t13
 | ) |  |

Disables shadow transfers of the timers (T12, T13 individually or together based on the selection)

Parameters
ccu6 | Pointer to the base of CCU6 registers
t12 | Timer12 choice (enable / disable)
t13 | Timer13 choice (enable / disable)
Returns
None

Definition at line 1478 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_stopCapture(), IfxCcu6_PwmBc_stop(), IfxCcu6_Timer_stop(), IfxCcu6_Timer_synchronousStop(), and IfxCcu6_TPwm_stop().

◆ IfxCcu6_disableSingleShotMode()

IFX_INLINE void IfxCcu6_disableSingleShotMode | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TimerId | timer
 | ) |  |

Disables the single shot-mode of Timers (T12 T13).

Parameters
ccu6 | Pointer to the base of CCU6 registers
timer | Timer selection, ( Timer12 / Timer13 )
Returns
None

Definition at line 1488 of file IfxCcu6.h.

Referenced by IfxCcu6_TimerWithTrigger_setSingleMode().

◆ IfxCcu6_disableT13InvertedModulation()

IFX_INLINE void IfxCcu6_disableT13InvertedModulation ( Ifx_CCU6 * ccu6 )

Disables the Inversion of T13 signal for the modulation of the CC6x and COUT6x (x = 0, 1, 2) signals
T13 output CC63_O is equal to CC63ST.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1495 of file IfxCcu6.h.

◆ IfxCcu6_disableTimer()

IFX_INLINE void IfxCcu6_disableTimer | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TimerId | timer
 | ) |  |

Sets Timer12 block unavailable, A write access to T12PR is ignored.

Parameters
ccu6 | Pointer to the base of CCU6 registers
timer | Timer selection, ( Timer12 / Timer13 )
Returns
None

Definition at line 1501 of file IfxCcu6.h.

◆ IfxCcu6_disableTrap()

IFX_INLINE void IfxCcu6_disableTrap | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_ChannelOut | channelOut
 | ) |  |

Disables the trap functionality for the corresponding output signals.

Parameters
ccu6 | Pointer to the base of CCU6 registers
channelOut | Capture compare output selection
Returns
None

Definition at line 1508 of file IfxCcu6.h.

◆ IfxCcu6_disableTrapPin()

IFX_INLINE void IfxCcu6_disableTrapPin ( Ifx_CCU6 * ccu6 )

Disables the input (pin) function for the trap generation.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1516 of file IfxCcu6.h.

◆ IfxCcu6_enableAdditionalPrescaler()

IFX_INLINE void IfxCcu6_enableAdditionalPrescaler | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TimerId | timer
 | ) |  |

Enables the additional prescaler of 1/256 can be enabled for the prescaler of T12 or T13 to support higher clock frequencies.

Parameters
ccu6 | Pointer to the base of CCU6 registers
timer | Timer selection, ( Timer12 / Timer13 )
Returns
None

Definition at line 1522 of file IfxCcu6.h.

Referenced by IfxCcu6_setT12Frequency(), and IfxCcu6_setT13Frequency().

◆ IfxCcu6_enableCountEvent()

IFX_INLINE void IfxCcu6_enableCountEvent | ( | Ifx_CCU6 * | ccu6,
 |  | boolean | t12,
 |  | boolean | t13
 | ) |  |

Sets the single shot-mode of Timers (T12, T13).

Parameters
ccu6 | Pointer to the base of CCU6 registers
t12 | Timer12 choice (enable / disable)
t13 | Timer13 choice (enable / disable)
Returns
None

Definition at line 1530 of file IfxCcu6.h.

Referenced by IfxCcu6_Timer_countOneStep().

◆ IfxCcu6_enableDeadTime()

IFX_INLINE void IfxCcu6_enableDeadTime | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_T12Channel | channel
 | ) |  |

Enables the dead time generation for each compare channel (0, 1, 2) of Timer12.

Parameters
ccu6 | Pointer to the base of CCU6 registers
channel | Timer12 Capture compare channel number
Returns
None

Definition at line 1540 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), IfxCcu6_PwmHl_init(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_enableDelayBypass()

IFX_INLINE void IfxCcu6_enableDelayBypass ( Ifx_CCU6 * ccu6 )

Enables the delay of the source signal for the sampling of the Hall input pattern (selected by HSYNC) by the Dead-Time Counter 0.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1548 of file IfxCcu6.h.

◆ IfxCcu6_enableHallPatternShadowTransfer()

IFX_INLINE void IfxCcu6_enableHallPatternShadowTransfer ( Ifx_CCU6 * ccu6 )

Sets HP_ST immediately to update bit fields EXPH and CURH by EXPHS and CURHS.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1554 of file IfxCcu6.h.

◆ IfxCcu6_enableInterrupt()

IFX_INLINE void IfxCcu6_enableInterrupt | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_InterruptSource | source
 | ) |  |

Enables the selected interrupt.

Parameters
ccu6 | Pointer to the base of CCU6 registers
source | Interrupt source selection
Returns
None

Definition at line 1560 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_initChannel(), IfxCcu6_PwmBc_initModule(), IfxCcu6_Timer_initModule(), IfxCcu6_TimerWithTrigger_init(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_enableModulationOutput()

IFX_EXTERN void IfxCcu6_enableModulationOutput | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TimerId | timer,
 |  | IfxCcu6_ChannelOut | channelOut
 | ) |  |

Enables the modulation of the corresponding output signal by PWM pattern generated by the timers T12 and T13.

Parameters
ccu6 | Pointer to the base of CCU6 registers
timer | Timer selection, ( Timer12 / Timer13 )
channelOut | Capture compare output selection
Returns
None

Definition at line 114 of file IfxCcu6.c.

Referenced by IfxCcu6_PwmBc_initModule(), IfxCcu6_TimerWithTrigger_init(), IfxCcu6_TPwm_initModule(), and IfxCcu6_TPwm_resume().

◆ IfxCcu6_enableModule()

IFX_EXTERN void IfxCcu6_enableModule ( Ifx_CCU6 * ccu6 )

Enables the selected CCU6 kernel.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 145 of file IfxCcu6.c.

Referenced by IfxCcu6_Icu_initModule(), IfxCcu6_PwmBc_initModule(), IfxCcu6_Timer_initModule(), IfxCcu6_TimerWithTrigger_init(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_enableMultiChannelMode()

IFX_INLINE void IfxCcu6_enableMultiChannelMode ( Ifx_CCU6 * ccu6 )

Sets multi channel mode available, A write access to MCMOUTS is executed.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1567 of file IfxCcu6.h.

◆ IfxCcu6_enableMultiChannelModeAvailability()

IFX_INLINE void IfxCcu6_enableMultiChannelModeAvailability ( Ifx_CCU6 * ccu6 )

Enables the Multi Channel Mode Availability.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1573 of file IfxCcu6.h.

◆ IfxCcu6_enableMultiChannelPwmPatternShadowTransfer()

IFX_INLINE void IfxCcu6_enableMultiChannelPwmPatternShadowTransfer ( Ifx_CCU6 * ccu6 )

Sets MCM_ST immediately to update bit field MCMP by the value of MCMPS.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1579 of file IfxCcu6.h.

◆ IfxCcu6_enableMultiChannelT12DowncountingShadowTransfer()

IFX_INLINE void IfxCcu6_enableMultiChannelT12DowncountingShadowTransfer ( Ifx_CCU6 * ccu6 )

Enables the shadow transfer T12_ST if flag MCMOUT.R is set or
becomes set while a T12 one match is detected while counting down.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1585 of file IfxCcu6.h.

◆ IfxCcu6_enableMultiChannelT12UpcountingShadowTransfer()

IFX_INLINE void IfxCcu6_enableMultiChannelT12UpcountingShadowTransfer ( Ifx_CCU6 * ccu6 )

Enables the shadow transfer T12_ST if flag MCMOUT.R is set or
becomes set while a T12 period match is detected while counting up.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1591 of file IfxCcu6.h.

◆ IfxCcu6_enableMultiChannelT13UpcountingShadowTransfer()

IFX_INLINE void IfxCcu6_enableMultiChannelT13UpcountingShadowTransfer ( Ifx_CCU6 * ccu6 )

Enables the shadow transfer T13_ST if flag MCMOUT.R is set or
becomes set while a T13 period match is detected.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1597 of file IfxCcu6.h.

◆ IfxCcu6_enableShadowTransfer()

IFX_INLINE void IfxCcu6_enableShadowTransfer | ( | Ifx_CCU6 * | ccu6,
 |  | boolean | t12,
 |  | boolean | t13
 | ) |  |

Enables shadow transfers of the timers (T12, T13 individually or together based on the selection)

Parameters
ccu6 | Pointer to the base of CCU6 registers
t12 | Timer12 choice (enable / disable)
t13 | Timer13 choice (enable / disable)
Returns
None

Definition at line 1603 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_startCapture(), IfxCcu6_PwmBc_start(), IfxCcu6_setT12Frequency(), IfxCcu6_setT13Frequency(), IfxCcu6_Timer_countOneStep(), IfxCcu6_Timer_start(), IfxCcu6_Timer_startSingleShotMode(), IfxCcu6_Timer_synchronousStart(), IfxCcu6_TimerWithTrigger_applyUpdate(), and IfxCcu6_TPwm_start().

◆ IfxCcu6_enableSingleShotMode()

IFX_INLINE void IfxCcu6_enableSingleShotMode | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TimerId | timer
 | ) |  |

Enables the single shot-mode of Timers (T12 T13).

Parameters
ccu6 | Pointer to the base of CCU6 registers
timer | Timer selection, ( Timer12 / Timer13 )
Returns
None

Definition at line 1613 of file IfxCcu6.h.

Referenced by IfxCcu6_Timer_startSingleShotMode(), and IfxCcu6_TimerWithTrigger_setSingleMode().

◆ IfxCcu6_enableT13InvertedModulation()

IFX_INLINE void IfxCcu6_enableT13InvertedModulation ( Ifx_CCU6 * ccu6 )

Enables the Inversion of T13 signal for the modulation of the CC6x and COUT6x (x = 0, 1, 2) signals
T13 output CC63_O is equal to CC63ST.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1620 of file IfxCcu6.h.

◆ IfxCcu6_enableTimer()

IFX_INLINE void IfxCcu6_enableTimer | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TimerId | timer
 | ) |  |

Sets Timer12 block available, A write access to T12PR is executed.

Parameters
ccu6 | Pointer to the base of CCU6 registers
timer | Timer selection, ( Timer12 / Timer13 )
Returns
None

Definition at line 1626 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_initModule(), IfxCcu6_PwmBc_initModule(), IfxCcu6_Timer_initModule(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_enableTrap()

IFX_INLINE void IfxCcu6_enableTrap | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_ChannelOut | channelOut
 | ) |  |

Enables the trap functionality for the corresponding output signals.

Parameters
ccu6 | Pointer to the base of CCU6 registers
channelOut | Capture compare output selection
Returns
None

Definition at line 1633 of file IfxCcu6.h.

◆ IfxCcu6_enableTrapPin()

IFX_INLINE void IfxCcu6_enableTrapPin ( Ifx_CCU6 * ccu6 )

Enables the input (pin) function for the trap generation.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1641 of file IfxCcu6.h.

◆ IfxCcu6_setCaptureCompareInputSignal()

IFX_INLINE void IfxCcu6_setCaptureCompareInputSignal | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_CaptureCompareInput | input,
 |  | IfxCcu6_CaptureCompareInputSignal | signal
 | ) |  |

selects the actual input signal for the capture compare inputs.

Parameters
ccu6 | Pointer to the base of CCU6 registers
input | Input selection, ( CC6x capture input / CTRAP input / CCPOSx input )
signal | selection of actual input signal for the module inputs
Returns
None

Definition at line 1950 of file IfxCcu6.h.

Referenced by IfxCcu6_initCc60InPin(), IfxCcu6_initCc60InPinWithPadLevel(), IfxCcu6_initCc61InPin(), IfxCcu6_initCc61InPinWithPadLevel(), IfxCcu6_initCc62InPin(), IfxCcu6_initCc62InPinWithPadLevel(), IfxCcu6_initCcpos0Pin(), IfxCcu6_initCcpos0PinWithPadLevel(), IfxCcu6_initCcpos1Pin(), IfxCcu6_initCcpos1PinWithPadLevel(), IfxCcu6_initCcpos2Pin(), IfxCcu6_initCcpos2PinWithPadLevel(), IfxCcu6_initCtrapPin(), and IfxCcu6_initCtrapPinWithPadLevel().


iLLD_TC38A: IO Pin Configuration Functions

Functions
IO Pin Configuration Functions
iLLD » CCU6 » Standard Driver
Collaboration diagram for IO Pin Configuration Functions:

Functions

IFX_INLINE void | IfxCcu6_initCc60InPin (const IfxCcu6_Cc60in_In *cc60In, IfxPort_InputMode inputMode)
Initialises a CC60 input pin. More...
IFX_INLINE void | IfxCcu6_initCc60OutPin (const IfxCcu6_Cc60_Out *cc60Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC60 output pin. More...
IFX_INLINE void | IfxCcu6_initCc61InPin (const IfxCcu6_Cc61in_In *cc61In, IfxPort_InputMode inputMode)
Initialises a CC61 input pin. More...
IFX_INLINE void | IfxCcu6_initCc61OutPin (const IfxCcu6_Cc61_Out *cc61Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC61 output pin. More...
IFX_INLINE void | IfxCcu6_initCc62InPin (const IfxCcu6_Cc62in_In *cc62In, IfxPort_InputMode inputMode)
Initialises a CC62 input pin. More...
IFX_INLINE void | IfxCcu6_initCc62OutPin (const IfxCcu6_Cc62_Out *cc62Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC62 output pin. More...
IFX_INLINE void | IfxCcu6_initCcpos0Pin (const IfxCcu6_Ccpos0_In *ccpos0, IfxPort_InputMode inputMode)
Initialises a CCPOS0 input pin. More...
IFX_INLINE void | IfxCcu6_initCcpos1Pin (const IfxCcu6_Ccpos1_In *ccpos1, IfxPort_InputMode inputMode)
Initialises a CCPOS1 input pin. More...
IFX_INLINE void | IfxCcu6_initCcpos2Pin (const IfxCcu6_Ccpos2_In *ccpos2, IfxPort_InputMode inputMode)
Initialises a CCPOS0 input pin. More...
IFX_INLINE void | IfxCcu6_initCout60Pin (const IfxCcu6_Cout60_Out *cout60, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT60 output pin. More...
IFX_INLINE void | IfxCcu6_initCout61Pin (const IfxCcu6_Cout61_Out *cout61, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT61 output pin. More...
IFX_INLINE void | IfxCcu6_initCout62Pin (const IfxCcu6_Cout62_Out *cout62, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT62 output pin. More...
IFX_INLINE void | IfxCcu6_initCout63Pin (const IfxCcu6_Cout63_Out *cout63, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT63 output pin. More...
IFX_INLINE void | IfxCcu6_initCtrapPin (const IfxCcu6_Ctrap_In *ctrap, IfxPort_InputMode inputMode)
Initialises a CTRAP input pin. More...
IFX_INLINE void | IfxCcu6_initT12hrPin (const IfxCcu6_T12hr_In *t12hrIn, IfxPort_InputMode inputMode)
Initialises a T12HR input pin. More...
IFX_INLINE void | IfxCcu6_initT13hrPin (const IfxCcu6_T13hr_In *t13hrIn, IfxPort_InputMode inputMode)
Initialises a T13HR input pin. More...

Detailed Description

Function Documentation

◆ IfxCcu6_initCc60InPin()

IFX_INLINE void IfxCcu6_initCc60InPin | ( | const IfxCcu6_Cc60in_In * | cc60In,
 |  | IfxPort_InputMode | inputMode
 | ) |  |

Initialises a CC60 input pin.

Parameters
cc60In | CC60 capture input CC60IN
inputMode | The pin input mode which should be configured
Returns
None

Definition at line 1730 of file IfxCcu6.h.

◆ IfxCcu6_initCc60OutPin()

IFX_INLINE void IfxCcu6_initCc60OutPin | ( | const IfxCcu6_Cc60_Out * | cc60Out,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initialises a CC60 output pin.

Parameters
cc60Out | CC60 compare output CC0
outputMode | The pin output mode which should be configured
padDriver | The pad driver mode which should be configured
Returns
None

Definition at line 1745 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), IfxCcu6_PwmHl_setOutputPins(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_initCc61InPin()

IFX_INLINE void IfxCcu6_initCc61InPin | ( | const IfxCcu6_Cc61in_In * | cc61In,
 |  | IfxPort_InputMode | inputMode
 | ) |  |

Initialises a CC61 input pin.

Parameters
cc61In | CC61 capture input CC61IN
inputMode | The pin input mode which should be configured
Returns
None

Definition at line 1752 of file IfxCcu6.h.

◆ IfxCcu6_initCc61OutPin()

IFX_INLINE void IfxCcu6_initCc61OutPin | ( | const IfxCcu6_Cc61_Out * | cc61Out,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initialises a CC61 output pin.

Parameters
cc61Out | CC61 compare output CC1
outputMode | The pin output mode which should be configured
padDriver | The pad driver mode which should be configured
Returns
None

Definition at line 1767 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), IfxCcu6_PwmHl_setOutputPins(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_initCc62InPin()

IFX_INLINE void IfxCcu6_initCc62InPin | ( | const IfxCcu6_Cc62in_In * | cc62In,
 |  | IfxPort_InputMode | inputMode
 | ) |  |

Initialises a CC62 input pin.

Parameters
cc62In | CC62 capture input CC62IN
inputMode | The pin input mode which should be configured
Returns
None

Definition at line 1774 of file IfxCcu6.h.

◆ IfxCcu6_initCc62OutPin()

IFX_INLINE void IfxCcu6_initCc62OutPin | ( | const IfxCcu6_Cc62_Out * | cc62Out,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initialises a CC62 output pin.

Parameters
cc62Out | CC62 compare output CC2
outputMode | The pin output mode which should be configured
padDriver | The pad driver mode which should be configured
Returns
None

Definition at line 1789 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), IfxCcu6_PwmHl_setOutputPins(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_initCcpos0Pin()

IFX_INLINE void IfxCcu6_initCcpos0Pin | ( | const IfxCcu6_Ccpos0_In * | ccpos0,
 |  | IfxPort_InputMode | inputMode
 | ) |  |

Initialises a CCPOS0 input pin.

Parameters
ccpos0 | CC60 capture input CCPOS0
inputMode | The pin input mode which should be configured
Returns
None

Definition at line 1796 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule().

◆ IfxCcu6_initCcpos1Pin()

IFX_INLINE void IfxCcu6_initCcpos1Pin | ( | const IfxCcu6_Ccpos1_In * | ccpos1,
 |  | IfxPort_InputMode | inputMode
 | ) |  |

Initialises a CCPOS1 input pin.

Parameters
ccpos1 | CC61 capture input CCPOS1
inputMode | The pin input mode which should be configured
Returns
None

Definition at line 1811 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule().

◆ IfxCcu6_initCcpos2Pin()

IFX_INLINE void IfxCcu6_initCcpos2Pin | ( | const IfxCcu6_Ccpos2_In * | ccpos2,
 |  | IfxPort_InputMode | inputMode
 | ) |  |

Initialises a CCPOS0 input pin.

Parameters
ccpos2 | CC62 capture input CCPOS2
inputMode | The pin input mode which should be configured
Returns
None

Definition at line 1826 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule().

◆ IfxCcu6_initCout60Pin()

IFX_INLINE void IfxCcu6_initCout60Pin | ( | const IfxCcu6_Cout60_Out * | cout60,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initialises a COUT60 output pin.

Parameters
cout60 | CC60 compare output COUT0
outputMode | The pin output mode which should be configured
padDriver | The pad driver mode which should be configured
Returns
None

Definition at line 1841 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), IfxCcu6_PwmHl_setOutputPins(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_initCout61Pin()

IFX_INLINE void IfxCcu6_initCout61Pin | ( | const IfxCcu6_Cout61_Out * | cout61,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initialises a COUT61 output pin.

Parameters
cout61 | CC61 compare output COUT1
outputMode | The pin output mode which should be configured
padDriver | The pad driver mode which should be configured
Returns
None

Definition at line 1848 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), IfxCcu6_PwmHl_setOutputPins(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_initCout62Pin()

IFX_INLINE void IfxCcu6_initCout62Pin | ( | const IfxCcu6_Cout62_Out * | cout62,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initialises a COUT62 output pin.

Parameters
cout62 | CC62 compare output COUT2
outputMode | The pin output mode which should be configured
padDriver | The pad driver mode which should be configured
Returns
None

Definition at line 1855 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), IfxCcu6_PwmHl_setOutputPins(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_initCout63Pin()

IFX_INLINE void IfxCcu6_initCout63Pin | ( | const IfxCcu6_Cout63_Out * | cout63,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initialises a COUT63 output pin.

Parameters
cout63 | CC63 compare output COUT3
outputMode | The pin output mode which should be configured
padDriver | The pad driver mode which should be configured
Returns
None

Definition at line 1862 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), IfxCcu6_TimerWithTrigger_init(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_initCtrapPin()

IFX_INLINE void IfxCcu6_initCtrapPin | ( | const IfxCcu6_Ctrap_In * | ctrap,
 |  | IfxPort_InputMode | inputMode
 | ) |  |

Initialises a CTRAP input pin.

Parameters
ctrap | CTRAP input
inputMode | The pin input mode which should be configured
Returns
None

Definition at line 1869 of file IfxCcu6.h.

◆ IfxCcu6_initT12hrPin()

IFX_INLINE void IfxCcu6_initT12hrPin | ( | const IfxCcu6_T12hr_In * | t12hrIn,
 |  | IfxPort_InputMode | inputMode
 | ) |  |

Initialises a T12HR input pin.

Parameters
t12hrIn | Timer 12 HR input T12HR
inputMode | The pin input mode which should be configured
Returns
None

Definition at line 1884 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), IfxCcu6_Timer_initModule(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_initT13hrPin()

IFX_INLINE void IfxCcu6_initT13hrPin | ( | const IfxCcu6_T13hr_In * | t13hrIn,
 |  | IfxPort_InputMode | inputMode
 | ) |  |

Initialises a T13HR input pin.

Parameters
t13hrIn | Timer 12 HR input T12HR
inputMode | The pin input mode which should be configured
Returns
None

Definition at line 1899 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), IfxCcu6_Timer_initModule(), and IfxCcu6_TPwm_initModule().


iLLD_TC38A: CCU6 Pin Mapping

Data Structures | Macros | Variables
CCU6 Pin Mapping
iLLD » CCU6
Collaboration diagram for CCU6 Pin Mapping:

Data Structures

struct | IfxCcu6_Cc60in_In
CC60IN pin mapping structure. More...
struct | IfxCcu6_Cc61in_In
CC61IN pin mapping structure. More...
struct | IfxCcu6_Cc62in_In
CC62IN pin mapping structure. More...
struct | IfxCcu6_Ccpos0_In
CCPOS0 pin mapping structure. More...
struct | IfxCcu6_Ccpos1_In
CCPOS1 pin mapping structure. More...
struct | IfxCcu6_Ccpos2_In
CCPOS2 pin mapping structure. More...
struct | IfxCcu6_Ctrap_In
CTRAP pin mapping structure. More...
struct | IfxCcu6_T12hr_In
T12HR pin mapping structure. More...
struct | IfxCcu6_T13hr_In
T13HR pin mapping structure. More...
struct | IfxCcu6_Cc60_Out
CC60 pin mapping structure. More...
struct | IfxCcu6_Cc61_Out
CC61 pin mapping structure. More...
struct | IfxCcu6_Cc62_Out
CC62 pin mapping structure. More...
struct | IfxCcu6_Cout60_Out
COUT60 pin mapping structure. More...
struct | IfxCcu6_Cout61_Out
COUT61 pin mapping structure. More...
struct | IfxCcu6_Cout62_Out
COUT62 pin mapping structure. More...
struct | IfxCcu6_Cout63_Out
COUT63 pin mapping structure. More...

Macros

#define | IFXCCU6_PINMAP_NUM_MODULES 2
Table dimensions. More...
#define | IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS 5
#define | IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS 3
#define | IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS 5
#define | IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS 3
#define | IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS 5
#define | IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS 3
#define | IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS 4
#define | IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS 4
#define | IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS 4
#define | IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS 4
#define | IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS 4
#define | IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS 4
#define | IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS 5
#define | IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS 3
#define | IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS 5
#define | IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS 3

Variables

IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_0_OUT
T12 PWM channel 60. More...
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_6_OUT
T12 PWM channel 60. More...
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P11_12_OUT
T12 PWM channel 60. More...
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P15_6_OUT
T12 PWM channel 60. More...
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P34_2_OUT
T12 PWM channel 60. More...
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_1_OUT
T12 PWM channel 60. More...
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_7_OUT
T12 PWM channel 60. More...
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P20_8_OUT
T12 PWM channel 60. More...
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P33_13_OUT
T12 PWM channel 60. More...
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu60_CC60INA_P02_0_IN
T12 capture input 60. More...
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu60_CC60INB_P00_1_IN
T12 capture input 60. More...
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu60_CC60INC_P02_6_IN
T12 capture input 60. More...
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu61_CC60INA_P00_1_IN
T12 capture input 60. More...
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu61_CC60INB_P02_0_IN
T12 capture input 60. More...
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu61_CC60INC_P00_7_IN
T12 capture input 60. More...
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_2_OUT
T12 PWM channel 61. More...
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_7_OUT
T12 PWM channel 61. More...
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P11_11_OUT
T12 PWM channel 61. More...
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P15_5_OUT
T12 PWM channel 61. More...
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P34_4_OUT
T12 PWM channel 61. More...
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_3_OUT
T12 PWM channel 61. More...
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_8_OUT
T12 PWM channel 61. More...
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P20_9_OUT
T12 PWM channel 61. More...
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P33_11_OUT
T12 PWM channel 61. More...
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu60_CC61INA_P02_2_IN
T12 capture input 61. More...
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu60_CC61INB_P00_3_IN
T12 capture input 61. More...
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu60_CC61INC_P02_7_IN
T12 capture input 61. More...
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu61_CC61INA_P00_3_IN
T12 capture input 61. More...
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu61_CC61INB_P02_2_IN
T12 capture input 61. More...
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu61_CC61INC_P00_8_IN
T12 capture input 61. More...
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_4_OUT
T12 PWM channel 62. More...
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_8_OUT
T12 PWM channel 62. More...
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P11_10_OUT
T12 PWM channel 62. More...
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P15_4_OUT
T12 PWM channel 62. More...
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P33_14_OUT
T12 PWM channel 62. More...
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_5_OUT
T12 PWM channel 62. More...
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_9_OUT
T12 PWM channel 62. More...
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P20_10_OUT
T12 PWM channel 62. More...
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P33_9_OUT
T12 PWM channel 62. More...
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu60_CC62INA_P02_4_IN
T12 capture input 62. More...
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu60_CC62INB_P00_5_IN
T12 capture input 62. More...
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu60_CC62INC_P02_8_IN
T12 capture input 62. More...
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu61_CC62INA_P00_5_IN
T12 capture input 62. More...
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu61_CC62INB_P02_4_IN
T12 capture input 62. More...
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu61_CC62INC_P00_9_IN
T12 capture input 62. More...
IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0A_P02_6_IN
Hall capture input 0. More...
IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0C_P10_4_IN
Hall capture input 0. More...
IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0D_P40_0_IN
Hall capture input 0. More...
IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0A_P00_7_IN
Hall capture input 0. More...
IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0C_P33_7_IN
Hall capture input 0. More...
IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0D_P40_5_IN
Hall capture input 0. More...
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1A_P02_7_IN
Hall capture input 1. More...
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1B_P40_1_IN
Hall capture input 1. More...
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1C_P10_7_IN
Hall capture input 1. More...
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1D_P40_2_IN
Hall capture input 1. More...
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1A_P00_8_IN
Hall capture input 1. More...
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1B_P40_6_IN
Hall capture input 1. More...
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1C_P33_6_IN
Hall capture input 1. More...
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1D_P40_7_IN
Hall capture input 1. More...
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2A_P02_8_IN
Hall capture input 2. More...
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2B_P40_3_IN
Hall capture input 2. More...
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2C_P10_8_IN
Hall capture input 2. More...
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2D_P40_4_IN
Hall capture input 2. More...
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2A_P00_9_IN
Hall capture input 2. More...
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2B_P40_8_IN
Hall capture input 2. More...
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2C_P33_5_IN
Hall capture input 2. More...
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2D_P40_9_IN
Hall capture input 2. More...
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P02_1_OUT
T12 PWM channel 60. More...
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P11_9_OUT
T12 PWM channel 60. More...
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P15_7_OUT
T12 PWM channel 60. More...
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P34_3_OUT
T12 PWM channel 60. More...
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu61_COUT60_P00_2_OUT
T12 PWM channel 60. More...
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu61_COUT60_P20_11_OUT
T12 PWM channel 60. More...
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu61_COUT60_P33_12_OUT
T12 PWM channel 60. More...
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P02_3_OUT
T12 PWM channel 61. More...
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P11_6_OUT
T12 PWM channel 61. More...
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P15_8_OUT
T12 PWM channel 61. More...
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P34_5_OUT
T12 PWM channel 61. More...
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu61_COUT61_P00_4_OUT
T12 PWM channel 61. More...
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu61_COUT61_P20_12_OUT
T12 PWM channel 61. More...
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu61_COUT61_P33_10_OUT
T12 PWM channel 61. More...
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P02_5_OUT
T12 PWM channel 62. More...
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P11_3_OUT
T12 PWM channel 62. More...
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P14_0_OUT
T12 PWM channel 62. More...
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P33_15_OUT
T12 PWM channel 62. More...
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu61_COUT62_P00_6_OUT
T12 PWM channel 62. More...
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu61_COUT62_P20_13_OUT
T12 PWM channel 62. More...
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu61_COUT62_P33_8_OUT
T12 PWM channel 62. More...
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P00_0_OUT
T13 PWM channel 63. More...
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P11_2_OUT
T13 PWM channel 63. More...
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P14_1_OUT
T13 PWM channel 63. More...
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P32_4_OUT
T13 PWM channel 63. More...
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P34_1_OUT
T13 PWM channel 63. More...
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_10_OUT
T13 PWM channel 63. More...
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_12_OUT
T13 PWM channel 63. More...
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu61_COUT63_P20_7_OUT
T13 PWM channel 63. More...
IFX_EXTERN IfxCcu6_Ctrap_In IfxCcu60_CTRAPA_P00_11_IN
Trap input capture. More...
IFX_EXTERN IfxCcu6_Ctrap_In IfxCcu61_CTRAPA_P00_0_IN
Trap input capture. More...
IFX_EXTERN IfxCcu6_Ctrap_In IfxCcu61_CTRAPC_P33_4_IN
Trap input capture. More...
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu60_T12HRB_P00_7_IN
External timer start 12. More...
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu60_T12HRC_P00_9_IN
External timer start 12. More...
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu60_T12HRE_P00_0_IN
External timer start 12. More...
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu61_T12HRB_P02_6_IN
External timer start 12. More...
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu61_T12HRC_P02_8_IN
External timer start 12. More...
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu61_T12HRE_P00_11_IN
External timer start 12. More...
IFX_EXTERN IfxCcu6_T13hr_In IfxCcu60_T13HRB_P00_8_IN
External timer start 13. More...
IFX_EXTERN IfxCcu6_T13hr_In IfxCcu60_T13HRC_P00_9_IN
External timer start 13. More...
IFX_EXTERN IfxCcu6_T13hr_In IfxCcu61_T13HRB_P02_7_IN
External timer start 13. More...
IFX_EXTERN IfxCcu6_T13hr_In IfxCcu61_T13HRC_P02_8_IN
External timer start 13. More...
IFX_EXTERN const IfxCcu6_Cc60_Out * | IfxCcu6_Cc60_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS]
IfxCcu6_Cc60_Out table. More...
IFX_EXTERN const IfxCcu6_Cc60in_In * | IfxCcu6_Cc60in_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS]
IfxCcu6_Cc60in_In table. More...
IFX_EXTERN const IfxCcu6_Cc61_Out * | IfxCcu6_Cc61_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS]
IfxCcu6_Cc61_Out table. More...
IFX_EXTERN const IfxCcu6_Cc61in_In * | IfxCcu6_Cc61in_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS]
IfxCcu6_Cc61in_In table. More...
IFX_EXTERN const IfxCcu6_Cc62_Out * | IfxCcu6_Cc62_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS]
IfxCcu6_Cc62_Out table. More...
IFX_EXTERN const IfxCcu6_Cc62in_In * | IfxCcu6_Cc62in_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS]
IfxCcu6_Cc62in_In table. More...
IFX_EXTERN const IfxCcu6_Ccpos0_In * | IfxCcu6_Ccpos0_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS]
IfxCcu6_Ccpos0_In table. More...
IFX_EXTERN const IfxCcu6_Ccpos1_In * | IfxCcu6_Ccpos1_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS]
IfxCcu6_Ccpos1_In table. More...
IFX_EXTERN const IfxCcu6_Ccpos2_In * | IfxCcu6_Ccpos2_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS]
IfxCcu6_Ccpos2_In table. More...
IFX_EXTERN const IfxCcu6_Cout60_Out * | IfxCcu6_Cout60_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS]
IfxCcu6_Cout60_Out table. More...
IFX_EXTERN const IfxCcu6_Cout61_Out * | IfxCcu6_Cout61_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS]
IfxCcu6_Cout61_Out table. More...
IFX_EXTERN const IfxCcu6_Cout62_Out * | IfxCcu6_Cout62_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS]
IfxCcu6_Cout62_Out table. More...
IFX_EXTERN const IfxCcu6_Cout63_Out * | IfxCcu6_Cout63_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS]
IfxCcu6_Cout63_Out table. More...
IFX_EXTERN const IfxCcu6_Ctrap_In * | IfxCcu6_Ctrap_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS]
IfxCcu6_Ctrap_In table. More...
IFX_EXTERN const IfxCcu6_T12hr_In * | IfxCcu6_T12hr_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS]
IfxCcu6_T12hr_In table. More...
IFX_EXTERN const IfxCcu6_T13hr_In * | IfxCcu6_T13hr_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS]
IfxCcu6_T13hr_In table. More...

Detailed Description

Data Structure Documentation

◆ IfxCcu6_Cc60in_In

struct IfxCcu6_Cc60in_In

CC60IN pin mapping structure.

Definition at line 56 of file IfxCcu6_PinMap.h.

Collaboration diagram for IfxCcu6_Cc60in_In:
[legend]
Data Fields
Ifx_CCU6 * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxCcu6_Cc61in_In

struct IfxCcu6_Cc61in_In

CC61IN pin mapping structure.

Definition at line 64 of file IfxCcu6_PinMap.h.

Collaboration diagram for IfxCcu6_Cc61in_In:
[legend]
Data Fields
Ifx_CCU6 * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxCcu6_Cc62in_In

struct IfxCcu6_Cc62in_In

CC62IN pin mapping structure.

Definition at line 72 of file IfxCcu6_PinMap.h.

Collaboration diagram for IfxCcu6_Cc62in_In:
[legend]
Data Fields
Ifx_CCU6 * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxCcu6_Ccpos0_In

struct IfxCcu6_Ccpos0_In

CCPOS0 pin mapping structure.

Definition at line 80 of file IfxCcu6_PinMap.h.

Collaboration diagram for IfxCcu6_Ccpos0_In:
[legend]
Data Fields
Ifx_CCU6 * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxCcu6_Ccpos1_In

struct IfxCcu6_Ccpos1_In

CCPOS1 pin mapping structure.

Definition at line 88 of file IfxCcu6_PinMap.h.

Collaboration diagram for IfxCcu6_Ccpos1_In:
[legend]
Data Fields
Ifx_CCU6 * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxCcu6_Ccpos2_In

struct IfxCcu6_Ccpos2_In

CCPOS2 pin mapping structure.

Definition at line 96 of file IfxCcu6_PinMap.h.

Collaboration diagram for IfxCcu6_Ccpos2_In:
[legend]
Data Fields
Ifx_CCU6 * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxCcu6_Ctrap_In

struct IfxCcu6_Ctrap_In

CTRAP pin mapping structure.

Definition at line 104 of file IfxCcu6_PinMap.h.

Collaboration diagram for IfxCcu6_Ctrap_In:
[legend]
Data Fields
Ifx_CCU6 * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxCcu6_T12hr_In

struct IfxCcu6_T12hr_In

T12HR pin mapping structure.

Definition at line 112 of file IfxCcu6_PinMap.h.

Collaboration diagram for IfxCcu6_T12hr_In:
[legend]
Data Fields
Ifx_CCU6 * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxCcu6_T13hr_In

struct IfxCcu6_T13hr_In

T13HR pin mapping structure.

Definition at line 120 of file IfxCcu6_PinMap.h.

Collaboration diagram for IfxCcu6_T13hr_In:
[legend]
Data Fields
Ifx_CCU6 * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxCcu6_Cc60_Out

struct IfxCcu6_Cc60_Out

CC60 pin mapping structure.

Definition at line 128 of file IfxCcu6_PinMap.h.

Collaboration diagram for IfxCcu6_Cc60_Out:
[legend]
Data Fields
Ifx_CCU6 * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxCcu6_Cc61_Out

struct IfxCcu6_Cc61_Out

CC61 pin mapping structure.

Definition at line 136 of file IfxCcu6_PinMap.h.

Collaboration diagram for IfxCcu6_Cc61_Out:
[legend]
Data Fields
Ifx_CCU6 * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxCcu6_Cc62_Out

struct IfxCcu6_Cc62_Out

CC62 pin mapping structure.

Definition at line 144 of file IfxCcu6_PinMap.h.

Collaboration diagram for IfxCcu6_Cc62_Out:
[legend]
Data Fields
Ifx_CCU6 * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxCcu6_Cout60_Out

struct IfxCcu6_Cout60_Out

COUT60 pin mapping structure.

Definition at line 152 of file IfxCcu6_PinMap.h.

Collaboration diagram for IfxCcu6_Cout60_Out:
[legend]
Data Fields
Ifx_CCU6 * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxCcu6_Cout61_Out

struct IfxCcu6_Cout61_Out

COUT61 pin mapping structure.

Definition at line 160 of file IfxCcu6_PinMap.h.

Collaboration diagram for IfxCcu6_Cout61_Out:
[legend]
Data Fields
Ifx_CCU6 * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxCcu6_Cout62_Out

struct IfxCcu6_Cout62_Out

COUT62 pin mapping structure.

Definition at line 168 of file IfxCcu6_PinMap.h.

Collaboration diagram for IfxCcu6_Cout62_Out:
[legend]
Data Fields
Ifx_CCU6 * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxCcu6_Cout63_Out

struct IfxCcu6_Cout63_Out

COUT63 pin mapping structure.

Definition at line 176 of file IfxCcu6_PinMap.h.

Collaboration diagram for IfxCcu6_Cout63_Out:
[legend]
Data Fields
Ifx_CCU6 * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

Macro Definition Documentation

◆ IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS

#define IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS 5

Definition at line 295 of file IfxCcu6_PinMap.h.

◆ IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS

#define IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS 3

Definition at line 296 of file IfxCcu6_PinMap.h.

◆ IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS

#define IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS 5

Definition at line 297 of file IfxCcu6_PinMap.h.

◆ IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS

#define IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS 3

Definition at line 298 of file IfxCcu6_PinMap.h.

◆ IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS

#define IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS 5

Definition at line 299 of file IfxCcu6_PinMap.h.

◆ IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS

#define IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS 3

Definition at line 300 of file IfxCcu6_PinMap.h.

◆ IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS

#define IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS 4

Definition at line 301 of file IfxCcu6_PinMap.h.

◆ IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS

#define IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS 4

Definition at line 302 of file IfxCcu6_PinMap.h.

◆ IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS

#define IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS 4

Definition at line 303 of file IfxCcu6_PinMap.h.

◆ IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS

#define IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS 4

Definition at line 304 of file IfxCcu6_PinMap.h.

◆ IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS

#define IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS 4

Definition at line 305 of file IfxCcu6_PinMap.h.

◆ IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS

#define IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS 4

Definition at line 306 of file IfxCcu6_PinMap.h.

◆ IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS

#define IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS 5

Definition at line 307 of file IfxCcu6_PinMap.h.

◆ IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS

#define IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS 3

Definition at line 308 of file IfxCcu6_PinMap.h.

◆ IFXCCU6_PINMAP_NUM_MODULES

#define IFXCCU6_PINMAP_NUM_MODULES 2

Table dimensions.

Definition at line 294 of file IfxCcu6_PinMap.h.

◆ IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS

#define IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS 5

Definition at line 309 of file IfxCcu6_PinMap.h.

◆ IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS

#define IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS 3

Definition at line 310 of file IfxCcu6_PinMap.h.

Variable Documentation

◆ IfxCcu60_CC60_P02_0_OUT

IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_0_OUT

T12 PWM channel 60.

Definition at line 183 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC60_P02_6_OUT

IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_6_OUT

T12 PWM channel 60.

Definition at line 184 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC60_P11_12_OUT

IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P11_12_OUT

T12 PWM channel 60.

Definition at line 185 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC60_P15_6_OUT

IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P15_6_OUT

T12 PWM channel 60.

Definition at line 186 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC60_P34_2_OUT

IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P34_2_OUT

T12 PWM channel 60.

Definition at line 187 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC60INA_P02_0_IN

IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu60_CC60INA_P02_0_IN

T12 capture input 60.

Definition at line 192 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC60INB_P00_1_IN

IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu60_CC60INB_P00_1_IN

T12 capture input 60.

Definition at line 193 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC60INC_P02_6_IN

IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu60_CC60INC_P02_6_IN

T12 capture input 60.

Definition at line 194 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC61_P02_2_OUT

IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_2_OUT

T12 PWM channel 61.

Definition at line 198 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC61_P02_7_OUT

IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_7_OUT

T12 PWM channel 61.

Definition at line 199 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC61_P11_11_OUT

IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P11_11_OUT

T12 PWM channel 61.

Definition at line 200 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC61_P15_5_OUT

IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P15_5_OUT

T12 PWM channel 61.

Definition at line 201 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC61_P34_4_OUT

IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P34_4_OUT

T12 PWM channel 61.

Definition at line 202 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC61INA_P02_2_IN

IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu60_CC61INA_P02_2_IN

T12 capture input 61.

Definition at line 207 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC61INB_P00_3_IN

IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu60_CC61INB_P00_3_IN

T12 capture input 61.

Definition at line 208 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC61INC_P02_7_IN

IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu60_CC61INC_P02_7_IN

T12 capture input 61.

Definition at line 209 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC62_P02_4_OUT

IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_4_OUT

T12 PWM channel 62.

Definition at line 213 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC62_P02_8_OUT

IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_8_OUT

T12 PWM channel 62.

Definition at line 214 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC62_P11_10_OUT

IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P11_10_OUT

T12 PWM channel 62.

Definition at line 215 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC62_P15_4_OUT

IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P15_4_OUT

T12 PWM channel 62.

Definition at line 216 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC62_P33_14_OUT

IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P33_14_OUT

T12 PWM channel 62.

Definition at line 217 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC62INA_P02_4_IN

IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu60_CC62INA_P02_4_IN

T12 capture input 62.

Definition at line 222 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC62INB_P00_5_IN

IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu60_CC62INB_P00_5_IN

T12 capture input 62.

Definition at line 223 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC62INC_P02_8_IN

IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu60_CC62INC_P02_8_IN

T12 capture input 62.

Definition at line 224 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CCPOS0A_P02_6_IN

IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0A_P02_6_IN

Hall capture input 0.

Definition at line 228 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CCPOS0C_P10_4_IN

IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0C_P10_4_IN

Hall capture input 0.

Definition at line 229 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CCPOS0D_P40_0_IN

IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0D_P40_0_IN

Hall capture input 0.

Definition at line 230 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CCPOS1A_P02_7_IN

IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1A_P02_7_IN

Hall capture input 1.

Definition at line 234 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CCPOS1B_P40_1_IN

IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1B_P40_1_IN

Hall capture input 1.

Definition at line 235 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CCPOS1C_P10_7_IN

IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1C_P10_7_IN

Hall capture input 1.

Definition at line 236 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CCPOS1D_P40_2_IN

IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1D_P40_2_IN

Hall capture input 1.

Definition at line 237 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CCPOS2A_P02_8_IN

IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2A_P02_8_IN

Hall capture input 2.

Definition at line 242 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CCPOS2B_P40_3_IN

IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2B_P40_3_IN

Hall capture input 2.

Definition at line 243 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CCPOS2C_P10_8_IN

IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2C_P10_8_IN

Hall capture input 2.

Definition at line 244 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CCPOS2D_P40_4_IN

IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2D_P40_4_IN

Hall capture input 2.

Definition at line 245 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_COUT60_P02_1_OUT

IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P02_1_OUT

T12 PWM channel 60.

Definition at line 250 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_COUT60_P11_9_OUT

IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P11_9_OUT

T12 PWM channel 60.

Definition at line 251 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_COUT60_P15_7_OUT

IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P15_7_OUT

T12 PWM channel 60.

Definition at line 252 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_COUT60_P34_3_OUT

IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P34_3_OUT

T12 PWM channel 60.

Definition at line 253 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_COUT61_P02_3_OUT

IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P02_3_OUT

T12 PWM channel 61.

Definition at line 257 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_COUT61_P11_6_OUT

IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P11_6_OUT

T12 PWM channel 61.

Definition at line 258 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_COUT61_P15_8_OUT

IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P15_8_OUT

T12 PWM channel 61.

Definition at line 259 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_COUT61_P34_5_OUT

IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P34_5_OUT

T12 PWM channel 61.

Definition at line 260 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_COUT62_P02_5_OUT

IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P02_5_OUT

T12 PWM channel 62.

Definition at line 264 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_COUT62_P11_3_OUT

IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P11_3_OUT

T12 PWM channel 62.

Definition at line 265 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_COUT62_P14_0_OUT

IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P14_0_OUT

T12 PWM channel 62.

Definition at line 266 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_COUT62_P33_15_OUT

IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P33_15_OUT

T12 PWM channel 62.

Definition at line 267 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_COUT63_P00_0_OUT

IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P00_0_OUT

T13 PWM channel 63.

Definition at line 271 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_COUT63_P11_2_OUT

IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P11_2_OUT

T13 PWM channel 63.

Definition at line 272 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_COUT63_P14_1_OUT

IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P14_1_OUT

T13 PWM channel 63.

Definition at line 273 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_COUT63_P32_4_OUT

IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P32_4_OUT

T13 PWM channel 63.

Definition at line 274 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_COUT63_P34_1_OUT

IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P34_1_OUT

T13 PWM channel 63.

Definition at line 275 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CTRAPA_P00_11_IN

IFX_EXTERN IfxCcu6_Ctrap_In IfxCcu60_CTRAPA_P00_11_IN

Trap input capture.

Definition at line 279 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_T12HRB_P00_7_IN

IFX_EXTERN IfxCcu6_T12hr_In IfxCcu60_T12HRB_P00_7_IN

External timer start 12.

Definition at line 282 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_T12HRC_P00_9_IN

IFX_EXTERN IfxCcu6_T12hr_In IfxCcu60_T12HRC_P00_9_IN

External timer start 12.

Definition at line 283 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_T12HRE_P00_0_IN

IFX_EXTERN IfxCcu6_T12hr_In IfxCcu60_T12HRE_P00_0_IN

External timer start 12.

Definition at line 284 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_T13HRB_P00_8_IN

IFX_EXTERN IfxCcu6_T13hr_In IfxCcu60_T13HRB_P00_8_IN

External timer start 13.

Definition at line 288 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_T13HRC_P00_9_IN

IFX_EXTERN IfxCcu6_T13hr_In IfxCcu60_T13HRC_P00_9_IN

External timer start 13.

Definition at line 289 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC60_P00_1_OUT

IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_1_OUT

T12 PWM channel 60.

Definition at line 188 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC60_P00_7_OUT

IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_7_OUT

T12 PWM channel 60.

Definition at line 189 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC60_P20_8_OUT

IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P20_8_OUT

T12 PWM channel 60.

Definition at line 190 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC60_P33_13_OUT

IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P33_13_OUT

T12 PWM channel 60.

Definition at line 191 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC60INA_P00_1_IN

IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu61_CC60INA_P00_1_IN

T12 capture input 60.

Definition at line 195 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC60INB_P02_0_IN

IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu61_CC60INB_P02_0_IN

T12 capture input 60.

Definition at line 196 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC60INC_P00_7_IN

IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu61_CC60INC_P00_7_IN

T12 capture input 60.

Definition at line 197 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC61_P00_3_OUT

IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_3_OUT

T12 PWM channel 61.

Definition at line 203 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC61_P00_8_OUT

IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_8_OUT

T12 PWM channel 61.

Definition at line 204 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC61_P20_9_OUT

IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P20_9_OUT

T12 PWM channel 61.

Definition at line 205 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC61_P33_11_OUT

IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P33_11_OUT

T12 PWM channel 61.

Definition at line 206 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC61INA_P00_3_IN

IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu61_CC61INA_P00_3_IN

T12 capture input 61.

Definition at line 210 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC61INB_P02_2_IN

IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu61_CC61INB_P02_2_IN

T12 capture input 61.

Definition at line 211 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC61INC_P00_8_IN

IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu61_CC61INC_P00_8_IN

T12 capture input 61.

Definition at line 212 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC62_P00_5_OUT

IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_5_OUT

T12 PWM channel 62.

Definition at line 218 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC62_P00_9_OUT

IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_9_OUT

T12 PWM channel 62.

Definition at line 219 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC62_P20_10_OUT

IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P20_10_OUT

T12 PWM channel 62.

Definition at line 220 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC62_P33_9_OUT

IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P33_9_OUT

T12 PWM channel 62.

Definition at line 221 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC62INA_P00_5_IN

IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu61_CC62INA_P00_5_IN

T12 capture input 62.

Definition at line 225 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC62INB_P02_4_IN

IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu61_CC62INB_P02_4_IN

T12 capture input 62.

Definition at line 226 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC62INC_P00_9_IN

IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu61_CC62INC_P00_9_IN

T12 capture input 62.

Definition at line 227 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CCPOS0A_P00_7_IN

IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0A_P00_7_IN

Hall capture input 0.

Definition at line 231 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CCPOS0C_P33_7_IN

IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0C_P33_7_IN

Hall capture input 0.

Definition at line 232 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CCPOS0D_P40_5_IN

IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0D_P40_5_IN

Hall capture input 0.

Definition at line 233 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CCPOS1A_P00_8_IN

IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1A_P00_8_IN

Hall capture input 1.

Definition at line 238 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CCPOS1B_P40_6_IN

IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1B_P40_6_IN

Hall capture input 1.

Definition at line 239 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CCPOS1C_P33_6_IN

IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1C_P33_6_IN

Hall capture input 1.

Definition at line 240 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CCPOS1D_P40_7_IN

IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1D_P40_7_IN

Hall capture input 1.

Definition at line 241 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CCPOS2A_P00_9_IN

IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2A_P00_9_IN

Hall capture input 2.

Definition at line 246 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CCPOS2B_P40_8_IN

IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2B_P40_8_IN

Hall capture input 2.

Definition at line 247 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CCPOS2C_P33_5_IN

IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2C_P33_5_IN

Hall capture input 2.

Definition at line 248 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CCPOS2D_P40_9_IN

IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2D_P40_9_IN

Hall capture input 2.

Definition at line 249 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_COUT60_P00_2_OUT

IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu61_COUT60_P00_2_OUT

T12 PWM channel 60.

Definition at line 254 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_COUT60_P20_11_OUT

IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu61_COUT60_P20_11_OUT

T12 PWM channel 60.

Definition at line 255 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_COUT60_P33_12_OUT

IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu61_COUT60_P33_12_OUT

T12 PWM channel 60.

Definition at line 256 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_COUT61_P00_4_OUT

IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu61_COUT61_P00_4_OUT

T12 PWM channel 61.

Definition at line 261 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_COUT61_P20_12_OUT

IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu61_COUT61_P20_12_OUT

T12 PWM channel 61.

Definition at line 262 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_COUT61_P33_10_OUT

IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu61_COUT61_P33_10_OUT

T12 PWM channel 61.

Definition at line 263 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_COUT62_P00_6_OUT

IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu61_COUT62_P00_6_OUT

T12 PWM channel 62.

Definition at line 268 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_COUT62_P20_13_OUT

IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu61_COUT62_P20_13_OUT

T12 PWM channel 62.

Definition at line 269 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_COUT62_P33_8_OUT

IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu61_COUT62_P33_8_OUT

T12 PWM channel 62.

Definition at line 270 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_COUT63_P00_10_OUT

IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_10_OUT

T13 PWM channel 63.

Definition at line 276 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_COUT63_P00_12_OUT

IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_12_OUT

T13 PWM channel 63.

Definition at line 277 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_COUT63_P20_7_OUT

IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu61_COUT63_P20_7_OUT

T13 PWM channel 63.

Definition at line 278 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CTRAPA_P00_0_IN

IFX_EXTERN IfxCcu6_Ctrap_In IfxCcu61_CTRAPA_P00_0_IN

Trap input capture.

Definition at line 280 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CTRAPC_P33_4_IN

IFX_EXTERN IfxCcu6_Ctrap_In IfxCcu61_CTRAPC_P33_4_IN

Trap input capture.

Definition at line 281 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_T12HRB_P02_6_IN

IFX_EXTERN IfxCcu6_T12hr_In IfxCcu61_T12HRB_P02_6_IN

External timer start 12.

Definition at line 285 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_T12HRC_P02_8_IN

IFX_EXTERN IfxCcu6_T12hr_In IfxCcu61_T12HRC_P02_8_IN

External timer start 12.

Definition at line 286 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_T12HRE_P00_11_IN

IFX_EXTERN IfxCcu6_T12hr_In IfxCcu61_T12HRE_P00_11_IN

External timer start 12.

Definition at line 287 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_T13HRB_P02_7_IN

IFX_EXTERN IfxCcu6_T13hr_In IfxCcu61_T13HRB_P02_7_IN

External timer start 13.

Definition at line 290 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_T13HRC_P02_8_IN

IFX_EXTERN IfxCcu6_T13hr_In IfxCcu61_T13HRC_P02_8_IN

External timer start 13.

Definition at line 291 of file IfxCcu6_PinMap.h.

◆ IfxCcu6_Cc60_Out_pinTable

IFX_EXTERN const IfxCcu6_Cc60_Out* IfxCcu6_Cc60_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS]

IfxCcu6_Cc60_Out table.

Definition at line 314 of file IfxCcu6_PinMap.h.

◆ IfxCcu6_Cc60in_In_pinTable

IFX_EXTERN const IfxCcu6_Cc60in_In* IfxCcu6_Cc60in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS]

IfxCcu6_Cc60in_In table.

Definition at line 317 of file IfxCcu6_PinMap.h.

◆ IfxCcu6_Cc61_Out_pinTable

IFX_EXTERN const IfxCcu6_Cc61_Out* IfxCcu6_Cc61_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS]

IfxCcu6_Cc61_Out table.

Definition at line 320 of file IfxCcu6_PinMap.h.

◆ IfxCcu6_Cc61in_In_pinTable

IFX_EXTERN const IfxCcu6_Cc61in_In* IfxCcu6_Cc61in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS]

IfxCcu6_Cc61in_In table.

Definition at line 323 of file IfxCcu6_PinMap.h.

◆ IfxCcu6_Cc62_Out_pinTable

IFX_EXTERN const IfxCcu6_Cc62_Out* IfxCcu6_Cc62_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS]

IfxCcu6_Cc62_Out table.

Definition at line 326 of file IfxCcu6_PinMap.h.

◆ IfxCcu6_Cc62in_In_pinTable

IFX_EXTERN const IfxCcu6_Cc62in_In* IfxCcu6_Cc62in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS]

IfxCcu6_Cc62in_In table.

Definition at line 329 of file IfxCcu6_PinMap.h.

◆ IfxCcu6_Ccpos0_In_pinTable

IFX_EXTERN const IfxCcu6_Ccpos0_In* IfxCcu6_Ccpos0_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS]

IfxCcu6_Ccpos0_In table.

Definition at line 332 of file IfxCcu6_PinMap.h.

◆ IfxCcu6_Ccpos1_In_pinTable

IFX_EXTERN const IfxCcu6_Ccpos1_In* IfxCcu6_Ccpos1_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS]

IfxCcu6_Ccpos1_In table.

Definition at line 335 of file IfxCcu6_PinMap.h.

◆ IfxCcu6_Ccpos2_In_pinTable

IFX_EXTERN const IfxCcu6_Ccpos2_In* IfxCcu6_Ccpos2_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS]

IfxCcu6_Ccpos2_In table.

Definition at line 338 of file IfxCcu6_PinMap.h.

◆ IfxCcu6_Cout60_Out_pinTable

IFX_EXTERN const IfxCcu6_Cout60_Out* IfxCcu6_Cout60_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS]

IfxCcu6_Cout60_Out table.

Definition at line 341 of file IfxCcu6_PinMap.h.

◆ IfxCcu6_Cout61_Out_pinTable

IFX_EXTERN const IfxCcu6_Cout61_Out* IfxCcu6_Cout61_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS]

IfxCcu6_Cout61_Out table.

Definition at line 344 of file IfxCcu6_PinMap.h.

◆ IfxCcu6_Cout62_Out_pinTable

IFX_EXTERN const IfxCcu6_Cout62_Out* IfxCcu6_Cout62_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS]

IfxCcu6_Cout62_Out table.

Definition at line 347 of file IfxCcu6_PinMap.h.

◆ IfxCcu6_Cout63_Out_pinTable

IFX_EXTERN const IfxCcu6_Cout63_Out* IfxCcu6_Cout63_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS]

IfxCcu6_Cout63_Out table.

Definition at line 350 of file IfxCcu6_PinMap.h.

◆ IfxCcu6_Ctrap_In_pinTable

IFX_EXTERN const IfxCcu6_Ctrap_In* IfxCcu6_Ctrap_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS]

IfxCcu6_Ctrap_In table.

Definition at line 353 of file IfxCcu6_PinMap.h.

◆ IfxCcu6_T12hr_In_pinTable

IFX_EXTERN const IfxCcu6_T12hr_In* IfxCcu6_T12hr_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS]

IfxCcu6_T12hr_In table.

Definition at line 356 of file IfxCcu6_PinMap.h.

◆ IfxCcu6_T13hr_In_pinTable

IFX_EXTERN const IfxCcu6_T13hr_In* IfxCcu6_T13hr_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS]

IfxCcu6_T13hr_In table.

Definition at line 359 of file IfxCcu6_PinMap.h.


iLLD_TC38A: ICU Interface driver

Modules
ICU Interface driver
iLLD » CCU6
Collaboration diagram for ICU Interface driver:

Modules

How to use the CCU6 ICU Interface driver?
Data Structures
Module Initialize Functions
Capture Control Functions
Channel Initialize Functions

Detailed Description


iLLD_TC38A: How to use the CCU6 ICU Interface driver?

How to use the CCU6 ICU Interface driver?
iLLD » CCU6 » ICU Interface driver
Collaboration diagram for How to use the CCU6 ICU Interface driver?:

The ICU interface driver provides a default CCU6 configuration for capturing the input from the selected channel

User can select the various configuration options that hardware allows

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Ccu6/Icu/IfxCcu6_Icu.h>

Variables

Declare the ICU handle and channel handle as global variables in your C code:

// used globally
static IfxCcu6_Icu icu;
static IfxCcu6_IcuChannel icuChannel;

Interrupt Handler Installation

See also How to define Interrupts?

Define priority for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:

// priorities are normally defined in Ifx_IntPrioDef.h
#define IFX_INTPRIO_CCU6 1

Add the interrupt service routine to your C code.

IFX_INTERRUPT(ccu60ISR_Icu, 0, IFX_INTPRIO_CCU6)
{
//user code
}

Finally install the interrupt handlers in your initialisation function:

// install interrupt handlers
IfxCpu_Irq_installInterruptHandler(&ccu60ISR_Icu, IFX_INTPRIO_CCU6);
IfxCpu_enableInterrupts();

Module Initialisation

The module can be initialised in two ways, as a stand alone driver or in conjunction with Timer driver The module initialisation can be done in the same function. Here an example:

// ---- when not using inconjunction with Timer driver ---- //
// create configuration
IfxCcu6_Icu_Config icuConfig;
IfxCcu6_Icu_initModuleConfig(&icuConfig, &MODULE_CCU60);
// configure the frequency of the timer in case of internal start
icuConfig.frequency = 400000;
// configure the period of the timer
icuConfig.period = 100;
// configure the clock for internal mode
icuConfig.clock.extClockEnabled = FALSE;
icuConfig.clock.extClockInput = NULL_PTR;
icuConfig.clock.countingInputMode = IfxCcu6_CountingInputMode_internal;
// configure count operation
icuConfig.countMode = IfxCcu6_T12CountMode_edgeAligned;
icuConfig.counterValue = 0;
// initialize the module
IfxCcu6_Icu_initModule(&icu, &icuConfig);
// -------------------------------------------------------- //
// ---- when not using inconjunction with Timer driver ---- //
// after initialising the timer
IfxCcu6_Timer timer;
IfxCcu6_TimerConfig timerConfig;
IfxCcu6_Timer_initModule(&timer, &timerConfig); // e.g. Timer 12 is specified previously in timerConfig.
// -------------------------------------------------------- //
// create Icu channel config
IfxCcu6_Icu_channelConfig icuChannelConfig;
IfxCcu6_Icu_initChannelConfig(&icuChannelConfig, &MODULE_CCU60);
// ---- when using inconjunction with Timer driver ---- //
icuChannelConfig.timer = (Timer*)&timer;
// ---------------------------------------------------- //
// configure the channel
icuChannelConfig.channelNumber = IfxCcu6_T12Channel_0;
icuChannelConfig.channelMode = IfxCcu6_T12ChannelMode_doubleRegisterCaptureRising;
// configure the interrupts
icuChannelConfig.interrupt1.interruptSource = IfxCcu6_InterruptSource_cc60RisingEdge;
icuChannelConfig.interrupt1.serviceRequest = IfxCcu6_ServiceRequest_2;
icuChannelConfig.interrupt1.priority = IFX_INTRPRIO_CCU6;
icuChannelConfig.interrupt1.typeOfService = IfxSrc_Tos_cpu0;
// ---- when not using inconjunction with Timer driver ---- //
// configure input and output triggers
icuChannelConfig.trigger.extInputTrigger = IfxCcu60_T12HRB_P00_7_IN;
icuChannelConfig.trigger.extInputTriggerMode = IfxCcu6_ExternalTriggerMode_risingEdge;
// -------------------------------------------------------- //
// pin configuration, in case of multi input capture mode select the respective CC6xIn and CCPOSxIn pins of the selected channel
const IfxCcu6_Icu_Pins pins = {
IfxCcu60_CC60INA_P02_0_IN, // CC60In pin
NULL, // CC61In pin not used
NULL, // CC62In pin not used
NULL, // CCPOS0In pin not used
NULL, // CCPOS1In pin not used
NULL, // CCPOS2In pin not used
IfxPort_InputMode_pullUp,
IfxPort_InputMode_pullUp
};
IcuConfig.pins = &pins;
// configure multi input capture mode
icuChannelConfig->multiInputCaptureEnabled = FALSE;
// initialize the channel
IfxCcu6_Icu_initChannel(&icuChannel, &icuChannelConfig);

The Icu is ready for use now!

Control

The ICU driver provides simple to use Capture Control functions

This means: you can start and stop the capture process, and you can also get a time stamp at any point of time during the capture process

Start Capture

IfxCcu6_Icu_startCapture(&icuChannel);

Stop Capture

IfxCcu6_Icu_stopCapture(&icuChannel);

Get time stamp at any point of time during the capture process (can also be used in ISR)

// assumed to be declared globally
// uint32 timeStamp[100] = 0;
// store the time stamp in an array
timeStamp[i] = IfxCcu6_Icu_getTimeStamp(&icuChannel);


iLLD_TC38A: Data Structures

Data Structures
Data Structures
iLLD » CCU6 » ICU Interface driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxCcu6_Icu_Clock
Structure for clock configuration. More...
struct | IfxCcu6_Icu_InterruptConfig
Structure for interrupt configuration. More...
struct | IfxCcu6_Icu_Pins
Structure for capture input pins. More...
struct | IfxCcu6_Icu_TriggerConfig
Configuration structure for external triggers. More...
struct | IfxCcu6_Icu
Module handle. More...
struct | IfxCcu6_Icu_Channel
Channel handle. More...
struct | IfxCcu6_Icu_ChannelConfig
Configuration structure of the channel. More...
struct | IfxCcu6_Icu_Config
Configuration structure of the module. More...

Detailed Description

Data Structure Documentation

◆ IfxCcu6_Icu_Clock

struct IfxCcu6_Icu_Clock

Structure for clock configuration.

Definition at line 247 of file IfxCcu6_Icu.h.

Collaboration diagram for IfxCcu6_Icu_Clock:
[legend]
Data Fields
IfxCcu6_CountingInputMode | countingInputMode | Input event leading to a counting action of the timer T12.
boolean | extClockEnabled | external clock enable / disable selection
IfxCcu6_T12hr_In * | extClockInput | External input signal selection for timer 12.

◆ IfxCcu6_Icu_InterruptConfig

struct IfxCcu6_Icu_InterruptConfig

Structure for interrupt configuration.

Definition at line 256 of file IfxCcu6_Icu.h.

Data Fields
uint16 | priority | Interrupt priority.
IfxCcu6_ServiceRequest | serviceRequest | Selection of service request outputs.
IfxCcu6_InterruptSource | source | Interrupt source selection.
IfxSrc_Tos | typeOfService | type of interrupt service

◆ IfxCcu6_Icu_Pins

struct IfxCcu6_Icu_Pins

Structure for capture input pins.

Definition at line 266 of file IfxCcu6_Icu.h.

Collaboration diagram for IfxCcu6_Icu_Pins:
[legend]
Data Fields
IFX_CONST IfxCcu6_Cc60in_In * | cc60In | CC60 input signal.
IFX_CONST IfxCcu6_Cc61in_In * | cc61In | CC61 input signal.
IFX_CONST IfxCcu6_Cc62in_In * | cc62In | CC62 input signal.
IfxPort_InputMode | cc6xInputMode | The CC6x pin input mode which should be configured.
IFX_CONST IfxCcu6_Ccpos0_In * | ccpos0 | CCPOS0 input signal.
IFX_CONST IfxCcu6_Ccpos1_In * | ccpos1 | CCPOS2 input signal.
IFX_CONST IfxCcu6_Ccpos2_In * | ccpos2 | CCPOS2 input signal.
IfxPort_InputMode | ccposxInputMode | The CCPOSx pin input mode which should be configured.
IfxPort_PadDriver | pinDriver | Pad Driver.
IFX_CONST IfxCcu6_T12hr_In * | t12hr | T12HR input signal.
IFX_CONST IfxCcu6_T13hr_In * | t13hr | T13HR input signal.
IfxPort_InputMode | t1xhrInputMode | The T1xHR pin input mode which should be configured.

◆ IfxCcu6_Icu_TriggerConfig

struct IfxCcu6_Icu_TriggerConfig

Configuration structure for external triggers.

Definition at line 284 of file IfxCcu6_Icu.h.

Collaboration diagram for IfxCcu6_Icu_TriggerConfig:
[legend]
Data Fields
IfxCcu6_T12hr_In * | extInputTrigger | External input signal selection for timer.
IfxCcu6_ExternalTriggerMode | extInputTriggerMode | Event of signal T12HR that can set the run bit T12R by HW.

◆ IfxCcu6_Icu

struct IfxCcu6_Icu

Module handle.

Definition at line 296 of file IfxCcu6_Icu.h.

Data Fields
float32 | captureFrequency | Configured CCU6 capture frequency ( set to 0 for external counting mode)
Ifx_CCU6 * | ccu6 | Pointer to the base of CCU6 registers.

◆ IfxCcu6_Icu_Channel

struct IfxCcu6_Icu_Channel

Channel handle.

Definition at line 304 of file IfxCcu6_Icu.h.

Collaboration diagram for IfxCcu6_Icu_Channel:
[legend]
Data Fields
Icu | base | Base ICU object.
Ifx_CCU6 * | ccu6 | Pointer to the base of CCU6 registers.
IfxCcu6_T12Channel | channelId | Capture compare channel of the Timer12.
IfxCcu6_T12ChannelMode | channelMode | The operating mode for the T12 channel.
IfxCcu6_Icu_TriggerConfig | trigger | Structure for trigger configuration.

◆ IfxCcu6_Icu_ChannelConfig

struct IfxCcu6_Icu_ChannelConfig

Configuration structure of the channel.

Definition at line 315 of file IfxCcu6_Icu.h.

Collaboration diagram for IfxCcu6_Icu_ChannelConfig:
[legend]
Data Fields
Icu_Config | base | Base configuration.
Ifx_CCU6 * | ccu6 | Pointer to the base of CCU6 registers.
IfxCcu6_T12Channel | channelId | Capture compare channel of the Timer12.
IfxCcu6_T12ChannelMode | channelMode | The operating mode for the T12 channel.
IfxCcu6_Icu_InterruptConfig | interrupt1 | Structure for first interrupt configuration.
IfxCcu6_Icu_InterruptConfig | interrupt2 | Structure for second interrupt configuration.
IfxCcu6_Icu_InterruptConfig | interrupt3 | Structure for third interrupt configuration.
IfxCcu6_Icu_InterruptConfig | interrupt4 | Structure for fourth interrupt configuration.
boolean | multiInputCaptureEnabled | Choice of multi input capture.
IfxCcu6_Icu_Pins * | pins | Structure for capture input pins.
IfxCcu6_Timer | timer | Timer handle.
IfxCcu6_Icu_TriggerConfig | trigger | Structure for trigger configuration.

◆ IfxCcu6_Icu_Config

struct IfxCcu6_Icu_Config

Configuration structure of the module.

Definition at line 333 of file IfxCcu6_Icu.h.

Collaboration diagram for IfxCcu6_Icu_Config:
[legend]
Data Fields
Ifx_CCU6 * | ccu6 | Pointer to the base of CCU6 registers.
IfxCcu6_Icu_Clock | clock | Structure for clock configuration.
uint16 | counterValue | 16-bit counter value of Timer12
IfxCcu6_T12CountMode | countMode | Operating mode of Timer 12.
float32 | frequency | Specify expected PWM frequency in Hertz.
Ifx_TimerValue | period | PWM period in ticks.


iLLD_TC38A: Module Initialize Functions

Functions
Module Initialize Functions
iLLD » CCU6 » ICU Interface driver
Collaboration diagram for Module Initialize Functions:

Functions

IFX_EXTERN void | IfxCcu6_Icu_initModule (IfxCcu6_Icu *icu, const IfxCcu6_Icu_Config *config)
Initialises the module with default configuration. More...
IFX_EXTERN void | IfxCcu6_Icu_initModuleConfig (IfxCcu6_Icu_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values. More...

Detailed Description

Function Documentation

◆ IfxCcu6_Icu_initModule()

IFX_EXTERN void IfxCcu6_Icu_initModule | ( | IfxCcu6_Icu * | icu,
 |  | const IfxCcu6_Icu_Config * | config
 | ) |  |

Initialises the module with default configuration.

Parameters
icu | Module handle
config | Configuration structure of the module
Returns
None

A coding example can be found in How to use the CCU6 ICU Interface driver?

Definition at line 228 of file IfxCcu6_Icu.c.

◆ IfxCcu6_Icu_initModuleConfig()

IFX_EXTERN void IfxCcu6_Icu_initModuleConfig | ( | IfxCcu6_Icu_Config * | config,
 |  | Ifx_CCU6 * | ccu6
 | ) |  |

Fills the config structure with default values.

Parameters
config | Configuration structure of the module
ccu6 | Pointer to the base of CCU6 registers
Returns
None

A coding example can be found in How to use the CCU6 ICU Interface driver?

Definition at line 291 of file IfxCcu6_Icu.c.


iLLD_TC38A: Capture Control Functions

Functions
Capture Control Functions
iLLD » CCU6 » ICU Interface driver
Collaboration diagram for Capture Control Functions:

Functions

IFX_EXTERN uint32 | IfxCcu6_Icu_getTimeStamp (IfxCcu6_Icu_Channel *channel)
Returns the cuurent value stored in the Compare Shadow register (current time stamp) More...
IFX_EXTERN void | IfxCcu6_Icu_startCapture (IfxCcu6_Icu_Channel *channel)
Starts the input capture. More...
IFX_EXTERN void | IfxCcu6_Icu_stopCapture (IfxCcu6_Icu_Channel *channel)
Stops the input capture. More...

Detailed Description

Function Documentation

◆ IfxCcu6_Icu_getTimeStamp()

IFX_EXTERN uint32 IfxCcu6_Icu_getTimeStamp ( IfxCcu6_Icu_Channel * channel )

Returns the cuurent value stored in the Compare Shadow register (current time stamp)

Parameters
channel Channel handle
Returns
timeStamp (cuurent CC6xSR register value)

A coding example can be found in How to use the CCU6 ICU Interface driver?

Definition at line 53 of file IfxCcu6_Icu.c.

Referenced by IfxCcu6_Icu_initChannel().

◆ IfxCcu6_Icu_startCapture()

IFX_EXTERN void IfxCcu6_Icu_startCapture ( IfxCcu6_Icu_Channel * channel )

Starts the input capture.

Parameters
channel Channel handle
Returns
None

A coding example can be found in How to use the CCU6 ICU Interface driver?

Definition at line 307 of file IfxCcu6_Icu.c.

Referenced by IfxCcu6_Icu_initChannel().

◆ IfxCcu6_Icu_stopCapture()

IFX_EXTERN void IfxCcu6_Icu_stopCapture ( IfxCcu6_Icu_Channel * channel )

Stops the input capture.

Parameters
channel Channel handle
Returns
None

A coding example can be found in How to use the CCU6 ICU Interface driver?

Definition at line 333 of file IfxCcu6_Icu.c.

Referenced by IfxCcu6_Icu_initChannel().


iLLD_TC38A: Channel Initialize Functions

Functions
Channel Initialize Functions
iLLD » CCU6 » ICU Interface driver
Collaboration diagram for Channel Initialize Functions:

Functions

IFX_EXTERN void | IfxCcu6_Icu_initChannel (IfxCcu6_Icu_Channel *channel, const IfxCcu6_Icu_ChannelConfig *channelConfig)
Initialises the channel. More...
IFX_EXTERN void | IfxCcu6_Icu_initChannelConfig (IfxCcu6_Icu_ChannelConfig *channelConfig, Ifx_CCU6 *ccu6)
Fills the channel config structure with default values. More...

Detailed Description

Function Documentation

◆ IfxCcu6_Icu_initChannel()

IFX_EXTERN void IfxCcu6_Icu_initChannel | ( | IfxCcu6_Icu_Channel * | channel,
 |  | const IfxCcu6_Icu_ChannelConfig * | channelConfig
 | ) |  |

Initialises the channel.

Parameters
channel | Channel handle
channelConfig | Configuration structure of the channel
Returns
None

A coding example can be found in How to use the CCU6 ICU Interface driver?

Definition at line 63 of file IfxCcu6_Icu.c.

◆ IfxCcu6_Icu_initChannelConfig()

IFX_EXTERN void IfxCcu6_Icu_initChannelConfig | ( | IfxCcu6_Icu_ChannelConfig * | channelConfig,
 |  | Ifx_CCU6 * | ccu6
 | ) |  |

Fills the channel config structure with default values.

Parameters
channelConfig | Configuration structure of the channel
ccu6 | Pointer to the base of CCU6 registers
Returns
None

A coding example can be found in How to use the CCU6 ICU Interface driver?

Definition at line 192 of file IfxCcu6_Icu.c.


iLLD_TC38A: PWMBC Interface driver

Modules
PWMBC Interface driver
iLLD » CCU6
Collaboration diagram for PWMBC Interface driver:

Modules

How to use the CCU6 PWMBC Interface driver?
Data Structures
Module Initialize Functions
Modulation Control Functions
Hall Pattern Functions

Detailed Description


iLLD_TC38A: How to use the CCU6 PWMBC Interface driver?

How to use the CCU6 PWMBC Interface driver?
iLLD » CCU6 » PWMBC Interface driver
Collaboration diagram for How to use the CCU6 PWMBC Interface driver?:

The PWMBC interface driver provides a default CCU6 configuration specifically for running a Brush Less DC Motor using hall sensor inputs, by utilising both the timers

After evaluating the hall input pattern at every T13 period match, new out pattern is given to the module after the phase delay at the T13 zero match

User has to prepare the control table for the respective motor he/she is using,

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Ccu6/PwmBc/IfxCcu6_PwmBc.h>

Variables

Declare the PWMBC handle and the motor control table as global variables in your C code:

// used globally
static IfxCcu6_PwmBc pwmBc;
// prepare the control table
uint8 controlTable[6][3] = {{1, 5, 17} ,
{2, 3, 36} ,
{3, 1, 6} ,
{4, 6, 18} ,
{5, 4, 24} ,
{6, 2, 9}};
// to store value of the speed
uint32 speed = 0;

Interrupt Handler Installation

See also How to define Interrupts?

Define priority for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:

// priorities are normally defined in Ifx_IntPrioDef.h
#define IFX_INTPRIO_CCU6 1

Add the interrupt service routine to your C code.

IFX_INTERRUPT(ccu60ISR_PwmBc, 0, IFX_INTPRIO_CCU6)
{
//user code
}

Finally install the interrupt handlers in your initialisation function:

// install interrupt handlers
IfxCpu_Irq_installInterruptHandler(&ccu60ISR_PwmBc, IFX_INTPRIO_CCU6);
IfxCpu_enableInterrupts();

Module Initialisation

The module initialisation can be done in the same function. Here an example:

// create configuration
IfxCcu6_PwmBc_Config pwmBcConfig;
IfxCcu6_PwmBc_initModuleConfig(&pwmBcConfig, &MODULE_CCU60);
// configure the frequencies of both the timers
pwmBcConfig.base.t12Frequency = 400000;
pwmBcConfig.base.t13Frequency = 400000;
// configure the periods of both the timers
pwmBcConfig.base.t12Period = 100;
pwmBcConfig.base.t13Period = 100;
// configure the phase delay and noise filter for hall input
pwmBcConfig.base.phaseDelay = 20;
pwmBcConfig.base.noiseFilter = 10;
// select the active state of the output
pwmBcConfig.base.activeState = Ifx_ActiveState_high;
// configure timer12
pwmBcConfig.timer12.countMode = IfxCcu6_T12CountMode_edgeAligned;
pwmBcConfig.timer12.counterValue = 0;
// configure timer13
pwmBcConfig.timer13.counterValue = 0;
pwmBcConfig.timer13.compareValue = 100;
// configure the syncronisation, in case of sync start with T12
pwmBcConfig.timer13.t12SyncEvent = IfxCcu6_T13TriggerEvent_onCC60RCompare;
pwmBcConfig.timer13.t12SyncDirection = IfxCcu6_T13TriggerDirection_onT12CountingUp;
// configure hall sync event that starts the hall input pattern evaluation
pwmBcConfig.hallSyncEvent = IfxCcu6_HallSensorTriggerMode_t13PM,
// configure multi channel control
pwmBcConfig.multiChannelControl.switchingSelect = IfxCcu6_MultiChannelSwitchingSelect_t12Channel1CompareMatch,
pwmBcConfig.multiChannelControl.switchingSync = IfxCcu6_MultiChannelSwitchingSync_t13ZeroMatch,
// pin configuration
const IfxCcu6_PwmBc_Pins pins = {
IfxCcu60_CC60_P02_0_OUT, // CC60Out pin
IfxCcu60_CC61_P02_2_OUT, // CC61Out pin
IfxCcu60_CC62_P02_4_OUT, // CC62Out pin
IfxCcu60_COUT60_P02_1_OUT, // COUT60 pin
IfxCcu60_COUT60_P02_3_OUT, // COUT61 pin
IfxCcu60_COUT60_P02_5_OUT, // COUT62 pin
NULL, // COUT63 pin not used
IfxCcu60_COUT60_P02_6_OUT // CCPOS0In pin
IfxCcu60_COUT60_P02_7_OUT // CCPOS1In pin
IfxCcu60_COUT60_P02_8_OUT // CCPOS2In pin
IfxPort_OutputMode_pushPull,
IfxPort_PadDriver_cmosAutomotiveSpeed1,
IfxPort_InputMode_pullUp
};
pwmBcConfig.pins = &pins;
// configure the interrupts
pwmBcConfig.interrupt1.interruptSource = IfxCcu6_InterruptSource_cc61FallingEdge;
pwmBcConfig.interrupt1.serviceRequest = IfxCcu6_ServiceRequest_2;
pwmBcConfig.interrupt1.priority = IFX_INTRPRIO_CCU6;
pwmBcConfig.interrupt1.typeOfService = IfxSrc_Tos_cpu0;
// configure input and output triggers
pwmBcConfig.trigger.t12ExtInputTrigger = NULL_PTR;
pwmBcConfig.trigger.t12ExtInputTriggerMode = IfxCcu6_ExternalTriggerMode_risingEdge;
pwmBcConfig.trigger.t13ExtInputTrigger = NULL_PTR;
pwmBcConfig.trigger.t13ExtInputTriggerMode = IfxCcu6_ExternalTriggerMode_risingEdge;
pwmBcConfig.trigger.t13InSyncWithT12 = FALSE;
pwmBcConfig.trigger.outputTriggerEnabled = TRUE;
pwmBcConfig.trigger.outputLine = IfxCcu6_TrigOut_0;
pwmBcConfig.trigger.outputTrigger = IfxCcu6_TrigSel_cout63;
// initialize the module
IfxCcu6_PwmBc_initModule(&pwmBc, &pwmBcConfig);

The PwmBc is ready for use now!

Modulation Control

The PWMBC driver provides simple to use Motor Control functions

This means: you can start, stop, the BLDC motor once the module is initialised with the appropriate configuration You can optionally get the speed of the motor at any point of time

Start the motor

IfxCcu6_PwmBc_start(&pwmBc);

Stop the motor

IfxCcu6_PwmBc_stop(&pwmBc);

Update the output pattern

// prepare the control table
// assumed to be declared globally
uint8 controlTable[6][3] = {{1, 5, 17} ,
{2, 3, 36} ,
{3, 1, 6} ,
{4, 6, 18} ,
{5, 4, 24} ,
{6, 2, 9}};
// update the output pattern
IfxCcu6_PwmBc_updateHallPattern(&pwmBc, controlTable[6][3]);

Get the current motor speed (can also be called in ISR)

// assumed to be declared globally
uint32 speed = 0;
// get the current motor speed
speed = IfxCcu6_PwmBc_getMotorSpeed(&pwmBc);


iLLD_TC38A: Data Structures

Data Structures
Data Structures
iLLD » CCU6 » PWMBC Interface driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxCcu6_PwmBc_InterruptConfig
Structure for interrupt configuration. More...
struct | IfxCcu6_PwmBc_MultiChannelControl
Structure for multichannel mode control. More...
struct | IfxCcu6_PwmBc_Pins
Structure for CCU6 output pin configuration. More...
struct | IfxCcu6_PwmBc_Timer12
Structure for Timer 12. More...
struct | IfxCcu6_PwmBc_Timer13
Structure for Timer 13. More...
struct | IfxCcu6_PwmBc_TriggerConfig
Configuration structure for external triggers. More...
struct | IfxCcu6_PwmBc
Module handle. More...
struct | IfxCcu6_PwmBc_Config
Configuration structure of the module. More...

Detailed Description

Data Structure Documentation

◆ IfxCcu6_PwmBc_InterruptConfig

struct IfxCcu6_PwmBc_InterruptConfig

Structure for interrupt configuration.

Definition at line 272 of file IfxCcu6_PwmBc.h.

Data Fields
uint16 | priority | Interrupt priority.
IfxCcu6_ServiceRequest | serviceRequest | Selection of service request outputs.
IfxCcu6_InterruptSource | source | Interrupt source selection.
IfxSrc_Tos | typeOfService | type of interrupt service

◆ IfxCcu6_PwmBc_MultiChannelControl

struct IfxCcu6_PwmBc_MultiChannelControl

Structure for multichannel mode control.

Definition at line 282 of file IfxCcu6_PwmBc.h.

Data Fields
IfxCcu6_MultiChannelSwitchingSelect | switchingSelect | Trigger request source (next multi-channel event) for the shadow transfer MCM_ST from MCMPS to MCMP.
IfxCcu6_MultiChannelSwitchingSync | switchingSync | Synchronization selection for the shadow transfer event MCM_ST.

◆ IfxCcu6_PwmBc_Pins

struct IfxCcu6_PwmBc_Pins

Structure for CCU6 output pin configuration.

Definition at line 290 of file IfxCcu6_PwmBc.h.

Collaboration diagram for IfxCcu6_PwmBc_Pins:
[legend]
Data Fields
IFX_CONST IfxCcu6_Cc60_Out * | cc60Out | CC60 compare output CC0.
IFX_CONST IfxCcu6_Cc61_Out * | cc61Out | CC61 compare output CC1.
IFX_CONST IfxCcu6_Cc62_Out * | cc62Out | CC62 compare output CC2.
IFX_CONST IfxCcu6_Ccpos0_In * | ccpos0 | CCPOS0 input signal.
IFX_CONST IfxCcu6_Ccpos1_In * | ccpos1 | CCPOS2 input signal.
IFX_CONST IfxCcu6_Ccpos2_In * | ccpos2 | CCPOS2 input signal.
IFX_CONST IfxCcu6_Cout60_Out * | cout60 | CC60 compare output COUT0.
IFX_CONST IfxCcu6_Cout61_Out * | cout61 | CC61 compare output COUT1.
IFX_CONST IfxCcu6_Cout62_Out * | cout62 | CC62 compare output COUT2.
IFX_CONST IfxCcu6_Cout63_Out * | cout63 | CC63 compare output COUT3.
IfxPort_InputMode | inputMode | The CCPOSx pin input mode which should be configured.
IfxPort_OutputMode | outputMode | The pin output mode which should be configured.
IfxPort_PadDriver | pinDriver | pad driver
IFX_CONST IfxCcu6_T12hr_In * | t12hr | T12HR input signal.
IFX_CONST IfxCcu6_T13hr_In * | t13hr | T13HR input signal.
IfxPort_InputMode | t1xhrInputMode | The T1xHR pin input mode which should be configured.

◆ IfxCcu6_PwmBc_Timer12

struct IfxCcu6_PwmBc_Timer12

Structure for Timer 12.

Definition at line 312 of file IfxCcu6_PwmBc.h.

Data Fields
uint16 | counterValue | 16-bit counter value of Timer12
IfxCcu6_T12CountMode | countMode | Operating mode of Timer 12.

◆ IfxCcu6_PwmBc_Timer13

struct IfxCcu6_PwmBc_Timer13

Structure for Timer 13.

Definition at line 320 of file IfxCcu6_PwmBc.h.

Data Fields
uint16 | compareValue | 16-bit comapre value of Timer12
uint16 | counterValue | 16-bit counter value of Timer13
IfxCcu6_T13TriggerDirection | t12SyncDirection | Additional information to control trigger event selection.
IfxCcu6_T13TriggerEvent | t12SyncEvent | T12 sync trigger event to start T13.

◆ IfxCcu6_PwmBc_TriggerConfig

struct IfxCcu6_PwmBc_TriggerConfig

Configuration structure for external triggers.

Definition at line 330 of file IfxCcu6_PwmBc.h.

Collaboration diagram for IfxCcu6_PwmBc_TriggerConfig:
[legend]
Data Fields
IfxCcu6_TrigOut | outputLine | Trigger out selection.
IfxCcu6_TrigSel | outputTrigger | Trigger selection.
boolean | outputTriggerEnabled | Output trigger connection to VADC enable / disable choice.
IfxCcu6_T12hr_In * | t12ExtInputTrigger | External input signal selection for timer 12.
IfxCcu6_ExternalTriggerMode | t12ExtInputTriggerMode | Event of signal T12HR that can set the run bit T12R by HW.
IfxCcu6_T13hr_In * | t13ExtInputTrigger | External input signal selection for timer 13.
IfxCcu6_ExternalTriggerMode | t13ExtInputTriggerMode | Event of signal T13HR that can set the run bit T13R by HW.
boolean | t13InSyncWithT12 | Selection of Timer 13 start in sync with T12.

◆ IfxCcu6_PwmBc

struct IfxCcu6_PwmBc

Module handle.

Definition at line 348 of file IfxCcu6_PwmBc.h.

Collaboration diagram for IfxCcu6_PwmBc:
[legend]
Data Fields
PwmHl | base | Base PWMHL object.
Ifx_CCU6 * | ccu6 | Pointer to the base of CCU6 registers.
uint8 | hallPatternIndex | Hall pattern index of motor control table.
IfxCcu6_PwmBc_TriggerConfig | trigger | Structure for trigger configuration.

◆ IfxCcu6_PwmBc_Config

struct IfxCcu6_PwmBc_Config

Configuration structure of the module.

Definition at line 358 of file IfxCcu6_PwmBc.h.

Collaboration diagram for IfxCcu6_PwmBc_Config:
[legend]
Data Fields
PwmHl_Config | base | Base configuration.
Ifx_CCU6 * | ccu6 | Pointer to the base of CCU6 registers.
uint8 | hallPatternIndex | Hall pattern index of motor control table.
IfxCcu6_HallSensorTriggerMode | hallSyncEvent | Hall pattern evaluation trigger selection (HSYNC)
IfxCcu6_PwmBc_InterruptConfig | interrupt1 | Structure for first interrupt configuration.
IfxCcu6_PwmBc_InterruptConfig | interrupt2 | Structure for second interrupt configuration.
IfxCcu6_PwmBc_InterruptConfig | interrupt3 | Structure for third interrupt configuration.
IfxCcu6_PwmBc_InterruptConfig | interrupt4 | Structure for fourth interrupt configuration.
IfxCcu6_PwmBc_MultiChannelControl | multiChannelControl | Structure for multichannel mode control.
IfxCcu6_PwmBc_Pins * | pins | Structure for CCU6 output pin configuration.
IfxCcu6_PwmBc_Timer12 | timer12 | Structure for Timer 12.
IfxCcu6_PwmBc_Timer13 | timer13 | Structure for Timer 13.
IfxCcu6_PwmBc_TriggerConfig | trigger | Structure for trigger configuration.


iLLD_TC38A: Module Initialize Functions

Functions
Module Initialize Functions
iLLD » CCU6 » PWMBC Interface driver
Collaboration diagram for Module Initialize Functions:

Functions

IFX_EXTERN void | IfxCcu6_PwmBc_initModule (IfxCcu6_PwmBc *pwmBc, const IfxCcu6_PwmBc_Config *config)
Initialises the module with default configuration. More...
IFX_EXTERN void | IfxCcu6_PwmBc_initModuleConfig (IfxCcu6_PwmBc_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values. More...

Detailed Description

Function Documentation

◆ IfxCcu6_PwmBc_initModule()

IFX_EXTERN void IfxCcu6_PwmBc_initModule | ( | IfxCcu6_PwmBc * | pwmBc,
 |  | const IfxCcu6_PwmBc_Config * | config
 | ) |  |

Initialises the module with default configuration.

Parameters
pwmBc | Module handle
config | Configuration structure of the module
Returns
None

A coding example can be found in How to use the CCU6 PWMBC Interface driver?

Definition at line 68 of file IfxCcu6_PwmBc.c.

◆ IfxCcu6_PwmBc_initModuleConfig()

IFX_EXTERN void IfxCcu6_PwmBc_initModuleConfig | ( | IfxCcu6_PwmBc_Config * | config,
 |  | Ifx_CCU6 * | ccu6
 | ) |  |

Fills the config structure with default values.

Parameters
config | Configuration structure of the module
ccu6 | Pointer to the base of CCU6 registers
Returns
None

A coding example can be found in How to use the CCU6 PWMBC Interface driver?

Definition at line 333 of file IfxCcu6_PwmBc.c.


iLLD_TC38A: Modulation Control Functions

Functions
Modulation Control Functions
iLLD » CCU6 » PWMBC Interface driver
Collaboration diagram for Modulation Control Functions:

Functions

IFX_EXTERN void | IfxCcu6_PwmBc_start (IfxCcu6_PwmBc *pwmBc)
Starts the Hall sensored based PWM. More...
IFX_EXTERN void | IfxCcu6_PwmBc_stop (IfxCcu6_PwmBc *pwmBc)
Stops the Hall sensored based PWM. More...

Detailed Description

Function Documentation

◆ IfxCcu6_PwmBc_start()

IFX_EXTERN void IfxCcu6_PwmBc_start ( IfxCcu6_PwmBc * pwmBc )

Starts the Hall sensored based PWM.

Parameters
pwmBc Module handle
Returns
None

A coding example can be found in How to use the CCU6 PWMBC Interface driver?

Definition at line 420 of file IfxCcu6_PwmBc.c.

Referenced by IfxCcu6_PwmBc_initModule().

◆ IfxCcu6_PwmBc_stop()

IFX_EXTERN void IfxCcu6_PwmBc_stop ( IfxCcu6_PwmBc * pwmBc )

Stops the Hall sensored based PWM.

Parameters
pwmBc Module handle
Returns
None

A coding example can be found in How to use the CCU6 PWMBC Interface driver?

Definition at line 473 of file IfxCcu6_PwmBc.c.

Referenced by IfxCcu6_PwmBc_initModule().


iLLD_TC38A: Hall Pattern Functions

Functions
Hall Pattern Functions
iLLD » CCU6 » PWMBC Interface driver
Collaboration diagram for Hall Pattern Functions:

Functions

IFX_EXTERN uint32 | IfxCcu6_PwmBc_getMotorSpeed (IfxCcu6_PwmBc *pwmBc)
returns the current motor speed More...
IFX_EXTERN void | IfxCcu6_PwmBc_updateHallPattern (IfxCcu6_PwmBc *pwmBc, uint8 controlTable[6][3])
Updates the Hall pattern. More...

Detailed Description

Function Documentation

◆ IfxCcu6_PwmBc_getMotorSpeed()

IFX_EXTERN uint32 IfxCcu6_PwmBc_getMotorSpeed ( IfxCcu6_PwmBc * pwmBc )

returns the current motor speed

Parameters
pwmBc Module handle
Returns
speed

A coding example can be found in How to use the CCU6 PWMBC Interface driver?

Definition at line 53 of file IfxCcu6_PwmBc.c.

Referenced by IfxCcu6_PwmBc_initModule().

◆ IfxCcu6_PwmBc_updateHallPattern()

IFX_EXTERN void IfxCcu6_PwmBc_updateHallPattern | ( | IfxCcu6_PwmBc * | pwmBc,
 |  | uint8 | controlTable[6][3]
 | ) |  |

Updates the Hall pattern.

Parameters
pwmBc | Module handle
controlTable | Motor Control table
Returns
None

A coding example can be found in How to use the CCU6 PWMBC Interface driver?

Definition at line 511 of file IfxCcu6_PwmBc.c.

Referenced by IfxCcu6_PwmBc_initModule().


iLLD_TC38A: PWM Interface Driver

Modules
PWM Interface Driver
iLLD » CCU6
Collaboration diagram for PWM Interface Driver:

Modules

How to use the CCU6 PWM Driver
Data Structures
PwmHl Functions
StdIf Functions

Detailed Description


iLLD_TC38A: How to use the CCU6 PWM Driver

How to use the CCU6 PWM Driver
iLLD » CCU6 » PWM Interface Driver
Collaboration diagram for How to use the CCU6 PWM Driver:

This driver implements the PWM functionalities as defined by Standard interface: Multi-channels, dual-complementary PWM interface. The user is free to use either the driver specific APIs below or to used the standard interface APIs.

Specific implementation

For a detailed configuration of the microcontroller, see IfxCcu6_PwmHl_init().


iLLD_TC38A: Data Structures

Data Structures
Data Structures
iLLD » CCU6 » PWM Interface Driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxCcu6_PwmHl_Base
Multi-channels PWM object definition (channels only) More...
struct | IfxCcu6_PwmHl_Config
CCU6: PWM HL configuration. More...
struct | IfxCcu6_PwmHl_Mode
Structure for PWM configuration. More...
struct | IfxCcu6_PwmHl_s
CCU6 PWM driver. More...

Detailed Description

Data Structure Documentation

◆ IfxCcu6_PwmHl_Base

struct IfxCcu6_PwmHl_Base

Multi-channels PWM object definition (channels only)

Definition at line 96 of file IfxCcu6_PwmHl.h.

Data Fields
Ifx_ActiveState | ccxActiveState | Top PWM active state.
uint8 | channelCount | Number of PWM channels, one channel is made of a top and bottom channel.
Ifx_ActiveState | coutxActiveState | Bottom PWM active state.
Ifx_TimerValue | deadtime | Dead time between the top and bottom channel in ticks.
boolean | inverted | Flag indicating the center aligned inverted mode (TRUE)
Ifx_TimerValue | maxPulse | internal parameter
Ifx_TimerValue | minPulse | minimum pulse that is output, shorter pulse time will be output as 0% duty cycle
Ifx_Pwm_Mode | mode | actual PWM mode
sint8 | setMode | A non zero flag indicates that the PWM mode is being modified.

◆ IfxCcu6_PwmHl_Config

struct IfxCcu6_PwmHl_Config

CCU6: PWM HL configuration.

Definition at line 115 of file IfxCcu6_PwmHl.h.

Collaboration diagram for IfxCcu6_PwmHl_Config:
[legend]
Data Fields
IfxStdIf_PwmHl_Config | base | PWM HL standard interface configuration.
IfxCcu6_Cc60_Out * | cc0 | CC0 channel used.
IfxCcu6_Cc61_Out * | cc1 | CC1 channel used.
IfxCcu6_Cc62_Out * | cc2 | CC2 channel used.
IfxCcu6_Cout60_Out * | cout0 | COUT0 channel used.
IfxCcu6_Cout61_Out * | cout1 | COUT1 channel used.
IfxCcu6_Cout62_Out * | cout2 | COUT2 channel used.
IfxCcu6_TimerWithTrigger * | timer | Pointer to the linked timer object.

◆ IfxCcu6_PwmHl_Mode

struct IfxCcu6_PwmHl_Mode

Structure for PWM configuration.

Definition at line 129 of file IfxCcu6_PwmHl.h.

Collaboration diagram for IfxCcu6_PwmHl_Mode:
[legend]
Data Fields
boolean | inverted | Inverted configuration for the selected mode.
Ifx_Pwm_Mode | mode | pwm mode
IfxCcu6_PwmHl_Update | update | update call back function for the selected mode

◆ IfxCcu6_PwmHl_s

struct IfxCcu6_PwmHl_s

CCU6 PWM driver.

Definition at line 138 of file IfxCcu6_PwmHl.h.

Collaboration diagram for IfxCcu6_PwmHl_s:
[legend]
Data Fields
IfxCcu6_PwmHl_Base | base | Multi-channels PWM object definition (channels only)
IfxCcu6_TimerWithTrigger * | timer | Pointer to the linked timer object.
IfxCcu6_PwmHl_Update | update | Update function for actual selected mode.


iLLD_TC38A: PwmHl Functions

Functions
PwmHl Functions
iLLD » CCU6 » PWM Interface Driver
Collaboration diagram for PwmHl Functions:

Functions

IFX_EXTERN boolean | IfxCcu6_PwmHl_init (IfxCcu6_PwmHl *driver, const IfxCcu6_PwmHl_Config *config)
Initializes the timer object. More...
IFX_EXTERN void | IfxCcu6_PwmHl_initConfig (IfxCcu6_PwmHl_Config *config)
Initialize the configuration structure to default. More...

Detailed Description

Function Documentation

◆ IfxCcu6_PwmHl_init()

IFX_EXTERN boolean IfxCcu6_PwmHl_init | ( | IfxCcu6_PwmHl * | driver,
 |  | const IfxCcu6_PwmHl_Config * | config
 | ) |  |

Initializes the timer object.

Note
To ensure that the channels counter are reset by the timer and do not overflow, leading to random signal on the output, the timer must be started before the call to this function. Initialise the CCU6 module for PWM generation of high- and low switches usage, e.g.
  • electric motor drive
  • half-bridge switches

It is assumed that the whole CCU6 module is only used for purposes mentioned at the IfxCcu6_PwmHl API. No part of CCU6 module is used for other purpose.

The timer used should configure the T12 as PWM base timer and T13 as trigger.

Parameters
driver | CCU6 PWM driver
config | CCU6 : PWM HL configuration
Returns
TRUE on success else FALSE
  • All T12 channels (0,1,2) are set in compare mode
  • Enable T12 modulation mode

Definition at line 201 of file IfxCcu6_PwmHl.c.

◆ IfxCcu6_PwmHl_initConfig()

IFX_EXTERN void IfxCcu6_PwmHl_initConfig ( IfxCcu6_PwmHl_Config * config )

Initialize the configuration structure to default.

Parameters
config Channel configuration. This parameter is Initialised by the function
Returns
None

Definition at line 290 of file IfxCcu6_PwmHl.c.


iLLD_TC38A: StdIf Functions

Functions
StdIf Functions
iLLD » CCU6 » PWM Interface Driver
Collaboration diagram for StdIf Functions:

Functions

IFX_STATIC void | IfxCcu6_PwmHl_disable (IfxCcu6_PwmHl *driver)
Turn-off the complementary PWM generation mode. More...
IFX_STATIC void | IfxCcu6_PwmHl_enable (IfxCcu6_PwmHl *driver)
Turn-on the complementary PWM generation mode. More...
IFX_STATIC void | IfxCcu6_PwmHl_setOutputPins (Ifx_CCU6 *module, const IfxCcu6_PwmHl_Config *config)
Sets up the output pins. More...
IFX_STATIC void | IfxCcu6_PwmHl_updateCenterAligned (IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in center aligned and center aligned inverted modes. More...
IFX_STATIC void | IfxCcu6_PwmHl_updateEdgeAligned (IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in edge aligned modes (left and right aligned) More...
IFX_STATIC void | IfxCcu6_PwmHl_updateOff (IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Set the outputs to inactive. More...
IFX_INLINE Ifx_ActiveState | IfxCcu6_PwmHl_invertActiveState (Ifx_ActiveState activeState)
Inverts the active state. More...
IFX_EXTERN float32 | IfxCcu6_PwmHl_getDeadtime (IfxCcu6_PwmHl *driver)
Returns the dead time. More...
IFX_EXTERN float32 | IfxCcu6_PwmHl_getMinPulse (IfxCcu6_PwmHl *driver)
Returns the minimum pulse. More...
IFX_EXTERN Ifx_Pwm_Mode | IfxCcu6_PwmHl_getMode (IfxCcu6_PwmHl *driver)
Returns Pwm mode. More...
IFX_EXTERN boolean | IfxCcu6_PwmHl_setDeadtime (IfxCcu6_PwmHl *driver, float32 deadtime)
Sets the dead time. More...
IFX_EXTERN boolean | IfxCcu6_PwmHl_setMinPulse (IfxCcu6_PwmHl *driver, float32 minPulse)
Sets the minimum pulse. More...
IFX_EXTERN boolean | IfxCcu6_PwmHl_setMode (IfxCcu6_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate() More...
IFX_EXTERN void | IfxCcu6_PwmHl_setOnTime (IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Sets the ON time Assign the ON time to the TOP channels. The ON time of the BOTTOM channels are complementary. More...
IFX_EXTERN void | IfxCcu6_PwmHl_setupChannels (IfxCcu6_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set channels which are generating PWM or in "stuck-at" state. More...
IFX_EXTERN boolean | IfxCcu6_PwmHl_stdIfPwmHlInit (IfxStdIf_PwmHl *stdif, IfxCcu6_PwmHl *driver)
Initialises the statndard interface Pwm. More...

Detailed Description

Function Documentation

◆ IfxCcu6_PwmHl_disable()

IFX_STATIC void IfxCcu6_PwmHl_disable ( IfxCcu6_PwmHl * driver )

Turn-off the complementary PWM generation mode.

Note
The changes are not applied until Timer->applyUpdate() is called.
This function will set the ON time to ZERO, overriding previous call to IfxCcu6_PwmHl_setOnTime().
This function will disable PWM in all channels, overriding previous call to IfxCcu6_PwmHl_setupChannels().
Parameters
driver CCU6 PWM driver
Returns
None
  • All TOP and BOTTOM channel (COUTx) states equals CC6xST

Definition at line 126 of file IfxCcu6_PwmHl.c.

Referenced by IfxCcu6_PwmHl_setMode().

◆ IfxCcu6_PwmHl_enable()

IFX_STATIC void IfxCcu6_PwmHl_enable ( IfxCcu6_PwmHl * driver )

Turn-on the complementary PWM generation mode.

Note
The changes are not applied until Timer->applyUpdate() is called.
This function will disable PWM in all channels, overriding previous call to IfxCcu6_PwmHl_setupChannels().
Parameters
driver CCU6 PWM driver
Returns
None
  • All TOP and BOTTOM channel (COUTx) states equals CC6xST

Definition at line 157 of file IfxCcu6_PwmHl.c.

Referenced by IfxCcu6_PwmHl_setMode().

◆ IfxCcu6_PwmHl_getDeadtime()

IFX_EXTERN float32 IfxCcu6_PwmHl_getDeadtime ( IfxCcu6_PwmHl * driver )

Returns the dead time.

Parameters
driver CCU6 PWM driver
Returns
Dead Time
See also
IfxStdIf_PwmHl_GetDeadtime

Definition at line 183 of file IfxCcu6_PwmHl.c.

Referenced by IfxCcu6_PwmHl_stdIfPwmHlInit().

◆ IfxCcu6_PwmHl_getMinPulse()

IFX_EXTERN float32 IfxCcu6_PwmHl_getMinPulse ( IfxCcu6_PwmHl * driver )

Returns the minimum pulse.

Parameters
driver CCU6 PWM driver
Returns
Min Pulse
See also
IfxStdIf_PwmHl_GetMinPulse

Definition at line 189 of file IfxCcu6_PwmHl.c.

Referenced by IfxCcu6_PwmHl_stdIfPwmHlInit().

◆ IfxCcu6_PwmHl_getMode()

IFX_EXTERN Ifx_Pwm_Mode IfxCcu6_PwmHl_getMode ( IfxCcu6_PwmHl * driver )

Returns Pwm mode.

Parameters
driver CCU6 PWM driver
Returns
Pwm mode
See also
IfxStdIf_PwmHl_GetMode

Definition at line 195 of file IfxCcu6_PwmHl.c.

Referenced by IfxCcu6_PwmHl_stdIfPwmHlInit().

◆ IfxCcu6_PwmHl_invertActiveState()

IFX_INLINE Ifx_ActiveState IfxCcu6_PwmHl_invertActiveState ( Ifx_ActiveState activeState )

Inverts the active state.

Parameters
activeState Active state
Returns
State

Definition at line 301 of file IfxCcu6_PwmHl.h.

◆ IfxCcu6_PwmHl_setDeadtime()

IFX_EXTERN boolean IfxCcu6_PwmHl_setDeadtime | ( | IfxCcu6_PwmHl * | driver,
 |  | float32 | deadtime
 | ) |  |

Sets the dead time.

Note
The changes are not applied until Timer->applyUpdate() is called.
Parameters
driver | CCU6 PWM driver
deadtime | Dead time value
Returns
TRUE on success else FALSE
See also
IfxStdIf_PwmHl_SetDeadtime

Definition at line 303 of file IfxCcu6_PwmHl.c.

Referenced by IfxCcu6_PwmHl_init(), and IfxCcu6_PwmHl_stdIfPwmHlInit().

◆ IfxCcu6_PwmHl_setMinPulse()

IFX_EXTERN boolean IfxCcu6_PwmHl_setMinPulse | ( | IfxCcu6_PwmHl * | driver,
 |  | float32 | minPulse
 | ) |  |

Sets the minimum pulse.

Parameters
driver | CCU6 PWM driver
minPulse | Minimum pulse
Returns
TRUE on success else FALSE
See also
IfxStdIf_PwmHl_SetMinPulse

Definition at line 314 of file IfxCcu6_PwmHl.c.

Referenced by IfxCcu6_PwmHl_init(), and IfxCcu6_PwmHl_stdIfPwmHlInit().

◆ IfxCcu6_PwmHl_setMode()

IFX_EXTERN boolean IfxCcu6_PwmHl_setMode | ( | IfxCcu6_PwmHl * | driver,
 |  | Ifx_Pwm_Mode | mode
 | ) |  |

Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate()

Parameters
driver | CCU6 PWM driver
mode | Pwm mode
Returns
TRUE on success else FALSE
See also
IfxStdIf_PwmHl_SetMode

Definition at line 325 of file IfxCcu6_PwmHl.c.

Referenced by IfxCcu6_PwmHl_init(), and IfxCcu6_PwmHl_stdIfPwmHlInit().

◆ IfxCcu6_PwmHl_setOnTime()

IFX_EXTERN void IfxCcu6_PwmHl_setOnTime | ( | IfxCcu6_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn
 | ) |  |

Sets the ON time Assign the ON time to the TOP channels. The ON time of the BOTTOM channels are complementary.

Note
The changes are not applied until Timer->applyUpdate() is called.
Parameters
driver | CCU6 PWM driver
tOn | ON time
Returns
None
See also
IfxStdIf_PwmHl_SetOnTime

Definition at line 357 of file IfxCcu6_PwmHl.c.

Referenced by IfxCcu6_PwmHl_disable(), IfxCcu6_PwmHl_stdIfPwmHlInit(), IfxCcu6_PwmHl_updateCenterAligned(), and IfxCcu6_PwmHl_updateEdgeAligned().

◆ IfxCcu6_PwmHl_setOutputPins()

IFX_STATIC void IfxCcu6_PwmHl_setOutputPins | ( | Ifx_CCU6 * | module,
 |  | const IfxCcu6_PwmHl_Config * | config
 | ) |  |

Sets up the output pins.

Parameters
module | Pointer to register base
config | CCU6 : PWM HL configuration
Returns
None

Definition at line 405 of file IfxCcu6_PwmHl.c.

Referenced by IfxCcu6_PwmHl_init().

◆ IfxCcu6_PwmHl_setupChannels()

IFX_EXTERN void IfxCcu6_PwmHl_setupChannels | ( | IfxCcu6_PwmHl * | driver,
 |  | boolean * | activeCh,
 |  | boolean * | stuckSt
 | ) |  |

Set channels which are generating PWM or in "stuck-at" state.

Note
The values for the parameters are arranged as follows: index = 0 –> phase 0 top index = 1 –> phase 0 bottom index = 2 –> phase 1 top index = 3 –> phase 1 bottom index = 4 –> phase 2 top index = 5 –> phase 2 bottom
Parameters
driver | CCU6 PWM driver
activeCh | Pointer to boolean array containing values for PWM channels. If FALSE, the channel will be in stuck-at state, else the channel will generate PWM.
stuckSt | Pointer to boolean array containing values for active channels. If FALSE, the stuck-at state is passive level, else the stuck-at state is active level.
Returns
None
See also
IfxStdIf_PwmHl_SetupChannels

Definition at line 441 of file IfxCcu6_PwmHl.c.

Referenced by IfxCcu6_PwmHl_disable(), and IfxCcu6_PwmHl_stdIfPwmHlInit().

◆ IfxCcu6_PwmHl_stdIfPwmHlInit()

IFX_EXTERN boolean IfxCcu6_PwmHl_stdIfPwmHlInit | ( | IfxStdIf_PwmHl * | stdif,
 |  | IfxCcu6_PwmHl * | driver
 | ) |  |

Initialises the statndard interface Pwm.

Parameters
stdif | Standard interface object, will be initialized by the function
driver | Interface driver to be used by the standard interface. must be initialised separately
Returns
TRUE on success else FALSE

Definition at line 477 of file IfxCcu6_PwmHl.c.

◆ IfxCcu6_PwmHl_updateCenterAligned()

IFX_STATIC void IfxCcu6_PwmHl_updateCenterAligned | ( | IfxCcu6_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn
 | ) |  |

Updates the x output duty cycle in center aligned and center aligned inverted modes.

Parameters
driver | CCU6 PWM driver
tOn | T on
Returns
None

Definition at line 500 of file IfxCcu6_PwmHl.c.

◆ IfxCcu6_PwmHl_updateEdgeAligned()

IFX_STATIC void IfxCcu6_PwmHl_updateEdgeAligned | ( | IfxCcu6_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn
 | ) |  |

Updates the x output duty cycle in edge aligned modes (left and right aligned)

Parameters
driver | CCU6 PWM driver
tOn | T on
Returns
None

Definition at line 506 of file IfxCcu6_PwmHl.c.

◆ IfxCcu6_PwmHl_updateOff()

IFX_STATIC void IfxCcu6_PwmHl_updateOff | ( | IfxCcu6_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn
 | ) |  |

Set the outputs to inactive.

Parameters
driver | CCU6 PWM driver
tOn | T on
Returns
None

Definition at line 512 of file IfxCcu6_PwmHl.c.

Referenced by IfxCcu6_PwmHl_init().


iLLD_TC38A: TIMER Interface driver

Modules
TIMER Interface driver
iLLD » CCU6
Collaboration diagram for TIMER Interface driver:

Modules

How to use the CCU6 TIMER Interface driver?
Data Structures
Module Initialize Functions
Timer Control Functions

Detailed Description


iLLD_TC38A: How to use the CCU6 TIMER Interface driver?

How to use the CCU6 TIMER Interface driver?
iLLD » CCU6 » TIMER Interface driver
Collaboration diagram for How to use the CCU6 TIMER Interface driver?:

The TIMER interface driver provides a default CCU6 configuration for runnung the selected timer block.

User can select the various configuration options that hardware allows

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Ccu6/Timer/IfxCcu6_Timer.h>

Variables

Declare the TIMER handle as global variable in your C code:

// used globally
static IfxCcu6_Timer timer;

Interrupt Handler Installation

See also How to define Interrupts?

Define priority for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:

// priorities are normally defined in Ifx_IntPrioDef.h
#define IFX_INTPRIO_CCU6 1

Add the interrupt service routine to your C code.

IFX_INTERRUPT(ccu60ISR_Timer, 0, IFX_INTPRIO_CCU6)
{
//user code
}

Finally install the interrupt handlers in your initialisation function:

// install interrupt handlers
IfxCpu_Irq_installInterruptHandler(&ccu60ISR_Timer, IFX_INTPRIO_CCU6);
IfxCpu_enableInterrupts();

Module Initialisation

The module initialisation can be done in the same function. Here an example:

// create configuration
IfxCcu6_Timer_Config timerConfig;
IfxCcu6_Timer_initModuleConfig(&timerConfig, &MODULE_CCU60);
// configure the frequency of the timer in case of internal start
// this frequency will be set for the timer block selected later
timerConfig.base.frequency = 400000;
// configure the period of the timer
timerConfig.base.period = 100;
// configure the waiting time in case of delayed T13 start in sync with T12
timerConfig.base.waitingTime = 0;
// select the timer that needs to be started
timerConfig.timer = IfxCcu6_TimerId_t12;
// select the synchronous operation if both timers need to be start at the same time
// previous selection of timer block can be ignored in this mode
timerConfig.synchronousOperation = TRUE;
// configure the clock for internal mode
timerConfig.clock.t12ExtClockEnabled = FALSE;
timerConfig.clock.t12ExtClockInput = NULL_PTR;
timerConfig.clock.t12countingInputMode = IfxCcu6_CountingInputMode_internal;
// configure the selcted timer block
timerConfig.timer12.countMode = IfxCcu6_T12CountMode_edgeAligned;
timerConfig.timer12.counterValue = 0;
// configure the interrupts
timerConfig.interrupt1.interruptSource = IfxCcu6_InterruptSource_t12PeriodMatch;
timerConfig.interrupt1.serviceRequest = IfxCcu6_ServiceRequest_2;
timerConfig.interrupt1.priority = IFX_INTRPRIO_CCU6;
timerConfig.interrupt1.typeOfService = IfxSrc_Tos_cpu0;
// configure input and output triggers
timerConfig.trigger.t12ExtInputTrigger = IfxCcu60_T12HRB_P00_7_IN;
timerConfig.trigger.t13ExtInputTrigger = NULL_PTR;
timerConfig.trigger.extInputTriggerMode = IfxCcu6_ExternalTriggerMode_risingEdge;
timerConfig.trigger.t13InSyncWithT12 = FALSE;
// initialize the module
IfxCcu6_Timer_initModule(&timer, &timerConfig);

The Timer is ready for use now!

Control

The TIMER driver provides simple to use timer Control functions

This means: In addition to start and stop a single timer, you can start and stop both the timer blocks at the same time you can also run the timer in single shot mode and finally you an manually make the timer count each step

Start the timer

IfxCcu6_Timer_start(&timer);

Stop the timer

IfxCcu6_Timer_stop(&timer);

Start both the timers synchronously, when the synchronousOperation mode is selected in the configuration

IfxCcu6_Timer_synchronousStart(&timer);

Stop both the timers synchronously, when the synchronousOperation mode is selected in the configuration

IfxCcu6_Timer_synchronousStop(&timer);

Start the selected timer in single shot mode

IfxCcu6_Timer_startSingleShotMode(&timer);

Make the timer count each step manually

uint8 i;
for (i=0; i<50; i++)
{
IfxCcu6_Timer_countOneStep(&timer);
}


iLLD_TC38A: Data Structures

Data Structures
Data Structures
iLLD » CCU6 » TIMER Interface driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxCcu6_Timer_Clock
Structure for clock configuration. More...
struct | IfxCcu6_Timer_InterruptConfig
Structure for interrupt configuration. More...
struct | IfxCcu6_Timer_Timer12
Structure for Timer 12. More...
struct | IfxCcu6_Timer_Timer13
Structure for Timer 13. More...
struct | IfxCcu6_Timer_TriggerConfig
Configuration structure for external triggers. More...
struct | IfxCcu6_Timer
Module handle. More...
struct | IfxCcu6_Timer_Config
Configuration structure of the module. More...

Detailed Description

Data Structure Documentation

◆ IfxCcu6_Timer_Clock

struct IfxCcu6_Timer_Clock

Structure for clock configuration.

Definition at line 231 of file IfxCcu6_Timer.h.

Collaboration diagram for IfxCcu6_Timer_Clock:
[legend]
Data Fields
IfxCcu6_CountingInputMode | t12countingInputMode | Input event leading to a counting action of the timer T12.
boolean | t12ExtClockEnabled | Timer 12 external clock enable / disable selection.
IfxCcu6_T12hr_In * | t12ExtClockInput | External input signal selection for timer 12.
IfxCcu6_CountingInputMode | t13countingInputMode | Input event leading to a counting action of the timer T13.
boolean | t13ExtClockEnabled | Timer 13 external clock enable / disable selection.
IfxCcu6_T13hr_In * | t13ExtClockInput | External input signal selection for timer 13.

◆ IfxCcu6_Timer_InterruptConfig

struct IfxCcu6_Timer_InterruptConfig

Structure for interrupt configuration.

Definition at line 243 of file IfxCcu6_Timer.h.

Data Fields
uint16 | priority | Interrupt priority.
IfxCcu6_ServiceRequest | serviceRequest | Selection of service request outputs.
IfxCcu6_InterruptSource | source | Interrupt source selection.
IfxSrc_Tos | typeOfService | type of interrupt service

◆ IfxCcu6_Timer_Timer12

struct IfxCcu6_Timer_Timer12

Structure for Timer 12.

Definition at line 253 of file IfxCcu6_Timer.h.

Data Fields
uint16 | counterValue | 16-bit counter value of Timer12
IfxCcu6_T12CountMode | countMode | Operating mode of Timer 12.

◆ IfxCcu6_Timer_Timer13

struct IfxCcu6_Timer_Timer13

Structure for Timer 13.

Definition at line 261 of file IfxCcu6_Timer.h.

Data Fields
uint16 | counterValue | 16-bit counter value of Timer13
IfxCcu6_T13TriggerDirection | t12SyncDirection | Additional information to control trigger event selection.
IfxCcu6_T13TriggerEvent | t12SyncEvent | T12 sync trigger event to start T13.

◆ IfxCcu6_Timer_TriggerConfig

struct IfxCcu6_Timer_TriggerConfig

Configuration structure for external triggers.

Definition at line 270 of file IfxCcu6_Timer.h.

Collaboration diagram for IfxCcu6_Timer_TriggerConfig:
[legend]
Data Fields
IfxCcu6_ExternalTriggerMode | extInputTriggerMode | Event of signal T1xHR that can set the run bit T1xR by HW.
IfxCcu6_T12hr_In * | t12ExtInputTrigger | External input signal selection for timer 12.
IfxCcu6_T13hr_In * | t13ExtInputTrigger | External input signal selection for timer 13.
boolean | t13InSyncWithT12 | Selection of Timer 13 start in sync with T12.

◆ IfxCcu6_Timer

struct IfxCcu6_Timer

Module handle.

Definition at line 293 of file IfxCcu6_Timer.h.

Collaboration diagram for IfxCcu6_Timer:
[legend]
Data Fields
Timer | base | Base Timer object.
Ifx_CCU6 * | ccu6 | Pointer to the base of CCU6 registers.
IfxCcu6_TimerId | timer | Timer number (T12 / T13)
IfxCcu6_Timer_TriggerConfig | trigger | Structure for trigger configuration.

◆ IfxCcu6_Timer_Config

struct IfxCcu6_Timer_Config

Configuration structure of the module.

Definition at line 303 of file IfxCcu6_Timer.h.

Collaboration diagram for IfxCcu6_Timer_Config:
[legend]
Data Fields
Timer_Config | base | Base configuration.
Ifx_CCU6 * | ccu6 | Pointer to the base of CCU6 registers.
IfxCcu6_Timer_Clock | clock | Structure for clock configuration.
IfxCcu6_Timer_InterruptConfig | interrupt1 | Structure for first interrupt configuration.
IfxCcu6_Timer_InterruptConfig | interrupt2 | Structure for second interrupt configuration.
IfxCcu6_Timer_InterruptConfig | interrupt3 | Structure for third interrupt configuration.
IfxCcu6_Timer_InterruptConfig | interrupt4 | Structure for fourth interrupt configuration.
IfxCcu6_Timer_Pins * | pins | Structure for CCU6 output pin configuration.
boolean | synchronousOperation | Synchronous operation selection (starting / stopping both the timers at the same time)
IfxCcu6_TimerId | timer | Timer number (T12 / T13)
IfxCcu6_Timer_Timer12 | timer12 | Structure for Timer 12.
IfxCcu6_Timer_Timer13 | timer13 | Structure for Timer 13.
IfxCcu6_Timer_TriggerConfig | trigger | Structure for trigger configuration.


iLLD_TC38A: Module Initialize Functions

Functions
Module Initialize Functions
iLLD » CCU6 » TIMER Interface driver
Collaboration diagram for Module Initialize Functions:

Functions

IFX_EXTERN void | IfxCcu6_Timer_initModule (IfxCcu6_Timer *timer, const IfxCcu6_Timer_Config *config)
Initialises the module with default configuration. More...
IFX_EXTERN void | IfxCcu6_Timer_initModuleConfig (IfxCcu6_Timer_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values. More...

Detailed Description

Function Documentation

◆ IfxCcu6_Timer_initModule()

IFX_EXTERN void IfxCcu6_Timer_initModule | ( | IfxCcu6_Timer * | timer,
 |  | const IfxCcu6_Timer_Config * | config
 | ) |  |

Initialises the module with default configuration.

Parameters
timer | Module handle
config | Configuration structure of the module
Returns
None

A coding example can be found in How to use the CCU6 TIMER Interface driver?

Definition at line 76 of file IfxCcu6_Timer.c.

◆ IfxCcu6_Timer_initModuleConfig()

IFX_EXTERN void IfxCcu6_Timer_initModuleConfig | ( | IfxCcu6_Timer_Config * | config,
 |  | Ifx_CCU6 * | ccu6
 | ) |  |

Fills the config structure with default values.

Parameters
config | Configuration structure of the module
ccu6 | Pointer to the base of CCU6 registers
Returns
None

A coding example can be found in How to use the CCU6 TIMER Interface driver?

Definition at line 280 of file IfxCcu6_Timer.c.


iLLD_TC38A: Timer Control Functions

Functions
Timer Control Functions
iLLD » CCU6 » TIMER Interface driver
Collaboration diagram for Timer Control Functions:

Functions

IFX_EXTERN void | IfxCcu6_Timer_countOneStep (IfxCcu6_Timer *timer)
Counts the timer one step. More...
IFX_EXTERN void | IfxCcu6_Timer_start (IfxCcu6_Timer *timer)
Starts the timer. More...
IFX_EXTERN void | IfxCcu6_Timer_startSingleShotMode (IfxCcu6_Timer *timer)
Starts the single shot mode of the timer. More...
IFX_EXTERN void | IfxCcu6_Timer_stop (IfxCcu6_Timer *timer)
Stops the timer. More...
IFX_EXTERN void | IfxCcu6_Timer_synchronousStart (IfxCcu6_Timer *timer)
Starts both the timers together. More...
IFX_EXTERN void | IfxCcu6_Timer_synchronousStop (IfxCcu6_Timer *timer)
Starts both the timers together. More...

Detailed Description

Function Documentation

◆ IfxCcu6_Timer_countOneStep()

IFX_EXTERN void IfxCcu6_Timer_countOneStep ( IfxCcu6_Timer * timer )

Counts the timer one step.

Parameters
timer Module handle
Returns
None

A coding example can be found in How to use the CCU6 TIMER Interface driver?

Definition at line 53 of file IfxCcu6_Timer.c.

Referenced by IfxCcu6_Timer_initModule().

◆ IfxCcu6_Timer_start()

IFX_EXTERN void IfxCcu6_Timer_start ( IfxCcu6_Timer * timer )

Starts the timer.

Parameters
timer Module handle
Returns
None

A coding example can be found in How to use the CCU6 TIMER Interface driver?

Definition at line 364 of file IfxCcu6_Timer.c.

Referenced by IfxCcu6_Timer_initModule().

◆ IfxCcu6_Timer_startSingleShotMode()

IFX_EXTERN void IfxCcu6_Timer_startSingleShotMode ( IfxCcu6_Timer * timer )

Starts the single shot mode of the timer.

Parameters
timer Module handle
Returns
None

A coding example can be found in How to use the CCU6 TIMER Interface driver?

Definition at line 419 of file IfxCcu6_Timer.c.

Referenced by IfxCcu6_Timer_initModule().

◆ IfxCcu6_Timer_stop()

IFX_EXTERN void IfxCcu6_Timer_stop ( IfxCcu6_Timer * timer )

Stops the timer.

Parameters
timer Module handle
Returns
None

A coding example can be found in How to use the CCU6 TIMER Interface driver?

Definition at line 479 of file IfxCcu6_Timer.c.

Referenced by IfxCcu6_Timer_initModule().

◆ IfxCcu6_Timer_synchronousStart()

IFX_EXTERN void IfxCcu6_Timer_synchronousStart ( IfxCcu6_Timer * timer )

Starts both the timers together.

Parameters
timer Module handle
Returns
None

A coding example can be found in How to use the CCU6 TIMER Interface driver?

Definition at line 524 of file IfxCcu6_Timer.c.

Referenced by IfxCcu6_Timer_initModule().

◆ IfxCcu6_Timer_synchronousStop()

IFX_EXTERN void IfxCcu6_Timer_synchronousStop ( IfxCcu6_Timer * timer )

Starts both the timers together.

Parameters
timer Module handle
Returns
None

A coding example can be found in How to use the CCU6 TIMER Interface driver?

Definition at line 534 of file IfxCcu6_Timer.c.

Referenced by IfxCcu6_Timer_initModule().


iLLD_TC38A: TimerWithTrigger Interface driver

Modules
TimerWithTrigger Interface driver
iLLD » CCU6
Collaboration diagram for TimerWithTrigger Interface driver:

Modules

How to use the CCU6 TimerWithTrigger Interface driver?
Data Structures
Timer StdIf Functions
Timer Functions

Detailed Description


iLLD_TC38A: How to use the CCU6 TimerWithTrigger Interface driver?

How to use the CCU6 TimerWithTrigger Interface driver?
iLLD » CCU6 » TimerWithTrigger Interface driver
Collaboration diagram for How to use the CCU6 TimerWithTrigger Interface driver?:

This driver implements the timer functionalities as defined by Standard interface: Timer. The user is free to use either the driver specific APIs below or to used the standard interface APIs.


iLLD_TC38A: Data Structures

Data Structures
Data Structures
iLLD » CCU6 » TimerWithTrigger Interface driver
Collaboration diagram for Data Structures:

Data Structures

struct IfxCcu6_TimerWithTrigger_Base
Structure for the timer base. More...

Detailed Description

Data Structure Documentation

◆ IfxCcu6_TimerWithTrigger_Base

struct IfxCcu6_TimerWithTrigger_Base

Structure for the timer base.

Definition at line 75 of file IfxCcu6_TimerWithTrigger.h.

Data Fields
float32 | clockFreq | Timer input clock frequency (cached value)
IfxStdIf_Timer_CountDir | countDir | Timer counting mode.
Ifx_TimerValue | period | Timer period in ticks (cached value)
boolean | triggerEnabled | If TRUE, the trigger functionality is Initialised.


iLLD_TC38A: Timer StdIf Functions

Functions
Timer StdIf Functions
iLLD » CCU6 » TimerWithTrigger Interface driver
Collaboration diagram for Timer StdIf Functions:

Functions

IFX_EXTERN boolean | IfxCcu6_TimerWithTrigger_acknowledgeTimerIrq (IfxCcu6_TimerWithTrigger *driver)
Returns the timer event. More...
IFX_EXTERN boolean | IfxCcu6_TimerWithTrigger_acknowledgeTriggerIrq (IfxCcu6_TimerWithTrigger *driver)
Returns the trigger event. More...
IFX_EXTERN void | IfxCcu6_TimerWithTrigger_applyUpdate (IfxCcu6_TimerWithTrigger *driver)
Enable the transfer of the shadow registers. More...
IFX_EXTERN void | IfxCcu6_TimerWithTrigger_disableUpdate (IfxCcu6_TimerWithTrigger *driver)
Disables the upadte
This function is has an empty body as the updated is disabled automatically after the shadow transfer. More...
IFX_EXTERN float32 | IfxCcu6_TimerWithTrigger_getFrequency (IfxCcu6_TimerWithTrigger *driver)
Returns the frequency. More...
IFX_EXTERN float32 | IfxCcu6_TimerWithTrigger_getInputFrequency (IfxCcu6_TimerWithTrigger *driver)
Returns the Input frequncy. More...
IFX_EXTERN Ifx_TimerValue | IfxCcu6_TimerWithTrigger_getPeriod (IfxCcu6_TimerWithTrigger *driver)
Returns the period of the timer. More...
IFX_EXTERN float32 | IfxCcu6_TimerWithTrigger_getResolution (IfxCcu6_TimerWithTrigger *driver)
Returns the resolution. More...
IFX_EXTERN void | IfxCcu6_TimerWithTrigger_run (IfxCcu6_TimerWithTrigger *driver)
Runs the timer. More...
IFX_EXTERN boolean | IfxCcu6_TimerWithTrigger_setFrequency (IfxCcu6_TimerWithTrigger *driver, float32 frequency)
Sets the frequency. More...
IFX_EXTERN boolean | IfxCcu6_TimerWithTrigger_setPeriod (IfxCcu6_TimerWithTrigger *driver, Ifx_TimerValue period)
Sets the period for the timer. More...
IFX_EXTERN void | IfxCcu6_TimerWithTrigger_setSingleMode (IfxCcu6_TimerWithTrigger *driver, boolean enabled)
Sets the single shot mode of the timer. More...
IFX_EXTERN void | IfxCcu6_TimerWithTrigger_setTrigger (IfxCcu6_TimerWithTrigger *driver, Ifx_TimerValue triggerPoint)
Sets the trigger. More...
IFX_EXTERN boolean | IfxCcu6_TimerWithTrigger_stdIfTimerInit (IfxStdIf_Timer *stdif, IfxCcu6_TimerWithTrigger *driver)
Initializes the standard interface timer. More...
IFX_EXTERN void | IfxCcu6_TimerWithTrigger_stop (IfxCcu6_TimerWithTrigger *driver)
Stops the timer. More...
IFX_EXTERN void | IfxCcu6_TimerWithTrigger_updateInputFrequency (IfxCcu6_TimerWithTrigger *driver)
Updates the input frequency. More...

Detailed Description

Function Documentation

◆ IfxCcu6_TimerWithTrigger_acknowledgeTimerIrq()

IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_acknowledgeTimerIrq ( IfxCcu6_TimerWithTrigger * driver )

Returns the timer event.

Parameters
driver CCU6 Timer interface Handle
Returns
Timer event
See also
IfxStdIf_Timer_AckTimerIrq

Definition at line 55 of file IfxCcu6_TimerWithTrigger.c.

Referenced by IfxCcu6_TimerWithTrigger_stdIfTimerInit().

◆ IfxCcu6_TimerWithTrigger_acknowledgeTriggerIrq()

IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_acknowledgeTriggerIrq ( IfxCcu6_TimerWithTrigger * driver )

Returns the trigger event.

Parameters
driver CCU6 Timer interface Handle
Returns
Timer event
See also
IfxStdIf_Timer_AckTriggerIrq

Definition at line 71 of file IfxCcu6_TimerWithTrigger.c.

Referenced by IfxCcu6_TimerWithTrigger_stdIfTimerInit().

◆ IfxCcu6_TimerWithTrigger_applyUpdate()

IFX_EXTERN void IfxCcu6_TimerWithTrigger_applyUpdate ( IfxCcu6_TimerWithTrigger * driver )

Enable the transfer of the shadow registers.

Parameters
driver CCU6 Timer interface Handle
Returns
None
See also
IfxStdIf_Timer_ApplyUpdate

Definition at line 87 of file IfxCcu6_TimerWithTrigger.c.

Referenced by IfxCcu6_PwmHl_init(), IfxCcu6_TimerWithTrigger_init(), and IfxCcu6_TimerWithTrigger_stdIfTimerInit().

◆ IfxCcu6_TimerWithTrigger_disableUpdate()

IFX_EXTERN void IfxCcu6_TimerWithTrigger_disableUpdate ( IfxCcu6_TimerWithTrigger * driver )

Disables the upadte
This function is has an empty body as the updated is disabled automatically after the shadow transfer.

Parameters
driver CCU6 Timer interface Handle
Returns
None
See also
IfxStdIf_Timer_DisableUpdate

Definition at line 93 of file IfxCcu6_TimerWithTrigger.c.

Referenced by IfxCcu6_TimerWithTrigger_stdIfTimerInit().

◆ IfxCcu6_TimerWithTrigger_getFrequency()

IFX_EXTERN float32 IfxCcu6_TimerWithTrigger_getFrequency ( IfxCcu6_TimerWithTrigger * driver )

Returns the frequency.

Parameters
driver CCU6 Timer interface Handle
Returns
Frequency
See also
IfxStdIf_Timer_GetFrequency

Definition at line 99 of file IfxCcu6_TimerWithTrigger.c.

Referenced by IfxCcu6_TimerWithTrigger_stdIfTimerInit().

◆ IfxCcu6_TimerWithTrigger_getInputFrequency()

IFX_EXTERN float32 IfxCcu6_TimerWithTrigger_getInputFrequency ( IfxCcu6_TimerWithTrigger * driver )

Returns the Input frequncy.

Parameters
driver CCU6 Timer interface Handle
Returns
Frequency
See also
IfxStdIf_Timer_GetInputFrequency

Definition at line 105 of file IfxCcu6_TimerWithTrigger.c.

Referenced by IfxCcu6_TimerWithTrigger_stdIfTimerInit().

◆ IfxCcu6_TimerWithTrigger_getPeriod()

IFX_EXTERN Ifx_TimerValue IfxCcu6_TimerWithTrigger_getPeriod ( IfxCcu6_TimerWithTrigger * driver )

Returns the period of the timer.

Parameters
driver CCU6 Timer interface Handle
Returns
Period
See also
IfxStdIf_Timer_GetPeriod

Definition at line 111 of file IfxCcu6_TimerWithTrigger.c.

Referenced by IfxCcu6_TimerWithTrigger_stdIfTimerInit().

◆ IfxCcu6_TimerWithTrigger_getResolution()

IFX_EXTERN float32 IfxCcu6_TimerWithTrigger_getResolution ( IfxCcu6_TimerWithTrigger * driver )

Returns the resolution.

Parameters
driver CCU6 Timer interface Handle
Returns
Resolution
See also
IfxStdIf_Timer_GetResolution

Definition at line 123 of file IfxCcu6_TimerWithTrigger.c.

Referenced by IfxCcu6_TimerWithTrigger_stdIfTimerInit().

◆ IfxCcu6_TimerWithTrigger_run()

IFX_EXTERN void IfxCcu6_TimerWithTrigger_run ( IfxCcu6_TimerWithTrigger * driver )

Runs the timer.

Parameters
driver CCU6 Timer interface Handle
Returns
None
See also
IfxStdIf_Timer_Run

Definition at line 292 of file IfxCcu6_TimerWithTrigger.c.

Referenced by IfxCcu6_TimerWithTrigger_stdIfTimerInit().

◆ IfxCcu6_TimerWithTrigger_setFrequency()

IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_setFrequency | ( | IfxCcu6_TimerWithTrigger * | driver,
 |  | float32 | frequency
 | ) |  |

Sets the frequency.

Parameters
driver | CCU6 Timer interface Handle
frequency | Frequency
Returns
TRUE on success else FALSE
See also
IfxStdIf_Timer_SetFrequency

Definition at line 298 of file IfxCcu6_TimerWithTrigger.c.

Referenced by IfxCcu6_TimerWithTrigger_init(), and IfxCcu6_TimerWithTrigger_stdIfTimerInit().

◆ IfxCcu6_TimerWithTrigger_setPeriod()

IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_setPeriod | ( | IfxCcu6_TimerWithTrigger * | driver,
 |  | Ifx_TimerValue | period
 | ) |  |

Sets the period for the timer.

Parameters
driver | CCU6 Timer interface Handle
period | Period value
Returns
TRUE on success else FALSE
See also
IfxStdIf_Timer_SetPeriod

Definition at line 306 of file IfxCcu6_TimerWithTrigger.c.

Referenced by IfxCcu6_TimerWithTrigger_setFrequency(), and IfxCcu6_TimerWithTrigger_stdIfTimerInit().

◆ IfxCcu6_TimerWithTrigger_setSingleMode()

IFX_EXTERN void IfxCcu6_TimerWithTrigger_setSingleMode | ( | IfxCcu6_TimerWithTrigger * | driver,
 |  | boolean | enabled
 | ) |  |

Sets the single shot mode of the timer.

Parameters
driver | CCU6 Timer interface Handle
enabled | If TRUE, sets the single shot mode
Returns
None
See also
IfxStdIf_Timer_SetSingleMode

Definition at line 316 of file IfxCcu6_TimerWithTrigger.c.

Referenced by IfxCcu6_TimerWithTrigger_stdIfTimerInit().

◆ IfxCcu6_TimerWithTrigger_setTrigger()

IFX_EXTERN void IfxCcu6_TimerWithTrigger_setTrigger | ( | IfxCcu6_TimerWithTrigger * | driver,
 |  | Ifx_TimerValue | triggerPoint
 | ) |  |

Sets the trigger.

Parameters
driver | CCU6 Timer interface Handle
triggerPoint | Trigger point value
Returns
None
See also
IfxStdIf_Timer_SetTrigger

Definition at line 329 of file IfxCcu6_TimerWithTrigger.c.

Referenced by IfxCcu6_TimerWithTrigger_init(), and IfxCcu6_TimerWithTrigger_stdIfTimerInit().

◆ IfxCcu6_TimerWithTrigger_stdIfTimerInit()

IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_stdIfTimerInit | ( | IfxStdIf_Timer * | stdif,
 |  | IfxCcu6_TimerWithTrigger * | driver
 | ) |  |

Initializes the standard interface timer.

Parameters
stdif | Standard interface object, will be initialized by the function
driver | CCU6 Timer interface Handle
Returns
TRUE on success else FALSE

Definition at line 335 of file IfxCcu6_TimerWithTrigger.c.

Referenced by IfxCcu6_PwmHl_stdIfPwmHlInit().

◆ IfxCcu6_TimerWithTrigger_stop()

IFX_EXTERN void IfxCcu6_TimerWithTrigger_stop ( IfxCcu6_TimerWithTrigger * driver )

Stops the timer.

Parameters
driver CCU6 Timer interface Handle
Returns
None
See also
IfxStdIf_Timer_Stop

Definition at line 364 of file IfxCcu6_TimerWithTrigger.c.

Referenced by IfxCcu6_TimerWithTrigger_stdIfTimerInit().

◆ IfxCcu6_TimerWithTrigger_updateInputFrequency()

IFX_EXTERN void IfxCcu6_TimerWithTrigger_updateInputFrequency ( IfxCcu6_TimerWithTrigger * driver )

Updates the input frequency.

Parameters
driver CCU6 Timer interface Handle
Returns
None
See also
IfxStdIf_Timer_UpdateInputFrequency

Definition at line 370 of file IfxCcu6_TimerWithTrigger.c.

Referenced by IfxCcu6_TimerWithTrigger_init(), and IfxCcu6_TimerWithTrigger_stdIfTimerInit().


iLLD_TC38A: Timer Functions

Functions
Timer Functions
iLLD » CCU6 » TimerWithTrigger Interface driver
Collaboration diagram for Timer Functions:

Functions

IFX_EXTERN volatile uint32 * | IfxCcu6_TimerWithTrigger_getPointer (IfxCcu6_TimerWithTrigger *driver)
Returns the pointer to timer channel. More...
IFX_EXTERN boolean | IfxCcu6_TimerWithTrigger_init (IfxCcu6_TimerWithTrigger *driver, IfxCcu6_TimerWithTrigger_Config *config)
Initialises the timer object
T12 is configured as timer, T13 is optionally configured as trigger
T12CLK, T12PRE and T12PR are chosen to achieve maximum PWM resolution
Note: To achieve maximum PWM resolution, the requested T12 frequency should be the
lowest PWM frequency.
. More...
IFX_EXTERN void | IfxCcu6_TimerWithTrigger_initConfig (IfxCcu6_TimerWithTrigger_Config *config, Ifx_CCU6 *ccu6)
Initializes the configuration structure to default. More...

Detailed Description

Function Documentation

◆ IfxCcu6_TimerWithTrigger_getPointer()

IFX_EXTERN volatile uint32* IfxCcu6_TimerWithTrigger_getPointer ( IfxCcu6_TimerWithTrigger * driver )

Returns the pointer to timer channel.

Parameters
driver CCU6 Timer interface Handle
Returns
Pointer
See also
IfxStdIf_Timer_DisableUpdate

Definition at line 117 of file IfxCcu6_TimerWithTrigger.c.

◆ IfxCcu6_TimerWithTrigger_init()

IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_init | ( | IfxCcu6_TimerWithTrigger * | driver,
 |  | IfxCcu6_TimerWithTrigger_Config * | config
 | ) |  |

Initialises the timer object
T12 is configured as timer, T13 is optionally configured as trigger
T12CLK, T12PRE and T12PR are chosen to achieve maximum PWM resolution
Note: To achieve maximum PWM resolution, the requested T12 frequency should be the
lowest PWM frequency.
.

Parameters
driver | CCU6 Timer interface Handle
config | Configuration structure for Timer
Returns
TRUE on success else FALSE
  • Enable/initialise the CCU6 if it has not been enabled. See IfxCcu6_isModuleEnabled()

    Return values
    IfxCcu6_Stat_wrongPwmFreq if the T12 prescaler can't fulfill the required frequency
  • The T13 is used to generate additional PWM for internal trigger purpose (e.g. ADC) or external trigger purpose (e.g. sensor synchronisation).

Definition at line 129 of file IfxCcu6_TimerWithTrigger.c.

◆ IfxCcu6_TimerWithTrigger_initConfig()

IFX_EXTERN void IfxCcu6_TimerWithTrigger_initConfig | ( | IfxCcu6_TimerWithTrigger_Config * | config,
 |  | Ifx_CCU6 * | ccu6
 | ) |  |

Initializes the configuration structure to default.

Parameters
config | Configuration structure for Timer
ccu6 | Pointer to CCU6 module
Returns
None

Definition at line 282 of file IfxCcu6_TimerWithTrigger.c.


iLLD_TC38A: TPWM Interface driver

Modules
TPWM Interface driver
iLLD » CCU6
Collaboration diagram for TPWM Interface driver:

Modules

How to use the CCU6 TPWM Interface driver?
Data Structures
Module Initialize Functions
Modultion Control Functions

Detailed Description


iLLD_TC38A: How to use the CCU6 TPWM Interface driver?

How to use the CCU6 TPWM Interface driver?
iLLD » CCU6 » TPWM Interface driver
Collaboration diagram for How to use the CCU6 TPWM Interface driver?:

The TPWM interface driver provides a default CCU6 configuration for PWM modulation output through the selected timer block.

User can select the various configuration options that hardware allows

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Ccu6/TPwm/IfxCcu6_TPwm.h>

Variables

Declare the TPWM handle as global variable in your C code:

// used globally
static IfxCcu6_TPwm tPwm;

Interrupt Handler Installation

See also How to define Interrupts?

Define priority for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:

// priorities are normally defined in Ifx_IntPrioDef.h
#define IFX_INTPRIO_CCU6 1

Add the interrupt service routine to your C code.

IFX_INTERRUPT(ccu60ISR_TPwm, 0, IFX_INTPRIO_CCU6)
{
//user code
}

Finally install the interrupt handlers in your initialisation function:

// install interrupt handlers
IfxCpu_Irq_installInterruptHandler(&ccu60ISR_TPwm, IFX_INTPRIO_CCU6);
IfxCpu_enableInterrupts();

Module Initialisation

The module initialisation can be done in the same function. Here an example:

// create configuration
IfxCcu6_TPwm_Config tPwmConfig;
IfxCcu6_TPwm_initModuleConfig(&tPwmConfig, &MODULE_CCU60);
// configure the frequency of the timer in case of internal start
// this frequency will be set for the timer block selected later
tPwmConfig.base.frequency = 400000;
// configure the period of the timer
tPwmConfig.base.period = 100;
// configure the waiting time in case of delayed T13 start in sync with T12
tPwmConfig.base.waitingTime = 20;
// select the active state of the output
tPwmConfig.base.activeState = Ifx_ActiveState_high;
// select the timer through which PWM is to be generated
tPwmConfig.timer = IfxCcu6_TimerId_t13;
// configure the clock for internal mode
tPwmConfig.clock.t13ExtClockEnabled = FALSE;
tPwmConfig.clock.t13ExtClockInput = NULL_PTR;
tPwmConfig.clock.t13countingInputMode = IfxCcu6_CountingInputMode_internal;
// configure the selcted timer block
tPwmConfig.timer13.counterValue = 0;
tPwmConfig.timer13.compareValue = 100;
// configure the syncronisation, in case of sync start with T12
tPwmConfig.timer13.t12SyncEvent = IfxCcu6_T13TriggerEvent_onCC60RCompare;
tPwmConfig.timer13.t12SyncDirection = IfxCcu6_T13TriggerDirection_onT12CountingUp;
//select the channel out for modulation
tPwmConfig.channelOut = IfxCcu6_ChannelOut_cout3;
// pin configuration
const IfxCcu6_TPwm_Pins pins = {
NULL, // CC60Out pin not used
NULL, // CC61Out pin not used
NULL, // CC62Out pin not used
NULL, // COUT60 pin not used
NULL, // COUT61 pin not used
NULL, // COUT62 pin not used
IfxCcu60_COUT63_P00_0_OUT, // COUT63 pin
IfxPort_OutputMode_pushPull,
IfxPort_PadDriver_cmosAutomotiveSpeed1
};
tPwmConfig.pins = &pins;
// configure the interrupts
tPwmConfig.interrupt1.interruptSource = IfxCcu6_InterruptSource_t13CompareMatch;
tPwmConfig.interrupt1.serviceRequest = IfxCcu6_ServiceRequest_2;
tPwmConfig.interrupt1.priority = IFX_INTPRIO_CCU6;
tPwmConfig.interrupt1.typeOfService = IfxSrc_Tos_cpu0;
// configure input and output triggers
tPwmConfig.trigger.t12ExtInputTrigger = IfxCcu60_T12HRB_P00_7_IN;
tPwmConfig.trigger.t13ExtInputTrigger = NULL_PTR;
tPwmConfig.trigger.extInputTriggerMode = IfxCcu6_ExternalTriggerMode_risingEdge;
tPwmConfig.trigger.t13InSyncWithT12 = TRUE;
tPwmConfig.trigger.outputTriggerEnabled = TRUE;
tPwmConfig.trigger.outputLine = IfxCcu6_TrigOut_0;
tPwmConfig.trigger.outputTrigger = IfxCcu6_TrigSel_cout63;
// initialize the module
IfxCcu6_TPwm_initModule(&tPwm, &tPwmConfig);

The TPWM is ready for use now!

Modulation Control

The TPWM driver provides simple to use Modulation Control functions

This means: you can start, stop, pause and resume the modulation once the module is initialised with the appropriate configuration

Start the modulation

IfxCcu6_TPwm_start(&tPwm);

Stop the modulation

IfxCcu6_TPwm_stop(&tPwm);

Pause the modulation

IfxCcu6_TPwm_pause(&tPwm);

Resume the modulation

IfxCcu6_TPwm_resume(&tPwm);


iLLD_TC38A: Data Structures

Data Structures
Data Structures
iLLD » CCU6 » TPWM Interface driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxCcu6_TPwm_Clock
Structure for clock configuration. More...
struct | IfxCcu6_TPwm_InterruptConfig
Structure for interrupt configuration. More...
struct | IfxCcu6_TPwm_Pins
Structure for CCU6 output pin configuration. More...
struct | IfxCcu6_TPwm_Timer12
Structure for Timer 12. More...
struct | IfxCcu6_TPwm_Timer13
Structure for Timer 13. More...
struct | IfxCcu6_TPwm_TriggerConfig
Configuration structure for external triggers. More...
struct | IfxCcu6_TPwm
Module handle. More...
struct | IfxCcu6_TPwm_Config
Configuration structure of the module. More...

Detailed Description

Data Structure Documentation

◆ IfxCcu6_TPwm_Clock

struct IfxCcu6_TPwm_Clock

Structure for clock configuration.

Definition at line 229 of file IfxCcu6_TPwm.h.

Collaboration diagram for IfxCcu6_TPwm_Clock:
[legend]
Data Fields
IfxCcu6_CountingInputMode | t12countingInputMode | Input event leading to a counting action of the timer T12.
boolean | t12ExtClockEnabled | Timer 12 external clock enable / disable selection.
IfxCcu6_T12hr_In * | t12ExtClockInput | External input signal selection for timer 12.
IfxCcu6_CountingInputMode | t13countingInputMode | Input event leading to a counting action of the timer T13.
boolean | t13ExtClockEnabled | Timer 13 external clock enable / disable selection.
IfxCcu6_T13hr_In * | t13ExtClockInput | External input signal selection for timer 13.

◆ IfxCcu6_TPwm_InterruptConfig

struct IfxCcu6_TPwm_InterruptConfig

Structure for interrupt configuration.

Definition at line 241 of file IfxCcu6_TPwm.h.

Data Fields
uint16 | priority | Interrupt priority.
IfxCcu6_ServiceRequest | serviceRequest | Selection of service request outputs.
IfxCcu6_InterruptSource | source | Interrupt source selection.
IfxSrc_Tos | typeOfService | type of interrupt service

◆ IfxCcu6_TPwm_Pins

struct IfxCcu6_TPwm_Pins

Structure for CCU6 output pin configuration.

Definition at line 251 of file IfxCcu6_TPwm.h.

Collaboration diagram for IfxCcu6_TPwm_Pins:
[legend]
Data Fields
IFX_CONST IfxCcu6_Cc60_Out * | cc60Out | CC60 compare output CC0.
IFX_CONST IfxCcu6_Cc61_Out * | cc61Out | CC61 compare output CC1.
IFX_CONST IfxCcu6_Cc62_Out * | cc62Out | CC62 compare output CC2.
IFX_CONST IfxCcu6_Cout60_Out * | cout60 | CC60 compare output COUT0.
IFX_CONST IfxCcu6_Cout61_Out * | cout61 | CC61 compare output COUT1.
IFX_CONST IfxCcu6_Cout62_Out * | cout62 | CC62 compare output COUT2.
IFX_CONST IfxCcu6_Cout63_Out * | cout63 | CC63 compare output COUT3.
IfxPort_OutputMode | outputMode | The pin output mode which should be configured.
IfxPort_PadDriver | pinDriver | pad driver
IFX_CONST IfxCcu6_T12hr_In * | t12hr | T12HR input signal.
IFX_CONST IfxCcu6_T13hr_In * | t13hr | T13HR input signal.
IfxPort_InputMode | t1xhrInputMode | The T1xHR pin input mode which should be configured.

◆ IfxCcu6_TPwm_Timer12

struct IfxCcu6_TPwm_Timer12

Structure for Timer 12.

Definition at line 269 of file IfxCcu6_TPwm.h.

Data Fields
IfxCcu6_T12Channel | channelId | Capture compare channel of the Timer12.
IfxCcu6_T12ChannelMode | channelMode | The operating mode for the T12 channel.
IfxCcu6_TimerInputClock | clockInput | Input clock selection (prescaler)
uint16 | compareValue | 16-bit comapre value of Timer12
uint16 | counterValue | 16-bit counter value of Timer12
IfxCcu6_T12CountMode | countMode | Operating mode of Timer 12.
uint8 | deadTimeValue | Value of the dead time to be induced.

◆ IfxCcu6_TPwm_Timer13

struct IfxCcu6_TPwm_Timer13

Structure for Timer 13.

Definition at line 282 of file IfxCcu6_TPwm.h.

Data Fields
IfxCcu6_TimerInputClock | clockInput | Input clock selection (prescaler)
uint16 | compareValue | 16-bit comapre value of Timer12
uint16 | counterValue | 16-bit counter value of Timer13
IfxCcu6_T13TriggerDirection | t12SyncDirection | Additional information to control trigger event selection.
IfxCcu6_T13TriggerEvent | t12SyncEvent | T12 sync trigger event to start T13.

◆ IfxCcu6_TPwm_TriggerConfig

struct IfxCcu6_TPwm_TriggerConfig

Configuration structure for external triggers.

Definition at line 293 of file IfxCcu6_TPwm.h.

Collaboration diagram for IfxCcu6_TPwm_TriggerConfig:
[legend]
Data Fields
IfxCcu6_ExternalTriggerMode | extInputTriggerMode | Event of signal T1xHR that can set the run bit T1xR by HW.
IfxCcu6_TrigOut | outputLine | Trigger out selection.
IfxCcu6_TrigSel | outputTrigger | Output Trigger selection.
boolean | outputTriggerEnabled | Output trigger connection to VADC enable / disable choice.
IfxCcu6_T12hr_In * | t12ExtInputTrigger | External trigger input signal selection to start the timer 12.
IfxCcu6_T13hr_In * | t13ExtInputTrigger | External trigger input signal selection to start the timer 13.
boolean | t13InSyncWithT12 | Selection of Timer 13 start in sync with T12.

◆ IfxCcu6_TPwm

struct IfxCcu6_TPwm

Module handle.

Definition at line 310 of file IfxCcu6_TPwm.h.

Collaboration diagram for IfxCcu6_TPwm:
[legend]
Data Fields
TPwm | base | Base TPWM object.
Ifx_CCU6 * | ccu6 | Pointer to the base of CCU6 registers.
IfxCcu6_ChannelOut | channelOut | Capture compare output pin selection.
IfxCcu6_TimerId | timer | Timer number (T12 / T13)
IfxCcu6_TPwm_TriggerConfig | trigger | Structure for trigger configuration.

◆ IfxCcu6_TPwm_Config

struct IfxCcu6_TPwm_Config

Configuration structure of the module.

Definition at line 321 of file IfxCcu6_TPwm.h.

Collaboration diagram for IfxCcu6_TPwm_Config:
[legend]
Data Fields
TPwm_Config | base | Base configuration.
Ifx_CCU6 * | ccu6 | Pointer to the base of CCU6 registers.
IfxCcu6_ChannelOut | channelOut | Capture compare output pin selection.
IfxCcu6_TPwm_Clock | clock | Structure for clock configuration.
IfxCcu6_TPwm_InterruptConfig | interrupt1 | Structure for first interrupt configuration.
IfxCcu6_TPwm_InterruptConfig | interrupt2 | Structure for second interrupt configuration.
IfxCcu6_TPwm_InterruptConfig | interrupt3 | Structure for third interrupt configuration.
IfxCcu6_TPwm_InterruptConfig | interrupt4 | Structure for fourth interrupt configuration.
IfxCcu6_TPwm_Pins * | pins | Structure for CCU6 output pin configuration.
IfxCcu6_TimerId | timer | Timer number (T12 / T13)
IfxCcu6_TPwm_Timer12 | timer12 | Structure for Timer 12.
IfxCcu6_TPwm_Timer13 | timer13 | Structure for Timer 13.
IfxCcu6_TPwm_TriggerConfig | trigger | Structure for trigger configuration.


iLLD_TC38A: Module Initialize Functions

Functions
Module Initialize Functions
iLLD » CCU6 » TPWM Interface driver
Collaboration diagram for Module Initialize Functions:

Functions

IFX_EXTERN void IfxCcu6_TPwm_initModuleConfig (IfxCcu6_TPwm_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values. More...

Detailed Description

Function Documentation

◆ IfxCcu6_TPwm_initModuleConfig()

IFX_EXTERN void IfxCcu6_TPwm_initModuleConfig | ( | IfxCcu6_TPwm_Config * | config,
 |  | Ifx_CCU6 * | ccu6
 | ) |  |

Fills the config structure with default values.

Parameters
config | Configuration structure of the module
ccu6 | Pointer to the base of CCU6 registers
Returns
None

A coding example can be found in How to use the CCU6 TPWM Interface driver?

Definition at line 342 of file IfxCcu6_TPwm.c.


iLLD_TC38A: Modultion Control Functions

Functions
Modultion Control Functions
iLLD » CCU6 » TPWM Interface driver
Collaboration diagram for Modultion Control Functions:

Functions

IFX_EXTERN void | IfxCcu6_TPwm_initModule (IfxCcu6_TPwm *tPwm, const IfxCcu6_TPwm_Config *config)
Initialises the module with default configuration. More...
IFX_EXTERN void | IfxCcu6_TPwm_pause (IfxCcu6_TPwm *tPwm)
Pauses the triggered PWM. More...
IFX_EXTERN void | IfxCcu6_TPwm_resume (IfxCcu6_TPwm *tPwm)
Resumes the triggered PWM. More...
IFX_EXTERN void | IfxCcu6_TPwm_start (IfxCcu6_TPwm *tPwm)
Starts the triggered PWM. More...
IFX_EXTERN void | IfxCcu6_TPwm_stop (IfxCcu6_TPwm *tPwm)
Stops the triggered PWM. More...

Detailed Description

Function Documentation

◆ IfxCcu6_TPwm_initModule()

IFX_EXTERN void IfxCcu6_TPwm_initModule | ( | IfxCcu6_TPwm * | tPwm,
 |  | const IfxCcu6_TPwm_Config * | config
 | ) |  |

Initialises the module with default configuration.

Parameters
tPwm | Module handle
config | Configuration structure of the module
Returns
None

A coding example can be found in How to use the CCU6 TPWM Interface driver?

Definition at line 53 of file IfxCcu6_TPwm.c.

◆ IfxCcu6_TPwm_pause()

IFX_EXTERN void IfxCcu6_TPwm_pause ( IfxCcu6_TPwm * tPwm )

Pauses the triggered PWM.

Parameters
tPwm Module handle
Returns
None

A coding example can be found in How to use the CCU6 TPWM Interface driver?

Definition at line 435 of file IfxCcu6_TPwm.c.

Referenced by IfxCcu6_TPwm_initModule().

◆ IfxCcu6_TPwm_resume()

IFX_EXTERN void IfxCcu6_TPwm_resume ( IfxCcu6_TPwm * tPwm )

Resumes the triggered PWM.

Parameters
tPwm Module handle
Returns
None

A coding example can be found in How to use the CCU6 TPWM Interface driver?

Definition at line 441 of file IfxCcu6_TPwm.c.

Referenced by IfxCcu6_TPwm_initModule().

◆ IfxCcu6_TPwm_start()

IFX_EXTERN void IfxCcu6_TPwm_start ( IfxCcu6_TPwm * tPwm )

Starts the triggered PWM.

Parameters
tPwm Module handle
Returns
None

A coding example can be found in How to use the CCU6 TPWM Interface driver?

Definition at line 447 of file IfxCcu6_TPwm.c.

Referenced by IfxCcu6_TPwm_initModule().

◆ IfxCcu6_TPwm_stop()

IFX_EXTERN void IfxCcu6_TPwm_stop ( IfxCcu6_TPwm * tPwm )

Stops the triggered PWM.

Parameters
tPwm Module handle
Returns
None

A coding example can be found in How to use the CCU6 TPWM Interface driver?

Definition at line 502 of file IfxCcu6_TPwm.c.

Referenced by IfxCcu6_TPwm_initModule().


iLLD_TC38A: IfxCcu6_cfg.h File Reference

  • _Impl
Macros | Enumerations | Variables
IfxCcu6_cfg.h File Reference
iLLD » CCU6

CCU6 on-chip implementation data. More...

#include "Cpu/Std/Ifx_Types.h"
#include "IfxCcu6_reg.h"
#include "IfxCcu6_bf.h"
Include dependency graph for IfxCcu6_cfg.h:

Go to the source code of this file.

Macros

#define | IFXCCU6_NUM_MODULES (2)
#define | IFXCCU6_NUM_SERVICE_REQUESTS (4)
#define | IFXCCU6_NUM_T12_CHANNELS (3)
#define | IFXCCU6_NUM_T13_CHANNELS (1)

Enumerations

enum IfxCcu6_Index {
IfxCcu6_Index_none = -1,
IfxCcu6_Index_0 = 0,
IfxCcu6_Index_1
}
List of the available CCU6 resources. More...
enum IfxCcu6_TrigOut {
IfxCcu6_TrigOut_0 = IFX_CCU6_MOSEL_TRIG0SEL_OFF,
IfxCcu6_TrigOut_1 = IFX_CCU6_MOSEL_TRIG1SEL_OFF,
IfxCcu6_TrigOut_2 = IFX_CCU6_MOSEL_TRIG2SEL_OFF
}
enum IfxCcu6_TrigSel {
IfxCcu6_TrigSel_cout63 = 0,
IfxCcu6_TrigSel_cc60 = 1,
IfxCcu6_TrigSel_cc61 = 1,
IfxCcu6_TrigSel_cc62 = 1,
IfxCcu6_TrigSel_sr1 = 2,
IfxCcu6_TrigSel_sr3 = 3
}

Variables

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxCcu6_cfg_indexMap [IFXCCU6_NUM_MODULES]

Detailed Description

CCU6 on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCcu6_cfg.h.

Macro Definition Documentation

◆ IFXCCU6_NUM_MODULES

#define IFXCCU6_NUM_MODULES (2)

Definition at line 66 of file IfxCcu6_cfg.h.

Referenced by IfxCcu6_getAddress(), and IfxCcu6_getIndex().

◆ IFXCCU6_NUM_SERVICE_REQUESTS

#define IFXCCU6_NUM_SERVICE_REQUESTS (4)

Definition at line 68 of file IfxCcu6_cfg.h.

◆ IFXCCU6_NUM_T12_CHANNELS

#define IFXCCU6_NUM_T12_CHANNELS (3)

Definition at line 70 of file IfxCcu6_cfg.h.

◆ IFXCCU6_NUM_T13_CHANNELS

#define IFXCCU6_NUM_T13_CHANNELS (1)

Definition at line 72 of file IfxCcu6_cfg.h.

Enumeration Type Documentation

◆ IfxCcu6_Index

enum IfxCcu6_Index

List of the available CCU6 resources.

Enumerator
IfxCcu6_Index_none | Not Selected.
IfxCcu6_Index_0 | CCU6 index 0.
IfxCcu6_Index_1 | CCU6 index 1.

Definition at line 80 of file IfxCcu6_cfg.h.

◆ IfxCcu6_TrigOut

enum IfxCcu6_TrigOut
Enumerator
IfxCcu6_TrigOut_0 | Output Trigger Select for CCU6061 TRIG0.
IfxCcu6_TrigOut_1 | Output Trigger Select for CCU6061 TRIG1.
IfxCcu6_TrigOut_2 | Output Trigger Select for CCU6061 TRIG2.

Definition at line 87 of file IfxCcu6_cfg.h.

◆ IfxCcu6_TrigSel

enum IfxCcu6_TrigSel
Enumerator
IfxCcu6_TrigSel_cout63
IfxCcu6_TrigSel_cc60
IfxCcu6_TrigSel_cc61
IfxCcu6_TrigSel_cc62
IfxCcu6_TrigSel_sr1
IfxCcu6_TrigSel_sr3

Definition at line 94 of file IfxCcu6_cfg.h.

Variable Documentation

◆ IfxCcu6_cfg_indexMap

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxCcu6_cfg_indexMap[IFXCCU6_NUM_MODULES]

Definition at line 108 of file IfxCcu6_cfg.h.


iLLD_TC38A: IfxCcu6_PinMap.c File Reference

  • _PinMap
Variables
IfxCcu6_PinMap.c File Reference
iLLD » CCU6

CCU6 I/O map. More...

#include "IfxCcu6_PinMap.h"
Include dependency graph for IfxCcu6_PinMap.c:

Go to the source code of this file.

Variables

IfxCcu6_Cc60_Out | IfxCcu60_CC60_P02_0_OUT = {&MODULE_CCU60, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc60_Out | IfxCcu60_CC60_P02_6_OUT = {&MODULE_CCU60, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc60_Out | IfxCcu60_CC60_P11_12_OUT = {&MODULE_CCU60, {&MODULE_P11,12}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc60_Out | IfxCcu60_CC60_P15_6_OUT = {&MODULE_CCU60, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc60_Out | IfxCcu60_CC60_P34_2_OUT = {&MODULE_CCU60, {&MODULE_P34, 2}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc60_Out | IfxCcu61_CC60_P00_1_OUT = {&MODULE_CCU61, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc60_Out | IfxCcu61_CC60_P00_7_OUT = {&MODULE_CCU61, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc60_Out | IfxCcu61_CC60_P20_8_OUT = {&MODULE_CCU61, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc60_Out | IfxCcu61_CC60_P33_13_OUT = {&MODULE_CCU61, {&MODULE_P33,13}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc60in_In | IfxCcu60_CC60INA_P02_0_IN = {&MODULE_CCU60, {&MODULE_P02, 0}, Ifx_RxSel_a}
IfxCcu6_Cc60in_In | IfxCcu60_CC60INB_P00_1_IN = {&MODULE_CCU60, {&MODULE_P00, 1}, Ifx_RxSel_b}
IfxCcu6_Cc60in_In | IfxCcu60_CC60INC_P02_6_IN = {&MODULE_CCU60, {&MODULE_P02, 6}, Ifx_RxSel_c}
IfxCcu6_Cc60in_In | IfxCcu61_CC60INA_P00_1_IN = {&MODULE_CCU61, {&MODULE_P00, 1}, Ifx_RxSel_a}
IfxCcu6_Cc60in_In | IfxCcu61_CC60INB_P02_0_IN = {&MODULE_CCU61, {&MODULE_P02, 0}, Ifx_RxSel_b}
IfxCcu6_Cc60in_In | IfxCcu61_CC60INC_P00_7_IN = {&MODULE_CCU61, {&MODULE_P00, 7}, Ifx_RxSel_c}
IfxCcu6_Cc61_Out | IfxCcu60_CC61_P02_2_OUT = {&MODULE_CCU60, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc61_Out | IfxCcu60_CC61_P02_7_OUT = {&MODULE_CCU60, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc61_Out | IfxCcu60_CC61_P11_11_OUT = {&MODULE_CCU60, {&MODULE_P11,11}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc61_Out | IfxCcu60_CC61_P15_5_OUT = {&MODULE_CCU60, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc61_Out | IfxCcu60_CC61_P34_4_OUT = {&MODULE_CCU60, {&MODULE_P34, 4}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc61_Out | IfxCcu61_CC61_P00_3_OUT = {&MODULE_CCU61, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc61_Out | IfxCcu61_CC61_P00_8_OUT = {&MODULE_CCU61, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc61_Out | IfxCcu61_CC61_P20_9_OUT = {&MODULE_CCU61, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc61_Out | IfxCcu61_CC61_P33_11_OUT = {&MODULE_CCU61, {&MODULE_P33,11}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc61in_In | IfxCcu60_CC61INA_P02_2_IN = {&MODULE_CCU60, {&MODULE_P02, 2}, Ifx_RxSel_a}
IfxCcu6_Cc61in_In | IfxCcu60_CC61INB_P00_3_IN = {&MODULE_CCU60, {&MODULE_P00, 3}, Ifx_RxSel_b}
IfxCcu6_Cc61in_In | IfxCcu60_CC61INC_P02_7_IN = {&MODULE_CCU60, {&MODULE_P02, 7}, Ifx_RxSel_c}
IfxCcu6_Cc61in_In | IfxCcu61_CC61INA_P00_3_IN = {&MODULE_CCU61, {&MODULE_P00, 3}, Ifx_RxSel_a}
IfxCcu6_Cc61in_In | IfxCcu61_CC61INB_P02_2_IN = {&MODULE_CCU61, {&MODULE_P02, 2}, Ifx_RxSel_b}
IfxCcu6_Cc61in_In | IfxCcu61_CC61INC_P00_8_IN = {&MODULE_CCU61, {&MODULE_P00, 8}, Ifx_RxSel_c}
IfxCcu6_Cc62_Out | IfxCcu60_CC62_P02_4_OUT = {&MODULE_CCU60, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc62_Out | IfxCcu60_CC62_P02_8_OUT = {&MODULE_CCU60, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc62_Out | IfxCcu60_CC62_P11_10_OUT = {&MODULE_CCU60, {&MODULE_P11,10}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc62_Out | IfxCcu60_CC62_P15_4_OUT = {&MODULE_CCU60, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc62_Out | IfxCcu60_CC62_P33_14_OUT = {&MODULE_CCU60, {&MODULE_P33,14}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc62_Out | IfxCcu61_CC62_P00_5_OUT = {&MODULE_CCU61, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc62_Out | IfxCcu61_CC62_P00_9_OUT = {&MODULE_CCU61, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc62_Out | IfxCcu61_CC62_P20_10_OUT = {&MODULE_CCU61, {&MODULE_P20,10}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc62_Out | IfxCcu61_CC62_P33_9_OUT = {&MODULE_CCU61, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc62in_In | IfxCcu60_CC62INA_P02_4_IN = {&MODULE_CCU60, {&MODULE_P02, 4}, Ifx_RxSel_a}
IfxCcu6_Cc62in_In | IfxCcu60_CC62INB_P00_5_IN = {&MODULE_CCU60, {&MODULE_P00, 5}, Ifx_RxSel_b}
IfxCcu6_Cc62in_In | IfxCcu60_CC62INC_P02_8_IN = {&MODULE_CCU60, {&MODULE_P02, 8}, Ifx_RxSel_c}
IfxCcu6_Cc62in_In | IfxCcu61_CC62INA_P00_5_IN = {&MODULE_CCU61, {&MODULE_P00, 5}, Ifx_RxSel_a}
IfxCcu6_Cc62in_In | IfxCcu61_CC62INB_P02_4_IN = {&MODULE_CCU61, {&MODULE_P02, 4}, Ifx_RxSel_b}
IfxCcu6_Cc62in_In | IfxCcu61_CC62INC_P00_9_IN = {&MODULE_CCU61, {&MODULE_P00, 9}, Ifx_RxSel_c}
IfxCcu6_Ccpos0_In | IfxCcu60_CCPOS0A_P02_6_IN = {&MODULE_CCU60, {&MODULE_P02, 6}, Ifx_RxSel_a}
IfxCcu6_Ccpos0_In | IfxCcu60_CCPOS0C_P10_4_IN = {&MODULE_CCU60, {&MODULE_P10, 4}, Ifx_RxSel_c}
IfxCcu6_Ccpos0_In | IfxCcu60_CCPOS0D_P40_0_IN = {&MODULE_CCU60, {&MODULE_P40, 0}, Ifx_RxSel_d}
IfxCcu6_Ccpos0_In | IfxCcu61_CCPOS0A_P00_7_IN = {&MODULE_CCU61, {&MODULE_P00, 7}, Ifx_RxSel_a}
IfxCcu6_Ccpos0_In | IfxCcu61_CCPOS0C_P33_7_IN = {&MODULE_CCU61, {&MODULE_P33, 7}, Ifx_RxSel_c}
IfxCcu6_Ccpos0_In | IfxCcu61_CCPOS0D_P40_5_IN = {&MODULE_CCU61, {&MODULE_P40, 5}, Ifx_RxSel_d}
IfxCcu6_Ccpos1_In | IfxCcu60_CCPOS1A_P02_7_IN = {&MODULE_CCU60, {&MODULE_P02, 7}, Ifx_RxSel_a}
IfxCcu6_Ccpos1_In | IfxCcu60_CCPOS1B_P40_1_IN = {&MODULE_CCU60, {&MODULE_P40, 1}, Ifx_RxSel_b}
IfxCcu6_Ccpos1_In | IfxCcu60_CCPOS1C_P10_7_IN = {&MODULE_CCU60, {&MODULE_P10, 7}, Ifx_RxSel_c}
IfxCcu6_Ccpos1_In | IfxCcu60_CCPOS1D_P40_2_IN = {&MODULE_CCU60, {&MODULE_P40, 2}, Ifx_RxSel_d}
IfxCcu6_Ccpos1_In | IfxCcu61_CCPOS1A_P00_8_IN = {&MODULE_CCU61, {&MODULE_P00, 8}, Ifx_RxSel_a}
IfxCcu6_Ccpos1_In | IfxCcu61_CCPOS1B_P40_6_IN = {&MODULE_CCU61, {&MODULE_P40, 6}, Ifx_RxSel_b}
IfxCcu6_Ccpos1_In | IfxCcu61_CCPOS1C_P33_6_IN = {&MODULE_CCU61, {&MODULE_P33, 6}, Ifx_RxSel_c}
IfxCcu6_Ccpos1_In | IfxCcu61_CCPOS1D_P40_7_IN = {&MODULE_CCU61, {&MODULE_P40, 7}, Ifx_RxSel_d}
IfxCcu6_Ccpos2_In | IfxCcu60_CCPOS2A_P02_8_IN = {&MODULE_CCU60, {&MODULE_P02, 8}, Ifx_RxSel_a}
IfxCcu6_Ccpos2_In | IfxCcu60_CCPOS2B_P40_3_IN = {&MODULE_CCU60, {&MODULE_P40, 3}, Ifx_RxSel_b}
IfxCcu6_Ccpos2_In | IfxCcu60_CCPOS2C_P10_8_IN = {&MODULE_CCU60, {&MODULE_P10, 8}, Ifx_RxSel_c}
IfxCcu6_Ccpos2_In | IfxCcu60_CCPOS2D_P40_4_IN = {&MODULE_CCU60, {&MODULE_P40, 4}, Ifx_RxSel_d}
IfxCcu6_Ccpos2_In | IfxCcu61_CCPOS2A_P00_9_IN = {&MODULE_CCU61, {&MODULE_P00, 9}, Ifx_RxSel_a}
IfxCcu6_Ccpos2_In | IfxCcu61_CCPOS2B_P40_8_IN = {&MODULE_CCU61, {&MODULE_P40, 8}, Ifx_RxSel_b}
IfxCcu6_Ccpos2_In | IfxCcu61_CCPOS2C_P33_5_IN = {&MODULE_CCU61, {&MODULE_P33, 5}, Ifx_RxSel_c}
IfxCcu6_Ccpos2_In | IfxCcu61_CCPOS2D_P40_9_IN = {&MODULE_CCU61, {&MODULE_P40, 9}, Ifx_RxSel_d}
IfxCcu6_Cout60_Out | IfxCcu60_COUT60_P02_1_OUT = {&MODULE_CCU60, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout60_Out | IfxCcu60_COUT60_P11_9_OUT = {&MODULE_CCU60, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout60_Out | IfxCcu60_COUT60_P15_7_OUT = {&MODULE_CCU60, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout60_Out | IfxCcu60_COUT60_P34_3_OUT = {&MODULE_CCU60, {&MODULE_P34, 3}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout60_Out | IfxCcu61_COUT60_P00_2_OUT = {&MODULE_CCU61, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout60_Out | IfxCcu61_COUT60_P20_11_OUT = {&MODULE_CCU61, {&MODULE_P20,11}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout60_Out | IfxCcu61_COUT60_P33_12_OUT = {&MODULE_CCU61, {&MODULE_P33,12}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout61_Out | IfxCcu60_COUT61_P02_3_OUT = {&MODULE_CCU60, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout61_Out | IfxCcu60_COUT61_P11_6_OUT = {&MODULE_CCU60, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout61_Out | IfxCcu60_COUT61_P15_8_OUT = {&MODULE_CCU60, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout61_Out | IfxCcu60_COUT61_P34_5_OUT = {&MODULE_CCU60, {&MODULE_P34, 5}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout61_Out | IfxCcu61_COUT61_P00_4_OUT = {&MODULE_CCU61, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout61_Out | IfxCcu61_COUT61_P20_12_OUT = {&MODULE_CCU61, {&MODULE_P20,12}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout61_Out | IfxCcu61_COUT61_P33_10_OUT = {&MODULE_CCU61, {&MODULE_P33,10}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout62_Out | IfxCcu60_COUT62_P02_5_OUT = {&MODULE_CCU60, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout62_Out | IfxCcu60_COUT62_P11_3_OUT = {&MODULE_CCU60, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout62_Out | IfxCcu60_COUT62_P14_0_OUT = {&MODULE_CCU60, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout62_Out | IfxCcu60_COUT62_P33_15_OUT = {&MODULE_CCU60, {&MODULE_P33,15}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout62_Out | IfxCcu61_COUT62_P00_6_OUT = {&MODULE_CCU61, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout62_Out | IfxCcu61_COUT62_P20_13_OUT = {&MODULE_CCU61, {&MODULE_P20,13}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout62_Out | IfxCcu61_COUT62_P33_8_OUT = {&MODULE_CCU61, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout63_Out | IfxCcu60_COUT63_P00_0_OUT = {&MODULE_CCU60, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout63_Out | IfxCcu60_COUT63_P11_2_OUT = {&MODULE_CCU60, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout63_Out | IfxCcu60_COUT63_P14_1_OUT = {&MODULE_CCU60, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout63_Out | IfxCcu60_COUT63_P32_4_OUT = {&MODULE_CCU60, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout63_Out | IfxCcu60_COUT63_P34_1_OUT = {&MODULE_CCU60, {&MODULE_P34, 1}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout63_Out | IfxCcu61_COUT63_P00_10_OUT = {&MODULE_CCU61, {&MODULE_P00,10}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout63_Out | IfxCcu61_COUT63_P00_12_OUT = {&MODULE_CCU61, {&MODULE_P00,12}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout63_Out | IfxCcu61_COUT63_P20_7_OUT = {&MODULE_CCU61, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt7}
IfxCcu6_Ctrap_In | IfxCcu60_CTRAPA_P00_11_IN = {&MODULE_CCU60, {&MODULE_P00,11}, Ifx_RxSel_a}
IfxCcu6_Ctrap_In | IfxCcu61_CTRAPA_P00_0_IN = {&MODULE_CCU61, {&MODULE_P00, 0}, Ifx_RxSel_a}
IfxCcu6_Ctrap_In | IfxCcu61_CTRAPC_P33_4_IN = {&MODULE_CCU61, {&MODULE_P33, 4}, Ifx_RxSel_c}
IfxCcu6_T12hr_In | IfxCcu60_T12HRB_P00_7_IN = {&MODULE_CCU60, {&MODULE_P00, 7}, Ifx_RxSel_b}
IfxCcu6_T12hr_In | IfxCcu60_T12HRC_P00_9_IN = {&MODULE_CCU60, {&MODULE_P00, 9}, Ifx_RxSel_c}
IfxCcu6_T12hr_In | IfxCcu60_T12HRE_P00_0_IN = {&MODULE_CCU60, {&MODULE_P00, 0}, Ifx_RxSel_e}
IfxCcu6_T12hr_In | IfxCcu61_T12HRB_P02_6_IN = {&MODULE_CCU61, {&MODULE_P02, 6}, Ifx_RxSel_b}
IfxCcu6_T12hr_In | IfxCcu61_T12HRC_P02_8_IN = {&MODULE_CCU61, {&MODULE_P02, 8}, Ifx_RxSel_c}
IfxCcu6_T12hr_In | IfxCcu61_T12HRE_P00_11_IN = {&MODULE_CCU61, {&MODULE_P00,11}, Ifx_RxSel_e}
IfxCcu6_T13hr_In | IfxCcu60_T13HRB_P00_8_IN = {&MODULE_CCU60, {&MODULE_P00, 8}, Ifx_RxSel_b}
IfxCcu6_T13hr_In | IfxCcu60_T13HRC_P00_9_IN = {&MODULE_CCU60, {&MODULE_P00, 9}, Ifx_RxSel_c}
IfxCcu6_T13hr_In | IfxCcu61_T13HRB_P02_7_IN = {&MODULE_CCU61, {&MODULE_P02, 7}, Ifx_RxSel_b}
IfxCcu6_T13hr_In | IfxCcu61_T13HRC_P02_8_IN = {&MODULE_CCU61, {&MODULE_P02, 8}, Ifx_RxSel_c}
const IfxCcu6_Cc60_Out * | IfxCcu6_Cc60_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS]
const IfxCcu6_Cc60in_In * | IfxCcu6_Cc60in_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS]
const IfxCcu6_Cc61_Out * | IfxCcu6_Cc61_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS]
const IfxCcu6_Cc61in_In * | IfxCcu6_Cc61in_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS]
const IfxCcu6_Cc62_Out * | IfxCcu6_Cc62_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS]
const IfxCcu6_Cc62in_In * | IfxCcu6_Cc62in_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS]
const IfxCcu6_Ccpos0_In * | IfxCcu6_Ccpos0_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS]
const IfxCcu6_Ccpos1_In * | IfxCcu6_Ccpos1_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS]
const IfxCcu6_Ccpos2_In * | IfxCcu6_Ccpos2_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS]
const IfxCcu6_Cout60_Out * | IfxCcu6_Cout60_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS]
const IfxCcu6_Cout61_Out * | IfxCcu6_Cout61_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS]
const IfxCcu6_Cout62_Out * | IfxCcu6_Cout62_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS]
const IfxCcu6_Cout63_Out * | IfxCcu6_Cout63_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS]
const IfxCcu6_Ctrap_In * | IfxCcu6_Ctrap_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS]
const IfxCcu6_T12hr_In * | IfxCcu6_T12hr_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS]
const IfxCcu6_T13hr_In * | IfxCcu6_T13hr_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS]

Detailed Description

CCU6 I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCcu6_PinMap.c.

Variable Documentation

◆ IfxCcu60_CC60_P02_0_OUT

IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_0_OUT = {&MODULE_CCU60, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt7}

Definition at line 45 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC60_P02_6_OUT

IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_6_OUT = {&MODULE_CCU60, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt7}

Definition at line 46 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC60_P11_12_OUT

IfxCcu6_Cc60_Out IfxCcu60_CC60_P11_12_OUT = {&MODULE_CCU60, {&MODULE_P11,12}, IfxPort_OutputIdx_alt7}

Definition at line 47 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC60_P15_6_OUT

IfxCcu6_Cc60_Out IfxCcu60_CC60_P15_6_OUT = {&MODULE_CCU60, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt7}

Definition at line 48 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC60_P34_2_OUT

IfxCcu6_Cc60_Out IfxCcu60_CC60_P34_2_OUT = {&MODULE_CCU60, {&MODULE_P34, 2}, IfxPort_OutputIdx_alt7}

Definition at line 49 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC60INA_P02_0_IN

IfxCcu6_Cc60in_In IfxCcu60_CC60INA_P02_0_IN = {&MODULE_CCU60, {&MODULE_P02, 0}, Ifx_RxSel_a}

Definition at line 54 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC60INB_P00_1_IN

IfxCcu6_Cc60in_In IfxCcu60_CC60INB_P00_1_IN = {&MODULE_CCU60, {&MODULE_P00, 1}, Ifx_RxSel_b}

Definition at line 55 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC60INC_P02_6_IN

IfxCcu6_Cc60in_In IfxCcu60_CC60INC_P02_6_IN = {&MODULE_CCU60, {&MODULE_P02, 6}, Ifx_RxSel_c}

Definition at line 56 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC61_P02_2_OUT

IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_2_OUT = {&MODULE_CCU60, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt7}

Definition at line 60 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC61_P02_7_OUT

IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_7_OUT = {&MODULE_CCU60, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt7}

Definition at line 61 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC61_P11_11_OUT

IfxCcu6_Cc61_Out IfxCcu60_CC61_P11_11_OUT = {&MODULE_CCU60, {&MODULE_P11,11}, IfxPort_OutputIdx_alt7}

Definition at line 62 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC61_P15_5_OUT

IfxCcu6_Cc61_Out IfxCcu60_CC61_P15_5_OUT = {&MODULE_CCU60, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt7}

Definition at line 63 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC61_P34_4_OUT

IfxCcu6_Cc61_Out IfxCcu60_CC61_P34_4_OUT = {&MODULE_CCU60, {&MODULE_P34, 4}, IfxPort_OutputIdx_alt7}

Definition at line 64 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC61INA_P02_2_IN

IfxCcu6_Cc61in_In IfxCcu60_CC61INA_P02_2_IN = {&MODULE_CCU60, {&MODULE_P02, 2}, Ifx_RxSel_a}

Definition at line 69 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC61INB_P00_3_IN

IfxCcu6_Cc61in_In IfxCcu60_CC61INB_P00_3_IN = {&MODULE_CCU60, {&MODULE_P00, 3}, Ifx_RxSel_b}

Definition at line 70 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC61INC_P02_7_IN

IfxCcu6_Cc61in_In IfxCcu60_CC61INC_P02_7_IN = {&MODULE_CCU60, {&MODULE_P02, 7}, Ifx_RxSel_c}

Definition at line 71 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC62_P02_4_OUT

IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_4_OUT = {&MODULE_CCU60, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt7}

Definition at line 75 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC62_P02_8_OUT

IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_8_OUT = {&MODULE_CCU60, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt7}

Definition at line 76 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC62_P11_10_OUT

IfxCcu6_Cc62_Out IfxCcu60_CC62_P11_10_OUT = {&MODULE_CCU60, {&MODULE_P11,10}, IfxPort_OutputIdx_alt7}

Definition at line 77 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC62_P15_4_OUT

IfxCcu6_Cc62_Out IfxCcu60_CC62_P15_4_OUT = {&MODULE_CCU60, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt7}

Definition at line 78 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC62_P33_14_OUT

IfxCcu6_Cc62_Out IfxCcu60_CC62_P33_14_OUT = {&MODULE_CCU60, {&MODULE_P33,14}, IfxPort_OutputIdx_alt7}

Definition at line 79 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC62INA_P02_4_IN

IfxCcu6_Cc62in_In IfxCcu60_CC62INA_P02_4_IN = {&MODULE_CCU60, {&MODULE_P02, 4}, Ifx_RxSel_a}

Definition at line 84 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC62INB_P00_5_IN

IfxCcu6_Cc62in_In IfxCcu60_CC62INB_P00_5_IN = {&MODULE_CCU60, {&MODULE_P00, 5}, Ifx_RxSel_b}

Definition at line 85 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC62INC_P02_8_IN

IfxCcu6_Cc62in_In IfxCcu60_CC62INC_P02_8_IN = {&MODULE_CCU60, {&MODULE_P02, 8}, Ifx_RxSel_c}

Definition at line 86 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CCPOS0A_P02_6_IN

IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0A_P02_6_IN = {&MODULE_CCU60, {&MODULE_P02, 6}, Ifx_RxSel_a}

Definition at line 90 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CCPOS0C_P10_4_IN

IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0C_P10_4_IN = {&MODULE_CCU60, {&MODULE_P10, 4}, Ifx_RxSel_c}

Definition at line 91 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CCPOS0D_P40_0_IN

IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0D_P40_0_IN = {&MODULE_CCU60, {&MODULE_P40, 0}, Ifx_RxSel_d}

Definition at line 92 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CCPOS1A_P02_7_IN

IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1A_P02_7_IN = {&MODULE_CCU60, {&MODULE_P02, 7}, Ifx_RxSel_a}

Definition at line 96 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CCPOS1B_P40_1_IN

IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1B_P40_1_IN = {&MODULE_CCU60, {&MODULE_P40, 1}, Ifx_RxSel_b}

Definition at line 97 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CCPOS1C_P10_7_IN

IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1C_P10_7_IN = {&MODULE_CCU60, {&MODULE_P10, 7}, Ifx_RxSel_c}

Definition at line 98 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CCPOS1D_P40_2_IN

IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1D_P40_2_IN = {&MODULE_CCU60, {&MODULE_P40, 2}, Ifx_RxSel_d}

Definition at line 99 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CCPOS2A_P02_8_IN

IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2A_P02_8_IN = {&MODULE_CCU60, {&MODULE_P02, 8}, Ifx_RxSel_a}

Definition at line 104 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CCPOS2B_P40_3_IN

IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2B_P40_3_IN = {&MODULE_CCU60, {&MODULE_P40, 3}, Ifx_RxSel_b}

Definition at line 105 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CCPOS2C_P10_8_IN

IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2C_P10_8_IN = {&MODULE_CCU60, {&MODULE_P10, 8}, Ifx_RxSel_c}

Definition at line 106 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CCPOS2D_P40_4_IN

IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2D_P40_4_IN = {&MODULE_CCU60, {&MODULE_P40, 4}, Ifx_RxSel_d}

Definition at line 107 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_COUT60_P02_1_OUT

IfxCcu6_Cout60_Out IfxCcu60_COUT60_P02_1_OUT = {&MODULE_CCU60, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt7}

Definition at line 112 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_COUT60_P11_9_OUT

IfxCcu6_Cout60_Out IfxCcu60_COUT60_P11_9_OUT = {&MODULE_CCU60, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt7}

Definition at line 113 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_COUT60_P15_7_OUT

IfxCcu6_Cout60_Out IfxCcu60_COUT60_P15_7_OUT = {&MODULE_CCU60, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt7}

Definition at line 114 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_COUT60_P34_3_OUT

IfxCcu6_Cout60_Out IfxCcu60_COUT60_P34_3_OUT = {&MODULE_CCU60, {&MODULE_P34, 3}, IfxPort_OutputIdx_alt7}

Definition at line 115 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_COUT61_P02_3_OUT

IfxCcu6_Cout61_Out IfxCcu60_COUT61_P02_3_OUT = {&MODULE_CCU60, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt7}

Definition at line 119 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_COUT61_P11_6_OUT

IfxCcu6_Cout61_Out IfxCcu60_COUT61_P11_6_OUT = {&MODULE_CCU60, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt7}

Definition at line 120 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_COUT61_P15_8_OUT

IfxCcu6_Cout61_Out IfxCcu60_COUT61_P15_8_OUT = {&MODULE_CCU60, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt7}

Definition at line 121 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_COUT61_P34_5_OUT

IfxCcu6_Cout61_Out IfxCcu60_COUT61_P34_5_OUT = {&MODULE_CCU60, {&MODULE_P34, 5}, IfxPort_OutputIdx_alt7}

Definition at line 122 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_COUT62_P02_5_OUT

IfxCcu6_Cout62_Out IfxCcu60_COUT62_P02_5_OUT = {&MODULE_CCU60, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt7}

Definition at line 126 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_COUT62_P11_3_OUT

IfxCcu6_Cout62_Out IfxCcu60_COUT62_P11_3_OUT = {&MODULE_CCU60, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt7}

Definition at line 127 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_COUT62_P14_0_OUT

IfxCcu6_Cout62_Out IfxCcu60_COUT62_P14_0_OUT = {&MODULE_CCU60, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt7}

Definition at line 128 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_COUT62_P33_15_OUT

IfxCcu6_Cout62_Out IfxCcu60_COUT62_P33_15_OUT = {&MODULE_CCU60, {&MODULE_P33,15}, IfxPort_OutputIdx_alt7}

Definition at line 129 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_COUT63_P00_0_OUT

IfxCcu6_Cout63_Out IfxCcu60_COUT63_P00_0_OUT = {&MODULE_CCU60, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt7}

Definition at line 133 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_COUT63_P11_2_OUT

IfxCcu6_Cout63_Out IfxCcu60_COUT63_P11_2_OUT = {&MODULE_CCU60, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt7}

Definition at line 134 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_COUT63_P14_1_OUT

IfxCcu6_Cout63_Out IfxCcu60_COUT63_P14_1_OUT = {&MODULE_CCU60, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt7}

Definition at line 135 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_COUT63_P32_4_OUT

IfxCcu6_Cout63_Out IfxCcu60_COUT63_P32_4_OUT = {&MODULE_CCU60, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt7}

Definition at line 136 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_COUT63_P34_1_OUT

IfxCcu6_Cout63_Out IfxCcu60_COUT63_P34_1_OUT = {&MODULE_CCU60, {&MODULE_P34, 1}, IfxPort_OutputIdx_alt7}

Definition at line 137 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CTRAPA_P00_11_IN

IfxCcu6_Ctrap_In IfxCcu60_CTRAPA_P00_11_IN = {&MODULE_CCU60, {&MODULE_P00,11}, Ifx_RxSel_a}

Definition at line 141 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_T12HRB_P00_7_IN

IfxCcu6_T12hr_In IfxCcu60_T12HRB_P00_7_IN = {&MODULE_CCU60, {&MODULE_P00, 7}, Ifx_RxSel_b}

Definition at line 144 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_T12HRC_P00_9_IN

IfxCcu6_T12hr_In IfxCcu60_T12HRC_P00_9_IN = {&MODULE_CCU60, {&MODULE_P00, 9}, Ifx_RxSel_c}

Definition at line 145 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_T12HRE_P00_0_IN

IfxCcu6_T12hr_In IfxCcu60_T12HRE_P00_0_IN = {&MODULE_CCU60, {&MODULE_P00, 0}, Ifx_RxSel_e}

Definition at line 146 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_T13HRB_P00_8_IN

IfxCcu6_T13hr_In IfxCcu60_T13HRB_P00_8_IN = {&MODULE_CCU60, {&MODULE_P00, 8}, Ifx_RxSel_b}

Definition at line 150 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_T13HRC_P00_9_IN

IfxCcu6_T13hr_In IfxCcu60_T13HRC_P00_9_IN = {&MODULE_CCU60, {&MODULE_P00, 9}, Ifx_RxSel_c}

Definition at line 151 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC60_P00_1_OUT

IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_1_OUT = {&MODULE_CCU61, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt7}

Definition at line 50 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC60_P00_7_OUT

IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_7_OUT = {&MODULE_CCU61, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt7}

Definition at line 51 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC60_P20_8_OUT

IfxCcu6_Cc60_Out IfxCcu61_CC60_P20_8_OUT = {&MODULE_CCU61, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt7}

Definition at line 52 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC60_P33_13_OUT

IfxCcu6_Cc60_Out IfxCcu61_CC60_P33_13_OUT = {&MODULE_CCU61, {&MODULE_P33,13}, IfxPort_OutputIdx_alt7}

Definition at line 53 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC60INA_P00_1_IN

IfxCcu6_Cc60in_In IfxCcu61_CC60INA_P00_1_IN = {&MODULE_CCU61, {&MODULE_P00, 1}, Ifx_RxSel_a}

Definition at line 57 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC60INB_P02_0_IN

IfxCcu6_Cc60in_In IfxCcu61_CC60INB_P02_0_IN = {&MODULE_CCU61, {&MODULE_P02, 0}, Ifx_RxSel_b}

Definition at line 58 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC60INC_P00_7_IN

IfxCcu6_Cc60in_In IfxCcu61_CC60INC_P00_7_IN = {&MODULE_CCU61, {&MODULE_P00, 7}, Ifx_RxSel_c}

Definition at line 59 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC61_P00_3_OUT

IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_3_OUT = {&MODULE_CCU61, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt7}

Definition at line 65 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC61_P00_8_OUT

IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_8_OUT = {&MODULE_CCU61, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt7}

Definition at line 66 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC61_P20_9_OUT

IfxCcu6_Cc61_Out IfxCcu61_CC61_P20_9_OUT = {&MODULE_CCU61, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt7}

Definition at line 67 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC61_P33_11_OUT

IfxCcu6_Cc61_Out IfxCcu61_CC61_P33_11_OUT = {&MODULE_CCU61, {&MODULE_P33,11}, IfxPort_OutputIdx_alt7}

Definition at line 68 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC61INA_P00_3_IN

IfxCcu6_Cc61in_In IfxCcu61_CC61INA_P00_3_IN = {&MODULE_CCU61, {&MODULE_P00, 3}, Ifx_RxSel_a}

Definition at line 72 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC61INB_P02_2_IN

IfxCcu6_Cc61in_In IfxCcu61_CC61INB_P02_2_IN = {&MODULE_CCU61, {&MODULE_P02, 2}, Ifx_RxSel_b}

Definition at line 73 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC61INC_P00_8_IN

IfxCcu6_Cc61in_In IfxCcu61_CC61INC_P00_8_IN = {&MODULE_CCU61, {&MODULE_P00, 8}, Ifx_RxSel_c}

Definition at line 74 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC62_P00_5_OUT

IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_5_OUT = {&MODULE_CCU61, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt7}

Definition at line 80 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC62_P00_9_OUT

IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_9_OUT = {&MODULE_CCU61, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt7}

Definition at line 81 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC62_P20_10_OUT

IfxCcu6_Cc62_Out IfxCcu61_CC62_P20_10_OUT = {&MODULE_CCU61, {&MODULE_P20,10}, IfxPort_OutputIdx_alt7}

Definition at line 82 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC62_P33_9_OUT

IfxCcu6_Cc62_Out IfxCcu61_CC62_P33_9_OUT = {&MODULE_CCU61, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt7}

Definition at line 83 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC62INA_P00_5_IN

IfxCcu6_Cc62in_In IfxCcu61_CC62INA_P00_5_IN = {&MODULE_CCU61, {&MODULE_P00, 5}, Ifx_RxSel_a}

Definition at line 87 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC62INB_P02_4_IN

IfxCcu6_Cc62in_In IfxCcu61_CC62INB_P02_4_IN = {&MODULE_CCU61, {&MODULE_P02, 4}, Ifx_RxSel_b}

Definition at line 88 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC62INC_P00_9_IN

IfxCcu6_Cc62in_In IfxCcu61_CC62INC_P00_9_IN = {&MODULE_CCU61, {&MODULE_P00, 9}, Ifx_RxSel_c}

Definition at line 89 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CCPOS0A_P00_7_IN

IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0A_P00_7_IN = {&MODULE_CCU61, {&MODULE_P00, 7}, Ifx_RxSel_a}

Definition at line 93 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CCPOS0C_P33_7_IN

IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0C_P33_7_IN = {&MODULE_CCU61, {&MODULE_P33, 7}, Ifx_RxSel_c}

Definition at line 94 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CCPOS0D_P40_5_IN

IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0D_P40_5_IN = {&MODULE_CCU61, {&MODULE_P40, 5}, Ifx_RxSel_d}

Definition at line 95 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CCPOS1A_P00_8_IN

IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1A_P00_8_IN = {&MODULE_CCU61, {&MODULE_P00, 8}, Ifx_RxSel_a}

Definition at line 100 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CCPOS1B_P40_6_IN

IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1B_P40_6_IN = {&MODULE_CCU61, {&MODULE_P40, 6}, Ifx_RxSel_b}

Definition at line 101 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CCPOS1C_P33_6_IN

IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1C_P33_6_IN = {&MODULE_CCU61, {&MODULE_P33, 6}, Ifx_RxSel_c}

Definition at line 102 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CCPOS1D_P40_7_IN

IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1D_P40_7_IN = {&MODULE_CCU61, {&MODULE_P40, 7}, Ifx_RxSel_d}

Definition at line 103 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CCPOS2A_P00_9_IN

IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2A_P00_9_IN = {&MODULE_CCU61, {&MODULE_P00, 9}, Ifx_RxSel_a}

Definition at line 108 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CCPOS2B_P40_8_IN

IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2B_P40_8_IN = {&MODULE_CCU61, {&MODULE_P40, 8}, Ifx_RxSel_b}

Definition at line 109 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CCPOS2C_P33_5_IN

IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2C_P33_5_IN = {&MODULE_CCU61, {&MODULE_P33, 5}, Ifx_RxSel_c}

Definition at line 110 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CCPOS2D_P40_9_IN

IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2D_P40_9_IN = {&MODULE_CCU61, {&MODULE_P40, 9}, Ifx_RxSel_d}

Definition at line 111 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_COUT60_P00_2_OUT

IfxCcu6_Cout60_Out IfxCcu61_COUT60_P00_2_OUT = {&MODULE_CCU61, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt7}

Definition at line 116 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_COUT60_P20_11_OUT

IfxCcu6_Cout60_Out IfxCcu61_COUT60_P20_11_OUT = {&MODULE_CCU61, {&MODULE_P20,11}, IfxPort_OutputIdx_alt7}

Definition at line 117 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_COUT60_P33_12_OUT

IfxCcu6_Cout60_Out IfxCcu61_COUT60_P33_12_OUT = {&MODULE_CCU61, {&MODULE_P33,12}, IfxPort_OutputIdx_alt7}

Definition at line 118 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_COUT61_P00_4_OUT

IfxCcu6_Cout61_Out IfxCcu61_COUT61_P00_4_OUT = {&MODULE_CCU61, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt7}

Definition at line 123 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_COUT61_P20_12_OUT

IfxCcu6_Cout61_Out IfxCcu61_COUT61_P20_12_OUT = {&MODULE_CCU61, {&MODULE_P20,12}, IfxPort_OutputIdx_alt7}

Definition at line 124 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_COUT61_P33_10_OUT

IfxCcu6_Cout61_Out IfxCcu61_COUT61_P33_10_OUT = {&MODULE_CCU61, {&MODULE_P33,10}, IfxPort_OutputIdx_alt7}

Definition at line 125 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_COUT62_P00_6_OUT

IfxCcu6_Cout62_Out IfxCcu61_COUT62_P00_6_OUT = {&MODULE_CCU61, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt7}

Definition at line 130 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_COUT62_P20_13_OUT

IfxCcu6_Cout62_Out IfxCcu61_COUT62_P20_13_OUT = {&MODULE_CCU61, {&MODULE_P20,13}, IfxPort_OutputIdx_alt7}

Definition at line 131 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_COUT62_P33_8_OUT

IfxCcu6_Cout62_Out IfxCcu61_COUT62_P33_8_OUT = {&MODULE_CCU61, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt7}

Definition at line 132 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_COUT63_P00_10_OUT

IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_10_OUT = {&MODULE_CCU61, {&MODULE_P00,10}, IfxPort_OutputIdx_alt7}

Definition at line 138 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_COUT63_P00_12_OUT

IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_12_OUT = {&MODULE_CCU61, {&MODULE_P00,12}, IfxPort_OutputIdx_alt7}

Definition at line 139 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_COUT63_P20_7_OUT

IfxCcu6_Cout63_Out IfxCcu61_COUT63_P20_7_OUT = {&MODULE_CCU61, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt7}

Definition at line 140 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CTRAPA_P00_0_IN

IfxCcu6_Ctrap_In IfxCcu61_CTRAPA_P00_0_IN = {&MODULE_CCU61, {&MODULE_P00, 0}, Ifx_RxSel_a}

Definition at line 142 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CTRAPC_P33_4_IN

IfxCcu6_Ctrap_In IfxCcu61_CTRAPC_P33_4_IN = {&MODULE_CCU61, {&MODULE_P33, 4}, Ifx_RxSel_c}

Definition at line 143 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_T12HRB_P02_6_IN

IfxCcu6_T12hr_In IfxCcu61_T12HRB_P02_6_IN = {&MODULE_CCU61, {&MODULE_P02, 6}, Ifx_RxSel_b}

Definition at line 147 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_T12HRC_P02_8_IN

IfxCcu6_T12hr_In IfxCcu61_T12HRC_P02_8_IN = {&MODULE_CCU61, {&MODULE_P02, 8}, Ifx_RxSel_c}

Definition at line 148 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_T12HRE_P00_11_IN

IfxCcu6_T12hr_In IfxCcu61_T12HRE_P00_11_IN = {&MODULE_CCU61, {&MODULE_P00,11}, Ifx_RxSel_e}

Definition at line 149 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_T13HRB_P02_7_IN

IfxCcu6_T13hr_In IfxCcu61_T13HRB_P02_7_IN = {&MODULE_CCU61, {&MODULE_P02, 7}, Ifx_RxSel_b}

Definition at line 152 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_T13HRC_P02_8_IN

IfxCcu6_T13hr_In IfxCcu61_T13HRC_P02_8_IN = {&MODULE_CCU61, {&MODULE_P02, 8}, Ifx_RxSel_c}

Definition at line 153 of file IfxCcu6_PinMap.c.

◆ IfxCcu6_Cc60_Out_pinTable

const IfxCcu6_Cc60_Out* IfxCcu6_Cc60_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxCcu60_CC60_P02_0_OUT,
&IfxCcu60_CC60_P02_6_OUT,
&IfxCcu60_CC60_P11_12_OUT,
&IfxCcu60_CC60_P15_6_OUT,
&IfxCcu60_CC60_P34_2_OUT
},
{
&IfxCcu61_CC60_P00_1_OUT,
&IfxCcu61_CC60_P00_7_OUT,
&IfxCcu61_CC60_P20_8_OUT,
&IfxCcu61_CC60_P33_13_OUT,
NULL_PTR
}
}
IfxCcu60_CC60_P34_2_OUT
IfxCcu6_Cc60_Out IfxCcu60_CC60_P34_2_OUT
Definition: IfxCcu6_PinMap.c:49
IfxCcu60_CC60_P02_0_OUT
IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_0_OUT
Definition: IfxCcu6_PinMap.c:45
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxCcu61_CC60_P33_13_OUT
IfxCcu6_Cc60_Out IfxCcu61_CC60_P33_13_OUT
Definition: IfxCcu6_PinMap.c:53
IfxCcu60_CC60_P02_6_OUT
IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_6_OUT
Definition: IfxCcu6_PinMap.c:46
IfxCcu61_CC60_P00_7_OUT
IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_7_OUT
Definition: IfxCcu6_PinMap.c:51
IfxCcu61_CC60_P00_1_OUT
IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_1_OUT
Definition: IfxCcu6_PinMap.c:50
IfxCcu60_CC60_P11_12_OUT
IfxCcu6_Cc60_Out IfxCcu60_CC60_P11_12_OUT
Definition: IfxCcu6_PinMap.c:47
IfxCcu61_CC60_P20_8_OUT
IfxCcu6_Cc60_Out IfxCcu61_CC60_P20_8_OUT
Definition: IfxCcu6_PinMap.c:52
IfxCcu60_CC60_P15_6_OUT
IfxCcu6_Cc60_Out IfxCcu60_CC60_P15_6_OUT
Definition: IfxCcu6_PinMap.c:48

Definition at line 156 of file IfxCcu6_PinMap.c.

◆ IfxCcu6_Cc60in_In_pinTable

const IfxCcu6_Cc60in_In* IfxCcu6_Cc60in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxCcu60_CC60INA_P02_0_IN,
&IfxCcu60_CC60INB_P00_1_IN,
&IfxCcu60_CC60INC_P02_6_IN
},
{
&IfxCcu61_CC60INA_P00_1_IN,
&IfxCcu61_CC60INB_P02_0_IN,
&IfxCcu61_CC60INC_P00_7_IN
}
}
IfxCcu60_CC60INC_P02_6_IN
IfxCcu6_Cc60in_In IfxCcu60_CC60INC_P02_6_IN
Definition: IfxCcu6_PinMap.c:56
IfxCcu61_CC60INC_P00_7_IN
IfxCcu6_Cc60in_In IfxCcu61_CC60INC_P00_7_IN
Definition: IfxCcu6_PinMap.c:59
IfxCcu60_CC60INA_P02_0_IN
IfxCcu6_Cc60in_In IfxCcu60_CC60INA_P02_0_IN
Definition: IfxCcu6_PinMap.c:54
IfxCcu61_CC60INB_P02_0_IN
IfxCcu6_Cc60in_In IfxCcu61_CC60INB_P02_0_IN
Definition: IfxCcu6_PinMap.c:58
IfxCcu61_CC60INA_P00_1_IN
IfxCcu6_Cc60in_In IfxCcu61_CC60INA_P00_1_IN
Definition: IfxCcu6_PinMap.c:57
IfxCcu60_CC60INB_P00_1_IN
IfxCcu6_Cc60in_In IfxCcu60_CC60INB_P00_1_IN
Definition: IfxCcu6_PinMap.c:55

Definition at line 173 of file IfxCcu6_PinMap.c.

◆ IfxCcu6_Cc61_Out_pinTable

const IfxCcu6_Cc61_Out* IfxCcu6_Cc61_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxCcu60_CC61_P02_2_OUT,
&IfxCcu60_CC61_P02_7_OUT,
&IfxCcu60_CC61_P11_11_OUT,
&IfxCcu60_CC61_P15_5_OUT,
&IfxCcu60_CC61_P34_4_OUT
},
{
&IfxCcu61_CC61_P00_3_OUT,
&IfxCcu61_CC61_P00_8_OUT,
&IfxCcu61_CC61_P20_9_OUT,
&IfxCcu61_CC61_P33_11_OUT,
NULL_PTR
}
}
IfxCcu60_CC61_P02_2_OUT
IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_2_OUT
Definition: IfxCcu6_PinMap.c:60
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxCcu60_CC61_P02_7_OUT
IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_7_OUT
Definition: IfxCcu6_PinMap.c:61
IfxCcu60_CC61_P11_11_OUT
IfxCcu6_Cc61_Out IfxCcu60_CC61_P11_11_OUT
Definition: IfxCcu6_PinMap.c:62
IfxCcu61_CC61_P00_3_OUT
IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_3_OUT
Definition: IfxCcu6_PinMap.c:65
IfxCcu61_CC61_P33_11_OUT
IfxCcu6_Cc61_Out IfxCcu61_CC61_P33_11_OUT
Definition: IfxCcu6_PinMap.c:68
IfxCcu60_CC61_P34_4_OUT
IfxCcu6_Cc61_Out IfxCcu60_CC61_P34_4_OUT
Definition: IfxCcu6_PinMap.c:64
IfxCcu61_CC61_P00_8_OUT
IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_8_OUT
Definition: IfxCcu6_PinMap.c:66
IfxCcu61_CC61_P20_9_OUT
IfxCcu6_Cc61_Out IfxCcu61_CC61_P20_9_OUT
Definition: IfxCcu6_PinMap.c:67
IfxCcu60_CC61_P15_5_OUT
IfxCcu6_Cc61_Out IfxCcu60_CC61_P15_5_OUT
Definition: IfxCcu6_PinMap.c:63

Definition at line 186 of file IfxCcu6_PinMap.c.

◆ IfxCcu6_Cc61in_In_pinTable

const IfxCcu6_Cc61in_In* IfxCcu6_Cc61in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxCcu60_CC61INA_P02_2_IN,
&IfxCcu60_CC61INB_P00_3_IN,
&IfxCcu60_CC61INC_P02_7_IN
},
{
&IfxCcu61_CC61INA_P00_3_IN,
&IfxCcu61_CC61INB_P02_2_IN,
&IfxCcu61_CC61INC_P00_8_IN
}
}
IfxCcu60_CC61INB_P00_3_IN
IfxCcu6_Cc61in_In IfxCcu60_CC61INB_P00_3_IN
Definition: IfxCcu6_PinMap.c:70
IfxCcu60_CC61INA_P02_2_IN
IfxCcu6_Cc61in_In IfxCcu60_CC61INA_P02_2_IN
Definition: IfxCcu6_PinMap.c:69
IfxCcu60_CC61INC_P02_7_IN
IfxCcu6_Cc61in_In IfxCcu60_CC61INC_P02_7_IN
Definition: IfxCcu6_PinMap.c:71
IfxCcu61_CC61INB_P02_2_IN
IfxCcu6_Cc61in_In IfxCcu61_CC61INB_P02_2_IN
Definition: IfxCcu6_PinMap.c:73
IfxCcu61_CC61INC_P00_8_IN
IfxCcu6_Cc61in_In IfxCcu61_CC61INC_P00_8_IN
Definition: IfxCcu6_PinMap.c:74
IfxCcu61_CC61INA_P00_3_IN
IfxCcu6_Cc61in_In IfxCcu61_CC61INA_P00_3_IN
Definition: IfxCcu6_PinMap.c:72

Definition at line 203 of file IfxCcu6_PinMap.c.

◆ IfxCcu6_Cc62_Out_pinTable

const IfxCcu6_Cc62_Out* IfxCcu6_Cc62_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxCcu60_CC62_P02_4_OUT,
&IfxCcu60_CC62_P02_8_OUT,
&IfxCcu60_CC62_P11_10_OUT,
&IfxCcu60_CC62_P15_4_OUT,
&IfxCcu60_CC62_P33_14_OUT
},
{
&IfxCcu61_CC62_P00_5_OUT,
&IfxCcu61_CC62_P00_9_OUT,
&IfxCcu61_CC62_P20_10_OUT,
&IfxCcu61_CC62_P33_9_OUT,
NULL_PTR
}
}
IfxCcu61_CC62_P33_9_OUT
IfxCcu6_Cc62_Out IfxCcu61_CC62_P33_9_OUT
Definition: IfxCcu6_PinMap.c:83
IfxCcu61_CC62_P00_9_OUT
IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_9_OUT
Definition: IfxCcu6_PinMap.c:81
IfxCcu61_CC62_P20_10_OUT
IfxCcu6_Cc62_Out IfxCcu61_CC62_P20_10_OUT
Definition: IfxCcu6_PinMap.c:82
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxCcu60_CC62_P33_14_OUT
IfxCcu6_Cc62_Out IfxCcu60_CC62_P33_14_OUT
Definition: IfxCcu6_PinMap.c:79
IfxCcu61_CC62_P00_5_OUT
IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_5_OUT
Definition: IfxCcu6_PinMap.c:80
IfxCcu60_CC62_P02_4_OUT
IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_4_OUT
Definition: IfxCcu6_PinMap.c:75
IfxCcu60_CC62_P15_4_OUT
IfxCcu6_Cc62_Out IfxCcu60_CC62_P15_4_OUT
Definition: IfxCcu6_PinMap.c:78
IfxCcu60_CC62_P02_8_OUT
IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_8_OUT
Definition: IfxCcu6_PinMap.c:76
IfxCcu60_CC62_P11_10_OUT
IfxCcu6_Cc62_Out IfxCcu60_CC62_P11_10_OUT
Definition: IfxCcu6_PinMap.c:77

Definition at line 216 of file IfxCcu6_PinMap.c.

◆ IfxCcu6_Cc62in_In_pinTable

const IfxCcu6_Cc62in_In* IfxCcu6_Cc62in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxCcu60_CC62INA_P02_4_IN,
&IfxCcu60_CC62INB_P00_5_IN,
&IfxCcu60_CC62INC_P02_8_IN
},
{
&IfxCcu61_CC62INA_P00_5_IN,
&IfxCcu61_CC62INB_P02_4_IN,
&IfxCcu61_CC62INC_P00_9_IN
}
}
IfxCcu61_CC62INB_P02_4_IN
IfxCcu6_Cc62in_In IfxCcu61_CC62INB_P02_4_IN
Definition: IfxCcu6_PinMap.c:88
IfxCcu60_CC62INC_P02_8_IN
IfxCcu6_Cc62in_In IfxCcu60_CC62INC_P02_8_IN
Definition: IfxCcu6_PinMap.c:86
IfxCcu61_CC62INC_P00_9_IN
IfxCcu6_Cc62in_In IfxCcu61_CC62INC_P00_9_IN
Definition: IfxCcu6_PinMap.c:89
IfxCcu60_CC62INB_P00_5_IN
IfxCcu6_Cc62in_In IfxCcu60_CC62INB_P00_5_IN
Definition: IfxCcu6_PinMap.c:85
IfxCcu60_CC62INA_P02_4_IN
IfxCcu6_Cc62in_In IfxCcu60_CC62INA_P02_4_IN
Definition: IfxCcu6_PinMap.c:84
IfxCcu61_CC62INA_P00_5_IN
IfxCcu6_Cc62in_In IfxCcu61_CC62INA_P00_5_IN
Definition: IfxCcu6_PinMap.c:87

Definition at line 233 of file IfxCcu6_PinMap.c.

◆ IfxCcu6_Ccpos0_In_pinTable

const IfxCcu6_Ccpos0_In* IfxCcu6_Ccpos0_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxCcu60_CCPOS0A_P02_6_IN,
NULL_PTR,
&IfxCcu60_CCPOS0C_P10_4_IN,
&IfxCcu60_CCPOS0D_P40_0_IN
},
{
&IfxCcu61_CCPOS0A_P00_7_IN,
NULL_PTR,
&IfxCcu61_CCPOS0C_P33_7_IN,
&IfxCcu61_CCPOS0D_P40_5_IN
}
}
IfxCcu60_CCPOS0A_P02_6_IN
IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0A_P02_6_IN
Definition: IfxCcu6_PinMap.c:90
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxCcu61_CCPOS0C_P33_7_IN
IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0C_P33_7_IN
Definition: IfxCcu6_PinMap.c:94
IfxCcu60_CCPOS0C_P10_4_IN
IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0C_P10_4_IN
Definition: IfxCcu6_PinMap.c:91
IfxCcu61_CCPOS0D_P40_5_IN
IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0D_P40_5_IN
Definition: IfxCcu6_PinMap.c:95
IfxCcu61_CCPOS0A_P00_7_IN
IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0A_P00_7_IN
Definition: IfxCcu6_PinMap.c:93
IfxCcu60_CCPOS0D_P40_0_IN
IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0D_P40_0_IN
Definition: IfxCcu6_PinMap.c:92

Definition at line 246 of file IfxCcu6_PinMap.c.

◆ IfxCcu6_Ccpos1_In_pinTable

const IfxCcu6_Ccpos1_In* IfxCcu6_Ccpos1_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxCcu60_CCPOS1A_P02_7_IN,
&IfxCcu60_CCPOS1B_P40_1_IN,
&IfxCcu60_CCPOS1C_P10_7_IN,
&IfxCcu60_CCPOS1D_P40_2_IN
},
{
&IfxCcu61_CCPOS1A_P00_8_IN,
&IfxCcu61_CCPOS1B_P40_6_IN,
&IfxCcu61_CCPOS1C_P33_6_IN,
&IfxCcu61_CCPOS1D_P40_7_IN
}
}
IfxCcu61_CCPOS1A_P00_8_IN
IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1A_P00_8_IN
Definition: IfxCcu6_PinMap.c:100
IfxCcu60_CCPOS1C_P10_7_IN
IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1C_P10_7_IN
Definition: IfxCcu6_PinMap.c:98
IfxCcu60_CCPOS1A_P02_7_IN
IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1A_P02_7_IN
Definition: IfxCcu6_PinMap.c:96
IfxCcu61_CCPOS1C_P33_6_IN
IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1C_P33_6_IN
Definition: IfxCcu6_PinMap.c:102
IfxCcu60_CCPOS1B_P40_1_IN
IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1B_P40_1_IN
Definition: IfxCcu6_PinMap.c:97
IfxCcu61_CCPOS1B_P40_6_IN
IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1B_P40_6_IN
Definition: IfxCcu6_PinMap.c:101
IfxCcu61_CCPOS1D_P40_7_IN
IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1D_P40_7_IN
Definition: IfxCcu6_PinMap.c:103
IfxCcu60_CCPOS1D_P40_2_IN
IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1D_P40_2_IN
Definition: IfxCcu6_PinMap.c:99

Definition at line 261 of file IfxCcu6_PinMap.c.

◆ IfxCcu6_Ccpos2_In_pinTable

const IfxCcu6_Ccpos2_In* IfxCcu6_Ccpos2_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxCcu60_CCPOS2A_P02_8_IN,
&IfxCcu60_CCPOS2B_P40_3_IN,
&IfxCcu60_CCPOS2C_P10_8_IN,
&IfxCcu60_CCPOS2D_P40_4_IN
},
{
&IfxCcu61_CCPOS2A_P00_9_IN,
&IfxCcu61_CCPOS2B_P40_8_IN,
&IfxCcu61_CCPOS2C_P33_5_IN,
&IfxCcu61_CCPOS2D_P40_9_IN
}
}
IfxCcu60_CCPOS2D_P40_4_IN
IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2D_P40_4_IN
Definition: IfxCcu6_PinMap.c:107
IfxCcu60_CCPOS2A_P02_8_IN
IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2A_P02_8_IN
Definition: IfxCcu6_PinMap.c:104
IfxCcu61_CCPOS2D_P40_9_IN
IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2D_P40_9_IN
Definition: IfxCcu6_PinMap.c:111
IfxCcu61_CCPOS2B_P40_8_IN
IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2B_P40_8_IN
Definition: IfxCcu6_PinMap.c:109
IfxCcu61_CCPOS2A_P00_9_IN
IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2A_P00_9_IN
Definition: IfxCcu6_PinMap.c:108
IfxCcu60_CCPOS2C_P10_8_IN
IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2C_P10_8_IN
Definition: IfxCcu6_PinMap.c:106
IfxCcu61_CCPOS2C_P33_5_IN
IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2C_P33_5_IN
Definition: IfxCcu6_PinMap.c:110
IfxCcu60_CCPOS2B_P40_3_IN
IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2B_P40_3_IN
Definition: IfxCcu6_PinMap.c:105

Definition at line 276 of file IfxCcu6_PinMap.c.

◆ IfxCcu6_Cout60_Out_pinTable

const IfxCcu6_Cout60_Out* IfxCcu6_Cout60_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxCcu60_COUT60_P02_1_OUT,
&IfxCcu60_COUT60_P11_9_OUT,
&IfxCcu60_COUT60_P15_7_OUT,
&IfxCcu60_COUT60_P34_3_OUT
},
{
&IfxCcu61_COUT60_P00_2_OUT,
&IfxCcu61_COUT60_P20_11_OUT,
&IfxCcu61_COUT60_P33_12_OUT,
NULL_PTR
}
}
IfxCcu61_COUT60_P00_2_OUT
IfxCcu6_Cout60_Out IfxCcu61_COUT60_P00_2_OUT
Definition: IfxCcu6_PinMap.c:116
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxCcu61_COUT60_P33_12_OUT
IfxCcu6_Cout60_Out IfxCcu61_COUT60_P33_12_OUT
Definition: IfxCcu6_PinMap.c:118
IfxCcu60_COUT60_P11_9_OUT
IfxCcu6_Cout60_Out IfxCcu60_COUT60_P11_9_OUT
Definition: IfxCcu6_PinMap.c:113
IfxCcu60_COUT60_P02_1_OUT
IfxCcu6_Cout60_Out IfxCcu60_COUT60_P02_1_OUT
Definition: IfxCcu6_PinMap.c:112
IfxCcu60_COUT60_P34_3_OUT
IfxCcu6_Cout60_Out IfxCcu60_COUT60_P34_3_OUT
Definition: IfxCcu6_PinMap.c:115
IfxCcu61_COUT60_P20_11_OUT
IfxCcu6_Cout60_Out IfxCcu61_COUT60_P20_11_OUT
Definition: IfxCcu6_PinMap.c:117
IfxCcu60_COUT60_P15_7_OUT
IfxCcu6_Cout60_Out IfxCcu60_COUT60_P15_7_OUT
Definition: IfxCcu6_PinMap.c:114

Definition at line 291 of file IfxCcu6_PinMap.c.

◆ IfxCcu6_Cout61_Out_pinTable

const IfxCcu6_Cout61_Out* IfxCcu6_Cout61_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxCcu60_COUT61_P02_3_OUT,
&IfxCcu60_COUT61_P11_6_OUT,
&IfxCcu60_COUT61_P15_8_OUT,
&IfxCcu60_COUT61_P34_5_OUT
},
{
&IfxCcu61_COUT61_P00_4_OUT,
&IfxCcu61_COUT61_P20_12_OUT,
&IfxCcu61_COUT61_P33_10_OUT,
NULL_PTR
}
}
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxCcu61_COUT61_P20_12_OUT
IfxCcu6_Cout61_Out IfxCcu61_COUT61_P20_12_OUT
Definition: IfxCcu6_PinMap.c:124
IfxCcu60_COUT61_P11_6_OUT
IfxCcu6_Cout61_Out IfxCcu60_COUT61_P11_6_OUT
Definition: IfxCcu6_PinMap.c:120
IfxCcu60_COUT61_P02_3_OUT
IfxCcu6_Cout61_Out IfxCcu60_COUT61_P02_3_OUT
Definition: IfxCcu6_PinMap.c:119
IfxCcu60_COUT61_P15_8_OUT
IfxCcu6_Cout61_Out IfxCcu60_COUT61_P15_8_OUT
Definition: IfxCcu6_PinMap.c:121
IfxCcu61_COUT61_P00_4_OUT
IfxCcu6_Cout61_Out IfxCcu61_COUT61_P00_4_OUT
Definition: IfxCcu6_PinMap.c:123
IfxCcu60_COUT61_P34_5_OUT
IfxCcu6_Cout61_Out IfxCcu60_COUT61_P34_5_OUT
Definition: IfxCcu6_PinMap.c:122
IfxCcu61_COUT61_P33_10_OUT
IfxCcu6_Cout61_Out IfxCcu61_COUT61_P33_10_OUT
Definition: IfxCcu6_PinMap.c:125

Definition at line 306 of file IfxCcu6_PinMap.c.

◆ IfxCcu6_Cout62_Out_pinTable

const IfxCcu6_Cout62_Out* IfxCcu6_Cout62_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxCcu60_COUT62_P02_5_OUT,
&IfxCcu60_COUT62_P11_3_OUT,
&IfxCcu60_COUT62_P14_0_OUT,
&IfxCcu60_COUT62_P33_15_OUT
},
{
&IfxCcu61_COUT62_P00_6_OUT,
&IfxCcu61_COUT62_P20_13_OUT,
&IfxCcu61_COUT62_P33_8_OUT,
NULL_PTR
}
}
IfxCcu61_COUT62_P00_6_OUT
IfxCcu6_Cout62_Out IfxCcu61_COUT62_P00_6_OUT
Definition: IfxCcu6_PinMap.c:130
IfxCcu60_COUT62_P02_5_OUT
IfxCcu6_Cout62_Out IfxCcu60_COUT62_P02_5_OUT
Definition: IfxCcu6_PinMap.c:126
IfxCcu60_COUT62_P33_15_OUT
IfxCcu6_Cout62_Out IfxCcu60_COUT62_P33_15_OUT
Definition: IfxCcu6_PinMap.c:129
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxCcu60_COUT62_P14_0_OUT
IfxCcu6_Cout62_Out IfxCcu60_COUT62_P14_0_OUT
Definition: IfxCcu6_PinMap.c:128
IfxCcu60_COUT62_P11_3_OUT
IfxCcu6_Cout62_Out IfxCcu60_COUT62_P11_3_OUT
Definition: IfxCcu6_PinMap.c:127
IfxCcu61_COUT62_P33_8_OUT
IfxCcu6_Cout62_Out IfxCcu61_COUT62_P33_8_OUT
Definition: IfxCcu6_PinMap.c:132
IfxCcu61_COUT62_P20_13_OUT
IfxCcu6_Cout62_Out IfxCcu61_COUT62_P20_13_OUT
Definition: IfxCcu6_PinMap.c:131

Definition at line 321 of file IfxCcu6_PinMap.c.

◆ IfxCcu6_Cout63_Out_pinTable

const IfxCcu6_Cout63_Out* IfxCcu6_Cout63_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxCcu60_COUT63_P00_0_OUT,
&IfxCcu60_COUT63_P11_2_OUT,
&IfxCcu60_COUT63_P14_1_OUT,
&IfxCcu60_COUT63_P32_4_OUT,
&IfxCcu60_COUT63_P34_1_OUT
},
{
&IfxCcu61_COUT63_P00_10_OUT,
&IfxCcu61_COUT63_P00_12_OUT,
&IfxCcu61_COUT63_P20_7_OUT,
NULL_PTR,
NULL_PTR
}
}
IfxCcu60_COUT63_P11_2_OUT
IfxCcu6_Cout63_Out IfxCcu60_COUT63_P11_2_OUT
Definition: IfxCcu6_PinMap.c:134
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxCcu60_COUT63_P14_1_OUT
IfxCcu6_Cout63_Out IfxCcu60_COUT63_P14_1_OUT
Definition: IfxCcu6_PinMap.c:135
IfxCcu60_COUT63_P00_0_OUT
IfxCcu6_Cout63_Out IfxCcu60_COUT63_P00_0_OUT
Definition: IfxCcu6_PinMap.c:133
IfxCcu61_COUT63_P20_7_OUT
IfxCcu6_Cout63_Out IfxCcu61_COUT63_P20_7_OUT
Definition: IfxCcu6_PinMap.c:140
IfxCcu61_COUT63_P00_12_OUT
IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_12_OUT
Definition: IfxCcu6_PinMap.c:139
IfxCcu60_COUT63_P32_4_OUT
IfxCcu6_Cout63_Out IfxCcu60_COUT63_P32_4_OUT
Definition: IfxCcu6_PinMap.c:136
IfxCcu61_COUT63_P00_10_OUT
IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_10_OUT
Definition: IfxCcu6_PinMap.c:138
IfxCcu60_COUT63_P34_1_OUT
IfxCcu6_Cout63_Out IfxCcu60_COUT63_P34_1_OUT
Definition: IfxCcu6_PinMap.c:137

Definition at line 336 of file IfxCcu6_PinMap.c.

◆ IfxCcu6_Ctrap_In_pinTable

const IfxCcu6_Ctrap_In* IfxCcu6_Ctrap_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxCcu60_CTRAPA_P00_11_IN,
NULL_PTR,
NULL_PTR
},
{
&IfxCcu61_CTRAPA_P00_0_IN,
NULL_PTR,
&IfxCcu61_CTRAPC_P33_4_IN
}
}
IfxCcu60_CTRAPA_P00_11_IN
IfxCcu6_Ctrap_In IfxCcu60_CTRAPA_P00_11_IN
Definition: IfxCcu6_PinMap.c:141
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxCcu61_CTRAPA_P00_0_IN
IfxCcu6_Ctrap_In IfxCcu61_CTRAPA_P00_0_IN
Definition: IfxCcu6_PinMap.c:142
IfxCcu61_CTRAPC_P33_4_IN
IfxCcu6_Ctrap_In IfxCcu61_CTRAPC_P33_4_IN
Definition: IfxCcu6_PinMap.c:143

Definition at line 353 of file IfxCcu6_PinMap.c.

◆ IfxCcu6_T12hr_In_pinTable

const IfxCcu6_T12hr_In* IfxCcu6_T12hr_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS]
Initial value:
= {
{
NULL_PTR,
&IfxCcu60_T12HRB_P00_7_IN,
&IfxCcu60_T12HRC_P00_9_IN,
NULL_PTR,
&IfxCcu60_T12HRE_P00_0_IN
},
{
NULL_PTR,
&IfxCcu61_T12HRB_P02_6_IN,
&IfxCcu61_T12HRC_P02_8_IN,
NULL_PTR,
&IfxCcu61_T12HRE_P00_11_IN
}
}
IfxCcu61_T12HRB_P02_6_IN
IfxCcu6_T12hr_In IfxCcu61_T12HRB_P02_6_IN
Definition: IfxCcu6_PinMap.c:147
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxCcu60_T12HRB_P00_7_IN
IfxCcu6_T12hr_In IfxCcu60_T12HRB_P00_7_IN
Definition: IfxCcu6_PinMap.c:144
IfxCcu60_T12HRC_P00_9_IN
IfxCcu6_T12hr_In IfxCcu60_T12HRC_P00_9_IN
Definition: IfxCcu6_PinMap.c:145
IfxCcu60_T12HRE_P00_0_IN
IfxCcu6_T12hr_In IfxCcu60_T12HRE_P00_0_IN
Definition: IfxCcu6_PinMap.c:146
IfxCcu61_T12HRC_P02_8_IN
IfxCcu6_T12hr_In IfxCcu61_T12HRC_P02_8_IN
Definition: IfxCcu6_PinMap.c:148
IfxCcu61_T12HRE_P00_11_IN
IfxCcu6_T12hr_In IfxCcu61_T12HRE_P00_11_IN
Definition: IfxCcu6_PinMap.c:149

Definition at line 366 of file IfxCcu6_PinMap.c.

◆ IfxCcu6_T13hr_In_pinTable

const IfxCcu6_T13hr_In* IfxCcu6_T13hr_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS]
Initial value:
= {
{
NULL_PTR,
&IfxCcu60_T13HRB_P00_8_IN,
&IfxCcu60_T13HRC_P00_9_IN
},
{
NULL_PTR,
&IfxCcu61_T13HRB_P02_7_IN,
&IfxCcu61_T13HRC_P02_8_IN
}
}
IfxCcu60_T13HRB_P00_8_IN
IfxCcu6_T13hr_In IfxCcu60_T13HRB_P00_8_IN
Definition: IfxCcu6_PinMap.c:150
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxCcu60_T13HRC_P00_9_IN
IfxCcu6_T13hr_In IfxCcu60_T13HRC_P00_9_IN
Definition: IfxCcu6_PinMap.c:151
IfxCcu61_T13HRC_P02_8_IN
IfxCcu6_T13hr_In IfxCcu61_T13HRC_P02_8_IN
Definition: IfxCcu6_PinMap.c:153
IfxCcu61_T13HRB_P02_7_IN
IfxCcu6_T13hr_In IfxCcu61_T13HRB_P02_7_IN
Definition: IfxCcu6_PinMap.c:152

Definition at line 383 of file IfxCcu6_PinMap.c.


iLLD_TC38A: IfxCcu6_PinMap.h File Reference

  • _PinMap
Data Structures | Macros | Variables
IfxCcu6_PinMap.h File Reference
iLLD » CCU6

CCU6 I/O map. More...

#include <IfxCcu6_reg.h>
#include <_Impl/IfxCcu6_cfg.h>
#include <Port/Std/IfxPort.h>
Include dependency graph for IfxCcu6_PinMap.h:

Go to the source code of this file.

Data Structures

struct | IfxCcu6_Cc60in_In
CC60IN pin mapping structure. More...
struct | IfxCcu6_Cc61in_In
CC61IN pin mapping structure. More...
struct | IfxCcu6_Cc62in_In
CC62IN pin mapping structure. More...
struct | IfxCcu6_Ccpos0_In
CCPOS0 pin mapping structure. More...
struct | IfxCcu6_Ccpos1_In
CCPOS1 pin mapping structure. More...
struct | IfxCcu6_Ccpos2_In
CCPOS2 pin mapping structure. More...
struct | IfxCcu6_Ctrap_In
CTRAP pin mapping structure. More...
struct | IfxCcu6_T12hr_In
T12HR pin mapping structure. More...
struct | IfxCcu6_T13hr_In
T13HR pin mapping structure. More...
struct | IfxCcu6_Cc60_Out
CC60 pin mapping structure. More...
struct | IfxCcu6_Cc61_Out
CC61 pin mapping structure. More...
struct | IfxCcu6_Cc62_Out
CC62 pin mapping structure. More...
struct | IfxCcu6_Cout60_Out
COUT60 pin mapping structure. More...
struct | IfxCcu6_Cout61_Out
COUT61 pin mapping structure. More...
struct | IfxCcu6_Cout62_Out
COUT62 pin mapping structure. More...
struct | IfxCcu6_Cout63_Out
COUT63 pin mapping structure. More...

Macros

#define | IFXCCU6_PINMAP_NUM_MODULES 2
Table dimensions. More...
#define | IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS 5
#define | IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS 3
#define | IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS 5
#define | IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS 3
#define | IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS 5
#define | IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS 3
#define | IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS 4
#define | IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS 4
#define | IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS 4
#define | IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS 4
#define | IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS 4
#define | IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS 4
#define | IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS 5
#define | IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS 3
#define | IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS 5
#define | IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS 3

Variables

IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_0_OUT
T12 PWM channel 60. More...
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_6_OUT
T12 PWM channel 60. More...
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P11_12_OUT
T12 PWM channel 60. More...
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P15_6_OUT
T12 PWM channel 60. More...
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P34_2_OUT
T12 PWM channel 60. More...
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_1_OUT
T12 PWM channel 60. More...
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_7_OUT
T12 PWM channel 60. More...
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P20_8_OUT
T12 PWM channel 60. More...
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P33_13_OUT
T12 PWM channel 60. More...
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu60_CC60INA_P02_0_IN
T12 capture input 60. More...
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu60_CC60INB_P00_1_IN
T12 capture input 60. More...
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu60_CC60INC_P02_6_IN
T12 capture input 60. More...
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu61_CC60INA_P00_1_IN
T12 capture input 60. More...
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu61_CC60INB_P02_0_IN
T12 capture input 60. More...
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu61_CC60INC_P00_7_IN
T12 capture input 60. More...
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_2_OUT
T12 PWM channel 61. More...
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_7_OUT
T12 PWM channel 61. More...
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P11_11_OUT
T12 PWM channel 61. More...
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P15_5_OUT
T12 PWM channel 61. More...
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P34_4_OUT
T12 PWM channel 61. More...
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_3_OUT
T12 PWM channel 61. More...
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_8_OUT
T12 PWM channel 61. More...
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P20_9_OUT
T12 PWM channel 61. More...
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P33_11_OUT
T12 PWM channel 61. More...
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu60_CC61INA_P02_2_IN
T12 capture input 61. More...
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu60_CC61INB_P00_3_IN
T12 capture input 61. More...
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu60_CC61INC_P02_7_IN
T12 capture input 61. More...
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu61_CC61INA_P00_3_IN
T12 capture input 61. More...
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu61_CC61INB_P02_2_IN
T12 capture input 61. More...
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu61_CC61INC_P00_8_IN
T12 capture input 61. More...
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_4_OUT
T12 PWM channel 62. More...
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_8_OUT
T12 PWM channel 62. More...
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P11_10_OUT
T12 PWM channel 62. More...
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P15_4_OUT
T12 PWM channel 62. More...
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P33_14_OUT
T12 PWM channel 62. More...
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_5_OUT
T12 PWM channel 62. More...
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_9_OUT
T12 PWM channel 62. More...
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P20_10_OUT
T12 PWM channel 62. More...
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P33_9_OUT
T12 PWM channel 62. More...
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu60_CC62INA_P02_4_IN
T12 capture input 62. More...
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu60_CC62INB_P00_5_IN
T12 capture input 62. More...
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu60_CC62INC_P02_8_IN
T12 capture input 62. More...
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu61_CC62INA_P00_5_IN
T12 capture input 62. More...
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu61_CC62INB_P02_4_IN
T12 capture input 62. More...
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu61_CC62INC_P00_9_IN
T12 capture input 62. More...
IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0A_P02_6_IN
Hall capture input 0. More...
IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0C_P10_4_IN
Hall capture input 0. More...
IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0D_P40_0_IN
Hall capture input 0. More...
IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0A_P00_7_IN
Hall capture input 0. More...
IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0C_P33_7_IN
Hall capture input 0. More...
IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0D_P40_5_IN
Hall capture input 0. More...
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1A_P02_7_IN
Hall capture input 1. More...
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1B_P40_1_IN
Hall capture input 1. More...
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1C_P10_7_IN
Hall capture input 1. More...
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1D_P40_2_IN
Hall capture input 1. More...
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1A_P00_8_IN
Hall capture input 1. More...
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1B_P40_6_IN
Hall capture input 1. More...
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1C_P33_6_IN
Hall capture input 1. More...
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1D_P40_7_IN
Hall capture input 1. More...
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2A_P02_8_IN
Hall capture input 2. More...
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2B_P40_3_IN
Hall capture input 2. More...
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2C_P10_8_IN
Hall capture input 2. More...
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2D_P40_4_IN
Hall capture input 2. More...
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2A_P00_9_IN
Hall capture input 2. More...
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2B_P40_8_IN
Hall capture input 2. More...
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2C_P33_5_IN
Hall capture input 2. More...
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2D_P40_9_IN
Hall capture input 2. More...
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P02_1_OUT
T12 PWM channel 60. More...
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P11_9_OUT
T12 PWM channel 60. More...
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P15_7_OUT
T12 PWM channel 60. More...
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P34_3_OUT
T12 PWM channel 60. More...
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu61_COUT60_P00_2_OUT
T12 PWM channel 60. More...
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu61_COUT60_P20_11_OUT
T12 PWM channel 60. More...
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu61_COUT60_P33_12_OUT
T12 PWM channel 60. More...
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P02_3_OUT
T12 PWM channel 61. More...
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P11_6_OUT
T12 PWM channel 61. More...
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P15_8_OUT
T12 PWM channel 61. More...
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P34_5_OUT
T12 PWM channel 61. More...
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu61_COUT61_P00_4_OUT
T12 PWM channel 61. More...
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu61_COUT61_P20_12_OUT
T12 PWM channel 61. More...
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu61_COUT61_P33_10_OUT
T12 PWM channel 61. More...
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P02_5_OUT
T12 PWM channel 62. More...
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P11_3_OUT
T12 PWM channel 62. More...
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P14_0_OUT
T12 PWM channel 62. More...
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P33_15_OUT
T12 PWM channel 62. More...
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu61_COUT62_P00_6_OUT
T12 PWM channel 62. More...
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu61_COUT62_P20_13_OUT
T12 PWM channel 62. More...
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu61_COUT62_P33_8_OUT
T12 PWM channel 62. More...
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P00_0_OUT
T13 PWM channel 63. More...
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P11_2_OUT
T13 PWM channel 63. More...
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P14_1_OUT
T13 PWM channel 63. More...
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P32_4_OUT
T13 PWM channel 63. More...
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P34_1_OUT
T13 PWM channel 63. More...
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_10_OUT
T13 PWM channel 63. More...
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_12_OUT
T13 PWM channel 63. More...
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu61_COUT63_P20_7_OUT
T13 PWM channel 63. More...
IFX_EXTERN IfxCcu6_Ctrap_In IfxCcu60_CTRAPA_P00_11_IN
Trap input capture. More...
IFX_EXTERN IfxCcu6_Ctrap_In IfxCcu61_CTRAPA_P00_0_IN
Trap input capture. More...
IFX_EXTERN IfxCcu6_Ctrap_In IfxCcu61_CTRAPC_P33_4_IN
Trap input capture. More...
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu60_T12HRB_P00_7_IN
External timer start 12. More...
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu60_T12HRC_P00_9_IN
External timer start 12. More...
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu60_T12HRE_P00_0_IN
External timer start 12. More...
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu61_T12HRB_P02_6_IN
External timer start 12. More...
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu61_T12HRC_P02_8_IN
External timer start 12. More...
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu61_T12HRE_P00_11_IN
External timer start 12. More...
IFX_EXTERN IfxCcu6_T13hr_In IfxCcu60_T13HRB_P00_8_IN
External timer start 13. More...
IFX_EXTERN IfxCcu6_T13hr_In IfxCcu60_T13HRC_P00_9_IN
External timer start 13. More...
IFX_EXTERN IfxCcu6_T13hr_In IfxCcu61_T13HRB_P02_7_IN
External timer start 13. More...
IFX_EXTERN IfxCcu6_T13hr_In IfxCcu61_T13HRC_P02_8_IN
External timer start 13. More...
IFX_EXTERN const IfxCcu6_Cc60_Out * | IfxCcu6_Cc60_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS]
IfxCcu6_Cc60_Out table. More...
IFX_EXTERN const IfxCcu6_Cc60in_In * | IfxCcu6_Cc60in_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS]
IfxCcu6_Cc60in_In table. More...
IFX_EXTERN const IfxCcu6_Cc61_Out * | IfxCcu6_Cc61_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS]
IfxCcu6_Cc61_Out table. More...
IFX_EXTERN const IfxCcu6_Cc61in_In * | IfxCcu6_Cc61in_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS]
IfxCcu6_Cc61in_In table. More...
IFX_EXTERN const IfxCcu6_Cc62_Out * | IfxCcu6_Cc62_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS]
IfxCcu6_Cc62_Out table. More...
IFX_EXTERN const IfxCcu6_Cc62in_In * | IfxCcu6_Cc62in_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS]
IfxCcu6_Cc62in_In table. More...
IFX_EXTERN const IfxCcu6_Ccpos0_In * | IfxCcu6_Ccpos0_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS]
IfxCcu6_Ccpos0_In table. More...
IFX_EXTERN const IfxCcu6_Ccpos1_In * | IfxCcu6_Ccpos1_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS]
IfxCcu6_Ccpos1_In table. More...
IFX_EXTERN const IfxCcu6_Ccpos2_In * | IfxCcu6_Ccpos2_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS]
IfxCcu6_Ccpos2_In table. More...
IFX_EXTERN const IfxCcu6_Cout60_Out * | IfxCcu6_Cout60_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS]
IfxCcu6_Cout60_Out table. More...
IFX_EXTERN const IfxCcu6_Cout61_Out * | IfxCcu6_Cout61_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS]
IfxCcu6_Cout61_Out table. More...
IFX_EXTERN const IfxCcu6_Cout62_Out * | IfxCcu6_Cout62_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS]
IfxCcu6_Cout62_Out table. More...
IFX_EXTERN const IfxCcu6_Cout63_Out * | IfxCcu6_Cout63_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS]
IfxCcu6_Cout63_Out table. More...
IFX_EXTERN const IfxCcu6_Ctrap_In * | IfxCcu6_Ctrap_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS]
IfxCcu6_Ctrap_In table. More...
IFX_EXTERN const IfxCcu6_T12hr_In * | IfxCcu6_T12hr_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS]
IfxCcu6_T12hr_In table. More...
IFX_EXTERN const IfxCcu6_T13hr_In * | IfxCcu6_T13hr_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS]
IfxCcu6_T13hr_In table. More...

Detailed Description

CCU6 I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCcu6_PinMap.h.


iLLD_TC38A: IfxCcu6_Icu.h File Reference

  • Ccu6
  • Icu
Data Structures | Functions
IfxCcu6_Icu.h File Reference
iLLD » CCU6

CCU6 ICU details. More...

#include "Ccu6/Std/IfxCcu6.h"
#include "If/Ccu6If/Icu.h"
#include "Ccu6/Timer/IfxCcu6_Timer.h"
Include dependency graph for IfxCcu6_Icu.h:

Go to the source code of this file.

Data Structures

struct | IfxCcu6_Icu_Clock
Structure for clock configuration. More...
struct | IfxCcu6_Icu_InterruptConfig
Structure for interrupt configuration. More...
struct | IfxCcu6_Icu_Pins
Structure for capture input pins. More...
struct | IfxCcu6_Icu_TriggerConfig
Configuration structure for external triggers. More...
struct | IfxCcu6_Icu
Module handle. More...
struct | IfxCcu6_Icu_Channel
Channel handle. More...
struct | IfxCcu6_Icu_ChannelConfig
Configuration structure of the channel. More...
struct | IfxCcu6_Icu_Config
Configuration structure of the module. More...

Functions

IFX_EXTERN void | IfxCcu6_Icu_initModule (IfxCcu6_Icu *icu, const IfxCcu6_Icu_Config *config)
Initialises the module with default configuration. More...
IFX_EXTERN void | IfxCcu6_Icu_initModuleConfig (IfxCcu6_Icu_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values. More...
IFX_EXTERN uint32 | IfxCcu6_Icu_getTimeStamp (IfxCcu6_Icu_Channel *channel)
Returns the cuurent value stored in the Compare Shadow register (current time stamp) More...
IFX_EXTERN void | IfxCcu6_Icu_startCapture (IfxCcu6_Icu_Channel *channel)
Starts the input capture. More...
IFX_EXTERN void | IfxCcu6_Icu_stopCapture (IfxCcu6_Icu_Channel *channel)
Stops the input capture. More...
IFX_EXTERN void | IfxCcu6_Icu_initChannel (IfxCcu6_Icu_Channel *channel, const IfxCcu6_Icu_ChannelConfig *channelConfig)
Initialises the channel. More...
IFX_EXTERN void | IfxCcu6_Icu_initChannelConfig (IfxCcu6_Icu_ChannelConfig *channelConfig, Ifx_CCU6 *ccu6)
Fills the channel config structure with default values. More...

Detailed Description

CCU6 ICU details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCcu6_Icu.h.


iLLD_TC38A: IfxCcu6_PwmBc.h File Reference

  • Ccu6
  • PwmBc
Data Structures | Functions
IfxCcu6_PwmBc.h File Reference
iLLD » CCU6

CCU6 PWMBC details. More...

#include "Ccu6/Std/IfxCcu6.h"
#include "If/Ccu6If/PwmHl.h"
Include dependency graph for IfxCcu6_PwmBc.h:

Go to the source code of this file.

Data Structures

struct | IfxCcu6_PwmBc_InterruptConfig
Structure for interrupt configuration. More...
struct | IfxCcu6_PwmBc_MultiChannelControl
Structure for multichannel mode control. More...
struct | IfxCcu6_PwmBc_Pins
Structure for CCU6 output pin configuration. More...
struct | IfxCcu6_PwmBc_Timer12
Structure for Timer 12. More...
struct | IfxCcu6_PwmBc_Timer13
Structure for Timer 13. More...
struct | IfxCcu6_PwmBc_TriggerConfig
Configuration structure for external triggers. More...
struct | IfxCcu6_PwmBc
Module handle. More...
struct | IfxCcu6_PwmBc_Config
Configuration structure of the module. More...

Functions

IFX_EXTERN void | IfxCcu6_PwmBc_initModule (IfxCcu6_PwmBc *pwmBc, const IfxCcu6_PwmBc_Config *config)
Initialises the module with default configuration. More...
IFX_EXTERN void | IfxCcu6_PwmBc_initModuleConfig (IfxCcu6_PwmBc_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values. More...
IFX_EXTERN void | IfxCcu6_PwmBc_start (IfxCcu6_PwmBc *pwmBc)
Starts the Hall sensored based PWM. More...
IFX_EXTERN void | IfxCcu6_PwmBc_stop (IfxCcu6_PwmBc *pwmBc)
Stops the Hall sensored based PWM. More...
IFX_EXTERN uint32 | IfxCcu6_PwmBc_getMotorSpeed (IfxCcu6_PwmBc *pwmBc)
returns the current motor speed More...
IFX_EXTERN void | IfxCcu6_PwmBc_updateHallPattern (IfxCcu6_PwmBc *pwmBc, uint8 controlTable[6][3])
Updates the Hall pattern. More...

Detailed Description

CCU6 PWMBC details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCcu6_PwmBc.h.


iLLD_TC38A: IfxCcu6_PwmHl.h File Reference

  • Ccu6
  • PwmHl
Data Structures | Macros | Typedefs | Functions
IfxCcu6_PwmHl.h File Reference
iLLD » CCU6

CCU6 PWMHL details. More...

#include "StdIf/IfxStdIf_PwmHl.h"
#include "Ccu6/TimerWithTrigger/IfxCcu6_TimerWithTrigger.h"
Include dependency graph for IfxCcu6_PwmHl.h:

Go to the source code of this file.

Data Structures

struct | IfxCcu6_PwmHl_Base
Multi-channels PWM object definition (channels only) More...
struct | IfxCcu6_PwmHl_Config
CCU6: PWM HL configuration. More...
struct | IfxCcu6_PwmHl_Mode
Structure for PWM configuration. More...
struct | IfxCcu6_PwmHl_s
CCU6 PWM driver. More...

Macros

#define IFXCCU6_PWMHL_MAX_CHANNELS (3)
Maximal number of channels handled by the driver. One channel has a top and bottom pwm output. More...

Typedefs

typedef struct IfxCcu6_PwmHl_s | IfxCcu6_PwmHl
typedef void(* | IfxCcu6_PwmHl_Update) (IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)

Functions

IFX_EXTERN boolean | IfxCcu6_PwmHl_init (IfxCcu6_PwmHl *driver, const IfxCcu6_PwmHl_Config *config)
Initializes the timer object. More...
IFX_EXTERN void | IfxCcu6_PwmHl_initConfig (IfxCcu6_PwmHl_Config *config)
Initialize the configuration structure to default. More...
IFX_INLINE Ifx_ActiveState | IfxCcu6_PwmHl_invertActiveState (Ifx_ActiveState activeState)
Inverts the active state. More...
IFX_EXTERN float32 | IfxCcu6_PwmHl_getDeadtime (IfxCcu6_PwmHl *driver)
Returns the dead time. More...
IFX_EXTERN float32 | IfxCcu6_PwmHl_getMinPulse (IfxCcu6_PwmHl *driver)
Returns the minimum pulse. More...
IFX_EXTERN Ifx_Pwm_Mode | IfxCcu6_PwmHl_getMode (IfxCcu6_PwmHl *driver)
Returns Pwm mode. More...
IFX_EXTERN boolean | IfxCcu6_PwmHl_setDeadtime (IfxCcu6_PwmHl *driver, float32 deadtime)
Sets the dead time. More...
IFX_EXTERN boolean | IfxCcu6_PwmHl_setMinPulse (IfxCcu6_PwmHl *driver, float32 minPulse)
Sets the minimum pulse. More...
IFX_EXTERN boolean | IfxCcu6_PwmHl_setMode (IfxCcu6_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate() More...
IFX_EXTERN void | IfxCcu6_PwmHl_setOnTime (IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Sets the ON time Assign the ON time to the TOP channels. The ON time of the BOTTOM channels are complementary. More...
IFX_EXTERN void | IfxCcu6_PwmHl_setupChannels (IfxCcu6_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set channels which are generating PWM or in "stuck-at" state. More...
IFX_EXTERN boolean | IfxCcu6_PwmHl_stdIfPwmHlInit (IfxStdIf_PwmHl *stdif, IfxCcu6_PwmHl *driver)
Initialises the statndard interface Pwm. More...

Detailed Description

CCU6 PWMHL details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCcu6_PwmHl.h.

Macro Definition Documentation

◆ IFXCCU6_PWMHL_MAX_CHANNELS

#define IFXCCU6_PWMHL_MAX_CHANNELS (3)

Maximal number of channels handled by the driver. One channel has a top and bottom pwm output.

Definition at line 78 of file IfxCcu6_PwmHl.h.

Referenced by IfxCcu6_PwmHl_init().

Typedef Documentation

◆ IfxCcu6_PwmHl

typedef struct IfxCcu6_PwmHl_s IfxCcu6_PwmHl

Definition at line 84 of file IfxCcu6_PwmHl.h.

◆ IfxCcu6_PwmHl_Update

typedef void(* IfxCcu6_PwmHl_Update) (IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)

Definition at line 86 of file IfxCcu6_PwmHl.h.


iLLD_TC38A: IfxCcu6.h File Reference

  • Ccu6
  • Std
Enumerations | Functions
IfxCcu6.h File Reference
iLLD » CCU6

CCU6 basic functionality. More...

#include "_Impl/IfxCcu6_cfg.h"
#include "Src/Std/IfxSrc.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "Scu/Std/IfxScuWdt.h"
#include "Scu/Std/IfxScuCcu.h"
#include "_Utilities/Ifx_Assert.h"
#include "_PinMap/IfxCcu6_PinMap.h"
Include dependency graph for IfxCcu6.h:

Go to the source code of this file.

Enumerations

enum IfxCcu6_CaptureCompareInput {
IfxCcu6_CaptureCompareInput_cC60 = IFX_CCU6_PISEL0_ISCC60_OFF,
IfxCcu6_CaptureCompareInput_cC61 = IFX_CCU6_PISEL0_ISCC61_OFF,
IfxCcu6_CaptureCompareInput_cC62 = IFX_CCU6_PISEL0_ISCC62_OFF,
IfxCcu6_CaptureCompareInput_cTRAP = IFX_CCU6_PISEL0_ISTRP_OFF,
IfxCcu6_CaptureCompareInput_cCPOS0 = IFX_CCU6_PISEL0_ISPOS0_OFF,
IfxCcu6_CaptureCompareInput_cCPOS1 = IFX_CCU6_PISEL0_ISPOS1_OFF,
IfxCcu6_CaptureCompareInput_cCPOS2 = IFX_CCU6_PISEL0_ISPOS2_OFF
}
Input selection, ( CC6x capture input / CTRAP input / CCPOSx input )
Definition in Ifx_CCU.PISEL0. More...
enum IfxCcu6_CaptureCompareInputSignal {
IfxCcu6_CaptureCompareInputSignal_a = 0,
IfxCcu6_CaptureCompareInputSignal_b = 1,
IfxCcu6_CaptureCompareInputSignal_c = 2,
IfxCcu6_CaptureCompareInputSignal_d = 3
}
Selection of actual input signal for the capture compare inputs. More...
enum IfxCcu6_CaptureCompareState {
IfxCcu6_CaptureCompareState_set = 0,
IfxCcu6_CaptureCompareState_clear = 1,
IfxCcu6_CaptureCompareState_toggle = 2
}
capture/compare state to set / clear the CC6xST-bits More...
enum IfxCcu6_ChannelOut {
IfxCcu6_ChannelOut_cc0 = 0,
IfxCcu6_ChannelOut_cout0 = 1,
IfxCcu6_ChannelOut_cc1 = 2,
IfxCcu6_ChannelOut_cout1 = 3,
IfxCcu6_ChannelOut_cc2 = 4,
IfxCcu6_ChannelOut_cout2 = 5,
IfxCcu6_ChannelOut_cout3 = 6
}
Capture compare output pins. More...
enum IfxCcu6_CountingInputMode {
IfxCcu6_CountingInputMode_internal = 0,
IfxCcu6_CountingInputMode_manual = 1,
IfxCcu6_CountingInputMode_externalRising = 2,
IfxCcu6_CountingInputMode_externalFalling = 3
}
Defines the input event leading to a counting action of the timer (T12 / T13)
Definition in Ifx_CCU.PISEL2.B.ISCNT12 / Ifx_CCU.PISEL2.B.ISCNT13. More...
enum IfxCcu6_DelayBypass {
IfxCcu6_DelayBypass_notActive = 0,
IfxCcu6_DelayBypass_active = 1
}
Controls whether the source signal for the sampling of the Hall input pattern (selected by HSYNC) is delayed by the Dead-Time Counter 0
Definition in Ifx_CCU.T12MSEL.B.DBYP. More...
enum IfxCcu6_ExternalTriggerMode {
IfxCcu6_ExternalTriggerMode_disable = 0,
IfxCcu6_ExternalTriggerMode_risingEdge = 1,
IfxCcu6_ExternalTriggerMode_fallingEdge = 2,
IfxCcu6_ExternalTriggerMode_anyEdge = 3
}
Defines the event of signal T1xHR that can set the run bit T1xR by HW
Definition in Ifx_CCU.TCTR2.B.T12RSEL / IIfx_CCU.TCTR2.B.T13RSEL. More...
enum IfxCcu6_HallSensorTriggerMode {
IfxCcu6_HallSensorTriggerMode_permanentCheck = 0,
IfxCcu6_HallSensorTriggerMode_cM63 = 1,
IfxCcu6_HallSensorTriggerMode_t13PM = 2,
IfxCcu6_HallSensorTriggerMode_off = 3,
IfxCcu6_HallSensorTriggerMode_t12PMCountingUp = 4,
IfxCcu6_HallSensorTriggerMode_t12OMCountingDown = 5,
IfxCcu6_HallSensorTriggerMode_cM61CountingUp = 6,
IfxCcu6_HallSensorTriggerMode_cM61CountingDown = 7
}
Defines the source for the sampling of the Hall input pattern and the comparison to the current and the expected Hall pattern bit fields
Definition in Ifx_CCU.T12MSEL.HSYNC. More...
enum IfxCcu6_InterruptSource {
IfxCcu6_InterruptSource_cc60RisingEdge = IFX_CCU6_IS_ICC60R_OFF,
IfxCcu6_InterruptSource_cc60FallingEdge = IFX_CCU6_IS_ICC60F_OFF,
IfxCcu6_InterruptSource_cc61RisingEdge = IFX_CCU6_IS_ICC61R_OFF,
IfxCcu6_InterruptSource_cc61FallingEdge = IFX_CCU6_IS_ICC61F_OFF,
IfxCcu6_InterruptSource_cc62RisingEdge = IFX_CCU6_IS_ICC62R_OFF,
IfxCcu6_InterruptSource_cc62FallingEdge = IFX_CCU6_IS_ICC62F_OFF,
IfxCcu6_InterruptSource_t12OneMatch = IFX_CCU6_IS_T12OM_OFF,
IfxCcu6_InterruptSource_t12PeriodMatch = IFX_CCU6_IS_T12PM_OFF,
IfxCcu6_InterruptSource_t13CompareMatch = IFX_CCU6_IS_T13CM_OFF,
IfxCcu6_InterruptSource_t13PeriodMatch = IFX_CCU6_IS_T13PM_OFF,
IfxCcu6_InterruptSource_trap = IFX_CCU6_IS_TRPF_OFF,
IfxCcu6_InterruptSource_correctHallEvent = IFX_CCU6_IS_CHE_OFF,
IfxCcu6_InterruptSource_wrongHallEvent = IFX_CCU6_IS_WHE_OFF
}
Interrupt source selection Description in Ifx_CCU.IEN. More...
enum IfxCcu6_MultiChannelSwitchingSelect {
IfxCcu6_MultiChannelSwitchingSelect_noEvent = 0,
IfxCcu6_MultiChannelSwitchingSelect_correctHallEvent = 1,
IfxCcu6_MultiChannelSwitchingSelect_t13PeriodMatch = 2,
IfxCcu6_MultiChannelSwitchingSelect_t12OneMatch = 3,
IfxCcu6_MultiChannelSwitchingSelect_t12Channel1CompareMatch = 4,
IfxCcu6_MultiChannelSwitchingSelect_t12PeriodMatch = 5
}
Selection of the trigger request source (next multi-channel event) for the shadow transfer MCM_ST from MCMPS to MCMP
Definition in Ifx_CCU.MCMCTR.B.SWSEL. More...
enum IfxCcu6_MultiChannelSwitchingSync {
IfxCcu6_MultiChannelSwitchingSync_direct = 0,
IfxCcu6_MultiChannelSwitchingSync_t13ZeroMatch = 1,
IfxCcu6_MultiChannelSwitchingSync_t12ZeroMatch = 2
}
Selection of the synchronization mechanism for the shadow transfer event MCM_ST
Definition in Ifx_CCU.MCMCTR.B.SWSYN. More...
enum IfxCcu6_ServiceRequest {
IfxCcu6_ServiceRequest_0 = 0,
IfxCcu6_ServiceRequest_1,
IfxCcu6_ServiceRequest_2,
IfxCcu6_ServiceRequest_3
}
Selection of service request outputs. More...
enum IfxCcu6_SleepMode {
IfxCcu6_SleepMode_enable = 0,
IfxCcu6_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_CCU6.CLC.B.EDIS. More...
enum IfxCcu6_SuspendMode {
IfxCcu6_SuspendMode_none = 0,
IfxCcu6_SuspendMode_hard = 1,
IfxCcu6_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxCcu6_T12Channel {
IfxCcu6_T12Channel_0 = 0,
IfxCcu6_T12Channel_1,
IfxCcu6_T12Channel_2
}
Capture compare channel of Timer12. More...
enum IfxCcu6_T12ChannelMode {
IfxCcu6_T12ChannelMode_off = 0,
IfxCcu6_T12ChannelMode_compareMode = 1,
IfxCcu6_T12ChannelMode_doubleRegisterCaptureRisingAndFalling = 4,
IfxCcu6_T12ChannelMode_doubleRegisterCaptureRising = 5,
IfxCcu6_T12ChannelMode_doubleRegisterCaptureFalling = 6,
IfxCcu6_T12ChannelMode_doubleRegisterCaptureAny = 7,
IfxCcu6_T12ChannelMode_hallSensor = 8,
IfxCcu6_T12ChannelMode_hysteresisLikecompare = 9,
IfxCcu6_T12ChannelMode_multiInputCaptureRisingAndFalling = 10,
IfxCcu6_T12ChannelMode_multiInputCaptureFallingAndRising = 11,
IfxCcu6_T12ChannelMode_multiInputCaptureBothRising = 12,
IfxCcu6_T12ChannelMode_multiInputCaptureBothFalling = 13,
IfxCcu6_T12ChannelMode_multiInputCaptureAny = 14
}
The operating mode for the T12 channels are defined by the bit fields Ifx_CCU.T12MSEL.MSEL6x. More...
enum IfxCcu6_T12CountDirection {
IfxCcu6_T12CountDirection_up = 0,
IfxCcu6_T12CountDirection_down = 1
}
Counting direction of Timer12
Definition in Ifx_CCU.TCTR0.B.CDIR. More...
enum IfxCcu6_T12CountMode {
IfxCcu6_T12CountMode_edgeAligned = 0,
IfxCcu6_T12CountMode_centerAligned = 1
}
Operating mode of Timer 12
Definition in Ifx_CCU.TCTR0.B.CTM. More...
enum IfxCcu6_T13TriggerDirection {
IfxCcu6_T13TriggerDirection_noAction = 0,
IfxCcu6_T13TriggerDirection_onT12CountingUp = 1,
IfxCcu6_T13TriggerDirection_onT12CountingDown = 2,
IfxCcu6_T13TriggerDirection_anyT12 = 3
}
Delivers additional information to control the automatic set of bit T13R in the case that the trigger action defined by T13 trigger event control (T13TEC) is detected.
Definition in Ifx_CCU.TCTR2.B.T13TED. More...
enum IfxCcu6_T13TriggerEvent {
IfxCcu6_T13TriggerEvent_noAction = 0,
IfxCcu6_T13TriggerEvent_onCC60RCompare = 1,
IfxCcu6_T13TriggerEvent_onCC61RCompare = 2,
IfxCcu6_T13TriggerEvent_onCC62RCompare = 3,
IfxCcu6_T13TriggerEvent_onAnyT12Compare = 4,
IfxCcu6_T13TriggerEvent_onT12Period = 5,
IfxCcu6_T13TriggerEvent_onT12Zero = 6,
IfxCcu6_T13TriggerEvent_onCCPOSxEdge = 7
}
Selects the trigger event to start T13 (automatic set of T13R for synchronization to T12 compare signals)
Definition in Ifx_CCU.TCTR2.B.T13TEC. More...
enum IfxCcu6_TimerId {
IfxCcu6_TimerId_t12 = 0,
IfxCcu6_TimerId_t13 = 1
}
Timer number ( T12 / T13 ) More...
enum IfxCcu6_TimerInputClock {
IfxCcu6_TimerInputClock_fcc6 = 0,
IfxCcu6_TimerInputClock_fcc6By2 = 1,
IfxCcu6_TimerInputClock_fcc6By4 = 2,
IfxCcu6_TimerInputClock_fcc6By8 = 3,
IfxCcu6_TimerInputClock_fcc6By16 = 4,
IfxCcu6_TimerInputClock_fcc6By32 = 5,
IfxCcu6_TimerInputClock_fcc6By64 = 6,
IfxCcu6_TimerInputClock_fcc6By128 = 7
}
Selects the input clock for timers (T12 or T13) that is derived from the peripheral clock according to the equation
Definition in Ifx_CCU.TCTR0.B.T12CLK / Ifx_CCU.TCTR0.B.T13CLK. More...
enum IfxCcu6_TimerInputSignal {
IfxCcu6_TimerInputSignal_a = 0,
IfxCcu6_TimerInputSignal_b = 1,
IfxCcu6_TimerInputSignal_c = 2,
IfxCcu6_TimerInputSignal_d = 3,
IfxCcu6_TimerInputSignal_e = 0,
IfxCcu6_TimerInputSignal_f = 1,
IfxCcu6_TimerInputSignal_g = 2,
IfxCcu6_TimerInputSignal_h = 3
}
Selection of actual input signal for the timer inputs. More...
enum IfxCcu6_TimerRunStatus {
IfxCcu6_TimerRunStatus_stopped = 0,
IfxCcu6_TimerRunStatus_running = 1
}
Timer (T12 / T13) run status
Definition in Ifx_CCU.TCTR0.B.T12R and Ifx_CCU.TCTR0.B.T13R. More...
enum IfxCcu6_TrapMode {
IfxCcu6_TrapMode_automatic = 0,
IfxCcu6_TrapMode_manual = 1
}
Defines how the trap flag TRPF can be cleared after the trap input condition is no longer valid (either by CTRAP = 1 or by TRPPEN = 0)
Definition in Ifx_CCU.TRPCTR.B.TRPM2. More...
enum IfxCcu6_TrapState {
IfxCcu6_TrapState_t12Sync = 0,
IfxCcu6_TrapState_t13Sync = 1,
IfxCcu6_TrapState_immediate = 3
}
Defines the behavior of the selected outputs when leaving the trap state, after the trap condition has become inactive again
Definition in Ifx_CCU.TRPCTR.B.TRPMx (x = 0, 1) More...

Functions

IFX_INLINE void | IfxCcu6_clearCounter (Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Clears the counters of the Timers (T12, T13 individually or together based on the selection) More...
IFX_INLINE void | IfxCcu6_clearDeadTimeCounters (Ifx_CCU6 *ccu6)
Clears all the three dead-time counter channels to zero. More...
IFX_INLINE void | IfxCcu6_clearInterruptStatusFlag (Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Clears the selected interrupt flag. More...
IFX_INLINE void | IfxCcu6_clearT12OneNotification (Ifx_CCU6 *ccu6)
Clears the T12 One notification. More...
IFX_INLINE void | IfxCcu6_clearT12PeriodNotification (Ifx_CCU6 *ccu6)
Clears the T12 period notification. More...
IFX_INLINE void | IfxCcu6_clearT13CompareNotification (Ifx_CCU6 *ccu6)
Clears the T13 compare notification. More...
IFX_INLINE volatile uint32 * | IfxCcu6_getT12TimerPointer (Ifx_CCU6 *ccu6)
Returns the Timer pointer. More...
IFX_INLINE boolean | IfxCcu6_isModuleEnabled (Ifx_CCU6 *ccu6)
Returns the status of module enabled or disabled. More...
IFX_INLINE boolean | IfxCcu6_isT12OneNotification (Ifx_CCU6 *ccu6)
Returns the status of T12 one notification. More...
IFX_INLINE boolean | IfxCcu6_isT12PeriodNotification (Ifx_CCU6 *ccu6)
Returns the status of T12 period notification. More...
IFX_INLINE boolean | IfxCcu6_isT13CompareNotification (Ifx_CCU6 *ccu6)
Returns the status of T13 compare notification. More...
IFX_INLINE void | IfxCcu6_setCountingInputMode (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_CountingInputMode mode)
Sets the input event leading to a counting action of Timers (T12 / T13). More...
IFX_INLINE void | IfxCcu6_setCurrentHallPattern (Ifx_CCU6 *ccu6, uint8 pattern)
Sets the current hall pattern for the multichannel mode (writes into shadow register) More...
IFX_INLINE void | IfxCcu6_setDeadTimeValue (Ifx_CCU6 *ccu6, uint8 value)
Sets the delay between switching from the passive state to the active state of the selected outputs (dead time) More...
IFX_INLINE void | IfxCcu6_setExpectedHallPattern (Ifx_CCU6 *ccu6, uint8 pattern)
Sets the expected hall pattern for the multichannel mode (writes into shadow register) More...
IFX_INLINE void | IfxCcu6_setExternalRunMode (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ExternalTriggerMode mode)
Sets the event of signal T1xHR that can set the run bit T1xR by HW. More...
IFX_INLINE void | IfxCcu6_setHallSensorTriggerMode (Ifx_CCU6 *ccu6, IfxCcu6_HallSensorTriggerMode mode)
Sets source for the sampling of the Hall input pattern and the comparison to the current and the expected Hall pattern bit fields. More...
IFX_INLINE void | IfxCcu6_setInputClockFrequency (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_TimerInputClock frequency)
Sets the input clock for timers (T12 or T13) More...
IFX_INLINE void | IfxCcu6_setInterruptStatusFlag (Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Sets the selected interrupt flag. More...
IFX_INLINE void | IfxCcu6_setMultiChannelPwmPattern (Ifx_CCU6 *ccu6, uint8 pattern)
Sets the output pattern for the multichannel mode (writes into shadow register) More...
IFX_INLINE void | IfxCcu6_setMultiChannelSwitchingMode (Ifx_CCU6 *ccu6, IfxCcu6_MultiChannelSwitchingSelect mode)
Sets the trigger request source (next multi-channel event) for the shadow transfer MCM_ST from MCMPS to MCMP. More...
IFX_INLINE void | IfxCcu6_setMultiChannelSwitchingSync (Ifx_CCU6 *ccu6, IfxCcu6_MultiChannelSwitchingSync sync)
Sets the synchronization mechanism of the shadow transfer event MCM_ST
if it has been requested before (flag R set by an event selected by SWSEL) and if MCMEN = 1. More...
IFX_INLINE void | IfxCcu6_setOutputPassiveState (Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut, boolean state)
Sets the state of the corresponding compare channel, that is considered to be the passive state. More...
IFX_INLINE void | IfxCcu6_setSingleShotModeEnable (Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Enables / Disables the single shot mode of Timers (T12, T13 individually or together based on the selection) More...
IFX_INLINE void | IfxCcu6_setT12ChannelMode (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, IfxCcu6_T12ChannelMode mode)
Sets the operating mode of the Timer12 capture/compare channels. More...
IFX_INLINE void | IfxCcu6_setT12CountMode (Ifx_CCU6 *ccu6, IfxCcu6_T12CountMode mode)
IFX_INLINE void | IfxCcu6_setT12CounterValue (Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit counter value of Timer12. More...
IFX_INLINE void | IfxCcu6_setT12PeriodValue (Ifx_CCU6 *ccu6, uint16 value)
Sets the period value that leads Timer12 counter value to a period-match. More...
IFX_INLINE void | IfxCcu6_setT13CompareValue (Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit compare value of Timer13 (writes into shadow register) More...
IFX_INLINE void | IfxCcu6_setT13CounterValue (Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit counter value of Timer13. More...
IFX_INLINE void | IfxCcu6_setT13PeriodValue (Ifx_CCU6 *ccu6, uint16 value)
Sets the period value that leads Timer13 counter value to a period-match. More...
IFX_INLINE void | IfxCcu6_setT13TriggerEventDirection (Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerDirection direction)
Sets the Timer13 trigger event direction. More...
IFX_INLINE void | IfxCcu6_setT13TriggerEventMode (Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerEvent mode)
Sets the trigger event to start Timer13 (automatic set of T13R for synchronization to Timer12 compare signals) More...
IFX_INLINE void | IfxCcu6_setTrapMode (Ifx_CCU6 *ccu6, IfxCcu6_TrapMode mode)
Sets the mode of clearing the trap flag TRPF after the trap input condition is no longer valid. More...
IFX_INLINE void | IfxCcu6_setTrapState (Ifx_CCU6 *ccu6, IfxCcu6_TrapState state)
Sets behaviour of the selected outputs when leaving the trap state after the trap condition has become inactive again. More...
IFX_INLINE void | IfxCcu6_startTimer (Ifx_CCU6 *ccu6, boolean t12, boolean t13)
starts the timers (T12, T13 individually or together based on the selection) More...
IFX_INLINE void | IfxCcu6_stopTimer (Ifx_CCU6 *ccu6, boolean t12, boolean t13)
starts the timers (T12, T13 individually or together based on the selection) More...
IFX_INLINE void | IfxCcu6_updateHallPattern (Ifx_CCU6 *ccu6, uint8 currentHall, uint8 expectedHall, uint8 output)
Updates the hall pattern (current hall, expected hall, moduleation output), in a single write. More...
IFX_EXTERN void | IfxCcu6_connectTrigger (Ifx_CCU6 *ccu6, IfxCcu6_TrigOut outputLine, IfxCcu6_TrigSel selectedTrigger)
IFX_EXTERN void | IfxCcu6_routeInterruptNode (Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source, IfxCcu6_ServiceRequest serviceRequest)
Routes the interrupt node pointer to the selected service requests. More...
IFX_EXTERN void | IfxCcu6_setOutputPassiveLevel (Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut, boolean state)
Sets the passive state level of the PWM outputs of the module. More...
IFX_EXTERN void | IfxCcu6_setT12CaptureCompareState (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, IfxCcu6_CaptureCompareState state)
Sets software-control (independent set and clear conditions) for the Timer12 channel state bits CC6xST (x=0,1,2) More...
IFX_EXTERN void | IfxCcu6_setT12CompareValue (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, uint16 value)
Sets the 16-bit compare value of Timer12 (writes into shadow registers) More...
IFX_EXTERN float32 | IfxCcu6_setT12Frequency (Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period, IfxCcu6_T12CountMode countMode)
Sets the frequency and clock input of the Timer 12. Caution: If desired frequency cannot achieved (by successive divisions by 2) : Then the nearest frequency value is set ( >= desired value) The resulting frequency is captured in the handler element : CaptureFrequency. More...
IFX_EXTERN void | IfxCcu6_setT12InputSignal (Ifx_CCU6 *ccu6, IfxCcu6_T12hr_In *extInput)
selects the actual input signal for the timer inputs. More...
IFX_EXTERN void | IfxCcu6_setT13CaptureCompareState (Ifx_CCU6 *ccu6, IfxCcu6_CaptureCompareState state)
Sets software-control (independent set and clear conditions) for the Timer13 channel state bits CC63ST. More...
IFX_EXTERN float32 | IfxCcu6_setT13Frequency (Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period)
Sets the frequency and clock input of the Timer 13 Caution: If desired frequency cannot achieved (by successive divisions by 2) : Then the nearest frequency value is set ( >= desired value) The resulting frequency is captured in the handler element : captureFrequency. More...
IFX_EXTERN void | IfxCcu6_setT13InputSignal (Ifx_CCU6 *ccu6, IfxCcu6_T13hr_In *extInput)
selects the actual input signal for the timer inputs. More...
IFX_INLINE boolean | IfxCcu6_getDeadTimeStatus (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Indicate the status of the dead time generation for each compare channel (0, 1, 2) of timer T12. More...
IFX_INLINE boolean | IfxCcu6_getHallPatternSampleState (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the value of the input Hall pattern of the Timer12 capture/compare channels CC6POS6x (x = 0, 1, 2)
that has been compared to the current and expected value. More...
IFX_INLINE boolean | IfxCcu6_getInterruptStatusFlag (Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Gets the status of the selected interrupt flag. More...
IFX_INLINE boolean | IfxCcu6_getMultiChannelModeAvailabilityStatus (Ifx_CCU6 *ccu6)
indicates if the multi-channel mode functionality is available More...
IFX_INLINE boolean | IfxCcu6_getMultiChannelPWMPatternShadowTransferStatus (Ifx_CCU6 *ccu6)
Gets the status of the shadow transfer request from MCMPS to MCMP. More...
IFX_INLINE boolean | IfxCcu6_getShadowTransferStatus (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Returns the Timer (T12 / T13) shadow transfer enable status. More...
IFX_INLINE boolean | IfxCcu6_getT12CaptureCompareState (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the state of the Timer12 capture/compare channels CC6xST (x = 0, 1, 2) More...
IFX_INLINE IfxCcu6_T12CountDirection | IfxCcu6_getT12CountDirection (Ifx_CCU6 *ccu6)
Returns the current counting direction of Timer12. More...
IFX_INLINE boolean | IfxCcu6_getT13CaptureCompareState (Ifx_CCU6 *ccu6)
Returns the state of the Timer13 capture/compare channel CC63ST. More...
IFX_INLINE boolean | IfxCcu6_getTimerAvailabilityStatus (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
indicates the Timer blocks (T12 / T13) availability More...
IFX_INLINE IfxCcu6_TimerRunStatus | IfxCcu6_getTimerRunStatus (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Returns the Timer (T12 / T13) run status. More...
IFX_INLINE boolean | IfxCcu6_isModuleSuspended (Ifx_CCU6 *ccu6)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxCcu6_setSuspendMode (Ifx_CCU6 *ccu6, IfxCcu6_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN Ifx_CCU6 * | IfxCcu6_getAddress (IfxCcu6_Index ccu6)
Returns the module index of the selected CCU6 module. More...
IFX_EXTERN uint32 | IfxCcu6_getCaptureRegisterValue (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the capture register value of the selected channel. More...
IFX_EXTERN uint32 | IfxCcu6_getCaptureShadowRegisterValue (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the capture shadow register value of the selected channel. More...
IFX_EXTERN IfxCcu6_Index | IfxCcu6_getIndex (Ifx_CCU6 *ccu6)
Returns CCU6 index. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxCcu6_getSrcAddress (Ifx_CCU6 *ccu6, IfxCcu6_ServiceRequest serviceRequest)
Returns the service request register. More...
IFX_EXTERN uint32 | IfxCcu6_readTimer (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Returns the current value of the timer register. More...
IFX_INLINE void | IfxCcu6_clearAllInterruptStatusFlags (Ifx_CCU6 *ccu6)
Clears all Interrupt flags. More...
IFX_INLINE void | IfxCcu6_disableAdditionalPrescaler (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Disables the additional prescaler of 1/256 can be enabled for the prescaler of T12 or T13 to support higher clock frequencies. More...
IFX_INLINE void | IfxCcu6_disableDeadTime (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Disables the dead time generation for each compare channel (0, 1, 2) of Timer12. More...
IFX_INLINE void | IfxCcu6_disableDelayBypass (Ifx_CCU6 *ccu6)
Disables the delay of the source signal for the sampling of the Hall input pattern (selected by HSYNC) More...
IFX_INLINE void | IfxCcu6_disableInterrupt (Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Disables the selected interrupt. More...
IFX_INLINE void | IfxCcu6_disableMultiChannelMode (Ifx_CCU6 *ccu6)
Sets multi channel mode unavailable, A write access to MCMOUTS is ignored. More...
IFX_INLINE void | IfxCcu6_disableShadowTransfer (Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Disables shadow transfers of the timers (T12, T13 individually or together based on the selection) More...
IFX_INLINE void | IfxCcu6_disableSingleShotMode (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Disables the single shot-mode of Timers (T12 T13). More...
IFX_INLINE void | IfxCcu6_disableT13InvertedModulation (Ifx_CCU6 *ccu6)
Disables the Inversion of T13 signal for the modulation of the CC6x and COUT6x (x = 0, 1, 2) signals
T13 output CC63_O is equal to CC63ST. More...
IFX_INLINE void | IfxCcu6_disableTimer (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Sets Timer12 block unavailable, A write access to T12PR is ignored. More...
IFX_INLINE void | IfxCcu6_disableTrap (Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut)
Disables the trap functionality for the corresponding output signals. More...
IFX_INLINE void | IfxCcu6_disableTrapPin (Ifx_CCU6 *ccu6)
Disables the input (pin) function for the trap generation. More...
IFX_INLINE void | IfxCcu6_enableAdditionalPrescaler (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Enables the additional prescaler of 1/256 can be enabled for the prescaler of T12 or T13 to support higher clock frequencies. More...
IFX_INLINE void | IfxCcu6_enableCountEvent (Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Sets the single shot-mode of Timers (T12, T13). More...
IFX_INLINE void | IfxCcu6_enableDeadTime (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Enables the dead time generation for each compare channel (0, 1, 2) of Timer12. More...
IFX_INLINE void | IfxCcu6_enableDelayBypass (Ifx_CCU6 *ccu6)
Enables the delay of the source signal for the sampling of the Hall input pattern (selected by HSYNC) by the Dead-Time Counter 0. More...
IFX_INLINE void | IfxCcu6_enableHallPatternShadowTransfer (Ifx_CCU6 *ccu6)
Sets HP_ST immediately to update bit fields EXPH and CURH by EXPHS and CURHS. More...
IFX_INLINE void | IfxCcu6_enableInterrupt (Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Enables the selected interrupt. More...
IFX_INLINE void | IfxCcu6_enableMultiChannelMode (Ifx_CCU6 *ccu6)
Sets multi channel mode available, A write access to MCMOUTS is executed. More...
IFX_INLINE void | IfxCcu6_enableMultiChannelModeAvailability (Ifx_CCU6 *ccu6)
Enables the Multi Channel Mode Availability. More...
IFX_INLINE void | IfxCcu6_enableMultiChannelPwmPatternShadowTransfer (Ifx_CCU6 *ccu6)
Sets MCM_ST immediately to update bit field MCMP by the value of MCMPS. More...
IFX_INLINE void | IfxCcu6_enableMultiChannelT12DowncountingShadowTransfer (Ifx_CCU6 *ccu6)
Enables the shadow transfer T12_ST if flag MCMOUT.R is set or
becomes set while a T12 one match is detected while counting down. More...
IFX_INLINE void | IfxCcu6_enableMultiChannelT12UpcountingShadowTransfer (Ifx_CCU6 *ccu6)
Enables the shadow transfer T12_ST if flag MCMOUT.R is set or
becomes set while a T12 period match is detected while counting up. More...
IFX_INLINE void | IfxCcu6_enableMultiChannelT13UpcountingShadowTransfer (Ifx_CCU6 *ccu6)
Enables the shadow transfer T13_ST if flag MCMOUT.R is set or
becomes set while a T13 period match is detected. More...
IFX_INLINE void | IfxCcu6_enableShadowTransfer (Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Enables shadow transfers of the timers (T12, T13 individually or together based on the selection) More...
IFX_INLINE void | IfxCcu6_enableSingleShotMode (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Enables the single shot-mode of Timers (T12 T13). More...
IFX_INLINE void | IfxCcu6_enableT13InvertedModulation (Ifx_CCU6 *ccu6)
Enables the Inversion of T13 signal for the modulation of the CC6x and COUT6x (x = 0, 1, 2) signals
T13 output CC63_O is equal to CC63ST. More...
IFX_INLINE void | IfxCcu6_enableTimer (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Sets Timer12 block available, A write access to T12PR is executed. More...
IFX_INLINE void | IfxCcu6_enableTrap (Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut)
Enables the trap functionality for the corresponding output signals. More...
IFX_INLINE void | IfxCcu6_enableTrapPin (Ifx_CCU6 *ccu6)
Enables the input (pin) function for the trap generation. More...
IFX_INLINE void | IfxCcu6_setCaptureCompareInputSignal (Ifx_CCU6 *ccu6, IfxCcu6_CaptureCompareInput input, IfxCcu6_CaptureCompareInputSignal signal)
selects the actual input signal for the capture compare inputs. More...
IFX_EXTERN void | IfxCcu6_disableModulationOutput (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut)
Disables the modulation of the corresponding output signal by PWM pattern generated by the timers T12 and T13. More...
IFX_EXTERN void | IfxCcu6_disableModule (Ifx_CCU6 *ccu6)
Disables the selected CCU6 kernel. More...
IFX_EXTERN void | IfxCcu6_enableModulationOutput (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut)
Enables the modulation of the corresponding output signal by PWM pattern generated by the timers T12 and T13. More...
IFX_EXTERN void | IfxCcu6_enableModule (Ifx_CCU6 *ccu6)
Enables the selected CCU6 kernel. More...
IFX_INLINE void | IfxCcu6_initCc60InPin (const IfxCcu6_Cc60in_In *cc60In, IfxPort_InputMode inputMode)
Initialises a CC60 input pin. More...
IFX_INLINE void | IfxCcu6_initCc60OutPin (const IfxCcu6_Cc60_Out *cc60Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC60 output pin. More...
IFX_INLINE void | IfxCcu6_initCc61InPin (const IfxCcu6_Cc61in_In *cc61In, IfxPort_InputMode inputMode)
Initialises a CC61 input pin. More...
IFX_INLINE void | IfxCcu6_initCc61OutPin (const IfxCcu6_Cc61_Out *cc61Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC61 output pin. More...
IFX_INLINE void | IfxCcu6_initCc62InPin (const IfxCcu6_Cc62in_In *cc62In, IfxPort_InputMode inputMode)
Initialises a CC62 input pin. More...
IFX_INLINE void | IfxCcu6_initCc62OutPin (const IfxCcu6_Cc62_Out *cc62Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC62 output pin. More...
IFX_INLINE void | IfxCcu6_initCcpos0Pin (const IfxCcu6_Ccpos0_In *ccpos0, IfxPort_InputMode inputMode)
Initialises a CCPOS0 input pin. More...
IFX_INLINE void | IfxCcu6_initCcpos1Pin (const IfxCcu6_Ccpos1_In *ccpos1, IfxPort_InputMode inputMode)
Initialises a CCPOS1 input pin. More...
IFX_INLINE void | IfxCcu6_initCcpos2Pin (const IfxCcu6_Ccpos2_In *ccpos2, IfxPort_InputMode inputMode)
Initialises a CCPOS0 input pin. More...
IFX_INLINE void | IfxCcu6_initCout60Pin (const IfxCcu6_Cout60_Out *cout60, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT60 output pin. More...
IFX_INLINE void | IfxCcu6_initCout61Pin (const IfxCcu6_Cout61_Out *cout61, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT61 output pin. More...
IFX_INLINE void | IfxCcu6_initCout62Pin (const IfxCcu6_Cout62_Out *cout62, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT62 output pin. More...
IFX_INLINE void | IfxCcu6_initCout63Pin (const IfxCcu6_Cout63_Out *cout63, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT63 output pin. More...
IFX_INLINE void | IfxCcu6_initCtrapPin (const IfxCcu6_Ctrap_In *ctrap, IfxPort_InputMode inputMode)
Initialises a CTRAP input pin. More...
IFX_INLINE void | IfxCcu6_initT12hrPin (const IfxCcu6_T12hr_In *t12hrIn, IfxPort_InputMode inputMode)
Initialises a T12HR input pin. More...
IFX_INLINE void | IfxCcu6_initT13hrPin (const IfxCcu6_T13hr_In *t13hrIn, IfxPort_InputMode inputMode)
Initialises a T13HR input pin. More...
IFX_INLINE void | IfxCcu6_initCc60InPinWithPadLevel (const IfxCcu6_Cc60in_In *cc60In, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CC60 pin direction as input and configuring pad driver. More...
IFX_INLINE void | IfxCcu6_initCc61InPinWithPadLevel (const IfxCcu6_Cc61in_In *cc61In, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CC61 pin direction as input and configuring pad driver. More...
IFX_INLINE void | IfxCcu6_initCc62InPinWithPadLevel (const IfxCcu6_Cc62in_In *cc62In, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CC62 pin direction as input and configuring pad driver. More...
IFX_INLINE void | IfxCcu6_initCcpos0PinWithPadLevel (const IfxCcu6_Ccpos0_In *ccpos0, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CCPOS0 pin direction as input and configuring pad driver. More...
IFX_INLINE void | IfxCcu6_initCcpos1PinWithPadLevel (const IfxCcu6_Ccpos1_In *ccpos1, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CCPOS1 pin direction as input and configuring pad driver. More...
IFX_INLINE void | IfxCcu6_initCcpos2PinWithPadLevel (const IfxCcu6_Ccpos2_In *ccpos2, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CCPOS2 pin direction as input and configuring pad driver. More...
IFX_INLINE void | IfxCcu6_initCtrapPinWithPadLevel (const IfxCcu6_Ctrap_In *ctrap, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CTRAP pin direction as input and configuring pad driver. More...
IFX_INLINE void | IfxCcu6_initT12hrPinWithPadLevel (const IfxCcu6_T12hr_In *t12hrIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of T12HR pin direction as input and configuring pad driver. More...
IFX_INLINE void | IfxCcu6_initT13hrPinWithPadLevel (const IfxCcu6_T13hr_In *t13hrIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of T13HR pin direction as input and configuring pad driver. More...
IFX_INLINE void | IfxCcu6_setSleepMode (Ifx_CCU6 *ccu6, IfxCcu6_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_EXTERN void | IfxCcu6_resetModule (Ifx_CCU6 *ccu6)

Detailed Description

CCU6 basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCcu6.h.

Function Documentation

◆ IfxCcu6_initCc60InPinWithPadLevel()

IFX_INLINE void IfxCcu6_initCc60InPinWithPadLevel | ( | const IfxCcu6_Cc60in_In * | cc60In,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of CC60 pin direction as input and configuring pad driver.

Parameters
cc60In | CC60 capture input CC60IN
inputMode | The pin input mode which should be configured
padDriver | Pad Driver
Returns
None

Definition at line 1737 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_initChannel().

◆ IfxCcu6_initCc61InPinWithPadLevel()

IFX_INLINE void IfxCcu6_initCc61InPinWithPadLevel | ( | const IfxCcu6_Cc61in_In * | cc61In,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of CC61 pin direction as input and configuring pad driver.

Parameters
cc61In | CC61 capture input CC61IN
inputMode | The pin input mode which should be configured
padDriver | Pad Driver
Returns
None

Definition at line 1759 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_initChannel().

◆ IfxCcu6_initCc62InPinWithPadLevel()

IFX_INLINE void IfxCcu6_initCc62InPinWithPadLevel | ( | const IfxCcu6_Cc62in_In * | cc62In,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of CC62 pin direction as input and configuring pad driver.

Parameters
cc62In | CC62 capture input CC62IN
inputMode | The pin input mode which should be configured
padDriver | Pad Driver
Returns
None

Definition at line 1781 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_initChannel().

◆ IfxCcu6_initCcpos0PinWithPadLevel()

IFX_INLINE void IfxCcu6_initCcpos0PinWithPadLevel | ( | const IfxCcu6_Ccpos0_In * | ccpos0,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of CCPOS0 pin direction as input and configuring pad driver.

Parameters
ccpos0 | CC60 capture input CCPOS0
inputMode | The pin input mode which should be configured
padDriver | Pad Driver
Returns
None

Definition at line 1803 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_initChannel().

◆ IfxCcu6_initCcpos1PinWithPadLevel()

IFX_INLINE void IfxCcu6_initCcpos1PinWithPadLevel | ( | const IfxCcu6_Ccpos1_In * | ccpos1,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of CCPOS1 pin direction as input and configuring pad driver.

Parameters
ccpos1 | CC61 capture input CCPOS1
inputMode | The pin input mode which should be configured
padDriver | Pad Driver
Returns
None

Definition at line 1818 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_initChannel().

◆ IfxCcu6_initCcpos2PinWithPadLevel()

IFX_INLINE void IfxCcu6_initCcpos2PinWithPadLevel | ( | const IfxCcu6_Ccpos2_In * | ccpos2,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of CCPOS2 pin direction as input and configuring pad driver.

Parameters
ccpos2 | CC62 capture input CCPOS2
inputMode | The pin input mode which should be configured
padDriver | Pad Driver
Returns
None

Definition at line 1833 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_initChannel().

◆ IfxCcu6_initCtrapPinWithPadLevel()

IFX_INLINE void IfxCcu6_initCtrapPinWithPadLevel | ( | const IfxCcu6_Ctrap_In * | ctrap,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of CTRAP pin direction as input and configuring pad driver.

Parameters
ctrap | CTRAP input
inputMode | The pin input mode which should be configured
padDriver | Pad Driver
Returns
None

Definition at line 1876 of file IfxCcu6.h.

◆ IfxCcu6_initT12hrPinWithPadLevel()

IFX_INLINE void IfxCcu6_initT12hrPinWithPadLevel | ( | const IfxCcu6_T12hr_In * | t12hrIn,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of T12HR pin direction as input and configuring pad driver.

Parameters
t12hrIn | Timer 12 HR input T12HR
inputMode | The pin input mode which should be configured
padDriver | Pad driver
Returns
None

Definition at line 1891 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_initChannel().

◆ IfxCcu6_initT13hrPinWithPadLevel()

IFX_INLINE void IfxCcu6_initT13hrPinWithPadLevel | ( | const IfxCcu6_T13hr_In * | t13hrIn,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of T13HR pin direction as input and configuring pad driver.

Parameters
t13hrIn | Timer 13 HR input T13HR
inputMode | The pin input mode which should be configured
padDriver | Pad Driver
Returns
None

Definition at line 1906 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_initChannel().

◆ IfxCcu6_resetModule()

IFX_EXTERN void IfxCcu6_resetModule ( Ifx_CCU6 * ccu6 )
Parameters
ccu6 pointer to ccu6 registers
Returns
None

Definition at line 235 of file IfxCcu6.c.

◆ IfxCcu6_setSleepMode()

IFX_INLINE void IfxCcu6_setSleepMode | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_SleepMode | mode
 | ) |  |

Sets the sensitivity of the module to sleep signal.

Parameters
ccu6 | pointer to CCU6 registers
mode | mode selection (enable/disable)
Returns
None

Definition at line 2051 of file IfxCcu6.h.


iLLD_TC38A: IfxCcu6_Timer.h File Reference

  • Ccu6
  • Timer
Data Structures | Functions
IfxCcu6_Timer.h File Reference
iLLD » CCU6

CCU6 TIMER details. More...

#include "Ccu6/Std/IfxCcu6.h"
#include "If/Ccu6If/Timer.h"
Include dependency graph for IfxCcu6_Timer.h:

Go to the source code of this file.

Data Structures

struct | IfxCcu6_Timer_Clock
Structure for clock configuration. More...
struct | IfxCcu6_Timer_InterruptConfig
Structure for interrupt configuration. More...
struct | IfxCcu6_Timer_Timer12
Structure for Timer 12. More...
struct | IfxCcu6_Timer_Timer13
Structure for Timer 13. More...
struct | IfxCcu6_Timer_TriggerConfig
Configuration structure for external triggers. More...
struct | IfxCcu6_Timer_Pins
Structure for CCU6 output pin configuration. More...
struct | IfxCcu6_Timer
Module handle. More...
struct | IfxCcu6_Timer_Config
Configuration structure of the module. More...

Functions

IFX_EXTERN void | IfxCcu6_Timer_initModule (IfxCcu6_Timer *timer, const IfxCcu6_Timer_Config *config)
Initialises the module with default configuration. More...
IFX_EXTERN void | IfxCcu6_Timer_initModuleConfig (IfxCcu6_Timer_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values. More...
IFX_EXTERN void | IfxCcu6_Timer_countOneStep (IfxCcu6_Timer *timer)
Counts the timer one step. More...
IFX_EXTERN void | IfxCcu6_Timer_start (IfxCcu6_Timer *timer)
Starts the timer. More...
IFX_EXTERN void | IfxCcu6_Timer_startSingleShotMode (IfxCcu6_Timer *timer)
Starts the single shot mode of the timer. More...
IFX_EXTERN void | IfxCcu6_Timer_stop (IfxCcu6_Timer *timer)
Stops the timer. More...
IFX_EXTERN void | IfxCcu6_Timer_synchronousStart (IfxCcu6_Timer *timer)
Starts both the timers together. More...
IFX_EXTERN void | IfxCcu6_Timer_synchronousStop (IfxCcu6_Timer *timer)
Starts both the timers together. More...

Detailed Description

CCU6 TIMER details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCcu6_Timer.h.

Data Structure Documentation

◆ IfxCcu6_Timer_Pins

struct IfxCcu6_Timer_Pins

Structure for CCU6 output pin configuration.

Definition at line 282 of file IfxCcu6_Timer.h.

Collaboration diagram for IfxCcu6_Timer_Pins:
[legend]
Data Fields
IFX_CONST IfxCcu6_T12hr_In * | t12hr | T12HR input signal.
IFX_CONST IfxCcu6_T13hr_In * | t13hr | T13HR input signal.
IfxPort_InputMode | t1xhrInputMode | The T1xHR pin input mode which should be configured.


iLLD_TC38A: IfxCcu6_TimerWithTrigger.h File Reference

  • Ccu6
  • TimerWithTrigger
Data Structures | Functions
IfxCcu6_TimerWithTrigger.h File Reference
iLLD » CCU6

CCU6 TIMERWITHTRIGGER details. More...

#include "_PinMap/IfxCcu6_PinMap.h"
#include "Ccu6/Std/IfxCcu6.h"
#include "StdIf/IfxStdIf_Timer.h"
Include dependency graph for IfxCcu6_TimerWithTrigger.h:

Go to the source code of this file.

Data Structures

struct | IfxCcu6_TimerWithTrigger_Base
Structure for the timer base. More...
struct | IfxCcu6_TimerWithTrigger
CCU6 Timer interface. More...
struct | IfxCcu6_TimerWithTrigger_Config
Configuration structure for T12 and T13 Timer. More...

Functions

IFX_EXTERN boolean | IfxCcu6_TimerWithTrigger_acknowledgeTimerIrq (IfxCcu6_TimerWithTrigger *driver)
Returns the timer event. More...
IFX_EXTERN boolean | IfxCcu6_TimerWithTrigger_acknowledgeTriggerIrq (IfxCcu6_TimerWithTrigger *driver)
Returns the trigger event. More...
IFX_EXTERN void | IfxCcu6_TimerWithTrigger_applyUpdate (IfxCcu6_TimerWithTrigger *driver)
Enable the transfer of the shadow registers. More...
IFX_EXTERN void | IfxCcu6_TimerWithTrigger_disableUpdate (IfxCcu6_TimerWithTrigger *driver)
Disables the upadte
This function is has an empty body as the updated is disabled automatically after the shadow transfer. More...
IFX_EXTERN float32 | IfxCcu6_TimerWithTrigger_getFrequency (IfxCcu6_TimerWithTrigger *driver)
Returns the frequency. More...
IFX_EXTERN float32 | IfxCcu6_TimerWithTrigger_getInputFrequency (IfxCcu6_TimerWithTrigger *driver)
Returns the Input frequncy. More...
IFX_EXTERN Ifx_TimerValue | IfxCcu6_TimerWithTrigger_getPeriod (IfxCcu6_TimerWithTrigger *driver)
Returns the period of the timer. More...
IFX_EXTERN float32 | IfxCcu6_TimerWithTrigger_getResolution (IfxCcu6_TimerWithTrigger *driver)
Returns the resolution. More...
IFX_EXTERN void | IfxCcu6_TimerWithTrigger_run (IfxCcu6_TimerWithTrigger *driver)
Runs the timer. More...
IFX_EXTERN boolean | IfxCcu6_TimerWithTrigger_setFrequency (IfxCcu6_TimerWithTrigger *driver, float32 frequency)
Sets the frequency. More...
IFX_EXTERN boolean | IfxCcu6_TimerWithTrigger_setPeriod (IfxCcu6_TimerWithTrigger *driver, Ifx_TimerValue period)
Sets the period for the timer. More...
IFX_EXTERN void | IfxCcu6_TimerWithTrigger_setSingleMode (IfxCcu6_TimerWithTrigger *driver, boolean enabled)
Sets the single shot mode of the timer. More...
IFX_EXTERN void | IfxCcu6_TimerWithTrigger_setTrigger (IfxCcu6_TimerWithTrigger *driver, Ifx_TimerValue triggerPoint)
Sets the trigger. More...
IFX_EXTERN boolean | IfxCcu6_TimerWithTrigger_stdIfTimerInit (IfxStdIf_Timer *stdif, IfxCcu6_TimerWithTrigger *driver)
Initializes the standard interface timer. More...
IFX_EXTERN void | IfxCcu6_TimerWithTrigger_stop (IfxCcu6_TimerWithTrigger *driver)
Stops the timer. More...
IFX_EXTERN void | IfxCcu6_TimerWithTrigger_updateInputFrequency (IfxCcu6_TimerWithTrigger *driver)
Updates the input frequency. More...
IFX_EXTERN volatile uint32 * | IfxCcu6_TimerWithTrigger_getPointer (IfxCcu6_TimerWithTrigger *driver)
Returns the pointer to timer channel. More...
IFX_EXTERN boolean | IfxCcu6_TimerWithTrigger_init (IfxCcu6_TimerWithTrigger *driver, IfxCcu6_TimerWithTrigger_Config *config)
Initialises the timer object
T12 is configured as timer, T13 is optionally configured as trigger
T12CLK, T12PRE and T12PR are chosen to achieve maximum PWM resolution
Note: To achieve maximum PWM resolution, the requested T12 frequency should be the
lowest PWM frequency.
. More...
IFX_EXTERN void | IfxCcu6_TimerWithTrigger_initConfig (IfxCcu6_TimerWithTrigger_Config *config, Ifx_CCU6 *ccu6)
Initializes the configuration structure to default. More...

Detailed Description

CCU6 TIMERWITHTRIGGER details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCcu6_TimerWithTrigger.h.

Data Structure Documentation

◆ IfxCcu6_TimerWithTrigger

struct IfxCcu6_TimerWithTrigger

CCU6 Timer interface.

Definition at line 87 of file IfxCcu6_TimerWithTrigger.h.

Collaboration diagram for IfxCcu6_TimerWithTrigger:
[legend]
Data Fields
IfxCcu6_TimerWithTrigger_Base | base | Timer base structure.
Ifx_CCU6 * | ccu6 | CCU6 module used for the timer functionality.

◆ IfxCcu6_TimerWithTrigger_Config

struct IfxCcu6_TimerWithTrigger_Config

Configuration structure for T12 and T13 Timer.

Definition at line 95 of file IfxCcu6_TimerWithTrigger.h.

Collaboration diagram for IfxCcu6_TimerWithTrigger_Config:
[legend]
Data Fields
IfxStdIf_Timer_Config | base | Standard interface timer configuration.
Ifx_CCU6 * | ccu6 | CCU6 module used for the timer functionality.
IfxCcu6_ServiceRequest | serviceReqNrPeriod | Service request used for the period.
IfxCcu6_ServiceRequest | serviceReqNrTrigger | Service request used for the Trigger.
IfxCcu6_Cout63_Out * | triggerOut |


iLLD_TC38A: IfxCcu6_TPwm.h File Reference

  • Ccu6
  • TPwm
Data Structures | Functions
IfxCcu6_TPwm.h File Reference
iLLD » CCU6

CCU6 TPWM details. More...

#include "Ccu6/Std/IfxCcu6.h"
#include "If/Ccu6If/TPwm.h"
Include dependency graph for IfxCcu6_TPwm.h:

Go to the source code of this file.

Data Structures

struct | IfxCcu6_TPwm_Clock
Structure for clock configuration. More...
struct | IfxCcu6_TPwm_InterruptConfig
Structure for interrupt configuration. More...
struct | IfxCcu6_TPwm_Pins
Structure for CCU6 output pin configuration. More...
struct | IfxCcu6_TPwm_Timer12
Structure for Timer 12. More...
struct | IfxCcu6_TPwm_Timer13
Structure for Timer 13. More...
struct | IfxCcu6_TPwm_TriggerConfig
Configuration structure for external triggers. More...
struct | IfxCcu6_TPwm
Module handle. More...
struct | IfxCcu6_TPwm_Config
Configuration structure of the module. More...

Functions

IFX_EXTERN void | IfxCcu6_TPwm_initModuleConfig (IfxCcu6_TPwm_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values. More...
IFX_EXTERN void | IfxCcu6_TPwm_initModule (IfxCcu6_TPwm *tPwm, const IfxCcu6_TPwm_Config *config)
Initialises the module with default configuration. More...
IFX_EXTERN void | IfxCcu6_TPwm_pause (IfxCcu6_TPwm *tPwm)
Pauses the triggered PWM. More...
IFX_EXTERN void | IfxCcu6_TPwm_resume (IfxCcu6_TPwm *tPwm)
Resumes the triggered PWM. More...
IFX_EXTERN void | IfxCcu6_TPwm_start (IfxCcu6_TPwm *tPwm)
Starts the triggered PWM. More...
IFX_EXTERN void | IfxCcu6_TPwm_stop (IfxCcu6_TPwm *tPwm)
Stops the triggered PWM. More...

Detailed Description

CCU6 TPWM details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCcu6_TPwm.h.


iLLD_TC38A: CONVCTRL

Modules | Files
CONVCTRL
iLLD
Collaboration diagram for CONVCTRL:

Modules

Implementation
Standard Driver

Files

file | IfxConvctrl_cfg.h
CONVCTRL on-chip implementation data.
file | IfxConvctrl.h
CONVCTRL basic functionality.

Detailed Description


iLLD_TC38A: Implementation

Implementation
iLLD » CONVCTRL
Collaboration diagram for Implementation:


iLLD_TC38A: Standard Driver

Modules
Standard Driver
iLLD » CONVCTRL
Collaboration diagram for Standard Driver:

Modules

Configuration Functions
Initialization Functions
Enums

Detailed Description


iLLD_TC38A: Configuration Functions

Functions
Configuration Functions
iLLD » CONVCTRL » Standard Driver
Collaboration diagram for Configuration Functions:

Functions

IFX_INLINE void | IfxConvctrl_clearAlarmFlag (Ifx_CONVERTER *convctrl)
This will disable all the Converter Controller Alarms(from reaching out of module) in addition to clearing the ALF flag. More...
IFX_INLINE void | IfxConvctrl_enableConfigurationAccess (Ifx_CONVERTER *convctrl)
Access to all CONVCTRL registers is enabled. More...
IFX_INLINE void | IfxConvctrl_enableModule (Ifx_CONVERTER *convctrl)
Enables the module clock, thereby enabling the module. More...
IFX_INLINE void | IfxConvctrl_injectCounterFault (Ifx_CONVERTER *convctrl)
Introducing fault in the Down Counter. More...
IFX_INLINE void | IfxConvctrl_injectPhaseSyncDividerFault (Ifx_CONVERTER *convctrl)
Introducing fault in Phase Synchronizer Divider(PHSDIV) More...
IFX_INLINE boolean | IfxConvctrl_isErrorDetected (Ifx_CONVERTER *convctrl)
IFX_INLINE boolean | IfxConvctrl_isModuleSuspended (Ifx_CONVERTER *convctrl)
IFX_INLINE void | IfxConvctrl_lockConfigurationAccess (Ifx_CONVERTER *convctrl)
IFX_INLINE void | IfxConvctrl_setDividerValue (Ifx_CONVERTER *convctrl, IfxConvctrl_PhaseSynchronizerDivider dividerValue)
Set the Phase Synchronizer Divider value. More...
IFX_INLINE void | IfxConvctrl_setSuspendMode (Ifx_CONVERTER *convctrl, IfxConvctrl_SuspendMode mode)
Configure the suspend mode. More...
IFX_EXTERN void | IfxConvctrl_resetModule (Ifx_CONVERTER *convctrl)

Detailed Description

Function Documentation

◆ IfxConvctrl_clearAlarmFlag()

IFX_INLINE void IfxConvctrl_clearAlarmFlag ( Ifx_CONVERTER * convctrl )

This will disable all the Converter Controller Alarms(from reaching out of module) in addition to clearing the ALF flag.

Parameters
convctrl Pointer to Converter Controller SFRs
Returns
None

Definition at line 205 of file IfxConvctrl.h.

◆ IfxConvctrl_enableConfigurationAccess()

IFX_INLINE void IfxConvctrl_enableConfigurationAccess ( Ifx_CONVERTER * convctrl )

Access to all CONVCTRL registers is enabled.

Parameters
convctrl Pointer to Converter Controller SFRs
Returns
None

Definition at line 211 of file IfxConvctrl.h.

Referenced by IfxConvctrl_initializeModule().

◆ IfxConvctrl_enableModule()

IFX_INLINE void IfxConvctrl_enableModule ( Ifx_CONVERTER * convctrl )

Enables the module clock, thereby enabling the module.

Parameters
convctrl Pointer to Converter Controller SFRs
Returns
None

Definition at line 222 of file IfxConvctrl.h.

Referenced by IfxConvctrl_initializeModule().

◆ IfxConvctrl_injectCounterFault()

IFX_INLINE void IfxConvctrl_injectCounterFault ( Ifx_CONVERTER * convctrl )

Introducing fault in the Down Counter.

Parameters
convctrl Pointer to Converter Controller SFRs
Returns
None

Definition at line 241 of file IfxConvctrl.h.

◆ IfxConvctrl_injectPhaseSyncDividerFault()

IFX_INLINE void IfxConvctrl_injectPhaseSyncDividerFault ( Ifx_CONVERTER * convctrl )

Introducing fault in Phase Synchronizer Divider(PHSDIV)

Parameters
convctrl Pointer to Converter Controller SFRs
Returns
None

Definition at line 255 of file IfxConvctrl.h.

◆ IfxConvctrl_isErrorDetected()

IFX_INLINE boolean IfxConvctrl_isErrorDetected ( Ifx_CONVERTER * convctrl )
Parameters
convctrl Pointer to Converter Controller SFRs
Returns
TRUE - Safety problem has been detected FALSE - No error indicated

Definition at line 269 of file IfxConvctrl.h.

◆ IfxConvctrl_isModuleSuspended()

IFX_INLINE boolean IfxConvctrl_isModuleSuspended ( Ifx_CONVERTER * convctrl )
Parameters
convctrl Pointer to Converter Controller SFRs

Definition at line 275 of file IfxConvctrl.h.

◆ IfxConvctrl_lockConfigurationAccess()

IFX_INLINE void IfxConvctrl_lockConfigurationAccess ( Ifx_CONVERTER * convctrl )
Parameters
convctrl Pointer to Converter Controller SFRs
Returns
None

Definition at line 281 of file IfxConvctrl.h.

Referenced by IfxConvctrl_initializeModule().

◆ IfxConvctrl_resetModule()

IFX_EXTERN void IfxConvctrl_resetModule ( Ifx_CONVERTER * convctrl )
Parameters
convctrl Pointer to Converter Controller SFRs
Returns
None

Definition at line 52 of file IfxConvctrl.c.

◆ IfxConvctrl_setDividerValue()

IFX_INLINE void IfxConvctrl_setDividerValue | ( | Ifx_CONVERTER * | convctrl,
 |  | IfxConvctrl_PhaseSynchronizerDivider | dividerValue
 | ) |  |

Set the Phase Synchronizer Divider value.

Parameters
convctrl | Pointer to Converter Controller SFRs
dividerValue | Phase Synchronizer divider value
Returns
None

Definition at line 292 of file IfxConvctrl.h.

Referenced by IfxConvctrl_initializeModule().

◆ IfxConvctrl_setSuspendMode()

IFX_INLINE void IfxConvctrl_setSuspendMode | ( | Ifx_CONVERTER * | convctrl,
 |  | IfxConvctrl_SuspendMode | mode
 | ) |  |

Configure the suspend mode.

Parameters
convctrl | Pointer to Converter Controller SFRs
mode | Suspend Modes
Returns
None

Definition at line 306 of file IfxConvctrl.h.


iLLD_TC38A: Initialization Functions

Functions
Initialization Functions
iLLD » CONVCTRL » Standard Driver
Collaboration diagram for Initialization Functions:

Functions

IFX_INLINE void IfxConvctrl_initializeModule (Ifx_CONVERTER *convctrl, IfxConvctrl_PhaseSynchronizerDivider divisionFactor)

Detailed Description

Function Documentation

◆ IfxConvctrl_initializeModule()

IFX_INLINE void IfxConvctrl_initializeModule | ( | Ifx_CONVERTER * | convctrl,
 |  | IfxConvctrl_PhaseSynchronizerDivider | divisionFactor
 | ) |  |
Parameters
convctrl | Pointer to Converter Controller SFRs
divisionFactor | Prescaling factor between the peripheral clock and the phase synchronization signal.
Returns
None

Definition at line 232 of file IfxConvctrl.h.


iLLD_TC38A: Enums

Enumerations
Enums
iLLD » CONVCTRL » Standard Driver
Collaboration diagram for Enums:

Enumerations

enum IfxConvctrl_PhaseSynchronizerDivider {
IfxConvctrl_PhaseSynchronizerDivider_off = 0,
IfxConvctrl_PhaseSynchronizerDivider_2 = 1,
IfxConvctrl_PhaseSynchronizerDivider_3 = 2,
IfxConvctrl_PhaseSynchronizerDivider_4 = 3,
IfxConvctrl_PhaseSynchronizerDivider_5 = 4,
IfxConvctrl_PhaseSynchronizerDivider_6 = 5,
IfxConvctrl_PhaseSynchronizerDivider_7 = 6,
IfxConvctrl_PhaseSynchronizerDivider_8 = 7,
IfxConvctrl_PhaseSynchronizerDivider_9 = 8,
IfxConvctrl_PhaseSynchronizerDivider_10 = 9,
IfxConvctrl_PhaseSynchronizerDivider_11 = 10,
IfxConvctrl_PhaseSynchronizerDivider_12 = 11,
IfxConvctrl_PhaseSynchronizerDivider_13 = 12,
IfxConvctrl_PhaseSynchronizerDivider_14 = 13,
IfxConvctrl_PhaseSynchronizerDivider_15 = 14,
IfxConvctrl_PhaseSynchronizerDivider_16 = 15
}
Prescaling factor between the peripheral clock and the phase synchronization signal.To be filled in PHSCFG.B.PHSDIV. More...
enum IfxConvctrl_SuspendMode {
IfxConvctrl_SuspendMode_noSuspend = 0,
IfxConvctrl_SuspendMode_1 = 1,
IfxConvctrl_SuspendMode_2 = 2
}
Modes of sensitivity to the suspend signal coming from the OCDS Trigger Switch (OTGS). To be filled in OCS.B.SUS. More...

Detailed Description

Enumeration Type Documentation

◆ IfxConvctrl_PhaseSynchronizerDivider

enum IfxConvctrl_PhaseSynchronizerDivider

Prescaling factor between the peripheral clock and the phase synchronization signal.To be filled in PHSCFG.B.PHSDIV.

Enumerator
IfxConvctrl_PhaseSynchronizerDivider_off | Off, the phase synchronization signal is constantly active.
IfxConvctrl_PhaseSynchronizerDivider_2 | The phase synchronization signal is generated at fPER / 2.
IfxConvctrl_PhaseSynchronizerDivider_3 | The phase synchronization signal is generated at fPER / 3.
IfxConvctrl_PhaseSynchronizerDivider_4 | The phase synchronization signal is generated at fPER / 4.
IfxConvctrl_PhaseSynchronizerDivider_5 | The phase synchronization signal is generated at fPER / 5.
IfxConvctrl_PhaseSynchronizerDivider_6 | The phase synchronization signal is generated at fPER / 6.
IfxConvctrl_PhaseSynchronizerDivider_7 | The phase synchronization signal is generated at fPER / 7.
IfxConvctrl_PhaseSynchronizerDivider_8 | The phase synchronization signal is generated at fPER / 8.
IfxConvctrl_PhaseSynchronizerDivider_9 | The phase synchronization signal is generated at fPER / 9.
IfxConvctrl_PhaseSynchronizerDivider_10 | The phase synchronization signal is generated at fPER / 10.
IfxConvctrl_PhaseSynchronizerDivider_11 | The phase synchronization signal is generated at fPER / 11.
IfxConvctrl_PhaseSynchronizerDivider_12 | The phase synchronization signal is generated at fPER / 12.
IfxConvctrl_PhaseSynchronizerDivider_13 | The phase synchronization signal is generated at fPER / 13.
IfxConvctrl_PhaseSynchronizerDivider_14 | The phase synchronization signal is generated at fPER / 14.
IfxConvctrl_PhaseSynchronizerDivider_15 | The phase synchronization signal is generated at fPER / 15.
IfxConvctrl_PhaseSynchronizerDivider_16 | The phase synchronization signal is generated at fPER / 15.

Definition at line 72 of file IfxConvctrl.h.

◆ IfxConvctrl_SuspendMode

enum IfxConvctrl_SuspendMode

Modes of sensitivity to the suspend signal coming from the OCDS Trigger Switch (OTGS). To be filled in OCS.B.SUS.

Enumerator
IfxConvctrl_SuspendMode_noSuspend | Module will not suspent.
IfxConvctrl_SuspendMode_1 | Suspend Mode 1 : Stop generating synchronization pulses.
IfxConvctrl_SuspendMode_2 | Disable the Phase Synchronizer.

Definition at line 95 of file IfxConvctrl.h.


iLLD_TC38A: IfxConvctrl_cfg.h File Reference

  • _Impl
IfxConvctrl_cfg.h File Reference
iLLD » CONVCTRL

CONVCTRL on-chip implementation data. More...

Go to the source code of this file.

Detailed Description

CONVCTRL on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxConvctrl_cfg.h.


iLLD_TC38A: IfxConvctrl.h File Reference

  • Convctrl
  • Std
Enumerations | Functions
IfxConvctrl.h File Reference
iLLD » CONVCTRL

CONVCTRL basic functionality. More...

#include "_Impl/IfxConvctrl_cfg.h"
#include "IfxConverter_reg.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "_Utilities/Ifx_Assert.h"
#include "IfxConverter_bf.h"
#include "Scu/Std/IfxScuCcu.h"
#include "Scu/Std/IfxScuWdt.h"
Include dependency graph for IfxConvctrl.h:

Go to the source code of this file.

Enumerations

enum IfxConvctrl_PhaseSynchronizerDivider {
IfxConvctrl_PhaseSynchronizerDivider_off = 0,
IfxConvctrl_PhaseSynchronizerDivider_2 = 1,
IfxConvctrl_PhaseSynchronizerDivider_3 = 2,
IfxConvctrl_PhaseSynchronizerDivider_4 = 3,
IfxConvctrl_PhaseSynchronizerDivider_5 = 4,
IfxConvctrl_PhaseSynchronizerDivider_6 = 5,
IfxConvctrl_PhaseSynchronizerDivider_7 = 6,
IfxConvctrl_PhaseSynchronizerDivider_8 = 7,
IfxConvctrl_PhaseSynchronizerDivider_9 = 8,
IfxConvctrl_PhaseSynchronizerDivider_10 = 9,
IfxConvctrl_PhaseSynchronizerDivider_11 = 10,
IfxConvctrl_PhaseSynchronizerDivider_12 = 11,
IfxConvctrl_PhaseSynchronizerDivider_13 = 12,
IfxConvctrl_PhaseSynchronizerDivider_14 = 13,
IfxConvctrl_PhaseSynchronizerDivider_15 = 14,
IfxConvctrl_PhaseSynchronizerDivider_16 = 15
}
Prescaling factor between the peripheral clock and the phase synchronization signal.To be filled in PHSCFG.B.PHSDIV. More...
enum IfxConvctrl_SuspendMode {
IfxConvctrl_SuspendMode_noSuspend = 0,
IfxConvctrl_SuspendMode_1 = 1,
IfxConvctrl_SuspendMode_2 = 2
}
Modes of sensitivity to the suspend signal coming from the OCDS Trigger Switch (OTGS). To be filled in OCS.B.SUS. More...

Functions

IFX_INLINE void | IfxConvctrl_clearAlarmFlag (Ifx_CONVERTER *convctrl)
This will disable all the Converter Controller Alarms(from reaching out of module) in addition to clearing the ALF flag. More...
IFX_INLINE void | IfxConvctrl_enableConfigurationAccess (Ifx_CONVERTER *convctrl)
Access to all CONVCTRL registers is enabled. More...
IFX_INLINE void | IfxConvctrl_enableModule (Ifx_CONVERTER *convctrl)
Enables the module clock, thereby enabling the module. More...
IFX_INLINE void | IfxConvctrl_injectCounterFault (Ifx_CONVERTER *convctrl)
Introducing fault in the Down Counter. More...
IFX_INLINE void | IfxConvctrl_injectPhaseSyncDividerFault (Ifx_CONVERTER *convctrl)
Introducing fault in Phase Synchronizer Divider(PHSDIV) More...
IFX_INLINE boolean | IfxConvctrl_isErrorDetected (Ifx_CONVERTER *convctrl)
IFX_INLINE boolean | IfxConvctrl_isModuleSuspended (Ifx_CONVERTER *convctrl)
IFX_INLINE void | IfxConvctrl_lockConfigurationAccess (Ifx_CONVERTER *convctrl)
IFX_INLINE void | IfxConvctrl_setDividerValue (Ifx_CONVERTER *convctrl, IfxConvctrl_PhaseSynchronizerDivider dividerValue)
Set the Phase Synchronizer Divider value. More...
IFX_INLINE void | IfxConvctrl_setSuspendMode (Ifx_CONVERTER *convctrl, IfxConvctrl_SuspendMode mode)
Configure the suspend mode. More...
IFX_EXTERN void | IfxConvctrl_resetModule (Ifx_CONVERTER *convctrl)
IFX_INLINE void | IfxConvctrl_initializeModule (Ifx_CONVERTER *convctrl, IfxConvctrl_PhaseSynchronizerDivider divisionFactor)

Detailed Description

CONVCTRL basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxConvctrl.h.


iLLD_TC38A: CPU

Modules | Files
CPU
iLLD
Collaboration diagram for CPU:

Modules

Implementation
Standard Driver
Interrupt Functions
Trap Functions

Files

file | IfxCpu_cfg.h
CPU on-chip implementation data.
file | IfxCpu.h
CPU basic functionality.

Detailed Description


iLLD_TC38A: Implementation

Implementation
iLLD » CPU
Collaboration diagram for Implementation:


iLLD_TC38A: Standard Driver

Modules
Standard Driver
iLLD » CPU
Collaboration diagram for Standard Driver:

Modules

Cpu Core Functions
Interrupt Utility Functions
Cache Management Functions
Performance Counter Functions
Synchronization Functions
Cpu Utility Functions
Enumerations
Data Structures
Intrinsics

Detailed Description


iLLD_TC38A: Cpu Core Functions

Functions
Cpu Core Functions
iLLD » CPU » Standard Driver
Collaboration diagram for Cpu Core Functions:

Functions

IFX_INLINE Ifx_CPU * | IfxCpu_getAddress (IfxCpu_ResourceCpu cpu)
API to get the address for CPU HW module register memory map. More...
IFX_INLINE IfxCpu_Id | IfxCpu_getCoreId (void)
API to get core id of the CPU of the caller. Caution: Core id of the cpu's may not be continguous and shouldn't be used to index cpu. Use IfxCpu_getCoreIndex() to get cpu no. More...
IFX_INLINE IfxCpu_ResourceCpu | IfxCpu_getCoreIndex (void)
API to get cpu index of the caller CPU. Note: This api can be used whereever cpu no/index is needed. More...
IFX_INLINE void | IfxCpu_initCSA (uint32 *csaBegin, uint32 *csaEnd)
API to initialize the context save area of the CPU where this is called. More...
IFX_INLINE void | IfxCpu_setSafetyTaskIdentifier (boolean safetyId)
Set/Clear safety task identifier (PSW.S) on current CPU. More...
IFX_INLINE void | IfxCpu_triggerSwReset (void)
Triggers Software Reset. More...
IFX_EXTERN IfxCpu_CoreMode | IfxCpu_getCoreMode (Ifx_CPU *cpu)
API to get current mode of CPU. More...
IFX_EXTERN IfxCpu_ResourceCpu | IfxCpu_getIndex (Ifx_CPU *cpu)
API to get current mode of CPU. More...
IFX_EXTERN boolean | IfxCpu_setCoreMode (Ifx_CPU *cpu, IfxCpu_CoreMode mode)
API to set mode of the CPU. More...
IFX_EXTERN boolean | IfxCpu_setProgramCounter (Ifx_CPU *cpu, uint32 programCounter)
API to set the program counter for the CPU specified. More...
IFX_EXTERN boolean | IfxCpu_startCore (Ifx_CPU *cpu, uint32 programCounter)
API to set the program counter for the CPU specified and start the CPU. More...
IFX_EXTERN void | IfxCpu_triggerCpuReset (IfxCpu_ResourceCpu coreIndex)
To request reset of a particular core, given by coreId. More...
IFX_EXTERN IfxCpu_ResetStatus | IfxCpu_getCpuResetStatus (IfxCpu_ResourceCpu coreIndex)
Retrieve the cause of reset(no reset, hardware(SMU) or software) since last clear by reading KRST0.RSTSTAT and clear it. More...

Detailed Description

Function Documentation

◆ IfxCpu_getAddress()

IFX_INLINE Ifx_CPU * IfxCpu_getAddress ( IfxCpu_ResourceCpu cpu )

API to get the address for CPU HW module register memory map.

Parameters
cpu Resource index of the CPU
Returns
CPU module register address

Definition at line 834 of file IfxCpu.h.

Referenced by IfxCpu_getCpuResetStatus(), IfxCpu_setProgramCounter(), IfxCpu_triggerCpuReset(), and IfxPmsPm_setCoreMode().

◆ IfxCpu_getCoreId()

IFX_INLINE IfxCpu_Id IfxCpu_getCoreId ( void )

API to get core id of the CPU of the caller. Caution: Core id of the cpu's may not be continguous and shouldn't be used to index cpu. Use IfxCpu_getCoreIndex() to get cpu no.

Returns
Resource index of the CPU.

Definition at line 863 of file IfxCpu.h.

Referenced by IfxCpu_Trap_extractTrapInfo(), IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), and IfxQspi_SpiSlave_write().

◆ IfxCpu_getCoreIndex()

IFX_INLINE IfxCpu_ResourceCpu IfxCpu_getCoreIndex ( void )

API to get cpu index of the caller CPU. Note: This api can be used whereever cpu no/index is needed.

Returns
Resource index of the CPU.

Definition at line 871 of file IfxCpu.h.

Referenced by IfxCpu_enableSegmentSpecificDataAccessCacheability(), IfxCpu_enableSegmentSpecificInstructionAccessCacheability(), IfxCpu_getCoreMode(), IfxCpu_setDataCache(), IfxCpu_setProgramCache(), IfxCpu_setProgramCounter(), IfxCpu_triggerCpuReset(), IfxFce_Crc_calculateCrc(), IfxPmsPm_continueSleepSequenceInRAM(), IfxPmsPm_setCoreMode(), IfxPmsPm_setSleepMode(), IfxPmsPm_setStandbyMode(), IfxPmsPm_startSleepSequenceinFlash(), IfxPmsPm_startStandbySequenceInFlash(), IfxScuLbist_multiTriggersInline(), IfxScuRcu_clearColdResetStatus(), IfxScuRcu_performReset(), IfxScuWdt_changeCpuWatchdogPassword(), IfxScuWdt_changeCpuWatchdogReload(), IfxScuWdt_clearCpuEndinit(), IfxScuWdt_disableCpuWatchdog(), IfxScuWdt_enableCpuWatchdog(), IfxScuWdt_getCpuWatchdogEndInit(), IfxScuWdt_getCpuWatchdogPassword(), IfxScuWdt_getCpuWatchdogStatus(), and IfxScuWdt_setCpuEndinit().

◆ IfxCpu_getCoreMode()

IFX_EXTERN IfxCpu_CoreMode IfxCpu_getCoreMode ( Ifx_CPU * cpu )

API to get current mode of CPU.

Parameters
cpu Pointer to the CPU HW module (register memory map)
Returns
Current mode of the CPU

Definition at line 195 of file IfxCpu.c.

◆ IfxCpu_getCpuResetStatus()

IFX_EXTERN IfxCpu_ResetStatus IfxCpu_getCpuResetStatus ( IfxCpu_ResourceCpu coreIndex )

Retrieve the cause of reset(no reset, hardware(SMU) or software) since last clear by reading KRST0.RSTSTAT and clear it.

Definition at line 535 of file IfxCpu.c.

◆ IfxCpu_getIndex()

IFX_EXTERN IfxCpu_ResourceCpu IfxCpu_getIndex ( Ifx_CPU * cpu )

API to get current mode of CPU.

Parameters
cpu Pointer to the CPU HW module (register memory map)
Returns
Resource index of the CPU

Definition at line 308 of file IfxCpu.c.

Referenced by IfxCpu_getCoreMode(), and IfxCpu_setCoreMode().

◆ IfxCpu_initCSA()

IFX_INLINE void IfxCpu_initCSA | ( | uint32 * | csaBegin,
 |  | uint32 * | csaEnd
 | ) |  |

API to initialize the context save area of the CPU where this is called.

This API can initialize the CSA of the host CPU where this API is called. This API shall not be used to initialize the CSA of another CPU

Parameters
csaBegin | Pointer to start of context save area
csaEnd | Pointer to end of context save area
Returns
None

Definition at line 949 of file IfxCpu.h.

◆ IfxCpu_setCoreMode()

IFX_EXTERN boolean IfxCpu_setCoreMode | ( | Ifx_CPU * | cpu,
 |  | IfxCpu_CoreMode | mode
 | ) |  |

API to set mode of the CPU.

Parameters
cpu | Pointer to the CPU HW module (register memory map)
mode | CPU mode to be set by this API
Returns
Success status of the activity (setting the core mode).
Return values
TRUE | If the activity successfully be performed.
FALSE | If the activity can't be performed.

Definition at line 403 of file IfxCpu.c.

◆ IfxCpu_setProgramCounter()

IFX_EXTERN boolean IfxCpu_setProgramCounter | ( | Ifx_CPU * | cpu,
 |  | uint32 | programCounter
 | ) |  |

API to set the program counter for the CPU specified.

Parameters
cpu | Pointer to the CPU HW module (register memory map)
programCounter | Program counter value to be set
Returns
success status of the activity (setting program counter value).
Return values
TRUE | If the activity successfully be performed.
FALSE | If the activity can't be performed

Definition at line 411 of file IfxCpu.c.

Referenced by IfxCpu_startCore().

◆ IfxCpu_setSafetyTaskIdentifier()

IFX_INLINE void IfxCpu_setSafetyTaskIdentifier ( boolean safetyId )

Set/Clear safety task identifier (PSW.S) on current CPU.

Returns
None

Definition at line 1088 of file IfxCpu.h.

◆ IfxCpu_startCore()

IFX_EXTERN boolean IfxCpu_startCore | ( | Ifx_CPU * | cpu,
 |  | uint32 | programCounter
 | ) |  |

API to set the program counter for the CPU specified and start the CPU.

Parameters
cpu | Pointer to the CPU HW module (register memory map)
programCounter | Program counter value to start the CPU
Returns
success status of the activity (setting program counter value).
Return values
TRUE | If the activity successfully be performed.
FALSE | If the activity can't be performed

Definition at line 456 of file IfxCpu.c.

◆ IfxCpu_triggerCpuReset()

IFX_EXTERN void IfxCpu_triggerCpuReset ( IfxCpu_ResourceCpu coreIndex )

To request reset of a particular core, given by coreId.

Returns
None

Definition at line 515 of file IfxCpu.c.

◆ IfxCpu_triggerSwReset()

IFX_INLINE void IfxCpu_triggerSwReset ( void )

Triggers Software Reset.

Returns
None

Definition at line 1136 of file IfxCpu.h.


iLLD_TC38A: Interrupt Utility Functions

Macros | Functions
Interrupt Utility Functions
iLLD » CPU » Standard Driver
Collaboration diagram for Interrupt Utility Functions:

Macros

#define IFX_INTERRUPT(isr, vectabNum, prio)
Macro to define Interrupt Service Routine. This macro makes following definitions:
1) Define linker section as .intvec_tc<vector number>_<interrupt priority>.
2) define compiler specific attribute for the interrupt functions.
3) define the Interrupt service routine as Isr function.
To get details about usage of this macro, refer How to define Interrupts?. More...

Functions

IFX_INLINE boolean | IfxCpu_areInterruptsEnabled (void)
API to get the status of global interrupt enable (ICR.IE) for the CPU which calls this API This API provides the status of CPU where this API is called. More...
IFX_INLINE boolean | IfxCpu_disableInterrupts (void)
API to disable global interrupt and return the previous status. More...
IFX_INLINE void | IfxCpu_enableInterrupts (void)
API to enable global interrupt. This API simply enables the global interrupt. More...
IFX_INLINE void | IfxCpu_forceDisableInterrupts (void)
Disable the Global Interrupt. More...
IFX_INLINE void | IfxCpu_restoreInterrupts (boolean enabled)
API to restore global interrupt with that of the passed parameter. More...

Detailed Description

Macro Definition Documentation

◆ IFX_INTERRUPT

#define IFX_INTERRUPT | ( | isr,
 |  | vectabNum,
 |  | prio
 | ) |

Macro to define Interrupt Service Routine. This macro makes following definitions:
1) Define linker section as .intvec_tc<vector number>_<interrupt priority>.
2) define compiler specific attribute for the interrupt functions.
3) define the Interrupt service routine as Isr function.
To get details about usage of this macro, refer How to define Interrupts?.

Parameters
isr | Name of the Isr function.
vectabNum | Vector table number.
prio | Interrupt priority. Refer Usage of Interrupt Macro for more details.

Definition at line 108 of file Compilers.h.

Function Documentation

◆ IfxCpu_areInterruptsEnabled()

IFX_INLINE boolean IfxCpu_areInterruptsEnabled ( void )

API to get the status of global interrupt enable (ICR.IE) for the CPU which calls this API This API provides the status of CPU where this API is called.

Returns
Status of global interrupt enable bit.
Return values
TRUE | Global interrupts enabled.
FALSE | Global interrupts disabled

Definition at line 741 of file IfxCpu.h.

Referenced by areInterruptsEnabled(), IfxCpu_disableInterrupts(), and IfxQspi_SpiMaster_write().

◆ IfxCpu_disableInterrupts()

IFX_INLINE boolean IfxCpu_disableInterrupts ( void )

API to disable global interrupt and return the previous status.

This API can be used only to disable the global interrupts of caller CPU. It cannot be used for this activity towards other CPUs

Returns
Previous status of global interrupt enable bit.
Return values
TRUE | Previously, global interrupts enabled.
FALSE | Previously, global interrupts disabled

Definition at line 749 of file IfxCpu.h.

Referenced by disableInterrupts(), Ifx_Fifo_canReadCount(), Ifx_Fifo_canWriteCount(), Ifx_Fifo_clear(), IfxAsclin_Spi_write(), IfxGtm_Tim_In_getDutyPercent(), IfxI2c_I2c_read(), IfxI2c_I2c_write(), IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), IfxQspi_SpiSlave_write(), IfxStm_now(), and IfxStm_Timer_run().

◆ IfxCpu_enableInterrupts()

IFX_INLINE void IfxCpu_enableInterrupts ( void )

API to enable global interrupt. This API simply enables the global interrupt.

Returns
None

Definition at line 759 of file IfxCpu.h.

Referenced by enableInterrupts().

◆ IfxCpu_forceDisableInterrupts()

IFX_INLINE void IfxCpu_forceDisableInterrupts ( void )

Disable the Global Interrupt.

Returns
None

Definition at line 827 of file IfxCpu.h.

Referenced by forceDisableInterrupts().

◆ IfxCpu_restoreInterrupts()

IFX_INLINE void IfxCpu_restoreInterrupts ( boolean enabled )

API to restore global interrupt with that of the passed parameter.

This API can be used only to disable the global interrupts of caller CPU. It cannot be used for this activity towards other CPUs

Parameters
enabled Previous status of the global interrupt enable bit
Returns
None

Definition at line 1026 of file IfxCpu.h.

Referenced by Ifx_Fifo_canReadCount(), Ifx_Fifo_canWriteCount(), Ifx_Fifo_clear(), IfxAsclin_Spi_write(), IfxGtm_Tim_In_getDutyPercent(), IfxI2c_I2c_read(), IfxI2c_I2c_write(), IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), IfxQspi_SpiSlave_write(), IfxStm_now(), IfxStm_Timer_run(), and restoreInterrupts().


iLLD_TC38A: Cache Management Functions

Functions
Cache Management Functions
iLLD » CPU » Standard Driver
Collaboration diagram for Cache Management Functions:

Functions

IFX_INLINE void | IfxCpu_enableSegmentSpecificDataAccessCacheability (uint16 segmentNumberMask, boolean enable)
API to enable/ disable the data cacheability for selected segments With this API cacheability for one or more segment can be enabled/disabled for the CPU core where this API is called. This API is to be called only if the PCACHE or DCACHE are not enabled before. More...
IFX_INLINE void | IfxCpu_enableSegmentSpecificInstructionAccessCacheability (uint16 segmentNumberMask, boolean enable)
API to enable/ disable the instruction cacheability for selected segments With this API cacheability for one or more segment can be enabled/disabled for the CPU core where this API is called. This API is to be called only if the PCACHE or DCACHE are not enabled before. More...
IFX_INLINE void | IfxCpu_invalidateProgramCache (void)
API to invalidate the program cache. More...
IFX_INLINE boolean | IfxCpu_isAddressCachable (void *address)
API to determine if an address is in a cachable or non-cachable Flash/LMU section. More...
IFX_INLINE void | IfxCpu_setDataCache (boolean enable)
API to enable or bypass the data cache for the CPU which calls this API. More...
IFX_INLINE void | IfxCpu_setProgramCache (boolean enable)
API to enable or bypass the program cache for the CPU which calls this API. More...

Detailed Description

Function Documentation

◆ IfxCpu_enableSegmentSpecificDataAccessCacheability()

IFX_INLINE void IfxCpu_enableSegmentSpecificDataAccessCacheability | ( | uint16 | segmentNumberMask,
 |  | boolean | enable
 | ) |  |

API to enable/ disable the data cacheability for selected segments With this API cacheability for one or more segment can be enabled/disabled for the CPU core where this API is called. This API is to be called only if the PCACHE or DCACHE are not enabled before.

Parameters
segmentNumberMask | Mask where bitfield 0 represents segment 0 and bitfield 16 represent segment F.
enable | TRUE: to enable the cacheability for selected segment, FALSE: to disable.
Returns
None

Definition at line 765 of file IfxCpu.h.

◆ IfxCpu_enableSegmentSpecificInstructionAccessCacheability()

IFX_INLINE void IfxCpu_enableSegmentSpecificInstructionAccessCacheability | ( | uint16 | segmentNumberMask,
 |  | boolean | enable
 | ) |  |

API to enable/ disable the instruction cacheability for selected segments With this API cacheability for one or more segment can be enabled/disabled for the CPU core where this API is called. This API is to be called only if the PCACHE or DCACHE are not enabled before.

Parameters
segmentNumberMask | Mask where bitfield 0 represents segment 0 and bitfield 16 represent segment F.
enable | TRUE: to enable the cacheability for selected segment, FALSE: to disable.
Returns
None

Definition at line 796 of file IfxCpu.h.

◆ IfxCpu_invalidateProgramCache()

IFX_INLINE void IfxCpu_invalidateProgramCache ( void )

API to invalidate the program cache.

Returns
None

Definition at line 983 of file IfxCpu.h.

◆ IfxCpu_isAddressCachable()

IFX_INLINE boolean IfxCpu_isAddressCachable ( void * address )

API to determine if an address is in a cachable or non-cachable Flash/LMU section.

Parameters
address Address
Returns
Status TRUE/FALSE

Definition at line 997 of file IfxCpu.h.

◆ IfxCpu_setDataCache()

IFX_INLINE void IfxCpu_setDataCache ( boolean enable )

API to enable or bypass the data cache for the CPU which calls this API.

This API can be used only to enable or bypass the data cache of caller CPU. It cannot be used for this activity towards other CPUs

Parameters
enable Command to enable or bypass the data cache TRUE: Enable the data cache. FALSE: Bypass the data cache.
Returns
None

Definition at line 1035 of file IfxCpu.h.

◆ IfxCpu_setProgramCache()

IFX_INLINE void IfxCpu_setProgramCache ( boolean enable )

API to enable or bypass the program cache for the CPU which calls this API.

This API can be used only to enable or bypass the program cache of caller CPU. It cannot be used for this activity towards other CPUs

Parameters
enable Command to enable or bypass the program cache. TRUE: Enable the program cache. FALSE: Bypass the program cache
Returns
None

Definition at line 1062 of file IfxCpu.h.


iLLD_TC38A: Performance Counter Functions

Functions
Performance Counter Functions
iLLD » CPU » Standard Driver
Collaboration diagram for Performance Counter Functions:

Functions

IFX_INLINE uint32 | IfxCpu_getClockCounter (void)
API to read the clock counter for the CPU which calls this API. More...
IFX_INLINE boolean | IfxCpu_getClockCounterStickyOverflow (void)
API to get sticky overflow bit of clock counter for the CPU, which calls this API. More...
IFX_INLINE uint32 | IfxCpu_getInstructionCounter (void)
API to read the instruction counter for the CPU which calls this API. More...
IFX_INLINE boolean | IfxCpu_getInstructionCounterStickyOverflow (void)
API to get sticky overflow bit of Instruction counter for the CPU, which calls this API. More...
IFX_INLINE uint32 | IfxCpu_getPerformanceCounter (uint16 address)
API to read the performance counter for the CPU which calls this API. More...
IFX_INLINE boolean | IfxCpu_getPerformanceCounterStickyOverflow (uint16 address)
API to get sticky overflow bit of performance counter for the CPU, which calls this API. This is generic function to get sticky overflow bit of any performance counters. More...
IFX_INLINE void | IfxCpu_resetAndStartCounters (IfxCpu_CounterMode mode)
Reset and start instruction, clock and multi counters. More...
IFX_INLINE void | IfxCpu_setPerformanceCountersEnableBit (uint32 enable)
API to enable or disable performance counter for the CPU which calls this API. More...
IFX_INLINE IfxCpu_Perf | IfxCpu_stopCounters (void)
Stop instruction and clock counters, return their values. More...
IFX_INLINE void | IfxCpu_updateClockCounter (uint32 count)
API to update clock counter for the CPU which calls this API. More...
IFX_INLINE void | IfxCpu_updateInstructionCounter (uint32 count)
API to update Instruction counter for the CPU which calls this API. More...
IFX_INLINE void | IfxCpu_updatePerformanceCounter (uint32 address, uint32 count)
API to update performance counter for the CPU which calls this API. This is generic function to update any of the performance counters. More...

Detailed Description

Function Documentation

◆ IfxCpu_getClockCounter()

IFX_INLINE uint32 IfxCpu_getClockCounter ( void )

API to read the clock counter for the CPU which calls this API.

This API can be used to read clock counter of only the caller CPU. It cannot be used for this activity towards other CPUs.

Returns
Counter value. 0 to 0x7FFFFFFF.

Definition at line 851 of file IfxCpu.h.

◆ IfxCpu_getClockCounterStickyOverflow()

IFX_INLINE boolean IfxCpu_getClockCounterStickyOverflow ( void )

API to get sticky overflow bit of clock counter for the CPU, which calls this API.

This API can be used to get sticky overflow bit of clock counter of only the caller CPU. It cannot be used for this activity towards other CPUs. This API also clears the sticky overflow after the read. While reading the sticky bit this API disables the counter for short time. (otherwise sticky bit cannot be cleared). This API shall be used after reading the counter

Returns
Status of sticky overflow bit.
Return values
TRUE | Sticky overflow bit is set.
FALSE | Sticky overflow bit is reset

Definition at line 857 of file IfxCpu.h.

◆ IfxCpu_getInstructionCounter()

IFX_INLINE uint32 IfxCpu_getInstructionCounter ( void )

API to read the instruction counter for the CPU which calls this API.

This API can be used to read instruction counter of only the caller CPU. It cannot be used for this activity towards other CPUs

Returns
Counter value. 0 to 0x7FFFFFFF.

Definition at line 879 of file IfxCpu.h.

◆ IfxCpu_getInstructionCounterStickyOverflow()

IFX_INLINE boolean IfxCpu_getInstructionCounterStickyOverflow ( void )

API to get sticky overflow bit of Instruction counter for the CPU, which calls this API.

This API can be used to get sticky overflow bit of Instruction counter of only the caller CPU. It cannot be used for this activity towards other CPUs. This API also clears the sticky overflow after the read. While reading the sticky bit this API disables the counter for short time. (otherwise sticky bit cannot be cleared). This API shall be used after reading the counter

Returns
Status of sticky overflow bit.
Return values
TRUE | Sticky overflow bit is set.
FALSE | Sticky overflow bit is reset

Definition at line 885 of file IfxCpu.h.

◆ IfxCpu_getPerformanceCounter()

IFX_INLINE uint32 IfxCpu_getPerformanceCounter ( uint16 address )

API to read the performance counter for the CPU which calls this API.

Parameters
address Address
Returns
counter value

Definition at line 891 of file IfxCpu.h.

Referenced by IfxCpu_getClockCounter(), and IfxCpu_getInstructionCounter().

◆ IfxCpu_getPerformanceCounterStickyOverflow()

IFX_INLINE boolean IfxCpu_getPerformanceCounterStickyOverflow ( uint16 address )

API to get sticky overflow bit of performance counter for the CPU, which calls this API. This is generic function to get sticky overflow bit of any performance counters.

Parameters
address Address
Returns
Status

Definition at line 920 of file IfxCpu.h.

Referenced by IfxCpu_getClockCounterStickyOverflow(), and IfxCpu_getInstructionCounterStickyOverflow().

◆ IfxCpu_resetAndStartCounters()

IFX_INLINE void IfxCpu_resetAndStartCounters ( IfxCpu_CounterMode mode )

Reset and start instruction, clock and multi counters.

Reset and start CCNT, ICNT, M1CNT, M2CNT, M3CNT. the overflow bits are cleared.

Parameters
mode Counter mode
Returns
None

Definition at line 1004 of file IfxCpu.h.

◆ IfxCpu_setPerformanceCountersEnableBit()

IFX_INLINE void IfxCpu_setPerformanceCountersEnableBit ( uint32 enable )

API to enable or disable performance counter for the CPU which calls this API.

This API can be used to enable or disable performance counter of only the caller CPU. It cannot be used for this activity towards other CPUs.

Parameters
enable enable Command to enable or disable the performance counter. TRUE: Enable the performance counter. FALSE: Disable the performance counter
Returns
None

Definition at line 1053 of file IfxCpu.h.

◆ IfxCpu_stopCounters()

IFX_INLINE IfxCpu_Perf IfxCpu_stopCounters ( void )

Stop instruction and clock counters, return their values.

Stop CCNT, ICNT, M1CNT, M2CNT, M3CNT and return their values; The CCTRL is reset to 0, for more accurate measurements and has to be initialized again before strating the next performance measurement.

Returns
Performance counter result

Definition at line 1099 of file IfxCpu.h.

◆ IfxCpu_updateClockCounter()

IFX_INLINE void IfxCpu_updateClockCounter ( uint32 count )

API to update clock counter for the CPU which calls this API.

This API can be used to update clock counter of only the caller CPU. It cannot be used for this activity towards other CPUs.

Parameters
count Counter value to be updated. 0 to 0x7FFFFFFF
Returns
None

Definition at line 1146 of file IfxCpu.h.

◆ IfxCpu_updateInstructionCounter()

IFX_INLINE void IfxCpu_updateInstructionCounter ( uint32 count )

API to update Instruction counter for the CPU which calls this API.

This API can be used to update Instruction counter of only the caller CPU. It cannot be used for this activity towards other CPUs.

Parameters
count Counter value to be updated. 0 to 0x7FFFFFFF
Returns
None

Definition at line 1152 of file IfxCpu.h.

◆ IfxCpu_updatePerformanceCounter()

IFX_INLINE void IfxCpu_updatePerformanceCounter | ( | uint32 | address,
 |  | uint32 | count
 | ) |  |

API to update performance counter for the CPU which calls this API. This is generic function to update any of the performance counters.

Parameters
address | Address
count | Count
Returns
None

Definition at line 1158 of file IfxCpu.h.

Referenced by IfxCpu_updateClockCounter(), and IfxCpu_updateInstructionCounter().


iLLD_TC38A: Synchronization Functions

Functions
Synchronization Functions
iLLD » CPU » Standard Driver
Collaboration diagram for Synchronization Functions:

Functions

IFX_EXTERN boolean | IfxCpu_acquireMutex (IfxCpu_mutexLock *lock)
API to acquire the mutex (binary semaphore). More...
IFX_EXTERN void | IfxCpu_releaseMutex (IfxCpu_mutexLock *lock)
API to unlock the mutex . More...
IFX_EXTERN void | IfxCpu_resetSpinLock (IfxCpu_spinLock *lock)
API to unlock the resource . More...
IFX_EXTERN boolean | IfxCpu_setSpinLock (IfxCpu_spinLock *lock, uint32 timeoutCount)
API to lock the resource in spin mode with the given timeout. More...

Detailed Description

Function Documentation

◆ IfxCpu_acquireMutex()

IFX_EXTERN boolean IfxCpu_acquireMutex ( IfxCpu_mutexLock * lock )

API to acquire the mutex (binary semaphore).

This API can be used to acquire/get the mutex.

Parameters
lock lock pointer
Returns
TRUE : lock acquired successfully. FALSE: Failed to acquire the lock
IfxCpu_mutexLock resourceLock;
boolean flag = IfxCpu_acquireMutex(&resourceLock);
if (flag){
// critical section
IfxCpu_releaseMutex(&resourceLock);
}

Definition at line 54 of file IfxCpu.c.

◆ IfxCpu_releaseMutex()

IFX_EXTERN void IfxCpu_releaseMutex ( IfxCpu_mutexLock * lock )

API to unlock the mutex .

This API can be used to unlock the previously acquired mutex

Parameters
lock lock pointer
Returns
None
IfxCpu_mutexLock resourceLock;
boolean flag = IfxCpu_acquireMutex(&resourceLock);
if (flag){
// critical section
IfxCpu_releaseMutex(&resourceLock);
}

Definition at line 389 of file IfxCpu.c.

◆ IfxCpu_resetSpinLock()

IFX_EXTERN void IfxCpu_resetSpinLock ( IfxCpu_spinLock * lock )

API to unlock the resource .

This API can be used to unlock the previously acquired lock

Parameters
lock lock pointer
Returns
None

Definition at line 396 of file IfxCpu.c.

◆ IfxCpu_setSpinLock()

IFX_EXTERN boolean IfxCpu_setSpinLock | ( | IfxCpu_spinLock * | lock,
 |  | uint32 | timeoutCount
 | ) |  |

API to lock the resource in spin mode with the given timeout.

This API can be used to spin lock for the lock for the given timeout period.

Parameters
lock | lock pointer
timeoutCount | loop counter value used for timeout to acquire lock
Returns
TRUE : lock acquired successfully. FALSE: Failed to acquire the lock
IfxCpu_spinLock resourceLock;
boolean flag = IfxCpu_setSpinLock(&resourceLock, 0xFFFF);
if (flag){
// critical section
IfxCpu_resetSpinLock(&resourceLock);
}

Definition at line 428 of file IfxCpu.c.


iLLD_TC38A: Cpu Utility Functions

Functions
Cpu Utility Functions
iLLD » CPU » Standard Driver
Collaboration diagram for Cpu Utility Functions:

Functions

IFX_EXTERN void | IfxCpu_disableOverlayBlock (IfxCpu_ResourceCpu cpu, uint16 overlayBlock)
This function disables the overlay memory. More...
IFX_EXTERN void | IfxCpu_enableOverlayBlock (IfxCpu_ResourceCpu cpu, uint16 overlayBlock, IfxCpu_OverlayMemorySelect overlayMemorySelect, IfxCpu_OverlayAddressMask overlayAddressMask, uint32 targetBaseAddress, uint32 overlayBaseAddress)
This function configures and enables the overlay memory. Note: The data overlay provides the capability to redirect selected data accesses to the Overlay memory. Data accesses made by the TriCore to Program Flash, Online Data Acquisition space, or EBU space can be redirected. Overlay memory may be located in the Local Memory (if present), in the Emulation Memory (Emulation Device only), or in the EBU space,or in the DPSR/PSPR memory. More...
IFX_EXTERN uint32 | IfxCpu_getRandomValue (uint32 *seed)
API to get random value. More...
IFX_EXTERN uint32 | IfxCpu_getRandomValueWithinRange (uint32 *seed, uint32 min, uint32 max)
API to get random value with in the range. More...
IFX_EXTERN boolean | IfxCpu_waitEvent (IfxCpu_syncEvent *event, uint32 timeoutMilliSec)
This function waits till all the cores have set their corresponding bits in the event. This function along with IfxCpu_emitEvent() are used to achieve the synchronisation between the configured cores. By default "IFXCPU_CFG_ALLCORE_DONE" macro defined for all the cores. In case the user wants to check for synchronisation among the required cores, the macro can be redefined with the value accroing to the CORE_ID register. The IfxCpu_emitEvent() is to be used in the Main functions of the Cores where the user wants to check for synchronisation. More...
IFX_EXTERN void | IfxCpu_emitEvent (IfxCpu_syncEvent *event)
This function sets a bit corresponding to the core in the event. More...

Detailed Description

Function Documentation

◆ IfxCpu_disableOverlayBlock()

IFX_EXTERN void IfxCpu_disableOverlayBlock | ( | IfxCpu_ResourceCpu | cpu,
 |  | uint16 | overlayBlock
 | ) |  |

This function disables the overlay memory.

Parameters
cpu | Core no
overlayBlock | Overlay Block
Returns
None

Definition at line 75 of file IfxCpu.c.

◆ IfxCpu_emitEvent()

IFX_EXTERN void IfxCpu_emitEvent ( IfxCpu_syncEvent * event )

This function sets a bit corresponding to the core in the event.

Parameters
event Synchronous Event
Returns
None

A coding example can be found in IfxCpu_waitEvent

Definition at line 509 of file IfxCpu.c.

◆ IfxCpu_enableOverlayBlock()

IFX_EXTERN void IfxCpu_enableOverlayBlock | ( | IfxCpu_ResourceCpu | cpu,
 |  | uint16 | overlayBlock,
 |  | IfxCpu_OverlayMemorySelect | overlayMemorySelect,
 |  | IfxCpu_OverlayAddressMask | overlayAddressMask,
 |  | uint32 | targetBaseAddress,
 |  | uint32 | overlayBaseAddress
 | ) |  |

This function configures and enables the overlay memory. Note: The data overlay provides the capability to redirect selected data accesses to the Overlay memory. Data accesses made by the TriCore to Program Flash, Online Data Acquisition space, or EBU space can be redirected. Overlay memory may be located in the Local Memory (if present), in the Emulation Memory (Emulation Device only), or in the EBU space,or in the DPSR/PSPR memory.

How the overlay Memory works? Any data access to segment 8 or segment A is checked against all the activated overlay blocks. For each activated overlay block, address bits 27..5 are compared with the target base address , and this bit-wise comparison is qualified by the content of address mask. Address bits participate in the comparison if the corresponding mask bits are set to one. The access is redirected, if all the address bits selected by mask equal to the corresponding bits in target address. The address for redirection is constructed as follows:

  1. Address bits 31..22 are set according to the overlay memory selection and the cache-ability of the original address.
  2. For address bits 21..5:
  • If the corresponding address mask bit is set, the address bit value is taken from overlay base address .
  • If the corresponding address mask bit is cleared, the address bit value is taken from the original address.
  1. Address bits 4..0 are always taken directly from the original address. If there is no redirection, the original address is used to perform the access. Target address ranges for activated overlay blocks should not overlap or an exception may occur.
    Parameters
    cpu | Core no
    overlayBlock | Overlay Block
    overlayMemorySelect | Overlay Memory Select
    overlayAddressMask | overlay Address Mask
    targetBaseAddress | Target Base address (i.e Source address to be re-directed)
    overlayBaseAddress | Overlay or Re-directed Base address (Bits 21..5 of the base address the overlay memory block in the overlay memory)
    Returns
    None

Definition at line 124 of file IfxCpu.c.

◆ IfxCpu_getRandomValue()

IFX_EXTERN uint32 IfxCpu_getRandomValue ( uint32 * seed )

API to get random value.

Parameters
seed Pointer to seed value
Returns
random value

Definition at line 327 of file IfxCpu.c.

Referenced by IfxCpu_getRandomValueWithinRange().

◆ IfxCpu_getRandomValueWithinRange()

IFX_EXTERN uint32 IfxCpu_getRandomValueWithinRange | ( | uint32 * | seed,
 |  | uint32 | min,
 |  | uint32 | max
 | ) |  |

API to get random value with in the range.

Parameters
seed | Pointer to seed value
min | minimum range value
max | maximum range value
Returns
random value

Definition at line 366 of file IfxCpu.c.

◆ IfxCpu_waitEvent()

IFX_EXTERN boolean IfxCpu_waitEvent | ( | IfxCpu_syncEvent * | event,
 |  | uint32 | timeoutMilliSec
 | ) |  |

This function waits till all the cores have set their corresponding bits in the event. This function along with IfxCpu_emitEvent() are used to achieve the synchronisation between the configured cores. By default "IFXCPU_CFG_ALLCORE_DONE" macro defined for all the cores. In case the user wants to check for synchronisation among the required cores, the macro can be redefined with the value accroing to the CORE_ID register. The IfxCpu_emitEvent() is to be used in the Main functions of the Cores where the user wants to check for synchronisation.

e.g:

  1. Check for synchronisation between core 0 and core 5

    define 0x41U

  1. Check for synchronisation between core 0 to core 5

    define 0x5FU

Note: Core id values read from CORE_ID register will be as shown below. The value indicates the position of the bit needs to be set while building the macro. Core 0: 0 Core 1: 1 Core 2: 2 Core 3: 3 Core 4: 4 Core 5: 6

Parameters
event | Synchronous Event
timeoutMilliSec | timeout in millisec
Returns
Error condition

The functions IfxCpu_waitEvent and IfxCpu_emitEvent are used to achieve synchronisation between all cores (i.e individual cores wait till all cores have reached the synchronisation point). The IfxCpu_waitEvent returns 1 incase a timeout occurs.

// Global variable. preferably located in shared memory.
IfxCpu_syncEvent event;
boolean errorVal;
// Below code should be repeated in Each core
// Upon reaching Synchonisation point
IfxCpu_emitEvent(&event);
errorVal = IfxCpu_waitEvent(&event, timeoutMilliSec); // timeoutMilliSec is timeout value to wait

Definition at line 478 of file IfxCpu.c.


iLLD_TC38A: Enumerations

Enumerations
Enumerations
iLLD » CPU » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxCpu_CoreMode {
IfxCpu_CoreMode_halt,
IfxCpu_CoreMode_run,
IfxCpu_CoreMode_idle,
IfxCpu_CoreMode_sleep,
IfxCpu_CoreMode_stby,
IfxCpu_CoreMode_unknown
}
Enumeration for the Cpu mode. More...
enum IfxCpu_CounterMode {
IfxCpu_CounterMode_normal = 0,
IfxCpu_CounterMode_task = 1
}
Performance conunter modes. More...
enum IfxCpu_OverlayAddressMask {
IfxCpu_OverlayAddressMask_32byte = 0xFFF,
IfxCpu_OverlayAddressMask_64byte = 0xFFE,
IfxCpu_OverlayAddressMask_128byte = 0xFFC,
IfxCpu_OverlayAddressMask_256byte = 0xFF8,
IfxCpu_OverlayAddressMask_512byte = 0xFF0,
IfxCpu_OverlayAddressMask_1KB = 0xFE0,
IfxCpu_OverlayAddressMask_2KB = 0xFC0,
IfxCpu_OverlayAddressMask_4KB = 0xF80,
IfxCpu_OverlayAddressMask_8KB = 0xF00,
IfxCpu_OverlayAddressMask_16KB = 0xE00,
IfxCpu_OverlayAddressMask_32KB = 0xC00,
IfxCpu_OverlayAddressMask_64KB = 0x800,
IfxCpu_OverlayAddressMask_128KB = 0x0
}
Overlay Address Mask: determines the overlay block size and the bits used for address comparison and translation. More...
enum IfxCpu_OverlayMemorySelect {
IfxCpu_OverlayMemorySelect_core0DsprPspr = 0,
IfxCpu_OverlayMemorySelect_core1DsprPspr = 1,
IfxCpu_OverlayMemorySelect_core2DsprPspr = 2,
IfxCpu_OverlayMemorySelect_core3DsprPspr = 3,
IfxCpu_OverlayMemorySelect_lmu = 8
}
Selects overlay memory used for redirection. More...
enum IfxCpu_ResetStatus {
IfxCpu_ResetStatus_notCpuReset = 0,
IfxCpu_ResetStatus_cpuResetBySmu = 1,
IfxCpu_ResetStatus_cpuResetBySw = 2
}

Detailed Description

Enumeration Type Documentation

◆ IfxCpu_CoreMode

enum IfxCpu_CoreMode

Enumeration for the Cpu mode.

Enumerator
IfxCpu_CoreMode_halt
IfxCpu_CoreMode_run
IfxCpu_CoreMode_idle
IfxCpu_CoreMode_sleep
IfxCpu_CoreMode_stby
IfxCpu_CoreMode_unknown

Definition at line 129 of file IfxCpu.h.

◆ IfxCpu_CounterMode

enum IfxCpu_CounterMode

Performance conunter modes.

Enumerator
IfxCpu_CounterMode_normal | Normal counter mode:the counter increments on their respective triggers.
IfxCpu_CounterMode_task | Normal counter mode:additional gating control from the debug unit which allows the data gathered in the performance counters to be filtered by some specific criteria.

Definition at line 141 of file IfxCpu.h.

◆ IfxCpu_OverlayAddressMask

enum IfxCpu_OverlayAddressMask

Overlay Address Mask: determines the overlay block size and the bits used for address comparison and translation.

Enumerator
IfxCpu_OverlayAddressMask_32byte | 32 byte block size Mask
IfxCpu_OverlayAddressMask_64byte | 64 byte block size Mask
IfxCpu_OverlayAddressMask_128byte | 128 byte block size Mask
IfxCpu_OverlayAddressMask_256byte | 256 byte block size Mask
IfxCpu_OverlayAddressMask_512byte | 512 byte block size Mask
IfxCpu_OverlayAddressMask_1KB | 1K byte block size Mask
IfxCpu_OverlayAddressMask_2KB | 2K byte block size Mask
IfxCpu_OverlayAddressMask_4KB | 4K byte block size Mask
IfxCpu_OverlayAddressMask_8KB | 8K byte block size Mask
IfxCpu_OverlayAddressMask_16KB | 16K byte block size Mask
IfxCpu_OverlayAddressMask_32KB | 32K byte block size Mask
IfxCpu_OverlayAddressMask_64KB | 64K byte block size Mask
IfxCpu_OverlayAddressMask_128KB | 128K byte block size Mask

Definition at line 149 of file IfxCpu.h.

◆ IfxCpu_OverlayMemorySelect

enum IfxCpu_OverlayMemorySelect

Selects overlay memory used for redirection.

Enumerator
IfxCpu_OverlayMemorySelect_core0DsprPspr | Redirection to Core 0 DSPR/PSPR memory.
IfxCpu_OverlayMemorySelect_core1DsprPspr | Redirection to Core 1 DSPR/PSPR memory.
IfxCpu_OverlayMemorySelect_core2DsprPspr | Redirection to Core 2 DSPR/PSPR memory.
IfxCpu_OverlayMemorySelect_core3DsprPspr | Redirection to Core 3 DSPR/PSPR memory.
IfxCpu_OverlayMemorySelect_lmu | Redirection to LMU memory.

Definition at line 168 of file IfxCpu.h.

◆ IfxCpu_ResetStatus

enum IfxCpu_ResetStatus
Enumerator
IfxCpu_ResetStatus_notCpuReset | No Kernel Reset was executed.
IfxCpu_ResetStatus_cpuResetBySmu | Kernel reset was requested by hardware since last clear (SMU)
IfxCpu_ResetStatus_cpuResetBySw | Kernel reset was requested by software since last clear (by writing KRST0.RST=1 and KRST1.RST=1)

Definition at line 177 of file IfxCpu.h.


iLLD_TC38A: Data Structures

Data Structures
Data Structures
iLLD » CPU » Standard Driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxCpu_Counter
counter More...
struct | IfxCpu_Perf
Performance counter result. More...

Detailed Description

Data Structure Documentation

◆ IfxCpu_Counter

struct IfxCpu_Counter

counter

Definition at line 194 of file IfxCpu.h.

Data Fields
uint32 | counter | Counter value.
boolean | overlfow | sticky overlfow

◆ IfxCpu_Perf

struct IfxCpu_Perf

Performance counter result.

Definition at line 206 of file IfxCpu.h.

Collaboration diagram for IfxCpu_Perf:
[legend]
Data Fields
IfxCpu_Counter | clock | CPU clock counter.
IfxCpu_Counter | counter1 | Multi counter 1.
IfxCpu_Counter | counter2 | Multi counter 2.
IfxCpu_Counter | counter3 | Multi counter 3.
IfxCpu_Counter | instruction | Instruction counter.


iLLD_TC38A: Intrinsics

Modules | Files
Intrinsics
iLLD » CPU » Standard Driver
Collaboration diagram for Intrinsics:

Modules

intrinsics for DCC compiler
Intrinsics for GNU compiler
Intrinsics for GNU compiler
Intrinsics for TASKING compiler

Files

file IfxCpu_Intrinsics.h

Detailed Description


iLLD_TC38A: intrinsics for DCC compiler

Modules
intrinsics for DCC compiler
iLLD » CPU » Standard Driver » Intrinsics
Collaboration diagram for intrinsics for DCC compiler:

Modules

Minimum and Maximum of (Short) Integers
Cross type arithmetic operation
Floating point operation
Fractional Arithmetic Support
Insert / Extract Bit-fields and Bits
Interrupt Handling
Miscellaneous Intrinsic Functions
Packed Data Type Support
Register Handling
Saturation Arithmetic Support
Insert Single Assembly Instruction

Detailed Description


iLLD_TC38A: Minimum and Maximum of (Short) Integers

Functions
Minimum and Maximum of (Short) Integers
iLLD » CPU » Standard Driver » Intrinsics » intrinsics for DCC compiler
Collaboration diagram for Minimum and Maximum of (Short) Integers:

Functions

asm volatile void | Ifx__non_return_call (void(*fun)(void))
asm volatile void | Ifx__jump_and_link (void(*fun)(void))

Detailed Description

These intrinsic functions return the minimum or maximum of a signed integer, unsigned integer or short integer.

Function Documentation

◆ Ifx__jump_and_link()

asm volatile void Ifx__jump_and_link ( void(*)(void) fun )

Jump and link

Definition at line 66 of file IfxCpu_IntrinsicsDcc.h.

Referenced by Ifx__jumpToFunctionWithLink().

◆ Ifx__non_return_call()

asm volatile void Ifx__non_return_call ( void(*)(void) fun )

Function call without return

Definition at line 58 of file IfxCpu_IntrinsicsDcc.h.

Referenced by Ifx__jumpToFunction().


iLLD_TC38A: Cross type arithmetic operation

Macros | Functions | Variables
Cross type arithmetic operation
iLLD » CPU » Standard Driver » Intrinsics » intrinsics for DCC compiler
Collaboration diagram for Cross type arithmetic operation:

Macros

#define | Ifx__minX(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxX(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturateX(X, Min, Max) ( Ifx__minX(Ifx__maxX(X, Min), Max) )
#define | Ifx__checkrangeX(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__min __min
#define | Ifx__mins __mins
#define | Ifx__minu __minu
#define | Ifx__max __max
#define | Ifx__maxs __maxs
#define | Ifx__maxu __maxu

Functions

sint32 | __min (sint32, sint32) __attribute__((intrinsic_pseudo(3
sint32 | __mins (sint32, sint32) __attribute__((intrinsic_function(0x10b
uint32 | __minu (uint32, uint32) __attribute__((intrinsic_pseudo(3
sint32 | __max (sint32, sint32) __attribute__((intrinsic_pseudo(3
uint32 | __maxs (uint32, uint32) __attribute__((intrinsic_function(0x10b
uint32 | __maxu (uint32, uint32) __attribute__((intrinsic_pseudo(3

Variables

sint32 min
sint32 min h
uint32 min u
sint32 max

Detailed Description

Macro compatible with float, fix point, signed integer and unsigned integer

Macro Definition Documentation

◆ Ifx__checkrangeX

#define Ifx__checkrangeX | ( | X,
 |  | Min,
 |  | Max
 | ) | (((X) >= (Min)) && ((X) <= (Max)))

Definition at line 127 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__max

#define Ifx__max __max

Definition at line 151 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__maxs

#define Ifx__maxs __maxs

Definition at line 157 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__maxu

#define Ifx__maxu __maxu

Definition at line 163 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__maxX

#define Ifx__maxX | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) ? (X) : (Y) )

Definition at line 125 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__min

#define Ifx__min __min

Definition at line 133 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__mins

#define Ifx__mins __mins

Definition at line 139 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__minu

#define Ifx__minu __minu

Definition at line 145 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__minX

#define Ifx__minX | ( | X,
 |  | Y
 | ) | ( ((X) < (Y)) ? (X) : (Y) )

Definition at line 124 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__saturateX

#define Ifx__saturateX | ( | X,
 |  | Min,
 |  | Max
 | ) | ( Ifx__minX(Ifx__maxX(X, Min), Max) )

Definition at line 126 of file IfxCpu_IntrinsicsDcc.h.

Function Documentation

◆ __max()

sint32 __max | ( | sint32 | ,
 |  | sint32 |
 | ) |  |

Return maximum of two integers

Referenced by Ifx_Fifo_canWriteCount(), Ifx_Shell_process(), IfxQspi_calculateDelayConstants(), and IfxQspi_calculateTimeQuantumLength().

◆ __maxs()

uint32 __maxs | ( | uint32 | ,
 |  | uint32 |
 | ) |  |

Return maximum of two short integers

◆ __maxu()

uint32 __maxu | ( | uint32 | ,
 |  | uint32 |
 | ) |  |

Return maximum of two unsigned integers

Referenced by IfxAsclin_setBitTiming(), IfxScuCcu_setAsclinFFrequency(), IfxScuCcu_setAsclinSFrequency(), IfxScuCcu_setBbbFrequency(), IfxScuCcu_setGethFrequency(), IfxScuCcu_setGtmFrequency(), IfxScuCcu_setI2cFrequency(), IfxScuCcu_setMcanFrequency(), IfxScuCcu_setMcanhFrequency(), IfxScuCcu_setMscFrequency(), IfxScuCcu_setQspiFrequency(), IfxScuCcu_setSpbFrequency(), IfxScuCcu_setSriFrequency(), and IfxScuCcu_setStmFrequency().

◆ __min()

sint32 __min | ( | sint32 | ,
 |  | sint32 |
 | ) |  |

Return minimum of two integers

Referenced by Ifx_Console_printAlign(), Ifx_Shell_parseToken(), IfxAsclin_Spi_read(), IfxAsclin_Spi_write(), IfxQspi_SpiMaster_read(), IfxQspi_SpiMaster_write(), IfxQspi_SpiSlave_read(), and IfxQspi_SpiSlave_write().

◆ __mins()

sint32 __mins | ( | sint32 | ,
 |  | sint32 |
 | ) |  |

Return minimum of two short integers

◆ __minu()

uint32 __minu | ( | uint32 | ,
 |  | uint32 |
 | ) |  |

Return minimum of two unsigned integers

Referenced by Ifx_Ssw_DSYNC(), IfxAsclin_setFilterDepth(), IfxAsclin_setLinResponseTimeoutThreshold(), IfxAsclin_setRxFifoInterruptLevel(), IfxAsclin_setSamplePointPosition(), IfxAsclin_setTxFifoInterruptLevel(), IfxCcu6_PwmHl_init(), IfxCcu6_PwmHl_setDeadtime(), IfxEvadc_calculateSampleTime(), and IfxEvadc_initializeFAdcI().

Variable Documentation

◆ h

uint32 max h

Definition at line 137 of file IfxCpu_IntrinsicsDcc.h.

◆ max

sint32 max

Definition at line 149 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxCpu_getRandomValueWithinRange().

◆ min

sint32 min

Definition at line 131 of file IfxCpu_IntrinsicsDcc.h.

Referenced by Ifx__minb(), Ifx__minbu(), Ifx__minh(), Ifx__minhu(), and IfxCpu_getRandomValueWithinRange().

◆ u

uint32 extr u

Definition at line 143 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxCcu6_setT12Frequency(), IfxCcu6_setT13Frequency(), IfxEvadc_clearAllResultRequests(), IfxEvadc_setArbiterPriority(), and IfxScuCcu_getGtmFrequency().


iLLD_TC38A: Floating point operation

Macros
Floating point operation
iLLD » CPU » Standard Driver » Intrinsics » intrinsics for DCC compiler
Collaboration diagram for Floating point operation:

Macros

#define | Ifx__saturate(X, Min, Max) ( __minf(__maxf(X, Min), Max) )
#define | Ifx__sqrf(X) ((X) * (X))
#define | Ifx__sqrtf(X) sqrtf(X)
#define | Ifx__checkrange(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__roundf(X) ((((X) - (sint32)(X)) > 0.5) ? (1 + (sint32)(X)) : ((sint32)(X)))
#define | Ifx__absf(X) ( ((X) < 0.0) ? -(X) : (X) )
#define | Ifx__minf(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxf(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturatef(X, Min, Max) ( __minf(__maxf(X, Min), Max) )
#define | Ifx__checkrangef(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__abs_stdreal(X) ( ((X) > 0.0) ? (X) : -(X) )
#define | Ifx__min_stdreal(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__max_stdreal(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturate_stdreal(X, Min, Max) ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )
#define | Ifx__neqf(X, Y) ( ((X) > (Y)) || ((X) < (Y)) )
#define | Ifx__leqf(X, Y) ( !((X) > (Y)) )
#define | Ifx__geqf(X, Y) ( !((X) < (Y)) )

Detailed Description

Macro Definition Documentation

◆ Ifx__abs_stdreal

#define Ifx__abs_stdreal ( X ) ( ((X) > 0.0) ? (X) : -(X) )

Definition at line 184 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__absf

#define Ifx__absf ( X ) ( ((X) < 0.0) ? -(X) : (X) )

Definition at line 178 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__checkrange

#define Ifx__checkrange | ( | X,
 |  | Min,
 |  | Max
 | ) | (((X) >= (Min)) && ((X) <= (Max)))

Definition at line 175 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__checkrangef

#define Ifx__checkrangef | ( | X,
 |  | Min,
 |  | Max
 | ) | (((X) >= (Min)) && ((X) <= (Max)))

Definition at line 182 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__geqf

#define Ifx__geqf | ( | X,
 |  | Y
 | ) | ( !((X) < (Y)) )

X >= Y

Definition at line 191 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__leqf

#define Ifx__leqf | ( | X,
 |  | Y
 | ) | ( !((X) > (Y)) )

X <= Y

Definition at line 190 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__max_stdreal

#define Ifx__max_stdreal | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) ? (X) : (Y) )

Definition at line 186 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__maxf

#define Ifx__maxf | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) ? (X) : (Y) )

Definition at line 180 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__min_stdreal

#define Ifx__min_stdreal | ( | X,
 |  | Y
 | ) | ( ((X) < (Y)) ? (X) : (Y) )

Definition at line 185 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__minf

#define Ifx__minf | ( | X,
 |  | Y
 | ) | ( ((X) < (Y)) ? (X) : (Y) )

Definition at line 179 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__neqf

#define Ifx__neqf | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) || ((X) < (Y)) )

X != Y

Definition at line 189 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__roundf

#define Ifx__roundf ( X ) ((((X) - (sint32)(X)) > 0.5) ? (1 + (sint32)(X)) : ((sint32)(X)))

Definition at line 177 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__saturate

#define Ifx__saturate | ( | X,
 |  | Min,
 |  | Max
 | ) | ( __minf(__maxf(X, Min), Max) )

Definition at line 171 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__saturate_stdreal

#define Ifx__saturate_stdreal | ( | X,
 |  | Min,
 |  | Max
 | ) | ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )

Definition at line 187 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__saturatef

#define Ifx__saturatef | ( | X,
 |  | Min,
 |  | Max
 | ) | ( __minf(__maxf(X, Min), Max) )

Definition at line 181 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__sqrf

#define Ifx__sqrf ( X ) ((X) * (X))

Definition at line 173 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__sqrtf

#define Ifx__sqrtf ( X ) sqrtf(X)

Definition at line 174 of file IfxCpu_IntrinsicsDcc.h.


iLLD_TC38A: Fractional Arithmetic Support

Macros | Functions
Fractional Arithmetic Support
iLLD » CPU » Standard Driver » Intrinsics » intrinsics for DCC compiler
Collaboration diagram for Fractional Arithmetic Support:

Macros

#define Ifx__fract_to_sfract Ifx__round16

Functions

asm short | Ifx__clssf (sfract a)
asm fract | Ifx__float_to_fract (float a)
asm float | Ifx__fract_to_float (fract a)
Convert fract to float. More...
asm fract | Ifx__getfract (laccum a)
asm sfract | Ifx__mac_r_sf (sfract a, sfract b, sfract c)
asm sfract | Ifx__mac_sf (sfract a, sfract b, sfract c)
asm long | Ifx__mulfractfract (fract a, fract b)
asm long | Ifx__mulfractlong (fract a, long b)
asm sfract | Ifx__round16 (fract a)
IFX_INLINE sfract | __float_to_sfract (float a)
asm sfract | Ifx__s16_to_sfract (short a)
asm short | Ifx__sfract_to_s16 (sfract a)
asm volatile uint16 | Ifx__sfract_to_u16 (sfract a)
asm laccum | Ifx__shaaccum (laccum a, sint32 b)
asm fract | Ifx__shafracts (fract a, sint32 b)
asm sfract | Ifx__shasfracts (sfract a, sint32 b)
asm sfract | Ifx__u16_to_sfract (uint16 a)

Detailed Description

The next table provides an overview of intrinsic functions to convert fractional values. Note that the TASKING VX-toolset C compiler for TriCore fully supports the fractional type so normally you should not need these intrinsic functions (except for __mulfractlong). For compatibility reasons the TASKING C compiler does support these functions.

Macro Definition Documentation

◆ Ifx__fract_to_sfract

#define Ifx__fract_to_sfract Ifx__round16

Definition at line 297 of file IfxCpu_IntrinsicsDcc.h.

Referenced by __float_to_sfract().

Function Documentation

◆ __float_to_sfract()

IFX_INLINE sfract __float_to_sfract ( float a )

Convert float to sfract

Definition at line 301 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__clssf()

asm short Ifx__clssf ( sfract a )

Count the consecutive number of bits that have the same value as bit 15 of an sfract

Definition at line 205 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__float_to_fract()

asm fract Ifx__float_to_fract ( float a )

Convert float to fract

Definition at line 215 of file IfxCpu_IntrinsicsDcc.h.

Referenced by __float_to_sfract().

◆ Ifx__fract_to_float()

asm float Ifx__fract_to_float ( fract a )

Convert fract to float.

Definition at line 225 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__getfract()

asm fract Ifx__getfract ( laccum a )

Convert __laccum to fract

Definition at line 235 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__mac_r_sf()

asm sfract Ifx__mac_r_sf | ( | sfract | a,
 |  | sfract | b,
 |  | sfract | c
 | ) |  |

Multiply-add with rounding. Returns the rounded result of ( a + b * c )

Definition at line 247 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__mac_sf()

asm sfract Ifx__mac_sf | ( | sfract | a,
 |  | sfract | b,
 |  | sfract | c
 | ) |  |

Multiply-add sfract. Returns ( a + b * c )

Definition at line 260 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__mulfractfract()

asm long Ifx__mulfractfract | ( | fract | a,
 |  | fract | b
 | ) |  |

Integer part of the multiplication of a fract and a fract

Definition at line 270 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__mulfractlong()

asm long Ifx__mulfractlong | ( | fract | a,
 |  | long | b
 | ) |  |

Integer part of the multiplication of a fract and a long

Definition at line 279 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__round16()

asm sfract Ifx__round16 ( fract a )

Convert fract to sfract

Definition at line 288 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__s16_to_sfract()

asm sfract Ifx__s16_to_sfract ( short a )

Convert signed short to sfract

Definition at line 309 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__sfract_to_s16()

asm short Ifx__sfract_to_s16 ( sfract a )

Convert sfract to signed short

Definition at line 319 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__sfract_to_u16()

asm volatile uint16 Ifx__sfract_to_u16 ( sfract a )

Convert sfract to uint16

Definition at line 328 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__shaaccum()

asm laccum Ifx__shaaccum | ( | laccum | a,
 |  | sint32 | b
 | ) |  |

Left/right shift of an __laccum

Definition at line 338 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__shafracts()

asm fract Ifx__shafracts | ( | fract | a,
 |  | sint32 | b
 | ) |  |

Left/right shift of an fract

Definition at line 358 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__shasfracts()

asm sfract Ifx__shasfracts | ( | sfract | a,
 |  | sint32 | b
 | ) |  |

Left/right shift of an sfract

Definition at line 371 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__u16_to_sfract()

asm sfract Ifx__u16_to_sfract ( uint16 a )

Convert uint16 to sfract

Definition at line 381 of file IfxCpu_IntrinsicsDcc.h.


iLLD_TC38A: Insert / Extract Bit-fields and Bits

Macros | Functions | Variables
Insert / Extract Bit-fields and Bits
iLLD » CPU » Standard Driver » Intrinsics » intrinsics for DCC compiler
Collaboration diagram for Insert / Extract Bit-fields and Bits:

Macros

#define | Ifx__extr __extr
#define | Ifx__extru __extru
#define | Ifx__getbit(address, bitoffset) __extru( *(address), bitoffset, 1 )
#define | Ifx__ins __ins
#define | Ifx__insert __insert
#define | Ifx__insn __insn
#define | Ifx__putbit(value, address, bitoffset) Ifx__imaskldmst(address,value,bitoffset,1)

Functions

sint32 | __extr (sint32, uint32, const uint32) __attribute__((intrinsic_function(0x108
uint32 | __extru (uint32, uint32, const uint32) __attribute__((intrinsic_function(0x108
uint32 | __ins (uint32, const uint32, uint32, const uint32) __attribute__((intrinsic_function(0x121
uint32 | __insert (uint32, uint32, uint32, const uint32) __attribute__((intrinsic_function(0x109
uint32 | __insn (uint32, const uint32, uint32, const uint32) __attribute__((intrinsic_function(0x121
asm volatile void | Ifx__imaskldmst (void *a, sint32 b, sint32 p, const sint32 w)

Variables

sint32 extr
uint32 ins t
uint32 insert

Detailed Description

Macro Definition Documentation

◆ Ifx__extr

#define Ifx__extr __extr

Definition at line 400 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__extru

#define Ifx__extru __extru

Definition at line 406 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__getbit

#define Ifx__getbit | ( | address,
 |  | bitoffset
 | ) | __extru( *(address), bitoffset, 1 )

Load a single bit.

Definition at line 410 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__ins

#define Ifx__ins __ins

Definition at line 416 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__insert

#define Ifx__insert __insert

Definition at line 423 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__insn

#define Ifx__insn __insn

Definition at line 429 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__putbit

#define Ifx__putbit | ( | value,
 |  | address,
 |  | bitoffset
 | ) | Ifx__imaskldmst(address,value,bitoffset,1)

Store a single bit.

Definition at line 447 of file IfxCpu_IntrinsicsDcc.h.

Function Documentation

◆ __extr()

sint32 __extr | ( | sint32 | ,
 |  | uint32 | ,
 |  | const uint32 |
 | ) |  |

Extract a bit-field (bit pos to bit pos+width) from value

◆ __extru()

uint32 __extru | ( | uint32 | ,
 |  | uint32 | ,
 |  | const uint32 |
 | ) |  |

Same as __extr() but return bit-field as unsigned integer

Referenced by __addr_to_cx(), and __cx_to_addr().

◆ __ins()

uint32 __ins | ( | uint32 | ,
 |  | const uint32 | ,
 |  | uint32 | ,
 |  | const uint32 |
 | ) |  |

Return trg but replace trgbit by srcbit in src.

◆ __insert()

uint32 __insert | ( | uint32 | ,
 |  | uint32 | ,
 |  | uint32 | ,
 |  | const uint32 |
 | ) |  |

Extract bit-field (width w bits starting at bit 0) from a and insert it in b at position p.

Referenced by __cx_to_addr().

◆ __insn()

uint32 __insn | ( | uint32 | ,
 |  | const uint32 | ,
 |  | uint32 | ,
 |  | const uint32 |
 | ) |  |

Return trg but replace trgbit by inverse of srcbit in src.

◆ Ifx__imaskldmst()

asm volatile void Ifx__imaskldmst | ( | void * | a,
 |  | sint32 | b,
 |  | sint32 | p,
 |  | const sint32 | w
 | ) |  |

Atomic load-modify-store.

Definition at line 436 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxCpu_emitEvent().

Variable Documentation

◆ extr

sint32 extr

Definition at line 398 of file IfxCpu_IntrinsicsDcc.h.

Referenced by __initcirc(), Ifx__extractbyte1(), Ifx__extractbyte2(), Ifx__extractbyte3(), Ifx__extractbyte4(), Ifx__extracthw1(), Ifx__extracthw2(), Ifx__extractubyte1(), Ifx__extractubyte2(), Ifx__extractubyte3(), Ifx__extractubyte4(), Ifx__extractuhw1(), Ifx__extractuhw2(), Ifx__getbyte1(), Ifx__getbyte2(), Ifx__getbyte3(), Ifx__getbyte4(), Ifx__gethw1(), Ifx__gethw2(), Ifx__getubyte1(), Ifx__getubyte2(), Ifx__getubyte3(), Ifx__getubyte4(), Ifx__getuhw1(), Ifx__getuhw2(), and Ifx__round16().

◆ insert

uint32 insert

Definition at line 421 of file IfxCpu_IntrinsicsDcc.h.

Referenced by __initcirc(), Ifx__fabs(), Ifx__fabsf(), Ifx__initpackb(), Ifx__initpackhw(), Ifx__initupackb(), Ifx__initupackhw(), Ifx__insertbyte1(), Ifx__insertbyte2(), Ifx__insertbyte3(), Ifx__insertbyte4(), Ifx__inserthw1(), Ifx__inserthw2(), Ifx__insertubyte1(), Ifx__insertubyte2(), Ifx__insertubyte3(), Ifx__insertubyte4(), Ifx__insertuhw1(), Ifx__insertuhw2(), Ifx__setbyte1(), Ifx__setbyte2(), Ifx__setbyte3(), Ifx__setbyte4(), Ifx__sethw1(), Ifx__sethw2(), Ifx__setubyte1(), Ifx__setubyte2(), Ifx__setubyte3(), Ifx__setubyte4(), Ifx__setuhw1(), and Ifx__setuhw2().

◆ t

uint32 insn t

Definition at line 414 of file IfxCpu_IntrinsicsDcc.h.

Referenced by Ifx_Ssw_C_InitInline(), IfxGtm_Cmu_setClkFrequency(), IfxGtm_Cmu_setEclkFrequency(), and IfxGtm_Cmu_setGclkFrequency().


iLLD_TC38A: Interrupt Handling

Macros | Functions | Variables
Interrupt Handling
iLLD » CPU » Standard Driver » Intrinsics » intrinsics for DCC compiler
Collaboration diagram for Interrupt Handling:

Macros

#define | Ifx__bisr __bisr
#define | Ifx__disable __disable
#define | Ifx__enable __enable
#define | Ifx__restore __restore
#define | Ifx__syscall __syscall

Functions

void | __bisr (const uint32) __attribute__((intrinsic_function(0x100
void | __disable (void) __attribute__((intrinsic_function(0x103
void | __enable (void) __attribute__((intrinsic_function(0x103
void | __restore (sint32) __attribute__((intrinsic_function(0x104
void | __syscall (const uint32) __attribute__((intrinsic_function(0x100

Variables

void | bisr
void | disable
void | enable
void | restore
void | syscall

Detailed Description

The next table provides an overview of the intrinsic functions to read or set interrupt handling.

Macro Definition Documentation

◆ Ifx__bisr

#define Ifx__bisr __bisr

Definition at line 461 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__disable

#define Ifx__disable __disable

Definition at line 467 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__enable

#define Ifx__enable __enable

Definition at line 479 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__restore

#define Ifx__restore __restore

Definition at line 485 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__syscall

#define Ifx__syscall __syscall

Definition at line 491 of file IfxCpu_IntrinsicsDcc.h.

Function Documentation

◆ __bisr()

void __bisr ( const uint32 )

Set CPU priority number 0..255 and enable interrupts immediately at function entry

◆ __disable()

void __disable ( void )

Disable interrupts. Only supported for TriCore1

Referenced by IfxCpu_disableInterrupts(), and IfxCpu_forceDisableInterrupts().

◆ __enable()

void __enable ( void )

Disable interrupts and return previous interrupt state (enabled or disabled). Direct supported for TriCore1.6. Emulated on TC1.3.1Enable interrupts immediately at function entry

Referenced by IfxCpu_enableInterrupts(), and IfxCpu_restoreInterrupts().

◆ __restore()

void __restore ( sint32 )

Restore interrupt state. Direct supported for TriCore1.6. Emulated on TC1.3.1

◆ __syscall()

void __syscall ( const uint32 )

Call a system call function number

Variable Documentation

◆ bisr

void bisr

Definition at line 459 of file IfxCpu_IntrinsicsDcc.h.

◆ disable

void disable

Definition at line 465 of file IfxCpu_IntrinsicsDcc.h.

◆ enable

void enable

Definition at line 477 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxAsclin_enableAutoBaudrateDetection(), IfxAsclin_enableBreakDetectedFlag(), IfxAsclin_enableCollisionDetection(), IfxAsclin_enableCollisionDetectionErrorFlag(), IfxAsclin_enableCts(), IfxAsclin_enableFallingEdgeDetectedFlag(), IfxAsclin_enableFrameErrorFlag(), IfxAsclin_enableHardwareChecksum(), IfxAsclin_enableHeaderTimeoutFlag(), IfxAsclin_enableLinAutoBaudDetectionErrorFlag(), IfxAsclin_enableLinChecksumErrorFlag(), IfxAsclin_enableLinParityErrorFlag(), IfxAsclin_enableLoopBackMode(), IfxAsclin_enableParity(), IfxAsclin_enableParityErrorFlag(), IfxAsclin_enableRaisingEdgeDetectedFlag(), IfxAsclin_enableResponseTimeoutFlag(), IfxAsclin_enableRxFifoFillLevelFlag(), IfxAsclin_enableRxFifoInlet(), IfxAsclin_enableRxFifoOverflowFlag(), IfxAsclin_enableRxFifoUnderflowFlag(), IfxAsclin_enableRxHeaderEndFlag(), IfxAsclin_enableRxResponseEndFlag(), IfxAsclin_enableTransmissionCompletedFlag(), IfxAsclin_enableTxFifoFillLevelFlag(), IfxAsclin_enableTxFifoOutlet(), IfxAsclin_enableTxFifoOverflowFlag(), IfxAsclin_enableTxHeaderEndFlag(), IfxAsclin_enableTxResponseEndFlag(), IfxCan_Node_pauseTransmission(), IfxCan_Node_setErrorStateIndicator(), IfxCan_Node_setErrStateIndicator(), IfxCan_Node_setInitialisation(), IfxCan_Node_setRemoteTransmitReq(), IfxCan_Node_setRemoteTransmitRequest(), IfxCan_Node_setTxEventFifoControl(), IfxCan_Node_setTxEventFifoCtrl(), IfxCpu_enableSegmentSpecificDataAccessCacheability(), IfxCpu_enableSegmentSpecificInstructionAccessCacheability(), IfxCpu_setDataCache(), IfxCpu_setPerformanceCountersEnableBit(), IfxCpu_setProgramCache(), IfxDma_setChannelSuspendEnable(), IfxGeth_mac_setQueueVlanInsertion(), IfxGpt12_T3_enableOutput(), IfxMtu_enableErrorTracking(), IfxQspi_enableLoopbackMode(), IfxQspi_enablePT1Event(), IfxQspi_enablePT2Event(), IfxQspi_enableUsrEvent(), IfxSmu_enableFaultToRunState(), IfxSmu_enablePortEmergencyStop(), IfxSmuStdby_enableSmuStdby(), and IfxSmuStdby_setFaultSignalAlarmConfigEventFlag().

◆ restore

void restore

Definition at line 483 of file IfxCpu_IntrinsicsDcc.h.

◆ syscall

void syscall

Definition at line 489 of file IfxCpu_IntrinsicsDcc.h.


iLLD_TC38A: Miscellaneous Intrinsic Functions

Macros | Functions | Variables
Miscellaneous Intrinsic Functions
iLLD » CPU » Standard Driver » Intrinsics » intrinsics for DCC compiler
Collaboration diagram for Miscellaneous Intrinsic Functions:

Macros

#define Ifx__cacheawi __cacheawi

Functions

void | __cacheawi (void *) __attribute__((intrinsic_function(0x110
asm volatile uint8 * | Ifx__cacheawi_bo_post_inc (uint8 *p)
asm volatile void | Ifx__cacheiwi (uint8 *p)
asm circ_t | __initcirc (void *buf, uint16 bufsize, uint16 byteindex)
asm volatile sint32 | Ifx__mulsc (sint32 a, sint32 b, sint32 offset)
asm volatile uint32 | Ifx__rol (uint32 operand, uint32 count)
asm volatile uint32 | Ifx__ror (uint32 operand, uint32 count)

Variables

void cachea wi

Detailed Description

Macro Definition Documentation

◆ Ifx__cacheawi

#define Ifx__cacheawi __cacheawi

Definition at line 504 of file IfxCpu_IntrinsicsDcc.h.

Function Documentation

◆ __cacheawi()

void __cacheawi ( void * )

Write back and invalidate cache address "p". Generates CACHEA.WI [Ab].

◆ __initcirc()

asm circ_t __initcirc | ( | void * | buf,
 |  | uint16 | bufsize,
 |  | uint16 | byteindex
 | ) |  |

Initialize a circular pointer with a dynamically allocated buffer at run-time.

Definition at line 528 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__cacheawi_bo_post_inc()

asm volatile uint8* Ifx__cacheawi_bo_post_inc ( uint8 * p )

Write back and invalidate cache address "p" and return post incremented value of "p". Generates CACHEA.WI [Ab+].

Definition at line 509 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__cacheiwi()

asm volatile void Ifx__cacheiwi ( uint8 * p )

Write back and invalidate cache index "p". Generates CACHEI.WI [Ab].

Definition at line 519 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__mulsc()

asm volatile sint32 Ifx__mulsc | ( | sint32 | a,
 |  | sint32 | b,
 |  | sint32 | offset
 | ) |  |

Multiply two 32-bit numbers to an intermediate 64-bit result, and scale back the result to 32 bits. To scale back the result, 32 bits are extracted from the intermediate 64-bit result: bit 63-offset to bit 31-offset.

Definition at line 542 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__rol()

asm volatile uint32 Ifx__rol | ( | uint32 | operand,
 |  | uint32 | count
 | ) |  |

Rotate operand left count times. The bits that are shifted out are inserted at the right side (bit 31 is shifted to bit 0).

Definition at line 552 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__ror()

asm volatile uint32 Ifx__ror | ( | uint32 | operand,
 |  | uint32 | count
 | ) |  |

Rotate operand right count times. The bits that are shifted out are inserted at the left side (bit 0 is shifted to bit 31).

Definition at line 561 of file IfxCpu_IntrinsicsDcc.h.

Variable Documentation

◆ wi

void cachea wi

Definition at line 502 of file IfxCpu_IntrinsicsDcc.h.


iLLD_TC38A: Packed Data Type Support

Functions
Packed Data Type Support
iLLD » CPU » Standard Driver » Intrinsics » intrinsics for DCC compiler
Collaboration diagram for Packed Data Type Support:

Functions

asm __packb | Ifx__absb (__packb a)
asm __packhw | Ifx__absh (__packhw a)
asm __packhw | Ifx__abssh (__packhw a)
asm sint8 | Ifx__extractbyte1 (__packb a)
Extract first byte from a __packb. More...
asm sint8 | Ifx__extractbyte2 (__packb a)
Extract second byte from a __packb. More...
asm sint8 | Ifx__extractbyte3 (__packb a)
Extract third byte from a __packb. More...
asm sint8 | Ifx__extractbyte4 (__packb a)
Extract fourth byte from a __packb. More...
asm short | Ifx__extracthw1 (__packhw a)
Extract first short from a __packhw. More...
asm short | Ifx__extracthw2 (__packhw a)
Extract second short from a __packhw. More...
asm volatile uint8 | Ifx__extractubyte1 (__upackb a)
asm volatile uint8 | Ifx__extractubyte2 (__upackb a)
asm volatile uint8 | Ifx__extractubyte3 (__upackb a)
asm volatile uint8 | Ifx__extractubyte4 (__upackb a)
asm volatile uint16 | Ifx__extractuhw1 (__upackhw a)
asm volatile uint16 | Ifx__extractuhw2 (__upackhw a)
asm sint8 | Ifx__getbyte1 (__packb *a)
asm sint8 | Ifx__getbyte2 (__packb *a)
asm sint8 | Ifx__getbyte3 (__packb *a)
asm sint8 | Ifx__getbyte4 (__packb *a)
asm short | Ifx__gethw1 (__packhw *a)
asm short | Ifx__gethw2 (__packhw *a)
asm volatile uint8 | Ifx__getubyte1 (__upackb *a)
asm volatile uint8 | Ifx__getubyte2 (__upackb *a)
asm volatile uint8 | Ifx__getubyte3 (__upackb *a)
asm volatile uint8 | Ifx__getubyte4 (__upackb *a)
asm volatile uint16 | Ifx__getuhw1 (__upackhw *a)
asm volatile uint16 | Ifx__getuhw2 (__upackhw *a)
asm __packb | Ifx__initpackb (sint32 a, sint32 b, sint32 c, sint32 d)
asm __packb | Ifx__initpackbl (long a)
asm __packhw | Ifx__initpackhw (short a, short b)
Initialize __packhw with two integers. More...
asm __packhw | Ifx__initpackhwl (long a)
asm __upackb | Ifx__initupackb (uint32 a, uint32 b, uint32 c, uint32 d)
asm __upackhw | Ifx__initupackhw (uint16 a, uint16 b)
asm __packb | Ifx__insertbyte1 (__packb a, sint8 b)
Insert sint8 into first byte of a __packb. More...
asm __packb | Ifx__insertbyte2 (__packb a, sint8 b)
Insert sint8 into second byte of a __packb. More...
asm __packb | Ifx__insertbyte3 (__packb a, sint8 b)
Insert sint8 into third byte of a __packb. More...
asm __packb | Ifx__insertbyte4 (__packb a, sint8 b)
Insert sint8 into fourth byte of a __packb. More...
asm __packhw | Ifx__inserthw1 (__packhw a, short b)
asm __packhw | Ifx__inserthw2 (__packhw a, short b)
asm __upackb | Ifx__insertubyte1 (__upackb a, uint8 b)
Insert uint8 into first unsigned byte of a __packb. More...
asm __upackb | Ifx__insertubyte2 (__upackb a, uint8 b)
Insert uint8 into second unsigned byte of a __packb. More...
asm __upackb | Ifx__insertubyte3 (__upackb a, uint8 b)
Insert uint8 into third unsigned byte of a __packb. More...
asm __upackb | Ifx__insertubyte4 (__upackb a, uint8 b)
Insert uint8 into fourth unsigned byte of a __packb. More...
asm __upackhw | Ifx__insertuhw1 (__upackhw a, uint16 b)
asm __upackhw | Ifx__insertuhw2 (__upackhw a, uint16 b)
asm __packb | Ifx__minb (__packb a, __packb b)
asm __upackb | Ifx__minbu (__upackb a, __upackb b)
asm __packhw | Ifx__minh (__packhw a, __packhw b)
asm __upackhw | Ifx__minhu (__upackhw a, __upackhw b)
asm volatile void | Ifx__setbyte1 (__packb *a, sint8 b)
asm volatile void | Ifx__setbyte2 (__packb *a, sint8 b)
asm volatile void | Ifx__setbyte3 (__packb *a, sint8 b)
asm volatile void | Ifx__setbyte4 (__packb *a, sint8 b)
asm volatile void | Ifx__sethw1 (__packhw *a, short b)
asm volatile void | Ifx__sethw2 (__packhw *a, short b)
asm volatile void | Ifx__setubyte1 (__upackb *a, uint8 b)
asm volatile void | Ifx__setubyte2 (__upackb *a, uint8 b)
asm volatile void | Ifx__setubyte3 (__upackb *a, uint8 b)
asm volatile void | Ifx__setubyte4 (__upackb *a, uint8 b)
asm volatile void | Ifx__setuhw1 (__upackhw *a, uint16 b)
asm volatile void | Ifx__setuhw2 (__upackhw *a, uint16 b)

Detailed Description

The next table provides an overview of the intrinsic functions for initialization of packed data type.

Function Documentation

◆ Ifx__absb()

asm __packb Ifx__absb ( __packb a )

Absolute value of __packb

Definition at line 579 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__absh()

asm __packhw Ifx__absh ( __packhw a )

Absolute value of __packhw

Definition at line 588 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__abssh()

asm __packhw Ifx__abssh ( __packhw a )

Absolute value of __packhw using saturation

Definition at line 597 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__extractbyte1()

asm sint8 Ifx__extractbyte1 ( __packb a )

Extract first byte from a __packb.

Definition at line 606 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__extractbyte2()

asm sint8 Ifx__extractbyte2 ( __packb a )

Extract second byte from a __packb.

Definition at line 615 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__extractbyte3()

asm sint8 Ifx__extractbyte3 ( __packb a )

Extract third byte from a __packb.

Definition at line 624 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__extractbyte4()

asm sint8 Ifx__extractbyte4 ( __packb a )

Extract fourth byte from a __packb.

Definition at line 633 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__extracthw1()

asm short Ifx__extracthw1 ( __packhw a )

Extract first short from a __packhw.

Definition at line 642 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__extracthw2()

asm short Ifx__extracthw2 ( __packhw a )

Extract second short from a __packhw.

Definition at line 651 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__extractubyte1()

asm volatile uint8 Ifx__extractubyte1 ( __upackb a )

Extract first unsigned byte from a __packb

Definition at line 660 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__extractubyte2()

asm volatile uint8 Ifx__extractubyte2 ( __upackb a )

Extract second unsigned byte from a __packb

Definition at line 669 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__extractubyte3()

asm volatile uint8 Ifx__extractubyte3 ( __upackb a )

Extract third unsigned byte from a __packb

Definition at line 678 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__extractubyte4()

asm volatile uint8 Ifx__extractubyte4 ( __upackb a )

Extract fourth unsigned byte from a __packb

Definition at line 687 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__extractuhw1()

asm volatile uint16 Ifx__extractuhw1 ( __upackhw a )

Extract first uint16 from a __packhw

Definition at line 696 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__extractuhw2()

asm volatile uint16 Ifx__extractuhw2 ( __upackhw a )

Extract second uint16 from a __packhw

Definition at line 705 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__getbyte1()

asm sint8 Ifx__getbyte1 ( __packb * a )

Extract first byte from a __packb

Definition at line 714 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__getbyte2()

asm sint8 Ifx__getbyte2 ( __packb * a )

Extract second byte from a __packb

Definition at line 724 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__getbyte3()

asm sint8 Ifx__getbyte3 ( __packb * a )

Extract third byte from a __packb

Definition at line 734 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__getbyte4()

asm sint8 Ifx__getbyte4 ( __packb * a )

Extract fourth byte from a __packb

Definition at line 744 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__gethw1()

asm short Ifx__gethw1 ( __packhw * a )

Extract first short from a __packhw

Definition at line 754 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__gethw2()

asm short Ifx__gethw2 ( __packhw * a )

Extract second short from a __packhw

Definition at line 764 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__getubyte1()

asm volatile uint8 Ifx__getubyte1 ( __upackb * a )

Extract first unsigned byte from a __packb

Definition at line 774 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__getubyte2()

asm volatile uint8 Ifx__getubyte2 ( __upackb * a )

Extract second unsigned byte from a __packb

Definition at line 784 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__getubyte3()

asm volatile uint8 Ifx__getubyte3 ( __upackb * a )

Extract third unsigned byte from a __packb

Definition at line 794 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__getubyte4()

asm volatile uint8 Ifx__getubyte4 ( __upackb * a )

Extract fourth unsigned byte from a __packb

Definition at line 804 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__getuhw1()

asm volatile uint16 Ifx__getuhw1 ( __upackhw * a )

Extract first uint16 from a __packhw

Definition at line 814 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__getuhw2()

asm volatile uint16 Ifx__getuhw2 ( __upackhw * a )

Extract second uint16 from a __packhw

Definition at line 824 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__initpackb()

asm __packb Ifx__initpackb | ( | sint32 | a,
 |  | sint32 | b,
 |  | sint32 | c,
 |  | sint32 | d
 | ) |  |

Initialize __packb with four integers

Definition at line 834 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__initpackbl()

asm __packb Ifx__initpackbl ( long a )

Initialize __packb with a long integer

Definition at line 845 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__initpackhw()

asm __packhw Ifx__initpackhw | ( | short | a,
 |  | short | b
 | ) |  |

Initialize __packhw with two integers.

Definition at line 854 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__initpackhwl()

asm __packhw Ifx__initpackhwl ( long a )

Initialize __packhw with a long integer

Definition at line 863 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__initupackb()

asm __upackb Ifx__initupackb | ( | uint32 | a,
 |  | uint32 | b,
 |  | uint32 | c,
 |  | uint32 | d
 | ) |  |

Initialize __packb with four unsigned integers

Definition at line 872 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__initupackhw()

asm __upackhw Ifx__initupackhw | ( | uint16 | a,
 |  | uint16 | b
 | ) |  |

Initialize __packhw with two unsigned integers

Definition at line 883 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__insertbyte1()

asm __packb Ifx__insertbyte1 | ( | __packb | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into first byte of a __packb.

Definition at line 892 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__insertbyte2()

asm __packb Ifx__insertbyte2 | ( | __packb | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into second byte of a __packb.

Definition at line 901 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__insertbyte3()

asm __packb Ifx__insertbyte3 | ( | __packb | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into third byte of a __packb.

Definition at line 910 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__insertbyte4()

asm __packb Ifx__insertbyte4 | ( | __packb | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into fourth byte of a __packb.

Definition at line 919 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__inserthw1()

asm __packhw Ifx__inserthw1 | ( | __packhw | a,
 |  | short | b
 | ) |  |

Insert short into first halfword of a __packhw

Definition at line 928 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__inserthw2()

asm __packhw Ifx__inserthw2 | ( | __packhw | a,
 |  | short | b
 | ) |  |

Insert short into second halfword of a __packhw

Definition at line 937 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__insertubyte1()

asm __upackb Ifx__insertubyte1 | ( | __upackb | a,
 |  | uint8 | b
 | ) |  |

Insert uint8 into first unsigned byte of a __packb.

Definition at line 946 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__insertubyte2()

asm __upackb Ifx__insertubyte2 | ( | __upackb | a,
 |  | uint8 | b
 | ) |  |

Insert uint8 into second unsigned byte of a __packb.

Definition at line 955 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__insertubyte3()

asm __upackb Ifx__insertubyte3 | ( | __upackb | a,
 |  | uint8 | b
 | ) |  |

Insert uint8 into third unsigned byte of a __packb.

Definition at line 964 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__insertubyte4()

asm __upackb Ifx__insertubyte4 | ( | __upackb | a,
 |  | uint8 | b
 | ) |  |

Insert uint8 into fourth unsigned byte of a __packb.

Definition at line 973 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__insertuhw1()

asm __upackhw Ifx__insertuhw1 | ( | __upackhw | a,
 |  | uint16 | b
 | ) |  |

Insert uint16 into first halfword of a __upackhw

Definition at line 982 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__insertuhw2()

asm __upackhw Ifx__insertuhw2 | ( | __upackhw | a,
 |  | uint16 | b
 | ) |  |

Insert uint16 into second halfword of a __upackhw

Definition at line 991 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__minb()

asm __packb Ifx__minb | ( | __packb | a,
 |  | __packb | b
 | ) |  |

Minimum of two __packb values

Definition at line 1003 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__minbu()

asm __upackb Ifx__minbu | ( | __upackb | a,
 |  | __upackb | b
 | ) |  |

Minimum of two __upackb values

Definition at line 1013 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__minh()

asm __packhw Ifx__minh | ( | __packhw | a,
 |  | __packhw | b
 | ) |  |

Minimum of two __packhw values

Definition at line 1022 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__minhu()

asm __upackhw Ifx__minhu | ( | __upackhw | a,
 |  | __upackhw | b
 | ) |  |

Minimum of two __upackhw values

Definition at line 1031 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__setbyte1()

asm volatile void Ifx__setbyte1 | ( | __packb * | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into first byte of a __packb

Definition at line 1040 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__setbyte2()

asm volatile void Ifx__setbyte2 | ( | __packb * | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into second byte of a __packb

Definition at line 1051 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__setbyte3()

asm volatile void Ifx__setbyte3 | ( | __packb * | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into third byte of a __packb

Definition at line 1062 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__setbyte4()

asm volatile void Ifx__setbyte4 | ( | __packb * | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into fourth byte of a __packb

Definition at line 1073 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__sethw1()

asm volatile void Ifx__sethw1 | ( | __packhw * | a,
 |  | short | b
 | ) |  |

Insert short into first halfword of a __packhw

Definition at line 1084 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__sethw2()

asm volatile void Ifx__sethw2 | ( | __packhw * | a,
 |  | short | b
 | ) |  |

Insert short into second halfword of a __packhw

Definition at line 1095 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__setubyte1()

asm volatile void Ifx__setubyte1 | ( | __upackb * | a,
 |  | uint8 | b
 | ) |  |

Insert uint8 into first byte of a __upackb

Definition at line 1106 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__setubyte2()

asm volatile void Ifx__setubyte2 | ( | __upackb * | a,
 |  | uint8 | b
 | ) |  |

Insert uint8 into second byte of a __upackb

Definition at line 1117 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__setubyte3()

asm volatile void Ifx__setubyte3 | ( | __upackb * | a,
 |  | uint8 | b
 | ) |  |

Insert uint8 into third byte of a __upackb

Definition at line 1128 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__setubyte4()

asm volatile void Ifx__setubyte4 | ( | __upackb * | a,
 |  | uint8 | b
 | ) |  |

Insert uint8 into fourth byte of a __upackb

Definition at line 1139 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__setuhw1()

asm volatile void Ifx__setuhw1 | ( | __upackhw * | a,
 |  | uint16 | b
 | ) |  |

Insert uint16 into first halfword of a __upackhw

Definition at line 1150 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__setuhw2()

asm volatile void Ifx__setuhw2 | ( | __upackhw * | a,
 |  | uint16 | b
 | ) |  |

Insert uint16 into second halfword of a __upackhw

Definition at line 1161 of file IfxCpu_IntrinsicsDcc.h.


iLLD_TC38A: Register Handling

Macros | Functions | Variables
Register Handling
iLLD » CPU » Standard Driver » Intrinsics » intrinsics for DCC compiler
Collaboration diagram for Register Handling:

Macros

#define | Ifx__abs __abs
#define | Ifx__absdif __absdif
#define | Ifx__abss __abss
#define | Ifx__clo __clo
#define | Ifx__cls __cls
#define | Ifx__clz __clz
#define | Ifx__mfcr __mfcr
#define | Ifx__mtcr __mtcr

Functions

sint32 | __abs (sint32) __attribute__((intrinsic_pseudo(1
sint32 | __absdif (sint32, sint32) __attribute__((intrinsic_pseudo(1
sint32 | __abss (sint32) __attribute__((intrinsic_pseudo(1
sint32 | __clo (sint32) __attribute__((intrinsic_pseudo(1
sint32 | __cls (sint32) __attribute__((intrinsic_pseudo(1
sint32 | __clz (sint32) __attribute__((intrinsic_pseudo(1
asm double | Ifx__fabs (double d)
asm float | Ifx__fabsf (float f)
sint32 | __mfcr (const uint32) __attribute__((intrinsic_function(0x101
void | __mtcr (const uint32, sint32) __attribute__((intrinsic_function(0x102
asm volatile sint32 | Ifx__parity (sint32 a)
asm sint8 | Ifx__satb (sint32 a)
asm volatile uint8 | Ifx__satbu (sint32 a)
asm short | Ifx__sath (sint32 a)
asm volatile uint16 | Ifx__sathu (sint32 a)

Variables

sint32 abs
sint32 absdif
sint32 abss
sint32 clo
sint32 cls
sint32 clz
sint32 mfcr
void mtcr

Detailed Description

The next table provides an overview of the intrinsic functions that you can use to access control registers.

Macro Definition Documentation

◆ Ifx__abs

#define Ifx__abs __abs

Definition at line 1182 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__absdif

#define Ifx__absdif __absdif

Definition at line 1188 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__abss

#define Ifx__abss __abss

Definition at line 1194 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__clo

#define Ifx__clo __clo

Definition at line 1200 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__cls

#define Ifx__cls __cls

Definition at line 1206 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__clz

#define Ifx__clz __clz

Definition at line 1212 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__mfcr

#define Ifx__mfcr __mfcr

Definition at line 1236 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__mtcr

#define Ifx__mtcr __mtcr

Definition at line 1242 of file IfxCpu_IntrinsicsDcc.h.

Function Documentation

◆ __abs()

sint32 __abs ( sint32 )

Return absolute value

Referenced by IfxCan_Node_setBitTiming(), and IfxCan_Node_setFastBitTiming().

◆ __absdif()

sint32 __absdif | ( | sint32 | ,
 |  | sint32 |
 | ) |  |

Return absolue difference of two integers

◆ __abss()

sint32 __abss ( sint32 )

Return absolute value with saturation

◆ __clo()

sint32 __clo ( sint32 )

Count leading ones in int

◆ __cls()

sint32 __cls ( sint32 )

Count number of redundant sign bits (all consecutive bits with the same value as bit 31

◆ __clz()

sint32 __clz ( sint32 )

Count leading zeros in int

Referenced by Ifx_FftF32_radix2(), Ifx_FftF32_radix2I(), IfxDma_getCircularRangeCode(), IfxScuRcu_isApplicationReset(), and IfxStm_Timer_init().

◆ __mfcr()

sint32 __mfcr ( const uint32 )

Move contents of the addressed core SFR into a data register

Referenced by IfxCpu_areInterruptsEnabled(), IfxCpu_emitEvent(), IfxCpu_enableSegmentSpecificDataAccessCacheability(), IfxCpu_enableSegmentSpecificInstructionAccessCacheability(), IfxCpu_getCoreId(), IfxCpu_getCoreIndex(), IfxCpu_getCoreMode(), IfxCpu_getPerformanceCounter(), IfxCpu_getPerformanceCounterStickyOverflow(), IfxCpu_invalidateProgramCache(), IfxCpu_resetAndStartCounters(), IfxCpu_setPerformanceCountersEnableBit(), IfxCpu_setSafetyTaskIdentifier(), IfxCpu_stopCounters(), IfxCpu_updatePerformanceCounter(), and IfxCpu_waitEvent().

◆ __mtcr()

void __mtcr | ( | const uint32 | ,
 |  | sint32 |
 | ) |  |

Move contents of a data register (second sint32) to the addressed core SFR (first sint32)

Referenced by IfxCpu_enableSegmentSpecificDataAccessCacheability(), IfxCpu_enableSegmentSpecificInstructionAccessCacheability(), IfxCpu_initCSA(), IfxCpu_invalidateProgramCache(), IfxCpu_resetAndStartCounters(), IfxCpu_setDataCache(), IfxCpu_setPerformanceCountersEnableBit(), IfxCpu_setProgramCache(), IfxCpu_setSafetyTaskIdentifier(), and IfxCpu_updatePerformanceCounter().

◆ Ifx__fabs()

asm double Ifx__fabs ( double d )

Return absolute double precision floating-point value

Definition at line 1216 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__fabsf()

asm float Ifx__fabsf ( float f )

Return absolute floating-point value

Definition at line 1225 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__parity()

asm volatile sint32 Ifx__parity ( sint32 a )

Return parity

Definition at line 1246 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__satb()

asm sint8 Ifx__satb ( sint32 a )

Return saturated byte

Definition at line 1255 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__satbu()

asm volatile uint8 Ifx__satbu ( sint32 a )

Return saturated unsigned byte

Definition at line 1264 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__sath()

asm short Ifx__sath ( sint32 a )

Return saturated halfword

Definition at line 1273 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__sathu()

asm volatile uint16 Ifx__sathu ( sint32 a )

Return saturated unsignedhalfword

Definition at line 1282 of file IfxCpu_IntrinsicsDcc.h.

Variable Documentation

◆ abs

sint32 abs

Definition at line 1180 of file IfxCpu_IntrinsicsDcc.h.

Referenced by Ifx__absb(), and Ifx__absh().

◆ absdif

sint32 absdif

Definition at line 1186 of file IfxCpu_IntrinsicsDcc.h.

◆ abss

sint32 abss

Definition at line 1192 of file IfxCpu_IntrinsicsDcc.h.

Referenced by Ifx__abssh().

◆ clo

sint32 clo

Definition at line 1198 of file IfxCpu_IntrinsicsDcc.h.

◆ cls

sint32 cls

Definition at line 1204 of file IfxCpu_IntrinsicsDcc.h.

Referenced by Ifx__clssf().

◆ clz

sint32 clz

Definition at line 1210 of file IfxCpu_IntrinsicsDcc.h.

◆ mfcr

sint32 mfcr

Definition at line 1234 of file IfxCpu_IntrinsicsDcc.h.

◆ mtcr

void mtcr

Definition at line 1240 of file IfxCpu_IntrinsicsDcc.h.

Referenced by Ifx__stopPerfCounters().


iLLD_TC38A: Saturation Arithmetic Support

Macros | Functions | Variables
Saturation Arithmetic Support
iLLD » CPU » Standard Driver » Intrinsics » intrinsics for DCC compiler
Collaboration diagram for Saturation Arithmetic Support:

Macros

#define Ifx__adds __adds

Functions

sint32 | __adds (sint32, sint32) __attribute__((intrinsic_pseudo(1
asm volatile uint32 | Ifx__addsu (uint32 a, uint32 b)
asm volatile sint32 | Ifx__subs (sint32 a, sint32 b)
asm volatile uint32 | Ifx__subsu (uint32 a, uint32 b)

Variables

sint32 adds

Detailed Description

These intrinsics support saturation arithmetic

Macro Definition Documentation

◆ Ifx__adds

#define Ifx__adds __adds

Definition at line 1300 of file IfxCpu_IntrinsicsDcc.h.

Function Documentation

◆ __adds()

sint32 __adds | ( | sint32 | ,
 |  | sint32 |
 | ) |  |

add signed with saturation

◆ Ifx__addsu()

asm volatile uint32 Ifx__addsu | ( | uint32 | a,
 |  | uint32 | b
 | ) |  |

add unsigned with saturation

Definition at line 1304 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__subs()

asm volatile sint32 Ifx__subs | ( | sint32 | a,
 |  | sint32 | b
 | ) |  |

substract signed with saturation

Definition at line 1313 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__subsu()

asm volatile uint32 Ifx__subsu | ( | uint32 | a,
 |  | uint32 | b
 | ) |  |

substract unsigned with saturation

Definition at line 1322 of file IfxCpu_IntrinsicsDcc.h.

Variable Documentation

◆ adds

sint32 adds

Definition at line 1298 of file IfxCpu_IntrinsicsDcc.h.

Referenced by Ifx__addsu(), and Ifx__round16().


iLLD_TC38A: Insert Single Assembly Instruction

Macros | Functions | Variables
Insert Single Assembly Instruction
iLLD » CPU » Standard Driver » Intrinsics » intrinsics for DCC compiler
Collaboration diagram for Insert Single Assembly Instruction:

Macros

#define | Ifx__debug __debug
#define | Ifx__dsync __dsync
#define | Ifx__isync __isync
#define | Ifx__mem_barrier __scheduling_barrier
#define | Ifx__nop __nop
#define | Ifx__NOP __nops
#define | Ifx__rslcx
#define | Ifx__svlcx

Functions

void | __debug (void) __attribute__((intrinsic_function(0x103
void | __dsync (void) __attribute__((intrinsic_function(0x103
void | __isync (void) __attribute__((intrinsic_function(0x103
asm volatile void | Ifx__ldmst (volatile void *address, uint32 mask, uint32 value)
void | __scheduling_barrier (void) __attribute__((intrinsic_function(9
void | __nop (void) __attribute__((intrinsic_function(0x103
asm volatile void | Ifx__nops (uint32 cnt)
asm volatile void | Ifx__nops1000 (uint32 x)
void | __rslcx (void) __attribute__((intrinsic_function(0x103
void | __svlcx (void) __attribute__((intrinsic_function(0x103
asm volatile uint32 | Ifx__swap (void *place, uint32 value)
asm volatile unsigned int | Ifx__cmpAndSwap (unsigned int *address, unsigned long value, unsigned long CmpVal)

Variables

void | debug
void | dsync
void | isync
void | $ $sb
void | nop
void | rslcx
void | svlcx

Detailed Description

The next table provides an overview of the intrinsic functions that you can use to insert a single assembly instruction.You can also use inline assembly but these intrinsics provide a shorthand for frequently used assembly instructions.

Macro Definition Documentation

◆ Ifx__debug

#define Ifx__debug __debug

Definition at line 1343 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__dsync

#define Ifx__dsync __dsync

Definition at line 1349 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__isync

#define Ifx__isync __isync

Definition at line 1355 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__mem_barrier

#define Ifx__mem_barrier __scheduling_barrier

Definition at line 1374 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__nop

#define Ifx__nop __nop

Definition at line 1380 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__NOP

#define Ifx__NOP __nops

Definition at line 1382 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__rslcx

#define Ifx__rslcx

Definition at line 1418 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__svlcx

#define Ifx__svlcx

Definition at line 1424 of file IfxCpu_IntrinsicsDcc.h.

Function Documentation

◆ __debug()

void __debug ( void )

Insert DEBUG instruction

Referenced by Ifx_Assert_doLevel(), Ifx_Assert_doValidate(), and IfxCcu6_routeInterruptNode().

◆ __dsync()

void __dsync ( void )

Insert DSYNC instruction

Referenced by IfxCpu_enableSegmentSpecificDataAccessCacheability(), IfxCpu_enableSegmentSpecificInstructionAccessCacheability(), IfxFlash_clearStatus(), IfxFlash_disableWriteProtection(), IfxFlash_enterCrankingMode(), IfxFlash_enterDemandMode(), IfxFlash_enterDynamicIdleMode(), IfxFlash_enterPageMode(), IfxFlash_eraseMultipleSectors(), IfxFlash_eraseSector(), IfxFlash_eraseVerifyMultipleSectors(), IfxFlash_eraseVerifySector(), IfxFlash_exitCrankingMode(), IfxFlash_exitDemandMode(), IfxFlash_exitDynamicIdleMode(), IfxFlash_loadPage(), IfxFlash_loadPage2X32(), IfxFlash_replaceLogicalSector(), IfxFlash_resetToRead(), IfxFlash_resumeProtection(), IfxFlash_suspendResumeMultipleSectors(), IfxFlash_suspendResumeSector(), IfxFlash_userContentCount(), IfxFlash_userMarginCount(), IfxFlash_userVthCount(), IfxFlash_verifyErasedPage(), IfxFlash_verifyErasedWordLine(), IfxFlash_waitUnbusy(), IfxFlash_waitUnbusyAll(), IfxFlash_writeBurst(), IfxFlash_writeBurstOnce(), IfxFlash_writePage(), IfxFlash_writePageOnce(), IfxPmsPm_initAndRequestLoadJump(), and IfxPmsPm_initAndRequestVoltageDroop().

◆ __isync()

void __isync ( void )

Insert ISYNC instruction

Referenced by Ifx_Ssw_NOP(), IfxCpu_enableSegmentSpecificDataAccessCacheability(), IfxCpu_enableSegmentSpecificInstructionAccessCacheability(), IfxCpu_setDataCache(), and IfxCpu_setProgramCache().

◆ __nop()

void __nop ( void )

Insert NOP instruction

Referenced by IfxCpu_disableInterrupts(), IfxCpu_forceDisableInterrupts(), IfxCpu_waitEvent(), IfxHssl_Hssl_delay(), IfxMtu_clearSram(), IfxMtu_disableMbistShell(), IfxMtu_readSramAddress(), IfxMtu_runCheckerBoardTest(), IfxMtu_runMarchUTest(), IfxMtu_runNonDestructiveInversionTest(), IfxMtu_writeSramAddress(), IfxPmsPm_setStandbyMode(), IfxScuLbist_multiTriggersInline(), and IfxScuLbist_retriggerInline().

◆ __rslcx()

void __rslcx ( void )

Insert RSLCX instruction

◆ __scheduling_barrier()

void __scheduling_barrier ( void )

◆ __svlcx()

void __svlcx ( void )

Insert SVLCX instruction

◆ Ifx__cmpAndSwap()

asm volatile unsigned int Ifx__cmpAndSwap | ( | unsigned int * | address,
 |  | unsigned long | value,
 |  | unsigned long | CmpVal
 | ) |  |

Definition at line 1441 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__ldmst()

asm volatile void Ifx__ldmst | ( | volatile void * | address,
 |  | uint32 | mask,
 |  | uint32 | value
 | ) |  |

Insert LDMST instruction. Note that all operands must be word-aligned.

Definition at line 1362 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__nops()

asm volatile void Ifx__nops ( uint32 cnt )

Insert a loop over n NOP instruction

Definition at line 1386 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__nops1000()

asm volatile void Ifx__nops1000 ( uint32 x )

Insert a loop over n times 1000 NOP instruction

Definition at line 1399 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__swap()

asm volatile uint32 Ifx__swap | ( | void * | place,
 |  | uint32 | value
 | ) |  |

Insert SWAP instruction. Note that all operands must be word-aligned.

Definition at line 1431 of file IfxCpu_IntrinsicsDcc.h.

Variable Documentation

◆ $ $sb

void $ $sb

Definition at line 1373 of file IfxCpu_IntrinsicsDcc.h.

◆ debug

void debug

Definition at line 1341 of file IfxCpu_IntrinsicsDcc.h.

◆ dsync

void dsync

Definition at line 1347 of file IfxCpu_IntrinsicsDcc.h.

◆ isync

void isync

Definition at line 1353 of file IfxCpu_IntrinsicsDcc.h.

Referenced by Ifx__stopPerfCounters().

◆ nop

void nop

Definition at line 1378 of file IfxCpu_IntrinsicsDcc.h.

Referenced by Ifx__nops(), and Ifx__nops1000().

◆ rslcx

void rslcx

Definition at line 1416 of file IfxCpu_IntrinsicsDcc.h.

◆ svlcx

void svlcx

Definition at line 1422 of file IfxCpu_IntrinsicsDcc.h.


iLLD_TC38A: Intrinsics for GNU compiler

Modules
Intrinsics for GNU compiler
iLLD » CPU » Standard Driver » Intrinsics
Collaboration diagram for Intrinsics for GNU compiler:

Modules

Cross type arithmetic operation
Signed integer operation
Unsigned integer operation
Floating point operation
Fractional Arithmetic Support
Insert / Extract Bit-fields and Bits
Interrupt Handling
Miscellaneous Intrinsic Functions
Packed Data Type Support
Insert Single Assembly Instruction

Detailed Description


iLLD_TC38A: Cross type arithmetic operation

Macros
Cross type arithmetic operation
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Cross type arithmetic operation:

Macros

#define | Ifx__minX(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxX(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturateX(X, Min, Max) ( Ifx__minX(Ifx__maxX(X, Min), Max) )
#define | Ifx__checkrangeX(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))

Detailed Description

Macro compatible with float, fix point, signed integer and unsigned integer

Macro Definition Documentation

◆ Ifx__checkrangeX

#define Ifx__checkrangeX | ( | X,
 |  | Min,
 |  | Max
 | ) | (((X) >= (Min)) && ((X) <= (Max)))

Definition at line 120 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__maxX

#define Ifx__maxX | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) ? (X) : (Y) )

Definition at line 118 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__minX

#define Ifx__minX | ( | X,
 |  | Y
 | ) | ( ((X) < (Y)) ? (X) : (Y) )

Definition at line 117 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__saturateX

#define Ifx__saturateX | ( | X,
 |  | Min,
 |  | Max
 | ) | ( Ifx__minX(Ifx__maxX(X, Min), Max) )

Definition at line 119 of file IfxCpu_IntrinsicsGhs.h.


iLLD_TC38A: Signed integer operation

Macros
Signed integer operation
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Signed integer operation:

Macros

#define Ifx__saturate(X, Min, Max) ( __min(__max(X, Min), Max) )

Detailed Description

Macro Definition Documentation

◆ Ifx__saturate

#define Ifx__saturate | ( | X,
 |  | Min,
 |  | Max
 | ) | ( __min(__max(X, Min), Max) )

Definition at line 127 of file IfxCpu_IntrinsicsGhs.h.


iLLD_TC38A: Unsigned integer operation

Macros
Unsigned integer operation
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Unsigned integer operation:

Macros

#define Ifx__saturateu(X, Min, Max) ( __minu(__maxu(X, Min), Max) )

Detailed Description

Macro Definition Documentation

◆ Ifx__saturateu

#define Ifx__saturateu | ( | X,
 |  | Min,
 |  | Max
 | ) | ( __minu(__maxu(X, Min), Max) )

Definition at line 134 of file IfxCpu_IntrinsicsGhs.h.


iLLD_TC38A: Floating point operation

Macros
Floating point operation
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Floating point operation:

Macros

#define | Ifx__sqrf(X) ((X) * (X))
#define | Ifx__sqrtf(X) sqrtf(X)
#define | Ifx__checkrange(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__roundf(X) ((((X) - (sint32)(X)) > 0.5) ? (1 + (sint32)(X)) : ((sint32)(X)))
#define | Ifx__absf(X) ( ((X) < 0.0) ? -(X) : (X) )
#define | Ifx__minf(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxf(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturatef(X, Min, Max) ( Ifx__minf(Ifx__maxf(X, Min), Max) )
#define | Ifx__checkrangef(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__abs_stdreal(X) ( ((X) > 0.0) ? (X) : -(X) )
#define | Ifx__min_stdreal(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__max_stdreal(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturate_stdreal(X, Min, Max) ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )
#define | Ifx__neqf(X, Y) ( ((X) > (Y)) || ((X) < (Y)) )
#define | Ifx__leqf(X, Y) ( !((X) > (Y)) )
#define | Ifx__geqf(X, Y) ( !((X) < (Y)) )

Detailed Description

Macro Definition Documentation

◆ Ifx__abs_stdreal

#define Ifx__abs_stdreal ( X ) ( ((X) > 0.0) ? (X) : -(X) )

Definition at line 153 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__absf

#define Ifx__absf ( X ) ( ((X) < 0.0) ? -(X) : (X) )

Definition at line 147 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__checkrange

#define Ifx__checkrange | ( | X,
 |  | Min,
 |  | Max
 | ) | (((X) >= (Min)) && ((X) <= (Max)))

Definition at line 144 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__checkrangef

#define Ifx__checkrangef | ( | X,
 |  | Min,
 |  | Max
 | ) | (((X) >= (Min)) && ((X) <= (Max)))

Definition at line 151 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__geqf

#define Ifx__geqf | ( | X,
 |  | Y
 | ) | ( !((X) < (Y)) )

X >= Y

Definition at line 160 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__leqf

#define Ifx__leqf | ( | X,
 |  | Y
 | ) | ( !((X) > (Y)) )

X <= Y

Definition at line 159 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__max_stdreal

#define Ifx__max_stdreal | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) ? (X) : (Y) )

Definition at line 155 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__maxf

#define Ifx__maxf | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) ? (X) : (Y) )

Definition at line 149 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__min_stdreal

#define Ifx__min_stdreal | ( | X,
 |  | Y
 | ) | ( ((X) < (Y)) ? (X) : (Y) )

Definition at line 154 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__minf

#define Ifx__minf | ( | X,
 |  | Y
 | ) | ( ((X) < (Y)) ? (X) : (Y) )

Definition at line 148 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__neqf

#define Ifx__neqf | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) || ((X) < (Y)) )

X != Y

Definition at line 158 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__roundf

#define Ifx__roundf ( X ) ((((X) - (sint32)(X)) > 0.5) ? (1 + (sint32)(X)) : ((sint32)(X)))

Definition at line 146 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__saturate_stdreal

#define Ifx__saturate_stdreal | ( | X,
 |  | Min,
 |  | Max
 | ) | ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )

Definition at line 156 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__saturatef

#define Ifx__saturatef | ( | X,
 |  | Min,
 |  | Max
 | ) | ( Ifx__minf(Ifx__maxf(X, Min), Max) )

Definition at line 150 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__sqrf

#define Ifx__sqrf ( X ) ((X) * (X))

Definition at line 142 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__sqrtf

#define Ifx__sqrtf ( X ) sqrtf(X)

Definition at line 143 of file IfxCpu_IntrinsicsGhs.h.


iLLD_TC38A: Fractional Arithmetic Support

Macros | Functions
Fractional Arithmetic Support
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Fractional Arithmetic Support:

Macros

#define Ifx__fract_to_sfract Ifx__round16

Functions

IFX_INLINE sint16 | Ifx__clssf (sfract a)
IFX_INLINE float | Ifx__fract_to_float (fract a)
IFX_INLINE fract | Ifx__float_to_fract (float a)
IFX_INLINE fract | Ifx__getfract (laccum a)
IFX_INLINE sfract | Ifx__mac_r_sf (sfract a, sfract b, sfract c)
IFX_INLINE sfract | Ifx__mac_sf (sfract a, sfract b, sfract c)
IFX_INLINE long | Ifx__mulfractfract (fract a, fract b)
IFX_INLINE long | Ifx__mulfractlong (fract a, long b)
IFX_INLINE sfract | Ifx__round16 (fract a)
IFX_INLINE sfract | Ifx__float_to_sfract (float a)
IFX_INLINE sfract | Ifx__s16_to_sfract (sint16 a)
IFX_INLINE sint16 | Ifx__sfract_to_s16 (sfract a)
IFX_INLINE uint16 | Ifx__sfract_to_u16 (sfract a)
__asm__ laccum | Ifx__shaaccum (laccum a, sint32 b)
IFX_INLINE fract | Ifx__shafracts (fract a, sint32 b)
IFX_INLINE sfract | Ifx__shasfracts (sfract a, sint32 b)
IFX_INLINE sfract | Ifx__u16_to_sfract (uint16 a)

Detailed Description

The next table provides an overview of intrinsic functions to convert fractional values. Note that the TASKING VX-toolset C compiler for TriCore fully supports the fractional type so normally you should not need these intrinsic functions (except for __mulfractlong). For compatibility reasons the TASKING C compiler does support these functions.

Macro Definition Documentation

◆ Ifx__fract_to_sfract

#define Ifx__fract_to_sfract Ifx__round16

Definition at line 261 of file IfxCpu_IntrinsicsGhs.h.

Referenced by Ifx__float_to_sfract().

Function Documentation

◆ Ifx__clssf()

IFX_INLINE sint16 Ifx__clssf ( sfract a )

Count the consecutive number of bits that have the same value as bit 15 of an sfract

Definition at line 174 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__float_to_fract()

IFX_INLINE fract Ifx__float_to_fract ( float a )

Convert float to fract

Definition at line 193 of file IfxCpu_IntrinsicsGhs.h.

Referenced by Ifx__float_to_sfract().

◆ Ifx__float_to_sfract()

IFX_INLINE sfract Ifx__float_to_sfract ( float a )

Convert float to sfract

Definition at line 265 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__fract_to_float()

IFX_INLINE float Ifx__fract_to_float ( fract a )

Convert fract to float

Definition at line 184 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__getfract()

IFX_INLINE fract Ifx__getfract ( laccum a )

Convert laccum to fract

Definition at line 202 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__mac_r_sf()

IFX_INLINE sfract Ifx__mac_r_sf | ( | sfract | a,
 |  | sfract | b,
 |  | sfract | c
 | ) |  |

Multiply-add with rounding. Returns the rounded result of ( a + b * c )

Definition at line 211 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__mac_sf()

IFX_INLINE sfract Ifx__mac_sf | ( | sfract | a,
 |  | sfract | b,
 |  | sfract | c
 | ) |  |

Multiply-add sfract. Returns ( a + b * c )

Definition at line 222 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__mulfractfract()

IFX_INLINE long Ifx__mulfractfract | ( | fract | a,
 |  | fract | b
 | ) |  |

Integer part of the multiplication of a fract and a fract

Definition at line 233 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__mulfractlong()

IFX_INLINE long Ifx__mulfractlong | ( | fract | a,
 |  | long | b
 | ) |  |

Integer part of the multiplication of a fract and a long

Definition at line 242 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__round16()

IFX_INLINE sfract Ifx__round16 ( fract a )

Convert fract to sfract

Definition at line 251 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__s16_to_sfract()

IFX_INLINE sfract Ifx__s16_to_sfract ( sint16 a )

Convert signed sint16 to sfract

Definition at line 273 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__sfract_to_s16()

IFX_INLINE sint16 Ifx__sfract_to_s16 ( sfract a )

Convert sfract to sint16

Definition at line 283 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__sfract_to_u16()

IFX_INLINE uint16 Ifx__sfract_to_u16 ( sfract a )

Convert sfract to uint16

Definition at line 293 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__shaaccum()

__asm__ laccum Ifx__shaaccum | ( | laccum | a,
 |  | sint32 | b
 | ) |  |

Left/right shift of an __laccum

Definition at line 303 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__shafracts()

IFX_INLINE fract Ifx__shafracts | ( | fract | a,
 |  | sint32 | b
 | ) |  |

Left/right shift of an fract

Definition at line 320 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__shasfracts()

IFX_INLINE sfract Ifx__shasfracts | ( | sfract | a,
 |  | sint32 | b
 | ) |  |

Left/right shift of an sfract

Definition at line 329 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__u16_to_sfract()

IFX_INLINE sfract Ifx__u16_to_sfract ( uint16 a )

Convert uint16 to sfract

Definition at line 340 of file IfxCpu_IntrinsicsGhs.h.


iLLD_TC38A: Insert / Extract Bit-fields and Bits

Macros | Functions
Insert / Extract Bit-fields and Bits
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Insert / Extract Bit-fields and Bits:

Macros

#define | Ifx__getbit(address, bitoffset) ((*(address) & (1U << (bitoffset))) != 0)
#define | Ifx__imaskldmst(address, value, bitoffset, bits) __imaskldmst((int *)address, value, bitoffset, bits)
#define | Ifx__putbit(value, address, bitoffset) Ifx__imaskldmst(address, value, bitoffset,1)

Functions

IFX_INLINE sint32 | Ifx__extr (sint32 a, uint32 p, uint32 w)
IFX_INLINE uint32 | Ifx__extru (uint32 a, uint32 p, uint32 w)
IFX_INLINE sint32 | Ifx__insert (sint32 a, sint32 b, sint32 p, const sint32 w)

Detailed Description

Macro Definition Documentation

◆ Ifx__getbit

#define Ifx__getbit | ( | address,
 |  | bitoffset
 | ) | ((*(address) & (1U << (bitoffset))) != 0)

Load a single bit.

Definition at line 382 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__imaskldmst

#define Ifx__imaskldmst | ( | address,
 |  | value,
 |  | bitoffset,
 |  | bits
 | ) | __imaskldmst((int *)address, value, bitoffset, bits)

Atomic load-modify-store.

Definition at line 386 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__putbit

#define Ifx__putbit | ( | value,
 |  | address,
 |  | bitoffset
 | ) | Ifx__imaskldmst(address, value, bitoffset,1)

Store a single bit.

Definition at line 402 of file IfxCpu_IntrinsicsGhs.h.

Function Documentation

◆ Ifx__extr()

IFX_INLINE sint32 Ifx__extr | ( | sint32 | a,
 |  | uint32 | p,
 |  | uint32 | w
 | ) |  |

Extract a bit-field (bit pos to bit pos+width) from value

Definition at line 357 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__extru()

IFX_INLINE uint32 Ifx__extru | ( | uint32 | a,
 |  | uint32 | p,
 |  | uint32 | w
 | ) |  |

Same as __extr() but return bit-field as unsigned integer

Definition at line 369 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__insert()

IFX_INLINE sint32 Ifx__insert | ( | sint32 | a,
 |  | sint32 | b,
 |  | sint32 | p,
 |  | const sint32 | w
 | ) |  |

Extract bit-field (width bits starting at bit 0) from src and insert it in trg at pos.

Definition at line 390 of file IfxCpu_IntrinsicsGhs.h.


iLLD_TC38A: Interrupt Handling

Interrupt Handling
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Interrupt Handling:

The next table provides an overview of the intrinsic functions to read or set interrupt handling.


iLLD_TC38A: Miscellaneous Intrinsic Functions

Functions
Miscellaneous Intrinsic Functions
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Miscellaneous Intrinsic Functions:

Functions

IFX_INLINE void | Ifx__cacheawi (uint8 *p)
IFX_INLINE void | Ifx__cacheiwi (uint8 *p)
IFX_INLINE uint8 * | Ifx__cacheawi_bo_post_inc (uint8 *p)
IFX_INLINE sint32 | Ifx__mulsc (sint32 a, sint32 b, sint32 offset)
IFX_INLINE uint32 | Ifx__rol (uint32 operand, uint32 count)
IFX_INLINE uint32 | Ifx__ror (uint32 operand, uint32 count)

Detailed Description

Function Documentation

◆ Ifx__cacheawi()

IFX_INLINE void Ifx__cacheawi ( uint8 * p )

Write back and invalidate cache address "p". Generates CACHEA.WI [Ab].

Definition at line 421 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__cacheawi_bo_post_inc()

IFX_INLINE uint8* Ifx__cacheawi_bo_post_inc ( uint8 * p )

Write back and invalidate cache address "p" and return post incremented value of "p". Generates CACHEA.WI [Ab+].

Definition at line 435 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__cacheiwi()

IFX_INLINE void Ifx__cacheiwi ( uint8 * p )

Write back and invalidate cache index "p". Generates CACHEI.WI [Ab].

Definition at line 427 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__mulsc()

IFX_INLINE sint32 Ifx__mulsc | ( | sint32 | a,
 |  | sint32 | b,
 |  | sint32 | offset
 | ) |  |

Multiply two 32-bit numbers to an intermediate 64-bit result, and scale back the result to 32 bits. To scale back the result, 32 bits are extracted from the intermediate 64-bit result: bit 63-offset to bit 31-offset.

Definition at line 445 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__rol()

IFX_INLINE uint32 Ifx__rol | ( | uint32 | operand,
 |  | uint32 | count
 | ) |  |

Rotate operand left count times. The bits that are shifted out are inserted at the right side (bit 31 is shifted to bit 0).

Definition at line 456 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__ror()

IFX_INLINE uint32 Ifx__ror | ( | uint32 | operand,
 |  | uint32 | count
 | ) |  |

Rotate operand right count times. The bits that are shifted out are inserted at the left side (bit 0 is shifted to bit 31).

Definition at line 465 of file IfxCpu_IntrinsicsGhs.h.


iLLD_TC38A: Packed Data Type Support

Functions
Packed Data Type Support
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Packed Data Type Support:

Functions

IFX_INLINE sint8 | Ifx__extractbyte1 (__packb a)
IFX_INLINE sint8 | Ifx__extractbyte2 (__packb a)
IFX_INLINE sint8 | Ifx__extractbyte3 (__packb a)
IFX_INLINE sint8 | Ifx__extractbyte4 (__packb a)
IFX_INLINE sint16 | Ifx__extracthw1 (__packhw a)
IFX_INLINE sint16 | Ifx__extracthw2 (__packhw a)
IFX_INLINE uint8 | Ifx__extractubyte1 (__upackb a)
IFX_INLINE uint8 | Ifx__extractubyte2 (__upackb a)
IFX_INLINE uint8 | Ifx__extractubyte3 (__upackb a)
IFX_INLINE uint8 | Ifx__extractubyte4 (__upackb a)
IFX_INLINE uint16 | Ifx__extractuhw1 (__upackhw a)
IFX_INLINE uint16 | Ifx__extractuhw2 (__upackhw a)
IFX_INLINE sint8 | Ifx__getbyte1 (__packb *a)
IFX_INLINE sint8 | Ifx__getbyte2 (__packb *a)
IFX_INLINE sint8 | Ifx__getbyte3 (__packb *a)
IFX_INLINE sint8 | Ifx__getbyte4 (__packb *a)
IFX_INLINE sint16 | Ifx__gethw1 (__packhw *a)
IFX_INLINE sint16 | Ifx__gethw2 (__packhw *a)
IFX_INLINE uint8 | Ifx__getubyte1 (__upackb *a)
IFX_INLINE uint8 | Ifx__getubyte2 (__upackb *a)
IFX_INLINE uint8 | Ifx__getubyte3 (__upackb *a)
IFX_INLINE uint8 | Ifx__getubyte4 (__upackb *a)
IFX_INLINE uint16 | Ifx__getuhw1 (__upackhw *a)
IFX_INLINE uint16 | Ifx__getuhw2 (__upackhw *a)
IFX_INLINE __packb | Ifx__initpackb (sint32 a, sint32 b, sint32 c, sint32 d)
IFX_INLINE __packb | Ifx__initpackbl (long a)
IFX_INLINE __packhw | Ifx__initpackhw (sint16 a, sint16 b)
IFX_INLINE __packhw | Ifx__initpackhwl (long a)
IFX_INLINE __upackb | Ifx__initupackb (uint32 a, uint32 b, uint32 c, uint32 d)
IFX_INLINE __upackhw | Ifx__initupackhw (uint16 a, uint16 b)
IFX_INLINE __packb | Ifx__insertbyte1 (__packb a, sint8 b)
IFX_INLINE __packb | Ifx__insertbyte2 (__packb a, sint8 b)
IFX_INLINE __packb | Ifx__insertbyte3 (__packb a, sint8 b)
IFX_INLINE __packb | Ifx__insertbyte4 (__packb a, sint8 b)
IFX_INLINE __upackb | Ifx__insertubyte1 (__upackb a, uint8 b)
IFX_INLINE __upackb | Ifx__insertubyte2 (__upackb a, uint8 b)
IFX_INLINE __upackb | Ifx__insertubyte3 (__upackb a, uint8 b)
IFX_INLINE __upackb | Ifx__insertubyte4 (__upackb a, uint8 b)
IFX_INLINE __packhw | Ifx__inserthw1 (__packhw a, sint16 b)
IFX_INLINE __packhw | Ifx__inserthw2 (__packhw a, sint16 b)
IFX_INLINE __upackhw | Ifx__insertuhw1 (__upackhw a, uint16 b)
IFX_INLINE __upackhw | Ifx__insertuhw2 (__upackhw a, uint16 b)
IFX_INLINE void | Ifx__setbyte1 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__setbyte2 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__setbyte3 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__setbyte4 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__sethw1 (__packhw *a, sint16 b)
IFX_INLINE void | Ifx__sethw2 (__packhw *a, sint16 b)
IFX_INLINE void | Ifx__setubyte1 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setubyte2 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setubyte3 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setubyte4 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setuhw1 (__upackhw *a, uint16 b)
IFX_INLINE void | Ifx__setuhw2 (__upackhw *a, uint16 b)

Detailed Description

The next table provides an overview of the intrinsic functions for initialization of packed data type.

Function Documentation

◆ Ifx__extractbyte1()

IFX_INLINE sint8 Ifx__extractbyte1 ( __packb a )

Extract first byte from a __packb

Definition at line 483 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__extractbyte2()

IFX_INLINE sint8 Ifx__extractbyte2 ( __packb a )

Extract second byte from a __packb

Definition at line 493 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__extractbyte3()

IFX_INLINE sint8 Ifx__extractbyte3 ( __packb a )

Extract third byte from a __packb

Definition at line 503 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__extractbyte4()

IFX_INLINE sint8 Ifx__extractbyte4 ( __packb a )

Extract fourth byte from a __packb

Definition at line 513 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__extracthw1()

IFX_INLINE sint16 Ifx__extracthw1 ( __packhw a )

Extract first sint16 from a __packhw

Definition at line 523 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__extracthw2()

IFX_INLINE sint16 Ifx__extracthw2 ( __packhw a )

Extract second sint16 from a __packhw

Definition at line 533 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__extractubyte1()

IFX_INLINE uint8 Ifx__extractubyte1 ( __upackb a )

Extract first uint8 from a __packb

Definition at line 543 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__extractubyte2()

IFX_INLINE uint8 Ifx__extractubyte2 ( __upackb a )

Extract second uint8 from a __packb

Definition at line 553 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__extractubyte3()

IFX_INLINE uint8 Ifx__extractubyte3 ( __upackb a )

Extract third uint8 from a __packb

Definition at line 563 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__extractubyte4()

IFX_INLINE uint8 Ifx__extractubyte4 ( __upackb a )

Extract fourth uint8 from a __packb

Definition at line 573 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__extractuhw1()

IFX_INLINE uint16 Ifx__extractuhw1 ( __upackhw a )

Extract first uint16 from a __packhw

Definition at line 583 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__extractuhw2()

IFX_INLINE uint16 Ifx__extractuhw2 ( __upackhw a )

Extract second uint16 from a __packhw

Definition at line 593 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__getbyte1()

IFX_INLINE sint8 Ifx__getbyte1 ( __packb * a )

Extract first byte from a __packb

Definition at line 603 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__getbyte2()

IFX_INLINE sint8 Ifx__getbyte2 ( __packb * a )

Extract second byte from a __packb

Definition at line 615 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__getbyte3()

IFX_INLINE sint8 Ifx__getbyte3 ( __packb * a )

Extract third byte from a __packb

Definition at line 627 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__getbyte4()

IFX_INLINE sint8 Ifx__getbyte4 ( __packb * a )

Extract fourth byte from a __packb

Definition at line 639 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__gethw1()

IFX_INLINE sint16 Ifx__gethw1 ( __packhw * a )

Extract first sint16 from a __packhw

Definition at line 651 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__gethw2()

IFX_INLINE sint16 Ifx__gethw2 ( __packhw * a )

Extract second sint16 from a __packhw

Definition at line 661 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__getubyte1()

IFX_INLINE uint8 Ifx__getubyte1 ( __upackb * a )

Extract first uint8 from a __packb

Definition at line 672 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__getubyte2()

IFX_INLINE uint8 Ifx__getubyte2 ( __upackb * a )

Extract second uint8 from a __packb

Definition at line 683 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__getubyte3()

IFX_INLINE uint8 Ifx__getubyte3 ( __upackb * a )

Extract third uint8 from a __packb

Definition at line 694 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__getubyte4()

IFX_INLINE uint8 Ifx__getubyte4 ( __upackb * a )

Extract fourth uint8 from a __packb

Definition at line 705 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__getuhw1()

IFX_INLINE uint16 Ifx__getuhw1 ( __upackhw * a )

Extract first uint16 from a __packhw

Definition at line 716 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__getuhw2()

IFX_INLINE uint16 Ifx__getuhw2 ( __upackhw * a )

Extract second uint16 from a __packhw

Definition at line 727 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__initpackb()

IFX_INLINE __packb Ifx__initpackb | ( | sint32 | a,
 |  | sint32 | b,
 |  | sint32 | c,
 |  | sint32 | d
 | ) |  |

Initialize __packb with four integers

Definition at line 738 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__initpackbl()

IFX_INLINE __packb Ifx__initpackbl ( long a )

Initialize __packb with a long integer

Definition at line 750 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__initpackhw()

IFX_INLINE __packhw Ifx__initpackhw | ( | sint16 | a,
 |  | sint16 | b
 | ) |  |

Initialize __packhw with two integers

Definition at line 757 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__initpackhwl()

IFX_INLINE __packhw Ifx__initpackhwl ( long a )

Initialize __packhw with a long integer

Definition at line 767 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__initupackb()

IFX_INLINE __upackb Ifx__initupackb | ( | uint32 | a,
 |  | uint32 | b,
 |  | uint32 | c,
 |  | uint32 | d
 | ) |  |

Initialize __packb with four unsigned integers

Definition at line 774 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__initupackhw()

IFX_INLINE __upackhw Ifx__initupackhw | ( | uint16 | a,
 |  | uint16 | b
 | ) |  |

Initialize __packhw with two unsigned integers

Definition at line 786 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__insertbyte1()

IFX_INLINE __packb Ifx__insertbyte1 | ( | __packb | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into first byte of a __packb

Definition at line 796 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__insertbyte2()

IFX_INLINE __packb Ifx__insertbyte2 | ( | __packb | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into second byte of a __packb

Definition at line 806 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__insertbyte3()

IFX_INLINE __packb Ifx__insertbyte3 | ( | __packb | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into third byte of a __packb

Definition at line 816 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__insertbyte4()

IFX_INLINE __packb Ifx__insertbyte4 | ( | __packb | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into fourth byte of a __packb

Definition at line 826 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__inserthw1()

IFX_INLINE __packhw Ifx__inserthw1 | ( | __packhw | a,
 |  | sint16 | b
 | ) |  |

Insert sint16 into first halfword of a __packhw

Definition at line 876 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__inserthw2()

IFX_INLINE __packhw Ifx__inserthw2 | ( | __packhw | a,
 |  | sint16 | b
 | ) |  |

Insert sint16 into second halfword of a __packhw

Definition at line 886 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__insertubyte1()

IFX_INLINE __upackb Ifx__insertubyte1 | ( | __upackb | a,
 |  | uint8 | b
 | ) |  |

Insert sint8 into first uint8 of a __packb

Definition at line 836 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__insertubyte2()

IFX_INLINE __upackb Ifx__insertubyte2 | ( | __upackb | a,
 |  | uint8 | b
 | ) |  |

Insert sint8 into second uint8 of a __packb

Definition at line 846 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__insertubyte3()

IFX_INLINE __upackb Ifx__insertubyte3 | ( | __upackb | a,
 |  | uint8 | b
 | ) |  |

Insert sint8 into third uint8 of a __packb

Definition at line 856 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__insertubyte4()

IFX_INLINE __upackb Ifx__insertubyte4 | ( | __upackb | a,
 |  | uint8 | b
 | ) |  |

Insert sint8 into fourth uint8 of a __packb

Definition at line 866 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__insertuhw1()

IFX_INLINE __upackhw Ifx__insertuhw1 | ( | __upackhw | a,
 |  | uint16 | b
 | ) |  |

Insert uint16 into first halfword of a __upackhw

Definition at line 896 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__insertuhw2()

IFX_INLINE __upackhw Ifx__insertuhw2 | ( | __upackhw | a,
 |  | uint16 | b
 | ) |  |

Insert uint16 into second halfword of a __upackhw

Definition at line 906 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__setbyte1()

IFX_INLINE void Ifx__setbyte1 | ( | __packb * | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into first byte of a __packb

Definition at line 916 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__setbyte2()

IFX_INLINE void Ifx__setbyte2 | ( | __packb * | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into second byte of a __packb

Definition at line 926 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__setbyte3()

IFX_INLINE void Ifx__setbyte3 | ( | __packb * | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into third byte of a __packb

Definition at line 936 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__setbyte4()

IFX_INLINE void Ifx__setbyte4 | ( | __packb * | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into fourth byte of a __packb

Definition at line 946 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__sethw1()

IFX_INLINE void Ifx__sethw1 | ( | __packhw * | a,
 |  | sint16 | b
 | ) |  |

Insert sint16 into first halfword of a __packhw

Definition at line 956 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__sethw2()

IFX_INLINE void Ifx__sethw2 | ( | __packhw * | a,
 |  | sint16 | b
 | ) |  |

Insert sint16 into second halfword of a __packhw

Definition at line 966 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__setubyte1()

IFX_INLINE void Ifx__setubyte1 | ( | __upackb * | a,
 |  | uint8 | b
 | ) |  |

Insert uint8 into first byte of a __upackb

Definition at line 976 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__setubyte2()

IFX_INLINE void Ifx__setubyte2 | ( | __upackb * | a,
 |  | uint8 | b
 | ) |  |

Insert uint8 into second byte of a __upackb

Definition at line 986 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__setubyte3()

IFX_INLINE void Ifx__setubyte3 | ( | __upackb * | a,
 |  | uint8 | b
 | ) |  |

Insert uint8 into third byte of a __upackb

Definition at line 996 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__setubyte4()

IFX_INLINE void Ifx__setubyte4 | ( | __upackb * | a,
 |  | uint8 | b
 | ) |  |

Insert uint8 into fourth byte of a __upackb

Definition at line 1006 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__setuhw1()

IFX_INLINE void Ifx__setuhw1 | ( | __upackhw * | a,
 |  | uint16 | b
 | ) |  |

Insert uint16 into first halfword of a __upackhw

Definition at line 1016 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__setuhw2()

IFX_INLINE void Ifx__setuhw2 | ( | __upackhw * | a,
 |  | uint16 | b
 | ) |  |

Insert uint16 into second halfword of a __upackhw

Definition at line 1026 of file IfxCpu_IntrinsicsGhs.h.


iLLD_TC38A: Insert Single Assembly Instruction

Macros | Functions
Insert Single Assembly Instruction
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Insert Single Assembly Instruction:

Macros

#define Ifx__NOP(n) __asm(".rept " #n "\n\tnop\n\t.endr\n")

Functions

IFX_INLINE void | Ifx__ldmst (volatile void *address, uint32 mask, uint32 value)
IFX_INLINE void | Ifx__nops (void *cnt)
IFX_INLINE uint32 | Ifx__swap (void *place, uint32 value)

Detailed Description

The next table provides an overview of the intrinsic functions that you can use to insert a single assembly instruction.You can also use inline assembly but these intrinsics provide a shorthand for frequently used assembly instructions.

Macro Definition Documentation

◆ Ifx__NOP

#define Ifx__NOP ( n ) __asm(".rept " #n "\n\tnop\n\t.endr\n")

Insert n NOP instruction

Definition at line 1072 of file IfxCpu_IntrinsicsGhs.h.

Function Documentation

◆ Ifx__ldmst()

IFX_INLINE void Ifx__ldmst | ( | volatile void * | address,
 |  | uint32 | mask,
 |  | uint32 | value
 | ) |  |

Insert LDMST instruction. Note that all operands must be word-aligned.

Definition at line 1046 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__nops()

IFX_INLINE void Ifx__nops ( void * cnt )

Insert a loop over cnt NOP instruction

Definition at line 1054 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__swap()

IFX_INLINE uint32 Ifx__swap | ( | void * | place,
 |  | uint32 | value
 | ) |  |

Insert SWAP instruction. Note that all operands must be word-aligned.

Definition at line 1063 of file IfxCpu_IntrinsicsGhs.h.


iLLD_TC38A: Intrinsics for GNU compiler

Modules
Intrinsics for GNU compiler
iLLD » CPU » Standard Driver » Intrinsics
Collaboration diagram for Intrinsics for GNU compiler:

Modules

Cross type arithmetic operation
Signed integer operation
Unsigned integer operation
Minimum and Maximum of (sint16) Integers
Floating point operation
Fractional Arithmetic Support
Insert / Extract Bit-fields and Bits
Interrupt Handling
Miscellaneous Intrinsic Functions
Packed Data Type Support
Register Handling
Saturation Arithmetic Support
Insert Single Assembly Instruction

Detailed Description


iLLD_TC38A: Cross type arithmetic operation

Macros
Cross type arithmetic operation
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Cross type arithmetic operation:

Macros

#define | Ifx__minX(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxX(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturateX(X, Min, Max) ( Ifx__minX(Ifx__maxX(X, Min), Max) )
#define | Ifx__checkrangeX(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))

Detailed Description

Macro compatible with float, fix point, signed integer and unsigned integer

Macro Definition Documentation

◆ Ifx__checkrangeX

#define Ifx__checkrangeX | ( | X,
 |  | Min,
 |  | Max
 | ) | (((X) >= (Min)) && ((X) <= (Max)))

Definition at line 123 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__maxX

#define Ifx__maxX | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) ? (X) : (Y) )

Definition at line 121 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__minX

#define Ifx__minX | ( | X,
 |  | Y
 | ) | ( ((X) < (Y)) ? (X) : (Y) )

Definition at line 120 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__saturateX

#define Ifx__saturateX | ( | X,
 |  | Min,
 |  | Max
 | ) | ( Ifx__minX(Ifx__maxX(X, Min), Max) )

Definition at line 122 of file IfxCpu_IntrinsicsGnuc.h.


iLLD_TC38A: Signed integer operation

Macros
Signed integer operation
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Signed integer operation:

Macros

#define Ifx__saturate(X, Min, Max) ( Ifx__min(Ifx__max(X, Min), Max) )

Detailed Description

Macro Definition Documentation

◆ Ifx__saturate

#define Ifx__saturate | ( | X,
 |  | Min,
 |  | Max
 | ) | ( Ifx__min(Ifx__max(X, Min), Max) )

Definition at line 130 of file IfxCpu_IntrinsicsGnuc.h.


iLLD_TC38A: Unsigned integer operation

Macros
Unsigned integer operation
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Unsigned integer operation:

Macros

#define Ifx__saturateu(X, Min, Max) ( Ifx__minu(Ifx__maxu(X, Min), Max) )

Detailed Description

Macro Definition Documentation

◆ Ifx__saturateu

#define Ifx__saturateu | ( | X,
 |  | Min,
 |  | Max
 | ) | ( Ifx__minu(Ifx__maxu(X, Min), Max) )

Definition at line 137 of file IfxCpu_IntrinsicsGnuc.h.


iLLD_TC38A: Minimum and Maximum of (sint16) Integers

Functions
Minimum and Maximum of (sint16) Integers
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Minimum and Maximum of (sint16) Integers:

Functions

IFX_INLINE sint32 | Ifx__max (sint32 a, sint32 b)
IFX_INLINE sint32 | Ifx__maxs (sint16 a, sint16 b)
IFX_INLINE uint32 | Ifx__maxu (uint32 a, uint32 b)
IFX_INLINE sint32 | Ifx__min (sint32 a, sint32 b)
IFX_INLINE sint16 | Ifx__mins (sint16 a, sint16 b)
IFX_INLINE uint32 | Ifx__minu (uint32 a, uint32 b)

Detailed Description

These intrinsic functions return the minimum or maximum of a sint16, uint16 or sint16

Function Documentation

◆ Ifx__max()

IFX_INLINE sint32 Ifx__max | ( | sint32 | a,
 |  | sint32 | b
 | ) |  |

Return maximum of two integers

Definition at line 148 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__maxs()

IFX_INLINE sint32 Ifx__maxs | ( | sint16 | a,
 |  | sint16 | b
 | ) |  |

Return maximum of two sint16

Definition at line 157 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__maxu()

IFX_INLINE uint32 Ifx__maxu | ( | uint32 | a,
 |  | uint32 | b
 | ) |  |

Return maximum of two unsigned integers

Definition at line 165 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__min()

IFX_INLINE sint32 Ifx__min | ( | sint32 | a,
 |  | sint32 | b
 | ) |  |

Return minimum of two integers

Definition at line 174 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__mins()

IFX_INLINE sint16 Ifx__mins | ( | sint16 | a,
 |  | sint16 | b
 | ) |  |

Return minimum of two sint16

Definition at line 183 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__minu()

IFX_INLINE uint32 Ifx__minu | ( | uint32 | a,
 |  | uint32 | b
 | ) |  |

Return minimum of two unsigned integers

Definition at line 192 of file IfxCpu_IntrinsicsGnuc.h.


iLLD_TC38A: Floating point operation

Macros
Floating point operation
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Floating point operation:

Macros

#define | Ifx__sqrf(X) ((X) * (X))
#define | Ifx__sqrtf(X) sqrtf(X)
#define | Ifx__checkrange(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__roundf(X) ((((X) - (sint32)(X)) > 0.5) ? (1 + (sint32)(X)) : ((sint32)(X)))
#define | Ifx__absf(X) ( ((X) < 0.0) ? -(X) : (X) )
#define | Ifx__minf(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxf(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturatef(X, Min, Max) ( Ifx__minf(Ifx__maxf(X, Min), Max) )
#define | Ifx__checkrangef(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__abs_stdreal(X) ( ((X) > 0.0) ? (X) : -(X) )
#define | Ifx__min_stdreal(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__max_stdreal(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturate_stdreal(X, Min, Max) ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )
#define | Ifx__neqf(X, Y) ( ((X) > (Y)) || ((X) < (Y)) )
#define | Ifx__leqf(X, Y) ( !((X) > (Y)) )
#define | Ifx__geqf(X, Y) ( !((X) < (Y)) )

Detailed Description

Macro Definition Documentation

◆ Ifx__abs_stdreal

#define Ifx__abs_stdreal ( X ) ( ((X) > 0.0) ? (X) : -(X) )

Definition at line 217 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__absf

#define Ifx__absf ( X ) ( ((X) < 0.0) ? -(X) : (X) )

Definition at line 211 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__checkrange

#define Ifx__checkrange | ( | X,
 |  | Min,
 |  | Max
 | ) | (((X) >= (Min)) && ((X) <= (Max)))

Definition at line 208 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__checkrangef

#define Ifx__checkrangef | ( | X,
 |  | Min,
 |  | Max
 | ) | (((X) >= (Min)) && ((X) <= (Max)))

Definition at line 215 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__geqf

#define Ifx__geqf | ( | X,
 |  | Y
 | ) | ( !((X) < (Y)) )

X >= Y

Definition at line 224 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__leqf

#define Ifx__leqf | ( | X,
 |  | Y
 | ) | ( !((X) > (Y)) )

X <= Y

Definition at line 223 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__max_stdreal

#define Ifx__max_stdreal | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) ? (X) : (Y) )

Definition at line 219 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__maxf

#define Ifx__maxf | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) ? (X) : (Y) )

Definition at line 213 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__min_stdreal

#define Ifx__min_stdreal | ( | X,
 |  | Y
 | ) | ( ((X) < (Y)) ? (X) : (Y) )

Definition at line 218 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__minf

#define Ifx__minf | ( | X,
 |  | Y
 | ) | ( ((X) < (Y)) ? (X) : (Y) )

Definition at line 212 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__neqf

#define Ifx__neqf | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) || ((X) < (Y)) )

X != Y

Definition at line 222 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__roundf

#define Ifx__roundf ( X ) ((((X) - (sint32)(X)) > 0.5) ? (1 + (sint32)(X)) : ((sint32)(X)))

Definition at line 210 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__saturate_stdreal

#define Ifx__saturate_stdreal | ( | X,
 |  | Min,
 |  | Max
 | ) | ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )

Definition at line 220 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__saturatef

#define Ifx__saturatef | ( | X,
 |  | Min,
 |  | Max
 | ) | ( Ifx__minf(Ifx__maxf(X, Min), Max) )

Definition at line 214 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__sqrf

#define Ifx__sqrf ( X ) ((X) * (X))

Definition at line 206 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__sqrtf

#define Ifx__sqrtf ( X ) sqrtf(X)

Definition at line 207 of file IfxCpu_IntrinsicsGnuc.h.


iLLD_TC38A: Fractional Arithmetic Support

Functions
Fractional Arithmetic Support
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Fractional Arithmetic Support:

Functions

IFX_INLINE sint16 | Ifx__clssf (sfract a)
IFX_INLINE float | Ifx__fract_to_float (fract a)
IFX_INLINE fract | Ifx__float_to_fract (float a)
IFX_INLINE sfract | Ifx__fract_to_sfract (fract a)
IFX_INLINE sfract | Ifx__float_to_sfract (float a)
IFX_INLINE fract | Ifx__getfract (laccum a)
IFX_INLINE sfract | Ifx__mac_r_sf (sfract a, sfract b, sfract c)
IFX_INLINE sfract | Ifx__mac_sf (sfract a, sfract b, sfract c)
IFX_INLINE long | Ifx__mulfractfract (fract a, fract b)
IFX_INLINE long | Ifx__mulfractlong (fract a, long b)
IFX_INLINE sfract | Ifx__round16 (fract a)
IFX_INLINE sfract | Ifx__s16_to_sfract (sint16 a)
IFX_INLINE sint16 | Ifx__sfract_to_s16 (sfract a)
IFX_INLINE uint16 | Ifx__sfract_to_u16 (sfract a)
IFX_INLINE laccum | Ifx__shaaccum (laccum a, sint32 b)
IFX_INLINE fract | Ifx__shafracts (fract a, sint32 b)
IFX_INLINE sfract | Ifx__shasfracts (sfract a, sint32 b)
IFX_INLINE sfract | Ifx__u16_to_sfract (uint16 a)

Detailed Description

The next table provides an overview of intrinsic functions to convert fractional values. Note that the TASKING VX-toolset C compiler for TriCore fully supports the fractional type so normally you should not need these intrinsic functions (except for __mulfractlong). For compatibility reasons the TASKING C compiler does support these functions.

Function Documentation

◆ Ifx__clssf()

IFX_INLINE sint16 Ifx__clssf ( sfract a )

Count the consecutive number of bits that have the same value as bit 15 of an sfract

Definition at line 238 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__float_to_fract()

IFX_INLINE fract Ifx__float_to_fract ( float a )

Convert float to fract

Definition at line 257 of file IfxCpu_IntrinsicsGnuc.h.

Referenced by Ifx__float_to_sfract().

◆ Ifx__float_to_sfract()

IFX_INLINE sfract Ifx__float_to_sfract ( float a )

Convert float to sfract

Definition at line 278 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__fract_to_float()

IFX_INLINE float Ifx__fract_to_float ( fract a )

Convert fract to float

Definition at line 248 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__fract_to_sfract()

IFX_INLINE sfract Ifx__fract_to_sfract ( fract a )

Convert fract to sfract

Definition at line 266 of file IfxCpu_IntrinsicsGnuc.h.

Referenced by Ifx__float_to_sfract().

◆ Ifx__getfract()

IFX_INLINE fract Ifx__getfract ( laccum a )

Convert laccum to fract

Definition at line 286 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__mac_r_sf()

IFX_INLINE sfract Ifx__mac_r_sf | ( | sfract | a,
 |  | sfract | b,
 |  | sfract | c
 | ) |  |

Multiply-add with rounding. Returns the rounded result of ( a + b * c )

Definition at line 295 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__mac_sf()

IFX_INLINE sfract Ifx__mac_sf | ( | sfract | a,
 |  | sfract | b,
 |  | sfract | c
 | ) |  |

Multiply-add sfract. Returns ( a + b * c )

Definition at line 306 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__mulfractfract()

IFX_INLINE long Ifx__mulfractfract | ( | fract | a,
 |  | fract | b
 | ) |  |

Integer part of the multiplication of a fract and a fract

Definition at line 317 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__mulfractlong()

IFX_INLINE long Ifx__mulfractlong | ( | fract | a,
 |  | long | b
 | ) |  |

Integer part of the multiplication of a fract and a long

Definition at line 326 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__round16()

IFX_INLINE sfract Ifx__round16 ( fract a )

Convert fract to sfract

Definition at line 335 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__s16_to_sfract()

IFX_INLINE sfract Ifx__s16_to_sfract ( sint16 a )

Convert signed sint16 to sfract

Definition at line 348 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__sfract_to_s16()

IFX_INLINE sint16 Ifx__sfract_to_s16 ( sfract a )

Convert sfract to sint16

Definition at line 358 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__sfract_to_u16()

IFX_INLINE uint16 Ifx__sfract_to_u16 ( sfract a )

Convert sfract to uint16

Definition at line 368 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__shaaccum()

IFX_INLINE laccum Ifx__shaaccum | ( | laccum | a,
 |  | sint32 | b
 | ) |  |

Left/right shift of an laccum

Definition at line 378 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__shafracts()

IFX_INLINE fract Ifx__shafracts | ( | fract | a,
 |  | sint32 | b
 | ) |  |

Left/right shift of an fract

Definition at line 395 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__shasfracts()

IFX_INLINE sfract Ifx__shasfracts | ( | sfract | a,
 |  | sint32 | b
 | ) |  |

Left/right shift of an sfract

Definition at line 404 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__u16_to_sfract()

IFX_INLINE sfract Ifx__u16_to_sfract ( uint16 a )

Convert uint16 to sfract

Definition at line 413 of file IfxCpu_IntrinsicsGnuc.h.


iLLD_TC38A: Insert / Extract Bit-fields and Bits

Macros | Functions
Insert / Extract Bit-fields and Bits
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Insert / Extract Bit-fields and Bits:

Macros

#define | Ifx__getbit(address, bitoffset) ((*(address) & (1U << (bitoffset))) != 0)
#define | Ifx__imaskldmst(address, value, bitoffset, bits)
#define | Ifx__putbit(value, address, bitoffset) Ifx__imaskldmst(address, value, bitoffset,1)

Functions

IFX_INLINE sint32 | Ifx__extr (sint32 a, uint32 p, uint32 w)
IFX_INLINE uint32 | Ifx__extru (uint32 a, uint32 p, uint32 w)
IFX_INLINE sint32 | Ifx__ins (sint32 trg, const sint32 trgbit, sint32 src, const sint32 srcbit)
IFX_INLINE sint32 | Ifx__insert (sint32 a, sint32 b, sint32 p, const sint32 w)
IFX_INLINE sint32 | Ifx__insn (sint32 trg, const sint32 trgbit, sint32 src, const sint32 srcbit)

Detailed Description

Macro Definition Documentation

◆ Ifx__getbit

#define Ifx__getbit | ( | address,
 |  | bitoffset
 | ) | ((*(address) & (1U << (bitoffset))) != 0)

Load a single bit.

Definition at line 455 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__imaskldmst

#define Ifx__imaskldmst | ( | address,
 |  | value,
 |  | bitoffset,
 |  | bits
 | ) |
Value:
{long long tmp;\
__asm__("imask %A0,%1,%2,%3"\
:"=d"((long long)tmp)\
:"d"(value),"d"(bitoffset),"i"(bits): "memory");\
__asm__("ldmst [%0]0,%A1"::"a"(address),"d"(tmp): "memory");}

Atomic load-modify-store.

Definition at line 459 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__putbit

#define Ifx__putbit | ( | value,
 |  | address,
 |  | bitoffset
 | ) | Ifx__imaskldmst(address, value, bitoffset,1)

Store a single bit.

Definition at line 498 of file IfxCpu_IntrinsicsGnuc.h.

Function Documentation

◆ Ifx__extr()

IFX_INLINE sint32 Ifx__extr | ( | sint32 | a,
 |  | uint32 | p,
 |  | uint32 | w
 | ) |  |

Extract a bit-field (bit pos to bit pos+width) from value

Definition at line 430 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__extru()

IFX_INLINE uint32 Ifx__extru | ( | uint32 | a,
 |  | uint32 | p,
 |  | uint32 | w
 | ) |  |

Same as __extr() but return bit-field as unsigned integer

Definition at line 442 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__ins()

IFX_INLINE sint32 Ifx__ins | ( | sint32 | trg,
 |  | const sint32 | trgbit,
 |  | sint32 | src,
 |  | const sint32 | srcbit
 | ) |  |

Return trg but replace trgbit by srcbit in src.

Definition at line 468 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__insert()

IFX_INLINE sint32 Ifx__insert | ( | sint32 | a,
 |  | sint32 | b,
 |  | sint32 | p,
 |  | const sint32 | w
 | ) |  |

Extract bit-field (width bits starting at bit 0) from src and insert it in trg at pos.

Definition at line 477 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__insn()

IFX_INLINE sint32 Ifx__insn | ( | sint32 | trg,
 |  | const sint32 | trgbit,
 |  | sint32 | src,
 |  | const sint32 | srcbit
 | ) |  |

Return trg but replace trgbit by inverse of srcbit in src.

Definition at line 489 of file IfxCpu_IntrinsicsGnuc.h.


iLLD_TC38A: Interrupt Handling

Macros | Functions
Interrupt Handling
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Interrupt Handling:

Macros

#define | Ifx__disable() __asm__ volatile ("disable" : : : "memory")
#define | Ifx__enable() __asm__ volatile ("enable" : : : "memory")

Functions

IFX_INLINE sint32 | Ifx__disable_and_save (void)
IFX_INLINE void | Ifx__restore (sint32 ie)

Detailed Description

The next table provides an overview of the intrinsic functions to read or set interrupt handling.

Macro Definition Documentation

◆ Ifx__disable

#define Ifx__disable ( ) __asm__ volatile ("disable" : : : "memory")

Disable interrupts. Only supported for TriCore1

Definition at line 516 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__enable

#define Ifx__enable ( ) __asm__ volatile ("enable" : : : "memory")

Enable interrupts immediately at function entry

Definition at line 529 of file IfxCpu_IntrinsicsGnuc.h.

Function Documentation

◆ Ifx__disable_and_save()

IFX_INLINE sint32 Ifx__disable_and_save ( void )

Disable interrupts and return previous interrupt state (enabled or disabled). Direct supported for TriCore1.6. Emulated on TC1.3.1

Definition at line 520 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__restore()

IFX_INLINE void Ifx__restore ( sint32 ie )

Restore interrupt state. Direct supported for TriCore1.6. Emulated on TC1.3.1

Definition at line 533 of file IfxCpu_IntrinsicsGnuc.h.


iLLD_TC38A: Miscellaneous Intrinsic Functions

Functions
Miscellaneous Intrinsic Functions
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Miscellaneous Intrinsic Functions:

Functions

IFX_INLINE void | Ifx__cacheawi (uint8 *p)
IFX_INLINE void | Ifx__cacheiwi (uint8 *p)
IFX_INLINE uint8 * | Ifx__cacheawi_bo_post_inc (uint8 *p)
IFX_INLINE sint32 | Ifx__mulsc (sint32 a, sint32 b, sint32 offset)
IFX_INLINE uint32 | Ifx__rol (uint32 operand, uint32 count)
IFX_INLINE uint32 | Ifx__ror (uint32 operand, uint32 count)

Detailed Description

Function Documentation

◆ Ifx__cacheawi()

IFX_INLINE void Ifx__cacheawi ( uint8 * p )

Write back and invalidate cache address "p". Generates CACHEA.WI [Ab].

Definition at line 554 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__cacheawi_bo_post_inc()

IFX_INLINE uint8* Ifx__cacheawi_bo_post_inc ( uint8 * p )

Write back and invalidate cache address "p" and return post incremented value of "p". Generates CACHEA.WI [Ab+].

Definition at line 568 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__cacheiwi()

IFX_INLINE void Ifx__cacheiwi ( uint8 * p )

Write back and invalidate cache index "p". Generates CACHEI.WI [Ab].

Definition at line 560 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__mulsc()

IFX_INLINE sint32 Ifx__mulsc | ( | sint32 | a,
 |  | sint32 | b,
 |  | sint32 | offset
 | ) |  |

Multiply two 32-bit numbers to an intermediate 64-bit result, and scale back the result to 32 bits. To scale back the result, 32 bits are extracted from the intermediate 64-bit result: bit 63-offset to bit 31-offset.

Definition at line 578 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__rol()

IFX_INLINE uint32 Ifx__rol | ( | uint32 | operand,
 |  | uint32 | count
 | ) |  |

Rotate operand left count times. The bits that are shifted out are inserted at the right side (bit 31 is shifted to bit 0).

Definition at line 589 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__ror()

IFX_INLINE uint32 Ifx__ror | ( | uint32 | operand,
 |  | uint32 | count
 | ) |  |

Rotate operand right count times. The bits that are shifted out are inserted at the left side (bit 0 is shifted to bit 31).

Definition at line 598 of file IfxCpu_IntrinsicsGnuc.h.


iLLD_TC38A: Packed Data Type Support

Functions
Packed Data Type Support
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Packed Data Type Support:

Functions

IFX_INLINE __packb | Ifx__absb (__packb a)
IFX_INLINE __packhw | Ifx__absh (__packhw a)
IFX_INLINE __packhw | Ifx__abssh (__packhw a)
IFX_INLINE sint8 | Ifx__extractbyte1 (__packb a)
IFX_INLINE sint8 | Ifx__extractbyte2 (__packb a)
IFX_INLINE sint8 | Ifx__extractbyte3 (__packb a)
IFX_INLINE sint8 | Ifx__extractbyte4 (__packb a)
IFX_INLINE sint16 | Ifx__extracthw1 (__packhw a)
IFX_INLINE sint16 | Ifx__extracthw2 (__packhw a)
IFX_INLINE uint8 | Ifx__extractubyte1 (__upackb a)
IFX_INLINE uint8 | Ifx__extractubyte2 (__upackb a)
IFX_INLINE uint8 | Ifx__extractubyte3 (__upackb a)
IFX_INLINE uint8 | Ifx__extractubyte4 (__upackb a)
IFX_INLINE uint16 | Ifx__extractuhw1 (__upackhw a)
IFX_INLINE uint16 | Ifx__extractuhw2 (__upackhw a)
IFX_INLINE sint8 | Ifx__getbyte1 (__packb *a)
IFX_INLINE sint8 | Ifx__getbyte2 (__packb *a)
IFX_INLINE sint8 | Ifx__getbyte3 (__packb *a)
IFX_INLINE sint8 | Ifx__getbyte4 (__packb *a)
IFX_INLINE sint16 | Ifx__gethw1 (__packhw *a)
IFX_INLINE sint16 | Ifx__gethw2 (__packhw *a)
IFX_INLINE uint8 | Ifx__getubyte1 (__upackb *a)
IFX_INLINE uint8 | Ifx__getubyte2 (__upackb *a)
IFX_INLINE uint8 | Ifx__getubyte3 (__upackb *a)
IFX_INLINE uint8 | Ifx__getubyte4 (__upackb *a)
IFX_INLINE uint16 | Ifx__getuhw1 (__upackhw *a)
IFX_INLINE uint16 | Ifx__getuhw2 (__upackhw *a)
IFX_INLINE __packb | Ifx__initpackb (sint32 a, sint32 b, sint32 c, sint32 d)
IFX_INLINE __packb | Ifx__initpackbl (long a)
IFX_INLINE __packhw | Ifx__initpackhw (sint16 a, sint16 b)
IFX_INLINE __packhw | Ifx__initpackhwl (long a)
IFX_INLINE __upackb | Ifx__initupackb (uint32 a, uint32 b, uint32 c, uint32 d)
IFX_INLINE __upackhw | Ifx__initupackhw (uint16 a, uint16 b)
IFX_INLINE __packb | Ifx__insertbyte1 (__packb a, sint8 b)
IFX_INLINE __packb | Ifx__insertbyte2 (__packb a, sint8 b)
IFX_INLINE __packb | Ifx__insertbyte3 (__packb a, sint8 b)
IFX_INLINE __packb | Ifx__insertbyte4 (__packb a, sint8 b)
IFX_INLINE __upackb | Ifx__insertubyte1 (__upackb a, uint8 b)
IFX_INLINE __upackb | Ifx__insertubyte2 (__upackb a, uint8 b)
IFX_INLINE __upackb | Ifx__insertubyte3 (__upackb a, uint8 b)
IFX_INLINE __upackb | Ifx__insertubyte4 (__upackb a, uint8 b)
IFX_INLINE __packhw | Ifx__inserthw1 (__packhw a, sint16 b)
IFX_INLINE __packhw | Ifx__inserthw2 (__packhw a, sint16 b)
IFX_INLINE __upackhw | Ifx__insertuhw1 (__upackhw a, uint16 b)
IFX_INLINE __upackhw | Ifx__insertuhw2 (__upackhw a, uint16 b)
IFX_INLINE __packb | Ifx__minb (__packb a, __packb b)
IFX_INLINE __upackb | Ifx__minbu (__upackb a, __upackb b)
IFX_INLINE __packhw | Ifx__minh (__packhw a, __packhw b)
IFX_INLINE __upackhw | Ifx__minhu (__upackhw a, __upackhw b)
IFX_INLINE void | Ifx__setbyte1 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__setbyte2 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__setbyte3 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__setbyte4 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__sethw1 (__packhw *a, sint16 b)
IFX_INLINE void | Ifx__sethw2 (__packhw *a, sint16 b)
IFX_INLINE void | Ifx__setubyte1 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setubyte2 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setubyte3 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setubyte4 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setuhw1 (__upackhw *a, uint16 b)
IFX_INLINE void | Ifx__setuhw2 (__upackhw *a, uint16 b)

Detailed Description

The next table provides an overview of the intrinsic functions for initialization of packed data type.

Function Documentation

◆ Ifx__absb()

IFX_INLINE __packb Ifx__absb ( __packb a )

Absolute value of __packb

Definition at line 616 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__absh()

IFX_INLINE __packhw Ifx__absh ( __packhw a )

Absolute value of __packhw

Definition at line 626 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__abssh()

IFX_INLINE __packhw Ifx__abssh ( __packhw a )

Absolute value of __packhw using saturation

Definition at line 636 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__extractbyte1()

IFX_INLINE sint8 Ifx__extractbyte1 ( __packb a )

Extract first byte from a __packb

Definition at line 646 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__extractbyte2()

IFX_INLINE sint8 Ifx__extractbyte2 ( __packb a )

Extract second byte from a __packb

Definition at line 656 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__extractbyte3()

IFX_INLINE sint8 Ifx__extractbyte3 ( __packb a )

Extract third byte from a __packb

Definition at line 666 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__extractbyte4()

IFX_INLINE sint8 Ifx__extractbyte4 ( __packb a )

Extract fourth byte from a __packb

Definition at line 676 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__extracthw1()

IFX_INLINE sint16 Ifx__extracthw1 ( __packhw a )

Extract first sint16 from a __packhw

Definition at line 686 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__extracthw2()

IFX_INLINE sint16 Ifx__extracthw2 ( __packhw a )

Extract second sint16 from a __packhw

Definition at line 696 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__extractubyte1()

IFX_INLINE uint8 Ifx__extractubyte1 ( __upackb a )

Extract first uint8 from a __packb

Definition at line 706 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__extractubyte2()

IFX_INLINE uint8 Ifx__extractubyte2 ( __upackb a )

Extract second uint8 from a __packb

Definition at line 716 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__extractubyte3()

IFX_INLINE uint8 Ifx__extractubyte3 ( __upackb a )

Extract third uint8 from a __packb

Definition at line 726 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__extractubyte4()

IFX_INLINE uint8 Ifx__extractubyte4 ( __upackb a )

Extract fourth uint8 from a __packb

Definition at line 736 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__extractuhw1()

IFX_INLINE uint16 Ifx__extractuhw1 ( __upackhw a )

Extract first uint16 from a __packhw

Definition at line 746 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__extractuhw2()

IFX_INLINE uint16 Ifx__extractuhw2 ( __upackhw a )

Extract second uint16 from a __packhw

Definition at line 756 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__getbyte1()

IFX_INLINE sint8 Ifx__getbyte1 ( __packb * a )

Extract first byte from a __packb

Definition at line 766 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__getbyte2()

IFX_INLINE sint8 Ifx__getbyte2 ( __packb * a )

Extract second byte from a __packb

Definition at line 778 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__getbyte3()

IFX_INLINE sint8 Ifx__getbyte3 ( __packb * a )

Extract third byte from a __packb

Definition at line 790 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__getbyte4()

IFX_INLINE sint8 Ifx__getbyte4 ( __packb * a )

Extract fourth byte from a __packb

Definition at line 802 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__gethw1()

IFX_INLINE sint16 Ifx__gethw1 ( __packhw * a )

Extract first sint16 from a __packhw

Definition at line 814 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__gethw2()

IFX_INLINE sint16 Ifx__gethw2 ( __packhw * a )

Extract second sint16 from a __packhw

Definition at line 824 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__getubyte1()

IFX_INLINE uint8 Ifx__getubyte1 ( __upackb * a )

Extract first uint8 from a __packb

Definition at line 835 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__getubyte2()

IFX_INLINE uint8 Ifx__getubyte2 ( __upackb * a )

Extract second uint8 from a __packb

Definition at line 846 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__getubyte3()

IFX_INLINE uint8 Ifx__getubyte3 ( __upackb * a )

Extract third uint8 from a __packb

Definition at line 857 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__getubyte4()

IFX_INLINE uint8 Ifx__getubyte4 ( __upackb * a )

Extract fourth uint8 from a __packb

Definition at line 868 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__getuhw1()

IFX_INLINE uint16 Ifx__getuhw1 ( __upackhw * a )

Extract first uint16 from a __packhw

Definition at line 879 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__getuhw2()

IFX_INLINE uint16 Ifx__getuhw2 ( __upackhw * a )

Extract second uint16 from a __packhw

Definition at line 890 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__initpackb()

IFX_INLINE __packb Ifx__initpackb | ( | sint32 | a,
 |  | sint32 | b,
 |  | sint32 | c,
 |  | sint32 | d
 | ) |  |

Initialize __packb with four integers

Definition at line 901 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__initpackbl()

IFX_INLINE __packb Ifx__initpackbl ( long a )

Initialize __packb with a long integer

Definition at line 913 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__initpackhw()

IFX_INLINE __packhw Ifx__initpackhw | ( | sint16 | a,
 |  | sint16 | b
 | ) |  |

Initialize __packhw with two integers

Definition at line 920 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__initpackhwl()

IFX_INLINE __packhw Ifx__initpackhwl ( long a )

Initialize __packhw with a long integer

Definition at line 930 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__initupackb()

IFX_INLINE __upackb Ifx__initupackb | ( | uint32 | a,
 |  | uint32 | b,
 |  | uint32 | c,
 |  | uint32 | d
 | ) |  |

Initialize __packb with four unsigned integers

Definition at line 937 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__initupackhw()

IFX_INLINE __upackhw Ifx__initupackhw | ( | uint16 | a,
 |  | uint16 | b
 | ) |  |

Initialize __packhw with two unsigned integers

Definition at line 949 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__insertbyte1()

IFX_INLINE __packb Ifx__insertbyte1 | ( | __packb | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into first byte of a __packb

Definition at line 959 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__insertbyte2()

IFX_INLINE __packb Ifx__insertbyte2 | ( | __packb | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into second byte of a __packb

Definition at line 969 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__insertbyte3()

IFX_INLINE __packb Ifx__insertbyte3 | ( | __packb | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into third byte of a __packb

Definition at line 979 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__insertbyte4()

IFX_INLINE __packb Ifx__insertbyte4 | ( | __packb | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into fourth byte of a __packb

Definition at line 989 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__inserthw1()

IFX_INLINE __packhw Ifx__inserthw1 | ( | __packhw | a,
 |  | sint16 | b
 | ) |  |

Insert sint16 into first halfword of a __packhw

Definition at line 1039 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__inserthw2()

IFX_INLINE __packhw Ifx__inserthw2 | ( | __packhw | a,
 |  | sint16 | b
 | ) |  |

Insert sint16 into second halfword of a __packhw

Definition at line 1049 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__insertubyte1()

IFX_INLINE __upackb Ifx__insertubyte1 | ( | __upackb | a,
 |  | uint8 | b
 | ) |  |

Insert sint8 into first uint8 of a __packb

Definition at line 999 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__insertubyte2()

IFX_INLINE __upackb Ifx__insertubyte2 | ( | __upackb | a,
 |  | uint8 | b
 | ) |  |

Insert sint8 into second uint8 of a __packb

Definition at line 1009 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__insertubyte3()

IFX_INLINE __upackb Ifx__insertubyte3 | ( | __upackb | a,
 |  | uint8 | b
 | ) |  |

Insert sint8 into third uint8 of a __packb

Definition at line 1019 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__insertubyte4()

IFX_INLINE __upackb Ifx__insertubyte4 | ( | __upackb | a,
 |  | uint8 | b
 | ) |  |

Insert sint8 into fourth uint8 of a __packb

Definition at line 1029 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__insertuhw1()

IFX_INLINE __upackhw Ifx__insertuhw1 | ( | __upackhw | a,
 |  | uint16 | b
 | ) |  |

Insert uint16 into first halfword of a __upackhw

Definition at line 1059 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__insertuhw2()

IFX_INLINE __upackhw Ifx__insertuhw2 | ( | __upackhw | a,
 |  | uint16 | b
 | ) |  |

Insert uint16 into second halfword of a __upackhw

Definition at line 1069 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__minb()

IFX_INLINE __packb Ifx__minb | ( | __packb | a,
 |  | __packb | b
 | ) |  |

Minimum of two __packb values

Definition at line 1079 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__minbu()

IFX_INLINE __upackb Ifx__minbu | ( | __upackb | a,
 |  | __upackb | b
 | ) |  |

Minimum of two __upackb values

Definition at line 1089 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__minh()

IFX_INLINE __packhw Ifx__minh | ( | __packhw | a,
 |  | __packhw | b
 | ) |  |

Minimum of two __packhw values

Definition at line 1099 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__minhu()

IFX_INLINE __upackhw Ifx__minhu | ( | __upackhw | a,
 |  | __upackhw | b
 | ) |  |

Minimum of two __upackhw values

Definition at line 1109 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__setbyte1()

IFX_INLINE void Ifx__setbyte1 | ( | __packb * | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into first byte of a __packb

Definition at line 1119 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__setbyte2()

IFX_INLINE void Ifx__setbyte2 | ( | __packb * | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into second byte of a __packb

Definition at line 1129 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__setbyte3()

IFX_INLINE void Ifx__setbyte3 | ( | __packb * | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into third byte of a __packb

Definition at line 1139 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__setbyte4()

IFX_INLINE void Ifx__setbyte4 | ( | __packb * | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into fourth byte of a __packb

Definition at line 1149 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__sethw1()

IFX_INLINE void Ifx__sethw1 | ( | __packhw * | a,
 |  | sint16 | b
 | ) |  |

Insert sint16 into first halfword of a __packhw

Definition at line 1159 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__sethw2()

IFX_INLINE void Ifx__sethw2 | ( | __packhw * | a,
 |  | sint16 | b
 | ) |  |

Insert sint16 into second halfword of a __packhw

Definition at line 1169 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__setubyte1()

IFX_INLINE void Ifx__setubyte1 | ( | __upackb * | a,
 |  | uint8 | b
 | ) |  |

Insert uint8 into first byte of a __upackb

Definition at line 1179 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__setubyte2()

IFX_INLINE void Ifx__setubyte2 | ( | __upackb * | a,
 |  | uint8 | b
 | ) |  |

Insert uint8 into second byte of a __upackb

Definition at line 1189 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__setubyte3()

IFX_INLINE void Ifx__setubyte3 | ( | __upackb * | a,
 |  | uint8 | b
 | ) |  |

Insert uint8 into third byte of a __upackb

Definition at line 1199 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__setubyte4()

IFX_INLINE void Ifx__setubyte4 | ( | __upackb * | a,
 |  | uint8 | b
 | ) |  |

Insert uint8 into fourth byte of a __upackb

Definition at line 1209 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__setuhw1()

IFX_INLINE void Ifx__setuhw1 | ( | __upackhw * | a,
 |  | uint16 | b
 | ) |  |

Insert uint16 into first halfword of a __upackhw

Definition at line 1219 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__setuhw2()

IFX_INLINE void Ifx__setuhw2 | ( | __upackhw * | a,
 |  | uint16 | b
 | ) |  |

Insert uint16 into second halfword of a __upackhw

Definition at line 1229 of file IfxCpu_IntrinsicsGnuc.h.


iLLD_TC38A: Register Handling

Macros | Functions
Register Handling
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Register Handling:

Macros

#define | Ifx__abs(a) __builtin_abs(a)
#define | Ifx__clz(a) __builtin_clz(a)

Functions

IFX_INLINE sint32 | Ifx__absdif (sint32 a, sint32 b)
IFX_INLINE sint32 | Ifx__abss (sint32 a)
IFX_INLINE sint32 | Ifx__clo (sint32 a)
IFX_INLINE sint32 | Ifx__cls (sint32 a)
IFX_INLINE double | Ifx__fabs (double d)
IFX_INLINE float | Ifx__fabsf (float f)
IFX_INLINE sint32 | Ifx__parity (sint32 a)
IFX_INLINE sint8 | Ifx__satb (sint32 a)
IFX_INLINE uint8 | Ifx__satbu (sint32 a)
IFX_INLINE sint16 | Ifx__sath (sint32 a)
IFX_INLINE uint16 | Ifx__sathu (sint32 a)

Detailed Description

The next table provides an overview of the intrinsic functions that you can use to access control registers.

Macro Definition Documentation

◆ Ifx__abs

#define Ifx__abs ( a ) __builtin_abs(a)

Return absolute value

Definition at line 1247 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__clz

#define Ifx__clz ( a ) __builtin_clz(a)

Count leading zeros in int

Definition at line 1287 of file IfxCpu_IntrinsicsGnuc.h.

Function Documentation

◆ Ifx__absdif()

IFX_INLINE sint32 Ifx__absdif | ( | sint32 | a,
 |  | sint32 | b
 | ) |  |

Return absolue difference of two integers

Definition at line 1251 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__abss()

IFX_INLINE sint32 Ifx__abss ( sint32 a )

Return absolute value with saturation

Definition at line 1260 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__clo()

IFX_INLINE sint32 Ifx__clo ( sint32 a )

Count leading ones in int

Definition at line 1269 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__cls()

IFX_INLINE sint32 Ifx__cls ( sint32 a )

Count number of redundant sign bits (all consecutive bits with the same value as bit 31

Definition at line 1278 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__fabs()

IFX_INLINE double Ifx__fabs ( double d )

Return absolute double precision floating-point value

Definition at line 1291 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__fabsf()

IFX_INLINE float Ifx__fabsf ( float f )

Return absolute floating-point value

Definition at line 1300 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__parity()

IFX_INLINE sint32 Ifx__parity ( sint32 a )

Return parity

Definition at line 1322 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__satb()

IFX_INLINE sint8 Ifx__satb ( sint32 a )

Return saturated byte

Definition at line 1331 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__satbu()

IFX_INLINE uint8 Ifx__satbu ( sint32 a )

Return saturated uint8

Definition at line 1340 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__sath()

IFX_INLINE sint16 Ifx__sath ( sint32 a )

Return saturated halfword

Definition at line 1349 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__sathu()

IFX_INLINE uint16 Ifx__sathu ( sint32 a )

Return saturated unsigned halfword

Definition at line 1358 of file IfxCpu_IntrinsicsGnuc.h.


iLLD_TC38A: Saturation Arithmetic Support

Functions
Saturation Arithmetic Support
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Saturation Arithmetic Support:

Functions

IFX_INLINE sint32 | Ifx__adds (sint32 a, sint32 b)
IFX_INLINE uint32 | Ifx__addsu (uint32 a, uint32 b)
IFX_INLINE sint32 | Ifx__subs (sint32 a, sint32 b)
IFX_INLINE uint32 | Ifx__subsu (uint32 a, uint32 b)

Detailed Description

These intrinsics support saturation arithmetic

Function Documentation

◆ Ifx__adds()

IFX_INLINE sint32 Ifx__adds | ( | sint32 | a,
 |  | sint32 | b
 | ) |  |

add signed with saturation

Definition at line 1375 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__addsu()

IFX_INLINE uint32 Ifx__addsu | ( | uint32 | a,
 |  | uint32 | b
 | ) |  |

add unsigned with saturation

Definition at line 1384 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__subs()

IFX_INLINE sint32 Ifx__subs | ( | sint32 | a,
 |  | sint32 | b
 | ) |  |

substract signed with saturation

Definition at line 1393 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__subsu()

IFX_INLINE uint32 Ifx__subsu | ( | uint32 | a,
 |  | uint32 | b
 | ) |  |

substract unsigned with saturation

Definition at line 1402 of file IfxCpu_IntrinsicsGnuc.h.


iLLD_TC38A: Insert Single Assembly Instruction

Macros | Functions
Insert Single Assembly Instruction
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Insert Single Assembly Instruction:

Macros

#define | Ifx__mem_barrier __asm__ volatile("":::"memory");
#define | Ifx__NOP(n) __asm(".rept " #n "\n\tnop\n\t.endr\n")

Functions

IFX_INLINE void | Ifx__debug (void)
IFX_INLINE void | Ifx__dsync (void)
IFX_INLINE void | Ifx__isync (void)
IFX_INLINE void | Ifx__ldmst (volatile void *address, uint32 mask, uint32 value)
IFX_INLINE void | Ifx__nop (void)
IFX_INLINE void | Ifx__nops (void *cnt)
IFX_INLINE void | Ifx__rslcx (void)
IFX_INLINE void | Ifx__svlcx (void)
IFX_INLINE uint32 | Ifx__swap (void *place, uint32 value)

Detailed Description

The next table provides an overview of the intrinsic functions that you can use to insert a single assembly instruction.You can also use inline assembly but these intrinsics provide a shorthand for frequently used assembly instructions.

Macro Definition Documentation

◆ Ifx__mem_barrier

#define Ifx__mem_barrier __asm__ volatile("":::"memory");

Insert a memory barrier

Definition at line 1428 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__NOP

#define Ifx__NOP ( n ) __asm(".rept " #n "\n\tnop\n\t.endr\n")

Insert n NOP instruction

Definition at line 1494 of file IfxCpu_IntrinsicsGnuc.h.

Function Documentation

◆ Ifx__debug()

IFX_INLINE void Ifx__debug ( void )

Insert DEBUG instruction

Definition at line 1421 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__dsync()

IFX_INLINE void Ifx__dsync ( void )

Insert DSYNC instruction

Definition at line 1432 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__isync()

IFX_INLINE void Ifx__isync ( void )

Insert ISYNC instruction

Definition at line 1439 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__ldmst()

IFX_INLINE void Ifx__ldmst | ( | volatile void * | address,
 |  | uint32 | mask,
 |  | uint32 | value
 | ) |  |

Insert LDMST instruction. Note that all operands must be word-aligned.

Definition at line 1446 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__nop()

IFX_INLINE void Ifx__nop ( void )

Insert NOP instruction

Definition at line 1455 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__nops()

IFX_INLINE void Ifx__nops ( void * cnt )

Insert a loop over cnt NOP instruction

Definition at line 1462 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__rslcx()

IFX_INLINE void Ifx__rslcx ( void )

Insert RSLCX instruction

Definition at line 1471 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__svlcx()

IFX_INLINE void Ifx__svlcx ( void )

Insert SVLCX instruction

Definition at line 1478 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__swap()

IFX_INLINE uint32 Ifx__swap | ( | void * | place,
 |  | uint32 | value
 | ) |  |

Insert SWAP instruction. Note that all operands must be word-aligned.

Definition at line 1485 of file IfxCpu_IntrinsicsGnuc.h.


iLLD_TC38A: Intrinsics for TASKING compiler

Modules
Intrinsics for TASKING compiler
iLLD » CPU » Standard Driver » Intrinsics
Collaboration diagram for Intrinsics for TASKING compiler:

Modules

Cross type arithmetic operation
Signed integer operation
Unsigned integer operation
Floating point operation
Fractional Arithmetic Support
Insert / Extract Bit-fields and Bits
Interrupt Handling
Miscellaneous Intrinsic Functions
Packed Data Type Support
Register Handling
Saturation Arithmetic Support
Insert Single Assembly Instruction

Detailed Description


iLLD_TC38A: Cross type arithmetic operation

Macros
Cross type arithmetic operation
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for TASKING compiler
Collaboration diagram for Cross type arithmetic operation:

Macros

#define | Ifx__minX(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxX(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturateX(X, Min, Max) ( Ifx__minX(Ifx__maxX(X, Min), Max) )
#define | Ifx__checkrangeX(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))

Detailed Description

Macro compatible with float, fix point, signed integer and unsigned integer

Macro Definition Documentation

◆ Ifx__checkrangeX

#define Ifx__checkrangeX | ( | X,
 |  | Min,
 |  | Max
 | ) | (((X) >= (Min)) && ((X) <= (Max)))

Definition at line 110 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__maxX

#define Ifx__maxX | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) ? (X) : (Y) )

Definition at line 108 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__minX

#define Ifx__minX | ( | X,
 |  | Y
 | ) | ( ((X) < (Y)) ? (X) : (Y) )

Definition at line 107 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__saturateX

#define Ifx__saturateX | ( | X,
 |  | Min,
 |  | Max
 | ) | ( Ifx__minX(Ifx__maxX(X, Min), Max) )

Definition at line 109 of file IfxCpu_IntrinsicsTasking.h.


iLLD_TC38A: Signed integer operation

Macros
Signed integer operation
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for TASKING compiler
Collaboration diagram for Signed integer operation:

Macros

#define Ifx__saturate(X, Min, Max) ( __min(__max(X, Min), Max) )

Detailed Description

Macro Definition Documentation

◆ Ifx__saturate

#define Ifx__saturate | ( | X,
 |  | Min,
 |  | Max
 | ) | ( __min(__max(X, Min), Max) )

Definition at line 117 of file IfxCpu_IntrinsicsTasking.h.


iLLD_TC38A: Unsigned integer operation

Macros
Unsigned integer operation
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for TASKING compiler
Collaboration diagram for Unsigned integer operation:

Macros

#define Ifx__saturateu(X, Min, Max) ( __minu(__maxu(X, Min), Max) )

Detailed Description

Macro Definition Documentation

◆ Ifx__saturateu

#define Ifx__saturateu | ( | X,
 |  | Min,
 |  | Max
 | ) | ( __minu(__maxu(X, Min), Max) )

Definition at line 124 of file IfxCpu_IntrinsicsTasking.h.


iLLD_TC38A: Floating point operation

Macros
Floating point operation
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for TASKING compiler
Collaboration diagram for Floating point operation:

Macros

#define | Ifx__checkrange(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__sqrf(X) ((X) * (X))
#define | Ifx__sqrtf(X) sqrtf(X)
#define | Ifx__roundf(X) ((((X) - (int)(X)) > 0.5) ? (1 + (int)(X)) : ((int)(X)))
#define | Ifx__absf(X) ( ((X) < 0.0) ? -(X) : (X) )
#define | Ifx__minf(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxf(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturatef(X, Min, Max) ( Ifx__minf(_Ifx_maxf(X, Min), Max) )
#define | Ifx__checkrangef(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__abs_stdreal(X) ( ((X) > 0.0) ? (X) : -(X) )
#define | Ifx__min_stdreal(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__max_stdreal(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturate_stdreal(X, Min, Max) ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )
#define | Ifx__neqf(X, Y) ( ((X) > (Y)) || ((X) < (Y)) )
#define | Ifx__leqf(X, Y) ( !((X) > (Y)) )
#define | Ifx__geqf(X, Y) ( !((X) < (Y)) )

Detailed Description

Macro Definition Documentation

◆ Ifx__abs_stdreal

#define Ifx__abs_stdreal ( X ) ( ((X) > 0.0) ? (X) : -(X) )

Definition at line 143 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__absf

#define Ifx__absf ( X ) ( ((X) < 0.0) ? -(X) : (X) )

Definition at line 137 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__checkrange

#define Ifx__checkrange | ( | X,
 |  | Min,
 |  | Max
 | ) | (((X) >= (Min)) && ((X) <= (Max)))

Definition at line 131 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__checkrangef

#define Ifx__checkrangef | ( | X,
 |  | Min,
 |  | Max
 | ) | (((X) >= (Min)) && ((X) <= (Max)))

Definition at line 141 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__geqf

#define Ifx__geqf | ( | X,
 |  | Y
 | ) | ( !((X) < (Y)) )

X >= Y

Definition at line 150 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__leqf

#define Ifx__leqf | ( | X,
 |  | Y
 | ) | ( !((X) > (Y)) )

X <= Y

Definition at line 149 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__max_stdreal

#define Ifx__max_stdreal | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) ? (X) : (Y) )

Definition at line 145 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__maxf

#define Ifx__maxf | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) ? (X) : (Y) )

Definition at line 139 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__min_stdreal

#define Ifx__min_stdreal | ( | X,
 |  | Y
 | ) | ( ((X) < (Y)) ? (X) : (Y) )

Definition at line 144 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__minf

#define Ifx__minf | ( | X,
 |  | Y
 | ) | ( ((X) < (Y)) ? (X) : (Y) )

Definition at line 138 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__neqf

#define Ifx__neqf | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) || ((X) < (Y)) )

X != Y

Definition at line 148 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__roundf

#define Ifx__roundf ( X ) ((((X) - (int)(X)) > 0.5) ? (1 + (int)(X)) : ((int)(X)))

Definition at line 136 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__saturate_stdreal

#define Ifx__saturate_stdreal | ( | X,
 |  | Min,
 |  | Max
 | ) | ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )

Definition at line 146 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__saturatef

#define Ifx__saturatef | ( | X,
 |  | Min,
 |  | Max
 | ) | ( Ifx__minf(_Ifx_maxf(X, Min), Max) )

Definition at line 140 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__sqrf

#define Ifx__sqrf ( X ) ((X) * (X))

Definition at line 133 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__sqrtf

#define Ifx__sqrtf ( X ) sqrtf(X)

Definition at line 134 of file IfxCpu_IntrinsicsTasking.h.


iLLD_TC38A: Fractional Arithmetic Support

Macros
Fractional Arithmetic Support
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for TASKING compiler
Collaboration diagram for Fractional Arithmetic Support:

Macros

#define | Ifx__fract_to_float(value) ((float)(value))
#define | Ifx__mulfractlong __mulfractlong
#define | Ifx__mulfractfract(fractvalue1, fractvalue2) ((fractvalue1)*(fractvalue2))

Detailed Description

The next table provides an overview of intrinsic functions to convert fractional values. Note that the TASKING VX-toolset C compiler for TriCore fully supports the fractional type so normally you should not need these intrinsic functions (except for __mulfractlong). For compatibility reasons the TASKING C compiler does support these functions.

Macro Definition Documentation

◆ Ifx__fract_to_float

#define Ifx__fract_to_float ( value ) ((float)(value))

Definition at line 160 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__mulfractfract

#define Ifx__mulfractfract | ( | fractvalue1,
 |  | fractvalue2
 | ) | ((fractvalue1)*(fractvalue2))

Definition at line 164 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__mulfractlong

#define Ifx__mulfractlong __mulfractlong

Definition at line 162 of file IfxCpu_IntrinsicsTasking.h.


iLLD_TC38A: Insert / Extract Bit-fields and Bits

Macros
Insert / Extract Bit-fields and Bits
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for TASKING compiler
Collaboration diagram for Insert / Extract Bit-fields and Bits:

Macros

#define | Ifx__extru(a, p, w) __extru(a,p,w)
#define | Ifx__extr(a, p, w) __extr(a,p,w)
#define | Ifx__imaskldmst(a, v, b, p) __imaskldmst((int*)a, v, b, p)
#define | Ifx__insert(a, b, p, w) __insert(a,b,p,w)

Detailed Description

Macro Definition Documentation

◆ Ifx__extr

#define Ifx__extr | ( | a,
 |  | p,
 |  | w
 | ) | __extr(a,p,w)

Definition at line 175 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__extru

#define Ifx__extru | ( | a,
 |  | p,
 |  | w
 | ) | __extru(a,p,w)

Definition at line 173 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__imaskldmst

#define Ifx__imaskldmst | ( | a,
 |  | v,
 |  | b,
 |  | p
 | ) | __imaskldmst((int*)a, v, b, p)

Definition at line 177 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__insert

#define Ifx__insert | ( | a,
 |  | b,
 |  | p,
 |  | w
 | ) | __insert(a,b,p,w)

Definition at line 179 of file IfxCpu_IntrinsicsTasking.h.


iLLD_TC38A: Interrupt Handling

Macros
Interrupt Handling
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for TASKING compiler
Collaboration diagram for Interrupt Handling:

Macros

#define | Ifx__disable_and_save __disable_and_save
#define | Ifx__restore __restore

Detailed Description

The next table provides an overview of the intrinsic functions to read or set interrupt handling.

Macro Definition Documentation

◆ Ifx__disable_and_save

#define Ifx__disable_and_save __disable_and_save

Definition at line 188 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__restore

#define Ifx__restore __restore

Definition at line 190 of file IfxCpu_IntrinsicsTasking.h.


iLLD_TC38A: Miscellaneous Intrinsic Functions

Miscellaneous Intrinsic Functions
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for TASKING compiler
Collaboration diagram for Miscellaneous Intrinsic Functions:


iLLD_TC38A: Packed Data Type Support

Packed Data Type Support
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for TASKING compiler
Collaboration diagram for Packed Data Type Support:

The next table provides an overview of the intrinsic functions for initialization of packed data type.


iLLD_TC38A: Register Handling

Macros
Register Handling
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for TASKING compiler
Collaboration diagram for Register Handling:

Macros

#define Ifx__mtcr_no_isync(reg, val) __asm("mtcr %0,%1"::"i"(reg),"d"(val));

Detailed Description

The next table provides an overview of the intrinsic functions that you can use to access control registers.

Macro Definition Documentation

◆ Ifx__mtcr_no_isync

#define Ifx__mtcr_no_isync | ( | reg,
 |  | val
 | ) | __asm("mtcr %0,%1"::"i"(reg),"d"(val));

Definition at line 215 of file IfxCpu_IntrinsicsTasking.h.


iLLD_TC38A: Saturation Arithmetic Support

Macros
Saturation Arithmetic Support
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for TASKING compiler
Collaboration diagram for Saturation Arithmetic Support:

Macros

#define | Ifx__adds(a, b) ((__sat int)(a)+(__sat int)(b))
#define | Ifx__addsu(a, b) ((__sat unsigned int)(a)+(__sat unsigned int)(b))
#define | Ifx__subs(a, b) ((__sat int)(a)-(__sat int)(b))
#define | Ifx__subsu(a, b) ((__sat unsigned int )(a)-(__sat unsigned int )(b))

Detailed Description

These intrinsics support saturation arithmetic

Macro Definition Documentation

◆ Ifx__adds

#define Ifx__adds | ( | a,
 |  | b
 | ) | ((__sat int)(a)+(__sat int)(b))

Definition at line 226 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__addsu

#define Ifx__addsu | ( | a,
 |  | b
 | ) | ((__sat unsigned int)(a)+(__sat unsigned int)(b))

Definition at line 228 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__subs

#define Ifx__subs | ( | a,
 |  | b
 | ) | ((__sat int)(a)-(__sat int)(b))

Definition at line 230 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__subsu

#define Ifx__subsu | ( | a,
 |  | b
 | ) | ((__sat unsigned int )(a)-(__sat unsigned int )(b))

Definition at line 232 of file IfxCpu_IntrinsicsTasking.h.


iLLD_TC38A: Insert Single Assembly Instruction

Macros | Functions
Insert Single Assembly Instruction
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for TASKING compiler
Collaboration diagram for Insert Single Assembly Instruction:

Macros

#define | Ifx__NOP(n) __asm(".DUP " #n "\n\tnop16\n\t.ENDM\n")
#define | Ifx__mem_barrier __asm("":::"memory");
#define | Ifx__fract_to_sfract __round16
#define | Ifx__ldmst(addr, mask, data) Ifx__ldmstAsm(addr, mask, data)

Functions

IFX_INLINE void | Ifx__nops (void *cnt)
IFX_INLINE void | Ifx__ldmstAsm (volatile void *addr, uint32 mask, uint32 data)
IFX_INLINE fract | Ifx__float_to_fract (float a)
IFX_INLINE sfract | Ifx__float_to_sfract (float a)
IFX_INLINE void | Ifx__stopPerfCounters (void)

Detailed Description

The next table provides an overview of the intrinsic functions that you can use to insert a single assembly instruction.You can also use inline assembly but these intrinsics provide a shorthand for frequently used assembly instructions.

Macro Definition Documentation

◆ Ifx__fract_to_sfract

#define Ifx__fract_to_sfract __round16

Definition at line 284 of file IfxCpu_IntrinsicsTasking.h.

Referenced by Ifx__float_to_sfract().

◆ Ifx__ldmst

#define Ifx__ldmst | ( | addr,
 |  | mask,
 |  | data
 | ) | Ifx__ldmstAsm(addr, mask, data)

Definition at line 294 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__mem_barrier

#define Ifx__mem_barrier __asm("":::"memory");

Insert a memory barrier

Definition at line 255 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__NOP

#define Ifx__NOP ( n ) __asm(".DUP " #n "\n\tnop16\n\t.ENDM\n")

Definition at line 251 of file IfxCpu_IntrinsicsTasking.h.

Function Documentation

◆ Ifx__float_to_fract()

IFX_INLINE fract Ifx__float_to_fract ( float a )

Convert float to fract

Definition at line 277 of file IfxCpu_IntrinsicsTasking.h.

Referenced by Ifx__float_to_sfract().

◆ Ifx__float_to_sfract()

IFX_INLINE sfract Ifx__float_to_sfract ( float a )

Convert float to sfract

Definition at line 288 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__ldmstAsm()

IFX_INLINE void Ifx__ldmstAsm | ( | volatile void * | addr,
 |  | uint32 | mask,
 |  | uint32 | data
 | ) |  |

Definition at line 266 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__nops()

IFX_INLINE void Ifx__nops ( void * cnt )

Definition at line 244 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__stopPerfCounters()

IFX_INLINE void Ifx__stopPerfCounters ( void )

Definition at line 297 of file IfxCpu_IntrinsicsTasking.h.


iLLD_TC38A: IfxCpu_Intrinsics.h File Reference

  • Cpu
  • Std
Macros | Functions
IfxCpu_Intrinsics.h File Reference
iLLD » CPU » Standard Driver » Intrinsics
#include "Ifx_Types.h"
Include dependency graph for IfxCpu_Intrinsics.h:

Go to the source code of this file.

Macros

#define | IFX_ALIGN_8 (1)
#define | IFX_ALIGN_16 (2)
#define | IFX_ALIGN_32 (4)
#define | IFX_ALIGN_64 (8)
#define | IFX_ALIGN_128 (16)
#define | IFX_ALIGN_256 (32)
#define | Ifx_AlignOn256(Size) ((((Size) + (IFX_ALIGN_256 - 1)) & (~(IFX_ALIGN_256 - 1))))
#define | Ifx_AlignOn128(Size) ((((Size) + (IFX_ALIGN_128 - 1)) & (~(IFX_ALIGN_128 - 1))))
#define | Ifx_AlignOn64(Size) ((((Size) + (IFX_ALIGN_64 - 1)) & (~(IFX_ALIGN_64 - 1))))
#define | Ifx_AlignOn32(Size) ((((Size) + (IFX_ALIGN_32 - 1)) & (~(IFX_ALIGN_32 - 1))))
#define | Ifx_AlignOn16(Size) ((((Size) + (IFX_ALIGN_16 - 1)) & (~(IFX_ALIGN_16 - 1))))
#define | Ifx_AlignOn8(Size) ((((Size) + (IFX_ALIGN_8 - 1)) & (~(IFX_ALIGN_8 - 1))))
#define | Ifx_COUNTOF(x) (sizeof(x) / sizeof(x[0]))

Functions

IFX_INLINE void * | __cx_to_addr (uint32 cx)
IFX_INLINE uint32 | __addr_to_cx (void *addr)
IFX_INLINE void | __ldmst_c (volatile void *address, unsigned mask, unsigned value)
IFX_INLINE uint32 | __ld32 (void *addr)
IFX_INLINE void | __st32 (void *addr, uint32 value)
IFX_INLINE uint64 | __ld64 (void *addr)
IFX_INLINE void | __st64 (void *addr, uint64 value)
IFX_INLINE void | __ld64_lu (void *addr, uint32 *valueLower, uint32 *valueUpper)
IFX_INLINE void | __st64_lu (void *addr, uint32 valueLower, uint32 valueUpper)

Detailed Description

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCpu_Intrinsics.h.

Macro Definition Documentation

◆ IFX_ALIGN_128

#define IFX_ALIGN_128 (16)

Definition at line 69 of file IfxCpu_Intrinsics.h.

◆ IFX_ALIGN_16

#define IFX_ALIGN_16 (2)

Definition at line 66 of file IfxCpu_Intrinsics.h.

◆ IFX_ALIGN_256

#define IFX_ALIGN_256 (32)

Definition at line 70 of file IfxCpu_Intrinsics.h.

◆ IFX_ALIGN_32

#define IFX_ALIGN_32 (4)

Definition at line 67 of file IfxCpu_Intrinsics.h.

◆ IFX_ALIGN_64

#define IFX_ALIGN_64 (8)

Definition at line 68 of file IfxCpu_Intrinsics.h.

◆ IFX_ALIGN_8

#define IFX_ALIGN_8 (1)

Definition at line 65 of file IfxCpu_Intrinsics.h.

◆ Ifx_AlignOn128

#define Ifx_AlignOn128 ( Size ) ((((Size) + (IFX_ALIGN_128 - 1)) & (~(IFX_ALIGN_128 - 1))))

Definition at line 73 of file IfxCpu_Intrinsics.h.

◆ Ifx_AlignOn16

#define Ifx_AlignOn16 ( Size ) ((((Size) + (IFX_ALIGN_16 - 1)) & (~(IFX_ALIGN_16 - 1))))

Definition at line 76 of file IfxCpu_Intrinsics.h.

◆ Ifx_AlignOn256

#define Ifx_AlignOn256 ( Size ) ((((Size) + (IFX_ALIGN_256 - 1)) & (~(IFX_ALIGN_256 - 1))))

Definition at line 72 of file IfxCpu_Intrinsics.h.

◆ Ifx_AlignOn32

#define Ifx_AlignOn32 ( Size ) ((((Size) + (IFX_ALIGN_32 - 1)) & (~(IFX_ALIGN_32 - 1))))

Definition at line 75 of file IfxCpu_Intrinsics.h.

Referenced by Ifx_Fifo_create(), and Ifx_Fifo_init().

◆ Ifx_AlignOn64

#define Ifx_AlignOn64 ( Size ) ((((Size) + (IFX_ALIGN_64 - 1)) & (~(IFX_ALIGN_64 - 1))))

Definition at line 74 of file IfxCpu_Intrinsics.h.

Referenced by Ifx_Fifo_init().

◆ Ifx_AlignOn8

#define Ifx_AlignOn8 ( Size ) ((((Size) + (IFX_ALIGN_8 - 1)) & (~(IFX_ALIGN_8 - 1))))

Definition at line 77 of file IfxCpu_Intrinsics.h.

◆ Ifx_COUNTOF

#define Ifx_COUNTOF ( x ) (sizeof(x) / sizeof(x[0]))

Definition at line 79 of file IfxCpu_Intrinsics.h.

Referenced by Ifx_Shell_matchToken(), Ifx_Shell_parseAddress(), Ifx_Shell_parseFloat32(), Ifx_Shell_parseFloat64(), Ifx_Shell_parseSInt64(), and Ifx_Shell_parseUInt64().

Function Documentation

◆ __addr_to_cx()

IFX_INLINE uint32 __addr_to_cx ( void * addr )

Convert address pointer to context pointer

Parameters
[in] addr address pointer
Returns
context pointer

Definition at line 98 of file IfxCpu_Intrinsics.h.

◆ __cx_to_addr()

IFX_INLINE void* __cx_to_addr ( uint32 cx )

Convert context pointer to address pointer

Parameters
[in] cx context pointer
Returns
address pointer

Definition at line 87 of file IfxCpu_Intrinsics.h.

◆ __ld32()

IFX_INLINE uint32 __ld32 ( void * addr )

32bit load operation

Definition at line 116 of file IfxCpu_Intrinsics.h.

◆ __ld64()

IFX_INLINE uint64 __ld64 ( void * addr )

64bit load operation

Definition at line 132 of file IfxCpu_Intrinsics.h.

Referenced by __ld64_lu().

◆ __ld64_lu()

IFX_INLINE void __ld64_lu | ( | void * | addr,
 |  | uint32 * | valueLower,
 |  | uint32 * | valueUpper
 | ) |  |

64bit load operation which returns the lower and upper 32bit word

Definition at line 148 of file IfxCpu_Intrinsics.h.

◆ __ldmst_c()

IFX_INLINE void __ldmst_c | ( | volatile void * | address,
 |  | unsigned | mask,
 |  | unsigned | value
 | ) |  |

Definition at line 108 of file IfxCpu_Intrinsics.h.

Referenced by IfxCcu6_connectTrigger(), IfxGtm_Atom_setTout(), IfxGtm_PinMap_setAtomTout(), IfxGtm_PinMap_setTimTin(), IfxGtm_PinMap_setTomTout(), IfxGtm_Psm_F2a_disableStream(), IfxGtm_Psm_F2a_enableStream(), IfxGtm_Tbu_enableChannel(), IfxGtm_Tim_Ch_setTimTin(), IfxGtm_Tom_setTout(), IfxGtm_Trig_fromEdsadc(), IfxGtm_Trig_fromMsc(), IfxGtm_Trig_toCan(), IfxGtm_Trig_toEdsadc(), IfxGtm_Trig_toEVadc(), IfxGtm_Trig_toEVadcClear(), IfxGtm_Trig_toMsc(), IfxGtm_Trig_toPsi5(), IfxGtm_Trig_toPsi5s(), and IfxGtm_Trig_toSent().

◆ __st32()

IFX_INLINE void __st32 | ( | void * | addr,
 |  | uint32 | value
 | ) |  |

32bit store operation

Definition at line 124 of file IfxCpu_Intrinsics.h.

◆ __st64()

IFX_INLINE void __st64 | ( | void * | addr,
 |  | uint64 | value
 | ) |  |

64bit store operation

Definition at line 140 of file IfxCpu_Intrinsics.h.

Referenced by __st64_lu().

◆ __st64_lu()

IFX_INLINE void __st64_lu | ( | void * | addr,
 |  | uint32 | valueLower,
 |  | uint32 | valueUpper
 | ) |  |

64bit store operation which stores a lower and upper 32bit word

Definition at line 159 of file IfxCpu_Intrinsics.h.

Referenced by IfxFlash_loadPage().


iLLD_TC38A: Interrupt Functions

Modules
Interrupt Functions
iLLD » CPU
Collaboration diagram for Interrupt Functions:

Modules

How to define Interrupts?

Detailed Description


iLLD_TC38A: How to define Interrupts?

Functions
How to define Interrupts?
iLLD » CPU » Interrupt Functions
Collaboration diagram for How to define Interrupts?:

Functions

IFX_EXTERN IfxSrc_Tos IfxCpu_Irq_getTos (IfxCpu_ResourceCpu coreId)
API to get type of service of the caller CPU. More...

Detailed Description

This page describes how to use interrupts with application framework.

Interrupts Terminology:

Hardware Managed Interrupt Mechanism.

Hardware managed interrupts have static interrupt vector which are defined for each priority separately. These vectors have jump instruction to the interrupt handler.

Advantages:
This mechanism has less interrupt latency time.

Software Managed Interrupt Mechanism.

Software managed interrupts have single interrupt vector statically defined at vector position 255. This address is assigned to BIV during startup.
For Tricore, this vector position is important, because whenever an interrupt occurs, with whichever priority, the execution control jumps to this vector position. The code at this vector position will:
1) fetch the priority of the targetted interrupt.
2) fetch the interrupt handler defined for this priority (this is done by Interrupt handler installation. Refer Step4: How to install Interrupt Service routine/handler?
3) Then call the handler as notmal function call.

Advantages:
This kind of mechanism is useful when project wants to change the handler for an interrupt during runtime.

Disadvantages:
This mechanism has more interrupt latency time.

of the interrupt and in tand jumps to the function

Steps to use Interrupt Mechanism.

Dependency: Ifx_Compilers, Ifx_Cpu, Ifx_Src, IfxCpu_Irq
Following are the steps to use interrupt mechanism.

Step1: Define Interrupt priorities.

Define priorities of all interrupts with names corresponding to their functionality. It is recommended to define such priority definitions in single header file, because it is easy to detect if ISR priorities are conflicting. In Tricore architecture, two Isrs can't have same priority at same point of time.

Note
These defines shall be defined without brackets surrounding priority number. (eg. #define PRIO (10) is not allowed)

In a user defined file eg. Ifx_IntPrioDef.h, placed in folder: 0_AppSw/Tricore/DemoApp:

//file: Ifx_IntPrioDef.h.
#define IFX_INTPRIO_FUNCT1 1
#define IFX_INTPRIO_FUNCT2 2
#define IFX_INTPRIO_FUNCT3 5
#define IFX_INTPRIO_STM0 8
#define IFX_INTPRIO_ADC_FUNC1 10
//etc.
Note
!! IMPORTANT !!
As explained above, the definition with closing bracket around priority number as, #define IFX_INTPRIO_FUNCT1 (1) will cause compilation error. Because linker sections which are constructed using such information will also get these brackets included. Which look like ".intvec_tc0_(1)" instead of the expected ".intvec_tc0_1"
Linker sections' definitions are predefined statically in .lsl file, for all 255 interrupts, with the format ".intvec_tc<vector number>_<interrupt priority>".

Step2: Define Type of interrupt mechanism.

To use Hardware Managed Interrupt Mechanism.

Refer Hardware Managed Interrupt Mechanism. If project is designed for hardware managed interrupts, this feature is enabled at the file Ifx_Cfg.h, at path: 0_Src/0_AppSw/Config/Common/, as shown below. IFX_USE_SW_MANAGED_INT definition must be undefined (i.e. the statement "#define IFX_USE_SW_MANAGED_INT" shall be commented as below).

//file: Ifx_Cfg.h
//#define IFX_USE_SW_MANAGED_INT

To use Software Managed Interrupt Mechanism.

Refer Software Managed Interrupt Mechanism. If project is designed for software managed interrupts, this feature is enabled at the file Ifx_Cfg.h, at path: 0_Src/0_AppSw/Config/Common/, as shown below. IFX_USE_SW_MANAGED_INT definition must be defined.

//file: Ifx_Cfg.h
#define IFX_USE_SW_MANAGED_INT

Software managed interrupts must also install the "Interrupt Handlers" Refer Step4: How to install Interrupt Service routine/handler?

Step3: How to define an Interrupt Service routine?

Interrupt service routines or interrupt handlers are defined in driver specific files or application specific files.

//file usercode1.c
#include "Compilers.h" // to get the compiler abstracted macros for interrupt definition
#include "Ifx_IntPrioDef.h" // to get the priority numbers
//define an ISR with name Isr_Stm0 with priority defined by IFX_INTPRIO_STM0
IFX_INTERRUPT (Isr_Stm0, 0, IFX_INTPRIO_STM0)
{
//Isr code here
}
//file usercode2.c
#include "Compilers.h" // to get the compiler abstracted macros for interrupt definition
#include "Ifx_IntPrioDef.h" // to get the priority numbers
//define an ISR with name Isr_Adc_fun1 with priority defined by IFX_INTPRIO_ADC_FUNC1
IFX_INTERRUPT (Isr_Adc_fun1, 0, IFX_INTPRIO_ADC_FUNC1)
{
//Isr code here
}

Step4: How to install Interrupt Service routine/handler?

This step is not required for HW managed interrupts.
Interrupt service routines or interrupt handlers are installed in driver specific files or application specific files

//file usermain.c
#include "IfxCpu_Irq.h"
#include "Ifx_IntPrioDef.h" // to get the priority numbers
void userfunction_init(void)
{
//code for user function init
// :
// :
IfxCpu_Irq_installInterruptHandler (Isr_Stm0, IFX_INTPRIO_STM0);
IfxCpu_Irq_installInterruptHandler (Isr_Adc_fun1, IFX_INTPRIO_ADC_FUNC1);
// :
}

Step5: Managing the Service Request Node.

For the interrupt to get activated, interrupt triggers are needed. These triggers are activated by peripheral modules and corresponding service request node must be
1) Configured with correct priority number
2) The request node must be enabled
Refer to How to use Service Request Mechanism?

Function Documentation

◆ IfxCpu_Irq_getTos()

IFX_EXTERN IfxSrc_Tos IfxCpu_Irq_getTos ( IfxCpu_ResourceCpu coreId )

API to get type of service of the caller CPU.

Parameters
coreId core id of the core
Returns
type of service for the corresponding CPU.

Definition at line 198 of file IfxCpu_Irq.c.


iLLD_TC38A: Trap Functions

Modules
Trap Functions
iLLD » CPU
Collaboration diagram for Trap Functions:

Modules

Trap Function Hooks
How to use the Trap Function Hooks?
Macro to define the trap vector table. This macro is provided to define the trap vector table in the frameowrk. User shall not use this macro. Refer to the documentation to extend the trap with hook functions. How to use the Trap Function Hooks?.

Detailed Description


iLLD_TC38A: Trap Function Hooks

Data Structures | Typedefs | Enumerations
Trap Function Hooks
iLLD » CPU » Trap Functions
Collaboration diagram for Trap Function Hooks:

Data Structures

union | IfxCpu_Trap_Id
Union to abstract Identification numbers under Traps. More...
struct | IfxCpu_Trap
Structure to contain the trap information. More...

Typedefs

typedef sint32 | IfxCpu_Trap_SystemCall_Id
Type for Identification numbers under SystemCall Trap. More...
typedef sint32 | IfxCpu_Trap_NonMaskableInterrupt_Id
Type for Identification number for Non Maskable Interrupt Trap. More...

Enumerations

enum IfxCpu_Trap_Class {
IfxCpu_Trap_Class_memoryManagement = 0U,
IfxCpu_Trap_Class_internalProtection = 1U,
IfxCpu_Trap_Class_instructionErrors = 2U,
IfxCpu_Trap_Class_contextManagement = 3U,
IfxCpu_Trap_Class_bus = 4U,
IfxCpu_Trap_Class_assertion = 5U,
IfxCpu_Trap_Class_systemCall = 6U,
IfxCpu_Trap_Class_nonMaskableInterrupt = 7U
}
Enum for available Trap classes. More...
enum IfxCpu_Trap_MemoryManagement_Id {
IfxCpu_Trap_MemoryManagement_Id_virtualAddressFill = 0U,
IfxCpu_Trap_MemoryManagement_Id_virtualAddressProtection = 1U
}
Enum for available Identification numbers under Memory Management Trap. More...
enum IfxCpu_Trap_InternalProtection_Id {
IfxCpu_Trap_InternalProtection_Id_privilegeViolation = 1U,
IfxCpu_Trap_InternalProtection_Id_memoryProtectionRead = 2U,
IfxCpu_Trap_InternalProtection_Id_memoryProtectionWrite = 3U,
IfxCpu_Trap_InternalProtection_Id_memoryProtectionExecute = 4U,
IfxCpu_Trap_InternalProtection_Id_memoryProtectionPeripheralAccess = 5U,
IfxCpu_Trap_InternalProtection_Id_memoryProtectionNullAddress = 6U,
IfxCpu_Trap_InternalProtection_Id_globalRegisterWriteProtection = 7U
}
Enum for available Identification numbers under Internal Protection Trap. More...
enum IfxCpu_Trap_InstructionErrors_Id {
IfxCpu_Trap_InstructionErrors_Id_illegalOpcode = 1U,
IfxCpu_Trap_InstructionErrors_Id_unimplementedOpcode = 2U,
IfxCpu_Trap_InstructionErrors_Id_invalidOperand = 3U,
IfxCpu_Trap_InstructionErrors_Id_dataAddressAlignment = 4U,
IfxCpu_Trap_InstructionErrors_Id_invalidMemoryAddress = 5U
}
Enum for available Identification numbers under Instruction Errors Trap. More...
enum IfxCpu_Trap_ContextManagement_Id {
IfxCpu_Trap_ContextManagement_Id_freeContextListDepletion = 1U,
IfxCpu_Trap_ContextManagement_Id_callDepthOverflow = 2U,
IfxCpu_Trap_ContextManagement_Id_callDepthUnderflow = 3U,
IfxCpu_Trap_ContextManagement_Id_freeContextListUnderflow = 4U,
IfxCpu_Trap_ContextManagement_Id_callStackUnderflow = 5U,
IfxCpu_Trap_ContextManagement_Id_contextType = 6U,
IfxCpu_Trap_ContextManagement_Id_nestingError = 7U
}
Enum for available Identification numbers under Context Management Trap. More...
enum IfxCpu_Trap_Bus_Id {
IfxCpu_Trap_Bus_Id_programFetchSynchronousError = 1U,
IfxCpu_Trap_Bus_Id_dataAccessSynchronousError = 2U,
IfxCpu_Trap_Bus_Id_dataAccessAsynchronousError = 3U,
IfxCpu_Trap_Bus_Id_CoprocessorTrapAsynchronousError = 4U,
IfxCpu_Trap_Bus_Id_programMemoryIntegrityError = 5U,
IfxCpu_Trap_Bus_Id_dataMemoryIntegrityError = 6U,
IfxCpu_Trap_Bus_Id_temporalAsynchronousError = 7U
}
Enum for available Identification numbers under Bus Trap. More...
enum IfxCpu_Trap_Assertion_Id {
IfxCpu_Trap_Assertion_Id_arithmeticOverflow = 1U,
IfxCpu_Trap_Assertion_Id_stickyArithmeticOverflow = 2U
}
Enum for available Identification numbers under Assertion Trap. More...

Detailed Description

Data Structure Documentation

◆ IfxCpu_Trap_Id

union IfxCpu_Trap_Id

Union to abstract Identification numbers under Traps.

Definition at line 168 of file IfxCpu_Trap.h.

Data Fields
IfxCpu_Trap_Assertion_Id | assertion
IfxCpu_Trap_Bus_Id | bus
IfxCpu_Trap_ContextManagement_Id | contextManagement
IfxCpu_Trap_InstructionErrors_Id | instructionErrors
IfxCpu_Trap_InternalProtection_Id | internalProtection
IfxCpu_Trap_MemoryManagement_Id | memoryManagement
IfxCpu_Trap_NonMaskableInterrupt_Id | nonMaskableInterrupt
IfxCpu_Trap_SystemCall_Id | systemCall

◆ IfxCpu_Trap

struct IfxCpu_Trap

Structure to contain the trap information.

Definition at line 183 of file IfxCpu_Trap.h.

Data Fields
unsigned int | tAddr
unsigned int | tClass: 8
unsigned int | tCpu: 3
unsigned int | tId: 8

Typedef Documentation

◆ IfxCpu_Trap_NonMaskableInterrupt_Id

typedef sint32 IfxCpu_Trap_NonMaskableInterrupt_Id

Type for Identification number for Non Maskable Interrupt Trap.

Definition at line 163 of file IfxCpu_Trap.h.

◆ IfxCpu_Trap_SystemCall_Id

typedef sint32 IfxCpu_Trap_SystemCall_Id

Type for Identification numbers under SystemCall Trap.

Definition at line 158 of file IfxCpu_Trap.h.

Enumeration Type Documentation

◆ IfxCpu_Trap_Assertion_Id

enum IfxCpu_Trap_Assertion_Id

Enum for available Identification numbers under Assertion Trap.

Enumerator
IfxCpu_Trap_Assertion_Id_arithmeticOverflow
IfxCpu_Trap_Assertion_Id_stickyArithmeticOverflow

Definition at line 149 of file IfxCpu_Trap.h.

◆ IfxCpu_Trap_Bus_Id

enum IfxCpu_Trap_Bus_Id

Enum for available Identification numbers under Bus Trap.

Enumerator
IfxCpu_Trap_Bus_Id_programFetchSynchronousError
IfxCpu_Trap_Bus_Id_dataAccessSynchronousError
IfxCpu_Trap_Bus_Id_dataAccessAsynchronousError
IfxCpu_Trap_Bus_Id_CoprocessorTrapAsynchronousError
IfxCpu_Trap_Bus_Id_programMemoryIntegrityError
IfxCpu_Trap_Bus_Id_dataMemoryIntegrityError
IfxCpu_Trap_Bus_Id_temporalAsynchronousError

Definition at line 135 of file IfxCpu_Trap.h.

◆ IfxCpu_Trap_Class

enum IfxCpu_Trap_Class

Enum for available Trap classes.

Enumerator
IfxCpu_Trap_Class_memoryManagement
IfxCpu_Trap_Class_internalProtection
IfxCpu_Trap_Class_instructionErrors
IfxCpu_Trap_Class_contextManagement
IfxCpu_Trap_Class_bus
IfxCpu_Trap_Class_assertion
IfxCpu_Trap_Class_systemCall
IfxCpu_Trap_Class_nonMaskableInterrupt

Definition at line 71 of file IfxCpu_Trap.h.

◆ IfxCpu_Trap_ContextManagement_Id

enum IfxCpu_Trap_ContextManagement_Id

Enum for available Identification numbers under Context Management Trap.

Enumerator
IfxCpu_Trap_ContextManagement_Id_freeContextListDepletion
IfxCpu_Trap_ContextManagement_Id_callDepthOverflow
IfxCpu_Trap_ContextManagement_Id_callDepthUnderflow
IfxCpu_Trap_ContextManagement_Id_freeContextListUnderflow
IfxCpu_Trap_ContextManagement_Id_callStackUnderflow
IfxCpu_Trap_ContextManagement_Id_contextType
IfxCpu_Trap_ContextManagement_Id_nestingError

Definition at line 121 of file IfxCpu_Trap.h.

◆ IfxCpu_Trap_InstructionErrors_Id

enum IfxCpu_Trap_InstructionErrors_Id

Enum for available Identification numbers under Instruction Errors Trap.

Enumerator
IfxCpu_Trap_InstructionErrors_Id_illegalOpcode
IfxCpu_Trap_InstructionErrors_Id_unimplementedOpcode
IfxCpu_Trap_InstructionErrors_Id_invalidOperand
IfxCpu_Trap_InstructionErrors_Id_dataAddressAlignment
IfxCpu_Trap_InstructionErrors_Id_invalidMemoryAddress

Definition at line 109 of file IfxCpu_Trap.h.

◆ IfxCpu_Trap_InternalProtection_Id

enum IfxCpu_Trap_InternalProtection_Id

Enum for available Identification numbers under Internal Protection Trap.

Enumerator
IfxCpu_Trap_InternalProtection_Id_privilegeViolation
IfxCpu_Trap_InternalProtection_Id_memoryProtectionRead
IfxCpu_Trap_InternalProtection_Id_memoryProtectionWrite
IfxCpu_Trap_InternalProtection_Id_memoryProtectionExecute
IfxCpu_Trap_InternalProtection_Id_memoryProtectionPeripheralAccess
IfxCpu_Trap_InternalProtection_Id_memoryProtectionNullAddress
IfxCpu_Trap_InternalProtection_Id_globalRegisterWriteProtection

Definition at line 95 of file IfxCpu_Trap.h.

◆ IfxCpu_Trap_MemoryManagement_Id

enum IfxCpu_Trap_MemoryManagement_Id

Enum for available Identification numbers under Memory Management Trap.

Enumerator
IfxCpu_Trap_MemoryManagement_Id_virtualAddressFill
IfxCpu_Trap_MemoryManagement_Id_virtualAddressProtection

Definition at line 86 of file IfxCpu_Trap.h.


iLLD_TC38A: How to use the Trap Function Hooks?

How to use the Trap Function Hooks?
iLLD » CPU » Trap Functions

Macro to define the trap vector table. This macro is provided to define the trap vector table in the frameowrk. User shall not use this macro. Refer to the documentation to extend the trap with hook functions. How to use the Trap Function Hooks?. More...

Collaboration diagram for How to use the Trap Function Hooks?:

Macro to define the trap vector table. This macro is provided to define the trap vector table in the frameowrk. User shall not use this macro. Refer to the documentation to extend the trap with hook functions. How to use the Trap Function Hooks?.

This page describes how to use the trap function hooks with application framework.
Framework has built in Trap Service Routines, which has minimal set of debug information. The execution of trap service is as below,
1) When a trap occurs, a variable "trapInfo" is updated with the information:
a. Which CPU caused this trap,
b. What is the trap address, trap class and
c. What is the trap identification number
2) Call to a configurable hook function, passing structure trapInfo as parameter.
3) Then debug instruction executed.
4) Returning from the trap. (This instruction is not reached if debugger is connected because of "debug" instruction before)
For normal cases during development, where user works with debugger, user can watch the structure variable "trapInfo" in the debugger.

In case, user wants to make use of the information of trap for further processing,
extend the traps, using the hook functions provided.

Extending the traps with hook functions.

If the trap extensions are to be extended, it is very important to enable this feature. By default this feature is disabled.

How to enable the trap extension feature?

To extend the trap hook functions user must enable this feature by defining the macro "IFX_CFG_EXTEND_TRAP_HOOKS" in Ifx_Cfg.h, as shown below.

//file: Ifx_Cfg.h
#define IFX_CFG_EXTEND_TRAP_HOOKS

Now the compiler will accept the further configurations to extend the hooks.
Ifx_Cfg_Trap.h file shall be used to extend the traps. This provides two kind of hook functions. ie. Hook for error traps and hooks (per CPU available) for system calls.

Extending the "Error traps" with hook function.

Error trap occurs as a result of an error event such as an instruction error, memory-management error or an illegal access.
To extend the error traps, following steps are to be followed:

Step1: Define a routine to substitute the hook for error traps.

This definition shall be as user defined code (Generally in DemoApps folder).
Considerations:

  1. Format: IFX_INLINE void <trap extension name>(IfxCpu_Trap trapInfo)
    Note
    Define such a routine with the consideration that the trap extension hook is not a function. In case of context management error, this extension itself will not call any other function.
  2. Use the information trapInfo, which is available as parameter passed to this hook and process further. Example code in a user defined file eg. Ifx_TrapExtension.h,
    //Example "inlined" function for trap Extension Hook.
    IFX_INLINE myTrapExtensionHook(IfxCpu_Trap trapInfo)
    {
    switch (trapInfo.tClass)
    {
    case IfxCpu_Trap_Class_memoryManagement:
    {
    //user code: Function calls allowed.
    break;
    }
    case IfxCpu_Trap_Class_internalProtection:
    {
    //user code: Function calls allowed.
    break;
    }
    case IfxCpu_Trap_Class_instructionErrors:
    {
    //user code: Function calls allowed.
    break;
    }
    case IfxCpu_Trap_Class_contextManagement:
    {
    //user code: Function calls NOT allowed.
    break;
    }
    case IfxCpu_Trap_Class_bus:
    {
    //user code: Function calls allowed.
    break;
    }
    case IfxCpu_Trap_Class_assertion:
    {
    //user code: Function calls allowed.
    break;
    }
    case IfxCpu_Trap_Class_nonMaskableInterrupt:
    {
    //user code: Function calls allowed.
    break;
    }
    case default:
    {
    break;
    }
    }
    }
    Note
    The error trap functions execute the debug instruction immediately after returning from extension hooks.

Step2: Configure error trap hook extension function.

Configure error trap hook extension function as defined above to the macro as below:

Note
Configuration of hook extension is available in Ifx_Cfg_Trap.h
//file: Ifx_Cfg_Trap.h
#include "Ifx_TrapExtension.h" //Assuming this is the file name as in above example
#define IFX_CFG_CPU_TRAP_TSR_HOOK(trapInfo) myTrapExtensionHook(trapInfo) //This is INLINE function.
Note
The exten hooks are effective only if the feature is enabled.

Extending the cpu specific "system call" hook functions.

Tricore architecture provides the system call trap which is executed by software trigger. The instruction "syscall" triggers this trap. Please refer Tricore architecture manual for more details.
IfxCpu_trap driver provide hook function for each CPU separately. To extend System Call trap following steps are to be followed:

Step1: Define routine/s to substitute the hook/s for System Call trap.

This definition shall be as user defined code (Generally in DemoApps folder).
Considerations:

  1. Format: void <syscall function name>(IfxCpu_Trap trapInfo) It is allowed to define this trap extension as function definition, because this trap is not triggered due to any error. Depending on the application requirement, define single or per CPU instance of the extension.
  2. Use the information trapInfo which is available as parameter passed to this hook and process further. The parameter passed, with syscall instruction, will be trap identification number (refer to Tricore architecture manual for more details).
    Note
    To hook extension, information about trap identification number is available through parameter "trapInfo".
    Example code in a user defined file eg. Ifx_TrapExtension.h,
    //Example function for System Call Extension Hook.
    IFX_INLINE mySysCallExtensionHook(IfxCpu_Trap trapInfo)
    {
    switch (trapInfo.tId)
    {
    case 0:
    {
    //user code: Function calls allowed.
    break;
    }
    case 1:
    {
    //user code: Function calls allowed.
    break;
    }
    // and so on..
    case default:
    {
    break;
    }
    }
    }

Step2: Configure the extension function.\n

Configure the hook extension function defined above, to the macro as below:

Note
Configuration of hook extension is available in Ifx_Cfg_Trap.h
//file: Ifx_Cfg_Trap.h
#include "Ifx_TrapExtension.h" //Assuming this is the file name as in above example
#define IFXCPU_TRAP_CFG_SYSCALL_CPU0_HOOK(trapInfo) mySysCallExtensionHook(trapInfo)
#define IFXCPU_TRAP_CFG_SYSCALL_CPU1_HOOK(trapInfo) // Not used in this example
#define IFXCPU_TRAP_CFG_SYSCALL_CPU2_HOOK(trapInfo) // Not used in this example
#define IFXCPU_TRAP_CFG_SYSCALL_CPU3_HOOK(trapInfo) // Not used in this example
#define IFXCPU_TRAP_CFG_SYSCALL_CPU4_HOOK(trapInfo) // Not used in this example
#define IFXCPU_TRAP_CFG_SYSCALL_CPU5_HOOK(trapInfo) // Not used in this example
The exten hooks are effective only if this feature is enabled.


iLLD_TC38A: IfxCpu_cfg.h File Reference

  • _Impl
Macros | Enumerations | Variables
IfxCpu_cfg.h File Reference
iLLD » CPU

CPU on-chip implementation data. More...

#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "IfxCpu_reg.h"
Include dependency graph for IfxCpu_cfg.h:

Go to the source code of this file.

Macros

#define | IFXCPU_NUM_MODULES (4)
CPU count. More...
#define | IFXCPU_CACHABLE_FLASH_SEGMENT (8)
Segment number of cachable flash region. More...
#define | IFXCPU_CACHABLE_LMU_SEGMENT (9)
Segment number of cachable LMU region. More...
#define | IFXCPU_CFG_ALLCORE_DONE (0xF)
All cores (coreIDs) mask. This macro can be defined by the user according to the number of core being enabled. So that can be used for syncronisation among multiple cores. In case user didn't define this macro, by default this mask will be generated for all the available cores of the device. e.g: More...
#define | IFXCPU_ALLCORE_DONE IFXCPU_CFG_ALLCORE_DONE

Enumerations

enum IfxCpu_DBGST_HALT {
IfxCpu_DBGST_HALT_run = 0,
IfxCpu_DBGST_HALT_halt = 1
}
Halt status. More...
enum IfxCpu_Id {
IfxCpu_Id_0 = 0,
IfxCpu_Id_1 = 1,
IfxCpu_Id_2 = 2,
IfxCpu_Id_3 = 3,
IfxCpu_Id_none
}
List of the available CPU ids. More...
enum IfxCpu_Index {
IfxCpu_Index_0 = 0,
IfxCpu_Index_1 = 1,
IfxCpu_Index_2 = 2,
IfxCpu_Index_3 = 3,
IfxCpu_Index_none
}
List of the available CPU resources. More...
enum IfxCpu_PMCSR_PMST {
IfxCpu_PMCSR_PMST_normalMode = 1,
IfxCpu_PMCSR_PMST_idleModeRequest = 2,
IfxCpu_PMCSR_PMST_idleMode = 3,
IfxCpu_PMCSR_PMST_sleepModeRequest = 4,
IfxCpu_PMCSR_PMST_standbyModeRequest = 6
}
Power management status. More...
enum IfxCpu_ResourceCpu {
IfxCpu_ResourceCpu_0 = IfxCpu_Index_0,
IfxCpu_ResourceCpu_1 = IfxCpu_Index_1,
IfxCpu_ResourceCpu_2 = IfxCpu_Index_2,
IfxCpu_ResourceCpu_3 = IfxCpu_Index_3,
IfxCpu_ResourceCpu_none = IfxCpu_Index_none
}
List of the available CPU resources. More...

Variables

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxCpu_cfg_indexMap [IFXCPU_NUM_MODULES]

Detailed Description

CPU on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCpu_cfg.h.

Macro Definition Documentation

◆ IFXCPU_ALLCORE_DONE

#define IFXCPU_ALLCORE_DONE IFXCPU_CFG_ALLCORE_DONE

Definition at line 101 of file IfxCpu_cfg.h.

◆ IFXCPU_CACHABLE_FLASH_SEGMENT

#define IFXCPU_CACHABLE_FLASH_SEGMENT (8)

Segment number of cachable flash region.

Definition at line 69 of file IfxCpu_cfg.h.

Referenced by IfxCpu_isAddressCachable().

◆ IFXCPU_CACHABLE_LMU_SEGMENT

#define IFXCPU_CACHABLE_LMU_SEGMENT (9)

Segment number of cachable LMU region.

Definition at line 73 of file IfxCpu_cfg.h.

Referenced by IfxCpu_isAddressCachable().

◆ IFXCPU_CFG_ALLCORE_DONE

#define IFXCPU_CFG_ALLCORE_DONE (0xF)

All cores (coreIDs) mask. This macro can be defined by the user according to the number of core being enabled. So that can be used for syncronisation among multiple cores. In case user didn't define this macro, by default this mask will be generated for all the available cores of the device. e.g:

  1. Check for synchronisation between core 0 and core 5

    define 0x41U

  1. Check for synchronisation between core 0 to core 5

    define 0x5FU

Note: Core id values read from CORE_ID register will be as shown below. The value indicates the position of the bit needs to be set while building the macro. Core 0: 0 Core 1: 1 Core 2: 2 Core 3: 3 Core 4: 4 Core 5: 6

Definition at line 95 of file IfxCpu_cfg.h.

Referenced by IfxCpu_waitEvent().

◆ IFXCPU_NUM_MODULES

#define IFXCPU_NUM_MODULES (4)

CPU count.

Definition at line 65 of file IfxCpu_cfg.h.

Referenced by IfxCpu_getIndex(), and IfxCpu_Irq_getTos().

Enumeration Type Documentation

◆ IfxCpu_DBGST_HALT

enum IfxCpu_DBGST_HALT

Halt status.

Enumerator
IfxCpu_DBGST_HALT_run
IfxCpu_DBGST_HALT_halt

Definition at line 116 of file IfxCpu_cfg.h.

◆ IfxCpu_Id

enum IfxCpu_Id

List of the available CPU ids.

Enumerator
IfxCpu_Id_0 | CPU 0.
IfxCpu_Id_1 | CPU 1.
IfxCpu_Id_2 | CPU 2.
IfxCpu_Id_3 | CPU 3.
IfxCpu_Id_none | None of the CPU.

Definition at line 124 of file IfxCpu_cfg.h.

◆ IfxCpu_Index

enum IfxCpu_Index

List of the available CPU resources.

Enumerator
IfxCpu_Index_0 | CPU 0.
IfxCpu_Index_1 | CPU 1.
IfxCpu_Index_2 | CPU 2.
IfxCpu_Index_3 | CPU 3.
IfxCpu_Index_none | None of the CPU.

Definition at line 135 of file IfxCpu_cfg.h.

◆ IfxCpu_PMCSR_PMST

enum IfxCpu_PMCSR_PMST

Power management status.

Enumerator
IfxCpu_PMCSR_PMST_normalMode
IfxCpu_PMCSR_PMST_idleModeRequest
IfxCpu_PMCSR_PMST_idleMode
IfxCpu_PMCSR_PMST_sleepModeRequest
IfxCpu_PMCSR_PMST_standbyModeRequest

Definition at line 146 of file IfxCpu_cfg.h.

◆ IfxCpu_ResourceCpu

enum IfxCpu_ResourceCpu

List of the available CPU resources.

Enumerator
IfxCpu_ResourceCpu_0 | CPU 0.
IfxCpu_ResourceCpu_1 | CPU 1.
IfxCpu_ResourceCpu_2 | CPU 2.
IfxCpu_ResourceCpu_3 | CPU 3.
IfxCpu_ResourceCpu_none | None of the CPU.

Definition at line 157 of file IfxCpu_cfg.h.

Variable Documentation

◆ IfxCpu_cfg_indexMap

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxCpu_cfg_indexMap[IFXCPU_NUM_MODULES]

Definition at line 170 of file IfxCpu_cfg.h.


iLLD_TC38A: IfxCpu.h File Reference

  • Cpu
  • Std
Data Structures | Macros | Typedefs | Enumerations | Functions
IfxCpu.h File Reference
iLLD » CPU

CPU basic functionality. More...

#include "_Impl/IfxCpu_cfg.h"
#include "IfxSrc_reg.h"
#include "IfxScu_reg.h"
#include "IfxStm_reg.h"
#include "_Impl/IfxScu_cfg.h"
#include "_Utilities/Ifx_Assert.h"
#include "Scu/Std/IfxScuWdt.h"
#include "Scu/Std/IfxScuCcu.h"
Include dependency graph for IfxCpu.h:

Go to the source code of this file.

Data Structures

struct | IfxCpu_Counter
counter More...
struct | IfxCpu_Perf
Performance counter result. More...

Macros

#define | IFXCPU_GLB_ADDR_DSPR(cpu, address) ((((((unsigned)(address) & 0xF0000000) == 0xD0000000) ? ((((unsigned)(address) & 0x000fffff) | 0x70000000) - ((cpu) * 0x10000000)) : (unsigned)(address))))
Convert local DSPR address to global DSPR address which can be accessed from the SRI bus. Use this macro to convert a local DSPR address (in segment 0xd00.....) to a global DSPR address (in segment 0x700....., 0x600....., 0x500..... downwards) depending on the CPU number. Example usage: More...
#define | IFXCPU_GLB_ADDR_PSPR(cpu, address) ((((unsigned)(address) & 0x000fffff) | 0x70100000) - ((cpu) * 0x10000000))
Convert local PSPR address to global PSPR address which can be accessed from the SRI bus. Use this macro to convert a local PSPR address (in segment 0xc......) to a global PSPR address (in segment 0x701....., 0x601....., 0x501..... downwards) depending on the CPU number. More...

Typedefs

typedef unsigned int | IfxCpu_spinLock
Lock type Spin lock. More...
typedef unsigned int | IfxCpu_mutexLock
Lock type Mutex lock. More...
typedef unsigned int | IfxCpu_syncEvent
Event used for synchronisation. More...

Enumerations

enum IfxCpu_CoreMode {
IfxCpu_CoreMode_halt,
IfxCpu_CoreMode_run,
IfxCpu_CoreMode_idle,
IfxCpu_CoreMode_sleep,
IfxCpu_CoreMode_stby,
IfxCpu_CoreMode_unknown
}
Enumeration for the Cpu mode. More...
enum IfxCpu_CounterMode {
IfxCpu_CounterMode_normal = 0,
IfxCpu_CounterMode_task = 1
}
Performance conunter modes. More...
enum IfxCpu_OverlayAddressMask {
IfxCpu_OverlayAddressMask_32byte = 0xFFF,
IfxCpu_OverlayAddressMask_64byte = 0xFFE,
IfxCpu_OverlayAddressMask_128byte = 0xFFC,
IfxCpu_OverlayAddressMask_256byte = 0xFF8,
IfxCpu_OverlayAddressMask_512byte = 0xFF0,
IfxCpu_OverlayAddressMask_1KB = 0xFE0,
IfxCpu_OverlayAddressMask_2KB = 0xFC0,
IfxCpu_OverlayAddressMask_4KB = 0xF80,
IfxCpu_OverlayAddressMask_8KB = 0xF00,
IfxCpu_OverlayAddressMask_16KB = 0xE00,
IfxCpu_OverlayAddressMask_32KB = 0xC00,
IfxCpu_OverlayAddressMask_64KB = 0x800,
IfxCpu_OverlayAddressMask_128KB = 0x0
}
Overlay Address Mask: determines the overlay block size and the bits used for address comparison and translation. More...
enum IfxCpu_OverlayMemorySelect {
IfxCpu_OverlayMemorySelect_core0DsprPspr = 0,
IfxCpu_OverlayMemorySelect_core1DsprPspr = 1,
IfxCpu_OverlayMemorySelect_core2DsprPspr = 2,
IfxCpu_OverlayMemorySelect_core3DsprPspr = 3,
IfxCpu_OverlayMemorySelect_lmu = 8
}
Selects overlay memory used for redirection. More...
enum IfxCpu_ResetStatus {
IfxCpu_ResetStatus_notCpuReset = 0,
IfxCpu_ResetStatus_cpuResetBySmu = 1,
IfxCpu_ResetStatus_cpuResetBySw = 2
}

Functions

IFX_INLINE Ifx_CPU * | IfxCpu_getAddress (IfxCpu_ResourceCpu cpu)
API to get the address for CPU HW module register memory map. More...
IFX_INLINE IfxCpu_Id | IfxCpu_getCoreId (void)
API to get core id of the CPU of the caller. Caution: Core id of the cpu's may not be continguous and shouldn't be used to index cpu. Use IfxCpu_getCoreIndex() to get cpu no. More...
IFX_INLINE IfxCpu_ResourceCpu | IfxCpu_getCoreIndex (void)
API to get cpu index of the caller CPU. Note: This api can be used whereever cpu no/index is needed. More...
IFX_INLINE void | IfxCpu_initCSA (uint32 *csaBegin, uint32 *csaEnd)
API to initialize the context save area of the CPU where this is called. More...
IFX_INLINE void | IfxCpu_setSafetyTaskIdentifier (boolean safetyId)
Set/Clear safety task identifier (PSW.S) on current CPU. More...
IFX_INLINE void | IfxCpu_triggerSwReset (void)
Triggers Software Reset. More...
IFX_EXTERN IfxCpu_CoreMode | IfxCpu_getCoreMode (Ifx_CPU *cpu)
API to get current mode of CPU. More...
IFX_EXTERN IfxCpu_ResourceCpu | IfxCpu_getIndex (Ifx_CPU *cpu)
API to get current mode of CPU. More...
IFX_EXTERN boolean | IfxCpu_setCoreMode (Ifx_CPU *cpu, IfxCpu_CoreMode mode)
API to set mode of the CPU. More...
IFX_EXTERN boolean | IfxCpu_setProgramCounter (Ifx_CPU *cpu, uint32 programCounter)
API to set the program counter for the CPU specified. More...
IFX_EXTERN boolean | IfxCpu_startCore (Ifx_CPU *cpu, uint32 programCounter)
API to set the program counter for the CPU specified and start the CPU. More...
IFX_EXTERN void | IfxCpu_triggerCpuReset (IfxCpu_ResourceCpu coreIndex)
To request reset of a particular core, given by coreId. More...
IFX_EXTERN IfxCpu_ResetStatus | IfxCpu_getCpuResetStatus (IfxCpu_ResourceCpu coreIndex)
Retrieve the cause of reset(no reset, hardware(SMU) or software) since last clear by reading KRST0.RSTSTAT and clear it. More...
IFX_INLINE boolean | IfxCpu_areInterruptsEnabled (void)
API to get the status of global interrupt enable (ICR.IE) for the CPU which calls this API This API provides the status of CPU where this API is called. More...
IFX_INLINE boolean | IfxCpu_disableInterrupts (void)
API to disable global interrupt and return the previous status. More...
IFX_INLINE void | IfxCpu_enableInterrupts (void)
API to enable global interrupt. This API simply enables the global interrupt. More...
IFX_INLINE void | IfxCpu_forceDisableInterrupts (void)
Disable the Global Interrupt. More...
IFX_INLINE void | IfxCpu_restoreInterrupts (boolean enabled)
API to restore global interrupt with that of the passed parameter. More...
IFX_INLINE void | IfxCpu_enableSegmentSpecificDataAccessCacheability (uint16 segmentNumberMask, boolean enable)
API to enable/ disable the data cacheability for selected segments With this API cacheability for one or more segment can be enabled/disabled for the CPU core where this API is called. This API is to be called only if the PCACHE or DCACHE are not enabled before. More...
IFX_INLINE void | IfxCpu_enableSegmentSpecificInstructionAccessCacheability (uint16 segmentNumberMask, boolean enable)
API to enable/ disable the instruction cacheability for selected segments With this API cacheability for one or more segment can be enabled/disabled for the CPU core where this API is called. This API is to be called only if the PCACHE or DCACHE are not enabled before. More...
IFX_INLINE void | IfxCpu_invalidateProgramCache (void)
API to invalidate the program cache. More...
IFX_INLINE boolean | IfxCpu_isAddressCachable (void *address)
API to determine if an address is in a cachable or non-cachable Flash/LMU section. More...
IFX_INLINE void | IfxCpu_setDataCache (boolean enable)
API to enable or bypass the data cache for the CPU which calls this API. More...
IFX_INLINE void | IfxCpu_setProgramCache (boolean enable)
API to enable or bypass the program cache for the CPU which calls this API. More...
IFX_INLINE uint32 | IfxCpu_getClockCounter (void)
API to read the clock counter for the CPU which calls this API. More...
IFX_INLINE boolean | IfxCpu_getClockCounterStickyOverflow (void)
API to get sticky overflow bit of clock counter for the CPU, which calls this API. More...
IFX_INLINE uint32 | IfxCpu_getInstructionCounter (void)
API to read the instruction counter for the CPU which calls this API. More...
IFX_INLINE boolean | IfxCpu_getInstructionCounterStickyOverflow (void)
API to get sticky overflow bit of Instruction counter for the CPU, which calls this API. More...
IFX_INLINE uint32 | IfxCpu_getPerformanceCounter (uint16 address)
API to read the performance counter for the CPU which calls this API. More...
IFX_INLINE boolean | IfxCpu_getPerformanceCounterStickyOverflow (uint16 address)
API to get sticky overflow bit of performance counter for the CPU, which calls this API. This is generic function to get sticky overflow bit of any performance counters. More...
IFX_INLINE void | IfxCpu_resetAndStartCounters (IfxCpu_CounterMode mode)
Reset and start instruction, clock and multi counters. More...
IFX_INLINE void | IfxCpu_setPerformanceCountersEnableBit (uint32 enable)
API to enable or disable performance counter for the CPU which calls this API. More...
IFX_INLINE IfxCpu_Perf | IfxCpu_stopCounters (void)
Stop instruction and clock counters, return their values. More...
IFX_INLINE void | IfxCpu_updateClockCounter (uint32 count)
API to update clock counter for the CPU which calls this API. More...
IFX_INLINE void | IfxCpu_updateInstructionCounter (uint32 count)
API to update Instruction counter for the CPU which calls this API. More...
IFX_INLINE void | IfxCpu_updatePerformanceCounter (uint32 address, uint32 count)
API to update performance counter for the CPU which calls this API. This is generic function to update any of the performance counters. More...
IFX_EXTERN boolean | IfxCpu_acquireMutex (IfxCpu_mutexLock *lock)
API to acquire the mutex (binary semaphore). More...
IFX_EXTERN void | IfxCpu_releaseMutex (IfxCpu_mutexLock *lock)
API to unlock the mutex . More...
IFX_EXTERN void | IfxCpu_resetSpinLock (IfxCpu_spinLock *lock)
API to unlock the resource . More...
IFX_EXTERN boolean | IfxCpu_setSpinLock (IfxCpu_spinLock *lock, uint32 timeoutCount)
API to lock the resource in spin mode with the given timeout. More...
IFX_EXTERN void | IfxCpu_disableOverlayBlock (IfxCpu_ResourceCpu cpu, uint16 overlayBlock)
This function disables the overlay memory. More...
IFX_EXTERN void | IfxCpu_enableOverlayBlock (IfxCpu_ResourceCpu cpu, uint16 overlayBlock, IfxCpu_OverlayMemorySelect overlayMemorySelect, IfxCpu_OverlayAddressMask overlayAddressMask, uint32 targetBaseAddress, uint32 overlayBaseAddress)
This function configures and enables the overlay memory. Note: The data overlay provides the capability to redirect selected data accesses to the Overlay memory. Data accesses made by the TriCore to Program Flash, Online Data Acquisition space, or EBU space can be redirected. Overlay memory may be located in the Local Memory (if present), in the Emulation Memory (Emulation Device only), or in the EBU space,or in the DPSR/PSPR memory. More...
IFX_EXTERN uint32 | IfxCpu_getRandomValue (uint32 *seed)
API to get random value. More...
IFX_EXTERN uint32 | IfxCpu_getRandomValueWithinRange (uint32 *seed, uint32 min, uint32 max)
API to get random value with in the range. More...
IFX_EXTERN boolean | IfxCpu_waitEvent (IfxCpu_syncEvent *event, uint32 timeoutMilliSec)
This function waits till all the cores have set their corresponding bits in the event. This function along with IfxCpu_emitEvent() are used to achieve the synchronisation between the configured cores. By default "IFXCPU_CFG_ALLCORE_DONE" macro defined for all the cores. In case the user wants to check for synchronisation among the required cores, the macro can be redefined with the value accroing to the CORE_ID register. The IfxCpu_emitEvent() is to be used in the Main functions of the Cores where the user wants to check for synchronisation. More...
IFX_EXTERN void | IfxCpu_emitEvent (IfxCpu_syncEvent *event)
This function sets a bit corresponding to the core in the event. More...
IFX_EXTERN void | IfxCpu_setAllIdleExceptMasterCpu (IfxCpu_ResourceCpu masterCpu)
Sets all CPUs to Idle mode except the Master CPU,index of which is given as the parameter. More...
IFX_EXTERN void | IfxCpu_disableInterruptsAllExceptMaster (IfxCpu_ResourceCpu masterCpu)
Disables interrupts for all CPUs except the Master CPU,index of which is given as the parameter. More...

Detailed Description

CPU basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCpu.h.

Macro Definition Documentation

◆ IFXCPU_GLB_ADDR_DSPR

#define IFXCPU_GLB_ADDR_DSPR | ( | cpu,
 |  | address
 | ) | ((((((unsigned)(address) & 0xF0000000) == 0xD0000000) ? ((((unsigned)(address) & 0x000fffff) | 0x70000000) - ((cpu) * 0x10000000)) : (unsigned)(address))))

Convert local DSPR address to global DSPR address which can be accessed from the SRI bus. Use this macro to convert a local DSPR address (in segment 0xd00.....) to a global DSPR address (in segment 0x700....., 0x600....., 0x500..... downwards) depending on the CPU number. Example usage:

dmaChConfig.sourceAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &sourceBuffer[i][0]);
dmaChConfig.destinationAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &destinationBuffer[i][0]);

Definition at line 90 of file IfxCpu.h.

Referenced by IfxCpu_waitEvent(), IfxFce_Crc_calculateCrc(), IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), and IfxQspi_SpiSlave_write().

◆ IFXCPU_GLB_ADDR_PSPR

#define IFXCPU_GLB_ADDR_PSPR | ( | cpu,
 |  | address
 | ) | ((((unsigned)(address) & 0x000fffff) | 0x70100000) - ((cpu) * 0x10000000))

Convert local PSPR address to global PSPR address which can be accessed from the SRI bus. Use this macro to convert a local PSPR address (in segment 0xc......) to a global PSPR address (in segment 0x701....., 0x601....., 0x501..... downwards) depending on the CPU number.

Example usage:

dmaChConfig.sourceAddress = IFXCPU_GLB_ADDR_PSPR(IfxCpu_getCoreId(), &sourceBufferInPsprMemory);
dmaChConfig.destinationAddress = IFXCPU_GLB_ADDR_PSPR(IfxCpu_getCoreId(), &destinationBufferInPsprMemory);

Definition at line 103 of file IfxCpu.h.

Typedef Documentation

◆ IfxCpu_mutexLock

typedef unsigned int IfxCpu_mutexLock

Lock type Mutex lock.

Definition at line 115 of file IfxCpu.h.

◆ IfxCpu_spinLock

typedef unsigned int IfxCpu_spinLock

Lock type Spin lock.

Definition at line 111 of file IfxCpu.h.

◆ IfxCpu_syncEvent

typedef unsigned int IfxCpu_syncEvent

Event used for synchronisation.

Definition at line 119 of file IfxCpu.h.

Function Documentation

◆ IfxCpu_disableInterruptsAllExceptMaster()

IFX_EXTERN void IfxCpu_disableInterruptsAllExceptMaster ( IfxCpu_ResourceCpu masterCpu )

Disables interrupts for all CPUs except the Master CPU,index of which is given as the parameter.

Parameters
masterCpu Master CPU Index- All except this will have their interrupts disabled
Returns
None

Definition at line 632 of file IfxCpu.c.

Referenced by IfxPmsPm_startStandbySequenceInFlash().

◆ IfxCpu_setAllIdleExceptMasterCpu()

IFX_EXTERN void IfxCpu_setAllIdleExceptMasterCpu ( IfxCpu_ResourceCpu masterCpu )

Sets all CPUs to Idle mode except the Master CPU,index of which is given as the parameter.

Parameters
masterCpu Master CPU Index- All except this will be set to Idle Mode
Returns
None

Definition at line 544 of file IfxCpu.c.

Referenced by IfxPmsPm_startSleepSequenceinFlash(), and IfxPmsPm_startStandbySequenceInFlash().


iLLD_TC38A: DMA

Modules | Files
DMA
iLLD
Collaboration diagram for DMA:

Modules

Implementation
Standard Driver
How to use the DMA Interface driver?
DMA

Files

file | IfxDma_cfg.h
DMA on-chip implementation data.
file | IfxDma_Dma.h
DMA DMA details.
file | IfxDma.h
DMA basic functionality.

Detailed Description


iLLD_TC38A: Implementation

Implementation
iLLD » DMA
Collaboration diagram for Implementation:


iLLD_TC38A: Standard Driver

Modules
Standard Driver
iLLD » DMA
Collaboration diagram for Standard Driver:

Modules

Enumerations
Reset Functions
Channel Transaction Functions
Move Engine functions
Channel configuration Functions
Channel Halt Functions
Double Buffer functions
Interrupt functions

Detailed Description


iLLD_TC38A: Enumerations

Enumerations
Enumerations
iLLD » DMA » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxDma_BusMasterMode {
IfxDma_BusMasterMode_user = 0,
IfxDma_BusMasterMode_supervisor = 1
}
Bus Master Mode definition Definition in Ifx_DMA.MODE[4].B.MODE. More...
enum IfxDma_ChannelBusPriority {
IfxDma_ChannelBusPriority_low = 0,
IfxDma_ChannelBusPriority_medium = 1,
IfxDma_ChannelBusPriority_high = 2
}
Channel Bus Priority definition. More...
enum IfxDma_ChannelIncrementCircular {
IfxDma_ChannelIncrementCircular_none = 0,
IfxDma_ChannelIncrementCircular_2 = 1,
IfxDma_ChannelIncrementCircular_4 = 2,
IfxDma_ChannelIncrementCircular_8 = 3,
IfxDma_ChannelIncrementCircular_16 = 4,
IfxDma_ChannelIncrementCircular_32 = 5,
IfxDma_ChannelIncrementCircular_64 = 6,
IfxDma_ChannelIncrementCircular_128 = 7,
IfxDma_ChannelIncrementCircular_256 = 8,
IfxDma_ChannelIncrementCircular_512 = 9,
IfxDma_ChannelIncrementCircular_1024 = 10,
IfxDma_ChannelIncrementCircular_2048 = 11,
IfxDma_ChannelIncrementCircular_4096 = 12,
IfxDma_ChannelIncrementCircular_8192 = 13,
IfxDma_ChannelIncrementCircular_16384 = 14,
IfxDma_ChannelIncrementCircular_32768 = 15
}
DMA circular buffer (wrap around) definition Definition in Ifx_DMA.CH[64].ADICR.B.CBLS and Ifx_DMA.CH[64].ADICR.B.CBLD. More...
enum IfxDma_ChannelIncrementDirection {
IfxDma_ChannelIncrementDirection_negative = 0,
IfxDma_ChannelIncrementDirection_positive = 1
}
DMA incrementation direction definition Definition in Ifx_DMA.CH[64].ADICR.B.INCS. More...
enum IfxDma_ChannelIncrementStep {
IfxDma_ChannelIncrementStep_1 = 0,
IfxDma_ChannelIncrementStep_2 = 1,
IfxDma_ChannelIncrementStep_4 = 2,
IfxDma_ChannelIncrementStep_8 = 3,
IfxDma_ChannelIncrementStep_16 = 4,
IfxDma_ChannelIncrementStep_32 = 5,
IfxDma_ChannelIncrementStep_64 = 6,
IfxDma_ChannelIncrementStep_128 = 7
}
DMA incrementation definition Definition in Ifx_DMA.CH[64].ADICR.B.SMF. More...
enum IfxDma_ChannelInterruptControl {
IfxDma_ChannelInterruptControl_thresholdLimitMatch = 0,
IfxDma_ChannelInterruptControl_transferCountDecremented = 1
}
Channel Transfer Interrupt generation mechanism. Definition in Ifx_DMA.CH[64].ADICR.B.INTCT (bit 0) More...
enum IfxDma_ChannelMove {
IfxDma_ChannelMove_1 = 0,
IfxDma_ChannelMove_2 = 1,
IfxDma_ChannelMove_4 = 2,
IfxDma_ChannelMove_8 = 3,
IfxDma_ChannelMove_16 = 4,
IfxDma_ChannelMove_3 = 5,
IfxDma_ChannelMove_5 = 6,
IfxDma_ChannelMove_9 = 7
}
DMA transfer definition Definition in Ifx_DMA.ME0.CHCR.B.BLKM and Ifx_DMA.ME1.CHCR.B.BLKM. More...
enum IfxDma_ChannelMoveSize {
IfxDma_ChannelMoveSize_8bit = 0,
IfxDma_ChannelMoveSize_16bit = 1,
IfxDma_ChannelMoveSize_32bit = 2,
IfxDma_ChannelMoveSize_64bit = 3,
IfxDma_ChannelMoveSize_128bit = 4,
IfxDma_ChannelMoveSize_256bit = 5
}
DMA move size definition Definition in Ifx_DMA.ME0.CHCR.B.CHDW and Ifx_DMA.ME1.CHCR.B.CHDW. More...
enum IfxDma_ChannelOperationMode {
IfxDma_ChannelOperationMode_single = 0,
IfxDma_ChannelOperationMode_continuous = 1
}
DMA operation mode Definition in Ifx_DMA.ME0.CHCR.B.CHMODE and Ifx_DMA.ME1.CHCR.B.CHMODE. More...
enum IfxDma_ChannelPattern {
IfxDma_ChannelPattern_0_disable = 0,
IfxDma_ChannelPattern_0_mode1 = 1,
IfxDma_ChannelPattern_0_mode2 = 2,
IfxDma_ChannelPattern_0_mode3 = 3,
IfxDma_ChannelPattern_1_disable = 4,
IfxDma_ChannelPattern_1_mode1 = 5,
IfxDma_ChannelPattern_1_mode2 = 6,
IfxDma_ChannelPattern_1_mode3 = 7
}
Pattern detection selection Definition in Ifx_DMA.ME0.CHCR.B.PATSEL and Ifx_DMA.ME1.CHCR.B.PATSEL. More...
enum IfxDma_ChannelPriority {
IfxDma_ChannelPriority_low = 0,
IfxDma_ChannelPriority_medium = 1,
IfxDma_ChannelPriority_high = 2
}
Channel Priority definition. More...
enum IfxDma_ChannelRequestMode {
IfxDma_ChannelRequestMode_oneTransferPerRequest = 0,
IfxDma_ChannelRequestMode_completeTransactionPerRequest = 1
}
DMA request mode Definition in Ifx_DMA.ME0.CHCR.B.RROAT and Ifx_DMA.ME1.CHCR.B.RROAT. More...
enum IfxDma_ChannelRequestSource {
IfxDma_ChannelRequestSource_peripheral = 0,
IfxDma_ChannelRequestSource_daisyChain = 1
}
DMA request selection Definition in Ifx_DMA.ME0.CHCR.B.PRSEL and Ifx_DMA.ME1.CHCR.B.PRSEL. More...
enum IfxDma_ChannelShadow {
IfxDma_ChannelShadow_none = 0,
IfxDma_ChannelShadow_src = 1,
IfxDma_ChannelShadow_dst = 2,
IfxDma_ChannelShadow_srcDirectWrite = 5,
IfxDma_ChannelShadow_dstDirectWrite = 6,
IfxDma_ChannelShadow_doubleSourceBufferingSwSwitch = 8,
IfxDma_ChannelShadow_doubleSourceBufferingHwSwSwitch = 9,
IfxDma_ChannelShadow_doubleDestinationBufferingSwSwitch = 10,
IfxDma_ChannelShadow_doubleDestinationBufferingHwSwSwitch = 11,
IfxDma_ChannelShadow_linkedList = 12,
IfxDma_ChannelShadow_accumulatedLinkedList = 13,
IfxDma_ChannelShadow_safeLinkedList = 14,
IfxDma_ChannelShadow_conditionalLinkedList = 15
}
shadow definition definition Definition in Ifx_DMA.CH[64].ADICR.B.SHCT More...
enum IfxDma_HardwareResourcePartition {
IfxDma_HardwareResourcePartition_0 = 0,
IfxDma_HardwareResourcePartition_1,
IfxDma_HardwareResourcePartition_2,
IfxDma_HardwareResourcePartition_3
}
enum IfxDma_MoveEngine {
IfxDma_MoveEngine_0 = 0,
IfxDma_MoveEngine_1 = 1
}
DMA move engine definition. More...
enum IfxDma_SleepMode {
IfxDma_SleepMode_enable = 0,
IfxDma_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_DMA.CLC.B.EDIS. More...

Detailed Description

Enumeration Type Documentation

◆ IfxDma_BusMasterMode

enum IfxDma_BusMasterMode

Bus Master Mode definition Definition in Ifx_DMA.MODE[4].B.MODE.

Enumerator
IfxDma_BusMasterMode_user | Selected hardware resource performs Bus access in user mode.
IfxDma_BusMasterMode_supervisor | Selected hardware resource performs Bus access in supervisor mode.

Definition at line 83 of file IfxDma.h.

◆ IfxDma_ChannelBusPriority

enum IfxDma_ChannelBusPriority

Channel Bus Priority definition.

Enumerator
IfxDma_ChannelBusPriority_low | low priority
IfxDma_ChannelBusPriority_medium | medium priority
IfxDma_ChannelBusPriority_high | high priority

Definition at line 91 of file IfxDma.h.

◆ IfxDma_ChannelIncrementCircular

enum IfxDma_ChannelIncrementCircular

DMA circular buffer (wrap around) definition Definition in Ifx_DMA.CH[64].ADICR.B.CBLS and Ifx_DMA.CH[64].ADICR.B.CBLD.

Enumerator
IfxDma_ChannelIncrementCircular_none | no circular buffer operation
IfxDma_ChannelIncrementCircular_2 | circular buffer size is 2 byte
IfxDma_ChannelIncrementCircular_4 | circular buffer size is 4 byte
IfxDma_ChannelIncrementCircular_8 | circular buffer size is 8 byte
IfxDma_ChannelIncrementCircular_16 | circular buffer size is 16 byte
IfxDma_ChannelIncrementCircular_32 | circular buffer size is 32 byte
IfxDma_ChannelIncrementCircular_64 | circular buffer size is 64 byte
IfxDma_ChannelIncrementCircular_128 | circular buffer size is 128 byte
IfxDma_ChannelIncrementCircular_256 | circular buffer size is 256 byte
IfxDma_ChannelIncrementCircular_512 | circular buffer size is 512 byte
IfxDma_ChannelIncrementCircular_1024 | circular buffer size is 1024 byte
IfxDma_ChannelIncrementCircular_2048 | circular buffer size is 2048 byte
IfxDma_ChannelIncrementCircular_4096 | circular buffer size is 4096 byte
IfxDma_ChannelIncrementCircular_8192 | circular buffer size is 8192 byte
IfxDma_ChannelIncrementCircular_16384 | circular buffer size is 16384 byte
IfxDma_ChannelIncrementCircular_32768 | circular buffer size is 32768 byte

Definition at line 101 of file IfxDma.h.

◆ IfxDma_ChannelIncrementDirection

enum IfxDma_ChannelIncrementDirection

DMA incrementation direction definition Definition in Ifx_DMA.CH[64].ADICR.B.INCS.

Enumerator
IfxDma_ChannelIncrementDirection_negative | pointer is decremented
IfxDma_ChannelIncrementDirection_positive | pointer is incremented

Definition at line 124 of file IfxDma.h.

◆ IfxDma_ChannelIncrementStep

enum IfxDma_ChannelIncrementStep

DMA incrementation definition Definition in Ifx_DMA.CH[64].ADICR.B.SMF.

Enumerator
IfxDma_ChannelIncrementStep_1 | increment by 1 width
IfxDma_ChannelIncrementStep_2 | increment by 2 width
IfxDma_ChannelIncrementStep_4 | increment by 4 width
IfxDma_ChannelIncrementStep_8 | increment by 8 width
IfxDma_ChannelIncrementStep_16 | increment by 16 width
IfxDma_ChannelIncrementStep_32 | increment by 32 width
IfxDma_ChannelIncrementStep_64 | increment by 64 width
IfxDma_ChannelIncrementStep_128 | increment by 128 width

Definition at line 133 of file IfxDma.h.

◆ IfxDma_ChannelInterruptControl

enum IfxDma_ChannelInterruptControl

Channel Transfer Interrupt generation mechanism. Definition in Ifx_DMA.CH[64].ADICR.B.INTCT (bit 0)

Enumerator
IfxDma_ChannelInterruptControl_thresholdLimitMatch | interrupt when transfer count (TCOUNT) equals the threshold limit (IRDV)
IfxDma_ChannelInterruptControl_transferCountDecremented | interrupt when transfer count (TCOUNT) is decremented

Definition at line 148 of file IfxDma.h.

◆ IfxDma_ChannelMove

enum IfxDma_ChannelMove

DMA transfer definition Definition in Ifx_DMA.ME0.CHCR.B.BLKM and Ifx_DMA.ME1.CHCR.B.BLKM.

Enumerator
IfxDma_ChannelMove_1 | 1 DMA move per DMA transfer
IfxDma_ChannelMove_2 | 2 DMA move per DMA transfer
IfxDma_ChannelMove_4 | 4 DMA move per DMA transfer
IfxDma_ChannelMove_8 | 8 DMA move per DMA transfer
IfxDma_ChannelMove_16 | 16 DMA move per DMA transfer
IfxDma_ChannelMove_3 | 3 DMA move per DMA transfer
IfxDma_ChannelMove_5 | 5 DMA move per DMA transfer
IfxDma_ChannelMove_9 | 9 DMA move per DMA transfer

Definition at line 157 of file IfxDma.h.

◆ IfxDma_ChannelMoveSize

enum IfxDma_ChannelMoveSize

DMA move size definition Definition in Ifx_DMA.ME0.CHCR.B.CHDW and Ifx_DMA.ME1.CHCR.B.CHDW.

Enumerator
IfxDma_ChannelMoveSize_8bit | 1 DMA move is 8 bit wide
IfxDma_ChannelMoveSize_16bit | 1 DMA move is 16 bit wide
IfxDma_ChannelMoveSize_32bit | 1 DMA move is 32 bit wide
IfxDma_ChannelMoveSize_64bit | 1 DMA move is 64 bit wide
IfxDma_ChannelMoveSize_128bit | 1 DMA move is 128 bit wide
IfxDma_ChannelMoveSize_256bit | 1 DMA move is 256 bit wide

Definition at line 172 of file IfxDma.h.

◆ IfxDma_ChannelOperationMode

enum IfxDma_ChannelOperationMode

DMA operation mode Definition in Ifx_DMA.ME0.CHCR.B.CHMODE and Ifx_DMA.ME1.CHCR.B.CHMODE.

Enumerator
IfxDma_ChannelOperationMode_single | channel disabled after transaction
IfxDma_ChannelOperationMode_continuous | channel stays enabled after transaction

Definition at line 185 of file IfxDma.h.

◆ IfxDma_ChannelPattern

enum IfxDma_ChannelPattern

Pattern detection selection Definition in Ifx_DMA.ME0.CHCR.B.PATSEL and Ifx_DMA.ME1.CHCR.B.PATSEL.

Enumerator
IfxDma_ChannelPattern_0_disable | Pattern detect 0 disabled.
IfxDma_ChannelPattern_0_mode1 | Compare match configuration 1 : pattern compare of MExR.RD[0] to PAT0[0] masked by PAT0[2].
IfxDma_ChannelPattern_0_mode2 | Compare match configuration 2 : pattern compare of MExR.RD[0] to PAT0[1] masked by PAT0[3].
IfxDma_ChannelPattern_0_mode3 | Compare match configuration 3 : pattern compare of MExR.RD[0] to PAT0[0] masked by PAT0[2] of actual DMA read move and pattern compare of MExR.RD[0] to PAT0[1] masked by PAT0[3] of previous DMA read move.
IfxDma_ChannelPattern_1_disable | Pattern detect 1 disabled.
IfxDma_ChannelPattern_1_mode1 | Compare match configuration 1 : pattern compare of MExR.RD[0] to PAT1[0] masked by PAT1[2].
IfxDma_ChannelPattern_1_mode2 | Compare match configuration 2 : pattern compare of MExR.RD[0] to PAT1[1] masked by PAT1[3].
IfxDma_ChannelPattern_1_mode3 | Compare match configuration 3 : pattern compare of MExR.RD[0] to PAT1[0] masked by PAT1[2] of actual DMA read move and pattern compare of MExR.RD[0] to PAT1[1] masked by PAT1[3] of previous DMA read move.

Definition at line 194 of file IfxDma.h.

◆ IfxDma_ChannelPriority

enum IfxDma_ChannelPriority

Channel Priority definition.

Enumerator
IfxDma_ChannelPriority_low | low priority
IfxDma_ChannelPriority_medium | medium priority
IfxDma_ChannelPriority_high | high priority

Definition at line 208 of file IfxDma.h.

◆ IfxDma_ChannelRequestMode

enum IfxDma_ChannelRequestMode

DMA request mode Definition in Ifx_DMA.ME0.CHCR.B.RROAT and Ifx_DMA.ME1.CHCR.B.RROAT.

Enumerator
IfxDma_ChannelRequestMode_oneTransferPerRequest | a request initiates a single transfer
IfxDma_ChannelRequestMode_completeTransactionPerRequest | a request initiates a complete transaction

Definition at line 218 of file IfxDma.h.

◆ IfxDma_ChannelRequestSource

enum IfxDma_ChannelRequestSource

DMA request selection Definition in Ifx_DMA.ME0.CHCR.B.PRSEL and Ifx_DMA.ME1.CHCR.B.PRSEL.

Enumerator
IfxDma_ChannelRequestSource_peripheral | Transfer Request via Hardware Trigger.
IfxDma_ChannelRequestSource_daisyChain | Transfer Request via next (higher priority) channel.

Definition at line 227 of file IfxDma.h.

◆ IfxDma_ChannelShadow

enum IfxDma_ChannelShadow

shadow definition definition Definition in Ifx_DMA.CH[64].ADICR.B.SHCT

Enumerator
IfxDma_ChannelShadow_none | shadow address register not used. Source and destination address register are written directly
IfxDma_ChannelShadow_src | Shadow address register used for source address buffering. When writing to SADRmx, the address is buffered in SHADRmx and transferred to SADRmx with the start of the next DMA transaction.
IfxDma_ChannelShadow_dst | Shadow address register used for destination address buffering. When writing to DADRmx, the address is buffered in SHADRmx and transferred to DADRmx with the start of the next DMA transaction.
IfxDma_ChannelShadow_srcDirectWrite | Shadow address used for source buffering. When writing to SADRz, the address is buffered in SHADRz and transferred to SADRz with the start of the next DMA transaction.
IfxDma_ChannelShadow_dstDirectWrite | Shadow address used for destination buffering. When writing to DADRz, the address is buffered in SHADRz and transferred to DADRz with the start of the next DMA transaction.
IfxDma_ChannelShadow_doubleSourceBufferingSwSwitch | Software switch only. Shadow address used for double buffering.
IfxDma_ChannelShadow_doubleSourceBufferingHwSwSwitch | Automatic Hardware and Software switch. Shadow address used for double buffering.
IfxDma_ChannelShadow_doubleDestinationBufferingSwSwitch | Software switch only. Shadow address used for double buffering.
IfxDma_ChannelShadow_doubleDestinationBufferingHwSwSwitch | Automatic Hardware and Software switch. Shadow address used for double buffering.
IfxDma_ChannelShadow_linkedList | The DMA controller reads a DMA channel transaction control set and overwrites 8 X words in the corresponding DMARAM channel z.
IfxDma_ChannelShadow_accumulatedLinkedList | The DMA controller reads a DMA channel transaction control set and overwrites 6 X words in the corresponding DMARAM channel z.
IfxDma_ChannelShadow_safeLinkedList | The DMA controller reads a DMA channel transaction control set. The Linked List only proceeds with the next DMA transaction if the existing SDCRC checksum matches the expected SDCRC checksum in the loaded from the new DMA transaction control set.
IfxDma_ChannelShadow_conditionalLinkedList | Shadow address register (MExSHADR) and source and destination address CRC register (MExSDCRC) are used as address pointers to a Linked List. The selection of the address pointer is determined by DMA channel pattern detection conditions.

Definition at line 236 of file IfxDma.h.

◆ IfxDma_HardwareResourcePartition

enum IfxDma_HardwareResourcePartition
Enumerator
IfxDma_HardwareResourcePartition_0 | "Set of DMA channels are associated with hardware resource partition " + str(x)
IfxDma_HardwareResourcePartition_1 | "Set of DMA channels are associated with hardware resource partition " + str(x)
IfxDma_HardwareResourcePartition_2 | "Set of DMA channels are associated with hardware resource partition " + str(x)
IfxDma_HardwareResourcePartition_3 | "Set of DMA channels are associated with hardware resource partition " + str(x)

Definition at line 253 of file IfxDma.h.

◆ IfxDma_MoveEngine

enum IfxDma_MoveEngine

DMA move engine definition.

Enumerator
IfxDma_MoveEngine_0 | first move engine
IfxDma_MoveEngine_1 | second move engine

Definition at line 263 of file IfxDma.h.

◆ IfxDma_SleepMode

enum IfxDma_SleepMode

Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_DMA.CLC.B.EDIS.

Enumerator
IfxDma_SleepMode_enable | enables sleep mode
IfxDma_SleepMode_disable | disables sleep mode

Definition at line 272 of file IfxDma.h.


iLLD_TC38A: Reset Functions

Functions
Reset Functions
iLLD » DMA » Standard Driver
Collaboration diagram for Reset Functions:

Functions

IFX_INLINE boolean | IfxDma_isChannelReset (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return the status of a DMA channel (reset / not reset) This API needs to be used after the IfxDma_resetChannel() More...
IFX_INLINE void | IfxDma_resetChannel (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Reset the channel. More...

Detailed Description

Function Documentation

◆ IfxDma_isChannelReset()

IFX_INLINE boolean IfxDma_isChannelReset | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Return the status of a DMA channel (reset / not reset) This API needs to be used after the IfxDma_resetChannel()

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
TRUE if the channel is reset FALSE if the channel is not reset
// check whether the channel is reset or not and also the hardware trigger disabled
if (IfxDma_isChannelReset(chn[0].dma, chn[0].channelId) &&
(!IfxDma_isChannelTransactionEnabled(chn[0].dma, chn[0].channelId))) {
// Dma is out of RESET and there is no hardware request enabled
IfxDma_Dma_startChannelTransaction(&chn[0]);
}

Definition at line 1555 of file IfxDma.h.

Referenced by IfxDma_Dma_deInitChannel().

◆ IfxDma_resetChannel()

IFX_INLINE void IfxDma_resetChannel | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Reset the channel.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None
// Apply reset to the channel
IfxDma_resetChannel(chn[0].dma, chn[0].channelId);

Definition at line 1579 of file IfxDma.h.

Referenced by IfxDma_Dma_deInitChannel().


iLLD_TC38A: Channel Transaction Functions

Functions
Channel Transaction Functions
iLLD » DMA » Standard Driver
Collaboration diagram for Channel Transaction Functions:

Functions

IFX_INLINE void | IfxDma_clearChannelTransactionRequestLost (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Clear the channel transaction request lost flag status. More...
IFX_INLINE void | IfxDma_disableChannelTransaction (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Disable a DMA channel hardware transaction request. More...
IFX_INLINE void | IfxDma_disableChannelTransactionLostError (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Disable the generation of a channel transaction lost error interrupt. More...
IFX_INLINE void | IfxDma_enableChannelTransaction (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Enable a DMA channel hardware transaction request. More...
IFX_INLINE void | IfxDma_enableChannelTransactionLostError (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Enable the generation of a channel transaction lost error interrupt. More...
IFX_INLINE boolean | IfxDma_getChannelTransactionRequestLost (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Check the channel transaction request lost flag status. More...
IFX_INLINE IfxDma_ChannelIncrementCircular | IfxDma_getCircularRangeCode (uint16 range)
Converts DMA circular range to circular code. More...
IFX_INLINE boolean | IfxDma_isChannelTransactionEnabled (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return the hardware transaction request status of a DMA channel. More...
IFX_INLINE boolean | IfxDma_isChannelTransactionPending (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return the status of a DMA channel (transaction pending) More...
IFX_INLINE void | IfxDma_setSleepMode (Ifx_DMA *dma, IfxDma_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxDma_startChannelTransaction (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Request a DMA channel transaction. More...

Detailed Description

Function Documentation

◆ IfxDma_clearChannelTransactionRequestLost()

IFX_INLINE void IfxDma_clearChannelTransactionRequestLost | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Clear the channel transaction request lost flag status.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None
// Clear the channel transaction request lost flag status
IfxDma_clearChannelTransactionRequestLost(chn[0].dma, chn[0].channelId);

Definition at line 1282 of file IfxDma.h.

◆ IfxDma_disableChannelTransaction()

IFX_INLINE void IfxDma_disableChannelTransaction | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Disable a DMA channel hardware transaction request.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None

A coding example can be found in IfxDma_enableChannelTransaction

Definition at line 1307 of file IfxDma.h.

Referenced by IfxDma_Dma_deInitChannel(), and IfxQspi_SpiMaster_isrDmaTransmit().

◆ IfxDma_disableChannelTransactionLostError()

IFX_INLINE void IfxDma_disableChannelTransactionLostError | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Disable the generation of a channel transaction lost error interrupt.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None
// Disable the transaction request lost interrupt for given channel
IfxDma_disableChannelTransactionLostError(chn[0].dma, chn[0].channelId);

Definition at line 1313 of file IfxDma.h.

◆ IfxDma_enableChannelTransaction()

IFX_INLINE void IfxDma_enableChannelTransaction | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Enable a DMA channel hardware transaction request.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None
unsigned *src = (unsigned *)((unsigned)&SRC_DMACH0.U + 4*NUM_CHANNELS);
for(int chn=0; chn<NUM_CHANNELS; ++chn, ++src) {
IfxSrc_setRequest(src);
}
// Do not restrict the hardware triggering to only one transaction
IfxDma_setChannelContinuousMode(chn[0].dma, chn[0].channelId);
IfxDma_setChannelContinuousMode(chn[1].dma, chn[1].channelId);
IfxDma_setChannelContinuousMode(chn[2].dma, chn[2].channelId);
// Check for end of transaction
while(!(IfxDma_getAndClearChannelInterrupt(chn[0].dma, chn[0].channelId)));
// Enable the hardware trigger for channel 3
IfxDma_enableChannelTransaction(chn[3].dma, chn[3].channelId);
// Disable the hardware trigger for channel 2
IfxDma_disableChannelTransaction(chn[2].dma, chn[2].channelId);
// Hardware triggers for second time
unsigned *SRc = (unsigned *)((unsigned)&SRC_DMACH0.U + 4*NUM_CHANNELS);
for(int chn=0; chn<NUM_CHANNELS; ++chn, ++src) {
IfxSrc_setRequest(src);
}
// Restrict the hardware triggering to only one transaction
IfxDma_setChannelSingleMode(chn[0].dma, chn[0].channelId);
IfxDma_setChannelSingleMode(chn[1].dma, chn[1].channelId);

Definition at line 1351 of file IfxDma.h.

Referenced by IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), and IfxQspi_SpiSlave_write().

◆ IfxDma_enableChannelTransactionLostError()

IFX_INLINE void IfxDma_enableChannelTransactionLostError | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Enable the generation of a channel transaction lost error interrupt.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None
// Enable the transaction request lost interrupt for given channel
IfxDma_enableChannelTransactionLostError(chn[0].dma, chn[0].channelId);

Definition at line 1357 of file IfxDma.h.

◆ IfxDma_getChannelTransactionRequestLost()

IFX_INLINE boolean IfxDma_getChannelTransactionRequestLost | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Check the channel transaction request lost flag status.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
TRUE if the TRL is set FALSE if the TRL is not set
boolean trlFlag;
// Check whether the channel transaction request lost flag is set or not
trlFlag = IfxDma_getChannelTransactionRequestLost(chn[0].dma, chn[0].channelId));

Definition at line 1489 of file IfxDma.h.

◆ IfxDma_getCircularRangeCode()

IFX_INLINE IfxDma_ChannelIncrementCircular IfxDma_getCircularRangeCode ( uint16 range )

Converts DMA circular range to circular code.

Parameters
range DMA circular range
Returns
DMA circular code

Definition at line 1501 of file IfxDma.h.

◆ IfxDma_isChannelTransactionEnabled()

IFX_INLINE boolean IfxDma_isChannelTransactionEnabled | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Return the hardware transaction request status of a DMA channel.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
TRUE if the hardware transaction request is enabled FALSE if the hardware transaction request is disabled

A coding example can be found in IfxDma_isChannelReset

Definition at line 1561 of file IfxDma.h.

Referenced by IfxDma_Dma_deInitChannel().

◆ IfxDma_isChannelTransactionPending()

IFX_INLINE boolean IfxDma_isChannelTransactionPending | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Return the status of a DMA channel (transaction pending)

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
TRUE if a transaction request for the given channel is pending
// check for the channel request pending with the channel
if (IfxDma_isChannelTransactionPending(chn[0].dma, chn[0].channelId) == TRUE) {
// There is channel request pending for channel 0
result |= 0;
}

Definition at line 1567 of file IfxDma.h.

Referenced by IfxDma_Dma_isChannelTransactionPending().

◆ IfxDma_setSleepMode()

IFX_INLINE void IfxDma_setSleepMode | ( | Ifx_DMA * | dma,
 |  | IfxDma_SleepMode | mode
 | ) |  |

Sets the sensitivity of the module to sleep signal.

Parameters
dma | pointer to DMA registers
mode | mode selection (enable/disable)
Returns
None

Definition at line 1685 of file IfxDma.h.

◆ IfxDma_startChannelTransaction()

IFX_INLINE void IfxDma_startChannelTransaction | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Request a DMA channel transaction.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None

A coding example can be found in IfxDma_Dma_startChannelTransaction

Definition at line 1694 of file IfxDma.h.

Referenced by IfxDma_Dma_startChannelTransaction(), and IfxQspi_SpiSlave_write().


iLLD_TC38A: Move Engine functions

Functions
Move Engine functions
iLLD » DMA » Standard Driver
Collaboration diagram for Move Engine functions:

Functions

IFX_INLINE void | IfxDma_clearErrorFlags (Ifx_DMA *dma, IfxDma_MoveEngine moveEngine, uint32 mask)
Clear the DMA error status flags. More...
IFX_INLINE void | IfxDma_disableMoveEngineDestinationError (Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
Disable the generation of a Move engine destination error interrupt. More...
IFX_INLINE void | IfxDma_disableMoveEngineSourceError (Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
Disable the generation of a Move engine source error interrupt. More...
IFX_INLINE void | IfxDma_enableMoveEngineDestinationError (Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
Enable the generation of a Move engine destination error interrupt. More...
IFX_INLINE void | IfxDma_enableMoveEngineSourceError (Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
Enable the generation of a Move engine source error interrupt. More...
IFX_INLINE uint32 | IfxDma_getErrorFlags (Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
Return the DMA error status flags. More...

Detailed Description

Function Documentation

◆ IfxDma_clearErrorFlags()

IFX_INLINE void IfxDma_clearErrorFlags | ( | Ifx_DMA * | dma,
 |  | IfxDma_MoveEngine | moveEngine,
 |  | uint32 | mask
 | ) |  |

Clear the DMA error status flags.

Parameters
dma | pointer to DMA module
moveEngine | pointer to the DMA move engine
mask | value holds the bits to clear or mask
Returns
None
// Clear the status of the error flags (as defined in _Impl/IfxDma_cfg.h)
IfxDma_clearErrorFlags(chn[0].dma,IfxDma_MoveEngine_1,
IFXDMA_ERROR_S | // move engine source error
IFXDMA_ERROR_D | // move engine destination error
IFXDMA_ERROR_SPB | // bus error on SPB
IFXDMA_ERROR_SRI | // bus error on SRI
IFXDMA_ERROR_RAM | // RAM error
IFXDMA_ERROR_SLL | // safe linked list CRC checksum error
IFXDMA_ERROR_DLL); // failed linked list load error

Definition at line 1288 of file IfxDma.h.

◆ IfxDma_disableMoveEngineDestinationError()

IFX_INLINE void IfxDma_disableMoveEngineDestinationError | ( | Ifx_DMA * | dma,
 |  | IfxDma_MoveEngine | moveEngine
 | ) |  |

Disable the generation of a Move engine destination error interrupt.

Parameters
dma | pointer to DMA module
moveEngine | pointer to the DMA move engine
Returns
None

A coding example can be found in IfxDma_disableMoveEngineSourceError

Definition at line 1319 of file IfxDma.h.

◆ IfxDma_disableMoveEngineSourceError()

IFX_INLINE void IfxDma_disableMoveEngineSourceError | ( | Ifx_DMA * | dma,
 |  | IfxDma_MoveEngine | moveEngine
 | ) |  |

Disable the generation of a Move engine source error interrupt.

Parameters
dma | pointer to DMA module
moveEngine | pointer to the DMA move engine
Returns
None
// Disable the move engine source and destination move errors
IfxDma_disableMoveEngineSourceError(chn[0].dma,IfxDma_MoveEngine_1);
IfxDma_disableMoveEngineDestinationError(chn[0].dma,IfxDma_MoveEngine_1);

Definition at line 1332 of file IfxDma.h.

◆ IfxDma_enableMoveEngineDestinationError()

IFX_INLINE void IfxDma_enableMoveEngineDestinationError | ( | Ifx_DMA * | dma,
 |  | IfxDma_MoveEngine | moveEngine
 | ) |  |

Enable the generation of a Move engine destination error interrupt.

Parameters
dma | pointer to DMA module
moveEngine | pointer to the DMA move engine
Returns
None

A coding example can be found in IfxDma_enableMoveEngineSourceError

Definition at line 1363 of file IfxDma.h.

◆ IfxDma_enableMoveEngineSourceError()

IFX_INLINE void IfxDma_enableMoveEngineSourceError | ( | Ifx_DMA * | dma,
 |  | IfxDma_MoveEngine | moveEngine
 | ) |  |

Enable the generation of a Move engine source error interrupt.

Parameters
dma | pointer to DMA module
moveEngine | pointer to the DMA move engine
Returns
None
// Enable the move engine source and destination move errors
IfxDma_enableMoveEngineSourceError(chn[0].dma,IfxDma_MoveEngine_1);
IfxDma_enableMoveEngineDestinationError(chn[0].dma,IfxDma_MoveEngine_1);

Definition at line 1376 of file IfxDma.h.

◆ IfxDma_getErrorFlags()

IFX_INLINE uint32 IfxDma_getErrorFlags | ( | Ifx_DMA * | dma,
 |  | IfxDma_MoveEngine | moveEngine
 | ) |  |

Return the DMA error status flags.

Parameters
dma | pointer to DMA module
moveEngine | pointer to the DMA move engine
Returns
the content of the DMA.ERRSR register
uint32 errorFlags = 0;
// Get the status of the error flags of move engine
errorFlags = IfxDma_getErrorFlags(chn[0].dma,IfxDma_MoveEngine_1);
if( errorFlags & IFXDMA_ERROR_S ) { // move engine source error
}
if( errorFlags & IFXDMA_ERROR_D ) { // move engine destination error
// ...
}
if( errorFlags & IFXDMA_ERROR_SPB ) { // bus error on SPB
// ...
}
if( errorFlags & IFXDMA_ERROR_SRI ) { // bus error on SRI
// ...
}
if( errorFlags & IFXDMA_ERROR_RAM ) { // RAM error
// ...
}
if( errorFlags & IFXDMA_ERROR_SLL ) { // safe linked list CRC checksum error
// ...
}
if( errorFlags & IFXDMA_ERROR_DLL ) { // failed linked list load error
// ...
}

Definition at line 1528 of file IfxDma.h.


iLLD_TC38A: Channel configuration Functions

Functions
Channel configuration Functions
iLLD » DMA » Standard Driver
Collaboration diagram for Channel configuration Functions:

Functions

IFX_INLINE uint32 | IfxDma_getChannelDestinationAddress (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Get a channel source address. More...
IFX_INLINE uint32 | IfxDma_getChannelSourceAddress (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Get a channel source address. More...
IFX_INLINE boolean | IfxDma_getChannelSuspendModeStatus (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return the DMA channel suspend Mode status. More...
IFX_INLINE uint32 | IfxDma_getChannelTransferCount (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return remaining DMA transfer count. More...
IFX_INLINE uint32 | IfxDma_getTimestamp (Ifx_DMA *dma)
get the time stamp More...
IFX_INLINE void | IfxDma_setChannelBlockMode (Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelMove blockMode)
Configure the move count for each DMA channel transfer. More...
IFX_INLINE void | IfxDma_setChannelContinuousMode (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure a DMA channel to "continous transaction mode" After a transaction, the hardware request transaction remain enabled. More...
IFX_INLINE void | IfxDma_setChannelDestinationAddress (Ifx_DMA *dma, IfxDma_ChannelId channelId, void *address)
Configure the destination address. More...
IFX_INLINE void | IfxDma_setChannelDestinationIncrementStep (Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size)
Configure a DMA channel destination pointer. More...
IFX_INLINE void | IfxDma_setChannelMoveSize (Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelMoveSize moveSize)
Configure a DMA channel move. More...
IFX_INLINE void | IfxDma_setChannelShadow (Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelShadow shadow)
Configure a DMA channel shadow pointer. More...
IFX_INLINE void | IfxDma_setChannelSingleMode (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure a DMA channel to "single transaction mode" After a transaction, the hardware request transaction is disabled, and must be set by software again. More...
IFX_INLINE void | IfxDma_setChannelSingleTransaction (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure a DMA channel to "single transaction mode" One transfer request starts a complete DMA transaction. More...
IFX_INLINE void | IfxDma_setChannelSingleTransfer (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure a DMA channel to "single transfer mode" A transfer request is required for each transfer. More...
IFX_INLINE void | IfxDma_setChannelSourceAddress (Ifx_DMA *dma, IfxDma_ChannelId channelId, const void *address)
Configure the source address. More...
IFX_INLINE void | IfxDma_setChannelSourceIncrementStep (Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size)
Configure a DMA channel source pointer. More...
IFX_INLINE void | IfxDma_setChannelSuspendEnable (Ifx_DMA *dma, IfxDma_ChannelId channelId, boolean enable)
Configure a DMA channel suspend enable. More...
IFX_INLINE void | IfxDma_setChannelTransferCount (Ifx_DMA *dma, IfxDma_ChannelId channelId, uint32 transferCount)
Configure the move count of a DMA channel transaction. More...
IFX_INLINE void | IfxDma_writeChannelShadowDisable (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure the shadow pointer register to read only. More...
IFX_INLINE void | IfxDma_writeChannelShadowEnable (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure the shadow pointer register to write-able. More...

Detailed Description

Function Documentation

◆ IfxDma_getChannelDestinationAddress()

IFX_INLINE uint32 IfxDma_getChannelDestinationAddress | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Get a channel source address.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
Actual channel destination address
uint32 destAddr = IfxDma_getChannelDestinationAddress(chn[2].dma, chn[2].channelId);

Definition at line 1449 of file IfxDma.h.

◆ IfxDma_getChannelSourceAddress()

IFX_INLINE uint32 IfxDma_getChannelSourceAddress | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Get a channel source address.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
Actual channel source address
uint32 sourceAddr = IfxDma_getChannelSourceAddress(chn[2].dma, chn[2].channelId);

Definition at line 1477 of file IfxDma.h.

◆ IfxDma_getChannelSuspendModeStatus()

IFX_INLINE boolean IfxDma_getChannelSuspendModeStatus | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Return the DMA channel suspend Mode status.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
Channel Suspend Mode or Frozen State Active status (1- DMA channel is in channel suspend mode or frozen state)

Definition at line 1483 of file IfxDma.h.

◆ IfxDma_getChannelTransferCount()

IFX_INLINE uint32 IfxDma_getChannelTransferCount | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Return remaining DMA transfer count.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
Remaining DMA transfer count
// Wait till transfer count (TCOUNT) becomes 0
bool notFinished;
do {
notFinished = false;
if( IfxDma_getChannelTransferCount(chn[0].dma, chn[0].channelId) ) {
notFinished = true;
break;
}
} while( notFinished );

Definition at line 1495 of file IfxDma.h.

◆ IfxDma_getTimestamp()

IFX_INLINE uint32 IfxDma_getTimestamp ( Ifx_DMA * dma )

get the time stamp

Parameters
dma pointer to DMA module
Returns
the current time stamp
uint32 timestamp = IfxDma_getTimestamp(chn[0].dma);

Definition at line 1549 of file IfxDma.h.

◆ IfxDma_setChannelBlockMode()

IFX_INLINE void IfxDma_setChannelBlockMode | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId,
 |  | IfxDma_ChannelMove | blockMode
 | ) |  |

Configure the move count for each DMA channel transfer.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
blockMode | value holds the number of moves with in a DMA transfer
Returns
None

A coding example can be found in IfxDma_setChannelTransferCount

Definition at line 1585 of file IfxDma.h.

◆ IfxDma_setChannelContinuousMode()

IFX_INLINE void IfxDma_setChannelContinuousMode | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Configure a DMA channel to "continous transaction mode" After a transaction, the hardware request transaction remain enabled.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None

A coding example can be found in IfxDma_enableChannelTransaction

Definition at line 1591 of file IfxDma.h.

◆ IfxDma_setChannelDestinationAddress()

IFX_INLINE void IfxDma_setChannelDestinationAddress | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId,
 |  | void * | address
 | ) |  |

Configure the destination address.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
address | is the Initial address of the destination pointer
Returns
None

A coding example can be found in IfxDma_setChannelSourceAddress

Definition at line 1597 of file IfxDma.h.

Referenced by IfxDma_Dma_setChannelDestinationAddress(), IfxFce_Crc_calculateCrc(), IfxQspi_SpiMaster_initChannel(), IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), and IfxQspi_SpiSlave_write().

◆ IfxDma_setChannelDestinationIncrementStep()

IFX_INLINE void IfxDma_setChannelDestinationIncrementStep | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId,
 |  | IfxDma_ChannelIncrementStep | incStep,
 |  | IfxDma_ChannelIncrementDirection | direction,
 |  | IfxDma_ChannelIncrementCircular | size
 | ) |  |

Configure a DMA channel destination pointer.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
incStep | Specifies the pointer incrementation step
direction | Specifies the incrementation direction
size | Specifies the size of the circular buffer
Returns
None

A coding example can be found in IfxDma_setChannelSourceIncrementStep

Definition at line 1603 of file IfxDma.h.

Referenced by IfxFce_Crc_calculateCrc(), IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), and IfxQspi_SpiSlave_write().

◆ IfxDma_setChannelMoveSize()

IFX_INLINE void IfxDma_setChannelMoveSize | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId,
 |  | IfxDma_ChannelMoveSize | moveSize
 | ) |  |

Configure a DMA channel move.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
moveSize | value holds the opcode or size of data of individual moves with in a DMA transfer
Returns
None

A coding example can be found in IfxDma_setChannelTransferCount

Definition at line 1626 of file IfxDma.h.

Referenced by IfxFce_Crc_calculateCrc(), IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), and IfxQspi_SpiSlave_write().

◆ IfxDma_setChannelShadow()

IFX_INLINE void IfxDma_setChannelShadow | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId,
 |  | IfxDma_ChannelShadow | shadow
 | ) |  |

Configure a DMA channel shadow pointer.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
shadow | Specifies the shadow pointer
Returns
None
// Push the shadow mode into double buffer
IfxDma_setChannelShadow(chn[0].dma, chn[0].channelId,
IfxDma_ChannelShadow_doubleSourceBufferingSwSwitch);

Definition at line 1632 of file IfxDma.h.

◆ IfxDma_setChannelSingleMode()

IFX_INLINE void IfxDma_setChannelSingleMode | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Configure a DMA channel to "single transaction mode" After a transaction, the hardware request transaction is disabled, and must be set by software again.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None

A coding example can be found in IfxDma_enableChannelTransaction

Definition at line 1638 of file IfxDma.h.

◆ IfxDma_setChannelSingleTransaction()

IFX_INLINE void IfxDma_setChannelSingleTransaction | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Configure a DMA channel to "single transaction mode" One transfer request starts a complete DMA transaction.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None

A coding example can be found in IfxDma_setChannelTransferCount

Definition at line 1644 of file IfxDma.h.

◆ IfxDma_setChannelSingleTransfer()

IFX_INLINE void IfxDma_setChannelSingleTransfer | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Configure a DMA channel to "single transfer mode" A transfer request is required for each transfer.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None

A coding example can be found in IfxDma_setChannelTransferCount

Definition at line 1650 of file IfxDma.h.

◆ IfxDma_setChannelSourceAddress()

IFX_INLINE void IfxDma_setChannelSourceAddress | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId,
 |  | const void * | address
 | ) |  |

Configure the source address.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
address | is the Initial address of the source pointer
Returns
None
// Check for the end of current transaction and before trigger the channel request for
// for another channel, re configure the source and destination addresses
while(!(IfxDma_getAndClearChannelInterrupt(chn[1].dma, chn[1].channelId)));
// Re-Program the source address for the channel 2
IfxDma_setChannelSourceAddress(chn[2].dma, chn[2].channelId,Sadr);
// Re-Program the destination address for channel 2
IfxDma_setChannelDestinationAddress(chn[2].dma, chn[2].channelId,Dadr);
// Start DMA transaction for channel 2
IfxDma_Dma_startChannelTransaction(&chn[2]);

Definition at line 1656 of file IfxDma.h.

Referenced by IfxDma_Dma_setChannelSourceAddress(), IfxFce_Crc_calculateCrc(), IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), and IfxQspi_SpiSlave_write().

◆ IfxDma_setChannelSourceIncrementStep()

IFX_INLINE void IfxDma_setChannelSourceIncrementStep | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId,
 |  | IfxDma_ChannelIncrementStep | incStep,
 |  | IfxDma_ChannelIncrementDirection | direction,
 |  | IfxDma_ChannelIncrementCircular | size
 | ) |  |

Configure a DMA channel source pointer.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
incStep | Specifies the pointer incrementation step
direction | Specifies the incrementation direction
size | Specifies the size of the circular buffer
Returns
None
// Re-program the source and destination circular buffer control fields
IfxDma_setChannelSourceIncrementStep(chn[0].dma, chn[0].channelId, IfxDma_ChannelIncrementStep_2, IfxDma_ChannelIncrementDirection_negative, IfxDma_ChannelIncrementCircular_16);
IfxDma_setChannelDestinationIncrementStep(chn[0].dma, chn[0].channelId, IfxDma_ChannelIncrementStep_2, IfxDma_ChannelIncrementDirection_negative, IfxDma_ChannelIncrementCircular_16);

Definition at line 1662 of file IfxDma.h.

Referenced by IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), and IfxQspi_SpiSlave_write().

◆ IfxDma_setChannelSuspendEnable()

IFX_INLINE void IfxDma_setChannelSuspendEnable | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId,
 |  | boolean | enable
 | ) |  |

Configure a DMA channel suspend enable.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
enable | enable (1) / disable (0)
Returns
None

Definition at line 1673 of file IfxDma.h.

◆ IfxDma_setChannelTransferCount()

IFX_INLINE void IfxDma_setChannelTransferCount | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId,
 |  | uint32 | transferCount
 | ) |  |

Configure the move count of a DMA channel transaction.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
transferCount | value holds the DMA transfers within a transaction (1..16383; 0 handled like 1 transaction)
Returns
None
// Start DMA transaction
IfxDma_Dma_startChannelTransaction(&chn[0]);
// Wait till end of transaction
while(!(IfxDma_getAndClearChannelInterrupt(chn[0].dma, chn[0].channelId)));
// Change the TREL configuration for channel 1
IfxDma_setChannelTransferCount(chn[1].dma, chn[1].channelId,0x6);
// Change the BLKM configuration for channel 1
IfxDma_setChannelBlockMode(chn[1].dma, chn[1].channelId,IfxDma_ChannelMove_3);
// Change the Move size configuration for channel 1
IfxDma_setChannelMoveSize(chn[1].dma, chn[1].channelId,IfxDma_ChannelMoveSize_64bit);
// Pull down the channel pending request after the first transfer is initiated
IfxDma_setChannelSingleTransfer(chn[1].dma, chn[1].channelId);
// Pull down the channel pending request after the transaction gets over
IfxDma_setChannelSingleTransaction(chn[2].dma, chn[2].channelId);
// Start DMA transaction
IfxDma_Dma_startChannelTransaction(&chn[1]);
// Start DMA transaction
IfxDma_Dma_startChannelTransaction(&chn[2]);

Definition at line 1679 of file IfxDma.h.

Referenced by IfxDma_Dma_setChannelTransferCount(), IfxFce_Crc_calculateCrc(), IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), and IfxQspi_SpiSlave_write().

◆ IfxDma_writeChannelShadowDisable()

IFX_INLINE void IfxDma_writeChannelShadowDisable | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Configure the shadow pointer register to read only.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None
// Disable the shadow mode to come out of double buffer mode
IfxDma_writeChannelShadowDisable(chn[0].dma, chn[0].channelId);

Definition at line 1706 of file IfxDma.h.

◆ IfxDma_writeChannelShadowEnable()

IFX_INLINE void IfxDma_writeChannelShadowEnable | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Configure the shadow pointer register to write-able.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None
// Enable the shadow mode to come out of double buffer mode
IfxDma_writeChannelShadowEnable(chn[0].dma, chn[0].channelId);

Definition at line 1712 of file IfxDma.h.


iLLD_TC38A: Channel Halt Functions

Functions
Channel Halt Functions
iLLD » DMA » Standard Driver
Collaboration diagram for Channel Halt Functions:

Functions

IFX_INLINE void | IfxDma_clearChannelHalt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Clear channel halt request and aknowledgement. More...
IFX_INLINE boolean | IfxDma_getChannelHalt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Get channel halt aknowledgement. More...
IFX_INLINE void | IfxDma_setChannelHalt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
setting channel halt request More...

Detailed Description

Function Documentation

◆ IfxDma_clearChannelHalt()

IFX_INLINE void IfxDma_clearChannelHalt | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Clear channel halt request and aknowledgement.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None
// Quit the halt mode of operation
IfxDma_clearChannelHalt(chn[0].dma, chn[0].channelId);

Definition at line 1270 of file IfxDma.h.

◆ IfxDma_getChannelHalt()

IFX_INLINE boolean IfxDma_getChannelHalt | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Get channel halt aknowledgement.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
halt aknowledgement
// Check for the channel halt aknowledgement
while(!(IfxDma_getChannelHalt(chn[0].dma, chn[0].channelId)));

Definition at line 1455 of file IfxDma.h.

◆ IfxDma_setChannelHalt()

IFX_INLINE void IfxDma_setChannelHalt | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

setting channel halt request

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None
// Halt the channel processing
IfxDma_setChannelHalt(chn[0].dma,chn[0].channelId);

Definition at line 1614 of file IfxDma.h.


iLLD_TC38A: Double Buffer functions

Functions
Double Buffer functions
iLLD » DMA » Standard Driver
Collaboration diagram for Double Buffer functions:

Functions

IFX_INLINE boolean | IfxDma_getDoubleBufferRead (Ifx_DMA *dma, IfxDma_ChannelId channelId)
get information on buffer being read by software and clear the notification flag More...
IFX_INLINE boolean | IfxDma_getDoubleBufferSelection (Ifx_DMA *dma, IfxDma_ChannelId channelId)
get Double buffer selection More...
IFX_INLINE void | IfxDma_keepDoubleBufferActive (Ifx_DMA *dma, IfxDma_ChannelId channelId)
keeps the double buffer active More...
IFX_INLINE void | IfxDma_switchDoubleBuffer (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Double buffer switch application. More...

Detailed Description

Function Documentation

◆ IfxDma_getDoubleBufferRead()

IFX_INLINE boolean IfxDma_getDoubleBufferRead | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

get information on buffer being read by software and clear the notification flag

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
TRUE if one of the buffers is being read by software FALSE if one of the buffers is already read by software
// Check the buffer being read (Double buffer operation mode)
while(!(IfxDma_getDoubleBufferRead(chn[0].dma, chn[0].channelId)));

Definition at line 1507 of file IfxDma.h.

◆ IfxDma_getDoubleBufferSelection()

IFX_INLINE boolean IfxDma_getDoubleBufferSelection | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

get Double buffer selection

Parameters
dma | pointer to DMA module
channelId | channelId DMA channel number
Returns
TRUE if buffer 1 is being filled FALSE if buffer 0 is being filled
boolean buffer_being_filled;
// Check the buffer being filled (Double buffer operation mode)
buffer_being_filled = IfxDma_getDoubleBufferSelection(chn[0].dma, chn[0].channelId));

Definition at line 1522 of file IfxDma.h.

◆ IfxDma_keepDoubleBufferActive()

IFX_INLINE void IfxDma_keepDoubleBufferActive | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

keeps the double buffer active

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None
IfxDma_keepDoubleBufferActive(chn[0].dma, chn[0].channelId);

Definition at line 1573 of file IfxDma.h.

◆ IfxDma_switchDoubleBuffer()

IFX_INLINE void IfxDma_switchDoubleBuffer | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Double buffer switch application.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None
// Apply software buffer switch
IfxDma_switchDoubleBuffer(chn[0].dma, chn[0].channelId);

Definition at line 1700 of file IfxDma.h.


iLLD_TC38A: Interrupt functions

Functions
Interrupt functions
iLLD » DMA » Standard Driver
Collaboration diagram for Interrupt functions:

Functions

IFX_INLINE void | IfxDma_clearChannelInterrupt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Clear a channel transfer interrupt flag. More...
IFX_INLINE void | IfxDma_disableChannelInterrupt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Disable channel interrupt trigger. More...
IFX_INLINE void | IfxDma_enableChannelInterrupt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Enable channel interrupt trigger. More...
IFX_INLINE boolean | IfxDma_getAndClearChannelInterrupt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return and clear a channel transfer interrupt flag The flag is automatically cleared with the call to this function. More...
IFX_INLINE boolean | IfxDma_getAndClearChannelPatternDetectionInterrupt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns and clears the pattern detection interrupt flag. More...
IFX_INLINE boolean | IfxDma_getAndClearChannelWrapDestinationBufferInterrupt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns and clears the status of channel wrap destination buffer interrupt trigger flag. More...
IFX_INLINE boolean | IfxDma_getAndClearChannelWrapSourceBufferInterrupt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns and clears the status of channel wrap source buffer interrupt trigger flag. More...
IFX_INLINE boolean | IfxDma_getChannelInterrupt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return a channel transfer interrupt flag. More...
IFX_INLINE boolean | IfxDma_getChannelPatternDetectionOldValue (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns whether the old value of pattern detection corresponding pattern comparison operation found a pattern match in previous DMA * read move or not. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxDma_getSrcPointer (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns the SRC pointer for given DMA channel. More...
IFX_INLINE void | IfxDma_setChannelInterruptServiceRequest (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Setting of channel interrupt service request by software. More...

Detailed Description

Function Documentation

◆ IfxDma_clearChannelInterrupt()

IFX_INLINE void IfxDma_clearChannelInterrupt | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Clear a channel transfer interrupt flag.

Parameters
dma | pointer to DMA module
channelId | channel for which the interrupt flag should be cleared
Returns
None

see Dma.INTSR

Definition at line 1276 of file IfxDma.h.

Referenced by IfxDma_Dma_clearChannelInterrupt(), IfxQspi_SpiMaster_isrDmaTransmit(), IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), and IfxQspi_SpiSlave_write().

◆ IfxDma_disableChannelInterrupt()

IFX_INLINE void IfxDma_disableChannelInterrupt | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Disable channel interrupt trigger.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None
IfxDma_disableChannelInterrupt(chn[0].dma, chn[0].channelId);

Definition at line 1301 of file IfxDma.h.

◆ IfxDma_enableChannelInterrupt()

IFX_INLINE void IfxDma_enableChannelInterrupt | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Enable channel interrupt trigger.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None
IfxDma_enableChannelInterrupt(chn[0].dma, chn[0].channelId);

Definition at line 1345 of file IfxDma.h.

◆ IfxDma_getAndClearChannelInterrupt()

IFX_INLINE boolean IfxDma_getAndClearChannelInterrupt | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Return and clear a channel transfer interrupt flag The flag is automatically cleared with the call to this function.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
TRUE if the interrupt flag is set FALSE if the interrupt flag is not set
// wait for the end of transaction for intended channel by checking the channel interrupt flag
// and clear it once it is set and checked
// Wait till end of the transaction
while(!(IfxDma_getAndClearChannelInterrupt(chn[2].dma, chn[2].channelId)));

Definition at line 1389 of file IfxDma.h.

Referenced by IfxDma_Dma_getAndClearChannelInterrupt(), IfxQspi_SpiMaster_isrDmaReceive(), IfxQspi_SpiMaster_isrDmaTransmit(), IfxQspi_SpiMaster_isrError(), IfxQspi_SpiSlave_isrDmaReceive(), IfxQspi_SpiSlave_isrDmaTransmit(), and IfxQspi_SpiSlave_isrError().

◆ IfxDma_getAndClearChannelPatternDetectionInterrupt()

IFX_INLINE boolean IfxDma_getAndClearChannelPatternDetectionInterrupt | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Returns and clears the pattern detection interrupt flag.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
TRUE if pattern detection for a given channel is found FALSE if pattern detection for a given channel is not found
// wait till pattern match is found for given channel
// and clear it once it is set and checked
// Wait for the pattern detection
while(!(IfxDma_getAndClearChannelPatternDetectionInterrupt(chn[0].dma, chn[0].channelId)));

Definition at line 1404 of file IfxDma.h.

Referenced by IfxQspi_SpiMaster_isrDmaReceive(), IfxQspi_SpiMaster_isrDmaTransmit(), IfxQspi_SpiSlave_isrDmaReceive(), and IfxQspi_SpiSlave_isrDmaTransmit().

◆ IfxDma_getAndClearChannelWrapDestinationBufferInterrupt()

IFX_INLINE boolean IfxDma_getAndClearChannelWrapDestinationBufferInterrupt | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Returns and clears the status of channel wrap destination buffer interrupt trigger flag.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
TRUE if wrap destination buffer interrupt trigger flag is set FALSE if wrap destination buffer interrupt trigger flag is not set or get cleared already
// wait for the destination buffer wrap interrupt flag
// and clear it once it is set and checked
boolean destinationWrapFlag;
destinationWrapFlag = IfxDma_getAndClearChannelWrapDestinationBufferInterrupt(chn[0].dma, chn[0].channelId);

Definition at line 1419 of file IfxDma.h.

◆ IfxDma_getAndClearChannelWrapSourceBufferInterrupt()

IFX_INLINE boolean IfxDma_getAndClearChannelWrapSourceBufferInterrupt | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Returns and clears the status of channel wrap source buffer interrupt trigger flag.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
TRUE if wrap source buffer interrupt trigger flag is set FALSE if wrap source buffer interrupt trigger flag is not set or get cleared already
// wait for the source buffer wrap interrupt flag
// and clear it once it is set and checked
boolean sourceWrapFlag;
sourceWrapFlag = IfxDma_getAndClearChannelWrapSourceBufferInterrupt(chn[0].dma, chn[0].channelId);

Definition at line 1434 of file IfxDma.h.

◆ IfxDma_getChannelInterrupt()

IFX_INLINE boolean IfxDma_getChannelInterrupt | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Return a channel transfer interrupt flag.

Parameters
dma | pointer to DMA module
channelId | channel for which the interrupt flag should be returned
Returns
TRUE if the interrupt flag is set FALSE if the interrupt flag is not set

see Dma.INTSR

Definition at line 1461 of file IfxDma.h.

Referenced by IfxDma_Dma_getChannelInterrupt().

◆ IfxDma_getChannelPatternDetectionOldValue()

IFX_INLINE boolean IfxDma_getChannelPatternDetectionOldValue | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Returns whether the old value of pattern detection corresponding pattern comparison operation found a pattern match in previous DMA * read move or not.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
TRUE if corresponding pattern comparison operation found a pattern match in previous DMA read move or not FALSE if corresponding pattern comparison operation did not find a pattern match in previous DMA read move
boolean patternDetectOldVal;
// Check the old value of the pattern detection
patternDetectOldVal = IfxDma_getChannelPatternDetectionOldValue(chn[0].dma, chn[0].channelId);

Definition at line 1471 of file IfxDma.h.

◆ IfxDma_getSrcPointer()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxDma_getSrcPointer | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Returns the SRC pointer for given DMA channel.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
SRC pointer for given DMA channel

Definition at line 1541 of file IfxDma.h.

Referenced by IfxDma_Dma_getSrcPointer(), IfxDma_Dma_initChannel(), and IfxQspi_SpiSlave_initModule().

◆ IfxDma_setChannelInterruptServiceRequest()

IFX_INLINE void IfxDma_setChannelInterruptServiceRequest | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Setting of channel interrupt service request by software.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None
// Set the channel interrupt service request through software
IfxDma_setChannelInterruptServiceRequest(chn[0].dma, chn[0].channelId);

Definition at line 1620 of file IfxDma.h.

Referenced by IfxQspi_SpiSlave_write().


iLLD_TC38A: How to use the DMA Interface driver?

How to use the DMA Interface driver?
iLLD » DMA
Collaboration diagram for How to use the DMA Interface driver?:

The DMA interface driver provides a default configuration for data moves without intervention of the CPU or other on chip devices.

In the following sections it will be described, how to integrate the driver into the application framework for different use cases.

Preparation

Include Files

Include following header file into your C code:

#include <Dma/Dma/IfxDma_Dma.h>
#include <Vadc/Adc/IfxVadc_Adc.h>

Module initialisation

Declare the dma handle as a global variable:

// DMA handle
IfxDma_Dma dma;

Initialize the DMA with following code:

// create module config
IfxDma_Dma_Config dmaConfig;
IfxDma_Dma_initModuleConfig(&dmaConfig, &MODULE_DMA);
// initialize module
// IfxDma_Dma dma; // declared globally
IfxDma_Dma_initModule(&dma, &dmaConfig);

This only has to be done once in the application.

The "IfxDma_Dma dma" handle should either be declared as a global variable (as shown in this example), or it can be created locally if desired:

IfxDma_Dma dma;
IfxDma_Dma_createModuleHandle(&dma, &MODULE_DMA);

Memory-to-Memory Transfers

A large amount of data should be copied between SRI based memories, e.g. from Flash into the DSPR of the current CPU. It's recommended to use 256 bit moves for this purpose for best performance.

This requires, that source and target locations are 256 bit (32 byte) aligned. With the GCC compiler this can be achieved by adding attribute ((aligned(64))) to the arrays:

#define MEMORY_TRANSFER_NUM_WORDS 1024
uint32 __attribute__ ((aligned(64))) memoryDestination[MEMORY_TRANSFER_NUM_WORDS];

Channel configuration and handling for the data move:

// construct the channel configuration
IfxDma_Dma_ChannelConfig chnCfg;
IfxDma_Dma_initChannelConfig(&chnCfg, &dma);
// select DMA channel which should be used
chnCfg.channelId = IfxDma_ChannelId_0;
// source and destination address
chnCfg.sourceAddress = (uint32)0x80000000; // somewhere in flash section, here: start of PFlash (only for demo)
chnCfg.destinationAddress = (uint32)memoryDestination;
// move size, transfer count and request/operation mode
chnCfg.moveSize = IfxDma_ChannelMoveSize_256bit;
chnCfg.transferCount = (4 * MEMORY_TRANSFER_NUM_WORDS) / 32; // e.g. 1024 words require 128 * 256 bit moves
chnCfg.requestMode = IfxDma_ChannelRequestMode_completeTransactionPerRequest;
chnCfg.operationMode = IfxDma_ChannelOperationMode_continuous;
// transfer configuration into DMA channel registers
IfxDma_Dma_Channel chn;
IfxDma_Dma_initChannel(&chn, &chnCfg);
// start transfer and wait until it's finished
IfxDma_Dma_startChannelTransaction(&chn);
while( IfxDma_Dma_isChannelTransactionPending(&chn) == TRUE );

Peripheral-to-Memory Transfers

The content of 8 ADC result registers should be transfered to a memory location in DSPR whenever an VADC autoscan has been finished. After the DMA transaction, an interrupt should be triggered so that the CPU can process the conversion results.

We use following global variables:

// buffer for autoscanned conversion result values
#define NUM_SCANNED_CHANNELS 8
static uint16 vadcResultBuffer[NUM_SCANNED_CHANNELS];
// VADC handle
IfxVadc_Adc vadc;
// VADC group handle
static IfxVadc_Adc_Group adcGroup;
// DMA channel handle
static IfxDma_Dma_Channel dmaChn;

Create an interrupt handler for the DMA channel request:

// priorities are normally defined in Ifx_IntPrioDef.h
#define IFX_INTPRIO_DMA_CH0 1
IFX_INTERRUPT(dmaCh0ISR, 0, IFX_INTPRIO_DMA_CH0)
{
// ...
// do something with the conversion results in vadcResultBuffer[]
// ...
// re-init DMA channel destination address
IfxDma_Dma_setChannelDestinationAddress(&dmaChn, ADDR_CPU_DSPR(IfxCpu_getCoreId(), &vadcResultBuffer[0]));
// start new transaction
IfxDma_Dma_setChannelTransferCount(&dmaChn, NUM_SCANNED_CHANNELS);
{
uint32 channels = 0xff; // all 8 channels
uint32 mask = 0xff; // modify the selection of all channels
// configure autoscan (single shot, not continuous scan)
IfxVadc_Adc_setScan(&adcGroup, channels, mask);
}
}

ADC configuration:

// create configuration
IfxVadc_Adc_Config adcConfig;
IfxVadc_Adc_initModuleConfig(&adcConfig, &MODULE_VADC);
adcConfig.startupCalibration = TRUE;
// initialize module
// IfxVadc_Adc vadc; // declared globally
IfxVadc_Adc_initModule(&vadc, &adcConfig);
// create group config
IfxVadc_Adc_GroupConfig adcGroupConfig;
IfxVadc_Adc_initGroupConfig(&adcGroupConfig, &vadc);
// initialize the group
//IfxVadc_Adc_Group adcGroup; // defined globally
adcGroupConfig.groupId = IfxVadc_GroupId_0;
adcGroupConfig.master = adcGroupConfig.groupId;
// enable all arbiter request sources
adcGroupConfig.arbiter.requestSlotQueueEnabled = TRUE; // enable Queue mode
adcGroupConfig.arbiter.requestSlotScanEnabled = TRUE; // enable Scan mode
adcGroupConfig.arbiter.requestSlotBackgroundScanEnabled = TRUE; // enable Background scan
// enable all gates in "always" mode (no edge detection)
adcGroupConfig.queueRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
adcGroupConfig.scanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
adcGroupConfig.backgroundScanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
IfxVadc_Adc_initGroup(&adcGroup, &adcGroupConfig);
{
// create channel config
IfxVadc_Adc_ChannelConfig adcChannelConfig;
IfxVadc_Adc_initChannelConfig(&adcChannelConfig, &adcGroup);
// initialize the channels
for(int i=0; i<NUM_SCANNED_CHANNELS; ++i) {
adcChannelConfig.channelId = (IfxVadc_ChannelId)i;
adcChannelConfig.resultRegister = IfxVadc_ChannelResult_0;
// initialize the channel
IfxVadc_Adc_Channel adcChannel;
IfxVadc_Adc_initChannel(&adcChannel, &adcChannelConfig);
IfxVadc_Adc_configureWaitForReadMode(&adcChannel, TRUE);
}
}
adcGroup.group->RCR[0].B.SRGEN = 1; // interrupt when new result is available
// send service request to DMA Channel 0
IfxSrc_init((Ifx_SRC_SRCR*)&MODULE_SRC.VADC.G[0], IfxSrc_Tos_dma, 0);
IfxSrc_enable((Ifx_SRC_SRCR*)&MODULE_SRC.VADC.G[0]);

And finally the DMA channel configuration

// create module config
IfxDma_Dma_Config dmaConfig;
IfxDma_Dma_initModuleConfig(&dmaConfig, &MODULE_DMA);
// initialize module
IfxDma_Dma dma;
IfxDma_Dma_initModule(&dma, &dmaConfig);
{
// construct the channel configuration
IfxDma_Dma_ChannelConfig chnCfg;
IfxDma_Dma_initChannelConfig(&chnCfg, &dma);
// select DMA channel which should be used
chnCfg.channelId = IfxDma_ChannelId_0;
chnCfg.hardwareRequestEnabled = TRUE; // will be triggered from VADC service request
// interrupt configuration
chnCfg.channelInterruptEnabled = TRUE; // service request from DMA after all words have been transfered
chnCfg.channelInterruptPriority = IFX_INTPRIO_DMA_CH0;
chnCfg.channelInterruptTypeOfService = IfxCpu_Irq_getTos(IfxCpu_getCoreIndex());
// source and destination address
chnCfg.sourceAddress = (uint32)&adcGroup.group->RES[0]; // first result register
chnCfg.sourceCircularBufferEnabled = TRUE;
chnCfg.sourceAddressCircularRange = IfxDma_ChannelIncrementCircular_1; // keep this address
chnCfg.destinationAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &vadcResultBuffer[0]); // move into result buffer
chnCfg.destinationAddressIncrementStep = IfxDma_ChannelIncrementStep_1; // increment once (=2 bytes) with each write
// move size, transfer count and request/operation mode
chnCfg.moveSize = IfxDma_ChannelMoveSize_16bit;
chnCfg.transferCount = NUM_SCANNED_CHANNELS; // for the scanned channels
chnCfg.requestMode = IfxDma_ChannelRequestMode_oneTransferPerRequest;
chnCfg.operationMode = IfxDma_ChannelOperationMode_continuous; // hw request enable remains set after transaction
// transfer configuration into DMA channel registers
// IfxDma_Dma_Channel dmaChn; // declared globally
IfxDma_Dma_initChannel(&dmaChn, &chnCfg);
// configure IRQ handler which will be called after all result registers have been transfered
IfxCpu_Irq_installInterruptHandler(&dmaCh0ISR, IFX_INTPRIO_DMA_CH0);
// enable CPU interrupts
IfxCpu_enableInterrupts();
}

In order to start the initial channel conversions, use:

{
uint32 channels = 0xff; // all 8 channels
uint32 mask = 0xff; // modify the selection of all channels
// configure and start autoscan (single shot, not continuous mode)
IfxVadc_Adc_setScan(&adcGroup, channels, mask);
}

DMA will transfer the results to DSPR during the autoscan (whenever a new result is availale), and invoke the dmaCh0ISR function once all channels have been converted.

The ISR will re-configure the DMA channel and re-start the autoscan.

Linked Lists

Linked lists allow to initiate multiple DMA transactions from independent transaction sets which are typically stored in a DSPR memory location, and fetched and executed from the DMA channel without further CPU interaction.

Following example demonstrates, how 5 different transactions can be initiated from a single request. We copy the data of 5 CAN message objects to a DSPR location.

Includes and global variables:

#include <Dma/Dma/IfxDma_Dma.h>
#include <Scu/Std/IfxScuWdt.h>
#include <IfxCan_reg.h>
// DMA channel handle
IfxDma_Dma_Channel chn;
// Linked List storage
// IMPORTANT: it has to be aligned to an 256bit address, otherwise DMA can't read it
#define NUM_LINKED_LIST_ITEMS 5
IFX_ALIGN(256) Ifx_DMA_CH linkedList[NUM_LINKED_LIST_ITEMS] ;
// transfer these values to various CAN_MODATA[LH] registers via linked lists
#define NUM_TRANSFERED_WORDS 2
uint32 sourceBuffer[NUM_LINKED_LIST_ITEMS][NUM_TRANSFERED_WORDS];
const uint32 destinationAddresses[NUM_LINKED_LIST_ITEMS] = {
(uint32)&CAN_MODATAL0,
(uint32)&CAN_MODATAL1,
(uint32)&CAN_MODATAL2,
(uint32)&CAN_MODATAL3,
(uint32)&CAN_MODATAL4,
};

Following code to prepare CAN for this demo:

// enable CAN (no Ifx LLD available yet)
{
uint32 passwd = IfxScuWdt_getCpuWatchdogPassword();
IfxScuWdt_clearCpuEndinit(passwd);
CAN_CLC.U = 0x0100;
if( CAN_CLC.U ); // synch access
// select f_clc as kernel clock
CAN_MCR.B.CLKSEL = 1;
// configure fractional divider
CAN_FDR.U = 0x43ff;
// wait until RAM has been initialized
while( CAN_PANCTR.B.BUSY );
IfxScuWdt_setCpuEndinit(passwd);
}

Build a linked list

// create module config
IfxDma_Dma_Config dmaConfig;
IfxDma_Dma_initModuleConfig(&dmaConfig, &MODULE_DMA);
// initialize module
IfxDma_Dma dma;
IfxDma_Dma_initModule(&dma, &dmaConfig);
// initial channel configuration
IfxDma_Dma_ChannelConfig cfg;
IfxDma_Dma_initChannelConfig(&cfg, &dma);
// following settings are used by all transactions
cfg.transferCount = NUM_TRANSFERED_WORDS;
cfg.requestMode = IfxDma_ChannelRequestMode_completeTransactionPerRequest;
cfg.moveSize = IfxDma_ChannelMoveSize_32bit;
cfg.shadowControl = IfxDma_ChannelShadow_linkedList;
// generate linked list items
for(int i=0; i<NUM_LINKED_LIST_ITEMS; ++i) {
cfg.sourceAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &sourceBuffer[i]);
cfg.destinationAddress = destinationAddresses[i];
// address to next transaction set
cfg.shadowAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), (uint32)&linkedList[(i + 1) % NUM_LINKED_LIST_ITEMS]);
// transfer first transaction set into DMA channel
if( i == 0 ) {
IfxDma_Dma_initChannel(&chn, &cfg);
}
// transfer into linked list storage
IfxDma_Dma_initLinkedListEntry((void *)&linkedList[i], &cfg);
if( i == 0 ) {
// - trigger channel interrupt once the first transaction set has been loaded (again) into DMA channel
linkedList[i].CHCSR.B.SIT = 1;
} else {
// - activate SCH (transaction request) for each entry, except for the first one (linked list terminated here)
linkedList[i].CHCSR.B.SCH = 1;
}
}

The transfer can be started via software with:

// clear service request flag
(IfxDma_Dma_getSrcPointer(&chn))->B.CLRR = 1;
// start linked list transaction
IfxDma_Dma_startChannelTransaction(&chn);
// wait for service request which is triggered at the end of linked list transfers
while( !(IfxDma_Dma_getSrcPointer(&chn))->B.SRR );

In order to synchronize with the end of linked list operations, it's recommended to poll the service request flag (triggered via linkedList[NUM_LINKED_LIST_ITEMS-1].CHCSR.B.SIT after the last word has been transfered), and not the transaction count as shown before, because a linked list will initiate multiple transactions.


iLLD_TC38A: DMA

Modules
DMA
iLLD » DMA
Collaboration diagram for DMA:

Modules

Data Structures
Module Initialization
Channel Initialization
Linked Lists
Channel Transactions

Detailed Description


iLLD_TC38A: Data Structures

Data Structures
Data Structures
iLLD » DMA » DMA
Collaboration diagram for Data Structures:

Data Structures

struct | IfxDma_Dma
DMA base address data structure (Module handle) More...
struct | IfxDma_Dma_Channel
Channel handle. More...
struct | IfxDma_Dma_ChannelConfig
Configuration data structure of the channel. More...
struct | IfxDma_Dma_Config
Configuration data structure of the Module. More...

Detailed Description

Data Structure Documentation

◆ IfxDma_Dma

struct IfxDma_Dma

DMA base address data structure (Module handle)

Definition at line 460 of file IfxDma_Dma.h.

Data Fields
Ifx_DMA * dma Specifies the pointer to the DMA registers.

◆ IfxDma_Dma_Channel

struct IfxDma_Dma_Channel

Channel handle.

Definition at line 471 of file IfxDma_Dma.h.

Data Fields
Ifx_DMA_CH * | channel | Specifies the pointer to DMA channel registers.
IfxDma_ChannelId | channelId | Specifies the DMA channel.
Ifx_DMA * | dma | Specifies the pointer to the DMA registers.

◆ IfxDma_Dma_ChannelConfig

struct IfxDma_Dma_ChannelConfig

Configuration data structure of the channel.

Definition at line 480 of file IfxDma_Dma.h.

Collaboration diagram for IfxDma_Dma_ChannelConfig:
[legend]
Data Fields
IfxDma_ChannelMove | blockMode | Number of moves in a transfer.
IfxDma_ChannelBusPriority | busPriority | Bus priority selection.
IfxDma_ChannelId | channelId | Specifies the channel being used.
IfxDma_ChannelInterruptControl | channelInterruptControl | The channel transfer interrupt can either be triggered depending on the interruptRaiseThreshold, or each time the transaction count is decremented.
boolean | channelInterruptEnabled | The channel transfer interrupt should be triggered. See also channelInterruptControl.
Ifx_Priority | channelInterruptPriority | Priority of the channel interrupt trigger.
IfxSrc_Tos | channelInterruptTypeOfService | Interrupt service provider.
uint32 | destinationAddress | Destination address for the DMA channel.
IfxDma_ChannelIncrementCircular | destinationAddressCircularRange | Determines which part of the destination address remains unchanged and therby not updated after each move.
IfxDma_ChannelIncrementDirection | destinationAddressIncrementDirection | Decides whether the destination address offset after each move should be added or decremented from the exisiting address.
IfxDma_ChannelIncrementStep | destinationAddressIncrementStep | Describes the address offset with which the destination address should be modified after each move.
boolean | destinationCircularBufferEnabled | Enables/Disables the destination circular buffering.
boolean | hardwareRequestEnabled | Enabling channel transaction via hardware request.
uint8 | interruptRaiseThreshold | The value of the transferCount at which the interrupt should be raised.
IfxDma_Dma * | module | Specifies pointer to the IfxDma_Dma module handle.
IfxDma_ChannelMoveSize | moveSize | Read/write data size.
IfxDma_ChannelOperationMode | operationMode | keep enable/disable the hardware channel request after a transaction
IfxDma_ChannelPattern | pattern | Pattern selection operation modes.
uint32 | readDataCrc | Checksum for read data of the channel.
IfxDma_ChannelRequestMode | requestMode | A service request initiates a single transfer, or the complete transaction.
IfxDma_ChannelRequestSource | requestSource | Request of channel transfer through hardware or daisy chain. channel transfer complete interrupt of previous channel will trigger the next channel request.
uint32 | shadowAddress | Initial content of shadow address for the DMA channel.
IfxDma_ChannelShadow | shadowControl | selects the shadow transfer mode
uint32 | sourceAddress | Source address for the DMA channel.
IfxDma_ChannelIncrementCircular | sourceAddressCircularRange | Determines which part of the source address remains unchanged and therby not updated after each move.
IfxDma_ChannelIncrementDirection | sourceAddressIncrementDirection | Decides whether the source address offset after each move should be added or decremented from the exisiting address.
IfxDma_ChannelIncrementStep | sourceAddressIncrementStep | Describes the address offset with which the source address should be modified after each move.
boolean | sourceCircularBufferEnabled | Enables/Disables the source circular buffering.
uint32 | sourceDestinationAddressCrc | Checksum for source and destination address of channel.
boolean | timestampEnabled | Enables/Disables the appendage of the time stamp after end of the last DMA move in a transaction.
boolean | transactionRequestLostInterruptEnabled | Enables/Disables the channel transaction request lost interrupt.
uint16 | transferCount | Number of transfers in a transaction.
boolean | wrapDestinationInterruptEnabled | An interrupt should be triggered whenever destination address is wrapped.
boolean | wrapSourceInterruptEnabled | An interrupt should be triggered whenever source address is wrapped.

◆ IfxDma_Dma_Config

struct IfxDma_Dma_Config

Configuration data structure of the Module.

Definition at line 520 of file IfxDma_Dma.h.

Data Fields
Ifx_DMA * dma Specifies the pointer to the DMA registers.


iLLD_TC38A: Module Initialization

Functions
Module Initialization
iLLD » DMA » DMA
Collaboration diagram for Module Initialization:

Functions

IFX_EXTERN void | IfxDma_Dma_createModuleHandle (IfxDma_Dma *dmaHandle, Ifx_DMA *dma)
initializes a DMA module handle based on the current configuration. Can be used in code where it's ensure that the DMA module is already initialized, and a DMA handle isn't globally available. More...
IFX_EXTERN void | IfxDma_Dma_deInitChannel (IfxDma_Dma *dma, IfxDma_ChannelId channel)
de-initialize the DMA channel More...
IFX_EXTERN void | IfxDma_Dma_initModule (IfxDma_Dma *dma, const IfxDma_Dma_Config *config)
Initialize the DMA module. More...
IFX_EXTERN void | IfxDma_Dma_initModuleConfig (IfxDma_Dma_Config *config, Ifx_DMA *dma)
initialize the DMA module configuration More...

Detailed Description

Function Documentation

◆ IfxDma_Dma_createModuleHandle()

IFX_EXTERN void IfxDma_Dma_createModuleHandle | ( | IfxDma_Dma * | dmaHandle,
 |  | Ifx_DMA * | dma
 | ) |  |

initializes a DMA module handle based on the current configuration. Can be used in code where it's ensure that the DMA module is already initialized, and a DMA handle isn't globally available.

Parameters
dmaHandle | pointer to the DMA module handle
dma | pointer to the DMA registers
Returns
None
IfxDma_Dma dma;
IfxDma_Dma_createModuleHandle(&dma, &MODULE_DMA);

Definition at line 127 of file IfxDma_Dma.c.

Referenced by IfxFce_Crc_initCrc(), IfxQspi_SpiMaster_initModule(), and IfxQspi_SpiSlave_initModule().

◆ IfxDma_Dma_deInitChannel()

IFX_EXTERN void IfxDma_Dma_deInitChannel | ( | IfxDma_Dma * | dma,
 |  | IfxDma_ChannelId | channel
 | ) |  |

de-initialize the DMA channel

Parameters
dma | pointer to the DMA module handle
channel | the DMA channel ID
Returns
None

Definition at line 133 of file IfxDma_Dma.c.

◆ IfxDma_Dma_initModule()

IFX_EXTERN void IfxDma_Dma_initModule | ( | IfxDma_Dma * | dma,
 |  | const IfxDma_Dma_Config * | config
 | ) |  |

Initialize the DMA module.

Parameters
dma | pointer to the DMA module handle
config | Pointer to configuration structure of the DMA module
Returns
None

See Memory-to-Memory Transfers

Definition at line 235 of file IfxDma_Dma.c.

◆ IfxDma_Dma_initModuleConfig()

IFX_EXTERN void IfxDma_Dma_initModuleConfig | ( | IfxDma_Dma_Config * | config,
 |  | Ifx_DMA * | dma
 | ) |  |

initialize the DMA module configuration

Parameters
config | Pointer to configuration structure of the DMA module
dma | pointer to the DMA registers
Returns
None

See Memory-to-Memory Transfers

Definition at line 241 of file IfxDma_Dma.c.


iLLD_TC38A: Channel Initialization

Functions
Channel Initialization
iLLD » DMA » DMA
Collaboration diagram for Channel Initialization:

Functions

IFX_EXTERN void | IfxDma_Dma_initChannel (IfxDma_Dma_Channel *channel, const IfxDma_Dma_ChannelConfig *config)
initialize the DMA channel More...
IFX_EXTERN void | IfxDma_Dma_initChannelConfig (IfxDma_Dma_ChannelConfig *config, IfxDma_Dma *dma)
initialize the DMA module channel configuration More...

Detailed Description

Function Documentation

◆ IfxDma_Dma_initChannel()

IFX_EXTERN void IfxDma_Dma_initChannel | ( | IfxDma_Dma_Channel * | channel,
 |  | const IfxDma_Dma_ChannelConfig * | config
 | ) |  |

initialize the DMA channel

Parameters
channel | pointer to the DMA base address and channel ID
config | pointer to the DMA default channel configuration structure
Returns
None

See Memory-to-Memory Transfers

Definition at line 147 of file IfxDma_Dma.c.

Referenced by IfxFce_Crc_initCrc(), IfxQspi_SpiMaster_initModule(), and IfxQspi_SpiSlave_initModule().

◆ IfxDma_Dma_initChannelConfig()

IFX_EXTERN void IfxDma_Dma_initChannelConfig | ( | IfxDma_Dma_ChannelConfig * | config,
 |  | IfxDma_Dma * | dma
 | ) |  |

initialize the DMA module channel configuration

Parameters
config | pointer to the DMA default channel configuration structure
dma | pointer to the DMA module handle
Returns
None

See Memory-to-Memory Transfers

Definition at line 182 of file IfxDma_Dma.c.

Referenced by IfxFce_Crc_initCrc(), IfxQspi_SpiMaster_initModule(), and IfxQspi_SpiSlave_initModule().


iLLD_TC38A: Linked Lists

Functions
Linked Lists
iLLD » DMA » DMA
Collaboration diagram for Linked Lists:

Functions

IFX_INLINE volatile Ifx_SRC_SRCR * | IfxDma_Dma_getSrcPointer (IfxDma_Dma_Channel *channel)
Returns the SRC pointer for given DMA channel. More...
IFX_EXTERN void | IfxDma_Dma_initLinkedListEntry (void *ptrToAddress, const IfxDma_Dma_ChannelConfig *config)
linked list functionality within the DMA module More...

Detailed Description

Function Documentation

◆ IfxDma_Dma_getSrcPointer()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxDma_Dma_getSrcPointer ( IfxDma_Dma_Channel * channel )

Returns the SRC pointer for given DMA channel.

Parameters
channel pointer to the DMA base address and channel ID
Returns
SRC pointer for given DMA channel

Definition at line 735 of file IfxDma_Dma.h.

◆ IfxDma_Dma_initLinkedListEntry()

IFX_EXTERN void IfxDma_Dma_initLinkedListEntry | ( | void * | ptrToAddress,
 |  | const IfxDma_Dma_ChannelConfig * | config
 | ) |  |

linked list functionality within the DMA module

Parameters
ptrToAddress | pointer to the memory location where the linked list entry should be stored
config | pointer to the DMA default channel configuration structure
Returns
None

See Linked Lists

Definition at line 229 of file IfxDma_Dma.c.


iLLD_TC38A: Channel Transactions

Functions
Channel Transactions
iLLD » DMA » DMA
Collaboration diagram for Channel Transactions:

Functions

IFX_INLINE void | IfxDma_Dma_clearChannelInterrupt (IfxDma_Dma_Channel *channel)
Clear a channel transfer interrupt flag. More...
IFX_INLINE boolean | IfxDma_Dma_getAndClearChannelInterrupt (IfxDma_Dma_Channel *channel)
Return and clear a channel transfer interrupt flag The flag is automatically cleared with the call to this function. More...
IFX_INLINE boolean | IfxDma_Dma_getChannelInterrupt (IfxDma_Dma_Channel *channel)
Return a channel transfer interrupt flag. More...
IFX_INLINE boolean | IfxDma_Dma_isChannelTransactionPending (IfxDma_Dma_Channel *channel)
Poll for an ongoing transaction. More...
IFX_INLINE void | IfxDma_Dma_setChannelDestinationAddress (IfxDma_Dma_Channel *channel, uint32 address)
Re-initialize the destination address after a transaction. More...
IFX_INLINE void | IfxDma_Dma_setChannelSourceAddress (IfxDma_Dma_Channel *channel, uint32 address)
Re-initialize the source address after a transaction. More...
IFX_INLINE void | IfxDma_Dma_setChannelTransferCount (IfxDma_Dma_Channel *channel, uint32 transferCount)
Re-initialize the transfer count after a transaction. More...
IFX_INLINE void | IfxDma_Dma_startChannelTransaction (IfxDma_Dma_Channel *channel)
initiate the DMA move transaction More...

Detailed Description

Function Documentation

◆ IfxDma_Dma_clearChannelInterrupt()

IFX_INLINE void IfxDma_Dma_clearChannelInterrupt ( IfxDma_Dma_Channel * channel )

Clear a channel transfer interrupt flag.

Parameters
channel pointer to the DMA base address and channel ID
Returns
None

Definition at line 717 of file IfxDma_Dma.h.

◆ IfxDma_Dma_getAndClearChannelInterrupt()

IFX_INLINE boolean IfxDma_Dma_getAndClearChannelInterrupt ( IfxDma_Dma_Channel * channel )

Return and clear a channel transfer interrupt flag The flag is automatically cleared with the call to this function.

Parameters
channel pointer to the DMA base address and channel ID
Returns
TRUE if the interrupt flag is set FALSE if the interrupt flag is not set

Definition at line 723 of file IfxDma_Dma.h.

◆ IfxDma_Dma_getChannelInterrupt()

IFX_INLINE boolean IfxDma_Dma_getChannelInterrupt ( IfxDma_Dma_Channel * channel )

Return a channel transfer interrupt flag.

Parameters
channel pointer to the DMA base address and channel ID
Returns
TRUE if the interrupt flag is set FALSE if the interrupt flag is not set

Definition at line 729 of file IfxDma_Dma.h.

◆ IfxDma_Dma_isChannelTransactionPending()

IFX_INLINE boolean IfxDma_Dma_isChannelTransactionPending ( IfxDma_Dma_Channel * channel )

Poll for an ongoing transaction.

Parameters
channel pointer to the DMA base address and channel ID
Returns
TRUE if a transaction request for the given channel is pending

See Memory-to-Memory Transfers

Definition at line 741 of file IfxDma_Dma.h.

Referenced by IfxFce_Crc_calculateCrc().

◆ IfxDma_Dma_setChannelDestinationAddress()

IFX_INLINE void IfxDma_Dma_setChannelDestinationAddress | ( | IfxDma_Dma_Channel * | channel,
 |  | uint32 | address
 | ) |  |

Re-initialize the destination address after a transaction.

Parameters
channel | pointer to the DMA base address and channel ID
address | is the Initial address of the destination pointer
Returns
None

See Memory-to-Memory Transfers

Definition at line 747 of file IfxDma_Dma.h.

◆ IfxDma_Dma_setChannelSourceAddress()

IFX_INLINE void IfxDma_Dma_setChannelSourceAddress | ( | IfxDma_Dma_Channel * | channel,
 |  | uint32 | address
 | ) |  |

Re-initialize the source address after a transaction.

Parameters
channel | pointer to the DMA base address and channel ID
address | is the Initial address of the source pointer
Returns
None

See Memory-to-Memory Transfers

Definition at line 753 of file IfxDma_Dma.h.

◆ IfxDma_Dma_setChannelTransferCount()

IFX_INLINE void IfxDma_Dma_setChannelTransferCount | ( | IfxDma_Dma_Channel * | channel,
 |  | uint32 | transferCount
 | ) |  |

Re-initialize the transfer count after a transaction.

Parameters
channel | pointer to the DMA base address and channel ID
transferCount | value holds the DMA transfers within a transaction (1..16383; 0 handled like 1 transaction)
Returns
None

See Memory-to-Memory Transfers

Definition at line 759 of file IfxDma_Dma.h.

◆ IfxDma_Dma_startChannelTransaction()

IFX_INLINE void IfxDma_Dma_startChannelTransaction ( IfxDma_Dma_Channel * channel )

initiate the DMA move transaction

Parameters
channel pointer to the DMA base address and channel ID
Returns
None

See Memory-to-Memory Transfers

Definition at line 765 of file IfxDma_Dma.h.

Referenced by IfxFce_Crc_calculateCrc().


iLLD_TC38A: IfxDma_cfg.h File Reference

  • _Impl
Macros | Enumerations
IfxDma_cfg.h File Reference
iLLD » DMA

DMA on-chip implementation data. More...

#include "Cpu/Std/Ifx_Types.h"
Include dependency graph for IfxDma_cfg.h:

Go to the source code of this file.

Macros

#define | IFXDMA_NUM_CHANNELS 128
Number of channels. More...
#define | IFXDMA_ERROR_S (IFX_DMA_ME_CLRE_CSER_MSK << IFX_DMA_ME_CLRE_CSER_OFF)
Error mask for move engine source error. More...
#define | IFXDMA_ERROR_D (IFX_DMA_ME_CLRE_CDER_MSK << IFX_DMA_ME_CLRE_CDER_OFF)
Error mask for move engine destination error. More...
#define | IFXDMA_ERROR_SPB (IFX_DMA_ME_CLRE_CSPBER_MSK << IFX_DMA_ME_CLRE_CSPBER_OFF)
Error mask for bus error on SPB. More...
#define | IFXDMA_ERROR_SRI (IFX_DMA_ME_CLRE_CSRIER_MSK << IFX_DMA_ME_CLRE_CSRIER_OFF)
Error mask for bus error on SRI. More...
#define | IFXDMA_ERROR_RAM (IFX_DMA_ME_CLRE_CRAMER_MSK << IFX_DMA_ME_CLRE_CRAMER_OFF)
Error mask for RAM error. More...
#define | IFXDMA_ERROR_SLL (IFX_DMA_ME_CLRE_CSLLER_MSK << IFX_DMA_ME_CLRE_CSLLER_OFF)
Error mask for SLL (safe linked list CRC checksum) error. More...
#define | IFXDMA_ERROR_DLL (IFX_DMA_ME_CLRE_CDLLER_MSK << IFX_DMA_ME_CLRE_CDLLER_OFF)
Error mask for DLL (failed linked list load) error. More...
#define | IFXDMA_NUM_MODULES (1)

Enumerations

enum IfxDma_ChannelId {
IfxDma_ChannelId_none = -1,
IfxDma_ChannelId_0 = 0,
IfxDma_ChannelId_1,
IfxDma_ChannelId_2,
IfxDma_ChannelId_3,
IfxDma_ChannelId_4,
IfxDma_ChannelId_5,
IfxDma_ChannelId_6,
IfxDma_ChannelId_7,
IfxDma_ChannelId_8,
IfxDma_ChannelId_9,
IfxDma_ChannelId_10,
IfxDma_ChannelId_11,
IfxDma_ChannelId_12,
IfxDma_ChannelId_13,
IfxDma_ChannelId_14,
IfxDma_ChannelId_15,
IfxDma_ChannelId_16,
IfxDma_ChannelId_17,
IfxDma_ChannelId_18,
IfxDma_ChannelId_19,
IfxDma_ChannelId_20,
IfxDma_ChannelId_21,
IfxDma_ChannelId_22,
IfxDma_ChannelId_23,
IfxDma_ChannelId_24,
IfxDma_ChannelId_25,
IfxDma_ChannelId_26,
IfxDma_ChannelId_27,
IfxDma_ChannelId_28,
IfxDma_ChannelId_29,
IfxDma_ChannelId_30,
IfxDma_ChannelId_31,
IfxDma_ChannelId_32,
IfxDma_ChannelId_33,
IfxDma_ChannelId_34,
IfxDma_ChannelId_35,
IfxDma_ChannelId_36,
IfxDma_ChannelId_37,
IfxDma_ChannelId_38,
IfxDma_ChannelId_39,
IfxDma_ChannelId_40,
IfxDma_ChannelId_41,
IfxDma_ChannelId_42,
IfxDma_ChannelId_43,
IfxDma_ChannelId_44,
IfxDma_ChannelId_45,
IfxDma_ChannelId_46,
IfxDma_ChannelId_47,
IfxDma_ChannelId_48,
IfxDma_ChannelId_49,
IfxDma_ChannelId_50,
IfxDma_ChannelId_51,
IfxDma_ChannelId_52,
IfxDma_ChannelId_53,
IfxDma_ChannelId_54,
IfxDma_ChannelId_55,
IfxDma_ChannelId_56,
IfxDma_ChannelId_57,
IfxDma_ChannelId_58,
IfxDma_ChannelId_59,
IfxDma_ChannelId_60,
IfxDma_ChannelId_61,
IfxDma_ChannelId_62,
IfxDma_ChannelId_63,
IfxDma_ChannelId_64,
IfxDma_ChannelId_65,
IfxDma_ChannelId_66,
IfxDma_ChannelId_67,
IfxDma_ChannelId_68,
IfxDma_ChannelId_69,
IfxDma_ChannelId_70,
IfxDma_ChannelId_71,
IfxDma_ChannelId_72,
IfxDma_ChannelId_73,
IfxDma_ChannelId_74,
IfxDma_ChannelId_75,
IfxDma_ChannelId_76,
IfxDma_ChannelId_77,
IfxDma_ChannelId_78,
IfxDma_ChannelId_79,
IfxDma_ChannelId_80,
IfxDma_ChannelId_81,
IfxDma_ChannelId_82,
IfxDma_ChannelId_83,
IfxDma_ChannelId_84,
IfxDma_ChannelId_85,
IfxDma_ChannelId_86,
IfxDma_ChannelId_87,
IfxDma_ChannelId_88,
IfxDma_ChannelId_89,
IfxDma_ChannelId_90,
IfxDma_ChannelId_91,
IfxDma_ChannelId_92,
IfxDma_ChannelId_93,
IfxDma_ChannelId_94,
IfxDma_ChannelId_95,
IfxDma_ChannelId_96,
IfxDma_ChannelId_97,
IfxDma_ChannelId_98,
IfxDma_ChannelId_99,
IfxDma_ChannelId_100,
IfxDma_ChannelId_101,
IfxDma_ChannelId_102,
IfxDma_ChannelId_103,
IfxDma_ChannelId_104,
IfxDma_ChannelId_105,
IfxDma_ChannelId_106,
IfxDma_ChannelId_107,
IfxDma_ChannelId_108,
IfxDma_ChannelId_109,
IfxDma_ChannelId_110,
IfxDma_ChannelId_111,
IfxDma_ChannelId_112,
IfxDma_ChannelId_113,
IfxDma_ChannelId_114,
IfxDma_ChannelId_115,
IfxDma_ChannelId_116,
IfxDma_ChannelId_117,
IfxDma_ChannelId_118,
IfxDma_ChannelId_119,
IfxDma_ChannelId_120,
IfxDma_ChannelId_121,
IfxDma_ChannelId_122,
IfxDma_ChannelId_123,
IfxDma_ChannelId_124,
IfxDma_ChannelId_125,
IfxDma_ChannelId_126,
IfxDma_ChannelId_127
}
DMA channel resources definition. More...

Detailed Description

DMA on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxDma_cfg.h.

Macro Definition Documentation

◆ IFXDMA_ERROR_D

#define IFXDMA_ERROR_D (IFX_DMA_ME_CLRE_CDER_MSK << IFX_DMA_ME_CLRE_CDER_OFF)

Error mask for move engine destination error.

Definition at line 72 of file IfxDma_cfg.h.

◆ IFXDMA_ERROR_DLL

#define IFXDMA_ERROR_DLL (IFX_DMA_ME_CLRE_CDLLER_MSK << IFX_DMA_ME_CLRE_CDLLER_OFF)

Error mask for DLL (failed linked list load) error.

Definition at line 92 of file IfxDma_cfg.h.

◆ IFXDMA_ERROR_RAM

#define IFXDMA_ERROR_RAM (IFX_DMA_ME_CLRE_CRAMER_MSK << IFX_DMA_ME_CLRE_CRAMER_OFF)

Error mask for RAM error.

Definition at line 84 of file IfxDma_cfg.h.

◆ IFXDMA_ERROR_S

#define IFXDMA_ERROR_S (IFX_DMA_ME_CLRE_CSER_MSK << IFX_DMA_ME_CLRE_CSER_OFF)

Error mask for move engine source error.

Definition at line 68 of file IfxDma_cfg.h.

◆ IFXDMA_ERROR_SLL

#define IFXDMA_ERROR_SLL (IFX_DMA_ME_CLRE_CSLLER_MSK << IFX_DMA_ME_CLRE_CSLLER_OFF)

Error mask for SLL (safe linked list CRC checksum) error.

Definition at line 88 of file IfxDma_cfg.h.

◆ IFXDMA_ERROR_SPB

#define IFXDMA_ERROR_SPB (IFX_DMA_ME_CLRE_CSPBER_MSK << IFX_DMA_ME_CLRE_CSPBER_OFF)

Error mask for bus error on SPB.

Definition at line 76 of file IfxDma_cfg.h.

◆ IFXDMA_ERROR_SRI

#define IFXDMA_ERROR_SRI (IFX_DMA_ME_CLRE_CSRIER_MSK << IFX_DMA_ME_CLRE_CSRIER_OFF)

Error mask for bus error on SRI.

Definition at line 80 of file IfxDma_cfg.h.

◆ IFXDMA_NUM_CHANNELS

#define IFXDMA_NUM_CHANNELS 128

Number of channels.

Definition at line 64 of file IfxDma_cfg.h.

◆ IFXDMA_NUM_MODULES

#define IFXDMA_NUM_MODULES (1)

Definition at line 94 of file IfxDma_cfg.h.

Enumeration Type Documentation

◆ IfxDma_ChannelId

enum IfxDma_ChannelId

DMA channel resources definition.

Enumerator
IfxDma_ChannelId_none | None of the Ifx_DMA Channels.
IfxDma_ChannelId_0 | Ifx_DMA Channel 0.
IfxDma_ChannelId_1 | Ifx_DMA Channel 1.
IfxDma_ChannelId_2 | Ifx_DMA Channel 2.
IfxDma_ChannelId_3 | Ifx_DMA Channel 3.
IfxDma_ChannelId_4 | Ifx_DMA Channel 4.
IfxDma_ChannelId_5 | Ifx_DMA Channel 5.
IfxDma_ChannelId_6 | Ifx_DMA Channel 6.
IfxDma_ChannelId_7 | Ifx_DMA Channel 7.
IfxDma_ChannelId_8 | Ifx_DMA Channel 8.
IfxDma_ChannelId_9 | Ifx_DMA Channel 9.
IfxDma_ChannelId_10 | Ifx_DMA Channel 10.
IfxDma_ChannelId_11 | Ifx_DMA Channel 11.
IfxDma_ChannelId_12 | Ifx_DMA Channel 12.
IfxDma_ChannelId_13 | Ifx_DMA Channel 13.
IfxDma_ChannelId_14 | Ifx_DMA Channel 14.
IfxDma_ChannelId_15 | Ifx_DMA Channel 15.
IfxDma_ChannelId_16 | Ifx_DMA Channel 16.
IfxDma_ChannelId_17 | Ifx_DMA Channel 17.
IfxDma_ChannelId_18 | Ifx_DMA Channel 18.
IfxDma_ChannelId_19 | Ifx_DMA Channel 19.
IfxDma_ChannelId_20 | Ifx_DMA Channel 20.
IfxDma_ChannelId_21 | Ifx_DMA Channel 21.
IfxDma_ChannelId_22 | Ifx_DMA Channel 22.
IfxDma_ChannelId_23 | Ifx_DMA Channel 23.
IfxDma_ChannelId_24 | Ifx_DMA Channel 24.
IfxDma_ChannelId_25 | Ifx_DMA Channel 25.
IfxDma_ChannelId_26 | Ifx_DMA Channel 26.
IfxDma_ChannelId_27 | Ifx_DMA Channel 27.
IfxDma_ChannelId_28 | Ifx_DMA Channel 28.
IfxDma_ChannelId_29 | Ifx_DMA Channel 29.
IfxDma_ChannelId_30 | Ifx_DMA Channel 30.
IfxDma_ChannelId_31 | Ifx_DMA Channel 31.
IfxDma_ChannelId_32 | Ifx_DMA Channel 32.
IfxDma_ChannelId_33 | Ifx_DMA Channel 33.
IfxDma_ChannelId_34 | Ifx_DMA Channel 34.
IfxDma_ChannelId_35 | Ifx_DMA Channel 35.
IfxDma_ChannelId_36 | Ifx_DMA Channel 36.
IfxDma_ChannelId_37 | Ifx_DMA Channel 37.
IfxDma_ChannelId_38 | Ifx_DMA Channel 38.
IfxDma_ChannelId_39 | Ifx_DMA Channel 39.
IfxDma_ChannelId_40 | Ifx_DMA Channel 40.
IfxDma_ChannelId_41 | Ifx_DMA Channel 41.
IfxDma_ChannelId_42 | Ifx_DMA Channel 42.
IfxDma_ChannelId_43 | Ifx_DMA Channel 43.
IfxDma_ChannelId_44 | Ifx_DMA Channel 44.
IfxDma_ChannelId_45 | Ifx_DMA Channel 45.
IfxDma_ChannelId_46 | Ifx_DMA Channel 46.
IfxDma_ChannelId_47 | Ifx_DMA Channel 47.
IfxDma_ChannelId_48 | Ifx_DMA Channel 48.
IfxDma_ChannelId_49 | Ifx_DMA Channel 49.
IfxDma_ChannelId_50 | Ifx_DMA Channel 50.
IfxDma_ChannelId_51 | Ifx_DMA Channel 51.
IfxDma_ChannelId_52 | Ifx_DMA Channel 52.
IfxDma_ChannelId_53 | Ifx_DMA Channel 53.
IfxDma_ChannelId_54 | Ifx_DMA Channel 54.
IfxDma_ChannelId_55 | Ifx_DMA Channel 55.
IfxDma_ChannelId_56 | Ifx_DMA Channel 56.
IfxDma_ChannelId_57 | Ifx_DMA Channel 57.
IfxDma_ChannelId_58 | Ifx_DMA Channel 58.
IfxDma_ChannelId_59 | Ifx_DMA Channel 59.
IfxDma_ChannelId_60 | Ifx_DMA Channel 60.
IfxDma_ChannelId_61 | Ifx_DMA Channel 61.
IfxDma_ChannelId_62 | Ifx_DMA Channel 62.
IfxDma_ChannelId_63 | Ifx_DMA Channel 63.
IfxDma_ChannelId_64 | Ifx_DMA Channel 64.
IfxDma_ChannelId_65 | Ifx_DMA Channel 65.
IfxDma_ChannelId_66 | Ifx_DMA Channel 66.
IfxDma_ChannelId_67 | Ifx_DMA Channel 67.
IfxDma_ChannelId_68 | Ifx_DMA Channel 68.
IfxDma_ChannelId_69 | Ifx_DMA Channel 69.
IfxDma_ChannelId_70 | Ifx_DMA Channel 70.
IfxDma_ChannelId_71 | Ifx_DMA Channel 71.
IfxDma_ChannelId_72 | Ifx_DMA Channel 72.
IfxDma_ChannelId_73 | Ifx_DMA Channel 73.
IfxDma_ChannelId_74 | Ifx_DMA Channel 74.
IfxDma_ChannelId_75 | Ifx_DMA Channel 75.
IfxDma_ChannelId_76 | Ifx_DMA Channel 76.
IfxDma_ChannelId_77 | Ifx_DMA Channel 77.
IfxDma_ChannelId_78 | Ifx_DMA Channel 78.
IfxDma_ChannelId_79 | Ifx_DMA Channel 79.
IfxDma_ChannelId_80 | Ifx_DMA Channel 80.
IfxDma_ChannelId_81 | Ifx_DMA Channel 81.
IfxDma_ChannelId_82 | Ifx_DMA Channel 82.
IfxDma_ChannelId_83 | Ifx_DMA Channel 83.
IfxDma_ChannelId_84 | Ifx_DMA Channel 84.
IfxDma_ChannelId_85 | Ifx_DMA Channel 85.
IfxDma_ChannelId_86 | Ifx_DMA Channel 86.
IfxDma_ChannelId_87 | Ifx_DMA Channel 87.
IfxDma_ChannelId_88 | Ifx_DMA Channel 88.
IfxDma_ChannelId_89 | Ifx_DMA Channel 89.
IfxDma_ChannelId_90 | Ifx_DMA Channel 90.
IfxDma_ChannelId_91 | Ifx_DMA Channel 91.
IfxDma_ChannelId_92 | Ifx_DMA Channel 92.
IfxDma_ChannelId_93 | Ifx_DMA Channel 93.
IfxDma_ChannelId_94 | Ifx_DMA Channel 94.
IfxDma_ChannelId_95 | Ifx_DMA Channel 95.
IfxDma_ChannelId_96 | Ifx_DMA Channel 96.
IfxDma_ChannelId_97 | Ifx_DMA Channel 97.
IfxDma_ChannelId_98 | Ifx_DMA Channel 98.
IfxDma_ChannelId_99 | Ifx_DMA Channel 99.
IfxDma_ChannelId_100 | Ifx_DMA Channel 100.
IfxDma_ChannelId_101 | Ifx_DMA Channel 101.
IfxDma_ChannelId_102 | Ifx_DMA Channel 102.
IfxDma_ChannelId_103 | Ifx_DMA Channel 103.
IfxDma_ChannelId_104 | Ifx_DMA Channel 104.
IfxDma_ChannelId_105 | Ifx_DMA Channel 105.
IfxDma_ChannelId_106 | Ifx_DMA Channel 106.
IfxDma_ChannelId_107 | Ifx_DMA Channel 107.
IfxDma_ChannelId_108 | Ifx_DMA Channel 108.
IfxDma_ChannelId_109 | Ifx_DMA Channel 109.
IfxDma_ChannelId_110 | Ifx_DMA Channel 110.
IfxDma_ChannelId_111 | Ifx_DMA Channel 111.
IfxDma_ChannelId_112 | Ifx_DMA Channel 112.
IfxDma_ChannelId_113 | Ifx_DMA Channel 113.
IfxDma_ChannelId_114 | Ifx_DMA Channel 114.
IfxDma_ChannelId_115 | Ifx_DMA Channel 115.
IfxDma_ChannelId_116 | Ifx_DMA Channel 116.
IfxDma_ChannelId_117 | Ifx_DMA Channel 117.
IfxDma_ChannelId_118 | Ifx_DMA Channel 118.
IfxDma_ChannelId_119 | Ifx_DMA Channel 119.
IfxDma_ChannelId_120 | Ifx_DMA Channel 120.
IfxDma_ChannelId_121 | Ifx_DMA Channel 121.
IfxDma_ChannelId_122 | Ifx_DMA Channel 122.
IfxDma_ChannelId_123 | Ifx_DMA Channel 123.
IfxDma_ChannelId_124 | Ifx_DMA Channel 124.
IfxDma_ChannelId_125 | Ifx_DMA Channel 125.
IfxDma_ChannelId_126 | Ifx_DMA Channel 126.
IfxDma_ChannelId_127 | Ifx_DMA Channel 127.

Definition at line 102 of file IfxDma_cfg.h.


iLLD_TC38A: IfxDma_Dma.h File Reference

  • Dma
  • Dma
Data Structures | Functions
IfxDma_Dma.h File Reference
iLLD » DMA

DMA DMA details. More...

#include "_Impl/IfxDma_cfg.h"
#include "Dma/Std/IfxDma.h"
#include "Cpu/Std/IfxCpu.h"
Include dependency graph for IfxDma_Dma.h:

Go to the source code of this file.

Data Structures

struct | IfxDma_Dma
DMA base address data structure (Module handle) More...
struct | IfxDma_Dma_Channel
Channel handle. More...
struct | IfxDma_Dma_ChannelConfig
Configuration data structure of the channel. More...
struct | IfxDma_Dma_Config
Configuration data structure of the Module. More...

Functions

IFX_EXTERN void | IfxDma_Dma_createModuleHandle (IfxDma_Dma *dmaHandle, Ifx_DMA *dma)
initializes a DMA module handle based on the current configuration. Can be used in code where it's ensure that the DMA module is already initialized, and a DMA handle isn't globally available. More...
IFX_EXTERN void | IfxDma_Dma_deInitChannel (IfxDma_Dma *dma, IfxDma_ChannelId channel)
de-initialize the DMA channel More...
IFX_EXTERN void | IfxDma_Dma_initModule (IfxDma_Dma *dma, const IfxDma_Dma_Config *config)
Initialize the DMA module. More...
IFX_EXTERN void | IfxDma_Dma_initModuleConfig (IfxDma_Dma_Config *config, Ifx_DMA *dma)
initialize the DMA module configuration More...
IFX_EXTERN void | IfxDma_Dma_initChannel (IfxDma_Dma_Channel *channel, const IfxDma_Dma_ChannelConfig *config)
initialize the DMA channel More...
IFX_EXTERN void | IfxDma_Dma_initChannelConfig (IfxDma_Dma_ChannelConfig *config, IfxDma_Dma *dma)
initialize the DMA module channel configuration More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxDma_Dma_getSrcPointer (IfxDma_Dma_Channel *channel)
Returns the SRC pointer for given DMA channel. More...
IFX_EXTERN void | IfxDma_Dma_initLinkedListEntry (void *ptrToAddress, const IfxDma_Dma_ChannelConfig *config)
linked list functionality within the DMA module More...
IFX_INLINE void | IfxDma_Dma_clearChannelInterrupt (IfxDma_Dma_Channel *channel)
Clear a channel transfer interrupt flag. More...
IFX_INLINE boolean | IfxDma_Dma_getAndClearChannelInterrupt (IfxDma_Dma_Channel *channel)
Return and clear a channel transfer interrupt flag The flag is automatically cleared with the call to this function. More...
IFX_INLINE boolean | IfxDma_Dma_getChannelInterrupt (IfxDma_Dma_Channel *channel)
Return a channel transfer interrupt flag. More...
IFX_INLINE boolean | IfxDma_Dma_isChannelTransactionPending (IfxDma_Dma_Channel *channel)
Poll for an ongoing transaction. More...
IFX_INLINE void | IfxDma_Dma_setChannelDestinationAddress (IfxDma_Dma_Channel *channel, uint32 address)
Re-initialize the destination address after a transaction. More...
IFX_INLINE void | IfxDma_Dma_setChannelSourceAddress (IfxDma_Dma_Channel *channel, uint32 address)
Re-initialize the source address after a transaction. More...
IFX_INLINE void | IfxDma_Dma_setChannelTransferCount (IfxDma_Dma_Channel *channel, uint32 transferCount)
Re-initialize the transfer count after a transaction. More...
IFX_INLINE void | IfxDma_Dma_startChannelTransaction (IfxDma_Dma_Channel *channel)
initiate the DMA move transaction More...

Detailed Description

DMA DMA details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxDma_Dma.h.


iLLD_TC38A: IfxDma.h File Reference

  • Dma
  • Std
Enumerations | Functions
IfxDma.h File Reference
iLLD » DMA

DMA basic functionality. More...

#include "_Impl/IfxDma_cfg.h"
#include "IfxDma_bf.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "IfxDma_reg.h"
#include "Src/Std/IfxSrc.h"
#include "Scu/Std/IfxScuWdt.h"
#include "Scu/Std/IfxScuCcu.h"
Include dependency graph for IfxDma.h:

Go to the source code of this file.

Enumerations

enum IfxDma_BusMasterMode {
IfxDma_BusMasterMode_user = 0,
IfxDma_BusMasterMode_supervisor = 1
}
Bus Master Mode definition Definition in Ifx_DMA.MODE[4].B.MODE. More...
enum IfxDma_ChannelBusPriority {
IfxDma_ChannelBusPriority_low = 0,
IfxDma_ChannelBusPriority_medium = 1,
IfxDma_ChannelBusPriority_high = 2
}
Channel Bus Priority definition. More...
enum IfxDma_ChannelIncrementCircular {
IfxDma_ChannelIncrementCircular_none = 0,
IfxDma_ChannelIncrementCircular_2 = 1,
IfxDma_ChannelIncrementCircular_4 = 2,
IfxDma_ChannelIncrementCircular_8 = 3,
IfxDma_ChannelIncrementCircular_16 = 4,
IfxDma_ChannelIncrementCircular_32 = 5,
IfxDma_ChannelIncrementCircular_64 = 6,
IfxDma_ChannelIncrementCircular_128 = 7,
IfxDma_ChannelIncrementCircular_256 = 8,
IfxDma_ChannelIncrementCircular_512 = 9,
IfxDma_ChannelIncrementCircular_1024 = 10,
IfxDma_ChannelIncrementCircular_2048 = 11,
IfxDma_ChannelIncrementCircular_4096 = 12,
IfxDma_ChannelIncrementCircular_8192 = 13,
IfxDma_ChannelIncrementCircular_16384 = 14,
IfxDma_ChannelIncrementCircular_32768 = 15
}
DMA circular buffer (wrap around) definition Definition in Ifx_DMA.CH[64].ADICR.B.CBLS and Ifx_DMA.CH[64].ADICR.B.CBLD. More...
enum IfxDma_ChannelIncrementDirection {
IfxDma_ChannelIncrementDirection_negative = 0,
IfxDma_ChannelIncrementDirection_positive = 1
}
DMA incrementation direction definition Definition in Ifx_DMA.CH[64].ADICR.B.INCS. More...
enum IfxDma_ChannelIncrementStep {
IfxDma_ChannelIncrementStep_1 = 0,
IfxDma_ChannelIncrementStep_2 = 1,
IfxDma_ChannelIncrementStep_4 = 2,
IfxDma_ChannelIncrementStep_8 = 3,
IfxDma_ChannelIncrementStep_16 = 4,
IfxDma_ChannelIncrementStep_32 = 5,
IfxDma_ChannelIncrementStep_64 = 6,
IfxDma_ChannelIncrementStep_128 = 7
}
DMA incrementation definition Definition in Ifx_DMA.CH[64].ADICR.B.SMF. More...
enum IfxDma_ChannelInterruptControl {
IfxDma_ChannelInterruptControl_thresholdLimitMatch = 0,
IfxDma_ChannelInterruptControl_transferCountDecremented = 1
}
Channel Transfer Interrupt generation mechanism. Definition in Ifx_DMA.CH[64].ADICR.B.INTCT (bit 0) More...
enum IfxDma_ChannelMove {
IfxDma_ChannelMove_1 = 0,
IfxDma_ChannelMove_2 = 1,
IfxDma_ChannelMove_4 = 2,
IfxDma_ChannelMove_8 = 3,
IfxDma_ChannelMove_16 = 4,
IfxDma_ChannelMove_3 = 5,
IfxDma_ChannelMove_5 = 6,
IfxDma_ChannelMove_9 = 7
}
DMA transfer definition Definition in Ifx_DMA.ME0.CHCR.B.BLKM and Ifx_DMA.ME1.CHCR.B.BLKM. More...
enum IfxDma_ChannelMoveSize {
IfxDma_ChannelMoveSize_8bit = 0,
IfxDma_ChannelMoveSize_16bit = 1,
IfxDma_ChannelMoveSize_32bit = 2,
IfxDma_ChannelMoveSize_64bit = 3,
IfxDma_ChannelMoveSize_128bit = 4,
IfxDma_ChannelMoveSize_256bit = 5
}
DMA move size definition Definition in Ifx_DMA.ME0.CHCR.B.CHDW and Ifx_DMA.ME1.CHCR.B.CHDW. More...
enum IfxDma_ChannelOperationMode {
IfxDma_ChannelOperationMode_single = 0,
IfxDma_ChannelOperationMode_continuous = 1
}
DMA operation mode Definition in Ifx_DMA.ME0.CHCR.B.CHMODE and Ifx_DMA.ME1.CHCR.B.CHMODE. More...
enum IfxDma_ChannelPattern {
IfxDma_ChannelPattern_0_disable = 0,
IfxDma_ChannelPattern_0_mode1 = 1,
IfxDma_ChannelPattern_0_mode2 = 2,
IfxDma_ChannelPattern_0_mode3 = 3,
IfxDma_ChannelPattern_1_disable = 4,
IfxDma_ChannelPattern_1_mode1 = 5,
IfxDma_ChannelPattern_1_mode2 = 6,
IfxDma_ChannelPattern_1_mode3 = 7
}
Pattern detection selection Definition in Ifx_DMA.ME0.CHCR.B.PATSEL and Ifx_DMA.ME1.CHCR.B.PATSEL. More...
enum IfxDma_ChannelPriority {
IfxDma_ChannelPriority_low = 0,
IfxDma_ChannelPriority_medium = 1,
IfxDma_ChannelPriority_high = 2
}
Channel Priority definition. More...
enum IfxDma_ChannelRequestMode {
IfxDma_ChannelRequestMode_oneTransferPerRequest = 0,
IfxDma_ChannelRequestMode_completeTransactionPerRequest = 1
}
DMA request mode Definition in Ifx_DMA.ME0.CHCR.B.RROAT and Ifx_DMA.ME1.CHCR.B.RROAT. More...
enum IfxDma_ChannelRequestSource {
IfxDma_ChannelRequestSource_peripheral = 0,
IfxDma_ChannelRequestSource_daisyChain = 1
}
DMA request selection Definition in Ifx_DMA.ME0.CHCR.B.PRSEL and Ifx_DMA.ME1.CHCR.B.PRSEL. More...
enum IfxDma_ChannelShadow {
IfxDma_ChannelShadow_none = 0,
IfxDma_ChannelShadow_src = 1,
IfxDma_ChannelShadow_dst = 2,
IfxDma_ChannelShadow_srcDirectWrite = 5,
IfxDma_ChannelShadow_dstDirectWrite = 6,
IfxDma_ChannelShadow_doubleSourceBufferingSwSwitch = 8,
IfxDma_ChannelShadow_doubleSourceBufferingHwSwSwitch = 9,
IfxDma_ChannelShadow_doubleDestinationBufferingSwSwitch = 10,
IfxDma_ChannelShadow_doubleDestinationBufferingHwSwSwitch = 11,
IfxDma_ChannelShadow_linkedList = 12,
IfxDma_ChannelShadow_accumulatedLinkedList = 13,
IfxDma_ChannelShadow_safeLinkedList = 14,
IfxDma_ChannelShadow_conditionalLinkedList = 15
}
shadow definition definition Definition in Ifx_DMA.CH[64].ADICR.B.SHCT More...
enum IfxDma_HardwareResourcePartition {
IfxDma_HardwareResourcePartition_0 = 0,
IfxDma_HardwareResourcePartition_1,
IfxDma_HardwareResourcePartition_2,
IfxDma_HardwareResourcePartition_3
}
enum IfxDma_MoveEngine {
IfxDma_MoveEngine_0 = 0,
IfxDma_MoveEngine_1 = 1
}
DMA move engine definition. More...
enum IfxDma_SleepMode {
IfxDma_SleepMode_enable = 0,
IfxDma_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_DMA.CLC.B.EDIS. More...

Functions

IFX_INLINE boolean | IfxDma_isChannelReset (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return the status of a DMA channel (reset / not reset) This API needs to be used after the IfxDma_resetChannel() More...
IFX_INLINE void | IfxDma_resetChannel (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Reset the channel. More...
IFX_INLINE void | IfxDma_clearChannelTransactionRequestLost (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Clear the channel transaction request lost flag status. More...
IFX_INLINE void | IfxDma_disableChannelTransaction (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Disable a DMA channel hardware transaction request. More...
IFX_INLINE void | IfxDma_disableChannelTransactionLostError (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Disable the generation of a channel transaction lost error interrupt. More...
IFX_INLINE void | IfxDma_enableChannelTransaction (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Enable a DMA channel hardware transaction request. More...
IFX_INLINE void | IfxDma_enableChannelTransactionLostError (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Enable the generation of a channel transaction lost error interrupt. More...
IFX_INLINE boolean | IfxDma_getChannelTransactionRequestLost (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Check the channel transaction request lost flag status. More...
IFX_INLINE IfxDma_ChannelIncrementCircular | IfxDma_getCircularRangeCode (uint16 range)
Converts DMA circular range to circular code. More...
IFX_INLINE boolean | IfxDma_isChannelTransactionEnabled (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return the hardware transaction request status of a DMA channel. More...
IFX_INLINE boolean | IfxDma_isChannelTransactionPending (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return the status of a DMA channel (transaction pending) More...
IFX_INLINE void | IfxDma_setSleepMode (Ifx_DMA *dma, IfxDma_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxDma_startChannelTransaction (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Request a DMA channel transaction. More...
IFX_INLINE void | IfxDma_clearErrorFlags (Ifx_DMA *dma, IfxDma_MoveEngine moveEngine, uint32 mask)
Clear the DMA error status flags. More...
IFX_INLINE void | IfxDma_disableMoveEngineDestinationError (Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
Disable the generation of a Move engine destination error interrupt. More...
IFX_INLINE void | IfxDma_disableMoveEngineSourceError (Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
Disable the generation of a Move engine source error interrupt. More...
IFX_INLINE void | IfxDma_enableMoveEngineDestinationError (Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
Enable the generation of a Move engine destination error interrupt. More...
IFX_INLINE void | IfxDma_enableMoveEngineSourceError (Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
Enable the generation of a Move engine source error interrupt. More...
IFX_INLINE uint32 | IfxDma_getErrorFlags (Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
Return the DMA error status flags. More...
IFX_INLINE uint32 | IfxDma_getChannelDestinationAddress (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Get a channel source address. More...
IFX_INLINE uint32 | IfxDma_getChannelSourceAddress (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Get a channel source address. More...
IFX_INLINE boolean | IfxDma_getChannelSuspendModeStatus (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return the DMA channel suspend Mode status. More...
IFX_INLINE uint32 | IfxDma_getChannelTransferCount (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return remaining DMA transfer count. More...
IFX_INLINE uint32 | IfxDma_getTimestamp (Ifx_DMA *dma)
get the time stamp More...
IFX_INLINE void | IfxDma_setChannelBlockMode (Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelMove blockMode)
Configure the move count for each DMA channel transfer. More...
IFX_INLINE void | IfxDma_setChannelContinuousMode (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure a DMA channel to "continous transaction mode" After a transaction, the hardware request transaction remain enabled. More...
IFX_INLINE void | IfxDma_setChannelDestinationAddress (Ifx_DMA *dma, IfxDma_ChannelId channelId, void *address)
Configure the destination address. More...
IFX_INLINE void | IfxDma_setChannelDestinationIncrementStep (Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size)
Configure a DMA channel destination pointer. More...
IFX_INLINE void | IfxDma_setChannelMoveSize (Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelMoveSize moveSize)
Configure a DMA channel move. More...
IFX_INLINE void | IfxDma_setChannelShadow (Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelShadow shadow)
Configure a DMA channel shadow pointer. More...
IFX_INLINE void | IfxDma_setChannelSingleMode (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure a DMA channel to "single transaction mode" After a transaction, the hardware request transaction is disabled, and must be set by software again. More...
IFX_INLINE void | IfxDma_setChannelSingleTransaction (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure a DMA channel to "single transaction mode" One transfer request starts a complete DMA transaction. More...
IFX_INLINE void | IfxDma_setChannelSingleTransfer (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure a DMA channel to "single transfer mode" A transfer request is required for each transfer. More...
IFX_INLINE void | IfxDma_setChannelSourceAddress (Ifx_DMA *dma, IfxDma_ChannelId channelId, const void *address)
Configure the source address. More...
IFX_INLINE void | IfxDma_setChannelSourceIncrementStep (Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size)
Configure a DMA channel source pointer. More...
IFX_INLINE void | IfxDma_setChannelSuspendEnable (Ifx_DMA *dma, IfxDma_ChannelId channelId, boolean enable)
Configure a DMA channel suspend enable. More...
IFX_INLINE void | IfxDma_setChannelTransferCount (Ifx_DMA *dma, IfxDma_ChannelId channelId, uint32 transferCount)
Configure the move count of a DMA channel transaction. More...
IFX_INLINE void | IfxDma_writeChannelShadowDisable (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure the shadow pointer register to read only. More...
IFX_INLINE void | IfxDma_writeChannelShadowEnable (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure the shadow pointer register to write-able. More...
IFX_INLINE void | IfxDma_clearChannelHalt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Clear channel halt request and aknowledgement. More...
IFX_INLINE boolean | IfxDma_getChannelHalt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Get channel halt aknowledgement. More...
IFX_INLINE void | IfxDma_setChannelHalt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
setting channel halt request More...
IFX_INLINE boolean | IfxDma_getDoubleBufferRead (Ifx_DMA *dma, IfxDma_ChannelId channelId)
get information on buffer being read by software and clear the notification flag More...
IFX_INLINE boolean | IfxDma_getDoubleBufferSelection (Ifx_DMA *dma, IfxDma_ChannelId channelId)
get Double buffer selection More...
IFX_INLINE void | IfxDma_keepDoubleBufferActive (Ifx_DMA *dma, IfxDma_ChannelId channelId)
keeps the double buffer active More...
IFX_INLINE void | IfxDma_switchDoubleBuffer (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Double buffer switch application. More...
IFX_INLINE void | IfxDma_clearChannelInterrupt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Clear a channel transfer interrupt flag. More...
IFX_INLINE void | IfxDma_disableChannelInterrupt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Disable channel interrupt trigger. More...
IFX_INLINE void | IfxDma_enableChannelInterrupt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Enable channel interrupt trigger. More...
IFX_INLINE boolean | IfxDma_getAndClearChannelInterrupt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return and clear a channel transfer interrupt flag The flag is automatically cleared with the call to this function. More...
IFX_INLINE boolean | IfxDma_getAndClearChannelPatternDetectionInterrupt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns and clears the pattern detection interrupt flag. More...
IFX_INLINE boolean | IfxDma_getAndClearChannelWrapDestinationBufferInterrupt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns and clears the status of channel wrap destination buffer interrupt trigger flag. More...
IFX_INLINE boolean | IfxDma_getAndClearChannelWrapSourceBufferInterrupt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns and clears the status of channel wrap source buffer interrupt trigger flag. More...
IFX_INLINE boolean | IfxDma_getChannelInterrupt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return a channel transfer interrupt flag. More...
IFX_INLINE boolean | IfxDma_getChannelPatternDetectionOldValue (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns whether the old value of pattern detection corresponding pattern comparison operation found a pattern match in previous DMA * read move or not. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxDma_getSrcPointer (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns the SRC pointer for given DMA channel. More...
IFX_INLINE void | IfxDma_setChannelInterruptServiceRequest (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Setting of channel interrupt service request by software. More...
IFX_INLINE void | IfxDma_enableSwapDataByte (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Enable the Swap Data CRC Byte order. More...
IFX_INLINE void | IfxDma_setChannelHardwareResourcePartition (Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_HardwareResourcePartition resourcePartition)
Configure the hardware resource partition. More...
IFX_INLINE void | IfxDma_setInterruptControlValue (Ifx_DMA *dma, IfxDma_ChannelId channelId, uint8 value)
Sets the Interrupt control value. More...
IFX_INLINE void | IfxDma_setCircularBufferDestinationLength (Ifx_DMA *dma, IfxDma_ChannelId channelId, uint16 length)
Sets the Circular Buffer Destination Length. More...
IFX_INLINE void | IfxDma_setCircularBufferSourceLength (Ifx_DMA *dma, IfxDma_ChannelId channelId, uint16 length)
Sets the Circular Buffer Source Length. More...
IFX_INLINE void | IfxDma_enableSourceCircularBuffer (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Enable the Source Circular Buffer. More...
IFX_INLINE void | IfxDma_enableDestinationCircularBuffer (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Enable the Destination Circular Buffer. More...
IFX_INLINE uint32 | IfxDma_getDataCRC (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns the Data CRC. More...
IFX_INLINE uint32 | IfxDma_getSourceAndDestinationCRC (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns the Source and Destination CRC. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxDma_getErrPointer (Ifx_DMA *dma, IfxDma_HardwareResourcePartition resourcePartition)
Returns the ERR pointer. More...

Detailed Description

DMA basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxDma.h.

Function Documentation

◆ IfxDma_enableDestinationCircularBuffer()

IFX_INLINE void IfxDma_enableDestinationCircularBuffer | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Enable the Destination Circular Buffer.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None

Definition at line 1758 of file IfxDma.h.

◆ IfxDma_enableSourceCircularBuffer()

IFX_INLINE void IfxDma_enableSourceCircularBuffer | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Enable the Source Circular Buffer.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None

Definition at line 1752 of file IfxDma.h.

◆ IfxDma_enableSwapDataByte()

IFX_INLINE void IfxDma_enableSwapDataByte | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Enable the Swap Data CRC Byte order.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None
// Enable the Swap Data CRC Byte order
IfxDma_enableSwapDataByte(chn[0].dma, chn[0].channelId);

Definition at line 1719 of file IfxDma.h.

◆ IfxDma_getDataCRC()

IFX_INLINE uint32 IfxDma_getDataCRC | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Returns the Data CRC.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
The Data CRC value

Definition at line 1764 of file IfxDma.h.

◆ IfxDma_getErrPointer()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxDma_getErrPointer | ( | Ifx_DMA * | dma,
 |  | IfxDma_HardwareResourcePartition | resourcePartition
 | ) |  |

Returns the ERR pointer.

Parameters
dma | pointer to DMA module
resourcePartition | Hardware resource partition
Returns
ERR pointer for given DMA resource Partition

Definition at line 1776 of file IfxDma.h.

◆ IfxDma_getSourceAndDestinationCRC()

IFX_INLINE uint32 IfxDma_getSourceAndDestinationCRC | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Returns the Source and Destination CRC.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
The source and destination CRC values

Definition at line 1770 of file IfxDma.h.

◆ IfxDma_setChannelHardwareResourcePartition()

IFX_INLINE void IfxDma_setChannelHardwareResourcePartition | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId,
 |  | IfxDma_HardwareResourcePartition | resourcePartition
 | ) |  |

Configure the hardware resource partition.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
resourcePartition | Hardware resource partition
Returns
None
// Set the required hardware resource partition
IfxDma_setChannelHardwareResourcePartition(chn[0].dma, chn[0].channelId,setChannelHardwareResourcePartition);

Definition at line 1725 of file IfxDma.h.

◆ IfxDma_setCircularBufferDestinationLength()

IFX_INLINE void IfxDma_setCircularBufferDestinationLength | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId,
 |  | uint16 | length
 | ) |  |

Sets the Circular Buffer Destination Length.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
length | Circular Buffer Destination Length
Returns
None

Definition at line 1740 of file IfxDma.h.

◆ IfxDma_setCircularBufferSourceLength()

IFX_INLINE void IfxDma_setCircularBufferSourceLength | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId,
 |  | uint16 | length
 | ) |  |

Sets the Circular Buffer Source Length.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
length | Circular Buffer Source Length
Returns
None

Definition at line 1746 of file IfxDma.h.

◆ IfxDma_setInterruptControlValue()

IFX_INLINE void IfxDma_setInterruptControlValue | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId,
 |  | uint8 | value
 | ) |  |

Sets the Interrupt control value.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
value | Interrupt control value
Returns
None

Definition at line 1734 of file IfxDma.h.


iLLD_TC38A: DTS

Modules | Files
DTS
iLLD
Collaboration diagram for DTS:

Modules

Implementation
Standard Driver
How to use the DTS Interface driver?
DTS

Files

file | IfxDts_cfg.h
DTS on-chip implementation data.
file | IfxDts_Dts.h
DTS DTS details.
file | IfxDts.h
DTS basic functionality.

Detailed Description


iLLD_TC38A: Implementation

Implementation
iLLD » DTS
Collaboration diagram for Implementation:


iLLD_TC38A: Standard Driver

Modules
Standard Driver
iLLD » DTS
Collaboration diagram for Standard Driver:

Modules

Control functions
Status functions

Detailed Description


iLLD_TC38A: Control functions

Control functions
iLLD » DTS » Standard Driver
Collaboration diagram for Control functions:


iLLD_TC38A: Status functions

Functions
Status functions
iLLD » DTS » Standard Driver
Collaboration diagram for Status functions:

Functions

IFX_INLINE volatile Ifx_SRC_SRCR * | IfxDts_getSrcPointer (void)
Gets the Interrupt request source. More...
IFX_INLINE uint16 | IfxDts_getTemperatureValue (void)
Read the temperature measurement result. More...

Detailed Description

Function Documentation

◆ IfxDts_getSrcPointer()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxDts_getSrcPointer ( void )

Gets the Interrupt request source.

Returns
Address of interrupt request source

Definition at line 82 of file IfxDts.h.

Referenced by IfxDts_Dts_initModule().

◆ IfxDts_getTemperatureValue()

IFX_INLINE uint16 IfxDts_getTemperatureValue ( void )

Read the temperature measurement result.

Returns
Temperature measurement result

Definition at line 88 of file IfxDts.h.

Referenced by IfxDts_Dts_getTemperatureCelsius(), and IfxDts_Dts_getTemperatureValue().


iLLD_TC38A: How to use the DTS Interface driver?

How to use the DTS Interface driver?
iLLD » DTS
Collaboration diagram for How to use the DTS Interface driver?:

DTS gives the die-temperature result which will decoded to standard temperature value. Minimum first two temperature results are to be ignored to get reliable temperature.

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Dts/Dts/IfxDts_Dts.h>

Interrupt Handler Installation

See also How to define Interrupts?

Define priorities for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:

// priorities are normally defined in Ifx_IntPrioDef.h
#define IFX_INTPRIO_DTS 1

Add the interrupt service routine to your C code which should do the error flag handling:

IFX_INTERRUPT(dtsISR, 0, IFX_INTPRIO_DTS)
{
// DTS finished temperature measurement
uint16 temperatureValue = IfxDts_Dts_getTemperatureValue();
// here we could do something with the value...
}

Finally install the interrupt handler in your initialisation function:

// install interrupt handler
IfxCpu_Irq_installInterruptHandler(&dtsISR, IFX_INTPRIO_DTS);
IfxCpu_enableInterrupts();

DTS Module Initialisation

The module initialisation can be done in the same function:

// Get the default configuration
IfxDts_Dts_Config dtsConfig;
IfxDts_Dts_initModuleConfig(&dtsConfig);
// Adapt the default configuration if required
dtsConfig.isrPriority = IFX_INTPRIO_DTS;
dtsConfig.isrTypeOfService = IfxCpu_Irq_getTos(IfxCpu_getCoreIndex());
dtsConfig.lowerTemperatureLimit = -35; // SMU alarm if temperature value is below this Celsius value
dtsConfig.upperTemperatureLimit = 150; // SMU alarm if temperature value is above this Celsius value
// Module initialisation
IfxDts_Dts_initModule(&dtsConfig);

IRQ based measurements

Whenever the interrupt handler is called, a new measurment result is available and could be processed further (e.g. for statistical analysis).

IFX_INTERRUPT(dtsISR, 0, IFX_INTPRIO_DTS)
{
// DTS finished temperature measurement
uint16 temperatureValue = IfxDts_Dts_getTemperatureValue();
// here we could do something with the value...
}

Measurements without IRQs

If no interrupt routine should be used, a new measurement result can be requested the following way:

uint16 temperatureValue = IfxDts_Dts_getTemperatureValue();

Alternatively (and this is the normal usage), the DTS could be periodically started from a timer routine, e.g. each mS. The conversion itself takes 100 uS maximum.

Temperature conversion

Following function returns the actual temperature in Celsius:

float32 temperature = IfxDts_Dts_getTemperatureCelsius();


iLLD_TC38A: DTS

Modules
DTS
iLLD » DTS
Collaboration diagram for DTS:

Modules

Data Structures
Module Initialisation functions
Sensor Functions
Conversion Functions

Detailed Description


iLLD_TC38A: Data Structures

Data Structures
Data Structures
iLLD » DTS » DTS
Collaboration diagram for Data Structures:

Data Structures

struct IfxDts_Dts_Config
DTS module configuration structure. More...

Detailed Description

Data Structure Documentation

◆ IfxDts_Dts_Config

struct IfxDts_Dts_Config

DTS module configuration structure.

Definition at line 168 of file IfxDts_Dts.h.

Data Fields
uint16 | isrPriority | interrupt priority
IfxSrc_Tos | isrTypeOfService | type of interrupt service
float32 | lowerTemperatureLimit | Specifies the lower temperature limit compared against die temperature in Celsius. A SMU will be triggered if the measurement result is below this limit
boolean | sensorControlDisabled | MODULE_SCU.DTSCON.SCLK, specifies the control register lock except MODULE_SCU.DTSCON.START.
float32 | upperTemperatureLimit | Specifies the upper temperature limit compared against die temperature in Celsius. A SMU will be triggered if the measurement result is above this limit


iLLD_TC38A: Module Initialisation functions

Functions
Module Initialisation functions
iLLD » DTS » DTS
Collaboration diagram for Module Initialisation functions:

Functions

IFX_EXTERN void | IfxDts_Dts_initModule (const IfxDts_Dts_Config *config)
Initialise the DTS with supplied configuration. More...
IFX_EXTERN void | IfxDts_Dts_initModuleConfig (IfxDts_Dts_Config *config)
Intialises the module configuration buffer with default configuration. More...

Detailed Description

Function Documentation

◆ IfxDts_Dts_initModule()

IFX_EXTERN void IfxDts_Dts_initModule ( const IfxDts_Dts_Config * config )

Initialise the DTS with supplied configuration.

Parameters
config pointer to module configuration structure
Returns
None

Usage Example : How to use the DTS Interface driver?

Definition at line 75 of file IfxDts_Dts.c.

◆ IfxDts_Dts_initModuleConfig()

IFX_EXTERN void IfxDts_Dts_initModuleConfig ( IfxDts_Dts_Config * config )

Intialises the module configuration buffer with default configuration.

Parameters
config pointer to module configuration structure
Returns
None

Usage Example : How to use the DTS Interface driver?

Definition at line 95 of file IfxDts_Dts.c.


iLLD_TC38A: Sensor Functions

Functions
Sensor Functions
iLLD » DTS » DTS
Collaboration diagram for Sensor Functions:

Functions

IFX_INLINE float32 | IfxDts_Dts_getTemperatureCelsius (void)
Returns the converted temperature in Celsius. More...
IFX_INLINE uint16 | IfxDts_Dts_getTemperatureValue (void)
Returns the unconverted temperature measurement result. More...

Detailed Description

Function Documentation

◆ IfxDts_Dts_getTemperatureCelsius()

IFX_INLINE float32 IfxDts_Dts_getTemperatureCelsius ( void )

Returns the converted temperature in Celsius.

Returns
The temperature based on the DTS temperature value

Usage Example : How to use the DTS Interface driver?

Definition at line 260 of file IfxDts_Dts.h.

◆ IfxDts_Dts_getTemperatureValue()

IFX_INLINE uint16 IfxDts_Dts_getTemperatureValue ( void )

Returns the unconverted temperature measurement result.

Returns
current sensor measured result.

Usage Example : How to use the DTS Interface driver?

Definition at line 266 of file IfxDts_Dts.h.


iLLD_TC38A: Conversion Functions

Functions
Conversion Functions
iLLD » DTS » DTS
Collaboration diagram for Conversion Functions:

Functions

IFX_EXTERN uint16 | IfxDts_Dts_convertFromCelsius (float32 temperatureValue)
Converts a temperature value in Celsius to DTS value. More...
IFX_EXTERN float32 | IfxDts_Dts_convertToCelsius (uint16 dtsValue)
Converts the measurement value returned from DTS to Celsius. More...

Detailed Description

Function Documentation

◆ IfxDts_Dts_convertFromCelsius()

IFX_EXTERN uint16 IfxDts_Dts_convertFromCelsius ( float32 temperatureValue )

Converts a temperature value in Celsius to DTS value.

Parameters
temperatureValue the temperature in Celsius
Returns
the appr. DTS value

Definition at line 52 of file IfxDts_Dts.c.

Referenced by IfxDts_Dts_initModule().

◆ IfxDts_Dts_convertToCelsius()

IFX_EXTERN float32 IfxDts_Dts_convertToCelsius ( uint16 dtsValue )

Converts the measurement value returned from DTS to Celsius.

Parameters
dtsValue measurement value returned from DTS
Returns
temperature in Celsius

Definition at line 69 of file IfxDts_Dts.c.

Referenced by IfxDts_Dts_getTemperatureCelsius().


iLLD_TC38A: IfxDts_cfg.h File Reference

  • _Impl
Macros
IfxDts_cfg.h File Reference
iLLD » DTS

DTS on-chip implementation data. More...

Go to the source code of this file.

Macros

#define | IFXDTS_DEFAULT_TEMPERATURELIMIT_LOW (-40.0)
#define | IFXDTS_DEFAULT_TEMPERATURELIMIT_UPPER (170.0)
#define | IFXDTS_NUM_MODULES (1)

Detailed Description

DTS on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxDts_cfg.h.

Macro Definition Documentation

◆ IFXDTS_DEFAULT_TEMPERATURELIMIT_LOW

#define IFXDTS_DEFAULT_TEMPERATURELIMIT_LOW (-40.0)

Definition at line 60 of file IfxDts_cfg.h.

Referenced by IfxDts_Dts_initModuleConfig().

◆ IFXDTS_DEFAULT_TEMPERATURELIMIT_UPPER

#define IFXDTS_DEFAULT_TEMPERATURELIMIT_UPPER (170.0)

Definition at line 62 of file IfxDts_cfg.h.

Referenced by IfxDts_Dts_initModuleConfig().

◆ IFXDTS_NUM_MODULES

#define IFXDTS_NUM_MODULES (1)

Definition at line 64 of file IfxDts_cfg.h.


iLLD_TC38A: IfxDts_Dts.h File Reference

  • Dts
  • Dts
Data Structures | Functions
IfxDts_Dts.h File Reference
iLLD » DTS

DTS DTS details. More...

#include "Dts/Std/IfxDts.h"
#include "Cpu/Std/IfxCpu.h"
Include dependency graph for IfxDts_Dts.h:

Go to the source code of this file.

Data Structures

struct IfxDts_Dts_Config
DTS module configuration structure. More...

Functions

IFX_EXTERN void | IfxDts_Dts_initModule (const IfxDts_Dts_Config *config)
Initialise the DTS with supplied configuration. More...
IFX_EXTERN void | IfxDts_Dts_initModuleConfig (IfxDts_Dts_Config *config)
Intialises the module configuration buffer with default configuration. More...
IFX_INLINE float32 | IfxDts_Dts_getTemperatureCelsius (void)
Returns the converted temperature in Celsius. More...
IFX_INLINE uint16 | IfxDts_Dts_getTemperatureValue (void)
Returns the unconverted temperature measurement result. More...
IFX_EXTERN uint16 | IfxDts_Dts_convertFromCelsius (float32 temperatureValue)
Converts a temperature value in Celsius to DTS value. More...
IFX_EXTERN float32 | IfxDts_Dts_convertToCelsius (uint16 dtsValue)
Converts the measurement value returned from DTS to Celsius. More...

Detailed Description

DTS DTS details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxDts_Dts.h.


iLLD_TC38A: IfxDts.h File Reference

  • Dts
  • Std
Functions
IfxDts.h File Reference
iLLD » DTS

DTS basic functionality. More...

#include "_Impl/IfxDts_cfg.h"
#include "IfxPms_reg.h"
#include "IfxPms_bf.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "Src/Std/IfxSrc.h"
Include dependency graph for IfxDts.h:

Go to the source code of this file.

Functions

IFX_INLINE volatile Ifx_SRC_SRCR * | IfxDts_getSrcPointer (void)
Gets the Interrupt request source. More...
IFX_INLINE uint16 | IfxDts_getTemperatureValue (void)
Read the temperature measurement result. More...

Detailed Description

DTS basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxDts.h.


iLLD_TC38A: EDSADC

Modules | Files
EDSADC
iLLD
Collaboration diagram for EDSADC:

Modules

Implementation
Standard Driver
EDSADC Pin Mapping
How to use the EDSADC Interface driver?
EDSADC

Files

file | IfxEdsadc_cfg.h
EDSADC on-chip implementation data.
file | IfxEdsadc_PinMap.c
EDSADC I/O map.
file | IfxEdsadc_PinMap.h
EDSADC I/O map.
file | IfxEdsadc_Edsadc.h
EDSADC EDSADC details.
file | IfxEdsadc.h
EDSADC basic functionality.

Detailed Description


iLLD_TC38A: Implementation

Implementation
iLLD » EDSADC
Collaboration diagram for Implementation:


iLLD_TC38A: Standard Driver

Modules
Standard Driver
iLLD » EDSADC
Collaboration diagram for Standard Driver:

Modules

Enumerations
Operative Functions
Support Functions
Interrupt Functions
IO Pin Configuration Functions

Detailed Description


iLLD_TC38A: Enumerations

Enumerations
Enumerations
iLLD » EDSADC » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxEdsadc_AnalogClockSyncDelay {
IfxEdsadc_AnalogClockSyncDelay_noDelay = 0,
IfxEdsadc_AnalogClockSyncDelay_cycleDelay1 = 1,
IfxEdsadc_AnalogClockSyncDelay_cycleDelay2,
IfxEdsadc_AnalogClockSyncDelay_cycleDelay3,
IfxEdsadc_AnalogClockSyncDelay_cycleDelay4,
IfxEdsadc_AnalogClockSyncDelay_cycleDelay5,
IfxEdsadc_AnalogClockSyncDelay_cycleDelay6,
IfxEdsadc_AnalogClockSyncDelay_cycleDelay7
}
Analog Clock Synchronization Delay Definition in Ifx_DSADC.MODCFG.B.ACSD. More...
enum IfxEdsadc_AuxServiceRequest {
IfxEdsadc_AuxServiceRequest_never = 0,
IfxEdsadc_AuxServiceRequest_compEvent = 1,
IfxEdsadc_AuxServiceRequest_timestampEvent = 2,
IfxEdsadc_AuxServiceRequest_altSource = 3
}
Service request generation (auxiliary)
Definition in Ifx_EDSADC.FCFGM.B.SRGA. More...
enum IfxEdsadc_CarrierWaveformMode {
IfxEdsadc_CarrierWaveformMode_stopped = 0,
IfxEdsadc_CarrierWaveformMode_square = 1,
IfxEdsadc_CarrierWaveformMode_triangle = 2,
IfxEdsadc_CarrierWaveformMode_sine = 3
}
Carrier generation mode
Definition in Ifx_EDSADC.CGCFG.B.CGMOD. More...
enum IfxEdsadc_CommonModeHoldVoltage {
IfxEdsadc_CommonModeHoldVoltage_disable = 0,
IfxEdsadc_CommonModeHoldVoltage_enable = 1
}
Common Mode Hold Voltage Enable. More...
enum IfxEdsadc_DataRead {
IfxEdsadc_DataRead_signOnHighbit = 0,
IfxEdsadc_DataRead_timestampOnHighbit = 1,
IfxEdsadc_DataRead_double = 2
}
Select the data to be returned when register RESM is read Definition in Ifx_DSADC.DICFG.B.DRM. More...
enum IfxEdsadc_DataStream {
IfxEdsadc_DataStream_onChipModulator = 0,
IfxEdsadc_DataStream_doubleDataClockEdge = 3,
IfxEdsadc_DataStream_directFallingClockEdge = 4,
IfxEdsadc_DataStream_directRisingClockEdge = 5,
IfxEdsadc_DataStream_secondFallingClockEdge = 6,
IfxEdsadc_DataStream_secondRisingClockEdge = 7
}
Data stream select Definition in Ifx_DSADC.DICFG.B.DSS. More...
enum IfxEdsadc_DitheringIntensity {
IfxEdsadc_DitheringIntensity_minimum = 0,
IfxEdsadc_DitheringIntensity_low = 1,
IfxEdsadc_DitheringIntensity_medium = 2,
IfxEdsadc_DitheringIntensity_high = 3
}
Trimming Value for Dithering function Definition in Ifx_DSADC.GLOBCFG.B.DITRIM. More...
enum IfxEdsadc_EventSelect {
IfxEdsadc_EventSelect_everyNewResult = 0,
IfxEdsadc_EventSelect_insideBoundry = 1,
IfxEdsadc_EventSelect_outsideBoundry = 2
}
Define when comparator event is generated Definition in Ifx_DSADC.FCFGM.B.ESEL. More...
enum IfxEdsadc_FilterRunTimeInputCycle {
IfxEdsadc_FilterRunTimeInputCycle_2 = 0,
IfxEdsadc_FilterRunTimeInputCycle_4 = 1,
IfxEdsadc_FilterRunTimeInputCycle_8 = 2,
IfxEdsadc_FilterRunTimeInputCycle_16 = 3
}
Defines the duration of the additional filter effect, based on values input to the filter. More...
enum IfxEdsadc_FilterStrength {
IfxEdsadc_FilterStrength_minimum = 0,
IfxEdsadc_FilterStrength_weak = 1,
IfxEdsadc_FilterStrength_medium = 2,
IfxEdsadc_FilterStrength_maximum = 3
}
Specifies Slew Rate Filter Strength. More...
enum IfxEdsadc_FractionalRefVoltage {
IfxEdsadc_FractionalRefVoltage_disable = 0,
IfxEdsadc_FractionalRefVoltage_enable = 1
}
Fractional Reference Voltage Enable. More...
enum IfxEdsadc_FractionalRefVoltageSelection {
IfxEdsadc_FractionalRefVoltageSelection_div2 = 0,
IfxEdsadc_FractionalRefVoltageSelection_div4 = 1,
IfxEdsadc_FractionalRefVoltageSelection_div8 = 2,
IfxEdsadc_FractionalRefVoltageSelection_div16 = 3
}
Fraction reference voltage selection. More...
enum IfxEdsadc_HalfSupplyVoltage {
IfxEdsadc_HalfSupplyVoltage_disable = 0,
IfxEdsadc_HalfSupplyVoltage_enable = 1
}
Half Supply Voltage Enable. More...
enum IfxEdsadc_InputConfig {
IfxEdsadc_InputConfig_inputPin = 0,
IfxEdsadc_InputConfig_supplyVoltage = 1,
IfxEdsadc_InputConfig_commonModeVoltage = 2,
IfxEdsadc_InputConfig_referenceGround = 3
}
Modulator configuration of positive/negative input line
Definition in Ifx_DSADC.MODCFGx.B.INCFGP and Ifx_DSADC.MODCFGx.B.INCFGN. More...
enum IfxEdsadc_InputDataSource {
IfxEdsadc_InputDataSource_directInputA = 0,
IfxEdsadc_InputDataSource_invertedInputA = 1,
IfxEdsadc_InputDataSource_directInputB = 2,
IfxEdsadc_InputDataSource_invertedInputB = 3,
IfxEdsadc_InputDataSource_directInputC = 4,
IfxEdsadc_InputDataSource_invertedInputC = 5,
IfxEdsadc_InputDataSource_directInputD = 6,
IfxEdsadc_InputDataSource_invertedInputD = 7
}
Demodulator input data source selection
Definition in Ifx_EDSADC.DICFG.B.DSRC. More...
enum IfxEdsadc_InputGain {
IfxEdsadc_InputGain_factor1 = 0,
IfxEdsadc_InputGain_factor2 = 1,
IfxEdsadc_InputGain_factor4 = 2,
IfxEdsadc_InputGain_factor8 = 3,
IfxEdsadc_InputGain_factor16 = 4
}
Modulator gain select of analog input path
Definition in Ifx_DSADC.MODCFGx.B.GAINSEL. More...
enum IfxEdsadc_InputMuxControlMode {
IfxEdsadc_InputMuxControlMode_softwareControl = 0,
IfxEdsadc_InputMuxControlMode_fallingEdge = 1,
IfxEdsadc_InputMuxControlMode_risingEdge = 2,
IfxEdsadc_InputMuxControlMode_always = 3
}
specifies input multiplexer control mode defined in MODULE_EDSADC.MODCFG.B.INMODE More...
enum IfxEdsadc_InputPin {
IfxEdsadc_InputPin_a = 0,
IfxEdsadc_InputPin_b = 1,
IfxEdsadc_InputPin_c = 2,
IfxEdsadc_InputPin_d = 3
}
Modulator input pin selection
Definition in Ifx_DSADC.MODCFGx.B.INMUX. More...
enum IfxEdsadc_IntegrationShiftControl {
IfxEdsadc_IntegrationShiftControl_0 = 0,
IfxEdsadc_IntegrationShiftControl_1,
IfxEdsadc_IntegrationShiftControl_2,
IfxEdsadc_IntegrationShiftControl_3,
IfxEdsadc_IntegrationShiftControl_4,
IfxEdsadc_IntegrationShiftControl_5
}
Controls the data shifter after the integrator that selects the portion of the integrator data for the result register. More...
enum IfxEdsadc_IntegrationWindowSize {
IfxEdsadc_IntegrationWindowSize_internalControl = 0,
IfxEdsadc_IntegrationWindowSize_externalControl = 1
}
Integrator window size
Definition in Ifx_DSADC.IWCTR.B.IWS. More...
enum IfxEdsadc_IntegratorTrigger {
IfxEdsadc_IntegratorTrigger_bypassed = 0,
IfxEdsadc_IntegratorTrigger_fallingEdge = 1,
IfxEdsadc_IntegratorTrigger_risingEdge = 2,
IfxEdsadc_IntegratorTrigger_alwaysActive = 3
}
Integrator trigger mode
NOTE: switch-first to bypassed before using other mode
Definition in Ifx_EDSADC.DICFG.B.ITRMODE. More...
enum IfxEdsadc_MainServiceRequest {
IfxEdsadc_MainServiceRequest_never = 0,
IfxEdsadc_MainServiceRequest_highGateSignal = 1,
IfxEdsadc_MainServiceRequest_lowGateSignal = 2,
IfxEdsadc_MainServiceRequest_everyNewResult = 3
}
Service request generation (main chain)
Definition in Ifx_EDSADC.FCFGM.B.SRGM. More...
enum IfxEdsadc_ModulatorClockDivider {
IfxEdsadc_ModulatorClockDivider_div4 = 0,
IfxEdsadc_ModulatorClockDivider_div6,
IfxEdsadc_ModulatorClockDivider_div8,
IfxEdsadc_ModulatorClockDivider_div10,
IfxEdsadc_ModulatorClockDivider_div12,
IfxEdsadc_ModulatorClockDivider_div14,
IfxEdsadc_ModulatorClockDivider_div16,
IfxEdsadc_ModulatorClockDivider_div18
}
Modulator divider factor for modulator clock
Definition in Ifx_EDSADC.MODCFGx.B.DIVM. More...
enum IfxEdsadc_ModulatorClockGeneration {
IfxEdsadc_ModulatorClockGeneration_syncMode = 0,
IfxEdsadc_ModulatorClockGeneration_unsyncMode = 1
}
Defines the way the modulator clock is generated Definition in Ifx_DSADC.GLOBCFG.B.USC. More...
enum IfxEdsadc_OffsetCompensationFilter {
IfxEdsadc_OffsetCompensationFilter_disabled = 0,
IfxEdsadc_OffsetCompensationFilter_enablewithRateA = 1,
IfxEdsadc_OffsetCompensationFilter_enablewithRateB = 2,
IfxEdsadc_OffsetCompensationFilter_enablewithRateC = 3,
IfxEdsadc_OffsetCompensationFilter_enablewithRateD = 4,
IfxEdsadc_OffsetCompensationFilter_enablewithRateE = 5,
IfxEdsadc_OffsetCompensationFilter_enablewithRateF = 6,
IfxEdsadc_OffsetCompensationFilter_enablewithRateG = 7
}
Enable the offset compensation filter Definition in Ifx_DSADC.FCFGM.B.OCEN. More...
enum IfxEdsadc_OvershootCompensation {
IfxEdsadc_OvershootCompensation_disabled = 0,
IfxEdsadc_OvershootCompensation_enabled = 1
}
Overshoot Compensation Enable. Defined in fx_DSADC.FCFGM.B.OVCEN. More...
enum IfxEdsadc_RectifierSignSource {
IfxEdsadc_RectifierSignSource_onChipGenerator = 0,
IfxEdsadc_RectifierSignSource_nextChannel = 1,
IfxEdsadc_RectifierSignSource_externalA = 2,
IfxEdsadc_RectifierSignSource_externalB = 3
}
Rectifier sign source
Selects the sign signal that is to be delayed.
Definition in Ifx_DSADC.RECT.B.SSRC. More...
enum IfxEdsadc_RestartFilterChain {
IfxEdsadc_RestartFilterChain_on = 0,
IfxEdsadc_RestartFilterChain_off = 1
}
Restart the filter chain when an integration window starts. More...
enum IfxEdsadc_ResultDisplayMode {
IfxEdsadc_ResultDisplayMode_signed = 0,
IfxEdsadc_ResultDisplayMode_unsigned = 1
}
specifies result display mode (signed/unsigned) Definition in Ifx_DSADC.DICFG.B.RDM More...
enum IfxEdsadc_SampleClockSource {
IfxEdsadc_SampleClockSource_internal = 0,
IfxEdsadc_SampleClockSource_inputA = 3,
IfxEdsadc_SampleClockSource_inputB = 4,
IfxEdsadc_SampleClockSource_inputC = 5
}
Demodulator sample clock source select
Definition in Ifx_EDSADC.DICFG.B.CSRC. More...
enum IfxEdsadc_ServiceRequestFifolevel {
IfxEdsadc_ServiceRequestFifolevel_1 = 0,
IfxEdsadc_ServiceRequestFifolevel_2,
IfxEdsadc_ServiceRequestFifolevel_3,
IfxEdsadc_ServiceRequestFifolevel_4
}
Service request fifo level Definition in Ifx_EDSADC.RFC.B.SRLVL. More...
enum IfxEdsadc_SleepMode {
IfxEdsadc_SleepMode_enable = 0,
IfxEdsadc_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_EDSADC.CLC.B.EDIS. More...
enum IfxEdsadc_StepDetectionMode {
IfxEdsadc_StepDetectionMode_lastInput = 0,
IfxEdsadc_StepDetectionMode_secondlastInput = 1
}
Defines when the slew rate filter is activated. More...
enum IfxEdsadc_SupplyVoltageLevel {
IfxEdsadc_SupplyVoltageLevel_automaticControl = 0,
IfxEdsadc_SupplyVoltageLevel_upperVoltage = 1,
IfxEdsadc_SupplyVoltageLevel_lowerVoltage = 2
}
Adjusts the analog circuitry to the supply voltage used in the application system.Defined In defined in MODULE_EDSADC.GLOBCFG.B.SUPLEV. More...
enum IfxEdsadc_SuspendMode {
IfxEdsadc_SuspendMode_none = 0,
IfxEdsadc_SuspendMode_hard = 1,
IfxEdsadc_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxEdsadc_TimeStampCounterClockSelection {
IfxEdsadc_TimeStampCounterClockSelection_div1 = 0,
IfxEdsadc_TimeStampCounterClockSelection_div2 = 1,
IfxEdsadc_TimeStampCounterClockSelection_div4 = 2,
IfxEdsadc_TimeStampCounterClockSelection_div8 = 3
}
Time Stamp Counter Clock Selection. More...
enum IfxEdsadc_TimestampTrigger {
IfxEdsadc_TimestampTrigger_noTrigger = 0,
IfxEdsadc_TimestampTrigger_fallingEdge = 1,
IfxEdsadc_TimestampTrigger_risingEdge = 2,
IfxEdsadc_TimestampTrigger_eachEdge = 3
}
Timestamp trigger mode
Definition in Ifx_EDSADC.DICFG.B.TSTRMODE. More...
enum IfxEdsadc_TriggerInput {
IfxEdsadc_TriggerInput_a = 0,
IfxEdsadc_TriggerInput_b = 1,
IfxEdsadc_TriggerInput_c = 2,
IfxEdsadc_TriggerInput_d = 3,
IfxEdsadc_TriggerInput_e = 4,
IfxEdsadc_TriggerInput_f = 5,
IfxEdsadc_TriggerInput_g = 6,
IfxEdsadc_TriggerInput_h = 7,
IfxEdsadc_TriggerInput_i = 8,
IfxEdsadc_TriggerInput_j = 9,
IfxEdsadc_TriggerInput_k = 10,
IfxEdsadc_TriggerInput_l = 11,
IfxEdsadc_TriggerInput_m = 12,
IfxEdsadc_TriggerInput_n = 13,
IfxEdsadc_TriggerInput_o = 14,
IfxEdsadc_TriggerInput_p = 15
}
Trigger select
Definition in Ifx_EDSADC.DICFG.B.TRSEL. More...
enum IfxEdsadc_dithering {
IfxEdsadc_dithering_disabled = 0,
IfxEdsadc_dithering_enabled = 1
}
Controls the dithering function for each modulator separately Definition in Ifx_DSADC.MODCFG.B.DITHEN. More...

Detailed Description

Enumeration Type Documentation

◆ IfxEdsadc_AnalogClockSyncDelay

enum IfxEdsadc_AnalogClockSyncDelay

Analog Clock Synchronization Delay Definition in Ifx_DSADC.MODCFG.B.ACSD.

Enumerator
IfxEdsadc_AnalogClockSyncDelay_noDelay | no delay
IfxEdsadc_AnalogClockSyncDelay_cycleDelay1 | Delay of 1 Cycle.
IfxEdsadc_AnalogClockSyncDelay_cycleDelay2 | Delay of 2 Cycle.
IfxEdsadc_AnalogClockSyncDelay_cycleDelay3 | Delay of 3 Cycle.
IfxEdsadc_AnalogClockSyncDelay_cycleDelay4 | Delay of 4 Cycle.
IfxEdsadc_AnalogClockSyncDelay_cycleDelay5 | Delay of 5 Cycle.
IfxEdsadc_AnalogClockSyncDelay_cycleDelay6 | Delay of 6 Cycle.
IfxEdsadc_AnalogClockSyncDelay_cycleDelay7 | Delay of 7 Cycle.

Definition at line 77 of file IfxEdsadc.h.

◆ IfxEdsadc_AuxServiceRequest

enum IfxEdsadc_AuxServiceRequest

Service request generation (auxiliary)
Definition in Ifx_EDSADC.FCFGM.B.SRGA.

Enumerator
IfxEdsadc_AuxServiceRequest_never | Never, service requests disabled.
IfxEdsadc_AuxServiceRequest_compEvent | As selected by bitfield ESEL.
IfxEdsadc_AuxServiceRequest_timestampEvent | Timestamp Event.
IfxEdsadc_AuxServiceRequest_altSource | Alternate source: Capturing of a sign delay value to register CGSYNCx (x = 0 - 5)

Definition at line 92 of file IfxEdsadc.h.

◆ IfxEdsadc_CarrierWaveformMode

enum IfxEdsadc_CarrierWaveformMode

Carrier generation mode
Definition in Ifx_EDSADC.CGCFG.B.CGMOD.

Enumerator
IfxEdsadc_CarrierWaveformMode_stopped | Carrier Generator stopped.
IfxEdsadc_CarrierWaveformMode_square | Carrier Generator generates square wave.
IfxEdsadc_CarrierWaveformMode_triangle | Carrier Generator generates triangle wave.
IfxEdsadc_CarrierWaveformMode_sine | Carrier Generator generates sine wave.

Definition at line 103 of file IfxEdsadc.h.

◆ IfxEdsadc_CommonModeHoldVoltage

enum IfxEdsadc_CommonModeHoldVoltage

Common Mode Hold Voltage Enable.

Enumerator
IfxEdsadc_CommonModeHoldVoltage_disable | VCMH is off.
IfxEdsadc_CommonModeHoldVoltage_enable | VCMH is generated.

Definition at line 113 of file IfxEdsadc.h.

◆ IfxEdsadc_DataRead

enum IfxEdsadc_DataRead

Select the data to be returned when register RESM is read Definition in Ifx_DSADC.DICFG.B.DRM.

Enumerator
IfxEdsadc_DataRead_signOnHighbit | Single: Issue one 16-bit value per read access (sign on high bits)
IfxEdsadc_DataRead_timestampOnHighbit | Single: Issue one 16-bit value per read access (timestamp on high bits)
IfxEdsadc_DataRead_double | Double: Issue two 16-bit values per read access.

Definition at line 122 of file IfxEdsadc.h.

◆ IfxEdsadc_DataStream

enum IfxEdsadc_DataStream

Data stream select Definition in Ifx_DSADC.DICFG.B.DSS.

Enumerator
IfxEdsadc_DataStream_onChipModulator | select data stream from on chip modulator
IfxEdsadc_DataStream_doubleDataClockEdge | External modulator, use rising and falling clock edge.
IfxEdsadc_DataStream_directFallingClockEdge | External modulator, use each falling clock edge.
IfxEdsadc_DataStream_directRisingClockEdge | External modulator, use each rising clock edge.
IfxEdsadc_DataStream_secondFallingClockEdge | External modulator, use every 2nd falling clock edge.
IfxEdsadc_DataStream_secondRisingClockEdge | External modulator, use every 2nd rising clock edge.

Definition at line 132 of file IfxEdsadc.h.

◆ IfxEdsadc_dithering

enum IfxEdsadc_dithering

Controls the dithering function for each modulator separately Definition in Ifx_DSADC.MODCFG.B.DITHEN.

Enumerator
IfxEdsadc_dithering_disabled | dithering function disabled
IfxEdsadc_dithering_enabled | dithering function enabled

Definition at line 496 of file IfxEdsadc.h.

◆ IfxEdsadc_DitheringIntensity

enum IfxEdsadc_DitheringIntensity

Trimming Value for Dithering function Definition in Ifx_DSADC.GLOBCFG.B.DITRIM.

Enumerator
IfxEdsadc_DitheringIntensity_minimum | Minimum dithering intensity.
IfxEdsadc_DitheringIntensity_low | Low dithering intensity.
IfxEdsadc_DitheringIntensity_medium | Medium dithering intensity.
IfxEdsadc_DitheringIntensity_high | High.

Definition at line 145 of file IfxEdsadc.h.

◆ IfxEdsadc_EventSelect

enum IfxEdsadc_EventSelect

Define when comparator event is generated Definition in Ifx_DSADC.FCFGM.B.ESEL.

Enumerator
IfxEdsadc_EventSelect_everyNewResult | Always, for each new result value.
IfxEdsadc_EventSelect_insideBoundry | If result is inside the boundary band.
IfxEdsadc_EventSelect_outsideBoundry | If result is outside the boundary band.

Definition at line 156 of file IfxEdsadc.h.

◆ IfxEdsadc_FilterRunTimeInputCycle

enum IfxEdsadc_FilterRunTimeInputCycle

Defines the duration of the additional filter effect, based on values input to the filter.

Enumerator
IfxEdsadc_FilterRunTimeInputCycle_2 | 2 input cycles
IfxEdsadc_FilterRunTimeInputCycle_4 | 4 input cycles
IfxEdsadc_FilterRunTimeInputCycle_8 | 8 input cycles
IfxEdsadc_FilterRunTimeInputCycle_16 | 16 input cycles

Definition at line 166 of file IfxEdsadc.h.

◆ IfxEdsadc_FilterStrength

enum IfxEdsadc_FilterStrength

Specifies Slew Rate Filter Strength.

Enumerator
IfxEdsadc_FilterStrength_minimum | Minimum filter effect, early attenuation, linear operation.
IfxEdsadc_FilterStrength_weak | Weak filter effect.
IfxEdsadc_FilterStrength_medium | Medium filter effect.
IfxEdsadc_FilterStrength_maximum | maximum filter effect

Definition at line 176 of file IfxEdsadc.h.

◆ IfxEdsadc_FractionalRefVoltage

enum IfxEdsadc_FractionalRefVoltage

Fractional Reference Voltage Enable.

Enumerator
IfxEdsadc_FractionalRefVoltage_disable | VREFX is not connected.
IfxEdsadc_FractionalRefVoltage_enable | VREFX is connected, value according to VREFXSEL.

Definition at line 186 of file IfxEdsadc.h.

◆ IfxEdsadc_FractionalRefVoltageSelection

enum IfxEdsadc_FractionalRefVoltageSelection

Fraction reference voltage selection.

Enumerator
IfxEdsadc_FractionalRefVoltageSelection_div2 | VREFX = VAREF / 2.
IfxEdsadc_FractionalRefVoltageSelection_div4 | VREFX = VAREF / 4.
IfxEdsadc_FractionalRefVoltageSelection_div8 | VREFX = VAREF / 8.
IfxEdsadc_FractionalRefVoltageSelection_div16 | VREFX = VAREF / 2.

Definition at line 194 of file IfxEdsadc.h.

◆ IfxEdsadc_HalfSupplyVoltage

enum IfxEdsadc_HalfSupplyVoltage

Half Supply Voltage Enable.

Enumerator
IfxEdsadc_HalfSupplyVoltage_disable | VDDM / 2 is not connected.
IfxEdsadc_HalfSupplyVoltage_enable | VDDM / 2 is connected.

Definition at line 204 of file IfxEdsadc.h.

◆ IfxEdsadc_InputConfig

enum IfxEdsadc_InputConfig

Modulator configuration of positive/negative input line
Definition in Ifx_DSADC.MODCFGx.B.INCFGP and Ifx_DSADC.MODCFGx.B.INCFGN.

Enumerator
IfxEdsadc_InputConfig_inputPin | Modulator input connected to external pin.
IfxEdsadc_InputConfig_supplyVoltage | Modulator input connected to supply voltage V_ddm.
IfxEdsadc_InputConfig_commonModeVoltage | Modulator input connected to common mode voltage V_cm.
IfxEdsadc_InputConfig_referenceGround | Modulator input connected to reference ground V_ref.

Definition at line 213 of file IfxEdsadc.h.

◆ IfxEdsadc_InputDataSource

enum IfxEdsadc_InputDataSource

Demodulator input data source selection
Definition in Ifx_EDSADC.DICFG.B.DSRC.

Enumerator
IfxEdsadc_InputDataSource_directInputA | External, from input A, direct.
IfxEdsadc_InputDataSource_invertedInputA | External, from input A, inverted.
IfxEdsadc_InputDataSource_directInputB | External, from input B, direct.
IfxEdsadc_InputDataSource_invertedInputB | External, from input B, inverted.
IfxEdsadc_InputDataSource_directInputC | External, from input C, direct.
IfxEdsadc_InputDataSource_invertedInputC | External, from input C, inverted.
IfxEdsadc_InputDataSource_directInputD | External, from input D, direct.
IfxEdsadc_InputDataSource_invertedInputD | External, from input D, inverted.

Definition at line 224 of file IfxEdsadc.h.

◆ IfxEdsadc_InputGain

enum IfxEdsadc_InputGain

Modulator gain select of analog input path
Definition in Ifx_DSADC.MODCFGx.B.GAINSEL.

Enumerator
IfxEdsadc_InputGain_factor1 | Input gain factor: 1.
IfxEdsadc_InputGain_factor2 | Input gain factor: 2.
IfxEdsadc_InputGain_factor4 | Input gain factor: 4.
IfxEdsadc_InputGain_factor8 | Input gain factor: 8.
IfxEdsadc_InputGain_factor16 | Input gain factor: 16.

Definition at line 239 of file IfxEdsadc.h.

◆ IfxEdsadc_InputMuxControlMode

enum IfxEdsadc_InputMuxControlMode

specifies input multiplexer control mode defined in MODULE_EDSADC.MODCFG.B.INMODE

Enumerator
IfxEdsadc_InputMuxControlMode_softwareControl | Trigger Event by software (INMUX follows INSEL)
IfxEdsadc_InputMuxControlMode_fallingEdge | Trigger Event on Falling edge.
IfxEdsadc_InputMuxControlMode_risingEdge | Trigger Event on Rising edge.
IfxEdsadc_InputMuxControlMode_always | Trigger event on any edge.

Definition at line 250 of file IfxEdsadc.h.

◆ IfxEdsadc_InputPin

enum IfxEdsadc_InputPin

Modulator input pin selection
Definition in Ifx_DSADC.MODCFGx.B.INMUX.

Enumerator
IfxEdsadc_InputPin_a | Pin A connected to modulator input.
IfxEdsadc_InputPin_b | Pin B connected to modulator input.
IfxEdsadc_InputPin_c | Pin C connected to modulator input.
IfxEdsadc_InputPin_d | Pin D connected to modulator input.

Definition at line 261 of file IfxEdsadc.h.

◆ IfxEdsadc_IntegrationShiftControl

enum IfxEdsadc_IntegrationShiftControl

Controls the data shifter after the integrator that selects the portion of the integrator data for the result register.

Enumerator
IfxEdsadc_IntegrationShiftControl_0 | Integration Shift value.
IfxEdsadc_IntegrationShiftControl_1 | Integration Shift value.
IfxEdsadc_IntegrationShiftControl_2 | Integration Shift value.
IfxEdsadc_IntegrationShiftControl_3 | Integration Shift value.
IfxEdsadc_IntegrationShiftControl_4 | Integration Shift value.
IfxEdsadc_IntegrationShiftControl_5 | Integration Shift value.

Definition at line 272 of file IfxEdsadc.h.

◆ IfxEdsadc_IntegrationWindowSize

enum IfxEdsadc_IntegrationWindowSize

Integrator window size
Definition in Ifx_DSADC.IWCTR.B.IWS.

Enumerator
IfxEdsadc_IntegrationWindowSize_internalControl | Internal control: stop integrator after REPVAL+1 integration cycles.
IfxEdsadc_IntegrationWindowSize_externalControl | External control: stop integrator when bit INTEN becomes 0.

Definition at line 285 of file IfxEdsadc.h.

◆ IfxEdsadc_IntegratorTrigger

enum IfxEdsadc_IntegratorTrigger

Integrator trigger mode
NOTE: switch-first to bypassed before using other mode
Definition in Ifx_EDSADC.DICFG.B.ITRMODE.

Enumerator
IfxEdsadc_IntegratorTrigger_bypassed | No integration trigger, integrator bypassed.
IfxEdsadc_IntegratorTrigger_fallingEdge | Trigger event upon a falling edge.
IfxEdsadc_IntegratorTrigger_risingEdge | Trigger event upon a rising edge.
IfxEdsadc_IntegratorTrigger_alwaysActive | No trigger, integrator active all the time.

Definition at line 295 of file IfxEdsadc.h.

◆ IfxEdsadc_MainServiceRequest

enum IfxEdsadc_MainServiceRequest

Service request generation (main chain)
Definition in Ifx_EDSADC.FCFGM.B.SRGM.

Enumerator
IfxEdsadc_MainServiceRequest_never | Never, service requests disabled.
IfxEdsadc_MainServiceRequest_highGateSignal | While gate (selected trigger signal) is high.
IfxEdsadc_MainServiceRequest_lowGateSignal | While gate (selected trigger signal) is low.
IfxEdsadc_MainServiceRequest_everyNewResult | Always, for each new result value.

Definition at line 306 of file IfxEdsadc.h.

◆ IfxEdsadc_ModulatorClockDivider

enum IfxEdsadc_ModulatorClockDivider

Modulator divider factor for modulator clock
Definition in Ifx_EDSADC.MODCFGx.B.DIVM.

Enumerator
IfxEdsadc_ModulatorClockDivider_div4 | f_mod = f_clk / 4
IfxEdsadc_ModulatorClockDivider_div6 | f_mod = f_clk / 6
IfxEdsadc_ModulatorClockDivider_div8 | f_mod = f_clk / 8
IfxEdsadc_ModulatorClockDivider_div10 | f_mod = f_clk / 10
IfxEdsadc_ModulatorClockDivider_div12 | f_mod = f_clk / 12
IfxEdsadc_ModulatorClockDivider_div14 | f_mod = f_clk / 14
IfxEdsadc_ModulatorClockDivider_div16 | f_mod = f_clk / 16
IfxEdsadc_ModulatorClockDivider_div18 | f_mod = f_clk / 18

Definition at line 317 of file IfxEdsadc.h.

◆ IfxEdsadc_ModulatorClockGeneration

enum IfxEdsadc_ModulatorClockGeneration

Defines the way the modulator clock is generated Definition in Ifx_DSADC.GLOBCFG.B.USC.

Enumerator
IfxEdsadc_ModulatorClockGeneration_syncMode
IfxEdsadc_ModulatorClockGeneration_unsyncMode

Definition at line 332 of file IfxEdsadc.h.

◆ IfxEdsadc_OffsetCompensationFilter

enum IfxEdsadc_OffsetCompensationFilter

Enable the offset compensation filter Definition in Ifx_DSADC.FCFGM.B.OCEN.

Enumerator
IfxEdsadc_OffsetCompensationFilter_disabled | Offset Compensation filter disabled.
IfxEdsadc_OffsetCompensationFilter_enablewithRateA | Enable offset compensation filter, adjust OFFCOMP with rate A.
IfxEdsadc_OffsetCompensationFilter_enablewithRateB | Enable offset compensation filter, adjust OFFCOMP with rate B.
IfxEdsadc_OffsetCompensationFilter_enablewithRateC | Enable offset compensation filter, adjust OFFCOMP with rate C.
IfxEdsadc_OffsetCompensationFilter_enablewithRateD | Enable offset compensation filter, adjust OFFCOMP with rate D.
IfxEdsadc_OffsetCompensationFilter_enablewithRateE | Enable offset compensation filter, adjust OFFCOMP with rate E.
IfxEdsadc_OffsetCompensationFilter_enablewithRateF | Enable offset compensation filter, adjust OFFCOMP with rate F.
IfxEdsadc_OffsetCompensationFilter_enablewithRateG | Enable offset compensation filter, adjust OFFCOMP with rate G.

Definition at line 341 of file IfxEdsadc.h.

◆ IfxEdsadc_OvershootCompensation

enum IfxEdsadc_OvershootCompensation

Overshoot Compensation Enable. Defined in fx_DSADC.FCFGM.B.OVCEN.

Enumerator
IfxEdsadc_OvershootCompensation_disabled | Disabled, feed FIR filter directly.
IfxEdsadc_OvershootCompensation_enabled | Attenuate response to fast edges.

Definition at line 356 of file IfxEdsadc.h.

◆ IfxEdsadc_RectifierSignSource

enum IfxEdsadc_RectifierSignSource

Rectifier sign source
Selects the sign signal that is to be delayed.
Definition in Ifx_DSADC.RECT.B.SSRC.

Enumerator
IfxEdsadc_RectifierSignSource_onChipGenerator | On-chip carrier generator.
IfxEdsadc_RectifierSignSource_nextChannel | Sign of result of next channel.
IfxEdsadc_RectifierSignSource_externalA | External sign signal A.
IfxEdsadc_RectifierSignSource_externalB | External sign signal B.

Definition at line 366 of file IfxEdsadc.h.

◆ IfxEdsadc_RestartFilterChain

enum IfxEdsadc_RestartFilterChain

Restart the filter chain when an integration window starts.

Enumerator
IfxEdsadc_RestartFilterChain_on
IfxEdsadc_RestartFilterChain_off

Definition at line 376 of file IfxEdsadc.h.

◆ IfxEdsadc_ResultDisplayMode

enum IfxEdsadc_ResultDisplayMode

specifies result display mode (signed/unsigned) Definition in Ifx_DSADC.DICFG.B.RDM

Enumerator
IfxEdsadc_ResultDisplayMode_signed | Signed: result values range from -215 to +215.
IfxEdsadc_ResultDisplayMode_unsigned | Unsigned: result values range from 0 to +216 (shifted by 215)

Definition at line 385 of file IfxEdsadc.h.

◆ IfxEdsadc_SampleClockSource

enum IfxEdsadc_SampleClockSource

Demodulator sample clock source select
Definition in Ifx_EDSADC.DICFG.B.CSRC.

Enumerator
IfxEdsadc_SampleClockSource_internal | Internal clock.
IfxEdsadc_SampleClockSource_inputA | External clock, from Input A.
IfxEdsadc_SampleClockSource_inputB | External clock, from Input B.
IfxEdsadc_SampleClockSource_inputC | External clock, from Input C.

Definition at line 394 of file IfxEdsadc.h.

◆ IfxEdsadc_ServiceRequestFifolevel

enum IfxEdsadc_ServiceRequestFifolevel

Service request fifo level Definition in Ifx_EDSADC.RFC.B.SRLVL.

Enumerator
IfxEdsadc_ServiceRequestFifolevel_1 | Generate a service request when Fifo contain level 1 Value.
IfxEdsadc_ServiceRequestFifolevel_2 | Generate a service request when Fifo contain level 2 Value.
IfxEdsadc_ServiceRequestFifolevel_3 | Generate a service request when Fifo contain level 3 Value.
IfxEdsadc_ServiceRequestFifolevel_4 | Generate a service request when Fifo contain level 4 Value.

Definition at line 405 of file IfxEdsadc.h.

◆ IfxEdsadc_SleepMode

enum IfxEdsadc_SleepMode

Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_EDSADC.CLC.B.EDIS.

Enumerator
IfxEdsadc_SleepMode_enable | enables sleep mode
IfxEdsadc_SleepMode_disable | disables sleep mode

Definition at line 416 of file IfxEdsadc.h.

◆ IfxEdsadc_StepDetectionMode

enum IfxEdsadc_StepDetectionMode

Defines when the slew rate filter is activated.

Enumerator
IfxEdsadc_StepDetectionMode_lastInput | Compare threshold to difference of current and last input.
IfxEdsadc_StepDetectionMode_secondlastInput | Compare threshold to difference of current and second-last input.

Definition at line 424 of file IfxEdsadc.h.

◆ IfxEdsadc_SupplyVoltageLevel

enum IfxEdsadc_SupplyVoltageLevel

Adjusts the analog circuitry to the supply voltage used in the application system.Defined In defined in MODULE_EDSADC.GLOBCFG.B.SUPLEV.

Enumerator
IfxEdsadc_SupplyVoltageLevel_automaticControl | voltage range is controlled by the power supply
IfxEdsadc_SupplyVoltageLevel_upperVoltage | Upper voltage range: assume a 5 V power supply is connected.
IfxEdsadc_SupplyVoltageLevel_lowerVoltage | Lower voltage range: assume a 3.3 V power supply is connected.

Definition at line 433 of file IfxEdsadc.h.

◆ IfxEdsadc_SuspendMode

enum IfxEdsadc_SuspendMode

OCDS Suspend Control (OCDS.SUS)

Enumerator
IfxEdsadc_SuspendMode_none | No suspend.
IfxEdsadc_SuspendMode_hard | Hard Suspend.
IfxEdsadc_SuspendMode_soft | Soft Suspend.

Definition at line 442 of file IfxEdsadc.h.

◆ IfxEdsadc_TimeStampCounterClockSelection

enum IfxEdsadc_TimeStampCounterClockSelection

Time Stamp Counter Clock Selection.

Enumerator
IfxEdsadc_TimeStampCounterClockSelection_div1 | fTSTMP = fMOD
IfxEdsadc_TimeStampCounterClockSelection_div2 | fTSTMP = fMOD/2
IfxEdsadc_TimeStampCounterClockSelection_div4 | fTSTMP = fMOD/4
IfxEdsadc_TimeStampCounterClockSelection_div8 | fTSTMP = fMOD/8

Definition at line 451 of file IfxEdsadc.h.

◆ IfxEdsadc_TimestampTrigger

enum IfxEdsadc_TimestampTrigger

Timestamp trigger mode
Definition in Ifx_EDSADC.DICFG.B.TSTRMODE.

Enumerator
IfxEdsadc_TimestampTrigger_noTrigger | No timestamp trigger.
IfxEdsadc_TimestampTrigger_fallingEdge | Trigger event upon a falling edge.
IfxEdsadc_TimestampTrigger_risingEdge | Trigger event upon a rising edge.
IfxEdsadc_TimestampTrigger_eachEdge | Trigger event upon each edge.

Definition at line 462 of file IfxEdsadc.h.

◆ IfxEdsadc_TriggerInput

enum IfxEdsadc_TriggerInput

Trigger select
Definition in Ifx_EDSADC.DICFG.B.TRSEL.

Enumerator
IfxEdsadc_TriggerInput_a | GTM EDSADC Trigger 0.
IfxEdsadc_TriggerInput_b | GTM EDSADC Trigger 1.
IfxEdsadc_TriggerInput_c | GTM ADC Trigger 0.
IfxEdsadc_TriggerInput_d | GTM ADC Trigger 1.
IfxEdsadc_TriggerInput_e | Trigger/gate via port input P33.0.
IfxEdsadc_TriggerInput_f | Trigger/gate via port input P33.4.
IfxEdsadc_TriggerInput_g | ERU pattern detection output 0.
IfxEdsadc_TriggerInput_h | Trigger/gate, channel 0,input H.
IfxEdsadc_TriggerInput_i | Trigger/gate, channel 0,input I.
IfxEdsadc_TriggerInput_j | Trigger/gate, channel 0,input J.
IfxEdsadc_TriggerInput_k | GTM ADC Trigger 2.
IfxEdsadc_TriggerInput_l | GTM ADC Trigger 3.
IfxEdsadc_TriggerInput_m | GTM DSADC Trigger 2.
IfxEdsadc_TriggerInput_n | GTM DSADC Trigger 3.
IfxEdsadc_TriggerInput_o | Trigger/gate, channel 0,input O.
IfxEdsadc_TriggerInput_p | Trigger/gate, channel 0,input P.

Definition at line 473 of file IfxEdsadc.h.


iLLD_TC38A: Operative Functions

Functions
Operative Functions
iLLD » EDSADC » Standard Driver
Collaboration diagram for Operative Functions:

Functions

IFX_INLINE boolean | IfxEdsadc_isModuleSuspended (Ifx_EDSADC *edsadc)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxEdsadc_setSleepMode (Ifx_EDSADC *edsadc, IfxEdsadc_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxEdsadc_setSuspendMode (Ifx_EDSADC *edsadc, IfxEdsadc_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_INLINE void | IfxEdsadc_startScan (Ifx_EDSADC *edsadc, uint32 modulatorMask, uint32 channelMask)
Enables the conversion of multiple channels. More...
IFX_INLINE void | IfxEdsadc_stopScan (Ifx_EDSADC *edsadc, uint32 modulatorMask)
Disables the conversion of multiple channels. More...
IFX_EXTERN void | IfxEdsadc_disableModule (Ifx_EDSADC *edsadc)
Disables the module. More...
IFX_EXTERN void | IfxEdsadc_enableModule (Ifx_EDSADC *edsadc)
Enables the module. More...
IFX_EXTERN void | IfxEdsadc_resetModule (Ifx_EDSADC *edsadc)
resets EDSADC kernel More...

Detailed Description

Function Documentation

◆ IfxEdsadc_disableModule()

IFX_EXTERN void IfxEdsadc_disableModule ( Ifx_EDSADC * edsadc )

Disables the module.

Parameters
edsadc Pointer to Module space
Returns
None

Definition at line 52 of file IfxEdsadc.c.

◆ IfxEdsadc_enableModule()

IFX_EXTERN void IfxEdsadc_enableModule ( Ifx_EDSADC * edsadc )

Enables the module.

Parameters
edsadc Pointer to Module space
Returns
None

Definition at line 62 of file IfxEdsadc.c.

◆ IfxEdsadc_isModuleSuspended()

IFX_INLINE boolean IfxEdsadc_isModuleSuspended ( Ifx_EDSADC * edsadc )

Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended.

Parameters
edsadc Pointer to EDSADC module registers
Returns
Suspend status (TRUE / FALSE)

Definition at line 996 of file IfxEdsadc.h.

◆ IfxEdsadc_resetModule()

IFX_EXTERN void IfxEdsadc_resetModule ( Ifx_EDSADC * edsadc )

resets EDSADC kernel

Parameters
edsadc pointer to EDSADC registers
Returns
None

Definition at line 192 of file IfxEdsadc.c.

◆ IfxEdsadc_setSleepMode()

IFX_INLINE void IfxEdsadc_setSleepMode | ( | Ifx_EDSADC * | edsadc,
 |  | IfxEdsadc_SleepMode | mode
 | ) |  |

Sets the sensitivity of the module to sleep signal.

Parameters
edsadc | pointer to EDSADC registers
mode | mode selection (enable/disable)
Returns
None

Definition at line 1019 of file IfxEdsadc.h.

◆ IfxEdsadc_setSuspendMode()

IFX_INLINE void IfxEdsadc_setSuspendMode | ( | Ifx_EDSADC * | edsadc,
 |  | IfxEdsadc_SuspendMode | mode
 | ) |  |

Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.

Parameters
edsadc | Pointer to EDSADC module registers
mode | Module suspend mode
Returns
None

Definition at line 1028 of file IfxEdsadc.h.

◆ IfxEdsadc_startScan()

IFX_INLINE void IfxEdsadc_startScan | ( | Ifx_EDSADC * | edsadc,
 |  | uint32 | modulatorMask,
 |  | uint32 | channelMask
 | ) |  |

Enables the conversion of multiple channels.

Parameters
edsadc | Pointer to the EDSADC register space
modulatorMask | the modulator which should be running (bitwise selection)
channelMask | the channels which should be scanned (bitwise selection)
Returns
None

A coding example can be found in How to use the EDSADC Interface driver?

Definition at line 1041 of file IfxEdsadc.h.

Referenced by IfxEdsadc_Edsadc_startScan().

◆ IfxEdsadc_stopScan()

IFX_INLINE void IfxEdsadc_stopScan | ( | Ifx_EDSADC * | edsadc,
 |  | uint32 | modulatorMask
 | ) |  |

Disables the conversion of multiple channels.

Parameters
edsadc | Pointer to the EDSADC register space
modulatorMask | the modulator which should be disabled (bitwise selection)
Returns
None

A coding example can be found in How to use the EDSADC Interface driver?

Definition at line 1047 of file IfxEdsadc.h.

Referenced by IfxEdsadc_Edsadc_stopScan().


iLLD_TC38A: Support Functions

Functions
Support Functions
iLLD » EDSADC » Standard Driver
Collaboration diagram for Support Functions:

Functions

IFX_INLINE uint16 | IfxEdsadc_getMainCombDecimation (Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
Get the main comb decimation factor. More...
IFX_INLINE sint16 | IfxEdsadc_getMainResult (Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
Get result from the main chain. More...
IFX_INLINE sint32 | IfxEdsadc_getSubsequentResult (Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
Get the subsequent result. More...
IFX_INLINE boolean | IfxEdsadc_isModuleEnabled (Ifx_EDSADC *edsadc)
Return TRUE if EDSADC module is enabled. More...
IFX_INLINE void | IfxEdsadc_setCarrierMode (Ifx_EDSADC *edsadc, IfxEdsadc_CarrierWaveformMode waveformMode)
Set the carrier waveform mode. More...
IFX_EXTERN float32 | IfxEdsadc_getIntegratorOutFreq (Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
Get the sample frequency of the integrator output in Hz. More...
IFX_EXTERN float32 | IfxEdsadc_getMainCombOutFreq (Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
Get the sample frequency of the main COMB filter output in Hz. More...
IFX_EXTERN float32 | IfxEdsadc_getMainGroupDelay (Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
Estimate the group delay of main-chain filters in seconds. More...
IFX_EXTERN float32 | IfxEdsadc_getModulatorClockFreq (Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
Get the modulator clock frequency in Hz. More...
IFX_EXTERN float32 | IfxEdsadc_getModulatorInputClockFreq (Ifx_EDSADC *edsadc)
Get the input frequency of EDSADC in Hz. More...

Detailed Description

Function Documentation

◆ IfxEdsadc_getIntegratorOutFreq()

IFX_EXTERN float32 IfxEdsadc_getIntegratorOutFreq | ( | Ifx_EDSADC * | edsadc,
 |  | IfxEdsadc_ChannelId | channel
 | ) |  |

Get the sample frequency of the integrator output in Hz.

Parameters
edsadc | Pointer to the EDSADC register space
channel | Channel Id
Returns
frequency in Hz

Definition at line 83 of file IfxEdsadc.c.

◆ IfxEdsadc_getMainCombDecimation()

IFX_INLINE uint16 IfxEdsadc_getMainCombDecimation | ( | Ifx_EDSADC * | edsadc,
 |  | IfxEdsadc_ChannelId | channel
 | ) |  |

Get the main comb decimation factor.

Parameters
edsadc | Pointer to the EDSADC register space
channel | Channel Id
Returns
the main comb decimation factor

Definition at line 892 of file IfxEdsadc.h.

◆ IfxEdsadc_getMainCombOutFreq()

IFX_EXTERN float32 IfxEdsadc_getMainCombOutFreq | ( | Ifx_EDSADC * | edsadc,
 |  | IfxEdsadc_ChannelId | channel
 | ) |  |

Get the sample frequency of the main COMB filter output in Hz.

Parameters
edsadc | Pointer to the EDSADC register space
channel | Channel Id
Returns
frequency in Hz

Definition at line 104 of file IfxEdsadc.c.

Referenced by IfxEdsadc_getIntegratorOutFreq().

◆ IfxEdsadc_getMainGroupDelay()

IFX_EXTERN float32 IfxEdsadc_getMainGroupDelay | ( | Ifx_EDSADC * | edsadc,
 |  | IfxEdsadc_ChannelId | channel
 | ) |  |

Estimate the group delay of main-chain filters in seconds.

Parameters
edsadc | Pointer to the EDSADC register space
channel | Channel Id
Returns
delay in seconds

Definition at line 112 of file IfxEdsadc.c.

◆ IfxEdsadc_getMainResult()

IFX_INLINE sint16 IfxEdsadc_getMainResult | ( | Ifx_EDSADC * | edsadc,
 |  | IfxEdsadc_ChannelId | channel
 | ) |  |

Get result from the main chain.

Parameters
edsadc | Pointer to the EDSADC register space
channel | Channel Id
Returns
result from the main chain

A coding example can be found in How to use the EDSADC Interface driver?

Definition at line 898 of file IfxEdsadc.h.

Referenced by IfxEdsadc_Edsadc_getMainResult().

◆ IfxEdsadc_getModulatorClockFreq()

IFX_EXTERN float32 IfxEdsadc_getModulatorClockFreq | ( | Ifx_EDSADC * | edsadc,
 |  | IfxEdsadc_ChannelId | channel
 | ) |  |

Get the modulator clock frequency in Hz.

Parameters
edsadc | Pointer to the EDSADC register space
channel | Channel Id
Returns
frequency in Hz

Definition at line 168 of file IfxEdsadc.c.

Referenced by IfxEdsadc_getMainCombOutFreq(), and IfxEdsadc_getMainGroupDelay().

◆ IfxEdsadc_getModulatorInputClockFreq()

IFX_EXTERN float32 IfxEdsadc_getModulatorInputClockFreq ( Ifx_EDSADC * edsadc )

Get the input frequency of EDSADC in Hz.

Parameters
edsadc Pointer to the EDSADC register space
Returns
frequency in Hz

Definition at line 176 of file IfxEdsadc.c.

Referenced by IfxEdsadc_Edsadc_initCarrierGen(), IfxEdsadc_Edsadc_initModulator(), and IfxEdsadc_getModulatorClockFreq().

◆ IfxEdsadc_getSubsequentResult()

IFX_INLINE sint32 IfxEdsadc_getSubsequentResult | ( | Ifx_EDSADC * | edsadc,
 |  | IfxEdsadc_ChannelId | channel
 | ) |  |

Get the subsequent result.

Definition at line 904 of file IfxEdsadc.h.

Referenced by IfxEdsadc_Edsadc_getSubsequentResult().

◆ IfxEdsadc_isModuleEnabled()

IFX_INLINE boolean IfxEdsadc_isModuleEnabled ( Ifx_EDSADC * edsadc )

Return TRUE if EDSADC module is enabled.

Parameters
edsadc Pointer to the EDSADC register space
Returns
TRUE if EDSADC module is enabled

Definition at line 990 of file IfxEdsadc.h.

◆ IfxEdsadc_setCarrierMode()

IFX_INLINE void IfxEdsadc_setCarrierMode | ( | Ifx_EDSADC * | edsadc,
 |  | IfxEdsadc_CarrierWaveformMode | waveformMode
 | ) |  |

Set the carrier waveform mode.

Parameters
edsadc | Pointer to the EDSADC register space
waveformMode | the waveform mode
Returns
None

Definition at line 1013 of file IfxEdsadc.h.


iLLD_TC38A: Interrupt Functions

Functions
Interrupt Functions
iLLD » EDSADC » Standard Driver
Collaboration diagram for Interrupt Functions:

Functions

IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxEdsadc_getAuxSrc (Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
Address/pointer to the interrupt source register. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxEdsadc_getMainSrc (Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
Get the interrupt source register for a Main event. More...

Detailed Description

Function Documentation

◆ IfxEdsadc_getAuxSrc()

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxEdsadc_getAuxSrc | ( | Ifx_EDSADC * | edsadc,
 |  | IfxEdsadc_ChannelId | channel
 | ) |  |

Address/pointer to the interrupt source register.

Parameters
edsadc | Pointer to the EDSADC register space
channel | Channel Id
Returns
Address/pointer to the interrupt source register

Definition at line 75 of file IfxEdsadc.c.

Referenced by IfxEdsadc_Edsadc_getAuxSrc().

◆ IfxEdsadc_getMainSrc()

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxEdsadc_getMainSrc | ( | Ifx_EDSADC * | edsadc,
 |  | IfxEdsadc_ChannelId | channel
 | ) |  |

Get the interrupt source register for a Main event.

Parameters
edsadc | Pointer to the EDSADC register space
channel | Channel Id
Returns
Address/pointer to the interrupt source register

Definition at line 161 of file IfxEdsadc.c.

Referenced by IfxEdsadc_Edsadc_getMainSrc().


iLLD_TC38A: IO Pin Configuration Functions

Functions
IO Pin Configuration Functions
iLLD » EDSADC » Standard Driver
Collaboration diagram for IO Pin Configuration Functions:

Functions

IFX_INLINE void | IfxEdsadc_initCgPwmPin (const IfxEdsadc_Cgpwm_Out *cgPwm, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a CGPWM output. More...
IFX_INLINE void | IfxEdsadc_initCinPin (const IfxEdsadc_Cin_In *cIn, IfxPort_InputMode cInMode, IfxPort_PadDriver padDriver)
Initializes a CIN input. More...
IFX_INLINE void | IfxEdsadc_initCoutPin (const IfxEdsadc_Cout_Out *cout, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a COUT output. More...
IFX_INLINE void | IfxEdsadc_initDinPin (const IfxEdsadc_Din_In *dIn, IfxPort_InputMode dInMode, IfxPort_PadDriver padDriver)
Initializes a DIN input. More...
IFX_INLINE void | IfxEdsadc_initDsnPin (const IfxEdsadc_Dsn_In *dsn, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a DS input. More...
IFX_INLINE void | IfxEdsadc_initDspPin (const IfxEdsadc_Dsp_In *dsp, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a DS input. More...
IFX_INLINE void | IfxEdsadc_initItrPin (const IfxEdsadc_Itr_In *itr, IfxPort_InputMode itrMode, IfxPort_PadDriver padDriver)
Initializes a ITR input. More...
IFX_INLINE void | IfxEdsadc_initSgPin (const IfxEdsadc_Sg_In *sg, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a SG input. More...

Detailed Description

Function Documentation

◆ IfxEdsadc_initCgPwmPin()

IFX_INLINE void IfxEdsadc_initCgPwmPin | ( | const IfxEdsadc_Cgpwm_Out * | cgPwm,
 |  | IfxPort_OutputMode | pinMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a CGPWM output.

Parameters
cgPwm | the CGPWM Pin which should be configured
pinMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 910 of file IfxEdsadc.h.

Referenced by IfxEdsadc_Edsadc_initCarrierGen().

◆ IfxEdsadc_initCinPin()

IFX_INLINE void IfxEdsadc_initCinPin | ( | const IfxEdsadc_Cin_In * | cIn,
 |  | IfxPort_InputMode | cInMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a CIN input.

Parameters
cIn | the CIN Pin which should be configured
cInMode | the pin input mode which should be configured
padDriver | Pad Driver Configuration
Returns
None

Definition at line 920 of file IfxEdsadc.h.

Referenced by IfxEdsadc_Edsadc_initChannel().

◆ IfxEdsadc_initCoutPin()

IFX_INLINE void IfxEdsadc_initCoutPin | ( | const IfxEdsadc_Cout_Out * | cout,
 |  | IfxPort_OutputMode | pinMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a COUT output.

Parameters
cout | the COUT Pin which should be configured
pinMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 930 of file IfxEdsadc.h.

◆ IfxEdsadc_initDinPin()

IFX_INLINE void IfxEdsadc_initDinPin | ( | const IfxEdsadc_Din_In * | dIn,
 |  | IfxPort_InputMode | dInMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a DIN input.

Parameters
dIn | the DIN Pin which should be configured
dInMode | the pin input mode which should be configured
padDriver | Pad Driver Configuration
Returns
None

Definition at line 940 of file IfxEdsadc.h.

Referenced by IfxEdsadc_Edsadc_initChannel().

◆ IfxEdsadc_initDsnPin()

IFX_INLINE void IfxEdsadc_initDsnPin | ( | const IfxEdsadc_Dsn_In * | dsn,
 |  | IfxPort_InputMode | pinMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a DS input.

Parameters
dsn | the DSN Pin which should be configured
pinMode | the pin input mode which should be configured
padDriver | Pad Driver Configuration
Returns
None

Definition at line 950 of file IfxEdsadc.h.

Referenced by IfxEdsadc_Edsadc_initChannel().

◆ IfxEdsadc_initDspPin()

IFX_INLINE void IfxEdsadc_initDspPin | ( | const IfxEdsadc_Dsp_In * | dsp,
 |  | IfxPort_InputMode | pinMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a DS input.

Parameters
dsp | the DSP Pin which should be configured
pinMode | the pin input mode which should be configured
padDriver | Pad Driver Configuration
Returns
None

Definition at line 960 of file IfxEdsadc.h.

Referenced by IfxEdsadc_Edsadc_initChannel().

◆ IfxEdsadc_initItrPin()

IFX_INLINE void IfxEdsadc_initItrPin | ( | const IfxEdsadc_Itr_In * | itr,
 |  | IfxPort_InputMode | itrMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a ITR input.

Parameters
itr | the ITR Pin which should be configured
itrMode | the pin input mode which should be configured
padDriver | Pad Driver Configuration
Returns
None

Definition at line 970 of file IfxEdsadc.h.

Referenced by IfxEdsadc_Edsadc_initChannel().

◆ IfxEdsadc_initSgPin()

IFX_INLINE void IfxEdsadc_initSgPin | ( | const IfxEdsadc_Sg_In * | sg,
 |  | IfxPort_InputMode | pinMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a SG input.

Parameters
sg | the SG Pin which should be configured
pinMode | the pin input mode which should be configured
padDriver | Pad Driver Configuration
Returns
None

Definition at line 980 of file IfxEdsadc.h.


iLLD_TC38A: EDSADC Pin Mapping

Data Structures | Macros | Variables
EDSADC Pin Mapping
iLLD » EDSADC
Collaboration diagram for EDSADC Pin Mapping:

Data Structures

struct | IfxEdsadc_Dsn_In
DS negative pin mapping structure. More...
struct | IfxEdsadc_Dsp_In
DS positive pin mapping structure. More...
struct | IfxEdsadc_Cin_In
CIN pin mapping structure. More...
struct | IfxEdsadc_Din_In
DIN pin mapping structure. More...
struct | IfxEdsadc_Dscin_In
DIN pin mapping structure. More...
struct | IfxEdsadc_Dsdin_In
DIN pin mapping structure. More...
struct | IfxEdsadc_Itr_In
ITR pin mapping structure. More...
struct | IfxEdsadc_Cgpwm_Out
CGPWM pin mapping structure. More...
struct | IfxEdsadc_Sg_In
SG pin mapping structure. More...
struct | IfxEdsadc_Dscout_Out
COUT pin mapping structure. More...
struct | IfxEdsadc_Cout_Out
COUT pin mapping structure. More...

Macros

#define | IFXEDSADC_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXEDSADC_PINMAP_NUM_CHANNELS 10
#define | IFXEDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS 6
#define | IFXEDSADC_PINMAP_DSCIN_IN_NUM_ITEMS 2
#define | IFXEDSADC_PINMAP_DSCOUT_OUT_NUM_ITEMS 2
#define | IFXEDSADC_PINMAP_DSDIN_IN_NUM_ITEMS 2
#define | IFXEDSADC_PINMAP_DSN_IN_NUM_ITEMS 4
#define | IFXEDSADC_PINMAP_DSP_IN_NUM_ITEMS 4
#define | IFXEDSADC_PINMAP_ITR_IN_NUM_ITEMS 6
#define | IFXEDSADC_PINMAP_SG_IN_NUM_ITEMS 2

Variables

IFX_EXTERN IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMN_P00_5_OUT
Negative carrier generator output. More...
IFX_EXTERN IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMN_P02_0_OUT
Negative carrier generator output. More...
IFX_EXTERN IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMN_P33_11_OUT
Negative carrier generator output. More...
IFX_EXTERN IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMP_P00_6_OUT
Positive carrier generator output. More...
IFX_EXTERN IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMP_P02_1_OUT
Positive carrier generator output. More...
IFX_EXTERN IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMP_P33_12_OUT
Positive carrier generator output. More...
IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN0A_P00_11_IN
Modulator clock input, channel 0. More...
IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN0B_P33_5_IN
Modulator clock input, channel 0. More...
IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN1A_P00_9_IN
Modulator clock input, channel 1. More...
IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN1B_P33_3_IN
Modulator clock input, channel 1. More...
IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN2A_P00_5_IN
Modulator clock input, channel 2. More...
IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN2B_P33_1_IN
Modulator clock input, channel 2. More...
IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN3A_P00_3_IN
Modulator clock input, channel 3. More...
IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN3B_P02_7_IN
Modulator clock input, channel 3. More...
IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN4A_P00_7_IN
Modulator clock input, channel 4. More...
IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN4B_P02_5_IN
Modulator clock input, channel 4. More...
IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN5A_P00_1_IN
Modulator clock input, channel 5. More...
IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN5B_P02_3_IN
Modulator clock input, channel 5. More...
IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN6A_P00_14_IN
Modulator clock input, channel 6. More...
IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN7A_P01_2_IN
Modulator clock input, channel 7. More...
IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN7B_P00_1_IN
Modulator clock input, channel 7. More...
IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN8A_P01_5_IN
Modulator clock input, channel 8. More...
IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN9A_P01_9_IN
Modulator clock input, channel 9. More...
IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT0_P00_11_OUT
Modulator clock output. More...
IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT0_P33_5_OUT
Modulator clock output. More...
IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT1_P00_9_OUT
Modulator clock output. More...
IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT1_P33_3_OUT
Modulator clock output. More...
IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT2_P00_5_OUT
Modulator clock output. More...
IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT2_P33_1_OUT
Modulator clock output. More...
IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT3_P00_3_OUT
Modulator clock output. More...
IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT3_P02_7_OUT
Modulator clock output. More...
IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT4_P00_7_OUT
Modulator clock output. More...
IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT4_P02_5_OUT
Modulator clock output. More...
IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT5_P00_1_OUT
Modulator clock output. More...
IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT5_P02_3_OUT
Modulator clock output. More...
IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT6_P00_14_OUT
Modulator clock output. More...
IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT7_P00_1_OUT
Modulator clock output. More...
IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT7_P01_2_OUT
Modulator clock output. More...
IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT8_P01_5_OUT
Modulator clock output. More...
IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT9_P01_9_OUT
Modulator clock output. More...
IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN0A_P00_12_IN
Digital datastream input, channel 0. More...
IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN0B_P33_6_IN
Digital datastream input, channel 0. More...
IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN1A_P00_10_IN
Digital datastream input, channel 1. More...
IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN1B_P33_4_IN
Digital datastream input, channel 1. More...
IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN2A_P00_6_IN
Digital datastream input, channel 2. More...
IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN2B_P33_2_IN
Digital datastream input, channel 2. More...
IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN3A_P00_4_IN
Digital datastream input, channel 3. More...
IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN3B_P02_8_IN
Digital datastream input, channel 3. More...
IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN4A_P00_8_IN
Digital datastream input, channel 4. More...
IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN4B_P02_6_IN
Digital datastream input, channel 4. More...
IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN5A_P00_2_IN
Digital datastream input, channel 5. More...
IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN5B_P02_4_IN
Digital datastream input, channel 5. More...
IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN6A_P00_13_IN
Digital datastream input, channel 6. More...
IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN7A_P01_15_IN
Digital datastream input, channel 7. More...
IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN7B_P00_2_IN
Digital datastream input, channel 7. More...
IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN8A_P01_6_IN
Digital datastream input, channel 8. More...
IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN9A_P01_8_IN
Digital datastream input, channel 9. More...
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS0NA_AN3_IN
Negative analog input channel 0, pin A. More...
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS0NB_AN13_IN
Negative analog input channel 0, pin B. More...
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS1NA_P40_7_IN
Negative analog input channel 1, pin A. More...
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS1NB_P40_9_IN
Negative analog input channel 1, pin B. More...
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS1NC_AN45_IN
Negative analog input channel 1, pin C. More...
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS1ND_AN47_IN
Negative analog input channel 1, pin D. More...
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS2NA_AN21_IN
Negative analog input channel 2, pin A. More...
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS2NB_P40_1_IN
Negative analog input channel 2, pin B. More...
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS3NA_AN1_IN
Negative analog input channel 3, pin A. More...
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS3NB_AN15_IN
Negative analog input channel 3, pin N. More...
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS4NA_P00_7_IN
Negative analog input channel 4, pin A. More...
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS4NB_P00_9_IN
Negative analog input channel 4, pin B. More...
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS5NA_P00_1_IN
Negative analog input channel 5, pin A. More...
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS5NB_P00_3_IN
Negative analog input channel 5, pin B. More...
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS6NA_AN53_IN
Negative analog input channel 6, pin A. More...
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS6NB_P41_5_IN
Negative analog input channel 6, pin B. More...
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS7NA_AN61_IN
Negative analog input channel 7, pin A. More...
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS7NB_P41_7_IN
Negative analog input channel 7, pin B. More...
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS8NA_P41_1_IN
Negative analog input channel 8, pin A. More...
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS9NA_AN51_IN
Negative analog input channel 9, pin A. More...
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS9NB_P41_3_IN
Negative analog input channel 9, pin B. More...
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS0PA_AN2_IN
Positive analog input channel 0, pin A. More...
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS0PB_AN12_IN
Positive analog input channel 0, pin B. More...
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS1PA_P40_6_IN
Positive analog input channel 1, pin A. More...
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS1PB_P40_8_IN
Positive analog input channel 1, pin B. More...
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS1PC_AN44_IN
Positive analog input channel 1, pin C. More...
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS1PD_AN46_IN
Positive analog input channel 1, pin D. More...
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS2PA_AN20_IN
Positive analog input channel 2, pin A. More...
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS2PB_P40_0_IN
Positive analog input channel 2, pin B. More...
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS3PA_AN0_IN
Positive analog input channel 3, pin A. More...
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS3PB_AN14_IN
Positive analog input channel 3, pin B. More...
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS4PA_P00_8_IN
Positive analog input channel 4, pin A. More...
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS4PB_P00_10_IN
Positive analog input channel 4, pin B. More...
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS5PA_P00_2_IN
Positive analog input channel 5, pin A. More...
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS5PB_P00_4_IN
Positive analog input channel 5, pin B. More...
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS6PA_AN52_IN
Positive analog input channel 6, pin A. More...
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS6PB_P41_4_IN
Positive analog input channel 6, pin B. More...
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS7PA_AN60_IN
Positive analog input channel 7, pin A. More...
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS7PB_P41_6_IN
Positive analog input channel 7, pin B. More...
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS8PA_P41_0_IN
Positive analog input channel 8, pin A. More...
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS9PA_AN50_IN
Positive analog input channel 9, pin A. More...
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS9PB_P41_2_IN
Positive analog input channel 9, pin B. More...
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR0E_P33_0_IN
Trigger/Gate input, channel 0. More...
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR0F_P33_4_IN
Trigger/Gate input, channel 0. More...
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR1E_P33_1_IN
Trigger/Gate input, channel 1. More...
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR1F_P33_5_IN
Trigger/Gate input, channel 1. More...
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR2E_P33_2_IN
Trigger/Gate input, channel 2. More...
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR2F_P33_6_IN
Trigger/Gate input, channel 2. More...
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR3E_P02_8_IN
Trigger/Gate input, channel 3. More...
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR3F_P00_9_IN
Trigger/Gate input, channel 3. More...
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR4E_P02_7_IN
Trigger/Gate input, channel 4. More...
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR4F_P00_6_IN
Trigger/Gate input, channel 4. More...
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR5E_P02_6_IN
Trigger/Gate input, channel 5. More...
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR5F_P00_3_IN
Trigger/Gate input, channel 5. More...
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR6E_P01_0_IN
Trigger/Gate input, channel 6. More...
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR6F_P00_15_IN
Trigger/Gate input, channel 6. More...
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR7E_P01_4_IN
Trigger/Gate input, channel 7. More...
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR7F_P01_3_IN
Trigger/Gate input, channel 7. More...
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR8E_P01_1_IN
Trigger/Gate input, channel 8. More...
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR8F_P01_7_IN
Trigger/Gate input, channel 8. More...
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR9E_P01_11_IN
Trigger/Gate input, channel 9. More...
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR9F_P01_10_IN
Trigger/Gate input, channel 9. More...
IFX_EXTERN IfxEdsadc_Sg_In IfxEdsadc_SGNA_P00_4_IN
Carrier sign signal input. More...
IFX_EXTERN IfxEdsadc_Sg_In IfxEdsadc_SGNB_P33_13_IN
Carrier sign signal input. More...
IFX_EXTERN const IfxEdsadc_Cgpwm_Out * | IfxEdsadc_Cgpwm_Out_pinTable [IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS]
IfxEdsadc_Cgpwm_Out table. More...
IFX_EXTERN const IfxEdsadc_Dscin_In * | IfxEdsadc_Dscin_In_pinTable [IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_DSCIN_IN_NUM_ITEMS]
IfxEdsadc_Dscin_In table. More...
IFX_EXTERN const IfxEdsadc_Dscout_Out * | IfxEdsadc_Dscout_Out_pinTable [IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_DSCOUT_OUT_NUM_ITEMS]
IfxEdsadc_Dscout_Out table. More...
IFX_EXTERN const IfxEdsadc_Dsdin_In * | IfxEdsadc_Dsdin_In_pinTable [IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_DSDIN_IN_NUM_ITEMS]
IfxEdsadc_Dsdin_In table. More...
IFX_EXTERN const IfxEdsadc_Dsn_In * | IfxEdsadc_Dsn_In_pinTable [IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_DSN_IN_NUM_ITEMS]
IfxEdsadc_Dsn_In table. More...
IFX_EXTERN const IfxEdsadc_Dsp_In * | IfxEdsadc_Dsp_In_pinTable [IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_DSP_IN_NUM_ITEMS]
IfxEdsadc_Dsp_In table. More...
IFX_EXTERN const IfxEdsadc_Itr_In * | IfxEdsadc_Itr_In_pinTable [IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_ITR_IN_NUM_ITEMS]
IfxEdsadc_Itr_In table. More...
IFX_EXTERN const IfxEdsadc_Sg_In * | IfxEdsadc_Sg_In_pinTable [IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_SG_IN_NUM_ITEMS]
IfxEdsadc_Sg_In table. More...

Detailed Description

Data Structure Documentation

◆ IfxEdsadc_Dsn_In

struct IfxEdsadc_Dsn_In

DS negative pin mapping structure.

Definition at line 56 of file IfxEdsadc_PinMap.h.

Collaboration diagram for IfxEdsadc_Dsn_In:
[legend]
Data Fields
IfxEdsadc_ChannelId | channel | Channel number.
Ifx_EDSADC * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxEdsadc_Dsp_In

struct IfxEdsadc_Dsp_In

DS positive pin mapping structure.

Definition at line 65 of file IfxEdsadc_PinMap.h.

Collaboration diagram for IfxEdsadc_Dsp_In:
[legend]
Data Fields
IfxEdsadc_ChannelId | channel | Channel number.
Ifx_EDSADC * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxEdsadc_Cin_In

struct IfxEdsadc_Cin_In

CIN pin mapping structure.

Definition at line 74 of file IfxEdsadc_PinMap.h.

Collaboration diagram for IfxEdsadc_Cin_In:
[legend]
Data Fields
IfxEdsadc_ChannelId | channel | Channel number.
Ifx_EDSADC * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxEdsadc_Din_In

struct IfxEdsadc_Din_In

DIN pin mapping structure.

Definition at line 83 of file IfxEdsadc_PinMap.h.

Collaboration diagram for IfxEdsadc_Din_In:
[legend]
Data Fields
IfxEdsadc_ChannelId | channel | Channel number.
Ifx_EDSADC * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxEdsadc_Dscin_In

struct IfxEdsadc_Dscin_In

DIN pin mapping structure.

Definition at line 92 of file IfxEdsadc_PinMap.h.

Collaboration diagram for IfxEdsadc_Dscin_In:
[legend]
Data Fields
IfxEdsadc_ChannelId | channel | Channel number.
Ifx_EDSADC * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxEdsadc_Dsdin_In

struct IfxEdsadc_Dsdin_In

DIN pin mapping structure.

Definition at line 101 of file IfxEdsadc_PinMap.h.

Collaboration diagram for IfxEdsadc_Dsdin_In:
[legend]
Data Fields
IfxEdsadc_ChannelId | channel | Channel number.
Ifx_EDSADC * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxEdsadc_Itr_In

struct IfxEdsadc_Itr_In

ITR pin mapping structure.

Definition at line 110 of file IfxEdsadc_PinMap.h.

Collaboration diagram for IfxEdsadc_Itr_In:
[legend]
Data Fields
IfxEdsadc_ChannelId | channel | Channel number.
Ifx_EDSADC * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxEdsadc_Cgpwm_Out

struct IfxEdsadc_Cgpwm_Out

CGPWM pin mapping structure.

Definition at line 119 of file IfxEdsadc_PinMap.h.

Collaboration diagram for IfxEdsadc_Cgpwm_Out:
[legend]
Data Fields
Ifx_EDSADC * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxEdsadc_Sg_In

struct IfxEdsadc_Sg_In

SG pin mapping structure.

Definition at line 127 of file IfxEdsadc_PinMap.h.

Collaboration diagram for IfxEdsadc_Sg_In:
[legend]
Data Fields
Ifx_EDSADC * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxEdsadc_Dscout_Out

struct IfxEdsadc_Dscout_Out

COUT pin mapping structure.

Definition at line 135 of file IfxEdsadc_PinMap.h.

Collaboration diagram for IfxEdsadc_Dscout_Out:
[legend]
Data Fields
IfxEdsadc_ChannelId | channel | Channel number.
Ifx_EDSADC * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxEdsadc_Cout_Out

struct IfxEdsadc_Cout_Out

COUT pin mapping structure.

Definition at line 144 of file IfxEdsadc_PinMap.h.

Collaboration diagram for IfxEdsadc_Cout_Out:
[legend]
Data Fields
IfxEdsadc_ChannelId | channel | Channel number.
Ifx_EDSADC * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

Macro Definition Documentation

◆ IFXEDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS

#define IFXEDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS 6

Definition at line 277 of file IfxEdsadc_PinMap.h.

◆ IFXEDSADC_PINMAP_DSCIN_IN_NUM_ITEMS

#define IFXEDSADC_PINMAP_DSCIN_IN_NUM_ITEMS 2

Definition at line 278 of file IfxEdsadc_PinMap.h.

◆ IFXEDSADC_PINMAP_DSCOUT_OUT_NUM_ITEMS

#define IFXEDSADC_PINMAP_DSCOUT_OUT_NUM_ITEMS 2

Definition at line 279 of file IfxEdsadc_PinMap.h.

◆ IFXEDSADC_PINMAP_DSDIN_IN_NUM_ITEMS

#define IFXEDSADC_PINMAP_DSDIN_IN_NUM_ITEMS 2

Definition at line 280 of file IfxEdsadc_PinMap.h.

◆ IFXEDSADC_PINMAP_DSN_IN_NUM_ITEMS

#define IFXEDSADC_PINMAP_DSN_IN_NUM_ITEMS 4

Definition at line 281 of file IfxEdsadc_PinMap.h.

◆ IFXEDSADC_PINMAP_DSP_IN_NUM_ITEMS

#define IFXEDSADC_PINMAP_DSP_IN_NUM_ITEMS 4

Definition at line 282 of file IfxEdsadc_PinMap.h.

◆ IFXEDSADC_PINMAP_ITR_IN_NUM_ITEMS

#define IFXEDSADC_PINMAP_ITR_IN_NUM_ITEMS 6

Definition at line 283 of file IfxEdsadc_PinMap.h.

◆ IFXEDSADC_PINMAP_NUM_CHANNELS

#define IFXEDSADC_PINMAP_NUM_CHANNELS 10

Definition at line 276 of file IfxEdsadc_PinMap.h.

◆ IFXEDSADC_PINMAP_NUM_MODULES

#define IFXEDSADC_PINMAP_NUM_MODULES 1

Table dimensions.

Definition at line 275 of file IfxEdsadc_PinMap.h.

◆ IFXEDSADC_PINMAP_SG_IN_NUM_ITEMS

#define IFXEDSADC_PINMAP_SG_IN_NUM_ITEMS 2

Definition at line 284 of file IfxEdsadc_PinMap.h.

Variable Documentation

◆ IfxEdsadc_Cgpwm_Out_pinTable

IFX_EXTERN const IfxEdsadc_Cgpwm_Out* IfxEdsadc_Cgpwm_Out_pinTable[IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS]

IfxEdsadc_Cgpwm_Out table.

Definition at line 288 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_CGPWMN_P00_5_OUT

IFX_EXTERN IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMN_P00_5_OUT

Negative carrier generator output.

Definition at line 152 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_CGPWMN_P02_0_OUT

IFX_EXTERN IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMN_P02_0_OUT

Negative carrier generator output.

Definition at line 153 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_CGPWMN_P33_11_OUT

IFX_EXTERN IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMN_P33_11_OUT

Negative carrier generator output.

Definition at line 154 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_CGPWMP_P00_6_OUT

IFX_EXTERN IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMP_P00_6_OUT

Positive carrier generator output.

Definition at line 155 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_CGPWMP_P02_1_OUT

IFX_EXTERN IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMP_P02_1_OUT

Positive carrier generator output.

Definition at line 156 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_CGPWMP_P33_12_OUT

IFX_EXTERN IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMP_P33_12_OUT

Positive carrier generator output.

Definition at line 157 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DS0NA_AN3_IN

IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS0NA_AN3_IN

Negative analog input channel 0, pin A.

Definition at line 209 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DS0NB_AN13_IN

IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS0NB_AN13_IN

Negative analog input channel 0, pin B.

Definition at line 210 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DS0PA_AN2_IN

IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS0PA_AN2_IN

Positive analog input channel 0, pin A.

Definition at line 230 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DS0PB_AN12_IN

IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS0PB_AN12_IN

Positive analog input channel 0, pin B.

Definition at line 231 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DS1NA_P40_7_IN

IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS1NA_P40_7_IN

Negative analog input channel 1, pin A.

Definition at line 211 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DS1NB_P40_9_IN

IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS1NB_P40_9_IN

Negative analog input channel 1, pin B.

Definition at line 212 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DS1NC_AN45_IN

IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS1NC_AN45_IN

Negative analog input channel 1, pin C.

Definition at line 213 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DS1ND_AN47_IN

IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS1ND_AN47_IN

Negative analog input channel 1, pin D.

Definition at line 214 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DS1PA_P40_6_IN

IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS1PA_P40_6_IN

Positive analog input channel 1, pin A.

Definition at line 232 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DS1PB_P40_8_IN

IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS1PB_P40_8_IN

Positive analog input channel 1, pin B.

Definition at line 233 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DS1PC_AN44_IN

IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS1PC_AN44_IN

Positive analog input channel 1, pin C.

Definition at line 234 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DS1PD_AN46_IN

IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS1PD_AN46_IN

Positive analog input channel 1, pin D.

Definition at line 235 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DS2NA_AN21_IN

IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS2NA_AN21_IN

Negative analog input channel 2, pin A.

Definition at line 215 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DS2NB_P40_1_IN

IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS2NB_P40_1_IN

Negative analog input channel 2, pin B.

Definition at line 216 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DS2PA_AN20_IN

IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS2PA_AN20_IN

Positive analog input channel 2, pin A.

Definition at line 236 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DS2PB_P40_0_IN

IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS2PB_P40_0_IN

Positive analog input channel 2, pin B.

Definition at line 237 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DS3NA_AN1_IN

IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS3NA_AN1_IN

Negative analog input channel 3, pin A.

Definition at line 217 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DS3NB_AN15_IN

IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS3NB_AN15_IN

Negative analog input channel 3, pin N.

Definition at line 218 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DS3PA_AN0_IN

IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS3PA_AN0_IN

Positive analog input channel 3, pin A.

Definition at line 238 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DS3PB_AN14_IN

IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS3PB_AN14_IN

Positive analog input channel 3, pin B.

Definition at line 239 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DS4NA_P00_7_IN

IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS4NA_P00_7_IN

Negative analog input channel 4, pin A.

Definition at line 219 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DS4NB_P00_9_IN

IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS4NB_P00_9_IN

Negative analog input channel 4, pin B.

Definition at line 220 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DS4PA_P00_8_IN

IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS4PA_P00_8_IN

Positive analog input channel 4, pin A.

Definition at line 240 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DS4PB_P00_10_IN

IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS4PB_P00_10_IN

Positive analog input channel 4, pin B.

Definition at line 241 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DS5NA_P00_1_IN

IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS5NA_P00_1_IN

Negative analog input channel 5, pin A.

Definition at line 221 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DS5NB_P00_3_IN

IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS5NB_P00_3_IN

Negative analog input channel 5, pin B.

Definition at line 222 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DS5PA_P00_2_IN

IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS5PA_P00_2_IN

Positive analog input channel 5, pin A.

Definition at line 242 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DS5PB_P00_4_IN

IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS5PB_P00_4_IN

Positive analog input channel 5, pin B.

Definition at line 243 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DS6NA_AN53_IN

IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS6NA_AN53_IN

Negative analog input channel 6, pin A.

Definition at line 223 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DS6NB_P41_5_IN

IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS6NB_P41_5_IN

Negative analog input channel 6, pin B.

Definition at line 224 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DS6PA_AN52_IN

IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS6PA_AN52_IN

Positive analog input channel 6, pin A.

Definition at line 244 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DS6PB_P41_4_IN

IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS6PB_P41_4_IN

Positive analog input channel 6, pin B.

Definition at line 245 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DS7NA_AN61_IN

IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS7NA_AN61_IN

Negative analog input channel 7, pin A.

Definition at line 225 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DS7NB_P41_7_IN

IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS7NB_P41_7_IN

Negative analog input channel 7, pin B.

Definition at line 226 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DS7PA_AN60_IN

IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS7PA_AN60_IN

Positive analog input channel 7, pin A.

Definition at line 246 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DS7PB_P41_6_IN

IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS7PB_P41_6_IN

Positive analog input channel 7, pin B.

Definition at line 247 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DS8NA_P41_1_IN

IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS8NA_P41_1_IN

Negative analog input channel 8, pin A.

Definition at line 227 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DS8PA_P41_0_IN

IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS8PA_P41_0_IN

Positive analog input channel 8, pin A.

Definition at line 248 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DS9NA_AN51_IN

IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS9NA_AN51_IN

Negative analog input channel 9, pin A.

Definition at line 228 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DS9NB_P41_3_IN

IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS9NB_P41_3_IN

Negative analog input channel 9, pin B.

Definition at line 229 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DS9PA_AN50_IN

IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS9PA_AN50_IN

Positive analog input channel 9, pin A.

Definition at line 249 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DS9PB_P41_2_IN

IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS9PB_P41_2_IN

Positive analog input channel 9, pin B.

Definition at line 250 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DSCIN0A_P00_11_IN

IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN0A_P00_11_IN

Modulator clock input, channel 0.

Definition at line 158 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DSCIN0B_P33_5_IN

IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN0B_P33_5_IN

Modulator clock input, channel 0.

Definition at line 159 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DSCIN1A_P00_9_IN

IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN1A_P00_9_IN

Modulator clock input, channel 1.

Definition at line 160 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DSCIN1B_P33_3_IN

IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN1B_P33_3_IN

Modulator clock input, channel 1.

Definition at line 161 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DSCIN2A_P00_5_IN

IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN2A_P00_5_IN

Modulator clock input, channel 2.

Definition at line 162 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DSCIN2B_P33_1_IN

IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN2B_P33_1_IN

Modulator clock input, channel 2.

Definition at line 163 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DSCIN3A_P00_3_IN

IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN3A_P00_3_IN

Modulator clock input, channel 3.

Definition at line 164 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DSCIN3B_P02_7_IN

IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN3B_P02_7_IN

Modulator clock input, channel 3.

Definition at line 165 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DSCIN4A_P00_7_IN

IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN4A_P00_7_IN

Modulator clock input, channel 4.

Definition at line 166 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DSCIN4B_P02_5_IN

IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN4B_P02_5_IN

Modulator clock input, channel 4.

Definition at line 167 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DSCIN5A_P00_1_IN

IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN5A_P00_1_IN

Modulator clock input, channel 5.

Definition at line 168 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DSCIN5B_P02_3_IN

IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN5B_P02_3_IN

Modulator clock input, channel 5.

Definition at line 169 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DSCIN6A_P00_14_IN

IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN6A_P00_14_IN

Modulator clock input, channel 6.

Definition at line 170 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DSCIN7A_P01_2_IN

IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN7A_P01_2_IN

Modulator clock input, channel 7.

Definition at line 171 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DSCIN7B_P00_1_IN

IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN7B_P00_1_IN

Modulator clock input, channel 7.

Definition at line 172 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DSCIN8A_P01_5_IN

IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN8A_P01_5_IN

Modulator clock input, channel 8.

Definition at line 173 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DSCIN9A_P01_9_IN

IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN9A_P01_9_IN

Modulator clock input, channel 9.

Definition at line 174 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_Dscin_In_pinTable

IFX_EXTERN const IfxEdsadc_Dscin_In* IfxEdsadc_Dscin_In_pinTable[IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_DSCIN_IN_NUM_ITEMS]

IfxEdsadc_Dscin_In table.

Definition at line 291 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DSCOUT0_P00_11_OUT

IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT0_P00_11_OUT

Modulator clock output.

Definition at line 175 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DSCOUT0_P33_5_OUT

IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT0_P33_5_OUT

Modulator clock output.

Definition at line 176 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DSCOUT1_P00_9_OUT

IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT1_P00_9_OUT

Modulator clock output.

Definition at line 177 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DSCOUT1_P33_3_OUT

IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT1_P33_3_OUT

Modulator clock output.

Definition at line 178 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DSCOUT2_P00_5_OUT

IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT2_P00_5_OUT

Modulator clock output.

Definition at line 179 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DSCOUT2_P33_1_OUT

IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT2_P33_1_OUT

Modulator clock output.

Definition at line 180 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DSCOUT3_P00_3_OUT

IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT3_P00_3_OUT

Modulator clock output.

Definition at line 181 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DSCOUT3_P02_7_OUT

IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT3_P02_7_OUT

Modulator clock output.

Definition at line 182 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DSCOUT4_P00_7_OUT

IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT4_P00_7_OUT

Modulator clock output.

Definition at line 183 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DSCOUT4_P02_5_OUT

IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT4_P02_5_OUT

Modulator clock output.

Definition at line 184 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DSCOUT5_P00_1_OUT

IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT5_P00_1_OUT

Modulator clock output.

Definition at line 185 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DSCOUT5_P02_3_OUT

IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT5_P02_3_OUT

Modulator clock output.

Definition at line 186 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DSCOUT6_P00_14_OUT

IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT6_P00_14_OUT

Modulator clock output.

Definition at line 187 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DSCOUT7_P00_1_OUT

IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT7_P00_1_OUT

Modulator clock output.

Definition at line 188 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DSCOUT7_P01_2_OUT

IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT7_P01_2_OUT

Modulator clock output.

Definition at line 189 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DSCOUT8_P01_5_OUT

IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT8_P01_5_OUT

Modulator clock output.

Definition at line 190 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DSCOUT9_P01_9_OUT

IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT9_P01_9_OUT

Modulator clock output.

Definition at line 191 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_Dscout_Out_pinTable

IFX_EXTERN const IfxEdsadc_Dscout_Out* IfxEdsadc_Dscout_Out_pinTable[IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_DSCOUT_OUT_NUM_ITEMS]

IfxEdsadc_Dscout_Out table.

Definition at line 294 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DSDIN0A_P00_12_IN

IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN0A_P00_12_IN

Digital datastream input, channel 0.

Definition at line 192 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DSDIN0B_P33_6_IN

IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN0B_P33_6_IN

Digital datastream input, channel 0.

Definition at line 193 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DSDIN1A_P00_10_IN

IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN1A_P00_10_IN

Digital datastream input, channel 1.

Definition at line 194 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DSDIN1B_P33_4_IN

IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN1B_P33_4_IN

Digital datastream input, channel 1.

Definition at line 195 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DSDIN2A_P00_6_IN

IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN2A_P00_6_IN

Digital datastream input, channel 2.

Definition at line 196 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DSDIN2B_P33_2_IN

IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN2B_P33_2_IN

Digital datastream input, channel 2.

Definition at line 197 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DSDIN3A_P00_4_IN

IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN3A_P00_4_IN

Digital datastream input, channel 3.

Definition at line 198 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DSDIN3B_P02_8_IN

IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN3B_P02_8_IN

Digital datastream input, channel 3.

Definition at line 199 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DSDIN4A_P00_8_IN

IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN4A_P00_8_IN

Digital datastream input, channel 4.

Definition at line 200 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DSDIN4B_P02_6_IN

IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN4B_P02_6_IN

Digital datastream input, channel 4.

Definition at line 201 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DSDIN5A_P00_2_IN

IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN5A_P00_2_IN

Digital datastream input, channel 5.

Definition at line 202 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DSDIN5B_P02_4_IN

IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN5B_P02_4_IN

Digital datastream input, channel 5.

Definition at line 203 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DSDIN6A_P00_13_IN

IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN6A_P00_13_IN

Digital datastream input, channel 6.

Definition at line 204 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DSDIN7A_P01_15_IN

IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN7A_P01_15_IN

Digital datastream input, channel 7.

Definition at line 205 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DSDIN7B_P00_2_IN

IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN7B_P00_2_IN

Digital datastream input, channel 7.

Definition at line 206 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DSDIN8A_P01_6_IN

IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN8A_P01_6_IN

Digital datastream input, channel 8.

Definition at line 207 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_DSDIN9A_P01_8_IN

IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN9A_P01_8_IN

Digital datastream input, channel 9.

Definition at line 208 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_Dsdin_In_pinTable

IFX_EXTERN const IfxEdsadc_Dsdin_In* IfxEdsadc_Dsdin_In_pinTable[IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_DSDIN_IN_NUM_ITEMS]

IfxEdsadc_Dsdin_In table.

Definition at line 297 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_Dsn_In_pinTable

IFX_EXTERN const IfxEdsadc_Dsn_In* IfxEdsadc_Dsn_In_pinTable[IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_DSN_IN_NUM_ITEMS]

IfxEdsadc_Dsn_In table.

Definition at line 300 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_Dsp_In_pinTable

IFX_EXTERN const IfxEdsadc_Dsp_In* IfxEdsadc_Dsp_In_pinTable[IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_DSP_IN_NUM_ITEMS]

IfxEdsadc_Dsp_In table.

Definition at line 303 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_ITR0E_P33_0_IN

IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR0E_P33_0_IN

Trigger/Gate input, channel 0.

Definition at line 251 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_ITR0F_P33_4_IN

IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR0F_P33_4_IN

Trigger/Gate input, channel 0.

Definition at line 252 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_ITR1E_P33_1_IN

IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR1E_P33_1_IN

Trigger/Gate input, channel 1.

Definition at line 253 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_ITR1F_P33_5_IN

IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR1F_P33_5_IN

Trigger/Gate input, channel 1.

Definition at line 254 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_ITR2E_P33_2_IN

IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR2E_P33_2_IN

Trigger/Gate input, channel 2.

Definition at line 255 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_ITR2F_P33_6_IN

IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR2F_P33_6_IN

Trigger/Gate input, channel 2.

Definition at line 256 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_ITR3E_P02_8_IN

IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR3E_P02_8_IN

Trigger/Gate input, channel 3.

Definition at line 257 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_ITR3F_P00_9_IN

IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR3F_P00_9_IN

Trigger/Gate input, channel 3.

Definition at line 258 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_ITR4E_P02_7_IN

IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR4E_P02_7_IN

Trigger/Gate input, channel 4.

Definition at line 259 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_ITR4F_P00_6_IN

IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR4F_P00_6_IN

Trigger/Gate input, channel 4.

Definition at line 260 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_ITR5E_P02_6_IN

IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR5E_P02_6_IN

Trigger/Gate input, channel 5.

Definition at line 261 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_ITR5F_P00_3_IN

IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR5F_P00_3_IN

Trigger/Gate input, channel 5.

Definition at line 262 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_ITR6E_P01_0_IN

IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR6E_P01_0_IN

Trigger/Gate input, channel 6.

Definition at line 263 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_ITR6F_P00_15_IN

IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR6F_P00_15_IN

Trigger/Gate input, channel 6.

Definition at line 264 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_ITR7E_P01_4_IN

IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR7E_P01_4_IN

Trigger/Gate input, channel 7.

Definition at line 265 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_ITR7F_P01_3_IN

IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR7F_P01_3_IN

Trigger/Gate input, channel 7.

Definition at line 266 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_ITR8E_P01_1_IN

IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR8E_P01_1_IN

Trigger/Gate input, channel 8.

Definition at line 267 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_ITR8F_P01_7_IN

IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR8F_P01_7_IN

Trigger/Gate input, channel 8.

Definition at line 268 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_ITR9E_P01_11_IN

IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR9E_P01_11_IN

Trigger/Gate input, channel 9.

Definition at line 269 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_ITR9F_P01_10_IN

IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR9F_P01_10_IN

Trigger/Gate input, channel 9.

Definition at line 270 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_Itr_In_pinTable

IFX_EXTERN const IfxEdsadc_Itr_In* IfxEdsadc_Itr_In_pinTable[IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_ITR_IN_NUM_ITEMS]

IfxEdsadc_Itr_In table.

Definition at line 306 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_Sg_In_pinTable

IFX_EXTERN const IfxEdsadc_Sg_In* IfxEdsadc_Sg_In_pinTable[IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_SG_IN_NUM_ITEMS]

IfxEdsadc_Sg_In table.

Definition at line 309 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_SGNA_P00_4_IN

IFX_EXTERN IfxEdsadc_Sg_In IfxEdsadc_SGNA_P00_4_IN

Carrier sign signal input.

Definition at line 271 of file IfxEdsadc_PinMap.h.

◆ IfxEdsadc_SGNB_P33_13_IN

IFX_EXTERN IfxEdsadc_Sg_In IfxEdsadc_SGNB_P33_13_IN

Carrier sign signal input.

Definition at line 272 of file IfxEdsadc_PinMap.h.


iLLD_TC38A: How to use the EDSADC Interface driver?

How to use the EDSADC Interface driver?
iLLD » EDSADC
Collaboration diagram for How to use the EDSADC Interface driver?:

The EDSADC interface driver provides a default EDSADC configuration for converting analog data streams inputs from external modulators via digital input channels, into digital values by using the on-chip demodulator channels.

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Edsadc/Edsadc/IfxEdsadc_Edsadc.h>

Variables

Declare the EDSADC channel handle and available channels as global variables in your C code:

static IfxEdsadc_Edsadc edsadc;
IfxEdsadc_Edsadc_Channel edsadcChannel[IFXEDSADC_NUM_CHANNELS];
uint8 edsadcChannelAvailable[IFXEDSADC_NUM_CHANNELS] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 };

Module Initialisation

The module initialisation can be done in the same function. Here an example:

// create module config
IfxEdsadc_Edsadc_Config edsadcConfig;
IfxEdsadc_Edsadc_initModuleConfig(&edsadcConfig, &MODULE_EDSADC);
// initialize module
// IfxEdsadc_Edsadc edsadc; //declared globally
IfxEdsadc_Edsadc_initModule(&edsadc, &edsadcConfig);
// create channel config
IfxEdsadc_Edsadc_ChannelConfig edsadcChannelConfig;
IfxEdsadc_Edsadc_initChannelConfig(&edsadcChannelConfig, &edsadc);
// modify default configuration
edsadcChannelConfig.modulator.positiveInput = IfxEdsadc_InputConfig_inputPin;
edsadcChannelConfig.modulator.negativeInput = IfxEdsadc_InputConfig_inputPin;
edsadcChannelConfig.modulator.inputGain = IfxEdsadc_InputGain_factor1;
edsadcChannelConfig.modulator.inputPin = IfxEdsadc_InputPin_a;
edsadcChannelConfig.modulator.modulatorClockFreq = 10.0e6;
edsadcChannelConfig.combFilter.decimationFactor = 32;
edsadcChannelConfig.combFilter.startValue = 32;
edsadcChannelConfig.firFilter.fir0Enabled = TRUE;
edsadcChannelConfig.firFilter.fir1Enabled = TRUE;
edsadcChannelConfig.firFilter.offsetCompensation = IfxEdsadc_OffsetCompensationFilter_disabled;
edsadcChannelConfig.firFilter.fir1DecimateRate = TRUE;
edsadcChannelConfig.firFilter.prefilterEnabled = TRUE;
// initialize channels
for(int chn=0; chn<IFXEDSADC_NUM_CHANNELS; ++chn) {
if( edsadcChannelAvailable[chn] ) {
edsadcChannelConfig.channelId = (IfxEdsadc_ChannelId)chn;
// Note:CICSHIFT Value has to update according to application need
edsadcChannelConfig.cicShift = 15;
IfxEdsadc_Edsadc_initChannel(&edsadcChannel[chn], &edsadcChannelConfig);
}
}

The EDSADC is ready for use now!

Conversions

The EDSADC driver provides simple to use Conversion function,

// start conversions
IfxEdsadc_Edsadc_startScan(&edsadc, 0x3f, 0x3f);
// results are now available in IFXEDSADC(ds).CH[x].RESM.B.RESULT (x=0..5)

The converted data can be collected using the following function

// declared globally
// sint16 result[];
for(int chn=0; chn<IFXEDSADC_NUM_CHANNELS; ++chn) {
if( edsadcChannelAvailable[chn] ) {
result = IfxEdsadc_Edsadc_getMainResult(&edsadcChannel[chn]);
}
}


iLLD_TC38A: EDSADC

Modules
EDSADC
iLLD » EDSADC
Collaboration diagram for EDSADC:

Modules

Data Structures
Module Functions
Channel Functions
Operative Functions
Result Functions
Interrupt Functions

Detailed Description


iLLD_TC38A: Data Structures

Data Structures
Data Structures
iLLD » EDSADC » EDSADC
Collaboration diagram for Data Structures:

Data Structures

struct | IfxEdsadc_Edsadc_ChannelPins
Channel Pins Configuration structure. More...
struct | IfxEdsadc_Edsadc_CombFilterConfig
Comb filter configuration structure. More...
struct | IfxEdsadc_Edsadc_CommonModeVoltageConfig
enable the voltage generators and select which input pins are connected to the common mode hold voltage More...
struct | IfxEdsadc_Edsadc_DemodulatorConfig
Demodulator configuration structure. More...
struct | IfxEdsadc_Edsadc_FirFilterConfig
FIR filters configuration structure. More...
struct | IfxEdsadc_Edsadc_IntegratorConfig
Integrator configuration structure. More...
struct | IfxEdsadc_Edsadc_ModulatorConfig
Modulator configuration structure. More...
struct | IfxEdsadc_Edsadc_RectifierConfig
Rectifier configuration structure. More...
struct | IfxEdsadc_Edsadc_TimeStampCounter
TimeStamp Counter Configuration. More...
struct | IfxEdsadc_Edsadc
EDSADC handle data structure. More...
struct | IfxEdsadc_Edsadc_CarrierGenConfig
Carrier generation configuration structure. More...
struct | IfxEdsadc_Edsadc_Channel
Channel handle structure. More...
struct | IfxEdsadc_Edsadc_ChannelConfig
Single channel configuration structure. More...
struct | IfxEdsadc_Edsadc_Config
Clock configuration data structure. More...

Detailed Description

Data Structure Documentation

◆ IfxEdsadc_Edsadc_ChannelPins

struct IfxEdsadc_Edsadc_ChannelPins

Channel Pins Configuration structure.

Definition at line 175 of file IfxEdsadc_Edsadc.h.

Collaboration diagram for IfxEdsadc_Edsadc_ChannelPins:
[legend]
Data Fields
IFX_CONST IfxEdsadc_Cin_In * | cin | the CIN Pin which should be configured
IfxPort_InputMode | cinMode | the CIN pin input mode which should be configured
IFX_CONST IfxEdsadc_Din_In * | din | the DIN Pin which should be configured
IfxPort_InputMode | dinMode | the DIN pin input mode which should be configured
IFX_CONST IfxEdsadc_Dsn_In * | dsn | the DSN Pin which should be configured
IfxPort_InputMode | dsnMode | the DSN pin output mode which should be configured
IFX_CONST IfxEdsadc_Dsp_In * | dsp | the DSP Pin which should be configured
IfxPort_InputMode | dspMode | the DSP pin output mode which should be configured
IFX_CONST IfxEdsadc_Itr_In * | itr | the ITR Pin which should be configured
IfxPort_InputMode | itrMode | the ITR pin input mode which should be configured
IfxPort_PadDriver | pinDriver | Pin Driver Configuration.

◆ IfxEdsadc_Edsadc_CombFilterConfig

struct IfxEdsadc_Edsadc_CombFilterConfig

Comb filter configuration structure.

Definition at line 192 of file IfxEdsadc_Edsadc.h.

Data Fields
uint16 | decimationFactor | decimation rate of comb filter 4 .. 256
uint16 | startValue | 4 .. decimationFactor

◆ IfxEdsadc_Edsadc_CommonModeVoltageConfig

struct IfxEdsadc_Edsadc_CommonModeVoltageConfig

enable the voltage generators and select which input pins are connected to the common mode hold voltage

Definition at line 200 of file IfxEdsadc_Edsadc.h.

Data Fields
IfxEdsadc_CommonModeHoldVoltage | commonModeHoldVoltage | Common Mode hold Voltage Enable/ Disable.
IfxEdsadc_FractionalRefVoltageSelection | fractionalRefVoltage | Fractional Reference Voltage selection.
IfxEdsadc_HalfSupplyVoltage | halfSupplyVoltge | Half supply voltage Enable/Disable.
uint8 | negativeInput | Defines the connection of the respective negative input y to the common mode hold voltage.
uint8 | positiveInput | Defines the connection of the respective positive input y to the common mode hold voltage.
IfxEdsadc_FractionalRefVoltage | refVoltageEnable | Fractional Reference Voltage enable/disable.

◆ IfxEdsadc_Edsadc_DemodulatorConfig

struct IfxEdsadc_Edsadc_DemodulatorConfig

Demodulator configuration structure.

Definition at line 213 of file IfxEdsadc_Edsadc.h.

Data Fields
IfxEdsadc_DataRead | dataReadMode | Selects the data that is returned when register RESMx is read ().
IfxEdsadc_DataStream | dataStream | Data stream select.
IfxEdsadc_InputDataSource | inputDataSource | Demodulator input data source selection.
IfxEdsadc_IntegratorTrigger | integrationTrigger | Integrator trigger mode selection.
IfxEdsadc_ResultDisplayMode | resultDisplay | Result Display Mode (Signed./Unsigned)
IfxEdsadc_SampleClockSource | sampleClockSource | Demodulator sample clock source selection.
boolean | timeStampMode | FALSE = no timeStamp True = inserts timestamp upon trigger.
IfxEdsadc_TimestampTrigger | timestampTrigger | Timestamp trigger mode selection.
IfxEdsadc_TriggerInput | triggerInput | Trigger selection.

◆ IfxEdsadc_Edsadc_FirFilterConfig

struct IfxEdsadc_Edsadc_FirFilterConfig

FIR filters configuration structure.

Definition at line 229 of file IfxEdsadc_Edsadc.h.

Data Fields
IfxEdsadc_AuxServiceRequest | auxServiceRequest | Service Request Generation for Auxiliary Service Request.
boolean | calibrationControl | Automatic Calibration Control.
boolean | calibrationTrigger | triggger the calibration
boolean | cicMode | CIC Filter mode.
IfxEdsadc_EventSelect | eventSelect | Defines when a comparator event is generated.
boolean | fir0Enabled | FIR filter 0 enable/disable selection.
boolean | fir1DecimateRate | FIR1 Filter Decimation Rate.
boolean | fir1Enabled | FIR filter 0 enable/disable selection.
IfxEdsadc_OffsetCompensationFilter | offsetCompensation | Offset Compensation Filter enable/disable selection.
IfxEdsadc_OvershootCompensation | overshootCompensation | Overshoot Compensation Enable/Disable.
boolean | prefilterEnabled | Enable/Disable the PreFilter.
boolean | rippleCompensationEnabled | Ripple Compensation Enabled.
IfxEdsadc_MainServiceRequest | serviceRequest | Service Request generation for main service request.
IfxEdsadc_ServiceRequestFifolevel | serviceRequestLevel | Service Request FIFO Level.

◆ IfxEdsadc_Edsadc_IntegratorConfig

struct IfxEdsadc_Edsadc_IntegratorConfig

Integrator configuration structure.

Definition at line 249 of file IfxEdsadc_Edsadc.h.

Data Fields
uint16 | discardCount | Number of discarded values to after active trigger: 1 .. 64.
IfxEdsadc_RestartFilterChain | fcRestartControl | Filter Chain Restart Control.
uint16 | integrationCount | Number of integrated values after discard step: 1 .. 64.
uint16 | integrationCycles | Number of integration cycles: 1 .. 16. Used only when IfxEdsadc_IntegrationWindowSize_internalControl.
IfxEdsadc_IntegrationShiftControl | shiftControl | Integrator shift control.
IfxEdsadc_IntegrationWindowSize | windowSize | Integrator window size.

◆ IfxEdsadc_Edsadc_ModulatorConfig

struct IfxEdsadc_Edsadc_ModulatorConfig

Modulator configuration structure.

Definition at line 261 of file IfxEdsadc_Edsadc.h.

Data Fields
IfxEdsadc_AnalogClockSyncDelay | analogClockSyncDelay | Define the delay in clock cycle after sync signal.
IfxEdsadc_dithering | ditheringEnabled | Control the Dithering Function for each modulator.
IfxEdsadc_InputGain | inputGain | Modulator gain select of analog input path.
boolean | inputMuxActionControl | Defines the mechanism by which the input multiplexer is controlled.
IfxEdsadc_InputPin | inputPin | Modulator input pin selection.
boolean | integratorResetEnabled | control the modulator overload handling
float32 | modulatorClockFreq | Modulator clock frequency.
IfxEdsadc_InputConfig | negativeInput | Modulator configuration of negative input line.
IfxEdsadc_InputConfig | positiveInput | Modulator configuration of positive input line.
IfxEdsadc_InputMuxControlMode | triggerEvent | Defines the condition for a trigger event to control the input multiplexer.

◆ IfxEdsadc_Edsadc_RectifierConfig

struct IfxEdsadc_Edsadc_RectifierConfig

Rectifier configuration structure.

Definition at line 277 of file IfxEdsadc_Edsadc.h.

Data Fields
boolean | enabled | Rectification enable/disable selection.
uint8 | signDelay | Sign delay value.
uint8 | signPeriod | Sign period.
IfxEdsadc_RectifierSignSource | signSource | Rectifier sign source.

◆ IfxEdsadc_Edsadc_TimeStampCounter

struct IfxEdsadc_Edsadc_TimeStampCounter

TimeStamp Counter Configuration.

Definition at line 287 of file IfxEdsadc_Edsadc.h.

Data Fields
IfxEdsadc_AnalogMux | analogMuxCopy | Allows copying of bitfield AMX into bitfield TIMESTAMP.
IfxEdsadc_TimeStampCounterClockSelection | timeStampCounterClock | Timestamp Counter Clock Selection.
IfxEdsadc_TimeStampCounterControl | timeStampCounterRunControl |

◆ IfxEdsadc_Edsadc

struct IfxEdsadc_Edsadc

EDSADC handle data structure.

Definition at line 311 of file IfxEdsadc_Edsadc.h.

Data Fields
Ifx_EDSADC * edsadc Specifies the pointer to the EDSADC module registers.

◆ IfxEdsadc_Edsadc_CarrierGenConfig

struct IfxEdsadc_Edsadc_CarrierGenConfig

Carrier generation configuration structure.

Definition at line 318 of file IfxEdsadc_Edsadc.h.

Collaboration diagram for IfxEdsadc_Edsadc_CarrierGenConfig:
[legend]
Data Fields
boolean | bitReversed | Bit-Reverse PWM Generation (Normal / Bit reverse mode) selection.
IfxEdsadc_CarrierWaveformMode | carrierWaveformMode | Carrier generation mode.
float32 | frequency | Expected excitation frequency in Hz.
boolean | inverted | Signal polarity (Normal / Inverted) selection.
IfxPort_PadDriver | pinDriver | Carrier pins pad driver.
IfxPort_OutputMode | pinMode | Carrier pins output mode.
IFX_CONST IfxEdsadc_Cgpwm_Out * | pinNeg | Negative-carrier pin configuration.
IFX_CONST IfxEdsadc_Cgpwm_Out * | pinPos | Positive-carrier pin configuration.

◆ IfxEdsadc_Edsadc_Channel

struct IfxEdsadc_Edsadc_Channel

Channel handle structure.

Definition at line 332 of file IfxEdsadc_Edsadc.h.

Data Fields
Ifx_EDSADC_CH * | channel | Specifies the pointer to the EDSADC channel registers.
IfxEdsadc_ChannelId | channelId | Channel Id.
Ifx_EDSADC * | module | Specifies the pointer to the EDSADC module registers.

◆ IfxEdsadc_Edsadc_ChannelConfig

struct IfxEdsadc_Edsadc_ChannelConfig

Single channel configuration structure.

Definition at line 341 of file IfxEdsadc_Edsadc.h.

Collaboration diagram for IfxEdsadc_Edsadc_ChannelConfig:
[legend]
Data Fields
IfxEdsadc_ChannelId | channelId | Channel Id.
IFX_CONST IfxEdsadc_Edsadc_ChannelPins * | channelPins | Channel Pins Configuration structure.
uint8 | cicShift | Position of the CIC Filter Output Shifter.
IfxEdsadc_Edsadc_CombFilterConfig | combFilter | Comb filter configuration structure.
IfxEdsadc_Edsadc_CommonModeVoltageConfig | commonMode | Common Mode Voltage Configuration.
IfxEdsadc_Edsadc_DemodulatorConfig | demodulator | Demodulator configuration structure.
IfxEdsadc_Edsadc_FirFilterConfig | firFilter | FIR filters configuration structure.
IfxEdsadc_Edsadc_GainCalibrationConfig | gainCalibrationConfig | Configuration Settings for Gain Calibration.
uint16 | gainFactor | Multiplication Factor for Gain Correction.
IfxEdsadc_Edsadc_IntegratorConfig | integrator | Integrator configuration structure.
IfxEdsadc_Edsadc_ModulatorConfig | modulator | Modulator configuration structure.
Ifx_EDSADC * | module | Specifies the pointer to the EDSADC module registers.
IfxEdsadc_Edsadc_RectifierConfig | rectifier | Rectifier configuration structure.
IfxEdsadc_Edsadc_TimeStampCounter | timeStamp | Configure Time Stamp Counter.

◆ IfxEdsadc_Edsadc_Config

struct IfxEdsadc_Edsadc_Config

Clock configuration data structure.

Definition at line 361 of file IfxEdsadc_Edsadc.h.

Data Fields
IfxEdsadc_DitheringIntensity | ditheringIntensity | Trimming Value for the Dithering Function.
Ifx_EDSADC * | edsadc | Specifies the pointer to the EDSADC module registers.
IfxEdsadc_ModulatorClockGeneration | modulatorClockMode | Defines the way the modulator clock is generated.
IfxEdsadc_SupplyVoltageLevel | supplyVoltageLevel | Adjusts the analog circuitry to the supply voltage used in the application system.


iLLD_TC38A: Module Functions

Functions
Module Functions
iLLD » EDSADC » EDSADC
Collaboration diagram for Module Functions:

Functions

IFX_STATIC sint32 | IfxEdsadc_Edsadc_calcDIVM (float32 sourceFreq, float32 *targetFreq)
calculate division factor for modulator clock period More...
IFX_EXTERN void | IfxEdsadc_Edsadc_initCarrierGen (IfxEdsadc_Edsadc *edsadc, IfxEdsadc_Edsadc_CarrierGenConfig *config)
Initialise the EDSADC carrier generator. More...
IFX_EXTERN void | IfxEdsadc_Edsadc_initCombFilter (IfxEdsadc_Edsadc_Channel *channel, const IfxEdsadc_Edsadc_CombFilterConfig *config)
Initialises the comb filter. More...
IFX_EXTERN void | IfxEdsadc_Edsadc_initDemodulator (IfxEdsadc_Edsadc_Channel *channel, const IfxEdsadc_Edsadc_DemodulatorConfig *config)
Initialises the demodulator. More...
IFX_EXTERN void | IfxEdsadc_Edsadc_initFirFilter (IfxEdsadc_Edsadc_Channel *channel, const IfxEdsadc_Edsadc_FirFilterConfig *config)
Initialises the fir filter. More...
IFX_EXTERN void | IfxEdsadc_Edsadc_initIntegrator (IfxEdsadc_Edsadc_Channel *channel, const IfxEdsadc_Edsadc_IntegratorConfig *config)
Initialises the integrator. More...
IFX_EXTERN void | IfxEdsadc_Edsadc_initModulator (IfxEdsadc_Edsadc_Channel *channel, const IfxEdsadc_Edsadc_ModulatorConfig *config)
Initialises the modulator. More...
IFX_EXTERN void | IfxEdsadc_Edsadc_initModule (IfxEdsadc_Edsadc *edsadc, IfxEdsadc_Edsadc_Config *config)
Initialise the EDSADC with the supplied configuration. More...
IFX_EXTERN void | IfxEdsadc_Edsadc_initModuleConfig (IfxEdsadc_Edsadc_Config *config, Ifx_EDSADC *edsadc)
Initialise the config struct with default EDSADC configuration. More...
IFX_EXTERN void | IfxEdsadc_Edsadc_initRectifier (IfxEdsadc_Edsadc_Channel *channel, const IfxEdsadc_Edsadc_RectifierConfig *config)
Initialises the rectifier. More...

Detailed Description

Function Documentation

◆ IfxEdsadc_Edsadc_calcDIVM()

IFX_STATIC sint32 IfxEdsadc_Edsadc_calcDIVM | ( | float32 | sourceFreq,
 |  | float32 * | targetFreq
 | ) |  |

calculate division factor for modulator clock period

Parameters
sourceFreq | Source frequency
targetFreq | Target frequency
Returns
division factor

Definition at line 79 of file IfxEdsadc_Edsadc.c.

Referenced by IfxEdsadc_Edsadc_initModulator().

◆ IfxEdsadc_Edsadc_initCarrierGen()

IFX_EXTERN void IfxEdsadc_Edsadc_initCarrierGen | ( | IfxEdsadc_Edsadc * | edsadc,
 |  | IfxEdsadc_Edsadc_CarrierGenConfig * | config
 | ) |  |

Initialise the EDSADC carrier generator.

Parameters
edsadc | pointer to the EDSADC handle (it will be initialized by this function)
config | pointer to the EDSADC carrier configuration
Returns
None

Definition at line 107 of file IfxEdsadc_Edsadc.c.

◆ IfxEdsadc_Edsadc_initCombFilter()

IFX_EXTERN void IfxEdsadc_Edsadc_initCombFilter | ( | IfxEdsadc_Edsadc_Channel * | channel,
 |  | const IfxEdsadc_Edsadc_CombFilterConfig * | config
 | ) |  |

Initialises the comb filter.

Parameters
channel | Pointer to the EDSADC channel handle
config | pointer to the EDSADC comb filter configuration
Returns
None

Definition at line 299 of file IfxEdsadc_Edsadc.c.

Referenced by IfxEdsadc_Edsadc_initChannel().

◆ IfxEdsadc_Edsadc_initDemodulator()

IFX_EXTERN void IfxEdsadc_Edsadc_initDemodulator | ( | IfxEdsadc_Edsadc_Channel * | channel,
 |  | const IfxEdsadc_Edsadc_DemodulatorConfig * | config
 | ) |  |

Initialises the demodulator.

Parameters
channel | Pointer to the EDSADC channel handle
config | pointer to the EDSADC demodulator configuration
Returns
None

Definition at line 312 of file IfxEdsadc_Edsadc.c.

Referenced by IfxEdsadc_Edsadc_initChannel().

◆ IfxEdsadc_Edsadc_initFirFilter()

IFX_EXTERN void IfxEdsadc_Edsadc_initFirFilter | ( | IfxEdsadc_Edsadc_Channel * | channel,
 |  | const IfxEdsadc_Edsadc_FirFilterConfig * | config
 | ) |  |

Initialises the fir filter.

Parameters
channel | Pointer to the EDSADC channel handle
config | pointer to the EDSADC fir filter configuration
Returns
None

Definition at line 336 of file IfxEdsadc_Edsadc.c.

Referenced by IfxEdsadc_Edsadc_initChannel().

◆ IfxEdsadc_Edsadc_initIntegrator()

IFX_EXTERN void IfxEdsadc_Edsadc_initIntegrator | ( | IfxEdsadc_Edsadc_Channel * | channel,
 |  | const IfxEdsadc_Edsadc_IntegratorConfig * | config
 | ) |  |

Initialises the integrator.

Parameters
channel | Pointer to the EDSADC channel handle
config | pointer to the EDSADC fir integrator configuration
Returns
None

Definition at line 364 of file IfxEdsadc_Edsadc.c.

Referenced by IfxEdsadc_Edsadc_initChannel().

◆ IfxEdsadc_Edsadc_initModulator()

IFX_EXTERN void IfxEdsadc_Edsadc_initModulator | ( | IfxEdsadc_Edsadc_Channel * | channel,
 |  | const IfxEdsadc_Edsadc_ModulatorConfig * | config
 | ) |  |

Initialises the modulator.

Parameters
channel | Pointer to the EDSADC channel handle
config | pointer to the EDSADC modulator configuration
Returns
None

Definition at line 381 of file IfxEdsadc_Edsadc.c.

Referenced by IfxEdsadc_Edsadc_initChannel().

◆ IfxEdsadc_Edsadc_initModule()

IFX_EXTERN void IfxEdsadc_Edsadc_initModule | ( | IfxEdsadc_Edsadc * | edsadc,
 |  | IfxEdsadc_Edsadc_Config * | config
 | ) |  |

Initialise the EDSADC with the supplied configuration.

Parameters
edsadc | pointer to the EDSADC handle (it will be initialized by this function)
config | pointer to the EDSADC module configuration
Returns
None

A coding example can be found in How to use the EDSADC Interface driver?

Definition at line 408 of file IfxEdsadc_Edsadc.c.

◆ IfxEdsadc_Edsadc_initModuleConfig()

IFX_EXTERN void IfxEdsadc_Edsadc_initModuleConfig | ( | IfxEdsadc_Edsadc_Config * | config,
 |  | Ifx_EDSADC * | edsadc
 | ) |  |

Initialise the config struct with default EDSADC configuration.

Parameters
config | pointer to the EDSADC module configuration
edsadc | base address of the EDSADC register space
Returns
None

A coding example can be found in How to use the EDSADC Interface driver?

Definition at line 442 of file IfxEdsadc_Edsadc.c.

◆ IfxEdsadc_Edsadc_initRectifier()

IFX_EXTERN void IfxEdsadc_Edsadc_initRectifier | ( | IfxEdsadc_Edsadc_Channel * | channel,
 |  | const IfxEdsadc_Edsadc_RectifierConfig * | config
 | ) |  |

Initialises the rectifier.

Parameters
channel | Pointer to the EDSADC channel handle
config | pointer to the EDSADC fir rectifier configuration
Returns
None

Definition at line 455 of file IfxEdsadc_Edsadc.c.

Referenced by IfxEdsadc_Edsadc_initChannel().


iLLD_TC38A: Channel Functions

Functions
Channel Functions
iLLD » EDSADC » EDSADC
Collaboration diagram for Channel Functions:

Functions

IFX_EXTERN void | IfxEdsadc_Edsadc_initChannel (IfxEdsadc_Edsadc_Channel *channel, const IfxEdsadc_Edsadc_ChannelConfig *config)
Initialise a EDSADC channel with the supplied configuration. More...
IFX_EXTERN void | IfxEdsadc_Edsadc_initChannelConfig (IfxEdsadc_Edsadc_ChannelConfig *config, IfxEdsadc_Edsadc *edsadc)
Initialise the config struct with default EDSADC channel configuration. More...

Detailed Description

Function Documentation

◆ IfxEdsadc_Edsadc_initChannel()

IFX_EXTERN void IfxEdsadc_Edsadc_initChannel | ( | IfxEdsadc_Edsadc_Channel * | channel,
 |  | const IfxEdsadc_Edsadc_ChannelConfig * | config
 | ) |  |

Initialise a EDSADC channel with the supplied configuration.

Parameters
channel | pointer to the EDSADC channel handle (it will be initialized by this function)
config | pointer to the EDSADCChannel configuration
Returns
None

A coding example can be found in How to use the EDSADC Interface driver?

Definition at line 138 of file IfxEdsadc_Edsadc.c.

◆ IfxEdsadc_Edsadc_initChannelConfig()

IFX_EXTERN void IfxEdsadc_Edsadc_initChannelConfig | ( | IfxEdsadc_Edsadc_ChannelConfig * | config,
 |  | IfxEdsadc_Edsadc * | edsadc
 | ) |  |

Initialise the config struct with default EDSADC channel configuration.

Parameters
config | pointer to the EDSADC Channel configuration (it will be initialized by this function)
edsadc | pointer to the EDSADC handle
Returns
None

A coding example can be found in How to use the EDSADC Interface driver?

Definition at line 201 of file IfxEdsadc_Edsadc.c.


iLLD_TC38A: Operative Functions

Functions
Operative Functions
iLLD » EDSADC » EDSADC
Collaboration diagram for Operative Functions:

Functions

IFX_INLINE void | IfxEdsadc_Edsadc_startScan (IfxEdsadc_Edsadc *edsadc, uint32 modulatorMask, uint32 channelMask)
Enables the conversion of multiple channels. More...
IFX_INLINE void | IfxEdsadc_Edsadc_stopScan (IfxEdsadc_Edsadc *edsadc, uint32 modulatorMask)
Disables the conversion of multiple channels. More...

Detailed Description

Function Documentation

◆ IfxEdsadc_Edsadc_startScan()

IFX_INLINE void IfxEdsadc_Edsadc_startScan | ( | IfxEdsadc_Edsadc * | edsadc,
 |  | uint32 | modulatorMask,
 |  | uint32 | channelMask
 | ) |  |

Enables the conversion of multiple channels.

Parameters
edsadc | EDSADC handle
modulatorMask | the modulator which should be running (bitwise selection)
channelMask | the channels which should be scanned (bitwise selection)
Returns
None

A coding example can be found in How to use the EDSADC Interface driver?

Definition at line 622 of file IfxEdsadc_Edsadc.h.

◆ IfxEdsadc_Edsadc_stopScan()

IFX_INLINE void IfxEdsadc_Edsadc_stopScan | ( | IfxEdsadc_Edsadc * | edsadc,
 |  | uint32 | modulatorMask
 | ) |  |

Disables the conversion of multiple channels.

Parameters
edsadc | Pointer to the EDSADC handle
modulatorMask | the modulator which should be running (bitwise selection)
Returns
None

A coding example can be found in How to use the EDSADC Interface driver?

Definition at line 628 of file IfxEdsadc_Edsadc.h.


iLLD_TC38A: Result Functions

Functions
Result Functions
iLLD » EDSADC » EDSADC
Collaboration diagram for Result Functions:

Functions

IFX_INLINE sint16 | IfxEdsadc_Edsadc_getMainResult (IfxEdsadc_Edsadc_Channel *channel)
Get result from the main chain. More...
IFX_INLINE sint32 | IfxEdsadc_Edsadc_getSubsequentResult (IfxEdsadc_Edsadc_Channel *channel)
give the subsequent result More...

Detailed Description

Function Documentation

◆ IfxEdsadc_Edsadc_getMainResult()

IFX_INLINE sint16 IfxEdsadc_Edsadc_getMainResult ( IfxEdsadc_Edsadc_Channel * channel )

Get result from the main chain.

Parameters
channel Pointer to the EDSADC channel handle
Returns
result from the main chain

A coding example can be found in How to use the EDSADC Interface driver?

Definition at line 604 of file IfxEdsadc_Edsadc.h.

◆ IfxEdsadc_Edsadc_getSubsequentResult()

IFX_INLINE sint32 IfxEdsadc_Edsadc_getSubsequentResult ( IfxEdsadc_Edsadc_Channel * channel )

give the subsequent result

Parameters
channel channel ID
Returns
return the Subsequent Result

Definition at line 616 of file IfxEdsadc_Edsadc.h.


iLLD_TC38A: Interrupt Functions

Functions
Interrupt Functions
iLLD » EDSADC » EDSADC
Collaboration diagram for Interrupt Functions:

Functions

IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEdsadc_Edsadc_getAuxSrc (IfxEdsadc_Edsadc_Channel *channel)
Get the interrupt source register for a Aux event. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEdsadc_Edsadc_getMainSrc (IfxEdsadc_Edsadc_Channel *channel)
Get the interrupt source register for a Main event. More...

Detailed Description

Function Documentation

◆ IfxEdsadc_Edsadc_getAuxSrc()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxEdsadc_Edsadc_getAuxSrc ( IfxEdsadc_Edsadc_Channel * channel )

Get the interrupt source register for a Aux event.

Parameters
channel Pointer to the EDSADC channel handle
Returns
Address/pointer to the interrupt source register

Definition at line 598 of file IfxEdsadc_Edsadc.h.

◆ IfxEdsadc_Edsadc_getMainSrc()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxEdsadc_Edsadc_getMainSrc ( IfxEdsadc_Edsadc_Channel * channel )

Get the interrupt source register for a Main event.

Parameters
channel Pointer to the EDSADC channel handle
Returns
Address/pointer to the interrupt source register

Definition at line 610 of file IfxEdsadc_Edsadc.h.


iLLD_TC38A: IfxEdsadc_cfg.h File Reference

  • _Impl
Macros | Enumerations
IfxEdsadc_cfg.h File Reference
iLLD » EDSADC

EDSADC on-chip implementation data. More...

Go to the source code of this file.

Macros

#define | IFXEDSADC_NUM_CHANNELS 10
#define | IFXEDSADC_NUM_MODULES (1)

Enumerations

enum IfxEdsadc_ChannelId {
IfxEdsadc_ChannelId_0 = 0,
IfxEdsadc_ChannelId_1 = 1,
IfxEdsadc_ChannelId_2 = 2,
IfxEdsadc_ChannelId_3 = 3,
IfxEdsadc_ChannelId_4 = 4,
IfxEdsadc_ChannelId_5 = 5,
IfxEdsadc_ChannelId_6 = 6,
IfxEdsadc_ChannelId_7 = 7,
IfxEdsadc_ChannelId_8 = 8,
IfxEdsadc_ChannelId_9 = 9
}
Specifies the channel Index. More...

Detailed Description

EDSADC on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxEdsadc_cfg.h.

Macro Definition Documentation

◆ IFXEDSADC_NUM_CHANNELS

#define IFXEDSADC_NUM_CHANNELS 10

Definition at line 60 of file IfxEdsadc_cfg.h.

◆ IFXEDSADC_NUM_MODULES

#define IFXEDSADC_NUM_MODULES (1)

Definition at line 62 of file IfxEdsadc_cfg.h.

Enumeration Type Documentation

◆ IfxEdsadc_ChannelId

enum IfxEdsadc_ChannelId

Specifies the channel Index.

Enumerator
IfxEdsadc_ChannelId_0 | Specifies the channel Index 0.
IfxEdsadc_ChannelId_1 | Specifies the channel Index 1.
IfxEdsadc_ChannelId_2 | Specifies the channel Index 2.
IfxEdsadc_ChannelId_3 | Specifies the channel Index 3.
IfxEdsadc_ChannelId_4 | Specifies the channel Index 4.
IfxEdsadc_ChannelId_5 | Specifies the channel Index 5.
IfxEdsadc_ChannelId_6 | Specifies the channel Index 6.
IfxEdsadc_ChannelId_7 | Specifies the channel Index 7.
IfxEdsadc_ChannelId_8 | Specifies the channel Index 8.
IfxEdsadc_ChannelId_9 | Specifies the channel Index 9.

Definition at line 70 of file IfxEdsadc_cfg.h.


iLLD_TC38A: IfxEdsadc_PinMap.c File Reference

  • _PinMap
Variables
IfxEdsadc_PinMap.c File Reference
iLLD » EDSADC

EDSADC I/O map. More...

#include "IfxEdsadc_PinMap.h"
Include dependency graph for IfxEdsadc_PinMap.c:

Go to the source code of this file.

Variables

IfxEdsadc_Cgpwm_Out | IfxEdsadc_CGPWMN_P00_5_OUT = {&MODULE_EDSADC, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt2}
IfxEdsadc_Cgpwm_Out | IfxEdsadc_CGPWMN_P02_0_OUT = {&MODULE_EDSADC, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt4}
IfxEdsadc_Cgpwm_Out | IfxEdsadc_CGPWMN_P33_11_OUT = {&MODULE_EDSADC, {&MODULE_P33,11}, IfxPort_OutputIdx_alt6}
IfxEdsadc_Cgpwm_Out | IfxEdsadc_CGPWMP_P00_6_OUT = {&MODULE_EDSADC, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt2}
IfxEdsadc_Cgpwm_Out | IfxEdsadc_CGPWMP_P02_1_OUT = {&MODULE_EDSADC, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt4}
IfxEdsadc_Cgpwm_Out | IfxEdsadc_CGPWMP_P33_12_OUT = {&MODULE_EDSADC, {&MODULE_P33,12}, IfxPort_OutputIdx_alt6}
IfxEdsadc_Dscin_In | IfxEdsadc_DSCIN0A_P00_11_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_0, {&MODULE_P00,11}, Ifx_RxSel_a}
IfxEdsadc_Dscin_In | IfxEdsadc_DSCIN0B_P33_5_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_0, {&MODULE_P33, 5}, Ifx_RxSel_b}
IfxEdsadc_Dscin_In | IfxEdsadc_DSCIN1A_P00_9_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_1, {&MODULE_P00, 9}, Ifx_RxSel_a}
IfxEdsadc_Dscin_In | IfxEdsadc_DSCIN1B_P33_3_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_1, {&MODULE_P33, 3}, Ifx_RxSel_b}
IfxEdsadc_Dscin_In | IfxEdsadc_DSCIN2A_P00_5_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_2, {&MODULE_P00, 5}, Ifx_RxSel_a}
IfxEdsadc_Dscin_In | IfxEdsadc_DSCIN2B_P33_1_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_2, {&MODULE_P33, 1}, Ifx_RxSel_b}
IfxEdsadc_Dscin_In | IfxEdsadc_DSCIN3A_P00_3_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_3, {&MODULE_P00, 3}, Ifx_RxSel_a}
IfxEdsadc_Dscin_In | IfxEdsadc_DSCIN3B_P02_7_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_3, {&MODULE_P02, 7}, Ifx_RxSel_b}
IfxEdsadc_Dscin_In | IfxEdsadc_DSCIN4A_P00_7_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_4, {&MODULE_P00, 7}, Ifx_RxSel_a}
IfxEdsadc_Dscin_In | IfxEdsadc_DSCIN4B_P02_5_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_4, {&MODULE_P02, 5}, Ifx_RxSel_b}
IfxEdsadc_Dscin_In | IfxEdsadc_DSCIN5A_P00_1_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_5, {&MODULE_P00, 1}, Ifx_RxSel_a}
IfxEdsadc_Dscin_In | IfxEdsadc_DSCIN5B_P02_3_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_5, {&MODULE_P02, 3}, Ifx_RxSel_b}
IfxEdsadc_Dscin_In | IfxEdsadc_DSCIN6A_P00_14_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_6, {&MODULE_P00,14}, Ifx_RxSel_a}
IfxEdsadc_Dscin_In | IfxEdsadc_DSCIN7A_P01_2_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_7, {&MODULE_P01, 2}, Ifx_RxSel_a}
IfxEdsadc_Dscin_In | IfxEdsadc_DSCIN7B_P00_1_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_7, {&MODULE_P00, 1}, Ifx_RxSel_b}
IfxEdsadc_Dscin_In | IfxEdsadc_DSCIN8A_P01_5_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_8, {&MODULE_P01, 5}, Ifx_RxSel_a}
IfxEdsadc_Dscin_In | IfxEdsadc_DSCIN9A_P01_9_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_9, {&MODULE_P01, 9}, Ifx_RxSel_a}
IfxEdsadc_Dscout_Out | IfxEdsadc_DSCOUT0_P00_11_OUT = {&MODULE_EDSADC, IfxEdsadc_ChannelId_0, {&MODULE_P00,11}, IfxPort_OutputIdx_alt4}
IfxEdsadc_Dscout_Out | IfxEdsadc_DSCOUT0_P33_5_OUT = {&MODULE_EDSADC, IfxEdsadc_ChannelId_0, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt4}
IfxEdsadc_Dscout_Out | IfxEdsadc_DSCOUT1_P00_9_OUT = {&MODULE_EDSADC, IfxEdsadc_ChannelId_1, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt4}
IfxEdsadc_Dscout_Out | IfxEdsadc_DSCOUT1_P33_3_OUT = {&MODULE_EDSADC, IfxEdsadc_ChannelId_1, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt4}
IfxEdsadc_Dscout_Out | IfxEdsadc_DSCOUT2_P00_5_OUT = {&MODULE_EDSADC, IfxEdsadc_ChannelId_2, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt4}
IfxEdsadc_Dscout_Out | IfxEdsadc_DSCOUT2_P33_1_OUT = {&MODULE_EDSADC, IfxEdsadc_ChannelId_2, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt4}
IfxEdsadc_Dscout_Out | IfxEdsadc_DSCOUT3_P00_3_OUT = {&MODULE_EDSADC, IfxEdsadc_ChannelId_3, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt4}
IfxEdsadc_Dscout_Out | IfxEdsadc_DSCOUT3_P02_7_OUT = {&MODULE_EDSADC, IfxEdsadc_ChannelId_3, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt4}
IfxEdsadc_Dscout_Out | IfxEdsadc_DSCOUT4_P00_7_OUT = {&MODULE_EDSADC, IfxEdsadc_ChannelId_4, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt4}
IfxEdsadc_Dscout_Out | IfxEdsadc_DSCOUT4_P02_5_OUT = {&MODULE_EDSADC, IfxEdsadc_ChannelId_4, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt4}
IfxEdsadc_Dscout_Out | IfxEdsadc_DSCOUT5_P00_1_OUT = {&MODULE_EDSADC, IfxEdsadc_ChannelId_5, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt4}
IfxEdsadc_Dscout_Out | IfxEdsadc_DSCOUT5_P02_3_OUT = {&MODULE_EDSADC, IfxEdsadc_ChannelId_5, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt4}
IfxEdsadc_Dscout_Out | IfxEdsadc_DSCOUT6_P00_14_OUT = {&MODULE_EDSADC, IfxEdsadc_ChannelId_6, {&MODULE_P00,14}, IfxPort_OutputIdx_alt4}
IfxEdsadc_Dscout_Out | IfxEdsadc_DSCOUT7_P00_1_OUT = {&MODULE_EDSADC, IfxEdsadc_ChannelId_7, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt5}
IfxEdsadc_Dscout_Out | IfxEdsadc_DSCOUT7_P01_2_OUT = {&MODULE_EDSADC, IfxEdsadc_ChannelId_7, {&MODULE_P01, 2}, IfxPort_OutputIdx_alt6}
IfxEdsadc_Dscout_Out | IfxEdsadc_DSCOUT8_P01_5_OUT = {&MODULE_EDSADC, IfxEdsadc_ChannelId_8, {&MODULE_P01, 5}, IfxPort_OutputIdx_alt6}
IfxEdsadc_Dscout_Out | IfxEdsadc_DSCOUT9_P01_9_OUT = {&MODULE_EDSADC, IfxEdsadc_ChannelId_9, {&MODULE_P01, 9}, IfxPort_OutputIdx_alt6}
IfxEdsadc_Dsdin_In | IfxEdsadc_DSDIN0A_P00_12_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_0, {&MODULE_P00,12}, Ifx_RxSel_a}
IfxEdsadc_Dsdin_In | IfxEdsadc_DSDIN0B_P33_6_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_0, {&MODULE_P33, 6}, Ifx_RxSel_b}
IfxEdsadc_Dsdin_In | IfxEdsadc_DSDIN1A_P00_10_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_1, {&MODULE_P00,10}, Ifx_RxSel_a}
IfxEdsadc_Dsdin_In | IfxEdsadc_DSDIN1B_P33_4_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_1, {&MODULE_P33, 4}, Ifx_RxSel_b}
IfxEdsadc_Dsdin_In | IfxEdsadc_DSDIN2A_P00_6_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_2, {&MODULE_P00, 6}, Ifx_RxSel_a}
IfxEdsadc_Dsdin_In | IfxEdsadc_DSDIN2B_P33_2_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_2, {&MODULE_P33, 2}, Ifx_RxSel_b}
IfxEdsadc_Dsdin_In | IfxEdsadc_DSDIN3A_P00_4_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_3, {&MODULE_P00, 4}, Ifx_RxSel_a}
IfxEdsadc_Dsdin_In | IfxEdsadc_DSDIN3B_P02_8_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_3, {&MODULE_P02, 8}, Ifx_RxSel_b}
IfxEdsadc_Dsdin_In | IfxEdsadc_DSDIN4A_P00_8_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_4, {&MODULE_P00, 8}, Ifx_RxSel_a}
IfxEdsadc_Dsdin_In | IfxEdsadc_DSDIN4B_P02_6_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_4, {&MODULE_P02, 6}, Ifx_RxSel_b}
IfxEdsadc_Dsdin_In | IfxEdsadc_DSDIN5A_P00_2_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_5, {&MODULE_P00, 2}, Ifx_RxSel_a}
IfxEdsadc_Dsdin_In | IfxEdsadc_DSDIN5B_P02_4_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_5, {&MODULE_P02, 4}, Ifx_RxSel_b}
IfxEdsadc_Dsdin_In | IfxEdsadc_DSDIN6A_P00_13_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_6, {&MODULE_P00,13}, Ifx_RxSel_a}
IfxEdsadc_Dsdin_In | IfxEdsadc_DSDIN7A_P01_15_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_7, {&MODULE_P01,15}, Ifx_RxSel_a}
IfxEdsadc_Dsdin_In | IfxEdsadc_DSDIN7B_P00_2_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_7, {&MODULE_P00, 2}, Ifx_RxSel_b}
IfxEdsadc_Dsdin_In | IfxEdsadc_DSDIN8A_P01_6_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_8, {&MODULE_P01, 6}, Ifx_RxSel_a}
IfxEdsadc_Dsdin_In | IfxEdsadc_DSDIN9A_P01_8_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_9, {&MODULE_P01, 8}, Ifx_RxSel_a}
IfxEdsadc_Dsn_In | IfxEdsadc_DS0NA_AN3_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_0, {NULL_PTR, 3}, Ifx_RxSel_a}
IfxEdsadc_Dsn_In | IfxEdsadc_DS0NB_AN13_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_0, {NULL_PTR,13}, Ifx_RxSel_b}
IfxEdsadc_Dsn_In | IfxEdsadc_DS1NA_P40_7_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_1, {&MODULE_P40, 7}, Ifx_RxSel_a}
IfxEdsadc_Dsn_In | IfxEdsadc_DS1NB_P40_9_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_1, {&MODULE_P40, 9}, Ifx_RxSel_b}
IfxEdsadc_Dsn_In | IfxEdsadc_DS1NC_AN45_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_1, {NULL_PTR,45}, Ifx_RxSel_c}
IfxEdsadc_Dsn_In | IfxEdsadc_DS1ND_AN47_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_1, {NULL_PTR,47}, Ifx_RxSel_d}
IfxEdsadc_Dsn_In | IfxEdsadc_DS2NA_AN21_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_2, {NULL_PTR,21}, Ifx_RxSel_a}
IfxEdsadc_Dsn_In | IfxEdsadc_DS2NB_P40_1_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_2, {&MODULE_P40, 1}, Ifx_RxSel_b}
IfxEdsadc_Dsn_In | IfxEdsadc_DS3NA_AN1_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_3, {NULL_PTR, 1}, Ifx_RxSel_a}
IfxEdsadc_Dsn_In | IfxEdsadc_DS3NB_AN15_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_3, {NULL_PTR,15}, Ifx_RxSel_b}
IfxEdsadc_Dsn_In | IfxEdsadc_DS4NA_P00_7_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_4, {&MODULE_P00, 7}, Ifx_RxSel_a}
IfxEdsadc_Dsn_In | IfxEdsadc_DS4NB_P00_9_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_4, {&MODULE_P00, 9}, Ifx_RxSel_b}
IfxEdsadc_Dsn_In | IfxEdsadc_DS5NA_P00_1_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_5, {&MODULE_P00, 1}, Ifx_RxSel_a}
IfxEdsadc_Dsn_In | IfxEdsadc_DS5NB_P00_3_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_5, {&MODULE_P00, 3}, Ifx_RxSel_b}
IfxEdsadc_Dsn_In | IfxEdsadc_DS6NA_AN53_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_6, {NULL_PTR,53}, Ifx_RxSel_a}
IfxEdsadc_Dsn_In | IfxEdsadc_DS6NB_P41_5_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_6, {&MODULE_P41, 5}, Ifx_RxSel_b}
IfxEdsadc_Dsn_In | IfxEdsadc_DS7NA_AN61_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_7, {NULL_PTR,61}, Ifx_RxSel_a}
IfxEdsadc_Dsn_In | IfxEdsadc_DS7NB_P41_7_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_7, {&MODULE_P41, 7}, Ifx_RxSel_b}
IfxEdsadc_Dsn_In | IfxEdsadc_DS8NA_P41_1_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_8, {&MODULE_P41, 1}, Ifx_RxSel_a}
IfxEdsadc_Dsn_In | IfxEdsadc_DS9NA_AN51_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_9, {NULL_PTR,51}, Ifx_RxSel_a}
IfxEdsadc_Dsn_In | IfxEdsadc_DS9NB_P41_3_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_9, {&MODULE_P41, 3}, Ifx_RxSel_b}
IfxEdsadc_Dsp_In | IfxEdsadc_DS0PA_AN2_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_0, {NULL_PTR, 2}, Ifx_RxSel_a}
IfxEdsadc_Dsp_In | IfxEdsadc_DS0PB_AN12_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_0, {NULL_PTR,12}, Ifx_RxSel_b}
IfxEdsadc_Dsp_In | IfxEdsadc_DS1PA_P40_6_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_1, {&MODULE_P40, 6}, Ifx_RxSel_a}
IfxEdsadc_Dsp_In | IfxEdsadc_DS1PB_P40_8_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_1, {&MODULE_P40, 8}, Ifx_RxSel_b}
IfxEdsadc_Dsp_In | IfxEdsadc_DS1PC_AN44_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_1, {NULL_PTR,44}, Ifx_RxSel_c}
IfxEdsadc_Dsp_In | IfxEdsadc_DS1PD_AN46_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_1, {NULL_PTR,46}, Ifx_RxSel_d}
IfxEdsadc_Dsp_In | IfxEdsadc_DS2PA_AN20_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_2, {NULL_PTR,20}, Ifx_RxSel_a}
IfxEdsadc_Dsp_In | IfxEdsadc_DS2PB_P40_0_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_2, {&MODULE_P40, 0}, Ifx_RxSel_b}
IfxEdsadc_Dsp_In | IfxEdsadc_DS3PA_AN0_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_3, {NULL_PTR, 0}, Ifx_RxSel_a}
IfxEdsadc_Dsp_In | IfxEdsadc_DS3PB_AN14_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_3, {NULL_PTR,14}, Ifx_RxSel_b}
IfxEdsadc_Dsp_In | IfxEdsadc_DS4PA_P00_8_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_4, {&MODULE_P00, 8}, Ifx_RxSel_a}
IfxEdsadc_Dsp_In | IfxEdsadc_DS4PB_P00_10_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_4, {&MODULE_P00,10}, Ifx_RxSel_b}
IfxEdsadc_Dsp_In | IfxEdsadc_DS5PA_P00_2_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_5, {&MODULE_P00, 2}, Ifx_RxSel_a}
IfxEdsadc_Dsp_In | IfxEdsadc_DS5PB_P00_4_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_5, {&MODULE_P00, 4}, Ifx_RxSel_b}
IfxEdsadc_Dsp_In | IfxEdsadc_DS6PA_AN52_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_6, {NULL_PTR,52}, Ifx_RxSel_a}
IfxEdsadc_Dsp_In | IfxEdsadc_DS6PB_P41_4_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_6, {&MODULE_P41, 4}, Ifx_RxSel_b}
IfxEdsadc_Dsp_In | IfxEdsadc_DS7PA_AN60_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_7, {NULL_PTR,60}, Ifx_RxSel_a}
IfxEdsadc_Dsp_In | IfxEdsadc_DS7PB_P41_6_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_7, {&MODULE_P41, 6}, Ifx_RxSel_b}
IfxEdsadc_Dsp_In | IfxEdsadc_DS8PA_P41_0_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_8, {&MODULE_P41, 0}, Ifx_RxSel_a}
IfxEdsadc_Dsp_In | IfxEdsadc_DS9PA_AN50_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_9, {NULL_PTR,50}, Ifx_RxSel_a}
IfxEdsadc_Dsp_In | IfxEdsadc_DS9PB_P41_2_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_9, {&MODULE_P41, 2}, Ifx_RxSel_b}
IfxEdsadc_Itr_In | IfxEdsadc_ITR0E_P33_0_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_0, {&MODULE_P33, 0}, Ifx_RxSel_e}
IfxEdsadc_Itr_In | IfxEdsadc_ITR0F_P33_4_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_0, {&MODULE_P33, 4}, Ifx_RxSel_f}
IfxEdsadc_Itr_In | IfxEdsadc_ITR1E_P33_1_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_1, {&MODULE_P33, 1}, Ifx_RxSel_e}
IfxEdsadc_Itr_In | IfxEdsadc_ITR1F_P33_5_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_1, {&MODULE_P33, 5}, Ifx_RxSel_f}
IfxEdsadc_Itr_In | IfxEdsadc_ITR2E_P33_2_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_2, {&MODULE_P33, 2}, Ifx_RxSel_e}
IfxEdsadc_Itr_In | IfxEdsadc_ITR2F_P33_6_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_2, {&MODULE_P33, 6}, Ifx_RxSel_f}
IfxEdsadc_Itr_In | IfxEdsadc_ITR3E_P02_8_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_3, {&MODULE_P02, 8}, Ifx_RxSel_e}
IfxEdsadc_Itr_In | IfxEdsadc_ITR3F_P00_9_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_3, {&MODULE_P00, 9}, Ifx_RxSel_f}
IfxEdsadc_Itr_In | IfxEdsadc_ITR4E_P02_7_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_4, {&MODULE_P02, 7}, Ifx_RxSel_e}
IfxEdsadc_Itr_In | IfxEdsadc_ITR4F_P00_6_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_4, {&MODULE_P00, 6}, Ifx_RxSel_f}
IfxEdsadc_Itr_In | IfxEdsadc_ITR5E_P02_6_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_5, {&MODULE_P02, 6}, Ifx_RxSel_e}
IfxEdsadc_Itr_In | IfxEdsadc_ITR5F_P00_3_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_5, {&MODULE_P00, 3}, Ifx_RxSel_f}
IfxEdsadc_Itr_In | IfxEdsadc_ITR6E_P01_0_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_6, {&MODULE_P01, 0}, Ifx_RxSel_e}
IfxEdsadc_Itr_In | IfxEdsadc_ITR6F_P00_15_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_6, {&MODULE_P00,15}, Ifx_RxSel_f}
IfxEdsadc_Itr_In | IfxEdsadc_ITR7E_P01_4_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_7, {&MODULE_P01, 4}, Ifx_RxSel_e}
IfxEdsadc_Itr_In | IfxEdsadc_ITR7F_P01_3_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_7, {&MODULE_P01, 3}, Ifx_RxSel_f}
IfxEdsadc_Itr_In | IfxEdsadc_ITR8E_P01_1_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_8, {&MODULE_P01, 1}, Ifx_RxSel_e}
IfxEdsadc_Itr_In | IfxEdsadc_ITR8F_P01_7_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_8, {&MODULE_P01, 7}, Ifx_RxSel_f}
IfxEdsadc_Itr_In | IfxEdsadc_ITR9E_P01_11_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_9, {&MODULE_P01,11}, Ifx_RxSel_e}
IfxEdsadc_Itr_In | IfxEdsadc_ITR9F_P01_10_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_9, {&MODULE_P01,10}, Ifx_RxSel_f}
IfxEdsadc_Sg_In | IfxEdsadc_SGNA_P00_4_IN = {&MODULE_EDSADC, {&MODULE_P00, 4}, Ifx_RxSel_a}
IfxEdsadc_Sg_In | IfxEdsadc_SGNB_P33_13_IN = {&MODULE_EDSADC, {&MODULE_P33,13}, Ifx_RxSel_b}
const IfxEdsadc_Cgpwm_Out * | IfxEdsadc_Cgpwm_Out_pinTable [IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS]
const IfxEdsadc_Dscin_In * | IfxEdsadc_Dscin_In_pinTable [IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_DSCIN_IN_NUM_ITEMS]
const IfxEdsadc_Dscout_Out * | IfxEdsadc_Dscout_Out_pinTable [IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_DSCOUT_OUT_NUM_ITEMS]
const IfxEdsadc_Dsdin_In * | IfxEdsadc_Dsdin_In_pinTable [IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_DSDIN_IN_NUM_ITEMS]
const IfxEdsadc_Dsn_In * | IfxEdsadc_Dsn_In_pinTable [IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_DSN_IN_NUM_ITEMS]
const IfxEdsadc_Dsp_In * | IfxEdsadc_Dsp_In_pinTable [IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_DSP_IN_NUM_ITEMS]
const IfxEdsadc_Itr_In * | IfxEdsadc_Itr_In_pinTable [IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_ITR_IN_NUM_ITEMS]
const IfxEdsadc_Sg_In * | IfxEdsadc_Sg_In_pinTable [IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_SG_IN_NUM_ITEMS]

Detailed Description

EDSADC I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxEdsadc_PinMap.c.

Variable Documentation

◆ IfxEdsadc_Cgpwm_Out_pinTable

const IfxEdsadc_Cgpwm_Out* IfxEdsadc_Cgpwm_Out_pinTable[IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxEdsadc_CGPWMN_P00_5_OUT,
&IfxEdsadc_CGPWMP_P00_6_OUT,
&IfxEdsadc_CGPWMN_P02_0_OUT,
&IfxEdsadc_CGPWMP_P02_1_OUT,
&IfxEdsadc_CGPWMN_P33_11_OUT,
&IfxEdsadc_CGPWMP_P33_12_OUT
}
}
IfxEdsadc_CGPWMN_P02_0_OUT
IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMN_P02_0_OUT
Definition: IfxEdsadc_PinMap.c:46
IfxEdsadc_CGPWMP_P33_12_OUT
IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMP_P33_12_OUT
Definition: IfxEdsadc_PinMap.c:50
IfxEdsadc_CGPWMN_P00_5_OUT
IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMN_P00_5_OUT
Definition: IfxEdsadc_PinMap.c:45
IfxEdsadc_CGPWMN_P33_11_OUT
IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMN_P33_11_OUT
Definition: IfxEdsadc_PinMap.c:47
IfxEdsadc_CGPWMP_P02_1_OUT
IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMP_P02_1_OUT
Definition: IfxEdsadc_PinMap.c:49
IfxEdsadc_CGPWMP_P00_6_OUT
IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMP_P00_6_OUT
Definition: IfxEdsadc_PinMap.c:48

Definition at line 168 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_CGPWMN_P00_5_OUT

IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMN_P00_5_OUT = {&MODULE_EDSADC, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt2}

Definition at line 45 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_CGPWMN_P02_0_OUT

IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMN_P02_0_OUT = {&MODULE_EDSADC, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt4}

Definition at line 46 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_CGPWMN_P33_11_OUT

IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMN_P33_11_OUT = {&MODULE_EDSADC, {&MODULE_P33,11}, IfxPort_OutputIdx_alt6}

Definition at line 47 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_CGPWMP_P00_6_OUT

IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMP_P00_6_OUT = {&MODULE_EDSADC, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt2}

Definition at line 48 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_CGPWMP_P02_1_OUT

IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMP_P02_1_OUT = {&MODULE_EDSADC, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt4}

Definition at line 49 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_CGPWMP_P33_12_OUT

IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMP_P33_12_OUT = {&MODULE_EDSADC, {&MODULE_P33,12}, IfxPort_OutputIdx_alt6}

Definition at line 50 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DS0NA_AN3_IN

IfxEdsadc_Dsn_In IfxEdsadc_DS0NA_AN3_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_0, {NULL_PTR, 3}, Ifx_RxSel_a}

Definition at line 102 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DS0NB_AN13_IN

IfxEdsadc_Dsn_In IfxEdsadc_DS0NB_AN13_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_0, {NULL_PTR,13}, Ifx_RxSel_b}

Definition at line 103 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DS0PA_AN2_IN

IfxEdsadc_Dsp_In IfxEdsadc_DS0PA_AN2_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_0, {NULL_PTR, 2}, Ifx_RxSel_a}

Definition at line 123 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DS0PB_AN12_IN

IfxEdsadc_Dsp_In IfxEdsadc_DS0PB_AN12_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_0, {NULL_PTR,12}, Ifx_RxSel_b}

Definition at line 124 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DS1NA_P40_7_IN

IfxEdsadc_Dsn_In IfxEdsadc_DS1NA_P40_7_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_1, {&MODULE_P40, 7}, Ifx_RxSel_a}

Definition at line 104 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DS1NB_P40_9_IN

IfxEdsadc_Dsn_In IfxEdsadc_DS1NB_P40_9_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_1, {&MODULE_P40, 9}, Ifx_RxSel_b}

Definition at line 105 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DS1NC_AN45_IN

IfxEdsadc_Dsn_In IfxEdsadc_DS1NC_AN45_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_1, {NULL_PTR,45}, Ifx_RxSel_c}

Definition at line 106 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DS1ND_AN47_IN

IfxEdsadc_Dsn_In IfxEdsadc_DS1ND_AN47_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_1, {NULL_PTR,47}, Ifx_RxSel_d}

Definition at line 107 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DS1PA_P40_6_IN

IfxEdsadc_Dsp_In IfxEdsadc_DS1PA_P40_6_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_1, {&MODULE_P40, 6}, Ifx_RxSel_a}

Definition at line 125 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DS1PB_P40_8_IN

IfxEdsadc_Dsp_In IfxEdsadc_DS1PB_P40_8_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_1, {&MODULE_P40, 8}, Ifx_RxSel_b}

Definition at line 126 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DS1PC_AN44_IN

IfxEdsadc_Dsp_In IfxEdsadc_DS1PC_AN44_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_1, {NULL_PTR,44}, Ifx_RxSel_c}

Definition at line 127 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DS1PD_AN46_IN

IfxEdsadc_Dsp_In IfxEdsadc_DS1PD_AN46_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_1, {NULL_PTR,46}, Ifx_RxSel_d}

Definition at line 128 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DS2NA_AN21_IN

IfxEdsadc_Dsn_In IfxEdsadc_DS2NA_AN21_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_2, {NULL_PTR,21}, Ifx_RxSel_a}

Definition at line 108 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DS2NB_P40_1_IN

IfxEdsadc_Dsn_In IfxEdsadc_DS2NB_P40_1_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_2, {&MODULE_P40, 1}, Ifx_RxSel_b}

Definition at line 109 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DS2PA_AN20_IN

IfxEdsadc_Dsp_In IfxEdsadc_DS2PA_AN20_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_2, {NULL_PTR,20}, Ifx_RxSel_a}

Definition at line 129 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DS2PB_P40_0_IN

IfxEdsadc_Dsp_In IfxEdsadc_DS2PB_P40_0_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_2, {&MODULE_P40, 0}, Ifx_RxSel_b}

Definition at line 130 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DS3NA_AN1_IN

IfxEdsadc_Dsn_In IfxEdsadc_DS3NA_AN1_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_3, {NULL_PTR, 1}, Ifx_RxSel_a}

Definition at line 110 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DS3NB_AN15_IN

IfxEdsadc_Dsn_In IfxEdsadc_DS3NB_AN15_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_3, {NULL_PTR,15}, Ifx_RxSel_b}

Definition at line 111 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DS3PA_AN0_IN

IfxEdsadc_Dsp_In IfxEdsadc_DS3PA_AN0_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_3, {NULL_PTR, 0}, Ifx_RxSel_a}

Definition at line 131 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DS3PB_AN14_IN

IfxEdsadc_Dsp_In IfxEdsadc_DS3PB_AN14_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_3, {NULL_PTR,14}, Ifx_RxSel_b}

Definition at line 132 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DS4NA_P00_7_IN

IfxEdsadc_Dsn_In IfxEdsadc_DS4NA_P00_7_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_4, {&MODULE_P00, 7}, Ifx_RxSel_a}

Definition at line 112 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DS4NB_P00_9_IN

IfxEdsadc_Dsn_In IfxEdsadc_DS4NB_P00_9_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_4, {&MODULE_P00, 9}, Ifx_RxSel_b}

Definition at line 113 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DS4PA_P00_8_IN

IfxEdsadc_Dsp_In IfxEdsadc_DS4PA_P00_8_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_4, {&MODULE_P00, 8}, Ifx_RxSel_a}

Definition at line 133 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DS4PB_P00_10_IN

IfxEdsadc_Dsp_In IfxEdsadc_DS4PB_P00_10_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_4, {&MODULE_P00,10}, Ifx_RxSel_b}

Definition at line 134 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DS5NA_P00_1_IN

IfxEdsadc_Dsn_In IfxEdsadc_DS5NA_P00_1_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_5, {&MODULE_P00, 1}, Ifx_RxSel_a}

Definition at line 114 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DS5NB_P00_3_IN

IfxEdsadc_Dsn_In IfxEdsadc_DS5NB_P00_3_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_5, {&MODULE_P00, 3}, Ifx_RxSel_b}

Definition at line 115 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DS5PA_P00_2_IN

IfxEdsadc_Dsp_In IfxEdsadc_DS5PA_P00_2_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_5, {&MODULE_P00, 2}, Ifx_RxSel_a}

Definition at line 135 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DS5PB_P00_4_IN

IfxEdsadc_Dsp_In IfxEdsadc_DS5PB_P00_4_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_5, {&MODULE_P00, 4}, Ifx_RxSel_b}

Definition at line 136 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DS6NA_AN53_IN

IfxEdsadc_Dsn_In IfxEdsadc_DS6NA_AN53_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_6, {NULL_PTR,53}, Ifx_RxSel_a}

Definition at line 116 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DS6NB_P41_5_IN

IfxEdsadc_Dsn_In IfxEdsadc_DS6NB_P41_5_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_6, {&MODULE_P41, 5}, Ifx_RxSel_b}

Definition at line 117 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DS6PA_AN52_IN

IfxEdsadc_Dsp_In IfxEdsadc_DS6PA_AN52_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_6, {NULL_PTR,52}, Ifx_RxSel_a}

Definition at line 137 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DS6PB_P41_4_IN

IfxEdsadc_Dsp_In IfxEdsadc_DS6PB_P41_4_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_6, {&MODULE_P41, 4}, Ifx_RxSel_b}

Definition at line 138 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DS7NA_AN61_IN

IfxEdsadc_Dsn_In IfxEdsadc_DS7NA_AN61_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_7, {NULL_PTR,61}, Ifx_RxSel_a}

Definition at line 118 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DS7NB_P41_7_IN

IfxEdsadc_Dsn_In IfxEdsadc_DS7NB_P41_7_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_7, {&MODULE_P41, 7}, Ifx_RxSel_b}

Definition at line 119 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DS7PA_AN60_IN

IfxEdsadc_Dsp_In IfxEdsadc_DS7PA_AN60_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_7, {NULL_PTR,60}, Ifx_RxSel_a}

Definition at line 139 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DS7PB_P41_6_IN

IfxEdsadc_Dsp_In IfxEdsadc_DS7PB_P41_6_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_7, {&MODULE_P41, 6}, Ifx_RxSel_b}

Definition at line 140 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DS8NA_P41_1_IN

IfxEdsadc_Dsn_In IfxEdsadc_DS8NA_P41_1_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_8, {&MODULE_P41, 1}, Ifx_RxSel_a}

Definition at line 120 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DS8PA_P41_0_IN

IfxEdsadc_Dsp_In IfxEdsadc_DS8PA_P41_0_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_8, {&MODULE_P41, 0}, Ifx_RxSel_a}

Definition at line 141 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DS9NA_AN51_IN

IfxEdsadc_Dsn_In IfxEdsadc_DS9NA_AN51_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_9, {NULL_PTR,51}, Ifx_RxSel_a}

Definition at line 121 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DS9NB_P41_3_IN

IfxEdsadc_Dsn_In IfxEdsadc_DS9NB_P41_3_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_9, {&MODULE_P41, 3}, Ifx_RxSel_b}

Definition at line 122 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DS9PA_AN50_IN

IfxEdsadc_Dsp_In IfxEdsadc_DS9PA_AN50_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_9, {NULL_PTR,50}, Ifx_RxSel_a}

Definition at line 142 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DS9PB_P41_2_IN

IfxEdsadc_Dsp_In IfxEdsadc_DS9PB_P41_2_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_9, {&MODULE_P41, 2}, Ifx_RxSel_b}

Definition at line 143 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DSCIN0A_P00_11_IN

IfxEdsadc_Dscin_In IfxEdsadc_DSCIN0A_P00_11_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_0, {&MODULE_P00,11}, Ifx_RxSel_a}

Definition at line 51 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DSCIN0B_P33_5_IN

IfxEdsadc_Dscin_In IfxEdsadc_DSCIN0B_P33_5_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_0, {&MODULE_P33, 5}, Ifx_RxSel_b}

Definition at line 52 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DSCIN1A_P00_9_IN

IfxEdsadc_Dscin_In IfxEdsadc_DSCIN1A_P00_9_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_1, {&MODULE_P00, 9}, Ifx_RxSel_a}

Definition at line 53 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DSCIN1B_P33_3_IN

IfxEdsadc_Dscin_In IfxEdsadc_DSCIN1B_P33_3_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_1, {&MODULE_P33, 3}, Ifx_RxSel_b}

Definition at line 54 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DSCIN2A_P00_5_IN

IfxEdsadc_Dscin_In IfxEdsadc_DSCIN2A_P00_5_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_2, {&MODULE_P00, 5}, Ifx_RxSel_a}

Definition at line 55 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DSCIN2B_P33_1_IN

IfxEdsadc_Dscin_In IfxEdsadc_DSCIN2B_P33_1_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_2, {&MODULE_P33, 1}, Ifx_RxSel_b}

Definition at line 56 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DSCIN3A_P00_3_IN

IfxEdsadc_Dscin_In IfxEdsadc_DSCIN3A_P00_3_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_3, {&MODULE_P00, 3}, Ifx_RxSel_a}

Definition at line 57 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DSCIN3B_P02_7_IN

IfxEdsadc_Dscin_In IfxEdsadc_DSCIN3B_P02_7_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_3, {&MODULE_P02, 7}, Ifx_RxSel_b}

Definition at line 58 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DSCIN4A_P00_7_IN

IfxEdsadc_Dscin_In IfxEdsadc_DSCIN4A_P00_7_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_4, {&MODULE_P00, 7}, Ifx_RxSel_a}

Definition at line 59 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DSCIN4B_P02_5_IN

IfxEdsadc_Dscin_In IfxEdsadc_DSCIN4B_P02_5_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_4, {&MODULE_P02, 5}, Ifx_RxSel_b}

Definition at line 60 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DSCIN5A_P00_1_IN

IfxEdsadc_Dscin_In IfxEdsadc_DSCIN5A_P00_1_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_5, {&MODULE_P00, 1}, Ifx_RxSel_a}

Definition at line 61 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DSCIN5B_P02_3_IN

IfxEdsadc_Dscin_In IfxEdsadc_DSCIN5B_P02_3_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_5, {&MODULE_P02, 3}, Ifx_RxSel_b}

Definition at line 62 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DSCIN6A_P00_14_IN

IfxEdsadc_Dscin_In IfxEdsadc_DSCIN6A_P00_14_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_6, {&MODULE_P00,14}, Ifx_RxSel_a}

Definition at line 63 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DSCIN7A_P01_2_IN

IfxEdsadc_Dscin_In IfxEdsadc_DSCIN7A_P01_2_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_7, {&MODULE_P01, 2}, Ifx_RxSel_a}

Definition at line 64 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DSCIN7B_P00_1_IN

IfxEdsadc_Dscin_In IfxEdsadc_DSCIN7B_P00_1_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_7, {&MODULE_P00, 1}, Ifx_RxSel_b}

Definition at line 65 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DSCIN8A_P01_5_IN

IfxEdsadc_Dscin_In IfxEdsadc_DSCIN8A_P01_5_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_8, {&MODULE_P01, 5}, Ifx_RxSel_a}

Definition at line 66 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DSCIN9A_P01_9_IN

IfxEdsadc_Dscin_In IfxEdsadc_DSCIN9A_P01_9_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_9, {&MODULE_P01, 9}, Ifx_RxSel_a}

Definition at line 67 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_Dscin_In_pinTable

const IfxEdsadc_Dscin_In* IfxEdsadc_Dscin_In_pinTable[IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_DSCIN_IN_NUM_ITEMS]

Definition at line 179 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DSCOUT0_P00_11_OUT

IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT0_P00_11_OUT = {&MODULE_EDSADC, IfxEdsadc_ChannelId_0, {&MODULE_P00,11}, IfxPort_OutputIdx_alt4}

Definition at line 68 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DSCOUT0_P33_5_OUT

IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT0_P33_5_OUT = {&MODULE_EDSADC, IfxEdsadc_ChannelId_0, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt4}

Definition at line 69 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DSCOUT1_P00_9_OUT

IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT1_P00_9_OUT = {&MODULE_EDSADC, IfxEdsadc_ChannelId_1, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt4}

Definition at line 70 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DSCOUT1_P33_3_OUT

IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT1_P33_3_OUT = {&MODULE_EDSADC, IfxEdsadc_ChannelId_1, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt4}

Definition at line 71 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DSCOUT2_P00_5_OUT

IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT2_P00_5_OUT = {&MODULE_EDSADC, IfxEdsadc_ChannelId_2, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt4}

Definition at line 72 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DSCOUT2_P33_1_OUT

IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT2_P33_1_OUT = {&MODULE_EDSADC, IfxEdsadc_ChannelId_2, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt4}

Definition at line 73 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DSCOUT3_P00_3_OUT

IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT3_P00_3_OUT = {&MODULE_EDSADC, IfxEdsadc_ChannelId_3, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt4}

Definition at line 74 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DSCOUT3_P02_7_OUT

IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT3_P02_7_OUT = {&MODULE_EDSADC, IfxEdsadc_ChannelId_3, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt4}

Definition at line 75 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DSCOUT4_P00_7_OUT

IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT4_P00_7_OUT = {&MODULE_EDSADC, IfxEdsadc_ChannelId_4, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt4}

Definition at line 76 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DSCOUT4_P02_5_OUT

IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT4_P02_5_OUT = {&MODULE_EDSADC, IfxEdsadc_ChannelId_4, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt4}

Definition at line 77 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DSCOUT5_P00_1_OUT

IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT5_P00_1_OUT = {&MODULE_EDSADC, IfxEdsadc_ChannelId_5, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt4}

Definition at line 78 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DSCOUT5_P02_3_OUT

IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT5_P02_3_OUT = {&MODULE_EDSADC, IfxEdsadc_ChannelId_5, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt4}

Definition at line 79 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DSCOUT6_P00_14_OUT

IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT6_P00_14_OUT = {&MODULE_EDSADC, IfxEdsadc_ChannelId_6, {&MODULE_P00,14}, IfxPort_OutputIdx_alt4}

Definition at line 80 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DSCOUT7_P00_1_OUT

IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT7_P00_1_OUT = {&MODULE_EDSADC, IfxEdsadc_ChannelId_7, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt5}

Definition at line 81 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DSCOUT7_P01_2_OUT

IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT7_P01_2_OUT = {&MODULE_EDSADC, IfxEdsadc_ChannelId_7, {&MODULE_P01, 2}, IfxPort_OutputIdx_alt6}

Definition at line 82 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DSCOUT8_P01_5_OUT

IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT8_P01_5_OUT = {&MODULE_EDSADC, IfxEdsadc_ChannelId_8, {&MODULE_P01, 5}, IfxPort_OutputIdx_alt6}

Definition at line 83 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DSCOUT9_P01_9_OUT

IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT9_P01_9_OUT = {&MODULE_EDSADC, IfxEdsadc_ChannelId_9, {&MODULE_P01, 9}, IfxPort_OutputIdx_alt6}

Definition at line 84 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_Dscout_Out_pinTable

const IfxEdsadc_Dscout_Out* IfxEdsadc_Dscout_Out_pinTable[IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_DSCOUT_OUT_NUM_ITEMS]

Definition at line 224 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DSDIN0A_P00_12_IN

IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN0A_P00_12_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_0, {&MODULE_P00,12}, Ifx_RxSel_a}

Definition at line 85 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DSDIN0B_P33_6_IN

IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN0B_P33_6_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_0, {&MODULE_P33, 6}, Ifx_RxSel_b}

Definition at line 86 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DSDIN1A_P00_10_IN

IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN1A_P00_10_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_1, {&MODULE_P00,10}, Ifx_RxSel_a}

Definition at line 87 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DSDIN1B_P33_4_IN

IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN1B_P33_4_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_1, {&MODULE_P33, 4}, Ifx_RxSel_b}

Definition at line 88 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DSDIN2A_P00_6_IN

IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN2A_P00_6_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_2, {&MODULE_P00, 6}, Ifx_RxSel_a}

Definition at line 89 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DSDIN2B_P33_2_IN

IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN2B_P33_2_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_2, {&MODULE_P33, 2}, Ifx_RxSel_b}

Definition at line 90 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DSDIN3A_P00_4_IN

IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN3A_P00_4_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_3, {&MODULE_P00, 4}, Ifx_RxSel_a}

Definition at line 91 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DSDIN3B_P02_8_IN

IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN3B_P02_8_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_3, {&MODULE_P02, 8}, Ifx_RxSel_b}

Definition at line 92 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DSDIN4A_P00_8_IN

IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN4A_P00_8_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_4, {&MODULE_P00, 8}, Ifx_RxSel_a}

Definition at line 93 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DSDIN4B_P02_6_IN

IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN4B_P02_6_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_4, {&MODULE_P02, 6}, Ifx_RxSel_b}

Definition at line 94 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DSDIN5A_P00_2_IN

IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN5A_P00_2_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_5, {&MODULE_P00, 2}, Ifx_RxSel_a}

Definition at line 95 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DSDIN5B_P02_4_IN

IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN5B_P02_4_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_5, {&MODULE_P02, 4}, Ifx_RxSel_b}

Definition at line 96 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DSDIN6A_P00_13_IN

IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN6A_P00_13_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_6, {&MODULE_P00,13}, Ifx_RxSel_a}

Definition at line 97 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DSDIN7A_P01_15_IN

IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN7A_P01_15_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_7, {&MODULE_P01,15}, Ifx_RxSel_a}

Definition at line 98 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DSDIN7B_P00_2_IN

IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN7B_P00_2_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_7, {&MODULE_P00, 2}, Ifx_RxSel_b}

Definition at line 99 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DSDIN8A_P01_6_IN

IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN8A_P01_6_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_8, {&MODULE_P01, 6}, Ifx_RxSel_a}

Definition at line 100 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_DSDIN9A_P01_8_IN

IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN9A_P01_8_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_9, {&MODULE_P01, 8}, Ifx_RxSel_a}

Definition at line 101 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_Dsdin_In_pinTable

const IfxEdsadc_Dsdin_In* IfxEdsadc_Dsdin_In_pinTable[IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_DSDIN_IN_NUM_ITEMS]

Definition at line 269 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_Dsn_In_pinTable

const IfxEdsadc_Dsn_In* IfxEdsadc_Dsn_In_pinTable[IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_DSN_IN_NUM_ITEMS]

Definition at line 314 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_Dsp_In_pinTable

const IfxEdsadc_Dsp_In* IfxEdsadc_Dsp_In_pinTable[IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_DSP_IN_NUM_ITEMS]

Definition at line 379 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_ITR0E_P33_0_IN

IfxEdsadc_Itr_In IfxEdsadc_ITR0E_P33_0_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_0, {&MODULE_P33, 0}, Ifx_RxSel_e}

Definition at line 144 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_ITR0F_P33_4_IN

IfxEdsadc_Itr_In IfxEdsadc_ITR0F_P33_4_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_0, {&MODULE_P33, 4}, Ifx_RxSel_f}

Definition at line 145 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_ITR1E_P33_1_IN

IfxEdsadc_Itr_In IfxEdsadc_ITR1E_P33_1_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_1, {&MODULE_P33, 1}, Ifx_RxSel_e}

Definition at line 146 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_ITR1F_P33_5_IN

IfxEdsadc_Itr_In IfxEdsadc_ITR1F_P33_5_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_1, {&MODULE_P33, 5}, Ifx_RxSel_f}

Definition at line 147 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_ITR2E_P33_2_IN

IfxEdsadc_Itr_In IfxEdsadc_ITR2E_P33_2_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_2, {&MODULE_P33, 2}, Ifx_RxSel_e}

Definition at line 148 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_ITR2F_P33_6_IN

IfxEdsadc_Itr_In IfxEdsadc_ITR2F_P33_6_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_2, {&MODULE_P33, 6}, Ifx_RxSel_f}

Definition at line 149 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_ITR3E_P02_8_IN

IfxEdsadc_Itr_In IfxEdsadc_ITR3E_P02_8_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_3, {&MODULE_P02, 8}, Ifx_RxSel_e}

Definition at line 150 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_ITR3F_P00_9_IN

IfxEdsadc_Itr_In IfxEdsadc_ITR3F_P00_9_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_3, {&MODULE_P00, 9}, Ifx_RxSel_f}

Definition at line 151 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_ITR4E_P02_7_IN

IfxEdsadc_Itr_In IfxEdsadc_ITR4E_P02_7_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_4, {&MODULE_P02, 7}, Ifx_RxSel_e}

Definition at line 152 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_ITR4F_P00_6_IN

IfxEdsadc_Itr_In IfxEdsadc_ITR4F_P00_6_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_4, {&MODULE_P00, 6}, Ifx_RxSel_f}

Definition at line 153 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_ITR5E_P02_6_IN

IfxEdsadc_Itr_In IfxEdsadc_ITR5E_P02_6_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_5, {&MODULE_P02, 6}, Ifx_RxSel_e}

Definition at line 154 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_ITR5F_P00_3_IN

IfxEdsadc_Itr_In IfxEdsadc_ITR5F_P00_3_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_5, {&MODULE_P00, 3}, Ifx_RxSel_f}

Definition at line 155 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_ITR6E_P01_0_IN

IfxEdsadc_Itr_In IfxEdsadc_ITR6E_P01_0_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_6, {&MODULE_P01, 0}, Ifx_RxSel_e}

Definition at line 156 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_ITR6F_P00_15_IN

IfxEdsadc_Itr_In IfxEdsadc_ITR6F_P00_15_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_6, {&MODULE_P00,15}, Ifx_RxSel_f}

Definition at line 157 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_ITR7E_P01_4_IN

IfxEdsadc_Itr_In IfxEdsadc_ITR7E_P01_4_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_7, {&MODULE_P01, 4}, Ifx_RxSel_e}

Definition at line 158 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_ITR7F_P01_3_IN

IfxEdsadc_Itr_In IfxEdsadc_ITR7F_P01_3_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_7, {&MODULE_P01, 3}, Ifx_RxSel_f}

Definition at line 159 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_ITR8E_P01_1_IN

IfxEdsadc_Itr_In IfxEdsadc_ITR8E_P01_1_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_8, {&MODULE_P01, 1}, Ifx_RxSel_e}

Definition at line 160 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_ITR8F_P01_7_IN

IfxEdsadc_Itr_In IfxEdsadc_ITR8F_P01_7_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_8, {&MODULE_P01, 7}, Ifx_RxSel_f}

Definition at line 161 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_ITR9E_P01_11_IN

IfxEdsadc_Itr_In IfxEdsadc_ITR9E_P01_11_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_9, {&MODULE_P01,11}, Ifx_RxSel_e}

Definition at line 162 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_ITR9F_P01_10_IN

IfxEdsadc_Itr_In IfxEdsadc_ITR9F_P01_10_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_9, {&MODULE_P01,10}, Ifx_RxSel_f}

Definition at line 163 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_Itr_In_pinTable

const IfxEdsadc_Itr_In* IfxEdsadc_Itr_In_pinTable[IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_ITR_IN_NUM_ITEMS]

Definition at line 444 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_Sg_In_pinTable

const IfxEdsadc_Sg_In* IfxEdsadc_Sg_In_pinTable[IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_SG_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxEdsadc_SGNA_P00_4_IN,
&IfxEdsadc_SGNB_P33_13_IN
}
}
IfxEdsadc_SGNB_P33_13_IN
IfxEdsadc_Sg_In IfxEdsadc_SGNB_P33_13_IN
Definition: IfxEdsadc_PinMap.c:165
IfxEdsadc_SGNA_P00_4_IN
IfxEdsadc_Sg_In IfxEdsadc_SGNA_P00_4_IN
Definition: IfxEdsadc_PinMap.c:164

Definition at line 529 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_SGNA_P00_4_IN

IfxEdsadc_Sg_In IfxEdsadc_SGNA_P00_4_IN = {&MODULE_EDSADC, {&MODULE_P00, 4}, Ifx_RxSel_a}

Definition at line 164 of file IfxEdsadc_PinMap.c.

◆ IfxEdsadc_SGNB_P33_13_IN

IfxEdsadc_Sg_In IfxEdsadc_SGNB_P33_13_IN = {&MODULE_EDSADC, {&MODULE_P33,13}, Ifx_RxSel_b}

Definition at line 165 of file IfxEdsadc_PinMap.c.


iLLD_TC38A: IfxEdsadc_PinMap.h File Reference

  • _PinMap
Data Structures | Macros | Variables
IfxEdsadc_PinMap.h File Reference
iLLD » EDSADC

EDSADC I/O map. More...

#include <IfxEdsadc_reg.h>
#include <_Impl/IfxEdsadc_cfg.h>
#include <Port/Std/IfxPort.h>
Include dependency graph for IfxEdsadc_PinMap.h:

Go to the source code of this file.

Data Structures

struct | IfxEdsadc_Dsn_In
DS negative pin mapping structure. More...
struct | IfxEdsadc_Dsp_In
DS positive pin mapping structure. More...
struct | IfxEdsadc_Cin_In
CIN pin mapping structure. More...
struct | IfxEdsadc_Din_In
DIN pin mapping structure. More...
struct | IfxEdsadc_Dscin_In
DIN pin mapping structure. More...
struct | IfxEdsadc_Dsdin_In
DIN pin mapping structure. More...
struct | IfxEdsadc_Itr_In
ITR pin mapping structure. More...
struct | IfxEdsadc_Cgpwm_Out
CGPWM pin mapping structure. More...
struct | IfxEdsadc_Sg_In
SG pin mapping structure. More...
struct | IfxEdsadc_Dscout_Out
COUT pin mapping structure. More...
struct | IfxEdsadc_Cout_Out
COUT pin mapping structure. More...

Macros

#define | IFXEDSADC_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXEDSADC_PINMAP_NUM_CHANNELS 10
#define | IFXEDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS 6
#define | IFXEDSADC_PINMAP_DSCIN_IN_NUM_ITEMS 2
#define | IFXEDSADC_PINMAP_DSCOUT_OUT_NUM_ITEMS 2
#define | IFXEDSADC_PINMAP_DSDIN_IN_NUM_ITEMS 2
#define | IFXEDSADC_PINMAP_DSN_IN_NUM_ITEMS 4
#define | IFXEDSADC_PINMAP_DSP_IN_NUM_ITEMS 4
#define | IFXEDSADC_PINMAP_ITR_IN_NUM_ITEMS 6
#define | IFXEDSADC_PINMAP_SG_IN_NUM_ITEMS 2

Variables

IFX_EXTERN IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMN_P00_5_OUT
Negative carrier generator output. More...
IFX_EXTERN IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMN_P02_0_OUT
Negative carrier generator output. More...
IFX_EXTERN IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMN_P33_11_OUT
Negative carrier generator output. More...
IFX_EXTERN IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMP_P00_6_OUT
Positive carrier generator output. More...
IFX_EXTERN IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMP_P02_1_OUT
Positive carrier generator output. More...
IFX_EXTERN IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMP_P33_12_OUT
Positive carrier generator output. More...
IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN0A_P00_11_IN
Modulator clock input, channel 0. More...
IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN0B_P33_5_IN
Modulator clock input, channel 0. More...
IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN1A_P00_9_IN
Modulator clock input, channel 1. More...
IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN1B_P33_3_IN
Modulator clock input, channel 1. More...
IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN2A_P00_5_IN
Modulator clock input, channel 2. More...
IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN2B_P33_1_IN
Modulator clock input, channel 2. More...
IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN3A_P00_3_IN
Modulator clock input, channel 3. More...
IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN3B_P02_7_IN
Modulator clock input, channel 3. More...
IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN4A_P00_7_IN
Modulator clock input, channel 4. More...
IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN4B_P02_5_IN
Modulator clock input, channel 4. More...
IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN5A_P00_1_IN
Modulator clock input, channel 5. More...
IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN5B_P02_3_IN
Modulator clock input, channel 5. More...
IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN6A_P00_14_IN
Modulator clock input, channel 6. More...
IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN7A_P01_2_IN
Modulator clock input, channel 7. More...
IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN7B_P00_1_IN
Modulator clock input, channel 7. More...
IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN8A_P01_5_IN
Modulator clock input, channel 8. More...
IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN9A_P01_9_IN
Modulator clock input, channel 9. More...
IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT0_P00_11_OUT
Modulator clock output. More...
IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT0_P33_5_OUT
Modulator clock output. More...
IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT1_P00_9_OUT
Modulator clock output. More...
IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT1_P33_3_OUT
Modulator clock output. More...
IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT2_P00_5_OUT
Modulator clock output. More...
IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT2_P33_1_OUT
Modulator clock output. More...
IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT3_P00_3_OUT
Modulator clock output. More...
IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT3_P02_7_OUT
Modulator clock output. More...
IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT4_P00_7_OUT
Modulator clock output. More...
IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT4_P02_5_OUT
Modulator clock output. More...
IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT5_P00_1_OUT
Modulator clock output. More...
IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT5_P02_3_OUT
Modulator clock output. More...
IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT6_P00_14_OUT
Modulator clock output. More...
IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT7_P00_1_OUT
Modulator clock output. More...
IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT7_P01_2_OUT
Modulator clock output. More...
IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT8_P01_5_OUT
Modulator clock output. More...
IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT9_P01_9_OUT
Modulator clock output. More...
IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN0A_P00_12_IN
Digital datastream input, channel 0. More...
IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN0B_P33_6_IN
Digital datastream input, channel 0. More...
IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN1A_P00_10_IN
Digital datastream input, channel 1. More...
IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN1B_P33_4_IN
Digital datastream input, channel 1. More...
IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN2A_P00_6_IN
Digital datastream input, channel 2. More...
IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN2B_P33_2_IN
Digital datastream input, channel 2. More...
IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN3A_P00_4_IN
Digital datastream input, channel 3. More...
IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN3B_P02_8_IN
Digital datastream input, channel 3. More...
IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN4A_P00_8_IN
Digital datastream input, channel 4. More...
IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN4B_P02_6_IN
Digital datastream input, channel 4. More...
IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN5A_P00_2_IN
Digital datastream input, channel 5. More...
IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN5B_P02_4_IN
Digital datastream input, channel 5. More...
IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN6A_P00_13_IN
Digital datastream input, channel 6. More...
IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN7A_P01_15_IN
Digital datastream input, channel 7. More...
IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN7B_P00_2_IN
Digital datastream input, channel 7. More...
IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN8A_P01_6_IN
Digital datastream input, channel 8. More...
IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN9A_P01_8_IN
Digital datastream input, channel 9. More...
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS0NA_AN3_IN
Negative analog input channel 0, pin A. More...
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS0NB_AN13_IN
Negative analog input channel 0, pin B. More...
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS1NA_P40_7_IN
Negative analog input channel 1, pin A. More...
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS1NB_P40_9_IN
Negative analog input channel 1, pin B. More...
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS1NC_AN45_IN
Negative analog input channel 1, pin C. More...
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS1ND_AN47_IN
Negative analog input channel 1, pin D. More...
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS2NA_AN21_IN
Negative analog input channel 2, pin A. More...
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS2NB_P40_1_IN
Negative analog input channel 2, pin B. More...
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS3NA_AN1_IN
Negative analog input channel 3, pin A. More...
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS3NB_AN15_IN
Negative analog input channel 3, pin N. More...
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS4NA_P00_7_IN
Negative analog input channel 4, pin A. More...
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS4NB_P00_9_IN
Negative analog input channel 4, pin B. More...
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS5NA_P00_1_IN
Negative analog input channel 5, pin A. More...
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS5NB_P00_3_IN
Negative analog input channel 5, pin B. More...
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS6NA_AN53_IN
Negative analog input channel 6, pin A. More...
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS6NB_P41_5_IN
Negative analog input channel 6, pin B. More...
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS7NA_AN61_IN
Negative analog input channel 7, pin A. More...
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS7NB_P41_7_IN
Negative analog input channel 7, pin B. More...
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS8NA_P41_1_IN
Negative analog input channel 8, pin A. More...
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS9NA_AN51_IN
Negative analog input channel 9, pin A. More...
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS9NB_P41_3_IN
Negative analog input channel 9, pin B. More...
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS0PA_AN2_IN
Positive analog input channel 0, pin A. More...
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS0PB_AN12_IN
Positive analog input channel 0, pin B. More...
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS1PA_P40_6_IN
Positive analog input channel 1, pin A. More...
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS1PB_P40_8_IN
Positive analog input channel 1, pin B. More...
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS1PC_AN44_IN
Positive analog input channel 1, pin C. More...
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS1PD_AN46_IN
Positive analog input channel 1, pin D. More...
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS2PA_AN20_IN
Positive analog input channel 2, pin A. More...
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS2PB_P40_0_IN
Positive analog input channel 2, pin B. More...
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS3PA_AN0_IN
Positive analog input channel 3, pin A. More...
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS3PB_AN14_IN
Positive analog input channel 3, pin B. More...
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS4PA_P00_8_IN
Positive analog input channel 4, pin A. More...
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS4PB_P00_10_IN
Positive analog input channel 4, pin B. More...
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS5PA_P00_2_IN
Positive analog input channel 5, pin A. More...
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS5PB_P00_4_IN
Positive analog input channel 5, pin B. More...
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS6PA_AN52_IN
Positive analog input channel 6, pin A. More...
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS6PB_P41_4_IN
Positive analog input channel 6, pin B. More...
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS7PA_AN60_IN
Positive analog input channel 7, pin A. More...
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS7PB_P41_6_IN
Positive analog input channel 7, pin B. More...
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS8PA_P41_0_IN
Positive analog input channel 8, pin A. More...
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS9PA_AN50_IN
Positive analog input channel 9, pin A. More...
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS9PB_P41_2_IN
Positive analog input channel 9, pin B. More...
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR0E_P33_0_IN
Trigger/Gate input, channel 0. More...
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR0F_P33_4_IN
Trigger/Gate input, channel 0. More...
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR1E_P33_1_IN
Trigger/Gate input, channel 1. More...
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR1F_P33_5_IN
Trigger/Gate input, channel 1. More...
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR2E_P33_2_IN
Trigger/Gate input, channel 2. More...
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR2F_P33_6_IN
Trigger/Gate input, channel 2. More...
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR3E_P02_8_IN
Trigger/Gate input, channel 3. More...
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR3F_P00_9_IN
Trigger/Gate input, channel 3. More...
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR4E_P02_7_IN
Trigger/Gate input, channel 4. More...
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR4F_P00_6_IN
Trigger/Gate input, channel 4. More...
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR5E_P02_6_IN
Trigger/Gate input, channel 5. More...
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR5F_P00_3_IN
Trigger/Gate input, channel 5. More...
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR6E_P01_0_IN
Trigger/Gate input, channel 6. More...
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR6F_P00_15_IN
Trigger/Gate input, channel 6. More...
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR7E_P01_4_IN
Trigger/Gate input, channel 7. More...
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR7F_P01_3_IN
Trigger/Gate input, channel 7. More...
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR8E_P01_1_IN
Trigger/Gate input, channel 8. More...
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR8F_P01_7_IN
Trigger/Gate input, channel 8. More...
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR9E_P01_11_IN
Trigger/Gate input, channel 9. More...
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR9F_P01_10_IN
Trigger/Gate input, channel 9. More...
IFX_EXTERN IfxEdsadc_Sg_In IfxEdsadc_SGNA_P00_4_IN
Carrier sign signal input. More...
IFX_EXTERN IfxEdsadc_Sg_In IfxEdsadc_SGNB_P33_13_IN
Carrier sign signal input. More...
IFX_EXTERN const IfxEdsadc_Cgpwm_Out * | IfxEdsadc_Cgpwm_Out_pinTable [IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS]
IfxEdsadc_Cgpwm_Out table. More...
IFX_EXTERN const IfxEdsadc_Dscin_In * | IfxEdsadc_Dscin_In_pinTable [IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_DSCIN_IN_NUM_ITEMS]
IfxEdsadc_Dscin_In table. More...
IFX_EXTERN const IfxEdsadc_Dscout_Out * | IfxEdsadc_Dscout_Out_pinTable [IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_DSCOUT_OUT_NUM_ITEMS]
IfxEdsadc_Dscout_Out table. More...
IFX_EXTERN const IfxEdsadc_Dsdin_In * | IfxEdsadc_Dsdin_In_pinTable [IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_DSDIN_IN_NUM_ITEMS]
IfxEdsadc_Dsdin_In table. More...
IFX_EXTERN const IfxEdsadc_Dsn_In * | IfxEdsadc_Dsn_In_pinTable [IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_DSN_IN_NUM_ITEMS]
IfxEdsadc_Dsn_In table. More...
IFX_EXTERN const IfxEdsadc_Dsp_In * | IfxEdsadc_Dsp_In_pinTable [IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_DSP_IN_NUM_ITEMS]
IfxEdsadc_Dsp_In table. More...
IFX_EXTERN const IfxEdsadc_Itr_In * | IfxEdsadc_Itr_In_pinTable [IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_ITR_IN_NUM_ITEMS]
IfxEdsadc_Itr_In table. More...
IFX_EXTERN const IfxEdsadc_Sg_In * | IfxEdsadc_Sg_In_pinTable [IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_SG_IN_NUM_ITEMS]
IfxEdsadc_Sg_In table. More...

Detailed Description

EDSADC I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxEdsadc_PinMap.h.


iLLD_TC38A: IfxEdsadc_Edsadc.h File Reference

  • Edsadc
  • Edsadc
Data Structures | Functions
IfxEdsadc_Edsadc.h File Reference
iLLD » EDSADC

EDSADC EDSADC details. More...

#include "Edsadc/Std/IfxEdsadc.h"
#include "Scu/Std/IfxScuWdt.h"
Include dependency graph for IfxEdsadc_Edsadc.h:

Go to the source code of this file.

Data Structures

struct | IfxEdsadc_Edsadc_ChannelPins
Channel Pins Configuration structure. More...
struct | IfxEdsadc_Edsadc_CombFilterConfig
Comb filter configuration structure. More...
struct | IfxEdsadc_Edsadc_CommonModeVoltageConfig
enable the voltage generators and select which input pins are connected to the common mode hold voltage More...
struct | IfxEdsadc_Edsadc_DemodulatorConfig
Demodulator configuration structure. More...
struct | IfxEdsadc_Edsadc_FirFilterConfig
FIR filters configuration structure. More...
struct | IfxEdsadc_Edsadc_IntegratorConfig
Integrator configuration structure. More...
struct | IfxEdsadc_Edsadc_ModulatorConfig
Modulator configuration structure. More...
struct | IfxEdsadc_Edsadc_RectifierConfig
Rectifier configuration structure. More...
struct | IfxEdsadc_Edsadc_TimeStampCounter
TimeStamp Counter Configuration. More...
struct | IfxEdsadc_Edsadc_GainCalibrationConfig
Contains configurations for Gain Calibaration. More...
struct | IfxEdsadc_Edsadc
EDSADC handle data structure. More...
struct | IfxEdsadc_Edsadc_CarrierGenConfig
Carrier generation configuration structure. More...
struct | IfxEdsadc_Edsadc_Channel
Channel handle structure. More...
struct | IfxEdsadc_Edsadc_ChannelConfig
Single channel configuration structure. More...
struct | IfxEdsadc_Edsadc_Config
Clock configuration data structure. More...

Functions

IFX_EXTERN void | IfxEdsadc_Edsadc_initCarrierGen (IfxEdsadc_Edsadc *edsadc, IfxEdsadc_Edsadc_CarrierGenConfig *config)
Initialise the EDSADC carrier generator. More...
IFX_EXTERN void | IfxEdsadc_Edsadc_initCombFilter (IfxEdsadc_Edsadc_Channel *channel, const IfxEdsadc_Edsadc_CombFilterConfig *config)
Initialises the comb filter. More...
IFX_EXTERN void | IfxEdsadc_Edsadc_initDemodulator (IfxEdsadc_Edsadc_Channel *channel, const IfxEdsadc_Edsadc_DemodulatorConfig *config)
Initialises the demodulator. More...
IFX_EXTERN void | IfxEdsadc_Edsadc_initFirFilter (IfxEdsadc_Edsadc_Channel *channel, const IfxEdsadc_Edsadc_FirFilterConfig *config)
Initialises the fir filter. More...
IFX_EXTERN void | IfxEdsadc_Edsadc_initIntegrator (IfxEdsadc_Edsadc_Channel *channel, const IfxEdsadc_Edsadc_IntegratorConfig *config)
Initialises the integrator. More...
IFX_EXTERN void | IfxEdsadc_Edsadc_initModulator (IfxEdsadc_Edsadc_Channel *channel, const IfxEdsadc_Edsadc_ModulatorConfig *config)
Initialises the modulator. More...
IFX_EXTERN void | IfxEdsadc_Edsadc_initModule (IfxEdsadc_Edsadc *edsadc, IfxEdsadc_Edsadc_Config *config)
Initialise the EDSADC with the supplied configuration. More...
IFX_EXTERN void | IfxEdsadc_Edsadc_initModuleConfig (IfxEdsadc_Edsadc_Config *config, Ifx_EDSADC *edsadc)
Initialise the config struct with default EDSADC configuration. More...
IFX_EXTERN void | IfxEdsadc_Edsadc_initRectifier (IfxEdsadc_Edsadc_Channel *channel, const IfxEdsadc_Edsadc_RectifierConfig *config)
Initialises the rectifier. More...
IFX_EXTERN void | IfxEdsadc_Edsadc_initChannel (IfxEdsadc_Edsadc_Channel *channel, const IfxEdsadc_Edsadc_ChannelConfig *config)
Initialise a EDSADC channel with the supplied configuration. More...
IFX_EXTERN void | IfxEdsadc_Edsadc_initChannelConfig (IfxEdsadc_Edsadc_ChannelConfig *config, IfxEdsadc_Edsadc *edsadc)
Initialise the config struct with default EDSADC channel configuration. More...
IFX_INLINE void | IfxEdsadc_Edsadc_startScan (IfxEdsadc_Edsadc *edsadc, uint32 modulatorMask, uint32 channelMask)
Enables the conversion of multiple channels. More...
IFX_INLINE void | IfxEdsadc_Edsadc_stopScan (IfxEdsadc_Edsadc *edsadc, uint32 modulatorMask)
Disables the conversion of multiple channels. More...
IFX_INLINE sint16 | IfxEdsadc_Edsadc_getMainResult (IfxEdsadc_Edsadc_Channel *channel)
Get result from the main chain. More...
IFX_INLINE sint32 | IfxEdsadc_Edsadc_getSubsequentResult (IfxEdsadc_Edsadc_Channel *channel)
give the subsequent result More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEdsadc_Edsadc_getAuxSrc (IfxEdsadc_Edsadc_Channel *channel)
Get the interrupt source register for a Aux event. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEdsadc_Edsadc_getMainSrc (IfxEdsadc_Edsadc_Channel *channel)
Get the interrupt source register for a Main event. More...
IFX_INLINE void | IfxEdsadc_Edsadc_setGainCorrectionFactor (Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, uint16 gainFactor, uint8 cicShift)
set gain Correction Factor More...
IFX_INLINE void | IfxEdsadc_Edsadc_initTimeStampCounter (Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, const IfxEdsadc_Edsadc_TimeStampCounter *timeStamp)
Configure Time Stamp Counter. More...
IFX_INLINE void | IfxEdsadc_Edsadc_initCommonModeVoltage (Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, const IfxEdsadc_Edsadc_CommonModeVoltageConfig *commonMode)
initialize common mode voltage configuration More...
IFX_EXTERN void | IfxEdsadc_Edsadc_initCarrierGenConfig (IfxEdsadc_Edsadc_CarrierGenConfig *config)

Detailed Description

EDSADC EDSADC details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxEdsadc_Edsadc.h.

Data Structure Documentation

◆ IfxEdsadc_Edsadc_GainCalibrationConfig

struct IfxEdsadc_Edsadc_GainCalibrationConfig

Contains configurations for Gain Calibaration.

Definition at line 298 of file IfxEdsadc_Edsadc.h.

Data Fields
uint16 | calFactor | Multiplication Factor for Gain Calibration.
uint16 | calTarget | Target Value for Calibrated Fullscale.
uint8 | cicDecimationRate | Decimation Rate of the CIC Filter During Calibration(GAINCTR register)
uint8 | cicShift |
uint16 | gainFactor | Multiplication Factor for Gain Correction During Calibration(in GAINCTR register)

Function Documentation

◆ IfxEdsadc_Edsadc_initCarrierGenConfig()

IFX_EXTERN void IfxEdsadc_Edsadc_initCarrierGenConfig ( IfxEdsadc_Edsadc_CarrierGenConfig * config )
Parameters
config Pointer to DSADC Carrier Configuration
Returns
None

Definition at line 496 of file IfxEdsadc_Edsadc.c.

◆ IfxEdsadc_Edsadc_initCommonModeVoltage()

IFX_INLINE void IfxEdsadc_Edsadc_initCommonModeVoltage | ( | Ifx_EDSADC * | edsadc,
 |  | IfxEdsadc_ChannelId | channel,
 |  | const IfxEdsadc_Edsadc_CommonModeVoltageConfig * | commonMode
 | ) |  |

initialize common mode voltage configuration

Parameters
edsadc | pointer to Module space
channel | channel no
commonMode | pointer to common mode voltage config structure
Returns
None

Definition at line 646 of file IfxEdsadc_Edsadc.h.

Referenced by IfxEdsadc_Edsadc_initChannel().

◆ IfxEdsadc_Edsadc_initTimeStampCounter()

IFX_INLINE void IfxEdsadc_Edsadc_initTimeStampCounter | ( | Ifx_EDSADC * | edsadc,
 |  | IfxEdsadc_ChannelId | channel,
 |  | const IfxEdsadc_Edsadc_TimeStampCounter * | timeStamp
 | ) |  |

Configure Time Stamp Counter.

Parameters
edsadc | pointer to Module Space
channel | specifies channel ID
timeStamp | specifies the timeStamp Configuration
Returns
None

Definition at line 640 of file IfxEdsadc_Edsadc.h.

Referenced by IfxEdsadc_Edsadc_initChannel().

◆ IfxEdsadc_Edsadc_setGainCorrectionFactor()

IFX_INLINE void IfxEdsadc_Edsadc_setGainCorrectionFactor | ( | Ifx_EDSADC * | edsadc,
 |  | IfxEdsadc_ChannelId | channel,
 |  | uint16 | gainFactor,
 |  | uint8 | cicShift
 | ) |  |

set gain Correction Factor

Parameters
edsadc | Pointer to edsadc Module space
channel | specifies channel number
gainFactor | Mulitiplication factor for gain correction
cicShift | Position of CIC filter output shifter Note:Value has to update according to application need
Returns
None

Definition at line 634 of file IfxEdsadc_Edsadc.h.

Referenced by IfxEdsadc_Edsadc_initChannel().


iLLD_TC38A: IfxEdsadc.h File Reference

  • Edsadc
  • Std
Data Structures | Enumerations | Functions
IfxEdsadc.h File Reference
iLLD » EDSADC

EDSADC basic functionality. More...

#include "_Impl/IfxEdsadc_cfg.h"
#include "Src/Std/IfxSrc.h"
#include "Scu/Std/IfxScuCcu.h"
#include "_PinMap/IfxEdsadc_PinMap.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "IfxEdsadc_reg.h"
#include "IfxEdsadc_bf.h"
Include dependency graph for IfxEdsadc.h:

Go to the source code of this file.

Data Structures

struct IfxEdsadc_ModulatorConfig
Modulator Configuration. More...

Enumerations

enum IfxEdsadc_AnalogClockSyncDelay {
IfxEdsadc_AnalogClockSyncDelay_noDelay = 0,
IfxEdsadc_AnalogClockSyncDelay_cycleDelay1 = 1,
IfxEdsadc_AnalogClockSyncDelay_cycleDelay2,
IfxEdsadc_AnalogClockSyncDelay_cycleDelay3,
IfxEdsadc_AnalogClockSyncDelay_cycleDelay4,
IfxEdsadc_AnalogClockSyncDelay_cycleDelay5,
IfxEdsadc_AnalogClockSyncDelay_cycleDelay6,
IfxEdsadc_AnalogClockSyncDelay_cycleDelay7
}
Analog Clock Synchronization Delay Definition in Ifx_DSADC.MODCFG.B.ACSD. More...
enum IfxEdsadc_AuxServiceRequest {
IfxEdsadc_AuxServiceRequest_never = 0,
IfxEdsadc_AuxServiceRequest_compEvent = 1,
IfxEdsadc_AuxServiceRequest_timestampEvent = 2,
IfxEdsadc_AuxServiceRequest_altSource = 3
}
Service request generation (auxiliary)
Definition in Ifx_EDSADC.FCFGM.B.SRGA. More...
enum IfxEdsadc_CarrierWaveformMode {
IfxEdsadc_CarrierWaveformMode_stopped = 0,
IfxEdsadc_CarrierWaveformMode_square = 1,
IfxEdsadc_CarrierWaveformMode_triangle = 2,
IfxEdsadc_CarrierWaveformMode_sine = 3
}
Carrier generation mode
Definition in Ifx_EDSADC.CGCFG.B.CGMOD. More...
enum IfxEdsadc_CommonModeHoldVoltage {
IfxEdsadc_CommonModeHoldVoltage_disable = 0,
IfxEdsadc_CommonModeHoldVoltage_enable = 1
}
Common Mode Hold Voltage Enable. More...
enum IfxEdsadc_DataRead {
IfxEdsadc_DataRead_signOnHighbit = 0,
IfxEdsadc_DataRead_timestampOnHighbit = 1,
IfxEdsadc_DataRead_double = 2
}
Select the data to be returned when register RESM is read Definition in Ifx_DSADC.DICFG.B.DRM. More...
enum IfxEdsadc_DataStream {
IfxEdsadc_DataStream_onChipModulator = 0,
IfxEdsadc_DataStream_doubleDataClockEdge = 3,
IfxEdsadc_DataStream_directFallingClockEdge = 4,
IfxEdsadc_DataStream_directRisingClockEdge = 5,
IfxEdsadc_DataStream_secondFallingClockEdge = 6,
IfxEdsadc_DataStream_secondRisingClockEdge = 7
}
Data stream select Definition in Ifx_DSADC.DICFG.B.DSS. More...
enum IfxEdsadc_DitheringIntensity {
IfxEdsadc_DitheringIntensity_minimum = 0,
IfxEdsadc_DitheringIntensity_low = 1,
IfxEdsadc_DitheringIntensity_medium = 2,
IfxEdsadc_DitheringIntensity_high = 3
}
Trimming Value for Dithering function Definition in Ifx_DSADC.GLOBCFG.B.DITRIM. More...
enum IfxEdsadc_EventSelect {
IfxEdsadc_EventSelect_everyNewResult = 0,
IfxEdsadc_EventSelect_insideBoundry = 1,
IfxEdsadc_EventSelect_outsideBoundry = 2
}
Define when comparator event is generated Definition in Ifx_DSADC.FCFGM.B.ESEL. More...
enum IfxEdsadc_FilterRunTimeInputCycle {
IfxEdsadc_FilterRunTimeInputCycle_2 = 0,
IfxEdsadc_FilterRunTimeInputCycle_4 = 1,
IfxEdsadc_FilterRunTimeInputCycle_8 = 2,
IfxEdsadc_FilterRunTimeInputCycle_16 = 3
}
Defines the duration of the additional filter effect, based on values input to the filter. More...
enum IfxEdsadc_FilterStrength {
IfxEdsadc_FilterStrength_minimum = 0,
IfxEdsadc_FilterStrength_weak = 1,
IfxEdsadc_FilterStrength_medium = 2,
IfxEdsadc_FilterStrength_maximum = 3
}
Specifies Slew Rate Filter Strength. More...
enum IfxEdsadc_FractionalRefVoltage {
IfxEdsadc_FractionalRefVoltage_disable = 0,
IfxEdsadc_FractionalRefVoltage_enable = 1
}
Fractional Reference Voltage Enable. More...
enum IfxEdsadc_FractionalRefVoltageSelection {
IfxEdsadc_FractionalRefVoltageSelection_div2 = 0,
IfxEdsadc_FractionalRefVoltageSelection_div4 = 1,
IfxEdsadc_FractionalRefVoltageSelection_div8 = 2,
IfxEdsadc_FractionalRefVoltageSelection_div16 = 3
}
Fraction reference voltage selection. More...
enum IfxEdsadc_HalfSupplyVoltage {
IfxEdsadc_HalfSupplyVoltage_disable = 0,
IfxEdsadc_HalfSupplyVoltage_enable = 1
}
Half Supply Voltage Enable. More...
enum IfxEdsadc_InputConfig {
IfxEdsadc_InputConfig_inputPin = 0,
IfxEdsadc_InputConfig_supplyVoltage = 1,
IfxEdsadc_InputConfig_commonModeVoltage = 2,
IfxEdsadc_InputConfig_referenceGround = 3
}
Modulator configuration of positive/negative input line
Definition in Ifx_DSADC.MODCFGx.B.INCFGP and Ifx_DSADC.MODCFGx.B.INCFGN. More...
enum IfxEdsadc_InputDataSource {
IfxEdsadc_InputDataSource_directInputA = 0,
IfxEdsadc_InputDataSource_invertedInputA = 1,
IfxEdsadc_InputDataSource_directInputB = 2,
IfxEdsadc_InputDataSource_invertedInputB = 3,
IfxEdsadc_InputDataSource_directInputC = 4,
IfxEdsadc_InputDataSource_invertedInputC = 5,
IfxEdsadc_InputDataSource_directInputD = 6,
IfxEdsadc_InputDataSource_invertedInputD = 7
}
Demodulator input data source selection
Definition in Ifx_EDSADC.DICFG.B.DSRC. More...
enum IfxEdsadc_InputGain {
IfxEdsadc_InputGain_factor1 = 0,
IfxEdsadc_InputGain_factor2 = 1,
IfxEdsadc_InputGain_factor4 = 2,
IfxEdsadc_InputGain_factor8 = 3,
IfxEdsadc_InputGain_factor16 = 4
}
Modulator gain select of analog input path
Definition in Ifx_DSADC.MODCFGx.B.GAINSEL. More...
enum IfxEdsadc_InputMuxControlMode {
IfxEdsadc_InputMuxControlMode_softwareControl = 0,
IfxEdsadc_InputMuxControlMode_fallingEdge = 1,
IfxEdsadc_InputMuxControlMode_risingEdge = 2,
IfxEdsadc_InputMuxControlMode_always = 3
}
specifies input multiplexer control mode defined in MODULE_EDSADC.MODCFG.B.INMODE More...
enum IfxEdsadc_InputPin {
IfxEdsadc_InputPin_a = 0,
IfxEdsadc_InputPin_b = 1,
IfxEdsadc_InputPin_c = 2,
IfxEdsadc_InputPin_d = 3
}
Modulator input pin selection
Definition in Ifx_DSADC.MODCFGx.B.INMUX. More...
enum IfxEdsadc_IntegrationShiftControl {
IfxEdsadc_IntegrationShiftControl_0 = 0,
IfxEdsadc_IntegrationShiftControl_1,
IfxEdsadc_IntegrationShiftControl_2,
IfxEdsadc_IntegrationShiftControl_3,
IfxEdsadc_IntegrationShiftControl_4,
IfxEdsadc_IntegrationShiftControl_5
}
Controls the data shifter after the integrator that selects the portion of the integrator data for the result register. More...
enum IfxEdsadc_IntegrationWindowSize {
IfxEdsadc_IntegrationWindowSize_internalControl = 0,
IfxEdsadc_IntegrationWindowSize_externalControl = 1
}
Integrator window size
Definition in Ifx_DSADC.IWCTR.B.IWS. More...
enum IfxEdsadc_IntegratorTrigger {
IfxEdsadc_IntegratorTrigger_bypassed = 0,
IfxEdsadc_IntegratorTrigger_fallingEdge = 1,
IfxEdsadc_IntegratorTrigger_risingEdge = 2,
IfxEdsadc_IntegratorTrigger_alwaysActive = 3
}
Integrator trigger mode
NOTE: switch-first to bypassed before using other mode
Definition in Ifx_EDSADC.DICFG.B.ITRMODE. More...
enum IfxEdsadc_MainServiceRequest {
IfxEdsadc_MainServiceRequest_never = 0,
IfxEdsadc_MainServiceRequest_highGateSignal = 1,
IfxEdsadc_MainServiceRequest_lowGateSignal = 2,
IfxEdsadc_MainServiceRequest_everyNewResult = 3
}
Service request generation (main chain)
Definition in Ifx_EDSADC.FCFGM.B.SRGM. More...
enum IfxEdsadc_ModulatorClockDivider {
IfxEdsadc_ModulatorClockDivider_div4 = 0,
IfxEdsadc_ModulatorClockDivider_div6,
IfxEdsadc_ModulatorClockDivider_div8,
IfxEdsadc_ModulatorClockDivider_div10,
IfxEdsadc_ModulatorClockDivider_div12,
IfxEdsadc_ModulatorClockDivider_div14,
IfxEdsadc_ModulatorClockDivider_div16,
IfxEdsadc_ModulatorClockDivider_div18
}
Modulator divider factor for modulator clock
Definition in Ifx_EDSADC.MODCFGx.B.DIVM. More...
enum IfxEdsadc_ModulatorClockGeneration {
IfxEdsadc_ModulatorClockGeneration_syncMode = 0,
IfxEdsadc_ModulatorClockGeneration_unsyncMode = 1
}
Defines the way the modulator clock is generated Definition in Ifx_DSADC.GLOBCFG.B.USC. More...
enum IfxEdsadc_OffsetCompensationFilter {
IfxEdsadc_OffsetCompensationFilter_disabled = 0,
IfxEdsadc_OffsetCompensationFilter_enablewithRateA = 1,
IfxEdsadc_OffsetCompensationFilter_enablewithRateB = 2,
IfxEdsadc_OffsetCompensationFilter_enablewithRateC = 3,
IfxEdsadc_OffsetCompensationFilter_enablewithRateD = 4,
IfxEdsadc_OffsetCompensationFilter_enablewithRateE = 5,
IfxEdsadc_OffsetCompensationFilter_enablewithRateF = 6,
IfxEdsadc_OffsetCompensationFilter_enablewithRateG = 7
}
Enable the offset compensation filter Definition in Ifx_DSADC.FCFGM.B.OCEN. More...
enum IfxEdsadc_OvershootCompensation {
IfxEdsadc_OvershootCompensation_disabled = 0,
IfxEdsadc_OvershootCompensation_enabled = 1
}
Overshoot Compensation Enable. Defined in fx_DSADC.FCFGM.B.OVCEN. More...
enum IfxEdsadc_RectifierSignSource {
IfxEdsadc_RectifierSignSource_onChipGenerator = 0,
IfxEdsadc_RectifierSignSource_nextChannel = 1,
IfxEdsadc_RectifierSignSource_externalA = 2,
IfxEdsadc_RectifierSignSource_externalB = 3
}
Rectifier sign source
Selects the sign signal that is to be delayed.
Definition in Ifx_DSADC.RECT.B.SSRC. More...
enum IfxEdsadc_RestartFilterChain {
IfxEdsadc_RestartFilterChain_on = 0,
IfxEdsadc_RestartFilterChain_off = 1
}
Restart the filter chain when an integration window starts. More...
enum IfxEdsadc_ResultDisplayMode {
IfxEdsadc_ResultDisplayMode_signed = 0,
IfxEdsadc_ResultDisplayMode_unsigned = 1
}
specifies result display mode (signed/unsigned) Definition in Ifx_DSADC.DICFG.B.RDM More...
enum IfxEdsadc_SampleClockSource {
IfxEdsadc_SampleClockSource_internal = 0,
IfxEdsadc_SampleClockSource_inputA = 3,
IfxEdsadc_SampleClockSource_inputB = 4,
IfxEdsadc_SampleClockSource_inputC = 5
}
Demodulator sample clock source select
Definition in Ifx_EDSADC.DICFG.B.CSRC. More...
enum IfxEdsadc_ServiceRequestFifolevel {
IfxEdsadc_ServiceRequestFifolevel_1 = 0,
IfxEdsadc_ServiceRequestFifolevel_2,
IfxEdsadc_ServiceRequestFifolevel_3,
IfxEdsadc_ServiceRequestFifolevel_4
}
Service request fifo level Definition in Ifx_EDSADC.RFC.B.SRLVL. More...
enum IfxEdsadc_SleepMode {
IfxEdsadc_SleepMode_enable = 0,
IfxEdsadc_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_EDSADC.CLC.B.EDIS. More...
enum IfxEdsadc_StepDetectionMode {
IfxEdsadc_StepDetectionMode_lastInput = 0,
IfxEdsadc_StepDetectionMode_secondlastInput = 1
}
Defines when the slew rate filter is activated. More...
enum IfxEdsadc_SupplyVoltageLevel {
IfxEdsadc_SupplyVoltageLevel_automaticControl = 0,
IfxEdsadc_SupplyVoltageLevel_upperVoltage = 1,
IfxEdsadc_SupplyVoltageLevel_lowerVoltage = 2
}
Adjusts the analog circuitry to the supply voltage used in the application system.Defined In defined in MODULE_EDSADC.GLOBCFG.B.SUPLEV. More...
enum IfxEdsadc_SuspendMode {
IfxEdsadc_SuspendMode_none = 0,
IfxEdsadc_SuspendMode_hard = 1,
IfxEdsadc_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxEdsadc_TimeStampCounterClockSelection {
IfxEdsadc_TimeStampCounterClockSelection_div1 = 0,
IfxEdsadc_TimeStampCounterClockSelection_div2 = 1,
IfxEdsadc_TimeStampCounterClockSelection_div4 = 2,
IfxEdsadc_TimeStampCounterClockSelection_div8 = 3
}
Time Stamp Counter Clock Selection. More...
enum IfxEdsadc_TimestampTrigger {
IfxEdsadc_TimestampTrigger_noTrigger = 0,
IfxEdsadc_TimestampTrigger_fallingEdge = 1,
IfxEdsadc_TimestampTrigger_risingEdge = 2,
IfxEdsadc_TimestampTrigger_eachEdge = 3
}
Timestamp trigger mode
Definition in Ifx_EDSADC.DICFG.B.TSTRMODE. More...
enum IfxEdsadc_TriggerInput {
IfxEdsadc_TriggerInput_a = 0,
IfxEdsadc_TriggerInput_b = 1,
IfxEdsadc_TriggerInput_c = 2,
IfxEdsadc_TriggerInput_d = 3,
IfxEdsadc_TriggerInput_e = 4,
IfxEdsadc_TriggerInput_f = 5,
IfxEdsadc_TriggerInput_g = 6,
IfxEdsadc_TriggerInput_h = 7,
IfxEdsadc_TriggerInput_i = 8,
IfxEdsadc_TriggerInput_j = 9,
IfxEdsadc_TriggerInput_k = 10,
IfxEdsadc_TriggerInput_l = 11,
IfxEdsadc_TriggerInput_m = 12,
IfxEdsadc_TriggerInput_n = 13,
IfxEdsadc_TriggerInput_o = 14,
IfxEdsadc_TriggerInput_p = 15
}
Trigger select
Definition in Ifx_EDSADC.DICFG.B.TRSEL. More...
enum IfxEdsadc_dithering {
IfxEdsadc_dithering_disabled = 0,
IfxEdsadc_dithering_enabled = 1
}
Controls the dithering function for each modulator separately Definition in Ifx_DSADC.MODCFG.B.DITHEN. More...
enum IfxEdsadc_AnalogMux {
IfxEdsadc_AnalogMux_doNotCopyAmx = 0,
IfxEdsadc_AnalogMux_copyAmx = 1
}
Allows copying of bitfield AMX into bitfield TIMESTAMP. More...
enum IfxEdsadc_TimeStampCounterControl {
IfxEdsadc_TimeStampCounterControl_off = 0,
IfxEdsadc_TimeStampCounterControl_on = 1
}
Timestamp Counter Run Control. More...

Functions

IFX_INLINE boolean | IfxEdsadc_isModuleSuspended (Ifx_EDSADC *edsadc)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxEdsadc_setSleepMode (Ifx_EDSADC *edsadc, IfxEdsadc_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxEdsadc_setSuspendMode (Ifx_EDSADC *edsadc, IfxEdsadc_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_INLINE void | IfxEdsadc_startScan (Ifx_EDSADC *edsadc, uint32 modulatorMask, uint32 channelMask)
Enables the conversion of multiple channels. More...
IFX_INLINE void | IfxEdsadc_stopScan (Ifx_EDSADC *edsadc, uint32 modulatorMask)
Disables the conversion of multiple channels. More...
IFX_EXTERN void | IfxEdsadc_disableModule (Ifx_EDSADC *edsadc)
Disables the module. More...
IFX_EXTERN void | IfxEdsadc_enableModule (Ifx_EDSADC *edsadc)
Enables the module. More...
IFX_EXTERN void | IfxEdsadc_resetModule (Ifx_EDSADC *edsadc)
resets EDSADC kernel More...
IFX_INLINE uint16 | IfxEdsadc_getMainCombDecimation (Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
Get the main comb decimation factor. More...
IFX_INLINE sint16 | IfxEdsadc_getMainResult (Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
Get result from the main chain. More...
IFX_INLINE sint32 | IfxEdsadc_getSubsequentResult (Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
Get the subsequent result. More...
IFX_INLINE boolean | IfxEdsadc_isModuleEnabled (Ifx_EDSADC *edsadc)
Return TRUE if EDSADC module is enabled. More...
IFX_INLINE void | IfxEdsadc_setCarrierMode (Ifx_EDSADC *edsadc, IfxEdsadc_CarrierWaveformMode waveformMode)
Set the carrier waveform mode. More...
IFX_EXTERN float32 | IfxEdsadc_getIntegratorOutFreq (Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
Get the sample frequency of the integrator output in Hz. More...
IFX_EXTERN float32 | IfxEdsadc_getMainCombOutFreq (Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
Get the sample frequency of the main COMB filter output in Hz. More...
IFX_EXTERN float32 | IfxEdsadc_getMainGroupDelay (Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
Estimate the group delay of main-chain filters in seconds. More...
IFX_EXTERN float32 | IfxEdsadc_getModulatorClockFreq (Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
Get the modulator clock frequency in Hz. More...
IFX_EXTERN float32 | IfxEdsadc_getModulatorInputClockFreq (Ifx_EDSADC *edsadc)
Get the input frequency of EDSADC in Hz. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxEdsadc_getAuxSrc (Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
Address/pointer to the interrupt source register. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxEdsadc_getMainSrc (Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
Get the interrupt source register for a Main event. More...
IFX_INLINE void | IfxEdsadc_initCgPwmPin (const IfxEdsadc_Cgpwm_Out *cgPwm, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a CGPWM output. More...
IFX_INLINE void | IfxEdsadc_initCinPin (const IfxEdsadc_Cin_In *cIn, IfxPort_InputMode cInMode, IfxPort_PadDriver padDriver)
Initializes a CIN input. More...
IFX_INLINE void | IfxEdsadc_initCoutPin (const IfxEdsadc_Cout_Out *cout, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a COUT output. More...
IFX_INLINE void | IfxEdsadc_initDinPin (const IfxEdsadc_Din_In *dIn, IfxPort_InputMode dInMode, IfxPort_PadDriver padDriver)
Initializes a DIN input. More...
IFX_INLINE void | IfxEdsadc_initDsnPin (const IfxEdsadc_Dsn_In *dsn, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a DS input. More...
IFX_INLINE void | IfxEdsadc_initDspPin (const IfxEdsadc_Dsp_In *dsp, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a DS input. More...
IFX_INLINE void | IfxEdsadc_initItrPin (const IfxEdsadc_Itr_In *itr, IfxPort_InputMode itrMode, IfxPort_PadDriver padDriver)
Initializes a ITR input. More...
IFX_INLINE void | IfxEdsadc_initSgPin (const IfxEdsadc_Sg_In *sg, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a SG input. More...
IFX_INLINE uint8 | IfxEdsadc_getPositiveInputLineConfiguration (Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
Returns the positive input line configuration. More...
IFX_INLINE uint8 | IfxEdsadc_getNegativeInputLineConfiguration (Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
Returns the negative input line configuration. More...
IFX_INLINE void | IfxEdsadc_setOffsetCompensationValue (Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, uint16 value)
Sets the Offset compensation Value. More...
IFX_INLINE uint32 * | IfxEdsadc_getResultRegisterAddress (Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
Returns the address of the result register. More...
IFX_EXTERN void | IfxEdsadc_setCommonModeVoltage (Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, IfxEdsadc_FractionalRefVoltageSelection voltage, IfxEdsadc_FractionalRefVoltage refMode, IfxEdsadc_HalfSupplyVoltage hsvMode, IfxEdsadc_CommonModeHoldVoltage cmhvMode, uint8 positiveInput, uint8 negativeInput)
set common mode voltage Parameters More...
IFX_EXTERN void | IfxEdsadc_setGainCorrectionFactor (Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, uint16 gainFactor, uint8 cicShift)
configure gain correction More...
IFX_EXTERN void | IfxEdsadc_setTimeStampCounter (Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, IfxEdsadc_TimeStampCounterClockSelection timeStampCounterClock, IfxEdsadc_TimeStampCounterControl runControl, IfxEdsadc_AnalogMux analogMuxCopy)
IFX_EXTERN void | IfxEdsadc_setGainControl (Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, uint16 gainFactor, uint8 cicShift, uint8 cicDecimationRate)
IFX_EXTERN void | IfxEdsadc_setGainCalibration (Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, uint16 calFactor, uint16 calTarget)
IFX_EXTERN void | IfxEdsadc_configureModulator (Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, IfxEdsadc_ModulatorConfig *config)
Set the Modulator configuration. More...

Detailed Description

EDSADC basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxEdsadc.h.

Data Structure Documentation

◆ IfxEdsadc_ModulatorConfig

struct IfxEdsadc_ModulatorConfig

Modulator Configuration.

Definition at line 526 of file IfxEdsadc.h.

Data Fields
IfxEdsadc_AnalogClockSyncDelay | analogClockSyncDelay | Define the delay in clock cycle after sync signal.
IfxEdsadc_dithering | ditheringEnabled | Control the Dithering Function for each modulator.
IfxEdsadc_InputGain | inputGain | Modulator gain select of analog input path.
boolean | inputMuxActionControl | Defines the mechanism by which the input multiplexer is controlled.
IfxEdsadc_InputPin | inputPin | Modulator input pin selection.
boolean | integratorResetEnabled | Control the modulator overload handling.
float32 | modulatorClockPeriod | Modulator clock period.
IfxEdsadc_InputConfig | negativeInput | Modulator configuration of negative input line.
IfxEdsadc_InputConfig | positiveInput | Modulator configuration of positive input line.
IfxEdsadc_InputMuxControlMode | triggerEvent | Defines the condition for a trigger event to control the input multiplexer.

Enumeration Type Documentation

◆ IfxEdsadc_AnalogMux

enum IfxEdsadc_AnalogMux

Allows copying of bitfield AMX into bitfield TIMESTAMP.

Enumerator
IfxEdsadc_AnalogMux_doNotCopyAmx | Do not copy, timestamp uses all 16 bits.
IfxEdsadc_AnalogMux_copyAmx | Copy AMX to bits TIMESTAMP[15:14], timestamp uses lower 14 bits.

Definition at line 506 of file IfxEdsadc.h.

◆ IfxEdsadc_TimeStampCounterControl

enum IfxEdsadc_TimeStampCounterControl

Timestamp Counter Run Control.

Enumerator
IfxEdsadc_TimeStampCounterControl_off | Timestamp counter is off.
IfxEdsadc_TimeStampCounterControl_on | Timestamp counter is counting at the rate selected by bitfield TSCLK.

Definition at line 514 of file IfxEdsadc.h.

Function Documentation

◆ IfxEdsadc_configureModulator()

IFX_EXTERN void IfxEdsadc_configureModulator | ( | Ifx_EDSADC * | edsadc,
 |  | IfxEdsadc_ChannelId | channel,
 |  | IfxEdsadc_ModulatorConfig * | config
 | ) |  |

Set the Modulator configuration.

Parameters
edsadc | Pointer to EDSADC module SFRs
channel | Channel Number to be configured
config | Modulator Configuration
Returns
None

Definition at line 270 of file IfxEdsadc.c.

◆ IfxEdsadc_getNegativeInputLineConfiguration()

IFX_INLINE uint8 IfxEdsadc_getNegativeInputLineConfiguration | ( | Ifx_EDSADC * | edsadc,
 |  | IfxEdsadc_ChannelId | channel
 | ) |  |

Returns the negative input line configuration.

Parameters
edsadc | Pointer to EDSADC module SFRs
channel | Channel Number
Returns
Negative Input Line Configuration

Definition at line 1059 of file IfxEdsadc.h.

◆ IfxEdsadc_getPositiveInputLineConfiguration()

IFX_INLINE uint8 IfxEdsadc_getPositiveInputLineConfiguration | ( | Ifx_EDSADC * | edsadc,
 |  | IfxEdsadc_ChannelId | channel
 | ) |  |

Returns the positive input line configuration.

Parameters
edsadc | Pointer to EDSADC module SFRs
channel | Channel Number
Returns
Positive Input Line Configuration

Definition at line 1053 of file IfxEdsadc.h.

◆ IfxEdsadc_getResultRegisterAddress()

IFX_INLINE uint32 * IfxEdsadc_getResultRegisterAddress | ( | Ifx_EDSADC * | edsadc,
 |  | IfxEdsadc_ChannelId | channel
 | ) |  |

Returns the address of the result register.

Parameters
edsadc | Pointer to EDSADC module SFRs
channel | Channel Number
Returns
Address of the result register

Definition at line 1071 of file IfxEdsadc.h.

◆ IfxEdsadc_setCommonModeVoltage()

IFX_EXTERN void IfxEdsadc_setCommonModeVoltage | ( | Ifx_EDSADC * | edsadc,
 |  | IfxEdsadc_ChannelId | channel,
 |  | IfxEdsadc_FractionalRefVoltageSelection | voltage,
 |  | IfxEdsadc_FractionalRefVoltage | refMode,
 |  | IfxEdsadc_HalfSupplyVoltage | hsvMode,
 |  | IfxEdsadc_CommonModeHoldVoltage | cmhvMode,
 |  | uint8 | positiveInput,
 |  | uint8 | negativeInput
 | ) |  |

set common mode voltage Parameters

Parameters
edsadc | Pointer to Module space
channel | specifies channel Id
voltage | select Fractional reference Voltage
refMode | Fractional Reference Voltage Enable/ Disable
hsvMode | Enable / Disable Half Supply Voltage
cmhvMode | Enable / Disable Common Mode Hold Voltage
positiveInput | Defines the connection of the respective positive input y to the common mode hold voltage
negativeInput | Defines the connection of the respective negative input y to the common mode hold voltage.
Returns
None

Definition at line 211 of file IfxEdsadc.c.

Referenced by IfxEdsadc_Edsadc_initCommonModeVoltage().

◆ IfxEdsadc_setGainCalibration()

IFX_EXTERN void IfxEdsadc_setGainCalibration | ( | Ifx_EDSADC * | edsadc,
 |  | IfxEdsadc_ChannelId | channel,
 |  | uint16 | calFactor,
 |  | uint16 | calTarget
 | ) |  |
Parameters
edsadc | Pointer to EDSADC module SFRs
channel | Channel Number to be configured
calFactor | Multiplication Factor for Gain Calibration
calTarget | Target Value for Calibrated Fullscale
Returns
None

Definition at line 260 of file IfxEdsadc.c.

Referenced by IfxEdsadc_Edsadc_initChannel().

◆ IfxEdsadc_setGainControl()

IFX_EXTERN void IfxEdsadc_setGainControl | ( | Ifx_EDSADC * | edsadc,
 |  | IfxEdsadc_ChannelId | channel,
 |  | uint16 | gainFactor,
 |  | uint8 | cicShift,
 |  | uint8 | cicDecimationRate
 | ) |  |
Parameters
edsadc | Pointer to EDSADC SFRs
channel | chanel no
gainFactor | Multiplication Factor for Gain Correction During Calibration
cicShift | Position of the CIC Filter Output Shifter During Calibration
cicDecimationRate | Decimation Rate of the CIC Filter During Calibration
Returns
None

Definition at line 248 of file IfxEdsadc.c.

Referenced by IfxEdsadc_Edsadc_initChannel().

◆ IfxEdsadc_setGainCorrectionFactor()

IFX_EXTERN void IfxEdsadc_setGainCorrectionFactor | ( | Ifx_EDSADC * | edsadc,
 |  | IfxEdsadc_ChannelId | channel,
 |  | uint16 | gainFactor,
 |  | uint8 | cicShift
 | ) |  |

configure gain correction

Parameters
edsadc | Pointer to the EDSADC register space
channel | Specifies channel ID
gainFactor | Multiplication Factor for gain correction
cicShift | Position of CIC filter output shifter
Returns
None

Definition at line 226 of file IfxEdsadc.c.

Referenced by IfxEdsadc_Edsadc_setGainCorrectionFactor().

◆ IfxEdsadc_setOffsetCompensationValue()

IFX_INLINE void IfxEdsadc_setOffsetCompensationValue | ( | Ifx_EDSADC * | edsadc,
 |  | IfxEdsadc_ChannelId | channel,
 |  | uint16 | value
 | ) |  |

Sets the Offset compensation Value.

Parameters
edsadc | Pointer to EDSADC module SFRs
channel | Channel Number to be configured
value | Value to be set
Returns
None

Definition at line 1065 of file IfxEdsadc.h.

◆ IfxEdsadc_setTimeStampCounter()

IFX_EXTERN void IfxEdsadc_setTimeStampCounter | ( | Ifx_EDSADC * | edsadc,
 |  | IfxEdsadc_ChannelId | channel,
 |  | IfxEdsadc_TimeStampCounterClockSelection | timeStampCounterClock,
 |  | IfxEdsadc_TimeStampCounterControl | runControl,
 |  | IfxEdsadc_AnalogMux | analogMuxCopy
 | ) |  |
Parameters
edsadc | Pointer to module space
channel | specifies channel ID
timeStampCounterClock | Time Stamp Counter Clock selection
runControl | TimeStamp Counter Run Control
analogMuxCopy | Analog MUX Setting Copy Enable
Returns
None

Definition at line 237 of file IfxEdsadc.c.

Referenced by IfxEdsadc_Edsadc_initTimeStampCounter().


iLLD_TC38A: ERAY

Modules | Files
ERAY
iLLD
Collaboration diagram for ERAY:

Modules

Implementation
Standard Driver
ERAY Pin Mapping
How to use the ERAY Interface driver?
ERAY

Files

file | IfxEray_cfg.h
ERAY on-chip implementation data.
file | IfxEray_PinMap.c
ERAY I/O map.
file | IfxEray_PinMap.h
ERAY I/O map.
file | IfxEray_Eray.h
ERAY ERAY details.
file | IfxEray.h
ERAY basic functionality.

Detailed Description


iLLD_TC38A: Implementation

Modules
Implementation
iLLD » ERAY
Collaboration diagram for Implementation:

Modules

Enumerations

Detailed Description


iLLD_TC38A: Enumerations

Enumerations | Variables
Enumerations
iLLD » ERAY » Implementation
Collaboration diagram for Enumerations:

Enumerations

enum IfxEray_Index {
IfxEray_Index_none = -1,
IfxEray_Index_0 = 0,
IfxEray_Index_1
}
List of the available Eray resources. More...
enum IfxEray_NodeId {
IfxEray_NodeId_a = 0,
IfxEray_NodeId_b = 1,
IfxEray_NodeId_none = -1
}
Node Id in communication cycle. More...

Variables

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxEray_cfg_indexMap [IFXERAY_NUM_MODULES]

Detailed Description

Enumeration Type Documentation

◆ IfxEray_Index

enum IfxEray_Index

List of the available Eray resources.

Enumerator
IfxEray_Index_none | Not Selected.
IfxEray_Index_0 | ERAY index 0.
IfxEray_Index_1 | ERAY index 1.

Definition at line 79 of file IfxEray_cfg.h.

◆ IfxEray_NodeId

enum IfxEray_NodeId

Node Id in communication cycle.

Enumerator
IfxEray_NodeId_a | Ifx_ERAY Node A.
IfxEray_NodeId_b | Ifx_ERAY Node B.
IfxEray_NodeId_none | None of the Ifx_ERAY Nodes.

Definition at line 88 of file IfxEray_cfg.h.

Variable Documentation

◆ IfxEray_cfg_indexMap

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxEray_cfg_indexMap[IFXERAY_NUM_MODULES]

Definition at line 104 of file IfxEray_cfg.h.


iLLD_TC38A: Standard Driver

Modules
Standard Driver
iLLD » ERAY
Collaboration diagram for Standard Driver:

Modules

Enumerations
Interrupt Functions
IO Pin Configuration Functions
Module Functions
Status Functions
Configuration Functions
Data Structures
Operative Functions

Detailed Description


iLLD_TC38A: Enumerations

Enumerations
Enumerations
iLLD » ERAY » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxEray_Baudrate {
IfxEray_Baudrate_10 = 0,
IfxEray_Baudrate_5 = 1,
IfxEray_Baudrate_2_5 = 2
}
Baudrate on the flexray bus, defined in MODULE_ERAY0.PRTC1.B.BRP. More...
enum IfxEray_BufferDirection {
IfxEray_BufferDirection_receive = 0,
IfxEray_BufferDirection_transmit = 1
}
wheather transmit buffer or receive buffer, defined in MODULE_ERAY0.WRHS1.B.CFG. More...
enum IfxEray_Channel {
IfxEray_Channel_a = 0,
IfxEray_Channel_b = 1
}
Channel Id. More...
enum IfxEray_ClearErrorFlag {
IfxEray_ClearErrorFlag_pemc = 1,
IfxEray_ClearErrorFlag_cna = 2,
IfxEray_ClearErrorFlag_sfbm = 4,
IfxEray_ClearErrorFlag_sfo = 8,
IfxEray_ClearErrorFlag_ccf = 16,
IfxEray_ClearErrorFlag_ccl = 32,
IfxEray_ClearErrorFlag_eerr = 64,
IfxEray_ClearErrorFlag_rfo = 128,
IfxEray_ClearErrorFlag_efa = 256,
IfxEray_ClearErrorFlag_iiba = 512,
IfxEray_ClearErrorFlag_ioba = 1024,
IfxEray_ClearErrorFlag_mhf = 2048,
IfxEray_ClearErrorFlag_eda = 65536,
IfxEray_ClearErrorFlag_ltva = 131072,
IfxEray_ClearErrorFlag_taba = 262144,
IfxEray_ClearErrorFlag_edb = 16777216,
IfxEray_ClearErrorFlag_ltvb = 33554432,
IfxEray_ClearErrorFlag_tabb = 67108864
}
Selection of error flag to clear defined in MODULE_ERAY.EIR.U. More...
enum IfxEray_ClearStatusFlag {
IfxEray_ClearStatusFlag_wst = 1,
IfxEray_ClearStatusFlag_cas = 2,
IfxEray_ClearStatusFlag_cycs = 4,
IfxEray_ClearStatusFlag_txi = 8,
IfxEray_ClearStatusFlag_rxi = 16,
IfxEray_ClearStatusFlag_rfne = 32,
IfxEray_ClearStatusFlag_rfcl = 64,
IfxEray_ClearStatusFlag_nmvc = 128,
IfxEray_ClearStatusFlag_ti0 = 256,
IfxEray_ClearStatusFlag_ti1 = 512,
IfxEray_ClearStatusFlag_tibc = 1024,
IfxEray_ClearStatusFlag_tobc = 2048,
IfxEray_ClearStatusFlag_swe = 4096,
IfxEray_ClearStatusFlag_sucs = 8192,
IfxEray_ClearStatusFlag_mbsi = 16384,
IfxEray_ClearStatusFlag_sds = 32768,
IfxEray_ClearStatusFlag_wupa = 65536,
IfxEray_ClearStatusFlag_mtsa = 131072,
IfxEray_ClearStatusFlag_wupb = 16777216,
IfxEray_ClearStatusFlag_mtsb = 33554432
}
Selection of status flag to clear defined in MODULE_ERAY.SIR.U. More...
enum IfxEray_ClockDivider {
IfxEray_ClockDivider_none = 0,
IfxEray_ClockDivider_1 = 1,
IfxEray_ClockDivider_2,
IfxEray_ClockDivider_3,
IfxEray_ClockDivider_4,
IfxEray_ClockDivider_5,
IfxEray_ClockDivider_6,
IfxEray_ClockDivider_7
}
Clock divider in RUN mode, defined in MODULE_ERAY0.B.RMC. More...
enum IfxEray_ExternalOffset {
IfxEray_ExternalOffset_noCorrection = 1,
IfxEray_ExternalOffset_correctionSubtracted = 2,
IfxEray_ExternalOffset_correctionAdded = 3
}
External offset correction control defined in MODULE_ERAY0.GTU11.B.EOCC. More...
enum IfxEray_ExternalOffsetCorrection {
IfxEray_ExternalOffsetCorrection_0 = 0,
IfxEray_ExternalOffsetCorrection_1,
IfxEray_ExternalOffsetCorrection_2,
IfxEray_ExternalOffsetCorrection_3,
IfxEray_ExternalOffsetCorrection_4,
IfxEray_ExternalOffsetCorrection_5,
IfxEray_ExternalOffsetCorrection_6,
IfxEray_ExternalOffsetCorrection_7
}
External clock offset correction value defined in MODULE_ERAY0.GTU11.B.EOC. More...
enum IfxEray_ExternalRate {
IfxEray_ExternalRate_noCorrection = 1,
IfxEray_ExternalRate_correctionSubtracted = 2,
IfxEray_ExternalRate_correctionAdded = 3
}
External rate correction control MODULE_ERAY0.GTU11.B.ERCC. More...
enum IfxEray_ExternalRateCorrection {
IfxEray_ExternalRateCorrection_0 = 0,
IfxEray_ExternalRateCorrection_1,
IfxEray_ExternalRateCorrection_2,
IfxEray_ExternalRateCorrection_3,
IfxEray_ExternalRateCorrection_4,
IfxEray_ExternalRateCorrection_5,
IfxEray_ExternalRateCorrection_6,
IfxEray_ExternalRateCorrection_7
}
External clock rate correction value defined in MODULE_ERAY0.GTU11.B.ERC. More...
enum IfxEray_IdleDynamicSlots {
IfxEray_IdleDynamicSlots_0 = 0,
IfxEray_IdleDynamicSlots_1,
IfxEray_IdleDynamicSlots_2
}
Duration of dynamic slot idle phase, defined in MODULE_ERAY0.B.DSI. More...
enum IfxEray_InterruptLine {
IfxEray_InterruptLine_0 = 0,
IfxEray_InterruptLine_1 = 1
}
Interrupt lines. More...
enum IfxEray_ListenTimeOutNoise {
IfxEray_ListenTimeOutNoise_2 = 1,
IfxEray_ListenTimeOutNoise_3,
IfxEray_ListenTimeOutNoise_4,
IfxEray_ListenTimeOutNoise_5,
IfxEray_ListenTimeOutNoise_6,
IfxEray_ListenTimeOutNoise_7,
IfxEray_ListenTimeOutNoise_8,
IfxEray_ListenTimeOutNoise_9,
IfxEray_ListenTimeOutNoise_10,
IfxEray_ListenTimeOutNoise_11,
IfxEray_ListenTimeOutNoise_12,
IfxEray_ListenTimeOutNoise_13,
IfxEray_ListenTimeOutNoise_14,
IfxEray_ListenTimeOutNoise_15,
IfxEray_ListenTimeOutNoise_16
}
Wakeup or Startup listen timeout in presence of noise, defined in MODULE_ERAY0.SUCC2.B.LTN. More...
enum IfxEray_MaxSynchFrames {
IfxEray_MaxSynchFrames_2 = 2,
IfxEray_MaxSynchFrames_3,
IfxEray_MaxSynchFrames_4,
IfxEray_MaxSynchFrames_5,
IfxEray_MaxSynchFrames_6,
IfxEray_MaxSynchFrames_7,
IfxEray_MaxSynchFrames_8,
IfxEray_MaxSynchFrames_9,
IfxEray_MaxSynchFrames_10,
IfxEray_MaxSynchFrames_11,
IfxEray_MaxSynchFrames_12,
IfxEray_MaxSynchFrames_13,
IfxEray_MaxSynchFrames_14,
IfxEray_MaxSynchFrames_15
}
Maximum number of sync frames in a cluster defined in MODULE_ERAY0.GTU02.B.SNM. More...
enum IfxEray_PocCommand {
IfxEray_PocCommand_notAccepted = 0,
IfxEray_PocCommand_config = 1,
IfxEray_PocCommand_ready = 2,
IfxEray_PocCommand_wakeup = 3,
IfxEray_PocCommand_run = 4,
IfxEray_PocCommand_allSlots = 5,
IfxEray_PocCommand_halt = 6,
IfxEray_PocCommand_freeze = 7,
IfxEray_PocCommand_sendMts = 8,
IfxEray_PocCommand_coldStart = 9,
IfxEray_PocCommand_reset = 10,
IfxEray_PocCommand_monitor = 11,
IfxEray_PocCommand_clearRam = 12
}
Commmand to control the Communication, defined in MODULE_ERAY0.SUCC1.B.CMD. More...
enum IfxEray_PocState {
IfxEray_PocState_defaultConfig = 0,
IfxEray_PocState_ready = 1,
IfxEray_PocState_normalActive = 2,
IfxEray_PocState_normalPassive = 3,
IfxEray_PocState_halt = 4,
IfxEray_PocState_monitor = 5,
IfxEray_PocState_config = 15,
IfxEray_PocState_wakeupStandby = 16,
IfxEray_PocState_wakeupListen = 17,
IfxEray_PocState_wakeupSend = 18,
IfxEray_PocState_wakeupDetect = 19,
IfxEray_PocState_startup = 32,
IfxEray_PocState_coldStartListen = 33,
IfxEray_PocState_collisionResolution = 34,
IfxEray_PocState_consistencyCheck = 35,
IfxEray_PocState_gap = 36,
IfxEray_PocState_join = 37,
IfxEray_PocState_integrationCheck = 38,
IfxEray_PocState_integrationListen = 39,
IfxEray_PocState_integrationConsistencyCheck = 40,
IfxEray_PocState_initializeSchedule = 41,
IfxEray_PocState_staruAborted = 42,
IfxEray_PocState_startupSucced = 43
}
State of Communication Controller Protocol operation control, defined in MODULE_ERAY0.CCSV.B.POCS. More...
enum IfxEray_ReceiveChannel {
IfxEray_ReceiveChannel_both = 0,
IfxEray_ReceiveChannel_b = 1,
IfxEray_ReceiveChannel_a = 2,
IfxEray_ReceiveChannel_none = 3
}
Receiving channel, defined in MODULE_ERAY0.FRF.B.CH. More...
enum IfxEray_SleepMode {
IfxEray_SleepMode_enable = 0,
IfxEray_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_ERAY.CLC.B.EDIS. More...
enum IfxEray_StrobePosition {
IfxEray_StrobePosition_5 = 0,
IfxEray_StrobePosition_4 = 1,
IfxEray_StrobePosition_6 = 2
}
Sample count value for strobing, defined in MODULE_ERAY0.PRTC1.B.SPP. More...
enum IfxEray_SuspendMode {
IfxEray_SuspendMode_none = 0,
IfxEray_SuspendMode_hard = 1,
IfxEray_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxEray_TransmissionMode {
IfxEray_TransmissionMode_continuous = 0,
IfxEray_TransmissionMode_singleShot = 1
}
Transmission mode of Header, defined in MODULE_ERAY0.WRHS1.B.TXM. More...
enum IfxEray_TransmissionSlotMode {
IfxEray_TransmissionSlotMode_all = 0,
IfxEray_TransmissionSlotMode_single = 1
}
Initial transmission mode, defined in MODULE_ERAY0.SUCC1.B.TSM. More...
enum IfxEray_WakeupChannel {
IfxEray_WakeupChannel_a = 0,
IfxEray_WakeupChannel_b = 1
}
Wakeup pattern carry channel, defined in MODULE_ERAY0.SUCC1.B.WUCS. More...

Detailed Description

Enumeration Type Documentation

◆ IfxEray_Baudrate

enum IfxEray_Baudrate

Baudrate on the flexray bus, defined in MODULE_ERAY0.PRTC1.B.BRP.

Enumerator
IfxEray_Baudrate_10 | baudrate is 10MBits/Sec
IfxEray_Baudrate_5 | baudrate is 5MBits/Sec
IfxEray_Baudrate_2_5 | baudrate is 2.5MBits/Sec

Definition at line 79 of file IfxEray.h.

◆ IfxEray_BufferDirection

enum IfxEray_BufferDirection

wheather transmit buffer or receive buffer, defined in MODULE_ERAY0.WRHS1.B.CFG.

Enumerator
IfxEray_BufferDirection_receive | buffer is configured as receive buffer
IfxEray_BufferDirection_transmit | buffer is configured as transmit buffer

Definition at line 88 of file IfxEray.h.

◆ IfxEray_Channel

enum IfxEray_Channel

Channel Id.

Enumerator
IfxEray_Channel_a | channel A
IfxEray_Channel_b | channel B

Definition at line 96 of file IfxEray.h.

◆ IfxEray_ClearErrorFlag

enum IfxEray_ClearErrorFlag

Selection of error flag to clear defined in MODULE_ERAY.EIR.U.

Enumerator
IfxEray_ClearErrorFlag_pemc | POC error mode change bit.
IfxEray_ClearErrorFlag_cna | command not accepted event bit.
IfxEray_ClearErrorFlag_sfbm | sync frame below minimum bit.
IfxEray_ClearErrorFlag_sfo | sync frame overflow event bit
IfxEray_ClearErrorFlag_ccf | clock correction failure event.
IfxEray_ClearErrorFlag_ccl | CHI command locked event.
IfxEray_ClearErrorFlag_eerr | ECC error event bit.
IfxEray_ClearErrorFlag_rfo | RxFIFO overrun event bit.
IfxEray_ClearErrorFlag_efa | empty FIFO access event bit.
IfxEray_ClearErrorFlag_iiba | illegal input buffer access event.
IfxEray_ClearErrorFlag_ioba | illegal output buffer access event.
IfxEray_ClearErrorFlag_mhf | message handler constraint flag.
IfxEray_ClearErrorFlag_eda | error event on channel A.
IfxEray_ClearErrorFlag_ltva | latest transmit violation flag on channel A .
IfxEray_ClearErrorFlag_taba | transmission across channel A boundary flag.
IfxEray_ClearErrorFlag_edb | error event on channel B.
IfxEray_ClearErrorFlag_ltvb | latest transmit violation flag on channel B .
IfxEray_ClearErrorFlag_tabb | transmission across channel B boundary flag.

Definition at line 104 of file IfxEray.h.

◆ IfxEray_ClearStatusFlag

enum IfxEray_ClearStatusFlag

Selection of status flag to clear defined in MODULE_ERAY.SIR.U.

Enumerator
IfxEray_ClearStatusFlag_wst | wakeup status bit.
IfxEray_ClearStatusFlag_cas | collision avoidance bit.
IfxEray_ClearStatusFlag_cycs | cycle start service bit.
IfxEray_ClearStatusFlag_txi | transmit service request bit.
IfxEray_ClearStatusFlag_rxi | receive service request bit.
IfxEray_ClearStatusFlag_rfne | receive fifo not empty bit.
IfxEray_ClearStatusFlag_rfcl | RxFIFO critical level reached bit.
IfxEray_ClearStatusFlag_nmvc | network management vector bit.
IfxEray_ClearStatusFlag_ti0 | timer0 service request bit.
IfxEray_ClearStatusFlag_ti1 | timer1 service request bit.
IfxEray_ClearStatusFlag_tibc | transfer input buffer completion request bit.
IfxEray_ClearStatusFlag_tobc | transfer output buffer completion request bit.
IfxEray_ClearStatusFlag_swe | stop watch event bit.
IfxEray_ClearStatusFlag_sucs | startup success event bit.
IfxEray_ClearStatusFlag_mbsi | message buffer service status bit.
IfxEray_ClearStatusFlag_sds | dynamic segment start bit.
IfxEray_ClearStatusFlag_wupa | wakeup pattern channel A bit.
IfxEray_ClearStatusFlag_mtsa | MTS receive channel A bit.
IfxEray_ClearStatusFlag_wupb | wakeup pattern channel B bit.
IfxEray_ClearStatusFlag_mtsb | MTS receive channel B bit.

Definition at line 128 of file IfxEray.h.

◆ IfxEray_ClockDivider

enum IfxEray_ClockDivider

Clock divider in RUN mode, defined in MODULE_ERAY0.B.RMC.

Enumerator
IfxEray_ClockDivider_none | no clock signal
IfxEray_ClockDivider_1 | run mode clock divider 1
IfxEray_ClockDivider_2 | run mode clock divider 2
IfxEray_ClockDivider_3 | run mode clock divider 3
IfxEray_ClockDivider_4 | run mode clock divider 4
IfxEray_ClockDivider_5 | run mode clock divider 5
IfxEray_ClockDivider_6 | run mode clock divider 6
IfxEray_ClockDivider_7 | run mode clock divider 7

Definition at line 154 of file IfxEray.h.

◆ IfxEray_ExternalOffset

enum IfxEray_ExternalOffset

External offset correction control defined in MODULE_ERAY0.GTU11.B.EOCC.

Enumerator
IfxEray_ExternalOffset_noCorrection | No external correction control.
IfxEray_ExternalOffset_correctionSubtracted | External offset correction subtracted from calculated correction.
IfxEray_ExternalOffset_correctionAdded | External offset correction added to calculated correction.

Definition at line 168 of file IfxEray.h.

◆ IfxEray_ExternalOffsetCorrection

enum IfxEray_ExternalOffsetCorrection

External clock offset correction value defined in MODULE_ERAY0.GTU11.B.EOC.

Enumerator
IfxEray_ExternalOffsetCorrection_0 | external clock offset correction value 0
IfxEray_ExternalOffsetCorrection_1 | external clock offset correction value 1
IfxEray_ExternalOffsetCorrection_2 | external clock offset correction value 2
IfxEray_ExternalOffsetCorrection_3 | external clock offset correction value 3
IfxEray_ExternalOffsetCorrection_4 | external clock offset correction value 4
IfxEray_ExternalOffsetCorrection_5 | external clock offset correction value 5
IfxEray_ExternalOffsetCorrection_6 | external clock offset correction value 6
IfxEray_ExternalOffsetCorrection_7 | external clock offset correction value 7

Definition at line 177 of file IfxEray.h.

◆ IfxEray_ExternalRate

enum IfxEray_ExternalRate

External rate correction control MODULE_ERAY0.GTU11.B.ERCC.

Enumerator
IfxEray_ExternalRate_noCorrection | No external correction control.
IfxEray_ExternalRate_correctionSubtracted | External rate correction subtracted from calculated correction.
IfxEray_ExternalRate_correctionAdded | External rate correction added to calculated correction.

Definition at line 191 of file IfxEray.h.

◆ IfxEray_ExternalRateCorrection

enum IfxEray_ExternalRateCorrection

External clock rate correction value defined in MODULE_ERAY0.GTU11.B.ERC.

Enumerator
IfxEray_ExternalRateCorrection_0 | external clock rate correction value 0
IfxEray_ExternalRateCorrection_1 | external clock rate correction value 1
IfxEray_ExternalRateCorrection_2 | external clock rate correction value 2
IfxEray_ExternalRateCorrection_3 | external clock rate correction value 3
IfxEray_ExternalRateCorrection_4 | external clock rate correction value 4
IfxEray_ExternalRateCorrection_5 | external clock rate correction value 5
IfxEray_ExternalRateCorrection_6 | external clock rate correction value 6
IfxEray_ExternalRateCorrection_7 | external clock rate correction value 7

Definition at line 200 of file IfxEray.h.

◆ IfxEray_IdleDynamicSlots

enum IfxEray_IdleDynamicSlots

Duration of dynamic slot idle phase, defined in MODULE_ERAY0.B.DSI.

Enumerator
IfxEray_IdleDynamicSlots_0 | duration of dynamic slot idle phase is 0
IfxEray_IdleDynamicSlots_1 | duration of dynamic slot idle phase is 1
IfxEray_IdleDynamicSlots_2 | duration of dynamic slot idle phase is 2

Definition at line 214 of file IfxEray.h.

◆ IfxEray_InterruptLine

enum IfxEray_InterruptLine

Interrupt lines.

Enumerator
IfxEray_InterruptLine_0 | line 0
IfxEray_InterruptLine_1 | line 1

Definition at line 223 of file IfxEray.h.

◆ IfxEray_ListenTimeOutNoise

enum IfxEray_ListenTimeOutNoise

Wakeup or Startup listen timeout in presence of noise, defined in MODULE_ERAY0.SUCC2.B.LTN.

Enumerator
IfxEray_ListenTimeOutNoise_2 | listen Time-out noise 2
IfxEray_ListenTimeOutNoise_3 | listen Time-out noise 3
IfxEray_ListenTimeOutNoise_4 | listen Time-out noise 4
IfxEray_ListenTimeOutNoise_5 | listen Time-out noise 5
IfxEray_ListenTimeOutNoise_6 | listen Time-out noise 6
IfxEray_ListenTimeOutNoise_7 | listen Time-out noise 7
IfxEray_ListenTimeOutNoise_8 | listen Time-out noise 8
IfxEray_ListenTimeOutNoise_9 | listen Time-out noise 9
IfxEray_ListenTimeOutNoise_10 | listen Time-out noise 10
IfxEray_ListenTimeOutNoise_11 | listen Time-out noise 11
IfxEray_ListenTimeOutNoise_12 | listen Time-out noise 12
IfxEray_ListenTimeOutNoise_13 | listen Time-out noise 13
IfxEray_ListenTimeOutNoise_14 | listen Time-out noise 14
IfxEray_ListenTimeOutNoise_15 | listen Time-out noise 15
IfxEray_ListenTimeOutNoise_16 | listen Time-out noise 16

Definition at line 231 of file IfxEray.h.

◆ IfxEray_MaxSynchFrames

enum IfxEray_MaxSynchFrames

Maximum number of sync frames in a cluster defined in MODULE_ERAY0.GTU02.B.SNM.

Enumerator
IfxEray_MaxSynchFrames_2 | Maximum number of sync frames in a cluster are 2.
IfxEray_MaxSynchFrames_3 | Maximum number of sync frames in a cluster are 3.
IfxEray_MaxSynchFrames_4 | Maximum number of sync frames in a cluster are 4.
IfxEray_MaxSynchFrames_5 | Maximum number of sync frames in a cluster are 5.
IfxEray_MaxSynchFrames_6 | Maximum number of sync frames in a cluster are 6.
IfxEray_MaxSynchFrames_7 | Maximum number of sync frames in a cluster are 7.
IfxEray_MaxSynchFrames_8 | Maximum number of sync frames in a cluster are 8.
IfxEray_MaxSynchFrames_9 | Maximum number of sync frames in a cluster are 9.
IfxEray_MaxSynchFrames_10 | Maximum number of sync frames in a cluster are 10.
IfxEray_MaxSynchFrames_11 | Maximum number of sync frames in a cluster are 11.
IfxEray_MaxSynchFrames_12 | Maximum number of sync frames in a cluster are 12.
IfxEray_MaxSynchFrames_13 | Maximum number of sync frames in a cluster are 13.
IfxEray_MaxSynchFrames_14 | Maximum number of sync frames in a cluster are 14.
IfxEray_MaxSynchFrames_15 | Maximum number of sync frames in a cluster are 15.

Definition at line 252 of file IfxEray.h.

◆ IfxEray_PocCommand

enum IfxEray_PocCommand

Commmand to control the Communication, defined in MODULE_ERAY0.SUCC1.B.CMD.

Enumerator
IfxEray_PocCommand_notAccepted | command not accepted.
IfxEray_PocCommand_config | command to controller to enter CONFIG
IfxEray_PocCommand_ready | command to controller to enter READY.
IfxEray_PocCommand_wakeup | command to controller to enter WAKEUP
IfxEray_PocCommand_run | command to controller to enter RUN
IfxEray_PocCommand_allSlots | command to controller to enter ALL_SLOTS
IfxEray_PocCommand_halt | command to controller to enter HALT
IfxEray_PocCommand_freeze | command to controller to enter FREEZE
IfxEray_PocCommand_sendMts | command to controller to enter SEND_MTS
IfxEray_PocCommand_coldStart | command to controller to enter COLD_START
IfxEray_PocCommand_reset | command to controller to enter RESET
IfxEray_PocCommand_monitor | command to controller to enter MONITOR
IfxEray_PocCommand_clearRam | command to controller to enter CLEAR_RAM

Definition at line 272 of file IfxEray.h.

◆ IfxEray_PocState

enum IfxEray_PocState

State of Communication Controller Protocol operation control, defined in MODULE_ERAY0.CCSV.B.POCS.

Enumerator
IfxEray_PocState_defaultConfig | controller entered default config state
IfxEray_PocState_ready | controller entered ready state
IfxEray_PocState_normalActive | controller entered normal-active state
IfxEray_PocState_normalPassive | controller entered normal-passive state
IfxEray_PocState_halt | controller entered halt state
IfxEray_PocState_monitor | controller entered monitor state
IfxEray_PocState_config | controller entered config state
IfxEray_PocState_wakeupStandby | controller entered wakeup standby state
IfxEray_PocState_wakeupListen | controller entered wakeup-listen state
IfxEray_PocState_wakeupSend | controller entered wakeup-send state
IfxEray_PocState_wakeupDetect | controller entered wakeup-detection state
IfxEray_PocState_startup | controller entered startup state
IfxEray_PocState_coldStartListen | controller entered clod-start listen state
IfxEray_PocState_collisionResolution | controller entered collission-resolution state.
IfxEray_PocState_consistencyCheck | controller entered consistency-check.
IfxEray_PocState_gap | controller entered gap state.
IfxEray_PocState_join | controller entered join state.
IfxEray_PocState_integrationCheck | controller entered integration-check.
IfxEray_PocState_integrationListen | controller entered integration-listen state.
IfxEray_PocState_integrationConsistencyCheck | controller entered integration consistency check state
IfxEray_PocState_initializeSchedule | controller entered initialise schedule state
IfxEray_PocState_staruAborted | controller entered startup-abort state
IfxEray_PocState_startupSucced | controller entered startup succeed state.

Definition at line 291 of file IfxEray.h.

◆ IfxEray_ReceiveChannel

enum IfxEray_ReceiveChannel

Receiving channel, defined in MODULE_ERAY0.FRF.B.CH.

Enumerator
IfxEray_ReceiveChannel_both | both channels for reception
IfxEray_ReceiveChannel_b | channel A for reception
IfxEray_ReceiveChannel_a | channel B for reception
IfxEray_ReceiveChannel_none | none channels for reception

Definition at line 320 of file IfxEray.h.

◆ IfxEray_SleepMode

enum IfxEray_SleepMode

Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_ERAY.CLC.B.EDIS.

Enumerator
IfxEray_SleepMode_enable | enables sleep mode
IfxEray_SleepMode_disable | disables sleep mode

Definition at line 331 of file IfxEray.h.

◆ IfxEray_StrobePosition

enum IfxEray_StrobePosition

Sample count value for strobing, defined in MODULE_ERAY0.PRTC1.B.SPP.

Enumerator
IfxEray_StrobePosition_5 | Sample count 5 for strobing.
IfxEray_StrobePosition_4 | Sample count 4 for strobing.
IfxEray_StrobePosition_6 | Sample count 6 for strobing.

Definition at line 339 of file IfxEray.h.

◆ IfxEray_SuspendMode

enum IfxEray_SuspendMode

OCDS Suspend Control (OCDS.SUS)

Enumerator
IfxEray_SuspendMode_none | No suspend.
IfxEray_SuspendMode_hard | Hard Suspend.
IfxEray_SuspendMode_soft | Soft Suspend.

Definition at line 348 of file IfxEray.h.

◆ IfxEray_TransmissionMode

enum IfxEray_TransmissionMode

Transmission mode of Header, defined in MODULE_ERAY0.WRHS1.B.TXM.

Enumerator
IfxEray_TransmissionMode_continuous | continuos transmission mode
IfxEray_TransmissionMode_singleShot | single transmission mode

Definition at line 357 of file IfxEray.h.

◆ IfxEray_TransmissionSlotMode

enum IfxEray_TransmissionSlotMode

Initial transmission mode, defined in MODULE_ERAY0.SUCC1.B.TSM.

Enumerator
IfxEray_TransmissionSlotMode_all | transmission in all slots.
IfxEray_TransmissionSlotMode_single | transmission in key slot.

Definition at line 365 of file IfxEray.h.

◆ IfxEray_WakeupChannel

enum IfxEray_WakeupChannel

Wakeup pattern carry channel, defined in MODULE_ERAY0.SUCC1.B.WUCS.

Enumerator
IfxEray_WakeupChannel_a | send wakeup channel pattern on channel A
IfxEray_WakeupChannel_b | send wakeup channel pattern on channel B

Definition at line 373 of file IfxEray.h.


iLLD_TC38A: Interrupt Functions

Functions
Interrupt Functions
iLLD » ERAY » Standard Driver
Collaboration diagram for Interrupt Functions:

Functions

IFX_INLINE void | IfxEray_clearErrorFlag (Ifx_ERAY *eray, IfxEray_ClearErrorFlag errorFlag)
Clears the error flag requested. More...
IFX_INLINE void | IfxEray_clearStatusFlag (Ifx_ERAY *eray, IfxEray_ClearStatusFlag statusFlag)
Clears the status flag requested. More...
IFX_INLINE Ifx_ERAY_EIR | IfxEray_getErrorInterrupts (Ifx_ERAY *eray)
Gets the error interrupt flags. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getInputBufferBusySrcPtr (Ifx_ERAY *eray)
Gets the IBUSY service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getInterruptLine0SrcPtr (Ifx_ERAY *eray)
Gets the INT0 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getInterruptLine1SrcPtr (Ifx_ERAY *eray)
Gets the INT1 service request. More...
IFX_INLINE boolean | IfxEray_getMessageBufferInterruptStatus (Ifx_ERAY *eray, uint8 messageBuffer)
Gets the message buffers interrupt status. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getMessageBufferStatus0SrcPtr (Ifx_ERAY *eray)
Gets the MBSC0 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getMessageBufferStatus1SrcPtr (Ifx_ERAY *eray)
Gets the MBSC1 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getNewDataInterrupt0SrcPtr (Ifx_ERAY *eray)
Gets the NDAT0 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getNewDataInterrupt1SrcPtr (Ifx_ERAY *eray)
Gets the NDAT1 service request. More...
IFX_INLINE boolean | IfxEray_getNewDataInterruptStatus (Ifx_ERAY *eray, uint8 ndat)
Gets the new data interrupt buffers status. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getOutputBufferBusySrcPtr (Ifx_ERAY *eray)
Gets the OBUSY service request. More...
IFX_INLINE Ifx_ERAY_SIR | IfxEray_getStatusInterrupts (Ifx_ERAY *eray)
Gets the status interrupt flags. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getTimerInterrupt0SrcPtr (Ifx_ERAY *eray)
Gets the TINT0 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getTimerInterrupt1SrcPtr (Ifx_ERAY *eray)
Gets the TINT1 service request. More...
IFX_EXTERN void | IfxEray_clearAllFlags (Ifx_ERAY *eray)
Clears all the error flags. More...
IFX_EXTERN void | IfxEray_enableInterruptLines (Ifx_ERAY *eray)
Enables all the Interrupt lines. More...
IFX_EXTERN void | IfxEray_setMessageBufferInterruptDestination (Ifx_ERAY *eray, uint8 messageBuffer, uint8 messageBufferDestination)
Selects between MBSC0 and MBSC1 interrupt destination. More...
IFX_EXTERN void | IfxEray_setNewDataInterruptDestination (Ifx_ERAY *eray, uint8 ndat, uint8 ndatDestination)
Selects between NDAT0 and NDAT1 interrupt destination. More...

Detailed Description

Function Documentation

◆ IfxEray_clearAllFlags()

IFX_EXTERN void IfxEray_clearAllFlags ( Ifx_ERAY * eray )

Clears all the error flags.

Parameters
eray pointer to ERAY module registers.
Returns
None

Definition at line 123 of file IfxEray.c.

Referenced by IfxEray_Eray_Node_init().

◆ IfxEray_clearErrorFlag()

IFX_INLINE void IfxEray_clearErrorFlag | ( | Ifx_ERAY * | eray,
 |  | IfxEray_ClearErrorFlag | errorFlag
 | ) |  |

Clears the error flag requested.

Parameters
eray | pointer to ERAY module registers.
errorFlag | error flag to be cleared.
Returns
None

Definition at line 1298 of file IfxEray.h.

Referenced by IfxEray_Eray_clearErrorFlag().

◆ IfxEray_clearStatusFlag()

IFX_INLINE void IfxEray_clearStatusFlag | ( | Ifx_ERAY * | eray,
 |  | IfxEray_ClearStatusFlag | statusFlag
 | ) |  |

Clears the status flag requested.

Parameters
eray | pointer to ERAY module registers.
statusFlag | status flag to be cleared.
Returns
None

Definition at line 1304 of file IfxEray.h.

Referenced by IfxEray_Eray_clearStatusFlag().

◆ IfxEray_enableInterruptLines()

IFX_EXTERN void IfxEray_enableInterruptLines ( Ifx_ERAY * eray )

Enables all the Interrupt lines.

Parameters
eray pointer to ERAY module registers.
Returns
None

Definition at line 133 of file IfxEray.c.

Referenced by IfxEray_Eray_Node_init().

◆ IfxEray_getErrorInterrupts()

IFX_INLINE Ifx_ERAY_EIR IfxEray_getErrorInterrupts ( Ifx_ERAY * eray )

Gets the error interrupt flags.

Parameters
eray pointer to ERAY module registers.
Returns
error interrupt flags.

Definition at line 1336 of file IfxEray.h.

Referenced by IfxEray_Eray_getErrorInterrupts().

◆ IfxEray_getInputBufferBusySrcPtr()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getInputBufferBusySrcPtr ( Ifx_ERAY * eray )

Gets the IBUSY service request.

Parameters
eray pointer to ERAY module registers.
Returns
address of IBUSY service request value.

Definition at line 1370 of file IfxEray.h.

Referenced by IfxEray_Eray_initModule().

◆ IfxEray_getInterruptLine0SrcPtr()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getInterruptLine0SrcPtr ( Ifx_ERAY * eray )

Gets the INT0 service request.

Parameters
eray pointer to ERAY module registers.
Returns
address of INT0 service request value.

Definition at line 1383 of file IfxEray.h.

Referenced by IfxEray_Eray_initModule().

◆ IfxEray_getInterruptLine1SrcPtr()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getInterruptLine1SrcPtr ( Ifx_ERAY * eray )

Gets the INT1 service request.

Parameters
eray pointer to ERAY module registers.
Returns
address of INT1 service request value.

Definition at line 1396 of file IfxEray.h.

Referenced by IfxEray_Eray_initModule().

◆ IfxEray_getMessageBufferInterruptStatus()

IFX_INLINE boolean IfxEray_getMessageBufferInterruptStatus | ( | Ifx_ERAY * | eray,
 |  | uint8 | messageBuffer
 | ) |  |

Gets the message buffers interrupt status.

Parameters
eray | pointer to ERAY module registers.
messageBuffer | message buffer to which interrupt status be checked.
Returns
message buffer interrupt status.

Definition at line 1409 of file IfxEray.h.

Referenced by IfxEray_Eray_getMessageBufferInterruptStatus().

◆ IfxEray_getMessageBufferStatus0SrcPtr()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getMessageBufferStatus0SrcPtr ( Ifx_ERAY * eray )

Gets the MBSC0 service request.

Parameters
eray pointer to ERAY module registers.
Returns
address of MBSC0 service request value.

Definition at line 1420 of file IfxEray.h.

Referenced by IfxEray_Eray_initModule().

◆ IfxEray_getMessageBufferStatus1SrcPtr()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getMessageBufferStatus1SrcPtr ( Ifx_ERAY * eray )

Gets the MBSC1 service request.

Parameters
eray pointer to ERAY module registers.
Returns
address of MBSC1 service request value.

Definition at line 1433 of file IfxEray.h.

Referenced by IfxEray_Eray_initModule().

◆ IfxEray_getNewDataInterrupt0SrcPtr()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getNewDataInterrupt0SrcPtr ( Ifx_ERAY * eray )

Gets the NDAT0 service request.

Parameters
eray pointer to ERAY module registers.
Returns
address of NDAT0 service request value.

Definition at line 1446 of file IfxEray.h.

Referenced by IfxEray_Eray_initModule().

◆ IfxEray_getNewDataInterrupt1SrcPtr()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getNewDataInterrupt1SrcPtr ( Ifx_ERAY * eray )

Gets the NDAT1 service request.

Parameters
eray pointer to ERAY module registers.
Returns
address of NDAT1 service request value.

Definition at line 1459 of file IfxEray.h.

Referenced by IfxEray_Eray_initModule().

◆ IfxEray_getNewDataInterruptStatus()

IFX_INLINE boolean IfxEray_getNewDataInterruptStatus | ( | Ifx_ERAY * | eray,
 |  | uint8 | ndat
 | ) |  |

Gets the new data interrupt buffers status.

Parameters
eray | pointer to ERAY module registers.
ndat | message buffer number configured to which ndat occurs.
Returns
ndat interrupt buffer.

Definition at line 1472 of file IfxEray.h.

Referenced by IfxEray_Eray_getNewDataInterruptStatus().

◆ IfxEray_getOutputBufferBusySrcPtr()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getOutputBufferBusySrcPtr ( Ifx_ERAY * eray )

Gets the OBUSY service request.

Parameters
eray pointer to ERAY module registers.
Returns
address of OBUSY service request value.

Definition at line 1495 of file IfxEray.h.

Referenced by IfxEray_Eray_initModule().

◆ IfxEray_getStatusInterrupts()

IFX_INLINE Ifx_ERAY_SIR IfxEray_getStatusInterrupts ( Ifx_ERAY * eray )

Gets the status interrupt flags.

Parameters
eray pointer to ERAY module registers.
Returns
status interrupt flags.

Definition at line 1514 of file IfxEray.h.

Referenced by IfxEray_Eray_getStatusInterrupts().

◆ IfxEray_getTimerInterrupt0SrcPtr()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getTimerInterrupt0SrcPtr ( Ifx_ERAY * eray )

Gets the TINT0 service request.

Parameters
eray pointer to ERAY module registers.
Returns
address of TINT0 service request value.

Definition at line 1522 of file IfxEray.h.

Referenced by IfxEray_Eray_initModule().

◆ IfxEray_getTimerInterrupt1SrcPtr()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getTimerInterrupt1SrcPtr ( Ifx_ERAY * eray )

Gets the TINT1 service request.

Parameters
eray pointer to ERAY module registers.
Returns
address of TINT1 service request value.

Definition at line 1535 of file IfxEray.h.

Referenced by IfxEray_Eray_initModule().

◆ IfxEray_setMessageBufferInterruptDestination()

IFX_EXTERN void IfxEray_setMessageBufferInterruptDestination | ( | Ifx_ERAY * | eray,
 |  | uint8 | messageBuffer,
 |  | uint8 | messageBufferDestination
 | ) |  |

Selects between MBSC0 and MBSC1 interrupt destination.

Parameters
eray | pointer to ERAY module registers.
messageBuffer | message buffer interrupt which should be configured
messageBufferDestination | selects MBSC0 or MBSC1 interrupt output
Returns
None

Definition at line 247 of file IfxEray.c.

Referenced by IfxEray_Eray_setMessageBufferInterruptDestination().

◆ IfxEray_setNewDataInterruptDestination()

IFX_EXTERN void IfxEray_setNewDataInterruptDestination | ( | Ifx_ERAY * | eray,
 |  | uint8 | ndat,
 |  | uint8 | ndatDestination
 | ) |  |

Selects between NDAT0 and NDAT1 interrupt destination.

Parameters
eray | pointer to ERAY module registers.
ndat | NDAT interrupt which should be configured
ndatDestination | selects NDAT0 or NDAT1 interrupt output
Returns
None

Definition at line 264 of file IfxEray.c.

Referenced by IfxEray_Eray_setNewDataInterruptDestination().


iLLD_TC38A: IO Pin Configuration Functions

Functions
IO Pin Configuration Functions
iLLD » ERAY » Standard Driver
Collaboration diagram for IO Pin Configuration Functions:

Functions

IFX_INLINE void | IfxEray_initRxPin (const IfxEray_Rxd_In *rx, IfxPort_InputMode rxMode)
Initialises a RX pin. More...
IFX_INLINE void | IfxEray_initTxEnPin (const IfxEray_Txen_Out *txEn, IfxPort_OutputMode txEnMode, IfxPort_PadDriver padDriver)
Initializes a TX Enable output. More...
IFX_INLINE void | IfxEray_initTxPin (const IfxEray_Txd_Out *tx, IfxPort_OutputMode txMode, IfxPort_PadDriver padDriver)
Initializes a TX output. More...

Detailed Description

Function Documentation

◆ IfxEray_initRxPin()

IFX_INLINE void IfxEray_initRxPin | ( | const IfxEray_Rxd_In * | rx,
 |  | IfxPort_InputMode | rxMode
 | ) |  |

Initialises a RX pin.

Parameters
rx | the RX Pin which should be configured.
rxMode | the pin input mode which should be configured.
Returns
None

Definition at line 1565 of file IfxEray.h.

◆ IfxEray_initTxEnPin()

IFX_INLINE void IfxEray_initTxEnPin | ( | const IfxEray_Txen_Out * | txEn,
 |  | IfxPort_OutputMode | txEnMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a TX Enable output.

Parameters
txEn | the TX Enable Pin which should be configured.
txEnMode | the pin output mode which should be configured.
padDriver | the pad driver mode which should be configured.
Returns
None

Definition at line 1580 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_init().

◆ IfxEray_initTxPin()

IFX_INLINE void IfxEray_initTxPin | ( | const IfxEray_Txd_Out * | tx,
 |  | IfxPort_OutputMode | txMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a TX output.

Parameters
tx | the TX Pin which should be configured.
txMode | the pin output mode which should be configured.
padDriver | the pad driver mode which should be configured.
Returns
None

Definition at line 1587 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_init().


iLLD_TC38A: Module Functions

Functions
Module Functions
iLLD » ERAY » Standard Driver
Collaboration diagram for Module Functions:

Functions

IFX_INLINE void | IfxEray_disableModule (Ifx_ERAY *eray)
Disables the ERAY module. More...
IFX_INLINE void | IfxEray_enableModule (Ifx_ERAY *eray)
Enables the ERAY module. More...
IFX_INLINE boolean | IfxEray_isModuleSuspended (Ifx_ERAY *eray)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxEray_setSleepMode (Ifx_ERAY *eray, IfxEray_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_EXTERN Ifx_ERAY * | IfxEray_getAddress (IfxEray_Index eray)
IFX_EXTERN IfxEray_Index | IfxEray_getIndex (Ifx_ERAY *eray)
API to get the resource index of the ERAY specified. More...
IFX_EXTERN void | IfxEray_resetModule (Ifx_ERAY *eray)
Resets the ERAY kernel. More...

Detailed Description

Function Documentation

◆ IfxEray_disableModule()

IFX_INLINE void IfxEray_disableModule ( Ifx_ERAY * eray )

Disables the ERAY module.

Parameters
eray pointer to ERAY module registers.
Returns
None

Definition at line 1310 of file IfxEray.h.

◆ IfxEray_enableModule()

IFX_INLINE void IfxEray_enableModule ( Ifx_ERAY * eray )

Enables the ERAY module.

Parameters
eray pointer to ERAY module registers.
Returns
None

Definition at line 1320 of file IfxEray.h.

Referenced by IfxEray_Eray_initModule().

◆ IfxEray_getAddress()

IFX_EXTERN Ifx_ERAY* IfxEray_getAddress ( IfxEray_Index eray )
Parameters
eray Resource index of the ERAY
Returns
ERAY module register address

Definition at line 151 of file IfxEray.c.

◆ IfxEray_getIndex()

IFX_EXTERN IfxEray_Index IfxEray_getIndex ( Ifx_ERAY * eray )

API to get the resource index of the ERAY specified.

Parameters
eray Pointer to the ERAY HW module (register memory map)
Returns
Resource index of the ERAY

Definition at line 168 of file IfxEray.c.

◆ IfxEray_isModuleSuspended()

IFX_INLINE boolean IfxEray_isModuleSuspended ( Ifx_ERAY * eray )

Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended.

Parameters
eray Pointer to ERAY module registers
Returns
Suspend status (TRUE / FALSE)

Definition at line 1594 of file IfxEray.h.

◆ IfxEray_resetModule()

IFX_EXTERN void IfxEray_resetModule ( Ifx_ERAY * eray )

Resets the ERAY kernel.

Parameters
eray pointer to ERAY module registers.
Returns
None

Definition at line 227 of file IfxEray.c.

Referenced by IfxEray_Eray_deInitModule().

◆ IfxEray_setSleepMode()

IFX_INLINE void IfxEray_setSleepMode | ( | Ifx_ERAY * | eray,
 |  | IfxEray_SleepMode | mode
 | ) |  |

Sets the sensitivity of the module to sleep signal.

Parameters
eray | pointer to ERAY registers
mode | mode selection (enable/disable)
Returns
None

Definition at line 1873 of file IfxEray.h.


iLLD_TC38A: Status Functions

Functions
Status Functions
iLLD » ERAY » Standard Driver
Collaboration diagram for Status Functions:

Functions

IFX_INLINE Ifx_ERAY_FSR | IfxEray_getFifoStatus (Ifx_ERAY *eray)
Gets the FIFO status. More...
IFX_INLINE boolean | IfxEray_getInputBufferBusyHostStatus (Ifx_ERAY *eray)
Gets the Input Buffer Host Busy status. More...
IFX_INLINE uint8 | IfxEray_getInputBufferBusyShadowStatus (Ifx_ERAY *eray)
Gets the Input Buffer Shadow status. More...
IFX_INLINE uint8 | IfxEray_getOutputBuffer (Ifx_ERAY *eray)
Gets the output buffer index. More...
IFX_INLINE boolean | IfxEray_getOutputBufferBusyShadowStatus (Ifx_ERAY *eray)
Gets the Output Buffer Shadow status. More...
IFX_INLINE IfxEray_PocState | IfxEray_getPocState (Ifx_ERAY *eray)
Gets the current POC state. More...
IFX_INLINE IfxEray_WakeupChannel | IfxEray_getWakeupPatternReceivedChannel (Ifx_ERAY *eray)
Gets the received wakeup pattern channel. More...
IFX_INLINE void | IfxEray_waitForPocState (Ifx_ERAY *eray, IfxEray_PocState pocState)
Waits until the controller enters required POC state. More...
IFX_EXTERN boolean | IfxEray_changePocState (Ifx_ERAY *eray, IfxEray_PocCommand pocCommand)
Changes the Commmunication Controller state. More...
IFX_EXTERN void | IfxEray_setPocReady (Ifx_ERAY *eray)
Sets the POC state to Ready state. More...

Detailed Description

Function Documentation

◆ IfxEray_changePocState()

IFX_EXTERN boolean IfxEray_changePocState | ( | Ifx_ERAY * | eray,
 |  | IfxEray_PocCommand | pocCommand
 | ) |  |

Changes the Commmunication Controller state.

Parameters
eray | pointer to ERAY module registers.
pocCommand | POC command which triggers the Controller state.
Returns
TRUE if command accepted otherwise FALSE.

Definition at line 99 of file IfxEray.c.

Referenced by IfxEray_Eray_allowColdStart(), IfxEray_Eray_changePocState(), IfxEray_Eray_Node_init(), IfxEray_Eray_setPocAllSlots(), IfxEray_Eray_startCommunication(), IfxEray_Eray_wakeUpChannel(), and IfxEray_Eray_wakeUpCluster().

◆ IfxEray_getFifoStatus()

IFX_INLINE Ifx_ERAY_FSR IfxEray_getFifoStatus ( Ifx_ERAY * eray )

Gets the FIFO status.

Parameters
eray pointer to ERAY module registers.
Returns
FIFO status.

Definition at line 1350 of file IfxEray.h.

Referenced by IfxEray_Eray_receiveFifoFrame().

◆ IfxEray_getInputBufferBusyHostStatus()

IFX_INLINE boolean IfxEray_getInputBufferBusyHostStatus ( Ifx_ERAY * eray )

Gets the Input Buffer Host Busy status.

Parameters
eray pointer to ERAY module registers.
Returns
TRUE if Host is Busy otherwise FALSE.

Definition at line 1358 of file IfxEray.h.

Referenced by IfxEray_Eray_transmitFrame(), and IfxEray_setSlot().

◆ IfxEray_getInputBufferBusyShadowStatus()

IFX_INLINE uint8 IfxEray_getInputBufferBusyShadowStatus ( Ifx_ERAY * eray )

Gets the Input Buffer Shadow status.

Parameters
eray pointer to ERAY module registers.
Returns
TRUE if busy otherwise FALSE

Definition at line 1364 of file IfxEray.h.

Referenced by IfxEray_Eray_transmitFrame(), and IfxEray_setSlot().

◆ IfxEray_getOutputBuffer()

IFX_INLINE uint8 IfxEray_getOutputBuffer ( Ifx_ERAY * eray )

Gets the output buffer index.

Parameters
eray pointer to ERAY module registers.
Returns
output buffer index.

Definition at line 1483 of file IfxEray.h.

Referenced by IfxEray_Eray_receiveFifoFrame(), and IfxEray_Eray_receiveFrame().

◆ IfxEray_getOutputBufferBusyShadowStatus()

IFX_INLINE boolean IfxEray_getOutputBufferBusyShadowStatus ( Ifx_ERAY * eray )

Gets the Output Buffer Shadow status.

Parameters
eray pointer to ERAY module registers.
Returns
TRUE if busy otherwise FALSE

Definition at line 1489 of file IfxEray.h.

Referenced by IfxEray_Eray_receiveFifoFrame(), and IfxEray_Eray_receiveFrame().

◆ IfxEray_getPocState()

IFX_INLINE IfxEray_PocState IfxEray_getPocState ( Ifx_ERAY * eray )

Gets the current POC state.

Parameters
eray pointer to ERAY module registers.
Returns
current POC state.

Definition at line 1508 of file IfxEray.h.

Referenced by IfxEray_Eray_getPocState(), and IfxEray_Eray_Node_init().

◆ IfxEray_getWakeupPatternReceivedChannel()

IFX_INLINE IfxEray_WakeupChannel IfxEray_getWakeupPatternReceivedChannel ( Ifx_ERAY * eray )

Gets the received wakeup pattern channel.

Parameters
eray pointer to ERAY module registers.
Returns
received wakeup pattern channel.

Definition at line 1548 of file IfxEray.h.

Referenced by IfxEray_Eray_getWakeupPatternReceivedChannel().

◆ IfxEray_setPocReady()

IFX_EXTERN void IfxEray_setPocReady ( Ifx_ERAY * eray )

Sets the POC state to Ready state.

Parameters
eray pointer to ERAY module registers.
Returns
None

Definition at line 282 of file IfxEray.c.

Referenced by IfxEray_Eray_Node_init(), and IfxEray_Eray_wakeUpChannel().

◆ IfxEray_waitForPocState()

IFX_INLINE void IfxEray_waitForPocState | ( | Ifx_ERAY * | eray,
 |  | IfxEray_PocState | pocState
 | ) |  |

Waits until the controller enters required POC state.

Parameters
eray | pointer to ERAY module registers.
pocState | POC state upto which controller waits.
Returns
None

Definition at line 1971 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_init().


iLLD_TC38A: Configuration Functions

Functions
Configuration Functions
iLLD » ERAY » Standard Driver
Collaboration diagram for Configuration Functions:

Functions

IFX_INLINE void | IfxEray_receiveHeader (Ifx_ERAY *eray, boolean headerReceived)
request to receive header section from message buffer. More...
IFX_INLINE void | IfxEray_sendHeader (Ifx_ERAY *eray, boolean headerTransfered)
sets the bit to send header in frame. More...
IFX_INLINE void | IfxEray_setActiveCyclePairs (Ifx_ERAY *eray, uint8 numberOfCyclePairsForActive)
Sets number of cycle pairs for Active state. More...
IFX_INLINE void | IfxEray_setAutoDelayBuffers (Ifx_ERAY *eray)
Sets auto delays between input, output buffers and message RAM. More...
IFX_INLINE void | IfxEray_setBaudrate (Ifx_ERAY *eray, IfxEray_Baudrate baudrate)
Sets baudrate on Flexray bus. More...
IFX_INLINE void | IfxEray_setBufferReconfigSecure (Ifx_ERAY *eray, uint8 secureValue)
Sets secured buffers in message RAM. More...
IFX_INLINE void | IfxEray_setChannelAInitialOffsets (Ifx_ERAY *eray, uint8 channelAMicrotickInitialOffset, uint8 channelAMacrotickInitialOffset)
Sets channel A initial offstes. More...
IFX_INLINE void | IfxEray_setChannelBInitialOffsets (Ifx_ERAY *eray, uint8 channelBMicrotickInitialOffset, uint8 channelBMacrotickInitialOffset)
Sets channel B initial offstes. More...
IFX_INLINE void | IfxEray_setChannelsReceiveDelay (Ifx_ERAY *eray, uint8 channelAReceptionDelay, uint8 channelBReceptionDelay)
Sets receive delays on channels. More...
IFX_INLINE void | IfxEray_setClockCorrectionCycles (Ifx_ERAY *eray, uint8 clockCorrectionCyclesPassive, uint8 clockCorrectionCyclesHalt)
Sets clock correction cycles for Passive and Halt. More...
IFX_INLINE void | IfxEray_setClockSynchErrorHalt (Ifx_ERAY *eray, boolean clockSyncErrorHalt)
lead to halt state in clock synch error. More...
IFX_INLINE void | IfxEray_setClusterDriftValues (Ifx_ERAY *eray, uint8 clusterDrift, uint16 maxDriftOffset)
Sets cluster drift values. More...
IFX_INLINE void | IfxEray_setClusterStartupDeviation (Ifx_ERAY *eray, uint16 acceptedStartupDeviation)
Sets cluster startup deviation. More...
IFX_INLINE void | IfxEray_setCollisionAvoidanceDuration (Ifx_ERAY *eray, uint8 collisionAvoidanceDuration)
Sets CAS symbol window duration. More...
IFX_INLINE void | IfxEray_setCycleDurationMacroticks (Ifx_ERAY *eray, uint16 macroticks)
sets duration of the communication cycle in Macroticks. More...
IFX_INLINE void | IfxEray_setCycleDurationMicroticks (Ifx_ERAY *eray, uint32 microticks)
sets duration of the communication cycle in Microticks. More...
IFX_INLINE void | IfxEray_setDecodingCorrectionValue (Ifx_ERAY *eray, uint8 decodingCorrection)
Sets decoding correction value. More...
IFX_INLINE void | IfxEray_setDynamicSlots (Ifx_ERAY *eray, uint8 dynamicSlotLength, uint16 dynamicSlotCount, IfxEray_IdleDynamicSlots idleDynamicSlots)
Sets dynamic slots count and length. More...
IFX_INLINE void | IfxEray_setExternalCorrectionControl (Ifx_ERAY *eray, IfxEray_ExternalOffset externalOffset, IfxEray_ExternalRate externalRate)
Sets external correction controls. More...
IFX_INLINE void | IfxEray_setExternalCorrectionValues (Ifx_ERAY *eray, IfxEray_ExternalOffsetCorrection externalOffsetCorrection, IfxEray_ExternalRateCorrection externalRateCorrection)
Sets external correction values. More...
IFX_INLINE void | IfxEray_setFifoBufferStartIndex (Ifx_ERAY *eray, uint8 fifoBufferStartIndex)
Sets FIFO buffer start idex. More...
IFX_INLINE void | IfxEray_setFifoFilterConfigurations (Ifx_ERAY *eray, uint16 rejectedFrameId, uint8 filteredCycleNumber, boolean fifoNullFramesRejected, uint16 frameIdFilter)
Sets FIFO filter configurations. More...
IFX_INLINE void | IfxEray_setFifoMessageBufferConfigurations (Ifx_ERAY *eray, IfxEray_ReceiveChannel receiveChannel, boolean staticFifoDisabled, uint8 fifoDepth)
Sets FIFO configurations. More...
IFX_INLINE void | IfxEray_setFirstDynamicBuffer (Ifx_ERAY *eray, uint8 firstDynamicBuffer)
Sets first dynamic buffer. More...
IFX_INLINE void | IfxEray_setListenTimeOuts (Ifx_ERAY *eray, uint32 listenTimeOut, IfxEray_ListenTimeOutNoise listenTimeOutNoise)
Sets startup or wakeup listen timeouts. More...
IFX_INLINE void | IfxEray_setMaxColdStartAttempts (Ifx_ERAY *eray, uint8 maxColdStartAttempts)
Sets the maximum cold start attempts for active state. More...
IFX_INLINE void | IfxEray_setMaxCorrectionValues (Ifx_ERAY *eray, uint16 maxOffsetCorrection, uint16 maxRateCorrection)
Sets max limit correction values. More...
IFX_INLINE void | IfxEray_setMaxSynchFrames (Ifx_ERAY *eray, IfxEray_MaxSynchFrames maxSyncFrames)
Sets maximum synch frames in a cluster. More...
IFX_INLINE void | IfxEray_setMessageBufferCount (Ifx_ERAY *eray, uint8 numberOfMessageBuffers)
Sets number of message buffers. More...
IFX_INLINE void | IfxEray_setMessageHandlerConfigurations (Ifx_ERAY *eray, uint8 staticFramepayload, uint8 latestTransmissionStart)
Sets Message Handler configurations. More...
IFX_INLINE void | IfxEray_setNetworkStartIdleTime (Ifx_ERAY *eray, uint16 networkStartIdleTime)
Sets network start Idle time. More...
IFX_INLINE void | IfxEray_setNetworkVectorLength (Ifx_ERAY *eray, uint32 networkVectorLength)
Sets network management vector length. More...
IFX_INLINE void | IfxEray_setNodeChannels (Ifx_ERAY *eray, boolean channelAConnectedNode, boolean channelBConnectedNode)
Sets channels connected to node. More...
IFX_INLINE void | IfxEray_setOffsetCorrection (Ifx_ERAY *eray, uint16 correctionOffset)
Sets offset correction starting point. More...
IFX_INLINE void | IfxEray_setReceiveRequest (Ifx_ERAY *eray, boolean receiveRequested)
requests to receive the frame. More...
IFX_INLINE void | IfxEray_setReceiveWakeupTimes (Ifx_ERAY *eray, uint16 receiveWakeupTestDuration, uint8 receiveWakeupIdleTime, uint8 receiveWakeupLowTime)
Sets receive wakeup times. More...
IFX_INLINE void | IfxEray_setRxBufferNumber (Ifx_ERAY *eray, uint8 bufferIndex)
sets buffer number in which frame is received. More...
IFX_INLINE void | IfxEray_setSlotActionPoints (Ifx_ERAY *eray, uint8 staticActionPoint, uint8 dynamicActionPoint)
Sets slots action points. More...
IFX_INLINE void | IfxEray_setStaticSlots (Ifx_ERAY *eray, uint16 staticSlotLength, uint16 staticSlotsCount)
Sets static slots count and length. More...
IFX_INLINE void | IfxEray_setStrobePosition (Ifx_ERAY *eray, IfxEray_StrobePosition strobePosition)
Sets sample point for strobing. More...
IFX_INLINE void | IfxEray_setSymbolChannels (Ifx_ERAY *eray, boolean channelASymbolTransmitted, boolean channelBSymbolTransmitted)
Sets channels which transmits symbols. More...
IFX_INLINE void | IfxEray_setTransmissionSlotMode (Ifx_ERAY *eray, IfxEray_TransmissionSlotMode transmissionSlotMode)
Sets the transmit slot mode. More...
IFX_INLINE void | IfxEray_setTransmissionStartTime (Ifx_ERAY *eray, uint8 transmissionStartTime)
Sets transmission start time duration. More...
IFX_INLINE void | IfxEray_setTransmitRequest (Ifx_ERAY *eray, boolean transferRequested)
Sets transfer request to send frame. More...
IFX_INLINE void | IfxEray_setTransmitWakeupTimes (Ifx_ERAY *eray, uint8 transmitWakeupRepetitions, uint8 transmitWakeupIdleTime, uint8 transmitWakeupLowTime)
Sets transmit wakeup times. More...
IFX_INLINE void | IfxEray_setTransmittedFrames (Ifx_ERAY *eray, boolean startupFrameTransmitted, boolean synchFrameTransmitted)
Configures transmitted frames for startup and synchronization. More...
IFX_INLINE void | IfxEray_setTxBufferNumber (Ifx_ERAY *eray, uint8 bufferIndex)
Sets the transmit buffer number. More...
IFX_INLINE void | IfxEray_setViewData (Ifx_ERAY *eray, boolean swapRequested)
Swaps the shadow and Host output registers. More...
IFX_INLINE void | IfxEray_setWakeupPatternChannel (Ifx_ERAY *eray, IfxEray_WakeupChannel wakeupPatternChannel)
Sets the cluster wakeup channel. More...

Detailed Description

Function Documentation

◆ IfxEray_receiveHeader()

IFX_INLINE void IfxEray_receiveHeader | ( | Ifx_ERAY * | eray,
 |  | boolean | headerReceived
 | ) |  |

request to receive header section from message buffer.

Parameters
eray | pointer to ERAY module registers.
headerReceived | whether header is received or not.
Returns
None

Definition at line 1612 of file IfxEray.h.

Referenced by IfxEray_Eray_receiveFifoFrame(), and IfxEray_Eray_receiveFrame().

◆ IfxEray_sendHeader()

IFX_INLINE void IfxEray_sendHeader | ( | Ifx_ERAY * | eray,
 |  | boolean | headerTransfered
 | ) |  |

sets the bit to send header in frame.

Parameters
eray | pointer to ERAY module registers.
headerTransfered | whether header transfered or not.
Returns
None

Definition at line 1624 of file IfxEray.h.

Referenced by IfxEray_Eray_transmitFrame().

◆ IfxEray_setActiveCyclePairs()

IFX_INLINE void IfxEray_setActiveCyclePairs | ( | Ifx_ERAY * | eray,
 |  | uint8 | numberOfCyclePairsForActive
 | ) |  |

Sets number of cycle pairs for Active state.

Parameters
eray | pointer to ERAY module registers.
numberOfCyclePairsForActive | number of cycle pairs for Active state.
Returns
None

Definition at line 1630 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_setAutoDelayBuffers()

IFX_INLINE void IfxEray_setAutoDelayBuffers ( Ifx_ERAY * eray )

Sets auto delays between input, output buffers and message RAM.

Parameters
eray pointer to ERAY module registers.
Returns
None

Definition at line 1636 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_init().

◆ IfxEray_setBaudrate()

IFX_INLINE void IfxEray_setBaudrate | ( | Ifx_ERAY * | eray,
 |  | IfxEray_Baudrate | baudrate
 | ) |  |

Sets baudrate on Flexray bus.

Parameters
eray | pointer to ERAY module registers.
baudrate | baudrate on flexray bus.
Returns
None

Definition at line 1644 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_setBufferReconfigSecure()

IFX_INLINE void IfxEray_setBufferReconfigSecure | ( | Ifx_ERAY * | eray,
 |  | uint8 | secureValue
 | ) |  |

Sets secured buffers in message RAM.

Parameters
eray | pointer to ERAY module registers.
secureValue | secure value.
Returns
None

Definition at line 1650 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initMessageRAM().

◆ IfxEray_setChannelAInitialOffsets()

IFX_INLINE void IfxEray_setChannelAInitialOffsets | ( | Ifx_ERAY * | eray,
 |  | uint8 | channelAMicrotickInitialOffset,
 |  | uint8 | channelAMacrotickInitialOffset
 | ) |  |

Sets channel A initial offstes.

Parameters
eray | pointer to ERAY module registers.
channelAMicrotickInitialOffset | difference between reference points on channel A in microticks.
channelAMacrotickInitialOffset | difference between reference points on channel A in macroticks.
Returns
None

Definition at line 1656 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initGTU().

◆ IfxEray_setChannelBInitialOffsets()

IFX_INLINE void IfxEray_setChannelBInitialOffsets | ( | Ifx_ERAY * | eray,
 |  | uint8 | channelBMicrotickInitialOffset,
 |  | uint8 | channelBMacrotickInitialOffset
 | ) |  |

Sets channel B initial offstes.

Parameters
eray | pointer to ERAY module registers.
channelBMicrotickInitialOffset | difference between reference points on channel B in microticks.
channelBMacrotickInitialOffset | difference between reference points on channel B in macroticks.
Returns
None

Definition at line 1663 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initGTU().

◆ IfxEray_setChannelsReceiveDelay()

IFX_INLINE void IfxEray_setChannelsReceiveDelay | ( | Ifx_ERAY * | eray,
 |  | uint8 | channelAReceptionDelay,
 |  | uint8 | channelBReceptionDelay
 | ) |  |

Sets receive delays on channels.

Parameters
eray | pointer to ERAY module registers.
channelAReceptionDelay | reception delay on channel A.
channelBReceptionDelay | reception delay on channel B.
Returns
None

Definition at line 1670 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initGTU().

◆ IfxEray_setClockCorrectionCycles()

IFX_INLINE void IfxEray_setClockCorrectionCycles | ( | Ifx_ERAY * | eray,
 |  | uint8 | clockCorrectionCyclesPassive,
 |  | uint8 | clockCorrectionCyclesHalt
 | ) |  |

Sets clock correction cycles for Passive and Halt.

Parameters
eray | pointer to ERAY module registers.
clockCorrectionCyclesPassive | maximum number of cycles missing clock correction leading for passive state.
clockCorrectionCyclesHalt | maximum number of cycles missing clock correction leading for halt state.
Returns
None

Definition at line 1677 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_setClockSynchErrorHalt()

IFX_INLINE void IfxEray_setClockSynchErrorHalt | ( | Ifx_ERAY * | eray,
 |  | boolean | clockSyncErrorHalt
 | ) |  |

lead to halt state in clock synch error.

Parameters
eray | pointer to ERAY module registers.
clockSyncErrorHalt | whether to enter halt in clock synch error or not.
Returns
None

Definition at line 1687 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_setClusterDriftValues()

IFX_INLINE void IfxEray_setClusterDriftValues | ( | Ifx_ERAY * | eray,
 |  | uint8 | clusterDrift,
 |  | uint16 | maxDriftOffset
 | ) |  |

Sets cluster drift values.

Parameters
eray | pointer to ERAY module registers.
clusterDrift | cluster drift damping value used in clock synchronization.
maxDriftOffset | maximum drift offset between two nodes.
Returns
None

Definition at line 1693 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initGTU().

◆ IfxEray_setClusterStartupDeviation()

IFX_INLINE void IfxEray_setClusterStartupDeviation | ( | Ifx_ERAY * | eray,
 |  | uint16 | acceptedStartupDeviation
 | ) |  |

Sets cluster startup deviation.

Parameters
eray | pointer to ERAY module registers.
acceptedStartupDeviation | deviation for startup Frames during integration.
Returns
None

Definition at line 1700 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initGTU().

◆ IfxEray_setCollisionAvoidanceDuration()

IFX_INLINE void IfxEray_setCollisionAvoidanceDuration | ( | Ifx_ERAY * | eray,
 |  | uint8 | collisionAvoidanceDuration
 | ) |  |

Sets CAS symbol window duration.

Parameters
eray | pointer to ERAY module registers.
collisionAvoidanceDuration | accepted duration of CAS symbol.
Returns
None

Definition at line 1706 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_setCycleDurationMacroticks()

IFX_INLINE void IfxEray_setCycleDurationMacroticks | ( | Ifx_ERAY * | eray,
 |  | uint16 | macroticks
 | ) |  |

sets duration of the communication cycle in Macroticks.

Parameters
eray | pointer to ERAY module registers.
macroticks | duration of the communication cycle in Macroticks.
Returns
None

Definition at line 1712 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initGTU().

◆ IfxEray_setCycleDurationMicroticks()

IFX_INLINE void IfxEray_setCycleDurationMicroticks | ( | Ifx_ERAY * | eray,
 |  | uint32 | microticks
 | ) |  |

sets duration of the communication cycle in Microticks.

Parameters
eray | pointer to ERAY module registers.
microticks | duration of the communication cycle in Microticks.
Returns
None

Definition at line 1718 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initGTU().

◆ IfxEray_setDecodingCorrectionValue()

IFX_INLINE void IfxEray_setDecodingCorrectionValue | ( | Ifx_ERAY * | eray,
 |  | uint8 | decodingCorrection
 | ) |  |

Sets decoding correction value.

Parameters
eray | pointer to ERAY module registers.
decodingCorrection | decoding correction value.
Returns
None

Definition at line 1724 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initGTU().

◆ IfxEray_setDynamicSlots()

IFX_INLINE void IfxEray_setDynamicSlots | ( | Ifx_ERAY * | eray,
 |  | uint8 | dynamicSlotLength,
 |  | uint16 | dynamicSlotCount,
 |  | IfxEray_IdleDynamicSlots | idleDynamicSlots
 | ) |  |

Sets dynamic slots count and length.

Parameters
eray | pointer to ERAY module registers.
dynamicSlotLength | duration of dynamic slot in macroticks.
dynamicSlotCount | number of dynamic slots in a communication cycle.
idleDynamicSlots | duration of dynamic slot idle phase.
Returns
None

Definition at line 1730 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initGTU().

◆ IfxEray_setExternalCorrectionControl()

IFX_INLINE void IfxEray_setExternalCorrectionControl | ( | Ifx_ERAY * | eray,
 |  | IfxEray_ExternalOffset | externalOffset,
 |  | IfxEray_ExternalRate | externalRate
 | ) |  |

Sets external correction controls.

Parameters
eray | pointer to ERAY module registers.
externalOffset | External offset correction control.
externalRate | External rate correction control.
Returns
None

Definition at line 1738 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initGTU().

◆ IfxEray_setExternalCorrectionValues()

IFX_INLINE void IfxEray_setExternalCorrectionValues | ( | Ifx_ERAY * | eray,
 |  | IfxEray_ExternalOffsetCorrection | externalOffsetCorrection,
 |  | IfxEray_ExternalRateCorrection | externalRateCorrection
 | ) |  |

Sets external correction values.

Parameters
eray | pointer to ERAY module registers.
externalOffsetCorrection | external clock offset correction value.
externalRateCorrection | external clock rate correction value.
Returns
None

Definition at line 1745 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initGTU().

◆ IfxEray_setFifoBufferStartIndex()

IFX_INLINE void IfxEray_setFifoBufferStartIndex | ( | Ifx_ERAY * | eray,
 |  | uint8 | fifoBufferStartIndex
 | ) |  |

Sets FIFO buffer start idex.

Parameters
eray | pointer to ERAY module registers.
fifoBufferStartIndex | FIFO buffer start idex.
Returns
None

Definition at line 1752 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initMessageRAM().

◆ IfxEray_setFifoFilterConfigurations()

IFX_INLINE void IfxEray_setFifoFilterConfigurations | ( | Ifx_ERAY * | eray,
 |  | uint16 | rejectedFrameId,
 |  | uint8 | filteredCycleNumber,
 |  | boolean | fifoNullFramesRejected,
 |  | uint16 | frameIdFilter
 | ) |  |

Sets FIFO filter configurations.

Parameters
eray | pointer to ERAY module registers.
rejectedFrameId | rejected frameId by FIFO.
filteredCycleNumber | filtered cycle number.
fifoNullFramesRejected | null frames rejection selection.
frameIdFilter | filtered frameid by FIFO.
Returns
None

Definition at line 1759 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initMessageRAM().

◆ IfxEray_setFifoMessageBufferConfigurations()

IFX_INLINE void IfxEray_setFifoMessageBufferConfigurations | ( | Ifx_ERAY * | eray,
 |  | IfxEray_ReceiveChannel | receiveChannel,
 |  | boolean | staticFifoDisabled,
 |  | uint8 | fifoDepth
 | ) |  |

Sets FIFO configurations.

Parameters
eray | pointer to ERAY module registers.
receiveChannel | FIFO receive channel.
staticFifoDisabled | static FIFO selection.
fifoDepth | FIFO depth.
Returns
None

Definition at line 1768 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initMessageRAM().

◆ IfxEray_setFirstDynamicBuffer()

IFX_INLINE void IfxEray_setFirstDynamicBuffer | ( | Ifx_ERAY * | eray,
 |  | uint8 | firstDynamicBuffer
 | ) |  |

Sets first dynamic buffer.

Parameters
eray | pointer to ERAY module registers.
firstDynamicBuffer | first dynamic buffer.
Returns
None

Definition at line 1776 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initMessageRAM().

◆ IfxEray_setListenTimeOuts()

IFX_INLINE void IfxEray_setListenTimeOuts | ( | Ifx_ERAY * | eray,
 |  | uint32 | listenTimeOut,
 |  | IfxEray_ListenTimeOutNoise | listenTimeOutNoise
 | ) |  |

Sets startup or wakeup listen timeouts.

Parameters
eray | pointer to ERAY module registers.
listenTimeOut | wakeup or startup listen timeout in microticks.
listenTimeOutNoise | upper limit for startup or wakeup listen timeout in presence of noise.
Returns
None

Definition at line 1783 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_setMaxColdStartAttempts()

IFX_INLINE void IfxEray_setMaxColdStartAttempts | ( | Ifx_ERAY * | eray,
 |  | uint8 | maxColdStartAttempts
 | ) |  |

Sets the maximum cold start attempts for active state.

Parameters
eray | pointer to ERAY module registers.
maxColdStartAttempts | maximum number of attempts that a cold start node allows.
Returns
None

Definition at line 1793 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_setMaxCorrectionValues()

IFX_INLINE void IfxEray_setMaxCorrectionValues | ( | Ifx_ERAY * | eray,
 |  | uint16 | maxOffsetCorrection,
 |  | uint16 | maxRateCorrection
 | ) |  |

Sets max limit correction values.

Parameters
eray | pointer to ERAY module registers.
maxOffsetCorrection | maximum offset correction.
maxRateCorrection | maximum rate correction.
Returns
None

Definition at line 1799 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initGTU().

◆ IfxEray_setMaxSynchFrames()

IFX_INLINE void IfxEray_setMaxSynchFrames | ( | Ifx_ERAY * | eray,
 |  | IfxEray_MaxSynchFrames | maxSyncFrames
 | ) |  |

Sets maximum synch frames in a cluster.

Parameters
eray | pointer to ERAY module registers.
maxSyncFrames | maximum synch frames in a cluster.
Returns
None

Definition at line 1806 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initGTU().

◆ IfxEray_setMessageBufferCount()

IFX_INLINE void IfxEray_setMessageBufferCount | ( | Ifx_ERAY * | eray,
 |  | uint8 | numberOfMessageBuffers
 | ) |  |

Sets number of message buffers.

Parameters
eray | pointer to ERAY module registers.
numberOfMessageBuffers | number of message buffers.
Returns
None

Definition at line 1812 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initMessageRAM().

◆ IfxEray_setMessageHandlerConfigurations()

IFX_INLINE void IfxEray_setMessageHandlerConfigurations | ( | Ifx_ERAY * | eray,
 |  | uint8 | staticFramepayload,
 |  | uint8 | latestTransmissionStart
 | ) |  |

Sets Message Handler configurations.

Parameters
eray | pointer to ERAY module registers.
staticFramepayload | payload length of static frames in double bytes.
latestTransmissionStart | dynamic slots befor transmission of inhibit frame in dynamic segment.
Returns
None

Definition at line 1818 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_setNetworkStartIdleTime()

IFX_INLINE void IfxEray_setNetworkStartIdleTime | ( | Ifx_ERAY * | eray,
 |  | uint16 | networkStartIdleTime
 | ) |  |

Sets network start Idle time.

Parameters
eray | pointer to ERAY module registers.
networkStartIdleTime | starting point of Network Idle Time Phase.
Returns
None

Definition at line 1828 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initGTU().

◆ IfxEray_setNetworkVectorLength()

IFX_INLINE void IfxEray_setNetworkVectorLength | ( | Ifx_ERAY * | eray,
 |  | uint32 | networkVectorLength
 | ) |  |

Sets network management vector length.

Parameters
eray | pointer to ERAY module registers.
networkVectorLength | length of network management vector.
Returns
None

Definition at line 1834 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_setNodeChannels()

IFX_INLINE void IfxEray_setNodeChannels | ( | Ifx_ERAY * | eray,
 |  | boolean | channelAConnectedNode,
 |  | boolean | channelBConnectedNode
 | ) |  |

Sets channels connected to node.

Parameters
eray | pointer to ERAY module registers.
channelAConnectedNode | whether node connected to channel A or not.
channelBConnectedNode | whether node connected to channel B or not.
Returns
None

Definition at line 1840 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_setOffsetCorrection()

IFX_INLINE void IfxEray_setOffsetCorrection | ( | Ifx_ERAY * | eray,
 |  | uint16 | correctionOffset
 | ) |  |

Sets offset correction starting point.

Parameters
eray | pointer to ERAY module registers.
correctionOffset | offset correction start point.
Returns
None

Definition at line 1847 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initGTU().

◆ IfxEray_setReceiveRequest()

IFX_INLINE void IfxEray_setReceiveRequest | ( | Ifx_ERAY * | eray,
 |  | boolean | receiveRequested
 | ) |  |

requests to receive the frame.

Parameters
eray | pointer to ERAY module registers.
receiveRequested | whether frame to be received or not.
Returns
None

Definition at line 1853 of file IfxEray.h.

Referenced by IfxEray_Eray_receiveFifoFrame(), and IfxEray_Eray_receiveFrame().

◆ IfxEray_setReceiveWakeupTimes()

IFX_INLINE void IfxEray_setReceiveWakeupTimes | ( | Ifx_ERAY * | eray,
 |  | uint16 | receiveWakeupTestDuration,
 |  | uint8 | receiveWakeupIdleTime,
 |  | uint8 | receiveWakeupLowTime
 | ) |  |

Sets receive wakeup times.

Parameters
eray | pointer to ERAY module registers.
receiveWakeupTestDuration | duration of receive wakeup pattern.
receiveWakeupIdleTime | duration of receive wakeup idle time.
receiveWakeupLowTime | duration of receive wakeup low time.
Returns
None

Definition at line 1859 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_setRxBufferNumber()

IFX_INLINE void IfxEray_setRxBufferNumber | ( | Ifx_ERAY * | eray,
 |  | uint8 | bufferIndex
 | ) |  |

sets buffer number in which frame is received.

Parameters
eray | pointer to ERAY module registers.
bufferIndex | buffer number in which frame is received.
Returns
None

Definition at line 1867 of file IfxEray.h.

Referenced by IfxEray_Eray_receiveFifoFrame(), and IfxEray_Eray_receiveFrame().

◆ IfxEray_setSlotActionPoints()

IFX_INLINE void IfxEray_setSlotActionPoints | ( | Ifx_ERAY * | eray,
 |  | uint8 | staticActionPoint,
 |  | uint8 | dynamicActionPoint
 | ) |  |

Sets slots action points.

Parameters
eray | pointer to ERAY module registers.
staticActionPoint | static slots and symbol window action point.
dynamicActionPoint | dynamic slots action point.
Returns
None

Definition at line 1882 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initGTU().

◆ IfxEray_setStaticSlots()

IFX_INLINE void IfxEray_setStaticSlots | ( | Ifx_ERAY * | eray,
 |  | uint16 | staticSlotLength,
 |  | uint16 | staticSlotsCount
 | ) |  |

Sets static slots count and length.

Parameters
eray | pointer to ERAY module registers.
staticSlotLength | duration of static slot in macroticks.
staticSlotsCount | number of static slots in a communication cycle.
Returns
None

Definition at line 1889 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initGTU().

◆ IfxEray_setStrobePosition()

IFX_INLINE void IfxEray_setStrobePosition | ( | Ifx_ERAY * | eray,
 |  | IfxEray_StrobePosition | strobePosition
 | ) |  |

Sets sample point for strobing.

Parameters
eray | pointer to ERAY module registers.
strobePosition | strobing sample count.
Returns
None

Definition at line 1896 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_setSymbolChannels()

IFX_INLINE void IfxEray_setSymbolChannels | ( | Ifx_ERAY * | eray,
 |  | boolean | channelASymbolTransmitted,
 |  | boolean | channelBSymbolTransmitted
 | ) |  |

Sets channels which transmits symbols.

Parameters
eray | pointer to ERAY module registers.
channelASymbolTransmitted | whether symbol is transmitted in Channel A or not.
channelBSymbolTransmitted | whether symbol is transmitted in Channel B or not.
Returns
None

Definition at line 1913 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_setTransmissionSlotMode()

IFX_INLINE void IfxEray_setTransmissionSlotMode | ( | Ifx_ERAY * | eray,
 |  | IfxEray_TransmissionSlotMode | transmissionSlotMode
 | ) |  |

Sets the transmit slot mode.

Parameters
eray | pointer to ERAY module registers.
transmissionSlotMode | transmission slot mode.
Returns
None

Definition at line 1920 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_setTransmissionStartTime()

IFX_INLINE void IfxEray_setTransmissionStartTime | ( | Ifx_ERAY * | eray,
 |  | uint8 | transmissionStartTime
 | ) |  |

Sets transmission start time duration.

Parameters
eray | pointer to ERAY module registers.
transmissionStartTime | transmission start time.
Returns
None

Definition at line 1926 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_setTransmitRequest()

IFX_INLINE void IfxEray_setTransmitRequest | ( | Ifx_ERAY * | eray,
 |  | boolean | transferRequested
 | ) |  |

Sets transfer request to send frame.

Parameters
eray | pointer to ERAY module registers.
transferRequested | whether transfer requested or not.
Returns
None

Definition at line 1932 of file IfxEray.h.

Referenced by IfxEray_Eray_transmitFrame().

◆ IfxEray_setTransmittedFrames()

IFX_INLINE void IfxEray_setTransmittedFrames | ( | Ifx_ERAY * | eray,
 |  | boolean | startupFrameTransmitted,
 |  | boolean | synchFrameTransmitted
 | ) |  |

Configures transmitted frames for startup and synchronization.

Parameters
eray | pointer to ERAY module registers.
startupFrameTransmitted | whether startup Frame transmitted or not.
synchFrameTransmitted | whether synch Frame transmitted or not.
Returns
None

Definition at line 1946 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_setTransmitWakeupTimes()

IFX_INLINE void IfxEray_setTransmitWakeupTimes | ( | Ifx_ERAY * | eray,
 |  | uint8 | transmitWakeupRepetitions,
 |  | uint8 | transmitWakeupIdleTime,
 |  | uint8 | transmitWakeupLowTime
 | ) |  |

Sets transmit wakeup times.

Parameters
eray | pointer to ERAY module registers.
transmitWakeupRepetitions | transmission wakeup repetitions.
transmitWakeupIdleTime | duration of transmit wakeup idle time.
transmitWakeupLowTime | duration of transmit wakeup low time.
Returns
None

Definition at line 1938 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_setTxBufferNumber()

IFX_INLINE void IfxEray_setTxBufferNumber | ( | Ifx_ERAY * | eray,
 |  | uint8 | bufferIndex
 | ) |  |

Sets the transmit buffer number.

Parameters
eray | pointer to ERAY module registers.
bufferIndex | buffer number in which frame is sent.
Returns
None

Definition at line 1953 of file IfxEray.h.

Referenced by IfxEray_Eray_transmitFrame().

◆ IfxEray_setViewData()

IFX_INLINE void IfxEray_setViewData | ( | Ifx_ERAY * | eray,
 |  | boolean | swapRequested
 | ) |  |

Swaps the shadow and Host output registers.

Parameters
eray | pointer to ERAY module registers.
swapRequested | whether swap is requested or not.
Returns
None

Definition at line 1959 of file IfxEray.h.

Referenced by IfxEray_Eray_receiveFifoFrame(), and IfxEray_Eray_receiveFrame().

◆ IfxEray_setWakeupPatternChannel()

IFX_INLINE void IfxEray_setWakeupPatternChannel | ( | Ifx_ERAY * | eray,
 |  | IfxEray_WakeupChannel | wakeupPatternChannel
 | ) |  |

Sets the cluster wakeup channel.

Parameters
eray | pointer to ERAY module registers.
wakeupPatternChannel | cluster wakeup pattern channel.
Returns
None

Definition at line 1965 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().


iLLD_TC38A: Data Structures

Data Structures
Data Structures
iLLD » ERAY » Standard Driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxEray_Header
Header section in a frame. More...
struct | IfxEray_ReceivedHeader
Received header in a frame. More...
struct | IfxEray_SlotConfig
Transmit control structure. More...

Detailed Description

Data Structure Documentation

◆ IfxEray_Header

struct IfxEray_Header

Header section in a frame.

Definition at line 389 of file IfxEray.h.

Data Fields
IfxEray_BufferDirection | bufferDirection | selects buffer as a transmit buffer or as a receive buffer.
boolean | bufferServiceEnabled | wether buffer service request is enabled or not.
boolean | channelAFiltered | channel A serves as a control for transmit and filter for receive buffers.
boolean | channelBFiltered | channel B serves as a control for transmit and filter for receive buffers.
uint8 | cycleCode | the cycle set used for cycle counter filtering.
uint16 | dataPointer | pointer to the data section of message buffer in RAM.
uint16 | frameId | slot ID of the selected Message Buffer.
uint8 | payloadLength | length of data section.
boolean | startupFrameIndicator | whether startup frame is indicated or not.
boolean | syncFrameIndicator | whether sync frame is indicated or not.
IfxEray_TransmissionMode | transmissionMode | transmission mode of Header.
boolean | transmitPayloadIndicatior | weather payload indicator is set or not.

◆ IfxEray_ReceivedHeader

struct IfxEray_ReceivedHeader

Received header in a frame.

Definition at line 407 of file IfxEray.h.

Data Fields
uint8 | cycleNumber: 7 | cycle number in which frame is received.
uint16 | frameId: 11 | received frame id.
uint16 | headerCrc: 11 | received header crc.
uint8 | nullFrameIndicator: 1 | 0 : no data frame received; 1: atleast one data frame received.
uint8 | payloadLength: 7 | received payload length.
uint8 | payloadPreambleIndicator: 1 | 1 : received payload segment has network management and message id or not; 0 : It hasn't.
uint8 | startupFrame: 1 | 0 : received frame is not a startup frame ; 1 : receive frame is a startup frame.
uint8 | syncFrame: 1 | 0 : received frame is not a synch frame ; 1 : receive frame is a synch frame.

◆ IfxEray_SlotConfig

struct IfxEray_SlotConfig

Transmit control structure.

Definition at line 421 of file IfxEray.h.

Data Fields
uint8 | bufferIndex | buffer index in the Message RAM.
boolean | dataTransfered | whether data is transfered from input buffers to Message RAM or not.
boolean | headerTransfered | whether header is transfered from input buffers to Message RAM or not.
boolean | transferRequested | transmit buffer released for transmission or not.


iLLD_TC38A: Operative Functions

Functions
Operative Functions
iLLD » ERAY » Standard Driver
Collaboration diagram for Operative Functions:

Functions

IFX_INLINE void | IfxEray_receiveData (Ifx_ERAY *eray, boolean dataReceived)
requests to receive data from message buffer. More...
IFX_INLINE void | IfxEray_sendData (Ifx_ERAY *eray, boolean dataTransfered)
sets the bit to send data in frame. More...
IFX_EXTERN uint16 | IfxEray_calcHeaderCrc (uint8 payloadLength, uint16 frameId, boolean startupFrameIndicator, boolean syncFrameIndicator)
Calculate and returns the CRC for frame. More...
IFX_EXTERN void | IfxEray_readData (Ifx_ERAY *eray, uint32 *data, uint8 payloadLength)
Reads the received data from output registers. More...
IFX_EXTERN void | IfxEray_readFrame (Ifx_ERAY *eray, IfxEray_ReceivedHeader *header, uint32 *data, Ifx_SizeT maxPayloadLength)
Reads header and data from output buffers. More...
IFX_EXTERN void | IfxEray_setSlot (Ifx_ERAY *eray, const IfxEray_Header *header, const uint32 *data, const IfxEray_SlotConfig *slotConfig)
Writes header and data to Input buffers and set the slots. More...
IFX_EXTERN void | IfxEray_writeData (Ifx_ERAY *eray, const uint32 *data, uint8 payloadLength)
Writes data section of a frame to input data registers. More...

Detailed Description

Function Documentation

◆ IfxEray_calcHeaderCrc()

IFX_EXTERN uint16 IfxEray_calcHeaderCrc | ( | uint8 | payloadLength,
 |  | uint16 | frameId,
 |  | boolean | startupFrameIndicator,
 |  | boolean | syncFrameIndicator
 | ) |  |

Calculate and returns the CRC for frame.

Parameters
payloadLength | payload length configured for frame.
frameId | slot id
startupFrameIndicator | whether startup frame is indicated or not.
syncFrameIndicator | whether sync frame is indicated or not.
Returns
calculated CRC value.

Definition at line 52 of file IfxEray.c.

Referenced by IfxEray_setSlot().

◆ IfxEray_readData()

IFX_EXTERN void IfxEray_readData | ( | Ifx_ERAY * | eray,
 |  | uint32 * | data,
 |  | uint8 | payloadLength
 | ) |  |

Reads the received data from output registers.

Parameters
eray | pointer to ERAY module registers.
data | pointer to received data buffer.
payloadLength | payload length received in a frame.
Returns
None

Definition at line 188 of file IfxEray.c.

Referenced by IfxEray_Eray_readData(), and IfxEray_readFrame().

◆ IfxEray_readFrame()

IFX_EXTERN void IfxEray_readFrame | ( | Ifx_ERAY * | eray,
 |  | IfxEray_ReceivedHeader * | header,
 |  | uint32 * | data,
 |  | Ifx_SizeT | maxPayloadLength
 | ) |  |

Reads header and data from output buffers.

Parameters
eray | pointer to ERAY module registers.
header | header received in a frame.
data | data received in a frame.
maxPayloadLength | maximum payload length received in a frame.
Returns
None

Definition at line 203 of file IfxEray.c.

Referenced by IfxEray_Eray_readFrame().

◆ IfxEray_receiveData()

IFX_INLINE void IfxEray_receiveData | ( | Ifx_ERAY * | eray,
 |  | boolean | dataReceived
 | ) |  |

requests to receive data from message buffer.

Parameters
eray | pointer to ERAY module registers.
dataReceived | whether data to be received or not.
Returns
None

Definition at line 1606 of file IfxEray.h.

Referenced by IfxEray_Eray_receiveFifoFrame(), and IfxEray_Eray_receiveFrame().

◆ IfxEray_sendData()

IFX_INLINE void IfxEray_sendData | ( | Ifx_ERAY * | eray,
 |  | boolean | dataTransfered
 | ) |  |

sets the bit to send data in frame.

Parameters
eray | pointer to ERAY module registers.
dataTransfered | whether data transfered or not.
Returns
None

Definition at line 1618 of file IfxEray.h.

Referenced by IfxEray_Eray_transmitFrame().

◆ IfxEray_setSlot()

IFX_EXTERN void IfxEray_setSlot | ( | Ifx_ERAY * | eray,
 |  | const IfxEray_Header * | header,
 |  | const uint32 * | data,
 |  | const IfxEray_SlotConfig * | slotConfig
 | ) |  |

Writes header and data to Input buffers and set the slots.

Parameters
eray | pointer to ERAY module registers.
header | Header section of message buffer.
data | data section of message buffer.
slotConfig | pointer slot allocation configuration structure.
Returns
None

Definition at line 295 of file IfxEray.c.

Referenced by IfxEray_Eray_bufferReconfig(), and IfxEray_Eray_Node_initMessageRAM().

◆ IfxEray_writeData()

IFX_EXTERN void IfxEray_writeData | ( | Ifx_ERAY * | eray,
 |  | const uint32 * | data,
 |  | uint8 | payloadLength
 | ) |  |

Writes data section of a frame to input data registers.

Parameters
eray | pointer to ERAY module registers.
data | data segment in a frame.
payloadLength | payload length configured for slot buffer.
Returns
None

Definition at line 348 of file IfxEray.c.

Referenced by IfxEray_Eray_writeData(), and IfxEray_setSlot().


iLLD_TC38A: ERAY Pin Mapping

Data Structures | Macros | Variables
ERAY Pin Mapping
iLLD » ERAY
Collaboration diagram for ERAY Pin Mapping:

Data Structures

struct | IfxEray_Rxd_In
RXD pin mapping structure. More...
struct | IfxEray_Txd_Out
TXD pin mapping structure. More...
struct | IfxEray_Txen_Out
TXEN pin mapping structure. More...

Macros

#define | IFXERAY_PINMAP_NUM_MODULES 2
Table dimensions. More...
#define | IFXERAY_PINMAP_NUM_NODES 2
#define | IFXERAY_PINMAP_RXD_IN_NUM_ITEMS 4
#define | IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS 4
#define | IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS 5

Variables

IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA0_P14_8_IN
Receive Channel A0. More...
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA1_P11_9_IN
Receive Channel A1. More...
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA2_P02_1_IN
Receive Channel A2. More...
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA3_P14_1_IN
Receive Channel A3. More...
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB0_P14_7_IN
Receive Channel B0. More...
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB1_P11_10_IN
Receive Channel B1. More...
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB2_P02_3_IN
Receive Channel B2. More...
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB3_P14_1_IN
Receive Channel B3. More...
IFX_EXTERN IfxEray_Rxd_In IfxEray1_RXDA0_P14_8_IN
Receive Channel A0. More...
IFX_EXTERN IfxEray_Rxd_In IfxEray1_RXDA1_P01_1_IN
Receive Channel A1. More...
IFX_EXTERN IfxEray_Rxd_In IfxEray1_RXDB0_P14_7_IN
Receive Channel B0. More...
IFX_EXTERN IfxEray_Rxd_In IfxEray1_RXDB1_P01_8_IN
Receive Channel B1. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P02_0_OUT
Transmit Channel A. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P11_3_OUT
Transmit Channel A. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P14_0_OUT
Transmit Channel A. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P14_10_OUT
Transmit Channel A. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P02_2_OUT
Transmit Channel B. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P11_12_OUT
Transmit Channel B. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P14_0_OUT
Transmit Channel B. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P14_5_OUT
Transmit Channel B. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray1_TXDA_P01_12_OUT
Transmit Channel A. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray1_TXDA_P14_10_OUT
Transmit Channel A. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray1_TXDB_P01_13_OUT
Transmit Channel B. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray1_TXDB_P14_5_OUT
Transmit Channel B. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENA_P02_4_OUT
Transmit Enable Channel A. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENA_P11_6_OUT
Transmit Enable Channel A. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENA_P14_9_OUT
Transmit Enable Channel A. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P02_5_OUT
Transmit Enable Channel B. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P11_11_OUT
Transmit Enable Channel B. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P11_6_OUT
Transmit Enable Channel B. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P14_6_OUT
Transmit Enable Channel B. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P14_9_OUT
Transmit Enable Channel B. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray1_TXENA_P01_14_OUT
Transmit Enable Channel A. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray1_TXENA_P14_9_OUT
Transmit Enable Channel A. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray1_TXENB_P02_15_OUT
Transmit Enable Channel B. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray1_TXENB_P14_6_OUT
Transmit Enable Channel B. More...
IFX_EXTERN const IfxEray_Rxd_In * | IfxEray_Rxd_In_pinTable [IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_RXD_IN_NUM_ITEMS]
IfxEray_Rxd_In table. More...
IFX_EXTERN const IfxEray_Txd_Out * | IfxEray_Txd_Out_pinTable [IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS]
IfxEray_Txd_Out table. More...
IFX_EXTERN const IfxEray_Txen_Out * | IfxEray_Txen_Out_pinTable [IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS]
IfxEray_Txen_Out table. More...

Detailed Description

Data Structure Documentation

◆ IfxEray_Rxd_In

struct IfxEray_Rxd_In

RXD pin mapping structure.

Definition at line 56 of file IfxEray_PinMap.h.

Collaboration diagram for IfxEray_Rxd_In:
[legend]
Data Fields
Ifx_ERAY * | module | Base address.
IfxEray_NodeId | nodeId | Node ID.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxEray_Txd_Out

struct IfxEray_Txd_Out

TXD pin mapping structure.

Definition at line 65 of file IfxEray_PinMap.h.

Collaboration diagram for IfxEray_Txd_Out:
[legend]
Data Fields
Ifx_ERAY * | module | Base address.
IfxEray_NodeId | nodeId | Node ID.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxEray_Txen_Out

struct IfxEray_Txen_Out

TXEN pin mapping structure.

Definition at line 74 of file IfxEray_PinMap.h.

Collaboration diagram for IfxEray_Txen_Out:
[legend]
Data Fields
Ifx_ERAY * | module | Base address.
IfxEray_NodeId | nodeId | Node ID.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

Macro Definition Documentation

◆ IFXERAY_PINMAP_NUM_MODULES

#define IFXERAY_PINMAP_NUM_MODULES 2

Table dimensions.

Definition at line 120 of file IfxEray_PinMap.h.

◆ IFXERAY_PINMAP_NUM_NODES

#define IFXERAY_PINMAP_NUM_NODES 2

Definition at line 121 of file IfxEray_PinMap.h.

◆ IFXERAY_PINMAP_RXD_IN_NUM_ITEMS

#define IFXERAY_PINMAP_RXD_IN_NUM_ITEMS 4

Definition at line 122 of file IfxEray_PinMap.h.

◆ IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS

#define IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS 4

Definition at line 123 of file IfxEray_PinMap.h.

◆ IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS

#define IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS 5

Definition at line 124 of file IfxEray_PinMap.h.

Variable Documentation

◆ IfxEray0_RXDA0_P14_8_IN

IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA0_P14_8_IN

Receive Channel A0.

Definition at line 82 of file IfxEray_PinMap.h.

◆ IfxEray0_RXDA1_P11_9_IN

IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA1_P11_9_IN

Receive Channel A1.

Definition at line 83 of file IfxEray_PinMap.h.

◆ IfxEray0_RXDA2_P02_1_IN

IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA2_P02_1_IN

Receive Channel A2.

Definition at line 84 of file IfxEray_PinMap.h.

◆ IfxEray0_RXDA3_P14_1_IN

IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA3_P14_1_IN

Receive Channel A3.

Definition at line 85 of file IfxEray_PinMap.h.

◆ IfxEray0_RXDB0_P14_7_IN

IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB0_P14_7_IN

Receive Channel B0.

Definition at line 86 of file IfxEray_PinMap.h.

◆ IfxEray0_RXDB1_P11_10_IN

IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB1_P11_10_IN

Receive Channel B1.

Definition at line 87 of file IfxEray_PinMap.h.

◆ IfxEray0_RXDB2_P02_3_IN

IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB2_P02_3_IN

Receive Channel B2.

Definition at line 88 of file IfxEray_PinMap.h.

◆ IfxEray0_RXDB3_P14_1_IN

IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB3_P14_1_IN

Receive Channel B3.

Definition at line 89 of file IfxEray_PinMap.h.

◆ IfxEray0_TXDA_P02_0_OUT

IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P02_0_OUT

Transmit Channel A.

Definition at line 94 of file IfxEray_PinMap.h.

◆ IfxEray0_TXDA_P11_3_OUT

IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P11_3_OUT

Transmit Channel A.

Definition at line 95 of file IfxEray_PinMap.h.

◆ IfxEray0_TXDA_P14_0_OUT

IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P14_0_OUT

Transmit Channel A.

Definition at line 96 of file IfxEray_PinMap.h.

◆ IfxEray0_TXDA_P14_10_OUT

IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P14_10_OUT

Transmit Channel A.

Definition at line 97 of file IfxEray_PinMap.h.

◆ IfxEray0_TXDB_P02_2_OUT

IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P02_2_OUT

Transmit Channel B.

Definition at line 98 of file IfxEray_PinMap.h.

◆ IfxEray0_TXDB_P11_12_OUT

IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P11_12_OUT

Transmit Channel B.

Definition at line 99 of file IfxEray_PinMap.h.

◆ IfxEray0_TXDB_P14_0_OUT

IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P14_0_OUT

Transmit Channel B.

Definition at line 100 of file IfxEray_PinMap.h.

◆ IfxEray0_TXDB_P14_5_OUT

IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P14_5_OUT

Transmit Channel B.

Definition at line 101 of file IfxEray_PinMap.h.

◆ IfxEray0_TXENA_P02_4_OUT

IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENA_P02_4_OUT

Transmit Enable Channel A.

Definition at line 106 of file IfxEray_PinMap.h.

◆ IfxEray0_TXENA_P11_6_OUT

IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENA_P11_6_OUT

Transmit Enable Channel A.

Definition at line 107 of file IfxEray_PinMap.h.

◆ IfxEray0_TXENA_P14_9_OUT

IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENA_P14_9_OUT

Transmit Enable Channel A.

Definition at line 108 of file IfxEray_PinMap.h.

◆ IfxEray0_TXENB_P02_5_OUT

IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P02_5_OUT

Transmit Enable Channel B.

Definition at line 109 of file IfxEray_PinMap.h.

◆ IfxEray0_TXENB_P11_11_OUT

IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P11_11_OUT

Transmit Enable Channel B.

Definition at line 110 of file IfxEray_PinMap.h.

◆ IfxEray0_TXENB_P11_6_OUT

IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P11_6_OUT

Transmit Enable Channel B.

Definition at line 111 of file IfxEray_PinMap.h.

◆ IfxEray0_TXENB_P14_6_OUT

IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P14_6_OUT

Transmit Enable Channel B.

Definition at line 112 of file IfxEray_PinMap.h.

◆ IfxEray0_TXENB_P14_9_OUT

IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P14_9_OUT

Transmit Enable Channel B.

Definition at line 113 of file IfxEray_PinMap.h.

◆ IfxEray1_RXDA0_P14_8_IN

IFX_EXTERN IfxEray_Rxd_In IfxEray1_RXDA0_P14_8_IN

Receive Channel A0.

Definition at line 90 of file IfxEray_PinMap.h.

◆ IfxEray1_RXDA1_P01_1_IN

IFX_EXTERN IfxEray_Rxd_In IfxEray1_RXDA1_P01_1_IN

Receive Channel A1.

Definition at line 91 of file IfxEray_PinMap.h.

◆ IfxEray1_RXDB0_P14_7_IN

IFX_EXTERN IfxEray_Rxd_In IfxEray1_RXDB0_P14_7_IN

Receive Channel B0.

Definition at line 92 of file IfxEray_PinMap.h.

◆ IfxEray1_RXDB1_P01_8_IN

IFX_EXTERN IfxEray_Rxd_In IfxEray1_RXDB1_P01_8_IN

Receive Channel B1.

Definition at line 93 of file IfxEray_PinMap.h.

◆ IfxEray1_TXDA_P01_12_OUT

IFX_EXTERN IfxEray_Txd_Out IfxEray1_TXDA_P01_12_OUT

Transmit Channel A.

Definition at line 102 of file IfxEray_PinMap.h.

◆ IfxEray1_TXDA_P14_10_OUT

IFX_EXTERN IfxEray_Txd_Out IfxEray1_TXDA_P14_10_OUT

Transmit Channel A.

Definition at line 103 of file IfxEray_PinMap.h.

◆ IfxEray1_TXDB_P01_13_OUT

IFX_EXTERN IfxEray_Txd_Out IfxEray1_TXDB_P01_13_OUT

Transmit Channel B.

Definition at line 104 of file IfxEray_PinMap.h.

◆ IfxEray1_TXDB_P14_5_OUT

IFX_EXTERN IfxEray_Txd_Out IfxEray1_TXDB_P14_5_OUT

Transmit Channel B.

Definition at line 105 of file IfxEray_PinMap.h.

◆ IfxEray1_TXENA_P01_14_OUT

IFX_EXTERN IfxEray_Txen_Out IfxEray1_TXENA_P01_14_OUT

Transmit Enable Channel A.

Definition at line 114 of file IfxEray_PinMap.h.

◆ IfxEray1_TXENA_P14_9_OUT

IFX_EXTERN IfxEray_Txen_Out IfxEray1_TXENA_P14_9_OUT

Transmit Enable Channel A.

Definition at line 115 of file IfxEray_PinMap.h.

◆ IfxEray1_TXENB_P02_15_OUT

IFX_EXTERN IfxEray_Txen_Out IfxEray1_TXENB_P02_15_OUT

Transmit Enable Channel B.

Definition at line 116 of file IfxEray_PinMap.h.

◆ IfxEray1_TXENB_P14_6_OUT

IFX_EXTERN IfxEray_Txen_Out IfxEray1_TXENB_P14_6_OUT

Transmit Enable Channel B.

Definition at line 117 of file IfxEray_PinMap.h.

◆ IfxEray_Rxd_In_pinTable

IFX_EXTERN const IfxEray_Rxd_In* IfxEray_Rxd_In_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_RXD_IN_NUM_ITEMS]

IfxEray_Rxd_In table.

Definition at line 128 of file IfxEray_PinMap.h.

◆ IfxEray_Txd_Out_pinTable

IFX_EXTERN const IfxEray_Txd_Out* IfxEray_Txd_Out_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS]

IfxEray_Txd_Out table.

Definition at line 131 of file IfxEray_PinMap.h.

◆ IfxEray_Txen_Out_pinTable

IFX_EXTERN const IfxEray_Txen_Out* IfxEray_Txen_Out_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS]

IfxEray_Txen_Out table.

Definition at line 134 of file IfxEray_PinMap.h.


iLLD_TC38A: How to use the ERAY Interface driver?

How to use the ERAY Interface driver?
iLLD » ERAY
Collaboration diagram for How to use the ERAY Interface driver?:

Preparation

Include Files

Include following header file into your C code:

#include <Eray/Eray/IfxEray_Eray.h>
#include <Scu/Std/IfxScuWdt.h>
#include <eray_commands.h>

Defines

// Number of tested communication cycles
#define NUMBER_ERAY_COMM_CYCLES 8
#define NO_OF_SLOTS 2

Variables

// global variables
static IfxEray_Eray eray;
volatile unsigned receivedDataCounter;
uint32 receivedData[NUMBER_ERAY_COMM_CYCLES][NO_OF_SLOTS];

Interrupt Handler Installation

Define priorities for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:

#define IFX_ERAY_INT0_PRIO 1
#define IFX_ERAY_INT1_PRIO 2
#define IFX_ERAY_NDAT0_PRIO 3
#define IFX_ERAY_NDAT1_PRIO 4
#define IFX_ERAY_MBSC0_PRIO 5
#define IFX_ERAY_MBSC1_PRIO 6

Add the interrupt service routine to your C code. It has to call the ERAY interrupt handler:

// ISR routines for interrupt handling
void ERAY_irqInt0Handler();
void ERAY_irqInt1Handler();
void ERAY_irqNdat0Handler();
void ERAY_irqNdat1Handler();
void ERAY_irqMbsc0Handler();
void ERAY_irqMbsc1Handler();
IFX_INTERRUPT(eray0Int0ISR, 0, IFX_ERAY_INT0_PRIO)
{
ERAY_irqInt0Handler();
}
IFX_INTERRUPT(eray0Int1ISR, 0, IFX_ERAY_INT1_PRIO)
{
ERAY_irqInt1Handler();
}
IFX_INTERRUPT(eray0Ndat0ISR, 0, IFX_ERAY_NDAT0_PRIO)
{
ERAY_irqNdat0Handler();
}
IFX_INTERRUPT(eray0Ndat1ISR, 0, IFX_ERAY_NDAT1_PRIO)
{
ERAY_irqNdat1Handler();
}
IFX_INTERRUPT(eray0Mbsc0ISR, 0, IFX_ERAY_MBSC0_PRIO)
{
ERAY_irqMbsc0Handler();
}
IFX_INTERRUPT(eray0Mbsc1ISR, 0, IFX_ERAY_MBSC1_PRIO)
{
ERAY_irqMbsc1Handler();
}

Finally install the interrupt handlers in your initialisation function:

// install interrupt handler
IfxCpu_Irq_installInterruptHandler(&eray0Int0ISR, IFX_ERAY_INT0_PRIO);
IfxCpu_Irq_installInterruptHandler(&eray0Int1ISR, IFX_ERAY_INT1_PRIO);
IfxCpu_Irq_installInterruptHandler(&eray0Ndat0ISR, IFX_ERAY_NDAT0_PRIO);
IfxCpu_Irq_installInterruptHandler(&eray0Ndat1ISR, IFX_ERAY_NDAT1_PRIO);
IfxCpu_Irq_installInterruptHandler(&eray0Mbsc0ISR, IFX_ERAY_MBSC0_PRIO);
IfxCpu_Irq_installInterruptHandler(&eray0Mbsc1ISR, IFX_ERAY_MBSC1_PRIO);
// enable all cpu0 interrupts
IfxCpu_enableInterrupts();

Module Initialisation

First ensure that the ERAY PLL is configured to output a 80 MHz clock for the ERAY module:

// initialize Eray PLL
//clib_ver_printf("Initialize ERAY PLL\n");
{
IfxScuCcu_ErayPllConfig ErayPllConfig;
IfxScuCcu_initErayPllConfig(&ErayPllConfig);
result |= IfxScuCcu_initErayPll(&ErayPllConfig);
}

Thereafter initialize the module:

// create module config
IfxEray_Eray_Config erayModuleConfig;
#if TEST_ERAY1
//clib_ver_printf("Initialize ERAY1\n");
IfxEray_Eray_initModuleConfig(&erayModuleConfig, &MODULE_ERAY1);
#else
//clib_ver_printf("Initialize ERAY0\n");
IfxEray_Eray_initModuleConfig(&erayModuleConfig, &MODULE_ERAY0);
#endif
// ISR priorities
erayModuleConfig.interrupt.int0Priority = IFX_ERAY_INT0_PRIO;
erayModuleConfig.interrupt.int1Priority = IFX_ERAY_INT1_PRIO;
erayModuleConfig.interrupt.ndat0Priority = IFX_ERAY_NDAT0_PRIO;
erayModuleConfig.interrupt.ndat1Priority = IFX_ERAY_NDAT1_PRIO;
erayModuleConfig.interrupt.mbsc0Priority = IFX_ERAY_MBSC0_PRIO;
erayModuleConfig.interrupt.mbsc1Priority = IFX_ERAY_MBSC1_PRIO;
// init module
IfxEray_Eray_initModule( &eray, &erayModuleConfig );

Note: Application should explicitly configure the system DMA, if system DMA is selected as the service provider for the interrupt.

Node Initialisation

The node initialisation can be done in the same function.

// get ERAY node default configuration
IfxEray_Eray_NodeConfig nodeConfig;
IfxEray_Eray_Node_initConfig(&nodeConfig);
// configuration changes for interaction with external testbench element
{
// only for simulation: start external ERAY node
{
TbeMessage reply;
// start ERay Testbench Element
sendMessage(MSG_ID_TESTBENCH_ERAY, CMD_ERAY_TBE_START, 0 );
receiveMessageBlockingFrom(MSG_ID_TESTBENCH_ERAY, reply);
}
{
// SUCC1
IfxEray_Eray_Succ1Config *succ1 = &nodeConfig.controllerConfig.succ1Config;
succ1->clockSyncErrorHalt = FALSE;
}
{
// PRTC1
IfxEray_Eray_Prtc1Control *prtc1 = &nodeConfig.controllerConfig.prtc1Control;
prtc1->transmissionStartTime = 10;
prtc1->collisionAvoidanceDuration = 0;
prtc1->strobePosition = IfxEray_StrobePosition_5;
prtc1->baudrate = IfxEray_Baudrate_10;
prtc1->receiveWakeupTestDuration = 76;
prtc1->transmitWakeupRepetitions = 2;
}
{
// PRTC2
IfxEray_Eray_Prtc2Control *prtc2 = &nodeConfig.controllerConfig.prtc2Control;
prtc2->receiveWakeupIdleTime = 18;
prtc2->receiveWakeupLowTime = 18;
prtc2->transmitWakeupIdleTime = 180;
prtc2->transmitWakeupLowTime = 60;
}
{
// SUCC2
IfxEray_Eray_Succ2Config *succ2 = &nodeConfig.controllerConfig.succ2Config;
succ2->listenTimeOut = 2500;
succ2->listenTimeOutNoise = IfxEray_ListenTimeOutNoise_16;
}
{
// GTU
IfxEray_Eray_GTUConfig *gtu = &nodeConfig.controllerConfig.gtuConfig;
gtu->gtu01Config.microticksPerCycle = 3000;
gtu->gtu02Config.macroticksPerCycle = 50;
gtu->gtu02Config.maxSyncFrames = 15;
gtu->gtu03Config.channelAMicrotickInitialOffset = 0;
gtu->gtu03Config.channelBMicrotickInitialOffset = 0;
gtu->gtu03Config.channelAMacrotickInitialOffset = 2;
gtu->gtu03Config.channelBMacrotickInitialOffset = 2;
gtu->gtu04Config.networkStartIdleTime = 0x2f;
gtu->gtu04Config.correctionOffset = 0x30;
gtu->gtu05Config.channelAReceptionDelay = 0x4;
gtu->gtu05Config.channelBReceptionDelay = 0x4;
gtu->gtu05Config.clusterDrift = 1;
gtu->gtu05Config.decodingCorrection = 0x34;
gtu->gtu06Config.acceptedStartupDeviation = 0x81;
gtu->gtu06Config.maxDriftOffset = 0x31;
gtu->gtu07Config.staticSlotLength = 0x10;
gtu->gtu07Config.staticSlotsCount = 0x2;
gtu->gtu08Config.dynamicSlotLength = 2;
gtu->gtu08Config.dynamicSlotCount = 2;
gtu->gtu09Config.idleDynamicSlots = IfxEray_IdleDynamicSlots_1; // bug: not set by IfxEray_setDynamicSlots
gtu->gtu09Config.staticActionPoint = 1;
gtu->gtu09Config.dynamicActionPoint = 1;
gtu->gtu10Config.maxOffsetCorrection = 0xcd;
gtu->gtu10Config.maxRateCorrection = 0x31;
gtu->gtu11Config.externalOffsetCorrection = IfxEray_ExternalOffsetCorrection_0;
gtu->gtu11Config.externalRateCorrection = IfxEray_ExternalRateCorrection_0;
gtu->gtu11Config.externalOffset = IfxEray_ExternalOffset_noCorrection;
gtu->gtu11Config.externalRate = IfxEray_ExternalRate_noCorrection;
}
}
// Messages
nodeConfig.messageRAMConfig.numberOfMessageBuffers = 2;
nodeConfig.messageRAMConfig.firstDynamicBuffer = 0x40;
nodeConfig.messageRAMConfig.fifoBufferStartIndex = 0x40;
// Frame header
IfxEray_Header header[2] = {
// fid cyc cha chb buffer direction ppit transmission mode mbi pl dp startupfr syncfr
{ 1, 1, TRUE, TRUE, IfxEray_BufferDirection_transmit, TRUE, IfxEray_TransmissionMode_continuous, TRUE, 4, 0x30, TRUE, TRUE },
{ 2, 1, TRUE, TRUE, IfxEray_BufferDirection_receive, FALSE, IfxEray_TransmissionMode_continuous, TRUE, 4, 0x40, FALSE, FALSE },
};
// slot buffer
IfxEray_SlotConfig slot[2] = {
// header data stxrh buffNum
{ TRUE, TRUE, TRUE, 0 },
{ TRUE, FALSE, FALSE, 1 },
};
for(int i=0; i < 2; ++i) {
nodeConfig.messageRAMConfig.header[i] = &header[i];
nodeConfig.messageRAMConfig.slotControl[i] = &slot[i];
nodeConfig.messageRAMConfig.data[i] = NULL_PTR;
}
#if TEST_ERAY1
// channel A pins
const IfxEray_Eray_NodeA nodeAPins = {
IfxPort_InputMode_pullDown, IfxPort_OutputMode_pushPull,
IfxPort_PadDriver_cmosAutomotiveSpeed3, IfxPort_OutputMode_pushPull,
&IfxEray1_RXDA0_P14_8_IN, &IfxEray1_TXDA_P14_10_OUT,
&IfxEray1_TXENA_P14_9_OUT
};
// channel B pins
const IfxEray_Eray_NodeB nodeBPins = {
IfxPort_InputMode_pullDown, IfxPort_OutputMode_pushPull,
IfxPort_PadDriver_cmosAutomotiveSpeed3, IfxPort_OutputMode_pushPull,
&IfxEray1_RXDB0_P14_7_IN, &IfxEray1_TXDB_P14_5_OUT,
&IfxEray1_TXENB_P14_6_OUT
};
#else
// channel A pins
const IfxEray_Eray_NodeA nodeAPins = {
IfxPort_InputMode_pullDown, IfxPort_OutputMode_pushPull,
IfxPort_PadDriver_cmosAutomotiveSpeed3, IfxPort_OutputMode_pushPull,
&IfxEray0_RXDA0_P14_8_IN, &IfxEray0_TXDA_P14_10_OUT,
&IfxEray0_TXENA_P14_9_OUT
};
// channel B pins
const IfxEray_Eray_NodeB nodeBPins = {
IfxPort_InputMode_pullDown, IfxPort_OutputMode_pushPull,
IfxPort_PadDriver_cmosAutomotiveSpeed3, IfxPort_OutputMode_pushPull,
&IfxEray0_RXDB0_P14_7_IN, &IfxEray0_TXDB_P14_5_OUT,
&IfxEray0_TXENB_P14_6_OUT
};
#endif
const IfxEray_Eray_Pins pins = { (IfxEray_Eray_NodeA *)&nodeAPins, (IfxEray_Eray_NodeB *)&nodeBPins };
nodeConfig.pins = (IfxEray_Eray_Pins *)&pins;
// ERAY node initialisation with supplied configuration
IfxEray_Eray_Node_init(&eray, &nodeConfig);
// set interrupt outputs for data and message buffers
IfxEray_Eray_setNewDataInterruptDestination(&eray, 0, 0); // New Data #0 -> NDAT0
IfxEray_Eray_setNewDataInterruptDestination(&eray, 1, 1); // New Data #1 -> NDAT1
IfxEray_Eray_setMessageBufferInterruptDestination(&eray, 0, 0); // Message Buffer #0 -> MBSC0
IfxEray_Eray_setMessageBufferInterruptDestination(&eray, 1, 1); // Message Buffer #1 -> MBSC1
//clib_ver_printf("Send wakeup pattern\n");
// send wakeup pattern on default configured channel ( IfxEray_Channel_a )
IfxEray_PocState pocState;
do {
pocState = IfxEray_Eray_getPocState( &eray );
if ( pocState != IfxEray_PocState_wakeupListen ) {
while ( !IfxEray_Eray_changePocState( &eray, IfxEray_PocCommand_wakeup ));
}
} while ( pocState != IfxEray_PocState_wakeupListen );
// allow node to cold-start and wait until cold-start is successful
while( !IfxEray_Eray_allowColdStart(&eray) );
// start the communication in cluster and wait until communication is successfull
while( !IfxEray_Eray_startCommunication(&eray) );
// wait until communication Controller enters NORMAL_ACTIVE or NORMAL_PASSIVE state, exit if communication Controller enters HALT state.
do {
pocState = IfxEray_Eray_getPocState( &eray );
// if communication Controller enters HALT state, break the loop.
if( pocState == IfxEray_PocState_halt) {
break;
}
} while( !((pocState == IfxEray_PocState_normalActive) || (pocState == IfxEray_PocState_normalPassive)) );
// enter ALL_SLOTS mode when Communication Controller is in NORMAL_ACTIVE or NORMAL_PASSIVE state only.
if ( pocState == IfxEray_PocState_normalActive || pocState == IfxEray_PocState_normalPassive ) {
while ( !IfxEray_Eray_setPocAllSlots(&eray) );
}

Transactions

unsigned prevReceivedDataCounter = 0;
while( 1 ) {
if( receivedDataCounter != prevReceivedDataCounter ) {
prevReceivedDataCounter = receivedDataCounter;
//clib_ver_printf("Received %d packets", receivedDataCounter);
if( receivedDataCounter >= NUMBER_ERAY_COMM_CYCLES )
break;
}
};

Interrupt Service Handlers

The ISR has to be implemented in the application. Following templates can be used to react on the events:

void ERAY_irqInt0Handler()
{
//clib_ver_note(1); // for debugging in simulation: notify Int0
Ifx_ERAY_EIR ErrIntStat = IfxEray_Eray_getErrorInterrupts( &eray );
Ifx_ERAY_SIR StatusIntStat = IfxEray_Eray_getStatusInterrupts( &eray );
if(StatusIntStat.B.SDS)
{
// SDS must be cleared for getting the next interrupt
IfxEray_Eray_clearStatusFlag( &eray, IfxEray_ClearStatusFlag_sds );
}
if(StatusIntStat.B.CYCS)
{
// CYCS must be cleared for getting the next interrupt
IfxEray_Eray_clearStatusFlag( &eray, IfxEray_ClearStatusFlag_cycs );
}
if(StatusIntStat.B.SUCS)
{
// SUCS must be cleared for getting the next interrupt
IfxEray_Eray_clearStatusFlag( &eray, IfxEray_ClearStatusFlag_sucs );
}
if(StatusIntStat.B.TIBC)
{
// TIBC must be cleared for getting the next interrupt
IfxEray_Eray_clearStatusFlag( &eray, IfxEray_ClearStatusFlag_tibc );
}
if(ErrIntStat.B.MHF)
{
// clear flag MHF
IfxEray_Eray_clearErrorFlag( &eray, IfxEray_ClearErrorFlag_mhf );
}
}
void ERAY_irqInt1Handler()
{
//clib_ver_note(2); // for debugging in simulation: notify Int1
// TOBC must be cleared for getting the next interrupt
IfxEray_Eray_clearStatusFlag( &eray, IfxEray_ClearStatusFlag_tobc );
}
void ERAY_irqNdat0Handler()
{
//clib_ver_note(3); // for debugging in simulation: notify Ndat0
}
void ERAY_irqNdat1Handler()
{
//clib_ver_note(4); // for debugging in simulation: notify Ndat1
// message received in slot1 buffer?
if( IfxEray_Eray_getNewDataInterruptStatus(&eray, 1) == 1 )
{
// read data
uint32 data[2];
{
IfxEray_Eray_ReceiveControl config;
config.headerReceived = TRUE;
config.dataReceived = TRUE;
config.receiveRequested = TRUE;
config.swapRequested = TRUE;
config.bufferIndex = 1;
IfxEray_Eray_receiveFrame(&eray, &config);
IfxEray_Eray_readData(&eray, data, 2*2);
}
// display received data (Here received data has to be displayed)
//clib_ver_data(data[0]);
//clib_ver_data(data[1]);
// store received data
if( receivedDataCounter < NUMBER_ERAY_COMM_CYCLES ) {
receivedData[receivedDataCounter][0] = data[0];
receivedData[receivedDataCounter][1] = data[1];
}
++receivedDataCounter;
// put some new data into slot0
++data[0];
++data[1];
{
IfxEray_Eray_TransmitControl config;
config.headerTransfered = FALSE;
config.dataTransfered = TRUE;
config.transferRequested = TRUE;
config.bufferIndex = 0;
IfxEray_Eray_writeData(&eray, data, 2*2);
IfxEray_Eray_transmitFrame(&eray, &config);
}
}
}
void ERAY_irqMbsc0Handler()
{
//clib_ver_note(5); // for debugging in simulation: notify Mbsc0
}
void ERAY_irqMbsc1Handler()
{
//clib_ver_note(6); // for debugging in simulation: notify Mbsc1
}


iLLD_TC38A: ERAY

Modules
ERAY
iLLD » ERAY
Collaboration diagram for ERAY:

Modules

Data Structures
Module Initialisation Functions
Node Initialisation Functions
Operative Functions
Status Functions
Interrupt Functions

Detailed Description


iLLD_TC38A: Data Structures

Data Structures
Data Structures
iLLD » ERAY » ERAY
Collaboration diagram for Data Structures:

Data Structures

struct | IfxEray_Eray_Gtu01Config
GTU01 configuration. More...
struct | IfxEray_Eray_Gtu02Config
GTU02 configuration. More...
struct | IfxEray_Eray_Gtu03Config
GTU03 configuration. More...
struct | IfxEray_Eray_Gtu04Config
GTU04 configuration. More...
struct | IfxEray_Eray_Gtu05Config
GTU05 configuration. More...
struct | IfxEray_Eray_Gtu06Config
GTU06 configuration. More...
struct | IfxEray_Eray_Gtu07Config
GTU07 configuration. More...
struct | IfxEray_Eray_Gtu08Config
GTU08 configuration. More...
struct | IfxEray_Eray_Gtu09Config
GTU09 configuration. More...
struct | IfxEray_Eray_Gtu10Config
GTU10 configuration. More...
struct | IfxEray_Eray_Gtu11Config
GTU11 configuration. More...
struct | IfxEray_Eray_GTUConfig
Gloabl Timing Unit configuration structure. More...
struct | IfxEray_Eray_NodeA
Pins configuration structure for Node A. More...
struct | IfxEray_Eray_NodeB
Pins configuration structure for Node B. More...
struct | IfxEray_Eray_Prtc1Control
Protocol operation control properties. More...
struct | IfxEray_Eray_Prtc2Control
Wakeup symbol control properties. More...
struct | IfxEray_Eray_Succ1Config
communication controller control properties. More...
struct | IfxEray_Eray_Succ2Config
Communication listen timeout properties. More...
struct | IfxEray_Eray_Succ3Config
Clock correction fail properties. More...
struct | IfxEray_Eray_ControllerConfig
Communication Controller configuration structure. More...
struct | IfxEray_Eray_Interrupt
Interrupt control properties. More...
struct | IfxEray_Eray_MessageRAMConfig
Message RAM configuration structure. More...
struct | IfxEray_Eray
ERAY Module handle. More...
struct | IfxEray_Eray_BufferReconfig
Reconfigurable buffer structure. More...
struct | IfxEray_Eray_Config
Module configuration structure. More...
struct | IfxEray_Eray_NodeConfig
Node configuration structure. More...
struct | IfxEray_Eray_ReceiveControl
Receive control properties structure. More...
struct | IfxEray_Eray_ReceivedFrame
Received Frame. More...
struct | IfxEray_Eray_TransmitControl
Transfer control in a slot. More...

Detailed Description

Data Structure Documentation

◆ IfxEray_Eray_Gtu01Config

struct IfxEray_Eray_Gtu01Config

GTU01 configuration.

Definition at line 533 of file IfxEray_Eray.h.

Data Fields
uint32 microticksPerCycle Duration of the communication cycle in Microticks.

◆ IfxEray_Eray_Gtu02Config

struct IfxEray_Eray_Gtu02Config

GTU02 configuration.

Definition at line 540 of file IfxEray_Eray.h.

Data Fields
uint16 | macroticksPerCycle | Duration of the communication cycle in Macroticks.
uint8 | maxSyncFrames | Maximum number of sync frames in a cluster.

◆ IfxEray_Eray_Gtu03Config

struct IfxEray_Eray_Gtu03Config

GTU03 configuration.

Definition at line 548 of file IfxEray_Eray.h.

Data Fields
uint8 | channelAMacrotickInitialOffset | difference between two adjacent static slots on channel A in macroticks.
uint8 | channelAMicrotickInitialOffset | difference between adjacent time reference points on channel A in microticks.
uint8 | channelBMacrotickInitialOffset | difference between two adjacent static slots on channel B in macroticks.
uint8 | channelBMicrotickInitialOffset | difference between adjacent time reference points on channel B in microticks.

◆ IfxEray_Eray_Gtu04Config

struct IfxEray_Eray_Gtu04Config

GTU04 configuration.

Definition at line 558 of file IfxEray_Eray.h.

Data Fields
uint16 | correctionOffset | offset correction start point.
uint16 | networkStartIdleTime | starting point of Network Idle Time Phase.

◆ IfxEray_Eray_Gtu05Config

struct IfxEray_Eray_Gtu05Config

GTU05 configuration.

Definition at line 566 of file IfxEray_Eray.h.

Data Fields
uint8 | channelAReceptionDelay | reception delay on channel A.
uint8 | channelBReceptionDelay | reception delay on channel B.
uint8 | clusterDrift | cluster drift damping value used in clock synchronization.
uint8 | decodingCorrection | decoding correction to determine the primary time reference point.

◆ IfxEray_Eray_Gtu06Config

struct IfxEray_Eray_Gtu06Config

GTU06 configuration.

Definition at line 576 of file IfxEray_Eray.h.

Data Fields
uint16 | acceptedStartupDeviation | expanded range of measured deviation for startup Frames during integration.
uint16 | maxDriftOffset | maximum drift offset between two nodes.

◆ IfxEray_Eray_Gtu07Config

struct IfxEray_Eray_Gtu07Config

GTU07 configuration.

Definition at line 584 of file IfxEray_Eray.h.

Data Fields
uint16 | staticSlotLength | duration of static slot in macroticks.
uint16 | staticSlotsCount | number of static slots in a communication cycle.

◆ IfxEray_Eray_Gtu08Config

struct IfxEray_Eray_Gtu08Config

GTU08 configuration.

Definition at line 592 of file IfxEray_Eray.h.

Data Fields
uint16 | dynamicSlotCount | number of dynamic slots in a communication cycle.
uint8 | dynamicSlotLength | duration of dynamic slot in macroticks.

◆ IfxEray_Eray_Gtu09Config

struct IfxEray_Eray_Gtu09Config

GTU09 configuration.

Definition at line 600 of file IfxEray_Eray.h.

Data Fields
uint8 | dynamicActionPoint | dynamic slots action point.
IfxEray_IdleDynamicSlots | idleDynamicSlots | duration of dynamic slot idle phase.
uint8 | staticActionPoint | static slots and symbol window action point.

◆ IfxEray_Eray_Gtu10Config

struct IfxEray_Eray_Gtu10Config

GTU10 configuration.

Definition at line 609 of file IfxEray_Eray.h.

Data Fields
uint16 | maxOffsetCorrection | maximum offset correction to be applied by the internal clock synchronization algorithm.
uint16 | maxRateCorrection | maximum rate correction to be applied by the internal clock synchronization algorithm.

◆ IfxEray_Eray_Gtu11Config

struct IfxEray_Eray_Gtu11Config

GTU11 configuration.

Definition at line 617 of file IfxEray_Eray.h.

Data Fields
IfxEray_ExternalOffset | externalOffset | External offset correction control.
IfxEray_ExternalOffsetCorrection | externalOffsetCorrection | External clock offset correction value.
IfxEray_ExternalRate | externalRate | External rate correction control.
IfxEray_ExternalRateCorrection | externalRateCorrection | External clock rate correction value.

◆ IfxEray_Eray_GTUConfig

struct IfxEray_Eray_GTUConfig

Gloabl Timing Unit configuration structure.

Definition at line 631 of file IfxEray_Eray.h.

Collaboration diagram for IfxEray_Eray_GTUConfig:
[legend]
Data Fields
IfxEray_Eray_Gtu01Config | gtu01Config | GTU01 configuration.
IfxEray_Eray_Gtu02Config | gtu02Config | GTU02 configuration.
IfxEray_Eray_Gtu03Config | gtu03Config | GTU03 configuration.
IfxEray_Eray_Gtu04Config | gtu04Config | GTU04 configuration.
IfxEray_Eray_Gtu05Config | gtu05Config | GTU05 configuration.
IfxEray_Eray_Gtu06Config | gtu06Config | GTU06 configuration.
IfxEray_Eray_Gtu07Config | gtu07Config | GTU07 configuration.
IfxEray_Eray_Gtu08Config | gtu08Config | GTU08 configuration.
IfxEray_Eray_Gtu09Config | gtu09Config | GTU09 configuration.
IfxEray_Eray_Gtu10Config | gtu10Config | GTU10 configuration.
IfxEray_Eray_Gtu11Config | gtu11Config | GTU11 configuration.

◆ IfxEray_Eray_NodeA

struct IfxEray_Eray_NodeA

Pins configuration structure for Node A.

Definition at line 648 of file IfxEray_Eray.h.

Collaboration diagram for IfxEray_Eray_NodeA:
[legend]
Data Fields
IfxPort_PadDriver | pinDriver | the pad driver mode which should be configured.
IFX_CONST IfxEray_Rxd_In * | rxIn | the RX Pin which should be configured.
IfxPort_InputMode | rxInMode | the RX pin input mode which should be configured
IFX_CONST IfxEray_Txen_Out * | txEnOut | the TXEN Pin which should be configured.
IfxPort_OutputMode | txEnOutMode | the TXEN pin output mode which should be configured.
IFX_CONST IfxEray_Txd_Out * | txOut | the TX Pin which should be configured.
IfxPort_OutputMode | txOutMode | the TX pin output mode which should be configured.

◆ IfxEray_Eray_NodeB

struct IfxEray_Eray_NodeB

Pins configuration structure for Node B.

Definition at line 661 of file IfxEray_Eray.h.

Collaboration diagram for IfxEray_Eray_NodeB:
[legend]
Data Fields
IfxPort_PadDriver | pinDriver | the pad driver mode which should be configured.
IFX_CONST IfxEray_Rxd_In * | rxIn | the RX Pin which should be configured.
IfxPort_InputMode | rxInMode | the RX pin input mode which should be configured
IFX_CONST IfxEray_Txen_Out * | txEnOut | the TXEN Pin which should be configured.
IfxPort_OutputMode | txEnOutMode | the TXEN pin output mode which should be configured.
IFX_CONST IfxEray_Txd_Out * | txOut | the TX Pin which should be configured.
IfxPort_OutputMode | txOutMode | the TX pin output mode which should be configured.

◆ IfxEray_Eray_Prtc1Control

struct IfxEray_Eray_Prtc1Control

Protocol operation control properties.

Definition at line 674 of file IfxEray_Eray.h.

Data Fields
IfxEray_Baudrate | baudrate | baud rate on the flexray bus.
uint8 | collisionAvoidanceDuration | accepted duration of collision avoidance symbol.
uint8 | receiveWakeupTestDuration | duration of received wakeup pattern in bit times.
IfxEray_StrobePosition | strobePosition | sample count value for strobing.
uint16 | transmissionStartTime | duration of transmission start time.
uint8 | transmitWakeupRepetitions | duration of transmitted wakeup pattern in bit times.

◆ IfxEray_Eray_Prtc2Control

struct IfxEray_Eray_Prtc2Control

Wakeup symbol control properties.

Definition at line 686 of file IfxEray_Eray.h.

Data Fields
uint8 | receiveWakeupIdleTime | duration of received wakeup symbol idle phase.
uint8 | receiveWakeupLowTime | duration of received wakeup symbol low phase.
uint8 | transmitWakeupIdleTime | duration of transmit wakeup symbol idle phase.
uint8 | transmitWakeupLowTime | duration of transmit wakeup symbol low phase.

◆ IfxEray_Eray_Succ1Config

struct IfxEray_Eray_Succ1Config

communication controller control properties.

Definition at line 696 of file IfxEray_Eray.h.

Data Fields
boolean | channelAConnectedNode | whether the node is connected to channel A.
boolean | channelASymbolTransmitted | selects channel A for MTS symbol transmission.
boolean | channelBConnectedNode | whether the node is connected to channel B.
boolean | channelBSymbolTransmitted | selects channel B for MTS symbol transmission
boolean | clockSyncErrorHalt | transition to HALT state due to a clock synchronization error.
uint8 | maxColdStartAttempts | maximum number of attempts that a cold starting node is permitted.
uint8 | numberOfCyclePairsForActive | number of even / odd cycle pairs that must have valid clock correction terms.
boolean | startupFrameTransmitted | whether the key slot is used to transmit startup Frames.
boolean | syncFrameTransmitted | whether the key slot is used to transmit SYNC Frames.
IfxEray_TransmissionSlotMode | transmissionSlotMode | Initial transmission mode.
IfxEray_WakeupChannel | wakeupPatternChannel | Wakeup pattern carry channel.

◆ IfxEray_Eray_Succ2Config

struct IfxEray_Eray_Succ2Config

Communication listen timeout properties.

Definition at line 713 of file IfxEray_Eray.h.

Data Fields
uint32 | listenTimeOut | wakeup or startup listen timeout in microticks.
IfxEray_ListenTimeOutNoise | listenTimeOutNoise | upper limit for startup and wakeup listen timeout in the presence of noise.

◆ IfxEray_Eray_Succ3Config

struct IfxEray_Eray_Succ3Config

Clock correction fail properties.

Definition at line 721 of file IfxEray_Eray.h.

Data Fields
uint8 | clockCorrectionCyclesHalt | maximum number of cycles missing clock correctionlead to active or passive to halt.
uint8 | clockCorrectionCyclesPassive | maximum number of cycles missing clock correction lead active to passive state.

◆ IfxEray_Eray_ControllerConfig

struct IfxEray_Eray_ControllerConfig

Communication Controller configuration structure.

Definition at line 733 of file IfxEray_Eray.h.

Collaboration diagram for IfxEray_Eray_ControllerConfig:
[legend]
Data Fields
IfxEray_Eray_GTUConfig | gtuConfig | gloabl timing unit configuration structure.
uint8 | latestTransmissionStart | number of dynamic slots before inhibit frame transmission in dynamic segment.
uint32 | networkVectorLength | length of network management vector.
IfxEray_Eray_Prtc1Control | prtc1Control | protocol operation control properties.
IfxEray_Eray_Prtc2Control | prtc2Control | wakeup symbol control properties.
uint8 | staticFramepayload | payload length of static frame in double bytes.
IfxEray_Eray_Succ1Config | succ1Config | communication controller control properties.
IfxEray_Eray_Succ2Config | succ2Config | communication listen timeout properties.
IfxEray_Eray_Succ3Config | succ3Config | clock correction fail properties.

◆ IfxEray_Eray_Interrupt

struct IfxEray_Eray_Interrupt

Interrupt control properties.

Definition at line 748 of file IfxEray_Eray.h.

Data Fields
IfxSrc_Tos | ibusyIsrProvider | the input buffer interrupt service provider. CPU or DMA.
uint16 | ibusyPriority | the inputput buffer interrupt priority. Always 1 since all interrupts are handled at a time.
IfxSrc_Tos | int0IsrProvider | the interrupt line 0 service provider. CPU or DMA.
uint16 | int0Priority | the interrupt line 0 priority. Always 1 since all interrupts are handled at a time.
IfxSrc_Tos | int1IsrProvider | the interrupt line 1 service provider. CPU or DMA.
uint16 | int1Priority | the interrupt line 1 priority. Always 1 since all interrupts are handled at a time.
IfxSrc_Tos | mbsc0IsrProvider | the message buffer status changed interrupt 0 service provider. CPU or DMA.
uint16 | mbsc0Priority | the message buffer status changed interrupt 0 priority. Always 1 since all interrupts are handled at a time.
IfxSrc_Tos | mbsc1IsrProvider | the message buffer status changed interrupt 1 service provider. CPU or DMA.
uint16 | mbsc1Priority | the message buffer status changed interrupt 1 priority. Always 1 since all interrupts are handled at a time.
IfxSrc_Tos | ndat0IsrProvider | the new data interrupt 0 service provider. CPU or DMA.
uint16 | ndat0Priority | the new data interrupt 0 priority. Always 1 since all interrupts are handled at a time.
IfxSrc_Tos | ndat1IsrProvider | the new data interrupt 1 service provider. CPU or DMA.
uint16 | ndat1Priority | the new data interrupt 1 priority. Always 1 since all interrupts are handled at a time.
IfxSrc_Tos | obusyIsrProvider | the output buffer interrupt service provider. CPU or DMA.
uint16 | obusyPriority | the output buffer interrupt priority. Always 1 since all interrupts are handled at a time.
IfxSrc_Tos | tint0IsrProvider | the timer interrupt line 0 service provider. CPU or DMA.
uint16 | tint0Priority | the timer interrupt 0 priority. Always 1 since all interrupts are handled at a time.
IfxSrc_Tos | tint1IsrProvider | the timer interrupt line 1 service provider. CPU or DMA.
uint16 | tint1Priority | the timer interrupt 1 priority. Always 1 since all interrupts are handled at a time.

◆ IfxEray_Eray_MessageRAMConfig

struct IfxEray_Eray_MessageRAMConfig

Message RAM configuration structure.

Definition at line 774 of file IfxEray_Eray.h.

Collaboration diagram for IfxEray_Eray_MessageRAMConfig:
[legend]
Data Fields
boolean | bufferReconfigEnabled | whether reconfiguration of message buffers is enabled or not.
uint32 * | data[128] | data section of message buffer.
uint32 | fifoBufferStartIndex | message buffers assigned FIFO.
boolean | fifoConfigured | Whether receive FIFO configured or not.
uint8 | fifoDepth | fifo critical level.
boolean | fifoNullFramesRejected | whether null frames stored in fifo or not.
uint8 | filteredCycleNumber | the cycle set to which Frame ID and channel rejection filter are applied.
uint8 | firstDynamicBuffer | first dynamic buffer index.
uint16 | frameIdFilter | Frame ID used for rejection filtering.
IfxEray_Header * | header[128] | Header section of message buffer.
uint8 | numberOfMessageBuffers | last configured buffer.
IfxEray_ReceiveChannel | receiveChannel | FIFO receive channel.
uint16 | rejectedFrameId | frame ID to be rejected by the FIFO.
IfxEray_SlotConfig * | slotControl[128] | Transmit control properties.
boolean | staticFifoDisabled | fifo is not used in static segment.

◆ IfxEray_Eray

struct IfxEray_Eray

ERAY Module handle.

Definition at line 811 of file IfxEray_Eray.h.

Data Fields
Ifx_ERAY * eray pointer to ERAY module registers.

◆ IfxEray_Eray_BufferReconfig

struct IfxEray_Eray_BufferReconfig

Reconfigurable buffer structure.

Definition at line 818 of file IfxEray_Eray.h.

Collaboration diagram for IfxEray_Eray_BufferReconfig:
[legend]
Data Fields
uint32 | data[64] | data section of a reconfigurable buffer.
IfxEray_Header * | header | header of a reconfigurable buffer.
IfxEray_SlotConfig * | slotControl | message buffer configuration in message RAM.

◆ IfxEray_Eray_Config

struct IfxEray_Eray_Config

Module configuration structure.

Definition at line 827 of file IfxEray_Eray.h.

Collaboration diagram for IfxEray_Eray_Config:
[legend]
Data Fields
IfxEray_Eray_Interrupt | interrupt | Interrupt control properties.
Ifx_ERAY * | module | pointer to ERAY module registers.

◆ IfxEray_Eray_NodeConfig

struct IfxEray_Eray_NodeConfig

Node configuration structure.

Definition at line 835 of file IfxEray_Eray.h.

Collaboration diagram for IfxEray_Eray_NodeConfig:
[legend]
Data Fields
IfxEray_Eray_ControllerConfig | controllerConfig | Communication Controller configuration structure.
IfxEray_Eray_MessageRAMConfig | messageRAMConfig | Message RAM configuration structure.
IFX_CONST IfxEray_Eray_Pins * | pins | Pins configuration structure.

◆ IfxEray_Eray_ReceiveControl

struct IfxEray_Eray_ReceiveControl

Receive control properties structure.

Definition at line 844 of file IfxEray_Eray.h.

Data Fields
uint8 | bufferIndex | buffer index in the Message RAM.
boolean | dataReceived | whether data selected for transfer from Message RAM to Output Buffer or not.
boolean | headerReceived | whether header selected for transfer from Message RAM to Output Buffer or not.
boolean | receiveRequested |
boolean | swapRequested | whether output buffer shadow and output buffer host are swapped or not.

◆ IfxEray_Eray_ReceivedFrame

struct IfxEray_Eray_ReceivedFrame

Received Frame.

Definition at line 855 of file IfxEray_Eray.h.

Collaboration diagram for IfxEray_Eray_ReceivedFrame:
[legend]
Data Fields
uint32 | data[64] | received data in a frame.
IfxEray_ReceivedHeader | header | received header in a frame.

◆ IfxEray_Eray_TransmitControl

struct IfxEray_Eray_TransmitControl

Transfer control in a slot.

Definition at line 863 of file IfxEray_Eray.h.

Data Fields
uint8 | bufferIndex | buffer index which gives slot for transfers.
boolean | dataTransfered | whether data section of message buffer is transfered or not.
boolean | headerTransfered | whether header section of frame is transfered or not.
boolean | transferRequested | whether frame in a slot is transfered or not.


iLLD_TC38A: Module Initialisation Functions

Functions
Module Initialisation Functions
iLLD » ERAY » ERAY
Collaboration diagram for Module Initialisation Functions:

Functions

IFX_INLINE void | IfxEray_Eray_deInitModule (IfxEray_Eray *eray)
De-initialises the ERAY module. More...
IFX_EXTERN void | IfxEray_Eray_initModule (IfxEray_Eray *eray, const IfxEray_Eray_Config *config)
Initialises the ERAY module with supplied configuration. More...
IFX_EXTERN void | IfxEray_Eray_initModuleConfig (IfxEray_Eray_Config *config, Ifx_ERAY *eray)
Inialises the default module configuration buffer. More...

Detailed Description

Function Documentation

◆ IfxEray_Eray_deInitModule()

IFX_INLINE void IfxEray_Eray_deInitModule ( IfxEray_Eray * eray )

De-initialises the ERAY module.

Parameters
eray pointer to module handle.
Returns
None

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 1209 of file IfxEray_Eray.h.

◆ IfxEray_Eray_initModule()

IFX_EXTERN void IfxEray_Eray_initModule | ( | IfxEray_Eray * | eray,
 |  | const IfxEray_Eray_Config * | config
 | ) |  |

Initialises the ERAY module with supplied configuration.

Parameters
eray | pointer to ERAY Module handle.
config | pointer to module configuration structure.
Returns
None

For usage exapmle see : How to use the ERAY Interface driver?

NOTE: If not DMA, the interrupt service provider is assigned to the CPU ID where this function is called from

Definition at line 402 of file IfxEray_Eray.c.

◆ IfxEray_Eray_initModuleConfig()

IFX_EXTERN void IfxEray_Eray_initModuleConfig | ( | IfxEray_Eray_Config * | config,
 |  | Ifx_ERAY * | eray
 | ) |  |

Inialises the default module configuration buffer.

Parameters
config | pointer to module configuration structure.
eray | pointer ERAY module registers.
Returns
None

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 515 of file IfxEray_Eray.c.


iLLD_TC38A: Node Initialisation Functions

Data Structures | Functions
Node Initialisation Functions
iLLD » ERAY » ERAY
Collaboration diagram for Node Initialisation Functions:

Data Structures

struct IfxEray_Eray_Pins
Pins configuration structure. More...

Functions

IFX_STATIC void | IfxEray_Eray_Node_initCommunicationController (IfxEray_Eray *eray, const IfxEray_Eray_ControllerConfig *config)
Inialises the communication controller. More...
IFX_STATIC void | IfxEray_Eray_Node_initGTU (IfxEray_Eray *eray, const IfxEray_Eray_GTUConfig *config)
Initialises the Global Timing Unit. More...
IFX_STATIC void | IfxEray_Eray_Node_initMessageRAM (IfxEray_Eray *eray, const IfxEray_Eray_MessageRAMConfig *config)
Inialises the message RAM. More...
IFX_EXTERN void | IfxEray_Eray_Node_init (IfxEray_Eray *eray, const IfxEray_Eray_NodeConfig *config)
Initialises the Node with supplied configuration. More...
IFX_EXTERN void | IfxEray_Eray_Node_initConfig (IfxEray_Eray_NodeConfig *config)
Initialises the default node configuration buffer. More...

Detailed Description

Data Structure Documentation

◆ IfxEray_Eray_Pins

struct IfxEray_Eray_Pins

Pins configuration structure.

Definition at line 799 of file IfxEray_Eray.h.

Collaboration diagram for IfxEray_Eray_Pins:
[legend]
Data Fields
IFX_CONST IfxEray_Eray_NodeA * | nodeAPins | Pins configuration structure for Node A.
IFX_CONST IfxEray_Eray_NodeB * | nodeBPins | Pins configuration structure for Node B.

Function Documentation

◆ IfxEray_Eray_Node_init()

IFX_EXTERN void IfxEray_Eray_Node_init | ( | IfxEray_Eray * | eray,
 |  | const IfxEray_Eray_NodeConfig * | config
 | ) |  |

Initialises the Node with supplied configuration.

Parameters
eray | pointer to ERAY Module handle.
config | pointer to node configuration structure.
Returns
None

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 83 of file IfxEray_Eray.c.

◆ IfxEray_Eray_Node_initCommunicationController()

IFX_STATIC void IfxEray_Eray_Node_initCommunicationController | ( | IfxEray_Eray * | eray,
 |  | const IfxEray_Eray_ControllerConfig * | config
 | ) |  |

Inialises the communication controller.

Parameters
eray | pointer to ERAY Module handle.
config | pointer to communication controller config structure.
Returns
None

Definition at line 170 of file IfxEray_Eray.c.

Referenced by IfxEray_Eray_Node_init().

◆ IfxEray_Eray_Node_initConfig()

IFX_EXTERN void IfxEray_Eray_Node_initConfig ( IfxEray_Eray_NodeConfig * config )

Initialises the default node configuration buffer.

Parameters
config pointer to node configuration structure.
Returns
None

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 203 of file IfxEray_Eray.c.

◆ IfxEray_Eray_Node_initGTU()

IFX_STATIC void IfxEray_Eray_Node_initGTU | ( | IfxEray_Eray * | eray,
 |  | const IfxEray_Eray_GTUConfig * | config
 | ) |  |

Initialises the Global Timing Unit.

Parameters
eray | pointer to ERAY Module handle.
config | global timing unit Configuration structure.
Returns
None

Definition at line 335 of file IfxEray_Eray.c.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_Eray_Node_initMessageRAM()

IFX_STATIC void IfxEray_Eray_Node_initMessageRAM | ( | IfxEray_Eray * | eray,
 |  | const IfxEray_Eray_MessageRAMConfig * | config
 | ) |  |

Inialises the message RAM.

Parameters
eray | pointer to ERAY Module handle.
config | pointer to message RAM config structure.
Returns
None

Definition at line 359 of file IfxEray_Eray.c.

Referenced by IfxEray_Eray_Node_init().


iLLD_TC38A: Operative Functions

Functions
Operative Functions
iLLD » ERAY » ERAY
Collaboration diagram for Operative Functions:

Functions

IFX_INLINE boolean | IfxEray_Eray_allowColdStart (IfxEray_Eray *eray)
Allows node to enter the cold startup state. More...
IFX_INLINE void | IfxEray_Eray_bufferReconfig (IfxEray_Eray *eray, IfxEray_Eray_BufferReconfig *reconfigBuffer)
Reconfiguring the buffer or changing the slot. More...
IFX_INLINE boolean | IfxEray_Eray_changePocState (IfxEray_Eray *eray, IfxEray_PocCommand PocCommand)
Changes the POC state and return status. More...
IFX_INLINE void | IfxEray_Eray_readData (IfxEray_Eray *eray, uint32 *data, uint8 payloadLength)
Reads the received data from output registers. More...
IFX_INLINE void | IfxEray_Eray_readFrame (IfxEray_Eray *eray, IfxEray_Eray_ReceivedFrame *frame, Ifx_SizeT maxPayloadLength)
reads the frame received in a buffer. More...
IFX_INLINE boolean | IfxEray_Eray_setPocAllSlots (IfxEray_Eray *eray)
Sets the Controller state to ALL Slots mode. More...
IFX_INLINE boolean | IfxEray_Eray_startCommunication (IfxEray_Eray *eray)
Runs the communication controller. More...
IFX_INLINE void | IfxEray_Eray_wakeUpChannel (IfxEray_Eray *eray, IfxEray_Channel channel)
Wakeups the channel in a cluster. More...
IFX_INLINE boolean | IfxEray_Eray_wakeUpCluster (IfxEray_Eray *eray)
Wakeups the node in a cluster. More...
IFX_INLINE void | IfxEray_Eray_writeData (IfxEray_Eray *eray, uint32 *data, uint8 payloadLength)
Writes data section of a frame to input data registers. More...
IFX_EXTERN void | IfxEray_Eray_receiveFifoFrame (IfxEray_Eray *eray, IfxEray_Eray_ReceiveControl *config)
Transfers frame from fifo in message RAM to Output buffer. More...
IFX_EXTERN void | IfxEray_Eray_receiveFrame (IfxEray_Eray *eray, IfxEray_Eray_ReceiveControl *config)
Transfers header and data from message buffer to output buffer. More...
IFX_EXTERN void | IfxEray_Eray_transmitFrame (IfxEray_Eray *eray, IfxEray_Eray_TransmitControl *transmitControl)
Transfers the frame in given slot. More...

Detailed Description

Function Documentation

◆ IfxEray_Eray_allowColdStart()

IFX_INLINE boolean IfxEray_Eray_allowColdStart ( IfxEray_Eray * eray )

Allows node to enter the cold startup state.

Parameters
eray pointer to ERAY Module handle.
Returns
TRUE if cold start successful otherwise FALSE.

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 1178 of file IfxEray_Eray.h.

◆ IfxEray_Eray_bufferReconfig()

IFX_INLINE void IfxEray_Eray_bufferReconfig | ( | IfxEray_Eray * | eray,
 |  | IfxEray_Eray_BufferReconfig * | reconfigBuffer
 | ) |  |

Reconfiguring the buffer or changing the slot.

Parameters
eray | pointer to module handle.
reconfigBuffer | pointer reconfigurable buffer structure.
Returns
None

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 1184 of file IfxEray_Eray.h.

◆ IfxEray_Eray_changePocState()

IFX_INLINE boolean IfxEray_Eray_changePocState | ( | IfxEray_Eray * | eray,
 |  | IfxEray_PocCommand | PocCommand
 | ) |  |

Changes the POC state and return status.

Parameters
eray | pointer to module handle.
PocCommand | POC command to change state.
Returns
TRUE if command accepted.

Definition at line 1190 of file IfxEray_Eray.h.

◆ IfxEray_Eray_readData()

IFX_INLINE void IfxEray_Eray_readData | ( | IfxEray_Eray * | eray,
 |  | uint32 * | data,
 |  | uint8 | payloadLength
 | ) |  |

Reads the received data from output registers.

Parameters
eray | pointer to module handle.
data | pointer to received data buffer.
payloadLength | payload length received in a frame.
Returns
None

Definition at line 1260 of file IfxEray_Eray.h.

◆ IfxEray_Eray_readFrame()

IFX_INLINE void IfxEray_Eray_readFrame | ( | IfxEray_Eray * | eray,
 |  | IfxEray_Eray_ReceivedFrame * | frame,
 |  | Ifx_SizeT | maxPayloadLength
 | ) |  |

reads the frame received in a buffer.

Parameters
eray | pointer to module handle.
frame | received frame in a buffer.
maxPayloadLength | maximum payload length received in a frame.
Returns
None

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 1266 of file IfxEray_Eray.h.

◆ IfxEray_Eray_receiveFifoFrame()

IFX_EXTERN void IfxEray_Eray_receiveFifoFrame | ( | IfxEray_Eray * | eray,
 |  | IfxEray_Eray_ReceiveControl * | config
 | ) |  |

Transfers frame from fifo in message RAM to Output buffer.

Parameters
eray | pointer to ERAY Module handle.
config | pointer to receive control structure.
Returns
None

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 542 of file IfxEray_Eray.c.

◆ IfxEray_Eray_receiveFrame()

IFX_EXTERN void IfxEray_Eray_receiveFrame | ( | IfxEray_Eray * | eray,
 |  | IfxEray_Eray_ReceiveControl * | config
 | ) |  |

Transfers header and data from message buffer to output buffer.

Parameters
eray | pointer to ERAY Module handle.
config | pointer to receive control structure.
Returns
None

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 578 of file IfxEray_Eray.c.

◆ IfxEray_Eray_setPocAllSlots()

IFX_INLINE boolean IfxEray_Eray_setPocAllSlots ( IfxEray_Eray * eray )

Sets the Controller state to ALL Slots mode.

Parameters
eray pointer to module handle.
Returns
TRUE if All slots mode is successful otherwise FALSE.

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 1284 of file IfxEray_Eray.h.

◆ IfxEray_Eray_startCommunication()

IFX_INLINE boolean IfxEray_Eray_startCommunication ( IfxEray_Eray * eray )

Runs the communication controller.

Parameters
eray pointer to ERAY Module handle.
Returns
TRUE if communication started otherwise FALSE.

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 1290 of file IfxEray_Eray.h.

◆ IfxEray_Eray_transmitFrame()

IFX_EXTERN void IfxEray_Eray_transmitFrame | ( | IfxEray_Eray * | eray,
 |  | IfxEray_Eray_TransmitControl * | transmitControl
 | ) |  |

Transfers the frame in given slot.

Parameters
eray | pointer to module handle.
transmitControl | transmits frame in a given slot.
Returns
None

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 600 of file IfxEray_Eray.c.

◆ IfxEray_Eray_wakeUpChannel()

IFX_INLINE void IfxEray_Eray_wakeUpChannel | ( | IfxEray_Eray * | eray,
 |  | IfxEray_Channel | channel
 | ) |  |

Wakeups the channel in a cluster.

Parameters
eray | pointer to ERAY Module handle.
channel | wakeup channel Id.
Returns
None

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 1296 of file IfxEray_Eray.h.

◆ IfxEray_Eray_wakeUpCluster()

IFX_INLINE boolean IfxEray_Eray_wakeUpCluster ( IfxEray_Eray * eray )

Wakeups the node in a cluster.

Parameters
eray pointer to ERAY Module handle.
Returns
TRUE if cluster is wakeup otherwise FALSE.

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 1309 of file IfxEray_Eray.h.

◆ IfxEray_Eray_writeData()

IFX_INLINE void IfxEray_Eray_writeData | ( | IfxEray_Eray * | eray,
 |  | uint32 * | data,
 |  | uint8 | payloadLength
 | ) |  |

Writes data section of a frame to input data registers.

Parameters
eray | pointer to module handle.
data | data section in frame.
payloadLength | payload length configured for slot buffer.
Returns
None

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 1315 of file IfxEray_Eray.h.


iLLD_TC38A: Status Functions

Functions
Status Functions
iLLD » ERAY » ERAY
Collaboration diagram for Status Functions:

Functions

IFX_INLINE IfxEray_PocState | IfxEray_Eray_getPocState (IfxEray_Eray *eray)
Gets the current node controller POC state. More...
IFX_INLINE IfxEray_WakeupChannel | IfxEray_Eray_getWakeupPatternReceivedChannel (IfxEray_Eray *eray)
Gets the received wakeup pattern channel. More...

Detailed Description

Function Documentation

◆ IfxEray_Eray_getPocState()

IFX_INLINE IfxEray_PocState IfxEray_Eray_getPocState ( IfxEray_Eray * eray )

Gets the current node controller POC state.

Parameters
eray pointer to module handle.
Returns
current POC state.

Definition at line 1238 of file IfxEray_Eray.h.

◆ IfxEray_Eray_getWakeupPatternReceivedChannel()

IFX_INLINE IfxEray_WakeupChannel IfxEray_Eray_getWakeupPatternReceivedChannel ( IfxEray_Eray * eray )

Gets the received wakeup pattern channel.

Parameters
eray pointer to module handle.
Returns
received wakeup pattern channel.

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 1251 of file IfxEray_Eray.h.


iLLD_TC38A: Interrupt Functions

Functions
Interrupt Functions
iLLD » ERAY » ERAY
Collaboration diagram for Interrupt Functions:

Functions

IFX_INLINE void | IfxEray_Eray_clearErrorFlag (IfxEray_Eray *eray, IfxEray_ClearErrorFlag errorFlag)
clears the error interrupt flag requested. More...
IFX_INLINE void | IfxEray_Eray_clearStatusFlag (IfxEray_Eray *eray, IfxEray_ClearStatusFlag statusFlag)
Clears the status interrupt flag requested. More...
IFX_INLINE Ifx_ERAY_EIR | IfxEray_Eray_getErrorInterrupts (IfxEray_Eray *eray)
Gets the error interrupt status. More...
IFX_INLINE uint8 | IfxEray_Eray_getMessageBufferInterruptStatus (IfxEray_Eray *eray, uint8 messageBuffer)
Gets the message buffer interrupt status. More...
IFX_INLINE uint8 | IfxEray_Eray_getNewDataInterruptStatus (IfxEray_Eray *eray, uint8 ndat)
Gets the new data interrupt buffers status. More...
IFX_INLINE Ifx_ERAY_SIR | IfxEray_Eray_getStatusInterrupts (IfxEray_Eray *eray)
Gets the node status interrupts. More...
IFX_INLINE void | IfxEray_Eray_setMessageBufferInterruptDestination (IfxEray_Eray *eray, uint8 messageBuffer, uint8 messageBufferDestination)
Enables the message buffer interrupt line. More...
IFX_INLINE void | IfxEray_Eray_setNewDataInterruptDestination (IfxEray_Eray *eray, uint8 ndat, uint8 ndatDestination)
Enables the NDAT buffer interrupt line. More...

Detailed Description

Function Documentation

◆ IfxEray_Eray_clearErrorFlag()

IFX_INLINE void IfxEray_Eray_clearErrorFlag | ( | IfxEray_Eray * | eray,
 |  | IfxEray_ClearErrorFlag | errorFlag
 | ) |  |

clears the error interrupt flag requested.

Parameters
eray | pointer to module handle.
errorFlag | error flag to be cleared.
Returns
None

Definition at line 1197 of file IfxEray_Eray.h.

◆ IfxEray_Eray_clearStatusFlag()

IFX_INLINE void IfxEray_Eray_clearStatusFlag | ( | IfxEray_Eray * | eray,
 |  | IfxEray_ClearStatusFlag | statusFlag
 | ) |  |

Clears the status interrupt flag requested.

Parameters
eray | pointer to module handle.
statusFlag | status flag to be cleared.
Returns
None

Definition at line 1203 of file IfxEray_Eray.h.

◆ IfxEray_Eray_getErrorInterrupts()

IFX_INLINE Ifx_ERAY_EIR IfxEray_Eray_getErrorInterrupts ( IfxEray_Eray * eray )

Gets the error interrupt status.

Parameters
eray pointer to module handle.
Returns
error interrupt status.

Definition at line 1216 of file IfxEray_Eray.h.

◆ IfxEray_Eray_getMessageBufferInterruptStatus()

IFX_INLINE uint8 IfxEray_Eray_getMessageBufferInterruptStatus | ( | IfxEray_Eray * | eray,
 |  | uint8 | messageBuffer
 | ) |  |

Gets the message buffer interrupt status.

Parameters
eray | pointer to module handle.
messageBuffer | message buffer to which interrupt status be checked.
Returns
message buffer interrupt status.

Definition at line 1224 of file IfxEray_Eray.h.

◆ IfxEray_Eray_getNewDataInterruptStatus()

IFX_INLINE uint8 IfxEray_Eray_getNewDataInterruptStatus | ( | IfxEray_Eray * | eray,
 |  | uint8 | ndat
 | ) |  |

Gets the new data interrupt buffers status.

Parameters
eray | pointer to module handle.
ndat | ndat buffer to which interrupt status be checked.
Returns
ndat buffer interrupt status.

Definition at line 1231 of file IfxEray_Eray.h.

◆ IfxEray_Eray_getStatusInterrupts()

IFX_INLINE Ifx_ERAY_SIR IfxEray_Eray_getStatusInterrupts ( IfxEray_Eray * eray )

Gets the node status interrupts.

Parameters
eray pointer to module handle.
Returns
node status interrupts.

Definition at line 1244 of file IfxEray_Eray.h.

◆ IfxEray_Eray_setMessageBufferInterruptDestination()

IFX_INLINE void IfxEray_Eray_setMessageBufferInterruptDestination | ( | IfxEray_Eray * | eray,
 |  | uint8 | messageBuffer,
 |  | uint8 | messageBufferDestination
 | ) |  |

Enables the message buffer interrupt line.

Parameters
eray | pointer to module handle.
messageBuffer | message buffer interrupt which should be configured
messageBufferDestination | selects MBSC0 or MBSC1 interrupt output
Returns
None

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 1272 of file IfxEray_Eray.h.

◆ IfxEray_Eray_setNewDataInterruptDestination()

IFX_INLINE void IfxEray_Eray_setNewDataInterruptDestination | ( | IfxEray_Eray * | eray,
 |  | uint8 | ndat,
 |  | uint8 | ndatDestination
 | ) |  |

Enables the NDAT buffer interrupt line.

Parameters
eray | pointer to module handle.
ndat | message buffer number configured to which ndat interrupt line to be set.
ndatDestination | selects NDAT0 or NDAT1 interrupt output
Returns
None

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 1278 of file IfxEray_Eray.h.


iLLD_TC38A: IfxEray_cfg.h File Reference

  • _Impl
Macros | Enumerations | Variables
IfxEray_cfg.h File Reference
iLLD » ERAY

ERAY on-chip implementation data. More...

#include "Cpu/Std/Ifx_Types.h"
#include "IfxEray_reg.h"
Include dependency graph for IfxEray_cfg.h:

Go to the source code of this file.

Macros

#define | IFXERAY_NUM_MODULES (2)
#define | IFXERAY_NUM_SLOTS (128)
#define | IFXERAY_NUM_CHANNELS (4)

Enumerations

enum IfxEray_Index {
IfxEray_Index_none = -1,
IfxEray_Index_0 = 0,
IfxEray_Index_1
}
List of the available Eray resources. More...
enum IfxEray_NodeId {
IfxEray_NodeId_a = 0,
IfxEray_NodeId_b = 1,
IfxEray_NodeId_none = -1
}
Node Id in communication cycle. More...

Variables

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxEray_cfg_indexMap [IFXERAY_NUM_MODULES]

Detailed Description

ERAY on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxEray_cfg.h.

Macro Definition Documentation

◆ IFXERAY_NUM_CHANNELS

#define IFXERAY_NUM_CHANNELS (4)

Definition at line 69 of file IfxEray_cfg.h.

◆ IFXERAY_NUM_MODULES

#define IFXERAY_NUM_MODULES (2)

Definition at line 65 of file IfxEray_cfg.h.

Referenced by IfxEray_getAddress(), and IfxEray_getIndex().

◆ IFXERAY_NUM_SLOTS

#define IFXERAY_NUM_SLOTS (128)

Definition at line 67 of file IfxEray_cfg.h.


iLLD_TC38A: IfxEray_PinMap.c File Reference

  • _PinMap
Variables
IfxEray_PinMap.c File Reference
iLLD » ERAY

ERAY I/O map. More...

#include "IfxEray_PinMap.h"
Include dependency graph for IfxEray_PinMap.c:

Go to the source code of this file.

Variables

IfxEray_Rxd_In | IfxEray0_RXDA0_P14_8_IN = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P14, 8}, Ifx_RxSel_a}
IfxEray_Rxd_In | IfxEray0_RXDA1_P11_9_IN = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P11, 9}, Ifx_RxSel_b}
IfxEray_Rxd_In | IfxEray0_RXDA2_P02_1_IN = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P02, 1}, Ifx_RxSel_c}
IfxEray_Rxd_In | IfxEray0_RXDA3_P14_1_IN = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P14, 1}, Ifx_RxSel_d}
IfxEray_Rxd_In | IfxEray0_RXDB0_P14_7_IN = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 7}, Ifx_RxSel_a}
IfxEray_Rxd_In | IfxEray0_RXDB1_P11_10_IN = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P11,10}, Ifx_RxSel_b}
IfxEray_Rxd_In | IfxEray0_RXDB2_P02_3_IN = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P02, 3}, Ifx_RxSel_c}
IfxEray_Rxd_In | IfxEray0_RXDB3_P14_1_IN = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 1}, Ifx_RxSel_d}
IfxEray_Rxd_In | IfxEray1_RXDA0_P14_8_IN = {&MODULE_ERAY1, IfxEray_NodeId_a, {&MODULE_P14, 8}, Ifx_RxSel_a}
IfxEray_Rxd_In | IfxEray1_RXDA1_P01_1_IN = {&MODULE_ERAY1, IfxEray_NodeId_a, {&MODULE_P01, 1}, Ifx_RxSel_b}
IfxEray_Rxd_In | IfxEray1_RXDB0_P14_7_IN = {&MODULE_ERAY1, IfxEray_NodeId_b, {&MODULE_P14, 7}, Ifx_RxSel_a}
IfxEray_Rxd_In | IfxEray1_RXDB1_P01_8_IN = {&MODULE_ERAY1, IfxEray_NodeId_b, {&MODULE_P01, 8}, Ifx_RxSel_b}
IfxEray_Txd_Out | IfxEray0_TXDA_P02_0_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt6}
IfxEray_Txd_Out | IfxEray0_TXDA_P11_3_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt4}
IfxEray_Txd_Out | IfxEray0_TXDA_P14_0_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt3}
IfxEray_Txd_Out | IfxEray0_TXDA_P14_10_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P14,10}, IfxPort_OutputIdx_alt6}
IfxEray_Txd_Out | IfxEray0_TXDB_P02_2_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt6}
IfxEray_Txd_Out | IfxEray0_TXDB_P11_12_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P11,12}, IfxPort_OutputIdx_alt4}
IfxEray_Txd_Out | IfxEray0_TXDB_P14_0_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt4}
IfxEray_Txd_Out | IfxEray0_TXDB_P14_5_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt6}
IfxEray_Txd_Out | IfxEray1_TXDA_P01_12_OUT = {&MODULE_ERAY1, IfxEray_NodeId_a, {&MODULE_P01,12}, IfxPort_OutputIdx_alt6}
IfxEray_Txd_Out | IfxEray1_TXDA_P14_10_OUT = {&MODULE_ERAY1, IfxEray_NodeId_a, {&MODULE_P14,10}, IfxPort_OutputIdx_alt7}
IfxEray_Txd_Out | IfxEray1_TXDB_P01_13_OUT = {&MODULE_ERAY1, IfxEray_NodeId_b, {&MODULE_P01,13}, IfxPort_OutputIdx_alt6}
IfxEray_Txd_Out | IfxEray1_TXDB_P14_5_OUT = {&MODULE_ERAY1, IfxEray_NodeId_b, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt7}
IfxEray_Txen_Out | IfxEray0_TXENA_P02_4_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt6}
IfxEray_Txen_Out | IfxEray0_TXENA_P11_6_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt4}
IfxEray_Txen_Out | IfxEray0_TXENA_P14_9_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt6}
IfxEray_Txen_Out | IfxEray0_TXENB_P02_5_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt6}
IfxEray_Txen_Out | IfxEray0_TXENB_P11_11_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P11,11}, IfxPort_OutputIdx_alt6}
IfxEray_Txen_Out | IfxEray0_TXENB_P11_6_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt2}
IfxEray_Txen_Out | IfxEray0_TXENB_P14_6_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt6}
IfxEray_Txen_Out | IfxEray0_TXENB_P14_9_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt5}
IfxEray_Txen_Out | IfxEray1_TXENA_P01_14_OUT = {&MODULE_ERAY1, IfxEray_NodeId_a, {&MODULE_P01,14}, IfxPort_OutputIdx_alt6}
IfxEray_Txen_Out | IfxEray1_TXENA_P14_9_OUT = {&MODULE_ERAY1, IfxEray_NodeId_a, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt7}
IfxEray_Txen_Out | IfxEray1_TXENB_P02_15_OUT = {&MODULE_ERAY1, IfxEray_NodeId_b, {&MODULE_P02,15}, IfxPort_OutputIdx_alt6}
IfxEray_Txen_Out | IfxEray1_TXENB_P14_6_OUT = {&MODULE_ERAY1, IfxEray_NodeId_b, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt7}
const IfxEray_Rxd_In * | IfxEray_Rxd_In_pinTable [IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_RXD_IN_NUM_ITEMS]
const IfxEray_Txd_Out * | IfxEray_Txd_Out_pinTable [IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS]
const IfxEray_Txen_Out * | IfxEray_Txen_Out_pinTable [IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS]

Detailed Description

ERAY I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxEray_PinMap.c.

Variable Documentation

◆ IfxEray0_RXDA0_P14_8_IN

IfxEray_Rxd_In IfxEray0_RXDA0_P14_8_IN = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P14, 8}, Ifx_RxSel_a}

Definition at line 45 of file IfxEray_PinMap.c.

◆ IfxEray0_RXDA1_P11_9_IN

IfxEray_Rxd_In IfxEray0_RXDA1_P11_9_IN = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P11, 9}, Ifx_RxSel_b}

Definition at line 46 of file IfxEray_PinMap.c.

◆ IfxEray0_RXDA2_P02_1_IN

IfxEray_Rxd_In IfxEray0_RXDA2_P02_1_IN = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P02, 1}, Ifx_RxSel_c}

Definition at line 47 of file IfxEray_PinMap.c.

◆ IfxEray0_RXDA3_P14_1_IN

IfxEray_Rxd_In IfxEray0_RXDA3_P14_1_IN = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P14, 1}, Ifx_RxSel_d}

Definition at line 48 of file IfxEray_PinMap.c.

◆ IfxEray0_RXDB0_P14_7_IN

IfxEray_Rxd_In IfxEray0_RXDB0_P14_7_IN = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 7}, Ifx_RxSel_a}

Definition at line 49 of file IfxEray_PinMap.c.

◆ IfxEray0_RXDB1_P11_10_IN

IfxEray_Rxd_In IfxEray0_RXDB1_P11_10_IN = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P11,10}, Ifx_RxSel_b}

Definition at line 50 of file IfxEray_PinMap.c.

◆ IfxEray0_RXDB2_P02_3_IN

IfxEray_Rxd_In IfxEray0_RXDB2_P02_3_IN = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P02, 3}, Ifx_RxSel_c}

Definition at line 51 of file IfxEray_PinMap.c.

◆ IfxEray0_RXDB3_P14_1_IN

IfxEray_Rxd_In IfxEray0_RXDB3_P14_1_IN = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 1}, Ifx_RxSel_d}

Definition at line 52 of file IfxEray_PinMap.c.

◆ IfxEray0_TXDA_P02_0_OUT

IfxEray_Txd_Out IfxEray0_TXDA_P02_0_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt6}

Definition at line 57 of file IfxEray_PinMap.c.

◆ IfxEray0_TXDA_P11_3_OUT

IfxEray_Txd_Out IfxEray0_TXDA_P11_3_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt4}

Definition at line 58 of file IfxEray_PinMap.c.

◆ IfxEray0_TXDA_P14_0_OUT

IfxEray_Txd_Out IfxEray0_TXDA_P14_0_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt3}

Definition at line 59 of file IfxEray_PinMap.c.

◆ IfxEray0_TXDA_P14_10_OUT

IfxEray_Txd_Out IfxEray0_TXDA_P14_10_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P14,10}, IfxPort_OutputIdx_alt6}

Definition at line 60 of file IfxEray_PinMap.c.

◆ IfxEray0_TXDB_P02_2_OUT

IfxEray_Txd_Out IfxEray0_TXDB_P02_2_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt6}

Definition at line 61 of file IfxEray_PinMap.c.

◆ IfxEray0_TXDB_P11_12_OUT

IfxEray_Txd_Out IfxEray0_TXDB_P11_12_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P11,12}, IfxPort_OutputIdx_alt4}

Definition at line 62 of file IfxEray_PinMap.c.

◆ IfxEray0_TXDB_P14_0_OUT

IfxEray_Txd_Out IfxEray0_TXDB_P14_0_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt4}

Definition at line 63 of file IfxEray_PinMap.c.

◆ IfxEray0_TXDB_P14_5_OUT

IfxEray_Txd_Out IfxEray0_TXDB_P14_5_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt6}

Definition at line 64 of file IfxEray_PinMap.c.

◆ IfxEray0_TXENA_P02_4_OUT

IfxEray_Txen_Out IfxEray0_TXENA_P02_4_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt6}

Definition at line 69 of file IfxEray_PinMap.c.

◆ IfxEray0_TXENA_P11_6_OUT

IfxEray_Txen_Out IfxEray0_TXENA_P11_6_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt4}

Definition at line 70 of file IfxEray_PinMap.c.

◆ IfxEray0_TXENA_P14_9_OUT

IfxEray_Txen_Out IfxEray0_TXENA_P14_9_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt6}

Definition at line 71 of file IfxEray_PinMap.c.

◆ IfxEray0_TXENB_P02_5_OUT

IfxEray_Txen_Out IfxEray0_TXENB_P02_5_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt6}

Definition at line 72 of file IfxEray_PinMap.c.

◆ IfxEray0_TXENB_P11_11_OUT

IfxEray_Txen_Out IfxEray0_TXENB_P11_11_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P11,11}, IfxPort_OutputIdx_alt6}

Definition at line 73 of file IfxEray_PinMap.c.

◆ IfxEray0_TXENB_P11_6_OUT

IfxEray_Txen_Out IfxEray0_TXENB_P11_6_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt2}

Definition at line 74 of file IfxEray_PinMap.c.

◆ IfxEray0_TXENB_P14_6_OUT

IfxEray_Txen_Out IfxEray0_TXENB_P14_6_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt6}

Definition at line 75 of file IfxEray_PinMap.c.

◆ IfxEray0_TXENB_P14_9_OUT

IfxEray_Txen_Out IfxEray0_TXENB_P14_9_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt5}

Definition at line 76 of file IfxEray_PinMap.c.

◆ IfxEray1_RXDA0_P14_8_IN

IfxEray_Rxd_In IfxEray1_RXDA0_P14_8_IN = {&MODULE_ERAY1, IfxEray_NodeId_a, {&MODULE_P14, 8}, Ifx_RxSel_a}

Definition at line 53 of file IfxEray_PinMap.c.

◆ IfxEray1_RXDA1_P01_1_IN

IfxEray_Rxd_In IfxEray1_RXDA1_P01_1_IN = {&MODULE_ERAY1, IfxEray_NodeId_a, {&MODULE_P01, 1}, Ifx_RxSel_b}

Definition at line 54 of file IfxEray_PinMap.c.

◆ IfxEray1_RXDB0_P14_7_IN

IfxEray_Rxd_In IfxEray1_RXDB0_P14_7_IN = {&MODULE_ERAY1, IfxEray_NodeId_b, {&MODULE_P14, 7}, Ifx_RxSel_a}

Definition at line 55 of file IfxEray_PinMap.c.

◆ IfxEray1_RXDB1_P01_8_IN

IfxEray_Rxd_In IfxEray1_RXDB1_P01_8_IN = {&MODULE_ERAY1, IfxEray_NodeId_b, {&MODULE_P01, 8}, Ifx_RxSel_b}

Definition at line 56 of file IfxEray_PinMap.c.

◆ IfxEray1_TXDA_P01_12_OUT

IfxEray_Txd_Out IfxEray1_TXDA_P01_12_OUT = {&MODULE_ERAY1, IfxEray_NodeId_a, {&MODULE_P01,12}, IfxPort_OutputIdx_alt6}

Definition at line 65 of file IfxEray_PinMap.c.

◆ IfxEray1_TXDA_P14_10_OUT

IfxEray_Txd_Out IfxEray1_TXDA_P14_10_OUT = {&MODULE_ERAY1, IfxEray_NodeId_a, {&MODULE_P14,10}, IfxPort_OutputIdx_alt7}

Definition at line 66 of file IfxEray_PinMap.c.

◆ IfxEray1_TXDB_P01_13_OUT

IfxEray_Txd_Out IfxEray1_TXDB_P01_13_OUT = {&MODULE_ERAY1, IfxEray_NodeId_b, {&MODULE_P01,13}, IfxPort_OutputIdx_alt6}

Definition at line 67 of file IfxEray_PinMap.c.

◆ IfxEray1_TXDB_P14_5_OUT

IfxEray_Txd_Out IfxEray1_TXDB_P14_5_OUT = {&MODULE_ERAY1, IfxEray_NodeId_b, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt7}

Definition at line 68 of file IfxEray_PinMap.c.

◆ IfxEray1_TXENA_P01_14_OUT

IfxEray_Txen_Out IfxEray1_TXENA_P01_14_OUT = {&MODULE_ERAY1, IfxEray_NodeId_a, {&MODULE_P01,14}, IfxPort_OutputIdx_alt6}

Definition at line 77 of file IfxEray_PinMap.c.

◆ IfxEray1_TXENA_P14_9_OUT

IfxEray_Txen_Out IfxEray1_TXENA_P14_9_OUT = {&MODULE_ERAY1, IfxEray_NodeId_a, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt7}

Definition at line 78 of file IfxEray_PinMap.c.

◆ IfxEray1_TXENB_P02_15_OUT

IfxEray_Txen_Out IfxEray1_TXENB_P02_15_OUT = {&MODULE_ERAY1, IfxEray_NodeId_b, {&MODULE_P02,15}, IfxPort_OutputIdx_alt6}

Definition at line 79 of file IfxEray_PinMap.c.

◆ IfxEray1_TXENB_P14_6_OUT

IfxEray_Txen_Out IfxEray1_TXENB_P14_6_OUT = {&MODULE_ERAY1, IfxEray_NodeId_b, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt7}

Definition at line 80 of file IfxEray_PinMap.c.

◆ IfxEray_Rxd_In_pinTable

const IfxEray_Rxd_In* IfxEray_Rxd_In_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_RXD_IN_NUM_ITEMS]
Initial value:
= {
{
{
&IfxEray0_RXDA0_P14_8_IN,
&IfxEray0_RXDA1_P11_9_IN,
&IfxEray0_RXDA2_P02_1_IN,
&IfxEray0_RXDA3_P14_1_IN
},
{
&IfxEray0_RXDB0_P14_7_IN,
&IfxEray0_RXDB1_P11_10_IN,
&IfxEray0_RXDB2_P02_3_IN,
&IfxEray0_RXDB3_P14_1_IN
}
},
{
{
&IfxEray1_RXDA0_P14_8_IN,
&IfxEray1_RXDA1_P01_1_IN,
NULL_PTR,
NULL_PTR
},
{
&IfxEray1_RXDB0_P14_7_IN,
&IfxEray1_RXDB1_P01_8_IN,
NULL_PTR,
NULL_PTR
}
}
}
IfxEray0_RXDB2_P02_3_IN
IfxEray_Rxd_In IfxEray0_RXDB2_P02_3_IN
Definition: IfxEray_PinMap.c:51
IfxEray1_RXDB1_P01_8_IN
IfxEray_Rxd_In IfxEray1_RXDB1_P01_8_IN
Definition: IfxEray_PinMap.c:56
IfxEray0_RXDB3_P14_1_IN
IfxEray_Rxd_In IfxEray0_RXDB3_P14_1_IN
Definition: IfxEray_PinMap.c:52
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxEray1_RXDA1_P01_1_IN
IfxEray_Rxd_In IfxEray1_RXDA1_P01_1_IN
Definition: IfxEray_PinMap.c:54
IfxEray0_RXDB1_P11_10_IN
IfxEray_Rxd_In IfxEray0_RXDB1_P11_10_IN
Definition: IfxEray_PinMap.c:50
IfxEray0_RXDA0_P14_8_IN
IfxEray_Rxd_In IfxEray0_RXDA0_P14_8_IN
Definition: IfxEray_PinMap.c:45
IfxEray1_RXDB0_P14_7_IN
IfxEray_Rxd_In IfxEray1_RXDB0_P14_7_IN
Definition: IfxEray_PinMap.c:55
IfxEray0_RXDA1_P11_9_IN
IfxEray_Rxd_In IfxEray0_RXDA1_P11_9_IN
Definition: IfxEray_PinMap.c:46
IfxEray1_RXDA0_P14_8_IN
IfxEray_Rxd_In IfxEray1_RXDA0_P14_8_IN
Definition: IfxEray_PinMap.c:53
IfxEray0_RXDA2_P02_1_IN
IfxEray_Rxd_In IfxEray0_RXDA2_P02_1_IN
Definition: IfxEray_PinMap.c:47
IfxEray0_RXDA3_P14_1_IN
IfxEray_Rxd_In IfxEray0_RXDA3_P14_1_IN
Definition: IfxEray_PinMap.c:48
IfxEray0_RXDB0_P14_7_IN
IfxEray_Rxd_In IfxEray0_RXDB0_P14_7_IN
Definition: IfxEray_PinMap.c:49

Definition at line 83 of file IfxEray_PinMap.c.

◆ IfxEray_Txd_Out_pinTable

const IfxEray_Txd_Out* IfxEray_Txd_Out_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS]
Initial value:
= {
{
{
&IfxEray0_TXDA_P02_0_OUT,
&IfxEray0_TXDA_P11_3_OUT,
&IfxEray0_TXDA_P14_0_OUT,
&IfxEray0_TXDA_P14_10_OUT
},
{
&IfxEray0_TXDB_P02_2_OUT,
&IfxEray0_TXDB_P11_12_OUT,
&IfxEray0_TXDB_P14_0_OUT,
&IfxEray0_TXDB_P14_5_OUT
}
},
{
{
&IfxEray1_TXDA_P01_12_OUT,
&IfxEray1_TXDA_P14_10_OUT,
NULL_PTR,
NULL_PTR
},
{
&IfxEray1_TXDB_P01_13_OUT,
&IfxEray1_TXDB_P14_5_OUT,
NULL_PTR,
NULL_PTR
}
}
}
IfxEray0_TXDA_P11_3_OUT
IfxEray_Txd_Out IfxEray0_TXDA_P11_3_OUT
Definition: IfxEray_PinMap.c:58
IfxEray0_TXDA_P02_0_OUT
IfxEray_Txd_Out IfxEray0_TXDA_P02_0_OUT
Definition: IfxEray_PinMap.c:57
IfxEray1_TXDB_P01_13_OUT
IfxEray_Txd_Out IfxEray1_TXDB_P01_13_OUT
Definition: IfxEray_PinMap.c:67
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxEray1_TXDA_P01_12_OUT
IfxEray_Txd_Out IfxEray1_TXDA_P01_12_OUT
Definition: IfxEray_PinMap.c:65
IfxEray0_TXDB_P02_2_OUT
IfxEray_Txd_Out IfxEray0_TXDB_P02_2_OUT
Definition: IfxEray_PinMap.c:61
IfxEray0_TXDA_P14_10_OUT
IfxEray_Txd_Out IfxEray0_TXDA_P14_10_OUT
Definition: IfxEray_PinMap.c:60
IfxEray1_TXDB_P14_5_OUT
IfxEray_Txd_Out IfxEray1_TXDB_P14_5_OUT
Definition: IfxEray_PinMap.c:68
IfxEray0_TXDB_P14_0_OUT
IfxEray_Txd_Out IfxEray0_TXDB_P14_0_OUT
Definition: IfxEray_PinMap.c:63
IfxEray0_TXDB_P11_12_OUT
IfxEray_Txd_Out IfxEray0_TXDB_P11_12_OUT
Definition: IfxEray_PinMap.c:62
IfxEray1_TXDA_P14_10_OUT
IfxEray_Txd_Out IfxEray1_TXDA_P14_10_OUT
Definition: IfxEray_PinMap.c:66
IfxEray0_TXDA_P14_0_OUT
IfxEray_Txd_Out IfxEray0_TXDA_P14_0_OUT
Definition: IfxEray_PinMap.c:59
IfxEray0_TXDB_P14_5_OUT
IfxEray_Txd_Out IfxEray0_TXDB_P14_5_OUT
Definition: IfxEray_PinMap.c:64

Definition at line 114 of file IfxEray_PinMap.c.

◆ IfxEray_Txen_Out_pinTable

const IfxEray_Txen_Out* IfxEray_Txen_Out_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS]

Definition at line 145 of file IfxEray_PinMap.c.


iLLD_TC38A: IfxEray_PinMap.h File Reference

  • _PinMap
Data Structures | Macros | Variables
IfxEray_PinMap.h File Reference
iLLD » ERAY

ERAY I/O map. More...

#include <IfxEray_reg.h>
#include <_Impl/IfxEray_cfg.h>
#include <Port/Std/IfxPort.h>
Include dependency graph for IfxEray_PinMap.h:

Go to the source code of this file.

Data Structures

struct | IfxEray_Rxd_In
RXD pin mapping structure. More...
struct | IfxEray_Txd_Out
TXD pin mapping structure. More...
struct | IfxEray_Txen_Out
TXEN pin mapping structure. More...

Macros

#define | IFXERAY_PINMAP_NUM_MODULES 2
Table dimensions. More...
#define | IFXERAY_PINMAP_NUM_NODES 2
#define | IFXERAY_PINMAP_RXD_IN_NUM_ITEMS 4
#define | IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS 4
#define | IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS 5

Variables

IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA0_P14_8_IN
Receive Channel A0. More...
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA1_P11_9_IN
Receive Channel A1. More...
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA2_P02_1_IN
Receive Channel A2. More...
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA3_P14_1_IN
Receive Channel A3. More...
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB0_P14_7_IN
Receive Channel B0. More...
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB1_P11_10_IN
Receive Channel B1. More...
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB2_P02_3_IN
Receive Channel B2. More...
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB3_P14_1_IN
Receive Channel B3. More...
IFX_EXTERN IfxEray_Rxd_In IfxEray1_RXDA0_P14_8_IN
Receive Channel A0. More...
IFX_EXTERN IfxEray_Rxd_In IfxEray1_RXDA1_P01_1_IN
Receive Channel A1. More...
IFX_EXTERN IfxEray_Rxd_In IfxEray1_RXDB0_P14_7_IN
Receive Channel B0. More...
IFX_EXTERN IfxEray_Rxd_In IfxEray1_RXDB1_P01_8_IN
Receive Channel B1. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P02_0_OUT
Transmit Channel A. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P11_3_OUT
Transmit Channel A. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P14_0_OUT
Transmit Channel A. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P14_10_OUT
Transmit Channel A. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P02_2_OUT
Transmit Channel B. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P11_12_OUT
Transmit Channel B. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P14_0_OUT
Transmit Channel B. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P14_5_OUT
Transmit Channel B. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray1_TXDA_P01_12_OUT
Transmit Channel A. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray1_TXDA_P14_10_OUT
Transmit Channel A. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray1_TXDB_P01_13_OUT
Transmit Channel B. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray1_TXDB_P14_5_OUT
Transmit Channel B. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENA_P02_4_OUT
Transmit Enable Channel A. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENA_P11_6_OUT
Transmit Enable Channel A. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENA_P14_9_OUT
Transmit Enable Channel A. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P02_5_OUT
Transmit Enable Channel B. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P11_11_OUT
Transmit Enable Channel B. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P11_6_OUT
Transmit Enable Channel B. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P14_6_OUT
Transmit Enable Channel B. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P14_9_OUT
Transmit Enable Channel B. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray1_TXENA_P01_14_OUT
Transmit Enable Channel A. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray1_TXENA_P14_9_OUT
Transmit Enable Channel A. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray1_TXENB_P02_15_OUT
Transmit Enable Channel B. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray1_TXENB_P14_6_OUT
Transmit Enable Channel B. More...
IFX_EXTERN const IfxEray_Rxd_In * | IfxEray_Rxd_In_pinTable [IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_RXD_IN_NUM_ITEMS]
IfxEray_Rxd_In table. More...
IFX_EXTERN const IfxEray_Txd_Out * | IfxEray_Txd_Out_pinTable [IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS]
IfxEray_Txd_Out table. More...
IFX_EXTERN const IfxEray_Txen_Out * | IfxEray_Txen_Out_pinTable [IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS]
IfxEray_Txen_Out table. More...

Detailed Description

ERAY I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxEray_PinMap.h.


iLLD_TC38A: IfxEray_Eray.h File Reference

  • Eray
  • Eray
Data Structures | Functions
IfxEray_Eray.h File Reference
iLLD » ERAY

ERAY ERAY details. More...

#include "Eray/Std/IfxEray.h"
#include "Cpu/Std/IfxCpu.h"
#include "Scu/Std/IfxScuWdt.h"
#include "Scu/Std/IfxScuCcu.h"
Include dependency graph for IfxEray_Eray.h:

Go to the source code of this file.

Data Structures

struct | IfxEray_Eray_Gtu01Config
GTU01 configuration. More...
struct | IfxEray_Eray_Gtu02Config
GTU02 configuration. More...
struct | IfxEray_Eray_Gtu03Config
GTU03 configuration. More...
struct | IfxEray_Eray_Gtu04Config
GTU04 configuration. More...
struct | IfxEray_Eray_Gtu05Config
GTU05 configuration. More...
struct | IfxEray_Eray_Gtu06Config
GTU06 configuration. More...
struct | IfxEray_Eray_Gtu07Config
GTU07 configuration. More...
struct | IfxEray_Eray_Gtu08Config
GTU08 configuration. More...
struct | IfxEray_Eray_Gtu09Config
GTU09 configuration. More...
struct | IfxEray_Eray_Gtu10Config
GTU10 configuration. More...
struct | IfxEray_Eray_Gtu11Config
GTU11 configuration. More...
struct | IfxEray_Eray_GTUConfig
Gloabl Timing Unit configuration structure. More...
struct | IfxEray_Eray_NodeA
Pins configuration structure for Node A. More...
struct | IfxEray_Eray_NodeB
Pins configuration structure for Node B. More...
struct | IfxEray_Eray_Prtc1Control
Protocol operation control properties. More...
struct | IfxEray_Eray_Prtc2Control
Wakeup symbol control properties. More...
struct | IfxEray_Eray_Succ1Config
communication controller control properties. More...
struct | IfxEray_Eray_Succ2Config
Communication listen timeout properties. More...
struct | IfxEray_Eray_Succ3Config
Clock correction fail properties. More...
struct | IfxEray_Eray_ControllerConfig
Communication Controller configuration structure. More...
struct | IfxEray_Eray_Interrupt
Interrupt control properties. More...
struct | IfxEray_Eray_MessageRAMConfig
Message RAM configuration structure. More...
struct | IfxEray_Eray_Pins
Pins configuration structure. More...
struct | IfxEray_Eray
ERAY Module handle. More...
struct | IfxEray_Eray_BufferReconfig
Reconfigurable buffer structure. More...
struct | IfxEray_Eray_Config
Module configuration structure. More...
struct | IfxEray_Eray_NodeConfig
Node configuration structure. More...
struct | IfxEray_Eray_ReceiveControl
Receive control properties structure. More...
struct | IfxEray_Eray_ReceivedFrame
Received Frame. More...
struct | IfxEray_Eray_TransmitControl
Transfer control in a slot. More...

Functions

IFX_INLINE void | IfxEray_Eray_deInitModule (IfxEray_Eray *eray)
De-initialises the ERAY module. More...
IFX_EXTERN void | IfxEray_Eray_initModule (IfxEray_Eray *eray, const IfxEray_Eray_Config *config)
Initialises the ERAY module with supplied configuration. More...
IFX_EXTERN void | IfxEray_Eray_initModuleConfig (IfxEray_Eray_Config *config, Ifx_ERAY *eray)
Inialises the default module configuration buffer. More...
IFX_EXTERN void | IfxEray_Eray_Node_init (IfxEray_Eray *eray, const IfxEray_Eray_NodeConfig *config)
Initialises the Node with supplied configuration. More...
IFX_EXTERN void | IfxEray_Eray_Node_initConfig (IfxEray_Eray_NodeConfig *config)
Initialises the default node configuration buffer. More...
IFX_INLINE boolean | IfxEray_Eray_allowColdStart (IfxEray_Eray *eray)
Allows node to enter the cold startup state. More...
IFX_INLINE void | IfxEray_Eray_bufferReconfig (IfxEray_Eray *eray, IfxEray_Eray_BufferReconfig *reconfigBuffer)
Reconfiguring the buffer or changing the slot. More...
IFX_INLINE boolean | IfxEray_Eray_changePocState (IfxEray_Eray *eray, IfxEray_PocCommand PocCommand)
Changes the POC state and return status. More...
IFX_INLINE void | IfxEray_Eray_readData (IfxEray_Eray *eray, uint32 *data, uint8 payloadLength)
Reads the received data from output registers. More...
IFX_INLINE void | IfxEray_Eray_readFrame (IfxEray_Eray *eray, IfxEray_Eray_ReceivedFrame *frame, Ifx_SizeT maxPayloadLength)
reads the frame received in a buffer. More...
IFX_INLINE boolean | IfxEray_Eray_setPocAllSlots (IfxEray_Eray *eray)
Sets the Controller state to ALL Slots mode. More...
IFX_INLINE boolean | IfxEray_Eray_startCommunication (IfxEray_Eray *eray)
Runs the communication controller. More...
IFX_INLINE void | IfxEray_Eray_wakeUpChannel (IfxEray_Eray *eray, IfxEray_Channel channel)
Wakeups the channel in a cluster. More...
IFX_INLINE boolean | IfxEray_Eray_wakeUpCluster (IfxEray_Eray *eray)
Wakeups the node in a cluster. More...
IFX_INLINE void | IfxEray_Eray_writeData (IfxEray_Eray *eray, uint32 *data, uint8 payloadLength)
Writes data section of a frame to input data registers. More...
IFX_EXTERN void | IfxEray_Eray_receiveFifoFrame (IfxEray_Eray *eray, IfxEray_Eray_ReceiveControl *config)
Transfers frame from fifo in message RAM to Output buffer. More...
IFX_EXTERN void | IfxEray_Eray_receiveFrame (IfxEray_Eray *eray, IfxEray_Eray_ReceiveControl *config)
Transfers header and data from message buffer to output buffer. More...
IFX_EXTERN void | IfxEray_Eray_transmitFrame (IfxEray_Eray *eray, IfxEray_Eray_TransmitControl *transmitControl)
Transfers the frame in given slot. More...
IFX_INLINE IfxEray_PocState | IfxEray_Eray_getPocState (IfxEray_Eray *eray)
Gets the current node controller POC state. More...
IFX_INLINE IfxEray_WakeupChannel | IfxEray_Eray_getWakeupPatternReceivedChannel (IfxEray_Eray *eray)
Gets the received wakeup pattern channel. More...
IFX_INLINE void | IfxEray_Eray_clearErrorFlag (IfxEray_Eray *eray, IfxEray_ClearErrorFlag errorFlag)
clears the error interrupt flag requested. More...
IFX_INLINE void | IfxEray_Eray_clearStatusFlag (IfxEray_Eray *eray, IfxEray_ClearStatusFlag statusFlag)
Clears the status interrupt flag requested. More...
IFX_INLINE Ifx_ERAY_EIR | IfxEray_Eray_getErrorInterrupts (IfxEray_Eray *eray)
Gets the error interrupt status. More...
IFX_INLINE uint8 | IfxEray_Eray_getMessageBufferInterruptStatus (IfxEray_Eray *eray, uint8 messageBuffer)
Gets the message buffer interrupt status. More...
IFX_INLINE uint8 | IfxEray_Eray_getNewDataInterruptStatus (IfxEray_Eray *eray, uint8 ndat)
Gets the new data interrupt buffers status. More...
IFX_INLINE Ifx_ERAY_SIR | IfxEray_Eray_getStatusInterrupts (IfxEray_Eray *eray)
Gets the node status interrupts. More...
IFX_INLINE void | IfxEray_Eray_setMessageBufferInterruptDestination (IfxEray_Eray *eray, uint8 messageBuffer, uint8 messageBufferDestination)
Enables the message buffer interrupt line. More...
IFX_INLINE void | IfxEray_Eray_setNewDataInterruptDestination (IfxEray_Eray *eray, uint8 ndat, uint8 ndatDestination)
Enables the NDAT buffer interrupt line. More...

Detailed Description

ERAY ERAY details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxEray_Eray.h.


iLLD_TC38A: IfxEray.h File Reference

  • Eray
  • Std
Data Structures | Enumerations | Functions
IfxEray.h File Reference
iLLD » ERAY

ERAY basic functionality. More...

#include "_Impl/IfxEray_cfg.h"
#include "_PinMap/IfxEray_PinMap.h"
#include "Src/Std/IfxSrc.h"
#include "IfxEray_reg.h"
Include dependency graph for IfxEray.h:

Go to the source code of this file.

Data Structures

struct | IfxEray_Header
Header section in a frame. More...
struct | IfxEray_ReceivedHeader
Received header in a frame. More...
struct | IfxEray_SlotConfig
Transmit control structure. More...

Enumerations

enum IfxEray_Baudrate {
IfxEray_Baudrate_10 = 0,
IfxEray_Baudrate_5 = 1,
IfxEray_Baudrate_2_5 = 2
}
Baudrate on the flexray bus, defined in MODULE_ERAY0.PRTC1.B.BRP. More...
enum IfxEray_BufferDirection {
IfxEray_BufferDirection_receive = 0,
IfxEray_BufferDirection_transmit = 1
}
wheather transmit buffer or receive buffer, defined in MODULE_ERAY0.WRHS1.B.CFG. More...
enum IfxEray_Channel {
IfxEray_Channel_a = 0,
IfxEray_Channel_b = 1
}
Channel Id. More...
enum IfxEray_ClearErrorFlag {
IfxEray_ClearErrorFlag_pemc = 1,
IfxEray_ClearErrorFlag_cna = 2,
IfxEray_ClearErrorFlag_sfbm = 4,
IfxEray_ClearErrorFlag_sfo = 8,
IfxEray_ClearErrorFlag_ccf = 16,
IfxEray_ClearErrorFlag_ccl = 32,
IfxEray_ClearErrorFlag_eerr = 64,
IfxEray_ClearErrorFlag_rfo = 128,
IfxEray_ClearErrorFlag_efa = 256,
IfxEray_ClearErrorFlag_iiba = 512,
IfxEray_ClearErrorFlag_ioba = 1024,
IfxEray_ClearErrorFlag_mhf = 2048,
IfxEray_ClearErrorFlag_eda = 65536,
IfxEray_ClearErrorFlag_ltva = 131072,
IfxEray_ClearErrorFlag_taba = 262144,
IfxEray_ClearErrorFlag_edb = 16777216,
IfxEray_ClearErrorFlag_ltvb = 33554432,
IfxEray_ClearErrorFlag_tabb = 67108864
}
Selection of error flag to clear defined in MODULE_ERAY.EIR.U. More...
enum IfxEray_ClearStatusFlag {
IfxEray_ClearStatusFlag_wst = 1,
IfxEray_ClearStatusFlag_cas = 2,
IfxEray_ClearStatusFlag_cycs = 4,
IfxEray_ClearStatusFlag_txi = 8,
IfxEray_ClearStatusFlag_rxi = 16,
IfxEray_ClearStatusFlag_rfne = 32,
IfxEray_ClearStatusFlag_rfcl = 64,
IfxEray_ClearStatusFlag_nmvc = 128,
IfxEray_ClearStatusFlag_ti0 = 256,
IfxEray_ClearStatusFlag_ti1 = 512,
IfxEray_ClearStatusFlag_tibc = 1024,
IfxEray_ClearStatusFlag_tobc = 2048,
IfxEray_ClearStatusFlag_swe = 4096,
IfxEray_ClearStatusFlag_sucs = 8192,
IfxEray_ClearStatusFlag_mbsi = 16384,
IfxEray_ClearStatusFlag_sds = 32768,
IfxEray_ClearStatusFlag_wupa = 65536,
IfxEray_ClearStatusFlag_mtsa = 131072,
IfxEray_ClearStatusFlag_wupb = 16777216,
IfxEray_ClearStatusFlag_mtsb = 33554432
}
Selection of status flag to clear defined in MODULE_ERAY.SIR.U. More...
enum IfxEray_ClockDivider {
IfxEray_ClockDivider_none = 0,
IfxEray_ClockDivider_1 = 1,
IfxEray_ClockDivider_2,
IfxEray_ClockDivider_3,
IfxEray_ClockDivider_4,
IfxEray_ClockDivider_5,
IfxEray_ClockDivider_6,
IfxEray_ClockDivider_7
}
Clock divider in RUN mode, defined in MODULE_ERAY0.B.RMC. More...
enum IfxEray_ExternalOffset {
IfxEray_ExternalOffset_noCorrection = 1,
IfxEray_ExternalOffset_correctionSubtracted = 2,
IfxEray_ExternalOffset_correctionAdded = 3
}
External offset correction control defined in MODULE_ERAY0.GTU11.B.EOCC. More...
enum IfxEray_ExternalOffsetCorrection {
IfxEray_ExternalOffsetCorrection_0 = 0,
IfxEray_ExternalOffsetCorrection_1,
IfxEray_ExternalOffsetCorrection_2,
IfxEray_ExternalOffsetCorrection_3,
IfxEray_ExternalOffsetCorrection_4,
IfxEray_ExternalOffsetCorrection_5,
IfxEray_ExternalOffsetCorrection_6,
IfxEray_ExternalOffsetCorrection_7
}
External clock offset correction value defined in MODULE_ERAY0.GTU11.B.EOC. More...
enum IfxEray_ExternalRate {
IfxEray_ExternalRate_noCorrection = 1,
IfxEray_ExternalRate_correctionSubtracted = 2,
IfxEray_ExternalRate_correctionAdded = 3
}
External rate correction control MODULE_ERAY0.GTU11.B.ERCC. More...
enum IfxEray_ExternalRateCorrection {
IfxEray_ExternalRateCorrection_0 = 0,
IfxEray_ExternalRateCorrection_1,
IfxEray_ExternalRateCorrection_2,
IfxEray_ExternalRateCorrection_3,
IfxEray_ExternalRateCorrection_4,
IfxEray_ExternalRateCorrection_5,
IfxEray_ExternalRateCorrection_6,
IfxEray_ExternalRateCorrection_7
}
External clock rate correction value defined in MODULE_ERAY0.GTU11.B.ERC. More...
enum IfxEray_IdleDynamicSlots {
IfxEray_IdleDynamicSlots_0 = 0,
IfxEray_IdleDynamicSlots_1,
IfxEray_IdleDynamicSlots_2
}
Duration of dynamic slot idle phase, defined in MODULE_ERAY0.B.DSI. More...
enum IfxEray_InterruptLine {
IfxEray_InterruptLine_0 = 0,
IfxEray_InterruptLine_1 = 1
}
Interrupt lines. More...
enum IfxEray_ListenTimeOutNoise {
IfxEray_ListenTimeOutNoise_2 = 1,
IfxEray_ListenTimeOutNoise_3,
IfxEray_ListenTimeOutNoise_4,
IfxEray_ListenTimeOutNoise_5,
IfxEray_ListenTimeOutNoise_6,
IfxEray_ListenTimeOutNoise_7,
IfxEray_ListenTimeOutNoise_8,
IfxEray_ListenTimeOutNoise_9,
IfxEray_ListenTimeOutNoise_10,
IfxEray_ListenTimeOutNoise_11,
IfxEray_ListenTimeOutNoise_12,
IfxEray_ListenTimeOutNoise_13,
IfxEray_ListenTimeOutNoise_14,
IfxEray_ListenTimeOutNoise_15,
IfxEray_ListenTimeOutNoise_16
}
Wakeup or Startup listen timeout in presence of noise, defined in MODULE_ERAY0.SUCC2.B.LTN. More...
enum IfxEray_MaxSynchFrames {
IfxEray_MaxSynchFrames_2 = 2,
IfxEray_MaxSynchFrames_3,
IfxEray_MaxSynchFrames_4,
IfxEray_MaxSynchFrames_5,
IfxEray_MaxSynchFrames_6,
IfxEray_MaxSynchFrames_7,
IfxEray_MaxSynchFrames_8,
IfxEray_MaxSynchFrames_9,
IfxEray_MaxSynchFrames_10,
IfxEray_MaxSynchFrames_11,
IfxEray_MaxSynchFrames_12,
IfxEray_MaxSynchFrames_13,
IfxEray_MaxSynchFrames_14,
IfxEray_MaxSynchFrames_15
}
Maximum number of sync frames in a cluster defined in MODULE_ERAY0.GTU02.B.SNM. More...
enum IfxEray_PocCommand {
IfxEray_PocCommand_notAccepted = 0,
IfxEray_PocCommand_config = 1,
IfxEray_PocCommand_ready = 2,
IfxEray_PocCommand_wakeup = 3,
IfxEray_PocCommand_run = 4,
IfxEray_PocCommand_allSlots = 5,
IfxEray_PocCommand_halt = 6,
IfxEray_PocCommand_freeze = 7,
IfxEray_PocCommand_sendMts = 8,
IfxEray_PocCommand_coldStart = 9,
IfxEray_PocCommand_reset = 10,
IfxEray_PocCommand_monitor = 11,
IfxEray_PocCommand_clearRam = 12
}
Commmand to control the Communication, defined in MODULE_ERAY0.SUCC1.B.CMD. More...
enum IfxEray_PocState {
IfxEray_PocState_defaultConfig = 0,
IfxEray_PocState_ready = 1,
IfxEray_PocState_normalActive = 2,
IfxEray_PocState_normalPassive = 3,
IfxEray_PocState_halt = 4,
IfxEray_PocState_monitor = 5,
IfxEray_PocState_config = 15,
IfxEray_PocState_wakeupStandby = 16,
IfxEray_PocState_wakeupListen = 17,
IfxEray_PocState_wakeupSend = 18,
IfxEray_PocState_wakeupDetect = 19,
IfxEray_PocState_startup = 32,
IfxEray_PocState_coldStartListen = 33,
IfxEray_PocState_collisionResolution = 34,
IfxEray_PocState_consistencyCheck = 35,
IfxEray_PocState_gap = 36,
IfxEray_PocState_join = 37,
IfxEray_PocState_integrationCheck = 38,
IfxEray_PocState_integrationListen = 39,
IfxEray_PocState_integrationConsistencyCheck = 40,
IfxEray_PocState_initializeSchedule = 41,
IfxEray_PocState_staruAborted = 42,
IfxEray_PocState_startupSucced = 43
}
State of Communication Controller Protocol operation control, defined in MODULE_ERAY0.CCSV.B.POCS. More...
enum IfxEray_ReceiveChannel {
IfxEray_ReceiveChannel_both = 0,
IfxEray_ReceiveChannel_b = 1,
IfxEray_ReceiveChannel_a = 2,
IfxEray_ReceiveChannel_none = 3
}
Receiving channel, defined in MODULE_ERAY0.FRF.B.CH. More...
enum IfxEray_SleepMode {
IfxEray_SleepMode_enable = 0,
IfxEray_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_ERAY.CLC.B.EDIS. More...
enum IfxEray_StrobePosition {
IfxEray_StrobePosition_5 = 0,
IfxEray_StrobePosition_4 = 1,
IfxEray_StrobePosition_6 = 2
}
Sample count value for strobing, defined in MODULE_ERAY0.PRTC1.B.SPP. More...
enum IfxEray_SuspendMode {
IfxEray_SuspendMode_none = 0,
IfxEray_SuspendMode_hard = 1,
IfxEray_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxEray_TransmissionMode {
IfxEray_TransmissionMode_continuous = 0,
IfxEray_TransmissionMode_singleShot = 1
}
Transmission mode of Header, defined in MODULE_ERAY0.WRHS1.B.TXM. More...
enum IfxEray_TransmissionSlotMode {
IfxEray_TransmissionSlotMode_all = 0,
IfxEray_TransmissionSlotMode_single = 1
}
Initial transmission mode, defined in MODULE_ERAY0.SUCC1.B.TSM. More...
enum IfxEray_WakeupChannel {
IfxEray_WakeupChannel_a = 0,
IfxEray_WakeupChannel_b = 1
}
Wakeup pattern carry channel, defined in MODULE_ERAY0.SUCC1.B.WUCS. More...

Functions

IFX_INLINE void | IfxEray_clearErrorFlag (Ifx_ERAY *eray, IfxEray_ClearErrorFlag errorFlag)
Clears the error flag requested. More...
IFX_INLINE void | IfxEray_clearStatusFlag (Ifx_ERAY *eray, IfxEray_ClearStatusFlag statusFlag)
Clears the status flag requested. More...
IFX_INLINE Ifx_ERAY_EIR | IfxEray_getErrorInterrupts (Ifx_ERAY *eray)
Gets the error interrupt flags. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getInputBufferBusySrcPtr (Ifx_ERAY *eray)
Gets the IBUSY service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getInterruptLine0SrcPtr (Ifx_ERAY *eray)
Gets the INT0 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getInterruptLine1SrcPtr (Ifx_ERAY *eray)
Gets the INT1 service request. More...
IFX_INLINE boolean | IfxEray_getMessageBufferInterruptStatus (Ifx_ERAY *eray, uint8 messageBuffer)
Gets the message buffers interrupt status. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getMessageBufferStatus0SrcPtr (Ifx_ERAY *eray)
Gets the MBSC0 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getMessageBufferStatus1SrcPtr (Ifx_ERAY *eray)
Gets the MBSC1 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getNewDataInterrupt0SrcPtr (Ifx_ERAY *eray)
Gets the NDAT0 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getNewDataInterrupt1SrcPtr (Ifx_ERAY *eray)
Gets the NDAT1 service request. More...
IFX_INLINE boolean | IfxEray_getNewDataInterruptStatus (Ifx_ERAY *eray, uint8 ndat)
Gets the new data interrupt buffers status. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getOutputBufferBusySrcPtr (Ifx_ERAY *eray)
Gets the OBUSY service request. More...
IFX_INLINE Ifx_ERAY_SIR | IfxEray_getStatusInterrupts (Ifx_ERAY *eray)
Gets the status interrupt flags. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getTimerInterrupt0SrcPtr (Ifx_ERAY *eray)
Gets the TINT0 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getTimerInterrupt1SrcPtr (Ifx_ERAY *eray)
Gets the TINT1 service request. More...
IFX_EXTERN void | IfxEray_clearAllFlags (Ifx_ERAY *eray)
Clears all the error flags. More...
IFX_EXTERN void | IfxEray_enableInterruptLines (Ifx_ERAY *eray)
Enables all the Interrupt lines. More...
IFX_EXTERN void | IfxEray_setMessageBufferInterruptDestination (Ifx_ERAY *eray, uint8 messageBuffer, uint8 messageBufferDestination)
Selects between MBSC0 and MBSC1 interrupt destination. More...
IFX_EXTERN void | IfxEray_setNewDataInterruptDestination (Ifx_ERAY *eray, uint8 ndat, uint8 ndatDestination)
Selects between NDAT0 and NDAT1 interrupt destination. More...
IFX_INLINE void | IfxEray_initRxPin (const IfxEray_Rxd_In *rx, IfxPort_InputMode rxMode)
Initialises a RX pin. More...
IFX_INLINE void | IfxEray_initTxEnPin (const IfxEray_Txen_Out *txEn, IfxPort_OutputMode txEnMode, IfxPort_PadDriver padDriver)
Initializes a TX Enable output. More...
IFX_INLINE void | IfxEray_initTxPin (const IfxEray_Txd_Out *tx, IfxPort_OutputMode txMode, IfxPort_PadDriver padDriver)
Initializes a TX output. More...
IFX_INLINE void | IfxEray_disableModule (Ifx_ERAY *eray)
Disables the ERAY module. More...
IFX_INLINE void | IfxEray_enableModule (Ifx_ERAY *eray)
Enables the ERAY module. More...
IFX_INLINE boolean | IfxEray_isModuleSuspended (Ifx_ERAY *eray)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxEray_setSleepMode (Ifx_ERAY *eray, IfxEray_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_EXTERN Ifx_ERAY * | IfxEray_getAddress (IfxEray_Index eray)
IFX_EXTERN IfxEray_Index | IfxEray_getIndex (Ifx_ERAY *eray)
API to get the resource index of the ERAY specified. More...
IFX_EXTERN void | IfxEray_resetModule (Ifx_ERAY *eray)
Resets the ERAY kernel. More...
IFX_INLINE Ifx_ERAY_FSR | IfxEray_getFifoStatus (Ifx_ERAY *eray)
Gets the FIFO status. More...
IFX_INLINE boolean | IfxEray_getInputBufferBusyHostStatus (Ifx_ERAY *eray)
Gets the Input Buffer Host Busy status. More...
IFX_INLINE uint8 | IfxEray_getInputBufferBusyShadowStatus (Ifx_ERAY *eray)
Gets the Input Buffer Shadow status. More...
IFX_INLINE uint8 | IfxEray_getOutputBuffer (Ifx_ERAY *eray)
Gets the output buffer index. More...
IFX_INLINE boolean | IfxEray_getOutputBufferBusyShadowStatus (Ifx_ERAY *eray)
Gets the Output Buffer Shadow status. More...
IFX_INLINE IfxEray_PocState | IfxEray_getPocState (Ifx_ERAY *eray)
Gets the current POC state. More...
IFX_INLINE IfxEray_WakeupChannel | IfxEray_getWakeupPatternReceivedChannel (Ifx_ERAY *eray)
Gets the received wakeup pattern channel. More...
IFX_INLINE void | IfxEray_waitForPocState (Ifx_ERAY *eray, IfxEray_PocState pocState)
Waits until the controller enters required POC state. More...
IFX_EXTERN boolean | IfxEray_changePocState (Ifx_ERAY *eray, IfxEray_PocCommand pocCommand)
Changes the Commmunication Controller state. More...
IFX_EXTERN void | IfxEray_setPocReady (Ifx_ERAY *eray)
Sets the POC state to Ready state. More...
IFX_INLINE void | IfxEray_receiveHeader (Ifx_ERAY *eray, boolean headerReceived)
request to receive header section from message buffer. More...
IFX_INLINE void | IfxEray_sendHeader (Ifx_ERAY *eray, boolean headerTransfered)
sets the bit to send header in frame. More...
IFX_INLINE void | IfxEray_setActiveCyclePairs (Ifx_ERAY *eray, uint8 numberOfCyclePairsForActive)
Sets number of cycle pairs for Active state. More...
IFX_INLINE void | IfxEray_setAutoDelayBuffers (Ifx_ERAY *eray)
Sets auto delays between input, output buffers and message RAM. More...
IFX_INLINE void | IfxEray_setBaudrate (Ifx_ERAY *eray, IfxEray_Baudrate baudrate)
Sets baudrate on Flexray bus. More...
IFX_INLINE void | IfxEray_setBufferReconfigSecure (Ifx_ERAY *eray, uint8 secureValue)
Sets secured buffers in message RAM. More...
IFX_INLINE void | IfxEray_setChannelAInitialOffsets (Ifx_ERAY *eray, uint8 channelAMicrotickInitialOffset, uint8 channelAMacrotickInitialOffset)
Sets channel A initial offstes. More...
IFX_INLINE void | IfxEray_setChannelBInitialOffsets (Ifx_ERAY *eray, uint8 channelBMicrotickInitialOffset, uint8 channelBMacrotickInitialOffset)
Sets channel B initial offstes. More...
IFX_INLINE void | IfxEray_setChannelsReceiveDelay (Ifx_ERAY *eray, uint8 channelAReceptionDelay, uint8 channelBReceptionDelay)
Sets receive delays on channels. More...
IFX_INLINE void | IfxEray_setClockCorrectionCycles (Ifx_ERAY *eray, uint8 clockCorrectionCyclesPassive, uint8 clockCorrectionCyclesHalt)
Sets clock correction cycles for Passive and Halt. More...
IFX_INLINE void | IfxEray_setClockSynchErrorHalt (Ifx_ERAY *eray, boolean clockSyncErrorHalt)
lead to halt state in clock synch error. More...
IFX_INLINE void | IfxEray_setClusterDriftValues (Ifx_ERAY *eray, uint8 clusterDrift, uint16 maxDriftOffset)
Sets cluster drift values. More...
IFX_INLINE void | IfxEray_setClusterStartupDeviation (Ifx_ERAY *eray, uint16 acceptedStartupDeviation)
Sets cluster startup deviation. More...
IFX_INLINE void | IfxEray_setCollisionAvoidanceDuration (Ifx_ERAY *eray, uint8 collisionAvoidanceDuration)
Sets CAS symbol window duration. More...
IFX_INLINE void | IfxEray_setCycleDurationMacroticks (Ifx_ERAY *eray, uint16 macroticks)
sets duration of the communication cycle in Macroticks. More...
IFX_INLINE void | IfxEray_setCycleDurationMicroticks (Ifx_ERAY *eray, uint32 microticks)
sets duration of the communication cycle in Microticks. More...
IFX_INLINE void | IfxEray_setDecodingCorrectionValue (Ifx_ERAY *eray, uint8 decodingCorrection)
Sets decoding correction value. More...
IFX_INLINE void | IfxEray_setDynamicSlots (Ifx_ERAY *eray, uint8 dynamicSlotLength, uint16 dynamicSlotCount, IfxEray_IdleDynamicSlots idleDynamicSlots)
Sets dynamic slots count and length. More...
IFX_INLINE void | IfxEray_setExternalCorrectionControl (Ifx_ERAY *eray, IfxEray_ExternalOffset externalOffset, IfxEray_ExternalRate externalRate)
Sets external correction controls. More...
IFX_INLINE void | IfxEray_setExternalCorrectionValues (Ifx_ERAY *eray, IfxEray_ExternalOffsetCorrection externalOffsetCorrection, IfxEray_ExternalRateCorrection externalRateCorrection)
Sets external correction values. More...
IFX_INLINE void | IfxEray_setFifoBufferStartIndex (Ifx_ERAY *eray, uint8 fifoBufferStartIndex)
Sets FIFO buffer start idex. More...
IFX_INLINE void | IfxEray_setFifoFilterConfigurations (Ifx_ERAY *eray, uint16 rejectedFrameId, uint8 filteredCycleNumber, boolean fifoNullFramesRejected, uint16 frameIdFilter)
Sets FIFO filter configurations. More...
IFX_INLINE void | IfxEray_setFifoMessageBufferConfigurations (Ifx_ERAY *eray, IfxEray_ReceiveChannel receiveChannel, boolean staticFifoDisabled, uint8 fifoDepth)
Sets FIFO configurations. More...
IFX_INLINE void | IfxEray_setFirstDynamicBuffer (Ifx_ERAY *eray, uint8 firstDynamicBuffer)
Sets first dynamic buffer. More...
IFX_INLINE void | IfxEray_setListenTimeOuts (Ifx_ERAY *eray, uint32 listenTimeOut, IfxEray_ListenTimeOutNoise listenTimeOutNoise)
Sets startup or wakeup listen timeouts. More...
IFX_INLINE void | IfxEray_setMaxColdStartAttempts (Ifx_ERAY *eray, uint8 maxColdStartAttempts)
Sets the maximum cold start attempts for active state. More...
IFX_INLINE void | IfxEray_setMaxCorrectionValues (Ifx_ERAY *eray, uint16 maxOffsetCorrection, uint16 maxRateCorrection)
Sets max limit correction values. More...
IFX_INLINE void | IfxEray_setMaxSynchFrames (Ifx_ERAY *eray, IfxEray_MaxSynchFrames maxSyncFrames)
Sets maximum synch frames in a cluster. More...
IFX_INLINE void | IfxEray_setMessageBufferCount (Ifx_ERAY *eray, uint8 numberOfMessageBuffers)
Sets number of message buffers. More...
IFX_INLINE void | IfxEray_setMessageHandlerConfigurations (Ifx_ERAY *eray, uint8 staticFramepayload, uint8 latestTransmissionStart)
Sets Message Handler configurations. More...
IFX_INLINE void | IfxEray_setNetworkStartIdleTime (Ifx_ERAY *eray, uint16 networkStartIdleTime)
Sets network start Idle time. More...
IFX_INLINE void | IfxEray_setNetworkVectorLength (Ifx_ERAY *eray, uint32 networkVectorLength)
Sets network management vector length. More...
IFX_INLINE void | IfxEray_setNodeChannels (Ifx_ERAY *eray, boolean channelAConnectedNode, boolean channelBConnectedNode)
Sets channels connected to node. More...
IFX_INLINE void | IfxEray_setOffsetCorrection (Ifx_ERAY *eray, uint16 correctionOffset)
Sets offset correction starting point. More...
IFX_INLINE void | IfxEray_setReceiveRequest (Ifx_ERAY *eray, boolean receiveRequested)
requests to receive the frame. More...
IFX_INLINE void | IfxEray_setReceiveWakeupTimes (Ifx_ERAY *eray, uint16 receiveWakeupTestDuration, uint8 receiveWakeupIdleTime, uint8 receiveWakeupLowTime)
Sets receive wakeup times. More...
IFX_INLINE void | IfxEray_setRxBufferNumber (Ifx_ERAY *eray, uint8 bufferIndex)
sets buffer number in which frame is received. More...
IFX_INLINE void | IfxEray_setSlotActionPoints (Ifx_ERAY *eray, uint8 staticActionPoint, uint8 dynamicActionPoint)
Sets slots action points. More...
IFX_INLINE void | IfxEray_setStaticSlots (Ifx_ERAY *eray, uint16 staticSlotLength, uint16 staticSlotsCount)
Sets static slots count and length. More...
IFX_INLINE void | IfxEray_setStrobePosition (Ifx_ERAY *eray, IfxEray_StrobePosition strobePosition)
Sets sample point for strobing. More...
IFX_INLINE void | IfxEray_setSymbolChannels (Ifx_ERAY *eray, boolean channelASymbolTransmitted, boolean channelBSymbolTransmitted)
Sets channels which transmits symbols. More...
IFX_INLINE void | IfxEray_setTransmissionSlotMode (Ifx_ERAY *eray, IfxEray_TransmissionSlotMode transmissionSlotMode)
Sets the transmit slot mode. More...
IFX_INLINE void | IfxEray_setTransmissionStartTime (Ifx_ERAY *eray, uint8 transmissionStartTime)
Sets transmission start time duration. More...
IFX_INLINE void | IfxEray_setTransmitRequest (Ifx_ERAY *eray, boolean transferRequested)
Sets transfer request to send frame. More...
IFX_INLINE void | IfxEray_setTransmitWakeupTimes (Ifx_ERAY *eray, uint8 transmitWakeupRepetitions, uint8 transmitWakeupIdleTime, uint8 transmitWakeupLowTime)
Sets transmit wakeup times. More...
IFX_INLINE void | IfxEray_setTransmittedFrames (Ifx_ERAY *eray, boolean startupFrameTransmitted, boolean synchFrameTransmitted)
Configures transmitted frames for startup and synchronization. More...
IFX_INLINE void | IfxEray_setTxBufferNumber (Ifx_ERAY *eray, uint8 bufferIndex)
Sets the transmit buffer number. More...
IFX_INLINE void | IfxEray_setViewData (Ifx_ERAY *eray, boolean swapRequested)
Swaps the shadow and Host output registers. More...
IFX_INLINE void | IfxEray_setWakeupPatternChannel (Ifx_ERAY *eray, IfxEray_WakeupChannel wakeupPatternChannel)
Sets the cluster wakeup channel. More...
IFX_INLINE void | IfxEray_receiveData (Ifx_ERAY *eray, boolean dataReceived)
requests to receive data from message buffer. More...
IFX_INLINE void | IfxEray_sendData (Ifx_ERAY *eray, boolean dataTransfered)
sets the bit to send data in frame. More...
IFX_EXTERN uint16 | IfxEray_calcHeaderCrc (uint8 payloadLength, uint16 frameId, boolean startupFrameIndicator, boolean syncFrameIndicator)
Calculate and returns the CRC for frame. More...
IFX_EXTERN void | IfxEray_readData (Ifx_ERAY *eray, uint32 *data, uint8 payloadLength)
Reads the received data from output registers. More...
IFX_EXTERN void | IfxEray_readFrame (Ifx_ERAY *eray, IfxEray_ReceivedHeader *header, uint32 *data, Ifx_SizeT maxPayloadLength)
Reads header and data from output buffers. More...
IFX_EXTERN void | IfxEray_setSlot (Ifx_ERAY *eray, const IfxEray_Header *header, const uint32 *data, const IfxEray_SlotConfig *slotConfig)
Writes header and data to Input buffers and set the slots. More...
IFX_EXTERN void | IfxEray_writeData (Ifx_ERAY *eray, const uint32 *data, uint8 payloadLength)
Writes data section of a frame to input data registers. More...
IFX_INLINE uint8 | IfxEray_getFifoIndex (Ifx_ERAY *eray)
Gets the FIFO index. More...
IFX_INLINE void | IfxEray_setSuspendMode (Ifx_ERAY *eray, IfxEray_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_INLINE void | IfxEray_initRxPinWithPadLevel (const IfxEray_Rxd_In *rx, IfxPort_InputMode rxMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of pin direction as input and configuring pad driver. More...
IFX_INLINE void | IfxEray_selectRecieveInput (Ifx_ERAY *eray, IfxEray_NodeId nodeId, Ifx_RxSel select)
Provides functionality to select the receiver channel input. More...
IFX_INLINE void | IfxEray_setPocCommand (Ifx_ERAY *eray, IfxEray_PocCommand cmd)
Provides functionality to provide the command to change the transmit mode. More...
IFX_INLINE boolean | IfxEray_isRamsCleared (Ifx_ERAY *eray)
Provides functionality to find out that any CHI command is being executed or not. More...
IFX_INLINE boolean | IfxEray_isPocBusy (Ifx_ERAY *eray)
Provides functionality to check whether POC is busy or not. More...
IFX_INLINE void | IfxEray_enableInterruptLine (Ifx_ERAY *eray, IfxEray_InterruptLine intLine)
Provides functionality to enble the interrupt lines. More...
IFX_INLINE void | IfxEray_enableTransmitInterrupt (Ifx_ERAY *eray)
Provides functionality to enable the transmit interrupt. More...
IFX_INLINE void | IfxEray_enableAllErrorInterrupts (Ifx_ERAY *eray)
Provides functionality to enable all the error iterrupts. More...
IFX_INLINE void | IfxEray_unlockTestModeKey (Ifx_ERAY *eray)
Provides functionality to enable the test mode. More...
IFX_INLINE void | IfxEray_enableWriteTestRegister (Ifx_ERAY *eray)
Provides functionality to enable write to the test mode registers. More...
IFX_INLINE void | IfxEray_enableExternalLoopback (Ifx_ERAY *eray)
Provides functionality to enable the external loopback. More...
IFX_INLINE void | IfxEray_unlockConfigurationKey (Ifx_ERAY *eray)
Provides functionality to unlock the test mode configuration. More...
IFX_INLINE void | IfxEray_configureSuc1Register (Ifx_ERAY *eray, uint32 configValue)
Provides functionality to configure SUC configuration registers 1. More...
IFX_INLINE void | IfxEray_setMacroTickValue (Ifx_ERAY *eray, uint32 tickValue)
Provides functionality to configure MTCCV register. More...

Detailed Description

ERAY basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxEray.h.

Function Documentation

◆ IfxEray_configureSuc1Register()

IFX_INLINE void IfxEray_configureSuc1Register | ( | Ifx_ERAY * | eray,
 |  | uint32 | configValue
 | ) |  |

Provides functionality to configure SUC configuration registers 1.

Parameters
eray pointer to ERAY module registers.
configValue
Returns
None

Definition at line 2076 of file IfxEray.h.

◆ IfxEray_enableAllErrorInterrupts()

IFX_INLINE void IfxEray_enableAllErrorInterrupts ( Ifx_ERAY * eray )

Provides functionality to enable all the error iterrupts.

Parameters
eray pointer to ERAY module registers.
Returns
None

Definition at line 2044 of file IfxEray.h.

◆ IfxEray_enableExternalLoopback()

IFX_INLINE void IfxEray_enableExternalLoopback ( Ifx_ERAY * eray )

Provides functionality to enable the external loopback.

Parameters
eray pointer to ERAY module registers.
Returns
None

Definition at line 2063 of file IfxEray.h.

◆ IfxEray_enableInterruptLine()

IFX_INLINE void IfxEray_enableInterruptLine | ( | Ifx_ERAY * | eray,
 |  | IfxEray_InterruptLine | intLine
 | ) |  |

Provides functionality to enble the interrupt lines.

Parameters
eray | pointer to ERAY module registers.
intLine | interrupt line.
Returns
None

Definition at line 2025 of file IfxEray.h.

◆ IfxEray_enableTransmitInterrupt()

IFX_INLINE void IfxEray_enableTransmitInterrupt ( Ifx_ERAY * eray )

Provides functionality to enable the transmit interrupt.

Parameters
eray pointer to ERAY module registers.
Returns
None

Definition at line 2038 of file IfxEray.h.

◆ IfxEray_enableWriteTestRegister()

IFX_INLINE void IfxEray_enableWriteTestRegister ( Ifx_ERAY * eray )

Provides functionality to enable write to the test mode registers.

Parameters
eray pointer to ERAY module registers.
Returns
None

Definition at line 2057 of file IfxEray.h.

◆ IfxEray_getFifoIndex()

IFX_INLINE uint8 IfxEray_getFifoIndex ( Ifx_ERAY * eray )

Gets the FIFO index.

Parameters
eray pointer to ERAY module registers.
Returns
FIFO buffer index.

Definition at line 1344 of file IfxEray.h.

Referenced by IfxEray_Eray_receiveFifoFrame().

◆ IfxEray_initRxPinWithPadLevel()

IFX_INLINE void IfxEray_initRxPinWithPadLevel | ( | const IfxEray_Rxd_In * | rx,
 |  | IfxPort_InputMode | rxMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of pin direction as input and configuring pad driver.

Parameters
rx | the RX Pin which should be configured.
rxMode | the pin input mode which should be configured.
padDriver | Pad Driver Configuration
Returns
None

Definition at line 1978 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_init().

◆ IfxEray_isPocBusy()

IFX_INLINE boolean IfxEray_isPocBusy ( Ifx_ERAY * eray )

Provides functionality to check whether POC is busy or not.

Parameters
eray pointer to ERAY module registers.
Returns
status (TRUE / FALSE)

Definition at line 2019 of file IfxEray.h.

◆ IfxEray_isRamsCleared()

IFX_INLINE boolean IfxEray_isRamsCleared ( Ifx_ERAY * eray )

Provides functionality to find out that any CHI command is being executed or not.

Parameters
eray pointer to ERAY module registers.
Returns
status (TRUE / FALSE)

Definition at line 2013 of file IfxEray.h.

◆ IfxEray_selectRecieveInput()

IFX_INLINE void IfxEray_selectRecieveInput | ( | Ifx_ERAY * | eray,
 |  | IfxEray_NodeId | nodeId,
 |  | Ifx_RxSel | select
 | ) |  |

Provides functionality to select the receiver channel input.

Parameters
eray | pointer to ERAY module registers.
nodeId | ERAY node id.
select | receive channel.
Returns
None

Definition at line 1994 of file IfxEray.h.

◆ IfxEray_setMacroTickValue()

IFX_INLINE void IfxEray_setMacroTickValue | ( | Ifx_ERAY * | eray,
 |  | uint32 | tickValue
 | ) |  |

Provides functionality to configure MTCCV register.

Parameters
eray pointer to ERAY module registers.
tickValue
Returns
None

Definition at line 2082 of file IfxEray.h.

◆ IfxEray_setPocCommand()

IFX_INLINE void IfxEray_setPocCommand | ( | Ifx_ERAY * | eray,
 |  | IfxEray_PocCommand | cmd
 | ) |  |

Provides functionality to provide the command to change the transmit mode.

Parameters
eray | pointer to ERAY module registers.
cmd | POC command which triggers the Controller state.
Returns
None

Definition at line 2007 of file IfxEray.h.

◆ IfxEray_setSuspendMode()

IFX_INLINE void IfxEray_setSuspendMode | ( | Ifx_ERAY * | eray,
 |  | IfxEray_SuspendMode | mode
 | ) |  |

Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.

Parameters
eray | Pointer to ERAY module registers
mode | Module suspend mode
Returns
None

Definition at line 1902 of file IfxEray.h.

◆ IfxEray_unlockConfigurationKey()

IFX_INLINE void IfxEray_unlockConfigurationKey ( Ifx_ERAY * eray )

Provides functionality to unlock the test mode configuration.

Parameters
eray pointer to ERAY module registers.
Returns
None

Definition at line 2069 of file IfxEray.h.

◆ IfxEray_unlockTestModeKey()

IFX_INLINE void IfxEray_unlockTestModeKey ( Ifx_ERAY * eray )

Provides functionality to enable the test mode.

Parameters
eray pointer to ERAY module registers.
Returns
None

Definition at line 2050 of file IfxEray.h.


iLLD_TC38A: EVADC

Modules | Files
EVADC
iLLD
Collaboration diagram for EVADC:

Modules

Implementation
Standard Driver
EVADC Pin Mapping
How to use the EVADC ADC Interface driver?
Interface Driver

Files

file | IfxEvadc_cfg.h
EVADC on-chip implementation data.
file | IfxEvadc_PinMap.c
EVADC I/O map.
file | IfxEvadc_PinMap.h
EVADC I/O map.
file | IfxEvadc_Adc.h
EVADC ADC details.
file | IfxEvadc.h
EVADC basic functionality.

Detailed Description


iLLD_TC38A: Implementation

Implementation
iLLD » EVADC
Collaboration diagram for Implementation:


iLLD_TC38A: Standard Driver

Modules
Standard Driver
iLLD » EVADC
Collaboration diagram for Standard Driver:

Modules

Enumerations
Global Functions
Queue Request Functions
IO Pin Configuration Functions
Frequency Calculation
Group Functions
Module Functions
Channel Functions
Emux Functions
Fast Compare functions

Detailed Description


iLLD_TC38A: Enumerations

Enumerations
Enumerations
iLLD » EVADC » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxEvadc_AnalogConverterMode {
IfxEvadc_AnalogConverterMode_off = 0,
IfxEvadc_AnalogConverterMode_slowStandby = 1,
IfxEvadc_AnalogConverterMode_fastStandby = 2,
IfxEvadc_AnalogConverterMode_normalOperation = 3
}
Defined in MODULE_EVADC.G[x].ARBCFG.B.ANONS and ANONC. More...
enum IfxEvadc_ArbitrationRounds {
IfxEvadc_ArbitrationRounds_4_slots = 0,
IfxEvadc_ArbitrationRounds_8_slots = 1,
IfxEvadc_ArbitrationRounds_16_slots = 2,
IfxEvadc_ArbitrationRounds_20_slots = 3
}
Arbitration round length defined in MODULE_EVADC.G[x].ARBCFG.ARBRND(x=0,1,..,11) More...
enum IfxEvadc_BoundaryExtension {
IfxEvadc_BoundaryExtension_standard = 0,
IfxEvadc_BoundaryExtension_fastCompareResult1 = 1,
IfxEvadc_BoundaryExtension_fastCompareResult2 = 2,
IfxEvadc_BoundaryExtension_fastCompareResult3 = 3,
IfxEvadc_BoundaryExtension_fastCompareResult4 = 4,
IfxEvadc_BoundaryExtension_fastCompareResult5 = 5,
IfxEvadc_BoundaryExtension_fastCompareResult6 = 6,
IfxEvadc_BoundaryExtension_fastCompareResult7 = 7,
IfxEvadc_BoundaryExtension_fastCompareResult8 = 8,
IfxEvadc_BoundaryExtension_fastCompareResult9 = 9,
IfxEvadc_BoundaryExtension_fastCompareResult10 = 10,
IfxEvadc_BoundaryExtension_fastCompareResult11 = 11,
IfxEvadc_BoundaryExtension_fastCompareResult12 = 12,
IfxEvadc_BoundaryExtension_fastCompareResult13 = 13,
IfxEvadc_BoundaryExtension_fastCompareResult14 = 14,
IfxEvadc_BoundaryExtension_fastCompareResult15 = 15
}
Boundary Extension defined in MODULE_EVADC.G[x].CHCTR[y].B.BNDSELX(x=0,1,...,11;y=0,1....,16) More...
enum IfxEvadc_BoundarySelection {
IfxEvadc_BoundarySelection_group0 = 0,
IfxEvadc_BoundarySelection_group1 = 1,
IfxEvadc_BoundarySelection_global0 = 2,
IfxEvadc_BoundarySelection_global1 = 3
}
BoundarySel defined in MODULE_EVADC.G[x].CHCTR[y].B.BNDSELL(x=0,1,...,11;y=0,1....,16) More...
enum IfxEvadc_ChannelId {
IfxEvadc_ChannelId_none = -1,
IfxEvadc_ChannelId_0 = 0,
IfxEvadc_ChannelId_1 = 1,
IfxEvadc_ChannelId_2 = 2,
IfxEvadc_ChannelId_3 = 3,
IfxEvadc_ChannelId_4 = 4,
IfxEvadc_ChannelId_5 = 5,
IfxEvadc_ChannelId_6 = 6,
IfxEvadc_ChannelId_7 = 7,
IfxEvadc_ChannelId_8 = 8,
IfxEvadc_ChannelId_9 = 9,
IfxEvadc_ChannelId_10 = 10,
IfxEvadc_ChannelId_11 = 11,
IfxEvadc_ChannelId_12 = 12,
IfxEvadc_ChannelId_13 = 13,
IfxEvadc_ChannelId_14 = 14,
IfxEvadc_ChannelId_15 = 15
}
EVADC Channels. More...
enum IfxEvadc_ChannelReference {
IfxEvadc_ChannelReference_standard = 0,
IfxEvadc_ChannelReference_channel0 = 1
}
ADC channel reference defined in MODULE_EVADC.G[x].CHCTR[y].B.REFSEL(x=0,1,...,11;y=0,1....,16) More...
enum IfxEvadc_ChannelResult {
IfxEvadc_ChannelResult_0 = 0,
IfxEvadc_ChannelResult_1,
IfxEvadc_ChannelResult_2,
IfxEvadc_ChannelResult_3,
IfxEvadc_ChannelResult_4,
IfxEvadc_ChannelResult_5,
IfxEvadc_ChannelResult_6,
IfxEvadc_ChannelResult_7,
IfxEvadc_ChannelResult_8,
IfxEvadc_ChannelResult_9,
IfxEvadc_ChannelResult_10,
IfxEvadc_ChannelResult_11,
IfxEvadc_ChannelResult_12,
IfxEvadc_ChannelResult_13,
IfxEvadc_ChannelResult_14,
IfxEvadc_ChannelResult_15
}
Channel Result defined in MODULE_EVADC.G[x].CHCTR[y].B.RESREG(x=0,1,...,11;y=0,1....,16) More...
enum IfxEvadc_ChannelSelectionStyle {
IfxEvadc_ChannelSelectionStyle_channelNumber = 0,
IfxEvadc_ChannelSelectionStyle_binary = 1
}
External Multiplexer Channel Selection Style as defined in Ifx_EVADC.G[x].EMUXCTR.B.EMXCSS. More...
enum IfxEvadc_EmuxCodingScheme {
IfxEvadc_EmuxCodingScheme_binary = 0,
IfxEvadc_EmuxCodingScheme_gray = 1
}
Specifies the External Coding scheme(binary/gray) defined in Ifx_EVADC.G[x].EMUXCTR.B.EMXCOD. More...
enum IfxEvadc_EmuxInterface {
IfxEvadc_EmuxInterface_0 = 0,
IfxEvadc_EmuxInterface_1 = 1
}
Specifies the Emux interface. More...
enum IfxEvadc_EmuxSampleTimeControl {
IfxEvadc_EmuxSampleTimeControl_settingChanges = 0,
IfxEvadc_EmuxSampleTimeControl_always = 1
}
External Multiplexer sample time control defined in Ifx_EVADC.G[x].EMUXCTR.B.EMXST. More...
enum IfxEvadc_EmuxSelectValue {
IfxEvadc_EmuxSelectValue_0 = 0,
IfxEvadc_EmuxSelectValue_1,
IfxEvadc_EmuxSelectValue_2,
IfxEvadc_EmuxSelectValue_3,
IfxEvadc_EmuxSelectValue_4,
IfxEvadc_EmuxSelectValue_5,
IfxEvadc_EmuxSelectValue_6,
IfxEvadc_EmuxSelectValue_7
}
specifies the External Channel Start select value defined in Ifx_EVADC.G[x].EMUXCTR.B.EMUXSET More...
enum IfxEvadc_ExternalMultiplexerMode {
IfxEvadc_ExternalMultiplexerMode_softwareControl = 0,
IfxEvadc_ExternalMultiplexerMode_steady = 1,
IfxEvadc_ExternalMultiplexerMode_singleStep = 2,
IfxEvadc_ExternalMultiplexerMode_sequence = 3
}
Specifies External Multiplexer Mode define in Ifx_EVADC.G[x].EMUXCTR.B.EMUXMODE. More...
enum IfxEvadc_FifoMode {
IfxEvadc_FifoMode_seperateResultRegister = 0,
IfxEvadc_FifoMode_fifoStructure = 1,
IfxEvadc_FifoMode_maximumMode = 2,
IfxEvadc_FifoMode_minimumMode = 3
}
FIFO mode enable. More...
enum IfxEvadc_GatingMode {
IfxEvadc_GatingMode_disabled = 0,
IfxEvadc_GatingMode_always = 1,
IfxEvadc_GatingMode_gatingHigh = 2,
IfxEvadc_GatingMode_gatingLow = 3
}
gating mode defined in MODULE_EVADC.QMR0.ENGT More...
enum IfxEvadc_GatingSource {
IfxEvadc_GatingSource_0 = 0,
IfxEvadc_GatingSource_1,
IfxEvadc_GatingSource_2,
IfxEvadc_GatingSource_3,
IfxEvadc_GatingSource_4,
IfxEvadc_GatingSource_5,
IfxEvadc_GatingSource_6,
IfxEvadc_GatingSource_7,
IfxEvadc_GatingSource_8,
IfxEvadc_GatingSource_9,
IfxEvadc_GatingSource_10,
IfxEvadc_GatingSource_11,
IfxEvadc_GatingSource_12,
IfxEvadc_GatingSource_13,
IfxEvadc_GatingSource_14,
IfxEvadc_GatingSource_15
}
External trigger gating defined in MODULE_EVADC.G[x].QCTRLy.GTSEL(x=0,1,..,11;y=0,1,..,7) More...
enum IfxEvadc_InputClasses {
IfxEvadc_InputClasses_group0 = 0,
IfxEvadc_InputClasses_group1 = 1,
IfxEvadc_InputClasses_global0 = 2,
IfxEvadc_InputClasses_global1 = 3
}
inputClass defined in MODULE_EVADC.G[x].CHCTR[y].B.ICLSEL(x=0,1,...,11;y=0,1....,16) More...
enum IfxEvadc_LimitCheck {
IfxEvadc_LimitCheck_noCheck = 0,
IfxEvadc_LimitCheck_eventIfInArea = 1,
IfxEvadc_LimitCheck_eventIfOutsideArea = 2,
IfxEvadc_LimitCheck_always = 3
}
ADC channel limit check defined in MODULE_EVADC.G[x].CHCTR[y].B.CHEVMODE(x=0,1,...,11;y=0,1....,16) More...
enum IfxEvadc_Protection {
IfxEvadc_Protection_channelControl0 = 0,
IfxEvadc_Protection_channelControl1 = 1,
IfxEvadc_Protection_channelControl2 = 2,
IfxEvadc_Protection_channelControl3 = 3,
IfxEvadc_Protection_channelControl4 = 4,
IfxEvadc_Protection_channelControl5 = 5,
IfxEvadc_Protection_channelControl6 = 6,
IfxEvadc_Protection_channelControl7 = 7,
IfxEvadc_Protection_channelControl8 = 8,
IfxEvadc_Protection_channelControl9 = 9,
IfxEvadc_Protection_channelControl10 = 10,
IfxEvadc_Protection_channelControl11 = 11,
IfxEvadc_Protection_channelControl12 = 12,
IfxEvadc_Protection_channelControl13 = 13,
IfxEvadc_Protection_channelControl14 = 14,
IfxEvadc_Protection_initGroup0 = 16,
IfxEvadc_Protection_initGroup1 = 17,
IfxEvadc_Protection_initGroup2 = 18,
IfxEvadc_Protection_initGroup3 = 19,
IfxEvadc_Protection_initGroup4 = 20,
IfxEvadc_Protection_initGroup5 = 21,
IfxEvadc_Protection_initGroup6 = 22,
IfxEvadc_Protection_initGroup7 = 23,
IfxEvadc_Protection_initGroup8 = 24,
IfxEvadc_Protection_initGroup9 = 25,
IfxEvadc_Protection_initGroup10 = 26,
IfxEvadc_Protection_initGroup11 = 27,
IfxEvadc_Protection_initGroup12 = 28,
IfxEvadc_Protection_initGroup13 = 29,
IfxEvadc_Protection_initGroup14 = 30,
IfxEvadc_Protection_serviceGroup0 = 32,
IfxEvadc_Protection_serviceGroup1 = 33,
IfxEvadc_Protection_serviceGroup2 = 34,
IfxEvadc_Protection_serviceGroup3 = 35,
IfxEvadc_Protection_serviceGroup4 = 36,
IfxEvadc_Protection_serviceGroup5 = 37,
IfxEvadc_Protection_serviceGroup6 = 38,
IfxEvadc_Protection_serviceGroup7 = 39,
IfxEvadc_Protection_serviceGroup8 = 40,
IfxEvadc_Protection_serviceGroup9 = 41,
IfxEvadc_Protection_serviceGroup10 = 42,
IfxEvadc_Protection_serviceGroup11 = 43,
IfxEvadc_Protection_serviceGroup12 = 44,
IfxEvadc_Protection_serviceGroup13 = 45,
IfxEvadc_Protection_serviceGroup14 = 46,
IfxEvadc_Protection_resultRegisterGroup0 = 48,
IfxEvadc_Protection_resultRegisterGroup1 = 49,
IfxEvadc_Protection_resultRegisterGroup2 = 50,
IfxEvadc_Protection_resultRegisterGroup3 = 51,
IfxEvadc_Protection_resultRegisterGroup4 = 52,
IfxEvadc_Protection_resultRegisterGroup5 = 53,
IfxEvadc_Protection_resultRegisterGroup6 = 54,
IfxEvadc_Protection_resultRegisterGroup7 = 55,
IfxEvadc_Protection_resultRegisterGroup8 = 56,
IfxEvadc_Protection_resultRegisterGroup9 = 57,
IfxEvadc_Protection_resultRegisterGroup10 = 58,
IfxEvadc_Protection_resultRegisterGroup11 = 59,
IfxEvadc_Protection_resultRegisterGroup12 = 60,
IfxEvadc_Protection_resultRegisterGroup13 = 61,
IfxEvadc_Protection_resultRegisterGroup14 = 62,
IfxEvadc_Protection_initFastCompareChannel0 = 64,
IfxEvadc_Protection_initFastCompareChannel1 = 65,
IfxEvadc_Protection_initFastCompareChannel2 = 66,
IfxEvadc_Protection_initFastCompareChannel3 = 67,
IfxEvadc_Protection_initFastCompareChannel4 = 68,
IfxEvadc_Protection_initFastCompareChannel5 = 69,
IfxEvadc_Protection_initFastCompareChannel6 = 70,
IfxEvadc_Protection_initFastCompareChannel7 = 71,
IfxEvadc_Protection_globalConfig = 80,
IfxEvadc_Protection_externalMultiplexer = 81,
IfxEvadc_Protection_testFunction = 82
}
Access protection for Group registers defined in MODULE_EVADC.ACCPROT0.U. More...
enum IfxEvadc_RequestSlotPriority {
IfxEvadc_RequestSlotPriority_lowest = 0,
IfxEvadc_RequestSlotPriority_low = 1,
IfxEvadc_RequestSlotPriority_high = 2,
IfxEvadc_RequestSlotPriority_highest = 3
}
Arbitration priority, Group x,defined in MODULE_EVADC.G[x].ARBPR.PRIOy(x=0,1,...,11;y=0,1,2) More...
enum IfxEvadc_RequestSlotStartMode {
IfxEvadc_RequestSlotStartMode_waitForStart = 0,
IfxEvadc_RequestSlotStartMode_cancelInjectRepeat = 1
}
Request source start mode defined in MODULE_EVADC.G[x].ARBPR.CSMy(x=0,1,...,11;y=0,1,2) More...
enum IfxEvadc_RequestSource {
IfxEvadc_RequestSource_queue0 = 0,
IfxEvadc_RequestSource_queue1 = 1,
IfxEvadc_RequestSource_queue2 = 2
}
Request sources. More...
enum IfxEvadc_SleepMode {
IfxEvadc_SleepMode_enable = 0,
IfxEvadc_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_EVADC.CLC.B.EDIS. More...
enum IfxEvadc_SrcNr {
IfxEvadc_SrcNr_group0 = 0,
IfxEvadc_SrcNr_group1 = 1,
IfxEvadc_SrcNr_group2 = 2,
IfxEvadc_SrcNr_group3 = 3,
IfxEvadc_SrcNr_shared0 = 4,
IfxEvadc_SrcNr_shared1 = 5,
IfxEvadc_SrcNr_shared2 = 6,
IfxEvadc_SrcNr_shared3 = 7
}
Service Node defined in MODULE_EVADC.G[x].SRACT.U(x= 0,1,..,11) More...
enum IfxEvadc_Status {
IfxEvadc_Status_noError = 0,
IfxEvadc_Status_notInitialised = 1,
IfxEvadc_Status_invalidGroup = 2,
IfxEvadc_Status_invalidChannel = 3,
IfxEvadc_Status_queueFull = 4,
IfxEvadc_Status_noAccess = 5,
IfxEvadc_Status_channelsStillPending = 6
}
API return values defined in MODULE_EVADC.G[x].QSR0.U,MODULE_EVADC.G[x].QSR1.U,MODULE_EVADC.G[x].QSR2.U(x=0,1,...,11) More...
enum IfxEvadc_SuspendMode {
IfxEvadc_SuspendMode_none = 0,
IfxEvadc_SuspendMode_hard = 1,
IfxEvadc_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxEvadc_TriggerMode {
IfxEvadc_TriggerMode_noExternalTrigger = 0,
IfxEvadc_TriggerMode_uponFallingEdge = 1,
IfxEvadc_TriggerMode_uponRisingEdge = 2,
IfxEvadc_TriggerMode_uponAnyEdge = 3
}
trigger definition defined in MODULE_EVADC.G[x].QCTRL0.XTMODE(x=0,1,..,11) More...
enum IfxEvadc_TriggerSource {
IfxEvadc_TriggerSource_0 = 0,
IfxEvadc_TriggerSource_1,
IfxEvadc_TriggerSource_2,
IfxEvadc_TriggerSource_3,
IfxEvadc_TriggerSource_4,
IfxEvadc_TriggerSource_5,
IfxEvadc_TriggerSource_6,
IfxEvadc_TriggerSource_7,
IfxEvadc_TriggerSource_8,
IfxEvadc_TriggerSource_9,
IfxEvadc_TriggerSource_10,
IfxEvadc_TriggerSource_11,
IfxEvadc_TriggerSource_12,
IfxEvadc_TriggerSource_13,
IfxEvadc_TriggerSource_14,
IfxEvadc_TriggerSource_15
}
Trigger request source defined in MODULE_EVADC.G[x].QCTRLy.XTSEL(x=0,1,..,11;y=0,1,..,7) More...

Detailed Description

Enumeration Type Documentation

◆ IfxEvadc_AnalogConverterMode

enum IfxEvadc_AnalogConverterMode

Defined in MODULE_EVADC.G[x].ARBCFG.B.ANONS and ANONC.

Enumerator
IfxEvadc_AnalogConverterMode_off | Analog Converter off.
IfxEvadc_AnalogConverterMode_slowStandby | Slow Standby Mode.
IfxEvadc_AnalogConverterMode_fastStandby | Fast Standby Mode.
IfxEvadc_AnalogConverterMode_normalOperation | Normal operation mode.

Definition at line 86 of file IfxEvadc.h.

◆ IfxEvadc_ArbitrationRounds

enum IfxEvadc_ArbitrationRounds

Arbitration round length defined in MODULE_EVADC.G[x].ARBCFG.ARBRND(x=0,1,..,11)

Enumerator
IfxEvadc_ArbitrationRounds_4_slots | An arbitration round contains 4 arbitration slots.
IfxEvadc_ArbitrationRounds_8_slots | An arbitration round contains 8 arbitration slots.
IfxEvadc_ArbitrationRounds_16_slots | An arbitration round contains 16 arbitration slots.
IfxEvadc_ArbitrationRounds_20_slots | An arbitration round contains 20 arbitration slots.

Definition at line 96 of file IfxEvadc.h.

◆ IfxEvadc_BoundaryExtension

enum IfxEvadc_BoundaryExtension

Boundary Extension defined in MODULE_EVADC.G[x].CHCTR[y].B.BNDSELX(x=0,1,...,11;y=0,1....,16)

Enumerator
IfxEvadc_BoundaryExtension_standard | Boundary Standard mode. BNDSELU/BNDSELL as Boundaries.
IfxEvadc_BoundaryExtension_fastCompareResult1 | Fast compare mode use as upper boundary Channel result 1.
IfxEvadc_BoundaryExtension_fastCompareResult2 | Fast compare mode use as upper boundary Channel result 2.
IfxEvadc_BoundaryExtension_fastCompareResult3 | Fast compare mode use as upper boundary Channel result 3.
IfxEvadc_BoundaryExtension_fastCompareResult4 | Fast compare mode use as upper boundary Channel result 4.
IfxEvadc_BoundaryExtension_fastCompareResult5 | Fast compare mode use as upper boundary Channel result 5.
IfxEvadc_BoundaryExtension_fastCompareResult6 | Fast compare mode use as upper boundary Channel result 6.
IfxEvadc_BoundaryExtension_fastCompareResult7 | Fast compare mode use as upper boundary Channel result 7.
IfxEvadc_BoundaryExtension_fastCompareResult8 | Fast compare mode use as upper boundary Channel result 8.
IfxEvadc_BoundaryExtension_fastCompareResult9 | Fast compare mode use as upper boundary Channel result 9.
IfxEvadc_BoundaryExtension_fastCompareResult10 | Fast compare mode use as upper boundary Channel result 10.
IfxEvadc_BoundaryExtension_fastCompareResult11 | Fast compare mode use as upper boundary Channel result 11.
IfxEvadc_BoundaryExtension_fastCompareResult12 | Fast compare mode use as upper boundary Channel result 12.
IfxEvadc_BoundaryExtension_fastCompareResult13 | Fast compare mode use as upper boundary Channel result 13.
IfxEvadc_BoundaryExtension_fastCompareResult14 | Fast compare mode use as upper boundary Channel result 14.
IfxEvadc_BoundaryExtension_fastCompareResult15 | Fast compare mode use as upper boundary Channel result 15.

Definition at line 106 of file IfxEvadc.h.

◆ IfxEvadc_BoundarySelection

enum IfxEvadc_BoundarySelection

BoundarySel defined in MODULE_EVADC.G[x].CHCTR[y].B.BNDSELL(x=0,1,...,11;y=0,1....,16)

Enumerator
IfxEvadc_BoundarySelection_group0 | Use group class 0.
IfxEvadc_BoundarySelection_group1 | Use group class 1.
IfxEvadc_BoundarySelection_global0 | Use global class 0.
IfxEvadc_BoundarySelection_global1 | Use global class 1.

Definition at line 128 of file IfxEvadc.h.

◆ IfxEvadc_ChannelId

enum IfxEvadc_ChannelId

EVADC Channels.

Enumerator
IfxEvadc_ChannelId_none | None of EVADC channels.
IfxEvadc_ChannelId_0 | Channel 0.
IfxEvadc_ChannelId_1 | Channel 1.
IfxEvadc_ChannelId_2 | Channel 2.
IfxEvadc_ChannelId_3 | Channel 3.
IfxEvadc_ChannelId_4 | Channel 4.
IfxEvadc_ChannelId_5 | Channel 5.
IfxEvadc_ChannelId_6 | Channel 6.
IfxEvadc_ChannelId_7 | Channel 7.
IfxEvadc_ChannelId_8 | Channel 8.
IfxEvadc_ChannelId_9 | Channel 9.
IfxEvadc_ChannelId_10 | Channel 10.
IfxEvadc_ChannelId_11 | Channel 11.
IfxEvadc_ChannelId_12 | Channel 12.
IfxEvadc_ChannelId_13 | Channel 13.
IfxEvadc_ChannelId_14 | Channel 14.
IfxEvadc_ChannelId_15 | Channel 15.

Definition at line 138 of file IfxEvadc.h.

◆ IfxEvadc_ChannelReference

enum IfxEvadc_ChannelReference

ADC channel reference defined in MODULE_EVADC.G[x].CHCTR[y].B.REFSEL(x=0,1,...,11;y=0,1....,16)

Enumerator
IfxEvadc_ChannelReference_standard | use Varef as reference
IfxEvadc_ChannelReference_channel0 | use CH0 as reference

Definition at line 161 of file IfxEvadc.h.

◆ IfxEvadc_ChannelResult

enum IfxEvadc_ChannelResult

Channel Result defined in MODULE_EVADC.G[x].CHCTR[y].B.RESREG(x=0,1,...,11;y=0,1....,16)

Enumerator
IfxEvadc_ChannelResult_0 | Use Channel result 0.
IfxEvadc_ChannelResult_1 | Use Channel result 1.
IfxEvadc_ChannelResult_2 | Use Channel result 2.
IfxEvadc_ChannelResult_3 | Use Channel result 3.
IfxEvadc_ChannelResult_4 | Use Channel result 4.
IfxEvadc_ChannelResult_5 | Use Channel result 5.
IfxEvadc_ChannelResult_6 | Use Channel result 6.
IfxEvadc_ChannelResult_7 | Use Channel result 7.
IfxEvadc_ChannelResult_8 | Use Channel result 8.
IfxEvadc_ChannelResult_9 | Use Channel result 9.
IfxEvadc_ChannelResult_10 | Use Channel result 10.
IfxEvadc_ChannelResult_11 | Use Channel result 11.
IfxEvadc_ChannelResult_12 | Use Channel result 12.
IfxEvadc_ChannelResult_13 | Use Channel result 13.
IfxEvadc_ChannelResult_14 | Use Channel result 14.
IfxEvadc_ChannelResult_15 | Use Channel result 15.

Definition at line 169 of file IfxEvadc.h.

◆ IfxEvadc_ChannelSelectionStyle

enum IfxEvadc_ChannelSelectionStyle

External Multiplexer Channel Selection Style as defined in Ifx_EVADC.G[x].EMUXCTR.B.EMXCSS.

Enumerator
IfxEvadc_ChannelSelectionStyle_channelNumber | selects an arbitrary channel
IfxEvadc_ChannelSelectionStyle_binary | Each bit of bitfield EMUXCH selects the associated channel for EMUX control.

Definition at line 192 of file IfxEvadc.h.

◆ IfxEvadc_EmuxCodingScheme

enum IfxEvadc_EmuxCodingScheme

Specifies the External Coding scheme(binary/gray) defined in Ifx_EVADC.G[x].EMUXCTR.B.EMXCOD.

Enumerator
IfxEvadc_EmuxCodingScheme_binary | Output the Channel Number in Binary code.
IfxEvadc_EmuxCodingScheme_gray | Output the channel number in gray code.

Definition at line 202 of file IfxEvadc.h.

◆ IfxEvadc_EmuxInterface

enum IfxEvadc_EmuxInterface

Specifies the Emux interface.

Enumerator
IfxEvadc_EmuxInterface_0 | Emux Interface 0.
IfxEvadc_EmuxInterface_1 | Emux Interface 1.

Definition at line 210 of file IfxEvadc.h.

◆ IfxEvadc_EmuxSampleTimeControl

enum IfxEvadc_EmuxSampleTimeControl

External Multiplexer sample time control defined in Ifx_EVADC.G[x].EMUXCTR.B.EMXST.

Enumerator
IfxEvadc_EmuxSampleTimeControl_settingChanges | Use STCE Whenever Setting Changes.
IfxEvadc_EmuxSampleTimeControl_always | Use STCE for each conversion of an external channel.

Definition at line 219 of file IfxEvadc.h.

◆ IfxEvadc_EmuxSelectValue

enum IfxEvadc_EmuxSelectValue

specifies the External Channel Start select value defined in Ifx_EVADC.G[x].EMUXCTR.B.EMUXSET

Enumerator
IfxEvadc_EmuxSelectValue_0 | Start Selection Value 0.
IfxEvadc_EmuxSelectValue_1 | Start Selection Value 1.
IfxEvadc_EmuxSelectValue_2 | Start Selection Value 2.
IfxEvadc_EmuxSelectValue_3 | Start Selection Value 3.
IfxEvadc_EmuxSelectValue_4 | Start Selection Value 4.
IfxEvadc_EmuxSelectValue_5 | Start Selection Value 5.
IfxEvadc_EmuxSelectValue_6 | Start Selection Value 6.
IfxEvadc_EmuxSelectValue_7 | Start Selection Value 7.

Definition at line 228 of file IfxEvadc.h.

◆ IfxEvadc_ExternalMultiplexerMode

enum IfxEvadc_ExternalMultiplexerMode

Specifies External Multiplexer Mode define in Ifx_EVADC.G[x].EMUXCTR.B.EMUXMODE.

Enumerator
IfxEvadc_ExternalMultiplexerMode_softwareControl | Disable The Emux Control.
IfxEvadc_ExternalMultiplexerMode_steady | select steady mode
IfxEvadc_ExternalMultiplexerMode_singleStep | Select single step mode.
IfxEvadc_ExternalMultiplexerMode_sequence | Select Sequence Mode.

Definition at line 243 of file IfxEvadc.h.

◆ IfxEvadc_FifoMode

enum IfxEvadc_FifoMode

FIFO mode enable.

Enumerator
IfxEvadc_FifoMode_seperateResultRegister | seperate Result Register
IfxEvadc_FifoMode_fifoStructure | Part of FIFO structure: copy each new valid result.
IfxEvadc_FifoMode_maximumMode | copy new result if bigger
IfxEvadc_FifoMode_minimumMode | copy new result if it is smaller

Definition at line 253 of file IfxEvadc.h.

◆ IfxEvadc_GatingMode

enum IfxEvadc_GatingMode

gating mode defined in MODULE_EVADC.QMR0.ENGT

Enumerator
IfxEvadc_GatingMode_disabled | Gating is disabled, no conversion request are issued.
IfxEvadc_GatingMode_always | Conversion request is issued if at least 1 conversion pending bit is set.
IfxEvadc_GatingMode_gatingHigh | Conversion request is issued if at least 1 conversion pending bit is set and the gating signal is high.
IfxEvadc_GatingMode_gatingLow | Conversion request is issued if at least 1 conversion pending bit is set and the gating signal is low.

Definition at line 263 of file IfxEvadc.h.

◆ IfxEvadc_GatingSource

enum IfxEvadc_GatingSource

External trigger gating defined in MODULE_EVADC.G[x].QCTRLy.GTSEL(x=0,1,..,11;y=0,1,..,7)

Enumerator
IfxEvadc_GatingSource_0 | Input signal REQGTx_0.
IfxEvadc_GatingSource_1 | Input signal REQGTx_1.
IfxEvadc_GatingSource_2 | Input signal REQGTx_2.
IfxEvadc_GatingSource_3 | Input signal REQGTx_3.
IfxEvadc_GatingSource_4 | Input signal REQGTx_4.
IfxEvadc_GatingSource_5 | Input signal REQGTx_5.
IfxEvadc_GatingSource_6 | Input signal REQGTx_6.
IfxEvadc_GatingSource_7 | Input signal REQGTx_7.
IfxEvadc_GatingSource_8 | Input signal REQGTx_8.
IfxEvadc_GatingSource_9 | Input signal REQGTx_9.
IfxEvadc_GatingSource_10 | Input signal REQGTx_10.
IfxEvadc_GatingSource_11 | Input signal REQGTx_11.
IfxEvadc_GatingSource_12 | Input signal REQGTx_12.
IfxEvadc_GatingSource_13 | Input signal REQGTx_13.
IfxEvadc_GatingSource_14 | Input signal REQGTx_14.
IfxEvadc_GatingSource_15 | Input signal REQGTx_15.

Definition at line 273 of file IfxEvadc.h.

◆ IfxEvadc_InputClasses

enum IfxEvadc_InputClasses

inputClass defined in MODULE_EVADC.G[x].CHCTR[y].B.ICLSEL(x=0,1,...,11;y=0,1....,16)

Enumerator
IfxEvadc_InputClasses_group0 | Use group class 0.
IfxEvadc_InputClasses_group1 | Use group class 1.
IfxEvadc_InputClasses_global0 | Use global class 0.
IfxEvadc_InputClasses_global1 | Use global class 1.

Definition at line 295 of file IfxEvadc.h.

◆ IfxEvadc_LimitCheck

enum IfxEvadc_LimitCheck

ADC channel limit check defined in MODULE_EVADC.G[x].CHCTR[y].B.CHEVMODE(x=0,1,...,11;y=0,1....,16)

Enumerator
IfxEvadc_LimitCheck_noCheck | Normal compare mode Event Never Fast Compare mode Event Never.
IfxEvadc_LimitCheck_eventIfInArea | Normal compare mode Event If result is inside the boundary band Fast Compare mode Event If result switches to high (above comp. value)
IfxEvadc_LimitCheck_eventIfOutsideArea | Normal compare mode Event If result is outside the boundary band Fast Compare mode Event If result switches to low (below comp. value)
IfxEvadc_LimitCheck_always | Normal compare mode Event Always Fast Compare mode Event Always.

Definition at line 305 of file IfxEvadc.h.

◆ IfxEvadc_Protection

enum IfxEvadc_Protection

Access protection for Group registers defined in MODULE_EVADC.ACCPROT0.U.

Enumerator
IfxEvadc_Protection_channelControl0 | Access control for GxCHCTR0.
IfxEvadc_Protection_channelControl1 | Access control for GxCHCTR1.
IfxEvadc_Protection_channelControl2 | Access control for GxCHCTR2.
IfxEvadc_Protection_channelControl3 | Access control for GxCHCTR3.
IfxEvadc_Protection_channelControl4 | Access control for GxCHCTR4.
IfxEvadc_Protection_channelControl5 | Access control for GxCHCTR5.
IfxEvadc_Protection_channelControl6 | Access control for GxCHCTR6.
IfxEvadc_Protection_channelControl7 | Access control for GxCHCTR7.
IfxEvadc_Protection_channelControl8 | Access control for GxCHCTR8.
IfxEvadc_Protection_channelControl9 | Access control for GxCHCTR9.
IfxEvadc_Protection_channelControl10 | Access control for GxCHCTR10.
IfxEvadc_Protection_channelControl11 | Access control for GxCHCTR11.
IfxEvadc_Protection_channelControl12 | Access control for GxCHCTR12.
IfxEvadc_Protection_channelControl13 | Access control for GxCHCTR13.
IfxEvadc_Protection_channelControl14 | Access control for GxCHCTR14.
IfxEvadc_Protection_initGroup0 | Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
IfxEvadc_Protection_initGroup1 | Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
IfxEvadc_Protection_initGroup2 | Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
IfxEvadc_Protection_initGroup3 | Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
IfxEvadc_Protection_initGroup4 | Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
IfxEvadc_Protection_initGroup5 | Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
IfxEvadc_Protection_initGroup6 | Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
IfxEvadc_Protection_initGroup7 | Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
IfxEvadc_Protection_initGroup8 | Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
IfxEvadc_Protection_initGroup9 | Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
IfxEvadc_Protection_initGroup10 | Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
IfxEvadc_Protection_initGroup11 | Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
IfxEvadc_Protection_initGroup12 | Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
IfxEvadc_Protection_initGroup13 | Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
IfxEvadc_Protection_initGroup14 | Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
IfxEvadc_Protection_serviceGroup0 | Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
IfxEvadc_Protection_serviceGroup1 | Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
IfxEvadc_Protection_serviceGroup2 | Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
IfxEvadc_Protection_serviceGroup3 | Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
IfxEvadc_Protection_serviceGroup4 | Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
IfxEvadc_Protection_serviceGroup5 | Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
IfxEvadc_Protection_serviceGroup6 | Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
IfxEvadc_Protection_serviceGroup7 | Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
IfxEvadc_Protection_serviceGroup8 | Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
IfxEvadc_Protection_serviceGroup9 | Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
IfxEvadc_Protection_serviceGroup10 | Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
IfxEvadc_Protection_serviceGroup11 | Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
IfxEvadc_Protection_serviceGroup12 | Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
IfxEvadc_Protection_serviceGroup13 | Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
IfxEvadc_Protection_serviceGroup14 | Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
IfxEvadc_Protection_resultRegisterGroup0 | Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
IfxEvadc_Protection_resultRegisterGroup1 | Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
IfxEvadc_Protection_resultRegisterGroup2 | Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
IfxEvadc_Protection_resultRegisterGroup3 | Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
IfxEvadc_Protection_resultRegisterGroup4 | Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
IfxEvadc_Protection_resultRegisterGroup5 | Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
IfxEvadc_Protection_resultRegisterGroup6 | Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
IfxEvadc_Protection_resultRegisterGroup7 | Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
IfxEvadc_Protection_resultRegisterGroup8 | Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
IfxEvadc_Protection_resultRegisterGroup9 | Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
IfxEvadc_Protection_resultRegisterGroup10 | Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
IfxEvadc_Protection_resultRegisterGroup11 | Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
IfxEvadc_Protection_resultRegisterGroup12 | Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
IfxEvadc_Protection_resultRegisterGroup13 | Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
IfxEvadc_Protection_resultRegisterGroup14 | Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
IfxEvadc_Protection_initFastCompareChannel0 | Access control for GyFCBFL, GyFCHYST, GyFCCTR, GyFCM, GyFCRAMP.
IfxEvadc_Protection_initFastCompareChannel1 | Access control for GyFCBFL, GyFCHYST, GyFCCTR, GyFCM, GyFCRAMP.
IfxEvadc_Protection_initFastCompareChannel2 | Access control for GyFCBFL, GyFCHYST, GyFCCTR, GyFCM, GyFCRAMP.
IfxEvadc_Protection_initFastCompareChannel3 | Access control for GyFCBFL, GyFCHYST, GyFCCTR, GyFCM, GyFCRAMP.
IfxEvadc_Protection_initFastCompareChannel4 | Access control for GyFCBFL, GyFCHYST, GyFCCTR, GyFCM, GyFCRAMP.
IfxEvadc_Protection_initFastCompareChannel5 | Access control for GyFCBFL, GyFCHYST, GyFCCTR, GyFCM, GyFCRAMP.
IfxEvadc_Protection_initFastCompareChannel6 | Access control for GyFCBFL, GyFCHYST, GyFCCTR, GyFCM, GyFCRAMP.
IfxEvadc_Protection_initFastCompareChannel7 | Access control for GyFCBFL, GyFCHYST, GyFCCTR, GyFCM, GyFCRAMP.
IfxEvadc_Protection_globalConfig | Access control for GLOBCFG.
IfxEvadc_Protection_externalMultiplexer | Access control for EMUXSEL, GxEMUXCTR.
IfxEvadc_Protection_testFunction | Access control for GLOBTF.

Definition at line 315 of file IfxEvadc.h.

◆ IfxEvadc_RequestSlotPriority

enum IfxEvadc_RequestSlotPriority

Arbitration priority, Group x,defined in MODULE_EVADC.G[x].ARBPR.PRIOy(x=0,1,...,11;y=0,1,2)

Enumerator
IfxEvadc_RequestSlotPriority_lowest | Lowest priority.
IfxEvadc_RequestSlotPriority_low | Lowpriority.
IfxEvadc_RequestSlotPriority_high | High priority.
IfxEvadc_RequestSlotPriority_highest | Highest priority.

Definition at line 400 of file IfxEvadc.h.

◆ IfxEvadc_RequestSlotStartMode

enum IfxEvadc_RequestSlotStartMode

Request source start mode defined in MODULE_EVADC.G[x].ARBPR.CSMy(x=0,1,...,11;y=0,1,2)

Enumerator
IfxEvadc_RequestSlotStartMode_waitForStart | Wait for start.
IfxEvadc_RequestSlotStartMode_cancelInjectRepeat | Cancel-Inject-Repeat.

Definition at line 410 of file IfxEvadc.h.

◆ IfxEvadc_RequestSource

enum IfxEvadc_RequestSource

Request sources.

Enumerator
IfxEvadc_RequestSource_queue0 | 8 stage Queue0 request
IfxEvadc_RequestSource_queue1 | 8 stage Queue1 request
IfxEvadc_RequestSource_queue2 | 8 stage Queue2 request

Definition at line 418 of file IfxEvadc.h.

◆ IfxEvadc_SleepMode

enum IfxEvadc_SleepMode

Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_EVADC.CLC.B.EDIS.

Enumerator
IfxEvadc_SleepMode_enable | enables sleep mode
IfxEvadc_SleepMode_disable | disables sleep mode

Definition at line 428 of file IfxEvadc.h.

◆ IfxEvadc_SrcNr

enum IfxEvadc_SrcNr

Service Node defined in MODULE_EVADC.G[x].SRACT.U(x= 0,1,..,11)

Enumerator
IfxEvadc_SrcNr_group0 | service request line 0 of group
IfxEvadc_SrcNr_group1 | service request line 1 of group
IfxEvadc_SrcNr_group2 | service request line 2 of group
IfxEvadc_SrcNr_group3 | service request line 3 of group
IfxEvadc_SrcNr_shared0 | Select shared service request line 0.
IfxEvadc_SrcNr_shared1 | Select shared service request line 1.
IfxEvadc_SrcNr_shared2 | Select shared service request line 2.
IfxEvadc_SrcNr_shared3 | Select shared service request line 3.

Definition at line 436 of file IfxEvadc.h.

◆ IfxEvadc_Status

enum IfxEvadc_Status

API return values defined in MODULE_EVADC.G[x].QSR0.U,MODULE_EVADC.G[x].QSR1.U,MODULE_EVADC.G[x].QSR2.U(x=0,1,...,11)

Enumerator
IfxEvadc_Status_noError | No error during api execution.
IfxEvadc_Status_notInitialised | Appropriate initialisation not done.
IfxEvadc_Status_invalidGroup | Invalid group number.
IfxEvadc_Status_invalidChannel | Invalid channel number.
IfxEvadc_Status_queueFull | Queue is full.
IfxEvadc_Status_noAccess | Access to the group/channel is disabled.
IfxEvadc_Status_channelsStillPending | Conversion for some of the channels are still pending.

Definition at line 451 of file IfxEvadc.h.

◆ IfxEvadc_SuspendMode

enum IfxEvadc_SuspendMode

OCDS Suspend Control (OCDS.SUS)

Enumerator
IfxEvadc_SuspendMode_none | No suspend.
IfxEvadc_SuspendMode_hard | Hard Suspend.
IfxEvadc_SuspendMode_soft | Soft Suspend.

Definition at line 464 of file IfxEvadc.h.

◆ IfxEvadc_TriggerMode

enum IfxEvadc_TriggerMode

trigger definition defined in MODULE_EVADC.G[x].QCTRL0.XTMODE(x=0,1,..,11)

Enumerator
IfxEvadc_TriggerMode_noExternalTrigger | No external trigger.
IfxEvadc_TriggerMode_uponFallingEdge | Trigger event upon a falling edge.
IfxEvadc_TriggerMode_uponRisingEdge | Trigger event upon a rising edge.
IfxEvadc_TriggerMode_uponAnyEdge | Trigger event upon any edge.

Definition at line 473 of file IfxEvadc.h.

◆ IfxEvadc_TriggerSource

enum IfxEvadc_TriggerSource

Trigger request source defined in MODULE_EVADC.G[x].QCTRLy.XTSEL(x=0,1,..,11;y=0,1,..,7)

Enumerator
IfxEvadc_TriggerSource_0 | Input signal REQTRx_0.
IfxEvadc_TriggerSource_1 | Input signal REQTRx_1.
IfxEvadc_TriggerSource_2 | Input signal REQTRx_2.
IfxEvadc_TriggerSource_3 | Input signal REQTRx_3.
IfxEvadc_TriggerSource_4 | Input signal REQTRx_4.
IfxEvadc_TriggerSource_5 | Input signal REQTRx_5.
IfxEvadc_TriggerSource_6 | Input signal REQTRx_6.
IfxEvadc_TriggerSource_7 | Input signal REQTRx_7.
IfxEvadc_TriggerSource_8 | Input signal REQTRx_8.
IfxEvadc_TriggerSource_9 | Input signal REQTRx_9.
IfxEvadc_TriggerSource_10 | Input signal REQTRx_10.
IfxEvadc_TriggerSource_11 | Input signal REQTRx_11.
IfxEvadc_TriggerSource_12 | Input signal REQTRx_12.
IfxEvadc_TriggerSource_13 | Input signal REQTRx_13.
IfxEvadc_TriggerSource_14 | Input signal REQTRx_14.
IfxEvadc_TriggerSource_15 | Input signal REQTRx_15.

Definition at line 483 of file IfxEvadc.h.


iLLD_TC38A: Global Functions

Functions
Global Functions
iLLD » EVADC » Standard Driver
Collaboration diagram for Global Functions:

Functions

IFX_INLINE void | IfxEvadc_configureWaitForReadMode (Ifx_EVADC_G *group, uint32 resultIdx, boolean enabled)
access function to enable/disable wait for read mode for result registers More...
IFX_INLINE void | IfxEvadc_configureWaitForReadModeForGlobalResultRegister (Ifx_EVADC *evadc, boolean enabled)
access function to enable/disable wait for read mode for global result register More...
IFX_INLINE IfxEvadc_ChannelNoiseReduction | IfxEvadc_getGlobalConversionMode (Ifx_EVADC *evadc, uint8 inputClassNum)
get the ADC Module noise reduction level More...
IFX_INLINE Ifx_EVADC_GLOB_RES | IfxEvadc_getGlobalResult (Ifx_EVADC *evadc)
return conversion result stored in the Global result Register More...
IFX_INLINE float32 | IfxEvadc_getGlobalSampleTime (Ifx_EVADC *evadc, uint8 inputClassNum, float32 analogFrequency)
Get Sample Time in sec. More...
IFX_INLINE Ifx_EVADC_G_RES | IfxEvadc_getResult (Ifx_EVADC_G *group, uint32 resultIdx)
Get conversion result (Function does not care about the alignment) value = raw * gain + offset. More...
IFX_INLINE void | IfxEvadc_setGlobalSampleTime (Ifx_EVADC *evadc, uint8 groupInputClassNum, float32 analogFrequency, float32 sampleTime)
Sets the sample time in sec of ADC global class. More...
IFX_EXTERN Ifx_EVADC_G_RES | IfxEvadc_getResultBasedOnRequestSource (Ifx_EVADC *evadc, Ifx_EVADC_G *group, IfxEvadc_ChannelId channel, IfxEvadc_RequestSource sourceType)
Get conversion result (Function does not care about the alignment) value = raw * gain + offset. More...

Detailed Description

Function Documentation

◆ IfxEvadc_configureWaitForReadMode()

IFX_INLINE void IfxEvadc_configureWaitForReadMode | ( | Ifx_EVADC_G * | group,
 |  | uint32 | resultIdx,
 |  | boolean | enabled
 | ) |  |

access function to enable/disable wait for read mode for result registers

Parameters
group | pointer to the EVADC group
resultIdx | result register index
enabled | wait for read mode enabled/disabled
Returns
None

Definition at line 2255 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_configureWaitForReadMode().

◆ IfxEvadc_configureWaitForReadModeForGlobalResultRegister()

IFX_INLINE void IfxEvadc_configureWaitForReadModeForGlobalResultRegister | ( | Ifx_EVADC * | evadc,
 |  | boolean | enabled
 | ) |  |

access function to enable/disable wait for read mode for global result register

Parameters
evadc | pointer to the EVADC
enabled | wait for read mode enabled/disabled
Returns
None

Definition at line 2261 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_configureWaitForReadModeForGlobalResultRegister().

◆ IfxEvadc_getGlobalConversionMode()

IFX_INLINE IfxEvadc_ChannelNoiseReduction IfxEvadc_getGlobalConversionMode | ( | Ifx_EVADC * | evadc,
 |  | uint8 | inputClassNum
 | ) |  |

get the ADC Module noise reduction level

Parameters
evadc | pointer to EVADC
inputClassNum | Adc Module input Class number
Returns
Adc input class noise reduction level

Definition at line 2511 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_getModuleConfig().

◆ IfxEvadc_getGlobalResult()

IFX_INLINE Ifx_EVADC_GLOB_RES IfxEvadc_getGlobalResult ( Ifx_EVADC * evadc )

return conversion result stored in the Global result Register

Parameters
evadc pointer to the EVADC module
Returns
global result register
Ifx_EVADC* evadc = &MODULE_EVADC; // module pointer
IfxEvadc_GroupId groupId = IfxEvadc_GroupId0; // for group 0
uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
//confiure wait for read mode for global result register
IfxEvadc_configureWaitForReadModeForGlobalResultRegister(evadc, TRUE);
// enable all arbiter request sources
adcGroupConfig.arbiter.requestSlotQueue0Enabled = TRUE; // enable Queue0 mode
// enable all gates in "always" mode (no edge detection)
adcGroupConfig.queueRequest[0].triggerConfig.gatingMode = IfxEvadc_GatingMode_always;
// Add channel to queue with refill enabled
IfxEvadc_Adc_addToQueue(&adcChannel, IFXEVADC_QUEUE_REFILL, IfxEvadc_RequestSource_queue0);
// start the Queue
IfxEvadc_Adc_startQueue(&adcGroup, IfxEvadc_RequestSource_queue0);
Ifx_EVADC_GLOB.RES result;
result = IfxVadc_getGlobalResult (evadc);

Definition at line 2517 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_getGlobalResult().

◆ IfxEvadc_getGlobalSampleTime()

IFX_INLINE float32 IfxEvadc_getGlobalSampleTime | ( | Ifx_EVADC * | evadc,
 |  | uint8 | inputClassNum,
 |  | float32 | analogFrequency
 | ) |  |

Get Sample Time in sec.

Parameters
evadc | Pointer to EVADC Module
inputClassNum | ADC Input Class Number
analogFrequency | ADC module analog frequency in Hz
Returns
ADC input class channel sample time in sec.

Definition at line 2527 of file IfxEvadc.h.

◆ IfxEvadc_getResult()

IFX_INLINE Ifx_EVADC_G_RES IfxEvadc_getResult | ( | Ifx_EVADC_G * | group,
 |  | uint32 | resultIdx
 | ) |  |

Get conversion result (Function does not care about the alignment) value = raw * gain + offset.

Parameters
group | pointer to the EVADC group
resultIdx | result register index
Returns
scaled Conversion result
Ifx_EVADC_G* group = &MODULE_EVADC.G[0]; // for group 0
uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
//confiure wait for read mode for global result register
IfxEvadc_configureWaitForReadMode(group,IfxEvadc_ChannelResult0, TRUE);
IfxEvadc_configureWaitForReadMode(group,IfxEvadc_ChannelResult1, TRUE);
// Add channel to queue with refill enabled
IfxEvadc_Adc_addToQueue(&adcChannel, IfxEvadc_RequestSource_queue0, IFXEVADC_QUEUE_REFILL);
// start the Queue
IfxEvadc_Adc_startQueue(&adcGroup, IfxEvadc_RequestSource_queue0);
// wait for conversion to finish
// fetch the result of conversion from result register 0 for group 0
Ifx_EVADC_G_RES result;
result = IfxEvadc_getResult(group, IfxEvadc_ChannelResult0);

Definition at line 2578 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_getResult().

◆ IfxEvadc_getResultBasedOnRequestSource()

IFX_EXTERN Ifx_EVADC_G_RES IfxEvadc_getResultBasedOnRequestSource | ( | Ifx_EVADC * | evadc,
 |  | Ifx_EVADC_G * | group,
 |  | IfxEvadc_ChannelId | channel,
 |  | IfxEvadc_RequestSource | sourceType
 | ) |  |

Get conversion result (Function does not care about the alignment) value = raw * gain + offset.

Parameters
evadc | EVADC module pointer
group | pointer to the EVADC group
channel | channel Id
sourceType | type of request source
Returns
scaled Conversion result
Ifx_EVADC evadc;
evadc.evadc = &MODULE_EVADC;
Ifx_EVADC_G* group = &MODULE_EVADC.G[0]; // for group 0
uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
//confiure wait for read mode for global result register
IfxEvadc_configureWaitForReadMode(group,IfxEvadc_ChannelResult0, TRUE);
IfxEvadc_configureWaitForReadMode(group,IfxEvadc_ChannelResult1, TRUE);
// Add channel to queue with refill enabled
IfxEvadc_Adc_addToQueue(&adcChannel, IfxEvadc_RequestSource_queue0, IFXEVADC_QUEUE_REFILL);
// start the Queue
IfxEvadc_Adc_startQueue(&adcGroup, IfxEvadc_RequestSource_queue0);
// fetch the result of conversion for channel 2 of group 0
Ifx_EVADC_G_RESresult2;
result = IfxEvadc_getResultBasedOnRequestSource(&evadc, group, IfxVadc_ChannelId2,IfxEvadc_RequestSource_queue0 );
Ifx_EVADC_G_RESresult5;
result = IfxEvadc_getResultBasedOnRequestSource(&evadc, group, IfxEvadc_ChannelId5,IfxEvadc_RequestSource_queue0 );

Definition at line 372 of file IfxEvadc.c.

Referenced by IfxEvadc_Adc_getResultBasedOnRequestSource().

◆ IfxEvadc_setGlobalSampleTime()

IFX_INLINE void IfxEvadc_setGlobalSampleTime | ( | Ifx_EVADC * | evadc,
 |  | uint8 | groupInputClassNum,
 |  | float32 | analogFrequency,
 |  | float32 | sampleTime
 | ) |  |

Sets the sample time in sec of ADC global class.

Parameters
evadc | pointer to EVADC module registers.
groupInputClassNum | group input class number.
analogFrequency | ADC analog frequency in Hz.
sampleTime | the requested sample time in sec for input class.
Returns
None

Definition at line 3035 of file IfxEvadc.h.


iLLD_TC38A: Queue Request Functions

Functions
Queue Request Functions
iLLD » EVADC » Standard Driver
Collaboration diagram for Queue Request Functions:

Functions

IFX_INLINE void | IfxEvadc_clearQueue (Ifx_EVADC_G *evadcG, boolean flushQueue, IfxEvadc_RequestSource sourceType)
Clears all the queue entries including backup stage. More...
IFX_INLINE void | IfxEvadc_startQueue (Ifx_EVADC_G *group, IfxEvadc_RequestSource sourceType)
Starts a queue of a group by generating a trigger event through software. More...
IFX_EXTERN void | IfxEvadc_addToQueue (Ifx_EVADC_G *group, IfxEvadc_ChannelId channel, IfxEvadc_RequestSource sourceType, uint32 options)
Add an entry to the queue of a group for the specified channel with the following options set: refill incase of aborted conversion source interrupt enable/disable external trigger control of the aborted conversion. More...
IFX_EXTERN void | IfxEvadc_disableQueueSlotExternalTrigger (Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Disables the external trigger. More...
IFX_EXTERN void | IfxEvadc_enableQueueSlotExternalTrigger (Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Enables the external trigger. More...
IFX_EXTERN IfxEvadc_GatingMode | IfxEvadc_getQueueSlotGatingMode (Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Gets the requested queue slot gating mode. More...
IFX_EXTERN IfxEvadc_GatingSource | IfxEvadc_getQueueSlotGatingSource (Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Gets the requested queue slot gating input. More...
IFX_EXTERN IfxEvadc_RequestSlotPriority | IfxEvadc_getQueueSlotPriority (Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Gets the request queue slot priority. More...
IFX_EXTERN IfxEvadc_RequestSlotStartMode | IfxEvadc_getQueueSlotStartMode (Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Gets the requested queue slot start mode. More...
IFX_EXTERN IfxEvadc_TriggerSource | IfxEvadc_getQueueSlotTriggerInput (Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Gets the requested queue slot trigger input. More...
IFX_EXTERN IfxEvadc_TriggerMode | IfxEvadc_getQueueSlotTriggerMode (Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Gets the requested queue slot trigger mode. More...
IFX_EXTERN IfxEvadc_Status | IfxEvadc_getQueueStatus (Ifx_EVADC_G *group, IfxEvadc_RequestSource sourceType)
Gives the status of the Queue of a group by returning non zero value if the Queue is full. More...
IFX_EXTERN boolean | IfxEvadc_isRequestQueueSlotEnabled (Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Returns the queue slot requested status. More...
IFX_EXTERN void | IfxEvadc_setQueueSlotGatingConfig (Ifx_EVADC_G *evadcG, IfxEvadc_GatingSource gatingSource, IfxEvadc_GatingMode gatingMode, IfxEvadc_RequestSource sourceType)
Sets the gating configurations. More...
IFX_EXTERN void | IfxEvadc_setQueueSlotTriggerOperatingConfig (Ifx_EVADC_G *evadcG, IfxEvadc_TriggerMode triggerMode, IfxEvadc_TriggerSource triggerSource, IfxEvadc_RequestSource sourceType)
Sets the trigger operating configurations. More...

Detailed Description

Function Documentation

◆ IfxEvadc_addToQueue()

IFX_EXTERN void IfxEvadc_addToQueue | ( | Ifx_EVADC_G * | group,
 |  | IfxEvadc_ChannelId | channel,
 |  | IfxEvadc_RequestSource | sourceType,
 |  | uint32 | options
 | ) |  |

Add an entry to the queue of a group for the specified channel with the following options set: refill incase of aborted conversion source interrupt enable/disable external trigger control of the aborted conversion.

Parameters
group | pointer to the EVADC group
channel | specifies channel Id
sourceType | Request source Type(Queue 0,Queue 1,Queue 2)
options | specifies the refill, source interrupt enable/disable and external trigger control selection
Returns
None

For coding example see: IfxEvadc_Adc_getResult

Definition at line 52 of file IfxEvadc.c.

Referenced by IfxEvadc_Adc_addToQueue().

◆ IfxEvadc_clearQueue()

IFX_INLINE void IfxEvadc_clearQueue | ( | Ifx_EVADC_G * | evadcG,
 |  | boolean | flushQueue,
 |  | IfxEvadc_RequestSource | sourceType
 | ) |  |

Clears all the queue entries including backup stage.

Parameters
evadcG | pointer to EVADC group registers.
flushQueue | Whether queue is cleared or not.
sourceType | Request source Type(Queue 0,Queue 1,Queue 2)
Returns
None

Definition at line 2238 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_clearQueue(), and IfxEvadc_Adc_initGroup().

◆ IfxEvadc_disableQueueSlotExternalTrigger()

IFX_EXTERN void IfxEvadc_disableQueueSlotExternalTrigger | ( | Ifx_EVADC_G * | evadcG,
 |  | IfxEvadc_RequestSource | sourceType
 | ) |  |

Disables the external trigger.

Parameters
evadcG | pointer to EVADC group registers.
sourceType | Request source Type(Queue 0,Queue 1,Queue 2)
Returns
None

Definition at line 113 of file IfxEvadc.c.

Referenced by IfxEvadc_Adc_initGroup().

◆ IfxEvadc_enableQueueSlotExternalTrigger()

IFX_EXTERN void IfxEvadc_enableQueueSlotExternalTrigger | ( | Ifx_EVADC_G * | evadcG,
 |  | IfxEvadc_RequestSource | sourceType
 | ) |  |

Enables the external trigger.

Parameters
evadcG | pointer to EVADC group registers.
sourceType | Request source Type(Queue 0,Queue 1,Queue 2)
Returns
None

Definition at line 152 of file IfxEvadc.c.

Referenced by IfxEvadc_Adc_initGroup().

◆ IfxEvadc_getQueueSlotGatingMode()

IFX_EXTERN IfxEvadc_GatingMode IfxEvadc_getQueueSlotGatingMode | ( | Ifx_EVADC_G * | evadcG,
 |  | IfxEvadc_RequestSource | sourceType
 | ) |  |

Gets the requested queue slot gating mode.

Parameters
evadcG | pointer to EVADC group registers.
sourceType | Request source Type(Queue 0,Queue 1,Queue 2)
Returns
requested queue0 slot gating mode.

Definition at line 192 of file IfxEvadc.c.

Referenced by IfxEvadc_Adc_getGroupConfig().

◆ IfxEvadc_getQueueSlotGatingSource()

IFX_EXTERN IfxEvadc_GatingSource IfxEvadc_getQueueSlotGatingSource | ( | Ifx_EVADC_G * | evadcG,
 |  | IfxEvadc_RequestSource | sourceType
 | ) |  |

Gets the requested queue slot gating input.

Parameters
evadcG | pointer to EVADC group registers.
sourceType | Request source Type(Queue 0,Queue 1,Queue 2)
Returns
requested queue0 slot gating input.

Definition at line 214 of file IfxEvadc.c.

Referenced by IfxEvadc_Adc_getGroupConfig().

◆ IfxEvadc_getQueueSlotPriority()

IFX_EXTERN IfxEvadc_RequestSlotPriority IfxEvadc_getQueueSlotPriority | ( | Ifx_EVADC_G * | evadcG,
 |  | IfxEvadc_RequestSource | sourceType
 | ) |  |

Gets the request queue slot priority.

Parameters
evadcG | pointer to EVADC group registers.
sourceType | Request source Type(Queue 0,Queue 1,Queue 2)
Returns
requested queue0 slot priority.

Definition at line 235 of file IfxEvadc.c.

Referenced by IfxEvadc_Adc_getGroupConfig().

◆ IfxEvadc_getQueueSlotStartMode()

IFX_EXTERN IfxEvadc_RequestSlotStartMode IfxEvadc_getQueueSlotStartMode | ( | Ifx_EVADC_G * | evadcG,
 |  | IfxEvadc_RequestSource | sourceType
 | ) |  |

Gets the requested queue slot start mode.

Parameters
evadcG | pointer to EVADC group registers.
sourceType | Request source Type(Queue 0,Queue 1,Queue 2)
Returns
requested queue slot start mode.

Definition at line 256 of file IfxEvadc.c.

Referenced by IfxEvadc_Adc_getGroupConfig().

◆ IfxEvadc_getQueueSlotTriggerInput()

IFX_EXTERN IfxEvadc_TriggerSource IfxEvadc_getQueueSlotTriggerInput | ( | Ifx_EVADC_G * | evadcG,
 |  | IfxEvadc_RequestSource | sourceType
 | ) |  |

Gets the requested queue slot trigger input.

Parameters
evadcG | pointer to EVADC group registers.
sourceType | Request source Type(Queue 0,Queue 1,Queue 2)
Returns
requested queue slot trigger input.

Definition at line 277 of file IfxEvadc.c.

Referenced by IfxEvadc_Adc_getGroupConfig().

◆ IfxEvadc_getQueueSlotTriggerMode()

IFX_EXTERN IfxEvadc_TriggerMode IfxEvadc_getQueueSlotTriggerMode | ( | Ifx_EVADC_G * | evadcG,
 |  | IfxEvadc_RequestSource | sourceType
 | ) |  |

Gets the requested queue slot trigger mode.

Parameters
evadcG | pointer to EVADC group registers.
sourceType | Request source Type(Queue 0,Queue 1,Queue 2)
Returns
requested queue slot trigger mode.

Definition at line 299 of file IfxEvadc.c.

Referenced by IfxEvadc_Adc_getGroupConfig().

◆ IfxEvadc_getQueueStatus()

IFX_EXTERN IfxEvadc_Status IfxEvadc_getQueueStatus | ( | Ifx_EVADC_G * | group,
 |  | IfxEvadc_RequestSource | sourceType
 | ) |  |

Gives the status of the Queue of a group by returning non zero value if the Queue is full.

Parameters
group | pointer to the EVADC group
sourceType | sourceType Request source Type(Queue 0,Queue 1,Queue 2)
Returns
status of the Queue
Ifx_EVADC_G* group = &MODULE_EVADC.G[0]; // for group 0
boolean queueFull = (IfxEvadc_getQueueStatus(group)==IfxEvadc_Status_queueFull)?TRUE:FALSE; // get Queue status for group 0

Definition at line 321 of file IfxEvadc.c.

Referenced by IfxEvadc_Adc_getQueueStatus().

◆ IfxEvadc_isRequestQueueSlotEnabled()

IFX_EXTERN boolean IfxEvadc_isRequestQueueSlotEnabled | ( | Ifx_EVADC_G * | evadcG,
 |  | IfxEvadc_RequestSource | sourceType
 | ) |  |

Returns the queue slot requested status.

Parameters
evadcG | pointer to EVADC group registers.
sourceType | Request source Type(Queue 0,Queue 1,Queue 2)
Returns
TRUE if queue slot request enabled otherwise FALSE.

Definition at line 461 of file IfxEvadc.c.

Referenced by IfxEvadc_Adc_getGroupConfig().

◆ IfxEvadc_setQueueSlotGatingConfig()

IFX_EXTERN void IfxEvadc_setQueueSlotGatingConfig | ( | Ifx_EVADC_G * | evadcG,
 |  | IfxEvadc_GatingSource | gatingSource,
 |  | IfxEvadc_GatingMode | gatingMode,
 |  | IfxEvadc_RequestSource | sourceType
 | ) |  |

Sets the gating configurations.

Parameters
evadcG | pointer to EVADC group registers.
gatingSource | gate input for group.
gatingMode | gating mode. High level, Low Level or Gating disabled.
sourceType | Request source Type(Queue 0,Queue 1,Queue 2)
Returns
None

Definition at line 528 of file IfxEvadc.c.

Referenced by IfxEvadc_Adc_initGroup().

◆ IfxEvadc_setQueueSlotTriggerOperatingConfig()

IFX_EXTERN void IfxEvadc_setQueueSlotTriggerOperatingConfig | ( | Ifx_EVADC_G * | evadcG,
 |  | IfxEvadc_TriggerMode | triggerMode,
 |  | IfxEvadc_TriggerSource | triggerSource,
 |  | IfxEvadc_RequestSource | sourceType
 | ) |  |

Sets the trigger operating configurations.

Parameters
evadcG | pointer to EVADC group registers.
triggerMode | trigger mode. Rising, falling any edge leads to an trigger event.
triggerSource | trigger input for group.
sourceType | Request source Type(Queue 0,Queue 1,Queue 2)
Returns
None

Definition at line 564 of file IfxEvadc.c.

Referenced by IfxEvadc_Adc_initGroup().

◆ IfxEvadc_startQueue()

IFX_INLINE void IfxEvadc_startQueue | ( | Ifx_EVADC_G * | group,
 |  | IfxEvadc_RequestSource | sourceType
 | ) |  |

Starts a queue of a group by generating a trigger event through software.

Parameters
group | pointer to the EVADC group
sourceType | Request source Type(Queue 0,Queue 1,Queue 2)
Returns
None

Definition at line 3148 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_startQueue().


iLLD_TC38A: IO Pin Configuration Functions

Functions
IO Pin Configuration Functions
iLLD » EVADC » Standard Driver
Collaboration diagram for IO Pin Configuration Functions:

Functions

IFX_INLINE void | IfxEvadc_initEmuxPin (const IfxEvadc_Emux_Out *emux, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a EMUX output. More...
IFX_INLINE void | IfxEvadc_initGxBflPin (const IfxEvadc_GxBfl_Out *gxBfl, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a GxBFL output. More...

Detailed Description

Function Documentation

◆ IfxEvadc_initEmuxPin()

IFX_INLINE void IfxEvadc_initEmuxPin | ( | const IfxEvadc_Emux_Out * | emux,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a EMUX output.

Parameters
emux | the Emux Pin which should be configured
outputMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 2628 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_initExternalMultiplexerMode().

◆ IfxEvadc_initGxBflPin()

IFX_INLINE void IfxEvadc_initGxBflPin | ( | const IfxEvadc_GxBfl_Out * | gxBfl,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a GxBFL output.

Parameters
gxBfl | the GxBFL Pin which should be configured
outputMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 2635 of file IfxEvadc.h.


iLLD_TC38A: Frequency Calculation

Functions
Frequency Calculation
iLLD » EVADC » Standard Driver
Collaboration diagram for Frequency Calculation:

Functions

IFX_INLINE uint32 | IfxEvadc_calculateSampleTime (float32 analogFrequency, float32 sampleTime)
Calculate the time using analog frequency. More...
IFX_INLINE float32 | IfxEvadc_getAdcAnalogFrequency (Ifx_EVADC_G *group)
Returns the configured Fadci EVADC analog clock frequency in Hz. More...
IFX_EXTERN float32 | IfxEvadc_getAdcDigitalFrequency (Ifx_EVADC *evadc)
configured Fadcd EVADC digital clock frequency in Hz. More...

Detailed Description

Function Documentation

◆ IfxEvadc_calculateSampleTime()

IFX_INLINE uint32 IfxEvadc_calculateSampleTime | ( | float32 | analogFrequency,
 |  | float32 | sampleTime
 | ) |  |

Calculate the time using analog frequency.

Parameters
analogFrequency | analog frequency in Hz.
sampleTime | sample time in sec.
Returns
sample time in sec.

Definition at line 2202 of file IfxEvadc.h.

Referenced by IfxEvadc_setEmuxGlobalSampleTime(), IfxEvadc_setEmuxGroupSampletime(), IfxEvadc_setGlobalSampleTime(), IfxEvadc_setGroupSampleTime(), and IfxEvadc_setGroupSampleTimeEMUX().

◆ IfxEvadc_getAdcAnalogFrequency()

IFX_INLINE float32 IfxEvadc_getAdcAnalogFrequency ( Ifx_EVADC_G * group )

Returns the configured Fadci EVADC analog clock frequency in Hz.

Parameters
group pointer to the EVADC registers group
Returns
the configured Fadci EVADC analog clock frequency in Hz.

Definition at line 2356 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_getGroupConfig(), and IfxEvadc_Adc_initGroup().

◆ IfxEvadc_getAdcDigitalFrequency()

IFX_EXTERN float32 IfxEvadc_getAdcDigitalFrequency ( Ifx_EVADC * evadc )

configured Fadcd EVADC digital clock frequency in Hz.

Parameters
evadc pointer to the base of EVADC registers
Returns
the configured Fadcd EVADC digital clock frequency in Hz.

Definition at line 170 of file IfxEvadc.c.


iLLD_TC38A: Group Functions

Functions
Group Functions
iLLD » EVADC » Standard Driver
Collaboration diagram for Group Functions:

Functions

IFX_INLINE void | IfxEvadc_setAnalogClockSynchronizationDelay (Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group, IfxEvadc_AnalogClockSynchronizationDelay delay)
IFX_INLINE void | IfxEvadc_setCalibrationSampleTime (Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group, IfxEvadc_CalibrationSampleTimeControl mode)
Select calibration sample time in units of t_ADC. More...
IFX_INLINE void | IfxEvadc_clearAllResultRequests (Ifx_EVADC_G *evadcG)
Clears the all group requests. More...
IFX_INLINE IfxEvadc_ChannelNoiseReduction | IfxEvadc_getGroupConversionMode (Ifx_EVADC_G *evadcG, uint8 inputClassNum)
Gets the EVADC input class channel conversion mode. More...
IFX_INLINE void | IfxEvadc_getGroupResult (Ifx_EVADC_G *group, Ifx_EVADC_G_RES *results, uint32 resultOffset, uint32 numResults)
Get conversion result for the group. More...
IFX_INLINE float32 | IfxEvadc_getGroupSampleTime (Ifx_EVADC_G *evadcG, uint8 inputClassNum, float32 analogFrequency)
Gets the EVADC input class channel sample time. More...
IFX_INLINE uint8 | IfxEvadc_getMasterIndex (Ifx_EVADC_G *evadcG)
Gets the configured master index. More...
IFX_INLINE void | IfxEvadc_selectIdlePrechargeLevel (Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group, IfxEvadc_IdlePrecharge mode)
Selects the chargingmode/voltage level in idle mode. More...
IFX_INLINE void | IfxEvadc_enableInputBuffer (Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group)
IFX_INLINE void | IfxEvadc_setReferencePrechargeDuration (Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group, IfxEvadc_ReferencePrechargeControl duration)
IFX_INLINE void | IfxEvadc_enableReferencePrecharge (Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group)
IFX_INLINE void | IfxEvadc_resetGroup (Ifx_EVADC_G *evadcG)
Resets the ADC group. More...
IFX_INLINE void | IfxEvadc_setSampleSynchronizationMode (Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group, IfxEvadc_SampleSynchronization mode)
Selects whether sample synchronization must be performed or not. More...
IFX_INLINE void | IfxEvadc_selectDoubleClockForMSBConversion (Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group, IfxEvadc_MsbConversionTime mode)
Selects an additional clock cycle for the conversion step of the MSB. More...
IFX_INLINE void | IfxEvadc_setAnalogConvertControl (Ifx_EVADC_G *evadcG, IfxEvadc_AnalogConverterMode analogConverterMode)
Sets analog converter group number. More...
IFX_INLINE void | IfxEvadc_setAnalogInputPrechargeControlEMUX (Ifx_EVADC_G *evadcG, uint8 inputClassNum, IfxEvadc_AnalogInputPrechargeControl mode)
IFX_INLINE void | IfxEvadc_setAnalogInputPrechargeControlStandard (Ifx_EVADC_G *evadcG, uint8 inputClassNum, IfxEvadc_AnalogInputPrechargeControl mode)
Analog Input Precharge Control for Standard Conversions Buffer must be enabled by GxANCFG.B.BE = 1. More...
IFX_INLINE void | IfxEvadc_setGroupConversionMode (Ifx_EVADC_G *evadcG, uint8 inputClassNum, IfxEvadc_ChannelNoiseReduction conversionMode)
Sets the ADC input class channel resolution. More...
IFX_INLINE void | IfxEvadc_setGroupConversionModeEMUX (Ifx_EVADC_G *evadcG, uint8 inputClassNum, IfxEvadc_ChannelNoiseReductionEMUX conversionMode)
IFX_INLINE void | IfxEvadc_setGroupSampleTime (Ifx_EVADC_G *evadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
Sets the ADC input class sample time ticks. More...
IFX_INLINE void | IfxEvadc_setGroupSampleTimeEMUX (Ifx_EVADC_G *evadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
Set the additional number of cycles(in addition to 2) in sample time. More...
IFX_INLINE void | IfxEvadc_setMasterIndex (Ifx_EVADC_G *evadcG, uint8 masterIndex)
Sets the master index. More...
IFX_INLINE void | IfxEvadc_spreadEarlySamplePointEMUXConversions (Ifx_EVADC_G *evadcG, uint8 inputClassNum, IfxEvadc_SpreadEarlySamplePointEMUXConversionsMode mode)
IFX_INLINE void | IfxEvadc_spreadEarlySamplePointStandardConversions (Ifx_EVADC_G *evadcG, uint8 inputClassNum, IfxEvadc_SpreadEarlySamplePointStandardConversionsMode mode)
IFX_EXTERN void | IfxEvadc_setArbiterPriority (Ifx_EVADC_G *evadcG, boolean slotEnable, IfxEvadc_RequestSlotPriority prio, IfxEvadc_RequestSlotStartMode mode, IfxEvadc_RequestSource slot)
Sets the Arbiter slot configurations. More...

Detailed Description

Function Documentation

◆ IfxEvadc_clearAllResultRequests()

IFX_INLINE void IfxEvadc_clearAllResultRequests ( Ifx_EVADC_G * evadcG )

Clears the all group requests.

Parameters
evadcG pointer to EVADC group registers.
Returns
None

Definition at line 2226 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_initChannel().

◆ IfxEvadc_enableInputBuffer()

IFX_INLINE void IfxEvadc_enableInputBuffer | ( | Ifx_EVADC_G * | evadcG,
 |  | IfxEvadc_GroupId | group
 | ) |  |
Parameters
evadcG | Pointer to EVADC SFRs of a particular group
group | Group No.
Returns
None

Definition at line 2655 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_initGroup().

◆ IfxEvadc_enableReferencePrecharge()

IFX_INLINE void IfxEvadc_enableReferencePrecharge | ( | Ifx_EVADC_G * | evadcG,
 |  | IfxEvadc_GroupId | group
 | ) |  |
Parameters
evadcG | Pointer to EVADC SFRs of a particular group
group | EVADC Group No.
Returns
None

Definition at line 2698 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_initGroup().

◆ IfxEvadc_getGroupConversionMode()

IFX_INLINE IfxEvadc_ChannelNoiseReduction IfxEvadc_getGroupConversionMode | ( | Ifx_EVADC_G * | evadcG,
 |  | uint8 | inputClassNum
 | ) |  |

Gets the EVADC input class channel conversion mode.

Parameters
evadcG | pointer to EVADC group registers.
inputClassNum | EVADC input class number.
Returns
EVADC input class channel resolution.

Definition at line 2540 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_getGroupConfig().

◆ IfxEvadc_getGroupResult()

IFX_INLINE void IfxEvadc_getGroupResult | ( | Ifx_EVADC_G * | group,
 |  | Ifx_EVADC_G_RES * | results,
 |  | uint32 | resultOffset,
 |  | uint32 | numResults
 | ) |  |

Get conversion result for the group.

Parameters
group | pointer to the EVADC group
results | pointer to scaled conversion results
resultOffset | offset for the first result
numResults | number of results
Returns
None
Here,Three channels are used for queued transfers
\code
unsigned savedGate = adcGroup.module.evadc->G[adcGroup.groupId].Queue0.QMR0.B.ENGT;
// IMPORTANT: for deterministic results we have to disable the queue gate
// while filling the queue, otherwise results could be output in the wrong order
adcGroup.module.evadc->G[adcGroup.groupId].Queue0.QMR0.B.ENGT = 0;
// create channel config
IfxEvadc_Adc_ChannelConfig adcChannelConfig[3];
IfxEvadc_Adc_Channel adcChannel[3];
for(int chnIx=0; chnIx<3; ++chnIx) {
IfxEvadc_Adc_initChannelConfig(&adcChannelConfig[chnIx], &adcGroup);
adcChannelConfig[chnIx].channelId = (IfxEvadc_ChannelId)(chnIx);
adcChannelConfig[chnIx].resultRegister = IfxEvadc_ChannelResult_1; // use result register #1 for all channels
// initialize the channel
IfxEvadc_Adc_initChannel(&adcChannel[chnIx], &adcChannelConfig[chnIx]);
// Add channel to queue with refill enabled
IfxEvadc_Adc_addToQueue(&adcChannel[chnIx], IfxEvadc_RequestSource_queue0, IFXEVADC_QUEUE_REFILL);
// restore previous gate config
adcGroup.module.evadc->G[adcGroup.groupId].Queue0.QMR0.B.ENGT = savedGate;
// start the Queue
IfxEvadc_Adc_startQueue(&adcGroup,IfxEvadc_RequestSource_queue0); // just for the case that somebody copy&pastes the code - the queue has already been started in previous test
Ifx_EVADC_G_RES results[10];
result = IfxEvadc_getGroupResult(group, results, 0, 2);

Definition at line 2546 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_getGroupResult().

◆ IfxEvadc_getGroupSampleTime()

IFX_INLINE float32 IfxEvadc_getGroupSampleTime | ( | Ifx_EVADC_G * | evadcG,
 |  | uint8 | inputClassNum,
 |  | float32 | analogFrequency
 | ) |  |

Gets the EVADC input class channel sample time.

Parameters
evadcG | pointer to EVADC group registers.
inputClassNum | ADC input class number.
analogFrequency | ADC module analog frequency in Hz.
Returns
ADC input class channel sample time in sec.

Definition at line 2557 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_getGroupConfig().

◆ IfxEvadc_getMasterIndex()

IFX_INLINE uint8 IfxEvadc_getMasterIndex ( Ifx_EVADC_G * evadcG )

Gets the configured master index.

Parameters
evadcG pointer to EVADC group registers.
Returns
configured master kernel index.

Definition at line 2570 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_getGroupConfig().

◆ IfxEvadc_resetGroup()

IFX_INLINE void IfxEvadc_resetGroup ( Ifx_EVADC_G * evadcG )

Resets the ADC group.

Parameters
evadcG pointer to EVADC group registers.
Returns
None

Definition at line 2705 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_deInitGroup().

◆ IfxEvadc_selectDoubleClockForMSBConversion()

IFX_INLINE void IfxEvadc_selectDoubleClockForMSBConversion | ( | Ifx_EVADC_G * | evadcG,
 |  | IfxEvadc_GroupId | group,
 |  | IfxEvadc_MsbConversionTime | mode
 | ) |  |

Selects an additional clock cycle for the conversion step of the MSB.

Parameters
evadcG | Pointer to EVADC SFRs of a particular group
group | EVADC Group No.
mode | Selects an single or double clock cycle(s) for the conversion step of the MSB
Returns
None

Definition at line 2718 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_initGroup().

◆ IfxEvadc_selectIdlePrechargeLevel()

IFX_INLINE void IfxEvadc_selectIdlePrechargeLevel | ( | Ifx_EVADC_G * | evadcG,
 |  | IfxEvadc_GroupId | group,
 |  | IfxEvadc_IdlePrecharge | mode
 | ) |  |

Selects the chargingmode/voltage level in idle mode.

Parameters
evadcG | Pointer to EVADC SFRs of a particular group
group | Group No.
mode | 0 - No precharge, the sampling capacitor keeps the current charge 1 - The sampling capacitor is precharged to approx. half the reference when idle
Returns
None

Definition at line 2620 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_initGroup().

◆ IfxEvadc_setAnalogClockSynchronizationDelay()

IFX_INLINE void IfxEvadc_setAnalogClockSynchronizationDelay | ( | Ifx_EVADC_G * | evadcG,
 |  | IfxEvadc_GroupId | group,
 |  | IfxEvadc_AnalogClockSynchronizationDelay | delay
 | ) |  |
Parameters
evadcG | Pointer to EVADC SFRs of a particular group
group | Group No.
delay | Selects an additional clock cycle for the conversion step of the MSB
Returns
None

Definition at line 2195 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_initGroup().

◆ IfxEvadc_setAnalogConvertControl()

IFX_INLINE void IfxEvadc_setAnalogConvertControl | ( | Ifx_EVADC_G * | evadcG,
 |  | IfxEvadc_AnalogConverterMode | analogConverterMode
 | ) |  |

Sets analog converter group number.

Parameters
evadcG | pointer to EVADC group registers.
analogConverterMode | group analog converter mode.
Returns
None

Definition at line 2737 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_initGroup(), and IfxEvadc_Adc_setAnalogConvertControl().

◆ IfxEvadc_setAnalogInputPrechargeControlEMUX()

IFX_INLINE void IfxEvadc_setAnalogInputPrechargeControlEMUX | ( | Ifx_EVADC_G * | evadcG,
 |  | uint8 | inputClassNum,
 |  | IfxEvadc_AnalogInputPrechargeControl | mode
 | ) |  |
Parameters
evadcG | Pointer to EVADC SFRs of a particular group
inputClassNum | Group No.
mode
Returns
None

Definition at line 2743 of file IfxEvadc.h.

◆ IfxEvadc_setAnalogInputPrechargeControlStandard()

IFX_INLINE void IfxEvadc_setAnalogInputPrechargeControlStandard | ( | Ifx_EVADC_G * | evadcG,
 |  | uint8 | inputClassNum,
 |  | IfxEvadc_AnalogInputPrechargeControl | mode
 | ) |  |

Analog Input Precharge Control for Standard Conversions Buffer must be enabled by GxANCFG.B.BE = 1.

Parameters
evadcG | Pointer to EVADC SFRs of a particular group
inputClassNum | Class No.
mode
Returns
None

Definition at line 2749 of file IfxEvadc.h.

◆ IfxEvadc_setArbiterPriority()

IFX_EXTERN void IfxEvadc_setArbiterPriority | ( | Ifx_EVADC_G * | evadcG,
 |  | boolean | slotEnable,
 |  | IfxEvadc_RequestSlotPriority | prio,
 |  | IfxEvadc_RequestSlotStartMode | mode,
 |  | IfxEvadc_RequestSource | slot
 | ) |  |

Sets the Arbiter slot configurations.

Parameters
evadcG | pointer to EVADC group registers.
slotEnable | enable/disable of slot.
prio | channel request priority.
mode | Channel Slot start mode.
slot | channel slot Request source.
Returns
None

Definition at line 504 of file IfxEvadc.c.

Referenced by IfxEvadc_Adc_initGroup().

◆ IfxEvadc_setCalibrationSampleTime()

IFX_INLINE void IfxEvadc_setCalibrationSampleTime | ( | Ifx_EVADC_G * | evadcG,
 |  | IfxEvadc_GroupId | group,
 |  | IfxEvadc_CalibrationSampleTimeControl | mode
 | ) |  |

Select calibration sample time in units of t_ADC.

Parameters
evadcG | Pointer to EVADC SFRs of a particular group
group | Group No.
mode | Select calibration sample time in units of t_ADC
Returns
None

Definition at line 2219 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_initGroup().

◆ IfxEvadc_setGroupConversionMode()

IFX_INLINE void IfxEvadc_setGroupConversionMode | ( | Ifx_EVADC_G * | evadcG,
 |  | uint8 | inputClassNum,
 |  | IfxEvadc_ChannelNoiseReduction | conversionMode
 | ) |  |

Sets the ADC input class channel resolution.

Parameters
evadcG | pointer to EVADC group registers.
inputClassNum | input class number.
conversionMode | ADC input class channel Conversion Mode
Returns
None

Definition at line 3041 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_initGroup().

◆ IfxEvadc_setGroupConversionModeEMUX()

IFX_INLINE void IfxEvadc_setGroupConversionModeEMUX | ( | Ifx_EVADC_G * | evadcG,
 |  | uint8 | inputClassNum,
 |  | IfxEvadc_ChannelNoiseReductionEMUX | conversionMode
 | ) |  |
Parameters
evadcG | Pointer to EVADC SFRs of a particular group
inputClassNum | Class No.
conversionMode
Returns
None

Definition at line 3047 of file IfxEvadc.h.

◆ IfxEvadc_setGroupSampleTime()

IFX_INLINE void IfxEvadc_setGroupSampleTime | ( | Ifx_EVADC_G * | evadcG,
 |  | uint8 | inputClassNum,
 |  | float32 | analogFrequency,
 |  | float32 | sampleTime
 | ) |  |

Sets the ADC input class sample time ticks.

Parameters
evadcG | pointer to EVADC group registers.
inputClassNum | input class number.
analogFrequency | ADC analog frequency in Hz.
sampleTime | request sample time in sec for input class.
Returns
None

Definition at line 3053 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_initGroup().

◆ IfxEvadc_setGroupSampleTimeEMUX()

IFX_INLINE void IfxEvadc_setGroupSampleTimeEMUX | ( | Ifx_EVADC_G * | evadcG,
 |  | uint8 | inputClassNum,
 |  | float32 | analogFrequency,
 |  | float32 | sampleTime
 | ) |  |

Set the additional number of cycles(in addition to 2) in sample time.

Parameters
evadcG | Pointer to EVADC SFRs of a particular group
inputClassNum | Class No.
analogFrequency | ADC analog frequency in Hz.
sampleTime | request sample time in sec for input class.
Returns
None

Definition at line 3059 of file IfxEvadc.h.

◆ IfxEvadc_setMasterIndex()

IFX_INLINE void IfxEvadc_setMasterIndex | ( | Ifx_EVADC_G * | evadcG,
 |  | uint8 | masterIndex
 | ) |  |

Sets the master index.

Parameters
evadcG | pointer to EVADC group registers.
masterIndex | master index.
Returns
None

Definition at line 3071 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_initGroup().

◆ IfxEvadc_setReferencePrechargeDuration()

IFX_INLINE void IfxEvadc_setReferencePrechargeDuration | ( | Ifx_EVADC_G * | evadcG,
 |  | IfxEvadc_GroupId | group,
 |  | IfxEvadc_ReferencePrechargeControl | duration
 | ) |  |
Parameters
evadcG | Pointer to EVADC SFRs of a particular group
group | Group No.
duration | Selects the amount of time for reference input precharging
Returns
None

Definition at line 2691 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_initGroup().

◆ IfxEvadc_setSampleSynchronizationMode()

IFX_INLINE void IfxEvadc_setSampleSynchronizationMode | ( | Ifx_EVADC_G * | evadcG,
 |  | IfxEvadc_GroupId | group,
 |  | IfxEvadc_SampleSynchronization | mode
 | ) |  |

Selects whether sample synchronization must be performed or not.

Parameters
evadcG | Pointer to EVADC SFRs of a particular group
group | Group No.
mode | Sample Synchronization Options
Returns
None

Definition at line 2711 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_initGroup().

◆ IfxEvadc_spreadEarlySamplePointEMUXConversions()

IFX_INLINE void IfxEvadc_spreadEarlySamplePointEMUXConversions | ( | Ifx_EVADC_G * | evadcG,
 |  | uint8 | inputClassNum,
 |  | IfxEvadc_SpreadEarlySamplePointEMUXConversionsMode | mode
 | ) |  |
Parameters
evadcG | Pointer to EVADC SFRs of a particular group
inputClassNum | Class No.
mode
Returns
None

Definition at line 3136 of file IfxEvadc.h.

◆ IfxEvadc_spreadEarlySamplePointStandardConversions()

IFX_INLINE void IfxEvadc_spreadEarlySamplePointStandardConversions | ( | Ifx_EVADC_G * | evadcG,
 |  | uint8 | inputClassNum,
 |  | IfxEvadc_SpreadEarlySamplePointStandardConversionsMode | mode
 | ) |  |
Parameters
evadcG | Pointer to EVADC SFRs of a particular group
inputClassNum | Class No.
mode
Returns
None

Definition at line 3142 of file IfxEvadc.h.


iLLD_TC38A: Module Functions

Functions
Module Functions
iLLD » EVADC » Standard Driver
Collaboration diagram for Module Functions:

Functions

IFX_INLINE void | IfxEvadc_disableModule (Ifx_EVADC *evadc)
Disable EVADC kernel. More...
IFX_INLINE void | IfxEvadc_disablePostCalibration (Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group, boolean enabled)
Disables the post calibration. More...
IFX_INLINE void | IfxEvadc_enableModule (Ifx_EVADC *evadc)
Enable EVADC kernel. More...
IFX_INLINE uint8 | IfxEvadc_getAdcCalibrationActiveState (Ifx_EVADC *evadc, uint8 adcCalGroupNum)
gets ADC Calibration Flag CAL status. More...
IFX_INLINE Ifx_EVADC_GLOBCFG | IfxEvadc_getGlobalConfigValue (Ifx_EVADC *evadc)
Gets the global control configuration value. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEvadc_getSrcAddress (IfxEvadc_GroupId group, IfxEvadc_SrcNr index)
Gives the SRC source address. More...
IFX_INLINE boolean | IfxEvadc_getStartupCalibrationStatus (Ifx_EVADC *evadc)
get status of GLOBCFG.SUCAL Bit field More...
IFX_INLINE void | IfxEvadc_initialiseAdcConverterClock (Ifx_EVADC *evadc, Ifx_EVADC_G *evadcG, IfxEvadc_ClockDividerFactor converterClockDivider)
Initialises ADC converter clock. More...
IFX_INLINE void | IfxEvadc_initiateStartupCalibration (Ifx_EVADC *evadc)
initiates the calibration pulse phase. More...
IFX_INLINE boolean | IfxEvadc_isModuleSuspended (Ifx_EVADC *evadc)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxEvadc_setGlobalConversionMode (Ifx_EVADC *evadc, uint8 InputClassNum, IfxEvadc_ChannelNoiseReduction conversionMode)
Sets the channel conversion mode. More...
IFX_INLINE void | IfxEvadc_setSleepMode (Ifx_EVADC *evadc, IfxEvadc_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxEvadc_setSuspendMode (Ifx_EVADC *evadc, IfxEvadc_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN void | IfxEvadc_disableAccess (Ifx_EVADC *evadc, IfxEvadc_Protection protectionSet)
Disable write access to the EVADC config/control registers. More...
IFX_EXTERN void | IfxEvadc_enableAccess (Ifx_EVADC *evadc, IfxEvadc_Protection protectionSet)
Enable write access to the EVADC config/control registers. More...
IFX_EXTERN float32 | IfxEvadc_getAdcModuleFrequency (Ifx_EVADC *evadc)
ADC Module Frequency in Hz. More...
IFX_EXTERN uint32 | IfxEvadc_initializeFAdcI (Ifx_EVADC *evadc, uint32 fAdcI, Ifx_EVADC_G *group)
Configure the ADC analog clock. More...
IFX_EXTERN void | IfxEvadc_resetModule (Ifx_EVADC *evadc)
Resets the kernel. More...
IFX_EXTERN void | IfxEvadc_startupCalibration (Ifx_EVADC *evadc)
Starts ADC calibration and wait for the end of the calibration process. More...
IFX_EXTERN boolean | IfxEvadc_syncConvWorkAround (Ifx_EVADC *evadc)
SW workaround of EVADC Master/Slave conversion jitter issue(MCMETILLD-910) More...

Detailed Description

Function Documentation

◆ IfxEvadc_disableAccess()

IFX_EXTERN void IfxEvadc_disableAccess | ( | Ifx_EVADC * | evadc,
 |  | IfxEvadc_Protection | protectionSet
 | ) |  |

Disable write access to the EVADC config/control registers.

Parameters
evadc | pointer to the base of EVADC registers.
protectionSet | Index of the bit in the ACCPROTx {x=0/1} for which write access is to be disabled.
Returns
None

Definition at line 91 of file IfxEvadc.c.

Referenced by IfxEvadc_Adc_deInitGroup(), IfxEvadc_Adc_initChannel(), IfxEvadc_Adc_initGroup(), IfxEvadc_Adc_setAnalogConvertControl(), IfxEvadc_configExternalMultiplexerMode(), IfxEvadc_resetModule(), and IfxEvadc_startupCalibration().

◆ IfxEvadc_disableModule()

IFX_INLINE void IfxEvadc_disableModule ( Ifx_EVADC * evadc )

Disable EVADC kernel.

Parameters
evadc pointer to the base of EVADC registers.
Returns
None

Definition at line 2285 of file IfxEvadc.h.

◆ IfxEvadc_disablePostCalibration()

IFX_INLINE void IfxEvadc_disablePostCalibration | ( | Ifx_EVADC_G * | evadcG,
 |  | IfxEvadc_GroupId | group,
 |  | boolean | enabled
 | ) |  |

Disables the post calibration.

Parameters
evadcG | pointer to the base of EVADC Grroup registers.
group | Index of the group.
enabled | disable or not.
Returns
None

Definition at line 2295 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_initGroup().

◆ IfxEvadc_enableAccess()

IFX_EXTERN void IfxEvadc_enableAccess | ( | Ifx_EVADC * | evadc,
 |  | IfxEvadc_Protection | protectionSet
 | ) |  |

Enable write access to the EVADC config/control registers.

Parameters
evadc | pointer to the base of EVADC registers.
protectionSet | Index of the bit in the ACCPROTx {x=0/1} for which write access is to be enabled.
Returns
None

Definition at line 130 of file IfxEvadc.c.

Referenced by IfxEvadc_Adc_deInitGroup(), IfxEvadc_Adc_initChannel(), IfxEvadc_Adc_initGroup(), IfxEvadc_Adc_setAnalogConvertControl(), IfxEvadc_configExternalMultiplexerMode(), IfxEvadc_resetModule(), and IfxEvadc_startupCalibration().

◆ IfxEvadc_enableModule()

IFX_INLINE void IfxEvadc_enableModule ( Ifx_EVADC * evadc )

Enable EVADC kernel.

Parameters
evadc pointer to the base of EVADC registers.
Returns
None

Definition at line 2324 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_initModule().

◆ IfxEvadc_getAdcCalibrationActiveState()

IFX_INLINE uint8 IfxEvadc_getAdcCalibrationActiveState | ( | Ifx_EVADC * | evadc,
 |  | uint8 | adcCalGroupNum
 | ) |  |

gets ADC Calibration Flag CAL status.

Parameters
evadc | pointer to EVADC group registers.
adcCalGroupNum | ADC CAL group number.
Returns
CAL group status.

Definition at line 2366 of file IfxEvadc.h.

Referenced by IfxEvadc_startupCalibration().

◆ IfxEvadc_getAdcModuleFrequency()

IFX_EXTERN float32 IfxEvadc_getAdcModuleFrequency ( Ifx_EVADC * evadc )

ADC Module Frequency in Hz.

Parameters
evadc Pointer to EVADC
Returns
module frequency

Definition at line 181 of file IfxEvadc.c.

◆ IfxEvadc_getGlobalConfigValue()

IFX_INLINE Ifx_EVADC_GLOBCFG IfxEvadc_getGlobalConfigValue ( Ifx_EVADC * evadc )

Gets the global control configuration value.

Parameters
evadc pointer to the base of EVADC registers.
Returns
global control configuration value.

Definition at line 2503 of file IfxEvadc.h.

◆ IfxEvadc_getSrcAddress()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxEvadc_getSrcAddress | ( | IfxEvadc_GroupId | group,
 |  | IfxEvadc_SrcNr | index
 | ) |  |

Gives the SRC source address.

Parameters
group | Index of the group
index | SRC number
Returns
SRC source address

Definition at line 2587 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_getChannelConfig(), and IfxEvadc_Adc_initChannel().

◆ IfxEvadc_getStartupCalibrationStatus()

IFX_INLINE boolean IfxEvadc_getStartupCalibrationStatus ( Ifx_EVADC * evadc )

get status of GLOBCFG.SUCAL Bit field

Parameters
evadc Pointer to EVADC
Returns
status of GLOBCFG.SUCAL Bit field

Definition at line 2614 of file IfxEvadc.h.

◆ IfxEvadc_initialiseAdcConverterClock()

IFX_INLINE void IfxEvadc_initialiseAdcConverterClock | ( | Ifx_EVADC * | evadc,
 |  | Ifx_EVADC_G * | evadcG,
 |  | IfxEvadc_ClockDividerFactor | converterClockDivider
 | ) |  |

Initialises ADC converter clock.

Parameters
evadc | Pointer to EVADC SFRs
evadcG | Pointer to EVADC Group SFRs
converterClockDivider | ADC converter clock divider.
Returns
None

Definition at line 2642 of file IfxEvadc.h.

Referenced by IfxEvadc_initializeFAdcI().

◆ IfxEvadc_initializeFAdcI()

IFX_EXTERN uint32 IfxEvadc_initializeFAdcI | ( | Ifx_EVADC * | evadc,
 |  | uint32 | fAdcI,
 |  | Ifx_EVADC_G * | group
 | ) |  |

Configure the ADC analog clock.

Parameters
evadc | pointer to the base of EVADC registers.
fAdcI | ADC analog clock clock frequency in Hz. Range = [5000000, 10000000].
group | Pointer to EVADC Group
Returns
ADC analog clock frequency in Hz.

Definition at line 421 of file IfxEvadc.c.

Referenced by IfxEvadc_Adc_initGroup().

◆ IfxEvadc_initiateStartupCalibration()

IFX_INLINE void IfxEvadc_initiateStartupCalibration ( Ifx_EVADC * evadc )

initiates the calibration pulse phase.

Parameters
evadc pointer to the base of EVADC registers
Returns
None

Definition at line 2649 of file IfxEvadc.h.

Referenced by IfxEvadc_startupCalibration().

◆ IfxEvadc_isModuleSuspended()

IFX_INLINE boolean IfxEvadc_isModuleSuspended ( Ifx_EVADC * evadc )

Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended.

Parameters
evadc Pointer to EVADC module registers
Returns
Suspend status (TRUE / FALSE)

Definition at line 2679 of file IfxEvadc.h.

◆ IfxEvadc_resetModule()

IFX_EXTERN void IfxEvadc_resetModule ( Ifx_EVADC * evadc )

Resets the kernel.

Parameters
evadc pointer to the EVADC Module
Returns
None

Definition at line 482 of file IfxEvadc.c.

Referenced by IfxEvadc_Adc_deInitModule().

◆ IfxEvadc_setGlobalConversionMode()

IFX_INLINE void IfxEvadc_setGlobalConversionMode | ( | Ifx_EVADC * | evadc,
 |  | uint8 | InputClassNum,
 |  | IfxEvadc_ChannelNoiseReduction | conversionMode
 | ) |  |

Sets the channel conversion mode.

Parameters
evadc | pointer to EVADC module registers.
InputClassNum | input class number.
conversionMode | ADC conversion Mode. Improves the precision of conversion
Returns
None

Definition at line 3029 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_initModule().

◆ IfxEvadc_setSleepMode()

IFX_INLINE void IfxEvadc_setSleepMode | ( | Ifx_EVADC * | evadc,
 |  | IfxEvadc_SleepMode | mode
 | ) |  |

Sets the sensitivity of the module to sleep signal.

Parameters
evadc | pointer to EVADC registers
mode | mode selection (enable/disable)
Returns
None

Definition at line 3104 of file IfxEvadc.h.

◆ IfxEvadc_setSuspendMode()

IFX_INLINE void IfxEvadc_setSuspendMode | ( | Ifx_EVADC * | evadc,
 |  | IfxEvadc_SuspendMode | mode
 | ) |  |

Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.

Parameters
evadc | Pointer to EVADC module registers
mode | Module suspend mode
Returns
None

Definition at line 3113 of file IfxEvadc.h.

◆ IfxEvadc_startupCalibration()

IFX_EXTERN void IfxEvadc_startupCalibration ( Ifx_EVADC * evadc )

Starts ADC calibration and wait for the end of the calibration process.

Parameters
evadc pointer to the base of EVADC registers.
Returns
None

Definition at line 597 of file IfxEvadc.c.

Referenced by IfxEvadc_Adc_initGroup().

◆ IfxEvadc_syncConvWorkAround()

IFX_EXTERN boolean IfxEvadc_syncConvWorkAround ( Ifx_EVADC * evadc )

SW workaround of EVADC Master/Slave conversion jitter issue(MCMETILLD-910)

Parameters
evadc Pointer to EVADC module registers
Returns
Used for detecting failure in either OCDS Debug Active State Activation or Trigger Line TL1 Activation or both.

Definition at line 638 of file IfxEvadc.c.


iLLD_TC38A: Channel Functions

Functions
Channel Functions
iLLD » EVADC » Standard Driver
Collaboration diagram for Channel Functions:

Functions

IFX_INLINE void | IfxEvadc_clearChannelRequest (Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelId)
Clears the channel request. More...
IFX_INLINE void | IfxEvadc_enableFifoMode (Ifx_EVADC_G *evadcG, IfxEvadc_ChannelResult resultRegister, IfxEvadc_FifoMode fifoMode)
Enables the FIFO mode. More...
IFX_INLINE void | IfxEvadc_enableServiceRequest (Ifx_EVADC_G *evadcG, IfxEvadc_ChannelResult resultRegister)
IFX_INLINE void | IfxEvadc_disableServiceRequest (Ifx_EVADC_G *evadcG, IfxEvadc_ChannelResult resultRegister)
IFX_INLINE Ifx_EVADC_G_CHCTR | IfxEvadc_getChannelControlConfig (Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex)
Gets the current ADC channel control configurations. More...
IFX_INLINE IfxEvadc_InputClasses | IfxEvadc_getChannelInputclass (Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex)
get channel Input class More...
IFX_INLINE Ifx_EVADC_G_REVNP0 | IfxEvadc_getChannelResultServiceRequestNodePointer0 (Ifx_EVADC_G *evadcG)
Gets the channel result service request node pointer 0. More...
IFX_INLINE Ifx_EVADC_G_REVNP1 | IfxEvadc_getChannelResultServiceRequestNodePointer1 (Ifx_EVADC_G *evadcG)
Gets the channel result service request node pointer 1. More...
IFX_INLINE Ifx_EVADC_G_CEVNP0 | IfxEvadc_getChannelServiceRequestNodePointer0 (Ifx_EVADC_G *evadcG)
Gets the channel service request node pointer. More...
IFX_INLINE Ifx_EVADC_G_CEVNP1 | IfxEvadc_getChannelServiceRequestNodePointer1 (Ifx_EVADC_G *evadcG)
get the channel service request node pointer (CH8–CH15) More...
IFX_INLINE void | IfxEvadc_setBoundaryMode (Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, IfxEvadc_BoundaryExtension boundaryMode)
Selects boundary extension. More...
IFX_INLINE void | IfxEvadc_setChannelEventNodePointer0 (Ifx_EVADC_G *evadcG, IfxEvadc_SrcNr channelSrcNr, IfxEvadc_ChannelId channel)
Sets the channel event service request line. More...
IFX_INLINE void | IfxEvadc_setChannelEventNodePointer1 (Ifx_EVADC_G *evadcG, IfxEvadc_SrcNr channelSrcNr, IfxEvadc_ChannelId channel)
set channel event node pointer(channel 8- channel 15) More...
IFX_INLINE void | IfxEvadc_setChannelInputClass (Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, IfxEvadc_InputClasses inputClass)
Sets the channel input class. More...
IFX_INLINE void | IfxEvadc_setChannelLimitCheckMode (Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, IfxEvadc_LimitCheck limitCheck)
Sets the channel event mode. More...
IFX_INLINE void | IfxEvadc_setDataModificationMode (Ifx_EVADC_G *evadcG, IfxEvadc_ChannelResult resultRegister, IfxEvadc_DataModificationMode mode)
IFX_INLINE void | IfxEvadc_setDataReductionControlMode (Ifx_EVADC_G *evadcG, IfxEvadc_ChannelResult resultRegister, uint32 mode)
IFX_INLINE void | IfxEvadc_setFifoMode (Ifx_EVADC_G *evadcG, IfxEvadc_ChannelResult resultRegister, IfxEvadc_FifoMode mode)
IFX_INLINE void | IfxEvadc_setLowerBoundary (Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, IfxEvadc_BoundarySelection lowerBoundary)
Sets group's lower boundary. More...
IFX_INLINE void | IfxEvadc_setReferenceInput (Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, IfxEvadc_ChannelReference reference)
Selects the refernce input. More...
IFX_INLINE void | IfxEvadc_setResultNodeEventPointer0 (Ifx_EVADC_G *evadcG, IfxEvadc_SrcNr resultSrcNr, IfxEvadc_ChannelResult resultRegister)
Sets result event node pointer 0. More...
IFX_INLINE void | IfxEvadc_setResultNodeEventPointer1 (Ifx_EVADC_G *evadcG, IfxEvadc_SrcNr resultSrcNr, IfxEvadc_ChannelResult resultRegister)
Sets result event node pointer 1. More...
IFX_INLINE void | IfxEvadc_setResultPosition (Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, boolean rightAlignedStorage)
Sets result store position. More...
IFX_INLINE void | IfxEvadc_setSyncRequest (Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, boolean synchonize)
Sets channel synchronization request. More...
IFX_INLINE void | IfxEvadc_setUpperBoundary (Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, IfxEvadc_BoundarySelection upperBoundary)
Sets group's upper boundary. More...
IFX_INLINE void | IfxEvadc_storeGroupResult (Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, IfxEvadc_ChannelResult resultRegister)
Sets the group result register. More...

Detailed Description

Function Documentation

◆ IfxEvadc_clearChannelRequest()

IFX_INLINE void IfxEvadc_clearChannelRequest | ( | Ifx_EVADC_G * | evadcG,
 |  | IfxEvadc_ChannelId | channelId
 | ) |  |

Clears the channel request.

Parameters
evadcG | pointer to EVADC group registers.
channelId | channel id whose request to be cleared.
Returns
None

Definition at line 2232 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_initChannel().

◆ IfxEvadc_disableServiceRequest()

IFX_INLINE void IfxEvadc_disableServiceRequest | ( | Ifx_EVADC_G * | evadcG,
 |  | IfxEvadc_ChannelResult | resultRegister
 | ) |  |
Parameters
evadcG Pointer to EVADC SFRs of a particular group
resultRegister
Returns
None

Definition at line 2340 of file IfxEvadc.h.

◆ IfxEvadc_enableFifoMode()

IFX_INLINE void IfxEvadc_enableFifoMode | ( | Ifx_EVADC_G * | evadcG,
 |  | IfxEvadc_ChannelResult | resultRegister,
 |  | IfxEvadc_FifoMode | fifoMode
 | ) |  |

Enables the FIFO mode.

Parameters
evadcG | pointer to EVADC group registers.
resultRegister | channel result register.
fifoMode | FIFO mode .
Returns
None

Definition at line 2318 of file IfxEvadc.h.

◆ IfxEvadc_enableServiceRequest()

IFX_INLINE void IfxEvadc_enableServiceRequest | ( | Ifx_EVADC_G * | evadcG,
 |  | IfxEvadc_ChannelResult | resultRegister
 | ) |  |
Parameters
evadcG | pointer to EVADC group registers.
resultRegister | channel result register.
Returns
None

Definition at line 2334 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_initChannel().

◆ IfxEvadc_getChannelControlConfig()

IFX_INLINE Ifx_EVADC_G_CHCTR IfxEvadc_getChannelControlConfig | ( | Ifx_EVADC_G * | evadcG,
 |  | IfxEvadc_ChannelId | channelIndex
 | ) |  |

Gets the current ADC channel control configurations.

Parameters
evadcG | pointer to EVADC group registers.
channelIndex | EVADC channel number.
Returns
current ADC channel control configuration.

Definition at line 2382 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_getChannelConfig().

◆ IfxEvadc_getChannelInputclass()

IFX_INLINE IfxEvadc_InputClasses IfxEvadc_getChannelInputclass | ( | Ifx_EVADC_G * | evadcG,
 |  | IfxEvadc_ChannelId | channelIndex
 | ) |  |

get channel Input class

Parameters
evadcG | Pointer to EVADC Group
channelIndex | Specifies channel Id
Returns
Input class

Definition at line 2390 of file IfxEvadc.h.

◆ IfxEvadc_getChannelResultServiceRequestNodePointer0()

IFX_INLINE Ifx_EVADC_G_REVNP0 IfxEvadc_getChannelResultServiceRequestNodePointer0 ( Ifx_EVADC_G * evadcG )

Gets the channel result service request node pointer 0.

Parameters
evadcG pointer to EVADC group registers.
Returns
channel result service request node pointer 0.

Definition at line 2396 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_getChannelConfig().

◆ IfxEvadc_getChannelResultServiceRequestNodePointer1()

IFX_INLINE Ifx_EVADC_G_REVNP1 IfxEvadc_getChannelResultServiceRequestNodePointer1 ( Ifx_EVADC_G * evadcG )

Gets the channel result service request node pointer 1.

Parameters
evadcG pointer to EVADC group registers.
Returns
channel result service request node pointer 1.

Definition at line 2404 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_getChannelConfig().

◆ IfxEvadc_getChannelServiceRequestNodePointer0()

IFX_INLINE Ifx_EVADC_G_CEVNP0 IfxEvadc_getChannelServiceRequestNodePointer0 ( Ifx_EVADC_G * evadcG )

Gets the channel service request node pointer.

Parameters
evadcG pointer to EVADC group registers.
Returns
channel service request node pointer.

Definition at line 2412 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_getChannelConfig().

◆ IfxEvadc_getChannelServiceRequestNodePointer1()

IFX_INLINE Ifx_EVADC_G_CEVNP1 IfxEvadc_getChannelServiceRequestNodePointer1 ( Ifx_EVADC_G * evadcG )

get the channel service request node pointer (CH8–CH15)

Parameters
evadcG pointer to EVADC Group register
Returns
Channel service request node pointer for CH8 to CH15

Definition at line 2420 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_getChannelConfig().

◆ IfxEvadc_setBoundaryMode()

IFX_INLINE void IfxEvadc_setBoundaryMode | ( | Ifx_EVADC_G * | evadcG,
 |  | IfxEvadc_ChannelId | channelIndex,
 |  | IfxEvadc_BoundaryExtension | boundaryMode
 | ) |  |

Selects boundary extension.

Parameters
evadcG | pointer to EVADC group registers.
channelIndex | group channel id.
boundaryMode | boundary extension mode.
Returns
None

Definition at line 2755 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_initChannel().

◆ IfxEvadc_setChannelEventNodePointer0()

IFX_INLINE void IfxEvadc_setChannelEventNodePointer0 | ( | Ifx_EVADC_G * | evadcG,
 |  | IfxEvadc_SrcNr | channelSrcNr,
 |  | IfxEvadc_ChannelId | channel
 | ) |  |

Sets the channel event service request line.

Parameters
evadcG | pointer to EVADC group registers.
channelSrcNr | channel event Service Node.
channel | channel number.
Returns
None

Definition at line 2761 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_initChannel().

◆ IfxEvadc_setChannelEventNodePointer1()

IFX_INLINE void IfxEvadc_setChannelEventNodePointer1 | ( | Ifx_EVADC_G * | evadcG,
 |  | IfxEvadc_SrcNr | channelSrcNr,
 |  | IfxEvadc_ChannelId | channel
 | ) |  |

set channel event node pointer(channel 8- channel 15)

Parameters
evadcG | pointer to the EVADC Group register
channelSrcNr | service Request
channel | specifies channel ID
Returns
None

Definition at line 2768 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_initChannel().

◆ IfxEvadc_setChannelInputClass()

IFX_INLINE void IfxEvadc_setChannelInputClass | ( | Ifx_EVADC_G * | evadcG,
 |  | IfxEvadc_ChannelId | channelIndex,
 |  | IfxEvadc_InputClasses | inputClass
 | ) |  |

Sets the channel input class.

Parameters
evadcG | pointer to EVADC group registers.
channelIndex | group channel id.
inputClass | channel input class.
Returns
None

Definition at line 2775 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_initChannel().

◆ IfxEvadc_setChannelLimitCheckMode()

IFX_INLINE void IfxEvadc_setChannelLimitCheckMode | ( | Ifx_EVADC_G * | evadcG,
 |  | IfxEvadc_ChannelId | channelIndex,
 |  | IfxEvadc_LimitCheck | limitCheck
 | ) |  |

Sets the channel event mode.

Parameters
evadcG | pointer to EVADC group registers.
channelIndex | group channel id.
limitCheck | channel event mode.
Returns
None

Definition at line 2781 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_initChannel().

◆ IfxEvadc_setDataModificationMode()

IFX_INLINE void IfxEvadc_setDataModificationMode | ( | Ifx_EVADC_G * | evadcG,
 |  | IfxEvadc_ChannelResult | resultRegister,
 |  | IfxEvadc_DataModificationMode | mode
 | ) |  |
Parameters
evadcG | Pointer to EVADC SFRs of a particular group
resultRegister
mode | 0b00 Standard data reduction (accumulation) 0b01 Result filtering mode. 0b10 Difference mode
Returns
None

Definition at line 2787 of file IfxEvadc.h.

◆ IfxEvadc_setDataReductionControlMode()

IFX_INLINE void IfxEvadc_setDataReductionControlMode | ( | Ifx_EVADC_G * | evadcG,
 |  | IfxEvadc_ChannelResult | resultRegister,
 |  | uint32 | mode
 | ) |  |
Parameters
evadcG | Pointer to EVADC SFRs of a particular group
resultRegister | Group No.
mode | Defines result values stored/accumulated for the final result.
Returns
None

Definition at line 2793 of file IfxEvadc.h.

◆ IfxEvadc_setFifoMode()

IFX_INLINE void IfxEvadc_setFifoMode | ( | Ifx_EVADC_G * | evadcG,
 |  | IfxEvadc_ChannelResult | resultRegister,
 |  | IfxEvadc_FifoMode | mode
 | ) |  |
Parameters
evadcG | Pointer to EVADC SFRs of a particular group
resultRegister
mode | 0b00 - Separate result register 0b01 - Part of a FIFO structure: copy each new valid result 0b10 - Maximum mode: copy new result if bigger 0b11 - Minimum mode: copy new result if smaller
Returns
None

Definition at line 3023 of file IfxEvadc.h.

◆ IfxEvadc_setLowerBoundary()

IFX_INLINE void IfxEvadc_setLowerBoundary | ( | Ifx_EVADC_G * | evadcG,
 |  | IfxEvadc_ChannelId | channelIndex,
 |  | IfxEvadc_BoundarySelection | lowerBoundary
 | ) |  |

Sets group's lower boundary.

Parameters
evadcG | pointer to EVADC group registers.
channelIndex | group channel id.
lowerBoundary | group lower boundary.
Returns
None

Definition at line 3065 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_initChannel().

◆ IfxEvadc_setReferenceInput()

IFX_INLINE void IfxEvadc_setReferenceInput | ( | Ifx_EVADC_G * | evadcG,
 |  | IfxEvadc_ChannelId | channelIndex,
 |  | IfxEvadc_ChannelReference | reference
 | ) |  |

Selects the refernce input.

Parameters
evadcG | pointer to EVADC group registers.
channelIndex | group channel id.
reference | reference input.
Returns
None

Definition at line 3078 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_initChannel().

◆ IfxEvadc_setResultNodeEventPointer0()

IFX_INLINE void IfxEvadc_setResultNodeEventPointer0 | ( | Ifx_EVADC_G * | evadcG,
 |  | IfxEvadc_SrcNr | resultSrcNr,
 |  | IfxEvadc_ChannelResult | resultRegister
 | ) |  |

Sets result event node pointer 0.

Parameters
evadcG | pointer to EVADC group registers.
resultSrcNr | channel result event service node.
resultRegister | channel result register.
Returns
None

Definition at line 3084 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_initChannel().

◆ IfxEvadc_setResultNodeEventPointer1()

IFX_INLINE void IfxEvadc_setResultNodeEventPointer1 | ( | Ifx_EVADC_G * | evadcG,
 |  | IfxEvadc_SrcNr | resultSrcNr,
 |  | IfxEvadc_ChannelResult | resultRegister
 | ) |  |

Sets result event node pointer 1.

Parameters
evadcG | pointer to EVADC group registers.
resultSrcNr | channel result event service node.
resultRegister | channel result register.
Returns
None

Definition at line 3091 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_initChannel().

◆ IfxEvadc_setResultPosition()

IFX_INLINE void IfxEvadc_setResultPosition | ( | Ifx_EVADC_G * | evadcG,
 |  | IfxEvadc_ChannelId | channelIndex,
 |  | boolean | rightAlignedStorage
 | ) |  |

Sets result store position.

Parameters
evadcG | pointer to EVADC group registers.
channelIndex | group channel id.
rightAlignedStorage | result store position.
Returns
None

Definition at line 3098 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_initChannel().

◆ IfxEvadc_setSyncRequest()

IFX_INLINE void IfxEvadc_setSyncRequest | ( | Ifx_EVADC_G * | evadcG,
 |  | IfxEvadc_ChannelId | channelIndex,
 |  | boolean | synchonize
 | ) |  |

Sets channel synchronization request.

Parameters
evadcG | pointer to EVADC group registers.
channelIndex | group channel id.
synchonize | whether channel synchronize or stand alone operation.
Returns
None

Definition at line 3124 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_initChannel().

◆ IfxEvadc_setUpperBoundary()

IFX_INLINE void IfxEvadc_setUpperBoundary | ( | Ifx_EVADC_G * | evadcG,
 |  | IfxEvadc_ChannelId | channelIndex,
 |  | IfxEvadc_BoundarySelection | upperBoundary
 | ) |  |

Sets group's upper boundary.

Parameters
evadcG | pointer to EVADC group registers.
channelIndex | group channel id.
upperBoundary | group upper boundary.
Returns
None

Definition at line 3130 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_initChannel().

◆ IfxEvadc_storeGroupResult()

IFX_INLINE void IfxEvadc_storeGroupResult | ( | Ifx_EVADC_G * | evadcG,
 |  | IfxEvadc_ChannelId | channelIndex,
 |  | IfxEvadc_ChannelResult | resultRegister
 | ) |  |

Sets the group result register.

Parameters
evadcG | pointer to EVADC group registers.
channelIndex | group channel id.
resultRegister | result register for group result storage.
Returns
None

Definition at line 3165 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_initChannel().


iLLD_TC38A: Emux Functions

Functions
Emux Functions
iLLD » EVADC » Standard Driver
Collaboration diagram for Emux Functions:

Functions

IFX_INLINE IfxEvadc_ChannelNoiseReduction | IfxEvadc_getEmuxGlobalConversionMode (Ifx_EVADC *evadc, uint8 inputClassNum)
get global input class conversion mode More...
IFX_INLINE IfxEvadc_ChannelNoiseReduction | IfxEvadc_getEmuxGroupConversionMode (Ifx_EVADC_G *evadcG, uint8 inputClassNum)
get the external conversion mode More...
IFX_INLINE float32 | IfxEvadc_getEmuxGroupSampleTime (Ifx_EVADC_G *evadcG, uint8 inputClassNum, float32 analogFrequency)
Gets the ADC input class sample time of external channel. More...
IFX_INLINE void | IfxEvadc_setEmuxGlobalConversionMode (Ifx_EVADC *evadc, uint8 inputClassNum, IfxEvadc_ChannelNoiseReduction conversionMode)
set the external conversion mode of Global class More...
IFX_INLINE void | IfxEvadc_setEmuxGlobalSampleTime (Ifx_EVADC *evadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
Sets the sample time of ADC global class for external channel. More...
IFX_INLINE void | IfxEvadc_setEmuxGroupConversionMode (Ifx_EVADC_G *evadcG, uint8 inputClassNum, IfxEvadc_ChannelNoiseReduction conversionMode)
set the external channel conversion mode of ADC input class More...
IFX_INLINE void | IfxEvadc_setEmuxGroupSampletime (Ifx_EVADC_G *evadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
Sets the ADC input class sample time for external channel. More...
IFX_EXTERN void | IfxEvadc_configExternalMultiplexerMode (Ifx_EVADC *evadc, Ifx_EVADC_G *evadcG, IfxEvadc_ExternalMultiplexerMode mode, uint8 channels, IfxEvadc_EmuxSelectValue startChannel, IfxEvadc_EmuxCodingScheme code, IfxEvadc_EmuxSampleTimeControl sampleTimeControl, IfxEvadc_ChannelSelectionStyle channelSelectionStyle)
Configure external multiplexer mode. More...

Detailed Description

Function Documentation

◆ IfxEvadc_configExternalMultiplexerMode()

IFX_EXTERN void IfxEvadc_configExternalMultiplexerMode | ( | Ifx_EVADC * | evadc,
 |  | Ifx_EVADC_G * | evadcG,
 |  | IfxEvadc_ExternalMultiplexerMode | mode,
 |  | uint8 | channels,
 |  | IfxEvadc_EmuxSelectValue | startChannel,
 |  | IfxEvadc_EmuxCodingScheme | code,
 |  | IfxEvadc_EmuxSampleTimeControl | sampleTimeControl,
 |  | IfxEvadc_ChannelSelectionStyle | channelSelectionStyle
 | ) |  |

Configure external multiplexer mode.

Parameters
evadc | pointer to Module space
evadcG | Pointer to EVADC group register space
mode | External Multiplexer mode
channels | Specifies channel Id
startChannel | specifies the external channel value from which conversion to be carried out
code | Output the channel number in binary code/gray code
sampleTimeControl | specifies when to use a sample time for external channel
channelSelectionStyle | External Multiplexer Channel Selection Style
Returns
None

Definition at line 70 of file IfxEvadc.c.

Referenced by IfxEvadc_Adc_initExternalMultiplexerMode().

◆ IfxEvadc_getEmuxGlobalConversionMode()

IFX_INLINE IfxEvadc_ChannelNoiseReduction IfxEvadc_getEmuxGlobalConversionMode | ( | Ifx_EVADC * | evadc,
 |  | uint8 | inputClassNum
 | ) |  |

get global input class conversion mode

Parameters
evadc | Pointer to EVADC Module space
inputClassNum | global input class number
Returns
External channel resolution for global input class

Definition at line 2428 of file IfxEvadc.h.

◆ IfxEvadc_getEmuxGroupConversionMode()

IFX_INLINE IfxEvadc_ChannelNoiseReduction IfxEvadc_getEmuxGroupConversionMode | ( | Ifx_EVADC_G * | evadcG,
 |  | uint8 | inputClassNum
 | ) |  |

get the external conversion mode

Parameters
evadcG | Pointer to EVADC group register space
inputClassNum | Adc input class number
Returns
Adc input class External channel conversion mode

Definition at line 2440 of file IfxEvadc.h.

◆ IfxEvadc_getEmuxGroupSampleTime()

IFX_INLINE float32 IfxEvadc_getEmuxGroupSampleTime | ( | Ifx_EVADC_G * | evadcG,
 |  | uint8 | inputClassNum,
 |  | float32 | analogFrequency
 | ) |  |

Gets the ADC input class sample time of external channel.

Parameters
evadcG | Pointer to Register Group space
inputClassNum | ADC input class number
analogFrequency | ADC module analog frequency in Hz.
Returns
ADC input class external channel sample time in sec.

Definition at line 2446 of file IfxEvadc.h.

◆ IfxEvadc_setEmuxGlobalConversionMode()

IFX_INLINE void IfxEvadc_setEmuxGlobalConversionMode | ( | Ifx_EVADC * | evadc,
 |  | uint8 | inputClassNum,
 |  | IfxEvadc_ChannelNoiseReduction | conversionMode
 | ) |  |

set the external conversion mode of Global class

Parameters
evadc | pointer to EVADC Module space
inputClassNum | Global Input Class Number
conversionMode | External Channel resolution
Returns
None

Definition at line 2799 of file IfxEvadc.h.

◆ IfxEvadc_setEmuxGlobalSampleTime()

IFX_INLINE void IfxEvadc_setEmuxGlobalSampleTime | ( | Ifx_EVADC * | evadc,
 |  | uint8 | inputClassNum,
 |  | float32 | analogFrequency,
 |  | float32 | sampleTime
 | ) |  |

Sets the sample time of ADC global class for external channel.

Parameters
evadc | Pointer to EVADC Module space
inputClassNum | Adc input class number
analogFrequency | ADC analog Frequency in HZ
sampleTime | the requested sample time for input class in sec
Returns
None

Definition at line 2805 of file IfxEvadc.h.

◆ IfxEvadc_setEmuxGroupConversionMode()

IFX_INLINE void IfxEvadc_setEmuxGroupConversionMode | ( | Ifx_EVADC_G * | evadcG,
 |  | uint8 | inputClassNum,
 |  | IfxEvadc_ChannelNoiseReduction | conversionMode
 | ) |  |

set the external channel conversion mode of ADC input class

Parameters
evadcG | pointer to EVADC Group Register space
inputClassNum | input class number
conversionMode | input class external channel resolution
Returns
None

Definition at line 2811 of file IfxEvadc.h.

◆ IfxEvadc_setEmuxGroupSampletime()

IFX_INLINE void IfxEvadc_setEmuxGroupSampletime | ( | Ifx_EVADC_G * | evadcG,
 |  | uint8 | inputClassNum,
 |  | float32 | analogFrequency,
 |  | float32 | sampleTime
 | ) |  |

Sets the ADC input class sample time for external channel.

Parameters
evadcG | Pointer to EVADC Group Register Space
inputClassNum | input class number
analogFrequency | ADC analog frequency in Hz.
sampleTime | request sample time in sec for input class.
Returns
None

Definition at line 2817 of file IfxEvadc.h.


iLLD_TC38A: Fast Compare functions

Enumerations | Functions
Fast Compare functions
iLLD » EVADC » Standard Driver
Collaboration diagram for Fast Compare functions:

Enumerations

enum IfxEvadc_BoundaryFlagActivationMode {
IfxEvadc_BoundaryFlagActivationMode_0 = 0,
IfxEvadc_BoundaryFlagActivationMode_1 = 1
}
Selects the behaviour of BoundaryFlag in FCBFL.B.BFA. More...
enum IfxEvadc_BoundaryFlagInversionControl {
IfxEvadc_BoundaryFlagInversionControl_direct = 0,
IfxEvadc_BoundaryFlagInversionControl_invert = 1
}
Controls in in FCBFL.B.BFI options for whether to use Boundary Flag(FCM.B.BFL) directly or in a inverted format. More...
enum IfxEvadc_BoundaryFlagNodePointer {
IfxEvadc_BoundaryFlagNodePointer_commonBoundaryFlagOutput0 = 0,
IfxEvadc_BoundaryFlagNodePointer_commonBoundaryFlagOutput1 = 1,
IfxEvadc_BoundaryFlagNodePointer_commonBoundaryFlagOutput2 = 2,
IfxEvadc_BoundaryFlagNodePointer_commonBoundaryFlagOutput3 = 3,
IfxEvadc_BoundaryFlagNodePointer_sharedServiceRequestLine0 = 4,
IfxEvadc_BoundaryFlagNodePointer_sharedServiceRequestLine1 = 5,
IfxEvadc_BoundaryFlagNodePointer_sharedServiceRequestLine2 = 6,
IfxEvadc_BoundaryFlagNodePointer_sharedServiceRequestLine3 = 7,
IfxEvadc_BoundaryFlagNodePointer_disabled = 16
}
Options for FCBFL.B.BFLNP to select Boundary Flag Node Pointer. More...
enum IfxEvadc_BoundaryFlagSwControl {
IfxEvadc_BoundaryFlagSwControl_noAction = 0,
IfxEvadc_BoundaryFlagSwControl_clear = 1,
IfxEvadc_BoundaryFlagSwControl_set = 2,
IfxEvadc_BoundaryFlagSwControl_toggle = 3
}
Options for FCBFL.B.BFS to modify the Boundary Flag(FCM.B.BFL) More...
enum IfxEvadc_ChannelEventMode {
IfxEvadc_ChannelEventMode_never = 0,
IfxEvadc_ChannelEventMode_aboveCompareValue = 1,
IfxEvadc_ChannelEventMode_belowCompareValue = 2,
IfxEvadc_ChannelEventMode_aboveOrBelowCompareValue = 3
}
Channel Event Mode for configuring generation of events for Fast Compare channels in FCCTRL.B.CHEVMODE. More...
enum IfxEvadc_ClockDividerFactor {
IfxEvadc_ClockDividerFactor_maxFrequency = 0,
IfxEvadc_ClockDividerFactor_2 = 1,
IfxEvadc_ClockDividerFactor_3,
IfxEvadc_ClockDividerFactor_4,
IfxEvadc_ClockDividerFactor_5,
IfxEvadc_ClockDividerFactor_6,
IfxEvadc_ClockDividerFactor_7,
IfxEvadc_ClockDividerFactor_8,
IfxEvadc_ClockDividerFactor_9,
IfxEvadc_ClockDividerFactor_10,
IfxEvadc_ClockDividerFactor_11,
IfxEvadc_ClockDividerFactor_12,
IfxEvadc_ClockDividerFactor_13,
IfxEvadc_ClockDividerFactor_14,
IfxEvadc_ClockDividerFactor_15,
IfxEvadc_ClockDividerFactor_16,
IfxEvadc_ClockDividerFactor_17,
IfxEvadc_ClockDividerFactor_18,
IfxEvadc_ClockDividerFactor_19,
IfxEvadc_ClockDividerFactor_20,
IfxEvadc_ClockDividerFactor_21,
IfxEvadc_ClockDividerFactor_22,
IfxEvadc_ClockDividerFactor_23,
IfxEvadc_ClockDividerFactor_24,
IfxEvadc_ClockDividerFactor_25,
IfxEvadc_ClockDividerFactor_26,
IfxEvadc_ClockDividerFactor_27,
IfxEvadc_ClockDividerFactor_28,
IfxEvadc_ClockDividerFactor_29,
IfxEvadc_ClockDividerFactor_30,
IfxEvadc_ClockDividerFactor_31,
IfxEvadc_ClockDividerFactor_32
}
Defines the frequency of the analog converter clock f_ADCI (base clock for conversion steps), derived from the peripheral clock: f_ADCI = fADC / CP. To be filled in FCCTRL.B.DIVA for Fast Compare channels & ANCFG.B.DIVA for other groups. More...
enum IfxEvadc_ExternalTriggerPolarity {
IfxEvadc_ExternalTriggerPolarity_direct = 0,
IfxEvadc_ExternalTriggerPolarity_inverted = 1
}
External Trigger Polarity to be set in FCCTRL.B.XTPOL. More...
enum IfxEvadc_FastCompareAnalogClockSynchronizationDelay {
IfxEvadc_FastCompareAnalogClockSynchronizationDelay_0 = 0,
IfxEvadc_FastCompareAnalogClockSynchronizationDelay_1 = 1,
IfxEvadc_FastCompareAnalogClockSynchronizationDelay_2 = 2,
IfxEvadc_FastCompareAnalogClockSynchronizationDelay_3 = 3
}
enum IfxEvadc_FastCompareAnalogConverterControl {
IfxEvadc_FastCompareAnalogConverterControl_off = 0,
IfxEvadc_FastCompareAnalogConverterControl_normal = 1
}
Settings for Analog Coverter Controller to be done in FCM.B.ANON. More...
enum IfxEvadc_FastCompareAutomaticUpdate {
IfxEvadc_FastCompareAutomaticUpdate_sw = 0,
IfxEvadc_FastCompareAutomaticUpdate_alternateValue = 1,
IfxEvadc_FastCompareAutomaticUpdate_rampCounter = 2,
IfxEvadc_FastCompareAutomaticUpdate_analogSource = 3
}
Defines the source of the value(s) in bitfield FCM.B.FCREF. More...
enum IfxEvadc_FastCompareRunControl {
IfxEvadc_FastCompareRunControl_stop = 0,
IfxEvadc_FastCompareRunControl_alwaysRun = 1
}
Defines the basic run conditions of the fast compare channel in FCM.B.RUNCOMP. More...
enum IfxEvadc_FastCompareServiceRequestGeneration {
IfxEvadc_FastCompareServiceRequestGeneration_off = 0,
IfxEvadc_FastCompareServiceRequestGeneration_rampEnd = 1,
IfxEvadc_FastCompareServiceRequestGeneration_newValue = 2,
IfxEvadc_FastCompareServiceRequestGeneration_newResult = 3
}
Criteria/mode settings for service request generation in FCM.B.SRG. More...
enum IfxEvadc_GateOperatingMode {
IfxEvadc_GateOperatingMode_noGateFunction = 0,
IfxEvadc_GateOperatingMode_alternateValueMode = 1,
IfxEvadc_GateOperatingMode_lockBoundaryFlag = 2
}
Gate Operating Mode to be filled in FCCTRL.B.GTMODE. More...
enum IfxEvadc_RampDirection {
IfxEvadc_RampDirection_down = 0,
IfxEvadc_RampDirection_up = 1
}
Ramp direction setting in FCM.B.FCRDIR. More...
enum IfxEvadc_RampRunControl {
IfxEvadc_RampRunControl_stop = 0,
IfxEvadc_RampRunControl_1 = 1,
IfxEvadc_RampRunControl_2 = 2,
IfxEvadc_RampRunControl_3 = 3
}
Defines the run conditions for the ramp generation in FCM.B.RUNRAMP. More...
enum IfxEvadc_SampleSynchronization {
IfxEvadc_SampleSynchronization_off = 0,
IfxEvadc_SampleSynchronization_synchronizeSampleTiming = 1
}
Sample timing sync settings for FCM.B.SSE. More...
enum IfxEvadc_TriggerOperatingMode {
IfxEvadc_TriggerOperatingMode_noExternalTrigger = 0,
IfxEvadc_TriggerOperatingMode_fallingEdge = 1,
IfxEvadc_TriggerOperatingMode_risingEdge = 2,
IfxEvadc_TriggerOperatingMode_anyEdge = 3
}
Trigger operating mode in Fast Compare channels, to be entered in FCCTRL.B.XTMODE. More...

Functions

IFX_INLINE void | IfxEvadc_setFastCompareBoundaryFlagSwControl (Ifx_EVADC_FC *evadcFC, IfxEvadc_BoundaryFlagSwControl control)
IFX_INLINE void | IfxEvadc_setFastCompareBoundaryFlagInversion (Ifx_EVADC_FC *evadcFC, IfxEvadc_BoundaryFlagInversionControl mode)
Sets in FCM.B.BFI whether to use Boundary Flag(FCM.B.BFL) directly or in a inverted format. More...
IFX_INLINE void | IfxEvadc_disableFastCompareBoundaryFlag (Ifx_EVADC_FC *evadcFC)
IFX_INLINE void | IfxEvadc_enableFastCompareBoundaryFlag (Ifx_EVADC_FC *evadcFC)
IFX_INLINE void | IfxEvadc_enableFastCompareSampleSynchronization (Ifx_EVADC_FC *evadcFC, IfxEvadc_SampleSynchronization mode)
Enable/Disable sample timing synchronization. More...
IFX_INLINE void | IfxEvadc_setFastCompareReferencePrechargeDuration (Ifx_EVADC_FC *evadcFC, IfxEvadc_ReferencePrechargeControl duration)
Setting the Reference Precharge Control for Fast Compare Channels in FCCTRL.B.RPC. More...
IFX_INLINE boolean | IfxEvadc_getFastCompareBoundaryFlagStatus (Ifx_EVADC_FC *evadcFC)
Get boundary flag status. More...
IFX_INLINE boolean | IfxEvadc_getFastCompareExternalTriggerLevelStatus (Ifx_EVADC_FC *evadcFC)
Returns current level of the selected trigger input. More...
IFX_INLINE boolean | IfxEvadc_getFastCompareResultStatus (Ifx_EVADC_FC *evadcFC)
Returns result for Fast Compare operation. More...
IFX_INLINE boolean | IfxEvadc_isFastCompareNewResultAvailable (Ifx_EVADC_FC *evadcFC)
Indicates availability of a new result in bit FCM.B.FCR. More...
IFX_INLINE void | IfxEvadc_selectFastCompareBoundaryFlagActivationMode (Ifx_EVADC_FC *evadcFC, IfxEvadc_BoundaryFlagActivationMode mode)
Selects behaviour of Boundary Flag(BFL) wih respect to the value of FCR. More...
IFX_INLINE void | IfxEvadc_selectFastCompareBoundaryFlagNodePointer (Ifx_EVADC_FC *evadcFC, IfxEvadc_BoundaryFlagNodePointer nodePointer)
IFX_INLINE void | IfxEvadc_setFastCompareAnalogClockSynchronizationDelay (Ifx_EVADC_FC *evadcFC, IfxEvadc_FastCompareAnalogClockSynchronizationDelay delay)
Sets the delay of the analog clock(in clock cycles) after the sync signal. More...
IFX_INLINE void | IfxEvadc_setFastCompareAnalogConverter (Ifx_EVADC_FC *evadcFC, IfxEvadc_FastCompareAnalogConverterControl mode)
Set Analog Converter Control modes. More...
IFX_INLINE void | IfxEvadc_setFastCompareAnalogInputPrechargeControl (Ifx_EVADC_FC *evadcFC, IfxEvadc_AnalogInputPrechargeControl mode)
IFX_INLINE void | IfxEvadc_setFastCompareAnalogInternalClockDivider (Ifx_EVADC_FC *evadcFC, IfxEvadc_ClockDividerFactor divider)
Defines the frequency of the analog converter clock fADCI (base clock for conversion steps), derived from the peripheral clock: fADCI = fADC / divider. More...
IFX_INLINE void | IfxEvadc_setFastCompareAutomaticUpdateMode (Ifx_EVADC_FC *evadcFC, IfxEvadc_FastCompareAutomaticUpdate mode)
Sets the source of the value(s) in bitfield FCREF. More...
IFX_INLINE void | IfxEvadc_setFastCompareChannelEventMode (Ifx_EVADC_FC *evadcFC, IfxEvadc_ChannelEventMode mode)
IFX_INLINE void | IfxEvadc_setFastCompareExternalTriggerPolarity (Ifx_EVADC_FC *evadcFC, IfxEvadc_ExternalTriggerPolarity mode)
Set external trigger polarity in FCCTRL.B.XTPOL. More...
IFX_INLINE void | IfxEvadc_setFastCompareGateOperatingMode (Ifx_EVADC_FC *evadcFC, IfxEvadc_GateOperatingMode mode)
IFX_INLINE void | IfxEvadc_setFastCompareRampDirection (Ifx_EVADC_FC *evadcFC, IfxEvadc_RampDirection rampDirection)
Ramp direction(up or down) settings. More...
IFX_INLINE void | IfxEvadc_setFastCompareReferenceValue (Ifx_EVADC_FC *evadcFC, uint16 referenceValue)
IFX_INLINE void | IfxEvadc_setFastCompareRunControl (Ifx_EVADC_FC *evadcFC, IfxEvadc_FastCompareRunControl mode)
Defines the basic run conditions of the fast compare channel. More...
IFX_INLINE void | IfxEvadc_setFastCompareRunRampControl (Ifx_EVADC_FC *evadcFC, IfxEvadc_RampRunControl rampStartMode)
IFX_INLINE void | IfxEvadc_setFastCompareSampleTimeControl (Ifx_EVADC_FC *evadcFC, uint8 additionalCycles)
Setting additional sample time in FCCTRL.B.STCF. More...
IFX_INLINE void | IfxEvadc_setFastCompareServiceRequestGeneration (Ifx_EVADC_FC *evadcFC, IfxEvadc_FastCompareServiceRequestGeneration mode)
Sets when to generate service requests. More...
IFX_INLINE void | IfxEvadc_setFastCompareTriggerInterval (Ifx_EVADC_FC *evadcFC, uint8 interval)
Sets the interval at which fast compare operations are triggered in steps of 16 * 1/fADC. More...
IFX_INLINE void | IfxEvadc_setFastCompareTriggerOperatingMode (Ifx_EVADC_FC *evadcFC, IfxEvadc_TriggerOperatingMode mode)

Detailed Description

Enumeration Type Documentation

◆ IfxEvadc_BoundaryFlagActivationMode

enum IfxEvadc_BoundaryFlagActivationMode

Selects the behaviour of BoundaryFlag in FCBFL.B.BFA.

Enumerator
IfxEvadc_BoundaryFlagActivationMode_0 | Set boundary flag BFL if result FCR = 1 (input above the defined band or compare value), clear if FCR = 0 (input below)
IfxEvadc_BoundaryFlagActivationMode_1 | Set boundary flag BFL if result FCR = 0 (input below the defined band or compare value), clear if FCR = 1 (input above)

Definition at line 509 of file IfxEvadc.h.

◆ IfxEvadc_BoundaryFlagInversionControl

enum IfxEvadc_BoundaryFlagInversionControl

Controls in in FCBFL.B.BFI options for whether to use Boundary Flag(FCM.B.BFL) directly or in a inverted format.

Enumerator
IfxEvadc_BoundaryFlagInversionControl_direct | Use BFL directly.
IfxEvadc_BoundaryFlagInversionControl_invert | Use inverted BFL.

Definition at line 519 of file IfxEvadc.h.

◆ IfxEvadc_BoundaryFlagNodePointer

enum IfxEvadc_BoundaryFlagNodePointer

Options for FCBFL.B.BFLNP to select Boundary Flag Node Pointer.

Enumerator
IfxEvadc_BoundaryFlagNodePointer_commonBoundaryFlagOutput0 | Select common boundary flag output 0.
IfxEvadc_BoundaryFlagNodePointer_commonBoundaryFlagOutput1 | Select common boundary flag output 1.
IfxEvadc_BoundaryFlagNodePointer_commonBoundaryFlagOutput2 | Select common boundary flag output 2.
IfxEvadc_BoundaryFlagNodePointer_commonBoundaryFlagOutput3 | Select common boundary flag output 3.
IfxEvadc_BoundaryFlagNodePointer_sharedServiceRequestLine0 | Select shared service request line 0.
IfxEvadc_BoundaryFlagNodePointer_sharedServiceRequestLine1 | Select shared service request line 1.
IfxEvadc_BoundaryFlagNodePointer_sharedServiceRequestLine2 | Select shared service request line 2.
IfxEvadc_BoundaryFlagNodePointer_sharedServiceRequestLine3 | Select shared service request line 3.
IfxEvadc_BoundaryFlagNodePointer_disabled | Disabled, no common output signal.

Definition at line 527 of file IfxEvadc.h.

◆ IfxEvadc_BoundaryFlagSwControl

enum IfxEvadc_BoundaryFlagSwControl

Options for FCBFL.B.BFS to modify the Boundary Flag(FCM.B.BFL)

Enumerator
IfxEvadc_BoundaryFlagSwControl_noAction | No Action.
IfxEvadc_BoundaryFlagSwControl_clear | Clear BFL.
IfxEvadc_BoundaryFlagSwControl_set | Set BFL.
IfxEvadc_BoundaryFlagSwControl_toggle | Toggle BFL.

Definition at line 542 of file IfxEvadc.h.

◆ IfxEvadc_ChannelEventMode

enum IfxEvadc_ChannelEventMode

Channel Event Mode for configuring generation of events for Fast Compare channels in FCCTRL.B.CHEVMODE.

Enumerator
IfxEvadc_ChannelEventMode_never | Never generate a service request.
IfxEvadc_ChannelEventMode_aboveCompareValue | Generate a service request in case the result is above compare value.
IfxEvadc_ChannelEventMode_belowCompareValue | Generate a service request in case the result is below compare value.
IfxEvadc_ChannelEventMode_aboveOrBelowCompareValue | Generate a service request in case the result switches to either level(above or below the compare value)

Definition at line 552 of file IfxEvadc.h.

◆ IfxEvadc_ClockDividerFactor

enum IfxEvadc_ClockDividerFactor

Defines the frequency of the analog converter clock f_ADCI (base clock for conversion steps), derived from the peripheral clock: f_ADCI = fADC / CP. To be filled in FCCTRL.B.DIVA for Fast Compare channels & ANCFG.B.DIVA for other groups.

Enumerator
IfxEvadc_ClockDividerFactor_maxFrequency | Max. frequency.
IfxEvadc_ClockDividerFactor_2 | Frequency Divided by 2.
IfxEvadc_ClockDividerFactor_3 | Frequency Divided by 3.
IfxEvadc_ClockDividerFactor_4 | Frequency Divided by 4.
IfxEvadc_ClockDividerFactor_5 | Frequency Divided by 5.
IfxEvadc_ClockDividerFactor_6 | Frequency Divided by 6.
IfxEvadc_ClockDividerFactor_7 | Frequency Divided by 7.
IfxEvadc_ClockDividerFactor_8 | Frequency Divided by 8.
IfxEvadc_ClockDividerFactor_9 | Frequency Divided by 9.
IfxEvadc_ClockDividerFactor_10 | Frequency Divided by 10.
IfxEvadc_ClockDividerFactor_11 | Frequency Divided by 11.
IfxEvadc_ClockDividerFactor_12 | Frequency Divided by 12.
IfxEvadc_ClockDividerFactor_13 | Frequency Divided by 13.
IfxEvadc_ClockDividerFactor_14 | Frequency Divided by 14.
IfxEvadc_ClockDividerFactor_15 | Frequency Divided by 15.
IfxEvadc_ClockDividerFactor_16 | Frequency Divided by 16.
IfxEvadc_ClockDividerFactor_17 | Frequency Divided by 17.
IfxEvadc_ClockDividerFactor_18 | Frequency Divided by 18.
IfxEvadc_ClockDividerFactor_19 | Frequency Divided by 19.
IfxEvadc_ClockDividerFactor_20 | Frequency Divided by 20.
IfxEvadc_ClockDividerFactor_21 | Frequency Divided by 21.
IfxEvadc_ClockDividerFactor_22 | Frequency Divided by 22.
IfxEvadc_ClockDividerFactor_23 | Frequency Divided by 23.
IfxEvadc_ClockDividerFactor_24 | Frequency Divided by 24.
IfxEvadc_ClockDividerFactor_25 | Frequency Divided by 25.
IfxEvadc_ClockDividerFactor_26 | Frequency Divided by 26.
IfxEvadc_ClockDividerFactor_27 | Frequency Divided by 27.
IfxEvadc_ClockDividerFactor_28 | Frequency Divided by 28.
IfxEvadc_ClockDividerFactor_29 | Frequency Divided by 29.
IfxEvadc_ClockDividerFactor_30 | Frequency Divided by 30.
IfxEvadc_ClockDividerFactor_31 | Frequency Divided by 31.
IfxEvadc_ClockDividerFactor_32 | Frequency Divided by 32.

Definition at line 564 of file IfxEvadc.h.

◆ IfxEvadc_ExternalTriggerPolarity

enum IfxEvadc_ExternalTriggerPolarity

External Trigger Polarity to be set in FCCTRL.B.XTPOL.

Enumerator
IfxEvadc_ExternalTriggerPolarity_direct | Use selected input signal directly.
IfxEvadc_ExternalTriggerPolarity_inverted | Invert selected input signal.

Definition at line 602 of file IfxEvadc.h.

◆ IfxEvadc_FastCompareAnalogClockSynchronizationDelay

enum IfxEvadc_FastCompareAnalogClockSynchronizationDelay
Enumerator
IfxEvadc_FastCompareAnalogClockSynchronizationDelay_0 | No delay.
IfxEvadc_FastCompareAnalogClockSynchronizationDelay_1 | 1 clock cycle delay
IfxEvadc_FastCompareAnalogClockSynchronizationDelay_2 | 2 clock cycles delay
IfxEvadc_FastCompareAnalogClockSynchronizationDelay_3 | 3 clock cycles delay

Definition at line 608 of file IfxEvadc.h.

◆ IfxEvadc_FastCompareAnalogConverterControl

enum IfxEvadc_FastCompareAnalogConverterControl

Settings for Analog Coverter Controller to be done in FCM.B.ANON.

Enumerator
IfxEvadc_FastCompareAnalogConverterControl_off | Analog converter off.
IfxEvadc_FastCompareAnalogConverterControl_normal | Normal operation.

Definition at line 618 of file IfxEvadc.h.

◆ IfxEvadc_FastCompareAutomaticUpdate

enum IfxEvadc_FastCompareAutomaticUpdate

Defines the source of the value(s) in bitfield FCM.B.FCREF.

Note: Software can only write to bitfield FCM.B.FCREF, while AUE = 00B.

Enumerator
IfxEvadc_FastCompareAutomaticUpdate_sw | No automatic update.Value(s) written by software.
IfxEvadc_FastCompareAutomaticUpdate_alternateValue | While gate is active (high), value is copied from bitfield FCM.B.FCRCOMPA and while gate is inactive (low), value is copied from bitfield FCM.B.FCRCOMPB.
IfxEvadc_FastCompareAutomaticUpdate_rampCounter | Value(s) copied from ramp counter on ramp start or counter update.
IfxEvadc_FastCompareAutomaticUpdate_analogSource | Value(s) written by the associated converter.

Definition at line 628 of file IfxEvadc.h.

◆ IfxEvadc_FastCompareRunControl

enum IfxEvadc_FastCompareRunControl

Defines the basic run conditions of the fast compare channel in FCM.B.RUNCOMP.

Enumerator
IfxEvadc_FastCompareRunControl_stop | Stop, no operation.
IfxEvadc_FastCompareRunControl_alwaysRun | Always run.

Definition at line 639 of file IfxEvadc.h.

◆ IfxEvadc_FastCompareServiceRequestGeneration

enum IfxEvadc_FastCompareServiceRequestGeneration

Criteria/mode settings for service request generation in FCM.B.SRG.

Enumerator
IfxEvadc_FastCompareServiceRequestGeneration_off | No service requests are generated.
IfxEvadc_FastCompareServiceRequestGeneration_rampEnd | Issue service request when the ramp counter stops.
IfxEvadc_FastCompareServiceRequestGeneration_newValue | Issue service request when a value is written to FCREF.
IfxEvadc_FastCompareServiceRequestGeneration_newResult | Issue service request when a new result available.

Definition at line 647 of file IfxEvadc.h.

◆ IfxEvadc_GateOperatingMode

enum IfxEvadc_GateOperatingMode

Gate Operating Mode to be filled in FCCTRL.B.GTMODE.

Enumerator
IfxEvadc_GateOperatingMode_noGateFunction | No gate function.
IfxEvadc_GateOperatingMode_alternateValueMode | Alternate value mode.
IfxEvadc_GateOperatingMode_lockBoundaryFlag | Lock boundary flag.

Definition at line 657 of file IfxEvadc.h.

◆ IfxEvadc_RampDirection

enum IfxEvadc_RampDirection

Ramp direction setting in FCM.B.FCRDIR.

Enumerator
IfxEvadc_RampDirection_down | Decrement ramp counter and stop when counter <= FCRCOMPB.
IfxEvadc_RampDirection_up | Increment ramp counter and stop when counter >= FCRCOMPB.

Definition at line 666 of file IfxEvadc.h.

◆ IfxEvadc_RampRunControl

enum IfxEvadc_RampRunControl

Defines the run conditions for the ramp generation in FCM.B.RUNRAMP.

Enumerator
IfxEvadc_RampRunControl_stop | Stop, no operation.
IfxEvadc_RampRunControl_1 | Start immediately when GxFCRAMP0/1 is written.
IfxEvadc_RampRunControl_2 | Start upon the selected trigger event of signal REQTRx.
IfxEvadc_RampRunControl_3 | Start immediately when GxFCRAMP0/1 is written and stop upon the selected trigger event of signal REQTRx.

Definition at line 674 of file IfxEvadc.h.

◆ IfxEvadc_SampleSynchronization

enum IfxEvadc_SampleSynchronization

Sample timing sync settings for FCM.B.SSE.

Enumerator
IfxEvadc_SampleSynchronization_off | No synchronization.
IfxEvadc_SampleSynchronization_synchronizeSampleTiming | Sample timing is synchronized.This is recommended for operation of several ADCs.

Definition at line 685 of file IfxEvadc.h.

◆ IfxEvadc_TriggerOperatingMode

enum IfxEvadc_TriggerOperatingMode

Trigger operating mode in Fast Compare channels, to be entered in FCCTRL.B.XTMODE.

Enumerator
IfxEvadc_TriggerOperatingMode_noExternalTrigger | No external trigger.
IfxEvadc_TriggerOperatingMode_fallingEdge | Trigger event upon a falling edge.
IfxEvadc_TriggerOperatingMode_risingEdge | Trigger event upon a rising edge.
IfxEvadc_TriggerOperatingMode_anyEdge | Trigger event upon any edge.

Definition at line 693 of file IfxEvadc.h.

Function Documentation

◆ IfxEvadc_disableFastCompareBoundaryFlag()

IFX_INLINE void IfxEvadc_disableFastCompareBoundaryFlag ( Ifx_EVADC_FC * evadcFC )
Parameters
evadcFC Pointer to EVADC register set for Fast Compare operation
Returns
None

Definition at line 2279 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_initFastCompareChannel().

◆ IfxEvadc_enableFastCompareBoundaryFlag()

IFX_INLINE void IfxEvadc_enableFastCompareBoundaryFlag ( Ifx_EVADC_FC * evadcFC )
Parameters
evadcFC Pointer to EVADC register set for Fast Compare operation
Returns
None

Definition at line 2302 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_initFastCompareChannel().

◆ IfxEvadc_enableFastCompareSampleSynchronization()

IFX_INLINE void IfxEvadc_enableFastCompareSampleSynchronization | ( | Ifx_EVADC_FC * | evadcFC,
 |  | IfxEvadc_SampleSynchronization | mode
 | ) |  |

Enable/Disable sample timing synchronization.

Parameters
evadcFC | Pointer to EVADC register set for Fast Compare operation
mode | Sample synchronization mode select
Returns
None

Definition at line 2308 of file IfxEvadc.h.

◆ IfxEvadc_getFastCompareBoundaryFlagStatus()

IFX_INLINE boolean IfxEvadc_getFastCompareBoundaryFlagStatus ( Ifx_EVADC_FC * evadcFC )

Get boundary flag status.

Parameters
evadcFC Pointer to EVADC register set for Fast Compare operation
Returns
0(FALSE) - Passive state : Result has not yet crossed the activation boundary, or selected gate signal is inactive, or this boundary flag is disabled 1(TRUE) - Active state:result has crossed the activation boundary

Definition at line 2452 of file IfxEvadc.h.

◆ IfxEvadc_getFastCompareExternalTriggerLevelStatus()

IFX_INLINE boolean IfxEvadc_getFastCompareExternalTriggerLevelStatus ( Ifx_EVADC_FC * evadcFC )

Returns current level of the selected trigger input.

Parameters
evadcFC Pointer to EVADC register set for Fast Compare operation
Returns
Current level of the selected trigger input

Definition at line 2469 of file IfxEvadc.h.

◆ IfxEvadc_getFastCompareResultStatus()

IFX_INLINE boolean IfxEvadc_getFastCompareResultStatus ( Ifx_EVADC_FC * evadcFC )

Returns result for Fast Compare operation.

Parameters
evadcFC Pointer to EVADC register set for Fast Compare operation
Returns
Result for Fast Compare operation

Definition at line 2486 of file IfxEvadc.h.

◆ IfxEvadc_isFastCompareNewResultAvailable()

IFX_INLINE boolean IfxEvadc_isFastCompareNewResultAvailable ( Ifx_EVADC_FC * evadcFC )

Indicates availability of a new result in bit FCM.B.FCR.

Parameters
evadcFC Pointer to EVADC register set for Fast Compare operation
Returns
Returns value Indicating availability of a new result in bit FCM.B.FCR

Definition at line 2662 of file IfxEvadc.h.

◆ IfxEvadc_selectFastCompareBoundaryFlagActivationMode()

IFX_INLINE void IfxEvadc_selectFastCompareBoundaryFlagActivationMode | ( | Ifx_EVADC_FC * | evadcFC,
 |  | IfxEvadc_BoundaryFlagActivationMode | mode
 | ) |  |

Selects behaviour of Boundary Flag(BFL) wih respect to the value of FCR.

Parameters
evadcFC | Pointer to EVADC register set for Fast Compare operation
mode | 0 - Set boundary flag BFL if result FCR = 1 (input above the defined band or compare value), clear if FCR = 0 (input below) 1 - Set boundary flag BFL if result FCR = 0 (input below the defined band or compare value), clear if FCR = 1 (input above)
Returns
None

Definition at line 2725 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_initFastCompareChannel().

◆ IfxEvadc_selectFastCompareBoundaryFlagNodePointer()

IFX_INLINE void IfxEvadc_selectFastCompareBoundaryFlagNodePointer | ( | Ifx_EVADC_FC * | evadcFC,
 |  | IfxEvadc_BoundaryFlagNodePointer | nodePointer
 | ) |  |
Parameters
evadcFC | Pointer to EVADC register set for Fast Compare operation
nodePointer | Bounday Flag Node Pointers
Returns
None

Definition at line 2731 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_initFastCompareChannel().

◆ IfxEvadc_setFastCompareAnalogClockSynchronizationDelay()

IFX_INLINE void IfxEvadc_setFastCompareAnalogClockSynchronizationDelay | ( | Ifx_EVADC_FC * | evadcFC,
 |  | IfxEvadc_FastCompareAnalogClockSynchronizationDelay | delay
 | ) |  |

Sets the delay of the analog clock(in clock cycles) after the sync signal.

Parameters
evadcFC | Pointer to EVADC register set for Fast Compare operation
delay | Defines the delay of the analog clock in clocks after the sync signal.
Returns
None

Definition at line 2836 of file IfxEvadc.h.

◆ IfxEvadc_setFastCompareAnalogConverter()

IFX_INLINE void IfxEvadc_setFastCompareAnalogConverter | ( | Ifx_EVADC_FC * | evadcFC,
 |  | IfxEvadc_FastCompareAnalogConverterControl | mode
 | ) |  |

Set Analog Converter Control modes.

Parameters
evadcFC | Pointer to EVADC register set for Fast Compare operation
mode | Analog Converter Control modes
Returns
None

Definition at line 2846 of file IfxEvadc.h.

◆ IfxEvadc_setFastCompareAnalogInputPrechargeControl()

IFX_INLINE void IfxEvadc_setFastCompareAnalogInputPrechargeControl | ( | Ifx_EVADC_FC * | evadcFC,
 |  | IfxEvadc_AnalogInputPrechargeControl | mode
 | ) |  |
Parameters
evadcFC | Pointer to EVADC register set for Fast Compare operation
mode | Analog Input Precharge Enable for Fast Comparisons
Returns
None

Definition at line 2856 of file IfxEvadc.h.

◆ IfxEvadc_setFastCompareAnalogInternalClockDivider()

IFX_INLINE void IfxEvadc_setFastCompareAnalogInternalClockDivider | ( | Ifx_EVADC_FC * | evadcFC,
 |  | IfxEvadc_ClockDividerFactor | divider
 | ) |  |

Defines the frequency of the analog converter clock fADCI (base clock for conversion steps), derived from the peripheral clock: fADCI = fADC / divider.

Parameters
evadcFC | Pointer to EVADC register set for Fast Compare operation
divider | Fast Compare Analog Internal Clock Divider factor
Returns
None

Definition at line 2866 of file IfxEvadc.h.

◆ IfxEvadc_setFastCompareAutomaticUpdateMode()

IFX_INLINE void IfxEvadc_setFastCompareAutomaticUpdateMode | ( | Ifx_EVADC_FC * | evadcFC,
 |  | IfxEvadc_FastCompareAutomaticUpdate | mode
 | ) |  |

Sets the source of the value(s) in bitfield FCREF.

Parameters
evadcFC | Pointer to EVADC register set for Fast Compare operation
mode | Defines the source of the value(s) in bitfield FCREF.
Returns
None

Definition at line 2876 of file IfxEvadc.h.

◆ IfxEvadc_setFastCompareBoundaryFlagInversion()

IFX_INLINE void IfxEvadc_setFastCompareBoundaryFlagInversion | ( | Ifx_EVADC_FC * | evadcFC,
 |  | IfxEvadc_BoundaryFlagInversionControl | mode
 | ) |  |

Sets in FCM.B.BFI whether to use Boundary Flag(FCM.B.BFL) directly or in a inverted format.

Parameters
evadcFC | Pointer to EVADC register set for Fast Compare operation
mode | Invert or not to invert the Boundary Flag(BFL)
Returns
None

Definition at line 2273 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_initFastCompareChannel().

◆ IfxEvadc_setFastCompareBoundaryFlagSwControl()

IFX_INLINE void IfxEvadc_setFastCompareBoundaryFlagSwControl | ( | Ifx_EVADC_FC * | evadcFC,
 |  | IfxEvadc_BoundaryFlagSwControl | control
 | ) |  |
Parameters
evadcFC | Pointer to EVADC register set for Fast Compare operation
control | Action to be taken on the BoundaryFlag(FCM.B.BFL)
Returns
None

Definition at line 2267 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_initFastCompareChannel().

◆ IfxEvadc_setFastCompareChannelEventMode()

IFX_INLINE void IfxEvadc_setFastCompareChannelEventMode | ( | Ifx_EVADC_FC * | evadcFC,
 |  | IfxEvadc_ChannelEventMode | mode
 | ) |  |
Parameters
evadcFC | Pointer to EVADC register set for Fast Compare operation
mode | Mode/criteria for generation of service requests
Returns
None

Definition at line 2886 of file IfxEvadc.h.

◆ IfxEvadc_setFastCompareExternalTriggerPolarity()

IFX_INLINE void IfxEvadc_setFastCompareExternalTriggerPolarity | ( | Ifx_EVADC_FC * | evadcFC,
 |  | IfxEvadc_ExternalTriggerPolarity | mode
 | ) |  |

Set external trigger polarity in FCCTRL.B.XTPOL.

Parameters
evadcFC | Pointer to EVADC register set for Fast Compare operation
mode | 0 - Use selected input signal directly 1 - Invert selected input signal
Returns
None

Definition at line 2896 of file IfxEvadc.h.

◆ IfxEvadc_setFastCompareGateOperatingMode()

IFX_INLINE void IfxEvadc_setFastCompareGateOperatingMode | ( | Ifx_EVADC_FC * | evadcFC,
 |  | IfxEvadc_GateOperatingMode | mode
 | ) |  |
Parameters
evadcFC | Pointer to EVADC register set for Fast Compare operation
mode | Fast Compare Gate Operating Mode
Returns
None

Definition at line 2906 of file IfxEvadc.h.

◆ IfxEvadc_setFastCompareRampDirection()

IFX_INLINE void IfxEvadc_setFastCompareRampDirection | ( | Ifx_EVADC_FC * | evadcFC,
 |  | IfxEvadc_RampDirection | rampDirection
 | ) |  |

Ramp direction(up or down) settings.

Parameters
evadcFC | Pointer to EVADC register set for Fast Compare operation
rampDirection | Ramp direction(up or down) settings
Returns
None

Definition at line 2916 of file IfxEvadc.h.

◆ IfxEvadc_setFastCompareReferencePrechargeDuration()

IFX_INLINE void IfxEvadc_setFastCompareReferencePrechargeDuration | ( | Ifx_EVADC_FC * | evadcFC,
 |  | IfxEvadc_ReferencePrechargeControl | duration
 | ) |  |

Setting the Reference Precharge Control for Fast Compare Channels in FCCTRL.B.RPC.

Parameters
evadcFC | Pointer to EVADC register set for Fast Compare operation
duration | Reference Precharge Control Mode

0 - Precharge the reference input for 1 clock phase 1 - Precharge the reference input for 1 clock period (2 phases)

Returns
None

Definition at line 2346 of file IfxEvadc.h.

◆ IfxEvadc_setFastCompareReferenceValue()

IFX_INLINE void IfxEvadc_setFastCompareReferenceValue | ( | Ifx_EVADC_FC * | evadcFC,
 |  | uint16 | referenceValue
 | ) |  |
Parameters
evadcFC | Pointer to EVADC register set for Fast Compare operation
referenceValue | The input level is compared to this value.
Returns
None

Definition at line 2926 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_initFastCompareChannel().

◆ IfxEvadc_setFastCompareRunControl()

IFX_INLINE void IfxEvadc_setFastCompareRunControl | ( | Ifx_EVADC_FC * | evadcFC,
 |  | IfxEvadc_FastCompareRunControl | mode
 | ) |  |

Defines the basic run conditions of the fast compare channel.

Parameters
evadcFC | Pointer to EVADC register set for Fast Compare operation
mode | Run mode of the fast compare channel.
Returns
None

Definition at line 2939 of file IfxEvadc.h.

◆ IfxEvadc_setFastCompareRunRampControl()

IFX_INLINE void IfxEvadc_setFastCompareRunRampControl | ( | Ifx_EVADC_FC * | evadcFC,
 |  | IfxEvadc_RampRunControl | rampStartMode
 | ) |  |
Parameters
evadcFC | Pointer to EVADC register set for Fast Compare operation
rampStartMode | Defines the run conditions for the ramp generation
Returns
None

Definition at line 2949 of file IfxEvadc.h.

◆ IfxEvadc_setFastCompareSampleTimeControl()

IFX_INLINE void IfxEvadc_setFastCompareSampleTimeControl | ( | Ifx_EVADC_FC * | evadcFC,
 |  | uint8 | additionalCycles
 | ) |  |

Setting additional sample time in FCCTRL.B.STCF.

Parameters
evadcFC | Pointer to EVADC register set for Fast Compare operation
additionalCycles | Number of additional clock cycles to be added to the minimum sample phase of 2 analog clock cycles
Returns
None

Definition at line 2959 of file IfxEvadc.h.

◆ IfxEvadc_setFastCompareServiceRequestGeneration()

IFX_INLINE void IfxEvadc_setFastCompareServiceRequestGeneration | ( | Ifx_EVADC_FC * | evadcFC,
 |  | IfxEvadc_FastCompareServiceRequestGeneration | mode
 | ) |  |

Sets when to generate service requests.

Parameters
evadcFC | Pointer to EVADC register set for Fast Compare operation
mode | Defines when to generate service requests
Returns
None

Definition at line 2993 of file IfxEvadc.h.

◆ IfxEvadc_setFastCompareTriggerInterval()

IFX_INLINE void IfxEvadc_setFastCompareTriggerInterval | ( | Ifx_EVADC_FC * | evadcFC,
 |  | uint8 | interval
 | ) |  |

Sets the interval at which fast compare operations are triggered in steps of 16 * 1/fADC.

Parameters
evadcFC | Pointer to EVADC register set for Fast Compare operation
interval | Defines the interval at which fast compare operations are triggered in steps of 16 * 1/f_ADC
Returns
None

Definition at line 3003 of file IfxEvadc.h.

◆ IfxEvadc_setFastCompareTriggerOperatingMode()

IFX_INLINE void IfxEvadc_setFastCompareTriggerOperatingMode | ( | Ifx_EVADC_FC * | evadcFC,
 |  | IfxEvadc_TriggerOperatingMode | mode
 | ) |  |
Parameters
evadcFC | Pointer to EVADC register set for Fast Compare operation
mode | External Trigger Operating Mode
Returns
None

Definition at line 3013 of file IfxEvadc.h.


iLLD_TC38A: EVADC Pin Mapping

Data Structures | Macros | Variables
EVADC Pin Mapping
iLLD » EVADC
Collaboration diagram for EVADC Pin Mapping:

Data Structures

struct | IfxEvadc_GxBfl_Out
EVADC Boundary Flag pin mapping structure. More...
struct | IfxEvadc_Emux_Out
EVADC External Mux pin mapping structure. More...
struct | IfxEvadc_Vadcg_In
EVADC Analog Input. More...

Macros

#define | IFXEVADC_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXEVADC_PINMAP_NUM_GROUPS 16
#define | IFXEVADC_PINMAP_EMUX_OUT_NUM_ITEMS 12
#define | IFXEVADC_PINMAP_GXBFL_OUT_NUM_ITEMS 3
#define | IFXEVADC_PINMAP_VADCG_IN_NUM_ITEMS 16

Variables

IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX00_P02_6_OUT
Control of external analog multiplexer interface 0. More...
IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX00_P33_3_OUT
Control of external analog multiplexer interface 0. More...
IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX01_P02_7_OUT
Control of external analog multiplexer interface 0. More...
IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX01_P33_2_OUT
Control of external analog multiplexer interface 0. More...
IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX02_P02_8_OUT
Control of external analog multiplexer interface 0. More...
IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX02_P33_1_OUT
Control of external analog multiplexer interface 0. More...
IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX10_P00_6_OUT
Control of external analog multiplexer interface 1. More...
IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX10_P33_6_OUT
Control of external analog multiplexer interface 1. More...
IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX11_P00_7_OUT
Control of external analog multiplexer interface 1. More...
IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX11_P33_5_OUT
Control of external analog multiplexer interface 1. More...
IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX12_P00_8_OUT
Control of external analog multiplexer interface 1. More...
IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX12_P33_4_OUT
Control of external analog multiplexer interface 1. More...
IFX_EXTERN IfxEvadc_GxBfl_Out IfxEvadc_FC0BFLOUT_P00_5_OUT
Boundary flag output, FC channel 0. More...
IFX_EXTERN IfxEvadc_GxBfl_Out IfxEvadc_FC0BFLOUT_P33_4_OUT
Boundary flag output, FC channel 0. More...
IFX_EXTERN IfxEvadc_GxBfl_Out IfxEvadc_FC1BFLOUT_P10_1_OUT
Boundary flag output, FC channel 1. More...
IFX_EXTERN IfxEvadc_GxBfl_Out IfxEvadc_FC1BFLOUT_P33_6_OUT
Boundary flag output, FC channel 1. More...
IFX_EXTERN IfxEvadc_GxBfl_Out IfxEvadc_FC2BFLOUT_P00_7_OUT
Boundary flag output, FC channel 2. More...
IFX_EXTERN IfxEvadc_GxBfl_Out IfxEvadc_FC2BFLOUT_P33_0_OUT
Boundary flag output, FC channel 2. More...
IFX_EXTERN IfxEvadc_GxBfl_Out IfxEvadc_FC2BFLOUT_P33_5_OUT
Boundary flag output, FC channel 2. More...
IFX_EXTERN IfxEvadc_GxBfl_Out IfxEvadc_FC3BFLOUT_P10_2_OUT
Boundary flag output, FC channel 3. More...
IFX_EXTERN IfxEvadc_GxBfl_Out IfxEvadc_FC3BFLOUT_P33_2_OUT
Boundary flag output, FC channel 3. More...
IFX_EXTERN IfxEvadc_GxBfl_Out IfxEvadc_FC3BFLOUT_P33_7_OUT
Boundary flag output, FC channel 3. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_FC0CH0_AN16_IN
Analog input FC channel 0. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_FC1CH0_P40_10_IN
Analog input FC channel 1. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_FC2CH0_P00_12_IN
Analog input FC channel 2. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_FC3CH0_P00_11_IN
Analog input FC channel 3. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G0CH0_AN0_IN
Analog input channel 0, group 0. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G0CH1_AN1_IN
Analog input channel 1, group 0. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G0CH2_AN2_IN
Analog input channel 2, group 0. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G0CH3_AN3_IN
Analog input channel 3, group 0. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G0CH4_AN4_IN
Analog input channel 4, group 0. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G0CH5_AN5_IN
Analog input channel 5, group 0. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G0CH6_AN6_IN
Analog input channel 6, group 0. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G0CH7_AN7_IN
Analog input channel 7, group 0. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH0_P33_7_IN
Analog input channel 0, group 10. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH10_P34_2_IN
Analog input channel 10, group 10. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH11_P34_1_IN
Analog input channel 11, group 10. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH1_P33_6_IN
Analog input channel 1, group 10. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH2_P33_5_IN
Analog input channel 2, group 10. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH3_P33_4_IN
Analog input channel 3, group 10. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH4_P33_3_IN
Analog input channel 4, group 10. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH5_P33_2_IN
Analog input channel 5, group 10. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH6_P33_1_IN
Analog input channel 6, group 10. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH7_P33_0_IN
Analog input channel 7, group 10. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH8_P34_4_IN
Analog input channel 8, group 10. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH9_P34_3_IN
Analog input channel 9, group 10. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH0_AN4_IN
Analog input channel 0, group 11. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH10_P40_2_IN
Analog input channel 10, group 11. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH11_P40_3_IN
Analog input channel 11, group 11. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH12_P40_4_IN
Analog input channel 12, group 11. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH13_P40_5_IN
Analog input channel 13, group 11. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH14_AN34_IN
Analog input channel 14, group 11. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH15_AN35_IN
Analog input channel 15, group 11. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH1_AN5_IN
Analog input channel 1, group 11. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH2_AN6_IN
Analog input channel 2, group 11. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH3_AN7_IN
Analog input channel 3, group 11. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH4_AN8_IN
Analog input channel 4, group 11. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH5_AN9_IN
Analog input channel 5, group 11. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH6_AN10_IN
Analog input channel 6, group 11. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH7_AN11_IN
Analog input channel 7, group 11. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH8_P40_11_IN
Analog input channel 8, group 11. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH9_P40_12_IN
Analog input channel 9, group 11. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G1CH0_AN8_IN
Analog input channel 0, group 1. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G1CH1_AN9_IN
Analog input channel 1, group 1. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G1CH2_AN10_IN
Analog input channel 2, group 1. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G1CH3_AN11_IN
Analog input channel 3, group 1. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G1CH4_AN12_IN
Analog input channel 4, group 1. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G1CH5_AN13_IN
Analog input channel 5, group 1. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G1CH6_AN14_IN
Analog input channel 6, group 1. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G1CH7_AN15_IN
Analog input channel 7, group 1. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G2CH0_AN16_IN
Analog input channel 0, group 2. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G2CH1_P40_10_IN
Analog input channel 1, group 2. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G2CH2_P40_11_IN
Analog input channel 2, group 2. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G2CH3_P40_12_IN
Analog input channel 3, group 2. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G2CH4_AN20_IN
Analog input channel 4, group 2. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G2CH5_AN21_IN
Analog input channel 5, group 2. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G2CH6_AN22_IN
Analog input channel 6, group 2. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G2CH7_AN23_IN
Analog input channel 7, group 2. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G3CH0_P40_0_IN
Analog input channel 0, group 3. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G3CH1_P40_1_IN
Analog input channel 1, group 3. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G3CH2_P40_2_IN
Analog input channel 2, group 3. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G3CH3_P40_3_IN
Analog input channel 3, group 3. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G3CH4_P40_13_IN
Analog input channel 4, group 3. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G3CH5_P40_14_IN
Analog input channel 5, group 3. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G3CH6_AN30_IN
Analog input channel 6, group 3. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G3CH7_AN31_IN
Analog input channel 7, group 3. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G4CH0_AN40_IN
Analog input channel 0, group 4. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G4CH1_AN41_IN
Analog input channel 1, group 4. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G4CH2_AN42_IN
Analog input channel 2, group 4. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G4CH3_AN43_IN
Analog input channel 3, group 4. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G4CH4_P40_13_IN
Analog input channel 4, group 4. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G4CH5_P40_14_IN
Analog input channel 5, group 4. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G4CH6_AN30_IN
Analog input channel 6, group 4. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G4CH7_AN31_IN
Analog input channel 7, group 4. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G5CH0_AN48_IN
Analog input channel 0, group 5. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G5CH1_AN49_IN
Analog input channel 1, group 5. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G5CH2_AN50_IN
Analog input channel 2, group 5. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G5CH3_AN51_IN
Analog input channel 3, group 5. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G5CH4_AN52_IN
Analog input channel 4, group 5. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G5CH5_AN53_IN
Analog input channel 5, group 5. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G5CH6_P41_4_IN
Analog input channel 6, group 5. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G5CH7_P41_5_IN
Analog input channel 7, group 5. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G6CH0_AN56_IN
Analog input channel 0, group 6. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G6CH1_AN57_IN
Analog input channel 1, group 6. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G6CH2_AN58_IN
Analog input channel 2, group 6. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G6CH3_AN59_IN
Analog input channel 3, group 6. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G6CH4_AN60_IN
Analog input channel 4, group 6. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G6CH5_AN61_IN
Analog input channel 5, group 6. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G6CH6_P41_6_IN
Analog input channel 6, group 6. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G6CH7_P41_7_IN
Analog input channel 7, group 6. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G7CH0_P41_8_IN
Analog input channel 0, group 7. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G7CH1_AN65_IN
Analog input channel 1, group 7. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G7CH2_AN66_IN
Analog input channel 2, group 7. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G7CH3_P40_15_IN
Analog input channel 3, group 7. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G7CH4_P41_0_IN
Analog input channel 4, group 7. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G7CH5_P41_1_IN
Analog input channel 5, group 7. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G7CH6_P41_2_IN
Analog input channel 6, group 7. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G7CH7_P41_3_IN
Analog input channel 7, group 7. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH0_P40_4_IN
Analog input channel 0, group 8. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH10_AN42_IN
Analog input channel 10, group 8. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH11_AN43_IN
Analog input channel 11, group 8. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH12_AN44_IN
Analog input channel 12, group 8. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH13_AN45_IN
Analog input channel 13, group 8. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH14_AN46_IN
Analog input channel 14, group 8. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH15_AN47_IN
Analog input channel 15, group 8. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH1_P40_5_IN
Analog input channel 1, group 8. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH2_AN34_IN
Analog input channel 2, group 8. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH3_AN35_IN
Analog input channel 3, group 8. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH4_P40_6_IN
Analog input channel 4, group 8. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH5_P40_7_IN
Analog input channel 5, group 8. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH6_P40_8_IN
Analog input channel 6, group 8. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH7_P40_9_IN
Analog input channel 7, group 8. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH8_AN40_IN
Analog input channel 8, group 8. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH9_AN41_IN
Analog input channel 9, group 8. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH0_P00_12_IN
Analog input channel 0, group 9. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH10_P00_2_IN
Analog input channel 10, group 9. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH11_P00_1_IN
Analog input channel 11, group 9. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH12_P01_5_IN
Analog input channel 12, group 9. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH13_P01_4_IN
Analog input channel 13, group 9. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH14_P01_3_IN
Analog input channel 14, group 9. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH15_P02_11_IN
Analog input channel 15, group 9. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH1_P00_11_IN
Analog input channel 1, group 9. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH2_P00_10_IN
Analog input channel 2, group 9. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH3_P00_9_IN
Analog input channel 3, group 9. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH4_P00_8_IN
Analog input channel 4, group 9. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH5_P00_7_IN
Analog input channel 5, group 9. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH6_P00_6_IN
Analog input channel 6, group 9. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH7_P00_5_IN
Analog input channel 7, group 9. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH8_P00_4_IN
Analog input channel 8, group 9. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH9_P00_3_IN
Analog input channel 9, group 9. More...
IFX_EXTERN const IfxEvadc_Emux_Out * | IfxEvadc_Emux_Out_pinTable [IFXEVADC_PINMAP_NUM_MODULES][IFXEVADC_PINMAP_EMUX_OUT_NUM_ITEMS]
IfxEvadc_Emux_Out table. More...
IFX_EXTERN const IfxEvadc_GxBfl_Out * | IfxEvadc_GxBfl_Out_pinTable [IFXEVADC_PINMAP_NUM_MODULES][IFXEVADC_PINMAP_NUM_GROUPS][IFXEVADC_PINMAP_GXBFL_OUT_NUM_ITEMS]
IfxEvadc_GxBfl_Out table. More...
IFX_EXTERN const IfxEvadc_Vadcg_In * | IfxEvadc_Vadcg_In_pinTable [IFXEVADC_PINMAP_NUM_MODULES][IFXEVADC_PINMAP_NUM_GROUPS][IFXEVADC_PINMAP_VADCG_IN_NUM_ITEMS]
IfxEvadc_Vadcg_In table. More...

Detailed Description

Data Structure Documentation

◆ IfxEvadc_GxBfl_Out

struct IfxEvadc_GxBfl_Out

EVADC Boundary Flag pin mapping structure.

Definition at line 56 of file IfxEvadc_PinMap.h.

Collaboration diagram for IfxEvadc_GxBfl_Out:
[legend]
Data Fields
IfxEvadc_GroupId | groupId | Group ID.
Ifx_EVADC * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxEvadc_Emux_Out

struct IfxEvadc_Emux_Out

EVADC External Mux pin mapping structure.

Definition at line 65 of file IfxEvadc_PinMap.h.

Collaboration diagram for IfxEvadc_Emux_Out:
[legend]
Data Fields
Ifx_EVADC * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxEvadc_Vadcg_In

struct IfxEvadc_Vadcg_In

EVADC Analog Input.

Definition at line 73 of file IfxEvadc_PinMap.h.

Collaboration diagram for IfxEvadc_Vadcg_In:
[legend]
Data Fields
uint8 | channelId | Channel ID.
IfxEvadc_GroupId | groupId | Group ID.
Ifx_EVADC * | module | Base address.
IfxPort_Pin | pin | Port pin.

Macro Definition Documentation

◆ IFXEVADC_PINMAP_EMUX_OUT_NUM_ITEMS

#define IFXEVADC_PINMAP_EMUX_OUT_NUM_ITEMS 12

Definition at line 235 of file IfxEvadc_PinMap.h.

◆ IFXEVADC_PINMAP_GXBFL_OUT_NUM_ITEMS

#define IFXEVADC_PINMAP_GXBFL_OUT_NUM_ITEMS 3

Definition at line 236 of file IfxEvadc_PinMap.h.

◆ IFXEVADC_PINMAP_NUM_GROUPS

#define IFXEVADC_PINMAP_NUM_GROUPS 16

Definition at line 234 of file IfxEvadc_PinMap.h.

◆ IFXEVADC_PINMAP_NUM_MODULES

#define IFXEVADC_PINMAP_NUM_MODULES 1

Table dimensions.

Definition at line 233 of file IfxEvadc_PinMap.h.

◆ IFXEVADC_PINMAP_VADCG_IN_NUM_ITEMS

#define IFXEVADC_PINMAP_VADCG_IN_NUM_ITEMS 16

Definition at line 237 of file IfxEvadc_PinMap.h.

Variable Documentation

◆ IfxEvadc_EMUX00_P02_6_OUT

IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX00_P02_6_OUT

Control of external analog multiplexer interface 0.

Definition at line 81 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_EMUX00_P33_3_OUT

IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX00_P33_3_OUT

Control of external analog multiplexer interface 0.

Definition at line 82 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_EMUX01_P02_7_OUT

IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX01_P02_7_OUT

Control of external analog multiplexer interface 0.

Definition at line 83 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_EMUX01_P33_2_OUT

IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX01_P33_2_OUT

Control of external analog multiplexer interface 0.

Definition at line 84 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_EMUX02_P02_8_OUT

IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX02_P02_8_OUT

Control of external analog multiplexer interface 0.

Definition at line 85 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_EMUX02_P33_1_OUT

IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX02_P33_1_OUT

Control of external analog multiplexer interface 0.

Definition at line 86 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_EMUX10_P00_6_OUT

IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX10_P00_6_OUT

Control of external analog multiplexer interface 1.

Definition at line 87 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_EMUX10_P33_6_OUT

IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX10_P33_6_OUT

Control of external analog multiplexer interface 1.

Definition at line 88 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_EMUX11_P00_7_OUT

IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX11_P00_7_OUT

Control of external analog multiplexer interface 1.

Definition at line 89 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_EMUX11_P33_5_OUT

IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX11_P33_5_OUT

Control of external analog multiplexer interface 1.

Definition at line 90 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_EMUX12_P00_8_OUT

IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX12_P00_8_OUT

Control of external analog multiplexer interface 1.

Definition at line 91 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_EMUX12_P33_4_OUT

IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX12_P33_4_OUT

Control of external analog multiplexer interface 1.

Definition at line 92 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_Emux_Out_pinTable

IFX_EXTERN const IfxEvadc_Emux_Out* IfxEvadc_Emux_Out_pinTable[IFXEVADC_PINMAP_NUM_MODULES][IFXEVADC_PINMAP_EMUX_OUT_NUM_ITEMS]

IfxEvadc_Emux_Out table.

Definition at line 241 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_FC0BFLOUT_P00_5_OUT

IFX_EXTERN IfxEvadc_GxBfl_Out IfxEvadc_FC0BFLOUT_P00_5_OUT

Boundary flag output, FC channel 0.

Definition at line 93 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_FC0BFLOUT_P33_4_OUT

IFX_EXTERN IfxEvadc_GxBfl_Out IfxEvadc_FC0BFLOUT_P33_4_OUT

Boundary flag output, FC channel 0.

Definition at line 94 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_FC0CH0_AN16_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_FC0CH0_AN16_IN

Analog input FC channel 0.

Definition at line 103 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_FC1BFLOUT_P10_1_OUT

IFX_EXTERN IfxEvadc_GxBfl_Out IfxEvadc_FC1BFLOUT_P10_1_OUT

Boundary flag output, FC channel 1.

Definition at line 95 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_FC1BFLOUT_P33_6_OUT

IFX_EXTERN IfxEvadc_GxBfl_Out IfxEvadc_FC1BFLOUT_P33_6_OUT

Boundary flag output, FC channel 1.

Definition at line 96 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_FC1CH0_P40_10_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_FC1CH0_P40_10_IN

Analog input FC channel 1.

Definition at line 104 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_FC2BFLOUT_P00_7_OUT

IFX_EXTERN IfxEvadc_GxBfl_Out IfxEvadc_FC2BFLOUT_P00_7_OUT

Boundary flag output, FC channel 2.

Definition at line 97 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_FC2BFLOUT_P33_0_OUT

IFX_EXTERN IfxEvadc_GxBfl_Out IfxEvadc_FC2BFLOUT_P33_0_OUT

Boundary flag output, FC channel 2.

Definition at line 98 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_FC2BFLOUT_P33_5_OUT

IFX_EXTERN IfxEvadc_GxBfl_Out IfxEvadc_FC2BFLOUT_P33_5_OUT

Boundary flag output, FC channel 2.

Definition at line 99 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_FC2CH0_P00_12_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_FC2CH0_P00_12_IN

Analog input FC channel 2.

Definition at line 105 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_FC3BFLOUT_P10_2_OUT

IFX_EXTERN IfxEvadc_GxBfl_Out IfxEvadc_FC3BFLOUT_P10_2_OUT

Boundary flag output, FC channel 3.

Definition at line 100 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_FC3BFLOUT_P33_2_OUT

IFX_EXTERN IfxEvadc_GxBfl_Out IfxEvadc_FC3BFLOUT_P33_2_OUT

Boundary flag output, FC channel 3.

Definition at line 101 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_FC3BFLOUT_P33_7_OUT

IFX_EXTERN IfxEvadc_GxBfl_Out IfxEvadc_FC3BFLOUT_P33_7_OUT

Boundary flag output, FC channel 3.

Definition at line 102 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_FC3CH0_P00_11_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_FC3CH0_P00_11_IN

Analog input FC channel 3.

Definition at line 106 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G0CH0_AN0_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G0CH0_AN0_IN

Analog input channel 0, group 0.

Definition at line 107 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G0CH1_AN1_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G0CH1_AN1_IN

Analog input channel 1, group 0.

Definition at line 108 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G0CH2_AN2_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G0CH2_AN2_IN

Analog input channel 2, group 0.

Definition at line 109 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G0CH3_AN3_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G0CH3_AN3_IN

Analog input channel 3, group 0.

Definition at line 110 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G0CH4_AN4_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G0CH4_AN4_IN

Analog input channel 4, group 0.

Definition at line 111 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G0CH5_AN5_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G0CH5_AN5_IN

Analog input channel 5, group 0.

Definition at line 112 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G0CH6_AN6_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G0CH6_AN6_IN

Analog input channel 6, group 0.

Definition at line 113 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G0CH7_AN7_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G0CH7_AN7_IN

Analog input channel 7, group 0.

Definition at line 114 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G10CH0_P33_7_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH0_P33_7_IN

Analog input channel 0, group 10.

Definition at line 115 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G10CH10_P34_2_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH10_P34_2_IN

Analog input channel 10, group 10.

Definition at line 116 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G10CH11_P34_1_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH11_P34_1_IN

Analog input channel 11, group 10.

Definition at line 117 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G10CH1_P33_6_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH1_P33_6_IN

Analog input channel 1, group 10.

Definition at line 118 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G10CH2_P33_5_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH2_P33_5_IN

Analog input channel 2, group 10.

Definition at line 119 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G10CH3_P33_4_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH3_P33_4_IN

Analog input channel 3, group 10.

Definition at line 120 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G10CH4_P33_3_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH4_P33_3_IN

Analog input channel 4, group 10.

Definition at line 121 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G10CH5_P33_2_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH5_P33_2_IN

Analog input channel 5, group 10.

Definition at line 122 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G10CH6_P33_1_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH6_P33_1_IN

Analog input channel 6, group 10.

Definition at line 123 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G10CH7_P33_0_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH7_P33_0_IN

Analog input channel 7, group 10.

Definition at line 124 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G10CH8_P34_4_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH8_P34_4_IN

Analog input channel 8, group 10.

Definition at line 125 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G10CH9_P34_3_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH9_P34_3_IN

Analog input channel 9, group 10.

Definition at line 126 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G11CH0_AN4_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH0_AN4_IN

Analog input channel 0, group 11.

Definition at line 127 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G11CH10_P40_2_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH10_P40_2_IN

Analog input channel 10, group 11.

Definition at line 128 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G11CH11_P40_3_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH11_P40_3_IN

Analog input channel 11, group 11.

Definition at line 129 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G11CH12_P40_4_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH12_P40_4_IN

Analog input channel 12, group 11.

Definition at line 130 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G11CH13_P40_5_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH13_P40_5_IN

Analog input channel 13, group 11.

Definition at line 131 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G11CH14_AN34_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH14_AN34_IN

Analog input channel 14, group 11.

Definition at line 132 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G11CH15_AN35_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH15_AN35_IN

Analog input channel 15, group 11.

Definition at line 133 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G11CH1_AN5_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH1_AN5_IN

Analog input channel 1, group 11.

Definition at line 134 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G11CH2_AN6_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH2_AN6_IN

Analog input channel 2, group 11.

Definition at line 135 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G11CH3_AN7_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH3_AN7_IN

Analog input channel 3, group 11.

Definition at line 136 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G11CH4_AN8_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH4_AN8_IN

Analog input channel 4, group 11.

Definition at line 137 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G11CH5_AN9_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH5_AN9_IN

Analog input channel 5, group 11.

Definition at line 138 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G11CH6_AN10_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH6_AN10_IN

Analog input channel 6, group 11.

Definition at line 139 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G11CH7_AN11_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH7_AN11_IN

Analog input channel 7, group 11.

Definition at line 140 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G11CH8_P40_11_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH8_P40_11_IN

Analog input channel 8, group 11.

Definition at line 141 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G11CH9_P40_12_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH9_P40_12_IN

Analog input channel 9, group 11.

Definition at line 142 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G1CH0_AN8_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G1CH0_AN8_IN

Analog input channel 0, group 1.

Definition at line 143 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G1CH1_AN9_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G1CH1_AN9_IN

Analog input channel 1, group 1.

Definition at line 144 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G1CH2_AN10_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G1CH2_AN10_IN

Analog input channel 2, group 1.

Definition at line 145 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G1CH3_AN11_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G1CH3_AN11_IN

Analog input channel 3, group 1.

Definition at line 146 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G1CH4_AN12_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G1CH4_AN12_IN

Analog input channel 4, group 1.

Definition at line 147 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G1CH5_AN13_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G1CH5_AN13_IN

Analog input channel 5, group 1.

Definition at line 148 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G1CH6_AN14_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G1CH6_AN14_IN

Analog input channel 6, group 1.

Definition at line 149 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G1CH7_AN15_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G1CH7_AN15_IN

Analog input channel 7, group 1.

Definition at line 150 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G2CH0_AN16_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G2CH0_AN16_IN

Analog input channel 0, group 2.

Definition at line 151 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G2CH1_P40_10_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G2CH1_P40_10_IN

Analog input channel 1, group 2.

Definition at line 152 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G2CH2_P40_11_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G2CH2_P40_11_IN

Analog input channel 2, group 2.

Definition at line 153 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G2CH3_P40_12_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G2CH3_P40_12_IN

Analog input channel 3, group 2.

Definition at line 154 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G2CH4_AN20_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G2CH4_AN20_IN

Analog input channel 4, group 2.

Definition at line 155 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G2CH5_AN21_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G2CH5_AN21_IN

Analog input channel 5, group 2.

Definition at line 156 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G2CH6_AN22_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G2CH6_AN22_IN

Analog input channel 6, group 2.

Definition at line 157 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G2CH7_AN23_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G2CH7_AN23_IN

Analog input channel 7, group 2.

Definition at line 158 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G3CH0_P40_0_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G3CH0_P40_0_IN

Analog input channel 0, group 3.

Definition at line 159 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G3CH1_P40_1_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G3CH1_P40_1_IN

Analog input channel 1, group 3.

Definition at line 160 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G3CH2_P40_2_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G3CH2_P40_2_IN

Analog input channel 2, group 3.

Definition at line 161 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G3CH3_P40_3_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G3CH3_P40_3_IN

Analog input channel 3, group 3.

Definition at line 162 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G3CH4_P40_13_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G3CH4_P40_13_IN

Analog input channel 4, group 3.

Definition at line 163 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G3CH5_P40_14_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G3CH5_P40_14_IN

Analog input channel 5, group 3.

Definition at line 164 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G3CH6_AN30_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G3CH6_AN30_IN

Analog input channel 6, group 3.

Definition at line 165 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G3CH7_AN31_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G3CH7_AN31_IN

Analog input channel 7, group 3.

Definition at line 166 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G4CH0_AN40_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G4CH0_AN40_IN

Analog input channel 0, group 4.

Definition at line 167 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G4CH1_AN41_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G4CH1_AN41_IN

Analog input channel 1, group 4.

Definition at line 168 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G4CH2_AN42_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G4CH2_AN42_IN

Analog input channel 2, group 4.

Definition at line 169 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G4CH3_AN43_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G4CH3_AN43_IN

Analog input channel 3, group 4.

Definition at line 170 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G4CH4_P40_13_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G4CH4_P40_13_IN

Analog input channel 4, group 4.

Definition at line 171 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G4CH5_P40_14_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G4CH5_P40_14_IN

Analog input channel 5, group 4.

Definition at line 172 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G4CH6_AN30_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G4CH6_AN30_IN

Analog input channel 6, group 4.

Definition at line 173 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G4CH7_AN31_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G4CH7_AN31_IN

Analog input channel 7, group 4.

Definition at line 174 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G5CH0_AN48_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G5CH0_AN48_IN

Analog input channel 0, group 5.

Definition at line 175 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G5CH1_AN49_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G5CH1_AN49_IN

Analog input channel 1, group 5.

Definition at line 176 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G5CH2_AN50_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G5CH2_AN50_IN

Analog input channel 2, group 5.

Definition at line 177 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G5CH3_AN51_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G5CH3_AN51_IN

Analog input channel 3, group 5.

Definition at line 178 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G5CH4_AN52_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G5CH4_AN52_IN

Analog input channel 4, group 5.

Definition at line 179 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G5CH5_AN53_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G5CH5_AN53_IN

Analog input channel 5, group 5.

Definition at line 180 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G5CH6_P41_4_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G5CH6_P41_4_IN

Analog input channel 6, group 5.

Definition at line 181 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G5CH7_P41_5_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G5CH7_P41_5_IN

Analog input channel 7, group 5.

Definition at line 182 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G6CH0_AN56_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G6CH0_AN56_IN

Analog input channel 0, group 6.

Definition at line 183 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G6CH1_AN57_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G6CH1_AN57_IN

Analog input channel 1, group 6.

Definition at line 184 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G6CH2_AN58_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G6CH2_AN58_IN

Analog input channel 2, group 6.

Definition at line 185 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G6CH3_AN59_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G6CH3_AN59_IN

Analog input channel 3, group 6.

Definition at line 186 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G6CH4_AN60_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G6CH4_AN60_IN

Analog input channel 4, group 6.

Definition at line 187 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G6CH5_AN61_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G6CH5_AN61_IN

Analog input channel 5, group 6.

Definition at line 188 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G6CH6_P41_6_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G6CH6_P41_6_IN

Analog input channel 6, group 6.

Definition at line 189 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G6CH7_P41_7_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G6CH7_P41_7_IN

Analog input channel 7, group 6.

Definition at line 190 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G7CH0_P41_8_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G7CH0_P41_8_IN

Analog input channel 0, group 7.

Definition at line 191 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G7CH1_AN65_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G7CH1_AN65_IN

Analog input channel 1, group 7.

Definition at line 192 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G7CH2_AN66_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G7CH2_AN66_IN

Analog input channel 2, group 7.

Definition at line 193 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G7CH3_P40_15_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G7CH3_P40_15_IN

Analog input channel 3, group 7.

Definition at line 194 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G7CH4_P41_0_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G7CH4_P41_0_IN

Analog input channel 4, group 7.

Definition at line 195 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G7CH5_P41_1_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G7CH5_P41_1_IN

Analog input channel 5, group 7.

Definition at line 196 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G7CH6_P41_2_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G7CH6_P41_2_IN

Analog input channel 6, group 7.

Definition at line 197 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G7CH7_P41_3_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G7CH7_P41_3_IN

Analog input channel 7, group 7.

Definition at line 198 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G8CH0_P40_4_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH0_P40_4_IN

Analog input channel 0, group 8.

Definition at line 199 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G8CH10_AN42_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH10_AN42_IN

Analog input channel 10, group 8.

Definition at line 200 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G8CH11_AN43_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH11_AN43_IN

Analog input channel 11, group 8.

Definition at line 201 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G8CH12_AN44_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH12_AN44_IN

Analog input channel 12, group 8.

Definition at line 202 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G8CH13_AN45_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH13_AN45_IN

Analog input channel 13, group 8.

Definition at line 203 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G8CH14_AN46_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH14_AN46_IN

Analog input channel 14, group 8.

Definition at line 204 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G8CH15_AN47_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH15_AN47_IN

Analog input channel 15, group 8.

Definition at line 205 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G8CH1_P40_5_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH1_P40_5_IN

Analog input channel 1, group 8.

Definition at line 206 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G8CH2_AN34_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH2_AN34_IN

Analog input channel 2, group 8.

Definition at line 207 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G8CH3_AN35_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH3_AN35_IN

Analog input channel 3, group 8.

Definition at line 208 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G8CH4_P40_6_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH4_P40_6_IN

Analog input channel 4, group 8.

Definition at line 209 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G8CH5_P40_7_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH5_P40_7_IN

Analog input channel 5, group 8.

Definition at line 210 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G8CH6_P40_8_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH6_P40_8_IN

Analog input channel 6, group 8.

Definition at line 211 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G8CH7_P40_9_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH7_P40_9_IN

Analog input channel 7, group 8.

Definition at line 212 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G8CH8_AN40_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH8_AN40_IN

Analog input channel 8, group 8.

Definition at line 213 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G8CH9_AN41_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH9_AN41_IN

Analog input channel 9, group 8.

Definition at line 214 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G9CH0_P00_12_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH0_P00_12_IN

Analog input channel 0, group 9.

Definition at line 215 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G9CH10_P00_2_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH10_P00_2_IN

Analog input channel 10, group 9.

Definition at line 216 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G9CH11_P00_1_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH11_P00_1_IN

Analog input channel 11, group 9.

Definition at line 217 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G9CH12_P01_5_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH12_P01_5_IN

Analog input channel 12, group 9.

Definition at line 218 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G9CH13_P01_4_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH13_P01_4_IN

Analog input channel 13, group 9.

Definition at line 219 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G9CH14_P01_3_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH14_P01_3_IN

Analog input channel 14, group 9.

Definition at line 220 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G9CH15_P02_11_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH15_P02_11_IN

Analog input channel 15, group 9.

Definition at line 221 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G9CH1_P00_11_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH1_P00_11_IN

Analog input channel 1, group 9.

Definition at line 222 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G9CH2_P00_10_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH2_P00_10_IN

Analog input channel 2, group 9.

Definition at line 223 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G9CH3_P00_9_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH3_P00_9_IN

Analog input channel 3, group 9.

Definition at line 224 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G9CH4_P00_8_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH4_P00_8_IN

Analog input channel 4, group 9.

Definition at line 225 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G9CH5_P00_7_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH5_P00_7_IN

Analog input channel 5, group 9.

Definition at line 226 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G9CH6_P00_6_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH6_P00_6_IN

Analog input channel 6, group 9.

Definition at line 227 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G9CH7_P00_5_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH7_P00_5_IN

Analog input channel 7, group 9.

Definition at line 228 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G9CH8_P00_4_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH8_P00_4_IN

Analog input channel 8, group 9.

Definition at line 229 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_G9CH9_P00_3_IN

IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH9_P00_3_IN

Analog input channel 9, group 9.

Definition at line 230 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_GxBfl_Out_pinTable

IFX_EXTERN const IfxEvadc_GxBfl_Out* IfxEvadc_GxBfl_Out_pinTable[IFXEVADC_PINMAP_NUM_MODULES][IFXEVADC_PINMAP_NUM_GROUPS][IFXEVADC_PINMAP_GXBFL_OUT_NUM_ITEMS]

IfxEvadc_GxBfl_Out table.

Definition at line 244 of file IfxEvadc_PinMap.h.

◆ IfxEvadc_Vadcg_In_pinTable

IFX_EXTERN const IfxEvadc_Vadcg_In* IfxEvadc_Vadcg_In_pinTable[IFXEVADC_PINMAP_NUM_MODULES][IFXEVADC_PINMAP_NUM_GROUPS][IFXEVADC_PINMAP_VADCG_IN_NUM_ITEMS]

IfxEvadc_Vadcg_In table.

Definition at line 247 of file IfxEvadc_PinMap.h.


iLLD_TC38A: How to use the EVADC ADC Interface driver?

How to use the EVADC ADC Interface driver?
iLLD » EVADC
Collaboration diagram for How to use the EVADC ADC Interface driver?:

EVADC comprises of independent analog channels with Analog/Digital converters to convert analog input to discrete digital output.

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Evadc/Adc/IfxEvadc_Adc.h>

Variables

// EVADC handle
IfxEvadc_Adc evadc;
IfxEvadc_Adc_Group adcGroup;

Module Initialisation

The module initialisation can be done in the same function:

// create configuration
IfxEvadc_Adc_Config adcConfig;
IfxEvadc_Adc_initModuleConfig(&adcConfig, &MODULE_EVADC);
// initialize module
// IfxEvadc_Adc evadc; // declared globally
IfxEvadc_Adc_initModule(&evadc, &adcConfig);

Group Initialisation

The group initialisation can be done in the same function. NOTE: By default startupCalibration = FALSE in IfxEvadc_Adc_initGroupConfig() and startupCalibrationControl = IfxEvadc_StartupCalibration_noAction in IfxEvadc_Adc_initModuleConfig().

In case startup calibration is required, while configuring the last group, startupCalibration inside group config structure must be set to TRUE after calling IfxEvadc_Adc_initGroupConfig() and before calling IfxEvadc_Adc_initGroup().

// create group config
IfxEvadc_Adc_GroupConfig adcGroupConfig;
IfxEvadc_Adc_initGroupConfig(&adcGroupConfig, &evadc);
// change group (default is GroupId_0, change to GroupId_3)
adcGroupConfig.groupId = IfxEvadc_GroupId_3;
adcGroupConfig.master = adcGroupConfig.groupId;
adcGroupConfig.startupCalibration =TRUE;
// enable all arbiter request sources
adcGroupConfig.arbiter.requestSlotQueue0Enabled = TRUE; // enable Queue0 mode
adcGroupConfig.arbiter.requestSlotQueue1Enabled = TRUE; // enable Queue1 mode
adcGroupConfig.arbiter.requestSlotQueue2Enabled = TRUE; // enable Queue2 mode
// enable all gates in "always" mode (no edge detection)
adcGroupConfig.queueRequest[0].triggerConfig.gatingMode = IfxEvadc_GatingMode_always;
adcGroupConfig.queueRequest[1].triggerConfig.gatingMode = IfxEvadc_GatingMode_always;
adcGroupConfig.queueRequest[2].triggerConfig.gatingMode = IfxEvadc_GatingMode_always;
// initialize the group
//IfxEvadc_Adc_Group adcGroup;//declared globally
IfxEvadc_Adc_initGroup(&adcGroup, &adcGroupConfig);

Queued Transfers

Now, EVADC is initialised. Here,Three channels are used for queued transfers

// IMPORTANT: for deterministic results we have to disable the queue gate
// while filling the queue, otherwise results could be output in the wrong order
IfxEvadc_RequestSource requestSource = IfxEvadc_RequestSource_queue0;
IfxEvadc_GatingMode savedGate = IfxEvadc_getQueueSlotGatingMode(adcGroup.group,requestSource);
IfxEvadc_GatingSource gatingSource = IfxEvadc_getQueueSlotGatingSource(adcGroup.group, requestSource );
IfxEvadc_setQueueSlotGatingConfig(adcGroup.group, gatingSource, IfxEvadc_GatingMode_disabled, requestSource );
// create channel config
IfxEvadc_Adc_ChannelConfig adcChannelConfig[3];
IfxEvadc_Adc_Channel adcChannel[3];
for(int chnIx=0; chnIx<3; ++chnIx) {
IfxEvadc_Adc_initChannelConfig(&adcChannelConfig[chnIx], &adcGroup);
adcChannelConfig[chnIx].channelId = (IfxEvadc_ChannelId)(chnIx);
adcChannelConfig[chnIx].resultRegister = IfxEvadc_ChannelResult_1; // use result register #1 for all channels
// initialize the channel
IfxEvadc_Adc_initChannel(&adcChannel[chnIx], &adcChannelConfig[chnIx]);
// Add channel to queue with refill enabled
IfxEvadc_Adc_addToQueue(&adcChannel[chnIx], requestSource, IFXEVADC_QUEUE_REFILL);
}
// restore previous gate config
IfxEvadc_setQueueSlotGatingConfig(adcGroup.group, gatingSource, savedGate, requestSource );
// start the Queue
IfxEvadc_Adc_startQueue(&adcGroup, requestSource); // just for the case that somebody copy&pastes the code - the queue has already been started in previous test
// get 10 results for all 3 channels and store in temporary buffer
// (the usage of a buffer is required, since the print statements used by the checks take more time than the conversions)
Ifx_EVADC_G_RES resultTrace[3*10];
for(int i=0; i<3*10; ++i)
{
unsigned chnIx = i % 3;
// wait for valid result
Ifx_EVADC_G_RES conversionResult;
do {
conversionResult = IfxEvadc_Adc_getResult(&adcChannel[chnIx]);
} while( !conversionResult.B.VF );
// store result
resultTrace[i] = conversionResult;
}
// stop the queue
IfxEvadc_Adc_clearQueue(&adcGroup, requestSource);
// check results in buffer
// ...

External Multiplexer Configuration

External Configuration of 3 channels at channel 3

IfxEvadc_Adc_EmuxControl emuxConfig;
IfxEvadc_Adc_initExternalMultiplexerModeConfig(&emuxConfig,evadc);
emuxConfig.groupId = IfxEvadc_GroupId_1;
emuxConfig.channels = (uint8)IfxEvadc_ChannelId_3;
emuxConfig.startChannel = IfxEvadc_EmuxSelectValue_2; // it will take 0 to 2 external channel
emuxConfig.sampleTimeControl = IfxEvadc_EmuxSampleTimeControl_always;
emuxConfig.mode = IfxEvadc_ExternalMultiplexerMode_steady;
IfxEvadc_Adc_EmuxPinConfig pinsConfig ={
.pins={ &IfxEvadc_EMUX00_P02_6_OUT,
&IfxEvadc_EMUX01_P02_7_OUT,
&IfxEvadc_EMUX02_P02_8_OUT},
.outputMode = IfxPort_OutputMode_pushPull,
.padDriver = IfxPort_PadDriver_cmosAutomotiveSpeed1
};
emuxConfig.emuxOutPinConfig = pinsConfig;
IfxEvadc_Adc_initExternalMultiplexerMode(evadc, &emuxConfig);
IfxEvadc_setEmuxGroupResolution(&evadc->G[emuxConfig.groupId], 0, IfxEvadc_ChannelResolution_12bit);
IfxEvadc_setEmuxGroupSampletime(&evadc->G[emuxConfig.groupId], 0, 50000, 1.0e-6);


iLLD_TC38A: Interface Driver

Modules
Interface Driver
iLLD » EVADC
Collaboration diagram for Interface Driver:

Modules

Data Structures
Module Functions
Group Functions
Channel Functions
Queue Functions
Clock Functions
Interrupt Functions
Variables
Global Functions
Emux Functions
Fast Compare Functions

Detailed Description


iLLD_TC38A: Data Structures

Data Structures
Data Structures
iLLD » EVADC » Interface Driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxEvadc_Adc
EVADC handle data structure. More...
struct | IfxEvadc_Adc_GatingTriggerConfig
Gating/Trigger configuration structure. More...
struct | IfxEvadc_Adc_ArbiterConfig
Arbiter configuration structure. More...
struct | IfxEvadc_Adc_ClassConfig
Input class configuration structure. More...
struct | IfxEvadc_Adc_EmuxPinConfig
struct | IfxEvadc_Adc_Group
Group handle data structure. More...
struct | IfxEvadc_Adc_QueueConfig
Queue configuration structure. More...
struct | IfxEvadc_Adc_Channel
Channel handle data structure. More...
struct | IfxEvadc_Adc_ChannelConfig
Channel configuration structure. More...
struct | IfxEvadc_Adc_Config
EVADC module configuration structure. More...
struct | IfxEvadc_Adc_EmuxControl
Emux Control Structure. More...
struct | IfxEvadc_Adc_GroupConfig
Group configuration structure. More...

Detailed Description

Data Structure Documentation

◆ IfxEvadc_Adc

struct IfxEvadc_Adc

EVADC handle data structure.

Definition at line 259 of file IfxEvadc_Adc.h.

Data Fields
Ifx_EVADC * evadc Specifies the pointer to the EVADC module registers.

◆ IfxEvadc_Adc_GatingTriggerConfig

struct IfxEvadc_Adc_GatingTriggerConfig

Gating/Trigger configuration structure.

Definition at line 266 of file IfxEvadc_Adc.h.

Data Fields
IfxEvadc_GatingMode | gatingMode | Specifies gating mode. High level, Low Level or Gating disabled.
IfxEvadc_GatingSource | gatingSource | Specifies used gate input for group.
IfxEvadc_TriggerMode | triggerMode | Specifies trigger mode. Rising, falling any edge leads to an trigger event.
IfxEvadc_TriggerSource | triggerSource | Specifies used Trigger input for group.

◆ IfxEvadc_Adc_ArbiterConfig

struct IfxEvadc_Adc_ArbiterConfig

Arbiter configuration structure.

Definition at line 280 of file IfxEvadc_Adc.h.

Data Fields
IfxEvadc_ArbitrationRounds | arbiterRoundLength | Specifies arbiter round length.
boolean | requestSlotQueue0Enabled | request queue0 if enabled.
boolean | requestSlotQueue1Enabled | request queue1 if enabled.
boolean | requestSlotQueue2Enabled | request queue2 if enabled.

◆ IfxEvadc_Adc_ClassConfig

struct IfxEvadc_Adc_ClassConfig

Input class configuration structure.

Definition at line 290 of file IfxEvadc_Adc.h.

Data Fields
IfxEvadc_AnalogInputPrechargeControl | analogInputPrechargeControlEMUX |
IfxEvadc_AnalogInputPrechargeControl | analogInputPrechargeControlStandard |
IfxEvadc_ChannelNoiseReduction | conversionMode | Specifies the conversion Mode, noise reduction levels.
IfxEvadc_ChannelNoiseReductionEMUX | conversionModeEMUX |
IfxEvadc_SpreadEarlySamplePointEMUXConversionsMode | samplePointEMUX |
IfxEvadc_SpreadEarlySamplePointStandardConversionsMode | samplePointStandard |
float32 | sampleTime | Specifies the requested sample time for input class.
float32 | sampleTimeEMUX |

◆ IfxEvadc_Adc_EmuxPinConfig

struct IfxEvadc_Adc_EmuxPinConfig

Definition at line 302 of file IfxEvadc_Adc.h.

Collaboration diagram for IfxEvadc_Adc_EmuxPinConfig:
[legend]
Data Fields
IfxPort_OutputMode | outputMode | the pin output mode which should be configured
IfxPort_PadDriver | padDriver | Pad driver.
IfxEvadc_Emux_Out * | pins[3] | Emux Pins configuration.

◆ IfxEvadc_Adc_Group

struct IfxEvadc_Adc_Group

Group handle data structure.

Definition at line 311 of file IfxEvadc_Adc.h.

Collaboration diagram for IfxEvadc_Adc_Group:
[legend]
Data Fields
Ifx_EVADC_G * | group | Pointer to the group registers.
IfxEvadc_GroupId | groupId | Specifies the group index.
IfxEvadc_Adc | module | The EVADC handle structure.

◆ IfxEvadc_Adc_QueueConfig

struct IfxEvadc_Adc_QueueConfig

Queue configuration structure.

Definition at line 320 of file IfxEvadc_Adc.h.

Collaboration diagram for IfxEvadc_Adc_QueueConfig:
[legend]
Data Fields
boolean | flushQueueAfterInit | Specifies if the queue is flushed after configuration.
IfxEvadc_RequestSlotPriority | requestSlotPrio | priority of used queue request slot.
IfxEvadc_RequestSlotStartMode | requestSlotStartMode | start mode for request queue source.
IfxEvadc_Adc_GatingTriggerConfig | triggerConfig | trigger and gating configuration.

◆ IfxEvadc_Adc_Channel

struct IfxEvadc_Adc_Channel

Channel handle data structure.

Definition at line 334 of file IfxEvadc_Adc.h.

Collaboration diagram for IfxEvadc_Adc_Channel:
[legend]
Data Fields
IfxEvadc_ChannelId | channel | Specifies the channel index.
IFX_CONST IfxEvadc_Adc_Group * | group | Specifies the group of the channel.
IfxEvadc_ChannelResult | resultreg | Specifies allocated result register.

◆ IfxEvadc_Adc_ChannelConfig

struct IfxEvadc_Adc_ChannelConfig

Channel configuration structure.

Definition at line 343 of file IfxEvadc_Adc.h.

Collaboration diagram for IfxEvadc_Adc_ChannelConfig:
[legend]
Data Fields
IfxEvadc_BoundaryExtension | boundaryMode | Specifies Standard mode of fast compare mode.
IfxEvadc_ChannelId | channelId | Specifies the channel index.
Ifx_Priority | channelPriority | Interrupt priority of the channel trigger interrupt, if 0 the interrupt is disable.
IfxSrc_Tos | channelServProvider | Interrupt service provider for the channel trigger interrupt.
IfxEvadc_SrcNr | channelSrcNr | Service node of the channel trigger.
IfxEvadc_DataModificationMode | dataModificationMode | Specifies the Data Modification Mode.According to the value entered here, the meanings of values entered for dataReductionControlMode will mean either the number of results accumulated(GxRCRy.B.DMM=0) or filter coefficients(GxRCRy.B.DMM=1).
IfxEvadc_DataReductionControlMode | dataReductionControlMode | Depending on the valued of dataModificationMode, the meanings of values in this will differ.For details refer definition of IfxEvadc_DataReductionControlMode enum in IfxEvadc.h.
IfxEvadc_FifoMode | fifoMode |
boolean | globalResultUsage | Specifies storage in global result register.
IFX_CONST IfxEvadc_Adc_Group * | group | Specifies pointer to the IfxEvadc_Adc_Group group handle.
IfxEvadc_InputClasses | inputClass | Specifies input class selection.
IfxEvadc_LimitCheck | limitCheck | Specifies boundary band selection upper/lower.
IfxEvadc_BoundarySelection | lowerBoundary | Specifies lower boundary selection.
IfxEvadc_ChannelReference | reference | Specifies Reference selection.
Ifx_Priority | resultPriority | Interrupt priority of the result trigger interrupt, if 0 the interrupt is disable.
IfxEvadc_ChannelResult | resultRegister | Specifies Result register selection.
IfxSrc_Tos | resultServProvider | Interrupt service provider for the result trigger interrupt.
IfxEvadc_SrcNr | resultSrcNr | Service node of the result trigger.
boolean | rightAlignedStorage | Specifies result is right aligned.
boolean | synchonize | Specifies synchronized conversion channel.
IfxEvadc_BoundarySelection | upperBoundary | Specifies upper boundary selection.
IfxEvadc_WaitForRead | waitForReadMode |

◆ IfxEvadc_Adc_Config

struct IfxEvadc_Adc_Config

EVADC module configuration structure.

Definition at line 371 of file IfxEvadc_Adc.h.

Collaboration diagram for IfxEvadc_Adc_Config:
[legend]
Data Fields
IfxEvadc_AnalogClockGenerationMode | analogClockGenerationMode |
Ifx_EVADC * | evadc | Specifies the pointer to the EVADC module registers.
IfxEvadc_Adc_ClassConfig | globalInputClass[IFXEVADC_NUM_GLOBAL_INPUTCLASSES] | Specifies the global conversion settings one and two.
IfxEvadc_StartupCalibration | startupCalibrationControl |
IfxEvadc_SupplyVoltageLevelControl | supplyVoltage |

◆ IfxEvadc_Adc_EmuxControl

struct IfxEvadc_Adc_EmuxControl

Emux Control Structure.

Definition at line 382 of file IfxEvadc_Adc.h.

Collaboration diagram for IfxEvadc_Adc_EmuxControl:
[legend]
Data Fields
uint8 | channels | specifies channel number
IfxEvadc_ChannelSelectionStyle | channelSelectionStyle | External Multiplexer Channel Selection Style.
IfxEvadc_EmuxCodingScheme | code | specifes binary/gray code
IfxEvadc_EmuxInterface | emuxInterface | specifies the Emux interface
IfxEvadc_Adc_EmuxPinConfig | emuxOutPinConfig | configure the emux output pin
Ifx_EVADC * | evadc | Pointer to EVADC Module Space.
IfxEvadc_GroupId | groupId | specifies groupId
IfxEvadc_ExternalMultiplexerMode | mode | Specifies the External Multiplexer mode.
IfxEvadc_EmuxSampleTimeControl | sampleTimeControl | specifies when to use sample time control
IfxEvadc_EmuxSelectValue | startChannel | specifies the external channel start value(EMUX[x:0]) x- specifies external channel number

◆ IfxEvadc_Adc_GroupConfig

struct IfxEvadc_Adc_GroupConfig

Group configuration structure.

Definition at line 399 of file IfxEvadc_Adc.h.

Collaboration diagram for IfxEvadc_Adc_GroupConfig:
[legend]
Data Fields
IfxEvadc_AnalogClockSynchronizationDelay | analogClockSynchronizationDelay |
IfxEvadc_AnalogConverterMode | analogConverterMode |
float32 | analogFrequency | specifies analog frequency in Hz
IfxEvadc_Adc_ArbiterConfig | arbiter | Arbiter configuration structure.
IfxEvadc_CalibrationSampleTimeControl | calibrationSampleTimeControlMode |
boolean | disablePostCalibration | Specifies if calibration after conversion (post calibration) should be disabled.
boolean | doubleClockForMSBConversionSelection |
IfxEvadc_GroupId | groupId | Specifies the group/kernel id.
IfxEvadc_IdlePrecharge | idlePrechargeLevel | Voltage level to which sampling capacitor will be precharged when idle.
boolean | inputBufferEnabled |
IfxEvadc_Adc_ClassConfig | inputClass[IFXEVADC_NUM_INPUTCLASSES] | Specifies conversion settings one and two.
IfxEvadc_InputClasses | inputClasses |
IfxEvadc_GroupId | master | Specifies the master group. If master is different from groupId, then the group is configured as slave.
IFX_CONST IfxEvadc_Adc * | module | Specifies pointer to the IfxEvadc_Adc module handle.
IfxEvadc_Adc_QueueConfig | queueRequest[3] | Specifies queue0 mode configuration.
IfxEvadc_ReferencePrechargeControl | referencePrechargeControlMode |
boolean | referencePrechargeEnabled |
IfxEvadc_SampleSynchronization | sampleSynchronizationEnabled |
boolean | startupCalibration | Can be enabled to execute a startup calibration (disabled by default).


iLLD_TC38A: Module Functions

Functions
Module Functions
iLLD » EVADC » Interface Driver
Collaboration diagram for Module Functions:

Functions

IFX_INLINE void | IfxEvadc_Adc_deInitModule (IfxEvadc_Adc *evadc)
Reset the EVADC module. More...
IFX_INLINE void | IfxEvadc_Adc_getModuleConfig (IfxEvadc_Adc *evadc, IfxEvadc_Adc_Config *config, Ifx_EVADC_G *evadcG)
Get the current EVADC configuration (e.g. EVADC frequency) More...
IFX_INLINE Ifx_EVADC_G_RES | IfxEvadc_Adc_getResultBasedOnRequestSource (IfxEvadc_Adc_Group *group, IfxEvadc_ChannelId channel, IfxEvadc_RequestSource sourceType)
Get conversion result based on the Request Source. (Function does not care about the alignment) value = raw * gain + offset. More...
IFX_EXTERN IfxEvadc_Status | IfxEvadc_Adc_initModule (IfxEvadc_Adc *evadc, const IfxEvadc_Adc_Config *config)
Initialise the EVADC to run with the expected frequency and calibration. More...
IFX_EXTERN void | IfxEvadc_Adc_initModuleConfig (IfxEvadc_Adc_Config *config, Ifx_EVADC *evadc)
Initialise buffer with default EVADC configuration. More...

Detailed Description

Function Documentation

◆ IfxEvadc_Adc_deInitModule()

IFX_INLINE void IfxEvadc_Adc_deInitModule ( IfxEvadc_Adc * evadc )

Reset the EVADC module.

Parameters
evadc pointer to the EVADC module
Returns
None

Example Usage :How to use the EVADC ADC Interface driver?

Definition at line 1022 of file IfxEvadc_Adc.h.

◆ IfxEvadc_Adc_getModuleConfig()

IFX_INLINE void IfxEvadc_Adc_getModuleConfig | ( | IfxEvadc_Adc * | evadc,
 |  | IfxEvadc_Adc_Config * | config,
 |  | Ifx_EVADC_G * | evadcG
 | ) |  |

Get the current EVADC configuration (e.g. EVADC frequency)

Parameters
evadc | pointer to the EVADC module
config | pointer to the EVADC module configuration
evadcG | Pointer to the register Group
Returns
None

Example Usage :How to use the EVADC ADC Interface driver?

Definition at line 1054 of file IfxEvadc_Adc.h.

◆ IfxEvadc_Adc_getResultBasedOnRequestSource()

IFX_INLINE Ifx_EVADC_G_RES IfxEvadc_Adc_getResultBasedOnRequestSource | ( | IfxEvadc_Adc_Group * | group,
 |  | IfxEvadc_ChannelId | channel,
 |  | IfxEvadc_RequestSource | sourceType
 | ) |  |

Get conversion result based on the Request Source. (Function does not care about the alignment) value = raw * gain + offset.

Parameters
group | pointer to the EVADC group
channel | channel number
sourceType | type of request source
Returns
scaled Conversion result
// IMPORTANT: for deterministic results we have to disable the queue gate
// while filling the queue, otherwise results could be output in the wrong order
unsigned savedGate = adcGroup.module.evadc->G[adcGroup.groupId].Queue0.QMR0.B.ENGT;
adcGroup.module.evadc->G[adcGroup.groupId].Queue0.QMR0.B.ENGT = 0;
// create channel config
IfxEvadc_Adc_ChannelConfig adcChannelConfig[3];
IfxEvadc_Adc_Channel adcChannel[3];
for(int chnIx=0; chnIx<3; ++chnIx) {
IfxEvadc_Adc_initChannelConfig(&adcChannelConfig[chnIx], &adcGroup);
adcChannelConfig[chnIx].channelId = (IfxEvadc_ChannelId)(chnIx);
adcChannelConfig[chnIx].resultRegister = IfxEvadc_ChannelResult_1; // use result register #1 for all channels
// initialize the channel
IfxEvadc_Adc_initChannel(&adcChannel[chnIx], &adcChannelConfig[chnIx]);
// Add channel to queue with refill enabled
IfxEvadc_Adc_addToQueue(&adcChannel[chnIx], IFXEVADC_QUEUE_REFILL,IfxEvadc_RequestSource_queue0);
// restore previous gate config
adcGroup.module.evadc->G[adcGroup.groupId].Queue0.QMR0.B.ENGT = savedGate;
// start the Queue
IfxEvadc_Adc_startQueue(&adcGroup,IfxEvadc_RequestSource_queue0); // just for the case that somebody copy&pastes the code - the queue has already been started in previous test
// wait for valid result
Ifx_EVADC_G_RES resultChannel;
do {
resultChannel = IfxEvadc_Adc_getResultBasedOnRequestSource(&adcGroup, IfxEvadc_ChannelId2, IfxEvadc_RequestSource_queue0);
} while( !resultChannel.B.VF );

Definition at line 1075 of file IfxEvadc_Adc.h.

◆ IfxEvadc_Adc_initModule()

IFX_EXTERN IfxEvadc_Status IfxEvadc_Adc_initModule | ( | IfxEvadc_Adc * | evadc,
 |  | const IfxEvadc_Adc_Config * | config
 | ) |  |

Initialise the EVADC to run with the expected frequency and calibration.

Parameters
evadc | pointer to the EVADC handle
config | pointer to the EVADC configuration
Returns
IfxEvadc_Status

For coding example see: How to use the EVADC ADC Interface driver?

Definition at line 940 of file IfxEvadc_Adc.c.

◆ IfxEvadc_Adc_initModuleConfig()

IFX_EXTERN void IfxEvadc_Adc_initModuleConfig | ( | IfxEvadc_Adc_Config * | config,
 |  | Ifx_EVADC * | evadc
 | ) |  |

Initialise buffer with default EVADC configuration.

Parameters
config | pointer to the EVADC module configuration
evadc | pointer to the EVADC
Returns
None

For coding example see: How to use the EVADC ADC Interface driver?

Definition at line 963 of file IfxEvadc_Adc.c.


iLLD_TC38A: Group Functions

Functions
Group Functions
iLLD » EVADC » Interface Driver
Collaboration diagram for Group Functions:

Functions

IFX_INLINE IfxEvadc_GroupId | IfxEvadc_Adc_getMasterId (IfxEvadc_GroupId slave, IfxEvadc_Adc_SYNCTR_STSEL masterIndex)
Gets the master id. More...
IFX_INLINE IfxEvadc_Adc_SYNCTR_STSEL | IfxEvadc_Adc_getMasterKernelIndex (IfxEvadc_GroupId slave, IfxEvadc_GroupId master)
Gets the current master kernel index. More...
IFX_INLINE Ifx_EVADC * | IfxEvadc_Adc_getEvadcFromGroup (const IfxEvadc_Adc_Group *group)
Gets the current group module register address. More...
IFX_INLINE Ifx_EVADC_G * | IfxEvadc_Adc_getGroupRegsFromGroup (const IfxEvadc_Adc_Group *group)
Gets the current group register set. More...
IFX_INLINE void | IfxEvadc_Adc_getGroupResult (IfxEvadc_Adc_Group *group, Ifx_EVADC_G_RES *results, uint32 resultOffset, uint32 numResults)
Get conversion result for the group. More...
IFX_EXTERN void | IfxEvadc_Adc_deInitGroup (IfxEvadc_Adc_Group *group)
Reset the EVADC group. More...
IFX_EXTERN void | IfxEvadc_Adc_getGroupConfig (IfxEvadc_Adc_Group *group, IfxEvadc_Adc_GroupConfig *config)
Get the current group configuration (e.g. evadc frequency) More...
IFX_EXTERN IfxEvadc_Status | IfxEvadc_Adc_initGroup (IfxEvadc_Adc_Group *group, const IfxEvadc_Adc_GroupConfig *config)
Initialise the EVADC group (also queue modes) Slave Groups must initialize first. More...
IFX_EXTERN void | IfxEvadc_Adc_initGroupConfig (IfxEvadc_Adc_GroupConfig *config, IfxEvadc_Adc *evadc)
Initialise buffer with default EVADC configuration. More...

Detailed Description

Function Documentation

◆ IfxEvadc_Adc_deInitGroup()

IFX_EXTERN void IfxEvadc_Adc_deInitGroup ( IfxEvadc_Adc_Group * group )

Reset the EVADC group.

Parameters
group pointer to the EVADC group
Returns
None

Example Usage :How to use the EVADC ADC Interface driver?

Definition at line 135 of file IfxEvadc_Adc.c.

◆ IfxEvadc_Adc_getEvadcFromGroup()

IFX_INLINE Ifx_EVADC * IfxEvadc_Adc_getEvadcFromGroup ( const IfxEvadc_Adc_Group * group )

Gets the current group module register address.

Parameters
group Group handle data structure
Returns
Group module register base address

Definition at line 1030 of file IfxEvadc_Adc.h.

Referenced by IfxEvadc_Adc_deInitGroup(), and IfxEvadc_Adc_initChannel().

◆ IfxEvadc_Adc_getGroupConfig()

IFX_EXTERN void IfxEvadc_Adc_getGroupConfig | ( | IfxEvadc_Adc_Group * | group,
 |  | IfxEvadc_Adc_GroupConfig * | config
 | ) |  |

Get the current group configuration (e.g. evadc frequency)

Parameters
group | pointer to the EVADC group
config | pointer to the EVADC group configuration
Returns
None

Example Usage :How to use the EVADC ADC Interface driver?

Definition at line 228 of file IfxEvadc_Adc.c.

◆ IfxEvadc_Adc_getGroupRegsFromGroup()

IFX_INLINE Ifx_EVADC_G * IfxEvadc_Adc_getGroupRegsFromGroup ( const IfxEvadc_Adc_Group * group )

Gets the current group register set.

Parameters
group Group handle data structure
Returns
Group register set

Definition at line 1042 of file IfxEvadc_Adc.h.

Referenced by IfxEvadc_Adc_deInitGroup(), IfxEvadc_Adc_getChannelConfig(), and IfxEvadc_Adc_initChannel().

◆ IfxEvadc_Adc_getGroupResult()

IFX_INLINE void IfxEvadc_Adc_getGroupResult | ( | IfxEvadc_Adc_Group * | group,
 |  | Ifx_EVADC_G_RES * | results,
 |  | uint32 | resultOffset,
 |  | uint32 | numResults
 | ) |  |

Get conversion result for the group.

Parameters
group | pointer to the EVADC group
results | pointer to scaled conversion results
resultOffset | offset for the first result
numResults | number of results
Returns
None
// create configuration
IfxEvadc_Adc_Config adcConfig;
IfxEvadc_Adc_initModuleConfig(&adcConfig, &MODULE_EVADC);
// initialize module
IfxEvadc_Adc evadc;
IfxEvadc_Adc_initModule(&evadc, &adcConfig);
// create group config
IfxEvadc_Adc_GroupConfig adcGroupConfig;
IfxEvadc_Adc_initGroupConfig(&adcGroupConfig, &evadc);
// change group (default is GroupId0, change to GroupId2)
adcGroupConfig.groupId = IfxEvadc_GroupId2;
adcGroupConfig.master = adcGroupConfig.groupId;
// enable gate in "always" mode (no edge detection)
adcGroupConfig.queueRequest[0].triggerConfig.gatingMode = IfxEvadc_GatingMode_always;
// enable all arbiter request sources
adcGroupConfig.arbiter.requestSlotQueue0Enabled = TRUE; // enable Queue0 mode
adcGroupConfig.arbiter.requestSlotQueue1Enabled = TRUE; // enable Queue1 mode
adcGroupConfig.arbiter.requestSlotQueue2Enabled = TRUE; // enable Queue2 mode
// initialize the group
IfxEvadc_Adc_Group adcGroup;
IfxEvadc_Adc_initGroup(&adcGroup, &adcGroupConfig);
// create channel config
IfxEvadc_Adc_ChannelConfig adcChannelConfig;
IfxEvadc_Adc_initChannelConfig(&adcChannelConfig, &adcGroup);
// change channel (default is ChannelId_0, change to ChannelId_3)
adcChannelConfig.channelId = IfxEvadc_ChannelId_3;
// initialize the channel
IfxEvadc_Adc_Channel adcChannel;
IfxEvadc_Adc_initChannel(&adcChannel, &adcChannelConfig);
// Add channel to queue with refill enabled
IfxEvadc_Adc_addToQueue(&adcChannel, IfxEvadc_RequestSource_queue0, IFXEVADC_QUEUE_REFILL);
// start the Queue
IfxEvadc_Adc_startQueue(&adcGroup, IfxEvadc_RequestSource_queue0);
// get 10 results
for(int i=0; i<10; ++i) {
unsigned group = adcChannel.group->groupId;
unsigned channel = adcChannel.channel;
// fetch the 2 results of conversion for group 0
Ifx_EVADC_G_RES results[10];
IfxEvadc_Adc_getGroupResult(&adcGroup, results, 0, 2);

Definition at line 1048 of file IfxEvadc_Adc.h.

◆ IfxEvadc_Adc_getMasterId()

IFX_INLINE IfxEvadc_GroupId IfxEvadc_Adc_getMasterId | ( | IfxEvadc_GroupId | slave,
 |  | IfxEvadc_Adc_SYNCTR_STSEL | masterIndex
 | ) |  |

Gets the master id.

Parameters
slave | Index of the group
masterIndex | master kernel index
Returns
Master Group Id

Definition at line 99 of file IfxEvadc_Adc.c.

Referenced by IfxEvadc_Adc_getGroupConfig().

◆ IfxEvadc_Adc_getMasterKernelIndex()

IFX_INLINE IfxEvadc_Adc_SYNCTR_STSEL IfxEvadc_Adc_getMasterKernelIndex | ( | IfxEvadc_GroupId | slave,
 |  | IfxEvadc_GroupId | master
 | ) |  |

Gets the current master kernel index.

Parameters
slave | Index of the group
master | Index of the group
Returns
current master kernel index

Definition at line 125 of file IfxEvadc_Adc.c.

Referenced by IfxEvadc_Adc_initGroup().

◆ IfxEvadc_Adc_initGroup()

IFX_EXTERN IfxEvadc_Status IfxEvadc_Adc_initGroup | ( | IfxEvadc_Adc_Group * | group,
 |  | const IfxEvadc_Adc_GroupConfig * | config
 | ) |  |

Initialise the EVADC group (also queue modes) Slave Groups must initialize first.

Parameters
group | Pointer to the EVADC group
config | pointer to the EVADC group configuration
Returns
IfxEvadc_Status

For coding example see: How to use the EVADC ADC Interface driver?

Definition at line 578 of file IfxEvadc_Adc.c.

◆ IfxEvadc_Adc_initGroupConfig()

IFX_EXTERN void IfxEvadc_Adc_initGroupConfig | ( | IfxEvadc_Adc_GroupConfig * | config,
 |  | IfxEvadc_Adc * | evadc
 | ) |  |

Initialise buffer with default EVADC configuration.

NOTE: By default startupCalibration = FALSE in IfxEvadc_Adc_initGroupConfig() and startupCalibrationControl = IfxEvadc_StartupCalibration_noAction in IfxEvadc_Adc_initModuleConfig().

In case startup calibration is required, while configuring the last group, startupCalibration inside group config structure must be set to TRUE after calling IfxEvadc_Adc_initGroupConfig() and before calling IfxEvadc_Adc_initGroup().

Parameters
config | pointer to the EVADC group configuration
evadc | Pointer to the EVADC module
Returns
None

For coding example see: How to use the EVADC ADC Interface driver?

Definition at line 847 of file IfxEvadc_Adc.c.


iLLD_TC38A: Channel Functions

Functions
Channel Functions
iLLD » EVADC » Interface Driver
Collaboration diagram for Channel Functions:

Functions

IFX_INLINE void | IfxEvadc_Adc_configureWaitForReadMode (IfxEvadc_Adc_Channel *channel, boolean waitForReadMode)
pointer to the EVADC channel More...
IFX_INLINE Ifx_EVADC_G_RES | IfxEvadc_Adc_getResult (IfxEvadc_Adc_Channel *channel)
Get conversion result (Function does not care about the alignment) More...
IFX_EXTERN void | IfxEvadc_Adc_getChannelConfig (IfxEvadc_Adc_Channel *channel, IfxEvadc_Adc_ChannelConfig *config)
Get the current channel configuration (e.g. sample settings) More...
IFX_EXTERN IfxEvadc_Status | IfxEvadc_Adc_initChannel (IfxEvadc_Adc_Channel *channel, const IfxEvadc_Adc_ChannelConfig *config)
Initialise one channel with given configuration. More...
IFX_EXTERN void | IfxEvadc_Adc_initChannelConfig (IfxEvadc_Adc_ChannelConfig *config, const IfxEvadc_Adc_Group *group)
Initialise buffer with default channel configuration. More...

Detailed Description

Function Documentation

◆ IfxEvadc_Adc_configureWaitForReadMode()

IFX_INLINE void IfxEvadc_Adc_configureWaitForReadMode | ( | IfxEvadc_Adc_Channel * | channel,
 |  | boolean | waitForReadMode
 | ) |  |

pointer to the EVADC channel

Parameters
channel | pointer to the EVADC channel
waitForReadMode | wait for read mode enabled/disable
Returns
None

For coding example see: IfxEvadc_Adc_getResultBasedOnRequestSource

Definition at line 1010 of file IfxEvadc_Adc.h.

◆ IfxEvadc_Adc_getChannelConfig()

IFX_EXTERN void IfxEvadc_Adc_getChannelConfig | ( | IfxEvadc_Adc_Channel * | channel,
 |  | IfxEvadc_Adc_ChannelConfig * | config
 | ) |  |

Get the current channel configuration (e.g. sample settings)

Parameters
channel | pointer to the EVADC channel
config | pointer to the EVADC channel configuration
Returns
None

Example Usage :How to use the EVADC ADC Interface driver?

Definition at line 149 of file IfxEvadc_Adc.c.

◆ IfxEvadc_Adc_getResult()

IFX_INLINE Ifx_EVADC_G_RES IfxEvadc_Adc_getResult ( IfxEvadc_Adc_Channel * channel )

Get conversion result (Function does not care about the alignment)

Parameters
channel pointer to the EVADC channel
Returns
scaled Conversion result

For coding example see: How to use the EVADC ADC Interface driver?

Definition at line 1069 of file IfxEvadc_Adc.h.

◆ IfxEvadc_Adc_initChannel()

IFX_EXTERN IfxEvadc_Status IfxEvadc_Adc_initChannel | ( | IfxEvadc_Adc_Channel * | channel,
 |  | const IfxEvadc_Adc_ChannelConfig * | config
 | ) |  |

Initialise one channel with given configuration.

Parameters
channel | pointer to the EVADC channel
config | pointer to the EVADC channel configuration
Returns
IfxEvadc_Status

For coding example see: How to use the EVADC ADC Interface driver?

Definition at line 338 of file IfxEvadc_Adc.c.

◆ IfxEvadc_Adc_initChannelConfig()

IFX_EXTERN void IfxEvadc_Adc_initChannelConfig | ( | IfxEvadc_Adc_ChannelConfig * | config,
 |  | const IfxEvadc_Adc_Group * | group
 | ) |  |

Initialise buffer with default channel configuration.

Parameters
config | pointer to the EVADC channel configuration
group | pointer to the EVADC group
Returns
None

For coding example see: How to use the EVADC ADC Interface driver?

Definition at line 418 of file IfxEvadc_Adc.c.


iLLD_TC38A: Queue Functions

Functions
Queue Functions
iLLD » EVADC » Interface Driver
Collaboration diagram for Queue Functions:

Functions

IFX_INLINE void | IfxEvadc_Adc_addToQueue (IfxEvadc_Adc_Channel *channel, IfxEvadc_RequestSource sourceType, uint32 options)
Add an entry to the queue of a group for the specified channel with the following options set: refill source interrupt enable/disable external trigger control. More...
IFX_INLINE void | IfxEvadc_Adc_clearQueue (IfxEvadc_Adc_Group *group, IfxEvadc_RequestSource sourceType)
Flush the contents of the queue of a group. More...
IFX_INLINE IfxEvadc_Status | IfxEvadc_Adc_getQueueStatus (IfxEvadc_Adc_Group *group, IfxEvadc_RequestSource sourceType)
Gives the status of the Queue of a group by returning non zero value if the Queue is full. More...
IFX_INLINE void | IfxEvadc_Adc_startQueue (IfxEvadc_Adc_Group *group, IfxEvadc_RequestSource sourceType)
Starts a queue of a group by generating a trigger event through software. More...

Detailed Description

Function Documentation

◆ IfxEvadc_Adc_addToQueue()

IFX_INLINE void IfxEvadc_Adc_addToQueue | ( | IfxEvadc_Adc_Channel * | channel,
 |  | IfxEvadc_RequestSource | sourceType,
 |  | uint32 | options
 | ) |  |

Add an entry to the queue of a group for the specified channel with the following options set: refill source interrupt enable/disable external trigger control.

Parameters
channel | pointer to the EVADC channel
sourceType | Request source Type(Queue 0,Queue 1,Queue 2)
options | options for channel
Returns
None

For coding example see: IfxEvadc_Adc_getResult

Definition at line 998 of file IfxEvadc_Adc.h.

◆ IfxEvadc_Adc_clearQueue()

IFX_INLINE void IfxEvadc_Adc_clearQueue | ( | IfxEvadc_Adc_Group * | group,
 |  | IfxEvadc_RequestSource | sourceType
 | ) |  |

Flush the contents of the queue of a group.

Parameters
group | pointer to the EVADC group
sourceType | Request source Type(Queue 0,Queue 1,Queue 2)
Returns
None

For coding example see: IfxEvadc_Adc_getResult

Definition at line 1004 of file IfxEvadc_Adc.h.

◆ IfxEvadc_Adc_getQueueStatus()

IFX_INLINE IfxEvadc_Status IfxEvadc_Adc_getQueueStatus | ( | IfxEvadc_Adc_Group * | group,
 |  | IfxEvadc_RequestSource | sourceType
 | ) |  |

Gives the status of the Queue of a group by returning non zero value if the Queue is full.

Parameters
group | pointer to the EVADC group
sourceType | Request source Type(Queue 0,Queue 1,Queue 2)
Returns
Queue status

For coding example see: IfxEvadc_Adc_getResult

Definition at line 1063 of file IfxEvadc_Adc.h.

◆ IfxEvadc_Adc_startQueue()

IFX_INLINE void IfxEvadc_Adc_startQueue | ( | IfxEvadc_Adc_Group * | group,
 |  | IfxEvadc_RequestSource | sourceType
 | ) |  |

Starts a queue of a group by generating a trigger event through software.

Parameters
group | pointer to the EVADC group
sourceType | Request source Type(Queue 0,Queue 1,Queue 2)
Returns
None

For coding example see: IfxEvadc_Adc_getResult

Definition at line 1081 of file IfxEvadc_Adc.h.


iLLD_TC38A: Clock Functions

Clock Functions
iLLD » EVADC » Interface Driver
Collaboration diagram for Clock Functions:


iLLD_TC38A: Interrupt Functions

Interrupt Functions
iLLD » EVADC » Interface Driver
Collaboration diagram for Interrupt Functions:


iLLD_TC38A: Variables

Variables
Variables
iLLD » EVADC » Interface Driver
Collaboration diagram for Variables:

Variables

IFX_STATIC IFX_CONST IfxEvadc_Adc_SYNCTR_STSEL IfxEvadc_Adc_masterIndex [IFXEVADC_NUM_ADC_CAL_GROUPS][IFXEVADC_NUM_ADC_CAL_GROUPS]

Detailed Description

Variable Documentation

◆ IfxEvadc_Adc_masterIndex

IFX_STATIC IFX_CONST IfxEvadc_Adc_SYNCTR_STSEL IfxEvadc_Adc_masterIndex[IFXEVADC_NUM_ADC_CAL_GROUPS][IFXEVADC_NUM_ADC_CAL_GROUPS]
Initial value:
= {
{0, 1, 2, 3, 0, 0, 0, 0, 0, 0, 0, 0},
{1, 0, 2, 3, 0, 0, 0, 0, 0, 0, 0, 0},
{1, 2, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0},
{1, 2, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{0, 0, 0, 0, 0, 1, 2, 3, 0, 0, 0, 0},
{0, 0, 0, 0, 1, 0, 2, 3, 0, 0, 0, 0},
{0, 0, 0, 0, 1, 2, 0, 3, 0, 0, 0, 0},
{0, 0, 0, 0, 1, 2, 3, 0, 0, 0, 0, 0},
{0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3},
{0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 2, 3},
{0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 0, 3},
{0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 0}
}

Definition at line 77 of file IfxEvadc_Adc.c.

Referenced by IfxEvadc_Adc_getMasterId(), and IfxEvadc_Adc_getMasterKernelIndex().


iLLD_TC38A: Global Functions

Functions
Global Functions
iLLD » EVADC » Interface Driver
Collaboration diagram for Global Functions:

Functions

IFX_INLINE void | IfxEvadc_Adc_configureWaitForReadModeForGlobalResultRegister (IfxEvadc_Adc *evadc, boolean waitForReadMode)
access function to enable/disable wait for read mode for global result register More...
IFX_INLINE Ifx_EVADC_GLOB_RES | IfxEvadc_Adc_getGlobalResult (IfxEvadc_Adc *evadc)
returns result stored in global result register More...
IFX_EXTERN void | IfxEvadc_Adc_setGlobalConfigurations (Ifx_EVADC *evadc, const IfxEvadc_Adc_Config *config)
Configure global settings in the GLOBCFG register. More...

Detailed Description

Function Documentation

◆ IfxEvadc_Adc_configureWaitForReadModeForGlobalResultRegister()

IFX_INLINE void IfxEvadc_Adc_configureWaitForReadModeForGlobalResultRegister | ( | IfxEvadc_Adc * | evadc,
 |  | boolean | waitForReadMode
 | ) |  |

access function to enable/disable wait for read mode for global result register

Parameters
evadc | pointer to the EVADC module
waitForReadMode | wait for read mode enabled/disabled
Returns
None

For coding example see: IfxEvadc_Adc_getGlobalResult

Definition at line 1016 of file IfxEvadc_Adc.h.

◆ IfxEvadc_Adc_getGlobalResult()

IFX_INLINE Ifx_EVADC_GLOB_RES IfxEvadc_Adc_getGlobalResult ( IfxEvadc_Adc * evadc )

returns result stored in global result register

Parameters
evadc pointer to the EVADC module
Returns
global result register
// create configuration
IfxEvadc_Adc_Config adcConfig;
IfxEvadc_Adc_initModuleConfig(&adcConfig, &MODULE_EVADC);
// initialize module
IfxEvadc_Adc evadc;
IfxEvadc_Adc_initModule(&evadc, &adcConfig);
// create group config
IfxEvadc_Adc_GroupConfig adcGroupConfig;
IfxEvadc_Adc_initGroupConfig(&adcGroupConfig, &evadc);
// change group (default is GroupId_0, change to GroupId_3)
adcGroupConfig.groupId = IfxEvadc_GroupId_3;
// IMPORTANT: usually we use the same group as master!
adcGroupConfig.master = adcGroupConfig.groupId;
// initialize the group
IfxEvadc_Adc_Group adcGroup;
IfxEvadc_Adc_initGroup(&adcGroup, &adcGroupConfig);
// create channel config
IfxEvadc_Adc_ChannelConfig adcChannelConfig2;
IfxEvadc_Adc_initChannelConfig(&adcChannelConfig2, &adcGroup);
adcChannelConfig2.backgroundChannel = TRUE;
adcChannelConfig2.globalResultUsage = TRUE;
// change channel (default is ChannelId0, change to ChannelId2)
adcChannelConfig2.channelId = IfxEvadc_ChannelId2;
// initialize the channel
IfxEvadc_Adc_Channel adcChannel2;
IfxEvadc_Adc_initChannel(&adcChannel2, &adcChannelConfig2);
// create channel config
IfxEvadc_Adc_ChannelConfig adcChannelConfig5;
IfxEvadc_Adc_initChannelConfig(&adcChannelConfig5, &adcGroup);
adcChannelConfig5.backgroundChannel = TRUE;
adcChannelConfig5.globalResultUsage = TRUE;
// change channel (default is ChannelId0, change to ChannelId5)
adcChannelConfig5.channelId = IfxEvadc_ChannelId5;
// initialize the channel
IfxEvadc_Adc_Channel adcChannel5;
IfxEvadc_Adc_initChannel(&adcChannel5, &adcChannelConfig5);
uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
//configure wait for read mode
IfxEvadc_Adc_configureWaitForReadModeForGlobalResultRegister(&evadc, TRUE);
// Add channel to queue with refill enabled
IfxEvadc_Adc_addToQueue(&adcChannel[chnIx], IfxEvadc_RequestSource_queue0, IFXEVADC_QUEUE_REFILL);
// start the Queue
IfxEvadc_Adc_startQueue(&adcGroup, IfxEvadc_RequestSource_queue0); // just for the case that somebody copy&pastes the code - the queue has already been started in previous test
// wait for valid result for channel 2
Ifx_EVADC_GLOB.RES resultChannel2;
do {
resultChannel2 = IfxEvadc_Adc_getGlobalResult(&evadc);
} while( !resultChannel2.B.VF );
// wait for valid result for channel 5
Ifx_EVADC_GLOB.RES resultChannel5;
do {
resultChannel5 = IfxEvadc_Adc_getGlobalResult(&evadc);
} while( !resultChannel5.B.VF );

Definition at line 1036 of file IfxEvadc_Adc.h.

◆ IfxEvadc_Adc_setGlobalConfigurations()

IFX_EXTERN void IfxEvadc_Adc_setGlobalConfigurations | ( | Ifx_EVADC * | evadc,
 |  | const IfxEvadc_Adc_Config * | config
 | ) |  |

Configure global settings in the GLOBCFG register.

Parameters
evadc | Pointer to EVADC SFRs
config | pointer to the EVADC module configuration
Returns
None

Definition at line 983 of file IfxEvadc_Adc.c.

Referenced by IfxEvadc_Adc_initModule().


iLLD_TC38A: Emux Functions

Functions
Emux Functions
iLLD » EVADC » Interface Driver
Collaboration diagram for Emux Functions:

Functions

IFX_EXTERN void | IfxEvadc_Adc_initExternalMultiplexerMode (Ifx_EVADC *evadc, const IfxEvadc_Adc_EmuxControl *emuxControl)
initalise external multiplexer. More...
IFX_EXTERN void | IfxEvadc_Adc_initExternalMultiplexerModeConfig (IfxEvadc_Adc_EmuxControl *emuxConfig, Ifx_EVADC *evadc)
initialise default configuration for external multiplexer More...

Detailed Description

Function Documentation

◆ IfxEvadc_Adc_initExternalMultiplexerMode()

IFX_EXTERN void IfxEvadc_Adc_initExternalMultiplexerMode | ( | Ifx_EVADC * | evadc,
 |  | const IfxEvadc_Adc_EmuxControl * | emuxControl
 | ) |  |

initalise external multiplexer.

Parameters
evadc | Pointer to EVADC Module space
emuxControl | speciifies EMUX configuration
Returns
None

Definition at line 449 of file IfxEvadc_Adc.c.

◆ IfxEvadc_Adc_initExternalMultiplexerModeConfig()

IFX_EXTERN void IfxEvadc_Adc_initExternalMultiplexerModeConfig | ( | IfxEvadc_Adc_EmuxControl * | emuxConfig,
 |  | Ifx_EVADC * | evadc
 | ) |  |

initialise default configuration for external multiplexer

Parameters
emuxConfig | speciifies EMUX configuration
evadc | pointer to EVADC module space
Returns
None

Definition at line 467 of file IfxEvadc_Adc.c.


iLLD_TC38A: Fast Compare Functions

Data Structures | Functions
Fast Compare Functions
iLLD » EVADC » Interface Driver
Collaboration diagram for Fast Compare Functions:

Data Structures

struct | IfxEvadc_Adc_FastCompareChannel
struct | IfxEvadc_Adc_FastCompareChannelConfig
Configuring Fast Compare channel operations. More...

Functions

IFX_EXTERN void | IfxEvadc_Adc_initFastCompareChannel (IfxEvadc_Adc_FastCompareChannel *fastCompareChannel, IfxEvadc_Adc_FastCompareChannelConfig *config)
Initializing the Fast Compare channel. More...
IFX_EXTERN void | IfxEvadc_Adc_initFastCompareChannelConfig (IfxEvadc_Adc_FastCompareChannelConfig *config, IfxEvadc_Adc *evadc)
Initializing Fast Compare Channel config structure with default configurations. More...

Detailed Description

Data Structure Documentation

◆ IfxEvadc_Adc_FastCompareChannel

struct IfxEvadc_Adc_FastCompareChannel

Definition at line 426 of file IfxEvadc_Adc.h.

Collaboration diagram for IfxEvadc_Adc_FastCompareChannel:
[legend]
Data Fields
Ifx_EVADC_FC * | fastCompareChannel |
IfxEvadc_GroupId | fastCompareChannelId | Following values can be taken for fastCompareChannelId: IfxEvadc_GroupId_12 for Fast compare channel 0 IfxEvadc_GroupId_13 for Fast compare channel 1 IfxEvadc_GroupId_14 for Fast compare channel 2 IfxEvadc_GroupId_15 for Fast compare channel 3
IfxEvadc_Adc | module | The EVADC handle structure.

◆ IfxEvadc_Adc_FastCompareChannelConfig

struct IfxEvadc_Adc_FastCompareChannelConfig

Configuring Fast Compare channel operations.

Definition at line 440 of file IfxEvadc_Adc.h.

Collaboration diagram for IfxEvadc_Adc_FastCompareChannelConfig:
[legend]
Data Fields
uint8 | additionalClockCycles | Number of additional clock cycles to be added to the minimum sample phase of 2 analog clock cycles.
IfxEvadc_FastCompareAnalogConverterControl | analogConverterControllerMode | Settings for Analog Coverter Controller to be done in FCM.B.ANON.
IfxEvadc_AnalogInputPrechargeControl | analogInputPrechargeDuration | Precharge duration for the analog input.
IfxEvadc_FastCompareAutomaticUpdate | automaticUpdateMode | Defines the source of the value(s) in bitfield FCM.B.FCREF.
IfxEvadc_BoundaryFlagSwControl | boundaryFlagAction | Action to be performed on the boundary flag(BFL)
IfxEvadc_BoundaryFlagActivationMode | boundaryFlagActivation | Selects the behaviour of BoundaryFlag in FCBFL.B.BFA.
IfxEvadc_BoundaryFlagInversionControl | boundaryFlagInversion | Select whether to use Boundary Flag(FCM.B.BFL) directly or in a inverted format.
IfxEvadc_BoundaryFlagNodePointer | boundaryFlagNodePointer | Options for FCM.B.BFLNP to select Boundary Flag Node Pointer.
boolean | boundaryFlagValue | Defines the logic value that replaces the compare result while the gate input is inactive (low) in lock mode.
IfxEvadc_ChannelEventMode | channelEventMode | Channel Event Mode for configuring generation of events for Fast Compare channels in FCCTRL.B.CHEVMODE.
IfxEvadc_ClockDividerFactor | clockDivider | Defines the frequency of the analog converter clock f_ADCI (base clock for conversion steps), derived from the peripheral clock.
IfxEvadc_FastCompareAnalogClockSynchronizationDelay | delay | Defines the delay of the analog clock in clocks after the sync signal in FCM.B.ACSD.
IfxEvadc_TriggerOperatingMode | externalTriggerOperatingMode | Trigger operating mode in Fast Compare channels, to be entered in FCCTRL.B.XTMODE.
IfxEvadc_ExternalTriggerPolarity | externalTriggerPolarity | External Trigger Polarity to be set in FCCTRL.B.XTPOL.
IfxEvadc_GroupId | fastCompareChannelId |
IfxEvadc_GateOperatingMode | gateOperatingMode | Gate Operating Mode to be filled in FCCTRL.B.GTMODE.
IfxEvadc_Adc * | module | Pointer to EVADC module handle.
IfxEvadc_RampDirection | rampDirection | Ramp direction setting in FCM.B.FCRDIR.
IfxEvadc_RampRunControl | rampGenerationMode | Defines the run conditions for the ramp generation in FCM.B.RUNRAMP.
IfxEvadc_ReferencePrechargeControl | referenceInputPrechargeDuration | Precharge duration for the reference input.
uint16 | referenceValue | The input level is compared to this value. The resulting reference level is (V_AREF / 1024) * FCM.B.FCREF.
IfxEvadc_FastCompareRunControl | runMode |
IfxEvadc_SampleSynchronization | sampleTimingSynchronization | Sample timing sync settings for FCM.B.SSE.
IfxEvadc_FastCompareServiceRequestGeneration | serviceRequestGenerationEvent | Criteria/mode settings for service request generation in FCM.B.SRG.
uint8 | triggerInterval | Defines the interval at which fast compare operations are triggered in steps of 16 * 1/f_ADC.

Function Documentation

◆ IfxEvadc_Adc_initFastCompareChannel()

IFX_EXTERN void IfxEvadc_Adc_initFastCompareChannel | ( | IfxEvadc_Adc_FastCompareChannel * | fastCompareChannel,
 |  | IfxEvadc_Adc_FastCompareChannelConfig * | config
 | ) |  |

Initializing the Fast Compare channel.

Parameters
fastCompareChannel | Pointer to the EVADC Fast Compare Channel group
config | Pointer to the EVADC Fast Compare Channel configuration structure
Returns
None

Definition at line 488 of file IfxEvadc_Adc.c.

◆ IfxEvadc_Adc_initFastCompareChannelConfig()

IFX_EXTERN void IfxEvadc_Adc_initFastCompareChannelConfig | ( | IfxEvadc_Adc_FastCompareChannelConfig * | config,
 |  | IfxEvadc_Adc * | evadc
 | ) |  |

Initializing Fast Compare Channel config structure with default configurations.

Parameters
config | pointer to the EVADC fast compare channel configuration structure
evadc | Pointer to the EVADC module
Returns
None

Definition at line 548 of file IfxEvadc_Adc.c.


iLLD_TC38A: IfxEvadc_cfg.h File Reference

  • _Impl
Macros | Enumerations | Variables
IfxEvadc_cfg.h File Reference
iLLD » EVADC

EVADC on-chip implementation data. More...

#include "Src/Std/IfxSrc.h"
Include dependency graph for IfxEvadc_cfg.h:

Go to the source code of this file.

Macros

#define | IFXEVADC_NUM_ADC_GROUPS (IFXEVADC_NUM_ADC_PRIMARY_GROUPS + IFXEVADC_NUM_ADC_SECONDARY_GROUPS)
Number of ADC Groups. More...
#define | IFXEVADC_NUM_ADC_CAL_GROUPS (12)
Number of calibrated ADC Groups. More...
#define | IFXEVADC_ANALOG_FREQUENCY_MAX (20000000)
Maximum allowed analog frequency. More...
#define | IFXEVADC_ANALOG_FREQUENCY_MIN (500000)
Minimum allowed analog frequency. More...
#define | IFXEVADC_DEFAULT_ANALOG_FREQ (20000000)
Default analog frequency used in initModuleConfig function. More...
#define | IFXEVADC_NUM_REQUESTSLOTS (3)
Number of Conversion request Slots. More...
#define | IFXEVADC_NUM_INPUTCLASSES (2)
Number of group specific Input Class. More...
#define | IFXEVADC_MAXIMUM_BITFIELDS_IN_ACCPROT0_REGISTER (32)
Maximum number of configurable bitfields in ACCPROT0 register. More...
#define | IFXEVADC_QUEUE_REFILL (1 << IFX_EVADC_G_Q_QINR_RF_OFF)
#define | IFXEVADC_NUM_GLOBAL_INPUTCLASSES (2)
Number of ADC group input classes. More...
#define | IFXEVADC_MAXIMUM_BITFIELDS_IN_ACCPROT1_REGISTER (64)
#define | IFXEVADC_NUM_ADC_PRIMARY_GROUPS (8)
number of primary Groups More...
#define | IFXEVADC_NUM_ADC_SECONDARY_GROUPS (4)
Secondary Group. More...
#define | IFXEVADC_NUM_FAST_COMPARE_CHANNELS (4)
Fast Compare Channel. More...
#define | IFXEVADC_NUM_ADC_COMMON_GROUPS (2)
Common Group. More...
#define | IFXEVADC_SAMPLETIME_MIN (2)
#define | IFXEVADC_NUM_CHAN_PER_PRIM_GROUP (64)
Number of channels in primary group. More...
#define | IFXEVADC_NUM_CHAN_PER_SEC_GROUP (64)
Number of channels in secondary group. More...

Enumerations

enum IfxEvadc_GroupId {
IfxEvadc_GroupId_0 = 0,
IfxEvadc_GroupId_1 = 1,
IfxEvadc_GroupId_2 = 2,
IfxEvadc_GroupId_3 = 3,
IfxEvadc_GroupId_4 = 4,
IfxEvadc_GroupId_5 = 5,
IfxEvadc_GroupId_6 = 6,
IfxEvadc_GroupId_7 = 7,
IfxEvadc_GroupId_8 = 8,
IfxEvadc_GroupId_9 = 9,
IfxEvadc_GroupId_10 = 10,
IfxEvadc_GroupId_11 = 11,
IfxEvadc_GroupId_12 = 12,
IfxEvadc_GroupId_13 = 13,
IfxEvadc_GroupId_14 = 14,
IfxEvadc_GroupId_15 = 15,
IfxEvadc_GroupId_global0 = 20,
IfxEvadc_GroupId_global1 = 21
}
VADC Groups. More...

Variables

IFX_EXTERN volatile Ifx_SRC_SRCR * IfxEvadc_cfg_srcAddresses [(IFXEVADC_NUM_ADC_PRIMARY_GROUPS *4)+(IFXEVADC_NUM_ADC_SECONDARY_GROUPS *4)+(IFXEVADC_NUM_FAST_COMPARE_CHANNELS *4)+(IFXEVADC_NUM_ADC_COMMON_GROUPS *4)]

Detailed Description

EVADC on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxEvadc_cfg.h.

Macro Definition Documentation

◆ IFXEVADC_ANALOG_FREQUENCY_MAX

#define IFXEVADC_ANALOG_FREQUENCY_MAX (20000000)

Maximum allowed analog frequency.

Definition at line 72 of file IfxEvadc_cfg.h.

Referenced by IfxEvadc_initializeFAdcI().

◆ IFXEVADC_ANALOG_FREQUENCY_MIN

#define IFXEVADC_ANALOG_FREQUENCY_MIN (500000)

Minimum allowed analog frequency.

Definition at line 76 of file IfxEvadc_cfg.h.

Referenced by IfxEvadc_initializeFAdcI().

◆ IFXEVADC_DEFAULT_ANALOG_FREQ

#define IFXEVADC_DEFAULT_ANALOG_FREQ (20000000)

Default analog frequency used in initModuleConfig function.

Definition at line 80 of file IfxEvadc_cfg.h.

Referenced by IfxEvadc_Adc_initGroupConfig().

◆ IFXEVADC_MAXIMUM_BITFIELDS_IN_ACCPROT0_REGISTER

#define IFXEVADC_MAXIMUM_BITFIELDS_IN_ACCPROT0_REGISTER (32)

Maximum number of configurable bitfields in ACCPROT0 register.

Definition at line 92 of file IfxEvadc_cfg.h.

Referenced by IfxEvadc_disableAccess(), and IfxEvadc_enableAccess().

◆ IFXEVADC_MAXIMUM_BITFIELDS_IN_ACCPROT1_REGISTER

#define IFXEVADC_MAXIMUM_BITFIELDS_IN_ACCPROT1_REGISTER (64)

Definition at line 100 of file IfxEvadc_cfg.h.

Referenced by IfxEvadc_disableAccess(), and IfxEvadc_enableAccess().

◆ IFXEVADC_NUM_ADC_CAL_GROUPS

#define IFXEVADC_NUM_ADC_CAL_GROUPS (12)

Number of calibrated ADC Groups.

Definition at line 68 of file IfxEvadc_cfg.h.

◆ IFXEVADC_NUM_ADC_COMMON_GROUPS

#define IFXEVADC_NUM_ADC_COMMON_GROUPS (2)

Common Group.

Definition at line 116 of file IfxEvadc_cfg.h.

◆ IFXEVADC_NUM_ADC_GROUPS

#define IFXEVADC_NUM_ADC_GROUPS (IFXEVADC_NUM_ADC_PRIMARY_GROUPS + IFXEVADC_NUM_ADC_SECONDARY_GROUPS)

Number of ADC Groups.

Definition at line 64 of file IfxEvadc_cfg.h.

Referenced by IfxEvadc_startupCalibration().

◆ IFXEVADC_NUM_ADC_PRIMARY_GROUPS

#define IFXEVADC_NUM_ADC_PRIMARY_GROUPS (8)

number of primary Groups

Definition at line 104 of file IfxEvadc_cfg.h.

Referenced by IfxEvadc_getSrcAddress(), and IfxEvadc_startupCalibration().

◆ IFXEVADC_NUM_ADC_SECONDARY_GROUPS

#define IFXEVADC_NUM_ADC_SECONDARY_GROUPS (4)

Secondary Group.

Definition at line 108 of file IfxEvadc_cfg.h.

Referenced by IfxEvadc_getSrcAddress().

◆ IFXEVADC_NUM_CHAN_PER_PRIM_GROUP

#define IFXEVADC_NUM_CHAN_PER_PRIM_GROUP (64)

Number of channels in primary group.

Definition at line 122 of file IfxEvadc_cfg.h.

◆ IFXEVADC_NUM_CHAN_PER_SEC_GROUP

#define IFXEVADC_NUM_CHAN_PER_SEC_GROUP (64)

Number of channels in secondary group.

Definition at line 126 of file IfxEvadc_cfg.h.

◆ IFXEVADC_NUM_FAST_COMPARE_CHANNELS

#define IFXEVADC_NUM_FAST_COMPARE_CHANNELS (4)

Fast Compare Channel.

Definition at line 112 of file IfxEvadc_cfg.h.

Referenced by IfxEvadc_getSrcAddress().

◆ IFXEVADC_NUM_GLOBAL_INPUTCLASSES

#define IFXEVADC_NUM_GLOBAL_INPUTCLASSES (2)

Number of ADC group input classes.

Definition at line 98 of file IfxEvadc_cfg.h.

Referenced by IfxEvadc_Adc_initModule().

◆ IFXEVADC_NUM_INPUTCLASSES

#define IFXEVADC_NUM_INPUTCLASSES (2)

Number of group specific Input Class.

Definition at line 88 of file IfxEvadc_cfg.h.

Referenced by IfxEvadc_Adc_getGroupConfig(), and IfxEvadc_Adc_initGroup().

◆ IFXEVADC_NUM_REQUESTSLOTS

#define IFXEVADC_NUM_REQUESTSLOTS (3)

Number of Conversion request Slots.

Definition at line 84 of file IfxEvadc_cfg.h.

◆ IFXEVADC_QUEUE_REFILL

#define IFXEVADC_QUEUE_REFILL (1 << IFX_EVADC_G_Q_QINR_RF_OFF)

Definition at line 94 of file IfxEvadc_cfg.h.

◆ IFXEVADC_SAMPLETIME_MIN

#define IFXEVADC_SAMPLETIME_MIN (2)

Definition at line 118 of file IfxEvadc_cfg.h.

Referenced by IfxEvadc_getEmuxGlobalSampleTime(), IfxEvadc_getEmuxGroupSampleTime(), IfxEvadc_getGlobalSampleTime(), and IfxEvadc_getGroupSampleTime().

Enumeration Type Documentation

◆ IfxEvadc_GroupId

enum IfxEvadc_GroupId

VADC Groups.

Enumerator
IfxEvadc_GroupId_0 | EVADC Group 0(Primary Group 0)
IfxEvadc_GroupId_1 | EVADC Group 1(Primary Group 1)
IfxEvadc_GroupId_2 | EVADC Group 2(Primary Group 2)
IfxEvadc_GroupId_3 | EVADC Group 3(Primary Group 3)
IfxEvadc_GroupId_4 | EVADC Group 4(Primary Group 4)
IfxEvadc_GroupId_5 | EVADC Group 5(Primary Group 5)
IfxEvadc_GroupId_6 | EVADC Group 6(Primary Group 6)
IfxEvadc_GroupId_7 | EVADC Group 7(Primary Group 7)
IfxEvadc_GroupId_8 | EVADC Group 8(Secondary Group 0)
IfxEvadc_GroupId_9 | EVADC Group 9(Secondary Group 1)
IfxEvadc_GroupId_10 | EVADC Group 10(Secondary Group 2)
IfxEvadc_GroupId_11 | EVADC Group 11(Secondary Group 3)
IfxEvadc_GroupId_12 | EVADC group 12 (Fast compare channel 0)
IfxEvadc_GroupId_13 | EVADC group 13 (Fast compare channel 1)
IfxEvadc_GroupId_14 | EVADC group 14 (Fast compare channel 2)
IfxEvadc_GroupId_15 | EVADC group 15 (Fast compare channel 3)
IfxEvadc_GroupId_global0 | EVADC group global0.
IfxEvadc_GroupId_global1 | EVADC group global1.

Definition at line 134 of file IfxEvadc_cfg.h.

Variable Documentation

◆ IfxEvadc_cfg_srcAddresses

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxEvadc_cfg_srcAddresses[(IFXEVADC_NUM_ADC_PRIMARY_GROUPS *4)+(IFXEVADC_NUM_ADC_SECONDARY_GROUPS *4)+(IFXEVADC_NUM_FAST_COMPARE_CHANNELS *4)+(IFXEVADC_NUM_ADC_COMMON_GROUPS *4)]

Definition at line 160 of file IfxEvadc_cfg.h.


iLLD_TC38A: IfxEvadc_PinMap.c File Reference

  • _PinMap
Variables
IfxEvadc_PinMap.c File Reference
iLLD » EVADC

EVADC I/O map. More...

#include "IfxEvadc_PinMap.h"
Include dependency graph for IfxEvadc_PinMap.c:

Go to the source code of this file.

Variables

IfxEvadc_Emux_Out | IfxEvadc_EMUX00_P02_6_OUT = {&MODULE_EVADC, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt5}
IfxEvadc_Emux_Out | IfxEvadc_EMUX00_P33_3_OUT = {&MODULE_EVADC, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt5}
IfxEvadc_Emux_Out | IfxEvadc_EMUX01_P02_7_OUT = {&MODULE_EVADC, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt5}
IfxEvadc_Emux_Out | IfxEvadc_EMUX01_P33_2_OUT = {&MODULE_EVADC, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt5}
IfxEvadc_Emux_Out | IfxEvadc_EMUX02_P02_8_OUT = {&MODULE_EVADC, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt5}
IfxEvadc_Emux_Out | IfxEvadc_EMUX02_P33_1_OUT = {&MODULE_EVADC, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt5}
IfxEvadc_Emux_Out | IfxEvadc_EMUX10_P00_6_OUT = {&MODULE_EVADC, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt5}
IfxEvadc_Emux_Out | IfxEvadc_EMUX10_P33_6_OUT = {&MODULE_EVADC, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt5}
IfxEvadc_Emux_Out | IfxEvadc_EMUX11_P00_7_OUT = {&MODULE_EVADC, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt5}
IfxEvadc_Emux_Out | IfxEvadc_EMUX11_P33_5_OUT = {&MODULE_EVADC, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt5}
IfxEvadc_Emux_Out | IfxEvadc_EMUX12_P00_8_OUT = {&MODULE_EVADC, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt5}
IfxEvadc_Emux_Out | IfxEvadc_EMUX12_P33_4_OUT = {&MODULE_EVADC, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt5}
IfxEvadc_GxBfl_Out | IfxEvadc_FC0BFLOUT_P00_5_OUT = {&MODULE_EVADC, IfxEvadc_GroupId_12, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt5}
IfxEvadc_GxBfl_Out | IfxEvadc_FC0BFLOUT_P33_4_OUT = {&MODULE_EVADC, IfxEvadc_GroupId_12, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt6}
IfxEvadc_GxBfl_Out | IfxEvadc_FC1BFLOUT_P10_1_OUT = {&MODULE_EVADC, IfxEvadc_GroupId_13, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt5}
IfxEvadc_GxBfl_Out | IfxEvadc_FC1BFLOUT_P33_6_OUT = {&MODULE_EVADC, IfxEvadc_GroupId_13, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt6}
IfxEvadc_GxBfl_Out | IfxEvadc_FC2BFLOUT_P00_7_OUT = {&MODULE_EVADC, IfxEvadc_GroupId_14, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt3}
IfxEvadc_GxBfl_Out | IfxEvadc_FC2BFLOUT_P33_0_OUT = {&MODULE_EVADC, IfxEvadc_GroupId_14, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt6}
IfxEvadc_GxBfl_Out | IfxEvadc_FC2BFLOUT_P33_5_OUT = {&MODULE_EVADC, IfxEvadc_GroupId_14, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt6}
IfxEvadc_GxBfl_Out | IfxEvadc_FC3BFLOUT_P10_2_OUT = {&MODULE_EVADC, IfxEvadc_GroupId_15, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt5}
IfxEvadc_GxBfl_Out | IfxEvadc_FC3BFLOUT_P33_2_OUT = {&MODULE_EVADC, IfxEvadc_GroupId_15, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt6}
IfxEvadc_GxBfl_Out | IfxEvadc_FC3BFLOUT_P33_7_OUT = {&MODULE_EVADC, IfxEvadc_GroupId_15, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt6}
IfxEvadc_Vadcg_In | IfxEvadc_FC0CH0_AN16_IN = {&MODULE_EVADC, IfxEvadc_GroupId_12, {NULL_PTR,16}, 0}
IfxEvadc_Vadcg_In | IfxEvadc_FC1CH0_P40_10_IN = {&MODULE_EVADC, IfxEvadc_GroupId_13, {&MODULE_P40,10}, 0}
IfxEvadc_Vadcg_In | IfxEvadc_FC2CH0_P00_12_IN = {&MODULE_EVADC, IfxEvadc_GroupId_14, {&MODULE_P00,12}, 0}
IfxEvadc_Vadcg_In | IfxEvadc_FC3CH0_P00_11_IN = {&MODULE_EVADC, IfxEvadc_GroupId_15, {&MODULE_P00,11}, 0}
IfxEvadc_Vadcg_In | IfxEvadc_G0CH0_AN0_IN = {&MODULE_EVADC, IfxEvadc_GroupId_0, {NULL_PTR, 0}, 0}
IfxEvadc_Vadcg_In | IfxEvadc_G0CH1_AN1_IN = {&MODULE_EVADC, IfxEvadc_GroupId_0, {NULL_PTR, 1}, 1}
IfxEvadc_Vadcg_In | IfxEvadc_G0CH2_AN2_IN = {&MODULE_EVADC, IfxEvadc_GroupId_0, {NULL_PTR, 2}, 2}
IfxEvadc_Vadcg_In | IfxEvadc_G0CH3_AN3_IN = {&MODULE_EVADC, IfxEvadc_GroupId_0, {NULL_PTR, 3}, 3}
IfxEvadc_Vadcg_In | IfxEvadc_G0CH4_AN4_IN = {&MODULE_EVADC, IfxEvadc_GroupId_0, {NULL_PTR, 4}, 4}
IfxEvadc_Vadcg_In | IfxEvadc_G0CH5_AN5_IN = {&MODULE_EVADC, IfxEvadc_GroupId_0, {NULL_PTR, 5}, 5}
IfxEvadc_Vadcg_In | IfxEvadc_G0CH6_AN6_IN = {&MODULE_EVADC, IfxEvadc_GroupId_0, {NULL_PTR, 6}, 6}
IfxEvadc_Vadcg_In | IfxEvadc_G0CH7_AN7_IN = {&MODULE_EVADC, IfxEvadc_GroupId_0, {NULL_PTR, 7}, 7}
IfxEvadc_Vadcg_In | IfxEvadc_G10CH0_P33_7_IN = {&MODULE_EVADC, IfxEvadc_GroupId_10, {&MODULE_P33, 7}, 0}
IfxEvadc_Vadcg_In | IfxEvadc_G10CH10_P34_2_IN = {&MODULE_EVADC, IfxEvadc_GroupId_10, {&MODULE_P34, 2}, 10}
IfxEvadc_Vadcg_In | IfxEvadc_G10CH11_P34_1_IN = {&MODULE_EVADC, IfxEvadc_GroupId_10, {&MODULE_P34, 1}, 11}
IfxEvadc_Vadcg_In | IfxEvadc_G10CH1_P33_6_IN = {&MODULE_EVADC, IfxEvadc_GroupId_10, {&MODULE_P33, 6}, 1}
IfxEvadc_Vadcg_In | IfxEvadc_G10CH2_P33_5_IN = {&MODULE_EVADC, IfxEvadc_GroupId_10, {&MODULE_P33, 5}, 2}
IfxEvadc_Vadcg_In | IfxEvadc_G10CH3_P33_4_IN = {&MODULE_EVADC, IfxEvadc_GroupId_10, {&MODULE_P33, 4}, 3}
IfxEvadc_Vadcg_In | IfxEvadc_G10CH4_P33_3_IN = {&MODULE_EVADC, IfxEvadc_GroupId_10, {&MODULE_P33, 3}, 4}
IfxEvadc_Vadcg_In | IfxEvadc_G10CH5_P33_2_IN = {&MODULE_EVADC, IfxEvadc_GroupId_10, {&MODULE_P33, 2}, 5}
IfxEvadc_Vadcg_In | IfxEvadc_G10CH6_P33_1_IN = {&MODULE_EVADC, IfxEvadc_GroupId_10, {&MODULE_P33, 1}, 6}
IfxEvadc_Vadcg_In | IfxEvadc_G10CH7_P33_0_IN = {&MODULE_EVADC, IfxEvadc_GroupId_10, {&MODULE_P33, 0}, 7}
IfxEvadc_Vadcg_In | IfxEvadc_G10CH8_P34_4_IN = {&MODULE_EVADC, IfxEvadc_GroupId_10, {&MODULE_P34, 4}, 8}
IfxEvadc_Vadcg_In | IfxEvadc_G10CH9_P34_3_IN = {&MODULE_EVADC, IfxEvadc_GroupId_10, {&MODULE_P34, 3}, 9}
IfxEvadc_Vadcg_In | IfxEvadc_G11CH0_AN4_IN = {&MODULE_EVADC, IfxEvadc_GroupId_11, {NULL_PTR, 4}, 0}
IfxEvadc_Vadcg_In | IfxEvadc_G11CH10_P40_2_IN = {&MODULE_EVADC, IfxEvadc_GroupId_11, {&MODULE_P40, 2}, 10}
IfxEvadc_Vadcg_In | IfxEvadc_G11CH11_P40_3_IN = {&MODULE_EVADC, IfxEvadc_GroupId_11, {&MODULE_P40, 3}, 11}
IfxEvadc_Vadcg_In | IfxEvadc_G11CH12_P40_4_IN = {&MODULE_EVADC, IfxEvadc_GroupId_11, {&MODULE_P40, 4}, 12}
IfxEvadc_Vadcg_In | IfxEvadc_G11CH13_P40_5_IN = {&MODULE_EVADC, IfxEvadc_GroupId_11, {&MODULE_P40, 5}, 13}
IfxEvadc_Vadcg_In | IfxEvadc_G11CH14_AN34_IN = {&MODULE_EVADC, IfxEvadc_GroupId_11, {NULL_PTR,34}, 14}
IfxEvadc_Vadcg_In | IfxEvadc_G11CH15_AN35_IN = {&MODULE_EVADC, IfxEvadc_GroupId_11, {NULL_PTR,35}, 15}
IfxEvadc_Vadcg_In | IfxEvadc_G11CH1_AN5_IN = {&MODULE_EVADC, IfxEvadc_GroupId_11, {NULL_PTR, 5}, 1}
IfxEvadc_Vadcg_In | IfxEvadc_G11CH2_AN6_IN = {&MODULE_EVADC, IfxEvadc_GroupId_11, {NULL_PTR, 6}, 2}
IfxEvadc_Vadcg_In | IfxEvadc_G11CH3_AN7_IN = {&MODULE_EVADC, IfxEvadc_GroupId_11, {NULL_PTR, 7}, 3}
IfxEvadc_Vadcg_In | IfxEvadc_G11CH4_AN8_IN = {&MODULE_EVADC, IfxEvadc_GroupId_11, {NULL_PTR, 8}, 4}
IfxEvadc_Vadcg_In | IfxEvadc_G11CH5_AN9_IN = {&MODULE_EVADC, IfxEvadc_GroupId_11, {NULL_PTR, 9}, 5}
IfxEvadc_Vadcg_In | IfxEvadc_G11CH6_AN10_IN = {&MODULE_EVADC, IfxEvadc_GroupId_11, {NULL_PTR,10}, 6}
IfxEvadc_Vadcg_In | IfxEvadc_G11CH7_AN11_IN = {&MODULE_EVADC, IfxEvadc_GroupId_11, {NULL_PTR,11}, 7}
IfxEvadc_Vadcg_In | IfxEvadc_G11CH8_P40_11_IN = {&MODULE_EVADC, IfxEvadc_GroupId_11, {&MODULE_P40,11}, 8}
IfxEvadc_Vadcg_In | IfxEvadc_G11CH9_P40_12_IN = {&MODULE_EVADC, IfxEvadc_GroupId_11, {&MODULE_P40,12}, 9}
IfxEvadc_Vadcg_In | IfxEvadc_G1CH0_AN8_IN = {&MODULE_EVADC, IfxEvadc_GroupId_1, {NULL_PTR, 8}, 0}
IfxEvadc_Vadcg_In | IfxEvadc_G1CH1_AN9_IN = {&MODULE_EVADC, IfxEvadc_GroupId_1, {NULL_PTR, 9}, 1}
IfxEvadc_Vadcg_In | IfxEvadc_G1CH2_AN10_IN = {&MODULE_EVADC, IfxEvadc_GroupId_1, {NULL_PTR,10}, 2}
IfxEvadc_Vadcg_In | IfxEvadc_G1CH3_AN11_IN = {&MODULE_EVADC, IfxEvadc_GroupId_1, {NULL_PTR,11}, 3}
IfxEvadc_Vadcg_In | IfxEvadc_G1CH4_AN12_IN = {&MODULE_EVADC, IfxEvadc_GroupId_1, {NULL_PTR,12}, 4}
IfxEvadc_Vadcg_In | IfxEvadc_G1CH5_AN13_IN = {&MODULE_EVADC, IfxEvadc_GroupId_1, {NULL_PTR,13}, 5}
IfxEvadc_Vadcg_In | IfxEvadc_G1CH6_AN14_IN = {&MODULE_EVADC, IfxEvadc_GroupId_1, {NULL_PTR,14}, 6}
IfxEvadc_Vadcg_In | IfxEvadc_G1CH7_AN15_IN = {&MODULE_EVADC, IfxEvadc_GroupId_1, {NULL_PTR,15}, 7}
IfxEvadc_Vadcg_In | IfxEvadc_G2CH0_AN16_IN = {&MODULE_EVADC, IfxEvadc_GroupId_2, {NULL_PTR,16}, 0}
IfxEvadc_Vadcg_In | IfxEvadc_G2CH1_P40_10_IN = {&MODULE_EVADC, IfxEvadc_GroupId_2, {&MODULE_P40,10}, 1}
IfxEvadc_Vadcg_In | IfxEvadc_G2CH2_P40_11_IN = {&MODULE_EVADC, IfxEvadc_GroupId_2, {&MODULE_P40,11}, 2}
IfxEvadc_Vadcg_In | IfxEvadc_G2CH3_P40_12_IN = {&MODULE_EVADC, IfxEvadc_GroupId_2, {&MODULE_P40,12}, 3}
IfxEvadc_Vadcg_In | IfxEvadc_G2CH4_AN20_IN = {&MODULE_EVADC, IfxEvadc_GroupId_2, {NULL_PTR,20}, 4}
IfxEvadc_Vadcg_In | IfxEvadc_G2CH5_AN21_IN = {&MODULE_EVADC, IfxEvadc_GroupId_2, {NULL_PTR,21}, 5}
IfxEvadc_Vadcg_In | IfxEvadc_G2CH6_AN22_IN = {&MODULE_EVADC, IfxEvadc_GroupId_2, {NULL_PTR,22}, 6}
IfxEvadc_Vadcg_In | IfxEvadc_G2CH7_AN23_IN = {&MODULE_EVADC, IfxEvadc_GroupId_2, {NULL_PTR,23}, 7}
IfxEvadc_Vadcg_In | IfxEvadc_G3CH0_P40_0_IN = {&MODULE_EVADC, IfxEvadc_GroupId_3, {&MODULE_P40, 0}, 0}
IfxEvadc_Vadcg_In | IfxEvadc_G3CH1_P40_1_IN = {&MODULE_EVADC, IfxEvadc_GroupId_3, {&MODULE_P40, 1}, 1}
IfxEvadc_Vadcg_In | IfxEvadc_G3CH2_P40_2_IN = {&MODULE_EVADC, IfxEvadc_GroupId_3, {&MODULE_P40, 2}, 2}
IfxEvadc_Vadcg_In | IfxEvadc_G3CH3_P40_3_IN = {&MODULE_EVADC, IfxEvadc_GroupId_3, {&MODULE_P40, 3}, 3}
IfxEvadc_Vadcg_In | IfxEvadc_G3CH4_P40_13_IN = {&MODULE_EVADC, IfxEvadc_GroupId_3, {&MODULE_P40,13}, 4}
IfxEvadc_Vadcg_In | IfxEvadc_G3CH5_P40_14_IN = {&MODULE_EVADC, IfxEvadc_GroupId_3, {&MODULE_P40,14}, 5}
IfxEvadc_Vadcg_In | IfxEvadc_G3CH6_AN30_IN = {&MODULE_EVADC, IfxEvadc_GroupId_3, {NULL_PTR,30}, 6}
IfxEvadc_Vadcg_In | IfxEvadc_G3CH7_AN31_IN = {&MODULE_EVADC, IfxEvadc_GroupId_3, {NULL_PTR,31}, 7}
IfxEvadc_Vadcg_In | IfxEvadc_G4CH0_AN40_IN = {&MODULE_EVADC, IfxEvadc_GroupId_4, {NULL_PTR,40}, 0}
IfxEvadc_Vadcg_In | IfxEvadc_G4CH1_AN41_IN = {&MODULE_EVADC, IfxEvadc_GroupId_4, {NULL_PTR,41}, 1}
IfxEvadc_Vadcg_In | IfxEvadc_G4CH2_AN42_IN = {&MODULE_EVADC, IfxEvadc_GroupId_4, {NULL_PTR,42}, 2}
IfxEvadc_Vadcg_In | IfxEvadc_G4CH3_AN43_IN = {&MODULE_EVADC, IfxEvadc_GroupId_4, {NULL_PTR,43}, 3}
IfxEvadc_Vadcg_In | IfxEvadc_G4CH4_P40_13_IN = {&MODULE_EVADC, IfxEvadc_GroupId_4, {&MODULE_P40,13}, 4}
IfxEvadc_Vadcg_In | IfxEvadc_G4CH5_P40_14_IN = {&MODULE_EVADC, IfxEvadc_GroupId_4, {&MODULE_P40,14}, 5}
IfxEvadc_Vadcg_In | IfxEvadc_G4CH6_AN30_IN = {&MODULE_EVADC, IfxEvadc_GroupId_4, {NULL_PTR,30}, 6}
IfxEvadc_Vadcg_In | IfxEvadc_G4CH7_AN31_IN = {&MODULE_EVADC, IfxEvadc_GroupId_4, {NULL_PTR,31}, 7}
IfxEvadc_Vadcg_In | IfxEvadc_G5CH0_AN48_IN = {&MODULE_EVADC, IfxEvadc_GroupId_5, {NULL_PTR,48}, 0}
IfxEvadc_Vadcg_In | IfxEvadc_G5CH1_AN49_IN = {&MODULE_EVADC, IfxEvadc_GroupId_5, {NULL_PTR,49}, 1}
IfxEvadc_Vadcg_In | IfxEvadc_G5CH2_AN50_IN = {&MODULE_EVADC, IfxEvadc_GroupId_5, {NULL_PTR,50}, 2}
IfxEvadc_Vadcg_In | IfxEvadc_G5CH3_AN51_IN = {&MODULE_EVADC, IfxEvadc_GroupId_5, {NULL_PTR,51}, 3}
IfxEvadc_Vadcg_In | IfxEvadc_G5CH4_AN52_IN = {&MODULE_EVADC, IfxEvadc_GroupId_5, {NULL_PTR,52}, 4}
IfxEvadc_Vadcg_In | IfxEvadc_G5CH5_AN53_IN = {&MODULE_EVADC, IfxEvadc_GroupId_5, {NULL_PTR,53}, 5}
IfxEvadc_Vadcg_In | IfxEvadc_G5CH6_P41_4_IN = {&MODULE_EVADC, IfxEvadc_GroupId_5, {&MODULE_P41, 4}, 6}
IfxEvadc_Vadcg_In | IfxEvadc_G5CH7_P41_5_IN = {&MODULE_EVADC, IfxEvadc_GroupId_5, {&MODULE_P41, 5}, 7}
IfxEvadc_Vadcg_In | IfxEvadc_G6CH0_AN56_IN = {&MODULE_EVADC, IfxEvadc_GroupId_6, {NULL_PTR,56}, 0}
IfxEvadc_Vadcg_In | IfxEvadc_G6CH1_AN57_IN = {&MODULE_EVADC, IfxEvadc_GroupId_6, {NULL_PTR,57}, 1}
IfxEvadc_Vadcg_In | IfxEvadc_G6CH2_AN58_IN = {&MODULE_EVADC, IfxEvadc_GroupId_6, {NULL_PTR,58}, 2}
IfxEvadc_Vadcg_In | IfxEvadc_G6CH3_AN59_IN = {&MODULE_EVADC, IfxEvadc_GroupId_6, {NULL_PTR,59}, 3}
IfxEvadc_Vadcg_In | IfxEvadc_G6CH4_AN60_IN = {&MODULE_EVADC, IfxEvadc_GroupId_6, {NULL_PTR,60}, 4}
IfxEvadc_Vadcg_In | IfxEvadc_G6CH5_AN61_IN = {&MODULE_EVADC, IfxEvadc_GroupId_6, {NULL_PTR,61}, 5}
IfxEvadc_Vadcg_In | IfxEvadc_G6CH6_P41_6_IN = {&MODULE_EVADC, IfxEvadc_GroupId_6, {&MODULE_P41, 6}, 6}
IfxEvadc_Vadcg_In | IfxEvadc_G6CH7_P41_7_IN = {&MODULE_EVADC, IfxEvadc_GroupId_6, {&MODULE_P41, 7}, 7}
IfxEvadc_Vadcg_In | IfxEvadc_G7CH0_P41_8_IN = {&MODULE_EVADC, IfxEvadc_GroupId_7, {&MODULE_P41, 8}, 0}
IfxEvadc_Vadcg_In | IfxEvadc_G7CH1_AN65_IN = {&MODULE_EVADC, IfxEvadc_GroupId_7, {NULL_PTR,65}, 1}
IfxEvadc_Vadcg_In | IfxEvadc_G7CH2_AN66_IN = {&MODULE_EVADC, IfxEvadc_GroupId_7, {NULL_PTR,66}, 2}
IfxEvadc_Vadcg_In | IfxEvadc_G7CH3_P40_15_IN = {&MODULE_EVADC, IfxEvadc_GroupId_7, {&MODULE_P40,15}, 3}
IfxEvadc_Vadcg_In | IfxEvadc_G7CH4_P41_0_IN = {&MODULE_EVADC, IfxEvadc_GroupId_7, {&MODULE_P41, 0}, 4}
IfxEvadc_Vadcg_In | IfxEvadc_G7CH5_P41_1_IN = {&MODULE_EVADC, IfxEvadc_GroupId_7, {&MODULE_P41, 1}, 5}
IfxEvadc_Vadcg_In | IfxEvadc_G7CH6_P41_2_IN = {&MODULE_EVADC, IfxEvadc_GroupId_7, {&MODULE_P41, 2}, 6}
IfxEvadc_Vadcg_In | IfxEvadc_G7CH7_P41_3_IN = {&MODULE_EVADC, IfxEvadc_GroupId_7, {&MODULE_P41, 3}, 7}
IfxEvadc_Vadcg_In | IfxEvadc_G8CH0_P40_4_IN = {&MODULE_EVADC, IfxEvadc_GroupId_8, {&MODULE_P40, 4}, 0}
IfxEvadc_Vadcg_In | IfxEvadc_G8CH10_AN42_IN = {&MODULE_EVADC, IfxEvadc_GroupId_8, {NULL_PTR,42}, 10}
IfxEvadc_Vadcg_In | IfxEvadc_G8CH11_AN43_IN = {&MODULE_EVADC, IfxEvadc_GroupId_8, {NULL_PTR,43}, 11}
IfxEvadc_Vadcg_In | IfxEvadc_G8CH12_AN44_IN = {&MODULE_EVADC, IfxEvadc_GroupId_8, {NULL_PTR,44}, 12}
IfxEvadc_Vadcg_In | IfxEvadc_G8CH13_AN45_IN = {&MODULE_EVADC, IfxEvadc_GroupId_8, {NULL_PTR,45}, 13}
IfxEvadc_Vadcg_In | IfxEvadc_G8CH14_AN46_IN = {&MODULE_EVADC, IfxEvadc_GroupId_8, {NULL_PTR,46}, 14}
IfxEvadc_Vadcg_In | IfxEvadc_G8CH15_AN47_IN = {&MODULE_EVADC, IfxEvadc_GroupId_8, {NULL_PTR,47}, 15}
IfxEvadc_Vadcg_In | IfxEvadc_G8CH1_P40_5_IN = {&MODULE_EVADC, IfxEvadc_GroupId_8, {&MODULE_P40, 5}, 1}
IfxEvadc_Vadcg_In | IfxEvadc_G8CH2_AN34_IN = {&MODULE_EVADC, IfxEvadc_GroupId_8, {NULL_PTR,34}, 2}
IfxEvadc_Vadcg_In | IfxEvadc_G8CH3_AN35_IN = {&MODULE_EVADC, IfxEvadc_GroupId_8, {NULL_PTR,35}, 3}
IfxEvadc_Vadcg_In | IfxEvadc_G8CH4_P40_6_IN = {&MODULE_EVADC, IfxEvadc_GroupId_8, {&MODULE_P40, 6}, 4}
IfxEvadc_Vadcg_In | IfxEvadc_G8CH5_P40_7_IN = {&MODULE_EVADC, IfxEvadc_GroupId_8, {&MODULE_P40, 7}, 5}
IfxEvadc_Vadcg_In | IfxEvadc_G8CH6_P40_8_IN = {&MODULE_EVADC, IfxEvadc_GroupId_8, {&MODULE_P40, 8}, 6}
IfxEvadc_Vadcg_In | IfxEvadc_G8CH7_P40_9_IN = {&MODULE_EVADC, IfxEvadc_GroupId_8, {&MODULE_P40, 9}, 7}
IfxEvadc_Vadcg_In | IfxEvadc_G8CH8_AN40_IN = {&MODULE_EVADC, IfxEvadc_GroupId_8, {NULL_PTR,40}, 8}
IfxEvadc_Vadcg_In | IfxEvadc_G8CH9_AN41_IN = {&MODULE_EVADC, IfxEvadc_GroupId_8, {NULL_PTR,41}, 9}
IfxEvadc_Vadcg_In | IfxEvadc_G9CH0_P00_12_IN = {&MODULE_EVADC, IfxEvadc_GroupId_9, {&MODULE_P00,12}, 0}
IfxEvadc_Vadcg_In | IfxEvadc_G9CH10_P00_2_IN = {&MODULE_EVADC, IfxEvadc_GroupId_9, {&MODULE_P00, 2}, 10}
IfxEvadc_Vadcg_In | IfxEvadc_G9CH11_P00_1_IN = {&MODULE_EVADC, IfxEvadc_GroupId_9, {&MODULE_P00, 1}, 11}
IfxEvadc_Vadcg_In | IfxEvadc_G9CH12_P01_5_IN = {&MODULE_EVADC, IfxEvadc_GroupId_9, {&MODULE_P01, 5}, 12}
IfxEvadc_Vadcg_In | IfxEvadc_G9CH13_P01_4_IN = {&MODULE_EVADC, IfxEvadc_GroupId_9, {&MODULE_P01, 4}, 13}
IfxEvadc_Vadcg_In | IfxEvadc_G9CH14_P01_3_IN = {&MODULE_EVADC, IfxEvadc_GroupId_9, {&MODULE_P01, 3}, 14}
IfxEvadc_Vadcg_In | IfxEvadc_G9CH15_P02_11_IN = {&MODULE_EVADC, IfxEvadc_GroupId_9, {&MODULE_P02,11}, 15}
IfxEvadc_Vadcg_In | IfxEvadc_G9CH1_P00_11_IN = {&MODULE_EVADC, IfxEvadc_GroupId_9, {&MODULE_P00,11}, 1}
IfxEvadc_Vadcg_In | IfxEvadc_G9CH2_P00_10_IN = {&MODULE_EVADC, IfxEvadc_GroupId_9, {&MODULE_P00,10}, 2}
IfxEvadc_Vadcg_In | IfxEvadc_G9CH3_P00_9_IN = {&MODULE_EVADC, IfxEvadc_GroupId_9, {&MODULE_P00, 9}, 3}
IfxEvadc_Vadcg_In | IfxEvadc_G9CH4_P00_8_IN = {&MODULE_EVADC, IfxEvadc_GroupId_9, {&MODULE_P00, 8}, 4}
IfxEvadc_Vadcg_In | IfxEvadc_G9CH5_P00_7_IN = {&MODULE_EVADC, IfxEvadc_GroupId_9, {&MODULE_P00, 7}, 5}
IfxEvadc_Vadcg_In | IfxEvadc_G9CH6_P00_6_IN = {&MODULE_EVADC, IfxEvadc_GroupId_9, {&MODULE_P00, 6}, 6}
IfxEvadc_Vadcg_In | IfxEvadc_G9CH7_P00_5_IN = {&MODULE_EVADC, IfxEvadc_GroupId_9, {&MODULE_P00, 5}, 7}
IfxEvadc_Vadcg_In | IfxEvadc_G9CH8_P00_4_IN = {&MODULE_EVADC, IfxEvadc_GroupId_9, {&MODULE_P00, 4}, 8}
IfxEvadc_Vadcg_In | IfxEvadc_G9CH9_P00_3_IN = {&MODULE_EVADC, IfxEvadc_GroupId_9, {&MODULE_P00, 3}, 9}
const IfxEvadc_Emux_Out * | IfxEvadc_Emux_Out_pinTable [IFXEVADC_PINMAP_NUM_MODULES][IFXEVADC_PINMAP_EMUX_OUT_NUM_ITEMS]
const IfxEvadc_GxBfl_Out * | IfxEvadc_GxBfl_Out_pinTable [IFXEVADC_PINMAP_NUM_MODULES][IFXEVADC_PINMAP_NUM_GROUPS][IFXEVADC_PINMAP_GXBFL_OUT_NUM_ITEMS]
const IfxEvadc_Vadcg_In * | IfxEvadc_Vadcg_In_pinTable [IFXEVADC_PINMAP_NUM_MODULES][IFXEVADC_PINMAP_NUM_GROUPS][IFXEVADC_PINMAP_VADCG_IN_NUM_ITEMS]

Detailed Description

EVADC I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxEvadc_PinMap.c.

Variable Documentation

◆ IfxEvadc_EMUX00_P02_6_OUT

IfxEvadc_Emux_Out IfxEvadc_EMUX00_P02_6_OUT = {&MODULE_EVADC, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt5}

Definition at line 45 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_EMUX00_P33_3_OUT

IfxEvadc_Emux_Out IfxEvadc_EMUX00_P33_3_OUT = {&MODULE_EVADC, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt5}

Definition at line 46 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_EMUX01_P02_7_OUT

IfxEvadc_Emux_Out IfxEvadc_EMUX01_P02_7_OUT = {&MODULE_EVADC, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt5}

Definition at line 47 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_EMUX01_P33_2_OUT

IfxEvadc_Emux_Out IfxEvadc_EMUX01_P33_2_OUT = {&MODULE_EVADC, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt5}

Definition at line 48 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_EMUX02_P02_8_OUT

IfxEvadc_Emux_Out IfxEvadc_EMUX02_P02_8_OUT = {&MODULE_EVADC, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt5}

Definition at line 49 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_EMUX02_P33_1_OUT

IfxEvadc_Emux_Out IfxEvadc_EMUX02_P33_1_OUT = {&MODULE_EVADC, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt5}

Definition at line 50 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_EMUX10_P00_6_OUT

IfxEvadc_Emux_Out IfxEvadc_EMUX10_P00_6_OUT = {&MODULE_EVADC, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt5}

Definition at line 51 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_EMUX10_P33_6_OUT

IfxEvadc_Emux_Out IfxEvadc_EMUX10_P33_6_OUT = {&MODULE_EVADC, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt5}

Definition at line 52 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_EMUX11_P00_7_OUT

IfxEvadc_Emux_Out IfxEvadc_EMUX11_P00_7_OUT = {&MODULE_EVADC, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt5}

Definition at line 53 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_EMUX11_P33_5_OUT

IfxEvadc_Emux_Out IfxEvadc_EMUX11_P33_5_OUT = {&MODULE_EVADC, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt5}

Definition at line 54 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_EMUX12_P00_8_OUT

IfxEvadc_Emux_Out IfxEvadc_EMUX12_P00_8_OUT = {&MODULE_EVADC, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt5}

Definition at line 55 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_EMUX12_P33_4_OUT

IfxEvadc_Emux_Out IfxEvadc_EMUX12_P33_4_OUT = {&MODULE_EVADC, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt5}

Definition at line 56 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_Emux_Out_pinTable

const IfxEvadc_Emux_Out* IfxEvadc_Emux_Out_pinTable[IFXEVADC_PINMAP_NUM_MODULES][IFXEVADC_PINMAP_EMUX_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxEvadc_EMUX10_P00_6_OUT,
&IfxEvadc_EMUX11_P00_7_OUT,
&IfxEvadc_EMUX12_P00_8_OUT,
&IfxEvadc_EMUX00_P02_6_OUT,
&IfxEvadc_EMUX01_P02_7_OUT,
&IfxEvadc_EMUX02_P02_8_OUT,
&IfxEvadc_EMUX02_P33_1_OUT,
&IfxEvadc_EMUX01_P33_2_OUT,
&IfxEvadc_EMUX00_P33_3_OUT,
&IfxEvadc_EMUX12_P33_4_OUT,
&IfxEvadc_EMUX11_P33_5_OUT,
&IfxEvadc_EMUX10_P33_6_OUT
}
}
IfxEvadc_EMUX12_P33_4_OUT
IfxEvadc_Emux_Out IfxEvadc_EMUX12_P33_4_OUT
Definition: IfxEvadc_PinMap.c:56
IfxEvadc_EMUX00_P33_3_OUT
IfxEvadc_Emux_Out IfxEvadc_EMUX00_P33_3_OUT
Definition: IfxEvadc_PinMap.c:46
IfxEvadc_EMUX10_P00_6_OUT
IfxEvadc_Emux_Out IfxEvadc_EMUX10_P00_6_OUT
Definition: IfxEvadc_PinMap.c:51
IfxEvadc_EMUX11_P33_5_OUT
IfxEvadc_Emux_Out IfxEvadc_EMUX11_P33_5_OUT
Definition: IfxEvadc_PinMap.c:54
IfxEvadc_EMUX02_P33_1_OUT
IfxEvadc_Emux_Out IfxEvadc_EMUX02_P33_1_OUT
Definition: IfxEvadc_PinMap.c:50
IfxEvadc_EMUX00_P02_6_OUT
IfxEvadc_Emux_Out IfxEvadc_EMUX00_P02_6_OUT
Definition: IfxEvadc_PinMap.c:45
IfxEvadc_EMUX01_P33_2_OUT
IfxEvadc_Emux_Out IfxEvadc_EMUX01_P33_2_OUT
Definition: IfxEvadc_PinMap.c:48
IfxEvadc_EMUX01_P02_7_OUT
IfxEvadc_Emux_Out IfxEvadc_EMUX01_P02_7_OUT
Definition: IfxEvadc_PinMap.c:47
IfxEvadc_EMUX12_P00_8_OUT
IfxEvadc_Emux_Out IfxEvadc_EMUX12_P00_8_OUT
Definition: IfxEvadc_PinMap.c:55
IfxEvadc_EMUX11_P00_7_OUT
IfxEvadc_Emux_Out IfxEvadc_EMUX11_P00_7_OUT
Definition: IfxEvadc_PinMap.c:53
IfxEvadc_EMUX10_P33_6_OUT
IfxEvadc_Emux_Out IfxEvadc_EMUX10_P33_6_OUT
Definition: IfxEvadc_PinMap.c:52
IfxEvadc_EMUX02_P02_8_OUT
IfxEvadc_Emux_Out IfxEvadc_EMUX02_P02_8_OUT
Definition: IfxEvadc_PinMap.c:49

Definition at line 197 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_FC0BFLOUT_P00_5_OUT

IfxEvadc_GxBfl_Out IfxEvadc_FC0BFLOUT_P00_5_OUT = {&MODULE_EVADC, IfxEvadc_GroupId_12, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt5}

Definition at line 57 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_FC0BFLOUT_P33_4_OUT

IfxEvadc_GxBfl_Out IfxEvadc_FC0BFLOUT_P33_4_OUT = {&MODULE_EVADC, IfxEvadc_GroupId_12, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt6}

Definition at line 58 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_FC0CH0_AN16_IN

IfxEvadc_Vadcg_In IfxEvadc_FC0CH0_AN16_IN = {&MODULE_EVADC, IfxEvadc_GroupId_12, {NULL_PTR,16}, 0}

Definition at line 67 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_FC1BFLOUT_P10_1_OUT

IfxEvadc_GxBfl_Out IfxEvadc_FC1BFLOUT_P10_1_OUT = {&MODULE_EVADC, IfxEvadc_GroupId_13, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt5}

Definition at line 59 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_FC1BFLOUT_P33_6_OUT

IfxEvadc_GxBfl_Out IfxEvadc_FC1BFLOUT_P33_6_OUT = {&MODULE_EVADC, IfxEvadc_GroupId_13, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt6}

Definition at line 60 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_FC1CH0_P40_10_IN

IfxEvadc_Vadcg_In IfxEvadc_FC1CH0_P40_10_IN = {&MODULE_EVADC, IfxEvadc_GroupId_13, {&MODULE_P40,10}, 0}

Definition at line 68 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_FC2BFLOUT_P00_7_OUT

IfxEvadc_GxBfl_Out IfxEvadc_FC2BFLOUT_P00_7_OUT = {&MODULE_EVADC, IfxEvadc_GroupId_14, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt3}

Definition at line 61 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_FC2BFLOUT_P33_0_OUT

IfxEvadc_GxBfl_Out IfxEvadc_FC2BFLOUT_P33_0_OUT = {&MODULE_EVADC, IfxEvadc_GroupId_14, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt6}

Definition at line 62 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_FC2BFLOUT_P33_5_OUT

IfxEvadc_GxBfl_Out IfxEvadc_FC2BFLOUT_P33_5_OUT = {&MODULE_EVADC, IfxEvadc_GroupId_14, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt6}

Definition at line 63 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_FC2CH0_P00_12_IN

IfxEvadc_Vadcg_In IfxEvadc_FC2CH0_P00_12_IN = {&MODULE_EVADC, IfxEvadc_GroupId_14, {&MODULE_P00,12}, 0}

Definition at line 69 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_FC3BFLOUT_P10_2_OUT

IfxEvadc_GxBfl_Out IfxEvadc_FC3BFLOUT_P10_2_OUT = {&MODULE_EVADC, IfxEvadc_GroupId_15, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt5}

Definition at line 64 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_FC3BFLOUT_P33_2_OUT

IfxEvadc_GxBfl_Out IfxEvadc_FC3BFLOUT_P33_2_OUT = {&MODULE_EVADC, IfxEvadc_GroupId_15, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt6}

Definition at line 65 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_FC3BFLOUT_P33_7_OUT

IfxEvadc_GxBfl_Out IfxEvadc_FC3BFLOUT_P33_7_OUT = {&MODULE_EVADC, IfxEvadc_GroupId_15, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt6}

Definition at line 66 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_FC3CH0_P00_11_IN

IfxEvadc_Vadcg_In IfxEvadc_FC3CH0_P00_11_IN = {&MODULE_EVADC, IfxEvadc_GroupId_15, {&MODULE_P00,11}, 0}

Definition at line 70 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G0CH0_AN0_IN

IfxEvadc_Vadcg_In IfxEvadc_G0CH0_AN0_IN = {&MODULE_EVADC, IfxEvadc_GroupId_0, {NULL_PTR, 0}, 0}

Definition at line 71 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G0CH1_AN1_IN

IfxEvadc_Vadcg_In IfxEvadc_G0CH1_AN1_IN = {&MODULE_EVADC, IfxEvadc_GroupId_0, {NULL_PTR, 1}, 1}

Definition at line 72 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G0CH2_AN2_IN

IfxEvadc_Vadcg_In IfxEvadc_G0CH2_AN2_IN = {&MODULE_EVADC, IfxEvadc_GroupId_0, {NULL_PTR, 2}, 2}

Definition at line 73 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G0CH3_AN3_IN

IfxEvadc_Vadcg_In IfxEvadc_G0CH3_AN3_IN = {&MODULE_EVADC, IfxEvadc_GroupId_0, {NULL_PTR, 3}, 3}

Definition at line 74 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G0CH4_AN4_IN

IfxEvadc_Vadcg_In IfxEvadc_G0CH4_AN4_IN = {&MODULE_EVADC, IfxEvadc_GroupId_0, {NULL_PTR, 4}, 4}

Definition at line 75 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G0CH5_AN5_IN

IfxEvadc_Vadcg_In IfxEvadc_G0CH5_AN5_IN = {&MODULE_EVADC, IfxEvadc_GroupId_0, {NULL_PTR, 5}, 5}

Definition at line 76 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G0CH6_AN6_IN

IfxEvadc_Vadcg_In IfxEvadc_G0CH6_AN6_IN = {&MODULE_EVADC, IfxEvadc_GroupId_0, {NULL_PTR, 6}, 6}

Definition at line 77 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G0CH7_AN7_IN

IfxEvadc_Vadcg_In IfxEvadc_G0CH7_AN7_IN = {&MODULE_EVADC, IfxEvadc_GroupId_0, {NULL_PTR, 7}, 7}

Definition at line 78 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G10CH0_P33_7_IN

IfxEvadc_Vadcg_In IfxEvadc_G10CH0_P33_7_IN = {&MODULE_EVADC, IfxEvadc_GroupId_10, {&MODULE_P33, 7}, 0}

Definition at line 79 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G10CH10_P34_2_IN

IfxEvadc_Vadcg_In IfxEvadc_G10CH10_P34_2_IN = {&MODULE_EVADC, IfxEvadc_GroupId_10, {&MODULE_P34, 2}, 10}

Definition at line 80 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G10CH11_P34_1_IN

IfxEvadc_Vadcg_In IfxEvadc_G10CH11_P34_1_IN = {&MODULE_EVADC, IfxEvadc_GroupId_10, {&MODULE_P34, 1}, 11}

Definition at line 81 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G10CH1_P33_6_IN

IfxEvadc_Vadcg_In IfxEvadc_G10CH1_P33_6_IN = {&MODULE_EVADC, IfxEvadc_GroupId_10, {&MODULE_P33, 6}, 1}

Definition at line 82 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G10CH2_P33_5_IN

IfxEvadc_Vadcg_In IfxEvadc_G10CH2_P33_5_IN = {&MODULE_EVADC, IfxEvadc_GroupId_10, {&MODULE_P33, 5}, 2}

Definition at line 83 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G10CH3_P33_4_IN

IfxEvadc_Vadcg_In IfxEvadc_G10CH3_P33_4_IN = {&MODULE_EVADC, IfxEvadc_GroupId_10, {&MODULE_P33, 4}, 3}

Definition at line 84 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G10CH4_P33_3_IN

IfxEvadc_Vadcg_In IfxEvadc_G10CH4_P33_3_IN = {&MODULE_EVADC, IfxEvadc_GroupId_10, {&MODULE_P33, 3}, 4}

Definition at line 85 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G10CH5_P33_2_IN

IfxEvadc_Vadcg_In IfxEvadc_G10CH5_P33_2_IN = {&MODULE_EVADC, IfxEvadc_GroupId_10, {&MODULE_P33, 2}, 5}

Definition at line 86 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G10CH6_P33_1_IN

IfxEvadc_Vadcg_In IfxEvadc_G10CH6_P33_1_IN = {&MODULE_EVADC, IfxEvadc_GroupId_10, {&MODULE_P33, 1}, 6}

Definition at line 87 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G10CH7_P33_0_IN

IfxEvadc_Vadcg_In IfxEvadc_G10CH7_P33_0_IN = {&MODULE_EVADC, IfxEvadc_GroupId_10, {&MODULE_P33, 0}, 7}

Definition at line 88 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G10CH8_P34_4_IN

IfxEvadc_Vadcg_In IfxEvadc_G10CH8_P34_4_IN = {&MODULE_EVADC, IfxEvadc_GroupId_10, {&MODULE_P34, 4}, 8}

Definition at line 89 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G10CH9_P34_3_IN

IfxEvadc_Vadcg_In IfxEvadc_G10CH9_P34_3_IN = {&MODULE_EVADC, IfxEvadc_GroupId_10, {&MODULE_P34, 3}, 9}

Definition at line 90 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G11CH0_AN4_IN

IfxEvadc_Vadcg_In IfxEvadc_G11CH0_AN4_IN = {&MODULE_EVADC, IfxEvadc_GroupId_11, {NULL_PTR, 4}, 0}

Definition at line 91 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G11CH10_P40_2_IN

IfxEvadc_Vadcg_In IfxEvadc_G11CH10_P40_2_IN = {&MODULE_EVADC, IfxEvadc_GroupId_11, {&MODULE_P40, 2}, 10}

Definition at line 92 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G11CH11_P40_3_IN

IfxEvadc_Vadcg_In IfxEvadc_G11CH11_P40_3_IN = {&MODULE_EVADC, IfxEvadc_GroupId_11, {&MODULE_P40, 3}, 11}

Definition at line 93 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G11CH12_P40_4_IN

IfxEvadc_Vadcg_In IfxEvadc_G11CH12_P40_4_IN = {&MODULE_EVADC, IfxEvadc_GroupId_11, {&MODULE_P40, 4}, 12}

Definition at line 94 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G11CH13_P40_5_IN

IfxEvadc_Vadcg_In IfxEvadc_G11CH13_P40_5_IN = {&MODULE_EVADC, IfxEvadc_GroupId_11, {&MODULE_P40, 5}, 13}

Definition at line 95 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G11CH14_AN34_IN

IfxEvadc_Vadcg_In IfxEvadc_G11CH14_AN34_IN = {&MODULE_EVADC, IfxEvadc_GroupId_11, {NULL_PTR,34}, 14}

Definition at line 96 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G11CH15_AN35_IN

IfxEvadc_Vadcg_In IfxEvadc_G11CH15_AN35_IN = {&MODULE_EVADC, IfxEvadc_GroupId_11, {NULL_PTR,35}, 15}

Definition at line 97 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G11CH1_AN5_IN

IfxEvadc_Vadcg_In IfxEvadc_G11CH1_AN5_IN = {&MODULE_EVADC, IfxEvadc_GroupId_11, {NULL_PTR, 5}, 1}

Definition at line 98 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G11CH2_AN6_IN

IfxEvadc_Vadcg_In IfxEvadc_G11CH2_AN6_IN = {&MODULE_EVADC, IfxEvadc_GroupId_11, {NULL_PTR, 6}, 2}

Definition at line 99 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G11CH3_AN7_IN

IfxEvadc_Vadcg_In IfxEvadc_G11CH3_AN7_IN = {&MODULE_EVADC, IfxEvadc_GroupId_11, {NULL_PTR, 7}, 3}

Definition at line 100 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G11CH4_AN8_IN

IfxEvadc_Vadcg_In IfxEvadc_G11CH4_AN8_IN = {&MODULE_EVADC, IfxEvadc_GroupId_11, {NULL_PTR, 8}, 4}

Definition at line 101 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G11CH5_AN9_IN

IfxEvadc_Vadcg_In IfxEvadc_G11CH5_AN9_IN = {&MODULE_EVADC, IfxEvadc_GroupId_11, {NULL_PTR, 9}, 5}

Definition at line 102 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G11CH6_AN10_IN

IfxEvadc_Vadcg_In IfxEvadc_G11CH6_AN10_IN = {&MODULE_EVADC, IfxEvadc_GroupId_11, {NULL_PTR,10}, 6}

Definition at line 103 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G11CH7_AN11_IN

IfxEvadc_Vadcg_In IfxEvadc_G11CH7_AN11_IN = {&MODULE_EVADC, IfxEvadc_GroupId_11, {NULL_PTR,11}, 7}

Definition at line 104 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G11CH8_P40_11_IN

IfxEvadc_Vadcg_In IfxEvadc_G11CH8_P40_11_IN = {&MODULE_EVADC, IfxEvadc_GroupId_11, {&MODULE_P40,11}, 8}

Definition at line 105 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G11CH9_P40_12_IN

IfxEvadc_Vadcg_In IfxEvadc_G11CH9_P40_12_IN = {&MODULE_EVADC, IfxEvadc_GroupId_11, {&MODULE_P40,12}, 9}

Definition at line 106 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G1CH0_AN8_IN

IfxEvadc_Vadcg_In IfxEvadc_G1CH0_AN8_IN = {&MODULE_EVADC, IfxEvadc_GroupId_1, {NULL_PTR, 8}, 0}

Definition at line 107 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G1CH1_AN9_IN

IfxEvadc_Vadcg_In IfxEvadc_G1CH1_AN9_IN = {&MODULE_EVADC, IfxEvadc_GroupId_1, {NULL_PTR, 9}, 1}

Definition at line 108 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G1CH2_AN10_IN

IfxEvadc_Vadcg_In IfxEvadc_G1CH2_AN10_IN = {&MODULE_EVADC, IfxEvadc_GroupId_1, {NULL_PTR,10}, 2}

Definition at line 109 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G1CH3_AN11_IN

IfxEvadc_Vadcg_In IfxEvadc_G1CH3_AN11_IN = {&MODULE_EVADC, IfxEvadc_GroupId_1, {NULL_PTR,11}, 3}

Definition at line 110 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G1CH4_AN12_IN

IfxEvadc_Vadcg_In IfxEvadc_G1CH4_AN12_IN = {&MODULE_EVADC, IfxEvadc_GroupId_1, {NULL_PTR,12}, 4}

Definition at line 111 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G1CH5_AN13_IN

IfxEvadc_Vadcg_In IfxEvadc_G1CH5_AN13_IN = {&MODULE_EVADC, IfxEvadc_GroupId_1, {NULL_PTR,13}, 5}

Definition at line 112 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G1CH6_AN14_IN

IfxEvadc_Vadcg_In IfxEvadc_G1CH6_AN14_IN = {&MODULE_EVADC, IfxEvadc_GroupId_1, {NULL_PTR,14}, 6}

Definition at line 113 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G1CH7_AN15_IN

IfxEvadc_Vadcg_In IfxEvadc_G1CH7_AN15_IN = {&MODULE_EVADC, IfxEvadc_GroupId_1, {NULL_PTR,15}, 7}

Definition at line 114 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G2CH0_AN16_IN

IfxEvadc_Vadcg_In IfxEvadc_G2CH0_AN16_IN = {&MODULE_EVADC, IfxEvadc_GroupId_2, {NULL_PTR,16}, 0}

Definition at line 115 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G2CH1_P40_10_IN

IfxEvadc_Vadcg_In IfxEvadc_G2CH1_P40_10_IN = {&MODULE_EVADC, IfxEvadc_GroupId_2, {&MODULE_P40,10}, 1}

Definition at line 116 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G2CH2_P40_11_IN

IfxEvadc_Vadcg_In IfxEvadc_G2CH2_P40_11_IN = {&MODULE_EVADC, IfxEvadc_GroupId_2, {&MODULE_P40,11}, 2}

Definition at line 117 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G2CH3_P40_12_IN

IfxEvadc_Vadcg_In IfxEvadc_G2CH3_P40_12_IN = {&MODULE_EVADC, IfxEvadc_GroupId_2, {&MODULE_P40,12}, 3}

Definition at line 118 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G2CH4_AN20_IN

IfxEvadc_Vadcg_In IfxEvadc_G2CH4_AN20_IN = {&MODULE_EVADC, IfxEvadc_GroupId_2, {NULL_PTR,20}, 4}

Definition at line 119 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G2CH5_AN21_IN

IfxEvadc_Vadcg_In IfxEvadc_G2CH5_AN21_IN = {&MODULE_EVADC, IfxEvadc_GroupId_2, {NULL_PTR,21}, 5}

Definition at line 120 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G2CH6_AN22_IN

IfxEvadc_Vadcg_In IfxEvadc_G2CH6_AN22_IN = {&MODULE_EVADC, IfxEvadc_GroupId_2, {NULL_PTR,22}, 6}

Definition at line 121 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G2CH7_AN23_IN

IfxEvadc_Vadcg_In IfxEvadc_G2CH7_AN23_IN = {&MODULE_EVADC, IfxEvadc_GroupId_2, {NULL_PTR,23}, 7}

Definition at line 122 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G3CH0_P40_0_IN

IfxEvadc_Vadcg_In IfxEvadc_G3CH0_P40_0_IN = {&MODULE_EVADC, IfxEvadc_GroupId_3, {&MODULE_P40, 0}, 0}

Definition at line 123 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G3CH1_P40_1_IN

IfxEvadc_Vadcg_In IfxEvadc_G3CH1_P40_1_IN = {&MODULE_EVADC, IfxEvadc_GroupId_3, {&MODULE_P40, 1}, 1}

Definition at line 124 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G3CH2_P40_2_IN

IfxEvadc_Vadcg_In IfxEvadc_G3CH2_P40_2_IN = {&MODULE_EVADC, IfxEvadc_GroupId_3, {&MODULE_P40, 2}, 2}

Definition at line 125 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G3CH3_P40_3_IN

IfxEvadc_Vadcg_In IfxEvadc_G3CH3_P40_3_IN = {&MODULE_EVADC, IfxEvadc_GroupId_3, {&MODULE_P40, 3}, 3}

Definition at line 126 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G3CH4_P40_13_IN

IfxEvadc_Vadcg_In IfxEvadc_G3CH4_P40_13_IN = {&MODULE_EVADC, IfxEvadc_GroupId_3, {&MODULE_P40,13}, 4}

Definition at line 127 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G3CH5_P40_14_IN

IfxEvadc_Vadcg_In IfxEvadc_G3CH5_P40_14_IN = {&MODULE_EVADC, IfxEvadc_GroupId_3, {&MODULE_P40,14}, 5}

Definition at line 128 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G3CH6_AN30_IN

IfxEvadc_Vadcg_In IfxEvadc_G3CH6_AN30_IN = {&MODULE_EVADC, IfxEvadc_GroupId_3, {NULL_PTR,30}, 6}

Definition at line 129 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G3CH7_AN31_IN

IfxEvadc_Vadcg_In IfxEvadc_G3CH7_AN31_IN = {&MODULE_EVADC, IfxEvadc_GroupId_3, {NULL_PTR,31}, 7}

Definition at line 130 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G4CH0_AN40_IN

IfxEvadc_Vadcg_In IfxEvadc_G4CH0_AN40_IN = {&MODULE_EVADC, IfxEvadc_GroupId_4, {NULL_PTR,40}, 0}

Definition at line 131 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G4CH1_AN41_IN

IfxEvadc_Vadcg_In IfxEvadc_G4CH1_AN41_IN = {&MODULE_EVADC, IfxEvadc_GroupId_4, {NULL_PTR,41}, 1}

Definition at line 132 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G4CH2_AN42_IN

IfxEvadc_Vadcg_In IfxEvadc_G4CH2_AN42_IN = {&MODULE_EVADC, IfxEvadc_GroupId_4, {NULL_PTR,42}, 2}

Definition at line 133 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G4CH3_AN43_IN

IfxEvadc_Vadcg_In IfxEvadc_G4CH3_AN43_IN = {&MODULE_EVADC, IfxEvadc_GroupId_4, {NULL_PTR,43}, 3}

Definition at line 134 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G4CH4_P40_13_IN

IfxEvadc_Vadcg_In IfxEvadc_G4CH4_P40_13_IN = {&MODULE_EVADC, IfxEvadc_GroupId_4, {&MODULE_P40,13}, 4}

Definition at line 135 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G4CH5_P40_14_IN

IfxEvadc_Vadcg_In IfxEvadc_G4CH5_P40_14_IN = {&MODULE_EVADC, IfxEvadc_GroupId_4, {&MODULE_P40,14}, 5}

Definition at line 136 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G4CH6_AN30_IN

IfxEvadc_Vadcg_In IfxEvadc_G4CH6_AN30_IN = {&MODULE_EVADC, IfxEvadc_GroupId_4, {NULL_PTR,30}, 6}

Definition at line 137 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G4CH7_AN31_IN

IfxEvadc_Vadcg_In IfxEvadc_G4CH7_AN31_IN = {&MODULE_EVADC, IfxEvadc_GroupId_4, {NULL_PTR,31}, 7}

Definition at line 138 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G5CH0_AN48_IN

IfxEvadc_Vadcg_In IfxEvadc_G5CH0_AN48_IN = {&MODULE_EVADC, IfxEvadc_GroupId_5, {NULL_PTR,48}, 0}

Definition at line 139 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G5CH1_AN49_IN

IfxEvadc_Vadcg_In IfxEvadc_G5CH1_AN49_IN = {&MODULE_EVADC, IfxEvadc_GroupId_5, {NULL_PTR,49}, 1}

Definition at line 140 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G5CH2_AN50_IN

IfxEvadc_Vadcg_In IfxEvadc_G5CH2_AN50_IN = {&MODULE_EVADC, IfxEvadc_GroupId_5, {NULL_PTR,50}, 2}

Definition at line 141 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G5CH3_AN51_IN

IfxEvadc_Vadcg_In IfxEvadc_G5CH3_AN51_IN = {&MODULE_EVADC, IfxEvadc_GroupId_5, {NULL_PTR,51}, 3}

Definition at line 142 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G5CH4_AN52_IN

IfxEvadc_Vadcg_In IfxEvadc_G5CH4_AN52_IN = {&MODULE_EVADC, IfxEvadc_GroupId_5, {NULL_PTR,52}, 4}

Definition at line 143 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G5CH5_AN53_IN

IfxEvadc_Vadcg_In IfxEvadc_G5CH5_AN53_IN = {&MODULE_EVADC, IfxEvadc_GroupId_5, {NULL_PTR,53}, 5}

Definition at line 144 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G5CH6_P41_4_IN

IfxEvadc_Vadcg_In IfxEvadc_G5CH6_P41_4_IN = {&MODULE_EVADC, IfxEvadc_GroupId_5, {&MODULE_P41, 4}, 6}

Definition at line 145 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G5CH7_P41_5_IN

IfxEvadc_Vadcg_In IfxEvadc_G5CH7_P41_5_IN = {&MODULE_EVADC, IfxEvadc_GroupId_5, {&MODULE_P41, 5}, 7}

Definition at line 146 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G6CH0_AN56_IN

IfxEvadc_Vadcg_In IfxEvadc_G6CH0_AN56_IN = {&MODULE_EVADC, IfxEvadc_GroupId_6, {NULL_PTR,56}, 0}

Definition at line 147 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G6CH1_AN57_IN

IfxEvadc_Vadcg_In IfxEvadc_G6CH1_AN57_IN = {&MODULE_EVADC, IfxEvadc_GroupId_6, {NULL_PTR,57}, 1}

Definition at line 148 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G6CH2_AN58_IN

IfxEvadc_Vadcg_In IfxEvadc_G6CH2_AN58_IN = {&MODULE_EVADC, IfxEvadc_GroupId_6, {NULL_PTR,58}, 2}

Definition at line 149 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G6CH3_AN59_IN

IfxEvadc_Vadcg_In IfxEvadc_G6CH3_AN59_IN = {&MODULE_EVADC, IfxEvadc_GroupId_6, {NULL_PTR,59}, 3}

Definition at line 150 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G6CH4_AN60_IN

IfxEvadc_Vadcg_In IfxEvadc_G6CH4_AN60_IN = {&MODULE_EVADC, IfxEvadc_GroupId_6, {NULL_PTR,60}, 4}

Definition at line 151 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G6CH5_AN61_IN

IfxEvadc_Vadcg_In IfxEvadc_G6CH5_AN61_IN = {&MODULE_EVADC, IfxEvadc_GroupId_6, {NULL_PTR,61}, 5}

Definition at line 152 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G6CH6_P41_6_IN

IfxEvadc_Vadcg_In IfxEvadc_G6CH6_P41_6_IN = {&MODULE_EVADC, IfxEvadc_GroupId_6, {&MODULE_P41, 6}, 6}

Definition at line 153 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G6CH7_P41_7_IN

IfxEvadc_Vadcg_In IfxEvadc_G6CH7_P41_7_IN = {&MODULE_EVADC, IfxEvadc_GroupId_6, {&MODULE_P41, 7}, 7}

Definition at line 154 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G7CH0_P41_8_IN

IfxEvadc_Vadcg_In IfxEvadc_G7CH0_P41_8_IN = {&MODULE_EVADC, IfxEvadc_GroupId_7, {&MODULE_P41, 8}, 0}

Definition at line 155 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G7CH1_AN65_IN

IfxEvadc_Vadcg_In IfxEvadc_G7CH1_AN65_IN = {&MODULE_EVADC, IfxEvadc_GroupId_7, {NULL_PTR,65}, 1}

Definition at line 156 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G7CH2_AN66_IN

IfxEvadc_Vadcg_In IfxEvadc_G7CH2_AN66_IN = {&MODULE_EVADC, IfxEvadc_GroupId_7, {NULL_PTR,66}, 2}

Definition at line 157 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G7CH3_P40_15_IN

IfxEvadc_Vadcg_In IfxEvadc_G7CH3_P40_15_IN = {&MODULE_EVADC, IfxEvadc_GroupId_7, {&MODULE_P40,15}, 3}

Definition at line 158 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G7CH4_P41_0_IN

IfxEvadc_Vadcg_In IfxEvadc_G7CH4_P41_0_IN = {&MODULE_EVADC, IfxEvadc_GroupId_7, {&MODULE_P41, 0}, 4}

Definition at line 159 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G7CH5_P41_1_IN

IfxEvadc_Vadcg_In IfxEvadc_G7CH5_P41_1_IN = {&MODULE_EVADC, IfxEvadc_GroupId_7, {&MODULE_P41, 1}, 5}

Definition at line 160 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G7CH6_P41_2_IN

IfxEvadc_Vadcg_In IfxEvadc_G7CH6_P41_2_IN = {&MODULE_EVADC, IfxEvadc_GroupId_7, {&MODULE_P41, 2}, 6}

Definition at line 161 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G7CH7_P41_3_IN

IfxEvadc_Vadcg_In IfxEvadc_G7CH7_P41_3_IN = {&MODULE_EVADC, IfxEvadc_GroupId_7, {&MODULE_P41, 3}, 7}

Definition at line 162 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G8CH0_P40_4_IN

IfxEvadc_Vadcg_In IfxEvadc_G8CH0_P40_4_IN = {&MODULE_EVADC, IfxEvadc_GroupId_8, {&MODULE_P40, 4}, 0}

Definition at line 163 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G8CH10_AN42_IN

IfxEvadc_Vadcg_In IfxEvadc_G8CH10_AN42_IN = {&MODULE_EVADC, IfxEvadc_GroupId_8, {NULL_PTR,42}, 10}

Definition at line 164 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G8CH11_AN43_IN

IfxEvadc_Vadcg_In IfxEvadc_G8CH11_AN43_IN = {&MODULE_EVADC, IfxEvadc_GroupId_8, {NULL_PTR,43}, 11}

Definition at line 165 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G8CH12_AN44_IN

IfxEvadc_Vadcg_In IfxEvadc_G8CH12_AN44_IN = {&MODULE_EVADC, IfxEvadc_GroupId_8, {NULL_PTR,44}, 12}

Definition at line 166 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G8CH13_AN45_IN

IfxEvadc_Vadcg_In IfxEvadc_G8CH13_AN45_IN = {&MODULE_EVADC, IfxEvadc_GroupId_8, {NULL_PTR,45}, 13}

Definition at line 167 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G8CH14_AN46_IN

IfxEvadc_Vadcg_In IfxEvadc_G8CH14_AN46_IN = {&MODULE_EVADC, IfxEvadc_GroupId_8, {NULL_PTR,46}, 14}

Definition at line 168 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G8CH15_AN47_IN

IfxEvadc_Vadcg_In IfxEvadc_G8CH15_AN47_IN = {&MODULE_EVADC, IfxEvadc_GroupId_8, {NULL_PTR,47}, 15}

Definition at line 169 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G8CH1_P40_5_IN

IfxEvadc_Vadcg_In IfxEvadc_G8CH1_P40_5_IN = {&MODULE_EVADC, IfxEvadc_GroupId_8, {&MODULE_P40, 5}, 1}

Definition at line 170 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G8CH2_AN34_IN

IfxEvadc_Vadcg_In IfxEvadc_G8CH2_AN34_IN = {&MODULE_EVADC, IfxEvadc_GroupId_8, {NULL_PTR,34}, 2}

Definition at line 171 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G8CH3_AN35_IN

IfxEvadc_Vadcg_In IfxEvadc_G8CH3_AN35_IN = {&MODULE_EVADC, IfxEvadc_GroupId_8, {NULL_PTR,35}, 3}

Definition at line 172 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G8CH4_P40_6_IN

IfxEvadc_Vadcg_In IfxEvadc_G8CH4_P40_6_IN = {&MODULE_EVADC, IfxEvadc_GroupId_8, {&MODULE_P40, 6}, 4}

Definition at line 173 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G8CH5_P40_7_IN

IfxEvadc_Vadcg_In IfxEvadc_G8CH5_P40_7_IN = {&MODULE_EVADC, IfxEvadc_GroupId_8, {&MODULE_P40, 7}, 5}

Definition at line 174 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G8CH6_P40_8_IN

IfxEvadc_Vadcg_In IfxEvadc_G8CH6_P40_8_IN = {&MODULE_EVADC, IfxEvadc_GroupId_8, {&MODULE_P40, 8}, 6}

Definition at line 175 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G8CH7_P40_9_IN

IfxEvadc_Vadcg_In IfxEvadc_G8CH7_P40_9_IN = {&MODULE_EVADC, IfxEvadc_GroupId_8, {&MODULE_P40, 9}, 7}

Definition at line 176 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G8CH8_AN40_IN

IfxEvadc_Vadcg_In IfxEvadc_G8CH8_AN40_IN = {&MODULE_EVADC, IfxEvadc_GroupId_8, {NULL_PTR,40}, 8}

Definition at line 177 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G8CH9_AN41_IN

IfxEvadc_Vadcg_In IfxEvadc_G8CH9_AN41_IN = {&MODULE_EVADC, IfxEvadc_GroupId_8, {NULL_PTR,41}, 9}

Definition at line 178 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G9CH0_P00_12_IN

IfxEvadc_Vadcg_In IfxEvadc_G9CH0_P00_12_IN = {&MODULE_EVADC, IfxEvadc_GroupId_9, {&MODULE_P00,12}, 0}

Definition at line 179 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G9CH10_P00_2_IN

IfxEvadc_Vadcg_In IfxEvadc_G9CH10_P00_2_IN = {&MODULE_EVADC, IfxEvadc_GroupId_9, {&MODULE_P00, 2}, 10}

Definition at line 180 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G9CH11_P00_1_IN

IfxEvadc_Vadcg_In IfxEvadc_G9CH11_P00_1_IN = {&MODULE_EVADC, IfxEvadc_GroupId_9, {&MODULE_P00, 1}, 11}

Definition at line 181 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G9CH12_P01_5_IN

IfxEvadc_Vadcg_In IfxEvadc_G9CH12_P01_5_IN = {&MODULE_EVADC, IfxEvadc_GroupId_9, {&MODULE_P01, 5}, 12}

Definition at line 182 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G9CH13_P01_4_IN

IfxEvadc_Vadcg_In IfxEvadc_G9CH13_P01_4_IN = {&MODULE_EVADC, IfxEvadc_GroupId_9, {&MODULE_P01, 4}, 13}

Definition at line 183 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G9CH14_P01_3_IN

IfxEvadc_Vadcg_In IfxEvadc_G9CH14_P01_3_IN = {&MODULE_EVADC, IfxEvadc_GroupId_9, {&MODULE_P01, 3}, 14}

Definition at line 184 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G9CH15_P02_11_IN

IfxEvadc_Vadcg_In IfxEvadc_G9CH15_P02_11_IN = {&MODULE_EVADC, IfxEvadc_GroupId_9, {&MODULE_P02,11}, 15}

Definition at line 185 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G9CH1_P00_11_IN

IfxEvadc_Vadcg_In IfxEvadc_G9CH1_P00_11_IN = {&MODULE_EVADC, IfxEvadc_GroupId_9, {&MODULE_P00,11}, 1}

Definition at line 186 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G9CH2_P00_10_IN

IfxEvadc_Vadcg_In IfxEvadc_G9CH2_P00_10_IN = {&MODULE_EVADC, IfxEvadc_GroupId_9, {&MODULE_P00,10}, 2}

Definition at line 187 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G9CH3_P00_9_IN

IfxEvadc_Vadcg_In IfxEvadc_G9CH3_P00_9_IN = {&MODULE_EVADC, IfxEvadc_GroupId_9, {&MODULE_P00, 9}, 3}

Definition at line 188 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G9CH4_P00_8_IN

IfxEvadc_Vadcg_In IfxEvadc_G9CH4_P00_8_IN = {&MODULE_EVADC, IfxEvadc_GroupId_9, {&MODULE_P00, 8}, 4}

Definition at line 189 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G9CH5_P00_7_IN

IfxEvadc_Vadcg_In IfxEvadc_G9CH5_P00_7_IN = {&MODULE_EVADC, IfxEvadc_GroupId_9, {&MODULE_P00, 7}, 5}

Definition at line 190 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G9CH6_P00_6_IN

IfxEvadc_Vadcg_In IfxEvadc_G9CH6_P00_6_IN = {&MODULE_EVADC, IfxEvadc_GroupId_9, {&MODULE_P00, 6}, 6}

Definition at line 191 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G9CH7_P00_5_IN

IfxEvadc_Vadcg_In IfxEvadc_G9CH7_P00_5_IN = {&MODULE_EVADC, IfxEvadc_GroupId_9, {&MODULE_P00, 5}, 7}

Definition at line 192 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G9CH8_P00_4_IN

IfxEvadc_Vadcg_In IfxEvadc_G9CH8_P00_4_IN = {&MODULE_EVADC, IfxEvadc_GroupId_9, {&MODULE_P00, 4}, 8}

Definition at line 193 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_G9CH9_P00_3_IN

IfxEvadc_Vadcg_In IfxEvadc_G9CH9_P00_3_IN = {&MODULE_EVADC, IfxEvadc_GroupId_9, {&MODULE_P00, 3}, 9}

Definition at line 194 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_GxBfl_Out_pinTable

const IfxEvadc_GxBfl_Out* IfxEvadc_GxBfl_Out_pinTable[IFXEVADC_PINMAP_NUM_MODULES][IFXEVADC_PINMAP_NUM_GROUPS][IFXEVADC_PINMAP_GXBFL_OUT_NUM_ITEMS]

Definition at line 214 of file IfxEvadc_PinMap.c.

◆ IfxEvadc_Vadcg_In_pinTable

const IfxEvadc_Vadcg_In* IfxEvadc_Vadcg_In_pinTable[IFXEVADC_PINMAP_NUM_MODULES][IFXEVADC_PINMAP_NUM_GROUPS][IFXEVADC_PINMAP_VADCG_IN_NUM_ITEMS]

Definition at line 299 of file IfxEvadc_PinMap.c.


iLLD_TC38A: IfxEvadc_PinMap.h File Reference

  • _PinMap
Data Structures | Macros | Variables
IfxEvadc_PinMap.h File Reference
iLLD » EVADC

EVADC I/O map. More...

#include <IfxEvadc_reg.h>
#include <_Impl/IfxEvadc_cfg.h>
#include <Port/Std/IfxPort.h>
Include dependency graph for IfxEvadc_PinMap.h:

Go to the source code of this file.

Data Structures

struct | IfxEvadc_GxBfl_Out
EVADC Boundary Flag pin mapping structure. More...
struct | IfxEvadc_Emux_Out
EVADC External Mux pin mapping structure. More...
struct | IfxEvadc_Vadcg_In
EVADC Analog Input. More...

Macros

#define | IFXEVADC_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXEVADC_PINMAP_NUM_GROUPS 16
#define | IFXEVADC_PINMAP_EMUX_OUT_NUM_ITEMS 12
#define | IFXEVADC_PINMAP_GXBFL_OUT_NUM_ITEMS 3
#define | IFXEVADC_PINMAP_VADCG_IN_NUM_ITEMS 16

Variables

IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX00_P02_6_OUT
Control of external analog multiplexer interface 0. More...
IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX00_P33_3_OUT
Control of external analog multiplexer interface 0. More...
IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX01_P02_7_OUT
Control of external analog multiplexer interface 0. More...
IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX01_P33_2_OUT
Control of external analog multiplexer interface 0. More...
IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX02_P02_8_OUT
Control of external analog multiplexer interface 0. More...
IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX02_P33_1_OUT
Control of external analog multiplexer interface 0. More...
IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX10_P00_6_OUT
Control of external analog multiplexer interface 1. More...
IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX10_P33_6_OUT
Control of external analog multiplexer interface 1. More...
IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX11_P00_7_OUT
Control of external analog multiplexer interface 1. More...
IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX11_P33_5_OUT
Control of external analog multiplexer interface 1. More...
IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX12_P00_8_OUT
Control of external analog multiplexer interface 1. More...
IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX12_P33_4_OUT
Control of external analog multiplexer interface 1. More...
IFX_EXTERN IfxEvadc_GxBfl_Out IfxEvadc_FC0BFLOUT_P00_5_OUT
Boundary flag output, FC channel 0. More...
IFX_EXTERN IfxEvadc_GxBfl_Out IfxEvadc_FC0BFLOUT_P33_4_OUT
Boundary flag output, FC channel 0. More...
IFX_EXTERN IfxEvadc_GxBfl_Out IfxEvadc_FC1BFLOUT_P10_1_OUT
Boundary flag output, FC channel 1. More...
IFX_EXTERN IfxEvadc_GxBfl_Out IfxEvadc_FC1BFLOUT_P33_6_OUT
Boundary flag output, FC channel 1. More...
IFX_EXTERN IfxEvadc_GxBfl_Out IfxEvadc_FC2BFLOUT_P00_7_OUT
Boundary flag output, FC channel 2. More...
IFX_EXTERN IfxEvadc_GxBfl_Out IfxEvadc_FC2BFLOUT_P33_0_OUT
Boundary flag output, FC channel 2. More...
IFX_EXTERN IfxEvadc_GxBfl_Out IfxEvadc_FC2BFLOUT_P33_5_OUT
Boundary flag output, FC channel 2. More...
IFX_EXTERN IfxEvadc_GxBfl_Out IfxEvadc_FC3BFLOUT_P10_2_OUT
Boundary flag output, FC channel 3. More...
IFX_EXTERN IfxEvadc_GxBfl_Out IfxEvadc_FC3BFLOUT_P33_2_OUT
Boundary flag output, FC channel 3. More...
IFX_EXTERN IfxEvadc_GxBfl_Out IfxEvadc_FC3BFLOUT_P33_7_OUT
Boundary flag output, FC channel 3. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_FC0CH0_AN16_IN
Analog input FC channel 0. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_FC1CH0_P40_10_IN
Analog input FC channel 1. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_FC2CH0_P00_12_IN
Analog input FC channel 2. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_FC3CH0_P00_11_IN
Analog input FC channel 3. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G0CH0_AN0_IN
Analog input channel 0, group 0. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G0CH1_AN1_IN
Analog input channel 1, group 0. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G0CH2_AN2_IN
Analog input channel 2, group 0. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G0CH3_AN3_IN
Analog input channel 3, group 0. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G0CH4_AN4_IN
Analog input channel 4, group 0. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G0CH5_AN5_IN
Analog input channel 5, group 0. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G0CH6_AN6_IN
Analog input channel 6, group 0. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G0CH7_AN7_IN
Analog input channel 7, group 0. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH0_P33_7_IN
Analog input channel 0, group 10. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH10_P34_2_IN
Analog input channel 10, group 10. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH11_P34_1_IN
Analog input channel 11, group 10. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH1_P33_6_IN
Analog input channel 1, group 10. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH2_P33_5_IN
Analog input channel 2, group 10. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH3_P33_4_IN
Analog input channel 3, group 10. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH4_P33_3_IN
Analog input channel 4, group 10. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH5_P33_2_IN
Analog input channel 5, group 10. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH6_P33_1_IN
Analog input channel 6, group 10. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH7_P33_0_IN
Analog input channel 7, group 10. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH8_P34_4_IN
Analog input channel 8, group 10. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH9_P34_3_IN
Analog input channel 9, group 10. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH0_AN4_IN
Analog input channel 0, group 11. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH10_P40_2_IN
Analog input channel 10, group 11. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH11_P40_3_IN
Analog input channel 11, group 11. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH12_P40_4_IN
Analog input channel 12, group 11. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH13_P40_5_IN
Analog input channel 13, group 11. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH14_AN34_IN
Analog input channel 14, group 11. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH15_AN35_IN
Analog input channel 15, group 11. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH1_AN5_IN
Analog input channel 1, group 11. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH2_AN6_IN
Analog input channel 2, group 11. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH3_AN7_IN
Analog input channel 3, group 11. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH4_AN8_IN
Analog input channel 4, group 11. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH5_AN9_IN
Analog input channel 5, group 11. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH6_AN10_IN
Analog input channel 6, group 11. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH7_AN11_IN
Analog input channel 7, group 11. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH8_P40_11_IN
Analog input channel 8, group 11. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH9_P40_12_IN
Analog input channel 9, group 11. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G1CH0_AN8_IN
Analog input channel 0, group 1. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G1CH1_AN9_IN
Analog input channel 1, group 1. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G1CH2_AN10_IN
Analog input channel 2, group 1. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G1CH3_AN11_IN
Analog input channel 3, group 1. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G1CH4_AN12_IN
Analog input channel 4, group 1. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G1CH5_AN13_IN
Analog input channel 5, group 1. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G1CH6_AN14_IN
Analog input channel 6, group 1. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G1CH7_AN15_IN
Analog input channel 7, group 1. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G2CH0_AN16_IN
Analog input channel 0, group 2. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G2CH1_P40_10_IN
Analog input channel 1, group 2. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G2CH2_P40_11_IN
Analog input channel 2, group 2. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G2CH3_P40_12_IN
Analog input channel 3, group 2. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G2CH4_AN20_IN
Analog input channel 4, group 2. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G2CH5_AN21_IN
Analog input channel 5, group 2. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G2CH6_AN22_IN
Analog input channel 6, group 2. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G2CH7_AN23_IN
Analog input channel 7, group 2. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G3CH0_P40_0_IN
Analog input channel 0, group 3. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G3CH1_P40_1_IN
Analog input channel 1, group 3. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G3CH2_P40_2_IN
Analog input channel 2, group 3. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G3CH3_P40_3_IN
Analog input channel 3, group 3. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G3CH4_P40_13_IN
Analog input channel 4, group 3. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G3CH5_P40_14_IN
Analog input channel 5, group 3. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G3CH6_AN30_IN
Analog input channel 6, group 3. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G3CH7_AN31_IN
Analog input channel 7, group 3. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G4CH0_AN40_IN
Analog input channel 0, group 4. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G4CH1_AN41_IN
Analog input channel 1, group 4. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G4CH2_AN42_IN
Analog input channel 2, group 4. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G4CH3_AN43_IN
Analog input channel 3, group 4. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G4CH4_P40_13_IN
Analog input channel 4, group 4. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G4CH5_P40_14_IN
Analog input channel 5, group 4. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G4CH6_AN30_IN
Analog input channel 6, group 4. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G4CH7_AN31_IN
Analog input channel 7, group 4. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G5CH0_AN48_IN
Analog input channel 0, group 5. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G5CH1_AN49_IN
Analog input channel 1, group 5. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G5CH2_AN50_IN
Analog input channel 2, group 5. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G5CH3_AN51_IN
Analog input channel 3, group 5. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G5CH4_AN52_IN
Analog input channel 4, group 5. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G5CH5_AN53_IN
Analog input channel 5, group 5. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G5CH6_P41_4_IN
Analog input channel 6, group 5. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G5CH7_P41_5_IN
Analog input channel 7, group 5. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G6CH0_AN56_IN
Analog input channel 0, group 6. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G6CH1_AN57_IN
Analog input channel 1, group 6. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G6CH2_AN58_IN
Analog input channel 2, group 6. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G6CH3_AN59_IN
Analog input channel 3, group 6. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G6CH4_AN60_IN
Analog input channel 4, group 6. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G6CH5_AN61_IN
Analog input channel 5, group 6. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G6CH6_P41_6_IN
Analog input channel 6, group 6. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G6CH7_P41_7_IN
Analog input channel 7, group 6. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G7CH0_P41_8_IN
Analog input channel 0, group 7. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G7CH1_AN65_IN
Analog input channel 1, group 7. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G7CH2_AN66_IN
Analog input channel 2, group 7. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G7CH3_P40_15_IN
Analog input channel 3, group 7. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G7CH4_P41_0_IN
Analog input channel 4, group 7. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G7CH5_P41_1_IN
Analog input channel 5, group 7. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G7CH6_P41_2_IN
Analog input channel 6, group 7. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G7CH7_P41_3_IN
Analog input channel 7, group 7. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH0_P40_4_IN
Analog input channel 0, group 8. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH10_AN42_IN
Analog input channel 10, group 8. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH11_AN43_IN
Analog input channel 11, group 8. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH12_AN44_IN
Analog input channel 12, group 8. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH13_AN45_IN
Analog input channel 13, group 8. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH14_AN46_IN
Analog input channel 14, group 8. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH15_AN47_IN
Analog input channel 15, group 8. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH1_P40_5_IN
Analog input channel 1, group 8. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH2_AN34_IN
Analog input channel 2, group 8. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH3_AN35_IN
Analog input channel 3, group 8. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH4_P40_6_IN
Analog input channel 4, group 8. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH5_P40_7_IN
Analog input channel 5, group 8. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH6_P40_8_IN
Analog input channel 6, group 8. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH7_P40_9_IN
Analog input channel 7, group 8. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH8_AN40_IN
Analog input channel 8, group 8. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH9_AN41_IN
Analog input channel 9, group 8. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH0_P00_12_IN
Analog input channel 0, group 9. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH10_P00_2_IN
Analog input channel 10, group 9. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH11_P00_1_IN
Analog input channel 11, group 9. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH12_P01_5_IN
Analog input channel 12, group 9. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH13_P01_4_IN
Analog input channel 13, group 9. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH14_P01_3_IN
Analog input channel 14, group 9. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH15_P02_11_IN
Analog input channel 15, group 9. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH1_P00_11_IN
Analog input channel 1, group 9. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH2_P00_10_IN
Analog input channel 2, group 9. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH3_P00_9_IN
Analog input channel 3, group 9. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH4_P00_8_IN
Analog input channel 4, group 9. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH5_P00_7_IN
Analog input channel 5, group 9. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH6_P00_6_IN
Analog input channel 6, group 9. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH7_P00_5_IN
Analog input channel 7, group 9. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH8_P00_4_IN
Analog input channel 8, group 9. More...
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH9_P00_3_IN
Analog input channel 9, group 9. More...
IFX_EXTERN const IfxEvadc_Emux_Out * | IfxEvadc_Emux_Out_pinTable [IFXEVADC_PINMAP_NUM_MODULES][IFXEVADC_PINMAP_EMUX_OUT_NUM_ITEMS]
IfxEvadc_Emux_Out table. More...
IFX_EXTERN const IfxEvadc_GxBfl_Out * | IfxEvadc_GxBfl_Out_pinTable [IFXEVADC_PINMAP_NUM_MODULES][IFXEVADC_PINMAP_NUM_GROUPS][IFXEVADC_PINMAP_GXBFL_OUT_NUM_ITEMS]
IfxEvadc_GxBfl_Out table. More...
IFX_EXTERN const IfxEvadc_Vadcg_In * | IfxEvadc_Vadcg_In_pinTable [IFXEVADC_PINMAP_NUM_MODULES][IFXEVADC_PINMAP_NUM_GROUPS][IFXEVADC_PINMAP_VADCG_IN_NUM_ITEMS]
IfxEvadc_Vadcg_In table. More...

Detailed Description

EVADC I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxEvadc_PinMap.h.


iLLD_TC38A: IfxEvadc_Adc.h File Reference

  • Evadc
  • Adc
Data Structures | Typedefs | Functions
IfxEvadc_Adc.h File Reference
iLLD » EVADC

EVADC ADC details. More...

#include "Evadc/Std/IfxEvadc.h"
#include "_Utilities/Ifx_Assert.h"
Include dependency graph for IfxEvadc_Adc.h:

Go to the source code of this file.

Data Structures

struct | IfxEvadc_Adc
EVADC handle data structure. More...
struct | IfxEvadc_Adc_GatingTriggerConfig
Gating/Trigger configuration structure. More...
struct | IfxEvadc_Adc_ArbiterConfig
Arbiter configuration structure. More...
struct | IfxEvadc_Adc_ClassConfig
Input class configuration structure. More...
struct | IfxEvadc_Adc_EmuxPinConfig
struct | IfxEvadc_Adc_Group
Group handle data structure. More...
struct | IfxEvadc_Adc_QueueConfig
Queue configuration structure. More...
struct | IfxEvadc_Adc_Channel
Channel handle data structure. More...
struct | IfxEvadc_Adc_ChannelConfig
Channel configuration structure. More...
struct | IfxEvadc_Adc_Config
EVADC module configuration structure. More...
struct | IfxEvadc_Adc_EmuxControl
Emux Control Structure. More...
struct | IfxEvadc_Adc_GroupConfig
Group configuration structure. More...
struct | IfxEvadc_Adc_FastCompareChannel
struct | IfxEvadc_Adc_FastCompareChannelConfig
Configuring Fast Compare channel operations. More...

Typedefs

typedef uint8 IfxEvadc_Adc_SYNCTR_STSEL

Functions

IFX_INLINE void | IfxEvadc_Adc_deInitModule (IfxEvadc_Adc *evadc)
Reset the EVADC module. More...
IFX_INLINE void | IfxEvadc_Adc_getModuleConfig (IfxEvadc_Adc *evadc, IfxEvadc_Adc_Config *config, Ifx_EVADC_G *evadcG)
Get the current EVADC configuration (e.g. EVADC frequency) More...
IFX_INLINE Ifx_EVADC_G_RES | IfxEvadc_Adc_getResultBasedOnRequestSource (IfxEvadc_Adc_Group *group, IfxEvadc_ChannelId channel, IfxEvadc_RequestSource sourceType)
Get conversion result based on the Request Source. (Function does not care about the alignment) value = raw * gain + offset. More...
IFX_EXTERN IfxEvadc_Status | IfxEvadc_Adc_initModule (IfxEvadc_Adc *evadc, const IfxEvadc_Adc_Config *config)
Initialise the EVADC to run with the expected frequency and calibration. More...
IFX_EXTERN void | IfxEvadc_Adc_initModuleConfig (IfxEvadc_Adc_Config *config, Ifx_EVADC *evadc)
Initialise buffer with default EVADC configuration. More...
IFX_INLINE Ifx_EVADC * | IfxEvadc_Adc_getEvadcFromGroup (const IfxEvadc_Adc_Group *group)
Gets the current group module register address. More...
IFX_INLINE Ifx_EVADC_G * | IfxEvadc_Adc_getGroupRegsFromGroup (const IfxEvadc_Adc_Group *group)
Gets the current group register set. More...
IFX_INLINE void | IfxEvadc_Adc_getGroupResult (IfxEvadc_Adc_Group *group, Ifx_EVADC_G_RES *results, uint32 resultOffset, uint32 numResults)
Get conversion result for the group. More...
IFX_EXTERN void | IfxEvadc_Adc_deInitGroup (IfxEvadc_Adc_Group *group)
Reset the EVADC group. More...
IFX_EXTERN void | IfxEvadc_Adc_getGroupConfig (IfxEvadc_Adc_Group *group, IfxEvadc_Adc_GroupConfig *config)
Get the current group configuration (e.g. evadc frequency) More...
IFX_EXTERN IfxEvadc_Status | IfxEvadc_Adc_initGroup (IfxEvadc_Adc_Group *group, const IfxEvadc_Adc_GroupConfig *config)
Initialise the EVADC group (also queue modes) Slave Groups must initialize first. More...
IFX_EXTERN void | IfxEvadc_Adc_initGroupConfig (IfxEvadc_Adc_GroupConfig *config, IfxEvadc_Adc *evadc)
Initialise buffer with default EVADC configuration. More...
IFX_INLINE void | IfxEvadc_Adc_configureWaitForReadMode (IfxEvadc_Adc_Channel *channel, boolean waitForReadMode)
pointer to the EVADC channel More...
IFX_INLINE Ifx_EVADC_G_RES | IfxEvadc_Adc_getResult (IfxEvadc_Adc_Channel *channel)
Get conversion result (Function does not care about the alignment) More...
IFX_EXTERN void | IfxEvadc_Adc_getChannelConfig (IfxEvadc_Adc_Channel *channel, IfxEvadc_Adc_ChannelConfig *config)
Get the current channel configuration (e.g. sample settings) More...
IFX_EXTERN IfxEvadc_Status | IfxEvadc_Adc_initChannel (IfxEvadc_Adc_Channel *channel, const IfxEvadc_Adc_ChannelConfig *config)
Initialise one channel with given configuration. More...
IFX_EXTERN void | IfxEvadc_Adc_initChannelConfig (IfxEvadc_Adc_ChannelConfig *config, const IfxEvadc_Adc_Group *group)
Initialise buffer with default channel configuration. More...
IFX_INLINE void | IfxEvadc_Adc_addToQueue (IfxEvadc_Adc_Channel *channel, IfxEvadc_RequestSource sourceType, uint32 options)
Add an entry to the queue of a group for the specified channel with the following options set: refill source interrupt enable/disable external trigger control. More...
IFX_INLINE void | IfxEvadc_Adc_clearQueue (IfxEvadc_Adc_Group *group, IfxEvadc_RequestSource sourceType)
Flush the contents of the queue of a group. More...
IFX_INLINE IfxEvadc_Status | IfxEvadc_Adc_getQueueStatus (IfxEvadc_Adc_Group *group, IfxEvadc_RequestSource sourceType)
Gives the status of the Queue of a group by returning non zero value if the Queue is full. More...
IFX_INLINE void | IfxEvadc_Adc_startQueue (IfxEvadc_Adc_Group *group, IfxEvadc_RequestSource sourceType)
Starts a queue of a group by generating a trigger event through software. More...
IFX_INLINE void | IfxEvadc_Adc_configureWaitForReadModeForGlobalResultRegister (IfxEvadc_Adc *evadc, boolean waitForReadMode)
access function to enable/disable wait for read mode for global result register More...
IFX_INLINE Ifx_EVADC_GLOB_RES | IfxEvadc_Adc_getGlobalResult (IfxEvadc_Adc *evadc)
returns result stored in global result register More...
IFX_EXTERN void | IfxEvadc_Adc_setGlobalConfigurations (Ifx_EVADC *evadc, const IfxEvadc_Adc_Config *config)
Configure global settings in the GLOBCFG register. More...
IFX_EXTERN void | IfxEvadc_Adc_initExternalMultiplexerMode (Ifx_EVADC *evadc, const IfxEvadc_Adc_EmuxControl *emuxControl)
initalise external multiplexer. More...
IFX_EXTERN void | IfxEvadc_Adc_initExternalMultiplexerModeConfig (IfxEvadc_Adc_EmuxControl *emuxConfig, Ifx_EVADC *evadc)
initialise default configuration for external multiplexer More...
IFX_EXTERN void | IfxEvadc_Adc_initFastCompareChannel (IfxEvadc_Adc_FastCompareChannel *fastCompareChannel, IfxEvadc_Adc_FastCompareChannelConfig *config)
Initializing the Fast Compare channel. More...
IFX_EXTERN void | IfxEvadc_Adc_initFastCompareChannelConfig (IfxEvadc_Adc_FastCompareChannelConfig *config, IfxEvadc_Adc *evadc)
Initializing Fast Compare Channel config structure with default configurations. More...
IFX_EXTERN void | IfxEvadc_Adc_setAnalogConvertControl (Ifx_EVADC *evadc, IfxEvadc_Adc_Group *group, IfxEvadc_AnalogConverterMode analogConverterMode)
set analog converter mode More...

Detailed Description

EVADC ADC details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxEvadc_Adc.h.

Typedef Documentation

◆ IfxEvadc_Adc_SYNCTR_STSEL

typedef uint8 IfxEvadc_Adc_SYNCTR_STSEL

Definition at line 249 of file IfxEvadc_Adc.h.

Function Documentation

◆ IfxEvadc_Adc_setAnalogConvertControl()

IFX_EXTERN void IfxEvadc_Adc_setAnalogConvertControl | ( | Ifx_EVADC * | evadc,
 |  | IfxEvadc_Adc_Group * | group,
 |  | IfxEvadc_AnalogConverterMode | analogConverterMode
 | ) |  |

set analog converter mode

Parameters
evadc | Pointer to module space
group | Pointer to evadc group
analogConverterMode | specifies analog convert mode
Returns
None

Definition at line 974 of file IfxEvadc_Adc.c.


iLLD_TC38A: IfxEvadc.h File Reference

  • Evadc
  • Std
Enumerations | Functions
IfxEvadc.h File Reference
iLLD » EVADC

EVADC basic functionality. More...

#include "_Impl/IfxEvadc_cfg.h"
#include "_PinMap/IfxEvadc_PinMap.h"
#include "IfxEvadc_bf.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "Scu/Std/IfxScuCcu.h"
#include "Scu/Std/IfxScuWdt.h"
#include "IfxCbs_reg.h"
Include dependency graph for IfxEvadc.h:

Go to the source code of this file.

Enumerations

enum IfxEvadc_AnalogConverterMode {
IfxEvadc_AnalogConverterMode_off = 0,
IfxEvadc_AnalogConverterMode_slowStandby = 1,
IfxEvadc_AnalogConverterMode_fastStandby = 2,
IfxEvadc_AnalogConverterMode_normalOperation = 3
}
Defined in MODULE_EVADC.G[x].ARBCFG.B.ANONS and ANONC. More...
enum IfxEvadc_ArbitrationRounds {
IfxEvadc_ArbitrationRounds_4_slots = 0,
IfxEvadc_ArbitrationRounds_8_slots = 1,
IfxEvadc_ArbitrationRounds_16_slots = 2,
IfxEvadc_ArbitrationRounds_20_slots = 3
}
Arbitration round length defined in MODULE_EVADC.G[x].ARBCFG.ARBRND(x=0,1,..,11) More...
enum IfxEvadc_BoundaryExtension {
IfxEvadc_BoundaryExtension_standard = 0,
IfxEvadc_BoundaryExtension_fastCompareResult1 = 1,
IfxEvadc_BoundaryExtension_fastCompareResult2 = 2,
IfxEvadc_BoundaryExtension_fastCompareResult3 = 3,
IfxEvadc_BoundaryExtension_fastCompareResult4 = 4,
IfxEvadc_BoundaryExtension_fastCompareResult5 = 5,
IfxEvadc_BoundaryExtension_fastCompareResult6 = 6,
IfxEvadc_BoundaryExtension_fastCompareResult7 = 7,
IfxEvadc_BoundaryExtension_fastCompareResult8 = 8,
IfxEvadc_BoundaryExtension_fastCompareResult9 = 9,
IfxEvadc_BoundaryExtension_fastCompareResult10 = 10,
IfxEvadc_BoundaryExtension_fastCompareResult11 = 11,
IfxEvadc_BoundaryExtension_fastCompareResult12 = 12,
IfxEvadc_BoundaryExtension_fastCompareResult13 = 13,
IfxEvadc_BoundaryExtension_fastCompareResult14 = 14,
IfxEvadc_BoundaryExtension_fastCompareResult15 = 15
}
Boundary Extension defined in MODULE_EVADC.G[x].CHCTR[y].B.BNDSELX(x=0,1,...,11;y=0,1....,16) More...
enum IfxEvadc_BoundarySelection {
IfxEvadc_BoundarySelection_group0 = 0,
IfxEvadc_BoundarySelection_group1 = 1,
IfxEvadc_BoundarySelection_global0 = 2,
IfxEvadc_BoundarySelection_global1 = 3
}
BoundarySel defined in MODULE_EVADC.G[x].CHCTR[y].B.BNDSELL(x=0,1,...,11;y=0,1....,16) More...
enum IfxEvadc_ChannelId {
IfxEvadc_ChannelId_none = -1,
IfxEvadc_ChannelId_0 = 0,
IfxEvadc_ChannelId_1 = 1,
IfxEvadc_ChannelId_2 = 2,
IfxEvadc_ChannelId_3 = 3,
IfxEvadc_ChannelId_4 = 4,
IfxEvadc_ChannelId_5 = 5,
IfxEvadc_ChannelId_6 = 6,
IfxEvadc_ChannelId_7 = 7,
IfxEvadc_ChannelId_8 = 8,
IfxEvadc_ChannelId_9 = 9,
IfxEvadc_ChannelId_10 = 10,
IfxEvadc_ChannelId_11 = 11,
IfxEvadc_ChannelId_12 = 12,
IfxEvadc_ChannelId_13 = 13,
IfxEvadc_ChannelId_14 = 14,
IfxEvadc_ChannelId_15 = 15
}
EVADC Channels. More...
enum IfxEvadc_ChannelReference {
IfxEvadc_ChannelReference_standard = 0,
IfxEvadc_ChannelReference_channel0 = 1
}
ADC channel reference defined in MODULE_EVADC.G[x].CHCTR[y].B.REFSEL(x=0,1,...,11;y=0,1....,16) More...
enum IfxEvadc_ChannelResult {
IfxEvadc_ChannelResult_0 = 0,
IfxEvadc_ChannelResult_1,
IfxEvadc_ChannelResult_2,
IfxEvadc_ChannelResult_3,
IfxEvadc_ChannelResult_4,
IfxEvadc_ChannelResult_5,
IfxEvadc_ChannelResult_6,
IfxEvadc_ChannelResult_7,
IfxEvadc_ChannelResult_8,
IfxEvadc_ChannelResult_9,
IfxEvadc_ChannelResult_10,
IfxEvadc_ChannelResult_11,
IfxEvadc_ChannelResult_12,
IfxEvadc_ChannelResult_13,
IfxEvadc_ChannelResult_14,
IfxEvadc_ChannelResult_15
}
Channel Result defined in MODULE_EVADC.G[x].CHCTR[y].B.RESREG(x=0,1,...,11;y=0,1....,16) More...
enum IfxEvadc_ChannelSelectionStyle {
IfxEvadc_ChannelSelectionStyle_channelNumber = 0,
IfxEvadc_ChannelSelectionStyle_binary = 1
}
External Multiplexer Channel Selection Style as defined in Ifx_EVADC.G[x].EMUXCTR.B.EMXCSS. More...
enum IfxEvadc_EmuxCodingScheme {
IfxEvadc_EmuxCodingScheme_binary = 0,
IfxEvadc_EmuxCodingScheme_gray = 1
}
Specifies the External Coding scheme(binary/gray) defined in Ifx_EVADC.G[x].EMUXCTR.B.EMXCOD. More...
enum IfxEvadc_EmuxInterface {
IfxEvadc_EmuxInterface_0 = 0,
IfxEvadc_EmuxInterface_1 = 1
}
Specifies the Emux interface. More...
enum IfxEvadc_EmuxSampleTimeControl {
IfxEvadc_EmuxSampleTimeControl_settingChanges = 0,
IfxEvadc_EmuxSampleTimeControl_always = 1
}
External Multiplexer sample time control defined in Ifx_EVADC.G[x].EMUXCTR.B.EMXST. More...
enum IfxEvadc_EmuxSelectValue {
IfxEvadc_EmuxSelectValue_0 = 0,
IfxEvadc_EmuxSelectValue_1,
IfxEvadc_EmuxSelectValue_2,
IfxEvadc_EmuxSelectValue_3,
IfxEvadc_EmuxSelectValue_4,
IfxEvadc_EmuxSelectValue_5,
IfxEvadc_EmuxSelectValue_6,
IfxEvadc_EmuxSelectValue_7
}
specifies the External Channel Start select value defined in Ifx_EVADC.G[x].EMUXCTR.B.EMUXSET More...
enum IfxEvadc_ExternalMultiplexerMode {
IfxEvadc_ExternalMultiplexerMode_softwareControl = 0,
IfxEvadc_ExternalMultiplexerMode_steady = 1,
IfxEvadc_ExternalMultiplexerMode_singleStep = 2,
IfxEvadc_ExternalMultiplexerMode_sequence = 3
}
Specifies External Multiplexer Mode define in Ifx_EVADC.G[x].EMUXCTR.B.EMUXMODE. More...
enum IfxEvadc_FifoMode {
IfxEvadc_FifoMode_seperateResultRegister = 0,
IfxEvadc_FifoMode_fifoStructure = 1,
IfxEvadc_FifoMode_maximumMode = 2,
IfxEvadc_FifoMode_minimumMode = 3
}
FIFO mode enable. More...
enum IfxEvadc_GatingMode {
IfxEvadc_GatingMode_disabled = 0,
IfxEvadc_GatingMode_always = 1,
IfxEvadc_GatingMode_gatingHigh = 2,
IfxEvadc_GatingMode_gatingLow = 3
}
gating mode defined in MODULE_EVADC.QMR0.ENGT More...
enum IfxEvadc_GatingSource {
IfxEvadc_GatingSource_0 = 0,
IfxEvadc_GatingSource_1,
IfxEvadc_GatingSource_2,
IfxEvadc_GatingSource_3,
IfxEvadc_GatingSource_4,
IfxEvadc_GatingSource_5,
IfxEvadc_GatingSource_6,
IfxEvadc_GatingSource_7,
IfxEvadc_GatingSource_8,
IfxEvadc_GatingSource_9,
IfxEvadc_GatingSource_10,
IfxEvadc_GatingSource_11,
IfxEvadc_GatingSource_12,
IfxEvadc_GatingSource_13,
IfxEvadc_GatingSource_14,
IfxEvadc_GatingSource_15
}
External trigger gating defined in MODULE_EVADC.G[x].QCTRLy.GTSEL(x=0,1,..,11;y=0,1,..,7) More...
enum IfxEvadc_InputClasses {
IfxEvadc_InputClasses_group0 = 0,
IfxEvadc_InputClasses_group1 = 1,
IfxEvadc_InputClasses_global0 = 2,
IfxEvadc_InputClasses_global1 = 3
}
inputClass defined in MODULE_EVADC.G[x].CHCTR[y].B.ICLSEL(x=0,1,...,11;y=0,1....,16) More...
enum IfxEvadc_LimitCheck {
IfxEvadc_LimitCheck_noCheck = 0,
IfxEvadc_LimitCheck_eventIfInArea = 1,
IfxEvadc_LimitCheck_eventIfOutsideArea = 2,
IfxEvadc_LimitCheck_always = 3
}
ADC channel limit check defined in MODULE_EVADC.G[x].CHCTR[y].B.CHEVMODE(x=0,1,...,11;y=0,1....,16) More...
enum IfxEvadc_Protection {
IfxEvadc_Protection_channelControl0 = 0,
IfxEvadc_Protection_channelControl1 = 1,
IfxEvadc_Protection_channelControl2 = 2,
IfxEvadc_Protection_channelControl3 = 3,
IfxEvadc_Protection_channelControl4 = 4,
IfxEvadc_Protection_channelControl5 = 5,
IfxEvadc_Protection_channelControl6 = 6,
IfxEvadc_Protection_channelControl7 = 7,
IfxEvadc_Protection_channelControl8 = 8,
IfxEvadc_Protection_channelControl9 = 9,
IfxEvadc_Protection_channelControl10 = 10,
IfxEvadc_Protection_channelControl11 = 11,
IfxEvadc_Protection_channelControl12 = 12,
IfxEvadc_Protection_channelControl13 = 13,
IfxEvadc_Protection_channelControl14 = 14,
IfxEvadc_Protection_initGroup0 = 16,
IfxEvadc_Protection_initGroup1 = 17,
IfxEvadc_Protection_initGroup2 = 18,
IfxEvadc_Protection_initGroup3 = 19,
IfxEvadc_Protection_initGroup4 = 20,
IfxEvadc_Protection_initGroup5 = 21,
IfxEvadc_Protection_initGroup6 = 22,
IfxEvadc_Protection_initGroup7 = 23,
IfxEvadc_Protection_initGroup8 = 24,
IfxEvadc_Protection_initGroup9 = 25,
IfxEvadc_Protection_initGroup10 = 26,
IfxEvadc_Protection_initGroup11 = 27,
IfxEvadc_Protection_initGroup12 = 28,
IfxEvadc_Protection_initGroup13 = 29,
IfxEvadc_Protection_initGroup14 = 30,
IfxEvadc_Protection_serviceGroup0 = 32,
IfxEvadc_Protection_serviceGroup1 = 33,
IfxEvadc_Protection_serviceGroup2 = 34,
IfxEvadc_Protection_serviceGroup3 = 35,
IfxEvadc_Protection_serviceGroup4 = 36,
IfxEvadc_Protection_serviceGroup5 = 37,
IfxEvadc_Protection_serviceGroup6 = 38,
IfxEvadc_Protection_serviceGroup7 = 39,
IfxEvadc_Protection_serviceGroup8 = 40,
IfxEvadc_Protection_serviceGroup9 = 41,
IfxEvadc_Protection_serviceGroup10 = 42,
IfxEvadc_Protection_serviceGroup11 = 43,
IfxEvadc_Protection_serviceGroup12 = 44,
IfxEvadc_Protection_serviceGroup13 = 45,
IfxEvadc_Protection_serviceGroup14 = 46,
IfxEvadc_Protection_resultRegisterGroup0 = 48,
IfxEvadc_Protection_resultRegisterGroup1 = 49,
IfxEvadc_Protection_resultRegisterGroup2 = 50,
IfxEvadc_Protection_resultRegisterGroup3 = 51,
IfxEvadc_Protection_resultRegisterGroup4 = 52,
IfxEvadc_Protection_resultRegisterGroup5 = 53,
IfxEvadc_Protection_resultRegisterGroup6 = 54,
IfxEvadc_Protection_resultRegisterGroup7 = 55,
IfxEvadc_Protection_resultRegisterGroup8 = 56,
IfxEvadc_Protection_resultRegisterGroup9 = 57,
IfxEvadc_Protection_resultRegisterGroup10 = 58,
IfxEvadc_Protection_resultRegisterGroup11 = 59,
IfxEvadc_Protection_resultRegisterGroup12 = 60,
IfxEvadc_Protection_resultRegisterGroup13 = 61,
IfxEvadc_Protection_resultRegisterGroup14 = 62,
IfxEvadc_Protection_initFastCompareChannel0 = 64,
IfxEvadc_Protection_initFastCompareChannel1 = 65,
IfxEvadc_Protection_initFastCompareChannel2 = 66,
IfxEvadc_Protection_initFastCompareChannel3 = 67,
IfxEvadc_Protection_initFastCompareChannel4 = 68,
IfxEvadc_Protection_initFastCompareChannel5 = 69,
IfxEvadc_Protection_initFastCompareChannel6 = 70,
IfxEvadc_Protection_initFastCompareChannel7 = 71,
IfxEvadc_Protection_globalConfig = 80,
IfxEvadc_Protection_externalMultiplexer = 81,
IfxEvadc_Protection_testFunction = 82
}
Access protection for Group registers defined in MODULE_EVADC.ACCPROT0.U. More...
enum IfxEvadc_RequestSlotPriority {
IfxEvadc_RequestSlotPriority_lowest = 0,
IfxEvadc_RequestSlotPriority_low = 1,
IfxEvadc_RequestSlotPriority_high = 2,
IfxEvadc_RequestSlotPriority_highest = 3
}
Arbitration priority, Group x,defined in MODULE_EVADC.G[x].ARBPR.PRIOy(x=0,1,...,11;y=0,1,2) More...
enum IfxEvadc_RequestSlotStartMode {
IfxEvadc_RequestSlotStartMode_waitForStart = 0,
IfxEvadc_RequestSlotStartMode_cancelInjectRepeat = 1
}
Request source start mode defined in MODULE_EVADC.G[x].ARBPR.CSMy(x=0,1,...,11;y=0,1,2) More...
enum IfxEvadc_RequestSource {
IfxEvadc_RequestSource_queue0 = 0,
IfxEvadc_RequestSource_queue1 = 1,
IfxEvadc_RequestSource_queue2 = 2
}
Request sources. More...
enum IfxEvadc_SleepMode {
IfxEvadc_SleepMode_enable = 0,
IfxEvadc_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_EVADC.CLC.B.EDIS. More...
enum IfxEvadc_SrcNr {
IfxEvadc_SrcNr_group0 = 0,
IfxEvadc_SrcNr_group1 = 1,
IfxEvadc_SrcNr_group2 = 2,
IfxEvadc_SrcNr_group3 = 3,
IfxEvadc_SrcNr_shared0 = 4,
IfxEvadc_SrcNr_shared1 = 5,
IfxEvadc_SrcNr_shared2 = 6,
IfxEvadc_SrcNr_shared3 = 7
}
Service Node defined in MODULE_EVADC.G[x].SRACT.U(x= 0,1,..,11) More...
enum IfxEvadc_Status {
IfxEvadc_Status_noError = 0,
IfxEvadc_Status_notInitialised = 1,
IfxEvadc_Status_invalidGroup = 2,
IfxEvadc_Status_invalidChannel = 3,
IfxEvadc_Status_queueFull = 4,
IfxEvadc_Status_noAccess = 5,
IfxEvadc_Status_channelsStillPending = 6
}
API return values defined in MODULE_EVADC.G[x].QSR0.U,MODULE_EVADC.G[x].QSR1.U,MODULE_EVADC.G[x].QSR2.U(x=0,1,...,11) More...
enum IfxEvadc_SuspendMode {
IfxEvadc_SuspendMode_none = 0,
IfxEvadc_SuspendMode_hard = 1,
IfxEvadc_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxEvadc_TriggerMode {
IfxEvadc_TriggerMode_noExternalTrigger = 0,
IfxEvadc_TriggerMode_uponFallingEdge = 1,
IfxEvadc_TriggerMode_uponRisingEdge = 2,
IfxEvadc_TriggerMode_uponAnyEdge = 3
}
trigger definition defined in MODULE_EVADC.G[x].QCTRL0.XTMODE(x=0,1,..,11) More...
enum IfxEvadc_TriggerSource {
IfxEvadc_TriggerSource_0 = 0,
IfxEvadc_TriggerSource_1,
IfxEvadc_TriggerSource_2,
IfxEvadc_TriggerSource_3,
IfxEvadc_TriggerSource_4,
IfxEvadc_TriggerSource_5,
IfxEvadc_TriggerSource_6,
IfxEvadc_TriggerSource_7,
IfxEvadc_TriggerSource_8,
IfxEvadc_TriggerSource_9,
IfxEvadc_TriggerSource_10,
IfxEvadc_TriggerSource_11,
IfxEvadc_TriggerSource_12,
IfxEvadc_TriggerSource_13,
IfxEvadc_TriggerSource_14,
IfxEvadc_TriggerSource_15
}
Trigger request source defined in MODULE_EVADC.G[x].QCTRLy.XTSEL(x=0,1,..,11;y=0,1,..,7) More...
enum IfxEvadc_BoundaryFlagActivationMode {
IfxEvadc_BoundaryFlagActivationMode_0 = 0,
IfxEvadc_BoundaryFlagActivationMode_1 = 1
}
Selects the behaviour of BoundaryFlag in FCBFL.B.BFA. More...
enum IfxEvadc_BoundaryFlagInversionControl {
IfxEvadc_BoundaryFlagInversionControl_direct = 0,
IfxEvadc_BoundaryFlagInversionControl_invert = 1
}
Controls in in FCBFL.B.BFI options for whether to use Boundary Flag(FCM.B.BFL) directly or in a inverted format. More...
enum IfxEvadc_BoundaryFlagNodePointer {
IfxEvadc_BoundaryFlagNodePointer_commonBoundaryFlagOutput0 = 0,
IfxEvadc_BoundaryFlagNodePointer_commonBoundaryFlagOutput1 = 1,
IfxEvadc_BoundaryFlagNodePointer_commonBoundaryFlagOutput2 = 2,
IfxEvadc_BoundaryFlagNodePointer_commonBoundaryFlagOutput3 = 3,
IfxEvadc_BoundaryFlagNodePointer_sharedServiceRequestLine0 = 4,
IfxEvadc_BoundaryFlagNodePointer_sharedServiceRequestLine1 = 5,
IfxEvadc_BoundaryFlagNodePointer_sharedServiceRequestLine2 = 6,
IfxEvadc_BoundaryFlagNodePointer_sharedServiceRequestLine3 = 7,
IfxEvadc_BoundaryFlagNodePointer_disabled = 16
}
Options for FCBFL.B.BFLNP to select Boundary Flag Node Pointer. More...
enum IfxEvadc_BoundaryFlagSwControl {
IfxEvadc_BoundaryFlagSwControl_noAction = 0,
IfxEvadc_BoundaryFlagSwControl_clear = 1,
IfxEvadc_BoundaryFlagSwControl_set = 2,
IfxEvadc_BoundaryFlagSwControl_toggle = 3
}
Options for FCBFL.B.BFS to modify the Boundary Flag(FCM.B.BFL) More...
enum IfxEvadc_ChannelEventMode {
IfxEvadc_ChannelEventMode_never = 0,
IfxEvadc_ChannelEventMode_aboveCompareValue = 1,
IfxEvadc_ChannelEventMode_belowCompareValue = 2,
IfxEvadc_ChannelEventMode_aboveOrBelowCompareValue = 3
}
Channel Event Mode for configuring generation of events for Fast Compare channels in FCCTRL.B.CHEVMODE. More...
enum IfxEvadc_ClockDividerFactor {
IfxEvadc_ClockDividerFactor_maxFrequency = 0,
IfxEvadc_ClockDividerFactor_2 = 1,
IfxEvadc_ClockDividerFactor_3,
IfxEvadc_ClockDividerFactor_4,
IfxEvadc_ClockDividerFactor_5,
IfxEvadc_ClockDividerFactor_6,
IfxEvadc_ClockDividerFactor_7,
IfxEvadc_ClockDividerFactor_8,
IfxEvadc_ClockDividerFactor_9,
IfxEvadc_ClockDividerFactor_10,
IfxEvadc_ClockDividerFactor_11,
IfxEvadc_ClockDividerFactor_12,
IfxEvadc_ClockDividerFactor_13,
IfxEvadc_ClockDividerFactor_14,
IfxEvadc_ClockDividerFactor_15,
IfxEvadc_ClockDividerFactor_16,
IfxEvadc_ClockDividerFactor_17,
IfxEvadc_ClockDividerFactor_18,
IfxEvadc_ClockDividerFactor_19,
IfxEvadc_ClockDividerFactor_20,
IfxEvadc_ClockDividerFactor_21,
IfxEvadc_ClockDividerFactor_22,
IfxEvadc_ClockDividerFactor_23,
IfxEvadc_ClockDividerFactor_24,
IfxEvadc_ClockDividerFactor_25,
IfxEvadc_ClockDividerFactor_26,
IfxEvadc_ClockDividerFactor_27,
IfxEvadc_ClockDividerFactor_28,
IfxEvadc_ClockDividerFactor_29,
IfxEvadc_ClockDividerFactor_30,
IfxEvadc_ClockDividerFactor_31,
IfxEvadc_ClockDividerFactor_32
}
Defines the frequency of the analog converter clock f_ADCI (base clock for conversion steps), derived from the peripheral clock: f_ADCI = fADC / CP. To be filled in FCCTRL.B.DIVA for Fast Compare channels & ANCFG.B.DIVA for other groups. More...
enum IfxEvadc_ExternalTriggerPolarity {
IfxEvadc_ExternalTriggerPolarity_direct = 0,
IfxEvadc_ExternalTriggerPolarity_inverted = 1
}
External Trigger Polarity to be set in FCCTRL.B.XTPOL. More...
enum IfxEvadc_FastCompareAnalogClockSynchronizationDelay {
IfxEvadc_FastCompareAnalogClockSynchronizationDelay_0 = 0,
IfxEvadc_FastCompareAnalogClockSynchronizationDelay_1 = 1,
IfxEvadc_FastCompareAnalogClockSynchronizationDelay_2 = 2,
IfxEvadc_FastCompareAnalogClockSynchronizationDelay_3 = 3
}
enum IfxEvadc_FastCompareAnalogConverterControl {
IfxEvadc_FastCompareAnalogConverterControl_off = 0,
IfxEvadc_FastCompareAnalogConverterControl_normal = 1
}
Settings for Analog Coverter Controller to be done in FCM.B.ANON. More...
enum IfxEvadc_FastCompareAutomaticUpdate {
IfxEvadc_FastCompareAutomaticUpdate_sw = 0,
IfxEvadc_FastCompareAutomaticUpdate_alternateValue = 1,
IfxEvadc_FastCompareAutomaticUpdate_rampCounter = 2,
IfxEvadc_FastCompareAutomaticUpdate_analogSource = 3
}
Defines the source of the value(s) in bitfield FCM.B.FCREF. More...
enum IfxEvadc_FastCompareRunControl {
IfxEvadc_FastCompareRunControl_stop = 0,
IfxEvadc_FastCompareRunControl_alwaysRun = 1
}
Defines the basic run conditions of the fast compare channel in FCM.B.RUNCOMP. More...
enum IfxEvadc_FastCompareServiceRequestGeneration {
IfxEvadc_FastCompareServiceRequestGeneration_off = 0,
IfxEvadc_FastCompareServiceRequestGeneration_rampEnd = 1,
IfxEvadc_FastCompareServiceRequestGeneration_newValue = 2,
IfxEvadc_FastCompareServiceRequestGeneration_newResult = 3
}
Criteria/mode settings for service request generation in FCM.B.SRG. More...
enum IfxEvadc_GateOperatingMode {
IfxEvadc_GateOperatingMode_noGateFunction = 0,
IfxEvadc_GateOperatingMode_alternateValueMode = 1,
IfxEvadc_GateOperatingMode_lockBoundaryFlag = 2
}
Gate Operating Mode to be filled in FCCTRL.B.GTMODE. More...
enum IfxEvadc_RampDirection {
IfxEvadc_RampDirection_down = 0,
IfxEvadc_RampDirection_up = 1
}
Ramp direction setting in FCM.B.FCRDIR. More...
enum IfxEvadc_RampRunControl {
IfxEvadc_RampRunControl_stop = 0,
IfxEvadc_RampRunControl_1 = 1,
IfxEvadc_RampRunControl_2 = 2,
IfxEvadc_RampRunControl_3 = 3
}
Defines the run conditions for the ramp generation in FCM.B.RUNRAMP. More...
enum IfxEvadc_SampleSynchronization {
IfxEvadc_SampleSynchronization_off = 0,
IfxEvadc_SampleSynchronization_synchronizeSampleTiming = 1
}
Sample timing sync settings for FCM.B.SSE. More...
enum IfxEvadc_TriggerOperatingMode {
IfxEvadc_TriggerOperatingMode_noExternalTrigger = 0,
IfxEvadc_TriggerOperatingMode_fallingEdge = 1,
IfxEvadc_TriggerOperatingMode_risingEdge = 2,
IfxEvadc_TriggerOperatingMode_anyEdge = 3
}
Trigger operating mode in Fast Compare channels, to be entered in FCCTRL.B.XTMODE. More...
enum IfxEvadc_AnalogClockGenerationMode {
IfxEvadc_AnalogClockGenerationMode_synchronized = 0,
IfxEvadc_AnalogClockGenerationMode_unsynchronized = 1
}
Defines the way the analog clock is generated. More...
enum IfxEvadc_AnalogClockSynchronizationDelay {
IfxEvadc_AnalogClockSynchronizationDelay_0 = 0,
IfxEvadc_AnalogClockSynchronizationDelay_1 = 1,
IfxEvadc_AnalogClockSynchronizationDelay_2 = 2,
IfxEvadc_AnalogClockSynchronizationDelay_3 = 3,
IfxEvadc_AnalogClockSynchronizationDelay_4 = 4,
IfxEvadc_AnalogClockSynchronizationDelay_5 = 5,
IfxEvadc_AnalogClockSynchronizationDelay_6 = 6,
IfxEvadc_AnalogClockSynchronizationDelay_7 = 7
}
enum IfxEvadc_AnalogInputPrechargeControl {
IfxEvadc_AnalogInputPrechargeControl_noPrecharge = 0,
IfxEvadc_AnalogInputPrechargeControl_8Cycles = 1,
IfxEvadc_AnalogInputPrechargeControl_16Cycles = 2,
IfxEvadc_AnalogInputPrechargeControl_32cycles = 3
}
Analog Input Precharge Control for Standard Conversions. More...
enum IfxEvadc_ArbitrationMode {
IfxEvadc_ArbitrationMode_0 = 0,
IfxEvadc_ArbitrationMode_1 = 1
}
enum IfxEvadc_CalibrationSampleTimeControl {
IfxEvadc_CalibrationSampleTimeControl_2 = 0,
IfxEvadc_CalibrationSampleTimeControl_4 = 1,
IfxEvadc_CalibrationSampleTimeControl_6 = 2,
IfxEvadc_CalibrationSampleTimeControl_8 = 3
}
enum IfxEvadc_ChannelNoiseReduction {
IfxEvadc_ChannelNoiseReduction_standardConversion = 0,
IfxEvadc_ChannelNoiseReduction_level1 = 1,
IfxEvadc_ChannelNoiseReduction_level2 = 2,
IfxEvadc_ChannelNoiseReduction_level3 = 3
}
Conversion Mode for standard Conversion channel precision defined in MODULE_EVADC.G[x].CHCTR[y].B.ICLASS[y].B.CMS(x=0,1,...,11;y=0,1) More...
enum IfxEvadc_ChannelNoiseReductionEMUX {
IfxEvadc_ChannelNoiseReductionEMUX_standardConversion = 0,
IfxEvadc_ChannelNoiseReductionEMUX_level1 = 1,
IfxEvadc_ChannelNoiseReductionEMUX_level2 = 2,
IfxEvadc_ChannelNoiseReductionEMUX_level3 = 3
}
Conversion Mode for EMUX Conversions. More...
enum IfxEvadc_DataModificationMode {
IfxEvadc_DataModificationMode_standardDataReduction = 0,
IfxEvadc_DataModificationMode_resultFilteringMode = 1,
IfxEvadc_DataModificationMode_differenceMode = 2
}
Data Modification Mode. More...
enum IfxEvadc_DataReductionControlMode {
IfxEvadc_DataReductionControlMode_0 = 0,
IfxEvadc_DataReductionControlMode_1 = 1,
IfxEvadc_DataReductionControlMode_2 = 2,
IfxEvadc_DataReductionControlMode_3 = 3,
IfxEvadc_DataReductionControlMode_4 = 4,
IfxEvadc_DataReductionControlMode_5 = 5,
IfxEvadc_DataReductionControlMode_6 = 6,
IfxEvadc_DataReductionControlMode_7 = 7,
IfxEvadc_DataReductionControlMode_8 = 8,
IfxEvadc_DataReductionControlMode_9 = 9,
IfxEvadc_DataReductionControlMode_10 = 10,
IfxEvadc_DataReductionControlMode_11 = 11,
IfxEvadc_DataReductionControlMode_12 = 12,
IfxEvadc_DataReductionControlMode_13 = 13,
IfxEvadc_DataReductionControlMode_14 = 14,
IfxEvadc_DataReductionControlMode_15 = 15
}
enum IfxEvadc_IdlePrecharge {
IfxEvadc_IdlePrecharge_currentLevel = 0,
IfxEvadc_IdlePrecharge_referenceBy2 = 1
}
Contains options for Idle Precharge levels. More...
enum IfxEvadc_MsbConversionTime {
IfxEvadc_MsbConversionTime_singleClockCycle = 0,
IfxEvadc_MsbConversionTime_doubleClockCycle = 1
}
Selects the MSB conversion time(in terms of t_ADC) More...
enum IfxEvadc_ReferencePrechargeControl {
IfxEvadc_ReferencePrechargeControl_singleClockPhase = 0,
IfxEvadc_ReferencePrechargeControl_singleClockPeriod = 1
}
Reference Precharge Control. More...
enum IfxEvadc_SpreadEarlySamplePointEMUXConversionsMode {
IfxEvadc_SpreadEarlySamplePointEMUXConversionsMode_nominal = 0,
IfxEvadc_SpreadEarlySamplePointEMUXConversionsMode_spread = 1
}
enum IfxEvadc_SpreadEarlySamplePointStandardConversionsMode {
IfxEvadc_SpreadEarlySamplePointStandardConversionsMode_nominal = 0,
IfxEvadc_SpreadEarlySamplePointStandardConversionsMode_spread = 1
}
Spread Early Sample Point for Standard Conversions. More...
enum IfxEvadc_StartupCalibration {
IfxEvadc_StartupCalibration_noAction = 0,
IfxEvadc_StartupCalibration_initiate = 1
}
The 0-1 transition of bit SUCAL initiates the start-up calibrationphase of all analog converters (except for the fast compare channels). Note: The start-up calibration will abort any running conversion and cannot be stopped before it is complete. More...
enum IfxEvadc_SupplyVoltageLevelControl {
IfxEvadc_SupplyVoltageLevelControl_automaticControl = 0,
IfxEvadc_SupplyVoltageLevelControl_upperVoltage = 1,
IfxEvadc_SupplyVoltageLevelControl_lowerVoltage = 2
}
Adjusts the analog circuitry to the supply voltage used in the application system. Make sure to keep SUPLEV = 0b00 or 0b01 in the case of a 5 V supply. More...
enum IfxEvadc_WaitForRead {
IfxEvadc_WaitForRead_overwriteMode = 0,
IfxEvadc_WaitForRead_enabled = 1
}
Wait-for-Read Mode Enable. More...

Functions

IFX_INLINE void | IfxEvadc_configureWaitForReadMode (Ifx_EVADC_G *group, uint32 resultIdx, boolean enabled)
access function to enable/disable wait for read mode for result registers More...
IFX_INLINE void | IfxEvadc_configureWaitForReadModeForGlobalResultRegister (Ifx_EVADC *evadc, boolean enabled)
access function to enable/disable wait for read mode for global result register More...
IFX_INLINE IfxEvadc_ChannelNoiseReduction | IfxEvadc_getGlobalConversionMode (Ifx_EVADC *evadc, uint8 inputClassNum)
get the ADC Module noise reduction level More...
IFX_INLINE Ifx_EVADC_GLOB_RES | IfxEvadc_getGlobalResult (Ifx_EVADC *evadc)
return conversion result stored in the Global result Register More...
IFX_INLINE float32 | IfxEvadc_getGlobalSampleTime (Ifx_EVADC *evadc, uint8 inputClassNum, float32 analogFrequency)
Get Sample Time in sec. More...
IFX_INLINE Ifx_EVADC_G_RES | IfxEvadc_getResult (Ifx_EVADC_G *group, uint32 resultIdx)
Get conversion result (Function does not care about the alignment) value = raw * gain + offset. More...
IFX_INLINE void | IfxEvadc_setGlobalSampleTime (Ifx_EVADC *evadc, uint8 groupInputClassNum, float32 analogFrequency, float32 sampleTime)
Sets the sample time in sec of ADC global class. More...
IFX_EXTERN Ifx_EVADC_G_RES | IfxEvadc_getResultBasedOnRequestSource (Ifx_EVADC *evadc, Ifx_EVADC_G *group, IfxEvadc_ChannelId channel, IfxEvadc_RequestSource sourceType)
Get conversion result (Function does not care about the alignment) value = raw * gain + offset. More...
IFX_INLINE void | IfxEvadc_clearQueue (Ifx_EVADC_G *evadcG, boolean flushQueue, IfxEvadc_RequestSource sourceType)
Clears all the queue entries including backup stage. More...
IFX_INLINE void | IfxEvadc_startQueue (Ifx_EVADC_G *group, IfxEvadc_RequestSource sourceType)
Starts a queue of a group by generating a trigger event through software. More...
IFX_EXTERN void | IfxEvadc_addToQueue (Ifx_EVADC_G *group, IfxEvadc_ChannelId channel, IfxEvadc_RequestSource sourceType, uint32 options)
Add an entry to the queue of a group for the specified channel with the following options set: refill incase of aborted conversion source interrupt enable/disable external trigger control of the aborted conversion. More...
IFX_EXTERN void | IfxEvadc_disableQueueSlotExternalTrigger (Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Disables the external trigger. More...
IFX_EXTERN void | IfxEvadc_enableQueueSlotExternalTrigger (Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Enables the external trigger. More...
IFX_EXTERN IfxEvadc_GatingMode | IfxEvadc_getQueueSlotGatingMode (Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Gets the requested queue slot gating mode. More...
IFX_EXTERN IfxEvadc_GatingSource | IfxEvadc_getQueueSlotGatingSource (Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Gets the requested queue slot gating input. More...
IFX_EXTERN IfxEvadc_RequestSlotPriority | IfxEvadc_getQueueSlotPriority (Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Gets the request queue slot priority. More...
IFX_EXTERN IfxEvadc_RequestSlotStartMode | IfxEvadc_getQueueSlotStartMode (Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Gets the requested queue slot start mode. More...
IFX_EXTERN IfxEvadc_TriggerSource | IfxEvadc_getQueueSlotTriggerInput (Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Gets the requested queue slot trigger input. More...
IFX_EXTERN IfxEvadc_TriggerMode | IfxEvadc_getQueueSlotTriggerMode (Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Gets the requested queue slot trigger mode. More...
IFX_EXTERN IfxEvadc_Status | IfxEvadc_getQueueStatus (Ifx_EVADC_G *group, IfxEvadc_RequestSource sourceType)
Gives the status of the Queue of a group by returning non zero value if the Queue is full. More...
IFX_EXTERN boolean | IfxEvadc_isRequestQueueSlotEnabled (Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Returns the queue slot requested status. More...
IFX_EXTERN void | IfxEvadc_setQueueSlotGatingConfig (Ifx_EVADC_G *evadcG, IfxEvadc_GatingSource gatingSource, IfxEvadc_GatingMode gatingMode, IfxEvadc_RequestSource sourceType)
Sets the gating configurations. More...
IFX_EXTERN void | IfxEvadc_setQueueSlotTriggerOperatingConfig (Ifx_EVADC_G *evadcG, IfxEvadc_TriggerMode triggerMode, IfxEvadc_TriggerSource triggerSource, IfxEvadc_RequestSource sourceType)
Sets the trigger operating configurations. More...
IFX_INLINE void | IfxEvadc_initEmuxPin (const IfxEvadc_Emux_Out *emux, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a EMUX output. More...
IFX_INLINE void | IfxEvadc_initGxBflPin (const IfxEvadc_GxBfl_Out *gxBfl, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a GxBFL output. More...
IFX_INLINE uint32 | IfxEvadc_calculateSampleTime (float32 analogFrequency, float32 sampleTime)
Calculate the time using analog frequency. More...
IFX_INLINE float32 | IfxEvadc_getAdcAnalogFrequency (Ifx_EVADC_G *group)
Returns the configured Fadci EVADC analog clock frequency in Hz. More...
IFX_EXTERN float32 | IfxEvadc_getAdcDigitalFrequency (Ifx_EVADC *evadc)
configured Fadcd EVADC digital clock frequency in Hz. More...
IFX_INLINE void | IfxEvadc_setAnalogClockSynchronizationDelay (Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group, IfxEvadc_AnalogClockSynchronizationDelay delay)
IFX_INLINE void | IfxEvadc_setCalibrationSampleTime (Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group, IfxEvadc_CalibrationSampleTimeControl mode)
Select calibration sample time in units of t_ADC. More...
IFX_INLINE void | IfxEvadc_clearAllResultRequests (Ifx_EVADC_G *evadcG)
Clears the all group requests. More...
IFX_INLINE IfxEvadc_ChannelNoiseReduction | IfxEvadc_getGroupConversionMode (Ifx_EVADC_G *evadcG, uint8 inputClassNum)
Gets the EVADC input class channel conversion mode. More...
IFX_INLINE void | IfxEvadc_getGroupResult (Ifx_EVADC_G *group, Ifx_EVADC_G_RES *results, uint32 resultOffset, uint32 numResults)
Get conversion result for the group. More...
IFX_INLINE float32 | IfxEvadc_getGroupSampleTime (Ifx_EVADC_G *evadcG, uint8 inputClassNum, float32 analogFrequency)
Gets the EVADC input class channel sample time. More...
IFX_INLINE uint8 | IfxEvadc_getMasterIndex (Ifx_EVADC_G *evadcG)
Gets the configured master index. More...
IFX_INLINE void | IfxEvadc_selectIdlePrechargeLevel (Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group, IfxEvadc_IdlePrecharge mode)
Selects the chargingmode/voltage level in idle mode. More...
IFX_INLINE void | IfxEvadc_enableInputBuffer (Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group)
IFX_INLINE void | IfxEvadc_setReferencePrechargeDuration (Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group, IfxEvadc_ReferencePrechargeControl duration)
IFX_INLINE void | IfxEvadc_enableReferencePrecharge (Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group)
IFX_INLINE void | IfxEvadc_resetGroup (Ifx_EVADC_G *evadcG)
Resets the ADC group. More...
IFX_INLINE void | IfxEvadc_setSampleSynchronizationMode (Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group, IfxEvadc_SampleSynchronization mode)
Selects whether sample synchronization must be performed or not. More...
IFX_INLINE void | IfxEvadc_selectDoubleClockForMSBConversion (Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group, IfxEvadc_MsbConversionTime mode)
Selects an additional clock cycle for the conversion step of the MSB. More...
IFX_INLINE void | IfxEvadc_setAnalogConvertControl (Ifx_EVADC_G *evadcG, IfxEvadc_AnalogConverterMode analogConverterMode)
Sets analog converter group number. More...
IFX_INLINE void | IfxEvadc_setAnalogInputPrechargeControlEMUX (Ifx_EVADC_G *evadcG, uint8 inputClassNum, IfxEvadc_AnalogInputPrechargeControl mode)
IFX_INLINE void | IfxEvadc_setAnalogInputPrechargeControlStandard (Ifx_EVADC_G *evadcG, uint8 inputClassNum, IfxEvadc_AnalogInputPrechargeControl mode)
Analog Input Precharge Control for Standard Conversions Buffer must be enabled by GxANCFG.B.BE = 1. More...
IFX_INLINE void | IfxEvadc_setGroupConversionMode (Ifx_EVADC_G *evadcG, uint8 inputClassNum, IfxEvadc_ChannelNoiseReduction conversionMode)
Sets the ADC input class channel resolution. More...
IFX_INLINE void | IfxEvadc_setGroupConversionModeEMUX (Ifx_EVADC_G *evadcG, uint8 inputClassNum, IfxEvadc_ChannelNoiseReductionEMUX conversionMode)
IFX_INLINE void | IfxEvadc_setGroupSampleTime (Ifx_EVADC_G *evadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
Sets the ADC input class sample time ticks. More...
IFX_INLINE void | IfxEvadc_setGroupSampleTimeEMUX (Ifx_EVADC_G *evadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
Set the additional number of cycles(in addition to 2) in sample time. More...
IFX_INLINE void | IfxEvadc_setMasterIndex (Ifx_EVADC_G *evadcG, uint8 masterIndex)
Sets the master index. More...
IFX_INLINE void | IfxEvadc_spreadEarlySamplePointEMUXConversions (Ifx_EVADC_G *evadcG, uint8 inputClassNum, IfxEvadc_SpreadEarlySamplePointEMUXConversionsMode mode)
IFX_INLINE void | IfxEvadc_spreadEarlySamplePointStandardConversions (Ifx_EVADC_G *evadcG, uint8 inputClassNum, IfxEvadc_SpreadEarlySamplePointStandardConversionsMode mode)
IFX_EXTERN void | IfxEvadc_setArbiterPriority (Ifx_EVADC_G *evadcG, boolean slotEnable, IfxEvadc_RequestSlotPriority prio, IfxEvadc_RequestSlotStartMode mode, IfxEvadc_RequestSource slot)
Sets the Arbiter slot configurations. More...
IFX_INLINE void | IfxEvadc_disableModule (Ifx_EVADC *evadc)
Disable EVADC kernel. More...
IFX_INLINE void | IfxEvadc_disablePostCalibration (Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group, boolean enabled)
Disables the post calibration. More...
IFX_INLINE void | IfxEvadc_enableModule (Ifx_EVADC *evadc)
Enable EVADC kernel. More...
IFX_INLINE uint8 | IfxEvadc_getAdcCalibrationActiveState (Ifx_EVADC *evadc, uint8 adcCalGroupNum)
gets ADC Calibration Flag CAL status. More...
IFX_INLINE Ifx_EVADC_GLOBCFG | IfxEvadc_getGlobalConfigValue (Ifx_EVADC *evadc)
Gets the global control configuration value. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEvadc_getSrcAddress (IfxEvadc_GroupId group, IfxEvadc_SrcNr index)
Gives the SRC source address. More...
IFX_INLINE boolean | IfxEvadc_getStartupCalibrationStatus (Ifx_EVADC *evadc)
get status of GLOBCFG.SUCAL Bit field More...
IFX_INLINE void | IfxEvadc_initialiseAdcConverterClock (Ifx_EVADC *evadc, Ifx_EVADC_G *evadcG, IfxEvadc_ClockDividerFactor converterClockDivider)
Initialises ADC converter clock. More...
IFX_INLINE void | IfxEvadc_initiateStartupCalibration (Ifx_EVADC *evadc)
initiates the calibration pulse phase. More...
IFX_INLINE boolean | IfxEvadc_isModuleSuspended (Ifx_EVADC *evadc)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxEvadc_setGlobalConversionMode (Ifx_EVADC *evadc, uint8 InputClassNum, IfxEvadc_ChannelNoiseReduction conversionMode)
Sets the channel conversion mode. More...
IFX_INLINE void | IfxEvadc_setSleepMode (Ifx_EVADC *evadc, IfxEvadc_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxEvadc_setSuspendMode (Ifx_EVADC *evadc, IfxEvadc_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN void | IfxEvadc_disableAccess (Ifx_EVADC *evadc, IfxEvadc_Protection protectionSet)
Disable write access to the EVADC config/control registers. More...
IFX_EXTERN void | IfxEvadc_enableAccess (Ifx_EVADC *evadc, IfxEvadc_Protection protectionSet)
Enable write access to the EVADC config/control registers. More...
IFX_EXTERN float32 | IfxEvadc_getAdcModuleFrequency (Ifx_EVADC *evadc)
ADC Module Frequency in Hz. More...
IFX_EXTERN uint32 | IfxEvadc_initializeFAdcI (Ifx_EVADC *evadc, uint32 fAdcI, Ifx_EVADC_G *group)
Configure the ADC analog clock. More...
IFX_EXTERN void | IfxEvadc_resetModule (Ifx_EVADC *evadc)
Resets the kernel. More...
IFX_EXTERN void | IfxEvadc_startupCalibration (Ifx_EVADC *evadc)
Starts ADC calibration and wait for the end of the calibration process. More...
IFX_EXTERN boolean | IfxEvadc_syncConvWorkAround (Ifx_EVADC *evadc)
SW workaround of EVADC Master/Slave conversion jitter issue(MCMETILLD-910) More...
IFX_INLINE void | IfxEvadc_clearChannelRequest (Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelId)
Clears the channel request. More...
IFX_INLINE void | IfxEvadc_enableFifoMode (Ifx_EVADC_G *evadcG, IfxEvadc_ChannelResult resultRegister, IfxEvadc_FifoMode fifoMode)
Enables the FIFO mode. More...
IFX_INLINE void | IfxEvadc_enableServiceRequest (Ifx_EVADC_G *evadcG, IfxEvadc_ChannelResult resultRegister)
IFX_INLINE void | IfxEvadc_disableServiceRequest (Ifx_EVADC_G *evadcG, IfxEvadc_ChannelResult resultRegister)
IFX_INLINE Ifx_EVADC_G_CHCTR | IfxEvadc_getChannelControlConfig (Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex)
Gets the current ADC channel control configurations. More...
IFX_INLINE IfxEvadc_InputClasses | IfxEvadc_getChannelInputclass (Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex)
get channel Input class More...
IFX_INLINE Ifx_EVADC_G_REVNP0 | IfxEvadc_getChannelResultServiceRequestNodePointer0 (Ifx_EVADC_G *evadcG)
Gets the channel result service request node pointer 0. More...
IFX_INLINE Ifx_EVADC_G_REVNP1 | IfxEvadc_getChannelResultServiceRequestNodePointer1 (Ifx_EVADC_G *evadcG)
Gets the channel result service request node pointer 1. More...
IFX_INLINE Ifx_EVADC_G_CEVNP0 | IfxEvadc_getChannelServiceRequestNodePointer0 (Ifx_EVADC_G *evadcG)
Gets the channel service request node pointer. More...
IFX_INLINE Ifx_EVADC_G_CEVNP1 | IfxEvadc_getChannelServiceRequestNodePointer1 (Ifx_EVADC_G *evadcG)
get the channel service request node pointer (CH8–CH15) More...
IFX_INLINE void | IfxEvadc_setBoundaryMode (Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, IfxEvadc_BoundaryExtension boundaryMode)
Selects boundary extension. More...
IFX_INLINE void | IfxEvadc_setChannelEventNodePointer0 (Ifx_EVADC_G *evadcG, IfxEvadc_SrcNr channelSrcNr, IfxEvadc_ChannelId channel)
Sets the channel event service request line. More...
IFX_INLINE void | IfxEvadc_setChannelEventNodePointer1 (Ifx_EVADC_G *evadcG, IfxEvadc_SrcNr channelSrcNr, IfxEvadc_ChannelId channel)
set channel event node pointer(channel 8- channel 15) More...
IFX_INLINE void | IfxEvadc_setChannelInputClass (Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, IfxEvadc_InputClasses inputClass)
Sets the channel input class. More...
IFX_INLINE void | IfxEvadc_setChannelLimitCheckMode (Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, IfxEvadc_LimitCheck limitCheck)
Sets the channel event mode. More...
IFX_INLINE void | IfxEvadc_setDataModificationMode (Ifx_EVADC_G *evadcG, IfxEvadc_ChannelResult resultRegister, IfxEvadc_DataModificationMode mode)
IFX_INLINE void | IfxEvadc_setDataReductionControlMode (Ifx_EVADC_G *evadcG, IfxEvadc_ChannelResult resultRegister, uint32 mode)
IFX_INLINE void | IfxEvadc_setFifoMode (Ifx_EVADC_G *evadcG, IfxEvadc_ChannelResult resultRegister, IfxEvadc_FifoMode mode)
IFX_INLINE void | IfxEvadc_setLowerBoundary (Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, IfxEvadc_BoundarySelection lowerBoundary)
Sets group's lower boundary. More...
IFX_INLINE void | IfxEvadc_setReferenceInput (Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, IfxEvadc_ChannelReference reference)
Selects the refernce input. More...
IFX_INLINE void | IfxEvadc_setResultNodeEventPointer0 (Ifx_EVADC_G *evadcG, IfxEvadc_SrcNr resultSrcNr, IfxEvadc_ChannelResult resultRegister)
Sets result event node pointer 0. More...
IFX_INLINE void | IfxEvadc_setResultNodeEventPointer1 (Ifx_EVADC_G *evadcG, IfxEvadc_SrcNr resultSrcNr, IfxEvadc_ChannelResult resultRegister)
Sets result event node pointer 1. More...
IFX_INLINE void | IfxEvadc_setResultPosition (Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, boolean rightAlignedStorage)
Sets result store position. More...
IFX_INLINE void | IfxEvadc_setSyncRequest (Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, boolean synchonize)
Sets channel synchronization request. More...
IFX_INLINE void | IfxEvadc_setUpperBoundary (Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, IfxEvadc_BoundarySelection upperBoundary)
Sets group's upper boundary. More...
IFX_INLINE void | IfxEvadc_storeGroupResult (Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, IfxEvadc_ChannelResult resultRegister)
Sets the group result register. More...
IFX_INLINE IfxEvadc_ChannelNoiseReduction | IfxEvadc_getEmuxGlobalConversionMode (Ifx_EVADC *evadc, uint8 inputClassNum)
get global input class conversion mode More...
IFX_INLINE IfxEvadc_ChannelNoiseReduction | IfxEvadc_getEmuxGroupConversionMode (Ifx_EVADC_G *evadcG, uint8 inputClassNum)
get the external conversion mode More...
IFX_INLINE float32 | IfxEvadc_getEmuxGroupSampleTime (Ifx_EVADC_G *evadcG, uint8 inputClassNum, float32 analogFrequency)
Gets the ADC input class sample time of external channel. More...
IFX_INLINE void | IfxEvadc_setEmuxGlobalConversionMode (Ifx_EVADC *evadc, uint8 inputClassNum, IfxEvadc_ChannelNoiseReduction conversionMode)
set the external conversion mode of Global class More...
IFX_INLINE void | IfxEvadc_setEmuxGlobalSampleTime (Ifx_EVADC *evadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
Sets the sample time of ADC global class for external channel. More...
IFX_INLINE void | IfxEvadc_setEmuxGroupConversionMode (Ifx_EVADC_G *evadcG, uint8 inputClassNum, IfxEvadc_ChannelNoiseReduction conversionMode)
set the external channel conversion mode of ADC input class More...
IFX_INLINE void | IfxEvadc_setEmuxGroupSampletime (Ifx_EVADC_G *evadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
Sets the ADC input class sample time for external channel. More...
IFX_EXTERN void | IfxEvadc_configExternalMultiplexerMode (Ifx_EVADC *evadc, Ifx_EVADC_G *evadcG, IfxEvadc_ExternalMultiplexerMode mode, uint8 channels, IfxEvadc_EmuxSelectValue startChannel, IfxEvadc_EmuxCodingScheme code, IfxEvadc_EmuxSampleTimeControl sampleTimeControl, IfxEvadc_ChannelSelectionStyle channelSelectionStyle)
Configure external multiplexer mode. More...
IFX_INLINE void | IfxEvadc_setFastCompareBoundaryFlagSwControl (Ifx_EVADC_FC *evadcFC, IfxEvadc_BoundaryFlagSwControl control)
IFX_INLINE void | IfxEvadc_setFastCompareBoundaryFlagInversion (Ifx_EVADC_FC *evadcFC, IfxEvadc_BoundaryFlagInversionControl mode)
Sets in FCM.B.BFI whether to use Boundary Flag(FCM.B.BFL) directly or in a inverted format. More...
IFX_INLINE void | IfxEvadc_disableFastCompareBoundaryFlag (Ifx_EVADC_FC *evadcFC)
IFX_INLINE void | IfxEvadc_enableFastCompareBoundaryFlag (Ifx_EVADC_FC *evadcFC)
IFX_INLINE void | IfxEvadc_enableFastCompareSampleSynchronization (Ifx_EVADC_FC *evadcFC, IfxEvadc_SampleSynchronization mode)
Enable/Disable sample timing synchronization. More...
IFX_INLINE void | IfxEvadc_setFastCompareReferencePrechargeDuration (Ifx_EVADC_FC *evadcFC, IfxEvadc_ReferencePrechargeControl duration)
Setting the Reference Precharge Control for Fast Compare Channels in FCCTRL.B.RPC. More...
IFX_INLINE boolean | IfxEvadc_getFastCompareBoundaryFlagStatus (Ifx_EVADC_FC *evadcFC)
Get boundary flag status. More...
IFX_INLINE boolean | IfxEvadc_getFastCompareExternalTriggerLevelStatus (Ifx_EVADC_FC *evadcFC)
Returns current level of the selected trigger input. More...
IFX_INLINE boolean | IfxEvadc_getFastCompareResultStatus (Ifx_EVADC_FC *evadcFC)
Returns result for Fast Compare operation. More...
IFX_INLINE boolean | IfxEvadc_isFastCompareNewResultAvailable (Ifx_EVADC_FC *evadcFC)
Indicates availability of a new result in bit FCM.B.FCR. More...
IFX_INLINE void | IfxEvadc_selectFastCompareBoundaryFlagActivationMode (Ifx_EVADC_FC *evadcFC, IfxEvadc_BoundaryFlagActivationMode mode)
Selects behaviour of Boundary Flag(BFL) wih respect to the value of FCR. More...
IFX_INLINE void | IfxEvadc_selectFastCompareBoundaryFlagNodePointer (Ifx_EVADC_FC *evadcFC, IfxEvadc_BoundaryFlagNodePointer nodePointer)
IFX_INLINE void | IfxEvadc_setFastCompareAnalogClockSynchronizationDelay (Ifx_EVADC_FC *evadcFC, IfxEvadc_FastCompareAnalogClockSynchronizationDelay delay)
Sets the delay of the analog clock(in clock cycles) after the sync signal. More...
IFX_INLINE void | IfxEvadc_setFastCompareAnalogConverter (Ifx_EVADC_FC *evadcFC, IfxEvadc_FastCompareAnalogConverterControl mode)
Set Analog Converter Control modes. More...
IFX_INLINE void | IfxEvadc_setFastCompareAnalogInputPrechargeControl (Ifx_EVADC_FC *evadcFC, IfxEvadc_AnalogInputPrechargeControl mode)
IFX_INLINE void | IfxEvadc_setFastCompareAnalogInternalClockDivider (Ifx_EVADC_FC *evadcFC, IfxEvadc_ClockDividerFactor divider)
Defines the frequency of the analog converter clock fADCI (base clock for conversion steps), derived from the peripheral clock: fADCI = fADC / divider. More...
IFX_INLINE void | IfxEvadc_setFastCompareAutomaticUpdateMode (Ifx_EVADC_FC *evadcFC, IfxEvadc_FastCompareAutomaticUpdate mode)
Sets the source of the value(s) in bitfield FCREF. More...
IFX_INLINE void | IfxEvadc_setFastCompareChannelEventMode (Ifx_EVADC_FC *evadcFC, IfxEvadc_ChannelEventMode mode)
IFX_INLINE void | IfxEvadc_setFastCompareExternalTriggerPolarity (Ifx_EVADC_FC *evadcFC, IfxEvadc_ExternalTriggerPolarity mode)
Set external trigger polarity in FCCTRL.B.XTPOL. More...
IFX_INLINE void | IfxEvadc_setFastCompareGateOperatingMode (Ifx_EVADC_FC *evadcFC, IfxEvadc_GateOperatingMode mode)
IFX_INLINE void | IfxEvadc_setFastCompareRampDirection (Ifx_EVADC_FC *evadcFC, IfxEvadc_RampDirection rampDirection)
Ramp direction(up or down) settings. More...
IFX_INLINE void | IfxEvadc_setFastCompareReferenceValue (Ifx_EVADC_FC *evadcFC, uint16 referenceValue)
IFX_INLINE void | IfxEvadc_setFastCompareRunControl (Ifx_EVADC_FC *evadcFC, IfxEvadc_FastCompareRunControl mode)
Defines the basic run conditions of the fast compare channel. More...
IFX_INLINE void | IfxEvadc_setFastCompareRunRampControl (Ifx_EVADC_FC *evadcFC, IfxEvadc_RampRunControl rampStartMode)
IFX_INLINE void | IfxEvadc_setFastCompareSampleTimeControl (Ifx_EVADC_FC *evadcFC, uint8 additionalCycles)
Setting additional sample time in FCCTRL.B.STCF. More...
IFX_INLINE void | IfxEvadc_setFastCompareServiceRequestGeneration (Ifx_EVADC_FC *evadcFC, IfxEvadc_FastCompareServiceRequestGeneration mode)
Sets when to generate service requests. More...
IFX_INLINE void | IfxEvadc_setFastCompareTriggerInterval (Ifx_EVADC_FC *evadcFC, uint8 interval)
Sets the interval at which fast compare operations are triggered in steps of 16 * 1/fADC. More...
IFX_INLINE void | IfxEvadc_setFastCompareTriggerOperatingMode (Ifx_EVADC_FC *evadcFC, IfxEvadc_TriggerOperatingMode mode)
IFX_INLINE Ifx_EVADC_G_ANCFG | IfxEvadc_getAnalogFunctionConfiguration (Ifx_EVADC_G *evadcG)
IFX_INLINE float32 | IfxEvadc_getEmuxGlobalSampleTime (Ifx_EVADC *evadc, uint8 inputClassNum, float32 analogFrequency)
Get the sample time of ADC global class for external channel. More...
IFX_INLINE void | IfxEvadc_setEmuxInterfaceForGroup (Ifx_EVADC *evadc, IfxEvadc_EmuxInterface emuxInterface, IfxEvadc_GroupId group)
Sets the Emux Interface for a particular group. More...
IFX_INLINE void | IfxEvadc_disableReferencePrecharge (Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group)
IFX_INLINE void | IfxEvadc_disableInputBuffer (Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group)
IFX_INLINE boolean | IfxEvadc_isModuleEnabled (Ifx_EVADC *evadc)
Return if the clock for EVADC modules is enabled. More...
IFX_INLINE void | IfxEvadc_enableStartupCalibration (Ifx_EVADC *evadc)
Enable the startup calibaration phase. More...
IFX_INLINE void | IfxEvadc_selectQueueGatingMode (Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource queue, IfxEvadc_GatingMode gatingMode)
Enable the Queue Gating Mode. More...
IFX_INLINE void | IfxEvadc_setChannelRequest (Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource queue, IfxEvadc_ChannelId channel)
Defines the channel number to be converted. More...
IFX_INLINE void | IfxEvadc_configureIclass (Ifx_EVADC_G *evadcG, uint8 inputClassNum, uint32 value)
Sets the global input class registers, define the sample time and data conversion mode. More...
IFX_INLINE volatile uint32 * | IfxEvadc_getResultRegisterAddress (Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channel)
Returns the pointer to the result register. More...

Detailed Description

EVADC basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxEvadc.h.

Enumeration Type Documentation

◆ IfxEvadc_AnalogClockGenerationMode

enum IfxEvadc_AnalogClockGenerationMode

Defines the way the analog clock is generated.

Enumerator
IfxEvadc_AnalogClockGenerationMode_synchronized | Synchronized mode: Initial clock pulse is defined by the phase synchronizer.
IfxEvadc_AnalogClockGenerationMode_unsynchronized | Unsynchronized mode: The analog clock is generated independently.

Definition at line 705 of file IfxEvadc.h.

◆ IfxEvadc_AnalogClockSynchronizationDelay

enum IfxEvadc_AnalogClockSynchronizationDelay
Enumerator
IfxEvadc_AnalogClockSynchronizationDelay_0 | No Delay.
IfxEvadc_AnalogClockSynchronizationDelay_1 | 1 clock cycle delay
IfxEvadc_AnalogClockSynchronizationDelay_2 | 2 clock cycles delay
IfxEvadc_AnalogClockSynchronizationDelay_3 | 3 clock cycles delay
IfxEvadc_AnalogClockSynchronizationDelay_4 | 4 clock cycles delay
IfxEvadc_AnalogClockSynchronizationDelay_5 | 5 clock cycles delay
IfxEvadc_AnalogClockSynchronizationDelay_6 | 6 clock cycles delay
IfxEvadc_AnalogClockSynchronizationDelay_7 | 7 clock cycles delay

Definition at line 711 of file IfxEvadc.h.

◆ IfxEvadc_AnalogInputPrechargeControl

enum IfxEvadc_AnalogInputPrechargeControl

Analog Input Precharge Control for Standard Conversions.

Enumerator
IfxEvadc_AnalogInputPrechargeControl_noPrecharge | No Precharge.
IfxEvadc_AnalogInputPrechargeControl_8Cycles | Precharge for 8 clock cycles.
IfxEvadc_AnalogInputPrechargeControl_16Cycles | Precharge for 16 clock cycles.
IfxEvadc_AnalogInputPrechargeControl_32cycles | Precharge for 32 clock cycles.

Definition at line 725 of file IfxEvadc.h.

◆ IfxEvadc_ArbitrationMode

enum IfxEvadc_ArbitrationMode
Enumerator
IfxEvadc_ArbitrationMode_0
IfxEvadc_ArbitrationMode_1

Definition at line 733 of file IfxEvadc.h.

◆ IfxEvadc_CalibrationSampleTimeControl

enum IfxEvadc_CalibrationSampleTimeControl
Enumerator
IfxEvadc_CalibrationSampleTimeControl_2 | 2*t_ADCI
IfxEvadc_CalibrationSampleTimeControl_4 | 4*t_ADCI
IfxEvadc_CalibrationSampleTimeControl_6 | 6*t_ADCI
IfxEvadc_CalibrationSampleTimeControl_8 | 8*t_ADCI

Definition at line 739 of file IfxEvadc.h.

◆ IfxEvadc_ChannelNoiseReduction

enum IfxEvadc_ChannelNoiseReduction

Conversion Mode for standard Conversion channel precision defined in MODULE_EVADC.G[x].CHCTR[y].B.ICLASS[y].B.CMS(x=0,1,...,11;y=0,1)

Enumerator
IfxEvadc_ChannelNoiseReduction_standardConversion | Standard Conversions mode.
IfxEvadc_ChannelNoiseReduction_level1 | Noise reduction conversion level 1.
IfxEvadc_ChannelNoiseReduction_level2 | Noise reduction conversion level 2.
IfxEvadc_ChannelNoiseReduction_level3 | Noise reduction conversion level 3.

Definition at line 750 of file IfxEvadc.h.

◆ IfxEvadc_ChannelNoiseReductionEMUX

enum IfxEvadc_ChannelNoiseReductionEMUX

Conversion Mode for EMUX Conversions.

Enumerator
IfxEvadc_ChannelNoiseReductionEMUX_standardConversion | Standard conversion.
IfxEvadc_ChannelNoiseReductionEMUX_level1 | Noise reduction conversion level 1, 1 additional conversion step.
IfxEvadc_ChannelNoiseReductionEMUX_level2 | Noise reduction conversion level 2, 3 additional conversion steps.
IfxEvadc_ChannelNoiseReductionEMUX_level3 | Noise reduction conversion level 3, 7 additional conversion steps.

Definition at line 760 of file IfxEvadc.h.

◆ IfxEvadc_DataModificationMode

enum IfxEvadc_DataModificationMode

Data Modification Mode.

Enumerator
IfxEvadc_DataModificationMode_standardDataReduction | Standard Data Reduction.
IfxEvadc_DataModificationMode_resultFilteringMode | Result Filtering Mode.
IfxEvadc_DataModificationMode_differenceMode | Difference Mode.

Definition at line 770 of file IfxEvadc.h.

◆ IfxEvadc_DataReductionControlMode

enum IfxEvadc_DataReductionControlMode
Enumerator
IfxEvadc_DataReductionControlMode_0 | If DMM=0b00, Data reduction disabled,if DMM=0b01, FIR:a=2,b=1,c=0.
IfxEvadc_DataReductionControlMode_1 | If DMM=0b00, Accumulate 2 result values,if DMM=0b01, FIR:a=1,b=2,c=0.
IfxEvadc_DataReductionControlMode_2 | If DMM=0b00, Accumulate 3 result values,if DMM=0b01, FIR:a=2,b=0,c=1.
IfxEvadc_DataReductionControlMode_3 | If DMM=0b00, Accumulate 4 result values,if DMM=0b01, FIR:a=1,b=1,c=1.
IfxEvadc_DataReductionControlMode_4 | If DMM=0b00, Accumulate 5 result values,if DMM=0b01, FIR:a=1,b=0,c=2.
IfxEvadc_DataReductionControlMode_5 | If DMM=0b00, Accumulate 6 result values,if DMM=0b01, FIR:a=3,b=1,c=0.
IfxEvadc_DataReductionControlMode_6 | If DMM=0b00, Accumulate 7 result values,if DMM=0b01, FIR:a=2,b=2,c=0.
IfxEvadc_DataReductionControlMode_7 | If DMM=0b00, Accumulate 8 result values,if DMM=0b01, FIR:a=1,b=3,c=0.
IfxEvadc_DataReductionControlMode_8 | If DMM=0b00, Accumulate 9 result values,if DMM=0b01, FIR:a=3,b=0,c=1.
IfxEvadc_DataReductionControlMode_9 | If DMM=0b00, Accumulate 10 result values,if DMM=0b01, FIR:a=2,b=1,c=1.
IfxEvadc_DataReductionControlMode_10 | If DMM=0b00, Accumulate 11 result values,if DMM=0b01, FIR:a=1,b=2,c=1.
IfxEvadc_DataReductionControlMode_11 | If DMM=0b00, Accumulate 12 result values,if DMM=0b01, FIR:a=2,b=0,c=2.
IfxEvadc_DataReductionControlMode_12 | If DMM=0b00, Accumulate 13 result values,if DMM=0b01, FIR:a=1,b=1,c=2.
IfxEvadc_DataReductionControlMode_13 | If DMM=0b00, Accumulate 14 result values,if DMM=0b01, FIR:a=1,b=0,c=3.
IfxEvadc_DataReductionControlMode_14 | If DMM=0b00, Accumulate 15 result values,if DMM=0b01, IIR:a=2,b=2.
IfxEvadc_DataReductionControlMode_15 | If DMM=0b00, Accumulate 16 result values,if DMM=0b01, IIR:a=3,b=4.

Definition at line 777 of file IfxEvadc.h.

◆ IfxEvadc_IdlePrecharge

enum IfxEvadc_IdlePrecharge

Contains options for Idle Precharge levels.

Enumerator
IfxEvadc_IdlePrecharge_currentLevel | The sampling capacitor keeps the current charge.
IfxEvadc_IdlePrecharge_referenceBy2 | ThSampling capacitor is precharged to approx. half the reference when idle.

Definition at line 799 of file IfxEvadc.h.

◆ IfxEvadc_MsbConversionTime

enum IfxEvadc_MsbConversionTime

Selects the MSB conversion time(in terms of t_ADC)

Enumerator
IfxEvadc_MsbConversionTime_singleClockCycle | 1 clock cycle for the MSB (standard)
IfxEvadc_MsbConversionTime_doubleClockCycle | 2 clock cycle for the MSB

Definition at line 807 of file IfxEvadc.h.

◆ IfxEvadc_ReferencePrechargeControl

enum IfxEvadc_ReferencePrechargeControl

Reference Precharge Control.

Enumerator
IfxEvadc_ReferencePrechargeControl_singleClockPhase | Precharge the reference input for 1 clock phase.
IfxEvadc_ReferencePrechargeControl_singleClockPeriod | Precharge the reference input for 1 clock period.

Definition at line 815 of file IfxEvadc.h.

◆ IfxEvadc_SpreadEarlySamplePointEMUXConversionsMode

enum IfxEvadc_SpreadEarlySamplePointEMUXConversionsMode
Enumerator
IfxEvadc_SpreadEarlySamplePointEMUXConversionsMode_nominal | Nominal sample timing.
IfxEvadc_SpreadEarlySamplePointEMUXConversionsMode_spread | Spread sample timing, end of sample phase is varied.

Definition at line 821 of file IfxEvadc.h.

◆ IfxEvadc_SpreadEarlySamplePointStandardConversionsMode

enum IfxEvadc_SpreadEarlySamplePointStandardConversionsMode

Spread Early Sample Point for Standard Conversions.

Enumerator
IfxEvadc_SpreadEarlySamplePointStandardConversionsMode_nominal | Nominal sample timing.
IfxEvadc_SpreadEarlySamplePointStandardConversionsMode_spread | Spread sample timing, end of sample phase is varied.

Definition at line 829 of file IfxEvadc.h.

◆ IfxEvadc_StartupCalibration

enum IfxEvadc_StartupCalibration

The 0-1 transition of bit SUCAL initiates the start-up calibrationphase of all analog converters (except for the fast compare channels). Note: The start-up calibration will abort any running conversion and cannot be stopped before it is complete.

Enumerator
IfxEvadc_StartupCalibration_noAction | No action.
IfxEvadc_StartupCalibration_initiate | Initiate the start-up calibration phase (indication in bit GxARBCFG.CAL)

Definition at line 840 of file IfxEvadc.h.

◆ IfxEvadc_SupplyVoltageLevelControl

enum IfxEvadc_SupplyVoltageLevelControl

Adjusts the analog circuitry to the supply voltage used in the application system. Make sure to keep SUPLEV = 0b00 or 0b01 in the case of a 5 V supply.

Enumerator
IfxEvadc_SupplyVoltageLevelControl_automaticControl | Automatic control: voltage range is controlled by the power supply.
IfxEvadc_SupplyVoltageLevelControl_upperVoltage | Upper voltage range: assume a 5 V power supply is connected.
IfxEvadc_SupplyVoltageLevelControl_lowerVoltage | Lower voltage range: assume a 3.3 V power supply is connected.

Definition at line 850 of file IfxEvadc.h.

◆ IfxEvadc_WaitForRead

enum IfxEvadc_WaitForRead

Wait-for-Read Mode Enable.

Enumerator
IfxEvadc_WaitForRead_overwriteMode | Overwrite Mode.
IfxEvadc_WaitForRead_enabled | Wait-for-read mode enabled for this register.

Definition at line 859 of file IfxEvadc.h.

Function Documentation

◆ IfxEvadc_configureIclass()

IFX_INLINE void IfxEvadc_configureIclass | ( | Ifx_EVADC_G * | evadcG,
 |  | uint8 | inputClassNum,
 |  | uint32 | value
 | ) |  |

Sets the global input class registers, define the sample time and data conversion mode.

Parameters
evadcG | Pointer to EVADC Group SFRs
inputClassNum | Input Class Number
value | Value to be written
Returns
None

Definition at line 3231 of file IfxEvadc.h.

◆ IfxEvadc_disableInputBuffer()

IFX_INLINE void IfxEvadc_disableInputBuffer | ( | Ifx_EVADC_G * | evadcG,
 |  | IfxEvadc_GroupId | group
 | ) |  |
Parameters
evadcG | Pointer to EVADC Group SFRs
group | EVADC Group No.
Returns
None

Definition at line 3178 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_initGroup().

◆ IfxEvadc_disableReferencePrecharge()

IFX_INLINE void IfxEvadc_disableReferencePrecharge | ( | Ifx_EVADC_G * | evadcG,
 |  | IfxEvadc_GroupId | group
 | ) |  |
Parameters
evadcG | Pointer to EVADC Group Registers
group | EVADC Group Number
Returns
None

Definition at line 3171 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_initGroup().

◆ IfxEvadc_enableStartupCalibration()

IFX_INLINE void IfxEvadc_enableStartupCalibration ( Ifx_EVADC * evadc )

Enable the startup calibaration phase.

Parameters
evadc Pointer to EVADC
Returns
None

Definition at line 3191 of file IfxEvadc.h.

◆ IfxEvadc_getAnalogFunctionConfiguration()

IFX_INLINE Ifx_EVADC_G_ANCFG IfxEvadc_getAnalogFunctionConfiguration ( Ifx_EVADC_G * evadcG )
Parameters
evadcG Pointer to EVADC group register
Returns
analog function configuration value

Definition at line 2374 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_getGroupConfig().

◆ IfxEvadc_getEmuxGlobalSampleTime()

IFX_INLINE float32 IfxEvadc_getEmuxGlobalSampleTime | ( | Ifx_EVADC * | evadc,
 |  | uint8 | inputClassNum,
 |  | float32 | analogFrequency
 | ) |  |

Get the sample time of ADC global class for external channel.

Parameters
evadc | pointer to EVADC Module space
inputClassNum | Adc input class number
analogFrequency | ADC module analog frequency in Hz.
Returns
ADC input class external channel sample time in sec.

Definition at line 2434 of file IfxEvadc.h.

◆ IfxEvadc_getResultRegisterAddress()

IFX_INLINE volatile uint32 * IfxEvadc_getResultRegisterAddress | ( | Ifx_EVADC_G * | evadcG,
 |  | IfxEvadc_ChannelId | channel
 | ) |  |

Returns the pointer to the result register.

Parameters
evadcG | Pointer to EVADC Group SFRs
channel | Channel Number
Returns
The address to the result register

Definition at line 3237 of file IfxEvadc.h.

◆ IfxEvadc_isModuleEnabled()

IFX_INLINE boolean IfxEvadc_isModuleEnabled ( Ifx_EVADC * evadc )

Return if the clock for EVADC modules is enabled.

Parameters
evadc Pointer to EVADC
Returns
Status (TRUE/FALSE)

Definition at line 3185 of file IfxEvadc.h.

◆ IfxEvadc_selectQueueGatingMode()

IFX_INLINE void IfxEvadc_selectQueueGatingMode | ( | Ifx_EVADC_G * | evadcG,
 |  | IfxEvadc_RequestSource | queue,
 |  | IfxEvadc_GatingMode | gatingMode
 | ) |  |

Enable the Queue Gating Mode.

Parameters
evadcG | Pointer to EVADC Group SFRs
queue | Request source Type(Queue 0,Queue 1,Queue 2)
gatingMode | gating mode. High level, Low Level or Gating disabled.
Returns
None

Definition at line 3197 of file IfxEvadc.h.

◆ IfxEvadc_setChannelRequest()

IFX_INLINE void IfxEvadc_setChannelRequest | ( | Ifx_EVADC_G * | evadcG,
 |  | IfxEvadc_RequestSource | queue,
 |  | IfxEvadc_ChannelId | channel
 | ) |  |

Defines the channel number to be converted.

Parameters
evadcG | Pointer to EVADC Group SFRs
queue | Request source Type(Queue 0,Queue 1,Queue 2)
channel | Channel number
Returns
None

Definition at line 3214 of file IfxEvadc.h.

◆ IfxEvadc_setEmuxInterfaceForGroup()

IFX_INLINE void IfxEvadc_setEmuxInterfaceForGroup | ( | Ifx_EVADC * | evadc,
 |  | IfxEvadc_EmuxInterface | emuxInterface,
 |  | IfxEvadc_GroupId | group
 | ) |  |

Sets the Emux Interface for a particular group.

Parameters
evadc | Pointer to EVADC Module Space
emuxInterface | specifies the EmuxInterface
group | specifies the group ID
Returns
None

Definition at line 2823 of file IfxEvadc.h.

Referenced by IfxEvadc_Adc_initExternalMultiplexerMode().


iLLD_TC38A: FCE

Modules | Files
FCE
iLLD
Collaboration diagram for FCE:

Modules

Implementation
Standard Driver
How to use the FCE CRC Interface driver?
CRC

Files

file | IfxFce_cfg.h
FCE on-chip implementation data.
file | IfxFce_Crc.h
FCE CRC details.
file | IfxFce.h
FCE basic functionality.

Detailed Description


iLLD_TC38A: Implementation

Implementation
iLLD » FCE
Collaboration diagram for Implementation:


iLLD_TC38A: Standard Driver

Modules
Standard Driver
iLLD » FCE
Collaboration diagram for Standard Driver:

Modules

Enumerations
Module Functions
Support Function
Interrupt Status Functions

Detailed Description


iLLD_TC38A: Enumerations

Enumerations
Enumerations
iLLD » FCE » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxFce_CrcChannel {
IfxFce_CrcChannel_0 = 0,
IfxFce_CrcChannel_1,
IfxFce_CrcChannel_2,
IfxFce_CrcChannel_3,
IfxFce_CrcChannel_4,
IfxFce_CrcChannel_5,
IfxFce_CrcChannel_6,
IfxFce_CrcChannel_7
}
Ifx_FCE_CHx(x= 0,1), Specifies the channel used for CRC. More...

Detailed Description

Enumeration Type Documentation

◆ IfxFce_CrcChannel

enum IfxFce_CrcChannel

Ifx_FCE_CHx(x= 0,1), Specifies the channel used for CRC.

Enumerator
IfxFce_CrcChannel_0 | Specifies the channel0 used for CRC.
IfxFce_CrcChannel_1 | Specifies the channel1 used for CRC.
IfxFce_CrcChannel_2 | Specifies the channel2 used for CRC.
IfxFce_CrcChannel_3 | Specifies the channel3 used for CRC.
IfxFce_CrcChannel_4 | Specifies the channel4 used for CRC.
IfxFce_CrcChannel_5 | Specifies the channel5 used for CRC.
IfxFce_CrcChannel_6 | Specifies the channel6 used for CRC.
IfxFce_CrcChannel_7 | Specifies the channel7 used for CRC.

Definition at line 73 of file IfxFce.h.


iLLD_TC38A: Module Functions

Functions
Module Functions
iLLD » FCE » Standard Driver
Collaboration diagram for Module Functions:

Functions

IFX_INLINE void | IfxFce_disableModule (Ifx_FCE *fce)
Disable the control of FCE module. More...
IFX_INLINE void | IfxFce_enableModule (Ifx_FCE *fce)
Enable the control of FCE module. More...
IFX_EXTERN void | IfxFce_resetModule (Ifx_FCE *fce)
Reset the module by clearing the kernel. More...

Detailed Description

Function Documentation

◆ IfxFce_disableModule()

IFX_INLINE void IfxFce_disableModule ( Ifx_FCE * fce )

Disable the control of FCE module.

Parameters
fce Specifies pointer to FCE module registers
Returns
None

Definition at line 210 of file IfxFce.h.

◆ IfxFce_enableModule()

IFX_INLINE void IfxFce_enableModule ( Ifx_FCE * fce )

Enable the control of FCE module.

Parameters
fce Specifies pointer to FCE module registers
Returns
None

Definition at line 219 of file IfxFce.h.

Referenced by IfxFce_Crc_initModule().

◆ IfxFce_resetModule()

IFX_EXTERN void IfxFce_resetModule ( Ifx_FCE * fce )

Reset the module by clearing the kernel.

Parameters
fce Specifies pointer to FCE module registers
Returns
None

Definition at line 72 of file IfxFce.c.

Referenced by IfxFce_Crc_deInitModule().


iLLD_TC38A: Support Function

Functions
Support Function
iLLD » FCE » Standard Driver
Collaboration diagram for Support Function:

Functions

IFX_EXTERN uint32 IfxFce_reflectCrc32 (uint32 crcStartValue, uint8 crcLength)
Reflects the CRC data and returns it. More...

Detailed Description

Function Documentation

◆ IfxFce_reflectCrc32()

IFX_EXTERN uint32 IfxFce_reflectCrc32 | ( | uint32 | crcStartValue,
 |  | uint8 | crcLength
 | ) |  |

Reflects the CRC data and returns it.

Parameters
crcStartValue | start value for reflection
crcLength | length of reflected value
Returns
Reflected CRC data

Definition at line 53 of file IfxFce.c.


iLLD_TC38A: Interrupt Status Functions

Functions
Interrupt Status Functions
iLLD » FCE » Standard Driver
Collaboration diagram for Interrupt Status Functions:

Functions

IFX_INLINE volatile Ifx_SRC_SRCR * IfxFce_getSrcPointer (Ifx_FCE *fce)
Returns the SRC pointer for FCE. More...

Detailed Description

Function Documentation

◆ IfxFce_getSrcPointer()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxFce_getSrcPointer ( Ifx_FCE * fce )

Returns the SRC pointer for FCE.

Parameters
fce Specifies pointer to FCE module registers

Definition at line 237 of file IfxFce.h.

Referenced by IfxFce_Crc_initModule().


iLLD_TC38A: How to use the FCE CRC Interface driver?

How to use the FCE CRC Interface driver?
iLLD » FCE
Collaboration diagram for How to use the FCE CRC Interface driver?:

FCE gives CRC message signatures. Kernel 0-3 can be used for CRC calculation

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Fce/Crc/IfxFce_Crc.h>

Variables

Declare the FCE and CRC handles as global variable in your C code:

// used globally
static IfxFce_Crc fce;
static IfxFce_Crc_Crc fceCrc32_0;

Interrupt Handler Installation

See also How to define Interrupts?

Define priorities for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:

// priorities are normally defined in Ifx_IntPrioDef.h
#define IFX_INTPRIO_FCE 1

Add the interrupt service routine to your C code which should do the error flag handling:

IFX_INTERRUPT(fceISR, 0, IFX_INTPRIO_FCE)
{
{
Ifx_FCE_IN_STS interruptStatus = IfxFce_Crc_getInterruptStatus(&fceCrc32_0);
if (interruptStatus.U )
{
if ( interruptStatus.B.CMF == 1)
{
// CRC Mismatch Error...!
}
if( interruptStatus.B.CEF == 1)
{
// Configuration Error...!
}
if ( interruptStatus.B.LEF == 1)
{
// Length Error...!
}
if ( interruptStatus.B.BEF == 1)
{
// Bus Error...!
}
}
IfxFce_Crc_clearErrorFlags(&fceCrc32_0);
}
}

Finally install the interrupt handler in your initialisation function:

// install interrupt handler
IfxCpu_Irq_installInterruptHandler(fceISR, IFX_INTPRIO_FCE);
IfxCpu_enableInterrupts();

Module Initialisation

The module initialisation can be done in the same function. Here an example for all CRC kernels:

// create module config
IfxFce_Crc_Config fceConfig;
IfxFce_Crc_initModuleConfig(&fceConfig, &MODULE_FCE);
// ISR priorities and interrupt target
fceConfig.isrPriority = IFX_INTPRIO_FCE;
fceConfig.isrTypeOfService = IfxCpu_Irq_getTos( IfxCpu_getCoreIndex());
// initialize module
//IfxFce_Crc fce; // defined globally
IfxFce_Crc_initModule(&fce, &fceConfig);
// initialize CRC kernels
IfxFce_Crc_CrcConfig crcConfig;
IfxFce_Crc_initCrcConfig(&crcConfig, &fce);
crcConfig.crcKernel= IfxFce_CrcKernel_3;
IfxFce_Crc_initCrc(&fceCrc32_1, &crcConfig);
crcConfig.useDma = TRUE; // Enable Dma transfer
crcConfig.fceChannelId = IfxDma_ChannelId_0;

Error Interrupt on CRC mismatch

By default, all error interrupts aside from the CRC mismatch interrupt (CMF) are enabled.

In order to use the CMF interrupt as well, the appr. error flag has to be enabled during configuration:

// initialize CRC kernel with CRC check enabled
IfxFce_Crc_CrcConfig crcConfig;
IfxFce_Crc_initCrcConfig(&crcConfig, &fce);
crcConfig.enabledInterrupts.crcMismatch = TRUE;
IfxFce_Crc_initCrc(&fceCrc32_0, &crcConfig);

And the expected CRC value has to be written into the expectedCrc field of the handle before the CRC calculation is started.

{
// Expected CRC:
fceCrc32_0.expectedCrc = 0xd95def75;
// do calculation
uint32 fceCrc = IfxFce_Crc_calculateCrc(&fceCrc32_0, checkData, CHECK_DATA_SIZE, 0x00000000);
// we can expect, that an error interrupt has been triggered if the CRC over checkData didn't match.
}

CRC Calculation

Now, all 4 FCE kernels are configured and can be used to calculate CRC values.

In following examples, CRC is calculated over following array:

#define CHECK_DATA_SIZE 25 // declare this portion globally
// if Dma is enabled, align memory to 32 byte
uint32 checkData[CHECK_DATA_SIZE] = {
0xbe9957bb,
0x1c706c1e,
0x14c3db3f,
0x7fb17a93,
0xb0d9d5a7,
0x768093e0,
0x88b206a0,
0xc51299e4,
0xe8a97d48,
0x89367f27,
0x70095984,
0xec030f75,
0xdc22f8d4,
0xd951407b,
0x34ae18c6,
0x4d47ba7d,
0x0e2e4622,
0x4a2e90d3,
0xdaec3752,
0xcd3ed11c,
0x36b416b7,
0x8ea28658,
0xdd37eee3,
0x23928b62,
0x84eb4b22,
};


iLLD_TC38A: CRC

Modules
CRC
iLLD » FCE
Collaboration diagram for CRC:

Modules

Data Structures
Module Initialise Functions
CRC Operation Functions
Interrupt Status Function

Detailed Description


iLLD_TC38A: Data Structures

Data Structures | Functions
Data Structures
iLLD » FCE » CRC
Collaboration diagram for Data Structures:

Data Structures

struct | IfxFce_Crc_EnabledInterrupts
Specifies the interrupt enable structure. More...
struct | IfxFce_Crc
FCE Module Handle;. More...
struct | IfxFce_Crc_Config
Configuration structure of the module. More...
struct | IfxFce_Crc_Crc
Specifies the pointer to FCE module handler. More...
struct | IfxFce_Crc_CrcConfig
Specifies the module configuration structure. More...

Functions

IFX_EXTERN uint32 IfxFce_Crc_calculateCrc (IfxFce_Crc_Crc *fce, const uint32 *crcData, uint16 crcDataLength, uint32 crcStartValue)
Calculate the XORed CRC value and returns it. It takes the precomputed XORed and reversed. More...

Detailed Description

Data Structure Documentation

◆ IfxFce_Crc_EnabledInterrupts

struct IfxFce_Crc_EnabledInterrupts

Specifies the interrupt enable structure.

Definition at line 249 of file IfxFce_Crc.h.

Data Fields
boolean | busError | Specifies enabel/disable of bus error interrupt.
boolean | configError | Specifies enabel/disable of configuration error interrupt.
boolean | crcMismatch | Specifies enabel/disable of CRC mismatch interrupt.
boolean | lengthError | Specifies enabel/disable of length error interrupt.

◆ IfxFce_Crc

struct IfxFce_Crc

FCE Module Handle;.

Definition at line 263 of file IfxFce_Crc.h.

Data Fields
Ifx_FCE * fce Pointer to FCE registers.

◆ IfxFce_Crc_Config

struct IfxFce_Crc_Config

Configuration structure of the module.

Definition at line 270 of file IfxFce_Crc.h.

Data Fields
Ifx_FCE * | fce | Pointer to FCE registers.
uint16 | isrPriority | interrupt priority
IfxSrc_Tos | isrTypeOfService | type of interrupt service

◆ IfxFce_Crc_Crc

struct IfxFce_Crc_Crc

Specifies the pointer to FCE module handler.

Definition at line 279 of file IfxFce_Crc.h.

Collaboration diagram for IfxFce_Crc_Crc:
[legend]
Data Fields
IfxFce_CrcChannel | crcChannel | Specifies the Crc channel.
IfxFce_CrcKernel | crcKernel | Specifies the Crc kernel.
uint32 | expectedCrc | Specifies the expected CRC to be compared with resulted.
Ifx_FCE * | fce | Specifies pointer to FCE module registers.
IfxDma_Dma_Channel | fceDmaChannel | Dma channel handle for Fce.
boolean | useDma | Variable indicates Dma usage in Fce.

◆ IfxFce_Crc_CrcConfig

struct IfxFce_Crc_CrcConfig

Specifies the module configuration structure.

Definition at line 291 of file IfxFce_Crc.h.

Collaboration diagram for IfxFce_Crc_CrcConfig:
[legend]
Data Fields
boolean | automaticLengthReload | Specifies the enable/disable of automatic length reload.
boolean | crc32BitReflectionEnabled | Specifies enable/disable of CRC 32-bit wise reflection.
IfxFce_CrcChannel | crcChannel | Specifies the Crc Channel.
boolean | crcCheckCompared | Specifies whether CRC check comparision is enabled or not.
IfxFce_CrcKernel | crcKernel | Specifies the Crc kernel.
boolean | crcResultInverted | Specifies the XOR valueto get the final CRC.
boolean | dataByteReflectionEnabled | Specifies enable/disable of input data byte wise reflection.
IfxFce_Crc_EnabledInterrupts | enabledInterrupts | Specifies the interrupt enable structure.
uint32 | expectedCrc | Specifies the expected CRC to be compared with resulted.
Ifx_FCE * | fce | Specifies pointer to FCE module registers.
IfxDma_ChannelId | fceChannelId | Select the Dma channel for Fce operation.
boolean | swapOrderOfBytes | Swaps the order of the bytes in the IR input register.
boolean | useDma | Specifies whether Dma is used or not.

Function Documentation

◆ IfxFce_Crc_calculateCrc()

IFX_EXTERN uint32 IfxFce_Crc_calculateCrc | ( | IfxFce_Crc_Crc * | fce,
 |  | const uint32 * | crcData,
 |  | uint16 | crcDataLength,
 |  | uint32 | crcStartValue
 | ) |  |

Calculate the XORed CRC value and returns it. It takes the precomputed XORed and reversed.

Parameters
fce | Specifies the pointer to FCE module handler
crcData | Length of the input data block
crcDataLength | Length of the input data block
crcStartValue | start value for CRC calculation
Returns
Final CRC after XORed with XOR value.

Definition at line 53 of file IfxFce_Crc.c.


iLLD_TC38A: Module Initialise Functions

Functions
Module Initialise Functions
iLLD » FCE » CRC
Collaboration diagram for Module Initialise Functions:

Functions

IFX_EXTERN void | IfxFce_Crc_deInitModule (IfxFce_Crc_Crc *fce)
Deinitialises the FCE module. More...
IFX_EXTERN void | IfxFce_Crc_initCrc (IfxFce_Crc_Crc *fceCrc, const IfxFce_Crc_CrcConfig *crcConfig)
Initialise the FCE module for CRC computation according to CRC mode. More...
IFX_EXTERN void | IfxFce_Crc_initCrcConfig (IfxFce_Crc_CrcConfig *crcConfig, IfxFce_Crc *fce)
Initialises the default CRC configuration buffer. More...
IFX_EXTERN void | IfxFce_Crc_initModule (IfxFce_Crc *fce, const IfxFce_Crc_Config *config)
Usage Example: see How to use the FCE CRC Interface driver?. More...
IFX_EXTERN void | IfxFce_Crc_initModuleConfig (IfxFce_Crc_Config *config, Ifx_FCE *fce)
Fills the config structure with default values. More...

Detailed Description

Function Documentation

◆ IfxFce_Crc_deInitModule()

IFX_EXTERN void IfxFce_Crc_deInitModule ( IfxFce_Crc_Crc * fce )

Deinitialises the FCE module.

Parameters
fce Specifies the pointer to FCE module handler
Returns
None

Reset the module

IfxFce_Crc fce;
//Deinitialise the module
IfxFce_Crc_deInitModule(&fce);

Definition at line 126 of file IfxFce_Crc.c.

◆ IfxFce_Crc_initCrc()

IFX_EXTERN void IfxFce_Crc_initCrc | ( | IfxFce_Crc_Crc * | fceCrc,
 |  | const IfxFce_Crc_CrcConfig * | crcConfig
 | ) |  |

Initialise the FCE module for CRC computation according to CRC mode.

Parameters
fceCrc | Specifies the pointer to CRC handle
crcConfig | Specifies the FCE CRC configuration structure
Returns
None

Usage Example: see How to use the FCE CRC Interface driver?

Definition at line 138 of file IfxFce_Crc.c.

◆ IfxFce_Crc_initCrcConfig()

IFX_EXTERN void IfxFce_Crc_initCrcConfig | ( | IfxFce_Crc_CrcConfig * | crcConfig,
 |  | IfxFce_Crc * | fce
 | ) |  |

Initialises the default CRC configuration buffer.

Parameters
crcConfig | Specifies the FCE CRC configuration structure
fce | Pointer to the FCE module handle
Returns
None

Usage Example: see How to use the FCE CRC Interface driver?

Definition at line 190 of file IfxFce_Crc.c.

◆ IfxFce_Crc_initModule()

IFX_EXTERN void IfxFce_Crc_initModule | ( | IfxFce_Crc * | fce,
 |  | const IfxFce_Crc_Config * | config
 | ) |  |

Usage Example: see How to use the FCE CRC Interface driver?.

Parameters
fce | module handle
config | predefined configuration structure of the module
Returns
None

Definition at line 210 of file IfxFce_Crc.c.

◆ IfxFce_Crc_initModuleConfig()

IFX_EXTERN void IfxFce_Crc_initModuleConfig | ( | IfxFce_Crc_Config * | config,
 |  | Ifx_FCE * | fce
 | ) |  |

Fills the config structure with default values.

Parameters
config | configuration structure of the module
fce | pointer to FCE registers
Returns
None

Usage Example: see How to use the FCE CRC Interface driver?

Definition at line 223 of file IfxFce_Crc.c.


iLLD_TC38A: CRC Operation Functions

CRC Operation Functions
iLLD » FCE » CRC
Collaboration diagram for CRC Operation Functions:


iLLD_TC38A: Interrupt Status Function

Functions
Interrupt Status Function
iLLD » FCE » CRC
Collaboration diagram for Interrupt Status Function:

Functions

IFX_EXTERN void IfxFce_Crc_clearErrorFlags (IfxFce_Crc_Crc *fce)
Clears the error flags. More...

Detailed Description

Function Documentation

◆ IfxFce_Crc_clearErrorFlags()

IFX_EXTERN void IfxFce_Crc_clearErrorFlags ( IfxFce_Crc_Crc * fce )

Clears the error flags.

Parameters
fce Specifies the pointer to FCE module handler
Returns
None

Usage Example: see How to use the FCE CRC Interface driver?

Definition at line 120 of file IfxFce_Crc.c.


iLLD_TC38A: IfxFce_cfg.h File Reference

  • _Impl
Macros
IfxFce_cfg.h File Reference
iLLD » FCE

FCE on-chip implementation data. More...

Go to the source code of this file.

Macros

#define | IFXFCE_NUM_KERNEL (4)
#define | IFXFCE_NUM_MODULES (1)

Detailed Description

FCE on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxFce_cfg.h.

Macro Definition Documentation

◆ IFXFCE_NUM_KERNEL

#define IFXFCE_NUM_KERNEL (4)

Definition at line 60 of file IfxFce_cfg.h.

◆ IFXFCE_NUM_MODULES

#define IFXFCE_NUM_MODULES (1)

Definition at line 62 of file IfxFce_cfg.h.


iLLD_TC38A: IfxFce_Crc.h File Reference

  • Fce
  • Crc
Data Structures | Functions
IfxFce_Crc.h File Reference
iLLD » FCE

FCE CRC details. More...

#include "Fce/Std/IfxFce.h"
#include "Cpu/Irq/IfxCpu_Irq.h"
#include "Dma/Dma/IfxDma_Dma.h"
Include dependency graph for IfxFce_Crc.h:

Go to the source code of this file.

Data Structures

struct | IfxFce_Crc_EnabledInterrupts
Specifies the interrupt enable structure. More...
struct | IfxFce_Crc
FCE Module Handle;. More...
struct | IfxFce_Crc_Config
Configuration structure of the module. More...
struct | IfxFce_Crc_Crc
Specifies the pointer to FCE module handler. More...
struct | IfxFce_Crc_CrcConfig
Specifies the module configuration structure. More...

Functions

IFX_EXTERN uint32 | IfxFce_Crc_calculateCrc (IfxFce_Crc_Crc *fce, const uint32 *crcData, uint16 crcDataLength, uint32 crcStartValue)
Calculate the XORed CRC value and returns it. It takes the precomputed XORed and reversed. More...
IFX_EXTERN void | IfxFce_Crc_deInitModule (IfxFce_Crc_Crc *fce)
Deinitialises the FCE module. More...
IFX_EXTERN void | IfxFce_Crc_initCrc (IfxFce_Crc_Crc *fceCrc, const IfxFce_Crc_CrcConfig *crcConfig)
Initialise the FCE module for CRC computation according to CRC mode. More...
IFX_EXTERN void | IfxFce_Crc_initCrcConfig (IfxFce_Crc_CrcConfig *crcConfig, IfxFce_Crc *fce)
Initialises the default CRC configuration buffer. More...
IFX_EXTERN void | IfxFce_Crc_initModule (IfxFce_Crc *fce, const IfxFce_Crc_Config *config)
Usage Example: see How to use the FCE CRC Interface driver?. More...
IFX_EXTERN void | IfxFce_Crc_initModuleConfig (IfxFce_Crc_Config *config, Ifx_FCE *fce)
Fills the config structure with default values. More...
IFX_EXTERN void | IfxFce_Crc_clearErrorFlags (IfxFce_Crc_Crc *fce)
Clears the error flags. More...
IFX_EXTERN Ifx_FCE_IN_STS | IfxFce_Crc_getInterruptStatus (IfxFce_Crc_Crc *fce)
Gets the current CRC interrupt status. More...

Detailed Description

FCE CRC details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxFce_Crc.h.

Function Documentation

◆ IfxFce_Crc_getInterruptStatus()

IFX_EXTERN Ifx_FCE_IN_STS IfxFce_Crc_getInterruptStatus ( IfxFce_Crc_Crc * fce )

Gets the current CRC interrupt status.

Parameters
fce Specifies the pointer to FCE module handler
Returns
Current interrupt status

Definition at line 132 of file IfxFce_Crc.c.


iLLD_TC38A: IfxFce.h File Reference

  • Fce
  • Std
Enumerations | Functions
IfxFce.h File Reference
iLLD » FCE

FCE basic functionality. More...

#include "_Impl/IfxFce_cfg.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "Scu/Std/IfxScuWdt.h"
#include "IfxFce_reg.h"
#include "Src/Std/IfxSrc.h"
Include dependency graph for IfxFce.h:

Go to the source code of this file.

Enumerations

enum IfxFce_CrcChannel {
IfxFce_CrcChannel_0 = 0,
IfxFce_CrcChannel_1,
IfxFce_CrcChannel_2,
IfxFce_CrcChannel_3,
IfxFce_CrcChannel_4,
IfxFce_CrcChannel_5,
IfxFce_CrcChannel_6,
IfxFce_CrcChannel_7
}
Ifx_FCE_CHx(x= 0,1), Specifies the channel used for CRC. More...
enum IfxFce_CrcKernel {
IfxFce_CrcKernel_0 = 0,
IfxFce_CrcKernel_1 = 1,
IfxFce_CrcKernel_2 = 2,
IfxFce_CrcKernel_3 = 3
}
Specify the CRC kernel used by the fce channel. More...

Functions

IFX_INLINE void | IfxFce_disableModule (Ifx_FCE *fce)
Disable the control of FCE module. More...
IFX_INLINE void | IfxFce_enableModule (Ifx_FCE *fce)
Enable the control of FCE module. More...
IFX_EXTERN void | IfxFce_resetModule (Ifx_FCE *fce)
Reset the module by clearing the kernel. More...
IFX_EXTERN uint32 | IfxFce_reflectCrc32 (uint32 crcStartValue, uint8 crcLength)
Reflects the CRC data and returns it. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxFce_getSrcPointer (Ifx_FCE *fce)
Returns the SRC pointer for FCE. More...
IFX_INLINE void | IfxFce_clearCrcErrorFlags (Ifx_FCE *fce, IfxFce_CrcChannel channel)
Specifies pointer to FCE module registers. More...
IFX_INLINE Ifx_FCE_IN_STS | IfxFce_getCrcInterruptStatus (Ifx_FCE *fce, IfxFce_CrcChannel channel)
Gets the CRC interrupt status. More...
IFX_INLINE void | IfxFce_setChannelCrcLength (Ifx_FCE *fce, IfxFce_CrcChannel channel, uint32 crcLength)
Set the length of over which CRC checksum is calculated. More...
IFX_INLINE void | IfxFce_setCrcstartValue (Ifx_FCE *fce, IfxFce_CrcChannel channel, uint32 crcStartValue)
Set the CRC start value. More...
IFX_INLINE void | IfxFce_setExpectedCrc (Ifx_FCE *fce, IfxFce_CrcChannel channel, uint32 expectedCrc)
Set expected crc value to be checked. More...

Detailed Description

FCE basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxFce.h.

Enumeration Type Documentation

◆ IfxFce_CrcKernel

enum IfxFce_CrcKernel

Specify the CRC kernel used by the fce channel.

Enumerator
IfxFce_CrcKernel_0 | Specifies to use kernel 0.
IfxFce_CrcKernel_1 | Specifies to use kernel 1.
IfxFce_CrcKernel_2 | Specifies to use kernel 2.
IfxFce_CrcKernel_3 | Specifies to use kernel 3.

Definition at line 89 of file IfxFce.h.

Function Documentation

◆ IfxFce_clearCrcErrorFlags()

IFX_INLINE void IfxFce_clearCrcErrorFlags | ( | Ifx_FCE * | fce,
 |  | IfxFce_CrcChannel | channel
 | ) |  |

Specifies pointer to FCE module registers.

Parameters
fce | Specifies the pointer to FCE module handler
channel | Specifies the Channel
Returns
None

Definition at line 204 of file IfxFce.h.

Referenced by IfxFce_Crc_clearErrorFlags().

◆ IfxFce_getCrcInterruptStatus()

IFX_INLINE Ifx_FCE_IN_STS IfxFce_getCrcInterruptStatus | ( | Ifx_FCE * | fce,
 |  | IfxFce_CrcChannel | channel
 | ) |  |

Gets the CRC interrupt status.

Parameters
fce | Specifies pointer to FCE module registers
channel | Specifies the Channel
Returns
Return Crc Interrupt Status

Definition at line 228 of file IfxFce.h.

Referenced by IfxFce_Crc_getInterruptStatus().

◆ IfxFce_setChannelCrcLength()

IFX_INLINE void IfxFce_setChannelCrcLength | ( | Ifx_FCE * | fce,
 |  | IfxFce_CrcChannel | channel,
 |  | uint32 | crcLength
 | ) |  |

Set the length of over which CRC checksum is calculated.

Parameters
fce | Specifies pointer to FCE module registers
channel | Specifies the channel
crcLength | Specifies the Length of CRC
Returns
None

Definition at line 244 of file IfxFce.h.

Referenced by IfxFce_Crc_calculateCrc().

◆ IfxFce_setCrcstartValue()

IFX_INLINE void IfxFce_setCrcstartValue | ( | Ifx_FCE * | fce,
 |  | IfxFce_CrcChannel | channel,
 |  | uint32 | crcStartValue
 | ) |  |

Set the CRC start value.

Parameters
fce | Specifies pointer to FCE module registers
channel | Specifies the channel
crcStartValue | Set the crc value
Returns
None

Definition at line 252 of file IfxFce.h.

Referenced by IfxFce_Crc_calculateCrc().

◆ IfxFce_setExpectedCrc()

IFX_INLINE void IfxFce_setExpectedCrc | ( | Ifx_FCE * | fce,
 |  | IfxFce_CrcChannel | channel,
 |  | uint32 | expectedCrc
 | ) |  |

Set expected crc value to be checked.

Parameters
fce | Specifies pointer to FCE module registers
channel | Specifies the channel
expectedCrc | Expected CRC value to be checked
Returns
None

Definition at line 258 of file IfxFce.h.

Referenced by IfxFce_Crc_calculateCrc().


iLLD_TC38A: FLASH

Modules | Files
FLASH
iLLD
Collaboration diagram for FLASH:

Modules

Implementation
Standard Driver

Files

file | IfxFlash_cfg.h
FLASH on-chip implementation data.
file | IfxFlash.h
FLASH basic functionality.

Detailed Description


iLLD_TC38A: Implementation

Implementation
iLLD » FLASH
Collaboration diagram for Implementation:


iLLD_TC38A: Standard Driver

Modules
Standard Driver
iLLD » FLASH
Collaboration diagram for Standard Driver:

Modules

Enumerations
CommandSequence Functions

Detailed Description


iLLD_TC38A: Enumerations

Enumerations
iLLD » FLASH » Standard Driver
Collaboration diagram for Enumerations:


iLLD_TC38A: CommandSequence Functions

Functions
CommandSequence Functions
iLLD » FLASH » Standard Driver
Collaboration diagram for CommandSequence Functions:

Functions

IFX_INLINE void | IfxFlash_clearStatus (uint32 flash)
Performs the "Clear Status" sequence. Operation and error flags are cleared. More...
IFX_INLINE uint8 | IfxFlash_enterPageMode (uint32 pageAddr)
Performs the sequence for entering program page mode. More...
IFX_INLINE void | IfxFlash_eraseMultipleSectors (uint32 sectorAddr, uint32 numSector)
Performs the erase sequence for n sectors in program or data flash. More...
IFX_INLINE void | IfxFlash_eraseSector (uint32 sectorAddr)
Performs the erase sequence for a sector in program or data flash. More...
IFX_INLINE void | IfxFlash_eraseVerifyMultipleSectors (uint32 sectorAddr, uint32 numSector)
Performs the "Erase Verify" sequence for multiple sectors. More...
IFX_INLINE void | IfxFlash_eraseVerifySector (uint32 sectorAddr)
Performs the "Erase Verify" sequence. More...
IFX_INLINE void | IfxFlash_loadPage (uint32 pageAddr, uint32 wordL, uint32 wordU)
performs a load page sequence with a single 64bit access More...
IFX_INLINE void | IfxFlash_loadPage2X32 (uint32 pageAddr, uint32 wordL, uint32 wordU)
performs a load page sequence with two 32bit accesses More...
IFX_INLINE void | IfxFlash_resetToRead (uint32 flash)
reset to read mode More...
IFX_INLINE void | IfxFlash_resumeProtection (uint32 flash)
Performs the "Resume Protection" sequence. More...
IFX_INLINE void | IfxFlash_suspendResumeMultipleSectors (uint32 sectorAddr, uint32 numSector)
Performs the "Suspend Resume" sequence for multiple sectors. More...
IFX_INLINE void | IfxFlash_suspendResumeSector (uint32 sectorAddr)
Performs the "Suspend Resume" sequence. More...
IFX_INLINE void | IfxFlash_userContentCount (uint32 wordAddr)
The function issues command sequence for User Content count.The result of this function is dependent on the difference of the number of logic 1 bits in the selected pages at the erase-verify condition (N_dv) and at the selected control gate voltage (N_pv). Calling this function with different control gate voltages allows calculation of the Vth distribution. More...
IFX_INLINE void | IfxFlash_userMarginCount (uint32 wordAddr)
The function issues command sequence for User Margin Count. The result of this function is the number of logic 1 bits in the selected pages at the selected reference current. Calling this function with different reference currents allows calculation of the cell current distribution. More...
IFX_INLINE void | IfxFlash_userVthCount (uint32 wordAddr)
The function issues command sequence for User Vth Count.The result of this function is the number of logic 1 bits in the selected pages at the selected control gate voltage. Calling this function with different control gate voltages allows calculation of the Vth distribution. More...
IFX_INLINE void | IfxFlash_verifyErasedPage (uint32 pageAddr)
Performs the "Verify Erased Block (page)" sequence. This command verifies if one page addressed by "PA" is correctly erased, i.e. contain 0 data and ECC bits. More...
IFX_INLINE void | IfxFlash_verifyErasedWordLine (uint32 wordLineAddr)
Performs the "Verify Erased WL" sequence.This command verifies if one word line addressed by "WA" is correctly erased, i.e. contain 0 data and ECC bits. More...
IFX_INLINE uint8 | IfxFlash_waitUnbusy (uint32 flash, IfxFlash_FlashType flashType)
Polls the selected status flag in flash status register until it turns to 0. More...
IFX_INLINE void | IfxFlash_writeBurst (uint32 pageAddr)
Performs the "Write Burst" sequence, similar to write page but performs a burst transfer instead of page.Make sure the appropriate amount of data is loaded using load page command. More...
IFX_INLINE void | IfxFlash_writeBurstOnce (uint32 pageAddr)
Performs the "Write Burst once" sequence. The command starts the programming process for an aligned group of pages as the normal "Write Burst" does. But before programming it checks if the pages are erased. If the page is not erased (allowing correctable errors) the command fails with PVER and EVER. The command is only supported for PFlash. On sectors with "write-once" protection only this write command can be applied. More...
IFX_INLINE void | IfxFlash_writePage (uint32 pageAddr)
Performs the "Write Page" sequence. More...
IFX_INLINE void | IfxFlash_writePageOnce (uint32 pageAddr)
Performs the "Write Page Once" sequence, similar to write page but performs a program verify after writing. More...
IFX_EXTERN void | IfxFlash_disableWriteProtection (uint32 flash, IfxFlash_UcbType ucb, uint32 *password)
The password protection of the selected UCB (if this UCB offers this feature) is temporarily disabled. The command fails by setting PROER when any of the supplied PWs does not match. In this case until the next application reset all further calls of "Disable Protection" fail with PROER independent of the supplied password. More...

Detailed Description

Function Documentation

◆ IfxFlash_clearStatus()

IFX_INLINE void IfxFlash_clearStatus ( uint32 flash )

Performs the "Clear Status" sequence. Operation and error flags are cleared.

Parameters
flash selects the flash (PMU) module
Returns
None

Definition at line 417 of file IfxFlash.h.

◆ IfxFlash_disableWriteProtection()

IFX_EXTERN void IfxFlash_disableWriteProtection | ( | uint32 | flash,
 |  | IfxFlash_UcbType | ucb,
 |  | uint32 * | password
 | ) |  |

The password protection of the selected UCB (if this UCB offers this feature) is temporarily disabled. The command fails by setting PROER when any of the supplied PWs does not match. In this case until the next application reset all further calls of "Disable Protection" fail with PROER independent of the supplied password.

Parameters
flash | selects the flash (PMU) module
ucb | selects the user configuration block (0 for UCB0, 1 for UCB1, 5 for UCB_HSMC)
password | password pointer to an array of 8 words
Returns
None

Definition at line 53 of file IfxFlash.c.

◆ IfxFlash_enterPageMode()

IFX_INLINE uint8 IfxFlash_enterPageMode ( uint32 pageAddr )

Performs the sequence for entering program page mode.

Parameters
pageAddr pageAddr specifies the page being written - the command sequence will be varied accordingly
Returns
0 on success, != 0 if invalid or not available page is selected

Usage Example:

unsigned int pageAddr = IFXFLASH_DFLASH_START + page*IFXFLASH_DFLASH_PAGE_LENGTH;
// enter page mode
IfxFlash_enterPageMode(pageAddr);

Definition at line 428 of file IfxFlash.h.

◆ IfxFlash_eraseMultipleSectors()

IFX_INLINE void IfxFlash_eraseMultipleSectors | ( | uint32 | sectorAddr,
 |  | uint32 | numSector
 | ) |  |

Performs the erase sequence for n sectors in program or data flash.

Parameters
sectorAddr | sector address
numSector | the no.of sectors to be erased
Returns
None

Usage Example:

// erase logical sectors of program flash
IfxFlash_eraseMultipleSectors(pFlashTableLog[sector].start,2);

Definition at line 448 of file IfxFlash.h.

◆ IfxFlash_eraseSector()

IFX_INLINE void IfxFlash_eraseSector ( uint32 sectorAddr )

Performs the erase sequence for a sector in program or data flash.

Parameters
sectorAddr sector address
Returns
None

Usage Example:

// erase all sectors of program flash
for(sector=0; sector<IFXFLASH_PFLASH_NO_OF_LOG_SECTORS; ++sector) {
// get address from predefined table
unsigned int sector_addr = pFlashTableLog[sector].start;
// erase sector
IfxFlash_eraseSector(sector_addr);
}

Definition at line 464 of file IfxFlash.h.

◆ IfxFlash_eraseVerifyMultipleSectors()

IFX_INLINE void IfxFlash_eraseVerifyMultipleSectors | ( | uint32 | sectorAddr,
 |  | uint32 | numSector
 | ) |  |

Performs the "Erase Verify" sequence for multiple sectors.

Parameters
sectorAddr | sector address which should be verified
numSector | no.of sectors to be operated on
Returns
None

Definition at line 480 of file IfxFlash.h.

◆ IfxFlash_eraseVerifySector()

IFX_INLINE void IfxFlash_eraseVerifySector ( uint32 sectorAddr )

Performs the "Erase Verify" sequence.

Parameters
sectorAddr sector address which should be verified
Returns
None

Definition at line 496 of file IfxFlash.h.

◆ IfxFlash_loadPage()

IFX_INLINE void IfxFlash_loadPage | ( | uint32 | pageAddr,
 |  | uint32 | wordL,
 |  | uint32 | wordU
 | ) |  |

performs a load page sequence with a single 64bit access

Parameters
pageAddr | pageAddr start address of page which should be programmed
wordL | Lower Address word
wordU | Upper address word
Returns
None

Usage Example:

// load 64bit into assembly buffer of program flash
IfxFlash_loadPage(IFXFLASH_PFLASH_START, 0x55555555, 0xaaaaaaaa);
// load 64bit into assembly buffer of data flash
IfxFlash_loadPage(0XAF000000, 0x55555555, 0xaaaaaaaa);

Definition at line 512 of file IfxFlash.h.

◆ IfxFlash_loadPage2X32()

IFX_INLINE void IfxFlash_loadPage2X32 | ( | uint32 | pageAddr,
 |  | uint32 | wordL,
 |  | uint32 | wordU
 | ) |  |

performs a load page sequence with two 32bit accesses

Parameters
pageAddr | pageAddr start address of page which should be programmed
wordL | Lower Address word
wordU | Upper Address word
Returns
None

Usage Example:

// load 2*32bit into assembly buffer of program flash
IfxFlash_loadPage2X32(IFXFLASH_PFLASH_START, 0x55555555, 0xaaaaaaaa);
// load 2*32bit into assembly buffer of data flash
IfxFlash_loadPage2X32(0XAF000000, 0x55555555, 0xaaaaaaaa);

Definition at line 523 of file IfxFlash.h.

◆ IfxFlash_resetToRead()

IFX_INLINE void IfxFlash_resetToRead ( uint32 flash )

reset to read mode

Parameters
flash flash selects the flash (PMU) module
Returns
None

Usage Example:

// reset to read mode
IfxFlash_resetToRead(0);

Definition at line 537 of file IfxFlash.h.

◆ IfxFlash_resumeProtection()

IFX_INLINE void IfxFlash_resumeProtection ( uint32 flash )

Performs the "Resume Protection" sequence.

Parameters
flash selects the flash (PMU) module
Returns
None

Definition at line 547 of file IfxFlash.h.

◆ IfxFlash_suspendResumeMultipleSectors()

IFX_INLINE void IfxFlash_suspendResumeMultipleSectors | ( | uint32 | sectorAddr,
 |  | uint32 | numSector
 | ) |  |

Performs the "Suspend Resume" sequence for multiple sectors.

Parameters
sectorAddr | sector address
numSector | the no.of sectors to be operated on
Returns
None

Definition at line 559 of file IfxFlash.h.

◆ IfxFlash_suspendResumeSector()

IFX_INLINE void IfxFlash_suspendResumeSector ( uint32 sectorAddr )

Performs the "Suspend Resume" sequence.

Parameters
sectorAddr sector address which should be resumed
Returns
None

Definition at line 575 of file IfxFlash.h.

◆ IfxFlash_userContentCount()

IFX_INLINE void IfxFlash_userContentCount ( uint32 wordAddr )

The function issues command sequence for User Content count.The result of this function is dependent on the difference of the number of logic 1 bits in the selected pages at the erase-verify condition (N_dv) and at the selected control gate voltage (N_pv). Calling this function with different control gate voltages allows calculation of the Vth distribution.

Parameters
wordAddr word address
Returns
None

Definition at line 591 of file IfxFlash.h.

◆ IfxFlash_userMarginCount()

IFX_INLINE void IfxFlash_userMarginCount ( uint32 wordAddr )

The function issues command sequence for User Margin Count. The result of this function is the number of logic 1 bits in the selected pages at the selected reference current. Calling this function with different reference currents allows calculation of the cell current distribution.

Parameters
wordAddr word address
Returns
None

Definition at line 606 of file IfxFlash.h.

◆ IfxFlash_userVthCount()

IFX_INLINE void IfxFlash_userVthCount ( uint32 wordAddr )

The function issues command sequence for User Vth Count.The result of this function is the number of logic 1 bits in the selected pages at the selected control gate voltage. Calling this function with different control gate voltages allows calculation of the Vth distribution.

Parameters
wordAddr word address
Returns
None

Definition at line 621 of file IfxFlash.h.

◆ IfxFlash_verifyErasedPage()

IFX_INLINE void IfxFlash_verifyErasedPage ( uint32 pageAddr )

Performs the "Verify Erased Block (page)" sequence. This command verifies if one page addressed by "PA" is correctly erased, i.e. contain 0 data and ECC bits.

Parameters
pageAddr page address which should be verified
Returns
None

Definition at line 636 of file IfxFlash.h.

◆ IfxFlash_verifyErasedWordLine()

IFX_INLINE void IfxFlash_verifyErasedWordLine ( uint32 wordLineAddr )

Performs the "Verify Erased WL" sequence.This command verifies if one word line addressed by "WA" is correctly erased, i.e. contain 0 data and ECC bits.

Parameters
wordLineAddr word line address which should be verified
Returns
None

Definition at line 652 of file IfxFlash.h.

◆ IfxFlash_waitUnbusy()

IFX_INLINE uint8 IfxFlash_waitUnbusy | ( | uint32 | flash,
 |  | IfxFlash_FlashType | flashType
 | ) |  |

Polls the selected status flag in flash status register until it turns to 0.

Parameters
flash | selects the flash (PMU) module
flashType | selects the flash type
Returns
0 on success, != 0 if invalid or not available page is selected

Usage Example:

// wait until data flash 0 is unbusy
IfxFlash_waitUnbusy(0, IfxFlash_FlashType_D0);

Definition at line 668 of file IfxFlash.h.

◆ IfxFlash_writeBurst()

IFX_INLINE void IfxFlash_writeBurst ( uint32 pageAddr )

Performs the "Write Burst" sequence, similar to write page but performs a burst transfer instead of page.Make sure the appropriate amount of data is loaded using load page command.

Parameters
pageAddr start address of page which should be programmed
Returns
None

Usage Example:

// program the second page of the first sector of the Program Flash
IfxFlash_writeBurst(0xa0000100);

Definition at line 685 of file IfxFlash.h.

◆ IfxFlash_writeBurstOnce()

IFX_INLINE void IfxFlash_writeBurstOnce ( uint32 pageAddr )

Performs the "Write Burst once" sequence. The command starts the programming process for an aligned group of pages as the normal "Write Burst" does. But before programming it checks if the pages are erased. If the page is not erased (allowing correctable errors) the command fails with PVER and EVER. The command is only supported for PFlash. On sectors with "write-once" protection only this write command can be applied.

Parameters
pageAddr start address of page which should be programmed
Returns
None

Usage Example:

// program the second page of the first sector of the Program Flash
IfxFlash_writeBurstOnce(0xa0000100);

Definition at line 701 of file IfxFlash.h.

◆ IfxFlash_writePage()

IFX_INLINE void IfxFlash_writePage ( uint32 pageAddr )

Performs the "Write Page" sequence.

Parameters
pageAddr start address of page which should be programmed
Returns
None

Usage Example:

// program the second page of the first sector of the Program Flash
IfxFlash_writePage(0xa0000100);

Definition at line 717 of file IfxFlash.h.

◆ IfxFlash_writePageOnce()

IFX_INLINE void IfxFlash_writePageOnce ( uint32 pageAddr )

Performs the "Write Page Once" sequence, similar to write page but performs a program verify after writing.

Parameters
pageAddr start address of page which should be programmed
Returns
None

Usage Example:

// program the second page of the first sector of the Program Flash
IfxFlash_writePageOnce(0xa0000100);

Definition at line 733 of file IfxFlash.h.


iLLD_TC38A: IfxFlash_cfg.h File Reference

  • _Impl
Data Structures | Macros | Enumerations | Variables
IfxFlash_cfg.h File Reference
iLLD » FLASH

FLASH on-chip implementation data. More...

#include "Cpu/Std/IfxCpu_Intrinsics.h"
Include dependency graph for IfxFlash_cfg.h:

Go to the source code of this file.

Data Structures

struct IfxFlash_flashSector
contains start and end address of sectors More...

Macros

#define | IFXFLASH_NUM_FLASH_MODULES (1)
number of flash modules. This macro may be deprecated in future. Use IFXFLASH_NUM_MODULES instead. More...
#define | IFXFLASH_CMD_BASE_ADDRESS (0xaf000000)
base address for general command sequences More...
#define | IFXFLASH_CMD_BASE_OFFSET (0x00100000)
offset between command areas (in DFlash range) More...
#define | IFXFLASH_DFLASH_BANKS (2)
#define | IFXFLASH_DFLASH_BURST_LENGTH (0x20)
Dflash burst length. More...
#define | IFXFLASH_DFLASH_END (IFXFLASH_DFLASH_START + IFXFLASH_DFLASH_SIZE - 1)
#define | IFXFLASH_DFLASH_NUM_CFS_LOG_SECTORS (16)
CFS logical sector count. More...
#define | IFXFLASH_DFLASH_NUM_HSM_LOG_SECTORS (32)
#define | IFXFLASH_DFLASH_NUM_LOG_SECTORS (128 + 32)
#define | IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS (1)
Phy sector for DF. More...
#define | IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS (48)
#define | IFXFLASH_DFLASH_PAGE_LENGTH (8)
8 bytes More...
#define | IFXFLASH_DFLASH_SIZE (IFXFLASH_DFLASH_NUM_LOG_SECTORS * 0x1000)
#define | IFXFLASH_DFLASH_START (0xaf000000)
#define | IFXFLASH_DFLASH_WORDLINE_LENGTH (512)
#define | IFXFLASH_ERROR_TRACKING_MAX_CORRECTABLE_ERRORS (10)
#define | IFXFLASH_ERROR_TRACKING_MAX_UNCORRECTABLE_ERRORS (1)
#define | IFXFLASH_NUM_MODULES (1)
number of flash modules More...
#define | IFXFLASH_PFLASH_BANKS (4)
#define | IFXFLASH_PFLASH_BURST_LENGTH (0x100)
P flash burst length. More...
#define | IFXFLASH_PFLASH_END (IFXFLASH_PFLASH_START + IFXFLASH_PFLASH_SIZE - 1)
p flash end More...
#define | IFXFLASH_PFLASH_NUM_LOG_SECTORS ((192 * 3) + 64)
#define | IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS (3 * 3 + 1)
#define | IFXFLASH_PFLASH_OFFSET (0x00800000)
offset between PMU PFlash ranges More...
#define | IFXFLASH_PFLASH_P0_END (IFXFLASH_PFLASH_P0_START + IFXFLASH_PFLASH_P0_SIZE - 1)
PF0 end. More...
#define | IFXFLASH_PFLASH_P0_SIZE (0x300000)
PF0 size. More...
#define | IFXFLASH_PFLASH_P0_START (0xa0000000)
PF0 start. More...
#define | IFXFLASH_PFLASH_P1_END (IFXFLASH_PFLASH_P1_START + IFXFLASH_PFLASH_P1_SIZE - 1)
PF1 end. More...
#define | IFXFLASH_PFLASH_P1_SIZE (0x300000)
PF1 size. More...
#define | IFXFLASH_PFLASH_P1_START (IFXFLASH_PFLASH_P0_START + IFXFLASH_PFLASH_P0_SIZE)
PF1 start. More...
#define | IFXFLASH_PFLASH_P2_END (IFXFLASH_PFLASH_P2_START + IFXFLASH_PFLASH_P2_SIZE - 1)
PF2 end. More...
#define | IFXFLASH_PFLASH_P2_SIZE (0x300000)
PF2 size. More...
#define | IFXFLASH_PFLASH_P2_START (IFXFLASH_PFLASH_P1_START + IFXFLASH_PFLASH_P1_SIZE)
PF2 start. More...
#define | IFXFLASH_PFLASH_P3_END (IFXFLASH_PFLASH_P3_START + IFXFLASH_PFLASH_P3_SIZE - 1)
PF3 end. More...
#define | IFXFLASH_PFLASH_P3_SIZE (0x100000)
PF3 size. More...
#define | IFXFLASH_PFLASH_P3_START (IFXFLASH_PFLASH_P2_START + IFXFLASH_PFLASH_P2_SIZE)
PF3 start. More...
#define | IFXFLASH_PFLASH_PAGE_LENGTH (32)
#define | IFXFLASH_PFLASH_SIZE (0x00A00000)
p flash size More...
#define | IFXFLASH_PFLASH_START (0xa0000000)
p flash start More...
#define | IFXFLASH_PFLASH_WORDLINE_LENGTH (1024)

Enumerations

enum IfxFlash_FlashType {
IfxFlash_FlashType_D0 = 0,
IfxFlash_FlashType_D1 = 1,
IfxFlash_FlashType_P0 = 2,
IfxFlash_FlashType_P1 = 3,
IfxFlash_FlashType_P2 = 4,
IfxFlash_FlashType_P3 = 5,
IfxFlash_FlashType_Fa = 16
}
enum IfxFlash_UcbType {
IfxFlash_UcbType_ucbPflash = 16,
IfxFlash_UcbType_ucbDflash = 17,
IfxFlash_UcbType_ucbDebug = 18,
IfxFlash_UcbType_ucbRetest = 15
}
user configuration block type More...

Variables

IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableCfsLog [IFXFLASH_DFLASH_NUM_CFS_LOG_SECTORS]
IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableEepLog [IFXFLASH_DFLASH_NUM_LOG_SECTORS]
IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableHsmLog [IFXFLASH_DFLASH_NUM_HSM_LOG_SECTORS]
IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTablePhys [IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS]
IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableUcbLog [IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS]
IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_pFlashTableLog [IFXFLASH_PFLASH_NUM_LOG_SECTORS]
IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_pFlashTablePhys [IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS]

Detailed Description

FLASH on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxFlash_cfg.h.

Data Structure Documentation

◆ IfxFlash_flashSector

struct IfxFlash_flashSector

contains start and end address of sectors

Definition at line 234 of file IfxFlash_cfg.h.

Data Fields
uint32 | end | end address of sector
uint32 | start | start address of sector

Macro Definition Documentation

◆ IFXFLASH_CMD_BASE_ADDRESS

#define IFXFLASH_CMD_BASE_ADDRESS (0xaf000000)

base address for general command sequences

Definition at line 69 of file IfxFlash_cfg.h.

Referenced by IfxFlash_clearStatus(), IfxFlash_disableWriteProtection(), IfxFlash_enterPageMode(), IfxFlash_eraseMultipleSectors(), IfxFlash_eraseSector(), IfxFlash_eraseVerifyMultipleSectors(), IfxFlash_eraseVerifySector(), IfxFlash_loadPage(), IfxFlash_loadPage2X32(), IfxFlash_replaceLogicalSector(), IfxFlash_resetToRead(), IfxFlash_resumeProtection(), IfxFlash_suspendResumeMultipleSectors(), IfxFlash_suspendResumeSector(), IfxFlash_userContentCount(), IfxFlash_userMarginCount(), IfxFlash_userVthCount(), IfxFlash_verifyErasedPage(), IfxFlash_verifyErasedWordLine(), IfxFlash_writeBurst(), IfxFlash_writeBurstOnce(), IfxFlash_writePage(), and IfxFlash_writePageOnce().

◆ IFXFLASH_CMD_BASE_OFFSET

#define IFXFLASH_CMD_BASE_OFFSET (0x00100000)

offset between command areas (in DFlash range)

Definition at line 73 of file IfxFlash_cfg.h.

◆ IFXFLASH_DFLASH_BANKS

#define IFXFLASH_DFLASH_BANKS (2)

Definition at line 75 of file IfxFlash_cfg.h.

◆ IFXFLASH_DFLASH_BURST_LENGTH

#define IFXFLASH_DFLASH_BURST_LENGTH (0x20)

Dflash burst length.

Definition at line 79 of file IfxFlash_cfg.h.

◆ IFXFLASH_DFLASH_END

#define IFXFLASH_DFLASH_END (IFXFLASH_DFLASH_START + IFXFLASH_DFLASH_SIZE - 1)

Definition at line 81 of file IfxFlash_cfg.h.

◆ IFXFLASH_DFLASH_NUM_CFS_LOG_SECTORS

#define IFXFLASH_DFLASH_NUM_CFS_LOG_SECTORS (16)

CFS logical sector count.

Definition at line 85 of file IfxFlash_cfg.h.

◆ IFXFLASH_DFLASH_NUM_HSM_LOG_SECTORS

#define IFXFLASH_DFLASH_NUM_HSM_LOG_SECTORS (32)

Definition at line 89 of file IfxFlash_cfg.h.

◆ IFXFLASH_DFLASH_NUM_LOG_SECTORS

#define IFXFLASH_DFLASH_NUM_LOG_SECTORS (128 + 32)

Definition at line 91 of file IfxFlash_cfg.h.

◆ IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS

#define IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS (1)

Phy sector for DF.

Definition at line 95 of file IfxFlash_cfg.h.

◆ IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS

#define IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS (48)

Definition at line 97 of file IfxFlash_cfg.h.

◆ IFXFLASH_DFLASH_PAGE_LENGTH

#define IFXFLASH_DFLASH_PAGE_LENGTH (8)

8 bytes

Definition at line 101 of file IfxFlash_cfg.h.

◆ IFXFLASH_DFLASH_SIZE

#define IFXFLASH_DFLASH_SIZE (IFXFLASH_DFLASH_NUM_LOG_SECTORS * 0x1000)

Definition at line 103 of file IfxFlash_cfg.h.

◆ IFXFLASH_DFLASH_START

#define IFXFLASH_DFLASH_START (0xaf000000)

Definition at line 105 of file IfxFlash_cfg.h.

◆ IFXFLASH_DFLASH_WORDLINE_LENGTH

#define IFXFLASH_DFLASH_WORDLINE_LENGTH (512)

Definition at line 107 of file IfxFlash_cfg.h.

◆ IFXFLASH_ERROR_TRACKING_MAX_CORRECTABLE_ERRORS

#define IFXFLASH_ERROR_TRACKING_MAX_CORRECTABLE_ERRORS (10)

Definition at line 111 of file IfxFlash_cfg.h.

◆ IFXFLASH_ERROR_TRACKING_MAX_UNCORRECTABLE_ERRORS

#define IFXFLASH_ERROR_TRACKING_MAX_UNCORRECTABLE_ERRORS (1)

Definition at line 115 of file IfxFlash_cfg.h.

◆ IFXFLASH_NUM_FLASH_MODULES

#define IFXFLASH_NUM_FLASH_MODULES (1)

number of flash modules. This macro may be deprecated in future. Use IFXFLASH_NUM_MODULES instead.

Definition at line 65 of file IfxFlash_cfg.h.

◆ IFXFLASH_NUM_MODULES

#define IFXFLASH_NUM_MODULES (1)

number of flash modules

Definition at line 119 of file IfxFlash_cfg.h.

◆ IFXFLASH_PFLASH_BANKS

#define IFXFLASH_PFLASH_BANKS (4)

Definition at line 121 of file IfxFlash_cfg.h.

◆ IFXFLASH_PFLASH_BURST_LENGTH

#define IFXFLASH_PFLASH_BURST_LENGTH (0x100)

P flash burst length.

Definition at line 125 of file IfxFlash_cfg.h.

◆ IFXFLASH_PFLASH_END

#define IFXFLASH_PFLASH_END (IFXFLASH_PFLASH_START + IFXFLASH_PFLASH_SIZE - 1)

p flash end

Definition at line 129 of file IfxFlash_cfg.h.

◆ IFXFLASH_PFLASH_NUM_LOG_SECTORS

#define IFXFLASH_PFLASH_NUM_LOG_SECTORS ((192 * 3) + 64)

Definition at line 133 of file IfxFlash_cfg.h.

◆ IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS

#define IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS (3 * 3 + 1)

Definition at line 135 of file IfxFlash_cfg.h.

◆ IFXFLASH_PFLASH_OFFSET

#define IFXFLASH_PFLASH_OFFSET (0x00800000)

offset between PMU PFlash ranges

Definition at line 139 of file IfxFlash_cfg.h.

◆ IFXFLASH_PFLASH_P0_END

#define IFXFLASH_PFLASH_P0_END (IFXFLASH_PFLASH_P0_START + IFXFLASH_PFLASH_P0_SIZE - 1)

PF0 end.

Definition at line 143 of file IfxFlash_cfg.h.

◆ IFXFLASH_PFLASH_P0_SIZE

#define IFXFLASH_PFLASH_P0_SIZE (0x300000)

PF0 size.

Definition at line 147 of file IfxFlash_cfg.h.

◆ IFXFLASH_PFLASH_P0_START

#define IFXFLASH_PFLASH_P0_START (0xa0000000)

PF0 start.

Definition at line 151 of file IfxFlash_cfg.h.

◆ IFXFLASH_PFLASH_P1_END

#define IFXFLASH_PFLASH_P1_END (IFXFLASH_PFLASH_P1_START + IFXFLASH_PFLASH_P1_SIZE - 1)

PF1 end.

Definition at line 155 of file IfxFlash_cfg.h.

◆ IFXFLASH_PFLASH_P1_SIZE

#define IFXFLASH_PFLASH_P1_SIZE (0x300000)

PF1 size.

Definition at line 159 of file IfxFlash_cfg.h.

◆ IFXFLASH_PFLASH_P1_START

#define IFXFLASH_PFLASH_P1_START (IFXFLASH_PFLASH_P0_START + IFXFLASH_PFLASH_P0_SIZE)

PF1 start.

Definition at line 163 of file IfxFlash_cfg.h.

◆ IFXFLASH_PFLASH_P2_END

#define IFXFLASH_PFLASH_P2_END (IFXFLASH_PFLASH_P2_START + IFXFLASH_PFLASH_P2_SIZE - 1)

PF2 end.

Definition at line 167 of file IfxFlash_cfg.h.

◆ IFXFLASH_PFLASH_P2_SIZE

#define IFXFLASH_PFLASH_P2_SIZE (0x300000)

PF2 size.

Definition at line 171 of file IfxFlash_cfg.h.

◆ IFXFLASH_PFLASH_P2_START

#define IFXFLASH_PFLASH_P2_START (IFXFLASH_PFLASH_P1_START + IFXFLASH_PFLASH_P1_SIZE)

PF2 start.

Definition at line 175 of file IfxFlash_cfg.h.

◆ IFXFLASH_PFLASH_P3_END

#define IFXFLASH_PFLASH_P3_END (IFXFLASH_PFLASH_P3_START + IFXFLASH_PFLASH_P3_SIZE - 1)

PF3 end.

Definition at line 179 of file IfxFlash_cfg.h.

◆ IFXFLASH_PFLASH_P3_SIZE

#define IFXFLASH_PFLASH_P3_SIZE (0x100000)

PF3 size.

Definition at line 183 of file IfxFlash_cfg.h.

◆ IFXFLASH_PFLASH_P3_START

#define IFXFLASH_PFLASH_P3_START (IFXFLASH_PFLASH_P2_START + IFXFLASH_PFLASH_P2_SIZE)

PF3 start.

Definition at line 187 of file IfxFlash_cfg.h.

◆ IFXFLASH_PFLASH_PAGE_LENGTH

#define IFXFLASH_PFLASH_PAGE_LENGTH (32)

Definition at line 189 of file IfxFlash_cfg.h.

◆ IFXFLASH_PFLASH_SIZE

#define IFXFLASH_PFLASH_SIZE (0x00A00000)

p flash size

Definition at line 193 of file IfxFlash_cfg.h.

◆ IFXFLASH_PFLASH_START

#define IFXFLASH_PFLASH_START (0xa0000000)

p flash start

Definition at line 197 of file IfxFlash_cfg.h.

◆ IFXFLASH_PFLASH_WORDLINE_LENGTH

#define IFXFLASH_PFLASH_WORDLINE_LENGTH (1024)

Definition at line 199 of file IfxFlash_cfg.h.

Enumeration Type Documentation

◆ IfxFlash_FlashType

enum IfxFlash_FlashType
Enumerator
IfxFlash_FlashType_D0 | data flash #0
IfxFlash_FlashType_D1 | data flash #1
IfxFlash_FlashType_P0 | program flash #0
IfxFlash_FlashType_P1 | program flash #1
IfxFlash_FlashType_P2 | program flash #2
IfxFlash_FlashType_P3 | program flash #3
IfxFlash_FlashType_Fa | program flash array

Definition at line 207 of file IfxFlash_cfg.h.

◆ IfxFlash_UcbType

enum IfxFlash_UcbType

user configuration block type

Enumerator
IfxFlash_UcbType_ucbPflash | UCB for PFlash.
IfxFlash_UcbType_ucbDflash | UCB for DFlash.
IfxFlash_UcbType_ucbDebug | UCB for debug.
IfxFlash_UcbType_ucbRetest | UCB for Re test.

Definition at line 220 of file IfxFlash_cfg.h.

Variable Documentation

◆ IfxFlash_dFlashTableCfsLog

IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableCfsLog[IFXFLASH_DFLASH_NUM_CFS_LOG_SECTORS]

Definition at line 246 of file IfxFlash_cfg.h.

◆ IfxFlash_dFlashTableEepLog

IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableEepLog[IFXFLASH_DFLASH_NUM_LOG_SECTORS]

Definition at line 248 of file IfxFlash_cfg.h.

◆ IfxFlash_dFlashTableHsmLog

IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableHsmLog[IFXFLASH_DFLASH_NUM_HSM_LOG_SECTORS]

Definition at line 252 of file IfxFlash_cfg.h.

◆ IfxFlash_dFlashTablePhys

IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTablePhys[IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS]

Definition at line 254 of file IfxFlash_cfg.h.

◆ IfxFlash_dFlashTableUcbLog

IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableUcbLog[IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS]

Definition at line 258 of file IfxFlash_cfg.h.

◆ IfxFlash_pFlashTableLog

IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_pFlashTableLog[IFXFLASH_PFLASH_NUM_LOG_SECTORS]

Definition at line 260 of file IfxFlash_cfg.h.

◆ IfxFlash_pFlashTablePhys

IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_pFlashTablePhys[IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS]

Definition at line 262 of file IfxFlash_cfg.h.


iLLD_TC38A: IfxFlash.h File Reference

  • Flash
  • Std
Functions
IfxFlash.h File Reference
iLLD » FLASH

FLASH basic functionality. More...

#include "_Impl/IfxFlash_cfg.h"
#include "_Utilities/Ifx_Assert.h"
#include "IfxDmu_reg.h"
Include dependency graph for IfxFlash.h:

Go to the source code of this file.

Functions

IFX_INLINE void | IfxFlash_clearStatus (uint32 flash)
Performs the "Clear Status" sequence. Operation and error flags are cleared. More...
IFX_INLINE uint8 | IfxFlash_enterPageMode (uint32 pageAddr)
Performs the sequence for entering program page mode. More...
IFX_INLINE void | IfxFlash_eraseMultipleSectors (uint32 sectorAddr, uint32 numSector)
Performs the erase sequence for n sectors in program or data flash. More...
IFX_INLINE void | IfxFlash_eraseSector (uint32 sectorAddr)
Performs the erase sequence for a sector in program or data flash. More...
IFX_INLINE void | IfxFlash_eraseVerifyMultipleSectors (uint32 sectorAddr, uint32 numSector)
Performs the "Erase Verify" sequence for multiple sectors. More...
IFX_INLINE void | IfxFlash_eraseVerifySector (uint32 sectorAddr)
Performs the "Erase Verify" sequence. More...
IFX_INLINE void | IfxFlash_loadPage (uint32 pageAddr, uint32 wordL, uint32 wordU)
performs a load page sequence with a single 64bit access More...
IFX_INLINE void | IfxFlash_loadPage2X32 (uint32 pageAddr, uint32 wordL, uint32 wordU)
performs a load page sequence with two 32bit accesses More...
IFX_INLINE void | IfxFlash_resetToRead (uint32 flash)
reset to read mode More...
IFX_INLINE void | IfxFlash_resumeProtection (uint32 flash)
Performs the "Resume Protection" sequence. More...
IFX_INLINE void | IfxFlash_suspendResumeMultipleSectors (uint32 sectorAddr, uint32 numSector)
Performs the "Suspend Resume" sequence for multiple sectors. More...
IFX_INLINE void | IfxFlash_suspendResumeSector (uint32 sectorAddr)
Performs the "Suspend Resume" sequence. More...
IFX_INLINE void | IfxFlash_userContentCount (uint32 wordAddr)
The function issues command sequence for User Content count.The result of this function is dependent on the difference of the number of logic 1 bits in the selected pages at the erase-verify condition (N_dv) and at the selected control gate voltage (N_pv). Calling this function with different control gate voltages allows calculation of the Vth distribution. More...
IFX_INLINE void | IfxFlash_userMarginCount (uint32 wordAddr)
The function issues command sequence for User Margin Count. The result of this function is the number of logic 1 bits in the selected pages at the selected reference current. Calling this function with different reference currents allows calculation of the cell current distribution. More...
IFX_INLINE void | IfxFlash_userVthCount (uint32 wordAddr)
The function issues command sequence for User Vth Count.The result of this function is the number of logic 1 bits in the selected pages at the selected control gate voltage. Calling this function with different control gate voltages allows calculation of the Vth distribution. More...
IFX_INLINE void | IfxFlash_verifyErasedPage (uint32 pageAddr)
Performs the "Verify Erased Block (page)" sequence. This command verifies if one page addressed by "PA" is correctly erased, i.e. contain 0 data and ECC bits. More...
IFX_INLINE void | IfxFlash_verifyErasedWordLine (uint32 wordLineAddr)
Performs the "Verify Erased WL" sequence.This command verifies if one word line addressed by "WA" is correctly erased, i.e. contain 0 data and ECC bits. More...
IFX_INLINE uint8 | IfxFlash_waitUnbusy (uint32 flash, IfxFlash_FlashType flashType)
Polls the selected status flag in flash status register until it turns to 0. More...
IFX_INLINE void | IfxFlash_writeBurst (uint32 pageAddr)
Performs the "Write Burst" sequence, similar to write page but performs a burst transfer instead of page.Make sure the appropriate amount of data is loaded using load page command. More...
IFX_INLINE void | IfxFlash_writeBurstOnce (uint32 pageAddr)
Performs the "Write Burst once" sequence. The command starts the programming process for an aligned group of pages as the normal "Write Burst" does. But before programming it checks if the pages are erased. If the page is not erased (allowing correctable errors) the command fails with PVER and EVER. The command is only supported for PFlash. On sectors with "write-once" protection only this write command can be applied. More...
IFX_INLINE void | IfxFlash_writePage (uint32 pageAddr)
Performs the "Write Page" sequence. More...
IFX_INLINE void | IfxFlash_writePageOnce (uint32 pageAddr)
Performs the "Write Page Once" sequence, similar to write page but performs a program verify after writing. More...
IFX_EXTERN void | IfxFlash_disableWriteProtection (uint32 flash, IfxFlash_UcbType ucb, uint32 *password)
The password protection of the selected UCB (if this UCB offers this feature) is temporarily disabled. The command fails by setting PROER when any of the supplied PWs does not match. In this case until the next application reset all further calls of "Disable Protection" fail with PROER independent of the supplied password. More...
IFX_INLINE boolean | IfxFlash_waitUnbusyAll (void)
This function will wait till all the flash banks are out of busy state. More...
IFX_INLINE void | IfxFlash_enterCrankingMode (void)
Enter Flash Cranking Mode. More...
IFX_INLINE void | IfxFlash_exitCrankingMode (void)
Exit Flash Cranking Mode. More...
IFX_INLINE void | IfxFlash_enterDemandMode (void)
IFX_INLINE void | IfxFlash_exitDemandMode (void)
IFX_INLINE void | IfxFlash_enterDynamicIdleMode (void)
IFX_INLINE void | IfxFlash_exitDynamicIdleMode (void)
IFX_INLINE boolean | IfxFlash_isCrankingMode (void)
Returns if Flash is in Cranking Mode. TRUE - Flash is in Cranking Mode FALSE - Flash is not in Cranking Mode. More...
IFX_INLINE boolean | IfxFlash_isDemandMode (void)
Returns if Flash is in Demand mode or not TRUE - Flash is in Demand Mode FALSE - Flash is not in Demand Mode. More...
IFX_INLINE boolean | IfxFlash_isDynamicIdleMode (void)
Returns if Flash is in Dynamic Idle mode or not TRUE - Flash is in Dynamic Idle Mode FALSE - Flash is not in Dynamic Idle Mode. More...
IFX_INLINE void | IfxFlash_replaceLogicalSector (uint32 pageAddr)

Detailed Description

FLASH basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxFlash.h.

Function Documentation

◆ IfxFlash_enterCrankingMode()

IFX_INLINE void IfxFlash_enterCrankingMode ( void )

Enter Flash Cranking Mode.

Returns
None

Definition at line 759 of file IfxFlash.h.

◆ IfxFlash_enterDemandMode()

IFX_INLINE void IfxFlash_enterDemandMode ( void )
Returns
None

Definition at line 773 of file IfxFlash.h.

◆ IfxFlash_enterDynamicIdleMode()

IFX_INLINE void IfxFlash_enterDynamicIdleMode ( void )
Returns
None

Definition at line 787 of file IfxFlash.h.

◆ IfxFlash_exitCrankingMode()

IFX_INLINE void IfxFlash_exitCrankingMode ( void )

Exit Flash Cranking Mode.

Returns
None

Definition at line 766 of file IfxFlash.h.

◆ IfxFlash_exitDemandMode()

IFX_INLINE void IfxFlash_exitDemandMode ( void )
Returns
None

Definition at line 780 of file IfxFlash.h.

◆ IfxFlash_exitDynamicIdleMode()

IFX_INLINE void IfxFlash_exitDynamicIdleMode ( void )
Returns
None

Definition at line 794 of file IfxFlash.h.

◆ IfxFlash_isCrankingMode()

IFX_INLINE boolean IfxFlash_isCrankingMode ( void )

Returns if Flash is in Cranking Mode. TRUE - Flash is in Cranking Mode FALSE - Flash is not in Cranking Mode.

Returns
Returns if Flash is in Cranking mode or not TRUE - Flash is in Cranking Mode FALSE - Flash is not in Cranking Mode

Definition at line 801 of file IfxFlash.h.

◆ IfxFlash_isDemandMode()

IFX_INLINE boolean IfxFlash_isDemandMode ( void )

Returns if Flash is in Demand mode or not TRUE - Flash is in Demand Mode FALSE - Flash is not in Demand Mode.

Returns
Returns if Flash is in Demand mode or not TRUE - Flash is in Demand Mode FALSE - Flash is not in Demand Mode

Definition at line 807 of file IfxFlash.h.

◆ IfxFlash_isDynamicIdleMode()

IFX_INLINE boolean IfxFlash_isDynamicIdleMode ( void )

Returns if Flash is in Dynamic Idle mode or not TRUE - Flash is in Dynamic Idle Mode FALSE - Flash is not in Dynamic Idle Mode.

Returns
Returns if Flash is in Dynamic Idle mode or not TRUE - Flash is in Dynamic Idle Mode FALSE - Flash is not in Dynamic Idle Mode

Definition at line 813 of file IfxFlash.h.

◆ IfxFlash_replaceLogicalSector()

IFX_INLINE void IfxFlash_replaceLogicalSector ( uint32 pageAddr )
Parameters
pageAddr start address of page which should be programmed
Returns
None

Definition at line 819 of file IfxFlash.h.

◆ IfxFlash_waitUnbusyAll()

IFX_INLINE boolean IfxFlash_waitUnbusyAll ( void )

This function will wait till all the flash banks are out of busy state.

Returns
Return 0 on success.Success means none of the flash banks are in busy state.

Definition at line 749 of file IfxFlash.h.


iLLD_TC38A: GETH

Modules | Files
GETH
iLLD
Collaboration diagram for GETH:

Modules

Implementation
Standard Driver
GETH Pin Mapping
How to use the Geth Eth Interface driver?
ETH

Files

file | IfxGeth_cfg.h
GETH on-chip implementation data.
file | IfxGeth_PinMap.c
GETH I/O map.
file | IfxGeth_PinMap.h
GETH I/O map.
file | IfxGeth_Eth.h
GETH ETH details.
file | IfxGeth.h
GETH basic functionality.

Detailed Description


iLLD_TC38A: Implementation

Modules
Implementation
iLLD » GETH
Collaboration diagram for Implementation:

Modules

Enumerations

Detailed Description


iLLD_TC38A: Enumerations

Enumerations
Enumerations
iLLD » GETH » Implementation
Collaboration diagram for Enumerations:

Enumerations

enum IfxGeth_Index {
IfxGeth_Index_none = -1,
IfxGeth_Index_0 = 0
}
List of the available Geth instances. More...

Detailed Description

Enumeration Type Documentation

◆ IfxGeth_Index

enum IfxGeth_Index

List of the available Geth instances.

Enumerator
IfxGeth_Index_none | Not Selected.
IfxGeth_Index_0 | GETH index 0.

Definition at line 104 of file IfxGeth_cfg.h.


iLLD_TC38A: Standard Driver

Modules
Standard Driver
iLLD » GETH
Collaboration diagram for Standard Driver:

Modules

Enumerations
MAC Functions
Module Functions
MTL Functions
DMA Functions
DataStructures
Unions

Detailed Description


iLLD_TC38A: Enumerations

Enumerations
Enumerations
iLLD » GETH » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxGeth_DmaBurstLength {
IfxGeth_DmaBurstLength_0 = 0,
IfxGeth_DmaBurstLength_1 = 1,
IfxGeth_DmaBurstLength_2 = 2,
IfxGeth_DmaBurstLength_4 = 4,
IfxGeth_DmaBurstLength_8 = 8,
IfxGeth_DmaBurstLength_16 = 16,
IfxGeth_DmaBurstLength_32 = 32
}
Programmable burst length of DMA channels
Definition in DMA_CHi_TX_CONTROL.B.PBL and DMA_CHi_RX_CONTROL.B.PBL. More...
enum IfxGeth_DmaChannel {
IfxGeth_DmaChannel_0,
IfxGeth_DmaChannel_1,
IfxGeth_DmaChannel_2,
IfxGeth_DmaChannel_3
}
DMA channel Index. More...
enum IfxGeth_DmaInterruptFlag {
IfxGeth_DmaInterruptFlag_transmitInterrupt = 0,
IfxGeth_DmaInterruptFlag_transmitStopped = 1,
IfxGeth_DmaInterruptFlag_transmitBufferUnavailable = 2,
IfxGeth_DmaInterruptFlag_receiveInterrupt = 6,
IfxGeth_DmaInterruptFlag_receiveBufferUnavailable = 7,
IfxGeth_DmaInterruptFlag_receiveStopped = 8,
IfxGeth_DmaInterruptFlag_receiveWatchdogTimeout = 9,
IfxGeth_DmaInterruptFlag_earlyTransmitInterrupt = 10,
IfxGeth_DmaInterruptFlag_earlyReceiveInterrupt = 11,
IfxGeth_DmaInterruptFlag_fatalBusError = 12,
IfxGeth_DmaInterruptFlag_contextDescriptorError = 13,
IfxGeth_DmaInterruptFlag_abnormalInterruptSummary = 14,
IfxGeth_DmaInterruptFlag_normalInterruptSummary = 15
}
DMA interrupt flags. More...
enum IfxGeth_LineSpeed {
IfxGeth_LineSpeed_10Mbps,
IfxGeth_LineSpeed_100Mbps,
IfxGeth_LineSpeed_1000Mbps,
IfxGeth_LineSpeed_2500Mbps
}
Ethernet line speed. More...
enum IfxGeth_MtlInterruptFlag {
IfxGeth_MtlInterruptFlag_txQueueUnderflow = 0,
IfxGeth_MtlInterruptFlag_averageBitsPerSlot = 1,
IfxGeth_MtlInterruptFlag_rxQueueOverflow = 16
}
MTL interrupt flags. More...
enum IfxGeth_MtlQueue {
IfxGeth_MtlQueue_0,
IfxGeth_MtlQueue_1,
IfxGeth_MtlQueue_2,
IfxGeth_MtlQueue_3
}
MTL Queue ID. More...
enum IfxGeth_PhyInterfaceMode {
IfxGeth_PhyInterfaceMode_mii = 0,
IfxGeth_PhyInterfaceMode_rgmii = 1,
IfxGeth_PhyInterfaceMode_rmii = 4
}
External Phy Interface RMII Mode. More...
enum IfxGeth_PreambleLength {
IfxGeth_PreambleLength_7Bytes,
IfxGeth_PreambleLength_5Bytes,
IfxGeth_PreambleLength_3Bytes
}
Preamble Length for Transmit packets
Definition in MAC_CONFIGURATION.B.PRELEN. More...
enum IfxGeth_QueueSize {
IfxGeth_QueueSize_256Bytes,
IfxGeth_QueueSize_512Bytes,
IfxGeth_QueueSize_768Bytes,
IfxGeth_QueueSize_1024Bytes,
IfxGeth_QueueSize_1280Bytes,
IfxGeth_QueueSize_1536Bytes,
IfxGeth_QueueSize_1792Bytes,
IfxGeth_QueueSize_2048Bytes,
IfxGeth_QueueSize_2304Bytes,
IfxGeth_QueueSize_2560Bytes,
IfxGeth_QueueSize_2816Bytes,
IfxGeth_QueueSize_3072Bytes,
IfxGeth_QueueSize_3328Bytes,
IfxGeth_QueueSize_3584Bytes,
IfxGeth_QueueSize_3840Bytes,
IfxGeth_QueueSize_4096Bytes,
IfxGeth_QueueSize_4352Bytes,
IfxGeth_QueueSize_4608Bytes,
IfxGeth_QueueSize_4864Bytes,
IfxGeth_QueueSize_5120Bytes,
IfxGeth_QueueSize_5376Bytes,
IfxGeth_QueueSize_5632Bytes,
IfxGeth_QueueSize_5888Bytes,
IfxGeth_QueueSize_6144Bytes,
IfxGeth_QueueSize_6400Bytes,
IfxGeth_QueueSize_6656Bytes,
IfxGeth_QueueSize_6912Bytes,
IfxGeth_QueueSize_7168Bytes,
IfxGeth_QueueSize_7424Bytes,
IfxGeth_QueueSize_7680Bytes,
IfxGeth_QueueSize_7936Bytes,
IfxGeth_QueueSize_8192Bytes
}
Tx/RX Queue size in blocks of 256 bytes
Definition in MTL_TXQi_OPERATION_MODE.B.TQS and MTL_RXQi_OPERATION_MODE.B.RQS. More...
enum IfxGeth_RxArbitrationAlgorithm {
IfxGeth_RxArbitrationAlgorithm_sp = 0,
IfxGeth_RxArbitrationAlgorithm_wsp = 1
}
Receive Arbitration Algorithm for Rx Queues
Definition in MTL_OPERATION_MODE.B.RAA. More...
enum IfxGeth_RxDmaChannel {
IfxGeth_RxDmaChannel_0,
IfxGeth_RxDmaChannel_1,
IfxGeth_RxDmaChannel_2,
IfxGeth_RxDmaChannel_3
}
Rx DMA channel. More...
enum IfxGeth_RxMtlQueue {
IfxGeth_RxMtlQueue_0,
IfxGeth_RxMtlQueue_1,
IfxGeth_RxMtlQueue_2,
IfxGeth_RxMtlQueue_3
}
Rx MTL Queue ID. More...
enum IfxGeth_ServiceRequest {
IfxGeth_ServiceRequest_0,
IfxGeth_ServiceRequest_1,
IfxGeth_ServiceRequest_2,
IfxGeth_ServiceRequest_3,
IfxGeth_ServiceRequest_4,
IfxGeth_ServiceRequest_5,
IfxGeth_ServiceRequest_6,
IfxGeth_ServiceRequest_7,
IfxGeth_ServiceRequest_8,
IfxGeth_ServiceRequest_9
}
Geth service request index. More...
enum IfxGeth_TxDmaChannel {
IfxGeth_TxDmaChannel_0,
IfxGeth_TxDmaChannel_1,
IfxGeth_TxDmaChannel_2,
IfxGeth_TxDmaChannel_3
}
Tx DMA channel. More...
enum IfxGeth_TxMtlQueue {
IfxGeth_TxMtlQueue_0,
IfxGeth_TxMtlQueue_1,
IfxGeth_TxMtlQueue_2,
IfxGeth_TxMtlQueue_3
}
Tx MTL Queue ID. More...
enum IfxGeth_TxSchedulingAlgorithm {
IfxGeth_TxSchedulingAlgorithm_wrr = 0,
IfxGeth_TxSchedulingAlgorithm_sp = 3
}
Tx Scheduling Algorithm for Tx Queues
Definition in MTL_OPERATION_MODE.B.SCHALG. More...

Detailed Description

Enumeration Type Documentation

◆ IfxGeth_DmaBurstLength

enum IfxGeth_DmaBurstLength

Programmable burst length of DMA channels
Definition in DMA_CHi_TX_CONTROL.B.PBL and DMA_CHi_RX_CONTROL.B.PBL.

Enumerator
IfxGeth_DmaBurstLength_0 | maximum burst length 0
IfxGeth_DmaBurstLength_1 | maximum burst length 1
IfxGeth_DmaBurstLength_2 | maximum burst length 2
IfxGeth_DmaBurstLength_4 | maximum burst length 4
IfxGeth_DmaBurstLength_8 | maximum burst length 8
IfxGeth_DmaBurstLength_16 | maximum burst length 16
IfxGeth_DmaBurstLength_32 | maximum burst length 32

Definition at line 85 of file IfxGeth.h.

◆ IfxGeth_DmaChannel

enum IfxGeth_DmaChannel

DMA channel Index.

Enumerator
IfxGeth_DmaChannel_0 | Dma Channel 0.
IfxGeth_DmaChannel_1 | Dma Channel 1.
IfxGeth_DmaChannel_2 | Dma Channel 2.
IfxGeth_DmaChannel_3 | Dma Channel 3.

Definition at line 98 of file IfxGeth.h.

◆ IfxGeth_DmaInterruptFlag

enum IfxGeth_DmaInterruptFlag

DMA interrupt flags.

Enumerator
IfxGeth_DmaInterruptFlag_transmitInterrupt | Transmit Interrupt.
IfxGeth_DmaInterruptFlag_transmitStopped | Transmit Stopped.
IfxGeth_DmaInterruptFlag_transmitBufferUnavailable | Trasmit Buffer Unavailable.
IfxGeth_DmaInterruptFlag_receiveInterrupt | Receive Interrupt.
IfxGeth_DmaInterruptFlag_receiveBufferUnavailable | Receive Buffer Unavailable.
IfxGeth_DmaInterruptFlag_receiveStopped | Receive Stopped.
IfxGeth_DmaInterruptFlag_receiveWatchdogTimeout | Receive Watchdog Timeout.
IfxGeth_DmaInterruptFlag_earlyTransmitInterrupt | Early Transmit Interrupt.
IfxGeth_DmaInterruptFlag_earlyReceiveInterrupt | Early Receive Interrupt.
IfxGeth_DmaInterruptFlag_fatalBusError | Fatal Bus Error.
IfxGeth_DmaInterruptFlag_contextDescriptorError | Context Descriptor Error.
IfxGeth_DmaInterruptFlag_abnormalInterruptSummary | Abnormal Interrupt Summary.
IfxGeth_DmaInterruptFlag_normalInterruptSummary | Normal Interrupt Summary.

Definition at line 108 of file IfxGeth.h.

◆ IfxGeth_LineSpeed

enum IfxGeth_LineSpeed

Ethernet line speed.

Enumerator
IfxGeth_LineSpeed_10Mbps | 10 Mbps
IfxGeth_LineSpeed_100Mbps | 100 Mbps
IfxGeth_LineSpeed_1000Mbps | 1000 Mbps
IfxGeth_LineSpeed_2500Mbps | 2500 Mbps

Definition at line 127 of file IfxGeth.h.

◆ IfxGeth_MtlInterruptFlag

enum IfxGeth_MtlInterruptFlag

MTL interrupt flags.

Enumerator
IfxGeth_MtlInterruptFlag_txQueueUnderflow | Transmit Queue Underflow.
IfxGeth_MtlInterruptFlag_averageBitsPerSlot | Average Bits Per Slot.
IfxGeth_MtlInterruptFlag_rxQueueOverflow | Receive Queue Overflow.

Definition at line 137 of file IfxGeth.h.

◆ IfxGeth_MtlQueue

enum IfxGeth_MtlQueue

MTL Queue ID.

Enumerator
IfxGeth_MtlQueue_0 | Mtl Queue 0.
IfxGeth_MtlQueue_1 | Mtl Queue 1.
IfxGeth_MtlQueue_2 | Mtl Queue 2.
IfxGeth_MtlQueue_3 | Mtl Queue 3.

Definition at line 146 of file IfxGeth.h.

◆ IfxGeth_PhyInterfaceMode

enum IfxGeth_PhyInterfaceMode

External Phy Interface RMII Mode.

Enumerator
IfxGeth_PhyInterfaceMode_mii | MII mode.
IfxGeth_PhyInterfaceMode_rgmii | RGMII mode.
IfxGeth_PhyInterfaceMode_rmii | RMII mode.

Definition at line 156 of file IfxGeth.h.

◆ IfxGeth_PreambleLength

enum IfxGeth_PreambleLength

Preamble Length for Transmit packets
Definition in MAC_CONFIGURATION.B.PRELEN.

Enumerator
IfxGeth_PreambleLength_7Bytes | 7 bytes of preamble
IfxGeth_PreambleLength_5Bytes | 5 bytes of preamble
IfxGeth_PreambleLength_3Bytes | 3 bytes of preamble

Definition at line 166 of file IfxGeth.h.

◆ IfxGeth_QueueSize

enum IfxGeth_QueueSize

Tx/RX Queue size in blocks of 256 bytes
Definition in MTL_TXQi_OPERATION_MODE.B.TQS and MTL_RXQi_OPERATION_MODE.B.RQS.

Enumerator
IfxGeth_QueueSize_256Bytes | 256Bytes
IfxGeth_QueueSize_512Bytes | 512Bytes
IfxGeth_QueueSize_768Bytes | 768Bytes
IfxGeth_QueueSize_1024Bytes | 1024Bytes
IfxGeth_QueueSize_1280Bytes | 1280Bytes
IfxGeth_QueueSize_1536Bytes | 1536Bytes
IfxGeth_QueueSize_1792Bytes | 1792Bytes
IfxGeth_QueueSize_2048Bytes | 2048Bytes
IfxGeth_QueueSize_2304Bytes | 2304Bytes
IfxGeth_QueueSize_2560Bytes | 2560Bytes
IfxGeth_QueueSize_2816Bytes | 2816Bytes
IfxGeth_QueueSize_3072Bytes | 3072Bytes
IfxGeth_QueueSize_3328Bytes | 3328Bytes
IfxGeth_QueueSize_3584Bytes | 3584Bytes
IfxGeth_QueueSize_3840Bytes | 3840Bytes
IfxGeth_QueueSize_4096Bytes | 4096Bytes
IfxGeth_QueueSize_4352Bytes | 4352Bytes
IfxGeth_QueueSize_4608Bytes | 4608Bytes
IfxGeth_QueueSize_4864Bytes | 4864Bytes
IfxGeth_QueueSize_5120Bytes | 5120Bytes
IfxGeth_QueueSize_5376Bytes | 5376Bytes
IfxGeth_QueueSize_5632Bytes | 5632Bytes
IfxGeth_QueueSize_5888Bytes | 5888Bytes
IfxGeth_QueueSize_6144Bytes | 6144Bytes
IfxGeth_QueueSize_6400Bytes | 6400Bytes
IfxGeth_QueueSize_6656Bytes | 6656Bytes
IfxGeth_QueueSize_6912Bytes | 6912Bytes
IfxGeth_QueueSize_7168Bytes | 7168Bytes
IfxGeth_QueueSize_7424Bytes | 7424Bytes
IfxGeth_QueueSize_7680Bytes | 7680Bytes
IfxGeth_QueueSize_7936Bytes | 7936Bytes
IfxGeth_QueueSize_8192Bytes | 8192Bytes

Definition at line 176 of file IfxGeth.h.

◆ IfxGeth_RxArbitrationAlgorithm

enum IfxGeth_RxArbitrationAlgorithm

Receive Arbitration Algorithm for Rx Queues
Definition in MTL_OPERATION_MODE.B.RAA.

Enumerator
IfxGeth_RxArbitrationAlgorithm_sp | Strict Priority.
IfxGeth_RxArbitrationAlgorithm_wsp | Weighted Strict Priority.

Definition at line 215 of file IfxGeth.h.

◆ IfxGeth_RxDmaChannel

enum IfxGeth_RxDmaChannel

Rx DMA channel.

Enumerator
IfxGeth_RxDmaChannel_0 | Rx Dma Channel 0.
IfxGeth_RxDmaChannel_1 | Rx Dma Channel 1.
IfxGeth_RxDmaChannel_2 | Rx Dma Channel 2.
IfxGeth_RxDmaChannel_3 | Rx Dma Channel 3.

Definition at line 223 of file IfxGeth.h.

◆ IfxGeth_RxMtlQueue

enum IfxGeth_RxMtlQueue

Rx MTL Queue ID.

Enumerator
IfxGeth_RxMtlQueue_0 | Rx Queue 0.
IfxGeth_RxMtlQueue_1 | Rx Queue 1.
IfxGeth_RxMtlQueue_2 | Rx Queue 2.
IfxGeth_RxMtlQueue_3 | Rx Queue 3.

Definition at line 233 of file IfxGeth.h.

◆ IfxGeth_ServiceRequest

enum IfxGeth_ServiceRequest

Geth service request index.

Enumerator
IfxGeth_ServiceRequest_0 | Service Request SR0.
IfxGeth_ServiceRequest_1 | Service Request SR1.
IfxGeth_ServiceRequest_2 | Service Request SR2.
IfxGeth_ServiceRequest_3 | Service Request SR3.
IfxGeth_ServiceRequest_4 | Service Request SR4.
IfxGeth_ServiceRequest_5 | Service Request SR5.
IfxGeth_ServiceRequest_6 | Service Request SR6.
IfxGeth_ServiceRequest_7 | Service Request SR7.
IfxGeth_ServiceRequest_8 | Service Request SR8.
IfxGeth_ServiceRequest_9 | Service Request SR9.

Definition at line 243 of file IfxGeth.h.

◆ IfxGeth_TxDmaChannel

enum IfxGeth_TxDmaChannel

Tx DMA channel.

Enumerator
IfxGeth_TxDmaChannel_0 | Tx Dma Channel 0.
IfxGeth_TxDmaChannel_1 | Tx Dma Channel 1.
IfxGeth_TxDmaChannel_2 | Tx Dma Channel 2.
IfxGeth_TxDmaChannel_3 | Tx Dma Channel 3.

Definition at line 259 of file IfxGeth.h.

◆ IfxGeth_TxMtlQueue

enum IfxGeth_TxMtlQueue

Tx MTL Queue ID.

Enumerator
IfxGeth_TxMtlQueue_0 | Tx Queue 0.
IfxGeth_TxMtlQueue_1 | Tx Queue 1.
IfxGeth_TxMtlQueue_2 | Tx Queue 2.
IfxGeth_TxMtlQueue_3 | Tx Queue 3.

Definition at line 269 of file IfxGeth.h.

◆ IfxGeth_TxSchedulingAlgorithm

enum IfxGeth_TxSchedulingAlgorithm

Tx Scheduling Algorithm for Tx Queues
Definition in MTL_OPERATION_MODE.B.SCHALG.

Enumerator
IfxGeth_TxSchedulingAlgorithm_wrr | WRR Algorithm.
IfxGeth_TxSchedulingAlgorithm_sp | Strict Priority Algorithm.

Definition at line 280 of file IfxGeth.h.


iLLD_TC38A: MAC Functions

Functions
MAC Functions
iLLD » GETH » Standard Driver
Collaboration diagram for MAC Functions:

Functions

IFX_INLINE void | IfxGeth_mac_disableReceiver (Ifx_GETH *gethSFR)
Disables the Receiver of MAC Core. More...
IFX_INLINE void | IfxGeth_mac_disableTransmitter (Ifx_GETH *gethSFR)
Disables the Trasnmitter of MAC Core. More...
IFX_INLINE void | IfxGeth_mac_enableReceiver (Ifx_GETH *gethSFR)
Enables the Receiver of MAC Core. More...
IFX_INLINE void | IfxGeth_mac_enableTransmitter (Ifx_GETH *gethSFR)
Enables the Trasnmitter of MAC Core. More...
IFX_INLINE void | IfxGeth_mac_setAllMulticastPassing (Ifx_GETH *gethSFR, boolean enabled)
Enables / Disables Passing of All Multicast packets. More...
IFX_INLINE void | IfxGeth_mac_setCrcChecking (Ifx_GETH *gethSFR, boolean enabled)
Enables / Disables CRC Checking for Received Packets. More...
IFX_INLINE void | IfxGeth_mac_setCrcStripping (Ifx_GETH *gethSFR, boolean acsEnabled, boolean cstEnabled)
Enables/Disables the Automatic Pad or CRC Stripping for frames less than 1536 bytes and
CRC stripping for Type packets. More...
IFX_INLINE void | IfxGeth_mac_setDuplexMode (Ifx_GETH *gethSFR, IfxGeth_DuplexMode mode)
Sets the Duplex Mode. More...
IFX_INLINE void | IfxGeth_mac_setPreambleLength (Ifx_GETH *gethSFR, IfxGeth_PreambleLength length)
Sets the Preamble Length for Transmit packets. More...
IFX_INLINE void | IfxGeth_mac_setPromiscuousMode (Ifx_GETH *gethSFR, boolean enabled)
Enables / Disables Promiscuous Mode. More...
IFX_INLINE void | IfxGeth_mac_setVlanPriorityQueueRouting (Ifx_GETH *gethSFR, IfxGeth_RxDmaChannel channel, uint8 priorities)
Set the priorities for Rx queues for mapping tagged packets. More...
IFX_INLINE void | IfxGeth_mac_setQueueVlanInsertion (Ifx_GETH *gethSFR, boolean enable)
Enable / Disable Queue Insertion. More...
IFX_EXTERN void | IfxGeth_mac_setLineSpeed (Ifx_GETH *gethSFR, IfxGeth_LineSpeed speed)
Sets the Ethernet Line Speed. More...
IFX_EXTERN void | IfxGeth_mac_setMacAddress (Ifx_GETH *gethSFR, uint8 *macAddress)
Sets the MAC Address. More...
IFX_EXTERN boolean | IfxGeth_mac_writeQueueVlanTag (Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId, uint16 vLanTag)
Writes to Queue Vlan tag. More...
IFX_EXTERN boolean | IfxGeth_mac_readQueueVlanTag (Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId, uint16 *const vLanTag)
Reads from Queue Vlan tag. More...

Detailed Description

Function Documentation

◆ IfxGeth_mac_disableReceiver()

IFX_INLINE void IfxGeth_mac_disableReceiver ( Ifx_GETH * gethSFR )

Disables the Receiver of MAC Core.

Parameters
gethSFR Pointer to GETH register base address
Returns
None

Definition at line 1452 of file IfxGeth.h.

◆ IfxGeth_mac_disableTransmitter()

IFX_INLINE void IfxGeth_mac_disableTransmitter ( Ifx_GETH * gethSFR )

Disables the Trasnmitter of MAC Core.

Parameters
gethSFR Pointer to GETH register base address
Returns
None

Definition at line 1458 of file IfxGeth.h.

Referenced by IfxGeth_Eth_stopTransmitters().

◆ IfxGeth_mac_enableReceiver()

IFX_INLINE void IfxGeth_mac_enableReceiver ( Ifx_GETH * gethSFR )

Enables the Receiver of MAC Core.

Parameters
gethSFR Pointer to GETH register base address
Returns
None

Definition at line 1464 of file IfxGeth.h.

Referenced by IfxGeth_Eth_startReceiver(), and IfxGeth_Eth_startReceivers().

◆ IfxGeth_mac_enableTransmitter()

IFX_INLINE void IfxGeth_mac_enableTransmitter ( Ifx_GETH * gethSFR )

Enables the Trasnmitter of MAC Core.

Parameters
gethSFR Pointer to GETH register base address
Returns
None

Definition at line 1470 of file IfxGeth.h.

Referenced by IfxGeth_Eth_startTransmitter(), and IfxGeth_Eth_startTransmitters().

◆ IfxGeth_mac_readQueueVlanTag()

IFX_EXTERN boolean IfxGeth_mac_readQueueVlanTag | ( | Ifx_GETH * | gethSFR,
 |  | IfxGeth_MtlQueue | queueId,
 |  | uint16 *const | vLanTag
 | ) |  |

Reads from Queue Vlan tag.

Parameters
gethSFR | Pointer to GETH register base address
queueId | Queue Index
const | vLanTag VLAN Tag
Returns
TRUE if read was successfull

Definition at line 540 of file IfxGeth.c.

◆ IfxGeth_mac_setAllMulticastPassing()

IFX_INLINE void IfxGeth_mac_setAllMulticastPassing | ( | Ifx_GETH * | gethSFR,
 |  | boolean | enabled
 | ) |  |

Enables / Disables Passing of All Multicast packets.

Parameters
gethSFR | Pointer to GETH register base address
enabled | Pass All Multicast enable / disable
Returns
None

Definition at line 1476 of file IfxGeth.h.

Referenced by IfxGeth_Eth_configureMacCore().

◆ IfxGeth_mac_setCrcChecking()

IFX_INLINE void IfxGeth_mac_setCrcChecking | ( | Ifx_GETH * | gethSFR,
 |  | boolean | enabled
 | ) |  |

Enables / Disables CRC Checking for Received Packets.

Parameters
gethSFR | Pointer to GETH register base address
enabled | CRC Checking for Received Packets enable / disable
Returns
None

Definition at line 1482 of file IfxGeth.h.

Referenced by IfxGeth_Eth_configureMacCore().

◆ IfxGeth_mac_setCrcStripping()

IFX_INLINE void IfxGeth_mac_setCrcStripping | ( | Ifx_GETH * | gethSFR,
 |  | boolean | acsEnabled,
 |  | boolean | cstEnabled
 | ) |  |

Enables/Disables the Automatic Pad or CRC Stripping for frames less than 1536 bytes and
CRC stripping for Type packets.

Parameters
gethSFR | Pointer to GETH register base address
acsEnabled | Automatic Pad or CRC Stripping enable/disable
cstEnabled | CRC Stripping for Type packets enable/disable
Returns
None

Definition at line 1488 of file IfxGeth.h.

Referenced by IfxGeth_Eth_configureMacCore().

◆ IfxGeth_mac_setDuplexMode()

IFX_INLINE void IfxGeth_mac_setDuplexMode | ( | Ifx_GETH * | gethSFR,
 |  | IfxGeth_DuplexMode | mode
 | ) |  |

Sets the Duplex Mode.

Parameters
gethSFR | Pointer to GETH register base address
mode | Duplex Mode
Returns
None

Definition at line 1495 of file IfxGeth.h.

Referenced by IfxGeth_Eth_configureMacCore().

◆ IfxGeth_mac_setLineSpeed()

IFX_EXTERN void IfxGeth_mac_setLineSpeed | ( | Ifx_GETH * | gethSFR,
 |  | IfxGeth_LineSpeed | speed
 | ) |  |

Sets the Ethernet Line Speed.

Parameters
gethSFR | Pointer to GETH register base address
speed | Ethernet Line Speed
Returns
None

Definition at line 67 of file IfxGeth.c.

Referenced by IfxGeth_Eth_configureMacCore().

◆ IfxGeth_mac_setMacAddress()

IFX_EXTERN void IfxGeth_mac_setMacAddress | ( | Ifx_GETH * | gethSFR,
 |  | uint8 * | macAddress
 | ) |  |

Sets the MAC Address.

Parameters
gethSFR | Pointer to GETH register base address
macAddress | MAC Address
Returns
None

Definition at line 93 of file IfxGeth.c.

Referenced by IfxGeth_Eth_configureMacCore().

◆ IfxGeth_mac_setPreambleLength()

IFX_INLINE void IfxGeth_mac_setPreambleLength | ( | Ifx_GETH * | gethSFR,
 |  | IfxGeth_PreambleLength | length
 | ) |  |

Sets the Preamble Length for Transmit packets.

Parameters
gethSFR | Pointer to GETH register base address
length | Preamble Length for Transmit packets
Returns
None

Definition at line 1507 of file IfxGeth.h.

Referenced by IfxGeth_Eth_configureMacCore().

◆ IfxGeth_mac_setPromiscuousMode()

IFX_INLINE void IfxGeth_mac_setPromiscuousMode | ( | Ifx_GETH * | gethSFR,
 |  | boolean | enabled
 | ) |  |

Enables / Disables Promiscuous Mode.

Parameters
gethSFR | Pointer to GETH register base address
enabled | Promiscuous Mode enable / disable
Returns
None

Definition at line 1513 of file IfxGeth.h.

Referenced by IfxGeth_Eth_configureMacCore().

◆ IfxGeth_mac_setQueueVlanInsertion()

IFX_INLINE void IfxGeth_mac_setQueueVlanInsertion | ( | Ifx_GETH * | gethSFR,
 |  | boolean | enable
 | ) |  |

Enable / Disable Queue Insertion.

Parameters
gethSFR | Pointer to GETH register base address
enable | config parameter TRUE: enabled/ FALSE: disabled
Returns
None

Definition at line 1600 of file IfxGeth.h.

◆ IfxGeth_mac_setVlanPriorityQueueRouting()

IFX_INLINE void IfxGeth_mac_setVlanPriorityQueueRouting | ( | Ifx_GETH * | gethSFR,
 |  | IfxGeth_RxDmaChannel | channel,
 |  | uint8 | priorities
 | ) |  |

Set the priorities for Rx queues for mapping tagged packets.

Parameters
gethSFR | Pointer to GETH register base address
channel | Rx DMA channel
priorities | Rx queue priority
Returns
None

Definition at line 1555 of file IfxGeth.h.

◆ IfxGeth_mac_writeQueueVlanTag()

IFX_EXTERN boolean IfxGeth_mac_writeQueueVlanTag | ( | Ifx_GETH * | gethSFR,
 |  | IfxGeth_MtlQueue | queueId,
 |  | uint16 | vLanTag
 | ) |  |

Writes to Queue Vlan tag.

Parameters
gethSFR | Pointer to GETH register base address
queueId | Queue Index
vLanTag | VLAN Tag
Returns
TRUE if write was successfull

Definition at line 515 of file IfxGeth.c.


iLLD_TC38A: Module Functions

Functions
Module Functions
iLLD » GETH » Standard Driver
Collaboration diagram for Module Functions:

Functions

IFX_INLINE boolean | IfxGeth_isModuleEnabled (Ifx_GETH *gethSFR)
Returns the status of whether clock for GETH module is enabled or diabled. More...
IFX_INLINE void | IfxGeth_setPhyInterfaceMode (Ifx_GETH *gethSFR, IfxGeth_PhyInterfaceMode mode)
Sets the External Phy Interface mode. More...
IFX_EXTERN void | IfxGeth_disableModule (Ifx_GETH *gethSFR)
Disables the clock for GETH module. More...
IFX_EXTERN void | IfxGeth_enableModule (Ifx_GETH *gethSFR)
Enables the clock for GETH module. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxGeth_getSrcPointer (Ifx_GETH *gethSFR, IfxGeth_ServiceRequest serviceRequest)
Returns the Src Pointer of the selected GETH service request node. More...
IFX_EXTERN void | IfxGeth_resetModule (Ifx_GETH *gethSFR)
resets Ethernet kernel More...
IFX_EXTERN IfxGeth_Index | IfxGeth_getIndex (Ifx_GETH *geth)
API to get the resource index of the GETH specified. More...
IFX_EXTERN Ifx_GETH * | IfxGeth_getAddress (IfxGeth_Index geth)
Get the address of the specified GETH resource index. More...

Detailed Description

Function Documentation

◆ IfxGeth_disableModule()

IFX_EXTERN void IfxGeth_disableModule ( Ifx_GETH * gethSFR )

Disables the clock for GETH module.

Parameters
gethSFR Pointer to GETH register base address
Returns
None

Definition at line 36 of file IfxGeth.c.

◆ IfxGeth_enableModule()

IFX_EXTERN void IfxGeth_enableModule ( Ifx_GETH * gethSFR )

Enables the clock for GETH module.

Parameters
gethSFR Pointer to GETH register base address
Returns
None

Definition at line 45 of file IfxGeth.c.

Referenced by IfxGeth_Eth_initModule().

◆ IfxGeth_getAddress()

IFX_EXTERN Ifx_GETH* IfxGeth_getAddress ( IfxGeth_Index geth )

Get the address of the specified GETH resource index.

Parameters
geth Module index of the GETH
Returns
GETH module register address

Definition at line 498 of file IfxGeth.c.

◆ IfxGeth_getIndex()

IFX_EXTERN IfxGeth_Index IfxGeth_getIndex ( Ifx_GETH * geth )

API to get the resource index of the GETH specified.

Parameters
geth Pointer to Geth register
Returns
geth resource index

Definition at line 478 of file IfxGeth.c.

Referenced by IfxGeth_Eth_initModuleConfig().

◆ IfxGeth_getSrcPointer()

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxGeth_getSrcPointer | ( | Ifx_GETH * | gethSFR,
 |  | IfxGeth_ServiceRequest | serviceRequest
 | ) |  |

Returns the Src Pointer of the selected GETH service request node.

Parameters
gethSFR | Pointer to GETH register base address
serviceRequest | Service Request number
Returns
pointer to Src register

Definition at line 60 of file IfxGeth.c.

Referenced by IfxGeth_Eth_configureDMA(), and IfxGeth_Eth_configureMTL().

◆ IfxGeth_isModuleEnabled()

IFX_INLINE boolean IfxGeth_isModuleEnabled ( Ifx_GETH * gethSFR )

Returns the status of whether clock for GETH module is enabled or diabled.

Parameters
gethSFR Pointer to GETH register base address
Returns
Status:
TRUE : if module is enabled
FALSE : if module is disabled

Definition at line 1446 of file IfxGeth.h.

Referenced by IfxGeth_enableModule().

◆ IfxGeth_resetModule()

IFX_EXTERN void IfxGeth_resetModule ( Ifx_GETH * gethSFR )

resets Ethernet kernel

Parameters
gethSFR Pointer to GETH register base address
Returns
None

Definition at line 365 of file IfxGeth.c.

Referenced by IfxGeth_Eth_initModule().

◆ IfxGeth_setPhyInterfaceMode()

IFX_INLINE void IfxGeth_setPhyInterfaceMode | ( | Ifx_GETH * | gethSFR,
 |  | IfxGeth_PhyInterfaceMode | mode
 | ) |  |

Sets the External Phy Interface mode.

Parameters
gethSFR | Pointer to GETH register base address
mode | PHY Interface Mode (MII/RGMII/RMII)
Returns
None

Definition at line 1549 of file IfxGeth.h.

Referenced by IfxGeth_Eth_initModule().


iLLD_TC38A: MTL Functions

Functions
MTL Functions
iLLD » GETH » Standard Driver
Collaboration diagram for MTL Functions:

Functions

IFX_INLINE void | IfxGeth_mtl_enableRxQueue (Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId)
Enables the selected Rx Queue. More...
IFX_INLINE void | IfxGeth_mtl_setRxArbitrationAlgorithm (Ifx_GETH *gethSFR, IfxGeth_RxArbitrationAlgorithm arbitrationAlgorithm)
sets the Rx Arbitration algorithm More...
IFX_INLINE void | IfxGeth_mtl_setRxQueueDmaChannelMapping (Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId, IfxGeth_RxDmaChannel dmaChannel)
Sets the selected DMA Channel mapping for the selected Rx Queue. More...
IFX_INLINE void | IfxGeth_mtl_setRxQueueForDaBasedDmaChannel (Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId, boolean enabled)
Sets the selected Rx Queue for DA based DMA channel. More...
IFX_INLINE void | IfxGeth_mtl_setTxSchedulingAlgorithm (Ifx_GETH *gethSFR, IfxGeth_TxSchedulingAlgorithm schedulingAlgorithm)
sets the Tx Scheduling algorithm More...
IFX_INLINE void | IfxGeth_mtl_enableUnicastFilterFailQueuing (Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId)
Enable and set queue ID to route packets failing unicast filter. More...
IFX_INLINE void | IfxGeth_mtl_disableUnicastFilterFailQueuing (Ifx_GETH *gethSFR)
Disable queuing of packets failing unicast filtering. More...
IFX_INLINE void | IfxGeth_mtl_enableMulticastFilterFailQueuing (Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId)
Enable and set queue ID to route packets failing multicast filter. More...
IFX_INLINE void | IfxGeth_mtl_disableMulticastFilterFailQueuing (Ifx_GETH *gethSFR)
Disable queuing of packets failing multicast filtering. More...
IFX_INLINE void | IfxGeth_mtl_enableVlanFilterFailQueuing (Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId)
Enable and set queue ID to route packets failing VLAN tag filter. More...
IFX_INLINE void | IfxGeth_mtl_disableVlanFilterFailQueuing (Ifx_GETH *gethSFR)
Disable queuing of packets failing VLAN tag filtering. More...
IFX_EXTERN void | IfxGeth_mtl_clearAllInterruptFlags (Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId)
Clears all the Mtl interrupt flags. More...
IFX_EXTERN void | IfxGeth_mtl_clearInterruptFlag (Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId, IfxGeth_MtlInterruptFlag flag)
Clears the selected Mtl interrupt flag. More...
IFX_EXTERN void | IfxGeth_mtl_disableInterrupt (Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId, IfxGeth_MtlInterruptFlag flag)
Disables the selected Mtl interrupt flag. More...
IFX_EXTERN void | IfxGeth_mtl_enableInterrupt (Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId, IfxGeth_MtlInterruptFlag flag)
Enables the selected Mtl interrupt flag. More...
IFX_EXTERN void | IfxGeth_mtl_enableTxQueue (Ifx_GETH *gethSFR, IfxGeth_TxMtlQueue queueId)
Enables the selected TX Queue. More...
IFX_EXTERN boolean | IfxGeth_mtl_isInterruptFlagSet (Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId, IfxGeth_MtlInterruptFlag flag)
Returns the status of selected Mtl interrupt flag. More...
IFX_EXTERN void | IfxGeth_mtl_setRxForwardErrorPacket (Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId, boolean enabled)
Sets the Receive Forward Error Packets for the selected RX Queue. More...
IFX_EXTERN void | IfxGeth_mtl_setRxForwardUndersizedGoodPacket (Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId, boolean enabled)
Sets the Receive Forward Undersized Good Packets for the selected RX Queue. More...
IFX_EXTERN void | IfxGeth_mtl_setRxQueueSize (Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId, IfxGeth_QueueSize queueSize)
Sets the size of the selected RX Queue. More...
IFX_EXTERN void | IfxGeth_mtl_setRxStoreAndForward (Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId, boolean enabled)
Sets the Receive Store And Forward for the selected RX Queue. More...
IFX_EXTERN void | IfxGeth_mtl_setTxQueueSize (Ifx_GETH *gethSFR, IfxGeth_TxMtlQueue queueId, IfxGeth_QueueSize queueSize)
Sets the size of the selected TX Queue. More...
IFX_EXTERN void | IfxGeth_mtl_setTxStoreAndForward (Ifx_GETH *gethSFR, IfxGeth_TxMtlQueue queueId, boolean enabled)
Sets the Transmit Store And Forward for teh selected TX Queue. More...

Detailed Description

Function Documentation

◆ IfxGeth_mtl_clearAllInterruptFlags()

IFX_EXTERN void IfxGeth_mtl_clearAllInterruptFlags | ( | Ifx_GETH * | gethSFR,
 |  | IfxGeth_MtlQueue | queueId
 | ) |  |

Clears all the Mtl interrupt flags.

Parameters
gethSFR | Pointer to GETH register base address
queueId | Queue Index
Returns
None

Definition at line 108 of file IfxGeth.c.

Referenced by IfxGeth_Eth_configureMTL().

◆ IfxGeth_mtl_clearInterruptFlag()

IFX_EXTERN void IfxGeth_mtl_clearInterruptFlag | ( | Ifx_GETH * | gethSFR,
 |  | IfxGeth_MtlQueue | queueId,
 |  | IfxGeth_MtlInterruptFlag | flag
 | ) |  |

Clears the selected Mtl interrupt flag.

Parameters
gethSFR | Pointer to GETH register base address
queueId | Queue Index
flag | MTL interrupt flag
Returns
None

Definition at line 130 of file IfxGeth.c.

Referenced by IfxGeth_Eth_wakeupTransmitter().

◆ IfxGeth_mtl_disableInterrupt()

IFX_EXTERN void IfxGeth_mtl_disableInterrupt | ( | Ifx_GETH * | gethSFR,
 |  | IfxGeth_MtlQueue | queueId,
 |  | IfxGeth_MtlInterruptFlag | flag
 | ) |  |

Disables the selected Mtl interrupt flag.

Parameters
gethSFR | Pointer to GETH register base address
queueId | Queue Index
flag | MTL interrupt flag
Returns
None

Definition at line 153 of file IfxGeth.c.

◆ IfxGeth_mtl_disableMulticastFilterFailQueuing()

IFX_INLINE void IfxGeth_mtl_disableMulticastFilterFailQueuing ( Ifx_GETH * gethSFR )

Disable queuing of packets failing multicast filtering.

Parameters
gethSFR Pointer to GETH register base address
Returns
None

Definition at line 1581 of file IfxGeth.h.

◆ IfxGeth_mtl_disableUnicastFilterFailQueuing()

IFX_INLINE void IfxGeth_mtl_disableUnicastFilterFailQueuing ( Ifx_GETH * gethSFR )

Disable queuing of packets failing unicast filtering.

Parameters
gethSFR Pointer to GETH register base address
Returns
None

Definition at line 1568 of file IfxGeth.h.

◆ IfxGeth_mtl_disableVlanFilterFailQueuing()

IFX_INLINE void IfxGeth_mtl_disableVlanFilterFailQueuing ( Ifx_GETH * gethSFR )

Disable queuing of packets failing VLAN tag filtering.

Parameters
gethSFR Pointer to GETH register base address
Returns
None

Definition at line 1594 of file IfxGeth.h.

◆ IfxGeth_mtl_enableInterrupt()

IFX_EXTERN void IfxGeth_mtl_enableInterrupt | ( | Ifx_GETH * | gethSFR,
 |  | IfxGeth_MtlQueue | queueId,
 |  | IfxGeth_MtlInterruptFlag | flag
 | ) |  |

Enables the selected Mtl interrupt flag.

Parameters
gethSFR | Pointer to GETH register base address
queueId | Queue Index
flag | MTL interrupt flag
Returns
None

Definition at line 177 of file IfxGeth.c.

Referenced by IfxGeth_Eth_configureMTL().

◆ IfxGeth_mtl_enableMulticastFilterFailQueuing()

IFX_INLINE void IfxGeth_mtl_enableMulticastFilterFailQueuing | ( | Ifx_GETH * | gethSFR,
 |  | IfxGeth_RxMtlQueue | queueId
 | ) |  |

Enable and set queue ID to route packets failing multicast filter.

Parameters
gethSFR | Pointer to GETH register base address
queueId | Rx MTL Queue ID
Returns
None

Definition at line 1574 of file IfxGeth.h.

◆ IfxGeth_mtl_enableRxQueue()

IFX_INLINE void IfxGeth_mtl_enableRxQueue | ( | Ifx_GETH * | gethSFR,
 |  | IfxGeth_RxMtlQueue | queueId
 | ) |  |

Enables the selected Rx Queue.

Parameters
gethSFR | Pointer to GETH register base address
queueId | Rx Queue Index
Returns
None

Definition at line 1519 of file IfxGeth.h.

Referenced by IfxGeth_Eth_configureMTL().

◆ IfxGeth_mtl_enableTxQueue()

IFX_EXTERN void IfxGeth_mtl_enableTxQueue | ( | Ifx_GETH * | gethSFR,
 |  | IfxGeth_TxMtlQueue | queueId
 | ) |  |

Enables the selected TX Queue.

Parameters
gethSFR | Pointer to GETH register base address
queueId | Tx Queue Index
Returns
None

Definition at line 200 of file IfxGeth.c.

Referenced by IfxGeth_Eth_configureMTL().

◆ IfxGeth_mtl_enableUnicastFilterFailQueuing()

IFX_INLINE void IfxGeth_mtl_enableUnicastFilterFailQueuing | ( | Ifx_GETH * | gethSFR,
 |  | IfxGeth_RxMtlQueue | queueId
 | ) |  |

Enable and set queue ID to route packets failing unicast filter.

Parameters
gethSFR | Pointer to GETH register base address
queueId | Rx MTL Queue ID
Returns
None

Definition at line 1561 of file IfxGeth.h.

◆ IfxGeth_mtl_enableVlanFilterFailQueuing()

IFX_INLINE void IfxGeth_mtl_enableVlanFilterFailQueuing | ( | Ifx_GETH * | gethSFR,
 |  | IfxGeth_RxMtlQueue | queueId
 | ) |  |

Enable and set queue ID to route packets failing VLAN tag filter.

Parameters
gethSFR | Pointer to GETH register base address
queueId | Rx MTL Queue ID
Returns
None

Definition at line 1587 of file IfxGeth.h.

◆ IfxGeth_mtl_isInterruptFlagSet()

IFX_EXTERN boolean IfxGeth_mtl_isInterruptFlagSet | ( | Ifx_GETH * | gethSFR,
 |  | IfxGeth_MtlQueue | queueId,
 |  | IfxGeth_MtlInterruptFlag | flag
 | ) |  |

Returns the status of selected Mtl interrupt flag.

Parameters
gethSFR | Pointer to GETH register base address
queueId | Queue Index
flag | MTL interrupt flag
Returns
TRUE: if set
FLASE : if not set

Definition at line 220 of file IfxGeth.c.

Referenced by IfxGeth_Eth_wakeupTransmitter().

◆ IfxGeth_mtl_setRxArbitrationAlgorithm()

IFX_INLINE void IfxGeth_mtl_setRxArbitrationAlgorithm | ( | Ifx_GETH * | gethSFR,
 |  | IfxGeth_RxArbitrationAlgorithm | arbitrationAlgorithm
 | ) |  |

sets the Rx Arbitration algorithm

Parameters
gethSFR | Pointer to GETH register base address
arbitrationAlgorithm | Rx Arbitration Algorithm
Returns
None

Definition at line 1525 of file IfxGeth.h.

Referenced by IfxGeth_Eth_configureMTL().

◆ IfxGeth_mtl_setRxForwardErrorPacket()

IFX_EXTERN void IfxGeth_mtl_setRxForwardErrorPacket | ( | Ifx_GETH * | gethSFR,
 |  | IfxGeth_RxMtlQueue | queueId,
 |  | boolean | enabled
 | ) |  |

Sets the Receive Forward Error Packets for the selected RX Queue.

Parameters
gethSFR | Pointer to GETH register base address
queueId | Rx Queue Index
enabled | Enable/Disable Receive Forward Error Packets
Returns
None

Definition at line 245 of file IfxGeth.c.

Referenced by IfxGeth_Eth_configureMTL().

◆ IfxGeth_mtl_setRxForwardUndersizedGoodPacket()

IFX_EXTERN void IfxGeth_mtl_setRxForwardUndersizedGoodPacket | ( | Ifx_GETH * | gethSFR,
 |  | IfxGeth_RxMtlQueue | queueId,
 |  | boolean | enabled
 | ) |  |

Sets the Receive Forward Undersized Good Packets for the selected RX Queue.

Parameters
gethSFR | Pointer to GETH register base address
queueId | Rx Queue Index
enabled | Enable/Disable Receive Forward Undersized Good Packets
Returns
None

Definition at line 265 of file IfxGeth.c.

Referenced by IfxGeth_Eth_configureMTL().

◆ IfxGeth_mtl_setRxQueueDmaChannelMapping()

IFX_INLINE void IfxGeth_mtl_setRxQueueDmaChannelMapping | ( | Ifx_GETH * | gethSFR,
 |  | IfxGeth_RxMtlQueue | queueId,
 |  | IfxGeth_RxDmaChannel | dmaChannel
 | ) |  |

Sets the selected DMA Channel mapping for the selected Rx Queue.

Parameters
gethSFR | Pointer to GETH register base address
queueId | Rx Queue Index
dmaChannel | DMA channel for selected Rx Queue
Returns
None

Definition at line 1531 of file IfxGeth.h.

Referenced by IfxGeth_Eth_configureMTL().

◆ IfxGeth_mtl_setRxQueueForDaBasedDmaChannel()

IFX_INLINE void IfxGeth_mtl_setRxQueueForDaBasedDmaChannel | ( | Ifx_GETH * | gethSFR,
 |  | IfxGeth_RxMtlQueue | queueId,
 |  | boolean | enabled
 | ) |  |

Sets the selected Rx Queue for DA based DMA channel.

Parameters
gethSFR | Pointer to GETH register base address
queueId | Rx Queue Index
enabled | Enable/Disable Receive Store and Forward
Returns
None

Definition at line 1537 of file IfxGeth.h.

Referenced by IfxGeth_Eth_configureMTL().

◆ IfxGeth_mtl_setRxQueueSize()

IFX_EXTERN void IfxGeth_mtl_setRxQueueSize | ( | Ifx_GETH * | gethSFR,
 |  | IfxGeth_RxMtlQueue | queueId,
 |  | IfxGeth_QueueSize | queueSize
 | ) |  |

Sets the size of the selected RX Queue.

Parameters
gethSFR | Pointer to GETH register base address
queueId | Rx Queue Index
queueSize | Rx Queue Size
Returns
None

Definition at line 285 of file IfxGeth.c.

Referenced by IfxGeth_Eth_configureMTL().

◆ IfxGeth_mtl_setRxStoreAndForward()

IFX_EXTERN void IfxGeth_mtl_setRxStoreAndForward | ( | Ifx_GETH * | gethSFR,
 |  | IfxGeth_RxMtlQueue | queueId,
 |  | boolean | enabled
 | ) |  |

Sets the Receive Store And Forward for the selected RX Queue.

Parameters
gethSFR | Pointer to GETH register base address
queueId | Rx Queue Index
enabled | Enable/Disable Receive Store and Forward
Returns
None

Definition at line 305 of file IfxGeth.c.

Referenced by IfxGeth_Eth_configureMTL().

◆ IfxGeth_mtl_setTxQueueSize()

IFX_EXTERN void IfxGeth_mtl_setTxQueueSize | ( | Ifx_GETH * | gethSFR,
 |  | IfxGeth_TxMtlQueue | queueId,
 |  | IfxGeth_QueueSize | queueSize
 | ) |  |

Sets the size of the selected TX Queue.

Parameters
gethSFR | Pointer to GETH register base address
queueId | Tx Queue Index
queueSize | Tx Queue Size
Returns
None

Definition at line 325 of file IfxGeth.c.

Referenced by IfxGeth_Eth_configureMTL().

◆ IfxGeth_mtl_setTxSchedulingAlgorithm()

IFX_INLINE void IfxGeth_mtl_setTxSchedulingAlgorithm | ( | Ifx_GETH * | gethSFR,
 |  | IfxGeth_TxSchedulingAlgorithm | schedulingAlgorithm
 | ) |  |

sets the Tx Scheduling algorithm

Parameters
gethSFR | Pointer to GETH register base address
schedulingAlgorithm | Tx Scheduling Algorithm
Returns
None

Definition at line 1543 of file IfxGeth.h.

Referenced by IfxGeth_Eth_configureMTL().

◆ IfxGeth_mtl_setTxStoreAndForward()

IFX_EXTERN void IfxGeth_mtl_setTxStoreAndForward | ( | Ifx_GETH * | gethSFR,
 |  | IfxGeth_TxMtlQueue | queueId,
 |  | boolean | enabled
 | ) |  |

Sets the Transmit Store And Forward for teh selected TX Queue.

Parameters
gethSFR | Pointer to GETH register base address
queueId | Tx Queue Index
enabled | Enable/Disable Transmit Store and Forward
Returns
None

Definition at line 345 of file IfxGeth.c.

Referenced by IfxGeth_Eth_configureMTL().


iLLD_TC38A: DMA Functions

Functions
DMA Functions
iLLD » GETH » Standard Driver
Collaboration diagram for DMA Functions:

Functions

IFX_INLINE void | IfxGeth_dma_applySoftwareReset (Ifx_GETH *gethSFR)
Applies a software reset of MAC and DMA controller. More...
IFX_INLINE void | IfxGeth_dma_clearAllInterruptFlags (Ifx_GETH *gethSFR, IfxGeth_DmaChannel channelId)
Returns the status of selected DMA interrupt flag. More...
IFX_INLINE void | IfxGeth_dma_clearInterruptFlag (Ifx_GETH *gethSFR, IfxGeth_DmaChannel channelId, IfxGeth_DmaInterruptFlag flag)
Returns the status of selected DMA interrupt flag. More...
IFX_INLINE void | IfxGeth_dma_disableInterrupt (Ifx_GETH *gethSFR, IfxGeth_DmaChannel channelId, IfxGeth_DmaInterruptFlag flag)
Disables the selected DMA interrupt. More...
IFX_INLINE void | IfxGeth_dma_enableInterrupt (Ifx_GETH *gethSFR, IfxGeth_DmaChannel channelId, IfxGeth_DmaInterruptFlag flag)
Enables the selected DMA interrupt. More...
IFX_INLINE boolean | IfxGeth_dma_isInterruptFlagSet (Ifx_GETH *gethSFR, IfxGeth_DmaChannel channelId, IfxGeth_DmaInterruptFlag flag)
Returns the status of selected DMA interrupt flag. More...
IFX_INLINE boolean | IfxGeth_dma_isSoftwareResetDone (Ifx_GETH *gethSFR)
Wiats until software reset of MAC and DMA controller is done or until timout. More...
IFX_INLINE void | IfxGeth_dma_setAddressAlignedBeats (Ifx_GETH *gethSFR, boolean enabled)
Enables/Disables Address aligned beats. More...
IFX_INLINE void | IfxGeth_dma_setFixedBurst (Ifx_GETH *gethSFR, boolean enabled)
Enables/Disables Fixed Burst Length. More...
IFX_INLINE void | IfxGeth_dma_setMixedBurst (Ifx_GETH *gethSFR, boolean enabled)
Enables/Disables Mixed Burst Length. More...
IFX_INLINE void | IfxGeth_dma_setRxBufferSize (Ifx_GETH *gethSFR, IfxGeth_RxDmaChannel channel, uint16 size)
sets the size of the rx buffers in descriptors for selected Rx channel of DMA More...
IFX_INLINE void | IfxGeth_dma_setRxDescriptorListAddress (Ifx_GETH *gethSFR, IfxGeth_RxDmaChannel channel, uint32 address)
sets the base address of the first descriptor in the Receive descriptor list More...
IFX_INLINE void | IfxGeth_dma_setRxDescriptorRingLength (Ifx_GETH *gethSFR, IfxGeth_RxDmaChannel channel, uint32 length)
sets the Length of the Rx descriptors ring More...
IFX_INLINE void | IfxGeth_dma_setRxDescriptorTailPointer (Ifx_GETH *gethSFR, IfxGeth_RxDmaChannel channel, uint32 address)
sets the address of the last valid descriptor in the Receive descriptor list More...
IFX_INLINE void | IfxGeth_dma_setRxMaxBurstLength (Ifx_GETH *gethSFR, IfxGeth_RxDmaChannel channel, IfxGeth_DmaBurstLength length)
sets the programmable burst length of selected Rx channel of DMA More...
IFX_INLINE void | IfxGeth_dma_setTxDescriptorListAddress (Ifx_GETH *gethSFR, IfxGeth_TxDmaChannel channel, uint32 address)
sets the base address of the first descriptor in the Transmit descriptor list More...
IFX_INLINE void | IfxGeth_dma_setTxDescriptorRingLength (Ifx_GETH *gethSFR, IfxGeth_TxDmaChannel channel, uint32 length)
sets the Length of the Tx descriptors ring More...
IFX_INLINE void | IfxGeth_dma_setTxDescriptorTailPointer (Ifx_GETH *gethSFR, IfxGeth_TxDmaChannel channel, uint32 address)
sets the address of the last valid descriptor in the Transmit descriptor list More...
IFX_INLINE void | IfxGeth_dma_setTxMaxBurstLength (Ifx_GETH *gethSFR, IfxGeth_TxDmaChannel channel, IfxGeth_DmaBurstLength length)
sets the programmable burst length of selected Tx channel of DMA More...
IFX_INLINE void | IfxGeth_dma_startReceiver (Ifx_GETH *gethSFR, IfxGeth_RxDmaChannel channel)
starts the receiver of selected Rx channel of DMA More...
IFX_INLINE void | IfxGeth_dma_startTransmitter (Ifx_GETH *gethSFR, IfxGeth_TxDmaChannel channel)
starts the tramsimitter of selected Tx channel of DMA More...
IFX_INLINE void | IfxGeth_dma_stopTransmitter (Ifx_GETH *gethSFR, IfxGeth_TxDmaChannel channel)
Stops the tramsimitter of selected Tx channel of DMA. More...

Detailed Description

Function Documentation

◆ IfxGeth_dma_applySoftwareReset()

IFX_INLINE void IfxGeth_dma_applySoftwareReset ( Ifx_GETH * gethSFR )

Applies a software reset of MAC and DMA controller.

Parameters
gethSFR Pointer to GETH register base address
Returns
None

Definition at line 1309 of file IfxGeth.h.

Referenced by IfxGeth_Eth_initModule().

◆ IfxGeth_dma_clearAllInterruptFlags()

IFX_INLINE void IfxGeth_dma_clearAllInterruptFlags | ( | Ifx_GETH * | gethSFR,
 |  | IfxGeth_DmaChannel | channelId
 | ) |  |

Returns the status of selected DMA interrupt flag.

Parameters
gethSFR | Pointer to GETH register base address
channelId | DMA channel Id
Returns
None

Definition at line 1315 of file IfxGeth.h.

Referenced by IfxGeth_Eth_configureDMA().

◆ IfxGeth_dma_clearInterruptFlag()

IFX_INLINE void IfxGeth_dma_clearInterruptFlag | ( | Ifx_GETH * | gethSFR,
 |  | IfxGeth_DmaChannel | channelId,
 |  | IfxGeth_DmaInterruptFlag | flag
 | ) |  |

Returns the status of selected DMA interrupt flag.

Parameters
gethSFR | Pointer to GETH register base address
channelId | DMA channel Id
flag | DMA interrupt flag
Returns
None

Definition at line 1321 of file IfxGeth.h.

Referenced by IfxGeth_Eth_wakeupReceiver(), and IfxGeth_Eth_wakeupTransmitter().

◆ IfxGeth_dma_disableInterrupt()

IFX_INLINE void IfxGeth_dma_disableInterrupt | ( | Ifx_GETH * | gethSFR,
 |  | IfxGeth_DmaChannel | channelId,
 |  | IfxGeth_DmaInterruptFlag | flag
 | ) |  |

Disables the selected DMA interrupt.

Parameters
gethSFR | Pointer to GETH register base address
channelId | DMA channel Id
flag | DMA interrupt flag
Returns
None

Definition at line 1328 of file IfxGeth.h.

◆ IfxGeth_dma_enableInterrupt()

IFX_INLINE void IfxGeth_dma_enableInterrupt | ( | Ifx_GETH * | gethSFR,
 |  | IfxGeth_DmaChannel | channelId,
 |  | IfxGeth_DmaInterruptFlag | flag
 | ) |  |

Enables the selected DMA interrupt.

Parameters
gethSFR | Pointer to GETH register base address
channelId | DMA channel Id
flag | DMA interrupt flag
Returns
None

Definition at line 1335 of file IfxGeth.h.

Referenced by IfxGeth_Eth_configureDMA().

◆ IfxGeth_dma_isInterruptFlagSet()

IFX_INLINE boolean IfxGeth_dma_isInterruptFlagSet | ( | Ifx_GETH * | gethSFR,
 |  | IfxGeth_DmaChannel | channelId,
 |  | IfxGeth_DmaInterruptFlag | flag
 | ) |  |

Returns the status of selected DMA interrupt flag.

Parameters
gethSFR | Pointer to GETH register base address
channelId | DMA channel Id
flag | DMA interrupt flag
Returns
TRUE: if set
FLASE : if not set

Definition at line 1342 of file IfxGeth.h.

Referenced by IfxGeth_Eth_wakeupReceiver(), and IfxGeth_Eth_wakeupTransmitter().

◆ IfxGeth_dma_isSoftwareResetDone()

IFX_INLINE boolean IfxGeth_dma_isSoftwareResetDone ( Ifx_GETH * gethSFR )

Wiats until software reset of MAC and DMA controller is done or until timout.

Parameters
gethSFR Pointer to GETH register base address

Definition at line 1349 of file IfxGeth.h.

Referenced by IfxGeth_Eth_initModule().

◆ IfxGeth_dma_setAddressAlignedBeats()

IFX_INLINE void IfxGeth_dma_setAddressAlignedBeats | ( | Ifx_GETH * | gethSFR,
 |  | boolean | enabled
 | ) |  |

Enables/Disables Address aligned beats.

Parameters
gethSFR | Pointer to GETH register base address
enabled | Enable/Disable Address Aligned Beats
Returns
None

Definition at line 1355 of file IfxGeth.h.

Referenced by IfxGeth_Eth_configureDMA().

◆ IfxGeth_dma_setFixedBurst()

IFX_INLINE void IfxGeth_dma_setFixedBurst | ( | Ifx_GETH * | gethSFR,
 |  | boolean | enabled
 | ) |  |

Enables/Disables Fixed Burst Length.

Parameters
gethSFR | Pointer to GETH register base address
enabled | Enable/Disable Fixed Burst
Returns
None

Definition at line 1361 of file IfxGeth.h.

Referenced by IfxGeth_Eth_configureDMA().

◆ IfxGeth_dma_setMixedBurst()

IFX_INLINE void IfxGeth_dma_setMixedBurst | ( | Ifx_GETH * | gethSFR,
 |  | boolean | enabled
 | ) |  |

Enables/Disables Mixed Burst Length.

Parameters
gethSFR | Pointer to GETH register base address
enabled | Enable/Disable Mixed Burst
Returns
None

Definition at line 1367 of file IfxGeth.h.

Referenced by IfxGeth_Eth_configureDMA().

◆ IfxGeth_dma_setRxBufferSize()

IFX_INLINE void IfxGeth_dma_setRxBufferSize | ( | Ifx_GETH * | gethSFR,
 |  | IfxGeth_RxDmaChannel | channel,
 |  | uint16 | size
 | ) |  |

sets the size of the rx buffers in descriptors for selected Rx channel of DMA

Parameters
gethSFR | Pointer to GETH register base address
channel | Rx channel Id
size | Rx Buffers size (applies for both buffers)
Returns
None

Definition at line 1373 of file IfxGeth.h.

Referenced by IfxGeth_Eth_initReceiveDescriptors().

◆ IfxGeth_dma_setRxDescriptorListAddress()

IFX_INLINE void IfxGeth_dma_setRxDescriptorListAddress | ( | Ifx_GETH * | gethSFR,
 |  | IfxGeth_RxDmaChannel | channel,
 |  | uint32 | address
 | ) |  |

sets the base address of the first descriptor in the Receive descriptor list

Parameters
gethSFR | Pointer to GETH register base address
channel | Rx channel Id
address | base address of the first descriptor in the Receive descriptor list
Returns
None

Definition at line 1380 of file IfxGeth.h.

Referenced by IfxGeth_Eth_initReceiveDescriptors().

◆ IfxGeth_dma_setRxDescriptorRingLength()

IFX_INLINE void IfxGeth_dma_setRxDescriptorRingLength | ( | Ifx_GETH * | gethSFR,
 |  | IfxGeth_RxDmaChannel | channel,
 |  | uint32 | length
 | ) |  |

sets the Length of the Rx descriptors ring

Parameters
gethSFR | Pointer to GETH register base address
channel | Rx channel Id
length | Length of the ring (no of total Rx descriptors)
Returns
None

Definition at line 1386 of file IfxGeth.h.

Referenced by IfxGeth_Eth_initReceiveDescriptors().

◆ IfxGeth_dma_setRxDescriptorTailPointer()

IFX_INLINE void IfxGeth_dma_setRxDescriptorTailPointer | ( | Ifx_GETH * | gethSFR,
 |  | IfxGeth_RxDmaChannel | channel,
 |  | uint32 | address
 | ) |  |

sets the address of the last valid descriptor in the Receive descriptor list

Parameters
gethSFR | Pointer to GETH register base address
channel | Rx channel Id
address | address of the last valid descriptor in the Receive descriptor list
Returns
None

Definition at line 1392 of file IfxGeth.h.

Referenced by IfxGeth_Eth_initReceiveDescriptors().

◆ IfxGeth_dma_setRxMaxBurstLength()

IFX_INLINE void IfxGeth_dma_setRxMaxBurstLength | ( | Ifx_GETH * | gethSFR,
 |  | IfxGeth_RxDmaChannel | channel,
 |  | IfxGeth_DmaBurstLength | length
 | ) |  |

sets the programmable burst length of selected Rx channel of DMA

Parameters
gethSFR | Pointer to GETH register base address
channel | Rx channel Id
length | Programmable burst length
Returns
None

Definition at line 1398 of file IfxGeth.h.

Referenced by IfxGeth_Eth_configureDMA().

◆ IfxGeth_dma_setTxDescriptorListAddress()

IFX_INLINE void IfxGeth_dma_setTxDescriptorListAddress | ( | Ifx_GETH * | gethSFR,
 |  | IfxGeth_TxDmaChannel | channel,
 |  | uint32 | address
 | ) |  |

sets the base address of the first descriptor in the Transmit descriptor list

Parameters
gethSFR | Pointer to GETH register base address
channel | Tx channel Id
address | base address of the first descriptor in the Transmit descriptor list
Returns
None

Definition at line 1404 of file IfxGeth.h.

Referenced by IfxGeth_Eth_initTransmitDescriptors().

◆ IfxGeth_dma_setTxDescriptorRingLength()

IFX_INLINE void IfxGeth_dma_setTxDescriptorRingLength | ( | Ifx_GETH * | gethSFR,
 |  | IfxGeth_TxDmaChannel | channel,
 |  | uint32 | length
 | ) |  |

sets the Length of the Tx descriptors ring

Parameters
gethSFR | Pointer to GETH register base address
channel | Tx channel Id
length | Length of the ring (no of total Tx descriptors)
Returns
None

Definition at line 1410 of file IfxGeth.h.

Referenced by IfxGeth_Eth_initTransmitDescriptors().

◆ IfxGeth_dma_setTxDescriptorTailPointer()

IFX_INLINE void IfxGeth_dma_setTxDescriptorTailPointer | ( | Ifx_GETH * | gethSFR,
 |  | IfxGeth_TxDmaChannel | channel,
 |  | uint32 | address
 | ) |  |

sets the address of the last valid descriptor in the Transmit descriptor list

Parameters
gethSFR | Pointer to GETH register base address
channel | Tx channel Id
address | address of the last valid descriptor in the Transmit descriptor list
Returns
None

Definition at line 1416 of file IfxGeth.h.

Referenced by IfxGeth_Eth_sendTransmitBuffer().

◆ IfxGeth_dma_setTxMaxBurstLength()

IFX_INLINE void IfxGeth_dma_setTxMaxBurstLength | ( | Ifx_GETH * | gethSFR,
 |  | IfxGeth_TxDmaChannel | channel,
 |  | IfxGeth_DmaBurstLength | length
 | ) |  |

sets the programmable burst length of selected Tx channel of DMA

Parameters
gethSFR | Pointer to GETH register base address
channel | Tx channel Id
length | Programmable burst length
Returns
None

Definition at line 1422 of file IfxGeth.h.

Referenced by IfxGeth_Eth_configureDMA().

◆ IfxGeth_dma_startReceiver()

IFX_INLINE void IfxGeth_dma_startReceiver | ( | Ifx_GETH * | gethSFR,
 |  | IfxGeth_RxDmaChannel | channel
 | ) |  |

starts the receiver of selected Rx channel of DMA

Parameters
gethSFR | Pointer to GETH register base address
channel | Rx channel Id
Returns
None

Definition at line 1428 of file IfxGeth.h.

Referenced by IfxGeth_Eth_startReceiver(), and IfxGeth_Eth_startReceivers().

◆ IfxGeth_dma_startTransmitter()

IFX_INLINE void IfxGeth_dma_startTransmitter | ( | Ifx_GETH * | gethSFR,
 |  | IfxGeth_TxDmaChannel | channel
 | ) |  |

starts the tramsimitter of selected Tx channel of DMA

Parameters
gethSFR | Pointer to GETH register base address
channel | Tx channel Id
Returns
None

Definition at line 1434 of file IfxGeth.h.

Referenced by IfxGeth_Eth_startTransmitter(), and IfxGeth_Eth_startTransmitters().

◆ IfxGeth_dma_stopTransmitter()

IFX_INLINE void IfxGeth_dma_stopTransmitter | ( | Ifx_GETH * | gethSFR,
 |  | IfxGeth_TxDmaChannel | channel
 | ) |  |

Stops the tramsimitter of selected Tx channel of DMA.

Parameters
gethSFR | Pointer to GETH register base address
channel | Tx channel Id
Returns
None

Definition at line 1440 of file IfxGeth.h.

Referenced by IfxGeth_Eth_stopTransmitters().


iLLD_TC38A: DataStructures

Data Structures
DataStructures
iLLD » GETH » Standard Driver
Collaboration diagram for DataStructures:

Data Structures

struct | IfxGeth_RxContextDescr0_Bits
Bit Fields of RDES0 Context Descriptor. More...
struct | IfxGeth_RxContextDescr1_Bits
Bit Fields of RDES1 Context Descriptor. More...
struct | IfxGeth_RxContextDescr2_Bits
Bit Fields of RDES2 Context Descriptor. More...
struct | IfxGeth_RxContextDescr3_Bits
Bit Fields of RDES3 Context Descriptor. More...
struct | IfxGeth_RxDescr0_RF_Bits
Bit Fields of RDES0 in Read Format. More...
struct | IfxGeth_RxDescr0_WF_Bits
Bit Fields of RDES0 in Write back Format. More...
struct | IfxGeth_RxDescr1_RF_Bits
Bit Fields of RDES1 in Read Format. More...
struct | IfxGeth_RxDescr1_WF_Bits
Bit Fields of RDES1 in Write back Format. More...
struct | IfxGeth_RxDescr2_RF_Bits
Bit Fields of RDES2 in Read Format. More...
struct | IfxGeth_RxDescr2_WF_Bits
Bit Fields of RDES2 in Write back Format. More...
struct | IfxGeth_RxDescr3_RF_Bits
Bit Fields of RDES3 in Read Format. More...
struct | IfxGeth_RxDescr3_WF_Bits
Bit Fields of RDES3 in Write back Format. More...
struct | IfxGeth_TxContextDescr0_Bits
Bit Fields of TDES0 Context Descriptor. More...
struct | IfxGeth_TxContextDescr1_Bits
Bit Fields of TDES1 Context Descriptor. More...
struct | IfxGeth_TxContextDescr2_Bits
Bit Fields of TDES2 Context Descriptor. More...
struct | IfxGeth_TxContextDescr3_Bits
Bit Fields of TDES3 Context Descriptor. More...
struct | IfxGeth_TxDescr0_RF_Bits
Bit Fields of TDES0 in Read Format. More...
struct | IfxGeth_TxDescr0_WF_Bits
Bit Fields of TDES0 in Write-back Format. More...
struct | IfxGeth_TxDescr1_RF_Bits
Bit Fields of TDES1 in Read Format. More...
struct | IfxGeth_TxDescr1_WF_Bits
Bit Fields of TDES1 in Write-back Format. More...
struct | IfxGeth_TxDescr2_RF_Bits
Bit Fields of TDES2 in Read Format. More...
struct | IfxGeth_TxDescr2_WF_Bits
Bit Fields of TDES2 in Write-back Format. More...
struct | IfxGeth_TxDescr3_RF_Bits
Bit Fields of TDES3 in Read Format. More...
struct | IfxGeth_TxDescr3_WF_Bits
Bit Fields of TDES3 in Write-back Format. More...
struct | IfxGeth_RxDescr
Rx Descriptor. More...
struct | IfxGeth_TxDescr
Tx Descriptor. More...

Detailed Description

Data Structure Documentation

◆ IfxGeth_RxContextDescr0_Bits

struct IfxGeth_RxContextDescr0_Bits

Bit Fields of RDES0 Context Descriptor.

Definition at line 314 of file IfxGeth.h.

Data Fields
uint32 RTSL: 32 Receive Packet Timestamp Low.

◆ IfxGeth_RxContextDescr1_Bits

struct IfxGeth_RxContextDescr1_Bits

Bit Fields of RDES1 Context Descriptor.

Definition at line 321 of file IfxGeth.h.

Data Fields
uint32 RTSH: 32 Receive Packet Timestamp High.

◆ IfxGeth_RxContextDescr2_Bits

struct IfxGeth_RxContextDescr2_Bits

Bit Fields of RDES2 Context Descriptor.

Definition at line 328 of file IfxGeth.h.

Data Fields
uint32 reserved_0: 32 Reserved.

◆ IfxGeth_RxContextDescr3_Bits

struct IfxGeth_RxContextDescr3_Bits

Bit Fields of RDES3 Context Descriptor.

Definition at line 335 of file IfxGeth.h.

Data Fields
uint32 | CTXT: 1 | Receive Context Descriptor.
uint32 | DE: 1 | Descriptor Error.
uint32 | OWN: 1 | Own Bit.
uint32 | reserved_0: 29 | Reserved.

◆ IfxGeth_RxDescr0_RF_Bits

struct IfxGeth_RxDescr0_RF_Bits

Bit Fields of RDES0 in Read Format.

Definition at line 345 of file IfxGeth.h.

Data Fields
uint32 BUF1AP: 32 Header or Buffer 1 Address Pointer.

◆ IfxGeth_RxDescr0_WF_Bits

struct IfxGeth_RxDescr0_WF_Bits

Bit Fields of RDES0 in Write back Format.

Definition at line 352 of file IfxGeth.h.

Data Fields
uint32 | IVT: 16 | Inner VLAN Tag.
uint32 | OVT: 16 | Outer VLAN Tag.

◆ IfxGeth_RxDescr1_RF_Bits

struct IfxGeth_RxDescr1_RF_Bits

Bit Fields of RDES1 in Read Format.

Definition at line 360 of file IfxGeth.h.

Data Fields
uint32 reserved_0: 32 Reserved.

◆ IfxGeth_RxDescr1_WF_Bits

struct IfxGeth_RxDescr1_WF_Bits

Bit Fields of RDES1 in Write back Format.

Definition at line 367 of file IfxGeth.h.

Data Fields
uint32 | IP4: 1 | IPV4 Header Present.
uint32 | IP6: 1 | IPv6 header Present.
uint32 | IPCB: 1 | IP Checksum Bypassed.
uint32 | IPCE: 1 | IP Payload Error.
uint32 | IPHE: 1 | IP Header Error.
uint32 | OPC: 16 | OAM Sub-Type Code, or MAC Control Packet opcode.
uint32 | PFT: 1 | PTP Packet Type.
uint32 | PMT: 4 | PTP Message Type.
uint32 | PT: 3 | Payload Type.
uint32 | PV: 1 | PTP Version.
uint32 | TD: 1 | Timestamp Dropped.
uint32 | TSA: 1 | Timestamp Available.

◆ IfxGeth_RxDescr2_RF_Bits

struct IfxGeth_RxDescr2_RF_Bits

Bit Fields of RDES2 in Read Format.

Definition at line 385 of file IfxGeth.h.

Data Fields
uint32 BUF2AP: 32 Buffer 2 Address Pointer.

◆ IfxGeth_RxDescr2_WF_Bits

struct IfxGeth_RxDescr2_WF_Bits

Bit Fields of RDES2 in Write back Format.

Definition at line 392 of file IfxGeth.h.

Data Fields
uint32 | ARPNR: 1 | ARP Reply Not Generated.
uint32 | DAF: 1 | Destination Address Filter Fail.
uint32 | HF: 1 | Hash Filter Status.
uint32 | HL: 10 | L3/L4 Header Length.
uint32 | ITS: 1 | Inner VLAN Tag Filter Status (ITS)
uint32 | L3FM: 1 | Layer 3 Filter Match.
uint32 | L3L4FM: 3 | Layer 3 and Layer 4 Filter Number Matched.
uint32 | L4FM: 1 | Layer 4 Filter Match.
uint32 | MADRM: 8 | MAC Address Match or Hash Value.
uint32 | OTS: 1 | VLAN Filter Status.
uint32 | reserved_11: 3 | Reserved.
uint32 | SAF: 1 | SA Address Filter Fail.

◆ IfxGeth_RxDescr3_RF_Bits

struct IfxGeth_RxDescr3_RF_Bits

Bit Fields of RDES3 in Read Format.

Definition at line 410 of file IfxGeth.h.

Data Fields
uint32 | BUF1V: 1 | Buffer 1 Address Valid.
uint32 | BUF2V: 1 | Buffer 2 Address Valid.
uint32 | IOC: 1 | Interrupt on Completion.
uint32 | OWN: 1 | Own bit.
uint32 | reserved_0: 24 | Reserved.
uint32 | reserved_27: 4 | Reserved.

◆ IfxGeth_RxDescr3_WF_Bits

struct IfxGeth_RxDescr3_WF_Bits

Bit Fields of RDES3 in Write back Format.

Definition at line 422 of file IfxGeth.h.

Data Fields
uint32 | CE: 1 | CRC Error.
uint32 | CTXT: 1 | Receive Context Descriptor.
uint32 | DE: 1 | Dribble Bit Error.
uint32 | ES: 1 | Error Summary.
uint32 | FD: 1 | First Descriptor.
uint32 | GP: 1 | Giant Packet.
uint32 | LD: 1 | Last Descriptor.
uint32 | LT: 3 | Length/Type Field.
uint32 | OE: 1 | Overflow Error.
uint32 | OWN: 1 | Own Bit.
uint32 | PL: 15 | Packet Length.
uint32 | RE: 1 | Receive Error.
uint32 | RS0V: 1 | Receive Status RDES0 Valid.
uint32 | RS1V: 1 | Receive Status RDES1 Valid.
uint32 | RS2V: 1 | Receive Status RDES2 Valid.
uint32 | RWT: 1 | Receive Watchdog Timeout.

◆ IfxGeth_TxContextDescr0_Bits

struct IfxGeth_TxContextDescr0_Bits

Bit Fields of TDES0 Context Descriptor.

Definition at line 444 of file IfxGeth.h.

Data Fields
uint32 TTSL: 32 Transmit Packet Timestamp Low.

◆ IfxGeth_TxContextDescr1_Bits

struct IfxGeth_TxContextDescr1_Bits

Bit Fields of TDES1 Context Descriptor.

Definition at line 451 of file IfxGeth.h.

Data Fields
uint32 TTSH: 32 Transmit Packet Timestamp High.

◆ IfxGeth_TxContextDescr2_Bits

struct IfxGeth_TxContextDescr2_Bits

Bit Fields of TDES2 Context Descriptor.

Definition at line 458 of file IfxGeth.h.

Data Fields
uint32 | IVT: 16 | Inner VLAN Tag.
uint32 | MSS: 14 | Maximum Segment Size.
uint32 | reserved_14: 2 | Reserved.

◆ IfxGeth_TxContextDescr3_Bits

struct IfxGeth_TxContextDescr3_Bits

Bit Fields of TDES3 Context Descriptor.

Definition at line 467 of file IfxGeth.h.

Data Fields
uint32 | CDE: 1 | Context Descriptor Error.
uint32 | CTXT: 1 | Context Type.
uint32 | IVLTV: 1 | Inner VLAN Tag Valid.
uint32 | IVTIR: 2 | Inner VLAN Tag Insert or Replace.
uint32 | OSTC: 1 | One-Step Timestamp Correction Enable.
uint32 | OWN: 1 | Own Bit.
uint32 | reserved_20: 3 | Reserved.
uint32 | reserved_24: 2 | Reserved.
uint32 | reserved_28: 2 | Reserved.
uint32 | TCMSSV: 1 | One-Step Timestamp Correction Input or MSS Valid.
uint32 | VLTV: 1 | VLAN Tag Valid.
uint32 | VT: 16 | VLAN Tag.

◆ IfxGeth_TxDescr0_RF_Bits

struct IfxGeth_TxDescr0_RF_Bits

Bit Fields of TDES0 in Read Format.

Definition at line 485 of file IfxGeth.h.

Data Fields
uint32 BUF1AP: 32 Buffer 1 Address Pointer.

◆ IfxGeth_TxDescr0_WF_Bits

struct IfxGeth_TxDescr0_WF_Bits

Bit Fields of TDES0 in Write-back Format.

Definition at line 492 of file IfxGeth.h.

Data Fields
uint32 TTSL: 32 Transmit Packet Timestamp Low.

◆ IfxGeth_TxDescr1_RF_Bits

struct IfxGeth_TxDescr1_RF_Bits

Bit Fields of TDES1 in Read Format.

Definition at line 499 of file IfxGeth.h.

Data Fields
uint32 BUF2AP: 32 Buffer 2 or Buffer 1 Address Pointer.

◆ IfxGeth_TxDescr1_WF_Bits

struct IfxGeth_TxDescr1_WF_Bits

Bit Fields of TDES1 in Write-back Format.

Definition at line 506 of file IfxGeth.h.

Data Fields
uint32 TTSH: 32 Transmit Packet Timestamp High.

◆ IfxGeth_TxDescr2_RF_Bits

struct IfxGeth_TxDescr2_RF_Bits

Bit Fields of TDES2 in Read Format.

Definition at line 513 of file IfxGeth.h.

Data Fields
uint32 | B1L: 14 | Header Length or Buffer 1 Length.
uint32 | B2L: 14 | Buffer 2 Length.
uint32 | IOC: 1 | Interrupt on Completion.
uint32 | TTSE_TMWD: 1 | Transmit Timestamp Enable or External TSO Memory Write Enable.
uint32 | VTIR: 2 | VLAN Tag Insertion or Replacement.

◆ IfxGeth_TxDescr2_WF_Bits

struct IfxGeth_TxDescr2_WF_Bits

Bit Fields of TDES2 in Write-back Format.

Definition at line 524 of file IfxGeth.h.

Data Fields
uint32 reserved_0: 32 Reserved.

◆ IfxGeth_TxDescr3_RF_Bits

struct IfxGeth_TxDescr3_RF_Bits

Bit Fields of TDES3 in Read Format.

Definition at line 531 of file IfxGeth.h.

Data Fields
uint32 | CIC_TPL: 2 | Checksum Insertion Control or TCP Payload LengthThese bits control the checksum.
uint32 | CPC: 2 | CRC Pad Control.
uint32 | CTXT: 1 | Context TypeThis bit should be set to 1'b0 for normal descriptor.
uint32 | FD: 1 | First Descriptor.
uint32 | FL_TPL: 15 | Packet Length or TCP Payload Length.
uint32 | LD: 1 | Last Descriptor.
uint32 | OWN: 1 | Own Bit.
uint32 | SAIC: 3 | SA Insertion Control.
uint32 | SLOTNUM_THL: 4 | SLOTNUM: Slot Number Control Bits in AV Mode.
uint32 | TPL: 1 | Reserved or TCP Payload Length.
uint32 | TSE: 1 | TCP Segmentation Enable.

◆ IfxGeth_TxDescr3_WF_Bits

struct IfxGeth_TxDescr3_WF_Bits

Bit Fields of TDES3 in Write-back Format.

Definition at line 548 of file IfxGeth.h.

Data Fields
uint32 | CC: 4 | Collision Count.
uint32 | CTXT: 1 | Context Type.
uint32 | DB: 1 | Deferred Bit.
uint32 | EC: 1 | Excessive Collision.
uint32 | ED: 1 | Excessive Deferral.
uint32 | ES: 1 | Error Summary.
uint32 | FD: 1 | First Descriptor.
uint32 | FF: 1 | Packet Flushed.
uint32 | IHE: 1 | IP Header Error.
uint32 | JT: 1 | Jabber Timeout.
uint32 | LC: 1 | Late Collision.
uint32 | LD: 1 | Last Descriptor.
uint32 | LOC: 1 | Loss of Carrier.
uint32 | NC: 1 | No Carrier.
uint32 | OWN: 1 | Own bit.
uint32 | PCE: 1 | Payload Checksum.
uint32 | reserved_16: 1 | Reserved.
uint32 | reserved_18: 10 | Reserved.
uint32 | TTSS: 1 | Tx Timestamp Status.
uint32 | UF: 1 | Underflow Error.

◆ IfxGeth_RxDescr

struct IfxGeth_RxDescr

Rx Descriptor.

Definition at line 662 of file IfxGeth.h.

Collaboration diagram for IfxGeth_RxDescr:
[legend]
Data Fields
IfxGeth_RxDescr0 | RDES0 | Rx Descriptor DWORD 0.
IfxGeth_RxDescr1 | RDES1 | Rx Descriptor DWORD 1.
IfxGeth_RxDescr2 | RDES2 | Rx Descriptor DWORD 2.
IfxGeth_RxDescr3 | RDES3 | Rx Descriptor DWORD 3.

◆ IfxGeth_TxDescr

struct IfxGeth_TxDescr

Tx Descriptor.

Definition at line 672 of file IfxGeth.h.

Collaboration diagram for IfxGeth_TxDescr:
[legend]
Data Fields
IfxGeth_TxDescr0 | TDES0 | Tx Descriptor DWORD 0.
IfxGeth_TxDescr1 | TDES1 | Tx Descriptor DWORD 1.
IfxGeth_TxDescr2 | TDES2 | Tx Descriptor DWORD 2.
IfxGeth_TxDescr3 | TDES3 | Tx Descriptor DWORD 3.


iLLD_TC38A: Unions

Data Structures
Unions
iLLD » GETH » Standard Driver
Collaboration diagram for Unions:

Data Structures

union | IfxGeth_RxDescr0
RDES0. More...
union | IfxGeth_RxDescr1
RDES1. More...
union | IfxGeth_RxDescr2
RDES2. More...
union | IfxGeth_RxDescr3
RDES3. More...
union | IfxGeth_TxDescr0
TDES0. More...
union | IfxGeth_TxDescr1
TDES1. More...
union | IfxGeth_TxDescr2
TDES2. More...
union | IfxGeth_TxDescr3
TDES3. More...
union | IfxGeth_RxDescrList
Rx Descriptor List. More...
union | IfxGeth_TxDescrList
Tx Descriptor List. More...

Detailed Description

Data Structure Documentation

◆ IfxGeth_RxDescr0

union IfxGeth_RxDescr0

RDES0.

Definition at line 578 of file IfxGeth.h.

Collaboration diagram for IfxGeth_RxDescr0:
[legend]
Data Fields
IfxGeth_RxContextDescr0_Bits | C | Context Descriptor Format Bitfiled Access.
IfxGeth_RxDescr0_RF_Bits | R | Read Format Bitfiled Access.
uint32 | U | Unsigned access.
IfxGeth_RxDescr0_WF_Bits | W | Write back Format Bitfiled Access.

◆ IfxGeth_RxDescr1

union IfxGeth_RxDescr1

RDES1.

Definition at line 588 of file IfxGeth.h.

Collaboration diagram for IfxGeth_RxDescr1:
[legend]
Data Fields
IfxGeth_RxContextDescr1_Bits | C | Context Descriptor Format Bitfiled Access.
IfxGeth_RxDescr1_RF_Bits | R | Read Format Bitfiled Access.
uint32 | U | Unsigned access.
IfxGeth_RxDescr1_WF_Bits | W | Write back Format Bitfiled Access.

◆ IfxGeth_RxDescr2

union IfxGeth_RxDescr2

RDES2.

Definition at line 598 of file IfxGeth.h.

Collaboration diagram for IfxGeth_RxDescr2:
[legend]
Data Fields
IfxGeth_RxContextDescr2_Bits | C | Context Descriptor Format Bitfiled Access.
IfxGeth_RxDescr2_RF_Bits | R | Read Format Bitfiled Access.
uint32 | U | Unsigned access.
IfxGeth_RxDescr2_WF_Bits | W | Write back Format Bitfiled Access.

◆ IfxGeth_RxDescr3

union IfxGeth_RxDescr3

RDES3.

Definition at line 608 of file IfxGeth.h.

Collaboration diagram for IfxGeth_RxDescr3:
[legend]
Data Fields
IfxGeth_RxContextDescr3_Bits | C | Context Descriptor Format Bitfiled Access.
IfxGeth_RxDescr3_RF_Bits | R | Read Format Bitfiled Access.
uint32 | U | Unsigned access.
IfxGeth_RxDescr3_WF_Bits | W | Write back Format Bitfiled Access.

◆ IfxGeth_TxDescr0

union IfxGeth_TxDescr0

TDES0.

Definition at line 618 of file IfxGeth.h.

Collaboration diagram for IfxGeth_TxDescr0:
[legend]
Data Fields
IfxGeth_TxContextDescr0_Bits | C | Context Descriptor Format Bitfiled Access.
IfxGeth_TxDescr0_RF_Bits | R | Read Format Bitfiled Access.
uint32 | U | Unsigned access.
IfxGeth_TxDescr0_WF_Bits | W | Write-back Format Bitfiled Access.

◆ IfxGeth_TxDescr1

union IfxGeth_TxDescr1

TDES1.

Definition at line 628 of file IfxGeth.h.

Collaboration diagram for IfxGeth_TxDescr1:
[legend]
Data Fields
IfxGeth_TxContextDescr1_Bits | C | Context Descriptor Format Bitfiled Access.
IfxGeth_TxDescr1_RF_Bits | R | Read Format Bitfiled Access.
uint32 | U | Unsigned access.
IfxGeth_TxDescr1_WF_Bits | W | Write-back Format Bitfiled Access.

◆ IfxGeth_TxDescr2

union IfxGeth_TxDescr2

TDES2.

Definition at line 638 of file IfxGeth.h.

Collaboration diagram for IfxGeth_TxDescr2:
[legend]
Data Fields
IfxGeth_TxContextDescr2_Bits | C | COntext Descriptor Format Bitfiled Access.
IfxGeth_TxDescr2_RF_Bits | R | Read Format Bitfiled Access.
uint32 | U | Unsigned access.
IfxGeth_TxDescr2_WF_Bits | W | Write-back Format Bitfiled Access.

◆ IfxGeth_TxDescr3

union IfxGeth_TxDescr3

TDES3.

Definition at line 648 of file IfxGeth.h.

Collaboration diagram for IfxGeth_TxDescr3:
[legend]
Data Fields
IfxGeth_TxContextDescr3_Bits | C | Context Descriptor Format Bitfiled Access.
IfxGeth_TxDescr3_RF_Bits | R | Read Format Bitfiled Access.
uint32 | U | Unsigned access.
IfxGeth_TxDescr3_WF_Bits | W | Write-back Format Bitfiled Access.

◆ IfxGeth_RxDescrList

union IfxGeth_RxDescrList

Rx Descriptor List.

Definition at line 686 of file IfxGeth.h.

Collaboration diagram for IfxGeth_RxDescrList:
[legend]
Data Fields
volatile IfxGeth_RxDescr descr[IFXGETH_MAX_RX_DESCRIPTORS] list of RX descriptors

◆ IfxGeth_TxDescrList

union IfxGeth_TxDescrList

Tx Descriptor List.

Definition at line 693 of file IfxGeth.h.

Collaboration diagram for IfxGeth_TxDescrList:
[legend]
Data Fields
volatile IfxGeth_TxDescr descr[IFXGETH_MAX_TX_DESCRIPTORS] list of TX descriptors


iLLD_TC38A: GETH Pin Mapping

Data Structures | Macros | Variables
GETH Pin Mapping
iLLD » GETH
Collaboration diagram for GETH Pin Mapping:

Data Structures

struct | IfxGeth_Crs_In
CRS pin mapping structure. More...
struct | IfxGeth_Crsdv_In
CRSDV pin mapping structure. More...
struct | IfxGeth_Rxdv_In
RXDV pin mapping structure. More...
struct | IfxGeth_Rxctl_In
RXCTL pin mapping structure. More...
struct | IfxGeth_Grefclk_In
GREFCLK pin mapping structure. More...
struct | IfxGeth_Refclk_In
REFCLK pin mapping structure. More...
struct | IfxGeth_Rxclk_In
RXCLK pin mapping structure. More...
struct | IfxGeth_Txclk_In
TXCLK pin mapping structure. More...
struct | IfxGeth_Rxd_In
RXD pin mapping structure. More...
struct | IfxGeth_Col_In
COL pin mapping structure. More...
struct | IfxGeth_Mdc_Out
MDC pin mapping structure. More...
struct | IfxGeth_Mdio_InOut
MDIO pin mapping structure. More...
struct | IfxGeth_Txd_Out
TXD pin mapping structure. More...
struct | IfxGeth_Txclk_Out
TXCLK pin mapping structure. More...
struct | IfxGeth_Txen_Out
TXEN pin mapping structure. More...
struct | IfxGeth_Txer_Out
TXER pin mapping structure. More...
struct | IfxGeth_Txctl_Out
TXCTL pin mapping structure. More...
struct | IfxGeth_Rxer_In
RXER pin mapping structure. More...
struct | IfxGeth_Pps_Out
PPS pin mapping structure. More...

Macros

#define | IFXGETH_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXGETH_PINMAP_COL_IN_NUM_ITEMS 1
#define | IFXGETH_PINMAP_CRS_IN_NUM_ITEMS 2
#define | IFXGETH_PINMAP_CRSDV_IN_NUM_ITEMS 2
#define | IFXGETH_PINMAP_GREFCLK_IN_NUM_ITEMS 1
#define | IFXGETH_PINMAP_MDC_OUT_NUM_ITEMS 3
#define | IFXGETH_PINMAP_MDIO_INOUT_NUM_ITEMS 3
#define | IFXGETH_PINMAP_PPS_OUT_NUM_ITEMS 1
#define | IFXGETH_PINMAP_REFCLK_IN_NUM_ITEMS 1
#define | IFXGETH_PINMAP_RXCLK_IN_NUM_ITEMS 3
#define | IFXGETH_PINMAP_RXCTL_IN_NUM_ITEMS 1
#define | IFXGETH_PINMAP_RXD_IN_NUM_ITEMS 4
#define | IFXGETH_PINMAP_RXDV_IN_NUM_ITEMS 2
#define | IFXGETH_PINMAP_RXER_IN_NUM_ITEMS 3
#define | IFXGETH_PINMAP_TXCLK_IN_NUM_ITEMS 2
#define | IFXGETH_PINMAP_TXCLK_OUT_NUM_ITEMS 1
#define | IFXGETH_PINMAP_TXCTL_OUT_NUM_ITEMS 1
#define | IFXGETH_PINMAP_TXD_OUT_NUM_ITEMS 4
#define | IFXGETH_PINMAP_TXEN_OUT_NUM_ITEMS 1
#define | IFXGETH_PINMAP_TXER_OUT_NUM_ITEMS 1

Variables

IFX_EXTERN IfxGeth_Col_In IfxGeth_COL_P11_15_IN
Collision MII. More...
IFX_EXTERN IfxGeth_Crs_In IfxGeth_CRSA_P11_14_IN
Carrier Sense MII. More...
IFX_EXTERN IfxGeth_Crs_In IfxGeth_CRSB_P11_11_IN
Carrier Sense MII. More...
IFX_EXTERN IfxGeth_Crsdv_In IfxGeth_CRSDVA_P11_11_IN
Carrier Sense / Data Valid combi-signal for RMII. More...
IFX_EXTERN IfxGeth_Crsdv_In IfxGeth_CRSDVB_P11_14_IN
Carrier Sense / Data Valid combi-signal for RMII. More...
IFX_EXTERN IfxGeth_Grefclk_In IfxGeth_GREFCLK_P11_5_IN
Gigabit Reference Clock input for RGMII (125 MHz high precission) More...
IFX_EXTERN IfxGeth_Mdc_Out IfxGeth_MDC_P02_8_OUT
MDIO clock. More...
IFX_EXTERN IfxGeth_Mdc_Out IfxGeth_MDC_P12_0_OUT
MDIO clock. More...
IFX_EXTERN IfxGeth_Mdc_Out IfxGeth_MDC_P21_2_OUT
MDIO clock. More...
IFX_EXTERN IfxGeth_Mdio_InOut IfxGeth_MDIO_P00_0_INOUT
MDIO Output. More...
IFX_EXTERN IfxGeth_Mdio_InOut IfxGeth_MDIO_P12_1_INOUT
MDIO Output. More...
IFX_EXTERN IfxGeth_Mdio_InOut IfxGeth_MDIO_P21_3_INOUT
MDIO Output. More...
IFX_EXTERN IfxGeth_Pps_Out IfxGeth_PPS_P14_4_OUT
Pulse Per Second. More...
IFX_EXTERN IfxGeth_Refclk_In IfxGeth_REFCLKA_P11_12_IN
Reference Clock input for RMII (50 MHz) More...
IFX_EXTERN IfxGeth_Rxclk_In IfxGeth_RXCLKA_P11_12_IN
Receive Clock MII. More...
IFX_EXTERN IfxGeth_Rxclk_In IfxGeth_RXCLKB_P11_4_IN
Receive Clock MII. More...
IFX_EXTERN IfxGeth_Rxclk_In IfxGeth_RXCLKC_P12_0_IN
Receive Clock MII. More...
IFX_EXTERN IfxGeth_Rxctl_In IfxGeth_RXCTLA_P11_11_IN
Receive Control for RGMII. More...
IFX_EXTERN IfxGeth_Rxd_In IfxGeth_RXD0A_P11_10_IN
Receive Data 0 MII, RMII and RGMII (RGMII can use RXD0A only) More...
IFX_EXTERN IfxGeth_Rxd_In IfxGeth_RXD1A_P11_9_IN
Receive Data 1 MII, RMII and RGMII (RGMII can use RXD1A only) More...
IFX_EXTERN IfxGeth_Rxd_In IfxGeth_RXD2A_P11_8_IN
Receive Data 2 MII and RGMII (RGMII can use RXD2A only) More...
IFX_EXTERN IfxGeth_Rxd_In IfxGeth_RXD3A_P11_7_IN
Receive Data 3 MII and RGMII (RGMII can use RXD3A only) More...
IFX_EXTERN IfxGeth_Rxdv_In IfxGeth_RXDVA_P11_11_IN
Receive Data Valid MII. More...
IFX_EXTERN IfxGeth_Rxdv_In IfxGeth_RXDVB_P11_14_IN
Receive Data Valid MII. More...
IFX_EXTERN IfxGeth_Rxer_In IfxGeth_RXERA_P11_13_IN
Receive Error MII. More...
IFX_EXTERN IfxGeth_Rxer_In IfxGeth_RXERB_P21_7_IN
Receive Error MII. More...
IFX_EXTERN IfxGeth_Rxer_In IfxGeth_RXERC_P10_0_IN
Receive Error MII. More...
IFX_EXTERN IfxGeth_Txclk_In IfxGeth_TXCLKA_P11_5_IN
Transmit Clock Input for MII. More...
IFX_EXTERN IfxGeth_Txclk_In IfxGeth_TXCLKB_P11_12_IN
Transmit Clock Input for MII. More...
IFX_EXTERN IfxGeth_Txclk_Out IfxGeth_TXCLK_P11_4_OUT
Transmit Clock Output for RGMII. More...
IFX_EXTERN IfxGeth_Txctl_Out IfxGeth_TXCTL_P11_6_OUT
GETH_TXEN 0: Transmit Control for RGMII. More...
IFX_EXTERN IfxGeth_Txd_Out IfxGeth_TXD0_P11_3_OUT
Transmit Data. More...
IFX_EXTERN IfxGeth_Txd_Out IfxGeth_TXD1_P11_2_OUT
Transmit Data. More...
IFX_EXTERN IfxGeth_Txd_Out IfxGeth_TXD2_P11_1_OUT
Transmit Data. More...
IFX_EXTERN IfxGeth_Txd_Out IfxGeth_TXD3_P11_0_OUT
Transmit Data. More...
IFX_EXTERN IfxGeth_Txen_Out IfxGeth_TXEN_P11_6_OUT
Transmit Enable MII and RMII. More...
IFX_EXTERN IfxGeth_Txer_Out IfxGeth_TXER_P11_4_OUT
Transmit Error MII. More...
IFX_EXTERN const IfxGeth_Col_In * | IfxGeth_Col_In_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_COL_IN_NUM_ITEMS]
IfxGeth_Col_In table. More...
IFX_EXTERN const IfxGeth_Crs_In * | IfxGeth_Crs_In_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_CRS_IN_NUM_ITEMS]
IfxGeth_Crs_In table. More...
IFX_EXTERN const IfxGeth_Crsdv_In * | IfxGeth_Crsdv_In_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_CRSDV_IN_NUM_ITEMS]
IfxGeth_Crsdv_In table. More...
IFX_EXTERN const IfxGeth_Grefclk_In * | IfxGeth_Grefclk_In_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_GREFCLK_IN_NUM_ITEMS]
IfxGeth_Grefclk_In table. More...
IFX_EXTERN const IfxGeth_Mdc_Out * | IfxGeth_Mdc_Out_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_MDC_OUT_NUM_ITEMS]
IfxGeth_Mdc_Out table. More...
IFX_EXTERN const IfxGeth_Mdio_InOut * | IfxGeth_Mdio_InOut_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_MDIO_INOUT_NUM_ITEMS]
IfxGeth_Mdio_InOut table. More...
IFX_EXTERN const IfxGeth_Pps_Out * | IfxGeth_Pps_Out_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_PPS_OUT_NUM_ITEMS]
IfxGeth_Pps_Out table. More...
IFX_EXTERN const IfxGeth_Refclk_In * | IfxGeth_Refclk_In_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_REFCLK_IN_NUM_ITEMS]
IfxGeth_Refclk_In table. More...
IFX_EXTERN const IfxGeth_Rxclk_In * | IfxGeth_Rxclk_In_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_RXCLK_IN_NUM_ITEMS]
IfxGeth_Rxclk_In table. More...
IFX_EXTERN const IfxGeth_Rxctl_In * | IfxGeth_Rxctl_In_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_RXCTL_IN_NUM_ITEMS]
IfxGeth_Rxctl_In table. More...
IFX_EXTERN const IfxGeth_Rxd_In * | IfxGeth_Rxd_In_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_RXD_IN_NUM_ITEMS]
IfxGeth_Rxd_In table. More...
IFX_EXTERN const IfxGeth_Rxdv_In * | IfxGeth_Rxdv_In_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_RXDV_IN_NUM_ITEMS]
IfxGeth_Rxdv_In table. More...
IFX_EXTERN const IfxGeth_Rxer_In * | IfxGeth_Rxer_In_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_RXER_IN_NUM_ITEMS]
IfxGeth_Rxer_In table. More...
IFX_EXTERN const IfxGeth_Txclk_In * | IfxGeth_Txclk_In_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXCLK_IN_NUM_ITEMS]
IfxGeth_Txclk_In table. More...
IFX_EXTERN const IfxGeth_Txclk_Out * | IfxGeth_Txclk_Out_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXCLK_OUT_NUM_ITEMS]
IfxGeth_Txclk_Out table. More...
IFX_EXTERN const IfxGeth_Txctl_Out * | IfxGeth_Txctl_Out_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXCTL_OUT_NUM_ITEMS]
IfxGeth_Txctl_Out table. More...
IFX_EXTERN const IfxGeth_Txd_Out * | IfxGeth_Txd_Out_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXD_OUT_NUM_ITEMS]
IfxGeth_Txd_Out table. More...
IFX_EXTERN const IfxGeth_Txen_Out * | IfxGeth_Txen_Out_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXEN_OUT_NUM_ITEMS]
IfxGeth_Txen_Out table. More...
IFX_EXTERN const IfxGeth_Txer_Out * | IfxGeth_Txer_Out_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXER_OUT_NUM_ITEMS]
IfxGeth_Txer_Out table. More...

Detailed Description

Data Structure Documentation

◆ IfxGeth_Crs_In

struct IfxGeth_Crs_In

CRS pin mapping structure.

Definition at line 56 of file IfxGeth_PinMap.h.

Collaboration diagram for IfxGeth_Crs_In:
[legend]
Data Fields
Ifx_GETH * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxGeth_Crsdv_In

struct IfxGeth_Crsdv_In

CRSDV pin mapping structure.

Definition at line 64 of file IfxGeth_PinMap.h.

Collaboration diagram for IfxGeth_Crsdv_In:
[legend]
Data Fields
Ifx_GETH * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxGeth_Rxdv_In

struct IfxGeth_Rxdv_In

RXDV pin mapping structure.

Definition at line 72 of file IfxGeth_PinMap.h.

Collaboration diagram for IfxGeth_Rxdv_In:
[legend]
Data Fields
Ifx_GETH * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxGeth_Rxctl_In

struct IfxGeth_Rxctl_In

RXCTL pin mapping structure.

Definition at line 80 of file IfxGeth_PinMap.h.

Collaboration diagram for IfxGeth_Rxctl_In:
[legend]
Data Fields
Ifx_GETH * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxGeth_Grefclk_In

struct IfxGeth_Grefclk_In

GREFCLK pin mapping structure.

Definition at line 88 of file IfxGeth_PinMap.h.

Collaboration diagram for IfxGeth_Grefclk_In:
[legend]
Data Fields
Ifx_GETH * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxGeth_Refclk_In

struct IfxGeth_Refclk_In

REFCLK pin mapping structure.

Definition at line 96 of file IfxGeth_PinMap.h.

Collaboration diagram for IfxGeth_Refclk_In:
[legend]
Data Fields
Ifx_GETH * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxGeth_Rxclk_In

struct IfxGeth_Rxclk_In

RXCLK pin mapping structure.

Definition at line 104 of file IfxGeth_PinMap.h.

Collaboration diagram for IfxGeth_Rxclk_In:
[legend]
Data Fields
Ifx_GETH * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxGeth_Txclk_In

struct IfxGeth_Txclk_In

TXCLK pin mapping structure.

Definition at line 112 of file IfxGeth_PinMap.h.

Collaboration diagram for IfxGeth_Txclk_In:
[legend]
Data Fields
Ifx_GETH * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxGeth_Rxd_In

struct IfxGeth_Rxd_In

RXD pin mapping structure.

Definition at line 120 of file IfxGeth_PinMap.h.

Collaboration diagram for IfxGeth_Rxd_In:
[legend]
Data Fields
Ifx_GETH * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxGeth_Col_In

struct IfxGeth_Col_In

COL pin mapping structure.

Definition at line 128 of file IfxGeth_PinMap.h.

Collaboration diagram for IfxGeth_Col_In:
[legend]
Data Fields
Ifx_GETH * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxGeth_Mdc_Out

struct IfxGeth_Mdc_Out

MDC pin mapping structure.

Definition at line 136 of file IfxGeth_PinMap.h.

Collaboration diagram for IfxGeth_Mdc_Out:
[legend]
Data Fields
Ifx_GETH * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxGeth_Mdio_InOut

struct IfxGeth_Mdio_InOut

MDIO pin mapping structure.

Definition at line 144 of file IfxGeth_PinMap.h.

Collaboration diagram for IfxGeth_Mdio_InOut:
[legend]
Data Fields
Ifx_RxSel | inSelect | Input multiplexer value.
Ifx_GETH * | module | Base address.
IfxPort_OutputIdx | outSelect | Port control code.
IfxPort_Pin | pin | Port pin.

◆ IfxGeth_Txd_Out

struct IfxGeth_Txd_Out

TXD pin mapping structure.

Definition at line 153 of file IfxGeth_PinMap.h.

Collaboration diagram for IfxGeth_Txd_Out:
[legend]
Data Fields
Ifx_GETH * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxGeth_Txclk_Out

struct IfxGeth_Txclk_Out

TXCLK pin mapping structure.

Definition at line 161 of file IfxGeth_PinMap.h.

Collaboration diagram for IfxGeth_Txclk_Out:
[legend]
Data Fields
Ifx_GETH * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxGeth_Txen_Out

struct IfxGeth_Txen_Out

TXEN pin mapping structure.

Definition at line 169 of file IfxGeth_PinMap.h.

Collaboration diagram for IfxGeth_Txen_Out:
[legend]
Data Fields
Ifx_GETH * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxGeth_Txer_Out

struct IfxGeth_Txer_Out

TXER pin mapping structure.

Definition at line 177 of file IfxGeth_PinMap.h.

Collaboration diagram for IfxGeth_Txer_Out:
[legend]
Data Fields
Ifx_GETH * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxGeth_Txctl_Out

struct IfxGeth_Txctl_Out

TXCTL pin mapping structure.

Definition at line 185 of file IfxGeth_PinMap.h.

Collaboration diagram for IfxGeth_Txctl_Out:
[legend]
Data Fields
Ifx_GETH * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxGeth_Rxer_In

struct IfxGeth_Rxer_In

RXER pin mapping structure.

Definition at line 193 of file IfxGeth_PinMap.h.

Collaboration diagram for IfxGeth_Rxer_In:
[legend]
Data Fields
Ifx_GETH * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxGeth_Pps_Out

struct IfxGeth_Pps_Out

PPS pin mapping structure.

Definition at line 201 of file IfxGeth_PinMap.h.

Collaboration diagram for IfxGeth_Pps_Out:
[legend]
Data Fields
Ifx_GETH * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

Macro Definition Documentation

◆ IFXGETH_PINMAP_COL_IN_NUM_ITEMS

#define IFXGETH_PINMAP_COL_IN_NUM_ITEMS 1

Definition at line 248 of file IfxGeth_PinMap.h.

◆ IFXGETH_PINMAP_CRS_IN_NUM_ITEMS

#define IFXGETH_PINMAP_CRS_IN_NUM_ITEMS 2

Definition at line 249 of file IfxGeth_PinMap.h.

◆ IFXGETH_PINMAP_CRSDV_IN_NUM_ITEMS

#define IFXGETH_PINMAP_CRSDV_IN_NUM_ITEMS 2

Definition at line 250 of file IfxGeth_PinMap.h.

◆ IFXGETH_PINMAP_GREFCLK_IN_NUM_ITEMS

#define IFXGETH_PINMAP_GREFCLK_IN_NUM_ITEMS 1

Definition at line 251 of file IfxGeth_PinMap.h.

◆ IFXGETH_PINMAP_MDC_OUT_NUM_ITEMS

#define IFXGETH_PINMAP_MDC_OUT_NUM_ITEMS 3

Definition at line 252 of file IfxGeth_PinMap.h.

◆ IFXGETH_PINMAP_MDIO_INOUT_NUM_ITEMS

#define IFXGETH_PINMAP_MDIO_INOUT_NUM_ITEMS 3

Definition at line 253 of file IfxGeth_PinMap.h.

◆ IFXGETH_PINMAP_NUM_MODULES

#define IFXGETH_PINMAP_NUM_MODULES 1

Table dimensions.

Definition at line 247 of file IfxGeth_PinMap.h.

◆ IFXGETH_PINMAP_PPS_OUT_NUM_ITEMS

#define IFXGETH_PINMAP_PPS_OUT_NUM_ITEMS 1

Definition at line 254 of file IfxGeth_PinMap.h.

◆ IFXGETH_PINMAP_REFCLK_IN_NUM_ITEMS

#define IFXGETH_PINMAP_REFCLK_IN_NUM_ITEMS 1

Definition at line 255 of file IfxGeth_PinMap.h.

◆ IFXGETH_PINMAP_RXCLK_IN_NUM_ITEMS

#define IFXGETH_PINMAP_RXCLK_IN_NUM_ITEMS 3

Definition at line 256 of file IfxGeth_PinMap.h.

◆ IFXGETH_PINMAP_RXCTL_IN_NUM_ITEMS

#define IFXGETH_PINMAP_RXCTL_IN_NUM_ITEMS 1

Definition at line 257 of file IfxGeth_PinMap.h.

◆ IFXGETH_PINMAP_RXD_IN_NUM_ITEMS

#define IFXGETH_PINMAP_RXD_IN_NUM_ITEMS 4

Definition at line 258 of file IfxGeth_PinMap.h.

◆ IFXGETH_PINMAP_RXDV_IN_NUM_ITEMS

#define IFXGETH_PINMAP_RXDV_IN_NUM_ITEMS 2

Definition at line 259 of file IfxGeth_PinMap.h.

◆ IFXGETH_PINMAP_RXER_IN_NUM_ITEMS

#define IFXGETH_PINMAP_RXER_IN_NUM_ITEMS 3

Definition at line 260 of file IfxGeth_PinMap.h.

◆ IFXGETH_PINMAP_TXCLK_IN_NUM_ITEMS

#define IFXGETH_PINMAP_TXCLK_IN_NUM_ITEMS 2

Definition at line 261 of file IfxGeth_PinMap.h.

◆ IFXGETH_PINMAP_TXCLK_OUT_NUM_ITEMS

#define IFXGETH_PINMAP_TXCLK_OUT_NUM_ITEMS 1

Definition at line 262 of file IfxGeth_PinMap.h.

◆ IFXGETH_PINMAP_TXCTL_OUT_NUM_ITEMS

#define IFXGETH_PINMAP_TXCTL_OUT_NUM_ITEMS 1

Definition at line 263 of file IfxGeth_PinMap.h.

◆ IFXGETH_PINMAP_TXD_OUT_NUM_ITEMS

#define IFXGETH_PINMAP_TXD_OUT_NUM_ITEMS 4

Definition at line 264 of file IfxGeth_PinMap.h.

◆ IFXGETH_PINMAP_TXEN_OUT_NUM_ITEMS

#define IFXGETH_PINMAP_TXEN_OUT_NUM_ITEMS 1

Definition at line 265 of file IfxGeth_PinMap.h.

◆ IFXGETH_PINMAP_TXER_OUT_NUM_ITEMS

#define IFXGETH_PINMAP_TXER_OUT_NUM_ITEMS 1

Definition at line 266 of file IfxGeth_PinMap.h.

Variable Documentation

◆ IfxGeth_Col_In_pinTable

IFX_EXTERN const IfxGeth_Col_In* IfxGeth_Col_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_COL_IN_NUM_ITEMS]

IfxGeth_Col_In table.

Definition at line 270 of file IfxGeth_PinMap.h.

◆ IfxGeth_COL_P11_15_IN

IFX_EXTERN IfxGeth_Col_In IfxGeth_COL_P11_15_IN

Collision MII.

Definition at line 208 of file IfxGeth_PinMap.h.

◆ IfxGeth_Crs_In_pinTable

IFX_EXTERN const IfxGeth_Crs_In* IfxGeth_Crs_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_CRS_IN_NUM_ITEMS]

IfxGeth_Crs_In table.

Definition at line 273 of file IfxGeth_PinMap.h.

◆ IfxGeth_CRSA_P11_14_IN

IFX_EXTERN IfxGeth_Crs_In IfxGeth_CRSA_P11_14_IN

Carrier Sense MII.

Definition at line 209 of file IfxGeth_PinMap.h.

◆ IfxGeth_CRSB_P11_11_IN

IFX_EXTERN IfxGeth_Crs_In IfxGeth_CRSB_P11_11_IN

Carrier Sense MII.

Definition at line 210 of file IfxGeth_PinMap.h.

◆ IfxGeth_Crsdv_In_pinTable

IFX_EXTERN const IfxGeth_Crsdv_In* IfxGeth_Crsdv_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_CRSDV_IN_NUM_ITEMS]

IfxGeth_Crsdv_In table.

Definition at line 276 of file IfxGeth_PinMap.h.

◆ IfxGeth_CRSDVA_P11_11_IN

IFX_EXTERN IfxGeth_Crsdv_In IfxGeth_CRSDVA_P11_11_IN

Carrier Sense / Data Valid combi-signal for RMII.

Definition at line 211 of file IfxGeth_PinMap.h.

◆ IfxGeth_CRSDVB_P11_14_IN

IFX_EXTERN IfxGeth_Crsdv_In IfxGeth_CRSDVB_P11_14_IN

Carrier Sense / Data Valid combi-signal for RMII.

Definition at line 212 of file IfxGeth_PinMap.h.

◆ IfxGeth_Grefclk_In_pinTable

IFX_EXTERN const IfxGeth_Grefclk_In* IfxGeth_Grefclk_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_GREFCLK_IN_NUM_ITEMS]

IfxGeth_Grefclk_In table.

Definition at line 279 of file IfxGeth_PinMap.h.

◆ IfxGeth_GREFCLK_P11_5_IN

IFX_EXTERN IfxGeth_Grefclk_In IfxGeth_GREFCLK_P11_5_IN

Gigabit Reference Clock input for RGMII (125 MHz high precission)

Definition at line 213 of file IfxGeth_PinMap.h.

◆ IfxGeth_Mdc_Out_pinTable

IFX_EXTERN const IfxGeth_Mdc_Out* IfxGeth_Mdc_Out_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_MDC_OUT_NUM_ITEMS]

IfxGeth_Mdc_Out table.

Definition at line 282 of file IfxGeth_PinMap.h.

◆ IfxGeth_MDC_P02_8_OUT

IFX_EXTERN IfxGeth_Mdc_Out IfxGeth_MDC_P02_8_OUT

MDIO clock.

Definition at line 214 of file IfxGeth_PinMap.h.

◆ IfxGeth_MDC_P12_0_OUT

IFX_EXTERN IfxGeth_Mdc_Out IfxGeth_MDC_P12_0_OUT

MDIO clock.

Definition at line 215 of file IfxGeth_PinMap.h.

◆ IfxGeth_MDC_P21_2_OUT

IFX_EXTERN IfxGeth_Mdc_Out IfxGeth_MDC_P21_2_OUT

MDIO clock.

Definition at line 216 of file IfxGeth_PinMap.h.

◆ IfxGeth_Mdio_InOut_pinTable

IFX_EXTERN const IfxGeth_Mdio_InOut* IfxGeth_Mdio_InOut_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_MDIO_INOUT_NUM_ITEMS]

IfxGeth_Mdio_InOut table.

Definition at line 285 of file IfxGeth_PinMap.h.

◆ IfxGeth_MDIO_P00_0_INOUT

IFX_EXTERN IfxGeth_Mdio_InOut IfxGeth_MDIO_P00_0_INOUT

MDIO Output.

Definition at line 217 of file IfxGeth_PinMap.h.

◆ IfxGeth_MDIO_P12_1_INOUT

IFX_EXTERN IfxGeth_Mdio_InOut IfxGeth_MDIO_P12_1_INOUT

MDIO Output.

Definition at line 218 of file IfxGeth_PinMap.h.

◆ IfxGeth_MDIO_P21_3_INOUT

IFX_EXTERN IfxGeth_Mdio_InOut IfxGeth_MDIO_P21_3_INOUT

MDIO Output.

Definition at line 219 of file IfxGeth_PinMap.h.

◆ IfxGeth_Pps_Out_pinTable

IFX_EXTERN const IfxGeth_Pps_Out* IfxGeth_Pps_Out_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_PPS_OUT_NUM_ITEMS]

IfxGeth_Pps_Out table.

Definition at line 288 of file IfxGeth_PinMap.h.

◆ IfxGeth_PPS_P14_4_OUT

IFX_EXTERN IfxGeth_Pps_Out IfxGeth_PPS_P14_4_OUT

Pulse Per Second.

Definition at line 220 of file IfxGeth_PinMap.h.

◆ IfxGeth_Refclk_In_pinTable

IFX_EXTERN const IfxGeth_Refclk_In* IfxGeth_Refclk_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_REFCLK_IN_NUM_ITEMS]

IfxGeth_Refclk_In table.

Definition at line 291 of file IfxGeth_PinMap.h.

◆ IfxGeth_REFCLKA_P11_12_IN

IFX_EXTERN IfxGeth_Refclk_In IfxGeth_REFCLKA_P11_12_IN

Reference Clock input for RMII (50 MHz)

Definition at line 221 of file IfxGeth_PinMap.h.

◆ IfxGeth_Rxclk_In_pinTable

IFX_EXTERN const IfxGeth_Rxclk_In* IfxGeth_Rxclk_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_RXCLK_IN_NUM_ITEMS]

IfxGeth_Rxclk_In table.

Definition at line 294 of file IfxGeth_PinMap.h.

◆ IfxGeth_RXCLKA_P11_12_IN

IFX_EXTERN IfxGeth_Rxclk_In IfxGeth_RXCLKA_P11_12_IN

Receive Clock MII.

Definition at line 222 of file IfxGeth_PinMap.h.

◆ IfxGeth_RXCLKB_P11_4_IN

IFX_EXTERN IfxGeth_Rxclk_In IfxGeth_RXCLKB_P11_4_IN

Receive Clock MII.

Definition at line 223 of file IfxGeth_PinMap.h.

◆ IfxGeth_RXCLKC_P12_0_IN

IFX_EXTERN IfxGeth_Rxclk_In IfxGeth_RXCLKC_P12_0_IN

Receive Clock MII.

Definition at line 224 of file IfxGeth_PinMap.h.

◆ IfxGeth_Rxctl_In_pinTable

IFX_EXTERN const IfxGeth_Rxctl_In* IfxGeth_Rxctl_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_RXCTL_IN_NUM_ITEMS]

IfxGeth_Rxctl_In table.

Definition at line 297 of file IfxGeth_PinMap.h.

◆ IfxGeth_RXCTLA_P11_11_IN

IFX_EXTERN IfxGeth_Rxctl_In IfxGeth_RXCTLA_P11_11_IN

Receive Control for RGMII.

Definition at line 225 of file IfxGeth_PinMap.h.

◆ IfxGeth_RXD0A_P11_10_IN

IFX_EXTERN IfxGeth_Rxd_In IfxGeth_RXD0A_P11_10_IN

Receive Data 0 MII, RMII and RGMII (RGMII can use RXD0A only)

Definition at line 226 of file IfxGeth_PinMap.h.

◆ IfxGeth_RXD1A_P11_9_IN

IFX_EXTERN IfxGeth_Rxd_In IfxGeth_RXD1A_P11_9_IN

Receive Data 1 MII, RMII and RGMII (RGMII can use RXD1A only)

Definition at line 227 of file IfxGeth_PinMap.h.

◆ IfxGeth_RXD2A_P11_8_IN

IFX_EXTERN IfxGeth_Rxd_In IfxGeth_RXD2A_P11_8_IN

Receive Data 2 MII and RGMII (RGMII can use RXD2A only)

Definition at line 228 of file IfxGeth_PinMap.h.

◆ IfxGeth_RXD3A_P11_7_IN

IFX_EXTERN IfxGeth_Rxd_In IfxGeth_RXD3A_P11_7_IN

Receive Data 3 MII and RGMII (RGMII can use RXD3A only)

Definition at line 229 of file IfxGeth_PinMap.h.

◆ IfxGeth_Rxd_In_pinTable

IFX_EXTERN const IfxGeth_Rxd_In* IfxGeth_Rxd_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_RXD_IN_NUM_ITEMS]

IfxGeth_Rxd_In table.

Definition at line 300 of file IfxGeth_PinMap.h.

◆ IfxGeth_Rxdv_In_pinTable

IFX_EXTERN const IfxGeth_Rxdv_In* IfxGeth_Rxdv_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_RXDV_IN_NUM_ITEMS]

IfxGeth_Rxdv_In table.

Definition at line 303 of file IfxGeth_PinMap.h.

◆ IfxGeth_RXDVA_P11_11_IN

IFX_EXTERN IfxGeth_Rxdv_In IfxGeth_RXDVA_P11_11_IN

Receive Data Valid MII.

Definition at line 230 of file IfxGeth_PinMap.h.

◆ IfxGeth_RXDVB_P11_14_IN

IFX_EXTERN IfxGeth_Rxdv_In IfxGeth_RXDVB_P11_14_IN

Receive Data Valid MII.

Definition at line 231 of file IfxGeth_PinMap.h.

◆ IfxGeth_Rxer_In_pinTable

IFX_EXTERN const IfxGeth_Rxer_In* IfxGeth_Rxer_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_RXER_IN_NUM_ITEMS]

IfxGeth_Rxer_In table.

Definition at line 306 of file IfxGeth_PinMap.h.

◆ IfxGeth_RXERA_P11_13_IN

IFX_EXTERN IfxGeth_Rxer_In IfxGeth_RXERA_P11_13_IN

Receive Error MII.

Definition at line 232 of file IfxGeth_PinMap.h.

◆ IfxGeth_RXERB_P21_7_IN

IFX_EXTERN IfxGeth_Rxer_In IfxGeth_RXERB_P21_7_IN

Receive Error MII.

Definition at line 233 of file IfxGeth_PinMap.h.

◆ IfxGeth_RXERC_P10_0_IN

IFX_EXTERN IfxGeth_Rxer_In IfxGeth_RXERC_P10_0_IN

Receive Error MII.

Definition at line 234 of file IfxGeth_PinMap.h.

◆ IfxGeth_Txclk_In_pinTable

IFX_EXTERN const IfxGeth_Txclk_In* IfxGeth_Txclk_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXCLK_IN_NUM_ITEMS]

IfxGeth_Txclk_In table.

Definition at line 309 of file IfxGeth_PinMap.h.

◆ IfxGeth_Txclk_Out_pinTable

IFX_EXTERN const IfxGeth_Txclk_Out* IfxGeth_Txclk_Out_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXCLK_OUT_NUM_ITEMS]

IfxGeth_Txclk_Out table.

Definition at line 312 of file IfxGeth_PinMap.h.

◆ IfxGeth_TXCLK_P11_4_OUT

IFX_EXTERN IfxGeth_Txclk_Out IfxGeth_TXCLK_P11_4_OUT

Transmit Clock Output for RGMII.

Definition at line 237 of file IfxGeth_PinMap.h.

◆ IfxGeth_TXCLKA_P11_5_IN

IFX_EXTERN IfxGeth_Txclk_In IfxGeth_TXCLKA_P11_5_IN

Transmit Clock Input for MII.

Definition at line 235 of file IfxGeth_PinMap.h.

◆ IfxGeth_TXCLKB_P11_12_IN

IFX_EXTERN IfxGeth_Txclk_In IfxGeth_TXCLKB_P11_12_IN

Transmit Clock Input for MII.

Definition at line 236 of file IfxGeth_PinMap.h.

◆ IfxGeth_Txctl_Out_pinTable

IFX_EXTERN const IfxGeth_Txctl_Out* IfxGeth_Txctl_Out_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXCTL_OUT_NUM_ITEMS]

IfxGeth_Txctl_Out table.

Definition at line 315 of file IfxGeth_PinMap.h.

◆ IfxGeth_TXCTL_P11_6_OUT

IFX_EXTERN IfxGeth_Txctl_Out IfxGeth_TXCTL_P11_6_OUT

GETH_TXEN 0: Transmit Control for RGMII.

Definition at line 238 of file IfxGeth_PinMap.h.

◆ IfxGeth_TXD0_P11_3_OUT

IFX_EXTERN IfxGeth_Txd_Out IfxGeth_TXD0_P11_3_OUT

Transmit Data.

Definition at line 239 of file IfxGeth_PinMap.h.

◆ IfxGeth_TXD1_P11_2_OUT

IFX_EXTERN IfxGeth_Txd_Out IfxGeth_TXD1_P11_2_OUT

Transmit Data.

Definition at line 240 of file IfxGeth_PinMap.h.

◆ IfxGeth_TXD2_P11_1_OUT

IFX_EXTERN IfxGeth_Txd_Out IfxGeth_TXD2_P11_1_OUT

Transmit Data.

Definition at line 241 of file IfxGeth_PinMap.h.

◆ IfxGeth_TXD3_P11_0_OUT

IFX_EXTERN IfxGeth_Txd_Out IfxGeth_TXD3_P11_0_OUT

Transmit Data.

Definition at line 242 of file IfxGeth_PinMap.h.

◆ IfxGeth_Txd_Out_pinTable

IFX_EXTERN const IfxGeth_Txd_Out* IfxGeth_Txd_Out_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXD_OUT_NUM_ITEMS]

IfxGeth_Txd_Out table.

Definition at line 318 of file IfxGeth_PinMap.h.

◆ IfxGeth_Txen_Out_pinTable

IFX_EXTERN const IfxGeth_Txen_Out* IfxGeth_Txen_Out_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXEN_OUT_NUM_ITEMS]

IfxGeth_Txen_Out table.

Definition at line 321 of file IfxGeth_PinMap.h.

◆ IfxGeth_TXEN_P11_6_OUT

IFX_EXTERN IfxGeth_Txen_Out IfxGeth_TXEN_P11_6_OUT

Transmit Enable MII and RMII.

Definition at line 243 of file IfxGeth_PinMap.h.

◆ IfxGeth_Txer_Out_pinTable

IFX_EXTERN const IfxGeth_Txer_Out* IfxGeth_Txer_Out_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXER_OUT_NUM_ITEMS]

IfxGeth_Txer_Out table.

Definition at line 324 of file IfxGeth_PinMap.h.

◆ IfxGeth_TXER_P11_4_OUT

IFX_EXTERN IfxGeth_Txer_Out IfxGeth_TXER_P11_4_OUT

Transmit Error MII.

Definition at line 244 of file IfxGeth_PinMap.h.


iLLD_TC38A: How to use the Geth Eth Interface driver?

How to use the Geth Eth Interface driver?
iLLD » GETH
Collaboration diagram for How to use the Geth Eth Interface driver?:

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Geth/Eth/IfxGeth_Eth.h>

Variables

Declare the Geth handle and the Data buffers as global variables in your C code:

Note: MAC addds 4 bytes FCS at the end of each packet which will be reflected in RX Buffer. If the frame size is equal to buffer size then Rx buffer declaration should be as below

uint8 channel0RxBuffer1[IFXGETH_MAX_RX_BUFFER_SIZE+4];
// used globally
IfxGeth_Eth geth;
#define IFXGETH_MAX_TX_DESCRIPTORS 4
#define IFXGETH_MAX_RX_DESCRIPTORS 4
#define IFXGETH_MAX_TX_BUFFER_SIZE 256 // bytes
#define IFXGETH_MAX_RX_BUFFER_SIZE 256 // bytes
#define IFXGETH_HEADER_LENGTH 14 // words
uint8 channel0TxBuffer1[IFXGETH_MAX_TX_BUFFER_SIZE];
uint8 channel0RxBuffer1[IFXGETH_MAX_RX_BUFFER_SIZE];
const uint8 myMacAddress[6] = {0x00, 0x11, 0x22, 0x33, 0x44, 0x55};

Module Initialisation

The module initialisation can be done in the same function. Here an example:

// create module config
IfxGeth_Eth_Config config;
// Geth instance index
IfxGeth_Index gethInst;
// Initialise configuration of module
IfxGeth_Eth_initModuleConfig(&config, &MODULE_GETH);
// Get the Geth instance from Module address
gethInst = IfxGeth_getIndex(geth[geth_inst].gethSFR);
config.phyInterfaceMode = IfxGeth_PhyInterfaceMode_rmii;
// MAC core configuration
config.macConfig.lineSpeed = IfxGeth_LineSpeed_100Mbps;
config.macConfig.loopbackMode = IfxGeth_LoopbackMode_disable;
config.macConfig.macAddress[0] = myMacAddress[0];
config.macConfig.macAddress[1] = myMacAddress[1];
config.macConfig.macAddress[2] = myMacAddress[2];
config.macConfig.macAddress[3] = myMacAddress[3];
config.macConfig.macAddress[4] = myMacAddress[4];
config.macConfig.macAddress[5] = myMacAddress[5];
// MTL configuration
config.mtlConfig.numOfTxQueues = 1;
config.mtlConfig.numOfRxQueues = 1;
config.mtlConfig.txQueueConfig[0].txQueueSize = IfxGeth_QueueSize_256Bytes;
config.mtlConfig.rxQueueConfig[0].rxQueueSize = IfxGeth_QueueSize_256Bytes;
config.mtlConfig.rxQueueConfig[0].rxDmaChannelMap = IfxEth_RxDmaChannel_0;
config.dmaConfig.numOfTxChannels = 1;
config.dmaConfig.numOfRxChannels = 1;
config.dmaConfig.txChannel[0].channelId = IfxGeth_TxDmaChannel_0;
config.dmaConfig.txChannel[0].txDescrList = &IfxGeth_txDescrList[gethInst][0]; //Initialise tx desc list for the Geth instance
config.dmaConfig.txChannel[0].txBuffer1StartAddress = &channel0TxBuffer1[0]; // user buffer
config.dmaConfig.txChannel[0].txBuffer1Size = IFXGETH_MAX_TX_BUFFER_SIZE; // used to calculate the next descriptor buffer offset
config.dmaConfig.rxChannel[0].channelId = IfxGeth_RxDmaChannel_0;
config.dmaConfig.rxChannel[0].rxDescrList = &IfxGeth_rxDescrList[gethInst][0]; //Initialise rx desc list for the Geth instance
config.dmaConfig.rxChannel[0].rxBuffer1StartAddress = &channel0RxBuffer1[0]; // user buffer
config.dmaConfig.rxChannel[0].rxBuffer1Size = IFXGETH_MAX_RX_BUFFER_SIZE; // user defined variable
config.dmaConfig.txInterrupt[0].channelId = IfxGeth_DmaChannel_0;
config.dmaConfig.txInterrupt[0].priority = 10; // priority
config.dmaConfig.txInterrupt[0].provider = IfxSrc_Tos_cpu0;
config.dmaConfig.rxInterrupt[0].channelId = IfxGeth_DmaChannel_0;
config.dmaConfig.rxInterrupt[0].priority = 11; // priority
config.dmaConfig.rxInterrupt[0].provider = IfxSrc_Tos_cpu0;
// initialise themodule
IfxGeth_Eth_initModule(&geth, &config);
// and enable transmitter/receiver
IfxGeth_Eth_startTransmitters(&geth, 1);
IfxGeth_Eth_startReceivers(&geth, 1);

Note: Application should explicitly configure the system DMA, if system DMA is selected as the service provider for the interrupt.

The ETH is ready for use now!

Data Transfers

Transmission

uint32 payloadLength = 8; // 8 bytes
uint32 packetLength = IFXGETH_HEADER_LENGTH + payloadLength;
// get free buffer
uint8 *pTxBuf = (uint8*) IfxGeth_Eth_waitTransmitBuffer(&geth, IfxGeth_TxDmaChannel_0);
// write the header
IfxGeth_Eth_writeHeader(&geth, pTxBuf, (uint8 *)myMacAddress, (uint8 *)myMacAddress, payloadLength);
// write the payload
uint32 i;
for(i = IFXGETH_HEADER_LENGTH; i < packetLength; ++i) {
pTxBuf[i] = i - 13;
}
// clear the TX interrupt status
IfxGeth_dma_clearInterruptFlag(geth->gethSFR, IfxGeth_DmaChannel_0,IfxGeth_DmaInterruptFlag_transmitInterrupt) ;
IfxGeth_Eth_sendTransmitBuffer(&geth, packetLength, IfxGeth_TxDmaChannel_0);
// wait until buffer has been transmitted
while( IfxGeth_dma_isInterruptFlagSet(geth->gethSFR, IfxGeth_DmaChannel_0, IfxGeth_DmaInterruptFlag_transmitInterrupt) == FALSE );
// clear the TX interrupt status for the next interrupt to come
IfxGeth_dma_clearInterruptFlag(geth->gethSFR, IfxGeth_DmaChannel_0, IfxGeth_DmaInterruptFlag_transmitInterrupt) ;

Receive

// wait until data is been received
while(IfxGeth_Eth_isRxDataAvailable(&geth, IfxGeth_RxDmaChannel_0)!= TRUE);
// wake up the receiver and get the recieve buffer
uint8 *pRxBuf = (uint8*)IfxGeth_Eth_getReceiveBuffer(&geth, IfxGeth_RxDmaChannel_0);
// update the descreptor pointer for next packet
// Free the receive buffer, enabling it for the further reception
IfxGeth_Eth_freeReceiveBuffer(&geth, IfxGeth_RxDmaChannel_0);
// data is available in pRxBuf

Giant Frame Transmission

Giant frames are supported by ethernet driver. By default any frames greater than 1518 bytes are considered as giant frames in the code. Giant frames of length 16376 bytes can be transmitted. Giant frames of length 16380 bytes can be received by the MAC.(Including the 4 bytes of FCS added by transmitter MAC).

The minimum allowed packet size above which the frame is indicated as giant frame is configured as below

In the module initialisation section, make changes

IfxGeth_Eth_Config config;
IfxGeth_Eth_initModuleConfig(&config, &MODULE_GETH);
config.macConfig.maxPacketSize = 2000;

The above code ensures that any frame of frame size greater than 2000 bytes are set as giant frame in Rx descriptor status. Note: This frame size includes the 4 bytes FCS added by the transmitter MAC. Make sure that an Rx buffer has enough space to recieve the giant frame.

There are 3 categories under which giant frames can be categoried:

  1. Frame size = 1518 - If frame size greater than 1518 is marked as giant frame
  2. Frame size = 2000 - If frame size greater than 2000 is marked as giant frame
  3. Frame size = 9018 - If frame size greater than 9018 is marked as giant frame
  4. Any other value Frame size < 16380 - If packet size greater than configured bytes is marked as giant frame

MII lite mode

MII lite mode is supported . Application should set the below pins to NULL_PTR to enable the MII lite mode. IfxGeth_Crs_In *crs IfxGeth_Col_In *col IfxGeth_Rxer_In *rxEr IfxGeth_Txer_Out *txEr;


iLLD_TC38A: ETH

Modules
ETH
iLLD » GETH
Collaboration diagram for ETH:

Modules

DataStructures
MAC Functions
Module Functions
MTL Functions
DMA Functions
Variables

Detailed Description


iLLD_TC38A: DataStructures

Data Structures
DataStructures
iLLD » GETH » ETH
Collaboration diagram for DataStructures:

Data Structures

struct | IfxGeth_Eth_DmaInterruptConfig
Interrupt configuration structure for DMA Channel. More...
struct | IfxGeth_Eth_MiiPins
Port pins for MII mode configuration. More...
struct | IfxGeth_Eth_MtlInterruptConfig
Interrupt configuration structure for MTL block. More...
struct | IfxGeth_Eth_RgmiiPins
Port pins for RGMII mode configuration. More...
struct | IfxGeth_Eth_RmiiPins
Port pins for RMII mode configuration. More...
struct | IfxGeth_Eth_RxChannelConfig
Configuration sturcture for DMA rx channel. More...
struct | IfxGeth_Eth_RxQueueConfig
Rx Queue Configuration. More...
struct | IfxGeth_Eth_TxChannelConfig
Configuration sturcture for DMA tx channel. More...
struct | IfxGeth_Eth_TxQueueConfig
Tx Queue Configuration. More...
struct | IfxGeth_Eth_DmaConfig
Configuration Structure for the DMA initialisation. More...
struct | IfxGeth_Eth_MacConfig
Configuration Structure for the MAC initialisation. More...
struct | IfxGeth_Eth_MtlConfig
Configuration Structure for the MTL initialisation. More...
struct | IfxGeth_Eth_PinConfig
Configuration structure for pins. More...
struct | IfxGeth_Eth_RxChannel
Handle sturcture for DMA rx channel. More...
struct | IfxGeth_Eth_TxChannel
handle sturcture for DMA tx channel More...
struct | IfxGeth_Eth
GETH driver Handle. More...
struct | IfxGeth_Eth_Config
Configuration Structure for the Module initialisation. More...

Detailed Description

Data Structure Documentation

◆ IfxGeth_Eth_DmaInterruptConfig

struct IfxGeth_Eth_DmaInterruptConfig

Interrupt configuration structure for DMA Channel.

Definition at line 264 of file IfxGeth_Eth.h.

Data Fields
IfxGeth_DmaChannel | channelId | DMA channel ID (irrespective of TX and Rx for interrupt configuration)
Ifx_Priority | priority | Interrupt service priority.
IfxSrc_Tos | provider | Interrupt service provider.

◆ IfxGeth_Eth_MiiPins

struct IfxGeth_Eth_MiiPins

Port pins for MII mode configuration.

Definition at line 273 of file IfxGeth_Eth.h.

Collaboration diagram for IfxGeth_Eth_MiiPins:
[legend]
Data Fields
IfxGeth_Col_In * | col | pointer to COL input pin config
IfxGeth_Crs_In * | crs | pointer to CRS input pin config
IfxGeth_Mdc_Out * | mdc | Pointer to MDC output pin config.
IfxGeth_Mdio_InOut * | mdio | Pointer to MDIO pin config.
IfxGeth_Rxclk_In * | rxClk | Pointer to RXCLK input pin config.
IfxGeth_Rxd_In * | rxd0 | Pointer to RXD0 input pin config.
IfxGeth_Rxd_In * | rxd1 | Pointer to RXD1 input pin config.
IfxGeth_Rxd_In * | rxd2 | Pointer to RXD2 input pin config.
IfxGeth_Rxd_In * | rxd3 | Pointer to RXD3 input pin config.
IfxGeth_Rxdv_In * | rxDv | Pointer to RXDV input pin config.
IfxGeth_Rxer_In * | rxEr | Pointer to RXER input pin config.
IfxGeth_Txclk_In * | txClk | Pointer to TXCLK input pin config.
IfxGeth_Txd_Out * | txd0 | Pointer to TXD0 output pin config.
IfxGeth_Txd_Out * | txd1 | Pointer to TXD1 output pin config.
IfxGeth_Txd_Out * | txd2 | Pointer to TXD2 output pin config.
IfxGeth_Txd_Out * | txd3 | Pointer to TXD3 output pin config.
IfxGeth_Txen_Out * | txEn | Pointer to TXEN output pin config.
IfxGeth_Txer_Out * | txEr | Pointer to TXER output pin config.

◆ IfxGeth_Eth_MtlInterruptConfig

struct IfxGeth_Eth_MtlInterruptConfig

Interrupt configuration structure for MTL block.

Definition at line 297 of file IfxGeth_Eth.h.

Data Fields
Ifx_Priority | priority | Interrupt service priority.
IfxSrc_Tos | provider | Interrupt service provider.
IfxGeth_ServiceRequest | serviceRequest | Service Request node for MTL interrupt.

◆ IfxGeth_Eth_RgmiiPins

struct IfxGeth_Eth_RgmiiPins

Port pins for RGMII mode configuration.

Definition at line 306 of file IfxGeth_Eth.h.

Collaboration diagram for IfxGeth_Eth_RgmiiPins:
[legend]
Data Fields
IfxGeth_Grefclk_In * | grefClk | Pointer to GREFCLK input pin config.
IfxGeth_Mdc_Out * | mdc | Pointer to MDC output pin config.
IfxGeth_Mdio_InOut * | mdio | Pointer to MDIO pin config.
IfxGeth_Rxclk_In * | rxClk | Pointer to RXCLK input pin config.
IfxGeth_Rxctl_In * | rxCtl | Pointer to RXCTL input pin config.
IfxGeth_Rxd_In * | rxd0 | Pointer to RXD0 input pin config.
IfxGeth_Rxd_In * | rxd1 | Pointer to RXD1 input pin config.
IfxGeth_Rxd_In * | rxd2 | Pointer to RXD2 input pin config.
IfxGeth_Rxd_In * | rxd3 | Pointer to RXD3 input pin config.
IfxGeth_Txclk_Out * | txClk | Pointer to TXCLK input pin config.
IfxGeth_Txctl_Out * | txCtl | Pointer to TXCTL output pin config.
IfxGeth_Txd_Out * | txd0 | Pointer to TXD0 output pin config.
IfxGeth_Txd_Out * | txd1 | Pointer to TXD1 output pin config.
IfxGeth_Txd_Out * | txd2 | Pointer to TXD2 output pin config.
IfxGeth_Txd_Out * | txd3 | Pointer to TXD3 output pin config.

◆ IfxGeth_Eth_RmiiPins

struct IfxGeth_Eth_RmiiPins

Port pins for RMII mode configuration.

Definition at line 327 of file IfxGeth_Eth.h.

Collaboration diagram for IfxGeth_Eth_RmiiPins:
[legend]
Data Fields
IfxGeth_Crsdv_In * | crsDiv | pointer to CRSDIV input pin config
IfxGeth_Mdc_Out * | mdc | Pointer to MDC output pin config.
IfxGeth_Mdio_InOut * | mdio | Pointer to MDIO pin config.
IfxGeth_Refclk_In * | refClk | Pointer to REFCLK input pin config.
IfxGeth_Rxd_In * | rxd0 | Pointer to RXD0 input pin config.
IfxGeth_Rxd_In * | rxd1 | Pointer to RXD1 input pin config.
IfxGeth_Txd_Out * | txd0 | Pointer to TXD0 output pin config.
IfxGeth_Txd_Out * | txd1 | Pointer to TXD1 output pin config.
IfxGeth_Txen_Out * | txEn | Pointer to TXEN output pin config.

◆ IfxGeth_Eth_RxChannelConfig

struct IfxGeth_Eth_RxChannelConfig

Configuration sturcture for DMA rx channel.

Definition at line 342 of file IfxGeth_Eth.h.

Collaboration diagram for IfxGeth_Eth_RxChannelConfig:
[legend]
Data Fields
IfxGeth_RxDmaChannel | channelId | Rx DMA channel Index.
IfxGeth_DmaBurstLength | maxBurstLength | Maximum burst length of the channel.
uint16 | rxBuffer1Size | Size of Rx Buffer 1.
uint32 * | rxBuffer1StartAddress | Start address of Rx Buffer 1.
IfxGeth_RxDescrList * | rxDescrList | pointer to RX descriptors RAM

◆ IfxGeth_Eth_RxQueueConfig

struct IfxGeth_Eth_RxQueueConfig

Rx Queue Configuration.

Definition at line 353 of file IfxGeth_Eth.h.

Data Fields
boolean | daBasedDmaChannelEnabled | DA-based DMA Channel Selection Enable/Disable.
boolean | forwardErrorPacket | Error Packet Forwarding Enable/Disable.
boolean | forwardUndersizedGoodPacket | Undersized Good Packet Forwarding Enable/Disable.
IfxGeth_RxDmaChannel | rxDmaChannelMap | Mapped DMA Channel of Rx Queue.
boolean | rxQueueOverflowInterruptEnabled | Enable/Disable Rx Queue Overflow Interrupt.
IfxGeth_QueueSize | rxQueueSize | Rx Queue size.
boolean | storeAndForward | Receive Store and Forward Enable/Disable.

◆ IfxGeth_Eth_TxChannelConfig

struct IfxGeth_Eth_TxChannelConfig

Configuration sturcture for DMA tx channel.

Definition at line 366 of file IfxGeth_Eth.h.

Collaboration diagram for IfxGeth_Eth_TxChannelConfig:
[legend]
Data Fields
IfxGeth_TxDmaChannel | channelId | Tx DMA channel Index.
IfxGeth_DmaBurstLength | maxBurstLength | Maximum burst length of the channel.
uint16 | txBuffer1Size | Size of Tx Buffer 1.
uint32 * | txBuffer1StartAddress | Start address of Tx Buffer 1.
IfxGeth_TxDescrList * | txDescrList | pointer to TX descriptors RAM

◆ IfxGeth_Eth_TxQueueConfig

struct IfxGeth_Eth_TxQueueConfig

Tx Queue Configuration.

Definition at line 377 of file IfxGeth_Eth.h.

Data Fields
boolean | storeAndForward | Transmit Store and Forward Enable/Disable.
IfxGeth_QueueSize | txQueueSize | Tx Queue size.
boolean | txQueueUnderflowInterruptEnabled | Enable/Disable Tx Queue Underflow Interrupt.

◆ IfxGeth_Eth_DmaConfig

struct IfxGeth_Eth_DmaConfig

Configuration Structure for the DMA initialisation.

Definition at line 390 of file IfxGeth_Eth.h.

Collaboration diagram for IfxGeth_Eth_DmaConfig:
[legend]
Data Fields
boolean | addressAlignedBeatsEnabled | Enable/Disable Address Aligned Beats.
boolean | fixedBurstEnabled | Enable/Disable Fixed Burst length.
boolean | mixedBurstEnabled | Enable/Disable Mixed Burst length.
uint32 | numOfRxChannels | Number of Rx Dma channels.
uint32 | numOfTxChannels | Number of Tx Dma channels.
IfxGeth_Eth_RxChannelConfig | rxChannel[IFXGETH_NUM_RX_CHANNELS] | Rx Channels configurations of selected Channels.
IfxGeth_Eth_DmaInterruptConfig | rxInterrupt[IFXGETH_NUM_DMA_CHANNELS] | Receive Interrupt configuration structure for DMA Channel.
IfxGeth_Eth_TxChannelConfig | txChannel[IFXGETH_NUM_TX_CHANNELS] | Tx Channels configurations of selected Channels.
IfxGeth_Eth_DmaInterruptConfig | txInterrupt[IFXGETH_NUM_DMA_CHANNELS] | Transmit Interrupt configuration structure for DMA Channel.

◆ IfxGeth_Eth_MacConfig

struct IfxGeth_Eth_MacConfig

Configuration Structure for the MAC initialisation.

Definition at line 405 of file IfxGeth_Eth.h.

Data Fields
IfxGeth_DuplexMode | duplexMode | Duplex Mode.
IfxGeth_LineSpeed | lineSpeed | Ethernet Line Speed.
IfxGeth_LoopbackMode | loopbackMode | Loopback mode enable/disable.
uint8 | macAddress[6] | MAC address for the ethernet, should be unique in the network.
uint16 | maxPacketSize | Maximum size of the ethernet packet.

◆ IfxGeth_Eth_MtlConfig

struct IfxGeth_Eth_MtlConfig

Configuration Structure for the MTL initialisation.

Definition at line 416 of file IfxGeth_Eth.h.

Collaboration diagram for IfxGeth_Eth_MtlConfig:
[legend]
Data Fields
IfxGeth_Eth_MtlInterruptConfig | interrupt | Interrupt configuration structure for MTL block.
uint32 | numOfRxQueues | Number of Rx Queues.
uint32 | numOfTxQueues | Number of Tx Queues, will also be used to enable the selected number of queues.
IfxGeth_RxArbitrationAlgorithm | rxArbitrationAlgorithm | Rx Arbitration Algorithm for Rx queues when no of queues are more than 1.
IfxGeth_Eth_RxQueueConfig | rxQueue[IFXGETH_NUM_RX_QUEUES] | Rx queue configurations of selected queues.
IfxGeth_Eth_TxQueueConfig | txQueue[IFXGETH_NUM_TX_QUEUES] | Tx queue configurations of selected queues.
IfxGeth_TxSchedulingAlgorithm | txSchedulingAlgorithm | Tx Scheduling Algorithm for Tx queues when no of queues are more than 1.

◆ IfxGeth_Eth_PinConfig

struct IfxGeth_Eth_PinConfig

Configuration structure for pins.

Definition at line 429 of file IfxGeth_Eth.h.

Collaboration diagram for IfxGeth_Eth_PinConfig:
[legend]
Data Fields
IFX_CONST IfxGeth_Eth_MiiPins * | miiPins | Structure for MII pins.
IFX_CONST IfxGeth_Eth_RgmiiPins * | rgmiiPins | Structure for RGMII pins.
IFX_CONST IfxGeth_Eth_RmiiPins * | rmiiPins | Structure for RMII pins.

◆ IfxGeth_Eth_RxChannel

struct IfxGeth_Eth_RxChannel

Handle sturcture for DMA rx channel.

Definition at line 438 of file IfxGeth_Eth.h.

Collaboration diagram for IfxGeth_Eth_RxChannel:
[legend]
Data Fields
IfxGeth_RxDmaChannel | channelId | Rx DMA channel Index.
uint32 | rxCount | Number of frames received.
IfxGeth_RxDescrList * | rxDescrList | pointer to RX descriptors RAM
volatile IfxGeth_RxDescr * | rxDescrPtr | Pointer to Rx Descriptor (current descriptor)

◆ IfxGeth_Eth_TxChannel

struct IfxGeth_Eth_TxChannel

handle sturcture for DMA tx channel

Definition at line 448 of file IfxGeth_Eth.h.

Collaboration diagram for IfxGeth_Eth_TxChannel:
[legend]
Data Fields
IfxGeth_TxDmaChannel | channelId | Tx DMA channel Index.
uint16 | txBuf1Size | configured tx buffer 1 size
uint32 | txCount | Number of frames transmitted.
IfxGeth_TxDescrList * | txDescrList | pointer to TX descriptors RAM
volatile IfxGeth_TxDescr * | txDescrPtr | Pointer to Tx Descriptor (current descriptor)

◆ IfxGeth_Eth

struct IfxGeth_Eth

GETH driver Handle.

Definition at line 463 of file IfxGeth_Eth.h.

Collaboration diagram for IfxGeth_Eth:
[legend]
Data Fields
Ifx_GETH * | gethSFR | Pointer to GETH register base address.
uint32 | numOfRxChannels | Number of Rx Dma channels.
uint32 | numOfTxChannels | Number of Tx Dma channels.
IfxGeth_Eth_RxChannel | rxChannel[IFXGETH_NUM_RX_CHANNELS] | Rx Channels handle of selected Channels.
IfxGeth_Eth_TxChannel | txChannel[IFXGETH_NUM_TX_CHANNELS] | Tx Channels handle of selected Channels.

◆ IfxGeth_Eth_Config

struct IfxGeth_Eth_Config

Configuration Structure for the Module initialisation.

Definition at line 474 of file IfxGeth_Eth.h.

Collaboration diagram for IfxGeth_Eth_Config:
[legend]
Data Fields
IfxGeth_Eth_DmaConfig | dma | Configuration Structure for the DMA initialisation.
Ifx_GETH * | gethSFR | Pointer to GETH register base address.
IfxGeth_Eth_MacConfig | mac | Configuration Structure for the the MAC initialisation.
IfxGeth_Eth_MtlConfig | mtl | Configuration Structure for the MTL initialisation.
IfxGeth_PhyInterfaceMode | phyInterfaceMode | External Phy Interface RMII Mode.
IfxGeth_Eth_PinConfig | pins | COnfiguration structure for Pins.


iLLD_TC38A: MAC Functions

Functions
MAC Functions
iLLD » GETH » ETH
Collaboration diagram for MAC Functions:

Functions

IFX_EXTERN void IfxGeth_Eth_configureMacCore (IfxGeth_Eth *geth, IfxGeth_Eth_MacConfig *macConfig)
Configures the MAC core. More...

Detailed Description

Function Documentation

◆ IfxGeth_Eth_configureMacCore()

IFX_EXTERN void IfxGeth_Eth_configureMacCore | ( | IfxGeth_Eth * | geth,
 |  | IfxGeth_Eth_MacConfig * | macConfig
 | ) |  |

Configures the MAC core.

Parameters
geth | GETH driver Handle
macConfig | Configuration Structure for the MAC initialisation
Returns
None
// IfxGeth_Eth geth; // assumed to be defined globally
IfxGeth_Eth_MacConfig macConfig;
macConfig.duplexMode = IfxGeth_DuplexMode_fullDuplex;
macConfig.lineSpeed = IfxGeth_LineSpeed_100Mbps;
macConfig.loopbackMode = IfxGeth_LoopbackMode_disable;
macConfig.macAddress = {0x00, 0x11, 0x22, 0x33, 0x44, 0x55};
IfxGeth_Eth_configureMacCore(&geth, &macConfig);

Definition at line 186 of file IfxGeth_Eth.c.

Referenced by IfxGeth_Eth_initModule().


iLLD_TC38A: Module Functions

Functions
Module Functions
iLLD » GETH » ETH
Collaboration diagram for Module Functions:

Functions

IFX_INLINE void * | IfxGeth_Eth_waitTransmitBuffer (IfxGeth_Eth *geth, IfxGeth_TxDmaChannel channelId)
Waits for one TX buffer becomes available. More...
IFX_EXTERN void * | IfxGeth_Eth_getReceiveBuffer (IfxGeth_Eth *geth, IfxGeth_RxDmaChannel channelId)
Gets receive buffer
note: IfxEth_freeReceiveBuffer() shall be called after the data from the RX buffer has been processed. More...
IFX_EXTERN void * | IfxGeth_Eth_getTransmitBuffer (IfxGeth_Eth *geth, IfxGeth_TxDmaChannel channelId)
Get the transmit buffer pointer of current descriptor. More...
IFX_EXTERN void | IfxGeth_Eth_initModule (IfxGeth_Eth *geth, IfxGeth_Eth_Config *config)
Initialises the Geth Module with given configuration. More...
IFX_EXTERN void | IfxGeth_Eth_initModuleConfig (IfxGeth_Eth_Config *config, Ifx_GETH *gethSFR)
Initialises the config structure with default values. More...
IFX_EXTERN void | IfxGeth_Eth_setupMiiInputPins (IfxGeth_Eth *geth, const IfxGeth_Eth_MiiPins *miiPins)
Set up MII mode input pins. More...
IFX_EXTERN void | IfxGeth_Eth_setupMiiOutputPins (IfxGeth_Eth *geth, const IfxGeth_Eth_MiiPins *miiPins)
setup MII mode output pins More...
IFX_EXTERN void | IfxGeth_Eth_setupRgmiiInputPins (IfxGeth_Eth *geth, const IfxGeth_Eth_RgmiiPins *rgmiiPins)
Set up RGMII mode input pins. More...
IFX_EXTERN void | IfxGeth_Eth_setupRgmiiOutputPins (IfxGeth_Eth *geth, const IfxGeth_Eth_RgmiiPins *rgmiiPins)
Set up RGMII mode output pins. More...
IFX_EXTERN void | IfxGeth_Eth_setupRmiiInputPins (IfxGeth_Eth *geth, const IfxGeth_Eth_RmiiPins *rmiiPins)
setup RMII mode input pins More...
IFX_EXTERN void | IfxGeth_Eth_setupRmiiOutputPins (IfxGeth_Eth *geth, const IfxGeth_Eth_RmiiPins *rmiiPins)
setup RMII mode output pins More...
IFX_EXTERN void | IfxGeth_Eth_writeHeader (IfxGeth_Eth *geth, uint8 *txBuffer, uint8 *destinationAddress, uint8 *sourceAddress, uint32 payloadLength)
writes the header format into buffrer More...

Detailed Description

Function Documentation

◆ IfxGeth_Eth_getReceiveBuffer()

IFX_EXTERN void* IfxGeth_Eth_getReceiveBuffer | ( | IfxGeth_Eth * | geth,
 |  | IfxGeth_RxDmaChannel | channelId
 | ) |  |

Gets receive buffer
note: IfxEth_freeReceiveBuffer() shall be called after the data from the RX buffer has been processed.

Parameters
geth | GETH driver Handle
channelId | Rx channel Id
Returns
retval NULL_PTR no received frame retval !NULL_PTR a frame has been received
// IfxGeth_Eth geth; // assumed to be defined globally
uint8 *pRxBuf = (uint8*)IfxGeth_Eth_getReceiveBuffer(&geth, IfxGeth_RxDmaChannel_0);

Definition at line 224 of file IfxGeth_Eth.c.

◆ IfxGeth_Eth_getTransmitBuffer()

IFX_EXTERN void* IfxGeth_Eth_getTransmitBuffer | ( | IfxGeth_Eth * | geth,
 |  | IfxGeth_TxDmaChannel | channelId
 | ) |  |

Get the transmit buffer pointer of current descriptor.

Parameters
geth | GETH driver Handle
channelId | Tx channel Id
Returns
retval NULL_PTR no free transmit buffer is available retval !NULL_PTR a free transmit buffer is available

Definition at line 242 of file IfxGeth_Eth.c.

Referenced by IfxGeth_Eth_waitTransmitBuffer().

◆ IfxGeth_Eth_initModule()

IFX_EXTERN void IfxGeth_Eth_initModule | ( | IfxGeth_Eth * | geth,
 |  | IfxGeth_Eth_Config * | config
 | ) |  |

Initialises the Geth Module with given configuration.

Parameters
geth | GETH driver Handle
config | Configuration Structure for the Module initialisation
Returns
None
// IfxGeth_Eth geth; // assumed to be defined globally
IfxGeth_Eth_Config config;
IfxGeth_Eth_initModuleConfig(&config, &MODULE_GETH);
IfxGeth_Eth_initModule(&geth, &config);

Definition at line 257 of file IfxGeth_Eth.c.

◆ IfxGeth_Eth_initModuleConfig()

IFX_EXTERN void IfxGeth_Eth_initModuleConfig | ( | IfxGeth_Eth_Config * | config,
 |  | Ifx_GETH * | gethSFR
 | ) |  |

Initialises the config structure with default values.

Parameters
config | Configuration Structure for the Module initialisation
gethSFR | Pointer to GETH register base address
Returns
None
IfxGeth_Eth_Config config;
IfxGeth_Eth_initModuleConfig(&config, &MODULE_GETH);

Definition at line 318 of file IfxGeth_Eth.c.

◆ IfxGeth_Eth_setupMiiInputPins()

IFX_EXTERN void IfxGeth_Eth_setupMiiInputPins | ( | IfxGeth_Eth * | geth,
 |  | const IfxGeth_Eth_MiiPins * | miiPins
 | ) |  |

Set up MII mode input pins.

Parameters
geth | GETH driver Handle
miiPins | Mii Pins
Returns
None

Definition at line 698 of file IfxGeth_Eth.c.

Referenced by IfxGeth_Eth_initModule().

◆ IfxGeth_Eth_setupMiiOutputPins()

IFX_EXTERN void IfxGeth_Eth_setupMiiOutputPins | ( | IfxGeth_Eth * | geth,
 |  | const IfxGeth_Eth_MiiPins * | miiPins
 | ) |  |

setup MII mode output pins

Parameters
geth | GETH driver Handle
miiPins | Mii Pins
Returns
None

Definition at line 792 of file IfxGeth_Eth.c.

Referenced by IfxGeth_Eth_initModule().

◆ IfxGeth_Eth_setupRgmiiInputPins()

IFX_EXTERN void IfxGeth_Eth_setupRgmiiInputPins | ( | IfxGeth_Eth * | geth,
 |  | const IfxGeth_Eth_RgmiiPins * | rgmiiPins
 | ) |  |

Set up RGMII mode input pins.

Parameters
geth | GETH driver Handle
rgmiiPins | RGMII Pins
Returns
None

Definition at line 839 of file IfxGeth_Eth.c.

Referenced by IfxGeth_Eth_initModule().

◆ IfxGeth_Eth_setupRgmiiOutputPins()

IFX_EXTERN void IfxGeth_Eth_setupRgmiiOutputPins | ( | IfxGeth_Eth * | geth,
 |  | const IfxGeth_Eth_RgmiiPins * | rgmiiPins
 | ) |  |

Set up RGMII mode output pins.

Parameters
geth | GETH driver Handle
rgmiiPins | RGMII Pins
Returns
None

Definition at line 887 of file IfxGeth_Eth.c.

Referenced by IfxGeth_Eth_initModule().

◆ IfxGeth_Eth_setupRmiiInputPins()

IFX_EXTERN void IfxGeth_Eth_setupRmiiInputPins | ( | IfxGeth_Eth * | geth,
 |  | const IfxGeth_Eth_RmiiPins * | rmiiPins
 | ) |  |

setup RMII mode input pins

Parameters
geth | GETH driver Handle
rmiiPins | Rmii Pins
Returns
None

Definition at line 929 of file IfxGeth_Eth.c.

Referenced by IfxGeth_Eth_initModule().

◆ IfxGeth_Eth_setupRmiiOutputPins()

IFX_EXTERN void IfxGeth_Eth_setupRmiiOutputPins | ( | IfxGeth_Eth * | geth,
 |  | const IfxGeth_Eth_RmiiPins * | rmiiPins
 | ) |  |

setup RMII mode output pins

Parameters
geth | GETH driver Handle
rmiiPins | Rmii Pins
Returns
None

Definition at line 963 of file IfxGeth_Eth.c.

Referenced by IfxGeth_Eth_initModule().

◆ IfxGeth_Eth_waitTransmitBuffer()

IFX_INLINE void * IfxGeth_Eth_waitTransmitBuffer | ( | IfxGeth_Eth * | geth,
 |  | IfxGeth_TxDmaChannel | channelId
 | ) |  |

Waits for one TX buffer becomes available.

Parameters
geth | GETH driver Handle
channelId | Tx channel Id retval non NULL_PTR TX buffer is available at the address pointed by the returned value retval NULL_PTR TX buffer is busy.
// get free buffer
uint8 *pTxBuf = (uint8*) IfxGeth_Eth_waitTransmitBuffer(&geth, IfxGeth_TxDmaChannel_0);

Definition at line 1111 of file IfxGeth_Eth.h.

◆ IfxGeth_Eth_writeHeader()

IFX_EXTERN void IfxGeth_Eth_writeHeader | ( | IfxGeth_Eth * | geth,
 |  | uint8 * | txBuffer,
 |  | uint8 * | destinationAddress,
 |  | uint8 * | sourceAddress,
 |  | uint32 | payloadLength
 | ) |  |

writes the header format into buffrer

Parameters
geth | GETH driver Handle
txBuffer | pointer to tx buffer
destinationAddress | pointer to destination address
sourceAddress | pointer to source address
payloadLength | size of the payload
Returns
None
// IfxGeth_Eth geth; // assumed to be defined globally
//const uint8 myMacAddress[6] = {0x00, 0x11, 0x22, 0x33, 0x44, 0x55}; // assumed to be defined globally
//#define IFXGETH_MAX_TX_BUFFER_SIZE 256 // assumed to be defined globally
//uint8 txBuffer1[IFXGETH_MAX_TX_BUFFER_SIZE]; // assumed to be defined globally
// get free buffer
uint8 *pTxBuf = (uint8*) IfxGeth_Eth_waitTransmitBuffer(&geth, IfxGeth_TxDmaChannel_0);
IfxGeth_Eth_writeHeader(&geth, &pTxBuf, (uint8 *)myMacAddress, (uint8 *)myMacAddress, payloadLength);

Definition at line 1115 of file IfxGeth_Eth.c.


iLLD_TC38A: MTL Functions

Functions
MTL Functions
iLLD » GETH » ETH
Collaboration diagram for MTL Functions:

Functions

IFX_EXTERN void IfxGeth_Eth_configureMTL (IfxGeth_Eth *geth, IfxGeth_Eth_MtlConfig *mtlConfig)
Configures the MTL. More...

Detailed Description

Function Documentation

◆ IfxGeth_Eth_configureMTL()

IFX_EXTERN void IfxGeth_Eth_configureMTL | ( | IfxGeth_Eth * | geth,
 |  | IfxGeth_Eth_MtlConfig * | mtlConfig
 | ) |  |

Configures the MTL.

Parameters
geth | GETH driver Handle
mtlConfig | Configuration Structure for the MTL initialisation
Returns
None
// IfxGeth_Eth geth; // assumed to be defined globally
IfxGeth_Eth_MtlConfig mtlConfig;
mtlConfig.numOfTxQueues = 1;
mtlConfig.txSchedulingAlgorithm = IfxGeth_TxSchedulingAlgorithm_wrr;
mtlConfig.numOfRxQueues = 1;
mtlConfig.rxArbitrationAlgorithm = IfxGeth_RxArbitrationAlgorithm_sp;
mtlConfig.txQueueConfig[0].storeAndForward = FALSE;
mtlConfig.txQueueConfig[0].txQueueSize = IfxGeth_QueueSize_256Bytes;
mtlConfig.txQueueConfig[0].txQueueUnderflowInterruptEnabled = FLASE; // enable if required
mtlConfig.rxQueueConfig[0].storeAndForward = FALSE;
mtlConfig.rxQueueConfig[0].rxQueueSize = IfxGeth_QueueSize_256Bytes;
mtlConfig.rxQueueConfig[0].forwardErrorPacket = FALSE;
mtlConfig.rxQueueConfig[0].forwardUndersizeedGoodPacket = FALSE;
mtlConfig.rxQueueConfig[0].daBasedDmaChannelEnabled = FALSE;
mtlConfig.rxQueueConfig[0].rxDmaChannelMap = IfxEth_RxDmaChannel_0;
mtlConfig.rxQueueConfig[0].rxQueueOverflowInterruptEnabled = FALSE; // enable if required
mtlConfig.interrupt.serviceRequest = IfxGeth_ServiceRequest_1;
mtlConfig.interrupt.priority = 0; // choose priority
mtlConfig.interrupt.provider = IfxSrc_Tos_cpu0;
IfxGeth_Eth_configureMTL(&geth, &mtlConfig);

Definition at line 117 of file IfxGeth_Eth.c.

Referenced by IfxGeth_Eth_initModule().


iLLD_TC38A: DMA Functions

Functions
DMA Functions
iLLD » GETH » ETH
Collaboration diagram for DMA Functions:

Functions

IFX_INLINE volatile IfxGeth_RxDescr * | IfxGeth_Eth_getActualRxDescriptor (IfxGeth_Eth *geth, IfxGeth_RxDmaChannel channelId)
Returns the pointer to current RX descriptor. More...
IFX_INLINE volatile IfxGeth_TxDescr * | IfxGeth_Eth_getActualTxDescriptor (IfxGeth_Eth *geth, IfxGeth_TxDmaChannel channelId)
Returns the pointer to current TX descriptor. More...
IFX_INLINE boolean | IfxGeth_Eth_isRxDataAvailable (IfxGeth_Eth *geth, IfxGeth_RxDmaChannel channelId)
Checks whether one or more RX data is available. More...
IFX_EXTERN void | IfxGeth_Eth_configureDMA (IfxGeth_Eth *geth, IfxGeth_Eth_DmaConfig *dmaConfig)
Configures the DMA. More...
IFX_EXTERN void | IfxGeth_Eth_initReceiveDescriptors (IfxGeth_Eth *geth, IfxGeth_Eth_RxChannelConfig *config)
Initialises the Rx descriptors of a single channel. More...
IFX_EXTERN void | IfxGeth_Eth_initTransmitDescriptors (IfxGeth_Eth *geth, IfxGeth_Eth_TxChannelConfig *config)
Initialises the Tx descriptors of a single channel. More...
IFX_EXTERN void | IfxGeth_Eth_sendFrame (IfxGeth_Eth *geth, IfxGeth_Eth_FrameConfig *config)
Transmits a frame from a single channel. More...
IFX_EXTERN void | IfxGeth_Eth_sendTransmitBuffer (IfxGeth_Eth *geth, uint32 packetLength, IfxGeth_TxDmaChannel channelId)
Transmits a frame from a single channel. More...
IFX_EXTERN void | IfxGeth_Eth_shuffleRxDescriptor (IfxGeth_Eth *geth, IfxGeth_RxDmaChannel channelId)
Updates the current Rx descriptor pointer in the handle to next Rx descriptor. More...
IFX_EXTERN void | IfxGeth_Eth_shuffleTxDescriptor (IfxGeth_Eth *geth, IfxGeth_TxDmaChannel channelId)
Updates the current Tx descriptor pointer in the handle to next Tx descriptor. More...
IFX_EXTERN void | IfxGeth_Eth_startReceiver (IfxGeth_Eth *geth, IfxGeth_RxDmaChannel channelId)
Start the Receiver functions of MAC and selected channel of DMA. More...
IFX_EXTERN void | IfxGeth_Eth_startReceivers (IfxGeth_Eth *geth, uint32 numOfChannels)
Start the Receiver functions of MAC and all selected number of DMA channels. More...
IFX_EXTERN void | IfxGeth_Eth_startTransmitter (IfxGeth_Eth *geth, IfxGeth_TxDmaChannel channelId)
Start the transmitter functions of MAC and selected channel of DMA. More...
IFX_EXTERN void | IfxGeth_Eth_startTransmitters (IfxGeth_Eth *geth, uint32 numOfChannels)
Start the transmitter functions of MAC and all selected number of DMA channels. More...
IFX_EXTERN void | IfxGeth_Eth_stopTransmitters (IfxGeth_Eth *geth, uint32 numOfChannels)
Stops the transmitter functions of MAC and all selected number of DMA channels. More...
IFX_EXTERN void | IfxGeth_Eth_wakeupReceiver (IfxGeth_Eth *geth, IfxGeth_RxDmaChannel channelId)
Wakes up the Receiver functions of MAC and selected channel of DMA. More...
IFX_EXTERN void | IfxGeth_Eth_wakeupTransmitter (IfxGeth_Eth *geth, IfxGeth_TxDmaChannel channelId)
Wakes up the transmitter functions of MAC and selected channel of DMA. More...

Detailed Description

Function Documentation

◆ IfxGeth_Eth_configureDMA()

IFX_EXTERN void IfxGeth_Eth_configureDMA | ( | IfxGeth_Eth * | geth,
 |  | IfxGeth_Eth_DmaConfig * | dmaConfig
 | ) |  |

Configures the DMA.

Parameters
geth | GETH driver Handle
dmaConfig | Configuration Structure for the DMA initialisation
Returns
None
// IfxGeth_Eth geth; // assumed to be defined globally
IfxGeth_Eth_DmaConfig dmaConfig;
dmaConfig.numOfTxChannels = 1;
dmaConfig.numOfRxChannels = 1;
dmaConfig.txChannel[0].channelId = IfxGeth_TxDmaChannel_0;
dmaConfig.txChannel[0].txDescrList = &IfxGeth_txDescrList[0];
dmaConfig.txChannel[0].txBuffer1StartAddress = &txBuffer[0][0]; // user buffer
dmaConfig.txChannel[0].txBuffer1Size = TX_BUFFER1_SIZE; // user defined variable
dmaConfig.rxChannel[0].channelId = IfxGeth_RxDmaChannel_0;
dmaConfig.rxChannel[0].rxDescrList = &IfxGeth_rxDescrList[0];
dmaConfig.rxChannel[0].rxBuffer1StartAddress = &rxBuffer[0][0]; // user buffer
dmaConfig.rxChannel[0].rxBuffer1Size = RX_BUFFER1_SIZE; // user defined variable
dmaConfig.txInterrupt[0].channelId = IfxGeth_DmaChannel_0;
dmaConfig.txInterrupt[0].priority = 0; // choose priority
dmaConfig.txInterrupt[0].provider = IfxSrc_Tos_cpu0;
dmaConfig.rxInterrupt[0].channelId = IfxGeth_DmaChannel_0;
dmaConfig.rxInterrupt[0].priority = 0; // choose priority
dmaConfig.rxInterrupt[0].provider = IfxSrc_Tos_cpu0;
IfxGeth_Eth_configureDMA(&geth, &dmaConfig);

Definition at line 61 of file IfxGeth_Eth.c.

Referenced by IfxGeth_Eth_initModule().

◆ IfxGeth_Eth_getActualRxDescriptor()

IFX_INLINE volatile IfxGeth_RxDescr * IfxGeth_Eth_getActualRxDescriptor | ( | IfxGeth_Eth * | geth,
 |  | IfxGeth_RxDmaChannel | channelId
 | ) |  |

Returns the pointer to current RX descriptor.

Parameters
geth | GETH driver Handle
channelId | Rx channel Id
Returns
pointer to base RX descriptor in the list
// IfxGeth_Eth geth; // assumed to be defined globally
IfxGeth_RxDescr *descr = IfxGeth_Eth_getActualRxDescriptor(&geth, IfxGeth_RxDmaChannel_0);

Definition at line 1081 of file IfxGeth_Eth.h.

Referenced by IfxGeth_Eth_freeReceiveBuffer(), IfxGeth_Eth_getReceiveBuffer(), and IfxGeth_Eth_isRxDataAvailable().

◆ IfxGeth_Eth_getActualTxDescriptor()

IFX_INLINE volatile IfxGeth_TxDescr * IfxGeth_Eth_getActualTxDescriptor | ( | IfxGeth_Eth * | geth,
 |  | IfxGeth_TxDmaChannel | channelId
 | ) |  |

Returns the pointer to current TX descriptor.

Parameters
geth | GETH driver Handle
channelId | Tx channel Id
Returns
pointer to base TX descriptor in the list
// IfxGeth_Eth geth; // assumed to be defined globally
IfxGeth_TxDescr *descr = IfxGeth_Eth_getActualTxDescriptor(&geth, IfxGeth_TxDmaChannel_0);

Definition at line 1087 of file IfxGeth_Eth.h.

Referenced by IfxGeth_Eth_getTransmitBuffer(), and IfxGeth_Eth_sendTransmitBuffer().

◆ IfxGeth_Eth_initReceiveDescriptors()

IFX_EXTERN void IfxGeth_Eth_initReceiveDescriptors | ( | IfxGeth_Eth * | geth,
 |  | IfxGeth_Eth_RxChannelConfig * | config
 | ) |  |

Initialises the Rx descriptors of a single channel.

Parameters
geth | GETH driver Handle
config | Rx channel configuration
Returns
None

Definition at line 552 of file IfxGeth_Eth.c.

Referenced by IfxGeth_Eth_configureDMA().

◆ IfxGeth_Eth_initTransmitDescriptors()

IFX_EXTERN void IfxGeth_Eth_initTransmitDescriptors | ( | IfxGeth_Eth * | geth,
 |  | IfxGeth_Eth_TxChannelConfig * | config
 | ) |  |

Initialises the Tx descriptors of a single channel.

Parameters
geth | GETH driver Handle
config | Tx channel configuration
Returns
None

Definition at line 593 of file IfxGeth_Eth.c.

Referenced by IfxGeth_Eth_configureDMA().

◆ IfxGeth_Eth_isRxDataAvailable()

IFX_INLINE boolean IfxGeth_Eth_isRxDataAvailable | ( | IfxGeth_Eth * | geth,
 |  | IfxGeth_RxDmaChannel | channelId
 | ) |  |

Checks whether one or more RX data is available.

Parameters
geth | GETH driver Handle
channelId | Rx channel Id
Returns
TRUE : if one or more RX data available FALSE: if Rx data not available
// IfxGeth_Eth geth; // assumed to be defined globally
boolean status = IfxGeth_Eth_isRxDataAvailable(&geth, IfxGeth_RxDmaChannel_0);

Definition at line 1105 of file IfxGeth_Eth.h.

Referenced by IfxGeth_Eth_getReceiveBuffer().

◆ IfxGeth_Eth_sendFrame()

IFX_EXTERN void IfxGeth_Eth_sendFrame | ( | IfxGeth_Eth * | geth,
 |  | IfxGeth_Eth_FrameConfig * | config
 | ) |  |

Transmits a frame from a single channel.

Parameters
geth | GETH driver Handle
config | Tx Frame configuration
Returns
None
// IfxGeth_Eth geth; // assumed to be defined globally
//const uint8 myMacAddress[6] = {0x00, 0x11, 0x22, 0x33, 0x44, 0x55}; // assumed to be defined globally
uint32 payloadLength = 8; // 8 bytes
uint32 packetLength = IFXGETH_HEADER_LENGTH + payloadLength; // IFXGETH_HEADER_LENGTH defined by user
IfxGeth_FrameConfig frameConfig;
frameConfig.channelId = IfxGeth_TxDmaChannel_0;
frameConfig.packetLength = packetLength;
// get free buffer
uint8 *pTxBuf = (uint8*) IfxGeth_Eth_waitTransmitBuffer(&geth, IfxGeth_TxDmaChannel_0);
// write the header
IfxGeth_Eth_writeHeader(&geth, pTxBuf, (uint8 *)myMacAddress, (uint8 *)myMacAddress, payloadLength);
// write the payload
uint32 i;
for(i = IFXGETH_HEADER_LENGTH; i < packetLength; ++i) {
pTxBuf[i] = i - 13;
}
// clear the TX interrupt status
IfxGeth_dma_clearInterruptFlag(geth->gethSFR, IfxGeth_DmaChannel_0, IfxGeth_DmaInterruptFlag_transmitInterrupt) ;
IfxGeth_Eth_sendFrame(&geth, &frameConfig);

Definition at line 634 of file IfxGeth_Eth.c.

◆ IfxGeth_Eth_sendTransmitBuffer()

IFX_EXTERN void IfxGeth_Eth_sendTransmitBuffer | ( | IfxGeth_Eth * | geth,
 |  | uint32 | packetLength,
 |  | IfxGeth_TxDmaChannel | channelId
 | ) |  |

Transmits a frame from a single channel.

Parameters
geth | GETH driver Handle
packetLength | Length of the packet to be transmitted in bytes
channelId | Tx channel Id
Returns
None
// IfxGeth_Eth geth; // assumed to be defined globally
//const uint8 myMacAddress[6] = {0x00, 0x11, 0x22, 0x33, 0x44, 0x55}; // assumed to be defined globally
uint32 payloadLength = 8; // 8 bytes
uint32 packetLength = IFXGETH_HEADER_LENGTH + payloadLength; // IFXGETH_HEADER_LENGTH defined by user
// get free buffer
uint8 *pTxBuf = (uint8*) IfxGeth_Eth_waitTransmitBuffer(&geth, IfxGeth_TxDmaChannel_0);
// write the header
IfxGeth_Eth_writeHeader(&geth, pTxBuf, (uint8 *)myMacAddress, (uint8 *)myMacAddress, payloadLength);
// write the payload
uint32 i;
for(i = IFXGETH_HEADER_LENGTH; i < packetLength; ++i) {
pTxBuf[i] = i - 13;
}
// clear the TX interrupt status
IfxGeth_dma_clearInterruptFlag(geth->gethSFR, IfxGeth_DmaChannel_0, IfxGeth_DmaInterruptFlag_transmitInterrupt) ;
IfxGeth_Eth_sendTransmitBuffer(&geth, packetLength, IfxGeth_TxDmaChannel_0);

Definition at line 640 of file IfxGeth_Eth.c.

Referenced by IfxGeth_Eth_sendFrame().

◆ IfxGeth_Eth_shuffleRxDescriptor()

IFX_EXTERN void IfxGeth_Eth_shuffleRxDescriptor | ( | IfxGeth_Eth * | geth,
 |  | IfxGeth_RxDmaChannel | channelId
 | ) |  |

Updates the current Rx descriptor pointer in the handle to next Rx descriptor.

Parameters
geth | GETH driver Handle
channelId | Rx channel Id
Returns
None
// IfxGeth_Eth geth; // assumed to be defined globally
IfxGeth_Eth_shuffleRxDescriptor(&geth, IfxGeth_RxDmaChannel_0);

Definition at line 991 of file IfxGeth_Eth.c.

Referenced by IfxGeth_Eth_freeReceiveBuffer().

◆ IfxGeth_Eth_shuffleTxDescriptor()

IFX_EXTERN void IfxGeth_Eth_shuffleTxDescriptor | ( | IfxGeth_Eth * | geth,
 |  | IfxGeth_TxDmaChannel | channelId
 | ) |  |

Updates the current Tx descriptor pointer in the handle to next Tx descriptor.

Parameters
geth | GETH driver Handle
channelId | Tx channel Id
Returns
None
// IfxGeth_Eth geth; // assumed to be defined globally
IfxGeth_Eth_shuffleTxDescriptor(&geth, IfxGeth_TxDmaChannel_0);

Definition at line 1009 of file IfxGeth_Eth.c.

Referenced by IfxGeth_Eth_sendTransmitBuffer().

◆ IfxGeth_Eth_startReceiver()

IFX_EXTERN void IfxGeth_Eth_startReceiver | ( | IfxGeth_Eth * | geth,
 |  | IfxGeth_RxDmaChannel | channelId
 | ) |  |

Start the Receiver functions of MAC and selected channel of DMA.

Parameters
geth | GETH driver Handle
channelId | Rx channel Id
Returns
None
// IfxGeth_Eth geth; // assumed to be defined globally
IfxGeth_Eth_startReceiver(&geth, IfxGeth_RxDmaChannel_0);

Definition at line 1027 of file IfxGeth_Eth.c.

Referenced by IfxGeth_Eth_wakeupReceiver().

◆ IfxGeth_Eth_startReceivers()

IFX_EXTERN void IfxGeth_Eth_startReceivers | ( | IfxGeth_Eth * | geth,
 |  | uint32 | numOfChannels
 | ) |  |

Start the Receiver functions of MAC and all selected number of DMA channels.

Parameters
geth | GETH driver Handle
numOfChannels | number of channels to be started for transmission (starting from channel 0)
Returns
None
// IfxGeth_Eth geth; // assumed to be defined globally
IfxGeth_Eth_startReceivers(&geth, 1);

Definition at line 1034 of file IfxGeth_Eth.c.

◆ IfxGeth_Eth_startTransmitter()

IFX_EXTERN void IfxGeth_Eth_startTransmitter | ( | IfxGeth_Eth * | geth,
 |  | IfxGeth_TxDmaChannel | channelId
 | ) |  |

Start the transmitter functions of MAC and selected channel of DMA.

Parameters
geth | GETH driver Handle
channelId | Tx channel Id
Returns
None
// IfxGeth_Eth geth; // assumed to be defined globally
IfxGeth_Eth_startTransmitter(&geth, IfxGeth_TxDmaChannel_0);

Definition at line 1046 of file IfxGeth_Eth.c.

Referenced by IfxGeth_Eth_wakeupTransmitter().

◆ IfxGeth_Eth_startTransmitters()

IFX_EXTERN void IfxGeth_Eth_startTransmitters | ( | IfxGeth_Eth * | geth,
 |  | uint32 | numOfChannels
 | ) |  |

Start the transmitter functions of MAC and all selected number of DMA channels.

Parameters
geth | GETH driver Handle
numOfChannels | number of channels to be started for transmission (starting from channel 0)
Returns
None
// IfxGeth_Eth geth; // assumed to be defined globally
IfxGeth_Eth_startTransmitter(&geth, 1);

Definition at line 1053 of file IfxGeth_Eth.c.

◆ IfxGeth_Eth_stopTransmitters()

IFX_EXTERN void IfxGeth_Eth_stopTransmitters | ( | IfxGeth_Eth * | geth,
 |  | uint32 | numOfChannels
 | ) |  |

Stops the transmitter functions of MAC and all selected number of DMA channels.

Parameters
geth | GETH driver Handle
numOfChannels | number of channels to be started for transmission (starting from channel 0)
Returns
None
// IfxGeth_Eth geth; // assumed to be defined globally
IfxGeth_Eth_stopTransmitter(&geth, 4);

Definition at line 1065 of file IfxGeth_Eth.c.

Referenced by IfxGeth_Eth_configureDMA().

◆ IfxGeth_Eth_wakeupReceiver()

IFX_EXTERN void IfxGeth_Eth_wakeupReceiver | ( | IfxGeth_Eth * | geth,
 |  | IfxGeth_RxDmaChannel | channelId
 | ) |  |

Wakes up the Receiver functions of MAC and selected channel of DMA.

Parameters
geth | GETH driver Handle
channelId | Rx channel Id
Returns
None
// IfxGeth_Eth geth; // assumed to be defined globally
IfxGeth_Eth_wakeupReceiver(&geth, IfxGeth_RxDmaChannel_0);

Definition at line 1077 of file IfxGeth_Eth.c.

Referenced by IfxGeth_Eth_getReceiveBuffer().

◆ IfxGeth_Eth_wakeupTransmitter()

IFX_EXTERN void IfxGeth_Eth_wakeupTransmitter | ( | IfxGeth_Eth * | geth,
 |  | IfxGeth_TxDmaChannel | channelId
 | ) |  |

Wakes up the transmitter functions of MAC and selected channel of DMA.

Parameters
geth | GETH driver Handle
channelId | Tx channel Id
Returns
None
// IfxGeth_Eth geth; // assumed to be defined globally
IfxGeth_Eth_wakeupTransmitter(&geth, IfxGeth_TxDmaChannel_0);

Definition at line 1093 of file IfxGeth_Eth.c.

Referenced by IfxGeth_Eth_sendTransmitBuffer().


iLLD_TC38A: Variables

Variables
Variables
iLLD » GETH » ETH
Collaboration diagram for Variables:

Variables

IFX_EXTERN IfxGeth_RxDescrList IfxGeth_Eth_rxDescrList [IFXGETH_NUM_MODULES][IFXGETH_NUM_RX_CHANNELS]
Actual rx descriptor lists of all availabe rx channels. More...
IFX_EXTERN IfxGeth_TxDescrList IfxGeth_Eth_txDescrList [IFXGETH_NUM_MODULES][IFXGETH_NUM_TX_CHANNELS]
Actual tx descriptor lists of all availabe tx channels. More...

Detailed Description

Variable Documentation

◆ IfxGeth_Eth_rxDescrList

IFX_EXTERN IfxGeth_RxDescrList IfxGeth_Eth_rxDescrList[IFXGETH_NUM_MODULES][IFXGETH_NUM_RX_CHANNELS]

Actual rx descriptor lists of all availabe rx channels.

Definition at line 1069 of file IfxGeth_Eth.h.

◆ IfxGeth_Eth_txDescrList

IFX_EXTERN IfxGeth_TxDescrList IfxGeth_Eth_txDescrList[IFXGETH_NUM_MODULES][IFXGETH_NUM_TX_CHANNELS]

Actual tx descriptor lists of all availabe tx channels.

Definition at line 1073 of file IfxGeth_Eth.h.


iLLD_TC38A: IfxGeth_cfg.h File Reference

  • _Impl
Macros | Enumerations | Variables
IfxGeth_cfg.h File Reference
iLLD » GETH

GETH on-chip implementation data. More...

#include "Cpu/Std/Ifx_Types.h"
#include "IfxGeth_reg.h"
Include dependency graph for IfxGeth_cfg.h:

Go to the source code of this file.

Macros

#define | IFXGETH_NUM_TX_QUEUES (4)
Number of Tx queues in MTL block. More...
#define | IFXGETH_NUM_RX_QUEUES (4)
Number of Rx queues in MTL block. More...
#define | IFXGETH_NUM_MODULES (1)
Number of Geth instances. More...
#define | IFXGETH_NUM_TX_CHANNELS (4)
Number of Tx DMA channels of DMA. More...
#define | IFXGETH_NUM_RX_CHANNELS (4)
Number of Rx Channels of DMA. More...
#define | IFXGETH_MAX_TIMEOUT_VALUE (1000)
Maximum timeout value to wait against at. More...
#define | IFXGETH_NUM_DMA_CHANNELS (4)
Number of DMA channels. More...

Enumerations

enum IfxGeth_Index {
IfxGeth_Index_none = -1,
IfxGeth_Index_0 = 0
}
List of the available Geth instances. More...

Variables

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxGeth_cfg_indexMap [IFXGETH_NUM_MODULES]

Detailed Description

GETH on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Implementation layer

Definition in file IfxGeth_cfg.h.

Macro Definition Documentation

◆ IFXGETH_MAX_TIMEOUT_VALUE

#define IFXGETH_MAX_TIMEOUT_VALUE (1000)

Maximum timeout value to wait against at.

Definition at line 90 of file IfxGeth_cfg.h.

Referenced by IfxGeth_Eth_initModule().

◆ IFXGETH_NUM_DMA_CHANNELS

#define IFXGETH_NUM_DMA_CHANNELS (4)

Number of DMA channels.

Definition at line 94 of file IfxGeth_cfg.h.

◆ IFXGETH_NUM_MODULES

#define IFXGETH_NUM_MODULES (1)

Number of Geth instances.

Definition at line 78 of file IfxGeth_cfg.h.

Referenced by IfxGeth_getAddress(), and IfxGeth_getIndex().

◆ IFXGETH_NUM_RX_CHANNELS

#define IFXGETH_NUM_RX_CHANNELS (4)

Number of Rx Channels of DMA.

Definition at line 86 of file IfxGeth_cfg.h.

◆ IFXGETH_NUM_RX_QUEUES

#define IFXGETH_NUM_RX_QUEUES (4)

Number of Rx queues in MTL block.

Definition at line 74 of file IfxGeth_cfg.h.

◆ IFXGETH_NUM_TX_CHANNELS

#define IFXGETH_NUM_TX_CHANNELS (4)

Number of Tx DMA channels of DMA.

Definition at line 82 of file IfxGeth_cfg.h.

◆ IFXGETH_NUM_TX_QUEUES

#define IFXGETH_NUM_TX_QUEUES (4)

Number of Tx queues in MTL block.

Definition at line 70 of file IfxGeth_cfg.h.

Variable Documentation

◆ IfxGeth_cfg_indexMap

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxGeth_cfg_indexMap[IFXGETH_NUM_MODULES]

Definition at line 116 of file IfxGeth_cfg.h.


iLLD_TC38A: IfxGeth_PinMap.c File Reference

  • _PinMap
Variables
IfxGeth_PinMap.c File Reference
iLLD » GETH

GETH I/O map. More...

#include "IfxGeth_PinMap.h"
Include dependency graph for IfxGeth_PinMap.c:

Go to the source code of this file.

Variables

IfxGeth_Col_In | IfxGeth_COL_P11_15_IN = {&MODULE_GETH, {&MODULE_P11,15}, Ifx_RxSel_a}
IfxGeth_Crs_In | IfxGeth_CRSA_P11_14_IN = {&MODULE_GETH, {&MODULE_P11,14}, Ifx_RxSel_a}
IfxGeth_Crs_In | IfxGeth_CRSB_P11_11_IN = {&MODULE_GETH, {&MODULE_P11,11}, Ifx_RxSel_b}
IfxGeth_Crsdv_In | IfxGeth_CRSDVA_P11_11_IN = {&MODULE_GETH, {&MODULE_P11,11}, Ifx_RxSel_a}
IfxGeth_Crsdv_In | IfxGeth_CRSDVB_P11_14_IN = {&MODULE_GETH, {&MODULE_P11,14}, Ifx_RxSel_b}
IfxGeth_Grefclk_In | IfxGeth_GREFCLK_P11_5_IN = {&MODULE_GETH, {&MODULE_P11, 5}, Ifx_RxSel_a}
IfxGeth_Mdc_Out | IfxGeth_MDC_P02_8_OUT = {&MODULE_GETH, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt6}
IfxGeth_Mdc_Out | IfxGeth_MDC_P12_0_OUT = {&MODULE_GETH, {&MODULE_P12, 0}, IfxPort_OutputIdx_alt6}
IfxGeth_Mdc_Out | IfxGeth_MDC_P21_2_OUT = {&MODULE_GETH, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt5}
IfxGeth_Mdio_InOut | IfxGeth_MDIO_P00_0_INOUT = {&MODULE_GETH, {&MODULE_P00, 0}, Ifx_RxSel_a, IfxPort_OutputIdx_general}
IfxGeth_Mdio_InOut | IfxGeth_MDIO_P12_1_INOUT = {&MODULE_GETH, {&MODULE_P12, 1}, Ifx_RxSel_c, IfxPort_OutputIdx_general}
IfxGeth_Mdio_InOut | IfxGeth_MDIO_P21_3_INOUT = {&MODULE_GETH, {&MODULE_P21, 3}, Ifx_RxSel_d, IfxPort_OutputIdx_general}
IfxGeth_Pps_Out | IfxGeth_PPS_P14_4_OUT = {&MODULE_GETH, {&MODULE_P14, 4}, IfxPort_OutputIdx_alt6}
IfxGeth_Refclk_In | IfxGeth_REFCLKA_P11_12_IN = {&MODULE_GETH, {&MODULE_P11,12}, Ifx_RxSel_a}
IfxGeth_Rxclk_In | IfxGeth_RXCLKA_P11_12_IN = {&MODULE_GETH, {&MODULE_P11,12}, Ifx_RxSel_a}
IfxGeth_Rxclk_In | IfxGeth_RXCLKB_P11_4_IN = {&MODULE_GETH, {&MODULE_P11, 4}, Ifx_RxSel_b}
IfxGeth_Rxclk_In | IfxGeth_RXCLKC_P12_0_IN = {&MODULE_GETH, {&MODULE_P12, 0}, Ifx_RxSel_c}
IfxGeth_Rxctl_In | IfxGeth_RXCTLA_P11_11_IN = {&MODULE_GETH, {&MODULE_P11,11}, Ifx_RxSel_a}
IfxGeth_Rxd_In | IfxGeth_RXD0A_P11_10_IN = {&MODULE_GETH, {&MODULE_P11,10}, Ifx_RxSel_a}
IfxGeth_Rxd_In | IfxGeth_RXD1A_P11_9_IN = {&MODULE_GETH, {&MODULE_P11, 9}, Ifx_RxSel_a}
IfxGeth_Rxd_In | IfxGeth_RXD2A_P11_8_IN = {&MODULE_GETH, {&MODULE_P11, 8}, Ifx_RxSel_a}
IfxGeth_Rxd_In | IfxGeth_RXD3A_P11_7_IN = {&MODULE_GETH, {&MODULE_P11, 7}, Ifx_RxSel_a}
IfxGeth_Rxdv_In | IfxGeth_RXDVA_P11_11_IN = {&MODULE_GETH, {&MODULE_P11,11}, Ifx_RxSel_a}
IfxGeth_Rxdv_In | IfxGeth_RXDVB_P11_14_IN = {&MODULE_GETH, {&MODULE_P11,14}, Ifx_RxSel_b}
IfxGeth_Rxer_In | IfxGeth_RXERA_P11_13_IN = {&MODULE_GETH, {&MODULE_P11,13}, Ifx_RxSel_a}
IfxGeth_Rxer_In | IfxGeth_RXERB_P21_7_IN = {&MODULE_GETH, {&MODULE_P21, 7}, Ifx_RxSel_b}
IfxGeth_Rxer_In | IfxGeth_RXERC_P10_0_IN = {&MODULE_GETH, {&MODULE_P10, 0}, Ifx_RxSel_c}
IfxGeth_Txclk_In | IfxGeth_TXCLKA_P11_5_IN = {&MODULE_GETH, {&MODULE_P11, 5}, Ifx_RxSel_a}
IfxGeth_Txclk_In | IfxGeth_TXCLKB_P11_12_IN = {&MODULE_GETH, {&MODULE_P11,12}, Ifx_RxSel_b}
IfxGeth_Txclk_Out | IfxGeth_TXCLK_P11_4_OUT = {&MODULE_GETH, {&MODULE_P11, 4}, IfxPort_OutputIdx_alt7}
IfxGeth_Txctl_Out | IfxGeth_TXCTL_P11_6_OUT = {&MODULE_GETH, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt6}
IfxGeth_Txd_Out | IfxGeth_TXD0_P11_3_OUT = {&MODULE_GETH, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt6}
IfxGeth_Txd_Out | IfxGeth_TXD1_P11_2_OUT = {&MODULE_GETH, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt6}
IfxGeth_Txd_Out | IfxGeth_TXD2_P11_1_OUT = {&MODULE_GETH, {&MODULE_P11, 1}, IfxPort_OutputIdx_alt6}
IfxGeth_Txd_Out | IfxGeth_TXD3_P11_0_OUT = {&MODULE_GETH, {&MODULE_P11, 0}, IfxPort_OutputIdx_alt6}
IfxGeth_Txen_Out | IfxGeth_TXEN_P11_6_OUT = {&MODULE_GETH, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt6}
IfxGeth_Txer_Out | IfxGeth_TXER_P11_4_OUT = {&MODULE_GETH, {&MODULE_P11, 4}, IfxPort_OutputIdx_alt6}
const IfxGeth_Col_In * | IfxGeth_Col_In_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_COL_IN_NUM_ITEMS]
const IfxGeth_Crs_In * | IfxGeth_Crs_In_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_CRS_IN_NUM_ITEMS]
const IfxGeth_Crsdv_In * | IfxGeth_Crsdv_In_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_CRSDV_IN_NUM_ITEMS]
const IfxGeth_Grefclk_In * | IfxGeth_Grefclk_In_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_GREFCLK_IN_NUM_ITEMS]
const IfxGeth_Mdc_Out * | IfxGeth_Mdc_Out_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_MDC_OUT_NUM_ITEMS]
const IfxGeth_Mdio_InOut * | IfxGeth_Mdio_InOut_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_MDIO_INOUT_NUM_ITEMS]
const IfxGeth_Pps_Out * | IfxGeth_Pps_Out_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_PPS_OUT_NUM_ITEMS]
const IfxGeth_Refclk_In * | IfxGeth_Refclk_In_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_REFCLK_IN_NUM_ITEMS]
const IfxGeth_Rxclk_In * | IfxGeth_Rxclk_In_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_RXCLK_IN_NUM_ITEMS]
const IfxGeth_Rxctl_In * | IfxGeth_Rxctl_In_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_RXCTL_IN_NUM_ITEMS]
const IfxGeth_Rxd_In * | IfxGeth_Rxd_In_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_RXD_IN_NUM_ITEMS]
const IfxGeth_Rxdv_In * | IfxGeth_Rxdv_In_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_RXDV_IN_NUM_ITEMS]
const IfxGeth_Rxer_In * | IfxGeth_Rxer_In_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_RXER_IN_NUM_ITEMS]
const IfxGeth_Txclk_In * | IfxGeth_Txclk_In_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXCLK_IN_NUM_ITEMS]
const IfxGeth_Txclk_Out * | IfxGeth_Txclk_Out_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXCLK_OUT_NUM_ITEMS]
const IfxGeth_Txctl_Out * | IfxGeth_Txctl_Out_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXCTL_OUT_NUM_ITEMS]
const IfxGeth_Txd_Out * | IfxGeth_Txd_Out_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXD_OUT_NUM_ITEMS]
const IfxGeth_Txen_Out * | IfxGeth_Txen_Out_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXEN_OUT_NUM_ITEMS]
const IfxGeth_Txer_Out * | IfxGeth_Txer_Out_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXER_OUT_NUM_ITEMS]

Detailed Description

GETH I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGeth_PinMap.c.

Variable Documentation

◆ IfxGeth_Col_In_pinTable

const IfxGeth_Col_In* IfxGeth_Col_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_COL_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxGeth_COL_P11_15_IN
}
}
IfxGeth_COL_P11_15_IN
IfxGeth_Col_In IfxGeth_COL_P11_15_IN
Definition: IfxGeth_PinMap.c:45

Definition at line 84 of file IfxGeth_PinMap.c.

◆ IfxGeth_COL_P11_15_IN

IfxGeth_Col_In IfxGeth_COL_P11_15_IN = {&MODULE_GETH, {&MODULE_P11,15}, Ifx_RxSel_a}

Definition at line 45 of file IfxGeth_PinMap.c.

◆ IfxGeth_Crs_In_pinTable

const IfxGeth_Crs_In* IfxGeth_Crs_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_CRS_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxGeth_CRSA_P11_14_IN,
&IfxGeth_CRSB_P11_11_IN
}
}
IfxGeth_CRSB_P11_11_IN
IfxGeth_Crs_In IfxGeth_CRSB_P11_11_IN
Definition: IfxGeth_PinMap.c:47
IfxGeth_CRSA_P11_14_IN
IfxGeth_Crs_In IfxGeth_CRSA_P11_14_IN
Definition: IfxGeth_PinMap.c:46

Definition at line 90 of file IfxGeth_PinMap.c.

◆ IfxGeth_CRSA_P11_14_IN

IfxGeth_Crs_In IfxGeth_CRSA_P11_14_IN = {&MODULE_GETH, {&MODULE_P11,14}, Ifx_RxSel_a}

Definition at line 46 of file IfxGeth_PinMap.c.

◆ IfxGeth_CRSB_P11_11_IN

IfxGeth_Crs_In IfxGeth_CRSB_P11_11_IN = {&MODULE_GETH, {&MODULE_P11,11}, Ifx_RxSel_b}

Definition at line 47 of file IfxGeth_PinMap.c.

◆ IfxGeth_Crsdv_In_pinTable

const IfxGeth_Crsdv_In* IfxGeth_Crsdv_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_CRSDV_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxGeth_CRSDVA_P11_11_IN,
&IfxGeth_CRSDVB_P11_14_IN
}
}
IfxGeth_CRSDVB_P11_14_IN
IfxGeth_Crsdv_In IfxGeth_CRSDVB_P11_14_IN
Definition: IfxGeth_PinMap.c:49
IfxGeth_CRSDVA_P11_11_IN
IfxGeth_Crsdv_In IfxGeth_CRSDVA_P11_11_IN
Definition: IfxGeth_PinMap.c:48

Definition at line 97 of file IfxGeth_PinMap.c.

◆ IfxGeth_CRSDVA_P11_11_IN

IfxGeth_Crsdv_In IfxGeth_CRSDVA_P11_11_IN = {&MODULE_GETH, {&MODULE_P11,11}, Ifx_RxSel_a}

Definition at line 48 of file IfxGeth_PinMap.c.

◆ IfxGeth_CRSDVB_P11_14_IN

IfxGeth_Crsdv_In IfxGeth_CRSDVB_P11_14_IN = {&MODULE_GETH, {&MODULE_P11,14}, Ifx_RxSel_b}

Definition at line 49 of file IfxGeth_PinMap.c.

◆ IfxGeth_Grefclk_In_pinTable

const IfxGeth_Grefclk_In* IfxGeth_Grefclk_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_GREFCLK_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxGeth_GREFCLK_P11_5_IN
}
}
IfxGeth_GREFCLK_P11_5_IN
IfxGeth_Grefclk_In IfxGeth_GREFCLK_P11_5_IN
Definition: IfxGeth_PinMap.c:50

Definition at line 104 of file IfxGeth_PinMap.c.

◆ IfxGeth_GREFCLK_P11_5_IN

IfxGeth_Grefclk_In IfxGeth_GREFCLK_P11_5_IN = {&MODULE_GETH, {&MODULE_P11, 5}, Ifx_RxSel_a}

Definition at line 50 of file IfxGeth_PinMap.c.

◆ IfxGeth_Mdc_Out_pinTable

const IfxGeth_Mdc_Out* IfxGeth_Mdc_Out_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_MDC_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxGeth_MDC_P02_8_OUT,
&IfxGeth_MDC_P12_0_OUT,
&IfxGeth_MDC_P21_2_OUT
}
}
IfxGeth_MDC_P12_0_OUT
IfxGeth_Mdc_Out IfxGeth_MDC_P12_0_OUT
Definition: IfxGeth_PinMap.c:52
IfxGeth_MDC_P02_8_OUT
IfxGeth_Mdc_Out IfxGeth_MDC_P02_8_OUT
Definition: IfxGeth_PinMap.c:51
IfxGeth_MDC_P21_2_OUT
IfxGeth_Mdc_Out IfxGeth_MDC_P21_2_OUT
Definition: IfxGeth_PinMap.c:53

Definition at line 110 of file IfxGeth_PinMap.c.

◆ IfxGeth_MDC_P02_8_OUT

IfxGeth_Mdc_Out IfxGeth_MDC_P02_8_OUT = {&MODULE_GETH, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt6}

Definition at line 51 of file IfxGeth_PinMap.c.

◆ IfxGeth_MDC_P12_0_OUT

IfxGeth_Mdc_Out IfxGeth_MDC_P12_0_OUT = {&MODULE_GETH, {&MODULE_P12, 0}, IfxPort_OutputIdx_alt6}

Definition at line 52 of file IfxGeth_PinMap.c.

◆ IfxGeth_MDC_P21_2_OUT

IfxGeth_Mdc_Out IfxGeth_MDC_P21_2_OUT = {&MODULE_GETH, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt5}

Definition at line 53 of file IfxGeth_PinMap.c.

◆ IfxGeth_Mdio_InOut_pinTable

const IfxGeth_Mdio_InOut* IfxGeth_Mdio_InOut_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_MDIO_INOUT_NUM_ITEMS]
Initial value:
= {
{
&IfxGeth_MDIO_P00_0_INOUT,
&IfxGeth_MDIO_P12_1_INOUT,
&IfxGeth_MDIO_P21_3_INOUT
}
}
IfxGeth_MDIO_P21_3_INOUT
IfxGeth_Mdio_InOut IfxGeth_MDIO_P21_3_INOUT
Definition: IfxGeth_PinMap.c:56
IfxGeth_MDIO_P00_0_INOUT
IfxGeth_Mdio_InOut IfxGeth_MDIO_P00_0_INOUT
Definition: IfxGeth_PinMap.c:54
IfxGeth_MDIO_P12_1_INOUT
IfxGeth_Mdio_InOut IfxGeth_MDIO_P12_1_INOUT
Definition: IfxGeth_PinMap.c:55

Definition at line 118 of file IfxGeth_PinMap.c.

◆ IfxGeth_MDIO_P00_0_INOUT

IfxGeth_Mdio_InOut IfxGeth_MDIO_P00_0_INOUT = {&MODULE_GETH, {&MODULE_P00, 0}, Ifx_RxSel_a, IfxPort_OutputIdx_general}

Definition at line 54 of file IfxGeth_PinMap.c.

◆ IfxGeth_MDIO_P12_1_INOUT

IfxGeth_Mdio_InOut IfxGeth_MDIO_P12_1_INOUT = {&MODULE_GETH, {&MODULE_P12, 1}, Ifx_RxSel_c, IfxPort_OutputIdx_general}

Definition at line 55 of file IfxGeth_PinMap.c.

◆ IfxGeth_MDIO_P21_3_INOUT

IfxGeth_Mdio_InOut IfxGeth_MDIO_P21_3_INOUT = {&MODULE_GETH, {&MODULE_P21, 3}, Ifx_RxSel_d, IfxPort_OutputIdx_general}

Definition at line 56 of file IfxGeth_PinMap.c.

◆ IfxGeth_Pps_Out_pinTable

const IfxGeth_Pps_Out* IfxGeth_Pps_Out_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_PPS_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxGeth_PPS_P14_4_OUT
}
}
IfxGeth_PPS_P14_4_OUT
IfxGeth_Pps_Out IfxGeth_PPS_P14_4_OUT
Definition: IfxGeth_PinMap.c:57

Definition at line 126 of file IfxGeth_PinMap.c.

◆ IfxGeth_PPS_P14_4_OUT

IfxGeth_Pps_Out IfxGeth_PPS_P14_4_OUT = {&MODULE_GETH, {&MODULE_P14, 4}, IfxPort_OutputIdx_alt6}

Definition at line 57 of file IfxGeth_PinMap.c.

◆ IfxGeth_Refclk_In_pinTable

const IfxGeth_Refclk_In* IfxGeth_Refclk_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_REFCLK_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxGeth_REFCLKA_P11_12_IN
}
}
IfxGeth_REFCLKA_P11_12_IN
IfxGeth_Refclk_In IfxGeth_REFCLKA_P11_12_IN
Definition: IfxGeth_PinMap.c:58

Definition at line 132 of file IfxGeth_PinMap.c.

◆ IfxGeth_REFCLKA_P11_12_IN

IfxGeth_Refclk_In IfxGeth_REFCLKA_P11_12_IN = {&MODULE_GETH, {&MODULE_P11,12}, Ifx_RxSel_a}

Definition at line 58 of file IfxGeth_PinMap.c.

◆ IfxGeth_Rxclk_In_pinTable

const IfxGeth_Rxclk_In* IfxGeth_Rxclk_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_RXCLK_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxGeth_RXCLKA_P11_12_IN,
&IfxGeth_RXCLKB_P11_4_IN,
&IfxGeth_RXCLKC_P12_0_IN
}
}
IfxGeth_RXCLKB_P11_4_IN
IfxGeth_Rxclk_In IfxGeth_RXCLKB_P11_4_IN
Definition: IfxGeth_PinMap.c:60
IfxGeth_RXCLKA_P11_12_IN
IfxGeth_Rxclk_In IfxGeth_RXCLKA_P11_12_IN
Definition: IfxGeth_PinMap.c:59
IfxGeth_RXCLKC_P12_0_IN
IfxGeth_Rxclk_In IfxGeth_RXCLKC_P12_0_IN
Definition: IfxGeth_PinMap.c:61

Definition at line 138 of file IfxGeth_PinMap.c.

◆ IfxGeth_RXCLKA_P11_12_IN

IfxGeth_Rxclk_In IfxGeth_RXCLKA_P11_12_IN = {&MODULE_GETH, {&MODULE_P11,12}, Ifx_RxSel_a}

Definition at line 59 of file IfxGeth_PinMap.c.

◆ IfxGeth_RXCLKB_P11_4_IN

IfxGeth_Rxclk_In IfxGeth_RXCLKB_P11_4_IN = {&MODULE_GETH, {&MODULE_P11, 4}, Ifx_RxSel_b}

Definition at line 60 of file IfxGeth_PinMap.c.

◆ IfxGeth_RXCLKC_P12_0_IN

IfxGeth_Rxclk_In IfxGeth_RXCLKC_P12_0_IN = {&MODULE_GETH, {&MODULE_P12, 0}, Ifx_RxSel_c}

Definition at line 61 of file IfxGeth_PinMap.c.

◆ IfxGeth_Rxctl_In_pinTable

const IfxGeth_Rxctl_In* IfxGeth_Rxctl_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_RXCTL_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxGeth_RXCTLA_P11_11_IN
}
}
IfxGeth_RXCTLA_P11_11_IN
IfxGeth_Rxctl_In IfxGeth_RXCTLA_P11_11_IN
Definition: IfxGeth_PinMap.c:62

Definition at line 146 of file IfxGeth_PinMap.c.

◆ IfxGeth_RXCTLA_P11_11_IN

IfxGeth_Rxctl_In IfxGeth_RXCTLA_P11_11_IN = {&MODULE_GETH, {&MODULE_P11,11}, Ifx_RxSel_a}

Definition at line 62 of file IfxGeth_PinMap.c.

◆ IfxGeth_RXD0A_P11_10_IN

IfxGeth_Rxd_In IfxGeth_RXD0A_P11_10_IN = {&MODULE_GETH, {&MODULE_P11,10}, Ifx_RxSel_a}

Definition at line 63 of file IfxGeth_PinMap.c.

◆ IfxGeth_RXD1A_P11_9_IN

IfxGeth_Rxd_In IfxGeth_RXD1A_P11_9_IN = {&MODULE_GETH, {&MODULE_P11, 9}, Ifx_RxSel_a}

Definition at line 64 of file IfxGeth_PinMap.c.

◆ IfxGeth_RXD2A_P11_8_IN

IfxGeth_Rxd_In IfxGeth_RXD2A_P11_8_IN = {&MODULE_GETH, {&MODULE_P11, 8}, Ifx_RxSel_a}

Definition at line 65 of file IfxGeth_PinMap.c.

◆ IfxGeth_RXD3A_P11_7_IN

IfxGeth_Rxd_In IfxGeth_RXD3A_P11_7_IN = {&MODULE_GETH, {&MODULE_P11, 7}, Ifx_RxSel_a}

Definition at line 66 of file IfxGeth_PinMap.c.

◆ IfxGeth_Rxd_In_pinTable

const IfxGeth_Rxd_In* IfxGeth_Rxd_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_RXD_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxGeth_RXD3A_P11_7_IN,
&IfxGeth_RXD1A_P11_9_IN,
&IfxGeth_RXD2A_P11_8_IN,
&IfxGeth_RXD0A_P11_10_IN
}
}
IfxGeth_RXD2A_P11_8_IN
IfxGeth_Rxd_In IfxGeth_RXD2A_P11_8_IN
Definition: IfxGeth_PinMap.c:65
IfxGeth_RXD1A_P11_9_IN
IfxGeth_Rxd_In IfxGeth_RXD1A_P11_9_IN
Definition: IfxGeth_PinMap.c:64
IfxGeth_RXD3A_P11_7_IN
IfxGeth_Rxd_In IfxGeth_RXD3A_P11_7_IN
Definition: IfxGeth_PinMap.c:66
IfxGeth_RXD0A_P11_10_IN
IfxGeth_Rxd_In IfxGeth_RXD0A_P11_10_IN
Definition: IfxGeth_PinMap.c:63

Definition at line 152 of file IfxGeth_PinMap.c.

◆ IfxGeth_Rxdv_In_pinTable

const IfxGeth_Rxdv_In* IfxGeth_Rxdv_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_RXDV_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxGeth_RXDVA_P11_11_IN,
&IfxGeth_RXDVB_P11_14_IN
}
}
IfxGeth_RXDVB_P11_14_IN
IfxGeth_Rxdv_In IfxGeth_RXDVB_P11_14_IN
Definition: IfxGeth_PinMap.c:68
IfxGeth_RXDVA_P11_11_IN
IfxGeth_Rxdv_In IfxGeth_RXDVA_P11_11_IN
Definition: IfxGeth_PinMap.c:67

Definition at line 161 of file IfxGeth_PinMap.c.

◆ IfxGeth_RXDVA_P11_11_IN

IfxGeth_Rxdv_In IfxGeth_RXDVA_P11_11_IN = {&MODULE_GETH, {&MODULE_P11,11}, Ifx_RxSel_a}

Definition at line 67 of file IfxGeth_PinMap.c.

◆ IfxGeth_RXDVB_P11_14_IN

IfxGeth_Rxdv_In IfxGeth_RXDVB_P11_14_IN = {&MODULE_GETH, {&MODULE_P11,14}, Ifx_RxSel_b}

Definition at line 68 of file IfxGeth_PinMap.c.

◆ IfxGeth_Rxer_In_pinTable

const IfxGeth_Rxer_In* IfxGeth_Rxer_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_RXER_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxGeth_RXERA_P11_13_IN,
&IfxGeth_RXERB_P21_7_IN,
&IfxGeth_RXERC_P10_0_IN
}
}
IfxGeth_RXERA_P11_13_IN
IfxGeth_Rxer_In IfxGeth_RXERA_P11_13_IN
Definition: IfxGeth_PinMap.c:69
IfxGeth_RXERB_P21_7_IN
IfxGeth_Rxer_In IfxGeth_RXERB_P21_7_IN
Definition: IfxGeth_PinMap.c:70
IfxGeth_RXERC_P10_0_IN
IfxGeth_Rxer_In IfxGeth_RXERC_P10_0_IN
Definition: IfxGeth_PinMap.c:71

Definition at line 168 of file IfxGeth_PinMap.c.

◆ IfxGeth_RXERA_P11_13_IN

IfxGeth_Rxer_In IfxGeth_RXERA_P11_13_IN = {&MODULE_GETH, {&MODULE_P11,13}, Ifx_RxSel_a}

Definition at line 69 of file IfxGeth_PinMap.c.

◆ IfxGeth_RXERB_P21_7_IN

IfxGeth_Rxer_In IfxGeth_RXERB_P21_7_IN = {&MODULE_GETH, {&MODULE_P21, 7}, Ifx_RxSel_b}

Definition at line 70 of file IfxGeth_PinMap.c.

◆ IfxGeth_RXERC_P10_0_IN

IfxGeth_Rxer_In IfxGeth_RXERC_P10_0_IN = {&MODULE_GETH, {&MODULE_P10, 0}, Ifx_RxSel_c}

Definition at line 71 of file IfxGeth_PinMap.c.

◆ IfxGeth_Txclk_In_pinTable

const IfxGeth_Txclk_In* IfxGeth_Txclk_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXCLK_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxGeth_TXCLKA_P11_5_IN,
&IfxGeth_TXCLKB_P11_12_IN
}
}
IfxGeth_TXCLKB_P11_12_IN
IfxGeth_Txclk_In IfxGeth_TXCLKB_P11_12_IN
Definition: IfxGeth_PinMap.c:73
IfxGeth_TXCLKA_P11_5_IN
IfxGeth_Txclk_In IfxGeth_TXCLKA_P11_5_IN
Definition: IfxGeth_PinMap.c:72

Definition at line 176 of file IfxGeth_PinMap.c.

◆ IfxGeth_Txclk_Out_pinTable

const IfxGeth_Txclk_Out* IfxGeth_Txclk_Out_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXCLK_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxGeth_TXCLK_P11_4_OUT
}
}
IfxGeth_TXCLK_P11_4_OUT
IfxGeth_Txclk_Out IfxGeth_TXCLK_P11_4_OUT
Definition: IfxGeth_PinMap.c:74

Definition at line 183 of file IfxGeth_PinMap.c.

◆ IfxGeth_TXCLK_P11_4_OUT

IfxGeth_Txclk_Out IfxGeth_TXCLK_P11_4_OUT = {&MODULE_GETH, {&MODULE_P11, 4}, IfxPort_OutputIdx_alt7}

Definition at line 74 of file IfxGeth_PinMap.c.

◆ IfxGeth_TXCLKA_P11_5_IN

IfxGeth_Txclk_In IfxGeth_TXCLKA_P11_5_IN = {&MODULE_GETH, {&MODULE_P11, 5}, Ifx_RxSel_a}

Definition at line 72 of file IfxGeth_PinMap.c.

◆ IfxGeth_TXCLKB_P11_12_IN

IfxGeth_Txclk_In IfxGeth_TXCLKB_P11_12_IN = {&MODULE_GETH, {&MODULE_P11,12}, Ifx_RxSel_b}

Definition at line 73 of file IfxGeth_PinMap.c.

◆ IfxGeth_Txctl_Out_pinTable

const IfxGeth_Txctl_Out* IfxGeth_Txctl_Out_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXCTL_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxGeth_TXCTL_P11_6_OUT
}
}
IfxGeth_TXCTL_P11_6_OUT
IfxGeth_Txctl_Out IfxGeth_TXCTL_P11_6_OUT
Definition: IfxGeth_PinMap.c:75

Definition at line 189 of file IfxGeth_PinMap.c.

◆ IfxGeth_TXCTL_P11_6_OUT

IfxGeth_Txctl_Out IfxGeth_TXCTL_P11_6_OUT = {&MODULE_GETH, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt6}

Definition at line 75 of file IfxGeth_PinMap.c.

◆ IfxGeth_TXD0_P11_3_OUT

IfxGeth_Txd_Out IfxGeth_TXD0_P11_3_OUT = {&MODULE_GETH, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt6}

Definition at line 76 of file IfxGeth_PinMap.c.

◆ IfxGeth_TXD1_P11_2_OUT

IfxGeth_Txd_Out IfxGeth_TXD1_P11_2_OUT = {&MODULE_GETH, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt6}

Definition at line 77 of file IfxGeth_PinMap.c.

◆ IfxGeth_TXD2_P11_1_OUT

IfxGeth_Txd_Out IfxGeth_TXD2_P11_1_OUT = {&MODULE_GETH, {&MODULE_P11, 1}, IfxPort_OutputIdx_alt6}

Definition at line 78 of file IfxGeth_PinMap.c.

◆ IfxGeth_TXD3_P11_0_OUT

IfxGeth_Txd_Out IfxGeth_TXD3_P11_0_OUT = {&MODULE_GETH, {&MODULE_P11, 0}, IfxPort_OutputIdx_alt6}

Definition at line 79 of file IfxGeth_PinMap.c.

◆ IfxGeth_Txd_Out_pinTable

const IfxGeth_Txd_Out* IfxGeth_Txd_Out_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXD_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxGeth_TXD3_P11_0_OUT,
&IfxGeth_TXD2_P11_1_OUT,
&IfxGeth_TXD1_P11_2_OUT,
&IfxGeth_TXD0_P11_3_OUT
}
}
IfxGeth_TXD0_P11_3_OUT
IfxGeth_Txd_Out IfxGeth_TXD0_P11_3_OUT
Definition: IfxGeth_PinMap.c:76
IfxGeth_TXD3_P11_0_OUT
IfxGeth_Txd_Out IfxGeth_TXD3_P11_0_OUT
Definition: IfxGeth_PinMap.c:79
IfxGeth_TXD2_P11_1_OUT
IfxGeth_Txd_Out IfxGeth_TXD2_P11_1_OUT
Definition: IfxGeth_PinMap.c:78
IfxGeth_TXD1_P11_2_OUT
IfxGeth_Txd_Out IfxGeth_TXD1_P11_2_OUT
Definition: IfxGeth_PinMap.c:77

Definition at line 195 of file IfxGeth_PinMap.c.

◆ IfxGeth_Txen_Out_pinTable

const IfxGeth_Txen_Out* IfxGeth_Txen_Out_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXEN_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxGeth_TXEN_P11_6_OUT
}
}
IfxGeth_TXEN_P11_6_OUT
IfxGeth_Txen_Out IfxGeth_TXEN_P11_6_OUT
Definition: IfxGeth_PinMap.c:80

Definition at line 204 of file IfxGeth_PinMap.c.

◆ IfxGeth_TXEN_P11_6_OUT

IfxGeth_Txen_Out IfxGeth_TXEN_P11_6_OUT = {&MODULE_GETH, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt6}

Definition at line 80 of file IfxGeth_PinMap.c.

◆ IfxGeth_Txer_Out_pinTable

const IfxGeth_Txer_Out* IfxGeth_Txer_Out_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXER_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxGeth_TXER_P11_4_OUT
}
}
IfxGeth_TXER_P11_4_OUT
IfxGeth_Txer_Out IfxGeth_TXER_P11_4_OUT
Definition: IfxGeth_PinMap.c:81

Definition at line 210 of file IfxGeth_PinMap.c.

◆ IfxGeth_TXER_P11_4_OUT

IfxGeth_Txer_Out IfxGeth_TXER_P11_4_OUT = {&MODULE_GETH, {&MODULE_P11, 4}, IfxPort_OutputIdx_alt6}

Definition at line 81 of file IfxGeth_PinMap.c.


iLLD_TC38A: IfxGeth_PinMap.h File Reference

  • _PinMap
Data Structures | Macros | Variables
IfxGeth_PinMap.h File Reference
iLLD » GETH

GETH I/O map. More...

#include <IfxGeth_reg.h>
#include <_Impl/IfxGeth_cfg.h>
#include <Port/Std/IfxPort.h>
Include dependency graph for IfxGeth_PinMap.h:

Go to the source code of this file.

Data Structures

struct | IfxGeth_Crs_In
CRS pin mapping structure. More...
struct | IfxGeth_Crsdv_In
CRSDV pin mapping structure. More...
struct | IfxGeth_Rxdv_In
RXDV pin mapping structure. More...
struct | IfxGeth_Rxctl_In
RXCTL pin mapping structure. More...
struct | IfxGeth_Grefclk_In
GREFCLK pin mapping structure. More...
struct | IfxGeth_Refclk_In
REFCLK pin mapping structure. More...
struct | IfxGeth_Rxclk_In
RXCLK pin mapping structure. More...
struct | IfxGeth_Txclk_In
TXCLK pin mapping structure. More...
struct | IfxGeth_Rxd_In
RXD pin mapping structure. More...
struct | IfxGeth_Col_In
COL pin mapping structure. More...
struct | IfxGeth_Mdc_Out
MDC pin mapping structure. More...
struct | IfxGeth_Mdio_InOut
MDIO pin mapping structure. More...
struct | IfxGeth_Txd_Out
TXD pin mapping structure. More...
struct | IfxGeth_Txclk_Out
TXCLK pin mapping structure. More...
struct | IfxGeth_Txen_Out
TXEN pin mapping structure. More...
struct | IfxGeth_Txer_Out
TXER pin mapping structure. More...
struct | IfxGeth_Txctl_Out
TXCTL pin mapping structure. More...
struct | IfxGeth_Rxer_In
RXER pin mapping structure. More...
struct | IfxGeth_Pps_Out
PPS pin mapping structure. More...

Macros

#define | IFXGETH_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXGETH_PINMAP_COL_IN_NUM_ITEMS 1
#define | IFXGETH_PINMAP_CRS_IN_NUM_ITEMS 2
#define | IFXGETH_PINMAP_CRSDV_IN_NUM_ITEMS 2
#define | IFXGETH_PINMAP_GREFCLK_IN_NUM_ITEMS 1
#define | IFXGETH_PINMAP_MDC_OUT_NUM_ITEMS 3
#define | IFXGETH_PINMAP_MDIO_INOUT_NUM_ITEMS 3
#define | IFXGETH_PINMAP_PPS_OUT_NUM_ITEMS 1
#define | IFXGETH_PINMAP_REFCLK_IN_NUM_ITEMS 1
#define | IFXGETH_PINMAP_RXCLK_IN_NUM_ITEMS 3
#define | IFXGETH_PINMAP_RXCTL_IN_NUM_ITEMS 1
#define | IFXGETH_PINMAP_RXD_IN_NUM_ITEMS 4
#define | IFXGETH_PINMAP_RXDV_IN_NUM_ITEMS 2
#define | IFXGETH_PINMAP_RXER_IN_NUM_ITEMS 3
#define | IFXGETH_PINMAP_TXCLK_IN_NUM_ITEMS 2
#define | IFXGETH_PINMAP_TXCLK_OUT_NUM_ITEMS 1
#define | IFXGETH_PINMAP_TXCTL_OUT_NUM_ITEMS 1
#define | IFXGETH_PINMAP_TXD_OUT_NUM_ITEMS 4
#define | IFXGETH_PINMAP_TXEN_OUT_NUM_ITEMS 1
#define | IFXGETH_PINMAP_TXER_OUT_NUM_ITEMS 1

Variables

IFX_EXTERN IfxGeth_Col_In IfxGeth_COL_P11_15_IN
Collision MII. More...
IFX_EXTERN IfxGeth_Crs_In IfxGeth_CRSA_P11_14_IN
Carrier Sense MII. More...
IFX_EXTERN IfxGeth_Crs_In IfxGeth_CRSB_P11_11_IN
Carrier Sense MII. More...
IFX_EXTERN IfxGeth_Crsdv_In IfxGeth_CRSDVA_P11_11_IN
Carrier Sense / Data Valid combi-signal for RMII. More...
IFX_EXTERN IfxGeth_Crsdv_In IfxGeth_CRSDVB_P11_14_IN
Carrier Sense / Data Valid combi-signal for RMII. More...
IFX_EXTERN IfxGeth_Grefclk_In IfxGeth_GREFCLK_P11_5_IN
Gigabit Reference Clock input for RGMII (125 MHz high precission) More...
IFX_EXTERN IfxGeth_Mdc_Out IfxGeth_MDC_P02_8_OUT
MDIO clock. More...
IFX_EXTERN IfxGeth_Mdc_Out IfxGeth_MDC_P12_0_OUT
MDIO clock. More...
IFX_EXTERN IfxGeth_Mdc_Out IfxGeth_MDC_P21_2_OUT
MDIO clock. More...
IFX_EXTERN IfxGeth_Mdio_InOut IfxGeth_MDIO_P00_0_INOUT
MDIO Output. More...
IFX_EXTERN IfxGeth_Mdio_InOut IfxGeth_MDIO_P12_1_INOUT
MDIO Output. More...
IFX_EXTERN IfxGeth_Mdio_InOut IfxGeth_MDIO_P21_3_INOUT
MDIO Output. More...
IFX_EXTERN IfxGeth_Pps_Out IfxGeth_PPS_P14_4_OUT
Pulse Per Second. More...
IFX_EXTERN IfxGeth_Refclk_In IfxGeth_REFCLKA_P11_12_IN
Reference Clock input for RMII (50 MHz) More...
IFX_EXTERN IfxGeth_Rxclk_In IfxGeth_RXCLKA_P11_12_IN
Receive Clock MII. More...
IFX_EXTERN IfxGeth_Rxclk_In IfxGeth_RXCLKB_P11_4_IN
Receive Clock MII. More...
IFX_EXTERN IfxGeth_Rxclk_In IfxGeth_RXCLKC_P12_0_IN
Receive Clock MII. More...
IFX_EXTERN IfxGeth_Rxctl_In IfxGeth_RXCTLA_P11_11_IN
Receive Control for RGMII. More...
IFX_EXTERN IfxGeth_Rxd_In IfxGeth_RXD0A_P11_10_IN
Receive Data 0 MII, RMII and RGMII (RGMII can use RXD0A only) More...
IFX_EXTERN IfxGeth_Rxd_In IfxGeth_RXD1A_P11_9_IN
Receive Data 1 MII, RMII and RGMII (RGMII can use RXD1A only) More...
IFX_EXTERN IfxGeth_Rxd_In IfxGeth_RXD2A_P11_8_IN
Receive Data 2 MII and RGMII (RGMII can use RXD2A only) More...
IFX_EXTERN IfxGeth_Rxd_In IfxGeth_RXD3A_P11_7_IN
Receive Data 3 MII and RGMII (RGMII can use RXD3A only) More...
IFX_EXTERN IfxGeth_Rxdv_In IfxGeth_RXDVA_P11_11_IN
Receive Data Valid MII. More...
IFX_EXTERN IfxGeth_Rxdv_In IfxGeth_RXDVB_P11_14_IN
Receive Data Valid MII. More...
IFX_EXTERN IfxGeth_Rxer_In IfxGeth_RXERA_P11_13_IN
Receive Error MII. More...
IFX_EXTERN IfxGeth_Rxer_In IfxGeth_RXERB_P21_7_IN
Receive Error MII. More...
IFX_EXTERN IfxGeth_Rxer_In IfxGeth_RXERC_P10_0_IN
Receive Error MII. More...
IFX_EXTERN IfxGeth_Txclk_In IfxGeth_TXCLKA_P11_5_IN
Transmit Clock Input for MII. More...
IFX_EXTERN IfxGeth_Txclk_In IfxGeth_TXCLKB_P11_12_IN
Transmit Clock Input for MII. More...
IFX_EXTERN IfxGeth_Txclk_Out IfxGeth_TXCLK_P11_4_OUT
Transmit Clock Output for RGMII. More...
IFX_EXTERN IfxGeth_Txctl_Out IfxGeth_TXCTL_P11_6_OUT
GETH_TXEN 0: Transmit Control for RGMII. More...
IFX_EXTERN IfxGeth_Txd_Out IfxGeth_TXD0_P11_3_OUT
Transmit Data. More...
IFX_EXTERN IfxGeth_Txd_Out IfxGeth_TXD1_P11_2_OUT
Transmit Data. More...
IFX_EXTERN IfxGeth_Txd_Out IfxGeth_TXD2_P11_1_OUT
Transmit Data. More...
IFX_EXTERN IfxGeth_Txd_Out IfxGeth_TXD3_P11_0_OUT
Transmit Data. More...
IFX_EXTERN IfxGeth_Txen_Out IfxGeth_TXEN_P11_6_OUT
Transmit Enable MII and RMII. More...
IFX_EXTERN IfxGeth_Txer_Out IfxGeth_TXER_P11_4_OUT
Transmit Error MII. More...
IFX_EXTERN const IfxGeth_Col_In * | IfxGeth_Col_In_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_COL_IN_NUM_ITEMS]
IfxGeth_Col_In table. More...
IFX_EXTERN const IfxGeth_Crs_In * | IfxGeth_Crs_In_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_CRS_IN_NUM_ITEMS]
IfxGeth_Crs_In table. More...
IFX_EXTERN const IfxGeth_Crsdv_In * | IfxGeth_Crsdv_In_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_CRSDV_IN_NUM_ITEMS]
IfxGeth_Crsdv_In table. More...
IFX_EXTERN const IfxGeth_Grefclk_In * | IfxGeth_Grefclk_In_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_GREFCLK_IN_NUM_ITEMS]
IfxGeth_Grefclk_In table. More...
IFX_EXTERN const IfxGeth_Mdc_Out * | IfxGeth_Mdc_Out_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_MDC_OUT_NUM_ITEMS]
IfxGeth_Mdc_Out table. More...
IFX_EXTERN const IfxGeth_Mdio_InOut * | IfxGeth_Mdio_InOut_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_MDIO_INOUT_NUM_ITEMS]
IfxGeth_Mdio_InOut table. More...
IFX_EXTERN const IfxGeth_Pps_Out * | IfxGeth_Pps_Out_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_PPS_OUT_NUM_ITEMS]
IfxGeth_Pps_Out table. More...
IFX_EXTERN const IfxGeth_Refclk_In * | IfxGeth_Refclk_In_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_REFCLK_IN_NUM_ITEMS]
IfxGeth_Refclk_In table. More...
IFX_EXTERN const IfxGeth_Rxclk_In * | IfxGeth_Rxclk_In_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_RXCLK_IN_NUM_ITEMS]
IfxGeth_Rxclk_In table. More...
IFX_EXTERN const IfxGeth_Rxctl_In * | IfxGeth_Rxctl_In_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_RXCTL_IN_NUM_ITEMS]
IfxGeth_Rxctl_In table. More...
IFX_EXTERN const IfxGeth_Rxd_In * | IfxGeth_Rxd_In_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_RXD_IN_NUM_ITEMS]
IfxGeth_Rxd_In table. More...
IFX_EXTERN const IfxGeth_Rxdv_In * | IfxGeth_Rxdv_In_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_RXDV_IN_NUM_ITEMS]
IfxGeth_Rxdv_In table. More...
IFX_EXTERN const IfxGeth_Rxer_In * | IfxGeth_Rxer_In_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_RXER_IN_NUM_ITEMS]
IfxGeth_Rxer_In table. More...
IFX_EXTERN const IfxGeth_Txclk_In * | IfxGeth_Txclk_In_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXCLK_IN_NUM_ITEMS]
IfxGeth_Txclk_In table. More...
IFX_EXTERN const IfxGeth_Txclk_Out * | IfxGeth_Txclk_Out_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXCLK_OUT_NUM_ITEMS]
IfxGeth_Txclk_Out table. More...
IFX_EXTERN const IfxGeth_Txctl_Out * | IfxGeth_Txctl_Out_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXCTL_OUT_NUM_ITEMS]
IfxGeth_Txctl_Out table. More...
IFX_EXTERN const IfxGeth_Txd_Out * | IfxGeth_Txd_Out_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXD_OUT_NUM_ITEMS]
IfxGeth_Txd_Out table. More...
IFX_EXTERN const IfxGeth_Txen_Out * | IfxGeth_Txen_Out_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXEN_OUT_NUM_ITEMS]
IfxGeth_Txen_Out table. More...
IFX_EXTERN const IfxGeth_Txer_Out * | IfxGeth_Txer_Out_pinTable [IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXER_OUT_NUM_ITEMS]
IfxGeth_Txer_Out table. More...

Detailed Description

GETH I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGeth_PinMap.h.


iLLD_TC38A: IfxGeth_Eth.h File Reference

  • Geth
  • Eth
Data Structures | Functions | Variables
IfxGeth_Eth.h File Reference
iLLD » GETH

GETH ETH details. More...

#include "_Utilities/Ifx_Assert.h"
#include "Geth/Std/IfxGeth.h"
#include "_PinMap/IfxGeth_PinMap.h"
#include "IfxPort_reg.h"
#include "IfxPort_bf.h"
Include dependency graph for IfxGeth_Eth.h:

Go to the source code of this file.

Data Structures

struct | IfxGeth_Eth_DmaInterruptConfig
Interrupt configuration structure for DMA Channel. More...
struct | IfxGeth_Eth_MiiPins
Port pins for MII mode configuration. More...
struct | IfxGeth_Eth_MtlInterruptConfig
Interrupt configuration structure for MTL block. More...
struct | IfxGeth_Eth_RgmiiPins
Port pins for RGMII mode configuration. More...
struct | IfxGeth_Eth_RmiiPins
Port pins for RMII mode configuration. More...
struct | IfxGeth_Eth_RxChannelConfig
Configuration sturcture for DMA rx channel. More...
struct | IfxGeth_Eth_RxQueueConfig
Rx Queue Configuration. More...
struct | IfxGeth_Eth_TxChannelConfig
Configuration sturcture for DMA tx channel. More...
struct | IfxGeth_Eth_TxQueueConfig
Tx Queue Configuration. More...
struct | IfxGeth_Eth_DmaConfig
Configuration Structure for the DMA initialisation. More...
struct | IfxGeth_Eth_MacConfig
Configuration Structure for the MAC initialisation. More...
struct | IfxGeth_Eth_MtlConfig
Configuration Structure for the MTL initialisation. More...
struct | IfxGeth_Eth_PinConfig
Configuration structure for pins. More...
struct | IfxGeth_Eth_RxChannel
Handle sturcture for DMA rx channel. More...
struct | IfxGeth_Eth_TxChannel
handle sturcture for DMA tx channel More...
struct | IfxGeth_Eth
GETH driver Handle. More...
struct | IfxGeth_Eth_Config
Configuration Structure for the Module initialisation. More...
struct | IfxGeth_Eth_FrameConfig
Configuration Structure for TX Frame. More...

Functions

IFX_EXTERN void | IfxGeth_Eth_configureMacCore (IfxGeth_Eth *geth, IfxGeth_Eth_MacConfig *macConfig)
Configures the MAC core. More...
IFX_INLINE void * | IfxGeth_Eth_waitTransmitBuffer (IfxGeth_Eth *geth, IfxGeth_TxDmaChannel channelId)
Waits for one TX buffer becomes available. More...
IFX_EXTERN void * | IfxGeth_Eth_getReceiveBuffer (IfxGeth_Eth *geth, IfxGeth_RxDmaChannel channelId)
Gets receive buffer
note: IfxEth_freeReceiveBuffer() shall be called after the data from the RX buffer has been processed. More...
IFX_EXTERN void * | IfxGeth_Eth_getTransmitBuffer (IfxGeth_Eth *geth, IfxGeth_TxDmaChannel channelId)
Get the transmit buffer pointer of current descriptor. More...
IFX_EXTERN void | IfxGeth_Eth_initModule (IfxGeth_Eth *geth, IfxGeth_Eth_Config *config)
Initialises the Geth Module with given configuration. More...
IFX_EXTERN void | IfxGeth_Eth_initModuleConfig (IfxGeth_Eth_Config *config, Ifx_GETH *gethSFR)
Initialises the config structure with default values. More...
IFX_EXTERN void | IfxGeth_Eth_setupMiiInputPins (IfxGeth_Eth *geth, const IfxGeth_Eth_MiiPins *miiPins)
Set up MII mode input pins. More...
IFX_EXTERN void | IfxGeth_Eth_setupMiiOutputPins (IfxGeth_Eth *geth, const IfxGeth_Eth_MiiPins *miiPins)
setup MII mode output pins More...
IFX_EXTERN void | IfxGeth_Eth_setupRgmiiInputPins (IfxGeth_Eth *geth, const IfxGeth_Eth_RgmiiPins *rgmiiPins)
Set up RGMII mode input pins. More...
IFX_EXTERN void | IfxGeth_Eth_setupRgmiiOutputPins (IfxGeth_Eth *geth, const IfxGeth_Eth_RgmiiPins *rgmiiPins)
Set up RGMII mode output pins. More...
IFX_EXTERN void | IfxGeth_Eth_setupRmiiInputPins (IfxGeth_Eth *geth, const IfxGeth_Eth_RmiiPins *rmiiPins)
setup RMII mode input pins More...
IFX_EXTERN void | IfxGeth_Eth_setupRmiiOutputPins (IfxGeth_Eth *geth, const IfxGeth_Eth_RmiiPins *rmiiPins)
setup RMII mode output pins More...
IFX_EXTERN void | IfxGeth_Eth_writeHeader (IfxGeth_Eth *geth, uint8 *txBuffer, uint8 *destinationAddress, uint8 *sourceAddress, uint32 payloadLength)
writes the header format into buffrer More...
IFX_EXTERN void | IfxGeth_Eth_configureMTL (IfxGeth_Eth *geth, IfxGeth_Eth_MtlConfig *mtlConfig)
Configures the MTL. More...
IFX_INLINE volatile IfxGeth_RxDescr * | IfxGeth_Eth_getActualRxDescriptor (IfxGeth_Eth *geth, IfxGeth_RxDmaChannel channelId)
Returns the pointer to current RX descriptor. More...
IFX_INLINE volatile IfxGeth_TxDescr * | IfxGeth_Eth_getActualTxDescriptor (IfxGeth_Eth *geth, IfxGeth_TxDmaChannel channelId)
Returns the pointer to current TX descriptor. More...
IFX_INLINE boolean | IfxGeth_Eth_isRxDataAvailable (IfxGeth_Eth *geth, IfxGeth_RxDmaChannel channelId)
Checks whether one or more RX data is available. More...
IFX_EXTERN void | IfxGeth_Eth_configureDMA (IfxGeth_Eth *geth, IfxGeth_Eth_DmaConfig *dmaConfig)
Configures the DMA. More...
IFX_EXTERN void | IfxGeth_Eth_initReceiveDescriptors (IfxGeth_Eth *geth, IfxGeth_Eth_RxChannelConfig *config)
Initialises the Rx descriptors of a single channel. More...
IFX_EXTERN void | IfxGeth_Eth_initTransmitDescriptors (IfxGeth_Eth *geth, IfxGeth_Eth_TxChannelConfig *config)
Initialises the Tx descriptors of a single channel. More...
IFX_EXTERN void | IfxGeth_Eth_sendFrame (IfxGeth_Eth *geth, IfxGeth_Eth_FrameConfig *config)
Transmits a frame from a single channel. More...
IFX_EXTERN void | IfxGeth_Eth_sendTransmitBuffer (IfxGeth_Eth *geth, uint32 packetLength, IfxGeth_TxDmaChannel channelId)
Transmits a frame from a single channel. More...
IFX_EXTERN void | IfxGeth_Eth_shuffleRxDescriptor (IfxGeth_Eth *geth, IfxGeth_RxDmaChannel channelId)
Updates the current Rx descriptor pointer in the handle to next Rx descriptor. More...
IFX_EXTERN void | IfxGeth_Eth_shuffleTxDescriptor (IfxGeth_Eth *geth, IfxGeth_TxDmaChannel channelId)
Updates the current Tx descriptor pointer in the handle to next Tx descriptor. More...
IFX_EXTERN void | IfxGeth_Eth_startReceiver (IfxGeth_Eth *geth, IfxGeth_RxDmaChannel channelId)
Start the Receiver functions of MAC and selected channel of DMA. More...
IFX_EXTERN void | IfxGeth_Eth_startReceivers (IfxGeth_Eth *geth, uint32 numOfChannels)
Start the Receiver functions of MAC and all selected number of DMA channels. More...
IFX_EXTERN void | IfxGeth_Eth_startTransmitter (IfxGeth_Eth *geth, IfxGeth_TxDmaChannel channelId)
Start the transmitter functions of MAC and selected channel of DMA. More...
IFX_EXTERN void | IfxGeth_Eth_startTransmitters (IfxGeth_Eth *geth, uint32 numOfChannels)
Start the transmitter functions of MAC and all selected number of DMA channels. More...
IFX_EXTERN void | IfxGeth_Eth_stopTransmitters (IfxGeth_Eth *geth, uint32 numOfChannels)
Stops the transmitter functions of MAC and all selected number of DMA channels. More...
IFX_EXTERN void | IfxGeth_Eth_wakeupReceiver (IfxGeth_Eth *geth, IfxGeth_RxDmaChannel channelId)
Wakes up the Receiver functions of MAC and selected channel of DMA. More...
IFX_EXTERN void | IfxGeth_Eth_wakeupTransmitter (IfxGeth_Eth *geth, IfxGeth_TxDmaChannel channelId)
Wakes up the transmitter functions of MAC and selected channel of DMA. More...
IFX_INLINE volatile IfxGeth_RxDescr * | IfxGeth_Eth_getBaseRxDescriptor (IfxGeth_Eth *geth, IfxGeth_RxDmaChannel channelId)
Returns the pointer to base RX descriptor in the list. More...
IFX_INLINE volatile IfxGeth_TxDescr * | IfxGeth_Eth_getBaseTxDescriptor (IfxGeth_Eth *geth, IfxGeth_TxDmaChannel channelId)
Returns the pointer to base TX descriptor in the list. More...
IFX_EXTERN void | IfxGeth_Eth_freeReceiveBuffer (IfxGeth_Eth *geth, IfxGeth_RxDmaChannel channelId)
Free the receive buffer, enabling it for the further reception. More...

Variables

IFX_EXTERN IfxGeth_RxDescrList IfxGeth_Eth_rxDescrList [IFXGETH_NUM_MODULES][IFXGETH_NUM_RX_CHANNELS]
Actual rx descriptor lists of all availabe rx channels. More...
IFX_EXTERN IfxGeth_TxDescrList IfxGeth_Eth_txDescrList [IFXGETH_NUM_MODULES][IFXGETH_NUM_TX_CHANNELS]
Actual tx descriptor lists of all availabe tx channels. More...

Detailed Description

GETH ETH details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGeth_Eth.h.

Data Structure Documentation

◆ IfxGeth_Eth_FrameConfig

struct IfxGeth_Eth_FrameConfig

Configuration Structure for TX Frame.

Definition at line 488 of file IfxGeth_Eth.h.

Data Fields
IfxGeth_TxDmaChannel | channelId | Tx DMA channel Index.
uint32 | packetLength | the length of the packet to be transmitted in bytes

Function Documentation

◆ IfxGeth_Eth_freeReceiveBuffer()

IFX_EXTERN void IfxGeth_Eth_freeReceiveBuffer | ( | IfxGeth_Eth * | geth,
 |  | IfxGeth_RxDmaChannel | channelId
 | ) |  |

Free the receive buffer, enabling it for the further reception.

Parameters
geth | GETH driver Handle
channelId | Rx channel Id
Returns
None
// IfxGeth_Eth geth; // assumed to be defined globally
IfxGeth_Eth_freeReceiveBuffer(&geth, IfxGeth_RxDmaChannel_0);

Definition at line 209 of file IfxGeth_Eth.c.

◆ IfxGeth_Eth_getBaseRxDescriptor()

IFX_INLINE volatile IfxGeth_RxDescr * IfxGeth_Eth_getBaseRxDescriptor | ( | IfxGeth_Eth * | geth,
 |  | IfxGeth_RxDmaChannel | channelId
 | ) |  |

Returns the pointer to base RX descriptor in the list.

Parameters
geth | GETH driver Handle
channelId | Rx channel Id
Returns
pointer to base RX descriptor in the list
// IfxGeth_Eth geth; // assumed to be defined globally
IfxGeth_RxDescr *descr = IfxGeth_Eth_getBaseRxDescriptor(&geth, IfxGeth_RxDmaChannel_0);

Definition at line 1093 of file IfxGeth_Eth.h.

Referenced by IfxGeth_Eth_initReceiveDescriptors(), and IfxGeth_Eth_shuffleRxDescriptor().

◆ IfxGeth_Eth_getBaseTxDescriptor()

IFX_INLINE volatile IfxGeth_TxDescr * IfxGeth_Eth_getBaseTxDescriptor | ( | IfxGeth_Eth * | geth,
 |  | IfxGeth_TxDmaChannel | channelId
 | ) |  |

Returns the pointer to base TX descriptor in the list.

Parameters
geth | GETH driver Handle
channelId | Tx channel Id
Returns
pointer to base TX descriptor in the list
// IfxGeth_Eth geth; // assumed to be defined globally
IfxGeth_TxDescr *descr = IfxGeth_Eth_getBaseTxDescriptor(&geth, IfxGeth_TxDmaChannel_0);

Definition at line 1099 of file IfxGeth_Eth.h.

Referenced by IfxGeth_Eth_initTransmitDescriptors(), and IfxGeth_Eth_shuffleTxDescriptor().


iLLD_TC38A: IfxGeth.h File Reference

  • Geth
  • Std
Data Structures | Macros | Enumerations | Functions
IfxGeth.h File Reference
iLLD » GETH

GETH basic functionality. More...

#include "_Impl/IfxGeth_cfg.h"
#include "IfxGeth_reg.h"
#include "Scu/Std/IfxScuWdt.h"
#include "Src/Std/IfxSrc.h"
#include "IfxGeth_bf.h"
Include dependency graph for IfxGeth.h:

Go to the source code of this file.

Data Structures

struct | IfxGeth_RxContextDescr0_Bits
Bit Fields of RDES0 Context Descriptor. More...
struct | IfxGeth_RxContextDescr1_Bits
Bit Fields of RDES1 Context Descriptor. More...
struct | IfxGeth_RxContextDescr2_Bits
Bit Fields of RDES2 Context Descriptor. More...
struct | IfxGeth_RxContextDescr3_Bits
Bit Fields of RDES3 Context Descriptor. More...
struct | IfxGeth_RxDescr0_RF_Bits
Bit Fields of RDES0 in Read Format. More...
struct | IfxGeth_RxDescr0_WF_Bits
Bit Fields of RDES0 in Write back Format. More...
struct | IfxGeth_RxDescr1_RF_Bits
Bit Fields of RDES1 in Read Format. More...
struct | IfxGeth_RxDescr1_WF_Bits
Bit Fields of RDES1 in Write back Format. More...
struct | IfxGeth_RxDescr2_RF_Bits
Bit Fields of RDES2 in Read Format. More...
struct | IfxGeth_RxDescr2_WF_Bits
Bit Fields of RDES2 in Write back Format. More...
struct | IfxGeth_RxDescr3_RF_Bits
Bit Fields of RDES3 in Read Format. More...
struct | IfxGeth_RxDescr3_WF_Bits
Bit Fields of RDES3 in Write back Format. More...
struct | IfxGeth_TxContextDescr0_Bits
Bit Fields of TDES0 Context Descriptor. More...
struct | IfxGeth_TxContextDescr1_Bits
Bit Fields of TDES1 Context Descriptor. More...
struct | IfxGeth_TxContextDescr2_Bits
Bit Fields of TDES2 Context Descriptor. More...
struct | IfxGeth_TxContextDescr3_Bits
Bit Fields of TDES3 Context Descriptor. More...
struct | IfxGeth_TxDescr0_RF_Bits
Bit Fields of TDES0 in Read Format. More...
struct | IfxGeth_TxDescr0_WF_Bits
Bit Fields of TDES0 in Write-back Format. More...
struct | IfxGeth_TxDescr1_RF_Bits
Bit Fields of TDES1 in Read Format. More...
struct | IfxGeth_TxDescr1_WF_Bits
Bit Fields of TDES1 in Write-back Format. More...
struct | IfxGeth_TxDescr2_RF_Bits
Bit Fields of TDES2 in Read Format. More...
struct | IfxGeth_TxDescr2_WF_Bits
Bit Fields of TDES2 in Write-back Format. More...
struct | IfxGeth_TxDescr3_RF_Bits
Bit Fields of TDES3 in Read Format. More...
struct | IfxGeth_TxDescr3_WF_Bits
Bit Fields of TDES3 in Write-back Format. More...
union | IfxGeth_RxDescr0
RDES0. More...
union | IfxGeth_RxDescr1
RDES1. More...
union | IfxGeth_RxDescr2
RDES2. More...
union | IfxGeth_RxDescr3
RDES3. More...
union | IfxGeth_TxDescr0
TDES0. More...
union | IfxGeth_TxDescr1
TDES1. More...
union | IfxGeth_TxDescr2
TDES2. More...
union | IfxGeth_TxDescr3
TDES3. More...
struct | IfxGeth_RxDescr
Rx Descriptor. More...
struct | IfxGeth_TxDescr
Tx Descriptor. More...
union | IfxGeth_RxDescrList
Rx Descriptor List. More...
union | IfxGeth_TxDescrList
Tx Descriptor List. More...

Macros

#define | IFXGETH_MAX_TX_DESCRIPTORS (8)
Max number of TX descriptors per list. More...
#define | IFXGETH_MAX_RX_DESCRIPTORS (8)
Max number of RX descriptors per list. More...
#define | IFXGETH_PHY_WAIT_GMII_READY() while (GETH_MAC_MDIO_ADDRESS.B.GB) {}
Waits until GMII is busy. More...

Enumerations

enum IfxGeth_DmaBurstLength {
IfxGeth_DmaBurstLength_0 = 0,
IfxGeth_DmaBurstLength_1 = 1,
IfxGeth_DmaBurstLength_2 = 2,
IfxGeth_DmaBurstLength_4 = 4,
IfxGeth_DmaBurstLength_8 = 8,
IfxGeth_DmaBurstLength_16 = 16,
IfxGeth_DmaBurstLength_32 = 32
}
Programmable burst length of DMA channels
Definition in DMA_CHi_TX_CONTROL.B.PBL and DMA_CHi_RX_CONTROL.B.PBL. More...
enum IfxGeth_DmaChannel {
IfxGeth_DmaChannel_0,
IfxGeth_DmaChannel_1,
IfxGeth_DmaChannel_2,
IfxGeth_DmaChannel_3
}
DMA channel Index. More...
enum IfxGeth_DmaInterruptFlag {
IfxGeth_DmaInterruptFlag_transmitInterrupt = 0,
IfxGeth_DmaInterruptFlag_transmitStopped = 1,
IfxGeth_DmaInterruptFlag_transmitBufferUnavailable = 2,
IfxGeth_DmaInterruptFlag_receiveInterrupt = 6,
IfxGeth_DmaInterruptFlag_receiveBufferUnavailable = 7,
IfxGeth_DmaInterruptFlag_receiveStopped = 8,
IfxGeth_DmaInterruptFlag_receiveWatchdogTimeout = 9,
IfxGeth_DmaInterruptFlag_earlyTransmitInterrupt = 10,
IfxGeth_DmaInterruptFlag_earlyReceiveInterrupt = 11,
IfxGeth_DmaInterruptFlag_fatalBusError = 12,
IfxGeth_DmaInterruptFlag_contextDescriptorError = 13,
IfxGeth_DmaInterruptFlag_abnormalInterruptSummary = 14,
IfxGeth_DmaInterruptFlag_normalInterruptSummary = 15
}
DMA interrupt flags. More...
enum IfxGeth_LineSpeed {
IfxGeth_LineSpeed_10Mbps,
IfxGeth_LineSpeed_100Mbps,
IfxGeth_LineSpeed_1000Mbps,
IfxGeth_LineSpeed_2500Mbps
}
Ethernet line speed. More...
enum IfxGeth_MtlInterruptFlag {
IfxGeth_MtlInterruptFlag_txQueueUnderflow = 0,
IfxGeth_MtlInterruptFlag_averageBitsPerSlot = 1,
IfxGeth_MtlInterruptFlag_rxQueueOverflow = 16
}
MTL interrupt flags. More...
enum IfxGeth_MtlQueue {
IfxGeth_MtlQueue_0,
IfxGeth_MtlQueue_1,
IfxGeth_MtlQueue_2,
IfxGeth_MtlQueue_3
}
MTL Queue ID. More...
enum IfxGeth_PhyInterfaceMode {
IfxGeth_PhyInterfaceMode_mii = 0,
IfxGeth_PhyInterfaceMode_rgmii = 1,
IfxGeth_PhyInterfaceMode_rmii = 4
}
External Phy Interface RMII Mode. More...
enum IfxGeth_PreambleLength {
IfxGeth_PreambleLength_7Bytes,
IfxGeth_PreambleLength_5Bytes,
IfxGeth_PreambleLength_3Bytes
}
Preamble Length for Transmit packets
Definition in MAC_CONFIGURATION.B.PRELEN. More...
enum IfxGeth_QueueSize {
IfxGeth_QueueSize_256Bytes,
IfxGeth_QueueSize_512Bytes,
IfxGeth_QueueSize_768Bytes,
IfxGeth_QueueSize_1024Bytes,
IfxGeth_QueueSize_1280Bytes,
IfxGeth_QueueSize_1536Bytes,
IfxGeth_QueueSize_1792Bytes,
IfxGeth_QueueSize_2048Bytes,
IfxGeth_QueueSize_2304Bytes,
IfxGeth_QueueSize_2560Bytes,
IfxGeth_QueueSize_2816Bytes,
IfxGeth_QueueSize_3072Bytes,
IfxGeth_QueueSize_3328Bytes,
IfxGeth_QueueSize_3584Bytes,
IfxGeth_QueueSize_3840Bytes,
IfxGeth_QueueSize_4096Bytes,
IfxGeth_QueueSize_4352Bytes,
IfxGeth_QueueSize_4608Bytes,
IfxGeth_QueueSize_4864Bytes,
IfxGeth_QueueSize_5120Bytes,
IfxGeth_QueueSize_5376Bytes,
IfxGeth_QueueSize_5632Bytes,
IfxGeth_QueueSize_5888Bytes,
IfxGeth_QueueSize_6144Bytes,
IfxGeth_QueueSize_6400Bytes,
IfxGeth_QueueSize_6656Bytes,
IfxGeth_QueueSize_6912Bytes,
IfxGeth_QueueSize_7168Bytes,
IfxGeth_QueueSize_7424Bytes,
IfxGeth_QueueSize_7680Bytes,
IfxGeth_QueueSize_7936Bytes,
IfxGeth_QueueSize_8192Bytes
}
Tx/RX Queue size in blocks of 256 bytes
Definition in MTL_TXQi_OPERATION_MODE.B.TQS and MTL_RXQi_OPERATION_MODE.B.RQS. More...
enum IfxGeth_RxArbitrationAlgorithm {
IfxGeth_RxArbitrationAlgorithm_sp = 0,
IfxGeth_RxArbitrationAlgorithm_wsp = 1
}
Receive Arbitration Algorithm for Rx Queues
Definition in MTL_OPERATION_MODE.B.RAA. More...
enum IfxGeth_RxDmaChannel {
IfxGeth_RxDmaChannel_0,
IfxGeth_RxDmaChannel_1,
IfxGeth_RxDmaChannel_2,
IfxGeth_RxDmaChannel_3
}
Rx DMA channel. More...
enum IfxGeth_RxMtlQueue {
IfxGeth_RxMtlQueue_0,
IfxGeth_RxMtlQueue_1,
IfxGeth_RxMtlQueue_2,
IfxGeth_RxMtlQueue_3
}
Rx MTL Queue ID. More...
enum IfxGeth_ServiceRequest {
IfxGeth_ServiceRequest_0,
IfxGeth_ServiceRequest_1,
IfxGeth_ServiceRequest_2,
IfxGeth_ServiceRequest_3,
IfxGeth_ServiceRequest_4,
IfxGeth_ServiceRequest_5,
IfxGeth_ServiceRequest_6,
IfxGeth_ServiceRequest_7,
IfxGeth_ServiceRequest_8,
IfxGeth_ServiceRequest_9
}
Geth service request index. More...
enum IfxGeth_TxDmaChannel {
IfxGeth_TxDmaChannel_0,
IfxGeth_TxDmaChannel_1,
IfxGeth_TxDmaChannel_2,
IfxGeth_TxDmaChannel_3
}
Tx DMA channel. More...
enum IfxGeth_TxMtlQueue {
IfxGeth_TxMtlQueue_0,
IfxGeth_TxMtlQueue_1,
IfxGeth_TxMtlQueue_2,
IfxGeth_TxMtlQueue_3
}
Tx MTL Queue ID. More...
enum IfxGeth_TxSchedulingAlgorithm {
IfxGeth_TxSchedulingAlgorithm_wrr = 0,
IfxGeth_TxSchedulingAlgorithm_sp = 3
}
Tx Scheduling Algorithm for Tx Queues
Definition in MTL_OPERATION_MODE.B.SCHALG. More...
enum IfxGeth_DuplexMode {
IfxGeth_DuplexMode_halfDuplex,
IfxGeth_DuplexMode_fullDuplex
}
Duplex Mode
Definintion in MAC_CONFIGURATION.B.DM. More...
enum IfxGeth_LoopbackMode {
IfxGeth_LoopbackMode_disable,
IfxGeth_LoopbackMode_enable
}
Loopback Mode
Definition in MAC_CONFIGURATION.B.LM. More...

Functions

IFX_INLINE void | IfxGeth_mac_disableReceiver (Ifx_GETH *gethSFR)
Disables the Receiver of MAC Core. More...
IFX_INLINE void | IfxGeth_mac_disableTransmitter (Ifx_GETH *gethSFR)
Disables the Trasnmitter of MAC Core. More...
IFX_INLINE void | IfxGeth_mac_enableReceiver (Ifx_GETH *gethSFR)
Enables the Receiver of MAC Core. More...
IFX_INLINE void | IfxGeth_mac_enableTransmitter (Ifx_GETH *gethSFR)
Enables the Trasnmitter of MAC Core. More...
IFX_INLINE void | IfxGeth_mac_setAllMulticastPassing (Ifx_GETH *gethSFR, boolean enabled)
Enables / Disables Passing of All Multicast packets. More...
IFX_INLINE void | IfxGeth_mac_setCrcChecking (Ifx_GETH *gethSFR, boolean enabled)
Enables / Disables CRC Checking for Received Packets. More...
IFX_INLINE void | IfxGeth_mac_setCrcStripping (Ifx_GETH *gethSFR, boolean acsEnabled, boolean cstEnabled)
Enables/Disables the Automatic Pad or CRC Stripping for frames less than 1536 bytes and
CRC stripping for Type packets. More...
IFX_INLINE void | IfxGeth_mac_setDuplexMode (Ifx_GETH *gethSFR, IfxGeth_DuplexMode mode)
Sets the Duplex Mode. More...
IFX_INLINE void | IfxGeth_mac_setPreambleLength (Ifx_GETH *gethSFR, IfxGeth_PreambleLength length)
Sets the Preamble Length for Transmit packets. More...
IFX_INLINE void | IfxGeth_mac_setPromiscuousMode (Ifx_GETH *gethSFR, boolean enabled)
Enables / Disables Promiscuous Mode. More...
IFX_INLINE void | IfxGeth_mac_setVlanPriorityQueueRouting (Ifx_GETH *gethSFR, IfxGeth_RxDmaChannel channel, uint8 priorities)
Set the priorities for Rx queues for mapping tagged packets. More...
IFX_INLINE void | IfxGeth_mac_setQueueVlanInsertion (Ifx_GETH *gethSFR, boolean enable)
Enable / Disable Queue Insertion. More...
IFX_EXTERN void | IfxGeth_mac_setLineSpeed (Ifx_GETH *gethSFR, IfxGeth_LineSpeed speed)
Sets the Ethernet Line Speed. More...
IFX_EXTERN void | IfxGeth_mac_setMacAddress (Ifx_GETH *gethSFR, uint8 *macAddress)
Sets the MAC Address. More...
IFX_EXTERN boolean | IfxGeth_mac_writeQueueVlanTag (Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId, uint16 vLanTag)
Writes to Queue Vlan tag. More...
IFX_EXTERN boolean | IfxGeth_mac_readQueueVlanTag (Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId, uint16 *const vLanTag)
Reads from Queue Vlan tag. More...
IFX_INLINE boolean | IfxGeth_isModuleEnabled (Ifx_GETH *gethSFR)
Returns the status of whether clock for GETH module is enabled or diabled. More...
IFX_INLINE void | IfxGeth_setPhyInterfaceMode (Ifx_GETH *gethSFR, IfxGeth_PhyInterfaceMode mode)
Sets the External Phy Interface mode. More...
IFX_EXTERN void | IfxGeth_disableModule (Ifx_GETH *gethSFR)
Disables the clock for GETH module. More...
IFX_EXTERN void | IfxGeth_enableModule (Ifx_GETH *gethSFR)
Enables the clock for GETH module. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxGeth_getSrcPointer (Ifx_GETH *gethSFR, IfxGeth_ServiceRequest serviceRequest)
Returns the Src Pointer of the selected GETH service request node. More...
IFX_EXTERN void | IfxGeth_resetModule (Ifx_GETH *gethSFR)
resets Ethernet kernel More...
IFX_EXTERN IfxGeth_Index | IfxGeth_getIndex (Ifx_GETH *geth)
API to get the resource index of the GETH specified. More...
IFX_EXTERN Ifx_GETH * | IfxGeth_getAddress (IfxGeth_Index geth)
Get the address of the specified GETH resource index. More...
IFX_INLINE void | IfxGeth_mtl_enableRxQueue (Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId)
Enables the selected Rx Queue. More...
IFX_INLINE void | IfxGeth_mtl_setRxArbitrationAlgorithm (Ifx_GETH *gethSFR, IfxGeth_RxArbitrationAlgorithm arbitrationAlgorithm)
sets the Rx Arbitration algorithm More...
IFX_INLINE void | IfxGeth_mtl_setRxQueueDmaChannelMapping (Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId, IfxGeth_RxDmaChannel dmaChannel)
Sets the selected DMA Channel mapping for the selected Rx Queue. More...
IFX_INLINE void | IfxGeth_mtl_setRxQueueForDaBasedDmaChannel (Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId, boolean enabled)
Sets the selected Rx Queue for DA based DMA channel. More...
IFX_INLINE void | IfxGeth_mtl_setTxSchedulingAlgorithm (Ifx_GETH *gethSFR, IfxGeth_TxSchedulingAlgorithm schedulingAlgorithm)
sets the Tx Scheduling algorithm More...
IFX_INLINE void | IfxGeth_mtl_enableUnicastFilterFailQueuing (Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId)
Enable and set queue ID to route packets failing unicast filter. More...
IFX_INLINE void | IfxGeth_mtl_disableUnicastFilterFailQueuing (Ifx_GETH *gethSFR)
Disable queuing of packets failing unicast filtering. More...
IFX_INLINE void | IfxGeth_mtl_enableMulticastFilterFailQueuing (Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId)
Enable and set queue ID to route packets failing multicast filter. More...
IFX_INLINE void | IfxGeth_mtl_disableMulticastFilterFailQueuing (Ifx_GETH *gethSFR)
Disable queuing of packets failing multicast filtering. More...
IFX_INLINE void | IfxGeth_mtl_enableVlanFilterFailQueuing (Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId)
Enable and set queue ID to route packets failing VLAN tag filter. More...
IFX_INLINE void | IfxGeth_mtl_disableVlanFilterFailQueuing (Ifx_GETH *gethSFR)
Disable queuing of packets failing VLAN tag filtering. More...
IFX_EXTERN void | IfxGeth_mtl_clearAllInterruptFlags (Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId)
Clears all the Mtl interrupt flags. More...
IFX_EXTERN void | IfxGeth_mtl_clearInterruptFlag (Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId, IfxGeth_MtlInterruptFlag flag)
Clears the selected Mtl interrupt flag. More...
IFX_EXTERN void | IfxGeth_mtl_disableInterrupt (Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId, IfxGeth_MtlInterruptFlag flag)
Disables the selected Mtl interrupt flag. More...
IFX_EXTERN void | IfxGeth_mtl_enableInterrupt (Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId, IfxGeth_MtlInterruptFlag flag)
Enables the selected Mtl interrupt flag. More...
IFX_EXTERN void | IfxGeth_mtl_enableTxQueue (Ifx_GETH *gethSFR, IfxGeth_TxMtlQueue queueId)
Enables the selected TX Queue. More...
IFX_EXTERN boolean | IfxGeth_mtl_isInterruptFlagSet (Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId, IfxGeth_MtlInterruptFlag flag)
Returns the status of selected Mtl interrupt flag. More...
IFX_EXTERN void | IfxGeth_mtl_setRxForwardErrorPacket (Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId, boolean enabled)
Sets the Receive Forward Error Packets for the selected RX Queue. More...
IFX_EXTERN void | IfxGeth_mtl_setRxForwardUndersizedGoodPacket (Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId, boolean enabled)
Sets the Receive Forward Undersized Good Packets for the selected RX Queue. More...
IFX_EXTERN void | IfxGeth_mtl_setRxQueueSize (Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId, IfxGeth_QueueSize queueSize)
Sets the size of the selected RX Queue. More...
IFX_EXTERN void | IfxGeth_mtl_setRxStoreAndForward (Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId, boolean enabled)
Sets the Receive Store And Forward for the selected RX Queue. More...
IFX_EXTERN void | IfxGeth_mtl_setTxQueueSize (Ifx_GETH *gethSFR, IfxGeth_TxMtlQueue queueId, IfxGeth_QueueSize queueSize)
Sets the size of the selected TX Queue. More...
IFX_EXTERN void | IfxGeth_mtl_setTxStoreAndForward (Ifx_GETH *gethSFR, IfxGeth_TxMtlQueue queueId, boolean enabled)
Sets the Transmit Store And Forward for teh selected TX Queue. More...
IFX_INLINE void | IfxGeth_dma_applySoftwareReset (Ifx_GETH *gethSFR)
Applies a software reset of MAC and DMA controller. More...
IFX_INLINE void | IfxGeth_dma_clearAllInterruptFlags (Ifx_GETH *gethSFR, IfxGeth_DmaChannel channelId)
Returns the status of selected DMA interrupt flag. More...
IFX_INLINE void | IfxGeth_dma_clearInterruptFlag (Ifx_GETH *gethSFR, IfxGeth_DmaChannel channelId, IfxGeth_DmaInterruptFlag flag)
Returns the status of selected DMA interrupt flag. More...
IFX_INLINE void | IfxGeth_dma_disableInterrupt (Ifx_GETH *gethSFR, IfxGeth_DmaChannel channelId, IfxGeth_DmaInterruptFlag flag)
Disables the selected DMA interrupt. More...
IFX_INLINE void | IfxGeth_dma_enableInterrupt (Ifx_GETH *gethSFR, IfxGeth_DmaChannel channelId, IfxGeth_DmaInterruptFlag flag)
Enables the selected DMA interrupt. More...
IFX_INLINE boolean | IfxGeth_dma_isInterruptFlagSet (Ifx_GETH *gethSFR, IfxGeth_DmaChannel channelId, IfxGeth_DmaInterruptFlag flag)
Returns the status of selected DMA interrupt flag. More...
IFX_INLINE boolean | IfxGeth_dma_isSoftwareResetDone (Ifx_GETH *gethSFR)
Wiats until software reset of MAC and DMA controller is done or until timout. More...
IFX_INLINE void | IfxGeth_dma_setAddressAlignedBeats (Ifx_GETH *gethSFR, boolean enabled)
Enables/Disables Address aligned beats. More...
IFX_INLINE void | IfxGeth_dma_setFixedBurst (Ifx_GETH *gethSFR, boolean enabled)
Enables/Disables Fixed Burst Length. More...
IFX_INLINE void | IfxGeth_dma_setMixedBurst (Ifx_GETH *gethSFR, boolean enabled)
Enables/Disables Mixed Burst Length. More...
IFX_INLINE void | IfxGeth_dma_setRxBufferSize (Ifx_GETH *gethSFR, IfxGeth_RxDmaChannel channel, uint16 size)
sets the size of the rx buffers in descriptors for selected Rx channel of DMA More...
IFX_INLINE void | IfxGeth_dma_setRxDescriptorListAddress (Ifx_GETH *gethSFR, IfxGeth_RxDmaChannel channel, uint32 address)
sets the base address of the first descriptor in the Receive descriptor list More...
IFX_INLINE void | IfxGeth_dma_setRxDescriptorRingLength (Ifx_GETH *gethSFR, IfxGeth_RxDmaChannel channel, uint32 length)
sets the Length of the Rx descriptors ring More...
IFX_INLINE void | IfxGeth_dma_setRxDescriptorTailPointer (Ifx_GETH *gethSFR, IfxGeth_RxDmaChannel channel, uint32 address)
sets the address of the last valid descriptor in the Receive descriptor list More...
IFX_INLINE void | IfxGeth_dma_setRxMaxBurstLength (Ifx_GETH *gethSFR, IfxGeth_RxDmaChannel channel, IfxGeth_DmaBurstLength length)
sets the programmable burst length of selected Rx channel of DMA More...
IFX_INLINE void | IfxGeth_dma_setTxDescriptorListAddress (Ifx_GETH *gethSFR, IfxGeth_TxDmaChannel channel, uint32 address)
sets the base address of the first descriptor in the Transmit descriptor list More...
IFX_INLINE void | IfxGeth_dma_setTxDescriptorRingLength (Ifx_GETH *gethSFR, IfxGeth_TxDmaChannel channel, uint32 length)
sets the Length of the Tx descriptors ring More...
IFX_INLINE void | IfxGeth_dma_setTxDescriptorTailPointer (Ifx_GETH *gethSFR, IfxGeth_TxDmaChannel channel, uint32 address)
sets the address of the last valid descriptor in the Transmit descriptor list More...
IFX_INLINE void | IfxGeth_dma_setTxMaxBurstLength (Ifx_GETH *gethSFR, IfxGeth_TxDmaChannel channel, IfxGeth_DmaBurstLength length)
sets the programmable burst length of selected Tx channel of DMA More...
IFX_INLINE void | IfxGeth_dma_startReceiver (Ifx_GETH *gethSFR, IfxGeth_RxDmaChannel channel)
starts the receiver of selected Rx channel of DMA More...
IFX_INLINE void | IfxGeth_dma_startTransmitter (Ifx_GETH *gethSFR, IfxGeth_TxDmaChannel channel)
starts the tramsimitter of selected Tx channel of DMA More...
IFX_INLINE void | IfxGeth_dma_stopTransmitter (Ifx_GETH *gethSFR, IfxGeth_TxDmaChannel channel)
Stops the tramsimitter of selected Tx channel of DMA. More...
IFX_INLINE void | IfxGeth_mac_setLoopbackMode (Ifx_GETH *gethSFR, IfxGeth_LoopbackMode mode)
Enables/Disables the MAC operation in the loopback mode at GMII or MII. More...
IFX_EXTERN void | IfxGeth_phy_Clause22_readMDIORegister (uint32 layerAddr, uint32 regAddr, uint32 *pData)
Reads a MDIO register of Clause 22 PHY. More...
IFX_EXTERN void | IfxGeth_Phy_Clause22_writeMDIORegister (uint32 layerAddr, uint32 regAddr, uint32 data)
Writes to a MDIO register of Clause 22 PHY. More...
IFX_EXTERN void | IfxGeth_phy_Clause45_readMDIORegister (uint32 layerAddr, uint32 deviceAddr, uint32 regAddr, uint32 *pData)
Reads a MDIO register of Clause 45 PHY. More...
IFX_EXTERN void | IfxGeth_Phy_Clause45_writeMDIORegister (uint32 layerAddr, uint32 deviceAddr, uint32 regAddr, uint32 data)
Writes to a MDIO register for Clause 45 PHY. More...
IFX_EXTERN void | IfxGeth_mac_setMaxPacketSize (Ifx_GETH *gethSFR, uint16 maxPacketSize)
Sets the maximum size of the packet. More...

Detailed Description

GETH basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Standard layer

Definition in file IfxGeth.h.

Macro Definition Documentation

◆ IFXGETH_MAX_RX_DESCRIPTORS

#define IFXGETH_MAX_RX_DESCRIPTORS (8)

Max number of RX descriptors per list.

Definition at line 69 of file IfxGeth.h.

Referenced by IfxGeth_Eth_initReceiveDescriptors(), and IfxGeth_Eth_shuffleRxDescriptor().

◆ IFXGETH_MAX_TX_DESCRIPTORS

#define IFXGETH_MAX_TX_DESCRIPTORS (8)

Max number of TX descriptors per list.

Definition at line 63 of file IfxGeth.h.

Referenced by IfxGeth_Eth_initTransmitDescriptors(), and IfxGeth_Eth_shuffleTxDescriptor().

◆ IFXGETH_PHY_WAIT_GMII_READY

#define IFXGETH_PHY_WAIT_GMII_READY ( ) while (GETH_MAC_MDIO_ADDRESS.B.GB) {}

Waits until GMII is busy.

Definition at line 74 of file IfxGeth.h.

Referenced by IfxGeth_phy_Clause22_readMDIORegister(), IfxGeth_Phy_Clause22_writeMDIORegister(), IfxGeth_phy_Clause45_readMDIORegister(), and IfxGeth_Phy_Clause45_writeMDIORegister().

Enumeration Type Documentation

◆ IfxGeth_DuplexMode

enum IfxGeth_DuplexMode

Duplex Mode
Definintion in MAC_CONFIGURATION.B.DM.

Enumerator
IfxGeth_DuplexMode_halfDuplex | Half Duplex Mode.
IfxGeth_DuplexMode_fullDuplex | Full Duplex Mode.

Definition at line 291 of file IfxGeth.h.

◆ IfxGeth_LoopbackMode

enum IfxGeth_LoopbackMode

Loopback Mode
Definition in MAC_CONFIGURATION.B.LM.

Enumerator
IfxGeth_LoopbackMode_disable | Disable loopback.
IfxGeth_LoopbackMode_enable | Enable loopback.

Definition at line 300 of file IfxGeth.h.

Function Documentation

◆ IfxGeth_mac_setLoopbackMode()

IFX_INLINE void IfxGeth_mac_setLoopbackMode | ( | Ifx_GETH * | gethSFR,
 |  | IfxGeth_LoopbackMode | mode
 | ) |  |

Enables/Disables the MAC operation in the loopback mode at GMII or MII.

Parameters
gethSFR | Pointer to GETH register base address
mode | Loopback Mode Enable / Disable
Returns
None

Definition at line 1501 of file IfxGeth.h.

Referenced by IfxGeth_Eth_configureMacCore().

◆ IfxGeth_mac_setMaxPacketSize()

IFX_EXTERN void IfxGeth_mac_setMaxPacketSize | ( | Ifx_GETH * | gethSFR,
 |  | uint16 | maxPacketSize
 | ) |  |

Sets the maximum size of the packet.

Parameters
gethSFR | Pointer to GETH register base address
maxPacketSize | Minimum size of the frame beyond which giant packet status is set.
Returns
None

Definition at line 435 of file IfxGeth.c.

Referenced by IfxGeth_Eth_configureMacCore().

◆ IfxGeth_phy_Clause22_readMDIORegister()

IFX_EXTERN void IfxGeth_phy_Clause22_readMDIORegister | ( | uint32 | layerAddr,
 |  | uint32 | regAddr,
 |  | uint32 * | pData
 | ) |  |

Reads a MDIO register of Clause 22 PHY.

Parameters
layerAddr | Layer Address
regAddr | Register Address
pData | Pointer to Data
Returns
None

Definition at line 384 of file IfxGeth.c.

◆ IfxGeth_Phy_Clause22_writeMDIORegister()

IFX_EXTERN void IfxGeth_Phy_Clause22_writeMDIORegister | ( | uint32 | layerAddr,
 |  | uint32 | regAddr,
 |  | uint32 | data
 | ) |  |

Writes to a MDIO register of Clause 22 PHY.

Parameters
layerAddr | Layer Address
regAddr | Register Address
data | Data
Returns
None

Definition at line 396 of file IfxGeth.c.

◆ IfxGeth_phy_Clause45_readMDIORegister()

IFX_EXTERN void IfxGeth_phy_Clause45_readMDIORegister | ( | uint32 | layerAddr,
 |  | uint32 | deviceAddr,
 |  | uint32 | regAddr,
 |  | uint32 * | pData
 | ) |  |

Reads a MDIO register of Clause 45 PHY.

Parameters
layerAddr | Layer Address
deviceAddr | Device Address
regAddr | Register Address
pData | Pointer to Data
Returns
None

Definition at line 408 of file IfxGeth.c.

◆ IfxGeth_Phy_Clause45_writeMDIORegister()

IFX_EXTERN void IfxGeth_Phy_Clause45_writeMDIORegister | ( | uint32 | layerAddr,
 |  | uint32 | deviceAddr,
 |  | uint32 | regAddr,
 |  | uint32 | data
 | ) |  |

Writes to a MDIO register for Clause 45 PHY.

Parameters
layerAddr | Layer Address
deviceAddr | Device Address
regAddr | Register Address
data | Data
Returns
None

Definition at line 423 of file IfxGeth.c.


iLLD_TC38A: Global Definitions

Files
Global Definitions
iLLD
Collaboration diagram for Global Definitions:

Files

file IfxGlobal_cfg.h
Global definitions.

Detailed Description


iLLD_TC38A: IfxGlobal_cfg.h File Reference

  • _Impl
Macros
IfxGlobal_cfg.h File Reference
iLLD » Global Definitions

Global definitions. More...

Go to the source code of this file.

Macros

#define | IFXGLOBAL_DERIVATIVE_TC38x (1)
Microcontroller derivative corresponding to the iLLD implementation. More...
#define | IFXGLOBAL_DERIVATIVE_NAME "TC38x"
Microcontroller derivative name. More...

Detailed Description

Global definitions.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGlobal_cfg.h.

Macro Definition Documentation

◆ IFXGLOBAL_DERIVATIVE_NAME

#define IFXGLOBAL_DERIVATIVE_NAME "TC38x"

Microcontroller derivative name.

Definition at line 59 of file IfxGlobal_cfg.h.

◆ IFXGLOBAL_DERIVATIVE_TC38x

#define IFXGLOBAL_DERIVATIVE_TC38x (1)

Microcontroller derivative corresponding to the iLLD implementation.

Definition at line 55 of file IfxGlobal_cfg.h.


iLLD_TC38A: GPT12

Modules | Files
GPT12
iLLD
Collaboration diagram for GPT12:

Modules

Implementation
Standard Driver
GPT12 Pin Mapping
INCRENC

Files

file | IfxGpt12_cfg.h
GPT12 on-chip implementation data.
file | IfxGpt12_PinMap.c
GPT12 I/O map.
file | IfxGpt12_PinMap.h
GPT12 I/O map.
file | IfxGpt12_IncrEnc.h
GPT12 INCRENC details.
file | IfxGpt12.h
GPT12 basic functionality.

Detailed Description


iLLD_TC38A: Implementation

Implementation
iLLD » GPT12
Collaboration diagram for Implementation:


iLLD_TC38A: Standard Driver

Modules
Standard Driver
iLLD » GPT12
Collaboration diagram for Standard Driver:

Modules

Enumerations
Interrupt Functions
Configuration Functions
Utility Functions
Operative Functions

Detailed Description


iLLD_TC38A: Enumerations

Enumerations
Enumerations
iLLD » GPT12 » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxGpt12_CaptureInput {
IfxGpt12_CaptureInput_A = 0,
IfxGpt12_CaptureInput_B = 1,
IfxGpt12_CaptureInput_C = 2,
IfxGpt12_CaptureInput_D = 3
}
Input Select for CAPIN
Definition in IfxGPT12.PISEL.B.ISCAPIN. More...
enum IfxGpt12_CaptureInputMode {
IfxGpt12_CaptureInputMode_none = 0,
IfxGpt12_CaptureInputMode_risingEdgeTxIN = 1,
IfxGpt12_CaptureInputMode_fallingEdgeTxIN = 2,
IfxGpt12_CaptureInputMode_bothEdgesTxIN = 3
}
Tx Input Edge Selection (Capture Mode, x=2,4) More...
enum IfxGpt12_CaptureTrigger {
IfxGpt12_CaptureTrigger_capin = 0,
IfxGpt12_CaptureTrigger_t3inOrT3EUD = 1
}
Capture Trigger Enable
Definition in IfxGPT12.T5CON.B.CT3. More...
enum IfxGpt12_CaptureTriggerMode {
IfxGpt12_CaptureTriggerMode_disabled = 0,
IfxGpt12_CaptureTriggerMode_risingEdge = 1,
IfxGpt12_CaptureTriggerMode_fallingEdge = 2,
IfxGpt12_CaptureTriggerMode_randomEdge = 3
}
Capture Trigger Selection
Definition in IfxGPT12.T5CON.B.CI. More...
enum IfxGpt12_CounterInputMode {
IfxGpt12_CounterInputMode_counterDisabled = 0,
IfxGpt12_CounterInputMode_risingEdgeTxIN = 1,
IfxGpt12_CounterInputMode_fallingEdgeTxIN = 2,
IfxGpt12_CounterInputMode_bothEdgesTxIN = 3,
IfxGpt12_CounterInputMode_risingEdgeTxOTL = 5,
IfxGpt12_CounterInputMode_fallingEdgeTxOTL = 6,
IfxGpt12_CounterInputMode_bothEdgesTxOTL = 7
}
Input Edge Selection for counter mode
Definition in IfxGPT12.TxCON.B.TxI (x = 2 to 6) More...
enum IfxGpt12_EudInput {
IfxGpt12_EudInput_A = 0,
IfxGpt12_EudInput_B = 1,
IfxGpt12_EudInput_C = 2,
IfxGpt12_EudInput_D = 3
}
Input Select for TxEUD
Definition in IfxGPT12.PISEL.B.ISTxEUD (x = 2 to 4) More...
enum IfxGpt12_Gpt1BlockPrescaler {
IfxGpt12_Gpt1BlockPrescaler_8 = 0,
IfxGpt12_Gpt1BlockPrescaler_4 = 1,
IfxGpt12_Gpt1BlockPrescaler_32 = 2,
IfxGpt12_Gpt1BlockPrescaler_16 = 3
}
GPT1 block prescaler Selection
Definition in IfxGPT12.T3CON.B.BPS1. More...
enum IfxGpt12_Gpt2BlockPrescaler {
IfxGpt12_Gpt2BlockPrescaler_4 = 0,
IfxGpt12_Gpt2BlockPrescaler_2 = 1,
IfxGpt12_Gpt2BlockPrescaler_16 = 2,
IfxGpt12_Gpt2BlockPrescaler_8 = 3
}
Gpt2 block prescaler Selection
Definition in IfxGPT12.T6CON.B.BPS2. More...
enum IfxGpt12_IncrementalInterfaceInputMode {
IfxGpt12_IncrementalInterfaceInputMode_stopCounterTx = 0,
IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxIN = 1,
IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxEUD = 2,
IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxINOrTxEUD = 3
}
Input Edge Selection for Incremental Interface mode
Definition in IfxGPT12.TxCON.B.TxI (x=2, 3 and 4) More...
enum IfxGpt12_Input {
IfxGpt12_Input_A = 0,
IfxGpt12_Input_B = 1,
IfxGpt12_Input_C = 2,
IfxGpt12_Input_D = 3
}
Input Select for TxIN
Definition in IfxGPT12.PISEL.B.ISTxIN (x = 2 to 4) More...
enum IfxGpt12_Mode {
IfxGpt12_Mode_timer = 0,
IfxGpt12_Mode_counter = 1,
IfxGpt12_Mode_lowGatedTimer = 2,
IfxGpt12_Mode_highGatedTimer = 3,
IfxGpt12_Mode_reload = 4,
IfxGpt12_Mode_capture = 5,
IfxGpt12_Mode_incrementalInterfaceRotationDetection = 6,
IfxGpt12_Mode_incrementalInterfaceEdgeDetection = 7
}
Timer operating mode
Definition in IfxGPT12.TxCON.B.TxM (x = 2 to 4) More...
enum IfxGpt12_ReloadInputMode {
IfxGpt12_ReloadInputMode_counterDisabled = 0,
IfxGpt12_ReloadInputMode_risingEdgeTxIN = 1,
IfxGpt12_ReloadInputMode_fallingEdgeTxIN = 2,
IfxGpt12_ReloadInputMode_bothEdgesTxIN = 3,
IfxGpt12_ReloadInputMode_risingEdgeTxOTL = 5,
IfxGpt12_ReloadInputMode_fallingEdgeTxOTL = 6,
IfxGpt12_ReloadInputMode_bothEdgesTxOTL = 7
}
Input Edge Selection for reload mode
Definition in IfxGPT12.TxCON.B.TxI (x = 2 and 4) More...
enum IfxGpt12_SleepMode {
IfxGpt12_SleepMode_enable = 0,
IfxGpt12_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_GPT12.CLC.B.EDIS. More...
enum IfxGpt12_SuspendMode {
IfxGpt12_SuspendMode_none = 0,
IfxGpt12_SuspendMode_hard = 1,
IfxGpt12_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxGpt12_TimerDirection {
IfxGpt12_TimerDirection_up = 0,
IfxGpt12_TimerDirection_down = 1
}
Timer Count Direction
Definition in IfxGPT12.TxCON.B.TxUD (x=2 to 6) More...
enum IfxGpt12_TimerDirectionSource {
IfxGpt12_TimerDirectionSource_internal = 0,
IfxGpt12_TimerDirectionSource_external = 1
}
Timer count direction control source
Definition in IfxGPT12.TxCON.B.TxUDE (x=2 to 6) More...
enum IfxGpt12_TimerInputPrescaler {
IfxGpt12_TimerInputPrescaler_1 = 0,
IfxGpt12_TimerInputPrescaler_2 = 1,
IfxGpt12_TimerInputPrescaler_4 = 2,
IfxGpt12_TimerInputPrescaler_8 = 3,
IfxGpt12_TimerInputPrescaler_16 = 4,
IfxGpt12_TimerInputPrescaler_32 = 5,
IfxGpt12_TimerInputPrescaler_64 = 6,
IfxGpt12_TimerInputPrescaler_128 = 7
}
Input prescaler Selection for the timer
Definition in IfxGPT12.TxCON.B.TxI (x = 2 to 4) More...
enum IfxGpt12_TimerReloadMode {
IfxGpt12_TimerReloadMode_disable,
IfxGpt12_TimerReloadMode_enable
}
Timer Reload Mode
Definition in IfxGPT12.T6CON.B.T6SR. More...
enum IfxGpt12_TimerRemoteControl {
IfxGpt12_TimerRemoteControl_off = 0,
IfxGpt12_TimerRemoteControl_on = 1
}
Timer Remote Control enable choice
Definition in IfxGPT12.TxCON.B.TxRC (x = 2 and 4) More...
enum IfxGpt12_TimerRun {
IfxGpt12_TimerRun_stop = 0,
IfxGpt12_TimerRun_start = 1
}
Timer Run / stop control choice (only if TxCON.B.TxRC = 0)
Definition in IfxGPT12.TxCON.B.TxR (x = 2 to 6) More...

Detailed Description

Enumeration Type Documentation

◆ IfxGpt12_CaptureInput

enum IfxGpt12_CaptureInput

Input Select for CAPIN
Definition in IfxGPT12.PISEL.B.ISCAPIN.

Enumerator
IfxGpt12_CaptureInput_A | signal CAPINA selected
IfxGpt12_CaptureInput_B | signal CAPINB selected
IfxGpt12_CaptureInput_C | signal CAPINC selected
IfxGpt12_CaptureInput_D | signal CAPIND selected

Definition at line 76 of file IfxGpt12.h.

◆ IfxGpt12_CaptureInputMode

enum IfxGpt12_CaptureInputMode

Tx Input Edge Selection (Capture Mode, x=2,4)

Enumerator
IfxGpt12_CaptureInputMode_none | None, Counter is disabled.
IfxGpt12_CaptureInputMode_risingEdgeTxIN | rising edge on TxIN
IfxGpt12_CaptureInputMode_fallingEdgeTxIN | falling edge on TxIN
IfxGpt12_CaptureInputMode_bothEdgesTxIN | (rising or falling edge) on TxIN

Definition at line 86 of file IfxGpt12.h.

◆ IfxGpt12_CaptureTrigger

enum IfxGpt12_CaptureTrigger

Capture Trigger Enable
Definition in IfxGPT12.T5CON.B.CT3.

Enumerator
IfxGpt12_CaptureTrigger_capin | Capture Trigger Enable from CAPIN.
IfxGpt12_CaptureTrigger_t3inOrT3EUD | Capture Trigger Enable from T3IN/T3EUD.

Definition at line 97 of file IfxGpt12.h.

◆ IfxGpt12_CaptureTriggerMode

enum IfxGpt12_CaptureTriggerMode

Capture Trigger Selection
Definition in IfxGPT12.T5CON.B.CI.

Enumerator
IfxGpt12_CaptureTriggerMode_disabled | capture disabled
IfxGpt12_CaptureTriggerMode_risingEdge | positive Transition on CAPIN or any Transition on T3IN
IfxGpt12_CaptureTriggerMode_fallingEdge | negative Transition on CAPIN or any Transition on T3EUD
IfxGpt12_CaptureTriggerMode_randomEdge | Any Transition on CAPIN or any Transition on T3IN/T3EUD.

Definition at line 106 of file IfxGpt12.h.

◆ IfxGpt12_CounterInputMode

enum IfxGpt12_CounterInputMode

Input Edge Selection for counter mode
Definition in IfxGPT12.TxCON.B.TxI (x = 2 to 6)

Enumerator
IfxGpt12_CounterInputMode_counterDisabled | Counter Tx is disabled.
IfxGpt12_CounterInputMode_risingEdgeTxIN | rising edge on TxIN
IfxGpt12_CounterInputMode_fallingEdgeTxIN | falling edge on TxIN
IfxGpt12_CounterInputMode_bothEdgesTxIN | rising or falling edge on TxIN
IfxGpt12_CounterInputMode_risingEdgeTxOTL | rising edge of TxOTL (x=3,6)
IfxGpt12_CounterInputMode_fallingEdgeTxOTL | falling edge of TxOTL
IfxGpt12_CounterInputMode_bothEdgesTxOTL | rising or falling edge of TxOTL

Definition at line 117 of file IfxGpt12.h.

◆ IfxGpt12_EudInput

enum IfxGpt12_EudInput

Input Select for TxEUD
Definition in IfxGPT12.PISEL.B.ISTxEUD (x = 2 to 4)

Enumerator
IfxGpt12_EudInput_A | signal TXEUDA selected
IfxGpt12_EudInput_B | signal TXEUDB selected
IfxGpt12_EudInput_C | signal TXEUDC selected
IfxGpt12_EudInput_D | signal TXEUDD selected

Definition at line 131 of file IfxGpt12.h.

◆ IfxGpt12_Gpt1BlockPrescaler

enum IfxGpt12_Gpt1BlockPrescaler

GPT1 block prescaler Selection
Definition in IfxGPT12.T3CON.B.BPS1.

Enumerator
IfxGpt12_Gpt1BlockPrescaler_8 | fGPT/8
IfxGpt12_Gpt1BlockPrescaler_4 | fGPT/4
IfxGpt12_Gpt1BlockPrescaler_32 | fGPT/32
IfxGpt12_Gpt1BlockPrescaler_16 | fGPT/16

Definition at line 142 of file IfxGpt12.h.

◆ IfxGpt12_Gpt2BlockPrescaler

enum IfxGpt12_Gpt2BlockPrescaler

Gpt2 block prescaler Selection
Definition in IfxGPT12.T6CON.B.BPS2.

Enumerator
IfxGpt12_Gpt2BlockPrescaler_4 | fGPT/4
IfxGpt12_Gpt2BlockPrescaler_2 | fGPT/2
IfxGpt12_Gpt2BlockPrescaler_16 | fGPT/16
IfxGpt12_Gpt2BlockPrescaler_8 | fGPT/8

Definition at line 153 of file IfxGpt12.h.

◆ IfxGpt12_IncrementalInterfaceInputMode

enum IfxGpt12_IncrementalInterfaceInputMode

Input Edge Selection for Incremental Interface mode
Definition in IfxGPT12.TxCON.B.TxI (x=2, 3 and 4)

Enumerator
IfxGpt12_IncrementalInterfaceInputMode_stopCounterTx | Counter Tx Stop.
IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxIN | (rising or falling edge) on TxIN
IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxEUD | (rising or falling edge) on TxEUD
IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxINOrTxEUD | (rising or falling edge) on any Tx input (TxIN or TxEUD)

Definition at line 164 of file IfxGpt12.h.

◆ IfxGpt12_Input

enum IfxGpt12_Input

Input Select for TxIN
Definition in IfxGPT12.PISEL.B.ISTxIN (x = 2 to 4)

Enumerator
IfxGpt12_Input_A | signal TXINA selected
IfxGpt12_Input_B | signal TXINB selected
IfxGpt12_Input_C | signal TXINC selected
IfxGpt12_Input_D | signal TXIND selected

Definition at line 175 of file IfxGpt12.h.

◆ IfxGpt12_Mode

enum IfxGpt12_Mode

Timer operating mode
Definition in IfxGPT12.TxCON.B.TxM (x = 2 to 4)

Enumerator
IfxGpt12_Mode_timer | Timer Mode selected.
IfxGpt12_Mode_counter | Counter Mode selected.
IfxGpt12_Mode_lowGatedTimer | Low Gated Timer Mode selected.
IfxGpt12_Mode_highGatedTimer | High Gated Timer Mode selected.
IfxGpt12_Mode_reload | Reload Mode selected.
IfxGpt12_Mode_capture | Capture Mode selected.
IfxGpt12_Mode_incrementalInterfaceRotationDetection | Incremental Interface Mode selected.
IfxGpt12_Mode_incrementalInterfaceEdgeDetection | Incremental Interface Mode selected.

Definition at line 186 of file IfxGpt12.h.

◆ IfxGpt12_ReloadInputMode

enum IfxGpt12_ReloadInputMode

Input Edge Selection for reload mode
Definition in IfxGPT12.TxCON.B.TxI (x = 2 and 4)

Enumerator
IfxGpt12_ReloadInputMode_counterDisabled | Counter Tx is disabled.
IfxGpt12_ReloadInputMode_risingEdgeTxIN | rising edge on TxIN
IfxGpt12_ReloadInputMode_fallingEdgeTxIN | falling edge on TxIN
IfxGpt12_ReloadInputMode_bothEdgesTxIN | rising or falling edge on TxIN
IfxGpt12_ReloadInputMode_risingEdgeTxOTL | rising edge of Tx toggle latch TxOTL
IfxGpt12_ReloadInputMode_fallingEdgeTxOTL | falling edge of Tx toggle latch TxOTL
IfxGpt12_ReloadInputMode_bothEdgesTxOTL | rising or falling edge of Tx toggle latch TxOTL

Definition at line 201 of file IfxGpt12.h.

◆ IfxGpt12_SleepMode

enum IfxGpt12_SleepMode

Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_GPT12.CLC.B.EDIS.

Enumerator
IfxGpt12_SleepMode_enable | enables sleep mode
IfxGpt12_SleepMode_disable | disables sleep mode

Definition at line 215 of file IfxGpt12.h.

◆ IfxGpt12_SuspendMode

enum IfxGpt12_SuspendMode

OCDS Suspend Control (OCDS.SUS)

Enumerator
IfxGpt12_SuspendMode_none | No suspend.
IfxGpt12_SuspendMode_hard | Hard Suspend.
IfxGpt12_SuspendMode_soft | Soft Suspend.

Definition at line 223 of file IfxGpt12.h.

◆ IfxGpt12_TimerDirection

enum IfxGpt12_TimerDirection

Timer Count Direction
Definition in IfxGPT12.TxCON.B.TxUD (x=2 to 6)

Enumerator
IfxGpt12_TimerDirection_up | Timer Up Direction selected.
IfxGpt12_TimerDirection_down | Timer Down Direction selected.

Definition at line 233 of file IfxGpt12.h.

◆ IfxGpt12_TimerDirectionSource

enum IfxGpt12_TimerDirectionSource

Timer count direction control source
Definition in IfxGPT12.TxCON.B.TxUDE (x=2 to 6)

Enumerator
IfxGpt12_TimerDirectionSource_internal | Timer Dir Control = TxUD (x=2,3,4)
IfxGpt12_TimerDirectionSource_external | Timer Dir Control = TxUD (x=2,3,4)

Definition at line 242 of file IfxGpt12.h.

◆ IfxGpt12_TimerInputPrescaler

enum IfxGpt12_TimerInputPrescaler

Input prescaler Selection for the timer
Definition in IfxGPT12.TxCON.B.TxI (x = 2 to 4)

Enumerator
IfxGpt12_TimerInputPrescaler_1
IfxGpt12_TimerInputPrescaler_2
IfxGpt12_TimerInputPrescaler_4
IfxGpt12_TimerInputPrescaler_8
IfxGpt12_TimerInputPrescaler_16
IfxGpt12_TimerInputPrescaler_32
IfxGpt12_TimerInputPrescaler_64
IfxGpt12_TimerInputPrescaler_128

Definition at line 251 of file IfxGpt12.h.

◆ IfxGpt12_TimerReloadMode

enum IfxGpt12_TimerReloadMode

Timer Reload Mode
Definition in IfxGPT12.T6CON.B.T6SR.

Enumerator
IfxGpt12_TimerReloadMode_disable | Reload mode disabled.
IfxGpt12_TimerReloadMode_enable | Reload mode enabled.

Definition at line 266 of file IfxGpt12.h.

◆ IfxGpt12_TimerRemoteControl

enum IfxGpt12_TimerRemoteControl

Timer Remote Control enable choice
Definition in IfxGPT12.TxCON.B.TxRC (x = 2 and 4)

Enumerator
IfxGpt12_TimerRemoteControl_off | T2 RemoteControl Off.
IfxGpt12_TimerRemoteControl_on | T2 RemoteControl On.

Definition at line 275 of file IfxGpt12.h.

◆ IfxGpt12_TimerRun

enum IfxGpt12_TimerRun

Timer Run / stop control choice (only if TxCON.B.TxRC = 0)
Definition in IfxGPT12.TxCON.B.TxR (x = 2 to 6)

Enumerator
IfxGpt12_TimerRun_stop | Timer x Stops.
IfxGpt12_TimerRun_start | Timer X Run.

Definition at line 284 of file IfxGpt12.h.


iLLD_TC38A: Interrupt Functions

Functions
Interrupt Functions
iLLD » GPT12 » Standard Driver
Collaboration diagram for Interrupt Functions:

Functions

IFX_INLINE volatile Ifx_SRC_SRCR * | IfxGpt12_T2_getSrc (Ifx_GPT12 *gpt12)
Returns the address of Timer 2 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxGpt12_T3_getSrc (Ifx_GPT12 *gpt12)
Returns the address of Timer 3 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxGpt12_T4_getSrc (Ifx_GPT12 *gpt12)
Returns the address of Timer 4 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxGpt12_T5_getSrc (Ifx_GPT12 *gpt12)
Returns the address of Timer 5 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxGpt12_T6_getSrc (Ifx_GPT12 *gpt12)
Returns the address of Timer 6 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxGpt12_getCaptureSrc (Ifx_GPT12 *gpt12)
Returns the address of capture service request. More...

Detailed Description

Function Documentation

◆ IfxGpt12_getCaptureSrc()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxGpt12_getCaptureSrc ( Ifx_GPT12 * gpt12 )

Returns the address of capture service request.

Parameters
gpt12 Pointer to module base address
Returns
address of capture Interrupt

Definition at line 1570 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_updateSpeedFromT3().

◆ IfxGpt12_T2_getSrc()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxGpt12_T2_getSrc ( Ifx_GPT12 * gpt12 )

Returns the address of Timer 2 service request.

Parameters
gpt12 Pointer to module base address
Returns
address of timer 2 Interrupt

Definition at line 1074 of file IfxGpt12.h.

◆ IfxGpt12_T3_getSrc()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxGpt12_T3_getSrc ( Ifx_GPT12 * gpt12 )

Returns the address of Timer 3 service request.

Parameters
gpt12 Pointer to module base address
Returns
address of Timer 3 Interrupt

Definition at line 1185 of file IfxGpt12.h.

◆ IfxGpt12_T4_getSrc()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxGpt12_T4_getSrc ( Ifx_GPT12 * gpt12 )

Returns the address of Timer 4 service request.

Parameters
gpt12 Pointer to module base address
Returns
address of timer 4 interrupt

Definition at line 1278 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T5_getSrc()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxGpt12_T5_getSrc ( Ifx_GPT12 * gpt12 )

Returns the address of Timer 5 service request.

Parameters
gpt12 Pointer to module base address
Returns
address of Timer 5 Interrupt

Definition at line 1387 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_updateSpeedFromT3().

◆ IfxGpt12_T6_getSrc()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxGpt12_T6_getSrc ( Ifx_GPT12 * gpt12 )

Returns the address of Timer 6 service request.

Parameters
gpt12 Pointer to module base address
Returns
address of Timer 6 interrupt

Definition at line 1493 of file IfxGpt12.h.


iLLD_TC38A: Configuration Functions

Functions
Configuration Functions
iLLD » GPT12 » Standard Driver
Collaboration diagram for Configuration Functions:

Functions

IFX_INLINE void | IfxGpt12_T2_setCaptureInputMode (Ifx_GPT12 *gpt12, IfxGpt12_CaptureInputMode inputMode)
Sets the input edge selection for the capture mode of the T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setCounterInputMode (Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
Sets the input edge selection for the counter mode of the T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setDirectionSource (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
Sets the T2 timer count direction source internal / external. More...
IFX_INLINE void | IfxGpt12_T2_setEudInput (Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setIncrementalInterfaceInputMode (Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode)
Sets the input edge selection for the incremental interface mode of the T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setInput (Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setInterruptEnable (Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the interrupt generation of the T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setMode (Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setReloadInputMode (Ifx_GPT12 *gpt12, IfxGpt12_ReloadInputMode inputMode)
Sets the input edge selection for the reload mode of the T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setRemoteControl (Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control)
Sets the remote control of the T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setTimerDirection (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
Sets the T2 timer count direction. More...
IFX_INLINE void | IfxGpt12_T2_setTimerPrescaler (Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
Sets the input prescaler for the Timer mode and Gated timer mode of T2 timer. More...
IFX_INLINE void | IfxGpt12_T3_enableOutput (Ifx_GPT12 *gpt12, boolean enable)
Enable / Disable the T3 Output on pin T3OUT. More...
IFX_INLINE void | IfxGpt12_T3_setCounterInputMode (Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
Sets the input edge selection for the counter mode of the T3 timer. More...
IFX_INLINE void | IfxGpt12_T3_setDirectionSource (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
Sets the T3 timer count direction source internal / external. More...
IFX_INLINE void | IfxGpt12_T3_setEudInput (Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T3 timer. More...
IFX_INLINE void | IfxGpt12_T3_setIncrementalInterfaceInputMode (Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode)
Sets the input edge selection for the incremental interface mode of the T3 timer. More...
IFX_INLINE void | IfxGpt12_T3_setInput (Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T3 timer. More...
IFX_INLINE void | IfxGpt12_T3_setMode (Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T3 timer. More...
IFX_INLINE void | IfxGpt12_T3_setTimerDirection (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
Sets the T3 timer count direction. More...
IFX_INLINE void | IfxGpt12_T3_setTimerPrescaler (Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
Sets the input prescaler for the Timer mode and Gated timer mode of T3 timer. More...
IFX_INLINE void | IfxGpt12_T4_enableClearTimerT2 (Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the clear timer T2 bit of the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_enableClearTimerT3 (Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the clear timer T3 bit of the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setCaptureInputMode (Ifx_GPT12 *gpt12, IfxGpt12_CaptureInputMode inputMode)
Sets the input edge selection for the capture mode of the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setCounterInputMode (Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
Sets the input edge selection for the counter mode of the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setDirectionSource (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
Sets the T4 timer count direction source internal / external. More...
IFX_INLINE void | IfxGpt12_T4_setEudInput (Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setIncrementalInterfaceInputMode (Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode)
Sets the input edge selection for the incremental interface mode of the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setInput (Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setInterruptEnable (Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the interrupt generation of the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setMode (Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setReloadInputMode (Ifx_GPT12 *gpt12, IfxGpt12_ReloadInputMode inputMode)
Sets the input edge selection for the reload mode of the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setRemoteControl (Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control)
Sets the remote control of the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setTimerDirection (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
Sets the T4 timer count direction. More...
IFX_INLINE void | IfxGpt12_T4_setTimerPrescaler (Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
Sets the input prescaler for the Timer mode and Gated timer mode of T4 timer. More...
IFX_INLINE void | IfxGpt12_T5_enableClearTimer (Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the clear timer bit of the T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setCaptureTrigger (Ifx_GPT12 *gpt12, IfxGpt12_CaptureTrigger trigger)
Sets the capture trigger of teh T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setCaptureTriggerEnable (Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the capture trigger of the T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setCaptureTriggerMode (Ifx_GPT12 *gpt12, IfxGpt12_CaptureTriggerMode mode)
Sets the capture trigger mode of the T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setCounterInputMode (Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
Sets the input edge selection for the counter mode of the T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setDirectionSource (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
Sets the T5 timer count direction source internal / external. More...
IFX_INLINE void | IfxGpt12_T5_setEudInput (Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setInput (Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setMode (Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setRemoteControl (Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control)
Sets the remote control of the T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setTimerDirection (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
Sets the T5 timer count direction. More...
IFX_INLINE void | IfxGpt12_T5_setTimerPrescaler (Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
Sets the input prescaler for the Timer mode and Gated timer mode of T5 timer. More...
IFX_INLINE void | IfxGpt12_T6_enableClearTimer (Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the clear timer bit of the T6 timer. More...
IFX_INLINE void | IfxGpt12_T6_setCounterInputMode (Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
Sets the input edge selection for the counter mode of the T6 timer. More...
IFX_INLINE void | IfxGpt12_T6_setDirectionSource (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
sets the T6 timer count direction source internal / external More...
IFX_INLINE void | IfxGpt12_T6_setEudInput (Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T6 timer. More...
IFX_INLINE void | IfxGpt12_T6_setInput (Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T6 timer. More...
IFX_INLINE void | IfxGpt12_T6_setMode (Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T6 timer. More...
IFX_INLINE void | IfxGpt12_T6_setReloadMode (Ifx_GPT12 *gpt12, IfxGpt12_TimerReloadMode mode)
sets the T6 timer count direction More...
IFX_INLINE void | IfxGpt12_T6_setTimerDirection (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
sets the T6 timer count direction More...
IFX_INLINE void | IfxGpt12_T6_setTimerPrescaler (Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
Sets the input prescaler for the Timer mode and Gated timer mode of T6 timer. More...
IFX_INLINE void | IfxGpt12_initCapInPin (const IfxGpt12_TxIn_In *capIn, IfxPort_InputMode inputMode)
Initializes a Capin_In input. More...
IFX_INLINE void | IfxGpt12_initTxOutPin (const IfxGpt12_TxOut_Out *txOut, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a SLSO output. More...
IFX_INLINE void | IfxGpt12_setCaptureInput (Ifx_GPT12 *gpt12, IfxGpt12_CaptureInput input)
Sets the capture input. More...
IFX_INLINE void | IfxGpt12_setGpt1BlockPrescaler (Ifx_GPT12 *gpt12, IfxGpt12_Gpt1BlockPrescaler bps1)
Sets the GPT1 block prescaler. More...
IFX_INLINE void | IfxGpt12_setGpt2BlockPrescaler (Ifx_GPT12 *gpt12, IfxGpt12_Gpt2BlockPrescaler bps2)
Sets the GPT2 block prescaler. More...
IFX_EXTERN void | IfxGpt12_disableModule (Ifx_GPT12 *gpt12)
Disables the module. More...
IFX_EXTERN void | IfxGpt12_enableModule (Ifx_GPT12 *gpt12)
Enables the module. More...
IFX_EXTERN void | IfxGpt12_initTxEudInPin (const IfxGpt12_TxEud_In *txEudIn, IfxPort_InputMode inputMode)
Initializes a TxEUDIn_IN input. More...
IFX_EXTERN void | IfxGpt12_initTxInPin (const IfxGpt12_TxIn_In *txIn, IfxPort_InputMode inputMode)
Initializes a TxIn input. More...

Detailed Description

Function Documentation

◆ IfxGpt12_disableModule()

IFX_EXTERN void IfxGpt12_disableModule ( Ifx_GPT12 * gpt12 )

Disables the module.

Parameters
gpt12 Pointer to module base address
Returns
None

Definition at line 257 of file IfxGpt12.c.

◆ IfxGpt12_enableModule()

IFX_EXTERN void IfxGpt12_enableModule ( Ifx_GPT12 * gpt12 )

Enables the module.

Parameters
gpt12 Pointer to module base address
Returns
None

Definition at line 266 of file IfxGpt12.c.

◆ IfxGpt12_initCapInPin()

IFX_INLINE void IfxGpt12_initCapInPin | ( | const IfxGpt12_TxIn_In * | capIn,
 |  | IfxPort_InputMode | inputMode
 | ) |  |

Initializes a Capin_In input.

Parameters
capIn | the TxIn Pin which should be configured
inputMode | the pin input mode which should be configured
Returns
None

Definition at line 1584 of file IfxGpt12.h.

◆ IfxGpt12_initTxEudInPin()

IFX_EXTERN void IfxGpt12_initTxEudInPin | ( | const IfxGpt12_TxEud_In * | txEudIn,
 |  | IfxPort_InputMode | inputMode
 | ) |  |

Initializes a TxEUDIn_IN input.

Parameters
txEudIn | the TxEUD_IN Pin which should be configured
inputMode | the pin input mode which should be configured
Returns
None

Definition at line 275 of file IfxGpt12.c.

◆ IfxGpt12_initTxInPin()

IFX_EXTERN void IfxGpt12_initTxInPin | ( | const IfxGpt12_TxIn_In * | txIn,
 |  | IfxPort_InputMode | inputMode
 | ) |  |

Initializes a TxIn input.

Parameters
txIn | the TxIn Pin which should be configured
inputMode | the pin input mode which should be configured
Returns
None

Definition at line 330 of file IfxGpt12.c.

◆ IfxGpt12_initTxOutPin()

IFX_INLINE void IfxGpt12_initTxOutPin | ( | const IfxGpt12_TxOut_Out * | txOut,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a SLSO output.

Parameters
txOut | the TxOUT Pin which should be configured
outputMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 1599 of file IfxGpt12.h.

◆ IfxGpt12_setCaptureInput()

IFX_INLINE void IfxGpt12_setCaptureInput | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_CaptureInput | input
 | ) |  |

Sets the capture input.

Parameters
gpt12 | Pointer to Module base address
input | Select the capture input signal
Returns
None

Definition at line 1618 of file IfxGpt12.h.

Referenced by IfxGpt12_initCapInPin(), and IfxGpt12_initCapInPinWithPadLevel().

◆ IfxGpt12_setGpt1BlockPrescaler()

IFX_INLINE void IfxGpt12_setGpt1BlockPrescaler | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_Gpt1BlockPrescaler | bps1
 | ) |  |

Sets the GPT1 block prescaler.

Parameters
gpt12 | Pointer to module base address
bps1 | Select the GPT1 block Prescaler
Returns
None

Definition at line 1630 of file IfxGpt12.h.

◆ IfxGpt12_setGpt2BlockPrescaler()

IFX_INLINE void IfxGpt12_setGpt2BlockPrescaler | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_Gpt2BlockPrescaler | bps2
 | ) |  |

Sets the GPT2 block prescaler.

Parameters
gpt12 | Pointer to module base address
bps2 | Select the GPT2 block Prescaler
Returns
None

Definition at line 1636 of file IfxGpt12.h.

◆ IfxGpt12_T2_setCaptureInputMode()

IFX_INLINE void IfxGpt12_T2_setCaptureInputMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_CaptureInputMode | inputMode
 | ) |  |

Sets the input edge selection for the capture mode of the T2 timer.

Parameters
gpt12 | Pointer to module base address
inputMode | input prescaler value in capture mode
Returns
None

Definition at line 1093 of file IfxGpt12.h.

◆ IfxGpt12_T2_setCounterInputMode()

IFX_INLINE void IfxGpt12_T2_setCounterInputMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_CounterInputMode | inputMode
 | ) |  |

Sets the input edge selection for the counter mode of the T2 timer.

Parameters
gpt12 | Pointer to module base address
inputMode | input edge selection in counter mode
Returns
None

Definition at line 1099 of file IfxGpt12.h.

◆ IfxGpt12_T2_setDirectionSource()

IFX_INLINE void IfxGpt12_T2_setDirectionSource | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerDirectionSource | source
 | ) |  |

Sets the T2 timer count direction source internal / external.

Parameters
gpt12 | Pointer to module base address
source | direction source
Returns
None

Definition at line 1105 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T2_setEudInput()

IFX_INLINE void IfxGpt12_T2_setEudInput | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_EudInput | input
 | ) |  |

Sets the EUD input for the T2 timer.

Parameters
gpt12 | Pointer to module base address
input | Select the EUD input signal
Returns
None

Definition at line 1111 of file IfxGpt12.h.

Referenced by IfxGpt12_initTxEudInPin(), and IfxGpt12_initTxEudInPinWithPadLevel().

◆ IfxGpt12_T2_setIncrementalInterfaceInputMode()

IFX_INLINE void IfxGpt12_T2_setIncrementalInterfaceInputMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_IncrementalInterfaceInputMode | inputMode
 | ) |  |

Sets the input edge selection for the incremental interface mode of the T2 timer.

Parameters
gpt12 | Pointer to module base address
inputMode | input edge selection in IIM mode
Returns
None

Definition at line 1118 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T2_setInput()

IFX_INLINE void IfxGpt12_T2_setInput | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_Input | input
 | ) |  |

Sets the input for the T2 timer.

Parameters
gpt12 | Pointer to module base address
input | Select the Input signal
Returns
None

Definition at line 1124 of file IfxGpt12.h.

Referenced by IfxGpt12_initTxInPin(), and IfxGpt12_initTxInPinWithPadLevel().

◆ IfxGpt12_T2_setInterruptEnable()

IFX_INLINE void IfxGpt12_T2_setInterruptEnable | ( | Ifx_GPT12 * | gpt12,
 |  | boolean | enabled
 | ) |  |

Enables / Disables the interrupt generation of the T2 timer.

Parameters
gpt12 | pointer to module base address
enabled | Enable/Disable choice
Returns
None

Definition at line 1131 of file IfxGpt12.h.

◆ IfxGpt12_T2_setMode()

IFX_INLINE void IfxGpt12_T2_setMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_Mode | mode
 | ) |  |

Sets the mode of operation od T2 timer.

Parameters
gpt12 | Pointer to module base address
mode | Select the mode of operation
Returns
None

Definition at line 1137 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T2_setReloadInputMode()

IFX_INLINE void IfxGpt12_T2_setReloadInputMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_ReloadInputMode | inputMode
 | ) |  |

Sets the input edge selection for the reload mode of the T2 timer.

Parameters
gpt12 | Pointer to module base address
inputMode | input prescaler value in reload mode
Returns
None

Definition at line 1143 of file IfxGpt12.h.

◆ IfxGpt12_T2_setRemoteControl()

IFX_INLINE void IfxGpt12_T2_setRemoteControl | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerRemoteControl | control
 | ) |  |

Sets the remote control of the T2 timer.

Parameters
gpt12 | pointer to module base address
control | enable the remote control
Returns
None

Definition at line 1149 of file IfxGpt12.h.

◆ IfxGpt12_T2_setTimerDirection()

IFX_INLINE void IfxGpt12_T2_setTimerDirection | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerDirection | direction
 | ) |  |

Sets the T2 timer count direction.

Parameters
gpt12 | Pointer to module base address
direction | select the Timer direction
Returns
None

Definition at line 1155 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T2_setTimerPrescaler()

IFX_INLINE void IfxGpt12_T2_setTimerPrescaler | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerInputPrescaler | inputPrescaler
 | ) |  |

Sets the input prescaler for the Timer mode and Gated timer mode of T2 timer.

Parameters
gpt12 | Pointer to module base address
inputPrescaler | input prescaler value in timer mode and gated timer mode
Returns
None

Definition at line 1161 of file IfxGpt12.h.

◆ IfxGpt12_T3_enableOutput()

IFX_INLINE void IfxGpt12_T3_enableOutput | ( | Ifx_GPT12 * | gpt12,
 |  | boolean | enable
 | ) |  |

Enable / Disable the T3 Output on pin T3OUT.

Parameters
gpt12 | Pointer to module base address
enable | enable / disable choice for T3OE
Returns
None

Definition at line 1173 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T3_setCounterInputMode()

IFX_INLINE void IfxGpt12_T3_setCounterInputMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_CounterInputMode | inputMode
 | ) |  |

Sets the input edge selection for the counter mode of the T3 timer.

Parameters
gpt12 | Pointer to module base address
inputMode | input edge selection in counter mode
Returns
None

Definition at line 1204 of file IfxGpt12.h.

◆ IfxGpt12_T3_setDirectionSource()

IFX_INLINE void IfxGpt12_T3_setDirectionSource | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerDirectionSource | source
 | ) |  |

Sets the T3 timer count direction source internal / external.

Parameters
gpt12 | Pointer to module base address
source | direction source
Returns
None

Definition at line 1211 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T3_setEudInput()

IFX_INLINE void IfxGpt12_T3_setEudInput | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_EudInput | input
 | ) |  |

Sets the EUD input for the T3 timer.

Parameters
gpt12 | Pointer to module base address
input | Select the EUD input signal
Returns
None

Definition at line 1217 of file IfxGpt12.h.

Referenced by IfxGpt12_initTxEudInPin(), and IfxGpt12_initTxEudInPinWithPadLevel().

◆ IfxGpt12_T3_setIncrementalInterfaceInputMode()

IFX_INLINE void IfxGpt12_T3_setIncrementalInterfaceInputMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_IncrementalInterfaceInputMode | inputMode
 | ) |  |

Sets the input edge selection for the incremental interface mode of the T3 timer.

Parameters
gpt12 | Pointer to module base address
inputMode | input edge selection in IIM mode
Returns
None

Definition at line 1223 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T3_setInput()

IFX_INLINE void IfxGpt12_T3_setInput | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_Input | input
 | ) |  |

Sets the input for the T3 timer.

Parameters
gpt12 | Pointer to module base address
input | Select the Input signal
Returns
None

Definition at line 1229 of file IfxGpt12.h.

Referenced by IfxGpt12_initTxInPin(), and IfxGpt12_initTxInPinWithPadLevel().

◆ IfxGpt12_T3_setMode()

IFX_INLINE void IfxGpt12_T3_setMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_Mode | mode
 | ) |  |

Sets the mode of operation od T3 timer.

Parameters
gpt12 | Pointer to module base address
mode | Select the mode of operation
Returns
None

Definition at line 1235 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T3_setTimerDirection()

IFX_INLINE void IfxGpt12_T3_setTimerDirection | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerDirection | direction
 | ) |  |

Sets the T3 timer count direction.

Parameters
gpt12 | Pointer to module base address
direction | select the Timer direction
Returns
None

Definition at line 1242 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T3_setTimerPrescaler()

IFX_INLINE void IfxGpt12_T3_setTimerPrescaler | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerInputPrescaler | inputPrescaler
 | ) |  |

Sets the input prescaler for the Timer mode and Gated timer mode of T3 timer.

Parameters
gpt12 | Pointer to module base address
inputPrescaler | input prescaler value in timer mode and gated timer mode
Returns
None

Definition at line 1248 of file IfxGpt12.h.

◆ IfxGpt12_T4_enableClearTimerT2()

IFX_INLINE void IfxGpt12_T4_enableClearTimerT2 | ( | Ifx_GPT12 * | gpt12,
 |  | boolean | enabled
 | ) |  |

Enables / Disables the clear timer T2 bit of the T4 timer.

Parameters
gpt12 | pointer to module base address
enabled | Enable/Disable choice
Returns
None

Definition at line 1260 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T4_enableClearTimerT3()

IFX_INLINE void IfxGpt12_T4_enableClearTimerT3 | ( | Ifx_GPT12 * | gpt12,
 |  | boolean | enabled
 | ) |  |

Enables / Disables the clear timer T3 bit of the T4 timer.

Parameters
gpt12 | pointer to module base address
enabled | Enable/Disable choice
Returns
None

Definition at line 1266 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T4_setCaptureInputMode()

IFX_INLINE void IfxGpt12_T4_setCaptureInputMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_CaptureInputMode | inputMode
 | ) |  |

Sets the input edge selection for the capture mode of the T4 timer.

Parameters
gpt12 | Pointer to module base address
inputMode | input prescaler value in capture mode
Returns
None

Definition at line 1297 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T4_setCounterInputMode()

IFX_INLINE void IfxGpt12_T4_setCounterInputMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_CounterInputMode | inputMode
 | ) |  |

Sets the input edge selection for the counter mode of the T4 timer.

Parameters
gpt12 | Pointer to module base address
inputMode | input edge selection in counter mode
Returns
None

Definition at line 1303 of file IfxGpt12.h.

◆ IfxGpt12_T4_setDirectionSource()

IFX_INLINE void IfxGpt12_T4_setDirectionSource | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerDirectionSource | source
 | ) |  |

Sets the T4 timer count direction source internal / external.

Parameters
gpt12 | Pointer to module base address
source | direction source
Returns
None

Definition at line 1309 of file IfxGpt12.h.

◆ IfxGpt12_T4_setEudInput()

IFX_INLINE void IfxGpt12_T4_setEudInput | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_EudInput | input
 | ) |  |

Sets the EUD input for the T4 timer.

Parameters
gpt12 | Pointer to module base address
input | Select the EUD input signal
Returns
None

Definition at line 1315 of file IfxGpt12.h.

Referenced by IfxGpt12_initTxEudInPin(), and IfxGpt12_initTxEudInPinWithPadLevel().

◆ IfxGpt12_T4_setIncrementalInterfaceInputMode()

IFX_INLINE void IfxGpt12_T4_setIncrementalInterfaceInputMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_IncrementalInterfaceInputMode | inputMode
 | ) |  |

Sets the input edge selection for the incremental interface mode of the T4 timer.

Parameters
gpt12 | Pointer to module base address
inputMode | input edge selection in IIM mode
Returns
None

Definition at line 1321 of file IfxGpt12.h.

◆ IfxGpt12_T4_setInput()

IFX_INLINE void IfxGpt12_T4_setInput | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_Input | input
 | ) |  |

Sets the input for the T4 timer.

Parameters
gpt12 | Pointer to module base address
input | Select the Input signal
Returns
None

Definition at line 1327 of file IfxGpt12.h.

Referenced by IfxGpt12_initTxInPin(), and IfxGpt12_initTxInPinWithPadLevel().

◆ IfxGpt12_T4_setInterruptEnable()

IFX_INLINE void IfxGpt12_T4_setInterruptEnable | ( | Ifx_GPT12 * | gpt12,
 |  | boolean | enabled
 | ) |  |

Enables / Disables the interrupt generation of the T4 timer.

Parameters
gpt12 | pointer to module base address
enabled | Enable/Disable choice
Returns
None

Definition at line 1333 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T4_setMode()

IFX_INLINE void IfxGpt12_T4_setMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_Mode | mode
 | ) |  |

Sets the mode of operation od T4 timer.

Parameters
gpt12 | Pointer to module base address
mode | Select the mode of operation
Returns
None

Definition at line 1339 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T4_setReloadInputMode()

IFX_INLINE void IfxGpt12_T4_setReloadInputMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_ReloadInputMode | inputMode
 | ) |  |

Sets the input edge selection for the reload mode of the T4 timer.

Parameters
gpt12 | Pointer to module base address
inputMode | input prescaler value in reload mode
Returns
None

Definition at line 1345 of file IfxGpt12.h.

◆ IfxGpt12_T4_setRemoteControl()

IFX_INLINE void IfxGpt12_T4_setRemoteControl | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerRemoteControl | control
 | ) |  |

Sets the remote control of the T4 timer.

Parameters
gpt12 | pointer to module base address
control | enable the remote control
Returns
None

Definition at line 1351 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T4_setTimerDirection()

IFX_INLINE void IfxGpt12_T4_setTimerDirection | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerDirection | direction
 | ) |  |

Sets the T4 timer count direction.

Parameters
gpt12 | Pointer to module base address
direction | select the Timer direction
Returns
None

Definition at line 1357 of file IfxGpt12.h.

◆ IfxGpt12_T4_setTimerPrescaler()

IFX_INLINE void IfxGpt12_T4_setTimerPrescaler | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerInputPrescaler | inputPrescaler
 | ) |  |

Sets the input prescaler for the Timer mode and Gated timer mode of T4 timer.

Parameters
gpt12 | Pointer to module base address
inputPrescaler | input prescaler value in timer mode and gated timer mode
Returns
None

Definition at line 1363 of file IfxGpt12.h.

◆ IfxGpt12_T5_enableClearTimer()

IFX_INLINE void IfxGpt12_T5_enableClearTimer | ( | Ifx_GPT12 * | gpt12,
 |  | boolean | enabled
 | ) |  |

Enables / Disables the clear timer bit of the T5 timer.

Parameters
gpt12 | pointer to module base address
enabled | Enable/Disable choice
Returns
None

Definition at line 1375 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T5_setCaptureTrigger()

IFX_INLINE void IfxGpt12_T5_setCaptureTrigger | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_CaptureTrigger | trigger
 | ) |  |

Sets the capture trigger of teh T5 timer.

Parameters
gpt12 | Pointer to Module base address
trigger | Capture trigger
Returns
None

Definition at line 1406 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T5_setCaptureTriggerEnable()

IFX_INLINE void IfxGpt12_T5_setCaptureTriggerEnable | ( | Ifx_GPT12 * | gpt12,
 |  | boolean | enabled
 | ) |  |

Enables / Disables the capture trigger of the T5 timer.

Parameters
gpt12 | pointer to module base address
enabled | Enable/Disable choice
Returns
None

Definition at line 1412 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T5_setCaptureTriggerMode()

IFX_INLINE void IfxGpt12_T5_setCaptureTriggerMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_CaptureTriggerMode | mode
 | ) |  |

Sets the capture trigger mode of the T5 timer.

Parameters
gpt12 | Pointer to module base address
mode | Select the capture trigger mode
Returns
None

Definition at line 1418 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T5_setCounterInputMode()

IFX_INLINE void IfxGpt12_T5_setCounterInputMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_CounterInputMode | inputMode
 | ) |  |

Sets the input edge selection for the counter mode of the T5 timer.

Parameters
gpt12 | Pointer to module base address
inputMode | input edge selection in counter mode
Returns
None

Definition at line 1424 of file IfxGpt12.h.

◆ IfxGpt12_T5_setDirectionSource()

IFX_INLINE void IfxGpt12_T5_setDirectionSource | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerDirectionSource | source
 | ) |  |

Sets the T5 timer count direction source internal / external.

Parameters
gpt12 | Pointer to module base address
source | direction source
Returns
None

Definition at line 1430 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T5_setEudInput()

IFX_INLINE void IfxGpt12_T5_setEudInput | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_EudInput | input
 | ) |  |

Sets the EUD input for the T5 timer.

Parameters
gpt12 | Pointer to module base address
input | Select the EUD input signal
Returns
None

Definition at line 1436 of file IfxGpt12.h.

Referenced by IfxGpt12_initTxEudInPin(), and IfxGpt12_initTxEudInPinWithPadLevel().

◆ IfxGpt12_T5_setInput()

IFX_INLINE void IfxGpt12_T5_setInput | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_Input | input
 | ) |  |

Sets the input for the T5 timer.

Parameters
gpt12 | Pointer to module base address
input | Select the Input signal
Returns
None

Definition at line 1443 of file IfxGpt12.h.

Referenced by IfxGpt12_initTxInPin(), and IfxGpt12_initTxInPinWithPadLevel().

◆ IfxGpt12_T5_setMode()

IFX_INLINE void IfxGpt12_T5_setMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_Mode | mode
 | ) |  |

Sets the mode of operation od T5 timer.

Parameters
gpt12 | Pointer to module base address
mode | Select the mode of operation
Returns
None

Definition at line 1450 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T5_setRemoteControl()

IFX_INLINE void IfxGpt12_T5_setRemoteControl | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerRemoteControl | control
 | ) |  |

Sets the remote control of the T5 timer.

Parameters
gpt12 | pointer to module base address
control | enable the remote control
Returns
None

Definition at line 1457 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T5_setTimerDirection()

IFX_INLINE void IfxGpt12_T5_setTimerDirection | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerDirection | direction
 | ) |  |

Sets the T5 timer count direction.

Parameters
gpt12 | Pointer to module base address
direction | select the Timer direction
Returns
None

Definition at line 1463 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T5_setTimerPrescaler()

IFX_INLINE void IfxGpt12_T5_setTimerPrescaler | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerInputPrescaler | inputPrescaler
 | ) |  |

Sets the input prescaler for the Timer mode and Gated timer mode of T5 timer.

Parameters
gpt12 | Pointer to module base address
inputPrescaler | input prescaler value in timer mode and gated timer mode
Returns
None

Definition at line 1469 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T6_enableClearTimer()

IFX_INLINE void IfxGpt12_T6_enableClearTimer | ( | Ifx_GPT12 * | gpt12,
 |  | boolean | enabled
 | ) |  |

Enables / Disables the clear timer bit of the T6 timer.

Parameters
gpt12 | pointer to module base address
enabled | Enable/Disable choice
Returns
None

Definition at line 1481 of file IfxGpt12.h.

◆ IfxGpt12_T6_setCounterInputMode()

IFX_INLINE void IfxGpt12_T6_setCounterInputMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_CounterInputMode | inputMode
 | ) |  |

Sets the input edge selection for the counter mode of the T6 timer.

Parameters
gpt12 | Pointer to module base address
inputMode | input edge selection in counter mode
Returns
None

Definition at line 1512 of file IfxGpt12.h.

◆ IfxGpt12_T6_setDirectionSource()

IFX_INLINE void IfxGpt12_T6_setDirectionSource | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerDirectionSource | source
 | ) |  |

sets the T6 timer count direction source internal / external

Parameters
gpt12 | Pointer to module base address
source | direction source
Returns
None

Definition at line 1519 of file IfxGpt12.h.

◆ IfxGpt12_T6_setEudInput()

IFX_INLINE void IfxGpt12_T6_setEudInput | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_EudInput | input
 | ) |  |

Sets the EUD input for the T6 timer.

Parameters
gpt12 | Pointer to module base address
input | Select the EUD input signal
Returns
None

Definition at line 1525 of file IfxGpt12.h.

Referenced by IfxGpt12_initTxEudInPin(), and IfxGpt12_initTxEudInPinWithPadLevel().

◆ IfxGpt12_T6_setInput()

IFX_INLINE void IfxGpt12_T6_setInput | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_Input | input
 | ) |  |

Sets the input for the T6 timer.

Parameters
gpt12 | Pointer to module base address
input | Select the Input signal
Returns
None

Definition at line 1532 of file IfxGpt12.h.

Referenced by IfxGpt12_initTxInPin(), and IfxGpt12_initTxInPinWithPadLevel().

◆ IfxGpt12_T6_setMode()

IFX_INLINE void IfxGpt12_T6_setMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_Mode | mode
 | ) |  |

Sets the mode of operation od T6 timer.

Parameters
gpt12 | Pointer to module base address
mode | Select the mode of operation
Returns
None

Definition at line 1539 of file IfxGpt12.h.

◆ IfxGpt12_T6_setReloadMode()

IFX_INLINE void IfxGpt12_T6_setReloadMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerReloadMode | mode
 | ) |  |

sets the T6 timer count direction

Parameters
gpt12 | Pointer to module base address
mode | Timer Reload Mode
Returns
None

Definition at line 1546 of file IfxGpt12.h.

◆ IfxGpt12_T6_setTimerDirection()

IFX_INLINE void IfxGpt12_T6_setTimerDirection | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerDirection | direction
 | ) |  |

sets the T6 timer count direction

Parameters
gpt12 | Pointer to module base address
direction | select the Timer direction
Returns
None

Definition at line 1552 of file IfxGpt12.h.

◆ IfxGpt12_T6_setTimerPrescaler()

IFX_INLINE void IfxGpt12_T6_setTimerPrescaler | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerInputPrescaler | inputPrescaler
 | ) |  |

Sets the input prescaler for the Timer mode and Gated timer mode of T6 timer.

Parameters
gpt12 | Pointer to module base address
inputPrescaler | input prescaler value in timer mode and gated timer mode
Returns
None

Definition at line 1558 of file IfxGpt12.h.


iLLD_TC38A: Utility Functions

Functions
Utility Functions
iLLD » GPT12 » Standard Driver
Collaboration diagram for Utility Functions:

Functions

IFX_INLINE IfxGpt12_Mode | IfxGpt12_T2_getMode (Ifx_GPT12 *gpt12)
Returns the operating mode of the T2 timer. More...
IFX_INLINE uint16 | IfxGpt12_T2_getTimerValue (Ifx_GPT12 *gpt12)
Returns the timer value of the T2 timer. More...
IFX_INLINE IfxGpt12_Mode | IfxGpt12_T3_getMode (Ifx_GPT12 *gpt12)
Returns the operating mode of the T3 timer. More...
IFX_INLINE uint16 | IfxGpt12_T3_getTimerValue (Ifx_GPT12 *gpt12)
Returns the timer value of the T3 timer. More...
IFX_INLINE IfxGpt12_Mode | IfxGpt12_T4_getMode (Ifx_GPT12 *gpt12)
Returns the operating mode of the T4 timer. More...
IFX_INLINE uint16 | IfxGpt12_T4_getTimerValue (Ifx_GPT12 *gpt12)
Returns the timer value of the T4 timer. More...
IFX_INLINE IfxGpt12_Mode | IfxGpt12_T5_getMode (Ifx_GPT12 *gpt12)
Returns the operating mode of the T5 timer. More...
IFX_INLINE uint16 | IfxGpt12_T5_getTimerValue (Ifx_GPT12 *gpt12)
Returns the timer value of the T5 timer. More...
IFX_INLINE IfxGpt12_Mode | IfxGpt12_T6_getMode (Ifx_GPT12 *gpt12)
Returns the operating mode of the T6 timer. More...
IFX_INLINE uint16 | IfxGpt12_T6_getTimerValue (Ifx_GPT12 *gpt12)
Returns the timer value of the T6 timer. More...
IFX_INLINE float32 | IfxGpt12_getModuleFrequency (Ifx_GPT12 *gpt12)
Returns the gpt12 module frequency. More...
IFX_EXTERN float32 | IfxGpt12_T2_getFrequency (Ifx_GPT12 *gpt12)
Returns the frequency of the T2 timer. More...
IFX_EXTERN float32 | IfxGpt12_T3_getFrequency (Ifx_GPT12 *gpt12)
Returns the frequency of the T3 timer. More...
IFX_EXTERN float32 | IfxGpt12_T4_getFrequency (Ifx_GPT12 *gpt12)
Returns the frequency of the T4 timer. More...
IFX_EXTERN float32 | IfxGpt12_T5_getFrequency (Ifx_GPT12 *gpt12)
Returns the frequency of the T5 timer. More...
IFX_EXTERN float32 | IfxGpt12_T6_getFrequency (Ifx_GPT12 *gpt12)
Returns the frequency of the T6 timer. More...

Detailed Description

Function Documentation

◆ IfxGpt12_getModuleFrequency()

IFX_INLINE float32 IfxGpt12_getModuleFrequency ( Ifx_GPT12 * gpt12 )

Returns the gpt12 module frequency.

Parameters
gpt12 Pointer to module base address
Returns
gpt12 module frequency

Definition at line 1577 of file IfxGpt12.h.

Referenced by IfxGpt12_T2_getFrequency(), IfxGpt12_T3_getFrequency(), IfxGpt12_T4_getFrequency(), IfxGpt12_T5_getFrequency(), and IfxGpt12_T6_getFrequency().

◆ IfxGpt12_T2_getFrequency()

IFX_EXTERN float32 IfxGpt12_T2_getFrequency ( Ifx_GPT12 * gpt12 )

Returns the frequency of the T2 timer.

Parameters
gpt12 Pointer to Module base address
Returns
frequency

Definition at line 52 of file IfxGpt12.c.

◆ IfxGpt12_T2_getMode()

IFX_INLINE IfxGpt12_Mode IfxGpt12_T2_getMode ( Ifx_GPT12 * gpt12 )

Returns the operating mode of the T2 timer.

Parameters
gpt12 Pointer to module base address
Returns
mode of operation

Definition at line 1068 of file IfxGpt12.h.

Referenced by IfxGpt12_T2_getFrequency().

◆ IfxGpt12_T2_getTimerValue()

IFX_INLINE uint16 IfxGpt12_T2_getTimerValue ( Ifx_GPT12 * gpt12 )

Returns the timer value of the T2 timer.

Parameters
gpt12 Pointer to module base address
Returns
timer current value

Definition at line 1081 of file IfxGpt12.h.

◆ IfxGpt12_T3_getFrequency()

IFX_EXTERN float32 IfxGpt12_T3_getFrequency ( Ifx_GPT12 * gpt12 )

Returns the frequency of the T3 timer.

Parameters
gpt12 Pointer to Module base address
Returns
frequency

Definition at line 93 of file IfxGpt12.c.

◆ IfxGpt12_T3_getMode()

IFX_INLINE IfxGpt12_Mode IfxGpt12_T3_getMode ( Ifx_GPT12 * gpt12 )

Returns the operating mode of the T3 timer.

Parameters
gpt12 Pointer to module base address
Returns
mode of operation

Definition at line 1179 of file IfxGpt12.h.

◆ IfxGpt12_T3_getTimerValue()

IFX_INLINE uint16 IfxGpt12_T3_getTimerValue ( Ifx_GPT12 * gpt12 )

Returns the timer value of the T3 timer.

Parameters
gpt12 Pointer to module base address
Returns
timer current value

Definition at line 1192 of file IfxGpt12.h.

◆ IfxGpt12_T4_getFrequency()

IFX_EXTERN float32 IfxGpt12_T4_getFrequency ( Ifx_GPT12 * gpt12 )

Returns the frequency of the T4 timer.

Parameters
gpt12 Pointer to Module base address
Returns
frequency

Definition at line 134 of file IfxGpt12.c.

◆ IfxGpt12_T4_getMode()

IFX_INLINE IfxGpt12_Mode IfxGpt12_T4_getMode ( Ifx_GPT12 * gpt12 )

Returns the operating mode of the T4 timer.

Parameters
gpt12 Pointer to module base address
Returns
mode of operation

Definition at line 1272 of file IfxGpt12.h.

◆ IfxGpt12_T4_getTimerValue()

IFX_INLINE uint16 IfxGpt12_T4_getTimerValue ( Ifx_GPT12 * gpt12 )

Returns the timer value of the T4 timer.

Parameters
gpt12 Pointer to module base address
Returns
timer current value

Definition at line 1285 of file IfxGpt12.h.

◆ IfxGpt12_T5_getFrequency()

IFX_EXTERN float32 IfxGpt12_T5_getFrequency ( Ifx_GPT12 * gpt12 )

Returns the frequency of the T5 timer.

Parameters
gpt12 Pointer to Module base address
Returns
frequency

Definition at line 175 of file IfxGpt12.c.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T5_getMode()

IFX_INLINE IfxGpt12_Mode IfxGpt12_T5_getMode ( Ifx_GPT12 * gpt12 )

Returns the operating mode of the T5 timer.

Parameters
gpt12 Pointer to module base address
Returns
mode of operation

Definition at line 1381 of file IfxGpt12.h.

◆ IfxGpt12_T5_getTimerValue()

IFX_INLINE uint16 IfxGpt12_T5_getTimerValue ( Ifx_GPT12 * gpt12 )

Returns the timer value of the T5 timer.

Parameters
gpt12 Pointer to module base address
Returns
timer current value

Definition at line 1394 of file IfxGpt12.h.

◆ IfxGpt12_T6_getFrequency()

IFX_EXTERN float32 IfxGpt12_T6_getFrequency ( Ifx_GPT12 * gpt12 )

Returns the frequency of the T6 timer.

Parameters
gpt12 Pointer to Module base address
Returns
frequency

Definition at line 216 of file IfxGpt12.c.

◆ IfxGpt12_T6_getMode()

IFX_INLINE IfxGpt12_Mode IfxGpt12_T6_getMode ( Ifx_GPT12 * gpt12 )

Returns the operating mode of the T6 timer.

Parameters
gpt12 Pointer to module base address
Returns
mode of operation

Definition at line 1487 of file IfxGpt12.h.

◆ IfxGpt12_T6_getTimerValue()

IFX_INLINE uint16 IfxGpt12_T6_getTimerValue ( Ifx_GPT12 * gpt12 )

Returns the timer value of the T6 timer.

Parameters
gpt12 Pointer to module base address
Returns
timer current value

Definition at line 1500 of file IfxGpt12.h.


iLLD_TC38A: Operative Functions

Functions
Operative Functions
iLLD » GPT12 » Standard Driver
Collaboration diagram for Operative Functions:

Functions

IFX_INLINE void | IfxGpt12_T2_run (Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T2 Timer. More...
IFX_INLINE void | IfxGpt12_T2_setTimerValue (Ifx_GPT12 *gpt12, uint16 value)
Sets value for the T2 timer. More...
IFX_INLINE void | IfxGpt12_T3_run (Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T3 Timer. More...
IFX_INLINE void | IfxGpt12_T3_setTimerValue (Ifx_GPT12 *gpt12, uint16 value)
Sets value for the T3 Timer. More...
IFX_INLINE void | IfxGpt12_T4_run (Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T4 Timer. More...
IFX_INLINE void | IfxGpt12_T4_setTimerValue (Ifx_GPT12 *gpt12, uint16 value)
Sets value for the T4 timer. More...
IFX_INLINE void | IfxGpt12_T5_run (Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T5 Timer. More...
IFX_INLINE void | IfxGpt12_T5_setTimerValue (Ifx_GPT12 *gpt12, uint16 value)
Sets value for the T5 timer. More...
IFX_INLINE void | IfxGpt12_T6_run (Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T6 Timer. More...
IFX_INLINE void | IfxGpt12_T6_setTimerValue (Ifx_GPT12 *gpt12, uint16 value)
Sets value for the T6 timer. More...
IFX_INLINE void | IfxGpt12_setCaptureReload (Ifx_GPT12 *gpt12, IfxGpt12_SleepMode value)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxGpt12_setSleepMode (Ifx_GPT12 *gpt12, IfxGpt12_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxGpt12_setSuspendMode (Ifx_GPT12 *gpt12, IfxGpt12_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN void | IfxGpt12_resetModule (Ifx_GPT12 *gpt12)
resets GPT12 kernel More...

Detailed Description

Function Documentation

◆ IfxGpt12_resetModule()

IFX_EXTERN void IfxGpt12_resetModule ( Ifx_GPT12 * gpt12 )

resets GPT12 kernel

Parameters
gpt12 pointer to GPT12 registers
Returns
None

Definition at line 385 of file IfxGpt12.c.

◆ IfxGpt12_setCaptureReload()

IFX_INLINE void IfxGpt12_setCaptureReload | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_SleepMode | value
 | ) |  |

Sets the sensitivity of the module to sleep signal.

Parameters
gpt12 | pointer to GPT12 registers
value | Reload value
Returns
None

Definition at line 1624 of file IfxGpt12.h.

◆ IfxGpt12_setSleepMode()

IFX_INLINE void IfxGpt12_setSleepMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_SleepMode | mode
 | ) |  |

Sets the sensitivity of the module to sleep signal.

Parameters
gpt12 | pointer to GPT12 registers
mode | mode selection (enable/disable)
Returns
None

Definition at line 1642 of file IfxGpt12.h.

◆ IfxGpt12_setSuspendMode()

IFX_INLINE void IfxGpt12_setSuspendMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_SuspendMode | mode
 | ) |  |

Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.

Parameters
gpt12 | Pointer to GPT12 module registers
mode | Module suspend mode
Returns
None

Definition at line 1651 of file IfxGpt12.h.

◆ IfxGpt12_T2_run()

IFX_INLINE void IfxGpt12_T2_run | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerRun | runTimer
 | ) |  |

Starts / stops the T2 Timer.

Parameters
gpt12 | Pointer to Module base address
runTimer | Start/stop Timer 2
Returns
None

Definition at line 1087 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T2_setTimerValue()

IFX_INLINE void IfxGpt12_T2_setTimerValue | ( | Ifx_GPT12 * | gpt12,
 |  | uint16 | value
 | ) |  |

Sets value for the T2 timer.

Parameters
gpt12 | pointer to module base address
value | Timer Value
Returns
None

Definition at line 1167 of file IfxGpt12.h.

◆ IfxGpt12_T3_run()

IFX_INLINE void IfxGpt12_T3_run | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerRun | runTimer
 | ) |  |

Starts / stops the T3 Timer.

Parameters
gpt12 | Pointer to module base address
runTimer | start/stop Timer 3
Returns
None

Definition at line 1198 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T3_setTimerValue()

IFX_INLINE void IfxGpt12_T3_setTimerValue | ( | Ifx_GPT12 * | gpt12,
 |  | uint16 | value
 | ) |  |

Sets value for the T3 Timer.

Parameters
gpt12 | pointer to module base address
value | Timer Value
Returns
None

Definition at line 1254 of file IfxGpt12.h.

◆ IfxGpt12_T4_run()

IFX_INLINE void IfxGpt12_T4_run | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerRun | runTimer
 | ) |  |

Starts / stops the T4 Timer.

Parameters
gpt12 | Pointer to module base address
runTimer | Start/stop Timer 4
Returns
None

Definition at line 1291 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T4_setTimerValue()

IFX_INLINE void IfxGpt12_T4_setTimerValue | ( | Ifx_GPT12 * | gpt12,
 |  | uint16 | value
 | ) |  |

Sets value for the T4 timer.

Parameters
gpt12 | pointer to module base address
value | Timer Value
Returns
None

Definition at line 1369 of file IfxGpt12.h.

◆ IfxGpt12_T5_run()

IFX_INLINE void IfxGpt12_T5_run | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerRun | runTimer
 | ) |  |

Starts / stops the T5 Timer.

Parameters
gpt12 | Pointer to module base address
runTimer | Start/stop Timer 5
Returns
None

Definition at line 1400 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T5_setTimerValue()

IFX_INLINE void IfxGpt12_T5_setTimerValue | ( | Ifx_GPT12 * | gpt12,
 |  | uint16 | value
 | ) |  |

Sets value for the T5 timer.

Parameters
gpt12 | pointer to module base address
value | Timer Value
Returns
None

Definition at line 1475 of file IfxGpt12.h.

◆ IfxGpt12_T6_run()

IFX_INLINE void IfxGpt12_T6_run | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerRun | runTimer
 | ) |  |

Starts / stops the T6 Timer.

Parameters
gpt12 | Pointer to module base address
runTimer | Start/stop Timer 6
Returns
None

Definition at line 1506 of file IfxGpt12.h.

◆ IfxGpt12_T6_setTimerValue()

IFX_INLINE void IfxGpt12_T6_setTimerValue | ( | Ifx_GPT12 * | gpt12,
 |  | uint16 | value
 | ) |  |

Sets value for the T6 timer.

Parameters
gpt12 | pointer to module base address
value | Timer Value
Returns
None

Definition at line 1564 of file IfxGpt12.h.


iLLD_TC38A: GPT12 Pin Mapping

Data Structures | Macros | Variables
GPT12 Pin Mapping
iLLD » GPT12
Collaboration diagram for GPT12 Pin Mapping:

Data Structures

struct | IfxGpt12_Capin_In
CAPIN pin mapping structure. More...
struct | IfxGpt12_TxEud_In
TxEUD pin mapping structure. More...
struct | IfxGpt12_TxIn_In
TxIN pin mapping structure. More...
struct | IfxGpt12_TxOut_Out
TxOUT pin mapping structure. More...

Macros

#define | IFXGPT12_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXGPT12_PINMAP_NUM_TIMERS 7
#define | IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS 1
#define | IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS 2
#define | IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS 2
#define | IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS 2

Variables

IFX_EXTERN IfxGpt12_Capin_In IfxGpt120_CAPINA_P13_2_IN
Trigger input to capture value of timer T5 into CAPREL register. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T2EUDA_P00_8_IN
Count direction control input of timer T2. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T2EUDB_P33_6_IN
Count direction control input of timer T2. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T3EUDA_P02_7_IN
Count direction control input of core timer T3. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T3EUDB_P10_7_IN
Count direction control input of core timer T3. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T4EUDA_P00_9_IN
Count direction control input of timer T4. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T4EUDB_P33_5_IN
Count direction control input of timer T4. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T5EUDA_P21_6_IN
Count direction control input of timer T5. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T5EUDB_P10_1_IN
Count direction control input of timer T5. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T6EUDA_P20_0_IN
Count direction control input of core timer T6. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T6EUDB_P10_0_IN
Count direction control input of core timer T6. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T2INA_P00_7_IN
Trigger/gate input of timer T2. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T2INB_P33_7_IN
Trigger/gate input of timer T2. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T3INA_P02_6_IN
Trigger/gate input of core timer T3. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T3INB_P10_4_IN
Trigger/gate input of core timer T3. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T4INA_P02_8_IN
Trigger/gate input of timer T4. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T4INB_P10_8_IN
Trigger/gate input of timer T4. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T5INA_P21_7_IN
Trigger/gate input of timer T5. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T5INB_P10_3_IN
Trigger/gate input of timer T5. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T6INA_P20_3_IN
Trigger/gate input of core timer T6. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T6INB_P10_2_IN
Trigger/gate input of core timer T6. More...
IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P10_6_OUT
External output for overflow/underflow detection of core timer T3. More...
IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P21_6_OUT
External output for overflow/underflow detection of core timer T3. More...
IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P10_5_OUT
External output for overflow/underflow detection of core timer T6. More...
IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P21_7_OUT
External output for overflow/underflow detection of core timer T6. More...
IFX_EXTERN const IfxGpt12_Capin_In * | IfxGpt12_Capin_In_pinTable [IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS]
IfxGpt12_Capin_In table. More...
IFX_EXTERN const IfxGpt12_TxEud_In * | IfxGpt12_TxEud_In_pinTable [IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS]
IfxGpt12_TxEud_In table. More...
IFX_EXTERN const IfxGpt12_TxIn_In * | IfxGpt12_TxIn_In_pinTable [IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS]
IfxGpt12_TxIn_In table. More...
IFX_EXTERN const IfxGpt12_TxOut_Out * | IfxGpt12_TxOut_Out_pinTable [IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS]
IfxGpt12_TxOut_Out table. More...

Detailed Description

Data Structure Documentation

◆ IfxGpt12_Capin_In

struct IfxGpt12_Capin_In

CAPIN pin mapping structure.

Definition at line 56 of file IfxGpt12_PinMap.h.

Collaboration diagram for IfxGpt12_Capin_In:
[legend]
Data Fields
Ifx_GPT12 * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxGpt12_TxEud_In

struct IfxGpt12_TxEud_In

TxEUD pin mapping structure.

Definition at line 64 of file IfxGpt12_PinMap.h.

Collaboration diagram for IfxGpt12_TxEud_In:
[legend]
Data Fields
Ifx_GPT12 * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.
uint8 | timer | Timer number.

◆ IfxGpt12_TxIn_In

struct IfxGpt12_TxIn_In

TxIN pin mapping structure.

Definition at line 73 of file IfxGpt12_PinMap.h.

Collaboration diagram for IfxGpt12_TxIn_In:
[legend]
Data Fields
Ifx_GPT12 * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.
uint8 | timer | Timer number.

◆ IfxGpt12_TxOut_Out

struct IfxGpt12_TxOut_Out

TxOUT pin mapping structure.

Definition at line 82 of file IfxGpt12_PinMap.h.

Collaboration diagram for IfxGpt12_TxOut_Out:
[legend]
Data Fields
Ifx_GPT12 * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.
uint8 | timer | Timer number.

Macro Definition Documentation

◆ IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS

#define IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS 1

Definition at line 119 of file IfxGpt12_PinMap.h.

◆ IFXGPT12_PINMAP_NUM_MODULES

#define IFXGPT12_PINMAP_NUM_MODULES 1

Table dimensions.

Definition at line 117 of file IfxGpt12_PinMap.h.

◆ IFXGPT12_PINMAP_NUM_TIMERS

#define IFXGPT12_PINMAP_NUM_TIMERS 7

Definition at line 118 of file IfxGpt12_PinMap.h.

◆ IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS

#define IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS 2

Definition at line 120 of file IfxGpt12_PinMap.h.

◆ IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS

#define IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS 2

Definition at line 121 of file IfxGpt12_PinMap.h.

◆ IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS

#define IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS 2

Definition at line 122 of file IfxGpt12_PinMap.h.

Variable Documentation

◆ IfxGpt120_CAPINA_P13_2_IN

IFX_EXTERN IfxGpt12_Capin_In IfxGpt120_CAPINA_P13_2_IN

Trigger input to capture value of timer T5 into CAPREL register.

Definition at line 90 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T2EUDA_P00_8_IN

IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T2EUDA_P00_8_IN

Count direction control input of timer T2.

Definition at line 91 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T2EUDB_P33_6_IN

IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T2EUDB_P33_6_IN

Count direction control input of timer T2.

Definition at line 92 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T2INA_P00_7_IN

IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T2INA_P00_7_IN

Trigger/gate input of timer T2.

Definition at line 101 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T2INB_P33_7_IN

IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T2INB_P33_7_IN

Trigger/gate input of timer T2.

Definition at line 102 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T3EUDA_P02_7_IN

IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T3EUDA_P02_7_IN

Count direction control input of core timer T3.

Definition at line 93 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T3EUDB_P10_7_IN

IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T3EUDB_P10_7_IN

Count direction control input of core timer T3.

Definition at line 94 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T3INA_P02_6_IN

IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T3INA_P02_6_IN

Trigger/gate input of core timer T3.

Definition at line 103 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T3INB_P10_4_IN

IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T3INB_P10_4_IN

Trigger/gate input of core timer T3.

Definition at line 104 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T3OUT_P10_6_OUT

IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P10_6_OUT

External output for overflow/underflow detection of core timer T3.

Definition at line 111 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T3OUT_P21_6_OUT

IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P21_6_OUT

External output for overflow/underflow detection of core timer T3.

Definition at line 112 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T4EUDA_P00_9_IN

IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T4EUDA_P00_9_IN

Count direction control input of timer T4.

Definition at line 95 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T4EUDB_P33_5_IN

IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T4EUDB_P33_5_IN

Count direction control input of timer T4.

Definition at line 96 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T4INA_P02_8_IN

IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T4INA_P02_8_IN

Trigger/gate input of timer T4.

Definition at line 105 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T4INB_P10_8_IN

IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T4INB_P10_8_IN

Trigger/gate input of timer T4.

Definition at line 106 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T5EUDA_P21_6_IN

IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T5EUDA_P21_6_IN

Count direction control input of timer T5.

Definition at line 97 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T5EUDB_P10_1_IN

IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T5EUDB_P10_1_IN

Count direction control input of timer T5.

Definition at line 98 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T5INA_P21_7_IN

IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T5INA_P21_7_IN

Trigger/gate input of timer T5.

Definition at line 107 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T5INB_P10_3_IN

IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T5INB_P10_3_IN

Trigger/gate input of timer T5.

Definition at line 108 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T6EUDA_P20_0_IN

IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T6EUDA_P20_0_IN

Count direction control input of core timer T6.

Definition at line 99 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T6EUDB_P10_0_IN

IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T6EUDB_P10_0_IN

Count direction control input of core timer T6.

Definition at line 100 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T6INA_P20_3_IN

IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T6INA_P20_3_IN

Trigger/gate input of core timer T6.

Definition at line 109 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T6INB_P10_2_IN

IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T6INB_P10_2_IN

Trigger/gate input of core timer T6.

Definition at line 110 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T6OUT_P10_5_OUT

IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P10_5_OUT

External output for overflow/underflow detection of core timer T6.

Definition at line 113 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T6OUT_P21_7_OUT

IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P21_7_OUT

External output for overflow/underflow detection of core timer T6.

Definition at line 114 of file IfxGpt12_PinMap.h.

◆ IfxGpt12_Capin_In_pinTable

IFX_EXTERN const IfxGpt12_Capin_In* IfxGpt12_Capin_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS]

IfxGpt12_Capin_In table.

Definition at line 126 of file IfxGpt12_PinMap.h.

◆ IfxGpt12_TxEud_In_pinTable

IFX_EXTERN const IfxGpt12_TxEud_In* IfxGpt12_TxEud_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS]

IfxGpt12_TxEud_In table.

Definition at line 129 of file IfxGpt12_PinMap.h.

◆ IfxGpt12_TxIn_In_pinTable

IFX_EXTERN const IfxGpt12_TxIn_In* IfxGpt12_TxIn_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS]

IfxGpt12_TxIn_In table.

Definition at line 132 of file IfxGpt12_PinMap.h.

◆ IfxGpt12_TxOut_Out_pinTable

IFX_EXTERN const IfxGpt12_TxOut_Out* IfxGpt12_TxOut_Out_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS]

IfxGpt12_TxOut_Out table.

Definition at line 135 of file IfxGpt12_PinMap.h.


iLLD_TC38A: INCRENC

Modules
INCRENC
iLLD » GPT12
Collaboration diagram for INCRENC:

Modules

How to use the GPT12 Incremental Encoder Driver
Data structures
Functions
StdIf Functions

Detailed Description


iLLD_TC38A: How to use the GPT12 Incremental Encoder Driver

How to use the GPT12 Incremental Encoder Driver
iLLD » GPT12 » INCRENC
Collaboration diagram for How to use the GPT12 Incremental Encoder Driver:

The IncrEnc interface can be used in one of the following configurations T3 as core or T2 as core

Setup with T3 as core

  • T3 as incremental mode
    • Multiplication factor:
      • twoFold: use both edges of TxIn
      • fourFold: use both edges of TxIn and TxEUD
      • Reverse of direction supported by GPT12
      • T3 value diff is used for speed calculation at high speed (speed > speedModeThreshold)
  • T4 used for zero signal detection if pinZ is not NULL
    • interrupt is generated to support turn calculation if zeroIsrPriority != 0
    • T4 clears T3 on zero signal event on TxIn input
  • T5 used for low speed calculation (speed < speedModeThreshold)
    • Rising edge of TxIn or TxEUD captures the T5 timer in CAPREL

Setup with T2 as core

  • T2 as incremental mode
    • Multiplication factor:
      • twoFold: sample on both edges of TxIn
      • fourFold: sample on both edges of TxIn and TxEUD
      • Reverse of direction supported by GPT12
      • T2 value diff is used for speed calculation at high speed
  • T4 used for zero signal detection if pinZeroTxEUD is not NULL
  • T4 clears T2 on zero signal event on TxEUD input

Preparation

Include Files

Include following header file into your C code:

#include <Gpt12/Gpt/IfxGpt12_IncrEnc.h>

Variables

// used globally
static IfxGpt12_IncrEnc gpt12;

Interrupt Handler Installation

See also How to define Interrupts?

Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:

// priorities are normally defined in Ifx_IntPrioDef.h
#define ISR_PRIORITY_INCRENC_ZERO 6

Add the interrupt service routines to your C code. They have to call the GPT12 interrupt handlers by passing the gpt12 handle:

IFX_INTERRUPT(ISR_IncrIncZero, 0, ISR_PRIORITY_INCRENC_ZERO)
{
IfxGpt12_IncrEnc_onZeroIrq(&gpt12);
}

Finally install the interrupt handlers in your initialisation function:

// install interrupt handlers
IfxCpu_Irq_installInterruptHandler(&ISR_IncrIncZero, ISR_PRIORITY_INCRENC_ZERO);
IfxCpu_enableInterrupts();

Module Initialisation

The module initialisation can be done in the same function. Here an example:

// Initialize global clocks
IfxGpt12_enableModule(&MODULE_GPT120);
IfxGpt12_setGpt1BlockPrescaler(&MODULE_GPT120, IfxGpt12_Gpt1BlockPrescaler_8);
IfxGpt12_setGpt2BlockPrescaler(&MODULE_GPT120, IfxGpt12_Gpt2BlockPrescaler_4);
// create module config
IfxGpt12_IncrEnc_Config gpt12Config;
IfxGpt12_IncrEnc_initConfig(&gpt12Config , &MODULE_GPT120);
// implementation with T3 as core
gpt12Config.base.offset = 0;
gpt12Config.base.reversed = FALSE;
gpt12Config.base.resolution = 2048;
gpt12Config.base.periodPerRotation = 1;
gpt12Config.base.resolutionFactor = IfxStdIf_Pos_ResolutionFactor_fourFold;
gpt12Config.base.updatePeriod = 100e-6;
gpt12Config.base.speedModeThreshold = 200;
gpt12Config.base.minSpeed = 10;
gpt12Config.base.maxSpeed = 500;
gpt12Config.zeroIsrPriority = ISR_PRIORITY(INTERRUPT_INCRINC_ZERO);
gpt12Config.zeroIsrProvider = ISR_PROVIDER(INTERRUPT_INCRINC_ZERO);
gpt12Config.pinA = &IfxGpt120_T3INA_P02_6_IN;
gpt12Config.pinB = &IfxGpt120_T3EUDA_P02_7_IN;
gpt12Config.pinZ = &IfxGpt120_T4INA_P02_8_IN;
gpt12Config.pinMode = IfxPort_InputMode_noPullDevice;
gpt12Config.base.speedFilterEnabled = TRUE;
gpt12Config.base.speedFilerCutOffFrequency = config.base.maxSpeed / 2 * IFX_PI * 2;
// initialize module
//IfxGpt12_IncrEnc gpt12; // defined globally
IfxGpt12_IncrEnc_init(&gpt12, &gpt12Config);

Update

speed, position and direction of the incremental encoder can be collected by the following

float32 speed, rawPosition;
IfxStdIf_Pos_Dir direction;
Ifx_TickTime tickRefresh = gpt12.updatePeriod * TimeConst_1s;
Ifx_TickTime refreshDeadLine = now();
if (isDeadLine(refreshDeadLine))
{
refreshDeadLine = addTTime(refreshDeadLine, tickRefresh);
IfxGpt12_IncrEnc_update(&gpt12);
speed = IfxGpt12_IncrEnc_getSpeed(&gpt12);
rawPosition = IfxGpt12_IncrEnc_getRawPosition(&gpt12);
direction = IfxGpt12_IncrEnc_getDirection(&gpt12);
}


iLLD_TC38A: Data structures

Data Structures
Data structures
iLLD » GPT12 » INCRENC
Collaboration diagram for Data structures:

Data Structures

struct | IfxGpt12_IncrEnc
Incremental encoder object. More...
struct | IfxGpt12_IncrEnc_Config
Configuration structure for GPT12. More...

Detailed Description

Data Structure Documentation

◆ IfxGpt12_IncrEnc

struct IfxGpt12_IncrEnc

Incremental encoder object.

Definition at line 209 of file IfxGpt12_IncrEnc.h.

Collaboration diagram for IfxGpt12_IncrEnc:
[legend]
Data Fields
IfxStdIf_Pos_Dir | direction | rotation direction
float32 | maxSpeed | Absolute maximal allowed speed. Above speed is recognized as error.
float32 | minSpeed | Absolute minimal allowed speed. below speed is recognized as 0rad/s.
Ifx_GPT12 * | module | Pointer to the GPT12 module.
sint32 | offset | raw position offset
float32 | positionConst | constant for calculating mechanical position (in rad) from raw position
sint32 rawPosition raw position in ticks.
Note
: the value already contains the offset
sint32 | resolution | resolution of this position sensor interface
float32 | speed | mechanical speed in rad/s
float32 | speedConstPulseCount | constant for calculating mechanical speed (in rad/s) from raw speed in pulse count mode
float32 | speedConstTimeDiff | constant for calculating mechanical speed (in rad/s) from raw speed in time diff mode
float32 | speedModeThreshold | treshold used for speed calculation using pulse count mode or time diff mode in rad/s
sint32 | speedModeThresholdTick | treshold used for speed calculation using pulse count mode or time diff mode in ticks
IfxStdIf_Pos_Status | status | error code (0 = no error)
sint32 | turn | number of mechanical turns
IfxGpt12_IncrEnc_Update | update | Update call back API.
float32 | updatePeriod | update period in seconds

◆ IfxGpt12_IncrEnc_Config

struct IfxGpt12_IncrEnc_Config

Configuration structure for GPT12.

Definition at line 232 of file IfxGpt12_IncrEnc.h.

Collaboration diagram for IfxGpt12_IncrEnc_Config:
[legend]
Data Fields
IfxStdIf_Pos_Config | base | Configuration data of Standard interface: Position interface.
boolean | initPins | TRUE: Initialize pins in driver FALSE: Don't initialize pins. User handles separately.
Ifx_GPT12 * | module | Pointer to module base address.
IfxGpt12_TxIn_In * | pinA | Encoder A signal. Should be connecting to T2 or T3 TxIN. See GPT12 pin map data.
IfxGpt12_TxEud_In * | pinB | Encoder B signal. Should be connecting to T2 or T3 TxEUD. See GPT12 pin map data.
IfxPort_PadDriver | pinDriver | Pad Driver.
IfxPort_InputMode | pinMode | Pin mode for A, B and Z inputs.
IfxGpt12_TxIn_In * | pinZ | Encoder Z signal. Should be connecting to T4 TxIn for use with T3 and TxEUD (Ignore compiler type conflict warning) for use with T4. See GPT12 pin map data.
Ifx_Priority | zeroIsrPriority | Interrupt isrPriority of the zero interrupt, if 0 the interrupt is disable.
IfxSrc_Tos | zeroIsrProvider | Interrupt service provider for the zero interrupt.


iLLD_TC38A: Functions

Functions
Functions
iLLD » GPT12 » INCRENC
Collaboration diagram for Functions:

Functions

IFX_EXTERN boolean | IfxGpt12_IncrEnc_init (IfxGpt12_IncrEnc *driver, const IfxGpt12_IncrEnc_Config *config)
Initialises the Incremental interface. More...
IFX_EXTERN void | IfxGpt12_IncrEnc_initConfig (IfxGpt12_IncrEnc_Config *config, Ifx_GPT12 *gpt12)
Initializes the configuration structure to default. More...

Detailed Description

Function Documentation

◆ IfxGpt12_IncrEnc_init()

IFX_EXTERN boolean IfxGpt12_IncrEnc_init | ( | IfxGpt12_IncrEnc * | driver,
 |  | const IfxGpt12_IncrEnc_Config * | config
 | ) |  |

Initialises the Incremental interface.

Parameters
driver | incremental encoder interface Handle
config | Configuration structure for incremental encoder
Returns
TRUE on success else FALSE
// create module config
IfxGpt12_IncrEnc_Config gptConfig;
IfxGpt12_IncrEnc_initConfig(&gptConfig , &MODULE_GPT120);
// initialize module
//IfxGpt12_IncrEnc gpt12; // defined globally
IfxGpt12_IncrEnc_init(&gpt12, &gptConfig);

Definition at line 158 of file IfxGpt12_IncrEnc.c.

◆ IfxGpt12_IncrEnc_initConfig()

IFX_EXTERN void IfxGpt12_IncrEnc_initConfig | ( | IfxGpt12_IncrEnc_Config * | config,
 |  | Ifx_GPT12 * | gpt12
 | ) |  |

Initializes the configuration structure to default.

Parameters
config | Configuration structure for incremental encoder
gpt12 | pointer to module base address
Returns
None

see IfxGpt12_IncrEnc_init

Definition at line 293 of file IfxGpt12_IncrEnc.c.


iLLD_TC38A: StdIf Functions

Functions
StdIf Functions
iLLD » GPT12 » INCRENC
Collaboration diagram for StdIf Functions:

Functions

IFX_EXTERN float32 | IfxGpt12_IncrEnc_getAbsolutePosition (IfxGpt12_IncrEnc *driver)
IFX_EXTERN IfxStdIf_Pos_Dir | IfxGpt12_IncrEnc_getDirection (IfxGpt12_IncrEnc *driver)
IFX_EXTERN IfxStdIf_Pos_Status | IfxGpt12_IncrEnc_getFault (IfxGpt12_IncrEnc *driver)
IFX_EXTERN sint32 | IfxGpt12_IncrEnc_getOffset (IfxGpt12_IncrEnc *driver)
IFX_EXTERN uint16 | IfxGpt12_IncrEnc_getPeriodPerRotation (IfxGpt12_IncrEnc *driver)
IFX_EXTERN float32 | IfxGpt12_IncrEnc_getPosition (IfxGpt12_IncrEnc *driver)
IFX_EXTERN sint32 | IfxGpt12_IncrEnc_getRawPosition (IfxGpt12_IncrEnc *driver)
IFX_EXTERN float32 | IfxGpt12_IncrEnc_getRefreshPeriod (IfxGpt12_IncrEnc *driver)
IFX_EXTERN sint32 | IfxGpt12_IncrEnc_getResolution (IfxGpt12_IncrEnc *driver)
IFX_EXTERN IfxStdIf_Pos_SensorType | IfxGpt12_IncrEnc_getSensorType (IfxGpt12_IncrEnc *driver)
IFX_EXTERN float32 | IfxGpt12_IncrEnc_getSpeed (IfxGpt12_IncrEnc *driver)
IFX_EXTERN sint32 | IfxGpt12_IncrEnc_getTurn (IfxGpt12_IncrEnc *driver)
IFX_EXTERN void | IfxGpt12_IncrEnc_onZeroIrq (IfxGpt12_IncrEnc *driver)
IFX_EXTERN void | IfxGpt12_IncrEnc_reset (IfxGpt12_IncrEnc *driver)
IFX_EXTERN void | IfxGpt12_IncrEnc_resetFaults (IfxGpt12_IncrEnc *driver)
IFX_EXTERN void | IfxGpt12_IncrEnc_setOffset (IfxGpt12_IncrEnc *driver, sint32 offset)
IFX_EXTERN void | IfxGpt12_IncrEnc_setRefreshPeriod (IfxGpt12_IncrEnc *driver, float32 updatePeriod)
IFX_EXTERN void | IfxGpt12_IncrEnc_update (IfxGpt12_IncrEnc *driver)

Detailed Description

Function Documentation

◆ IfxGpt12_IncrEnc_getAbsolutePosition()

IFX_EXTERN float32 IfxGpt12_IncrEnc_getAbsolutePosition ( IfxGpt12_IncrEnc * driver )
See also
IfxStdIf_Pos_GetAbsolutePosition
Parameters
driver driver handle
Returns
absolute position

Definition at line 84 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_stdIfPosInit().

◆ IfxGpt12_IncrEnc_getDirection()

IFX_EXTERN IfxStdIf_Pos_Dir IfxGpt12_IncrEnc_getDirection ( IfxGpt12_IncrEnc * driver )
See also
IfxStdIf_Pos_GetDirection
Parameters
driver driver handle
Returns
direction

Definition at line 90 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_stdIfPosInit().

◆ IfxGpt12_IncrEnc_getFault()

IFX_EXTERN IfxStdIf_Pos_Status IfxGpt12_IncrEnc_getFault ( IfxGpt12_IncrEnc * driver )
See also
IfxStdIf_Pos_GetFault
Parameters
driver driver handle
Returns
Fault

Definition at line 96 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_stdIfPosInit().

◆ IfxGpt12_IncrEnc_getOffset()

IFX_EXTERN sint32 IfxGpt12_IncrEnc_getOffset ( IfxGpt12_IncrEnc * driver )
See also
IfxStdIf_Pos_GetOffset
Parameters
driver driver handle
Returns
offset address

Definition at line 102 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_stdIfPosInit().

◆ IfxGpt12_IncrEnc_getPeriodPerRotation()

IFX_EXTERN uint16 IfxGpt12_IncrEnc_getPeriodPerRotation ( IfxGpt12_IncrEnc * driver )
See also
IfxStdIf_Pos_GetPeriodPerRotation
Parameters
driver driver handle
Returns
Period per rotation

Definition at line 108 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_stdIfPosInit().

◆ IfxGpt12_IncrEnc_getPosition()

IFX_EXTERN float32 IfxGpt12_IncrEnc_getPosition ( IfxGpt12_IncrEnc * driver )
See also
IfxStdIf_Pos_GetPosition
Parameters
driver driver handle
Returns
position

Definition at line 115 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_stdIfPosInit().

◆ IfxGpt12_IncrEnc_getRawPosition()

IFX_EXTERN sint32 IfxGpt12_IncrEnc_getRawPosition ( IfxGpt12_IncrEnc * driver )
See also
IfxStdIf_Pos_GetRawPosition
Parameters
driver driver handle
Returns
position in ticks

Definition at line 121 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_stdIfPosInit().

◆ IfxGpt12_IncrEnc_getRefreshPeriod()

IFX_EXTERN float32 IfxGpt12_IncrEnc_getRefreshPeriod ( IfxGpt12_IncrEnc * driver )
See also
IfxStdIf_Pos_GetRefreshPeriod
Parameters
driver driver handle
Returns
update period

Definition at line 127 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_stdIfPosInit().

◆ IfxGpt12_IncrEnc_getResolution()

IFX_EXTERN sint32 IfxGpt12_IncrEnc_getResolution ( IfxGpt12_IncrEnc * driver )
See also
IfxStdIf_Pos_GetResolution
Parameters
driver driver handle
Returns
resolution

Definition at line 133 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_stdIfPosInit().

◆ IfxGpt12_IncrEnc_getSensorType()

IFX_EXTERN IfxStdIf_Pos_SensorType IfxGpt12_IncrEnc_getSensorType ( IfxGpt12_IncrEnc * driver )
See also
IfxStdIf_Pos_GetSensorType
Parameters
driver driver handle
Returns
sensor type

Definition at line 139 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_stdIfPosInit().

◆ IfxGpt12_IncrEnc_getSpeed()

IFX_EXTERN float32 IfxGpt12_IncrEnc_getSpeed ( IfxGpt12_IncrEnc * driver )
See also
IfxStdIf_Pos_GetSpeed
Parameters
driver driver handle
Returns
speed

Definition at line 146 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_stdIfPosInit().

◆ IfxGpt12_IncrEnc_getTurn()

IFX_EXTERN sint32 IfxGpt12_IncrEnc_getTurn ( IfxGpt12_IncrEnc * driver )
See also
IfxStdIf_Pos_GetTurn
Parameters
driver driver handle
Returns
the number of turns

Definition at line 152 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_stdIfPosInit().

◆ IfxGpt12_IncrEnc_onZeroIrq()

IFX_EXTERN void IfxGpt12_IncrEnc_onZeroIrq ( IfxGpt12_IncrEnc * driver )
See also
IfxStdIf_Pos_OnZeroIrq
Parameters
driver driver handle
Returns
None

Definition at line 314 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_stdIfPosInit().

◆ IfxGpt12_IncrEnc_reset()

IFX_EXTERN void IfxGpt12_IncrEnc_reset ( IfxGpt12_IncrEnc * driver )
See also
IfxStdIf_Pos_Reset
Parameters
driver driver handle
Returns
None

Definition at line 332 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_stdIfPosInit().

◆ IfxGpt12_IncrEnc_resetFaults()

IFX_EXTERN void IfxGpt12_IncrEnc_resetFaults ( IfxGpt12_IncrEnc * driver )
See also
IfxStdIf_Pos_ResetFaults
Parameters
driver driver handle
Returns
None

Definition at line 342 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_stdIfPosInit().

◆ IfxGpt12_IncrEnc_setOffset()

IFX_EXTERN void IfxGpt12_IncrEnc_setOffset | ( | IfxGpt12_IncrEnc * | driver,
 |  | sint32 | offset
 | ) |  |
See also
IfxStdIf_Pos_SetOffset
Parameters
driver | driver handle
offset | offset address
Returns
None

Definition at line 351 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_stdIfPosInit().

◆ IfxGpt12_IncrEnc_setRefreshPeriod()

IFX_EXTERN void IfxGpt12_IncrEnc_setRefreshPeriod | ( | IfxGpt12_IncrEnc * | driver,
 |  | float32 | updatePeriod
 | ) |  |
See also
IfxStdIf_Pos_SetRefreshPeriod
Parameters
driver | driver handle
updatePeriod | update period
Returns
None

Definition at line 358 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_init(), and IfxGpt12_IncrEnc_stdIfPosInit().

◆ IfxGpt12_IncrEnc_update()

IFX_EXTERN void IfxGpt12_IncrEnc_update ( IfxGpt12_IncrEnc * driver )
See also
IfxStdIf_Pos_Update
Parameters
driver driver handle
Returns
None

Definition at line 400 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_stdIfPosInit().


iLLD_TC38A: IfxGpt12_cfg.h File Reference

  • _Impl
Macros
IfxGpt12_cfg.h File Reference
iLLD » GPT12

GPT12 on-chip implementation data. More...

Go to the source code of this file.

Macros

#define IFXGPT12_NUM_MODULES (1)

Detailed Description

GPT12 on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGpt12_cfg.h.

Macro Definition Documentation

◆ IFXGPT12_NUM_MODULES

#define IFXGPT12_NUM_MODULES (1)

Definition at line 60 of file IfxGpt12_cfg.h.


iLLD_TC38A: IfxGpt12_PinMap.c File Reference

  • _PinMap
Variables
IfxGpt12_PinMap.c File Reference
iLLD » GPT12

GPT12 I/O map. More...

#include "IfxGpt12_PinMap.h"
Include dependency graph for IfxGpt12_PinMap.c:

Go to the source code of this file.

Variables

IfxGpt12_Capin_In | IfxGpt120_CAPINA_P13_2_IN = {&MODULE_GPT120, {&MODULE_P13, 2}, Ifx_RxSel_a}
IfxGpt12_TxEud_In | IfxGpt120_T2EUDA_P00_8_IN = {&MODULE_GPT120, 2, {&MODULE_P00, 8}, Ifx_RxSel_a}
IfxGpt12_TxEud_In | IfxGpt120_T2EUDB_P33_6_IN = {&MODULE_GPT120, 2, {&MODULE_P33, 6}, Ifx_RxSel_b}
IfxGpt12_TxEud_In | IfxGpt120_T3EUDA_P02_7_IN = {&MODULE_GPT120, 3, {&MODULE_P02, 7}, Ifx_RxSel_a}
IfxGpt12_TxEud_In | IfxGpt120_T3EUDB_P10_7_IN = {&MODULE_GPT120, 3, {&MODULE_P10, 7}, Ifx_RxSel_b}
IfxGpt12_TxEud_In | IfxGpt120_T4EUDA_P00_9_IN = {&MODULE_GPT120, 4, {&MODULE_P00, 9}, Ifx_RxSel_a}
IfxGpt12_TxEud_In | IfxGpt120_T4EUDB_P33_5_IN = {&MODULE_GPT120, 4, {&MODULE_P33, 5}, Ifx_RxSel_b}
IfxGpt12_TxEud_In | IfxGpt120_T5EUDA_P21_6_IN = {&MODULE_GPT120, 5, {&MODULE_P21, 6}, Ifx_RxSel_a}
IfxGpt12_TxEud_In | IfxGpt120_T5EUDB_P10_1_IN = {&MODULE_GPT120, 5, {&MODULE_P10, 1}, Ifx_RxSel_b}
IfxGpt12_TxEud_In | IfxGpt120_T6EUDA_P20_0_IN = {&MODULE_GPT120, 6, {&MODULE_P20, 0}, Ifx_RxSel_a}
IfxGpt12_TxEud_In | IfxGpt120_T6EUDB_P10_0_IN = {&MODULE_GPT120, 6, {&MODULE_P10, 0}, Ifx_RxSel_b}
IfxGpt12_TxIn_In | IfxGpt120_T2INA_P00_7_IN = {&MODULE_GPT120, 2, {&MODULE_P00, 7}, Ifx_RxSel_a}
IfxGpt12_TxIn_In | IfxGpt120_T2INB_P33_7_IN = {&MODULE_GPT120, 2, {&MODULE_P33, 7}, Ifx_RxSel_b}
IfxGpt12_TxIn_In | IfxGpt120_T3INA_P02_6_IN = {&MODULE_GPT120, 3, {&MODULE_P02, 6}, Ifx_RxSel_a}
IfxGpt12_TxIn_In | IfxGpt120_T3INB_P10_4_IN = {&MODULE_GPT120, 3, {&MODULE_P10, 4}, Ifx_RxSel_b}
IfxGpt12_TxIn_In | IfxGpt120_T4INA_P02_8_IN = {&MODULE_GPT120, 4, {&MODULE_P02, 8}, Ifx_RxSel_a}
IfxGpt12_TxIn_In | IfxGpt120_T4INB_P10_8_IN = {&MODULE_GPT120, 4, {&MODULE_P10, 8}, Ifx_RxSel_b}
IfxGpt12_TxIn_In | IfxGpt120_T5INA_P21_7_IN = {&MODULE_GPT120, 5, {&MODULE_P21, 7}, Ifx_RxSel_a}
IfxGpt12_TxIn_In | IfxGpt120_T5INB_P10_3_IN = {&MODULE_GPT120, 5, {&MODULE_P10, 3}, Ifx_RxSel_b}
IfxGpt12_TxIn_In | IfxGpt120_T6INA_P20_3_IN = {&MODULE_GPT120, 6, {&MODULE_P20, 3}, Ifx_RxSel_a}
IfxGpt12_TxIn_In | IfxGpt120_T6INB_P10_2_IN = {&MODULE_GPT120, 6, {&MODULE_P10, 2}, Ifx_RxSel_b}
IfxGpt12_TxOut_Out | IfxGpt120_T3OUT_P10_6_OUT = {&MODULE_GPT120, 3, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt4}
IfxGpt12_TxOut_Out | IfxGpt120_T3OUT_P21_6_OUT = {&MODULE_GPT120, 3, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt7}
IfxGpt12_TxOut_Out | IfxGpt120_T6OUT_P10_5_OUT = {&MODULE_GPT120, 6, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt5}
IfxGpt12_TxOut_Out | IfxGpt120_T6OUT_P21_7_OUT = {&MODULE_GPT120, 6, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt7}
const IfxGpt12_Capin_In * | IfxGpt12_Capin_In_pinTable [IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS]
const IfxGpt12_TxEud_In * | IfxGpt12_TxEud_In_pinTable [IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS]
const IfxGpt12_TxIn_In * | IfxGpt12_TxIn_In_pinTable [IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS]
const IfxGpt12_TxOut_Out * | IfxGpt12_TxOut_Out_pinTable [IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS]

Detailed Description

GPT12 I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGpt12_PinMap.c.

Variable Documentation

◆ IfxGpt120_CAPINA_P13_2_IN

IfxGpt12_Capin_In IfxGpt120_CAPINA_P13_2_IN = {&MODULE_GPT120, {&MODULE_P13, 2}, Ifx_RxSel_a}

Definition at line 45 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T2EUDA_P00_8_IN

IfxGpt12_TxEud_In IfxGpt120_T2EUDA_P00_8_IN = {&MODULE_GPT120, 2, {&MODULE_P00, 8}, Ifx_RxSel_a}

Definition at line 46 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T2EUDB_P33_6_IN

IfxGpt12_TxEud_In IfxGpt120_T2EUDB_P33_6_IN = {&MODULE_GPT120, 2, {&MODULE_P33, 6}, Ifx_RxSel_b}

Definition at line 47 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T2INA_P00_7_IN

IfxGpt12_TxIn_In IfxGpt120_T2INA_P00_7_IN = {&MODULE_GPT120, 2, {&MODULE_P00, 7}, Ifx_RxSel_a}

Definition at line 56 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T2INB_P33_7_IN

IfxGpt12_TxIn_In IfxGpt120_T2INB_P33_7_IN = {&MODULE_GPT120, 2, {&MODULE_P33, 7}, Ifx_RxSel_b}

Definition at line 57 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T3EUDA_P02_7_IN

IfxGpt12_TxEud_In IfxGpt120_T3EUDA_P02_7_IN = {&MODULE_GPT120, 3, {&MODULE_P02, 7}, Ifx_RxSel_a}

Definition at line 48 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T3EUDB_P10_7_IN

IfxGpt12_TxEud_In IfxGpt120_T3EUDB_P10_7_IN = {&MODULE_GPT120, 3, {&MODULE_P10, 7}, Ifx_RxSel_b}

Definition at line 49 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T3INA_P02_6_IN

IfxGpt12_TxIn_In IfxGpt120_T3INA_P02_6_IN = {&MODULE_GPT120, 3, {&MODULE_P02, 6}, Ifx_RxSel_a}

Definition at line 58 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T3INB_P10_4_IN

IfxGpt12_TxIn_In IfxGpt120_T3INB_P10_4_IN = {&MODULE_GPT120, 3, {&MODULE_P10, 4}, Ifx_RxSel_b}

Definition at line 59 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T3OUT_P10_6_OUT

IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P10_6_OUT = {&MODULE_GPT120, 3, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt4}

Definition at line 66 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T3OUT_P21_6_OUT

IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P21_6_OUT = {&MODULE_GPT120, 3, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt7}

Definition at line 67 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T4EUDA_P00_9_IN

IfxGpt12_TxEud_In IfxGpt120_T4EUDA_P00_9_IN = {&MODULE_GPT120, 4, {&MODULE_P00, 9}, Ifx_RxSel_a}

Definition at line 50 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T4EUDB_P33_5_IN

IfxGpt12_TxEud_In IfxGpt120_T4EUDB_P33_5_IN = {&MODULE_GPT120, 4, {&MODULE_P33, 5}, Ifx_RxSel_b}

Definition at line 51 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T4INA_P02_8_IN

IfxGpt12_TxIn_In IfxGpt120_T4INA_P02_8_IN = {&MODULE_GPT120, 4, {&MODULE_P02, 8}, Ifx_RxSel_a}

Definition at line 60 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T4INB_P10_8_IN

IfxGpt12_TxIn_In IfxGpt120_T4INB_P10_8_IN = {&MODULE_GPT120, 4, {&MODULE_P10, 8}, Ifx_RxSel_b}

Definition at line 61 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T5EUDA_P21_6_IN

IfxGpt12_TxEud_In IfxGpt120_T5EUDA_P21_6_IN = {&MODULE_GPT120, 5, {&MODULE_P21, 6}, Ifx_RxSel_a}

Definition at line 52 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T5EUDB_P10_1_IN

IfxGpt12_TxEud_In IfxGpt120_T5EUDB_P10_1_IN = {&MODULE_GPT120, 5, {&MODULE_P10, 1}, Ifx_RxSel_b}

Definition at line 53 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T5INA_P21_7_IN

IfxGpt12_TxIn_In IfxGpt120_T5INA_P21_7_IN = {&MODULE_GPT120, 5, {&MODULE_P21, 7}, Ifx_RxSel_a}

Definition at line 62 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T5INB_P10_3_IN

IfxGpt12_TxIn_In IfxGpt120_T5INB_P10_3_IN = {&MODULE_GPT120, 5, {&MODULE_P10, 3}, Ifx_RxSel_b}

Definition at line 63 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T6EUDA_P20_0_IN

IfxGpt12_TxEud_In IfxGpt120_T6EUDA_P20_0_IN = {&MODULE_GPT120, 6, {&MODULE_P20, 0}, Ifx_RxSel_a}

Definition at line 54 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T6EUDB_P10_0_IN

IfxGpt12_TxEud_In IfxGpt120_T6EUDB_P10_0_IN = {&MODULE_GPT120, 6, {&MODULE_P10, 0}, Ifx_RxSel_b}

Definition at line 55 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T6INA_P20_3_IN

IfxGpt12_TxIn_In IfxGpt120_T6INA_P20_3_IN = {&MODULE_GPT120, 6, {&MODULE_P20, 3}, Ifx_RxSel_a}

Definition at line 64 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T6INB_P10_2_IN

IfxGpt12_TxIn_In IfxGpt120_T6INB_P10_2_IN = {&MODULE_GPT120, 6, {&MODULE_P10, 2}, Ifx_RxSel_b}

Definition at line 65 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T6OUT_P10_5_OUT

IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P10_5_OUT = {&MODULE_GPT120, 6, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt5}

Definition at line 68 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T6OUT_P21_7_OUT

IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P21_7_OUT = {&MODULE_GPT120, 6, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt7}

Definition at line 69 of file IfxGpt12_PinMap.c.

◆ IfxGpt12_Capin_In_pinTable

const IfxGpt12_Capin_In* IfxGpt12_Capin_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxGpt120_CAPINA_P13_2_IN
}
}
IfxGpt120_CAPINA_P13_2_IN
IfxGpt12_Capin_In IfxGpt120_CAPINA_P13_2_IN
Definition: IfxGpt12_PinMap.c:45

Definition at line 72 of file IfxGpt12_PinMap.c.

◆ IfxGpt12_TxEud_In_pinTable

const IfxGpt12_TxEud_In* IfxGpt12_TxEud_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS]

Definition at line 78 of file IfxGpt12_PinMap.c.

◆ IfxGpt12_TxIn_In_pinTable

const IfxGpt12_TxIn_In* IfxGpt12_TxIn_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS]

Definition at line 111 of file IfxGpt12_PinMap.c.

◆ IfxGpt12_TxOut_Out_pinTable

const IfxGpt12_TxOut_Out* IfxGpt12_TxOut_Out_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS]

Definition at line 144 of file IfxGpt12_PinMap.c.


iLLD_TC38A: IfxGpt12_PinMap.h File Reference

  • _PinMap
Data Structures | Macros | Variables
IfxGpt12_PinMap.h File Reference
iLLD » GPT12

GPT12 I/O map. More...

#include <IfxGpt12_reg.h>
#include <_Impl/IfxGpt12_cfg.h>
#include <Port/Std/IfxPort.h>
Include dependency graph for IfxGpt12_PinMap.h:

Go to the source code of this file.

Data Structures

struct | IfxGpt12_Capin_In
CAPIN pin mapping structure. More...
struct | IfxGpt12_TxEud_In
TxEUD pin mapping structure. More...
struct | IfxGpt12_TxIn_In
TxIN pin mapping structure. More...
struct | IfxGpt12_TxOut_Out
TxOUT pin mapping structure. More...

Macros

#define | IFXGPT12_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXGPT12_PINMAP_NUM_TIMERS 7
#define | IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS 1
#define | IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS 2
#define | IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS 2
#define | IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS 2

Variables

IFX_EXTERN IfxGpt12_Capin_In IfxGpt120_CAPINA_P13_2_IN
Trigger input to capture value of timer T5 into CAPREL register. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T2EUDA_P00_8_IN
Count direction control input of timer T2. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T2EUDB_P33_6_IN
Count direction control input of timer T2. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T3EUDA_P02_7_IN
Count direction control input of core timer T3. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T3EUDB_P10_7_IN
Count direction control input of core timer T3. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T4EUDA_P00_9_IN
Count direction control input of timer T4. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T4EUDB_P33_5_IN
Count direction control input of timer T4. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T5EUDA_P21_6_IN
Count direction control input of timer T5. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T5EUDB_P10_1_IN
Count direction control input of timer T5. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T6EUDA_P20_0_IN
Count direction control input of core timer T6. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T6EUDB_P10_0_IN
Count direction control input of core timer T6. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T2INA_P00_7_IN
Trigger/gate input of timer T2. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T2INB_P33_7_IN
Trigger/gate input of timer T2. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T3INA_P02_6_IN
Trigger/gate input of core timer T3. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T3INB_P10_4_IN
Trigger/gate input of core timer T3. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T4INA_P02_8_IN
Trigger/gate input of timer T4. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T4INB_P10_8_IN
Trigger/gate input of timer T4. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T5INA_P21_7_IN
Trigger/gate input of timer T5. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T5INB_P10_3_IN
Trigger/gate input of timer T5. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T6INA_P20_3_IN
Trigger/gate input of core timer T6. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T6INB_P10_2_IN
Trigger/gate input of core timer T6. More...
IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P10_6_OUT
External output for overflow/underflow detection of core timer T3. More...
IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P21_6_OUT
External output for overflow/underflow detection of core timer T3. More...
IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P10_5_OUT
External output for overflow/underflow detection of core timer T6. More...
IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P21_7_OUT
External output for overflow/underflow detection of core timer T6. More...
IFX_EXTERN const IfxGpt12_Capin_In * | IfxGpt12_Capin_In_pinTable [IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS]
IfxGpt12_Capin_In table. More...
IFX_EXTERN const IfxGpt12_TxEud_In * | IfxGpt12_TxEud_In_pinTable [IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS]
IfxGpt12_TxEud_In table. More...
IFX_EXTERN const IfxGpt12_TxIn_In * | IfxGpt12_TxIn_In_pinTable [IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS]
IfxGpt12_TxIn_In table. More...
IFX_EXTERN const IfxGpt12_TxOut_Out * | IfxGpt12_TxOut_Out_pinTable [IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS]
IfxGpt12_TxOut_Out table. More...

Detailed Description

GPT12 I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGpt12_PinMap.h.


iLLD_TC38A: IfxGpt12_IncrEnc.h File Reference

  • Gpt12
  • IncrEnc
Data Structures | Typedefs | Functions
IfxGpt12_IncrEnc.h File Reference
iLLD » GPT12

GPT12 INCRENC details. More...

#include "StdIf/IfxStdIf_Pos.h"
#include "Gpt12/Std/IfxGpt12.h"
#include "string.h"
Include dependency graph for IfxGpt12_IncrEnc.h:

Go to the source code of this file.

Data Structures

struct | IfxGpt12_IncrEnc
Incremental encoder object. More...
struct | IfxGpt12_IncrEnc_Config
Configuration structure for GPT12. More...

Typedefs

typedef IfxStdIf_Pos_Update IfxGpt12_IncrEnc_Update

Functions

IFX_EXTERN boolean | IfxGpt12_IncrEnc_init (IfxGpt12_IncrEnc *driver, const IfxGpt12_IncrEnc_Config *config)
Initialises the Incremental interface. More...
IFX_EXTERN void | IfxGpt12_IncrEnc_initConfig (IfxGpt12_IncrEnc_Config *config, Ifx_GPT12 *gpt12)
Initializes the configuration structure to default. More...
IFX_EXTERN float32 | IfxGpt12_IncrEnc_getAbsolutePosition (IfxGpt12_IncrEnc *driver)
IFX_EXTERN IfxStdIf_Pos_Dir | IfxGpt12_IncrEnc_getDirection (IfxGpt12_IncrEnc *driver)
IFX_EXTERN IfxStdIf_Pos_Status | IfxGpt12_IncrEnc_getFault (IfxGpt12_IncrEnc *driver)
IFX_EXTERN sint32 | IfxGpt12_IncrEnc_getOffset (IfxGpt12_IncrEnc *driver)
IFX_EXTERN uint16 | IfxGpt12_IncrEnc_getPeriodPerRotation (IfxGpt12_IncrEnc *driver)
IFX_EXTERN float32 | IfxGpt12_IncrEnc_getPosition (IfxGpt12_IncrEnc *driver)
IFX_EXTERN sint32 | IfxGpt12_IncrEnc_getRawPosition (IfxGpt12_IncrEnc *driver)
IFX_EXTERN float32 | IfxGpt12_IncrEnc_getRefreshPeriod (IfxGpt12_IncrEnc *driver)
IFX_EXTERN sint32 | IfxGpt12_IncrEnc_getResolution (IfxGpt12_IncrEnc *driver)
IFX_EXTERN IfxStdIf_Pos_SensorType | IfxGpt12_IncrEnc_getSensorType (IfxGpt12_IncrEnc *driver)
IFX_EXTERN float32 | IfxGpt12_IncrEnc_getSpeed (IfxGpt12_IncrEnc *driver)
IFX_EXTERN sint32 | IfxGpt12_IncrEnc_getTurn (IfxGpt12_IncrEnc *driver)
IFX_EXTERN void | IfxGpt12_IncrEnc_onZeroIrq (IfxGpt12_IncrEnc *driver)
IFX_EXTERN void | IfxGpt12_IncrEnc_reset (IfxGpt12_IncrEnc *driver)
IFX_EXTERN void | IfxGpt12_IncrEnc_resetFaults (IfxGpt12_IncrEnc *driver)
IFX_EXTERN void | IfxGpt12_IncrEnc_setOffset (IfxGpt12_IncrEnc *driver, sint32 offset)
IFX_EXTERN void | IfxGpt12_IncrEnc_setRefreshPeriod (IfxGpt12_IncrEnc *driver, float32 updatePeriod)
IFX_EXTERN void | IfxGpt12_IncrEnc_update (IfxGpt12_IncrEnc *driver)
IFX_EXTERN boolean | IfxGpt12_IncrEnc_stdIfPosInit (IfxStdIf_Pos *stdif, IfxGpt12_IncrEnc *driver)
Initializes the standard interface "Pos". More...

Detailed Description

GPT12 INCRENC details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGpt12_IncrEnc.h.

Typedef Documentation

◆ IfxGpt12_IncrEnc_Update

typedef IfxStdIf_Pos_Update IfxGpt12_IncrEnc_Update

Definition at line 199 of file IfxGpt12_IncrEnc.h.

Function Documentation

◆ IfxGpt12_IncrEnc_stdIfPosInit()

IFX_EXTERN boolean IfxGpt12_IncrEnc_stdIfPosInit | ( | IfxStdIf_Pos * | stdif,
 |  | IfxGpt12_IncrEnc * | driver
 | ) |  |

Initializes the standard interface "Pos".

Parameters
stdif | Standard interface position object
driver | incremental encoder interface Handle
Returns
TRUE on success else FALSE

Definition at line 366 of file IfxGpt12_IncrEnc.c.


iLLD_TC38A: IfxGpt12.h File Reference

  • Gpt12
  • Std
Enumerations | Functions
IfxGpt12.h File Reference
iLLD » GPT12

GPT12 basic functionality. More...

#include "_Impl/IfxGpt12_cfg.h"
#include "Src/Std/IfxSrc.h"
#include "_Utilities/Ifx_Assert.h"
#include "Scu/Std/IfxScuCcu.h"
#include "IfxGpt12_reg.h"
#include "_PinMap/IfxGpt12_PinMap.h"
Include dependency graph for IfxGpt12.h:

Go to the source code of this file.

Enumerations

enum IfxGpt12_CaptureInput {
IfxGpt12_CaptureInput_A = 0,
IfxGpt12_CaptureInput_B = 1,
IfxGpt12_CaptureInput_C = 2,
IfxGpt12_CaptureInput_D = 3
}
Input Select for CAPIN
Definition in IfxGPT12.PISEL.B.ISCAPIN. More...
enum IfxGpt12_CaptureInputMode {
IfxGpt12_CaptureInputMode_none = 0,
IfxGpt12_CaptureInputMode_risingEdgeTxIN = 1,
IfxGpt12_CaptureInputMode_fallingEdgeTxIN = 2,
IfxGpt12_CaptureInputMode_bothEdgesTxIN = 3
}
Tx Input Edge Selection (Capture Mode, x=2,4) More...
enum IfxGpt12_CaptureTrigger {
IfxGpt12_CaptureTrigger_capin = 0,
IfxGpt12_CaptureTrigger_t3inOrT3EUD = 1
}
Capture Trigger Enable
Definition in IfxGPT12.T5CON.B.CT3. More...
enum IfxGpt12_CaptureTriggerMode {
IfxGpt12_CaptureTriggerMode_disabled = 0,
IfxGpt12_CaptureTriggerMode_risingEdge = 1,
IfxGpt12_CaptureTriggerMode_fallingEdge = 2,
IfxGpt12_CaptureTriggerMode_randomEdge = 3
}
Capture Trigger Selection
Definition in IfxGPT12.T5CON.B.CI. More...
enum IfxGpt12_CounterInputMode {
IfxGpt12_CounterInputMode_counterDisabled = 0,
IfxGpt12_CounterInputMode_risingEdgeTxIN = 1,
IfxGpt12_CounterInputMode_fallingEdgeTxIN = 2,
IfxGpt12_CounterInputMode_bothEdgesTxIN = 3,
IfxGpt12_CounterInputMode_risingEdgeTxOTL = 5,
IfxGpt12_CounterInputMode_fallingEdgeTxOTL = 6,
IfxGpt12_CounterInputMode_bothEdgesTxOTL = 7
}
Input Edge Selection for counter mode
Definition in IfxGPT12.TxCON.B.TxI (x = 2 to 6) More...
enum IfxGpt12_EudInput {
IfxGpt12_EudInput_A = 0,
IfxGpt12_EudInput_B = 1,
IfxGpt12_EudInput_C = 2,
IfxGpt12_EudInput_D = 3
}
Input Select for TxEUD
Definition in IfxGPT12.PISEL.B.ISTxEUD (x = 2 to 4) More...
enum IfxGpt12_Gpt1BlockPrescaler {
IfxGpt12_Gpt1BlockPrescaler_8 = 0,
IfxGpt12_Gpt1BlockPrescaler_4 = 1,
IfxGpt12_Gpt1BlockPrescaler_32 = 2,
IfxGpt12_Gpt1BlockPrescaler_16 = 3
}
GPT1 block prescaler Selection
Definition in IfxGPT12.T3CON.B.BPS1. More...
enum IfxGpt12_Gpt2BlockPrescaler {
IfxGpt12_Gpt2BlockPrescaler_4 = 0,
IfxGpt12_Gpt2BlockPrescaler_2 = 1,
IfxGpt12_Gpt2BlockPrescaler_16 = 2,
IfxGpt12_Gpt2BlockPrescaler_8 = 3
}
Gpt2 block prescaler Selection
Definition in IfxGPT12.T6CON.B.BPS2. More...
enum IfxGpt12_IncrementalInterfaceInputMode {
IfxGpt12_IncrementalInterfaceInputMode_stopCounterTx = 0,
IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxIN = 1,
IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxEUD = 2,
IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxINOrTxEUD = 3
}
Input Edge Selection for Incremental Interface mode
Definition in IfxGPT12.TxCON.B.TxI (x=2, 3 and 4) More...
enum IfxGpt12_Input {
IfxGpt12_Input_A = 0,
IfxGpt12_Input_B = 1,
IfxGpt12_Input_C = 2,
IfxGpt12_Input_D = 3
}
Input Select for TxIN
Definition in IfxGPT12.PISEL.B.ISTxIN (x = 2 to 4) More...
enum IfxGpt12_Mode {
IfxGpt12_Mode_timer = 0,
IfxGpt12_Mode_counter = 1,
IfxGpt12_Mode_lowGatedTimer = 2,
IfxGpt12_Mode_highGatedTimer = 3,
IfxGpt12_Mode_reload = 4,
IfxGpt12_Mode_capture = 5,
IfxGpt12_Mode_incrementalInterfaceRotationDetection = 6,
IfxGpt12_Mode_incrementalInterfaceEdgeDetection = 7
}
Timer operating mode
Definition in IfxGPT12.TxCON.B.TxM (x = 2 to 4) More...
enum IfxGpt12_ReloadInputMode {
IfxGpt12_ReloadInputMode_counterDisabled = 0,
IfxGpt12_ReloadInputMode_risingEdgeTxIN = 1,
IfxGpt12_ReloadInputMode_fallingEdgeTxIN = 2,
IfxGpt12_ReloadInputMode_bothEdgesTxIN = 3,
IfxGpt12_ReloadInputMode_risingEdgeTxOTL = 5,
IfxGpt12_ReloadInputMode_fallingEdgeTxOTL = 6,
IfxGpt12_ReloadInputMode_bothEdgesTxOTL = 7
}
Input Edge Selection for reload mode
Definition in IfxGPT12.TxCON.B.TxI (x = 2 and 4) More...
enum IfxGpt12_SleepMode {
IfxGpt12_SleepMode_enable = 0,
IfxGpt12_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_GPT12.CLC.B.EDIS. More...
enum IfxGpt12_SuspendMode {
IfxGpt12_SuspendMode_none = 0,
IfxGpt12_SuspendMode_hard = 1,
IfxGpt12_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxGpt12_TimerDirection {
IfxGpt12_TimerDirection_up = 0,
IfxGpt12_TimerDirection_down = 1
}
Timer Count Direction
Definition in IfxGPT12.TxCON.B.TxUD (x=2 to 6) More...
enum IfxGpt12_TimerDirectionSource {
IfxGpt12_TimerDirectionSource_internal = 0,
IfxGpt12_TimerDirectionSource_external = 1
}
Timer count direction control source
Definition in IfxGPT12.TxCON.B.TxUDE (x=2 to 6) More...
enum IfxGpt12_TimerInputPrescaler {
IfxGpt12_TimerInputPrescaler_1 = 0,
IfxGpt12_TimerInputPrescaler_2 = 1,
IfxGpt12_TimerInputPrescaler_4 = 2,
IfxGpt12_TimerInputPrescaler_8 = 3,
IfxGpt12_TimerInputPrescaler_16 = 4,
IfxGpt12_TimerInputPrescaler_32 = 5,
IfxGpt12_TimerInputPrescaler_64 = 6,
IfxGpt12_TimerInputPrescaler_128 = 7
}
Input prescaler Selection for the timer
Definition in IfxGPT12.TxCON.B.TxI (x = 2 to 4) More...
enum IfxGpt12_TimerReloadMode {
IfxGpt12_TimerReloadMode_disable,
IfxGpt12_TimerReloadMode_enable
}
Timer Reload Mode
Definition in IfxGPT12.T6CON.B.T6SR. More...
enum IfxGpt12_TimerRemoteControl {
IfxGpt12_TimerRemoteControl_off = 0,
IfxGpt12_TimerRemoteControl_on = 1
}
Timer Remote Control enable choice
Definition in IfxGPT12.TxCON.B.TxRC (x = 2 and 4) More...
enum IfxGpt12_TimerRun {
IfxGpt12_TimerRun_stop = 0,
IfxGpt12_TimerRun_start = 1
}
Timer Run / stop control choice (only if TxCON.B.TxRC = 0)
Definition in IfxGPT12.TxCON.B.TxR (x = 2 to 6) More...

Functions

IFX_INLINE volatile Ifx_SRC_SRCR * | IfxGpt12_T2_getSrc (Ifx_GPT12 *gpt12)
Returns the address of Timer 2 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxGpt12_T3_getSrc (Ifx_GPT12 *gpt12)
Returns the address of Timer 3 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxGpt12_T4_getSrc (Ifx_GPT12 *gpt12)
Returns the address of Timer 4 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxGpt12_T5_getSrc (Ifx_GPT12 *gpt12)
Returns the address of Timer 5 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxGpt12_T6_getSrc (Ifx_GPT12 *gpt12)
Returns the address of Timer 6 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxGpt12_getCaptureSrc (Ifx_GPT12 *gpt12)
Returns the address of capture service request. More...
IFX_INLINE void | IfxGpt12_T2_setCaptureInputMode (Ifx_GPT12 *gpt12, IfxGpt12_CaptureInputMode inputMode)
Sets the input edge selection for the capture mode of the T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setCounterInputMode (Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
Sets the input edge selection for the counter mode of the T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setDirectionSource (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
Sets the T2 timer count direction source internal / external. More...
IFX_INLINE void | IfxGpt12_T2_setEudInput (Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setIncrementalInterfaceInputMode (Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode)
Sets the input edge selection for the incremental interface mode of the T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setInput (Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setInterruptEnable (Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the interrupt generation of the T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setMode (Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setReloadInputMode (Ifx_GPT12 *gpt12, IfxGpt12_ReloadInputMode inputMode)
Sets the input edge selection for the reload mode of the T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setRemoteControl (Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control)
Sets the remote control of the T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setTimerDirection (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
Sets the T2 timer count direction. More...
IFX_INLINE void | IfxGpt12_T2_setTimerPrescaler (Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
Sets the input prescaler for the Timer mode and Gated timer mode of T2 timer. More...
IFX_INLINE void | IfxGpt12_T3_enableOutput (Ifx_GPT12 *gpt12, boolean enable)
Enable / Disable the T3 Output on pin T3OUT. More...
IFX_INLINE void | IfxGpt12_T3_setCounterInputMode (Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
Sets the input edge selection for the counter mode of the T3 timer. More...
IFX_INLINE void | IfxGpt12_T3_setDirectionSource (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
Sets the T3 timer count direction source internal / external. More...
IFX_INLINE void | IfxGpt12_T3_setEudInput (Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T3 timer. More...
IFX_INLINE void | IfxGpt12_T3_setIncrementalInterfaceInputMode (Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode)
Sets the input edge selection for the incremental interface mode of the T3 timer. More...
IFX_INLINE void | IfxGpt12_T3_setInput (Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T3 timer. More...
IFX_INLINE void | IfxGpt12_T3_setMode (Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T3 timer. More...
IFX_INLINE void | IfxGpt12_T3_setTimerDirection (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
Sets the T3 timer count direction. More...
IFX_INLINE void | IfxGpt12_T3_setTimerPrescaler (Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
Sets the input prescaler for the Timer mode and Gated timer mode of T3 timer. More...
IFX_INLINE void | IfxGpt12_T4_enableClearTimerT2 (Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the clear timer T2 bit of the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_enableClearTimerT3 (Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the clear timer T3 bit of the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setCaptureInputMode (Ifx_GPT12 *gpt12, IfxGpt12_CaptureInputMode inputMode)
Sets the input edge selection for the capture mode of the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setCounterInputMode (Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
Sets the input edge selection for the counter mode of the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setDirectionSource (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
Sets the T4 timer count direction source internal / external. More...
IFX_INLINE void | IfxGpt12_T4_setEudInput (Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setIncrementalInterfaceInputMode (Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode)
Sets the input edge selection for the incremental interface mode of the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setInput (Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setInterruptEnable (Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the interrupt generation of the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setMode (Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setReloadInputMode (Ifx_GPT12 *gpt12, IfxGpt12_ReloadInputMode inputMode)
Sets the input edge selection for the reload mode of the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setRemoteControl (Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control)
Sets the remote control of the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setTimerDirection (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
Sets the T4 timer count direction. More...
IFX_INLINE void | IfxGpt12_T4_setTimerPrescaler (Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
Sets the input prescaler for the Timer mode and Gated timer mode of T4 timer. More...
IFX_INLINE void | IfxGpt12_T5_enableClearTimer (Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the clear timer bit of the T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setCaptureTrigger (Ifx_GPT12 *gpt12, IfxGpt12_CaptureTrigger trigger)
Sets the capture trigger of teh T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setCaptureTriggerEnable (Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the capture trigger of the T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setCaptureTriggerMode (Ifx_GPT12 *gpt12, IfxGpt12_CaptureTriggerMode mode)
Sets the capture trigger mode of the T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setCounterInputMode (Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
Sets the input edge selection for the counter mode of the T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setDirectionSource (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
Sets the T5 timer count direction source internal / external. More...
IFX_INLINE void | IfxGpt12_T5_setEudInput (Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setInput (Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setMode (Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setRemoteControl (Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control)
Sets the remote control of the T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setTimerDirection (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
Sets the T5 timer count direction. More...
IFX_INLINE void | IfxGpt12_T5_setTimerPrescaler (Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
Sets the input prescaler for the Timer mode and Gated timer mode of T5 timer. More...
IFX_INLINE void | IfxGpt12_T6_enableClearTimer (Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the clear timer bit of the T6 timer. More...
IFX_INLINE void | IfxGpt12_T6_setCounterInputMode (Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
Sets the input edge selection for the counter mode of the T6 timer. More...
IFX_INLINE void | IfxGpt12_T6_setDirectionSource (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
sets the T6 timer count direction source internal / external More...
IFX_INLINE void | IfxGpt12_T6_setEudInput (Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T6 timer. More...
IFX_INLINE void | IfxGpt12_T6_setInput (Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T6 timer. More...
IFX_INLINE void | IfxGpt12_T6_setMode (Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T6 timer. More...
IFX_INLINE void | IfxGpt12_T6_setReloadMode (Ifx_GPT12 *gpt12, IfxGpt12_TimerReloadMode mode)
sets the T6 timer count direction More...
IFX_INLINE void | IfxGpt12_T6_setTimerDirection (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
sets the T6 timer count direction More...
IFX_INLINE void | IfxGpt12_T6_setTimerPrescaler (Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
Sets the input prescaler for the Timer mode and Gated timer mode of T6 timer. More...
IFX_INLINE void | IfxGpt12_initCapInPin (const IfxGpt12_TxIn_In *capIn, IfxPort_InputMode inputMode)
Initializes a Capin_In input. More...
IFX_INLINE void | IfxGpt12_initTxOutPin (const IfxGpt12_TxOut_Out *txOut, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a SLSO output. More...
IFX_INLINE void | IfxGpt12_setCaptureInput (Ifx_GPT12 *gpt12, IfxGpt12_CaptureInput input)
Sets the capture input. More...
IFX_INLINE void | IfxGpt12_setGpt1BlockPrescaler (Ifx_GPT12 *gpt12, IfxGpt12_Gpt1BlockPrescaler bps1)
Sets the GPT1 block prescaler. More...
IFX_INLINE void | IfxGpt12_setGpt2BlockPrescaler (Ifx_GPT12 *gpt12, IfxGpt12_Gpt2BlockPrescaler bps2)
Sets the GPT2 block prescaler. More...
IFX_EXTERN void | IfxGpt12_disableModule (Ifx_GPT12 *gpt12)
Disables the module. More...
IFX_EXTERN void | IfxGpt12_enableModule (Ifx_GPT12 *gpt12)
Enables the module. More...
IFX_EXTERN void | IfxGpt12_initTxEudInPin (const IfxGpt12_TxEud_In *txEudIn, IfxPort_InputMode inputMode)
Initializes a TxEUDIn_IN input. More...
IFX_EXTERN void | IfxGpt12_initTxInPin (const IfxGpt12_TxIn_In *txIn, IfxPort_InputMode inputMode)
Initializes a TxIn input. More...
IFX_INLINE IfxGpt12_Mode | IfxGpt12_T2_getMode (Ifx_GPT12 *gpt12)
Returns the operating mode of the T2 timer. More...
IFX_INLINE uint16 | IfxGpt12_T2_getTimerValue (Ifx_GPT12 *gpt12)
Returns the timer value of the T2 timer. More...
IFX_INLINE IfxGpt12_Mode | IfxGpt12_T3_getMode (Ifx_GPT12 *gpt12)
Returns the operating mode of the T3 timer. More...
IFX_INLINE uint16 | IfxGpt12_T3_getTimerValue (Ifx_GPT12 *gpt12)
Returns the timer value of the T3 timer. More...
IFX_INLINE IfxGpt12_Mode | IfxGpt12_T4_getMode (Ifx_GPT12 *gpt12)
Returns the operating mode of the T4 timer. More...
IFX_INLINE uint16 | IfxGpt12_T4_getTimerValue (Ifx_GPT12 *gpt12)
Returns the timer value of the T4 timer. More...
IFX_INLINE IfxGpt12_Mode | IfxGpt12_T5_getMode (Ifx_GPT12 *gpt12)
Returns the operating mode of the T5 timer. More...
IFX_INLINE uint16 | IfxGpt12_T5_getTimerValue (Ifx_GPT12 *gpt12)
Returns the timer value of the T5 timer. More...
IFX_INLINE IfxGpt12_Mode | IfxGpt12_T6_getMode (Ifx_GPT12 *gpt12)
Returns the operating mode of the T6 timer. More...
IFX_INLINE uint16 | IfxGpt12_T6_getTimerValue (Ifx_GPT12 *gpt12)
Returns the timer value of the T6 timer. More...
IFX_INLINE float32 | IfxGpt12_getModuleFrequency (Ifx_GPT12 *gpt12)
Returns the gpt12 module frequency. More...
IFX_EXTERN float32 | IfxGpt12_T2_getFrequency (Ifx_GPT12 *gpt12)
Returns the frequency of the T2 timer. More...
IFX_EXTERN float32 | IfxGpt12_T3_getFrequency (Ifx_GPT12 *gpt12)
Returns the frequency of the T3 timer. More...
IFX_EXTERN float32 | IfxGpt12_T4_getFrequency (Ifx_GPT12 *gpt12)
Returns the frequency of the T4 timer. More...
IFX_EXTERN float32 | IfxGpt12_T5_getFrequency (Ifx_GPT12 *gpt12)
Returns the frequency of the T5 timer. More...
IFX_EXTERN float32 | IfxGpt12_T6_getFrequency (Ifx_GPT12 *gpt12)
Returns the frequency of the T6 timer. More...
IFX_INLINE void | IfxGpt12_T2_run (Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T2 Timer. More...
IFX_INLINE void | IfxGpt12_T2_setTimerValue (Ifx_GPT12 *gpt12, uint16 value)
Sets value for the T2 timer. More...
IFX_INLINE void | IfxGpt12_T3_run (Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T3 Timer. More...
IFX_INLINE void | IfxGpt12_T3_setTimerValue (Ifx_GPT12 *gpt12, uint16 value)
Sets value for the T3 Timer. More...
IFX_INLINE void | IfxGpt12_T4_run (Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T4 Timer. More...
IFX_INLINE void | IfxGpt12_T4_setTimerValue (Ifx_GPT12 *gpt12, uint16 value)
Sets value for the T4 timer. More...
IFX_INLINE void | IfxGpt12_T5_run (Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T5 Timer. More...
IFX_INLINE void | IfxGpt12_T5_setTimerValue (Ifx_GPT12 *gpt12, uint16 value)
Sets value for the T5 timer. More...
IFX_INLINE void | IfxGpt12_T6_run (Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T6 Timer. More...
IFX_INLINE void | IfxGpt12_T6_setTimerValue (Ifx_GPT12 *gpt12, uint16 value)
Sets value for the T6 timer. More...
IFX_INLINE void | IfxGpt12_setCaptureReload (Ifx_GPT12 *gpt12, IfxGpt12_SleepMode value)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxGpt12_setSleepMode (Ifx_GPT12 *gpt12, IfxGpt12_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxGpt12_setSuspendMode (Ifx_GPT12 *gpt12, IfxGpt12_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN void | IfxGpt12_resetModule (Ifx_GPT12 *gpt12)
resets GPT12 kernel More...
IFX_INLINE void | IfxGpt12_initCapInPinWithPadLevel (const IfxGpt12_TxIn_In *capIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CAPIN pin direction as input and configuring pad driver. More...
IFX_INLINE boolean | IfxGpt12_isModuleSuspended (Ifx_GPT12 *gpt12)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_EXTERN void | IfxGpt12_initTxEudInPinWithPadLevel (const IfxGpt12_TxEud_In *txEudIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of TXEUD pin direction as input and configuring pad driver. More...
IFX_EXTERN void | IfxGpt12_initTxInPinWithPadLevel (const IfxGpt12_TxIn_In *txIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of TXIN pin direction as input and configuring pad driver. More...

Detailed Description

GPT12 basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGpt12.h.

Function Documentation

◆ IfxGpt12_initCapInPinWithPadLevel()

IFX_INLINE void IfxGpt12_initCapInPinWithPadLevel | ( | const IfxGpt12_TxIn_In * | capIn,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of CAPIN pin direction as input and configuring pad driver.

Parameters
capIn | the TxIn Pin which should be configured
inputMode | the pin input mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 1591 of file IfxGpt12.h.

◆ IfxGpt12_initTxEudInPinWithPadLevel()

IFX_EXTERN void IfxGpt12_initTxEudInPinWithPadLevel | ( | const IfxGpt12_TxEud_In * | txEudIn,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of TXEUD pin direction as input and configuring pad driver.

Parameters
txEudIn | the TxEUD_IN Pin which should be configured
inputMode | the pin input mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 302 of file IfxGpt12.c.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_initTxInPinWithPadLevel()

IFX_EXTERN void IfxGpt12_initTxInPinWithPadLevel | ( | const IfxGpt12_TxIn_In * | txIn,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of TXIN pin direction as input and configuring pad driver.

Parameters
txIn | the TxIn Pin which should be configured
inputMode | the pin input mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 357 of file IfxGpt12.c.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_isModuleSuspended()

IFX_INLINE boolean IfxGpt12_isModuleSuspended ( Ifx_GPT12 * gpt12 )

Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended.

Parameters
gpt12 Pointer to GPT12 module registers
Returns
Suspend status (TRUE / FALSE)

Definition at line 1606 of file IfxGpt12.h.


iLLD_TC38A: GTM

Modules | Files
GTM
iLLD
Collaboration diagram for GTM:

Modules

Implementation
Standard Driver
Atom Interface Drivers
TOM Interface Drivers
Tim Interface Drivers
GTM Pin Mapping
GTM Trigger Configuration

Files

file | IfxGtm_cfg.h
GTM on-chip implementation data.
file | IfxGtm_PinMap.c
GTM I/O map.
file | IfxGtm_PinMap.h
GTM I/O map.
file | IfxGtm_Atom_Dtm_PwmHl.h
GTM DTM_PWMHL details.
file | IfxGtm_Atom_Pwm.h
GTM PWM details.
file | IfxGtm_Atom_PwmHl.h
GTM PWMHL details.
file | IfxGtm_Atom_Timer.h
GTM TIMER details.
file | IfxGtm.h
GTM basic functionality.
file | IfxGtm_Atom.h
GTM basic functionality.
file | IfxGtm_Cmu.h
GTM basic functionality.
file | IfxGtm_Dpll.h
GTM basic functionality.
file | IfxGtm_Dtm.h
GTM basic functionality.
file | IfxGtm_Psm.h
GTM basic functionality.
file | IfxGtm_Spe.h
GTM basic functionality.
file | IfxGtm_Tbu.h
GTM basic functionality.
file | IfxGtm_Tim.h
GTM basic functionality.
file | IfxGtm_Tom.h
GTM basic functionality.
file | IfxGtm_Tim_In.h
GTM IN details.
file | IfxGtm_Tim_Timer.h
GTM TIMER details.
file | IfxGtm_Tom_Dtm_PwmHl.h
GTM DTM_PWMHL details.
file | IfxGtm_Tom_Pwm.h
GTM PWM details.
file | IfxGtm_Tom_PwmHl.h
GTM PWMHL details.
file | IfxGtm_Tom_Timer.h
GTM TIMER details.
file | IfxGtm_Trig.h
GTM TRIG details.

Detailed Description


iLLD_TC38A: Implementation

Modules
Implementation
iLLD » GTM
Collaboration diagram for Implementation:

Modules

Enumerations
Data Structures

Detailed Description


iLLD_TC38A: Enumerations

Enumerations
Enumerations
iLLD » GTM » Implementation
Collaboration diagram for Enumerations:

Enumerations

enum IfxGtm_Atom {
IfxGtm_Atom_0,
IfxGtm_Atom_1,
IfxGtm_Atom_2,
IfxGtm_Atom_3,
IfxGtm_Atom_4,
IfxGtm_Atom_5,
IfxGtm_Atom_6,
IfxGtm_Atom_7,
IfxGtm_Atom_8
}
Enum for ATOM objects. More...
enum IfxGtm_Atom_Ch {
IfxGtm_Atom_Ch_none = -1,
IfxGtm_Atom_Ch_0,
IfxGtm_Atom_Ch_1,
IfxGtm_Atom_Ch_2,
IfxGtm_Atom_Ch_3,
IfxGtm_Atom_Ch_4,
IfxGtm_Atom_Ch_5,
IfxGtm_Atom_Ch_6,
IfxGtm_Atom_Ch_7
}
Enum for ATOM channels. More...
enum IfxGtm_Cdtm {
IfxGtm_Cdtm_none = -1,
IfxGtm_Cdtm_0,
IfxGtm_Cdtm_1,
IfxGtm_Cdtm_2,
IfxGtm_Cdtm_3,
IfxGtm_Cdtm_4,
IfxGtm_Cdtm_5,
IfxGtm_Cdtm_6
}
Enum for CDTM objects. More...
enum IfxGtm_Cluster {
IfxGtm_Cluster_0,
IfxGtm_Cluster_1,
IfxGtm_Cluster_2,
IfxGtm_Cluster_3,
IfxGtm_Cluster_4,
IfxGtm_Cluster_5,
IfxGtm_Cluster_6,
IfxGtm_Cluster_7,
IfxGtm_Cluster_8
}
Enumeration listing the clusters of GTM. More...
enum IfxGtm_Dpll_SubInc {
IfxGtm_Dpll_SubInc_1 = 0,
IfxGtm_Dpll_SubInc_2
}
Enum for Dpll subincrements. More...
enum IfxGtm_Dtm {
IfxGtm_Dtm_none = -1,
IfxGtm_Dtm_0,
IfxGtm_Dtm_1,
IfxGtm_Dtm_2,
IfxGtm_Dtm_3,
IfxGtm_Dtm_4,
IfxGtm_Dtm_5
}
Enum for DTM objects. More...
enum IfxGtm_Dtm_Ch {
IfxGtm_Dtm_Ch_none = -1,
IfxGtm_Dtm_Ch_0,
IfxGtm_Dtm_Ch_1,
IfxGtm_Dtm_Ch_2,
IfxGtm_Dtm_Ch_3
}
Enum for DTM channels. More...
enum IfxGtm_FeatureControl {
IfxGtm_FeatureControl_disabled = 0,
IfxGtm_FeatureControl_disable = 1,
IfxGtm_FeatureControl_enable = 2,
IfxGtm_FeatureControl_enabled = 3
}
Enum Enable disable feature control. More...
enum IfxGtm_Spe {
IfxGtm_Spe_0,
IfxGtm_Spe_1,
IfxGtm_Spe_2,
IfxGtm_Spe_3
}
Spe Objects. More...
enum IfxGtm_Spe_TimInput {
IfxGtm_Spe_TimInput_spe0Tim0Ch0to2 = 0,
IfxGtm_Spe_TimInput_spe0Tim1Ch0to2 = 1,
IfxGtm_Spe_TimInput_spe1Tim0Ch3to5 = 2,
IfxGtm_Spe_TimInput_spe1Tim1Ch3to5 = 3,
IfxGtm_Spe_TimInput_spe2Tim2Ch0to2 = 4,
IfxGtm_Spe_TimInput_spe2Tim3Ch0to2 = 5,
IfxGtm_Spe_TimInput_spe3Tim2Ch3to5 = 6,
IfxGtm_Spe_TimInput_spe3Tim3Ch3to5 = 7,
IfxGtm_Spe_TimInput_spe4Tim4Ch0to2 = 8,
IfxGtm_Spe_TimInput_spe4Tim5Ch0to2 = 9,
IfxGtm_Spe_TimInput_spe5Tim4Ch3to5 = 10,
IfxGtm_Spe_TimInput_spe5Tim5Ch3to5 = 11
}
Specifies the TIM inputs to the SPE submodule instances. Two possible input sources are present per SPE for CHx,y,z Choose the appropriate input source as per the used SPE. More...
enum IfxGtm_Spe_TriggerSource {
IfxGtm_Spe_TriggerSource_speNipd = 0,
IfxGtm_Spe_TriggerSource_tomCh0Ccu0 = 1,
IfxGtm_Spe_TriggerSource_tomCh0Ccu1 = 2,
IfxGtm_Spe_TriggerSource_tomCh2Ccu1 = 3,
IfxGtm_Spe_TriggerSource_tomCh6Ccu1 = 4,
IfxGtm_Spe_TriggerSource_tomCh7Ccu1 = 5,
IfxGtm_Spe_TriggerSource_tomCh8Ccu1 = 6,
IfxGtm_Spe_TriggerSource_tomCh9Ccu1 = 7
}
selects the source of trigger to control command output from SPE. More...
enum IfxGtm_Tim {
IfxGtm_Tim_0,
IfxGtm_Tim_1,
IfxGtm_Tim_2,
IfxGtm_Tim_3,
IfxGtm_Tim_4,
IfxGtm_Tim_5,
IfxGtm_Tim_6
}
Enum for TIM objects. More...
enum IfxGtm_Tim_Ch {
IfxGtm_Tim_Ch_0,
IfxGtm_Tim_Ch_1,
IfxGtm_Tim_Ch_2,
IfxGtm_Tim_Ch_3,
IfxGtm_Tim_Ch_4,
IfxGtm_Tim_Ch_5,
IfxGtm_Tim_Ch_6,
IfxGtm_Tim_Ch_7
}
Enum for TIM channels. More...
enum IfxGtm_Tom {
IfxGtm_Tom_0,
IfxGtm_Tom_1,
IfxGtm_Tom_2,
IfxGtm_Tom_3,
IfxGtm_Tom_4
}
Enum for TOM objects. More...
enum IfxGtm_Tom_Ch {
IfxGtm_Tom_Ch_none = -1,
IfxGtm_Tom_Ch_0,
IfxGtm_Tom_Ch_1,
IfxGtm_Tom_Ch_2,
IfxGtm_Tom_Ch_3,
IfxGtm_Tom_Ch_4,
IfxGtm_Tom_Ch_5,
IfxGtm_Tom_Ch_6,
IfxGtm_Tom_Ch_7,
IfxGtm_Tom_Ch_8,
IfxGtm_Tom_Ch_9,
IfxGtm_Tom_Ch_10,
IfxGtm_Tom_Ch_11,
IfxGtm_Tom_Ch_12,
IfxGtm_Tom_Ch_13,
IfxGtm_Tom_Ch_14,
IfxGtm_Tom_Ch_15
}
Enum for TOM channels. More...
enum IfxGtm_Tom_Tgc {
IfxGtm_Tom_Tgc_0,
IfxGtm_Tom_Tgc_1
}
Enum for TOM global channel control units. More...

Detailed Description

Enumeration Type Documentation

◆ IfxGtm_Atom

enum IfxGtm_Atom

Enum for ATOM objects.

Enumerator
IfxGtm_Atom_0 | ATOM object 0.
IfxGtm_Atom_1 | ATOM object 1.
IfxGtm_Atom_2 | ATOM object 2.
IfxGtm_Atom_3 | ATOM object 3.
IfxGtm_Atom_4 | ATOM object 4.
IfxGtm_Atom_5 | ATOM object 5.
IfxGtm_Atom_6 | ATOM object 6.
IfxGtm_Atom_7 | ATOM object 7.
IfxGtm_Atom_8 | ATOM object 8.

Definition at line 243 of file IfxGtm_cfg.h.

◆ IfxGtm_Atom_Ch

enum IfxGtm_Atom_Ch

Enum for ATOM channels.

Enumerator
IfxGtm_Atom_Ch_none | Not Selected.
IfxGtm_Atom_Ch_0 | ATOM channel 0.
IfxGtm_Atom_Ch_1 | ATOM channel 1.
IfxGtm_Atom_Ch_2 | ATOM channel 2.
IfxGtm_Atom_Ch_3 | ATOM channel 3.
IfxGtm_Atom_Ch_4 | ATOM channel 4.
IfxGtm_Atom_Ch_5 | ATOM channel 5.
IfxGtm_Atom_Ch_6 | ATOM channel 6.
IfxGtm_Atom_Ch_7 | ATOM channel 7.

Definition at line 258 of file IfxGtm_cfg.h.

◆ IfxGtm_Cdtm

enum IfxGtm_Cdtm

Enum for CDTM objects.

Enumerator
IfxGtm_Cdtm_none | No DTM object.
IfxGtm_Cdtm_0 | DTM object 0.
IfxGtm_Cdtm_1 | DTM object 1.
IfxGtm_Cdtm_2 | DTM object 2.
IfxGtm_Cdtm_3 | DTM object 3.
IfxGtm_Cdtm_4 | DTM object 4.
IfxGtm_Cdtm_5 | DTM object 5.
IfxGtm_Cdtm_6 | DTM object 6.

Definition at line 273 of file IfxGtm_cfg.h.

◆ IfxGtm_Cluster

enum IfxGtm_Cluster

Enumeration listing the clusters of GTM.

Enumerator
IfxGtm_Cluster_0 | GTM cluster 0.
IfxGtm_Cluster_1 | GTM cluster 1.
IfxGtm_Cluster_2 | GTM cluster 2.
IfxGtm_Cluster_3 | GTM cluster 3.
IfxGtm_Cluster_4 | GTM cluster 4.
IfxGtm_Cluster_5 | GTM cluster 5.
IfxGtm_Cluster_6 | GTM cluster 6.
IfxGtm_Cluster_7 | GTM cluster 7.
IfxGtm_Cluster_8 | GTM cluster 8.

Definition at line 287 of file IfxGtm_cfg.h.

◆ IfxGtm_Dpll_SubInc

enum IfxGtm_Dpll_SubInc

Enum for Dpll subincrements.

Enumerator
IfxGtm_Dpll_SubInc_1 | subincrement1
IfxGtm_Dpll_SubInc_2 | subincrement2

Definition at line 302 of file IfxGtm_cfg.h.

◆ IfxGtm_Dtm

enum IfxGtm_Dtm

Enum for DTM objects.

Enumerator
IfxGtm_Dtm_none | No DTM object.
IfxGtm_Dtm_0 | DTM object 0.
IfxGtm_Dtm_1 | DTM object 1.
IfxGtm_Dtm_2 | DTM object 2.
IfxGtm_Dtm_3 | DTM object 3.
IfxGtm_Dtm_4 | DTM object 4.
IfxGtm_Dtm_5 | DTM object 5.

Definition at line 310 of file IfxGtm_cfg.h.

◆ IfxGtm_Dtm_Ch

enum IfxGtm_Dtm_Ch

Enum for DTM channels.

Enumerator
IfxGtm_Dtm_Ch_none | Not Selected.
IfxGtm_Dtm_Ch_0 | DTM object 0.
IfxGtm_Dtm_Ch_1 | DTM object 1.
IfxGtm_Dtm_Ch_2 | DTM object 2.
IfxGtm_Dtm_Ch_3 | DTM object 3.

Definition at line 323 of file IfxGtm_cfg.h.

◆ IfxGtm_FeatureControl

enum IfxGtm_FeatureControl

Enum Enable disable feature control.

Enumerator
IfxGtm_FeatureControl_disabled | disabled
IfxGtm_FeatureControl_disable | disable
IfxGtm_FeatureControl_enable | enable
IfxGtm_FeatureControl_enabled | enabled

Definition at line 334 of file IfxGtm_cfg.h.

◆ IfxGtm_Spe

enum IfxGtm_Spe

Spe Objects.

Enumerator
IfxGtm_Spe_0 | SPE 0.
IfxGtm_Spe_1 | SPE 1.
IfxGtm_Spe_2 | SPE 2.
IfxGtm_Spe_3 | SPE 3.

Definition at line 344 of file IfxGtm_cfg.h.

◆ IfxGtm_Spe_TimInput

enum IfxGtm_Spe_TimInput

Specifies the TIM inputs to the SPE submodule instances. Two possible input sources are present per SPE for CHx,y,z Choose the appropriate input source as per the used SPE.

sed to set: GTM.SPE.CTRL_STAT.TIM_SEL

Enumerator
IfxGtm_Spe_TimInput_spe0Tim0Ch0to2 | SPE0: select TIM 0 Channel 0-2.
IfxGtm_Spe_TimInput_spe0Tim1Ch0to2 | SPE0: Select TIM 1 Channel 0 to 2.
IfxGtm_Spe_TimInput_spe1Tim0Ch3to5 | SPE1: select TIM 0 Channel 3 to 5.
IfxGtm_Spe_TimInput_spe1Tim1Ch3to5 | SPE1: Select TIM 1 Channel 3 to 5.
IfxGtm_Spe_TimInput_spe2Tim2Ch0to2 | SPE2: Select TIM 2 Channel 0 to 2.
IfxGtm_Spe_TimInput_spe2Tim3Ch0to2 | SPE2: Select TIM 3 Channel 0 to 2.
IfxGtm_Spe_TimInput_spe3Tim2Ch3to5 | SPE3: Select TIM 2 Channel 3 to 5.
IfxGtm_Spe_TimInput_spe3Tim3Ch3to5 | SPE3: Select TIM 3 Channel 3 to 5.
IfxGtm_Spe_TimInput_spe4Tim4Ch0to2 | SPE4: Select TIM 4 channel 0 to 2.
IfxGtm_Spe_TimInput_spe4Tim5Ch0to2 | SPE4: Select TIM 5 Channel 0 to 2.
IfxGtm_Spe_TimInput_spe5Tim4Ch3to5 | SPE5: Select TIM 4 Channel 3 to 5.
IfxGtm_Spe_TimInput_spe5Tim5Ch3to5 | SPE5: Select TIM 5 Channel 3 to 5.

Definition at line 358 of file IfxGtm_cfg.h.

◆ IfxGtm_Spe_TriggerSource

enum IfxGtm_Spe_TriggerSource

selects the source of trigger to control command output from SPE.

Enumerator
IfxGtm_Spe_TriggerSource_speNipd | select NIPD as trigger
IfxGtm_Spe_TriggerSource_tomCh0Ccu0 | select TOM channl 0 CCU0 as trigger
IfxGtm_Spe_TriggerSource_tomCh0Ccu1 | select TOM channl 0 CCU1 as trigger
IfxGtm_Spe_TriggerSource_tomCh2Ccu1 | select TOM channl 2 CCU1 as trigger
IfxGtm_Spe_TriggerSource_tomCh6Ccu1 | select TOM channl 6 CCU1 as trigger
IfxGtm_Spe_TriggerSource_tomCh7Ccu1 | select TOM channl 7 CCU1 as trigger
IfxGtm_Spe_TriggerSource_tomCh8Ccu1 | select TOM channl 8 CCU1 as trigger
IfxGtm_Spe_TriggerSource_tomCh9Ccu1 | select TOM channl 9 CCU1 as trigger

Definition at line 376 of file IfxGtm_cfg.h.

◆ IfxGtm_Tim

enum IfxGtm_Tim

Enum for TIM objects.

Enumerator
IfxGtm_Tim_0 | TIM object 0.
IfxGtm_Tim_1 | TIM object 1.
IfxGtm_Tim_2 | TIM object 2.
IfxGtm_Tim_3 | TIM object 3.
IfxGtm_Tim_4 | TIM object 4.
IfxGtm_Tim_5 | TIM object 5.
IfxGtm_Tim_6 | TIM object 6.

Definition at line 390 of file IfxGtm_cfg.h.

◆ IfxGtm_Tim_Ch

enum IfxGtm_Tim_Ch

Enum for TIM channels.

Enumerator
IfxGtm_Tim_Ch_0 | TIM channel 0.
IfxGtm_Tim_Ch_1 | TIM channel 1.
IfxGtm_Tim_Ch_2 | TIM channel 2.
IfxGtm_Tim_Ch_3 | TIM channel 3.
IfxGtm_Tim_Ch_4 | TIM channel 4.
IfxGtm_Tim_Ch_5 | TIM channel 5.
IfxGtm_Tim_Ch_6 | TIM channel 6.
IfxGtm_Tim_Ch_7 | TIM channel 7.

Definition at line 403 of file IfxGtm_cfg.h.

◆ IfxGtm_Tom

enum IfxGtm_Tom

Enum for TOM objects.

Enumerator
IfxGtm_Tom_0 | TOM object 0.
IfxGtm_Tom_1 | TOM object 1.
IfxGtm_Tom_2 | TOM object 2.
IfxGtm_Tom_3 | TOM object 3.
IfxGtm_Tom_4 | TOM object 4.

Definition at line 417 of file IfxGtm_cfg.h.

◆ IfxGtm_Tom_Ch

enum IfxGtm_Tom_Ch

Enum for TOM channels.

Enumerator
IfxGtm_Tom_Ch_none | Not Selected.
IfxGtm_Tom_Ch_0 | TOM channel 0.
IfxGtm_Tom_Ch_1 | TOM channel 1.
IfxGtm_Tom_Ch_2 | TOM channel 2.
IfxGtm_Tom_Ch_3 | TOM channel 3.
IfxGtm_Tom_Ch_4 | TOM channel 4.
IfxGtm_Tom_Ch_5 | TOM channel 5.
IfxGtm_Tom_Ch_6 | TOM channel 6.
IfxGtm_Tom_Ch_7 | TOM channel 7.
IfxGtm_Tom_Ch_8 | TOM channel 8.
IfxGtm_Tom_Ch_9 | TOM channel 9.
IfxGtm_Tom_Ch_10 | TOM channel 10.
IfxGtm_Tom_Ch_11 | TOM channel 11.
IfxGtm_Tom_Ch_12 | TOM channel 12.
IfxGtm_Tom_Ch_13 | TOM channel 13.
IfxGtm_Tom_Ch_14 | TOM channel 14.
IfxGtm_Tom_Ch_15 | TOM channel 15.

Definition at line 428 of file IfxGtm_cfg.h.

◆ IfxGtm_Tom_Tgc

enum IfxGtm_Tom_Tgc

Enum for TOM global channel control units.

Enumerator
IfxGtm_Tom_Tgc_0 | TOM global channel control unit0.
IfxGtm_Tom_Tgc_1 | TOM global channel control unit1.

Definition at line 451 of file IfxGtm_cfg.h.


iLLD_TC38A: Data Structures

Data Structures
Data Structures
iLLD » GTM » Implementation
Collaboration diagram for Data Structures:

Data Structures

struct IfxGtm_Tom_TGC
TOM TGC objects. More...

Detailed Description

Data Structure Documentation

◆ IfxGtm_Tom_TGC

struct IfxGtm_Tom_TGC

TOM TGC objects.

Definition at line 483 of file IfxGtm_cfg.h.

Data Fields
Ifx_GTM_TOM_TGC_ACT_TB | ACT_TB | 34, TOM TGC0 Action Time Base Register
Ifx_GTM_TOM_TGC_ENDIS_CTRL | ENDIS_CTRL | 70, TOM TGC0 Enable/Disable Control Register
Ifx_GTM_TOM_TGC_ENDIS_STAT | ENDIS_STAT | 74, TOM TGC0 Enable/Disable Status Register
Ifx_GTM_TOM_TGC_FUPD_CTRL | FUPD_CTRL | 38, TOM TGC0 Force Update Control Register
Ifx_GTM_TOM_TGC_GLB_CTRL | GLB_CTRL | 30, TOM TGC0 Global Control Register
Ifx_GTM_TOM_TGC_INT_TRIG | INT_TRIG | 3C, TOM TGC0 Internal Trigger Control Register
Ifx_GTM_TOM_TGC_OUTEN_CTRL | OUTEN_CTRL | 78, TOM TGC0 Output Enable Control Register
Ifx_GTM_TOM_TGC_OUTEN_STAT | OUTEN_STAT | 7C, TOM TGC0 Output Enable Status Register
uint32 | reserved | reserved area
Ifx_GTM_TOM_CH | xxxCH1 |


iLLD_TC38A: Standard Driver

Modules
Standard Driver
iLLD » GTM
Collaboration diagram for Standard Driver:

Modules

Basic Functions
Enumerations
Atom Basic Functionality
Cmu Basic Functionality
Dpll Basic Functionality
Dtm Basic Functionality
PSM
Spe Basic Functionality
Tbu Basic Functionality
Tim Basic Functionality
Tom Basic Functionality

Detailed Description


iLLD_TC38A: Basic Functions

Functions
Basic Functions
iLLD » GTM » Standard Driver
Collaboration diagram for Basic Functions:

Functions

IFX_INLINE boolean | IfxGtm_isEnabled (Ifx_GTM *gtm)
Returs the status of module enabled or disabled. More...
IFX_INLINE boolean | IfxGtm_isModuleSuspended (Ifx_GTM *gtm)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxGtm_setSuspendMode (Ifx_GTM *gtm, IfxGtm_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN void | IfxGtm_disable (Ifx_GTM *gtm)
Disables the module. More...
IFX_EXTERN void | IfxGtm_enable (Ifx_GTM *gtm)
Enables the module. More...

Detailed Description

Function Documentation

◆ IfxGtm_disable()

IFX_EXTERN void IfxGtm_disable ( Ifx_GTM * gtm )

Disables the module.

Parameters
gtm Pointer to GTM module
Returns
None

Definition at line 54 of file IfxGtm.c.

◆ IfxGtm_enable()

IFX_EXTERN void IfxGtm_enable ( Ifx_GTM * gtm )

Enables the module.

Parameters
gtm Pointer to GTM module
Returns
None

Definition at line 64 of file IfxGtm.c.

◆ IfxGtm_isEnabled()

IFX_INLINE boolean IfxGtm_isEnabled ( Ifx_GTM * gtm )

Returs the status of module enabled or disabled.

Parameters
gtm Pointer to GTM module
Returns
status: TRUE/FALSE

Definition at line 152 of file IfxGtm.h.

◆ IfxGtm_isModuleSuspended()

IFX_INLINE boolean IfxGtm_isModuleSuspended ( Ifx_GTM * gtm )

Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended.

Parameters
gtm Pointer to GTM module registers
Returns
Suspend status (TRUE / FALSE)

Definition at line 158 of file IfxGtm.h.

◆ IfxGtm_setSuspendMode()

IFX_INLINE void IfxGtm_setSuspendMode | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_SuspendMode | mode
 | ) |  |

Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.

Parameters
gtm | Pointer to GTM module registers
mode | Module suspend mode
Returns
None

Definition at line 170 of file IfxGtm.h.


iLLD_TC38A: Enumerations

Enumerations
Enumerations
iLLD » GTM » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxGtm_IrqMode {
IfxGtm_IrqMode_level = 0,
IfxGtm_IrqMode_pulse = 1,
IfxGtm_IrqMode_pulseNotify = 2,
IfxGtm_IrqMode_singlePulse = 3
}
Enum for GTM interrupt modes. More...
enum IfxGtm_SuspendMode {
IfxGtm_SuspendMode_none = 0,
IfxGtm_SuspendMode_hard = 1,
IfxGtm_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...

Detailed Description

Enumeration Type Documentation

◆ IfxGtm_IrqMode

enum IfxGtm_IrqMode

Enum for GTM interrupt modes.

Enumerator
IfxGtm_IrqMode_level
IfxGtm_IrqMode_pulse
IfxGtm_IrqMode_pulseNotify
IfxGtm_IrqMode_singlePulse

Definition at line 64 of file IfxGtm.h.

◆ IfxGtm_SuspendMode

enum IfxGtm_SuspendMode

OCDS Suspend Control (OCDS.SUS)

Enumerator
IfxGtm_SuspendMode_none | No suspend.
IfxGtm_SuspendMode_hard | Hard Suspend.
IfxGtm_SuspendMode_soft | Soft Suspend.

Definition at line 74 of file IfxGtm.h.


iLLD_TC38A: Atom Basic Functionality

Modules
Atom Basic Functionality
iLLD » GTM » Standard Driver
Collaboration diagram for Atom Basic Functionality:

Modules

ATOM Enumerations
ATOM Channel Functions
ATOM AGC Functions
ATOM Module Functions

Detailed Description


iLLD_TC38A: ATOM Enumerations

Enumerations
ATOM Enumerations
iLLD » GTM » Standard Driver » Atom Basic Functionality
Collaboration diagram for ATOM Enumerations:

Enumerations

enum IfxGtm_Atom_Ch_OutputTrigger {
IfxGtm_Atom_Ch_OutputTrigger_forward = 0,
IfxGtm_Atom_Ch_OutputTrigger_generate = 1
}
Reset source for channel counter CN0. More...
enum IfxGtm_Atom_Ch_ResetEvent {
IfxGtm_Atom_Ch_ResetEvent_onCm0 = 0,
IfxGtm_Atom_Ch_ResetEvent_onTrigger = 1
}
Reset event for channel counter CN0. More...
enum IfxGtm_Atom_Mode {
IfxGtm_Atom_Mode_outputImmediate,
IfxGtm_Atom_Mode_outputCompare,
IfxGtm_Atom_Mode_outputPwm,
IfxGtm_Atom_Mode_outputSerial
}
Enum for ATOM mode. More...

Detailed Description

Enumeration Type Documentation

◆ IfxGtm_Atom_Ch_OutputTrigger

enum IfxGtm_Atom_Ch_OutputTrigger

Reset source for channel counter CN0.

Enumerator
IfxGtm_Atom_Ch_OutputTrigger_forward | Forward the trigger from the previous channel.
IfxGtm_Atom_Ch_OutputTrigger_generate | Generate the trigger from the current channel.

Definition at line 77 of file IfxGtm_Atom.h.

◆ IfxGtm_Atom_Ch_ResetEvent

enum IfxGtm_Atom_Ch_ResetEvent

Reset event for channel counter CN0.

Enumerator
IfxGtm_Atom_Ch_ResetEvent_onCm0
IfxGtm_Atom_Ch_ResetEvent_onTrigger

Definition at line 85 of file IfxGtm_Atom.h.

◆ IfxGtm_Atom_Mode

enum IfxGtm_Atom_Mode

Enum for ATOM mode.

Enumerator
IfxGtm_Atom_Mode_outputImmediate
IfxGtm_Atom_Mode_outputCompare
IfxGtm_Atom_Mode_outputPwm
IfxGtm_Atom_Mode_outputSerial

Definition at line 93 of file IfxGtm_Atom.h.


iLLD_TC38A: ATOM Channel Functions

Functions
ATOM Channel Functions
iLLD » GTM » Standard Driver » Atom Basic Functionality
Collaboration diagram for ATOM Channel Functions:

Functions

IFX_INLINE Ifx_GTM_ATOM_CH * | IfxGtm_Atom_Ch_getChannelPointer (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the base addredd of selected Atom channel. More...
IFX_INLINE void | IfxGtm_Atom_Ch_setCompareShadow (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowZero, uint32 shadowOne)
Sets the compare 0 and 1 shadow values. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_clearOneNotification (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Clears the channel One notification. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_clearZeroNotification (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Clears the channel Zero notification. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_configurePwmMode (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock, Ifx_ActiveState activeState, IfxGtm_Atom_Ch_ResetEvent resetEvent, IfxGtm_Atom_Ch_OutputTrigger trigger)
IFX_EXTERN float32 | IfxGtm_Atom_Ch_getClockFrequency (Ifx_GTM *gtm, Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the ATOM channel input clock frequency in Hz. More...
IFX_EXTERN IfxGtm_Cmu_Clk | IfxGtm_Atom_Ch_getClockSource (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the channel clock source. More...
IFX_EXTERN uint32 | IfxGtm_Atom_Ch_getCompareOne (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare one value. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Atom_Ch_getCompareOnePointer (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare one pointer. More...
IFX_EXTERN uint32 | IfxGtm_Atom_Ch_getCompareZero (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare zero value. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Atom_Ch_getCompareZeroPointer (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare zero pointer. More...
IFX_EXTERN boolean | IfxGtm_Atom_Ch_getOutputLevel (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Gets the ATOM output level. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxGtm_Atom_Ch_getSrcPointer (Ifx_GTM *gtm, IfxGtm_Atom atom, IfxGtm_Atom_Ch channel)
Returns a pointer to the ATOM channel SRC. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Atom_Ch_getTimerPointer (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the Timer pointer. More...
IFX_EXTERN boolean | IfxGtm_Atom_Ch_isOneNotification (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the status of channel One notification. More...
IFX_EXTERN boolean | IfxGtm_Atom_Ch_isZeroNotification (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the status of channel Zero notification. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_raiseInterruptOne (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Raises the interrupt for Compare 1. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_raiseInterruptZero (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Raises the interrupt for Compare 0. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setClockSource (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock)
Sets the channel clock source. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setCompare (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareZero, uint32 compareOne)
Sets the compare 0 and 1 values. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setCompareOne (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareOne)
Sets the compare 1 value. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setCompareOneShadow (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowOne)
Sets the compare 1 shadow value. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setCompareZero (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareZero)
Sets the compare 0 value. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setCompareZeroShadow (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowZero)
Sets the compare 0 shadow value. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setCounterValue (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 value)
Sets the counter value. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setMode (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Mode mode)
set the Atom operating mode More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setNotification (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne)
Sets the channel notification. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setOneShotMode (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, boolean enabled)
Enable/disable the one shot mode. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setResetSource (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Ch_ResetEvent event)
Sets the channel clock source either from local or from previous channel. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setSignalLevel (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, Ifx_ActiveState activeState)
Sets the signal level. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setTriggerOutput (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Ch_OutputTrigger trigger)
Sets the channel trigger output. More...
IFX_EXTERN uint32 | IfxGtm_Atom_Ch_getCounterValue (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Get the counter value. More...

Detailed Description

Function Documentation

◆ IfxGtm_Atom_Ch_clearOneNotification()

IFX_EXTERN void IfxGtm_Atom_Ch_clearOneNotification | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Clears the channel One notification.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
None

Definition at line 262 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Timer_acknowledgeTriggerIrq().

◆ IfxGtm_Atom_Ch_clearZeroNotification()

IFX_EXTERN void IfxGtm_Atom_Ch_clearZeroNotification | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Clears the channel Zero notification.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
None

Definition at line 270 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Timer_acknowledgeTimerIrq().

◆ IfxGtm_Atom_Ch_configurePwmMode()

IFX_EXTERN void IfxGtm_Atom_Ch_configurePwmMode | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | IfxGtm_Cmu_Clk | clock,
 |  | Ifx_ActiveState | activeState,
 |  | IfxGtm_Atom_Ch_ResetEvent | resetEvent,
 |  | IfxGtm_Atom_Ch_OutputTrigger | trigger
 | ) |  |
Parameters
atom | Pointer to the ATOM object
channel | Channel index
clock | Clock source
activeState | Active State
resetEvent | Channel reset event
trigger | Channel trigger output mode
Returns
None

Definition at line 278 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Dtm_PwmHl_init(), IfxGtm_Atom_PwmHl_init(), and IfxGtm_Atom_Timer_init().

◆ IfxGtm_Atom_Ch_getChannelPointer()

IFX_INLINE Ifx_GTM_ATOM_CH * IfxGtm_Atom_Ch_getChannelPointer | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Returns the base addredd of selected Atom channel.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
Pointer to channel base address

Definition at line 631 of file IfxGtm_Atom.h.

Referenced by IfxGtm_Atom_Ch_clearOneNotification(), IfxGtm_Atom_Ch_clearZeroNotification(), IfxGtm_Atom_Ch_configurePwmMode(), IfxGtm_Atom_Ch_getClockSource(), IfxGtm_Atom_Ch_getCompareOne(), IfxGtm_Atom_Ch_getCompareOnePointer(), IfxGtm_Atom_Ch_getCompareZero(), IfxGtm_Atom_Ch_getCompareZeroPointer(), IfxGtm_Atom_Ch_getCounterValue(), IfxGtm_Atom_Ch_getOutputLevel(), IfxGtm_Atom_Ch_isOneNotification(), IfxGtm_Atom_Ch_isZeroNotification(), IfxGtm_Atom_Ch_raiseInterruptOne(), IfxGtm_Atom_Ch_raiseInterruptZero(), IfxGtm_Atom_Ch_setAruInput(), IfxGtm_Atom_Ch_setAruReadAddress0(), IfxGtm_Atom_Ch_setAruReadAddress1(), IfxGtm_Atom_Ch_setClockSource(), IfxGtm_Atom_Ch_setCompare(), IfxGtm_Atom_Ch_setCompareOne(), IfxGtm_Atom_Ch_setCompareOneShadow(), IfxGtm_Atom_Ch_setCompareShadow(), IfxGtm_Atom_Ch_setCompareZero(), IfxGtm_Atom_Ch_setCompareZeroShadow(), IfxGtm_Atom_Ch_setCounterValue(), IfxGtm_Atom_Ch_setMode(), IfxGtm_Atom_Ch_setNotification(), IfxGtm_Atom_Ch_setOneShotMode(), IfxGtm_Atom_Ch_setResetSource(), IfxGtm_Atom_Ch_setSignalLevel(), IfxGtm_Atom_Ch_setSomcControl(), IfxGtm_Atom_Ch_setSomcSignalLevelControl(), IfxGtm_Atom_Ch_setTriggerOutput(), IfxGtm_Atom_getShadowOne(), IfxGtm_Atom_getShadowOnePointer(), IfxGtm_Atom_getShadowZero(), and IfxGtm_Atom_getShadowZeroPointer().

◆ IfxGtm_Atom_Ch_getClockFrequency()

IFX_EXTERN float32 IfxGtm_Atom_Ch_getClockFrequency | ( | Ifx_GTM * | gtm,
 |  | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Returns the ATOM channel input clock frequency in Hz.

Parameters
gtm | Pointer to GTM module
atom | Pointer to the ATOM object
channel | Channel index
Returns
ATOM channel input clock frequency in Hz

Definition at line 296 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Timer_updateInputFrequency().

◆ IfxGtm_Atom_Ch_getClockSource()

IFX_EXTERN IfxGtm_Cmu_Clk IfxGtm_Atom_Ch_getClockSource | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Returns the channel clock source.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
The clock source

Definition at line 306 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Ch_getClockFrequency(), IfxGtm_Atom_Dtm_PwmHl_init(), and IfxGtm_Atom_PwmHl_init().

◆ IfxGtm_Atom_Ch_getCompareOne()

IFX_EXTERN uint32 IfxGtm_Atom_Ch_getCompareOne | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Returns the compare one value.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
compare one value

Definition at line 316 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Timer_getTrigger().

◆ IfxGtm_Atom_Ch_getCompareOnePointer()

IFX_EXTERN volatile uint32* IfxGtm_Atom_Ch_getCompareOnePointer | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Returns the compare one pointer.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
compare one pointer

Definition at line 324 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Timer_getTriggerPointer().

◆ IfxGtm_Atom_Ch_getCompareZero()

IFX_EXTERN uint32 IfxGtm_Atom_Ch_getCompareZero | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Returns the compare zero value.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
compare zero value

Definition at line 332 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Ch_getCompareZeroPointer()

IFX_EXTERN volatile uint32* IfxGtm_Atom_Ch_getCompareZeroPointer | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Returns the compare zero pointer.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
compare zero pointer

Definition at line 340 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Ch_getCounterValue()

IFX_EXTERN uint32 IfxGtm_Atom_Ch_getCounterValue | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Get the counter value.

Parameters
atom | pointer to the ATOM instance
channel | channel index of the ATOM
Returns
counter value

Definition at line 529 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Ch_getOutputLevel()

IFX_EXTERN boolean IfxGtm_Atom_Ch_getOutputLevel | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Gets the ATOM output level.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
TRUE the output is high, FALSE the output is low

Definition at line 348 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Ch_getSrcPointer()

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxGtm_Atom_Ch_getSrcPointer | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Atom | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Returns a pointer to the ATOM channel SRC.

Parameters
gtm | Pointer to GTM module
atom | Specifies the atom object
channel | Channel index
Returns
Pointer to the TOM channel SRC

Definition at line 359 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Pwm_init(), and IfxGtm_Atom_Timer_init().

◆ IfxGtm_Atom_Ch_getTimerPointer()

IFX_EXTERN volatile uint32* IfxGtm_Atom_Ch_getTimerPointer | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Returns the Timer pointer.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
Timer pointer

Definition at line 366 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Timer_getPointer().

◆ IfxGtm_Atom_Ch_isOneNotification()

IFX_EXTERN boolean IfxGtm_Atom_Ch_isOneNotification | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Returns the status of channel One notification.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
Status of channel One notification

Definition at line 372 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Timer_acknowledgeTriggerIrq().

◆ IfxGtm_Atom_Ch_isZeroNotification()

IFX_EXTERN boolean IfxGtm_Atom_Ch_isZeroNotification | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Returns the status of channel Zero notification.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
Status of channel Zero notification

Definition at line 381 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Timer_acknowledgeTimerIrq().

◆ IfxGtm_Atom_Ch_raiseInterruptOne()

IFX_EXTERN void IfxGtm_Atom_Ch_raiseInterruptOne | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Raises the interrupt for Compare 1.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
None

Definition at line 390 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Ch_raiseInterruptZero()

IFX_EXTERN void IfxGtm_Atom_Ch_raiseInterruptZero | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Raises the interrupt for Compare 0.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
None

Definition at line 398 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Ch_setClockSource()

IFX_EXTERN void IfxGtm_Atom_Ch_setClockSource | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | IfxGtm_Cmu_Clk | clock
 | ) |  |

Sets the channel clock source.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
clock | Channel clock source
Returns
None

Definition at line 406 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Ch_setCompare()

IFX_EXTERN void IfxGtm_Atom_Ch_setCompare | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | uint32 | compareZero,
 |  | uint32 | compareOne
 | ) |  |

Sets the compare 0 and 1 values.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
compareZero | Compare zero value
compareOne | Compare one value
Returns
None

Definition at line 414 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Ch_setCompareOne()

IFX_EXTERN void IfxGtm_Atom_Ch_setCompareOne | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | uint32 | compareOne
 | ) |  |

Sets the compare 1 value.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
compareOne | Compare one value
Returns
None

Definition at line 423 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Pwm_init().

◆ IfxGtm_Atom_Ch_setCompareOneShadow()

IFX_EXTERN void IfxGtm_Atom_Ch_setCompareOneShadow | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | uint32 | shadowOne
 | ) |  |

Sets the compare 1 shadow value.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
shadowOne | Compare one shadow value
Returns
None

Definition at line 431 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Pwm_init(), and IfxGtm_Atom_Timer_setTrigger().

◆ IfxGtm_Atom_Ch_setCompareShadow()

IFX_INLINE void IfxGtm_Atom_Ch_setCompareShadow | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | uint32 | shadowZero,
 |  | uint32 | shadowOne
 | ) |  |

Sets the compare 0 and 1 shadow values.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
shadowZero | Compare zero shadow value
shadowOne | Compare one shadow value
Returns
None

Definition at line 637 of file IfxGtm_Atom.h.

Referenced by IfxGtm_Atom_Dtm_PwmHl_updateCenterAligned(), IfxGtm_Atom_Dtm_PwmHl_updateEdgeAligned(), IfxGtm_Atom_Dtm_PwmHl_updateOff(), IfxGtm_Atom_Dtm_PwmHl_updatePulse(), IfxGtm_Atom_Dtm_PwmHl_updateShiftCenterAligned(), IfxGtm_Atom_PwmHl_updateCenterAligned(), IfxGtm_Atom_PwmHl_updateEdgeAligned(), IfxGtm_Atom_PwmHl_updateOff(), IfxGtm_Atom_PwmHl_updatePulse(), and IfxGtm_Atom_PwmHl_updateShiftCenterAligned().

◆ IfxGtm_Atom_Ch_setCompareZero()

IFX_EXTERN void IfxGtm_Atom_Ch_setCompareZero | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | uint32 | compareZero
 | ) |  |

Sets the compare 0 value.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
compareZero | Compare zero value
Returns
None

Definition at line 439 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Pwm_init().

◆ IfxGtm_Atom_Ch_setCompareZeroShadow()

IFX_EXTERN void IfxGtm_Atom_Ch_setCompareZeroShadow | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | uint32 | shadowZero
 | ) |  |

Sets the compare 0 shadow value.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
shadowZero | Compare zero shadow value
Returns
None

Definition at line 447 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Pwm_init(), and IfxGtm_Atom_Timer_setPeriod().

◆ IfxGtm_Atom_Ch_setCounterValue()

IFX_EXTERN void IfxGtm_Atom_Ch_setCounterValue | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | uint32 | value
 | ) |  |

Sets the counter value.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
value | Counter value
Returns
None

Definition at line 455 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Timer_init().

◆ IfxGtm_Atom_Ch_setMode()

IFX_EXTERN void IfxGtm_Atom_Ch_setMode | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | IfxGtm_Atom_Mode | mode
 | ) |  |

set the Atom operating mode

Parameters
atom | Pointer to the ATOM object
channel | Channel index
mode | Atom operating mode
Returns
None

Definition at line 463 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Pwm_init().

◆ IfxGtm_Atom_Ch_setNotification()

IFX_EXTERN void IfxGtm_Atom_Ch_setNotification | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | IfxGtm_IrqMode | mode,
 |  | boolean | interruptOnCompareZero,
 |  | boolean | interruptOnCompareOne
 | ) |  |

Sets the channel notification.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
mode | Interrupt mode
interruptOnCompareZero | If TRUE, an interrupt is generated on compare 0, else no interrupt is generated
interruptOnCompareOne | If TRUE, an interrupt is generated on compare 1, else no interrupt is generated
Returns
None

Definition at line 471 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Pwm_init(), and IfxGtm_Atom_Timer_init().

◆ IfxGtm_Atom_Ch_setOneShotMode()

IFX_EXTERN void IfxGtm_Atom_Ch_setOneShotMode | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | boolean | enabled
 | ) |  |

Enable/disable the one shot mode.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
enabled | If TRUE, the feature is enabled, else disabled
Returns
None

Definition at line 489 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Timer_setSingleMode().

◆ IfxGtm_Atom_Ch_setResetSource()

IFX_EXTERN void IfxGtm_Atom_Ch_setResetSource | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | IfxGtm_Atom_Ch_ResetEvent | event
 | ) |  |

Sets the channel clock source either from local or from previous channel.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
event | Channel reset event
Returns
None

Definition at line 497 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Ch_setSignalLevel()

IFX_EXTERN void IfxGtm_Atom_Ch_setSignalLevel | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | Ifx_ActiveState | activeState
 | ) |  |

Sets the signal level.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
activeState | Signal level active state. In case the channel is reset, the output is set to not active. The signal is active between 0 and the leading edge (CM1) and inactive between the leading edge and the trailing edge (CM0).
Returns
None

Definition at line 505 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Pwm_init(), IfxGtm_Atom_PwmHl_setMode(), and IfxGtm_Atom_Timer_init().

◆ IfxGtm_Atom_Ch_setTriggerOutput()

IFX_EXTERN void IfxGtm_Atom_Ch_setTriggerOutput | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | IfxGtm_Atom_Ch_OutputTrigger | trigger
 | ) |  |

Sets the channel trigger output.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
trigger | Channel trigger output mode
Returns
None

Definition at line 513 of file IfxGtm_Atom.c.


iLLD_TC38A: ATOM AGC Functions

Functions
ATOM AGC Functions
iLLD » GTM » Standard Driver » Atom Basic Functionality
Collaboration diagram for ATOM AGC Functions:

Functions

IFX_INLINE void | IfxGtm_Atom_Agc_setChannelsUpdate (Ifx_GTM_ATOM_AGC *agc, uint32 value)
Sets the channels for update (UPEN) More...
IFX_EXTERN uint32 | IfxGtm_Atom_Agc_buildFeature (uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable. More...
IFX_EXTERN uint32 | IfxGtm_Atom_Agc_buildFeatureForChannel (IfxGtm_Atom_Ch channel, boolean enabled, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable for a single channel. More...
IFX_EXTERN void | IfxGtm_Atom_Agc_enableChannel (Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel (ENDIS) More...
IFX_EXTERN void | IfxGtm_Atom_Agc_enableChannelOutput (Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel output (OUTEN) More...
IFX_EXTERN void | IfxGtm_Atom_Agc_enableChannelUpdate (Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled)
Enable/disable one channel for update (UPEN) More...
IFX_EXTERN void | IfxGtm_Atom_Agc_enableChannels (Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels (ENDIS) More...
IFX_EXTERN void | IfxGtm_Atom_Agc_enableChannelsOutput (Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels output (OUTEN) More...
IFX_EXTERN void | IfxGtm_Atom_Agc_enableChannelsTrigger (Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask)
Enable/disable the TGC channels trigger. More...
IFX_EXTERN void | IfxGtm_Atom_Agc_enableChannelsUpdate (Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask)
Enable/disable one or more channels for update (UPEN) More...
IFX_EXTERN void | IfxGtm_Atom_Agc_enableTimeTrigger (Ifx_GTM_ATOM_AGC *agc, boolean enabled)
Enable/disable the time base trigger. More...
IFX_EXTERN void | IfxGtm_Atom_Agc_resetChannels (Ifx_GTM_ATOM_AGC *agc, uint32 resetMask)
Reset one or more channels. More...
IFX_EXTERN void | IfxGtm_Atom_Agc_setChannelForceUpdate (Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean resetEnabled)
Enable/disable one channel for update (FUPD) More...
IFX_EXTERN void | IfxGtm_Atom_Agc_setChannelsForceUpdate (Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
Enable/disable one or more channels for the force update feature (FUPD) More...
IFX_EXTERN void | IfxGtm_Atom_Agc_setTimeTrigger (Ifx_GTM_ATOM_AGC *agc, IfxGtm_Tbu_Ts base, uint32 value)
Sets the trigger time base and time base value. More...
IFX_EXTERN void | IfxGtm_Atom_Agc_trigger (Ifx_GTM_ATOM_AGC *agc)
Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG) More...

Detailed Description

Function Documentation

◆ IfxGtm_Atom_Agc_buildFeature()

IFX_EXTERN uint32 IfxGtm_Atom_Agc_buildFeature | ( | uint16 | enableMask,
 |  | uint16 | disableMask,
 |  | uint8 | bitfieldOffset
 | ) |  |

Builds the register value for the feature enable/disable.

Parameters
enableMask | Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
disableMask | Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
bitfieldOffset | Offset of the channel 0 bitfield in the register
Returns
The register value

Definition at line 61 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Agc_enableChannels(), IfxGtm_Atom_Agc_enableChannelsOutput(), IfxGtm_Atom_Agc_enableChannelsTrigger(), IfxGtm_Atom_Agc_enableChannelsUpdate(), IfxGtm_Atom_Agc_setChannelsForceUpdate(), and IfxGtm_Atom_Timer_addToChannelMask().

◆ IfxGtm_Atom_Agc_buildFeatureForChannel()

IFX_EXTERN uint32 IfxGtm_Atom_Agc_buildFeatureForChannel | ( | IfxGtm_Atom_Ch | channel,
 |  | boolean | enabled,
 |  | uint8 | bitfieldOffset
 | ) |  |

Builds the register value for the feature enable/disable for a single channel.

Parameters
channel | Channel index
enabled | Enable/ Disable choise of the feature
bitfieldOffset | Offset of the channel 0 bitfield in the register
Returns
The register value

Definition at line 89 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Agc_enableChannel(), IfxGtm_Atom_Agc_enableChannelOutput(), IfxGtm_Atom_Agc_enableChannelUpdate(), and IfxGtm_Atom_Agc_setChannelForceUpdate().

◆ IfxGtm_Atom_Agc_enableChannel()

IFX_EXTERN void IfxGtm_Atom_Agc_enableChannel | ( | Ifx_GTM_ATOM_AGC * | agc,
 |  | IfxGtm_Atom_Ch | channel,
 |  | boolean | enabled,
 |  | boolean | immediate
 | ) |  |

Enable/disable one channel (ENDIS)

Parameters
agc | Pointer to the AGC object
channel | Channel index
enabled | Enable/ Disable choise of the feature
immediate | If TRUE, the action is done immediately else, the action is done on AGC trigger (CTRL_TRIG)
Returns
None

Definition at line 109 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Pwm_init(), IfxGtm_Atom_Pwm_start(), and IfxGtm_Atom_Pwm_stop().

◆ IfxGtm_Atom_Agc_enableChannelOutput()

IFX_EXTERN void IfxGtm_Atom_Agc_enableChannelOutput | ( | Ifx_GTM_ATOM_AGC * | agc,
 |  | IfxGtm_Atom_Ch | channel,
 |  | boolean | enabled,
 |  | boolean | immediate
 | ) |  |

Enable/disable one channel output (OUTEN)

Parameters
agc | Pointer to the AGC object
channel | Channel index
enabled | Enable/ Disable choise of the feature
immediate | If TRUE, the action is done immediately else, the action is done on TGC trigger (CTRL_TRIG)
Returns
None

Definition at line 127 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Pwm_init(), IfxGtm_Atom_Pwm_start(), and IfxGtm_Atom_Pwm_stop().

◆ IfxGtm_Atom_Agc_enableChannels()

IFX_EXTERN void IfxGtm_Atom_Agc_enableChannels | ( | Ifx_GTM_ATOM_AGC * | agc,
 |  | uint16 | enableMask,
 |  | uint16 | disableMask,
 |  | boolean | immediate
 | ) |  |

Enable/disable one or more channels (ENDIS)

Parameters
agc | Pointer to the AGC object
enableMask | Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
disableMask | Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
immediate | If TRUE, the action is done immediately else, the action is done on TGC trigger (CTRL_TRIG)
Returns
None

Definition at line 151 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Dtm_PwmHl_init(), IfxGtm_Atom_PwmHl_init(), IfxGtm_Atom_Timer_init(), IfxGtm_Atom_Timer_run(), and IfxGtm_Atom_Timer_stop().

◆ IfxGtm_Atom_Agc_enableChannelsOutput()

IFX_EXTERN void IfxGtm_Atom_Agc_enableChannelsOutput | ( | Ifx_GTM_ATOM_AGC * | agc,
 |  | uint16 | enableMask,
 |  | uint16 | disableMask,
 |  | boolean | immediate
 | ) |  |

Enable/disable one or more channels output (OUTEN)

Parameters
agc | Pointer to the TGC object
enableMask | Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
disableMask | Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
immediate | If TRUE, the action is done immediately else, the action is done on TGC trigger (CTRL_TRIG)
Returns
None

Definition at line 169 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Dtm_PwmHl_init(), IfxGtm_Atom_PwmHl_init(), and IfxGtm_Atom_Timer_init().

◆ IfxGtm_Atom_Agc_enableChannelsTrigger()

IFX_EXTERN void IfxGtm_Atom_Agc_enableChannelsTrigger | ( | Ifx_GTM_ATOM_AGC * | agc,
 |  | uint16 | enableMask,
 |  | uint16 | disableMask
 | ) |  |

Enable/disable the TGC channels trigger.

Parameters
agc | Pointer to the AGC object
enableMask | Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
disableMask | Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
Returns
None

Definition at line 187 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Agc_enableChannelsUpdate()

IFX_EXTERN void IfxGtm_Atom_Agc_enableChannelsUpdate | ( | Ifx_GTM_ATOM_AGC * | agc,
 |  | uint16 | enableMask,
 |  | uint16 | disableMask
 | ) |  |

Enable/disable one or more channels for update (UPEN)

Parameters
agc | Pointer to the AGC object
enableMask | Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
disableMask | Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
Returns
None

Definition at line 193 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Agc_enableChannelUpdate()

IFX_EXTERN void IfxGtm_Atom_Agc_enableChannelUpdate | ( | Ifx_GTM_ATOM_AGC * | agc,
 |  | IfxGtm_Atom_Ch | channel,
 |  | boolean | enabled
 | ) |  |

Enable/disable one channel for update (UPEN)

Parameters
agc | Pointer to the AGC object
channel | Channel index
enabled | Enable/ Disable choise of the feature
Returns
None

Definition at line 145 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Pwm_init().

◆ IfxGtm_Atom_Agc_enableTimeTrigger()

IFX_EXTERN void IfxGtm_Atom_Agc_enableTimeTrigger | ( | Ifx_GTM_ATOM_AGC * | agc,
 |  | boolean | enabled
 | ) |  |

Enable/disable the time base trigger.

Parameters
agc | Pointer to the AGC object
enabled | If TRUE, the trigger is enabled else disabled
Returns
None

Definition at line 199 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Agc_resetChannels()

IFX_EXTERN void IfxGtm_Atom_Agc_resetChannels | ( | Ifx_GTM_ATOM_AGC * | agc,
 |  | uint32 | resetMask
 | ) |  |

Reset one or more channels.

Parameters
agc | Pointer to the AGC object
resetMask | Mask for the channel reset (bit 0: Channel 0, bit 1: channel 1, ...)
Returns
None

Definition at line 205 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Agc_setChannelForceUpdate()

IFX_EXTERN void IfxGtm_Atom_Agc_setChannelForceUpdate | ( | Ifx_GTM_ATOM_AGC * | agc,
 |  | IfxGtm_Atom_Ch | channel,
 |  | boolean | enabled,
 |  | boolean | resetEnabled
 | ) |  |

Enable/disable one channel for update (FUPD)

Parameters
agc | Pointer to the AGC object
channel | Channel index
enabled | Enable/ Disable choise of the feature
resetEnabled | Enable/ Disable reset choise of the feature
Returns
None

Definition at line 224 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Pwm_init().

◆ IfxGtm_Atom_Agc_setChannelsForceUpdate()

IFX_EXTERN void IfxGtm_Atom_Agc_setChannelsForceUpdate | ( | Ifx_GTM_ATOM_AGC * | agc,
 |  | uint16 | enableMask,
 |  | uint16 | disableMask,
 |  | uint16 | resetEnableMask,
 |  | uint16 | resetDisableMask
 | ) |  |

Enable/disable one or more channels for the force update feature (FUPD)

Parameters
agc | Pointer to the AGC object
enableMask | Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
disableMask | Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
resetEnableMask | Mask for the enabled channels counter reset on force update (bit 0: Channel 0, bit 1: channel 1, ...) Channel 0, bit 1: channel 1, ...)
resetDisableMask | Mask for the disabled channels with no counter reset on force update (bit 0: Channel 0, bit 1: channel 1, ...)
Returns
None

Definition at line 235 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Dtm_PwmHl_init(), IfxGtm_Atom_PwmHl_init(), and IfxGtm_Atom_Timer_init().

◆ IfxGtm_Atom_Agc_setChannelsUpdate()

IFX_INLINE void IfxGtm_Atom_Agc_setChannelsUpdate | ( | Ifx_GTM_ATOM_AGC * | agc,
 |  | uint32 | value
 | ) |  |

Sets the channels for update (UPEN)

Parameters
agc | Pointer to the AGC object
value | value for the channel enable (bit 0: Channel 0, bit 1: channel 1, ...)
Returns
None

Definition at line 646 of file IfxGtm_Atom.h.

Referenced by IfxGtm_Atom_Timer_applyUpdate(), and IfxGtm_Atom_Timer_disableUpdate().

◆ IfxGtm_Atom_Agc_setTimeTrigger()

IFX_EXTERN void IfxGtm_Atom_Agc_setTimeTrigger | ( | Ifx_GTM_ATOM_AGC * | agc,
 |  | IfxGtm_Tbu_Ts | base,
 |  | uint32 | value
 | ) |  |

Sets the trigger time base and time base value.

Parameters
agc | Pointer to the AGC object
base | Time base used for comparison
value | Compare value that raise the trigger
Returns
None

Definition at line 245 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Agc_trigger()

IFX_EXTERN void IfxGtm_Atom_Agc_trigger ( Ifx_GTM_ATOM_AGC * agc )

Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG)

Parameters
agc Pointer to the AGC object
Returns
None

Definition at line 256 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Dtm_PwmHl_init(), IfxGtm_Atom_Pwm_init(), IfxGtm_Atom_Pwm_start(), IfxGtm_Atom_Pwm_stop(), IfxGtm_Atom_PwmHl_init(), and IfxGtm_Atom_Timer_init().


iLLD_TC38A: ATOM Module Functions

Functions
ATOM Module Functions
iLLD » GTM » Standard Driver » Atom Basic Functionality
Collaboration diagram for ATOM Module Functions:

Functions

IFX_INLINE void IfxGtm_Atom_setTout (uint32 toutNum, uint32 toutSel)
Configures the tout selection. More...

Detailed Description

Function Documentation

◆ IfxGtm_Atom_setTout()

IFX_INLINE void IfxGtm_Atom_setTout | ( | uint32 | toutNum,
 |  | uint32 | toutSel
 | ) |  |

Configures the tout selection.

Parameters
toutNum | TOUT number
toutSel | TOUTselection
Returns
None

Definition at line 652 of file IfxGtm_Atom.h.


iLLD_TC38A: Cmu Basic Functionality

Modules
Cmu Basic Functionality
iLLD » GTM » Standard Driver
Collaboration diagram for Cmu Basic Functionality:

Modules

CMU Enumerations
CMU Basic Functions

Detailed Description


iLLD_TC38A: CMU Enumerations

Enumerations
CMU Enumerations
iLLD » GTM » Standard Driver » Cmu Basic Functionality
Collaboration diagram for CMU Enumerations:

Enumerations

enum IfxGtm_Cmu_Clk {
IfxGtm_Cmu_Clk_0 = 0,
IfxGtm_Cmu_Clk_1,
IfxGtm_Cmu_Clk_2,
IfxGtm_Cmu_Clk_3,
IfxGtm_Cmu_Clk_4,
IfxGtm_Cmu_Clk_5,
IfxGtm_Cmu_Clk_6,
IfxGtm_Cmu_Clk_7
}
enum IfxGtm_Cmu_Eclk {
IfxGtm_Cmu_Eclk_0 = 0,
IfxGtm_Cmu_Eclk_1,
IfxGtm_Cmu_Eclk_2
}
enum IfxGtm_Cmu_Fxclk {
IfxGtm_Cmu_Fxclk_0 = 0,
IfxGtm_Cmu_Fxclk_1,
IfxGtm_Cmu_Fxclk_2,
IfxGtm_Cmu_Fxclk_3,
IfxGtm_Cmu_Fxclk_4
}
enum IfxGtm_Cmu_Tim_Filter_Clk {
IfxGtm_Cmu_Tim_Filter_Clk_0,
IfxGtm_Cmu_Tim_Filter_Clk_1,
IfxGtm_Cmu_Tim_Filter_Clk_6,
IfxGtm_Cmu_Tim_Filter_Clk_7
}
Tim Filter counter frequency select. More...

Detailed Description

Enumeration Type Documentation

◆ IfxGtm_Cmu_Clk

enum IfxGtm_Cmu_Clk
Enumerator
IfxGtm_Cmu_Clk_0
IfxGtm_Cmu_Clk_1
IfxGtm_Cmu_Clk_2
IfxGtm_Cmu_Clk_3
IfxGtm_Cmu_Clk_4
IfxGtm_Cmu_Clk_5
IfxGtm_Cmu_Clk_6
IfxGtm_Cmu_Clk_7

Definition at line 64 of file IfxGtm_Cmu.h.

◆ IfxGtm_Cmu_Eclk

enum IfxGtm_Cmu_Eclk
Enumerator
IfxGtm_Cmu_Eclk_0
IfxGtm_Cmu_Eclk_1
IfxGtm_Cmu_Eclk_2

Definition at line 76 of file IfxGtm_Cmu.h.

◆ IfxGtm_Cmu_Fxclk

enum IfxGtm_Cmu_Fxclk
Enumerator
IfxGtm_Cmu_Fxclk_0
IfxGtm_Cmu_Fxclk_1
IfxGtm_Cmu_Fxclk_2
IfxGtm_Cmu_Fxclk_3
IfxGtm_Cmu_Fxclk_4

Definition at line 83 of file IfxGtm_Cmu.h.

◆ IfxGtm_Cmu_Tim_Filter_Clk

enum IfxGtm_Cmu_Tim_Filter_Clk

Tim Filter counter frequency select.

Enumerator
IfxGtm_Cmu_Tim_Filter_Clk_0 | FLT_CNT counts with CMU_CLK0.
IfxGtm_Cmu_Tim_Filter_Clk_1 | FLT_CNT counts with CMU_CLK1.
IfxGtm_Cmu_Tim_Filter_Clk_6 | FLT_CNT counts with CMU_CLK6.
IfxGtm_Cmu_Tim_Filter_Clk_7 | FLT_CNT counts with CMU_CLK7.

Definition at line 94 of file IfxGtm_Cmu.h.


iLLD_TC38A: CMU Basic Functions

Functions
CMU Basic Functions
iLLD » GTM » Standard Driver » Cmu Basic Functionality
Collaboration diagram for CMU Basic Functions:

Functions

IFX_EXTERN void | IfxGtm_Cmu_enableClocks (Ifx_GTM *gtm, uint32 clkMask)
Enable / Disable the configurable, fixed, and external clocks. More...
IFX_EXTERN float32 | IfxGtm_Cmu_getClkFrequency (Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean assumeEnabled)
Returns the GTM configurable clock frequency in Hz. More...
IFX_EXTERN float32 | IfxGtm_Cmu_getEclkFrequency (Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex, boolean assumeEnabled)
Returns the GTM external clock frequency in Hz. More...
IFX_EXTERN float32 | IfxGtm_Cmu_getFxClkFrequency (Ifx_GTM *gtm, IfxGtm_Cmu_Fxclk clkIndex, boolean assumeEnabled)
Returns the GTM fixed clock frequency in Hz. More...
IFX_EXTERN float32 | IfxGtm_Cmu_getGclkFrequency (Ifx_GTM *gtm)
Returns the GTM global clock frequency in Hz. More...
IFX_EXTERN float32 | IfxGtm_Cmu_getModuleFrequency (Ifx_GTM *gtm)
returns the CMU module frequency in Hz. This is only for CMU module frequency. For GTM SYS frequency: IfxGtm_getSysClkFrequency() is to be used. More...
IFX_EXTERN boolean | IfxGtm_Cmu_isClkClockEnabled (Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex)
Returns the configurable clock enable status. More...
IFX_EXTERN boolean | IfxGtm_Cmu_isEclkClockEnabled (Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex)
Returns the external clock enable status. More...
IFX_EXTERN boolean | IfxGtm_Cmu_isFxClockEnabled (Ifx_GTM *gtm)
Returns the fixed clock enable status. More...
IFX_EXTERN void | IfxGtm_Cmu_selectClkInput (Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean useGlobal)
Select the clock input for CLK6 and CLK7 note The frequency can only be modified when the corresponding clock is disabled using IfxGtm_Cmu_enableClocks() More...
IFX_EXTERN void | IfxGtm_Cmu_setClkFrequency (Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, float32 frequency)
Set the GTM configurable clock frequency in Hz. More...
IFX_EXTERN void | IfxGtm_Cmu_setEclkFrequency (Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex, float32 frequency)
Set the GTM external clock frequency in Hz. More...
IFX_EXTERN void | IfxGtm_Cmu_setGclkFrequency (Ifx_GTM *gtm, float32 frequency)
Set the GTM global clock frequency in Hz. More...

Detailed Description

Function Documentation

◆ IfxGtm_Cmu_enableClocks()

IFX_EXTERN void IfxGtm_Cmu_enableClocks | ( | Ifx_GTM * | gtm,
 |  | uint32 | clkMask
 | ) |  |

Enable / Disable the configurable, fixed, and external clocks.

Parameters
gtm | Pointer to GTM module
clkMask | Enable / Disable mask.
Returns
None

Definition at line 58 of file IfxGtm_Cmu.c.

◆ IfxGtm_Cmu_getClkFrequency()

IFX_EXTERN float32 IfxGtm_Cmu_getClkFrequency | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Cmu_Clk | clkIndex,
 |  | boolean | assumeEnabled
 | ) |  |

Returns the GTM configurable clock frequency in Hz.

Parameters
gtm | Pointer to GTM module
clkIndex | Index of the configurable clock 0=CMU_CLK0, 1=CMU_CLK1, ...
assumeEnabled | When TRUE, attempt to calculate the frequency as if the clock is enabled.
Returns
GTM configurable clock frequency in Hz

Definition at line 64 of file IfxGtm_Cmu.c.

Referenced by IfxGtm_Atom_Ch_getClockFrequency(), IfxGtm_Cmu_getFxClkFrequency(), IfxGtm_Dtm_getClockFrequency(), IfxGtm_Tbu_getClockFrequency(), IfxGtm_Tim_Ch_getCaptureClockFrequency(), IfxGtm_Tim_Ch_getFilterClockFrequency(), and IfxGtm_Tim_Ch_getTimeoutClockFrequency().

◆ IfxGtm_Cmu_getEclkFrequency()

IFX_EXTERN float32 IfxGtm_Cmu_getEclkFrequency | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Cmu_Eclk | clkIndex,
 |  | boolean | assumeEnabled
 | ) |  |

Returns the GTM external clock frequency in Hz.

Parameters
gtm | Pointer to GTM module
clkIndex | Index of the external clock 0=CMU_ECLK0, 1=CMU_ECLK1, ...
assumeEnabled | When TRUE, attempt to calculate the frequency as if the clock is enabled.
Returns
GTM external clock frequency in Hz

Definition at line 118 of file IfxGtm_Cmu.c.

◆ IfxGtm_Cmu_getFxClkFrequency()

IFX_EXTERN float32 IfxGtm_Cmu_getFxClkFrequency | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Cmu_Fxclk | clkIndex,
 |  | boolean | assumeEnabled
 | ) |  |

Returns the GTM fixed clock frequency in Hz.

Parameters
gtm | Pointer to GTM module
clkIndex | Index of the fixed clock 0=CMU_FXCLK0, 1=CMU_FXCLK1, ...
assumeEnabled | When TRUE, attempt to calculate the frequency as if the clock is enabled.
Returns
GTM fixed clock frequency in Hz

Definition at line 138 of file IfxGtm_Cmu.c.

Referenced by IfxGtm_Dtm_getClockFrequency(), and IfxGtm_Tom_Ch_getClockFrequency().

◆ IfxGtm_Cmu_getGclkFrequency()

IFX_EXTERN float32 IfxGtm_Cmu_getGclkFrequency ( Ifx_GTM * gtm )

Returns the GTM global clock frequency in Hz.

Parameters
gtm Pointer to GTM module
Returns
GTM global clock frequency in Hz

Definition at line 199 of file IfxGtm_Cmu.c.

Referenced by IfxGtm_Cmu_getClkFrequency(), IfxGtm_Cmu_getEclkFrequency(), IfxGtm_Cmu_getFxClkFrequency(), IfxGtm_Cmu_setClkFrequency(), and IfxGtm_Cmu_setEclkFrequency().

◆ IfxGtm_Cmu_getModuleFrequency()

IFX_EXTERN float32 IfxGtm_Cmu_getModuleFrequency ( Ifx_GTM * gtm )

returns the CMU module frequency in Hz. This is only for CMU module frequency. For GTM SYS frequency: IfxGtm_getSysClkFrequency() is to be used.

Parameters
gtm Pointer to GTM module
Returns
GTM module frequency in Hz

Definition at line 209 of file IfxGtm_Cmu.c.

Referenced by IfxGtm_Cmu_getGclkFrequency(), and IfxGtm_Cmu_setGclkFrequency().

◆ IfxGtm_Cmu_isClkClockEnabled()

IFX_EXTERN boolean IfxGtm_Cmu_isClkClockEnabled | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Cmu_Clk | clkIndex
 | ) |  |

Returns the configurable clock enable status.

Parameters
gtm | Pointer to GTM module
clkIndex | Index of the configurable clock 0=CMU_CLK0, 1=CMU_CLK1, ...
Returns
TRUE The clock is enabled, FALSE The clock is disabled

Definition at line 215 of file IfxGtm_Cmu.c.

Referenced by IfxGtm_Cmu_getClkFrequency().

◆ IfxGtm_Cmu_isEclkClockEnabled()

IFX_EXTERN boolean IfxGtm_Cmu_isEclkClockEnabled | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Cmu_Eclk | clkIndex
 | ) |  |

Returns the external clock enable status.

Parameters
gtm | Pointer to GTM module
clkIndex | Index of the external clock 0=CMU_ECLK0, 1=CMU_ECLK1, ...
Returns
TRUE The clock is enabled, FALSE The clock is disabled

Definition at line 221 of file IfxGtm_Cmu.c.

Referenced by IfxGtm_Cmu_getEclkFrequency().

◆ IfxGtm_Cmu_isFxClockEnabled()

IFX_EXTERN boolean IfxGtm_Cmu_isFxClockEnabled ( Ifx_GTM * gtm )

Returns the fixed clock enable status.

Parameters
gtm Pointer to GTM module
Returns
TRUE The clock is enabled, FALSE The clock is disabled

Definition at line 227 of file IfxGtm_Cmu.c.

Referenced by IfxGtm_Cmu_getFxClkFrequency().

◆ IfxGtm_Cmu_selectClkInput()

IFX_EXTERN void IfxGtm_Cmu_selectClkInput | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Cmu_Clk | clkIndex,
 |  | boolean | useGlobal
 | ) |  |

Select the clock input for CLK6 and CLK7 note The frequency can only be modified when the corresponding clock is disabled using IfxGtm_Cmu_enableClocks()

Parameters
gtm | Pointer to GTM module
clkIndex | Index of the configurable clock 0=CMU_CLK0, 1=CMU_CLK1, ...
useGlobal | if TRUE, uses the global clock as an input, else use the SUB_INC input
Returns
None

Definition at line 233 of file IfxGtm_Cmu.c.

◆ IfxGtm_Cmu_setClkFrequency()

IFX_EXTERN void IfxGtm_Cmu_setClkFrequency | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Cmu_Clk | clkIndex,
 |  | float32 | frequency
 | ) |  |

Set the GTM configurable clock frequency in Hz.

Parameters
gtm | Pointer to GTM module
clkIndex | Index of the configurable clock 0=CMU_CLK0, 1=CMU_CLK1, ...
frequency | Frequency in Hz
Returns
None

Definition at line 249 of file IfxGtm_Cmu.c.

◆ IfxGtm_Cmu_setEclkFrequency()

IFX_EXTERN void IfxGtm_Cmu_setEclkFrequency | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Cmu_Eclk | clkIndex,
 |  | float32 | frequency
 | ) |  |

Set the GTM external clock frequency in Hz.

Parameters
gtm | Pointer to GTM module
clkIndex | Index of the external clock 0=CMU_ECLK0, 1=CMU_ECLK1, ...
frequency | Frequency in Hz
Returns
None

Definition at line 286 of file IfxGtm_Cmu.c.

◆ IfxGtm_Cmu_setGclkFrequency()

IFX_EXTERN void IfxGtm_Cmu_setGclkFrequency | ( | Ifx_GTM * | gtm,
 |  | float32 | frequency
 | ) |  |

Set the GTM global clock frequency in Hz.

Parameters
gtm | Pointer to GTM module
frequency | Frequency in Hz
Returns
None

Definition at line 334 of file IfxGtm_Cmu.c.


iLLD_TC38A: Dpll Basic Functionality

Modules
Dpll Basic Functionality
iLLD » GTM » Standard Driver
Collaboration diagram for Dpll Basic Functionality:

Modules

DPLL Basic Functions

Detailed Description


iLLD_TC38A: DPLL Basic Functions

Functions
DPLL Basic Functions
iLLD » GTM » Standard Driver » Dpll Basic Functionality
Collaboration diagram for DPLL Basic Functions:

Functions

IFX_EXTERN float32 IfxGtm_Dpll_getSubIncFrequency (Ifx_GTM *gtm, IfxGtm_Dpll_SubInc index)
Dummy Function, returns 0.0F. More...

Detailed Description

Function Documentation

◆ IfxGtm_Dpll_getSubIncFrequency()

IFX_EXTERN float32 IfxGtm_Dpll_getSubIncFrequency | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Dpll_SubInc | index
 | ) |  |

Dummy Function, returns 0.0F.

Parameters
gtm | Pointer to GTM module
index | Dpll subincrement index
Returns
frequency

Definition at line 52 of file IfxGtm_Dpll.c.

Referenced by IfxGtm_Cmu_getClkFrequency().


iLLD_TC38A: Dtm Basic Functionality

Modules
Dtm Basic Functionality
iLLD » GTM » Standard Driver
Collaboration diagram for Dtm Basic Functionality:

Modules

DTM Enumerations
DTM Functions

Detailed Description


iLLD_TC38A: DTM Enumerations

Enumerations
DTM Enumerations
iLLD » GTM » Standard Driver » Dtm Basic Functionality
Collaboration diagram for DTM Enumerations:

Enumerations

enum IfxGtm_Dtm_ClockSource {
IfxGtm_Dtm_ClockSource_systemClock,
IfxGtm_Dtm_ClockSource_cmuClock0,
IfxGtm_Dtm_ClockSource_cmuClock1,
IfxGtm_Dtm_ClockSource_cmuClock2
}
Clock source for DTM object
Definition in IfxGTM.DTM[i].CTRL.B.CLKSEL ( i = 0 to 35) More...
enum IfxGtm_Dtm_Output1Function {
IfxGtm_Dtm_Output1Function_signalEdgeTrigger,
IfxGtm_Dtm_Output1Function_xorOfDtmInputandShiftSignal,
IfxGtm_Dtm_Output1Function_andOfDtmInputandShiftSignal,
IfxGtm_Dtm_Output1Function_dtmInputSignal
}
Output x function of channel y
Definition in IfxGTM.DTM[i].CH.CTRL1.B.O1Fx ( i = 0 to 35 and x = 0 to 3) More...
enum IfxGtm_Dtm_Output1Select {
IfxGtm_Dtm_Output1Select_inverseDeadTime,
IfxGtm_Dtm_Output1Select_specialFunction
}
Output 1 selection of channel x (x = 0 to 3)
Definition in IfxGTM.DTM[i].CH.CTRL1.B.O1SELx ( i = 0 to 35 and x = 0 to 3) More...

Detailed Description

Enumeration Type Documentation

◆ IfxGtm_Dtm_ClockSource

enum IfxGtm_Dtm_ClockSource

Clock source for DTM object
Definition in IfxGTM.DTM[i].CTRL.B.CLKSEL ( i = 0 to 35)

Enumerator
IfxGtm_Dtm_ClockSource_systemClock | SYS_CLK as clock source.
IfxGtm_Dtm_ClockSource_cmuClock0 | CMU_CLK0 as clock source.
IfxGtm_Dtm_ClockSource_cmuClock1 | CMU_CLK1 (if DTM is connected to ATOM) or CMU_FXCLK0 (if DTM is connected to TOM) as clock source.
IfxGtm_Dtm_ClockSource_cmuClock2 | CMU_CLK2 (if DTM is connected to ATOM) or CMU_FXCLK1 (if DTM is connected to TOM) as clock source.

Definition at line 70 of file IfxGtm_Dtm.h.

◆ IfxGtm_Dtm_Output1Function

enum IfxGtm_Dtm_Output1Function

Output x function of channel y
Definition in IfxGTM.DTM[i].CH.CTRL1.B.O1Fx ( i = 0 to 35 and x = 0 to 3)

Enumerator
IfxGtm_Dtm_Output1Function_signalEdgeTrigger | Signal Edge Trigger.
IfxGtm_Dtm_Output1Function_xorOfDtmInputandShiftSignal | XOR Of Dtm Input and Shift Signal.
IfxGtm_Dtm_Output1Function_andOfDtmInputandShiftSignal | AND Of Dtm Input and Shift Signal.
IfxGtm_Dtm_Output1Function_dtmInputSignal | DTM Input Signal DTM[i]_INx_T (i = 0 to 35 and x = 0 to 3)

Definition at line 81 of file IfxGtm_Dtm.h.

◆ IfxGtm_Dtm_Output1Select

enum IfxGtm_Dtm_Output1Select

Output 1 selection of channel x (x = 0 to 3)
Definition in IfxGTM.DTM[i].CH.CTRL1.B.O1SELx ( i = 0 to 35 and x = 0 to 3)

Enumerator
IfxGtm_Dtm_Output1Select_inverseDeadTime | Inverse Dead Time.
IfxGtm_Dtm_Output1Select_specialFunction | Special Function as selected by O1Fx (x = 0 to 3)

Definition at line 92 of file IfxGtm_Dtm.h.


iLLD_TC38A: DTM Functions

Functions
DTM Functions
iLLD » GTM » Standard Driver » Dtm Basic Functionality
Collaboration diagram for DTM Functions:

Functions

IFX_INLINE void | IfxGtm_Dtm_setClockSource (Ifx_GTM_CDTM_DTM *dtm, IfxGtm_Dtm_ClockSource clockSource)
Sets the clock source for DTM object. More...
IFX_INLINE void | IfxGtm_Dtm_setOutput0DeadTimePath (Ifx_GTM_CDTM_DTM *dtm, IfxGtm_Dtm_Ch channel, IfxGtm_Dtm_DeadTimePath deadTimePath)
Sets the Output 0 Dead Time Path for DTM channel. More...
IFX_INLINE void | IfxGtm_Dtm_setOutput1DeadTimePath (Ifx_GTM_CDTM_DTM *dtm, IfxGtm_Dtm_Ch channel, IfxGtm_Dtm_DeadTimePath deadTimePath)
Sets the Output 1 Dead Time Path for DTM channel. More...
IFX_INLINE void | IfxGtm_Dtm_setOutput1Function (Ifx_GTM_CDTM_DTM *dtm, IfxGtm_Dtm_Ch channel, IfxGtm_Dtm_Output1Function output1Function)
Sets the Output Function for DTM channel. More...
IFX_INLINE void | IfxGtm_Dtm_setOutput1Select (Ifx_GTM_CDTM_DTM *dtm, IfxGtm_Dtm_Ch channel, IfxGtm_Dtm_Output1Select output1Select)
Sets the Output Selection for DTM channel. More...

Detailed Description

Function Documentation

◆ IfxGtm_Dtm_setClockSource()

IFX_INLINE void IfxGtm_Dtm_setClockSource | ( | Ifx_GTM_CDTM_DTM * | dtm,
 |  | IfxGtm_Dtm_ClockSource | clockSource
 | ) |  |

Sets the clock source for DTM object.

Parameters
dtm | Pointer to the DTM object
clockSource | Clock source for DTM object
Returns
None

Definition at line 212 of file IfxGtm_Dtm.h.

Referenced by IfxGtm_Atom_Dtm_PwmHl_init(), IfxGtm_Atom_Pwm_init(), IfxGtm_Tom_Dtm_PwmHl_init(), and IfxGtm_Tom_Pwm_init().

◆ IfxGtm_Dtm_setOutput0DeadTimePath()

IFX_INLINE void IfxGtm_Dtm_setOutput0DeadTimePath | ( | Ifx_GTM_CDTM_DTM * | dtm,
 |  | IfxGtm_Dtm_Ch | channel,
 |  | IfxGtm_Dtm_DeadTimePath | deadTimePath
 | ) |  |

Sets the Output 0 Dead Time Path for DTM channel.

Parameters
dtm | Pointer to the DTM object
channel | Channel index
deadTimePath | Dead Time Path for Dtm chhannel output
Returns
None

Definition at line 218 of file IfxGtm_Dtm.h.

Referenced by IfxGtm_Atom_Dtm_PwmHl_init(), IfxGtm_Atom_Pwm_init(), IfxGtm_Tom_Dtm_PwmHl_init(), and IfxGtm_Tom_Pwm_init().

◆ IfxGtm_Dtm_setOutput1DeadTimePath()

IFX_INLINE void IfxGtm_Dtm_setOutput1DeadTimePath | ( | Ifx_GTM_CDTM_DTM * | dtm,
 |  | IfxGtm_Dtm_Ch | channel,
 |  | IfxGtm_Dtm_DeadTimePath | deadTimePath
 | ) |  |

Sets the Output 1 Dead Time Path for DTM channel.

Parameters
dtm | Pointer to the DTM object
channel | Channel index
deadTimePath | Dead Time Path for Dtm chhannel output
Returns
None

Definition at line 227 of file IfxGtm_Dtm.h.

Referenced by IfxGtm_Atom_Dtm_PwmHl_init(), IfxGtm_Atom_Pwm_init(), IfxGtm_Tom_Dtm_PwmHl_init(), and IfxGtm_Tom_Pwm_init().

◆ IfxGtm_Dtm_setOutput1Function()

IFX_INLINE void IfxGtm_Dtm_setOutput1Function | ( | Ifx_GTM_CDTM_DTM * | dtm,
 |  | IfxGtm_Dtm_Ch | channel,
 |  | IfxGtm_Dtm_Output1Function | output1Function
 | ) |  |

Sets the Output Function for DTM channel.

Parameters
dtm | Pointer to the DTM object
channel | Channel index
output1Function | Output 1 function
Returns
None

Definition at line 236 of file IfxGtm_Dtm.h.

Referenced by IfxGtm_Atom_Pwm_init(), and IfxGtm_Tom_Pwm_init().

◆ IfxGtm_Dtm_setOutput1Select()

IFX_INLINE void IfxGtm_Dtm_setOutput1Select | ( | Ifx_GTM_CDTM_DTM * | dtm,
 |  | IfxGtm_Dtm_Ch | channel,
 |  | IfxGtm_Dtm_Output1Select | output1Select
 | ) |  |

Sets the Output Selection for DTM channel.

Parameters
dtm | Pointer to the DTM object
channel | Channel index
output1Select | Output 1 selection
Returns
None

Definition at line 245 of file IfxGtm_Dtm.h.

Referenced by IfxGtm_Atom_Pwm_init(), and IfxGtm_Tom_Pwm_init().


iLLD_TC38A: PSM

Modules
PSM
iLLD » GTM » Standard Driver
Collaboration diagram for PSM:

Modules

PSM Data Structures
PSM Enumerations
PSM Functions

Detailed Description


iLLD_TC38A: PSM Data Structures

PSM Data Structures
iLLD » GTM » Standard Driver » PSM
Collaboration diagram for PSM Data Structures:


iLLD_TC38A: PSM Enumerations

Enumerations
PSM Enumerations
iLLD » GTM » Standard Driver » PSM
Collaboration diagram for PSM Enumerations:

Enumerations

enum IfxGtm_Psm_F2aStream {
IfxGtm_Psm_F2aStream_0,
IfxGtm_Psm_F2aStream_1,
IfxGtm_Psm_F2aStream_2,
IfxGtm_Psm_F2aStream_3,
IfxGtm_Psm_F2aStream_4,
IfxGtm_Psm_F2aStream_5,
IfxGtm_Psm_F2aStream_6,
IfxGtm_Psm_F2aStream_7
}
Enumeration listing the F2A streams. More...
enum IfxGtm_Psm_F2aStreamState {
IfxGtm_Psm_F2aStreamState_readDisabled = 0,
IfxGtm_Psm_F2aStreamState_disabled = 1,
IfxGtm_Psm_F2aStreamState_enabled = 2,
IfxGtm_Psm_F2aStreamState_readEnabled = 3
}
Enumeration lisitng the enabled/disabled state of the F2A channel streams. More...
enum IfxGtm_Psm_F2aTransferDirection {
IfxGtm_Psm_F2aTransferDirection_aruToFifo = 0,
IfxGtm_Psm_F2aTransferDirection_fifoToAru = 1
}
Enumeration listing the transfer direction of the F2a Streams. Definition in F2A_CH_STR_CFG.B.DIR. More...
enum IfxGtm_Psm_F2aTransferMode {
IfxGtm_Psm_F2aTransferMode_transferLowWord = 0,
IfxGtm_Psm_F2aTransferMode_transferHighWord = 1,
IfxGtm_Psm_F2aTransferMode_transferBothWords = 2
}
Enumeration listing the Transfer Mode of the F2A. Definition in F2A_CH_STR_CFG.TMODE. More...
enum IfxGtm_Psm_FifoChannel {
IfxGtm_Psm_FifoChannel_0,
IfxGtm_Psm_FifoChannel_1,
IfxGtm_Psm_FifoChannel_2,
IfxGtm_Psm_FifoChannel_3,
IfxGtm_Psm_FifoChannel_4,
IfxGtm_Psm_FifoChannel_5,
IfxGtm_Psm_FifoChannel_6,
IfxGtm_Psm_FifoChannel_7
}
Enumeration lisiting Fifo Channels. More...
enum IfxGtm_Psm_FifoChannelDmaHystDir {
IfxGtm_Psm_FifoChannelDmaHystDir_read = 0,
IfxGtm_Psm_FifoChannelDmaHystDir_write = 1
}
Enumeration list of the DMA direction in hysteresis modes.
definition in FIFO_CH_IRQ_MODE.DMA_HYST_DIR. More...
enum IfxGtm_Psm_FifoChannelInterrupt {
IfxGtm_Psm_FifoChannelInterrupt_empty = 0,
IfxGtm_Psm_FifoChannelInterrupt_full = 1,
IfxGtm_Psm_FifoChannelInterrupt_lowerWm = 2,
IfxGtm_Psm_FifoChannelInterrupt_upperWm = 3
}
Interrupts of the Fifo Channel. More...
enum IfxGtm_Psm_FifoChannelMode {
IfxGtm_Psm_FifoChannelMode_normal = 0,
IfxGtm_Psm_FifoChannelMode_ringBuffer = 1
}
Enumeration list for modes of FIFO operation.
Definition in FIFO_CH_CTRL.RBM. More...
enum IfxGtm_Psm_FifoChannelStatus {
IfxGtm_Psm_FifoChannelStatus_empty = 0,
IfxGtm_Psm_FifoChannelStatus_full = 1,
IfxGtm_Psm_FifoChannelStatus_lowerWm = 2,
IfxGtm_Psm_FifoChannelStatus_upperWm = 3,
IfxGtm_Psm_FifoChannelStatus_normal = 4
}
Enumeration listing the Fifo Channel Status.
Definition in FIFO_CH_STATUS register. More...
enum IfxGtm_Psm_InterruptMode {
IfxGtm_Psm_InterruptMode_level = 0,
IfxGtm_Psm_InterruptMode_pulse = 1,
IfxGtm_Psm_InterruptMode_pulseNotify = 2,
IfxGtm_Psm_InterruptMode_singlePulse = 3
}
List of mode of interrupt Definition in FIFO_CH_IRQ_MODE.IRQ_MODE. More...

Detailed Description

Enumeration Type Documentation

◆ IfxGtm_Psm_F2aStream

enum IfxGtm_Psm_F2aStream

Enumeration listing the F2A streams.

Enumerator
IfxGtm_Psm_F2aStream_0 | F2A Stream 0.
IfxGtm_Psm_F2aStream_1 | F2A Stream 1.
IfxGtm_Psm_F2aStream_2 | F2A Stream 2.
IfxGtm_Psm_F2aStream_3 | F2A Stream 3.
IfxGtm_Psm_F2aStream_4 | F2A Stream 4.
IfxGtm_Psm_F2aStream_5 | F2A Stream 5.
IfxGtm_Psm_F2aStream_6 | F2A Stream 6.
IfxGtm_Psm_F2aStream_7 | F2A Stream 7.

Definition at line 78 of file IfxGtm_Psm.h.

◆ IfxGtm_Psm_F2aStreamState

enum IfxGtm_Psm_F2aStreamState

Enumeration lisitng the enabled/disabled state of the F2A channel streams.

Enumerator
IfxGtm_Psm_F2aStreamState_readDisabled | Read as disabled.
IfxGtm_Psm_F2aStreamState_disabled | Stream disabled and states reset.
IfxGtm_Psm_F2aStreamState_enabled | Stream enabled.
IfxGtm_Psm_F2aStreamState_readEnabled | Read as enabled.

Definition at line 92 of file IfxGtm_Psm.h.

◆ IfxGtm_Psm_F2aTransferDirection

enum IfxGtm_Psm_F2aTransferDirection

Enumeration listing the transfer direction of the F2a Streams. Definition in F2A_CH_STR_CFG.B.DIR.

Enumerator
IfxGtm_Psm_F2aTransferDirection_aruToFifo | ARU to FIFO transfer.
IfxGtm_Psm_F2aTransferDirection_fifoToAru | FIFO to ARU transfer.

Definition at line 103 of file IfxGtm_Psm.h.

◆ IfxGtm_Psm_F2aTransferMode

enum IfxGtm_Psm_F2aTransferMode

Enumeration listing the Transfer Mode of the F2A. Definition in F2A_CH_STR_CFG.TMODE.

Enumerator
IfxGtm_Psm_F2aTransferMode_transferLowWord | Transfer ARU bits 23:0 from/to FIFO.
IfxGtm_Psm_F2aTransferMode_transferHighWord | Transfer ARU bits 47:24 from/to FIFO.
IfxGtm_Psm_F2aTransferMode_transferBothWords | Transfer Both words from/to FIFO.

Definition at line 112 of file IfxGtm_Psm.h.

◆ IfxGtm_Psm_FifoChannel

enum IfxGtm_Psm_FifoChannel

Enumeration lisiting Fifo Channels.

Enumerator
IfxGtm_Psm_FifoChannel_0 | FIFO Channel 0.
IfxGtm_Psm_FifoChannel_1 | FIFO Channel 1.
IfxGtm_Psm_FifoChannel_2 | FIFO Channel 2.
IfxGtm_Psm_FifoChannel_3 | FIFO Channel 3.
IfxGtm_Psm_FifoChannel_4 | FIFO Channel 4.
IfxGtm_Psm_FifoChannel_5 | FIFO Channel 5.
IfxGtm_Psm_FifoChannel_6 | FIFO Channel 6.
IfxGtm_Psm_FifoChannel_7 | FIFO Channel 7.

Definition at line 121 of file IfxGtm_Psm.h.

◆ IfxGtm_Psm_FifoChannelDmaHystDir

enum IfxGtm_Psm_FifoChannelDmaHystDir

Enumeration list of the DMA direction in hysteresis modes.
definition in FIFO_CH_IRQ_MODE.DMA_HYST_DIR.

Enumerator
IfxGtm_Psm_FifoChannelDmaHystDir_read | read direction
IfxGtm_Psm_FifoChannelDmaHystDir_write | write

Definition at line 136 of file IfxGtm_Psm.h.

◆ IfxGtm_Psm_FifoChannelInterrupt

enum IfxGtm_Psm_FifoChannelInterrupt

Interrupts of the Fifo Channel.

Enumerator
IfxGtm_Psm_FifoChannelInterrupt_empty | empty Fifo Channel
IfxGtm_Psm_FifoChannelInterrupt_full | full fifo channel
IfxGtm_Psm_FifoChannelInterrupt_lowerWm | Lower watermark reached.
IfxGtm_Psm_FifoChannelInterrupt_upperWm | Upper watermark reached,.

Definition at line 144 of file IfxGtm_Psm.h.

◆ IfxGtm_Psm_FifoChannelMode

enum IfxGtm_Psm_FifoChannelMode

Enumeration list for modes of FIFO operation.
Definition in FIFO_CH_CTRL.RBM.

Enumerator
IfxGtm_Psm_FifoChannelMode_normal | normal mode of operation
IfxGtm_Psm_FifoChannelMode_ringBuffer | Ring Buffer Mode.

Definition at line 155 of file IfxGtm_Psm.h.

◆ IfxGtm_Psm_FifoChannelStatus

enum IfxGtm_Psm_FifoChannelStatus

Enumeration listing the Fifo Channel Status.
Definition in FIFO_CH_STATUS register.

Enumerator
IfxGtm_Psm_FifoChannelStatus_empty | empty
IfxGtm_Psm_FifoChannelStatus_full | full
IfxGtm_Psm_FifoChannelStatus_lowerWm | Lower Watermark reached.
IfxGtm_Psm_FifoChannelStatus_upperWm | Upper Watermark reached.
IfxGtm_Psm_FifoChannelStatus_normal | normal running status

Definition at line 164 of file IfxGtm_Psm.h.

◆ IfxGtm_Psm_InterruptMode

enum IfxGtm_Psm_InterruptMode

List of mode of interrupt Definition in FIFO_CH_IRQ_MODE.IRQ_MODE.

Enumerator
IfxGtm_Psm_InterruptMode_level | level mode
IfxGtm_Psm_InterruptMode_pulse | pulse mode
IfxGtm_Psm_InterruptMode_pulseNotify | pulse notify mode
IfxGtm_Psm_InterruptMode_singlePulse | single pulse mode

Definition at line 176 of file IfxGtm_Psm.h.


iLLD_TC38A: PSM Functions

Functions
PSM Functions
iLLD » GTM » Standard Driver » PSM
Collaboration diagram for PSM Functions:

Functions

IFX_INLINE void | IfxGtm_Psm_Fifo_setChannelMode (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, IfxGtm_Psm_FifoChannelMode mode)
sets the mode of operation of FIFO More...
IFX_INLINE Ifx_GTM_PSM_FIFO_CH * | IfxGtm_Psm_Fifo_getChannelPointer (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
get the Pointer to the Fifo Channel SFR More...
IFX_INLINE Ifx_GTM_PSM_FIFO * | IfxGtm_Psm_Fifo_getPointer (IfxGtm_Psm_Fifo fifo)
get pointer to the FIFO object SFR block More...
IFX_INLINE void | IfxGtm_Psm_Fifo_flushChannelFifo (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
Flush the contents of the specified Fifo Channel. More...
IFX_INLINE void | IfxGtm_Psm_Fifo_enableRamAccess (IfxGtm_Psm_Fifo fifo)
Unlock the direct RAM access to the FIFO specified. This control bit applies RAM write access to all channels of the specified FIFO. More...
IFX_INLINE void | IfxGtm_Psm_Fifo_disableRamAccess (IfxGtm_Psm_Fifo fifo)
Disable Direct RAM access to the specified Fifo. The setting is applicable to all channels of specified Fifo. More...
IFX_INLINE uint32 | IfxGtm_Psm_Fifo_getChannelStartAddress (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
get the logical start address of the Fifo Channel. The address range is 0 - (IFXGTM_PSM_FIFORAMSIZE-1). More...
IFX_INLINE uint32 | IfxGtm_Psm_Fifo_getChannelEndAddress (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
get the logical end address of the Fifo Channel. The address range is 0 - (IFXGTM_PSM_FIFORAMSIZE-1). More...
IFX_INLINE uint32 | IfxGtm_Psm_Fifo_getChannelSize (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
get the RAM size usage of the specified FIFO channel. Returns the value : (END_ADDRESS - START_ADDRESS) + 1 Each unit is 29 bits wide. More...
IFX_INLINE uint32 | IfxGtm_Psm_Fifo_getChannelFillLevel (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
get the Fill level of the Fifo Channel specified. The Fill level is in range: 0 < Level <= ( (END_ADDRESS - START_ADDRESS) + 1 ) More...
IFX_INLINE uint32 | IfxGtm_Psm_Fifo_getChannelUpperWatermark (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
Get the upper watermark level of the Fifo Channel. More...
IFX_INLINE uint32 | IfxGtm_Psm_Fifo_getChannelLowerWatermark (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
Get the Lower watermark level of the Fifo Channel. More...
IFX_INLINE uint32 | IfxGtm_Psm_Fifo_getChannelWritePtr (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
get the write pointer of the specified Fifo Channel More...
IFX_INLINE uint32 | IfxGtm_Psm_Fifo_getChannelReadPtr (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
get the read pointer of the specified Fifo Channel More...
IFX_INLINE boolean | IfxGtm_Psm_Fifo_getChannelInterruptStatus (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, IfxGtm_Psm_FifoChannelInterrupt interrupt)
get the Status of Interrupt raised. More...
IFX_INLINE void | IfxGtm_Psm_Fifo_setChannelInterruptMode (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, IfxGtm_Psm_InterruptMode irqmode)
set the mode of interrupt More...
IFX_INLINE void | IfxGtm_Psm_Fifo_setChannelDmaHystMode (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, boolean enabled, IfxGtm_Psm_FifoChannelDmaHystDir dir)
set the mode of DMA hysteresis. More...
IFX_INLINE void | IfxGtm_Psm_Fifo_clearChannelInterrupt (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, IfxGtm_Psm_FifoChannelInterrupt interrupt)
clear the interrupt of specified type. More...
IFX_INLINE void | IfxGtm_Psm_Fifo_clearAllChannelInterrupts (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
clear all the interrupts for the Fifo Channel More...
IFX_INLINE Ifx_GTM_PSM_F2A * | IfxGtm_Psm_F2a_getPointer (IfxGtm_Psm_F2a f2a)
get the pointer to the F2A of the specified Fifo object. More...
IFX_INLINE void | IfxGtm_Psm_F2a_setAruReadAddress (IfxGtm_Psm_F2a f2a, IfxGtm_Psm_F2aStream f2aStream, uint32 address)
set the ARU read address of the specified F2A stream More...
IFX_INLINE void | IfxGtm_Psm_F2a_setTransferMode (IfxGtm_Psm_F2a f2a, IfxGtm_Psm_F2aStream f2aStream, IfxGtm_Psm_F2aTransferMode mode)
set the Transfer Mode of the F2A stream. More...
IFX_INLINE IfxGtm_Psm_F2aTransferMode | IfxGtm_Psm_F2a_getTransferMode (IfxGtm_Psm_F2a f2a, IfxGtm_Psm_F2aStream f2aStream)
get the Transfer mode of the specified F2A stream. More...
IFX_INLINE void | IfxGtm_Psm_F2a_setTransferDirection (IfxGtm_Psm_F2a f2a, IfxGtm_Psm_F2aStream f2aStream, IfxGtm_Psm_F2aTransferDirection dir)
set the transfer direction of the F2A stream. More...
IFX_INLINE IfxGtm_Psm_F2aTransferDirection | IfxGtm_Psm_F2a_getTransferDirection (IfxGtm_Psm_F2a f2a, IfxGtm_Psm_F2aStream f2aStream)
get the transfer direction of the F2A stream. More...
IFX_INLINE Ifx_SRC_SRCR * | IfxGtm_Psm_Fifo_getChannelSrcPointer (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
get the SRC pointer for the specified FIFO channel. More...
IFX_INLINE Ifx_GTM_PSM_AFD_CH * | IfxGtm_Psm_Afd_getChannelPointer (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
get the Pointer to the AFD buffer for Fifo channel. More...
IFX_INLINE void | IfxGtm_Psm_Afd_writeChannelBuffer (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, uint32 data)
write the data into the Buffer access register of specified Fifo Channel More...
IFX_EXTERN void | IfxGtm_Psm_Fifo_setChannelEndAddress (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, uint32 address)
Set the logical end address for the specified Fifo Channel. The address range is 0 - (IFXGTM_PSM_FIFORAMSIZE - 1). END address should be in range: START address<address<IFXGTM_PSM_FIFORAMSIZE. More...
IFX_EXTERN void | IfxGtm_Psm_Fifo_setChannelStartAddress (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, uint32 address)
Set the logical start address for the specified Fifo Channel. The address range is 0 - (IFXGTM_PSM_FIFORAMSIZE - 1). START address should be in range: 0<address<IFXGTM_PSM_FIFORAMSIZE. More...
IFX_EXTERN void | IfxGtm_Psm_Fifo_setChannelSize (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, uint32 size)
set the RAM size of the specified FIFO channel. The RAM size should be in range: 0 - ((IFXGTM_PSM_FIFORAMSIZE - START address) + 1) Caution: This will modify the END address of the Fifo Channel RAM. This will also flush the FIFO as the END address gets modified. More...
IFX_EXTERN void | IfxGtm_Psm_Fifo_setChannelUpperWatermark (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, uint32 upperWm)
set the upper watermark of the specified Fifo Channel. Upper watermark must be in range: 0 < addr < (END_ADDRESS - START_ADDRESS) More...
IFX_EXTERN void | IfxGtm_Psm_Fifo_setChannelLowerWatermark (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, uint32 lowerWm)
set the upper watermark of the specified Fifo Channel. Upper watermark must be in range: 0 < addr < (END_ADDRESS - START_ADDRESS) More...
IFX_EXTERN IfxGtm_Psm_FifoChannelStatus | IfxGtm_Psm_Fifo_getChannelStatus (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
get the Status of the Fifo Channel. Returns either Full, Empty, Upper WM or Lower WM reached status. If none of the above, it will return "normal" status. More...
IFX_EXTERN void | IfxGtm_Psm_Fifo_enableChannelInterrupt (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, IfxGtm_Psm_FifoChannelInterrupt interrupt)
enable the interrupt type More...
IFX_EXTERN void | IfxGtm_Psm_Fifo_disableChannelInterrupt (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, IfxGtm_Psm_FifoChannelInterrupt interrupt)
disable the interrupt for Fifo Channel More...
IFX_EXTERN void | IfxGtm_Psm_Fifo_setChannelInterrupt (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, IfxGtm_Psm_FifoChannelInterrupt interrupt)
forces the Interrupt from Fifo Channel More...
IFX_EXTERN void | IfxGtm_Psm_F2a_enableStream (IfxGtm_Psm_F2a f2a, IfxGtm_Psm_F2aStream f2aStream)
enable the selected stream of the F2A. More...
IFX_EXTERN void | IfxGtm_Psm_F2a_disableStream (IfxGtm_Psm_F2a f2a, IfxGtm_Psm_F2aStream f2aStream)
disables the specified stream of the F2A More...
IFX_EXTERN IfxGtm_Psm_F2aStreamState | IfxGtm_Psm_F2a_getStreamState (IfxGtm_Psm_F2a f2a, IfxGtm_Psm_F2aStream f2aStream)
get the state of the specified fifo stream. More...

Detailed Description

Function Documentation

◆ IfxGtm_Psm_Afd_getChannelPointer()

IFX_INLINE Ifx_GTM_PSM_AFD_CH * IfxGtm_Psm_Afd_getChannelPointer | ( | IfxGtm_Psm_Fifo | fifo,
 |  | IfxGtm_Psm_FifoChannel | channel
 | ) |  |

get the Pointer to the AFD buffer for Fifo channel.

Parameters
fifo | fifo object
channel | Fifo Channel
Returns
afd channel pointer

Definition at line 706 of file IfxGtm_Psm.h.

Referenced by IfxGtm_Psm_Afd_writeChannelBuffer().

◆ IfxGtm_Psm_Afd_writeChannelBuffer()

IFX_INLINE void IfxGtm_Psm_Afd_writeChannelBuffer | ( | IfxGtm_Psm_Fifo | fifo,
 |  | IfxGtm_Psm_FifoChannel | channel,
 |  | uint32 | data
 | ) |  |

write the data into the Buffer access register of specified Fifo Channel

Parameters
fifo | fifo object
channel | Fifo Channel
data | data to be written
Returns
None

Definition at line 712 of file IfxGtm_Psm.h.

◆ IfxGtm_Psm_F2a_disableStream()

IFX_EXTERN void IfxGtm_Psm_F2a_disableStream | ( | IfxGtm_Psm_F2a | f2a,
 |  | IfxGtm_Psm_F2aStream | f2aStream
 | ) |  |

disables the specified stream of the F2A

Parameters
f2a | f2a object number
f2aStream | f2a stream number
Returns
None

Definition at line 193 of file IfxGtm_Psm.c.

◆ IfxGtm_Psm_F2a_enableStream()

IFX_EXTERN void IfxGtm_Psm_F2a_enableStream | ( | IfxGtm_Psm_F2a | f2a,
 |  | IfxGtm_Psm_F2aStream | f2aStream
 | ) |  |

enable the selected stream of the F2A.

Parameters
f2a | f2a object number
f2aStream | f2a stream number
Returns
None

Definition at line 182 of file IfxGtm_Psm.c.

◆ IfxGtm_Psm_F2a_getPointer()

IFX_INLINE Ifx_GTM_PSM_F2A * IfxGtm_Psm_F2a_getPointer ( IfxGtm_Psm_F2a f2a )

get the pointer to the F2A of the specified Fifo object.

Parameters
f2a f2a object
Returns
pointer to f2a object sfr

Definition at line 654 of file IfxGtm_Psm.h.

Referenced by IfxGtm_Psm_F2a_disableStream(), IfxGtm_Psm_F2a_enableStream(), IfxGtm_Psm_F2a_getStreamState(), IfxGtm_Psm_F2a_getTransferDirection(), IfxGtm_Psm_F2a_getTransferMode(), IfxGtm_Psm_F2a_setAruReadAddress(), IfxGtm_Psm_F2a_setTransferDirection(), and IfxGtm_Psm_F2a_setTransferMode().

◆ IfxGtm_Psm_F2a_getStreamState()

IFX_EXTERN IfxGtm_Psm_F2aStreamState IfxGtm_Psm_F2a_getStreamState | ( | IfxGtm_Psm_F2a | f2a,
 |  | IfxGtm_Psm_F2aStream | f2aStream
 | ) |  |

get the state of the specified fifo stream.

Parameters
f2a | f2a object number
f2aStream | f2a stream number
Returns
stream state

Definition at line 204 of file IfxGtm_Psm.c.

◆ IfxGtm_Psm_F2a_getTransferDirection()

IFX_INLINE IfxGtm_Psm_F2aTransferDirection IfxGtm_Psm_F2a_getTransferDirection | ( | IfxGtm_Psm_F2a | f2a,
 |  | IfxGtm_Psm_F2aStream | f2aStream
 | ) |  |

get the transfer direction of the F2A stream.

Parameters
f2a | f2a object number
f2aStream | f2a stream number
Returns
transfer direction

Definition at line 692 of file IfxGtm_Psm.h.

◆ IfxGtm_Psm_F2a_getTransferMode()

IFX_INLINE IfxGtm_Psm_F2aTransferMode IfxGtm_Psm_F2a_getTransferMode | ( | IfxGtm_Psm_F2a | f2a,
 |  | IfxGtm_Psm_F2aStream | f2aStream
 | ) |  |

get the Transfer mode of the specified F2A stream.

Parameters
f2a | f2a object number
f2aStream | f2a stream number
Returns
transfer mode

Definition at line 676 of file IfxGtm_Psm.h.

◆ IfxGtm_Psm_F2a_setAruReadAddress()

IFX_INLINE void IfxGtm_Psm_F2a_setAruReadAddress | ( | IfxGtm_Psm_F2a | f2a,
 |  | IfxGtm_Psm_F2aStream | f2aStream,
 |  | uint32 | address
 | ) |  |

set the ARU read address of the specified F2A stream

Parameters
f2a | f2a object number
f2aStream | f2a stream number
address | ARU read address
Returns
None

Definition at line 660 of file IfxGtm_Psm.h.

◆ IfxGtm_Psm_F2a_setTransferDirection()

IFX_INLINE void IfxGtm_Psm_F2a_setTransferDirection | ( | IfxGtm_Psm_F2a | f2a,
 |  | IfxGtm_Psm_F2aStream | f2aStream,
 |  | IfxGtm_Psm_F2aTransferDirection | dir
 | ) |  |

set the transfer direction of the F2A stream.

Parameters
f2a | f2a object number
f2aStream | f2a stream number
dir | transfer direction
Returns
None

Definition at line 684 of file IfxGtm_Psm.h.

◆ IfxGtm_Psm_F2a_setTransferMode()

IFX_INLINE void IfxGtm_Psm_F2a_setTransferMode | ( | IfxGtm_Psm_F2a | f2a,
 |  | IfxGtm_Psm_F2aStream | f2aStream,
 |  | IfxGtm_Psm_F2aTransferMode | mode
 | ) |  |

set the Transfer Mode of the F2A stream.

Parameters
f2a | f2a object number
f2aStream | f2a stream number
mode | transfer mode
Returns
None

Definition at line 668 of file IfxGtm_Psm.h.

◆ IfxGtm_Psm_Fifo_clearAllChannelInterrupts()

IFX_INLINE void IfxGtm_Psm_Fifo_clearAllChannelInterrupts | ( | IfxGtm_Psm_Fifo | fifo,
 |  | IfxGtm_Psm_FifoChannel | channel
 | ) |  |

clear all the interrupts for the Fifo Channel

Parameters
fifo | fifo object
channel | Fifo Channel
Returns
None

Definition at line 647 of file IfxGtm_Psm.h.

◆ IfxGtm_Psm_Fifo_clearChannelInterrupt()

IFX_INLINE void IfxGtm_Psm_Fifo_clearChannelInterrupt | ( | IfxGtm_Psm_Fifo | fifo,
 |  | IfxGtm_Psm_FifoChannel | channel,
 |  | IfxGtm_Psm_FifoChannelInterrupt | interrupt
 | ) |  |

clear the interrupt of specified type.

Parameters
fifo | fifo object
channel | Fifo Channel
interrupt | interrupt type
Returns
None

Definition at line 640 of file IfxGtm_Psm.h.

◆ IfxGtm_Psm_Fifo_disableChannelInterrupt()

IFX_EXTERN void IfxGtm_Psm_Fifo_disableChannelInterrupt | ( | IfxGtm_Psm_Fifo | fifo,
 |  | IfxGtm_Psm_FifoChannel | channel,
 |  | IfxGtm_Psm_FifoChannelInterrupt | interrupt
 | ) |  |

disable the interrupt for Fifo Channel

Parameters
fifo | fifo object
channel | Fifo Channel
interrupt | interrupt type
Returns
None

Definition at line 164 of file IfxGtm_Psm.c.

◆ IfxGtm_Psm_Fifo_disableRamAccess()

IFX_INLINE void IfxGtm_Psm_Fifo_disableRamAccess ( IfxGtm_Psm_Fifo fifo )

Disable Direct RAM access to the specified Fifo. The setting is applicable to all channels of specified Fifo.

Parameters
fifo fifo object
Returns
None

Definition at line 552 of file IfxGtm_Psm.h.

◆ IfxGtm_Psm_Fifo_enableChannelInterrupt()

IFX_EXTERN void IfxGtm_Psm_Fifo_enableChannelInterrupt | ( | IfxGtm_Psm_Fifo | fifo,
 |  | IfxGtm_Psm_FifoChannel | channel,
 |  | IfxGtm_Psm_FifoChannelInterrupt | interrupt
 | ) |  |

enable the interrupt type

Parameters
fifo | fifo object
channel | Fifo Channel
interrupt | interrupt type
Returns
None

Definition at line 155 of file IfxGtm_Psm.c.

◆ IfxGtm_Psm_Fifo_enableRamAccess()

IFX_INLINE void IfxGtm_Psm_Fifo_enableRamAccess ( IfxGtm_Psm_Fifo fifo )

Unlock the direct RAM access to the FIFO specified. This control bit applies RAM write access to all channels of the specified FIFO.

Parameters
fifo fifo object
Returns
None

Definition at line 545 of file IfxGtm_Psm.h.

◆ IfxGtm_Psm_Fifo_flushChannelFifo()

IFX_INLINE void IfxGtm_Psm_Fifo_flushChannelFifo | ( | IfxGtm_Psm_Fifo | fifo,
 |  | IfxGtm_Psm_FifoChannel | channel
 | ) |  |

Flush the contents of the specified Fifo Channel.

Parameters
fifo | fifo object
channel | Fifo Channel
Returns
None

Definition at line 538 of file IfxGtm_Psm.h.

◆ IfxGtm_Psm_Fifo_getChannelEndAddress()

IFX_INLINE uint32 IfxGtm_Psm_Fifo_getChannelEndAddress | ( | IfxGtm_Psm_Fifo | fifo,
 |  | IfxGtm_Psm_FifoChannel | channel
 | ) |  |

get the logical end address of the Fifo Channel. The address range is 0 - (IFXGTM_PSM_FIFORAMSIZE-1).

Parameters
fifo | fifo object
channel | Fifo Channel
Returns
end address of the fifo channel

Definition at line 566 of file IfxGtm_Psm.h.

◆ IfxGtm_Psm_Fifo_getChannelFillLevel()

IFX_INLINE uint32 IfxGtm_Psm_Fifo_getChannelFillLevel | ( | IfxGtm_Psm_Fifo | fifo,
 |  | IfxGtm_Psm_FifoChannel | channel
 | ) |  |

get the Fill level of the Fifo Channel specified. The Fill level is in range: 0 < Level <= ( (END_ADDRESS - START_ADDRESS) + 1 )

Parameters
fifo | fifo object
channel | Fifo Channel
Returns
Fill level of the Fifo channel

Definition at line 580 of file IfxGtm_Psm.h.

◆ IfxGtm_Psm_Fifo_getChannelInterruptStatus()

IFX_INLINE boolean IfxGtm_Psm_Fifo_getChannelInterruptStatus | ( | IfxGtm_Psm_Fifo | fifo,
 |  | IfxGtm_Psm_FifoChannel | channel,
 |  | IfxGtm_Psm_FifoChannelInterrupt | interrupt
 | ) |  |

get the Status of Interrupt raised.

Parameters
fifo | fifo object
channel | Fifo Channel
interrupt | interrupt type
Returns
Interrupt Status

Definition at line 617 of file IfxGtm_Psm.h.

◆ IfxGtm_Psm_Fifo_getChannelLowerWatermark()

IFX_INLINE uint32 IfxGtm_Psm_Fifo_getChannelLowerWatermark | ( | IfxGtm_Psm_Fifo | fifo,
 |  | IfxGtm_Psm_FifoChannel | channel
 | ) |  |

Get the Lower watermark level of the Fifo Channel.

Parameters
fifo | fifo object
channel | Fifo Channel
Returns
Lower Watermark

Definition at line 594 of file IfxGtm_Psm.h.

◆ IfxGtm_Psm_Fifo_getChannelPointer()

IFX_INLINE Ifx_GTM_PSM_FIFO_CH * IfxGtm_Psm_Fifo_getChannelPointer | ( | IfxGtm_Psm_Fifo | fifo,
 |  | IfxGtm_Psm_FifoChannel | channel
 | ) |  |

get the Pointer to the Fifo Channel SFR

Parameters
fifo | fifo object
channel | Fifo Channel
Returns
Pointer to the FIFO channel SFR

Definition at line 526 of file IfxGtm_Psm.h.

Referenced by IfxGtm_Psm_Fifo_clearAllChannelInterrupts(), IfxGtm_Psm_Fifo_clearChannelInterrupt(), IfxGtm_Psm_Fifo_disableChannelInterrupt(), IfxGtm_Psm_Fifo_disableRamAccess(), IfxGtm_Psm_Fifo_enableChannelInterrupt(), IfxGtm_Psm_Fifo_enableRamAccess(), IfxGtm_Psm_Fifo_flushChannelFifo(), IfxGtm_Psm_Fifo_getChannelEndAddress(), IfxGtm_Psm_Fifo_getChannelFillLevel(), IfxGtm_Psm_Fifo_getChannelInterruptStatus(), IfxGtm_Psm_Fifo_getChannelLowerWatermark(), IfxGtm_Psm_Fifo_getChannelReadPtr(), IfxGtm_Psm_Fifo_getChannelSize(), IfxGtm_Psm_Fifo_getChannelStartAddress(), IfxGtm_Psm_Fifo_getChannelStatus(), IfxGtm_Psm_Fifo_getChannelUpperWatermark(), IfxGtm_Psm_Fifo_getChannelWritePtr(), IfxGtm_Psm_Fifo_setChannelDmaHystMode(), IfxGtm_Psm_Fifo_setChannelEndAddress(), IfxGtm_Psm_Fifo_setChannelInterrupt(), IfxGtm_Psm_Fifo_setChannelInterruptMode(), IfxGtm_Psm_Fifo_setChannelLowerWatermark(), IfxGtm_Psm_Fifo_setChannelMode(), IfxGtm_Psm_Fifo_setChannelSize(), IfxGtm_Psm_Fifo_setChannelStartAddress(), and IfxGtm_Psm_Fifo_setChannelUpperWatermark().

◆ IfxGtm_Psm_Fifo_getChannelReadPtr()

IFX_INLINE uint32 IfxGtm_Psm_Fifo_getChannelReadPtr | ( | IfxGtm_Psm_Fifo | fifo,
 |  | IfxGtm_Psm_FifoChannel | channel
 | ) |  |

get the read pointer of the specified Fifo Channel

Parameters
fifo | fifo object
channel | Fifo Channel
Returns
Read Pointer

Definition at line 609 of file IfxGtm_Psm.h.

◆ IfxGtm_Psm_Fifo_getChannelSize()

IFX_INLINE uint32 IfxGtm_Psm_Fifo_getChannelSize | ( | IfxGtm_Psm_Fifo | fifo,
 |  | IfxGtm_Psm_FifoChannel | channel
 | ) |  |

get the RAM size usage of the specified FIFO channel. Returns the value : (END_ADDRESS - START_ADDRESS) + 1 Each unit is 29 bits wide.

Parameters
fifo | fifo object
channel | Fifo Channel
Returns
size of the Fifo Channel

Definition at line 573 of file IfxGtm_Psm.h.

Referenced by IfxGtm_Psm_Fifo_setChannelLowerWatermark(), and IfxGtm_Psm_Fifo_setChannelUpperWatermark().

◆ IfxGtm_Psm_Fifo_getChannelSrcPointer()

IFX_INLINE Ifx_SRC_SRCR * IfxGtm_Psm_Fifo_getChannelSrcPointer | ( | IfxGtm_Psm_Fifo | fifo,
 |  | IfxGtm_Psm_FifoChannel | channel
 | ) |  |

get the SRC pointer for the specified FIFO channel.

Parameters
fifo | fifo object
channel | Fifo Channel
Returns
SRC pointer

Definition at line 700 of file IfxGtm_Psm.h.

◆ IfxGtm_Psm_Fifo_getChannelStartAddress()

IFX_INLINE uint32 IfxGtm_Psm_Fifo_getChannelStartAddress | ( | IfxGtm_Psm_Fifo | fifo,
 |  | IfxGtm_Psm_FifoChannel | channel
 | ) |  |

get the logical start address of the Fifo Channel. The address range is 0 - (IFXGTM_PSM_FIFORAMSIZE-1).

Parameters
fifo | fifo object
channel | Fifo Channel
Returns
start address of fifo channel

Definition at line 559 of file IfxGtm_Psm.h.

Referenced by IfxGtm_Psm_Fifo_setChannelEndAddress(), and IfxGtm_Psm_Fifo_setChannelSize().

◆ IfxGtm_Psm_Fifo_getChannelStatus()

IFX_EXTERN IfxGtm_Psm_FifoChannelStatus IfxGtm_Psm_Fifo_getChannelStatus | ( | IfxGtm_Psm_Fifo | fifo,
 |  | IfxGtm_Psm_FifoChannel | channel
 | ) |  |

get the Status of the Fifo Channel. Returns either Full, Empty, Upper WM or Lower WM reached status. If none of the above, it will return "normal" status.

Parameters
fifo | fifo object
channel | Fifo Channel
Returns
Status of the Fifo Channel

Definition at line 133 of file IfxGtm_Psm.c.

◆ IfxGtm_Psm_Fifo_getChannelUpperWatermark()

IFX_INLINE uint32 IfxGtm_Psm_Fifo_getChannelUpperWatermark | ( | IfxGtm_Psm_Fifo | fifo,
 |  | IfxGtm_Psm_FifoChannel | channel
 | ) |  |

Get the upper watermark level of the Fifo Channel.

Parameters
fifo | fifo object
channel | Fifo Channel
Returns
Upper Watermark

Definition at line 587 of file IfxGtm_Psm.h.

◆ IfxGtm_Psm_Fifo_getChannelWritePtr()

IFX_INLINE uint32 IfxGtm_Psm_Fifo_getChannelWritePtr | ( | IfxGtm_Psm_Fifo | fifo,
 |  | IfxGtm_Psm_FifoChannel | channel
 | ) |  |

get the write pointer of the specified Fifo Channel

Parameters
fifo | fifo object
channel | Fifo Channel
Returns
Write Pointer

Definition at line 601 of file IfxGtm_Psm.h.

◆ IfxGtm_Psm_Fifo_getPointer()

IFX_INLINE Ifx_GTM_PSM_FIFO * IfxGtm_Psm_Fifo_getPointer ( IfxGtm_Psm_Fifo fifo )

get pointer to the FIFO object SFR block

Parameters
fifo fifo object
Returns
Pointer to the FIFO SFR

Definition at line 532 of file IfxGtm_Psm.h.

◆ IfxGtm_Psm_Fifo_setChannelDmaHystMode()

IFX_INLINE void IfxGtm_Psm_Fifo_setChannelDmaHystMode | ( | IfxGtm_Psm_Fifo | fifo,
 |  | IfxGtm_Psm_FifoChannel | channel,
 |  | boolean | enabled,
 |  | IfxGtm_Psm_FifoChannelDmaHystDir | dir
 | ) |  |

set the mode of DMA hysteresis.

Parameters
fifo | fifo object
channel | Fifo Channel
enabled | DMA hysteresis enable
dir | direction
Returns
None

Definition at line 632 of file IfxGtm_Psm.h.

◆ IfxGtm_Psm_Fifo_setChannelEndAddress()

IFX_EXTERN void IfxGtm_Psm_Fifo_setChannelEndAddress | ( | IfxGtm_Psm_Fifo | fifo,
 |  | IfxGtm_Psm_FifoChannel | channel,
 |  | uint32 | address
 | ) |  |

Set the logical end address for the specified Fifo Channel. The address range is 0 - (IFXGTM_PSM_FIFORAMSIZE - 1). END address should be in range: START address<address<IFXGTM_PSM_FIFORAMSIZE.

Caution: A modification of the address will flush the corresponding Fifo Channel.

Parameters
fifo | fifo object
channel | Fifo Channel
address | End address of Fifo Channel
Returns
None

Definition at line 53 of file IfxGtm_Psm.c.

◆ IfxGtm_Psm_Fifo_setChannelInterrupt()

IFX_EXTERN void IfxGtm_Psm_Fifo_setChannelInterrupt | ( | IfxGtm_Psm_Fifo | fifo,
 |  | IfxGtm_Psm_FifoChannel | channel,
 |  | IfxGtm_Psm_FifoChannelInterrupt | interrupt
 | ) |  |

forces the Interrupt from Fifo Channel

Parameters
fifo | fifo object
channel | Fifo Channel
interrupt | interrupt type
Returns
None

Definition at line 173 of file IfxGtm_Psm.c.

◆ IfxGtm_Psm_Fifo_setChannelInterruptMode()

IFX_INLINE void IfxGtm_Psm_Fifo_setChannelInterruptMode | ( | IfxGtm_Psm_Fifo | fifo,
 |  | IfxGtm_Psm_FifoChannel | channel,
 |  | IfxGtm_Psm_InterruptMode | irqmode
 | ) |  |

set the mode of interrupt

Parameters
fifo | fifo object
channel | Fifo Channel
irqmode | Interrupt Mode
Returns
None

Definition at line 625 of file IfxGtm_Psm.h.

◆ IfxGtm_Psm_Fifo_setChannelLowerWatermark()

IFX_EXTERN void IfxGtm_Psm_Fifo_setChannelLowerWatermark | ( | IfxGtm_Psm_Fifo | fifo,
 |  | IfxGtm_Psm_FifoChannel | channel,
 |  | uint32 | lowerWm
 | ) |  |

set the upper watermark of the specified Fifo Channel. Upper watermark must be in range: 0 < addr < (END_ADDRESS - START_ADDRESS)

Parameters
fifo | fifo object
channel | Fifo Channel
lowerWm | Lower Watermark level
Returns
None

Definition at line 117 of file IfxGtm_Psm.c.

◆ IfxGtm_Psm_Fifo_setChannelMode()

IFX_INLINE void IfxGtm_Psm_Fifo_setChannelMode | ( | IfxGtm_Psm_Fifo | fifo,
 |  | IfxGtm_Psm_FifoChannel | channel,
 |  | IfxGtm_Psm_FifoChannelMode | mode
 | ) |  |

sets the mode of operation of FIFO

Parameters
fifo | Fifo Object
channel | Fifo Channel
mode | Fifo Channel mode
Returns
None

Definition at line 519 of file IfxGtm_Psm.h.

◆ IfxGtm_Psm_Fifo_setChannelSize()

IFX_EXTERN void IfxGtm_Psm_Fifo_setChannelSize | ( | IfxGtm_Psm_Fifo | fifo,
 |  | IfxGtm_Psm_FifoChannel | channel,
 |  | uint32 | size
 | ) |  |

set the RAM size of the specified FIFO channel. The RAM size should be in range: 0 - ((IFXGTM_PSM_FIFORAMSIZE - START address) + 1) Caution: This will modify the END address of the Fifo Channel RAM. This will also flush the FIFO as the END address gets modified.

Parameters
fifo | fifo object
channel | Fifo Channel
size | size of Fifo Channel
Returns
None

Definition at line 85 of file IfxGtm_Psm.c.

◆ IfxGtm_Psm_Fifo_setChannelStartAddress()

IFX_EXTERN void IfxGtm_Psm_Fifo_setChannelStartAddress | ( | IfxGtm_Psm_Fifo | fifo,
 |  | IfxGtm_Psm_FifoChannel | channel,
 |  | uint32 | address
 | ) |  |

Set the logical start address for the specified Fifo Channel. The address range is 0 - (IFXGTM_PSM_FIFORAMSIZE - 1). START address should be in range: 0<address<IFXGTM_PSM_FIFORAMSIZE.

Caution: A modification of the address will flush the corresponding Fifo Channel.

Parameters
fifo | fifo object
channel | Fifo Channel
address | Start address of Fifo Channel
Returns
None

Definition at line 70 of file IfxGtm_Psm.c.

◆ IfxGtm_Psm_Fifo_setChannelUpperWatermark()

IFX_EXTERN void IfxGtm_Psm_Fifo_setChannelUpperWatermark | ( | IfxGtm_Psm_Fifo | fifo,
 |  | IfxGtm_Psm_FifoChannel | channel,
 |  | uint32 | upperWm
 | ) |  |

set the upper watermark of the specified Fifo Channel. Upper watermark must be in range: 0 < addr < (END_ADDRESS - START_ADDRESS)

Parameters
fifo | fifo object
channel | Fifo Channel
upperWm | Upper Watermark level
Returns
None

Definition at line 101 of file IfxGtm_Psm.c.


iLLD_TC38A: Spe Basic Functionality

Modules
Spe Basic Functionality
iLLD » GTM » Standard Driver
Collaboration diagram for Spe Basic Functionality:

Modules

SPE Data Structures
SPE Enumerations
SPE Functions

Detailed Description


iLLD_TC38A: SPE Data Structures

Data Structures
SPE Data Structures
iLLD » GTM » Standard Driver » Spe Basic Functionality
Collaboration diagram for SPE Data Structures:

Data Structures

struct | IfxGtm_Spe_ChannelOutputs
specifies the output pattern structure. More...
struct | IfxGtm_Spe_PatternSignal
Struct describing the individual input signals in the pattern. More...
union | IfxGtm_Spe_InputPattern
Struct describing the pattern of Input signal to the SPE submodule. More...
union | IfxGtm_Spe_OutputPattern
specifies the output pattern to be given to the TOM output from given SPE. Union implementation can be read in word or individual channel output units. More...

Detailed Description

Data Structure Documentation

◆ IfxGtm_Spe_ChannelOutputs

struct IfxGtm_Spe_ChannelOutputs

specifies the output pattern structure.

Definition at line 211 of file IfxGtm_Spe.h.

Data Fields
uint32 | CH0: 2 | output from Channel 0
uint32 | CH1: 2 | output from Channel 0
uint32 | CH2: 2 | output from Channel 2
uint32 | CH3: 2 | output from Channel 3
uint32 | CH4: 2 | output from Channel 4
uint32 | CH5: 2 | output from Channel 5
uint32 | CH6: 2 | output from Channel 6
uint32 | CH7: 2 | output from Channel 7

◆ IfxGtm_Spe_PatternSignal

struct IfxGtm_Spe_PatternSignal

Struct describing the individual input signals in the pattern.

Definition at line 225 of file IfxGtm_Spe.h.

Data Fields
uint32 | valid: 1 | validity of the specified Pattern
uint32 | x: 1 | CHx input Signal.
uint32 | y: 1 | CHy input Signal.
uint32 | z: 1 | CHz input Signal.

◆ IfxGtm_Spe_InputPattern

union IfxGtm_Spe_InputPattern

Struct describing the pattern of Input signal to the SPE submodule.

Definition at line 239 of file IfxGtm_Spe.h.

Collaboration diagram for IfxGtm_Spe_InputPattern:
[legend]
Data Fields
IfxGtm_Spe_PatternSignal | Signal | Individual Pattern Signals.
uint32 | U | read pattern as word

◆ IfxGtm_Spe_OutputPattern

union IfxGtm_Spe_OutputPattern

specifies the output pattern to be given to the TOM output from given SPE. Union implementation can be read in word or individual channel output units.

Definition at line 248 of file IfxGtm_Spe.h.

Collaboration diagram for IfxGtm_Spe_OutputPattern:
[legend]
Data Fields
IfxGtm_Spe_ChannelOutputs | Outputs | Structure containing individual channel outputs.
uint32 | U | word


iLLD_TC38A: SPE Enumerations

Enumerations
SPE Enumerations
iLLD » GTM » Standard Driver » Spe Basic Functionality
Collaboration diagram for SPE Enumerations:

Enumerations

enum IfxGtm_Spe_ChannelOutputType {
IfxGtm_Spe_ChannelOutputType_tomCh0Sour = 0,
IfxGtm_Spe_ChannelOutputType_tomCh1Sour = 1,
IfxGtm_Spe_ChannelOutputType_0 = 2,
IfxGtm_Spe_ChannelOutputType_1 = 3
}
enumeration containing TOM channel output types possible from SPE. Used to specify the Channel outputs in individual SPE_OUT_PAT registers. More...
enum IfxGtm_Spe_ControlCommand {
IfxGtm_Spe_ControlCommand_patPtr = 0,
IfxGtm_Spe_ControlCommand_bwdPatPtr = 1,
IfxGtm_Spe_ControlCommand_outPat6 = 2,
IfxGtm_Spe_ControlCommand_outPat7 = 3
}
Specifies the type of control command which selects the output pattern register(OUT_PAT) used to udpate OUT_CTRL. Used to fill in the SPE_CTRL_CMD field in SPE_CMD register. More...
enum IfxGtm_Spe_Direction {
IfxGtm_Spe_Direction_fwd = 0,
IfxGtm_Spe_Direction_bwd = 1
}
Describes the rotation direction of the input signal patterns. More...
enum IfxGtm_Spe_InputSignal {
IfxGtm_Spe_InputSignal_chX = 0,
IfxGtm_Spe_InputSignal_chY = 1,
IfxGtm_Spe_InputSignal_chZ = 2
}
Input signal which is mapped from TIMj_CH(48) Used to set GTM.SPE.CTRL_STAT.B.SIEx. More...
enum IfxGtm_Spe_InterruptMode {
IfxGtm_Spe_InterruptMode_level = 0,
IfxGtm_Spe_InterruptMode_pulse = 1,
IfxGtm_Spe_InterruptMode_pulseNotify = 2,
IfxGtm_Spe_InterruptMode_singlePulse = 3
}
mode of interrupt - used to specify the IRQ_MODE register. More...
enum IfxGtm_Spe_InterruptSignal {
IfxGtm_Spe_InterruptSignal_nipd = 0,
IfxGtm_Spe_InterruptSignal_dchg = 1,
IfxGtm_Spe_InterruptSignal_perr = 2,
IfxGtm_Spe_InterruptSignal_bis = 3,
IfxGtm_Spe_InterruptSignal_rcmp = 4,
IfxGtm_Spe_InterruptSignal_count = 5
}
Enumeration containing interrupt signals from SPE. This is used to manipulate and retrieve interrupt flags from Interrupt control registers in SPE. More...
enum IfxGtm_Spe_OutChannel {
IfxGtm_Spe_OutChannel_0,
IfxGtm_Spe_OutChannel_1,
IfxGtm_Spe_OutChannel_2,
IfxGtm_Spe_OutChannel_3,
IfxGtm_Spe_OutChannel_4,
IfxGtm_Spe_OutChannel_5,
IfxGtm_Spe_OutChannel_6,
IfxGtm_Spe_OutChannel_7
}
SPE module output channel number. More...
enum IfxGtm_Spe_PatternIndex {
IfxGtm_Spe_PatternIndex_0,
IfxGtm_Spe_PatternIndex_1,
IfxGtm_Spe_PatternIndex_2,
IfxGtm_Spe_PatternIndex_3,
IfxGtm_Spe_PatternIndex_4,
IfxGtm_Spe_PatternIndex_5,
IfxGtm_Spe_PatternIndex_6,
IfxGtm_Spe_PatternIndex_7
}
Pattern Index Number of the valid Input sequence to the SPE. range from 0-7. More...

Detailed Description

Enumeration Type Documentation

◆ IfxGtm_Spe_ChannelOutputType

enum IfxGtm_Spe_ChannelOutputType

enumeration containing TOM channel output types possible from SPE. Used to specify the Channel outputs in individual SPE_OUT_PAT registers.

Enumerator
IfxGtm_Spe_ChannelOutputType_tomCh0Sour | set output to TOM Channel 0 SOUR output
IfxGtm_Spe_ChannelOutputType_tomCh1Sour | set output to TOM Channel 1 SOUR output
IfxGtm_Spe_ChannelOutputType_0 | set output to 0
IfxGtm_Spe_ChannelOutputType_1 | set output to 1

Definition at line 112 of file IfxGtm_Spe.h.

◆ IfxGtm_Spe_ControlCommand

enum IfxGtm_Spe_ControlCommand

Specifies the type of control command which selects the output pattern register(OUT_PAT) used to udpate OUT_CTRL. Used to fill in the SPE_CTRL_CMD field in SPE_CMD register.

Enumerator
IfxGtm_Spe_ControlCommand_patPtr | use SPE_PAT_PTR to select OUT_PAT
IfxGtm_Spe_ControlCommand_bwdPatPtr | Use SPE_PAT_PTR_BWD to select OUT_PAT.
IfxGtm_Spe_ControlCommand_outPat6 | Select OUT_PAT_6 directly.
IfxGtm_Spe_ControlCommand_outPat7 | Select OUT_PAT_7 directly.

Definition at line 123 of file IfxGtm_Spe.h.

◆ IfxGtm_Spe_Direction

enum IfxGtm_Spe_Direction

Describes the rotation direction of the input signal patterns.

Enumerator
IfxGtm_Spe_Direction_fwd | Rotation direction is forward (Incrementing pattern)
IfxGtm_Spe_Direction_bwd | Rotation direction is backwards (decrementing Pattern)

Definition at line 133 of file IfxGtm_Spe.h.

◆ IfxGtm_Spe_InputSignal

enum IfxGtm_Spe_InputSignal

Input signal which is mapped from TIMj_CH(48) Used to set GTM.SPE.CTRL_STAT.B.SIEx.

Enumerator
IfxGtm_Spe_InputSignal_chX | Select for CHx.
IfxGtm_Spe_InputSignal_chY | select for CHy
IfxGtm_Spe_InputSignal_chZ | select for CHz

Definition at line 142 of file IfxGtm_Spe.h.

◆ IfxGtm_Spe_InterruptMode

enum IfxGtm_Spe_InterruptMode

mode of interrupt - used to specify the IRQ_MODE register.

Enumerator
IfxGtm_Spe_InterruptMode_level | level mode
IfxGtm_Spe_InterruptMode_pulse | Pulse mode.
IfxGtm_Spe_InterruptMode_pulseNotify | Pulse Notify mode.
IfxGtm_Spe_InterruptMode_singlePulse | Single Pulse Mode.

Definition at line 151 of file IfxGtm_Spe.h.

◆ IfxGtm_Spe_InterruptSignal

enum IfxGtm_Spe_InterruptSignal

Enumeration containing interrupt signals from SPE. This is used to manipulate and retrieve interrupt flags from Interrupt control registers in SPE.

Enumerator
IfxGtm_Spe_InterruptSignal_nipd | new input pattern detected interrupt
IfxGtm_Spe_InterruptSignal_dchg | direction change interrupt
IfxGtm_Spe_InterruptSignal_perr | Pattern error: invalid input pattern interrupt.
IfxGtm_Spe_InterruptSignal_bis | Bouncing Input signal interrupt.
IfxGtm_Spe_InterruptSignal_rcmp | Revolution compare match interrupt.
IfxGtm_Spe_InterruptSignal_count | Number of interrupt signals from SPE.

Definition at line 162 of file IfxGtm_Spe.h.

◆ IfxGtm_Spe_OutChannel

enum IfxGtm_Spe_OutChannel

SPE module output channel number.

Enumerator
IfxGtm_Spe_OutChannel_0 | SPE output channel 0.
IfxGtm_Spe_OutChannel_1 | SPE output channel 1.
IfxGtm_Spe_OutChannel_2 | SPE output channel 2.
IfxGtm_Spe_OutChannel_3 | SPE output channel 3.
IfxGtm_Spe_OutChannel_4 | SPE output channel 4.
IfxGtm_Spe_OutChannel_5 | SPE output channel 5.
IfxGtm_Spe_OutChannel_6 | SPE output channel 6.
IfxGtm_Spe_OutChannel_7 | SPE output channel 7.

Definition at line 174 of file IfxGtm_Spe.h.

◆ IfxGtm_Spe_PatternIndex

enum IfxGtm_Spe_PatternIndex

Pattern Index Number of the valid Input sequence to the SPE. range from 0-7.

Enumerator
IfxGtm_Spe_PatternIndex_0 | SPE Pattern Index 0.
IfxGtm_Spe_PatternIndex_1 | SPE Pattern Index 1.
IfxGtm_Spe_PatternIndex_2 | SPE Pattern Index 2.
IfxGtm_Spe_PatternIndex_3 | SPE Pattern Index 3.
IfxGtm_Spe_PatternIndex_4 | SPE Pattern Index 4.
IfxGtm_Spe_PatternIndex_5 | SPE Pattern Index 5.
IfxGtm_Spe_PatternIndex_6 | SPE Pattern Index 6.
IfxGtm_Spe_PatternIndex_7 | SPE Pattern Index 7.

Definition at line 189 of file IfxGtm_Spe.h.


iLLD_TC38A: SPE Functions

Functions
SPE Functions
iLLD » GTM » Standard Driver » Spe Basic Functionality
Collaboration diagram for SPE Functions:

Functions

IFX_INLINE void | IfxGtm_Spe_clearAllInterrupts (Ifx_GTM_SPE *spe)
clears all the Interrupts More...
IFX_INLINE void | IfxGtm_Spe_clearInterrupt (Ifx_GTM_SPE *spe, IfxGtm_Spe_InterruptSignal interrupt)
clears the specific interrupt flag. More...
IFX_INLINE void | IfxGtm_Spe_enableModule (Ifx_GTM_SPE *spe, boolean enabled)
enables/disables the SPE module based on boolean input. More...
IFX_INLINE uint32 | IfxGtm_Spe_getActualInputPat (Ifx_GTM_SPE *spe)
returns the actual input pattern as a word format. More...
IFX_INLINE uint32 | IfxGtm_Spe_getBwdPatternPtr (Ifx_GTM_SPE *spe)
returns the backwards pattern pointer. More...
IFX_INLINE IfxGtm_Spe_ControlCommand | IfxGtm_Spe_getControlCommand (Ifx_GTM_SPE *spe)
retrieves the Control command used to select Pattern pointer which selects OUT_PAT. More...
IFX_INLINE IfxGtm_Spe_Direction | IfxGtm_Spe_getDir (Ifx_GTM_SPE *spe)
gets the actual rotation direction of the input signals. More...
IFX_INLINE uint32 | IfxGtm_Spe_getNewInputPat (Ifx_GTM_SPE *spe)
gets the new input pattern in word format. More...
IFX_INLINE uint32 | IfxGtm_Spe_getOutputCtrl (Ifx_GTM_SPE *spe)
gets the output control register (OUT_CTRL) as a whole word to read the curent output patttern. More...
IFX_INLINE uint32 | IfxGtm_Spe_getOutputPattern (Ifx_GTM_SPE *spe, IfxGtm_Spe_PatternIndex patIndex)
returns the output pattern for the specified index as a whole word. More...
IFX_INLINE uint32 | IfxGtm_Spe_getPatternPtr (Ifx_GTM_SPE *spe)
returns the pattern pointer which indicates the currently pointed SPE_OUT_PAT register. More...
IFX_INLINE IfxGtm_Spe_Direction | IfxGtm_Spe_getPrevDir (Ifx_GTM_SPE *spe)
gets the previous rotation direction. More...
IFX_INLINE uint32 | IfxGtm_Spe_getPreviousInputPat (Ifx_GTM_SPE *spe)
gets the previous input pattern in word format. More...
IFX_INLINE uint32 | IfxGtm_Spe_getRevCounter (Ifx_GTM_SPE *spe)
returns the step counter as a 32 bit word More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxGtm_Spe_getSrcPointer (IfxGtm_Spe spe)
Get the Pointer to the Interrupt Request Node of specified SPE object. More...
IFX_INLINE void | IfxGtm_Spe_selectTimInput (Ifx_GTM_SPE *spe, IfxGtm_Spe_TimInput timInput)
selects the Tim Input Channels to give input to the SPE submodule. More...
IFX_INLINE void | IfxGtm_Spe_setBwdPatternPtr (Ifx_GTM_SPE *spe, IfxGtm_Spe_PatternIndex patIndex)
sets the Backward pattern pointer to the CTRL_STAT2 register. This will be used to command if control command is set to backwards in CTRL_CMD register. More...
IFX_INLINE void | IfxGtm_Spe_setControlCommand (Ifx_GTM_SPE *spe, IfxGtm_Spe_ControlCommand cmd)
set the CTRL_CMD field to select which pattern pointer is used to select OUT_PAT. More...
IFX_INLINE void | IfxGtm_Spe_setFastShutoff (Ifx_GTM_SPE *spe, boolean enabled)
Used to set the Fast shutoff Mode. True: Enable Fast Shutoff False: Disable Fast Shutoff. More...
IFX_INLINE void | IfxGtm_Spe_setInterruptMode (Ifx_GTM_SPE *spe, IfxGtm_Spe_InterruptMode mode)
sets the desired mode as the interrupt mode from SPE submodule. More...
IFX_INLINE void | IfxGtm_Spe_setOutputCtrl (Ifx_GTM_SPE *spe, IfxGtm_Spe_OutputPattern *patPtr)
writes into the out_ctrl register with the specified output pattern. More...
IFX_INLINE void | IfxGtm_Spe_setPatternPtr (Ifx_GTM_SPE *spe, IfxGtm_Spe_PatternIndex patIndex)
sets the Pattern Index into the CTRL_STAT register, which will in turn point to the corresponding SPE_OUT_PAT register. More...
IFX_INLINE void | IfxGtm_Spe_setRevCounter (Ifx_GTM_SPE *spe, uint32 count)
sets the step counter to a specific value. More...
IFX_INLINE void | IfxGtm_Spe_triggerUpdate (Ifx_GTM_SPE *spe)
Trigger the update of OUT_CTRL register with the OUT_PAT selected by Control Command. More...
IFX_EXTERN void | IfxGtm_Spe_disableInterrupt (Ifx_GTM_SPE *spe, IfxGtm_Spe_InterruptSignal interrupt)
disables the SPE interrupt of specified type. More...
IFX_EXTERN void | IfxGtm_Spe_enableErrorInterrupt (Ifx_GTM_SPE *spe, IfxGtm_Spe_InterruptSignal interrupt, boolean enabled)
enables the error interrupt of the specified type. More...
IFX_EXTERN void | IfxGtm_Spe_enableInput (Ifx_GTM_SPE *spe, IfxGtm_Spe_InputSignal inputSignal, boolean enabled)
enables/disables the input to sPE from the selected input signal source. More...
IFX_EXTERN void | IfxGtm_Spe_enableInterrupt (Ifx_GTM_SPE *spe, IfxGtm_Spe_InterruptSignal interrupt)
enables the SPE interrupt of specified type. More...
IFX_EXTERN uint32 | IfxGtm_Spe_getFastShutoffLevel (Ifx_GTM_SPE *spe, IfxGtm_Spe_OutChannel channel)
return fast shutoff level. More...
IFX_EXTERN boolean | IfxGtm_Spe_getInterruptStatus (Ifx_GTM_SPE *spe, IfxGtm_Spe_InterruptSignal interrupt)
returns the interrupt status of specified interrupt signal More...
IFX_EXTERN uint32 | IfxGtm_Spe_getRevCompare (Ifx_GTM_SPE *spe)
returns the step counter compare value as a 32 bit word. More...
IFX_EXTERN void | IfxGtm_Spe_selectTrigger (Ifx_GTM_SPE *spe, IfxGtm_Spe_TriggerSource trigger)
selects the source which will trigger the spe control output.a More...
IFX_EXTERN void | IfxGtm_Spe_setAllInputPatterns (Ifx_GTM_SPE *spe, IfxGtm_Spe_InputPattern *patPtr)
sets all the specified input patterns into the SPE_PAT register More...
IFX_EXTERN void | IfxGtm_Spe_setInputPattern (Ifx_GTM_SPE *spe, IfxGtm_Spe_InputPattern *patPtr, IfxGtm_Spe_PatternIndex patIndex)
writes SPE[i]_PAT with the individual pattern specified according to the pattern index. More...
IFX_EXTERN void | IfxGtm_Spe_setInterrupt (Ifx_GTM_SPE *spe, IfxGtm_Spe_InterruptSignal interrupt)
forces the interrupt of specified type by software More...
IFX_EXTERN void | IfxGtm_Spe_setOutputPattern (Ifx_GTM_SPE *spe, IfxGtm_Spe_OutputPattern *patPtr, IfxGtm_Spe_PatternIndex patIndex)
sets the output pattern from pointer to the corresponding SPE_OUT_PAT register specified by the index. More...
IFX_EXTERN void | IfxGtm_Spe_setRevCompare (Ifx_GTM_SPE *spe, uint32 count)
sets the step compare count to the specified value. More...

Detailed Description

Function Documentation

◆ IfxGtm_Spe_clearAllInterrupts()

IFX_INLINE void IfxGtm_Spe_clearAllInterrupts ( Ifx_GTM_SPE * spe )

clears all the Interrupts

Parameters
spe pointer to the spe device.
Returns
None

Definition at line 524 of file IfxGtm_Spe.h.

◆ IfxGtm_Spe_clearInterrupt()

IFX_INLINE void IfxGtm_Spe_clearInterrupt | ( | Ifx_GTM_SPE * | spe,
 |  | IfxGtm_Spe_InterruptSignal | interrupt
 | ) |  |

clears the specific interrupt flag.

Parameters
spe | pointer to the spe device.
interrupt | interrupt signal
Returns
None

Definition at line 530 of file IfxGtm_Spe.h.

◆ IfxGtm_Spe_disableInterrupt()

IFX_EXTERN void IfxGtm_Spe_disableInterrupt | ( | Ifx_GTM_SPE * | spe,
 |  | IfxGtm_Spe_InterruptSignal | interrupt
 | ) |  |

disables the SPE interrupt of specified type.

Parameters
spe | pointer to the spe device
interrupt | interrupt signal
Returns
None

Definition at line 53 of file IfxGtm_Spe.c.

◆ IfxGtm_Spe_enableErrorInterrupt()

IFX_EXTERN void IfxGtm_Spe_enableErrorInterrupt | ( | Ifx_GTM_SPE * | spe,
 |  | IfxGtm_Spe_InterruptSignal | interrupt,
 |  | boolean | enabled
 | ) |  |

enables the error interrupt of the specified type.

Parameters
spe | pointer to the spe device
interrupt | interrupt signal
enabled | interrupt enable status
Returns
None

Definition at line 61 of file IfxGtm_Spe.c.

◆ IfxGtm_Spe_enableInput()

IFX_EXTERN void IfxGtm_Spe_enableInput | ( | Ifx_GTM_SPE * | spe,
 |  | IfxGtm_Spe_InputSignal | inputSignal,
 |  | boolean | enabled
 | ) |  |

enables/disables the input to sPE from the selected input signal source.

Parameters
spe | pointer to spe device
inputSignal | Input signal
enabled | enable signal
Returns
None

Definition at line 69 of file IfxGtm_Spe.c.

◆ IfxGtm_Spe_enableInterrupt()

IFX_EXTERN void IfxGtm_Spe_enableInterrupt | ( | Ifx_GTM_SPE * | spe,
 |  | IfxGtm_Spe_InterruptSignal | interrupt
 | ) |  |

enables the SPE interrupt of specified type.

Parameters
spe | pointer to the spe device
interrupt | interrupt signal
Returns
None

Definition at line 85 of file IfxGtm_Spe.c.

◆ IfxGtm_Spe_enableModule()

IFX_INLINE void IfxGtm_Spe_enableModule | ( | Ifx_GTM_SPE * | spe,
 |  | boolean | enabled
 | ) |  |

enables/disables the SPE module based on boolean input.

Parameters
spe | pointer to spe device.
enabled | enable status for SPE sub module
Returns
None

Definition at line 536 of file IfxGtm_Spe.h.

◆ IfxGtm_Spe_getActualInputPat()

IFX_INLINE uint32 IfxGtm_Spe_getActualInputPat ( Ifx_GTM_SPE * spe )

returns the actual input pattern as a word format.

Parameters
spe pointer to the spe device.
Returns
actual input pattern

Definition at line 542 of file IfxGtm_Spe.h.

◆ IfxGtm_Spe_getBwdPatternPtr()

IFX_INLINE uint32 IfxGtm_Spe_getBwdPatternPtr ( Ifx_GTM_SPE * spe )

returns the backwards pattern pointer.

Parameters
spe pointer to the spe device.
Returns
current pattern pointer

Definition at line 548 of file IfxGtm_Spe.h.

◆ IfxGtm_Spe_getControlCommand()

IFX_INLINE IfxGtm_Spe_ControlCommand IfxGtm_Spe_getControlCommand ( Ifx_GTM_SPE * spe )

retrieves the Control command used to select Pattern pointer which selects OUT_PAT.

Parameters
spe pointer to the spe device.
Returns
control command selection

Definition at line 554 of file IfxGtm_Spe.h.

◆ IfxGtm_Spe_getDir()

IFX_INLINE IfxGtm_Spe_Direction IfxGtm_Spe_getDir ( Ifx_GTM_SPE * spe )

gets the actual rotation direction of the input signals.

Parameters
spe pointer to the spe device.
Returns
Direction

Definition at line 560 of file IfxGtm_Spe.h.

◆ IfxGtm_Spe_getFastShutoffLevel()

IFX_EXTERN uint32 IfxGtm_Spe_getFastShutoffLevel | ( | Ifx_GTM_SPE * | spe,
 |  | IfxGtm_Spe_OutChannel | channel
 | ) |  |

return fast shutoff level.

Parameters
spe | pointer to the spe device.
channel | TOM[x] output channel
Returns
fast shutoff level

Definition at line 93 of file IfxGtm_Spe.c.

◆ IfxGtm_Spe_getInterruptStatus()

IFX_EXTERN boolean IfxGtm_Spe_getInterruptStatus | ( | Ifx_GTM_SPE * | spe,
 |  | IfxGtm_Spe_InterruptSignal | interrupt
 | ) |  |

returns the interrupt status of specified interrupt signal

Parameters
spe | pointer to the spe device
interrupt | interrupt signal
Returns
interrupt status

Definition at line 101 of file IfxGtm_Spe.c.

◆ IfxGtm_Spe_getNewInputPat()

IFX_INLINE uint32 IfxGtm_Spe_getNewInputPat ( Ifx_GTM_SPE * spe )

gets the new input pattern in word format.

Parameters
spe pointer to the spe device.
Returns
new input pattern

Definition at line 566 of file IfxGtm_Spe.h.

◆ IfxGtm_Spe_getOutputCtrl()

IFX_INLINE uint32 IfxGtm_Spe_getOutputCtrl ( Ifx_GTM_SPE * spe )

gets the output control register (OUT_CTRL) as a whole word to read the curent output patttern.

Parameters
spe pointer to the spe device
Returns
output control register as whole word

Definition at line 572 of file IfxGtm_Spe.h.

◆ IfxGtm_Spe_getOutputPattern()

IFX_INLINE uint32 IfxGtm_Spe_getOutputPattern | ( | Ifx_GTM_SPE * | spe,
 |  | IfxGtm_Spe_PatternIndex | patIndex
 | ) |  |

returns the output pattern for the specified index as a whole word.

Parameters
spe | pointer to the spe device
patIndex | step or index number of the pattern specified.
Returns
output pattern as whole word

Definition at line 578 of file IfxGtm_Spe.h.

◆ IfxGtm_Spe_getPatternPtr()

IFX_INLINE uint32 IfxGtm_Spe_getPatternPtr ( Ifx_GTM_SPE * spe )

returns the pattern pointer which indicates the currently pointed SPE_OUT_PAT register.

Parameters
spe pointer to the spe device.
Returns
current pattern pointer

Definition at line 584 of file IfxGtm_Spe.h.

◆ IfxGtm_Spe_getPrevDir()

IFX_INLINE IfxGtm_Spe_Direction IfxGtm_Spe_getPrevDir ( Ifx_GTM_SPE * spe )

gets the previous rotation direction.

Parameters
spe pointer to the spe device.
Returns
Previous Direction

Definition at line 590 of file IfxGtm_Spe.h.

◆ IfxGtm_Spe_getPreviousInputPat()

IFX_INLINE uint32 IfxGtm_Spe_getPreviousInputPat ( Ifx_GTM_SPE * spe )

gets the previous input pattern in word format.

Parameters
spe pointer to the spe device.
Returns
previous input pattern

Definition at line 596 of file IfxGtm_Spe.h.

◆ IfxGtm_Spe_getRevCompare()

IFX_EXTERN uint32 IfxGtm_Spe_getRevCompare ( Ifx_GTM_SPE * spe )

returns the step counter compare value as a 32 bit word.

Parameters
spe pointer to the spe device
Returns
step counter

Definition at line 107 of file IfxGtm_Spe.c.

◆ IfxGtm_Spe_getRevCounter()

IFX_INLINE uint32 IfxGtm_Spe_getRevCounter ( Ifx_GTM_SPE * spe )

returns the step counter as a 32 bit word

Parameters
spe pointer to the spe device
Returns
step counter

Definition at line 602 of file IfxGtm_Spe.h.

◆ IfxGtm_Spe_getSrcPointer()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxGtm_Spe_getSrcPointer ( IfxGtm_Spe spe )

Get the Pointer to the Interrupt Request Node of specified SPE object.

Parameters
spe Spe Index Number
Returns
SRC pointer

Definition at line 608 of file IfxGtm_Spe.h.

◆ IfxGtm_Spe_selectTimInput()

IFX_INLINE void IfxGtm_Spe_selectTimInput | ( | Ifx_GTM_SPE * | spe,
 |  | IfxGtm_Spe_TimInput | timInput
 | ) |  |

selects the Tim Input Channels to give input to the SPE submodule.

Parameters
spe | pointer to the spe device.
timInput | TIM input signal to be selected
Returns
None

Definition at line 614 of file IfxGtm_Spe.h.

◆ IfxGtm_Spe_selectTrigger()

IFX_EXTERN void IfxGtm_Spe_selectTrigger | ( | Ifx_GTM_SPE * | spe,
 |  | IfxGtm_Spe_TriggerSource | trigger
 | ) |  |

selects the source which will trigger the spe control output.a

Parameters
spe | pointer to spe device
trigger | trigger source
Returns
None

Definition at line 113 of file IfxGtm_Spe.c.

◆ IfxGtm_Spe_setAllInputPatterns()

IFX_EXTERN void IfxGtm_Spe_setAllInputPatterns | ( | Ifx_GTM_SPE * | spe,
 |  | IfxGtm_Spe_InputPattern * | patPtr
 | ) |  |

sets all the specified input patterns into the SPE_PAT register

Parameters
spe | pointer to the spe device
patPtr | pointer to the pattern specified
Returns
None

Definition at line 125 of file IfxGtm_Spe.c.

◆ IfxGtm_Spe_setBwdPatternPtr()

IFX_INLINE void IfxGtm_Spe_setBwdPatternPtr | ( | Ifx_GTM_SPE * | spe,
 |  | IfxGtm_Spe_PatternIndex | patIndex
 | ) |  |

sets the Backward pattern pointer to the CTRL_STAT2 register. This will be used to command if control command is set to backwards in CTRL_CMD register.

Parameters
spe | pointer to the spe device
patIndex | pattern index number
Returns
None

Definition at line 620 of file IfxGtm_Spe.h.

◆ IfxGtm_Spe_setControlCommand()

IFX_INLINE void IfxGtm_Spe_setControlCommand | ( | Ifx_GTM_SPE * | spe,
 |  | IfxGtm_Spe_ControlCommand | cmd
 | ) |  |

set the CTRL_CMD field to select which pattern pointer is used to select OUT_PAT.

Parameters
spe | pointer to the spe device.
cmd | control command selection
Returns
None

Definition at line 626 of file IfxGtm_Spe.h.

◆ IfxGtm_Spe_setFastShutoff()

IFX_INLINE void IfxGtm_Spe_setFastShutoff | ( | Ifx_GTM_SPE * | spe,
 |  | boolean | enabled
 | ) |  |

Used to set the Fast shutoff Mode. True: Enable Fast Shutoff False: Disable Fast Shutoff.

Parameters
spe | pointer to the spe device
enabled | status of Fast shutoff
Returns
None

Definition at line 632 of file IfxGtm_Spe.h.

◆ IfxGtm_Spe_setInputPattern()

IFX_EXTERN void IfxGtm_Spe_setInputPattern | ( | Ifx_GTM_SPE * | spe,
 |  | IfxGtm_Spe_InputPattern * | patPtr,
 |  | IfxGtm_Spe_PatternIndex | patIndex
 | ) |  |

writes SPE[i]_PAT with the individual pattern specified according to the pattern index.

Parameters
spe | pointer to the spe device
patPtr | pointer to the pattern specified
patIndex | step or index number of the pattern specified.
Returns
None

Definition at line 135 of file IfxGtm_Spe.c.

◆ IfxGtm_Spe_setInterrupt()

IFX_EXTERN void IfxGtm_Spe_setInterrupt | ( | Ifx_GTM_SPE * | spe,
 |  | IfxGtm_Spe_InterruptSignal | interrupt
 | ) |  |

forces the interrupt of specified type by software

Parameters
spe | pointer to the spe device
interrupt | interrupt signal
Returns
None

Definition at line 146 of file IfxGtm_Spe.c.

◆ IfxGtm_Spe_setInterruptMode()

IFX_INLINE void IfxGtm_Spe_setInterruptMode | ( | Ifx_GTM_SPE * | spe,
 |  | IfxGtm_Spe_InterruptMode | mode
 | ) |  |

sets the desired mode as the interrupt mode from SPE submodule.

Parameters
spe | pointer to the spe device
mode | interrupt mode
Returns
None

Definition at line 638 of file IfxGtm_Spe.h.

◆ IfxGtm_Spe_setOutputCtrl()

IFX_INLINE void IfxGtm_Spe_setOutputCtrl | ( | Ifx_GTM_SPE * | spe,
 |  | IfxGtm_Spe_OutputPattern * | patPtr
 | ) |  |

writes into the out_ctrl register with the specified output pattern.

Parameters
spe | pointer to the spe device
patPtr | pointer to the output pattern
Returns
None

Definition at line 644 of file IfxGtm_Spe.h.

◆ IfxGtm_Spe_setOutputPattern()

IFX_EXTERN void IfxGtm_Spe_setOutputPattern | ( | Ifx_GTM_SPE * | spe,
 |  | IfxGtm_Spe_OutputPattern * | patPtr,
 |  | IfxGtm_Spe_PatternIndex | patIndex
 | ) |  |

sets the output pattern from pointer to the corresponding SPE_OUT_PAT register specified by the index.

Parameters
spe | pointer to the spe device
patPtr | pointer to the output pattern
patIndex | step or index number of the pattern specified.
Returns
None

Definition at line 154 of file IfxGtm_Spe.c.

◆ IfxGtm_Spe_setPatternPtr()

IFX_INLINE void IfxGtm_Spe_setPatternPtr | ( | Ifx_GTM_SPE * | spe,
 |  | IfxGtm_Spe_PatternIndex | patIndex
 | ) |  |

sets the Pattern Index into the CTRL_STAT register, which will in turn point to the corresponding SPE_OUT_PAT register.

Parameters
spe | pointer to the spe device
patIndex | pattern index number
Returns
None

Definition at line 650 of file IfxGtm_Spe.h.

◆ IfxGtm_Spe_setRevCompare()

IFX_EXTERN void IfxGtm_Spe_setRevCompare | ( | Ifx_GTM_SPE * | spe,
 |  | uint32 | count
 | ) |  |

sets the step compare count to the specified value.

Parameters
spe | pointer to the spe device
count | step counter value.
Returns
None

Definition at line 160 of file IfxGtm_Spe.c.

◆ IfxGtm_Spe_setRevCounter()

IFX_INLINE void IfxGtm_Spe_setRevCounter | ( | Ifx_GTM_SPE * | spe,
 |  | uint32 | count
 | ) |  |

sets the step counter to a specific value.

Parameters
spe | pointer to the spe device
count | step counter value.
Returns
None

Definition at line 656 of file IfxGtm_Spe.h.

◆ IfxGtm_Spe_triggerUpdate()

IFX_INLINE void IfxGtm_Spe_triggerUpdate ( Ifx_GTM_SPE * spe )

Trigger the update of OUT_CTRL register with the OUT_PAT selected by Control Command.

Parameters
spe pointer to the spe device.
Returns
None

Definition at line 662 of file IfxGtm_Spe.h.


iLLD_TC38A: Tbu Basic Functionality

Modules
Tbu Basic Functionality
iLLD » GTM » Standard Driver
Collaboration diagram for Tbu Basic Functionality:

Modules

TBU Enumerations
TBU Basic Functions

Detailed Description


iLLD_TC38A: TBU Enumerations

Enumerations
TBU Enumerations
iLLD » GTM » Standard Driver » Tbu Basic Functionality
Collaboration diagram for TBU Enumerations:

Enumerations

enum IfxGtm_Tbu_Ts {
IfxGtm_Tbu_Ts_0,
IfxGtm_Tbu_Ts_1,
IfxGtm_Tbu_Ts_2,
IfxGtm_Tbu_Ts_3
}
GTM TOM TBU Time stamps. More...

Detailed Description

Enumeration Type Documentation

◆ IfxGtm_Tbu_Ts

enum IfxGtm_Tbu_Ts

GTM TOM TBU Time stamps.

Enumerator
IfxGtm_Tbu_Ts_0
IfxGtm_Tbu_Ts_1
IfxGtm_Tbu_Ts_2
IfxGtm_Tbu_Ts_3

Definition at line 66 of file IfxGtm_Tbu.h.


iLLD_TC38A: TBU Basic Functions

Functions
TBU Basic Functions
iLLD » GTM » Standard Driver » Tbu Basic Functionality
Collaboration diagram for TBU Basic Functions:

Functions

IFX_INLINE void | IfxGtm_Tbu_enableChannel (Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel)
Enables the channel. More...
IFX_INLINE boolean | IfxGtm_Tbu_isChannelEnabled (Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel)
Function to check if a TBU channel is enabled. Returns TRUE if the corresponding channel is enabled Returns FALSE if the corresponding channel is disabled. More...
IFX_EXTERN float32 | IfxGtm_Tbu_getClockFrequency (Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel)
Returns the clock frequency. More...

Detailed Description

Function Documentation

◆ IfxGtm_Tbu_enableChannel()

IFX_INLINE void IfxGtm_Tbu_enableChannel | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Tbu_Ts | channel
 | ) |  |

Enables the channel.

Parameters
gtm | Pointer to GTM module
channel | TBU Time stamps
Returns
None

Definition at line 116 of file IfxGtm_Tbu.h.

◆ IfxGtm_Tbu_getClockFrequency()

IFX_EXTERN float32 IfxGtm_Tbu_getClockFrequency | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Tbu_Ts | channel
 | ) |  |

Returns the clock frequency.

Parameters
gtm | Pointer to GTM module
channel | TBU Time stamps
Returns
frequency

Definition at line 53 of file IfxGtm_Tbu.c.

◆ IfxGtm_Tbu_isChannelEnabled()

IFX_INLINE boolean IfxGtm_Tbu_isChannelEnabled | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Tbu_Ts | channel
 | ) |  |

Function to check if a TBU channel is enabled. Returns TRUE if the corresponding channel is enabled Returns FALSE if the corresponding channel is disabled.

Parameters
gtm | Pointer to GTM SFR
channel | Channel of TBU
Returns
TRUE: channel is enabled

Definition at line 124 of file IfxGtm_Tbu.h.


iLLD_TC38A: Tim Basic Functionality

Modules
Tim Basic Functionality
iLLD » GTM » Standard Driver
Collaboration diagram for Tim Basic Functionality:

Modules

TIM Enumerations
TIM Channel Functions

Detailed Description


iLLD_TC38A: TIM Enumerations

Enumerations
TIM Enumerations
iLLD » GTM » Standard Driver » Tim Basic Functionality
Collaboration diagram for TIM Enumerations:

Enumerations

enum IfxGtm_Tim_CntsSel {
IfxGtm_Tim_CntsSel_cntReg = 0,
IfxGtm_Tim_CntsSel_tbuTs0
}
enum IfxGtm_Tim_FilterCounter {
IfxGtm_Tim_FilterCounter_upDown = 0,
IfxGtm_Tim_FilterCounter_hold
}
Enum for Filter counter. More...
enum IfxGtm_Tim_FilterCounterFreqSel {
IfxGtm_Tim_FilterCounterFreqSel_cmuClk0 = 0,
IfxGtm_Tim_FilterCounterFreqSel_cmuClk1 = 1,
IfxGtm_Tim_FilterCounterFreqSel_cmuClk6 = 2,
IfxGtm_Tim_FilterCounterFreqSel_cmuClk7 = 3
}
Enum for Filter counter Frequency Selection. More...
enum IfxGtm_Tim_FilterMode {
IfxGtm_Tim_FilterMode_immediateEdgePropagation = 0,
IfxGtm_Tim_FilterMode_individualDeglitchTime
}
Enum for Filter mode. More...
enum IfxGtm_Tim_GprSel {
IfxGtm_Tim_GprSel_tbuTs0 = 0,
IfxGtm_Tim_GprSel_tbuTs1,
IfxGtm_Tim_GprSel_tbuTs2,
IfxGtm_Tim_GprSel_cnts
}
enum IfxGtm_Tim_Input {
IfxGtm_Tim_Input_currentChannel = 0,
IfxGtm_Tim_Input_adjacentChannel
}
enum IfxGtm_Tim_IrqMode {
IfxGtm_Tim_IrqMode_level = 0,
IfxGtm_Tim_IrqMode_pulse,
IfxGtm_Tim_IrqMode_pulseNotify,
IfxGtm_Tim_IrqMode_singlePulseMode,
IfxGtm_Tim_IrqMode_none = -1
}
enum IfxGtm_Tim_IrqType {
IfxGtm_Tim_IrqType_newVal = 0,
IfxGtm_Tim_IrqType_ecntOverflow = 1,
IfxGtm_Tim_IrqType_cntOverflow = 2,
IfxGtm_Tim_IrqType_gprOverflow = 3,
IfxGtm_Tim_IrqType_timeoutDetect = 4,
IfxGtm_Tim_IrqType_glitchDetect = 5
}
enum IfxGtm_Tim_Mode {
IfxGtm_Tim_Mode_pwmMeasurement = 0,
IfxGtm_Tim_Mode_pulseIntegration,
IfxGtm_Tim_Mode_inputEvent,
IfxGtm_Tim_Mode_inputPrescaler,
IfxGtm_Tim_Mode_bitCompression
}
enum IfxGtm_Tim_Timeout {
IfxGtm_Tim_Timeout_disabled,
IfxGtm_Tim_Timeout_risingEdge,
IfxGtm_Tim_Timeout_fallingEdge,
IfxGtm_Tim_Timeout_bothEdge
}
Enum for Timeout control. More...

Detailed Description

Enumeration Type Documentation

◆ IfxGtm_Tim_CntsSel

enum IfxGtm_Tim_CntsSel
Enumerator
IfxGtm_Tim_CntsSel_cntReg
IfxGtm_Tim_CntsSel_tbuTs0

Definition at line 71 of file IfxGtm_Tim.h.

◆ IfxGtm_Tim_FilterCounter

enum IfxGtm_Tim_FilterCounter

Enum for Filter counter.

Enumerator
IfxGtm_Tim_FilterCounter_upDown
IfxGtm_Tim_FilterCounter_hold

Definition at line 79 of file IfxGtm_Tim.h.

◆ IfxGtm_Tim_FilterCounterFreqSel

enum IfxGtm_Tim_FilterCounterFreqSel

Enum for Filter counter Frequency Selection.

Enumerator
IfxGtm_Tim_FilterCounterFreqSel_cmuClk0 | FLT_CNT counts with CMU_CLK0.
IfxGtm_Tim_FilterCounterFreqSel_cmuClk1 | FLT_CNT counts with CMU_CLK1.
IfxGtm_Tim_FilterCounterFreqSel_cmuClk6 | FLT_CNT counts with CMU_CLK6.
IfxGtm_Tim_FilterCounterFreqSel_cmuClk7 | FLT_CNT counts with CMU_CLK7.

Definition at line 87 of file IfxGtm_Tim.h.

◆ IfxGtm_Tim_FilterMode

enum IfxGtm_Tim_FilterMode

Enum for Filter mode.

Enumerator
IfxGtm_Tim_FilterMode_immediateEdgePropagation | Immediate edge Propagation mode.
IfxGtm_Tim_FilterMode_individualDeglitchTime | Individual deglitch mode.

Definition at line 97 of file IfxGtm_Tim.h.

◆ IfxGtm_Tim_GprSel

enum IfxGtm_Tim_GprSel
Enumerator
IfxGtm_Tim_GprSel_tbuTs0
IfxGtm_Tim_GprSel_tbuTs1
IfxGtm_Tim_GprSel_tbuTs2
IfxGtm_Tim_GprSel_cnts

Definition at line 103 of file IfxGtm_Tim.h.

◆ IfxGtm_Tim_Input

enum IfxGtm_Tim_Input
Enumerator
IfxGtm_Tim_Input_currentChannel
IfxGtm_Tim_Input_adjacentChannel

Definition at line 111 of file IfxGtm_Tim.h.

◆ IfxGtm_Tim_IrqMode

enum IfxGtm_Tim_IrqMode
Enumerator
IfxGtm_Tim_IrqMode_level | Level Mode.
IfxGtm_Tim_IrqMode_pulse | Pulse Mode.
IfxGtm_Tim_IrqMode_pulseNotify | pulse notify Mode
IfxGtm_Tim_IrqMode_singlePulseMode | Single Pulse Mode.
IfxGtm_Tim_IrqMode_none | none

Definition at line 117 of file IfxGtm_Tim.h.

◆ IfxGtm_Tim_IrqType

enum IfxGtm_Tim_IrqType
Enumerator
IfxGtm_Tim_IrqType_newVal | New measurement value detected by SMU of channel.
IfxGtm_Tim_IrqType_ecntOverflow | ECNT counter overflow of channel.
IfxGtm_Tim_IrqType_cntOverflow | CNT counter overflow of channel.
IfxGtm_Tim_IrqType_gprOverflow | GPR0 and GPR1 data overflow.
IfxGtm_Tim_IrqType_timeoutDetect | Time out reached for input signal of channel.
IfxGtm_Tim_IrqType_glitchDetect | A glitch was detected by the TIM filter of channel.

Definition at line 126 of file IfxGtm_Tim.h.

◆ IfxGtm_Tim_Mode

enum IfxGtm_Tim_Mode
Enumerator
IfxGtm_Tim_Mode_pwmMeasurement | TPWM.
IfxGtm_Tim_Mode_pulseIntegration | TPIM.
IfxGtm_Tim_Mode_inputEvent | TIEM.
IfxGtm_Tim_Mode_inputPrescaler | TIPM.
IfxGtm_Tim_Mode_bitCompression | TBCM.

Definition at line 136 of file IfxGtm_Tim.h.

◆ IfxGtm_Tim_Timeout

enum IfxGtm_Tim_Timeout

Enum for Timeout control.

Enumerator
IfxGtm_Tim_Timeout_disabled | Timeout feature disabled.
IfxGtm_Tim_Timeout_risingEdge | Timeout feature enabled for rising edge only.
IfxGtm_Tim_Timeout_fallingEdge | Timeout feature enabled for falling edge only.
IfxGtm_Tim_Timeout_bothEdge | Timeout feature enabled for both edges.

Definition at line 147 of file IfxGtm_Tim.h.


iLLD_TC38A: TIM Channel Functions

Functions
TIM Channel Functions
iLLD » GTM » Standard Driver » Tim Basic Functionality
Collaboration diagram for TIM Channel Functions:

Functions

IFX_INLINE void | IfxGtm_Tim_Ch_clearAuxInputSourceSelection (Ifx_GTM *gtm, IfxGtm_Tim timIndex, IfxGtm_Tim_Ch channel)
This function clears the Aux input Source selection for the given channel. More...
IFX_INLINE void | IfxGtm_Tim_Ch_clearCntOverflowEvent (Ifx_GTM_TIM_CH *channel)
Clears the counter overflow flag. More...
IFX_INLINE void | IfxGtm_Tim_Ch_clearDataLostEvent (Ifx_GTM_TIM_CH *channel)
Clears the data lost flag. More...
IFX_INLINE void | IfxGtm_Tim_Ch_clearEcntOverflowEvent (Ifx_GTM_TIM_CH *channel)
Clears the event counter overflow flag. More...
IFX_INLINE void | IfxGtm_Tim_Ch_clearGlitchEvent (Ifx_GTM_TIM_CH *channel)
Clears the glitch flag. More...
IFX_INLINE void | IfxGtm_Tim_Ch_clearNewValueEvent (Ifx_GTM_TIM_CH *channel)
Clears the new value flag. More...
IFX_INLINE void | IfxGtm_Tim_Ch_clearNotification (Ifx_GTM_TIM_CH *channel, IfxGtm_Tim_IrqType irqType)
Clear the interrupt notification. More...
IFX_INLINE boolean | IfxGtm_Tim_Ch_getNotification (Ifx_GTM_TIM_CH *channel, IfxGtm_Tim_IrqType irqType)
Returns the status of channel notification. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxGtm_Tim_Ch_getSrcPointer (Ifx_GTM *gtm, IfxGtm_Tim tim, IfxGtm_Tim_Ch channel)
Returns a pointer to the TIM channel SRC. More...
IFX_INLINE boolean | IfxGtm_Tim_Ch_isCntOverflowEvent (Ifx_GTM_TIM_CH *channel)
Test the counter overflow flag. More...
IFX_INLINE boolean | IfxGtm_Tim_Ch_isDataLostEvent (Ifx_GTM_TIM_CH *channel)
Test the data lost flag. More...
IFX_INLINE boolean | IfxGtm_Tim_Ch_isEcntOverflowEvent (Ifx_GTM_TIM_CH *channel)
Test the event counter overflow flag. More...
IFX_INLINE boolean | IfxGtm_Tim_Ch_isGlitchEvent (Ifx_GTM_TIM_CH *channel)
Test the glitch flag. More...
IFX_INLINE boolean | IfxGtm_Tim_Ch_isNewValueEvent (Ifx_GTM_TIM_CH *channel)
Test the new value flag. More...
IFX_INLINE void | IfxGtm_Tim_Ch_setAuxInputSourceSelection (Ifx_GTM *gtm, IfxGtm_Tim timIndex, IfxGtm_Tim_Ch channel)
set the Auxilary input source selection of a particular channel. More...
IFX_INLINE void | IfxGtm_Tim_Ch_setEdgeCounter (Ifx_GTM_TIM_CH *channel, uint8 edgeCounter)
This function configures the Edge counter register. More...
IFX_INLINE void | IfxGtm_Tim_Ch_setFallingEdgeFilterTime (Ifx_GTM_TIM_CH *channel, uint32 filterTime)
This function configures the Falling edge Filter Parameter. More...
IFX_INLINE void | IfxGtm_Tim_Ch_setInputSourceSelection (Ifx_GTM_TIM *tim, IfxGtm_Tim_Ch channel, IfxGtm_Tim_InputSourceSelect inputSource)
This function configures the Input source selection register. More...
IFX_INLINE void | IfxGtm_Tim_Ch_setNotification (Ifx_GTM_TIM_CH *channel, IfxGtm_Tim_IrqType irqType)
set the Interrupt Notification More...
IFX_INLINE void | IfxGtm_Tim_Ch_setRisingEdgeFilterTime (Ifx_GTM_TIM_CH *channel, uint32 filterTime)
This function configures theRaising edge Filter Parameter. More...
IFX_INLINE void | IfxGtm_Tim_Ch_setShadowCounter (Ifx_GTM_TIM_CH *channel, uint32 shadowCounter)
This function configures the Shadow counter register. More...
IFX_INLINE Ifx_GTM_TIM_CH * | IfxGtm_Tim_getChannel (Ifx_GTM_TIM *tim, IfxGtm_Tim_Ch channel)
Returns the pointer to the TIM channel. More...
IFX_INLINE void | IfxGtm_Tim_Ch_resetChannel (Ifx_GTM_TIM *tim, IfxGtm_Tim_Ch channel)
Reset the specified TIM channel. More...
IFX_EXTERN float32 | IfxGtm_Tim_Ch_getCaptureClockFrequency (Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Capture Clock Frequency. More...
IFX_EXTERN IfxGtm_Cmu_Clk | IfxGtm_Tim_Ch_getCaptureClockSource (Ifx_GTM_TIM_CH *channel)
Returns the capture clock source selected. More...
IFX_EXTERN float32 | IfxGtm_Tim_Ch_getFilterClockFrequency (Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Filter Clock Frequency. More...
IFX_EXTERN IfxGtm_Cmu_Tim_Filter_Clk | IfxGtm_Tim_Ch_getFilterClockSource (Ifx_GTM_TIM_CH *channel)
Returns the Filter clock source selected. More...
IFX_EXTERN float32 | IfxGtm_Tim_Ch_getTimeoutClockFrequency (Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Timeout Clock Frequency. More...
IFX_EXTERN IfxGtm_Cmu_Clk | IfxGtm_Tim_Ch_getTimeoutClockSource (Ifx_GTM_TIM_CH *channel)
Returns the Timeout clock source selected. More...
IFX_EXTERN void | IfxGtm_Tim_Ch_setChannelNotification (Ifx_GTM_TIM_CH *channel, boolean irqOnNewVal, boolean irqOnCntOverflow, boolean irqOnEcntOverflow, boolean irqOnDatalost)
Set the channel notification. More...
IFX_EXTERN void | IfxGtm_Tim_Ch_setClockSource (Ifx_GTM_TIM_CH *channel, IfxGtm_Cmu_Clk clock)
Set the channel clock source. More...
IFX_EXTERN void | IfxGtm_Tim_Ch_setControl (Ifx_GTM_TIM_CH *channel, IfxGtm_Tim_ChannelControl control)
This function configures the TIM channel Control register. More...
IFX_EXTERN void | IfxGtm_Tim_Ch_setFilterNotification (Ifx_GTM_TIM_CH *channel, boolean irqOnGlitch)
Set the filter notification. More...
IFX_EXTERN void | IfxGtm_Tim_Ch_setNotificationMode (Ifx_GTM_TIM_CH *channel, IfxGtm_IrqMode mode)
This function configures the TIM channel IRQ mode. More...
IFX_EXTERN void | IfxGtm_Tim_Ch_setTimeoutNotification (Ifx_GTM_TIM_CH *channel, boolean irqOnTimeout)
Set the timeout notification. More...

Detailed Description

Function Documentation

◆ IfxGtm_Tim_Ch_clearAuxInputSourceSelection()

IFX_INLINE void IfxGtm_Tim_Ch_clearAuxInputSourceSelection | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Tim | timIndex,
 |  | IfxGtm_Tim_Ch | channel
 | ) |  |

This function clears the Aux input Source selection for the given channel.

Parameters
gtm | Pointer to GTM module
timIndex | TIM instance number
channel | Channel index
Returns
None

Definition at line 483 of file IfxGtm_Tim.h.

◆ IfxGtm_Tim_Ch_clearCntOverflowEvent()

IFX_INLINE void IfxGtm_Tim_Ch_clearCntOverflowEvent ( Ifx_GTM_TIM_CH * channel )

Clears the counter overflow flag.

Parameters
channel TIM channel pointer
Returns
None

Definition at line 492 of file IfxGtm_Tim.h.

Referenced by IfxGtm_Tim_In_update().

◆ IfxGtm_Tim_Ch_clearDataLostEvent()

IFX_INLINE void IfxGtm_Tim_Ch_clearDataLostEvent ( Ifx_GTM_TIM_CH * channel )

Clears the data lost flag.

Parameters
channel TIM channel pointer
Returns
None

Definition at line 498 of file IfxGtm_Tim.h.

Referenced by IfxGtm_Tim_In_update().

◆ IfxGtm_Tim_Ch_clearEcntOverflowEvent()

IFX_INLINE void IfxGtm_Tim_Ch_clearEcntOverflowEvent ( Ifx_GTM_TIM_CH * channel )

Clears the event counter overflow flag.

Parameters
channel TIM channel pointer
Returns
None

Definition at line 504 of file IfxGtm_Tim.h.

Referenced by IfxGtm_Tim_In_update().

◆ IfxGtm_Tim_Ch_clearGlitchEvent()

IFX_INLINE void IfxGtm_Tim_Ch_clearGlitchEvent ( Ifx_GTM_TIM_CH * channel )

Clears the glitch flag.

Parameters
channel TIM channel pointer
Returns
None

Definition at line 510 of file IfxGtm_Tim.h.

Referenced by IfxGtm_Tim_In_update().

◆ IfxGtm_Tim_Ch_clearNewValueEvent()

IFX_INLINE void IfxGtm_Tim_Ch_clearNewValueEvent ( Ifx_GTM_TIM_CH * channel )

Clears the new value flag.

Parameters
channel TIM channel pointer
Returns
None

Definition at line 516 of file IfxGtm_Tim.h.

Referenced by IfxGtm_Tim_In_update().

◆ IfxGtm_Tim_Ch_clearNotification()

IFX_INLINE void IfxGtm_Tim_Ch_clearNotification | ( | Ifx_GTM_TIM_CH * | channel,
 |  | IfxGtm_Tim_IrqType | irqType
 | ) |  |

Clear the interrupt notification.

Parameters
channel | TIM channel pointer
irqType | Interrupt type
Returns
None

Definition at line 522 of file IfxGtm_Tim.h.

◆ IfxGtm_Tim_Ch_getCaptureClockFrequency()

IFX_EXTERN float32 IfxGtm_Tim_Ch_getCaptureClockFrequency | ( | Ifx_GTM * | gtm,
 |  | Ifx_GTM_TIM_CH * | channel
 | ) |  |

Returns the Capture Clock Frequency.

Parameters
gtm | Pointer to GTM module
channel | Pointer to TIM channel base
Returns
Capture clock frequency

Definition at line 52 of file IfxGtm_Tim.c.

Referenced by IfxGtm_Tim_In_init().

◆ IfxGtm_Tim_Ch_getCaptureClockSource()

IFX_EXTERN IfxGtm_Cmu_Clk IfxGtm_Tim_Ch_getCaptureClockSource ( Ifx_GTM_TIM_CH * channel )

Returns the capture clock source selected.

Parameters
channel TIM channel pointer
Returns
capture clock source

Definition at line 62 of file IfxGtm_Tim.c.

Referenced by IfxGtm_Tim_Ch_getCaptureClockFrequency().

◆ IfxGtm_Tim_Ch_getFilterClockFrequency()

IFX_EXTERN float32 IfxGtm_Tim_Ch_getFilterClockFrequency | ( | Ifx_GTM * | gtm,
 |  | Ifx_GTM_TIM_CH * | channel
 | ) |  |

Returns the Filter Clock Frequency.

Parameters
gtm | Pointer to GTM module
channel | Pointer to TIM channel base
Returns
Filter clock frequency

Definition at line 68 of file IfxGtm_Tim.c.

Referenced by IfxGtm_Tim_In_init().

◆ IfxGtm_Tim_Ch_getFilterClockSource()

IFX_EXTERN IfxGtm_Cmu_Tim_Filter_Clk IfxGtm_Tim_Ch_getFilterClockSource ( Ifx_GTM_TIM_CH * channel )

Returns the Filter clock source selected.

Parameters
channel TIM channel pointer
Returns
Filter clock source

Definition at line 98 of file IfxGtm_Tim.c.

Referenced by IfxGtm_Tim_Ch_getFilterClockFrequency().

◆ IfxGtm_Tim_Ch_getNotification()

IFX_INLINE boolean IfxGtm_Tim_Ch_getNotification | ( | Ifx_GTM_TIM_CH * | channel,
 |  | IfxGtm_Tim_IrqType | irqType
 | ) |  |

Returns the status of channel notification.

Parameters
channel | TIM channel pointer
irqType | Interrupt type
Returns
Status of channel notification

Definition at line 529 of file IfxGtm_Tim.h.

◆ IfxGtm_Tim_Ch_getSrcPointer()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxGtm_Tim_Ch_getSrcPointer | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Tim | tim,
 |  | IfxGtm_Tim_Ch | channel
 | ) |  |

Returns a pointer to the TIM channel SRC.

Parameters
gtm | Pointer to GTM module
tim | Specifies the tim module no
channel | Channel index
Returns
Pointer to the TIM channel SRC

Definition at line 537 of file IfxGtm_Tim.h.

Referenced by IfxGtm_Tim_In_init().

◆ IfxGtm_Tim_Ch_getTimeoutClockFrequency()

IFX_EXTERN float32 IfxGtm_Tim_Ch_getTimeoutClockFrequency | ( | Ifx_GTM * | gtm,
 |  | Ifx_GTM_TIM_CH * | channel
 | ) |  |

Returns the Timeout Clock Frequency.

Parameters
gtm | Pointer to GTM module
channel | Pointer to TIM channel base
Returns
Timeout clock frequency

Definition at line 104 of file IfxGtm_Tim.c.

Referenced by IfxGtm_Tim_In_init().

◆ IfxGtm_Tim_Ch_getTimeoutClockSource()

IFX_EXTERN IfxGtm_Cmu_Clk IfxGtm_Tim_Ch_getTimeoutClockSource ( Ifx_GTM_TIM_CH * channel )

Returns the Timeout clock source selected.

Parameters
channel TIM channel pointer
Returns
Timeout clock source

Definition at line 114 of file IfxGtm_Tim.c.

Referenced by IfxGtm_Tim_Ch_getTimeoutClockFrequency().

◆ IfxGtm_Tim_Ch_isCntOverflowEvent()

IFX_INLINE boolean IfxGtm_Tim_Ch_isCntOverflowEvent ( Ifx_GTM_TIM_CH * channel )

Test the counter overflow flag.

Parameters
channel TIM channel pointer
Returns
TRUE if the flag is set, else FALSE

Definition at line 544 of file IfxGtm_Tim.h.

Referenced by IfxGtm_Tim_In_update().

◆ IfxGtm_Tim_Ch_isDataLostEvent()

IFX_INLINE boolean IfxGtm_Tim_Ch_isDataLostEvent ( Ifx_GTM_TIM_CH * channel )

Test the data lost flag.

Parameters
channel TIM channel pointer
Returns
TRUE if the flag is set, else FALSE

Definition at line 550 of file IfxGtm_Tim.h.

Referenced by IfxGtm_Tim_In_update().

◆ IfxGtm_Tim_Ch_isEcntOverflowEvent()

IFX_INLINE boolean IfxGtm_Tim_Ch_isEcntOverflowEvent ( Ifx_GTM_TIM_CH * channel )

Test the event counter overflow flag.

Parameters
channel TIM channel pointer
Returns
TRUE if the flag is set, else FALSE

Definition at line 556 of file IfxGtm_Tim.h.

Referenced by IfxGtm_Tim_In_update().

◆ IfxGtm_Tim_Ch_isGlitchEvent()

IFX_INLINE boolean IfxGtm_Tim_Ch_isGlitchEvent ( Ifx_GTM_TIM_CH * channel )

Test the glitch flag.

Parameters
channel TIM channel pointer
Returns
TRUE if the flag is set, else FALSE

Definition at line 562 of file IfxGtm_Tim.h.

Referenced by IfxGtm_Tim_In_update().

◆ IfxGtm_Tim_Ch_isNewValueEvent()

IFX_INLINE boolean IfxGtm_Tim_Ch_isNewValueEvent ( Ifx_GTM_TIM_CH * channel )

Test the new value flag.

Parameters
channel TIM channel pointer
Returns
TRUE if the flag is set, else FALSE

Definition at line 568 of file IfxGtm_Tim.h.

Referenced by IfxGtm_Tim_In_update().

◆ IfxGtm_Tim_Ch_resetChannel()

IFX_INLINE void IfxGtm_Tim_Ch_resetChannel | ( | Ifx_GTM_TIM * | tim,
 |  | IfxGtm_Tim_Ch | channel
 | ) |  |

Reset the specified TIM channel.

Parameters
tim | Pointer to GTM TIM instance
channel | Channel index
Returns
None

Definition at line 629 of file IfxGtm_Tim.h.

◆ IfxGtm_Tim_Ch_setAuxInputSourceSelection()

IFX_INLINE void IfxGtm_Tim_Ch_setAuxInputSourceSelection | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Tim | timIndex,
 |  | IfxGtm_Tim_Ch | channel
 | ) |  |

set the Auxilary input source selection of a particular channel.

Parameters
gtm | Pointer to GTM module
timIndex | TIM instance number
channel | Channel index
Returns
None

Definition at line 574 of file IfxGtm_Tim.h.

Referenced by IfxGtm_Tim_Timer_initChannel().

◆ IfxGtm_Tim_Ch_setChannelNotification()

IFX_EXTERN void IfxGtm_Tim_Ch_setChannelNotification | ( | Ifx_GTM_TIM_CH * | channel,
 |  | boolean | irqOnNewVal,
 |  | boolean | irqOnCntOverflow,
 |  | boolean | irqOnEcntOverflow,
 |  | boolean | irqOnDatalost
 | ) |  |

Set the channel notification.

Parameters
channel | TIM channel pointer
irqOnNewVal | If TRUE, the interrupt on new value is enabled
irqOnCntOverflow | If TRUE, the interrupt on CNT overflow is enabled
irqOnEcntOverflow | If TRUE, the interrupt on ECNT overflow is enabled
irqOnDatalost | If TRUE, the interrupt on data lost (GPR0, GPR1) is enabled
Returns
None

Definition at line 120 of file IfxGtm_Tim.c.

Referenced by IfxGtm_Tim_In_init().

◆ IfxGtm_Tim_Ch_setClockSource()

IFX_EXTERN void IfxGtm_Tim_Ch_setClockSource | ( | Ifx_GTM_TIM_CH * | channel,
 |  | IfxGtm_Cmu_Clk | clock
 | ) |  |

Set the channel clock source.

Parameters
channel | TIM channel pointer
clock | Selected clock
Returns
None

Definition at line 133 of file IfxGtm_Tim.c.

Referenced by IfxGtm_Tim_In_init().

◆ IfxGtm_Tim_Ch_setControl()

IFX_EXTERN void IfxGtm_Tim_Ch_setControl | ( | Ifx_GTM_TIM_CH * | channel,
 |  | IfxGtm_Tim_ChannelControl | control
 | ) |  |

This function configures the TIM channel Control register.

Parameters
channel | TIM channel pointer
control | channel control configuration
Returns
None

Definition at line 139 of file IfxGtm_Tim.c.

Referenced by IfxGtm_Tim_Timer_initChannel().

◆ IfxGtm_Tim_Ch_setEdgeCounter()

IFX_INLINE void IfxGtm_Tim_Ch_setEdgeCounter | ( | Ifx_GTM_TIM_CH * | channel,
 |  | uint8 | edgeCounter
 | ) |  |

This function configures the Edge counter register.

Parameters
channel | TIM channel pointer
edgeCounter | Edge counter value
Returns
None

Definition at line 583 of file IfxGtm_Tim.h.

◆ IfxGtm_Tim_Ch_setFallingEdgeFilterTime()

IFX_INLINE void IfxGtm_Tim_Ch_setFallingEdgeFilterTime | ( | Ifx_GTM_TIM_CH * | channel,
 |  | uint32 | filterTime
 | ) |  |

This function configures the Falling edge Filter Parameter.

Parameters
channel | TIM channel pointer
filterTime | Falling edge Filter Parameter.
Returns
None

Definition at line 589 of file IfxGtm_Tim.h.

Referenced by IfxGtm_Tim_Timer_initChannel().

◆ IfxGtm_Tim_Ch_setFilterNotification()

IFX_EXTERN void IfxGtm_Tim_Ch_setFilterNotification | ( | Ifx_GTM_TIM_CH * | channel,
 |  | boolean | irqOnGlitch
 | ) |  |

Set the filter notification.

Parameters
channel | TIM channel pointer
irqOnGlitch | If TRUE, the interrupt on glitch is enabled
Returns
None

Definition at line 173 of file IfxGtm_Tim.c.

Referenced by IfxGtm_Tim_In_init().

◆ IfxGtm_Tim_Ch_setInputSourceSelection()

IFX_INLINE void IfxGtm_Tim_Ch_setInputSourceSelection | ( | Ifx_GTM_TIM * | tim,
 |  | IfxGtm_Tim_Ch | channel,
 |  | IfxGtm_Tim_InputSourceSelect | inputSource
 | ) |  |

This function configures the Input source selection register.

Parameters
tim | TIM instance number
channel | Channel index
inputSource | Input source to Channel
Returns
None

Definition at line 595 of file IfxGtm_Tim.h.

Referenced by IfxGtm_Tim_Timer_initChannel().

◆ IfxGtm_Tim_Ch_setNotification()

IFX_INLINE void IfxGtm_Tim_Ch_setNotification | ( | Ifx_GTM_TIM_CH * | channel,
 |  | IfxGtm_Tim_IrqType | irqType
 | ) |  |

set the Interrupt Notification

Parameters
channel | TIM channel pointer
irqType | Interrupt type
Returns
None

Definition at line 604 of file IfxGtm_Tim.h.

Referenced by IfxGtm_Tim_Timer_initChannel().

◆ IfxGtm_Tim_Ch_setNotificationMode()

IFX_EXTERN void IfxGtm_Tim_Ch_setNotificationMode | ( | Ifx_GTM_TIM_CH * | channel,
 |  | IfxGtm_IrqMode | mode
 | ) |  |

This function configures the TIM channel IRQ mode.

Parameters
channel | TIM channel pointer
mode | Notification Mode
Returns
None

Definition at line 184 of file IfxGtm_Tim.c.

Referenced by IfxGtm_Tim_In_init(), and IfxGtm_Tim_Timer_initChannel().

◆ IfxGtm_Tim_Ch_setRisingEdgeFilterTime()

IFX_INLINE void IfxGtm_Tim_Ch_setRisingEdgeFilterTime | ( | Ifx_GTM_TIM_CH * | channel,
 |  | uint32 | filterTime
 | ) |  |

This function configures theRaising edge Filter Parameter.

Parameters
channel | TIM channel pointer
filterTime | Raising edge Filter Parameter.
Returns
None

Definition at line 611 of file IfxGtm_Tim.h.

Referenced by IfxGtm_Tim_Timer_initChannel().

◆ IfxGtm_Tim_Ch_setShadowCounter()

IFX_INLINE void IfxGtm_Tim_Ch_setShadowCounter | ( | Ifx_GTM_TIM_CH * | channel,
 |  | uint32 | shadowCounter
 | ) |  |

This function configures the Shadow counter register.

Parameters
channel | TIM channel pointer
shadowCounter | Shadow counter value
Returns
None

Definition at line 617 of file IfxGtm_Tim.h.

Referenced by IfxGtm_Tim_Timer_initChannel().

◆ IfxGtm_Tim_Ch_setTimeoutNotification()

IFX_EXTERN void IfxGtm_Tim_Ch_setTimeoutNotification | ( | Ifx_GTM_TIM_CH * | channel,
 |  | boolean | irqOnTimeout
 | ) |  |

Set the timeout notification.

Parameters
channel | TIM channel pointer
irqOnTimeout | If TRUE, the interrupt on timeout is enabled
Returns
None

Definition at line 196 of file IfxGtm_Tim.c.

Referenced by IfxGtm_Tim_In_init().

◆ IfxGtm_Tim_getChannel()

IFX_INLINE Ifx_GTM_TIM_CH * IfxGtm_Tim_getChannel | ( | Ifx_GTM_TIM * | tim,
 |  | IfxGtm_Tim_Ch | channel
 | ) |  |

Returns the pointer to the TIM channel.

Parameters
tim | Pointer to Tim base
channel | TIM channel
Returns
Pointer to TIM channel base

Definition at line 623 of file IfxGtm_Tim.h.

Referenced by IfxGtm_Tim_In_init(), and IfxGtm_Tim_Timer_initChannel().


iLLD_TC38A: Tom Basic Functionality

Modules
Tom Basic Functionality
iLLD » GTM » Standard Driver
Collaboration diagram for Tom Basic Functionality:

Modules

TOM Enumerations
TOM Channel Functions
TOM TGC Functions
TOM Module Functions

Detailed Description


iLLD_TC38A: TOM Enumerations

Enumerations
TOM Enumerations
iLLD » GTM » Standard Driver » Tom Basic Functionality
Collaboration diagram for TOM Enumerations:

Enumerations

enum IfxGtm_Tom_Ch_ClkSrc {
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk0 = 0,
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk1 = 1,
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk2 = 2,
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk3 = 3,
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk4 = 4,
IfxGtm_Tom_Ch_ClkSrc_noClock = 5
}
Clock source for the TOM channels. More...
enum IfxGtm_Tom_Ch_OutputTrigger {
IfxGtm_Tom_Ch_OutputTrigger_forward = 0,
IfxGtm_Tom_Ch_OutputTrigger_generate = 1
}
Reset source for channel counter CN0. More...
enum IfxGtm_Tom_Ch_ResetEvent {
IfxGtm_Tom_Ch_ResetEvent_onCm0 = 0,
IfxGtm_Tom_Ch_ResetEvent_onTrigger = 1
}
Reset event for channel counter CN0. More...

Detailed Description

Enumeration Type Documentation

◆ IfxGtm_Tom_Ch_ClkSrc

enum IfxGtm_Tom_Ch_ClkSrc

Clock source for the TOM channels.

Enumerator
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk0 | div 1
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk1 | div 16
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk2 | div 256
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk3 | div 4096
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk4 | div 32768
IfxGtm_Tom_Ch_ClkSrc_noClock | no clock

Definition at line 83 of file IfxGtm_Tom.h.

◆ IfxGtm_Tom_Ch_OutputTrigger

enum IfxGtm_Tom_Ch_OutputTrigger

Reset source for channel counter CN0.

Enumerator
IfxGtm_Tom_Ch_OutputTrigger_forward | Forward the trigger from the previous channel.
IfxGtm_Tom_Ch_OutputTrigger_generate | Generate the trigger from the current channel.

Definition at line 95 of file IfxGtm_Tom.h.

◆ IfxGtm_Tom_Ch_ResetEvent

enum IfxGtm_Tom_Ch_ResetEvent

Reset event for channel counter CN0.

Enumerator
IfxGtm_Tom_Ch_ResetEvent_onCm0
IfxGtm_Tom_Ch_ResetEvent_onTrigger

Definition at line 103 of file IfxGtm_Tom.h.


iLLD_TC38A: TOM Channel Functions

Functions
TOM Channel Functions
iLLD » GTM » Standard Driver » Tom Basic Functionality
Collaboration diagram for TOM Channel Functions:

Functions

IFX_INLINE Ifx_GTM_TOM_CH * | IfxGtm_Tom_Ch_getChannelPointer (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the base addredd of selected Tom channel. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_clearOneNotification (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Clears the channel One notification. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_clearZeroNotification (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Clears the channel Zero notification. More...
IFX_EXTERN float32 | IfxGtm_Tom_Ch_getClockFrequency (Ifx_GTM *gtm, Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the TOM channel input clock frequency in Hz. More...
IFX_EXTERN IfxGtm_Tom_Ch_ClkSrc | IfxGtm_Tom_Ch_getClockSource (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the channel clock source. More...
IFX_EXTERN uint32 | IfxGtm_Tom_Ch_getCompareOne (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare one value. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Tom_Ch_getCompareOnePointer (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare one pointer. More...
IFX_EXTERN uint32 | IfxGtm_Tom_Ch_getCompareZero (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare zero value. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Tom_Ch_getCompareZeroPointer (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare zero pointer. More...
IFX_EXTERN boolean | IfxGtm_Tom_Ch_getOutputLevel (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Gets the TOM output level. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxGtm_Tom_Ch_getSrcPointer (Ifx_GTM *gtm, IfxGtm_Tom tom, IfxGtm_Tom_Ch channel)
Returns a pointer to the TOM channel SRC. More...
IFX_EXTERN Ifx_GTM_TOM_TGC * | IfxGtm_Tom_Ch_getTgcPointer (Ifx_GTM_TOM *tom, uint32 tgcIndex)
Returns the TGC pointer. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Tom_Ch_getTimerPointer (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the Timer pointer. More...
IFX_EXTERN boolean | IfxGtm_Tom_Ch_isOneNotification (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the status of channel One notification. More...
IFX_EXTERN boolean | IfxGtm_Tom_Ch_isZeroNotification (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the status of channel Zero notification. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_raiseInterruptOne (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Raises the interrupt for Compare 1. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_raiseInterruptZero (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Raises the interrupt for Compare 0. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setClockSource (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ClkSrc clock)
Sets the channel clock source. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setCompare (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareZero, uint32 compareOne)
Sets the compare 0 and 1 values. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setCompareOne (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareOne)
Sets the compare 1 value. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setCompareOneShadow (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowOne)
Sets the compare 1 shadow value. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setCompareShadow (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero, uint32 shadowOne)
Sets the compare 0 and 1 shadow values. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setCompareZero (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareZero)
Sets the compare 0 value. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setCompareZeroShadow (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero)
Sets the compare 0 shadow value. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setCounterValue (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 value)
Sets the counter value. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setGatedCounter (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the gated counter mode (channel 0 to 7 only) More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setNotification (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne)
Sets the channel notification. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setOneShotMode (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the one shot mode. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setPcm (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the PCM mode (channel 15 only) More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setResetSource (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ResetEvent event)
Sets the channel clock source either from local or from previous channel. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setSignalLevel (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, Ifx_ActiveState activeState)
Sets the signal level. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setSpe (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the SPE mode (channel 0 to 7 only) More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setTriggerOutput (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_OutputTrigger trigger)
Sets the channel trigger output. More...

Detailed Description

Function Documentation

◆ IfxGtm_Tom_Ch_clearOneNotification()

IFX_EXTERN void IfxGtm_Tom_Ch_clearOneNotification | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel
 | ) |  |

Clears the channel One notification.

Parameters
tom | Pointer to the TOM object
channel | Channel index
Returns
None

Definition at line 54 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Timer_acknowledgeTriggerIrq().

◆ IfxGtm_Tom_Ch_clearZeroNotification()

IFX_EXTERN void IfxGtm_Tom_Ch_clearZeroNotification | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel
 | ) |  |

Clears the channel Zero notification.

Parameters
tom | Pointer to the TOM object
channel | Channel index
Returns
None

Definition at line 61 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Timer_acknowledgeTimerIrq().

◆ IfxGtm_Tom_Ch_getChannelPointer()

IFX_INLINE Ifx_GTM_TOM_CH * IfxGtm_Tom_Ch_getChannelPointer | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel
 | ) |  |

Returns the base addredd of selected Tom channel.

Parameters
tom | Pointer to the TOM object
channel | Channel index
Returns
Pointer to channel base address

Definition at line 540 of file IfxGtm_Tom.h.

Referenced by IfxGtm_Tom_Ch_clearOneNotification(), IfxGtm_Tom_Ch_clearZeroNotification(), IfxGtm_Tom_Ch_getClockSource(), IfxGtm_Tom_Ch_getCompareOne(), IfxGtm_Tom_Ch_getCompareOnePointer(), IfxGtm_Tom_Ch_getCompareZero(), IfxGtm_Tom_Ch_getCompareZeroPointer(), IfxGtm_Tom_Ch_getOutputLevel(), IfxGtm_Tom_Ch_getTimerPointer(), IfxGtm_Tom_Ch_isOneNotification(), IfxGtm_Tom_Ch_isZeroNotification(), IfxGtm_Tom_Ch_raiseInterruptOne(), IfxGtm_Tom_Ch_raiseInterruptZero(), IfxGtm_Tom_Ch_setClockSource(), IfxGtm_Tom_Ch_setCompare(), IfxGtm_Tom_Ch_setCompareOne(), IfxGtm_Tom_Ch_setCompareOneShadow(), IfxGtm_Tom_Ch_setCompareShadow(), IfxGtm_Tom_Ch_setCompareZero(), IfxGtm_Tom_Ch_setCompareZeroShadow(), IfxGtm_Tom_Ch_setCounterValue(), IfxGtm_Tom_Ch_setGatedCounter(), IfxGtm_Tom_Ch_setNotification(), IfxGtm_Tom_Ch_setOneShotMode(), IfxGtm_Tom_Ch_setResetSource(), IfxGtm_Tom_Ch_setSignalLevel(), IfxGtm_Tom_Ch_setSpe(), and IfxGtm_Tom_Ch_setTriggerOutput().

◆ IfxGtm_Tom_Ch_getClockFrequency()

IFX_EXTERN float32 IfxGtm_Tom_Ch_getClockFrequency | ( | Ifx_GTM * | gtm,
 |  | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel
 | ) |  |

Returns the TOM channel input clock frequency in Hz.

Parameters
gtm | Pointer to GTM module
tom | Pointer to the TOM object
channel | Channel index
Returns
TOM channel input clock frequency in Hz

Definition at line 68 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Timer_updateInputFrequency().

◆ IfxGtm_Tom_Ch_getClockSource()

IFX_EXTERN IfxGtm_Tom_Ch_ClkSrc IfxGtm_Tom_Ch_getClockSource | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel
 | ) |  |

Returns the channel clock source.

Parameters
tom | Pointer to the TOM object
channel | Channel index
Returns
The clock source

Definition at line 92 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Ch_getClockFrequency(), IfxGtm_Tom_Dtm_PwmHl_init(), and IfxGtm_Tom_PwmHl_init().

◆ IfxGtm_Tom_Ch_getCompareOne()

IFX_EXTERN uint32 IfxGtm_Tom_Ch_getCompareOne | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel
 | ) |  |

Returns the compare one value.

Parameters
tom | Pointer to the TOM object
channel | Channel index
Returns
compare one value

Definition at line 104 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Timer_getTrigger().

◆ IfxGtm_Tom_Ch_getCompareOnePointer()

IFX_EXTERN volatile uint32* IfxGtm_Tom_Ch_getCompareOnePointer | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel
 | ) |  |

Returns the compare one pointer.

Parameters
tom | Pointer to the TOM object
channel | Channel index
Returns
compare one pointer

Definition at line 112 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Timer_getTriggerPointer().

◆ IfxGtm_Tom_Ch_getCompareZero()

IFX_EXTERN uint32 IfxGtm_Tom_Ch_getCompareZero | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel
 | ) |  |

Returns the compare zero value.

Parameters
tom | Pointer to the TOM object
channel | Channel index
Returns
compare zero value

Definition at line 120 of file IfxGtm_Tom.c.

◆ IfxGtm_Tom_Ch_getCompareZeroPointer()

IFX_EXTERN volatile uint32* IfxGtm_Tom_Ch_getCompareZeroPointer | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel
 | ) |  |

Returns the compare zero pointer.

Parameters
tom | Pointer to the TOM object
channel | Channel index
Returns
compare zero pointer

Definition at line 128 of file IfxGtm_Tom.c.

◆ IfxGtm_Tom_Ch_getOutputLevel()

IFX_EXTERN boolean IfxGtm_Tom_Ch_getOutputLevel | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel
 | ) |  |

Gets the TOM output level.

Parameters
tom | Pointer to the TOM object
channel | Channel index
Returns
TRUE the output is high, FALSE the output is low

Definition at line 135 of file IfxGtm_Tom.c.

◆ IfxGtm_Tom_Ch_getSrcPointer()

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxGtm_Tom_Ch_getSrcPointer | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Tom | tom,
 |  | IfxGtm_Tom_Ch | channel
 | ) |  |

Returns a pointer to the TOM channel SRC.

Parameters
gtm | Pointer to GTM module
tom | Specifies the tom object
channel | Channel index
Returns
Pointer to the TOM channel SRC

Definition at line 146 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Pwm_init(), and IfxGtm_Tom_Timer_init().

◆ IfxGtm_Tom_Ch_getTgcPointer()

IFX_EXTERN Ifx_GTM_TOM_TGC* IfxGtm_Tom_Ch_getTgcPointer | ( | Ifx_GTM_TOM * | tom,
 |  | uint32 | tgcIndex
 | ) |  |

Returns the TGC pointer.

Parameters
tom | Pointer to the TOM object
tgcIndex | TGC index
Returns
TOM TGC object pointer

Definition at line 153 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Pwm_init(), IfxGtm_Tom_PwmHl_init(), and IfxGtm_Tom_Timer_init().

◆ IfxGtm_Tom_Ch_getTimerPointer()

IFX_EXTERN volatile uint32* IfxGtm_Tom_Ch_getTimerPointer | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel
 | ) |  |

Returns the Timer pointer.

Parameters
tom | Pointer to the TOM object
channel | Channel index
Returns
Timer pointer

Definition at line 170 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Timer_getPointer().

◆ IfxGtm_Tom_Ch_isOneNotification()

IFX_EXTERN boolean IfxGtm_Tom_Ch_isOneNotification | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel
 | ) |  |

Returns the status of channel One notification.

Parameters
tom | Pointer to the TOM object
channel | Channel index
Returns
Status of channel One notification

Definition at line 177 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Timer_acknowledgeTriggerIrq().

◆ IfxGtm_Tom_Ch_isZeroNotification()

IFX_EXTERN boolean IfxGtm_Tom_Ch_isZeroNotification | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel
 | ) |  |

Returns the status of channel Zero notification.

Parameters
tom | Pointer to the TOM object
channel | Channel index
Returns
Status of channel Zero notification

Definition at line 186 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Timer_acknowledgeTimerIrq().

◆ IfxGtm_Tom_Ch_raiseInterruptOne()

IFX_EXTERN void IfxGtm_Tom_Ch_raiseInterruptOne | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel
 | ) |  |

Raises the interrupt for Compare 1.

Parameters
tom | Pointer to the TOM object
channel | Channel index
Returns
None

Definition at line 195 of file IfxGtm_Tom.c.

◆ IfxGtm_Tom_Ch_raiseInterruptZero()

IFX_EXTERN void IfxGtm_Tom_Ch_raiseInterruptZero | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel
 | ) |  |

Raises the interrupt for Compare 0.

Parameters
tom | Pointer to the TOM object
channel | Channel index
Returns
None

Definition at line 202 of file IfxGtm_Tom.c.

◆ IfxGtm_Tom_Ch_setClockSource()

IFX_EXTERN void IfxGtm_Tom_Ch_setClockSource | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel,
 |  | IfxGtm_Tom_Ch_ClkSrc | clock
 | ) |  |

Sets the channel clock source.

Parameters
tom | Pointer to the TOM object
channel | Channel index
clock | Channel clock source
Returns
None

Definition at line 209 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Dtm_PwmHl_init(), IfxGtm_Tom_Pwm_init(), IfxGtm_Tom_PwmHl_init(), and IfxGtm_Tom_Timer_init().

◆ IfxGtm_Tom_Ch_setCompare()

IFX_EXTERN void IfxGtm_Tom_Ch_setCompare | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel,
 |  | uint32 | compareZero,
 |  | uint32 | compareOne
 | ) |  |

Sets the compare 0 and 1 values.

Parameters
tom | Pointer to the TOM object
channel | Channel index
compareZero | Compare zero value
compareOne | Compare one value
Returns
None

Definition at line 217 of file IfxGtm_Tom.c.

◆ IfxGtm_Tom_Ch_setCompareOne()

IFX_EXTERN void IfxGtm_Tom_Ch_setCompareOne | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel,
 |  | uint32 | compareOne
 | ) |  |

Sets the compare 1 value.

Parameters
tom | Pointer to the TOM object
channel | Channel index
compareOne | Compare one value
Returns
None

Definition at line 226 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Pwm_init().

◆ IfxGtm_Tom_Ch_setCompareOneShadow()

IFX_EXTERN void IfxGtm_Tom_Ch_setCompareOneShadow | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel,
 |  | uint32 | shadowOne
 | ) |  |

Sets the compare 1 shadow value.

Parameters
tom | Pointer to the TOM object
channel | Channel index
shadowOne | Compare one shadow value
Returns
None

Definition at line 234 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Pwm_init(), and IfxGtm_Tom_Timer_setTrigger().

◆ IfxGtm_Tom_Ch_setCompareShadow()

IFX_EXTERN void IfxGtm_Tom_Ch_setCompareShadow | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel,
 |  | uint32 | shadowZero,
 |  | uint32 | shadowOne
 | ) |  |

Sets the compare 0 and 1 shadow values.

Parameters
tom | Pointer to the TOM object
channel | Channel index
shadowZero | Compare zero shadow value
shadowOne | Compare one shadow value
Returns
None

Definition at line 242 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Dtm_PwmHl_updateCenterAligned(), IfxGtm_Tom_Dtm_PwmHl_updateEdgeAligned(), IfxGtm_Tom_Dtm_PwmHl_updateOff(), IfxGtm_Tom_Dtm_PwmHl_updatePulse(), IfxGtm_Tom_Dtm_PwmHl_updateShiftCenterAligned(), IfxGtm_Tom_PwmHl_updateCenterAligned(), IfxGtm_Tom_PwmHl_updateEdgeAligned(), IfxGtm_Tom_PwmHl_updateOff(), IfxGtm_Tom_PwmHl_updatePulse(), and IfxGtm_Tom_PwmHl_updateShiftCenterAligned().

◆ IfxGtm_Tom_Ch_setCompareZero()

IFX_EXTERN void IfxGtm_Tom_Ch_setCompareZero | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel,
 |  | uint32 | compareZero
 | ) |  |

Sets the compare 0 value.

Parameters
tom | Pointer to the TOM object
channel | Channel index
compareZero | Compare zero value
Returns
None

Definition at line 251 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Pwm_init().

◆ IfxGtm_Tom_Ch_setCompareZeroShadow()

IFX_EXTERN void IfxGtm_Tom_Ch_setCompareZeroShadow | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel,
 |  | uint32 | shadowZero
 | ) |  |

Sets the compare 0 shadow value.

Parameters
tom | Pointer to the TOM object
channel | Channel index
shadowZero | Compare zero shadow value
Returns
None

Definition at line 259 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Pwm_init(), and IfxGtm_Tom_Timer_setPeriod().

◆ IfxGtm_Tom_Ch_setCounterValue()

IFX_EXTERN void IfxGtm_Tom_Ch_setCounterValue | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel,
 |  | uint32 | value
 | ) |  |

Sets the counter value.

Parameters
tom | Pointer to the TOM object
channel | Channel index
value | Counter value
Returns
None

Definition at line 267 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_PwmHl_init(), and IfxGtm_Tom_Timer_init().

◆ IfxGtm_Tom_Ch_setGatedCounter()

IFX_EXTERN void IfxGtm_Tom_Ch_setGatedCounter | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel,
 |  | boolean | enabled
 | ) |  |

Enable/disable the gated counter mode (channel 0 to 7 only)

Parameters
tom | Pointer to the TOM object
channel | Channel index
enabled | If TRUE, the feature is enabled, else disabled
Returns
None

Definition at line 275 of file IfxGtm_Tom.c.

◆ IfxGtm_Tom_Ch_setNotification()

IFX_EXTERN void IfxGtm_Tom_Ch_setNotification | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel,
 |  | IfxGtm_IrqMode | mode,
 |  | boolean | interruptOnCompareZero,
 |  | boolean | interruptOnCompareOne
 | ) |  |

Sets the channel notification.

Parameters
tom | Pointer to the TOM object
channel | Channel index
mode | Interrupt mode
interruptOnCompareZero | If TRUE, an interrupt is generated on compare 0, else no interrupt is generated
interruptOnCompareOne | If TRUE, an interrupt is generated on compare 1, else no interrupt is generated
Returns
None

Definition at line 286 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Pwm_init(), and IfxGtm_Tom_Timer_init().

◆ IfxGtm_Tom_Ch_setOneShotMode()

IFX_EXTERN void IfxGtm_Tom_Ch_setOneShotMode | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel,
 |  | boolean | enabled
 | ) |  |

Enable/disable the one shot mode.

Parameters
tom | Pointer to the TOM object
channel | Channel index
enabled | If TRUE, the feature is enabled, else disabled
Returns
None

Definition at line 304 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Timer_setSingleMode().

◆ IfxGtm_Tom_Ch_setPcm()

IFX_EXTERN void IfxGtm_Tom_Ch_setPcm | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel,
 |  | boolean | enabled
 | ) |  |

Enable/disable the PCM mode (channel 15 only)

Parameters
tom | Pointer to the TOM object
channel | Channel index
enabled | If TRUE, the feature is enabled, else disabled
Returns
None

Definition at line 312 of file IfxGtm_Tom.c.

◆ IfxGtm_Tom_Ch_setResetSource()

IFX_EXTERN void IfxGtm_Tom_Ch_setResetSource | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel,
 |  | IfxGtm_Tom_Ch_ResetEvent | event
 | ) |  |

Sets the channel clock source either from local or from previous channel.

Parameters
tom | Pointer to the TOM object
channel | Channel index
event | Channel reset event
Returns
None

Definition at line 321 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Dtm_PwmHl_init(), IfxGtm_Tom_PwmHl_init(), and IfxGtm_Tom_Timer_init().

◆ IfxGtm_Tom_Ch_setSignalLevel()

IFX_EXTERN void IfxGtm_Tom_Ch_setSignalLevel | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel,
 |  | Ifx_ActiveState | activeState
 | ) |  |

Sets the signal level.

Parameters
tom | Pointer to the TOM object
channel | Channel index
activeState | Signal level active state. In case the channel is reset, the output is set to not active. The signal is active between 0 and the leading edge (CM1) and inactive between the leading edge and the trailing edge (CM0).
Returns
None

Definition at line 329 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Dtm_PwmHl_init(), IfxGtm_Tom_Pwm_init(), IfxGtm_Tom_PwmHl_init(), IfxGtm_Tom_PwmHl_setMode(), and IfxGtm_Tom_Timer_init().

◆ IfxGtm_Tom_Ch_setSpe()

IFX_EXTERN void IfxGtm_Tom_Ch_setSpe | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel,
 |  | boolean | enabled
 | ) |  |

Enable/disable the SPE mode (channel 0 to 7 only)

Parameters
tom | Pointer to the TOM object
channel | Channel index
enabled | If TRUE, the feature is enabled, else disabled
Returns
None

Definition at line 337 of file IfxGtm_Tom.c.

◆ IfxGtm_Tom_Ch_setTriggerOutput()

IFX_EXTERN void IfxGtm_Tom_Ch_setTriggerOutput | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel,
 |  | IfxGtm_Tom_Ch_OutputTrigger | trigger
 | ) |  |

Sets the channel trigger output.

Parameters
tom | Pointer to the TOM object
channel | Channel index
trigger | Channel trigger output mode
Returns
None

Definition at line 348 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Dtm_PwmHl_init(), IfxGtm_Tom_PwmHl_init(), and IfxGtm_Tom_Timer_init().


iLLD_TC38A: TOM TGC Functions

Functions
TOM TGC Functions
iLLD » GTM » Standard Driver » Tom Basic Functionality
Collaboration diagram for TOM TGC Functions:

Functions

IFX_INLINE void | IfxGtm_Tom_Tgc_writeGlobalControl (Ifx_GTM_TOM_TGC *tgc, uint32 control)
Sets the tgc global control value. More...
IFX_EXTERN uint32 | IfxGtm_Tom_Tgc_buildFeature (uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable. More...
IFX_EXTERN uint32 | IfxGtm_Tom_Tgc_buildFeatureForChannel (IfxGtm_Tom_Ch channel, boolean enabled, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable for a single channel. More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_enableChannel (Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel (ENDIS) More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_enableChannelOutput (Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel output (OUTEN) More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_enableChannelUpdate (Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable one channel for update (UPEN) More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_enableChannels (Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels (ENDIS) More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_enableChannelsOutput (Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels output (OUTEN) More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_enableChannelsTrigger (Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask)
Enable/disable the TGC channels trigger. More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_enableChannelsUpdate (Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask)
Enable/disable one or more channels for update (UPEN) More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_enableTimeTrigger (Ifx_GTM_TOM_TGC *tgc, boolean enabled)
Enable/disable the time base trigger. More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_resetChannels (Ifx_GTM_TOM_TGC *tgc, uint32 resetMask)
Reset one or more channels. More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_setChannelForceUpdate (Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean resetEnabled)
Enable/disable one channel for update (FUPD) More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_setChannelsForceUpdate (Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
Enable/disable one or more channels for the force update feature (FUPD) More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_setTimeTrigger (Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tbu_Ts base, uint32 value)
Sets the trigger time base and time base value. More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_trigger (Ifx_GTM_TOM_TGC *tgc)
Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG) More...

Detailed Description

Function Documentation

◆ IfxGtm_Tom_Tgc_buildFeature()

IFX_EXTERN uint32 IfxGtm_Tom_Tgc_buildFeature | ( | uint16 | enableMask,
 |  | uint16 | disableMask,
 |  | uint8 | bitfieldOffset
 | ) |  |

Builds the register value for the feature enable/disable.

Parameters
enableMask | Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
disableMask | Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
bitfieldOffset | Offset of the channel 0 bitfield in the register
Returns
The register value

Definition at line 356 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Tgc_enableChannels(), IfxGtm_Tom_Tgc_enableChannelsOutput(), IfxGtm_Tom_Tgc_enableChannelsTrigger(), IfxGtm_Tom_Tgc_enableChannelsUpdate(), IfxGtm_Tom_Tgc_setChannelsForceUpdate(), and IfxGtm_Tom_Timer_addToChannelMask().

◆ IfxGtm_Tom_Tgc_buildFeatureForChannel()

IFX_EXTERN uint32 IfxGtm_Tom_Tgc_buildFeatureForChannel | ( | IfxGtm_Tom_Ch | channel,
 |  | boolean | enabled,
 |  | uint8 | bitfieldOffset
 | ) |  |

Builds the register value for the feature enable/disable for a single channel.

Parameters
channel | Channel index
enabled | Enable/ Disable choise of the feature
bitfieldOffset | Offset of the channel 0 bitfield in the register
Returns
The register value

Definition at line 384 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Tgc_enableChannel(), IfxGtm_Tom_Tgc_enableChannelOutput(), IfxGtm_Tom_Tgc_enableChannelUpdate(), and IfxGtm_Tom_Tgc_setChannelForceUpdate().

◆ IfxGtm_Tom_Tgc_enableChannel()

IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannel | ( | Ifx_GTM_TOM_TGC * | tgc,
 |  | IfxGtm_Tom_Ch | channel,
 |  | boolean | enabled,
 |  | boolean | immediate
 | ) |  |

Enable/disable one channel (ENDIS)

Parameters
tgc | Pointer to the TGC object
channel | Channel index
enabled | Enable/ Disable choise of the feature
immediate | If TRUE, the action is done immediately else, the action is done on TGC trigger (CTRL_TRIG)
Returns
None

Definition at line 404 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Pwm_init(), IfxGtm_Tom_Pwm_start(), and IfxGtm_Tom_Pwm_stop().

◆ IfxGtm_Tom_Tgc_enableChannelOutput()

IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannelOutput | ( | Ifx_GTM_TOM_TGC * | tgc,
 |  | IfxGtm_Tom_Ch | channel,
 |  | boolean | enabled,
 |  | boolean | immediate
 | ) |  |

Enable/disable one channel output (OUTEN)

Parameters
tgc | Pointer to the TGC object
channel | Channel index
enabled | Enable/ Disable choise of the feature
immediate | If TRUE, the action is done immediately else, the action is done on TGC trigger (CTRL_TRIG)
Returns
None

Definition at line 422 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Pwm_init(), IfxGtm_Tom_Pwm_start(), and IfxGtm_Tom_Pwm_stop().

◆ IfxGtm_Tom_Tgc_enableChannels()

IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannels | ( | Ifx_GTM_TOM_TGC * | tgc,
 |  | uint16 | enableMask,
 |  | uint16 | disableMask,
 |  | boolean | immediate
 | ) |  |

Enable/disable one or more channels (ENDIS)

Parameters
tgc | Pointer to the TGC object
enableMask | Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
disableMask | Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
immediate | If TRUE, the action is done immediately else, the action is done on TGC trigger (CTRL_TRIG)
Returns
None

Definition at line 446 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Dtm_PwmHl_init(), IfxGtm_Tom_PwmHl_init(), IfxGtm_Tom_Timer_init(), IfxGtm_Tom_Timer_run(), and IfxGtm_Tom_Timer_stop().

◆ IfxGtm_Tom_Tgc_enableChannelsOutput()

IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannelsOutput | ( | Ifx_GTM_TOM_TGC * | tgc,
 |  | uint16 | enableMask,
 |  | uint16 | disableMask,
 |  | boolean | immediate
 | ) |  |

Enable/disable one or more channels output (OUTEN)

Parameters
tgc | Pointer to the TGC object
enableMask | Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
disableMask | Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
immediate | If TRUE, the action is done immediately else, the action is done on TGC trigger (CTRL_TRIG)
Returns
None

Definition at line 464 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Dtm_PwmHl_init(), IfxGtm_Tom_PwmHl_init(), and IfxGtm_Tom_Timer_init().

◆ IfxGtm_Tom_Tgc_enableChannelsTrigger()

IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannelsTrigger | ( | Ifx_GTM_TOM_TGC * | tgc,
 |  | uint16 | enableMask,
 |  | uint16 | disableMask
 | ) |  |

Enable/disable the TGC channels trigger.

Parameters
tgc | Pointer to the TGC object
enableMask | Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
disableMask | Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
Returns
None

Definition at line 482 of file IfxGtm_Tom.c.

◆ IfxGtm_Tom_Tgc_enableChannelsUpdate()

IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannelsUpdate | ( | Ifx_GTM_TOM_TGC * | tgc,
 |  | uint16 | enableMask,
 |  | uint16 | disableMask
 | ) |  |

Enable/disable one or more channels for update (UPEN)

Parameters
tgc | Pointer to the TGC object
enableMask | Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
disableMask | Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
Returns
None

Definition at line 488 of file IfxGtm_Tom.c.

◆ IfxGtm_Tom_Tgc_enableChannelUpdate()

IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannelUpdate | ( | Ifx_GTM_TOM_TGC * | tgc,
 |  | IfxGtm_Tom_Ch | channel,
 |  | boolean | enabled
 | ) |  |

Enable/disable one channel for update (UPEN)

Parameters
tgc | Pointer to the TGC object
channel | Channel index
enabled | Enable/ Disable choise of the feature
Returns
None

Definition at line 440 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Pwm_init().

◆ IfxGtm_Tom_Tgc_enableTimeTrigger()

IFX_EXTERN void IfxGtm_Tom_Tgc_enableTimeTrigger | ( | Ifx_GTM_TOM_TGC * | tgc,
 |  | boolean | enabled
 | ) |  |

Enable/disable the time base trigger.

Parameters
tgc | Pointer to the TGC object
enabled | If TRUE, the trigger is enabled else disabled
Returns
None

Definition at line 494 of file IfxGtm_Tom.c.

◆ IfxGtm_Tom_Tgc_resetChannels()

IFX_EXTERN void IfxGtm_Tom_Tgc_resetChannels | ( | Ifx_GTM_TOM_TGC * | tgc,
 |  | uint32 | resetMask
 | ) |  |

Reset one or more channels.

Parameters
tgc | Pointer to the TGC object
resetMask | Mask for the channel reset (bit 0: Channel 0, bit 1: channel 1, ...)
Returns
None

Definition at line 500 of file IfxGtm_Tom.c.

◆ IfxGtm_Tom_Tgc_setChannelForceUpdate()

IFX_EXTERN void IfxGtm_Tom_Tgc_setChannelForceUpdate | ( | Ifx_GTM_TOM_TGC * | tgc,
 |  | IfxGtm_Tom_Ch | channel,
 |  | boolean | enabled,
 |  | boolean | resetEnabled
 | ) |  |

Enable/disable one channel for update (FUPD)

Parameters
tgc | Pointer to the TGC object
channel | Channel index
enabled | Enable/ Disable choise of the feature
resetEnabled | Enable/ Disable reset choise of the feature
Returns
None

Definition at line 519 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Pwm_init().

◆ IfxGtm_Tom_Tgc_setChannelsForceUpdate()

IFX_EXTERN void IfxGtm_Tom_Tgc_setChannelsForceUpdate | ( | Ifx_GTM_TOM_TGC * | tgc,
 |  | uint16 | enableMask,
 |  | uint16 | disableMask,
 |  | uint16 | resetEnableMask,
 |  | uint16 | resetDisableMask
 | ) |  |

Enable/disable one or more channels for the force update feature (FUPD)

Parameters
tgc | Pointer to the TGC object
enableMask | Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
disableMask | Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
resetEnableMask | Mask for the enabled channels counter reset on force update (bit 0: Channel 0, bit 1: channel 1, ...) Channel 0, bit 1: channel 1, ...)
resetDisableMask | Mask for the disabled channels with no counter reset on force update (bit 0: Channel 0, bit 1: channel 1, ...)
Returns
None

Definition at line 530 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Dtm_PwmHl_init(), IfxGtm_Tom_PwmHl_init(), and IfxGtm_Tom_Timer_init().

◆ IfxGtm_Tom_Tgc_setTimeTrigger()

IFX_EXTERN void IfxGtm_Tom_Tgc_setTimeTrigger | ( | Ifx_GTM_TOM_TGC * | tgc,
 |  | IfxGtm_Tbu_Ts | base,
 |  | uint32 | value
 | ) |  |

Sets the trigger time base and time base value.

Parameters
tgc | Pointer to the TGC object
base | Time base used for comparison
value | Compare value that raise the trigger
Returns
None

Definition at line 541 of file IfxGtm_Tom.c.

◆ IfxGtm_Tom_Tgc_trigger()

IFX_EXTERN void IfxGtm_Tom_Tgc_trigger ( Ifx_GTM_TOM_TGC * tgc )

Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG)

Parameters
tgc Pointer to the TGC object
Returns
None

Definition at line 552 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Dtm_PwmHl_init(), IfxGtm_Tom_Pwm_init(), IfxGtm_Tom_Pwm_start(), IfxGtm_Tom_Pwm_stop(), IfxGtm_Tom_PwmHl_init(), and IfxGtm_Tom_Timer_init().

◆ IfxGtm_Tom_Tgc_writeGlobalControl()

IFX_INLINE void IfxGtm_Tom_Tgc_writeGlobalControl | ( | Ifx_GTM_TOM_TGC * | tgc,
 |  | uint32 | control
 | ) |  |

Sets the tgc global control value.

Parameters
tgc | Pointer to the TGC object
control | global control value
Returns
None

Definition at line 546 of file IfxGtm_Tom.h.

Referenced by IfxGtm_Tom_Timer_applyUpdate(), and IfxGtm_Tom_Timer_disableUpdate().


iLLD_TC38A: TOM Module Functions

Functions
TOM Module Functions
iLLD » GTM » Standard Driver » Tom Basic Functionality
Collaboration diagram for TOM Module Functions:

Functions

IFX_INLINE void IfxGtm_Tom_setTout (uint32 toutNum, uint32 toutSel)
Configures the tout selection. More...

Detailed Description

Function Documentation

◆ IfxGtm_Tom_setTout()

IFX_INLINE void IfxGtm_Tom_setTout | ( | uint32 | toutNum,
 |  | uint32 | toutSel
 | ) |  |

Configures the tout selection.

Parameters
toutNum | TOUT number
toutSel | TOUTselection
Returns
None

Definition at line 552 of file IfxGtm_Tom.h.


iLLD_TC38A: Atom Interface Drivers

Modules
Atom Interface Drivers
iLLD » GTM
Collaboration diagram for Atom Interface Drivers:

Modules

ATOM DTM Interface Driver
ATOM PWM Interface Driver
ATOM PWM HL Interface Driver
ATOM Timer Interface Driver

Detailed Description


iLLD_TC38A: ATOM DTM Interface Driver

ATOM DTM Interface Driver
iLLD » GTM » Atom Interface Drivers
Collaboration diagram for ATOM DTM Interface Driver:


iLLD_TC38A: ATOM PWM Interface Driver

Modules
ATOM PWM Interface Driver
iLLD » GTM » Atom Interface Drivers
Collaboration diagram for ATOM PWM Interface Driver:

Modules

How to use the GTM ATOM PWM Driver
ATOM PWM DataStructures
Pwm Functions

Detailed Description


iLLD_TC38A: How to use the GTM ATOM PWM Driver

How to use the GTM ATOM PWM Driver
iLLD » GTM » Atom Interface Drivers » ATOM PWM Interface Driver
Collaboration diagram for How to use the GTM ATOM PWM Driver:

This interface allows to generate simple PWM signal on a ATOM out put and can generate interrupts if enabled. this output can also be routed to port pin if required.

Preparation

Include Files

Include following header file into your C code:

#include <Gtm/Atom/Pwm/IfxGtm_Atom_Pwm.h>

Variables

define global variables if necessary

Ifx_GTM *gtm = &MODULE_GTM;
#define ATOM0_CH0_PRIO 20

Interrupts

define Interrupts if needed

IFX_INTERRUPT(ATOM0Ch0_ISR, 0, ATOM0_CH0_PRIO)
{}

Initialization

// install interrupt handlers
IfxCpu_Irq_installInterruptHandler (ATOM0Ch0_ISR, ATOM0_CH0_PRIO);
// enable GTM clock
{
float32 frequency = IfxGtm_Cmu_getModuleFrequency(gtm);
// Enables the GTM
IfxGtm_enable(gtm);
// Set the global clock frequency to the max
IfxGtm_Cmu_setGclkFrequency(gtm, frequency);
// Set the CMU CLK0
IfxGtm_Cmu_setClkFrequency(gtm, IfxGtm_Cmu_Clk_0, frequency);
// FXCLK: used by TOM and CLK0: used by ATOM
IfxGtm_Cmu_enableClocks(gtm, IFXGTM_CMU_CLKEN_FXCLK | IFXGTM_CMU_CLKEN_CLK0);
}
// initialise ATOM
IfxGtm_Atom_Pwm_Config atomConfig; \\configuration structure
IfxGtm_Atom_Pwm_Driver atomHandle; \\ handle
IfxGtm_Atom_Pwm_initConfig(&atomConfig, gtm);
atomConfig.tomChannel = IfxGtm_Tom_Ch_0;
atomConfig.period = 20;
atomConfig.dutyCycle = 10;
atomConfig.interrupt.ccu0Enabled = TRUE;
atomConfig.interrupt.isrPriority = ATOM0_CH0_PRIO;
atomConfig.pin.outputPin = &IfxGtm_ATOM0_0_TOUT0_P02_0_OUT;
IfxGtm_Atom_Pwm_init(&atomHandle, &atomConfig);

ATOM will be now generating a PWM signal on the selected port pin while generating selected interrupt according to above configured period and duty cycle.


iLLD_TC38A: ATOM PWM DataStructures

Data Structures
ATOM PWM DataStructures
iLLD » GTM » Atom Interface Drivers » ATOM PWM Interface Driver
Collaboration diagram for ATOM PWM DataStructures:

Data Structures

struct | IfxGtm_Atom_Pwm_Interrupt
configuration structure for interrupts More...
struct | IfxGtm_Atom_Pwm_pin
configuration structure for output pin More...
struct | IfxGtm_Atom_Pwm_Config
Configuration structure. More...
struct | IfxGtm_Atom_Pwm_Driver
Driver Handle. More...

Detailed Description

Data Structure Documentation

◆ IfxGtm_Atom_Pwm_Interrupt

struct IfxGtm_Atom_Pwm_Interrupt

configuration structure for interrupts

Definition at line 137 of file IfxGtm_Atom_Pwm.h.

Data Fields
boolean | ccu0Enabled | Enable/Disable choice for CCU0 trigger interrupt.
boolean | ccu1Enabled | Enable/Disable choice for CCU1 trigger interrupt.
Ifx_Priority | isrPriority | Priority for Ccu0/1 interrupt.
IfxSrc_Tos | isrProvider | Type of Service for Ccu0/1 interrupt.
IfxGtm_IrqMode | mode | IRQ mode of interrupt.

◆ IfxGtm_Atom_Pwm_pin

struct IfxGtm_Atom_Pwm_pin

configuration structure for output pin

Definition at line 148 of file IfxGtm_Atom_Pwm.h.

Collaboration diagram for IfxGtm_Atom_Pwm_pin:
[legend]
Data Fields
IfxPort_OutputMode | outputMode | Output mode.
IfxGtm_Atom_ToutMap * | outputPin | output pin
IfxPort_PadDriver | padDriver | Pad driver.

◆ IfxGtm_Atom_Pwm_Config

struct IfxGtm_Atom_Pwm_Config

Configuration structure.

Definition at line 161 of file IfxGtm_Atom_Pwm.h.

Collaboration diagram for IfxGtm_Atom_Pwm_Config:
[legend]
Data Fields
IfxGtm_Atom | atom | Index of the ATOM object used.
IfxGtm_Atom_Ch | atomChannel | ATOM channel used for the timer.
IfxGtm_Dtm_ClockSource | dtmClockSource | DTM clock source.
uint32 | dutyCycle | Duty Cycle.
Ifx_GTM * | gtm | Pointer to GTM module.
boolean | immediateStartEnabled | enable immediate start after init
IfxGtm_Atom_Pwm_Interrupt | interrupt | configuration structure for interrupt
IfxGtm_Atom_Mode | mode | Atom mode of operation.
boolean | oneShotModeEnabled | Enable/Disable the one shot mode.
uint32 | period | Period.
IfxGtm_Atom_Pwm_pin | pin | configuration structure for output pin
Ifx_ActiveState | signalLevel | Signal Level.
boolean | synchronousUpdateEnabled | Synchronous or Asynchronous update.

◆ IfxGtm_Atom_Pwm_Driver

struct IfxGtm_Atom_Pwm_Driver

Driver Handle.

Definition at line 180 of file IfxGtm_Atom_Pwm.h.

Data Fields
Ifx_GTM_ATOM_AGC * | agc | Pointer to the AGC object.
Ifx_GTM_ATOM * | atom | Pointer to the ATOM object.
IfxGtm_Atom_Ch | atomChannel | ATOM channel used for the timer.
IfxGtm_Atom | atomIndex | Index of the ATOM object used.
Ifx_GTM * | gtm | Pointer to GTM module.
IfxGtm_Atom_Mode | mode | Atom mode of operation.


iLLD_TC38A: Pwm Functions

Functions
Pwm Functions
iLLD » GTM » Atom Interface Drivers » ATOM PWM Interface Driver
Collaboration diagram for Pwm Functions:

Functions

IFX_EXTERN boolean | IfxGtm_Atom_Pwm_init (IfxGtm_Atom_Pwm_Driver *driver, const IfxGtm_Atom_Pwm_Config *config)
Initialises the Timer object. More...
IFX_EXTERN void | IfxGtm_Atom_Pwm_initConfig (IfxGtm_Atom_Pwm_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default. More...
IFX_EXTERN void | IfxGtm_Atom_Pwm_start (IfxGtm_Atom_Pwm_Driver *driver, boolean immediate)
Starts the PWM generation from the configured channel. More...
IFX_EXTERN void | IfxGtm_Atom_Pwm_stop (IfxGtm_Atom_Pwm_Driver *driver, boolean immediate)
Stops the PWM generation from the configured channel. More...

Detailed Description

Function Documentation

◆ IfxGtm_Atom_Pwm_init()

IFX_EXTERN boolean IfxGtm_Atom_Pwm_init | ( | IfxGtm_Atom_Pwm_Driver * | driver,
 |  | const IfxGtm_Atom_Pwm_Config * | config
 | ) |  |

Initialises the Timer object.

Parameters
driver | ATOM Handle
config | Configuration structure for ATOM
Returns
TRUE on success else FALSE

Definition at line 52 of file IfxGtm_Atom_Pwm.c.

◆ IfxGtm_Atom_Pwm_initConfig()

IFX_EXTERN void IfxGtm_Atom_Pwm_initConfig | ( | IfxGtm_Atom_Pwm_Config * | config,
 |  | Ifx_GTM * | gtm
 | ) |  |

Initializes the configuration structure to default.

Parameters
config | This parameter is Initialised by the function
gtm | Pointer to GTM module
Returns
None

Definition at line 147 of file IfxGtm_Atom_Pwm.c.

◆ IfxGtm_Atom_Pwm_start()

IFX_EXTERN void IfxGtm_Atom_Pwm_start | ( | IfxGtm_Atom_Pwm_Driver * | driver,
 |  | boolean | immediate
 | ) |  |

Starts the PWM generation from the configured channel.

Parameters
driver | handle for the PWM device.
immediate | immediate start or not.
Returns
None

Definition at line 174 of file IfxGtm_Atom_Pwm.c.

◆ IfxGtm_Atom_Pwm_stop()

IFX_EXTERN void IfxGtm_Atom_Pwm_stop | ( | IfxGtm_Atom_Pwm_Driver * | driver,
 |  | boolean | immediate
 | ) |  |

Stops the PWM generation from the configured channel.

Parameters
driver | handle for the PWM device
immediate | immediate start or not.
Returns
None

Definition at line 185 of file IfxGtm_Atom_Pwm.c.


iLLD_TC38A: ATOM PWM HL Interface Driver

Modules
ATOM PWM HL Interface Driver
iLLD » GTM » Atom Interface Drivers
Collaboration diagram for ATOM PWM HL Interface Driver:

Modules

How to use the GTM ATOM PWM Driver
Data Structures
PwmHl Functions
PwmHl StdIf Functions

Detailed Description


iLLD_TC38A: How to use the GTM ATOM PWM Driver

How to use the GTM ATOM PWM Driver
iLLD » GTM » Atom Interface Drivers » ATOM PWM HL Interface Driver
Collaboration diagram for How to use the GTM ATOM PWM Driver:

This driver implements the PWM functionalities as defined by Standard interface: Multi-channels, dual-complementary PWM interface. The user is free to use either the driver specific APIs below or to used the standard interface APIs.

Specific implementation

Implementation is similar to TOM PWM HL Interface Driver

For a detailed configuration of the microcontroller, see IfxGtm_AtomDtm_PwmHl_init().

Usage example

Initialisation is done by, e.g:

IfxGtm_AtomDtm_PwmHl_Config driverConfig;
IfxGtm_AtomDtm_PwmHl driverData;
IfxStdIf_PwmHl pwmhl;
IfxGtm_AtomDtm_PwmHl_initConfig(&driverConfig, &MODULE_GTM);
IfxGtm_AtomDtm_PwmHl_init(&driverData, &driverConfig);
IfxGtm_AtomDtm_PwmHl_stdIfPwmHlInit(pwmhl, &driverData);

During run-time, the interface functions shall be used, e.g.:

IfxStdIf_Timer* timer = IfxStdIf_PwmHl_getTimer(pwmhl);
Ifx_TimerValue onTime[3]; // assume configured for three HL channels
onTime[0] = 10;
onTime[1] = 20;
onTime[2] = 30;
IfxStdIf_Timer_disableUpdate(timer);
IfxStdIf_Timer_setPeriod(timer, period);
IfxStdIf_PwmHl_setOnTime(pwmhl, onTime);
IfxStdIf_Timer_applyUpdate(timer);

This driver implements the PWM functionalities as defined by Standard interface: Multi-channels, dual-complementary PWM interface. The user is free to use either the driver specific APIs below or to used the standard interface APIs.

Specific implementation

Implementation is similar to TOM PWM HL Interface Driver

For a detailed configuration of the microcontroller, see IfxGtm_Atom_PwmHl_init().

Usage example

Initialisation is done by, e.g:

IfxGtm_Atom_PwmHl_Config driverConfig;
IfxGtm_Atom_PwmHl driverData;
IfxStdIf_PwmHl pwmhl;
IfxGtm_Atom_PwmHl_initConfig(&driverConfig, &MODULE_GTM);
IfxGtm_Atom_PwmHl_init(&driverData, &driverConfig);
IfxGtm_Atom_PwmHl_stdIfPwmHlInit(pwmhl, &driverData);

During run-time, the interface functions shall be used, e.g.:

IfxStdIf_Timer* timer = IfxStdIf_PwmHl_getTimer(pwmhl);
Ifx_TimerValue onTime[3]; // assume configured for three HL channels
onTime[0] = 10;
onTime[1] = 20;
onTime[2] = 30;
IfxStdIf_Timer_disableUpdate(timer);
IfxStdIf_Timer_setPeriod(timer, period);
IfxStdIf_PwmHl_setOnTime(pwmhl, onTime);
IfxStdIf_Timer_applyUpdate(timer);


iLLD_TC38A: Data Structures

Data Structures
Data Structures
iLLD » GTM » Atom Interface Drivers » ATOM PWM HL Interface Driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxGtm_Atom_PwmHl_Base
Multi-channels PWM object definition (channels only) More...
struct | IfxGtm_Atom_PwmHl_Config
GTM ATOM: PWM HL configuration. More...
struct | IfxGtm_Atom_PwmHl_Mode
Structure for PWM configuration. More...
struct | IfxGtm_Atom_PwmHl_s
GTM ATOM PWM driver. More...

Detailed Description

Data Structure Documentation

◆ IfxGtm_Atom_PwmHl_Base

struct IfxGtm_Atom_PwmHl_Base

Multi-channels PWM object definition (channels only)

Definition at line 128 of file IfxGtm_Atom_PwmHl.h.

Data Fields
Ifx_ActiveState | ccxActiveState | Top PWM active state.
uint8 | channelCount | Number of PWM channels, one channel is made of a top and bottom channel.
Ifx_ActiveState | coutxActiveState | Bottom PWM active state.
Ifx_TimerValue | deadtime | Dead time between the top and bottom channel in ticks.
boolean | inverted | Flag indicating the center aligned inverted mode (TRUE)
Ifx_TimerValue | maxPulse | internal parameter
Ifx_TimerValue | minPulse | minimum pulse that is output, shorter pulse time will be output as 0% duty cycle
Ifx_Pwm_Mode | mode | actual PWM mode
sint8 | setMode | A non zero flag indicates that the PWM mode is being modified.

◆ IfxGtm_Atom_PwmHl_Config

struct IfxGtm_Atom_PwmHl_Config

GTM ATOM: PWM HL configuration.

Definition at line 147 of file IfxGtm_Atom_PwmHl.h.

Collaboration diagram for IfxGtm_Atom_PwmHl_Config:
[legend]
Data Fields
IfxGtm_Atom | atom | ATOM unit used.
IfxStdIf_PwmHl_Config | base | PWM HL standard interface configuration.
IFX_CONST IfxGtm_Atom_ToutMapP * | ccx | Pointer to an array of size pwmHl.channels.channelCount containing the channels used. Channels must be adjacent channels.
IFX_CONST IfxGtm_Atom_ToutMapP * | coutx | Pointer to an array of size pwmHl.channels.channelCount containing the channels used. Channels must be adjacent channels.
boolean | initPins | TRUE: Initialize pins in driver FALSE: Don't initialize pins in driver. User handles separately.
IfxGtm_Atom_Timer * | timer | Pointer to the linked timer object.

◆ IfxGtm_Atom_PwmHl_Mode

struct IfxGtm_Atom_PwmHl_Mode

Structure for PWM configuration.

Definition at line 160 of file IfxGtm_Atom_PwmHl.h.

Collaboration diagram for IfxGtm_Atom_PwmHl_Mode:
[legend]
Data Fields
boolean | inverted | Inverted configuration for the selected mode.
Ifx_Pwm_Mode | mode | Pwm Mode.
IfxGtm_Atom_PwmHl_Update | update | update call back function for the selected mode
IfxGtm_Atom_PwmHl_UpdateShift | updateAndShift | update shift call back function for the selected mode
IfxGtm_Atom_PwmHl_UpdatePulse | updatePulse | update pulse call back function for the selected mode

◆ IfxGtm_Atom_PwmHl_s

struct IfxGtm_Atom_PwmHl_s

GTM ATOM PWM driver.

Definition at line 171 of file IfxGtm_Atom_PwmHl.h.

Collaboration diagram for IfxGtm_Atom_PwmHl_s:
[legend]
Data Fields
Ifx_GTM_ATOM_AGC * | agc | AGC unit used.
Ifx_GTM_ATOM * | atom | ATOM unit used.
IfxGtm_Atom_PwmHl_Base | base | Multi-channels PWM object definition (channels only)
IfxGtm_Atom_Ch | ccx[IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS] | ATOM channels used for the CCCX outputs.
IfxGtm_Atom_Ch * | ccxTemp | cached value
IfxGtm_Atom_Ch | coutx[IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS] | ATOM channels used for the OUTX outputs.
IfxGtm_Atom_Ch * | coutxTemp | cached value
IfxGtm_Atom_Timer * | timer | Pointer to the linked timer object.
IfxGtm_Atom_PwmHl_Update | update | Update function for actual selected mode.
IfxGtm_Atom_PwmHl_UpdateShift | updateAndShift | Update shift function for actual selected mode.
IfxGtm_Atom_PwmHl_UpdatePulse | updatePulse | Update pulse function for actual selected mode.


iLLD_TC38A: PwmHl Functions

Functions
PwmHl Functions
iLLD » GTM » Atom Interface Drivers » ATOM PWM HL Interface Driver
Collaboration diagram for PwmHl Functions:

Functions

IFX_EXTERN boolean | IfxGtm_Atom_PwmHl_init (IfxGtm_Atom_PwmHl *driver, const IfxGtm_Atom_PwmHl_Config *config)
Initializes the timer object note To ensure that the channels counter are reset by the timer and do not overflow, leading to random signal on the output, the timer must be started before the call to this function. More...
IFX_EXTERN void | IfxGtm_Atom_PwmHl_initConfig (IfxGtm_Atom_PwmHl_Config *config)
Initialize the configuration structure to default. More...

Detailed Description

Function Documentation

◆ IfxGtm_Atom_PwmHl_init()

IFX_EXTERN boolean IfxGtm_Atom_PwmHl_init | ( | IfxGtm_Atom_PwmHl * | driver,
 |  | const IfxGtm_Atom_PwmHl_Config * | config
 | ) |  |

Initializes the timer object note To ensure that the channels counter are reset by the timer and do not overflow, leading to random signal on the output, the timer must be started before the call to this function.

Parameters
driver | GTM ATOM PWM driver
config | GTM ATOM: PWM HL configuration
Returns
TRUE on success else FALSE

Definition at line 166 of file IfxGtm_Atom_PwmHl.c.

◆ IfxGtm_Atom_PwmHl_initConfig()

IFX_EXTERN void IfxGtm_Atom_PwmHl_initConfig ( IfxGtm_Atom_PwmHl_Config * config )

Initialize the configuration structure to default.

Parameters
config Channel configuration. This parameter is Initialised by the function
Returns
None

Definition at line 262 of file IfxGtm_Atom_PwmHl.c.


iLLD_TC38A: PwmHl StdIf Functions

Functions
PwmHl StdIf Functions
iLLD » GTM » Atom Interface Drivers » ATOM PWM HL Interface Driver
Collaboration diagram for PwmHl StdIf Functions:

Functions

IFX_INLINE Ifx_ActiveState | IfxGtm_Atom_PwmHl_invertActiveState (Ifx_ActiveState activeState)
Inverts the active state. More...
IFX_STATIC void | IfxGtm_Atom_PwmHl_updateAndShiftOff (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets switched to OFF. More...
IFX_STATIC void | IfxGtm_Atom_PwmHl_updateCenterAligned (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in center aligned and center aligned inverted modes. More...
IFX_STATIC void | IfxGtm_Atom_PwmHl_updateEdgeAligned (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in edge aligned modes (left and right aligned) More...
IFX_STATIC void | IfxGtm_Atom_PwmHl_updateOff (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Set the outputs to inactive. More...
IFX_STATIC void | IfxGtm_Atom_PwmHl_updatePulse (IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
Update Pulse. More...
IFX_STATIC void | IfxGtm_Atom_PwmHl_updatePulseOff (IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
Set Pulse to OFF. More...
IFX_STATIC void | IfxGtm_Atom_PwmHl_updateShiftCenterAligned (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Update Shift Center Aligned. More...
IFX_EXTERN float32 | IfxGtm_Atom_PwmHl_getDeadtime (IfxGtm_Atom_PwmHl *driver)
Returns the dead time. More...
IFX_EXTERN float32 | IfxGtm_Atom_PwmHl_getMinPulse (IfxGtm_Atom_PwmHl *driver)
Returns the minimum pulse. More...
IFX_EXTERN Ifx_Pwm_Mode | IfxGtm_Atom_PwmHl_getMode (IfxGtm_Atom_PwmHl *driver)
Returns Pwm mode. More...
IFX_EXTERN boolean | IfxGtm_Atom_PwmHl_setDeadtime (IfxGtm_Atom_PwmHl *driver, float32 deadtime)
Sets the dead time. More...
IFX_EXTERN boolean | IfxGtm_Atom_PwmHl_setMinPulse (IfxGtm_Atom_PwmHl *driver, float32 minPulse)
Sets the minimum pulse. More...
IFX_EXTERN boolean | IfxGtm_Atom_PwmHl_setMode (IfxGtm_Atom_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate() More...
IFX_EXTERN void | IfxGtm_Atom_PwmHl_setOnTime (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Sets the ON time. More...
IFX_EXTERN void | IfxGtm_Atom_PwmHl_setOnTimeAndShift (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets the ON time and Shift. More...
IFX_EXTERN void | IfxGtm_Atom_PwmHl_setPulse (IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
Sets the ON time and offset, all switched are independent. More...
IFX_EXTERN void | IfxGtm_Atom_PwmHl_setupChannels (IfxGtm_Atom_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set up channels. More...
IFX_EXTERN boolean | IfxGtm_Atom_PwmHl_stdIfPwmHlInit (IfxStdIf_PwmHl *stdif, IfxGtm_Atom_PwmHl *driver)
Initialises the statndard interface Pwm. More...

Detailed Description

Function Documentation

◆ IfxGtm_Atom_PwmHl_getDeadtime()

IFX_EXTERN float32 IfxGtm_Atom_PwmHl_getDeadtime ( IfxGtm_Atom_PwmHl * driver )

Returns the dead time.

See also
IfxStdIf_PwmHl_GetDeadtime
Parameters
driver GTM ATOM PWM driver
Returns
Dead Time

Definition at line 148 of file IfxGtm_Atom_PwmHl.c.

Referenced by IfxGtm_Atom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_PwmHl_getMinPulse()

IFX_EXTERN float32 IfxGtm_Atom_PwmHl_getMinPulse ( IfxGtm_Atom_PwmHl * driver )

Returns the minimum pulse.

See also
IfxStdIf_PwmHl_GetMinPulse
Parameters
driver GTM ATOM PWM driver
Returns
Min Pulse

Definition at line 154 of file IfxGtm_Atom_PwmHl.c.

Referenced by IfxGtm_Atom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_PwmHl_getMode()

IFX_EXTERN Ifx_Pwm_Mode IfxGtm_Atom_PwmHl_getMode ( IfxGtm_Atom_PwmHl * driver )

Returns Pwm mode.

See also
IfxStdIf_PwmHl_GetMode
Parameters
driver GTM ATOM PWM driver
Returns
Pwm mode

Definition at line 160 of file IfxGtm_Atom_PwmHl.c.

Referenced by IfxGtm_Atom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_PwmHl_invertActiveState()

IFX_INLINE Ifx_ActiveState IfxGtm_Atom_PwmHl_invertActiveState ( Ifx_ActiveState activeState )

Inverts the active state.

Parameters
activeState Active state
Returns
State

Definition at line 138 of file IfxGtm_Atom_PwmHl.c.

Referenced by IfxGtm_Atom_PwmHl_init(), and IfxGtm_Atom_PwmHl_setMode().

◆ IfxGtm_Atom_PwmHl_setDeadtime()

IFX_EXTERN boolean IfxGtm_Atom_PwmHl_setDeadtime | ( | IfxGtm_Atom_PwmHl * | driver,
 |  | float32 | deadtime
 | ) |  |

Sets the dead time.

See also
IfxStdIf_PwmHl_SetDeadtime
Parameters
driver | GTM ATOM PWM driver
deadtime | Dead time value
Returns
TRUE on success else FALSE

Definition at line 273 of file IfxGtm_Atom_PwmHl.c.

Referenced by IfxGtm_Atom_PwmHl_init(), and IfxGtm_Atom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_PwmHl_setMinPulse()

IFX_EXTERN boolean IfxGtm_Atom_PwmHl_setMinPulse | ( | IfxGtm_Atom_PwmHl * | driver,
 |  | float32 | minPulse
 | ) |  |

Sets the minimum pulse.

See also
IfxStdIf_PwmHl_SetMinPulse
Parameters
driver | GTM ATOM PWM driver
minPulse | Minimum pulse
Returns
TRUE on success else FALSE

Definition at line 282 of file IfxGtm_Atom_PwmHl.c.

Referenced by IfxGtm_Atom_PwmHl_init(), and IfxGtm_Atom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_PwmHl_setMode()

IFX_EXTERN boolean IfxGtm_Atom_PwmHl_setMode | ( | IfxGtm_Atom_PwmHl * | driver,
 |  | Ifx_Pwm_Mode | mode
 | ) |  |

Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate()

See also
IfxStdIf_PwmHl_SetMode
Parameters
driver | GTM ATOM PWM driver
mode | Pwm mode
Returns
TRUE on success else FALSE
Note
Changing signal level may produce short circuit at the power stage, in which case the inverter must be disable during this action.

Definition at line 293 of file IfxGtm_Atom_PwmHl.c.

Referenced by IfxGtm_Atom_PwmHl_init(), and IfxGtm_Atom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_PwmHl_setOnTime()

IFX_EXTERN void IfxGtm_Atom_PwmHl_setOnTime | ( | IfxGtm_Atom_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn
 | ) |  |

Sets the ON time.

See also
IfxStdIf_PwmHl_SetOnTime
Parameters
driver | GTM ATOM PWM driver
tOn | ON time
Returns
None

Definition at line 362 of file IfxGtm_Atom_PwmHl.c.

Referenced by IfxGtm_Atom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_PwmHl_setOnTimeAndShift()

IFX_EXTERN void IfxGtm_Atom_PwmHl_setOnTimeAndShift | ( | IfxGtm_Atom_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn,
 |  | Ifx_TimerValue * | shift
 | ) |  |

Sets the ON time and Shift.

Parameters
driver | GTM ATOM PWM driver
tOn | ON time
shift | Shift value in ticks
Returns
None

Definition at line 368 of file IfxGtm_Atom_PwmHl.c.

Referenced by IfxGtm_Atom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_PwmHl_setPulse()

IFX_EXTERN void IfxGtm_Atom_PwmHl_setPulse | ( | IfxGtm_Atom_PwmHl * | driver,
 |  | float32 * | tOn,
 |  | float32 * | offset
 | ) |  |

Sets the ON time and offset, all switched are independent.

Parameters
driver | GTM ATOM PWM driver
tOn | ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
offset | Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
Returns
None

Definition at line 374 of file IfxGtm_Atom_PwmHl.c.

Referenced by IfxGtm_Atom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_PwmHl_setupChannels()

IFX_EXTERN void IfxGtm_Atom_PwmHl_setupChannels | ( | IfxGtm_Atom_PwmHl * | driver,
 |  | boolean * | activeCh,
 |  | boolean * | stuckSt
 | ) |  |

Set up channels.

See also
IfxStdIf_PwmHl_SetupChannels
Parameters
driver | GTM ATOM PWM driver
activeCh | Active channel
stuckSt | Stuck state
Returns
None

Definition at line 380 of file IfxGtm_Atom_PwmHl.c.

Referenced by IfxGtm_Atom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_PwmHl_stdIfPwmHlInit()

IFX_EXTERN boolean IfxGtm_Atom_PwmHl_stdIfPwmHlInit | ( | IfxStdIf_PwmHl * | stdif,
 |  | IfxGtm_Atom_PwmHl * | driver
 | ) |  |

Initialises the statndard interface Pwm.

Parameters
stdif | Standard interface object, will be initialized by the function
driver | Interface driver to be used by the standard interface. must be initialised separately
Returns
TRUE on success else FALSE

Definition at line 389 of file IfxGtm_Atom_PwmHl.c.

◆ IfxGtm_Atom_PwmHl_updateAndShiftOff()

IFX_STATIC void IfxGtm_Atom_PwmHl_updateAndShiftOff | ( | IfxGtm_Atom_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn,
 |  | Ifx_TimerValue * | shift
 | ) |  |

Sets switched to OFF.

Parameters
driver | GTM ATOM PWM driver
tOn | ON time
shift | Shift value in ticks
Returns
None

Definition at line 414 of file IfxGtm_Atom_PwmHl.c.

◆ IfxGtm_Atom_PwmHl_updateCenterAligned()

IFX_STATIC void IfxGtm_Atom_PwmHl_updateCenterAligned | ( | IfxGtm_Atom_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn
 | ) |  |

Updates the x output duty cycle in center aligned and center aligned inverted modes.

Parameters
driver | GTM ATOM PWM driver
tOn | T on
Returns
None

Definition at line 422 of file IfxGtm_Atom_PwmHl.c.

◆ IfxGtm_Atom_PwmHl_updateEdgeAligned()

IFX_STATIC void IfxGtm_Atom_PwmHl_updateEdgeAligned | ( | IfxGtm_Atom_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn
 | ) |  |

Updates the x output duty cycle in edge aligned modes (left and right aligned)

Parameters
driver | GTM ATOM PWM driver
tOn | T on
Returns
None

Definition at line 482 of file IfxGtm_Atom_PwmHl.c.

◆ IfxGtm_Atom_PwmHl_updateOff()

IFX_STATIC void IfxGtm_Atom_PwmHl_updateOff | ( | IfxGtm_Atom_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn
 | ) |  |

Set the outputs to inactive.

Parameters
driver | GTM ATOM PWM driver
tOn | T on
Returns
None

Definition at line 542 of file IfxGtm_Atom_PwmHl.c.

Referenced by IfxGtm_Atom_PwmHl_init(), IfxGtm_Atom_PwmHl_updateAndShiftOff(), and IfxGtm_Atom_PwmHl_updatePulseOff().

◆ IfxGtm_Atom_PwmHl_updatePulse()

IFX_STATIC void IfxGtm_Atom_PwmHl_updatePulse | ( | IfxGtm_Atom_PwmHl * | driver,
 |  | float32 * | tOn,
 |  | float32 * | offset
 | ) |  |

Update Pulse.

Parameters
driver | GTM ATOM PWM driver
tOn | ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
offset | Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
Returns
None

Definition at line 558 of file IfxGtm_Atom_PwmHl.c.

◆ IfxGtm_Atom_PwmHl_updatePulseOff()

IFX_STATIC void IfxGtm_Atom_PwmHl_updatePulseOff | ( | IfxGtm_Atom_PwmHl * | driver,
 |  | float32 * | tOn,
 |  | float32 * | offset
 | ) |  |

Set Pulse to OFF.

Parameters
driver | GTM ATOM PWM driver
tOn | ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
offset | Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
Returns
None

Definition at line 665 of file IfxGtm_Atom_PwmHl.c.

◆ IfxGtm_Atom_PwmHl_updateShiftCenterAligned()

IFX_STATIC void IfxGtm_Atom_PwmHl_updateShiftCenterAligned | ( | IfxGtm_Atom_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn,
 |  | Ifx_TimerValue * | shift
 | ) |  |

Update Shift Center Aligned.

Parameters
driver | GTM ATOM PWM driver
tOn | ON time
shift | Shift value in ticks
Returns
None

Definition at line 674 of file IfxGtm_Atom_PwmHl.c.


iLLD_TC38A: ATOM Timer Interface Driver

Modules
ATOM Timer Interface Driver
iLLD » GTM » Atom Interface Drivers
Collaboration diagram for ATOM Timer Interface Driver:

Modules

How to use the GTM ATOM Timer Driver
Timer StdIf Functions
Timer Functions
Data Structures

Detailed Description


iLLD_TC38A: How to use the GTM ATOM Timer Driver

How to use the GTM ATOM Timer Driver
iLLD » GTM » Atom Interface Drivers » ATOM Timer Interface Driver
Collaboration diagram for How to use the GTM ATOM Timer Driver:

This driver implements the timer functionalities as defined by Standard interface: Timer. The user is free to use either the driver specific APIs below or to used the standard interface APIs.

Specific implementation

Implementation is similar to TOM Timer Interface Driver.

For a detailed configuration of the microcontroller, see IfxGtm_Atom_Timer_init().

Usage example

Initialisation:

IfxGtm_Atom_Timer_Config driverConfig;
IfxGtm_Atom_Timer driverData;
IfxStdIf_Timer timer;
IfxGtm_Atom_Timer_initConfig(&driverConfig, &MODULE_GTM);
IfxGtm_Atom_Timer_init (&driverData, &driverConfig);
boolean IfxGtm_Atom_Timer_stdIfTimerInit(&timer, &driverData);

During run-time, the interface functions should be used:

IfxStdIf_Timer_run(timer);
IfxStdIf_Timer_disableUpdate(timer);
IfxStdIf_Timer_setPeriod(timer, period);
IfxStdIf_Timer_applyUpdate(timer);


iLLD_TC38A: Timer StdIf Functions

Functions
Timer StdIf Functions
iLLD » GTM » Atom Interface Drivers » ATOM Timer Interface Driver
Collaboration diagram for Timer StdIf Functions:

Functions

IFX_EXTERN boolean | IfxGtm_Atom_Timer_acknowledgeTimerIrq (IfxGtm_Atom_Timer *driver)
Returns the timer event. More...
IFX_EXTERN boolean | IfxGtm_Atom_Timer_acknowledgeTriggerIrq (IfxGtm_Atom_Timer *driver)
Returns the trigger event. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_addToChannelMask (IfxGtm_Atom_Timer *driver, IfxGtm_Atom_Ch channel)
Add a channel to the channel mask Channels present in the mask are started, stopped, updated at the same time as the timer: IfxGtm_Atom_Timer_applyUpdate, IfxGtm_Atom_Timer_disableUpdate, IfxGtm_Atom_Timer_stop, IfxGtm_Atom_Timer_run. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_applyUpdate (IfxGtm_Atom_Timer *driver)
Enables the transfer of the shadow registers. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_disableUpdate (IfxGtm_Atom_Timer *driver)
Disables the upadte. More...
IFX_EXTERN float32 | IfxGtm_Atom_Timer_getFrequency (IfxGtm_Atom_Timer *driver)
Returns the frequency. More...
IFX_EXTERN float32 | IfxGtm_Atom_Timer_getInputFrequency (IfxGtm_Atom_Timer *driver)
Returns the Input frequncy. More...
IFX_EXTERN Ifx_TimerValue | IfxGtm_Atom_Timer_getPeriod (IfxGtm_Atom_Timer *driver)
Returns the period of the timer. More...
IFX_EXTERN float32 | IfxGtm_Atom_Timer_getResolution (IfxGtm_Atom_Timer *driver)
Returns the resolution. More...
IFX_EXTERN Ifx_TimerValue | IfxGtm_Atom_Timer_getTrigger (IfxGtm_Atom_Timer *driver)
Returns the trigger point. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_run (IfxGtm_Atom_Timer *driver)
Runs the timer. More...
IFX_EXTERN boolean | IfxGtm_Atom_Timer_setFrequency (IfxGtm_Atom_Timer *driver, float32 frequency)
Sets the frequency. More...
IFX_EXTERN boolean | IfxGtm_Atom_Timer_setPeriod (IfxGtm_Atom_Timer *driver, Ifx_TimerValue period)
Sets the period for the timer. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_setSingleMode (IfxGtm_Atom_Timer *driver, boolean enabled)
Sets the single shot mode of the timer. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_setTrigger (IfxGtm_Atom_Timer *driver, Ifx_TimerValue triggerPoint)
Sets the trigger. More...
IFX_EXTERN boolean | IfxGtm_Atom_Timer_stdIfTimerInit (IfxStdIf_Timer *stdif, IfxGtm_Atom_Timer *driver)
Initializes the standard interface timer. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_stop (IfxGtm_Atom_Timer *driver)
Stops the timer. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_updateInputFrequency (IfxGtm_Atom_Timer *driver)
Updates the input frequency. More...

Detailed Description

Function Documentation

◆ IfxGtm_Atom_Timer_acknowledgeTimerIrq()

IFX_EXTERN boolean IfxGtm_Atom_Timer_acknowledgeTimerIrq ( IfxGtm_Atom_Timer * driver )

Returns the timer event.

See also
IfxStdIf_Timer_AckTimerIrq
Parameters
driver ATOM Timer interface Handle
Returns
Timer event

Definition at line 56 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_Timer_stdIfTimerInit().

◆ IfxGtm_Atom_Timer_acknowledgeTriggerIrq()

IFX_EXTERN boolean IfxGtm_Atom_Timer_acknowledgeTriggerIrq ( IfxGtm_Atom_Timer * driver )

Returns the trigger event.

See also
IfxStdIf_Timer_AckTriggerIrq
Parameters
driver ATOM Timer interface Handle
Returns
Trigger event

Definition at line 72 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_Timer_stdIfTimerInit().

◆ IfxGtm_Atom_Timer_addToChannelMask()

IFX_EXTERN void IfxGtm_Atom_Timer_addToChannelMask | ( | IfxGtm_Atom_Timer * | driver,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Add a channel to the channel mask Channels present in the mask are started, stopped, updated at the same time as the timer: IfxGtm_Atom_Timer_applyUpdate, IfxGtm_Atom_Timer_disableUpdate, IfxGtm_Atom_Timer_stop, IfxGtm_Atom_Timer_run.

Parameters
driver | ATOM Timer interface Handle
channel | Channel to ba added to the mask
Returns
None

Definition at line 88 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_Dtm_PwmHl_init(), IfxGtm_Atom_PwmHl_init(), and IfxGtm_Atom_Timer_init().

◆ IfxGtm_Atom_Timer_applyUpdate()

IFX_EXTERN void IfxGtm_Atom_Timer_applyUpdate ( IfxGtm_Atom_Timer * driver )

Enables the transfer of the shadow registers.

See also
IfxStdIf_Timer_ApplyUpdate
Parameters
driver ATOM Timer interface Handle
Returns
None

Definition at line 96 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_Timer_stdIfTimerInit().

◆ IfxGtm_Atom_Timer_disableUpdate()

IFX_EXTERN void IfxGtm_Atom_Timer_disableUpdate ( IfxGtm_Atom_Timer * driver )

Disables the upadte.

See also
IfxStdIf_Timer_DisableUpdate
Parameters
driver ATOM Timer interface Handle
Returns
None

Definition at line 102 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_Timer_stdIfTimerInit().

◆ IfxGtm_Atom_Timer_getFrequency()

IFX_EXTERN float32 IfxGtm_Atom_Timer_getFrequency ( IfxGtm_Atom_Timer * driver )

Returns the frequency.

See also
IfxStdIf_Timer_GetFrequency
Parameters
driver ATOM Timer interface Handle
Returns
Frequency

Definition at line 108 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_Timer_stdIfTimerInit().

◆ IfxGtm_Atom_Timer_getInputFrequency()

IFX_EXTERN float32 IfxGtm_Atom_Timer_getInputFrequency ( IfxGtm_Atom_Timer * driver )

Returns the Input frequncy.

See also
IfxStdIf_Timer_GetInputFrequency
Parameters
driver ATOM Timer interface Handle
Returns
Frequency

Definition at line 114 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_Timer_stdIfTimerInit().

◆ IfxGtm_Atom_Timer_getPeriod()

IFX_EXTERN Ifx_TimerValue IfxGtm_Atom_Timer_getPeriod ( IfxGtm_Atom_Timer * driver )

Returns the period of the timer.

See also
IfxStdIf_Timer_GetPeriod
Parameters
driver ATOM Timer interface Handle
Returns
Period

Definition at line 126 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_Timer_stdIfTimerInit().

◆ IfxGtm_Atom_Timer_getResolution()

IFX_EXTERN float32 IfxGtm_Atom_Timer_getResolution ( IfxGtm_Atom_Timer * driver )

Returns the resolution.

See also
IfxStdIf_Timer_GetResolution
Parameters
driver ATOM Timer interface Handle
Returns
Resolution

Definition at line 138 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_Timer_stdIfTimerInit().

◆ IfxGtm_Atom_Timer_getTrigger()

IFX_EXTERN Ifx_TimerValue IfxGtm_Atom_Timer_getTrigger ( IfxGtm_Atom_Timer * driver )

Returns the trigger point.

Parameters
driver ATOM Timer interface Handle
Returns
Trigger point

Definition at line 144 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_Timer_stdIfTimerInit().

◆ IfxGtm_Atom_Timer_run()

IFX_EXTERN void IfxGtm_Atom_Timer_run ( IfxGtm_Atom_Timer * driver )

Runs the timer.

See also
IfxStdIf_Timer_Run
Parameters
driver ATOM Timer interface Handle
Returns
None

Definition at line 341 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_Timer_stdIfTimerInit().

◆ IfxGtm_Atom_Timer_setFrequency()

IFX_EXTERN boolean IfxGtm_Atom_Timer_setFrequency | ( | IfxGtm_Atom_Timer * | driver,
 |  | float32 | frequency
 | ) |  |

Sets the frequency.

See also
IfxStdIf_Timer_SetFrequency
Parameters
driver | ATOM Timer interface Handle
frequency | Frequency
Returns
TRUE on success else FALSE

Definition at line 347 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_Timer_init(), and IfxGtm_Atom_Timer_stdIfTimerInit().

◆ IfxGtm_Atom_Timer_setPeriod()

IFX_EXTERN boolean IfxGtm_Atom_Timer_setPeriod | ( | IfxGtm_Atom_Timer * | driver,
 |  | Ifx_TimerValue | period
 | ) |  |

Sets the period for the timer.

See also
IfxStdIf_Timer_SetPeriod
Parameters
driver | ATOM Timer interface Handle
period | Period value
Returns
TRUE on success else FALSE

Definition at line 355 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_Timer_setFrequency(), and IfxGtm_Atom_Timer_stdIfTimerInit().

◆ IfxGtm_Atom_Timer_setSingleMode()

IFX_EXTERN void IfxGtm_Atom_Timer_setSingleMode | ( | IfxGtm_Atom_Timer * | driver,
 |  | boolean | enabled
 | ) |  |

Sets the single shot mode of the timer.

See also
IfxStdIf_Timer_SetSingleMode
Parameters
driver | ATOM Timer interface Handle
enabled | If TRUE, sets the single shot mode
Returns
None

Definition at line 369 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_Timer_stdIfTimerInit().

◆ IfxGtm_Atom_Timer_setTrigger()

IFX_EXTERN void IfxGtm_Atom_Timer_setTrigger | ( | IfxGtm_Atom_Timer * | driver,
 |  | Ifx_TimerValue | triggerPoint
 | ) |  |

Sets the trigger.

See also
IfxStdIf_Timer_SetTrigger
Parameters
driver | ATOM Timer interface Handle
triggerPoint | Trigger point value
Returns
None

Definition at line 375 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_Timer_init(), and IfxGtm_Atom_Timer_stdIfTimerInit().

◆ IfxGtm_Atom_Timer_stdIfTimerInit()

IFX_EXTERN boolean IfxGtm_Atom_Timer_stdIfTimerInit | ( | IfxStdIf_Timer * | stdif,
 |  | IfxGtm_Atom_Timer * | driver
 | ) |  |

Initializes the standard interface timer.

Parameters
stdif | Standard interface object, will be initialized by the function
driver | Interface driver to be used by the standard interface. must be initialised separately
Returns
TRUE on success else FALSE

Definition at line 381 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_Dtm_PwmHl_stdIfPwmHlInit(), and IfxGtm_Atom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_Timer_stop()

IFX_EXTERN void IfxGtm_Atom_Timer_stop ( IfxGtm_Atom_Timer * driver )

Stops the timer.

See also
IfxStdIf_Timer_Stop
Parameters
driver ATOM Timer interface Handle
Returns
None

Definition at line 411 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_Timer_stdIfTimerInit().

◆ IfxGtm_Atom_Timer_updateInputFrequency()

IFX_EXTERN void IfxGtm_Atom_Timer_updateInputFrequency ( IfxGtm_Atom_Timer * driver )

Updates the input frequency.

See also
IfxStdIf_Timer_UpdateInputFrequency
Parameters
driver ATOM Timer interface Handle
Returns
None

Definition at line 417 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_Timer_init(), and IfxGtm_Atom_Timer_stdIfTimerInit().


iLLD_TC38A: Timer Functions

Functions
Timer Functions
iLLD » GTM » Atom Interface Drivers » ATOM Timer Interface Driver
Collaboration diagram for Timer Functions:

Functions

IFX_EXTERN Ifx_TimerValue | IfxGtm_Atom_Timer_getOffset (IfxGtm_Atom_Timer *driver)
Returns the initial timer offset in ticks. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Atom_Timer_getPointer (IfxGtm_Atom_Timer *driver)
Returns the pointer to timer channel. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Atom_Timer_getTriggerPointer (IfxGtm_Atom_Timer *driver)
Returns the pointer to trigger channel. More...
IFX_EXTERN boolean | IfxGtm_Atom_Timer_init (IfxGtm_Atom_Timer *driver, const IfxGtm_Atom_Timer_Config *config)
Initialises the timer object. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_initConfig (IfxGtm_Atom_Timer_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default. More...

Detailed Description

Function Documentation

◆ IfxGtm_Atom_Timer_getOffset()

IFX_EXTERN Ifx_TimerValue IfxGtm_Atom_Timer_getOffset ( IfxGtm_Atom_Timer * driver )

Returns the initial timer offset in ticks.

See also
IfxStdIf_Timer_GetOffset
Parameters
driver ATOM Timer interface Handle
Returns
Returns the initial timer offset in ticks

Definition at line 120 of file IfxGtm_Atom_Timer.c.

◆ IfxGtm_Atom_Timer_getPointer()

IFX_EXTERN volatile uint32* IfxGtm_Atom_Timer_getPointer ( IfxGtm_Atom_Timer * driver )

Returns the pointer to timer channel.

Parameters
driver ATOM Timer interface Handle
Returns
Pointer

Definition at line 132 of file IfxGtm_Atom_Timer.c.

◆ IfxGtm_Atom_Timer_getTriggerPointer()

IFX_EXTERN volatile uint32* IfxGtm_Atom_Timer_getTriggerPointer ( IfxGtm_Atom_Timer * driver )

Returns the pointer to trigger channel.

Parameters
driver ATOM Timer interface Handle
Returns
Pointer

Definition at line 150 of file IfxGtm_Atom_Timer.c.

◆ IfxGtm_Atom_Timer_init()

IFX_EXTERN boolean IfxGtm_Atom_Timer_init | ( | IfxGtm_Atom_Timer * | driver,
 |  | const IfxGtm_Atom_Timer_Config * | config
 | ) |  |

Initialises the timer object.

Parameters
driver | ATOM Timer interface Handle
config | Configuration structure for ATOM Timer
Returns
TRUE on success else FALSE

Definition at line 156 of file IfxGtm_Atom_Timer.c.

◆ IfxGtm_Atom_Timer_initConfig()

IFX_EXTERN void IfxGtm_Atom_Timer_initConfig | ( | IfxGtm_Atom_Timer_Config * | config,
 |  | Ifx_GTM * | gtm
 | ) |  |

Initializes the configuration structure to default.

Parameters
config | Configuration structure for ATOM Timer
gtm | Pointer to GTM module
Returns
None

Definition at line 324 of file IfxGtm_Atom_Timer.c.


iLLD_TC38A: Data Structures

Data Structures
Data Structures
iLLD » GTM » Atom Interface Drivers » ATOM Timer Interface Driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxGtm_Atom_Timer_Base
Structure for the timer base. More...
struct | IfxGtm_Atom_Timer
TOM Timer interface. More...
struct | IfxGtm_Atom_Timer_Config
Configuration structure for TOM Timer. More...

Detailed Description

Data Structure Documentation

◆ IfxGtm_Atom_Timer_Base

struct IfxGtm_Atom_Timer_Base

Structure for the timer base.

Definition at line 104 of file IfxGtm_Atom_Timer.h.

Data Fields
float32 | clockFreq | Timer input clock frequency (cached value)
IfxStdIf_Timer_CountDir | countDir | Timer counting mode.
Ifx_TimerValue | period | Timer period in ticks (cached value)
boolean | triggerEnabled | If TRUE, the trigger functionality is Initialised.

◆ IfxGtm_Atom_Timer

struct IfxGtm_Atom_Timer

TOM Timer interface.

Definition at line 118 of file IfxGtm_Atom_Timer.h.

Collaboration diagram for IfxGtm_Atom_Timer:
[legend]
Data Fields
Ifx_GTM_ATOM_AGC * | agc | Pointer to the AGC object.
uint32 | agcApplyUpdate | AGC value for apply update.
uint32 | agcDisableUpdate | AGC value for disable update.
Ifx_GTM_ATOM * | atom | ATOM used for the timer functionality.
IfxGtm_Atom | atomIndex | Enum for ATOM objects.
IfxGtm_Atom_Timer_Base | base | Timer base structure.
uint16 | channelsMask | Mask for channels to be modified together.
Ifx_GTM_CDTM_DTM * | dtm | Pointer to DTM object used by ATOM.
IfxGtm_Dtm_Ch | dtmChannel | DTM channel.
Ifx_GTM * | gtm | GTM module used for the timer functionality.
Ifx_TimerValue | offset | Timer initial offset in ticks.
IfxGtm_Atom_Ch | timerChannel | ATOM channel used for the timer.
IfxGtm_Atom_Ch | triggerChannel | ATOM channel used for the trigger, if identical to the timerChannel, the trigger interrupt is having the same interrupt level as the timer interrupt.

◆ IfxGtm_Atom_Timer_Config

struct IfxGtm_Atom_Timer_Config

Configuration structure for TOM Timer.

Definition at line 137 of file IfxGtm_Atom_Timer.h.

Collaboration diagram for IfxGtm_Atom_Timer_Config:
[legend]
Data Fields
IfxGtm_Atom | atom | ATOM used for the timer functionality.
IfxStdIf_Timer_Config | base | Standard interface timer configuration.
IfxGtm_Cmu_Clk | clock | Timer input clock.
IfxGtm_Dtm_ClockSource | dtmClockSource | DTM clock source.
Ifx_GTM * | gtm | GTM used for the timer functionality.
boolean | initPins | TRUE: Initialize pins in driver FALSE: Don't initialize pins in driver : user handles separately.
IfxGtm_IrqMode | irqModeTimer | Interrupt mode for the timer.
IfxGtm_IrqMode | irqModeTrigger | Interrupt mode for the trigger.
IfxGtm_Atom_Ch | timerChannel | ATOM channel used for the timer.
IfxGtm_Atom_ToutMap * | triggerOut | ATOM channel used for the trigger output, can be identical to the timer channe.


iLLD_TC38A: TOM Interface Drivers

Modules
TOM Interface Drivers
iLLD » GTM
Collaboration diagram for TOM Interface Drivers:

Modules

TOM DTM Interface Driver
TOM PWM Interface Driver
TOM PWM HL Interface Driver
TOM Timer Interface Driver

Detailed Description


iLLD_TC38A: TOM DTM Interface Driver

TOM DTM Interface Driver
iLLD » GTM » TOM Interface Drivers
Collaboration diagram for TOM DTM Interface Driver:


iLLD_TC38A: TOM PWM Interface Driver

Modules
TOM PWM Interface Driver
iLLD » GTM » TOM Interface Drivers
Collaboration diagram for TOM PWM Interface Driver:

Modules

How to use the GTM TOM PWM Driver
TOM PWM DataStructures
Pwm Functions

Detailed Description


iLLD_TC38A: How to use the GTM TOM PWM Driver

How to use the GTM TOM PWM Driver
iLLD » GTM » TOM Interface Drivers » TOM PWM Interface Driver
Collaboration diagram for How to use the GTM TOM PWM Driver:

This interface allows to generate simple PWM signal on a TOM out put and can generate interrupts if enabled. this output can also be routed to port pin if required.

Preparation

Include Files

Include following header file into your C code:

#include <Gtm/Tom/Pwm/IfxGtm_Tom_Pwm.h>

Variables

define global variables if necessary

Ifx_GTM *gtm = &MODULE_GTM;
#define TOM0_CH0_PRIO 10

Interrupts

define Interrupts if needed

IFX_INTERRUPT(TOM0Ch0_ISR, 0, TOM0_CH0_PRIO)
{}

Initialization

// install interrupt handlers
IfxCpu_Irq_installInterruptHandler (TOM0Ch0_ISR, TOM0_CH0_PRIO);
// enable GTM clock
{
float32 frequency = IfxGtm_Cmu_getModuleFrequency(gtm);
// Enables the GTM
IfxGtm_enable(gtm);
// Set the global clock frequency to the max
IfxGtm_Cmu_setGclkFrequency(gtm, frequency);
// Set the CMU CLK0
IfxGtm_Cmu_setClkFrequency(gtm, IfxGtm_Cmu_Clk_0, frequency);
// FXCLK: used by TOM and CLK0: used by ATOM
IfxGtm_Cmu_enableClocks(gtm, IFXGTM_CMU_CLKEN_FXCLK | IFXGTM_CMU_CLKEN_CLK0);
}
// initialise TOM
IfxGtm_Tom_Pwm_Config tomConfig; \\configuration structure
IfxGtm_Tom_Pwm_Driver tomHandle; \\ handle
IfxGtm_Tom_Pwm_initConfig(&tomConfig, gtm);
tomConfig.tomChannel = IfxGtm_Tom_Ch_0;
tomConfig.period = 20;
tomConfig.dutyCycle = 10;
tomConfig.interrupt.ccu0Enabled = TRUE;
tomConfig.interrupt.isrPriority = TOM0_CH0_PRIO;
tomConfig.pin.outputPin = &IfxGtm_TOM0_0_TOUT106_P10_4_OUT;
IfxGtm_Tom_Pwm_init(&tomHandle, &tomConfig);

TOM will be now generating a PWM signal on the selected port pin while generating selected interrupt according to above configured period and duty cycle.


iLLD_TC38A: TOM PWM DataStructures

Data Structures
TOM PWM DataStructures
iLLD » GTM » TOM Interface Drivers » TOM PWM Interface Driver
Collaboration diagram for TOM PWM DataStructures:

Data Structures

struct | IfxGtm_Tom_Pwm_Interrupt
configuration structure for interrupts More...
struct | IfxGtm_Tom_Pwm_Config
Configuration structure. More...
struct | IfxGtm_Tom_Pwm_Driver
Driver Handle. More...

Detailed Description

Data Structure Documentation

◆ IfxGtm_Tom_Pwm_Interrupt

struct IfxGtm_Tom_Pwm_Interrupt

configuration structure for interrupts

Definition at line 137 of file IfxGtm_Tom_Pwm.h.

Data Fields
boolean | ccu0Enabled | Enable/Disable choice for CCU0 trigger interrupt.
boolean | ccu1Enabled | Enable/Disable choice for CCU1 trigger interrupt.
Ifx_Priority | isrPriority | Priority for Ccu0/1 interrupt.
IfxSrc_Tos | isrProvider | Type of Service for Ccu0/1 interrupt.
IfxGtm_IrqMode | mode | IRQ mode of interrupt.

◆ IfxGtm_Tom_Pwm_Config

struct IfxGtm_Tom_Pwm_Config

Configuration structure.

Definition at line 161 of file IfxGtm_Tom_Pwm.h.

Collaboration diagram for IfxGtm_Tom_Pwm_Config:
[legend]
Data Fields
IfxGtm_Tom_Ch_ClkSrc | clock | Timer input clock.
IfxGtm_Dtm_ClockSource | dtmClockSource | DTM clock source.
uint32 | dutyCycle | Duty Cycle.
Ifx_GTM * | gtm | Pointer to GTM module.
boolean | immediateStartEnabled | enable/disable immediate start of PWM
IfxGtm_Tom_Pwm_Interrupt | interrupt | configuration structure for interrupt
boolean | oneShotModeEnabled | Enable/Disable the one shot mode.
uint32 | period | Period.
IfxGtm_Tom_Pwm_pin | pin | configuration structure for output pin
Ifx_ActiveState | signalLevel | Signal Level.
boolean | synchronousUpdateEnabled | Synchronous or Asynchronous update.
IfxGtm_Tom | tom | Index of the TOM object used.
IfxGtm_Tom_Ch | tomChannel | TOM channel used for the timer.

◆ IfxGtm_Tom_Pwm_Driver

struct IfxGtm_Tom_Pwm_Driver

Driver Handle.

Definition at line 180 of file IfxGtm_Tom_Pwm.h.

Data Fields
Ifx_GTM * | gtm | Pointer to GTM module.
Ifx_GTM_TOM_TGC * | tgc[2] | Pointer to the TGC object.
Ifx_GTM_TOM * | tom | Pointer to the TOM object.
IfxGtm_Tom_Ch | tomChannel | TOM channel used for the timer.
IfxGtm_Tom | tomIndex | Index of the TOM object used.


iLLD_TC38A: Pwm Functions

Functions
Pwm Functions
iLLD » GTM » TOM Interface Drivers » TOM PWM Interface Driver
Collaboration diagram for Pwm Functions:

Functions

IFX_EXTERN boolean | IfxGtm_Tom_Pwm_init (IfxGtm_Tom_Pwm_Driver *driver, const IfxGtm_Tom_Pwm_Config *config)
Initialises the Timer object. More...
IFX_EXTERN void | IfxGtm_Tom_Pwm_initConfig (IfxGtm_Tom_Pwm_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default. More...

Detailed Description

Function Documentation

◆ IfxGtm_Tom_Pwm_init()

IFX_EXTERN boolean IfxGtm_Tom_Pwm_init | ( | IfxGtm_Tom_Pwm_Driver * | driver,
 |  | const IfxGtm_Tom_Pwm_Config * | config
 | ) |  |

Initialises the Timer object.

Parameters
driver | TOM Handle
config | Configuration structure for TOM Timer
Returns
TRUE on success else FALSE

Definition at line 52 of file IfxGtm_Tom_Pwm.c.

◆ IfxGtm_Tom_Pwm_initConfig()

IFX_EXTERN void IfxGtm_Tom_Pwm_initConfig | ( | IfxGtm_Tom_Pwm_Config * | config,
 |  | Ifx_GTM * | gtm
 | ) |  |

Initializes the configuration structure to default.

Parameters
config | This parameter is Initialised by the function
gtm | Pointer to GTM module
Returns
None

Definition at line 157 of file IfxGtm_Tom_Pwm.c.


iLLD_TC38A: TOM PWM HL Interface Driver

Modules
TOM PWM HL Interface Driver
iLLD » GTM » TOM Interface Drivers
Collaboration diagram for TOM PWM HL Interface Driver:

Modules

How to use the GTM TOM PWM Driver
Data Structures
PwmHl Functions
PwmHl StdIf Functions

Detailed Description


iLLD_TC38A: How to use the GTM TOM PWM Driver

How to use the GTM TOM PWM Driver
iLLD » GTM » TOM Interface Drivers » TOM PWM HL Interface Driver
Collaboration diagram for How to use the GTM TOM PWM Driver:

This driver implements the PWM functionalities as defined by Standard interface: Multi-channels, dual-complementary PWM interface. The user is free to use either the driver specific APIs below or to used the standard interface APIs.

Specific implementation

Implementation is similar to TOM PWM HL Interface Driver

For a detailed configuration of the microcontroller, see IfxGtm_TomDtm_PwmHl_init().

Usage example

Initialisation is done by, e.g:

IfxGtm_TomDtm_PwmHl_Config driverConfig;
IfxGtm_TomDtm_PwmHl driverData;
IfxStdIf_PwmHl pwmhl;
IfxGtm_TomDtm_PwmHl_initConfig(&driverConfig, &MODULE_GTM);
IfxGtm_TomDtm_PwmHl_init(&driverData, &driverConfig);
IfxGtm_TomDtm_PwmHl_stdIfPwmHlInit(pwmhl, &driverData);

During run-time, the interface functions shall be used, e.g.:

IfxStdIf_Timer* timer = IfxStdIf_PwmHl_getTimer(pwmhl);
Ifx_TimerValue onTime[3]; // assume configured for three HL channels
onTime[0] = 10;
onTime[1] = 20;
onTime[2] = 30;
IfxStdIf_Timer_disableUpdate(timer);
IfxStdIf_Timer_setPeriod(timer, period);
IfxStdIf_PwmHl_setOnTime(pwmhl, onTime);
IfxStdIf_Timer_applyUpdate(timer);

This driver implements the PWM functionalities as defined by Standard interface: Multi-channels, dual-complementary PWM interface. The user is free to use either the driver specific APIs below or to used the standard interface APIs.

Specific implementation

The PWM driver is a concatenation of a timer with additional PWM generation cells.

The timer is implemented as described in TOM Timer Interface Driver, it generate an internal trigger that is used to synchronize all the TOM channel used (shown in red in the pictures below).

The picture below presents two configuration examples:

  • On the left, the timer and trigger are generated using the same TOM channel CH0. The 3 dual-complementary PWMs, CCx and COUTx, are generated using 6 additional TOM channels (CH1 to Ch6).
  • On the right, the timer and the trigger uses separate TOM channels to allow the triggering of the ADC conversions. The order of the CCx and COUTx has been allocated freely between CH9 up to CH14.
PWM implementations on GTM TOM

Each of the TOM channel used for the generation of the CCx and COUTx signals are configured as in the figure below:

TOM channel configuration

.

The internal trigger (red line) is generated by the timer on timer rest and used by the TOM PWM channels to reset the counters CN0 and transfer the shadow values saved in SR0 and SR1 to the CM0 and CM1 registers. When the counter CN0 reach the values of the CM0 or CM1 compare registers, a rising or falling edge is generated on the output PWM signal. The signal active state configuration define which of the CM0 or CM1 is generating the falling or rising edge.

This trigger mechanism ensure that all the PWM channels, period and trigger are updated at the exact same time, avoiding any possibility for glitch or incoherent signals.

The clock use is the same as the timer clock.

In order to ensure a coherent update of all registers, the internal trigger must be disable before updating the timer, trigger and PWM duty cycles shadow values, and enabled once the update is done. The transfer will ocucrs at the next timer reset.

Features

  • This implementation allows from 1 up to 3 dual-complementary PWM channels.
  • Resources used:
    • Additionally to the linked timer resources used, the following resources are used:
      • 2 TOM channels per PWM channels
    • All TOM channels used must be own by the same TOM and TGC as for the linked timer
  • The TOM channel used for the timer must always have a lower index than the TOM channels used for the pwm.
  • All TOM channels used (including the timer and the trigger) must be contiguous but the order of the TOM channels is free.

For a detailed configuration of the microcontroller, see IfxGtm_Tom_PwmHl_init().

Usage Example

Initialisation is done by, e.g:

IfxGtm_Tom_PwmHl_Config driverConfig;
IfxGtm_Tom_PwmHl driverData;
IfxStdIf_PwmHl pwmhl;
IfxGtm_Tom_PwmHl_initConfig(&driverConfig, &MODULE_GTM);
IfxGtm_Tom_PwmHl_init(&driverData, &driverConfig);
IfxGtm_Tom_PwmHl_stdIfPwmHlInit(pwmhl, &driverData);

During run-time, the interface functions shall be used, e.g.:

IfxStdIf_Timer* timer = IfxStdIf_PwmHl_getTimer(pwmhl);
Ifx_TimerValue onTime[3]; // assume configured for three HL channels
onTime[0] = 10;
onTime[1] = 20;
onTime[2] = 30;
IfxStdIf_Timer_disableUpdate(timer);
IfxStdIf_Timer_setPeriod(timer, period);
IfxStdIf_PwmHl_setOnTime(pwmhl, onTime);
IfxStdIf_Timer_applyUpdate(timer);


iLLD_TC38A: Data Structures

Data Structures
Data Structures
iLLD » GTM » TOM Interface Drivers » TOM PWM HL Interface Driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxGtm_Tom_PwmHl_Base
Multi-channels PWM object definition (channels only) More...
struct | IfxGtm_Tom_PwmHl_Config
GTM TOM: PWM HL configuration. More...
struct | IfxGtm_Tom_PwmHl_Mode
Structure for PWM configuration. More...
struct | IfxGtm_Tom_PwmHl_s
GTM TOM PWM driver. More...

Detailed Description

Data Structure Documentation

◆ IfxGtm_Tom_PwmHl_Base

struct IfxGtm_Tom_PwmHl_Base

Multi-channels PWM object definition (channels only)

Definition at line 168 of file IfxGtm_Tom_PwmHl.h.

Data Fields
Ifx_ActiveState | ccxActiveState | Top PWM active state.
uint8 | channelCount | Number of PWM channels, one channel is made of a top and bottom channel.
Ifx_ActiveState | coutxActiveState | Bottom PWM active state.
Ifx_TimerValue | deadtime | Dead time between the top and bottom channel in ticks.
boolean | inverted | Flag indicating the center aligned inverted mode (TRUE)
Ifx_TimerValue | maxPulse | internal parameter
Ifx_TimerValue | minPulse | minimum pulse that is output, shorter pulse time will be output as 0% duty cycle
Ifx_Pwm_Mode | mode | actual PWM mode
sint8 | setMode | A non zero flag indicates that the PWM mode is being modified.

◆ IfxGtm_Tom_PwmHl_Config

struct IfxGtm_Tom_PwmHl_Config

GTM TOM: PWM HL configuration.

Definition at line 187 of file IfxGtm_Tom_PwmHl.h.

Collaboration diagram for IfxGtm_Tom_PwmHl_Config:
[legend]
Data Fields
IfxStdIf_PwmHl_Config | base | PWM HL standard interface configuration.
IFX_CONST IfxGtm_Tom_ToutMapP * | ccx | Pointer to an array of size base.channelCount/2 containing the channels used. All channels used for ccx and coutx must be adjacent to the channel used for the timer, order is not important.
IFX_CONST IfxGtm_Tom_ToutMapP * | coutx | Pointer to an array of size base.channelCount/2 containing the channels used. All channels used for ccx and coutx must be adjacent to the channel used for the timer, order is not important.
boolean | initPins | TRUE: Initialize pins in driver FALSE: Don't initialize pins in driver: user handles separately.
IfxGtm_Tom_Timer * | timer | Pointer to the linked timer object.
IfxGtm_Tom | tom | TOM unit used.

◆ IfxGtm_Tom_PwmHl_Mode

struct IfxGtm_Tom_PwmHl_Mode

Structure for PWM configuration.

Definition at line 200 of file IfxGtm_Tom_PwmHl.h.

Collaboration diagram for IfxGtm_Tom_PwmHl_Mode:
[legend]
Data Fields
boolean | inverted | Inverted configuration for the selected mode.
Ifx_Pwm_Mode | mode | Pwm Mode.
IfxGtm_Tom_PwmHl_Update | update | update call back function for the selected mode
IfxGtm_Tom_PwmHl_UpdateShift | updateAndShift | update shift call back function for the selected mode
IfxGtm_Tom_PwmHl_UpdatePulse | updatePulse | update pulse call back function for the selected mode

◆ IfxGtm_Tom_PwmHl_s

struct IfxGtm_Tom_PwmHl_s

GTM TOM PWM driver.

Definition at line 211 of file IfxGtm_Tom_PwmHl.h.

Collaboration diagram for IfxGtm_Tom_PwmHl_s:
[legend]
Data Fields
IfxGtm_Tom_PwmHl_Base | base | Multi-channels PWM object definition (channels only)
IfxGtm_Tom_Ch | ccx[IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS] | TOM channels used for the CCCX outputs.
IfxGtm_Tom_Ch * | ccxTemp | cached value
IfxGtm_Tom_Ch | coutx[IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS] | TOM channels used for the OUTX outputs.
IfxGtm_Tom_Ch * | coutxTemp | cached value
Ifx_GTM_TOM_TGC * | tgc | TGC unit used.
IfxGtm_Tom_Timer * | timer | Pointer to the linked timer object.
Ifx_GTM_TOM * | tom | TOM unit used.
IfxGtm_Tom_PwmHl_Update | update | Update function for actual selected mode.
IfxGtm_Tom_PwmHl_UpdateShift | updateAndShift | Update shift function for actual selected mode.
IfxGtm_Tom_PwmHl_UpdatePulse | updatePulse | Update pulse function for actual selected mode.


iLLD_TC38A: PwmHl Functions

Functions
PwmHl Functions
iLLD » GTM » TOM Interface Drivers » TOM PWM HL Interface Driver
Collaboration diagram for PwmHl Functions:

Functions

IFX_EXTERN boolean | IfxGtm_Tom_PwmHl_init (IfxGtm_Tom_PwmHl *driver, const IfxGtm_Tom_PwmHl_Config *config)
Initializes the timer object note To ensure that the channels counter are reset by the timer and do not overflow, leading to random signal on the output, the timer must be started before the call to this function. Note: all PWM channels must use the same TGC Note: the current implementation must use the same TGC for the timer and PWM channels. More...
IFX_EXTERN void | IfxGtm_Tom_PwmHl_initConfig (IfxGtm_Tom_PwmHl_Config *config)
Initialize the configuration structure to default. More...

Detailed Description

Function Documentation

◆ IfxGtm_Tom_PwmHl_init()

IFX_EXTERN boolean IfxGtm_Tom_PwmHl_init | ( | IfxGtm_Tom_PwmHl * | driver,
 |  | const IfxGtm_Tom_PwmHl_Config * | config
 | ) |  |

Initializes the timer object note To ensure that the channels counter are reset by the timer and do not overflow, leading to random signal on the output, the timer must be started before the call to this function. Note: all PWM channels must use the same TGC Note: the current implementation must use the same TGC for the timer and PWM channels.

Parameters
driver | GTM TOM PWM driver
config | GTM TOM: PWM HL configuration
Returns
TRUE on success else FALSE

Definition at line 166 of file IfxGtm_Tom_PwmHl.c.

◆ IfxGtm_Tom_PwmHl_initConfig()

IFX_EXTERN void IfxGtm_Tom_PwmHl_initConfig ( IfxGtm_Tom_PwmHl_Config * config )

Initialize the configuration structure to default.

Parameters
config Channel configuration. This parameter is Initialised by the function
Returns
None

Definition at line 289 of file IfxGtm_Tom_PwmHl.c.


iLLD_TC38A: PwmHl StdIf Functions

Functions
PwmHl StdIf Functions
iLLD » GTM » TOM Interface Drivers » TOM PWM HL Interface Driver
Collaboration diagram for PwmHl StdIf Functions:

Functions

IFX_INLINE Ifx_ActiveState | IfxGtm_Tom_PwmHl_invertActiveState (Ifx_ActiveState activeState)
Inverts the active state. More...
IFX_STATIC void | IfxGtm_Tom_PwmHl_updateAndShiftOff (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets switched to OFF. More...
IFX_STATIC void | IfxGtm_Tom_PwmHl_updateCenterAligned (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in center aligned and center aligned inverted modes. More...
IFX_STATIC void | IfxGtm_Tom_PwmHl_updateEdgeAligned (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in edge aligned modes (left and right aligned) More...
IFX_STATIC void | IfxGtm_Tom_PwmHl_updateOff (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Set the outputs to inactive. More...
IFX_STATIC void | IfxGtm_Tom_PwmHl_updatePulse (IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
Update Pulse. More...
IFX_STATIC void | IfxGtm_Tom_PwmHl_updatePulseOff (IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
Set Pulse to OFF. More...
IFX_STATIC void | IfxGtm_Tom_PwmHl_updateShiftCenterAligned (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Update Shift Center Aligned. More...
IFX_EXTERN float32 | IfxGtm_Tom_PwmHl_getDeadtime (IfxGtm_Tom_PwmHl *driver)
Returns the dead time. More...
IFX_EXTERN float32 | IfxGtm_Tom_PwmHl_getMinPulse (IfxGtm_Tom_PwmHl *driver)
Returns the minimum pulse. More...
IFX_EXTERN Ifx_Pwm_Mode | IfxGtm_Tom_PwmHl_getMode (IfxGtm_Tom_PwmHl *driver)
Returns Pwm mode. More...
IFX_EXTERN boolean | IfxGtm_Tom_PwmHl_setDeadtime (IfxGtm_Tom_PwmHl *driver, float32 deadtime)
Sets the dead time. More...
IFX_EXTERN boolean | IfxGtm_Tom_PwmHl_setMinPulse (IfxGtm_Tom_PwmHl *driver, float32 minPulse)
Sets the minimum pulse. More...
IFX_EXTERN boolean | IfxGtm_Tom_PwmHl_setMode (IfxGtm_Tom_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate() More...
IFX_EXTERN void | IfxGtm_Tom_PwmHl_setOnTime (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Sets the ON time. More...
IFX_EXTERN void | IfxGtm_Tom_PwmHl_setOnTimeAndShift (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets the ON time and Shift. More...
IFX_EXTERN void | IfxGtm_Tom_PwmHl_setPulse (IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
Sets the ON time and offset, all switched are independent. More...
IFX_EXTERN void | IfxGtm_Tom_PwmHl_setupChannels (IfxGtm_Tom_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set up channels. More...
IFX_EXTERN boolean | IfxGtm_Tom_PwmHl_stdIfPwmHlInit (IfxStdIf_PwmHl *stdif, IfxGtm_Tom_PwmHl *driver)
Initialises the statndard interface Pwm. More...

Detailed Description

Function Documentation

◆ IfxGtm_Tom_PwmHl_getDeadtime()

IFX_EXTERN float32 IfxGtm_Tom_PwmHl_getDeadtime ( IfxGtm_Tom_PwmHl * driver )

Returns the dead time.

See also
IfxStdIf_PwmHl_GetDeadtime
Parameters
driver GTM TOM PWM driver
Returns
Dead Time

Definition at line 148 of file IfxGtm_Tom_PwmHl.c.

Referenced by IfxGtm_Tom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_PwmHl_getMinPulse()

IFX_EXTERN float32 IfxGtm_Tom_PwmHl_getMinPulse ( IfxGtm_Tom_PwmHl * driver )

Returns the minimum pulse.

See also
IfxStdIf_PwmHl_GetMinPulse
Parameters
driver GTM TOM PWM driver
Returns
Min Pulse

Definition at line 154 of file IfxGtm_Tom_PwmHl.c.

Referenced by IfxGtm_Tom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_PwmHl_getMode()

IFX_EXTERN Ifx_Pwm_Mode IfxGtm_Tom_PwmHl_getMode ( IfxGtm_Tom_PwmHl * driver )

Returns Pwm mode.

See also
IfxStdIf_PwmHl_GetMode
Parameters
driver GTM TOM PWM driver
Returns
Pwm mode

Definition at line 160 of file IfxGtm_Tom_PwmHl.c.

Referenced by IfxGtm_Tom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_PwmHl_invertActiveState()

IFX_INLINE Ifx_ActiveState IfxGtm_Tom_PwmHl_invertActiveState ( Ifx_ActiveState activeState )

Inverts the active state.

Parameters
activeState Active state
Returns
State

Definition at line 138 of file IfxGtm_Tom_PwmHl.c.

Referenced by IfxGtm_Tom_PwmHl_init(), and IfxGtm_Tom_PwmHl_setMode().

◆ IfxGtm_Tom_PwmHl_setDeadtime()

IFX_EXTERN boolean IfxGtm_Tom_PwmHl_setDeadtime | ( | IfxGtm_Tom_PwmHl * | driver,
 |  | float32 | deadtime
 | ) |  |

Sets the dead time.

See also
IfxStdIf_PwmHl_setDeadtime
Parameters
driver | GTM TOM PWM driver
deadtime | Dead time value
Returns
TRUE on success else FALSE

Definition at line 300 of file IfxGtm_Tom_PwmHl.c.

Referenced by IfxGtm_Tom_PwmHl_init(), and IfxGtm_Tom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_PwmHl_setMinPulse()

IFX_EXTERN boolean IfxGtm_Tom_PwmHl_setMinPulse | ( | IfxGtm_Tom_PwmHl * | driver,
 |  | float32 | minPulse
 | ) |  |

Sets the minimum pulse.

See also
IfxStdIf_PwmHl_setMinPulse
Parameters
driver | GTM TOM PWM driver
minPulse | Minimum pulse
Returns
TRUE on success else FALSE

Definition at line 309 of file IfxGtm_Tom_PwmHl.c.

Referenced by IfxGtm_Tom_PwmHl_init(), and IfxGtm_Tom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_PwmHl_setMode()

IFX_EXTERN boolean IfxGtm_Tom_PwmHl_setMode | ( | IfxGtm_Tom_PwmHl * | driver,
 |  | Ifx_Pwm_Mode | mode
 | ) |  |

Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate()

See also
IfxStdIf_PwmHl_SetMode
Parameters
driver | GTM TOM PWM driver
mode | Pwm mode
Returns
TRUE on success else FALSE
Note
that changing signal level may produce short circuit at the power stage, in which case the inverter must be disable during this action.

Definition at line 320 of file IfxGtm_Tom_PwmHl.c.

Referenced by IfxGtm_Tom_PwmHl_init(), and IfxGtm_Tom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_PwmHl_setOnTime()

IFX_EXTERN void IfxGtm_Tom_PwmHl_setOnTime | ( | IfxGtm_Tom_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn
 | ) |  |

Sets the ON time.

See also
IfxStdIf_PwmHl_SetOnTime
Parameters
driver | GTM TOM PWM driver
tOn | ON time
Returns
None

Definition at line 389 of file IfxGtm_Tom_PwmHl.c.

Referenced by IfxGtm_Tom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_PwmHl_setOnTimeAndShift()

IFX_EXTERN void IfxGtm_Tom_PwmHl_setOnTimeAndShift | ( | IfxGtm_Tom_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn,
 |  | Ifx_TimerValue * | shift
 | ) |  |

Sets the ON time and Shift.

Parameters
driver | GTM TOM PWM driver
tOn | ON time
shift | Shift value in ticks
Returns
None

Definition at line 395 of file IfxGtm_Tom_PwmHl.c.

Referenced by IfxGtm_Tom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_PwmHl_setPulse()

IFX_EXTERN void IfxGtm_Tom_PwmHl_setPulse | ( | IfxGtm_Tom_PwmHl * | driver,
 |  | float32 * | tOn,
 |  | float32 * | offset
 | ) |  |

Sets the ON time and offset, all switched are independent.

Parameters
driver | GTM TOM PWM driver
tOn | ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
offset | Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
Returns
None

Definition at line 401 of file IfxGtm_Tom_PwmHl.c.

Referenced by IfxGtm_Tom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_PwmHl_setupChannels()

IFX_EXTERN void IfxGtm_Tom_PwmHl_setupChannels | ( | IfxGtm_Tom_PwmHl * | driver,
 |  | boolean * | activeCh,
 |  | boolean * | stuckSt
 | ) |  |

Set up channels.

See also
IfxStdIf_PwmHl_SetupChannels
Parameters
driver | GTM TOM PWM driver
activeCh | Active channel
stuckSt | Stuck state
Returns
None

Definition at line 407 of file IfxGtm_Tom_PwmHl.c.

Referenced by IfxGtm_Tom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_PwmHl_stdIfPwmHlInit()

IFX_EXTERN boolean IfxGtm_Tom_PwmHl_stdIfPwmHlInit | ( | IfxStdIf_PwmHl * | stdif,
 |  | IfxGtm_Tom_PwmHl * | driver
 | ) |  |

Initialises the statndard interface Pwm.

Parameters
stdif | Standard interface object, will be initialized by the function
driver | Interface driver to be used by the standard interface. must be initialised separately
Returns
TRUE on success else FALSE

Definition at line 416 of file IfxGtm_Tom_PwmHl.c.

◆ IfxGtm_Tom_PwmHl_updateAndShiftOff()

IFX_STATIC void IfxGtm_Tom_PwmHl_updateAndShiftOff | ( | IfxGtm_Tom_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn,
 |  | Ifx_TimerValue * | shift
 | ) |  |

Sets switched to OFF.

Parameters
driver | GTM TOM PWM driver
tOn | ON time
shift | Shift value in ticks
Returns
None

Definition at line 441 of file IfxGtm_Tom_PwmHl.c.

◆ IfxGtm_Tom_PwmHl_updateCenterAligned()

IFX_STATIC void IfxGtm_Tom_PwmHl_updateCenterAligned | ( | IfxGtm_Tom_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn
 | ) |  |

Updates the x output duty cycle in center aligned and center aligned inverted modes.

Parameters
driver | GTM TOM PWM driver
tOn | T on
Returns
None

Definition at line 450 of file IfxGtm_Tom_PwmHl.c.

◆ IfxGtm_Tom_PwmHl_updateEdgeAligned()

IFX_STATIC void IfxGtm_Tom_PwmHl_updateEdgeAligned | ( | IfxGtm_Tom_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn
 | ) |  |

Updates the x output duty cycle in edge aligned modes (left and right aligned)

Parameters
driver | GTM TOM PWM driver
tOn | T on
Returns
None

Definition at line 510 of file IfxGtm_Tom_PwmHl.c.

◆ IfxGtm_Tom_PwmHl_updateOff()

IFX_STATIC void IfxGtm_Tom_PwmHl_updateOff | ( | IfxGtm_Tom_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn
 | ) |  |

Set the outputs to inactive.

Parameters
driver | GTM TOM PWM driver
tOn | T on
Returns
None

Definition at line 570 of file IfxGtm_Tom_PwmHl.c.

Referenced by IfxGtm_Tom_PwmHl_init(), IfxGtm_Tom_PwmHl_updateAndShiftOff(), and IfxGtm_Tom_PwmHl_updatePulseOff().

◆ IfxGtm_Tom_PwmHl_updatePulse()

IFX_STATIC void IfxGtm_Tom_PwmHl_updatePulse | ( | IfxGtm_Tom_PwmHl * | driver,
 |  | float32 * | tOn,
 |  | float32 * | offset
 | ) |  |

Update Pulse.

Parameters
driver | GTM TOM PWM driver
tOn | ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
offset | Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
Returns
None

Definition at line 587 of file IfxGtm_Tom_PwmHl.c.

◆ IfxGtm_Tom_PwmHl_updatePulseOff()

IFX_STATIC void IfxGtm_Tom_PwmHl_updatePulseOff | ( | IfxGtm_Tom_PwmHl * | driver,
 |  | float32 * | tOn,
 |  | float32 * | offset
 | ) |  |

Set Pulse to OFF.

Parameters
driver | GTM TOM PWM driver
tOn | ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
offset | Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
Returns
None

Definition at line 694 of file IfxGtm_Tom_PwmHl.c.

◆ IfxGtm_Tom_PwmHl_updateShiftCenterAligned()

IFX_STATIC void IfxGtm_Tom_PwmHl_updateShiftCenterAligned | ( | IfxGtm_Tom_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn,
 |  | Ifx_TimerValue * | shift
 | ) |  |

Update Shift Center Aligned.

Parameters
driver | GTM TOM PWM driver
tOn | ON time
shift | Shift value in ticks
Returns
None

Definition at line 702 of file IfxGtm_Tom_PwmHl.c.


iLLD_TC38A: TOM Timer Interface Driver

Modules
TOM Timer Interface Driver
iLLD » GTM » TOM Interface Drivers
Collaboration diagram for TOM Timer Interface Driver:

Modules

How to use the GTM TOM Timer Driver
Data Structures
Timer Functions
Timer StdIf Functions

Detailed Description


iLLD_TC38A: How to use the GTM TOM Timer Driver

How to use the GTM TOM Timer Driver
iLLD » GTM » TOM Interface Drivers » TOM Timer Interface Driver
Collaboration diagram for How to use the GTM TOM Timer Driver:

This driver implements the timer functionalities as defined by Standard interface: Timer. The user is free to use either the driver specific APIs below or to used the standard interface APIs.

Specific implementation

The timer fucntinality is implemented using either a single or 2 TOM channels. The dicision to use 1 or 2 channels is done depending on the following requirements:

  • relative position of the timer channel to the other channels used if any
  • need to trigger an other module, for example ADC triggering.

The figure below show how the TOM is configured when a single TOM channel is used for the timer and trigger functinalities. The internal trigger signal (red line) is generated when the counter CN0 reach the CM0 compare register. The value of CM0 act as the period value. This internal trigger is used to reset the CN0 counter and simultaneously transfer the shadow values for the period value (SR0->CM0) and trigger edge (SR1->CM1). The internal trigger is used as a trigger input to the next TOM channel. The trigger signal (output trigger) is generated by the CM0 and CM1 compare values. Depending on the trigger signal active edge configuiration, the CM0 will reset, and the CM1 will set the trigger signal, or vice versa.

Timer using one signle TOM channel

In case 2 TOM channels are used for the timer and trigger functionalities, the 1st channel (CHz in the figure below) is used for the generation of the period, and the 2nd channel (CHz+n the below figure, the figure shows n=1 as example) is used for the trigger generation.

The CHz TOM channel generates the internal trigger signal (red line) when the counter CN0 reach the CM0 compare register. The value of CM0 of CHz act as the period value. This internal trigger is used to reset the CN0 counter and simultaneously transfer the shadow period value (SR0->CM0). The internal trigger is used as an input for the next TOM channel.

The CHz+n TOM channel, uses the internal trigger signal to simultaneously resets the counter CN0, and transfer the shadow values used for the generation of the trigger falling and rising edges (SR0->CM0 and SR1->CM1). The internal trigger is used as a trigger input to the next TOM channel. Depending on the trigger signal active edge configuiration, the CM0 will reset, and the CM1 will set the trigger signal, or vice versa. In orter to have a similar behaviour to the single channel implementation, the CM0 is set to the same value as CHz CM0, and CM1 is used for the trigger edge.

Timer using two different TOM channels for the timer and the trigger

In order to ensure a coherent update of all registers, the internal trigger must be disable before updating the timer and trigger shadow values, and enabled once the update is done. The transfer will ocucrs at the next timer reset.

  • Resources used:
    • if the trigger channel is identical to the timer channel, only one TOM channels is used
    • if the trigger channel is different from the timer channel, 2 TOM channels are used
    • All channels used must be own by the same TOM and TOM TGC
  • The timer counting direction is limited to IfxStdIf_Timer_CountDir_up
  • If the TOM trigger channel is not the same as the TOM timer channels
    • The TOM channel used for the trigger must have a lower index than the TOM channels used for the timer.
    • the TOM channels must be contiguous, unless specified by the driver using the timer driver.

Note: the timer and trigger must bepart of the same TGC, but PWM channels can be of different TGC of the same TOM as the timer

For a detailed configuration of the microcontroller, see IfxGtm_Tom_Timer_init().

Usage Example

Initialisation:

IfxGtm_Tom_Timer_Config driverConfig;
IfxGtm_Tom_Timer driverData;
IfxStdIf_Timer timer;
IfxGtm_Tom_Timer_initConfig(&driverConfig, &MODULE_GTM);
IfxGtm_Tom_Timer_init (&driverData, &driverConfig);
boolean IfxGtm_Tom_Timer_stdIfTimerInit(&timer, &driverData);

During run-time, the interface functions should be used:

IfxStdIf_Timer_run(timer);
IfxStdIf_Timer_disableUpdate(timer);
IfxStdIf_Timer_setPeriod(timer, period);
IfxStdIf_Timer_applyUpdate(timer);


iLLD_TC38A: Data Structures

Data Structures
Data Structures
iLLD » GTM » TOM Interface Drivers » TOM Timer Interface Driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxGtm_Tom_Timer_Base
Structure for the timer base. More...
struct | IfxGtm_Tom_Timer
TOM Timer interface Handle. More...
struct | IfxGtm_Tom_Timer_Config
Configuration structure for TOM Timer. More...

Detailed Description

Data Structure Documentation

◆ IfxGtm_Tom_Timer_Base

struct IfxGtm_Tom_Timer_Base

Structure for the timer base.

Definition at line 147 of file IfxGtm_Tom_Timer.h.

Data Fields
float32 | clockFreq | Timer input clock frequency (cached value)
IfxStdIf_Timer_CountDir | countDir | Timer counting mode.
Ifx_TimerValue | period | Timer period in ticks (cached value)
boolean | triggerEnabled | If TRUE, the trigger functionality is Initialised.

◆ IfxGtm_Tom_Timer

struct IfxGtm_Tom_Timer

TOM Timer interface Handle.

Definition at line 161 of file IfxGtm_Tom_Timer.h.

Collaboration diagram for IfxGtm_Tom_Timer:
[legend]
Data Fields
IfxGtm_Tom_Timer_Base | base | Timer base structure.
uint16 | channelsMask[2] | Mask for channels to be modified together, The 1st value corresponds to the Timer's TGC, the 2nd value corresponds to the timer's next TGC if any.
Ifx_GTM_CDTM_DTM * | dtm | Pointer to DTM object used by TOM.
IfxGtm_Dtm_Ch | dtmChannel | DTM Channel.
Ifx_GTM * | gtm | Pointer to GTM module.
Ifx_TimerValue | offset | Timer initial offset in ticks.
Ifx_GTM_TOM_TGC * | tgc[2] | Pointer to the TGC object.
uint32 | tgcGlobalControlApplyUpdate[2] | Cached value for TGC GLOB_CTR.
uint32 | tgcGlobalControlDisableUpdate[2] | Cached value for TGC GLOB_CTR.
IfxGtm_Tom_Ch | timerChannel | TOM channel used for the timer.
Ifx_GTM_TOM * | tom | Pointer to the TOM object.
IfxGtm_Tom | tomIndex | Enum for TOM objects.
IfxGtm_Tom_Ch | triggerChannel | TOM channel used for the trigger, can be identical to the timer channel.

◆ IfxGtm_Tom_Timer_Config

struct IfxGtm_Tom_Timer_Config

Configuration structure for TOM Timer.

Definition at line 180 of file IfxGtm_Tom_Timer.h.

Collaboration diagram for IfxGtm_Tom_Timer_Config:
[legend]
Data Fields
IfxStdIf_Timer_Config | base | Standard interface timer configuration.
IfxGtm_Tom_Ch_ClkSrc | clock | Timer input clock.
IfxGtm_Dtm_ClockSource | dtmClockSource | DTM clock source.
Ifx_GTM * | gtm | Pointer to GTM module.
boolean | initPins | TRUE : Initialize pins in driver. FALSE: Don't initialize pins : handled separately by user.
IfxGtm_IrqMode | irqModeTimer | Interrupt mode for the timer.
IfxGtm_IrqMode | irqModeTrigger | Interrupt mode for the trigger.
IfxGtm_Tom_Ch | timerChannel | TOM channel used for the timer.
IfxGtm_Tom | tom | Index of the TOM object used.
IfxGtm_Tom_ToutMap * | triggerOut | TOM channel used for the trigger output, can be identical to the timer channel.


iLLD_TC38A: Timer Functions

Functions
Timer Functions
iLLD » GTM » TOM Interface Drivers » TOM Timer Interface Driver
Collaboration diagram for Timer Functions:

Functions

IFX_EXTERN Ifx_TimerValue | IfxGtm_Tom_Timer_getOffset (IfxGtm_Tom_Timer *driver)
Returns the initial timer offset in ticks. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Tom_Timer_getPointer (IfxGtm_Tom_Timer *driver)
Returns the pointer to timer channel. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Tom_Timer_getTriggerPointer (IfxGtm_Tom_Timer *driver)
Returns the pointer to trigger channel. More...
IFX_EXTERN boolean | IfxGtm_Tom_Timer_init (IfxGtm_Tom_Timer *driver, const IfxGtm_Tom_Timer_Config *config)
Initialises the timer object. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_initConfig (IfxGtm_Tom_Timer_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default. More...

Detailed Description

Function Documentation

◆ IfxGtm_Tom_Timer_getOffset()

IFX_EXTERN Ifx_TimerValue IfxGtm_Tom_Timer_getOffset ( IfxGtm_Tom_Timer * driver )

Returns the initial timer offset in ticks.

Parameters
driver TOM Timer interface Handle
Returns
Returns the initial timer offset in ticks

Definition at line 150 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_PwmHl_init().

◆ IfxGtm_Tom_Timer_getPointer()

IFX_EXTERN volatile uint32* IfxGtm_Tom_Timer_getPointer ( IfxGtm_Tom_Timer * driver )

Returns the pointer to timer channel.

Parameters
driver TOM Timer interface Handle
Returns
Pointer

Definition at line 162 of file IfxGtm_Tom_Timer.c.

◆ IfxGtm_Tom_Timer_getTriggerPointer()

IFX_EXTERN volatile uint32* IfxGtm_Tom_Timer_getTriggerPointer ( IfxGtm_Tom_Timer * driver )

Returns the pointer to trigger channel.

Parameters
driver TOM Timer interface Handle
Returns
Pointer

Definition at line 180 of file IfxGtm_Tom_Timer.c.

◆ IfxGtm_Tom_Timer_init()

IFX_EXTERN boolean IfxGtm_Tom_Timer_init | ( | IfxGtm_Tom_Timer * | driver,
 |  | const IfxGtm_Tom_Timer_Config * | config
 | ) |  |

Initialises the timer object.

Parameters
driver | TOM Timer interface Handle
config | Configuration structure for TOM Timer
Returns
TRUE on success else FALSE

Definition at line 186 of file IfxGtm_Tom_Timer.c.

◆ IfxGtm_Tom_Timer_initConfig()

IFX_EXTERN void IfxGtm_Tom_Timer_initConfig | ( | IfxGtm_Tom_Timer_Config * | config,
 |  | Ifx_GTM * | gtm
 | ) |  |

Initializes the configuration structure to default.

Parameters
config | This parameter is Initialised by the function
gtm | Pointer to GTM module
Returns
None

Definition at line 369 of file IfxGtm_Tom_Timer.c.


iLLD_TC38A: Timer StdIf Functions

Functions
Timer StdIf Functions
iLLD » GTM » TOM Interface Drivers » TOM Timer Interface Driver
Collaboration diagram for Timer StdIf Functions:

Functions

IFX_EXTERN boolean | IfxGtm_Tom_Timer_acknowledgeTimerIrq (IfxGtm_Tom_Timer *driver)
Returns the timer event. More...
IFX_EXTERN boolean | IfxGtm_Tom_Timer_acknowledgeTriggerIrq (IfxGtm_Tom_Timer *driver)
Returns the trigger event. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_addToChannelMask (IfxGtm_Tom_Timer *driver, IfxGtm_Tom_Ch channel)
Add a channel to the channel mask Channels present in the mask are started, stopped, updated at the same time as the timer: IfxGtm_Tom_Timer_applyUpdate, IfxGtm_Tom_Timer_disableUpdate, IfxGtm_Tom_Timer_stop, IfxGtm_Tom_Timer_run. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_applyUpdate (IfxGtm_Tom_Timer *driver)
Enables the transfer of the shadow registers. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_disableUpdate (IfxGtm_Tom_Timer *driver)
Disables the upadte. More...
IFX_EXTERN float32 | IfxGtm_Tom_Timer_getFrequency (IfxGtm_Tom_Timer *driver)
Returns the frequency. More...
IFX_EXTERN float32 | IfxGtm_Tom_Timer_getInputFrequency (IfxGtm_Tom_Timer *driver)
Returns the Input frequncy. More...
IFX_EXTERN Ifx_TimerValue | IfxGtm_Tom_Timer_getPeriod (IfxGtm_Tom_Timer *driver)
Returns the period of the timer. More...
IFX_EXTERN float32 | IfxGtm_Tom_Timer_getResolution (IfxGtm_Tom_Timer *driver)
Returns the resolution. More...
IFX_EXTERN Ifx_TimerValue | IfxGtm_Tom_Timer_getTrigger (IfxGtm_Tom_Timer *driver)
Returns the trigger point. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_run (IfxGtm_Tom_Timer *driver)
Runs the timer. More...
IFX_EXTERN boolean | IfxGtm_Tom_Timer_setFrequency (IfxGtm_Tom_Timer *driver, float32 frequency)
Sets the frequency. More...
IFX_EXTERN boolean | IfxGtm_Tom_Timer_setPeriod (IfxGtm_Tom_Timer *driver, Ifx_TimerValue period)
Sets the period for the timer. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_setSingleMode (IfxGtm_Tom_Timer *driver, boolean enabled)
Sets the single shot mode of the timer. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_setTrigger (IfxGtm_Tom_Timer *driver, Ifx_TimerValue triggerPoint)
Sets the trigger. More...
IFX_EXTERN boolean | IfxGtm_Tom_Timer_stdIfTimerInit (IfxStdIf_Timer *stdif, IfxGtm_Tom_Timer *driver)
Initializes the standard interface timer. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_stop (IfxGtm_Tom_Timer *driver)
Stops the timer. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_updateInputFrequency (IfxGtm_Tom_Timer *driver)
Updates the input frequency. More...

Detailed Description

Function Documentation

◆ IfxGtm_Tom_Timer_acknowledgeTimerIrq()

IFX_EXTERN boolean IfxGtm_Tom_Timer_acknowledgeTimerIrq ( IfxGtm_Tom_Timer * driver )

Returns the timer event.

See also
IfxStdIf_Timer_AckTimerIrq
Parameters
driver TOM Timer interface Handle
Returns
Timer event

Definition at line 56 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_Timer_stdIfTimerInit().

◆ IfxGtm_Tom_Timer_acknowledgeTriggerIrq()

IFX_EXTERN boolean IfxGtm_Tom_Timer_acknowledgeTriggerIrq ( IfxGtm_Tom_Timer * driver )

Returns the trigger event.

See also
IfxStdIf_Timer_AckTriggerIrq
Parameters
driver TOM Timer interface Handle
Returns
Trigger event

Definition at line 73 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_Timer_stdIfTimerInit().

◆ IfxGtm_Tom_Timer_addToChannelMask()

IFX_EXTERN void IfxGtm_Tom_Timer_addToChannelMask | ( | IfxGtm_Tom_Timer * | driver,
 |  | IfxGtm_Tom_Ch | channel
 | ) |  |

Add a channel to the channel mask Channels present in the mask are started, stopped, updated at the same time as the timer: IfxGtm_Tom_Timer_applyUpdate, IfxGtm_Tom_Timer_disableUpdate, IfxGtm_Tom_Timer_stop, IfxGtm_Tom_Timer_run.

Parameters
driver | TOM Timer interface Handle
channel | Channel to ba added to the mask
Returns
None

Definition at line 90 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_Dtm_PwmHl_init(), IfxGtm_Tom_PwmHl_init(), and IfxGtm_Tom_Timer_init().

◆ IfxGtm_Tom_Timer_applyUpdate()

IFX_EXTERN void IfxGtm_Tom_Timer_applyUpdate ( IfxGtm_Tom_Timer * driver )

Enables the transfer of the shadow registers.

See also
IfxStdIf_Timer_ApplyUpdate Specific implementation: Enable the transfer of the shadow registers
Parameters
driver TOM Timer interface Handle
Returns
None

Definition at line 116 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_Timer_stdIfTimerInit().

◆ IfxGtm_Tom_Timer_disableUpdate()

IFX_EXTERN void IfxGtm_Tom_Timer_disableUpdate ( IfxGtm_Tom_Timer * driver )

Disables the upadte.

See also
IfxStdIf_Timer_DisableUpdate Specific implementation: Disable the transfer of the shadow registers
Parameters
driver TOM Timer interface Handle
Returns
None

Definition at line 127 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_Timer_stdIfTimerInit().

◆ IfxGtm_Tom_Timer_getFrequency()

IFX_EXTERN float32 IfxGtm_Tom_Timer_getFrequency ( IfxGtm_Tom_Timer * driver )

Returns the frequency.

See also
IfxStdIf_Timer_GetFrequency
Parameters
driver TOM Timer interface Handle
Returns
Frequency

Definition at line 138 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_Timer_stdIfTimerInit().

◆ IfxGtm_Tom_Timer_getInputFrequency()

IFX_EXTERN float32 IfxGtm_Tom_Timer_getInputFrequency ( IfxGtm_Tom_Timer * driver )

Returns the Input frequncy.

Parameters
driver TOM Timer interface Handle
Returns
Frequency

Definition at line 144 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_Timer_stdIfTimerInit().

◆ IfxGtm_Tom_Timer_getPeriod()

IFX_EXTERN Ifx_TimerValue IfxGtm_Tom_Timer_getPeriod ( IfxGtm_Tom_Timer * driver )

Returns the period of the timer.

See also
IfxStdIf_Timer_GetPeriod
Parameters
driver TOM Timer interface Handle
Returns
Period

Definition at line 156 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_Timer_stdIfTimerInit().

◆ IfxGtm_Tom_Timer_getResolution()

IFX_EXTERN float32 IfxGtm_Tom_Timer_getResolution ( IfxGtm_Tom_Timer * driver )

Returns the resolution.

See also
IfxStdIf_Timer_GetResolution
Parameters
driver TOM Timer interface Handle
Returns
Resolution

Definition at line 168 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_Timer_stdIfTimerInit().

◆ IfxGtm_Tom_Timer_getTrigger()

IFX_EXTERN Ifx_TimerValue IfxGtm_Tom_Timer_getTrigger ( IfxGtm_Tom_Timer * driver )

Returns the trigger point.

Parameters
driver TOM Timer interface Handle
Returns
Trigger point

Definition at line 174 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_Timer_stdIfTimerInit().

◆ IfxGtm_Tom_Timer_run()

IFX_EXTERN void IfxGtm_Tom_Timer_run ( IfxGtm_Tom_Timer * driver )

Runs the timer.

See also
IfxStdIf_Timer_Run
Parameters
driver TOM Timer interface Handle
Returns
None

Definition at line 386 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_Timer_stdIfTimerInit().

◆ IfxGtm_Tom_Timer_setFrequency()

IFX_EXTERN boolean IfxGtm_Tom_Timer_setFrequency | ( | IfxGtm_Tom_Timer * | driver,
 |  | float32 | frequency
 | ) |  |

Sets the frequency.

See also
IfxStdIf_Timer_SetFrequency
Parameters
driver | TOM Timer interface Handle
frequency | Frequency
Returns
TRUE on success else FALSE

Definition at line 397 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_Timer_init(), and IfxGtm_Tom_Timer_stdIfTimerInit().

◆ IfxGtm_Tom_Timer_setPeriod()

IFX_EXTERN boolean IfxGtm_Tom_Timer_setPeriod | ( | IfxGtm_Tom_Timer * | driver,
 |  | Ifx_TimerValue | period
 | ) |  |

Sets the period for the timer.

See also
IfxStdIf_Timer_SetPeriod
Parameters
driver | TOM Timer interface Handle
period | Period value
Returns
TRUE on success else FALSE

Definition at line 405 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_Timer_setFrequency(), and IfxGtm_Tom_Timer_stdIfTimerInit().

◆ IfxGtm_Tom_Timer_setSingleMode()

IFX_EXTERN void IfxGtm_Tom_Timer_setSingleMode | ( | IfxGtm_Tom_Timer * | driver,
 |  | boolean | enabled
 | ) |  |

Sets the single shot mode of the timer.

See also
IfxStdIf_Timer_SetSingleMode
Parameters
driver | TOM Timer interface Handle
enabled | If TRUE, sets the single shot mode
Returns
None

Definition at line 419 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_Timer_stdIfTimerInit().

◆ IfxGtm_Tom_Timer_setTrigger()

IFX_EXTERN void IfxGtm_Tom_Timer_setTrigger | ( | IfxGtm_Tom_Timer * | driver,
 |  | Ifx_TimerValue | triggerPoint
 | ) |  |

Sets the trigger.

See also
IfxStdIf_Timer_SetTrigger
Parameters
driver | TOM Timer interface Handle
triggerPoint | Trigger point value
Returns
None

Definition at line 425 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_Timer_init(), and IfxGtm_Tom_Timer_stdIfTimerInit().

◆ IfxGtm_Tom_Timer_stdIfTimerInit()

IFX_EXTERN boolean IfxGtm_Tom_Timer_stdIfTimerInit | ( | IfxStdIf_Timer * | stdif,
 |  | IfxGtm_Tom_Timer * | driver
 | ) |  |

Initializes the standard interface timer.

Parameters
stdif | Standard interface timer object, will be initialized by the function
driver | Interface driver to be used by the standard interface. must be initialised separately
Returns
TRUE on success else FALSE

Definition at line 431 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_Dtm_PwmHl_stdIfPwmHlInit(), and IfxGtm_Tom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_Timer_stop()

IFX_EXTERN void IfxGtm_Tom_Timer_stop ( IfxGtm_Tom_Timer * driver )

Stops the timer.

See also
IfxStdIf_Timer_Stop
Parameters
driver TOM Timer interface Handle
Returns
None

Definition at line 461 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_Timer_stdIfTimerInit().

◆ IfxGtm_Tom_Timer_updateInputFrequency()

IFX_EXTERN void IfxGtm_Tom_Timer_updateInputFrequency ( IfxGtm_Tom_Timer * driver )

Updates the input frequency.

See also
IfxStdIf_Timer_UpdateInputFrequency
Parameters
driver TOM Timer interface Handle
Returns
None

Definition at line 472 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_Timer_init(), and IfxGtm_Tom_Timer_stdIfTimerInit().


iLLD_TC38A: Tim Interface Drivers

Modules
Tim Interface Drivers
iLLD » GTM
Collaboration diagram for Tim Interface Drivers:

Modules

TIM Input Interface
TIM Timer Interface

Detailed Description


iLLD_TC38A: TIM Input Interface

Modules
TIM Input Interface
iLLD » GTM » Tim Interface Drivers
Collaboration diagram for TIM Input Interface:

Modules

Data Structures
Enumerations
Funtions

Detailed Description


iLLD_TC38A: Data Structures

Data Structures
Data Structures
iLLD » GTM » Tim Interface Drivers » TIM Input Interface
Collaboration diagram for Data Structures:

Data Structures

struct | IfxGtm_Tim_In_ConfigCapture
Configuration structure for TIM capture. More...
struct | IfxGtm_Tim_In_ConfigFilter
Configuration structure for TIM filter. More...
struct | IfxGtm_Tim_In_ConfigTimeout
Configuration structure for TIM timeout. More...
struct | IfxGtm_Tim_In
Driver Handle. More...
struct | IfxGtm_Tim_In_Config
Configuration structure for TIM input capture. More...

Detailed Description

Data Structure Documentation

◆ IfxGtm_Tim_In_ConfigCapture

struct IfxGtm_Tim_In_ConfigCapture

Configuration structure for TIM capture.

Definition at line 99 of file IfxGtm_Tim_In.h.

Data Fields
IfxGtm_Cmu_Clk | clock | Timer input clock.
boolean | irqOnCntOverflow | If TRUE, the interrupt on CNT overflow is enabled.
boolean | irqOnDatalost | If TRUE, the interrupt on data lost (GPR0, GPR1) is enabled.
boolean | irqOnEcntOverflow | If TRUE, the interrupt on ECNT (Edge counter) overflow is enabled.
boolean | irqOnNewVal | If TRUE, the interrupt on new value is enabled.
Ifx_Pwm_Mode | mode | PWM mode, only Ifx_Pwm_Mode_leftAligned and Ifx_Pwm_Mode_righAligned are supported.

◆ IfxGtm_Tim_In_ConfigFilter

struct IfxGtm_Tim_In_ConfigFilter

Configuration structure for TIM filter.

Definition at line 111 of file IfxGtm_Tim_In.h.

Collaboration diagram for IfxGtm_Tim_In_ConfigFilter:
[legend]
Data Fields
IfxGtm_Cmu_Tim_Filter_Clk | clock | Timeout clock.
float32 | fallingEdgeFilterTime | Falling edge filter time in second.
IfxGtm_Tim_In_ConfigFilterMode | fallingEdgeMode | Filter mode for falling edge.
IfxGtm_Tim_In_Input | input | selected input
IfxGtm_Tim_TinMap * | inputPin | If defined, this value overwrites the IfxGtm_Tim_In_Config.filter.input, IfxGtm_Tim_In_Config.timIndex, IfxGtm_Tim_In_Config.channelIndex.
IfxPort_InputMode | inputPinMode | Input pin mode.
boolean | irqOnGlitch | If TRUE, the interrupt on glitch is enabled.
float32 | risingEdgeFilterTime | Rising edge filter time in second.
IfxGtm_Tim_In_ConfigFilterMode | risingEdgeMode | Filter mode for rising edge.

◆ IfxGtm_Tim_In_ConfigTimeout

struct IfxGtm_Tim_In_ConfigTimeout

Configuration structure for TIM timeout.

Definition at line 126 of file IfxGtm_Tim_In.h.

Data Fields
IfxGtm_Cmu_Clk | clock | Timeout clock.
boolean | irqOnTimeout | If TRUE, the interrupt on timeout is enabled.
float32 | timeout | Timeout in second. Value of 0 disable the timeout functionality see 27.10.3 Timeout Detection Unit (TDU)

◆ IfxGtm_Tim_In

struct IfxGtm_Tim_In

Driver Handle.

Definition at line 139 of file IfxGtm_Tim_In.h.

Data Fields
float32 | captureClockFrequency | Capture clock frequency in Hz.
Ifx_GTM_TIM_CH * | channel | TIM channel used.
IfxGtm_Tim_Ch | channelIndex | Index of the TIM channel being used.
boolean | dataCoherent | TRUE, if the duty and period values are measured from the same period.
boolean | dataLost | TRUE if data are lost.
uint16 | edgeCount | number of edges counted.
uint32 | edgeCounterUpper | upper part of the edge counter
boolean | glitch | TRUE if glitch is detected.
boolean | newData | TRUE when values are updated, and if none of the counter CNT, CNTS have overflowed.
boolean | overflowCnt | TRUE if the last measurement show an overflow in CNT.
uint32 | periodTick | Period value in clock ticks.
uint32 | pulseLengthTick | Duty value in clock ticks.
IfxGtm_Tim | timIndex | Index of the TIM module being used.

◆ IfxGtm_Tim_In_Config

struct IfxGtm_Tim_In_Config

Configuration structure for TIM input capture.

Definition at line 158 of file IfxGtm_Tim_In.h.

Collaboration diagram for IfxGtm_Tim_In_Config:
[legend]
Data Fields
IfxGtm_Tim_In_ConfigCapture | capture | Capture configuration.
IfxGtm_Tim_Ch | channelIndex | Channel index.
IfxGtm_Tim_In_ConfigFilter | filter | Filter configuration.
Ifx_GTM * | gtm | GTM used.
IfxGtm_IrqMode | irqMode | Interrupt mode for the new value available.
Ifx_Priority | isrPriority | Set the interrupt priority for new value available. If 0, no interrupt will be generated.
IfxSrc_Tos | isrProvider | Interrupt service provider for the timer interrupt.
IfxGtm_Tim_In_ConfigTimeout | timeout | Timeout configuration.
IfxGtm_Tim | timIndex | TIM index.


iLLD_TC38A: Enumerations

Enumerations
Enumerations
iLLD » GTM » Tim Interface Drivers » TIM Input Interface
Collaboration diagram for Enumerations:

Enumerations

enum IfxGtm_Tim_In_ConfigFilterMode {
IfxGtm_Tim_In_ConfigFilterMode_immediateEdgePropagation,
IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeUpDown,
IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeHold,
IfxGtm_Tim_In_ConfigFilterMode_none
}
Config Filter Mode. More...
enum IfxGtm_Tim_In_Input {
IfxGtm_Tim_In_Input_currentChannel,
IfxGtm_Tim_In_Input_adjacentChannel,
IfxGtm_Tim_In_Input_aux
}
Input Source. More...

Detailed Description

Enumeration Type Documentation

◆ IfxGtm_Tim_In_ConfigFilterMode

enum IfxGtm_Tim_In_ConfigFilterMode

Config Filter Mode.

Enumerator
IfxGtm_Tim_In_ConfigFilterMode_immediateEdgePropagation | Immediate edge propagation mode.
IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeUpDown | Individual deglitch time mode (Up Down)
IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeHold | Individual deglitch time mode (Hold)
IfxGtm_Tim_In_ConfigFilterMode_none | No filter.

Definition at line 72 of file IfxGtm_Tim_In.h.

◆ IfxGtm_Tim_In_Input

enum IfxGtm_Tim_In_Input

Input Source.

Enumerator
IfxGtm_Tim_In_Input_currentChannel | Use the input from the current channel.
IfxGtm_Tim_In_Input_adjacentChannel | Use the input from the adjacent channel.
IfxGtm_Tim_In_Input_aux | Use the input from the aux.

Definition at line 82 of file IfxGtm_Tim_In.h.


iLLD_TC38A: Funtions

Functions
Funtions
iLLD » GTM » Tim Interface Drivers » TIM Input Interface
Collaboration diagram for Funtions:

Functions

IFX_INLINE void | IfxGtm_Tim_In_clearNewData (IfxGtm_Tim_In *driver)
Clear the new data flag. More...
IFX_INLINE float32 | IfxGtm_Tim_In_getDutyPercent (IfxGtm_Tim_In *driver, boolean *dataCoherent)
return the dutycycle in percent More...
IFX_INLINE float32 | IfxGtm_Tim_In_getPeriodSecond (IfxGtm_Tim_In *driver)
Return the period in second. More...
IFX_INLINE sint32 | IfxGtm_Tim_In_getPeriodTicks (IfxGtm_Tim_In *driver)
Return the period value in tick. More...
IFX_INLINE sint32 | IfxGtm_Tim_In_getPulseLengthTick (IfxGtm_Tim_In *driver)
Return the pulse length value in tick. More...
IFX_INLINE boolean | IfxGtm_Tim_In_isDataLost (IfxGtm_Tim_In *driver)
Indicates if data were lost. More...
IFX_INLINE boolean | IfxGtm_Tim_In_isNewData (IfxGtm_Tim_In *driver)
Indicates if new data are present (new data flag) More...
IFX_EXTERN boolean | IfxGtm_Tim_In_init (IfxGtm_Tim_In *driver, const IfxGtm_Tim_In_Config *config)
Initializes the input capture object. More...
IFX_EXTERN void | IfxGtm_Tim_In_initConfig (IfxGtm_Tim_In_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default. More...
IFX_EXTERN void | IfxGtm_Tim_In_onIsr (IfxGtm_Tim_In *driver)
will update the driver state
To be called in the interrupt generated by the IfxGtm_Tim_In driver More...
IFX_EXTERN void | IfxGtm_Tim_In_update (IfxGtm_Tim_In *driver)
Updates the period and duty cycle. More...

Detailed Description

Function Documentation

◆ IfxGtm_Tim_In_clearNewData()

IFX_INLINE void IfxGtm_Tim_In_clearNewData ( IfxGtm_Tim_In * driver )

Clear the new data flag.

Parameters
driver TIM Input object
Returns
None

Definition at line 260 of file IfxGtm_Tim_In.h.

◆ IfxGtm_Tim_In_getDutyPercent()

IFX_INLINE float32 IfxGtm_Tim_In_getDutyPercent | ( | IfxGtm_Tim_In * | driver,
 |  | boolean * | dataCoherent
 | ) |  |

return the dutycycle in percent

Parameters
driver | TIM Input object
dataCoherent | If true, the duty cycle has been calculated with coherent values for the period and duty, else the period and duty value are from 2 adjacent periods
Returns
duty

Definition at line 266 of file IfxGtm_Tim_In.h.

◆ IfxGtm_Tim_In_getPeriodSecond()

IFX_INLINE float32 IfxGtm_Tim_In_getPeriodSecond ( IfxGtm_Tim_In * driver )

Return the period in second.

Parameters
driver TIM Input object
Returns
period value in seconds

Definition at line 278 of file IfxGtm_Tim_In.h.

◆ IfxGtm_Tim_In_getPeriodTicks()

IFX_INLINE sint32 IfxGtm_Tim_In_getPeriodTicks ( IfxGtm_Tim_In * driver )

Return the period value in tick.

Parameters
driver TIM Input object
Returns
period value in ticks

Definition at line 284 of file IfxGtm_Tim_In.h.

Referenced by IfxGtm_Tim_In_getPeriodSecond().

◆ IfxGtm_Tim_In_getPulseLengthTick()

IFX_INLINE sint32 IfxGtm_Tim_In_getPulseLengthTick ( IfxGtm_Tim_In * driver )

Return the pulse length value in tick.

Parameters
driver TIM Input object
Returns
pulse length

Definition at line 290 of file IfxGtm_Tim_In.h.

◆ IfxGtm_Tim_In_init()

IFX_EXTERN boolean IfxGtm_Tim_In_init | ( | IfxGtm_Tim_In * | driver,
 |  | const IfxGtm_Tim_In_Config * | config
 | ) |  |

Initializes the input capture object.

Parameters
driver | TIM Input object
config | Configuration structure for the input capture Timer
Returns
TRUE on success else FALSE

Definition at line 54 of file IfxGtm_Tim_In.c.

◆ IfxGtm_Tim_In_initConfig()

IFX_EXTERN void IfxGtm_Tim_In_initConfig | ( | IfxGtm_Tim_In_Config * | config,
 |  | Ifx_GTM * | gtm
 | ) |  |

Initializes the configuration structure to default.

Parameters
config | Configuration structure for the input capture Timer
gtm | Pointer to GTM module
Returns
None

Definition at line 254 of file IfxGtm_Tim_In.c.

◆ IfxGtm_Tim_In_isDataLost()

IFX_INLINE boolean IfxGtm_Tim_In_isDataLost ( IfxGtm_Tim_In * driver )

Indicates if data were lost.

Parameters
driver TIM Input object
Returns
TRUE if Data is lost FALSE otherwise

Definition at line 296 of file IfxGtm_Tim_In.h.

◆ IfxGtm_Tim_In_isNewData()

IFX_INLINE boolean IfxGtm_Tim_In_isNewData ( IfxGtm_Tim_In * driver )

Indicates if new data are present (new data flag)

Parameters
driver TIM Input object
Returns
TRUE if New Data FALSE otherwise

Definition at line 302 of file IfxGtm_Tim_In.h.

◆ IfxGtm_Tim_In_onIsr()

IFX_EXTERN void IfxGtm_Tim_In_onIsr ( IfxGtm_Tim_In * driver )

will update the driver state
To be called in the interrupt generated by the IfxGtm_Tim_In driver

Parameters
driver TIM Input object
Returns
None

Definition at line 284 of file IfxGtm_Tim_In.c.

◆ IfxGtm_Tim_In_update()

IFX_EXTERN void IfxGtm_Tim_In_update ( IfxGtm_Tim_In * driver )

Updates the period and duty cycle.

Parameters
driver TIM Input object
Returns
None

Definition at line 290 of file IfxGtm_Tim_In.c.

Referenced by IfxGtm_Tim_In_onIsr().


iLLD_TC38A: TIM Timer Interface

TIM Timer Interface
iLLD » GTM » Tim Interface Drivers
Collaboration diagram for TIM Timer Interface:


iLLD_TC38A: GTM Pin Mapping

Data Structures | Typedefs | Enumerations | Functions | Variables

GTM Pin Mapping
iLLD » GTM

Collaboration diagram for GTM Pin Mapping:

Data Structures

struct

IfxGtm_Tim_TinMap

TIN pin mapping structure. More...

struct

IfxGtm_Atom_ToutMap

ATOM TOUT pin mapping structure. More...

struct

IfxGtm_Tom_ToutMap

TOM TOUT pin mapping structure. More...

struct

IfxGtm_Clk_Out

GTM Clock Output. More...

Typedefs

typedef IfxGtm_Atom_ToutMap *

IfxGtm_Atom_ToutMapP

Pointer to IfxGtm_Atom_ToutMap. More...

typedef IfxGtm_Tom_ToutMap *

IfxGtm_Tom_ToutMapP

Pointer to IfxGtm_Tom_ToutMap. More...

Enumerations

enum

IfxGtm_ChXSel {
IfxGtm_ChXSel_a,
IfxGtm_ChXSel_b,
IfxGtm_ChXSel_c,
IfxGtm_ChXSel_d,
IfxGtm_ChXSel_e,
IfxGtm_ChXSel_f,
IfxGtm_ChXSel_g,
IfxGtm_ChXSel_h,
IfxGtm_ChXSel_i,
IfxGtm_ChXSel_j,
IfxGtm_ChXSel_k,
IfxGtm_ChXSel_l,
IfxGtm_ChXSel_m,
IfxGtm_ChXSel_n,
IfxGtm_ChXSel_o,
IfxGtm_ChXSel_p
}

CHxSEL register control code. More...

enum

IfxGtm_ToutSel {
IfxGtm_ToutSel_a,
IfxGtm_ToutSel_b,
IfxGtm_ToutSel_c,
IfxGtm_ToutSel_d,
IfxGtm_ToutSel_e,
IfxGtm_ToutSel_f,
IfxGtm_ToutSel_g,
IfxGtm_ToutSel_h,
IfxGtm_ToutSel_i,
IfxGtm_ToutSel_j,
IfxGtm_ToutSel_k,
IfxGtm_ToutSel_l
}

TOUTSEL register control code. More...

Functions

IFX_EXTERN void

IfxGtm_PinMap_setTimTin (IfxGtm_Tim_TinMap *config, IfxPort_InputMode inputMode)

IFX_EXTERN void

IfxGtm_PinMap_setAtomTout (IfxGtm_Atom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)

IFX_EXTERN void

IfxGtm_PinMap_setTomTout (IfxGtm_Tom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)

Variables

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_0N_TOUT112_P01_4_OUT

IfxGtm_ATOM0_0N_TOUT112_P01_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_0N_TOUT17_P00_8_OUT

IfxGtm_ATOM0_0N_TOUT17_P00_8_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_0N_TOUT43_P23_2_OUT

IfxGtm_ATOM0_0N_TOUT43_P23_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_0N_TOUT54_P21_3_OUT

IfxGtm_ATOM0_0N_TOUT54_P21_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_0N_TOUT7_P02_7_OUT

IfxGtm_ATOM0_0N_TOUT7_P02_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_0_TOUT0_P02_0_OUT

IfxGtm_ATOM0_0_TOUT0_P02_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_0_TOUT48_P22_1_OUT

IfxGtm_ATOM0_0_TOUT48_P22_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_0_TOUT53_P21_2_OUT

IfxGtm_ATOM0_0_TOUT53_P21_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_0_TOUT85_P14_5_OUT

IfxGtm_ATOM0_0_TOUT85_P14_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_0_TOUT8_P02_8_OUT

IfxGtm_ATOM0_0_TOUT8_P02_8_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_0_TOUT9_P00_0_OUT

IfxGtm_ATOM0_0_TOUT9_P00_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_1N_TOUT113_P01_5_OUT

IfxGtm_ATOM0_1N_TOUT113_P01_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_1N_TOUT14_P00_5_OUT

IfxGtm_ATOM0_1N_TOUT14_P00_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_1N_TOUT39_P32_3_OUT

IfxGtm_ATOM0_1N_TOUT39_P32_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_1N_TOUT41_P23_0_OUT

IfxGtm_ATOM0_1N_TOUT41_P23_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_1N_TOUT4_P02_4_OUT

IfxGtm_ATOM0_1N_TOUT4_P02_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_1N_TOUT50_P22_3_OUT

IfxGtm_ATOM0_1N_TOUT50_P22_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_1N_TOUT53_P21_2_OUT

IfxGtm_ATOM0_1N_TOUT53_P21_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_1N_TOUT55_P21_4_OUT

IfxGtm_ATOM0_1N_TOUT55_P21_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_1N_TOUT57_P21_6_OUT

IfxGtm_ATOM0_1N_TOUT57_P21_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_1N_TOUT61_P20_3_OUT

IfxGtm_ATOM0_1N_TOUT61_P20_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_1_TOUT10_P00_1_OUT

IfxGtm_ATOM0_1_TOUT10_P00_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_1_TOUT116_P02_9_OUT

IfxGtm_ATOM0_1_TOUT116_P02_9_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_1_TOUT11_P00_2_OUT

IfxGtm_ATOM0_1_TOUT11_P00_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_1_TOUT1_P02_1_OUT

IfxGtm_ATOM0_1_TOUT1_P02_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_1_TOUT31_P33_9_OUT

IfxGtm_ATOM0_1_TOUT31_P33_9_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_1_TOUT47_P22_0_OUT

IfxGtm_ATOM0_1_TOUT47_P22_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_1_TOUT54_P21_3_OUT

IfxGtm_ATOM0_1_TOUT54_P21_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_1_TOUT84_P14_4_OUT

IfxGtm_ATOM0_1_TOUT84_P14_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_2N_TOUT114_P01_6_OUT

IfxGtm_ATOM0_2N_TOUT114_P01_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_2N_TOUT15_P00_6_OUT

IfxGtm_ATOM0_2N_TOUT15_P00_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_2N_TOUT23_P33_1_OUT

IfxGtm_ATOM0_2N_TOUT23_P33_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_2N_TOUT40_P32_4_OUT

IfxGtm_ATOM0_2N_TOUT40_P32_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_2N_TOUT41_P23_0_OUT

IfxGtm_ATOM0_2N_TOUT41_P23_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_2N_TOUT44_P23_3_OUT

IfxGtm_ATOM0_2N_TOUT44_P23_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_2N_TOUT56_P21_5_OUT

IfxGtm_ATOM0_2N_TOUT56_P21_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_2N_TOUT58_P21_7_OUT

IfxGtm_ATOM0_2N_TOUT58_P21_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_2N_TOUT5_P02_5_OUT

IfxGtm_ATOM0_2N_TOUT5_P02_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_2N_TOUT65_P20_9_OUT

IfxGtm_ATOM0_2N_TOUT65_P20_9_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_2_TOUT117_P02_10_OUT

IfxGtm_ATOM0_2_TOUT117_P02_10_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_2_TOUT12_P00_3_OUT

IfxGtm_ATOM0_2_TOUT12_P00_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_2_TOUT2_P02_2_OUT

IfxGtm_ATOM0_2_TOUT2_P02_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_2_TOUT33_P33_11_OUT

IfxGtm_ATOM0_2_TOUT33_P33_11_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_2_TOUT42_P23_1_OUT

IfxGtm_ATOM0_2_TOUT42_P23_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_2_TOUT46_P23_5_OUT

IfxGtm_ATOM0_2_TOUT46_P23_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_2_TOUT55_P21_4_OUT

IfxGtm_ATOM0_2_TOUT55_P21_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_2_TOUT83_P14_3_OUT

IfxGtm_ATOM0_2_TOUT83_P14_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_3N_TOUT115_P01_7_OUT

IfxGtm_ATOM0_3N_TOUT115_P01_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_3N_TOUT16_P00_7_OUT

IfxGtm_ATOM0_3N_TOUT16_P00_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_3N_TOUT24_P33_2_OUT

IfxGtm_ATOM0_3N_TOUT24_P33_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_3N_TOUT42_P23_1_OUT

IfxGtm_ATOM0_3N_TOUT42_P23_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_3N_TOUT45_P23_4_OUT

IfxGtm_ATOM0_3N_TOUT45_P23_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_3N_TOUT59_P20_0_OUT

IfxGtm_ATOM0_3N_TOUT59_P20_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_3N_TOUT66_P20_10_OUT

IfxGtm_ATOM0_3N_TOUT66_P20_10_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_3N_TOUT6_P02_6_OUT

IfxGtm_ATOM0_3N_TOUT6_P02_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_3_TOUT118_P02_11_OUT

IfxGtm_ATOM0_3_TOUT118_P02_11_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_3_TOUT13_P00_4_OUT

IfxGtm_ATOM0_3_TOUT13_P00_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_3_TOUT38_P32_2_OUT

IfxGtm_ATOM0_3_TOUT38_P32_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_3_TOUT3_P02_3_OUT

IfxGtm_ATOM0_3_TOUT3_P02_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_3_TOUT49_P22_2_OUT

IfxGtm_ATOM0_3_TOUT49_P22_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_3_TOUT56_P21_5_OUT

IfxGtm_ATOM0_3_TOUT56_P21_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_3_TOUT60_P20_1_OUT

IfxGtm_ATOM0_3_TOUT60_P20_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_3_TOUT82_P14_2_OUT

IfxGtm_ATOM0_3_TOUT82_P14_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_4N_TOUT118_P02_11_OUT

IfxGtm_ATOM0_4N_TOUT118_P02_11_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_4N_TOUT135_P22_9_OUT

IfxGtm_ATOM0_4N_TOUT135_P22_9_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_4N_TOUT13_P00_4_OUT

IfxGtm_ATOM0_4N_TOUT13_P00_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_4N_TOUT147_P34_2_OUT

IfxGtm_ATOM0_4N_TOUT147_P34_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_4N_TOUT3_P02_3_OUT

IfxGtm_ATOM0_4N_TOUT3_P02_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_4_TOUT146_P34_1_OUT

IfxGtm_ATOM0_4_TOUT146_P34_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_4_TOUT14_P00_5_OUT

IfxGtm_ATOM0_4_TOUT14_P00_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_4_TOUT29_P33_7_OUT

IfxGtm_ATOM0_4_TOUT29_P33_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_4_TOUT39_P32_3_OUT

IfxGtm_ATOM0_4_TOUT39_P32_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_4_TOUT4_P02_4_OUT

IfxGtm_ATOM0_4_TOUT4_P02_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_4_TOUT50_P22_3_OUT

IfxGtm_ATOM0_4_TOUT50_P22_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_4_TOUT57_P21_6_OUT

IfxGtm_ATOM0_4_TOUT57_P21_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_4_TOUT61_P20_3_OUT

IfxGtm_ATOM0_4_TOUT61_P20_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_4_TOUT81_P14_1_OUT

IfxGtm_ATOM0_4_TOUT81_P14_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_5N_TOUT0_P02_0_OUT

IfxGtm_ATOM0_5N_TOUT0_P02_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_5N_TOUT136_P22_10_OUT

IfxGtm_ATOM0_5N_TOUT136_P22_10_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_5N_TOUT148_P34_3_OUT

IfxGtm_ATOM0_5N_TOUT148_P34_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_5N_TOUT26_P33_4_OUT

IfxGtm_ATOM0_5N_TOUT26_P33_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_5N_TOUT8_P02_8_OUT

IfxGtm_ATOM0_5N_TOUT8_P02_8_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_5N_TOUT9_P00_0_OUT

IfxGtm_ATOM0_5N_TOUT9_P00_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_5_TOUT15_P00_6_OUT

IfxGtm_ATOM0_5_TOUT15_P00_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_5_TOUT23_P33_1_OUT

IfxGtm_ATOM0_5_TOUT23_P33_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_5_TOUT40_P32_4_OUT

IfxGtm_ATOM0_5_TOUT40_P32_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_5_TOUT41_P23_0_OUT

IfxGtm_ATOM0_5_TOUT41_P23_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_5_TOUT58_P21_7_OUT

IfxGtm_ATOM0_5_TOUT58_P21_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_5_TOUT5_P02_5_OUT

IfxGtm_ATOM0_5_TOUT5_P02_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_6N_TOUT10_P00_1_OUT

IfxGtm_ATOM0_6N_TOUT10_P00_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_6N_TOUT116_P02_9_OUT

IfxGtm_ATOM0_6N_TOUT116_P02_9_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_6N_TOUT11_P00_2_OUT

IfxGtm_ATOM0_6N_TOUT11_P00_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_6N_TOUT137_P22_11_OUT

IfxGtm_ATOM0_6N_TOUT137_P22_11_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_6N_TOUT149_P34_4_OUT

IfxGtm_ATOM0_6N_TOUT149_P34_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_6N_TOUT1_P02_1_OUT

IfxGtm_ATOM0_6N_TOUT1_P02_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_6N_TOUT27_P33_5_OUT

IfxGtm_ATOM0_6N_TOUT27_P33_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_6_TOUT106_P10_4_OUT

IfxGtm_ATOM0_6_TOUT106_P10_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_6_TOUT16_P00_7_OUT

IfxGtm_ATOM0_6_TOUT16_P00_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_6_TOUT24_P33_2_OUT

IfxGtm_ATOM0_6_TOUT24_P33_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_6_TOUT42_P23_1_OUT

IfxGtm_ATOM0_6_TOUT42_P23_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_6_TOUT59_P20_0_OUT

IfxGtm_ATOM0_6_TOUT59_P20_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_6_TOUT6_P02_6_OUT

IfxGtm_ATOM0_6_TOUT6_P02_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_7N_TOUT117_P02_10_OUT

IfxGtm_ATOM0_7N_TOUT117_P02_10_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_7N_TOUT12_P00_3_OUT

IfxGtm_ATOM0_7N_TOUT12_P00_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_7N_TOUT150_P34_5_OUT

IfxGtm_ATOM0_7N_TOUT150_P34_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_7N_TOUT28_P33_6_OUT

IfxGtm_ATOM0_7N_TOUT28_P33_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_7N_TOUT2_P02_2_OUT

IfxGtm_ATOM0_7N_TOUT2_P02_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_7_TOUT17_P00_8_OUT

IfxGtm_ATOM0_7_TOUT17_P00_8_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_7_TOUT25_P33_3_OUT

IfxGtm_ATOM0_7_TOUT25_P33_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_7_TOUT45_P23_4_OUT

IfxGtm_ATOM0_7_TOUT45_P23_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_7_TOUT64_P20_8_OUT

IfxGtm_ATOM0_7_TOUT64_P20_8_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_7_TOUT7_P02_7_OUT

IfxGtm_ATOM0_7_TOUT7_P02_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_0N_TOUT112_P01_4_OUT

IfxGtm_ATOM1_0N_TOUT112_P01_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_0N_TOUT17_P00_8_OUT

IfxGtm_ATOM1_0N_TOUT17_P00_8_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_0N_TOUT7_P02_7_OUT

IfxGtm_ATOM1_0N_TOUT7_P02_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_0_TOUT0_P02_0_OUT

IfxGtm_ATOM1_0_TOUT0_P02_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_0_TOUT109_P10_7_OUT

IfxGtm_ATOM1_0_TOUT109_P10_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_0_TOUT68_P20_12_OUT

IfxGtm_ATOM1_0_TOUT68_P20_12_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_0_TOUT76_P15_5_OUT

IfxGtm_ATOM1_0_TOUT76_P15_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_0_TOUT77_P15_6_OUT

IfxGtm_ATOM1_0_TOUT77_P15_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_0_TOUT87_P14_7_OUT

IfxGtm_ATOM1_0_TOUT87_P14_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_0_TOUT8_P02_8_OUT

IfxGtm_ATOM1_0_TOUT8_P02_8_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_0_TOUT9_P00_0_OUT

IfxGtm_ATOM1_0_TOUT9_P00_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_1N_TOUT102_P10_0_OUT

IfxGtm_ATOM1_1N_TOUT102_P10_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_1N_TOUT113_P01_5_OUT

IfxGtm_ATOM1_1N_TOUT113_P01_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_1N_TOUT14_P00_5_OUT

IfxGtm_ATOM1_1N_TOUT14_P00_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_1N_TOUT39_P32_3_OUT

IfxGtm_ATOM1_1N_TOUT39_P32_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_1N_TOUT4_P02_4_OUT

IfxGtm_ATOM1_1N_TOUT4_P02_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_1N_TOUT61_P20_3_OUT

IfxGtm_ATOM1_1N_TOUT61_P20_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_1N_TOUT72_P15_1_OUT

IfxGtm_ATOM1_1N_TOUT72_P15_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_1_TOUT103_P10_1_OUT

IfxGtm_ATOM1_1_TOUT103_P10_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_1_TOUT10_P00_1_OUT

IfxGtm_ATOM1_1_TOUT10_P00_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_1_TOUT116_P02_9_OUT

IfxGtm_ATOM1_1_TOUT116_P02_9_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_1_TOUT11_P00_2_OUT

IfxGtm_ATOM1_1_TOUT11_P00_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_1_TOUT1_P02_1_OUT

IfxGtm_ATOM1_1_TOUT1_P02_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_1_TOUT31_P33_9_OUT

IfxGtm_ATOM1_1_TOUT31_P33_9_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_1_TOUT69_P20_13_OUT

IfxGtm_ATOM1_1_TOUT69_P20_13_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_1_TOUT78_P15_7_OUT

IfxGtm_ATOM1_1_TOUT78_P15_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_1_TOUT79_P15_8_OUT

IfxGtm_ATOM1_1_TOUT79_P15_8_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_1_TOUT86_P14_6_OUT

IfxGtm_ATOM1_1_TOUT86_P14_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_2N_TOUT110_P10_8_OUT

IfxGtm_ATOM1_2N_TOUT110_P10_8_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_2N_TOUT114_P01_6_OUT

IfxGtm_ATOM1_2N_TOUT114_P01_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_2N_TOUT15_P00_6_OUT

IfxGtm_ATOM1_2N_TOUT15_P00_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_2N_TOUT23_P33_1_OUT

IfxGtm_ATOM1_2N_TOUT23_P33_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_2N_TOUT40_P32_4_OUT

IfxGtm_ATOM1_2N_TOUT40_P32_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_2N_TOUT41_P23_0_OUT

IfxGtm_ATOM1_2N_TOUT41_P23_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_2N_TOUT5_P02_5_OUT

IfxGtm_ATOM1_2N_TOUT5_P02_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_2N_TOUT73_P15_2_OUT

IfxGtm_ATOM1_2N_TOUT73_P15_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_2_TOUT104_P10_2_OUT

IfxGtm_ATOM1_2_TOUT104_P10_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_2_TOUT107_P10_5_OUT

IfxGtm_ATOM1_2_TOUT107_P10_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_2_TOUT117_P02_10_OUT

IfxGtm_ATOM1_2_TOUT117_P02_10_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_2_TOUT12_P00_3_OUT

IfxGtm_ATOM1_2_TOUT12_P00_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_2_TOUT2_P02_2_OUT

IfxGtm_ATOM1_2_TOUT2_P02_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_2_TOUT33_P33_11_OUT

IfxGtm_ATOM1_2_TOUT33_P33_11_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_2_TOUT70_P20_14_OUT

IfxGtm_ATOM1_2_TOUT70_P20_14_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_2_TOUT80_P14_0_OUT

IfxGtm_ATOM1_2_TOUT80_P14_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_3N_TOUT106_P10_4_OUT

IfxGtm_ATOM1_3N_TOUT106_P10_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_3N_TOUT115_P01_7_OUT

IfxGtm_ATOM1_3N_TOUT115_P01_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_3N_TOUT16_P00_7_OUT

IfxGtm_ATOM1_3N_TOUT16_P00_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_3N_TOUT24_P33_2_OUT

IfxGtm_ATOM1_3N_TOUT24_P33_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_3N_TOUT42_P23_1_OUT

IfxGtm_ATOM1_3N_TOUT42_P23_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_3N_TOUT6_P02_6_OUT

IfxGtm_ATOM1_3N_TOUT6_P02_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_3N_TOUT74_P15_3_OUT

IfxGtm_ATOM1_3N_TOUT74_P15_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_3_TOUT105_P10_3_OUT

IfxGtm_ATOM1_3_TOUT105_P10_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_3_TOUT108_P10_6_OUT

IfxGtm_ATOM1_3_TOUT108_P10_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_3_TOUT118_P02_11_OUT

IfxGtm_ATOM1_3_TOUT118_P02_11_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_3_TOUT13_P00_4_OUT

IfxGtm_ATOM1_3_TOUT13_P00_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_3_TOUT38_P32_2_OUT

IfxGtm_ATOM1_3_TOUT38_P32_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_3_TOUT3_P02_3_OUT

IfxGtm_ATOM1_3_TOUT3_P02_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_3_TOUT60_P20_1_OUT

IfxGtm_ATOM1_3_TOUT60_P20_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_3_TOUT71_P15_0_OUT

IfxGtm_ATOM1_3_TOUT71_P15_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_4N_TOUT105_P10_3_OUT

IfxGtm_ATOM1_4N_TOUT105_P10_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_4N_TOUT108_P10_6_OUT

IfxGtm_ATOM1_4N_TOUT108_P10_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_4N_TOUT118_P02_11_OUT

IfxGtm_ATOM1_4N_TOUT118_P02_11_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_4N_TOUT131_P22_5_OUT

IfxGtm_ATOM1_4N_TOUT131_P22_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_4N_TOUT13_P00_4_OUT

IfxGtm_ATOM1_4N_TOUT13_P00_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_4N_TOUT147_P34_2_OUT

IfxGtm_ATOM1_4N_TOUT147_P34_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_4N_TOUT3_P02_3_OUT

IfxGtm_ATOM1_4N_TOUT3_P02_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_4N_TOUT71_P15_0_OUT

IfxGtm_ATOM1_4N_TOUT71_P15_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_4N_TOUT75_P15_4_OUT

IfxGtm_ATOM1_4N_TOUT75_P15_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_4_TOUT102_P10_0_OUT

IfxGtm_ATOM1_4_TOUT102_P10_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_4_TOUT130_P22_4_OUT

IfxGtm_ATOM1_4_TOUT130_P22_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_4_TOUT146_P34_1_OUT

IfxGtm_ATOM1_4_TOUT146_P34_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_4_TOUT14_P00_5_OUT

IfxGtm_ATOM1_4_TOUT14_P00_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_4_TOUT29_P33_7_OUT

IfxGtm_ATOM1_4_TOUT29_P33_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_4_TOUT39_P32_3_OUT

IfxGtm_ATOM1_4_TOUT39_P32_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_4_TOUT4_P02_4_OUT

IfxGtm_ATOM1_4_TOUT4_P02_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_4_TOUT61_P20_3_OUT

IfxGtm_ATOM1_4_TOUT61_P20_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_4_TOUT72_P15_1_OUT

IfxGtm_ATOM1_4_TOUT72_P15_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_5N_TOUT0_P02_0_OUT

IfxGtm_ATOM1_5N_TOUT0_P02_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_5N_TOUT109_P10_7_OUT

IfxGtm_ATOM1_5N_TOUT109_P10_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_5N_TOUT132_P22_6_OUT

IfxGtm_ATOM1_5N_TOUT132_P22_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_5N_TOUT148_P34_3_OUT

IfxGtm_ATOM1_5N_TOUT148_P34_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_5N_TOUT26_P33_4_OUT

IfxGtm_ATOM1_5N_TOUT26_P33_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_5N_TOUT76_P15_5_OUT

IfxGtm_ATOM1_5N_TOUT76_P15_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_5N_TOUT77_P15_6_OUT

IfxGtm_ATOM1_5N_TOUT77_P15_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_5N_TOUT8_P02_8_OUT

IfxGtm_ATOM1_5N_TOUT8_P02_8_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_5N_TOUT9_P00_0_OUT

IfxGtm_ATOM1_5N_TOUT9_P00_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_5_TOUT110_P10_8_OUT

IfxGtm_ATOM1_5_TOUT110_P10_8_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_5_TOUT15_P00_6_OUT

IfxGtm_ATOM1_5_TOUT15_P00_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_5_TOUT23_P33_1_OUT

IfxGtm_ATOM1_5_TOUT23_P33_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_5_TOUT40_P32_4_OUT

IfxGtm_ATOM1_5_TOUT40_P32_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_5_TOUT41_P23_0_OUT

IfxGtm_ATOM1_5_TOUT41_P23_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_5_TOUT5_P02_5_OUT

IfxGtm_ATOM1_5_TOUT5_P02_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_5_TOUT65_P20_9_OUT

IfxGtm_ATOM1_5_TOUT65_P20_9_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_5_TOUT73_P15_2_OUT

IfxGtm_ATOM1_5_TOUT73_P15_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_6N_TOUT103_P10_1_OUT

IfxGtm_ATOM1_6N_TOUT103_P10_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_6N_TOUT10_P00_1_OUT

IfxGtm_ATOM1_6N_TOUT10_P00_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_6N_TOUT116_P02_9_OUT

IfxGtm_ATOM1_6N_TOUT116_P02_9_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_6N_TOUT11_P00_2_OUT

IfxGtm_ATOM1_6N_TOUT11_P00_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_6N_TOUT133_P22_7_OUT

IfxGtm_ATOM1_6N_TOUT133_P22_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_6N_TOUT149_P34_4_OUT

IfxGtm_ATOM1_6N_TOUT149_P34_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_6N_TOUT1_P02_1_OUT

IfxGtm_ATOM1_6N_TOUT1_P02_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_6N_TOUT27_P33_5_OUT

IfxGtm_ATOM1_6N_TOUT27_P33_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_6N_TOUT78_P15_7_OUT

IfxGtm_ATOM1_6N_TOUT78_P15_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_6_TOUT106_P10_4_OUT

IfxGtm_ATOM1_6_TOUT106_P10_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_6_TOUT16_P00_7_OUT

IfxGtm_ATOM1_6_TOUT16_P00_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_6_TOUT24_P33_2_OUT

IfxGtm_ATOM1_6_TOUT24_P33_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_6_TOUT42_P23_1_OUT

IfxGtm_ATOM1_6_TOUT42_P23_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_6_TOUT66_P20_10_OUT

IfxGtm_ATOM1_6_TOUT66_P20_10_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_6_TOUT6_P02_6_OUT

IfxGtm_ATOM1_6_TOUT6_P02_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_6_TOUT74_P15_3_OUT

IfxGtm_ATOM1_6_TOUT74_P15_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_7N_TOUT104_P10_2_OUT

IfxGtm_ATOM1_7N_TOUT104_P10_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_7N_TOUT107_P10_5_OUT

IfxGtm_ATOM1_7N_TOUT107_P10_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_7N_TOUT117_P02_10_OUT

IfxGtm_ATOM1_7N_TOUT117_P02_10_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_7N_TOUT12_P00_3_OUT

IfxGtm_ATOM1_7N_TOUT12_P00_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_7N_TOUT134_P22_8_OUT

IfxGtm_ATOM1_7N_TOUT134_P22_8_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_7N_TOUT150_P34_5_OUT

IfxGtm_ATOM1_7N_TOUT150_P34_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_7N_TOUT28_P33_6_OUT

IfxGtm_ATOM1_7N_TOUT28_P33_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_7N_TOUT2_P02_2_OUT

IfxGtm_ATOM1_7N_TOUT2_P02_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_7N_TOUT79_P15_8_OUT

IfxGtm_ATOM1_7N_TOUT79_P15_8_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_7_TOUT17_P00_8_OUT

IfxGtm_ATOM1_7_TOUT17_P00_8_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_7_TOUT25_P33_3_OUT

IfxGtm_ATOM1_7_TOUT25_P33_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_7_TOUT45_P23_4_OUT

IfxGtm_ATOM1_7_TOUT45_P23_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_7_TOUT67_P20_11_OUT

IfxGtm_ATOM1_7_TOUT67_P20_11_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_7_TOUT75_P15_4_OUT

IfxGtm_ATOM1_7_TOUT75_P15_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_7_TOUT7_P02_7_OUT

IfxGtm_ATOM1_7_TOUT7_P02_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_0N_TOUT101_P11_12_OUT

IfxGtm_ATOM2_0N_TOUT101_P11_12_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_0N_TOUT108_P10_6_OUT

IfxGtm_ATOM2_0N_TOUT108_P10_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_0N_TOUT12_P00_3_OUT

IfxGtm_ATOM2_0N_TOUT12_P00_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_0N_TOUT144_P33_15_OUT

IfxGtm_ATOM2_0N_TOUT144_P33_15_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_0N_TOUT25_P33_3_OUT

IfxGtm_ATOM2_0N_TOUT25_P33_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_0N_TOUT32_P33_10_OUT

IfxGtm_ATOM2_0N_TOUT32_P33_10_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_0N_TOUT37_P32_1_OUT

IfxGtm_ATOM2_0N_TOUT37_P32_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_0_TOUT109_P10_7_OUT

IfxGtm_ATOM2_0_TOUT109_P10_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_0_TOUT18_P00_9_OUT

IfxGtm_ATOM2_0_TOUT18_P00_9_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_0_TOUT26_P33_4_OUT

IfxGtm_ATOM2_0_TOUT26_P33_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_0_TOUT32_P33_10_OUT

IfxGtm_ATOM2_0_TOUT32_P33_10_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_0_TOUT94_P13_3_OUT

IfxGtm_ATOM2_0_TOUT94_P13_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_1N_TOUT105_P10_3_OUT

IfxGtm_ATOM2_1N_TOUT105_P10_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_1N_TOUT167_P00_13_OUT

IfxGtm_ATOM2_1N_TOUT167_P00_13_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_1N_TOUT22_P33_0_OUT

IfxGtm_ATOM2_1N_TOUT22_P33_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_1N_TOUT30_P33_8_OUT

IfxGtm_ATOM2_1N_TOUT30_P33_8_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_1N_TOUT34_P33_12_OUT

IfxGtm_ATOM2_1N_TOUT34_P33_12_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_1N_TOUT51_P21_0_OUT

IfxGtm_ATOM2_1N_TOUT51_P21_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_1N_TOUT90_P14_10_OUT

IfxGtm_ATOM2_1N_TOUT90_P14_10_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_1N_TOUT91_P13_0_OUT

IfxGtm_ATOM2_1N_TOUT91_P13_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_1N_TOUT98_P11_9_OUT

IfxGtm_ATOM2_1N_TOUT98_P11_9_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_1N_TOUT9_P00_0_OUT

IfxGtm_ATOM2_1N_TOUT9_P00_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_1_TOUT102_P10_0_OUT

IfxGtm_ATOM2_1_TOUT102_P10_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_1_TOUT19_P00_10_OUT

IfxGtm_ATOM2_1_TOUT19_P00_10_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_1_TOUT27_P33_5_OUT

IfxGtm_ATOM2_1_TOUT27_P33_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_1_TOUT43_P23_2_OUT

IfxGtm_ATOM2_1_TOUT43_P23_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_1_TOUT90_P14_10_OUT

IfxGtm_ATOM2_1_TOUT90_P14_10_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_1_TOUT95_P11_2_OUT

IfxGtm_ATOM2_1_TOUT95_P11_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_2N_TOUT106_P10_4_OUT

IfxGtm_ATOM2_2N_TOUT106_P10_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_2N_TOUT10_P00_1_OUT

IfxGtm_ATOM2_2N_TOUT10_P00_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_2N_TOUT114_P01_6_OUT

IfxGtm_ATOM2_2N_TOUT114_P01_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_2N_TOUT138_P23_6_OUT

IfxGtm_ATOM2_2N_TOUT138_P23_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_2N_TOUT166_P00_14_OUT

IfxGtm_ATOM2_2N_TOUT166_P00_14_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_2N_TOUT23_P33_1_OUT

IfxGtm_ATOM2_2N_TOUT23_P33_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_2N_TOUT31_P33_9_OUT

IfxGtm_ATOM2_2N_TOUT31_P33_9_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_2N_TOUT35_P33_13_OUT

IfxGtm_ATOM2_2N_TOUT35_P33_13_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_2N_TOUT52_P21_1_OUT

IfxGtm_ATOM2_2N_TOUT52_P21_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_2N_TOUT91_P13_0_OUT

IfxGtm_ATOM2_2N_TOUT91_P13_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_2N_TOUT92_P13_1_OUT

IfxGtm_ATOM2_2N_TOUT92_P13_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_2N_TOUT99_P11_10_OUT

IfxGtm_ATOM2_2N_TOUT99_P11_10_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_2_TOUT103_P10_1_OUT

IfxGtm_ATOM2_2_TOUT103_P10_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_2_TOUT20_P00_11_OUT

IfxGtm_ATOM2_2_TOUT20_P00_11_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_2_TOUT28_P33_6_OUT

IfxGtm_ATOM2_2_TOUT28_P33_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_2_TOUT44_P23_3_OUT

IfxGtm_ATOM2_2_TOUT44_P23_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_2_TOUT88_P14_8_OUT

IfxGtm_ATOM2_2_TOUT88_P14_8_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_2_TOUT96_P11_3_OUT

IfxGtm_ATOM2_2_TOUT96_P11_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_3N_TOUT100_P11_11_OUT

IfxGtm_ATOM2_3N_TOUT100_P11_11_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_3N_TOUT107_P10_5_OUT

IfxGtm_ATOM2_3N_TOUT107_P10_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_3N_TOUT115_P01_7_OUT

IfxGtm_ATOM2_3N_TOUT115_P01_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_3N_TOUT11_P00_2_OUT

IfxGtm_ATOM2_3N_TOUT11_P00_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_3N_TOUT139_P23_7_OUT

IfxGtm_ATOM2_3N_TOUT139_P23_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_3N_TOUT143_P33_14_OUT

IfxGtm_ATOM2_3N_TOUT143_P33_14_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_3N_TOUT168_P00_15_OUT

IfxGtm_ATOM2_3N_TOUT168_P00_15_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_3N_TOUT24_P33_2_OUT

IfxGtm_ATOM2_3N_TOUT24_P33_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_3N_TOUT33_P33_11_OUT

IfxGtm_ATOM2_3N_TOUT33_P33_11_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_3N_TOUT36_P32_0_OUT

IfxGtm_ATOM2_3N_TOUT36_P32_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_3N_TOUT62_P20_6_OUT

IfxGtm_ATOM2_3N_TOUT62_P20_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_3N_TOUT92_P13_1_OUT

IfxGtm_ATOM2_3N_TOUT92_P13_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_3N_TOUT93_P13_2_OUT

IfxGtm_ATOM2_3N_TOUT93_P13_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_3_TOUT104_P10_2_OUT

IfxGtm_ATOM2_3_TOUT104_P10_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_3_TOUT21_P00_12_OUT

IfxGtm_ATOM2_3_TOUT21_P00_12_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_3_TOUT29_P33_7_OUT

IfxGtm_ATOM2_3_TOUT29_P33_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_3_TOUT89_P14_9_OUT

IfxGtm_ATOM2_3_TOUT89_P14_9_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_3_TOUT97_P11_6_OUT

IfxGtm_ATOM2_3_TOUT97_P11_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_4N_TOUT29_P33_7_OUT

IfxGtm_ATOM2_4N_TOUT29_P33_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_4N_TOUT57_P21_6_OUT

IfxGtm_ATOM2_4N_TOUT57_P21_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_4N_TOUT86_P14_6_OUT

IfxGtm_ATOM2_4N_TOUT86_P14_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_4N_TOUT97_P11_6_OUT

IfxGtm_ATOM2_4N_TOUT97_P11_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_4_TOUT167_P00_13_OUT

IfxGtm_ATOM2_4_TOUT167_P00_13_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_4_TOUT22_P33_0_OUT

IfxGtm_ATOM2_4_TOUT22_P33_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_4_TOUT30_P33_8_OUT

IfxGtm_ATOM2_4_TOUT30_P33_8_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_4_TOUT34_P33_12_OUT

IfxGtm_ATOM2_4_TOUT34_P33_12_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_4_TOUT51_P21_0_OUT

IfxGtm_ATOM2_4_TOUT51_P21_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_4_TOUT90_P14_10_OUT

IfxGtm_ATOM2_4_TOUT90_P14_10_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_4_TOUT98_P11_9_OUT

IfxGtm_ATOM2_4_TOUT98_P11_9_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_5N_TOUT120_P11_1_OUT

IfxGtm_ATOM2_5N_TOUT120_P11_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_5N_TOUT26_P33_4_OUT

IfxGtm_ATOM2_5N_TOUT26_P33_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_5N_TOUT59_P20_0_OUT

IfxGtm_ATOM2_5N_TOUT59_P20_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_5N_TOUT87_P14_7_OUT

IfxGtm_ATOM2_5N_TOUT87_P14_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_5N_TOUT94_P13_3_OUT

IfxGtm_ATOM2_5N_TOUT94_P13_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_5_TOUT138_P23_6_OUT

IfxGtm_ATOM2_5_TOUT138_P23_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_5_TOUT166_P00_14_OUT

IfxGtm_ATOM2_5_TOUT166_P00_14_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_5_TOUT35_P33_13_OUT

IfxGtm_ATOM2_5_TOUT35_P33_13_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_5_TOUT52_P21_1_OUT

IfxGtm_ATOM2_5_TOUT52_P21_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_5_TOUT65_P20_9_OUT

IfxGtm_ATOM2_5_TOUT65_P20_9_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_5_TOUT91_P13_0_OUT

IfxGtm_ATOM2_5_TOUT91_P13_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_5_TOUT99_P11_10_OUT

IfxGtm_ATOM2_5_TOUT99_P11_10_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_6N_TOUT27_P33_5_OUT

IfxGtm_ATOM2_6N_TOUT27_P33_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_6N_TOUT60_P20_1_OUT

IfxGtm_ATOM2_6N_TOUT60_P20_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_6N_TOUT88_P14_8_OUT

IfxGtm_ATOM2_6N_TOUT88_P14_8_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_6N_TOUT95_P11_2_OUT

IfxGtm_ATOM2_6N_TOUT95_P11_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_6_TOUT100_P11_11_OUT

IfxGtm_ATOM2_6_TOUT100_P11_11_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_6_TOUT139_P23_7_OUT

IfxGtm_ATOM2_6_TOUT139_P23_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_6_TOUT143_P33_14_OUT

IfxGtm_ATOM2_6_TOUT143_P33_14_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_6_TOUT168_P00_15_OUT

IfxGtm_ATOM2_6_TOUT168_P00_15_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_6_TOUT36_P32_0_OUT

IfxGtm_ATOM2_6_TOUT36_P32_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_6_TOUT62_P20_6_OUT

IfxGtm_ATOM2_6_TOUT62_P20_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_6_TOUT92_P13_1_OUT

IfxGtm_ATOM2_6_TOUT92_P13_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_7N_TOUT28_P33_6_OUT

IfxGtm_ATOM2_7N_TOUT28_P33_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_7N_TOUT61_P20_3_OUT

IfxGtm_ATOM2_7N_TOUT61_P20_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_7N_TOUT89_P14_9_OUT

IfxGtm_ATOM2_7N_TOUT89_P14_9_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_7N_TOUT96_P11_3_OUT

IfxGtm_ATOM2_7N_TOUT96_P11_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_7_TOUT101_P11_12_OUT

IfxGtm_ATOM2_7_TOUT101_P11_12_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_7_TOUT140_P32_5_OUT

IfxGtm_ATOM2_7_TOUT140_P32_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_7_TOUT144_P33_15_OUT

IfxGtm_ATOM2_7_TOUT144_P33_15_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_7_TOUT37_P32_1_OUT

IfxGtm_ATOM2_7_TOUT37_P32_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_7_TOUT63_P20_7_OUT

IfxGtm_ATOM2_7_TOUT63_P20_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_7_TOUT93_P13_2_OUT

IfxGtm_ATOM2_7_TOUT93_P13_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_0N_TOUT101_P11_12_OUT

IfxGtm_ATOM3_0N_TOUT101_P11_12_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_0N_TOUT144_P33_15_OUT

IfxGtm_ATOM3_0N_TOUT144_P33_15_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_0N_TOUT17_P00_8_OUT

IfxGtm_ATOM3_0N_TOUT17_P00_8_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_0N_TOUT25_P33_3_OUT

IfxGtm_ATOM3_0N_TOUT25_P33_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_0N_TOUT32_P33_10_OUT

IfxGtm_ATOM3_0N_TOUT32_P33_10_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_0N_TOUT37_P32_1_OUT

IfxGtm_ATOM3_0N_TOUT37_P32_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_0N_TOUT63_P20_7_OUT

IfxGtm_ATOM3_0N_TOUT63_P20_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_0N_TOUT76_P15_5_OUT

IfxGtm_ATOM3_0N_TOUT76_P15_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_0_TOUT18_P00_9_OUT

IfxGtm_ATOM3_0_TOUT18_P00_9_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_0_TOUT26_P33_4_OUT

IfxGtm_ATOM3_0_TOUT26_P33_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_0_TOUT32_P33_10_OUT

IfxGtm_ATOM3_0_TOUT32_P33_10_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_0_TOUT65_P20_9_OUT

IfxGtm_ATOM3_0_TOUT65_P20_9_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_0_TOUT94_P13_3_OUT

IfxGtm_ATOM3_0_TOUT94_P13_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_1N_TOUT14_P00_5_OUT

IfxGtm_ATOM3_1N_TOUT14_P00_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_1N_TOUT167_P00_13_OUT

IfxGtm_ATOM3_1N_TOUT167_P00_13_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_1N_TOUT22_P33_0_OUT

IfxGtm_ATOM3_1N_TOUT22_P33_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_1N_TOUT30_P33_8_OUT

IfxGtm_ATOM3_1N_TOUT30_P33_8_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_1N_TOUT34_P33_12_OUT

IfxGtm_ATOM3_1N_TOUT34_P33_12_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_1N_TOUT51_P21_0_OUT

IfxGtm_ATOM3_1N_TOUT51_P21_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_1N_TOUT79_P15_8_OUT

IfxGtm_ATOM3_1N_TOUT79_P15_8_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_1N_TOUT90_P14_10_OUT

IfxGtm_ATOM3_1N_TOUT90_P14_10_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_1N_TOUT91_P13_0_OUT

IfxGtm_ATOM3_1N_TOUT91_P13_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_1N_TOUT98_P11_9_OUT

IfxGtm_ATOM3_1N_TOUT98_P11_9_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_1_TOUT111_P01_3_OUT

IfxGtm_ATOM3_1_TOUT111_P01_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_1_TOUT128_P12_0_OUT

IfxGtm_ATOM3_1_TOUT128_P12_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_1_TOUT19_P00_10_OUT

IfxGtm_ATOM3_1_TOUT19_P00_10_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_1_TOUT27_P33_5_OUT

IfxGtm_ATOM3_1_TOUT27_P33_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_1_TOUT43_P23_2_OUT

IfxGtm_ATOM3_1_TOUT43_P23_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_1_TOUT64_P20_8_OUT

IfxGtm_ATOM3_1_TOUT64_P20_8_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_1_TOUT90_P14_10_OUT

IfxGtm_ATOM3_1_TOUT90_P14_10_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_1_TOUT95_P11_2_OUT

IfxGtm_ATOM3_1_TOUT95_P11_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_2N_TOUT114_P01_6_OUT

IfxGtm_ATOM3_2N_TOUT114_P01_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_2N_TOUT15_P00_6_OUT

IfxGtm_ATOM3_2N_TOUT15_P00_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_2N_TOUT166_P00_14_OUT

IfxGtm_ATOM3_2N_TOUT166_P00_14_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_2N_TOUT23_P33_1_OUT

IfxGtm_ATOM3_2N_TOUT23_P33_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_2N_TOUT31_P33_9_OUT

IfxGtm_ATOM3_2N_TOUT31_P33_9_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_2N_TOUT35_P33_13_OUT

IfxGtm_ATOM3_2N_TOUT35_P33_13_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_2N_TOUT52_P21_1_OUT

IfxGtm_ATOM3_2N_TOUT52_P21_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_2N_TOUT78_P15_7_OUT

IfxGtm_ATOM3_2N_TOUT78_P15_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_2N_TOUT91_P13_0_OUT

IfxGtm_ATOM3_2N_TOUT91_P13_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_2N_TOUT92_P13_1_OUT

IfxGtm_ATOM3_2N_TOUT92_P13_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_2N_TOUT99_P11_10_OUT

IfxGtm_ATOM3_2N_TOUT99_P11_10_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_2_TOUT112_P01_4_OUT

IfxGtm_ATOM3_2_TOUT112_P01_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_2_TOUT20_P00_11_OUT

IfxGtm_ATOM3_2_TOUT20_P00_11_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_2_TOUT28_P33_6_OUT

IfxGtm_ATOM3_2_TOUT28_P33_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_2_TOUT44_P23_3_OUT

IfxGtm_ATOM3_2_TOUT44_P23_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_2_TOUT63_P20_7_OUT

IfxGtm_ATOM3_2_TOUT63_P20_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_2_TOUT88_P14_8_OUT

IfxGtm_ATOM3_2_TOUT88_P14_8_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_2_TOUT96_P11_3_OUT

IfxGtm_ATOM3_2_TOUT96_P11_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_3N_TOUT100_P11_11_OUT

IfxGtm_ATOM3_3N_TOUT100_P11_11_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_3N_TOUT115_P01_7_OUT

IfxGtm_ATOM3_3N_TOUT115_P01_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_3N_TOUT143_P33_14_OUT

IfxGtm_ATOM3_3N_TOUT143_P33_14_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_3N_TOUT168_P00_15_OUT

IfxGtm_ATOM3_3N_TOUT168_P00_15_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_3N_TOUT16_P00_7_OUT

IfxGtm_ATOM3_3N_TOUT16_P00_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_3N_TOUT24_P33_2_OUT

IfxGtm_ATOM3_3N_TOUT24_P33_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_3N_TOUT33_P33_11_OUT

IfxGtm_ATOM3_3N_TOUT33_P33_11_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_3N_TOUT36_P32_0_OUT

IfxGtm_ATOM3_3N_TOUT36_P32_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_3N_TOUT62_P20_6_OUT

IfxGtm_ATOM3_3N_TOUT62_P20_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_3N_TOUT77_P15_6_OUT

IfxGtm_ATOM3_3N_TOUT77_P15_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_3N_TOUT92_P13_1_OUT

IfxGtm_ATOM3_3N_TOUT92_P13_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_3N_TOUT93_P13_2_OUT

IfxGtm_ATOM3_3N_TOUT93_P13_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_3_TOUT113_P01_5_OUT

IfxGtm_ATOM3_3_TOUT113_P01_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_3_TOUT21_P00_12_OUT

IfxGtm_ATOM3_3_TOUT21_P00_12_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_3_TOUT29_P33_7_OUT

IfxGtm_ATOM3_3_TOUT29_P33_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_3_TOUT62_P20_6_OUT

IfxGtm_ATOM3_3_TOUT62_P20_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_3_TOUT89_P14_9_OUT

IfxGtm_ATOM3_3_TOUT89_P14_9_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_3_TOUT97_P11_6_OUT

IfxGtm_ATOM3_3_TOUT97_P11_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_4N_TOUT135_P22_9_OUT

IfxGtm_ATOM3_4N_TOUT135_P22_9_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_4N_TOUT21_P00_12_OUT

IfxGtm_ATOM3_4N_TOUT21_P00_12_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_4N_TOUT29_P33_7_OUT

IfxGtm_ATOM3_4N_TOUT29_P33_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_4N_TOUT57_P21_6_OUT

IfxGtm_ATOM3_4N_TOUT57_P21_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_4N_TOUT86_P14_6_OUT

IfxGtm_ATOM3_4N_TOUT86_P14_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_4N_TOUT97_P11_6_OUT

IfxGtm_ATOM3_4N_TOUT97_P11_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_4_TOUT114_P01_6_OUT

IfxGtm_ATOM3_4_TOUT114_P01_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_4_TOUT131_P22_5_OUT

IfxGtm_ATOM3_4_TOUT131_P22_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_4_TOUT167_P00_13_OUT

IfxGtm_ATOM3_4_TOUT167_P00_13_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_4_TOUT22_P33_0_OUT

IfxGtm_ATOM3_4_TOUT22_P33_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_4_TOUT30_P33_8_OUT

IfxGtm_ATOM3_4_TOUT30_P33_8_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_4_TOUT34_P33_12_OUT

IfxGtm_ATOM3_4_TOUT34_P33_12_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_4_TOUT51_P21_0_OUT

IfxGtm_ATOM3_4_TOUT51_P21_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_4_TOUT90_P14_10_OUT

IfxGtm_ATOM3_4_TOUT90_P14_10_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_4_TOUT98_P11_9_OUT

IfxGtm_ATOM3_4_TOUT98_P11_9_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_5N_TOUT120_P11_1_OUT

IfxGtm_ATOM3_5N_TOUT120_P11_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_5N_TOUT136_P22_10_OUT

IfxGtm_ATOM3_5N_TOUT136_P22_10_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_5N_TOUT18_P00_9_OUT

IfxGtm_ATOM3_5N_TOUT18_P00_9_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_5N_TOUT26_P33_4_OUT

IfxGtm_ATOM3_5N_TOUT26_P33_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_5N_TOUT59_P20_0_OUT

IfxGtm_ATOM3_5N_TOUT59_P20_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_5N_TOUT87_P14_7_OUT

IfxGtm_ATOM3_5N_TOUT87_P14_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_5N_TOUT94_P13_3_OUT

IfxGtm_ATOM3_5N_TOUT94_P13_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_5_TOUT115_P01_7_OUT

IfxGtm_ATOM3_5_TOUT115_P01_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_5_TOUT132_P22_6_OUT

IfxGtm_ATOM3_5_TOUT132_P22_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_5_TOUT166_P00_14_OUT

IfxGtm_ATOM3_5_TOUT166_P00_14_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_5_TOUT35_P33_13_OUT

IfxGtm_ATOM3_5_TOUT35_P33_13_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_5_TOUT52_P21_1_OUT

IfxGtm_ATOM3_5_TOUT52_P21_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_5_TOUT64_P20_8_OUT

IfxGtm_ATOM3_5_TOUT64_P20_8_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_5_TOUT91_P13_0_OUT

IfxGtm_ATOM3_5_TOUT91_P13_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_5_TOUT99_P11_10_OUT

IfxGtm_ATOM3_5_TOUT99_P11_10_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_6N_TOUT137_P22_11_OUT

IfxGtm_ATOM3_6N_TOUT137_P22_11_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_6N_TOUT19_P00_10_OUT

IfxGtm_ATOM3_6N_TOUT19_P00_10_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_6N_TOUT27_P33_5_OUT

IfxGtm_ATOM3_6N_TOUT27_P33_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_6N_TOUT60_P20_1_OUT

IfxGtm_ATOM3_6N_TOUT60_P20_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_6N_TOUT88_P14_8_OUT

IfxGtm_ATOM3_6N_TOUT88_P14_8_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_6N_TOUT95_P11_2_OUT

IfxGtm_ATOM3_6N_TOUT95_P11_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_6_TOUT100_P11_11_OUT

IfxGtm_ATOM3_6_TOUT100_P11_11_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_6_TOUT133_P22_7_OUT

IfxGtm_ATOM3_6_TOUT133_P22_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_6_TOUT143_P33_14_OUT

IfxGtm_ATOM3_6_TOUT143_P33_14_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_6_TOUT168_P00_15_OUT

IfxGtm_ATOM3_6_TOUT168_P00_15_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_6_TOUT36_P32_0_OUT

IfxGtm_ATOM3_6_TOUT36_P32_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_6_TOUT62_P20_6_OUT

IfxGtm_ATOM3_6_TOUT62_P20_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_6_TOUT92_P13_1_OUT

IfxGtm_ATOM3_6_TOUT92_P13_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_7N_TOUT20_P00_11_OUT

IfxGtm_ATOM3_7N_TOUT20_P00_11_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_7N_TOUT28_P33_6_OUT

IfxGtm_ATOM3_7N_TOUT28_P33_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_7N_TOUT61_P20_3_OUT

IfxGtm_ATOM3_7N_TOUT61_P20_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_7N_TOUT89_P14_9_OUT

IfxGtm_ATOM3_7N_TOUT89_P14_9_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_7N_TOUT96_P11_3_OUT

IfxGtm_ATOM3_7N_TOUT96_P11_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_7_TOUT101_P11_12_OUT

IfxGtm_ATOM3_7_TOUT101_P11_12_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_7_TOUT134_P22_8_OUT

IfxGtm_ATOM3_7_TOUT134_P22_8_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_7_TOUT144_P33_15_OUT

IfxGtm_ATOM3_7_TOUT144_P33_15_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_7_TOUT37_P32_1_OUT

IfxGtm_ATOM3_7_TOUT37_P32_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_7_TOUT63_P20_7_OUT

IfxGtm_ATOM3_7_TOUT63_P20_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_7_TOUT93_P13_2_OUT

IfxGtm_ATOM3_7_TOUT93_P13_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_0N_TOUT87_P14_7_OUT

IfxGtm_ATOM4_0N_TOUT87_P14_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_0_TOUT109_P10_7_OUT

IfxGtm_ATOM4_0_TOUT109_P10_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_0_TOUT39_P32_3_OUT

IfxGtm_ATOM4_0_TOUT39_P32_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_0_TOUT48_P22_1_OUT

IfxGtm_ATOM4_0_TOUT48_P22_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_0_TOUT53_P21_2_OUT

IfxGtm_ATOM4_0_TOUT53_P21_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_0_TOUT68_P20_12_OUT

IfxGtm_ATOM4_0_TOUT68_P20_12_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_0_TOUT76_P15_5_OUT

IfxGtm_ATOM4_0_TOUT76_P15_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_0_TOUT77_P15_6_OUT

IfxGtm_ATOM4_0_TOUT77_P15_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_0_TOUT85_P14_5_OUT

IfxGtm_ATOM4_0_TOUT85_P14_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_0_TOUT87_P14_7_OUT

IfxGtm_ATOM4_0_TOUT87_P14_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_1N_TOUT102_P10_0_OUT

IfxGtm_ATOM4_1N_TOUT102_P10_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_1N_TOUT44_P23_3_OUT

IfxGtm_ATOM4_1N_TOUT44_P23_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_1N_TOUT50_P22_3_OUT

IfxGtm_ATOM4_1N_TOUT50_P22_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_1N_TOUT53_P21_2_OUT

IfxGtm_ATOM4_1N_TOUT53_P21_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_1N_TOUT57_P21_6_OUT

IfxGtm_ATOM4_1N_TOUT57_P21_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_1N_TOUT72_P15_1_OUT

IfxGtm_ATOM4_1N_TOUT72_P15_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_1N_TOUT85_P14_5_OUT

IfxGtm_ATOM4_1N_TOUT85_P14_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_1N_TOUT86_P14_6_OUT

IfxGtm_ATOM4_1N_TOUT86_P14_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_1_TOUT103_P10_1_OUT

IfxGtm_ATOM4_1_TOUT103_P10_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_1_TOUT41_P23_0_OUT

IfxGtm_ATOM4_1_TOUT41_P23_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_1_TOUT47_P22_0_OUT

IfxGtm_ATOM4_1_TOUT47_P22_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_1_TOUT54_P21_3_OUT

IfxGtm_ATOM4_1_TOUT54_P21_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_1_TOUT69_P20_13_OUT

IfxGtm_ATOM4_1_TOUT69_P20_13_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_1_TOUT78_P15_7_OUT

IfxGtm_ATOM4_1_TOUT78_P15_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_1_TOUT79_P15_8_OUT

IfxGtm_ATOM4_1_TOUT79_P15_8_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_1_TOUT84_P14_4_OUT

IfxGtm_ATOM4_1_TOUT84_P14_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_1_TOUT86_P14_6_OUT

IfxGtm_ATOM4_1_TOUT86_P14_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_2N_TOUT110_P10_8_OUT

IfxGtm_ATOM4_2N_TOUT110_P10_8_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_2N_TOUT45_P23_4_OUT

IfxGtm_ATOM4_2N_TOUT45_P23_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_2N_TOUT52_P21_1_OUT

IfxGtm_ATOM4_2N_TOUT52_P21_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_2N_TOUT58_P21_7_OUT

IfxGtm_ATOM4_2N_TOUT58_P21_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_2N_TOUT65_P20_9_OUT

IfxGtm_ATOM4_2N_TOUT65_P20_9_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_2N_TOUT73_P15_2_OUT

IfxGtm_ATOM4_2N_TOUT73_P15_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_2N_TOUT81_P14_1_OUT

IfxGtm_ATOM4_2N_TOUT81_P14_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_2_TOUT104_P10_2_OUT

IfxGtm_ATOM4_2_TOUT104_P10_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_2_TOUT107_P10_5_OUT

IfxGtm_ATOM4_2_TOUT107_P10_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_2_TOUT42_P23_1_OUT

IfxGtm_ATOM4_2_TOUT42_P23_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_2_TOUT46_P23_5_OUT

IfxGtm_ATOM4_2_TOUT46_P23_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_2_TOUT55_P21_4_OUT

IfxGtm_ATOM4_2_TOUT55_P21_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_2_TOUT70_P20_14_OUT

IfxGtm_ATOM4_2_TOUT70_P20_14_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_2_TOUT80_P14_0_OUT

IfxGtm_ATOM4_2_TOUT80_P14_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_2_TOUT83_P14_3_OUT

IfxGtm_ATOM4_2_TOUT83_P14_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_3N_TOUT106_P10_4_OUT

IfxGtm_ATOM4_3N_TOUT106_P10_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_3N_TOUT46_P23_5_OUT

IfxGtm_ATOM4_3N_TOUT46_P23_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_3N_TOUT51_P21_0_OUT

IfxGtm_ATOM4_3N_TOUT51_P21_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_3N_TOUT59_P20_0_OUT

IfxGtm_ATOM4_3N_TOUT59_P20_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_3N_TOUT66_P20_10_OUT

IfxGtm_ATOM4_3N_TOUT66_P20_10_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_3N_TOUT74_P15_3_OUT

IfxGtm_ATOM4_3N_TOUT74_P15_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_3N_TOUT80_P14_0_OUT

IfxGtm_ATOM4_3N_TOUT80_P14_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_3_TOUT105_P10_3_OUT

IfxGtm_ATOM4_3_TOUT105_P10_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_3_TOUT108_P10_6_OUT

IfxGtm_ATOM4_3_TOUT108_P10_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_3_TOUT43_P23_2_OUT

IfxGtm_ATOM4_3_TOUT43_P23_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_3_TOUT49_P22_2_OUT

IfxGtm_ATOM4_3_TOUT49_P22_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_3_TOUT56_P21_5_OUT

IfxGtm_ATOM4_3_TOUT56_P21_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_3_TOUT71_P15_0_OUT

IfxGtm_ATOM4_3_TOUT71_P15_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_3_TOUT82_P14_2_OUT

IfxGtm_ATOM4_3_TOUT82_P14_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_4N_TOUT105_P10_3_OUT

IfxGtm_ATOM4_4N_TOUT105_P10_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_4N_TOUT108_P10_6_OUT

IfxGtm_ATOM4_4N_TOUT108_P10_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_4N_TOUT132_P22_6_OUT

IfxGtm_ATOM4_4N_TOUT132_P22_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_4N_TOUT21_P00_12_OUT

IfxGtm_ATOM4_4N_TOUT21_P00_12_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_4N_TOUT56_P21_5_OUT

IfxGtm_ATOM4_4N_TOUT56_P21_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_4N_TOUT71_P15_0_OUT

IfxGtm_ATOM4_4N_TOUT71_P15_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_4N_TOUT75_P15_4_OUT

IfxGtm_ATOM4_4N_TOUT75_P15_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_4N_TOUT95_P11_2_OUT

IfxGtm_ATOM4_4N_TOUT95_P11_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_4_TOUT102_P10_0_OUT

IfxGtm_ATOM4_4_TOUT102_P10_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_4_TOUT111_P01_3_OUT

IfxGtm_ATOM4_4_TOUT111_P01_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_4_TOUT131_P22_5_OUT

IfxGtm_ATOM4_4_TOUT131_P22_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_4_TOUT264_P13_15_OUT

IfxGtm_ATOM4_4_TOUT264_P13_15_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_4_TOUT44_P23_3_OUT

IfxGtm_ATOM4_4_TOUT44_P23_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_4_TOUT50_P22_3_OUT

IfxGtm_ATOM4_4_TOUT50_P22_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_4_TOUT57_P21_6_OUT

IfxGtm_ATOM4_4_TOUT57_P21_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_4_TOUT72_P15_1_OUT

IfxGtm_ATOM4_4_TOUT72_P15_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_4_TOUT81_P14_1_OUT

IfxGtm_ATOM4_4_TOUT81_P14_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_5N_TOUT109_P10_7_OUT

IfxGtm_ATOM4_5N_TOUT109_P10_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_5N_TOUT121_P11_4_OUT

IfxGtm_ATOM4_5N_TOUT121_P11_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_5N_TOUT133_P22_7_OUT

IfxGtm_ATOM4_5N_TOUT133_P22_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_5N_TOUT18_P00_9_OUT

IfxGtm_ATOM4_5N_TOUT18_P00_9_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_5N_TOUT76_P15_5_OUT

IfxGtm_ATOM4_5N_TOUT76_P15_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_5N_TOUT77_P15_6_OUT

IfxGtm_ATOM4_5N_TOUT77_P15_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_5_TOUT110_P10_8_OUT

IfxGtm_ATOM4_5_TOUT110_P10_8_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_5_TOUT116_P02_9_OUT

IfxGtm_ATOM4_5_TOUT116_P02_9_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_5_TOUT128_P12_0_OUT

IfxGtm_ATOM4_5_TOUT128_P12_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_5_TOUT130_P22_4_OUT

IfxGtm_ATOM4_5_TOUT130_P22_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_5_TOUT45_P23_4_OUT

IfxGtm_ATOM4_5_TOUT45_P23_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_5_TOUT56_P21_5_OUT

IfxGtm_ATOM4_5_TOUT56_P21_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_5_TOUT58_P21_7_OUT

IfxGtm_ATOM4_5_TOUT58_P21_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_5_TOUT65_P20_9_OUT

IfxGtm_ATOM4_5_TOUT65_P20_9_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_5_TOUT73_P15_2_OUT

IfxGtm_ATOM4_5_TOUT73_P15_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_6N_TOUT103_P10_1_OUT

IfxGtm_ATOM4_6N_TOUT103_P10_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_6N_TOUT134_P22_8_OUT

IfxGtm_ATOM4_6N_TOUT134_P22_8_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_6N_TOUT19_P00_10_OUT

IfxGtm_ATOM4_6N_TOUT19_P00_10_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_6N_TOUT78_P15_7_OUT

IfxGtm_ATOM4_6N_TOUT78_P15_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_6N_TOUT97_P11_6_OUT

IfxGtm_ATOM4_6N_TOUT97_P11_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_6_TOUT106_P10_4_OUT

IfxGtm_ATOM4_6_TOUT106_P10_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_6_TOUT117_P02_10_OUT

IfxGtm_ATOM4_6_TOUT117_P02_10_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_6_TOUT129_P12_1_OUT

IfxGtm_ATOM4_6_TOUT129_P12_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_6_TOUT139_P23_7_OUT

IfxGtm_ATOM4_6_TOUT139_P23_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_6_TOUT46_P23_5_OUT

IfxGtm_ATOM4_6_TOUT46_P23_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_6_TOUT59_P20_0_OUT

IfxGtm_ATOM4_6_TOUT59_P20_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_6_TOUT66_P20_10_OUT

IfxGtm_ATOM4_6_TOUT66_P20_10_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_6_TOUT74_P15_3_OUT

IfxGtm_ATOM4_6_TOUT74_P15_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_7N_TOUT104_P10_2_OUT

IfxGtm_ATOM4_7N_TOUT104_P10_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_7N_TOUT107_P10_5_OUT

IfxGtm_ATOM4_7N_TOUT107_P10_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_7N_TOUT124_P11_8_OUT

IfxGtm_ATOM4_7N_TOUT124_P11_8_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_7N_TOUT135_P22_9_OUT

IfxGtm_ATOM4_7N_TOUT135_P22_9_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_7N_TOUT20_P00_11_OUT

IfxGtm_ATOM4_7N_TOUT20_P00_11_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_7N_TOUT79_P15_8_OUT

IfxGtm_ATOM4_7N_TOUT79_P15_8_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_7_TOUT118_P02_11_OUT

IfxGtm_ATOM4_7_TOUT118_P02_11_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_7_TOUT119_P11_0_OUT

IfxGtm_ATOM4_7_TOUT119_P11_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_7_TOUT138_P23_6_OUT

IfxGtm_ATOM4_7_TOUT138_P23_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_7_TOUT40_P32_4_OUT

IfxGtm_ATOM4_7_TOUT40_P32_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_7_TOUT64_P20_8_OUT

IfxGtm_ATOM4_7_TOUT64_P20_8_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_7_TOUT67_P20_11_OUT

IfxGtm_ATOM4_7_TOUT67_P20_11_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_7_TOUT75_P15_4_OUT

IfxGtm_ATOM4_7_TOUT75_P15_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_0N_TOUT126_P11_14_OUT

IfxGtm_ATOM5_0N_TOUT126_P11_14_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_0N_TOUT134_P22_8_OUT

IfxGtm_ATOM5_0N_TOUT134_P22_8_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_0N_TOUT150_P34_5_OUT

IfxGtm_ATOM5_0N_TOUT150_P34_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_0N_TOUT161_P01_13_OUT

IfxGtm_ATOM5_0N_TOUT161_P01_13_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_0N_TOUT181_P31_7_OUT

IfxGtm_ATOM5_0N_TOUT181_P31_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_0N_TOUT213_P25_7_OUT

IfxGtm_ATOM5_0N_TOUT213_P25_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_0N_TOUT261_P14_12_OUT

IfxGtm_ATOM5_0N_TOUT261_P14_12_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_0N_TOUT264_P13_15_OUT

IfxGtm_ATOM5_0N_TOUT264_P13_15_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_0_TOUT119_P11_0_OUT

IfxGtm_ATOM5_0_TOUT119_P11_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_0_TOUT130_P22_4_OUT

IfxGtm_ATOM5_0_TOUT130_P22_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_0_TOUT146_P34_1_OUT

IfxGtm_ATOM5_0_TOUT146_P34_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_0_TOUT155_P01_0_OUT

IfxGtm_ATOM5_0_TOUT155_P01_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_0_TOUT162_P01_8_OUT

IfxGtm_ATOM5_0_TOUT162_P01_8_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_0_TOUT174_P31_0_OUT

IfxGtm_ATOM5_0_TOUT174_P31_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_0_TOUT206_P25_0_OUT

IfxGtm_ATOM5_0_TOUT206_P25_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_0_TOUT249_P13_12_OUT

IfxGtm_ATOM5_0_TOUT249_P13_12_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_0_TOUT258_P14_11_OUT

IfxGtm_ATOM5_0_TOUT258_P14_11_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_1N_TOUT123_P11_7_OUT

IfxGtm_ATOM5_1N_TOUT123_P11_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_1N_TOUT128_P12_0_OUT

IfxGtm_ATOM5_1N_TOUT128_P12_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_1N_TOUT135_P22_9_OUT

IfxGtm_ATOM5_1N_TOUT135_P22_9_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_1N_TOUT140_P32_5_OUT

IfxGtm_ATOM5_1N_TOUT140_P32_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_1N_TOUT158_P01_12_OUT

IfxGtm_ATOM5_1N_TOUT158_P01_12_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_1N_TOUT178_P31_4_OUT

IfxGtm_ATOM5_1N_TOUT178_P31_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_1N_TOUT210_P25_4_OUT

IfxGtm_ATOM5_1N_TOUT210_P25_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_1N_TOUT245_P15_13_OUT

IfxGtm_ATOM5_1N_TOUT245_P15_13_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_1N_TOUT248_P13_9_OUT

IfxGtm_ATOM5_1N_TOUT248_P13_9_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_1N_TOUT260_P14_13_OUT

IfxGtm_ATOM5_1N_TOUT260_P14_13_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_1N_TOUT268_P10_13_OUT

IfxGtm_ATOM5_1N_TOUT268_P10_13_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_1_TOUT120_P11_1_OUT

IfxGtm_ATOM5_1_TOUT120_P11_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_1_TOUT131_P22_5_OUT

IfxGtm_ATOM5_1_TOUT131_P22_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_1_TOUT147_P34_2_OUT

IfxGtm_ATOM5_1_TOUT147_P34_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_1_TOUT156_P01_2_OUT

IfxGtm_ATOM5_1_TOUT156_P01_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_1_TOUT164_P01_14_OUT

IfxGtm_ATOM5_1_TOUT164_P01_14_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_1_TOUT175_P31_1_OUT

IfxGtm_ATOM5_1_TOUT175_P31_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_1_TOUT207_P25_1_OUT

IfxGtm_ATOM5_1_TOUT207_P25_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_1_TOUT242_P15_10_OUT

IfxGtm_ATOM5_1_TOUT242_P15_10_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_1_TOUT253_P13_4_OUT

IfxGtm_ATOM5_1_TOUT253_P13_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_1_TOUT265_P10_9_OUT

IfxGtm_ATOM5_1_TOUT265_P10_9_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_2N_TOUT124_P11_8_OUT

IfxGtm_ATOM5_2N_TOUT124_P11_8_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_2N_TOUT136_P22_10_OUT

IfxGtm_ATOM5_2N_TOUT136_P22_10_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_2N_TOUT141_P32_6_OUT

IfxGtm_ATOM5_2N_TOUT141_P32_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_2N_TOUT159_P01_1_OUT

IfxGtm_ATOM5_2N_TOUT159_P01_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_2N_TOUT179_P31_5_OUT

IfxGtm_ATOM5_2N_TOUT179_P31_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_2N_TOUT211_P25_5_OUT

IfxGtm_ATOM5_2N_TOUT211_P25_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_2N_TOUT246_P15_14_OUT

IfxGtm_ATOM5_2N_TOUT246_P15_14_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_2N_TOUT250_P13_11_OUT

IfxGtm_ATOM5_2N_TOUT250_P13_11_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_2N_TOUT259_P14_14_OUT

IfxGtm_ATOM5_2N_TOUT259_P14_14_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_2N_TOUT269_P10_11_OUT

IfxGtm_ATOM5_2N_TOUT269_P10_11_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_2_TOUT121_P11_4_OUT

IfxGtm_ATOM5_2_TOUT121_P11_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_2_TOUT132_P22_6_OUT

IfxGtm_ATOM5_2_TOUT132_P22_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_2_TOUT148_P34_3_OUT

IfxGtm_ATOM5_2_TOUT148_P34_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_2_TOUT152_P02_15_OUT

IfxGtm_ATOM5_2_TOUT152_P02_15_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_2_TOUT157_P01_15_OUT

IfxGtm_ATOM5_2_TOUT157_P01_15_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_2_TOUT176_P31_2_OUT

IfxGtm_ATOM5_2_TOUT176_P31_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_2_TOUT208_P25_2_OUT

IfxGtm_ATOM5_2_TOUT208_P25_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_2_TOUT243_P15_11_OUT

IfxGtm_ATOM5_2_TOUT243_P15_11_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_2_TOUT254_P13_5_OUT

IfxGtm_ATOM5_2_TOUT254_P13_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_2_TOUT266_P10_10_OUT

IfxGtm_ATOM5_2_TOUT266_P10_10_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_3N_TOUT123_P11_7_OUT

IfxGtm_ATOM5_3N_TOUT123_P11_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_3N_TOUT125_P11_13_OUT

IfxGtm_ATOM5_3N_TOUT125_P11_13_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_3N_TOUT137_P22_11_OUT

IfxGtm_ATOM5_3N_TOUT137_P22_11_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_3N_TOUT142_P32_7_OUT

IfxGtm_ATOM5_3N_TOUT142_P32_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_3N_TOUT160_P01_9_OUT

IfxGtm_ATOM5_3N_TOUT160_P01_9_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_3N_TOUT180_P31_6_OUT

IfxGtm_ATOM5_3N_TOUT180_P31_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_3N_TOUT212_P25_6_OUT

IfxGtm_ATOM5_3N_TOUT212_P25_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_3N_TOUT212_P26_0_OUT

IfxGtm_ATOM5_3N_TOUT212_P26_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_3N_TOUT247_P15_15_OUT

IfxGtm_ATOM5_3N_TOUT247_P15_15_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_3N_TOUT249_P13_12_OUT

IfxGtm_ATOM5_3N_TOUT249_P13_12_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_3N_TOUT263_P14_15_OUT

IfxGtm_ATOM5_3N_TOUT263_P14_15_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_3N_TOUT270_P10_15_OUT

IfxGtm_ATOM5_3N_TOUT270_P10_15_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_3_TOUT122_P11_5_OUT

IfxGtm_ATOM5_3_TOUT122_P11_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_3_TOUT133_P22_7_OUT

IfxGtm_ATOM5_3_TOUT133_P22_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_3_TOUT149_P34_4_OUT

IfxGtm_ATOM5_3_TOUT149_P34_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_3_TOUT163_P01_10_OUT

IfxGtm_ATOM5_3_TOUT163_P01_10_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_3_TOUT165_P01_11_OUT

IfxGtm_ATOM5_3_TOUT165_P01_11_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_3_TOUT177_P31_3_OUT

IfxGtm_ATOM5_3_TOUT177_P31_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_3_TOUT209_P25_3_OUT

IfxGtm_ATOM5_3_TOUT209_P25_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_3_TOUT244_P15_12_OUT

IfxGtm_ATOM5_3_TOUT244_P15_12_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_3_TOUT255_P13_6_OUT

IfxGtm_ATOM5_3_TOUT255_P13_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_3_TOUT267_P10_14_OUT

IfxGtm_ATOM5_3_TOUT267_P10_14_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_4N_TOUT122_P11_5_OUT

IfxGtm_ATOM5_4N_TOUT122_P11_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_4N_TOUT129_P12_1_OUT

IfxGtm_ATOM5_4N_TOUT129_P12_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_4N_TOUT163_P01_10_OUT

IfxGtm_ATOM5_4N_TOUT163_P01_10_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_4N_TOUT165_P01_11_OUT

IfxGtm_ATOM5_4N_TOUT165_P01_11_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_4N_TOUT177_P31_3_OUT

IfxGtm_ATOM5_4N_TOUT177_P31_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_4N_TOUT209_P25_3_OUT

IfxGtm_ATOM5_4N_TOUT209_P25_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_4N_TOUT267_P10_14_OUT

IfxGtm_ATOM5_4N_TOUT267_P10_14_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_4_TOUT123_P11_7_OUT

IfxGtm_ATOM5_4_TOUT123_P11_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_4_TOUT134_P22_8_OUT

IfxGtm_ATOM5_4_TOUT134_P22_8_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_4_TOUT150_P34_5_OUT

IfxGtm_ATOM5_4_TOUT150_P34_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_4_TOUT158_P01_12_OUT

IfxGtm_ATOM5_4_TOUT158_P01_12_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_4_TOUT178_P31_4_OUT

IfxGtm_ATOM5_4_TOUT178_P31_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_4_TOUT210_P25_4_OUT

IfxGtm_ATOM5_4_TOUT210_P25_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_4_TOUT245_P15_13_OUT

IfxGtm_ATOM5_4_TOUT245_P15_13_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_4_TOUT248_P13_9_OUT

IfxGtm_ATOM5_4_TOUT248_P13_9_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_4_TOUT268_P10_13_OUT

IfxGtm_ATOM5_4_TOUT268_P10_13_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_5N_TOUT119_P11_0_OUT

IfxGtm_ATOM5_5N_TOUT119_P11_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_5N_TOUT155_P01_0_OUT

IfxGtm_ATOM5_5N_TOUT155_P01_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_5N_TOUT162_P01_8_OUT

IfxGtm_ATOM5_5N_TOUT162_P01_8_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_5N_TOUT174_P31_0_OUT

IfxGtm_ATOM5_5N_TOUT174_P31_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_5N_TOUT206_P25_0_OUT

IfxGtm_ATOM5_5N_TOUT206_P25_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_5_TOUT124_P11_8_OUT

IfxGtm_ATOM5_5_TOUT124_P11_8_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_5_TOUT135_P22_9_OUT

IfxGtm_ATOM5_5_TOUT135_P22_9_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_5_TOUT140_P32_5_OUT

IfxGtm_ATOM5_5_TOUT140_P32_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_5_TOUT159_P01_1_OUT

IfxGtm_ATOM5_5_TOUT159_P01_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_5_TOUT179_P31_5_OUT

IfxGtm_ATOM5_5_TOUT179_P31_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_5_TOUT211_P25_5_OUT

IfxGtm_ATOM5_5_TOUT211_P25_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_5_TOUT246_P15_14_OUT

IfxGtm_ATOM5_5_TOUT246_P15_14_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_5_TOUT250_P13_11_OUT

IfxGtm_ATOM5_5_TOUT250_P13_11_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_5_TOUT269_P10_11_OUT

IfxGtm_ATOM5_5_TOUT269_P10_11_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_6N_TOUT120_P11_1_OUT

IfxGtm_ATOM5_6N_TOUT120_P11_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_6N_TOUT156_P01_2_OUT

IfxGtm_ATOM5_6N_TOUT156_P01_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_6N_TOUT158_P01_12_OUT

IfxGtm_ATOM5_6N_TOUT158_P01_12_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_6N_TOUT175_P31_1_OUT

IfxGtm_ATOM5_6N_TOUT175_P31_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_6N_TOUT207_P25_1_OUT

IfxGtm_ATOM5_6N_TOUT207_P25_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_6N_TOUT96_P11_3_OUT

IfxGtm_ATOM5_6N_TOUT96_P11_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_6_TOUT125_P11_13_OUT

IfxGtm_ATOM5_6_TOUT125_P11_13_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_6_TOUT136_P22_10_OUT

IfxGtm_ATOM5_6_TOUT136_P22_10_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_6_TOUT141_P32_6_OUT

IfxGtm_ATOM5_6_TOUT141_P32_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_6_TOUT160_P01_9_OUT

IfxGtm_ATOM5_6_TOUT160_P01_9_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_6_TOUT180_P31_6_OUT

IfxGtm_ATOM5_6_TOUT180_P31_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_6_TOUT212_P25_6_OUT

IfxGtm_ATOM5_6_TOUT212_P25_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_6_TOUT212_P26_0_OUT

IfxGtm_ATOM5_6_TOUT212_P26_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_6_TOUT247_P15_15_OUT

IfxGtm_ATOM5_6_TOUT247_P15_15_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_6_TOUT249_P13_12_OUT

IfxGtm_ATOM5_6_TOUT249_P13_12_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_6_TOUT270_P10_15_OUT

IfxGtm_ATOM5_6_TOUT270_P10_15_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_7N_TOUT121_P11_4_OUT

IfxGtm_ATOM5_7N_TOUT121_P11_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_7N_TOUT152_P02_15_OUT

IfxGtm_ATOM5_7N_TOUT152_P02_15_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_7N_TOUT157_P01_15_OUT

IfxGtm_ATOM5_7N_TOUT157_P01_15_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_7N_TOUT176_P31_2_OUT

IfxGtm_ATOM5_7N_TOUT176_P31_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_7N_TOUT208_P25_2_OUT

IfxGtm_ATOM5_7N_TOUT208_P25_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_7_TOUT126_P11_14_OUT

IfxGtm_ATOM5_7_TOUT126_P11_14_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_7_TOUT137_P22_11_OUT

IfxGtm_ATOM5_7_TOUT137_P22_11_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_7_TOUT142_P32_7_OUT

IfxGtm_ATOM5_7_TOUT142_P32_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_7_TOUT161_P01_13_OUT

IfxGtm_ATOM5_7_TOUT161_P01_13_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_7_TOUT181_P31_7_OUT

IfxGtm_ATOM5_7_TOUT181_P31_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_7_TOUT213_P25_7_OUT

IfxGtm_ATOM5_7_TOUT213_P25_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_7_TOUT248_P13_9_OUT

IfxGtm_ATOM5_7_TOUT248_P13_9_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_0_TOUT127_P11_15_OUT

IfxGtm_ATOM6_0_TOUT127_P11_15_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_0_TOUT141_P32_6_OUT

IfxGtm_ATOM6_0_TOUT141_P32_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_0_TOUT155_P01_0_OUT

IfxGtm_ATOM6_0_TOUT155_P01_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_0_TOUT162_P01_8_OUT

IfxGtm_ATOM6_0_TOUT162_P01_8_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_0_TOUT182_P31_8_OUT

IfxGtm_ATOM6_0_TOUT182_P31_8_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_0_TOUT214_P25_8_OUT

IfxGtm_ATOM6_0_TOUT214_P25_8_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_0_TOUT242_P15_10_OUT

IfxGtm_ATOM6_0_TOUT242_P15_10_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_0_TOUT250_P13_11_OUT

IfxGtm_ATOM6_0_TOUT250_P13_11_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_1_TOUT128_P12_0_OUT

IfxGtm_ATOM6_1_TOUT128_P12_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_1_TOUT142_P32_7_OUT

IfxGtm_ATOM6_1_TOUT142_P32_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_1_TOUT156_P01_2_OUT

IfxGtm_ATOM6_1_TOUT156_P01_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_1_TOUT164_P01_14_OUT

IfxGtm_ATOM6_1_TOUT164_P01_14_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_1_TOUT183_P31_9_OUT

IfxGtm_ATOM6_1_TOUT183_P31_9_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_1_TOUT215_P25_9_OUT

IfxGtm_ATOM6_1_TOUT215_P25_9_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_1_TOUT251_P13_10_OUT

IfxGtm_ATOM6_1_TOUT251_P13_10_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_1_TOUT258_P14_11_OUT

IfxGtm_ATOM6_1_TOUT258_P14_11_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_2_TOUT129_P12_1_OUT

IfxGtm_ATOM6_2_TOUT129_P12_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_2_TOUT143_P33_14_OUT

IfxGtm_ATOM6_2_TOUT143_P33_14_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_2_TOUT152_P02_15_OUT

IfxGtm_ATOM6_2_TOUT152_P02_15_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_2_TOUT157_P01_15_OUT

IfxGtm_ATOM6_2_TOUT157_P01_15_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_2_TOUT184_P31_10_OUT

IfxGtm_ATOM6_2_TOUT184_P31_10_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_2_TOUT216_P25_10_OUT

IfxGtm_ATOM6_2_TOUT216_P25_10_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_2_TOUT252_P13_14_OUT

IfxGtm_ATOM6_2_TOUT252_P13_14_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_2_TOUT259_P14_14_OUT

IfxGtm_ATOM6_2_TOUT259_P14_14_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_3_TOUT111_P01_3_OUT

IfxGtm_ATOM6_3_TOUT111_P01_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_3_TOUT144_P33_15_OUT

IfxGtm_ATOM6_3_TOUT144_P33_15_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_3_TOUT163_P01_10_OUT

IfxGtm_ATOM6_3_TOUT163_P01_10_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_3_TOUT165_P01_11_OUT

IfxGtm_ATOM6_3_TOUT165_P01_11_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_3_TOUT185_P31_11_OUT

IfxGtm_ATOM6_3_TOUT185_P31_11_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_3_TOUT217_P25_11_OUT

IfxGtm_ATOM6_3_TOUT217_P25_11_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_3_TOUT253_P13_4_OUT

IfxGtm_ATOM6_3_TOUT253_P13_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_3_TOUT260_P14_13_OUT

IfxGtm_ATOM6_3_TOUT260_P14_13_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_4_TOUT140_P32_5_OUT

IfxGtm_ATOM6_4_TOUT140_P32_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_4_TOUT143_P33_14_OUT

IfxGtm_ATOM6_4_TOUT143_P33_14_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_4_TOUT158_P01_12_OUT

IfxGtm_ATOM6_4_TOUT158_P01_12_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_4_TOUT186_P31_12_OUT

IfxGtm_ATOM6_4_TOUT186_P31_12_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_4_TOUT218_P25_12_OUT

IfxGtm_ATOM6_4_TOUT218_P25_12_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_4_TOUT254_P13_5_OUT

IfxGtm_ATOM6_4_TOUT254_P13_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_4_TOUT261_P14_12_OUT

IfxGtm_ATOM6_4_TOUT261_P14_12_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_4_TOUT31_P33_9_OUT

IfxGtm_ATOM6_4_TOUT31_P33_9_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_5_TOUT146_P34_1_OUT

IfxGtm_ATOM6_5_TOUT146_P34_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_5_TOUT159_P01_1_OUT

IfxGtm_ATOM6_5_TOUT159_P01_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_5_TOUT187_P31_13_OUT

IfxGtm_ATOM6_5_TOUT187_P31_13_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_5_TOUT219_P25_13_OUT

IfxGtm_ATOM6_5_TOUT219_P25_13_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_5_TOUT243_P15_11_OUT

IfxGtm_ATOM6_5_TOUT243_P15_11_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_5_TOUT255_P13_6_OUT

IfxGtm_ATOM6_5_TOUT255_P13_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_5_TOUT262_P13_13_OUT

IfxGtm_ATOM6_5_TOUT262_P13_13_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_6_TOUT147_P34_2_OUT

IfxGtm_ATOM6_6_TOUT147_P34_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_6_TOUT160_P01_9_OUT

IfxGtm_ATOM6_6_TOUT160_P01_9_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_6_TOUT188_P31_14_OUT

IfxGtm_ATOM6_6_TOUT188_P31_14_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_6_TOUT220_P25_14_OUT

IfxGtm_ATOM6_6_TOUT220_P25_14_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_6_TOUT256_P13_7_OUT

IfxGtm_ATOM6_6_TOUT256_P13_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_6_TOUT263_P14_15_OUT

IfxGtm_ATOM6_6_TOUT263_P14_15_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_7_TOUT148_P34_3_OUT

IfxGtm_ATOM6_7_TOUT148_P34_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_7_TOUT161_P01_13_OUT

IfxGtm_ATOM6_7_TOUT161_P01_13_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_7_TOUT189_P31_15_OUT

IfxGtm_ATOM6_7_TOUT189_P31_15_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_7_TOUT221_P25_15_OUT

IfxGtm_ATOM6_7_TOUT221_P25_15_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_7_TOUT244_P15_12_OUT

IfxGtm_ATOM6_7_TOUT244_P15_12_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_7_TOUT264_P13_15_OUT

IfxGtm_ATOM6_7_TOUT264_P13_15_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_0_TOUT149_P34_4_OUT

IfxGtm_ATOM7_0_TOUT149_P34_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_0_TOUT162_P01_8_OUT

IfxGtm_ATOM7_0_TOUT162_P01_8_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_0_TOUT190_P30_0_OUT

IfxGtm_ATOM7_0_TOUT190_P30_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_0_TOUT222_P24_0_OUT

IfxGtm_ATOM7_0_TOUT222_P24_0_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_0_TOUT249_P13_12_OUT

IfxGtm_ATOM7_0_TOUT249_P13_12_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_0_TOUT258_P14_11_OUT

IfxGtm_ATOM7_0_TOUT258_P14_11_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_1_TOUT150_P34_5_OUT

IfxGtm_ATOM7_1_TOUT150_P34_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_1_TOUT163_P01_10_OUT

IfxGtm_ATOM7_1_TOUT163_P01_10_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_1_TOUT191_P30_1_OUT

IfxGtm_ATOM7_1_TOUT191_P30_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_1_TOUT223_P24_1_OUT

IfxGtm_ATOM7_1_TOUT223_P24_1_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_1_TOUT242_P15_10_OUT

IfxGtm_ATOM7_1_TOUT242_P15_10_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_1_TOUT245_P15_13_OUT

IfxGtm_ATOM7_1_TOUT245_P15_13_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_1_TOUT253_P13_4_OUT

IfxGtm_ATOM7_1_TOUT253_P13_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_1_TOUT265_P10_9_OUT

IfxGtm_ATOM7_1_TOUT265_P10_9_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_2_TOUT164_P01_14_OUT

IfxGtm_ATOM7_2_TOUT164_P01_14_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_2_TOUT192_P30_2_OUT

IfxGtm_ATOM7_2_TOUT192_P30_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_2_TOUT224_P24_2_OUT

IfxGtm_ATOM7_2_TOUT224_P24_2_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_2_TOUT243_P15_11_OUT

IfxGtm_ATOM7_2_TOUT243_P15_11_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_2_TOUT246_P15_14_OUT

IfxGtm_ATOM7_2_TOUT246_P15_14_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_2_TOUT254_P13_5_OUT

IfxGtm_ATOM7_2_TOUT254_P13_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_2_TOUT266_P10_10_OUT

IfxGtm_ATOM7_2_TOUT266_P10_10_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_3_TOUT166_P00_14_OUT

IfxGtm_ATOM7_3_TOUT166_P00_14_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_3_TOUT193_P30_3_OUT

IfxGtm_ATOM7_3_TOUT193_P30_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_3_TOUT225_P24_3_OUT

IfxGtm_ATOM7_3_TOUT225_P24_3_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_3_TOUT244_P15_12_OUT

IfxGtm_ATOM7_3_TOUT244_P15_12_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_3_TOUT247_P15_15_OUT

IfxGtm_ATOM7_3_TOUT247_P15_15_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_3_TOUT255_P13_6_OUT

IfxGtm_ATOM7_3_TOUT255_P13_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_3_TOUT267_P10_14_OUT

IfxGtm_ATOM7_3_TOUT267_P10_14_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_4_TOUT167_P00_13_OUT

IfxGtm_ATOM7_4_TOUT167_P00_13_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_4_TOUT194_P30_4_OUT

IfxGtm_ATOM7_4_TOUT194_P30_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_4_TOUT226_P24_4_OUT

IfxGtm_ATOM7_4_TOUT226_P24_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_4_TOUT245_P15_13_OUT

IfxGtm_ATOM7_4_TOUT245_P15_13_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_4_TOUT248_P13_9_OUT

IfxGtm_ATOM7_4_TOUT248_P13_9_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_4_TOUT268_P10_13_OUT

IfxGtm_ATOM7_4_TOUT268_P10_13_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_5_TOUT168_P00_15_OUT

IfxGtm_ATOM7_5_TOUT168_P00_15_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_5_TOUT195_P30_5_OUT

IfxGtm_ATOM7_5_TOUT195_P30_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_5_TOUT227_P24_5_OUT

IfxGtm_ATOM7_5_TOUT227_P24_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_5_TOUT246_P15_14_OUT

IfxGtm_ATOM7_5_TOUT246_P15_14_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_5_TOUT251_P13_10_OUT

IfxGtm_ATOM7_5_TOUT251_P13_10_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_5_TOUT269_P10_11_OUT

IfxGtm_ATOM7_5_TOUT269_P10_11_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_6_TOUT151_P02_12_OUT

IfxGtm_ATOM7_6_TOUT151_P02_12_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_6_TOUT153_P02_13_OUT

IfxGtm_ATOM7_6_TOUT153_P02_13_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_6_TOUT196_P30_6_OUT

IfxGtm_ATOM7_6_TOUT196_P30_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_6_TOUT228_P24_6_OUT

IfxGtm_ATOM7_6_TOUT228_P24_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_6_TOUT247_P15_15_OUT

IfxGtm_ATOM7_6_TOUT247_P15_15_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_6_TOUT249_P13_12_OUT

IfxGtm_ATOM7_6_TOUT249_P13_12_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_6_TOUT270_P10_15_OUT

IfxGtm_ATOM7_6_TOUT270_P10_15_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_7_TOUT152_P02_15_OUT

IfxGtm_ATOM7_7_TOUT152_P02_15_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_7_TOUT154_P02_14_OUT

IfxGtm_ATOM7_7_TOUT154_P02_14_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_7_TOUT161_P01_13_OUT

IfxGtm_ATOM7_7_TOUT161_P01_13_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_7_TOUT197_P30_7_OUT

IfxGtm_ATOM7_7_TOUT197_P30_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_7_TOUT229_P24_7_OUT

IfxGtm_ATOM7_7_TOUT229_P24_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_7_TOUT248_P13_9_OUT

IfxGtm_ATOM7_7_TOUT248_P13_9_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_7_TOUT261_P14_12_OUT

IfxGtm_ATOM7_7_TOUT261_P14_12_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_0_TOUT162_P01_8_OUT

IfxGtm_ATOM8_0_TOUT162_P01_8_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_0_TOUT198_P30_8_OUT

IfxGtm_ATOM8_0_TOUT198_P30_8_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_0_TOUT230_P24_8_OUT

IfxGtm_ATOM8_0_TOUT230_P24_8_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_0_TOUT242_P15_10_OUT

IfxGtm_ATOM8_0_TOUT242_P15_10_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_0_TOUT250_P13_11_OUT

IfxGtm_ATOM8_0_TOUT250_P13_11_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_1_TOUT163_P01_10_OUT

IfxGtm_ATOM8_1_TOUT163_P01_10_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_1_TOUT199_P30_9_OUT

IfxGtm_ATOM8_1_TOUT199_P30_9_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_1_TOUT231_P24_9_OUT

IfxGtm_ATOM8_1_TOUT231_P24_9_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_1_TOUT251_P13_10_OUT

IfxGtm_ATOM8_1_TOUT251_P13_10_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_1_TOUT258_P14_11_OUT

IfxGtm_ATOM8_1_TOUT258_P14_11_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_2_TOUT164_P01_14_OUT

IfxGtm_ATOM8_2_TOUT164_P01_14_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_2_TOUT200_P30_10_OUT

IfxGtm_ATOM8_2_TOUT200_P30_10_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_2_TOUT232_P24_10_OUT

IfxGtm_ATOM8_2_TOUT232_P24_10_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_2_TOUT252_P13_14_OUT

IfxGtm_ATOM8_2_TOUT252_P13_14_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_2_TOUT259_P14_14_OUT

IfxGtm_ATOM8_2_TOUT259_P14_14_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_3_TOUT166_P00_14_OUT

IfxGtm_ATOM8_3_TOUT166_P00_14_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_3_TOUT201_P30_11_OUT

IfxGtm_ATOM8_3_TOUT201_P30_11_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_3_TOUT233_P24_11_OUT

IfxGtm_ATOM8_3_TOUT233_P24_11_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_3_TOUT253_P13_4_OUT

IfxGtm_ATOM8_3_TOUT253_P13_4_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_3_TOUT260_P14_13_OUT

IfxGtm_ATOM8_3_TOUT260_P14_13_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_4_TOUT167_P00_13_OUT

IfxGtm_ATOM8_4_TOUT167_P00_13_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_4_TOUT202_P30_12_OUT

IfxGtm_ATOM8_4_TOUT202_P30_12_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_4_TOUT234_P24_12_OUT

IfxGtm_ATOM8_4_TOUT234_P24_12_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_4_TOUT254_P13_5_OUT

IfxGtm_ATOM8_4_TOUT254_P13_5_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_4_TOUT261_P14_12_OUT

IfxGtm_ATOM8_4_TOUT261_P14_12_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_5_TOUT168_P00_15_OUT

IfxGtm_ATOM8_5_TOUT168_P00_15_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_5_TOUT203_P30_13_OUT

IfxGtm_ATOM8_5_TOUT203_P30_13_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_5_TOUT235_P24_13_OUT

IfxGtm_ATOM8_5_TOUT235_P24_13_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_5_TOUT243_P15_11_OUT

IfxGtm_ATOM8_5_TOUT243_P15_11_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_5_TOUT255_P13_6_OUT

IfxGtm_ATOM8_5_TOUT255_P13_6_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_5_TOUT262_P13_13_OUT

IfxGtm_ATOM8_5_TOUT262_P13_13_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_6_TOUT151_P02_12_OUT

IfxGtm_ATOM8_6_TOUT151_P02_12_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_6_TOUT153_P02_13_OUT

IfxGtm_ATOM8_6_TOUT153_P02_13_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_6_TOUT204_P30_14_OUT

IfxGtm_ATOM8_6_TOUT204_P30_14_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_6_TOUT236_P24_14_OUT

IfxGtm_ATOM8_6_TOUT236_P24_14_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_6_TOUT256_P13_7_OUT

IfxGtm_ATOM8_6_TOUT256_P13_7_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_6_TOUT263_P14_15_OUT

IfxGtm_ATOM8_6_TOUT263_P14_15_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_7_TOUT152_P02_15_OUT

IfxGtm_ATOM8_7_TOUT152_P02_15_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_7_TOUT154_P02_14_OUT

IfxGtm_ATOM8_7_TOUT154_P02_14_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_7_TOUT161_P01_13_OUT

IfxGtm_ATOM8_7_TOUT161_P01_13_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_7_TOUT205_P30_15_OUT

IfxGtm_ATOM8_7_TOUT205_P30_15_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_7_TOUT237_P24_15_OUT

IfxGtm_ATOM8_7_TOUT237_P24_15_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_7_TOUT244_P15_12_OUT

IfxGtm_ATOM8_7_TOUT244_P15_12_OUT. More...

IFX_EXTERN IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_7_TOUT264_P13_15_OUT

IfxGtm_ATOM8_7_TOUT264_P13_15_OUT. More...

IFX_EXTERN IfxGtm_Clk_Out

IfxGtm_CLK0_P23_1_OUT

CGM generated clock. More...

IFX_EXTERN IfxGtm_Clk_Out

IfxGtm_CLK1_P32_4_OUT

CGM generated clock. More...

IFX_EXTERN IfxGtm_Clk_Out

IfxGtm_CLK2_P11_12_OUT

CGM generated clock. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_0_P00_9_IN

IfxGtm_TIM0_0_P00_9_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_0_P02_0_IN

IfxGtm_TIM0_0_P02_0_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_0_P10_7_IN

IfxGtm_TIM0_0_P10_7_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_0_P13_12_IN

IfxGtm_TIM0_0_P13_12_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_0_P14_5_IN

IfxGtm_TIM0_0_P14_5_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_0_P14_7_IN

IfxGtm_TIM0_0_P14_7_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_0_P15_6_IN

IfxGtm_TIM0_0_P15_6_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_0_P21_2_IN

IfxGtm_TIM0_0_P21_2_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_0_P22_1_IN

IfxGtm_TIM0_0_P22_1_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_0_P33_10_IN

IfxGtm_TIM0_0_P33_10_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_0_P33_4_IN

IfxGtm_TIM0_0_P33_4_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_1_P00_10_IN

IfxGtm_TIM0_1_P00_10_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_1_P02_1_IN

IfxGtm_TIM0_1_P02_1_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_1_P10_1_IN

IfxGtm_TIM0_1_P10_1_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_1_P10_9_IN

IfxGtm_TIM0_1_P10_9_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_1_P14_6_IN

IfxGtm_TIM0_1_P14_6_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_1_P15_7_IN

IfxGtm_TIM0_1_P15_7_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_1_P21_3_IN

IfxGtm_TIM0_1_P21_3_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_1_P22_0_IN

IfxGtm_TIM0_1_P22_0_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_1_P33_5_IN

IfxGtm_TIM0_1_P33_5_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_1_P33_9_IN

IfxGtm_TIM0_1_P33_9_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_2_P00_11_IN

IfxGtm_TIM0_2_P00_11_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_2_P02_2_IN

IfxGtm_TIM0_2_P02_2_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_2_P02_9_IN

IfxGtm_TIM0_2_P02_9_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_2_P10_10_IN

IfxGtm_TIM0_2_P10_10_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_2_P10_2_IN

IfxGtm_TIM0_2_P10_2_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_2_P10_5_IN

IfxGtm_TIM0_2_P10_5_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_2_P15_8_IN

IfxGtm_TIM0_2_P15_8_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_2_P21_4_IN

IfxGtm_TIM0_2_P21_4_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_2_P23_5_IN

IfxGtm_TIM0_2_P23_5_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_2_P33_11_IN

IfxGtm_TIM0_2_P33_11_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_2_P33_6_IN

IfxGtm_TIM0_2_P33_6_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_3_P00_12_IN

IfxGtm_TIM0_3_P00_12_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_3_P02_10_IN

IfxGtm_TIM0_3_P02_10_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_3_P02_3_IN

IfxGtm_TIM0_3_P02_3_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_3_P10_14_IN

IfxGtm_TIM0_3_P10_14_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_3_P10_3_IN

IfxGtm_TIM0_3_P10_3_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_3_P10_6_IN

IfxGtm_TIM0_3_P10_6_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_3_P14_0_IN

IfxGtm_TIM0_3_P14_0_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_3_P21_5_IN

IfxGtm_TIM0_3_P21_5_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_3_P22_2_IN

IfxGtm_TIM0_3_P22_2_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_3_P32_2_IN

IfxGtm_TIM0_3_P32_2_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_3_P33_7_IN

IfxGtm_TIM0_3_P33_7_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_4_P02_4_IN

IfxGtm_TIM0_4_P02_4_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_4_P10_0_IN

IfxGtm_TIM0_4_P10_0_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_4_P10_13_IN

IfxGtm_TIM0_4_P10_13_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_4_P14_1_IN

IfxGtm_TIM0_4_P14_1_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_4_P21_6_IN

IfxGtm_TIM0_4_P21_6_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_4_P22_3_IN

IfxGtm_TIM0_4_P22_3_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_4_P32_3_IN

IfxGtm_TIM0_4_P32_3_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_4_P33_0_IN

IfxGtm_TIM0_4_P33_0_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_4_P33_8_IN

IfxGtm_TIM0_4_P33_8_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_5_P01_3_IN

IfxGtm_TIM0_5_P01_3_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_5_P02_5_IN

IfxGtm_TIM0_5_P02_5_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_5_P10_11_IN

IfxGtm_TIM0_5_P10_11_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_5_P10_8_IN

IfxGtm_TIM0_5_P10_8_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_5_P14_2_IN

IfxGtm_TIM0_5_P14_2_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_5_P21_7_IN

IfxGtm_TIM0_5_P21_7_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_5_P23_0_IN

IfxGtm_TIM0_5_P23_0_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_5_P32_4_IN

IfxGtm_TIM0_5_P32_4_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_5_P33_1_IN

IfxGtm_TIM0_5_P33_1_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_6_P01_4_IN

IfxGtm_TIM0_6_P01_4_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_6_P02_6_IN

IfxGtm_TIM0_6_P02_6_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_6_P10_15_IN

IfxGtm_TIM0_6_P10_15_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_6_P10_4_IN

IfxGtm_TIM0_6_P10_4_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_6_P14_3_IN

IfxGtm_TIM0_6_P14_3_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_6_P20_0_IN

IfxGtm_TIM0_6_P20_0_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_6_P23_1_IN

IfxGtm_TIM0_6_P23_1_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_6_P23_2_IN

IfxGtm_TIM0_6_P23_2_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_6_P33_2_IN

IfxGtm_TIM0_6_P33_2_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_7_P02_11_IN

IfxGtm_TIM0_7_P02_11_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_7_P02_7_IN

IfxGtm_TIM0_7_P02_7_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_7_P11_15_IN

IfxGtm_TIM0_7_P11_15_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_7_P14_4_IN

IfxGtm_TIM0_7_P14_4_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_7_P20_8_IN

IfxGtm_TIM0_7_P20_8_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_7_P23_3_IN

IfxGtm_TIM0_7_P23_3_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_7_P23_4_IN

IfxGtm_TIM0_7_P23_4_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM0_7_P33_3_IN

IfxGtm_TIM0_7_P33_3_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_0_P00_9_IN

IfxGtm_TIM1_0_P00_9_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_0_P02_0_IN

IfxGtm_TIM1_0_P02_0_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_0_P10_7_IN

IfxGtm_TIM1_0_P10_7_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_0_P14_5_IN

IfxGtm_TIM1_0_P14_5_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_0_P14_7_IN

IfxGtm_TIM1_0_P14_7_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_0_P15_6_IN

IfxGtm_TIM1_0_P15_6_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_0_P21_2_IN

IfxGtm_TIM1_0_P21_2_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_0_P22_1_IN

IfxGtm_TIM1_0_P22_1_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_0_P33_10_IN

IfxGtm_TIM1_0_P33_10_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_0_P33_4_IN

IfxGtm_TIM1_0_P33_4_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_1_P00_10_IN

IfxGtm_TIM1_1_P00_10_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_1_P02_1_IN

IfxGtm_TIM1_1_P02_1_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_1_P10_1_IN

IfxGtm_TIM1_1_P10_1_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_1_P14_6_IN

IfxGtm_TIM1_1_P14_6_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_1_P15_7_IN

IfxGtm_TIM1_1_P15_7_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_1_P21_3_IN

IfxGtm_TIM1_1_P21_3_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_1_P22_0_IN

IfxGtm_TIM1_1_P22_0_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_1_P33_5_IN

IfxGtm_TIM1_1_P33_5_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_1_P33_9_IN

IfxGtm_TIM1_1_P33_9_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_2_P00_11_IN

IfxGtm_TIM1_2_P00_11_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_2_P02_2_IN

IfxGtm_TIM1_2_P02_2_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_2_P10_2_IN

IfxGtm_TIM1_2_P10_2_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_2_P10_5_IN

IfxGtm_TIM1_2_P10_5_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_2_P15_8_IN

IfxGtm_TIM1_2_P15_8_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_2_P21_4_IN

IfxGtm_TIM1_2_P21_4_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_2_P23_5_IN

IfxGtm_TIM1_2_P23_5_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_2_P23_6_IN

IfxGtm_TIM1_2_P23_6_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_2_P33_11_IN

IfxGtm_TIM1_2_P33_11_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_2_P33_6_IN

IfxGtm_TIM1_2_P33_6_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_3_P00_12_IN

IfxGtm_TIM1_3_P00_12_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_3_P02_3_IN

IfxGtm_TIM1_3_P02_3_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_3_P10_3_IN

IfxGtm_TIM1_3_P10_3_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_3_P10_6_IN

IfxGtm_TIM1_3_P10_6_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_3_P14_0_IN

IfxGtm_TIM1_3_P14_0_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_3_P21_5_IN

IfxGtm_TIM1_3_P21_5_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_3_P22_2_IN

IfxGtm_TIM1_3_P22_2_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_3_P23_7_IN

IfxGtm_TIM1_3_P23_7_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_3_P32_2_IN

IfxGtm_TIM1_3_P32_2_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_3_P33_7_IN

IfxGtm_TIM1_3_P33_7_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_4_P02_4_IN

IfxGtm_TIM1_4_P02_4_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_4_P10_0_IN

IfxGtm_TIM1_4_P10_0_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_4_P14_1_IN

IfxGtm_TIM1_4_P14_1_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_4_P20_0_IN

IfxGtm_TIM1_4_P20_0_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_4_P21_6_IN

IfxGtm_TIM1_4_P21_6_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_4_P22_3_IN

IfxGtm_TIM1_4_P22_3_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_4_P32_3_IN

IfxGtm_TIM1_4_P32_3_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_4_P33_0_IN

IfxGtm_TIM1_4_P33_0_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_4_P33_8_IN

IfxGtm_TIM1_4_P33_8_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_5_P02_5_IN

IfxGtm_TIM1_5_P02_5_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_5_P10_8_IN

IfxGtm_TIM1_5_P10_8_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_5_P14_2_IN

IfxGtm_TIM1_5_P14_2_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_5_P20_7_IN

IfxGtm_TIM1_5_P20_7_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_5_P21_7_IN

IfxGtm_TIM1_5_P21_7_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_5_P23_0_IN

IfxGtm_TIM1_5_P23_0_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_5_P32_4_IN

IfxGtm_TIM1_5_P32_4_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_5_P33_1_IN

IfxGtm_TIM1_5_P33_1_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_6_P02_6_IN

IfxGtm_TIM1_6_P02_6_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_6_P10_4_IN

IfxGtm_TIM1_6_P10_4_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_6_P14_3_IN

IfxGtm_TIM1_6_P14_3_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_6_P20_0_IN

IfxGtm_TIM1_6_P20_0_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_6_P23_1_IN

IfxGtm_TIM1_6_P23_1_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_6_P23_2_IN

IfxGtm_TIM1_6_P23_2_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_6_P33_2_IN

IfxGtm_TIM1_6_P33_2_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_7_P02_7_IN

IfxGtm_TIM1_7_P02_7_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_7_P14_4_IN

IfxGtm_TIM1_7_P14_4_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_7_P20_8_IN

IfxGtm_TIM1_7_P20_8_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_7_P23_3_IN

IfxGtm_TIM1_7_P23_3_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_7_P23_4_IN

IfxGtm_TIM1_7_P23_4_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM1_7_P33_3_IN

IfxGtm_TIM1_7_P33_3_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_0_P00_0_IN

IfxGtm_TIM2_0_P00_0_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_0_P01_3_IN

IfxGtm_TIM2_0_P01_3_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_0_P02_8_IN

IfxGtm_TIM2_0_P02_8_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_0_P11_0_IN

IfxGtm_TIM2_0_P11_0_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_0_P11_10_IN

IfxGtm_TIM2_0_P11_10_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_0_P13_3_IN

IfxGtm_TIM2_0_P13_3_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_0_P15_5_IN

IfxGtm_TIM2_0_P15_5_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_0_P20_12_IN

IfxGtm_TIM2_0_P20_12_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_0_P31_0_IN

IfxGtm_TIM2_0_P31_0_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_0_P33_12_IN

IfxGtm_TIM2_0_P33_12_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_0_P33_14_IN

IfxGtm_TIM2_0_P33_14_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_1_P00_1_IN

IfxGtm_TIM2_1_P00_1_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_1_P00_2_IN

IfxGtm_TIM2_1_P00_2_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_1_P01_4_IN

IfxGtm_TIM2_1_P01_4_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_1_P11_1_IN

IfxGtm_TIM2_1_P11_1_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_1_P11_2_IN

IfxGtm_TIM2_1_P11_2_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_1_P15_10_IN

IfxGtm_TIM2_1_P15_10_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_1_P20_13_IN

IfxGtm_TIM2_1_P20_13_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_1_P31_1_IN

IfxGtm_TIM2_1_P31_1_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_1_P33_13_IN

IfxGtm_TIM2_1_P33_13_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_1_P33_15_IN

IfxGtm_TIM2_1_P33_15_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_2_P00_3_IN

IfxGtm_TIM2_2_P00_3_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_2_P01_5_IN

IfxGtm_TIM2_2_P01_5_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_2_P11_3_IN

IfxGtm_TIM2_2_P11_3_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_2_P11_4_IN

IfxGtm_TIM2_2_P11_4_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_2_P14_8_IN

IfxGtm_TIM2_2_P14_8_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_2_P15_11_IN

IfxGtm_TIM2_2_P15_11_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_2_P15_6_IN

IfxGtm_TIM2_2_P15_6_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_2_P20_14_IN

IfxGtm_TIM2_2_P20_14_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_2_P31_2_IN

IfxGtm_TIM2_2_P31_2_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_2_P32_0_IN

IfxGtm_TIM2_2_P32_0_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_3_P00_4_IN

IfxGtm_TIM2_3_P00_4_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_3_P01_5_IN

IfxGtm_TIM2_3_P01_5_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_3_P11_5_IN

IfxGtm_TIM2_3_P11_5_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_3_P11_6_IN

IfxGtm_TIM2_3_P11_6_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_3_P14_9_IN

IfxGtm_TIM2_3_P14_9_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_3_P15_0_IN

IfxGtm_TIM2_3_P15_0_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_3_P15_12_IN

IfxGtm_TIM2_3_P15_12_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_3_P20_1_IN

IfxGtm_TIM2_3_P20_1_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_3_P31_3_IN

IfxGtm_TIM2_3_P31_3_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_3_P34_1_IN

IfxGtm_TIM2_3_P34_1_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_4_P00_5_IN

IfxGtm_TIM2_4_P00_5_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_4_P02_14_IN

IfxGtm_TIM2_4_P02_14_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_4_P11_7_IN

IfxGtm_TIM2_4_P11_7_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_4_P11_9_IN

IfxGtm_TIM2_4_P11_9_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_4_P14_10_IN

IfxGtm_TIM2_4_P14_10_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_4_P15_13_IN

IfxGtm_TIM2_4_P15_13_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_4_P15_1_IN

IfxGtm_TIM2_4_P15_1_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_4_P20_3_IN

IfxGtm_TIM2_4_P20_3_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_4_P21_0_IN

IfxGtm_TIM2_4_P21_0_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_4_P31_4_IN

IfxGtm_TIM2_4_P31_4_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_4_P34_2_IN

IfxGtm_TIM2_4_P34_2_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_5_P00_6_IN

IfxGtm_TIM2_5_P00_6_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_5_P01_6_IN

IfxGtm_TIM2_5_P01_6_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_5_P02_15_IN

IfxGtm_TIM2_5_P02_15_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_5_P11_10_IN

IfxGtm_TIM2_5_P11_10_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_5_P11_8_IN

IfxGtm_TIM2_5_P11_8_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_5_P13_0_IN

IfxGtm_TIM2_5_P13_0_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_5_P15_14_IN

IfxGtm_TIM2_5_P15_14_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_5_P15_2_IN

IfxGtm_TIM2_5_P15_2_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_5_P20_9_IN

IfxGtm_TIM2_5_P20_9_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_5_P21_1_IN

IfxGtm_TIM2_5_P21_1_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_5_P31_5_IN

IfxGtm_TIM2_5_P31_5_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_5_P34_3_IN

IfxGtm_TIM2_5_P34_3_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_6_P00_7_IN

IfxGtm_TIM2_6_P00_7_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_6_P01_0_IN

IfxGtm_TIM2_6_P01_0_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_6_P11_11_IN

IfxGtm_TIM2_6_P11_11_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_6_P11_13_IN

IfxGtm_TIM2_6_P11_13_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_6_P13_1_IN

IfxGtm_TIM2_6_P13_1_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_6_P15_15_IN

IfxGtm_TIM2_6_P15_15_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_6_P15_3_IN

IfxGtm_TIM2_6_P15_3_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_6_P20_10_IN

IfxGtm_TIM2_6_P20_10_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_6_P20_6_IN

IfxGtm_TIM2_6_P20_6_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_6_P22_6_IN

IfxGtm_TIM2_6_P22_6_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_6_P31_6_IN

IfxGtm_TIM2_6_P31_6_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_6_P34_4_IN

IfxGtm_TIM2_6_P34_4_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_7_P00_8_IN

IfxGtm_TIM2_7_P00_8_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_7_P01_7_IN

IfxGtm_TIM2_7_P01_7_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_7_P11_12_IN

IfxGtm_TIM2_7_P11_12_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_7_P11_14_IN

IfxGtm_TIM2_7_P11_14_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_7_P13_2_IN

IfxGtm_TIM2_7_P13_2_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_7_P13_9_IN

IfxGtm_TIM2_7_P13_9_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_7_P15_4_IN

IfxGtm_TIM2_7_P15_4_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_7_P20_11_IN

IfxGtm_TIM2_7_P20_11_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_7_P20_7_IN

IfxGtm_TIM2_7_P20_7_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_7_P31_7_IN

IfxGtm_TIM2_7_P31_7_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM2_7_P34_5_IN

IfxGtm_TIM2_7_P34_5_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_0_P00_0_IN

IfxGtm_TIM3_0_P00_0_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_0_P00_5_IN

IfxGtm_TIM3_0_P00_5_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_0_P02_6_IN

IfxGtm_TIM3_0_P02_6_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_0_P02_8_IN

IfxGtm_TIM3_0_P02_8_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_0_P11_11_IN

IfxGtm_TIM3_0_P11_11_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_0_P12_0_IN

IfxGtm_TIM3_0_P12_0_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_0_P13_11_IN

IfxGtm_TIM3_0_P13_11_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_0_P13_3_IN

IfxGtm_TIM3_0_P13_3_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_0_P15_5_IN

IfxGtm_TIM3_0_P15_5_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_0_P20_12_IN

IfxGtm_TIM3_0_P20_12_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_0_P22_4_IN

IfxGtm_TIM3_0_P22_4_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_0_P25_0_IN

IfxGtm_TIM3_0_P25_0_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_0_P33_0_IN

IfxGtm_TIM3_0_P33_0_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_0_P33_12_IN

IfxGtm_TIM3_0_P33_12_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_1_P00_1_IN

IfxGtm_TIM3_1_P00_1_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_1_P00_2_IN

IfxGtm_TIM3_1_P00_2_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_1_P00_6_IN

IfxGtm_TIM3_1_P00_6_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_1_P02_7_IN

IfxGtm_TIM3_1_P02_7_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_1_P11_2_IN

IfxGtm_TIM3_1_P11_2_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_1_P12_1_IN

IfxGtm_TIM3_1_P12_1_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_1_P13_10_IN

IfxGtm_TIM3_1_P13_10_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_1_P14_11_IN

IfxGtm_TIM3_1_P14_11_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_1_P20_13_IN

IfxGtm_TIM3_1_P20_13_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_1_P22_5_IN

IfxGtm_TIM3_1_P22_5_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_1_P25_1_IN

IfxGtm_TIM3_1_P25_1_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_1_P33_13_IN

IfxGtm_TIM3_1_P33_13_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_1_P33_1_IN

IfxGtm_TIM3_1_P33_1_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_2_P00_3_IN

IfxGtm_TIM3_2_P00_3_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_2_P00_7_IN

IfxGtm_TIM3_2_P00_7_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_2_P02_8_IN

IfxGtm_TIM3_2_P02_8_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_2_P11_3_IN

IfxGtm_TIM3_2_P11_3_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_2_P13_14_IN

IfxGtm_TIM3_2_P13_14_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_2_P14_14_IN

IfxGtm_TIM3_2_P14_14_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_2_P14_8_IN

IfxGtm_TIM3_2_P14_8_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_2_P20_14_IN

IfxGtm_TIM3_2_P20_14_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_2_P22_6_IN

IfxGtm_TIM3_2_P22_6_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_2_P25_2_IN

IfxGtm_TIM3_2_P25_2_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_2_P32_0_IN

IfxGtm_TIM3_2_P32_0_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_2_P33_2_IN

IfxGtm_TIM3_2_P33_2_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_3_P00_4_IN

IfxGtm_TIM3_3_P00_4_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_3_P00_8_IN

IfxGtm_TIM3_3_P00_8_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_3_P02_9_IN

IfxGtm_TIM3_3_P02_9_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_3_P11_6_IN

IfxGtm_TIM3_3_P11_6_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_3_P13_4_IN

IfxGtm_TIM3_3_P13_4_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_3_P14_13_IN

IfxGtm_TIM3_3_P14_13_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_3_P14_9_IN

IfxGtm_TIM3_3_P14_9_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_3_P15_0_IN

IfxGtm_TIM3_3_P15_0_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_3_P20_1_IN

IfxGtm_TIM3_3_P20_1_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_3_P22_7_IN

IfxGtm_TIM3_3_P22_7_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_3_P25_3_IN

IfxGtm_TIM3_3_P25_3_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_3_P32_1_IN

IfxGtm_TIM3_3_P32_1_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_3_P33_3_IN

IfxGtm_TIM3_3_P33_3_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_4_P00_5_IN

IfxGtm_TIM3_4_P00_5_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_4_P02_10_IN

IfxGtm_TIM3_4_P02_10_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_4_P11_9_IN

IfxGtm_TIM3_4_P11_9_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_4_P13_5_IN

IfxGtm_TIM3_4_P13_5_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_4_P14_10_IN

IfxGtm_TIM3_4_P14_10_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_4_P14_12_IN

IfxGtm_TIM3_4_P14_12_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_4_P15_1_IN

IfxGtm_TIM3_4_P15_1_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_4_P20_3_IN

IfxGtm_TIM3_4_P20_3_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_4_P21_0_IN

IfxGtm_TIM3_4_P21_0_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_4_P22_8_IN

IfxGtm_TIM3_4_P22_8_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_4_P25_4_IN

IfxGtm_TIM3_4_P25_4_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_4_P34_1_IN

IfxGtm_TIM3_4_P34_1_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_5_P00_6_IN

IfxGtm_TIM3_5_P00_6_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_5_P02_11_IN

IfxGtm_TIM3_5_P02_11_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_5_P11_10_IN

IfxGtm_TIM3_5_P11_10_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_5_P13_0_IN

IfxGtm_TIM3_5_P13_0_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_5_P13_13_IN

IfxGtm_TIM3_5_P13_13_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_5_P13_6_IN

IfxGtm_TIM3_5_P13_6_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_5_P15_2_IN

IfxGtm_TIM3_5_P15_2_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_5_P20_9_IN

IfxGtm_TIM3_5_P20_9_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_5_P21_1_IN

IfxGtm_TIM3_5_P21_1_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_5_P22_9_IN

IfxGtm_TIM3_5_P22_9_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_5_P25_5_IN

IfxGtm_TIM3_5_P25_5_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_5_P32_5_IN

IfxGtm_TIM3_5_P32_5_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_5_P34_2_IN

IfxGtm_TIM3_5_P34_2_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_6_P00_7_IN

IfxGtm_TIM3_6_P00_7_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_6_P02_12_IN

IfxGtm_TIM3_6_P02_12_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_6_P11_11_IN

IfxGtm_TIM3_6_P11_11_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_6_P13_1_IN

IfxGtm_TIM3_6_P13_1_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_6_P13_7_IN

IfxGtm_TIM3_6_P13_7_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_6_P14_15_IN

IfxGtm_TIM3_6_P14_15_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_6_P15_3_IN

IfxGtm_TIM3_6_P15_3_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_6_P20_10_IN

IfxGtm_TIM3_6_P20_10_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_6_P20_6_IN

IfxGtm_TIM3_6_P20_6_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_6_P22_10_IN

IfxGtm_TIM3_6_P22_10_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_6_P25_6_IN

IfxGtm_TIM3_6_P25_6_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_6_P26_0_IN

IfxGtm_TIM3_6_P26_0_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_6_P32_6_IN

IfxGtm_TIM3_6_P32_6_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_6_P34_3_IN

IfxGtm_TIM3_6_P34_3_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_7_P00_8_IN

IfxGtm_TIM3_7_P00_8_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_7_P02_13_IN

IfxGtm_TIM3_7_P02_13_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_7_P11_12_IN

IfxGtm_TIM3_7_P11_12_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_7_P13_15_IN

IfxGtm_TIM3_7_P13_15_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_7_P13_2_IN

IfxGtm_TIM3_7_P13_2_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_7_P15_4_IN

IfxGtm_TIM3_7_P15_4_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_7_P20_11_IN

IfxGtm_TIM3_7_P20_11_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_7_P20_7_IN

IfxGtm_TIM3_7_P20_7_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_7_P22_11_IN

IfxGtm_TIM3_7_P22_11_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_7_P25_7_IN

IfxGtm_TIM3_7_P25_7_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_7_P32_7_IN

IfxGtm_TIM3_7_P32_7_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM3_7_P34_4_IN

IfxGtm_TIM3_7_P34_4_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_0_P00_13_IN

IfxGtm_TIM4_0_P00_13_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_0_P00_9_IN

IfxGtm_TIM4_0_P00_9_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_0_P01_12_IN

IfxGtm_TIM4_0_P01_12_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_0_P02_12_IN

IfxGtm_TIM4_0_P02_12_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_0_P10_0_IN

IfxGtm_TIM4_0_P10_0_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_0_P10_8_IN

IfxGtm_TIM4_0_P10_8_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_0_P11_0_IN

IfxGtm_TIM4_0_P11_0_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_0_P12_0_IN

IfxGtm_TIM4_0_P12_0_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_0_P13_12_IN

IfxGtm_TIM4_0_P13_12_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_0_P21_0_IN

IfxGtm_TIM4_0_P21_0_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_0_P24_0_IN

IfxGtm_TIM4_0_P24_0_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_0_P25_8_IN

IfxGtm_TIM4_0_P25_8_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_0_P30_0_IN

IfxGtm_TIM4_0_P30_0_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_0_P32_7_IN

IfxGtm_TIM4_0_P32_7_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_1_P00_10_IN

IfxGtm_TIM4_1_P00_10_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_1_P00_15_IN

IfxGtm_TIM4_1_P00_15_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_1_P01_1_IN

IfxGtm_TIM4_1_P01_1_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_1_P02_15_IN

IfxGtm_TIM4_1_P02_15_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_1_P10_9_IN

IfxGtm_TIM4_1_P10_9_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_1_P11_1_IN

IfxGtm_TIM4_1_P11_1_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_1_P12_1_IN

IfxGtm_TIM4_1_P12_1_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_1_P15_10_IN

IfxGtm_TIM4_1_P15_10_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_1_P21_1_IN

IfxGtm_TIM4_1_P21_1_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_1_P24_1_IN

IfxGtm_TIM4_1_P24_1_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_1_P25_9_IN

IfxGtm_TIM4_1_P25_9_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_1_P30_1_IN

IfxGtm_TIM4_1_P30_1_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_1_P32_5_IN

IfxGtm_TIM4_1_P32_5_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_2_P00_11_IN

IfxGtm_TIM4_2_P00_11_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_2_P01_9_IN

IfxGtm_TIM4_2_P01_9_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_2_P02_13_IN

IfxGtm_TIM4_2_P02_13_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_2_P02_9_IN

IfxGtm_TIM4_2_P02_9_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_2_P10_10_IN

IfxGtm_TIM4_2_P10_10_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_2_P10_6_IN

IfxGtm_TIM4_2_P10_6_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_2_P11_4_IN

IfxGtm_TIM4_2_P11_4_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_2_P15_11_IN

IfxGtm_TIM4_2_P15_11_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_2_P21_6_IN

IfxGtm_TIM4_2_P21_6_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_2_P23_6_IN

IfxGtm_TIM4_2_P23_6_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_2_P24_2_IN

IfxGtm_TIM4_2_P24_2_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_2_P25_10_IN

IfxGtm_TIM4_2_P25_10_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_2_P30_2_IN

IfxGtm_TIM4_2_P30_2_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_3_P00_12_IN

IfxGtm_TIM4_3_P00_12_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_3_P01_13_IN

IfxGtm_TIM4_3_P01_13_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_3_P02_10_IN

IfxGtm_TIM4_3_P02_10_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_3_P02_14_IN

IfxGtm_TIM4_3_P02_14_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_3_P10_14_IN

IfxGtm_TIM4_3_P10_14_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_3_P10_5_IN

IfxGtm_TIM4_3_P10_5_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_3_P11_5_IN

IfxGtm_TIM4_3_P11_5_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_3_P15_12_IN

IfxGtm_TIM4_3_P15_12_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_3_P21_7_IN

IfxGtm_TIM4_3_P21_7_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_3_P23_7_IN

IfxGtm_TIM4_3_P23_7_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_3_P24_3_IN

IfxGtm_TIM4_3_P24_3_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_3_P25_11_IN

IfxGtm_TIM4_3_P25_11_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_3_P30_3_IN

IfxGtm_TIM4_3_P30_3_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_4_P01_0_IN

IfxGtm_TIM4_4_P01_0_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_4_P01_8_IN

IfxGtm_TIM4_4_P01_8_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_4_P02_11_IN

IfxGtm_TIM4_4_P02_11_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_4_P10_13_IN

IfxGtm_TIM4_4_P10_13_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_4_P10_1_IN

IfxGtm_TIM4_4_P10_1_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_4_P11_7_IN

IfxGtm_TIM4_4_P11_7_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_4_P15_13_IN

IfxGtm_TIM4_4_P15_13_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_4_P20_1_IN

IfxGtm_TIM4_4_P20_1_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_4_P24_4_IN

IfxGtm_TIM4_4_P24_4_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_4_P25_12_IN

IfxGtm_TIM4_4_P25_12_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_4_P30_4_IN

IfxGtm_TIM4_4_P30_4_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_4_P32_6_IN

IfxGtm_TIM4_4_P32_6_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_4_P33_10_IN

IfxGtm_TIM4_4_P33_10_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_4_P33_4_IN

IfxGtm_TIM4_4_P33_4_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_5_P01_10_IN

IfxGtm_TIM4_5_P01_10_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_5_P01_2_IN

IfxGtm_TIM4_5_P01_2_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_5_P01_3_IN

IfxGtm_TIM4_5_P01_3_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_5_P10_11_IN

IfxGtm_TIM4_5_P10_11_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_5_P10_2_IN

IfxGtm_TIM4_5_P10_2_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_5_P11_8_IN

IfxGtm_TIM4_5_P11_8_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_5_P15_14_IN

IfxGtm_TIM4_5_P15_14_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_5_P20_3_IN

IfxGtm_TIM4_5_P20_3_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_5_P24_5_IN

IfxGtm_TIM4_5_P24_5_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_5_P25_13_IN

IfxGtm_TIM4_5_P25_13_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_5_P30_5_IN

IfxGtm_TIM4_5_P30_5_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_5_P33_14_IN

IfxGtm_TIM4_5_P33_14_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_5_P33_5_IN

IfxGtm_TIM4_5_P33_5_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_6_P01_14_IN

IfxGtm_TIM4_6_P01_14_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_6_P01_15_IN

IfxGtm_TIM4_6_P01_15_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_6_P01_4_IN

IfxGtm_TIM4_6_P01_4_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_6_P10_15_IN

IfxGtm_TIM4_6_P10_15_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_6_P10_3_IN

IfxGtm_TIM4_6_P10_3_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_6_P11_13_IN

IfxGtm_TIM4_6_P11_13_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_6_P15_15_IN

IfxGtm_TIM4_6_P15_15_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_6_P24_6_IN

IfxGtm_TIM4_6_P24_6_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_6_P25_14_IN

IfxGtm_TIM4_6_P25_14_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_6_P30_6_IN

IfxGtm_TIM4_6_P30_6_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_6_P33_15_IN

IfxGtm_TIM4_6_P33_15_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_7_P00_14_IN

IfxGtm_TIM4_7_P00_14_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_7_P01_11_IN

IfxGtm_TIM4_7_P01_11_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_7_P10_4_IN

IfxGtm_TIM4_7_P10_4_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_7_P11_14_IN

IfxGtm_TIM4_7_P11_14_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_7_P11_15_IN

IfxGtm_TIM4_7_P11_15_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_7_P13_9_IN

IfxGtm_TIM4_7_P13_9_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_7_P14_7_IN

IfxGtm_TIM4_7_P14_7_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_7_P24_7_IN

IfxGtm_TIM4_7_P24_7_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_7_P25_15_IN

IfxGtm_TIM4_7_P25_15_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_7_P30_7_IN

IfxGtm_TIM4_7_P30_7_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM4_7_P34_5_IN

IfxGtm_TIM4_7_P34_5_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_0_P00_13_IN

IfxGtm_TIM5_0_P00_13_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_0_P01_12_IN

IfxGtm_TIM5_0_P01_12_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_0_P01_8_IN

IfxGtm_TIM5_0_P01_8_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_0_P02_12_IN

IfxGtm_TIM5_0_P02_12_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_0_P13_11_IN

IfxGtm_TIM5_0_P13_11_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_0_P22_8_IN

IfxGtm_TIM5_0_P22_8_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_0_P24_8_IN

IfxGtm_TIM5_0_P24_8_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_0_P30_8_IN

IfxGtm_TIM5_0_P30_8_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_0_P31_8_IN

IfxGtm_TIM5_0_P31_8_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_0_P33_14_IN

IfxGtm_TIM5_0_P33_14_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_1_P00_15_IN

IfxGtm_TIM5_1_P00_15_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_1_P01_1_IN

IfxGtm_TIM5_1_P01_1_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_1_P01_9_IN

IfxGtm_TIM5_1_P01_9_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_1_P02_15_IN

IfxGtm_TIM5_1_P02_15_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_1_P13_10_IN

IfxGtm_TIM5_1_P13_10_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_1_P14_11_IN

IfxGtm_TIM5_1_P14_11_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_1_P22_9_IN

IfxGtm_TIM5_1_P22_9_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_1_P24_9_IN

IfxGtm_TIM5_1_P24_9_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_1_P30_9_IN

IfxGtm_TIM5_1_P30_9_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_1_P31_9_IN

IfxGtm_TIM5_1_P31_9_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_1_P33_15_IN

IfxGtm_TIM5_1_P33_15_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_2_P01_10_IN

IfxGtm_TIM5_2_P01_10_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_2_P01_9_IN

IfxGtm_TIM5_2_P01_9_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_2_P02_13_IN

IfxGtm_TIM5_2_P02_13_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_2_P13_14_IN

IfxGtm_TIM5_2_P13_14_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_2_P14_14_IN

IfxGtm_TIM5_2_P14_14_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_2_P22_10_IN

IfxGtm_TIM5_2_P22_10_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_2_P24_10_IN

IfxGtm_TIM5_2_P24_10_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_2_P30_10_IN

IfxGtm_TIM5_2_P30_10_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_2_P31_10_IN

IfxGtm_TIM5_2_P31_10_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_3_P01_11_IN

IfxGtm_TIM5_3_P01_11_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_3_P01_13_IN

IfxGtm_TIM5_3_P01_13_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_3_P01_5_IN

IfxGtm_TIM5_3_P01_5_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_3_P02_14_IN

IfxGtm_TIM5_3_P02_14_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_3_P13_4_IN

IfxGtm_TIM5_3_P13_4_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_3_P14_13_IN

IfxGtm_TIM5_3_P14_13_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_3_P22_11_IN

IfxGtm_TIM5_3_P22_11_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_3_P24_11_IN

IfxGtm_TIM5_3_P24_11_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_3_P30_11_IN

IfxGtm_TIM5_3_P30_11_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_3_P31_11_IN

IfxGtm_TIM5_3_P31_11_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_3_P34_1_IN

IfxGtm_TIM5_3_P34_1_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_4_P00_0_IN

IfxGtm_TIM5_4_P00_0_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_4_P01_0_IN

IfxGtm_TIM5_4_P01_0_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_4_P01_8_IN

IfxGtm_TIM5_4_P01_8_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_4_P13_5_IN

IfxGtm_TIM5_4_P13_5_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_4_P14_12_IN

IfxGtm_TIM5_4_P14_12_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_4_P21_2_IN

IfxGtm_TIM5_4_P21_2_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_4_P24_12_IN

IfxGtm_TIM5_4_P24_12_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_4_P30_12_IN

IfxGtm_TIM5_4_P30_12_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_4_P31_12_IN

IfxGtm_TIM5_4_P31_12_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_4_P34_2_IN

IfxGtm_TIM5_4_P34_2_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_5_P00_1_IN

IfxGtm_TIM5_5_P00_1_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_5_P01_10_IN

IfxGtm_TIM5_5_P01_10_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_5_P01_2_IN

IfxGtm_TIM5_5_P01_2_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_5_P01_6_IN

IfxGtm_TIM5_5_P01_6_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_5_P13_13_IN

IfxGtm_TIM5_5_P13_13_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_5_P13_6_IN

IfxGtm_TIM5_5_P13_6_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_5_P21_3_IN

IfxGtm_TIM5_5_P21_3_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_5_P24_13_IN

IfxGtm_TIM5_5_P24_13_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_5_P30_13_IN

IfxGtm_TIM5_5_P30_13_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_5_P31_13_IN

IfxGtm_TIM5_5_P31_13_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_5_P32_5_IN

IfxGtm_TIM5_5_P32_5_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_5_P34_3_IN

IfxGtm_TIM5_5_P34_3_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_6_P00_2_IN

IfxGtm_TIM5_6_P00_2_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_6_P01_14_IN

IfxGtm_TIM5_6_P01_14_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_6_P01_15_IN

IfxGtm_TIM5_6_P01_15_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_6_P01_6_IN

IfxGtm_TIM5_6_P01_6_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_6_P13_7_IN

IfxGtm_TIM5_6_P13_7_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_6_P14_15_IN

IfxGtm_TIM5_6_P14_15_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_6_P21_4_IN

IfxGtm_TIM5_6_P21_4_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_6_P24_14_IN

IfxGtm_TIM5_6_P24_14_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_6_P30_14_IN

IfxGtm_TIM5_6_P30_14_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_6_P31_14_IN

IfxGtm_TIM5_6_P31_14_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_6_P32_6_IN

IfxGtm_TIM5_6_P32_6_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_6_P34_4_IN

IfxGtm_TIM5_6_P34_4_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_7_P00_14_IN

IfxGtm_TIM5_7_P00_14_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_7_P00_3_IN

IfxGtm_TIM5_7_P00_3_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_7_P01_11_IN

IfxGtm_TIM5_7_P01_11_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_7_P01_7_IN

IfxGtm_TIM5_7_P01_7_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_7_P13_15_IN

IfxGtm_TIM5_7_P13_15_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_7_P21_5_IN

IfxGtm_TIM5_7_P21_5_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_7_P24_15_IN

IfxGtm_TIM5_7_P24_15_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_7_P30_15_IN

IfxGtm_TIM5_7_P30_15_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_7_P31_15_IN

IfxGtm_TIM5_7_P31_15_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_7_P32_7_IN

IfxGtm_TIM5_7_P32_7_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM5_7_P34_5_IN

IfxGtm_TIM5_7_P34_5_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_0_P01_12_IN

IfxGtm_TIM6_0_P01_12_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_0_P10_9_IN

IfxGtm_TIM6_0_P10_9_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_0_P13_4_IN

IfxGtm_TIM6_0_P13_4_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_0_P20_6_IN

IfxGtm_TIM6_0_P20_6_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_0_P23_7_IN

IfxGtm_TIM6_0_P23_7_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_0_P24_0_IN

IfxGtm_TIM6_0_P24_0_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_0_P25_0_IN

IfxGtm_TIM6_0_P25_0_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_0_P30_8_IN

IfxGtm_TIM6_0_P30_8_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_0_P31_8_IN

IfxGtm_TIM6_0_P31_8_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_1_P01_13_IN

IfxGtm_TIM6_1_P01_13_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_1_P10_10_IN

IfxGtm_TIM6_1_P10_10_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_1_P13_5_IN

IfxGtm_TIM6_1_P13_5_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_1_P20_7_IN

IfxGtm_TIM6_1_P20_7_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_1_P23_6_IN

IfxGtm_TIM6_1_P23_6_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_1_P24_1_IN

IfxGtm_TIM6_1_P24_1_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_1_P25_1_IN

IfxGtm_TIM6_1_P25_1_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_1_P30_9_IN

IfxGtm_TIM6_1_P30_9_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_1_P31_9_IN

IfxGtm_TIM6_1_P31_9_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_2_P01_14_IN

IfxGtm_TIM6_2_P01_14_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_2_P10_11_IN

IfxGtm_TIM6_2_P10_11_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_2_P13_6_IN

IfxGtm_TIM6_2_P13_6_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_2_P20_8_IN

IfxGtm_TIM6_2_P20_8_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_2_P23_5_IN

IfxGtm_TIM6_2_P23_5_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_2_P24_2_IN

IfxGtm_TIM6_2_P24_2_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_2_P25_2_IN

IfxGtm_TIM6_2_P25_2_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_2_P30_10_IN

IfxGtm_TIM6_2_P30_10_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_2_P31_10_IN

IfxGtm_TIM6_2_P31_10_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_3_P01_15_IN

IfxGtm_TIM6_3_P01_15_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_3_P10_13_IN

IfxGtm_TIM6_3_P10_13_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_3_P13_7_IN

IfxGtm_TIM6_3_P13_7_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_3_P20_9_IN

IfxGtm_TIM6_3_P20_9_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_3_P23_4_IN

IfxGtm_TIM6_3_P23_4_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_3_P24_3_IN

IfxGtm_TIM6_3_P24_3_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_3_P25_3_IN

IfxGtm_TIM6_3_P25_3_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_3_P30_11_IN

IfxGtm_TIM6_3_P30_11_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_3_P31_11_IN

IfxGtm_TIM6_3_P31_11_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_4_P00_4_IN

IfxGtm_TIM6_4_P00_4_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_4_P13_9_IN

IfxGtm_TIM6_4_P13_9_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_4_P14_12_IN

IfxGtm_TIM6_4_P14_12_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_4_P23_3_IN

IfxGtm_TIM6_4_P23_3_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_4_P24_4_IN

IfxGtm_TIM6_4_P24_4_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_4_P25_4_IN

IfxGtm_TIM6_4_P25_4_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_4_P30_12_IN

IfxGtm_TIM6_4_P30_12_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_4_P31_12_IN

IfxGtm_TIM6_4_P31_12_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_5_P00_13_IN

IfxGtm_TIM6_5_P00_13_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_5_P13_10_IN

IfxGtm_TIM6_5_P13_10_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_5_P14_13_IN

IfxGtm_TIM6_5_P14_13_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_5_P23_2_IN

IfxGtm_TIM6_5_P23_2_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_5_P24_5_IN

IfxGtm_TIM6_5_P24_5_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_5_P25_5_IN

IfxGtm_TIM6_5_P25_5_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_5_P30_13_IN

IfxGtm_TIM6_5_P30_13_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_5_P31_13_IN

IfxGtm_TIM6_5_P31_13_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_6_P00_14_IN

IfxGtm_TIM6_6_P00_14_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_6_P13_11_IN

IfxGtm_TIM6_6_P13_11_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_6_P14_14_IN

IfxGtm_TIM6_6_P14_14_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_6_P23_1_IN

IfxGtm_TIM6_6_P23_1_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_6_P24_6_IN

IfxGtm_TIM6_6_P24_6_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_6_P25_6_IN

IfxGtm_TIM6_6_P25_6_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_6_P26_0_IN

IfxGtm_TIM6_6_P26_0_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_6_P30_14_IN

IfxGtm_TIM6_6_P30_14_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_6_P31_14_IN

IfxGtm_TIM6_6_P31_14_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_7_P00_15_IN

IfxGtm_TIM6_7_P00_15_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_7_P13_12_IN

IfxGtm_TIM6_7_P13_12_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_7_P14_15_IN

IfxGtm_TIM6_7_P14_15_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_7_P23_0_IN

IfxGtm_TIM6_7_P23_0_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_7_P24_7_IN

IfxGtm_TIM6_7_P24_7_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_7_P25_7_IN

IfxGtm_TIM6_7_P25_7_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_7_P30_15_IN

IfxGtm_TIM6_7_P30_15_IN. More...

IFX_EXTERN IfxGtm_Tim_TinMap

IfxGtm_TIM6_7_P31_15_IN

IfxGtm_TIM6_7_P31_15_IN. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_0N_TOUT106_P10_4_OUT

IfxGtm_TOM0_0N_TOUT106_P10_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_0N_TOUT17_P00_8_OUT

IfxGtm_TOM0_0N_TOUT17_P00_8_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_0N_TOUT25_P33_3_OUT

IfxGtm_TOM0_0N_TOUT25_P33_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_0N_TOUT34_P33_12_OUT

IfxGtm_TOM0_0N_TOUT34_P33_12_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_0N_TOUT51_P21_0_OUT

IfxGtm_TOM0_0N_TOUT51_P21_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_0N_TOUT61_P20_3_OUT

IfxGtm_TOM0_0N_TOUT61_P20_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_0N_TOUT72_P15_1_OUT

IfxGtm_TOM0_0N_TOUT72_P15_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_0N_TOUT7_P02_7_OUT

IfxGtm_TOM0_0N_TOUT7_P02_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_0N_TOUT91_P13_0_OUT

IfxGtm_TOM0_0N_TOUT91_P13_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_0N_TOUT9_P00_0_OUT

IfxGtm_TOM0_0N_TOUT9_P00_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_0_TOUT0_P02_0_OUT

IfxGtm_TOM0_0_TOUT0_P02_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_0_TOUT109_P10_7_OUT

IfxGtm_TOM0_0_TOUT109_P10_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_0_TOUT151_P02_12_OUT

IfxGtm_TOM0_0_TOUT151_P02_12_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_0_TOUT18_P00_9_OUT

IfxGtm_TOM0_0_TOUT18_P00_9_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_0_TOUT26_P33_4_OUT

IfxGtm_TOM0_0_TOUT26_P33_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_0_TOUT32_P33_10_OUT

IfxGtm_TOM0_0_TOUT32_P33_10_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_0_TOUT53_P21_2_OUT

IfxGtm_TOM0_0_TOUT53_P21_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_0_TOUT76_P15_5_OUT

IfxGtm_TOM0_0_TOUT76_P15_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_0_TOUT77_P15_6_OUT

IfxGtm_TOM0_0_TOUT77_P15_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_0_TOUT85_P14_5_OUT

IfxGtm_TOM0_0_TOUT85_P14_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_0_TOUT87_P14_7_OUT

IfxGtm_TOM0_0_TOUT87_P14_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_10_TOUT12_P00_3_OUT

IfxGtm_TOM0_10_TOUT12_P00_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_10_TOUT2_P02_2_OUT

IfxGtm_TOM0_10_TOUT2_P02_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_10_TOUT41_P23_0_OUT

IfxGtm_TOM0_10_TOUT41_P23_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_10_TOUT46_P23_5_OUT

IfxGtm_TOM0_10_TOUT46_P23_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_10_TOUT96_P11_3_OUT

IfxGtm_TOM0_10_TOUT96_P11_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_11_TOUT13_P00_4_OUT

IfxGtm_TOM0_11_TOUT13_P00_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_11_TOUT3_P02_3_OUT

IfxGtm_TOM0_11_TOUT3_P02_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_11_TOUT43_P23_2_OUT

IfxGtm_TOM0_11_TOUT43_P23_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_11_TOUT49_P22_2_OUT

IfxGtm_TOM0_11_TOUT49_P22_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_11_TOUT97_P11_6_OUT

IfxGtm_TOM0_11_TOUT97_P11_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_12_TOUT14_P00_5_OUT

IfxGtm_TOM0_12_TOUT14_P00_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_12_TOUT44_P23_3_OUT

IfxGtm_TOM0_12_TOUT44_P23_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_12_TOUT4_P02_4_OUT

IfxGtm_TOM0_12_TOUT4_P02_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_12_TOUT50_P22_3_OUT

IfxGtm_TOM0_12_TOUT50_P22_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_12_TOUT98_P11_9_OUT

IfxGtm_TOM0_12_TOUT98_P11_9_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_13_TOUT15_P00_6_OUT

IfxGtm_TOM0_13_TOUT15_P00_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_13_TOUT5_P02_5_OUT

IfxGtm_TOM0_13_TOUT5_P02_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_13_TOUT99_P11_10_OUT

IfxGtm_TOM0_13_TOUT99_P11_10_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_14_TOUT100_P11_11_OUT

IfxGtm_TOM0_14_TOUT100_P11_11_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_14_TOUT16_P00_7_OUT

IfxGtm_TOM0_14_TOUT16_P00_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_14_TOUT6_P02_6_OUT

IfxGtm_TOM0_14_TOUT6_P02_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_15_TOUT101_P11_12_OUT

IfxGtm_TOM0_15_TOUT101_P11_12_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_15_TOUT17_P00_8_OUT

IfxGtm_TOM0_15_TOUT17_P00_8_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_15_TOUT42_P23_1_OUT

IfxGtm_TOM0_15_TOUT42_P23_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_15_TOUT7_P02_7_OUT

IfxGtm_TOM0_15_TOUT7_P02_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_1N_TOUT107_P10_5_OUT

IfxGtm_TOM0_1N_TOUT107_P10_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_1N_TOUT10_P00_1_OUT

IfxGtm_TOM0_1N_TOUT10_P00_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_1N_TOUT14_P00_5_OUT

IfxGtm_TOM0_1N_TOUT14_P00_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_1N_TOUT22_P33_0_OUT

IfxGtm_TOM0_1N_TOUT22_P33_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_1N_TOUT30_P33_8_OUT

IfxGtm_TOM0_1N_TOUT30_P33_8_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_1N_TOUT35_P33_13_OUT

IfxGtm_TOM0_1N_TOUT35_P33_13_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_1N_TOUT39_P32_3_OUT

IfxGtm_TOM0_1N_TOUT39_P32_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_1N_TOUT4_P02_4_OUT

IfxGtm_TOM0_1N_TOUT4_P02_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_1N_TOUT52_P21_1_OUT

IfxGtm_TOM0_1N_TOUT52_P21_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_1N_TOUT57_P21_6_OUT

IfxGtm_TOM0_1N_TOUT57_P21_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_1N_TOUT73_P15_2_OUT

IfxGtm_TOM0_1N_TOUT73_P15_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_1N_TOUT90_P14_10_OUT

IfxGtm_TOM0_1N_TOUT90_P14_10_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_1N_TOUT92_P13_1_OUT

IfxGtm_TOM0_1N_TOUT92_P13_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_1_TOUT103_P10_1_OUT

IfxGtm_TOM0_1_TOUT103_P10_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_1_TOUT116_P02_9_OUT

IfxGtm_TOM0_1_TOUT116_P02_9_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_1_TOUT19_P00_10_OUT

IfxGtm_TOM0_1_TOUT19_P00_10_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_1_TOUT1_P02_1_OUT

IfxGtm_TOM0_1_TOUT1_P02_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_1_TOUT27_P33_5_OUT

IfxGtm_TOM0_1_TOUT27_P33_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_1_TOUT31_P33_9_OUT

IfxGtm_TOM0_1_TOUT31_P33_9_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_1_TOUT54_P21_3_OUT

IfxGtm_TOM0_1_TOUT54_P21_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_1_TOUT78_P15_7_OUT

IfxGtm_TOM0_1_TOUT78_P15_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_1_TOUT86_P14_6_OUT

IfxGtm_TOM0_1_TOUT86_P14_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_2N_TOUT108_P10_6_OUT

IfxGtm_TOM0_2N_TOUT108_P10_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_2N_TOUT11_P00_2_OUT

IfxGtm_TOM0_2N_TOUT11_P00_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_2N_TOUT143_P33_14_OUT

IfxGtm_TOM0_2N_TOUT143_P33_14_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_2N_TOUT15_P00_6_OUT

IfxGtm_TOM0_2N_TOUT15_P00_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_2N_TOUT23_P33_1_OUT

IfxGtm_TOM0_2N_TOUT23_P33_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_2N_TOUT40_P32_4_OUT

IfxGtm_TOM0_2N_TOUT40_P32_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_2N_TOUT58_P21_7_OUT

IfxGtm_TOM0_2N_TOUT58_P21_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_2N_TOUT5_P02_5_OUT

IfxGtm_TOM0_2N_TOUT5_P02_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_2N_TOUT74_P15_3_OUT

IfxGtm_TOM0_2N_TOUT74_P15_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_2N_TOUT93_P13_2_OUT

IfxGtm_TOM0_2N_TOUT93_P13_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_2_TOUT104_P10_2_OUT

IfxGtm_TOM0_2_TOUT104_P10_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_2_TOUT107_P10_5_OUT

IfxGtm_TOM0_2_TOUT107_P10_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_2_TOUT117_P02_10_OUT

IfxGtm_TOM0_2_TOUT117_P02_10_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_2_TOUT20_P00_11_OUT

IfxGtm_TOM0_2_TOUT20_P00_11_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_2_TOUT28_P33_6_OUT

IfxGtm_TOM0_2_TOUT28_P33_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_2_TOUT2_P02_2_OUT

IfxGtm_TOM0_2_TOUT2_P02_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_2_TOUT33_P33_11_OUT

IfxGtm_TOM0_2_TOUT33_P33_11_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_2_TOUT55_P21_4_OUT

IfxGtm_TOM0_2_TOUT55_P21_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_2_TOUT79_P15_8_OUT

IfxGtm_TOM0_2_TOUT79_P15_8_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_2_TOUT88_P14_8_OUT

IfxGtm_TOM0_2_TOUT88_P14_8_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_3N_TOUT109_P10_7_OUT

IfxGtm_TOM0_3N_TOUT109_P10_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_3N_TOUT12_P00_3_OUT

IfxGtm_TOM0_3N_TOUT12_P00_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_3N_TOUT144_P33_15_OUT

IfxGtm_TOM0_3N_TOUT144_P33_15_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_3N_TOUT16_P00_7_OUT

IfxGtm_TOM0_3N_TOUT16_P00_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_3N_TOUT24_P33_2_OUT

IfxGtm_TOM0_3N_TOUT24_P33_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_3N_TOUT42_P23_1_OUT

IfxGtm_TOM0_3N_TOUT42_P23_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_3N_TOUT59_P20_0_OUT

IfxGtm_TOM0_3N_TOUT59_P20_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_3N_TOUT60_P20_1_OUT

IfxGtm_TOM0_3N_TOUT60_P20_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_3N_TOUT6_P02_6_OUT

IfxGtm_TOM0_3N_TOUT6_P02_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_3N_TOUT75_P15_4_OUT

IfxGtm_TOM0_3N_TOUT75_P15_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_3N_TOUT94_P13_3_OUT

IfxGtm_TOM0_3N_TOUT94_P13_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_3_TOUT105_P10_3_OUT

IfxGtm_TOM0_3_TOUT105_P10_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_3_TOUT108_P10_6_OUT

IfxGtm_TOM0_3_TOUT108_P10_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_3_TOUT118_P02_11_OUT

IfxGtm_TOM0_3_TOUT118_P02_11_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_3_TOUT21_P00_12_OUT

IfxGtm_TOM0_3_TOUT21_P00_12_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_3_TOUT29_P33_7_OUT

IfxGtm_TOM0_3_TOUT29_P33_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_3_TOUT38_P32_2_OUT

IfxGtm_TOM0_3_TOUT38_P32_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_3_TOUT3_P02_3_OUT

IfxGtm_TOM0_3_TOUT3_P02_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_3_TOUT56_P21_5_OUT

IfxGtm_TOM0_3_TOUT56_P21_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_3_TOUT71_P15_0_OUT

IfxGtm_TOM0_3_TOUT71_P15_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_3_TOUT80_P14_0_OUT

IfxGtm_TOM0_3_TOUT80_P14_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_3_TOUT89_P14_9_OUT

IfxGtm_TOM0_3_TOUT89_P14_9_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4N_TOUT10_P00_1_OUT

IfxGtm_TOM0_4N_TOUT10_P00_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4N_TOUT143_P33_14_OUT

IfxGtm_TOM0_4N_TOUT143_P33_14_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4N_TOUT147_P34_2_OUT

IfxGtm_TOM0_4N_TOUT147_P34_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4N_TOUT1_P02_1_OUT

IfxGtm_TOM0_4N_TOUT1_P02_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4N_TOUT29_P33_7_OUT

IfxGtm_TOM0_4N_TOUT29_P33_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4N_TOUT36_P32_0_OUT

IfxGtm_TOM0_4N_TOUT36_P32_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4N_TOUT54_P21_3_OUT

IfxGtm_TOM0_4N_TOUT54_P21_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4N_TOUT56_P21_5_OUT

IfxGtm_TOM0_4N_TOUT56_P21_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4N_TOUT65_P20_9_OUT

IfxGtm_TOM0_4N_TOUT65_P20_9_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4N_TOUT73_P15_2_OUT

IfxGtm_TOM0_4N_TOUT73_P15_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4N_TOUT89_P14_9_OUT

IfxGtm_TOM0_4N_TOUT89_P14_9_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4N_TOUT8_P02_8_OUT

IfxGtm_TOM0_4N_TOUT8_P02_8_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4N_TOUT95_P11_2_OUT

IfxGtm_TOM0_4N_TOUT95_P11_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4N_TOUT96_P11_3_OUT

IfxGtm_TOM0_4N_TOUT96_P11_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4_TOUT0_P02_0_OUT

IfxGtm_TOM0_4_TOUT0_P02_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4_TOUT102_P10_0_OUT

IfxGtm_TOM0_4_TOUT102_P10_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4_TOUT124_P11_8_OUT

IfxGtm_TOM0_4_TOUT124_P11_8_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4_TOUT22_P33_0_OUT

IfxGtm_TOM0_4_TOUT22_P33_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4_TOUT30_P33_8_OUT

IfxGtm_TOM0_4_TOUT30_P33_8_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4_TOUT37_P32_1_OUT

IfxGtm_TOM0_4_TOUT37_P32_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4_TOUT39_P32_3_OUT

IfxGtm_TOM0_4_TOUT39_P32_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4_TOUT53_P21_2_OUT

IfxGtm_TOM0_4_TOUT53_P21_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4_TOUT57_P21_6_OUT

IfxGtm_TOM0_4_TOUT57_P21_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4_TOUT64_P20_8_OUT

IfxGtm_TOM0_4_TOUT64_P20_8_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4_TOUT72_P15_1_OUT

IfxGtm_TOM0_4_TOUT72_P15_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4_TOUT81_P14_1_OUT

IfxGtm_TOM0_4_TOUT81_P14_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4_TOUT90_P14_10_OUT

IfxGtm_TOM0_4_TOUT90_P14_10_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4_TOUT94_P13_3_OUT

IfxGtm_TOM0_4_TOUT94_P13_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4_TOUT9_P00_0_OUT

IfxGtm_TOM0_4_TOUT9_P00_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5N_TOUT121_P11_4_OUT

IfxGtm_TOM0_5N_TOUT121_P11_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5N_TOUT12_P00_3_OUT

IfxGtm_TOM0_5N_TOUT12_P00_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5N_TOUT144_P33_15_OUT

IfxGtm_TOM0_5N_TOUT144_P33_15_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5N_TOUT148_P34_3_OUT

IfxGtm_TOM0_5N_TOUT148_P34_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5N_TOUT26_P33_4_OUT

IfxGtm_TOM0_5N_TOUT26_P33_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5N_TOUT28_P33_6_OUT

IfxGtm_TOM0_5N_TOUT28_P33_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5N_TOUT32_P33_10_OUT

IfxGtm_TOM0_5N_TOUT32_P33_10_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5N_TOUT37_P32_1_OUT

IfxGtm_TOM0_5N_TOUT37_P32_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5N_TOUT3_P02_3_OUT

IfxGtm_TOM0_5N_TOUT3_P02_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5N_TOUT53_P21_2_OUT

IfxGtm_TOM0_5N_TOUT53_P21_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5N_TOUT56_P21_5_OUT

IfxGtm_TOM0_5N_TOUT56_P21_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5N_TOUT67_P20_11_OUT

IfxGtm_TOM0_5N_TOUT67_P20_11_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5N_TOUT76_P15_5_OUT

IfxGtm_TOM0_5N_TOUT76_P15_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5N_TOUT77_P15_6_OUT

IfxGtm_TOM0_5N_TOUT77_P15_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5N_TOUT87_P14_7_OUT

IfxGtm_TOM0_5N_TOUT87_P14_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5N_TOUT97_P11_6_OUT

IfxGtm_TOM0_5N_TOUT97_P11_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5_TOUT110_P10_8_OUT

IfxGtm_TOM0_5_TOUT110_P10_8_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5_TOUT11_P00_2_OUT

IfxGtm_TOM0_5_TOUT11_P00_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5_TOUT128_P12_0_OUT

IfxGtm_TOM0_5_TOUT128_P12_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5_TOUT23_P33_1_OUT

IfxGtm_TOM0_5_TOUT23_P33_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5_TOUT27_P33_5_OUT

IfxGtm_TOM0_5_TOUT27_P33_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5_TOUT2_P02_2_OUT

IfxGtm_TOM0_5_TOUT2_P02_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5_TOUT40_P32_4_OUT

IfxGtm_TOM0_5_TOUT40_P32_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5_TOUT55_P21_4_OUT

IfxGtm_TOM0_5_TOUT55_P21_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5_TOUT58_P21_7_OUT

IfxGtm_TOM0_5_TOUT58_P21_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5_TOUT66_P20_10_OUT

IfxGtm_TOM0_5_TOUT66_P20_10_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5_TOUT74_P15_3_OUT

IfxGtm_TOM0_5_TOUT74_P15_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5_TOUT82_P14_2_OUT

IfxGtm_TOM0_5_TOUT82_P14_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5_TOUT91_P13_0_OUT

IfxGtm_TOM0_5_TOUT91_P13_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5_TOUT96_P11_3_OUT

IfxGtm_TOM0_5_TOUT96_P11_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6N_TOUT149_P34_4_OUT

IfxGtm_TOM0_6N_TOUT149_P34_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6N_TOUT14_P00_5_OUT

IfxGtm_TOM0_6N_TOUT14_P00_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6N_TOUT27_P33_5_OUT

IfxGtm_TOM0_6N_TOUT27_P33_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6N_TOUT30_P33_8_OUT

IfxGtm_TOM0_6N_TOUT30_P33_8_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6N_TOUT31_P33_9_OUT

IfxGtm_TOM0_6N_TOUT31_P33_9_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6N_TOUT38_P32_2_OUT

IfxGtm_TOM0_6N_TOUT38_P32_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6N_TOUT40_P32_4_OUT

IfxGtm_TOM0_6N_TOUT40_P32_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6N_TOUT49_P22_2_OUT

IfxGtm_TOM0_6N_TOUT49_P22_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6N_TOUT54_P21_3_OUT

IfxGtm_TOM0_6N_TOUT54_P21_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6N_TOUT5_P02_5_OUT

IfxGtm_TOM0_6N_TOUT5_P02_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6N_TOUT69_P20_13_OUT

IfxGtm_TOM0_6N_TOUT69_P20_13_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6N_TOUT78_P15_7_OUT

IfxGtm_TOM0_6N_TOUT78_P15_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6N_TOUT82_P14_2_OUT

IfxGtm_TOM0_6N_TOUT82_P14_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6N_TOUT86_P14_6_OUT

IfxGtm_TOM0_6N_TOUT86_P14_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6N_TOUT91_P13_0_OUT

IfxGtm_TOM0_6N_TOUT91_P13_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6N_TOUT97_P11_6_OUT

IfxGtm_TOM0_6N_TOUT97_P11_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6N_TOUT99_P11_10_OUT

IfxGtm_TOM0_6N_TOUT99_P11_10_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6_TOUT106_P10_4_OUT

IfxGtm_TOM0_6_TOUT106_P10_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6_TOUT129_P12_1_OUT

IfxGtm_TOM0_6_TOUT129_P12_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6_TOUT13_P00_4_OUT

IfxGtm_TOM0_6_TOUT13_P00_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6_TOUT24_P33_2_OUT

IfxGtm_TOM0_6_TOUT24_P33_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6_TOUT29_P33_7_OUT

IfxGtm_TOM0_6_TOUT29_P33_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6_TOUT42_P23_1_OUT

IfxGtm_TOM0_6_TOUT42_P23_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6_TOUT48_P22_1_OUT

IfxGtm_TOM0_6_TOUT48_P22_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6_TOUT4_P02_4_OUT

IfxGtm_TOM0_6_TOUT4_P02_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6_TOUT59_P20_0_OUT

IfxGtm_TOM0_6_TOUT59_P20_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6_TOUT68_P20_12_OUT

IfxGtm_TOM0_6_TOUT68_P20_12_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6_TOUT80_P14_0_OUT

IfxGtm_TOM0_6_TOUT80_P14_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6_TOUT83_P14_3_OUT

IfxGtm_TOM0_6_TOUT83_P14_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6_TOUT92_P13_1_OUT

IfxGtm_TOM0_6_TOUT92_P13_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6_TOUT98_P11_9_OUT

IfxGtm_TOM0_6_TOUT98_P11_9_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7N_TOUT100_P11_11_OUT

IfxGtm_TOM0_7N_TOUT100_P11_11_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7N_TOUT123_P11_7_OUT

IfxGtm_TOM0_7N_TOUT123_P11_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7N_TOUT130_P22_4_OUT

IfxGtm_TOM0_7N_TOUT130_P22_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7N_TOUT150_P34_5_OUT

IfxGtm_TOM0_7N_TOUT150_P34_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7N_TOUT16_P00_7_OUT

IfxGtm_TOM0_7N_TOUT16_P00_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7N_TOUT28_P33_6_OUT

IfxGtm_TOM0_7N_TOUT28_P33_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7N_TOUT32_P33_10_OUT

IfxGtm_TOM0_7N_TOUT32_P33_10_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7N_TOUT33_P33_11_OUT

IfxGtm_TOM0_7N_TOUT33_P33_11_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7N_TOUT39_P32_3_OUT

IfxGtm_TOM0_7N_TOUT39_P32_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7N_TOUT42_P23_1_OUT

IfxGtm_TOM0_7N_TOUT42_P23_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7N_TOUT55_P21_4_OUT

IfxGtm_TOM0_7N_TOUT55_P21_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7N_TOUT71_P15_0_OUT

IfxGtm_TOM0_7N_TOUT71_P15_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7N_TOUT79_P15_8_OUT

IfxGtm_TOM0_7N_TOUT79_P15_8_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7N_TOUT7_P02_7_OUT

IfxGtm_TOM0_7N_TOUT7_P02_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7N_TOUT84_P14_4_OUT

IfxGtm_TOM0_7N_TOUT84_P14_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7N_TOUT88_P14_8_OUT

IfxGtm_TOM0_7N_TOUT88_P14_8_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7N_TOUT93_P13_2_OUT

IfxGtm_TOM0_7N_TOUT93_P13_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7_TOUT101_P11_12_OUT

IfxGtm_TOM0_7_TOUT101_P11_12_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7_TOUT119_P11_0_OUT

IfxGtm_TOM0_7_TOUT119_P11_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7_TOUT15_P00_6_OUT

IfxGtm_TOM0_7_TOUT15_P00_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7_TOUT25_P33_3_OUT

IfxGtm_TOM0_7_TOUT25_P33_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7_TOUT31_P33_9_OUT

IfxGtm_TOM0_7_TOUT31_P33_9_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7_TOUT45_P23_4_OUT

IfxGtm_TOM0_7_TOUT45_P23_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7_TOUT50_P22_3_OUT

IfxGtm_TOM0_7_TOUT50_P22_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7_TOUT6_P02_6_OUT

IfxGtm_TOM0_7_TOUT6_P02_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7_TOUT70_P20_14_OUT

IfxGtm_TOM0_7_TOUT70_P20_14_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7_TOUT81_P14_1_OUT

IfxGtm_TOM0_7_TOUT81_P14_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7_TOUT84_P14_4_OUT

IfxGtm_TOM0_7_TOUT84_P14_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7_TOUT92_P13_1_OUT

IfxGtm_TOM0_7_TOUT92_P13_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7_TOUT93_P13_2_OUT

IfxGtm_TOM0_7_TOUT93_P13_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_8_TOUT0_P02_0_OUT

IfxGtm_TOM0_8_TOUT0_P02_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_8_TOUT48_P22_1_OUT

IfxGtm_TOM0_8_TOUT48_P22_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_8_TOUT51_P21_0_OUT

IfxGtm_TOM0_8_TOUT51_P21_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_8_TOUT8_P02_8_OUT

IfxGtm_TOM0_8_TOUT8_P02_8_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_8_TOUT94_P13_3_OUT

IfxGtm_TOM0_8_TOUT94_P13_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_8_TOUT95_P11_2_OUT

IfxGtm_TOM0_8_TOUT95_P11_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_8_TOUT9_P00_0_OUT

IfxGtm_TOM0_8_TOUT9_P00_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_9_TOUT10_P00_1_OUT

IfxGtm_TOM0_9_TOUT10_P00_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_9_TOUT11_P00_2_OUT

IfxGtm_TOM0_9_TOUT11_P00_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_9_TOUT1_P02_1_OUT

IfxGtm_TOM0_9_TOUT1_P02_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_9_TOUT47_P22_0_OUT

IfxGtm_TOM0_9_TOUT47_P22_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM0_9_TOUT52_P21_1_OUT

IfxGtm_TOM0_9_TOUT52_P21_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_0N_TOUT17_P00_8_OUT

IfxGtm_TOM1_0N_TOUT17_P00_8_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_0N_TOUT25_P33_3_OUT

IfxGtm_TOM1_0N_TOUT25_P33_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_0N_TOUT34_P33_12_OUT

IfxGtm_TOM1_0N_TOUT34_P33_12_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_0N_TOUT75_P15_4_OUT

IfxGtm_TOM1_0N_TOUT75_P15_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_0N_TOUT7_P02_7_OUT

IfxGtm_TOM1_0N_TOUT7_P02_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_0_TOUT0_P02_0_OUT

IfxGtm_TOM1_0_TOUT0_P02_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_0_TOUT18_P00_9_OUT

IfxGtm_TOM1_0_TOUT18_P00_9_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_0_TOUT26_P33_4_OUT

IfxGtm_TOM1_0_TOUT26_P33_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_0_TOUT32_P33_10_OUT

IfxGtm_TOM1_0_TOUT32_P33_10_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_0_TOUT68_P20_12_OUT

IfxGtm_TOM1_0_TOUT68_P20_12_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_0_TOUT76_P15_5_OUT

IfxGtm_TOM1_0_TOUT76_P15_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_0_TOUT77_P15_6_OUT

IfxGtm_TOM1_0_TOUT77_P15_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_0_TOUT85_P14_5_OUT

IfxGtm_TOM1_0_TOUT85_P14_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_0_TOUT8_P02_8_OUT

IfxGtm_TOM1_0_TOUT8_P02_8_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_0_TOUT9_P00_0_OUT

IfxGtm_TOM1_0_TOUT9_P00_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_10_TOUT143_P33_14_OUT

IfxGtm_TOM1_10_TOUT143_P33_14_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_10_TOUT266_P10_10_OUT

IfxGtm_TOM1_10_TOUT266_P10_10_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_10_TOUT2_P02_2_OUT

IfxGtm_TOM1_10_TOUT2_P02_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_10_TOUT62_P20_6_OUT

IfxGtm_TOM1_10_TOUT62_P20_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_11_TOUT144_P33_15_OUT

IfxGtm_TOM1_11_TOUT144_P33_15_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_11_TOUT267_P10_14_OUT

IfxGtm_TOM1_11_TOUT267_P10_14_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_11_TOUT3_P02_3_OUT

IfxGtm_TOM1_11_TOUT3_P02_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_11_TOUT60_P20_1_OUT

IfxGtm_TOM1_11_TOUT60_P20_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_11_TOUT63_P20_7_OUT

IfxGtm_TOM1_11_TOUT63_P20_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_12_TOUT268_P10_13_OUT

IfxGtm_TOM1_12_TOUT268_P10_13_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_12_TOUT34_P33_12_OUT

IfxGtm_TOM1_12_TOUT34_P33_12_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_12_TOUT4_P02_4_OUT

IfxGtm_TOM1_12_TOUT4_P02_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_12_TOUT61_P20_3_OUT

IfxGtm_TOM1_12_TOUT61_P20_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_13_TOUT146_P34_1_OUT

IfxGtm_TOM1_13_TOUT146_P34_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_13_TOUT269_P10_11_OUT

IfxGtm_TOM1_13_TOUT269_P10_11_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_13_TOUT35_P33_13_OUT

IfxGtm_TOM1_13_TOUT35_P33_13_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_13_TOUT5_P02_5_OUT

IfxGtm_TOM1_13_TOUT5_P02_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_13_TOUT65_P20_9_OUT

IfxGtm_TOM1_13_TOUT65_P20_9_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_14_TOUT147_P34_2_OUT

IfxGtm_TOM1_14_TOUT147_P34_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_14_TOUT270_P10_15_OUT

IfxGtm_TOM1_14_TOUT270_P10_15_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_14_TOUT36_P32_0_OUT

IfxGtm_TOM1_14_TOUT36_P32_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_14_TOUT66_P20_10_OUT

IfxGtm_TOM1_14_TOUT66_P20_10_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_14_TOUT6_P02_6_OUT

IfxGtm_TOM1_14_TOUT6_P02_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_15_TOUT148_P34_3_OUT

IfxGtm_TOM1_15_TOUT148_P34_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_15_TOUT150_P34_5_OUT

IfxGtm_TOM1_15_TOUT150_P34_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_15_TOUT37_P32_1_OUT

IfxGtm_TOM1_15_TOUT37_P32_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_15_TOUT67_P20_11_OUT

IfxGtm_TOM1_15_TOUT67_P20_11_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_15_TOUT7_P02_7_OUT

IfxGtm_TOM1_15_TOUT7_P02_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_1N_TOUT14_P00_5_OUT

IfxGtm_TOM1_1N_TOUT14_P00_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_1N_TOUT22_P33_0_OUT

IfxGtm_TOM1_1N_TOUT22_P33_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_1N_TOUT245_P15_13_OUT

IfxGtm_TOM1_1N_TOUT245_P15_13_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_1N_TOUT30_P33_8_OUT

IfxGtm_TOM1_1N_TOUT30_P33_8_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_1N_TOUT35_P33_13_OUT

IfxGtm_TOM1_1N_TOUT35_P33_13_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_1N_TOUT39_P32_3_OUT

IfxGtm_TOM1_1N_TOUT39_P32_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_1N_TOUT4_P02_4_OUT

IfxGtm_TOM1_1N_TOUT4_P02_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_1N_TOUT72_P15_1_OUT

IfxGtm_TOM1_1N_TOUT72_P15_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_1_TOUT10_P00_1_OUT

IfxGtm_TOM1_1_TOUT10_P00_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_1_TOUT116_P02_9_OUT

IfxGtm_TOM1_1_TOUT116_P02_9_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_1_TOUT11_P00_2_OUT

IfxGtm_TOM1_1_TOUT11_P00_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_1_TOUT19_P00_10_OUT

IfxGtm_TOM1_1_TOUT19_P00_10_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_1_TOUT1_P02_1_OUT

IfxGtm_TOM1_1_TOUT1_P02_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_1_TOUT242_P15_10_OUT

IfxGtm_TOM1_1_TOUT242_P15_10_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_1_TOUT27_P33_5_OUT

IfxGtm_TOM1_1_TOUT27_P33_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_1_TOUT31_P33_9_OUT

IfxGtm_TOM1_1_TOUT31_P33_9_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_1_TOUT69_P20_13_OUT

IfxGtm_TOM1_1_TOUT69_P20_13_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_1_TOUT78_P15_7_OUT

IfxGtm_TOM1_1_TOUT78_P15_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_1_TOUT86_P14_6_OUT

IfxGtm_TOM1_1_TOUT86_P14_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_2N_TOUT143_P33_14_OUT

IfxGtm_TOM1_2N_TOUT143_P33_14_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_2N_TOUT15_P00_6_OUT

IfxGtm_TOM1_2N_TOUT15_P00_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_2N_TOUT23_P33_1_OUT

IfxGtm_TOM1_2N_TOUT23_P33_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_2N_TOUT246_P15_14_OUT

IfxGtm_TOM1_2N_TOUT246_P15_14_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_2N_TOUT40_P32_4_OUT

IfxGtm_TOM1_2N_TOUT40_P32_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_2N_TOUT41_P23_0_OUT

IfxGtm_TOM1_2N_TOUT41_P23_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_2N_TOUT5_P02_5_OUT

IfxGtm_TOM1_2N_TOUT5_P02_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_2N_TOUT73_P15_2_OUT

IfxGtm_TOM1_2N_TOUT73_P15_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_2_TOUT117_P02_10_OUT

IfxGtm_TOM1_2_TOUT117_P02_10_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_2_TOUT12_P00_3_OUT

IfxGtm_TOM1_2_TOUT12_P00_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_2_TOUT20_P00_11_OUT

IfxGtm_TOM1_2_TOUT20_P00_11_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_2_TOUT243_P15_11_OUT

IfxGtm_TOM1_2_TOUT243_P15_11_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_2_TOUT28_P33_6_OUT

IfxGtm_TOM1_2_TOUT28_P33_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_2_TOUT2_P02_2_OUT

IfxGtm_TOM1_2_TOUT2_P02_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_2_TOUT33_P33_11_OUT

IfxGtm_TOM1_2_TOUT33_P33_11_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_2_TOUT70_P20_14_OUT

IfxGtm_TOM1_2_TOUT70_P20_14_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_2_TOUT79_P15_8_OUT

IfxGtm_TOM1_2_TOUT79_P15_8_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_3N_TOUT144_P33_15_OUT

IfxGtm_TOM1_3N_TOUT144_P33_15_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_3N_TOUT16_P00_7_OUT

IfxGtm_TOM1_3N_TOUT16_P00_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_3N_TOUT247_P15_15_OUT

IfxGtm_TOM1_3N_TOUT247_P15_15_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_3N_TOUT24_P33_2_OUT

IfxGtm_TOM1_3N_TOUT24_P33_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_3N_TOUT43_P23_2_OUT

IfxGtm_TOM1_3N_TOUT43_P23_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_3N_TOUT6_P02_6_OUT

IfxGtm_TOM1_3N_TOUT6_P02_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_3N_TOUT74_P15_3_OUT

IfxGtm_TOM1_3N_TOUT74_P15_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_3_TOUT118_P02_11_OUT

IfxGtm_TOM1_3_TOUT118_P02_11_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_3_TOUT13_P00_4_OUT

IfxGtm_TOM1_3_TOUT13_P00_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_3_TOUT21_P00_12_OUT

IfxGtm_TOM1_3_TOUT21_P00_12_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_3_TOUT244_P15_12_OUT

IfxGtm_TOM1_3_TOUT244_P15_12_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_3_TOUT29_P33_7_OUT

IfxGtm_TOM1_3_TOUT29_P33_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_3_TOUT38_P32_2_OUT

IfxGtm_TOM1_3_TOUT38_P32_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_3_TOUT3_P02_3_OUT

IfxGtm_TOM1_3_TOUT3_P02_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_3_TOUT71_P15_0_OUT

IfxGtm_TOM1_3_TOUT71_P15_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_3_TOUT80_P14_0_OUT

IfxGtm_TOM1_3_TOUT80_P14_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4N_TOUT10_P00_1_OUT

IfxGtm_TOM1_4N_TOUT10_P00_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4N_TOUT13_P00_4_OUT

IfxGtm_TOM1_4N_TOUT13_P00_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4N_TOUT143_P33_14_OUT

IfxGtm_TOM1_4N_TOUT143_P33_14_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4N_TOUT147_P34_2_OUT

IfxGtm_TOM1_4N_TOUT147_P34_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4N_TOUT1_P02_1_OUT

IfxGtm_TOM1_4N_TOUT1_P02_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4N_TOUT21_P00_12_OUT

IfxGtm_TOM1_4N_TOUT21_P00_12_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4N_TOUT244_P15_12_OUT

IfxGtm_TOM1_4N_TOUT244_P15_12_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4N_TOUT29_P33_7_OUT

IfxGtm_TOM1_4N_TOUT29_P33_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4N_TOUT36_P32_0_OUT

IfxGtm_TOM1_4N_TOUT36_P32_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4N_TOUT54_P21_3_OUT

IfxGtm_TOM1_4N_TOUT54_P21_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4N_TOUT65_P20_9_OUT

IfxGtm_TOM1_4N_TOUT65_P20_9_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4N_TOUT71_P15_0_OUT

IfxGtm_TOM1_4N_TOUT71_P15_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4N_TOUT73_P15_2_OUT

IfxGtm_TOM1_4N_TOUT73_P15_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4N_TOUT8_P02_8_OUT

IfxGtm_TOM1_4N_TOUT8_P02_8_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4N_TOUT95_P11_2_OUT

IfxGtm_TOM1_4N_TOUT95_P11_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4_TOUT0_P02_0_OUT

IfxGtm_TOM1_4_TOUT0_P02_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4_TOUT124_P11_8_OUT

IfxGtm_TOM1_4_TOUT124_P11_8_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4_TOUT14_P00_5_OUT

IfxGtm_TOM1_4_TOUT14_P00_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4_TOUT22_P33_0_OUT

IfxGtm_TOM1_4_TOUT22_P33_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4_TOUT245_P15_13_OUT

IfxGtm_TOM1_4_TOUT245_P15_13_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4_TOUT30_P33_8_OUT

IfxGtm_TOM1_4_TOUT30_P33_8_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4_TOUT37_P32_1_OUT

IfxGtm_TOM1_4_TOUT37_P32_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4_TOUT39_P32_3_OUT

IfxGtm_TOM1_4_TOUT39_P32_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4_TOUT53_P21_2_OUT

IfxGtm_TOM1_4_TOUT53_P21_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4_TOUT64_P20_8_OUT

IfxGtm_TOM1_4_TOUT64_P20_8_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4_TOUT72_P15_1_OUT

IfxGtm_TOM1_4_TOUT72_P15_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4_TOUT81_P14_1_OUT

IfxGtm_TOM1_4_TOUT81_P14_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4_TOUT94_P13_3_OUT

IfxGtm_TOM1_4_TOUT94_P13_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4_TOUT9_P00_0_OUT

IfxGtm_TOM1_4_TOUT9_P00_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5N_TOUT12_P00_3_OUT

IfxGtm_TOM1_5N_TOUT12_P00_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5N_TOUT144_P33_15_OUT

IfxGtm_TOM1_5N_TOUT144_P33_15_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5N_TOUT148_P34_3_OUT

IfxGtm_TOM1_5N_TOUT148_P34_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5N_TOUT18_P00_9_OUT

IfxGtm_TOM1_5N_TOUT18_P00_9_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5N_TOUT26_P33_4_OUT

IfxGtm_TOM1_5N_TOUT26_P33_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5N_TOUT28_P33_6_OUT

IfxGtm_TOM1_5N_TOUT28_P33_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5N_TOUT32_P33_10_OUT

IfxGtm_TOM1_5N_TOUT32_P33_10_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5N_TOUT37_P32_1_OUT

IfxGtm_TOM1_5N_TOUT37_P32_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5N_TOUT3_P02_3_OUT

IfxGtm_TOM1_5N_TOUT3_P02_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5N_TOUT56_P21_5_OUT

IfxGtm_TOM1_5N_TOUT56_P21_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5N_TOUT67_P20_11_OUT

IfxGtm_TOM1_5N_TOUT67_P20_11_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5N_TOUT76_P15_5_OUT

IfxGtm_TOM1_5N_TOUT76_P15_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5N_TOUT77_P15_6_OUT

IfxGtm_TOM1_5N_TOUT77_P15_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5N_TOUT97_P11_6_OUT

IfxGtm_TOM1_5N_TOUT97_P11_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5N_TOUT9_P00_0_OUT

IfxGtm_TOM1_5N_TOUT9_P00_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5_TOUT11_P00_2_OUT

IfxGtm_TOM1_5_TOUT11_P00_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5_TOUT15_P00_6_OUT

IfxGtm_TOM1_5_TOUT15_P00_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5_TOUT23_P33_1_OUT

IfxGtm_TOM1_5_TOUT23_P33_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5_TOUT246_P15_14_OUT

IfxGtm_TOM1_5_TOUT246_P15_14_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5_TOUT27_P33_5_OUT

IfxGtm_TOM1_5_TOUT27_P33_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5_TOUT2_P02_2_OUT

IfxGtm_TOM1_5_TOUT2_P02_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5_TOUT40_P32_4_OUT

IfxGtm_TOM1_5_TOUT40_P32_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5_TOUT41_P23_0_OUT

IfxGtm_TOM1_5_TOUT41_P23_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5_TOUT55_P21_4_OUT

IfxGtm_TOM1_5_TOUT55_P21_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5_TOUT66_P20_10_OUT

IfxGtm_TOM1_5_TOUT66_P20_10_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5_TOUT73_P15_2_OUT

IfxGtm_TOM1_5_TOUT73_P15_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5_TOUT74_P15_3_OUT

IfxGtm_TOM1_5_TOUT74_P15_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5_TOUT82_P14_2_OUT

IfxGtm_TOM1_5_TOUT82_P14_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5_TOUT96_P11_3_OUT

IfxGtm_TOM1_5_TOUT96_P11_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6N_TOUT10_P00_1_OUT

IfxGtm_TOM1_6N_TOUT10_P00_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6N_TOUT11_P00_2_OUT

IfxGtm_TOM1_6N_TOUT11_P00_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6N_TOUT149_P34_4_OUT

IfxGtm_TOM1_6N_TOUT149_P34_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6N_TOUT14_P00_5_OUT

IfxGtm_TOM1_6N_TOUT14_P00_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6N_TOUT19_P00_10_OUT

IfxGtm_TOM1_6N_TOUT19_P00_10_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6N_TOUT242_P15_10_OUT

IfxGtm_TOM1_6N_TOUT242_P15_10_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6N_TOUT27_P33_5_OUT

IfxGtm_TOM1_6N_TOUT27_P33_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6N_TOUT30_P33_8_OUT

IfxGtm_TOM1_6N_TOUT30_P33_8_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6N_TOUT31_P33_9_OUT

IfxGtm_TOM1_6N_TOUT31_P33_9_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6N_TOUT38_P32_2_OUT

IfxGtm_TOM1_6N_TOUT38_P32_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6N_TOUT40_P32_4_OUT

IfxGtm_TOM1_6N_TOUT40_P32_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6N_TOUT49_P22_2_OUT

IfxGtm_TOM1_6N_TOUT49_P22_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6N_TOUT5_P02_5_OUT

IfxGtm_TOM1_6N_TOUT5_P02_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6N_TOUT69_P20_13_OUT

IfxGtm_TOM1_6N_TOUT69_P20_13_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6N_TOUT78_P15_7_OUT

IfxGtm_TOM1_6N_TOUT78_P15_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6N_TOUT82_P14_2_OUT

IfxGtm_TOM1_6N_TOUT82_P14_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6N_TOUT91_P13_0_OUT

IfxGtm_TOM1_6N_TOUT91_P13_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6N_TOUT99_P11_10_OUT

IfxGtm_TOM1_6N_TOUT99_P11_10_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6_TOUT13_P00_4_OUT

IfxGtm_TOM1_6_TOUT13_P00_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6_TOUT16_P00_7_OUT

IfxGtm_TOM1_6_TOUT16_P00_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6_TOUT247_P15_15_OUT

IfxGtm_TOM1_6_TOUT247_P15_15_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6_TOUT24_P33_2_OUT

IfxGtm_TOM1_6_TOUT24_P33_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6_TOUT29_P33_7_OUT

IfxGtm_TOM1_6_TOUT29_P33_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6_TOUT43_P23_2_OUT

IfxGtm_TOM1_6_TOUT43_P23_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6_TOUT48_P22_1_OUT

IfxGtm_TOM1_6_TOUT48_P22_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6_TOUT4_P02_4_OUT

IfxGtm_TOM1_6_TOUT4_P02_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6_TOUT68_P20_12_OUT

IfxGtm_TOM1_6_TOUT68_P20_12_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6_TOUT74_P15_3_OUT

IfxGtm_TOM1_6_TOUT74_P15_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6_TOUT80_P14_0_OUT

IfxGtm_TOM1_6_TOUT80_P14_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6_TOUT83_P14_3_OUT

IfxGtm_TOM1_6_TOUT83_P14_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6_TOUT98_P11_9_OUT

IfxGtm_TOM1_6_TOUT98_P11_9_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7N_TOUT100_P11_11_OUT

IfxGtm_TOM1_7N_TOUT100_P11_11_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7N_TOUT12_P00_3_OUT

IfxGtm_TOM1_7N_TOUT12_P00_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7N_TOUT130_P22_4_OUT

IfxGtm_TOM1_7N_TOUT130_P22_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7N_TOUT150_P34_5_OUT

IfxGtm_TOM1_7N_TOUT150_P34_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7N_TOUT16_P00_7_OUT

IfxGtm_TOM1_7N_TOUT16_P00_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7N_TOUT20_P00_11_OUT

IfxGtm_TOM1_7N_TOUT20_P00_11_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7N_TOUT243_P15_11_OUT

IfxGtm_TOM1_7N_TOUT243_P15_11_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7N_TOUT28_P33_6_OUT

IfxGtm_TOM1_7N_TOUT28_P33_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7N_TOUT32_P33_10_OUT

IfxGtm_TOM1_7N_TOUT32_P33_10_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7N_TOUT33_P33_11_OUT

IfxGtm_TOM1_7N_TOUT33_P33_11_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7N_TOUT39_P32_3_OUT

IfxGtm_TOM1_7N_TOUT39_P32_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7N_TOUT42_P23_1_OUT

IfxGtm_TOM1_7N_TOUT42_P23_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7N_TOUT71_P15_0_OUT

IfxGtm_TOM1_7N_TOUT71_P15_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7N_TOUT79_P15_8_OUT

IfxGtm_TOM1_7N_TOUT79_P15_8_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7N_TOUT7_P02_7_OUT

IfxGtm_TOM1_7N_TOUT7_P02_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7N_TOUT84_P14_4_OUT

IfxGtm_TOM1_7N_TOUT84_P14_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7N_TOUT93_P13_2_OUT

IfxGtm_TOM1_7N_TOUT93_P13_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7_TOUT101_P11_12_OUT

IfxGtm_TOM1_7_TOUT101_P11_12_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7_TOUT15_P00_6_OUT

IfxGtm_TOM1_7_TOUT15_P00_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7_TOUT17_P00_8_OUT

IfxGtm_TOM1_7_TOUT17_P00_8_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7_TOUT248_P13_9_OUT

IfxGtm_TOM1_7_TOUT248_P13_9_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7_TOUT25_P33_3_OUT

IfxGtm_TOM1_7_TOUT25_P33_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7_TOUT31_P33_9_OUT

IfxGtm_TOM1_7_TOUT31_P33_9_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7_TOUT44_P23_3_OUT

IfxGtm_TOM1_7_TOUT44_P23_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7_TOUT45_P23_4_OUT

IfxGtm_TOM1_7_TOUT45_P23_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7_TOUT50_P22_3_OUT

IfxGtm_TOM1_7_TOUT50_P22_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7_TOUT64_P20_8_OUT

IfxGtm_TOM1_7_TOUT64_P20_8_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7_TOUT6_P02_6_OUT

IfxGtm_TOM1_7_TOUT6_P02_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7_TOUT70_P20_14_OUT

IfxGtm_TOM1_7_TOUT70_P20_14_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7_TOUT75_P15_4_OUT

IfxGtm_TOM1_7_TOUT75_P15_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7_TOUT81_P14_1_OUT

IfxGtm_TOM1_7_TOUT81_P14_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7_TOUT84_P14_4_OUT

IfxGtm_TOM1_7_TOUT84_P14_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7_TOUT92_P13_1_OUT

IfxGtm_TOM1_7_TOUT92_P13_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_8_TOUT0_P02_0_OUT

IfxGtm_TOM1_8_TOUT0_P02_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_8_TOUT128_P12_0_OUT

IfxGtm_TOM1_8_TOUT128_P12_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_8_TOUT141_P32_6_OUT

IfxGtm_TOM1_8_TOUT141_P32_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_8_TOUT249_P13_12_OUT

IfxGtm_TOM1_8_TOUT249_P13_12_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_9_TOUT129_P12_1_OUT

IfxGtm_TOM1_9_TOUT129_P12_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_9_TOUT142_P32_7_OUT

IfxGtm_TOM1_9_TOUT142_P32_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_9_TOUT1_P02_1_OUT

IfxGtm_TOM1_9_TOUT1_P02_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM1_9_TOUT265_P10_9_OUT

IfxGtm_TOM1_9_TOUT265_P10_9_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_0N_TOUT101_P11_12_OUT

IfxGtm_TOM2_0N_TOUT101_P11_12_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_0N_TOUT126_P11_14_OUT

IfxGtm_TOM2_0N_TOUT126_P11_14_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_0N_TOUT264_P13_15_OUT

IfxGtm_TOM2_0N_TOUT264_P13_15_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_0N_TOUT43_P23_2_OUT

IfxGtm_TOM2_0N_TOUT43_P23_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_0N_TOUT51_P21_0_OUT

IfxGtm_TOM2_0N_TOUT51_P21_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_0N_TOUT61_P20_3_OUT

IfxGtm_TOM2_0N_TOUT61_P20_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_0N_TOUT76_P15_5_OUT

IfxGtm_TOM2_0N_TOUT76_P15_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_0N_TOUT91_P13_0_OUT

IfxGtm_TOM2_0N_TOUT91_P13_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_0_TOUT119_P11_0_OUT

IfxGtm_TOM2_0_TOUT119_P11_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_0_TOUT120_P11_1_OUT

IfxGtm_TOM2_0_TOUT120_P11_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_0_TOUT250_P13_11_OUT

IfxGtm_TOM2_0_TOUT250_P13_11_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_0_TOUT48_P22_1_OUT

IfxGtm_TOM2_0_TOUT48_P22_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_0_TOUT53_P21_2_OUT

IfxGtm_TOM2_0_TOUT53_P21_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_0_TOUT65_P20_9_OUT

IfxGtm_TOM2_0_TOUT65_P20_9_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_0_TOUT87_P14_7_OUT

IfxGtm_TOM2_0_TOUT87_P14_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_0_TOUT94_P13_3_OUT

IfxGtm_TOM2_0_TOUT94_P13_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_0_TOUT95_P11_2_OUT

IfxGtm_TOM2_0_TOUT95_P11_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_10_TOUT104_P10_2_OUT

IfxGtm_TOM2_10_TOUT104_P10_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_10_TOUT107_P10_5_OUT

IfxGtm_TOM2_10_TOUT107_P10_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_10_TOUT133_P22_7_OUT

IfxGtm_TOM2_10_TOUT133_P22_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_10_TOUT260_P14_13_OUT

IfxGtm_TOM2_10_TOUT260_P14_13_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_10_TOUT62_P20_6_OUT

IfxGtm_TOM2_10_TOUT62_P20_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_10_TOUT70_P20_14_OUT

IfxGtm_TOM2_10_TOUT70_P20_14_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_11_TOUT105_P10_3_OUT

IfxGtm_TOM2_11_TOUT105_P10_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_11_TOUT108_P10_6_OUT

IfxGtm_TOM2_11_TOUT108_P10_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_11_TOUT134_P22_8_OUT

IfxGtm_TOM2_11_TOUT134_P22_8_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_11_TOUT261_P14_12_OUT

IfxGtm_TOM2_11_TOUT261_P14_12_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_11_TOUT63_P20_7_OUT

IfxGtm_TOM2_11_TOUT63_P20_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_11_TOUT71_P15_0_OUT

IfxGtm_TOM2_11_TOUT71_P15_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_12_TOUT102_P10_0_OUT

IfxGtm_TOM2_12_TOUT102_P10_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_12_TOUT135_P22_9_OUT

IfxGtm_TOM2_12_TOUT135_P22_9_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_12_TOUT262_P13_13_OUT

IfxGtm_TOM2_12_TOUT262_P13_13_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_12_TOUT34_P33_12_OUT

IfxGtm_TOM2_12_TOUT34_P33_12_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_12_TOUT72_P15_1_OUT

IfxGtm_TOM2_12_TOUT72_P15_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_13_TOUT110_P10_8_OUT

IfxGtm_TOM2_13_TOUT110_P10_8_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_13_TOUT136_P22_10_OUT

IfxGtm_TOM2_13_TOUT136_P22_10_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_13_TOUT263_P14_15_OUT

IfxGtm_TOM2_13_TOUT263_P14_15_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_13_TOUT35_P33_13_OUT

IfxGtm_TOM2_13_TOUT35_P33_13_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_13_TOUT65_P20_9_OUT

IfxGtm_TOM2_13_TOUT65_P20_9_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_13_TOUT73_P15_2_OUT

IfxGtm_TOM2_13_TOUT73_P15_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_14_TOUT137_P22_11_OUT

IfxGtm_TOM2_14_TOUT137_P22_11_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_14_TOUT264_P13_15_OUT

IfxGtm_TOM2_14_TOUT264_P13_15_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_14_TOUT36_P32_0_OUT

IfxGtm_TOM2_14_TOUT36_P32_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_14_TOUT66_P20_10_OUT

IfxGtm_TOM2_14_TOUT66_P20_10_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_14_TOUT74_P15_3_OUT

IfxGtm_TOM2_14_TOUT74_P15_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_15_TOUT149_P34_4_OUT

IfxGtm_TOM2_15_TOUT149_P34_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_15_TOUT37_P32_1_OUT

IfxGtm_TOM2_15_TOUT37_P32_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_15_TOUT67_P20_11_OUT

IfxGtm_TOM2_15_TOUT67_P20_11_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_15_TOUT75_P15_4_OUT

IfxGtm_TOM2_15_TOUT75_P15_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_1N_TOUT123_P11_7_OUT

IfxGtm_TOM2_1N_TOUT123_P11_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_1N_TOUT124_P11_8_OUT

IfxGtm_TOM2_1N_TOUT124_P11_8_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_1N_TOUT254_P13_5_OUT

IfxGtm_TOM2_1N_TOUT254_P13_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_1N_TOUT44_P23_3_OUT

IfxGtm_TOM2_1N_TOUT44_P23_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_1N_TOUT50_P22_3_OUT

IfxGtm_TOM2_1N_TOUT50_P22_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_1N_TOUT52_P21_1_OUT

IfxGtm_TOM2_1N_TOUT52_P21_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_1N_TOUT57_P21_6_OUT

IfxGtm_TOM2_1N_TOUT57_P21_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_1N_TOUT61_P20_3_OUT

IfxGtm_TOM2_1N_TOUT61_P20_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_1N_TOUT79_P15_8_OUT

IfxGtm_TOM2_1N_TOUT79_P15_8_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_1N_TOUT90_P14_10_OUT

IfxGtm_TOM2_1N_TOUT90_P14_10_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_1N_TOUT92_P13_1_OUT

IfxGtm_TOM2_1N_TOUT92_P13_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_1N_TOUT98_P11_9_OUT

IfxGtm_TOM2_1N_TOUT98_P11_9_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_1_TOUT120_P11_1_OUT

IfxGtm_TOM2_1_TOUT120_P11_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_1_TOUT127_P11_15_OUT

IfxGtm_TOM2_1_TOUT127_P11_15_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_1_TOUT251_P13_10_OUT

IfxGtm_TOM2_1_TOUT251_P13_10_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_1_TOUT47_P22_0_OUT

IfxGtm_TOM2_1_TOUT47_P22_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_1_TOUT54_P21_3_OUT

IfxGtm_TOM2_1_TOUT54_P21_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_1_TOUT64_P20_8_OUT

IfxGtm_TOM2_1_TOUT64_P20_8_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_1_TOUT95_P11_2_OUT

IfxGtm_TOM2_1_TOUT95_P11_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_2N_TOUT124_P11_8_OUT

IfxGtm_TOM2_2N_TOUT124_P11_8_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_2N_TOUT255_P13_6_OUT

IfxGtm_TOM2_2N_TOUT255_P13_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_2N_TOUT46_P23_5_OUT

IfxGtm_TOM2_2N_TOUT46_P23_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_2N_TOUT58_P21_7_OUT

IfxGtm_TOM2_2N_TOUT58_P21_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_2N_TOUT78_P15_7_OUT

IfxGtm_TOM2_2N_TOUT78_P15_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_2N_TOUT93_P13_2_OUT

IfxGtm_TOM2_2N_TOUT93_P13_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_2N_TOUT99_P11_10_OUT

IfxGtm_TOM2_2N_TOUT99_P11_10_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_2_TOUT121_P11_4_OUT

IfxGtm_TOM2_2_TOUT121_P11_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_2_TOUT125_P11_13_OUT

IfxGtm_TOM2_2_TOUT125_P11_13_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_2_TOUT252_P13_14_OUT

IfxGtm_TOM2_2_TOUT252_P13_14_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_2_TOUT46_P23_5_OUT

IfxGtm_TOM2_2_TOUT46_P23_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_2_TOUT50_P22_3_OUT

IfxGtm_TOM2_2_TOUT50_P22_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_2_TOUT55_P21_4_OUT

IfxGtm_TOM2_2_TOUT55_P21_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_2_TOUT63_P20_7_OUT

IfxGtm_TOM2_2_TOUT63_P20_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_2_TOUT88_P14_8_OUT

IfxGtm_TOM2_2_TOUT88_P14_8_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_2_TOUT96_P11_3_OUT

IfxGtm_TOM2_2_TOUT96_P11_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_3N_TOUT100_P11_11_OUT

IfxGtm_TOM2_3N_TOUT100_P11_11_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_3N_TOUT106_P10_4_OUT

IfxGtm_TOM2_3N_TOUT106_P10_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_3N_TOUT122_P11_5_OUT

IfxGtm_TOM2_3N_TOUT122_P11_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_3N_TOUT256_P13_7_OUT

IfxGtm_TOM2_3N_TOUT256_P13_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_3N_TOUT45_P23_4_OUT

IfxGtm_TOM2_3N_TOUT45_P23_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_3N_TOUT59_P20_0_OUT

IfxGtm_TOM2_3N_TOUT59_P20_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_3N_TOUT77_P15_6_OUT

IfxGtm_TOM2_3N_TOUT77_P15_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_3_TOUT122_P11_5_OUT

IfxGtm_TOM2_3_TOUT122_P11_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_3_TOUT126_P11_14_OUT

IfxGtm_TOM2_3_TOUT126_P11_14_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_3_TOUT253_P13_4_OUT

IfxGtm_TOM2_3_TOUT253_P13_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_3_TOUT49_P22_2_OUT

IfxGtm_TOM2_3_TOUT49_P22_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_3_TOUT56_P21_5_OUT

IfxGtm_TOM2_3_TOUT56_P21_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_3_TOUT60_P20_1_OUT

IfxGtm_TOM2_3_TOUT60_P20_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_3_TOUT62_P20_6_OUT

IfxGtm_TOM2_3_TOUT62_P20_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_3_TOUT89_P14_9_OUT

IfxGtm_TOM2_3_TOUT89_P14_9_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_3_TOUT97_P11_6_OUT

IfxGtm_TOM2_3_TOUT97_P11_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_4N_TOUT106_P10_4_OUT

IfxGtm_TOM2_4N_TOUT106_P10_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_4N_TOUT120_P11_1_OUT

IfxGtm_TOM2_4N_TOUT120_P11_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_4N_TOUT122_P11_5_OUT

IfxGtm_TOM2_4N_TOUT122_P11_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_4N_TOUT126_P11_14_OUT

IfxGtm_TOM2_4N_TOUT126_P11_14_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_4N_TOUT137_P22_11_OUT

IfxGtm_TOM2_4N_TOUT137_P22_11_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_4N_TOUT253_P13_4_OUT

IfxGtm_TOM2_4N_TOUT253_P13_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_4N_TOUT56_P21_5_OUT

IfxGtm_TOM2_4N_TOUT56_P21_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_4N_TOUT60_P20_1_OUT

IfxGtm_TOM2_4N_TOUT60_P20_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_4N_TOUT89_P14_9_OUT

IfxGtm_TOM2_4N_TOUT89_P14_9_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_4N_TOUT97_P11_6_OUT

IfxGtm_TOM2_4N_TOUT97_P11_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_4_TOUT102_P10_0_OUT

IfxGtm_TOM2_4_TOUT102_P10_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_4_TOUT123_P11_7_OUT

IfxGtm_TOM2_4_TOUT123_P11_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_4_TOUT133_P22_7_OUT

IfxGtm_TOM2_4_TOUT133_P22_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_4_TOUT254_P13_5_OUT

IfxGtm_TOM2_4_TOUT254_P13_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_4_TOUT50_P22_3_OUT

IfxGtm_TOM2_4_TOUT50_P22_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_4_TOUT57_P21_6_OUT

IfxGtm_TOM2_4_TOUT57_P21_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_4_TOUT61_P20_3_OUT

IfxGtm_TOM2_4_TOUT61_P20_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_4_TOUT90_P14_10_OUT

IfxGtm_TOM2_4_TOUT90_P14_10_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_4_TOUT98_P11_9_OUT

IfxGtm_TOM2_4_TOUT98_P11_9_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_5N_TOUT107_P10_5_OUT

IfxGtm_TOM2_5N_TOUT107_P10_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_5N_TOUT119_P11_0_OUT

IfxGtm_TOM2_5N_TOUT119_P11_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_5N_TOUT136_P22_10_OUT

IfxGtm_TOM2_5N_TOUT136_P22_10_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_5N_TOUT250_P13_11_OUT

IfxGtm_TOM2_5N_TOUT250_P13_11_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_5N_TOUT53_P21_2_OUT

IfxGtm_TOM2_5N_TOUT53_P21_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_5N_TOUT87_P14_7_OUT

IfxGtm_TOM2_5N_TOUT87_P14_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_5N_TOUT94_P13_3_OUT

IfxGtm_TOM2_5N_TOUT94_P13_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_5_TOUT103_P10_1_OUT

IfxGtm_TOM2_5_TOUT103_P10_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_5_TOUT124_P11_8_OUT

IfxGtm_TOM2_5_TOUT124_P11_8_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_5_TOUT132_P22_6_OUT

IfxGtm_TOM2_5_TOUT132_P22_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_5_TOUT255_P13_6_OUT

IfxGtm_TOM2_5_TOUT255_P13_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_5_TOUT58_P21_7_OUT

IfxGtm_TOM2_5_TOUT58_P21_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_5_TOUT91_P13_0_OUT

IfxGtm_TOM2_5_TOUT91_P13_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_5_TOUT99_P11_10_OUT

IfxGtm_TOM2_5_TOUT99_P11_10_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_6N_TOUT108_P10_6_OUT

IfxGtm_TOM2_6N_TOUT108_P10_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_6N_TOUT120_P11_1_OUT

IfxGtm_TOM2_6N_TOUT120_P11_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_6N_TOUT122_P11_5_OUT

IfxGtm_TOM2_6N_TOUT122_P11_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_6N_TOUT135_P22_9_OUT

IfxGtm_TOM2_6N_TOUT135_P22_9_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_6N_TOUT251_P13_10_OUT

IfxGtm_TOM2_6N_TOUT251_P13_10_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_6N_TOUT54_P21_3_OUT

IfxGtm_TOM2_6N_TOUT54_P21_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_6N_TOUT86_P14_6_OUT

IfxGtm_TOM2_6N_TOUT86_P14_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_6N_TOUT95_P11_2_OUT

IfxGtm_TOM2_6N_TOUT95_P11_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_6_TOUT100_P11_11_OUT

IfxGtm_TOM2_6_TOUT100_P11_11_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_6_TOUT104_P10_2_OUT

IfxGtm_TOM2_6_TOUT104_P10_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_6_TOUT106_P10_4_OUT

IfxGtm_TOM2_6_TOUT106_P10_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_6_TOUT125_P11_13_OUT

IfxGtm_TOM2_6_TOUT125_P11_13_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_6_TOUT131_P22_5_OUT

IfxGtm_TOM2_6_TOUT131_P22_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_6_TOUT256_P13_7_OUT

IfxGtm_TOM2_6_TOUT256_P13_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_6_TOUT59_P20_0_OUT

IfxGtm_TOM2_6_TOUT59_P20_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_6_TOUT92_P13_1_OUT

IfxGtm_TOM2_6_TOUT92_P13_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_7N_TOUT109_P10_7_OUT

IfxGtm_TOM2_7N_TOUT109_P10_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_7N_TOUT121_P11_4_OUT

IfxGtm_TOM2_7N_TOUT121_P11_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_7N_TOUT134_P22_8_OUT

IfxGtm_TOM2_7N_TOUT134_P22_8_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_7N_TOUT252_P13_14_OUT

IfxGtm_TOM2_7N_TOUT252_P13_14_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_7N_TOUT55_P21_4_OUT

IfxGtm_TOM2_7N_TOUT55_P21_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_7N_TOUT88_P14_8_OUT

IfxGtm_TOM2_7N_TOUT88_P14_8_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_7N_TOUT96_P11_3_OUT

IfxGtm_TOM2_7N_TOUT96_P11_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_7N_TOUT98_P11_9_OUT

IfxGtm_TOM2_7N_TOUT98_P11_9_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_7_TOUT101_P11_12_OUT

IfxGtm_TOM2_7_TOUT101_P11_12_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_7_TOUT105_P10_3_OUT

IfxGtm_TOM2_7_TOUT105_P10_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_7_TOUT126_P11_14_OUT

IfxGtm_TOM2_7_TOUT126_P11_14_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_7_TOUT130_P22_4_OUT

IfxGtm_TOM2_7_TOUT130_P22_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_7_TOUT264_P13_15_OUT

IfxGtm_TOM2_7_TOUT264_P13_15_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_7_TOUT64_P20_8_OUT

IfxGtm_TOM2_7_TOUT64_P20_8_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_7_TOUT93_P13_2_OUT

IfxGtm_TOM2_7_TOUT93_P13_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_8_TOUT109_P10_7_OUT

IfxGtm_TOM2_8_TOUT109_P10_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_8_TOUT127_P11_15_OUT

IfxGtm_TOM2_8_TOUT127_P11_15_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_8_TOUT131_P22_5_OUT

IfxGtm_TOM2_8_TOUT131_P22_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_8_TOUT258_P14_11_OUT

IfxGtm_TOM2_8_TOUT258_P14_11_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_8_TOUT51_P21_0_OUT

IfxGtm_TOM2_8_TOUT51_P21_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_8_TOUT68_P20_12_OUT

IfxGtm_TOM2_8_TOUT68_P20_12_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_9_TOUT103_P10_1_OUT

IfxGtm_TOM2_9_TOUT103_P10_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_9_TOUT132_P22_6_OUT

IfxGtm_TOM2_9_TOUT132_P22_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_9_TOUT259_P14_14_OUT

IfxGtm_TOM2_9_TOUT259_P14_14_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_9_TOUT52_P21_1_OUT

IfxGtm_TOM2_9_TOUT52_P21_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM2_9_TOUT69_P20_13_OUT

IfxGtm_TOM2_9_TOUT69_P20_13_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_0N_TOUT134_P22_8_OUT

IfxGtm_TOM3_0N_TOUT134_P22_8_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_0N_TOUT161_P01_13_OUT

IfxGtm_TOM3_0N_TOUT161_P01_13_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_0N_TOUT181_P31_7_OUT

IfxGtm_TOM3_0N_TOUT181_P31_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_0N_TOUT213_P25_7_OUT

IfxGtm_TOM3_0N_TOUT213_P25_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_0N_TOUT8_P02_8_OUT

IfxGtm_TOM3_0N_TOUT8_P02_8_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_0_TOUT110_P10_8_OUT

IfxGtm_TOM3_0_TOUT110_P10_8_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_0_TOUT115_P01_7_OUT

IfxGtm_TOM3_0_TOUT115_P01_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_0_TOUT130_P22_4_OUT

IfxGtm_TOM3_0_TOUT130_P22_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_0_TOUT155_P01_0_OUT

IfxGtm_TOM3_0_TOUT155_P01_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_0_TOUT162_P01_8_OUT

IfxGtm_TOM3_0_TOUT162_P01_8_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_0_TOUT174_P31_0_OUT

IfxGtm_TOM3_0_TOUT174_P31_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_0_TOUT206_P25_0_OUT

IfxGtm_TOM3_0_TOUT206_P25_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_10_TOUT164_P01_14_OUT

IfxGtm_TOM3_10_TOUT164_P01_14_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_10_TOUT184_P31_10_OUT

IfxGtm_TOM3_10_TOUT184_P31_10_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_10_TOUT188_P31_14_OUT

IfxGtm_TOM3_10_TOUT188_P31_14_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_10_TOUT216_P25_10_OUT

IfxGtm_TOM3_10_TOUT216_P25_10_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_10_TOUT220_P25_14_OUT

IfxGtm_TOM3_10_TOUT220_P25_14_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_10_TOUT266_P10_10_OUT

IfxGtm_TOM3_10_TOUT266_P10_10_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_11_TOUT166_P00_14_OUT

IfxGtm_TOM3_11_TOUT166_P00_14_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_11_TOUT185_P31_11_OUT

IfxGtm_TOM3_11_TOUT185_P31_11_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_11_TOUT189_P31_15_OUT

IfxGtm_TOM3_11_TOUT189_P31_15_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_11_TOUT217_P25_11_OUT

IfxGtm_TOM3_11_TOUT217_P25_11_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_11_TOUT221_P25_15_OUT

IfxGtm_TOM3_11_TOUT221_P25_15_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_11_TOUT267_P10_14_OUT

IfxGtm_TOM3_11_TOUT267_P10_14_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_12_TOUT167_P00_13_OUT

IfxGtm_TOM3_12_TOUT167_P00_13_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_12_TOUT186_P31_12_OUT

IfxGtm_TOM3_12_TOUT186_P31_12_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_12_TOUT218_P25_12_OUT

IfxGtm_TOM3_12_TOUT218_P25_12_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_12_TOUT268_P10_13_OUT

IfxGtm_TOM3_12_TOUT268_P10_13_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_13_TOUT138_P23_6_OUT

IfxGtm_TOM3_13_TOUT138_P23_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_13_TOUT168_P00_15_OUT

IfxGtm_TOM3_13_TOUT168_P00_15_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_13_TOUT187_P31_13_OUT

IfxGtm_TOM3_13_TOUT187_P31_13_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_13_TOUT219_P25_13_OUT

IfxGtm_TOM3_13_TOUT219_P25_13_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_13_TOUT269_P10_11_OUT

IfxGtm_TOM3_13_TOUT269_P10_11_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_14_TOUT139_P23_7_OUT

IfxGtm_TOM3_14_TOUT139_P23_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_14_TOUT151_P02_12_OUT

IfxGtm_TOM3_14_TOUT151_P02_12_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_14_TOUT153_P02_13_OUT

IfxGtm_TOM3_14_TOUT153_P02_13_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_14_TOUT188_P31_14_OUT

IfxGtm_TOM3_14_TOUT188_P31_14_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_14_TOUT220_P25_14_OUT

IfxGtm_TOM3_14_TOUT220_P25_14_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_14_TOUT270_P10_15_OUT

IfxGtm_TOM3_14_TOUT270_P10_15_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_15_TOUT140_P32_5_OUT

IfxGtm_TOM3_15_TOUT140_P32_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_15_TOUT152_P02_15_OUT

IfxGtm_TOM3_15_TOUT152_P02_15_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_15_TOUT154_P02_14_OUT

IfxGtm_TOM3_15_TOUT154_P02_14_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_15_TOUT189_P31_15_OUT

IfxGtm_TOM3_15_TOUT189_P31_15_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_15_TOUT221_P25_15_OUT

IfxGtm_TOM3_15_TOUT221_P25_15_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_1N_TOUT116_P02_9_OUT

IfxGtm_TOM3_1N_TOUT116_P02_9_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_1N_TOUT135_P22_9_OUT

IfxGtm_TOM3_1N_TOUT135_P22_9_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_1N_TOUT158_P01_12_OUT

IfxGtm_TOM3_1N_TOUT158_P01_12_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_1N_TOUT178_P31_4_OUT

IfxGtm_TOM3_1N_TOUT178_P31_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_1N_TOUT210_P25_4_OUT

IfxGtm_TOM3_1N_TOUT210_P25_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_1N_TOUT245_P15_13_OUT

IfxGtm_TOM3_1N_TOUT245_P15_13_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_1N_TOUT268_P10_13_OUT

IfxGtm_TOM3_1N_TOUT268_P10_13_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_1_TOUT111_P01_3_OUT

IfxGtm_TOM3_1_TOUT111_P01_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_1_TOUT114_P01_6_OUT

IfxGtm_TOM3_1_TOUT114_P01_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_1_TOUT131_P22_5_OUT

IfxGtm_TOM3_1_TOUT131_P22_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_1_TOUT156_P01_2_OUT

IfxGtm_TOM3_1_TOUT156_P01_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_1_TOUT163_P01_10_OUT

IfxGtm_TOM3_1_TOUT163_P01_10_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_1_TOUT175_P31_1_OUT

IfxGtm_TOM3_1_TOUT175_P31_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_1_TOUT207_P25_1_OUT

IfxGtm_TOM3_1_TOUT207_P25_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_1_TOUT242_P15_10_OUT

IfxGtm_TOM3_1_TOUT242_P15_10_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_1_TOUT265_P10_9_OUT

IfxGtm_TOM3_1_TOUT265_P10_9_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_2N_TOUT117_P02_10_OUT

IfxGtm_TOM3_2N_TOUT117_P02_10_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_2N_TOUT136_P22_10_OUT

IfxGtm_TOM3_2N_TOUT136_P22_10_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_2N_TOUT159_P01_1_OUT

IfxGtm_TOM3_2N_TOUT159_P01_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_2N_TOUT179_P31_5_OUT

IfxGtm_TOM3_2N_TOUT179_P31_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_2N_TOUT211_P25_5_OUT

IfxGtm_TOM3_2N_TOUT211_P25_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_2N_TOUT246_P15_14_OUT

IfxGtm_TOM3_2N_TOUT246_P15_14_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_2N_TOUT267_P10_14_OUT

IfxGtm_TOM3_2N_TOUT267_P10_14_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_2_TOUT112_P01_4_OUT

IfxGtm_TOM3_2_TOUT112_P01_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_2_TOUT132_P22_6_OUT

IfxGtm_TOM3_2_TOUT132_P22_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_2_TOUT157_P01_15_OUT

IfxGtm_TOM3_2_TOUT157_P01_15_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_2_TOUT164_P01_14_OUT

IfxGtm_TOM3_2_TOUT164_P01_14_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_2_TOUT176_P31_2_OUT

IfxGtm_TOM3_2_TOUT176_P31_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_2_TOUT208_P25_2_OUT

IfxGtm_TOM3_2_TOUT208_P25_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_2_TOUT243_P15_11_OUT

IfxGtm_TOM3_2_TOUT243_P15_11_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_2_TOUT266_P10_10_OUT

IfxGtm_TOM3_2_TOUT266_P10_10_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_3N_TOUT118_P02_11_OUT

IfxGtm_TOM3_3N_TOUT118_P02_11_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_3N_TOUT137_P22_11_OUT

IfxGtm_TOM3_3N_TOUT137_P22_11_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_3N_TOUT160_P01_9_OUT

IfxGtm_TOM3_3N_TOUT160_P01_9_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_3N_TOUT180_P31_6_OUT

IfxGtm_TOM3_3N_TOUT180_P31_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_3N_TOUT212_P25_6_OUT

IfxGtm_TOM3_3N_TOUT212_P25_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_3N_TOUT212_P26_0_OUT

IfxGtm_TOM3_3N_TOUT212_P26_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_3N_TOUT247_P15_15_OUT

IfxGtm_TOM3_3N_TOUT247_P15_15_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_3N_TOUT270_P10_15_OUT

IfxGtm_TOM3_3N_TOUT270_P10_15_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_3_TOUT113_P01_5_OUT

IfxGtm_TOM3_3_TOUT113_P01_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_3_TOUT133_P22_7_OUT

IfxGtm_TOM3_3_TOUT133_P22_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_3_TOUT165_P01_11_OUT

IfxGtm_TOM3_3_TOUT165_P01_11_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_3_TOUT177_P31_3_OUT

IfxGtm_TOM3_3_TOUT177_P31_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_3_TOUT209_P25_3_OUT

IfxGtm_TOM3_3_TOUT209_P25_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_3_TOUT244_P15_12_OUT

IfxGtm_TOM3_3_TOUT244_P15_12_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_3_TOUT269_P10_11_OUT

IfxGtm_TOM3_3_TOUT269_P10_11_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_4N_TOUT151_P02_12_OUT

IfxGtm_TOM3_4N_TOUT151_P02_12_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_4N_TOUT165_P01_11_OUT

IfxGtm_TOM3_4N_TOUT165_P01_11_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_4N_TOUT177_P31_3_OUT

IfxGtm_TOM3_4N_TOUT177_P31_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_4N_TOUT209_P25_3_OUT

IfxGtm_TOM3_4N_TOUT209_P25_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_4N_TOUT244_P15_12_OUT

IfxGtm_TOM3_4N_TOUT244_P15_12_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_4_TOUT110_P10_8_OUT

IfxGtm_TOM3_4_TOUT110_P10_8_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_4_TOUT111_P01_3_OUT

IfxGtm_TOM3_4_TOUT111_P01_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_4_TOUT114_P01_6_OUT

IfxGtm_TOM3_4_TOUT114_P01_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_4_TOUT134_P22_8_OUT

IfxGtm_TOM3_4_TOUT134_P22_8_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_4_TOUT158_P01_12_OUT

IfxGtm_TOM3_4_TOUT158_P01_12_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_4_TOUT178_P31_4_OUT

IfxGtm_TOM3_4_TOUT178_P31_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_4_TOUT210_P25_4_OUT

IfxGtm_TOM3_4_TOUT210_P25_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_4_TOUT245_P15_13_OUT

IfxGtm_TOM3_4_TOUT245_P15_13_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_5N_TOUT153_P02_13_OUT

IfxGtm_TOM3_5N_TOUT153_P02_13_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_5N_TOUT155_P01_0_OUT

IfxGtm_TOM3_5N_TOUT155_P01_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_5N_TOUT166_P00_14_OUT

IfxGtm_TOM3_5N_TOUT166_P00_14_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_5N_TOUT174_P31_0_OUT

IfxGtm_TOM3_5N_TOUT174_P31_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_5N_TOUT206_P25_0_OUT

IfxGtm_TOM3_5N_TOUT206_P25_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_5N_TOUT268_P10_13_OUT

IfxGtm_TOM3_5N_TOUT268_P10_13_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_5_TOUT115_P01_7_OUT

IfxGtm_TOM3_5_TOUT115_P01_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_5_TOUT135_P22_9_OUT

IfxGtm_TOM3_5_TOUT135_P22_9_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_5_TOUT159_P01_1_OUT

IfxGtm_TOM3_5_TOUT159_P01_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_5_TOUT179_P31_5_OUT

IfxGtm_TOM3_5_TOUT179_P31_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_5_TOUT211_P25_5_OUT

IfxGtm_TOM3_5_TOUT211_P25_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_5_TOUT246_P15_14_OUT

IfxGtm_TOM3_5_TOUT246_P15_14_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_5_TOUT265_P10_9_OUT

IfxGtm_TOM3_5_TOUT265_P10_9_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_6N_TOUT154_P02_14_OUT

IfxGtm_TOM3_6N_TOUT154_P02_14_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_6N_TOUT156_P01_2_OUT

IfxGtm_TOM3_6N_TOUT156_P01_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_6N_TOUT175_P31_1_OUT

IfxGtm_TOM3_6N_TOUT175_P31_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_6N_TOUT207_P25_1_OUT

IfxGtm_TOM3_6N_TOUT207_P25_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_6N_TOUT242_P15_10_OUT

IfxGtm_TOM3_6N_TOUT242_P15_10_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_6N_TOUT267_P10_14_OUT

IfxGtm_TOM3_6N_TOUT267_P10_14_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_6_TOUT136_P22_10_OUT

IfxGtm_TOM3_6_TOUT136_P22_10_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_6_TOUT160_P01_9_OUT

IfxGtm_TOM3_6_TOUT160_P01_9_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_6_TOUT180_P31_6_OUT

IfxGtm_TOM3_6_TOUT180_P31_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_6_TOUT212_P25_6_OUT

IfxGtm_TOM3_6_TOUT212_P25_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_6_TOUT212_P26_0_OUT

IfxGtm_TOM3_6_TOUT212_P26_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_6_TOUT247_P15_15_OUT

IfxGtm_TOM3_6_TOUT247_P15_15_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_6_TOUT266_P10_10_OUT

IfxGtm_TOM3_6_TOUT266_P10_10_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_7N_TOUT152_P02_15_OUT

IfxGtm_TOM3_7N_TOUT152_P02_15_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_7N_TOUT157_P01_15_OUT

IfxGtm_TOM3_7N_TOUT157_P01_15_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_7N_TOUT176_P31_2_OUT

IfxGtm_TOM3_7N_TOUT176_P31_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_7N_TOUT208_P25_2_OUT

IfxGtm_TOM3_7N_TOUT208_P25_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_7N_TOUT243_P15_11_OUT

IfxGtm_TOM3_7N_TOUT243_P15_11_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_7N_TOUT270_P10_15_OUT

IfxGtm_TOM3_7N_TOUT270_P10_15_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_7_TOUT137_P22_11_OUT

IfxGtm_TOM3_7_TOUT137_P22_11_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_7_TOUT161_P01_13_OUT

IfxGtm_TOM3_7_TOUT161_P01_13_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_7_TOUT181_P31_7_OUT

IfxGtm_TOM3_7_TOUT181_P31_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_7_TOUT213_P25_7_OUT

IfxGtm_TOM3_7_TOUT213_P25_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_7_TOUT248_P13_9_OUT

IfxGtm_TOM3_7_TOUT248_P13_9_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_7_TOUT269_P10_11_OUT

IfxGtm_TOM3_7_TOUT269_P10_11_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_8_TOUT162_P01_8_OUT

IfxGtm_TOM3_8_TOUT162_P01_8_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_8_TOUT182_P31_8_OUT

IfxGtm_TOM3_8_TOUT182_P31_8_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_8_TOUT186_P31_12_OUT

IfxGtm_TOM3_8_TOUT186_P31_12_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_8_TOUT214_P25_8_OUT

IfxGtm_TOM3_8_TOUT214_P25_8_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_8_TOUT218_P25_12_OUT

IfxGtm_TOM3_8_TOUT218_P25_12_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_8_TOUT249_P13_12_OUT

IfxGtm_TOM3_8_TOUT249_P13_12_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_9_TOUT163_P01_10_OUT

IfxGtm_TOM3_9_TOUT163_P01_10_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_9_TOUT183_P31_9_OUT

IfxGtm_TOM3_9_TOUT183_P31_9_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_9_TOUT187_P31_13_OUT

IfxGtm_TOM3_9_TOUT187_P31_13_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_9_TOUT215_P25_9_OUT

IfxGtm_TOM3_9_TOUT215_P25_9_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_9_TOUT219_P25_13_OUT

IfxGtm_TOM3_9_TOUT219_P25_13_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM3_9_TOUT265_P10_9_OUT

IfxGtm_TOM3_9_TOUT265_P10_9_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_0_TOUT155_P01_0_OUT

IfxGtm_TOM4_0_TOUT155_P01_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_0_TOUT162_P01_8_OUT

IfxGtm_TOM4_0_TOUT162_P01_8_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_0_TOUT190_P30_0_OUT

IfxGtm_TOM4_0_TOUT190_P30_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_0_TOUT222_P24_0_OUT

IfxGtm_TOM4_0_TOUT222_P24_0_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_0_TOUT250_P13_11_OUT

IfxGtm_TOM4_0_TOUT250_P13_11_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_10_TOUT164_P01_14_OUT

IfxGtm_TOM4_10_TOUT164_P01_14_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_10_TOUT200_P30_10_OUT

IfxGtm_TOM4_10_TOUT200_P30_10_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_10_TOUT204_P30_14_OUT

IfxGtm_TOM4_10_TOUT204_P30_14_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_10_TOUT232_P24_10_OUT

IfxGtm_TOM4_10_TOUT232_P24_10_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_10_TOUT260_P14_13_OUT

IfxGtm_TOM4_10_TOUT260_P14_13_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_11_TOUT166_P00_14_OUT

IfxGtm_TOM4_11_TOUT166_P00_14_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_11_TOUT201_P30_11_OUT

IfxGtm_TOM4_11_TOUT201_P30_11_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_11_TOUT205_P30_15_OUT

IfxGtm_TOM4_11_TOUT205_P30_15_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_11_TOUT233_P24_11_OUT

IfxGtm_TOM4_11_TOUT233_P24_11_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_11_TOUT261_P14_12_OUT

IfxGtm_TOM4_11_TOUT261_P14_12_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_12_TOUT167_P00_13_OUT

IfxGtm_TOM4_12_TOUT167_P00_13_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_12_TOUT202_P30_12_OUT

IfxGtm_TOM4_12_TOUT202_P30_12_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_12_TOUT230_P24_8_OUT

IfxGtm_TOM4_12_TOUT230_P24_8_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_12_TOUT234_P24_12_OUT

IfxGtm_TOM4_12_TOUT234_P24_12_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_12_TOUT262_P13_13_OUT

IfxGtm_TOM4_12_TOUT262_P13_13_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_13_TOUT168_P00_15_OUT

IfxGtm_TOM4_13_TOUT168_P00_15_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_13_TOUT203_P30_13_OUT

IfxGtm_TOM4_13_TOUT203_P30_13_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_13_TOUT231_P24_9_OUT

IfxGtm_TOM4_13_TOUT231_P24_9_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_13_TOUT235_P24_13_OUT

IfxGtm_TOM4_13_TOUT235_P24_13_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_13_TOUT263_P14_15_OUT

IfxGtm_TOM4_13_TOUT263_P14_15_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_14_TOUT151_P02_12_OUT

IfxGtm_TOM4_14_TOUT151_P02_12_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_14_TOUT153_P02_13_OUT

IfxGtm_TOM4_14_TOUT153_P02_13_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_14_TOUT204_P30_14_OUT

IfxGtm_TOM4_14_TOUT204_P30_14_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_14_TOUT232_P24_10_OUT

IfxGtm_TOM4_14_TOUT232_P24_10_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_14_TOUT236_P24_14_OUT

IfxGtm_TOM4_14_TOUT236_P24_14_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_14_TOUT264_P13_15_OUT

IfxGtm_TOM4_14_TOUT264_P13_15_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_15_TOUT152_P02_15_OUT

IfxGtm_TOM4_15_TOUT152_P02_15_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_15_TOUT154_P02_14_OUT

IfxGtm_TOM4_15_TOUT154_P02_14_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_15_TOUT205_P30_15_OUT

IfxGtm_TOM4_15_TOUT205_P30_15_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_15_TOUT233_P24_11_OUT

IfxGtm_TOM4_15_TOUT233_P24_11_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_15_TOUT237_P24_15_OUT

IfxGtm_TOM4_15_TOUT237_P24_15_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_1_TOUT156_P01_2_OUT

IfxGtm_TOM4_1_TOUT156_P01_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_1_TOUT163_P01_10_OUT

IfxGtm_TOM4_1_TOUT163_P01_10_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_1_TOUT191_P30_1_OUT

IfxGtm_TOM4_1_TOUT191_P30_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_1_TOUT223_P24_1_OUT

IfxGtm_TOM4_1_TOUT223_P24_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_1_TOUT251_P13_10_OUT

IfxGtm_TOM4_1_TOUT251_P13_10_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_2_TOUT157_P01_15_OUT

IfxGtm_TOM4_2_TOUT157_P01_15_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_2_TOUT164_P01_14_OUT

IfxGtm_TOM4_2_TOUT164_P01_14_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_2_TOUT192_P30_2_OUT

IfxGtm_TOM4_2_TOUT192_P30_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_2_TOUT224_P24_2_OUT

IfxGtm_TOM4_2_TOUT224_P24_2_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_2_TOUT252_P13_14_OUT

IfxGtm_TOM4_2_TOUT252_P13_14_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_3_TOUT165_P01_11_OUT

IfxGtm_TOM4_3_TOUT165_P01_11_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_3_TOUT193_P30_3_OUT

IfxGtm_TOM4_3_TOUT193_P30_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_3_TOUT225_P24_3_OUT

IfxGtm_TOM4_3_TOUT225_P24_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_3_TOUT253_P13_4_OUT

IfxGtm_TOM4_3_TOUT253_P13_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_4_TOUT111_P01_3_OUT

IfxGtm_TOM4_4_TOUT111_P01_3_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_4_TOUT158_P01_12_OUT

IfxGtm_TOM4_4_TOUT158_P01_12_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_4_TOUT194_P30_4_OUT

IfxGtm_TOM4_4_TOUT194_P30_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_4_TOUT226_P24_4_OUT

IfxGtm_TOM4_4_TOUT226_P24_4_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_4_TOUT254_P13_5_OUT

IfxGtm_TOM4_4_TOUT254_P13_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_4_TOUT8_P02_8_OUT

IfxGtm_TOM4_4_TOUT8_P02_8_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_5_TOUT116_P02_9_OUT

IfxGtm_TOM4_5_TOUT116_P02_9_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_5_TOUT159_P01_1_OUT

IfxGtm_TOM4_5_TOUT159_P01_1_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_5_TOUT195_P30_5_OUT

IfxGtm_TOM4_5_TOUT195_P30_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_5_TOUT227_P24_5_OUT

IfxGtm_TOM4_5_TOUT227_P24_5_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_5_TOUT255_P13_6_OUT

IfxGtm_TOM4_5_TOUT255_P13_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_6_TOUT117_P02_10_OUT

IfxGtm_TOM4_6_TOUT117_P02_10_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_6_TOUT160_P01_9_OUT

IfxGtm_TOM4_6_TOUT160_P01_9_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_6_TOUT196_P30_6_OUT

IfxGtm_TOM4_6_TOUT196_P30_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_6_TOUT228_P24_6_OUT

IfxGtm_TOM4_6_TOUT228_P24_6_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_6_TOUT256_P13_7_OUT

IfxGtm_TOM4_6_TOUT256_P13_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_7_TOUT118_P02_11_OUT

IfxGtm_TOM4_7_TOUT118_P02_11_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_7_TOUT161_P01_13_OUT

IfxGtm_TOM4_7_TOUT161_P01_13_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_7_TOUT197_P30_7_OUT

IfxGtm_TOM4_7_TOUT197_P30_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_7_TOUT229_P24_7_OUT

IfxGtm_TOM4_7_TOUT229_P24_7_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_7_TOUT264_P13_15_OUT

IfxGtm_TOM4_7_TOUT264_P13_15_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_8_TOUT162_P01_8_OUT

IfxGtm_TOM4_8_TOUT162_P01_8_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_8_TOUT198_P30_8_OUT

IfxGtm_TOM4_8_TOUT198_P30_8_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_8_TOUT202_P30_12_OUT

IfxGtm_TOM4_8_TOUT202_P30_12_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_8_TOUT230_P24_8_OUT

IfxGtm_TOM4_8_TOUT230_P24_8_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_8_TOUT258_P14_11_OUT

IfxGtm_TOM4_8_TOUT258_P14_11_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_9_TOUT163_P01_10_OUT

IfxGtm_TOM4_9_TOUT163_P01_10_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_9_TOUT199_P30_9_OUT

IfxGtm_TOM4_9_TOUT199_P30_9_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_9_TOUT203_P30_13_OUT

IfxGtm_TOM4_9_TOUT203_P30_13_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_9_TOUT231_P24_9_OUT

IfxGtm_TOM4_9_TOUT231_P24_9_OUT. More...

IFX_EXTERN IfxGtm_Tom_ToutMap

IfxGtm_TOM4_9_TOUT259_P14_14_OUT

IfxGtm_TOM4_9_TOUT259_P14_14_OUT. More...

Detailed Description

Data Structure Documentation

◆ IfxGtm_Tim_TinMap

struct IfxGtm_Tim_TinMap

TIN pin mapping structure.

Definition at line 101 of file IfxGtm_PinMap.h.

Collaboration diagram for IfxGtm_Tim_TinMap:

[legend]

Data Fields

IfxGtm_Tim_Ch

channel

TIM channel index.

IfxPort_Pin

pin

Port pin.

IfxGtm_ChXSel

select

Input multiplexer value.

IfxGtm_Tim

tim

TIM unit index.

◆ IfxGtm_Atom_ToutMap

struct IfxGtm_Atom_ToutMap

ATOM TOUT pin mapping structure.

Definition at line 110 of file IfxGtm_PinMap.h.

Collaboration diagram for IfxGtm_Atom_ToutMap:

[legend]

Data Fields

IfxGtm_Atom

atom

ATOM unit index.

IfxGtm_Atom_Ch

channel

ATOM channel index.

IfxPort_Pin

pin

Port pin.

IfxPort_OutputIdx

select

Port control code.

uint32

toutn

TOUT number.

IfxGtm_ToutSel

toutSel

TOUTSEL register control code.

◆ IfxGtm_Tom_ToutMap

struct IfxGtm_Tom_ToutMap

TOM TOUT pin mapping structure.

Definition at line 124 of file IfxGtm_PinMap.h.

Collaboration diagram for IfxGtm_Tom_ToutMap:

[legend]

Data Fields

IfxGtm_Tom_Ch

channel

TOM channel index.

IfxPort_Pin

pin

Port pin.

IfxPort_OutputIdx

select

Port control code.

IfxGtm_Tom

tom

TOM unit index.

uint32

toutn

TOUT number.

IfxGtm_ToutSel

toutSel

TOUTSEL register control code.

◆ IfxGtm_Clk_Out

struct IfxGtm_Clk_Out

GTM Clock Output.

Definition at line 135 of file IfxGtm_PinMap.h.

Collaboration diagram for IfxGtm_Clk_Out:

[legend]

Data Fields

Ifx_GTM *

module

Base address.

IfxPort_Pin

pin

Port pin.

IfxPort_OutputIdx

select

Port control code.

Typedef Documentation

◆ IfxGtm_Atom_ToutMapP

typedef IfxGtm_Atom_ToutMap* IfxGtm_Atom_ToutMapP

Pointer to IfxGtm_Atom_ToutMap.

Definition at line 121 of file IfxGtm_PinMap.h.

◆ IfxGtm_Tom_ToutMapP

typedef IfxGtm_Tom_ToutMap* IfxGtm_Tom_ToutMapP

Pointer to IfxGtm_Tom_ToutMap.

Definition at line 143 of file IfxGtm_PinMap.h.

Enumeration Type Documentation

◆ IfxGtm_ChXSel

enum IfxGtm_ChXSel

CHxSEL register control code.

Enumerator

IfxGtm_ChXSel_a

IfxGtm_ChXSel_b

IfxGtm_ChXSel_c

IfxGtm_ChXSel_d

IfxGtm_ChXSel_e

IfxGtm_ChXSel_f

IfxGtm_ChXSel_g

IfxGtm_ChXSel_h

IfxGtm_ChXSel_i

IfxGtm_ChXSel_j

IfxGtm_ChXSel_k

IfxGtm_ChXSel_l

IfxGtm_ChXSel_m

IfxGtm_ChXSel_n

IfxGtm_ChXSel_o

IfxGtm_ChXSel_p

Definition at line 59 of file IfxGtm_PinMap.h.

◆ IfxGtm_ToutSel

enum IfxGtm_ToutSel

TOUTSEL register control code.

Enumerator

IfxGtm_ToutSel_a

IfxGtm_ToutSel_b

IfxGtm_ToutSel_c

IfxGtm_ToutSel_d

IfxGtm_ToutSel_e

IfxGtm_ToutSel_f

IfxGtm_ToutSel_g

IfxGtm_ToutSel_h

IfxGtm_ToutSel_i

IfxGtm_ToutSel_j

IfxGtm_ToutSel_k

IfxGtm_ToutSel_l

Definition at line 83 of file IfxGtm_PinMap.h.

Function Documentation

◆ IfxGtm_PinMap_setAtomTout()

IFX_EXTERN void IfxGtm_PinMap_setAtomTout

(

IfxGtm_Atom_ToutMap *

config,

IfxPort_OutputMode

outputMode,

IfxPort_PadDriver

padDriver

)

Definition at line 2408 of file IfxGtm_PinMap.c.

Referenced by IfxGtm_Atom_Dtm_PwmHl_init(), IfxGtm_Atom_Pwm_init(), IfxGtm_Atom_PwmHl_init(), and IfxGtm_Atom_Timer_init().

◆ IfxGtm_PinMap_setTimTin()

IFX_EXTERN void IfxGtm_PinMap_setTimTin

(

IfxGtm_Tim_TinMap *

config,

IfxPort_InputMode

inputMode

)

Definition at line 2396 of file IfxGtm_PinMap.c.

Referenced by IfxGtm_Tim_In_init().

◆ IfxGtm_PinMap_setTomTout()

IFX_EXTERN void IfxGtm_PinMap_setTomTout

(

IfxGtm_Tom_ToutMap *

config,

IfxPort_OutputMode

outputMode,

IfxPort_PadDriver

padDriver

)

Definition at line 2420 of file IfxGtm_PinMap.c.

Referenced by IfxGtm_Tom_Dtm_PwmHl_init(), IfxGtm_Tom_Pwm_init(), IfxGtm_Tom_PwmHl_init(), and IfxGtm_Tom_Timer_init().

Variable Documentation

◆ IfxGtm_ATOM0_0_TOUT0_P02_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT0_P02_0_OUT

IfxGtm_ATOM0_0_TOUT0_P02_0_OUT.

Definition at line 154 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_0_TOUT48_P22_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT48_P22_1_OUT

IfxGtm_ATOM0_0_TOUT48_P22_1_OUT.

Definition at line 155 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_0_TOUT53_P21_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT53_P21_2_OUT

IfxGtm_ATOM0_0_TOUT53_P21_2_OUT.

Definition at line 156 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_0_TOUT85_P14_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT85_P14_5_OUT

IfxGtm_ATOM0_0_TOUT85_P14_5_OUT.

Definition at line 157 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_0_TOUT8_P02_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT8_P02_8_OUT

IfxGtm_ATOM0_0_TOUT8_P02_8_OUT.

Definition at line 158 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_0_TOUT9_P00_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT9_P00_0_OUT

IfxGtm_ATOM0_0_TOUT9_P00_0_OUT.

Definition at line 159 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_0N_TOUT112_P01_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0N_TOUT112_P01_4_OUT

IfxGtm_ATOM0_0N_TOUT112_P01_4_OUT.

Definition at line 149 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_0N_TOUT17_P00_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0N_TOUT17_P00_8_OUT

IfxGtm_ATOM0_0N_TOUT17_P00_8_OUT.

Definition at line 150 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_0N_TOUT43_P23_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0N_TOUT43_P23_2_OUT

IfxGtm_ATOM0_0N_TOUT43_P23_2_OUT.

Definition at line 151 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_0N_TOUT54_P21_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0N_TOUT54_P21_3_OUT

IfxGtm_ATOM0_0N_TOUT54_P21_3_OUT.

Definition at line 152 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_0N_TOUT7_P02_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0N_TOUT7_P02_7_OUT

IfxGtm_ATOM0_0N_TOUT7_P02_7_OUT.

Definition at line 153 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_1_TOUT10_P00_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT10_P00_1_OUT

IfxGtm_ATOM0_1_TOUT10_P00_1_OUT.

Definition at line 170 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_1_TOUT116_P02_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT116_P02_9_OUT

IfxGtm_ATOM0_1_TOUT116_P02_9_OUT.

Definition at line 171 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_1_TOUT11_P00_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT11_P00_2_OUT

IfxGtm_ATOM0_1_TOUT11_P00_2_OUT.

Definition at line 172 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_1_TOUT1_P02_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT1_P02_1_OUT

IfxGtm_ATOM0_1_TOUT1_P02_1_OUT.

Definition at line 173 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_1_TOUT31_P33_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT31_P33_9_OUT

IfxGtm_ATOM0_1_TOUT31_P33_9_OUT.

Definition at line 174 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_1_TOUT47_P22_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT47_P22_0_OUT

IfxGtm_ATOM0_1_TOUT47_P22_0_OUT.

Definition at line 175 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_1_TOUT54_P21_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT54_P21_3_OUT

IfxGtm_ATOM0_1_TOUT54_P21_3_OUT.

Definition at line 176 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_1_TOUT84_P14_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT84_P14_4_OUT

IfxGtm_ATOM0_1_TOUT84_P14_4_OUT.

Definition at line 177 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_1N_TOUT113_P01_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT113_P01_5_OUT

IfxGtm_ATOM0_1N_TOUT113_P01_5_OUT.

Definition at line 160 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_1N_TOUT14_P00_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT14_P00_5_OUT

IfxGtm_ATOM0_1N_TOUT14_P00_5_OUT.

Definition at line 161 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_1N_TOUT39_P32_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT39_P32_3_OUT

IfxGtm_ATOM0_1N_TOUT39_P32_3_OUT.

Definition at line 162 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_1N_TOUT41_P23_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT41_P23_0_OUT

IfxGtm_ATOM0_1N_TOUT41_P23_0_OUT.

Definition at line 163 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_1N_TOUT4_P02_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT4_P02_4_OUT

IfxGtm_ATOM0_1N_TOUT4_P02_4_OUT.

Definition at line 164 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_1N_TOUT50_P22_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT50_P22_3_OUT

IfxGtm_ATOM0_1N_TOUT50_P22_3_OUT.

Definition at line 165 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_1N_TOUT53_P21_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT53_P21_2_OUT

IfxGtm_ATOM0_1N_TOUT53_P21_2_OUT.

Definition at line 166 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_1N_TOUT55_P21_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT55_P21_4_OUT

IfxGtm_ATOM0_1N_TOUT55_P21_4_OUT.

Definition at line 167 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_1N_TOUT57_P21_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT57_P21_6_OUT

IfxGtm_ATOM0_1N_TOUT57_P21_6_OUT.

Definition at line 168 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_1N_TOUT61_P20_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT61_P20_3_OUT

IfxGtm_ATOM0_1N_TOUT61_P20_3_OUT.

Definition at line 169 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_2_TOUT117_P02_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT117_P02_10_OUT

IfxGtm_ATOM0_2_TOUT117_P02_10_OUT.

Definition at line 188 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_2_TOUT12_P00_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT12_P00_3_OUT

IfxGtm_ATOM0_2_TOUT12_P00_3_OUT.

Definition at line 189 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_2_TOUT2_P02_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT2_P02_2_OUT

IfxGtm_ATOM0_2_TOUT2_P02_2_OUT.

Definition at line 190 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_2_TOUT33_P33_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT33_P33_11_OUT

IfxGtm_ATOM0_2_TOUT33_P33_11_OUT.

Definition at line 191 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_2_TOUT42_P23_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT42_P23_1_OUT

IfxGtm_ATOM0_2_TOUT42_P23_1_OUT.

Definition at line 192 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_2_TOUT46_P23_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT46_P23_5_OUT

IfxGtm_ATOM0_2_TOUT46_P23_5_OUT.

Definition at line 193 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_2_TOUT55_P21_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT55_P21_4_OUT

IfxGtm_ATOM0_2_TOUT55_P21_4_OUT.

Definition at line 194 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_2_TOUT83_P14_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT83_P14_3_OUT

IfxGtm_ATOM0_2_TOUT83_P14_3_OUT.

Definition at line 195 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_2N_TOUT114_P01_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT114_P01_6_OUT

IfxGtm_ATOM0_2N_TOUT114_P01_6_OUT.

Definition at line 178 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_2N_TOUT15_P00_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT15_P00_6_OUT

IfxGtm_ATOM0_2N_TOUT15_P00_6_OUT.

Definition at line 179 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_2N_TOUT23_P33_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT23_P33_1_OUT

IfxGtm_ATOM0_2N_TOUT23_P33_1_OUT.

Definition at line 180 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_2N_TOUT40_P32_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT40_P32_4_OUT

IfxGtm_ATOM0_2N_TOUT40_P32_4_OUT.

Definition at line 181 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_2N_TOUT41_P23_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT41_P23_0_OUT

IfxGtm_ATOM0_2N_TOUT41_P23_0_OUT.

Definition at line 182 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_2N_TOUT44_P23_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT44_P23_3_OUT

IfxGtm_ATOM0_2N_TOUT44_P23_3_OUT.

Definition at line 183 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_2N_TOUT56_P21_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT56_P21_5_OUT

IfxGtm_ATOM0_2N_TOUT56_P21_5_OUT.

Definition at line 184 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_2N_TOUT58_P21_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT58_P21_7_OUT

IfxGtm_ATOM0_2N_TOUT58_P21_7_OUT.

Definition at line 185 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_2N_TOUT5_P02_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT5_P02_5_OUT

IfxGtm_ATOM0_2N_TOUT5_P02_5_OUT.

Definition at line 186 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_2N_TOUT65_P20_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT65_P20_9_OUT

IfxGtm_ATOM0_2N_TOUT65_P20_9_OUT.

Definition at line 187 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_3_TOUT118_P02_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT118_P02_11_OUT

IfxGtm_ATOM0_3_TOUT118_P02_11_OUT.

Definition at line 204 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_3_TOUT13_P00_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT13_P00_4_OUT

IfxGtm_ATOM0_3_TOUT13_P00_4_OUT.

Definition at line 205 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_3_TOUT38_P32_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT38_P32_2_OUT

IfxGtm_ATOM0_3_TOUT38_P32_2_OUT.

Definition at line 206 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_3_TOUT3_P02_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT3_P02_3_OUT

IfxGtm_ATOM0_3_TOUT3_P02_3_OUT.

Definition at line 207 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_3_TOUT49_P22_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT49_P22_2_OUT

IfxGtm_ATOM0_3_TOUT49_P22_2_OUT.

Definition at line 208 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_3_TOUT56_P21_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT56_P21_5_OUT

IfxGtm_ATOM0_3_TOUT56_P21_5_OUT.

Definition at line 209 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_3_TOUT60_P20_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT60_P20_1_OUT

IfxGtm_ATOM0_3_TOUT60_P20_1_OUT.

Definition at line 210 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_3_TOUT82_P14_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT82_P14_2_OUT

IfxGtm_ATOM0_3_TOUT82_P14_2_OUT.

Definition at line 211 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_3N_TOUT115_P01_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT115_P01_7_OUT

IfxGtm_ATOM0_3N_TOUT115_P01_7_OUT.

Definition at line 196 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_3N_TOUT16_P00_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT16_P00_7_OUT

IfxGtm_ATOM0_3N_TOUT16_P00_7_OUT.

Definition at line 197 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_3N_TOUT24_P33_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT24_P33_2_OUT

IfxGtm_ATOM0_3N_TOUT24_P33_2_OUT.

Definition at line 198 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_3N_TOUT42_P23_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT42_P23_1_OUT

IfxGtm_ATOM0_3N_TOUT42_P23_1_OUT.

Definition at line 199 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_3N_TOUT45_P23_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT45_P23_4_OUT

IfxGtm_ATOM0_3N_TOUT45_P23_4_OUT.

Definition at line 200 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_3N_TOUT59_P20_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT59_P20_0_OUT

IfxGtm_ATOM0_3N_TOUT59_P20_0_OUT.

Definition at line 201 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_3N_TOUT66_P20_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT66_P20_10_OUT

IfxGtm_ATOM0_3N_TOUT66_P20_10_OUT.

Definition at line 202 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_3N_TOUT6_P02_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT6_P02_6_OUT

IfxGtm_ATOM0_3N_TOUT6_P02_6_OUT.

Definition at line 203 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_4_TOUT146_P34_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT146_P34_1_OUT

IfxGtm_ATOM0_4_TOUT146_P34_1_OUT.

Definition at line 217 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_4_TOUT14_P00_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT14_P00_5_OUT

IfxGtm_ATOM0_4_TOUT14_P00_5_OUT.

Definition at line 218 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_4_TOUT29_P33_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT29_P33_7_OUT

IfxGtm_ATOM0_4_TOUT29_P33_7_OUT.

Definition at line 219 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_4_TOUT39_P32_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT39_P32_3_OUT

IfxGtm_ATOM0_4_TOUT39_P32_3_OUT.

Definition at line 220 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_4_TOUT4_P02_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT4_P02_4_OUT

IfxGtm_ATOM0_4_TOUT4_P02_4_OUT.

Definition at line 221 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_4_TOUT50_P22_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT50_P22_3_OUT

IfxGtm_ATOM0_4_TOUT50_P22_3_OUT.

Definition at line 222 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_4_TOUT57_P21_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT57_P21_6_OUT

IfxGtm_ATOM0_4_TOUT57_P21_6_OUT.

Definition at line 223 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_4_TOUT61_P20_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT61_P20_3_OUT

IfxGtm_ATOM0_4_TOUT61_P20_3_OUT.

Definition at line 224 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_4_TOUT81_P14_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT81_P14_1_OUT

IfxGtm_ATOM0_4_TOUT81_P14_1_OUT.

Definition at line 225 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_4N_TOUT118_P02_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4N_TOUT118_P02_11_OUT

IfxGtm_ATOM0_4N_TOUT118_P02_11_OUT.

Definition at line 212 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_4N_TOUT135_P22_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4N_TOUT135_P22_9_OUT

IfxGtm_ATOM0_4N_TOUT135_P22_9_OUT.

Definition at line 213 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_4N_TOUT13_P00_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4N_TOUT13_P00_4_OUT

IfxGtm_ATOM0_4N_TOUT13_P00_4_OUT.

Definition at line 214 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_4N_TOUT147_P34_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4N_TOUT147_P34_2_OUT

IfxGtm_ATOM0_4N_TOUT147_P34_2_OUT.

Definition at line 215 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_4N_TOUT3_P02_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4N_TOUT3_P02_3_OUT

IfxGtm_ATOM0_4N_TOUT3_P02_3_OUT.

Definition at line 216 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_5_TOUT15_P00_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT15_P00_6_OUT

IfxGtm_ATOM0_5_TOUT15_P00_6_OUT.

Definition at line 232 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_5_TOUT23_P33_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT23_P33_1_OUT

IfxGtm_ATOM0_5_TOUT23_P33_1_OUT.

Definition at line 233 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_5_TOUT40_P32_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT40_P32_4_OUT

IfxGtm_ATOM0_5_TOUT40_P32_4_OUT.

Definition at line 234 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_5_TOUT41_P23_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT41_P23_0_OUT

IfxGtm_ATOM0_5_TOUT41_P23_0_OUT.

Definition at line 235 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_5_TOUT58_P21_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT58_P21_7_OUT

IfxGtm_ATOM0_5_TOUT58_P21_7_OUT.

Definition at line 236 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_5_TOUT5_P02_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT5_P02_5_OUT

IfxGtm_ATOM0_5_TOUT5_P02_5_OUT.

Definition at line 237 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_5N_TOUT0_P02_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5N_TOUT0_P02_0_OUT

IfxGtm_ATOM0_5N_TOUT0_P02_0_OUT.

Definition at line 226 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_5N_TOUT136_P22_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5N_TOUT136_P22_10_OUT

IfxGtm_ATOM0_5N_TOUT136_P22_10_OUT.

Definition at line 227 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_5N_TOUT148_P34_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5N_TOUT148_P34_3_OUT

IfxGtm_ATOM0_5N_TOUT148_P34_3_OUT.

Definition at line 228 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_5N_TOUT26_P33_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5N_TOUT26_P33_4_OUT

IfxGtm_ATOM0_5N_TOUT26_P33_4_OUT.

Definition at line 229 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_5N_TOUT8_P02_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5N_TOUT8_P02_8_OUT

IfxGtm_ATOM0_5N_TOUT8_P02_8_OUT.

Definition at line 230 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_5N_TOUT9_P00_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5N_TOUT9_P00_0_OUT

IfxGtm_ATOM0_5N_TOUT9_P00_0_OUT.

Definition at line 231 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_6_TOUT106_P10_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT106_P10_4_OUT

IfxGtm_ATOM0_6_TOUT106_P10_4_OUT.

Definition at line 245 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_6_TOUT16_P00_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT16_P00_7_OUT

IfxGtm_ATOM0_6_TOUT16_P00_7_OUT.

Definition at line 246 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_6_TOUT24_P33_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT24_P33_2_OUT

IfxGtm_ATOM0_6_TOUT24_P33_2_OUT.

Definition at line 247 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_6_TOUT42_P23_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT42_P23_1_OUT

IfxGtm_ATOM0_6_TOUT42_P23_1_OUT.

Definition at line 248 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_6_TOUT59_P20_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT59_P20_0_OUT

IfxGtm_ATOM0_6_TOUT59_P20_0_OUT.

Definition at line 249 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_6_TOUT6_P02_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT6_P02_6_OUT

IfxGtm_ATOM0_6_TOUT6_P02_6_OUT.

Definition at line 250 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_6N_TOUT10_P00_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6N_TOUT10_P00_1_OUT

IfxGtm_ATOM0_6N_TOUT10_P00_1_OUT.

Definition at line 238 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_6N_TOUT116_P02_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6N_TOUT116_P02_9_OUT

IfxGtm_ATOM0_6N_TOUT116_P02_9_OUT.

Definition at line 239 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_6N_TOUT11_P00_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6N_TOUT11_P00_2_OUT

IfxGtm_ATOM0_6N_TOUT11_P00_2_OUT.

Definition at line 240 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_6N_TOUT137_P22_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6N_TOUT137_P22_11_OUT

IfxGtm_ATOM0_6N_TOUT137_P22_11_OUT.

Definition at line 241 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_6N_TOUT149_P34_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6N_TOUT149_P34_4_OUT

IfxGtm_ATOM0_6N_TOUT149_P34_4_OUT.

Definition at line 242 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_6N_TOUT1_P02_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6N_TOUT1_P02_1_OUT

IfxGtm_ATOM0_6N_TOUT1_P02_1_OUT.

Definition at line 243 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_6N_TOUT27_P33_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6N_TOUT27_P33_5_OUT

IfxGtm_ATOM0_6N_TOUT27_P33_5_OUT.

Definition at line 244 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_7_TOUT17_P00_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT17_P00_8_OUT

IfxGtm_ATOM0_7_TOUT17_P00_8_OUT.

Definition at line 256 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_7_TOUT25_P33_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT25_P33_3_OUT

IfxGtm_ATOM0_7_TOUT25_P33_3_OUT.

Definition at line 257 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_7_TOUT45_P23_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT45_P23_4_OUT

IfxGtm_ATOM0_7_TOUT45_P23_4_OUT.

Definition at line 258 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_7_TOUT64_P20_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT64_P20_8_OUT

IfxGtm_ATOM0_7_TOUT64_P20_8_OUT.

Definition at line 259 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_7_TOUT7_P02_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT7_P02_7_OUT

IfxGtm_ATOM0_7_TOUT7_P02_7_OUT.

Definition at line 260 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_7N_TOUT117_P02_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7N_TOUT117_P02_10_OUT

IfxGtm_ATOM0_7N_TOUT117_P02_10_OUT.

Definition at line 251 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_7N_TOUT12_P00_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7N_TOUT12_P00_3_OUT

IfxGtm_ATOM0_7N_TOUT12_P00_3_OUT.

Definition at line 252 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_7N_TOUT150_P34_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7N_TOUT150_P34_5_OUT

IfxGtm_ATOM0_7N_TOUT150_P34_5_OUT.

Definition at line 253 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_7N_TOUT28_P33_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7N_TOUT28_P33_6_OUT

IfxGtm_ATOM0_7N_TOUT28_P33_6_OUT.

Definition at line 254 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_7N_TOUT2_P02_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7N_TOUT2_P02_2_OUT

IfxGtm_ATOM0_7N_TOUT2_P02_2_OUT.

Definition at line 255 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_0_TOUT0_P02_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT0_P02_0_OUT

IfxGtm_ATOM1_0_TOUT0_P02_0_OUT.

Definition at line 264 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_0_TOUT109_P10_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT109_P10_7_OUT

IfxGtm_ATOM1_0_TOUT109_P10_7_OUT.

Definition at line 265 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_0_TOUT68_P20_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT68_P20_12_OUT

IfxGtm_ATOM1_0_TOUT68_P20_12_OUT.

Definition at line 266 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_0_TOUT76_P15_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT76_P15_5_OUT

IfxGtm_ATOM1_0_TOUT76_P15_5_OUT.

Definition at line 267 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_0_TOUT77_P15_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT77_P15_6_OUT

IfxGtm_ATOM1_0_TOUT77_P15_6_OUT.

Definition at line 268 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_0_TOUT87_P14_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT87_P14_7_OUT

IfxGtm_ATOM1_0_TOUT87_P14_7_OUT.

Definition at line 269 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_0_TOUT8_P02_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT8_P02_8_OUT

IfxGtm_ATOM1_0_TOUT8_P02_8_OUT.

Definition at line 270 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_0_TOUT9_P00_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT9_P00_0_OUT

IfxGtm_ATOM1_0_TOUT9_P00_0_OUT.

Definition at line 271 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_0N_TOUT112_P01_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0N_TOUT112_P01_4_OUT

IfxGtm_ATOM1_0N_TOUT112_P01_4_OUT.

Definition at line 261 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_0N_TOUT17_P00_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0N_TOUT17_P00_8_OUT

IfxGtm_ATOM1_0N_TOUT17_P00_8_OUT.

Definition at line 262 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_0N_TOUT7_P02_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0N_TOUT7_P02_7_OUT

IfxGtm_ATOM1_0N_TOUT7_P02_7_OUT.

Definition at line 263 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_1_TOUT103_P10_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT103_P10_1_OUT

IfxGtm_ATOM1_1_TOUT103_P10_1_OUT.

Definition at line 279 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_1_TOUT10_P00_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT10_P00_1_OUT

IfxGtm_ATOM1_1_TOUT10_P00_1_OUT.

Definition at line 280 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_1_TOUT116_P02_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT116_P02_9_OUT

IfxGtm_ATOM1_1_TOUT116_P02_9_OUT.

Definition at line 281 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_1_TOUT11_P00_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT11_P00_2_OUT

IfxGtm_ATOM1_1_TOUT11_P00_2_OUT.

Definition at line 282 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_1_TOUT1_P02_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT1_P02_1_OUT

IfxGtm_ATOM1_1_TOUT1_P02_1_OUT.

Definition at line 283 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_1_TOUT31_P33_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT31_P33_9_OUT

IfxGtm_ATOM1_1_TOUT31_P33_9_OUT.

Definition at line 284 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_1_TOUT69_P20_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT69_P20_13_OUT

IfxGtm_ATOM1_1_TOUT69_P20_13_OUT.

Definition at line 285 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_1_TOUT78_P15_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT78_P15_7_OUT

IfxGtm_ATOM1_1_TOUT78_P15_7_OUT.

Definition at line 286 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_1_TOUT79_P15_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT79_P15_8_OUT

IfxGtm_ATOM1_1_TOUT79_P15_8_OUT.

Definition at line 287 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_1_TOUT86_P14_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT86_P14_6_OUT

IfxGtm_ATOM1_1_TOUT86_P14_6_OUT.

Definition at line 288 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_1N_TOUT102_P10_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1N_TOUT102_P10_0_OUT

IfxGtm_ATOM1_1N_TOUT102_P10_0_OUT.

Definition at line 272 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_1N_TOUT113_P01_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1N_TOUT113_P01_5_OUT

IfxGtm_ATOM1_1N_TOUT113_P01_5_OUT.

Definition at line 273 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_1N_TOUT14_P00_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1N_TOUT14_P00_5_OUT

IfxGtm_ATOM1_1N_TOUT14_P00_5_OUT.

Definition at line 274 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_1N_TOUT39_P32_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1N_TOUT39_P32_3_OUT

IfxGtm_ATOM1_1N_TOUT39_P32_3_OUT.

Definition at line 275 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_1N_TOUT4_P02_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1N_TOUT4_P02_4_OUT

IfxGtm_ATOM1_1N_TOUT4_P02_4_OUT.

Definition at line 276 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_1N_TOUT61_P20_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1N_TOUT61_P20_3_OUT

IfxGtm_ATOM1_1N_TOUT61_P20_3_OUT.

Definition at line 277 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_1N_TOUT72_P15_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1N_TOUT72_P15_1_OUT

IfxGtm_ATOM1_1N_TOUT72_P15_1_OUT.

Definition at line 278 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_2_TOUT104_P10_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT104_P10_2_OUT

IfxGtm_ATOM1_2_TOUT104_P10_2_OUT.

Definition at line 297 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_2_TOUT107_P10_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT107_P10_5_OUT

IfxGtm_ATOM1_2_TOUT107_P10_5_OUT.

Definition at line 298 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_2_TOUT117_P02_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT117_P02_10_OUT

IfxGtm_ATOM1_2_TOUT117_P02_10_OUT.

Definition at line 299 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_2_TOUT12_P00_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT12_P00_3_OUT

IfxGtm_ATOM1_2_TOUT12_P00_3_OUT.

Definition at line 300 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_2_TOUT2_P02_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT2_P02_2_OUT

IfxGtm_ATOM1_2_TOUT2_P02_2_OUT.

Definition at line 301 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_2_TOUT33_P33_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT33_P33_11_OUT

IfxGtm_ATOM1_2_TOUT33_P33_11_OUT.

Definition at line 302 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_2_TOUT70_P20_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT70_P20_14_OUT

IfxGtm_ATOM1_2_TOUT70_P20_14_OUT.

Definition at line 303 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_2_TOUT80_P14_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT80_P14_0_OUT

IfxGtm_ATOM1_2_TOUT80_P14_0_OUT.

Definition at line 304 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_2N_TOUT110_P10_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT110_P10_8_OUT

IfxGtm_ATOM1_2N_TOUT110_P10_8_OUT.

Definition at line 289 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_2N_TOUT114_P01_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT114_P01_6_OUT

IfxGtm_ATOM1_2N_TOUT114_P01_6_OUT.

Definition at line 290 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_2N_TOUT15_P00_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT15_P00_6_OUT

IfxGtm_ATOM1_2N_TOUT15_P00_6_OUT.

Definition at line 291 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_2N_TOUT23_P33_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT23_P33_1_OUT

IfxGtm_ATOM1_2N_TOUT23_P33_1_OUT.

Definition at line 292 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_2N_TOUT40_P32_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT40_P32_4_OUT

IfxGtm_ATOM1_2N_TOUT40_P32_4_OUT.

Definition at line 293 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_2N_TOUT41_P23_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT41_P23_0_OUT

IfxGtm_ATOM1_2N_TOUT41_P23_0_OUT.

Definition at line 294 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_2N_TOUT5_P02_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT5_P02_5_OUT

IfxGtm_ATOM1_2N_TOUT5_P02_5_OUT.

Definition at line 295 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_2N_TOUT73_P15_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT73_P15_2_OUT

IfxGtm_ATOM1_2N_TOUT73_P15_2_OUT.

Definition at line 296 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_3_TOUT105_P10_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT105_P10_3_OUT

IfxGtm_ATOM1_3_TOUT105_P10_3_OUT.

Definition at line 312 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_3_TOUT108_P10_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT108_P10_6_OUT

IfxGtm_ATOM1_3_TOUT108_P10_6_OUT.

Definition at line 313 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_3_TOUT118_P02_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT118_P02_11_OUT

IfxGtm_ATOM1_3_TOUT118_P02_11_OUT.

Definition at line 314 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_3_TOUT13_P00_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT13_P00_4_OUT

IfxGtm_ATOM1_3_TOUT13_P00_4_OUT.

Definition at line 315 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_3_TOUT38_P32_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT38_P32_2_OUT

IfxGtm_ATOM1_3_TOUT38_P32_2_OUT.

Definition at line 316 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_3_TOUT3_P02_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT3_P02_3_OUT

IfxGtm_ATOM1_3_TOUT3_P02_3_OUT.

Definition at line 317 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_3_TOUT60_P20_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT60_P20_1_OUT

IfxGtm_ATOM1_3_TOUT60_P20_1_OUT.

Definition at line 318 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_3_TOUT71_P15_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT71_P15_0_OUT

IfxGtm_ATOM1_3_TOUT71_P15_0_OUT.

Definition at line 319 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_3N_TOUT106_P10_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3N_TOUT106_P10_4_OUT

IfxGtm_ATOM1_3N_TOUT106_P10_4_OUT.

Definition at line 305 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_3N_TOUT115_P01_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3N_TOUT115_P01_7_OUT

IfxGtm_ATOM1_3N_TOUT115_P01_7_OUT.

Definition at line 306 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_3N_TOUT16_P00_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3N_TOUT16_P00_7_OUT

IfxGtm_ATOM1_3N_TOUT16_P00_7_OUT.

Definition at line 307 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_3N_TOUT24_P33_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3N_TOUT24_P33_2_OUT

IfxGtm_ATOM1_3N_TOUT24_P33_2_OUT.

Definition at line 308 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_3N_TOUT42_P23_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3N_TOUT42_P23_1_OUT

IfxGtm_ATOM1_3N_TOUT42_P23_1_OUT.

Definition at line 309 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_3N_TOUT6_P02_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3N_TOUT6_P02_6_OUT

IfxGtm_ATOM1_3N_TOUT6_P02_6_OUT.

Definition at line 310 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_3N_TOUT74_P15_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3N_TOUT74_P15_3_OUT

IfxGtm_ATOM1_3N_TOUT74_P15_3_OUT.

Definition at line 311 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_4_TOUT102_P10_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT102_P10_0_OUT

IfxGtm_ATOM1_4_TOUT102_P10_0_OUT.

Definition at line 329 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_4_TOUT130_P22_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT130_P22_4_OUT

IfxGtm_ATOM1_4_TOUT130_P22_4_OUT.

Definition at line 330 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_4_TOUT146_P34_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT146_P34_1_OUT

IfxGtm_ATOM1_4_TOUT146_P34_1_OUT.

Definition at line 331 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_4_TOUT14_P00_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT14_P00_5_OUT

IfxGtm_ATOM1_4_TOUT14_P00_5_OUT.

Definition at line 332 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_4_TOUT29_P33_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT29_P33_7_OUT

IfxGtm_ATOM1_4_TOUT29_P33_7_OUT.

Definition at line 333 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_4_TOUT39_P32_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT39_P32_3_OUT

IfxGtm_ATOM1_4_TOUT39_P32_3_OUT.

Definition at line 334 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_4_TOUT4_P02_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT4_P02_4_OUT

IfxGtm_ATOM1_4_TOUT4_P02_4_OUT.

Definition at line 335 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_4_TOUT61_P20_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT61_P20_3_OUT

IfxGtm_ATOM1_4_TOUT61_P20_3_OUT.

Definition at line 336 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_4_TOUT72_P15_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT72_P15_1_OUT

IfxGtm_ATOM1_4_TOUT72_P15_1_OUT.

Definition at line 337 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_4N_TOUT105_P10_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT105_P10_3_OUT

IfxGtm_ATOM1_4N_TOUT105_P10_3_OUT.

Definition at line 320 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_4N_TOUT108_P10_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT108_P10_6_OUT

IfxGtm_ATOM1_4N_TOUT108_P10_6_OUT.

Definition at line 321 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_4N_TOUT118_P02_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT118_P02_11_OUT

IfxGtm_ATOM1_4N_TOUT118_P02_11_OUT.

Definition at line 322 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_4N_TOUT131_P22_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT131_P22_5_OUT

IfxGtm_ATOM1_4N_TOUT131_P22_5_OUT.

Definition at line 323 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_4N_TOUT13_P00_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT13_P00_4_OUT

IfxGtm_ATOM1_4N_TOUT13_P00_4_OUT.

Definition at line 324 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_4N_TOUT147_P34_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT147_P34_2_OUT

IfxGtm_ATOM1_4N_TOUT147_P34_2_OUT.

Definition at line 325 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_4N_TOUT3_P02_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT3_P02_3_OUT

IfxGtm_ATOM1_4N_TOUT3_P02_3_OUT.

Definition at line 326 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_4N_TOUT71_P15_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT71_P15_0_OUT

IfxGtm_ATOM1_4N_TOUT71_P15_0_OUT.

Definition at line 327 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_4N_TOUT75_P15_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT75_P15_4_OUT

IfxGtm_ATOM1_4N_TOUT75_P15_4_OUT.

Definition at line 328 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_5_TOUT110_P10_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT110_P10_8_OUT

IfxGtm_ATOM1_5_TOUT110_P10_8_OUT.

Definition at line 347 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_5_TOUT15_P00_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT15_P00_6_OUT

IfxGtm_ATOM1_5_TOUT15_P00_6_OUT.

Definition at line 348 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_5_TOUT23_P33_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT23_P33_1_OUT

IfxGtm_ATOM1_5_TOUT23_P33_1_OUT.

Definition at line 349 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_5_TOUT40_P32_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT40_P32_4_OUT

IfxGtm_ATOM1_5_TOUT40_P32_4_OUT.

Definition at line 350 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_5_TOUT41_P23_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT41_P23_0_OUT

IfxGtm_ATOM1_5_TOUT41_P23_0_OUT.

Definition at line 351 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_5_TOUT5_P02_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT5_P02_5_OUT

IfxGtm_ATOM1_5_TOUT5_P02_5_OUT.

Definition at line 352 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_5_TOUT65_P20_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT65_P20_9_OUT

IfxGtm_ATOM1_5_TOUT65_P20_9_OUT.

Definition at line 353 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_5_TOUT73_P15_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT73_P15_2_OUT

IfxGtm_ATOM1_5_TOUT73_P15_2_OUT.

Definition at line 354 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_5N_TOUT0_P02_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT0_P02_0_OUT

IfxGtm_ATOM1_5N_TOUT0_P02_0_OUT.

Definition at line 338 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_5N_TOUT109_P10_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT109_P10_7_OUT

IfxGtm_ATOM1_5N_TOUT109_P10_7_OUT.

Definition at line 339 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_5N_TOUT132_P22_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT132_P22_6_OUT

IfxGtm_ATOM1_5N_TOUT132_P22_6_OUT.

Definition at line 340 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_5N_TOUT148_P34_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT148_P34_3_OUT

IfxGtm_ATOM1_5N_TOUT148_P34_3_OUT.

Definition at line 341 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_5N_TOUT26_P33_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT26_P33_4_OUT

IfxGtm_ATOM1_5N_TOUT26_P33_4_OUT.

Definition at line 342 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_5N_TOUT76_P15_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT76_P15_5_OUT

IfxGtm_ATOM1_5N_TOUT76_P15_5_OUT.

Definition at line 343 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_5N_TOUT77_P15_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT77_P15_6_OUT

IfxGtm_ATOM1_5N_TOUT77_P15_6_OUT.

Definition at line 344 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_5N_TOUT8_P02_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT8_P02_8_OUT

IfxGtm_ATOM1_5N_TOUT8_P02_8_OUT.

Definition at line 345 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_5N_TOUT9_P00_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT9_P00_0_OUT

IfxGtm_ATOM1_5N_TOUT9_P00_0_OUT.

Definition at line 346 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_6_TOUT106_P10_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT106_P10_4_OUT

IfxGtm_ATOM1_6_TOUT106_P10_4_OUT.

Definition at line 364 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_6_TOUT16_P00_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT16_P00_7_OUT

IfxGtm_ATOM1_6_TOUT16_P00_7_OUT.

Definition at line 365 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_6_TOUT24_P33_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT24_P33_2_OUT

IfxGtm_ATOM1_6_TOUT24_P33_2_OUT.

Definition at line 366 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_6_TOUT42_P23_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT42_P23_1_OUT

IfxGtm_ATOM1_6_TOUT42_P23_1_OUT.

Definition at line 367 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_6_TOUT66_P20_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT66_P20_10_OUT

IfxGtm_ATOM1_6_TOUT66_P20_10_OUT.

Definition at line 368 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_6_TOUT6_P02_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT6_P02_6_OUT

IfxGtm_ATOM1_6_TOUT6_P02_6_OUT.

Definition at line 369 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_6_TOUT74_P15_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT74_P15_3_OUT

IfxGtm_ATOM1_6_TOUT74_P15_3_OUT.

Definition at line 370 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_6N_TOUT103_P10_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT103_P10_1_OUT

IfxGtm_ATOM1_6N_TOUT103_P10_1_OUT.

Definition at line 355 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_6N_TOUT10_P00_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT10_P00_1_OUT

IfxGtm_ATOM1_6N_TOUT10_P00_1_OUT.

Definition at line 356 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_6N_TOUT116_P02_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT116_P02_9_OUT

IfxGtm_ATOM1_6N_TOUT116_P02_9_OUT.

Definition at line 357 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_6N_TOUT11_P00_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT11_P00_2_OUT

IfxGtm_ATOM1_6N_TOUT11_P00_2_OUT.

Definition at line 358 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_6N_TOUT133_P22_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT133_P22_7_OUT

IfxGtm_ATOM1_6N_TOUT133_P22_7_OUT.

Definition at line 359 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_6N_TOUT149_P34_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT149_P34_4_OUT

IfxGtm_ATOM1_6N_TOUT149_P34_4_OUT.

Definition at line 360 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_6N_TOUT1_P02_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT1_P02_1_OUT

IfxGtm_ATOM1_6N_TOUT1_P02_1_OUT.

Definition at line 361 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_6N_TOUT27_P33_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT27_P33_5_OUT

IfxGtm_ATOM1_6N_TOUT27_P33_5_OUT.

Definition at line 362 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_6N_TOUT78_P15_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT78_P15_7_OUT

IfxGtm_ATOM1_6N_TOUT78_P15_7_OUT.

Definition at line 363 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_7_TOUT17_P00_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT17_P00_8_OUT

IfxGtm_ATOM1_7_TOUT17_P00_8_OUT.

Definition at line 380 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_7_TOUT25_P33_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT25_P33_3_OUT

IfxGtm_ATOM1_7_TOUT25_P33_3_OUT.

Definition at line 381 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_7_TOUT45_P23_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT45_P23_4_OUT

IfxGtm_ATOM1_7_TOUT45_P23_4_OUT.

Definition at line 382 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_7_TOUT67_P20_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT67_P20_11_OUT

IfxGtm_ATOM1_7_TOUT67_P20_11_OUT.

Definition at line 383 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_7_TOUT75_P15_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT75_P15_4_OUT

IfxGtm_ATOM1_7_TOUT75_P15_4_OUT.

Definition at line 384 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_7_TOUT7_P02_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT7_P02_7_OUT

IfxGtm_ATOM1_7_TOUT7_P02_7_OUT.

Definition at line 385 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_7N_TOUT104_P10_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT104_P10_2_OUT

IfxGtm_ATOM1_7N_TOUT104_P10_2_OUT.

Definition at line 371 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_7N_TOUT107_P10_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT107_P10_5_OUT

IfxGtm_ATOM1_7N_TOUT107_P10_5_OUT.

Definition at line 372 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_7N_TOUT117_P02_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT117_P02_10_OUT

IfxGtm_ATOM1_7N_TOUT117_P02_10_OUT.

Definition at line 373 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_7N_TOUT12_P00_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT12_P00_3_OUT

IfxGtm_ATOM1_7N_TOUT12_P00_3_OUT.

Definition at line 374 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_7N_TOUT134_P22_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT134_P22_8_OUT

IfxGtm_ATOM1_7N_TOUT134_P22_8_OUT.

Definition at line 375 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_7N_TOUT150_P34_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT150_P34_5_OUT

IfxGtm_ATOM1_7N_TOUT150_P34_5_OUT.

Definition at line 376 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_7N_TOUT28_P33_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT28_P33_6_OUT

IfxGtm_ATOM1_7N_TOUT28_P33_6_OUT.

Definition at line 377 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_7N_TOUT2_P02_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT2_P02_2_OUT

IfxGtm_ATOM1_7N_TOUT2_P02_2_OUT.

Definition at line 378 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_7N_TOUT79_P15_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT79_P15_8_OUT

IfxGtm_ATOM1_7N_TOUT79_P15_8_OUT.

Definition at line 379 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_0_TOUT109_P10_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT109_P10_7_OUT

IfxGtm_ATOM2_0_TOUT109_P10_7_OUT.

Definition at line 393 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_0_TOUT18_P00_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT18_P00_9_OUT

IfxGtm_ATOM2_0_TOUT18_P00_9_OUT.

Definition at line 394 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_0_TOUT26_P33_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT26_P33_4_OUT

IfxGtm_ATOM2_0_TOUT26_P33_4_OUT.

Definition at line 395 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_0_TOUT32_P33_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT32_P33_10_OUT

IfxGtm_ATOM2_0_TOUT32_P33_10_OUT.

Definition at line 396 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_0_TOUT94_P13_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT94_P13_3_OUT

IfxGtm_ATOM2_0_TOUT94_P13_3_OUT.

Definition at line 397 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_0N_TOUT101_P11_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0N_TOUT101_P11_12_OUT

IfxGtm_ATOM2_0N_TOUT101_P11_12_OUT.

Definition at line 386 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_0N_TOUT108_P10_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0N_TOUT108_P10_6_OUT

IfxGtm_ATOM2_0N_TOUT108_P10_6_OUT.

Definition at line 387 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_0N_TOUT12_P00_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0N_TOUT12_P00_3_OUT

IfxGtm_ATOM2_0N_TOUT12_P00_3_OUT.

Definition at line 388 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_0N_TOUT144_P33_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0N_TOUT144_P33_15_OUT

IfxGtm_ATOM2_0N_TOUT144_P33_15_OUT.

Definition at line 389 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_0N_TOUT25_P33_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0N_TOUT25_P33_3_OUT

IfxGtm_ATOM2_0N_TOUT25_P33_3_OUT.

Definition at line 390 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_0N_TOUT32_P33_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0N_TOUT32_P33_10_OUT

IfxGtm_ATOM2_0N_TOUT32_P33_10_OUT.

Definition at line 391 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_0N_TOUT37_P32_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0N_TOUT37_P32_1_OUT

IfxGtm_ATOM2_0N_TOUT37_P32_1_OUT.

Definition at line 392 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_1_TOUT102_P10_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT102_P10_0_OUT

IfxGtm_ATOM2_1_TOUT102_P10_0_OUT.

Definition at line 408 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_1_TOUT19_P00_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT19_P00_10_OUT

IfxGtm_ATOM2_1_TOUT19_P00_10_OUT.

Definition at line 409 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_1_TOUT27_P33_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT27_P33_5_OUT

IfxGtm_ATOM2_1_TOUT27_P33_5_OUT.

Definition at line 410 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_1_TOUT43_P23_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT43_P23_2_OUT

IfxGtm_ATOM2_1_TOUT43_P23_2_OUT.

Definition at line 411 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_1_TOUT90_P14_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT90_P14_10_OUT

IfxGtm_ATOM2_1_TOUT90_P14_10_OUT.

Definition at line 412 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_1_TOUT95_P11_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT95_P11_2_OUT

IfxGtm_ATOM2_1_TOUT95_P11_2_OUT.

Definition at line 413 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_1N_TOUT105_P10_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT105_P10_3_OUT

IfxGtm_ATOM2_1N_TOUT105_P10_3_OUT.

Definition at line 398 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_1N_TOUT167_P00_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT167_P00_13_OUT

IfxGtm_ATOM2_1N_TOUT167_P00_13_OUT.

Definition at line 399 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_1N_TOUT22_P33_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT22_P33_0_OUT

IfxGtm_ATOM2_1N_TOUT22_P33_0_OUT.

Definition at line 400 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_1N_TOUT30_P33_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT30_P33_8_OUT

IfxGtm_ATOM2_1N_TOUT30_P33_8_OUT.

Definition at line 401 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_1N_TOUT34_P33_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT34_P33_12_OUT

IfxGtm_ATOM2_1N_TOUT34_P33_12_OUT.

Definition at line 402 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_1N_TOUT51_P21_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT51_P21_0_OUT

IfxGtm_ATOM2_1N_TOUT51_P21_0_OUT.

Definition at line 403 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_1N_TOUT90_P14_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT90_P14_10_OUT

IfxGtm_ATOM2_1N_TOUT90_P14_10_OUT.

Definition at line 404 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_1N_TOUT91_P13_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT91_P13_0_OUT

IfxGtm_ATOM2_1N_TOUT91_P13_0_OUT.

Definition at line 405 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_1N_TOUT98_P11_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT98_P11_9_OUT

IfxGtm_ATOM2_1N_TOUT98_P11_9_OUT.

Definition at line 406 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_1N_TOUT9_P00_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT9_P00_0_OUT

IfxGtm_ATOM2_1N_TOUT9_P00_0_OUT.

Definition at line 407 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_2_TOUT103_P10_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT103_P10_1_OUT

IfxGtm_ATOM2_2_TOUT103_P10_1_OUT.

Definition at line 426 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_2_TOUT20_P00_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT20_P00_11_OUT

IfxGtm_ATOM2_2_TOUT20_P00_11_OUT.

Definition at line 427 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_2_TOUT28_P33_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT28_P33_6_OUT

IfxGtm_ATOM2_2_TOUT28_P33_6_OUT.

Definition at line 428 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_2_TOUT44_P23_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT44_P23_3_OUT

IfxGtm_ATOM2_2_TOUT44_P23_3_OUT.

Definition at line 429 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_2_TOUT88_P14_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT88_P14_8_OUT

IfxGtm_ATOM2_2_TOUT88_P14_8_OUT.

Definition at line 430 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_2_TOUT96_P11_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT96_P11_3_OUT

IfxGtm_ATOM2_2_TOUT96_P11_3_OUT.

Definition at line 431 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_2N_TOUT106_P10_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT106_P10_4_OUT

IfxGtm_ATOM2_2N_TOUT106_P10_4_OUT.

Definition at line 414 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_2N_TOUT10_P00_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT10_P00_1_OUT

IfxGtm_ATOM2_2N_TOUT10_P00_1_OUT.

Definition at line 415 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_2N_TOUT114_P01_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT114_P01_6_OUT

IfxGtm_ATOM2_2N_TOUT114_P01_6_OUT.

Definition at line 416 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_2N_TOUT138_P23_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT138_P23_6_OUT

IfxGtm_ATOM2_2N_TOUT138_P23_6_OUT.

Definition at line 417 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_2N_TOUT166_P00_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT166_P00_14_OUT

IfxGtm_ATOM2_2N_TOUT166_P00_14_OUT.

Definition at line 418 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_2N_TOUT23_P33_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT23_P33_1_OUT

IfxGtm_ATOM2_2N_TOUT23_P33_1_OUT.

Definition at line 419 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_2N_TOUT31_P33_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT31_P33_9_OUT

IfxGtm_ATOM2_2N_TOUT31_P33_9_OUT.

Definition at line 420 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_2N_TOUT35_P33_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT35_P33_13_OUT

IfxGtm_ATOM2_2N_TOUT35_P33_13_OUT.

Definition at line 421 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_2N_TOUT52_P21_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT52_P21_1_OUT

IfxGtm_ATOM2_2N_TOUT52_P21_1_OUT.

Definition at line 422 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_2N_TOUT91_P13_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT91_P13_0_OUT

IfxGtm_ATOM2_2N_TOUT91_P13_0_OUT.

Definition at line 423 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_2N_TOUT92_P13_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT92_P13_1_OUT

IfxGtm_ATOM2_2N_TOUT92_P13_1_OUT.

Definition at line 424 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_2N_TOUT99_P11_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT99_P11_10_OUT

IfxGtm_ATOM2_2N_TOUT99_P11_10_OUT.

Definition at line 425 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_3_TOUT104_P10_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT104_P10_2_OUT

IfxGtm_ATOM2_3_TOUT104_P10_2_OUT.

Definition at line 445 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_3_TOUT21_P00_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT21_P00_12_OUT

IfxGtm_ATOM2_3_TOUT21_P00_12_OUT.

Definition at line 446 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_3_TOUT29_P33_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT29_P33_7_OUT

IfxGtm_ATOM2_3_TOUT29_P33_7_OUT.

Definition at line 447 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_3_TOUT89_P14_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT89_P14_9_OUT

IfxGtm_ATOM2_3_TOUT89_P14_9_OUT.

Definition at line 448 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_3_TOUT97_P11_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT97_P11_6_OUT

IfxGtm_ATOM2_3_TOUT97_P11_6_OUT.

Definition at line 449 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_3N_TOUT100_P11_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT100_P11_11_OUT

IfxGtm_ATOM2_3N_TOUT100_P11_11_OUT.

Definition at line 432 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_3N_TOUT107_P10_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT107_P10_5_OUT

IfxGtm_ATOM2_3N_TOUT107_P10_5_OUT.

Definition at line 433 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_3N_TOUT115_P01_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT115_P01_7_OUT

IfxGtm_ATOM2_3N_TOUT115_P01_7_OUT.

Definition at line 434 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_3N_TOUT11_P00_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT11_P00_2_OUT

IfxGtm_ATOM2_3N_TOUT11_P00_2_OUT.

Definition at line 435 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_3N_TOUT139_P23_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT139_P23_7_OUT

IfxGtm_ATOM2_3N_TOUT139_P23_7_OUT.

Definition at line 436 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_3N_TOUT143_P33_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT143_P33_14_OUT

IfxGtm_ATOM2_3N_TOUT143_P33_14_OUT.

Definition at line 437 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_3N_TOUT168_P00_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT168_P00_15_OUT

IfxGtm_ATOM2_3N_TOUT168_P00_15_OUT.

Definition at line 438 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_3N_TOUT24_P33_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT24_P33_2_OUT

IfxGtm_ATOM2_3N_TOUT24_P33_2_OUT.

Definition at line 439 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_3N_TOUT33_P33_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT33_P33_11_OUT

IfxGtm_ATOM2_3N_TOUT33_P33_11_OUT.

Definition at line 440 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_3N_TOUT36_P32_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT36_P32_0_OUT

IfxGtm_ATOM2_3N_TOUT36_P32_0_OUT.

Definition at line 441 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_3N_TOUT62_P20_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT62_P20_6_OUT

IfxGtm_ATOM2_3N_TOUT62_P20_6_OUT.

Definition at line 442 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_3N_TOUT92_P13_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT92_P13_1_OUT

IfxGtm_ATOM2_3N_TOUT92_P13_1_OUT.

Definition at line 443 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_3N_TOUT93_P13_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT93_P13_2_OUT

IfxGtm_ATOM2_3N_TOUT93_P13_2_OUT.

Definition at line 444 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_4_TOUT167_P00_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT167_P00_13_OUT

IfxGtm_ATOM2_4_TOUT167_P00_13_OUT.

Definition at line 454 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_4_TOUT22_P33_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT22_P33_0_OUT

IfxGtm_ATOM2_4_TOUT22_P33_0_OUT.

Definition at line 455 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_4_TOUT30_P33_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT30_P33_8_OUT

IfxGtm_ATOM2_4_TOUT30_P33_8_OUT.

Definition at line 456 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_4_TOUT34_P33_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT34_P33_12_OUT

IfxGtm_ATOM2_4_TOUT34_P33_12_OUT.

Definition at line 457 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_4_TOUT51_P21_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT51_P21_0_OUT

IfxGtm_ATOM2_4_TOUT51_P21_0_OUT.

Definition at line 458 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_4_TOUT90_P14_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT90_P14_10_OUT

IfxGtm_ATOM2_4_TOUT90_P14_10_OUT.

Definition at line 459 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_4_TOUT98_P11_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT98_P11_9_OUT

IfxGtm_ATOM2_4_TOUT98_P11_9_OUT.

Definition at line 460 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_4N_TOUT29_P33_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4N_TOUT29_P33_7_OUT

IfxGtm_ATOM2_4N_TOUT29_P33_7_OUT.

Definition at line 450 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_4N_TOUT57_P21_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4N_TOUT57_P21_6_OUT

IfxGtm_ATOM2_4N_TOUT57_P21_6_OUT.

Definition at line 451 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_4N_TOUT86_P14_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4N_TOUT86_P14_6_OUT

IfxGtm_ATOM2_4N_TOUT86_P14_6_OUT.

Definition at line 452 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_4N_TOUT97_P11_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4N_TOUT97_P11_6_OUT

IfxGtm_ATOM2_4N_TOUT97_P11_6_OUT.

Definition at line 453 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_5_TOUT138_P23_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT138_P23_6_OUT

IfxGtm_ATOM2_5_TOUT138_P23_6_OUT.

Definition at line 466 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_5_TOUT166_P00_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT166_P00_14_OUT

IfxGtm_ATOM2_5_TOUT166_P00_14_OUT.

Definition at line 467 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_5_TOUT35_P33_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT35_P33_13_OUT

IfxGtm_ATOM2_5_TOUT35_P33_13_OUT.

Definition at line 468 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_5_TOUT52_P21_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT52_P21_1_OUT

IfxGtm_ATOM2_5_TOUT52_P21_1_OUT.

Definition at line 469 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_5_TOUT65_P20_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT65_P20_9_OUT

IfxGtm_ATOM2_5_TOUT65_P20_9_OUT.

Definition at line 470 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_5_TOUT91_P13_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT91_P13_0_OUT

IfxGtm_ATOM2_5_TOUT91_P13_0_OUT.

Definition at line 471 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_5_TOUT99_P11_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT99_P11_10_OUT

IfxGtm_ATOM2_5_TOUT99_P11_10_OUT.

Definition at line 472 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_5N_TOUT120_P11_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5N_TOUT120_P11_1_OUT

IfxGtm_ATOM2_5N_TOUT120_P11_1_OUT.

Definition at line 461 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_5N_TOUT26_P33_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5N_TOUT26_P33_4_OUT

IfxGtm_ATOM2_5N_TOUT26_P33_4_OUT.

Definition at line 462 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_5N_TOUT59_P20_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5N_TOUT59_P20_0_OUT

IfxGtm_ATOM2_5N_TOUT59_P20_0_OUT.

Definition at line 463 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_5N_TOUT87_P14_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5N_TOUT87_P14_7_OUT

IfxGtm_ATOM2_5N_TOUT87_P14_7_OUT.

Definition at line 464 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_5N_TOUT94_P13_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5N_TOUT94_P13_3_OUT

IfxGtm_ATOM2_5N_TOUT94_P13_3_OUT.

Definition at line 465 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_6_TOUT100_P11_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT100_P11_11_OUT

IfxGtm_ATOM2_6_TOUT100_P11_11_OUT.

Definition at line 477 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_6_TOUT139_P23_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT139_P23_7_OUT

IfxGtm_ATOM2_6_TOUT139_P23_7_OUT.

Definition at line 478 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_6_TOUT143_P33_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT143_P33_14_OUT

IfxGtm_ATOM2_6_TOUT143_P33_14_OUT.

Definition at line 479 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_6_TOUT168_P00_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT168_P00_15_OUT

IfxGtm_ATOM2_6_TOUT168_P00_15_OUT.

Definition at line 480 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_6_TOUT36_P32_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT36_P32_0_OUT

IfxGtm_ATOM2_6_TOUT36_P32_0_OUT.

Definition at line 481 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_6_TOUT62_P20_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT62_P20_6_OUT

IfxGtm_ATOM2_6_TOUT62_P20_6_OUT.

Definition at line 482 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_6_TOUT92_P13_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT92_P13_1_OUT

IfxGtm_ATOM2_6_TOUT92_P13_1_OUT.

Definition at line 483 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_6N_TOUT27_P33_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6N_TOUT27_P33_5_OUT

IfxGtm_ATOM2_6N_TOUT27_P33_5_OUT.

Definition at line 473 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_6N_TOUT60_P20_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6N_TOUT60_P20_1_OUT

IfxGtm_ATOM2_6N_TOUT60_P20_1_OUT.

Definition at line 474 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_6N_TOUT88_P14_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6N_TOUT88_P14_8_OUT

IfxGtm_ATOM2_6N_TOUT88_P14_8_OUT.

Definition at line 475 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_6N_TOUT95_P11_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6N_TOUT95_P11_2_OUT

IfxGtm_ATOM2_6N_TOUT95_P11_2_OUT.

Definition at line 476 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_7_TOUT101_P11_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT101_P11_12_OUT

IfxGtm_ATOM2_7_TOUT101_P11_12_OUT.

Definition at line 488 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_7_TOUT140_P32_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT140_P32_5_OUT

IfxGtm_ATOM2_7_TOUT140_P32_5_OUT.

Definition at line 489 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_7_TOUT144_P33_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT144_P33_15_OUT

IfxGtm_ATOM2_7_TOUT144_P33_15_OUT.

Definition at line 490 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_7_TOUT37_P32_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT37_P32_1_OUT

IfxGtm_ATOM2_7_TOUT37_P32_1_OUT.

Definition at line 491 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_7_TOUT63_P20_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT63_P20_7_OUT

IfxGtm_ATOM2_7_TOUT63_P20_7_OUT.

Definition at line 492 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_7_TOUT93_P13_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT93_P13_2_OUT

IfxGtm_ATOM2_7_TOUT93_P13_2_OUT.

Definition at line 493 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_7N_TOUT28_P33_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7N_TOUT28_P33_6_OUT

IfxGtm_ATOM2_7N_TOUT28_P33_6_OUT.

Definition at line 484 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_7N_TOUT61_P20_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7N_TOUT61_P20_3_OUT

IfxGtm_ATOM2_7N_TOUT61_P20_3_OUT.

Definition at line 485 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_7N_TOUT89_P14_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7N_TOUT89_P14_9_OUT

IfxGtm_ATOM2_7N_TOUT89_P14_9_OUT.

Definition at line 486 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_7N_TOUT96_P11_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7N_TOUT96_P11_3_OUT

IfxGtm_ATOM2_7N_TOUT96_P11_3_OUT.

Definition at line 487 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_0_TOUT18_P00_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT18_P00_9_OUT

IfxGtm_ATOM3_0_TOUT18_P00_9_OUT.

Definition at line 502 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_0_TOUT26_P33_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT26_P33_4_OUT

IfxGtm_ATOM3_0_TOUT26_P33_4_OUT.

Definition at line 503 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_0_TOUT32_P33_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT32_P33_10_OUT

IfxGtm_ATOM3_0_TOUT32_P33_10_OUT.

Definition at line 504 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_0_TOUT65_P20_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT65_P20_9_OUT

IfxGtm_ATOM3_0_TOUT65_P20_9_OUT.

Definition at line 505 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_0_TOUT94_P13_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT94_P13_3_OUT

IfxGtm_ATOM3_0_TOUT94_P13_3_OUT.

Definition at line 506 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_0N_TOUT101_P11_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT101_P11_12_OUT

IfxGtm_ATOM3_0N_TOUT101_P11_12_OUT.

Definition at line 494 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_0N_TOUT144_P33_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT144_P33_15_OUT

IfxGtm_ATOM3_0N_TOUT144_P33_15_OUT.

Definition at line 495 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_0N_TOUT17_P00_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT17_P00_8_OUT

IfxGtm_ATOM3_0N_TOUT17_P00_8_OUT.

Definition at line 496 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_0N_TOUT25_P33_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT25_P33_3_OUT

IfxGtm_ATOM3_0N_TOUT25_P33_3_OUT.

Definition at line 497 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_0N_TOUT32_P33_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT32_P33_10_OUT

IfxGtm_ATOM3_0N_TOUT32_P33_10_OUT.

Definition at line 498 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_0N_TOUT37_P32_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT37_P32_1_OUT

IfxGtm_ATOM3_0N_TOUT37_P32_1_OUT.

Definition at line 499 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_0N_TOUT63_P20_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT63_P20_7_OUT

IfxGtm_ATOM3_0N_TOUT63_P20_7_OUT.

Definition at line 500 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_0N_TOUT76_P15_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT76_P15_5_OUT

IfxGtm_ATOM3_0N_TOUT76_P15_5_OUT.

Definition at line 501 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_1_TOUT111_P01_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT111_P01_3_OUT

IfxGtm_ATOM3_1_TOUT111_P01_3_OUT.

Definition at line 517 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_1_TOUT128_P12_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT128_P12_0_OUT

IfxGtm_ATOM3_1_TOUT128_P12_0_OUT.

Definition at line 518 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_1_TOUT19_P00_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT19_P00_10_OUT

IfxGtm_ATOM3_1_TOUT19_P00_10_OUT.

Definition at line 519 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_1_TOUT27_P33_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT27_P33_5_OUT

IfxGtm_ATOM3_1_TOUT27_P33_5_OUT.

Definition at line 520 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_1_TOUT43_P23_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT43_P23_2_OUT

IfxGtm_ATOM3_1_TOUT43_P23_2_OUT.

Definition at line 521 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_1_TOUT64_P20_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT64_P20_8_OUT

IfxGtm_ATOM3_1_TOUT64_P20_8_OUT.

Definition at line 522 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_1_TOUT90_P14_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT90_P14_10_OUT

IfxGtm_ATOM3_1_TOUT90_P14_10_OUT.

Definition at line 523 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_1_TOUT95_P11_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT95_P11_2_OUT

IfxGtm_ATOM3_1_TOUT95_P11_2_OUT.

Definition at line 524 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_1N_TOUT14_P00_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT14_P00_5_OUT

IfxGtm_ATOM3_1N_TOUT14_P00_5_OUT.

Definition at line 507 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_1N_TOUT167_P00_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT167_P00_13_OUT

IfxGtm_ATOM3_1N_TOUT167_P00_13_OUT.

Definition at line 508 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_1N_TOUT22_P33_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT22_P33_0_OUT

IfxGtm_ATOM3_1N_TOUT22_P33_0_OUT.

Definition at line 509 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_1N_TOUT30_P33_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT30_P33_8_OUT

IfxGtm_ATOM3_1N_TOUT30_P33_8_OUT.

Definition at line 510 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_1N_TOUT34_P33_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT34_P33_12_OUT

IfxGtm_ATOM3_1N_TOUT34_P33_12_OUT.

Definition at line 511 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_1N_TOUT51_P21_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT51_P21_0_OUT

IfxGtm_ATOM3_1N_TOUT51_P21_0_OUT.

Definition at line 512 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_1N_TOUT79_P15_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT79_P15_8_OUT

IfxGtm_ATOM3_1N_TOUT79_P15_8_OUT.

Definition at line 513 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_1N_TOUT90_P14_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT90_P14_10_OUT

IfxGtm_ATOM3_1N_TOUT90_P14_10_OUT.

Definition at line 514 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_1N_TOUT91_P13_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT91_P13_0_OUT

IfxGtm_ATOM3_1N_TOUT91_P13_0_OUT.

Definition at line 515 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_1N_TOUT98_P11_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT98_P11_9_OUT

IfxGtm_ATOM3_1N_TOUT98_P11_9_OUT.

Definition at line 516 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_2_TOUT112_P01_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT112_P01_4_OUT

IfxGtm_ATOM3_2_TOUT112_P01_4_OUT.

Definition at line 536 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_2_TOUT20_P00_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT20_P00_11_OUT

IfxGtm_ATOM3_2_TOUT20_P00_11_OUT.

Definition at line 537 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_2_TOUT28_P33_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT28_P33_6_OUT

IfxGtm_ATOM3_2_TOUT28_P33_6_OUT.

Definition at line 538 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_2_TOUT44_P23_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT44_P23_3_OUT

IfxGtm_ATOM3_2_TOUT44_P23_3_OUT.

Definition at line 539 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_2_TOUT63_P20_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT63_P20_7_OUT

IfxGtm_ATOM3_2_TOUT63_P20_7_OUT.

Definition at line 540 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_2_TOUT88_P14_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT88_P14_8_OUT

IfxGtm_ATOM3_2_TOUT88_P14_8_OUT.

Definition at line 541 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_2_TOUT96_P11_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT96_P11_3_OUT

IfxGtm_ATOM3_2_TOUT96_P11_3_OUT.

Definition at line 542 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_2N_TOUT114_P01_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT114_P01_6_OUT

IfxGtm_ATOM3_2N_TOUT114_P01_6_OUT.

Definition at line 525 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_2N_TOUT15_P00_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT15_P00_6_OUT

IfxGtm_ATOM3_2N_TOUT15_P00_6_OUT.

Definition at line 526 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_2N_TOUT166_P00_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT166_P00_14_OUT

IfxGtm_ATOM3_2N_TOUT166_P00_14_OUT.

Definition at line 527 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_2N_TOUT23_P33_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT23_P33_1_OUT

IfxGtm_ATOM3_2N_TOUT23_P33_1_OUT.

Definition at line 528 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_2N_TOUT31_P33_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT31_P33_9_OUT

IfxGtm_ATOM3_2N_TOUT31_P33_9_OUT.

Definition at line 529 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_2N_TOUT35_P33_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT35_P33_13_OUT

IfxGtm_ATOM3_2N_TOUT35_P33_13_OUT.

Definition at line 530 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_2N_TOUT52_P21_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT52_P21_1_OUT

IfxGtm_ATOM3_2N_TOUT52_P21_1_OUT.

Definition at line 531 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_2N_TOUT78_P15_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT78_P15_7_OUT

IfxGtm_ATOM3_2N_TOUT78_P15_7_OUT.

Definition at line 532 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_2N_TOUT91_P13_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT91_P13_0_OUT

IfxGtm_ATOM3_2N_TOUT91_P13_0_OUT.

Definition at line 533 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_2N_TOUT92_P13_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT92_P13_1_OUT

IfxGtm_ATOM3_2N_TOUT92_P13_1_OUT.

Definition at line 534 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_2N_TOUT99_P11_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT99_P11_10_OUT

IfxGtm_ATOM3_2N_TOUT99_P11_10_OUT.

Definition at line 535 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_3_TOUT113_P01_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT113_P01_5_OUT

IfxGtm_ATOM3_3_TOUT113_P01_5_OUT.

Definition at line 555 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_3_TOUT21_P00_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT21_P00_12_OUT

IfxGtm_ATOM3_3_TOUT21_P00_12_OUT.

Definition at line 556 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_3_TOUT29_P33_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT29_P33_7_OUT

IfxGtm_ATOM3_3_TOUT29_P33_7_OUT.

Definition at line 557 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_3_TOUT62_P20_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT62_P20_6_OUT

IfxGtm_ATOM3_3_TOUT62_P20_6_OUT.

Definition at line 558 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_3_TOUT89_P14_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT89_P14_9_OUT

IfxGtm_ATOM3_3_TOUT89_P14_9_OUT.

Definition at line 559 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_3_TOUT97_P11_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT97_P11_6_OUT

IfxGtm_ATOM3_3_TOUT97_P11_6_OUT.

Definition at line 560 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_3N_TOUT100_P11_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT100_P11_11_OUT

IfxGtm_ATOM3_3N_TOUT100_P11_11_OUT.

Definition at line 543 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_3N_TOUT115_P01_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT115_P01_7_OUT

IfxGtm_ATOM3_3N_TOUT115_P01_7_OUT.

Definition at line 544 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_3N_TOUT143_P33_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT143_P33_14_OUT

IfxGtm_ATOM3_3N_TOUT143_P33_14_OUT.

Definition at line 545 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_3N_TOUT168_P00_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT168_P00_15_OUT

IfxGtm_ATOM3_3N_TOUT168_P00_15_OUT.

Definition at line 546 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_3N_TOUT16_P00_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT16_P00_7_OUT

IfxGtm_ATOM3_3N_TOUT16_P00_7_OUT.

Definition at line 547 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_3N_TOUT24_P33_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT24_P33_2_OUT

IfxGtm_ATOM3_3N_TOUT24_P33_2_OUT.

Definition at line 548 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_3N_TOUT33_P33_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT33_P33_11_OUT

IfxGtm_ATOM3_3N_TOUT33_P33_11_OUT.

Definition at line 549 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_3N_TOUT36_P32_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT36_P32_0_OUT

IfxGtm_ATOM3_3N_TOUT36_P32_0_OUT.

Definition at line 550 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_3N_TOUT62_P20_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT62_P20_6_OUT

IfxGtm_ATOM3_3N_TOUT62_P20_6_OUT.

Definition at line 551 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_3N_TOUT77_P15_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT77_P15_6_OUT

IfxGtm_ATOM3_3N_TOUT77_P15_6_OUT.

Definition at line 552 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_3N_TOUT92_P13_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT92_P13_1_OUT

IfxGtm_ATOM3_3N_TOUT92_P13_1_OUT.

Definition at line 553 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_3N_TOUT93_P13_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT93_P13_2_OUT

IfxGtm_ATOM3_3N_TOUT93_P13_2_OUT.

Definition at line 554 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_4_TOUT114_P01_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT114_P01_6_OUT

IfxGtm_ATOM3_4_TOUT114_P01_6_OUT.

Definition at line 567 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_4_TOUT131_P22_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT131_P22_5_OUT

IfxGtm_ATOM3_4_TOUT131_P22_5_OUT.

Definition at line 568 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_4_TOUT167_P00_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT167_P00_13_OUT

IfxGtm_ATOM3_4_TOUT167_P00_13_OUT.

Definition at line 569 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_4_TOUT22_P33_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT22_P33_0_OUT

IfxGtm_ATOM3_4_TOUT22_P33_0_OUT.

Definition at line 570 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_4_TOUT30_P33_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT30_P33_8_OUT

IfxGtm_ATOM3_4_TOUT30_P33_8_OUT.

Definition at line 571 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_4_TOUT34_P33_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT34_P33_12_OUT

IfxGtm_ATOM3_4_TOUT34_P33_12_OUT.

Definition at line 572 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_4_TOUT51_P21_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT51_P21_0_OUT

IfxGtm_ATOM3_4_TOUT51_P21_0_OUT.

Definition at line 573 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_4_TOUT90_P14_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT90_P14_10_OUT

IfxGtm_ATOM3_4_TOUT90_P14_10_OUT.

Definition at line 574 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_4_TOUT98_P11_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT98_P11_9_OUT

IfxGtm_ATOM3_4_TOUT98_P11_9_OUT.

Definition at line 575 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_4N_TOUT135_P22_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4N_TOUT135_P22_9_OUT

IfxGtm_ATOM3_4N_TOUT135_P22_9_OUT.

Definition at line 561 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_4N_TOUT21_P00_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4N_TOUT21_P00_12_OUT

IfxGtm_ATOM3_4N_TOUT21_P00_12_OUT.

Definition at line 562 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_4N_TOUT29_P33_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4N_TOUT29_P33_7_OUT

IfxGtm_ATOM3_4N_TOUT29_P33_7_OUT.

Definition at line 563 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_4N_TOUT57_P21_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4N_TOUT57_P21_6_OUT

IfxGtm_ATOM3_4N_TOUT57_P21_6_OUT.

Definition at line 564 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_4N_TOUT86_P14_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4N_TOUT86_P14_6_OUT

IfxGtm_ATOM3_4N_TOUT86_P14_6_OUT.

Definition at line 565 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_4N_TOUT97_P11_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4N_TOUT97_P11_6_OUT

IfxGtm_ATOM3_4N_TOUT97_P11_6_OUT.

Definition at line 566 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_5_TOUT115_P01_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT115_P01_7_OUT

IfxGtm_ATOM3_5_TOUT115_P01_7_OUT.

Definition at line 583 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_5_TOUT132_P22_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT132_P22_6_OUT

IfxGtm_ATOM3_5_TOUT132_P22_6_OUT.

Definition at line 584 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_5_TOUT166_P00_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT166_P00_14_OUT

IfxGtm_ATOM3_5_TOUT166_P00_14_OUT.

Definition at line 585 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_5_TOUT35_P33_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT35_P33_13_OUT

IfxGtm_ATOM3_5_TOUT35_P33_13_OUT.

Definition at line 586 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_5_TOUT52_P21_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT52_P21_1_OUT

IfxGtm_ATOM3_5_TOUT52_P21_1_OUT.

Definition at line 587 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_5_TOUT64_P20_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT64_P20_8_OUT

IfxGtm_ATOM3_5_TOUT64_P20_8_OUT.

Definition at line 588 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_5_TOUT91_P13_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT91_P13_0_OUT

IfxGtm_ATOM3_5_TOUT91_P13_0_OUT.

Definition at line 589 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_5_TOUT99_P11_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT99_P11_10_OUT

IfxGtm_ATOM3_5_TOUT99_P11_10_OUT.

Definition at line 590 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_5N_TOUT120_P11_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5N_TOUT120_P11_1_OUT

IfxGtm_ATOM3_5N_TOUT120_P11_1_OUT.

Definition at line 576 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_5N_TOUT136_P22_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5N_TOUT136_P22_10_OUT

IfxGtm_ATOM3_5N_TOUT136_P22_10_OUT.

Definition at line 577 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_5N_TOUT18_P00_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5N_TOUT18_P00_9_OUT

IfxGtm_ATOM3_5N_TOUT18_P00_9_OUT.

Definition at line 578 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_5N_TOUT26_P33_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5N_TOUT26_P33_4_OUT

IfxGtm_ATOM3_5N_TOUT26_P33_4_OUT.

Definition at line 579 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_5N_TOUT59_P20_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5N_TOUT59_P20_0_OUT

IfxGtm_ATOM3_5N_TOUT59_P20_0_OUT.

Definition at line 580 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_5N_TOUT87_P14_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5N_TOUT87_P14_7_OUT

IfxGtm_ATOM3_5N_TOUT87_P14_7_OUT.

Definition at line 581 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_5N_TOUT94_P13_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5N_TOUT94_P13_3_OUT

IfxGtm_ATOM3_5N_TOUT94_P13_3_OUT.

Definition at line 582 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_6_TOUT100_P11_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT100_P11_11_OUT

IfxGtm_ATOM3_6_TOUT100_P11_11_OUT.

Definition at line 597 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_6_TOUT133_P22_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT133_P22_7_OUT

IfxGtm_ATOM3_6_TOUT133_P22_7_OUT.

Definition at line 598 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_6_TOUT143_P33_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT143_P33_14_OUT

IfxGtm_ATOM3_6_TOUT143_P33_14_OUT.

Definition at line 599 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_6_TOUT168_P00_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT168_P00_15_OUT

IfxGtm_ATOM3_6_TOUT168_P00_15_OUT.

Definition at line 600 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_6_TOUT36_P32_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT36_P32_0_OUT

IfxGtm_ATOM3_6_TOUT36_P32_0_OUT.

Definition at line 601 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_6_TOUT62_P20_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT62_P20_6_OUT

IfxGtm_ATOM3_6_TOUT62_P20_6_OUT.

Definition at line 602 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_6_TOUT92_P13_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT92_P13_1_OUT

IfxGtm_ATOM3_6_TOUT92_P13_1_OUT.

Definition at line 603 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_6N_TOUT137_P22_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6N_TOUT137_P22_11_OUT

IfxGtm_ATOM3_6N_TOUT137_P22_11_OUT.

Definition at line 591 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_6N_TOUT19_P00_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6N_TOUT19_P00_10_OUT

IfxGtm_ATOM3_6N_TOUT19_P00_10_OUT.

Definition at line 592 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_6N_TOUT27_P33_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6N_TOUT27_P33_5_OUT

IfxGtm_ATOM3_6N_TOUT27_P33_5_OUT.

Definition at line 593 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_6N_TOUT60_P20_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6N_TOUT60_P20_1_OUT

IfxGtm_ATOM3_6N_TOUT60_P20_1_OUT.

Definition at line 594 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_6N_TOUT88_P14_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6N_TOUT88_P14_8_OUT

IfxGtm_ATOM3_6N_TOUT88_P14_8_OUT.

Definition at line 595 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_6N_TOUT95_P11_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6N_TOUT95_P11_2_OUT

IfxGtm_ATOM3_6N_TOUT95_P11_2_OUT.

Definition at line 596 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_7_TOUT101_P11_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT101_P11_12_OUT

IfxGtm_ATOM3_7_TOUT101_P11_12_OUT.

Definition at line 609 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_7_TOUT134_P22_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT134_P22_8_OUT

IfxGtm_ATOM3_7_TOUT134_P22_8_OUT.

Definition at line 610 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_7_TOUT144_P33_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT144_P33_15_OUT

IfxGtm_ATOM3_7_TOUT144_P33_15_OUT.

Definition at line 611 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_7_TOUT37_P32_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT37_P32_1_OUT

IfxGtm_ATOM3_7_TOUT37_P32_1_OUT.

Definition at line 612 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_7_TOUT63_P20_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT63_P20_7_OUT

IfxGtm_ATOM3_7_TOUT63_P20_7_OUT.

Definition at line 613 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_7_TOUT93_P13_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT93_P13_2_OUT

IfxGtm_ATOM3_7_TOUT93_P13_2_OUT.

Definition at line 614 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_7N_TOUT20_P00_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7N_TOUT20_P00_11_OUT

IfxGtm_ATOM3_7N_TOUT20_P00_11_OUT.

Definition at line 604 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_7N_TOUT28_P33_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7N_TOUT28_P33_6_OUT

IfxGtm_ATOM3_7N_TOUT28_P33_6_OUT.

Definition at line 605 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_7N_TOUT61_P20_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7N_TOUT61_P20_3_OUT

IfxGtm_ATOM3_7N_TOUT61_P20_3_OUT.

Definition at line 606 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_7N_TOUT89_P14_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7N_TOUT89_P14_9_OUT

IfxGtm_ATOM3_7N_TOUT89_P14_9_OUT.

Definition at line 607 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_7N_TOUT96_P11_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7N_TOUT96_P11_3_OUT

IfxGtm_ATOM3_7N_TOUT96_P11_3_OUT.

Definition at line 608 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_0_TOUT109_P10_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT109_P10_7_OUT

IfxGtm_ATOM4_0_TOUT109_P10_7_OUT.

Definition at line 616 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_0_TOUT39_P32_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT39_P32_3_OUT

IfxGtm_ATOM4_0_TOUT39_P32_3_OUT.

Definition at line 617 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_0_TOUT48_P22_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT48_P22_1_OUT

IfxGtm_ATOM4_0_TOUT48_P22_1_OUT.

Definition at line 618 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_0_TOUT53_P21_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT53_P21_2_OUT

IfxGtm_ATOM4_0_TOUT53_P21_2_OUT.

Definition at line 619 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_0_TOUT68_P20_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT68_P20_12_OUT

IfxGtm_ATOM4_0_TOUT68_P20_12_OUT.

Definition at line 620 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_0_TOUT76_P15_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT76_P15_5_OUT

IfxGtm_ATOM4_0_TOUT76_P15_5_OUT.

Definition at line 621 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_0_TOUT77_P15_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT77_P15_6_OUT

IfxGtm_ATOM4_0_TOUT77_P15_6_OUT.

Definition at line 622 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_0_TOUT85_P14_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT85_P14_5_OUT

IfxGtm_ATOM4_0_TOUT85_P14_5_OUT.

Definition at line 623 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_0_TOUT87_P14_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT87_P14_7_OUT

IfxGtm_ATOM4_0_TOUT87_P14_7_OUT.

Definition at line 624 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_0N_TOUT87_P14_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0N_TOUT87_P14_7_OUT

IfxGtm_ATOM4_0N_TOUT87_P14_7_OUT.

Definition at line 615 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_1_TOUT103_P10_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT103_P10_1_OUT

IfxGtm_ATOM4_1_TOUT103_P10_1_OUT.

Definition at line 633 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_1_TOUT41_P23_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT41_P23_0_OUT

IfxGtm_ATOM4_1_TOUT41_P23_0_OUT.

Definition at line 634 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_1_TOUT47_P22_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT47_P22_0_OUT

IfxGtm_ATOM4_1_TOUT47_P22_0_OUT.

Definition at line 635 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_1_TOUT54_P21_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT54_P21_3_OUT

IfxGtm_ATOM4_1_TOUT54_P21_3_OUT.

Definition at line 636 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_1_TOUT69_P20_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT69_P20_13_OUT

IfxGtm_ATOM4_1_TOUT69_P20_13_OUT.

Definition at line 637 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_1_TOUT78_P15_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT78_P15_7_OUT

IfxGtm_ATOM4_1_TOUT78_P15_7_OUT.

Definition at line 638 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_1_TOUT79_P15_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT79_P15_8_OUT

IfxGtm_ATOM4_1_TOUT79_P15_8_OUT.

Definition at line 639 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_1_TOUT84_P14_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT84_P14_4_OUT

IfxGtm_ATOM4_1_TOUT84_P14_4_OUT.

Definition at line 640 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_1_TOUT86_P14_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT86_P14_6_OUT

IfxGtm_ATOM4_1_TOUT86_P14_6_OUT.

Definition at line 641 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_1N_TOUT102_P10_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT102_P10_0_OUT

IfxGtm_ATOM4_1N_TOUT102_P10_0_OUT.

Definition at line 625 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_1N_TOUT44_P23_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT44_P23_3_OUT

IfxGtm_ATOM4_1N_TOUT44_P23_3_OUT.

Definition at line 626 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_1N_TOUT50_P22_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT50_P22_3_OUT

IfxGtm_ATOM4_1N_TOUT50_P22_3_OUT.

Definition at line 627 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_1N_TOUT53_P21_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT53_P21_2_OUT

IfxGtm_ATOM4_1N_TOUT53_P21_2_OUT.

Definition at line 628 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_1N_TOUT57_P21_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT57_P21_6_OUT

IfxGtm_ATOM4_1N_TOUT57_P21_6_OUT.

Definition at line 629 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_1N_TOUT72_P15_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT72_P15_1_OUT

IfxGtm_ATOM4_1N_TOUT72_P15_1_OUT.

Definition at line 630 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_1N_TOUT85_P14_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT85_P14_5_OUT

IfxGtm_ATOM4_1N_TOUT85_P14_5_OUT.

Definition at line 631 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_1N_TOUT86_P14_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT86_P14_6_OUT

IfxGtm_ATOM4_1N_TOUT86_P14_6_OUT.

Definition at line 632 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_2_TOUT104_P10_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT104_P10_2_OUT

IfxGtm_ATOM4_2_TOUT104_P10_2_OUT.

Definition at line 649 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_2_TOUT107_P10_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT107_P10_5_OUT

IfxGtm_ATOM4_2_TOUT107_P10_5_OUT.

Definition at line 650 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_2_TOUT42_P23_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT42_P23_1_OUT

IfxGtm_ATOM4_2_TOUT42_P23_1_OUT.

Definition at line 651 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_2_TOUT46_P23_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT46_P23_5_OUT

IfxGtm_ATOM4_2_TOUT46_P23_5_OUT.

Definition at line 652 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_2_TOUT55_P21_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT55_P21_4_OUT

IfxGtm_ATOM4_2_TOUT55_P21_4_OUT.

Definition at line 653 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_2_TOUT70_P20_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT70_P20_14_OUT

IfxGtm_ATOM4_2_TOUT70_P20_14_OUT.

Definition at line 654 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_2_TOUT80_P14_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT80_P14_0_OUT

IfxGtm_ATOM4_2_TOUT80_P14_0_OUT.

Definition at line 655 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_2_TOUT83_P14_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT83_P14_3_OUT

IfxGtm_ATOM4_2_TOUT83_P14_3_OUT.

Definition at line 656 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_2N_TOUT110_P10_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2N_TOUT110_P10_8_OUT

IfxGtm_ATOM4_2N_TOUT110_P10_8_OUT.

Definition at line 642 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_2N_TOUT45_P23_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2N_TOUT45_P23_4_OUT

IfxGtm_ATOM4_2N_TOUT45_P23_4_OUT.

Definition at line 643 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_2N_TOUT52_P21_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2N_TOUT52_P21_1_OUT

IfxGtm_ATOM4_2N_TOUT52_P21_1_OUT.

Definition at line 644 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_2N_TOUT58_P21_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2N_TOUT58_P21_7_OUT

IfxGtm_ATOM4_2N_TOUT58_P21_7_OUT.

Definition at line 645 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_2N_TOUT65_P20_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2N_TOUT65_P20_9_OUT

IfxGtm_ATOM4_2N_TOUT65_P20_9_OUT.

Definition at line 646 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_2N_TOUT73_P15_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2N_TOUT73_P15_2_OUT

IfxGtm_ATOM4_2N_TOUT73_P15_2_OUT.

Definition at line 647 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_2N_TOUT81_P14_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2N_TOUT81_P14_1_OUT

IfxGtm_ATOM4_2N_TOUT81_P14_1_OUT.

Definition at line 648 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_3_TOUT105_P10_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3_TOUT105_P10_3_OUT

IfxGtm_ATOM4_3_TOUT105_P10_3_OUT.

Definition at line 664 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_3_TOUT108_P10_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3_TOUT108_P10_6_OUT

IfxGtm_ATOM4_3_TOUT108_P10_6_OUT.

Definition at line 665 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_3_TOUT43_P23_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3_TOUT43_P23_2_OUT

IfxGtm_ATOM4_3_TOUT43_P23_2_OUT.

Definition at line 666 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_3_TOUT49_P22_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3_TOUT49_P22_2_OUT

IfxGtm_ATOM4_3_TOUT49_P22_2_OUT.

Definition at line 667 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_3_TOUT56_P21_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3_TOUT56_P21_5_OUT

IfxGtm_ATOM4_3_TOUT56_P21_5_OUT.

Definition at line 668 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_3_TOUT71_P15_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3_TOUT71_P15_0_OUT

IfxGtm_ATOM4_3_TOUT71_P15_0_OUT.

Definition at line 669 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_3_TOUT82_P14_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3_TOUT82_P14_2_OUT

IfxGtm_ATOM4_3_TOUT82_P14_2_OUT.

Definition at line 670 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_3N_TOUT106_P10_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3N_TOUT106_P10_4_OUT

IfxGtm_ATOM4_3N_TOUT106_P10_4_OUT.

Definition at line 657 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_3N_TOUT46_P23_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3N_TOUT46_P23_5_OUT

IfxGtm_ATOM4_3N_TOUT46_P23_5_OUT.

Definition at line 658 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_3N_TOUT51_P21_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3N_TOUT51_P21_0_OUT

IfxGtm_ATOM4_3N_TOUT51_P21_0_OUT.

Definition at line 659 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_3N_TOUT59_P20_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3N_TOUT59_P20_0_OUT

IfxGtm_ATOM4_3N_TOUT59_P20_0_OUT.

Definition at line 660 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_3N_TOUT66_P20_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3N_TOUT66_P20_10_OUT

IfxGtm_ATOM4_3N_TOUT66_P20_10_OUT.

Definition at line 661 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_3N_TOUT74_P15_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3N_TOUT74_P15_3_OUT

IfxGtm_ATOM4_3N_TOUT74_P15_3_OUT.

Definition at line 662 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_3N_TOUT80_P14_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3N_TOUT80_P14_0_OUT

IfxGtm_ATOM4_3N_TOUT80_P14_0_OUT.

Definition at line 663 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_4_TOUT102_P10_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT102_P10_0_OUT

IfxGtm_ATOM4_4_TOUT102_P10_0_OUT.

Definition at line 679 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_4_TOUT111_P01_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT111_P01_3_OUT

IfxGtm_ATOM4_4_TOUT111_P01_3_OUT.

Definition at line 680 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_4_TOUT131_P22_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT131_P22_5_OUT

IfxGtm_ATOM4_4_TOUT131_P22_5_OUT.

Definition at line 681 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_4_TOUT264_P13_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT264_P13_15_OUT

IfxGtm_ATOM4_4_TOUT264_P13_15_OUT.

Definition at line 682 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_4_TOUT44_P23_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT44_P23_3_OUT

IfxGtm_ATOM4_4_TOUT44_P23_3_OUT.

Definition at line 683 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_4_TOUT50_P22_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT50_P22_3_OUT

IfxGtm_ATOM4_4_TOUT50_P22_3_OUT.

Definition at line 684 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_4_TOUT57_P21_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT57_P21_6_OUT

IfxGtm_ATOM4_4_TOUT57_P21_6_OUT.

Definition at line 685 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_4_TOUT72_P15_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT72_P15_1_OUT

IfxGtm_ATOM4_4_TOUT72_P15_1_OUT.

Definition at line 686 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_4_TOUT81_P14_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT81_P14_1_OUT

IfxGtm_ATOM4_4_TOUT81_P14_1_OUT.

Definition at line 687 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_4N_TOUT105_P10_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT105_P10_3_OUT

IfxGtm_ATOM4_4N_TOUT105_P10_3_OUT.

Definition at line 671 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_4N_TOUT108_P10_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT108_P10_6_OUT

IfxGtm_ATOM4_4N_TOUT108_P10_6_OUT.

Definition at line 672 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_4N_TOUT132_P22_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT132_P22_6_OUT

IfxGtm_ATOM4_4N_TOUT132_P22_6_OUT.

Definition at line 673 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_4N_TOUT21_P00_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT21_P00_12_OUT

IfxGtm_ATOM4_4N_TOUT21_P00_12_OUT.

Definition at line 674 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_4N_TOUT56_P21_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT56_P21_5_OUT

IfxGtm_ATOM4_4N_TOUT56_P21_5_OUT.

Definition at line 675 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_4N_TOUT71_P15_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT71_P15_0_OUT

IfxGtm_ATOM4_4N_TOUT71_P15_0_OUT.

Definition at line 676 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_4N_TOUT75_P15_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT75_P15_4_OUT

IfxGtm_ATOM4_4N_TOUT75_P15_4_OUT.

Definition at line 677 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_4N_TOUT95_P11_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT95_P11_2_OUT

IfxGtm_ATOM4_4N_TOUT95_P11_2_OUT.

Definition at line 678 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_5_TOUT110_P10_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT110_P10_8_OUT

IfxGtm_ATOM4_5_TOUT110_P10_8_OUT.

Definition at line 694 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_5_TOUT116_P02_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT116_P02_9_OUT

IfxGtm_ATOM4_5_TOUT116_P02_9_OUT.

Definition at line 695 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_5_TOUT128_P12_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT128_P12_0_OUT

IfxGtm_ATOM4_5_TOUT128_P12_0_OUT.

Definition at line 696 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_5_TOUT130_P22_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT130_P22_4_OUT

IfxGtm_ATOM4_5_TOUT130_P22_4_OUT.

Definition at line 697 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_5_TOUT45_P23_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT45_P23_4_OUT

IfxGtm_ATOM4_5_TOUT45_P23_4_OUT.

Definition at line 698 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_5_TOUT56_P21_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT56_P21_5_OUT

IfxGtm_ATOM4_5_TOUT56_P21_5_OUT.

Definition at line 699 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_5_TOUT58_P21_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT58_P21_7_OUT

IfxGtm_ATOM4_5_TOUT58_P21_7_OUT.

Definition at line 700 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_5_TOUT65_P20_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT65_P20_9_OUT

IfxGtm_ATOM4_5_TOUT65_P20_9_OUT.

Definition at line 701 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_5_TOUT73_P15_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT73_P15_2_OUT

IfxGtm_ATOM4_5_TOUT73_P15_2_OUT.

Definition at line 702 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_5N_TOUT109_P10_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5N_TOUT109_P10_7_OUT

IfxGtm_ATOM4_5N_TOUT109_P10_7_OUT.

Definition at line 688 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_5N_TOUT121_P11_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5N_TOUT121_P11_4_OUT

IfxGtm_ATOM4_5N_TOUT121_P11_4_OUT.

Definition at line 689 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_5N_TOUT133_P22_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5N_TOUT133_P22_7_OUT

IfxGtm_ATOM4_5N_TOUT133_P22_7_OUT.

Definition at line 690 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_5N_TOUT18_P00_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5N_TOUT18_P00_9_OUT

IfxGtm_ATOM4_5N_TOUT18_P00_9_OUT.

Definition at line 691 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_5N_TOUT76_P15_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5N_TOUT76_P15_5_OUT

IfxGtm_ATOM4_5N_TOUT76_P15_5_OUT.

Definition at line 692 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_5N_TOUT77_P15_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5N_TOUT77_P15_6_OUT

IfxGtm_ATOM4_5N_TOUT77_P15_6_OUT.

Definition at line 693 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_6_TOUT106_P10_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT106_P10_4_OUT

IfxGtm_ATOM4_6_TOUT106_P10_4_OUT.

Definition at line 708 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_6_TOUT117_P02_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT117_P02_10_OUT

IfxGtm_ATOM4_6_TOUT117_P02_10_OUT.

Definition at line 709 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_6_TOUT129_P12_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT129_P12_1_OUT

IfxGtm_ATOM4_6_TOUT129_P12_1_OUT.

Definition at line 710 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_6_TOUT139_P23_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT139_P23_7_OUT

IfxGtm_ATOM4_6_TOUT139_P23_7_OUT.

Definition at line 711 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_6_TOUT46_P23_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT46_P23_5_OUT

IfxGtm_ATOM4_6_TOUT46_P23_5_OUT.

Definition at line 712 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_6_TOUT59_P20_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT59_P20_0_OUT

IfxGtm_ATOM4_6_TOUT59_P20_0_OUT.

Definition at line 713 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_6_TOUT66_P20_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT66_P20_10_OUT

IfxGtm_ATOM4_6_TOUT66_P20_10_OUT.

Definition at line 714 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_6_TOUT74_P15_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT74_P15_3_OUT

IfxGtm_ATOM4_6_TOUT74_P15_3_OUT.

Definition at line 715 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_6N_TOUT103_P10_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6N_TOUT103_P10_1_OUT

IfxGtm_ATOM4_6N_TOUT103_P10_1_OUT.

Definition at line 703 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_6N_TOUT134_P22_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6N_TOUT134_P22_8_OUT

IfxGtm_ATOM4_6N_TOUT134_P22_8_OUT.

Definition at line 704 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_6N_TOUT19_P00_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6N_TOUT19_P00_10_OUT

IfxGtm_ATOM4_6N_TOUT19_P00_10_OUT.

Definition at line 705 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_6N_TOUT78_P15_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6N_TOUT78_P15_7_OUT

IfxGtm_ATOM4_6N_TOUT78_P15_7_OUT.

Definition at line 706 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_6N_TOUT97_P11_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6N_TOUT97_P11_6_OUT

IfxGtm_ATOM4_6N_TOUT97_P11_6_OUT.

Definition at line 707 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_7_TOUT118_P02_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7_TOUT118_P02_11_OUT

IfxGtm_ATOM4_7_TOUT118_P02_11_OUT.

Definition at line 722 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_7_TOUT119_P11_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7_TOUT119_P11_0_OUT

IfxGtm_ATOM4_7_TOUT119_P11_0_OUT.

Definition at line 723 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_7_TOUT138_P23_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7_TOUT138_P23_6_OUT

IfxGtm_ATOM4_7_TOUT138_P23_6_OUT.

Definition at line 724 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_7_TOUT40_P32_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7_TOUT40_P32_4_OUT

IfxGtm_ATOM4_7_TOUT40_P32_4_OUT.

Definition at line 725 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_7_TOUT64_P20_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7_TOUT64_P20_8_OUT

IfxGtm_ATOM4_7_TOUT64_P20_8_OUT.

Definition at line 726 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_7_TOUT67_P20_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7_TOUT67_P20_11_OUT

IfxGtm_ATOM4_7_TOUT67_P20_11_OUT.

Definition at line 727 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_7_TOUT75_P15_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7_TOUT75_P15_4_OUT

IfxGtm_ATOM4_7_TOUT75_P15_4_OUT.

Definition at line 728 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_7N_TOUT104_P10_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7N_TOUT104_P10_2_OUT

IfxGtm_ATOM4_7N_TOUT104_P10_2_OUT.

Definition at line 716 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_7N_TOUT107_P10_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7N_TOUT107_P10_5_OUT

IfxGtm_ATOM4_7N_TOUT107_P10_5_OUT.

Definition at line 717 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_7N_TOUT124_P11_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7N_TOUT124_P11_8_OUT

IfxGtm_ATOM4_7N_TOUT124_P11_8_OUT.

Definition at line 718 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_7N_TOUT135_P22_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7N_TOUT135_P22_9_OUT

IfxGtm_ATOM4_7N_TOUT135_P22_9_OUT.

Definition at line 719 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_7N_TOUT20_P00_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7N_TOUT20_P00_11_OUT

IfxGtm_ATOM4_7N_TOUT20_P00_11_OUT.

Definition at line 720 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM4_7N_TOUT79_P15_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7N_TOUT79_P15_8_OUT

IfxGtm_ATOM4_7N_TOUT79_P15_8_OUT.

Definition at line 721 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_0_TOUT119_P11_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT119_P11_0_OUT

IfxGtm_ATOM5_0_TOUT119_P11_0_OUT.

Definition at line 737 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_0_TOUT130_P22_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT130_P22_4_OUT

IfxGtm_ATOM5_0_TOUT130_P22_4_OUT.

Definition at line 738 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_0_TOUT146_P34_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT146_P34_1_OUT

IfxGtm_ATOM5_0_TOUT146_P34_1_OUT.

Definition at line 739 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_0_TOUT155_P01_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT155_P01_0_OUT

IfxGtm_ATOM5_0_TOUT155_P01_0_OUT.

Definition at line 740 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_0_TOUT162_P01_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT162_P01_8_OUT

IfxGtm_ATOM5_0_TOUT162_P01_8_OUT.

Definition at line 741 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_0_TOUT174_P31_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT174_P31_0_OUT

IfxGtm_ATOM5_0_TOUT174_P31_0_OUT.

Definition at line 742 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_0_TOUT206_P25_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT206_P25_0_OUT

IfxGtm_ATOM5_0_TOUT206_P25_0_OUT.

Definition at line 743 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_0_TOUT249_P13_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT249_P13_12_OUT

IfxGtm_ATOM5_0_TOUT249_P13_12_OUT.

Definition at line 744 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_0_TOUT258_P14_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT258_P14_11_OUT

IfxGtm_ATOM5_0_TOUT258_P14_11_OUT.

Definition at line 745 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_0N_TOUT126_P11_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT126_P11_14_OUT

IfxGtm_ATOM5_0N_TOUT126_P11_14_OUT.

Definition at line 729 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_0N_TOUT134_P22_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT134_P22_8_OUT

IfxGtm_ATOM5_0N_TOUT134_P22_8_OUT.

Definition at line 730 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_0N_TOUT150_P34_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT150_P34_5_OUT

IfxGtm_ATOM5_0N_TOUT150_P34_5_OUT.

Definition at line 731 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_0N_TOUT161_P01_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT161_P01_13_OUT

IfxGtm_ATOM5_0N_TOUT161_P01_13_OUT.

Definition at line 732 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_0N_TOUT181_P31_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT181_P31_7_OUT

IfxGtm_ATOM5_0N_TOUT181_P31_7_OUT.

Definition at line 733 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_0N_TOUT213_P25_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT213_P25_7_OUT

IfxGtm_ATOM5_0N_TOUT213_P25_7_OUT.

Definition at line 734 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_0N_TOUT261_P14_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT261_P14_12_OUT

IfxGtm_ATOM5_0N_TOUT261_P14_12_OUT.

Definition at line 735 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_0N_TOUT264_P13_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT264_P13_15_OUT

IfxGtm_ATOM5_0N_TOUT264_P13_15_OUT.

Definition at line 736 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_1_TOUT120_P11_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT120_P11_1_OUT

IfxGtm_ATOM5_1_TOUT120_P11_1_OUT.

Definition at line 757 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_1_TOUT131_P22_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT131_P22_5_OUT

IfxGtm_ATOM5_1_TOUT131_P22_5_OUT.

Definition at line 758 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_1_TOUT147_P34_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT147_P34_2_OUT

IfxGtm_ATOM5_1_TOUT147_P34_2_OUT.

Definition at line 759 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_1_TOUT156_P01_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT156_P01_2_OUT

IfxGtm_ATOM5_1_TOUT156_P01_2_OUT.

Definition at line 760 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_1_TOUT164_P01_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT164_P01_14_OUT

IfxGtm_ATOM5_1_TOUT164_P01_14_OUT.

Definition at line 761 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_1_TOUT175_P31_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT175_P31_1_OUT

IfxGtm_ATOM5_1_TOUT175_P31_1_OUT.

Definition at line 762 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_1_TOUT207_P25_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT207_P25_1_OUT

IfxGtm_ATOM5_1_TOUT207_P25_1_OUT.

Definition at line 763 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_1_TOUT242_P15_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT242_P15_10_OUT

IfxGtm_ATOM5_1_TOUT242_P15_10_OUT.

Definition at line 764 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_1_TOUT253_P13_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT253_P13_4_OUT

IfxGtm_ATOM5_1_TOUT253_P13_4_OUT.

Definition at line 765 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_1_TOUT265_P10_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT265_P10_9_OUT

IfxGtm_ATOM5_1_TOUT265_P10_9_OUT.

Definition at line 766 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_1N_TOUT123_P11_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT123_P11_7_OUT

IfxGtm_ATOM5_1N_TOUT123_P11_7_OUT.

Definition at line 746 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_1N_TOUT128_P12_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT128_P12_0_OUT

IfxGtm_ATOM5_1N_TOUT128_P12_0_OUT.

Definition at line 747 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_1N_TOUT135_P22_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT135_P22_9_OUT

IfxGtm_ATOM5_1N_TOUT135_P22_9_OUT.

Definition at line 748 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_1N_TOUT140_P32_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT140_P32_5_OUT

IfxGtm_ATOM5_1N_TOUT140_P32_5_OUT.

Definition at line 749 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_1N_TOUT158_P01_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT158_P01_12_OUT

IfxGtm_ATOM5_1N_TOUT158_P01_12_OUT.

Definition at line 750 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_1N_TOUT178_P31_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT178_P31_4_OUT

IfxGtm_ATOM5_1N_TOUT178_P31_4_OUT.

Definition at line 751 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_1N_TOUT210_P25_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT210_P25_4_OUT

IfxGtm_ATOM5_1N_TOUT210_P25_4_OUT.

Definition at line 752 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_1N_TOUT245_P15_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT245_P15_13_OUT

IfxGtm_ATOM5_1N_TOUT245_P15_13_OUT.

Definition at line 753 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_1N_TOUT248_P13_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT248_P13_9_OUT

IfxGtm_ATOM5_1N_TOUT248_P13_9_OUT.

Definition at line 754 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_1N_TOUT260_P14_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT260_P14_13_OUT

IfxGtm_ATOM5_1N_TOUT260_P14_13_OUT.

Definition at line 755 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_1N_TOUT268_P10_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT268_P10_13_OUT

IfxGtm_ATOM5_1N_TOUT268_P10_13_OUT.

Definition at line 756 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_2_TOUT121_P11_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT121_P11_4_OUT

IfxGtm_ATOM5_2_TOUT121_P11_4_OUT.

Definition at line 777 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_2_TOUT132_P22_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT132_P22_6_OUT

IfxGtm_ATOM5_2_TOUT132_P22_6_OUT.

Definition at line 778 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_2_TOUT148_P34_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT148_P34_3_OUT

IfxGtm_ATOM5_2_TOUT148_P34_3_OUT.

Definition at line 779 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_2_TOUT152_P02_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT152_P02_15_OUT

IfxGtm_ATOM5_2_TOUT152_P02_15_OUT.

Definition at line 780 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_2_TOUT157_P01_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT157_P01_15_OUT

IfxGtm_ATOM5_2_TOUT157_P01_15_OUT.

Definition at line 781 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_2_TOUT176_P31_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT176_P31_2_OUT

IfxGtm_ATOM5_2_TOUT176_P31_2_OUT.

Definition at line 782 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_2_TOUT208_P25_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT208_P25_2_OUT

IfxGtm_ATOM5_2_TOUT208_P25_2_OUT.

Definition at line 783 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_2_TOUT243_P15_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT243_P15_11_OUT

IfxGtm_ATOM5_2_TOUT243_P15_11_OUT.

Definition at line 784 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_2_TOUT254_P13_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT254_P13_5_OUT

IfxGtm_ATOM5_2_TOUT254_P13_5_OUT.

Definition at line 785 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_2_TOUT266_P10_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT266_P10_10_OUT

IfxGtm_ATOM5_2_TOUT266_P10_10_OUT.

Definition at line 786 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_2N_TOUT124_P11_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT124_P11_8_OUT

IfxGtm_ATOM5_2N_TOUT124_P11_8_OUT.

Definition at line 767 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_2N_TOUT136_P22_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT136_P22_10_OUT

IfxGtm_ATOM5_2N_TOUT136_P22_10_OUT.

Definition at line 768 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_2N_TOUT141_P32_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT141_P32_6_OUT

IfxGtm_ATOM5_2N_TOUT141_P32_6_OUT.

Definition at line 769 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_2N_TOUT159_P01_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT159_P01_1_OUT

IfxGtm_ATOM5_2N_TOUT159_P01_1_OUT.

Definition at line 770 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_2N_TOUT179_P31_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT179_P31_5_OUT

IfxGtm_ATOM5_2N_TOUT179_P31_5_OUT.

Definition at line 771 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_2N_TOUT211_P25_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT211_P25_5_OUT

IfxGtm_ATOM5_2N_TOUT211_P25_5_OUT.

Definition at line 772 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_2N_TOUT246_P15_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT246_P15_14_OUT

IfxGtm_ATOM5_2N_TOUT246_P15_14_OUT.

Definition at line 773 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_2N_TOUT250_P13_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT250_P13_11_OUT

IfxGtm_ATOM5_2N_TOUT250_P13_11_OUT.

Definition at line 774 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_2N_TOUT259_P14_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT259_P14_14_OUT

IfxGtm_ATOM5_2N_TOUT259_P14_14_OUT.

Definition at line 775 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_2N_TOUT269_P10_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT269_P10_11_OUT

IfxGtm_ATOM5_2N_TOUT269_P10_11_OUT.

Definition at line 776 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_3_TOUT122_P11_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT122_P11_5_OUT

IfxGtm_ATOM5_3_TOUT122_P11_5_OUT.

Definition at line 799 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_3_TOUT133_P22_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT133_P22_7_OUT

IfxGtm_ATOM5_3_TOUT133_P22_7_OUT.

Definition at line 800 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_3_TOUT149_P34_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT149_P34_4_OUT

IfxGtm_ATOM5_3_TOUT149_P34_4_OUT.

Definition at line 801 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_3_TOUT163_P01_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT163_P01_10_OUT

IfxGtm_ATOM5_3_TOUT163_P01_10_OUT.

Definition at line 802 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_3_TOUT165_P01_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT165_P01_11_OUT

IfxGtm_ATOM5_3_TOUT165_P01_11_OUT.

Definition at line 803 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_3_TOUT177_P31_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT177_P31_3_OUT

IfxGtm_ATOM5_3_TOUT177_P31_3_OUT.

Definition at line 804 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_3_TOUT209_P25_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT209_P25_3_OUT

IfxGtm_ATOM5_3_TOUT209_P25_3_OUT.

Definition at line 805 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_3_TOUT244_P15_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT244_P15_12_OUT

IfxGtm_ATOM5_3_TOUT244_P15_12_OUT.

Definition at line 806 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_3_TOUT255_P13_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT255_P13_6_OUT

IfxGtm_ATOM5_3_TOUT255_P13_6_OUT.

Definition at line 807 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_3_TOUT267_P10_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT267_P10_14_OUT

IfxGtm_ATOM5_3_TOUT267_P10_14_OUT.

Definition at line 808 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_3N_TOUT123_P11_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT123_P11_7_OUT

IfxGtm_ATOM5_3N_TOUT123_P11_7_OUT.

Definition at line 787 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_3N_TOUT125_P11_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT125_P11_13_OUT

IfxGtm_ATOM5_3N_TOUT125_P11_13_OUT.

Definition at line 788 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_3N_TOUT137_P22_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT137_P22_11_OUT

IfxGtm_ATOM5_3N_TOUT137_P22_11_OUT.

Definition at line 789 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_3N_TOUT142_P32_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT142_P32_7_OUT

IfxGtm_ATOM5_3N_TOUT142_P32_7_OUT.

Definition at line 790 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_3N_TOUT160_P01_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT160_P01_9_OUT

IfxGtm_ATOM5_3N_TOUT160_P01_9_OUT.

Definition at line 791 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_3N_TOUT180_P31_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT180_P31_6_OUT

IfxGtm_ATOM5_3N_TOUT180_P31_6_OUT.

Definition at line 792 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_3N_TOUT212_P25_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT212_P25_6_OUT

IfxGtm_ATOM5_3N_TOUT212_P25_6_OUT.

Definition at line 793 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_3N_TOUT212_P26_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT212_P26_0_OUT

IfxGtm_ATOM5_3N_TOUT212_P26_0_OUT.

Definition at line 794 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_3N_TOUT247_P15_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT247_P15_15_OUT

IfxGtm_ATOM5_3N_TOUT247_P15_15_OUT.

Definition at line 795 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_3N_TOUT249_P13_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT249_P13_12_OUT

IfxGtm_ATOM5_3N_TOUT249_P13_12_OUT.

Definition at line 796 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_3N_TOUT263_P14_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT263_P14_15_OUT

IfxGtm_ATOM5_3N_TOUT263_P14_15_OUT.

Definition at line 797 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_3N_TOUT270_P10_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT270_P10_15_OUT

IfxGtm_ATOM5_3N_TOUT270_P10_15_OUT.

Definition at line 798 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_4_TOUT123_P11_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT123_P11_7_OUT

IfxGtm_ATOM5_4_TOUT123_P11_7_OUT.

Definition at line 816 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_4_TOUT134_P22_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT134_P22_8_OUT

IfxGtm_ATOM5_4_TOUT134_P22_8_OUT.

Definition at line 817 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_4_TOUT150_P34_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT150_P34_5_OUT

IfxGtm_ATOM5_4_TOUT150_P34_5_OUT.

Definition at line 818 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_4_TOUT158_P01_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT158_P01_12_OUT

IfxGtm_ATOM5_4_TOUT158_P01_12_OUT.

Definition at line 819 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_4_TOUT178_P31_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT178_P31_4_OUT

IfxGtm_ATOM5_4_TOUT178_P31_4_OUT.

Definition at line 820 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_4_TOUT210_P25_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT210_P25_4_OUT

IfxGtm_ATOM5_4_TOUT210_P25_4_OUT.

Definition at line 821 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_4_TOUT245_P15_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT245_P15_13_OUT

IfxGtm_ATOM5_4_TOUT245_P15_13_OUT.

Definition at line 822 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_4_TOUT248_P13_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT248_P13_9_OUT

IfxGtm_ATOM5_4_TOUT248_P13_9_OUT.

Definition at line 823 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_4_TOUT268_P10_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT268_P10_13_OUT

IfxGtm_ATOM5_4_TOUT268_P10_13_OUT.

Definition at line 824 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_4N_TOUT122_P11_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4N_TOUT122_P11_5_OUT

IfxGtm_ATOM5_4N_TOUT122_P11_5_OUT.

Definition at line 809 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_4N_TOUT129_P12_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4N_TOUT129_P12_1_OUT

IfxGtm_ATOM5_4N_TOUT129_P12_1_OUT.

Definition at line 810 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_4N_TOUT163_P01_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4N_TOUT163_P01_10_OUT

IfxGtm_ATOM5_4N_TOUT163_P01_10_OUT.

Definition at line 811 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_4N_TOUT165_P01_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4N_TOUT165_P01_11_OUT

IfxGtm_ATOM5_4N_TOUT165_P01_11_OUT.

Definition at line 812 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_4N_TOUT177_P31_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4N_TOUT177_P31_3_OUT

IfxGtm_ATOM5_4N_TOUT177_P31_3_OUT.

Definition at line 813 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_4N_TOUT209_P25_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4N_TOUT209_P25_3_OUT

IfxGtm_ATOM5_4N_TOUT209_P25_3_OUT.

Definition at line 814 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_4N_TOUT267_P10_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4N_TOUT267_P10_14_OUT

IfxGtm_ATOM5_4N_TOUT267_P10_14_OUT.

Definition at line 815 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_5_TOUT124_P11_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT124_P11_8_OUT

IfxGtm_ATOM5_5_TOUT124_P11_8_OUT.

Definition at line 830 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_5_TOUT135_P22_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT135_P22_9_OUT

IfxGtm_ATOM5_5_TOUT135_P22_9_OUT.

Definition at line 831 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_5_TOUT140_P32_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT140_P32_5_OUT

IfxGtm_ATOM5_5_TOUT140_P32_5_OUT.

Definition at line 832 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_5_TOUT159_P01_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT159_P01_1_OUT

IfxGtm_ATOM5_5_TOUT159_P01_1_OUT.

Definition at line 833 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_5_TOUT179_P31_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT179_P31_5_OUT

IfxGtm_ATOM5_5_TOUT179_P31_5_OUT.

Definition at line 834 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_5_TOUT211_P25_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT211_P25_5_OUT

IfxGtm_ATOM5_5_TOUT211_P25_5_OUT.

Definition at line 835 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_5_TOUT246_P15_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT246_P15_14_OUT

IfxGtm_ATOM5_5_TOUT246_P15_14_OUT.

Definition at line 836 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_5_TOUT250_P13_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT250_P13_11_OUT

IfxGtm_ATOM5_5_TOUT250_P13_11_OUT.

Definition at line 837 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_5_TOUT269_P10_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT269_P10_11_OUT

IfxGtm_ATOM5_5_TOUT269_P10_11_OUT.

Definition at line 838 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_5N_TOUT119_P11_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5N_TOUT119_P11_0_OUT

IfxGtm_ATOM5_5N_TOUT119_P11_0_OUT.

Definition at line 825 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_5N_TOUT155_P01_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5N_TOUT155_P01_0_OUT

IfxGtm_ATOM5_5N_TOUT155_P01_0_OUT.

Definition at line 826 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_5N_TOUT162_P01_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5N_TOUT162_P01_8_OUT

IfxGtm_ATOM5_5N_TOUT162_P01_8_OUT.

Definition at line 827 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_5N_TOUT174_P31_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5N_TOUT174_P31_0_OUT

IfxGtm_ATOM5_5N_TOUT174_P31_0_OUT.

Definition at line 828 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_5N_TOUT206_P25_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5N_TOUT206_P25_0_OUT

IfxGtm_ATOM5_5N_TOUT206_P25_0_OUT.

Definition at line 829 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_6_TOUT125_P11_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT125_P11_13_OUT

IfxGtm_ATOM5_6_TOUT125_P11_13_OUT.

Definition at line 845 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_6_TOUT136_P22_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT136_P22_10_OUT

IfxGtm_ATOM5_6_TOUT136_P22_10_OUT.

Definition at line 846 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_6_TOUT141_P32_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT141_P32_6_OUT

IfxGtm_ATOM5_6_TOUT141_P32_6_OUT.

Definition at line 847 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_6_TOUT160_P01_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT160_P01_9_OUT

IfxGtm_ATOM5_6_TOUT160_P01_9_OUT.

Definition at line 848 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_6_TOUT180_P31_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT180_P31_6_OUT

IfxGtm_ATOM5_6_TOUT180_P31_6_OUT.

Definition at line 849 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_6_TOUT212_P25_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT212_P25_6_OUT

IfxGtm_ATOM5_6_TOUT212_P25_6_OUT.

Definition at line 850 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_6_TOUT212_P26_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT212_P26_0_OUT

IfxGtm_ATOM5_6_TOUT212_P26_0_OUT.

Definition at line 851 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_6_TOUT247_P15_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT247_P15_15_OUT

IfxGtm_ATOM5_6_TOUT247_P15_15_OUT.

Definition at line 852 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_6_TOUT249_P13_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT249_P13_12_OUT

IfxGtm_ATOM5_6_TOUT249_P13_12_OUT.

Definition at line 853 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_6_TOUT270_P10_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT270_P10_15_OUT

IfxGtm_ATOM5_6_TOUT270_P10_15_OUT.

Definition at line 854 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_6N_TOUT120_P11_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6N_TOUT120_P11_1_OUT

IfxGtm_ATOM5_6N_TOUT120_P11_1_OUT.

Definition at line 839 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_6N_TOUT156_P01_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6N_TOUT156_P01_2_OUT

IfxGtm_ATOM5_6N_TOUT156_P01_2_OUT.

Definition at line 840 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_6N_TOUT158_P01_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6N_TOUT158_P01_12_OUT

IfxGtm_ATOM5_6N_TOUT158_P01_12_OUT.

Definition at line 841 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_6N_TOUT175_P31_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6N_TOUT175_P31_1_OUT

IfxGtm_ATOM5_6N_TOUT175_P31_1_OUT.

Definition at line 842 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_6N_TOUT207_P25_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6N_TOUT207_P25_1_OUT

IfxGtm_ATOM5_6N_TOUT207_P25_1_OUT.

Definition at line 843 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_6N_TOUT96_P11_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6N_TOUT96_P11_3_OUT

IfxGtm_ATOM5_6N_TOUT96_P11_3_OUT.

Definition at line 844 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_7_TOUT126_P11_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7_TOUT126_P11_14_OUT

IfxGtm_ATOM5_7_TOUT126_P11_14_OUT.

Definition at line 860 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_7_TOUT137_P22_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7_TOUT137_P22_11_OUT

IfxGtm_ATOM5_7_TOUT137_P22_11_OUT.

Definition at line 861 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_7_TOUT142_P32_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7_TOUT142_P32_7_OUT

IfxGtm_ATOM5_7_TOUT142_P32_7_OUT.

Definition at line 862 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_7_TOUT161_P01_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7_TOUT161_P01_13_OUT

IfxGtm_ATOM5_7_TOUT161_P01_13_OUT.

Definition at line 863 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_7_TOUT181_P31_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7_TOUT181_P31_7_OUT

IfxGtm_ATOM5_7_TOUT181_P31_7_OUT.

Definition at line 864 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_7_TOUT213_P25_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7_TOUT213_P25_7_OUT

IfxGtm_ATOM5_7_TOUT213_P25_7_OUT.

Definition at line 865 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_7_TOUT248_P13_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7_TOUT248_P13_9_OUT

IfxGtm_ATOM5_7_TOUT248_P13_9_OUT.

Definition at line 866 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_7N_TOUT121_P11_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7N_TOUT121_P11_4_OUT

IfxGtm_ATOM5_7N_TOUT121_P11_4_OUT.

Definition at line 855 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_7N_TOUT152_P02_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7N_TOUT152_P02_15_OUT

IfxGtm_ATOM5_7N_TOUT152_P02_15_OUT.

Definition at line 856 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_7N_TOUT157_P01_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7N_TOUT157_P01_15_OUT

IfxGtm_ATOM5_7N_TOUT157_P01_15_OUT.

Definition at line 857 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_7N_TOUT176_P31_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7N_TOUT176_P31_2_OUT

IfxGtm_ATOM5_7N_TOUT176_P31_2_OUT.

Definition at line 858 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM5_7N_TOUT208_P25_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7N_TOUT208_P25_2_OUT

IfxGtm_ATOM5_7N_TOUT208_P25_2_OUT.

Definition at line 859 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_0_TOUT127_P11_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT127_P11_15_OUT

IfxGtm_ATOM6_0_TOUT127_P11_15_OUT.

Definition at line 867 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_0_TOUT141_P32_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT141_P32_6_OUT

IfxGtm_ATOM6_0_TOUT141_P32_6_OUT.

Definition at line 868 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_0_TOUT155_P01_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT155_P01_0_OUT

IfxGtm_ATOM6_0_TOUT155_P01_0_OUT.

Definition at line 869 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_0_TOUT162_P01_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT162_P01_8_OUT

IfxGtm_ATOM6_0_TOUT162_P01_8_OUT.

Definition at line 870 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_0_TOUT182_P31_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT182_P31_8_OUT

IfxGtm_ATOM6_0_TOUT182_P31_8_OUT.

Definition at line 871 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_0_TOUT214_P25_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT214_P25_8_OUT

IfxGtm_ATOM6_0_TOUT214_P25_8_OUT.

Definition at line 872 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_0_TOUT242_P15_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT242_P15_10_OUT

IfxGtm_ATOM6_0_TOUT242_P15_10_OUT.

Definition at line 873 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_0_TOUT250_P13_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT250_P13_11_OUT

IfxGtm_ATOM6_0_TOUT250_P13_11_OUT.

Definition at line 874 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_1_TOUT128_P12_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT128_P12_0_OUT

IfxGtm_ATOM6_1_TOUT128_P12_0_OUT.

Definition at line 875 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_1_TOUT142_P32_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT142_P32_7_OUT

IfxGtm_ATOM6_1_TOUT142_P32_7_OUT.

Definition at line 876 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_1_TOUT156_P01_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT156_P01_2_OUT

IfxGtm_ATOM6_1_TOUT156_P01_2_OUT.

Definition at line 877 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_1_TOUT164_P01_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT164_P01_14_OUT

IfxGtm_ATOM6_1_TOUT164_P01_14_OUT.

Definition at line 878 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_1_TOUT183_P31_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT183_P31_9_OUT

IfxGtm_ATOM6_1_TOUT183_P31_9_OUT.

Definition at line 879 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_1_TOUT215_P25_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT215_P25_9_OUT

IfxGtm_ATOM6_1_TOUT215_P25_9_OUT.

Definition at line 880 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_1_TOUT251_P13_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT251_P13_10_OUT

IfxGtm_ATOM6_1_TOUT251_P13_10_OUT.

Definition at line 881 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_1_TOUT258_P14_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT258_P14_11_OUT

IfxGtm_ATOM6_1_TOUT258_P14_11_OUT.

Definition at line 882 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_2_TOUT129_P12_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT129_P12_1_OUT

IfxGtm_ATOM6_2_TOUT129_P12_1_OUT.

Definition at line 883 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_2_TOUT143_P33_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT143_P33_14_OUT

IfxGtm_ATOM6_2_TOUT143_P33_14_OUT.

Definition at line 884 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_2_TOUT152_P02_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT152_P02_15_OUT

IfxGtm_ATOM6_2_TOUT152_P02_15_OUT.

Definition at line 885 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_2_TOUT157_P01_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT157_P01_15_OUT

IfxGtm_ATOM6_2_TOUT157_P01_15_OUT.

Definition at line 886 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_2_TOUT184_P31_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT184_P31_10_OUT

IfxGtm_ATOM6_2_TOUT184_P31_10_OUT.

Definition at line 887 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_2_TOUT216_P25_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT216_P25_10_OUT

IfxGtm_ATOM6_2_TOUT216_P25_10_OUT.

Definition at line 888 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_2_TOUT252_P13_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT252_P13_14_OUT

IfxGtm_ATOM6_2_TOUT252_P13_14_OUT.

Definition at line 889 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_2_TOUT259_P14_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT259_P14_14_OUT

IfxGtm_ATOM6_2_TOUT259_P14_14_OUT.

Definition at line 890 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_3_TOUT111_P01_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT111_P01_3_OUT

IfxGtm_ATOM6_3_TOUT111_P01_3_OUT.

Definition at line 891 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_3_TOUT144_P33_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT144_P33_15_OUT

IfxGtm_ATOM6_3_TOUT144_P33_15_OUT.

Definition at line 892 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_3_TOUT163_P01_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT163_P01_10_OUT

IfxGtm_ATOM6_3_TOUT163_P01_10_OUT.

Definition at line 893 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_3_TOUT165_P01_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT165_P01_11_OUT

IfxGtm_ATOM6_3_TOUT165_P01_11_OUT.

Definition at line 894 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_3_TOUT185_P31_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT185_P31_11_OUT

IfxGtm_ATOM6_3_TOUT185_P31_11_OUT.

Definition at line 895 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_3_TOUT217_P25_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT217_P25_11_OUT

IfxGtm_ATOM6_3_TOUT217_P25_11_OUT.

Definition at line 896 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_3_TOUT253_P13_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT253_P13_4_OUT

IfxGtm_ATOM6_3_TOUT253_P13_4_OUT.

Definition at line 897 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_3_TOUT260_P14_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT260_P14_13_OUT

IfxGtm_ATOM6_3_TOUT260_P14_13_OUT.

Definition at line 898 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_4_TOUT140_P32_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT140_P32_5_OUT

IfxGtm_ATOM6_4_TOUT140_P32_5_OUT.

Definition at line 899 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_4_TOUT143_P33_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT143_P33_14_OUT

IfxGtm_ATOM6_4_TOUT143_P33_14_OUT.

Definition at line 900 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_4_TOUT158_P01_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT158_P01_12_OUT

IfxGtm_ATOM6_4_TOUT158_P01_12_OUT.

Definition at line 901 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_4_TOUT186_P31_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT186_P31_12_OUT

IfxGtm_ATOM6_4_TOUT186_P31_12_OUT.

Definition at line 902 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_4_TOUT218_P25_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT218_P25_12_OUT

IfxGtm_ATOM6_4_TOUT218_P25_12_OUT.

Definition at line 903 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_4_TOUT254_P13_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT254_P13_5_OUT

IfxGtm_ATOM6_4_TOUT254_P13_5_OUT.

Definition at line 904 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_4_TOUT261_P14_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT261_P14_12_OUT

IfxGtm_ATOM6_4_TOUT261_P14_12_OUT.

Definition at line 905 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_4_TOUT31_P33_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT31_P33_9_OUT

IfxGtm_ATOM6_4_TOUT31_P33_9_OUT.

Definition at line 906 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_5_TOUT146_P34_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_5_TOUT146_P34_1_OUT

IfxGtm_ATOM6_5_TOUT146_P34_1_OUT.

Definition at line 907 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_5_TOUT159_P01_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_5_TOUT159_P01_1_OUT

IfxGtm_ATOM6_5_TOUT159_P01_1_OUT.

Definition at line 908 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_5_TOUT187_P31_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_5_TOUT187_P31_13_OUT

IfxGtm_ATOM6_5_TOUT187_P31_13_OUT.

Definition at line 909 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_5_TOUT219_P25_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_5_TOUT219_P25_13_OUT

IfxGtm_ATOM6_5_TOUT219_P25_13_OUT.

Definition at line 910 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_5_TOUT243_P15_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_5_TOUT243_P15_11_OUT

IfxGtm_ATOM6_5_TOUT243_P15_11_OUT.

Definition at line 911 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_5_TOUT255_P13_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_5_TOUT255_P13_6_OUT

IfxGtm_ATOM6_5_TOUT255_P13_6_OUT.

Definition at line 912 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_5_TOUT262_P13_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_5_TOUT262_P13_13_OUT

IfxGtm_ATOM6_5_TOUT262_P13_13_OUT.

Definition at line 913 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_6_TOUT147_P34_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_6_TOUT147_P34_2_OUT

IfxGtm_ATOM6_6_TOUT147_P34_2_OUT.

Definition at line 914 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_6_TOUT160_P01_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_6_TOUT160_P01_9_OUT

IfxGtm_ATOM6_6_TOUT160_P01_9_OUT.

Definition at line 915 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_6_TOUT188_P31_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_6_TOUT188_P31_14_OUT

IfxGtm_ATOM6_6_TOUT188_P31_14_OUT.

Definition at line 916 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_6_TOUT220_P25_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_6_TOUT220_P25_14_OUT

IfxGtm_ATOM6_6_TOUT220_P25_14_OUT.

Definition at line 917 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_6_TOUT256_P13_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_6_TOUT256_P13_7_OUT

IfxGtm_ATOM6_6_TOUT256_P13_7_OUT.

Definition at line 918 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_6_TOUT263_P14_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_6_TOUT263_P14_15_OUT

IfxGtm_ATOM6_6_TOUT263_P14_15_OUT.

Definition at line 919 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_7_TOUT148_P34_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_7_TOUT148_P34_3_OUT

IfxGtm_ATOM6_7_TOUT148_P34_3_OUT.

Definition at line 920 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_7_TOUT161_P01_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_7_TOUT161_P01_13_OUT

IfxGtm_ATOM6_7_TOUT161_P01_13_OUT.

Definition at line 921 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_7_TOUT189_P31_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_7_TOUT189_P31_15_OUT

IfxGtm_ATOM6_7_TOUT189_P31_15_OUT.

Definition at line 922 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_7_TOUT221_P25_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_7_TOUT221_P25_15_OUT

IfxGtm_ATOM6_7_TOUT221_P25_15_OUT.

Definition at line 923 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_7_TOUT244_P15_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_7_TOUT244_P15_12_OUT

IfxGtm_ATOM6_7_TOUT244_P15_12_OUT.

Definition at line 924 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM6_7_TOUT264_P13_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_7_TOUT264_P13_15_OUT

IfxGtm_ATOM6_7_TOUT264_P13_15_OUT.

Definition at line 925 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_0_TOUT149_P34_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_0_TOUT149_P34_4_OUT

IfxGtm_ATOM7_0_TOUT149_P34_4_OUT.

Definition at line 926 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_0_TOUT162_P01_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_0_TOUT162_P01_8_OUT

IfxGtm_ATOM7_0_TOUT162_P01_8_OUT.

Definition at line 927 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_0_TOUT190_P30_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_0_TOUT190_P30_0_OUT

IfxGtm_ATOM7_0_TOUT190_P30_0_OUT.

Definition at line 928 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_0_TOUT222_P24_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_0_TOUT222_P24_0_OUT

IfxGtm_ATOM7_0_TOUT222_P24_0_OUT.

Definition at line 929 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_0_TOUT249_P13_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_0_TOUT249_P13_12_OUT

IfxGtm_ATOM7_0_TOUT249_P13_12_OUT.

Definition at line 930 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_0_TOUT258_P14_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_0_TOUT258_P14_11_OUT

IfxGtm_ATOM7_0_TOUT258_P14_11_OUT.

Definition at line 931 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_1_TOUT150_P34_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT150_P34_5_OUT

IfxGtm_ATOM7_1_TOUT150_P34_5_OUT.

Definition at line 932 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_1_TOUT163_P01_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT163_P01_10_OUT

IfxGtm_ATOM7_1_TOUT163_P01_10_OUT.

Definition at line 933 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_1_TOUT191_P30_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT191_P30_1_OUT

IfxGtm_ATOM7_1_TOUT191_P30_1_OUT.

Definition at line 934 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_1_TOUT223_P24_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT223_P24_1_OUT

IfxGtm_ATOM7_1_TOUT223_P24_1_OUT.

Definition at line 935 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_1_TOUT242_P15_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT242_P15_10_OUT

IfxGtm_ATOM7_1_TOUT242_P15_10_OUT.

Definition at line 936 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_1_TOUT245_P15_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT245_P15_13_OUT

IfxGtm_ATOM7_1_TOUT245_P15_13_OUT.

Definition at line 937 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_1_TOUT253_P13_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT253_P13_4_OUT

IfxGtm_ATOM7_1_TOUT253_P13_4_OUT.

Definition at line 938 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_1_TOUT265_P10_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT265_P10_9_OUT

IfxGtm_ATOM7_1_TOUT265_P10_9_OUT.

Definition at line 939 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_2_TOUT164_P01_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_2_TOUT164_P01_14_OUT

IfxGtm_ATOM7_2_TOUT164_P01_14_OUT.

Definition at line 940 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_2_TOUT192_P30_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_2_TOUT192_P30_2_OUT

IfxGtm_ATOM7_2_TOUT192_P30_2_OUT.

Definition at line 941 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_2_TOUT224_P24_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_2_TOUT224_P24_2_OUT

IfxGtm_ATOM7_2_TOUT224_P24_2_OUT.

Definition at line 942 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_2_TOUT243_P15_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_2_TOUT243_P15_11_OUT

IfxGtm_ATOM7_2_TOUT243_P15_11_OUT.

Definition at line 943 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_2_TOUT246_P15_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_2_TOUT246_P15_14_OUT

IfxGtm_ATOM7_2_TOUT246_P15_14_OUT.

Definition at line 944 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_2_TOUT254_P13_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_2_TOUT254_P13_5_OUT

IfxGtm_ATOM7_2_TOUT254_P13_5_OUT.

Definition at line 945 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_2_TOUT266_P10_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_2_TOUT266_P10_10_OUT

IfxGtm_ATOM7_2_TOUT266_P10_10_OUT.

Definition at line 946 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_3_TOUT166_P00_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_3_TOUT166_P00_14_OUT

IfxGtm_ATOM7_3_TOUT166_P00_14_OUT.

Definition at line 947 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_3_TOUT193_P30_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_3_TOUT193_P30_3_OUT

IfxGtm_ATOM7_3_TOUT193_P30_3_OUT.

Definition at line 948 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_3_TOUT225_P24_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_3_TOUT225_P24_3_OUT

IfxGtm_ATOM7_3_TOUT225_P24_3_OUT.

Definition at line 949 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_3_TOUT244_P15_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_3_TOUT244_P15_12_OUT

IfxGtm_ATOM7_3_TOUT244_P15_12_OUT.

Definition at line 950 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_3_TOUT247_P15_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_3_TOUT247_P15_15_OUT

IfxGtm_ATOM7_3_TOUT247_P15_15_OUT.

Definition at line 951 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_3_TOUT255_P13_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_3_TOUT255_P13_6_OUT

IfxGtm_ATOM7_3_TOUT255_P13_6_OUT.

Definition at line 952 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_3_TOUT267_P10_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_3_TOUT267_P10_14_OUT

IfxGtm_ATOM7_3_TOUT267_P10_14_OUT.

Definition at line 953 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_4_TOUT167_P00_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_4_TOUT167_P00_13_OUT

IfxGtm_ATOM7_4_TOUT167_P00_13_OUT.

Definition at line 954 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_4_TOUT194_P30_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_4_TOUT194_P30_4_OUT

IfxGtm_ATOM7_4_TOUT194_P30_4_OUT.

Definition at line 955 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_4_TOUT226_P24_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_4_TOUT226_P24_4_OUT

IfxGtm_ATOM7_4_TOUT226_P24_4_OUT.

Definition at line 956 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_4_TOUT245_P15_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_4_TOUT245_P15_13_OUT

IfxGtm_ATOM7_4_TOUT245_P15_13_OUT.

Definition at line 957 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_4_TOUT248_P13_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_4_TOUT248_P13_9_OUT

IfxGtm_ATOM7_4_TOUT248_P13_9_OUT.

Definition at line 958 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_4_TOUT268_P10_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_4_TOUT268_P10_13_OUT

IfxGtm_ATOM7_4_TOUT268_P10_13_OUT.

Definition at line 959 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_5_TOUT168_P00_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_5_TOUT168_P00_15_OUT

IfxGtm_ATOM7_5_TOUT168_P00_15_OUT.

Definition at line 960 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_5_TOUT195_P30_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_5_TOUT195_P30_5_OUT

IfxGtm_ATOM7_5_TOUT195_P30_5_OUT.

Definition at line 961 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_5_TOUT227_P24_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_5_TOUT227_P24_5_OUT

IfxGtm_ATOM7_5_TOUT227_P24_5_OUT.

Definition at line 962 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_5_TOUT246_P15_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_5_TOUT246_P15_14_OUT

IfxGtm_ATOM7_5_TOUT246_P15_14_OUT.

Definition at line 963 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_5_TOUT251_P13_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_5_TOUT251_P13_10_OUT

IfxGtm_ATOM7_5_TOUT251_P13_10_OUT.

Definition at line 964 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_5_TOUT269_P10_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_5_TOUT269_P10_11_OUT

IfxGtm_ATOM7_5_TOUT269_P10_11_OUT.

Definition at line 965 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_6_TOUT151_P02_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_6_TOUT151_P02_12_OUT

IfxGtm_ATOM7_6_TOUT151_P02_12_OUT.

Definition at line 966 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_6_TOUT153_P02_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_6_TOUT153_P02_13_OUT

IfxGtm_ATOM7_6_TOUT153_P02_13_OUT.

Definition at line 967 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_6_TOUT196_P30_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_6_TOUT196_P30_6_OUT

IfxGtm_ATOM7_6_TOUT196_P30_6_OUT.

Definition at line 968 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_6_TOUT228_P24_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_6_TOUT228_P24_6_OUT

IfxGtm_ATOM7_6_TOUT228_P24_6_OUT.

Definition at line 969 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_6_TOUT247_P15_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_6_TOUT247_P15_15_OUT

IfxGtm_ATOM7_6_TOUT247_P15_15_OUT.

Definition at line 970 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_6_TOUT249_P13_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_6_TOUT249_P13_12_OUT

IfxGtm_ATOM7_6_TOUT249_P13_12_OUT.

Definition at line 971 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_6_TOUT270_P10_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_6_TOUT270_P10_15_OUT

IfxGtm_ATOM7_6_TOUT270_P10_15_OUT.

Definition at line 972 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_7_TOUT152_P02_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_7_TOUT152_P02_15_OUT

IfxGtm_ATOM7_7_TOUT152_P02_15_OUT.

Definition at line 973 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_7_TOUT154_P02_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_7_TOUT154_P02_14_OUT

IfxGtm_ATOM7_7_TOUT154_P02_14_OUT.

Definition at line 974 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_7_TOUT161_P01_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_7_TOUT161_P01_13_OUT

IfxGtm_ATOM7_7_TOUT161_P01_13_OUT.

Definition at line 975 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_7_TOUT197_P30_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_7_TOUT197_P30_7_OUT

IfxGtm_ATOM7_7_TOUT197_P30_7_OUT.

Definition at line 976 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_7_TOUT229_P24_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_7_TOUT229_P24_7_OUT

IfxGtm_ATOM7_7_TOUT229_P24_7_OUT.

Definition at line 977 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_7_TOUT248_P13_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_7_TOUT248_P13_9_OUT

IfxGtm_ATOM7_7_TOUT248_P13_9_OUT.

Definition at line 978 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM7_7_TOUT261_P14_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_7_TOUT261_P14_12_OUT

IfxGtm_ATOM7_7_TOUT261_P14_12_OUT.

Definition at line 979 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM8_0_TOUT162_P01_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_0_TOUT162_P01_8_OUT

IfxGtm_ATOM8_0_TOUT162_P01_8_OUT.

Definition at line 980 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM8_0_TOUT198_P30_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_0_TOUT198_P30_8_OUT

IfxGtm_ATOM8_0_TOUT198_P30_8_OUT.

Definition at line 981 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM8_0_TOUT230_P24_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_0_TOUT230_P24_8_OUT

IfxGtm_ATOM8_0_TOUT230_P24_8_OUT.

Definition at line 982 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM8_0_TOUT242_P15_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_0_TOUT242_P15_10_OUT

IfxGtm_ATOM8_0_TOUT242_P15_10_OUT.

Definition at line 983 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM8_0_TOUT250_P13_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_0_TOUT250_P13_11_OUT

IfxGtm_ATOM8_0_TOUT250_P13_11_OUT.

Definition at line 984 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM8_1_TOUT163_P01_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_1_TOUT163_P01_10_OUT

IfxGtm_ATOM8_1_TOUT163_P01_10_OUT.

Definition at line 985 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM8_1_TOUT199_P30_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_1_TOUT199_P30_9_OUT

IfxGtm_ATOM8_1_TOUT199_P30_9_OUT.

Definition at line 986 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM8_1_TOUT231_P24_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_1_TOUT231_P24_9_OUT

IfxGtm_ATOM8_1_TOUT231_P24_9_OUT.

Definition at line 987 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM8_1_TOUT251_P13_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_1_TOUT251_P13_10_OUT

IfxGtm_ATOM8_1_TOUT251_P13_10_OUT.

Definition at line 988 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM8_1_TOUT258_P14_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_1_TOUT258_P14_11_OUT

IfxGtm_ATOM8_1_TOUT258_P14_11_OUT.

Definition at line 989 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM8_2_TOUT164_P01_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_2_TOUT164_P01_14_OUT

IfxGtm_ATOM8_2_TOUT164_P01_14_OUT.

Definition at line 990 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM8_2_TOUT200_P30_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_2_TOUT200_P30_10_OUT

IfxGtm_ATOM8_2_TOUT200_P30_10_OUT.

Definition at line 991 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM8_2_TOUT232_P24_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_2_TOUT232_P24_10_OUT

IfxGtm_ATOM8_2_TOUT232_P24_10_OUT.

Definition at line 992 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM8_2_TOUT252_P13_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_2_TOUT252_P13_14_OUT

IfxGtm_ATOM8_2_TOUT252_P13_14_OUT.

Definition at line 993 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM8_2_TOUT259_P14_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_2_TOUT259_P14_14_OUT

IfxGtm_ATOM8_2_TOUT259_P14_14_OUT.

Definition at line 994 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM8_3_TOUT166_P00_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_3_TOUT166_P00_14_OUT

IfxGtm_ATOM8_3_TOUT166_P00_14_OUT.

Definition at line 995 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM8_3_TOUT201_P30_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_3_TOUT201_P30_11_OUT

IfxGtm_ATOM8_3_TOUT201_P30_11_OUT.

Definition at line 996 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM8_3_TOUT233_P24_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_3_TOUT233_P24_11_OUT

IfxGtm_ATOM8_3_TOUT233_P24_11_OUT.

Definition at line 997 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM8_3_TOUT253_P13_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_3_TOUT253_P13_4_OUT

IfxGtm_ATOM8_3_TOUT253_P13_4_OUT.

Definition at line 998 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM8_3_TOUT260_P14_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_3_TOUT260_P14_13_OUT

IfxGtm_ATOM8_3_TOUT260_P14_13_OUT.

Definition at line 999 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM8_4_TOUT167_P00_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_4_TOUT167_P00_13_OUT

IfxGtm_ATOM8_4_TOUT167_P00_13_OUT.

Definition at line 1000 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM8_4_TOUT202_P30_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_4_TOUT202_P30_12_OUT

IfxGtm_ATOM8_4_TOUT202_P30_12_OUT.

Definition at line 1001 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM8_4_TOUT234_P24_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_4_TOUT234_P24_12_OUT

IfxGtm_ATOM8_4_TOUT234_P24_12_OUT.

Definition at line 1002 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM8_4_TOUT254_P13_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_4_TOUT254_P13_5_OUT

IfxGtm_ATOM8_4_TOUT254_P13_5_OUT.

Definition at line 1003 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM8_4_TOUT261_P14_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_4_TOUT261_P14_12_OUT

IfxGtm_ATOM8_4_TOUT261_P14_12_OUT.

Definition at line 1004 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM8_5_TOUT168_P00_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_5_TOUT168_P00_15_OUT

IfxGtm_ATOM8_5_TOUT168_P00_15_OUT.

Definition at line 1005 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM8_5_TOUT203_P30_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_5_TOUT203_P30_13_OUT

IfxGtm_ATOM8_5_TOUT203_P30_13_OUT.

Definition at line 1006 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM8_5_TOUT235_P24_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_5_TOUT235_P24_13_OUT

IfxGtm_ATOM8_5_TOUT235_P24_13_OUT.

Definition at line 1007 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM8_5_TOUT243_P15_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_5_TOUT243_P15_11_OUT

IfxGtm_ATOM8_5_TOUT243_P15_11_OUT.

Definition at line 1008 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM8_5_TOUT255_P13_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_5_TOUT255_P13_6_OUT

IfxGtm_ATOM8_5_TOUT255_P13_6_OUT.

Definition at line 1009 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM8_5_TOUT262_P13_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_5_TOUT262_P13_13_OUT

IfxGtm_ATOM8_5_TOUT262_P13_13_OUT.

Definition at line 1010 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM8_6_TOUT151_P02_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_6_TOUT151_P02_12_OUT

IfxGtm_ATOM8_6_TOUT151_P02_12_OUT.

Definition at line 1011 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM8_6_TOUT153_P02_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_6_TOUT153_P02_13_OUT

IfxGtm_ATOM8_6_TOUT153_P02_13_OUT.

Definition at line 1012 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM8_6_TOUT204_P30_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_6_TOUT204_P30_14_OUT

IfxGtm_ATOM8_6_TOUT204_P30_14_OUT.

Definition at line 1013 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM8_6_TOUT236_P24_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_6_TOUT236_P24_14_OUT

IfxGtm_ATOM8_6_TOUT236_P24_14_OUT.

Definition at line 1014 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM8_6_TOUT256_P13_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_6_TOUT256_P13_7_OUT

IfxGtm_ATOM8_6_TOUT256_P13_7_OUT.

Definition at line 1015 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM8_6_TOUT263_P14_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_6_TOUT263_P14_15_OUT

IfxGtm_ATOM8_6_TOUT263_P14_15_OUT.

Definition at line 1016 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM8_7_TOUT152_P02_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_7_TOUT152_P02_15_OUT

IfxGtm_ATOM8_7_TOUT152_P02_15_OUT.

Definition at line 1017 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM8_7_TOUT154_P02_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_7_TOUT154_P02_14_OUT

IfxGtm_ATOM8_7_TOUT154_P02_14_OUT.

Definition at line 1018 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM8_7_TOUT161_P01_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_7_TOUT161_P01_13_OUT

IfxGtm_ATOM8_7_TOUT161_P01_13_OUT.

Definition at line 1019 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM8_7_TOUT205_P30_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_7_TOUT205_P30_15_OUT

IfxGtm_ATOM8_7_TOUT205_P30_15_OUT.

Definition at line 1020 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM8_7_TOUT237_P24_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_7_TOUT237_P24_15_OUT

IfxGtm_ATOM8_7_TOUT237_P24_15_OUT.

Definition at line 1021 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM8_7_TOUT244_P15_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_7_TOUT244_P15_12_OUT

IfxGtm_ATOM8_7_TOUT244_P15_12_OUT.

Definition at line 1022 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM8_7_TOUT264_P13_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_7_TOUT264_P13_15_OUT

IfxGtm_ATOM8_7_TOUT264_P13_15_OUT.

Definition at line 1023 of file IfxGtm_PinMap.h.

◆ IfxGtm_CLK0_P23_1_OUT

IFX_EXTERN IfxGtm_Clk_Out IfxGtm_CLK0_P23_1_OUT

CGM generated clock.

Definition at line 1024 of file IfxGtm_PinMap.h.

◆ IfxGtm_CLK1_P32_4_OUT

IFX_EXTERN IfxGtm_Clk_Out IfxGtm_CLK1_P32_4_OUT

CGM generated clock.

Definition at line 1025 of file IfxGtm_PinMap.h.

◆ IfxGtm_CLK2_P11_12_OUT

IFX_EXTERN IfxGtm_Clk_Out IfxGtm_CLK2_P11_12_OUT

CGM generated clock.

Definition at line 1026 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_0_P00_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P00_9_IN

IfxGtm_TIM0_0_P00_9_IN.

Definition at line 1027 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_0_P02_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P02_0_IN

IfxGtm_TIM0_0_P02_0_IN.

Definition at line 1028 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_0_P10_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P10_7_IN

IfxGtm_TIM0_0_P10_7_IN.

Definition at line 1029 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_0_P13_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P13_12_IN

IfxGtm_TIM0_0_P13_12_IN.

Definition at line 1030 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_0_P14_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P14_5_IN

IfxGtm_TIM0_0_P14_5_IN.

Definition at line 1031 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_0_P14_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P14_7_IN

IfxGtm_TIM0_0_P14_7_IN.

Definition at line 1032 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_0_P15_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P15_6_IN

IfxGtm_TIM0_0_P15_6_IN.

Definition at line 1033 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_0_P21_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P21_2_IN

IfxGtm_TIM0_0_P21_2_IN.

Definition at line 1034 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_0_P22_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P22_1_IN

IfxGtm_TIM0_0_P22_1_IN.

Definition at line 1035 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_0_P33_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P33_10_IN

IfxGtm_TIM0_0_P33_10_IN.

Definition at line 1036 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_0_P33_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P33_4_IN

IfxGtm_TIM0_0_P33_4_IN.

Definition at line 1037 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_1_P00_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P00_10_IN

IfxGtm_TIM0_1_P00_10_IN.

Definition at line 1038 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_1_P02_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P02_1_IN

IfxGtm_TIM0_1_P02_1_IN.

Definition at line 1039 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_1_P10_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P10_1_IN

IfxGtm_TIM0_1_P10_1_IN.

Definition at line 1040 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_1_P10_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P10_9_IN

IfxGtm_TIM0_1_P10_9_IN.

Definition at line 1041 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_1_P14_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P14_6_IN

IfxGtm_TIM0_1_P14_6_IN.

Definition at line 1042 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_1_P15_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P15_7_IN

IfxGtm_TIM0_1_P15_7_IN.

Definition at line 1043 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_1_P21_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P21_3_IN

IfxGtm_TIM0_1_P21_3_IN.

Definition at line 1044 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_1_P22_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P22_0_IN

IfxGtm_TIM0_1_P22_0_IN.

Definition at line 1045 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_1_P33_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P33_5_IN

IfxGtm_TIM0_1_P33_5_IN.

Definition at line 1046 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_1_P33_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P33_9_IN

IfxGtm_TIM0_1_P33_9_IN.

Definition at line 1047 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_2_P00_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P00_11_IN

IfxGtm_TIM0_2_P00_11_IN.

Definition at line 1048 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_2_P02_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P02_2_IN

IfxGtm_TIM0_2_P02_2_IN.

Definition at line 1049 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_2_P02_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P02_9_IN

IfxGtm_TIM0_2_P02_9_IN.

Definition at line 1050 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_2_P10_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P10_10_IN

IfxGtm_TIM0_2_P10_10_IN.

Definition at line 1051 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_2_P10_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P10_2_IN

IfxGtm_TIM0_2_P10_2_IN.

Definition at line 1052 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_2_P10_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P10_5_IN

IfxGtm_TIM0_2_P10_5_IN.

Definition at line 1053 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_2_P15_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P15_8_IN

IfxGtm_TIM0_2_P15_8_IN.

Definition at line 1054 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_2_P21_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P21_4_IN

IfxGtm_TIM0_2_P21_4_IN.

Definition at line 1055 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_2_P23_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P23_5_IN

IfxGtm_TIM0_2_P23_5_IN.

Definition at line 1056 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_2_P33_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P33_11_IN

IfxGtm_TIM0_2_P33_11_IN.

Definition at line 1057 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_2_P33_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P33_6_IN

IfxGtm_TIM0_2_P33_6_IN.

Definition at line 1058 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_3_P00_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P00_12_IN

IfxGtm_TIM0_3_P00_12_IN.

Definition at line 1059 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_3_P02_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P02_10_IN

IfxGtm_TIM0_3_P02_10_IN.

Definition at line 1060 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_3_P02_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P02_3_IN

IfxGtm_TIM0_3_P02_3_IN.

Definition at line 1061 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_3_P10_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P10_14_IN

IfxGtm_TIM0_3_P10_14_IN.

Definition at line 1062 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_3_P10_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P10_3_IN

IfxGtm_TIM0_3_P10_3_IN.

Definition at line 1063 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_3_P10_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P10_6_IN

IfxGtm_TIM0_3_P10_6_IN.

Definition at line 1064 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_3_P14_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P14_0_IN

IfxGtm_TIM0_3_P14_0_IN.

Definition at line 1065 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_3_P21_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P21_5_IN

IfxGtm_TIM0_3_P21_5_IN.

Definition at line 1066 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_3_P22_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P22_2_IN

IfxGtm_TIM0_3_P22_2_IN.

Definition at line 1067 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_3_P32_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P32_2_IN

IfxGtm_TIM0_3_P32_2_IN.

Definition at line 1068 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_3_P33_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P33_7_IN

IfxGtm_TIM0_3_P33_7_IN.

Definition at line 1069 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_4_P02_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P02_4_IN

IfxGtm_TIM0_4_P02_4_IN.

Definition at line 1070 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_4_P10_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P10_0_IN

IfxGtm_TIM0_4_P10_0_IN.

Definition at line 1071 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_4_P10_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P10_13_IN

IfxGtm_TIM0_4_P10_13_IN.

Definition at line 1072 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_4_P14_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P14_1_IN

IfxGtm_TIM0_4_P14_1_IN.

Definition at line 1073 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_4_P21_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P21_6_IN

IfxGtm_TIM0_4_P21_6_IN.

Definition at line 1074 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_4_P22_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P22_3_IN

IfxGtm_TIM0_4_P22_3_IN.

Definition at line 1075 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_4_P32_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P32_3_IN

IfxGtm_TIM0_4_P32_3_IN.

Definition at line 1076 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_4_P33_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P33_0_IN

IfxGtm_TIM0_4_P33_0_IN.

Definition at line 1077 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_4_P33_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P33_8_IN

IfxGtm_TIM0_4_P33_8_IN.

Definition at line 1078 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_5_P01_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P01_3_IN

IfxGtm_TIM0_5_P01_3_IN.

Definition at line 1079 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_5_P02_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P02_5_IN

IfxGtm_TIM0_5_P02_5_IN.

Definition at line 1080 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_5_P10_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P10_11_IN

IfxGtm_TIM0_5_P10_11_IN.

Definition at line 1081 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_5_P10_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P10_8_IN

IfxGtm_TIM0_5_P10_8_IN.

Definition at line 1082 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_5_P14_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P14_2_IN

IfxGtm_TIM0_5_P14_2_IN.

Definition at line 1083 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_5_P21_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P21_7_IN

IfxGtm_TIM0_5_P21_7_IN.

Definition at line 1084 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_5_P23_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P23_0_IN

IfxGtm_TIM0_5_P23_0_IN.

Definition at line 1085 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_5_P32_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P32_4_IN

IfxGtm_TIM0_5_P32_4_IN.

Definition at line 1086 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_5_P33_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P33_1_IN

IfxGtm_TIM0_5_P33_1_IN.

Definition at line 1087 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_6_P01_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P01_4_IN

IfxGtm_TIM0_6_P01_4_IN.

Definition at line 1088 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_6_P02_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P02_6_IN

IfxGtm_TIM0_6_P02_6_IN.

Definition at line 1089 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_6_P10_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P10_15_IN

IfxGtm_TIM0_6_P10_15_IN.

Definition at line 1090 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_6_P10_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P10_4_IN

IfxGtm_TIM0_6_P10_4_IN.

Definition at line 1091 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_6_P14_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P14_3_IN

IfxGtm_TIM0_6_P14_3_IN.

Definition at line 1092 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_6_P20_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P20_0_IN

IfxGtm_TIM0_6_P20_0_IN.

Definition at line 1093 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_6_P23_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P23_1_IN

IfxGtm_TIM0_6_P23_1_IN.

Definition at line 1094 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_6_P23_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P23_2_IN

IfxGtm_TIM0_6_P23_2_IN.

Definition at line 1095 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_6_P33_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P33_2_IN

IfxGtm_TIM0_6_P33_2_IN.

Definition at line 1096 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_7_P02_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P02_11_IN

IfxGtm_TIM0_7_P02_11_IN.

Definition at line 1097 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_7_P02_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P02_7_IN

IfxGtm_TIM0_7_P02_7_IN.

Definition at line 1098 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_7_P11_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P11_15_IN

IfxGtm_TIM0_7_P11_15_IN.

Definition at line 1099 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_7_P14_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P14_4_IN

IfxGtm_TIM0_7_P14_4_IN.

Definition at line 1100 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_7_P20_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P20_8_IN

IfxGtm_TIM0_7_P20_8_IN.

Definition at line 1101 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_7_P23_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P23_3_IN

IfxGtm_TIM0_7_P23_3_IN.

Definition at line 1102 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_7_P23_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P23_4_IN

IfxGtm_TIM0_7_P23_4_IN.

Definition at line 1103 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_7_P33_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P33_3_IN

IfxGtm_TIM0_7_P33_3_IN.

Definition at line 1104 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_0_P00_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P00_9_IN

IfxGtm_TIM1_0_P00_9_IN.

Definition at line 1105 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_0_P02_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P02_0_IN

IfxGtm_TIM1_0_P02_0_IN.

Definition at line 1106 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_0_P10_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P10_7_IN

IfxGtm_TIM1_0_P10_7_IN.

Definition at line 1107 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_0_P14_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P14_5_IN

IfxGtm_TIM1_0_P14_5_IN.

Definition at line 1108 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_0_P14_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P14_7_IN

IfxGtm_TIM1_0_P14_7_IN.

Definition at line 1109 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_0_P15_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P15_6_IN

IfxGtm_TIM1_0_P15_6_IN.

Definition at line 1110 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_0_P21_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P21_2_IN

IfxGtm_TIM1_0_P21_2_IN.

Definition at line 1111 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_0_P22_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P22_1_IN

IfxGtm_TIM1_0_P22_1_IN.

Definition at line 1112 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_0_P33_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P33_10_IN

IfxGtm_TIM1_0_P33_10_IN.

Definition at line 1113 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_0_P33_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P33_4_IN

IfxGtm_TIM1_0_P33_4_IN.

Definition at line 1114 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_1_P00_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P00_10_IN

IfxGtm_TIM1_1_P00_10_IN.

Definition at line 1115 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_1_P02_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P02_1_IN

IfxGtm_TIM1_1_P02_1_IN.

Definition at line 1116 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_1_P10_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P10_1_IN

IfxGtm_TIM1_1_P10_1_IN.

Definition at line 1117 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_1_P14_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P14_6_IN

IfxGtm_TIM1_1_P14_6_IN.

Definition at line 1118 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_1_P15_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P15_7_IN

IfxGtm_TIM1_1_P15_7_IN.

Definition at line 1119 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_1_P21_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P21_3_IN

IfxGtm_TIM1_1_P21_3_IN.

Definition at line 1120 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_1_P22_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P22_0_IN

IfxGtm_TIM1_1_P22_0_IN.

Definition at line 1121 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_1_P33_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P33_5_IN

IfxGtm_TIM1_1_P33_5_IN.

Definition at line 1122 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_1_P33_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P33_9_IN

IfxGtm_TIM1_1_P33_9_IN.

Definition at line 1123 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_2_P00_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P00_11_IN

IfxGtm_TIM1_2_P00_11_IN.

Definition at line 1124 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_2_P02_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P02_2_IN

IfxGtm_TIM1_2_P02_2_IN.

Definition at line 1125 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_2_P10_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P10_2_IN

IfxGtm_TIM1_2_P10_2_IN.

Definition at line 1126 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_2_P10_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P10_5_IN

IfxGtm_TIM1_2_P10_5_IN.

Definition at line 1127 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_2_P15_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P15_8_IN

IfxGtm_TIM1_2_P15_8_IN.

Definition at line 1128 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_2_P21_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P21_4_IN

IfxGtm_TIM1_2_P21_4_IN.

Definition at line 1129 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_2_P23_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P23_5_IN

IfxGtm_TIM1_2_P23_5_IN.

Definition at line 1130 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_2_P23_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P23_6_IN

IfxGtm_TIM1_2_P23_6_IN.

Definition at line 1131 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_2_P33_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P33_11_IN

IfxGtm_TIM1_2_P33_11_IN.

Definition at line 1132 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_2_P33_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P33_6_IN

IfxGtm_TIM1_2_P33_6_IN.

Definition at line 1133 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_3_P00_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P00_12_IN

IfxGtm_TIM1_3_P00_12_IN.

Definition at line 1134 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_3_P02_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P02_3_IN

IfxGtm_TIM1_3_P02_3_IN.

Definition at line 1135 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_3_P10_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P10_3_IN

IfxGtm_TIM1_3_P10_3_IN.

Definition at line 1136 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_3_P10_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P10_6_IN

IfxGtm_TIM1_3_P10_6_IN.

Definition at line 1137 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_3_P14_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P14_0_IN

IfxGtm_TIM1_3_P14_0_IN.

Definition at line 1138 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_3_P21_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P21_5_IN

IfxGtm_TIM1_3_P21_5_IN.

Definition at line 1139 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_3_P22_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P22_2_IN

IfxGtm_TIM1_3_P22_2_IN.

Definition at line 1140 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_3_P23_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P23_7_IN

IfxGtm_TIM1_3_P23_7_IN.

Definition at line 1141 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_3_P32_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P32_2_IN

IfxGtm_TIM1_3_P32_2_IN.

Definition at line 1142 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_3_P33_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P33_7_IN

IfxGtm_TIM1_3_P33_7_IN.

Definition at line 1143 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_4_P02_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P02_4_IN

IfxGtm_TIM1_4_P02_4_IN.

Definition at line 1144 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_4_P10_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P10_0_IN

IfxGtm_TIM1_4_P10_0_IN.

Definition at line 1145 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_4_P14_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P14_1_IN

IfxGtm_TIM1_4_P14_1_IN.

Definition at line 1146 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_4_P20_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P20_0_IN

IfxGtm_TIM1_4_P20_0_IN.

Definition at line 1147 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_4_P21_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P21_6_IN

IfxGtm_TIM1_4_P21_6_IN.

Definition at line 1148 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_4_P22_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P22_3_IN

IfxGtm_TIM1_4_P22_3_IN.

Definition at line 1149 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_4_P32_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P32_3_IN

IfxGtm_TIM1_4_P32_3_IN.

Definition at line 1150 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_4_P33_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P33_0_IN

IfxGtm_TIM1_4_P33_0_IN.

Definition at line 1151 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_4_P33_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P33_8_IN

IfxGtm_TIM1_4_P33_8_IN.

Definition at line 1152 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_5_P02_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P02_5_IN

IfxGtm_TIM1_5_P02_5_IN.

Definition at line 1153 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_5_P10_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P10_8_IN

IfxGtm_TIM1_5_P10_8_IN.

Definition at line 1154 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_5_P14_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P14_2_IN

IfxGtm_TIM1_5_P14_2_IN.

Definition at line 1155 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_5_P20_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P20_7_IN

IfxGtm_TIM1_5_P20_7_IN.

Definition at line 1156 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_5_P21_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P21_7_IN

IfxGtm_TIM1_5_P21_7_IN.

Definition at line 1157 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_5_P23_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P23_0_IN

IfxGtm_TIM1_5_P23_0_IN.

Definition at line 1158 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_5_P32_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P32_4_IN

IfxGtm_TIM1_5_P32_4_IN.

Definition at line 1159 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_5_P33_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P33_1_IN

IfxGtm_TIM1_5_P33_1_IN.

Definition at line 1160 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_6_P02_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_P02_6_IN

IfxGtm_TIM1_6_P02_6_IN.

Definition at line 1161 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_6_P10_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_P10_4_IN

IfxGtm_TIM1_6_P10_4_IN.

Definition at line 1162 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_6_P14_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_P14_3_IN

IfxGtm_TIM1_6_P14_3_IN.

Definition at line 1163 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_6_P20_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_P20_0_IN

IfxGtm_TIM1_6_P20_0_IN.

Definition at line 1164 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_6_P23_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_P23_1_IN

IfxGtm_TIM1_6_P23_1_IN.

Definition at line 1165 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_6_P23_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_P23_2_IN

IfxGtm_TIM1_6_P23_2_IN.

Definition at line 1166 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_6_P33_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_P33_2_IN

IfxGtm_TIM1_6_P33_2_IN.

Definition at line 1167 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_7_P02_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_P02_7_IN

IfxGtm_TIM1_7_P02_7_IN.

Definition at line 1168 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_7_P14_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_P14_4_IN

IfxGtm_TIM1_7_P14_4_IN.

Definition at line 1169 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_7_P20_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_P20_8_IN

IfxGtm_TIM1_7_P20_8_IN.

Definition at line 1170 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_7_P23_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_P23_3_IN

IfxGtm_TIM1_7_P23_3_IN.

Definition at line 1171 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_7_P23_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_P23_4_IN

IfxGtm_TIM1_7_P23_4_IN.

Definition at line 1172 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_7_P33_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_P33_3_IN

IfxGtm_TIM1_7_P33_3_IN.

Definition at line 1173 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_0_P00_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P00_0_IN

IfxGtm_TIM2_0_P00_0_IN.

Definition at line 1174 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_0_P01_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P01_3_IN

IfxGtm_TIM2_0_P01_3_IN.

Definition at line 1175 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_0_P02_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P02_8_IN

IfxGtm_TIM2_0_P02_8_IN.

Definition at line 1176 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_0_P11_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P11_0_IN

IfxGtm_TIM2_0_P11_0_IN.

Definition at line 1177 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_0_P11_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P11_10_IN

IfxGtm_TIM2_0_P11_10_IN.

Definition at line 1178 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_0_P13_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P13_3_IN

IfxGtm_TIM2_0_P13_3_IN.

Definition at line 1179 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_0_P15_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P15_5_IN

IfxGtm_TIM2_0_P15_5_IN.

Definition at line 1180 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_0_P20_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P20_12_IN

IfxGtm_TIM2_0_P20_12_IN.

Definition at line 1181 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_0_P31_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P31_0_IN

IfxGtm_TIM2_0_P31_0_IN.

Definition at line 1182 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_0_P33_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P33_12_IN

IfxGtm_TIM2_0_P33_12_IN.

Definition at line 1183 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_0_P33_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P33_14_IN

IfxGtm_TIM2_0_P33_14_IN.

Definition at line 1184 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_1_P00_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P00_1_IN

IfxGtm_TIM2_1_P00_1_IN.

Definition at line 1185 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_1_P00_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P00_2_IN

IfxGtm_TIM2_1_P00_2_IN.

Definition at line 1186 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_1_P01_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P01_4_IN

IfxGtm_TIM2_1_P01_4_IN.

Definition at line 1187 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_1_P11_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P11_1_IN

IfxGtm_TIM2_1_P11_1_IN.

Definition at line 1188 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_1_P11_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P11_2_IN

IfxGtm_TIM2_1_P11_2_IN.

Definition at line 1189 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_1_P15_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P15_10_IN

IfxGtm_TIM2_1_P15_10_IN.

Definition at line 1190 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_1_P20_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P20_13_IN

IfxGtm_TIM2_1_P20_13_IN.

Definition at line 1191 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_1_P31_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P31_1_IN

IfxGtm_TIM2_1_P31_1_IN.

Definition at line 1192 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_1_P33_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P33_13_IN

IfxGtm_TIM2_1_P33_13_IN.

Definition at line 1193 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_1_P33_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P33_15_IN

IfxGtm_TIM2_1_P33_15_IN.

Definition at line 1194 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_2_P00_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P00_3_IN

IfxGtm_TIM2_2_P00_3_IN.

Definition at line 1195 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_2_P01_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P01_5_IN

IfxGtm_TIM2_2_P01_5_IN.

Definition at line 1196 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_2_P11_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P11_3_IN

IfxGtm_TIM2_2_P11_3_IN.

Definition at line 1197 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_2_P11_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P11_4_IN

IfxGtm_TIM2_2_P11_4_IN.

Definition at line 1198 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_2_P14_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P14_8_IN

IfxGtm_TIM2_2_P14_8_IN.

Definition at line 1199 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_2_P15_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P15_11_IN

IfxGtm_TIM2_2_P15_11_IN.

Definition at line 1200 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_2_P15_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P15_6_IN

IfxGtm_TIM2_2_P15_6_IN.

Definition at line 1201 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_2_P20_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P20_14_IN

IfxGtm_TIM2_2_P20_14_IN.

Definition at line 1202 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_2_P31_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P31_2_IN

IfxGtm_TIM2_2_P31_2_IN.

Definition at line 1203 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_2_P32_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P32_0_IN

IfxGtm_TIM2_2_P32_0_IN.

Definition at line 1204 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_3_P00_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P00_4_IN

IfxGtm_TIM2_3_P00_4_IN.

Definition at line 1205 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_3_P01_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P01_5_IN

IfxGtm_TIM2_3_P01_5_IN.

Definition at line 1206 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_3_P11_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P11_5_IN

IfxGtm_TIM2_3_P11_5_IN.

Definition at line 1207 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_3_P11_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P11_6_IN

IfxGtm_TIM2_3_P11_6_IN.

Definition at line 1208 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_3_P14_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P14_9_IN

IfxGtm_TIM2_3_P14_9_IN.

Definition at line 1209 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_3_P15_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P15_0_IN

IfxGtm_TIM2_3_P15_0_IN.

Definition at line 1210 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_3_P15_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P15_12_IN

IfxGtm_TIM2_3_P15_12_IN.

Definition at line 1211 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_3_P20_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P20_1_IN

IfxGtm_TIM2_3_P20_1_IN.

Definition at line 1212 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_3_P31_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P31_3_IN

IfxGtm_TIM2_3_P31_3_IN.

Definition at line 1213 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_3_P34_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P34_1_IN

IfxGtm_TIM2_3_P34_1_IN.

Definition at line 1214 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_4_P00_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P00_5_IN

IfxGtm_TIM2_4_P00_5_IN.

Definition at line 1215 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_4_P02_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P02_14_IN

IfxGtm_TIM2_4_P02_14_IN.

Definition at line 1216 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_4_P11_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P11_7_IN

IfxGtm_TIM2_4_P11_7_IN.

Definition at line 1217 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_4_P11_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P11_9_IN

IfxGtm_TIM2_4_P11_9_IN.

Definition at line 1218 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_4_P14_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P14_10_IN

IfxGtm_TIM2_4_P14_10_IN.

Definition at line 1219 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_4_P15_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P15_13_IN

IfxGtm_TIM2_4_P15_13_IN.

Definition at line 1220 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_4_P15_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P15_1_IN

IfxGtm_TIM2_4_P15_1_IN.

Definition at line 1221 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_4_P20_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P20_3_IN

IfxGtm_TIM2_4_P20_3_IN.

Definition at line 1222 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_4_P21_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P21_0_IN

IfxGtm_TIM2_4_P21_0_IN.

Definition at line 1223 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_4_P31_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P31_4_IN

IfxGtm_TIM2_4_P31_4_IN.

Definition at line 1224 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_4_P34_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P34_2_IN

IfxGtm_TIM2_4_P34_2_IN.

Definition at line 1225 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_5_P00_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P00_6_IN

IfxGtm_TIM2_5_P00_6_IN.

Definition at line 1226 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_5_P01_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P01_6_IN

IfxGtm_TIM2_5_P01_6_IN.

Definition at line 1227 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_5_P02_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P02_15_IN

IfxGtm_TIM2_5_P02_15_IN.

Definition at line 1228 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_5_P11_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P11_10_IN

IfxGtm_TIM2_5_P11_10_IN.

Definition at line 1229 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_5_P11_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P11_8_IN

IfxGtm_TIM2_5_P11_8_IN.

Definition at line 1230 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_5_P13_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P13_0_IN

IfxGtm_TIM2_5_P13_0_IN.

Definition at line 1231 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_5_P15_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P15_14_IN

IfxGtm_TIM2_5_P15_14_IN.

Definition at line 1232 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_5_P15_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P15_2_IN

IfxGtm_TIM2_5_P15_2_IN.

Definition at line 1233 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_5_P20_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P20_9_IN

IfxGtm_TIM2_5_P20_9_IN.

Definition at line 1234 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_5_P21_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P21_1_IN

IfxGtm_TIM2_5_P21_1_IN.

Definition at line 1235 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_5_P31_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P31_5_IN

IfxGtm_TIM2_5_P31_5_IN.

Definition at line 1236 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_5_P34_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P34_3_IN

IfxGtm_TIM2_5_P34_3_IN.

Definition at line 1237 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_6_P00_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P00_7_IN

IfxGtm_TIM2_6_P00_7_IN.

Definition at line 1238 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_6_P01_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P01_0_IN

IfxGtm_TIM2_6_P01_0_IN.

Definition at line 1239 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_6_P11_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P11_11_IN

IfxGtm_TIM2_6_P11_11_IN.

Definition at line 1240 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_6_P11_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P11_13_IN

IfxGtm_TIM2_6_P11_13_IN.

Definition at line 1241 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_6_P13_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P13_1_IN

IfxGtm_TIM2_6_P13_1_IN.

Definition at line 1242 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_6_P15_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P15_15_IN

IfxGtm_TIM2_6_P15_15_IN.

Definition at line 1243 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_6_P15_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P15_3_IN

IfxGtm_TIM2_6_P15_3_IN.

Definition at line 1244 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_6_P20_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P20_10_IN

IfxGtm_TIM2_6_P20_10_IN.

Definition at line 1245 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_6_P20_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P20_6_IN

IfxGtm_TIM2_6_P20_6_IN.

Definition at line 1246 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_6_P22_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P22_6_IN

IfxGtm_TIM2_6_P22_6_IN.

Definition at line 1247 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_6_P31_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P31_6_IN

IfxGtm_TIM2_6_P31_6_IN.

Definition at line 1248 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_6_P34_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P34_4_IN

IfxGtm_TIM2_6_P34_4_IN.

Definition at line 1249 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_7_P00_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P00_8_IN

IfxGtm_TIM2_7_P00_8_IN.

Definition at line 1250 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_7_P01_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P01_7_IN

IfxGtm_TIM2_7_P01_7_IN.

Definition at line 1251 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_7_P11_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P11_12_IN

IfxGtm_TIM2_7_P11_12_IN.

Definition at line 1252 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_7_P11_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P11_14_IN

IfxGtm_TIM2_7_P11_14_IN.

Definition at line 1253 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_7_P13_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P13_2_IN

IfxGtm_TIM2_7_P13_2_IN.

Definition at line 1254 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_7_P13_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P13_9_IN

IfxGtm_TIM2_7_P13_9_IN.

Definition at line 1255 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_7_P15_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P15_4_IN

IfxGtm_TIM2_7_P15_4_IN.

Definition at line 1256 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_7_P20_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P20_11_IN

IfxGtm_TIM2_7_P20_11_IN.

Definition at line 1257 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_7_P20_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P20_7_IN

IfxGtm_TIM2_7_P20_7_IN.

Definition at line 1258 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_7_P31_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P31_7_IN

IfxGtm_TIM2_7_P31_7_IN.

Definition at line 1259 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_7_P34_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P34_5_IN

IfxGtm_TIM2_7_P34_5_IN.

Definition at line 1260 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_0_P00_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P00_0_IN

IfxGtm_TIM3_0_P00_0_IN.

Definition at line 1261 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_0_P00_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P00_5_IN

IfxGtm_TIM3_0_P00_5_IN.

Definition at line 1262 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_0_P02_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P02_6_IN

IfxGtm_TIM3_0_P02_6_IN.

Definition at line 1263 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_0_P02_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P02_8_IN

IfxGtm_TIM3_0_P02_8_IN.

Definition at line 1264 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_0_P11_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P11_11_IN

IfxGtm_TIM3_0_P11_11_IN.

Definition at line 1265 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_0_P12_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P12_0_IN

IfxGtm_TIM3_0_P12_0_IN.

Definition at line 1266 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_0_P13_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P13_11_IN

IfxGtm_TIM3_0_P13_11_IN.

Definition at line 1267 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_0_P13_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P13_3_IN

IfxGtm_TIM3_0_P13_3_IN.

Definition at line 1268 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_0_P15_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P15_5_IN

IfxGtm_TIM3_0_P15_5_IN.

Definition at line 1269 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_0_P20_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P20_12_IN

IfxGtm_TIM3_0_P20_12_IN.

Definition at line 1270 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_0_P22_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P22_4_IN

IfxGtm_TIM3_0_P22_4_IN.

Definition at line 1271 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_0_P25_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P25_0_IN

IfxGtm_TIM3_0_P25_0_IN.

Definition at line 1272 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_0_P33_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P33_0_IN

IfxGtm_TIM3_0_P33_0_IN.

Definition at line 1273 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_0_P33_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P33_12_IN

IfxGtm_TIM3_0_P33_12_IN.

Definition at line 1274 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_1_P00_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P00_1_IN

IfxGtm_TIM3_1_P00_1_IN.

Definition at line 1275 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_1_P00_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P00_2_IN

IfxGtm_TIM3_1_P00_2_IN.

Definition at line 1276 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_1_P00_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P00_6_IN

IfxGtm_TIM3_1_P00_6_IN.

Definition at line 1277 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_1_P02_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P02_7_IN

IfxGtm_TIM3_1_P02_7_IN.

Definition at line 1278 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_1_P11_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P11_2_IN

IfxGtm_TIM3_1_P11_2_IN.

Definition at line 1279 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_1_P12_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P12_1_IN

IfxGtm_TIM3_1_P12_1_IN.

Definition at line 1280 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_1_P13_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P13_10_IN

IfxGtm_TIM3_1_P13_10_IN.

Definition at line 1281 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_1_P14_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P14_11_IN

IfxGtm_TIM3_1_P14_11_IN.

Definition at line 1282 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_1_P20_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P20_13_IN

IfxGtm_TIM3_1_P20_13_IN.

Definition at line 1283 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_1_P22_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P22_5_IN

IfxGtm_TIM3_1_P22_5_IN.

Definition at line 1284 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_1_P25_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P25_1_IN

IfxGtm_TIM3_1_P25_1_IN.

Definition at line 1285 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_1_P33_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P33_13_IN

IfxGtm_TIM3_1_P33_13_IN.

Definition at line 1286 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_1_P33_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P33_1_IN

IfxGtm_TIM3_1_P33_1_IN.

Definition at line 1287 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_2_P00_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P00_3_IN

IfxGtm_TIM3_2_P00_3_IN.

Definition at line 1288 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_2_P00_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P00_7_IN

IfxGtm_TIM3_2_P00_7_IN.

Definition at line 1289 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_2_P02_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P02_8_IN

IfxGtm_TIM3_2_P02_8_IN.

Definition at line 1290 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_2_P11_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P11_3_IN

IfxGtm_TIM3_2_P11_3_IN.

Definition at line 1291 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_2_P13_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P13_14_IN

IfxGtm_TIM3_2_P13_14_IN.

Definition at line 1292 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_2_P14_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P14_14_IN

IfxGtm_TIM3_2_P14_14_IN.

Definition at line 1293 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_2_P14_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P14_8_IN

IfxGtm_TIM3_2_P14_8_IN.

Definition at line 1294 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_2_P20_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P20_14_IN

IfxGtm_TIM3_2_P20_14_IN.

Definition at line 1295 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_2_P22_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P22_6_IN

IfxGtm_TIM3_2_P22_6_IN.

Definition at line 1296 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_2_P25_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P25_2_IN

IfxGtm_TIM3_2_P25_2_IN.

Definition at line 1297 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_2_P32_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P32_0_IN

IfxGtm_TIM3_2_P32_0_IN.

Definition at line 1298 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_2_P33_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P33_2_IN

IfxGtm_TIM3_2_P33_2_IN.

Definition at line 1299 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_3_P00_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P00_4_IN

IfxGtm_TIM3_3_P00_4_IN.

Definition at line 1300 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_3_P00_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P00_8_IN

IfxGtm_TIM3_3_P00_8_IN.

Definition at line 1301 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_3_P02_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P02_9_IN

IfxGtm_TIM3_3_P02_9_IN.

Definition at line 1302 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_3_P11_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P11_6_IN

IfxGtm_TIM3_3_P11_6_IN.

Definition at line 1303 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_3_P13_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P13_4_IN

IfxGtm_TIM3_3_P13_4_IN.

Definition at line 1304 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_3_P14_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P14_13_IN

IfxGtm_TIM3_3_P14_13_IN.

Definition at line 1305 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_3_P14_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P14_9_IN

IfxGtm_TIM3_3_P14_9_IN.

Definition at line 1306 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_3_P15_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P15_0_IN

IfxGtm_TIM3_3_P15_0_IN.

Definition at line 1307 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_3_P20_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P20_1_IN

IfxGtm_TIM3_3_P20_1_IN.

Definition at line 1308 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_3_P22_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P22_7_IN

IfxGtm_TIM3_3_P22_7_IN.

Definition at line 1309 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_3_P25_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P25_3_IN

IfxGtm_TIM3_3_P25_3_IN.

Definition at line 1310 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_3_P32_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P32_1_IN

IfxGtm_TIM3_3_P32_1_IN.

Definition at line 1311 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_3_P33_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P33_3_IN

IfxGtm_TIM3_3_P33_3_IN.

Definition at line 1312 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_4_P00_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P00_5_IN

IfxGtm_TIM3_4_P00_5_IN.

Definition at line 1313 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_4_P02_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P02_10_IN

IfxGtm_TIM3_4_P02_10_IN.

Definition at line 1314 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_4_P11_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P11_9_IN

IfxGtm_TIM3_4_P11_9_IN.

Definition at line 1315 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_4_P13_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P13_5_IN

IfxGtm_TIM3_4_P13_5_IN.

Definition at line 1316 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_4_P14_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P14_10_IN

IfxGtm_TIM3_4_P14_10_IN.

Definition at line 1317 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_4_P14_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P14_12_IN

IfxGtm_TIM3_4_P14_12_IN.

Definition at line 1318 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_4_P15_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P15_1_IN

IfxGtm_TIM3_4_P15_1_IN.

Definition at line 1319 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_4_P20_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P20_3_IN

IfxGtm_TIM3_4_P20_3_IN.

Definition at line 1320 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_4_P21_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P21_0_IN

IfxGtm_TIM3_4_P21_0_IN.

Definition at line 1321 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_4_P22_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P22_8_IN

IfxGtm_TIM3_4_P22_8_IN.

Definition at line 1322 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_4_P25_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P25_4_IN

IfxGtm_TIM3_4_P25_4_IN.

Definition at line 1323 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_4_P34_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P34_1_IN

IfxGtm_TIM3_4_P34_1_IN.

Definition at line 1324 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_5_P00_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P00_6_IN

IfxGtm_TIM3_5_P00_6_IN.

Definition at line 1325 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_5_P02_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P02_11_IN

IfxGtm_TIM3_5_P02_11_IN.

Definition at line 1326 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_5_P11_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P11_10_IN

IfxGtm_TIM3_5_P11_10_IN.

Definition at line 1327 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_5_P13_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P13_0_IN

IfxGtm_TIM3_5_P13_0_IN.

Definition at line 1328 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_5_P13_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P13_13_IN

IfxGtm_TIM3_5_P13_13_IN.

Definition at line 1329 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_5_P13_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P13_6_IN

IfxGtm_TIM3_5_P13_6_IN.

Definition at line 1330 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_5_P15_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P15_2_IN

IfxGtm_TIM3_5_P15_2_IN.

Definition at line 1331 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_5_P20_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P20_9_IN

IfxGtm_TIM3_5_P20_9_IN.

Definition at line 1332 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_5_P21_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P21_1_IN

IfxGtm_TIM3_5_P21_1_IN.

Definition at line 1333 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_5_P22_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P22_9_IN

IfxGtm_TIM3_5_P22_9_IN.

Definition at line 1334 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_5_P25_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P25_5_IN

IfxGtm_TIM3_5_P25_5_IN.

Definition at line 1335 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_5_P32_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P32_5_IN

IfxGtm_TIM3_5_P32_5_IN.

Definition at line 1336 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_5_P34_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P34_2_IN

IfxGtm_TIM3_5_P34_2_IN.

Definition at line 1337 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_6_P00_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P00_7_IN

IfxGtm_TIM3_6_P00_7_IN.

Definition at line 1338 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_6_P02_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P02_12_IN

IfxGtm_TIM3_6_P02_12_IN.

Definition at line 1339 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_6_P11_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P11_11_IN

IfxGtm_TIM3_6_P11_11_IN.

Definition at line 1340 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_6_P13_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P13_1_IN

IfxGtm_TIM3_6_P13_1_IN.

Definition at line 1341 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_6_P13_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P13_7_IN

IfxGtm_TIM3_6_P13_7_IN.

Definition at line 1342 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_6_P14_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P14_15_IN

IfxGtm_TIM3_6_P14_15_IN.

Definition at line 1343 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_6_P15_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P15_3_IN

IfxGtm_TIM3_6_P15_3_IN.

Definition at line 1344 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_6_P20_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P20_10_IN

IfxGtm_TIM3_6_P20_10_IN.

Definition at line 1345 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_6_P20_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P20_6_IN

IfxGtm_TIM3_6_P20_6_IN.

Definition at line 1346 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_6_P22_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P22_10_IN

IfxGtm_TIM3_6_P22_10_IN.

Definition at line 1347 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_6_P25_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P25_6_IN

IfxGtm_TIM3_6_P25_6_IN.

Definition at line 1348 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_6_P26_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P26_0_IN

IfxGtm_TIM3_6_P26_0_IN.

Definition at line 1349 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_6_P32_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P32_6_IN

IfxGtm_TIM3_6_P32_6_IN.

Definition at line 1350 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_6_P34_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P34_3_IN

IfxGtm_TIM3_6_P34_3_IN.

Definition at line 1351 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_7_P00_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P00_8_IN

IfxGtm_TIM3_7_P00_8_IN.

Definition at line 1352 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_7_P02_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P02_13_IN

IfxGtm_TIM3_7_P02_13_IN.

Definition at line 1353 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_7_P11_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P11_12_IN

IfxGtm_TIM3_7_P11_12_IN.

Definition at line 1354 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_7_P13_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P13_15_IN

IfxGtm_TIM3_7_P13_15_IN.

Definition at line 1355 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_7_P13_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P13_2_IN

IfxGtm_TIM3_7_P13_2_IN.

Definition at line 1356 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_7_P15_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P15_4_IN

IfxGtm_TIM3_7_P15_4_IN.

Definition at line 1357 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_7_P20_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P20_11_IN

IfxGtm_TIM3_7_P20_11_IN.

Definition at line 1358 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_7_P20_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P20_7_IN

IfxGtm_TIM3_7_P20_7_IN.

Definition at line 1359 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_7_P22_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P22_11_IN

IfxGtm_TIM3_7_P22_11_IN.

Definition at line 1360 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_7_P25_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P25_7_IN

IfxGtm_TIM3_7_P25_7_IN.

Definition at line 1361 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_7_P32_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P32_7_IN

IfxGtm_TIM3_7_P32_7_IN.

Definition at line 1362 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM3_7_P34_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P34_4_IN

IfxGtm_TIM3_7_P34_4_IN.

Definition at line 1363 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_0_P00_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P00_13_IN

IfxGtm_TIM4_0_P00_13_IN.

Definition at line 1364 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_0_P00_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P00_9_IN

IfxGtm_TIM4_0_P00_9_IN.

Definition at line 1365 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_0_P01_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P01_12_IN

IfxGtm_TIM4_0_P01_12_IN.

Definition at line 1366 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_0_P02_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P02_12_IN

IfxGtm_TIM4_0_P02_12_IN.

Definition at line 1367 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_0_P10_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P10_0_IN

IfxGtm_TIM4_0_P10_0_IN.

Definition at line 1368 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_0_P10_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P10_8_IN

IfxGtm_TIM4_0_P10_8_IN.

Definition at line 1369 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_0_P11_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P11_0_IN

IfxGtm_TIM4_0_P11_0_IN.

Definition at line 1370 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_0_P12_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P12_0_IN

IfxGtm_TIM4_0_P12_0_IN.

Definition at line 1371 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_0_P13_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P13_12_IN

IfxGtm_TIM4_0_P13_12_IN.

Definition at line 1372 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_0_P21_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P21_0_IN

IfxGtm_TIM4_0_P21_0_IN.

Definition at line 1373 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_0_P24_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P24_0_IN

IfxGtm_TIM4_0_P24_0_IN.

Definition at line 1374 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_0_P25_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P25_8_IN

IfxGtm_TIM4_0_P25_8_IN.

Definition at line 1375 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_0_P30_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P30_0_IN

IfxGtm_TIM4_0_P30_0_IN.

Definition at line 1376 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_0_P32_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P32_7_IN

IfxGtm_TIM4_0_P32_7_IN.

Definition at line 1377 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_1_P00_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P00_10_IN

IfxGtm_TIM4_1_P00_10_IN.

Definition at line 1378 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_1_P00_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P00_15_IN

IfxGtm_TIM4_1_P00_15_IN.

Definition at line 1379 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_1_P01_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P01_1_IN

IfxGtm_TIM4_1_P01_1_IN.

Definition at line 1380 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_1_P02_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P02_15_IN

IfxGtm_TIM4_1_P02_15_IN.

Definition at line 1381 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_1_P10_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P10_9_IN

IfxGtm_TIM4_1_P10_9_IN.

Definition at line 1382 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_1_P11_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P11_1_IN

IfxGtm_TIM4_1_P11_1_IN.

Definition at line 1383 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_1_P12_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P12_1_IN

IfxGtm_TIM4_1_P12_1_IN.

Definition at line 1384 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_1_P15_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P15_10_IN

IfxGtm_TIM4_1_P15_10_IN.

Definition at line 1385 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_1_P21_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P21_1_IN

IfxGtm_TIM4_1_P21_1_IN.

Definition at line 1386 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_1_P24_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P24_1_IN

IfxGtm_TIM4_1_P24_1_IN.

Definition at line 1387 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_1_P25_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P25_9_IN

IfxGtm_TIM4_1_P25_9_IN.

Definition at line 1388 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_1_P30_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P30_1_IN

IfxGtm_TIM4_1_P30_1_IN.

Definition at line 1389 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_1_P32_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P32_5_IN

IfxGtm_TIM4_1_P32_5_IN.

Definition at line 1390 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_2_P00_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P00_11_IN

IfxGtm_TIM4_2_P00_11_IN.

Definition at line 1391 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_2_P01_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P01_9_IN

IfxGtm_TIM4_2_P01_9_IN.

Definition at line 1392 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_2_P02_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P02_13_IN

IfxGtm_TIM4_2_P02_13_IN.

Definition at line 1393 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_2_P02_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P02_9_IN

IfxGtm_TIM4_2_P02_9_IN.

Definition at line 1394 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_2_P10_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P10_10_IN

IfxGtm_TIM4_2_P10_10_IN.

Definition at line 1395 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_2_P10_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P10_6_IN

IfxGtm_TIM4_2_P10_6_IN.

Definition at line 1396 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_2_P11_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P11_4_IN

IfxGtm_TIM4_2_P11_4_IN.

Definition at line 1397 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_2_P15_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P15_11_IN

IfxGtm_TIM4_2_P15_11_IN.

Definition at line 1398 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_2_P21_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P21_6_IN

IfxGtm_TIM4_2_P21_6_IN.

Definition at line 1399 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_2_P23_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P23_6_IN

IfxGtm_TIM4_2_P23_6_IN.

Definition at line 1400 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_2_P24_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P24_2_IN

IfxGtm_TIM4_2_P24_2_IN.

Definition at line 1401 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_2_P25_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P25_10_IN

IfxGtm_TIM4_2_P25_10_IN.

Definition at line 1402 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_2_P30_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P30_2_IN

IfxGtm_TIM4_2_P30_2_IN.

Definition at line 1403 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_3_P00_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P00_12_IN

IfxGtm_TIM4_3_P00_12_IN.

Definition at line 1404 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_3_P01_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P01_13_IN

IfxGtm_TIM4_3_P01_13_IN.

Definition at line 1405 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_3_P02_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P02_10_IN

IfxGtm_TIM4_3_P02_10_IN.

Definition at line 1406 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_3_P02_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P02_14_IN

IfxGtm_TIM4_3_P02_14_IN.

Definition at line 1407 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_3_P10_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P10_14_IN

IfxGtm_TIM4_3_P10_14_IN.

Definition at line 1408 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_3_P10_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P10_5_IN

IfxGtm_TIM4_3_P10_5_IN.

Definition at line 1409 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_3_P11_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P11_5_IN

IfxGtm_TIM4_3_P11_5_IN.

Definition at line 1410 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_3_P15_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P15_12_IN

IfxGtm_TIM4_3_P15_12_IN.

Definition at line 1411 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_3_P21_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P21_7_IN

IfxGtm_TIM4_3_P21_7_IN.

Definition at line 1412 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_3_P23_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P23_7_IN

IfxGtm_TIM4_3_P23_7_IN.

Definition at line 1413 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_3_P24_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P24_3_IN

IfxGtm_TIM4_3_P24_3_IN.

Definition at line 1414 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_3_P25_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P25_11_IN

IfxGtm_TIM4_3_P25_11_IN.

Definition at line 1415 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_3_P30_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P30_3_IN

IfxGtm_TIM4_3_P30_3_IN.

Definition at line 1416 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_4_P01_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P01_0_IN

IfxGtm_TIM4_4_P01_0_IN.

Definition at line 1417 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_4_P01_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P01_8_IN

IfxGtm_TIM4_4_P01_8_IN.

Definition at line 1418 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_4_P02_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P02_11_IN

IfxGtm_TIM4_4_P02_11_IN.

Definition at line 1419 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_4_P10_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P10_13_IN

IfxGtm_TIM4_4_P10_13_IN.

Definition at line 1420 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_4_P10_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P10_1_IN

IfxGtm_TIM4_4_P10_1_IN.

Definition at line 1421 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_4_P11_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P11_7_IN

IfxGtm_TIM4_4_P11_7_IN.

Definition at line 1422 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_4_P15_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P15_13_IN

IfxGtm_TIM4_4_P15_13_IN.

Definition at line 1423 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_4_P20_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P20_1_IN

IfxGtm_TIM4_4_P20_1_IN.

Definition at line 1424 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_4_P24_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P24_4_IN

IfxGtm_TIM4_4_P24_4_IN.

Definition at line 1425 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_4_P25_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P25_12_IN

IfxGtm_TIM4_4_P25_12_IN.

Definition at line 1426 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_4_P30_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P30_4_IN

IfxGtm_TIM4_4_P30_4_IN.

Definition at line 1427 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_4_P32_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P32_6_IN

IfxGtm_TIM4_4_P32_6_IN.

Definition at line 1428 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_4_P33_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P33_10_IN

IfxGtm_TIM4_4_P33_10_IN.

Definition at line 1429 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_4_P33_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P33_4_IN

IfxGtm_TIM4_4_P33_4_IN.

Definition at line 1430 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_5_P01_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P01_10_IN

IfxGtm_TIM4_5_P01_10_IN.

Definition at line 1431 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_5_P01_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P01_2_IN

IfxGtm_TIM4_5_P01_2_IN.

Definition at line 1432 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_5_P01_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P01_3_IN

IfxGtm_TIM4_5_P01_3_IN.

Definition at line 1433 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_5_P10_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P10_11_IN

IfxGtm_TIM4_5_P10_11_IN.

Definition at line 1434 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_5_P10_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P10_2_IN

IfxGtm_TIM4_5_P10_2_IN.

Definition at line 1435 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_5_P11_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P11_8_IN

IfxGtm_TIM4_5_P11_8_IN.

Definition at line 1436 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_5_P15_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P15_14_IN

IfxGtm_TIM4_5_P15_14_IN.

Definition at line 1437 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_5_P20_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P20_3_IN

IfxGtm_TIM4_5_P20_3_IN.

Definition at line 1438 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_5_P24_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P24_5_IN

IfxGtm_TIM4_5_P24_5_IN.

Definition at line 1439 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_5_P25_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P25_13_IN

IfxGtm_TIM4_5_P25_13_IN.

Definition at line 1440 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_5_P30_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P30_5_IN

IfxGtm_TIM4_5_P30_5_IN.

Definition at line 1441 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_5_P33_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P33_14_IN

IfxGtm_TIM4_5_P33_14_IN.

Definition at line 1442 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_5_P33_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P33_5_IN

IfxGtm_TIM4_5_P33_5_IN.

Definition at line 1443 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_6_P01_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P01_14_IN

IfxGtm_TIM4_6_P01_14_IN.

Definition at line 1444 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_6_P01_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P01_15_IN

IfxGtm_TIM4_6_P01_15_IN.

Definition at line 1445 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_6_P01_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P01_4_IN

IfxGtm_TIM4_6_P01_4_IN.

Definition at line 1446 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_6_P10_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P10_15_IN

IfxGtm_TIM4_6_P10_15_IN.

Definition at line 1447 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_6_P10_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P10_3_IN

IfxGtm_TIM4_6_P10_3_IN.

Definition at line 1448 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_6_P11_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P11_13_IN

IfxGtm_TIM4_6_P11_13_IN.

Definition at line 1449 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_6_P15_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P15_15_IN

IfxGtm_TIM4_6_P15_15_IN.

Definition at line 1450 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_6_P24_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P24_6_IN

IfxGtm_TIM4_6_P24_6_IN.

Definition at line 1451 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_6_P25_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P25_14_IN

IfxGtm_TIM4_6_P25_14_IN.

Definition at line 1452 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_6_P30_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P30_6_IN

IfxGtm_TIM4_6_P30_6_IN.

Definition at line 1453 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_6_P33_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P33_15_IN

IfxGtm_TIM4_6_P33_15_IN.

Definition at line 1454 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_7_P00_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P00_14_IN

IfxGtm_TIM4_7_P00_14_IN.

Definition at line 1455 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_7_P01_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P01_11_IN

IfxGtm_TIM4_7_P01_11_IN.

Definition at line 1456 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_7_P10_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P10_4_IN

IfxGtm_TIM4_7_P10_4_IN.

Definition at line 1457 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_7_P11_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P11_14_IN

IfxGtm_TIM4_7_P11_14_IN.

Definition at line 1458 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_7_P11_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P11_15_IN

IfxGtm_TIM4_7_P11_15_IN.

Definition at line 1459 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_7_P13_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P13_9_IN

IfxGtm_TIM4_7_P13_9_IN.

Definition at line 1460 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_7_P14_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P14_7_IN

IfxGtm_TIM4_7_P14_7_IN.

Definition at line 1461 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_7_P24_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P24_7_IN

IfxGtm_TIM4_7_P24_7_IN.

Definition at line 1462 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_7_P25_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P25_15_IN

IfxGtm_TIM4_7_P25_15_IN.

Definition at line 1463 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_7_P30_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P30_7_IN

IfxGtm_TIM4_7_P30_7_IN.

Definition at line 1464 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM4_7_P34_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P34_5_IN

IfxGtm_TIM4_7_P34_5_IN.

Definition at line 1465 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_0_P00_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P00_13_IN

IfxGtm_TIM5_0_P00_13_IN.

Definition at line 1466 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_0_P01_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P01_12_IN

IfxGtm_TIM5_0_P01_12_IN.

Definition at line 1467 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_0_P01_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P01_8_IN

IfxGtm_TIM5_0_P01_8_IN.

Definition at line 1468 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_0_P02_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P02_12_IN

IfxGtm_TIM5_0_P02_12_IN.

Definition at line 1469 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_0_P13_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P13_11_IN

IfxGtm_TIM5_0_P13_11_IN.

Definition at line 1470 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_0_P22_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P22_8_IN

IfxGtm_TIM5_0_P22_8_IN.

Definition at line 1471 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_0_P24_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P24_8_IN

IfxGtm_TIM5_0_P24_8_IN.

Definition at line 1472 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_0_P30_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P30_8_IN

IfxGtm_TIM5_0_P30_8_IN.

Definition at line 1473 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_0_P31_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P31_8_IN

IfxGtm_TIM5_0_P31_8_IN.

Definition at line 1474 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_0_P33_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P33_14_IN

IfxGtm_TIM5_0_P33_14_IN.

Definition at line 1475 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_1_P00_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P00_15_IN

IfxGtm_TIM5_1_P00_15_IN.

Definition at line 1476 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_1_P01_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P01_1_IN

IfxGtm_TIM5_1_P01_1_IN.

Definition at line 1477 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_1_P01_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P01_9_IN

IfxGtm_TIM5_1_P01_9_IN.

Definition at line 1478 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_1_P02_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P02_15_IN

IfxGtm_TIM5_1_P02_15_IN.

Definition at line 1479 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_1_P13_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P13_10_IN

IfxGtm_TIM5_1_P13_10_IN.

Definition at line 1480 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_1_P14_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P14_11_IN

IfxGtm_TIM5_1_P14_11_IN.

Definition at line 1481 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_1_P22_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P22_9_IN

IfxGtm_TIM5_1_P22_9_IN.

Definition at line 1482 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_1_P24_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P24_9_IN

IfxGtm_TIM5_1_P24_9_IN.

Definition at line 1483 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_1_P30_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P30_9_IN

IfxGtm_TIM5_1_P30_9_IN.

Definition at line 1484 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_1_P31_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P31_9_IN

IfxGtm_TIM5_1_P31_9_IN.

Definition at line 1485 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_1_P33_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P33_15_IN

IfxGtm_TIM5_1_P33_15_IN.

Definition at line 1486 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_2_P01_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P01_10_IN

IfxGtm_TIM5_2_P01_10_IN.

Definition at line 1487 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_2_P01_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P01_9_IN

IfxGtm_TIM5_2_P01_9_IN.

Definition at line 1488 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_2_P02_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P02_13_IN

IfxGtm_TIM5_2_P02_13_IN.

Definition at line 1489 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_2_P13_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P13_14_IN

IfxGtm_TIM5_2_P13_14_IN.

Definition at line 1490 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_2_P14_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P14_14_IN

IfxGtm_TIM5_2_P14_14_IN.

Definition at line 1491 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_2_P22_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P22_10_IN

IfxGtm_TIM5_2_P22_10_IN.

Definition at line 1492 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_2_P24_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P24_10_IN

IfxGtm_TIM5_2_P24_10_IN.

Definition at line 1493 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_2_P30_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P30_10_IN

IfxGtm_TIM5_2_P30_10_IN.

Definition at line 1494 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_2_P31_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P31_10_IN

IfxGtm_TIM5_2_P31_10_IN.

Definition at line 1495 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_3_P01_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P01_11_IN

IfxGtm_TIM5_3_P01_11_IN.

Definition at line 1496 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_3_P01_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P01_13_IN

IfxGtm_TIM5_3_P01_13_IN.

Definition at line 1497 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_3_P01_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P01_5_IN

IfxGtm_TIM5_3_P01_5_IN.

Definition at line 1498 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_3_P02_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P02_14_IN

IfxGtm_TIM5_3_P02_14_IN.

Definition at line 1499 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_3_P13_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P13_4_IN

IfxGtm_TIM5_3_P13_4_IN.

Definition at line 1500 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_3_P14_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P14_13_IN

IfxGtm_TIM5_3_P14_13_IN.

Definition at line 1501 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_3_P22_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P22_11_IN

IfxGtm_TIM5_3_P22_11_IN.

Definition at line 1502 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_3_P24_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P24_11_IN

IfxGtm_TIM5_3_P24_11_IN.

Definition at line 1503 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_3_P30_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P30_11_IN

IfxGtm_TIM5_3_P30_11_IN.

Definition at line 1504 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_3_P31_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P31_11_IN

IfxGtm_TIM5_3_P31_11_IN.

Definition at line 1505 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_3_P34_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P34_1_IN

IfxGtm_TIM5_3_P34_1_IN.

Definition at line 1506 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_4_P00_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P00_0_IN

IfxGtm_TIM5_4_P00_0_IN.

Definition at line 1507 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_4_P01_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P01_0_IN

IfxGtm_TIM5_4_P01_0_IN.

Definition at line 1508 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_4_P01_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P01_8_IN

IfxGtm_TIM5_4_P01_8_IN.

Definition at line 1509 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_4_P13_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P13_5_IN

IfxGtm_TIM5_4_P13_5_IN.

Definition at line 1510 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_4_P14_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P14_12_IN

IfxGtm_TIM5_4_P14_12_IN.

Definition at line 1511 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_4_P21_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P21_2_IN

IfxGtm_TIM5_4_P21_2_IN.

Definition at line 1512 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_4_P24_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P24_12_IN

IfxGtm_TIM5_4_P24_12_IN.

Definition at line 1513 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_4_P30_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P30_12_IN

IfxGtm_TIM5_4_P30_12_IN.

Definition at line 1514 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_4_P31_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P31_12_IN

IfxGtm_TIM5_4_P31_12_IN.

Definition at line 1515 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_4_P34_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P34_2_IN

IfxGtm_TIM5_4_P34_2_IN.

Definition at line 1516 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_5_P00_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P00_1_IN

IfxGtm_TIM5_5_P00_1_IN.

Definition at line 1517 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_5_P01_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P01_10_IN

IfxGtm_TIM5_5_P01_10_IN.

Definition at line 1518 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_5_P01_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P01_2_IN

IfxGtm_TIM5_5_P01_2_IN.

Definition at line 1519 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_5_P01_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P01_6_IN

IfxGtm_TIM5_5_P01_6_IN.

Definition at line 1520 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_5_P13_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P13_13_IN

IfxGtm_TIM5_5_P13_13_IN.

Definition at line 1521 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_5_P13_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P13_6_IN

IfxGtm_TIM5_5_P13_6_IN.

Definition at line 1522 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_5_P21_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P21_3_IN

IfxGtm_TIM5_5_P21_3_IN.

Definition at line 1523 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_5_P24_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P24_13_IN

IfxGtm_TIM5_5_P24_13_IN.

Definition at line 1524 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_5_P30_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P30_13_IN

IfxGtm_TIM5_5_P30_13_IN.

Definition at line 1525 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_5_P31_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P31_13_IN

IfxGtm_TIM5_5_P31_13_IN.

Definition at line 1526 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_5_P32_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P32_5_IN

IfxGtm_TIM5_5_P32_5_IN.

Definition at line 1527 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_5_P34_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P34_3_IN

IfxGtm_TIM5_5_P34_3_IN.

Definition at line 1528 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_6_P00_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P00_2_IN

IfxGtm_TIM5_6_P00_2_IN.

Definition at line 1529 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_6_P01_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P01_14_IN

IfxGtm_TIM5_6_P01_14_IN.

Definition at line 1530 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_6_P01_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P01_15_IN

IfxGtm_TIM5_6_P01_15_IN.

Definition at line 1531 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_6_P01_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P01_6_IN

IfxGtm_TIM5_6_P01_6_IN.

Definition at line 1532 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_6_P13_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P13_7_IN

IfxGtm_TIM5_6_P13_7_IN.

Definition at line 1533 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_6_P14_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P14_15_IN

IfxGtm_TIM5_6_P14_15_IN.

Definition at line 1534 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_6_P21_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P21_4_IN

IfxGtm_TIM5_6_P21_4_IN.

Definition at line 1535 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_6_P24_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P24_14_IN

IfxGtm_TIM5_6_P24_14_IN.

Definition at line 1536 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_6_P30_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P30_14_IN

IfxGtm_TIM5_6_P30_14_IN.

Definition at line 1537 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_6_P31_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P31_14_IN

IfxGtm_TIM5_6_P31_14_IN.

Definition at line 1538 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_6_P32_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P32_6_IN

IfxGtm_TIM5_6_P32_6_IN.

Definition at line 1539 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_6_P34_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P34_4_IN

IfxGtm_TIM5_6_P34_4_IN.

Definition at line 1540 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_7_P00_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P00_14_IN

IfxGtm_TIM5_7_P00_14_IN.

Definition at line 1541 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_7_P00_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P00_3_IN

IfxGtm_TIM5_7_P00_3_IN.

Definition at line 1542 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_7_P01_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P01_11_IN

IfxGtm_TIM5_7_P01_11_IN.

Definition at line 1543 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_7_P01_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P01_7_IN

IfxGtm_TIM5_7_P01_7_IN.

Definition at line 1544 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_7_P13_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P13_15_IN

IfxGtm_TIM5_7_P13_15_IN.

Definition at line 1545 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_7_P21_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P21_5_IN

IfxGtm_TIM5_7_P21_5_IN.

Definition at line 1546 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_7_P24_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P24_15_IN

IfxGtm_TIM5_7_P24_15_IN.

Definition at line 1547 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_7_P30_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P30_15_IN

IfxGtm_TIM5_7_P30_15_IN.

Definition at line 1548 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_7_P31_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P31_15_IN

IfxGtm_TIM5_7_P31_15_IN.

Definition at line 1549 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_7_P32_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P32_7_IN

IfxGtm_TIM5_7_P32_7_IN.

Definition at line 1550 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM5_7_P34_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P34_5_IN

IfxGtm_TIM5_7_P34_5_IN.

Definition at line 1551 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_0_P01_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P01_12_IN

IfxGtm_TIM6_0_P01_12_IN.

Definition at line 1552 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_0_P10_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P10_9_IN

IfxGtm_TIM6_0_P10_9_IN.

Definition at line 1553 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_0_P13_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P13_4_IN

IfxGtm_TIM6_0_P13_4_IN.

Definition at line 1554 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_0_P20_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P20_6_IN

IfxGtm_TIM6_0_P20_6_IN.

Definition at line 1555 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_0_P23_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P23_7_IN

IfxGtm_TIM6_0_P23_7_IN.

Definition at line 1556 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_0_P24_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P24_0_IN

IfxGtm_TIM6_0_P24_0_IN.

Definition at line 1557 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_0_P25_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P25_0_IN

IfxGtm_TIM6_0_P25_0_IN.

Definition at line 1558 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_0_P30_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P30_8_IN

IfxGtm_TIM6_0_P30_8_IN.

Definition at line 1559 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_0_P31_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P31_8_IN

IfxGtm_TIM6_0_P31_8_IN.

Definition at line 1560 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_1_P01_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P01_13_IN

IfxGtm_TIM6_1_P01_13_IN.

Definition at line 1561 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_1_P10_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P10_10_IN

IfxGtm_TIM6_1_P10_10_IN.

Definition at line 1562 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_1_P13_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P13_5_IN

IfxGtm_TIM6_1_P13_5_IN.

Definition at line 1563 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_1_P20_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P20_7_IN

IfxGtm_TIM6_1_P20_7_IN.

Definition at line 1564 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_1_P23_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P23_6_IN

IfxGtm_TIM6_1_P23_6_IN.

Definition at line 1565 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_1_P24_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P24_1_IN

IfxGtm_TIM6_1_P24_1_IN.

Definition at line 1566 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_1_P25_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P25_1_IN

IfxGtm_TIM6_1_P25_1_IN.

Definition at line 1567 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_1_P30_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P30_9_IN

IfxGtm_TIM6_1_P30_9_IN.

Definition at line 1568 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_1_P31_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P31_9_IN

IfxGtm_TIM6_1_P31_9_IN.

Definition at line 1569 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_2_P01_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P01_14_IN

IfxGtm_TIM6_2_P01_14_IN.

Definition at line 1570 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_2_P10_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P10_11_IN

IfxGtm_TIM6_2_P10_11_IN.

Definition at line 1571 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_2_P13_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P13_6_IN

IfxGtm_TIM6_2_P13_6_IN.

Definition at line 1572 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_2_P20_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P20_8_IN

IfxGtm_TIM6_2_P20_8_IN.

Definition at line 1573 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_2_P23_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P23_5_IN

IfxGtm_TIM6_2_P23_5_IN.

Definition at line 1574 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_2_P24_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P24_2_IN

IfxGtm_TIM6_2_P24_2_IN.

Definition at line 1575 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_2_P25_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P25_2_IN

IfxGtm_TIM6_2_P25_2_IN.

Definition at line 1576 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_2_P30_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P30_10_IN

IfxGtm_TIM6_2_P30_10_IN.

Definition at line 1577 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_2_P31_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P31_10_IN

IfxGtm_TIM6_2_P31_10_IN.

Definition at line 1578 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_3_P01_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P01_15_IN

IfxGtm_TIM6_3_P01_15_IN.

Definition at line 1579 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_3_P10_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P10_13_IN

IfxGtm_TIM6_3_P10_13_IN.

Definition at line 1580 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_3_P13_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P13_7_IN

IfxGtm_TIM6_3_P13_7_IN.

Definition at line 1581 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_3_P20_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P20_9_IN

IfxGtm_TIM6_3_P20_9_IN.

Definition at line 1582 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_3_P23_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P23_4_IN

IfxGtm_TIM6_3_P23_4_IN.

Definition at line 1583 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_3_P24_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P24_3_IN

IfxGtm_TIM6_3_P24_3_IN.

Definition at line 1584 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_3_P25_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P25_3_IN

IfxGtm_TIM6_3_P25_3_IN.

Definition at line 1585 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_3_P30_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P30_11_IN

IfxGtm_TIM6_3_P30_11_IN.

Definition at line 1586 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_3_P31_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P31_11_IN

IfxGtm_TIM6_3_P31_11_IN.

Definition at line 1587 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_4_P00_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P00_4_IN

IfxGtm_TIM6_4_P00_4_IN.

Definition at line 1588 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_4_P13_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P13_9_IN

IfxGtm_TIM6_4_P13_9_IN.

Definition at line 1589 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_4_P14_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P14_12_IN

IfxGtm_TIM6_4_P14_12_IN.

Definition at line 1590 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_4_P23_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P23_3_IN

IfxGtm_TIM6_4_P23_3_IN.

Definition at line 1591 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_4_P24_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P24_4_IN

IfxGtm_TIM6_4_P24_4_IN.

Definition at line 1592 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_4_P25_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P25_4_IN

IfxGtm_TIM6_4_P25_4_IN.

Definition at line 1593 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_4_P30_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P30_12_IN

IfxGtm_TIM6_4_P30_12_IN.

Definition at line 1594 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_4_P31_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P31_12_IN

IfxGtm_TIM6_4_P31_12_IN.

Definition at line 1595 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_5_P00_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P00_13_IN

IfxGtm_TIM6_5_P00_13_IN.

Definition at line 1596 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_5_P13_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P13_10_IN

IfxGtm_TIM6_5_P13_10_IN.

Definition at line 1597 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_5_P14_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P14_13_IN

IfxGtm_TIM6_5_P14_13_IN.

Definition at line 1598 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_5_P23_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P23_2_IN

IfxGtm_TIM6_5_P23_2_IN.

Definition at line 1599 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_5_P24_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P24_5_IN

IfxGtm_TIM6_5_P24_5_IN.

Definition at line 1600 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_5_P25_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P25_5_IN

IfxGtm_TIM6_5_P25_5_IN.

Definition at line 1601 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_5_P30_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P30_13_IN

IfxGtm_TIM6_5_P30_13_IN.

Definition at line 1602 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_5_P31_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P31_13_IN

IfxGtm_TIM6_5_P31_13_IN.

Definition at line 1603 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_6_P00_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P00_14_IN

IfxGtm_TIM6_6_P00_14_IN.

Definition at line 1604 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_6_P13_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P13_11_IN

IfxGtm_TIM6_6_P13_11_IN.

Definition at line 1605 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_6_P14_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P14_14_IN

IfxGtm_TIM6_6_P14_14_IN.

Definition at line 1606 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_6_P23_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P23_1_IN

IfxGtm_TIM6_6_P23_1_IN.

Definition at line 1607 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_6_P24_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P24_6_IN

IfxGtm_TIM6_6_P24_6_IN.

Definition at line 1608 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_6_P25_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P25_6_IN

IfxGtm_TIM6_6_P25_6_IN.

Definition at line 1609 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_6_P26_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P26_0_IN

IfxGtm_TIM6_6_P26_0_IN.

Definition at line 1610 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_6_P30_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P30_14_IN

IfxGtm_TIM6_6_P30_14_IN.

Definition at line 1611 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_6_P31_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P31_14_IN

IfxGtm_TIM6_6_P31_14_IN.

Definition at line 1612 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_7_P00_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P00_15_IN

IfxGtm_TIM6_7_P00_15_IN.

Definition at line 1613 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_7_P13_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P13_12_IN

IfxGtm_TIM6_7_P13_12_IN.

Definition at line 1614 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_7_P14_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P14_15_IN

IfxGtm_TIM6_7_P14_15_IN.

Definition at line 1615 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_7_P23_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P23_0_IN

IfxGtm_TIM6_7_P23_0_IN.

Definition at line 1616 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_7_P24_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P24_7_IN

IfxGtm_TIM6_7_P24_7_IN.

Definition at line 1617 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_7_P25_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P25_7_IN

IfxGtm_TIM6_7_P25_7_IN.

Definition at line 1618 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_7_P30_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P30_15_IN

IfxGtm_TIM6_7_P30_15_IN.

Definition at line 1619 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM6_7_P31_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P31_15_IN

IfxGtm_TIM6_7_P31_15_IN.

Definition at line 1620 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_0_TOUT0_P02_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT0_P02_0_OUT

IfxGtm_TOM0_0_TOUT0_P02_0_OUT.

Definition at line 1631 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_0_TOUT109_P10_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT109_P10_7_OUT

IfxGtm_TOM0_0_TOUT109_P10_7_OUT.

Definition at line 1632 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_0_TOUT151_P02_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT151_P02_12_OUT

IfxGtm_TOM0_0_TOUT151_P02_12_OUT.

Definition at line 1633 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_0_TOUT18_P00_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT18_P00_9_OUT

IfxGtm_TOM0_0_TOUT18_P00_9_OUT.

Definition at line 1634 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_0_TOUT26_P33_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT26_P33_4_OUT

IfxGtm_TOM0_0_TOUT26_P33_4_OUT.

Definition at line 1635 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_0_TOUT32_P33_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT32_P33_10_OUT

IfxGtm_TOM0_0_TOUT32_P33_10_OUT.

Definition at line 1636 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_0_TOUT53_P21_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT53_P21_2_OUT

IfxGtm_TOM0_0_TOUT53_P21_2_OUT.

Definition at line 1637 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_0_TOUT76_P15_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT76_P15_5_OUT

IfxGtm_TOM0_0_TOUT76_P15_5_OUT.

Definition at line 1638 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_0_TOUT77_P15_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT77_P15_6_OUT

IfxGtm_TOM0_0_TOUT77_P15_6_OUT.

Definition at line 1639 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_0_TOUT85_P14_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT85_P14_5_OUT

IfxGtm_TOM0_0_TOUT85_P14_5_OUT.

Definition at line 1640 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_0_TOUT87_P14_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT87_P14_7_OUT

IfxGtm_TOM0_0_TOUT87_P14_7_OUT.

Definition at line 1641 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_0N_TOUT106_P10_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT106_P10_4_OUT

IfxGtm_TOM0_0N_TOUT106_P10_4_OUT.

Definition at line 1621 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_0N_TOUT17_P00_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT17_P00_8_OUT

IfxGtm_TOM0_0N_TOUT17_P00_8_OUT.

Definition at line 1622 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_0N_TOUT25_P33_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT25_P33_3_OUT

IfxGtm_TOM0_0N_TOUT25_P33_3_OUT.

Definition at line 1623 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_0N_TOUT34_P33_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT34_P33_12_OUT

IfxGtm_TOM0_0N_TOUT34_P33_12_OUT.

Definition at line 1624 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_0N_TOUT51_P21_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT51_P21_0_OUT

IfxGtm_TOM0_0N_TOUT51_P21_0_OUT.

Definition at line 1625 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_0N_TOUT61_P20_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT61_P20_3_OUT

IfxGtm_TOM0_0N_TOUT61_P20_3_OUT.

Definition at line 1626 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_0N_TOUT72_P15_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT72_P15_1_OUT

IfxGtm_TOM0_0N_TOUT72_P15_1_OUT.

Definition at line 1627 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_0N_TOUT7_P02_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT7_P02_7_OUT

IfxGtm_TOM0_0N_TOUT7_P02_7_OUT.

Definition at line 1628 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_0N_TOUT91_P13_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT91_P13_0_OUT

IfxGtm_TOM0_0N_TOUT91_P13_0_OUT.

Definition at line 1629 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_0N_TOUT9_P00_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT9_P00_0_OUT

IfxGtm_TOM0_0N_TOUT9_P00_0_OUT.

Definition at line 1630 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_10_TOUT12_P00_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT12_P00_3_OUT

IfxGtm_TOM0_10_TOUT12_P00_3_OUT.

Definition at line 1642 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_10_TOUT2_P02_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT2_P02_2_OUT

IfxGtm_TOM0_10_TOUT2_P02_2_OUT.

Definition at line 1643 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_10_TOUT41_P23_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT41_P23_0_OUT

IfxGtm_TOM0_10_TOUT41_P23_0_OUT.

Definition at line 1644 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_10_TOUT46_P23_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT46_P23_5_OUT

IfxGtm_TOM0_10_TOUT46_P23_5_OUT.

Definition at line 1645 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_10_TOUT96_P11_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT96_P11_3_OUT

IfxGtm_TOM0_10_TOUT96_P11_3_OUT.

Definition at line 1646 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_11_TOUT13_P00_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT13_P00_4_OUT

IfxGtm_TOM0_11_TOUT13_P00_4_OUT.

Definition at line 1647 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_11_TOUT3_P02_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT3_P02_3_OUT

IfxGtm_TOM0_11_TOUT3_P02_3_OUT.

Definition at line 1648 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_11_TOUT43_P23_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT43_P23_2_OUT

IfxGtm_TOM0_11_TOUT43_P23_2_OUT.

Definition at line 1649 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_11_TOUT49_P22_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT49_P22_2_OUT

IfxGtm_TOM0_11_TOUT49_P22_2_OUT.

Definition at line 1650 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_11_TOUT97_P11_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT97_P11_6_OUT

IfxGtm_TOM0_11_TOUT97_P11_6_OUT.

Definition at line 1651 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_12_TOUT14_P00_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT14_P00_5_OUT

IfxGtm_TOM0_12_TOUT14_P00_5_OUT.

Definition at line 1652 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_12_TOUT44_P23_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT44_P23_3_OUT

IfxGtm_TOM0_12_TOUT44_P23_3_OUT.

Definition at line 1653 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_12_TOUT4_P02_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT4_P02_4_OUT

IfxGtm_TOM0_12_TOUT4_P02_4_OUT.

Definition at line 1654 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_12_TOUT50_P22_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT50_P22_3_OUT

IfxGtm_TOM0_12_TOUT50_P22_3_OUT.

Definition at line 1655 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_12_TOUT98_P11_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT98_P11_9_OUT

IfxGtm_TOM0_12_TOUT98_P11_9_OUT.

Definition at line 1656 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_13_TOUT15_P00_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT15_P00_6_OUT

IfxGtm_TOM0_13_TOUT15_P00_6_OUT.

Definition at line 1657 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_13_TOUT5_P02_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT5_P02_5_OUT

IfxGtm_TOM0_13_TOUT5_P02_5_OUT.

Definition at line 1658 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_13_TOUT99_P11_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT99_P11_10_OUT

IfxGtm_TOM0_13_TOUT99_P11_10_OUT.

Definition at line 1659 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_14_TOUT100_P11_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT100_P11_11_OUT

IfxGtm_TOM0_14_TOUT100_P11_11_OUT.

Definition at line 1660 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_14_TOUT16_P00_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT16_P00_7_OUT

IfxGtm_TOM0_14_TOUT16_P00_7_OUT.

Definition at line 1661 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_14_TOUT6_P02_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT6_P02_6_OUT

IfxGtm_TOM0_14_TOUT6_P02_6_OUT.

Definition at line 1662 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_15_TOUT101_P11_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT101_P11_12_OUT

IfxGtm_TOM0_15_TOUT101_P11_12_OUT.

Definition at line 1663 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_15_TOUT17_P00_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT17_P00_8_OUT

IfxGtm_TOM0_15_TOUT17_P00_8_OUT.

Definition at line 1664 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_15_TOUT42_P23_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT42_P23_1_OUT

IfxGtm_TOM0_15_TOUT42_P23_1_OUT.

Definition at line 1665 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_15_TOUT7_P02_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT7_P02_7_OUT

IfxGtm_TOM0_15_TOUT7_P02_7_OUT.

Definition at line 1666 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_1_TOUT103_P10_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT103_P10_1_OUT

IfxGtm_TOM0_1_TOUT103_P10_1_OUT.

Definition at line 1680 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_1_TOUT116_P02_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT116_P02_9_OUT

IfxGtm_TOM0_1_TOUT116_P02_9_OUT.

Definition at line 1681 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_1_TOUT19_P00_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT19_P00_10_OUT

IfxGtm_TOM0_1_TOUT19_P00_10_OUT.

Definition at line 1682 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_1_TOUT1_P02_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT1_P02_1_OUT

IfxGtm_TOM0_1_TOUT1_P02_1_OUT.

Definition at line 1683 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_1_TOUT27_P33_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT27_P33_5_OUT

IfxGtm_TOM0_1_TOUT27_P33_5_OUT.

Definition at line 1684 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_1_TOUT31_P33_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT31_P33_9_OUT

IfxGtm_TOM0_1_TOUT31_P33_9_OUT.

Definition at line 1685 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_1_TOUT54_P21_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT54_P21_3_OUT

IfxGtm_TOM0_1_TOUT54_P21_3_OUT.

Definition at line 1686 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_1_TOUT78_P15_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT78_P15_7_OUT

IfxGtm_TOM0_1_TOUT78_P15_7_OUT.

Definition at line 1687 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_1_TOUT86_P14_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT86_P14_6_OUT

IfxGtm_TOM0_1_TOUT86_P14_6_OUT.

Definition at line 1688 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_1N_TOUT107_P10_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT107_P10_5_OUT

IfxGtm_TOM0_1N_TOUT107_P10_5_OUT.

Definition at line 1667 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_1N_TOUT10_P00_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT10_P00_1_OUT

IfxGtm_TOM0_1N_TOUT10_P00_1_OUT.

Definition at line 1668 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_1N_TOUT14_P00_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT14_P00_5_OUT

IfxGtm_TOM0_1N_TOUT14_P00_5_OUT.

Definition at line 1669 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_1N_TOUT22_P33_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT22_P33_0_OUT

IfxGtm_TOM0_1N_TOUT22_P33_0_OUT.

Definition at line 1670 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_1N_TOUT30_P33_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT30_P33_8_OUT

IfxGtm_TOM0_1N_TOUT30_P33_8_OUT.

Definition at line 1671 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_1N_TOUT35_P33_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT35_P33_13_OUT

IfxGtm_TOM0_1N_TOUT35_P33_13_OUT.

Definition at line 1672 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_1N_TOUT39_P32_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT39_P32_3_OUT

IfxGtm_TOM0_1N_TOUT39_P32_3_OUT.

Definition at line 1673 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_1N_TOUT4_P02_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT4_P02_4_OUT

IfxGtm_TOM0_1N_TOUT4_P02_4_OUT.

Definition at line 1674 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_1N_TOUT52_P21_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT52_P21_1_OUT

IfxGtm_TOM0_1N_TOUT52_P21_1_OUT.

Definition at line 1675 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_1N_TOUT57_P21_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT57_P21_6_OUT

IfxGtm_TOM0_1N_TOUT57_P21_6_OUT.

Definition at line 1676 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_1N_TOUT73_P15_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT73_P15_2_OUT

IfxGtm_TOM0_1N_TOUT73_P15_2_OUT.

Definition at line 1677 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_1N_TOUT90_P14_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT90_P14_10_OUT

IfxGtm_TOM0_1N_TOUT90_P14_10_OUT.

Definition at line 1678 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_1N_TOUT92_P13_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT92_P13_1_OUT

IfxGtm_TOM0_1N_TOUT92_P13_1_OUT.

Definition at line 1679 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_2_TOUT104_P10_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT104_P10_2_OUT

IfxGtm_TOM0_2_TOUT104_P10_2_OUT.

Definition at line 1699 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_2_TOUT107_P10_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT107_P10_5_OUT

IfxGtm_TOM0_2_TOUT107_P10_5_OUT.

Definition at line 1700 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_2_TOUT117_P02_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT117_P02_10_OUT

IfxGtm_TOM0_2_TOUT117_P02_10_OUT.

Definition at line 1701 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_2_TOUT20_P00_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT20_P00_11_OUT

IfxGtm_TOM0_2_TOUT20_P00_11_OUT.

Definition at line 1702 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_2_TOUT28_P33_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT28_P33_6_OUT

IfxGtm_TOM0_2_TOUT28_P33_6_OUT.

Definition at line 1703 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_2_TOUT2_P02_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT2_P02_2_OUT

IfxGtm_TOM0_2_TOUT2_P02_2_OUT.

Definition at line 1704 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_2_TOUT33_P33_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT33_P33_11_OUT

IfxGtm_TOM0_2_TOUT33_P33_11_OUT.

Definition at line 1705 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_2_TOUT55_P21_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT55_P21_4_OUT

IfxGtm_TOM0_2_TOUT55_P21_4_OUT.

Definition at line 1706 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_2_TOUT79_P15_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT79_P15_8_OUT

IfxGtm_TOM0_2_TOUT79_P15_8_OUT.

Definition at line 1707 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_2_TOUT88_P14_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT88_P14_8_OUT

IfxGtm_TOM0_2_TOUT88_P14_8_OUT.

Definition at line 1708 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_2N_TOUT108_P10_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT108_P10_6_OUT

IfxGtm_TOM0_2N_TOUT108_P10_6_OUT.

Definition at line 1689 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_2N_TOUT11_P00_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT11_P00_2_OUT

IfxGtm_TOM0_2N_TOUT11_P00_2_OUT.

Definition at line 1690 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_2N_TOUT143_P33_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT143_P33_14_OUT

IfxGtm_TOM0_2N_TOUT143_P33_14_OUT.

Definition at line 1691 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_2N_TOUT15_P00_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT15_P00_6_OUT

IfxGtm_TOM0_2N_TOUT15_P00_6_OUT.

Definition at line 1692 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_2N_TOUT23_P33_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT23_P33_1_OUT

IfxGtm_TOM0_2N_TOUT23_P33_1_OUT.

Definition at line 1693 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_2N_TOUT40_P32_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT40_P32_4_OUT

IfxGtm_TOM0_2N_TOUT40_P32_4_OUT.

Definition at line 1694 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_2N_TOUT58_P21_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT58_P21_7_OUT

IfxGtm_TOM0_2N_TOUT58_P21_7_OUT.

Definition at line 1695 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_2N_TOUT5_P02_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT5_P02_5_OUT

IfxGtm_TOM0_2N_TOUT5_P02_5_OUT.

Definition at line 1696 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_2N_TOUT74_P15_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT74_P15_3_OUT

IfxGtm_TOM0_2N_TOUT74_P15_3_OUT.

Definition at line 1697 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_2N_TOUT93_P13_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT93_P13_2_OUT

IfxGtm_TOM0_2N_TOUT93_P13_2_OUT.

Definition at line 1698 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_3_TOUT105_P10_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT105_P10_3_OUT

IfxGtm_TOM0_3_TOUT105_P10_3_OUT.

Definition at line 1720 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_3_TOUT108_P10_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT108_P10_6_OUT

IfxGtm_TOM0_3_TOUT108_P10_6_OUT.

Definition at line 1721 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_3_TOUT118_P02_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT118_P02_11_OUT

IfxGtm_TOM0_3_TOUT118_P02_11_OUT.

Definition at line 1722 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_3_TOUT21_P00_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT21_P00_12_OUT

IfxGtm_TOM0_3_TOUT21_P00_12_OUT.

Definition at line 1723 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_3_TOUT29_P33_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT29_P33_7_OUT

IfxGtm_TOM0_3_TOUT29_P33_7_OUT.

Definition at line 1724 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_3_TOUT38_P32_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT38_P32_2_OUT

IfxGtm_TOM0_3_TOUT38_P32_2_OUT.

Definition at line 1725 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_3_TOUT3_P02_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT3_P02_3_OUT

IfxGtm_TOM0_3_TOUT3_P02_3_OUT.

Definition at line 1726 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_3_TOUT56_P21_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT56_P21_5_OUT

IfxGtm_TOM0_3_TOUT56_P21_5_OUT.

Definition at line 1727 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_3_TOUT71_P15_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT71_P15_0_OUT

IfxGtm_TOM0_3_TOUT71_P15_0_OUT.

Definition at line 1728 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_3_TOUT80_P14_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT80_P14_0_OUT

IfxGtm_TOM0_3_TOUT80_P14_0_OUT.

Definition at line 1729 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_3_TOUT89_P14_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT89_P14_9_OUT

IfxGtm_TOM0_3_TOUT89_P14_9_OUT.

Definition at line 1730 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_3N_TOUT109_P10_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT109_P10_7_OUT

IfxGtm_TOM0_3N_TOUT109_P10_7_OUT.

Definition at line 1709 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_3N_TOUT12_P00_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT12_P00_3_OUT

IfxGtm_TOM0_3N_TOUT12_P00_3_OUT.

Definition at line 1710 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_3N_TOUT144_P33_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT144_P33_15_OUT

IfxGtm_TOM0_3N_TOUT144_P33_15_OUT.

Definition at line 1711 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_3N_TOUT16_P00_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT16_P00_7_OUT

IfxGtm_TOM0_3N_TOUT16_P00_7_OUT.

Definition at line 1712 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_3N_TOUT24_P33_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT24_P33_2_OUT

IfxGtm_TOM0_3N_TOUT24_P33_2_OUT.

Definition at line 1713 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_3N_TOUT42_P23_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT42_P23_1_OUT

IfxGtm_TOM0_3N_TOUT42_P23_1_OUT.

Definition at line 1714 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_3N_TOUT59_P20_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT59_P20_0_OUT

IfxGtm_TOM0_3N_TOUT59_P20_0_OUT.

Definition at line 1715 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_3N_TOUT60_P20_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT60_P20_1_OUT

IfxGtm_TOM0_3N_TOUT60_P20_1_OUT.

Definition at line 1716 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_3N_TOUT6_P02_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT6_P02_6_OUT

IfxGtm_TOM0_3N_TOUT6_P02_6_OUT.

Definition at line 1717 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_3N_TOUT75_P15_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT75_P15_4_OUT

IfxGtm_TOM0_3N_TOUT75_P15_4_OUT.

Definition at line 1718 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_3N_TOUT94_P13_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT94_P13_3_OUT

IfxGtm_TOM0_3N_TOUT94_P13_3_OUT.

Definition at line 1719 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_4_TOUT0_P02_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT0_P02_0_OUT

IfxGtm_TOM0_4_TOUT0_P02_0_OUT.

Definition at line 1745 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_4_TOUT102_P10_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT102_P10_0_OUT

IfxGtm_TOM0_4_TOUT102_P10_0_OUT.

Definition at line 1746 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_4_TOUT124_P11_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT124_P11_8_OUT

IfxGtm_TOM0_4_TOUT124_P11_8_OUT.

Definition at line 1747 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_4_TOUT22_P33_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT22_P33_0_OUT

IfxGtm_TOM0_4_TOUT22_P33_0_OUT.

Definition at line 1748 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_4_TOUT30_P33_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT30_P33_8_OUT

IfxGtm_TOM0_4_TOUT30_P33_8_OUT.

Definition at line 1749 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_4_TOUT37_P32_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT37_P32_1_OUT

IfxGtm_TOM0_4_TOUT37_P32_1_OUT.

Definition at line 1750 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_4_TOUT39_P32_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT39_P32_3_OUT

IfxGtm_TOM0_4_TOUT39_P32_3_OUT.

Definition at line 1751 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_4_TOUT53_P21_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT53_P21_2_OUT

IfxGtm_TOM0_4_TOUT53_P21_2_OUT.

Definition at line 1752 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_4_TOUT57_P21_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT57_P21_6_OUT

IfxGtm_TOM0_4_TOUT57_P21_6_OUT.

Definition at line 1753 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_4_TOUT64_P20_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT64_P20_8_OUT

IfxGtm_TOM0_4_TOUT64_P20_8_OUT.

Definition at line 1754 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_4_TOUT72_P15_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT72_P15_1_OUT

IfxGtm_TOM0_4_TOUT72_P15_1_OUT.

Definition at line 1755 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_4_TOUT81_P14_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT81_P14_1_OUT

IfxGtm_TOM0_4_TOUT81_P14_1_OUT.

Definition at line 1756 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_4_TOUT90_P14_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT90_P14_10_OUT

IfxGtm_TOM0_4_TOUT90_P14_10_OUT.

Definition at line 1757 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_4_TOUT94_P13_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT94_P13_3_OUT

IfxGtm_TOM0_4_TOUT94_P13_3_OUT.

Definition at line 1758 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_4_TOUT9_P00_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT9_P00_0_OUT

IfxGtm_TOM0_4_TOUT9_P00_0_OUT.

Definition at line 1759 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_4N_TOUT10_P00_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT10_P00_1_OUT

IfxGtm_TOM0_4N_TOUT10_P00_1_OUT.

Definition at line 1731 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_4N_TOUT143_P33_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT143_P33_14_OUT

IfxGtm_TOM0_4N_TOUT143_P33_14_OUT.

Definition at line 1732 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_4N_TOUT147_P34_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT147_P34_2_OUT

IfxGtm_TOM0_4N_TOUT147_P34_2_OUT.

Definition at line 1733 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_4N_TOUT1_P02_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT1_P02_1_OUT

IfxGtm_TOM0_4N_TOUT1_P02_1_OUT.

Definition at line 1734 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_4N_TOUT29_P33_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT29_P33_7_OUT

IfxGtm_TOM0_4N_TOUT29_P33_7_OUT.

Definition at line 1735 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_4N_TOUT36_P32_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT36_P32_0_OUT

IfxGtm_TOM0_4N_TOUT36_P32_0_OUT.

Definition at line 1736 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_4N_TOUT54_P21_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT54_P21_3_OUT

IfxGtm_TOM0_4N_TOUT54_P21_3_OUT.

Definition at line 1737 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_4N_TOUT56_P21_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT56_P21_5_OUT

IfxGtm_TOM0_4N_TOUT56_P21_5_OUT.

Definition at line 1738 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_4N_TOUT65_P20_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT65_P20_9_OUT

IfxGtm_TOM0_4N_TOUT65_P20_9_OUT.

Definition at line 1739 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_4N_TOUT73_P15_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT73_P15_2_OUT

IfxGtm_TOM0_4N_TOUT73_P15_2_OUT.

Definition at line 1740 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_4N_TOUT89_P14_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT89_P14_9_OUT

IfxGtm_TOM0_4N_TOUT89_P14_9_OUT.

Definition at line 1741 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_4N_TOUT8_P02_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT8_P02_8_OUT

IfxGtm_TOM0_4N_TOUT8_P02_8_OUT.

Definition at line 1742 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_4N_TOUT95_P11_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT95_P11_2_OUT

IfxGtm_TOM0_4N_TOUT95_P11_2_OUT.

Definition at line 1743 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_4N_TOUT96_P11_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT96_P11_3_OUT

IfxGtm_TOM0_4N_TOUT96_P11_3_OUT.

Definition at line 1744 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_5_TOUT110_P10_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT110_P10_8_OUT

IfxGtm_TOM0_5_TOUT110_P10_8_OUT.

Definition at line 1776 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_5_TOUT11_P00_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT11_P00_2_OUT

IfxGtm_TOM0_5_TOUT11_P00_2_OUT.

Definition at line 1777 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_5_TOUT128_P12_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT128_P12_0_OUT

IfxGtm_TOM0_5_TOUT128_P12_0_OUT.

Definition at line 1778 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_5_TOUT23_P33_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT23_P33_1_OUT

IfxGtm_TOM0_5_TOUT23_P33_1_OUT.

Definition at line 1779 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_5_TOUT27_P33_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT27_P33_5_OUT

IfxGtm_TOM0_5_TOUT27_P33_5_OUT.

Definition at line 1780 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_5_TOUT2_P02_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT2_P02_2_OUT

IfxGtm_TOM0_5_TOUT2_P02_2_OUT.

Definition at line 1781 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_5_TOUT40_P32_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT40_P32_4_OUT

IfxGtm_TOM0_5_TOUT40_P32_4_OUT.

Definition at line 1782 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_5_TOUT55_P21_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT55_P21_4_OUT

IfxGtm_TOM0_5_TOUT55_P21_4_OUT.

Definition at line 1783 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_5_TOUT58_P21_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT58_P21_7_OUT

IfxGtm_TOM0_5_TOUT58_P21_7_OUT.

Definition at line 1784 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_5_TOUT66_P20_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT66_P20_10_OUT

IfxGtm_TOM0_5_TOUT66_P20_10_OUT.

Definition at line 1785 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_5_TOUT74_P15_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT74_P15_3_OUT

IfxGtm_TOM0_5_TOUT74_P15_3_OUT.

Definition at line 1786 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_5_TOUT82_P14_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT82_P14_2_OUT

IfxGtm_TOM0_5_TOUT82_P14_2_OUT.

Definition at line 1787 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_5_TOUT91_P13_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT91_P13_0_OUT

IfxGtm_TOM0_5_TOUT91_P13_0_OUT.

Definition at line 1788 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_5_TOUT96_P11_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT96_P11_3_OUT

IfxGtm_TOM0_5_TOUT96_P11_3_OUT.

Definition at line 1789 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_5N_TOUT121_P11_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT121_P11_4_OUT

IfxGtm_TOM0_5N_TOUT121_P11_4_OUT.

Definition at line 1760 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_5N_TOUT12_P00_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT12_P00_3_OUT

IfxGtm_TOM0_5N_TOUT12_P00_3_OUT.

Definition at line 1761 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_5N_TOUT144_P33_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT144_P33_15_OUT

IfxGtm_TOM0_5N_TOUT144_P33_15_OUT.

Definition at line 1762 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_5N_TOUT148_P34_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT148_P34_3_OUT

IfxGtm_TOM0_5N_TOUT148_P34_3_OUT.

Definition at line 1763 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_5N_TOUT26_P33_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT26_P33_4_OUT

IfxGtm_TOM0_5N_TOUT26_P33_4_OUT.

Definition at line 1764 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_5N_TOUT28_P33_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT28_P33_6_OUT

IfxGtm_TOM0_5N_TOUT28_P33_6_OUT.

Definition at line 1765 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_5N_TOUT32_P33_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT32_P33_10_OUT

IfxGtm_TOM0_5N_TOUT32_P33_10_OUT.

Definition at line 1766 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_5N_TOUT37_P32_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT37_P32_1_OUT

IfxGtm_TOM0_5N_TOUT37_P32_1_OUT.

Definition at line 1767 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_5N_TOUT3_P02_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT3_P02_3_OUT

IfxGtm_TOM0_5N_TOUT3_P02_3_OUT.

Definition at line 1768 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_5N_TOUT53_P21_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT53_P21_2_OUT

IfxGtm_TOM0_5N_TOUT53_P21_2_OUT.

Definition at line 1769 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_5N_TOUT56_P21_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT56_P21_5_OUT

IfxGtm_TOM0_5N_TOUT56_P21_5_OUT.

Definition at line 1770 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_5N_TOUT67_P20_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT67_P20_11_OUT

IfxGtm_TOM0_5N_TOUT67_P20_11_OUT.

Definition at line 1771 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_5N_TOUT76_P15_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT76_P15_5_OUT

IfxGtm_TOM0_5N_TOUT76_P15_5_OUT.

Definition at line 1772 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_5N_TOUT77_P15_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT77_P15_6_OUT

IfxGtm_TOM0_5N_TOUT77_P15_6_OUT.

Definition at line 1773 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_5N_TOUT87_P14_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT87_P14_7_OUT

IfxGtm_TOM0_5N_TOUT87_P14_7_OUT.

Definition at line 1774 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_5N_TOUT97_P11_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT97_P11_6_OUT

IfxGtm_TOM0_5N_TOUT97_P11_6_OUT.

Definition at line 1775 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_6_TOUT106_P10_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT106_P10_4_OUT

IfxGtm_TOM0_6_TOUT106_P10_4_OUT.

Definition at line 1807 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_6_TOUT129_P12_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT129_P12_1_OUT

IfxGtm_TOM0_6_TOUT129_P12_1_OUT.

Definition at line 1808 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_6_TOUT13_P00_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT13_P00_4_OUT

IfxGtm_TOM0_6_TOUT13_P00_4_OUT.

Definition at line 1809 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_6_TOUT24_P33_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT24_P33_2_OUT

IfxGtm_TOM0_6_TOUT24_P33_2_OUT.

Definition at line 1810 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_6_TOUT29_P33_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT29_P33_7_OUT

IfxGtm_TOM0_6_TOUT29_P33_7_OUT.

Definition at line 1811 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_6_TOUT42_P23_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT42_P23_1_OUT

IfxGtm_TOM0_6_TOUT42_P23_1_OUT.

Definition at line 1812 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_6_TOUT48_P22_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT48_P22_1_OUT

IfxGtm_TOM0_6_TOUT48_P22_1_OUT.

Definition at line 1813 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_6_TOUT4_P02_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT4_P02_4_OUT

IfxGtm_TOM0_6_TOUT4_P02_4_OUT.

Definition at line 1814 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_6_TOUT59_P20_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT59_P20_0_OUT

IfxGtm_TOM0_6_TOUT59_P20_0_OUT.

Definition at line 1815 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_6_TOUT68_P20_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT68_P20_12_OUT

IfxGtm_TOM0_6_TOUT68_P20_12_OUT.

Definition at line 1816 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_6_TOUT80_P14_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT80_P14_0_OUT

IfxGtm_TOM0_6_TOUT80_P14_0_OUT.

Definition at line 1817 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_6_TOUT83_P14_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT83_P14_3_OUT

IfxGtm_TOM0_6_TOUT83_P14_3_OUT.

Definition at line 1818 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_6_TOUT92_P13_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT92_P13_1_OUT

IfxGtm_TOM0_6_TOUT92_P13_1_OUT.

Definition at line 1819 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_6_TOUT98_P11_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT98_P11_9_OUT

IfxGtm_TOM0_6_TOUT98_P11_9_OUT.

Definition at line 1820 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_6N_TOUT149_P34_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT149_P34_4_OUT

IfxGtm_TOM0_6N_TOUT149_P34_4_OUT.

Definition at line 1790 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_6N_TOUT14_P00_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT14_P00_5_OUT

IfxGtm_TOM0_6N_TOUT14_P00_5_OUT.

Definition at line 1791 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_6N_TOUT27_P33_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT27_P33_5_OUT

IfxGtm_TOM0_6N_TOUT27_P33_5_OUT.

Definition at line 1792 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_6N_TOUT30_P33_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT30_P33_8_OUT

IfxGtm_TOM0_6N_TOUT30_P33_8_OUT.

Definition at line 1793 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_6N_TOUT31_P33_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT31_P33_9_OUT

IfxGtm_TOM0_6N_TOUT31_P33_9_OUT.

Definition at line 1794 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_6N_TOUT38_P32_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT38_P32_2_OUT

IfxGtm_TOM0_6N_TOUT38_P32_2_OUT.

Definition at line 1795 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_6N_TOUT40_P32_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT40_P32_4_OUT

IfxGtm_TOM0_6N_TOUT40_P32_4_OUT.

Definition at line 1796 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_6N_TOUT49_P22_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT49_P22_2_OUT

IfxGtm_TOM0_6N_TOUT49_P22_2_OUT.

Definition at line 1797 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_6N_TOUT54_P21_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT54_P21_3_OUT

IfxGtm_TOM0_6N_TOUT54_P21_3_OUT.

Definition at line 1798 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_6N_TOUT5_P02_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT5_P02_5_OUT

IfxGtm_TOM0_6N_TOUT5_P02_5_OUT.

Definition at line 1799 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_6N_TOUT69_P20_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT69_P20_13_OUT

IfxGtm_TOM0_6N_TOUT69_P20_13_OUT.

Definition at line 1800 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_6N_TOUT78_P15_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT78_P15_7_OUT

IfxGtm_TOM0_6N_TOUT78_P15_7_OUT.

Definition at line 1801 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_6N_TOUT82_P14_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT82_P14_2_OUT

IfxGtm_TOM0_6N_TOUT82_P14_2_OUT.

Definition at line 1802 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_6N_TOUT86_P14_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT86_P14_6_OUT

IfxGtm_TOM0_6N_TOUT86_P14_6_OUT.

Definition at line 1803 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_6N_TOUT91_P13_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT91_P13_0_OUT

IfxGtm_TOM0_6N_TOUT91_P13_0_OUT.

Definition at line 1804 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_6N_TOUT97_P11_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT97_P11_6_OUT

IfxGtm_TOM0_6N_TOUT97_P11_6_OUT.

Definition at line 1805 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_6N_TOUT99_P11_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT99_P11_10_OUT

IfxGtm_TOM0_6N_TOUT99_P11_10_OUT.

Definition at line 1806 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_7_TOUT101_P11_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT101_P11_12_OUT

IfxGtm_TOM0_7_TOUT101_P11_12_OUT.

Definition at line 1838 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_7_TOUT119_P11_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT119_P11_0_OUT

IfxGtm_TOM0_7_TOUT119_P11_0_OUT.

Definition at line 1839 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_7_TOUT15_P00_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT15_P00_6_OUT

IfxGtm_TOM0_7_TOUT15_P00_6_OUT.

Definition at line 1840 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_7_TOUT25_P33_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT25_P33_3_OUT

IfxGtm_TOM0_7_TOUT25_P33_3_OUT.

Definition at line 1841 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_7_TOUT31_P33_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT31_P33_9_OUT

IfxGtm_TOM0_7_TOUT31_P33_9_OUT.

Definition at line 1842 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_7_TOUT45_P23_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT45_P23_4_OUT

IfxGtm_TOM0_7_TOUT45_P23_4_OUT.

Definition at line 1843 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_7_TOUT50_P22_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT50_P22_3_OUT

IfxGtm_TOM0_7_TOUT50_P22_3_OUT.

Definition at line 1844 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_7_TOUT6_P02_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT6_P02_6_OUT

IfxGtm_TOM0_7_TOUT6_P02_6_OUT.

Definition at line 1845 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_7_TOUT70_P20_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT70_P20_14_OUT

IfxGtm_TOM0_7_TOUT70_P20_14_OUT.

Definition at line 1846 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_7_TOUT81_P14_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT81_P14_1_OUT

IfxGtm_TOM0_7_TOUT81_P14_1_OUT.

Definition at line 1847 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_7_TOUT84_P14_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT84_P14_4_OUT

IfxGtm_TOM0_7_TOUT84_P14_4_OUT.

Definition at line 1848 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_7_TOUT92_P13_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT92_P13_1_OUT

IfxGtm_TOM0_7_TOUT92_P13_1_OUT.

Definition at line 1849 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_7_TOUT93_P13_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT93_P13_2_OUT

IfxGtm_TOM0_7_TOUT93_P13_2_OUT.

Definition at line 1850 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_7N_TOUT100_P11_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT100_P11_11_OUT

IfxGtm_TOM0_7N_TOUT100_P11_11_OUT.

Definition at line 1821 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_7N_TOUT123_P11_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT123_P11_7_OUT

IfxGtm_TOM0_7N_TOUT123_P11_7_OUT.

Definition at line 1822 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_7N_TOUT130_P22_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT130_P22_4_OUT

IfxGtm_TOM0_7N_TOUT130_P22_4_OUT.

Definition at line 1823 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_7N_TOUT150_P34_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT150_P34_5_OUT

IfxGtm_TOM0_7N_TOUT150_P34_5_OUT.

Definition at line 1824 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_7N_TOUT16_P00_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT16_P00_7_OUT

IfxGtm_TOM0_7N_TOUT16_P00_7_OUT.

Definition at line 1825 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_7N_TOUT28_P33_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT28_P33_6_OUT

IfxGtm_TOM0_7N_TOUT28_P33_6_OUT.

Definition at line 1826 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_7N_TOUT32_P33_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT32_P33_10_OUT

IfxGtm_TOM0_7N_TOUT32_P33_10_OUT.

Definition at line 1827 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_7N_TOUT33_P33_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT33_P33_11_OUT

IfxGtm_TOM0_7N_TOUT33_P33_11_OUT.

Definition at line 1828 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_7N_TOUT39_P32_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT39_P32_3_OUT

IfxGtm_TOM0_7N_TOUT39_P32_3_OUT.

Definition at line 1829 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_7N_TOUT42_P23_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT42_P23_1_OUT

IfxGtm_TOM0_7N_TOUT42_P23_1_OUT.

Definition at line 1830 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_7N_TOUT55_P21_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT55_P21_4_OUT

IfxGtm_TOM0_7N_TOUT55_P21_4_OUT.

Definition at line 1831 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_7N_TOUT71_P15_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT71_P15_0_OUT

IfxGtm_TOM0_7N_TOUT71_P15_0_OUT.

Definition at line 1832 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_7N_TOUT79_P15_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT79_P15_8_OUT

IfxGtm_TOM0_7N_TOUT79_P15_8_OUT.

Definition at line 1833 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_7N_TOUT7_P02_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT7_P02_7_OUT

IfxGtm_TOM0_7N_TOUT7_P02_7_OUT.

Definition at line 1834 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_7N_TOUT84_P14_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT84_P14_4_OUT

IfxGtm_TOM0_7N_TOUT84_P14_4_OUT.

Definition at line 1835 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_7N_TOUT88_P14_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT88_P14_8_OUT

IfxGtm_TOM0_7N_TOUT88_P14_8_OUT.

Definition at line 1836 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_7N_TOUT93_P13_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT93_P13_2_OUT

IfxGtm_TOM0_7N_TOUT93_P13_2_OUT.

Definition at line 1837 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_8_TOUT0_P02_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT0_P02_0_OUT

IfxGtm_TOM0_8_TOUT0_P02_0_OUT.

Definition at line 1851 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_8_TOUT48_P22_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT48_P22_1_OUT

IfxGtm_TOM0_8_TOUT48_P22_1_OUT.

Definition at line 1852 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_8_TOUT51_P21_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT51_P21_0_OUT

IfxGtm_TOM0_8_TOUT51_P21_0_OUT.

Definition at line 1853 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_8_TOUT8_P02_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT8_P02_8_OUT

IfxGtm_TOM0_8_TOUT8_P02_8_OUT.

Definition at line 1854 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_8_TOUT94_P13_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT94_P13_3_OUT

IfxGtm_TOM0_8_TOUT94_P13_3_OUT.

Definition at line 1855 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_8_TOUT95_P11_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT95_P11_2_OUT

IfxGtm_TOM0_8_TOUT95_P11_2_OUT.

Definition at line 1856 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_8_TOUT9_P00_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT9_P00_0_OUT

IfxGtm_TOM0_8_TOUT9_P00_0_OUT.

Definition at line 1857 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_9_TOUT10_P00_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT10_P00_1_OUT

IfxGtm_TOM0_9_TOUT10_P00_1_OUT.

Definition at line 1858 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_9_TOUT11_P00_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT11_P00_2_OUT

IfxGtm_TOM0_9_TOUT11_P00_2_OUT.

Definition at line 1859 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_9_TOUT1_P02_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT1_P02_1_OUT

IfxGtm_TOM0_9_TOUT1_P02_1_OUT.

Definition at line 1860 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_9_TOUT47_P22_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT47_P22_0_OUT

IfxGtm_TOM0_9_TOUT47_P22_0_OUT.

Definition at line 1861 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_9_TOUT52_P21_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT52_P21_1_OUT

IfxGtm_TOM0_9_TOUT52_P21_1_OUT.

Definition at line 1862 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_0_TOUT0_P02_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT0_P02_0_OUT

IfxGtm_TOM1_0_TOUT0_P02_0_OUT.

Definition at line 1868 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_0_TOUT18_P00_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT18_P00_9_OUT

IfxGtm_TOM1_0_TOUT18_P00_9_OUT.

Definition at line 1869 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_0_TOUT26_P33_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT26_P33_4_OUT

IfxGtm_TOM1_0_TOUT26_P33_4_OUT.

Definition at line 1870 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_0_TOUT32_P33_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT32_P33_10_OUT

IfxGtm_TOM1_0_TOUT32_P33_10_OUT.

Definition at line 1871 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_0_TOUT68_P20_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT68_P20_12_OUT

IfxGtm_TOM1_0_TOUT68_P20_12_OUT.

Definition at line 1872 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_0_TOUT76_P15_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT76_P15_5_OUT

IfxGtm_TOM1_0_TOUT76_P15_5_OUT.

Definition at line 1873 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_0_TOUT77_P15_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT77_P15_6_OUT

IfxGtm_TOM1_0_TOUT77_P15_6_OUT.

Definition at line 1874 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_0_TOUT85_P14_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT85_P14_5_OUT

IfxGtm_TOM1_0_TOUT85_P14_5_OUT.

Definition at line 1875 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_0_TOUT8_P02_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT8_P02_8_OUT

IfxGtm_TOM1_0_TOUT8_P02_8_OUT.

Definition at line 1876 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_0_TOUT9_P00_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT9_P00_0_OUT

IfxGtm_TOM1_0_TOUT9_P00_0_OUT.

Definition at line 1877 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_0N_TOUT17_P00_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0N_TOUT17_P00_8_OUT

IfxGtm_TOM1_0N_TOUT17_P00_8_OUT.

Definition at line 1863 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_0N_TOUT25_P33_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0N_TOUT25_P33_3_OUT

IfxGtm_TOM1_0N_TOUT25_P33_3_OUT.

Definition at line 1864 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_0N_TOUT34_P33_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0N_TOUT34_P33_12_OUT

IfxGtm_TOM1_0N_TOUT34_P33_12_OUT.

Definition at line 1865 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_0N_TOUT75_P15_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0N_TOUT75_P15_4_OUT

IfxGtm_TOM1_0N_TOUT75_P15_4_OUT.

Definition at line 1866 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_0N_TOUT7_P02_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0N_TOUT7_P02_7_OUT

IfxGtm_TOM1_0N_TOUT7_P02_7_OUT.

Definition at line 1867 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_10_TOUT143_P33_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT143_P33_14_OUT

IfxGtm_TOM1_10_TOUT143_P33_14_OUT.

Definition at line 1878 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_10_TOUT266_P10_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT266_P10_10_OUT

IfxGtm_TOM1_10_TOUT266_P10_10_OUT.

Definition at line 1879 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_10_TOUT2_P02_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT2_P02_2_OUT

IfxGtm_TOM1_10_TOUT2_P02_2_OUT.

Definition at line 1880 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_10_TOUT62_P20_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT62_P20_6_OUT

IfxGtm_TOM1_10_TOUT62_P20_6_OUT.

Definition at line 1881 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_11_TOUT144_P33_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT144_P33_15_OUT

IfxGtm_TOM1_11_TOUT144_P33_15_OUT.

Definition at line 1882 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_11_TOUT267_P10_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT267_P10_14_OUT

IfxGtm_TOM1_11_TOUT267_P10_14_OUT.

Definition at line 1883 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_11_TOUT3_P02_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT3_P02_3_OUT

IfxGtm_TOM1_11_TOUT3_P02_3_OUT.

Definition at line 1884 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_11_TOUT60_P20_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT60_P20_1_OUT

IfxGtm_TOM1_11_TOUT60_P20_1_OUT.

Definition at line 1885 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_11_TOUT63_P20_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT63_P20_7_OUT

IfxGtm_TOM1_11_TOUT63_P20_7_OUT.

Definition at line 1886 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_12_TOUT268_P10_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT268_P10_13_OUT

IfxGtm_TOM1_12_TOUT268_P10_13_OUT.

Definition at line 1887 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_12_TOUT34_P33_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT34_P33_12_OUT

IfxGtm_TOM1_12_TOUT34_P33_12_OUT.

Definition at line 1888 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_12_TOUT4_P02_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT4_P02_4_OUT

IfxGtm_TOM1_12_TOUT4_P02_4_OUT.

Definition at line 1889 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_12_TOUT61_P20_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT61_P20_3_OUT

IfxGtm_TOM1_12_TOUT61_P20_3_OUT.

Definition at line 1890 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_13_TOUT146_P34_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT146_P34_1_OUT

IfxGtm_TOM1_13_TOUT146_P34_1_OUT.

Definition at line 1891 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_13_TOUT269_P10_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT269_P10_11_OUT

IfxGtm_TOM1_13_TOUT269_P10_11_OUT.

Definition at line 1892 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_13_TOUT35_P33_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT35_P33_13_OUT

IfxGtm_TOM1_13_TOUT35_P33_13_OUT.

Definition at line 1893 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_13_TOUT5_P02_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT5_P02_5_OUT

IfxGtm_TOM1_13_TOUT5_P02_5_OUT.

Definition at line 1894 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_13_TOUT65_P20_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT65_P20_9_OUT

IfxGtm_TOM1_13_TOUT65_P20_9_OUT.

Definition at line 1895 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_14_TOUT147_P34_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT147_P34_2_OUT

IfxGtm_TOM1_14_TOUT147_P34_2_OUT.

Definition at line 1896 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_14_TOUT270_P10_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT270_P10_15_OUT

IfxGtm_TOM1_14_TOUT270_P10_15_OUT.

Definition at line 1897 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_14_TOUT36_P32_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT36_P32_0_OUT

IfxGtm_TOM1_14_TOUT36_P32_0_OUT.

Definition at line 1898 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_14_TOUT66_P20_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT66_P20_10_OUT

IfxGtm_TOM1_14_TOUT66_P20_10_OUT.

Definition at line 1899 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_14_TOUT6_P02_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT6_P02_6_OUT

IfxGtm_TOM1_14_TOUT6_P02_6_OUT.

Definition at line 1900 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_15_TOUT148_P34_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT148_P34_3_OUT

IfxGtm_TOM1_15_TOUT148_P34_3_OUT.

Definition at line 1901 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_15_TOUT150_P34_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT150_P34_5_OUT

IfxGtm_TOM1_15_TOUT150_P34_5_OUT.

Definition at line 1902 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_15_TOUT37_P32_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT37_P32_1_OUT

IfxGtm_TOM1_15_TOUT37_P32_1_OUT.

Definition at line 1903 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_15_TOUT67_P20_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT67_P20_11_OUT

IfxGtm_TOM1_15_TOUT67_P20_11_OUT.

Definition at line 1904 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_15_TOUT7_P02_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT7_P02_7_OUT

IfxGtm_TOM1_15_TOUT7_P02_7_OUT.

Definition at line 1905 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_1_TOUT10_P00_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT10_P00_1_OUT

IfxGtm_TOM1_1_TOUT10_P00_1_OUT.

Definition at line 1914 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_1_TOUT116_P02_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT116_P02_9_OUT

IfxGtm_TOM1_1_TOUT116_P02_9_OUT.

Definition at line 1915 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_1_TOUT11_P00_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT11_P00_2_OUT

IfxGtm_TOM1_1_TOUT11_P00_2_OUT.

Definition at line 1916 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_1_TOUT19_P00_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT19_P00_10_OUT

IfxGtm_TOM1_1_TOUT19_P00_10_OUT.

Definition at line 1917 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_1_TOUT1_P02_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT1_P02_1_OUT

IfxGtm_TOM1_1_TOUT1_P02_1_OUT.

Definition at line 1918 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_1_TOUT242_P15_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT242_P15_10_OUT

IfxGtm_TOM1_1_TOUT242_P15_10_OUT.

Definition at line 1919 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_1_TOUT27_P33_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT27_P33_5_OUT

IfxGtm_TOM1_1_TOUT27_P33_5_OUT.

Definition at line 1920 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_1_TOUT31_P33_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT31_P33_9_OUT

IfxGtm_TOM1_1_TOUT31_P33_9_OUT.

Definition at line 1921 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_1_TOUT69_P20_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT69_P20_13_OUT

IfxGtm_TOM1_1_TOUT69_P20_13_OUT.

Definition at line 1922 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_1_TOUT78_P15_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT78_P15_7_OUT

IfxGtm_TOM1_1_TOUT78_P15_7_OUT.

Definition at line 1923 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_1_TOUT86_P14_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT86_P14_6_OUT

IfxGtm_TOM1_1_TOUT86_P14_6_OUT.

Definition at line 1924 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_1N_TOUT14_P00_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT14_P00_5_OUT

IfxGtm_TOM1_1N_TOUT14_P00_5_OUT.

Definition at line 1906 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_1N_TOUT22_P33_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT22_P33_0_OUT

IfxGtm_TOM1_1N_TOUT22_P33_0_OUT.

Definition at line 1907 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_1N_TOUT245_P15_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT245_P15_13_OUT

IfxGtm_TOM1_1N_TOUT245_P15_13_OUT.

Definition at line 1908 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_1N_TOUT30_P33_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT30_P33_8_OUT

IfxGtm_TOM1_1N_TOUT30_P33_8_OUT.

Definition at line 1909 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_1N_TOUT35_P33_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT35_P33_13_OUT

IfxGtm_TOM1_1N_TOUT35_P33_13_OUT.

Definition at line 1910 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_1N_TOUT39_P32_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT39_P32_3_OUT

IfxGtm_TOM1_1N_TOUT39_P32_3_OUT.

Definition at line 1911 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_1N_TOUT4_P02_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT4_P02_4_OUT

IfxGtm_TOM1_1N_TOUT4_P02_4_OUT.

Definition at line 1912 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_1N_TOUT72_P15_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT72_P15_1_OUT

IfxGtm_TOM1_1N_TOUT72_P15_1_OUT.

Definition at line 1913 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_2_TOUT117_P02_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT117_P02_10_OUT

IfxGtm_TOM1_2_TOUT117_P02_10_OUT.

Definition at line 1933 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_2_TOUT12_P00_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT12_P00_3_OUT

IfxGtm_TOM1_2_TOUT12_P00_3_OUT.

Definition at line 1934 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_2_TOUT20_P00_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT20_P00_11_OUT

IfxGtm_TOM1_2_TOUT20_P00_11_OUT.

Definition at line 1935 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_2_TOUT243_P15_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT243_P15_11_OUT

IfxGtm_TOM1_2_TOUT243_P15_11_OUT.

Definition at line 1936 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_2_TOUT28_P33_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT28_P33_6_OUT

IfxGtm_TOM1_2_TOUT28_P33_6_OUT.

Definition at line 1937 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_2_TOUT2_P02_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT2_P02_2_OUT

IfxGtm_TOM1_2_TOUT2_P02_2_OUT.

Definition at line 1938 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_2_TOUT33_P33_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT33_P33_11_OUT

IfxGtm_TOM1_2_TOUT33_P33_11_OUT.

Definition at line 1939 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_2_TOUT70_P20_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT70_P20_14_OUT

IfxGtm_TOM1_2_TOUT70_P20_14_OUT.

Definition at line 1940 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_2_TOUT79_P15_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT79_P15_8_OUT

IfxGtm_TOM1_2_TOUT79_P15_8_OUT.

Definition at line 1941 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_2N_TOUT143_P33_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT143_P33_14_OUT

IfxGtm_TOM1_2N_TOUT143_P33_14_OUT.

Definition at line 1925 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_2N_TOUT15_P00_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT15_P00_6_OUT

IfxGtm_TOM1_2N_TOUT15_P00_6_OUT.

Definition at line 1926 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_2N_TOUT23_P33_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT23_P33_1_OUT

IfxGtm_TOM1_2N_TOUT23_P33_1_OUT.

Definition at line 1927 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_2N_TOUT246_P15_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT246_P15_14_OUT

IfxGtm_TOM1_2N_TOUT246_P15_14_OUT.

Definition at line 1928 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_2N_TOUT40_P32_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT40_P32_4_OUT

IfxGtm_TOM1_2N_TOUT40_P32_4_OUT.

Definition at line 1929 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_2N_TOUT41_P23_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT41_P23_0_OUT

IfxGtm_TOM1_2N_TOUT41_P23_0_OUT.

Definition at line 1930 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_2N_TOUT5_P02_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT5_P02_5_OUT

IfxGtm_TOM1_2N_TOUT5_P02_5_OUT.

Definition at line 1931 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_2N_TOUT73_P15_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT73_P15_2_OUT

IfxGtm_TOM1_2N_TOUT73_P15_2_OUT.

Definition at line 1932 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_3_TOUT118_P02_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT118_P02_11_OUT

IfxGtm_TOM1_3_TOUT118_P02_11_OUT.

Definition at line 1949 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_3_TOUT13_P00_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT13_P00_4_OUT

IfxGtm_TOM1_3_TOUT13_P00_4_OUT.

Definition at line 1950 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_3_TOUT21_P00_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT21_P00_12_OUT

IfxGtm_TOM1_3_TOUT21_P00_12_OUT.

Definition at line 1951 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_3_TOUT244_P15_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT244_P15_12_OUT

IfxGtm_TOM1_3_TOUT244_P15_12_OUT.

Definition at line 1952 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_3_TOUT29_P33_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT29_P33_7_OUT

IfxGtm_TOM1_3_TOUT29_P33_7_OUT.

Definition at line 1953 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_3_TOUT38_P32_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT38_P32_2_OUT

IfxGtm_TOM1_3_TOUT38_P32_2_OUT.

Definition at line 1954 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_3_TOUT3_P02_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT3_P02_3_OUT

IfxGtm_TOM1_3_TOUT3_P02_3_OUT.

Definition at line 1955 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_3_TOUT71_P15_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT71_P15_0_OUT

IfxGtm_TOM1_3_TOUT71_P15_0_OUT.

Definition at line 1956 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_3_TOUT80_P14_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT80_P14_0_OUT

IfxGtm_TOM1_3_TOUT80_P14_0_OUT.

Definition at line 1957 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_3N_TOUT144_P33_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3N_TOUT144_P33_15_OUT

IfxGtm_TOM1_3N_TOUT144_P33_15_OUT.

Definition at line 1942 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_3N_TOUT16_P00_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3N_TOUT16_P00_7_OUT

IfxGtm_TOM1_3N_TOUT16_P00_7_OUT.

Definition at line 1943 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_3N_TOUT247_P15_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3N_TOUT247_P15_15_OUT

IfxGtm_TOM1_3N_TOUT247_P15_15_OUT.

Definition at line 1944 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_3N_TOUT24_P33_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3N_TOUT24_P33_2_OUT

IfxGtm_TOM1_3N_TOUT24_P33_2_OUT.

Definition at line 1945 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_3N_TOUT43_P23_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3N_TOUT43_P23_2_OUT

IfxGtm_TOM1_3N_TOUT43_P23_2_OUT.

Definition at line 1946 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_3N_TOUT6_P02_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3N_TOUT6_P02_6_OUT

IfxGtm_TOM1_3N_TOUT6_P02_6_OUT.

Definition at line 1947 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_3N_TOUT74_P15_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3N_TOUT74_P15_3_OUT

IfxGtm_TOM1_3N_TOUT74_P15_3_OUT.

Definition at line 1948 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_4_TOUT0_P02_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT0_P02_0_OUT

IfxGtm_TOM1_4_TOUT0_P02_0_OUT.

Definition at line 1973 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_4_TOUT124_P11_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT124_P11_8_OUT

IfxGtm_TOM1_4_TOUT124_P11_8_OUT.

Definition at line 1974 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_4_TOUT14_P00_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT14_P00_5_OUT

IfxGtm_TOM1_4_TOUT14_P00_5_OUT.

Definition at line 1975 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_4_TOUT22_P33_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT22_P33_0_OUT

IfxGtm_TOM1_4_TOUT22_P33_0_OUT.

Definition at line 1976 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_4_TOUT245_P15_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT245_P15_13_OUT

IfxGtm_TOM1_4_TOUT245_P15_13_OUT.

Definition at line 1977 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_4_TOUT30_P33_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT30_P33_8_OUT

IfxGtm_TOM1_4_TOUT30_P33_8_OUT.

Definition at line 1978 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_4_TOUT37_P32_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT37_P32_1_OUT

IfxGtm_TOM1_4_TOUT37_P32_1_OUT.

Definition at line 1979 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_4_TOUT39_P32_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT39_P32_3_OUT

IfxGtm_TOM1_4_TOUT39_P32_3_OUT.

Definition at line 1980 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_4_TOUT53_P21_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT53_P21_2_OUT

IfxGtm_TOM1_4_TOUT53_P21_2_OUT.

Definition at line 1981 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_4_TOUT64_P20_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT64_P20_8_OUT

IfxGtm_TOM1_4_TOUT64_P20_8_OUT.

Definition at line 1982 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_4_TOUT72_P15_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT72_P15_1_OUT

IfxGtm_TOM1_4_TOUT72_P15_1_OUT.

Definition at line 1983 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_4_TOUT81_P14_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT81_P14_1_OUT

IfxGtm_TOM1_4_TOUT81_P14_1_OUT.

Definition at line 1984 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_4_TOUT94_P13_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT94_P13_3_OUT

IfxGtm_TOM1_4_TOUT94_P13_3_OUT.

Definition at line 1985 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_4_TOUT9_P00_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT9_P00_0_OUT

IfxGtm_TOM1_4_TOUT9_P00_0_OUT.

Definition at line 1986 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_4N_TOUT10_P00_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT10_P00_1_OUT

IfxGtm_TOM1_4N_TOUT10_P00_1_OUT.

Definition at line 1958 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_4N_TOUT13_P00_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT13_P00_4_OUT

IfxGtm_TOM1_4N_TOUT13_P00_4_OUT.

Definition at line 1959 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_4N_TOUT143_P33_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT143_P33_14_OUT

IfxGtm_TOM1_4N_TOUT143_P33_14_OUT.

Definition at line 1960 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_4N_TOUT147_P34_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT147_P34_2_OUT

IfxGtm_TOM1_4N_TOUT147_P34_2_OUT.

Definition at line 1961 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_4N_TOUT1_P02_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT1_P02_1_OUT

IfxGtm_TOM1_4N_TOUT1_P02_1_OUT.

Definition at line 1962 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_4N_TOUT21_P00_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT21_P00_12_OUT

IfxGtm_TOM1_4N_TOUT21_P00_12_OUT.

Definition at line 1963 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_4N_TOUT244_P15_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT244_P15_12_OUT

IfxGtm_TOM1_4N_TOUT244_P15_12_OUT.

Definition at line 1964 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_4N_TOUT29_P33_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT29_P33_7_OUT

IfxGtm_TOM1_4N_TOUT29_P33_7_OUT.

Definition at line 1965 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_4N_TOUT36_P32_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT36_P32_0_OUT

IfxGtm_TOM1_4N_TOUT36_P32_0_OUT.

Definition at line 1966 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_4N_TOUT54_P21_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT54_P21_3_OUT

IfxGtm_TOM1_4N_TOUT54_P21_3_OUT.

Definition at line 1967 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_4N_TOUT65_P20_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT65_P20_9_OUT

IfxGtm_TOM1_4N_TOUT65_P20_9_OUT.

Definition at line 1968 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_4N_TOUT71_P15_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT71_P15_0_OUT

IfxGtm_TOM1_4N_TOUT71_P15_0_OUT.

Definition at line 1969 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_4N_TOUT73_P15_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT73_P15_2_OUT

IfxGtm_TOM1_4N_TOUT73_P15_2_OUT.

Definition at line 1970 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_4N_TOUT8_P02_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT8_P02_8_OUT

IfxGtm_TOM1_4N_TOUT8_P02_8_OUT.

Definition at line 1971 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_4N_TOUT95_P11_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT95_P11_2_OUT

IfxGtm_TOM1_4N_TOUT95_P11_2_OUT.

Definition at line 1972 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_5_TOUT11_P00_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT11_P00_2_OUT

IfxGtm_TOM1_5_TOUT11_P00_2_OUT.

Definition at line 2002 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_5_TOUT15_P00_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT15_P00_6_OUT

IfxGtm_TOM1_5_TOUT15_P00_6_OUT.

Definition at line 2003 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_5_TOUT23_P33_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT23_P33_1_OUT

IfxGtm_TOM1_5_TOUT23_P33_1_OUT.

Definition at line 2004 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_5_TOUT246_P15_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT246_P15_14_OUT

IfxGtm_TOM1_5_TOUT246_P15_14_OUT.

Definition at line 2005 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_5_TOUT27_P33_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT27_P33_5_OUT

IfxGtm_TOM1_5_TOUT27_P33_5_OUT.

Definition at line 2006 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_5_TOUT2_P02_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT2_P02_2_OUT

IfxGtm_TOM1_5_TOUT2_P02_2_OUT.

Definition at line 2007 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_5_TOUT40_P32_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT40_P32_4_OUT

IfxGtm_TOM1_5_TOUT40_P32_4_OUT.

Definition at line 2008 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_5_TOUT41_P23_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT41_P23_0_OUT

IfxGtm_TOM1_5_TOUT41_P23_0_OUT.

Definition at line 2009 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_5_TOUT55_P21_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT55_P21_4_OUT

IfxGtm_TOM1_5_TOUT55_P21_4_OUT.

Definition at line 2010 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_5_TOUT66_P20_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT66_P20_10_OUT

IfxGtm_TOM1_5_TOUT66_P20_10_OUT.

Definition at line 2011 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_5_TOUT73_P15_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT73_P15_2_OUT

IfxGtm_TOM1_5_TOUT73_P15_2_OUT.

Definition at line 2012 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_5_TOUT74_P15_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT74_P15_3_OUT

IfxGtm_TOM1_5_TOUT74_P15_3_OUT.

Definition at line 2013 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_5_TOUT82_P14_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT82_P14_2_OUT

IfxGtm_TOM1_5_TOUT82_P14_2_OUT.

Definition at line 2014 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_5_TOUT96_P11_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT96_P11_3_OUT

IfxGtm_TOM1_5_TOUT96_P11_3_OUT.

Definition at line 2015 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_5N_TOUT12_P00_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT12_P00_3_OUT

IfxGtm_TOM1_5N_TOUT12_P00_3_OUT.

Definition at line 1987 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_5N_TOUT144_P33_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT144_P33_15_OUT

IfxGtm_TOM1_5N_TOUT144_P33_15_OUT.

Definition at line 1988 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_5N_TOUT148_P34_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT148_P34_3_OUT

IfxGtm_TOM1_5N_TOUT148_P34_3_OUT.

Definition at line 1989 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_5N_TOUT18_P00_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT18_P00_9_OUT

IfxGtm_TOM1_5N_TOUT18_P00_9_OUT.

Definition at line 1990 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_5N_TOUT26_P33_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT26_P33_4_OUT

IfxGtm_TOM1_5N_TOUT26_P33_4_OUT.

Definition at line 1991 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_5N_TOUT28_P33_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT28_P33_6_OUT

IfxGtm_TOM1_5N_TOUT28_P33_6_OUT.

Definition at line 1992 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_5N_TOUT32_P33_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT32_P33_10_OUT

IfxGtm_TOM1_5N_TOUT32_P33_10_OUT.

Definition at line 1993 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_5N_TOUT37_P32_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT37_P32_1_OUT

IfxGtm_TOM1_5N_TOUT37_P32_1_OUT.

Definition at line 1994 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_5N_TOUT3_P02_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT3_P02_3_OUT

IfxGtm_TOM1_5N_TOUT3_P02_3_OUT.

Definition at line 1995 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_5N_TOUT56_P21_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT56_P21_5_OUT

IfxGtm_TOM1_5N_TOUT56_P21_5_OUT.

Definition at line 1996 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_5N_TOUT67_P20_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT67_P20_11_OUT

IfxGtm_TOM1_5N_TOUT67_P20_11_OUT.

Definition at line 1997 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_5N_TOUT76_P15_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT76_P15_5_OUT

IfxGtm_TOM1_5N_TOUT76_P15_5_OUT.

Definition at line 1998 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_5N_TOUT77_P15_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT77_P15_6_OUT

IfxGtm_TOM1_5N_TOUT77_P15_6_OUT.

Definition at line 1999 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_5N_TOUT97_P11_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT97_P11_6_OUT

IfxGtm_TOM1_5N_TOUT97_P11_6_OUT.

Definition at line 2000 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_5N_TOUT9_P00_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT9_P00_0_OUT

IfxGtm_TOM1_5N_TOUT9_P00_0_OUT.

Definition at line 2001 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_6_TOUT13_P00_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT13_P00_4_OUT

IfxGtm_TOM1_6_TOUT13_P00_4_OUT.

Definition at line 2034 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_6_TOUT16_P00_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT16_P00_7_OUT

IfxGtm_TOM1_6_TOUT16_P00_7_OUT.

Definition at line 2035 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_6_TOUT247_P15_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT247_P15_15_OUT

IfxGtm_TOM1_6_TOUT247_P15_15_OUT.

Definition at line 2036 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_6_TOUT24_P33_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT24_P33_2_OUT

IfxGtm_TOM1_6_TOUT24_P33_2_OUT.

Definition at line 2037 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_6_TOUT29_P33_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT29_P33_7_OUT

IfxGtm_TOM1_6_TOUT29_P33_7_OUT.

Definition at line 2038 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_6_TOUT43_P23_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT43_P23_2_OUT

IfxGtm_TOM1_6_TOUT43_P23_2_OUT.

Definition at line 2039 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_6_TOUT48_P22_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT48_P22_1_OUT

IfxGtm_TOM1_6_TOUT48_P22_1_OUT.

Definition at line 2040 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_6_TOUT4_P02_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT4_P02_4_OUT

IfxGtm_TOM1_6_TOUT4_P02_4_OUT.

Definition at line 2041 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_6_TOUT68_P20_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT68_P20_12_OUT

IfxGtm_TOM1_6_TOUT68_P20_12_OUT.

Definition at line 2042 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_6_TOUT74_P15_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT74_P15_3_OUT

IfxGtm_TOM1_6_TOUT74_P15_3_OUT.

Definition at line 2043 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_6_TOUT80_P14_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT80_P14_0_OUT

IfxGtm_TOM1_6_TOUT80_P14_0_OUT.

Definition at line 2044 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_6_TOUT83_P14_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT83_P14_3_OUT

IfxGtm_TOM1_6_TOUT83_P14_3_OUT.

Definition at line 2045 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_6_TOUT98_P11_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT98_P11_9_OUT

IfxGtm_TOM1_6_TOUT98_P11_9_OUT.

Definition at line 2046 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_6N_TOUT10_P00_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT10_P00_1_OUT

IfxGtm_TOM1_6N_TOUT10_P00_1_OUT.

Definition at line 2016 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_6N_TOUT11_P00_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT11_P00_2_OUT

IfxGtm_TOM1_6N_TOUT11_P00_2_OUT.

Definition at line 2017 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_6N_TOUT149_P34_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT149_P34_4_OUT

IfxGtm_TOM1_6N_TOUT149_P34_4_OUT.

Definition at line 2018 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_6N_TOUT14_P00_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT14_P00_5_OUT

IfxGtm_TOM1_6N_TOUT14_P00_5_OUT.

Definition at line 2019 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_6N_TOUT19_P00_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT19_P00_10_OUT

IfxGtm_TOM1_6N_TOUT19_P00_10_OUT.

Definition at line 2020 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_6N_TOUT242_P15_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT242_P15_10_OUT

IfxGtm_TOM1_6N_TOUT242_P15_10_OUT.

Definition at line 2021 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_6N_TOUT27_P33_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT27_P33_5_OUT

IfxGtm_TOM1_6N_TOUT27_P33_5_OUT.

Definition at line 2022 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_6N_TOUT30_P33_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT30_P33_8_OUT

IfxGtm_TOM1_6N_TOUT30_P33_8_OUT.

Definition at line 2023 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_6N_TOUT31_P33_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT31_P33_9_OUT

IfxGtm_TOM1_6N_TOUT31_P33_9_OUT.

Definition at line 2024 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_6N_TOUT38_P32_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT38_P32_2_OUT

IfxGtm_TOM1_6N_TOUT38_P32_2_OUT.

Definition at line 2025 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_6N_TOUT40_P32_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT40_P32_4_OUT

IfxGtm_TOM1_6N_TOUT40_P32_4_OUT.

Definition at line 2026 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_6N_TOUT49_P22_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT49_P22_2_OUT

IfxGtm_TOM1_6N_TOUT49_P22_2_OUT.

Definition at line 2027 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_6N_TOUT5_P02_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT5_P02_5_OUT

IfxGtm_TOM1_6N_TOUT5_P02_5_OUT.

Definition at line 2028 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_6N_TOUT69_P20_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT69_P20_13_OUT

IfxGtm_TOM1_6N_TOUT69_P20_13_OUT.

Definition at line 2029 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_6N_TOUT78_P15_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT78_P15_7_OUT

IfxGtm_TOM1_6N_TOUT78_P15_7_OUT.

Definition at line 2030 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_6N_TOUT82_P14_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT82_P14_2_OUT

IfxGtm_TOM1_6N_TOUT82_P14_2_OUT.

Definition at line 2031 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_6N_TOUT91_P13_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT91_P13_0_OUT

IfxGtm_TOM1_6N_TOUT91_P13_0_OUT.

Definition at line 2032 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_6N_TOUT99_P11_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT99_P11_10_OUT

IfxGtm_TOM1_6N_TOUT99_P11_10_OUT.

Definition at line 2033 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_7_TOUT101_P11_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT101_P11_12_OUT

IfxGtm_TOM1_7_TOUT101_P11_12_OUT.

Definition at line 2064 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_7_TOUT15_P00_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT15_P00_6_OUT

IfxGtm_TOM1_7_TOUT15_P00_6_OUT.

Definition at line 2065 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_7_TOUT17_P00_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT17_P00_8_OUT

IfxGtm_TOM1_7_TOUT17_P00_8_OUT.

Definition at line 2066 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_7_TOUT248_P13_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT248_P13_9_OUT

IfxGtm_TOM1_7_TOUT248_P13_9_OUT.

Definition at line 2067 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_7_TOUT25_P33_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT25_P33_3_OUT

IfxGtm_TOM1_7_TOUT25_P33_3_OUT.

Definition at line 2068 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_7_TOUT31_P33_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT31_P33_9_OUT

IfxGtm_TOM1_7_TOUT31_P33_9_OUT.

Definition at line 2069 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_7_TOUT44_P23_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT44_P23_3_OUT

IfxGtm_TOM1_7_TOUT44_P23_3_OUT.

Definition at line 2070 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_7_TOUT45_P23_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT45_P23_4_OUT

IfxGtm_TOM1_7_TOUT45_P23_4_OUT.

Definition at line 2071 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_7_TOUT50_P22_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT50_P22_3_OUT

IfxGtm_TOM1_7_TOUT50_P22_3_OUT.

Definition at line 2072 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_7_TOUT64_P20_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT64_P20_8_OUT

IfxGtm_TOM1_7_TOUT64_P20_8_OUT.

Definition at line 2073 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_7_TOUT6_P02_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT6_P02_6_OUT

IfxGtm_TOM1_7_TOUT6_P02_6_OUT.

Definition at line 2074 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_7_TOUT70_P20_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT70_P20_14_OUT

IfxGtm_TOM1_7_TOUT70_P20_14_OUT.

Definition at line 2075 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_7_TOUT75_P15_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT75_P15_4_OUT

IfxGtm_TOM1_7_TOUT75_P15_4_OUT.

Definition at line 2076 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_7_TOUT81_P14_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT81_P14_1_OUT

IfxGtm_TOM1_7_TOUT81_P14_1_OUT.

Definition at line 2077 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_7_TOUT84_P14_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT84_P14_4_OUT

IfxGtm_TOM1_7_TOUT84_P14_4_OUT.

Definition at line 2078 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_7_TOUT92_P13_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT92_P13_1_OUT

IfxGtm_TOM1_7_TOUT92_P13_1_OUT.

Definition at line 2079 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_7N_TOUT100_P11_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT100_P11_11_OUT

IfxGtm_TOM1_7N_TOUT100_P11_11_OUT.

Definition at line 2047 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_7N_TOUT12_P00_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT12_P00_3_OUT

IfxGtm_TOM1_7N_TOUT12_P00_3_OUT.

Definition at line 2048 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_7N_TOUT130_P22_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT130_P22_4_OUT

IfxGtm_TOM1_7N_TOUT130_P22_4_OUT.

Definition at line 2049 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_7N_TOUT150_P34_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT150_P34_5_OUT

IfxGtm_TOM1_7N_TOUT150_P34_5_OUT.

Definition at line 2050 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_7N_TOUT16_P00_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT16_P00_7_OUT

IfxGtm_TOM1_7N_TOUT16_P00_7_OUT.

Definition at line 2051 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_7N_TOUT20_P00_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT20_P00_11_OUT

IfxGtm_TOM1_7N_TOUT20_P00_11_OUT.

Definition at line 2052 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_7N_TOUT243_P15_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT243_P15_11_OUT

IfxGtm_TOM1_7N_TOUT243_P15_11_OUT.

Definition at line 2053 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_7N_TOUT28_P33_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT28_P33_6_OUT

IfxGtm_TOM1_7N_TOUT28_P33_6_OUT.

Definition at line 2054 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_7N_TOUT32_P33_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT32_P33_10_OUT

IfxGtm_TOM1_7N_TOUT32_P33_10_OUT.

Definition at line 2055 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_7N_TOUT33_P33_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT33_P33_11_OUT

IfxGtm_TOM1_7N_TOUT33_P33_11_OUT.

Definition at line 2056 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_7N_TOUT39_P32_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT39_P32_3_OUT

IfxGtm_TOM1_7N_TOUT39_P32_3_OUT.

Definition at line 2057 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_7N_TOUT42_P23_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT42_P23_1_OUT

IfxGtm_TOM1_7N_TOUT42_P23_1_OUT.

Definition at line 2058 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_7N_TOUT71_P15_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT71_P15_0_OUT

IfxGtm_TOM1_7N_TOUT71_P15_0_OUT.

Definition at line 2059 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_7N_TOUT79_P15_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT79_P15_8_OUT

IfxGtm_TOM1_7N_TOUT79_P15_8_OUT.

Definition at line 2060 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_7N_TOUT7_P02_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT7_P02_7_OUT

IfxGtm_TOM1_7N_TOUT7_P02_7_OUT.

Definition at line 2061 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_7N_TOUT84_P14_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT84_P14_4_OUT

IfxGtm_TOM1_7N_TOUT84_P14_4_OUT.

Definition at line 2062 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_7N_TOUT93_P13_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT93_P13_2_OUT

IfxGtm_TOM1_7N_TOUT93_P13_2_OUT.

Definition at line 2063 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_8_TOUT0_P02_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT0_P02_0_OUT

IfxGtm_TOM1_8_TOUT0_P02_0_OUT.

Definition at line 2080 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_8_TOUT128_P12_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT128_P12_0_OUT

IfxGtm_TOM1_8_TOUT128_P12_0_OUT.

Definition at line 2081 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_8_TOUT141_P32_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT141_P32_6_OUT

IfxGtm_TOM1_8_TOUT141_P32_6_OUT.

Definition at line 2082 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_8_TOUT249_P13_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT249_P13_12_OUT

IfxGtm_TOM1_8_TOUT249_P13_12_OUT.

Definition at line 2083 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_9_TOUT129_P12_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT129_P12_1_OUT

IfxGtm_TOM1_9_TOUT129_P12_1_OUT.

Definition at line 2084 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_9_TOUT142_P32_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT142_P32_7_OUT

IfxGtm_TOM1_9_TOUT142_P32_7_OUT.

Definition at line 2085 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_9_TOUT1_P02_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT1_P02_1_OUT

IfxGtm_TOM1_9_TOUT1_P02_1_OUT.

Definition at line 2086 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_9_TOUT265_P10_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT265_P10_9_OUT

IfxGtm_TOM1_9_TOUT265_P10_9_OUT.

Definition at line 2087 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_0_TOUT119_P11_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT119_P11_0_OUT

IfxGtm_TOM2_0_TOUT119_P11_0_OUT.

Definition at line 2096 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_0_TOUT120_P11_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT120_P11_1_OUT

IfxGtm_TOM2_0_TOUT120_P11_1_OUT.

Definition at line 2097 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_0_TOUT250_P13_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT250_P13_11_OUT

IfxGtm_TOM2_0_TOUT250_P13_11_OUT.

Definition at line 2098 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_0_TOUT48_P22_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT48_P22_1_OUT

IfxGtm_TOM2_0_TOUT48_P22_1_OUT.

Definition at line 2099 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_0_TOUT53_P21_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT53_P21_2_OUT

IfxGtm_TOM2_0_TOUT53_P21_2_OUT.

Definition at line 2100 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_0_TOUT65_P20_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT65_P20_9_OUT

IfxGtm_TOM2_0_TOUT65_P20_9_OUT.

Definition at line 2101 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_0_TOUT87_P14_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT87_P14_7_OUT

IfxGtm_TOM2_0_TOUT87_P14_7_OUT.

Definition at line 2102 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_0_TOUT94_P13_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT94_P13_3_OUT

IfxGtm_TOM2_0_TOUT94_P13_3_OUT.

Definition at line 2103 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_0_TOUT95_P11_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT95_P11_2_OUT

IfxGtm_TOM2_0_TOUT95_P11_2_OUT.

Definition at line 2104 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_0N_TOUT101_P11_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT101_P11_12_OUT

IfxGtm_TOM2_0N_TOUT101_P11_12_OUT.

Definition at line 2088 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_0N_TOUT126_P11_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT126_P11_14_OUT

IfxGtm_TOM2_0N_TOUT126_P11_14_OUT.

Definition at line 2089 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_0N_TOUT264_P13_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT264_P13_15_OUT

IfxGtm_TOM2_0N_TOUT264_P13_15_OUT.

Definition at line 2090 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_0N_TOUT43_P23_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT43_P23_2_OUT

IfxGtm_TOM2_0N_TOUT43_P23_2_OUT.

Definition at line 2091 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_0N_TOUT51_P21_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT51_P21_0_OUT

IfxGtm_TOM2_0N_TOUT51_P21_0_OUT.

Definition at line 2092 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_0N_TOUT61_P20_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT61_P20_3_OUT

IfxGtm_TOM2_0N_TOUT61_P20_3_OUT.

Definition at line 2093 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_0N_TOUT76_P15_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT76_P15_5_OUT

IfxGtm_TOM2_0N_TOUT76_P15_5_OUT.

Definition at line 2094 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_0N_TOUT91_P13_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT91_P13_0_OUT

IfxGtm_TOM2_0N_TOUT91_P13_0_OUT.

Definition at line 2095 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_10_TOUT104_P10_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_10_TOUT104_P10_2_OUT

IfxGtm_TOM2_10_TOUT104_P10_2_OUT.

Definition at line 2105 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_10_TOUT107_P10_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_10_TOUT107_P10_5_OUT

IfxGtm_TOM2_10_TOUT107_P10_5_OUT.

Definition at line 2106 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_10_TOUT133_P22_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_10_TOUT133_P22_7_OUT

IfxGtm_TOM2_10_TOUT133_P22_7_OUT.

Definition at line 2107 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_10_TOUT260_P14_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_10_TOUT260_P14_13_OUT

IfxGtm_TOM2_10_TOUT260_P14_13_OUT.

Definition at line 2108 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_10_TOUT62_P20_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_10_TOUT62_P20_6_OUT

IfxGtm_TOM2_10_TOUT62_P20_6_OUT.

Definition at line 2109 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_10_TOUT70_P20_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_10_TOUT70_P20_14_OUT

IfxGtm_TOM2_10_TOUT70_P20_14_OUT.

Definition at line 2110 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_11_TOUT105_P10_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_11_TOUT105_P10_3_OUT

IfxGtm_TOM2_11_TOUT105_P10_3_OUT.

Definition at line 2111 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_11_TOUT108_P10_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_11_TOUT108_P10_6_OUT

IfxGtm_TOM2_11_TOUT108_P10_6_OUT.

Definition at line 2112 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_11_TOUT134_P22_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_11_TOUT134_P22_8_OUT

IfxGtm_TOM2_11_TOUT134_P22_8_OUT.

Definition at line 2113 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_11_TOUT261_P14_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_11_TOUT261_P14_12_OUT

IfxGtm_TOM2_11_TOUT261_P14_12_OUT.

Definition at line 2114 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_11_TOUT63_P20_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_11_TOUT63_P20_7_OUT

IfxGtm_TOM2_11_TOUT63_P20_7_OUT.

Definition at line 2115 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_11_TOUT71_P15_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_11_TOUT71_P15_0_OUT

IfxGtm_TOM2_11_TOUT71_P15_0_OUT.

Definition at line 2116 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_12_TOUT102_P10_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_12_TOUT102_P10_0_OUT

IfxGtm_TOM2_12_TOUT102_P10_0_OUT.

Definition at line 2117 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_12_TOUT135_P22_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_12_TOUT135_P22_9_OUT

IfxGtm_TOM2_12_TOUT135_P22_9_OUT.

Definition at line 2118 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_12_TOUT262_P13_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_12_TOUT262_P13_13_OUT

IfxGtm_TOM2_12_TOUT262_P13_13_OUT.

Definition at line 2119 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_12_TOUT34_P33_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_12_TOUT34_P33_12_OUT

IfxGtm_TOM2_12_TOUT34_P33_12_OUT.

Definition at line 2120 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_12_TOUT72_P15_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_12_TOUT72_P15_1_OUT

IfxGtm_TOM2_12_TOUT72_P15_1_OUT.

Definition at line 2121 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_13_TOUT110_P10_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_13_TOUT110_P10_8_OUT

IfxGtm_TOM2_13_TOUT110_P10_8_OUT.

Definition at line 2122 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_13_TOUT136_P22_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_13_TOUT136_P22_10_OUT

IfxGtm_TOM2_13_TOUT136_P22_10_OUT.

Definition at line 2123 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_13_TOUT263_P14_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_13_TOUT263_P14_15_OUT

IfxGtm_TOM2_13_TOUT263_P14_15_OUT.

Definition at line 2124 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_13_TOUT35_P33_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_13_TOUT35_P33_13_OUT

IfxGtm_TOM2_13_TOUT35_P33_13_OUT.

Definition at line 2125 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_13_TOUT65_P20_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_13_TOUT65_P20_9_OUT

IfxGtm_TOM2_13_TOUT65_P20_9_OUT.

Definition at line 2126 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_13_TOUT73_P15_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_13_TOUT73_P15_2_OUT

IfxGtm_TOM2_13_TOUT73_P15_2_OUT.

Definition at line 2127 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_14_TOUT137_P22_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_14_TOUT137_P22_11_OUT

IfxGtm_TOM2_14_TOUT137_P22_11_OUT.

Definition at line 2128 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_14_TOUT264_P13_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_14_TOUT264_P13_15_OUT

IfxGtm_TOM2_14_TOUT264_P13_15_OUT.

Definition at line 2129 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_14_TOUT36_P32_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_14_TOUT36_P32_0_OUT

IfxGtm_TOM2_14_TOUT36_P32_0_OUT.

Definition at line 2130 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_14_TOUT66_P20_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_14_TOUT66_P20_10_OUT

IfxGtm_TOM2_14_TOUT66_P20_10_OUT.

Definition at line 2131 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_14_TOUT74_P15_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_14_TOUT74_P15_3_OUT

IfxGtm_TOM2_14_TOUT74_P15_3_OUT.

Definition at line 2132 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_15_TOUT149_P34_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_15_TOUT149_P34_4_OUT

IfxGtm_TOM2_15_TOUT149_P34_4_OUT.

Definition at line 2133 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_15_TOUT37_P32_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_15_TOUT37_P32_1_OUT

IfxGtm_TOM2_15_TOUT37_P32_1_OUT.

Definition at line 2134 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_15_TOUT67_P20_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_15_TOUT67_P20_11_OUT

IfxGtm_TOM2_15_TOUT67_P20_11_OUT.

Definition at line 2135 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_15_TOUT75_P15_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_15_TOUT75_P15_4_OUT

IfxGtm_TOM2_15_TOUT75_P15_4_OUT.

Definition at line 2136 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_1_TOUT120_P11_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1_TOUT120_P11_1_OUT

IfxGtm_TOM2_1_TOUT120_P11_1_OUT.

Definition at line 2149 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_1_TOUT127_P11_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1_TOUT127_P11_15_OUT

IfxGtm_TOM2_1_TOUT127_P11_15_OUT.

Definition at line 2150 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_1_TOUT251_P13_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1_TOUT251_P13_10_OUT

IfxGtm_TOM2_1_TOUT251_P13_10_OUT.

Definition at line 2151 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_1_TOUT47_P22_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1_TOUT47_P22_0_OUT

IfxGtm_TOM2_1_TOUT47_P22_0_OUT.

Definition at line 2152 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_1_TOUT54_P21_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1_TOUT54_P21_3_OUT

IfxGtm_TOM2_1_TOUT54_P21_3_OUT.

Definition at line 2153 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_1_TOUT64_P20_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1_TOUT64_P20_8_OUT

IfxGtm_TOM2_1_TOUT64_P20_8_OUT.

Definition at line 2154 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_1_TOUT95_P11_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1_TOUT95_P11_2_OUT

IfxGtm_TOM2_1_TOUT95_P11_2_OUT.

Definition at line 2155 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_1N_TOUT123_P11_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT123_P11_7_OUT

IfxGtm_TOM2_1N_TOUT123_P11_7_OUT.

Definition at line 2137 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_1N_TOUT124_P11_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT124_P11_8_OUT

IfxGtm_TOM2_1N_TOUT124_P11_8_OUT.

Definition at line 2138 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_1N_TOUT254_P13_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT254_P13_5_OUT

IfxGtm_TOM2_1N_TOUT254_P13_5_OUT.

Definition at line 2139 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_1N_TOUT44_P23_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT44_P23_3_OUT

IfxGtm_TOM2_1N_TOUT44_P23_3_OUT.

Definition at line 2140 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_1N_TOUT50_P22_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT50_P22_3_OUT

IfxGtm_TOM2_1N_TOUT50_P22_3_OUT.

Definition at line 2141 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_1N_TOUT52_P21_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT52_P21_1_OUT

IfxGtm_TOM2_1N_TOUT52_P21_1_OUT.

Definition at line 2142 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_1N_TOUT57_P21_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT57_P21_6_OUT

IfxGtm_TOM2_1N_TOUT57_P21_6_OUT.

Definition at line 2143 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_1N_TOUT61_P20_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT61_P20_3_OUT

IfxGtm_TOM2_1N_TOUT61_P20_3_OUT.

Definition at line 2144 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_1N_TOUT79_P15_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT79_P15_8_OUT

IfxGtm_TOM2_1N_TOUT79_P15_8_OUT.

Definition at line 2145 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_1N_TOUT90_P14_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT90_P14_10_OUT

IfxGtm_TOM2_1N_TOUT90_P14_10_OUT.

Definition at line 2146 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_1N_TOUT92_P13_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT92_P13_1_OUT

IfxGtm_TOM2_1N_TOUT92_P13_1_OUT.

Definition at line 2147 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_1N_TOUT98_P11_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT98_P11_9_OUT

IfxGtm_TOM2_1N_TOUT98_P11_9_OUT.

Definition at line 2148 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_2_TOUT121_P11_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT121_P11_4_OUT

IfxGtm_TOM2_2_TOUT121_P11_4_OUT.

Definition at line 2163 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_2_TOUT125_P11_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT125_P11_13_OUT

IfxGtm_TOM2_2_TOUT125_P11_13_OUT.

Definition at line 2164 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_2_TOUT252_P13_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT252_P13_14_OUT

IfxGtm_TOM2_2_TOUT252_P13_14_OUT.

Definition at line 2165 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_2_TOUT46_P23_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT46_P23_5_OUT

IfxGtm_TOM2_2_TOUT46_P23_5_OUT.

Definition at line 2166 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_2_TOUT50_P22_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT50_P22_3_OUT

IfxGtm_TOM2_2_TOUT50_P22_3_OUT.

Definition at line 2167 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_2_TOUT55_P21_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT55_P21_4_OUT

IfxGtm_TOM2_2_TOUT55_P21_4_OUT.

Definition at line 2168 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_2_TOUT63_P20_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT63_P20_7_OUT

IfxGtm_TOM2_2_TOUT63_P20_7_OUT.

Definition at line 2169 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_2_TOUT88_P14_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT88_P14_8_OUT

IfxGtm_TOM2_2_TOUT88_P14_8_OUT.

Definition at line 2170 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_2_TOUT96_P11_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT96_P11_3_OUT

IfxGtm_TOM2_2_TOUT96_P11_3_OUT.

Definition at line 2171 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_2N_TOUT124_P11_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2N_TOUT124_P11_8_OUT

IfxGtm_TOM2_2N_TOUT124_P11_8_OUT.

Definition at line 2156 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_2N_TOUT255_P13_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2N_TOUT255_P13_6_OUT

IfxGtm_TOM2_2N_TOUT255_P13_6_OUT.

Definition at line 2157 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_2N_TOUT46_P23_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2N_TOUT46_P23_5_OUT

IfxGtm_TOM2_2N_TOUT46_P23_5_OUT.

Definition at line 2158 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_2N_TOUT58_P21_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2N_TOUT58_P21_7_OUT

IfxGtm_TOM2_2N_TOUT58_P21_7_OUT.

Definition at line 2159 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_2N_TOUT78_P15_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2N_TOUT78_P15_7_OUT

IfxGtm_TOM2_2N_TOUT78_P15_7_OUT.

Definition at line 2160 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_2N_TOUT93_P13_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2N_TOUT93_P13_2_OUT

IfxGtm_TOM2_2N_TOUT93_P13_2_OUT.

Definition at line 2161 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_2N_TOUT99_P11_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2N_TOUT99_P11_10_OUT

IfxGtm_TOM2_2N_TOUT99_P11_10_OUT.

Definition at line 2162 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_3_TOUT122_P11_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT122_P11_5_OUT

IfxGtm_TOM2_3_TOUT122_P11_5_OUT.

Definition at line 2179 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_3_TOUT126_P11_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT126_P11_14_OUT

IfxGtm_TOM2_3_TOUT126_P11_14_OUT.

Definition at line 2180 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_3_TOUT253_P13_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT253_P13_4_OUT

IfxGtm_TOM2_3_TOUT253_P13_4_OUT.

Definition at line 2181 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_3_TOUT49_P22_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT49_P22_2_OUT

IfxGtm_TOM2_3_TOUT49_P22_2_OUT.

Definition at line 2182 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_3_TOUT56_P21_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT56_P21_5_OUT

IfxGtm_TOM2_3_TOUT56_P21_5_OUT.

Definition at line 2183 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_3_TOUT60_P20_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT60_P20_1_OUT

IfxGtm_TOM2_3_TOUT60_P20_1_OUT.

Definition at line 2184 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_3_TOUT62_P20_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT62_P20_6_OUT

IfxGtm_TOM2_3_TOUT62_P20_6_OUT.

Definition at line 2185 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_3_TOUT89_P14_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT89_P14_9_OUT

IfxGtm_TOM2_3_TOUT89_P14_9_OUT.

Definition at line 2186 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_3_TOUT97_P11_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT97_P11_6_OUT

IfxGtm_TOM2_3_TOUT97_P11_6_OUT.

Definition at line 2187 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_3N_TOUT100_P11_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3N_TOUT100_P11_11_OUT

IfxGtm_TOM2_3N_TOUT100_P11_11_OUT.

Definition at line 2172 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_3N_TOUT106_P10_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3N_TOUT106_P10_4_OUT

IfxGtm_TOM2_3N_TOUT106_P10_4_OUT.

Definition at line 2173 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_3N_TOUT122_P11_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3N_TOUT122_P11_5_OUT

IfxGtm_TOM2_3N_TOUT122_P11_5_OUT.

Definition at line 2174 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_3N_TOUT256_P13_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3N_TOUT256_P13_7_OUT

IfxGtm_TOM2_3N_TOUT256_P13_7_OUT.

Definition at line 2175 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_3N_TOUT45_P23_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3N_TOUT45_P23_4_OUT

IfxGtm_TOM2_3N_TOUT45_P23_4_OUT.

Definition at line 2176 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_3N_TOUT59_P20_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3N_TOUT59_P20_0_OUT

IfxGtm_TOM2_3N_TOUT59_P20_0_OUT.

Definition at line 2177 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_3N_TOUT77_P15_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3N_TOUT77_P15_6_OUT

IfxGtm_TOM2_3N_TOUT77_P15_6_OUT.

Definition at line 2178 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_4_TOUT102_P10_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT102_P10_0_OUT

IfxGtm_TOM2_4_TOUT102_P10_0_OUT.

Definition at line 2198 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_4_TOUT123_P11_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT123_P11_7_OUT

IfxGtm_TOM2_4_TOUT123_P11_7_OUT.

Definition at line 2199 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_4_TOUT133_P22_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT133_P22_7_OUT

IfxGtm_TOM2_4_TOUT133_P22_7_OUT.

Definition at line 2200 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_4_TOUT254_P13_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT254_P13_5_OUT

IfxGtm_TOM2_4_TOUT254_P13_5_OUT.

Definition at line 2201 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_4_TOUT50_P22_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT50_P22_3_OUT

IfxGtm_TOM2_4_TOUT50_P22_3_OUT.

Definition at line 2202 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_4_TOUT57_P21_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT57_P21_6_OUT

IfxGtm_TOM2_4_TOUT57_P21_6_OUT.

Definition at line 2203 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_4_TOUT61_P20_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT61_P20_3_OUT

IfxGtm_TOM2_4_TOUT61_P20_3_OUT.

Definition at line 2204 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_4_TOUT90_P14_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT90_P14_10_OUT

IfxGtm_TOM2_4_TOUT90_P14_10_OUT.

Definition at line 2205 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_4_TOUT98_P11_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT98_P11_9_OUT

IfxGtm_TOM2_4_TOUT98_P11_9_OUT.

Definition at line 2206 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_4N_TOUT106_P10_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT106_P10_4_OUT

IfxGtm_TOM2_4N_TOUT106_P10_4_OUT.

Definition at line 2188 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_4N_TOUT120_P11_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT120_P11_1_OUT

IfxGtm_TOM2_4N_TOUT120_P11_1_OUT.

Definition at line 2189 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_4N_TOUT122_P11_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT122_P11_5_OUT

IfxGtm_TOM2_4N_TOUT122_P11_5_OUT.

Definition at line 2190 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_4N_TOUT126_P11_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT126_P11_14_OUT

IfxGtm_TOM2_4N_TOUT126_P11_14_OUT.

Definition at line 2191 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_4N_TOUT137_P22_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT137_P22_11_OUT

IfxGtm_TOM2_4N_TOUT137_P22_11_OUT.

Definition at line 2192 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_4N_TOUT253_P13_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT253_P13_4_OUT

IfxGtm_TOM2_4N_TOUT253_P13_4_OUT.

Definition at line 2193 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_4N_TOUT56_P21_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT56_P21_5_OUT

IfxGtm_TOM2_4N_TOUT56_P21_5_OUT.

Definition at line 2194 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_4N_TOUT60_P20_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT60_P20_1_OUT

IfxGtm_TOM2_4N_TOUT60_P20_1_OUT.

Definition at line 2195 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_4N_TOUT89_P14_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT89_P14_9_OUT

IfxGtm_TOM2_4N_TOUT89_P14_9_OUT.

Definition at line 2196 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_4N_TOUT97_P11_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT97_P11_6_OUT

IfxGtm_TOM2_4N_TOUT97_P11_6_OUT.

Definition at line 2197 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_5_TOUT103_P10_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5_TOUT103_P10_1_OUT

IfxGtm_TOM2_5_TOUT103_P10_1_OUT.

Definition at line 2214 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_5_TOUT124_P11_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5_TOUT124_P11_8_OUT

IfxGtm_TOM2_5_TOUT124_P11_8_OUT.

Definition at line 2215 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_5_TOUT132_P22_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5_TOUT132_P22_6_OUT

IfxGtm_TOM2_5_TOUT132_P22_6_OUT.

Definition at line 2216 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_5_TOUT255_P13_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5_TOUT255_P13_6_OUT

IfxGtm_TOM2_5_TOUT255_P13_6_OUT.

Definition at line 2217 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_5_TOUT58_P21_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5_TOUT58_P21_7_OUT

IfxGtm_TOM2_5_TOUT58_P21_7_OUT.

Definition at line 2218 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_5_TOUT91_P13_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5_TOUT91_P13_0_OUT

IfxGtm_TOM2_5_TOUT91_P13_0_OUT.

Definition at line 2219 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_5_TOUT99_P11_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5_TOUT99_P11_10_OUT

IfxGtm_TOM2_5_TOUT99_P11_10_OUT.

Definition at line 2220 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_5N_TOUT107_P10_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5N_TOUT107_P10_5_OUT

IfxGtm_TOM2_5N_TOUT107_P10_5_OUT.

Definition at line 2207 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_5N_TOUT119_P11_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5N_TOUT119_P11_0_OUT

IfxGtm_TOM2_5N_TOUT119_P11_0_OUT.

Definition at line 2208 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_5N_TOUT136_P22_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5N_TOUT136_P22_10_OUT

IfxGtm_TOM2_5N_TOUT136_P22_10_OUT.

Definition at line 2209 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_5N_TOUT250_P13_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5N_TOUT250_P13_11_OUT

IfxGtm_TOM2_5N_TOUT250_P13_11_OUT.

Definition at line 2210 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_5N_TOUT53_P21_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5N_TOUT53_P21_2_OUT

IfxGtm_TOM2_5N_TOUT53_P21_2_OUT.

Definition at line 2211 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_5N_TOUT87_P14_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5N_TOUT87_P14_7_OUT

IfxGtm_TOM2_5N_TOUT87_P14_7_OUT.

Definition at line 2212 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_5N_TOUT94_P13_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5N_TOUT94_P13_3_OUT

IfxGtm_TOM2_5N_TOUT94_P13_3_OUT.

Definition at line 2213 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_6_TOUT100_P11_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT100_P11_11_OUT

IfxGtm_TOM2_6_TOUT100_P11_11_OUT.

Definition at line 2229 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_6_TOUT104_P10_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT104_P10_2_OUT

IfxGtm_TOM2_6_TOUT104_P10_2_OUT.

Definition at line 2230 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_6_TOUT106_P10_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT106_P10_4_OUT

IfxGtm_TOM2_6_TOUT106_P10_4_OUT.

Definition at line 2231 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_6_TOUT125_P11_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT125_P11_13_OUT

IfxGtm_TOM2_6_TOUT125_P11_13_OUT.

Definition at line 2232 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_6_TOUT131_P22_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT131_P22_5_OUT

IfxGtm_TOM2_6_TOUT131_P22_5_OUT.

Definition at line 2233 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_6_TOUT256_P13_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT256_P13_7_OUT

IfxGtm_TOM2_6_TOUT256_P13_7_OUT.

Definition at line 2234 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_6_TOUT59_P20_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT59_P20_0_OUT

IfxGtm_TOM2_6_TOUT59_P20_0_OUT.

Definition at line 2235 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_6_TOUT92_P13_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT92_P13_1_OUT

IfxGtm_TOM2_6_TOUT92_P13_1_OUT.

Definition at line 2236 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_6N_TOUT108_P10_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT108_P10_6_OUT

IfxGtm_TOM2_6N_TOUT108_P10_6_OUT.

Definition at line 2221 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_6N_TOUT120_P11_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT120_P11_1_OUT

IfxGtm_TOM2_6N_TOUT120_P11_1_OUT.

Definition at line 2222 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_6N_TOUT122_P11_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT122_P11_5_OUT

IfxGtm_TOM2_6N_TOUT122_P11_5_OUT.

Definition at line 2223 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_6N_TOUT135_P22_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT135_P22_9_OUT

IfxGtm_TOM2_6N_TOUT135_P22_9_OUT.

Definition at line 2224 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_6N_TOUT251_P13_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT251_P13_10_OUT

IfxGtm_TOM2_6N_TOUT251_P13_10_OUT.

Definition at line 2225 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_6N_TOUT54_P21_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT54_P21_3_OUT

IfxGtm_TOM2_6N_TOUT54_P21_3_OUT.

Definition at line 2226 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_6N_TOUT86_P14_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT86_P14_6_OUT

IfxGtm_TOM2_6N_TOUT86_P14_6_OUT.

Definition at line 2227 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_6N_TOUT95_P11_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT95_P11_2_OUT

IfxGtm_TOM2_6N_TOUT95_P11_2_OUT.

Definition at line 2228 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_7_TOUT101_P11_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7_TOUT101_P11_12_OUT

IfxGtm_TOM2_7_TOUT101_P11_12_OUT.

Definition at line 2245 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_7_TOUT105_P10_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7_TOUT105_P10_3_OUT

IfxGtm_TOM2_7_TOUT105_P10_3_OUT.

Definition at line 2246 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_7_TOUT126_P11_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7_TOUT126_P11_14_OUT

IfxGtm_TOM2_7_TOUT126_P11_14_OUT.

Definition at line 2247 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_7_TOUT130_P22_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7_TOUT130_P22_4_OUT

IfxGtm_TOM2_7_TOUT130_P22_4_OUT.

Definition at line 2248 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_7_TOUT264_P13_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7_TOUT264_P13_15_OUT

IfxGtm_TOM2_7_TOUT264_P13_15_OUT.

Definition at line 2249 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_7_TOUT64_P20_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7_TOUT64_P20_8_OUT

IfxGtm_TOM2_7_TOUT64_P20_8_OUT.

Definition at line 2250 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_7_TOUT93_P13_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7_TOUT93_P13_2_OUT

IfxGtm_TOM2_7_TOUT93_P13_2_OUT.

Definition at line 2251 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_7N_TOUT109_P10_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT109_P10_7_OUT

IfxGtm_TOM2_7N_TOUT109_P10_7_OUT.

Definition at line 2237 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_7N_TOUT121_P11_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT121_P11_4_OUT

IfxGtm_TOM2_7N_TOUT121_P11_4_OUT.

Definition at line 2238 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_7N_TOUT134_P22_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT134_P22_8_OUT

IfxGtm_TOM2_7N_TOUT134_P22_8_OUT.

Definition at line 2239 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_7N_TOUT252_P13_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT252_P13_14_OUT

IfxGtm_TOM2_7N_TOUT252_P13_14_OUT.

Definition at line 2240 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_7N_TOUT55_P21_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT55_P21_4_OUT

IfxGtm_TOM2_7N_TOUT55_P21_4_OUT.

Definition at line 2241 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_7N_TOUT88_P14_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT88_P14_8_OUT

IfxGtm_TOM2_7N_TOUT88_P14_8_OUT.

Definition at line 2242 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_7N_TOUT96_P11_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT96_P11_3_OUT

IfxGtm_TOM2_7N_TOUT96_P11_3_OUT.

Definition at line 2243 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_7N_TOUT98_P11_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT98_P11_9_OUT

IfxGtm_TOM2_7N_TOUT98_P11_9_OUT.

Definition at line 2244 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_8_TOUT109_P10_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_8_TOUT109_P10_7_OUT

IfxGtm_TOM2_8_TOUT109_P10_7_OUT.

Definition at line 2252 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_8_TOUT127_P11_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_8_TOUT127_P11_15_OUT

IfxGtm_TOM2_8_TOUT127_P11_15_OUT.

Definition at line 2253 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_8_TOUT131_P22_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_8_TOUT131_P22_5_OUT

IfxGtm_TOM2_8_TOUT131_P22_5_OUT.

Definition at line 2254 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_8_TOUT258_P14_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_8_TOUT258_P14_11_OUT

IfxGtm_TOM2_8_TOUT258_P14_11_OUT.

Definition at line 2255 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_8_TOUT51_P21_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_8_TOUT51_P21_0_OUT

IfxGtm_TOM2_8_TOUT51_P21_0_OUT.

Definition at line 2256 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_8_TOUT68_P20_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_8_TOUT68_P20_12_OUT

IfxGtm_TOM2_8_TOUT68_P20_12_OUT.

Definition at line 2257 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_9_TOUT103_P10_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_9_TOUT103_P10_1_OUT

IfxGtm_TOM2_9_TOUT103_P10_1_OUT.

Definition at line 2258 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_9_TOUT132_P22_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_9_TOUT132_P22_6_OUT

IfxGtm_TOM2_9_TOUT132_P22_6_OUT.

Definition at line 2259 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_9_TOUT259_P14_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_9_TOUT259_P14_14_OUT

IfxGtm_TOM2_9_TOUT259_P14_14_OUT.

Definition at line 2260 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_9_TOUT52_P21_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_9_TOUT52_P21_1_OUT

IfxGtm_TOM2_9_TOUT52_P21_1_OUT.

Definition at line 2261 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM2_9_TOUT69_P20_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_9_TOUT69_P20_13_OUT

IfxGtm_TOM2_9_TOUT69_P20_13_OUT.

Definition at line 2262 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_0_TOUT110_P10_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_0_TOUT110_P10_8_OUT

IfxGtm_TOM3_0_TOUT110_P10_8_OUT.

Definition at line 2268 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_0_TOUT115_P01_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_0_TOUT115_P01_7_OUT

IfxGtm_TOM3_0_TOUT115_P01_7_OUT.

Definition at line 2269 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_0_TOUT130_P22_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_0_TOUT130_P22_4_OUT

IfxGtm_TOM3_0_TOUT130_P22_4_OUT.

Definition at line 2270 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_0_TOUT155_P01_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_0_TOUT155_P01_0_OUT

IfxGtm_TOM3_0_TOUT155_P01_0_OUT.

Definition at line 2271 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_0_TOUT162_P01_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_0_TOUT162_P01_8_OUT

IfxGtm_TOM3_0_TOUT162_P01_8_OUT.

Definition at line 2272 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_0_TOUT174_P31_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_0_TOUT174_P31_0_OUT

IfxGtm_TOM3_0_TOUT174_P31_0_OUT.

Definition at line 2273 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_0_TOUT206_P25_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_0_TOUT206_P25_0_OUT

IfxGtm_TOM3_0_TOUT206_P25_0_OUT.

Definition at line 2274 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_0N_TOUT134_P22_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_0N_TOUT134_P22_8_OUT

IfxGtm_TOM3_0N_TOUT134_P22_8_OUT.

Definition at line 2263 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_0N_TOUT161_P01_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_0N_TOUT161_P01_13_OUT

IfxGtm_TOM3_0N_TOUT161_P01_13_OUT.

Definition at line 2264 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_0N_TOUT181_P31_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_0N_TOUT181_P31_7_OUT

IfxGtm_TOM3_0N_TOUT181_P31_7_OUT.

Definition at line 2265 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_0N_TOUT213_P25_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_0N_TOUT213_P25_7_OUT

IfxGtm_TOM3_0N_TOUT213_P25_7_OUT.

Definition at line 2266 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_0N_TOUT8_P02_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_0N_TOUT8_P02_8_OUT

IfxGtm_TOM3_0N_TOUT8_P02_8_OUT.

Definition at line 2267 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_10_TOUT164_P01_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_10_TOUT164_P01_14_OUT

IfxGtm_TOM3_10_TOUT164_P01_14_OUT.

Definition at line 2275 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_10_TOUT184_P31_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_10_TOUT184_P31_10_OUT

IfxGtm_TOM3_10_TOUT184_P31_10_OUT.

Definition at line 2276 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_10_TOUT188_P31_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_10_TOUT188_P31_14_OUT

IfxGtm_TOM3_10_TOUT188_P31_14_OUT.

Definition at line 2277 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_10_TOUT216_P25_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_10_TOUT216_P25_10_OUT

IfxGtm_TOM3_10_TOUT216_P25_10_OUT.

Definition at line 2278 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_10_TOUT220_P25_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_10_TOUT220_P25_14_OUT

IfxGtm_TOM3_10_TOUT220_P25_14_OUT.

Definition at line 2279 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_10_TOUT266_P10_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_10_TOUT266_P10_10_OUT

IfxGtm_TOM3_10_TOUT266_P10_10_OUT.

Definition at line 2280 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_11_TOUT166_P00_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_11_TOUT166_P00_14_OUT

IfxGtm_TOM3_11_TOUT166_P00_14_OUT.

Definition at line 2281 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_11_TOUT185_P31_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_11_TOUT185_P31_11_OUT

IfxGtm_TOM3_11_TOUT185_P31_11_OUT.

Definition at line 2282 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_11_TOUT189_P31_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_11_TOUT189_P31_15_OUT

IfxGtm_TOM3_11_TOUT189_P31_15_OUT.

Definition at line 2283 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_11_TOUT217_P25_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_11_TOUT217_P25_11_OUT

IfxGtm_TOM3_11_TOUT217_P25_11_OUT.

Definition at line 2284 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_11_TOUT221_P25_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_11_TOUT221_P25_15_OUT

IfxGtm_TOM3_11_TOUT221_P25_15_OUT.

Definition at line 2285 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_11_TOUT267_P10_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_11_TOUT267_P10_14_OUT

IfxGtm_TOM3_11_TOUT267_P10_14_OUT.

Definition at line 2286 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_12_TOUT167_P00_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_12_TOUT167_P00_13_OUT

IfxGtm_TOM3_12_TOUT167_P00_13_OUT.

Definition at line 2287 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_12_TOUT186_P31_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_12_TOUT186_P31_12_OUT

IfxGtm_TOM3_12_TOUT186_P31_12_OUT.

Definition at line 2288 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_12_TOUT218_P25_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_12_TOUT218_P25_12_OUT

IfxGtm_TOM3_12_TOUT218_P25_12_OUT.

Definition at line 2289 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_12_TOUT268_P10_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_12_TOUT268_P10_13_OUT

IfxGtm_TOM3_12_TOUT268_P10_13_OUT.

Definition at line 2290 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_13_TOUT138_P23_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_13_TOUT138_P23_6_OUT

IfxGtm_TOM3_13_TOUT138_P23_6_OUT.

Definition at line 2291 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_13_TOUT168_P00_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_13_TOUT168_P00_15_OUT

IfxGtm_TOM3_13_TOUT168_P00_15_OUT.

Definition at line 2292 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_13_TOUT187_P31_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_13_TOUT187_P31_13_OUT

IfxGtm_TOM3_13_TOUT187_P31_13_OUT.

Definition at line 2293 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_13_TOUT219_P25_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_13_TOUT219_P25_13_OUT

IfxGtm_TOM3_13_TOUT219_P25_13_OUT.

Definition at line 2294 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_13_TOUT269_P10_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_13_TOUT269_P10_11_OUT

IfxGtm_TOM3_13_TOUT269_P10_11_OUT.

Definition at line 2295 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_14_TOUT139_P23_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_14_TOUT139_P23_7_OUT

IfxGtm_TOM3_14_TOUT139_P23_7_OUT.

Definition at line 2296 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_14_TOUT151_P02_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_14_TOUT151_P02_12_OUT

IfxGtm_TOM3_14_TOUT151_P02_12_OUT.

Definition at line 2297 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_14_TOUT153_P02_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_14_TOUT153_P02_13_OUT

IfxGtm_TOM3_14_TOUT153_P02_13_OUT.

Definition at line 2298 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_14_TOUT188_P31_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_14_TOUT188_P31_14_OUT

IfxGtm_TOM3_14_TOUT188_P31_14_OUT.

Definition at line 2299 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_14_TOUT220_P25_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_14_TOUT220_P25_14_OUT

IfxGtm_TOM3_14_TOUT220_P25_14_OUT.

Definition at line 2300 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_14_TOUT270_P10_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_14_TOUT270_P10_15_OUT

IfxGtm_TOM3_14_TOUT270_P10_15_OUT.

Definition at line 2301 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_15_TOUT140_P32_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_15_TOUT140_P32_5_OUT

IfxGtm_TOM3_15_TOUT140_P32_5_OUT.

Definition at line 2302 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_15_TOUT152_P02_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_15_TOUT152_P02_15_OUT

IfxGtm_TOM3_15_TOUT152_P02_15_OUT.

Definition at line 2303 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_15_TOUT154_P02_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_15_TOUT154_P02_14_OUT

IfxGtm_TOM3_15_TOUT154_P02_14_OUT.

Definition at line 2304 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_15_TOUT189_P31_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_15_TOUT189_P31_15_OUT

IfxGtm_TOM3_15_TOUT189_P31_15_OUT.

Definition at line 2305 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_15_TOUT221_P25_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_15_TOUT221_P25_15_OUT

IfxGtm_TOM3_15_TOUT221_P25_15_OUT.

Definition at line 2306 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_1_TOUT111_P01_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT111_P01_3_OUT

IfxGtm_TOM3_1_TOUT111_P01_3_OUT.

Definition at line 2314 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_1_TOUT114_P01_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT114_P01_6_OUT

IfxGtm_TOM3_1_TOUT114_P01_6_OUT.

Definition at line 2315 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_1_TOUT131_P22_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT131_P22_5_OUT

IfxGtm_TOM3_1_TOUT131_P22_5_OUT.

Definition at line 2316 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_1_TOUT156_P01_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT156_P01_2_OUT

IfxGtm_TOM3_1_TOUT156_P01_2_OUT.

Definition at line 2317 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_1_TOUT163_P01_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT163_P01_10_OUT

IfxGtm_TOM3_1_TOUT163_P01_10_OUT.

Definition at line 2318 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_1_TOUT175_P31_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT175_P31_1_OUT

IfxGtm_TOM3_1_TOUT175_P31_1_OUT.

Definition at line 2319 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_1_TOUT207_P25_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT207_P25_1_OUT

IfxGtm_TOM3_1_TOUT207_P25_1_OUT.

Definition at line 2320 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_1_TOUT242_P15_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT242_P15_10_OUT

IfxGtm_TOM3_1_TOUT242_P15_10_OUT.

Definition at line 2321 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_1_TOUT265_P10_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT265_P10_9_OUT

IfxGtm_TOM3_1_TOUT265_P10_9_OUT.

Definition at line 2322 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_1N_TOUT116_P02_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1N_TOUT116_P02_9_OUT

IfxGtm_TOM3_1N_TOUT116_P02_9_OUT.

Definition at line 2307 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_1N_TOUT135_P22_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1N_TOUT135_P22_9_OUT

IfxGtm_TOM3_1N_TOUT135_P22_9_OUT.

Definition at line 2308 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_1N_TOUT158_P01_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1N_TOUT158_P01_12_OUT

IfxGtm_TOM3_1N_TOUT158_P01_12_OUT.

Definition at line 2309 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_1N_TOUT178_P31_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1N_TOUT178_P31_4_OUT

IfxGtm_TOM3_1N_TOUT178_P31_4_OUT.

Definition at line 2310 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_1N_TOUT210_P25_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1N_TOUT210_P25_4_OUT

IfxGtm_TOM3_1N_TOUT210_P25_4_OUT.

Definition at line 2311 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_1N_TOUT245_P15_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1N_TOUT245_P15_13_OUT

IfxGtm_TOM3_1N_TOUT245_P15_13_OUT.

Definition at line 2312 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_1N_TOUT268_P10_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1N_TOUT268_P10_13_OUT

IfxGtm_TOM3_1N_TOUT268_P10_13_OUT.

Definition at line 2313 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_2_TOUT112_P01_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT112_P01_4_OUT

IfxGtm_TOM3_2_TOUT112_P01_4_OUT.

Definition at line 2330 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_2_TOUT132_P22_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT132_P22_6_OUT

IfxGtm_TOM3_2_TOUT132_P22_6_OUT.

Definition at line 2331 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_2_TOUT157_P01_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT157_P01_15_OUT

IfxGtm_TOM3_2_TOUT157_P01_15_OUT.

Definition at line 2332 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_2_TOUT164_P01_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT164_P01_14_OUT

IfxGtm_TOM3_2_TOUT164_P01_14_OUT.

Definition at line 2333 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_2_TOUT176_P31_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT176_P31_2_OUT

IfxGtm_TOM3_2_TOUT176_P31_2_OUT.

Definition at line 2334 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_2_TOUT208_P25_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT208_P25_2_OUT

IfxGtm_TOM3_2_TOUT208_P25_2_OUT.

Definition at line 2335 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_2_TOUT243_P15_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT243_P15_11_OUT

IfxGtm_TOM3_2_TOUT243_P15_11_OUT.

Definition at line 2336 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_2_TOUT266_P10_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT266_P10_10_OUT

IfxGtm_TOM3_2_TOUT266_P10_10_OUT.

Definition at line 2337 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_2N_TOUT117_P02_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2N_TOUT117_P02_10_OUT

IfxGtm_TOM3_2N_TOUT117_P02_10_OUT.

Definition at line 2323 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_2N_TOUT136_P22_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2N_TOUT136_P22_10_OUT

IfxGtm_TOM3_2N_TOUT136_P22_10_OUT.

Definition at line 2324 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_2N_TOUT159_P01_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2N_TOUT159_P01_1_OUT

IfxGtm_TOM3_2N_TOUT159_P01_1_OUT.

Definition at line 2325 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_2N_TOUT179_P31_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2N_TOUT179_P31_5_OUT

IfxGtm_TOM3_2N_TOUT179_P31_5_OUT.

Definition at line 2326 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_2N_TOUT211_P25_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2N_TOUT211_P25_5_OUT

IfxGtm_TOM3_2N_TOUT211_P25_5_OUT.

Definition at line 2327 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_2N_TOUT246_P15_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2N_TOUT246_P15_14_OUT

IfxGtm_TOM3_2N_TOUT246_P15_14_OUT.

Definition at line 2328 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_2N_TOUT267_P10_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2N_TOUT267_P10_14_OUT

IfxGtm_TOM3_2N_TOUT267_P10_14_OUT.

Definition at line 2329 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_3_TOUT113_P01_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3_TOUT113_P01_5_OUT

IfxGtm_TOM3_3_TOUT113_P01_5_OUT.

Definition at line 2346 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_3_TOUT133_P22_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3_TOUT133_P22_7_OUT

IfxGtm_TOM3_3_TOUT133_P22_7_OUT.

Definition at line 2347 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_3_TOUT165_P01_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3_TOUT165_P01_11_OUT

IfxGtm_TOM3_3_TOUT165_P01_11_OUT.

Definition at line 2348 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_3_TOUT177_P31_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3_TOUT177_P31_3_OUT

IfxGtm_TOM3_3_TOUT177_P31_3_OUT.

Definition at line 2349 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_3_TOUT209_P25_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3_TOUT209_P25_3_OUT

IfxGtm_TOM3_3_TOUT209_P25_3_OUT.

Definition at line 2350 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_3_TOUT244_P15_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3_TOUT244_P15_12_OUT

IfxGtm_TOM3_3_TOUT244_P15_12_OUT.

Definition at line 2351 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_3_TOUT269_P10_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3_TOUT269_P10_11_OUT

IfxGtm_TOM3_3_TOUT269_P10_11_OUT.

Definition at line 2352 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_3N_TOUT118_P02_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT118_P02_11_OUT

IfxGtm_TOM3_3N_TOUT118_P02_11_OUT.

Definition at line 2338 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_3N_TOUT137_P22_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT137_P22_11_OUT

IfxGtm_TOM3_3N_TOUT137_P22_11_OUT.

Definition at line 2339 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_3N_TOUT160_P01_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT160_P01_9_OUT

IfxGtm_TOM3_3N_TOUT160_P01_9_OUT.

Definition at line 2340 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_3N_TOUT180_P31_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT180_P31_6_OUT

IfxGtm_TOM3_3N_TOUT180_P31_6_OUT.

Definition at line 2341 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_3N_TOUT212_P25_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT212_P25_6_OUT

IfxGtm_TOM3_3N_TOUT212_P25_6_OUT.

Definition at line 2342 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_3N_TOUT212_P26_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT212_P26_0_OUT

IfxGtm_TOM3_3N_TOUT212_P26_0_OUT.

Definition at line 2343 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_3N_TOUT247_P15_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT247_P15_15_OUT

IfxGtm_TOM3_3N_TOUT247_P15_15_OUT.

Definition at line 2344 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_3N_TOUT270_P10_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT270_P10_15_OUT

IfxGtm_TOM3_3N_TOUT270_P10_15_OUT.

Definition at line 2345 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_4_TOUT110_P10_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT110_P10_8_OUT

IfxGtm_TOM3_4_TOUT110_P10_8_OUT.

Definition at line 2358 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_4_TOUT111_P01_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT111_P01_3_OUT

IfxGtm_TOM3_4_TOUT111_P01_3_OUT.

Definition at line 2359 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_4_TOUT114_P01_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT114_P01_6_OUT

IfxGtm_TOM3_4_TOUT114_P01_6_OUT.

Definition at line 2360 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_4_TOUT134_P22_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT134_P22_8_OUT

IfxGtm_TOM3_4_TOUT134_P22_8_OUT.

Definition at line 2361 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_4_TOUT158_P01_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT158_P01_12_OUT

IfxGtm_TOM3_4_TOUT158_P01_12_OUT.

Definition at line 2362 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_4_TOUT178_P31_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT178_P31_4_OUT

IfxGtm_TOM3_4_TOUT178_P31_4_OUT.

Definition at line 2363 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_4_TOUT210_P25_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT210_P25_4_OUT

IfxGtm_TOM3_4_TOUT210_P25_4_OUT.

Definition at line 2364 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_4_TOUT245_P15_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT245_P15_13_OUT

IfxGtm_TOM3_4_TOUT245_P15_13_OUT.

Definition at line 2365 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_4N_TOUT151_P02_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_4N_TOUT151_P02_12_OUT

IfxGtm_TOM3_4N_TOUT151_P02_12_OUT.

Definition at line 2353 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_4N_TOUT165_P01_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_4N_TOUT165_P01_11_OUT

IfxGtm_TOM3_4N_TOUT165_P01_11_OUT.

Definition at line 2354 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_4N_TOUT177_P31_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_4N_TOUT177_P31_3_OUT

IfxGtm_TOM3_4N_TOUT177_P31_3_OUT.

Definition at line 2355 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_4N_TOUT209_P25_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_4N_TOUT209_P25_3_OUT

IfxGtm_TOM3_4N_TOUT209_P25_3_OUT.

Definition at line 2356 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_4N_TOUT244_P15_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_4N_TOUT244_P15_12_OUT

IfxGtm_TOM3_4N_TOUT244_P15_12_OUT.

Definition at line 2357 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_5_TOUT115_P01_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_5_TOUT115_P01_7_OUT

IfxGtm_TOM3_5_TOUT115_P01_7_OUT.

Definition at line 2372 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_5_TOUT135_P22_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_5_TOUT135_P22_9_OUT

IfxGtm_TOM3_5_TOUT135_P22_9_OUT.

Definition at line 2373 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_5_TOUT159_P01_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_5_TOUT159_P01_1_OUT

IfxGtm_TOM3_5_TOUT159_P01_1_OUT.

Definition at line 2374 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_5_TOUT179_P31_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_5_TOUT179_P31_5_OUT

IfxGtm_TOM3_5_TOUT179_P31_5_OUT.

Definition at line 2375 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_5_TOUT211_P25_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_5_TOUT211_P25_5_OUT

IfxGtm_TOM3_5_TOUT211_P25_5_OUT.

Definition at line 2376 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_5_TOUT246_P15_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_5_TOUT246_P15_14_OUT

IfxGtm_TOM3_5_TOUT246_P15_14_OUT.

Definition at line 2377 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_5_TOUT265_P10_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_5_TOUT265_P10_9_OUT

IfxGtm_TOM3_5_TOUT265_P10_9_OUT.

Definition at line 2378 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_5N_TOUT153_P02_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_5N_TOUT153_P02_13_OUT

IfxGtm_TOM3_5N_TOUT153_P02_13_OUT.

Definition at line 2366 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_5N_TOUT155_P01_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_5N_TOUT155_P01_0_OUT

IfxGtm_TOM3_5N_TOUT155_P01_0_OUT.

Definition at line 2367 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_5N_TOUT166_P00_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_5N_TOUT166_P00_14_OUT

IfxGtm_TOM3_5N_TOUT166_P00_14_OUT.

Definition at line 2368 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_5N_TOUT174_P31_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_5N_TOUT174_P31_0_OUT

IfxGtm_TOM3_5N_TOUT174_P31_0_OUT.

Definition at line 2369 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_5N_TOUT206_P25_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_5N_TOUT206_P25_0_OUT

IfxGtm_TOM3_5N_TOUT206_P25_0_OUT.

Definition at line 2370 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_5N_TOUT268_P10_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_5N_TOUT268_P10_13_OUT

IfxGtm_TOM3_5N_TOUT268_P10_13_OUT.

Definition at line 2371 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_6_TOUT136_P22_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_6_TOUT136_P22_10_OUT

IfxGtm_TOM3_6_TOUT136_P22_10_OUT.

Definition at line 2385 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_6_TOUT160_P01_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_6_TOUT160_P01_9_OUT

IfxGtm_TOM3_6_TOUT160_P01_9_OUT.

Definition at line 2386 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_6_TOUT180_P31_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_6_TOUT180_P31_6_OUT

IfxGtm_TOM3_6_TOUT180_P31_6_OUT.

Definition at line 2387 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_6_TOUT212_P25_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_6_TOUT212_P25_6_OUT

IfxGtm_TOM3_6_TOUT212_P25_6_OUT.

Definition at line 2388 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_6_TOUT212_P26_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_6_TOUT212_P26_0_OUT

IfxGtm_TOM3_6_TOUT212_P26_0_OUT.

Definition at line 2389 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_6_TOUT247_P15_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_6_TOUT247_P15_15_OUT

IfxGtm_TOM3_6_TOUT247_P15_15_OUT.

Definition at line 2390 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_6_TOUT266_P10_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_6_TOUT266_P10_10_OUT

IfxGtm_TOM3_6_TOUT266_P10_10_OUT.

Definition at line 2391 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_6N_TOUT154_P02_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_6N_TOUT154_P02_14_OUT

IfxGtm_TOM3_6N_TOUT154_P02_14_OUT.

Definition at line 2379 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_6N_TOUT156_P01_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_6N_TOUT156_P01_2_OUT

IfxGtm_TOM3_6N_TOUT156_P01_2_OUT.

Definition at line 2380 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_6N_TOUT175_P31_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_6N_TOUT175_P31_1_OUT

IfxGtm_TOM3_6N_TOUT175_P31_1_OUT.

Definition at line 2381 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_6N_TOUT207_P25_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_6N_TOUT207_P25_1_OUT

IfxGtm_TOM3_6N_TOUT207_P25_1_OUT.

Definition at line 2382 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_6N_TOUT242_P15_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_6N_TOUT242_P15_10_OUT

IfxGtm_TOM3_6N_TOUT242_P15_10_OUT.

Definition at line 2383 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_6N_TOUT267_P10_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_6N_TOUT267_P10_14_OUT

IfxGtm_TOM3_6N_TOUT267_P10_14_OUT.

Definition at line 2384 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_7_TOUT137_P22_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_7_TOUT137_P22_11_OUT

IfxGtm_TOM3_7_TOUT137_P22_11_OUT.

Definition at line 2398 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_7_TOUT161_P01_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_7_TOUT161_P01_13_OUT

IfxGtm_TOM3_7_TOUT161_P01_13_OUT.

Definition at line 2399 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_7_TOUT181_P31_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_7_TOUT181_P31_7_OUT

IfxGtm_TOM3_7_TOUT181_P31_7_OUT.

Definition at line 2400 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_7_TOUT213_P25_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_7_TOUT213_P25_7_OUT

IfxGtm_TOM3_7_TOUT213_P25_7_OUT.

Definition at line 2401 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_7_TOUT248_P13_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_7_TOUT248_P13_9_OUT

IfxGtm_TOM3_7_TOUT248_P13_9_OUT.

Definition at line 2402 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_7_TOUT269_P10_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_7_TOUT269_P10_11_OUT

IfxGtm_TOM3_7_TOUT269_P10_11_OUT.

Definition at line 2403 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_7N_TOUT152_P02_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_7N_TOUT152_P02_15_OUT

IfxGtm_TOM3_7N_TOUT152_P02_15_OUT.

Definition at line 2392 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_7N_TOUT157_P01_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_7N_TOUT157_P01_15_OUT

IfxGtm_TOM3_7N_TOUT157_P01_15_OUT.

Definition at line 2393 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_7N_TOUT176_P31_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_7N_TOUT176_P31_2_OUT

IfxGtm_TOM3_7N_TOUT176_P31_2_OUT.

Definition at line 2394 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_7N_TOUT208_P25_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_7N_TOUT208_P25_2_OUT

IfxGtm_TOM3_7N_TOUT208_P25_2_OUT.

Definition at line 2395 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_7N_TOUT243_P15_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_7N_TOUT243_P15_11_OUT

IfxGtm_TOM3_7N_TOUT243_P15_11_OUT.

Definition at line 2396 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_7N_TOUT270_P10_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_7N_TOUT270_P10_15_OUT

IfxGtm_TOM3_7N_TOUT270_P10_15_OUT.

Definition at line 2397 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_8_TOUT162_P01_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_8_TOUT162_P01_8_OUT

IfxGtm_TOM3_8_TOUT162_P01_8_OUT.

Definition at line 2404 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_8_TOUT182_P31_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_8_TOUT182_P31_8_OUT

IfxGtm_TOM3_8_TOUT182_P31_8_OUT.

Definition at line 2405 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_8_TOUT186_P31_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_8_TOUT186_P31_12_OUT

IfxGtm_TOM3_8_TOUT186_P31_12_OUT.

Definition at line 2406 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_8_TOUT214_P25_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_8_TOUT214_P25_8_OUT

IfxGtm_TOM3_8_TOUT214_P25_8_OUT.

Definition at line 2407 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_8_TOUT218_P25_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_8_TOUT218_P25_12_OUT

IfxGtm_TOM3_8_TOUT218_P25_12_OUT.

Definition at line 2408 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_8_TOUT249_P13_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_8_TOUT249_P13_12_OUT

IfxGtm_TOM3_8_TOUT249_P13_12_OUT.

Definition at line 2409 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_9_TOUT163_P01_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_9_TOUT163_P01_10_OUT

IfxGtm_TOM3_9_TOUT163_P01_10_OUT.

Definition at line 2410 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_9_TOUT183_P31_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_9_TOUT183_P31_9_OUT

IfxGtm_TOM3_9_TOUT183_P31_9_OUT.

Definition at line 2411 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_9_TOUT187_P31_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_9_TOUT187_P31_13_OUT

IfxGtm_TOM3_9_TOUT187_P31_13_OUT.

Definition at line 2412 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_9_TOUT215_P25_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_9_TOUT215_P25_9_OUT

IfxGtm_TOM3_9_TOUT215_P25_9_OUT.

Definition at line 2413 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_9_TOUT219_P25_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_9_TOUT219_P25_13_OUT

IfxGtm_TOM3_9_TOUT219_P25_13_OUT.

Definition at line 2414 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM3_9_TOUT265_P10_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_9_TOUT265_P10_9_OUT

IfxGtm_TOM3_9_TOUT265_P10_9_OUT.

Definition at line 2415 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_0_TOUT155_P01_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_0_TOUT155_P01_0_OUT

IfxGtm_TOM4_0_TOUT155_P01_0_OUT.

Definition at line 2416 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_0_TOUT162_P01_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_0_TOUT162_P01_8_OUT

IfxGtm_TOM4_0_TOUT162_P01_8_OUT.

Definition at line 2417 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_0_TOUT190_P30_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_0_TOUT190_P30_0_OUT

IfxGtm_TOM4_0_TOUT190_P30_0_OUT.

Definition at line 2418 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_0_TOUT222_P24_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_0_TOUT222_P24_0_OUT

IfxGtm_TOM4_0_TOUT222_P24_0_OUT.

Definition at line 2419 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_0_TOUT250_P13_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_0_TOUT250_P13_11_OUT

IfxGtm_TOM4_0_TOUT250_P13_11_OUT.

Definition at line 2420 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_10_TOUT164_P01_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_10_TOUT164_P01_14_OUT

IfxGtm_TOM4_10_TOUT164_P01_14_OUT.

Definition at line 2421 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_10_TOUT200_P30_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_10_TOUT200_P30_10_OUT

IfxGtm_TOM4_10_TOUT200_P30_10_OUT.

Definition at line 2422 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_10_TOUT204_P30_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_10_TOUT204_P30_14_OUT

IfxGtm_TOM4_10_TOUT204_P30_14_OUT.

Definition at line 2423 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_10_TOUT232_P24_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_10_TOUT232_P24_10_OUT

IfxGtm_TOM4_10_TOUT232_P24_10_OUT.

Definition at line 2424 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_10_TOUT260_P14_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_10_TOUT260_P14_13_OUT

IfxGtm_TOM4_10_TOUT260_P14_13_OUT.

Definition at line 2425 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_11_TOUT166_P00_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_11_TOUT166_P00_14_OUT

IfxGtm_TOM4_11_TOUT166_P00_14_OUT.

Definition at line 2426 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_11_TOUT201_P30_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_11_TOUT201_P30_11_OUT

IfxGtm_TOM4_11_TOUT201_P30_11_OUT.

Definition at line 2427 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_11_TOUT205_P30_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_11_TOUT205_P30_15_OUT

IfxGtm_TOM4_11_TOUT205_P30_15_OUT.

Definition at line 2428 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_11_TOUT233_P24_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_11_TOUT233_P24_11_OUT

IfxGtm_TOM4_11_TOUT233_P24_11_OUT.

Definition at line 2429 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_11_TOUT261_P14_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_11_TOUT261_P14_12_OUT

IfxGtm_TOM4_11_TOUT261_P14_12_OUT.

Definition at line 2430 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_12_TOUT167_P00_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_12_TOUT167_P00_13_OUT

IfxGtm_TOM4_12_TOUT167_P00_13_OUT.

Definition at line 2431 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_12_TOUT202_P30_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_12_TOUT202_P30_12_OUT

IfxGtm_TOM4_12_TOUT202_P30_12_OUT.

Definition at line 2432 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_12_TOUT230_P24_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_12_TOUT230_P24_8_OUT

IfxGtm_TOM4_12_TOUT230_P24_8_OUT.

Definition at line 2433 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_12_TOUT234_P24_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_12_TOUT234_P24_12_OUT

IfxGtm_TOM4_12_TOUT234_P24_12_OUT.

Definition at line 2434 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_12_TOUT262_P13_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_12_TOUT262_P13_13_OUT

IfxGtm_TOM4_12_TOUT262_P13_13_OUT.

Definition at line 2435 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_13_TOUT168_P00_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_13_TOUT168_P00_15_OUT

IfxGtm_TOM4_13_TOUT168_P00_15_OUT.

Definition at line 2436 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_13_TOUT203_P30_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_13_TOUT203_P30_13_OUT

IfxGtm_TOM4_13_TOUT203_P30_13_OUT.

Definition at line 2437 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_13_TOUT231_P24_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_13_TOUT231_P24_9_OUT

IfxGtm_TOM4_13_TOUT231_P24_9_OUT.

Definition at line 2438 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_13_TOUT235_P24_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_13_TOUT235_P24_13_OUT

IfxGtm_TOM4_13_TOUT235_P24_13_OUT.

Definition at line 2439 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_13_TOUT263_P14_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_13_TOUT263_P14_15_OUT

IfxGtm_TOM4_13_TOUT263_P14_15_OUT.

Definition at line 2440 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_14_TOUT151_P02_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_14_TOUT151_P02_12_OUT

IfxGtm_TOM4_14_TOUT151_P02_12_OUT.

Definition at line 2441 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_14_TOUT153_P02_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_14_TOUT153_P02_13_OUT

IfxGtm_TOM4_14_TOUT153_P02_13_OUT.

Definition at line 2442 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_14_TOUT204_P30_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_14_TOUT204_P30_14_OUT

IfxGtm_TOM4_14_TOUT204_P30_14_OUT.

Definition at line 2443 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_14_TOUT232_P24_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_14_TOUT232_P24_10_OUT

IfxGtm_TOM4_14_TOUT232_P24_10_OUT.

Definition at line 2444 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_14_TOUT236_P24_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_14_TOUT236_P24_14_OUT

IfxGtm_TOM4_14_TOUT236_P24_14_OUT.

Definition at line 2445 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_14_TOUT264_P13_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_14_TOUT264_P13_15_OUT

IfxGtm_TOM4_14_TOUT264_P13_15_OUT.

Definition at line 2446 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_15_TOUT152_P02_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_15_TOUT152_P02_15_OUT

IfxGtm_TOM4_15_TOUT152_P02_15_OUT.

Definition at line 2447 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_15_TOUT154_P02_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_15_TOUT154_P02_14_OUT

IfxGtm_TOM4_15_TOUT154_P02_14_OUT.

Definition at line 2448 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_15_TOUT205_P30_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_15_TOUT205_P30_15_OUT

IfxGtm_TOM4_15_TOUT205_P30_15_OUT.

Definition at line 2449 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_15_TOUT233_P24_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_15_TOUT233_P24_11_OUT

IfxGtm_TOM4_15_TOUT233_P24_11_OUT.

Definition at line 2450 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_15_TOUT237_P24_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_15_TOUT237_P24_15_OUT

IfxGtm_TOM4_15_TOUT237_P24_15_OUT.

Definition at line 2451 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_1_TOUT156_P01_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_1_TOUT156_P01_2_OUT

IfxGtm_TOM4_1_TOUT156_P01_2_OUT.

Definition at line 2452 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_1_TOUT163_P01_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_1_TOUT163_P01_10_OUT

IfxGtm_TOM4_1_TOUT163_P01_10_OUT.

Definition at line 2453 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_1_TOUT191_P30_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_1_TOUT191_P30_1_OUT

IfxGtm_TOM4_1_TOUT191_P30_1_OUT.

Definition at line 2454 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_1_TOUT223_P24_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_1_TOUT223_P24_1_OUT

IfxGtm_TOM4_1_TOUT223_P24_1_OUT.

Definition at line 2455 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_1_TOUT251_P13_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_1_TOUT251_P13_10_OUT

IfxGtm_TOM4_1_TOUT251_P13_10_OUT.

Definition at line 2456 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_2_TOUT157_P01_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_2_TOUT157_P01_15_OUT

IfxGtm_TOM4_2_TOUT157_P01_15_OUT.

Definition at line 2457 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_2_TOUT164_P01_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_2_TOUT164_P01_14_OUT

IfxGtm_TOM4_2_TOUT164_P01_14_OUT.

Definition at line 2458 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_2_TOUT192_P30_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_2_TOUT192_P30_2_OUT

IfxGtm_TOM4_2_TOUT192_P30_2_OUT.

Definition at line 2459 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_2_TOUT224_P24_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_2_TOUT224_P24_2_OUT

IfxGtm_TOM4_2_TOUT224_P24_2_OUT.

Definition at line 2460 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_2_TOUT252_P13_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_2_TOUT252_P13_14_OUT

IfxGtm_TOM4_2_TOUT252_P13_14_OUT.

Definition at line 2461 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_3_TOUT165_P01_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_3_TOUT165_P01_11_OUT

IfxGtm_TOM4_3_TOUT165_P01_11_OUT.

Definition at line 2462 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_3_TOUT193_P30_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_3_TOUT193_P30_3_OUT

IfxGtm_TOM4_3_TOUT193_P30_3_OUT.

Definition at line 2463 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_3_TOUT225_P24_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_3_TOUT225_P24_3_OUT

IfxGtm_TOM4_3_TOUT225_P24_3_OUT.

Definition at line 2464 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_3_TOUT253_P13_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_3_TOUT253_P13_4_OUT

IfxGtm_TOM4_3_TOUT253_P13_4_OUT.

Definition at line 2465 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_4_TOUT111_P01_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_4_TOUT111_P01_3_OUT

IfxGtm_TOM4_4_TOUT111_P01_3_OUT.

Definition at line 2466 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_4_TOUT158_P01_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_4_TOUT158_P01_12_OUT

IfxGtm_TOM4_4_TOUT158_P01_12_OUT.

Definition at line 2467 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_4_TOUT194_P30_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_4_TOUT194_P30_4_OUT

IfxGtm_TOM4_4_TOUT194_P30_4_OUT.

Definition at line 2468 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_4_TOUT226_P24_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_4_TOUT226_P24_4_OUT

IfxGtm_TOM4_4_TOUT226_P24_4_OUT.

Definition at line 2469 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_4_TOUT254_P13_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_4_TOUT254_P13_5_OUT

IfxGtm_TOM4_4_TOUT254_P13_5_OUT.

Definition at line 2470 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_4_TOUT8_P02_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_4_TOUT8_P02_8_OUT

IfxGtm_TOM4_4_TOUT8_P02_8_OUT.

Definition at line 2471 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_5_TOUT116_P02_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_5_TOUT116_P02_9_OUT

IfxGtm_TOM4_5_TOUT116_P02_9_OUT.

Definition at line 2472 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_5_TOUT159_P01_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_5_TOUT159_P01_1_OUT

IfxGtm_TOM4_5_TOUT159_P01_1_OUT.

Definition at line 2473 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_5_TOUT195_P30_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_5_TOUT195_P30_5_OUT

IfxGtm_TOM4_5_TOUT195_P30_5_OUT.

Definition at line 2474 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_5_TOUT227_P24_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_5_TOUT227_P24_5_OUT

IfxGtm_TOM4_5_TOUT227_P24_5_OUT.

Definition at line 2475 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_5_TOUT255_P13_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_5_TOUT255_P13_6_OUT

IfxGtm_TOM4_5_TOUT255_P13_6_OUT.

Definition at line 2476 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_6_TOUT117_P02_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_6_TOUT117_P02_10_OUT

IfxGtm_TOM4_6_TOUT117_P02_10_OUT.

Definition at line 2477 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_6_TOUT160_P01_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_6_TOUT160_P01_9_OUT

IfxGtm_TOM4_6_TOUT160_P01_9_OUT.

Definition at line 2478 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_6_TOUT196_P30_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_6_TOUT196_P30_6_OUT

IfxGtm_TOM4_6_TOUT196_P30_6_OUT.

Definition at line 2479 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_6_TOUT228_P24_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_6_TOUT228_P24_6_OUT

IfxGtm_TOM4_6_TOUT228_P24_6_OUT.

Definition at line 2480 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_6_TOUT256_P13_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_6_TOUT256_P13_7_OUT

IfxGtm_TOM4_6_TOUT256_P13_7_OUT.

Definition at line 2481 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_7_TOUT118_P02_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_7_TOUT118_P02_11_OUT

IfxGtm_TOM4_7_TOUT118_P02_11_OUT.

Definition at line 2482 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_7_TOUT161_P01_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_7_TOUT161_P01_13_OUT

IfxGtm_TOM4_7_TOUT161_P01_13_OUT.

Definition at line 2483 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_7_TOUT197_P30_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_7_TOUT197_P30_7_OUT

IfxGtm_TOM4_7_TOUT197_P30_7_OUT.

Definition at line 2484 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_7_TOUT229_P24_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_7_TOUT229_P24_7_OUT

IfxGtm_TOM4_7_TOUT229_P24_7_OUT.

Definition at line 2485 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_7_TOUT264_P13_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_7_TOUT264_P13_15_OUT

IfxGtm_TOM4_7_TOUT264_P13_15_OUT.

Definition at line 2486 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_8_TOUT162_P01_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_8_TOUT162_P01_8_OUT

IfxGtm_TOM4_8_TOUT162_P01_8_OUT.

Definition at line 2487 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_8_TOUT198_P30_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_8_TOUT198_P30_8_OUT

IfxGtm_TOM4_8_TOUT198_P30_8_OUT.

Definition at line 2488 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_8_TOUT202_P30_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_8_TOUT202_P30_12_OUT

IfxGtm_TOM4_8_TOUT202_P30_12_OUT.

Definition at line 2489 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_8_TOUT230_P24_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_8_TOUT230_P24_8_OUT

IfxGtm_TOM4_8_TOUT230_P24_8_OUT.

Definition at line 2490 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_8_TOUT258_P14_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_8_TOUT258_P14_11_OUT

IfxGtm_TOM4_8_TOUT258_P14_11_OUT.

Definition at line 2491 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_9_TOUT163_P01_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_9_TOUT163_P01_10_OUT

IfxGtm_TOM4_9_TOUT163_P01_10_OUT.

Definition at line 2492 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_9_TOUT199_P30_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_9_TOUT199_P30_9_OUT

IfxGtm_TOM4_9_TOUT199_P30_9_OUT.

Definition at line 2493 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_9_TOUT203_P30_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_9_TOUT203_P30_13_OUT

IfxGtm_TOM4_9_TOUT203_P30_13_OUT.

Definition at line 2494 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_9_TOUT231_P24_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_9_TOUT231_P24_9_OUT

IfxGtm_TOM4_9_TOUT231_P24_9_OUT.

Definition at line 2495 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM4_9_TOUT259_P14_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_9_TOUT259_P14_14_OUT

IfxGtm_TOM4_9_TOUT259_P14_14_OUT.

Definition at line 2496 of file IfxGtm_PinMap.h.


iLLD_TC38A: GTM Trigger Configuration

Modules
GTM Trigger Configuration
iLLD » GTM
Collaboration diagram for GTM Trigger Configuration:

Modules

Enumerations
Data Structures
Trigger Functions

Detailed Description


iLLD_TC38A: Enumerations

Enumerations
Enumerations
iLLD » GTM » GTM Trigger Configuration
Collaboration diagram for Enumerations:

Enumerations

enum IfxGtm_Trig_AdcGroup {
IfxGtm_Trig_AdcGroup_0,
IfxGtm_Trig_AdcGroup_1,
IfxGtm_Trig_AdcGroup_2,
IfxGtm_Trig_AdcGroup_3,
IfxGtm_Trig_AdcGroup_4,
IfxGtm_Trig_AdcGroup_5,
IfxGtm_Trig_AdcGroup_6,
IfxGtm_Trig_AdcGroup_7,
IfxGtm_Trig_AdcGroup_8,
IfxGtm_Trig_AdcGroup_9,
IfxGtm_Trig_AdcGroup_10,
IfxGtm_Trig_AdcGroup_11
}
Enum for ADC group. More...
enum IfxGtm_Trig_AdcTrig {
IfxGtm_Trig_AdcTrig_0,
IfxGtm_Trig_AdcTrig_1,
IfxGtm_Trig_AdcTrig_2,
IfxGtm_Trig_AdcTrig_3,
IfxGtm_Trig_AdcTrig_4,
IfxGtm_Trig_AdcTrig_count
}
Enum for ADC trigger. More...
enum IfxGtm_Trig_AdcTrigChannel {
IfxGtm_Trig_AdcTrigChannel_3,
IfxGtm_Trig_AdcTrigChannel_4,
IfxGtm_Trig_AdcTrigChannel_5,
IfxGtm_Trig_AdcTrigChannel_6,
IfxGtm_Trig_AdcTrigChannel_7,
IfxGtm_Trig_AdcTrigChannel_11,
IfxGtm_Trig_AdcTrigChannel_12,
IfxGtm_Trig_AdcTrigChannel_13,
IfxGtm_Trig_AdcTrigChannel_14,
IfxGtm_Trig_AdcTrigChannel_15,
IfxGtm_Trig_AdcTrigChannel_count
}
Enum for ADC trigger channel. More...
enum IfxGtm_Trig_AdcTrigSource {
IfxGtm_Trig_AdcTrigSource_atom0,
IfxGtm_Trig_AdcTrigSource_atom1,
IfxGtm_Trig_AdcTrigSource_atom2,
IfxGtm_Trig_AdcTrigSource_atom3,
IfxGtm_Trig_AdcTrigSource_atom4,
IfxGtm_Trig_AdcTrigSource_atom5,
IfxGtm_Trig_AdcTrigSource_atom6,
IfxGtm_Trig_AdcTrigSource_atom7,
IfxGtm_Trig_AdcTrigSource_atom8,
IfxGtm_Trig_AdcTrigSource_atom9,
IfxGtm_Trig_AdcTrigSource_atom10,
IfxGtm_Trig_AdcTrigSource_atom11,
IfxGtm_Trig_AdcTrigSource_tom0,
IfxGtm_Trig_AdcTrigSource_tom1,
IfxGtm_Trig_AdcTrigSource_tom2,
IfxGtm_Trig_AdcTrigSource_tom3,
IfxGtm_Trig_AdcTrigSource_tom4,
IfxGtm_Trig_AdcTrigSource_tom5,
IfxGtm_Trig_AdcTrigSource_count
}
Enum for ADC trigger source. More...
enum IfxGtm_Trig_CanDevice {
IfxGtm_Trig_CanDevice_0,
IfxGtm_Trig_CanDevice_1,
IfxGtm_Trig_CanDevice_2,
IfxGtm_Trig_CanDevice_count
}
CAN device enum. More...
enum IfxGtm_Trig_CanTrig {
IfxGtm_Trig_CanTrig_0,
IfxGtm_Trig_CanTrig_1,
IfxGtm_Trig_CanTrig_2,
IfxGtm_Trig_CanTrig_3,
IfxGtm_Trig_CanTrig_count
}
Enum for CAN trigger. More...
enum IfxGtm_Trig_CanTrigChannel {
IfxGtm_Trig_CanTrigChannel_0,
IfxGtm_Trig_CanTrigChannel_1,
IfxGtm_Trig_CanTrigChannel_2,
IfxGtm_Trig_CanTrigChannel_3,
IfxGtm_Trig_CanTrigChannel_4,
IfxGtm_Trig_CanTrigChannel_5,
IfxGtm_Trig_CanTrigChannel_6,
IfxGtm_Trig_CanTrigChannel_7,
IfxGtm_Trig_CanTrigChannel_11,
IfxGtm_Trig_CanTrigChannel_12,
IfxGtm_Trig_CanTrigChannel_13,
IfxGtm_Trig_CanTrigChannel_14,
IfxGtm_Trig_CanTrigChannel_count
}
Enum for CAN trigger channel. More...
enum IfxGtm_Trig_CanTrigSource {
IfxGtm_Trig_CanTrigSource_tom0,
IfxGtm_Trig_CanTrigSource_tom1,
IfxGtm_Trig_CanTrigSource_atom0,
IfxGtm_Trig_CanTrigSource_atom1,
IfxGtm_Trig_CanTrigSource_atom2,
IfxGtm_Trig_CanTrigSource_count
}
Enum for CAN trigger source. More...
enum IfxGtm_Trig_EdsadcTrig {
IfxGtm_Trig_EdsadcTrig_0,
IfxGtm_Trig_EdsadcTrig_1,
IfxGtm_Trig_EdsadcTrig_2,
IfxGtm_Trig_EdsadcTrig_3
}
Enum for EDSADC trigger. More...
enum IfxGtm_Trig_EdsadcTrigSource {
IfxGtm_Trig_EdsadcTrigSource_tom0_6,
IfxGtm_Trig_EdsadcTrigSource_tom0_7,
IfxGtm_Trig_EdsadcTrigSource_tom0_13,
IfxGtm_Trig_EdsadcTrigSource_tom0_14,
IfxGtm_Trig_EdsadcTrigSource_atom0_4,
IfxGtm_Trig_EdsadcTrigSource_atom0_5,
IfxGtm_Trig_EdsadcTrigSource_atom0_6,
IfxGtm_Trig_EdsadcTrigSource_atom0_7,
IfxGtm_Trig_EdsadcTrigSource_atom1_4,
IfxGtm_Trig_EdsadcTrigSource_atom1_5,
IfxGtm_Trig_EdsadcTrigSource_atom1_6,
IfxGtm_Trig_EdsadcTrigSource_atom1_7,
IfxGtm_Trig_EdsadcTrigSource_atom4_6,
IfxGtm_Trig_EdsadcTrigSource_atom4_7,
IfxGtm_Trig_EdsadcTrigSource_atom6_6,
IfxGtm_Trig_EdsadcTrigSource_reserved0,
IfxGtm_Trig_EdsadcTrigSource_tom2_6,
IfxGtm_Trig_EdsadcTrigSource_tom2_7,
IfxGtm_Trig_EdsadcTrigSource_tom2_13,
IfxGtm_Trig_EdsadcTrigSource_tom2_14,
IfxGtm_Trig_EdsadcTrigSource_atom2_4,
IfxGtm_Trig_EdsadcTrigSource_atom2_5,
IfxGtm_Trig_EdsadcTrigSource_atom2_6,
IfxGtm_Trig_EdsadcTrigSource_atom2_7,
IfxGtm_Trig_EdsadcTrigSource_atom3_4,
IfxGtm_Trig_EdsadcTrigSource_atom3_5,
IfxGtm_Trig_EdsadcTrigSource_atom3_6,
IfxGtm_Trig_EdsadcTrigSource_atom3_7,
IfxGtm_Trig_EdsadcTrigSource_atom5_6,
IfxGtm_Trig_EdsadcTrigSource_atom5_7,
IfxGtm_Trig_EdsadcTrigSource_atom6_7,
IfxGtm_Trig_EdsadcTrigSource_reserved1,
IfxGtm_Trig_EdsadcTrigSource_tom1_7,
IfxGtm_Trig_EdsadcTrigSource_tom1_14,
IfxGtm_Trig_EdsadcTrigSource_tom3_7,
IfxGtm_Trig_EdsadcTrigSource_tom3_14,
IfxGtm_Trig_EdsadcTrigSource_tom4_7,
IfxGtm_Trig_EdsadcTrigSource_tom4_14,
IfxGtm_Trig_EdsadcTrigSource_tom5_7,
IfxGtm_Trig_EdsadcTrigSource_tom5_14,
IfxGtm_Trig_EdsadcTrigSource_atom7_6,
IfxGtm_Trig_EdsadcTrigSource_atom7_7,
IfxGtm_Trig_EdsadcTrigSource_atom8_6,
IfxGtm_Trig_EdsadcTrigSource_atom8_7,
IfxGtm_Trig_EdsadcTrigSource_atom9_6,
IfxGtm_Trig_EdsadcTrigSource_atom9_7,
IfxGtm_Trig_EdsadcTrigSource_atom11_6,
IfxGtm_Trig_EdsadcTrigSource_reserved2,
IfxGtm_Trig_EdsadcTrigSource_tom1_6,
IfxGtm_Trig_EdsadcTrigSource_atom10_6,
IfxGtm_Trig_EdsadcTrigSource_atom10_7,
IfxGtm_Trig_EdsadcTrigSource_atom11_7
}
Enum for EDSADC trigger source. More...
enum IfxGtm_Trig_MscTrigChannel {
IfxGtm_Trig_MscTrigChannel_0,
IfxGtm_Trig_MscTrigChannel_1,
IfxGtm_Trig_MscTrigChannel_2,
IfxGtm_Trig_MscTrigChannel_3,
IfxGtm_Trig_MscTrigChannel_4,
IfxGtm_Trig_MscTrigChannel_5,
IfxGtm_Trig_MscTrigChannel_6,
IfxGtm_Trig_MscTrigChannel_7,
IfxGtm_Trig_MscTrigChannel_8,
IfxGtm_Trig_MscTrigChannel_9,
IfxGtm_Trig_MscTrigChannel_10,
IfxGtm_Trig_MscTrigChannel_11,
IfxGtm_Trig_MscTrigChannel_12,
IfxGtm_Trig_MscTrigChannel_13,
IfxGtm_Trig_MscTrigChannel_14,
IfxGtm_Trig_MscTrigChannel_15,
IfxGtm_Trig_MscTrigChannel_count
}
Enum for MSC trigger channel. More...
enum IfxGtm_Trig_MscTrigInput {
IfxGtm_Trig_MscTrigInput_low,
IfxGtm_Trig_MscTrigInput_lowExtended,
IfxGtm_Trig_MscTrigInput_high
}
Enum for MSC trigger Input Type. More...
enum IfxGtm_Trig_MscTrigOutput {
IfxGtm_Trig_MscTrigOutput_0,
IfxGtm_Trig_MscTrigOutput_1,
IfxGtm_Trig_MscTrigOutput_2,
IfxGtm_Trig_MscTrigOutput_3
}
Enum for MSC trigger output select. More...
enum IfxGtm_Trig_MscTrigSet {
IfxGtm_Trig_MscTrigSet_1,
IfxGtm_Trig_MscTrigSet_2,
IfxGtm_Trig_MscTrigSet_3,
IfxGtm_Trig_MscTrigSet_4,
IfxGtm_Trig_MscTrigSet_5,
IfxGtm_Trig_MscTrigSet_6,
IfxGtm_Trig_MscTrigSet_7,
IfxGtm_Trig_MscTrigSet_8,
IfxGtm_Trig_MscTrigSet_9,
IfxGtm_Trig_MscTrigSet_count
}
Enum for MSC Sets. More...
enum IfxGtm_Trig_MscTrigSignal {
IfxGtm_Trig_MscTrigSignal_0,
IfxGtm_Trig_MscTrigSignal_1,
IfxGtm_Trig_MscTrigSignal_2,
IfxGtm_Trig_MscTrigSignal_3,
IfxGtm_Trig_MscTrigSignal_4,
IfxGtm_Trig_MscTrigSignal_5,
IfxGtm_Trig_MscTrigSignal_6,
IfxGtm_Trig_MscTrigSignal_7,
IfxGtm_Trig_MscTrigSignal_8,
IfxGtm_Trig_MscTrigSignal_9,
IfxGtm_Trig_MscTrigSignal_10,
IfxGtm_Trig_MscTrigSignal_11,
IfxGtm_Trig_MscTrigSignal_12,
IfxGtm_Trig_MscTrigSignal_13,
IfxGtm_Trig_MscTrigSignal_14,
IfxGtm_Trig_MscTrigSignal_15
}
Enum for MSC Signal. More...
enum IfxGtm_Trig_MscTrigSource {
IfxGtm_Trig_MscTrigSource_tom0,
IfxGtm_Trig_MscTrigSource_tom1,
IfxGtm_Trig_MscTrigSource_tom2,
IfxGtm_Trig_MscTrigSource_tom3,
IfxGtm_Trig_MscTrigSource_tom4,
IfxGtm_Trig_MscTrigSource_tom5,
IfxGtm_Trig_MscTrigSource_atom0,
IfxGtm_Trig_MscTrigSource_atom1,
IfxGtm_Trig_MscTrigSource_atom2,
IfxGtm_Trig_MscTrigSource_atom3,
IfxGtm_Trig_MscTrigSource_atom4,
IfxGtm_Trig_MscTrigSource_atom5,
IfxGtm_Trig_MscTrigSource_atom6,
IfxGtm_Trig_MscTrigSource_atom7,
IfxGtm_Trig_MscTrigSource_atom8,
IfxGtm_Trig_MscTrigSource_atom9,
IfxGtm_Trig_MscTrigSource_atom10,
IfxGtm_Trig_MscTrigSource_atom11,
IfxGtm_Trig_MscTrigSource_count
}
Enum for MSC trigger source. More...
enum IfxGtm_Trig_Psi5TrigSource {
IfxGtm_Trig_Psi5TrigSource_no_Trigger,
IfxGtm_Trig_Psi5TrigSource_tom2_6,
IfxGtm_Trig_Psi5TrigSource_tom2_7,
IfxGtm_Trig_Psi5TrigSource_tom2_13,
IfxGtm_Trig_Psi5TrigSource_tom2_14,
IfxGtm_Trig_Psi5TrigSource_atom2_4,
IfxGtm_Trig_Psi5TrigSource_atom2_5,
IfxGtm_Trig_Psi5TrigSource_atom2_6,
IfxGtm_Trig_Psi5TrigSource_atom2_7,
IfxGtm_Trig_Psi5TrigSource_tom0_6,
IfxGtm_Trig_Psi5TrigSource_tom0_7,
IfxGtm_Trig_Psi5TrigSource_tom0_13,
IfxGtm_Trig_Psi5TrigSource_tom0_14
}
Enum for PSI5 trigger source. More...
enum IfxGtm_Trig_Psi5sTrigSource {
IfxGtm_Trig_Psi5sTrigSource_no_Trigger,
IfxGtm_Trig_Psi5sTrigSource_tomX_6,
IfxGtm_Trig_Psi5sTrigSource_tomX_7,
IfxGtm_Trig_Psi5sTrigSource_tomX_13,
IfxGtm_Trig_Psi5sTrigSource_tomX_14,
IfxGtm_Trig_Psi5sTrigSource_atomX_4,
IfxGtm_Trig_Psi5sTrigSource_atomX_5,
IfxGtm_Trig_Psi5sTrigSource_atomX_6,
IfxGtm_Trig_Psi5sTrigSource_atomX_7
}
Enum for DSADC trigger source. More...
enum IfxGtm_Trig_SentGroup {
IfxGtm_Trig_SentGroup_0,
IfxGtm_Trig_SentGroup_1,
IfxGtm_Trig_SentGroup_2,
IfxGtm_Trig_SentGroup_3,
IfxGtm_Trig_SentGroup_4,
IfxGtm_Trig_SentGroup_5,
IfxGtm_Trig_SentGroup_6,
IfxGtm_Trig_SentGroup_7,
IfxGtm_Trig_SentGroup_8,
IfxGtm_Trig_SentGroup_9,
IfxGtm_Trig_SentGroup_10,
IfxGtm_Trig_SentGroup_11,
IfxGtm_Trig_SentGroup_12,
IfxGtm_Trig_SentGroup_13,
IfxGtm_Trig_SentGroup_14,
IfxGtm_Trig_SentGroup_15
}
Enum for SENT group. More...
enum IfxGtm_Trig_SentTrig {
IfxGtm_Trig_SentTrig_0,
IfxGtm_Trig_SentTrig_1,
IfxGtm_Trig_SentTrig_2,
IfxGtm_Trig_SentTrig_3
}
Enum for SENT trigger. More...
enum IfxGtm_Trig_SentTrigChannel {
IfxGtm_Trig_SentTrigChannel_3,
IfxGtm_Trig_SentTrigChannel_4,
IfxGtm_Trig_SentTrigChannel_5,
IfxGtm_Trig_SentTrigChannel_6,
IfxGtm_Trig_SentTrigChannel_7,
IfxGtm_Trig_SentTrigChannel_11,
IfxGtm_Trig_SentTrigChannel_12,
IfxGtm_Trig_SentTrigChannel_13,
IfxGtm_Trig_SentTrigChannel_14,
IfxGtm_Trig_SentTrigChannel_15,
IfxGtm_Trig_SentTrigChannel_count
}
Enum for SENT trigger channel. More...
enum IfxGtm_Trig_SentTrigSource {
IfxGtm_Trig_SentTrigSource_atom0,
IfxGtm_Trig_SentTrigSource_atom1,
IfxGtm_Trig_SentTrigSource_atom2,
IfxGtm_Trig_SentTrigSource_atom3,
IfxGtm_Trig_SentTrigSource_atom4,
IfxGtm_Trig_SentTrigSource_atom5,
IfxGtm_Trig_SentTrigSource_atom6,
IfxGtm_Trig_SentTrigSource_atom7,
IfxGtm_Trig_SentTrigSource_atom8,
IfxGtm_Trig_SentTrigSource_atom9,
IfxGtm_Trig_SentTrigSource_atom10,
IfxGtm_Trig_SentTrigSource_atom11,
IfxGtm_Trig_SentTrigSource_tom0,
IfxGtm_Trig_SentTrigSource_tom1,
IfxGtm_Trig_SentTrigSource_tom2,
IfxGtm_Trig_SentTrigSource_tom3,
IfxGtm_Trig_SentTrigSource_tom4,
IfxGtm_Trig_SentTrigSource_tom5,
IfxGtm_Trig_SentTrigSource_count
}
Enum for SENT trigger source. More...

Detailed Description

Enumeration Type Documentation

◆ IfxGtm_Trig_AdcGroup

enum IfxGtm_Trig_AdcGroup

Enum for ADC group.

Enumerator
IfxGtm_Trig_AdcGroup_0 | For ADC group 0.
IfxGtm_Trig_AdcGroup_1 | For ADC group 1.
IfxGtm_Trig_AdcGroup_2 | For ADC group 2.
IfxGtm_Trig_AdcGroup_3 | For ADC group 3.
IfxGtm_Trig_AdcGroup_4 | For ADC group 4.
IfxGtm_Trig_AdcGroup_5 | For ADC group 5.
IfxGtm_Trig_AdcGroup_6 | For ADC group 6.
IfxGtm_Trig_AdcGroup_7 | For ADC group 7.
IfxGtm_Trig_AdcGroup_8 | For ADC group 8.
IfxGtm_Trig_AdcGroup_9 | For ADC group 9.
IfxGtm_Trig_AdcGroup_10 | For ADC group 10.
IfxGtm_Trig_AdcGroup_11 | For ADC group 11.

Definition at line 70 of file IfxGtm_Trig.h.

◆ IfxGtm_Trig_AdcTrig

enum IfxGtm_Trig_AdcTrig

Enum for ADC trigger.

Enumerator
IfxGtm_Trig_AdcTrig_0 |
IfxGtm_Trig_AdcTrig_1 |
IfxGtm_Trig_AdcTrig_2 |
IfxGtm_Trig_AdcTrig_3 |
IfxGtm_Trig_AdcTrig_4 |
IfxGtm_Trig_AdcTrig_count | count of the enum definition

Definition at line 88 of file IfxGtm_Trig.h.

◆ IfxGtm_Trig_AdcTrigChannel

enum IfxGtm_Trig_AdcTrigChannel

Enum for ADC trigger channel.

Enumerator
IfxGtm_Trig_AdcTrigChannel_3 |
IfxGtm_Trig_AdcTrigChannel_4 |
IfxGtm_Trig_AdcTrigChannel_5 |
IfxGtm_Trig_AdcTrigChannel_6 |
IfxGtm_Trig_AdcTrigChannel_7 |
IfxGtm_Trig_AdcTrigChannel_11 |
IfxGtm_Trig_AdcTrigChannel_12 |
IfxGtm_Trig_AdcTrigChannel_13 |
IfxGtm_Trig_AdcTrigChannel_14 |
IfxGtm_Trig_AdcTrigChannel_15 |
IfxGtm_Trig_AdcTrigChannel_count | count of the enum definition

Definition at line 100 of file IfxGtm_Trig.h.

◆ IfxGtm_Trig_AdcTrigSource

enum IfxGtm_Trig_AdcTrigSource

Enum for ADC trigger source.

Enumerator
IfxGtm_Trig_AdcTrigSource_atom0 |
IfxGtm_Trig_AdcTrigSource_atom1 |
IfxGtm_Trig_AdcTrigSource_atom2 |
IfxGtm_Trig_AdcTrigSource_atom3 |
IfxGtm_Trig_AdcTrigSource_atom4 |
IfxGtm_Trig_AdcTrigSource_atom5 |
IfxGtm_Trig_AdcTrigSource_atom6 |
IfxGtm_Trig_AdcTrigSource_atom7 |
IfxGtm_Trig_AdcTrigSource_atom8 |
IfxGtm_Trig_AdcTrigSource_atom9 |
IfxGtm_Trig_AdcTrigSource_atom10 |
IfxGtm_Trig_AdcTrigSource_atom11 |
IfxGtm_Trig_AdcTrigSource_tom0 |
IfxGtm_Trig_AdcTrigSource_tom1 |
IfxGtm_Trig_AdcTrigSource_tom2 |
IfxGtm_Trig_AdcTrigSource_tom3 |
IfxGtm_Trig_AdcTrigSource_tom4 |
IfxGtm_Trig_AdcTrigSource_tom5 |
IfxGtm_Trig_AdcTrigSource_count | count of the enum definition

Definition at line 117 of file IfxGtm_Trig.h.

◆ IfxGtm_Trig_CanDevice

enum IfxGtm_Trig_CanDevice

CAN device enum.

Enumerator
IfxGtm_Trig_CanDevice_0 | CAN device 0.
IfxGtm_Trig_CanDevice_1 | CAN device 1.
IfxGtm_Trig_CanDevice_2 | CAN device 2.
IfxGtm_Trig_CanDevice_count | count of the enum definition

Definition at line 142 of file IfxGtm_Trig.h.

◆ IfxGtm_Trig_CanTrig

enum IfxGtm_Trig_CanTrig

Enum for CAN trigger.

Enumerator
IfxGtm_Trig_CanTrig_0 | For CAN Trig 0.
IfxGtm_Trig_CanTrig_1 | For CAN Trig 1.
IfxGtm_Trig_CanTrig_2 | For CAN Trig 2.
IfxGtm_Trig_CanTrig_3 | For CAN Trig 3.
IfxGtm_Trig_CanTrig_count | count of the enum definition

Definition at line 152 of file IfxGtm_Trig.h.

◆ IfxGtm_Trig_CanTrigChannel

enum IfxGtm_Trig_CanTrigChannel

Enum for CAN trigger channel.

Enumerator
IfxGtm_Trig_CanTrigChannel_0 |
IfxGtm_Trig_CanTrigChannel_1 |
IfxGtm_Trig_CanTrigChannel_2 |
IfxGtm_Trig_CanTrigChannel_3 |
IfxGtm_Trig_CanTrigChannel_4 |
IfxGtm_Trig_CanTrigChannel_5 |
IfxGtm_Trig_CanTrigChannel_6 |
IfxGtm_Trig_CanTrigChannel_7 |
IfxGtm_Trig_CanTrigChannel_11 |
IfxGtm_Trig_CanTrigChannel_12 |
IfxGtm_Trig_CanTrigChannel_13 |
IfxGtm_Trig_CanTrigChannel_14 |
IfxGtm_Trig_CanTrigChannel_count | count of the enum definition

Definition at line 163 of file IfxGtm_Trig.h.

◆ IfxGtm_Trig_CanTrigSource

enum IfxGtm_Trig_CanTrigSource

Enum for CAN trigger source.

Enumerator
IfxGtm_Trig_CanTrigSource_tom0 |
IfxGtm_Trig_CanTrigSource_tom1 |
IfxGtm_Trig_CanTrigSource_atom0 |
IfxGtm_Trig_CanTrigSource_atom1 |
IfxGtm_Trig_CanTrigSource_atom2 |
IfxGtm_Trig_CanTrigSource_count | count of the enum definition

Definition at line 182 of file IfxGtm_Trig.h.

◆ IfxGtm_Trig_EdsadcTrig

enum IfxGtm_Trig_EdsadcTrig

Enum for EDSADC trigger.

Enumerator
IfxGtm_Trig_EdsadcTrig_0
IfxGtm_Trig_EdsadcTrig_1
IfxGtm_Trig_EdsadcTrig_2
IfxGtm_Trig_EdsadcTrig_3

Definition at line 194 of file IfxGtm_Trig.h.

◆ IfxGtm_Trig_EdsadcTrigSource

enum IfxGtm_Trig_EdsadcTrigSource

Enum for EDSADC trigger source.

Enumerator
IfxGtm_Trig_EdsadcTrigSource_tom0_6
IfxGtm_Trig_EdsadcTrigSource_tom0_7
IfxGtm_Trig_EdsadcTrigSource_tom0_13
IfxGtm_Trig_EdsadcTrigSource_tom0_14
IfxGtm_Trig_EdsadcTrigSource_atom0_4
IfxGtm_Trig_EdsadcTrigSource_atom0_5
IfxGtm_Trig_EdsadcTrigSource_atom0_6
IfxGtm_Trig_EdsadcTrigSource_atom0_7
IfxGtm_Trig_EdsadcTrigSource_atom1_4
IfxGtm_Trig_EdsadcTrigSource_atom1_5
IfxGtm_Trig_EdsadcTrigSource_atom1_6
IfxGtm_Trig_EdsadcTrigSource_atom1_7
IfxGtm_Trig_EdsadcTrigSource_atom4_6
IfxGtm_Trig_EdsadcTrigSource_atom4_7
IfxGtm_Trig_EdsadcTrigSource_atom6_6
IfxGtm_Trig_EdsadcTrigSource_reserved0
IfxGtm_Trig_EdsadcTrigSource_tom2_6
IfxGtm_Trig_EdsadcTrigSource_tom2_7
IfxGtm_Trig_EdsadcTrigSource_tom2_13
IfxGtm_Trig_EdsadcTrigSource_tom2_14
IfxGtm_Trig_EdsadcTrigSource_atom2_4
IfxGtm_Trig_EdsadcTrigSource_atom2_5
IfxGtm_Trig_EdsadcTrigSource_atom2_6
IfxGtm_Trig_EdsadcTrigSource_atom2_7
IfxGtm_Trig_EdsadcTrigSource_atom3_4
IfxGtm_Trig_EdsadcTrigSource_atom3_5
IfxGtm_Trig_EdsadcTrigSource_atom3_6
IfxGtm_Trig_EdsadcTrigSource_atom3_7
IfxGtm_Trig_EdsadcTrigSource_atom5_6
IfxGtm_Trig_EdsadcTrigSource_atom5_7
IfxGtm_Trig_EdsadcTrigSource_atom6_7
IfxGtm_Trig_EdsadcTrigSource_reserved1
IfxGtm_Trig_EdsadcTrigSource_tom1_7
IfxGtm_Trig_EdsadcTrigSource_tom1_14
IfxGtm_Trig_EdsadcTrigSource_tom3_7
IfxGtm_Trig_EdsadcTrigSource_tom3_14
IfxGtm_Trig_EdsadcTrigSource_tom4_7
IfxGtm_Trig_EdsadcTrigSource_tom4_14
IfxGtm_Trig_EdsadcTrigSource_tom5_7
IfxGtm_Trig_EdsadcTrigSource_tom5_14
IfxGtm_Trig_EdsadcTrigSource_atom7_6
IfxGtm_Trig_EdsadcTrigSource_atom7_7
IfxGtm_Trig_EdsadcTrigSource_atom8_6
IfxGtm_Trig_EdsadcTrigSource_atom8_7
IfxGtm_Trig_EdsadcTrigSource_atom9_6
IfxGtm_Trig_EdsadcTrigSource_atom9_7
IfxGtm_Trig_EdsadcTrigSource_atom11_6
IfxGtm_Trig_EdsadcTrigSource_reserved2
IfxGtm_Trig_EdsadcTrigSource_tom1_6
IfxGtm_Trig_EdsadcTrigSource_atom10_6
IfxGtm_Trig_EdsadcTrigSource_atom10_7
IfxGtm_Trig_EdsadcTrigSource_atom11_7

Definition at line 204 of file IfxGtm_Trig.h.

◆ IfxGtm_Trig_MscTrigChannel

enum IfxGtm_Trig_MscTrigChannel

Enum for MSC trigger channel.

Enumerator
IfxGtm_Trig_MscTrigChannel_0 |
IfxGtm_Trig_MscTrigChannel_1 |
IfxGtm_Trig_MscTrigChannel_2 |
IfxGtm_Trig_MscTrigChannel_3 |
IfxGtm_Trig_MscTrigChannel_4 |
IfxGtm_Trig_MscTrigChannel_5 |
IfxGtm_Trig_MscTrigChannel_6 |
IfxGtm_Trig_MscTrigChannel_7 |
IfxGtm_Trig_MscTrigChannel_8 |
IfxGtm_Trig_MscTrigChannel_9 |
IfxGtm_Trig_MscTrigChannel_10 |
IfxGtm_Trig_MscTrigChannel_11 |
IfxGtm_Trig_MscTrigChannel_12 |
IfxGtm_Trig_MscTrigChannel_13 |
IfxGtm_Trig_MscTrigChannel_14 |
IfxGtm_Trig_MscTrigChannel_15 |
IfxGtm_Trig_MscTrigChannel_count | count of the enum definition

Definition at line 262 of file IfxGtm_Trig.h.

◆ IfxGtm_Trig_MscTrigInput

enum IfxGtm_Trig_MscTrigInput

Enum for MSC trigger Input Type.

Enumerator
IfxGtm_Trig_MscTrigInput_low
IfxGtm_Trig_MscTrigInput_lowExtended
IfxGtm_Trig_MscTrigInput_high

Definition at line 285 of file IfxGtm_Trig.h.

◆ IfxGtm_Trig_MscTrigOutput

enum IfxGtm_Trig_MscTrigOutput

Enum for MSC trigger output select.

Enumerator
IfxGtm_Trig_MscTrigOutput_0
IfxGtm_Trig_MscTrigOutput_1
IfxGtm_Trig_MscTrigOutput_2
IfxGtm_Trig_MscTrigOutput_3

Definition at line 294 of file IfxGtm_Trig.h.

◆ IfxGtm_Trig_MscTrigSet

enum IfxGtm_Trig_MscTrigSet

Enum for MSC Sets.

Enumerator
IfxGtm_Trig_MscTrigSet_1 | For MSC set 1.
IfxGtm_Trig_MscTrigSet_2 | For MSC set 2.
IfxGtm_Trig_MscTrigSet_3 | For MSC set 3.
IfxGtm_Trig_MscTrigSet_4 | For MSC set 4.
IfxGtm_Trig_MscTrigSet_5 | For MSC set 5.
IfxGtm_Trig_MscTrigSet_6 | For MSC set 6.
IfxGtm_Trig_MscTrigSet_7 | For MSC set 7.
IfxGtm_Trig_MscTrigSet_8 | For MSC set 8.
IfxGtm_Trig_MscTrigSet_9 | For MSC set 9.
IfxGtm_Trig_MscTrigSet_count | count of the enum definition

Definition at line 304 of file IfxGtm_Trig.h.

◆ IfxGtm_Trig_MscTrigSignal

enum IfxGtm_Trig_MscTrigSignal

Enum for MSC Signal.

Enumerator
IfxGtm_Trig_MscTrigSignal_0 | For MSC set 0.
IfxGtm_Trig_MscTrigSignal_1 | For MSC set 1.
IfxGtm_Trig_MscTrigSignal_2 | For MSC set 2.
IfxGtm_Trig_MscTrigSignal_3 | For MSC set 3.
IfxGtm_Trig_MscTrigSignal_4 | For MSC set 4.
IfxGtm_Trig_MscTrigSignal_5 | For MSC set 5.
IfxGtm_Trig_MscTrigSignal_6 | For MSC set 6.
IfxGtm_Trig_MscTrigSignal_7 | For MSC set 7.
IfxGtm_Trig_MscTrigSignal_8 | For MSC set 8.
IfxGtm_Trig_MscTrigSignal_9 | For MSC set 9.
IfxGtm_Trig_MscTrigSignal_10 | For MSC set 10.
IfxGtm_Trig_MscTrigSignal_11 | For MSC set 11.
IfxGtm_Trig_MscTrigSignal_12 | For MSC set 12.
IfxGtm_Trig_MscTrigSignal_13 | For MSC set 13.
IfxGtm_Trig_MscTrigSignal_14 | For MSC set 14.
IfxGtm_Trig_MscTrigSignal_15 | For MSC set 15.

Definition at line 320 of file IfxGtm_Trig.h.

◆ IfxGtm_Trig_MscTrigSource

enum IfxGtm_Trig_MscTrigSource

Enum for MSC trigger source.

Enumerator
IfxGtm_Trig_MscTrigSource_tom0 |
IfxGtm_Trig_MscTrigSource_tom1 |
IfxGtm_Trig_MscTrigSource_tom2 |
IfxGtm_Trig_MscTrigSource_tom3 |
IfxGtm_Trig_MscTrigSource_tom4 |
IfxGtm_Trig_MscTrigSource_tom5 |
IfxGtm_Trig_MscTrigSource_atom0 |
IfxGtm_Trig_MscTrigSource_atom1 |
IfxGtm_Trig_MscTrigSource_atom2 |
IfxGtm_Trig_MscTrigSource_atom3 |
IfxGtm_Trig_MscTrigSource_atom4 |
IfxGtm_Trig_MscTrigSource_atom5 |
IfxGtm_Trig_MscTrigSource_atom6 |
IfxGtm_Trig_MscTrigSource_atom7 |
IfxGtm_Trig_MscTrigSource_atom8 |
IfxGtm_Trig_MscTrigSource_atom9 |
IfxGtm_Trig_MscTrigSource_atom10 |
IfxGtm_Trig_MscTrigSource_atom11 |
IfxGtm_Trig_MscTrigSource_count | count of the enum definition

Definition at line 342 of file IfxGtm_Trig.h.

◆ IfxGtm_Trig_Psi5sTrigSource

enum IfxGtm_Trig_Psi5sTrigSource

Enum for DSADC trigger source.

Enumerator
IfxGtm_Trig_Psi5sTrigSource_no_Trigger
IfxGtm_Trig_Psi5sTrigSource_tomX_6
IfxGtm_Trig_Psi5sTrigSource_tomX_7
IfxGtm_Trig_Psi5sTrigSource_tomX_13
IfxGtm_Trig_Psi5sTrigSource_tomX_14
IfxGtm_Trig_Psi5sTrigSource_atomX_4
IfxGtm_Trig_Psi5sTrigSource_atomX_5
IfxGtm_Trig_Psi5sTrigSource_atomX_6
IfxGtm_Trig_Psi5sTrigSource_atomX_7

Definition at line 386 of file IfxGtm_Trig.h.

◆ IfxGtm_Trig_Psi5TrigSource

enum IfxGtm_Trig_Psi5TrigSource

Enum for PSI5 trigger source.

Enumerator
IfxGtm_Trig_Psi5TrigSource_no_Trigger
IfxGtm_Trig_Psi5TrigSource_tom2_6
IfxGtm_Trig_Psi5TrigSource_tom2_7
IfxGtm_Trig_Psi5TrigSource_tom2_13
IfxGtm_Trig_Psi5TrigSource_tom2_14
IfxGtm_Trig_Psi5TrigSource_atom2_4
IfxGtm_Trig_Psi5TrigSource_atom2_5
IfxGtm_Trig_Psi5TrigSource_atom2_6
IfxGtm_Trig_Psi5TrigSource_atom2_7
IfxGtm_Trig_Psi5TrigSource_tom0_6
IfxGtm_Trig_Psi5TrigSource_tom0_7
IfxGtm_Trig_Psi5TrigSource_tom0_13
IfxGtm_Trig_Psi5TrigSource_tom0_14

Definition at line 367 of file IfxGtm_Trig.h.

◆ IfxGtm_Trig_SentGroup

enum IfxGtm_Trig_SentGroup

Enum for SENT group.

Enumerator
IfxGtm_Trig_SentGroup_0 | For SENT group 0.
IfxGtm_Trig_SentGroup_1 | For SENT group 1.
IfxGtm_Trig_SentGroup_2 | For SENT group 2.
IfxGtm_Trig_SentGroup_3 | For SENT group 3.
IfxGtm_Trig_SentGroup_4 | For SENT group 4.
IfxGtm_Trig_SentGroup_5 | For SENT group 5.
IfxGtm_Trig_SentGroup_6 | For SENT group 6.
IfxGtm_Trig_SentGroup_7 | For SENT group 7.
IfxGtm_Trig_SentGroup_8 | For SENT group 8.
IfxGtm_Trig_SentGroup_9 | For SENT group 9.
IfxGtm_Trig_SentGroup_10 | For SENT group 10.
IfxGtm_Trig_SentGroup_11 | For SENT group 11.
IfxGtm_Trig_SentGroup_12 | For SENT group 12.
IfxGtm_Trig_SentGroup_13 | For SENT group 13.
IfxGtm_Trig_SentGroup_14 | For SENT group 14.
IfxGtm_Trig_SentGroup_15 | For SENT group 15.

Definition at line 401 of file IfxGtm_Trig.h.

◆ IfxGtm_Trig_SentTrig

enum IfxGtm_Trig_SentTrig

Enum for SENT trigger.

Enumerator
IfxGtm_Trig_SentTrig_0 | sent trigger 0
IfxGtm_Trig_SentTrig_1 | sent trigger 1
IfxGtm_Trig_SentTrig_2 | sent trigger 2
IfxGtm_Trig_SentTrig_3 | sent trigger 3

Definition at line 423 of file IfxGtm_Trig.h.

◆ IfxGtm_Trig_SentTrigChannel

enum IfxGtm_Trig_SentTrigChannel

Enum for SENT trigger channel.

Enumerator
IfxGtm_Trig_SentTrigChannel_3 |
IfxGtm_Trig_SentTrigChannel_4 |
IfxGtm_Trig_SentTrigChannel_5 |
IfxGtm_Trig_SentTrigChannel_6 |
IfxGtm_Trig_SentTrigChannel_7 |
IfxGtm_Trig_SentTrigChannel_11 |
IfxGtm_Trig_SentTrigChannel_12 |
IfxGtm_Trig_SentTrigChannel_13 |
IfxGtm_Trig_SentTrigChannel_14 |
IfxGtm_Trig_SentTrigChannel_15 |
IfxGtm_Trig_SentTrigChannel_count | count of the enum definition

Definition at line 433 of file IfxGtm_Trig.h.

◆ IfxGtm_Trig_SentTrigSource

enum IfxGtm_Trig_SentTrigSource

Enum for SENT trigger source.

Enumerator
IfxGtm_Trig_SentTrigSource_atom0 |
IfxGtm_Trig_SentTrigSource_atom1 |
IfxGtm_Trig_SentTrigSource_atom2 |
IfxGtm_Trig_SentTrigSource_atom3 |
IfxGtm_Trig_SentTrigSource_atom4 |
IfxGtm_Trig_SentTrigSource_atom5 |
IfxGtm_Trig_SentTrigSource_atom6 |
IfxGtm_Trig_SentTrigSource_atom7 |
IfxGtm_Trig_SentTrigSource_atom8 |
IfxGtm_Trig_SentTrigSource_atom9 |
IfxGtm_Trig_SentTrigSource_atom10 |
IfxGtm_Trig_SentTrigSource_atom11 |
IfxGtm_Trig_SentTrigSource_tom0 |
IfxGtm_Trig_SentTrigSource_tom1 |
IfxGtm_Trig_SentTrigSource_tom2 |
IfxGtm_Trig_SentTrigSource_tom3 |
IfxGtm_Trig_SentTrigSource_tom4 |
IfxGtm_Trig_SentTrigSource_tom5 |
IfxGtm_Trig_SentTrigSource_count | count of the enum definition

Definition at line 450 of file IfxGtm_Trig.h.


iLLD_TC38A: Data Structures

Data Structures
Data Structures
iLLD » GTM » GTM Trigger Configuration
Collaboration diagram for Data Structures:

Data Structures

struct | IfxGtm_Trig_AdcTrig_Channel
struct | IfxGtm_Trig_CanTrig_Channel
struct | IfxGtm_Trig_MscTrig_Channel
struct | IfxGtm_Trig_AdcTrig_Source
struct | IfxGtm_Trig_CanTrig_Source
struct | IfxGtm_Trig_MscTrig_Source
struct | IfxGtm_Trig_AdcTrig_Trigger
struct | IfxGtm_Trig_CanTrig_Trigger
struct | IfxGtm_Trig_MscTrig_Set
struct | IfxGtm_Trig_AdcTrig_Table
struct | IfxGtm_Trig_CanTrig_Table
struct | IfxGtm_Trig_MscTrig_Table

Detailed Description

Data Structure Documentation

◆ IfxGtm_Trig_AdcTrig_Channel

struct IfxGtm_Trig_AdcTrig_Channel

Definition at line 56 of file IfxGtm_Trig.c.

Data Fields
sint8 config Value for SEL0/1. config=0xFF means "not available".

◆ IfxGtm_Trig_CanTrig_Channel

struct IfxGtm_Trig_CanTrig_Channel

Definition at line 61 of file IfxGtm_Trig.c.

Data Fields
sint8 config Value for SEL0/1. config=0xFF means "not available".

◆ IfxGtm_Trig_MscTrig_Channel

struct IfxGtm_Trig_MscTrig_Channel

Definition at line 66 of file IfxGtm_Trig.c.

Data Fields
sint8 config Value for SELx. config=0xFF means "not available".

◆ IfxGtm_Trig_AdcTrig_Source

struct IfxGtm_Trig_AdcTrig_Source

Definition at line 75 of file IfxGtm_Trig.c.

Collaboration diagram for IfxGtm_Trig_AdcTrig_Source:
[legend]
Data Fields
IfxGtm_Trig_AdcTrig_Channel channel[IfxGtm_Trig_AdcTrigChannel_count]

◆ IfxGtm_Trig_CanTrig_Source

struct IfxGtm_Trig_CanTrig_Source

Definition at line 80 of file IfxGtm_Trig.c.

Collaboration diagram for IfxGtm_Trig_CanTrig_Source:
[legend]
Data Fields
IfxGtm_Trig_CanTrig_Channel channel[IfxGtm_Trig_CanTrigChannel_count]

◆ IfxGtm_Trig_MscTrig_Source

struct IfxGtm_Trig_MscTrig_Source

Definition at line 85 of file IfxGtm_Trig.c.

Collaboration diagram for IfxGtm_Trig_MscTrig_Source:
[legend]
Data Fields
IfxGtm_Trig_MscTrig_Channel channel[IfxGtm_Trig_MscTrigChannel_count]

◆ IfxGtm_Trig_AdcTrig_Trigger

struct IfxGtm_Trig_AdcTrig_Trigger

Definition at line 94 of file IfxGtm_Trig.c.

Collaboration diagram for IfxGtm_Trig_AdcTrig_Trigger:
[legend]
Data Fields
IfxGtm_Trig_AdcTrig_Source source[IfxGtm_Trig_AdcTrigSource_count]

◆ IfxGtm_Trig_CanTrig_Trigger

struct IfxGtm_Trig_CanTrig_Trigger

Definition at line 99 of file IfxGtm_Trig.c.

Collaboration diagram for IfxGtm_Trig_CanTrig_Trigger:
[legend]
Data Fields
IfxGtm_Trig_CanTrig_Source source[IfxGtm_Trig_CanTrigSource_count]

◆ IfxGtm_Trig_MscTrig_Set

struct IfxGtm_Trig_MscTrig_Set

Definition at line 104 of file IfxGtm_Trig.c.

Collaboration diagram for IfxGtm_Trig_MscTrig_Set:
[legend]
Data Fields
IfxGtm_Trig_MscTrig_Source source[IfxGtm_Trig_MscTrigSource_count]

◆ IfxGtm_Trig_AdcTrig_Table

struct IfxGtm_Trig_AdcTrig_Table

Definition at line 113 of file IfxGtm_Trig.c.

Collaboration diagram for IfxGtm_Trig_AdcTrig_Table:
[legend]
Data Fields
IfxGtm_Trig_AdcTrig_Trigger trigger[IfxGtm_Trig_AdcTrig_count]

◆ IfxGtm_Trig_CanTrig_Table

struct IfxGtm_Trig_CanTrig_Table

Definition at line 118 of file IfxGtm_Trig.c.

Collaboration diagram for IfxGtm_Trig_CanTrig_Table:
[legend]
Data Fields
IfxGtm_Trig_CanTrig_Trigger trigger

◆ IfxGtm_Trig_MscTrig_Table

struct IfxGtm_Trig_MscTrig_Table

Definition at line 123 of file IfxGtm_Trig.c.

Collaboration diagram for IfxGtm_Trig_MscTrig_Table:
[legend]
Data Fields
IfxGtm_Trig_MscTrig_Set set[IfxGtm_Trig_MscTrigSet_count]


iLLD_TC38A: Trigger Functions

Functions
Trigger Functions
iLLD » GTM » GTM Trigger Configuration
Collaboration diagram for Trigger Functions:

Functions

IFX_EXTERN boolean | IfxGtm_Trig_fromEdsadc (Ifx_GTM *gtm, uint32 edsadcChannel, IfxGtm_Tim tim, IfxGtm_Tim_Ch timChannel)
IFX_EXTERN boolean | IfxGtm_Trig_fromMsc (Ifx_GTM *gtm, uint32 msc, IfxGtm_Trig_MscTrigInput input, IfxGtm_Trig_MscTrigOutput output, IfxGtm_Trig_MscTrigSignal signal)
IFX_EXTERN boolean | IfxGtm_Trig_toCan (Ifx_GTM *gtm, IfxGtm_Trig_CanTrig canTrig, IfxGtm_Trig_CanDevice canDevice, IfxGtm_Trig_CanTrigSource source, IfxGtm_Trig_CanTrigChannel channel)
IFX_EXTERN boolean | IfxGtm_Trig_toEVadc (Ifx_GTM *gtm, IfxGtm_Trig_AdcGroup adcGroup, IfxGtm_Trig_AdcTrig adcTrig, IfxGtm_Trig_AdcTrigSource source, IfxGtm_Trig_AdcTrigChannel channel)
IFX_EXTERN void | IfxGtm_Trig_toEVadcClear (Ifx_GTM *gtm, IfxGtm_Trig_AdcGroup adcGroup, IfxGtm_Trig_AdcTrig adcTrig)
IFX_EXTERN void | IfxGtm_Trig_toEdsadc (Ifx_GTM *gtm, uint32 edsadcChannel, IfxGtm_Trig_EdsadcTrig edsadcTrig, IfxGtm_Trig_EdsadcTrigSource sel)
IFX_EXTERN boolean | IfxGtm_Trig_toMsc (Ifx_GTM *gtm, IfxGtm_Trig_MscTrigSignal signal, IfxGtm_Trig_MscTrigSet mscSet, IfxGtm_Trig_MscTrigSource source, IfxGtm_Trig_MscTrigChannel channel)
IFX_EXTERN void | IfxGtm_Trig_toPsi5 (Ifx_GTM *gtm, uint32 psi5Channel, IfxGtm_Trig_Psi5TrigSource sel)
IFX_EXTERN void | IfxGtm_Trig_toPsi5s (Ifx_GTM *gtm, uint32 psi5sChannel, IfxGtm_Trig_Psi5sTrigSource sel)
IFX_EXTERN boolean | IfxGtm_Trig_toSent (Ifx_GTM *gtm, IfxGtm_Trig_SentGroup sentGroup, IfxGtm_Trig_SentTrig sentTrig, IfxGtm_Trig_SentTrigSource source, IfxGtm_Trig_SentTrigChannel channel)

Detailed Description

Function Documentation

◆ IfxGtm_Trig_fromEdsadc()

IFX_EXTERN boolean IfxGtm_Trig_fromEdsadc | ( | Ifx_GTM * | gtm,
 |  | uint32 | edsadcChannel,
 |  | IfxGtm_Tim | tim,
 |  | IfxGtm_Tim_Ch | timChannel
 | ) |  |
Parameters
gtm | Pointer to GTM module
edsadcChannel | EDSADC channel
tim | TIM object
timChannel | TIM channel
Returns
TRUE on success else FALSE

Definition at line 1129 of file IfxGtm_Trig.c.

◆ IfxGtm_Trig_fromMsc()

IFX_EXTERN boolean IfxGtm_Trig_fromMsc | ( | Ifx_GTM * | gtm,
 |  | uint32 | msc,
 |  | IfxGtm_Trig_MscTrigInput | input,
 |  | IfxGtm_Trig_MscTrigOutput | output,
 |  | IfxGtm_Trig_MscTrigSignal | signal
 | ) |  |
Parameters
gtm | Pointer to GTM module
msc | MSC Id
input | MSC Input Type
output | Output Select
signal | MSC signal
Returns
TRUE on success else FALSE

Definition at line 1147 of file IfxGtm_Trig.c.

◆ IfxGtm_Trig_toCan()

IFX_EXTERN boolean IfxGtm_Trig_toCan | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Trig_CanTrig | canTrig,
 |  | IfxGtm_Trig_CanDevice | canDevice,
 |  | IfxGtm_Trig_CanTrigSource | source,
 |  | IfxGtm_Trig_CanTrigChannel | channel
 | ) |  |
Parameters
gtm | Pointer to GTM module
canTrig | CAN trigger
canDevice | CAN device
source | CAN trigger source
channel | CAN trigger channel
Returns
TRUE on success else FALSE

Definition at line 1173 of file IfxGtm_Trig.c.

◆ IfxGtm_Trig_toEdsadc()

IFX_EXTERN void IfxGtm_Trig_toEdsadc | ( | Ifx_GTM * | gtm,
 |  | uint32 | edsadcChannel,
 |  | IfxGtm_Trig_EdsadcTrig | edsadcTrig,
 |  | IfxGtm_Trig_EdsadcTrigSource | sel
 | ) |  |
Parameters
gtm | Pointer to GTM module
edsadcChannel | EDSADC channel
edsadcTrig | EDSADC trigger
sel | DSADC trigger source
Returns
None

Definition at line 1305 of file IfxGtm_Trig.c.

◆ IfxGtm_Trig_toEVadc()

IFX_EXTERN boolean IfxGtm_Trig_toEVadc | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Trig_AdcGroup | adcGroup,
 |  | IfxGtm_Trig_AdcTrig | adcTrig,
 |  | IfxGtm_Trig_AdcTrigSource | source,
 |  | IfxGtm_Trig_AdcTrigChannel | channel
 | ) |  |
Parameters
gtm | Pointer to GTM module
adcGroup | ADC group
adcTrig | ADC trigger
source | ADC trigger source
channel | ADC trigger channel
Returns
TRUE on success else FALSE

Definition at line 1229 of file IfxGtm_Trig.c.

◆ IfxGtm_Trig_toEVadcClear()

IFX_EXTERN void IfxGtm_Trig_toEVadcClear | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Trig_AdcGroup | adcGroup,
 |  | IfxGtm_Trig_AdcTrig | adcTrig
 | ) |  |
Parameters
gtm | Pointer to GTM module
adcGroup | ADC group
adcTrig | ADC trigger
Returns
None

Definition at line 1287 of file IfxGtm_Trig.c.

◆ IfxGtm_Trig_toMsc()

IFX_EXTERN boolean IfxGtm_Trig_toMsc | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Trig_MscTrigSignal | signal,
 |  | IfxGtm_Trig_MscTrigSet | mscSet,
 |  | IfxGtm_Trig_MscTrigSource | source,
 |  | IfxGtm_Trig_MscTrigChannel | channel
 | ) |  |
Parameters
gtm | Pointer to GTM module
signal | MSC signal
mscSet | MSC set
source | MSC trigger source
channel | MSC trigger channel
Returns
TRUE on success else FALSE

Definition at line 1322 of file IfxGtm_Trig.c.

◆ IfxGtm_Trig_toPsi5()

IFX_EXTERN void IfxGtm_Trig_toPsi5 | ( | Ifx_GTM * | gtm,
 |  | uint32 | psi5Channel,
 |  | IfxGtm_Trig_Psi5TrigSource | sel
 | ) |  |
Parameters
gtm | Pointer to GTM module
psi5Channel | PSI5 channel
sel | PSI5 trigger source
Returns
None

Definition at line 1369 of file IfxGtm_Trig.c.

◆ IfxGtm_Trig_toPsi5s()

IFX_EXTERN void IfxGtm_Trig_toPsi5s | ( | Ifx_GTM * | gtm,
 |  | uint32 | psi5sChannel,
 |  | IfxGtm_Trig_Psi5sTrigSource | sel
 | ) |  |
Parameters
gtm | Pointer to GTM module
psi5sChannel | PSI5S channel
sel | PSI5S trigger source
Returns
None

Definition at line 1378 of file IfxGtm_Trig.c.

◆ IfxGtm_Trig_toSent()

IFX_EXTERN boolean IfxGtm_Trig_toSent | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Trig_SentGroup | sentGroup,
 |  | IfxGtm_Trig_SentTrig | sentTrig,
 |  | IfxGtm_Trig_SentTrigSource | source,
 |  | IfxGtm_Trig_SentTrigChannel | channel
 | ) |  |
Parameters
gtm | Pointer to GTM module
sentGroup | SENT group
sentTrig | SENT trigger
source | SENT trigger source
channel | SENT trigger channel
Returns
TRUE on success else FALSE

Definition at line 1388 of file IfxGtm_Trig.c.


iLLD_TC38A: IfxGtm_cfg.h File Reference

  • _Impl
Data Structures | Macros | Typedefs | Enumerations | Variables
IfxGtm_cfg.h File Reference
iLLD » GTM

GTM on-chip implementation data. More...

#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "Ifx_Cfg.h"
#include "IfxGtm_reg.h"
#include "Port/Std/IfxPort.h"
Include dependency graph for IfxGtm_cfg.h:

Go to the source code of this file.

Data Structures

struct IfxGtm_Tom_TGC
TOM TGC objects. More...

Macros

#define | IFXGTM_CMU_CLKEN_CLK0 (0x00000002)
Mask for CMU_CLK_EN register (Enable): CLK0. More...
#define | IFXGTM_CMU_CLKEN_CLK1 (0x00000008)
Mask for CMU_CLK_EN register (Enable): CLK1. More...
#define | IFXGTM_CMU_CLKEN_CLK2 (0x00000020)
Mask for CMU_CLK_EN register (Enable): CLK2. More...
#define | IFXGTM_CMU_CLKEN_CLK3 (0x00000080)
Mask for CMU_CLK_EN register (Enable): CLK3. More...
#define | IFXGTM_CMU_CLKEN_CLK4 (0x00000200)
Mask for CMU_CLK_EN register (Enable): CLK4. More...
#define | IFXGTM_CMU_CLKEN_CLK5 (0x00000800)
Mask for CMU_CLK_EN register (Enable): CLK5. More...
#define | IFXGTM_CMU_CLKEN_CLK6 (0x00002000)
Mask for CMU_CLK_EN register (Enable): CLK6. More...
#define | IFXGTM_CMU_CLKEN_CLK7 (0x00008000)
Mask for CMU_CLK_EN register (Enable): CLK7. More...
#define | IFXGTM_CMU_CLKEN_ECLK0 (0x00020000)
Mask for CMU_CLK_EN register (Enable): ECLK0. More...
#define | IFXGTM_CMU_CLKEN_ECLK1 (0x00080000)
Mask for CMU_CLK_EN register (Enable): ECLK1. More...
#define | IFXGTM_CMU_CLKEN_ECLK2 (0x00200000)
Mask for CMU_CLK_EN register (Enable): ECLK2. More...
#define | IFXGTM_CMU_CLKEN_FXCLK (0x00800000)
Mask for CMU_CLK_EN register (Enable): FXCLK. More...
#define | IFXGTM_CMU_CLKEN_ALL (0x00AAAAAA)
Mask for CMU_CLK_EN register (Enable): ALL clocks. More...
#define | IFXGTM_CMU_CLKDIS_CLK0 (0x00000001)
Mask for CMU_CLK_EN register (Disable): CLK0. More...
#define | IFXGTM_CMU_CLKDIS_CLK1 (0x00000004)
Mask for CMU_CLK_EN register (Disable): CLK1. More...
#define | IFXGTM_CMU_CLKDIS_CLK2 (0x00000010)
Mask for CMU_CLK_EN register (Disable): CLK2. More...
#define | IFXGTM_CMU_CLKDIS_CLK3 (0x00000040)
Mask for CMU_CLK_EN register (Disable): CLK3. More...
#define | IFXGTM_CMU_CLKDIS_CLK4 (0x00000100)
Mask for CMU_CLK_EN register (Disable): CLK4. More...
#define | IFXGTM_CMU_CLKDIS_CLK5 (0x00000400)
Mask for CMU_CLK_EN register (Disable): CLK5. More...
#define | IFXGTM_CMU_CLKDIS_CLK6 (0x00001000)
Mask for CMU_CLK_EN register (Disable): CLK6. More...
#define | IFXGTM_CMU_CLKDIS_CLK7 (0x00004000)
Mask for CMU_CLK_EN register (Disable): CLK7. More...
#define | IFXGTM_CMU_CLKDIS_ECLK0 (0x00010000)
Mask for CMU_CLK_EN register (Disable): ECLK0. More...
#define | IFXGTM_CMU_CLKDIS_ECLK1 (0x00040000)
Mask for CMU_CLK_EN register (Disable): ECLK1. More...
#define | IFXGTM_CMU_CLKDIS_ECLK2 (0x00100000)
Mask for CMU_CLK_EN register (Disable): ECLK2. More...
#define | IFXGTM_CMU_CLKDIS_FXCLK (0x00400000)
Mask for CMU_CLK_EN register (Disable): FXCLK. More...
#define | IFXGTM_CMU_CLKDIS_ALL (0x00555555)
Mask for CMU_CLK_EN register (Disable): ALL clocks. More...
#define | IFXGTM_NUM_ATOM_OBJECTS (9)
#define | IFXGTM_NUM_TOM_OBJECTS (5)
#define | IFXGTM_NUM_ATOM_CHANNELS (8)
#define | IFXGTM_NUM_TOM_CHANNELS (16)
#define | IFXGTM_NUM_MODULES (1)
#define | IFXGTM_NUM_MCS_OBJECTS (7)
Number of Multi Channel Sequencer modules. More...
#define | IFXGTM_NUM_PSM_OBJECTS (2)
Number of Parameter Storage Modules. More...
#define | IFXGTM_NUM_CDTM_OBJECTS (5)
Number of Cluster Dead Time Modules. More...
#define | IFXGTM_NUM_DTM_PER_CDTM_OBJECTS (4)
Number of Dead Time Modules in each cluster. More...
#define | IFXGTM_NUM_SPE_OBJECTS (4)
Number of Sensor Pattern Evaluation Modules. More...
#define | IFXGTM_NUM_CCM_OBJECTS (9)
Number of Cluster Configuration Module. More...
#define | IFXGTM_PSM_FIFORAMSIZE (1024u)
FIFO RAM size is 1024 * 29 bit words. More...
#define | IFXGTM_PSM_FIFOWORDWIDTH (29u)
FIFO word width is 29 bits. More...
#define | IFXGTM_NUM_TIM_OBJECTS (7)
#define | IFXGTM_NUM_TIM_CHANNELS (8)
number of TIM channels. More...

Typedefs

typedef volatile struct IfxGtm_Tom_TGC Ifx_GTM_TOM_TGC

Enumerations

enum IfxGtm_Atom {
IfxGtm_Atom_0,
IfxGtm_Atom_1,
IfxGtm_Atom_2,
IfxGtm_Atom_3,
IfxGtm_Atom_4,
IfxGtm_Atom_5,
IfxGtm_Atom_6,
IfxGtm_Atom_7,
IfxGtm_Atom_8
}
Enum for ATOM objects. More...
enum IfxGtm_Atom_Ch {
IfxGtm_Atom_Ch_none = -1,
IfxGtm_Atom_Ch_0,
IfxGtm_Atom_Ch_1,
IfxGtm_Atom_Ch_2,
IfxGtm_Atom_Ch_3,
IfxGtm_Atom_Ch_4,
IfxGtm_Atom_Ch_5,
IfxGtm_Atom_Ch_6,
IfxGtm_Atom_Ch_7
}
Enum for ATOM channels. More...
enum IfxGtm_Cdtm {
IfxGtm_Cdtm_none = -1,
IfxGtm_Cdtm_0,
IfxGtm_Cdtm_1,
IfxGtm_Cdtm_2,
IfxGtm_Cdtm_3,
IfxGtm_Cdtm_4,
IfxGtm_Cdtm_5,
IfxGtm_Cdtm_6
}
Enum for CDTM objects. More...
enum IfxGtm_Cluster {
IfxGtm_Cluster_0,
IfxGtm_Cluster_1,
IfxGtm_Cluster_2,
IfxGtm_Cluster_3,
IfxGtm_Cluster_4,
IfxGtm_Cluster_5,
IfxGtm_Cluster_6,
IfxGtm_Cluster_7,
IfxGtm_Cluster_8
}
Enumeration listing the clusters of GTM. More...
enum IfxGtm_Dpll_SubInc {
IfxGtm_Dpll_SubInc_1 = 0,
IfxGtm_Dpll_SubInc_2
}
Enum for Dpll subincrements. More...
enum IfxGtm_Dtm {
IfxGtm_Dtm_none = -1,
IfxGtm_Dtm_0,
IfxGtm_Dtm_1,
IfxGtm_Dtm_2,
IfxGtm_Dtm_3,
IfxGtm_Dtm_4,
IfxGtm_Dtm_5
}
Enum for DTM objects. More...
enum IfxGtm_Dtm_Ch {
IfxGtm_Dtm_Ch_none = -1,
IfxGtm_Dtm_Ch_0,
IfxGtm_Dtm_Ch_1,
IfxGtm_Dtm_Ch_2,
IfxGtm_Dtm_Ch_3
}
Enum for DTM channels. More...
enum IfxGtm_FeatureControl {
IfxGtm_FeatureControl_disabled = 0,
IfxGtm_FeatureControl_disable = 1,
IfxGtm_FeatureControl_enable = 2,
IfxGtm_FeatureControl_enabled = 3
}
Enum Enable disable feature control. More...
enum IfxGtm_Spe {
IfxGtm_Spe_0,
IfxGtm_Spe_1,
IfxGtm_Spe_2,
IfxGtm_Spe_3
}
Spe Objects. More...
enum IfxGtm_Spe_TimInput {
IfxGtm_Spe_TimInput_spe0Tim0Ch0to2 = 0,
IfxGtm_Spe_TimInput_spe0Tim1Ch0to2 = 1,
IfxGtm_Spe_TimInput_spe1Tim0Ch3to5 = 2,
IfxGtm_Spe_TimInput_spe1Tim1Ch3to5 = 3,
IfxGtm_Spe_TimInput_spe2Tim2Ch0to2 = 4,
IfxGtm_Spe_TimInput_spe2Tim3Ch0to2 = 5,
IfxGtm_Spe_TimInput_spe3Tim2Ch3to5 = 6,
IfxGtm_Spe_TimInput_spe3Tim3Ch3to5 = 7,
IfxGtm_Spe_TimInput_spe4Tim4Ch0to2 = 8,
IfxGtm_Spe_TimInput_spe4Tim5Ch0to2 = 9,
IfxGtm_Spe_TimInput_spe5Tim4Ch3to5 = 10,
IfxGtm_Spe_TimInput_spe5Tim5Ch3to5 = 11
}
Specifies the TIM inputs to the SPE submodule instances. Two possible input sources are present per SPE for CHx,y,z Choose the appropriate input source as per the used SPE. More...
enum IfxGtm_Spe_TriggerSource {
IfxGtm_Spe_TriggerSource_speNipd = 0,
IfxGtm_Spe_TriggerSource_tomCh0Ccu0 = 1,
IfxGtm_Spe_TriggerSource_tomCh0Ccu1 = 2,
IfxGtm_Spe_TriggerSource_tomCh2Ccu1 = 3,
IfxGtm_Spe_TriggerSource_tomCh6Ccu1 = 4,
IfxGtm_Spe_TriggerSource_tomCh7Ccu1 = 5,
IfxGtm_Spe_TriggerSource_tomCh8Ccu1 = 6,
IfxGtm_Spe_TriggerSource_tomCh9Ccu1 = 7
}
selects the source of trigger to control command output from SPE. More...
enum IfxGtm_Tim {
IfxGtm_Tim_0,
IfxGtm_Tim_1,
IfxGtm_Tim_2,
IfxGtm_Tim_3,
IfxGtm_Tim_4,
IfxGtm_Tim_5,
IfxGtm_Tim_6
}
Enum for TIM objects. More...
enum IfxGtm_Tim_Ch {
IfxGtm_Tim_Ch_0,
IfxGtm_Tim_Ch_1,
IfxGtm_Tim_Ch_2,
IfxGtm_Tim_Ch_3,
IfxGtm_Tim_Ch_4,
IfxGtm_Tim_Ch_5,
IfxGtm_Tim_Ch_6,
IfxGtm_Tim_Ch_7
}
Enum for TIM channels. More...
enum IfxGtm_Tom {
IfxGtm_Tom_0,
IfxGtm_Tom_1,
IfxGtm_Tom_2,
IfxGtm_Tom_3,
IfxGtm_Tom_4
}
Enum for TOM objects. More...
enum IfxGtm_Tom_Ch {
IfxGtm_Tom_Ch_none = -1,
IfxGtm_Tom_Ch_0,
IfxGtm_Tom_Ch_1,
IfxGtm_Tom_Ch_2,
IfxGtm_Tom_Ch_3,
IfxGtm_Tom_Ch_4,
IfxGtm_Tom_Ch_5,
IfxGtm_Tom_Ch_6,
IfxGtm_Tom_Ch_7,
IfxGtm_Tom_Ch_8,
IfxGtm_Tom_Ch_9,
IfxGtm_Tom_Ch_10,
IfxGtm_Tom_Ch_11,
IfxGtm_Tom_Ch_12,
IfxGtm_Tom_Ch_13,
IfxGtm_Tom_Ch_14,
IfxGtm_Tom_Ch_15
}
Enum for TOM channels. More...
enum IfxGtm_Tom_Tgc {
IfxGtm_Tom_Tgc_0,
IfxGtm_Tom_Tgc_1
}
Enum for TOM global channel control units. More...
enum IfxGtm_Psm_F2a {
IfxGtm_Psm_F2a_0,
IfxGtm_Psm_F2a_1
}
Enumeration listing the F2A objects. More...
enum IfxGtm_Psm_Fifo {
IfxGtm_Psm_Fifo_0,
IfxGtm_Psm_Fifo_1
}
Enumeration listing the Fifo Channels. More...

Variables

IFX_EXTERN IFX_CONST IfxGtm_Cdtm IfxGtm_dtmAtom_map [IFXGTM_NUM_ATOM_OBJECTS]
Table containing the ATOM mapped CDTM index. More...
IFX_EXTERN IFX_CONST IfxGtm_Cdtm IfxGtm_dtmTom_map [IFXGTM_NUM_TOM_OBJECTS]
Table containing the TOM mapped CDTM index. More...
IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxGtm_spe_indexMap [IFXGTM_NUM_SPE_OBJECTS]
Table containing the address and index of SPE Objects. More...

Detailed Description

GTM on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_cfg.h.

Macro Definition Documentation

◆ IFXGTM_CMU_CLKDIS_ALL

#define IFXGTM_CMU_CLKDIS_ALL (0x00555555)

Mask for CMU_CLK_EN register (Disable): ALL clocks.

Definition at line 177 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKDIS_CLK0

#define IFXGTM_CMU_CLKDIS_CLK0 (0x00000001)

Mask for CMU_CLK_EN register (Disable): CLK0.

Definition at line 129 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKDIS_CLK1

#define IFXGTM_CMU_CLKDIS_CLK1 (0x00000004)

Mask for CMU_CLK_EN register (Disable): CLK1.

Definition at line 133 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKDIS_CLK2

#define IFXGTM_CMU_CLKDIS_CLK2 (0x00000010)

Mask for CMU_CLK_EN register (Disable): CLK2.

Definition at line 137 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKDIS_CLK3

#define IFXGTM_CMU_CLKDIS_CLK3 (0x00000040)

Mask for CMU_CLK_EN register (Disable): CLK3.

Definition at line 141 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKDIS_CLK4

#define IFXGTM_CMU_CLKDIS_CLK4 (0x00000100)

Mask for CMU_CLK_EN register (Disable): CLK4.

Definition at line 145 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKDIS_CLK5

#define IFXGTM_CMU_CLKDIS_CLK5 (0x00000400)

Mask for CMU_CLK_EN register (Disable): CLK5.

Definition at line 149 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKDIS_CLK6

#define IFXGTM_CMU_CLKDIS_CLK6 (0x00001000)

Mask for CMU_CLK_EN register (Disable): CLK6.

Definition at line 153 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKDIS_CLK7

#define IFXGTM_CMU_CLKDIS_CLK7 (0x00004000)

Mask for CMU_CLK_EN register (Disable): CLK7.

Definition at line 157 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKDIS_ECLK0

#define IFXGTM_CMU_CLKDIS_ECLK0 (0x00010000)

Mask for CMU_CLK_EN register (Disable): ECLK0.

Definition at line 161 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKDIS_ECLK1

#define IFXGTM_CMU_CLKDIS_ECLK1 (0x00040000)

Mask for CMU_CLK_EN register (Disable): ECLK1.

Definition at line 165 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKDIS_ECLK2

#define IFXGTM_CMU_CLKDIS_ECLK2 (0x00100000)

Mask for CMU_CLK_EN register (Disable): ECLK2.

Definition at line 169 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKDIS_FXCLK

#define IFXGTM_CMU_CLKDIS_FXCLK (0x00400000)

Mask for CMU_CLK_EN register (Disable): FXCLK.

Definition at line 173 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKEN_ALL

#define IFXGTM_CMU_CLKEN_ALL (0x00AAAAAA)

Mask for CMU_CLK_EN register (Enable): ALL clocks.

Definition at line 125 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKEN_CLK0

#define IFXGTM_CMU_CLKEN_CLK0 (0x00000002)

Mask for CMU_CLK_EN register (Enable): CLK0.

Definition at line 77 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKEN_CLK1

#define IFXGTM_CMU_CLKEN_CLK1 (0x00000008)

Mask for CMU_CLK_EN register (Enable): CLK1.

Definition at line 81 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKEN_CLK2

#define IFXGTM_CMU_CLKEN_CLK2 (0x00000020)

Mask for CMU_CLK_EN register (Enable): CLK2.

Definition at line 85 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKEN_CLK3

#define IFXGTM_CMU_CLKEN_CLK3 (0x00000080)

Mask for CMU_CLK_EN register (Enable): CLK3.

Definition at line 89 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKEN_CLK4

#define IFXGTM_CMU_CLKEN_CLK4 (0x00000200)

Mask for CMU_CLK_EN register (Enable): CLK4.

Definition at line 93 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKEN_CLK5

#define IFXGTM_CMU_CLKEN_CLK5 (0x00000800)

Mask for CMU_CLK_EN register (Enable): CLK5.

Definition at line 97 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKEN_CLK6

#define IFXGTM_CMU_CLKEN_CLK6 (0x00002000)

Mask for CMU_CLK_EN register (Enable): CLK6.

Definition at line 101 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKEN_CLK7

#define IFXGTM_CMU_CLKEN_CLK7 (0x00008000)

Mask for CMU_CLK_EN register (Enable): CLK7.

Definition at line 105 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKEN_ECLK0

#define IFXGTM_CMU_CLKEN_ECLK0 (0x00020000)

Mask for CMU_CLK_EN register (Enable): ECLK0.

Definition at line 109 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKEN_ECLK1

#define IFXGTM_CMU_CLKEN_ECLK1 (0x00080000)

Mask for CMU_CLK_EN register (Enable): ECLK1.

Definition at line 113 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKEN_ECLK2

#define IFXGTM_CMU_CLKEN_ECLK2 (0x00200000)

Mask for CMU_CLK_EN register (Enable): ECLK2.

Definition at line 117 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKEN_FXCLK

#define IFXGTM_CMU_CLKEN_FXCLK (0x00800000)

Mask for CMU_CLK_EN register (Enable): FXCLK.

Definition at line 121 of file IfxGtm_cfg.h.

◆ IFXGTM_NUM_ATOM_CHANNELS

#define IFXGTM_NUM_ATOM_CHANNELS (8)

Definition at line 185 of file IfxGtm_cfg.h.

◆ IFXGTM_NUM_ATOM_OBJECTS

#define IFXGTM_NUM_ATOM_OBJECTS (9)

Definition at line 181 of file IfxGtm_cfg.h.

◆ IFXGTM_NUM_CCM_OBJECTS

#define IFXGTM_NUM_CCM_OBJECTS (9)

Number of Cluster Configuration Module.

Definition at line 213 of file IfxGtm_cfg.h.

◆ IFXGTM_NUM_CDTM_OBJECTS

#define IFXGTM_NUM_CDTM_OBJECTS (5)

Number of Cluster Dead Time Modules.

Definition at line 201 of file IfxGtm_cfg.h.

◆ IFXGTM_NUM_DTM_PER_CDTM_OBJECTS

#define IFXGTM_NUM_DTM_PER_CDTM_OBJECTS (4)

Number of Dead Time Modules in each cluster.

Definition at line 205 of file IfxGtm_cfg.h.

◆ IFXGTM_NUM_MCS_OBJECTS

#define IFXGTM_NUM_MCS_OBJECTS (7)

Number of Multi Channel Sequencer modules.

Definition at line 193 of file IfxGtm_cfg.h.

◆ IFXGTM_NUM_MODULES

#define IFXGTM_NUM_MODULES (1)

Definition at line 189 of file IfxGtm_cfg.h.

◆ IFXGTM_NUM_PSM_OBJECTS

#define IFXGTM_NUM_PSM_OBJECTS (2)

Number of Parameter Storage Modules.

Definition at line 197 of file IfxGtm_cfg.h.

◆ IFXGTM_NUM_SPE_OBJECTS

#define IFXGTM_NUM_SPE_OBJECTS (4)

Number of Sensor Pattern Evaluation Modules.

Definition at line 209 of file IfxGtm_cfg.h.

◆ IFXGTM_NUM_TIM_CHANNELS

#define IFXGTM_NUM_TIM_CHANNELS (8)

number of TIM channels.

Definition at line 227 of file IfxGtm_cfg.h.

◆ IFXGTM_NUM_TIM_OBJECTS

#define IFXGTM_NUM_TIM_OBJECTS (7)

Definition at line 223 of file IfxGtm_cfg.h.

◆ IFXGTM_NUM_TOM_CHANNELS

#define IFXGTM_NUM_TOM_CHANNELS (16)

Definition at line 187 of file IfxGtm_cfg.h.

◆ IFXGTM_NUM_TOM_OBJECTS

#define IFXGTM_NUM_TOM_OBJECTS (5)

Definition at line 183 of file IfxGtm_cfg.h.

◆ IFXGTM_PSM_FIFORAMSIZE

#define IFXGTM_PSM_FIFORAMSIZE (1024u)

FIFO RAM size is 1024 * 29 bit words.

Definition at line 217 of file IfxGtm_cfg.h.

Referenced by IfxGtm_Psm_Fifo_setChannelEndAddress(), IfxGtm_Psm_Fifo_setChannelSize(), and IfxGtm_Psm_Fifo_setChannelStartAddress().

◆ IFXGTM_PSM_FIFOWORDWIDTH

#define IFXGTM_PSM_FIFOWORDWIDTH (29u)

FIFO word width is 29 bits.

Definition at line 221 of file IfxGtm_cfg.h.

Typedef Documentation

◆ Ifx_GTM_TOM_TGC

typedef volatile struct IfxGtm_Tom_TGC Ifx_GTM_TOM_TGC

Definition at line 233 of file IfxGtm_cfg.h.

Enumeration Type Documentation

◆ IfxGtm_Psm_F2a

enum IfxGtm_Psm_F2a

Enumeration listing the F2A objects.

Enumerator
IfxGtm_Psm_F2a_0 | PSM F2a 0.
IfxGtm_Psm_F2a_1 | PSM F2a 1.

Definition at line 461 of file IfxGtm_cfg.h.

◆ IfxGtm_Psm_Fifo

enum IfxGtm_Psm_Fifo

Enumeration listing the Fifo Channels.

Enumerator
IfxGtm_Psm_Fifo_0 | PSM Fifo 0.
IfxGtm_Psm_Fifo_1 | PSM Fifo 1.

Definition at line 469 of file IfxGtm_cfg.h.

Variable Documentation

◆ IfxGtm_dtmAtom_map

IFX_EXTERN IFX_CONST IfxGtm_Cdtm IfxGtm_dtmAtom_map[IFXGTM_NUM_ATOM_OBJECTS]

Table containing the ATOM mapped CDTM index.

Definition at line 505 of file IfxGtm_cfg.h.

◆ IfxGtm_dtmTom_map

IFX_EXTERN IFX_CONST IfxGtm_Cdtm IfxGtm_dtmTom_map[IFXGTM_NUM_TOM_OBJECTS]

Table containing the TOM mapped CDTM index.

Definition at line 509 of file IfxGtm_cfg.h.

◆ IfxGtm_spe_indexMap

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxGtm_spe_indexMap[IFXGTM_NUM_SPE_OBJECTS]

Table containing the address and index of SPE Objects.

Definition at line 513 of file IfxGtm_cfg.h.


iLLD_TC38A: IfxGtm_PinMap.c File Reference

_PinMap

Functions | Variables

IfxGtm_PinMap.c File Reference
iLLD » GTM

GTM I/O map. More...

#include "IfxGtm_PinMap.h"
#include "IfxGtm_bf.h"

Include dependency graph for IfxGtm_PinMap.c:

Go to the source code of this file.

Functions

void

IfxGtm_PinMap_setTimTin (IfxGtm_Tim_TinMap *config, IfxPort_InputMode inputMode)

void

IfxGtm_PinMap_setAtomTout (IfxGtm_Atom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)

void

IfxGtm_PinMap_setTomTout (IfxGtm_Tom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)

Variables

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_0N_TOUT112_P01_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 112, {&MODULE_P01, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_0N_TOUT17_P00_8_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_0N_TOUT43_P23_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 43, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_0N_TOUT54_P21_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_0N_TOUT7_P02_7_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_0_TOUT0_P02_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_0_TOUT48_P22_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 48, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_0_TOUT53_P21_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_0_TOUT85_P14_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 85, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_0_TOUT8_P02_8_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_0_TOUT9_P00_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_1N_TOUT113_P01_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 113, {&MODULE_P01, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_1N_TOUT14_P00_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_1N_TOUT39_P32_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_1N_TOUT41_P23_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_1N_TOUT4_P02_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_1N_TOUT50_P22_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_1N_TOUT53_P21_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_1N_TOUT55_P21_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_1N_TOUT57_P21_6_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_1N_TOUT61_P20_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_1_TOUT10_P00_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_1_TOUT116_P02_9_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 116, {&MODULE_P02, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_1_TOUT11_P00_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_1_TOUT1_P02_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_1_TOUT31_P33_9_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_1_TOUT47_P22_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 47, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_1_TOUT54_P21_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_1_TOUT84_P14_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 84, {&MODULE_P14, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_2N_TOUT114_P01_6_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 114, {&MODULE_P01, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_2N_TOUT15_P00_6_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_2N_TOUT23_P33_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_2N_TOUT40_P32_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_2N_TOUT41_P23_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_2N_TOUT44_P23_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 44, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_2N_TOUT56_P21_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_2N_TOUT58_P21_7_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 58, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_2N_TOUT5_P02_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_2N_TOUT65_P20_9_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_2_TOUT117_P02_10_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 117, {&MODULE_P02,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_2_TOUT12_P00_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_2_TOUT2_P02_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_2_TOUT33_P33_11_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 33, {&MODULE_P33,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_2_TOUT42_P23_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_2_TOUT46_P23_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 46, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_2_TOUT55_P21_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_2_TOUT83_P14_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 83, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_3N_TOUT115_P01_7_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 115, {&MODULE_P01, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_3N_TOUT16_P00_7_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_3N_TOUT24_P33_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_3N_TOUT42_P23_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_3N_TOUT45_P23_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 45, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_3N_TOUT59_P20_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_3N_TOUT66_P20_10_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 66, {&MODULE_P20,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_3N_TOUT6_P02_6_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_3_TOUT118_P02_11_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 118, {&MODULE_P02,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_3_TOUT13_P00_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_3_TOUT38_P32_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 38, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_3_TOUT3_P02_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_3_TOUT49_P22_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 49, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_3_TOUT56_P21_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_3_TOUT60_P20_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 60, {&MODULE_P20, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_3_TOUT82_P14_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 82, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_4N_TOUT118_P02_11_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 118, {&MODULE_P02,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_4N_TOUT135_P22_9_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 135, {&MODULE_P22, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_4N_TOUT13_P00_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_4N_TOUT147_P34_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 147, {&MODULE_P34, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_4N_TOUT3_P02_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_4_TOUT146_P34_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 146, {&MODULE_P34, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_4_TOUT14_P00_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_4_TOUT29_P33_7_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_k, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_4_TOUT39_P32_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_4_TOUT4_P02_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_4_TOUT50_P22_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_4_TOUT57_P21_6_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_4_TOUT61_P20_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_4_TOUT81_P14_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 81, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_5N_TOUT0_P02_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_i, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_5N_TOUT136_P22_10_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_i, 136, {&MODULE_P22,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_5N_TOUT148_P34_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_i, 148, {&MODULE_P34, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_5N_TOUT26_P33_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_k, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_5N_TOUT8_P02_8_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_i, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_5N_TOUT9_P00_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_i, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_5_TOUT15_P00_6_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_5_TOUT23_P33_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_5_TOUT40_P32_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_5_TOUT41_P23_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_5_TOUT58_P21_7_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 58, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_5_TOUT5_P02_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_6N_TOUT10_P00_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_i, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_6N_TOUT116_P02_9_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_i, 116, {&MODULE_P02, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_6N_TOUT11_P00_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_i, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_6N_TOUT137_P22_11_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_i, 137, {&MODULE_P22,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_6N_TOUT149_P34_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_i, 149, {&MODULE_P34, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_6N_TOUT1_P02_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_i, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_6N_TOUT27_P33_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_k, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_6_TOUT106_P10_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_6_TOUT16_P00_7_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_6_TOUT24_P33_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_6_TOUT42_P23_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_6_TOUT59_P20_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_6_TOUT6_P02_6_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_7N_TOUT117_P02_10_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_i, 117, {&MODULE_P02,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_7N_TOUT12_P00_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_i, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_7N_TOUT150_P34_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_i, 150, {&MODULE_P34, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_7N_TOUT28_P33_6_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_k, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_7N_TOUT2_P02_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_i, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_7_TOUT17_P00_8_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_7_TOUT25_P33_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 25, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_7_TOUT45_P23_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 45, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_7_TOUT64_P20_8_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM0_7_TOUT7_P02_7_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_0N_TOUT112_P01_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_j, 112, {&MODULE_P01, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_0N_TOUT17_P00_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_j, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_0N_TOUT7_P02_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_j, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_0_TOUT0_P02_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_0_TOUT109_P10_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_0_TOUT68_P20_12_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 68, {&MODULE_P20,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_0_TOUT76_P15_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_0_TOUT77_P15_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_0_TOUT87_P14_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_0_TOUT8_P02_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_0_TOUT9_P00_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_1N_TOUT102_P10_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 102, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_1N_TOUT113_P01_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 113, {&MODULE_P01, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_1N_TOUT14_P00_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_1N_TOUT39_P32_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_1N_TOUT4_P02_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_1N_TOUT61_P20_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_l, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_1N_TOUT72_P15_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_1_TOUT103_P10_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 103, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_1_TOUT10_P00_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_1_TOUT116_P02_9_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_l, 116, {&MODULE_P02, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_1_TOUT11_P00_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_1_TOUT1_P02_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_1_TOUT31_P33_9_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_1_TOUT69_P20_13_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 69, {&MODULE_P20,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_1_TOUT78_P15_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_1_TOUT79_P15_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_1_TOUT86_P14_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_2N_TOUT110_P10_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 110, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_2N_TOUT114_P01_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 114, {&MODULE_P01, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_2N_TOUT15_P00_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_2N_TOUT23_P33_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_l, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_2N_TOUT40_P32_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_2N_TOUT41_P23_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_l, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_2N_TOUT5_P02_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_2N_TOUT73_P15_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_2_TOUT104_P10_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 104, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_2_TOUT107_P10_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_2_TOUT117_P02_10_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_l, 117, {&MODULE_P02,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_2_TOUT12_P00_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_2_TOUT2_P02_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_2_TOUT33_P33_11_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 33, {&MODULE_P33,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_2_TOUT70_P20_14_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 70, {&MODULE_P20,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_2_TOUT80_P14_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 80, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_3N_TOUT106_P10_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_3N_TOUT115_P01_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 115, {&MODULE_P01, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_3N_TOUT16_P00_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_3N_TOUT24_P33_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_l, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_3N_TOUT42_P23_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_l, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_3N_TOUT6_P02_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_3N_TOUT74_P15_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_3_TOUT105_P10_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 105, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_3_TOUT108_P10_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_3_TOUT118_P02_11_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_l, 118, {&MODULE_P02,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_3_TOUT13_P00_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_3_TOUT38_P32_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 38, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_3_TOUT3_P02_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_3_TOUT60_P20_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 60, {&MODULE_P20, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_3_TOUT71_P15_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_4N_TOUT105_P10_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 105, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_4N_TOUT108_P10_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_4N_TOUT118_P02_11_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 118, {&MODULE_P02,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_4N_TOUT131_P22_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 131, {&MODULE_P22, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_4N_TOUT13_P00_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_4N_TOUT147_P34_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 147, {&MODULE_P34, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_4N_TOUT3_P02_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_4N_TOUT71_P15_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_4N_TOUT75_P15_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 75, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_4_TOUT102_P10_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 102, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_4_TOUT130_P22_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 130, {&MODULE_P22, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_4_TOUT146_P34_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 146, {&MODULE_P34, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_4_TOUT14_P00_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_4_TOUT29_P33_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_l, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_4_TOUT39_P32_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_4_TOUT4_P02_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_4_TOUT61_P20_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_4_TOUT72_P15_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_5N_TOUT0_P02_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_5N_TOUT109_P10_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_i, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_5N_TOUT132_P22_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_i, 132, {&MODULE_P22, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_5N_TOUT148_P34_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 148, {&MODULE_P34, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_5N_TOUT26_P33_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_l, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_5N_TOUT76_P15_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_5N_TOUT77_P15_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_5N_TOUT8_P02_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_5N_TOUT9_P00_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_5_TOUT110_P10_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 110, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_5_TOUT15_P00_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_5_TOUT23_P33_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_5_TOUT40_P32_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_5_TOUT41_P23_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_5_TOUT5_P02_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_5_TOUT65_P20_9_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_5_TOUT73_P15_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_6N_TOUT103_P10_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_i, 103, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_6N_TOUT10_P00_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_6N_TOUT116_P02_9_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 116, {&MODULE_P02, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_6N_TOUT11_P00_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_6N_TOUT133_P22_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_i, 133, {&MODULE_P22, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_6N_TOUT149_P34_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 149, {&MODULE_P34, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_6N_TOUT1_P02_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_6N_TOUT27_P33_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_l, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_6N_TOUT78_P15_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_6_TOUT106_P10_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_l, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_6_TOUT16_P00_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_6_TOUT24_P33_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_6_TOUT42_P23_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_6_TOUT66_P20_10_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 66, {&MODULE_P20,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_6_TOUT6_P02_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_6_TOUT74_P15_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_7N_TOUT104_P10_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_i, 104, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_7N_TOUT107_P10_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_i, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_7N_TOUT117_P02_10_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 117, {&MODULE_P02,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_7N_TOUT12_P00_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_7N_TOUT134_P22_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_i, 134, {&MODULE_P22, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_7N_TOUT150_P34_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 150, {&MODULE_P34, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_7N_TOUT28_P33_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_l, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_7N_TOUT2_P02_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_7N_TOUT79_P15_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_7_TOUT17_P00_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_7_TOUT25_P33_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 25, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_7_TOUT45_P23_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 45, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_7_TOUT67_P20_11_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 67, {&MODULE_P20,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_7_TOUT75_P15_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 75, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM1_7_TOUT7_P02_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_0N_TOUT101_P11_12_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_j, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_0N_TOUT108_P10_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_k, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_0N_TOUT12_P00_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_k, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_0N_TOUT144_P33_15_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 144, {&MODULE_P33,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_0N_TOUT25_P33_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 25, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_0N_TOUT32_P33_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_0N_TOUT37_P32_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_k, 37, {&MODULE_P32, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_0_TOUT109_P10_7_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_k, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_0_TOUT18_P00_9_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 18, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_0_TOUT26_P33_4_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_0_TOUT32_P33_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_0_TOUT94_P13_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_1N_TOUT105_P10_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 105, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_1N_TOUT167_P00_13_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 167, {&MODULE_P00,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_1N_TOUT22_P33_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 22, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_1N_TOUT30_P33_8_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_1N_TOUT34_P33_12_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 34, {&MODULE_P33,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_1N_TOUT51_P21_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_1N_TOUT90_P14_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_1N_TOUT91_P13_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_1N_TOUT98_P11_9_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_1N_TOUT9_P00_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_1_TOUT102_P10_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 102, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_1_TOUT19_P00_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 19, {&MODULE_P00,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_1_TOUT27_P33_5_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_1_TOUT43_P23_2_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 43, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_1_TOUT90_P14_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_1_TOUT95_P11_2_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_2N_TOUT106_P10_4_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_2N_TOUT10_P00_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_2N_TOUT114_P01_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 114, {&MODULE_P01, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_2N_TOUT138_P23_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 138, {&MODULE_P23, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_2N_TOUT166_P00_14_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 166, {&MODULE_P00,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_2N_TOUT23_P33_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_2N_TOUT31_P33_9_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_2N_TOUT35_P33_13_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 35, {&MODULE_P33,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_2N_TOUT52_P21_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_2N_TOUT91_P13_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_2N_TOUT92_P13_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_2N_TOUT99_P11_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_2_TOUT103_P10_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 103, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_2_TOUT20_P00_11_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 20, {&MODULE_P00,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_2_TOUT28_P33_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_2_TOUT44_P23_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 44, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_2_TOUT88_P14_8_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 88, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_2_TOUT96_P11_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_3N_TOUT100_P11_11_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_3N_TOUT107_P10_5_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_3N_TOUT115_P01_7_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 115, {&MODULE_P01, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_3N_TOUT11_P00_2_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_3N_TOUT139_P23_7_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 139, {&MODULE_P23, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_3N_TOUT143_P33_14_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 143, {&MODULE_P33,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_3N_TOUT168_P00_15_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 168, {&MODULE_P00,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_3N_TOUT24_P33_2_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_3N_TOUT33_P33_11_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 33, {&MODULE_P33,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_3N_TOUT36_P32_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 36, {&MODULE_P32, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_3N_TOUT62_P20_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 62, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_3N_TOUT92_P13_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_3N_TOUT93_P13_2_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_3_TOUT104_P10_2_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 104, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_3_TOUT21_P00_12_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 21, {&MODULE_P00,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_3_TOUT29_P33_7_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_3_TOUT89_P14_9_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 89, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_3_TOUT97_P11_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_4N_TOUT29_P33_7_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_4N_TOUT57_P21_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_4N_TOUT86_P14_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_4N_TOUT97_P11_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_4_TOUT167_P00_13_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 167, {&MODULE_P00,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_4_TOUT22_P33_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 22, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_4_TOUT30_P33_8_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_4_TOUT34_P33_12_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 34, {&MODULE_P33,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_4_TOUT51_P21_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_4_TOUT90_P14_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_4_TOUT98_P11_9_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_5N_TOUT120_P11_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 120, {&MODULE_P11, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_5N_TOUT26_P33_4_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_i, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_5N_TOUT59_P20_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_i, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_5N_TOUT87_P14_7_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_i, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_5N_TOUT94_P13_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_5_TOUT138_P23_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_a, 138, {&MODULE_P23, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_5_TOUT166_P00_14_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_i, 166, {&MODULE_P00,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_5_TOUT35_P33_13_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 35, {&MODULE_P33,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_5_TOUT52_P21_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_5_TOUT65_P20_9_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_5_TOUT91_P13_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_5_TOUT99_P11_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_6N_TOUT27_P33_5_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_i, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_6N_TOUT60_P20_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_i, 60, {&MODULE_P20, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_6N_TOUT88_P14_8_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_i, 88, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_6N_TOUT95_P11_2_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_6_TOUT100_P11_11_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_6_TOUT139_P23_7_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_a, 139, {&MODULE_P23, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_6_TOUT143_P33_14_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_k, 143, {&MODULE_P33,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_6_TOUT168_P00_15_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_i, 168, {&MODULE_P00,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_6_TOUT36_P32_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 36, {&MODULE_P32, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_6_TOUT62_P20_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 62, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_6_TOUT92_P13_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_7N_TOUT28_P33_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_i, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_7N_TOUT61_P20_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_i, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_7N_TOUT89_P14_9_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_i, 89, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_7N_TOUT96_P11_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_7_TOUT101_P11_12_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_7_TOUT140_P32_5_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_a, 140, {&MODULE_P32, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_7_TOUT144_P33_15_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_k, 144, {&MODULE_P33,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_7_TOUT37_P32_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 37, {&MODULE_P32, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_7_TOUT63_P20_7_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 63, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM2_7_TOUT93_P13_2_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_0N_TOUT101_P11_12_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_0N_TOUT144_P33_15_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_j, 144, {&MODULE_P33,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_0N_TOUT17_P00_8_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_k, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_0N_TOUT25_P33_3_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_j, 25, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_0N_TOUT32_P33_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_j, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_0N_TOUT37_P32_1_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_l, 37, {&MODULE_P32, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_0N_TOUT63_P20_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_k, 63, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_0N_TOUT76_P15_5_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_0_TOUT18_P00_9_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 18, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_0_TOUT26_P33_4_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_0_TOUT32_P33_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_0_TOUT65_P20_9_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_0_TOUT94_P13_3_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_1N_TOUT14_P00_5_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_1N_TOUT167_P00_13_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_l, 167, {&MODULE_P00,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_1N_TOUT22_P33_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 22, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_1N_TOUT30_P33_8_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_1N_TOUT34_P33_12_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 34, {&MODULE_P33,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_1N_TOUT51_P21_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_1N_TOUT79_P15_8_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_1N_TOUT90_P14_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_l, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_1N_TOUT91_P13_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_1N_TOUT98_P11_9_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_1_TOUT111_P01_3_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 111, {&MODULE_P01, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_1_TOUT128_P12_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 128, {&MODULE_P12, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_1_TOUT19_P00_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 19, {&MODULE_P00,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_1_TOUT27_P33_5_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_1_TOUT43_P23_2_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 43, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_1_TOUT64_P20_8_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_1_TOUT90_P14_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_1_TOUT95_P11_2_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_2N_TOUT114_P01_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_l, 114, {&MODULE_P01, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_2N_TOUT15_P00_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_2N_TOUT166_P00_14_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_l, 166, {&MODULE_P00,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_2N_TOUT23_P33_1_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_2N_TOUT31_P33_9_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_2N_TOUT35_P33_13_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 35, {&MODULE_P33,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_2N_TOUT52_P21_1_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_2N_TOUT78_P15_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_2N_TOUT91_P13_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_l, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_2N_TOUT92_P13_1_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_2N_TOUT99_P11_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_2_TOUT112_P01_4_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_a, 112, {&MODULE_P01, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_2_TOUT20_P00_11_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 20, {&MODULE_P00,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_2_TOUT28_P33_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_2_TOUT44_P23_3_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 44, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_2_TOUT63_P20_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 63, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_2_TOUT88_P14_8_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 88, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_2_TOUT96_P11_3_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_3N_TOUT100_P11_11_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_3N_TOUT115_P01_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_l, 115, {&MODULE_P01, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_3N_TOUT143_P33_14_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 143, {&MODULE_P33,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_3N_TOUT168_P00_15_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_l, 168, {&MODULE_P00,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_3N_TOUT16_P00_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_3N_TOUT24_P33_2_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_3N_TOUT33_P33_11_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 33, {&MODULE_P33,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_3N_TOUT36_P32_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 36, {&MODULE_P32, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_3N_TOUT62_P20_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_l, 62, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_3N_TOUT77_P15_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_3N_TOUT92_P13_1_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_l, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_3N_TOUT93_P13_2_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_3_TOUT113_P01_5_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_a, 113, {&MODULE_P01, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_3_TOUT21_P00_12_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 21, {&MODULE_P00,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_3_TOUT29_P33_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_3_TOUT62_P20_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 62, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_3_TOUT89_P14_9_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 89, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_3_TOUT97_P11_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_4N_TOUT135_P22_9_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 135, {&MODULE_P22, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_4N_TOUT21_P00_12_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 21, {&MODULE_P00,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_4N_TOUT29_P33_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_4N_TOUT57_P21_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_4N_TOUT86_P14_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_4N_TOUT97_P11_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_4_TOUT114_P01_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_a, 114, {&MODULE_P01, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_4_TOUT131_P22_5_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 131, {&MODULE_P22, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_4_TOUT167_P00_13_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 167, {&MODULE_P00,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_4_TOUT22_P33_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 22, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_4_TOUT30_P33_8_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_4_TOUT34_P33_12_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 34, {&MODULE_P33,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_4_TOUT51_P21_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_4_TOUT90_P14_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_4_TOUT98_P11_9_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_5N_TOUT120_P11_1_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_k, 120, {&MODULE_P11, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_5N_TOUT136_P22_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 136, {&MODULE_P22,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_5N_TOUT18_P00_9_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_i, 18, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_5N_TOUT26_P33_4_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_5N_TOUT59_P20_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_5N_TOUT87_P14_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_5N_TOUT94_P13_3_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_i, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_5_TOUT115_P01_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_a, 115, {&MODULE_P01, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_5_TOUT132_P22_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 132, {&MODULE_P22, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_5_TOUT166_P00_14_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 166, {&MODULE_P00,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_5_TOUT35_P33_13_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 35, {&MODULE_P33,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_5_TOUT52_P21_1_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_5_TOUT64_P20_8_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_5_TOUT91_P13_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_5_TOUT99_P11_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_6N_TOUT137_P22_11_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 137, {&MODULE_P22,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_6N_TOUT19_P00_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_i, 19, {&MODULE_P00,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_6N_TOUT27_P33_5_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_6N_TOUT60_P20_1_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 60, {&MODULE_P20, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_6N_TOUT88_P14_8_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 88, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_6N_TOUT95_P11_2_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_i, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_6_TOUT100_P11_11_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_6_TOUT133_P22_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 133, {&MODULE_P22, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_6_TOUT143_P33_14_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_l, 143, {&MODULE_P33,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_6_TOUT168_P00_15_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 168, {&MODULE_P00,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_6_TOUT36_P32_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 36, {&MODULE_P32, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_6_TOUT62_P20_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 62, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_6_TOUT92_P13_1_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_7N_TOUT20_P00_11_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_i, 20, {&MODULE_P00,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_7N_TOUT28_P33_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_7N_TOUT61_P20_3_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_7N_TOUT89_P14_9_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 89, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_7N_TOUT96_P11_3_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_i, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_7_TOUT101_P11_12_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_7_TOUT134_P22_8_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 134, {&MODULE_P22, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_7_TOUT144_P33_15_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_l, 144, {&MODULE_P33,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_7_TOUT37_P32_1_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 37, {&MODULE_P32, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_7_TOUT63_P20_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 63, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM3_7_TOUT93_P13_2_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_0N_TOUT87_P14_7_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_k, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_0_TOUT109_P10_7_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_0_TOUT39_P32_3_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_0_TOUT48_P22_1_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 48, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_0_TOUT53_P21_2_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_0_TOUT68_P20_12_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 68, {&MODULE_P20,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_0_TOUT76_P15_5_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_0_TOUT77_P15_6_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_0_TOUT85_P14_5_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 85, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_0_TOUT87_P14_7_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_1N_TOUT102_P10_0_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 102, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_1N_TOUT44_P23_3_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 44, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_1N_TOUT50_P22_3_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_1N_TOUT53_P21_2_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_1N_TOUT57_P21_6_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_l, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_1N_TOUT72_P15_1_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_1N_TOUT85_P14_5_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 85, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_1N_TOUT86_P14_6_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_1_TOUT103_P10_1_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 103, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_1_TOUT41_P23_0_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_1_TOUT47_P22_0_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 47, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_1_TOUT54_P21_3_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_1_TOUT69_P20_13_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 69, {&MODULE_P20,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_1_TOUT78_P15_7_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_1_TOUT79_P15_8_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_1_TOUT84_P14_4_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 84, {&MODULE_P14, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_1_TOUT86_P14_6_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_2N_TOUT110_P10_8_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 110, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_2N_TOUT45_P23_4_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 45, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_2N_TOUT52_P21_1_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_2N_TOUT58_P21_7_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 58, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_2N_TOUT65_P20_9_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_l, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_2N_TOUT73_P15_2_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_2N_TOUT81_P14_1_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 81, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_2_TOUT104_P10_2_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 104, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_2_TOUT107_P10_5_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_2_TOUT42_P23_1_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_2_TOUT46_P23_5_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 46, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_2_TOUT55_P21_4_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_2_TOUT70_P20_14_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 70, {&MODULE_P20,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_2_TOUT80_P14_0_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 80, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_2_TOUT83_P14_3_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 83, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_3N_TOUT106_P10_4_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_3N_TOUT46_P23_5_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 46, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_3N_TOUT51_P21_0_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_3N_TOUT59_P20_0_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_l, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_3N_TOUT66_P20_10_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_l, 66, {&MODULE_P20,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_3N_TOUT74_P15_3_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_3N_TOUT80_P14_0_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 80, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_3_TOUT105_P10_3_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 105, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_3_TOUT108_P10_6_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_3_TOUT43_P23_2_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 43, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_3_TOUT49_P22_2_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 49, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_3_TOUT56_P21_5_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_3_TOUT71_P15_0_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_3_TOUT82_P14_2_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 82, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_4N_TOUT105_P10_3_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 105, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_4N_TOUT108_P10_6_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_4N_TOUT132_P22_6_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 132, {&MODULE_P22, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_4N_TOUT21_P00_12_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 21, {&MODULE_P00,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_4N_TOUT56_P21_5_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_4N_TOUT71_P15_0_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_k, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_4N_TOUT75_P15_4_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_k, 75, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_4N_TOUT95_P11_2_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_k, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_4_TOUT102_P10_0_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 102, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_4_TOUT111_P01_3_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 111, {&MODULE_P01, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_4_TOUT131_P22_5_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 131, {&MODULE_P22, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_4_TOUT264_P13_15_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 264, {&MODULE_P13,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_4_TOUT44_P23_3_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 44, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_4_TOUT50_P22_3_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_4_TOUT57_P21_6_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_4_TOUT72_P15_1_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_4_TOUT81_P14_1_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 81, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_5N_TOUT109_P10_7_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_5N_TOUT121_P11_4_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_k, 121, {&MODULE_P11, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_5N_TOUT133_P22_7_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 133, {&MODULE_P22, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_5N_TOUT18_P00_9_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 18, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_5N_TOUT76_P15_5_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_k, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_5N_TOUT77_P15_6_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_k, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_5_TOUT110_P10_8_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 110, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_5_TOUT116_P02_9_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_a, 116, {&MODULE_P02, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_5_TOUT128_P12_0_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 128, {&MODULE_P12, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_5_TOUT130_P22_4_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 130, {&MODULE_P22, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_5_TOUT45_P23_4_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 45, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_5_TOUT56_P21_5_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_k, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_5_TOUT58_P21_7_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 58, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_5_TOUT65_P20_9_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_5_TOUT73_P15_2_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_6N_TOUT103_P10_1_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 103, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_6N_TOUT134_P22_8_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 134, {&MODULE_P22, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_6N_TOUT19_P00_10_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 19, {&MODULE_P00,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_6N_TOUT78_P15_7_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_k, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_6N_TOUT97_P11_6_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_k, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_6_TOUT106_P10_4_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_6_TOUT117_P02_10_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_a, 117, {&MODULE_P02,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_6_TOUT129_P12_1_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 129, {&MODULE_P12, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_6_TOUT139_P23_7_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 139, {&MODULE_P23, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_6_TOUT46_P23_5_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 46, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_6_TOUT59_P20_0_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_6_TOUT66_P20_10_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 66, {&MODULE_P20,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_6_TOUT74_P15_3_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_7N_TOUT104_P10_2_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 104, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_7N_TOUT107_P10_5_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_7N_TOUT124_P11_8_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_k, 124, {&MODULE_P11, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_7N_TOUT135_P22_9_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 135, {&MODULE_P22, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_7N_TOUT20_P00_11_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 20, {&MODULE_P00,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_7N_TOUT79_P15_8_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_k, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_7_TOUT118_P02_11_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_a, 118, {&MODULE_P02,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_7_TOUT119_P11_0_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 119, {&MODULE_P11, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_7_TOUT138_P23_6_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 138, {&MODULE_P23, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_7_TOUT40_P32_4_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_i, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_7_TOUT64_P20_8_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_7_TOUT67_P20_11_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 67, {&MODULE_P20,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM4_7_TOUT75_P15_4_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 75, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_0N_TOUT126_P11_14_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 126, {&MODULE_P11,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_0N_TOUT134_P22_8_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_l, 134, {&MODULE_P22, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_0N_TOUT150_P34_5_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_l, 150, {&MODULE_P34, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_0N_TOUT161_P01_13_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 161, {&MODULE_P01,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_0N_TOUT181_P31_7_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_k, 181, {&MODULE_P31, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_0N_TOUT213_P25_7_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_k, 213, {&MODULE_P25, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_0N_TOUT261_P14_12_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 261, {&MODULE_P14,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_0N_TOUT264_P13_15_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 264, {&MODULE_P13,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_0_TOUT119_P11_0_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 119, {&MODULE_P11, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_0_TOUT130_P22_4_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_k, 130, {&MODULE_P22, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_0_TOUT146_P34_1_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_k, 146, {&MODULE_P34, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_0_TOUT155_P01_0_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 155, {&MODULE_P01, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_0_TOUT162_P01_8_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 162, {&MODULE_P01, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_0_TOUT174_P31_0_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 174, {&MODULE_P31, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_0_TOUT206_P25_0_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 206, {&MODULE_P25, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_0_TOUT249_P13_12_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 249, {&MODULE_P13,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_0_TOUT258_P14_11_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 258, {&MODULE_P14,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_1N_TOUT123_P11_7_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 123, {&MODULE_P11, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_1N_TOUT128_P12_0_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 128, {&MODULE_P12, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_1N_TOUT135_P22_9_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_l, 135, {&MODULE_P22, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_1N_TOUT140_P32_5_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 140, {&MODULE_P32, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_1N_TOUT158_P01_12_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 158, {&MODULE_P01,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_1N_TOUT178_P31_4_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 178, {&MODULE_P31, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_1N_TOUT210_P25_4_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 210, {&MODULE_P25, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_1N_TOUT245_P15_13_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 245, {&MODULE_P15,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_1N_TOUT248_P13_9_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 248, {&MODULE_P13, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_1N_TOUT260_P14_13_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 260, {&MODULE_P14,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_1N_TOUT268_P10_13_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 268, {&MODULE_P10,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_1_TOUT120_P11_1_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 120, {&MODULE_P11, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_1_TOUT131_P22_5_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 131, {&MODULE_P22, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_1_TOUT147_P34_2_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 147, {&MODULE_P34, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_1_TOUT156_P01_2_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 156, {&MODULE_P01, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_1_TOUT164_P01_14_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 164, {&MODULE_P01,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_1_TOUT175_P31_1_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 175, {&MODULE_P31, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_1_TOUT207_P25_1_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 207, {&MODULE_P25, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_1_TOUT242_P15_10_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 242, {&MODULE_P15,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_1_TOUT253_P13_4_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 253, {&MODULE_P13, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_1_TOUT265_P10_9_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 265, {&MODULE_P10, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_2N_TOUT124_P11_8_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 124, {&MODULE_P11, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_2N_TOUT136_P22_10_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_l, 136, {&MODULE_P22,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_2N_TOUT141_P32_6_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 141, {&MODULE_P32, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_2N_TOUT159_P01_1_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 159, {&MODULE_P01, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_2N_TOUT179_P31_5_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 179, {&MODULE_P31, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_2N_TOUT211_P25_5_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 211, {&MODULE_P25, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_2N_TOUT246_P15_14_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 246, {&MODULE_P15,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_2N_TOUT250_P13_11_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 250, {&MODULE_P13,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_2N_TOUT259_P14_14_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 259, {&MODULE_P14,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_2N_TOUT269_P10_11_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 269, {&MODULE_P10,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_2_TOUT121_P11_4_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 121, {&MODULE_P11, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_2_TOUT132_P22_6_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 132, {&MODULE_P22, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_2_TOUT148_P34_3_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 148, {&MODULE_P34, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_2_TOUT152_P02_15_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 152, {&MODULE_P02,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_2_TOUT157_P01_15_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 157, {&MODULE_P01,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_2_TOUT176_P31_2_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 176, {&MODULE_P31, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_2_TOUT208_P25_2_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 208, {&MODULE_P25, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_2_TOUT243_P15_11_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 243, {&MODULE_P15,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_2_TOUT254_P13_5_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 254, {&MODULE_P13, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_2_TOUT266_P10_10_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 266, {&MODULE_P10,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_3N_TOUT123_P11_7_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 123, {&MODULE_P11, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_3N_TOUT125_P11_13_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 125, {&MODULE_P11,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_3N_TOUT137_P22_11_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_l, 137, {&MODULE_P22,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_3N_TOUT142_P32_7_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 142, {&MODULE_P32, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_3N_TOUT160_P01_9_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 160, {&MODULE_P01, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_3N_TOUT180_P31_6_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 180, {&MODULE_P31, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_3N_TOUT212_P25_6_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 212, {&MODULE_P25, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_3N_TOUT212_P26_0_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 212, {&MODULE_P26, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_3N_TOUT247_P15_15_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 247, {&MODULE_P15,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_3N_TOUT249_P13_12_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 249, {&MODULE_P13,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_3N_TOUT263_P14_15_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 263, {&MODULE_P14,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_3N_TOUT270_P10_15_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 270, {&MODULE_P10,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_3_TOUT122_P11_5_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 122, {&MODULE_P11, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_3_TOUT133_P22_7_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 133, {&MODULE_P22, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_3_TOUT149_P34_4_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 149, {&MODULE_P34, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_3_TOUT163_P01_10_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 163, {&MODULE_P01,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_3_TOUT165_P01_11_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 165, {&MODULE_P01,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_3_TOUT177_P31_3_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 177, {&MODULE_P31, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_3_TOUT209_P25_3_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 209, {&MODULE_P25, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_3_TOUT244_P15_12_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 244, {&MODULE_P15,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_3_TOUT255_P13_6_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 255, {&MODULE_P13, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_3_TOUT267_P10_14_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 267, {&MODULE_P10,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_4N_TOUT122_P11_5_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 122, {&MODULE_P11, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_4N_TOUT129_P12_1_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 129, {&MODULE_P12, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_4N_TOUT163_P01_10_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_k, 163, {&MODULE_P01,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_4N_TOUT165_P01_11_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 165, {&MODULE_P01,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_4N_TOUT177_P31_3_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_k, 177, {&MODULE_P31, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_4N_TOUT209_P25_3_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_k, 209, {&MODULE_P25, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_4N_TOUT267_P10_14_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 267, {&MODULE_P10,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_4_TOUT123_P11_7_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 123, {&MODULE_P11, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_4_TOUT134_P22_8_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_k, 134, {&MODULE_P22, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_4_TOUT150_P34_5_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_k, 150, {&MODULE_P34, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_4_TOUT158_P01_12_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 158, {&MODULE_P01,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_4_TOUT178_P31_4_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 178, {&MODULE_P31, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_4_TOUT210_P25_4_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 210, {&MODULE_P25, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_4_TOUT245_P15_13_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 245, {&MODULE_P15,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_4_TOUT248_P13_9_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 248, {&MODULE_P13, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_4_TOUT268_P10_13_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 268, {&MODULE_P10,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_5N_TOUT119_P11_0_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_i, 119, {&MODULE_P11, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_5N_TOUT155_P01_0_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_i, 155, {&MODULE_P01, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_5N_TOUT162_P01_8_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_k, 162, {&MODULE_P01, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_5N_TOUT174_P31_0_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_k, 174, {&MODULE_P31, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_5N_TOUT206_P25_0_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_k, 206, {&MODULE_P25, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_5_TOUT124_P11_8_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 124, {&MODULE_P11, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_5_TOUT135_P22_9_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_k, 135, {&MODULE_P22, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_5_TOUT140_P32_5_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 140, {&MODULE_P32, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_5_TOUT159_P01_1_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 159, {&MODULE_P01, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_5_TOUT179_P31_5_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 179, {&MODULE_P31, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_5_TOUT211_P25_5_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 211, {&MODULE_P25, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_5_TOUT246_P15_14_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 246, {&MODULE_P15,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_5_TOUT250_P13_11_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_i, 250, {&MODULE_P13,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_5_TOUT269_P10_11_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 269, {&MODULE_P10,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_6N_TOUT120_P11_1_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_i, 120, {&MODULE_P11, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_6N_TOUT156_P01_2_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_i, 156, {&MODULE_P01, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_6N_TOUT158_P01_12_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_k, 158, {&MODULE_P01,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_6N_TOUT175_P31_1_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_k, 175, {&MODULE_P31, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_6N_TOUT207_P25_1_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_k, 207, {&MODULE_P25, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_6N_TOUT96_P11_3_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_k, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_6_TOUT125_P11_13_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 125, {&MODULE_P11,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_6_TOUT136_P22_10_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_k, 136, {&MODULE_P22,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_6_TOUT141_P32_6_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 141, {&MODULE_P32, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_6_TOUT160_P01_9_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 160, {&MODULE_P01, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_6_TOUT180_P31_6_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 180, {&MODULE_P31, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_6_TOUT212_P25_6_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 212, {&MODULE_P25, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_6_TOUT212_P26_0_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 212, {&MODULE_P26, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_6_TOUT247_P15_15_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 247, {&MODULE_P15,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_6_TOUT249_P13_12_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_i, 249, {&MODULE_P13,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_6_TOUT270_P10_15_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 270, {&MODULE_P10,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_7N_TOUT121_P11_4_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_i, 121, {&MODULE_P11, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_7N_TOUT152_P02_15_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_k, 152, {&MODULE_P02,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_7N_TOUT157_P01_15_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_i, 157, {&MODULE_P01,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_7N_TOUT176_P31_2_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_k, 176, {&MODULE_P31, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_7N_TOUT208_P25_2_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_k, 208, {&MODULE_P25, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_7_TOUT126_P11_14_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 126, {&MODULE_P11,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_7_TOUT137_P22_11_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_k, 137, {&MODULE_P22,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_7_TOUT142_P32_7_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 142, {&MODULE_P32, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_7_TOUT161_P01_13_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 161, {&MODULE_P01,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_7_TOUT181_P31_7_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 181, {&MODULE_P31, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_7_TOUT213_P25_7_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 213, {&MODULE_P25, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM5_7_TOUT248_P13_9_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 248, {&MODULE_P13, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_0_TOUT127_P11_15_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 127, {&MODULE_P11,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_0_TOUT141_P32_6_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 141, {&MODULE_P32, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_0_TOUT155_P01_0_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 155, {&MODULE_P01, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_0_TOUT162_P01_8_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_j, 162, {&MODULE_P01, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_0_TOUT182_P31_8_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 182, {&MODULE_P31, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_0_TOUT214_P25_8_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 214, {&MODULE_P25, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_0_TOUT242_P15_10_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 242, {&MODULE_P15,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_0_TOUT250_P13_11_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 250, {&MODULE_P13,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_1_TOUT128_P12_0_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 128, {&MODULE_P12, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_1_TOUT142_P32_7_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 142, {&MODULE_P32, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_1_TOUT156_P01_2_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 156, {&MODULE_P01, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_1_TOUT164_P01_14_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 164, {&MODULE_P01,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_1_TOUT183_P31_9_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 183, {&MODULE_P31, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_1_TOUT215_P25_9_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 215, {&MODULE_P25, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_1_TOUT251_P13_10_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 251, {&MODULE_P13,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_1_TOUT258_P14_11_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 258, {&MODULE_P14,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_2_TOUT129_P12_1_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 129, {&MODULE_P12, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_2_TOUT143_P33_14_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 143, {&MODULE_P33,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_2_TOUT152_P02_15_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 152, {&MODULE_P02,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_2_TOUT157_P01_15_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 157, {&MODULE_P01,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_2_TOUT184_P31_10_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 184, {&MODULE_P31,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_2_TOUT216_P25_10_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 216, {&MODULE_P25,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_2_TOUT252_P13_14_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 252, {&MODULE_P13,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_2_TOUT259_P14_14_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 259, {&MODULE_P14,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_3_TOUT111_P01_3_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 111, {&MODULE_P01, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_3_TOUT144_P33_15_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 144, {&MODULE_P33,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_3_TOUT163_P01_10_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 163, {&MODULE_P01,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_3_TOUT165_P01_11_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 165, {&MODULE_P01,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_3_TOUT185_P31_11_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 185, {&MODULE_P31,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_3_TOUT217_P25_11_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 217, {&MODULE_P25,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_3_TOUT253_P13_4_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 253, {&MODULE_P13, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_3_TOUT260_P14_13_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 260, {&MODULE_P14,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_4_TOUT140_P32_5_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 140, {&MODULE_P32, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_4_TOUT143_P33_14_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 143, {&MODULE_P33,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_4_TOUT158_P01_12_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 158, {&MODULE_P01,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_4_TOUT186_P31_12_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 186, {&MODULE_P31,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_4_TOUT218_P25_12_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 218, {&MODULE_P25,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_4_TOUT254_P13_5_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 254, {&MODULE_P13, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_4_TOUT261_P14_12_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 261, {&MODULE_P14,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_4_TOUT31_P33_9_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_5_TOUT146_P34_1_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 146, {&MODULE_P34, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_5_TOUT159_P01_1_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 159, {&MODULE_P01, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_5_TOUT187_P31_13_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 187, {&MODULE_P31,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_5_TOUT219_P25_13_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 219, {&MODULE_P25,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_5_TOUT243_P15_11_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_i, 243, {&MODULE_P15,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_5_TOUT255_P13_6_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 255, {&MODULE_P13, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_5_TOUT262_P13_13_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 262, {&MODULE_P13,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_6_TOUT147_P34_2_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 147, {&MODULE_P34, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_6_TOUT160_P01_9_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 160, {&MODULE_P01, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_6_TOUT188_P31_14_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 188, {&MODULE_P31,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_6_TOUT220_P25_14_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 220, {&MODULE_P25,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_6_TOUT256_P13_7_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 256, {&MODULE_P13, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_6_TOUT263_P14_15_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 263, {&MODULE_P14,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_7_TOUT148_P34_3_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 148, {&MODULE_P34, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_7_TOUT161_P01_13_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 161, {&MODULE_P01,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_7_TOUT189_P31_15_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 189, {&MODULE_P31,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_7_TOUT221_P25_15_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 221, {&MODULE_P25,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_7_TOUT244_P15_12_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_i, 244, {&MODULE_P15,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM6_7_TOUT264_P13_15_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 264, {&MODULE_P13,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_0_TOUT149_P34_4_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 149, {&MODULE_P34, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_0_TOUT162_P01_8_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 162, {&MODULE_P01, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_0_TOUT190_P30_0_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 190, {&MODULE_P30, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_0_TOUT222_P24_0_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 222, {&MODULE_P24, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_0_TOUT249_P13_12_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 249, {&MODULE_P13,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_0_TOUT258_P14_11_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_j, 258, {&MODULE_P14,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_1_TOUT150_P34_5_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 150, {&MODULE_P34, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_1_TOUT163_P01_10_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 163, {&MODULE_P01,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_1_TOUT191_P30_1_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 191, {&MODULE_P30, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_1_TOUT223_P24_1_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 223, {&MODULE_P24, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_1_TOUT242_P15_10_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 242, {&MODULE_P15,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_1_TOUT245_P15_13_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 245, {&MODULE_P15,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_1_TOUT253_P13_4_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 253, {&MODULE_P13, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_1_TOUT265_P10_9_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 265, {&MODULE_P10, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_2_TOUT164_P01_14_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 164, {&MODULE_P01,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_2_TOUT192_P30_2_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 192, {&MODULE_P30, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_2_TOUT224_P24_2_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 224, {&MODULE_P24, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_2_TOUT243_P15_11_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 243, {&MODULE_P15,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_2_TOUT246_P15_14_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 246, {&MODULE_P15,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_2_TOUT254_P13_5_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 254, {&MODULE_P13, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_2_TOUT266_P10_10_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 266, {&MODULE_P10,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_3_TOUT166_P00_14_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 166, {&MODULE_P00,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_3_TOUT193_P30_3_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 193, {&MODULE_P30, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_3_TOUT225_P24_3_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 225, {&MODULE_P24, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_3_TOUT244_P15_12_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 244, {&MODULE_P15,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_3_TOUT247_P15_15_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 247, {&MODULE_P15,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_3_TOUT255_P13_6_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 255, {&MODULE_P13, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_3_TOUT267_P10_14_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 267, {&MODULE_P10,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_4_TOUT167_P00_13_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 167, {&MODULE_P00,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_4_TOUT194_P30_4_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 194, {&MODULE_P30, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_4_TOUT226_P24_4_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 226, {&MODULE_P24, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_4_TOUT245_P15_13_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 245, {&MODULE_P15,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_4_TOUT248_P13_9_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 248, {&MODULE_P13, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_4_TOUT268_P10_13_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 268, {&MODULE_P10,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_5_TOUT168_P00_15_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 168, {&MODULE_P00,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_5_TOUT195_P30_5_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 195, {&MODULE_P30, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_5_TOUT227_P24_5_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 227, {&MODULE_P24, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_5_TOUT246_P15_14_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 246, {&MODULE_P15,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_5_TOUT251_P13_10_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 251, {&MODULE_P13,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_5_TOUT269_P10_11_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 269, {&MODULE_P10,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_6_TOUT151_P02_12_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 151, {&MODULE_P02,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_6_TOUT153_P02_13_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 153, {&MODULE_P02,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_6_TOUT196_P30_6_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 196, {&MODULE_P30, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_6_TOUT228_P24_6_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 228, {&MODULE_P24, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_6_TOUT247_P15_15_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 247, {&MODULE_P15,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_6_TOUT249_P13_12_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 249, {&MODULE_P13,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_6_TOUT270_P10_15_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 270, {&MODULE_P10,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_7_TOUT152_P02_15_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 152, {&MODULE_P02,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_7_TOUT154_P02_14_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 154, {&MODULE_P02,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_7_TOUT161_P01_13_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_k, 161, {&MODULE_P01,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_7_TOUT197_P30_7_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 197, {&MODULE_P30, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_7_TOUT229_P24_7_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 229, {&MODULE_P24, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_7_TOUT248_P13_9_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 248, {&MODULE_P13, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM7_7_TOUT261_P14_12_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 261, {&MODULE_P14,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_0_TOUT162_P01_8_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 162, {&MODULE_P01, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_0_TOUT198_P30_8_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 198, {&MODULE_P30, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_0_TOUT230_P24_8_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 230, {&MODULE_P24, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_0_TOUT242_P15_10_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_j, 242, {&MODULE_P15,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_0_TOUT250_P13_11_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 250, {&MODULE_P13,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_1_TOUT163_P01_10_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 163, {&MODULE_P01,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_1_TOUT199_P30_9_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 199, {&MODULE_P30, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_1_TOUT231_P24_9_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 231, {&MODULE_P24, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_1_TOUT251_P13_10_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 251, {&MODULE_P13,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_1_TOUT258_P14_11_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 258, {&MODULE_P14,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_2_TOUT164_P01_14_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 164, {&MODULE_P01,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_2_TOUT200_P30_10_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 200, {&MODULE_P30,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_2_TOUT232_P24_10_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 232, {&MODULE_P24,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_2_TOUT252_P13_14_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 252, {&MODULE_P13,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_2_TOUT259_P14_14_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 259, {&MODULE_P14,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_3_TOUT166_P00_14_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 166, {&MODULE_P00,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_3_TOUT201_P30_11_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 201, {&MODULE_P30,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_3_TOUT233_P24_11_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 233, {&MODULE_P24,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_3_TOUT253_P13_4_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 253, {&MODULE_P13, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_3_TOUT260_P14_13_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 260, {&MODULE_P14,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_4_TOUT167_P00_13_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 167, {&MODULE_P00,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_4_TOUT202_P30_12_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 202, {&MODULE_P30,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_4_TOUT234_P24_12_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 234, {&MODULE_P24,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_4_TOUT254_P13_5_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 254, {&MODULE_P13, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_4_TOUT261_P14_12_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 261, {&MODULE_P14,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_5_TOUT168_P00_15_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 168, {&MODULE_P00,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_5_TOUT203_P30_13_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 203, {&MODULE_P30,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_5_TOUT235_P24_13_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 235, {&MODULE_P24,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_5_TOUT243_P15_11_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 243, {&MODULE_P15,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_5_TOUT255_P13_6_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 255, {&MODULE_P13, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_5_TOUT262_P13_13_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 262, {&MODULE_P13,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_6_TOUT151_P02_12_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 151, {&MODULE_P02,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_6_TOUT153_P02_13_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 153, {&MODULE_P02,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_6_TOUT204_P30_14_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 204, {&MODULE_P30,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_6_TOUT236_P24_14_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 236, {&MODULE_P24,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_6_TOUT256_P13_7_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 256, {&MODULE_P13, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_6_TOUT263_P14_15_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 263, {&MODULE_P14,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_7_TOUT152_P02_15_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 152, {&MODULE_P02,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_7_TOUT154_P02_14_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 154, {&MODULE_P02,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_7_TOUT161_P01_13_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_l, 161, {&MODULE_P01,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_7_TOUT205_P30_15_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 205, {&MODULE_P30,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_7_TOUT237_P24_15_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 237, {&MODULE_P24,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_7_TOUT244_P15_12_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 244, {&MODULE_P15,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Atom_ToutMap

IfxGtm_ATOM8_7_TOUT264_P13_15_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 264, {&MODULE_P13,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Clk_Out

IfxGtm_CLK0_P23_1_OUT = {&MODULE_GTM, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt4}

IfxGtm_Clk_Out

IfxGtm_CLK1_P32_4_OUT = {&MODULE_GTM, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt4}

IfxGtm_Clk_Out

IfxGtm_CLK2_P11_12_OUT = {&MODULE_GTM, {&MODULE_P11,12}, IfxPort_OutputIdx_alt3}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_0_P00_9_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P00, 9}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_0_P02_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P02, 0}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_0_P10_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P10, 7}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_0_P13_12_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P13,12}, (IfxGtm_ChXSel)11}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_0_P14_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P14, 5}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_0_P14_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P14, 7}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_0_P15_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P15, 6}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_0_P21_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P21, 2}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_0_P22_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P22, 1}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_0_P33_10_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P33,10}, (IfxGtm_ChXSel)9}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_0_P33_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P33, 4}, (IfxGtm_ChXSel)10}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_1_P00_10_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P00,10}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_1_P02_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P02, 1}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_1_P10_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P10, 1}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_1_P10_9_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P10, 9}, (IfxGtm_ChXSel)10}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_1_P14_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P14, 6}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_1_P15_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P15, 7}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_1_P21_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P21, 3}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_1_P22_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P22, 0}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_1_P33_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P33, 5}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_1_P33_9_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P33, 9}, (IfxGtm_ChXSel)9}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_2_P00_11_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P00,11}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_2_P02_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P02, 2}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_2_P02_9_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P02, 9}, (IfxGtm_ChXSel)10}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_2_P10_10_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P10,10}, (IfxGtm_ChXSel)11}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_2_P10_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P10, 2}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_2_P10_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P10, 5}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_2_P15_8_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P15, 8}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_2_P21_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P21, 4}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_2_P23_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P23, 5}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_2_P33_11_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P33,11}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_2_P33_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P33, 6}, (IfxGtm_ChXSel)9}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_3_P00_12_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P00,12}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_3_P02_10_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P02,10}, (IfxGtm_ChXSel)10}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_3_P02_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P02, 3}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_3_P10_14_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P10,14}, (IfxGtm_ChXSel)11}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_3_P10_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P10, 3}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_3_P10_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P10, 6}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_3_P14_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P14, 0}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_3_P21_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P21, 5}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_3_P22_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P22, 2}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_3_P32_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P32, 2}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_3_P33_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P33, 7}, (IfxGtm_ChXSel)9}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_4_P02_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P02, 4}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_4_P10_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P10, 0}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_4_P10_13_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P10,13}, (IfxGtm_ChXSel)9}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_4_P14_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P14, 1}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_4_P21_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P21, 6}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_4_P22_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P22, 3}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_4_P32_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P32, 3}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_4_P33_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P33, 0}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_4_P33_8_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P33, 8}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_5_P01_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P01, 3}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_5_P02_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P02, 5}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_5_P10_11_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P10,11}, (IfxGtm_ChXSel)9}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_5_P10_8_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P10, 8}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_5_P14_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P14, 2}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_5_P21_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P21, 7}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_5_P23_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P23, 0}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_5_P32_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P32, 4}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_5_P33_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P33, 1}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_6_P01_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P01, 4}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_6_P02_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P02, 6}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_6_P10_15_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P10,15}, (IfxGtm_ChXSel)9}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_6_P10_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P10, 4}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_6_P14_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P14, 3}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_6_P20_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P20, 0}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_6_P23_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P23, 1}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_6_P23_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P23, 2}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_6_P33_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P33, 2}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_7_P02_11_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P02,11}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_7_P02_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P02, 7}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_7_P11_15_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P11,15}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_7_P14_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P14, 4}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_7_P20_8_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P20, 8}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_7_P23_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P23, 3}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_7_P23_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P23, 4}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM0_7_P33_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P33, 3}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_0_P00_9_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P00, 9}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_0_P02_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P02, 0}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_0_P10_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P10, 7}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_0_P14_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P14, 5}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_0_P14_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P14, 7}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_0_P15_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P15, 6}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_0_P21_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P21, 2}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_0_P22_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P22, 1}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_0_P33_10_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P33,10}, (IfxGtm_ChXSel)9}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_0_P33_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P33, 4}, (IfxGtm_ChXSel)10}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_1_P00_10_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P00,10}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_1_P02_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P02, 1}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_1_P10_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P10, 1}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_1_P14_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P14, 6}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_1_P15_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P15, 7}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_1_P21_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P21, 3}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_1_P22_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P22, 0}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_1_P33_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P33, 5}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_1_P33_9_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P33, 9}, (IfxGtm_ChXSel)9}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_2_P00_11_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P00,11}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_2_P02_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P02, 2}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_2_P10_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P10, 2}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_2_P10_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P10, 5}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_2_P15_8_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P15, 8}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_2_P21_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P21, 4}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_2_P23_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P23, 5}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_2_P23_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P23, 6}, (IfxGtm_ChXSel)10}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_2_P33_11_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P33,11}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_2_P33_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P33, 6}, (IfxGtm_ChXSel)9}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_3_P00_12_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P00,12}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_3_P02_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P02, 3}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_3_P10_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P10, 3}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_3_P10_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P10, 6}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_3_P14_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P14, 0}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_3_P21_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P21, 5}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_3_P22_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P22, 2}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_3_P23_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P23, 7}, (IfxGtm_ChXSel)10}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_3_P32_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P32, 2}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_3_P33_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P33, 7}, (IfxGtm_ChXSel)9}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_4_P02_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P02, 4}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_4_P10_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P10, 0}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_4_P14_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P14, 1}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_4_P20_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P20, 0}, (IfxGtm_ChXSel)9}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_4_P21_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P21, 6}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_4_P22_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P22, 3}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_4_P32_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P32, 3}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_4_P33_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P33, 0}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_4_P33_8_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P33, 8}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_5_P02_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P02, 5}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_5_P10_8_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P10, 8}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_5_P14_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P14, 2}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_5_P20_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P20, 7}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_5_P21_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P21, 7}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_5_P23_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P23, 0}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_5_P32_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P32, 4}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_5_P33_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P33, 1}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_6_P02_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P02, 6}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_6_P10_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P10, 4}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_6_P14_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P14, 3}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_6_P20_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P20, 0}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_6_P23_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P23, 1}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_6_P23_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P23, 2}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_6_P33_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P33, 2}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_7_P02_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P02, 7}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_7_P14_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P14, 4}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_7_P20_8_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P20, 8}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_7_P23_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P23, 3}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_7_P23_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P23, 4}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM1_7_P33_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P33, 3}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_0_P00_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P00, 0}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_0_P01_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P01, 3}, (IfxGtm_ChXSel)14}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_0_P02_8_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P02, 8}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_0_P11_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P11, 0}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_0_P11_10_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P11,10}, (IfxGtm_ChXSel)9}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_0_P13_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P13, 3}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_0_P15_5_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P15, 5}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_0_P20_12_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P20,12}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_0_P31_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P31, 0}, (IfxGtm_ChXSel)13}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_0_P33_12_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P33,12}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_0_P33_14_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P33,14}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_1_P00_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P00, 1}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_1_P00_2_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P00, 2}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_1_P01_4_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P01, 4}, (IfxGtm_ChXSel)14}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_1_P11_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P11, 1}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_1_P11_2_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P11, 2}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_1_P15_10_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P15,10}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_1_P20_13_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P20,13}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_1_P31_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P31, 1}, (IfxGtm_ChXSel)9}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_1_P33_13_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P33,13}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_1_P33_15_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P33,15}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_2_P00_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P00, 3}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_2_P01_5_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P01, 5}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_2_P11_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P11, 3}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_2_P11_4_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P11, 4}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_2_P14_8_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P14, 8}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_2_P15_11_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P15,11}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_2_P15_6_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P15, 6}, (IfxGtm_ChXSel)14}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_2_P20_14_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P20,14}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_2_P31_2_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P31, 2}, (IfxGtm_ChXSel)9}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_2_P32_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P32, 0}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_3_P00_4_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P00, 4}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_3_P01_5_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P01, 5}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_3_P11_5_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P11, 5}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_3_P11_6_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P11, 6}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_3_P14_9_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P14, 9}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_3_P15_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P15, 0}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_3_P15_12_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P15,12}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_3_P20_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P20, 1}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_3_P31_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P31, 3}, (IfxGtm_ChXSel)14}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_3_P34_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P34, 1}, (IfxGtm_ChXSel)9}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_4_P00_5_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P00, 5}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_4_P02_14_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P02,14}, (IfxGtm_ChXSel)14}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_4_P11_7_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P11, 7}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_4_P11_9_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P11, 9}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_4_P14_10_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P14,10}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_4_P15_13_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P15,13}, (IfxGtm_ChXSel)9}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_4_P15_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P15, 1}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_4_P20_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P20, 3}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_4_P21_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P21, 0}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_4_P31_4_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P31, 4}, (IfxGtm_ChXSel)12}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_4_P34_2_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P34, 2}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_5_P00_6_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P00, 6}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_5_P01_6_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P01, 6}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_5_P02_15_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P02,15}, (IfxGtm_ChXSel)14}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_5_P11_10_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P11,10}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_5_P11_8_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P11, 8}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_5_P13_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P13, 0}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_5_P15_14_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P15,14}, (IfxGtm_ChXSel)12}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_5_P15_2_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P15, 2}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_5_P20_9_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P20, 9}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_5_P21_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P21, 1}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_5_P31_5_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P31, 5}, (IfxGtm_ChXSel)13}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_5_P34_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P34, 3}, (IfxGtm_ChXSel)9}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_6_P00_7_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P00, 7}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_6_P01_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P01, 0}, (IfxGtm_ChXSel)13}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_6_P11_11_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P11,11}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_6_P11_13_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P11,13}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_6_P13_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P13, 1}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_6_P15_15_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P15,15}, (IfxGtm_ChXSel)9}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_6_P15_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P15, 3}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_6_P20_10_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P20,10}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_6_P20_6_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P20, 6}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_6_P22_6_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P22, 6}, (IfxGtm_ChXSel)14}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_6_P31_6_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P31, 6}, (IfxGtm_ChXSel)12}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_6_P34_4_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P34, 4}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_7_P00_8_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P00, 8}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_7_P01_7_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P01, 7}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_7_P11_12_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P11,12}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_7_P11_14_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P11,14}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_7_P13_2_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P13, 2}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_7_P13_9_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P13, 9}, (IfxGtm_ChXSel)12}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_7_P15_4_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P15, 4}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_7_P20_11_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P20,11}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_7_P20_7_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P20, 7}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_7_P31_7_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P31, 7}, (IfxGtm_ChXSel)14}

IfxGtm_Tim_TinMap

IfxGtm_TIM2_7_P34_5_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P34, 5}, (IfxGtm_ChXSel)9}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_0_P00_0_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_0, {&MODULE_P00, 0}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_0_P00_5_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_0, {&MODULE_P00, 5}, (IfxGtm_ChXSel)11}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_0_P02_6_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_0, {&MODULE_P02, 6}, (IfxGtm_ChXSel)10}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_0_P02_8_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_0, {&MODULE_P02, 8}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_0_P11_11_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_0, {&MODULE_P11,11}, (IfxGtm_ChXSel)14}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_0_P12_0_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_0, {&MODULE_P12, 0}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_0_P13_11_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_0, {&MODULE_P13,11}, (IfxGtm_ChXSel)9}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_0_P13_3_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_0, {&MODULE_P13, 3}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_0_P15_5_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_0, {&MODULE_P15, 5}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_0_P20_12_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_0, {&MODULE_P20,12}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_0_P22_4_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_0, {&MODULE_P22, 4}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_0_P25_0_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_0, {&MODULE_P25, 0}, (IfxGtm_ChXSel)12}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_0_P33_0_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_0, {&MODULE_P33, 0}, (IfxGtm_ChXSel)13}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_0_P33_12_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_0, {&MODULE_P33,12}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_1_P00_1_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_1, {&MODULE_P00, 1}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_1_P00_2_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_1, {&MODULE_P00, 2}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_1_P00_6_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_1, {&MODULE_P00, 6}, (IfxGtm_ChXSel)14}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_1_P02_7_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_1, {&MODULE_P02, 7}, (IfxGtm_ChXSel)10}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_1_P11_2_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_1, {&MODULE_P11, 2}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_1_P12_1_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_1, {&MODULE_P12, 1}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_1_P13_10_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_1, {&MODULE_P13,10}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_1_P14_11_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_1, {&MODULE_P14,11}, (IfxGtm_ChXSel)9}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_1_P20_13_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_1, {&MODULE_P20,13}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_1_P22_5_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_1, {&MODULE_P22, 5}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_1_P25_1_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_1, {&MODULE_P25, 1}, (IfxGtm_ChXSel)11}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_1_P33_13_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_1, {&MODULE_P33,13}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_1_P33_1_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_1, {&MODULE_P33, 1}, (IfxGtm_ChXSel)15}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_2_P00_3_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_2, {&MODULE_P00, 3}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_2_P00_7_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_2, {&MODULE_P00, 7}, (IfxGtm_ChXSel)11}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_2_P02_8_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_2, {&MODULE_P02, 8}, (IfxGtm_ChXSel)10}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_2_P11_3_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_2, {&MODULE_P11, 3}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_2_P13_14_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_2, {&MODULE_P13,14}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_2_P14_14_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_2, {&MODULE_P14,14}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_2_P14_8_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_2, {&MODULE_P14, 8}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_2_P20_14_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_2, {&MODULE_P20,14}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_2_P22_6_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_2, {&MODULE_P22, 6}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_2_P25_2_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_2, {&MODULE_P25, 2}, (IfxGtm_ChXSel)9}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_2_P32_0_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_2, {&MODULE_P32, 0}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_2_P33_2_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_2, {&MODULE_P33, 2}, (IfxGtm_ChXSel)14}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_3_P00_4_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_3, {&MODULE_P00, 4}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_3_P00_8_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_3, {&MODULE_P00, 8}, (IfxGtm_ChXSel)11}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_3_P02_9_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_3, {&MODULE_P02, 9}, (IfxGtm_ChXSel)10}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_3_P11_6_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_3, {&MODULE_P11, 6}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_3_P13_4_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_3, {&MODULE_P13, 4}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_3_P14_13_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_3, {&MODULE_P14,13}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_3_P14_9_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_3, {&MODULE_P14, 9}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_3_P15_0_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_3, {&MODULE_P15, 0}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_3_P20_1_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_3, {&MODULE_P20, 1}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_3_P22_7_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_3, {&MODULE_P22, 7}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_3_P25_3_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_3, {&MODULE_P25, 3}, (IfxGtm_ChXSel)9}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_3_P32_1_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_3, {&MODULE_P32, 1}, (IfxGtm_ChXSel)15}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_3_P33_3_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_3, {&MODULE_P33, 3}, (IfxGtm_ChXSel)12}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_4_P00_5_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_4, {&MODULE_P00, 5}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_4_P02_10_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_4, {&MODULE_P02,10}, (IfxGtm_ChXSel)11}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_4_P11_9_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_4, {&MODULE_P11, 9}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_4_P13_5_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_4, {&MODULE_P13, 5}, (IfxGtm_ChXSel)9}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_4_P14_10_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_4, {&MODULE_P14,10}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_4_P14_12_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_4, {&MODULE_P14,12}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_4_P15_1_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_4, {&MODULE_P15, 1}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_4_P20_3_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_4, {&MODULE_P20, 3}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_4_P21_0_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_4, {&MODULE_P21, 0}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_4_P22_8_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_4, {&MODULE_P22, 8}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_4_P25_4_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_4, {&MODULE_P25, 4}, (IfxGtm_ChXSel)10}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_4_P34_1_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_4, {&MODULE_P34, 1}, (IfxGtm_ChXSel)12}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_5_P00_6_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_5, {&MODULE_P00, 6}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_5_P02_11_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_5, {&MODULE_P02,11}, (IfxGtm_ChXSel)12}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_5_P11_10_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_5, {&MODULE_P11,10}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_5_P13_0_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_5, {&MODULE_P13, 0}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_5_P13_13_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_5, {&MODULE_P13,13}, (IfxGtm_ChXSel)9}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_5_P13_6_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_5, {&MODULE_P13, 6}, (IfxGtm_ChXSel)10}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_5_P15_2_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_5, {&MODULE_P15, 2}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_5_P20_9_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_5, {&MODULE_P20, 9}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_5_P21_1_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_5, {&MODULE_P21, 1}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_5_P22_9_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_5, {&MODULE_P22, 9}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_5_P25_5_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_5, {&MODULE_P25, 5}, (IfxGtm_ChXSel)11}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_5_P32_5_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_5, {&MODULE_P32, 5}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_5_P34_2_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_5, {&MODULE_P34, 2}, (IfxGtm_ChXSel)13}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_6_P00_7_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_6, {&MODULE_P00, 7}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_6_P02_12_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_6, {&MODULE_P02,12}, (IfxGtm_ChXSel)12}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_6_P11_11_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_6, {&MODULE_P11,11}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_6_P13_1_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_6, {&MODULE_P13, 1}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_6_P13_7_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_6, {&MODULE_P13, 7}, (IfxGtm_ChXSel)10}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_6_P14_15_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_6, {&MODULE_P14,15}, (IfxGtm_ChXSel)9}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_6_P15_3_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_6, {&MODULE_P15, 3}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_6_P20_10_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_6, {&MODULE_P20,10}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_6_P20_6_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_6, {&MODULE_P20, 6}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_6_P22_10_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_6, {&MODULE_P22,10}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_6_P25_6_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_6, {&MODULE_P25, 6}, (IfxGtm_ChXSel)14}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_6_P26_0_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_6, {&MODULE_P26, 0}, (IfxGtm_ChXSel)11}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_6_P32_6_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_6, {&MODULE_P32, 6}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_6_P34_3_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_6, {&MODULE_P34, 3}, (IfxGtm_ChXSel)13}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_7_P00_8_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_7, {&MODULE_P00, 8}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_7_P02_13_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_7, {&MODULE_P02,13}, (IfxGtm_ChXSel)11}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_7_P11_12_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_7, {&MODULE_P11,12}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_7_P13_15_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_7, {&MODULE_P13,15}, (IfxGtm_ChXSel)9}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_7_P13_2_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_7, {&MODULE_P13, 2}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_7_P15_4_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_7, {&MODULE_P15, 4}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_7_P20_11_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_7, {&MODULE_P20,11}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_7_P20_7_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_7, {&MODULE_P20, 7}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_7_P22_11_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_7, {&MODULE_P22,11}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_7_P25_7_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_7, {&MODULE_P25, 7}, (IfxGtm_ChXSel)10}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_7_P32_7_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_7, {&MODULE_P32, 7}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM3_7_P34_4_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_7, {&MODULE_P34, 4}, (IfxGtm_ChXSel)12}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_0_P00_13_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_0, {&MODULE_P00,13}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_0_P00_9_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_0, {&MODULE_P00, 9}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_0_P01_12_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_0, {&MODULE_P01,12}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_0_P02_12_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_0, {&MODULE_P02,12}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_0_P10_0_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_0, {&MODULE_P10, 0}, (IfxGtm_ChXSel)12}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_0_P10_8_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_0, {&MODULE_P10, 8}, (IfxGtm_ChXSel)13}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_0_P11_0_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_0, {&MODULE_P11, 0}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_0_P12_0_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_0, {&MODULE_P12, 0}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_0_P13_12_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_0, {&MODULE_P13,12}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_0_P21_0_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_0, {&MODULE_P21, 0}, (IfxGtm_ChXSel)11}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_0_P24_0_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_0, {&MODULE_P24, 0}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_0_P25_8_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_0, {&MODULE_P25, 8}, (IfxGtm_ChXSel)9}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_0_P30_0_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_0, {&MODULE_P30, 0}, (IfxGtm_ChXSel)10}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_0_P32_7_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_0, {&MODULE_P32, 7}, (IfxGtm_ChXSel)15}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_1_P00_10_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_1, {&MODULE_P00,10}, (IfxGtm_ChXSel)11}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_1_P00_15_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_1, {&MODULE_P00,15}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_1_P01_1_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_1, {&MODULE_P01, 1}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_1_P02_15_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_1, {&MODULE_P02,15}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_1_P10_9_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_1, {&MODULE_P10, 9}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_1_P11_1_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_1, {&MODULE_P11, 1}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_1_P12_1_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_1, {&MODULE_P12, 1}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_1_P15_10_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_1, {&MODULE_P15,10}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_1_P21_1_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_1, {&MODULE_P21, 1}, (IfxGtm_ChXSel)13}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_1_P24_1_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_1, {&MODULE_P24, 1}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_1_P25_9_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_1, {&MODULE_P25, 9}, (IfxGtm_ChXSel)9}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_1_P30_1_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_1, {&MODULE_P30, 1}, (IfxGtm_ChXSel)10}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_1_P32_5_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_1, {&MODULE_P32, 5}, (IfxGtm_ChXSel)14}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_2_P00_11_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_2, {&MODULE_P00,11}, (IfxGtm_ChXSel)11}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_2_P01_9_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_2, {&MODULE_P01, 9}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_2_P02_13_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_2, {&MODULE_P02,13}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_2_P02_9_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_2, {&MODULE_P02, 9}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_2_P10_10_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_2, {&MODULE_P10,10}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_2_P10_6_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_2, {&MODULE_P10, 6}, (IfxGtm_ChXSel)13}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_2_P11_4_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_2, {&MODULE_P11, 4}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_2_P15_11_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_2, {&MODULE_P15,11}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_2_P21_6_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_2, {&MODULE_P21, 6}, (IfxGtm_ChXSel)12}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_2_P23_6_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_2, {&MODULE_P23, 6}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_2_P24_2_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_2, {&MODULE_P24, 2}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_2_P25_10_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_2, {&MODULE_P25,10}, (IfxGtm_ChXSel)9}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_2_P30_2_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_2, {&MODULE_P30, 2}, (IfxGtm_ChXSel)10}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_3_P00_12_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_3, {&MODULE_P00,12}, (IfxGtm_ChXSel)11}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_3_P01_13_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_3, {&MODULE_P01,13}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_3_P02_10_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_3, {&MODULE_P02,10}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_3_P02_14_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_3, {&MODULE_P02,14}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_3_P10_14_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_3, {&MODULE_P10,14}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_3_P10_5_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_3, {&MODULE_P10, 5}, (IfxGtm_ChXSel)13}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_3_P11_5_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_3, {&MODULE_P11, 5}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_3_P15_12_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_3, {&MODULE_P15,12}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_3_P21_7_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_3, {&MODULE_P21, 7}, (IfxGtm_ChXSel)12}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_3_P23_7_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_3, {&MODULE_P23, 7}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_3_P24_3_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_3, {&MODULE_P24, 3}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_3_P25_11_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_3, {&MODULE_P25,11}, (IfxGtm_ChXSel)9}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_3_P30_3_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_3, {&MODULE_P30, 3}, (IfxGtm_ChXSel)10}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_4_P01_0_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_4, {&MODULE_P01, 0}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_4_P01_8_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_4, {&MODULE_P01, 8}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_4_P02_11_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_4, {&MODULE_P02,11}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_4_P10_13_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_4, {&MODULE_P10,13}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_4_P10_1_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_4, {&MODULE_P10, 1}, (IfxGtm_ChXSel)12}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_4_P11_7_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_4, {&MODULE_P11, 7}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_4_P15_13_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_4, {&MODULE_P15,13}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_4_P20_1_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_4, {&MODULE_P20, 1}, (IfxGtm_ChXSel)11}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_4_P24_4_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_4, {&MODULE_P24, 4}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_4_P25_12_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_4, {&MODULE_P25,12}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_4_P30_4_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_4, {&MODULE_P30, 4}, (IfxGtm_ChXSel)9}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_4_P32_6_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_4, {&MODULE_P32, 6}, (IfxGtm_ChXSel)15}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_4_P33_10_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_4, {&MODULE_P33,10}, (IfxGtm_ChXSel)14}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_4_P33_4_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_4, {&MODULE_P33, 4}, (IfxGtm_ChXSel)10}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_5_P01_10_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_5, {&MODULE_P01,10}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_5_P01_2_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_5, {&MODULE_P01, 2}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_5_P01_3_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_5, {&MODULE_P01, 3}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_5_P10_11_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_5, {&MODULE_P10,11}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_5_P10_2_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_5, {&MODULE_P10, 2}, (IfxGtm_ChXSel)12}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_5_P11_8_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_5, {&MODULE_P11, 8}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_5_P15_14_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_5, {&MODULE_P15,14}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_5_P20_3_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_5, {&MODULE_P20, 3}, (IfxGtm_ChXSel)11}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_5_P24_5_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_5, {&MODULE_P24, 5}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_5_P25_13_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_5, {&MODULE_P25,13}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_5_P30_5_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_5, {&MODULE_P30, 5}, (IfxGtm_ChXSel)9}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_5_P33_14_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_5, {&MODULE_P33,14}, (IfxGtm_ChXSel)14}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_5_P33_5_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_5, {&MODULE_P33, 5}, (IfxGtm_ChXSel)10}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_6_P01_14_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_6, {&MODULE_P01,14}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_6_P01_15_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_6, {&MODULE_P01,15}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_6_P01_4_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_6, {&MODULE_P01, 4}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_6_P10_15_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_6, {&MODULE_P10,15}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_6_P10_3_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_6, {&MODULE_P10, 3}, (IfxGtm_ChXSel)10}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_6_P11_13_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_6, {&MODULE_P11,13}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_6_P15_15_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_6, {&MODULE_P15,15}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_6_P24_6_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_6, {&MODULE_P24, 6}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_6_P25_14_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_6, {&MODULE_P25,14}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_6_P30_6_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_6, {&MODULE_P30, 6}, (IfxGtm_ChXSel)9}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_6_P33_15_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_6, {&MODULE_P33,15}, (IfxGtm_ChXSel)12}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_7_P00_14_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_7, {&MODULE_P00,14}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_7_P01_11_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_7, {&MODULE_P01,11}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_7_P10_4_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_7, {&MODULE_P10, 4}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_7_P11_14_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_7, {&MODULE_P11,14}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_7_P11_15_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_7, {&MODULE_P11,15}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_7_P13_9_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_7, {&MODULE_P13, 9}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_7_P14_7_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_7, {&MODULE_P14, 7}, (IfxGtm_ChXSel)10}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_7_P24_7_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_7, {&MODULE_P24, 7}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_7_P25_15_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_7, {&MODULE_P25,15}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_7_P30_7_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_7, {&MODULE_P30, 7}, (IfxGtm_ChXSel)9}

IfxGtm_Tim_TinMap

IfxGtm_TIM4_7_P34_5_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_7, {&MODULE_P34, 5}, (IfxGtm_ChXSel)12}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_0_P00_13_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_0, {&MODULE_P00,13}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_0_P01_12_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_0, {&MODULE_P01,12}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_0_P01_8_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_0, {&MODULE_P01, 8}, (IfxGtm_ChXSel)10}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_0_P02_12_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_0, {&MODULE_P02,12}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_0_P13_11_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_0, {&MODULE_P13,11}, (IfxGtm_ChXSel)9}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_0_P22_8_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_0, {&MODULE_P22, 8}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_0_P24_8_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_0, {&MODULE_P24, 8}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_0_P30_8_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_0, {&MODULE_P30, 8}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_0_P31_8_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_0, {&MODULE_P31, 8}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_0_P33_14_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_0, {&MODULE_P33,14}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_1_P00_15_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_1, {&MODULE_P00,15}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_1_P01_1_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_1, {&MODULE_P01, 1}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_1_P01_9_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_1, {&MODULE_P01, 9}, (IfxGtm_ChXSel)11}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_1_P02_15_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_1, {&MODULE_P02,15}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_1_P13_10_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_1, {&MODULE_P13,10}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_1_P14_11_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_1, {&MODULE_P14,11}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_1_P22_9_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_1, {&MODULE_P22, 9}, (IfxGtm_ChXSel)10}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_1_P24_9_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_1, {&MODULE_P24, 9}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_1_P30_9_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_1, {&MODULE_P30, 9}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_1_P31_9_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_1, {&MODULE_P31, 9}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_1_P33_15_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_1, {&MODULE_P33,15}, (IfxGtm_ChXSel)9}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_2_P01_10_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_2, {&MODULE_P01,10}, (IfxGtm_ChXSel)9}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_2_P01_9_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_2, {&MODULE_P01, 9}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_2_P02_13_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_2, {&MODULE_P02,13}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_2_P13_14_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_2, {&MODULE_P13,14}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_2_P14_14_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_2, {&MODULE_P14,14}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_2_P22_10_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_2, {&MODULE_P22,10}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_2_P24_10_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_2, {&MODULE_P24,10}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_2_P30_10_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_2, {&MODULE_P30,10}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_2_P31_10_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_2, {&MODULE_P31,10}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_3_P01_11_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_3, {&MODULE_P01,11}, (IfxGtm_ChXSel)11}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_3_P01_13_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_3, {&MODULE_P01,13}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_3_P01_5_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_3, {&MODULE_P01, 5}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_3_P02_14_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_3, {&MODULE_P02,14}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_3_P13_4_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_3, {&MODULE_P13, 4}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_3_P14_13_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_3, {&MODULE_P14,13}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_3_P22_11_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_3, {&MODULE_P22,11}, (IfxGtm_ChXSel)10}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_3_P24_11_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_3, {&MODULE_P24,11}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_3_P30_11_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_3, {&MODULE_P30,11}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_3_P31_11_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_3, {&MODULE_P31,11}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_3_P34_1_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_3, {&MODULE_P34, 1}, (IfxGtm_ChXSel)9}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_4_P00_0_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_4, {&MODULE_P00, 0}, (IfxGtm_ChXSel)10}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_4_P01_0_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_4, {&MODULE_P01, 0}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_4_P01_8_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_4, {&MODULE_P01, 8}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_4_P13_5_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_4, {&MODULE_P13, 5}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_4_P14_12_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_4, {&MODULE_P14,12}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_4_P21_2_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_4, {&MODULE_P21, 2}, (IfxGtm_ChXSel)11}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_4_P24_12_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_4, {&MODULE_P24,12}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_4_P30_12_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_4, {&MODULE_P30,12}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_4_P31_12_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_4, {&MODULE_P31,12}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_4_P34_2_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_4, {&MODULE_P34, 2}, (IfxGtm_ChXSel)9}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_5_P00_1_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_5, {&MODULE_P00, 1}, (IfxGtm_ChXSel)11}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_5_P01_10_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_5, {&MODULE_P01,10}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_5_P01_2_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_5, {&MODULE_P01, 2}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_5_P01_6_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_5, {&MODULE_P01, 6}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_5_P13_13_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_5, {&MODULE_P13,13}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_5_P13_6_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_5, {&MODULE_P13, 6}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_5_P21_3_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_5, {&MODULE_P21, 3}, (IfxGtm_ChXSel)12}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_5_P24_13_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_5, {&MODULE_P24,13}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_5_P30_13_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_5, {&MODULE_P30,13}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_5_P31_13_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_5, {&MODULE_P31,13}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_5_P32_5_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_5, {&MODULE_P32, 5}, (IfxGtm_ChXSel)9}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_5_P34_3_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_5, {&MODULE_P34, 3}, (IfxGtm_ChXSel)10}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_6_P00_2_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_6, {&MODULE_P00, 2}, (IfxGtm_ChXSel)11}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_6_P01_14_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_6, {&MODULE_P01,14}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_6_P01_15_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_6, {&MODULE_P01,15}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_6_P01_6_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_6, {&MODULE_P01, 6}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_6_P13_7_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_6, {&MODULE_P13, 7}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_6_P14_15_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_6, {&MODULE_P14,15}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_6_P21_4_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_6, {&MODULE_P21, 4}, (IfxGtm_ChXSel)12}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_6_P24_14_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_6, {&MODULE_P24,14}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_6_P30_14_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_6, {&MODULE_P30,14}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_6_P31_14_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_6, {&MODULE_P31,14}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_6_P32_6_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_6, {&MODULE_P32, 6}, (IfxGtm_ChXSel)9}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_6_P34_4_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_6, {&MODULE_P34, 4}, (IfxGtm_ChXSel)10}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_7_P00_14_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_7, {&MODULE_P00,14}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_7_P00_3_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_7, {&MODULE_P00, 3}, (IfxGtm_ChXSel)10}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_7_P01_11_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_7, {&MODULE_P01,11}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_7_P01_7_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_7, {&MODULE_P01, 7}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_7_P13_15_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_7, {&MODULE_P13,15}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_7_P21_5_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_7, {&MODULE_P21, 5}, (IfxGtm_ChXSel)11}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_7_P24_15_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_7, {&MODULE_P24,15}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_7_P30_15_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_7, {&MODULE_P30,15}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_7_P31_15_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_7, {&MODULE_P31,15}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_7_P32_7_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_7, {&MODULE_P32, 7}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM5_7_P34_5_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_7, {&MODULE_P34, 5}, (IfxGtm_ChXSel)9}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_0_P01_12_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_0, {&MODULE_P01,12}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_0_P10_9_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_0, {&MODULE_P10, 9}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_0_P13_4_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_0, {&MODULE_P13, 4}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_0_P20_6_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_0, {&MODULE_P20, 6}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_0_P23_7_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_0, {&MODULE_P23, 7}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_0_P24_0_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_0, {&MODULE_P24, 0}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_0_P25_0_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_0, {&MODULE_P25, 0}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_0_P30_8_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_0, {&MODULE_P30, 8}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_0_P31_8_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_0, {&MODULE_P31, 8}, (IfxGtm_ChXSel)9}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_1_P01_13_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_1, {&MODULE_P01,13}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_1_P10_10_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_1, {&MODULE_P10,10}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_1_P13_5_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_1, {&MODULE_P13, 5}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_1_P20_7_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_1, {&MODULE_P20, 7}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_1_P23_6_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_1, {&MODULE_P23, 6}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_1_P24_1_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_1, {&MODULE_P24, 1}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_1_P25_1_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_1, {&MODULE_P25, 1}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_1_P30_9_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_1, {&MODULE_P30, 9}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_1_P31_9_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_1, {&MODULE_P31, 9}, (IfxGtm_ChXSel)9}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_2_P01_14_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_2, {&MODULE_P01,14}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_2_P10_11_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_2, {&MODULE_P10,11}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_2_P13_6_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_2, {&MODULE_P13, 6}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_2_P20_8_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_2, {&MODULE_P20, 8}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_2_P23_5_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_2, {&MODULE_P23, 5}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_2_P24_2_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_2, {&MODULE_P24, 2}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_2_P25_2_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_2, {&MODULE_P25, 2}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_2_P30_10_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_2, {&MODULE_P30,10}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_2_P31_10_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_2, {&MODULE_P31,10}, (IfxGtm_ChXSel)9}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_3_P01_15_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_3, {&MODULE_P01,15}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_3_P10_13_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_3, {&MODULE_P10,13}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_3_P13_7_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_3, {&MODULE_P13, 7}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_3_P20_9_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_3, {&MODULE_P20, 9}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_3_P23_4_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_3, {&MODULE_P23, 4}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_3_P24_3_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_3, {&MODULE_P24, 3}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_3_P25_3_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_3, {&MODULE_P25, 3}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_3_P30_11_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_3, {&MODULE_P30,11}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_3_P31_11_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_3, {&MODULE_P31,11}, (IfxGtm_ChXSel)9}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_4_P00_4_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_4, {&MODULE_P00, 4}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_4_P13_9_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_4, {&MODULE_P13, 9}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_4_P14_12_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_4, {&MODULE_P14,12}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_4_P23_3_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_4, {&MODULE_P23, 3}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_4_P24_4_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_4, {&MODULE_P24, 4}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_4_P25_4_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_4, {&MODULE_P25, 4}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_4_P30_12_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_4, {&MODULE_P30,12}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_4_P31_12_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_4, {&MODULE_P31,12}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_5_P00_13_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_5, {&MODULE_P00,13}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_5_P13_10_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_5, {&MODULE_P13,10}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_5_P14_13_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_5, {&MODULE_P14,13}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_5_P23_2_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_5, {&MODULE_P23, 2}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_5_P24_5_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_5, {&MODULE_P24, 5}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_5_P25_5_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_5, {&MODULE_P25, 5}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_5_P30_13_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_5, {&MODULE_P30,13}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_5_P31_13_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_5, {&MODULE_P31,13}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_6_P00_14_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_6, {&MODULE_P00,14}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_6_P13_11_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_6, {&MODULE_P13,11}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_6_P14_14_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_6, {&MODULE_P14,14}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_6_P23_1_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_6, {&MODULE_P23, 1}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_6_P24_6_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_6, {&MODULE_P24, 6}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_6_P25_6_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_6, {&MODULE_P25, 6}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_6_P26_0_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_6, {&MODULE_P26, 0}, (IfxGtm_ChXSel)9}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_6_P30_14_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_6, {&MODULE_P30,14}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_6_P31_14_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_6, {&MODULE_P31,14}, (IfxGtm_ChXSel)8}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_7_P00_15_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_7, {&MODULE_P00,15}, (IfxGtm_ChXSel)2}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_7_P13_12_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_7, {&MODULE_P13,12}, (IfxGtm_ChXSel)4}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_7_P14_15_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_7, {&MODULE_P14,15}, (IfxGtm_ChXSel)3}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_7_P23_0_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_7, {&MODULE_P23, 0}, (IfxGtm_ChXSel)1}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_7_P24_7_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_7, {&MODULE_P24, 7}, (IfxGtm_ChXSel)5}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_7_P25_7_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_7, {&MODULE_P25, 7}, (IfxGtm_ChXSel)6}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_7_P30_15_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_7, {&MODULE_P30,15}, (IfxGtm_ChXSel)7}

IfxGtm_Tim_TinMap

IfxGtm_TIM6_7_P31_15_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_7, {&MODULE_P31,15}, (IfxGtm_ChXSel)8}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_0N_TOUT106_P10_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_0N_TOUT17_P00_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_0N_TOUT25_P33_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 25, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_0N_TOUT34_P33_12_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 34, {&MODULE_P33,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_0N_TOUT51_P21_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_f, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_0N_TOUT61_P20_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_f, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_0N_TOUT72_P15_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_0N_TOUT7_P02_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_0N_TOUT91_P13_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_0N_TOUT9_P00_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_0_TOUT0_P02_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_0_TOUT109_P10_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_0_TOUT151_P02_12_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_g, 151, {&MODULE_P02,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_0_TOUT18_P00_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 18, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_0_TOUT26_P33_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_0_TOUT32_P33_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_0_TOUT53_P21_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_0_TOUT76_P15_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_0_TOUT77_P15_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_0_TOUT85_P14_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 85, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_0_TOUT87_P14_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_10_TOUT12_P00_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_10_TOUT2_P02_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_10_TOUT41_P23_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_10_TOUT46_P23_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 46, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_10_TOUT96_P11_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_11_TOUT13_P00_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_11_TOUT3_P02_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_11_TOUT43_P23_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 43, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_11_TOUT49_P22_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 49, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_11_TOUT97_P11_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_12_TOUT14_P00_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_12_TOUT44_P23_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 44, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_12_TOUT4_P02_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_12_TOUT50_P22_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_12_TOUT98_P11_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_13_TOUT15_P00_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_13_TOUT5_P02_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_13_TOUT99_P11_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_14_TOUT100_P11_11_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_14_TOUT16_P00_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_14_TOUT6_P02_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_15_TOUT101_P11_12_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_15_TOUT17_P00_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_15_TOUT42_P23_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_b, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_15_TOUT7_P02_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_1N_TOUT107_P10_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_1N_TOUT10_P00_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_1N_TOUT14_P00_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_1N_TOUT22_P33_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 22, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_1N_TOUT30_P33_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_1N_TOUT35_P33_13_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 35, {&MODULE_P33,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_1N_TOUT39_P32_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_g, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_1N_TOUT4_P02_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_1N_TOUT52_P21_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_f, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_1N_TOUT57_P21_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_1N_TOUT73_P15_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_1N_TOUT90_P14_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_1N_TOUT92_P13_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_1_TOUT103_P10_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 103, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_1_TOUT116_P02_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_g, 116, {&MODULE_P02, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_1_TOUT19_P00_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 19, {&MODULE_P00,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_1_TOUT1_P02_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_1_TOUT27_P33_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_1_TOUT31_P33_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_1_TOUT54_P21_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_1_TOUT78_P15_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_1_TOUT86_P14_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_2N_TOUT108_P10_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_2N_TOUT11_P00_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_2N_TOUT143_P33_14_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_g, 143, {&MODULE_P33,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_2N_TOUT15_P00_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_2N_TOUT23_P33_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_2N_TOUT40_P32_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_g, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_2N_TOUT58_P21_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 58, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_2N_TOUT5_P02_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_2N_TOUT74_P15_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_2N_TOUT93_P13_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_2_TOUT104_P10_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 104, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_2_TOUT107_P10_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_2_TOUT117_P02_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_g, 117, {&MODULE_P02,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_2_TOUT20_P00_11_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 20, {&MODULE_P00,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_2_TOUT28_P33_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_2_TOUT2_P02_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_2_TOUT33_P33_11_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 33, {&MODULE_P33,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_2_TOUT55_P21_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_2_TOUT79_P15_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_2_TOUT88_P14_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 88, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_3N_TOUT109_P10_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_3N_TOUT12_P00_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_3N_TOUT144_P33_15_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_g, 144, {&MODULE_P33,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_3N_TOUT16_P00_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_3N_TOUT24_P33_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_3N_TOUT42_P23_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_g, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_3N_TOUT59_P20_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_3N_TOUT60_P20_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 60, {&MODULE_P20, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_3N_TOUT6_P02_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_3N_TOUT75_P15_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 75, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_3N_TOUT94_P13_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_3_TOUT105_P10_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 105, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_3_TOUT108_P10_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_3_TOUT118_P02_11_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_g, 118, {&MODULE_P02,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_3_TOUT21_P00_12_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 21, {&MODULE_P00,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_3_TOUT29_P33_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_3_TOUT38_P32_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 38, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_3_TOUT3_P02_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_3_TOUT56_P21_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_3_TOUT71_P15_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_3_TOUT80_P14_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 80, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_3_TOUT89_P14_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 89, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4N_TOUT10_P00_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_g, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4N_TOUT143_P33_14_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_e, 143, {&MODULE_P33,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4N_TOUT147_P34_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_e, 147, {&MODULE_P34, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4N_TOUT1_P02_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_g, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4N_TOUT29_P33_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_e, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4N_TOUT36_P32_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_e, 36, {&MODULE_P32, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4N_TOUT54_P21_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_g, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4N_TOUT56_P21_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_e, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4N_TOUT65_P20_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4N_TOUT73_P15_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_g, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4N_TOUT89_P14_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_e, 89, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4N_TOUT8_P02_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_g, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4N_TOUT95_P11_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4N_TOUT96_P11_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_g, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4_TOUT0_P02_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_g, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4_TOUT102_P10_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 102, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4_TOUT124_P11_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 124, {&MODULE_P11, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4_TOUT22_P33_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 22, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4_TOUT30_P33_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4_TOUT37_P32_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_e, 37, {&MODULE_P32, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4_TOUT39_P32_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4_TOUT53_P21_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_g, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4_TOUT57_P21_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4_TOUT64_P20_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4_TOUT72_P15_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_g, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4_TOUT81_P14_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 81, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4_TOUT90_P14_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4_TOUT94_P13_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_g, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_4_TOUT9_P00_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_g, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5N_TOUT121_P11_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_g, 121, {&MODULE_P11, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5N_TOUT12_P00_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_g, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5N_TOUT144_P33_15_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_e, 144, {&MODULE_P33,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5N_TOUT148_P34_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_e, 148, {&MODULE_P34, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5N_TOUT26_P33_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_e, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5N_TOUT28_P33_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_g, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5N_TOUT32_P33_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_e, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5N_TOUT37_P32_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_g, 37, {&MODULE_P32, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5N_TOUT3_P02_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_g, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5N_TOUT53_P21_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_e, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5N_TOUT56_P21_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_g, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5N_TOUT67_P20_11_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 67, {&MODULE_P20,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5N_TOUT76_P15_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_g, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5N_TOUT77_P15_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5N_TOUT87_P14_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_e, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5N_TOUT97_P11_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5_TOUT110_P10_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 110, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5_TOUT11_P00_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_g, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5_TOUT128_P12_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_g, 128, {&MODULE_P12, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5_TOUT23_P33_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5_TOUT27_P33_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_g, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5_TOUT2_P02_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_g, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5_TOUT40_P32_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5_TOUT55_P21_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_g, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5_TOUT58_P21_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 58, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5_TOUT66_P20_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 66, {&MODULE_P20,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5_TOUT74_P15_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_g, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5_TOUT82_P14_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 82, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5_TOUT91_P13_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_5_TOUT96_P11_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6N_TOUT149_P34_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_e, 149, {&MODULE_P34, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6N_TOUT14_P00_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_g, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6N_TOUT27_P33_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_e, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6N_TOUT30_P33_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_g, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6N_TOUT31_P33_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_e, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6N_TOUT38_P32_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_e, 38, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6N_TOUT40_P32_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_e, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6N_TOUT49_P22_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_g, 49, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6N_TOUT54_P21_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_e, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6N_TOUT5_P02_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_g, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6N_TOUT69_P20_13_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 69, {&MODULE_P20,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6N_TOUT78_P15_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6N_TOUT82_P14_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_e, 82, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6N_TOUT86_P14_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_e, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6N_TOUT91_P13_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_g, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6N_TOUT97_P11_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_g, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6N_TOUT99_P11_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6_TOUT106_P10_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6_TOUT129_P12_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_g, 129, {&MODULE_P12, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6_TOUT13_P00_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_g, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6_TOUT24_P33_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6_TOUT29_P33_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_g, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6_TOUT42_P23_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6_TOUT48_P22_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_g, 48, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6_TOUT4_P02_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_g, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6_TOUT59_P20_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6_TOUT68_P20_12_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 68, {&MODULE_P20,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6_TOUT80_P14_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_e, 80, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6_TOUT83_P14_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 83, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6_TOUT92_P13_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_6_TOUT98_P11_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7N_TOUT100_P11_11_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7N_TOUT123_P11_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 123, {&MODULE_P11, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7N_TOUT130_P22_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 130, {&MODULE_P22, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7N_TOUT150_P34_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_e, 150, {&MODULE_P34, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7N_TOUT16_P00_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7N_TOUT28_P33_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_e, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7N_TOUT32_P33_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7N_TOUT33_P33_11_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_e, 33, {&MODULE_P33,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7N_TOUT39_P32_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_e, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7N_TOUT42_P23_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_e, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7N_TOUT55_P21_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_e, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7N_TOUT71_P15_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7N_TOUT79_P15_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7N_TOUT7_P02_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7N_TOUT84_P14_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_e, 84, {&MODULE_P14, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7N_TOUT88_P14_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_e, 88, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7N_TOUT93_P13_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7_TOUT101_P11_12_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7_TOUT119_P11_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 119, {&MODULE_P11, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7_TOUT15_P00_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7_TOUT25_P33_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 25, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7_TOUT31_P33_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7_TOUT45_P23_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 45, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7_TOUT50_P22_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7_TOUT6_P02_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7_TOUT70_P20_14_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 70, {&MODULE_P20,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7_TOUT81_P14_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_e, 81, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7_TOUT84_P14_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 84, {&MODULE_P14, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7_TOUT92_P13_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_7_TOUT93_P13_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_8_TOUT0_P02_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_8_TOUT48_P22_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 48, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_8_TOUT51_P21_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_8_TOUT8_P02_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_8_TOUT94_P13_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_8_TOUT95_P11_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_8_TOUT9_P00_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_9_TOUT10_P00_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_9_TOUT11_P00_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_9_TOUT1_P02_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_9_TOUT47_P22_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 47, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM0_9_TOUT52_P21_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_0N_TOUT17_P00_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_f, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_0N_TOUT25_P33_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_f, 25, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_0N_TOUT34_P33_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_f, 34, {&MODULE_P33,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_0N_TOUT75_P15_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_f, 75, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_0N_TOUT7_P02_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_f, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_0_TOUT0_P02_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_f, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_0_TOUT18_P00_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 18, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_0_TOUT26_P33_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_0_TOUT32_P33_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_0_TOUT68_P20_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 68, {&MODULE_P20,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_0_TOUT76_P15_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_0_TOUT77_P15_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_0_TOUT85_P14_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 85, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_0_TOUT8_P02_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_0_TOUT9_P00_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_10_TOUT143_P33_14_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 143, {&MODULE_P33,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_10_TOUT266_P10_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 266, {&MODULE_P10,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_10_TOUT2_P02_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_10_TOUT62_P20_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 62, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_11_TOUT144_P33_15_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 144, {&MODULE_P33,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_11_TOUT267_P10_14_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 267, {&MODULE_P10,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_11_TOUT3_P02_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_11_TOUT60_P20_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 60, {&MODULE_P20, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_11_TOUT63_P20_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 63, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_12_TOUT268_P10_13_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 268, {&MODULE_P10,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_12_TOUT34_P33_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 34, {&MODULE_P33,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_12_TOUT4_P02_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_b, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_12_TOUT61_P20_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_13_TOUT146_P34_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 146, {&MODULE_P34, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_13_TOUT269_P10_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 269, {&MODULE_P10,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_13_TOUT35_P33_13_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 35, {&MODULE_P33,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_13_TOUT5_P02_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_13_TOUT65_P20_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_14_TOUT147_P34_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 147, {&MODULE_P34, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_14_TOUT270_P10_15_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 270, {&MODULE_P10,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_14_TOUT36_P32_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 36, {&MODULE_P32, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_14_TOUT66_P20_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 66, {&MODULE_P20,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_14_TOUT6_P02_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_15_TOUT148_P34_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 148, {&MODULE_P34, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_15_TOUT150_P34_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 150, {&MODULE_P34, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_15_TOUT37_P32_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 37, {&MODULE_P32, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_15_TOUT67_P20_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 67, {&MODULE_P20,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_15_TOUT7_P02_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_b, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_1N_TOUT14_P00_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_f, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_1N_TOUT22_P33_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_f, 22, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_1N_TOUT245_P15_13_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_g, 245, {&MODULE_P15,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_1N_TOUT30_P33_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_f, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_1N_TOUT35_P33_13_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_f, 35, {&MODULE_P33,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_1N_TOUT39_P32_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_h, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_1N_TOUT4_P02_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_f, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_1N_TOUT72_P15_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_f, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_1_TOUT10_P00_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_1_TOUT116_P02_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 116, {&MODULE_P02, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_1_TOUT11_P00_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_1_TOUT19_P00_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 19, {&MODULE_P00,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_1_TOUT1_P02_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_f, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_1_TOUT242_P15_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 242, {&MODULE_P15,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_1_TOUT27_P33_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_1_TOUT31_P33_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_1_TOUT69_P20_13_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 69, {&MODULE_P20,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_1_TOUT78_P15_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_1_TOUT86_P14_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_2N_TOUT143_P33_14_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_h, 143, {&MODULE_P33,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_2N_TOUT15_P00_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_f, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_2N_TOUT23_P33_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_f, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_2N_TOUT246_P15_14_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_g, 246, {&MODULE_P15,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_2N_TOUT40_P32_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_h, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_2N_TOUT41_P23_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_f, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_2N_TOUT5_P02_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_f, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_2N_TOUT73_P15_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_f, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_2_TOUT117_P02_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 117, {&MODULE_P02,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_2_TOUT12_P00_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_2_TOUT20_P00_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 20, {&MODULE_P00,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_2_TOUT243_P15_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 243, {&MODULE_P15,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_2_TOUT28_P33_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_2_TOUT2_P02_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_f, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_2_TOUT33_P33_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 33, {&MODULE_P33,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_2_TOUT70_P20_14_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 70, {&MODULE_P20,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_2_TOUT79_P15_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_3N_TOUT144_P33_15_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_h, 144, {&MODULE_P33,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_3N_TOUT16_P00_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_f, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_3N_TOUT247_P15_15_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_g, 247, {&MODULE_P15,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_3N_TOUT24_P33_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_f, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_3N_TOUT43_P23_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_g, 43, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_3N_TOUT6_P02_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_f, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_3N_TOUT74_P15_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_f, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_3_TOUT118_P02_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 118, {&MODULE_P02,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_3_TOUT13_P00_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_3_TOUT21_P00_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 21, {&MODULE_P00,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_3_TOUT244_P15_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 244, {&MODULE_P15,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_3_TOUT29_P33_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_3_TOUT38_P32_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 38, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_3_TOUT3_P02_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_f, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_3_TOUT71_P15_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_3_TOUT80_P14_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 80, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4N_TOUT10_P00_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_h, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4N_TOUT13_P00_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4N_TOUT143_P33_14_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 143, {&MODULE_P33,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4N_TOUT147_P34_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 147, {&MODULE_P34, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4N_TOUT1_P02_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_h, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4N_TOUT21_P00_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 21, {&MODULE_P00,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4N_TOUT244_P15_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_g, 244, {&MODULE_P15,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4N_TOUT29_P33_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4N_TOUT36_P32_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 36, {&MODULE_P32, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4N_TOUT54_P21_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_h, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4N_TOUT65_P20_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_g, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4N_TOUT71_P15_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4N_TOUT73_P15_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_h, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4N_TOUT8_P02_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_h, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4N_TOUT95_P11_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_h, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4_TOUT0_P02_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_h, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4_TOUT124_P11_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_h, 124, {&MODULE_P11, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4_TOUT14_P00_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4_TOUT22_P33_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 22, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4_TOUT245_P15_13_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 245, {&MODULE_P15,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4_TOUT30_P33_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4_TOUT37_P32_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 37, {&MODULE_P32, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4_TOUT39_P32_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4_TOUT53_P21_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_h, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4_TOUT64_P20_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_g, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4_TOUT72_P15_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4_TOUT81_P14_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 81, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4_TOUT94_P13_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_h, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_4_TOUT9_P00_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_h, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5N_TOUT12_P00_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_h, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5N_TOUT144_P33_15_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 144, {&MODULE_P33,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5N_TOUT148_P34_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 148, {&MODULE_P34, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5N_TOUT18_P00_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 18, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5N_TOUT26_P33_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5N_TOUT28_P33_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_h, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5N_TOUT32_P33_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5N_TOUT37_P32_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_h, 37, {&MODULE_P32, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5N_TOUT3_P02_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_h, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5N_TOUT56_P21_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_h, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5N_TOUT67_P20_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_g, 67, {&MODULE_P20,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5N_TOUT76_P15_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_h, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5N_TOUT77_P15_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_g, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5N_TOUT97_P11_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_h, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5N_TOUT9_P00_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5_TOUT11_P00_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_h, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5_TOUT15_P00_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5_TOUT23_P33_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5_TOUT246_P15_14_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 246, {&MODULE_P15,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5_TOUT27_P33_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_h, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5_TOUT2_P02_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_h, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5_TOUT40_P32_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5_TOUT41_P23_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5_TOUT55_P21_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_h, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5_TOUT66_P20_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_g, 66, {&MODULE_P20,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5_TOUT73_P15_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5_TOUT74_P15_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_h, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5_TOUT82_P14_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 82, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_5_TOUT96_P11_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_h, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6N_TOUT10_P00_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6N_TOUT11_P00_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6N_TOUT149_P34_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 149, {&MODULE_P34, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6N_TOUT14_P00_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_h, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6N_TOUT19_P00_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 19, {&MODULE_P00,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6N_TOUT242_P15_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_g, 242, {&MODULE_P15,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6N_TOUT27_P33_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6N_TOUT30_P33_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_h, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6N_TOUT31_P33_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6N_TOUT38_P32_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 38, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6N_TOUT40_P32_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6N_TOUT49_P22_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_h, 49, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6N_TOUT5_P02_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_h, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6N_TOUT69_P20_13_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_g, 69, {&MODULE_P20,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6N_TOUT78_P15_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_g, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6N_TOUT82_P14_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 82, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6N_TOUT91_P13_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_h, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6N_TOUT99_P11_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_h, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6_TOUT13_P00_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_h, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6_TOUT16_P00_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6_TOUT247_P15_15_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 247, {&MODULE_P15,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6_TOUT24_P33_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6_TOUT29_P33_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_h, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6_TOUT43_P23_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 43, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6_TOUT48_P22_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_h, 48, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6_TOUT4_P02_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_h, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6_TOUT68_P20_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_g, 68, {&MODULE_P20,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6_TOUT74_P15_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6_TOUT80_P14_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 80, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6_TOUT83_P14_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 83, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_6_TOUT98_P11_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_h, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7N_TOUT100_P11_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_h, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7N_TOUT12_P00_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7N_TOUT130_P22_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_h, 130, {&MODULE_P22, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7N_TOUT150_P34_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 150, {&MODULE_P34, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7N_TOUT16_P00_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_h, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7N_TOUT20_P00_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 20, {&MODULE_P00,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7N_TOUT243_P15_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 243, {&MODULE_P15,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7N_TOUT28_P33_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7N_TOUT32_P33_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_h, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7N_TOUT33_P33_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 33, {&MODULE_P33,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7N_TOUT39_P32_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7N_TOUT42_P23_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7N_TOUT71_P15_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_h, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7N_TOUT79_P15_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7N_TOUT7_P02_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_h, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7N_TOUT84_P14_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 84, {&MODULE_P14, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7N_TOUT93_P13_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_h, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7_TOUT101_P11_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_h, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7_TOUT15_P00_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_h, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7_TOUT17_P00_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7_TOUT248_P13_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 248, {&MODULE_P13, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7_TOUT25_P33_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 25, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7_TOUT31_P33_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_h, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7_TOUT44_P23_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 44, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7_TOUT45_P23_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 45, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7_TOUT50_P22_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_h, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7_TOUT64_P20_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7_TOUT6_P02_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_h, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7_TOUT70_P20_14_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 70, {&MODULE_P20,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7_TOUT75_P15_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 75, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7_TOUT81_P14_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 81, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7_TOUT84_P14_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 84, {&MODULE_P14, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_7_TOUT92_P13_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_h, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_8_TOUT0_P02_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_b, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_8_TOUT128_P12_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 128, {&MODULE_P12, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_8_TOUT141_P32_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 141, {&MODULE_P32, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_8_TOUT249_P13_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 249, {&MODULE_P13,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_9_TOUT129_P12_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 129, {&MODULE_P12, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_9_TOUT142_P32_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 142, {&MODULE_P32, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_9_TOUT1_P02_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_b, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM1_9_TOUT265_P10_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 265, {&MODULE_P10, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_0N_TOUT101_P11_12_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_0N_TOUT126_P11_14_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_g, 126, {&MODULE_P11,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_0N_TOUT264_P13_15_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 264, {&MODULE_P13,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_0N_TOUT43_P23_2_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 43, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_0N_TOUT51_P21_0_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_0N_TOUT61_P20_3_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_0N_TOUT76_P15_5_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_0N_TOUT91_P13_0_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_f, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_0_TOUT119_P11_0_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 119, {&MODULE_P11, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_0_TOUT120_P11_1_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_g, 120, {&MODULE_P11, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_0_TOUT250_P13_11_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 250, {&MODULE_P13,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_0_TOUT48_P22_1_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 48, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_0_TOUT53_P21_2_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_0_TOUT65_P20_9_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_0_TOUT87_P14_7_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_0_TOUT94_P13_3_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_0_TOUT95_P11_2_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_g, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_10_TOUT104_P10_2_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 104, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_10_TOUT107_P10_5_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_10_TOUT133_P22_7_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 133, {&MODULE_P22, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_10_TOUT260_P14_13_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 260, {&MODULE_P14,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_10_TOUT62_P20_6_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 62, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_10_TOUT70_P20_14_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 70, {&MODULE_P20,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_11_TOUT105_P10_3_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 105, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_11_TOUT108_P10_6_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_11_TOUT134_P22_8_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 134, {&MODULE_P22, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_11_TOUT261_P14_12_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 261, {&MODULE_P14,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_11_TOUT63_P20_7_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 63, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_11_TOUT71_P15_0_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_12_TOUT102_P10_0_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_b, 102, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_12_TOUT135_P22_9_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 135, {&MODULE_P22, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_12_TOUT262_P13_13_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 262, {&MODULE_P13,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_12_TOUT34_P33_12_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_b, 34, {&MODULE_P33,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_12_TOUT72_P15_1_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_b, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_13_TOUT110_P10_8_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 110, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_13_TOUT136_P22_10_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 136, {&MODULE_P22,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_13_TOUT263_P14_15_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 263, {&MODULE_P14,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_13_TOUT35_P33_13_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 35, {&MODULE_P33,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_13_TOUT65_P20_9_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_13_TOUT73_P15_2_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_14_TOUT137_P22_11_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 137, {&MODULE_P22,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_14_TOUT264_P13_15_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 264, {&MODULE_P13,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_14_TOUT36_P32_0_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 36, {&MODULE_P32, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_14_TOUT66_P20_10_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 66, {&MODULE_P20,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_14_TOUT74_P15_3_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_15_TOUT149_P34_4_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 149, {&MODULE_P34, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_15_TOUT37_P32_1_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_b, 37, {&MODULE_P32, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_15_TOUT67_P20_11_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_b, 67, {&MODULE_P20,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_15_TOUT75_P15_4_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_b, 75, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_1N_TOUT123_P11_7_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 123, {&MODULE_P11, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_1N_TOUT124_P11_8_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_g, 124, {&MODULE_P11, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_1N_TOUT254_P13_5_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 254, {&MODULE_P13, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_1N_TOUT44_P23_3_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 44, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_1N_TOUT50_P22_3_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_f, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_1N_TOUT52_P21_1_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_1N_TOUT57_P21_6_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_f, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_1N_TOUT61_P20_3_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_g, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_1N_TOUT79_P15_8_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_1N_TOUT90_P14_10_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_f, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_1N_TOUT92_P13_1_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_f, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_1N_TOUT98_P11_9_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_1_TOUT120_P11_1_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 120, {&MODULE_P11, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_1_TOUT127_P11_15_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 127, {&MODULE_P11,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_1_TOUT251_P13_10_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 251, {&MODULE_P13,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_1_TOUT47_P22_0_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 47, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_1_TOUT54_P21_3_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_1_TOUT64_P20_8_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_1_TOUT95_P11_2_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_2N_TOUT124_P11_8_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 124, {&MODULE_P11, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_2N_TOUT255_P13_6_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 255, {&MODULE_P13, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_2N_TOUT46_P23_5_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 46, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_2N_TOUT58_P21_7_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_f, 58, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_2N_TOUT78_P15_7_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_2N_TOUT93_P13_2_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_f, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_2N_TOUT99_P11_10_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_2_TOUT121_P11_4_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 121, {&MODULE_P11, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_2_TOUT125_P11_13_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 125, {&MODULE_P11,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_2_TOUT252_P13_14_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 252, {&MODULE_P13,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_2_TOUT46_P23_5_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 46, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_2_TOUT50_P22_3_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_2_TOUT55_P21_4_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_2_TOUT63_P20_7_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 63, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_2_TOUT88_P14_8_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 88, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_2_TOUT96_P11_3_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_3N_TOUT100_P11_11_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_3N_TOUT106_P10_4_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_g, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_3N_TOUT122_P11_5_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_f, 122, {&MODULE_P11, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_3N_TOUT256_P13_7_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 256, {&MODULE_P13, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_3N_TOUT45_P23_4_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 45, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_3N_TOUT59_P20_0_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_f, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_3N_TOUT77_P15_6_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_3_TOUT122_P11_5_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 122, {&MODULE_P11, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_3_TOUT126_P11_14_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 126, {&MODULE_P11,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_3_TOUT253_P13_4_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 253, {&MODULE_P13, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_3_TOUT49_P22_2_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 49, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_3_TOUT56_P21_5_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_3_TOUT60_P20_1_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 60, {&MODULE_P20, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_3_TOUT62_P20_6_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 62, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_3_TOUT89_P14_9_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 89, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_3_TOUT97_P11_6_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_4N_TOUT106_P10_4_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_4N_TOUT120_P11_1_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 120, {&MODULE_P11, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_4N_TOUT122_P11_5_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_e, 122, {&MODULE_P11, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_4N_TOUT126_P11_14_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 126, {&MODULE_P11,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_4N_TOUT137_P22_11_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_e, 137, {&MODULE_P22,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_4N_TOUT253_P13_4_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_e, 253, {&MODULE_P13, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_4N_TOUT56_P21_5_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_4N_TOUT60_P20_1_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 60, {&MODULE_P20, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_4N_TOUT89_P14_9_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 89, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_4N_TOUT97_P11_6_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_e, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_4_TOUT102_P10_0_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 102, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_4_TOUT123_P11_7_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 123, {&MODULE_P11, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_4_TOUT133_P22_7_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_e, 133, {&MODULE_P22, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_4_TOUT254_P13_5_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 254, {&MODULE_P13, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_4_TOUT50_P22_3_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_4_TOUT57_P21_6_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_4_TOUT61_P20_3_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_4_TOUT90_P14_10_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_4_TOUT98_P11_9_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_5N_TOUT107_P10_5_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_5N_TOUT119_P11_0_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_e, 119, {&MODULE_P11, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_5N_TOUT136_P22_10_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_e, 136, {&MODULE_P22,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_5N_TOUT250_P13_11_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_e, 250, {&MODULE_P13,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_5N_TOUT53_P21_2_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_5N_TOUT87_P14_7_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_5N_TOUT94_P13_3_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_5_TOUT103_P10_1_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 103, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_5_TOUT124_P11_8_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 124, {&MODULE_P11, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_5_TOUT132_P22_6_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_e, 132, {&MODULE_P22, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_5_TOUT255_P13_6_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 255, {&MODULE_P13, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_5_TOUT58_P21_7_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 58, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_5_TOUT91_P13_0_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_5_TOUT99_P11_10_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_6N_TOUT108_P10_6_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_6N_TOUT120_P11_1_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_e, 120, {&MODULE_P11, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_6N_TOUT122_P11_5_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_g, 122, {&MODULE_P11, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_6N_TOUT135_P22_9_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_e, 135, {&MODULE_P22, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_6N_TOUT251_P13_10_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_e, 251, {&MODULE_P13,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_6N_TOUT54_P21_3_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_6N_TOUT86_P14_6_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_6N_TOUT95_P11_2_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_e, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_6_TOUT100_P11_11_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_6_TOUT104_P10_2_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 104, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_6_TOUT106_P10_4_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_6_TOUT125_P11_13_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 125, {&MODULE_P11,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_6_TOUT131_P22_5_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_e, 131, {&MODULE_P22, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_6_TOUT256_P13_7_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 256, {&MODULE_P13, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_6_TOUT59_P20_0_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_6_TOUT92_P13_1_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_7N_TOUT109_P10_7_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_7N_TOUT121_P11_4_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_e, 121, {&MODULE_P11, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_7N_TOUT134_P22_8_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_e, 134, {&MODULE_P22, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_7N_TOUT252_P13_14_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_e, 252, {&MODULE_P13,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_7N_TOUT55_P21_4_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_7N_TOUT88_P14_8_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 88, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_7N_TOUT96_P11_3_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_e, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_7N_TOUT98_P11_9_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_7_TOUT101_P11_12_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_7_TOUT105_P10_3_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 105, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_7_TOUT126_P11_14_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 126, {&MODULE_P11,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_7_TOUT130_P22_4_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 130, {&MODULE_P22, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_7_TOUT264_P13_15_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 264, {&MODULE_P13,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_7_TOUT64_P20_8_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_7_TOUT93_P13_2_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_8_TOUT109_P10_7_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_b, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_8_TOUT127_P11_15_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 127, {&MODULE_P11,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_8_TOUT131_P22_5_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 131, {&MODULE_P22, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_8_TOUT258_P14_11_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 258, {&MODULE_P14,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_8_TOUT51_P21_0_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_b, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_8_TOUT68_P20_12_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_b, 68, {&MODULE_P20,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_9_TOUT103_P10_1_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_b, 103, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_9_TOUT132_P22_6_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 132, {&MODULE_P22, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_9_TOUT259_P14_14_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 259, {&MODULE_P14,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_9_TOUT52_P21_1_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_b, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM2_9_TOUT69_P20_13_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_b, 69, {&MODULE_P20,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_0N_TOUT134_P22_8_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_g, 134, {&MODULE_P22, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_0N_TOUT161_P01_13_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 161, {&MODULE_P01,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_0N_TOUT181_P31_7_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 181, {&MODULE_P31, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_0N_TOUT213_P25_7_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 213, {&MODULE_P25, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_0N_TOUT8_P02_8_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_f, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_0_TOUT110_P10_8_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 110, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_0_TOUT115_P01_7_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_f, 115, {&MODULE_P01, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_0_TOUT130_P22_4_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_f, 130, {&MODULE_P22, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_0_TOUT155_P01_0_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 155, {&MODULE_P01, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_0_TOUT162_P01_8_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 162, {&MODULE_P01, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_0_TOUT174_P31_0_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 174, {&MODULE_P31, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_0_TOUT206_P25_0_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 206, {&MODULE_P25, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_10_TOUT164_P01_14_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 164, {&MODULE_P01,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_10_TOUT184_P31_10_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 184, {&MODULE_P31,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_10_TOUT188_P31_14_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_e, 188, {&MODULE_P31,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_10_TOUT216_P25_10_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 216, {&MODULE_P25,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_10_TOUT220_P25_14_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_e, 220, {&MODULE_P25,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_10_TOUT266_P10_10_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 266, {&MODULE_P10,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_11_TOUT166_P00_14_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 166, {&MODULE_P00,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_11_TOUT185_P31_11_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 185, {&MODULE_P31,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_11_TOUT189_P31_15_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_e, 189, {&MODULE_P31,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_11_TOUT217_P25_11_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 217, {&MODULE_P25,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_11_TOUT221_P25_15_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_e, 221, {&MODULE_P25,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_11_TOUT267_P10_14_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 267, {&MODULE_P10,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_12_TOUT167_P00_13_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 167, {&MODULE_P00,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_12_TOUT186_P31_12_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 186, {&MODULE_P31,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_12_TOUT218_P25_12_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 218, {&MODULE_P25,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_12_TOUT268_P10_13_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_b, 268, {&MODULE_P10,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_13_TOUT138_P23_6_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 138, {&MODULE_P23, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_13_TOUT168_P00_15_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 168, {&MODULE_P00,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_13_TOUT187_P31_13_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 187, {&MODULE_P31,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_13_TOUT219_P25_13_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 219, {&MODULE_P25,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_13_TOUT269_P10_11_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 269, {&MODULE_P10,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_14_TOUT139_P23_7_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 139, {&MODULE_P23, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_14_TOUT151_P02_12_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 151, {&MODULE_P02,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_14_TOUT153_P02_13_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 153, {&MODULE_P02,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_14_TOUT188_P31_14_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 188, {&MODULE_P31,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_14_TOUT220_P25_14_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 220, {&MODULE_P25,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_14_TOUT270_P10_15_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 270, {&MODULE_P10,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_15_TOUT140_P32_5_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_b, 140, {&MODULE_P32, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_15_TOUT152_P02_15_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 152, {&MODULE_P02,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_15_TOUT154_P02_14_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 154, {&MODULE_P02,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_15_TOUT189_P31_15_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 189, {&MODULE_P31,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_15_TOUT221_P25_15_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 221, {&MODULE_P25,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_1N_TOUT116_P02_9_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_f, 116, {&MODULE_P02, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_1N_TOUT135_P22_9_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_g, 135, {&MODULE_P22, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_1N_TOUT158_P01_12_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 158, {&MODULE_P01,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_1N_TOUT178_P31_4_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 178, {&MODULE_P31, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_1N_TOUT210_P25_4_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 210, {&MODULE_P25, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_1N_TOUT245_P15_13_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_f, 245, {&MODULE_P15,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_1N_TOUT268_P10_13_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 268, {&MODULE_P10,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_1_TOUT111_P01_3_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 111, {&MODULE_P01, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_1_TOUT114_P01_6_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_f, 114, {&MODULE_P01, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_1_TOUT131_P22_5_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_f, 131, {&MODULE_P22, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_1_TOUT156_P01_2_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 156, {&MODULE_P01, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_1_TOUT163_P01_10_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 163, {&MODULE_P01,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_1_TOUT175_P31_1_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 175, {&MODULE_P31, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_1_TOUT207_P25_1_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 207, {&MODULE_P25, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_1_TOUT242_P15_10_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 242, {&MODULE_P15,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_1_TOUT265_P10_9_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 265, {&MODULE_P10, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_2N_TOUT117_P02_10_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_f, 117, {&MODULE_P02,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_2N_TOUT136_P22_10_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_g, 136, {&MODULE_P22,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_2N_TOUT159_P01_1_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 159, {&MODULE_P01, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_2N_TOUT179_P31_5_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 179, {&MODULE_P31, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_2N_TOUT211_P25_5_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 211, {&MODULE_P25, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_2N_TOUT246_P15_14_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_f, 246, {&MODULE_P15,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_2N_TOUT267_P10_14_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 267, {&MODULE_P10,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_2_TOUT112_P01_4_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 112, {&MODULE_P01, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_2_TOUT132_P22_6_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_f, 132, {&MODULE_P22, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_2_TOUT157_P01_15_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 157, {&MODULE_P01,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_2_TOUT164_P01_14_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 164, {&MODULE_P01,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_2_TOUT176_P31_2_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 176, {&MODULE_P31, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_2_TOUT208_P25_2_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 208, {&MODULE_P25, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_2_TOUT243_P15_11_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 243, {&MODULE_P15,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_2_TOUT266_P10_10_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 266, {&MODULE_P10,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_3N_TOUT118_P02_11_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_f, 118, {&MODULE_P02,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_3N_TOUT137_P22_11_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_g, 137, {&MODULE_P22,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_3N_TOUT160_P01_9_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 160, {&MODULE_P01, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_3N_TOUT180_P31_6_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 180, {&MODULE_P31, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_3N_TOUT212_P25_6_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 212, {&MODULE_P25, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_3N_TOUT212_P26_0_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 212, {&MODULE_P26, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_3N_TOUT247_P15_15_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_f, 247, {&MODULE_P15,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_3N_TOUT270_P10_15_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 270, {&MODULE_P10,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_3_TOUT113_P01_5_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 113, {&MODULE_P01, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_3_TOUT133_P22_7_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_f, 133, {&MODULE_P22, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_3_TOUT165_P01_11_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 165, {&MODULE_P01,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_3_TOUT177_P31_3_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 177, {&MODULE_P31, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_3_TOUT209_P25_3_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 209, {&MODULE_P25, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_3_TOUT244_P15_12_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 244, {&MODULE_P15,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_3_TOUT269_P10_11_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 269, {&MODULE_P10,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_4N_TOUT151_P02_12_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 151, {&MODULE_P02,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_4N_TOUT165_P01_11_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_e, 165, {&MODULE_P01,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_4N_TOUT177_P31_3_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_e, 177, {&MODULE_P31, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_4N_TOUT209_P25_3_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_e, 209, {&MODULE_P25, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_4N_TOUT244_P15_12_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 244, {&MODULE_P15,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_4_TOUT110_P10_8_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 110, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_4_TOUT111_P01_3_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 111, {&MODULE_P01, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_4_TOUT114_P01_6_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 114, {&MODULE_P01, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_4_TOUT134_P22_8_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 134, {&MODULE_P22, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_4_TOUT158_P01_12_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 158, {&MODULE_P01,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_4_TOUT178_P31_4_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 178, {&MODULE_P31, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_4_TOUT210_P25_4_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 210, {&MODULE_P25, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_4_TOUT245_P15_13_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 245, {&MODULE_P15,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_5N_TOUT153_P02_13_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 153, {&MODULE_P02,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_5N_TOUT155_P01_0_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_e, 155, {&MODULE_P01, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_5N_TOUT166_P00_14_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 166, {&MODULE_P00,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_5N_TOUT174_P31_0_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_e, 174, {&MODULE_P31, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_5N_TOUT206_P25_0_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_e, 206, {&MODULE_P25, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_5N_TOUT268_P10_13_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 268, {&MODULE_P10,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_5_TOUT115_P01_7_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 115, {&MODULE_P01, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_5_TOUT135_P22_9_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 135, {&MODULE_P22, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_5_TOUT159_P01_1_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 159, {&MODULE_P01, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_5_TOUT179_P31_5_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 179, {&MODULE_P31, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_5_TOUT211_P25_5_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 211, {&MODULE_P25, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_5_TOUT246_P15_14_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 246, {&MODULE_P15,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_5_TOUT265_P10_9_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 265, {&MODULE_P10, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_6N_TOUT154_P02_14_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 154, {&MODULE_P02,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_6N_TOUT156_P01_2_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_e, 156, {&MODULE_P01, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_6N_TOUT175_P31_1_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_e, 175, {&MODULE_P31, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_6N_TOUT207_P25_1_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_e, 207, {&MODULE_P25, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_6N_TOUT242_P15_10_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 242, {&MODULE_P15,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_6N_TOUT267_P10_14_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 267, {&MODULE_P10,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_6_TOUT136_P22_10_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 136, {&MODULE_P22,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_6_TOUT160_P01_9_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 160, {&MODULE_P01, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_6_TOUT180_P31_6_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 180, {&MODULE_P31, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_6_TOUT212_P25_6_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 212, {&MODULE_P25, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_6_TOUT212_P26_0_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 212, {&MODULE_P26, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_6_TOUT247_P15_15_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 247, {&MODULE_P15,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_6_TOUT266_P10_10_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 266, {&MODULE_P10,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_7N_TOUT152_P02_15_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 152, {&MODULE_P02,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_7N_TOUT157_P01_15_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_e, 157, {&MODULE_P01,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_7N_TOUT176_P31_2_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_e, 176, {&MODULE_P31, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_7N_TOUT208_P25_2_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_e, 208, {&MODULE_P25, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_7N_TOUT243_P15_11_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 243, {&MODULE_P15,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_7N_TOUT270_P10_15_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 270, {&MODULE_P10,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_7_TOUT137_P22_11_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 137, {&MODULE_P22,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_7_TOUT161_P01_13_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 161, {&MODULE_P01,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_7_TOUT181_P31_7_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 181, {&MODULE_P31, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_7_TOUT213_P25_7_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 213, {&MODULE_P25, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_7_TOUT248_P13_9_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 248, {&MODULE_P13, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_7_TOUT269_P10_11_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 269, {&MODULE_P10,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_8_TOUT162_P01_8_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 162, {&MODULE_P01, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_8_TOUT182_P31_8_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 182, {&MODULE_P31, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_8_TOUT186_P31_12_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_e, 186, {&MODULE_P31,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_8_TOUT214_P25_8_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 214, {&MODULE_P25, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_8_TOUT218_P25_12_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_e, 218, {&MODULE_P25,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_8_TOUT249_P13_12_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_b, 249, {&MODULE_P13,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_9_TOUT163_P01_10_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 163, {&MODULE_P01,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_9_TOUT183_P31_9_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 183, {&MODULE_P31, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_9_TOUT187_P31_13_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_e, 187, {&MODULE_P31,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_9_TOUT215_P25_9_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 215, {&MODULE_P25, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_9_TOUT219_P25_13_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_e, 219, {&MODULE_P25,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM3_9_TOUT265_P10_9_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_b, 265, {&MODULE_P10, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_0_TOUT155_P01_0_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 155, {&MODULE_P01, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_0_TOUT162_P01_8_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_f, 162, {&MODULE_P01, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_0_TOUT190_P30_0_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 190, {&MODULE_P30, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_0_TOUT222_P24_0_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 222, {&MODULE_P24, 0}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_0_TOUT250_P13_11_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 250, {&MODULE_P13,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_10_TOUT164_P01_14_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 164, {&MODULE_P01,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_10_TOUT200_P30_10_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 200, {&MODULE_P30,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_10_TOUT204_P30_14_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_e, 204, {&MODULE_P30,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_10_TOUT232_P24_10_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 232, {&MODULE_P24,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_10_TOUT260_P14_13_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 260, {&MODULE_P14,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_11_TOUT166_P00_14_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 166, {&MODULE_P00,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_11_TOUT201_P30_11_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 201, {&MODULE_P30,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_11_TOUT205_P30_15_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_e, 205, {&MODULE_P30,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_11_TOUT233_P24_11_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 233, {&MODULE_P24,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_11_TOUT261_P14_12_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 261, {&MODULE_P14,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_12_TOUT167_P00_13_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_b, 167, {&MODULE_P00,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_12_TOUT202_P30_12_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 202, {&MODULE_P30,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_12_TOUT230_P24_8_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_e, 230, {&MODULE_P24, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_12_TOUT234_P24_12_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 234, {&MODULE_P24,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_12_TOUT262_P13_13_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_b, 262, {&MODULE_P13,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_13_TOUT168_P00_15_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 168, {&MODULE_P00,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_13_TOUT203_P30_13_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 203, {&MODULE_P30,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_13_TOUT231_P24_9_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_e, 231, {&MODULE_P24, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_13_TOUT235_P24_13_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 235, {&MODULE_P24,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_13_TOUT263_P14_15_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 263, {&MODULE_P14,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_14_TOUT151_P02_12_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 151, {&MODULE_P02,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_14_TOUT153_P02_13_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 153, {&MODULE_P02,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_14_TOUT204_P30_14_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 204, {&MODULE_P30,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_14_TOUT232_P24_10_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_e, 232, {&MODULE_P24,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_14_TOUT236_P24_14_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 236, {&MODULE_P24,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_14_TOUT264_P13_15_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 264, {&MODULE_P13,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_15_TOUT152_P02_15_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_b, 152, {&MODULE_P02,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_15_TOUT154_P02_14_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_b, 154, {&MODULE_P02,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_15_TOUT205_P30_15_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 205, {&MODULE_P30,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_15_TOUT233_P24_11_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_e, 233, {&MODULE_P24,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_15_TOUT237_P24_15_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 237, {&MODULE_P24,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_1_TOUT156_P01_2_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 156, {&MODULE_P01, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_1_TOUT163_P01_10_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_f, 163, {&MODULE_P01,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_1_TOUT191_P30_1_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 191, {&MODULE_P30, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_1_TOUT223_P24_1_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 223, {&MODULE_P24, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_1_TOUT251_P13_10_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 251, {&MODULE_P13,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_2_TOUT157_P01_15_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 157, {&MODULE_P01,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_2_TOUT164_P01_14_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_f, 164, {&MODULE_P01,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_2_TOUT192_P30_2_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 192, {&MODULE_P30, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_2_TOUT224_P24_2_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 224, {&MODULE_P24, 2}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_2_TOUT252_P13_14_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 252, {&MODULE_P13,14}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_3_TOUT165_P01_11_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 165, {&MODULE_P01,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_3_TOUT193_P30_3_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 193, {&MODULE_P30, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_3_TOUT225_P24_3_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 225, {&MODULE_P24, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_3_TOUT253_P13_4_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 253, {&MODULE_P13, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_4_TOUT111_P01_3_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_e, 111, {&MODULE_P01, 3}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_4_TOUT158_P01_12_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 158, {&MODULE_P01,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_4_TOUT194_P30_4_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 194, {&MODULE_P30, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_4_TOUT226_P24_4_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 226, {&MODULE_P24, 4}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_4_TOUT254_P13_5_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 254, {&MODULE_P13, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_4_TOUT8_P02_8_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_e, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_5_TOUT116_P02_9_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 116, {&MODULE_P02, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_5_TOUT159_P01_1_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 159, {&MODULE_P01, 1}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_5_TOUT195_P30_5_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 195, {&MODULE_P30, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_5_TOUT227_P24_5_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 227, {&MODULE_P24, 5}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_5_TOUT255_P13_6_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 255, {&MODULE_P13, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_6_TOUT117_P02_10_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 117, {&MODULE_P02,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_6_TOUT160_P01_9_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 160, {&MODULE_P01, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_6_TOUT196_P30_6_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 196, {&MODULE_P30, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_6_TOUT228_P24_6_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 228, {&MODULE_P24, 6}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_6_TOUT256_P13_7_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 256, {&MODULE_P13, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_7_TOUT118_P02_11_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 118, {&MODULE_P02,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_7_TOUT161_P01_13_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 161, {&MODULE_P01,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_7_TOUT197_P30_7_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 197, {&MODULE_P30, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_7_TOUT229_P24_7_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 229, {&MODULE_P24, 7}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_7_TOUT264_P13_15_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_h, 264, {&MODULE_P13,15}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_8_TOUT162_P01_8_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_b, 162, {&MODULE_P01, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_8_TOUT198_P30_8_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 198, {&MODULE_P30, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_8_TOUT202_P30_12_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_e, 202, {&MODULE_P30,12}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_8_TOUT230_P24_8_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 230, {&MODULE_P24, 8}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_8_TOUT258_P14_11_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_b, 258, {&MODULE_P14,11}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_9_TOUT163_P01_10_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_b, 163, {&MODULE_P01,10}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_9_TOUT199_P30_9_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 199, {&MODULE_P30, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_9_TOUT203_P30_13_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_e, 203, {&MODULE_P30,13}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_9_TOUT231_P24_9_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 231, {&MODULE_P24, 9}, IfxPort_OutputIdx_alt1}

IfxGtm_Tom_ToutMap

IfxGtm_TOM4_9_TOUT259_P14_14_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_b, 259, {&MODULE_P14,14}, IfxPort_OutputIdx_alt1}

Detailed Description

GTM I/O map.

Version

iLLD_1_0_1_12_0

Copyright

Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE
Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_PinMap.c.

Variable Documentation

◆ IfxGtm_ATOM0_0_TOUT0_P02_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT0_P02_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1}

Definition at line 50 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_0_TOUT48_P22_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT48_P22_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 48, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt1}

Definition at line 51 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_0_TOUT53_P21_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT53_P21_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1}

Definition at line 52 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_0_TOUT85_P14_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT85_P14_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 85, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt1}

Definition at line 53 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_0_TOUT8_P02_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT8_P02_8_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1}

Definition at line 54 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_0_TOUT9_P00_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT9_P00_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1}

Definition at line 55 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_0N_TOUT112_P01_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0N_TOUT112_P01_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 112, {&MODULE_P01, 4}, IfxPort_OutputIdx_alt1}

Definition at line 45 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_0N_TOUT17_P00_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0N_TOUT17_P00_8_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1}

Definition at line 46 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_0N_TOUT43_P23_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0N_TOUT43_P23_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 43, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt1}

Definition at line 47 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_0N_TOUT54_P21_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0N_TOUT54_P21_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1}

Definition at line 48 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_0N_TOUT7_P02_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0N_TOUT7_P02_7_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1}

Definition at line 49 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_1_TOUT10_P00_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT10_P00_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1}

Definition at line 66 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_1_TOUT116_P02_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT116_P02_9_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 116, {&MODULE_P02, 9}, IfxPort_OutputIdx_alt1}

Definition at line 67 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_1_TOUT11_P00_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT11_P00_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1}

Definition at line 68 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_1_TOUT1_P02_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT1_P02_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1}

Definition at line 69 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_1_TOUT31_P33_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT31_P33_9_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1}

Definition at line 70 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_1_TOUT47_P22_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT47_P22_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 47, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt1}

Definition at line 71 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_1_TOUT54_P21_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT54_P21_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1}

Definition at line 72 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_1_TOUT84_P14_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT84_P14_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 84, {&MODULE_P14, 4}, IfxPort_OutputIdx_alt1}

Definition at line 73 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_1N_TOUT113_P01_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT113_P01_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 113, {&MODULE_P01, 5}, IfxPort_OutputIdx_alt1}

Definition at line 56 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_1N_TOUT14_P00_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT14_P00_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1}

Definition at line 57 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_1N_TOUT39_P32_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT39_P32_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1}

Definition at line 58 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_1N_TOUT41_P23_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT41_P23_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1}

Definition at line 59 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_1N_TOUT4_P02_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT4_P02_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1}

Definition at line 60 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_1N_TOUT50_P22_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT50_P22_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1}

Definition at line 61 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_1N_TOUT53_P21_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT53_P21_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1}

Definition at line 62 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_1N_TOUT55_P21_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT55_P21_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1}

Definition at line 63 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_1N_TOUT57_P21_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT57_P21_6_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1}

Definition at line 64 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_1N_TOUT61_P20_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT61_P20_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1}

Definition at line 65 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_2_TOUT117_P02_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT117_P02_10_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 117, {&MODULE_P02,10}, IfxPort_OutputIdx_alt1}

Definition at line 84 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_2_TOUT12_P00_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT12_P00_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1}

Definition at line 85 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_2_TOUT2_P02_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT2_P02_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1}

Definition at line 86 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_2_TOUT33_P33_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT33_P33_11_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 33, {&MODULE_P33,11}, IfxPort_OutputIdx_alt1}

Definition at line 87 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_2_TOUT42_P23_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT42_P23_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1}

Definition at line 88 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_2_TOUT46_P23_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT46_P23_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 46, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt1}

Definition at line 89 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_2_TOUT55_P21_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT55_P21_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1}

Definition at line 90 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_2_TOUT83_P14_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT83_P14_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 83, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt1}

Definition at line 91 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_2N_TOUT114_P01_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT114_P01_6_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 114, {&MODULE_P01, 6}, IfxPort_OutputIdx_alt1}

Definition at line 74 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_2N_TOUT15_P00_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT15_P00_6_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1}

Definition at line 75 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_2N_TOUT23_P33_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT23_P33_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1}

Definition at line 76 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_2N_TOUT40_P32_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT40_P32_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1}

Definition at line 77 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_2N_TOUT41_P23_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT41_P23_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1}

Definition at line 78 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_2N_TOUT44_P23_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT44_P23_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 44, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt1}

Definition at line 79 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_2N_TOUT56_P21_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT56_P21_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1}

Definition at line 80 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_2N_TOUT58_P21_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT58_P21_7_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 58, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt1}

Definition at line 81 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_2N_TOUT5_P02_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT5_P02_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1}

Definition at line 82 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_2N_TOUT65_P20_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT65_P20_9_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1}

Definition at line 83 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_3_TOUT118_P02_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT118_P02_11_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 118, {&MODULE_P02,11}, IfxPort_OutputIdx_alt1}

Definition at line 100 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_3_TOUT13_P00_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT13_P00_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1}

Definition at line 101 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_3_TOUT38_P32_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT38_P32_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 38, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt1}

Definition at line 102 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_3_TOUT3_P02_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT3_P02_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1}

Definition at line 103 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_3_TOUT49_P22_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT49_P22_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 49, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt1}

Definition at line 104 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_3_TOUT56_P21_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT56_P21_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1}

Definition at line 105 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_3_TOUT60_P20_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT60_P20_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 60, {&MODULE_P20, 1}, IfxPort_OutputIdx_alt1}

Definition at line 106 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_3_TOUT82_P14_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT82_P14_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 82, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt1}

Definition at line 107 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_3N_TOUT115_P01_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT115_P01_7_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 115, {&MODULE_P01, 7}, IfxPort_OutputIdx_alt1}

Definition at line 92 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_3N_TOUT16_P00_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT16_P00_7_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1}

Definition at line 93 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_3N_TOUT24_P33_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT24_P33_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1}

Definition at line 94 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_3N_TOUT42_P23_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT42_P23_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1}

Definition at line 95 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_3N_TOUT45_P23_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT45_P23_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 45, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt1}

Definition at line 96 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_3N_TOUT59_P20_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT59_P20_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1}

Definition at line 97 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_3N_TOUT66_P20_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT66_P20_10_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 66, {&MODULE_P20,10}, IfxPort_OutputIdx_alt1}

Definition at line 98 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_3N_TOUT6_P02_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT6_P02_6_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1}

Definition at line 99 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_4_TOUT146_P34_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT146_P34_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 146, {&MODULE_P34, 1}, IfxPort_OutputIdx_alt1}

Definition at line 113 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_4_TOUT14_P00_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT14_P00_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1}

Definition at line 114 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_4_TOUT29_P33_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT29_P33_7_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_k, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1}

Definition at line 115 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_4_TOUT39_P32_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT39_P32_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1}

Definition at line 116 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_4_TOUT4_P02_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT4_P02_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1}

Definition at line 117 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_4_TOUT50_P22_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT50_P22_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1}

Definition at line 118 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_4_TOUT57_P21_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT57_P21_6_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1}

Definition at line 119 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_4_TOUT61_P20_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT61_P20_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1}

Definition at line 120 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_4_TOUT81_P14_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT81_P14_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 81, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt1}

Definition at line 121 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_4N_TOUT118_P02_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4N_TOUT118_P02_11_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 118, {&MODULE_P02,11}, IfxPort_OutputIdx_alt1}

Definition at line 108 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_4N_TOUT135_P22_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4N_TOUT135_P22_9_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 135, {&MODULE_P22, 9}, IfxPort_OutputIdx_alt1}

Definition at line 109 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_4N_TOUT13_P00_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4N_TOUT13_P00_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1}

Definition at line 110 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_4N_TOUT147_P34_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4N_TOUT147_P34_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 147, {&MODULE_P34, 2}, IfxPort_OutputIdx_alt1}

Definition at line 111 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_4N_TOUT3_P02_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4N_TOUT3_P02_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1}

Definition at line 112 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_5_TOUT15_P00_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT15_P00_6_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1}

Definition at line 128 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_5_TOUT23_P33_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT23_P33_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1}

Definition at line 129 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_5_TOUT40_P32_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT40_P32_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1}

Definition at line 130 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_5_TOUT41_P23_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT41_P23_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1}

Definition at line 131 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_5_TOUT58_P21_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT58_P21_7_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 58, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt1}

Definition at line 132 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_5_TOUT5_P02_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT5_P02_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1}

Definition at line 133 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_5N_TOUT0_P02_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5N_TOUT0_P02_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_i, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1}

Definition at line 122 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_5N_TOUT136_P22_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5N_TOUT136_P22_10_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_i, 136, {&MODULE_P22,10}, IfxPort_OutputIdx_alt1}

Definition at line 123 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_5N_TOUT148_P34_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5N_TOUT148_P34_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_i, 148, {&MODULE_P34, 3}, IfxPort_OutputIdx_alt1}

Definition at line 124 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_5N_TOUT26_P33_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5N_TOUT26_P33_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_k, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1}

Definition at line 125 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_5N_TOUT8_P02_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5N_TOUT8_P02_8_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_i, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1}

Definition at line 126 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_5N_TOUT9_P00_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5N_TOUT9_P00_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_i, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1}

Definition at line 127 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_6_TOUT106_P10_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT106_P10_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1}

Definition at line 141 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_6_TOUT16_P00_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT16_P00_7_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1}

Definition at line 142 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_6_TOUT24_P33_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT24_P33_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1}

Definition at line 143 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_6_TOUT42_P23_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT42_P23_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1}

Definition at line 144 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_6_TOUT59_P20_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT59_P20_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1}

Definition at line 145 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_6_TOUT6_P02_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT6_P02_6_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1}

Definition at line 146 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_6N_TOUT10_P00_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6N_TOUT10_P00_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_i, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1}

Definition at line 134 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_6N_TOUT116_P02_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6N_TOUT116_P02_9_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_i, 116, {&MODULE_P02, 9}, IfxPort_OutputIdx_alt1}

Definition at line 135 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_6N_TOUT11_P00_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6N_TOUT11_P00_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_i, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1}

Definition at line 136 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_6N_TOUT137_P22_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6N_TOUT137_P22_11_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_i, 137, {&MODULE_P22,11}, IfxPort_OutputIdx_alt1}

Definition at line 137 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_6N_TOUT149_P34_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6N_TOUT149_P34_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_i, 149, {&MODULE_P34, 4}, IfxPort_OutputIdx_alt1}

Definition at line 138 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_6N_TOUT1_P02_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6N_TOUT1_P02_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_i, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1}

Definition at line 139 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_6N_TOUT27_P33_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6N_TOUT27_P33_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_k, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1}

Definition at line 140 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_7_TOUT17_P00_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT17_P00_8_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1}

Definition at line 152 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_7_TOUT25_P33_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT25_P33_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 25, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt1}

Definition at line 153 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_7_TOUT45_P23_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT45_P23_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 45, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt1}

Definition at line 154 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_7_TOUT64_P20_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT64_P20_8_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1}

Definition at line 155 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_7_TOUT7_P02_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT7_P02_7_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1}

Definition at line 156 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_7N_TOUT117_P02_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7N_TOUT117_P02_10_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_i, 117, {&MODULE_P02,10}, IfxPort_OutputIdx_alt1}

Definition at line 147 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_7N_TOUT12_P00_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7N_TOUT12_P00_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_i, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1}

Definition at line 148 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_7N_TOUT150_P34_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7N_TOUT150_P34_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_i, 150, {&MODULE_P34, 5}, IfxPort_OutputIdx_alt1}

Definition at line 149 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_7N_TOUT28_P33_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7N_TOUT28_P33_6_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_k, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1}

Definition at line 150 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_7N_TOUT2_P02_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7N_TOUT2_P02_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_i, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1}

Definition at line 151 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_0_TOUT0_P02_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT0_P02_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1}

Definition at line 160 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_0_TOUT109_P10_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT109_P10_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1}

Definition at line 161 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_0_TOUT68_P20_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT68_P20_12_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 68, {&MODULE_P20,12}, IfxPort_OutputIdx_alt1}

Definition at line 162 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_0_TOUT76_P15_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT76_P15_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1}

Definition at line 163 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_0_TOUT77_P15_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT77_P15_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1}

Definition at line 164 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_0_TOUT87_P14_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT87_P14_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1}

Definition at line 165 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_0_TOUT8_P02_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT8_P02_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1}

Definition at line 166 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_0_TOUT9_P00_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT9_P00_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1}

Definition at line 167 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_0N_TOUT112_P01_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0N_TOUT112_P01_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_j, 112, {&MODULE_P01, 4}, IfxPort_OutputIdx_alt1}

Definition at line 157 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_0N_TOUT17_P00_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0N_TOUT17_P00_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_j, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1}

Definition at line 158 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_0N_TOUT7_P02_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0N_TOUT7_P02_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_j, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1}

Definition at line 159 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_1_TOUT103_P10_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT103_P10_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 103, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt1}

Definition at line 175 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_1_TOUT10_P00_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT10_P00_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1}

Definition at line 176 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_1_TOUT116_P02_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT116_P02_9_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_l, 116, {&MODULE_P02, 9}, IfxPort_OutputIdx_alt1}

Definition at line 177 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_1_TOUT11_P00_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT11_P00_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1}

Definition at line 178 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_1_TOUT1_P02_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT1_P02_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1}

Definition at line 179 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_1_TOUT31_P33_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT31_P33_9_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1}

Definition at line 180 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_1_TOUT69_P20_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT69_P20_13_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 69, {&MODULE_P20,13}, IfxPort_OutputIdx_alt1}

Definition at line 181 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_1_TOUT78_P15_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT78_P15_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1}

Definition at line 182 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_1_TOUT79_P15_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT79_P15_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1}

Definition at line 183 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_1_TOUT86_P14_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT86_P14_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1}

Definition at line 184 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_1N_TOUT102_P10_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1N_TOUT102_P10_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 102, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt1}

Definition at line 168 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_1N_TOUT113_P01_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1N_TOUT113_P01_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 113, {&MODULE_P01, 5}, IfxPort_OutputIdx_alt1}

Definition at line 169 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_1N_TOUT14_P00_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1N_TOUT14_P00_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1}

Definition at line 170 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_1N_TOUT39_P32_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1N_TOUT39_P32_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1}

Definition at line 171 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_1N_TOUT4_P02_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1N_TOUT4_P02_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1}

Definition at line 172 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_1N_TOUT61_P20_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1N_TOUT61_P20_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_l, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1}

Definition at line 173 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_1N_TOUT72_P15_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1N_TOUT72_P15_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1}

Definition at line 174 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_2_TOUT104_P10_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT104_P10_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 104, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt1}

Definition at line 193 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_2_TOUT107_P10_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT107_P10_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1}

Definition at line 194 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_2_TOUT117_P02_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT117_P02_10_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_l, 117, {&MODULE_P02,10}, IfxPort_OutputIdx_alt1}

Definition at line 195 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_2_TOUT12_P00_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT12_P00_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1}

Definition at line 196 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_2_TOUT2_P02_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT2_P02_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1}

Definition at line 197 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_2_TOUT33_P33_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT33_P33_11_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 33, {&MODULE_P33,11}, IfxPort_OutputIdx_alt1}

Definition at line 198 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_2_TOUT70_P20_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT70_P20_14_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 70, {&MODULE_P20,14}, IfxPort_OutputIdx_alt1}

Definition at line 199 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_2_TOUT80_P14_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT80_P14_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 80, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt1}

Definition at line 200 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_2N_TOUT110_P10_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT110_P10_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 110, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt1}

Definition at line 185 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_2N_TOUT114_P01_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT114_P01_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 114, {&MODULE_P01, 6}, IfxPort_OutputIdx_alt1}

Definition at line 186 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_2N_TOUT15_P00_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT15_P00_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1}

Definition at line 187 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_2N_TOUT23_P33_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT23_P33_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_l, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1}

Definition at line 188 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_2N_TOUT40_P32_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT40_P32_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1}

Definition at line 189 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_2N_TOUT41_P23_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT41_P23_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_l, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1}

Definition at line 190 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_2N_TOUT5_P02_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT5_P02_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1}

Definition at line 191 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_2N_TOUT73_P15_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT73_P15_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1}

Definition at line 192 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_3_TOUT105_P10_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT105_P10_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 105, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt1}

Definition at line 208 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_3_TOUT108_P10_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT108_P10_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1}

Definition at line 209 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_3_TOUT118_P02_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT118_P02_11_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_l, 118, {&MODULE_P02,11}, IfxPort_OutputIdx_alt1}

Definition at line 210 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_3_TOUT13_P00_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT13_P00_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1}

Definition at line 211 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_3_TOUT38_P32_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT38_P32_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 38, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt1}

Definition at line 212 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_3_TOUT3_P02_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT3_P02_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1}

Definition at line 213 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_3_TOUT60_P20_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT60_P20_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 60, {&MODULE_P20, 1}, IfxPort_OutputIdx_alt1}

Definition at line 214 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_3_TOUT71_P15_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT71_P15_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1}

Definition at line 215 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_3N_TOUT106_P10_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3N_TOUT106_P10_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1}

Definition at line 201 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_3N_TOUT115_P01_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3N_TOUT115_P01_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 115, {&MODULE_P01, 7}, IfxPort_OutputIdx_alt1}

Definition at line 202 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_3N_TOUT16_P00_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3N_TOUT16_P00_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1}

Definition at line 203 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_3N_TOUT24_P33_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3N_TOUT24_P33_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_l, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1}

Definition at line 204 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_3N_TOUT42_P23_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3N_TOUT42_P23_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_l, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1}

Definition at line 205 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_3N_TOUT6_P02_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3N_TOUT6_P02_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1}

Definition at line 206 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_3N_TOUT74_P15_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3N_TOUT74_P15_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1}

Definition at line 207 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_4_TOUT102_P10_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT102_P10_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 102, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt1}

Definition at line 225 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_4_TOUT130_P22_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT130_P22_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 130, {&MODULE_P22, 4}, IfxPort_OutputIdx_alt1}

Definition at line 226 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_4_TOUT146_P34_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT146_P34_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 146, {&MODULE_P34, 1}, IfxPort_OutputIdx_alt1}

Definition at line 227 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_4_TOUT14_P00_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT14_P00_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1}

Definition at line 228 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_4_TOUT29_P33_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT29_P33_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_l, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1}

Definition at line 229 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_4_TOUT39_P32_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT39_P32_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1}

Definition at line 230 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_4_TOUT4_P02_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT4_P02_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1}

Definition at line 231 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_4_TOUT61_P20_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT61_P20_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1}

Definition at line 232 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_4_TOUT72_P15_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT72_P15_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1}

Definition at line 233 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_4N_TOUT105_P10_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT105_P10_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 105, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt1}

Definition at line 216 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_4N_TOUT108_P10_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT108_P10_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1}

Definition at line 217 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_4N_TOUT118_P02_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT118_P02_11_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 118, {&MODULE_P02,11}, IfxPort_OutputIdx_alt1}

Definition at line 218 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_4N_TOUT131_P22_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT131_P22_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 131, {&MODULE_P22, 5}, IfxPort_OutputIdx_alt1}

Definition at line 219 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_4N_TOUT13_P00_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT13_P00_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1}

Definition at line 220 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_4N_TOUT147_P34_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT147_P34_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 147, {&MODULE_P34, 2}, IfxPort_OutputIdx_alt1}

Definition at line 221 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_4N_TOUT3_P02_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT3_P02_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1}

Definition at line 222 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_4N_TOUT71_P15_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT71_P15_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1}

Definition at line 223 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_4N_TOUT75_P15_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT75_P15_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 75, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt1}

Definition at line 224 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_5_TOUT110_P10_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT110_P10_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 110, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt1}

Definition at line 243 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_5_TOUT15_P00_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT15_P00_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1}

Definition at line 244 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_5_TOUT23_P33_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT23_P33_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1}

Definition at line 245 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_5_TOUT40_P32_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT40_P32_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1}

Definition at line 246 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_5_TOUT41_P23_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT41_P23_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1}

Definition at line 247 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_5_TOUT5_P02_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT5_P02_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1}

Definition at line 248 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_5_TOUT65_P20_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT65_P20_9_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1}

Definition at line 249 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_5_TOUT73_P15_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT73_P15_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1}

Definition at line 250 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_5N_TOUT0_P02_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT0_P02_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1}

Definition at line 234 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_5N_TOUT109_P10_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT109_P10_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_i, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1}

Definition at line 235 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_5N_TOUT132_P22_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT132_P22_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_i, 132, {&MODULE_P22, 6}, IfxPort_OutputIdx_alt1}

Definition at line 236 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_5N_TOUT148_P34_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT148_P34_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 148, {&MODULE_P34, 3}, IfxPort_OutputIdx_alt1}

Definition at line 237 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_5N_TOUT26_P33_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT26_P33_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_l, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1}

Definition at line 238 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_5N_TOUT76_P15_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT76_P15_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1}

Definition at line 239 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_5N_TOUT77_P15_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT77_P15_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1}

Definition at line 240 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_5N_TOUT8_P02_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT8_P02_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1}

Definition at line 241 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_5N_TOUT9_P00_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT9_P00_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1}

Definition at line 242 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_6_TOUT106_P10_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT106_P10_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_l, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1}

Definition at line 260 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_6_TOUT16_P00_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT16_P00_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1}

Definition at line 261 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_6_TOUT24_P33_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT24_P33_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1}

Definition at line 262 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_6_TOUT42_P23_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT42_P23_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1}

Definition at line 263 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_6_TOUT66_P20_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT66_P20_10_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 66, {&MODULE_P20,10}, IfxPort_OutputIdx_alt1}

Definition at line 264 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_6_TOUT6_P02_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT6_P02_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1}

Definition at line 265 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_6_TOUT74_P15_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT74_P15_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1}

Definition at line 266 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_6N_TOUT103_P10_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT103_P10_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_i, 103, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt1}

Definition at line 251 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_6N_TOUT10_P00_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT10_P00_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1}

Definition at line 252 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_6N_TOUT116_P02_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT116_P02_9_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 116, {&MODULE_P02, 9}, IfxPort_OutputIdx_alt1}

Definition at line 253 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_6N_TOUT11_P00_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT11_P00_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1}

Definition at line 254 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_6N_TOUT133_P22_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT133_P22_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_i, 133, {&MODULE_P22, 7}, IfxPort_OutputIdx_alt1}

Definition at line 255 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_6N_TOUT149_P34_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT149_P34_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 149, {&MODULE_P34, 4}, IfxPort_OutputIdx_alt1}

Definition at line 256 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_6N_TOUT1_P02_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT1_P02_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1}

Definition at line 257 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_6N_TOUT27_P33_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT27_P33_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_l, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1}

Definition at line 258 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_6N_TOUT78_P15_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT78_P15_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1}

Definition at line 259 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_7_TOUT17_P00_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT17_P00_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1}

Definition at line 276 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_7_TOUT25_P33_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT25_P33_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 25, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt1}

Definition at line 277 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_7_TOUT45_P23_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT45_P23_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 45, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt1}

Definition at line 278 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_7_TOUT67_P20_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT67_P20_11_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 67, {&MODULE_P20,11}, IfxPort_OutputIdx_alt1}

Definition at line 279 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_7_TOUT75_P15_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT75_P15_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 75, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt1}

Definition at line 280 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_7_TOUT7_P02_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT7_P02_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1}

Definition at line 281 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_7N_TOUT104_P10_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT104_P10_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_i, 104, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt1}

Definition at line 267 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_7N_TOUT107_P10_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT107_P10_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_i, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1}

Definition at line 268 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_7N_TOUT117_P02_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT117_P02_10_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 117, {&MODULE_P02,10}, IfxPort_OutputIdx_alt1}

Definition at line 269 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_7N_TOUT12_P00_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT12_P00_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1}

Definition at line 270 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_7N_TOUT134_P22_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT134_P22_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_i, 134, {&MODULE_P22, 8}, IfxPort_OutputIdx_alt1}

Definition at line 271 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_7N_TOUT150_P34_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT150_P34_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 150, {&MODULE_P34, 5}, IfxPort_OutputIdx_alt1}

Definition at line 272 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_7N_TOUT28_P33_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT28_P33_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_l, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1}

Definition at line 273 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_7N_TOUT2_P02_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT2_P02_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1}

Definition at line 274 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_7N_TOUT79_P15_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT79_P15_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1}

Definition at line 275 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_0_TOUT109_P10_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT109_P10_7_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_k, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1}

Definition at line 289 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_0_TOUT18_P00_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT18_P00_9_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 18, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt1}

Definition at line 290 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_0_TOUT26_P33_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT26_P33_4_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1}

Definition at line 291 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_0_TOUT32_P33_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT32_P33_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1}

Definition at line 292 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_0_TOUT94_P13_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT94_P13_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1}

Definition at line 293 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_0N_TOUT101_P11_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0N_TOUT101_P11_12_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_j, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1}

Definition at line 282 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_0N_TOUT108_P10_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0N_TOUT108_P10_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_k, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1}

Definition at line 283 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_0N_TOUT12_P00_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0N_TOUT12_P00_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_k, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1}

Definition at line 284 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_0N_TOUT144_P33_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0N_TOUT144_P33_15_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 144, {&MODULE_P33,15}, IfxPort_OutputIdx_alt1}

Definition at line 285 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_0N_TOUT25_P33_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0N_TOUT25_P33_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 25, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt1}

Definition at line 286 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_0N_TOUT32_P33_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0N_TOUT32_P33_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1}

Definition at line 287 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_0N_TOUT37_P32_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0N_TOUT37_P32_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_k, 37, {&MODULE_P32, 1}, IfxPort_OutputIdx_alt1}

Definition at line 288 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_1_TOUT102_P10_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT102_P10_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 102, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt1}

Definition at line 304 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_1_TOUT19_P00_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT19_P00_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 19, {&MODULE_P00,10}, IfxPort_OutputIdx_alt1}

Definition at line 305 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_1_TOUT27_P33_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT27_P33_5_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1}

Definition at line 306 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_1_TOUT43_P23_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT43_P23_2_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 43, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt1}

Definition at line 307 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_1_TOUT90_P14_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT90_P14_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1}

Definition at line 308 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_1_TOUT95_P11_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT95_P11_2_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1}

Definition at line 309 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_1N_TOUT105_P10_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT105_P10_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 105, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt1}

Definition at line 294 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_1N_TOUT167_P00_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT167_P00_13_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 167, {&MODULE_P00,13}, IfxPort_OutputIdx_alt1}

Definition at line 295 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_1N_TOUT22_P33_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT22_P33_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 22, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt1}

Definition at line 296 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_1N_TOUT30_P33_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT30_P33_8_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1}

Definition at line 297 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_1N_TOUT34_P33_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT34_P33_12_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 34, {&MODULE_P33,12}, IfxPort_OutputIdx_alt1}

Definition at line 298 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_1N_TOUT51_P21_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT51_P21_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1}

Definition at line 299 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_1N_TOUT90_P14_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT90_P14_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1}

Definition at line 300 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_1N_TOUT91_P13_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT91_P13_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1}

Definition at line 301 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_1N_TOUT98_P11_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT98_P11_9_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1}

Definition at line 302 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_1N_TOUT9_P00_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT9_P00_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1}

Definition at line 303 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_2_TOUT103_P10_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT103_P10_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 103, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt1}

Definition at line 322 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_2_TOUT20_P00_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT20_P00_11_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 20, {&MODULE_P00,11}, IfxPort_OutputIdx_alt1}

Definition at line 323 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_2_TOUT28_P33_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT28_P33_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1}

Definition at line 324 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_2_TOUT44_P23_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT44_P23_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 44, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt1}

Definition at line 325 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_2_TOUT88_P14_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT88_P14_8_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 88, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt1}

Definition at line 326 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_2_TOUT96_P11_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT96_P11_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1}

Definition at line 327 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_2N_TOUT106_P10_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT106_P10_4_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1}

Definition at line 310 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_2N_TOUT10_P00_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT10_P00_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1}

Definition at line 311 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_2N_TOUT114_P01_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT114_P01_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 114, {&MODULE_P01, 6}, IfxPort_OutputIdx_alt1}

Definition at line 312 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_2N_TOUT138_P23_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT138_P23_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 138, {&MODULE_P23, 6}, IfxPort_OutputIdx_alt1}

Definition at line 313 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_2N_TOUT166_P00_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT166_P00_14_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 166, {&MODULE_P00,14}, IfxPort_OutputIdx_alt1}

Definition at line 314 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_2N_TOUT23_P33_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT23_P33_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1}

Definition at line 315 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_2N_TOUT31_P33_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT31_P33_9_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1}

Definition at line 316 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_2N_TOUT35_P33_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT35_P33_13_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 35, {&MODULE_P33,13}, IfxPort_OutputIdx_alt1}

Definition at line 317 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_2N_TOUT52_P21_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT52_P21_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1}

Definition at line 318 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_2N_TOUT91_P13_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT91_P13_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1}

Definition at line 319 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_2N_TOUT92_P13_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT92_P13_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1}

Definition at line 320 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_2N_TOUT99_P11_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT99_P11_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1}

Definition at line 321 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_3_TOUT104_P10_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT104_P10_2_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 104, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt1}

Definition at line 341 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_3_TOUT21_P00_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT21_P00_12_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 21, {&MODULE_P00,12}, IfxPort_OutputIdx_alt1}

Definition at line 342 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_3_TOUT29_P33_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT29_P33_7_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1}

Definition at line 343 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_3_TOUT89_P14_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT89_P14_9_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 89, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt1}

Definition at line 344 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_3_TOUT97_P11_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT97_P11_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1}

Definition at line 345 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_3N_TOUT100_P11_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT100_P11_11_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1}

Definition at line 328 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_3N_TOUT107_P10_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT107_P10_5_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1}

Definition at line 329 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_3N_TOUT115_P01_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT115_P01_7_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 115, {&MODULE_P01, 7}, IfxPort_OutputIdx_alt1}

Definition at line 330 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_3N_TOUT11_P00_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT11_P00_2_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1}

Definition at line 331 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_3N_TOUT139_P23_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT139_P23_7_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 139, {&MODULE_P23, 7}, IfxPort_OutputIdx_alt1}

Definition at line 332 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_3N_TOUT143_P33_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT143_P33_14_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 143, {&MODULE_P33,14}, IfxPort_OutputIdx_alt1}

Definition at line 333 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_3N_TOUT168_P00_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT168_P00_15_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 168, {&MODULE_P00,15}, IfxPort_OutputIdx_alt1}

Definition at line 334 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_3N_TOUT24_P33_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT24_P33_2_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1}

Definition at line 335 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_3N_TOUT33_P33_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT33_P33_11_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 33, {&MODULE_P33,11}, IfxPort_OutputIdx_alt1}

Definition at line 336 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_3N_TOUT36_P32_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT36_P32_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 36, {&MODULE_P32, 0}, IfxPort_OutputIdx_alt1}

Definition at line 337 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_3N_TOUT62_P20_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT62_P20_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 62, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt1}

Definition at line 338 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_3N_TOUT92_P13_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT92_P13_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1}

Definition at line 339 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_3N_TOUT93_P13_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT93_P13_2_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1}

Definition at line 340 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_4_TOUT167_P00_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT167_P00_13_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 167, {&MODULE_P00,13}, IfxPort_OutputIdx_alt1}

Definition at line 350 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_4_TOUT22_P33_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT22_P33_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 22, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt1}

Definition at line 351 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_4_TOUT30_P33_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT30_P33_8_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1}

Definition at line 352 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_4_TOUT34_P33_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT34_P33_12_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 34, {&MODULE_P33,12}, IfxPort_OutputIdx_alt1}

Definition at line 353 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_4_TOUT51_P21_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT51_P21_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1}

Definition at line 354 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_4_TOUT90_P14_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT90_P14_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1}

Definition at line 355 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_4_TOUT98_P11_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT98_P11_9_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1}

Definition at line 356 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_4N_TOUT29_P33_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4N_TOUT29_P33_7_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1}

Definition at line 346 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_4N_TOUT57_P21_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4N_TOUT57_P21_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1}

Definition at line 347 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_4N_TOUT86_P14_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4N_TOUT86_P14_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1}

Definition at line 348 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_4N_TOUT97_P11_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4N_TOUT97_P11_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1}

Definition at line 349 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_5_TOUT138_P23_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT138_P23_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_a, 138, {&MODULE_P23, 6}, IfxPort_OutputIdx_alt1}

Definition at line 362 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_5_TOUT166_P00_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT166_P00_14_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_i, 166, {&MODULE_P00,14}, IfxPort_OutputIdx_alt1}

Definition at line 363 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_5_TOUT35_P33_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT35_P33_13_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 35, {&MODULE_P33,13}, IfxPort_OutputIdx_alt1}

Definition at line 364 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_5_TOUT52_P21_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT52_P21_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1}

Definition at line 365 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_5_TOUT65_P20_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT65_P20_9_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1}

Definition at line 366 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_5_TOUT91_P13_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT91_P13_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1}

Definition at line 367 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_5_TOUT99_P11_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT99_P11_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1}

Definition at line 368 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_5N_TOUT120_P11_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5N_TOUT120_P11_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 120, {&MODULE_P11, 1}, IfxPort_OutputIdx_alt1}

Definition at line 357 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_5N_TOUT26_P33_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5N_TOUT26_P33_4_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_i, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1}

Definition at line 358 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_5N_TOUT59_P20_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5N_TOUT59_P20_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_i, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1}

Definition at line 359 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_5N_TOUT87_P14_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5N_TOUT87_P14_7_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_i, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1}

Definition at line 360 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_5N_TOUT94_P13_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5N_TOUT94_P13_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1}

Definition at line 361 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_6_TOUT100_P11_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT100_P11_11_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1}

Definition at line 373 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_6_TOUT139_P23_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT139_P23_7_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_a, 139, {&MODULE_P23, 7}, IfxPort_OutputIdx_alt1}

Definition at line 374 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_6_TOUT143_P33_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT143_P33_14_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_k, 143, {&MODULE_P33,14}, IfxPort_OutputIdx_alt1}

Definition at line 375 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_6_TOUT168_P00_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT168_P00_15_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_i, 168, {&MODULE_P00,15}, IfxPort_OutputIdx_alt1}

Definition at line 376 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_6_TOUT36_P32_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT36_P32_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 36, {&MODULE_P32, 0}, IfxPort_OutputIdx_alt1}

Definition at line 377 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_6_TOUT62_P20_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT62_P20_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 62, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt1}

Definition at line 378 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_6_TOUT92_P13_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT92_P13_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1}

Definition at line 379 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_6N_TOUT27_P33_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6N_TOUT27_P33_5_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_i, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1}

Definition at line 369 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_6N_TOUT60_P20_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6N_TOUT60_P20_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_i, 60, {&MODULE_P20, 1}, IfxPort_OutputIdx_alt1}

Definition at line 370 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_6N_TOUT88_P14_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6N_TOUT88_P14_8_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_i, 88, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt1}

Definition at line 371 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_6N_TOUT95_P11_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6N_TOUT95_P11_2_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1}

Definition at line 372 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_7_TOUT101_P11_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT101_P11_12_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1}

Definition at line 384 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_7_TOUT140_P32_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT140_P32_5_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_a, 140, {&MODULE_P32, 5}, IfxPort_OutputIdx_alt1}

Definition at line 385 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_7_TOUT144_P33_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT144_P33_15_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_k, 144, {&MODULE_P33,15}, IfxPort_OutputIdx_alt1}

Definition at line 386 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_7_TOUT37_P32_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT37_P32_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 37, {&MODULE_P32, 1}, IfxPort_OutputIdx_alt1}

Definition at line 387 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_7_TOUT63_P20_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT63_P20_7_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 63, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt1}

Definition at line 388 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_7_TOUT93_P13_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT93_P13_2_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1}

Definition at line 389 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_7N_TOUT28_P33_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7N_TOUT28_P33_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_i, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1}

Definition at line 380 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_7N_TOUT61_P20_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7N_TOUT61_P20_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_i, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1}

Definition at line 381 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_7N_TOUT89_P14_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7N_TOUT89_P14_9_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_i, 89, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt1}

Definition at line 382 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_7N_TOUT96_P11_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7N_TOUT96_P11_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1}

Definition at line 383 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_0_TOUT18_P00_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT18_P00_9_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 18, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt1}

Definition at line 398 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_0_TOUT26_P33_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT26_P33_4_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1}

Definition at line 399 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_0_TOUT32_P33_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT32_P33_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1}

Definition at line 400 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_0_TOUT65_P20_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT65_P20_9_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1}

Definition at line 401 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_0_TOUT94_P13_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT94_P13_3_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1}

Definition at line 402 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_0N_TOUT101_P11_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT101_P11_12_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1}

Definition at line 390 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_0N_TOUT144_P33_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT144_P33_15_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_j, 144, {&MODULE_P33,15}, IfxPort_OutputIdx_alt1}

Definition at line 391 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_0N_TOUT17_P00_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT17_P00_8_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_k, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1}

Definition at line 392 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_0N_TOUT25_P33_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT25_P33_3_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_j, 25, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt1}

Definition at line 393 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_0N_TOUT32_P33_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT32_P33_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_j, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1}

Definition at line 394 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_0N_TOUT37_P32_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT37_P32_1_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_l, 37, {&MODULE_P32, 1}, IfxPort_OutputIdx_alt1}

Definition at line 395 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_0N_TOUT63_P20_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT63_P20_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_k, 63, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt1}

Definition at line 396 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_0N_TOUT76_P15_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT76_P15_5_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1}

Definition at line 397 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_1_TOUT111_P01_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT111_P01_3_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 111, {&MODULE_P01, 3}, IfxPort_OutputIdx_alt1}

Definition at line 413 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_1_TOUT128_P12_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT128_P12_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 128, {&MODULE_P12, 0}, IfxPort_OutputIdx_alt1}

Definition at line 414 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_1_TOUT19_P00_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT19_P00_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 19, {&MODULE_P00,10}, IfxPort_OutputIdx_alt1}

Definition at line 415 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_1_TOUT27_P33_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT27_P33_5_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1}

Definition at line 416 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_1_TOUT43_P23_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT43_P23_2_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 43, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt1}

Definition at line 417 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_1_TOUT64_P20_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT64_P20_8_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1}

Definition at line 418 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_1_TOUT90_P14_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT90_P14_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1}

Definition at line 419 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_1_TOUT95_P11_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT95_P11_2_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1}

Definition at line 420 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_1N_TOUT14_P00_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT14_P00_5_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1}

Definition at line 403 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_1N_TOUT167_P00_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT167_P00_13_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_l, 167, {&MODULE_P00,13}, IfxPort_OutputIdx_alt1}

Definition at line 404 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_1N_TOUT22_P33_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT22_P33_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 22, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt1}

Definition at line 405 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_1N_TOUT30_P33_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT30_P33_8_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1}

Definition at line 406 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_1N_TOUT34_P33_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT34_P33_12_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 34, {&MODULE_P33,12}, IfxPort_OutputIdx_alt1}

Definition at line 407 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_1N_TOUT51_P21_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT51_P21_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1}

Definition at line 408 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_1N_TOUT79_P15_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT79_P15_8_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1}

Definition at line 409 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_1N_TOUT90_P14_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT90_P14_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_l, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1}

Definition at line 410 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_1N_TOUT91_P13_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT91_P13_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1}

Definition at line 411 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_1N_TOUT98_P11_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT98_P11_9_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1}

Definition at line 412 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_2_TOUT112_P01_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT112_P01_4_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_a, 112, {&MODULE_P01, 4}, IfxPort_OutputIdx_alt1}

Definition at line 432 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_2_TOUT20_P00_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT20_P00_11_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 20, {&MODULE_P00,11}, IfxPort_OutputIdx_alt1}

Definition at line 433 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_2_TOUT28_P33_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT28_P33_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1}

Definition at line 434 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_2_TOUT44_P23_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT44_P23_3_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 44, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt1}

Definition at line 435 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_2_TOUT63_P20_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT63_P20_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 63, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt1}

Definition at line 436 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_2_TOUT88_P14_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT88_P14_8_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 88, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt1}

Definition at line 437 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_2_TOUT96_P11_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT96_P11_3_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1}

Definition at line 438 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_2N_TOUT114_P01_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT114_P01_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_l, 114, {&MODULE_P01, 6}, IfxPort_OutputIdx_alt1}

Definition at line 421 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_2N_TOUT15_P00_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT15_P00_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1}

Definition at line 422 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_2N_TOUT166_P00_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT166_P00_14_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_l, 166, {&MODULE_P00,14}, IfxPort_OutputIdx_alt1}

Definition at line 423 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_2N_TOUT23_P33_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT23_P33_1_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1}

Definition at line 424 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_2N_TOUT31_P33_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT31_P33_9_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1}

Definition at line 425 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_2N_TOUT35_P33_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT35_P33_13_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 35, {&MODULE_P33,13}, IfxPort_OutputIdx_alt1}

Definition at line 426 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_2N_TOUT52_P21_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT52_P21_1_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1}

Definition at line 427 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_2N_TOUT78_P15_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT78_P15_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1}

Definition at line 428 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_2N_TOUT91_P13_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT91_P13_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_l, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1}

Definition at line 429 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_2N_TOUT92_P13_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT92_P13_1_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1}

Definition at line 430 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_2N_TOUT99_P11_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT99_P11_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1}

Definition at line 431 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_3_TOUT113_P01_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT113_P01_5_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_a, 113, {&MODULE_P01, 5}, IfxPort_OutputIdx_alt1}

Definition at line 451 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_3_TOUT21_P00_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT21_P00_12_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 21, {&MODULE_P00,12}, IfxPort_OutputIdx_alt1}

Definition at line 452 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_3_TOUT29_P33_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT29_P33_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1}

Definition at line 453 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_3_TOUT62_P20_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT62_P20_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 62, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt1}

Definition at line 454 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_3_TOUT89_P14_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT89_P14_9_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 89, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt1}

Definition at line 455 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_3_TOUT97_P11_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT97_P11_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1}

Definition at line 456 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_3N_TOUT100_P11_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT100_P11_11_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1}

Definition at line 439 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_3N_TOUT115_P01_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT115_P01_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_l, 115, {&MODULE_P01, 7}, IfxPort_OutputIdx_alt1}

Definition at line 440 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_3N_TOUT143_P33_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT143_P33_14_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 143, {&MODULE_P33,14}, IfxPort_OutputIdx_alt1}

Definition at line 441 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_3N_TOUT168_P00_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT168_P00_15_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_l, 168, {&MODULE_P00,15}, IfxPort_OutputIdx_alt1}

Definition at line 442 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_3N_TOUT16_P00_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT16_P00_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1}

Definition at line 443 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_3N_TOUT24_P33_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT24_P33_2_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1}

Definition at line 444 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_3N_TOUT33_P33_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT33_P33_11_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 33, {&MODULE_P33,11}, IfxPort_OutputIdx_alt1}

Definition at line 445 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_3N_TOUT36_P32_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT36_P32_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 36, {&MODULE_P32, 0}, IfxPort_OutputIdx_alt1}

Definition at line 446 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_3N_TOUT62_P20_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT62_P20_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_l, 62, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt1}

Definition at line 447 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_3N_TOUT77_P15_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT77_P15_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1}

Definition at line 448 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_3N_TOUT92_P13_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT92_P13_1_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_l, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1}

Definition at line 449 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_3N_TOUT93_P13_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT93_P13_2_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1}

Definition at line 450 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_4_TOUT114_P01_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT114_P01_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_a, 114, {&MODULE_P01, 6}, IfxPort_OutputIdx_alt1}

Definition at line 463 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_4_TOUT131_P22_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT131_P22_5_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 131, {&MODULE_P22, 5}, IfxPort_OutputIdx_alt1}

Definition at line 464 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_4_TOUT167_P00_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT167_P00_13_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 167, {&MODULE_P00,13}, IfxPort_OutputIdx_alt1}

Definition at line 465 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_4_TOUT22_P33_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT22_P33_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 22, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt1}

Definition at line 466 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_4_TOUT30_P33_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT30_P33_8_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1}

Definition at line 467 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_4_TOUT34_P33_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT34_P33_12_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 34, {&MODULE_P33,12}, IfxPort_OutputIdx_alt1}

Definition at line 468 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_4_TOUT51_P21_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT51_P21_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1}

Definition at line 469 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_4_TOUT90_P14_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT90_P14_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1}

Definition at line 470 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_4_TOUT98_P11_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT98_P11_9_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1}

Definition at line 471 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_4N_TOUT135_P22_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4N_TOUT135_P22_9_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 135, {&MODULE_P22, 9}, IfxPort_OutputIdx_alt1}

Definition at line 457 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_4N_TOUT21_P00_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4N_TOUT21_P00_12_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 21, {&MODULE_P00,12}, IfxPort_OutputIdx_alt1}

Definition at line 458 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_4N_TOUT29_P33_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4N_TOUT29_P33_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1}

Definition at line 459 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_4N_TOUT57_P21_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4N_TOUT57_P21_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1}

Definition at line 460 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_4N_TOUT86_P14_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4N_TOUT86_P14_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1}

Definition at line 461 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_4N_TOUT97_P11_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4N_TOUT97_P11_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1}

Definition at line 462 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_5_TOUT115_P01_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT115_P01_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_a, 115, {&MODULE_P01, 7}, IfxPort_OutputIdx_alt1}

Definition at line 479 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_5_TOUT132_P22_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT132_P22_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 132, {&MODULE_P22, 6}, IfxPort_OutputIdx_alt1}

Definition at line 480 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_5_TOUT166_P00_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT166_P00_14_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 166, {&MODULE_P00,14}, IfxPort_OutputIdx_alt1}

Definition at line 481 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_5_TOUT35_P33_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT35_P33_13_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 35, {&MODULE_P33,13}, IfxPort_OutputIdx_alt1}

Definition at line 482 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_5_TOUT52_P21_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT52_P21_1_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1}

Definition at line 483 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_5_TOUT64_P20_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT64_P20_8_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1}

Definition at line 484 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_5_TOUT91_P13_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT91_P13_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1}

Definition at line 485 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_5_TOUT99_P11_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT99_P11_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1}

Definition at line 486 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_5N_TOUT120_P11_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5N_TOUT120_P11_1_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_k, 120, {&MODULE_P11, 1}, IfxPort_OutputIdx_alt1}

Definition at line 472 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_5N_TOUT136_P22_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5N_TOUT136_P22_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 136, {&MODULE_P22,10}, IfxPort_OutputIdx_alt1}

Definition at line 473 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_5N_TOUT18_P00_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5N_TOUT18_P00_9_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_i, 18, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt1}

Definition at line 474 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_5N_TOUT26_P33_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5N_TOUT26_P33_4_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1}

Definition at line 475 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_5N_TOUT59_P20_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5N_TOUT59_P20_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1}

Definition at line 476 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_5N_TOUT87_P14_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5N_TOUT87_P14_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1}

Definition at line 477 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_5N_TOUT94_P13_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5N_TOUT94_P13_3_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_i, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1}

Definition at line 478 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_6_TOUT100_P11_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT100_P11_11_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1}

Definition at line 493 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_6_TOUT133_P22_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT133_P22_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 133, {&MODULE_P22, 7}, IfxPort_OutputIdx_alt1}

Definition at line 494 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_6_TOUT143_P33_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT143_P33_14_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_l, 143, {&MODULE_P33,14}, IfxPort_OutputIdx_alt1}

Definition at line 495 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_6_TOUT168_P00_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT168_P00_15_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 168, {&MODULE_P00,15}, IfxPort_OutputIdx_alt1}

Definition at line 496 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_6_TOUT36_P32_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT36_P32_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 36, {&MODULE_P32, 0}, IfxPort_OutputIdx_alt1}

Definition at line 497 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_6_TOUT62_P20_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT62_P20_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 62, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt1}

Definition at line 498 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_6_TOUT92_P13_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT92_P13_1_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1}

Definition at line 499 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_6N_TOUT137_P22_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6N_TOUT137_P22_11_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 137, {&MODULE_P22,11}, IfxPort_OutputIdx_alt1}

Definition at line 487 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_6N_TOUT19_P00_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6N_TOUT19_P00_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_i, 19, {&MODULE_P00,10}, IfxPort_OutputIdx_alt1}

Definition at line 488 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_6N_TOUT27_P33_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6N_TOUT27_P33_5_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1}

Definition at line 489 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_6N_TOUT60_P20_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6N_TOUT60_P20_1_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 60, {&MODULE_P20, 1}, IfxPort_OutputIdx_alt1}

Definition at line 490 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_6N_TOUT88_P14_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6N_TOUT88_P14_8_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 88, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt1}

Definition at line 491 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_6N_TOUT95_P11_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6N_TOUT95_P11_2_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_i, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1}

Definition at line 492 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_7_TOUT101_P11_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT101_P11_12_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1}

Definition at line 505 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_7_TOUT134_P22_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT134_P22_8_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 134, {&MODULE_P22, 8}, IfxPort_OutputIdx_alt1}

Definition at line 506 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_7_TOUT144_P33_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT144_P33_15_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_l, 144, {&MODULE_P33,15}, IfxPort_OutputIdx_alt1}

Definition at line 507 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_7_TOUT37_P32_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT37_P32_1_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 37, {&MODULE_P32, 1}, IfxPort_OutputIdx_alt1}

Definition at line 508 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_7_TOUT63_P20_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT63_P20_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 63, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt1}

Definition at line 509 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_7_TOUT93_P13_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT93_P13_2_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1}

Definition at line 510 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_7N_TOUT20_P00_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7N_TOUT20_P00_11_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_i, 20, {&MODULE_P00,11}, IfxPort_OutputIdx_alt1}

Definition at line 500 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_7N_TOUT28_P33_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7N_TOUT28_P33_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1}

Definition at line 501 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_7N_TOUT61_P20_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7N_TOUT61_P20_3_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1}

Definition at line 502 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_7N_TOUT89_P14_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7N_TOUT89_P14_9_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 89, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt1}

Definition at line 503 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_7N_TOUT96_P11_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7N_TOUT96_P11_3_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_i, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1}

Definition at line 504 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_0_TOUT109_P10_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT109_P10_7_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1}

Definition at line 512 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_0_TOUT39_P32_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT39_P32_3_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1}

Definition at line 513 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_0_TOUT48_P22_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT48_P22_1_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 48, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt1}

Definition at line 514 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_0_TOUT53_P21_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT53_P21_2_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1}

Definition at line 515 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_0_TOUT68_P20_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT68_P20_12_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 68, {&MODULE_P20,12}, IfxPort_OutputIdx_alt1}

Definition at line 516 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_0_TOUT76_P15_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT76_P15_5_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1}

Definition at line 517 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_0_TOUT77_P15_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT77_P15_6_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1}

Definition at line 518 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_0_TOUT85_P14_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT85_P14_5_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 85, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt1}

Definition at line 519 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_0_TOUT87_P14_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT87_P14_7_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1}

Definition at line 520 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_0N_TOUT87_P14_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0N_TOUT87_P14_7_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_k, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1}

Definition at line 511 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_1_TOUT103_P10_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT103_P10_1_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 103, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt1}

Definition at line 529 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_1_TOUT41_P23_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT41_P23_0_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1}

Definition at line 530 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_1_TOUT47_P22_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT47_P22_0_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 47, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt1}

Definition at line 531 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_1_TOUT54_P21_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT54_P21_3_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1}

Definition at line 532 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_1_TOUT69_P20_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT69_P20_13_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 69, {&MODULE_P20,13}, IfxPort_OutputIdx_alt1}

Definition at line 533 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_1_TOUT78_P15_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT78_P15_7_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1}

Definition at line 534 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_1_TOUT79_P15_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT79_P15_8_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1}

Definition at line 535 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_1_TOUT84_P14_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT84_P14_4_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 84, {&MODULE_P14, 4}, IfxPort_OutputIdx_alt1}

Definition at line 536 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_1_TOUT86_P14_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT86_P14_6_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1}

Definition at line 537 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_1N_TOUT102_P10_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT102_P10_0_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 102, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt1}

Definition at line 521 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_1N_TOUT44_P23_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT44_P23_3_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 44, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt1}

Definition at line 522 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_1N_TOUT50_P22_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT50_P22_3_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1}

Definition at line 523 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_1N_TOUT53_P21_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT53_P21_2_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1}

Definition at line 524 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_1N_TOUT57_P21_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT57_P21_6_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_l, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1}

Definition at line 525 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_1N_TOUT72_P15_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT72_P15_1_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1}

Definition at line 526 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_1N_TOUT85_P14_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT85_P14_5_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 85, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt1}

Definition at line 527 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_1N_TOUT86_P14_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT86_P14_6_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1}

Definition at line 528 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_2_TOUT104_P10_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT104_P10_2_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 104, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt1}

Definition at line 545 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_2_TOUT107_P10_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT107_P10_5_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1}

Definition at line 546 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_2_TOUT42_P23_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT42_P23_1_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1}

Definition at line 547 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_2_TOUT46_P23_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT46_P23_5_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 46, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt1}

Definition at line 548 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_2_TOUT55_P21_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT55_P21_4_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1}

Definition at line 549 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_2_TOUT70_P20_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT70_P20_14_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 70, {&MODULE_P20,14}, IfxPort_OutputIdx_alt1}

Definition at line 550 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_2_TOUT80_P14_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT80_P14_0_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 80, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt1}

Definition at line 551 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_2_TOUT83_P14_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT83_P14_3_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 83, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt1}

Definition at line 552 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_2N_TOUT110_P10_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2N_TOUT110_P10_8_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 110, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt1}

Definition at line 538 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_2N_TOUT45_P23_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2N_TOUT45_P23_4_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 45, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt1}

Definition at line 539 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_2N_TOUT52_P21_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2N_TOUT52_P21_1_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1}

Definition at line 540 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_2N_TOUT58_P21_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2N_TOUT58_P21_7_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 58, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt1}

Definition at line 541 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_2N_TOUT65_P20_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2N_TOUT65_P20_9_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_l, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1}

Definition at line 542 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_2N_TOUT73_P15_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2N_TOUT73_P15_2_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1}

Definition at line 543 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_2N_TOUT81_P14_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2N_TOUT81_P14_1_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 81, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt1}

Definition at line 544 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_3_TOUT105_P10_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3_TOUT105_P10_3_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 105, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt1}

Definition at line 560 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_3_TOUT108_P10_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3_TOUT108_P10_6_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1}

Definition at line 561 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_3_TOUT43_P23_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3_TOUT43_P23_2_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 43, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt1}

Definition at line 562 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_3_TOUT49_P22_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3_TOUT49_P22_2_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 49, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt1}

Definition at line 563 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_3_TOUT56_P21_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3_TOUT56_P21_5_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1}

Definition at line 564 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_3_TOUT71_P15_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3_TOUT71_P15_0_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1}

Definition at line 565 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_3_TOUT82_P14_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3_TOUT82_P14_2_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 82, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt1}

Definition at line 566 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_3N_TOUT106_P10_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3N_TOUT106_P10_4_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1}

Definition at line 553 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_3N_TOUT46_P23_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3N_TOUT46_P23_5_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 46, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt1}

Definition at line 554 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_3N_TOUT51_P21_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3N_TOUT51_P21_0_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1}

Definition at line 555 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_3N_TOUT59_P20_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3N_TOUT59_P20_0_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_l, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1}

Definition at line 556 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_3N_TOUT66_P20_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3N_TOUT66_P20_10_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_l, 66, {&MODULE_P20,10}, IfxPort_OutputIdx_alt1}

Definition at line 557 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_3N_TOUT74_P15_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3N_TOUT74_P15_3_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1}

Definition at line 558 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_3N_TOUT80_P14_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3N_TOUT80_P14_0_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 80, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt1}

Definition at line 559 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_4_TOUT102_P10_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT102_P10_0_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 102, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt1}

Definition at line 575 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_4_TOUT111_P01_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT111_P01_3_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 111, {&MODULE_P01, 3}, IfxPort_OutputIdx_alt1}

Definition at line 576 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_4_TOUT131_P22_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT131_P22_5_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 131, {&MODULE_P22, 5}, IfxPort_OutputIdx_alt1}

Definition at line 577 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_4_TOUT264_P13_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT264_P13_15_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 264, {&MODULE_P13,15}, IfxPort_OutputIdx_alt1}

Definition at line 578 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_4_TOUT44_P23_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT44_P23_3_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 44, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt1}

Definition at line 579 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_4_TOUT50_P22_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT50_P22_3_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1}

Definition at line 580 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_4_TOUT57_P21_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT57_P21_6_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1}

Definition at line 581 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_4_TOUT72_P15_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT72_P15_1_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1}

Definition at line 582 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_4_TOUT81_P14_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT81_P14_1_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 81, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt1}

Definition at line 583 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_4N_TOUT105_P10_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT105_P10_3_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 105, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt1}

Definition at line 567 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_4N_TOUT108_P10_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT108_P10_6_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1}

Definition at line 568 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_4N_TOUT132_P22_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT132_P22_6_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 132, {&MODULE_P22, 6}, IfxPort_OutputIdx_alt1}

Definition at line 569 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_4N_TOUT21_P00_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT21_P00_12_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 21, {&MODULE_P00,12}, IfxPort_OutputIdx_alt1}

Definition at line 570 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_4N_TOUT56_P21_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT56_P21_5_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1}

Definition at line 571 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_4N_TOUT71_P15_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT71_P15_0_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_k, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1}

Definition at line 572 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_4N_TOUT75_P15_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT75_P15_4_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_k, 75, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt1}

Definition at line 573 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_4N_TOUT95_P11_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT95_P11_2_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_k, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1}

Definition at line 574 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_5_TOUT110_P10_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT110_P10_8_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 110, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt1}

Definition at line 590 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_5_TOUT116_P02_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT116_P02_9_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_a, 116, {&MODULE_P02, 9}, IfxPort_OutputIdx_alt1}

Definition at line 591 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_5_TOUT128_P12_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT128_P12_0_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 128, {&MODULE_P12, 0}, IfxPort_OutputIdx_alt1}

Definition at line 592 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_5_TOUT130_P22_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT130_P22_4_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 130, {&MODULE_P22, 4}, IfxPort_OutputIdx_alt1}

Definition at line 593 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_5_TOUT45_P23_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT45_P23_4_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 45, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt1}

Definition at line 594 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_5_TOUT56_P21_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT56_P21_5_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_k, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1}

Definition at line 595 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_5_TOUT58_P21_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT58_P21_7_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 58, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt1}

Definition at line 596 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_5_TOUT65_P20_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT65_P20_9_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1}

Definition at line 597 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_5_TOUT73_P15_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT73_P15_2_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1}

Definition at line 598 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_5N_TOUT109_P10_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5N_TOUT109_P10_7_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1}

Definition at line 584 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_5N_TOUT121_P11_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5N_TOUT121_P11_4_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_k, 121, {&MODULE_P11, 4}, IfxPort_OutputIdx_alt1}

Definition at line 585 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_5N_TOUT133_P22_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5N_TOUT133_P22_7_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 133, {&MODULE_P22, 7}, IfxPort_OutputIdx_alt1}

Definition at line 586 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_5N_TOUT18_P00_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5N_TOUT18_P00_9_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 18, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt1}

Definition at line 587 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_5N_TOUT76_P15_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5N_TOUT76_P15_5_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_k, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1}

Definition at line 588 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_5N_TOUT77_P15_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5N_TOUT77_P15_6_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_k, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1}

Definition at line 589 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_6_TOUT106_P10_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT106_P10_4_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1}

Definition at line 604 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_6_TOUT117_P02_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT117_P02_10_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_a, 117, {&MODULE_P02,10}, IfxPort_OutputIdx_alt1}

Definition at line 605 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_6_TOUT129_P12_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT129_P12_1_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 129, {&MODULE_P12, 1}, IfxPort_OutputIdx_alt1}

Definition at line 606 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_6_TOUT139_P23_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT139_P23_7_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 139, {&MODULE_P23, 7}, IfxPort_OutputIdx_alt1}

Definition at line 607 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_6_TOUT46_P23_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT46_P23_5_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 46, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt1}

Definition at line 608 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_6_TOUT59_P20_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT59_P20_0_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1}

Definition at line 609 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_6_TOUT66_P20_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT66_P20_10_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 66, {&MODULE_P20,10}, IfxPort_OutputIdx_alt1}

Definition at line 610 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_6_TOUT74_P15_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT74_P15_3_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1}

Definition at line 611 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_6N_TOUT103_P10_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6N_TOUT103_P10_1_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 103, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt1}

Definition at line 599 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_6N_TOUT134_P22_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6N_TOUT134_P22_8_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 134, {&MODULE_P22, 8}, IfxPort_OutputIdx_alt1}

Definition at line 600 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_6N_TOUT19_P00_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6N_TOUT19_P00_10_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 19, {&MODULE_P00,10}, IfxPort_OutputIdx_alt1}

Definition at line 601 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_6N_TOUT78_P15_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6N_TOUT78_P15_7_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_k, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1}

Definition at line 602 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_6N_TOUT97_P11_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6N_TOUT97_P11_6_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_k, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1}

Definition at line 603 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_7_TOUT118_P02_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7_TOUT118_P02_11_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_a, 118, {&MODULE_P02,11}, IfxPort_OutputIdx_alt1}

Definition at line 618 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_7_TOUT119_P11_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7_TOUT119_P11_0_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 119, {&MODULE_P11, 0}, IfxPort_OutputIdx_alt1}

Definition at line 619 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_7_TOUT138_P23_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7_TOUT138_P23_6_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 138, {&MODULE_P23, 6}, IfxPort_OutputIdx_alt1}

Definition at line 620 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_7_TOUT40_P32_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7_TOUT40_P32_4_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_i, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1}

Definition at line 621 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_7_TOUT64_P20_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7_TOUT64_P20_8_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1}

Definition at line 622 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_7_TOUT67_P20_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7_TOUT67_P20_11_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 67, {&MODULE_P20,11}, IfxPort_OutputIdx_alt1}

Definition at line 623 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_7_TOUT75_P15_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7_TOUT75_P15_4_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 75, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt1}

Definition at line 624 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_7N_TOUT104_P10_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7N_TOUT104_P10_2_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 104, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt1}

Definition at line 612 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_7N_TOUT107_P10_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7N_TOUT107_P10_5_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1}

Definition at line 613 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_7N_TOUT124_P11_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7N_TOUT124_P11_8_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_k, 124, {&MODULE_P11, 8}, IfxPort_OutputIdx_alt1}

Definition at line 614 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_7N_TOUT135_P22_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7N_TOUT135_P22_9_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 135, {&MODULE_P22, 9}, IfxPort_OutputIdx_alt1}

Definition at line 615 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_7N_TOUT20_P00_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7N_TOUT20_P00_11_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 20, {&MODULE_P00,11}, IfxPort_OutputIdx_alt1}

Definition at line 616 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM4_7N_TOUT79_P15_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7N_TOUT79_P15_8_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_k, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1}

Definition at line 617 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_0_TOUT119_P11_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT119_P11_0_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 119, {&MODULE_P11, 0}, IfxPort_OutputIdx_alt1}

Definition at line 633 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_0_TOUT130_P22_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT130_P22_4_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_k, 130, {&MODULE_P22, 4}, IfxPort_OutputIdx_alt1}

Definition at line 634 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_0_TOUT146_P34_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT146_P34_1_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_k, 146, {&MODULE_P34, 1}, IfxPort_OutputIdx_alt1}

Definition at line 635 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_0_TOUT155_P01_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT155_P01_0_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 155, {&MODULE_P01, 0}, IfxPort_OutputIdx_alt1}

Definition at line 636 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_0_TOUT162_P01_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT162_P01_8_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 162, {&MODULE_P01, 8}, IfxPort_OutputIdx_alt1}

Definition at line 637 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_0_TOUT174_P31_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT174_P31_0_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 174, {&MODULE_P31, 0}, IfxPort_OutputIdx_alt1}

Definition at line 638 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_0_TOUT206_P25_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT206_P25_0_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 206, {&MODULE_P25, 0}, IfxPort_OutputIdx_alt1}

Definition at line 639 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_0_TOUT249_P13_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT249_P13_12_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 249, {&MODULE_P13,12}, IfxPort_OutputIdx_alt1}

Definition at line 640 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_0_TOUT258_P14_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT258_P14_11_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 258, {&MODULE_P14,11}, IfxPort_OutputIdx_alt1}

Definition at line 641 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_0N_TOUT126_P11_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT126_P11_14_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 126, {&MODULE_P11,14}, IfxPort_OutputIdx_alt1}

Definition at line 625 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_0N_TOUT134_P22_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT134_P22_8_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_l, 134, {&MODULE_P22, 8}, IfxPort_OutputIdx_alt1}

Definition at line 626 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_0N_TOUT150_P34_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT150_P34_5_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_l, 150, {&MODULE_P34, 5}, IfxPort_OutputIdx_alt1}

Definition at line 627 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_0N_TOUT161_P01_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT161_P01_13_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 161, {&MODULE_P01,13}, IfxPort_OutputIdx_alt1}

Definition at line 628 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_0N_TOUT181_P31_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT181_P31_7_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_k, 181, {&MODULE_P31, 7}, IfxPort_OutputIdx_alt1}

Definition at line 629 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_0N_TOUT213_P25_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT213_P25_7_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_k, 213, {&MODULE_P25, 7}, IfxPort_OutputIdx_alt1}

Definition at line 630 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_0N_TOUT261_P14_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT261_P14_12_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 261, {&MODULE_P14,12}, IfxPort_OutputIdx_alt1}

Definition at line 631 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_0N_TOUT264_P13_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT264_P13_15_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 264, {&MODULE_P13,15}, IfxPort_OutputIdx_alt1}

Definition at line 632 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_1_TOUT120_P11_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT120_P11_1_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 120, {&MODULE_P11, 1}, IfxPort_OutputIdx_alt1}

Definition at line 653 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_1_TOUT131_P22_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT131_P22_5_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 131, {&MODULE_P22, 5}, IfxPort_OutputIdx_alt1}

Definition at line 654 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_1_TOUT147_P34_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT147_P34_2_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 147, {&MODULE_P34, 2}, IfxPort_OutputIdx_alt1}

Definition at line 655 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_1_TOUT156_P01_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT156_P01_2_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 156, {&MODULE_P01, 2}, IfxPort_OutputIdx_alt1}

Definition at line 656 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_1_TOUT164_P01_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT164_P01_14_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 164, {&MODULE_P01,14}, IfxPort_OutputIdx_alt1}

Definition at line 657 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_1_TOUT175_P31_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT175_P31_1_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 175, {&MODULE_P31, 1}, IfxPort_OutputIdx_alt1}

Definition at line 658 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_1_TOUT207_P25_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT207_P25_1_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 207, {&MODULE_P25, 1}, IfxPort_OutputIdx_alt1}

Definition at line 659 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_1_TOUT242_P15_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT242_P15_10_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 242, {&MODULE_P15,10}, IfxPort_OutputIdx_alt1}

Definition at line 660 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_1_TOUT253_P13_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT253_P13_4_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 253, {&MODULE_P13, 4}, IfxPort_OutputIdx_alt1}

Definition at line 661 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_1_TOUT265_P10_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT265_P10_9_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 265, {&MODULE_P10, 9}, IfxPort_OutputIdx_alt1}

Definition at line 662 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_1N_TOUT123_P11_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT123_P11_7_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 123, {&MODULE_P11, 7}, IfxPort_OutputIdx_alt1}

Definition at line 642 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_1N_TOUT128_P12_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT128_P12_0_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 128, {&MODULE_P12, 0}, IfxPort_OutputIdx_alt1}

Definition at line 643 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_1N_TOUT135_P22_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT135_P22_9_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_l, 135, {&MODULE_P22, 9}, IfxPort_OutputIdx_alt1}

Definition at line 644 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_1N_TOUT140_P32_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT140_P32_5_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 140, {&MODULE_P32, 5}, IfxPort_OutputIdx_alt1}

Definition at line 645 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_1N_TOUT158_P01_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT158_P01_12_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 158, {&MODULE_P01,12}, IfxPort_OutputIdx_alt1}

Definition at line 646 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_1N_TOUT178_P31_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT178_P31_4_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 178, {&MODULE_P31, 4}, IfxPort_OutputIdx_alt1}

Definition at line 647 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_1N_TOUT210_P25_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT210_P25_4_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 210, {&MODULE_P25, 4}, IfxPort_OutputIdx_alt1}

Definition at line 648 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_1N_TOUT245_P15_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT245_P15_13_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 245, {&MODULE_P15,13}, IfxPort_OutputIdx_alt1}

Definition at line 649 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_1N_TOUT248_P13_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT248_P13_9_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 248, {&MODULE_P13, 9}, IfxPort_OutputIdx_alt1}

Definition at line 650 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_1N_TOUT260_P14_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT260_P14_13_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 260, {&MODULE_P14,13}, IfxPort_OutputIdx_alt1}

Definition at line 651 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_1N_TOUT268_P10_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT268_P10_13_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 268, {&MODULE_P10,13}, IfxPort_OutputIdx_alt1}

Definition at line 652 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_2_TOUT121_P11_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT121_P11_4_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 121, {&MODULE_P11, 4}, IfxPort_OutputIdx_alt1}

Definition at line 673 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_2_TOUT132_P22_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT132_P22_6_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 132, {&MODULE_P22, 6}, IfxPort_OutputIdx_alt1}

Definition at line 674 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_2_TOUT148_P34_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT148_P34_3_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 148, {&MODULE_P34, 3}, IfxPort_OutputIdx_alt1}

Definition at line 675 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_2_TOUT152_P02_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT152_P02_15_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 152, {&MODULE_P02,15}, IfxPort_OutputIdx_alt1}

Definition at line 676 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_2_TOUT157_P01_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT157_P01_15_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 157, {&MODULE_P01,15}, IfxPort_OutputIdx_alt1}

Definition at line 677 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_2_TOUT176_P31_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT176_P31_2_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 176, {&MODULE_P31, 2}, IfxPort_OutputIdx_alt1}

Definition at line 678 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_2_TOUT208_P25_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT208_P25_2_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 208, {&MODULE_P25, 2}, IfxPort_OutputIdx_alt1}

Definition at line 679 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_2_TOUT243_P15_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT243_P15_11_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 243, {&MODULE_P15,11}, IfxPort_OutputIdx_alt1}

Definition at line 680 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_2_TOUT254_P13_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT254_P13_5_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 254, {&MODULE_P13, 5}, IfxPort_OutputIdx_alt1}

Definition at line 681 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_2_TOUT266_P10_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT266_P10_10_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 266, {&MODULE_P10,10}, IfxPort_OutputIdx_alt1}

Definition at line 682 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_2N_TOUT124_P11_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT124_P11_8_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 124, {&MODULE_P11, 8}, IfxPort_OutputIdx_alt1}

Definition at line 663 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_2N_TOUT136_P22_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT136_P22_10_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_l, 136, {&MODULE_P22,10}, IfxPort_OutputIdx_alt1}

Definition at line 664 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_2N_TOUT141_P32_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT141_P32_6_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 141, {&MODULE_P32, 6}, IfxPort_OutputIdx_alt1}

Definition at line 665 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_2N_TOUT159_P01_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT159_P01_1_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 159, {&MODULE_P01, 1}, IfxPort_OutputIdx_alt1}

Definition at line 666 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_2N_TOUT179_P31_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT179_P31_5_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 179, {&MODULE_P31, 5}, IfxPort_OutputIdx_alt1}

Definition at line 667 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_2N_TOUT211_P25_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT211_P25_5_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 211, {&MODULE_P25, 5}, IfxPort_OutputIdx_alt1}

Definition at line 668 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_2N_TOUT246_P15_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT246_P15_14_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 246, {&MODULE_P15,14}, IfxPort_OutputIdx_alt1}

Definition at line 669 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_2N_TOUT250_P13_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT250_P13_11_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 250, {&MODULE_P13,11}, IfxPort_OutputIdx_alt1}

Definition at line 670 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_2N_TOUT259_P14_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT259_P14_14_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 259, {&MODULE_P14,14}, IfxPort_OutputIdx_alt1}

Definition at line 671 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_2N_TOUT269_P10_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT269_P10_11_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 269, {&MODULE_P10,11}, IfxPort_OutputIdx_alt1}

Definition at line 672 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_3_TOUT122_P11_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT122_P11_5_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 122, {&MODULE_P11, 5}, IfxPort_OutputIdx_alt1}

Definition at line 695 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_3_TOUT133_P22_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT133_P22_7_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 133, {&MODULE_P22, 7}, IfxPort_OutputIdx_alt1}

Definition at line 696 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_3_TOUT149_P34_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT149_P34_4_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 149, {&MODULE_P34, 4}, IfxPort_OutputIdx_alt1}

Definition at line 697 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_3_TOUT163_P01_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT163_P01_10_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 163, {&MODULE_P01,10}, IfxPort_OutputIdx_alt1}

Definition at line 698 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_3_TOUT165_P01_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT165_P01_11_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 165, {&MODULE_P01,11}, IfxPort_OutputIdx_alt1}

Definition at line 699 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_3_TOUT177_P31_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT177_P31_3_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 177, {&MODULE_P31, 3}, IfxPort_OutputIdx_alt1}

Definition at line 700 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_3_TOUT209_P25_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT209_P25_3_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 209, {&MODULE_P25, 3}, IfxPort_OutputIdx_alt1}

Definition at line 701 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_3_TOUT244_P15_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT244_P15_12_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 244, {&MODULE_P15,12}, IfxPort_OutputIdx_alt1}

Definition at line 702 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_3_TOUT255_P13_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT255_P13_6_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 255, {&MODULE_P13, 6}, IfxPort_OutputIdx_alt1}

Definition at line 703 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_3_TOUT267_P10_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT267_P10_14_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 267, {&MODULE_P10,14}, IfxPort_OutputIdx_alt1}

Definition at line 704 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_3N_TOUT123_P11_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT123_P11_7_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 123, {&MODULE_P11, 7}, IfxPort_OutputIdx_alt1}

Definition at line 683 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_3N_TOUT125_P11_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT125_P11_13_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 125, {&MODULE_P11,13}, IfxPort_OutputIdx_alt1}

Definition at line 684 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_3N_TOUT137_P22_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT137_P22_11_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_l, 137, {&MODULE_P22,11}, IfxPort_OutputIdx_alt1}

Definition at line 685 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_3N_TOUT142_P32_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT142_P32_7_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 142, {&MODULE_P32, 7}, IfxPort_OutputIdx_alt1}

Definition at line 686 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_3N_TOUT160_P01_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT160_P01_9_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 160, {&MODULE_P01, 9}, IfxPort_OutputIdx_alt1}

Definition at line 687 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_3N_TOUT180_P31_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT180_P31_6_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 180, {&MODULE_P31, 6}, IfxPort_OutputIdx_alt1}

Definition at line 688 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_3N_TOUT212_P25_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT212_P25_6_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 212, {&MODULE_P25, 6}, IfxPort_OutputIdx_alt1}

Definition at line 689 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_3N_TOUT212_P26_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT212_P26_0_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 212, {&MODULE_P26, 0}, IfxPort_OutputIdx_alt1}

Definition at line 690 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_3N_TOUT247_P15_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT247_P15_15_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 247, {&MODULE_P15,15}, IfxPort_OutputIdx_alt1}

Definition at line 691 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_3N_TOUT249_P13_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT249_P13_12_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 249, {&MODULE_P13,12}, IfxPort_OutputIdx_alt1}

Definition at line 692 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_3N_TOUT263_P14_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT263_P14_15_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 263, {&MODULE_P14,15}, IfxPort_OutputIdx_alt1}

Definition at line 693 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_3N_TOUT270_P10_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT270_P10_15_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 270, {&MODULE_P10,15}, IfxPort_OutputIdx_alt1}

Definition at line 694 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_4_TOUT123_P11_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT123_P11_7_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 123, {&MODULE_P11, 7}, IfxPort_OutputIdx_alt1}

Definition at line 712 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_4_TOUT134_P22_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT134_P22_8_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_k, 134, {&MODULE_P22, 8}, IfxPort_OutputIdx_alt1}

Definition at line 713 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_4_TOUT150_P34_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT150_P34_5_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_k, 150, {&MODULE_P34, 5}, IfxPort_OutputIdx_alt1}

Definition at line 714 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_4_TOUT158_P01_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT158_P01_12_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 158, {&MODULE_P01,12}, IfxPort_OutputIdx_alt1}

Definition at line 715 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_4_TOUT178_P31_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT178_P31_4_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 178, {&MODULE_P31, 4}, IfxPort_OutputIdx_alt1}

Definition at line 716 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_4_TOUT210_P25_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT210_P25_4_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 210, {&MODULE_P25, 4}, IfxPort_OutputIdx_alt1}

Definition at line 717 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_4_TOUT245_P15_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT245_P15_13_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 245, {&MODULE_P15,13}, IfxPort_OutputIdx_alt1}

Definition at line 718 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_4_TOUT248_P13_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT248_P13_9_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 248, {&MODULE_P13, 9}, IfxPort_OutputIdx_alt1}

Definition at line 719 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_4_TOUT268_P10_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT268_P10_13_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 268, {&MODULE_P10,13}, IfxPort_OutputIdx_alt1}

Definition at line 720 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_4N_TOUT122_P11_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4N_TOUT122_P11_5_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 122, {&MODULE_P11, 5}, IfxPort_OutputIdx_alt1}

Definition at line 705 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_4N_TOUT129_P12_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4N_TOUT129_P12_1_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 129, {&MODULE_P12, 1}, IfxPort_OutputIdx_alt1}

Definition at line 706 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_4N_TOUT163_P01_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4N_TOUT163_P01_10_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_k, 163, {&MODULE_P01,10}, IfxPort_OutputIdx_alt1}

Definition at line 707 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_4N_TOUT165_P01_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4N_TOUT165_P01_11_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 165, {&MODULE_P01,11}, IfxPort_OutputIdx_alt1}

Definition at line 708 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_4N_TOUT177_P31_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4N_TOUT177_P31_3_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_k, 177, {&MODULE_P31, 3}, IfxPort_OutputIdx_alt1}

Definition at line 709 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_4N_TOUT209_P25_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4N_TOUT209_P25_3_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_k, 209, {&MODULE_P25, 3}, IfxPort_OutputIdx_alt1}

Definition at line 710 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_4N_TOUT267_P10_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4N_TOUT267_P10_14_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 267, {&MODULE_P10,14}, IfxPort_OutputIdx_alt1}

Definition at line 711 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_5_TOUT124_P11_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT124_P11_8_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 124, {&MODULE_P11, 8}, IfxPort_OutputIdx_alt1}

Definition at line 726 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_5_TOUT135_P22_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT135_P22_9_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_k, 135, {&MODULE_P22, 9}, IfxPort_OutputIdx_alt1}

Definition at line 727 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_5_TOUT140_P32_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT140_P32_5_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 140, {&MODULE_P32, 5}, IfxPort_OutputIdx_alt1}

Definition at line 728 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_5_TOUT159_P01_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT159_P01_1_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 159, {&MODULE_P01, 1}, IfxPort_OutputIdx_alt1}

Definition at line 729 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_5_TOUT179_P31_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT179_P31_5_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 179, {&MODULE_P31, 5}, IfxPort_OutputIdx_alt1}

Definition at line 730 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_5_TOUT211_P25_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT211_P25_5_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 211, {&MODULE_P25, 5}, IfxPort_OutputIdx_alt1}

Definition at line 731 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_5_TOUT246_P15_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT246_P15_14_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 246, {&MODULE_P15,14}, IfxPort_OutputIdx_alt1}

Definition at line 732 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_5_TOUT250_P13_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT250_P13_11_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_i, 250, {&MODULE_P13,11}, IfxPort_OutputIdx_alt1}

Definition at line 733 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_5_TOUT269_P10_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT269_P10_11_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 269, {&MODULE_P10,11}, IfxPort_OutputIdx_alt1}

Definition at line 734 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_5N_TOUT119_P11_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5N_TOUT119_P11_0_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_i, 119, {&MODULE_P11, 0}, IfxPort_OutputIdx_alt1}

Definition at line 721 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_5N_TOUT155_P01_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5N_TOUT155_P01_0_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_i, 155, {&MODULE_P01, 0}, IfxPort_OutputIdx_alt1}

Definition at line 722 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_5N_TOUT162_P01_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5N_TOUT162_P01_8_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_k, 162, {&MODULE_P01, 8}, IfxPort_OutputIdx_alt1}

Definition at line 723 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_5N_TOUT174_P31_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5N_TOUT174_P31_0_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_k, 174, {&MODULE_P31, 0}, IfxPort_OutputIdx_alt1}

Definition at line 724 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_5N_TOUT206_P25_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5N_TOUT206_P25_0_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_k, 206, {&MODULE_P25, 0}, IfxPort_OutputIdx_alt1}

Definition at line 725 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_6_TOUT125_P11_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT125_P11_13_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 125, {&MODULE_P11,13}, IfxPort_OutputIdx_alt1}

Definition at line 741 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_6_TOUT136_P22_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT136_P22_10_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_k, 136, {&MODULE_P22,10}, IfxPort_OutputIdx_alt1}

Definition at line 742 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_6_TOUT141_P32_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT141_P32_6_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 141, {&MODULE_P32, 6}, IfxPort_OutputIdx_alt1}

Definition at line 743 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_6_TOUT160_P01_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT160_P01_9_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 160, {&MODULE_P01, 9}, IfxPort_OutputIdx_alt1}

Definition at line 744 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_6_TOUT180_P31_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT180_P31_6_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 180, {&MODULE_P31, 6}, IfxPort_OutputIdx_alt1}

Definition at line 745 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_6_TOUT212_P25_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT212_P25_6_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 212, {&MODULE_P25, 6}, IfxPort_OutputIdx_alt1}

Definition at line 746 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_6_TOUT212_P26_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT212_P26_0_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 212, {&MODULE_P26, 0}, IfxPort_OutputIdx_alt1}

Definition at line 747 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_6_TOUT247_P15_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT247_P15_15_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 247, {&MODULE_P15,15}, IfxPort_OutputIdx_alt1}

Definition at line 748 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_6_TOUT249_P13_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT249_P13_12_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_i, 249, {&MODULE_P13,12}, IfxPort_OutputIdx_alt1}

Definition at line 749 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_6_TOUT270_P10_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT270_P10_15_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 270, {&MODULE_P10,15}, IfxPort_OutputIdx_alt1}

Definition at line 750 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_6N_TOUT120_P11_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6N_TOUT120_P11_1_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_i, 120, {&MODULE_P11, 1}, IfxPort_OutputIdx_alt1}

Definition at line 735 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_6N_TOUT156_P01_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6N_TOUT156_P01_2_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_i, 156, {&MODULE_P01, 2}, IfxPort_OutputIdx_alt1}

Definition at line 736 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_6N_TOUT158_P01_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6N_TOUT158_P01_12_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_k, 158, {&MODULE_P01,12}, IfxPort_OutputIdx_alt1}

Definition at line 737 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_6N_TOUT175_P31_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6N_TOUT175_P31_1_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_k, 175, {&MODULE_P31, 1}, IfxPort_OutputIdx_alt1}

Definition at line 738 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_6N_TOUT207_P25_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6N_TOUT207_P25_1_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_k, 207, {&MODULE_P25, 1}, IfxPort_OutputIdx_alt1}

Definition at line 739 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_6N_TOUT96_P11_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6N_TOUT96_P11_3_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_k, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1}

Definition at line 740 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_7_TOUT126_P11_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7_TOUT126_P11_14_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 126, {&MODULE_P11,14}, IfxPort_OutputIdx_alt1}

Definition at line 756 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_7_TOUT137_P22_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7_TOUT137_P22_11_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_k, 137, {&MODULE_P22,11}, IfxPort_OutputIdx_alt1}

Definition at line 757 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_7_TOUT142_P32_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7_TOUT142_P32_7_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 142, {&MODULE_P32, 7}, IfxPort_OutputIdx_alt1}

Definition at line 758 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_7_TOUT161_P01_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7_TOUT161_P01_13_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 161, {&MODULE_P01,13}, IfxPort_OutputIdx_alt1}

Definition at line 759 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_7_TOUT181_P31_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7_TOUT181_P31_7_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 181, {&MODULE_P31, 7}, IfxPort_OutputIdx_alt1}

Definition at line 760 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_7_TOUT213_P25_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7_TOUT213_P25_7_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 213, {&MODULE_P25, 7}, IfxPort_OutputIdx_alt1}

Definition at line 761 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_7_TOUT248_P13_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7_TOUT248_P13_9_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 248, {&MODULE_P13, 9}, IfxPort_OutputIdx_alt1}

Definition at line 762 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_7N_TOUT121_P11_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7N_TOUT121_P11_4_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_i, 121, {&MODULE_P11, 4}, IfxPort_OutputIdx_alt1}

Definition at line 751 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_7N_TOUT152_P02_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7N_TOUT152_P02_15_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_k, 152, {&MODULE_P02,15}, IfxPort_OutputIdx_alt1}

Definition at line 752 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_7N_TOUT157_P01_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7N_TOUT157_P01_15_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_i, 157, {&MODULE_P01,15}, IfxPort_OutputIdx_alt1}

Definition at line 753 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_7N_TOUT176_P31_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7N_TOUT176_P31_2_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_k, 176, {&MODULE_P31, 2}, IfxPort_OutputIdx_alt1}

Definition at line 754 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM5_7N_TOUT208_P25_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7N_TOUT208_P25_2_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_k, 208, {&MODULE_P25, 2}, IfxPort_OutputIdx_alt1}

Definition at line 755 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_0_TOUT127_P11_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT127_P11_15_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 127, {&MODULE_P11,15}, IfxPort_OutputIdx_alt1}

Definition at line 763 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_0_TOUT141_P32_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT141_P32_6_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 141, {&MODULE_P32, 6}, IfxPort_OutputIdx_alt1}

Definition at line 764 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_0_TOUT155_P01_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT155_P01_0_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 155, {&MODULE_P01, 0}, IfxPort_OutputIdx_alt1}

Definition at line 765 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_0_TOUT162_P01_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT162_P01_8_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_j, 162, {&MODULE_P01, 8}, IfxPort_OutputIdx_alt1}

Definition at line 766 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_0_TOUT182_P31_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT182_P31_8_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 182, {&MODULE_P31, 8}, IfxPort_OutputIdx_alt1}

Definition at line 767 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_0_TOUT214_P25_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT214_P25_8_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 214, {&MODULE_P25, 8}, IfxPort_OutputIdx_alt1}

Definition at line 768 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_0_TOUT242_P15_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT242_P15_10_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 242, {&MODULE_P15,10}, IfxPort_OutputIdx_alt1}

Definition at line 769 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_0_TOUT250_P13_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT250_P13_11_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 250, {&MODULE_P13,11}, IfxPort_OutputIdx_alt1}

Definition at line 770 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_1_TOUT128_P12_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT128_P12_0_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 128, {&MODULE_P12, 0}, IfxPort_OutputIdx_alt1}

Definition at line 771 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_1_TOUT142_P32_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT142_P32_7_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 142, {&MODULE_P32, 7}, IfxPort_OutputIdx_alt1}

Definition at line 772 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_1_TOUT156_P01_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT156_P01_2_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 156, {&MODULE_P01, 2}, IfxPort_OutputIdx_alt1}

Definition at line 773 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_1_TOUT164_P01_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT164_P01_14_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 164, {&MODULE_P01,14}, IfxPort_OutputIdx_alt1}

Definition at line 774 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_1_TOUT183_P31_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT183_P31_9_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 183, {&MODULE_P31, 9}, IfxPort_OutputIdx_alt1}

Definition at line 775 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_1_TOUT215_P25_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT215_P25_9_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 215, {&MODULE_P25, 9}, IfxPort_OutputIdx_alt1}

Definition at line 776 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_1_TOUT251_P13_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT251_P13_10_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 251, {&MODULE_P13,10}, IfxPort_OutputIdx_alt1}

Definition at line 777 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_1_TOUT258_P14_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT258_P14_11_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 258, {&MODULE_P14,11}, IfxPort_OutputIdx_alt1}

Definition at line 778 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_2_TOUT129_P12_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT129_P12_1_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 129, {&MODULE_P12, 1}, IfxPort_OutputIdx_alt1}

Definition at line 779 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_2_TOUT143_P33_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT143_P33_14_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 143, {&MODULE_P33,14}, IfxPort_OutputIdx_alt1}

Definition at line 780 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_2_TOUT152_P02_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT152_P02_15_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 152, {&MODULE_P02,15}, IfxPort_OutputIdx_alt1}

Definition at line 781 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_2_TOUT157_P01_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT157_P01_15_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 157, {&MODULE_P01,15}, IfxPort_OutputIdx_alt1}

Definition at line 782 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_2_TOUT184_P31_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT184_P31_10_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 184, {&MODULE_P31,10}, IfxPort_OutputIdx_alt1}

Definition at line 783 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_2_TOUT216_P25_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT216_P25_10_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 216, {&MODULE_P25,10}, IfxPort_OutputIdx_alt1}

Definition at line 784 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_2_TOUT252_P13_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT252_P13_14_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 252, {&MODULE_P13,14}, IfxPort_OutputIdx_alt1}

Definition at line 785 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_2_TOUT259_P14_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT259_P14_14_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 259, {&MODULE_P14,14}, IfxPort_OutputIdx_alt1}

Definition at line 786 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_3_TOUT111_P01_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT111_P01_3_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 111, {&MODULE_P01, 3}, IfxPort_OutputIdx_alt1}

Definition at line 787 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_3_TOUT144_P33_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT144_P33_15_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 144, {&MODULE_P33,15}, IfxPort_OutputIdx_alt1}

Definition at line 788 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_3_TOUT163_P01_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT163_P01_10_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 163, {&MODULE_P01,10}, IfxPort_OutputIdx_alt1}

Definition at line 789 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_3_TOUT165_P01_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT165_P01_11_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 165, {&MODULE_P01,11}, IfxPort_OutputIdx_alt1}

Definition at line 790 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_3_TOUT185_P31_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT185_P31_11_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 185, {&MODULE_P31,11}, IfxPort_OutputIdx_alt1}

Definition at line 791 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_3_TOUT217_P25_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT217_P25_11_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 217, {&MODULE_P25,11}, IfxPort_OutputIdx_alt1}

Definition at line 792 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_3_TOUT253_P13_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT253_P13_4_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 253, {&MODULE_P13, 4}, IfxPort_OutputIdx_alt1}

Definition at line 793 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_3_TOUT260_P14_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT260_P14_13_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 260, {&MODULE_P14,13}, IfxPort_OutputIdx_alt1}

Definition at line 794 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_4_TOUT140_P32_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT140_P32_5_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 140, {&MODULE_P32, 5}, IfxPort_OutputIdx_alt1}

Definition at line 795 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_4_TOUT143_P33_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT143_P33_14_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 143, {&MODULE_P33,14}, IfxPort_OutputIdx_alt1}

Definition at line 796 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_4_TOUT158_P01_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT158_P01_12_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 158, {&MODULE_P01,12}, IfxPort_OutputIdx_alt1}

Definition at line 797 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_4_TOUT186_P31_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT186_P31_12_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 186, {&MODULE_P31,12}, IfxPort_OutputIdx_alt1}

Definition at line 798 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_4_TOUT218_P25_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT218_P25_12_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 218, {&MODULE_P25,12}, IfxPort_OutputIdx_alt1}

Definition at line 799 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_4_TOUT254_P13_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT254_P13_5_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 254, {&MODULE_P13, 5}, IfxPort_OutputIdx_alt1}

Definition at line 800 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_4_TOUT261_P14_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT261_P14_12_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 261, {&MODULE_P14,12}, IfxPort_OutputIdx_alt1}

Definition at line 801 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_4_TOUT31_P33_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT31_P33_9_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1}

Definition at line 802 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_5_TOUT146_P34_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_5_TOUT146_P34_1_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 146, {&MODULE_P34, 1}, IfxPort_OutputIdx_alt1}

Definition at line 803 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_5_TOUT159_P01_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_5_TOUT159_P01_1_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 159, {&MODULE_P01, 1}, IfxPort_OutputIdx_alt1}

Definition at line 804 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_5_TOUT187_P31_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_5_TOUT187_P31_13_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 187, {&MODULE_P31,13}, IfxPort_OutputIdx_alt1}

Definition at line 805 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_5_TOUT219_P25_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_5_TOUT219_P25_13_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 219, {&MODULE_P25,13}, IfxPort_OutputIdx_alt1}

Definition at line 806 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_5_TOUT243_P15_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_5_TOUT243_P15_11_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_i, 243, {&MODULE_P15,11}, IfxPort_OutputIdx_alt1}

Definition at line 807 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_5_TOUT255_P13_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_5_TOUT255_P13_6_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 255, {&MODULE_P13, 6}, IfxPort_OutputIdx_alt1}

Definition at line 808 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_5_TOUT262_P13_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_5_TOUT262_P13_13_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 262, {&MODULE_P13,13}, IfxPort_OutputIdx_alt1}

Definition at line 809 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_6_TOUT147_P34_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_6_TOUT147_P34_2_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 147, {&MODULE_P34, 2}, IfxPort_OutputIdx_alt1}

Definition at line 810 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_6_TOUT160_P01_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_6_TOUT160_P01_9_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 160, {&MODULE_P01, 9}, IfxPort_OutputIdx_alt1}

Definition at line 811 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_6_TOUT188_P31_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_6_TOUT188_P31_14_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 188, {&MODULE_P31,14}, IfxPort_OutputIdx_alt1}

Definition at line 812 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_6_TOUT220_P25_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_6_TOUT220_P25_14_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 220, {&MODULE_P25,14}, IfxPort_OutputIdx_alt1}

Definition at line 813 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_6_TOUT256_P13_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_6_TOUT256_P13_7_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 256, {&MODULE_P13, 7}, IfxPort_OutputIdx_alt1}

Definition at line 814 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_6_TOUT263_P14_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_6_TOUT263_P14_15_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 263, {&MODULE_P14,15}, IfxPort_OutputIdx_alt1}

Definition at line 815 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_7_TOUT148_P34_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_7_TOUT148_P34_3_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 148, {&MODULE_P34, 3}, IfxPort_OutputIdx_alt1}

Definition at line 816 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_7_TOUT161_P01_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_7_TOUT161_P01_13_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 161, {&MODULE_P01,13}, IfxPort_OutputIdx_alt1}

Definition at line 817 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_7_TOUT189_P31_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_7_TOUT189_P31_15_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 189, {&MODULE_P31,15}, IfxPort_OutputIdx_alt1}

Definition at line 818 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_7_TOUT221_P25_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_7_TOUT221_P25_15_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 221, {&MODULE_P25,15}, IfxPort_OutputIdx_alt1}

Definition at line 819 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_7_TOUT244_P15_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_7_TOUT244_P15_12_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_i, 244, {&MODULE_P15,12}, IfxPort_OutputIdx_alt1}

Definition at line 820 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM6_7_TOUT264_P13_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_7_TOUT264_P13_15_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 264, {&MODULE_P13,15}, IfxPort_OutputIdx_alt1}

Definition at line 821 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_0_TOUT149_P34_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_0_TOUT149_P34_4_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 149, {&MODULE_P34, 4}, IfxPort_OutputIdx_alt1}

Definition at line 822 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_0_TOUT162_P01_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_0_TOUT162_P01_8_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 162, {&MODULE_P01, 8}, IfxPort_OutputIdx_alt1}

Definition at line 823 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_0_TOUT190_P30_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_0_TOUT190_P30_0_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 190, {&MODULE_P30, 0}, IfxPort_OutputIdx_alt1}

Definition at line 824 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_0_TOUT222_P24_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_0_TOUT222_P24_0_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 222, {&MODULE_P24, 0}, IfxPort_OutputIdx_alt1}

Definition at line 825 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_0_TOUT249_P13_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_0_TOUT249_P13_12_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 249, {&MODULE_P13,12}, IfxPort_OutputIdx_alt1}

Definition at line 826 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_0_TOUT258_P14_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_0_TOUT258_P14_11_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_j, 258, {&MODULE_P14,11}, IfxPort_OutputIdx_alt1}

Definition at line 827 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_1_TOUT150_P34_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT150_P34_5_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 150, {&MODULE_P34, 5}, IfxPort_OutputIdx_alt1}

Definition at line 828 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_1_TOUT163_P01_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT163_P01_10_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 163, {&MODULE_P01,10}, IfxPort_OutputIdx_alt1}

Definition at line 829 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_1_TOUT191_P30_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT191_P30_1_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 191, {&MODULE_P30, 1}, IfxPort_OutputIdx_alt1}

Definition at line 830 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_1_TOUT223_P24_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT223_P24_1_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 223, {&MODULE_P24, 1}, IfxPort_OutputIdx_alt1}

Definition at line 831 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_1_TOUT242_P15_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT242_P15_10_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 242, {&MODULE_P15,10}, IfxPort_OutputIdx_alt1}

Definition at line 832 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_1_TOUT245_P15_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT245_P15_13_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 245, {&MODULE_P15,13}, IfxPort_OutputIdx_alt1}

Definition at line 833 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_1_TOUT253_P13_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT253_P13_4_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 253, {&MODULE_P13, 4}, IfxPort_OutputIdx_alt1}

Definition at line 834 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_1_TOUT265_P10_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT265_P10_9_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 265, {&MODULE_P10, 9}, IfxPort_OutputIdx_alt1}

Definition at line 835 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_2_TOUT164_P01_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_2_TOUT164_P01_14_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 164, {&MODULE_P01,14}, IfxPort_OutputIdx_alt1}

Definition at line 836 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_2_TOUT192_P30_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_2_TOUT192_P30_2_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 192, {&MODULE_P30, 2}, IfxPort_OutputIdx_alt1}

Definition at line 837 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_2_TOUT224_P24_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_2_TOUT224_P24_2_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 224, {&MODULE_P24, 2}, IfxPort_OutputIdx_alt1}

Definition at line 838 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_2_TOUT243_P15_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_2_TOUT243_P15_11_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 243, {&MODULE_P15,11}, IfxPort_OutputIdx_alt1}

Definition at line 839 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_2_TOUT246_P15_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_2_TOUT246_P15_14_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 246, {&MODULE_P15,14}, IfxPort_OutputIdx_alt1}

Definition at line 840 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_2_TOUT254_P13_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_2_TOUT254_P13_5_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 254, {&MODULE_P13, 5}, IfxPort_OutputIdx_alt1}

Definition at line 841 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_2_TOUT266_P10_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_2_TOUT266_P10_10_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 266, {&MODULE_P10,10}, IfxPort_OutputIdx_alt1}

Definition at line 842 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_3_TOUT166_P00_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_3_TOUT166_P00_14_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 166, {&MODULE_P00,14}, IfxPort_OutputIdx_alt1}

Definition at line 843 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_3_TOUT193_P30_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_3_TOUT193_P30_3_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 193, {&MODULE_P30, 3}, IfxPort_OutputIdx_alt1}

Definition at line 844 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_3_TOUT225_P24_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_3_TOUT225_P24_3_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 225, {&MODULE_P24, 3}, IfxPort_OutputIdx_alt1}

Definition at line 845 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_3_TOUT244_P15_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_3_TOUT244_P15_12_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 244, {&MODULE_P15,12}, IfxPort_OutputIdx_alt1}

Definition at line 846 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_3_TOUT247_P15_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_3_TOUT247_P15_15_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 247, {&MODULE_P15,15}, IfxPort_OutputIdx_alt1}

Definition at line 847 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_3_TOUT255_P13_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_3_TOUT255_P13_6_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 255, {&MODULE_P13, 6}, IfxPort_OutputIdx_alt1}

Definition at line 848 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_3_TOUT267_P10_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_3_TOUT267_P10_14_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 267, {&MODULE_P10,14}, IfxPort_OutputIdx_alt1}

Definition at line 849 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_4_TOUT167_P00_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_4_TOUT167_P00_13_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 167, {&MODULE_P00,13}, IfxPort_OutputIdx_alt1}

Definition at line 850 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_4_TOUT194_P30_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_4_TOUT194_P30_4_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 194, {&MODULE_P30, 4}, IfxPort_OutputIdx_alt1}

Definition at line 851 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_4_TOUT226_P24_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_4_TOUT226_P24_4_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 226, {&MODULE_P24, 4}, IfxPort_OutputIdx_alt1}

Definition at line 852 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_4_TOUT245_P15_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_4_TOUT245_P15_13_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 245, {&MODULE_P15,13}, IfxPort_OutputIdx_alt1}

Definition at line 853 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_4_TOUT248_P13_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_4_TOUT248_P13_9_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 248, {&MODULE_P13, 9}, IfxPort_OutputIdx_alt1}

Definition at line 854 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_4_TOUT268_P10_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_4_TOUT268_P10_13_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 268, {&MODULE_P10,13}, IfxPort_OutputIdx_alt1}

Definition at line 855 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_5_TOUT168_P00_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_5_TOUT168_P00_15_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 168, {&MODULE_P00,15}, IfxPort_OutputIdx_alt1}

Definition at line 856 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_5_TOUT195_P30_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_5_TOUT195_P30_5_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 195, {&MODULE_P30, 5}, IfxPort_OutputIdx_alt1}

Definition at line 857 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_5_TOUT227_P24_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_5_TOUT227_P24_5_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 227, {&MODULE_P24, 5}, IfxPort_OutputIdx_alt1}

Definition at line 858 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_5_TOUT246_P15_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_5_TOUT246_P15_14_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 246, {&MODULE_P15,14}, IfxPort_OutputIdx_alt1}

Definition at line 859 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_5_TOUT251_P13_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_5_TOUT251_P13_10_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 251, {&MODULE_P13,10}, IfxPort_OutputIdx_alt1}

Definition at line 860 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_5_TOUT269_P10_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_5_TOUT269_P10_11_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 269, {&MODULE_P10,11}, IfxPort_OutputIdx_alt1}

Definition at line 861 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_6_TOUT151_P02_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_6_TOUT151_P02_12_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 151, {&MODULE_P02,12}, IfxPort_OutputIdx_alt1}

Definition at line 862 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_6_TOUT153_P02_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_6_TOUT153_P02_13_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 153, {&MODULE_P02,13}, IfxPort_OutputIdx_alt1}

Definition at line 863 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_6_TOUT196_P30_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_6_TOUT196_P30_6_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 196, {&MODULE_P30, 6}, IfxPort_OutputIdx_alt1}

Definition at line 864 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_6_TOUT228_P24_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_6_TOUT228_P24_6_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 228, {&MODULE_P24, 6}, IfxPort_OutputIdx_alt1}

Definition at line 865 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_6_TOUT247_P15_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_6_TOUT247_P15_15_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 247, {&MODULE_P15,15}, IfxPort_OutputIdx_alt1}

Definition at line 866 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_6_TOUT249_P13_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_6_TOUT249_P13_12_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 249, {&MODULE_P13,12}, IfxPort_OutputIdx_alt1}

Definition at line 867 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_6_TOUT270_P10_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_6_TOUT270_P10_15_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 270, {&MODULE_P10,15}, IfxPort_OutputIdx_alt1}

Definition at line 868 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_7_TOUT152_P02_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_7_TOUT152_P02_15_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 152, {&MODULE_P02,15}, IfxPort_OutputIdx_alt1}

Definition at line 869 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_7_TOUT154_P02_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_7_TOUT154_P02_14_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 154, {&MODULE_P02,14}, IfxPort_OutputIdx_alt1}

Definition at line 870 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_7_TOUT161_P01_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_7_TOUT161_P01_13_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_k, 161, {&MODULE_P01,13}, IfxPort_OutputIdx_alt1}

Definition at line 871 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_7_TOUT197_P30_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_7_TOUT197_P30_7_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 197, {&MODULE_P30, 7}, IfxPort_OutputIdx_alt1}

Definition at line 872 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_7_TOUT229_P24_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_7_TOUT229_P24_7_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 229, {&MODULE_P24, 7}, IfxPort_OutputIdx_alt1}

Definition at line 873 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_7_TOUT248_P13_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_7_TOUT248_P13_9_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 248, {&MODULE_P13, 9}, IfxPort_OutputIdx_alt1}

Definition at line 874 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM7_7_TOUT261_P14_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_7_TOUT261_P14_12_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 261, {&MODULE_P14,12}, IfxPort_OutputIdx_alt1}

Definition at line 875 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM8_0_TOUT162_P01_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_0_TOUT162_P01_8_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 162, {&MODULE_P01, 8}, IfxPort_OutputIdx_alt1}

Definition at line 876 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM8_0_TOUT198_P30_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_0_TOUT198_P30_8_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 198, {&MODULE_P30, 8}, IfxPort_OutputIdx_alt1}

Definition at line 877 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM8_0_TOUT230_P24_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_0_TOUT230_P24_8_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 230, {&MODULE_P24, 8}, IfxPort_OutputIdx_alt1}

Definition at line 878 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM8_0_TOUT242_P15_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_0_TOUT242_P15_10_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_j, 242, {&MODULE_P15,10}, IfxPort_OutputIdx_alt1}

Definition at line 879 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM8_0_TOUT250_P13_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_0_TOUT250_P13_11_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 250, {&MODULE_P13,11}, IfxPort_OutputIdx_alt1}

Definition at line 880 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM8_1_TOUT163_P01_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_1_TOUT163_P01_10_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 163, {&MODULE_P01,10}, IfxPort_OutputIdx_alt1}

Definition at line 881 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM8_1_TOUT199_P30_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_1_TOUT199_P30_9_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 199, {&MODULE_P30, 9}, IfxPort_OutputIdx_alt1}

Definition at line 882 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM8_1_TOUT231_P24_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_1_TOUT231_P24_9_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 231, {&MODULE_P24, 9}, IfxPort_OutputIdx_alt1}

Definition at line 883 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM8_1_TOUT251_P13_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_1_TOUT251_P13_10_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 251, {&MODULE_P13,10}, IfxPort_OutputIdx_alt1}

Definition at line 884 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM8_1_TOUT258_P14_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_1_TOUT258_P14_11_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 258, {&MODULE_P14,11}, IfxPort_OutputIdx_alt1}

Definition at line 885 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM8_2_TOUT164_P01_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_2_TOUT164_P01_14_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 164, {&MODULE_P01,14}, IfxPort_OutputIdx_alt1}

Definition at line 886 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM8_2_TOUT200_P30_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_2_TOUT200_P30_10_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 200, {&MODULE_P30,10}, IfxPort_OutputIdx_alt1}

Definition at line 887 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM8_2_TOUT232_P24_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_2_TOUT232_P24_10_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 232, {&MODULE_P24,10}, IfxPort_OutputIdx_alt1}

Definition at line 888 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM8_2_TOUT252_P13_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_2_TOUT252_P13_14_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 252, {&MODULE_P13,14}, IfxPort_OutputIdx_alt1}

Definition at line 889 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM8_2_TOUT259_P14_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_2_TOUT259_P14_14_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 259, {&MODULE_P14,14}, IfxPort_OutputIdx_alt1}

Definition at line 890 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM8_3_TOUT166_P00_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_3_TOUT166_P00_14_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 166, {&MODULE_P00,14}, IfxPort_OutputIdx_alt1}

Definition at line 891 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM8_3_TOUT201_P30_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_3_TOUT201_P30_11_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 201, {&MODULE_P30,11}, IfxPort_OutputIdx_alt1}

Definition at line 892 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM8_3_TOUT233_P24_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_3_TOUT233_P24_11_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 233, {&MODULE_P24,11}, IfxPort_OutputIdx_alt1}

Definition at line 893 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM8_3_TOUT253_P13_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_3_TOUT253_P13_4_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 253, {&MODULE_P13, 4}, IfxPort_OutputIdx_alt1}

Definition at line 894 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM8_3_TOUT260_P14_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_3_TOUT260_P14_13_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 260, {&MODULE_P14,13}, IfxPort_OutputIdx_alt1}

Definition at line 895 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM8_4_TOUT167_P00_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_4_TOUT167_P00_13_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 167, {&MODULE_P00,13}, IfxPort_OutputIdx_alt1}

Definition at line 896 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM8_4_TOUT202_P30_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_4_TOUT202_P30_12_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 202, {&MODULE_P30,12}, IfxPort_OutputIdx_alt1}

Definition at line 897 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM8_4_TOUT234_P24_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_4_TOUT234_P24_12_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 234, {&MODULE_P24,12}, IfxPort_OutputIdx_alt1}

Definition at line 898 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM8_4_TOUT254_P13_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_4_TOUT254_P13_5_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 254, {&MODULE_P13, 5}, IfxPort_OutputIdx_alt1}

Definition at line 899 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM8_4_TOUT261_P14_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_4_TOUT261_P14_12_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 261, {&MODULE_P14,12}, IfxPort_OutputIdx_alt1}

Definition at line 900 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM8_5_TOUT168_P00_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_5_TOUT168_P00_15_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 168, {&MODULE_P00,15}, IfxPort_OutputIdx_alt1}

Definition at line 901 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM8_5_TOUT203_P30_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_5_TOUT203_P30_13_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 203, {&MODULE_P30,13}, IfxPort_OutputIdx_alt1}

Definition at line 902 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM8_5_TOUT235_P24_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_5_TOUT235_P24_13_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 235, {&MODULE_P24,13}, IfxPort_OutputIdx_alt1}

Definition at line 903 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM8_5_TOUT243_P15_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_5_TOUT243_P15_11_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 243, {&MODULE_P15,11}, IfxPort_OutputIdx_alt1}

Definition at line 904 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM8_5_TOUT255_P13_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_5_TOUT255_P13_6_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 255, {&MODULE_P13, 6}, IfxPort_OutputIdx_alt1}

Definition at line 905 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM8_5_TOUT262_P13_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_5_TOUT262_P13_13_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 262, {&MODULE_P13,13}, IfxPort_OutputIdx_alt1}

Definition at line 906 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM8_6_TOUT151_P02_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_6_TOUT151_P02_12_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 151, {&MODULE_P02,12}, IfxPort_OutputIdx_alt1}

Definition at line 907 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM8_6_TOUT153_P02_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_6_TOUT153_P02_13_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 153, {&MODULE_P02,13}, IfxPort_OutputIdx_alt1}

Definition at line 908 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM8_6_TOUT204_P30_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_6_TOUT204_P30_14_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 204, {&MODULE_P30,14}, IfxPort_OutputIdx_alt1}

Definition at line 909 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM8_6_TOUT236_P24_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_6_TOUT236_P24_14_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 236, {&MODULE_P24,14}, IfxPort_OutputIdx_alt1}

Definition at line 910 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM8_6_TOUT256_P13_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_6_TOUT256_P13_7_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 256, {&MODULE_P13, 7}, IfxPort_OutputIdx_alt1}

Definition at line 911 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM8_6_TOUT263_P14_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_6_TOUT263_P14_15_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 263, {&MODULE_P14,15}, IfxPort_OutputIdx_alt1}

Definition at line 912 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM8_7_TOUT152_P02_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_7_TOUT152_P02_15_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 152, {&MODULE_P02,15}, IfxPort_OutputIdx_alt1}

Definition at line 913 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM8_7_TOUT154_P02_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_7_TOUT154_P02_14_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 154, {&MODULE_P02,14}, IfxPort_OutputIdx_alt1}

Definition at line 914 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM8_7_TOUT161_P01_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_7_TOUT161_P01_13_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_l, 161, {&MODULE_P01,13}, IfxPort_OutputIdx_alt1}

Definition at line 915 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM8_7_TOUT205_P30_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_7_TOUT205_P30_15_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 205, {&MODULE_P30,15}, IfxPort_OutputIdx_alt1}

Definition at line 916 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM8_7_TOUT237_P24_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_7_TOUT237_P24_15_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 237, {&MODULE_P24,15}, IfxPort_OutputIdx_alt1}

Definition at line 917 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM8_7_TOUT244_P15_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_7_TOUT244_P15_12_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 244, {&MODULE_P15,12}, IfxPort_OutputIdx_alt1}

Definition at line 918 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM8_7_TOUT264_P13_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_7_TOUT264_P13_15_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 264, {&MODULE_P13,15}, IfxPort_OutputIdx_alt1}

Definition at line 919 of file IfxGtm_PinMap.c.

◆ IfxGtm_CLK0_P23_1_OUT

IfxGtm_Clk_Out IfxGtm_CLK0_P23_1_OUT = {&MODULE_GTM, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt4}

Definition at line 920 of file IfxGtm_PinMap.c.

◆ IfxGtm_CLK1_P32_4_OUT

IfxGtm_Clk_Out IfxGtm_CLK1_P32_4_OUT = {&MODULE_GTM, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt4}

Definition at line 921 of file IfxGtm_PinMap.c.

◆ IfxGtm_CLK2_P11_12_OUT

IfxGtm_Clk_Out IfxGtm_CLK2_P11_12_OUT = {&MODULE_GTM, {&MODULE_P11,12}, IfxPort_OutputIdx_alt3}

Definition at line 922 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_0_P00_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P00_9_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P00, 9}, (IfxGtm_ChXSel)1}

Definition at line 923 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_0_P02_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P02_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P02, 0}, (IfxGtm_ChXSel)2}

Definition at line 924 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_0_P10_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P10_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P10, 7}, (IfxGtm_ChXSel)3}

Definition at line 925 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_0_P13_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P13_12_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P13,12}, (IfxGtm_ChXSel)11}

Definition at line 926 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_0_P14_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P14_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P14, 5}, (IfxGtm_ChXSel)4}

Definition at line 927 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_0_P14_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P14_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P14, 7}, (IfxGtm_ChXSel)5}

Definition at line 928 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_0_P15_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P15_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P15, 6}, (IfxGtm_ChXSel)6}

Definition at line 929 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_0_P21_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P21_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P21, 2}, (IfxGtm_ChXSel)7}

Definition at line 930 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_0_P22_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P22_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P22, 1}, (IfxGtm_ChXSel)8}

Definition at line 931 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_0_P33_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P33_10_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P33,10}, (IfxGtm_ChXSel)9}

Definition at line 932 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_0_P33_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P33_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P33, 4}, (IfxGtm_ChXSel)10}

Definition at line 933 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_1_P00_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P00_10_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P00,10}, (IfxGtm_ChXSel)1}

Definition at line 934 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_1_P02_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P02_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P02, 1}, (IfxGtm_ChXSel)2}

Definition at line 935 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_1_P10_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P10_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P10, 1}, (IfxGtm_ChXSel)3}

Definition at line 936 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_1_P10_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P10_9_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P10, 9}, (IfxGtm_ChXSel)10}

Definition at line 937 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_1_P14_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P14_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P14, 6}, (IfxGtm_ChXSel)4}

Definition at line 938 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_1_P15_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P15_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P15, 7}, (IfxGtm_ChXSel)5}

Definition at line 939 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_1_P21_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P21_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P21, 3}, (IfxGtm_ChXSel)6}

Definition at line 940 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_1_P22_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P22_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P22, 0}, (IfxGtm_ChXSel)7}

Definition at line 941 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_1_P33_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P33_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P33, 5}, (IfxGtm_ChXSel)8}

Definition at line 942 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_1_P33_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P33_9_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P33, 9}, (IfxGtm_ChXSel)9}

Definition at line 943 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_2_P00_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P00_11_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P00,11}, (IfxGtm_ChXSel)1}

Definition at line 944 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_2_P02_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P02_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P02, 2}, (IfxGtm_ChXSel)2}

Definition at line 945 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_2_P02_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P02_9_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P02, 9}, (IfxGtm_ChXSel)10}

Definition at line 946 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_2_P10_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P10_10_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P10,10}, (IfxGtm_ChXSel)11}

Definition at line 947 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_2_P10_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P10_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P10, 2}, (IfxGtm_ChXSel)3}

Definition at line 948 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_2_P10_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P10_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P10, 5}, (IfxGtm_ChXSel)4}

Definition at line 949 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_2_P15_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P15_8_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P15, 8}, (IfxGtm_ChXSel)5}

Definition at line 950 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_2_P21_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P21_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P21, 4}, (IfxGtm_ChXSel)6}

Definition at line 951 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_2_P23_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P23_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P23, 5}, (IfxGtm_ChXSel)7}

Definition at line 952 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_2_P33_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P33_11_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P33,11}, (IfxGtm_ChXSel)8}

Definition at line 953 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_2_P33_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P33_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P33, 6}, (IfxGtm_ChXSel)9}

Definition at line 954 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_3_P00_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P00_12_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P00,12}, (IfxGtm_ChXSel)1}

Definition at line 955 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_3_P02_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P02_10_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P02,10}, (IfxGtm_ChXSel)10}

Definition at line 956 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_3_P02_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P02_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P02, 3}, (IfxGtm_ChXSel)2}

Definition at line 957 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_3_P10_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P10_14_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P10,14}, (IfxGtm_ChXSel)11}

Definition at line 958 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_3_P10_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P10_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P10, 3}, (IfxGtm_ChXSel)3}

Definition at line 959 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_3_P10_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P10_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P10, 6}, (IfxGtm_ChXSel)4}

Definition at line 960 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_3_P14_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P14_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P14, 0}, (IfxGtm_ChXSel)5}

Definition at line 961 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_3_P21_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P21_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P21, 5}, (IfxGtm_ChXSel)6}

Definition at line 962 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_3_P22_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P22_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P22, 2}, (IfxGtm_ChXSel)7}

Definition at line 963 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_3_P32_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P32_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P32, 2}, (IfxGtm_ChXSel)8}

Definition at line 964 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_3_P33_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P33_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P33, 7}, (IfxGtm_ChXSel)9}

Definition at line 965 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_4_P02_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P02_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P02, 4}, (IfxGtm_ChXSel)1}

Definition at line 966 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_4_P10_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P10_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P10, 0}, (IfxGtm_ChXSel)2}

Definition at line 967 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_4_P10_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P10_13_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P10,13}, (IfxGtm_ChXSel)9}

Definition at line 968 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_4_P14_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P14_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P14, 1}, (IfxGtm_ChXSel)3}

Definition at line 969 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_4_P21_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P21_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P21, 6}, (IfxGtm_ChXSel)8}

Definition at line 970 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_4_P22_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P22_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P22, 3}, (IfxGtm_ChXSel)4}

Definition at line 971 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_4_P32_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P32_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P32, 3}, (IfxGtm_ChXSel)5}

Definition at line 972 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_4_P33_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P33_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P33, 0}, (IfxGtm_ChXSel)6}

Definition at line 973 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_4_P33_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P33_8_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P33, 8}, (IfxGtm_ChXSel)7}

Definition at line 974 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_5_P01_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P01_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P01, 3}, (IfxGtm_ChXSel)8}

Definition at line 975 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_5_P02_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P02_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P02, 5}, (IfxGtm_ChXSel)1}

Definition at line 976 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_5_P10_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P10_11_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P10,11}, (IfxGtm_ChXSel)9}

Definition at line 977 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_5_P10_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P10_8_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P10, 8}, (IfxGtm_ChXSel)2}

Definition at line 978 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_5_P14_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P14_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P14, 2}, (IfxGtm_ChXSel)3}

Definition at line 979 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_5_P21_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P21_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P21, 7}, (IfxGtm_ChXSel)7}

Definition at line 980 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_5_P23_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P23_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P23, 0}, (IfxGtm_ChXSel)4}

Definition at line 981 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_5_P32_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P32_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P32, 4}, (IfxGtm_ChXSel)5}

Definition at line 982 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_5_P33_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P33_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P33, 1}, (IfxGtm_ChXSel)6}

Definition at line 983 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_6_P01_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P01_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P01, 4}, (IfxGtm_ChXSel)8}

Definition at line 984 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_6_P02_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P02_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P02, 6}, (IfxGtm_ChXSel)1}

Definition at line 985 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_6_P10_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P10_15_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P10,15}, (IfxGtm_ChXSel)9}

Definition at line 986 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_6_P10_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P10_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P10, 4}, (IfxGtm_ChXSel)2}

Definition at line 987 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_6_P14_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P14_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P14, 3}, (IfxGtm_ChXSel)3}

Definition at line 988 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_6_P20_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P20_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P20, 0}, (IfxGtm_ChXSel)7}

Definition at line 989 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_6_P23_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P23_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P23, 1}, (IfxGtm_ChXSel)4}

Definition at line 990 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_6_P23_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P23_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P23, 2}, (IfxGtm_ChXSel)5}

Definition at line 991 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_6_P33_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P33_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P33, 2}, (IfxGtm_ChXSel)6}

Definition at line 992 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_7_P02_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P02_11_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P02,11}, (IfxGtm_ChXSel)7}

Definition at line 993 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_7_P02_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P02_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P02, 7}, (IfxGtm_ChXSel)1}

Definition at line 994 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_7_P11_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P11_15_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P11,15}, (IfxGtm_ChXSel)8}

Definition at line 995 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_7_P14_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P14_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P14, 4}, (IfxGtm_ChXSel)2}

Definition at line 996 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_7_P20_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P20_8_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P20, 8}, (IfxGtm_ChXSel)3}

Definition at line 997 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_7_P23_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P23_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P23, 3}, (IfxGtm_ChXSel)4}

Definition at line 998 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_7_P23_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P23_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P23, 4}, (IfxGtm_ChXSel)5}

Definition at line 999 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_7_P33_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P33_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P33, 3}, (IfxGtm_ChXSel)6}

Definition at line 1000 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_0_P00_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P00_9_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P00, 9}, (IfxGtm_ChXSel)1}

Definition at line 1001 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_0_P02_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P02_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P02, 0}, (IfxGtm_ChXSel)2}

Definition at line 1002 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_0_P10_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P10_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P10, 7}, (IfxGtm_ChXSel)3}

Definition at line 1003 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_0_P14_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P14_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P14, 5}, (IfxGtm_ChXSel)4}

Definition at line 1004 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_0_P14_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P14_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P14, 7}, (IfxGtm_ChXSel)5}

Definition at line 1005 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_0_P15_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P15_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P15, 6}, (IfxGtm_ChXSel)6}

Definition at line 1006 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_0_P21_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P21_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P21, 2}, (IfxGtm_ChXSel)7}

Definition at line 1007 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_0_P22_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P22_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P22, 1}, (IfxGtm_ChXSel)8}

Definition at line 1008 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_0_P33_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P33_10_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P33,10}, (IfxGtm_ChXSel)9}

Definition at line 1009 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_0_P33_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P33_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P33, 4}, (IfxGtm_ChXSel)10}

Definition at line 1010 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_1_P00_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P00_10_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P00,10}, (IfxGtm_ChXSel)1}

Definition at line 1011 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_1_P02_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P02_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P02, 1}, (IfxGtm_ChXSel)2}

Definition at line 1012 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_1_P10_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P10_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P10, 1}, (IfxGtm_ChXSel)3}

Definition at line 1013 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_1_P14_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P14_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P14, 6}, (IfxGtm_ChXSel)4}

Definition at line 1014 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_1_P15_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P15_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P15, 7}, (IfxGtm_ChXSel)5}

Definition at line 1015 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_1_P21_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P21_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P21, 3}, (IfxGtm_ChXSel)6}

Definition at line 1016 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_1_P22_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P22_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P22, 0}, (IfxGtm_ChXSel)7}

Definition at line 1017 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_1_P33_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P33_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P33, 5}, (IfxGtm_ChXSel)8}

Definition at line 1018 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_1_P33_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P33_9_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P33, 9}, (IfxGtm_ChXSel)9}

Definition at line 1019 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_2_P00_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P00_11_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P00,11}, (IfxGtm_ChXSel)1}

Definition at line 1020 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_2_P02_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P02_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P02, 2}, (IfxGtm_ChXSel)2}

Definition at line 1021 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_2_P10_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P10_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P10, 2}, (IfxGtm_ChXSel)3}

Definition at line 1022 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_2_P10_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P10_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P10, 5}, (IfxGtm_ChXSel)4}

Definition at line 1023 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_2_P15_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P15_8_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P15, 8}, (IfxGtm_ChXSel)5}

Definition at line 1024 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_2_P21_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P21_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P21, 4}, (IfxGtm_ChXSel)6}

Definition at line 1025 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_2_P23_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P23_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P23, 5}, (IfxGtm_ChXSel)7}

Definition at line 1026 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_2_P23_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P23_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P23, 6}, (IfxGtm_ChXSel)10}

Definition at line 1027 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_2_P33_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P33_11_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P33,11}, (IfxGtm_ChXSel)8}

Definition at line 1028 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_2_P33_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P33_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P33, 6}, (IfxGtm_ChXSel)9}

Definition at line 1029 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_3_P00_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P00_12_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P00,12}, (IfxGtm_ChXSel)1}

Definition at line 1030 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_3_P02_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P02_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P02, 3}, (IfxGtm_ChXSel)2}

Definition at line 1031 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_3_P10_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P10_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P10, 3}, (IfxGtm_ChXSel)3}

Definition at line 1032 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_3_P10_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P10_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P10, 6}, (IfxGtm_ChXSel)4}

Definition at line 1033 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_3_P14_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P14_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P14, 0}, (IfxGtm_ChXSel)5}

Definition at line 1034 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_3_P21_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P21_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P21, 5}, (IfxGtm_ChXSel)6}

Definition at line 1035 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_3_P22_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P22_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P22, 2}, (IfxGtm_ChXSel)7}

Definition at line 1036 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_3_P23_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P23_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P23, 7}, (IfxGtm_ChXSel)10}

Definition at line 1037 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_3_P32_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P32_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P32, 2}, (IfxGtm_ChXSel)8}

Definition at line 1038 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_3_P33_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P33_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P33, 7}, (IfxGtm_ChXSel)9}

Definition at line 1039 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_4_P02_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P02_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P02, 4}, (IfxGtm_ChXSel)1}

Definition at line 1040 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_4_P10_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P10_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P10, 0}, (IfxGtm_ChXSel)2}

Definition at line 1041 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_4_P14_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P14_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P14, 1}, (IfxGtm_ChXSel)3}

Definition at line 1042 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_4_P20_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P20_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P20, 0}, (IfxGtm_ChXSel)9}

Definition at line 1043 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_4_P21_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P21_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P21, 6}, (IfxGtm_ChXSel)8}

Definition at line 1044 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_4_P22_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P22_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P22, 3}, (IfxGtm_ChXSel)4}

Definition at line 1045 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_4_P32_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P32_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P32, 3}, (IfxGtm_ChXSel)5}

Definition at line 1046 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_4_P33_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P33_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P33, 0}, (IfxGtm_ChXSel)6}

Definition at line 1047 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_4_P33_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P33_8_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P33, 8}, (IfxGtm_ChXSel)7}

Definition at line 1048 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_5_P02_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P02_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P02, 5}, (IfxGtm_ChXSel)1}

Definition at line 1049 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_5_P10_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P10_8_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P10, 8}, (IfxGtm_ChXSel)2}

Definition at line 1050 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_5_P14_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P14_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P14, 2}, (IfxGtm_ChXSel)3}

Definition at line 1051 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_5_P20_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P20_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P20, 7}, (IfxGtm_ChXSel)8}

Definition at line 1052 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_5_P21_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P21_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P21, 7}, (IfxGtm_ChXSel)7}

Definition at line 1053 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_5_P23_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P23_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P23, 0}, (IfxGtm_ChXSel)4}

Definition at line 1054 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_5_P32_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P32_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P32, 4}, (IfxGtm_ChXSel)5}

Definition at line 1055 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_5_P33_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P33_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P33, 1}, (IfxGtm_ChXSel)6}

Definition at line 1056 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_6_P02_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_6_P02_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P02, 6}, (IfxGtm_ChXSel)1}

Definition at line 1057 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_6_P10_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_6_P10_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P10, 4}, (IfxGtm_ChXSel)2}

Definition at line 1058 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_6_P14_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_6_P14_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P14, 3}, (IfxGtm_ChXSel)3}

Definition at line 1059 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_6_P20_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_6_P20_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P20, 0}, (IfxGtm_ChXSel)7}

Definition at line 1060 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_6_P23_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_6_P23_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P23, 1}, (IfxGtm_ChXSel)4}

Definition at line 1061 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_6_P23_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_6_P23_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P23, 2}, (IfxGtm_ChXSel)5}

Definition at line 1062 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_6_P33_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_6_P33_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P33, 2}, (IfxGtm_ChXSel)6}

Definition at line 1063 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_7_P02_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_7_P02_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P02, 7}, (IfxGtm_ChXSel)1}

Definition at line 1064 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_7_P14_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_7_P14_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P14, 4}, (IfxGtm_ChXSel)2}

Definition at line 1065 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_7_P20_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_7_P20_8_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P20, 8}, (IfxGtm_ChXSel)3}

Definition at line 1066 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_7_P23_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_7_P23_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P23, 3}, (IfxGtm_ChXSel)4}

Definition at line 1067 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_7_P23_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_7_P23_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P23, 4}, (IfxGtm_ChXSel)5}

Definition at line 1068 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_7_P33_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_7_P33_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P33, 3}, (IfxGtm_ChXSel)6}

Definition at line 1069 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_0_P00_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P00_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P00, 0}, (IfxGtm_ChXSel)1}

Definition at line 1070 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_0_P01_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P01_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P01, 3}, (IfxGtm_ChXSel)14}

Definition at line 1071 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_0_P02_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P02_8_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P02, 8}, (IfxGtm_ChXSel)2}

Definition at line 1072 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_0_P11_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P11_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P11, 0}, (IfxGtm_ChXSel)7}

Definition at line 1073 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_0_P11_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P11_10_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P11,10}, (IfxGtm_ChXSel)9}

Definition at line 1074 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_0_P13_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P13_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P13, 3}, (IfxGtm_ChXSel)3}

Definition at line 1075 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_0_P15_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P15_5_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P15, 5}, (IfxGtm_ChXSel)4}

Definition at line 1076 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_0_P20_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P20_12_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P20,12}, (IfxGtm_ChXSel)5}

Definition at line 1077 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_0_P31_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P31_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P31, 0}, (IfxGtm_ChXSel)13}

Definition at line 1078 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_0_P33_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P33_12_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P33,12}, (IfxGtm_ChXSel)6}

Definition at line 1079 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_0_P33_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P33_14_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P33,14}, (IfxGtm_ChXSel)8}

Definition at line 1080 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_1_P00_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P00_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P00, 1}, (IfxGtm_ChXSel)1}

Definition at line 1081 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_1_P00_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P00_2_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P00, 2}, (IfxGtm_ChXSel)2}

Definition at line 1082 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_1_P01_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P01_4_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P01, 4}, (IfxGtm_ChXSel)14}

Definition at line 1083 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_1_P11_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P11_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P11, 1}, (IfxGtm_ChXSel)6}

Definition at line 1084 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_1_P11_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P11_2_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P11, 2}, (IfxGtm_ChXSel)3}

Definition at line 1085 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_1_P15_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P15_10_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P15,10}, (IfxGtm_ChXSel)8}

Definition at line 1086 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_1_P20_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P20_13_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P20,13}, (IfxGtm_ChXSel)4}

Definition at line 1087 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_1_P31_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P31_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P31, 1}, (IfxGtm_ChXSel)9}

Definition at line 1088 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_1_P33_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P33_13_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P33,13}, (IfxGtm_ChXSel)5}

Definition at line 1089 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_1_P33_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P33_15_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P33,15}, (IfxGtm_ChXSel)7}

Definition at line 1090 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_2_P00_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P00_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P00, 3}, (IfxGtm_ChXSel)1}

Definition at line 1091 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_2_P01_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P01_5_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P01, 5}, (IfxGtm_ChXSel)7}

Definition at line 1092 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_2_P11_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P11_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P11, 3}, (IfxGtm_ChXSel)2}

Definition at line 1093 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_2_P11_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P11_4_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P11, 4}, (IfxGtm_ChXSel)6}

Definition at line 1094 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_2_P14_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P14_8_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P14, 8}, (IfxGtm_ChXSel)3}

Definition at line 1095 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_2_P15_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P15_11_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P15,11}, (IfxGtm_ChXSel)8}

Definition at line 1096 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_2_P15_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P15_6_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P15, 6}, (IfxGtm_ChXSel)14}

Definition at line 1097 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_2_P20_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P20_14_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P20,14}, (IfxGtm_ChXSel)4}

Definition at line 1098 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_2_P31_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P31_2_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P31, 2}, (IfxGtm_ChXSel)9}

Definition at line 1099 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_2_P32_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P32_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P32, 0}, (IfxGtm_ChXSel)5}

Definition at line 1100 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_3_P00_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P00_4_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P00, 4}, (IfxGtm_ChXSel)1}

Definition at line 1101 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_3_P01_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P01_5_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P01, 5}, (IfxGtm_ChXSel)7}

Definition at line 1102 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_3_P11_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P11_5_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P11, 5}, (IfxGtm_ChXSel)8}

Definition at line 1103 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_3_P11_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P11_6_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P11, 6}, (IfxGtm_ChXSel)2}

Definition at line 1104 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_3_P14_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P14_9_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P14, 9}, (IfxGtm_ChXSel)3}

Definition at line 1105 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_3_P15_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P15_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P15, 0}, (IfxGtm_ChXSel)4}

Definition at line 1106 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_3_P15_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P15_12_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P15,12}, (IfxGtm_ChXSel)6}

Definition at line 1107 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_3_P20_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P20_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P20, 1}, (IfxGtm_ChXSel)5}

Definition at line 1108 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_3_P31_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P31_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P31, 3}, (IfxGtm_ChXSel)14}

Definition at line 1109 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_3_P34_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P34_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P34, 1}, (IfxGtm_ChXSel)9}

Definition at line 1110 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_4_P00_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P00_5_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P00, 5}, (IfxGtm_ChXSel)1}

Definition at line 1111 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_4_P02_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P02_14_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P02,14}, (IfxGtm_ChXSel)14}

Definition at line 1112 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_4_P11_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P11_7_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P11, 7}, (IfxGtm_ChXSel)7}

Definition at line 1113 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_4_P11_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P11_9_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P11, 9}, (IfxGtm_ChXSel)2}

Definition at line 1114 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_4_P14_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P14_10_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P14,10}, (IfxGtm_ChXSel)3}

Definition at line 1115 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_4_P15_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P15_13_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P15,13}, (IfxGtm_ChXSel)9}

Definition at line 1116 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_4_P15_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P15_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P15, 1}, (IfxGtm_ChXSel)4}

Definition at line 1117 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_4_P20_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P20_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P20, 3}, (IfxGtm_ChXSel)5}

Definition at line 1118 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_4_P21_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P21_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P21, 0}, (IfxGtm_ChXSel)6}

Definition at line 1119 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_4_P31_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P31_4_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P31, 4}, (IfxGtm_ChXSel)12}

Definition at line 1120 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_4_P34_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P34_2_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P34, 2}, (IfxGtm_ChXSel)8}

Definition at line 1121 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_5_P00_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P00_6_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P00, 6}, (IfxGtm_ChXSel)1}

Definition at line 1122 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_5_P01_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P01_6_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P01, 6}, (IfxGtm_ChXSel)7}

Definition at line 1123 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_5_P02_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P02_15_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P02,15}, (IfxGtm_ChXSel)14}

Definition at line 1124 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_5_P11_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P11_10_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P11,10}, (IfxGtm_ChXSel)2}

Definition at line 1125 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_5_P11_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P11_8_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P11, 8}, (IfxGtm_ChXSel)8}

Definition at line 1126 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_5_P13_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P13_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P13, 0}, (IfxGtm_ChXSel)3}

Definition at line 1127 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_5_P15_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P15_14_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P15,14}, (IfxGtm_ChXSel)12}

Definition at line 1128 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_5_P15_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P15_2_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P15, 2}, (IfxGtm_ChXSel)4}

Definition at line 1129 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_5_P20_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P20_9_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P20, 9}, (IfxGtm_ChXSel)5}

Definition at line 1130 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_5_P21_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P21_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P21, 1}, (IfxGtm_ChXSel)6}

Definition at line 1131 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_5_P31_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P31_5_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P31, 5}, (IfxGtm_ChXSel)13}

Definition at line 1132 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_5_P34_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P34_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P34, 3}, (IfxGtm_ChXSel)9}

Definition at line 1133 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_6_P00_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P00_7_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P00, 7}, (IfxGtm_ChXSel)1}

Definition at line 1134 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_6_P01_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P01_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P01, 0}, (IfxGtm_ChXSel)13}

Definition at line 1135 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_6_P11_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P11_11_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P11,11}, (IfxGtm_ChXSel)2}

Definition at line 1136 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_6_P11_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P11_13_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P11,13}, (IfxGtm_ChXSel)7}

Definition at line 1137 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_6_P13_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P13_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P13, 1}, (IfxGtm_ChXSel)3}

Definition at line 1138 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_6_P15_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P15_15_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P15,15}, (IfxGtm_ChXSel)9}

Definition at line 1139 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_6_P15_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P15_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P15, 3}, (IfxGtm_ChXSel)4}

Definition at line 1140 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_6_P20_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P20_10_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P20,10}, (IfxGtm_ChXSel)6}

Definition at line 1141 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_6_P20_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P20_6_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P20, 6}, (IfxGtm_ChXSel)5}

Definition at line 1142 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_6_P22_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P22_6_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P22, 6}, (IfxGtm_ChXSel)14}

Definition at line 1143 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_6_P31_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P31_6_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P31, 6}, (IfxGtm_ChXSel)12}

Definition at line 1144 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_6_P34_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P34_4_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P34, 4}, (IfxGtm_ChXSel)8}

Definition at line 1145 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_7_P00_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P00_8_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P00, 8}, (IfxGtm_ChXSel)1}

Definition at line 1146 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_7_P01_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P01_7_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P01, 7}, (IfxGtm_ChXSel)7}

Definition at line 1147 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_7_P11_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P11_12_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P11,12}, (IfxGtm_ChXSel)2}

Definition at line 1148 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_7_P11_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P11_14_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P11,14}, (IfxGtm_ChXSel)8}

Definition at line 1149 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_7_P13_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P13_2_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P13, 2}, (IfxGtm_ChXSel)3}

Definition at line 1150 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_7_P13_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P13_9_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P13, 9}, (IfxGtm_ChXSel)12}

Definition at line 1151 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_7_P15_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P15_4_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P15, 4}, (IfxGtm_ChXSel)4}

Definition at line 1152 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_7_P20_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P20_11_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P20,11}, (IfxGtm_ChXSel)6}

Definition at line 1153 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_7_P20_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P20_7_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P20, 7}, (IfxGtm_ChXSel)5}

Definition at line 1154 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_7_P31_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P31_7_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P31, 7}, (IfxGtm_ChXSel)14}

Definition at line 1155 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_7_P34_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P34_5_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P34, 5}, (IfxGtm_ChXSel)9}

Definition at line 1156 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_0_P00_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P00_0_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_0, {&MODULE_P00, 0}, (IfxGtm_ChXSel)1}

Definition at line 1157 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_0_P00_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P00_5_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_0, {&MODULE_P00, 5}, (IfxGtm_ChXSel)11}

Definition at line 1158 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_0_P02_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P02_6_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_0, {&MODULE_P02, 6}, (IfxGtm_ChXSel)10}

Definition at line 1159 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_0_P02_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P02_8_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_0, {&MODULE_P02, 8}, (IfxGtm_ChXSel)2}

Definition at line 1160 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_0_P11_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P11_11_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_0, {&MODULE_P11,11}, (IfxGtm_ChXSel)14}

Definition at line 1161 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_0_P12_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P12_0_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_0, {&MODULE_P12, 0}, (IfxGtm_ChXSel)7}

Definition at line 1162 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_0_P13_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P13_11_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_0, {&MODULE_P13,11}, (IfxGtm_ChXSel)9}

Definition at line 1163 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_0_P13_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P13_3_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_0, {&MODULE_P13, 3}, (IfxGtm_ChXSel)3}

Definition at line 1164 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_0_P15_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P15_5_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_0, {&MODULE_P15, 5}, (IfxGtm_ChXSel)4}

Definition at line 1165 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_0_P20_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P20_12_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_0, {&MODULE_P20,12}, (IfxGtm_ChXSel)5}

Definition at line 1166 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_0_P22_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P22_4_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_0, {&MODULE_P22, 4}, (IfxGtm_ChXSel)8}

Definition at line 1167 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_0_P25_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P25_0_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_0, {&MODULE_P25, 0}, (IfxGtm_ChXSel)12}

Definition at line 1168 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_0_P33_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P33_0_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_0, {&MODULE_P33, 0}, (IfxGtm_ChXSel)13}

Definition at line 1169 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_0_P33_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P33_12_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_0, {&MODULE_P33,12}, (IfxGtm_ChXSel)6}

Definition at line 1170 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_1_P00_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P00_1_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_1, {&MODULE_P00, 1}, (IfxGtm_ChXSel)1}

Definition at line 1171 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_1_P00_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P00_2_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_1, {&MODULE_P00, 2}, (IfxGtm_ChXSel)2}

Definition at line 1172 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_1_P00_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P00_6_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_1, {&MODULE_P00, 6}, (IfxGtm_ChXSel)14}

Definition at line 1173 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_1_P02_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P02_7_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_1, {&MODULE_P02, 7}, (IfxGtm_ChXSel)10}

Definition at line 1174 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_1_P11_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P11_2_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_1, {&MODULE_P11, 2}, (IfxGtm_ChXSel)3}

Definition at line 1175 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_1_P12_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P12_1_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_1, {&MODULE_P12, 1}, (IfxGtm_ChXSel)6}

Definition at line 1176 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_1_P13_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P13_10_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_1, {&MODULE_P13,10}, (IfxGtm_ChXSel)8}

Definition at line 1177 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_1_P14_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P14_11_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_1, {&MODULE_P14,11}, (IfxGtm_ChXSel)9}

Definition at line 1178 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_1_P20_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P20_13_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_1, {&MODULE_P20,13}, (IfxGtm_ChXSel)4}

Definition at line 1179 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_1_P22_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P22_5_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_1, {&MODULE_P22, 5}, (IfxGtm_ChXSel)7}

Definition at line 1180 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_1_P25_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P25_1_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_1, {&MODULE_P25, 1}, (IfxGtm_ChXSel)11}

Definition at line 1181 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_1_P33_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P33_13_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_1, {&MODULE_P33,13}, (IfxGtm_ChXSel)5}

Definition at line 1182 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_1_P33_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P33_1_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_1, {&MODULE_P33, 1}, (IfxGtm_ChXSel)15}

Definition at line 1183 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_2_P00_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P00_3_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_2, {&MODULE_P00, 3}, (IfxGtm_ChXSel)1}

Definition at line 1184 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_2_P00_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P00_7_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_2, {&MODULE_P00, 7}, (IfxGtm_ChXSel)11}

Definition at line 1185 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_2_P02_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P02_8_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_2, {&MODULE_P02, 8}, (IfxGtm_ChXSel)10}

Definition at line 1186 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_2_P11_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P11_3_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_2, {&MODULE_P11, 3}, (IfxGtm_ChXSel)2}

Definition at line 1187 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_2_P13_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P13_14_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_2, {&MODULE_P13,14}, (IfxGtm_ChXSel)7}

Definition at line 1188 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_2_P14_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P14_14_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_2, {&MODULE_P14,14}, (IfxGtm_ChXSel)8}

Definition at line 1189 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_2_P14_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P14_8_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_2, {&MODULE_P14, 8}, (IfxGtm_ChXSel)3}

Definition at line 1190 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_2_P20_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P20_14_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_2, {&MODULE_P20,14}, (IfxGtm_ChXSel)4}

Definition at line 1191 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_2_P22_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P22_6_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_2, {&MODULE_P22, 6}, (IfxGtm_ChXSel)6}

Definition at line 1192 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_2_P25_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P25_2_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_2, {&MODULE_P25, 2}, (IfxGtm_ChXSel)9}

Definition at line 1193 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_2_P32_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P32_0_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_2, {&MODULE_P32, 0}, (IfxGtm_ChXSel)5}

Definition at line 1194 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_2_P33_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P33_2_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_2, {&MODULE_P33, 2}, (IfxGtm_ChXSel)14}

Definition at line 1195 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_3_P00_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P00_4_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_3, {&MODULE_P00, 4}, (IfxGtm_ChXSel)1}

Definition at line 1196 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_3_P00_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P00_8_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_3, {&MODULE_P00, 8}, (IfxGtm_ChXSel)11}

Definition at line 1197 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_3_P02_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P02_9_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_3, {&MODULE_P02, 9}, (IfxGtm_ChXSel)10}

Definition at line 1198 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_3_P11_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P11_6_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_3, {&MODULE_P11, 6}, (IfxGtm_ChXSel)2}

Definition at line 1199 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_3_P13_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P13_4_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_3, {&MODULE_P13, 4}, (IfxGtm_ChXSel)8}

Definition at line 1200 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_3_P14_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P14_13_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_3, {&MODULE_P14,13}, (IfxGtm_ChXSel)6}

Definition at line 1201 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_3_P14_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P14_9_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_3, {&MODULE_P14, 9}, (IfxGtm_ChXSel)3}

Definition at line 1202 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_3_P15_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P15_0_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_3, {&MODULE_P15, 0}, (IfxGtm_ChXSel)4}

Definition at line 1203 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_3_P20_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P20_1_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_3, {&MODULE_P20, 1}, (IfxGtm_ChXSel)5}

Definition at line 1204 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_3_P22_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P22_7_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_3, {&MODULE_P22, 7}, (IfxGtm_ChXSel)7}

Definition at line 1205 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_3_P25_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P25_3_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_3, {&MODULE_P25, 3}, (IfxGtm_ChXSel)9}

Definition at line 1206 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_3_P32_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P32_1_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_3, {&MODULE_P32, 1}, (IfxGtm_ChXSel)15}

Definition at line 1207 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_3_P33_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P33_3_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_3, {&MODULE_P33, 3}, (IfxGtm_ChXSel)12}

Definition at line 1208 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_4_P00_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P00_5_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_4, {&MODULE_P00, 5}, (IfxGtm_ChXSel)1}

Definition at line 1209 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_4_P02_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P02_10_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_4, {&MODULE_P02,10}, (IfxGtm_ChXSel)11}

Definition at line 1210 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_4_P11_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P11_9_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_4, {&MODULE_P11, 9}, (IfxGtm_ChXSel)2}

Definition at line 1211 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_4_P13_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P13_5_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_4, {&MODULE_P13, 5}, (IfxGtm_ChXSel)9}

Definition at line 1212 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_4_P14_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P14_10_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_4, {&MODULE_P14,10}, (IfxGtm_ChXSel)3}

Definition at line 1213 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_4_P14_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P14_12_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_4, {&MODULE_P14,12}, (IfxGtm_ChXSel)8}

Definition at line 1214 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_4_P15_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P15_1_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_4, {&MODULE_P15, 1}, (IfxGtm_ChXSel)4}

Definition at line 1215 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_4_P20_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P20_3_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_4, {&MODULE_P20, 3}, (IfxGtm_ChXSel)5}

Definition at line 1216 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_4_P21_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P21_0_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_4, {&MODULE_P21, 0}, (IfxGtm_ChXSel)6}

Definition at line 1217 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_4_P22_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P22_8_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_4, {&MODULE_P22, 8}, (IfxGtm_ChXSel)7}

Definition at line 1218 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_4_P25_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P25_4_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_4, {&MODULE_P25, 4}, (IfxGtm_ChXSel)10}

Definition at line 1219 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_4_P34_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P34_1_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_4, {&MODULE_P34, 1}, (IfxGtm_ChXSel)12}

Definition at line 1220 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_5_P00_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P00_6_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_5, {&MODULE_P00, 6}, (IfxGtm_ChXSel)1}

Definition at line 1221 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_5_P02_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P02_11_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_5, {&MODULE_P02,11}, (IfxGtm_ChXSel)12}

Definition at line 1222 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_5_P11_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P11_10_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_5, {&MODULE_P11,10}, (IfxGtm_ChXSel)2}

Definition at line 1223 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_5_P13_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P13_0_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_5, {&MODULE_P13, 0}, (IfxGtm_ChXSel)3}

Definition at line 1224 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_5_P13_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P13_13_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_5, {&MODULE_P13,13}, (IfxGtm_ChXSel)9}

Definition at line 1225 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_5_P13_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P13_6_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_5, {&MODULE_P13, 6}, (IfxGtm_ChXSel)10}

Definition at line 1226 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_5_P15_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P15_2_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_5, {&MODULE_P15, 2}, (IfxGtm_ChXSel)4}

Definition at line 1227 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_5_P20_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P20_9_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_5, {&MODULE_P20, 9}, (IfxGtm_ChXSel)5}

Definition at line 1228 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_5_P21_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P21_1_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_5, {&MODULE_P21, 1}, (IfxGtm_ChXSel)6}

Definition at line 1229 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_5_P22_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P22_9_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_5, {&MODULE_P22, 9}, (IfxGtm_ChXSel)7}

Definition at line 1230 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_5_P25_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P25_5_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_5, {&MODULE_P25, 5}, (IfxGtm_ChXSel)11}

Definition at line 1231 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_5_P32_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P32_5_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_5, {&MODULE_P32, 5}, (IfxGtm_ChXSel)8}

Definition at line 1232 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_5_P34_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P34_2_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_5, {&MODULE_P34, 2}, (IfxGtm_ChXSel)13}

Definition at line 1233 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_6_P00_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P00_7_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_6, {&MODULE_P00, 7}, (IfxGtm_ChXSel)1}

Definition at line 1234 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_6_P02_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P02_12_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_6, {&MODULE_P02,12}, (IfxGtm_ChXSel)12}

Definition at line 1235 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_6_P11_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P11_11_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_6, {&MODULE_P11,11}, (IfxGtm_ChXSel)2}

Definition at line 1236 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_6_P13_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P13_1_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_6, {&MODULE_P13, 1}, (IfxGtm_ChXSel)3}

Definition at line 1237 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_6_P13_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P13_7_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_6, {&MODULE_P13, 7}, (IfxGtm_ChXSel)10}

Definition at line 1238 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_6_P14_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P14_15_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_6, {&MODULE_P14,15}, (IfxGtm_ChXSel)9}

Definition at line 1239 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_6_P15_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P15_3_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_6, {&MODULE_P15, 3}, (IfxGtm_ChXSel)4}

Definition at line 1240 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_6_P20_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P20_10_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_6, {&MODULE_P20,10}, (IfxGtm_ChXSel)6}

Definition at line 1241 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_6_P20_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P20_6_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_6, {&MODULE_P20, 6}, (IfxGtm_ChXSel)5}

Definition at line 1242 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_6_P22_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P22_10_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_6, {&MODULE_P22,10}, (IfxGtm_ChXSel)7}

Definition at line 1243 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_6_P25_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P25_6_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_6, {&MODULE_P25, 6}, (IfxGtm_ChXSel)14}

Definition at line 1244 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_6_P26_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P26_0_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_6, {&MODULE_P26, 0}, (IfxGtm_ChXSel)11}

Definition at line 1245 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_6_P32_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P32_6_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_6, {&MODULE_P32, 6}, (IfxGtm_ChXSel)8}

Definition at line 1246 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_6_P34_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P34_3_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_6, {&MODULE_P34, 3}, (IfxGtm_ChXSel)13}

Definition at line 1247 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_7_P00_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P00_8_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_7, {&MODULE_P00, 8}, (IfxGtm_ChXSel)1}

Definition at line 1248 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_7_P02_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P02_13_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_7, {&MODULE_P02,13}, (IfxGtm_ChXSel)11}

Definition at line 1249 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_7_P11_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P11_12_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_7, {&MODULE_P11,12}, (IfxGtm_ChXSel)2}

Definition at line 1250 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_7_P13_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P13_15_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_7, {&MODULE_P13,15}, (IfxGtm_ChXSel)9}

Definition at line 1251 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_7_P13_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P13_2_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_7, {&MODULE_P13, 2}, (IfxGtm_ChXSel)3}

Definition at line 1252 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_7_P15_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P15_4_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_7, {&MODULE_P15, 4}, (IfxGtm_ChXSel)4}

Definition at line 1253 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_7_P20_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P20_11_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_7, {&MODULE_P20,11}, (IfxGtm_ChXSel)6}

Definition at line 1254 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_7_P20_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P20_7_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_7, {&MODULE_P20, 7}, (IfxGtm_ChXSel)5}

Definition at line 1255 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_7_P22_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P22_11_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_7, {&MODULE_P22,11}, (IfxGtm_ChXSel)7}

Definition at line 1256 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_7_P25_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P25_7_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_7, {&MODULE_P25, 7}, (IfxGtm_ChXSel)10}

Definition at line 1257 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_7_P32_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P32_7_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_7, {&MODULE_P32, 7}, (IfxGtm_ChXSel)8}

Definition at line 1258 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM3_7_P34_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P34_4_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_7, {&MODULE_P34, 4}, (IfxGtm_ChXSel)12}

Definition at line 1259 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_0_P00_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P00_13_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_0, {&MODULE_P00,13}, (IfxGtm_ChXSel)1}

Definition at line 1260 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_0_P00_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P00_9_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_0, {&MODULE_P00, 9}, (IfxGtm_ChXSel)7}

Definition at line 1261 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_0_P01_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P01_12_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_0, {&MODULE_P01,12}, (IfxGtm_ChXSel)2}

Definition at line 1262 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_0_P02_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P02_12_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_0, {&MODULE_P02,12}, (IfxGtm_ChXSel)3}

Definition at line 1263 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_0_P10_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P10_0_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_0, {&MODULE_P10, 0}, (IfxGtm_ChXSel)12}

Definition at line 1264 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_0_P10_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P10_8_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_0, {&MODULE_P10, 8}, (IfxGtm_ChXSel)13}

Definition at line 1265 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_0_P11_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P11_0_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_0, {&MODULE_P11, 0}, (IfxGtm_ChXSel)4}

Definition at line 1266 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_0_P12_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P12_0_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_0, {&MODULE_P12, 0}, (IfxGtm_ChXSel)5}

Definition at line 1267 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_0_P13_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P13_12_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_0, {&MODULE_P13,12}, (IfxGtm_ChXSel)6}

Definition at line 1268 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_0_P21_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P21_0_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_0, {&MODULE_P21, 0}, (IfxGtm_ChXSel)11}

Definition at line 1269 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_0_P24_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P24_0_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_0, {&MODULE_P24, 0}, (IfxGtm_ChXSel)8}

Definition at line 1270 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_0_P25_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P25_8_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_0, {&MODULE_P25, 8}, (IfxGtm_ChXSel)9}

Definition at line 1271 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_0_P30_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P30_0_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_0, {&MODULE_P30, 0}, (IfxGtm_ChXSel)10}

Definition at line 1272 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_0_P32_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P32_7_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_0, {&MODULE_P32, 7}, (IfxGtm_ChXSel)15}

Definition at line 1273 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_1_P00_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P00_10_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_1, {&MODULE_P00,10}, (IfxGtm_ChXSel)11}

Definition at line 1274 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_1_P00_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P00_15_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_1, {&MODULE_P00,15}, (IfxGtm_ChXSel)1}

Definition at line 1275 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_1_P01_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P01_1_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_1, {&MODULE_P01, 1}, (IfxGtm_ChXSel)2}

Definition at line 1276 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_1_P02_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P02_15_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_1, {&MODULE_P02,15}, (IfxGtm_ChXSel)3}

Definition at line 1277 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_1_P10_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P10_9_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_1, {&MODULE_P10, 9}, (IfxGtm_ChXSel)4}

Definition at line 1278 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_1_P11_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P11_1_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_1, {&MODULE_P11, 1}, (IfxGtm_ChXSel)5}

Definition at line 1279 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_1_P12_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P12_1_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_1, {&MODULE_P12, 1}, (IfxGtm_ChXSel)6}

Definition at line 1280 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_1_P15_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P15_10_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_1, {&MODULE_P15,10}, (IfxGtm_ChXSel)7}

Definition at line 1281 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_1_P21_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P21_1_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_1, {&MODULE_P21, 1}, (IfxGtm_ChXSel)13}

Definition at line 1282 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_1_P24_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P24_1_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_1, {&MODULE_P24, 1}, (IfxGtm_ChXSel)8}

Definition at line 1283 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_1_P25_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P25_9_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_1, {&MODULE_P25, 9}, (IfxGtm_ChXSel)9}

Definition at line 1284 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_1_P30_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P30_1_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_1, {&MODULE_P30, 1}, (IfxGtm_ChXSel)10}

Definition at line 1285 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_1_P32_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P32_5_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_1, {&MODULE_P32, 5}, (IfxGtm_ChXSel)14}

Definition at line 1286 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_2_P00_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P00_11_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_2, {&MODULE_P00,11}, (IfxGtm_ChXSel)11}

Definition at line 1287 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_2_P01_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P01_9_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_2, {&MODULE_P01, 9}, (IfxGtm_ChXSel)1}

Definition at line 1288 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_2_P02_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P02_13_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_2, {&MODULE_P02,13}, (IfxGtm_ChXSel)3}

Definition at line 1289 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_2_P02_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P02_9_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_2, {&MODULE_P02, 9}, (IfxGtm_ChXSel)2}

Definition at line 1290 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_2_P10_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P10_10_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_2, {&MODULE_P10,10}, (IfxGtm_ChXSel)4}

Definition at line 1291 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_2_P10_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P10_6_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_2, {&MODULE_P10, 6}, (IfxGtm_ChXSel)13}

Definition at line 1292 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_2_P11_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P11_4_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_2, {&MODULE_P11, 4}, (IfxGtm_ChXSel)5}

Definition at line 1293 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_2_P15_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P15_11_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_2, {&MODULE_P15,11}, (IfxGtm_ChXSel)6}

Definition at line 1294 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_2_P21_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P21_6_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_2, {&MODULE_P21, 6}, (IfxGtm_ChXSel)12}

Definition at line 1295 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_2_P23_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P23_6_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_2, {&MODULE_P23, 6}, (IfxGtm_ChXSel)7}

Definition at line 1296 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_2_P24_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P24_2_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_2, {&MODULE_P24, 2}, (IfxGtm_ChXSel)8}

Definition at line 1297 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_2_P25_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P25_10_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_2, {&MODULE_P25,10}, (IfxGtm_ChXSel)9}

Definition at line 1298 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_2_P30_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P30_2_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_2, {&MODULE_P30, 2}, (IfxGtm_ChXSel)10}

Definition at line 1299 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_3_P00_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P00_12_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_3, {&MODULE_P00,12}, (IfxGtm_ChXSel)11}

Definition at line 1300 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_3_P01_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P01_13_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_3, {&MODULE_P01,13}, (IfxGtm_ChXSel)1}

Definition at line 1301 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_3_P02_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P02_10_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_3, {&MODULE_P02,10}, (IfxGtm_ChXSel)2}

Definition at line 1302 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_3_P02_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P02_14_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_3, {&MODULE_P02,14}, (IfxGtm_ChXSel)3}

Definition at line 1303 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_3_P10_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P10_14_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_3, {&MODULE_P10,14}, (IfxGtm_ChXSel)4}

Definition at line 1304 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_3_P10_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P10_5_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_3, {&MODULE_P10, 5}, (IfxGtm_ChXSel)13}

Definition at line 1305 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_3_P11_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P11_5_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_3, {&MODULE_P11, 5}, (IfxGtm_ChXSel)5}

Definition at line 1306 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_3_P15_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P15_12_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_3, {&MODULE_P15,12}, (IfxGtm_ChXSel)6}

Definition at line 1307 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_3_P21_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P21_7_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_3, {&MODULE_P21, 7}, (IfxGtm_ChXSel)12}

Definition at line 1308 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_3_P23_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P23_7_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_3, {&MODULE_P23, 7}, (IfxGtm_ChXSel)7}

Definition at line 1309 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_3_P24_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P24_3_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_3, {&MODULE_P24, 3}, (IfxGtm_ChXSel)8}

Definition at line 1310 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_3_P25_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P25_11_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_3, {&MODULE_P25,11}, (IfxGtm_ChXSel)9}

Definition at line 1311 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_3_P30_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P30_3_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_3, {&MODULE_P30, 3}, (IfxGtm_ChXSel)10}

Definition at line 1312 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_4_P01_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P01_0_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_4, {&MODULE_P01, 0}, (IfxGtm_ChXSel)1}

Definition at line 1313 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_4_P01_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P01_8_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_4, {&MODULE_P01, 8}, (IfxGtm_ChXSel)2}

Definition at line 1314 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_4_P02_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P02_11_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_4, {&MODULE_P02,11}, (IfxGtm_ChXSel)3}

Definition at line 1315 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_4_P10_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P10_13_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_4, {&MODULE_P10,13}, (IfxGtm_ChXSel)4}

Definition at line 1316 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_4_P10_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P10_1_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_4, {&MODULE_P10, 1}, (IfxGtm_ChXSel)12}

Definition at line 1317 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_4_P11_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P11_7_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_4, {&MODULE_P11, 7}, (IfxGtm_ChXSel)5}

Definition at line 1318 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_4_P15_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P15_13_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_4, {&MODULE_P15,13}, (IfxGtm_ChXSel)6}

Definition at line 1319 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_4_P20_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P20_1_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_4, {&MODULE_P20, 1}, (IfxGtm_ChXSel)11}

Definition at line 1320 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_4_P24_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P24_4_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_4, {&MODULE_P24, 4}, (IfxGtm_ChXSel)7}

Definition at line 1321 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_4_P25_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P25_12_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_4, {&MODULE_P25,12}, (IfxGtm_ChXSel)8}

Definition at line 1322 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_4_P30_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P30_4_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_4, {&MODULE_P30, 4}, (IfxGtm_ChXSel)9}

Definition at line 1323 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_4_P32_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P32_6_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_4, {&MODULE_P32, 6}, (IfxGtm_ChXSel)15}

Definition at line 1324 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_4_P33_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P33_10_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_4, {&MODULE_P33,10}, (IfxGtm_ChXSel)14}

Definition at line 1325 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_4_P33_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P33_4_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_4, {&MODULE_P33, 4}, (IfxGtm_ChXSel)10}

Definition at line 1326 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_5_P01_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P01_10_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_5, {&MODULE_P01,10}, (IfxGtm_ChXSel)3}

Definition at line 1327 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_5_P01_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P01_2_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_5, {&MODULE_P01, 2}, (IfxGtm_ChXSel)1}

Definition at line 1328 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_5_P01_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P01_3_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_5, {&MODULE_P01, 3}, (IfxGtm_ChXSel)2}

Definition at line 1329 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_5_P10_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P10_11_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_5, {&MODULE_P10,11}, (IfxGtm_ChXSel)4}

Definition at line 1330 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_5_P10_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P10_2_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_5, {&MODULE_P10, 2}, (IfxGtm_ChXSel)12}

Definition at line 1331 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_5_P11_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P11_8_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_5, {&MODULE_P11, 8}, (IfxGtm_ChXSel)5}

Definition at line 1332 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_5_P15_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P15_14_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_5, {&MODULE_P15,14}, (IfxGtm_ChXSel)6}

Definition at line 1333 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_5_P20_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P20_3_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_5, {&MODULE_P20, 3}, (IfxGtm_ChXSel)11}

Definition at line 1334 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_5_P24_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P24_5_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_5, {&MODULE_P24, 5}, (IfxGtm_ChXSel)7}

Definition at line 1335 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_5_P25_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P25_13_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_5, {&MODULE_P25,13}, (IfxGtm_ChXSel)8}

Definition at line 1336 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_5_P30_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P30_5_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_5, {&MODULE_P30, 5}, (IfxGtm_ChXSel)9}

Definition at line 1337 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_5_P33_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P33_14_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_5, {&MODULE_P33,14}, (IfxGtm_ChXSel)14}

Definition at line 1338 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_5_P33_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P33_5_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_5, {&MODULE_P33, 5}, (IfxGtm_ChXSel)10}

Definition at line 1339 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_6_P01_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P01_14_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_6, {&MODULE_P01,14}, (IfxGtm_ChXSel)3}

Definition at line 1340 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_6_P01_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P01_15_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_6, {&MODULE_P01,15}, (IfxGtm_ChXSel)1}

Definition at line 1341 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_6_P01_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P01_4_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_6, {&MODULE_P01, 4}, (IfxGtm_ChXSel)2}

Definition at line 1342 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_6_P10_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P10_15_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_6, {&MODULE_P10,15}, (IfxGtm_ChXSel)4}

Definition at line 1343 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_6_P10_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P10_3_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_6, {&MODULE_P10, 3}, (IfxGtm_ChXSel)10}

Definition at line 1344 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_6_P11_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P11_13_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_6, {&MODULE_P11,13}, (IfxGtm_ChXSel)5}

Definition at line 1345 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_6_P15_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P15_15_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_6, {&MODULE_P15,15}, (IfxGtm_ChXSel)6}

Definition at line 1346 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_6_P24_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P24_6_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_6, {&MODULE_P24, 6}, (IfxGtm_ChXSel)7}

Definition at line 1347 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_6_P25_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P25_14_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_6, {&MODULE_P25,14}, (IfxGtm_ChXSel)8}

Definition at line 1348 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_6_P30_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P30_6_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_6, {&MODULE_P30, 6}, (IfxGtm_ChXSel)9}

Definition at line 1349 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_6_P33_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P33_15_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_6, {&MODULE_P33,15}, (IfxGtm_ChXSel)12}

Definition at line 1350 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_7_P00_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P00_14_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_7, {&MODULE_P00,14}, (IfxGtm_ChXSel)1}

Definition at line 1351 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_7_P01_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P01_11_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_7, {&MODULE_P01,11}, (IfxGtm_ChXSel)2}

Definition at line 1352 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_7_P10_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P10_4_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_7, {&MODULE_P10, 4}, (IfxGtm_ChXSel)3}

Definition at line 1353 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_7_P11_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P11_14_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_7, {&MODULE_P11,14}, (IfxGtm_ChXSel)4}

Definition at line 1354 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_7_P11_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P11_15_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_7, {&MODULE_P11,15}, (IfxGtm_ChXSel)5}

Definition at line 1355 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_7_P13_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P13_9_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_7, {&MODULE_P13, 9}, (IfxGtm_ChXSel)6}

Definition at line 1356 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_7_P14_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P14_7_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_7, {&MODULE_P14, 7}, (IfxGtm_ChXSel)10}

Definition at line 1357 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_7_P24_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P24_7_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_7, {&MODULE_P24, 7}, (IfxGtm_ChXSel)7}

Definition at line 1358 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_7_P25_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P25_15_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_7, {&MODULE_P25,15}, (IfxGtm_ChXSel)8}

Definition at line 1359 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_7_P30_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P30_7_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_7, {&MODULE_P30, 7}, (IfxGtm_ChXSel)9}

Definition at line 1360 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM4_7_P34_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P34_5_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_7, {&MODULE_P34, 5}, (IfxGtm_ChXSel)12}

Definition at line 1361 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_0_P00_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P00_13_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_0, {&MODULE_P00,13}, (IfxGtm_ChXSel)1}

Definition at line 1362 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_0_P01_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P01_12_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_0, {&MODULE_P01,12}, (IfxGtm_ChXSel)2}

Definition at line 1363 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_0_P01_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P01_8_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_0, {&MODULE_P01, 8}, (IfxGtm_ChXSel)10}

Definition at line 1364 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_0_P02_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P02_12_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_0, {&MODULE_P02,12}, (IfxGtm_ChXSel)3}

Definition at line 1365 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_0_P13_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P13_11_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_0, {&MODULE_P13,11}, (IfxGtm_ChXSel)9}

Definition at line 1366 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_0_P22_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P22_8_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_0, {&MODULE_P22, 8}, (IfxGtm_ChXSel)4}

Definition at line 1367 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_0_P24_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P24_8_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_0, {&MODULE_P24, 8}, (IfxGtm_ChXSel)5}

Definition at line 1368 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_0_P30_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P30_8_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_0, {&MODULE_P30, 8}, (IfxGtm_ChXSel)6}

Definition at line 1369 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_0_P31_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P31_8_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_0, {&MODULE_P31, 8}, (IfxGtm_ChXSel)7}

Definition at line 1370 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_0_P33_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P33_14_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_0, {&MODULE_P33,14}, (IfxGtm_ChXSel)8}

Definition at line 1371 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_1_P00_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P00_15_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_1, {&MODULE_P00,15}, (IfxGtm_ChXSel)1}

Definition at line 1372 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_1_P01_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P01_1_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_1, {&MODULE_P01, 1}, (IfxGtm_ChXSel)2}

Definition at line 1373 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_1_P01_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P01_9_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_1, {&MODULE_P01, 9}, (IfxGtm_ChXSel)11}

Definition at line 1374 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_1_P02_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P02_15_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_1, {&MODULE_P02,15}, (IfxGtm_ChXSel)3}

Definition at line 1375 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_1_P13_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P13_10_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_1, {&MODULE_P13,10}, (IfxGtm_ChXSel)5}

Definition at line 1376 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_1_P14_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P14_11_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_1, {&MODULE_P14,11}, (IfxGtm_ChXSel)4}

Definition at line 1377 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_1_P22_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P22_9_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_1, {&MODULE_P22, 9}, (IfxGtm_ChXSel)10}

Definition at line 1378 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_1_P24_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P24_9_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_1, {&MODULE_P24, 9}, (IfxGtm_ChXSel)6}

Definition at line 1379 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_1_P30_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P30_9_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_1, {&MODULE_P30, 9}, (IfxGtm_ChXSel)7}

Definition at line 1380 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_1_P31_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P31_9_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_1, {&MODULE_P31, 9}, (IfxGtm_ChXSel)8}

Definition at line 1381 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_1_P33_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P33_15_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_1, {&MODULE_P33,15}, (IfxGtm_ChXSel)9}

Definition at line 1382 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_2_P01_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P01_10_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_2, {&MODULE_P01,10}, (IfxGtm_ChXSel)9}

Definition at line 1383 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_2_P01_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P01_9_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_2, {&MODULE_P01, 9}, (IfxGtm_ChXSel)1}

Definition at line 1384 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_2_P02_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P02_13_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_2, {&MODULE_P02,13}, (IfxGtm_ChXSel)2}

Definition at line 1385 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_2_P13_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P13_14_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_2, {&MODULE_P13,14}, (IfxGtm_ChXSel)4}

Definition at line 1386 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_2_P14_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P14_14_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_2, {&MODULE_P14,14}, (IfxGtm_ChXSel)3}

Definition at line 1387 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_2_P22_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P22_10_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_2, {&MODULE_P22,10}, (IfxGtm_ChXSel)8}

Definition at line 1388 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_2_P24_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P24_10_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_2, {&MODULE_P24,10}, (IfxGtm_ChXSel)5}

Definition at line 1389 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_2_P30_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P30_10_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_2, {&MODULE_P30,10}, (IfxGtm_ChXSel)6}

Definition at line 1390 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_2_P31_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P31_10_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_2, {&MODULE_P31,10}, (IfxGtm_ChXSel)7}

Definition at line 1391 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_3_P01_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P01_11_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_3, {&MODULE_P01,11}, (IfxGtm_ChXSel)11}

Definition at line 1392 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_3_P01_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P01_13_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_3, {&MODULE_P01,13}, (IfxGtm_ChXSel)1}

Definition at line 1393 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_3_P01_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P01_5_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_3, {&MODULE_P01, 5}, (IfxGtm_ChXSel)2}

Definition at line 1394 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_3_P02_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P02_14_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_3, {&MODULE_P02,14}, (IfxGtm_ChXSel)3}

Definition at line 1395 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_3_P13_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P13_4_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_3, {&MODULE_P13, 4}, (IfxGtm_ChXSel)4}

Definition at line 1396 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_3_P14_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P14_13_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_3, {&MODULE_P14,13}, (IfxGtm_ChXSel)5}

Definition at line 1397 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_3_P22_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P22_11_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_3, {&MODULE_P22,11}, (IfxGtm_ChXSel)10}

Definition at line 1398 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_3_P24_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P24_11_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_3, {&MODULE_P24,11}, (IfxGtm_ChXSel)6}

Definition at line 1399 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_3_P30_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P30_11_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_3, {&MODULE_P30,11}, (IfxGtm_ChXSel)7}

Definition at line 1400 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_3_P31_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P31_11_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_3, {&MODULE_P31,11}, (IfxGtm_ChXSel)8}

Definition at line 1401 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_3_P34_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P34_1_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_3, {&MODULE_P34, 1}, (IfxGtm_ChXSel)9}

Definition at line 1402 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_4_P00_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P00_0_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_4, {&MODULE_P00, 0}, (IfxGtm_ChXSel)10}

Definition at line 1403 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_4_P01_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P01_0_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_4, {&MODULE_P01, 0}, (IfxGtm_ChXSel)1}

Definition at line 1404 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_4_P01_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P01_8_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_4, {&MODULE_P01, 8}, (IfxGtm_ChXSel)2}

Definition at line 1405 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_4_P13_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P13_5_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_4, {&MODULE_P13, 5}, (IfxGtm_ChXSel)4}

Definition at line 1406 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_4_P14_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P14_12_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_4, {&MODULE_P14,12}, (IfxGtm_ChXSel)5}

Definition at line 1407 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_4_P21_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P21_2_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_4, {&MODULE_P21, 2}, (IfxGtm_ChXSel)11}

Definition at line 1408 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_4_P24_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P24_12_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_4, {&MODULE_P24,12}, (IfxGtm_ChXSel)6}

Definition at line 1409 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_4_P30_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P30_12_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_4, {&MODULE_P30,12}, (IfxGtm_ChXSel)7}

Definition at line 1410 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_4_P31_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P31_12_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_4, {&MODULE_P31,12}, (IfxGtm_ChXSel)8}

Definition at line 1411 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_4_P34_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P34_2_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_4, {&MODULE_P34, 2}, (IfxGtm_ChXSel)9}

Definition at line 1412 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_5_P00_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P00_1_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_5, {&MODULE_P00, 1}, (IfxGtm_ChXSel)11}

Definition at line 1413 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_5_P01_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P01_10_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_5, {&MODULE_P01,10}, (IfxGtm_ChXSel)2}

Definition at line 1414 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_5_P01_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P01_2_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_5, {&MODULE_P01, 2}, (IfxGtm_ChXSel)1}

Definition at line 1415 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_5_P01_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P01_6_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_5, {&MODULE_P01, 6}, (IfxGtm_ChXSel)3}

Definition at line 1416 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_5_P13_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P13_13_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_5, {&MODULE_P13,13}, (IfxGtm_ChXSel)5}

Definition at line 1417 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_5_P13_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P13_6_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_5, {&MODULE_P13, 6}, (IfxGtm_ChXSel)4}

Definition at line 1418 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_5_P21_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P21_3_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_5, {&MODULE_P21, 3}, (IfxGtm_ChXSel)12}

Definition at line 1419 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_5_P24_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P24_13_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_5, {&MODULE_P24,13}, (IfxGtm_ChXSel)6}

Definition at line 1420 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_5_P30_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P30_13_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_5, {&MODULE_P30,13}, (IfxGtm_ChXSel)7}

Definition at line 1421 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_5_P31_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P31_13_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_5, {&MODULE_P31,13}, (IfxGtm_ChXSel)8}

Definition at line 1422 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_5_P32_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P32_5_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_5, {&MODULE_P32, 5}, (IfxGtm_ChXSel)9}

Definition at line 1423 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_5_P34_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P34_3_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_5, {&MODULE_P34, 3}, (IfxGtm_ChXSel)10}

Definition at line 1424 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_6_P00_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P00_2_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_6, {&MODULE_P00, 2}, (IfxGtm_ChXSel)11}

Definition at line 1425 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_6_P01_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P01_14_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_6, {&MODULE_P01,14}, (IfxGtm_ChXSel)3}

Definition at line 1426 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_6_P01_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P01_15_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_6, {&MODULE_P01,15}, (IfxGtm_ChXSel)1}

Definition at line 1427 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_6_P01_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P01_6_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_6, {&MODULE_P01, 6}, (IfxGtm_ChXSel)2}

Definition at line 1428 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_6_P13_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P13_7_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_6, {&MODULE_P13, 7}, (IfxGtm_ChXSel)4}

Definition at line 1429 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_6_P14_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P14_15_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_6, {&MODULE_P14,15}, (IfxGtm_ChXSel)5}

Definition at line 1430 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_6_P21_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P21_4_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_6, {&MODULE_P21, 4}, (IfxGtm_ChXSel)12}

Definition at line 1431 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_6_P24_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P24_14_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_6, {&MODULE_P24,14}, (IfxGtm_ChXSel)6}

Definition at line 1432 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_6_P30_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P30_14_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_6, {&MODULE_P30,14}, (IfxGtm_ChXSel)7}

Definition at line 1433 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_6_P31_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P31_14_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_6, {&MODULE_P31,14}, (IfxGtm_ChXSel)8}

Definition at line 1434 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_6_P32_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P32_6_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_6, {&MODULE_P32, 6}, (IfxGtm_ChXSel)9}

Definition at line 1435 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_6_P34_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P34_4_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_6, {&MODULE_P34, 4}, (IfxGtm_ChXSel)10}

Definition at line 1436 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_7_P00_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P00_14_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_7, {&MODULE_P00,14}, (IfxGtm_ChXSel)1}

Definition at line 1437 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_7_P00_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P00_3_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_7, {&MODULE_P00, 3}, (IfxGtm_ChXSel)10}

Definition at line 1438 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_7_P01_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P01_11_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_7, {&MODULE_P01,11}, (IfxGtm_ChXSel)3}

Definition at line 1439 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_7_P01_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P01_7_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_7, {&MODULE_P01, 7}, (IfxGtm_ChXSel)2}

Definition at line 1440 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_7_P13_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P13_15_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_7, {&MODULE_P13,15}, (IfxGtm_ChXSel)4}

Definition at line 1441 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_7_P21_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P21_5_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_7, {&MODULE_P21, 5}, (IfxGtm_ChXSel)11}

Definition at line 1442 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_7_P24_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P24_15_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_7, {&MODULE_P24,15}, (IfxGtm_ChXSel)5}

Definition at line 1443 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_7_P30_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P30_15_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_7, {&MODULE_P30,15}, (IfxGtm_ChXSel)6}

Definition at line 1444 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_7_P31_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P31_15_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_7, {&MODULE_P31,15}, (IfxGtm_ChXSel)7}

Definition at line 1445 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_7_P32_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P32_7_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_7, {&MODULE_P32, 7}, (IfxGtm_ChXSel)8}

Definition at line 1446 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM5_7_P34_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P34_5_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_7, {&MODULE_P34, 5}, (IfxGtm_ChXSel)9}

Definition at line 1447 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_0_P01_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P01_12_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_0, {&MODULE_P01,12}, (IfxGtm_ChXSel)3}

Definition at line 1448 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_0_P10_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P10_9_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_0, {&MODULE_P10, 9}, (IfxGtm_ChXSel)5}

Definition at line 1449 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_0_P13_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P13_4_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_0, {&MODULE_P13, 4}, (IfxGtm_ChXSel)4}

Definition at line 1450 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_0_P20_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P20_6_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_0, {&MODULE_P20, 6}, (IfxGtm_ChXSel)1}

Definition at line 1451 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_0_P23_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P23_7_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_0, {&MODULE_P23, 7}, (IfxGtm_ChXSel)2}

Definition at line 1452 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_0_P24_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P24_0_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_0, {&MODULE_P24, 0}, (IfxGtm_ChXSel)6}

Definition at line 1453 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_0_P25_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P25_0_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_0, {&MODULE_P25, 0}, (IfxGtm_ChXSel)7}

Definition at line 1454 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_0_P30_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P30_8_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_0, {&MODULE_P30, 8}, (IfxGtm_ChXSel)8}

Definition at line 1455 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_0_P31_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P31_8_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_0, {&MODULE_P31, 8}, (IfxGtm_ChXSel)9}

Definition at line 1456 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_1_P01_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P01_13_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_1, {&MODULE_P01,13}, (IfxGtm_ChXSel)3}

Definition at line 1457 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_1_P10_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P10_10_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_1, {&MODULE_P10,10}, (IfxGtm_ChXSel)5}

Definition at line 1458 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_1_P13_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P13_5_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_1, {&MODULE_P13, 5}, (IfxGtm_ChXSel)4}

Definition at line 1459 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_1_P20_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P20_7_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_1, {&MODULE_P20, 7}, (IfxGtm_ChXSel)1}

Definition at line 1460 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_1_P23_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P23_6_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_1, {&MODULE_P23, 6}, (IfxGtm_ChXSel)2}

Definition at line 1461 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_1_P24_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P24_1_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_1, {&MODULE_P24, 1}, (IfxGtm_ChXSel)6}

Definition at line 1462 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_1_P25_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P25_1_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_1, {&MODULE_P25, 1}, (IfxGtm_ChXSel)7}

Definition at line 1463 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_1_P30_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P30_9_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_1, {&MODULE_P30, 9}, (IfxGtm_ChXSel)8}

Definition at line 1464 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_1_P31_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P31_9_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_1, {&MODULE_P31, 9}, (IfxGtm_ChXSel)9}

Definition at line 1465 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_2_P01_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P01_14_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_2, {&MODULE_P01,14}, (IfxGtm_ChXSel)3}

Definition at line 1466 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_2_P10_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P10_11_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_2, {&MODULE_P10,11}, (IfxGtm_ChXSel)5}

Definition at line 1467 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_2_P13_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P13_6_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_2, {&MODULE_P13, 6}, (IfxGtm_ChXSel)4}

Definition at line 1468 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_2_P20_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P20_8_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_2, {&MODULE_P20, 8}, (IfxGtm_ChXSel)1}

Definition at line 1469 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_2_P23_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P23_5_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_2, {&MODULE_P23, 5}, (IfxGtm_ChXSel)2}

Definition at line 1470 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_2_P24_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P24_2_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_2, {&MODULE_P24, 2}, (IfxGtm_ChXSel)6}

Definition at line 1471 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_2_P25_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P25_2_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_2, {&MODULE_P25, 2}, (IfxGtm_ChXSel)7}

Definition at line 1472 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_2_P30_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P30_10_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_2, {&MODULE_P30,10}, (IfxGtm_ChXSel)8}

Definition at line 1473 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_2_P31_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P31_10_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_2, {&MODULE_P31,10}, (IfxGtm_ChXSel)9}

Definition at line 1474 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_3_P01_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P01_15_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_3, {&MODULE_P01,15}, (IfxGtm_ChXSel)3}

Definition at line 1475 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_3_P10_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P10_13_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_3, {&MODULE_P10,13}, (IfxGtm_ChXSel)5}

Definition at line 1476 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_3_P13_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P13_7_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_3, {&MODULE_P13, 7}, (IfxGtm_ChXSel)4}

Definition at line 1477 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_3_P20_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P20_9_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_3, {&MODULE_P20, 9}, (IfxGtm_ChXSel)1}

Definition at line 1478 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_3_P23_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P23_4_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_3, {&MODULE_P23, 4}, (IfxGtm_ChXSel)2}

Definition at line 1479 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_3_P24_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P24_3_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_3, {&MODULE_P24, 3}, (IfxGtm_ChXSel)6}

Definition at line 1480 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_3_P25_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P25_3_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_3, {&MODULE_P25, 3}, (IfxGtm_ChXSel)7}

Definition at line 1481 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_3_P30_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P30_11_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_3, {&MODULE_P30,11}, (IfxGtm_ChXSel)8}

Definition at line 1482 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_3_P31_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P31_11_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_3, {&MODULE_P31,11}, (IfxGtm_ChXSel)9}

Definition at line 1483 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_4_P00_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P00_4_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_4, {&MODULE_P00, 4}, (IfxGtm_ChXSel)1}

Definition at line 1484 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_4_P13_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P13_9_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_4, {&MODULE_P13, 9}, (IfxGtm_ChXSel)4}

Definition at line 1485 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_4_P14_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P14_12_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_4, {&MODULE_P14,12}, (IfxGtm_ChXSel)3}

Definition at line 1486 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_4_P23_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P23_3_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_4, {&MODULE_P23, 3}, (IfxGtm_ChXSel)2}

Definition at line 1487 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_4_P24_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P24_4_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_4, {&MODULE_P24, 4}, (IfxGtm_ChXSel)5}

Definition at line 1488 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_4_P25_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P25_4_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_4, {&MODULE_P25, 4}, (IfxGtm_ChXSel)6}

Definition at line 1489 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_4_P30_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P30_12_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_4, {&MODULE_P30,12}, (IfxGtm_ChXSel)7}

Definition at line 1490 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_4_P31_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P31_12_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_4, {&MODULE_P31,12}, (IfxGtm_ChXSel)8}

Definition at line 1491 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_5_P00_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P00_13_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_5, {&MODULE_P00,13}, (IfxGtm_ChXSel)2}

Definition at line 1492 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_5_P13_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P13_10_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_5, {&MODULE_P13,10}, (IfxGtm_ChXSel)4}

Definition at line 1493 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_5_P14_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P14_13_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_5, {&MODULE_P14,13}, (IfxGtm_ChXSel)3}

Definition at line 1494 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_5_P23_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P23_2_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_5, {&MODULE_P23, 2}, (IfxGtm_ChXSel)1}

Definition at line 1495 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_5_P24_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P24_5_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_5, {&MODULE_P24, 5}, (IfxGtm_ChXSel)5}

Definition at line 1496 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_5_P25_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P25_5_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_5, {&MODULE_P25, 5}, (IfxGtm_ChXSel)6}

Definition at line 1497 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_5_P30_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P30_13_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_5, {&MODULE_P30,13}, (IfxGtm_ChXSel)7}

Definition at line 1498 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_5_P31_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P31_13_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_5, {&MODULE_P31,13}, (IfxGtm_ChXSel)8}

Definition at line 1499 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_6_P00_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P00_14_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_6, {&MODULE_P00,14}, (IfxGtm_ChXSel)2}

Definition at line 1500 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_6_P13_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P13_11_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_6, {&MODULE_P13,11}, (IfxGtm_ChXSel)4}

Definition at line 1501 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_6_P14_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P14_14_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_6, {&MODULE_P14,14}, (IfxGtm_ChXSel)3}

Definition at line 1502 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_6_P23_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P23_1_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_6, {&MODULE_P23, 1}, (IfxGtm_ChXSel)1}

Definition at line 1503 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_6_P24_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P24_6_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_6, {&MODULE_P24, 6}, (IfxGtm_ChXSel)5}

Definition at line 1504 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_6_P25_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P25_6_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_6, {&MODULE_P25, 6}, (IfxGtm_ChXSel)6}

Definition at line 1505 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_6_P26_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P26_0_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_6, {&MODULE_P26, 0}, (IfxGtm_ChXSel)9}

Definition at line 1506 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_6_P30_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P30_14_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_6, {&MODULE_P30,14}, (IfxGtm_ChXSel)7}

Definition at line 1507 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_6_P31_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P31_14_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_6, {&MODULE_P31,14}, (IfxGtm_ChXSel)8}

Definition at line 1508 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_7_P00_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P00_15_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_7, {&MODULE_P00,15}, (IfxGtm_ChXSel)2}

Definition at line 1509 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_7_P13_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P13_12_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_7, {&MODULE_P13,12}, (IfxGtm_ChXSel)4}

Definition at line 1510 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_7_P14_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P14_15_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_7, {&MODULE_P14,15}, (IfxGtm_ChXSel)3}

Definition at line 1511 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_7_P23_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P23_0_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_7, {&MODULE_P23, 0}, (IfxGtm_ChXSel)1}

Definition at line 1512 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_7_P24_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P24_7_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_7, {&MODULE_P24, 7}, (IfxGtm_ChXSel)5}

Definition at line 1513 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_7_P25_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P25_7_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_7, {&MODULE_P25, 7}, (IfxGtm_ChXSel)6}

Definition at line 1514 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_7_P30_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P30_15_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_7, {&MODULE_P30,15}, (IfxGtm_ChXSel)7}

Definition at line 1515 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM6_7_P31_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P31_15_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_7, {&MODULE_P31,15}, (IfxGtm_ChXSel)8}

Definition at line 1516 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_0_TOUT0_P02_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT0_P02_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1}

Definition at line 1527 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_0_TOUT109_P10_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT109_P10_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1}

Definition at line 1528 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_0_TOUT151_P02_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT151_P02_12_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_g, 151, {&MODULE_P02,12}, IfxPort_OutputIdx_alt1}

Definition at line 1529 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_0_TOUT18_P00_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT18_P00_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 18, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt1}

Definition at line 1530 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_0_TOUT26_P33_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT26_P33_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1}

Definition at line 1531 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_0_TOUT32_P33_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT32_P33_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1}

Definition at line 1532 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_0_TOUT53_P21_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT53_P21_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1}

Definition at line 1533 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_0_TOUT76_P15_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT76_P15_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1}

Definition at line 1534 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_0_TOUT77_P15_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT77_P15_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1}

Definition at line 1535 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_0_TOUT85_P14_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT85_P14_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 85, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt1}

Definition at line 1536 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_0_TOUT87_P14_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT87_P14_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1}

Definition at line 1537 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_0N_TOUT106_P10_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT106_P10_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1}

Definition at line 1517 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_0N_TOUT17_P00_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT17_P00_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1}

Definition at line 1518 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_0N_TOUT25_P33_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT25_P33_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 25, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1519 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_0N_TOUT34_P33_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT34_P33_12_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 34, {&MODULE_P33,12}, IfxPort_OutputIdx_alt1}

Definition at line 1520 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_0N_TOUT51_P21_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT51_P21_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_f, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1}

Definition at line 1521 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_0N_TOUT61_P20_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT61_P20_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_f, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1522 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_0N_TOUT72_P15_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT72_P15_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1}

Definition at line 1523 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_0N_TOUT7_P02_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT7_P02_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1}

Definition at line 1524 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_0N_TOUT91_P13_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT91_P13_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1}

Definition at line 1525 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_0N_TOUT9_P00_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT9_P00_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1}

Definition at line 1526 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_10_TOUT12_P00_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT12_P00_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1538 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_10_TOUT2_P02_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT2_P02_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1}

Definition at line 1539 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_10_TOUT41_P23_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT41_P23_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1}

Definition at line 1540 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_10_TOUT46_P23_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT46_P23_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 46, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt1}

Definition at line 1541 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_10_TOUT96_P11_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT96_P11_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1542 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_11_TOUT13_P00_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT13_P00_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1}

Definition at line 1543 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_11_TOUT3_P02_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT3_P02_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1544 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_11_TOUT43_P23_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT43_P23_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 43, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt1}

Definition at line 1545 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_11_TOUT49_P22_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT49_P22_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 49, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt1}

Definition at line 1546 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_11_TOUT97_P11_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT97_P11_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1}

Definition at line 1547 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_12_TOUT14_P00_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT14_P00_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1}

Definition at line 1548 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_12_TOUT44_P23_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT44_P23_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 44, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1549 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_12_TOUT4_P02_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT4_P02_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1}

Definition at line 1550 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_12_TOUT50_P22_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT50_P22_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1551 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_12_TOUT98_P11_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT98_P11_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1}

Definition at line 1552 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_13_TOUT15_P00_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT15_P00_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1}

Definition at line 1553 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_13_TOUT5_P02_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT5_P02_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1}

Definition at line 1554 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_13_TOUT99_P11_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT99_P11_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1}

Definition at line 1555 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_14_TOUT100_P11_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT100_P11_11_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1}

Definition at line 1556 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_14_TOUT16_P00_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT16_P00_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1}

Definition at line 1557 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_14_TOUT6_P02_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT6_P02_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1}

Definition at line 1558 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_15_TOUT101_P11_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT101_P11_12_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1}

Definition at line 1559 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_15_TOUT17_P00_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT17_P00_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1}

Definition at line 1560 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_15_TOUT42_P23_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT42_P23_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_b, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1}

Definition at line 1561 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_15_TOUT7_P02_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT7_P02_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1}

Definition at line 1562 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_1_TOUT103_P10_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT103_P10_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 103, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt1}

Definition at line 1576 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_1_TOUT116_P02_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT116_P02_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_g, 116, {&MODULE_P02, 9}, IfxPort_OutputIdx_alt1}

Definition at line 1577 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_1_TOUT19_P00_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT19_P00_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 19, {&MODULE_P00,10}, IfxPort_OutputIdx_alt1}

Definition at line 1578 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_1_TOUT1_P02_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT1_P02_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1}

Definition at line 1579 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_1_TOUT27_P33_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT27_P33_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1}

Definition at line 1580 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_1_TOUT31_P33_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT31_P33_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1}

Definition at line 1581 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_1_TOUT54_P21_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT54_P21_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1582 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_1_TOUT78_P15_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT78_P15_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1}

Definition at line 1583 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_1_TOUT86_P14_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT86_P14_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1}

Definition at line 1584 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_1N_TOUT107_P10_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT107_P10_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1}

Definition at line 1563 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_1N_TOUT10_P00_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT10_P00_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1}

Definition at line 1564 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_1N_TOUT14_P00_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT14_P00_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1}

Definition at line 1565 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_1N_TOUT22_P33_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT22_P33_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 22, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt1}

Definition at line 1566 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_1N_TOUT30_P33_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT30_P33_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1}

Definition at line 1567 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_1N_TOUT35_P33_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT35_P33_13_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 35, {&MODULE_P33,13}, IfxPort_OutputIdx_alt1}

Definition at line 1568 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_1N_TOUT39_P32_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT39_P32_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_g, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1569 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_1N_TOUT4_P02_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT4_P02_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1}

Definition at line 1570 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_1N_TOUT52_P21_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT52_P21_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_f, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1}

Definition at line 1571 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_1N_TOUT57_P21_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT57_P21_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1}

Definition at line 1572 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_1N_TOUT73_P15_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT73_P15_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1}

Definition at line 1573 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_1N_TOUT90_P14_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT90_P14_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1}

Definition at line 1574 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_1N_TOUT92_P13_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT92_P13_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1}

Definition at line 1575 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_2_TOUT104_P10_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT104_P10_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 104, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt1}

Definition at line 1595 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_2_TOUT107_P10_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT107_P10_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1}

Definition at line 1596 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_2_TOUT117_P02_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT117_P02_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_g, 117, {&MODULE_P02,10}, IfxPort_OutputIdx_alt1}

Definition at line 1597 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_2_TOUT20_P00_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT20_P00_11_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 20, {&MODULE_P00,11}, IfxPort_OutputIdx_alt1}

Definition at line 1598 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_2_TOUT28_P33_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT28_P33_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1}

Definition at line 1599 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_2_TOUT2_P02_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT2_P02_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1}

Definition at line 1600 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_2_TOUT33_P33_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT33_P33_11_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 33, {&MODULE_P33,11}, IfxPort_OutputIdx_alt1}

Definition at line 1601 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_2_TOUT55_P21_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT55_P21_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1}

Definition at line 1602 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_2_TOUT79_P15_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT79_P15_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1}

Definition at line 1603 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_2_TOUT88_P14_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT88_P14_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 88, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt1}

Definition at line 1604 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_2N_TOUT108_P10_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT108_P10_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1}

Definition at line 1585 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_2N_TOUT11_P00_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT11_P00_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1}

Definition at line 1586 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_2N_TOUT143_P33_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT143_P33_14_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_g, 143, {&MODULE_P33,14}, IfxPort_OutputIdx_alt1}

Definition at line 1587 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_2N_TOUT15_P00_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT15_P00_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1}

Definition at line 1588 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_2N_TOUT23_P33_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT23_P33_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1}

Definition at line 1589 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_2N_TOUT40_P32_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT40_P32_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_g, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1}

Definition at line 1590 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_2N_TOUT58_P21_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT58_P21_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 58, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt1}

Definition at line 1591 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_2N_TOUT5_P02_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT5_P02_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1}

Definition at line 1592 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_2N_TOUT74_P15_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT74_P15_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1593 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_2N_TOUT93_P13_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT93_P13_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1}

Definition at line 1594 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_3_TOUT105_P10_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT105_P10_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 105, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1616 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_3_TOUT108_P10_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT108_P10_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1}

Definition at line 1617 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_3_TOUT118_P02_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT118_P02_11_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_g, 118, {&MODULE_P02,11}, IfxPort_OutputIdx_alt1}

Definition at line 1618 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_3_TOUT21_P00_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT21_P00_12_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 21, {&MODULE_P00,12}, IfxPort_OutputIdx_alt1}

Definition at line 1619 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_3_TOUT29_P33_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT29_P33_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1}

Definition at line 1620 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_3_TOUT38_P32_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT38_P32_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 38, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt1}

Definition at line 1621 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_3_TOUT3_P02_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT3_P02_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1622 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_3_TOUT56_P21_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT56_P21_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1}

Definition at line 1623 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_3_TOUT71_P15_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT71_P15_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1}

Definition at line 1624 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_3_TOUT80_P14_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT80_P14_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 80, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt1}

Definition at line 1625 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_3_TOUT89_P14_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT89_P14_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 89, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt1}

Definition at line 1626 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_3N_TOUT109_P10_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT109_P10_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1}

Definition at line 1605 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_3N_TOUT12_P00_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT12_P00_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1606 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_3N_TOUT144_P33_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT144_P33_15_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_g, 144, {&MODULE_P33,15}, IfxPort_OutputIdx_alt1}

Definition at line 1607 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_3N_TOUT16_P00_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT16_P00_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1}

Definition at line 1608 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_3N_TOUT24_P33_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT24_P33_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1}

Definition at line 1609 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_3N_TOUT42_P23_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT42_P23_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_g, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1}

Definition at line 1610 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_3N_TOUT59_P20_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT59_P20_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1}

Definition at line 1611 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_3N_TOUT60_P20_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT60_P20_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 60, {&MODULE_P20, 1}, IfxPort_OutputIdx_alt1}

Definition at line 1612 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_3N_TOUT6_P02_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT6_P02_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1}

Definition at line 1613 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_3N_TOUT75_P15_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT75_P15_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 75, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt1}

Definition at line 1614 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_3N_TOUT94_P13_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT94_P13_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1615 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_4_TOUT0_P02_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT0_P02_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_g, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1}

Definition at line 1641 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_4_TOUT102_P10_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT102_P10_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 102, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt1}

Definition at line 1642 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_4_TOUT124_P11_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT124_P11_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 124, {&MODULE_P11, 8}, IfxPort_OutputIdx_alt1}

Definition at line 1643 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_4_TOUT22_P33_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT22_P33_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 22, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt1}

Definition at line 1644 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_4_TOUT30_P33_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT30_P33_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1}

Definition at line 1645 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_4_TOUT37_P32_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT37_P32_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_e, 37, {&MODULE_P32, 1}, IfxPort_OutputIdx_alt1}

Definition at line 1646 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_4_TOUT39_P32_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT39_P32_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1647 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_4_TOUT53_P21_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT53_P21_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_g, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1}

Definition at line 1648 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_4_TOUT57_P21_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT57_P21_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1}

Definition at line 1649 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_4_TOUT64_P20_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT64_P20_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1}

Definition at line 1650 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_4_TOUT72_P15_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT72_P15_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_g, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1}

Definition at line 1651 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_4_TOUT81_P14_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT81_P14_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 81, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt1}

Definition at line 1652 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_4_TOUT90_P14_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT90_P14_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1}

Definition at line 1653 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_4_TOUT94_P13_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT94_P13_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_g, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1654 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_4_TOUT9_P00_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT9_P00_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_g, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1}

Definition at line 1655 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_4N_TOUT10_P00_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT10_P00_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_g, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1}

Definition at line 1627 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_4N_TOUT143_P33_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT143_P33_14_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_e, 143, {&MODULE_P33,14}, IfxPort_OutputIdx_alt1}

Definition at line 1628 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_4N_TOUT147_P34_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT147_P34_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_e, 147, {&MODULE_P34, 2}, IfxPort_OutputIdx_alt1}

Definition at line 1629 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_4N_TOUT1_P02_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT1_P02_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_g, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1}

Definition at line 1630 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_4N_TOUT29_P33_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT29_P33_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_e, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1}

Definition at line 1631 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_4N_TOUT36_P32_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT36_P32_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_e, 36, {&MODULE_P32, 0}, IfxPort_OutputIdx_alt1}

Definition at line 1632 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_4N_TOUT54_P21_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT54_P21_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_g, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1633 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_4N_TOUT56_P21_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT56_P21_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_e, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1}

Definition at line 1634 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_4N_TOUT65_P20_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT65_P20_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1}

Definition at line 1635 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_4N_TOUT73_P15_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT73_P15_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_g, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1}

Definition at line 1636 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_4N_TOUT89_P14_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT89_P14_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_e, 89, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt1}

Definition at line 1637 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_4N_TOUT8_P02_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT8_P02_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_g, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1}

Definition at line 1638 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_4N_TOUT95_P11_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT95_P11_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1}

Definition at line 1639 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_4N_TOUT96_P11_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT96_P11_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_g, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1640 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_5_TOUT110_P10_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT110_P10_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 110, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt1}

Definition at line 1672 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_5_TOUT11_P00_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT11_P00_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_g, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1}

Definition at line 1673 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_5_TOUT128_P12_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT128_P12_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_g, 128, {&MODULE_P12, 0}, IfxPort_OutputIdx_alt1}

Definition at line 1674 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_5_TOUT23_P33_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT23_P33_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1}

Definition at line 1675 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_5_TOUT27_P33_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT27_P33_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_g, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1}

Definition at line 1676 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_5_TOUT2_P02_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT2_P02_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_g, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1}

Definition at line 1677 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_5_TOUT40_P32_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT40_P32_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1}

Definition at line 1678 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_5_TOUT55_P21_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT55_P21_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_g, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1}

Definition at line 1679 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_5_TOUT58_P21_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT58_P21_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 58, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt1}

Definition at line 1680 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_5_TOUT66_P20_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT66_P20_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 66, {&MODULE_P20,10}, IfxPort_OutputIdx_alt1}

Definition at line 1681 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_5_TOUT74_P15_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT74_P15_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_g, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1682 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_5_TOUT82_P14_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT82_P14_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 82, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt1}

Definition at line 1683 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_5_TOUT91_P13_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT91_P13_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1}

Definition at line 1684 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_5_TOUT96_P11_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT96_P11_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1685 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_5N_TOUT121_P11_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT121_P11_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_g, 121, {&MODULE_P11, 4}, IfxPort_OutputIdx_alt1}

Definition at line 1656 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_5N_TOUT12_P00_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT12_P00_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_g, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1657 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_5N_TOUT144_P33_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT144_P33_15_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_e, 144, {&MODULE_P33,15}, IfxPort_OutputIdx_alt1}

Definition at line 1658 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_5N_TOUT148_P34_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT148_P34_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_e, 148, {&MODULE_P34, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1659 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_5N_TOUT26_P33_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT26_P33_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_e, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1}

Definition at line 1660 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_5N_TOUT28_P33_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT28_P33_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_g, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1}

Definition at line 1661 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_5N_TOUT32_P33_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT32_P33_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_e, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1}

Definition at line 1662 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_5N_TOUT37_P32_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT37_P32_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_g, 37, {&MODULE_P32, 1}, IfxPort_OutputIdx_alt1}

Definition at line 1663 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_5N_TOUT3_P02_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT3_P02_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_g, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1664 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_5N_TOUT53_P21_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT53_P21_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_e, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1}

Definition at line 1665 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_5N_TOUT56_P21_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT56_P21_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_g, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1}

Definition at line 1666 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_5N_TOUT67_P20_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT67_P20_11_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 67, {&MODULE_P20,11}, IfxPort_OutputIdx_alt1}

Definition at line 1667 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_5N_TOUT76_P15_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT76_P15_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_g, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1}

Definition at line 1668 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_5N_TOUT77_P15_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT77_P15_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1}

Definition at line 1669 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_5N_TOUT87_P14_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT87_P14_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_e, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1}

Definition at line 1670 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_5N_TOUT97_P11_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT97_P11_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1}

Definition at line 1671 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_6_TOUT106_P10_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT106_P10_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1}

Definition at line 1703 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_6_TOUT129_P12_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT129_P12_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_g, 129, {&MODULE_P12, 1}, IfxPort_OutputIdx_alt1}

Definition at line 1704 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_6_TOUT13_P00_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT13_P00_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_g, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1}

Definition at line 1705 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_6_TOUT24_P33_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT24_P33_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1}

Definition at line 1706 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_6_TOUT29_P33_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT29_P33_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_g, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1}

Definition at line 1707 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_6_TOUT42_P23_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT42_P23_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1}

Definition at line 1708 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_6_TOUT48_P22_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT48_P22_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_g, 48, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt1}

Definition at line 1709 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_6_TOUT4_P02_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT4_P02_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_g, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1}

Definition at line 1710 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_6_TOUT59_P20_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT59_P20_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1}

Definition at line 1711 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_6_TOUT68_P20_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT68_P20_12_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 68, {&MODULE_P20,12}, IfxPort_OutputIdx_alt1}

Definition at line 1712 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_6_TOUT80_P14_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT80_P14_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_e, 80, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt1}

Definition at line 1713 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_6_TOUT83_P14_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT83_P14_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 83, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1714 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_6_TOUT92_P13_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT92_P13_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1}

Definition at line 1715 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_6_TOUT98_P11_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT98_P11_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1}

Definition at line 1716 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_6N_TOUT149_P34_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT149_P34_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_e, 149, {&MODULE_P34, 4}, IfxPort_OutputIdx_alt1}

Definition at line 1686 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_6N_TOUT14_P00_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT14_P00_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_g, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1}

Definition at line 1687 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_6N_TOUT27_P33_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT27_P33_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_e, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1}

Definition at line 1688 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_6N_TOUT30_P33_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT30_P33_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_g, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1}

Definition at line 1689 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_6N_TOUT31_P33_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT31_P33_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_e, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1}

Definition at line 1690 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_6N_TOUT38_P32_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT38_P32_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_e, 38, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt1}

Definition at line 1691 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_6N_TOUT40_P32_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT40_P32_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_e, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1}

Definition at line 1692 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_6N_TOUT49_P22_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT49_P22_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_g, 49, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt1}

Definition at line 1693 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_6N_TOUT54_P21_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT54_P21_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_e, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1694 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_6N_TOUT5_P02_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT5_P02_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_g, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1}

Definition at line 1695 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_6N_TOUT69_P20_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT69_P20_13_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 69, {&MODULE_P20,13}, IfxPort_OutputIdx_alt1}

Definition at line 1696 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_6N_TOUT78_P15_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT78_P15_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1}

Definition at line 1697 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_6N_TOUT82_P14_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT82_P14_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_e, 82, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt1}

Definition at line 1698 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_6N_TOUT86_P14_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT86_P14_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_e, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1}

Definition at line 1699 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_6N_TOUT91_P13_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT91_P13_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_g, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1}

Definition at line 1700 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_6N_TOUT97_P11_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT97_P11_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_g, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1}

Definition at line 1701 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_6N_TOUT99_P11_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT99_P11_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1}

Definition at line 1702 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_7_TOUT101_P11_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT101_P11_12_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1}

Definition at line 1734 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_7_TOUT119_P11_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT119_P11_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 119, {&MODULE_P11, 0}, IfxPort_OutputIdx_alt1}

Definition at line 1735 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_7_TOUT15_P00_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT15_P00_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1}

Definition at line 1736 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_7_TOUT25_P33_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT25_P33_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 25, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1737 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_7_TOUT31_P33_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT31_P33_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1}

Definition at line 1738 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_7_TOUT45_P23_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT45_P23_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 45, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt1}

Definition at line 1739 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_7_TOUT50_P22_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT50_P22_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1740 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_7_TOUT6_P02_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT6_P02_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1}

Definition at line 1741 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_7_TOUT70_P20_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT70_P20_14_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 70, {&MODULE_P20,14}, IfxPort_OutputIdx_alt1}

Definition at line 1742 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_7_TOUT81_P14_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT81_P14_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_e, 81, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt1}

Definition at line 1743 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_7_TOUT84_P14_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT84_P14_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 84, {&MODULE_P14, 4}, IfxPort_OutputIdx_alt1}

Definition at line 1744 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_7_TOUT92_P13_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT92_P13_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1}

Definition at line 1745 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_7_TOUT93_P13_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT93_P13_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1}

Definition at line 1746 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_7N_TOUT100_P11_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT100_P11_11_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1}

Definition at line 1717 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_7N_TOUT123_P11_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT123_P11_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 123, {&MODULE_P11, 7}, IfxPort_OutputIdx_alt1}

Definition at line 1718 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_7N_TOUT130_P22_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT130_P22_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 130, {&MODULE_P22, 4}, IfxPort_OutputIdx_alt1}

Definition at line 1719 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_7N_TOUT150_P34_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT150_P34_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_e, 150, {&MODULE_P34, 5}, IfxPort_OutputIdx_alt1}

Definition at line 1720 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_7N_TOUT16_P00_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT16_P00_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1}

Definition at line 1721 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_7N_TOUT28_P33_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT28_P33_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_e, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1}

Definition at line 1722 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_7N_TOUT32_P33_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT32_P33_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1}

Definition at line 1723 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_7N_TOUT33_P33_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT33_P33_11_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_e, 33, {&MODULE_P33,11}, IfxPort_OutputIdx_alt1}

Definition at line 1724 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_7N_TOUT39_P32_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT39_P32_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_e, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1725 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_7N_TOUT42_P23_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT42_P23_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_e, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1}

Definition at line 1726 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_7N_TOUT55_P21_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT55_P21_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_e, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1}

Definition at line 1727 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_7N_TOUT71_P15_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT71_P15_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1}

Definition at line 1728 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_7N_TOUT79_P15_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT79_P15_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1}

Definition at line 1729 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_7N_TOUT7_P02_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT7_P02_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1}

Definition at line 1730 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_7N_TOUT84_P14_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT84_P14_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_e, 84, {&MODULE_P14, 4}, IfxPort_OutputIdx_alt1}

Definition at line 1731 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_7N_TOUT88_P14_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT88_P14_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_e, 88, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt1}

Definition at line 1732 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_7N_TOUT93_P13_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT93_P13_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1}

Definition at line 1733 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_8_TOUT0_P02_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT0_P02_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1}

Definition at line 1747 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_8_TOUT48_P22_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT48_P22_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 48, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt1}

Definition at line 1748 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_8_TOUT51_P21_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT51_P21_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1}

Definition at line 1749 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_8_TOUT8_P02_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT8_P02_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1}

Definition at line 1750 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_8_TOUT94_P13_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT94_P13_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1751 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_8_TOUT95_P11_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT95_P11_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1}

Definition at line 1752 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_8_TOUT9_P00_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT9_P00_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1}

Definition at line 1753 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_9_TOUT10_P00_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT10_P00_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1}

Definition at line 1754 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_9_TOUT11_P00_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT11_P00_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1}

Definition at line 1755 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_9_TOUT1_P02_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT1_P02_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1}

Definition at line 1756 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_9_TOUT47_P22_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT47_P22_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 47, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt1}

Definition at line 1757 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_9_TOUT52_P21_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT52_P21_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1}

Definition at line 1758 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_0_TOUT0_P02_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT0_P02_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_f, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1}

Definition at line 1764 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_0_TOUT18_P00_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT18_P00_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 18, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt1}

Definition at line 1765 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_0_TOUT26_P33_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT26_P33_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1}

Definition at line 1766 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_0_TOUT32_P33_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT32_P33_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1}

Definition at line 1767 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_0_TOUT68_P20_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT68_P20_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 68, {&MODULE_P20,12}, IfxPort_OutputIdx_alt1}

Definition at line 1768 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_0_TOUT76_P15_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT76_P15_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1}

Definition at line 1769 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_0_TOUT77_P15_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT77_P15_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1}

Definition at line 1770 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_0_TOUT85_P14_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT85_P14_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 85, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt1}

Definition at line 1771 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_0_TOUT8_P02_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT8_P02_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1}

Definition at line 1772 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_0_TOUT9_P00_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT9_P00_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1}

Definition at line 1773 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_0N_TOUT17_P00_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0N_TOUT17_P00_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_f, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1}

Definition at line 1759 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_0N_TOUT25_P33_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0N_TOUT25_P33_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_f, 25, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1760 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_0N_TOUT34_P33_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0N_TOUT34_P33_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_f, 34, {&MODULE_P33,12}, IfxPort_OutputIdx_alt1}

Definition at line 1761 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_0N_TOUT75_P15_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0N_TOUT75_P15_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_f, 75, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt1}

Definition at line 1762 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_0N_TOUT7_P02_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0N_TOUT7_P02_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_f, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1}

Definition at line 1763 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_10_TOUT143_P33_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT143_P33_14_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 143, {&MODULE_P33,14}, IfxPort_OutputIdx_alt1}

Definition at line 1774 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_10_TOUT266_P10_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT266_P10_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 266, {&MODULE_P10,10}, IfxPort_OutputIdx_alt1}

Definition at line 1775 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_10_TOUT2_P02_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT2_P02_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1}

Definition at line 1776 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_10_TOUT62_P20_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT62_P20_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 62, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt1}

Definition at line 1777 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_11_TOUT144_P33_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT144_P33_15_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 144, {&MODULE_P33,15}, IfxPort_OutputIdx_alt1}

Definition at line 1778 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_11_TOUT267_P10_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT267_P10_14_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 267, {&MODULE_P10,14}, IfxPort_OutputIdx_alt1}

Definition at line 1779 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_11_TOUT3_P02_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT3_P02_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1780 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_11_TOUT60_P20_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT60_P20_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 60, {&MODULE_P20, 1}, IfxPort_OutputIdx_alt1}

Definition at line 1781 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_11_TOUT63_P20_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT63_P20_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 63, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt1}

Definition at line 1782 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_12_TOUT268_P10_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT268_P10_13_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 268, {&MODULE_P10,13}, IfxPort_OutputIdx_alt1}

Definition at line 1783 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_12_TOUT34_P33_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT34_P33_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 34, {&MODULE_P33,12}, IfxPort_OutputIdx_alt1}

Definition at line 1784 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_12_TOUT4_P02_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT4_P02_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_b, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1}

Definition at line 1785 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_12_TOUT61_P20_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT61_P20_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1786 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_13_TOUT146_P34_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT146_P34_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 146, {&MODULE_P34, 1}, IfxPort_OutputIdx_alt1}

Definition at line 1787 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_13_TOUT269_P10_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT269_P10_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 269, {&MODULE_P10,11}, IfxPort_OutputIdx_alt1}

Definition at line 1788 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_13_TOUT35_P33_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT35_P33_13_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 35, {&MODULE_P33,13}, IfxPort_OutputIdx_alt1}

Definition at line 1789 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_13_TOUT5_P02_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT5_P02_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1}

Definition at line 1790 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_13_TOUT65_P20_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT65_P20_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1}

Definition at line 1791 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_14_TOUT147_P34_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT147_P34_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 147, {&MODULE_P34, 2}, IfxPort_OutputIdx_alt1}

Definition at line 1792 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_14_TOUT270_P10_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT270_P10_15_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 270, {&MODULE_P10,15}, IfxPort_OutputIdx_alt1}

Definition at line 1793 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_14_TOUT36_P32_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT36_P32_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 36, {&MODULE_P32, 0}, IfxPort_OutputIdx_alt1}

Definition at line 1794 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_14_TOUT66_P20_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT66_P20_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 66, {&MODULE_P20,10}, IfxPort_OutputIdx_alt1}

Definition at line 1795 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_14_TOUT6_P02_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT6_P02_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1}

Definition at line 1796 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_15_TOUT148_P34_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT148_P34_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 148, {&MODULE_P34, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1797 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_15_TOUT150_P34_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT150_P34_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 150, {&MODULE_P34, 5}, IfxPort_OutputIdx_alt1}

Definition at line 1798 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_15_TOUT37_P32_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT37_P32_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 37, {&MODULE_P32, 1}, IfxPort_OutputIdx_alt1}

Definition at line 1799 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_15_TOUT67_P20_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT67_P20_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 67, {&MODULE_P20,11}, IfxPort_OutputIdx_alt1}

Definition at line 1800 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_15_TOUT7_P02_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT7_P02_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_b, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1}

Definition at line 1801 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_1_TOUT10_P00_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT10_P00_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1}

Definition at line 1810 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_1_TOUT116_P02_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT116_P02_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 116, {&MODULE_P02, 9}, IfxPort_OutputIdx_alt1}

Definition at line 1811 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_1_TOUT11_P00_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT11_P00_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1}

Definition at line 1812 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_1_TOUT19_P00_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT19_P00_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 19, {&MODULE_P00,10}, IfxPort_OutputIdx_alt1}

Definition at line 1813 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_1_TOUT1_P02_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT1_P02_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_f, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1}

Definition at line 1814 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_1_TOUT242_P15_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT242_P15_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 242, {&MODULE_P15,10}, IfxPort_OutputIdx_alt1}

Definition at line 1815 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_1_TOUT27_P33_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT27_P33_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1}

Definition at line 1816 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_1_TOUT31_P33_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT31_P33_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1}

Definition at line 1817 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_1_TOUT69_P20_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT69_P20_13_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 69, {&MODULE_P20,13}, IfxPort_OutputIdx_alt1}

Definition at line 1818 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_1_TOUT78_P15_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT78_P15_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1}

Definition at line 1819 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_1_TOUT86_P14_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT86_P14_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1}

Definition at line 1820 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_1N_TOUT14_P00_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT14_P00_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_f, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1}

Definition at line 1802 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_1N_TOUT22_P33_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT22_P33_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_f, 22, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt1}

Definition at line 1803 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_1N_TOUT245_P15_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT245_P15_13_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_g, 245, {&MODULE_P15,13}, IfxPort_OutputIdx_alt1}

Definition at line 1804 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_1N_TOUT30_P33_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT30_P33_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_f, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1}

Definition at line 1805 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_1N_TOUT35_P33_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT35_P33_13_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_f, 35, {&MODULE_P33,13}, IfxPort_OutputIdx_alt1}

Definition at line 1806 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_1N_TOUT39_P32_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT39_P32_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_h, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1807 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_1N_TOUT4_P02_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT4_P02_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_f, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1}

Definition at line 1808 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_1N_TOUT72_P15_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT72_P15_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_f, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1}

Definition at line 1809 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_2_TOUT117_P02_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT117_P02_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 117, {&MODULE_P02,10}, IfxPort_OutputIdx_alt1}

Definition at line 1829 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_2_TOUT12_P00_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT12_P00_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1830 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_2_TOUT20_P00_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT20_P00_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 20, {&MODULE_P00,11}, IfxPort_OutputIdx_alt1}

Definition at line 1831 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_2_TOUT243_P15_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT243_P15_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 243, {&MODULE_P15,11}, IfxPort_OutputIdx_alt1}

Definition at line 1832 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_2_TOUT28_P33_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT28_P33_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1}

Definition at line 1833 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_2_TOUT2_P02_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT2_P02_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_f, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1}

Definition at line 1834 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_2_TOUT33_P33_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT33_P33_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 33, {&MODULE_P33,11}, IfxPort_OutputIdx_alt1}

Definition at line 1835 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_2_TOUT70_P20_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT70_P20_14_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 70, {&MODULE_P20,14}, IfxPort_OutputIdx_alt1}

Definition at line 1836 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_2_TOUT79_P15_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT79_P15_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1}

Definition at line 1837 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_2N_TOUT143_P33_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT143_P33_14_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_h, 143, {&MODULE_P33,14}, IfxPort_OutputIdx_alt1}

Definition at line 1821 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_2N_TOUT15_P00_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT15_P00_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_f, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1}

Definition at line 1822 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_2N_TOUT23_P33_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT23_P33_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_f, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1}

Definition at line 1823 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_2N_TOUT246_P15_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT246_P15_14_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_g, 246, {&MODULE_P15,14}, IfxPort_OutputIdx_alt1}

Definition at line 1824 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_2N_TOUT40_P32_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT40_P32_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_h, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1}

Definition at line 1825 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_2N_TOUT41_P23_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT41_P23_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_f, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1}

Definition at line 1826 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_2N_TOUT5_P02_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT5_P02_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_f, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1}

Definition at line 1827 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_2N_TOUT73_P15_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT73_P15_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_f, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1}

Definition at line 1828 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_3_TOUT118_P02_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT118_P02_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 118, {&MODULE_P02,11}, IfxPort_OutputIdx_alt1}

Definition at line 1845 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_3_TOUT13_P00_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT13_P00_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1}

Definition at line 1846 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_3_TOUT21_P00_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT21_P00_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 21, {&MODULE_P00,12}, IfxPort_OutputIdx_alt1}

Definition at line 1847 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_3_TOUT244_P15_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT244_P15_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 244, {&MODULE_P15,12}, IfxPort_OutputIdx_alt1}

Definition at line 1848 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_3_TOUT29_P33_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT29_P33_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1}

Definition at line 1849 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_3_TOUT38_P32_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT38_P32_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 38, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt1}

Definition at line 1850 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_3_TOUT3_P02_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT3_P02_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_f, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1851 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_3_TOUT71_P15_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT71_P15_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1}

Definition at line 1852 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_3_TOUT80_P14_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT80_P14_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 80, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt1}

Definition at line 1853 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_3N_TOUT144_P33_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_3N_TOUT144_P33_15_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_h, 144, {&MODULE_P33,15}, IfxPort_OutputIdx_alt1}

Definition at line 1838 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_3N_TOUT16_P00_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_3N_TOUT16_P00_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_f, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1}

Definition at line 1839 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_3N_TOUT247_P15_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_3N_TOUT247_P15_15_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_g, 247, {&MODULE_P15,15}, IfxPort_OutputIdx_alt1}

Definition at line 1840 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_3N_TOUT24_P33_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_3N_TOUT24_P33_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_f, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1}

Definition at line 1841 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_3N_TOUT43_P23_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_3N_TOUT43_P23_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_g, 43, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt1}

Definition at line 1842 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_3N_TOUT6_P02_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_3N_TOUT6_P02_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_f, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1}

Definition at line 1843 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_3N_TOUT74_P15_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_3N_TOUT74_P15_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_f, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1844 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_4_TOUT0_P02_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT0_P02_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_h, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1}

Definition at line 1869 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_4_TOUT124_P11_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT124_P11_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_h, 124, {&MODULE_P11, 8}, IfxPort_OutputIdx_alt1}

Definition at line 1870 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_4_TOUT14_P00_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT14_P00_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1}

Definition at line 1871 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_4_TOUT22_P33_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT22_P33_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 22, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt1}

Definition at line 1872 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_4_TOUT245_P15_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT245_P15_13_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 245, {&MODULE_P15,13}, IfxPort_OutputIdx_alt1}

Definition at line 1873 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_4_TOUT30_P33_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT30_P33_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1}

Definition at line 1874 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_4_TOUT37_P32_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT37_P32_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 37, {&MODULE_P32, 1}, IfxPort_OutputIdx_alt1}

Definition at line 1875 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_4_TOUT39_P32_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT39_P32_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1876 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_4_TOUT53_P21_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT53_P21_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_h, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1}

Definition at line 1877 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_4_TOUT64_P20_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT64_P20_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_g, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1}

Definition at line 1878 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_4_TOUT72_P15_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT72_P15_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1}

Definition at line 1879 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_4_TOUT81_P14_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT81_P14_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 81, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt1}

Definition at line 1880 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_4_TOUT94_P13_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT94_P13_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_h, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1881 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_4_TOUT9_P00_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT9_P00_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_h, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1}

Definition at line 1882 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_4N_TOUT10_P00_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT10_P00_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_h, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1}

Definition at line 1854 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_4N_TOUT13_P00_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT13_P00_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1}

Definition at line 1855 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_4N_TOUT143_P33_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT143_P33_14_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 143, {&MODULE_P33,14}, IfxPort_OutputIdx_alt1}

Definition at line 1856 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_4N_TOUT147_P34_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT147_P34_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 147, {&MODULE_P34, 2}, IfxPort_OutputIdx_alt1}

Definition at line 1857 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_4N_TOUT1_P02_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT1_P02_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_h, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1}

Definition at line 1858 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_4N_TOUT21_P00_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT21_P00_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 21, {&MODULE_P00,12}, IfxPort_OutputIdx_alt1}

Definition at line 1859 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_4N_TOUT244_P15_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT244_P15_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_g, 244, {&MODULE_P15,12}, IfxPort_OutputIdx_alt1}

Definition at line 1860 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_4N_TOUT29_P33_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT29_P33_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1}

Definition at line 1861 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_4N_TOUT36_P32_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT36_P32_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 36, {&MODULE_P32, 0}, IfxPort_OutputIdx_alt1}

Definition at line 1862 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_4N_TOUT54_P21_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT54_P21_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_h, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1863 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_4N_TOUT65_P20_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT65_P20_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_g, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1}

Definition at line 1864 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_4N_TOUT71_P15_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT71_P15_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1}

Definition at line 1865 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_4N_TOUT73_P15_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT73_P15_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_h, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1}

Definition at line 1866 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_4N_TOUT8_P02_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT8_P02_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_h, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1}

Definition at line 1867 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_4N_TOUT95_P11_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT95_P11_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_h, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1}

Definition at line 1868 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_5_TOUT11_P00_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT11_P00_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_h, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1}

Definition at line 1898 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_5_TOUT15_P00_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT15_P00_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1}

Definition at line 1899 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_5_TOUT23_P33_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT23_P33_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1}

Definition at line 1900 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_5_TOUT246_P15_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT246_P15_14_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 246, {&MODULE_P15,14}, IfxPort_OutputIdx_alt1}

Definition at line 1901 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_5_TOUT27_P33_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT27_P33_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_h, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1}

Definition at line 1902 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_5_TOUT2_P02_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT2_P02_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_h, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1}

Definition at line 1903 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_5_TOUT40_P32_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT40_P32_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1}

Definition at line 1904 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_5_TOUT41_P23_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT41_P23_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1}

Definition at line 1905 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_5_TOUT55_P21_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT55_P21_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_h, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1}

Definition at line 1906 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_5_TOUT66_P20_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT66_P20_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_g, 66, {&MODULE_P20,10}, IfxPort_OutputIdx_alt1}

Definition at line 1907 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_5_TOUT73_P15_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT73_P15_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1}

Definition at line 1908 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_5_TOUT74_P15_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT74_P15_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_h, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1909 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_5_TOUT82_P14_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT82_P14_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 82, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt1}

Definition at line 1910 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_5_TOUT96_P11_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT96_P11_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_h, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1911 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_5N_TOUT12_P00_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT12_P00_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_h, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1883 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_5N_TOUT144_P33_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT144_P33_15_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 144, {&MODULE_P33,15}, IfxPort_OutputIdx_alt1}

Definition at line 1884 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_5N_TOUT148_P34_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT148_P34_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 148, {&MODULE_P34, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1885 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_5N_TOUT18_P00_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT18_P00_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 18, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt1}

Definition at line 1886 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_5N_TOUT26_P33_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT26_P33_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1}

Definition at line 1887 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_5N_TOUT28_P33_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT28_P33_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_h, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1}

Definition at line 1888 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_5N_TOUT32_P33_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT32_P33_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1}

Definition at line 1889 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_5N_TOUT37_P32_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT37_P32_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_h, 37, {&MODULE_P32, 1}, IfxPort_OutputIdx_alt1}

Definition at line 1890 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_5N_TOUT3_P02_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT3_P02_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_h, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1891 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_5N_TOUT56_P21_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT56_P21_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_h, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1}

Definition at line 1892 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_5N_TOUT67_P20_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT67_P20_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_g, 67, {&MODULE_P20,11}, IfxPort_OutputIdx_alt1}

Definition at line 1893 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_5N_TOUT76_P15_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT76_P15_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_h, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1}

Definition at line 1894 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_5N_TOUT77_P15_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT77_P15_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_g, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1}

Definition at line 1895 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_5N_TOUT97_P11_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT97_P11_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_h, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1}

Definition at line 1896 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_5N_TOUT9_P00_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT9_P00_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1}

Definition at line 1897 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_6_TOUT13_P00_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT13_P00_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_h, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1}

Definition at line 1930 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_6_TOUT16_P00_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT16_P00_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1}

Definition at line 1931 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_6_TOUT247_P15_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT247_P15_15_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 247, {&MODULE_P15,15}, IfxPort_OutputIdx_alt1}

Definition at line 1932 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_6_TOUT24_P33_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT24_P33_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1}

Definition at line 1933 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_6_TOUT29_P33_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT29_P33_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_h, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1}

Definition at line 1934 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_6_TOUT43_P23_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT43_P23_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 43, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt1}

Definition at line 1935 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_6_TOUT48_P22_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT48_P22_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_h, 48, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt1}

Definition at line 1936 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_6_TOUT4_P02_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT4_P02_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_h, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1}

Definition at line 1937 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_6_TOUT68_P20_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT68_P20_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_g, 68, {&MODULE_P20,12}, IfxPort_OutputIdx_alt1}

Definition at line 1938 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_6_TOUT74_P15_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT74_P15_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1939 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_6_TOUT80_P14_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT80_P14_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 80, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt1}

Definition at line 1940 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_6_TOUT83_P14_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT83_P14_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 83, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1941 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_6_TOUT98_P11_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT98_P11_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_h, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1}

Definition at line 1942 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_6N_TOUT10_P00_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT10_P00_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1}

Definition at line 1912 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_6N_TOUT11_P00_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT11_P00_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1}

Definition at line 1913 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_6N_TOUT149_P34_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT149_P34_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 149, {&MODULE_P34, 4}, IfxPort_OutputIdx_alt1}

Definition at line 1914 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_6N_TOUT14_P00_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT14_P00_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_h, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1}

Definition at line 1915 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_6N_TOUT19_P00_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT19_P00_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 19, {&MODULE_P00,10}, IfxPort_OutputIdx_alt1}

Definition at line 1916 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_6N_TOUT242_P15_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT242_P15_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_g, 242, {&MODULE_P15,10}, IfxPort_OutputIdx_alt1}

Definition at line 1917 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_6N_TOUT27_P33_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT27_P33_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1}

Definition at line 1918 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_6N_TOUT30_P33_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT30_P33_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_h, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1}

Definition at line 1919 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_6N_TOUT31_P33_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT31_P33_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1}

Definition at line 1920 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_6N_TOUT38_P32_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT38_P32_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 38, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt1}

Definition at line 1921 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_6N_TOUT40_P32_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT40_P32_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1}

Definition at line 1922 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_6N_TOUT49_P22_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT49_P22_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_h, 49, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt1}

Definition at line 1923 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_6N_TOUT5_P02_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT5_P02_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_h, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1}

Definition at line 1924 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_6N_TOUT69_P20_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT69_P20_13_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_g, 69, {&MODULE_P20,13}, IfxPort_OutputIdx_alt1}

Definition at line 1925 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_6N_TOUT78_P15_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT78_P15_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_g, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1}

Definition at line 1926 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_6N_TOUT82_P14_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT82_P14_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 82, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt1}

Definition at line 1927 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_6N_TOUT91_P13_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT91_P13_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_h, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1}

Definition at line 1928 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_6N_TOUT99_P11_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT99_P11_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_h, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1}

Definition at line 1929 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_7_TOUT101_P11_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT101_P11_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_h, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1}

Definition at line 1960 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_7_TOUT15_P00_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT15_P00_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_h, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1}

Definition at line 1961 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_7_TOUT17_P00_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT17_P00_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1}

Definition at line 1962 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_7_TOUT248_P13_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT248_P13_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 248, {&MODULE_P13, 9}, IfxPort_OutputIdx_alt1}

Definition at line 1963 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_7_TOUT25_P33_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT25_P33_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 25, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1964 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_7_TOUT31_P33_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT31_P33_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_h, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1}

Definition at line 1965 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_7_TOUT44_P23_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT44_P23_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 44, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1966 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_7_TOUT45_P23_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT45_P23_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 45, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt1}

Definition at line 1967 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_7_TOUT50_P22_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT50_P22_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_h, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1968 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_7_TOUT64_P20_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT64_P20_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1}

Definition at line 1969 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_7_TOUT6_P02_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT6_P02_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_h, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1}

Definition at line 1970 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_7_TOUT70_P20_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT70_P20_14_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 70, {&MODULE_P20,14}, IfxPort_OutputIdx_alt1}

Definition at line 1971 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_7_TOUT75_P15_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT75_P15_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 75, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt1}

Definition at line 1972 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_7_TOUT81_P14_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT81_P14_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 81, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt1}

Definition at line 1973 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_7_TOUT84_P14_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT84_P14_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 84, {&MODULE_P14, 4}, IfxPort_OutputIdx_alt1}

Definition at line 1974 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_7_TOUT92_P13_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT92_P13_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_h, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1}

Definition at line 1975 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_7N_TOUT100_P11_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT100_P11_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_h, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1}

Definition at line 1943 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_7N_TOUT12_P00_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT12_P00_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1944 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_7N_TOUT130_P22_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT130_P22_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_h, 130, {&MODULE_P22, 4}, IfxPort_OutputIdx_alt1}

Definition at line 1945 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_7N_TOUT150_P34_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT150_P34_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 150, {&MODULE_P34, 5}, IfxPort_OutputIdx_alt1}

Definition at line 1946 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_7N_TOUT16_P00_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT16_P00_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_h, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1}

Definition at line 1947 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_7N_TOUT20_P00_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT20_P00_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 20, {&MODULE_P00,11}, IfxPort_OutputIdx_alt1}

Definition at line 1948 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_7N_TOUT243_P15_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT243_P15_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 243, {&MODULE_P15,11}, IfxPort_OutputIdx_alt1}

Definition at line 1949 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_7N_TOUT28_P33_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT28_P33_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1}

Definition at line 1950 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_7N_TOUT32_P33_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT32_P33_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_h, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1}

Definition at line 1951 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_7N_TOUT33_P33_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT33_P33_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 33, {&MODULE_P33,11}, IfxPort_OutputIdx_alt1}

Definition at line 1952 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_7N_TOUT39_P32_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT39_P32_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1953 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_7N_TOUT42_P23_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT42_P23_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1}

Definition at line 1954 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_7N_TOUT71_P15_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT71_P15_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_h, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1}

Definition at line 1955 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_7N_TOUT79_P15_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT79_P15_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1}

Definition at line 1956 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_7N_TOUT7_P02_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT7_P02_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_h, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1}

Definition at line 1957 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_7N_TOUT84_P14_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT84_P14_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 84, {&MODULE_P14, 4}, IfxPort_OutputIdx_alt1}

Definition at line 1958 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_7N_TOUT93_P13_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT93_P13_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_h, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1}

Definition at line 1959 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_8_TOUT0_P02_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT0_P02_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_b, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1}

Definition at line 1976 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_8_TOUT128_P12_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT128_P12_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 128, {&MODULE_P12, 0}, IfxPort_OutputIdx_alt1}

Definition at line 1977 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_8_TOUT141_P32_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT141_P32_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 141, {&MODULE_P32, 6}, IfxPort_OutputIdx_alt1}

Definition at line 1978 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_8_TOUT249_P13_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT249_P13_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 249, {&MODULE_P13,12}, IfxPort_OutputIdx_alt1}

Definition at line 1979 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_9_TOUT129_P12_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT129_P12_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 129, {&MODULE_P12, 1}, IfxPort_OutputIdx_alt1}

Definition at line 1980 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_9_TOUT142_P32_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT142_P32_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 142, {&MODULE_P32, 7}, IfxPort_OutputIdx_alt1}

Definition at line 1981 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_9_TOUT1_P02_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT1_P02_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_b, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1}

Definition at line 1982 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_9_TOUT265_P10_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT265_P10_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 265, {&MODULE_P10, 9}, IfxPort_OutputIdx_alt1}

Definition at line 1983 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_0_TOUT119_P11_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT119_P11_0_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 119, {&MODULE_P11, 0}, IfxPort_OutputIdx_alt1}

Definition at line 1992 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_0_TOUT120_P11_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT120_P11_1_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_g, 120, {&MODULE_P11, 1}, IfxPort_OutputIdx_alt1}

Definition at line 1993 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_0_TOUT250_P13_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT250_P13_11_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 250, {&MODULE_P13,11}, IfxPort_OutputIdx_alt1}

Definition at line 1994 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_0_TOUT48_P22_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT48_P22_1_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 48, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt1}

Definition at line 1995 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_0_TOUT53_P21_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT53_P21_2_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1}

Definition at line 1996 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_0_TOUT65_P20_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT65_P20_9_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1}

Definition at line 1997 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_0_TOUT87_P14_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT87_P14_7_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1}

Definition at line 1998 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_0_TOUT94_P13_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT94_P13_3_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1999 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_0_TOUT95_P11_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT95_P11_2_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_g, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1}

Definition at line 2000 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_0N_TOUT101_P11_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT101_P11_12_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1}

Definition at line 1984 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_0N_TOUT126_P11_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT126_P11_14_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_g, 126, {&MODULE_P11,14}, IfxPort_OutputIdx_alt1}

Definition at line 1985 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_0N_TOUT264_P13_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT264_P13_15_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 264, {&MODULE_P13,15}, IfxPort_OutputIdx_alt1}

Definition at line 1986 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_0N_TOUT43_P23_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT43_P23_2_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 43, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt1}

Definition at line 1987 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_0N_TOUT51_P21_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT51_P21_0_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1}

Definition at line 1988 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_0N_TOUT61_P20_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT61_P20_3_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1}

Definition at line 1989 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_0N_TOUT76_P15_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT76_P15_5_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1}

Definition at line 1990 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_0N_TOUT91_P13_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT91_P13_0_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_f, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1}

Definition at line 1991 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_10_TOUT104_P10_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_10_TOUT104_P10_2_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 104, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt1}

Definition at line 2001 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_10_TOUT107_P10_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_10_TOUT107_P10_5_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1}

Definition at line 2002 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_10_TOUT133_P22_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_10_TOUT133_P22_7_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 133, {&MODULE_P22, 7}, IfxPort_OutputIdx_alt1}

Definition at line 2003 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_10_TOUT260_P14_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_10_TOUT260_P14_13_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 260, {&MODULE_P14,13}, IfxPort_OutputIdx_alt1}

Definition at line 2004 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_10_TOUT62_P20_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_10_TOUT62_P20_6_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 62, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt1}

Definition at line 2005 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_10_TOUT70_P20_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_10_TOUT70_P20_14_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 70, {&MODULE_P20,14}, IfxPort_OutputIdx_alt1}

Definition at line 2006 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_11_TOUT105_P10_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_11_TOUT105_P10_3_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 105, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt1}

Definition at line 2007 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_11_TOUT108_P10_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_11_TOUT108_P10_6_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1}

Definition at line 2008 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_11_TOUT134_P22_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_11_TOUT134_P22_8_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 134, {&MODULE_P22, 8}, IfxPort_OutputIdx_alt1}

Definition at line 2009 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_11_TOUT261_P14_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_11_TOUT261_P14_12_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 261, {&MODULE_P14,12}, IfxPort_OutputIdx_alt1}

Definition at line 2010 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_11_TOUT63_P20_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_11_TOUT63_P20_7_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 63, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt1}

Definition at line 2011 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_11_TOUT71_P15_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_11_TOUT71_P15_0_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1}

Definition at line 2012 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_12_TOUT102_P10_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_12_TOUT102_P10_0_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_b, 102, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt1}

Definition at line 2013 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_12_TOUT135_P22_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_12_TOUT135_P22_9_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 135, {&MODULE_P22, 9}, IfxPort_OutputIdx_alt1}

Definition at line 2014 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_12_TOUT262_P13_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_12_TOUT262_P13_13_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 262, {&MODULE_P13,13}, IfxPort_OutputIdx_alt1}

Definition at line 2015 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_12_TOUT34_P33_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_12_TOUT34_P33_12_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_b, 34, {&MODULE_P33,12}, IfxPort_OutputIdx_alt1}

Definition at line 2016 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_12_TOUT72_P15_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_12_TOUT72_P15_1_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_b, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1}

Definition at line 2017 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_13_TOUT110_P10_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_13_TOUT110_P10_8_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 110, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt1}

Definition at line 2018 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_13_TOUT136_P22_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_13_TOUT136_P22_10_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 136, {&MODULE_P22,10}, IfxPort_OutputIdx_alt1}

Definition at line 2019 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_13_TOUT263_P14_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_13_TOUT263_P14_15_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 263, {&MODULE_P14,15}, IfxPort_OutputIdx_alt1}

Definition at line 2020 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_13_TOUT35_P33_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_13_TOUT35_P33_13_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 35, {&MODULE_P33,13}, IfxPort_OutputIdx_alt1}

Definition at line 2021 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_13_TOUT65_P20_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_13_TOUT65_P20_9_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1}

Definition at line 2022 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_13_TOUT73_P15_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_13_TOUT73_P15_2_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1}

Definition at line 2023 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_14_TOUT137_P22_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_14_TOUT137_P22_11_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 137, {&MODULE_P22,11}, IfxPort_OutputIdx_alt1}

Definition at line 2024 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_14_TOUT264_P13_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_14_TOUT264_P13_15_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 264, {&MODULE_P13,15}, IfxPort_OutputIdx_alt1}

Definition at line 2025 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_14_TOUT36_P32_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_14_TOUT36_P32_0_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 36, {&MODULE_P32, 0}, IfxPort_OutputIdx_alt1}

Definition at line 2026 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_14_TOUT66_P20_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_14_TOUT66_P20_10_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 66, {&MODULE_P20,10}, IfxPort_OutputIdx_alt1}

Definition at line 2027 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_14_TOUT74_P15_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_14_TOUT74_P15_3_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1}

Definition at line 2028 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_15_TOUT149_P34_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_15_TOUT149_P34_4_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 149, {&MODULE_P34, 4}, IfxPort_OutputIdx_alt1}

Definition at line 2029 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_15_TOUT37_P32_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_15_TOUT37_P32_1_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_b, 37, {&MODULE_P32, 1}, IfxPort_OutputIdx_alt1}

Definition at line 2030 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_15_TOUT67_P20_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_15_TOUT67_P20_11_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_b, 67, {&MODULE_P20,11}, IfxPort_OutputIdx_alt1}

Definition at line 2031 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_15_TOUT75_P15_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_15_TOUT75_P15_4_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_b, 75, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt1}

Definition at line 2032 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_1_TOUT120_P11_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_1_TOUT120_P11_1_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 120, {&MODULE_P11, 1}, IfxPort_OutputIdx_alt1}

Definition at line 2045 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_1_TOUT127_P11_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_1_TOUT127_P11_15_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 127, {&MODULE_P11,15}, IfxPort_OutputIdx_alt1}

Definition at line 2046 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_1_TOUT251_P13_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_1_TOUT251_P13_10_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 251, {&MODULE_P13,10}, IfxPort_OutputIdx_alt1}

Definition at line 2047 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_1_TOUT47_P22_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_1_TOUT47_P22_0_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 47, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt1}

Definition at line 2048 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_1_TOUT54_P21_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_1_TOUT54_P21_3_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1}

Definition at line 2049 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_1_TOUT64_P20_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_1_TOUT64_P20_8_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1}

Definition at line 2050 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_1_TOUT95_P11_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_1_TOUT95_P11_2_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1}

Definition at line 2051 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_1N_TOUT123_P11_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT123_P11_7_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 123, {&MODULE_P11, 7}, IfxPort_OutputIdx_alt1}

Definition at line 2033 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_1N_TOUT124_P11_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT124_P11_8_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_g, 124, {&MODULE_P11, 8}, IfxPort_OutputIdx_alt1}

Definition at line 2034 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_1N_TOUT254_P13_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT254_P13_5_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 254, {&MODULE_P13, 5}, IfxPort_OutputIdx_alt1}

Definition at line 2035 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_1N_TOUT44_P23_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT44_P23_3_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 44, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt1}

Definition at line 2036 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_1N_TOUT50_P22_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT50_P22_3_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_f, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1}

Definition at line 2037 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_1N_TOUT52_P21_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT52_P21_1_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1}

Definition at line 2038 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_1N_TOUT57_P21_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT57_P21_6_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_f, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1}

Definition at line 2039 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_1N_TOUT61_P20_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT61_P20_3_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_g, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1}

Definition at line 2040 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_1N_TOUT79_P15_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT79_P15_8_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1}

Definition at line 2041 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_1N_TOUT90_P14_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT90_P14_10_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_f, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1}

Definition at line 2042 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_1N_TOUT92_P13_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT92_P13_1_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_f, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1}

Definition at line 2043 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_1N_TOUT98_P11_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT98_P11_9_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1}

Definition at line 2044 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_2_TOUT121_P11_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT121_P11_4_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 121, {&MODULE_P11, 4}, IfxPort_OutputIdx_alt1}

Definition at line 2059 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_2_TOUT125_P11_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT125_P11_13_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 125, {&MODULE_P11,13}, IfxPort_OutputIdx_alt1}

Definition at line 2060 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_2_TOUT252_P13_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT252_P13_14_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 252, {&MODULE_P13,14}, IfxPort_OutputIdx_alt1}

Definition at line 2061 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_2_TOUT46_P23_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT46_P23_5_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 46, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt1}

Definition at line 2062 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_2_TOUT50_P22_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT50_P22_3_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1}

Definition at line 2063 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_2_TOUT55_P21_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT55_P21_4_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1}

Definition at line 2064 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_2_TOUT63_P20_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT63_P20_7_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 63, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt1}

Definition at line 2065 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_2_TOUT88_P14_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT88_P14_8_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 88, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt1}

Definition at line 2066 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_2_TOUT96_P11_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT96_P11_3_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1}

Definition at line 2067 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_2N_TOUT124_P11_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_2N_TOUT124_P11_8_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 124, {&MODULE_P11, 8}, IfxPort_OutputIdx_alt1}

Definition at line 2052 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_2N_TOUT255_P13_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_2N_TOUT255_P13_6_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 255, {&MODULE_P13, 6}, IfxPort_OutputIdx_alt1}

Definition at line 2053 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_2N_TOUT46_P23_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_2N_TOUT46_P23_5_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 46, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt1}

Definition at line 2054 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_2N_TOUT58_P21_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_2N_TOUT58_P21_7_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_f, 58, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt1}

Definition at line 2055 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_2N_TOUT78_P15_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_2N_TOUT78_P15_7_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1}

Definition at line 2056 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_2N_TOUT93_P13_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_2N_TOUT93_P13_2_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_f, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1}

Definition at line 2057 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_2N_TOUT99_P11_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_2N_TOUT99_P11_10_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1}

Definition at line 2058 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_3_TOUT122_P11_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT122_P11_5_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 122, {&MODULE_P11, 5}, IfxPort_OutputIdx_alt1}

Definition at line 2075 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_3_TOUT126_P11_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT126_P11_14_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 126, {&MODULE_P11,14}, IfxPort_OutputIdx_alt1}

Definition at line 2076 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_3_TOUT253_P13_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT253_P13_4_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 253, {&MODULE_P13, 4}, IfxPort_OutputIdx_alt1}

Definition at line 2077 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_3_TOUT49_P22_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT49_P22_2_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 49, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt1}

Definition at line 2078 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_3_TOUT56_P21_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT56_P21_5_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1}

Definition at line 2079 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_3_TOUT60_P20_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT60_P20_1_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 60, {&MODULE_P20, 1}, IfxPort_OutputIdx_alt1}

Definition at line 2080 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_3_TOUT62_P20_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT62_P20_6_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 62, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt1}

Definition at line 2081 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_3_TOUT89_P14_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT89_P14_9_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 89, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt1}

Definition at line 2082 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_3_TOUT97_P11_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT97_P11_6_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1}

Definition at line 2083 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_3N_TOUT100_P11_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_3N_TOUT100_P11_11_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1}

Definition at line 2068 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_3N_TOUT106_P10_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_3N_TOUT106_P10_4_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_g, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1}

Definition at line 2069 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_3N_TOUT122_P11_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_3N_TOUT122_P11_5_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_f, 122, {&MODULE_P11, 5}, IfxPort_OutputIdx_alt1}

Definition at line 2070 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_3N_TOUT256_P13_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_3N_TOUT256_P13_7_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 256, {&MODULE_P13, 7}, IfxPort_OutputIdx_alt1}

Definition at line 2071 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_3N_TOUT45_P23_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_3N_TOUT45_P23_4_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 45, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt1}

Definition at line 2072 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_3N_TOUT59_P20_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_3N_TOUT59_P20_0_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_f, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1}

Definition at line 2073 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_3N_TOUT77_P15_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_3N_TOUT77_P15_6_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1}

Definition at line 2074 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_4_TOUT102_P10_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT102_P10_0_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 102, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt1}

Definition at line 2094 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_4_TOUT123_P11_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT123_P11_7_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 123, {&MODULE_P11, 7}, IfxPort_OutputIdx_alt1}

Definition at line 2095 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_4_TOUT133_P22_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT133_P22_7_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_e, 133, {&MODULE_P22, 7}, IfxPort_OutputIdx_alt1}

Definition at line 2096 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_4_TOUT254_P13_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT254_P13_5_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 254, {&MODULE_P13, 5}, IfxPort_OutputIdx_alt1}

Definition at line 2097 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_4_TOUT50_P22_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT50_P22_3_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1}

Definition at line 2098 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_4_TOUT57_P21_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT57_P21_6_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1}

Definition at line 2099 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_4_TOUT61_P20_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT61_P20_3_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1}

Definition at line 2100 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_4_TOUT90_P14_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT90_P14_10_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1}

Definition at line 2101 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_4_TOUT98_P11_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT98_P11_9_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1}

Definition at line 2102 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_4N_TOUT106_P10_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT106_P10_4_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1}

Definition at line 2084 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_4N_TOUT120_P11_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT120_P11_1_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 120, {&MODULE_P11, 1}, IfxPort_OutputIdx_alt1}

Definition at line 2085 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_4N_TOUT122_P11_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT122_P11_5_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_e, 122, {&MODULE_P11, 5}, IfxPort_OutputIdx_alt1}

Definition at line 2086 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_4N_TOUT126_P11_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT126_P11_14_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 126, {&MODULE_P11,14}, IfxPort_OutputIdx_alt1}

Definition at line 2087 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_4N_TOUT137_P22_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT137_P22_11_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_e, 137, {&MODULE_P22,11}, IfxPort_OutputIdx_alt1}

Definition at line 2088 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_4N_TOUT253_P13_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT253_P13_4_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_e, 253, {&MODULE_P13, 4}, IfxPort_OutputIdx_alt1}

Definition at line 2089 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_4N_TOUT56_P21_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT56_P21_5_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1}

Definition at line 2090 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_4N_TOUT60_P20_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT60_P20_1_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 60, {&MODULE_P20, 1}, IfxPort_OutputIdx_alt1}

Definition at line 2091 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_4N_TOUT89_P14_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT89_P14_9_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 89, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt1}

Definition at line 2092 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_4N_TOUT97_P11_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT97_P11_6_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_e, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1}

Definition at line 2093 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_5_TOUT103_P10_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_5_TOUT103_P10_1_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 103, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt1}

Definition at line 2110 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_5_TOUT124_P11_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_5_TOUT124_P11_8_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 124, {&MODULE_P11, 8}, IfxPort_OutputIdx_alt1}

Definition at line 2111 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_5_TOUT132_P22_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_5_TOUT132_P22_6_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_e, 132, {&MODULE_P22, 6}, IfxPort_OutputIdx_alt1}

Definition at line 2112 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_5_TOUT255_P13_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_5_TOUT255_P13_6_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 255, {&MODULE_P13, 6}, IfxPort_OutputIdx_alt1}

Definition at line 2113 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_5_TOUT58_P21_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_5_TOUT58_P21_7_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 58, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt1}

Definition at line 2114 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_5_TOUT91_P13_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_5_TOUT91_P13_0_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1}

Definition at line 2115 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_5_TOUT99_P11_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_5_TOUT99_P11_10_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1}

Definition at line 2116 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_5N_TOUT107_P10_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_5N_TOUT107_P10_5_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1}

Definition at line 2103 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_5N_TOUT119_P11_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_5N_TOUT119_P11_0_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_e, 119, {&MODULE_P11, 0}, IfxPort_OutputIdx_alt1}

Definition at line 2104 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_5N_TOUT136_P22_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_5N_TOUT136_P22_10_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_e, 136, {&MODULE_P22,10}, IfxPort_OutputIdx_alt1}

Definition at line 2105 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_5N_TOUT250_P13_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_5N_TOUT250_P13_11_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_e, 250, {&MODULE_P13,11}, IfxPort_OutputIdx_alt1}

Definition at line 2106 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_5N_TOUT53_P21_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_5N_TOUT53_P21_2_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1}

Definition at line 2107 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_5N_TOUT87_P14_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_5N_TOUT87_P14_7_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1}

Definition at line 2108 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_5N_TOUT94_P13_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_5N_TOUT94_P13_3_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1}

Definition at line 2109 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_6_TOUT100_P11_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT100_P11_11_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1}

Definition at line 2125 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_6_TOUT104_P10_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT104_P10_2_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 104, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt1}

Definition at line 2126 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_6_TOUT106_P10_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT106_P10_4_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1}

Definition at line 2127 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_6_TOUT125_P11_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT125_P11_13_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 125, {&MODULE_P11,13}, IfxPort_OutputIdx_alt1}

Definition at line 2128 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_6_TOUT131_P22_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT131_P22_5_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_e, 131, {&MODULE_P22, 5}, IfxPort_OutputIdx_alt1}

Definition at line 2129 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_6_TOUT256_P13_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT256_P13_7_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 256, {&MODULE_P13, 7}, IfxPort_OutputIdx_alt1}

Definition at line 2130 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_6_TOUT59_P20_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT59_P20_0_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1}

Definition at line 2131 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_6_TOUT92_P13_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT92_P13_1_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1}

Definition at line 2132 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_6N_TOUT108_P10_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT108_P10_6_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1}

Definition at line 2117 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_6N_TOUT120_P11_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT120_P11_1_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_e, 120, {&MODULE_P11, 1}, IfxPort_OutputIdx_alt1}

Definition at line 2118 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_6N_TOUT122_P11_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT122_P11_5_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_g, 122, {&MODULE_P11, 5}, IfxPort_OutputIdx_alt1}

Definition at line 2119 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_6N_TOUT135_P22_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT135_P22_9_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_e, 135, {&MODULE_P22, 9}, IfxPort_OutputIdx_alt1}

Definition at line 2120 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_6N_TOUT251_P13_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT251_P13_10_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_e, 251, {&MODULE_P13,10}, IfxPort_OutputIdx_alt1}

Definition at line 2121 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_6N_TOUT54_P21_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT54_P21_3_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1}

Definition at line 2122 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_6N_TOUT86_P14_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT86_P14_6_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1}

Definition at line 2123 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_6N_TOUT95_P11_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT95_P11_2_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_e, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1}

Definition at line 2124 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_7_TOUT101_P11_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_7_TOUT101_P11_12_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1}

Definition at line 2141 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_7_TOUT105_P10_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_7_TOUT105_P10_3_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 105, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt1}

Definition at line 2142 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_7_TOUT126_P11_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_7_TOUT126_P11_14_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 126, {&MODULE_P11,14}, IfxPort_OutputIdx_alt1}

Definition at line 2143 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_7_TOUT130_P22_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_7_TOUT130_P22_4_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 130, {&MODULE_P22, 4}, IfxPort_OutputIdx_alt1}

Definition at line 2144 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_7_TOUT264_P13_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_7_TOUT264_P13_15_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 264, {&MODULE_P13,15}, IfxPort_OutputIdx_alt1}

Definition at line 2145 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_7_TOUT64_P20_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_7_TOUT64_P20_8_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1}

Definition at line 2146 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_7_TOUT93_P13_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_7_TOUT93_P13_2_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1}

Definition at line 2147 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_7N_TOUT109_P10_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT109_P10_7_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1}

Definition at line 2133 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_7N_TOUT121_P11_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT121_P11_4_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_e, 121, {&MODULE_P11, 4}, IfxPort_OutputIdx_alt1}

Definition at line 2134 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_7N_TOUT134_P22_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT134_P22_8_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_e, 134, {&MODULE_P22, 8}, IfxPort_OutputIdx_alt1}

Definition at line 2135 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_7N_TOUT252_P13_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT252_P13_14_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_e, 252, {&MODULE_P13,14}, IfxPort_OutputIdx_alt1}

Definition at line 2136 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_7N_TOUT55_P21_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT55_P21_4_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1}

Definition at line 2137 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_7N_TOUT88_P14_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT88_P14_8_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 88, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt1}

Definition at line 2138 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_7N_TOUT96_P11_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT96_P11_3_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_e, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1}

Definition at line 2139 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_7N_TOUT98_P11_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT98_P11_9_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1}

Definition at line 2140 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_8_TOUT109_P10_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_8_TOUT109_P10_7_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_b, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1}

Definition at line 2148 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_8_TOUT127_P11_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_8_TOUT127_P11_15_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 127, {&MODULE_P11,15}, IfxPort_OutputIdx_alt1}

Definition at line 2149 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_8_TOUT131_P22_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_8_TOUT131_P22_5_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 131, {&MODULE_P22, 5}, IfxPort_OutputIdx_alt1}

Definition at line 2150 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_8_TOUT258_P14_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_8_TOUT258_P14_11_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 258, {&MODULE_P14,11}, IfxPort_OutputIdx_alt1}

Definition at line 2151 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_8_TOUT51_P21_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_8_TOUT51_P21_0_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_b, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1}

Definition at line 2152 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_8_TOUT68_P20_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_8_TOUT68_P20_12_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_b, 68, {&MODULE_P20,12}, IfxPort_OutputIdx_alt1}

Definition at line 2153 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_9_TOUT103_P10_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_9_TOUT103_P10_1_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_b, 103, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt1}

Definition at line 2154 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_9_TOUT132_P22_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_9_TOUT132_P22_6_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 132, {&MODULE_P22, 6}, IfxPort_OutputIdx_alt1}

Definition at line 2155 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_9_TOUT259_P14_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_9_TOUT259_P14_14_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 259, {&MODULE_P14,14}, IfxPort_OutputIdx_alt1}

Definition at line 2156 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_9_TOUT52_P21_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_9_TOUT52_P21_1_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_b, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1}

Definition at line 2157 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM2_9_TOUT69_P20_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_9_TOUT69_P20_13_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_b, 69, {&MODULE_P20,13}, IfxPort_OutputIdx_alt1}

Definition at line 2158 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_0_TOUT110_P10_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_0_TOUT110_P10_8_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 110, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt1}

Definition at line 2164 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_0_TOUT115_P01_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_0_TOUT115_P01_7_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_f, 115, {&MODULE_P01, 7}, IfxPort_OutputIdx_alt1}

Definition at line 2165 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_0_TOUT130_P22_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_0_TOUT130_P22_4_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_f, 130, {&MODULE_P22, 4}, IfxPort_OutputIdx_alt1}

Definition at line 2166 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_0_TOUT155_P01_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_0_TOUT155_P01_0_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 155, {&MODULE_P01, 0}, IfxPort_OutputIdx_alt1}

Definition at line 2167 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_0_TOUT162_P01_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_0_TOUT162_P01_8_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 162, {&MODULE_P01, 8}, IfxPort_OutputIdx_alt1}

Definition at line 2168 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_0_TOUT174_P31_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_0_TOUT174_P31_0_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 174, {&MODULE_P31, 0}, IfxPort_OutputIdx_alt1}

Definition at line 2169 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_0_TOUT206_P25_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_0_TOUT206_P25_0_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 206, {&MODULE_P25, 0}, IfxPort_OutputIdx_alt1}

Definition at line 2170 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_0N_TOUT134_P22_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_0N_TOUT134_P22_8_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_g, 134, {&MODULE_P22, 8}, IfxPort_OutputIdx_alt1}

Definition at line 2159 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_0N_TOUT161_P01_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_0N_TOUT161_P01_13_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 161, {&MODULE_P01,13}, IfxPort_OutputIdx_alt1}

Definition at line 2160 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_0N_TOUT181_P31_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_0N_TOUT181_P31_7_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 181, {&MODULE_P31, 7}, IfxPort_OutputIdx_alt1}

Definition at line 2161 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_0N_TOUT213_P25_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_0N_TOUT213_P25_7_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 213, {&MODULE_P25, 7}, IfxPort_OutputIdx_alt1}

Definition at line 2162 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_0N_TOUT8_P02_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_0N_TOUT8_P02_8_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_f, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1}

Definition at line 2163 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_10_TOUT164_P01_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_10_TOUT164_P01_14_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 164, {&MODULE_P01,14}, IfxPort_OutputIdx_alt1}

Definition at line 2171 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_10_TOUT184_P31_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_10_TOUT184_P31_10_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 184, {&MODULE_P31,10}, IfxPort_OutputIdx_alt1}

Definition at line 2172 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_10_TOUT188_P31_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_10_TOUT188_P31_14_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_e, 188, {&MODULE_P31,14}, IfxPort_OutputIdx_alt1}

Definition at line 2173 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_10_TOUT216_P25_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_10_TOUT216_P25_10_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 216, {&MODULE_P25,10}, IfxPort_OutputIdx_alt1}

Definition at line 2174 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_10_TOUT220_P25_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_10_TOUT220_P25_14_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_e, 220, {&MODULE_P25,14}, IfxPort_OutputIdx_alt1}

Definition at line 2175 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_10_TOUT266_P10_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_10_TOUT266_P10_10_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 266, {&MODULE_P10,10}, IfxPort_OutputIdx_alt1}

Definition at line 2176 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_11_TOUT166_P00_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_11_TOUT166_P00_14_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 166, {&MODULE_P00,14}, IfxPort_OutputIdx_alt1}

Definition at line 2177 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_11_TOUT185_P31_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_11_TOUT185_P31_11_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 185, {&MODULE_P31,11}, IfxPort_OutputIdx_alt1}

Definition at line 2178 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_11_TOUT189_P31_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_11_TOUT189_P31_15_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_e, 189, {&MODULE_P31,15}, IfxPort_OutputIdx_alt1}

Definition at line 2179 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_11_TOUT217_P25_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_11_TOUT217_P25_11_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 217, {&MODULE_P25,11}, IfxPort_OutputIdx_alt1}

Definition at line 2180 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_11_TOUT221_P25_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_11_TOUT221_P25_15_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_e, 221, {&MODULE_P25,15}, IfxPort_OutputIdx_alt1}

Definition at line 2181 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_11_TOUT267_P10_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_11_TOUT267_P10_14_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 267, {&MODULE_P10,14}, IfxPort_OutputIdx_alt1}

Definition at line 2182 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_12_TOUT167_P00_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_12_TOUT167_P00_13_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 167, {&MODULE_P00,13}, IfxPort_OutputIdx_alt1}

Definition at line 2183 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_12_TOUT186_P31_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_12_TOUT186_P31_12_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 186, {&MODULE_P31,12}, IfxPort_OutputIdx_alt1}

Definition at line 2184 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_12_TOUT218_P25_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_12_TOUT218_P25_12_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 218, {&MODULE_P25,12}, IfxPort_OutputIdx_alt1}

Definition at line 2185 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_12_TOUT268_P10_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_12_TOUT268_P10_13_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_b, 268, {&MODULE_P10,13}, IfxPort_OutputIdx_alt1}

Definition at line 2186 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_13_TOUT138_P23_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_13_TOUT138_P23_6_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 138, {&MODULE_P23, 6}, IfxPort_OutputIdx_alt1}

Definition at line 2187 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_13_TOUT168_P00_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_13_TOUT168_P00_15_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 168, {&MODULE_P00,15}, IfxPort_OutputIdx_alt1}

Definition at line 2188 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_13_TOUT187_P31_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_13_TOUT187_P31_13_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 187, {&MODULE_P31,13}, IfxPort_OutputIdx_alt1}

Definition at line 2189 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_13_TOUT219_P25_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_13_TOUT219_P25_13_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 219, {&MODULE_P25,13}, IfxPort_OutputIdx_alt1}

Definition at line 2190 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_13_TOUT269_P10_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_13_TOUT269_P10_11_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 269, {&MODULE_P10,11}, IfxPort_OutputIdx_alt1}

Definition at line 2191 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_14_TOUT139_P23_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_14_TOUT139_P23_7_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 139, {&MODULE_P23, 7}, IfxPort_OutputIdx_alt1}

Definition at line 2192 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_14_TOUT151_P02_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_14_TOUT151_P02_12_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 151, {&MODULE_P02,12}, IfxPort_OutputIdx_alt1}

Definition at line 2193 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_14_TOUT153_P02_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_14_TOUT153_P02_13_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 153, {&MODULE_P02,13}, IfxPort_OutputIdx_alt1}

Definition at line 2194 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_14_TOUT188_P31_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_14_TOUT188_P31_14_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 188, {&MODULE_P31,14}, IfxPort_OutputIdx_alt1}

Definition at line 2195 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_14_TOUT220_P25_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_14_TOUT220_P25_14_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 220, {&MODULE_P25,14}, IfxPort_OutputIdx_alt1}

Definition at line 2196 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_14_TOUT270_P10_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_14_TOUT270_P10_15_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 270, {&MODULE_P10,15}, IfxPort_OutputIdx_alt1}

Definition at line 2197 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_15_TOUT140_P32_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_15_TOUT140_P32_5_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_b, 140, {&MODULE_P32, 5}, IfxPort_OutputIdx_alt1}

Definition at line 2198 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_15_TOUT152_P02_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_15_TOUT152_P02_15_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 152, {&MODULE_P02,15}, IfxPort_OutputIdx_alt1}

Definition at line 2199 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_15_TOUT154_P02_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_15_TOUT154_P02_14_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 154, {&MODULE_P02,14}, IfxPort_OutputIdx_alt1}

Definition at line 2200 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_15_TOUT189_P31_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_15_TOUT189_P31_15_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 189, {&MODULE_P31,15}, IfxPort_OutputIdx_alt1}

Definition at line 2201 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_15_TOUT221_P25_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_15_TOUT221_P25_15_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 221, {&MODULE_P25,15}, IfxPort_OutputIdx_alt1}

Definition at line 2202 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_1_TOUT111_P01_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT111_P01_3_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 111, {&MODULE_P01, 3}, IfxPort_OutputIdx_alt1}

Definition at line 2210 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_1_TOUT114_P01_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT114_P01_6_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_f, 114, {&MODULE_P01, 6}, IfxPort_OutputIdx_alt1}

Definition at line 2211 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_1_TOUT131_P22_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT131_P22_5_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_f, 131, {&MODULE_P22, 5}, IfxPort_OutputIdx_alt1}

Definition at line 2212 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_1_TOUT156_P01_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT156_P01_2_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 156, {&MODULE_P01, 2}, IfxPort_OutputIdx_alt1}

Definition at line 2213 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_1_TOUT163_P01_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT163_P01_10_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 163, {&MODULE_P01,10}, IfxPort_OutputIdx_alt1}

Definition at line 2214 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_1_TOUT175_P31_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT175_P31_1_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 175, {&MODULE_P31, 1}, IfxPort_OutputIdx_alt1}

Definition at line 2215 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_1_TOUT207_P25_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT207_P25_1_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 207, {&MODULE_P25, 1}, IfxPort_OutputIdx_alt1}

Definition at line 2216 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_1_TOUT242_P15_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT242_P15_10_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 242, {&MODULE_P15,10}, IfxPort_OutputIdx_alt1}

Definition at line 2217 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_1_TOUT265_P10_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT265_P10_9_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 265, {&MODULE_P10, 9}, IfxPort_OutputIdx_alt1}

Definition at line 2218 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_1N_TOUT116_P02_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_1N_TOUT116_P02_9_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_f, 116, {&MODULE_P02, 9}, IfxPort_OutputIdx_alt1}

Definition at line 2203 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_1N_TOUT135_P22_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_1N_TOUT135_P22_9_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_g, 135, {&MODULE_P22, 9}, IfxPort_OutputIdx_alt1}

Definition at line 2204 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_1N_TOUT158_P01_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_1N_TOUT158_P01_12_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 158, {&MODULE_P01,12}, IfxPort_OutputIdx_alt1}

Definition at line 2205 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_1N_TOUT178_P31_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_1N_TOUT178_P31_4_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 178, {&MODULE_P31, 4}, IfxPort_OutputIdx_alt1}

Definition at line 2206 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_1N_TOUT210_P25_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_1N_TOUT210_P25_4_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 210, {&MODULE_P25, 4}, IfxPort_OutputIdx_alt1}

Definition at line 2207 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_1N_TOUT245_P15_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_1N_TOUT245_P15_13_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_f, 245, {&MODULE_P15,13}, IfxPort_OutputIdx_alt1}

Definition at line 2208 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_1N_TOUT268_P10_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_1N_TOUT268_P10_13_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 268, {&MODULE_P10,13}, IfxPort_OutputIdx_alt1}

Definition at line 2209 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_2_TOUT112_P01_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT112_P01_4_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 112, {&MODULE_P01, 4}, IfxPort_OutputIdx_alt1}

Definition at line 2226 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_2_TOUT132_P22_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT132_P22_6_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_f, 132, {&MODULE_P22, 6}, IfxPort_OutputIdx_alt1}

Definition at line 2227 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_2_TOUT157_P01_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT157_P01_15_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 157, {&MODULE_P01,15}, IfxPort_OutputIdx_alt1}

Definition at line 2228 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_2_TOUT164_P01_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT164_P01_14_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 164, {&MODULE_P01,14}, IfxPort_OutputIdx_alt1}

Definition at line 2229 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_2_TOUT176_P31_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT176_P31_2_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 176, {&MODULE_P31, 2}, IfxPort_OutputIdx_alt1}

Definition at line 2230 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_2_TOUT208_P25_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT208_P25_2_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 208, {&MODULE_P25, 2}, IfxPort_OutputIdx_alt1}

Definition at line 2231 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_2_TOUT243_P15_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT243_P15_11_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 243, {&MODULE_P15,11}, IfxPort_OutputIdx_alt1}

Definition at line 2232 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_2_TOUT266_P10_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT266_P10_10_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 266, {&MODULE_P10,10}, IfxPort_OutputIdx_alt1}

Definition at line 2233 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_2N_TOUT117_P02_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_2N_TOUT117_P02_10_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_f, 117, {&MODULE_P02,10}, IfxPort_OutputIdx_alt1}

Definition at line 2219 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_2N_TOUT136_P22_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_2N_TOUT136_P22_10_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_g, 136, {&MODULE_P22,10}, IfxPort_OutputIdx_alt1}

Definition at line 2220 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_2N_TOUT159_P01_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_2N_TOUT159_P01_1_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 159, {&MODULE_P01, 1}, IfxPort_OutputIdx_alt1}

Definition at line 2221 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_2N_TOUT179_P31_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_2N_TOUT179_P31_5_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 179, {&MODULE_P31, 5}, IfxPort_OutputIdx_alt1}

Definition at line 2222 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_2N_TOUT211_P25_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_2N_TOUT211_P25_5_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 211, {&MODULE_P25, 5}, IfxPort_OutputIdx_alt1}

Definition at line 2223 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_2N_TOUT246_P15_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_2N_TOUT246_P15_14_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_f, 246, {&MODULE_P15,14}, IfxPort_OutputIdx_alt1}

Definition at line 2224 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_2N_TOUT267_P10_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_2N_TOUT267_P10_14_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 267, {&MODULE_P10,14}, IfxPort_OutputIdx_alt1}

Definition at line 2225 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_3_TOUT113_P01_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_3_TOUT113_P01_5_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 113, {&MODULE_P01, 5}, IfxPort_OutputIdx_alt1}

Definition at line 2242 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_3_TOUT133_P22_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_3_TOUT133_P22_7_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_f, 133, {&MODULE_P22, 7}, IfxPort_OutputIdx_alt1}

Definition at line 2243 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_3_TOUT165_P01_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_3_TOUT165_P01_11_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 165, {&MODULE_P01,11}, IfxPort_OutputIdx_alt1}

Definition at line 2244 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_3_TOUT177_P31_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_3_TOUT177_P31_3_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 177, {&MODULE_P31, 3}, IfxPort_OutputIdx_alt1}

Definition at line 2245 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_3_TOUT209_P25_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_3_TOUT209_P25_3_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 209, {&MODULE_P25, 3}, IfxPort_OutputIdx_alt1}

Definition at line 2246 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_3_TOUT244_P15_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_3_TOUT244_P15_12_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 244, {&MODULE_P15,12}, IfxPort_OutputIdx_alt1}

Definition at line 2247 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_3_TOUT269_P10_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_3_TOUT269_P10_11_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 269, {&MODULE_P10,11}, IfxPort_OutputIdx_alt1}

Definition at line 2248 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_3N_TOUT118_P02_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT118_P02_11_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_f, 118, {&MODULE_P02,11}, IfxPort_OutputIdx_alt1}

Definition at line 2234 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_3N_TOUT137_P22_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT137_P22_11_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_g, 137, {&MODULE_P22,11}, IfxPort_OutputIdx_alt1}

Definition at line 2235 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_3N_TOUT160_P01_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT160_P01_9_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 160, {&MODULE_P01, 9}, IfxPort_OutputIdx_alt1}

Definition at line 2236 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_3N_TOUT180_P31_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT180_P31_6_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 180, {&MODULE_P31, 6}, IfxPort_OutputIdx_alt1}

Definition at line 2237 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_3N_TOUT212_P25_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT212_P25_6_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 212, {&MODULE_P25, 6}, IfxPort_OutputIdx_alt1}

Definition at line 2238 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_3N_TOUT212_P26_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT212_P26_0_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 212, {&MODULE_P26, 0}, IfxPort_OutputIdx_alt1}

Definition at line 2239 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_3N_TOUT247_P15_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT247_P15_15_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_f, 247, {&MODULE_P15,15}, IfxPort_OutputIdx_alt1}

Definition at line 2240 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_3N_TOUT270_P10_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT270_P10_15_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 270, {&MODULE_P10,15}, IfxPort_OutputIdx_alt1}

Definition at line 2241 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_4_TOUT110_P10_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT110_P10_8_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 110, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt1}

Definition at line 2254 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_4_TOUT111_P01_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT111_P01_3_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 111, {&MODULE_P01, 3}, IfxPort_OutputIdx_alt1}

Definition at line 2255 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_4_TOUT114_P01_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT114_P01_6_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 114, {&MODULE_P01, 6}, IfxPort_OutputIdx_alt1}

Definition at line 2256 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_4_TOUT134_P22_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT134_P22_8_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 134, {&MODULE_P22, 8}, IfxPort_OutputIdx_alt1}

Definition at line 2257 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_4_TOUT158_P01_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT158_P01_12_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 158, {&MODULE_P01,12}, IfxPort_OutputIdx_alt1}

Definition at line 2258 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_4_TOUT178_P31_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT178_P31_4_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 178, {&MODULE_P31, 4}, IfxPort_OutputIdx_alt1}

Definition at line 2259 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_4_TOUT210_P25_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT210_P25_4_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 210, {&MODULE_P25, 4}, IfxPort_OutputIdx_alt1}

Definition at line 2260 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_4_TOUT245_P15_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT245_P15_13_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 245, {&MODULE_P15,13}, IfxPort_OutputIdx_alt1}

Definition at line 2261 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_4N_TOUT151_P02_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_4N_TOUT151_P02_12_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 151, {&MODULE_P02,12}, IfxPort_OutputIdx_alt1}

Definition at line 2249 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_4N_TOUT165_P01_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_4N_TOUT165_P01_11_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_e, 165, {&MODULE_P01,11}, IfxPort_OutputIdx_alt1}

Definition at line 2250 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_4N_TOUT177_P31_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_4N_TOUT177_P31_3_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_e, 177, {&MODULE_P31, 3}, IfxPort_OutputIdx_alt1}

Definition at line 2251 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_4N_TOUT209_P25_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_4N_TOUT209_P25_3_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_e, 209, {&MODULE_P25, 3}, IfxPort_OutputIdx_alt1}

Definition at line 2252 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_4N_TOUT244_P15_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_4N_TOUT244_P15_12_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 244, {&MODULE_P15,12}, IfxPort_OutputIdx_alt1}

Definition at line 2253 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_5_TOUT115_P01_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_5_TOUT115_P01_7_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 115, {&MODULE_P01, 7}, IfxPort_OutputIdx_alt1}

Definition at line 2268 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_5_TOUT135_P22_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_5_TOUT135_P22_9_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 135, {&MODULE_P22, 9}, IfxPort_OutputIdx_alt1}

Definition at line 2269 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_5_TOUT159_P01_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_5_TOUT159_P01_1_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 159, {&MODULE_P01, 1}, IfxPort_OutputIdx_alt1}

Definition at line 2270 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_5_TOUT179_P31_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_5_TOUT179_P31_5_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 179, {&MODULE_P31, 5}, IfxPort_OutputIdx_alt1}

Definition at line 2271 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_5_TOUT211_P25_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_5_TOUT211_P25_5_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 211, {&MODULE_P25, 5}, IfxPort_OutputIdx_alt1}

Definition at line 2272 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_5_TOUT246_P15_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_5_TOUT246_P15_14_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 246, {&MODULE_P15,14}, IfxPort_OutputIdx_alt1}

Definition at line 2273 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_5_TOUT265_P10_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_5_TOUT265_P10_9_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 265, {&MODULE_P10, 9}, IfxPort_OutputIdx_alt1}

Definition at line 2274 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_5N_TOUT153_P02_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_5N_TOUT153_P02_13_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 153, {&MODULE_P02,13}, IfxPort_OutputIdx_alt1}

Definition at line 2262 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_5N_TOUT155_P01_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_5N_TOUT155_P01_0_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_e, 155, {&MODULE_P01, 0}, IfxPort_OutputIdx_alt1}

Definition at line 2263 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_5N_TOUT166_P00_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_5N_TOUT166_P00_14_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 166, {&MODULE_P00,14}, IfxPort_OutputIdx_alt1}

Definition at line 2264 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_5N_TOUT174_P31_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_5N_TOUT174_P31_0_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_e, 174, {&MODULE_P31, 0}, IfxPort_OutputIdx_alt1}

Definition at line 2265 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_5N_TOUT206_P25_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_5N_TOUT206_P25_0_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_e, 206, {&MODULE_P25, 0}, IfxPort_OutputIdx_alt1}

Definition at line 2266 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_5N_TOUT268_P10_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_5N_TOUT268_P10_13_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 268, {&MODULE_P10,13}, IfxPort_OutputIdx_alt1}

Definition at line 2267 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_6_TOUT136_P22_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_6_TOUT136_P22_10_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 136, {&MODULE_P22,10}, IfxPort_OutputIdx_alt1}

Definition at line 2281 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_6_TOUT160_P01_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_6_TOUT160_P01_9_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 160, {&MODULE_P01, 9}, IfxPort_OutputIdx_alt1}

Definition at line 2282 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_6_TOUT180_P31_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_6_TOUT180_P31_6_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 180, {&MODULE_P31, 6}, IfxPort_OutputIdx_alt1}

Definition at line 2283 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_6_TOUT212_P25_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_6_TOUT212_P25_6_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 212, {&MODULE_P25, 6}, IfxPort_OutputIdx_alt1}

Definition at line 2284 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_6_TOUT212_P26_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_6_TOUT212_P26_0_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 212, {&MODULE_P26, 0}, IfxPort_OutputIdx_alt1}

Definition at line 2285 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_6_TOUT247_P15_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_6_TOUT247_P15_15_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 247, {&MODULE_P15,15}, IfxPort_OutputIdx_alt1}

Definition at line 2286 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_6_TOUT266_P10_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_6_TOUT266_P10_10_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 266, {&MODULE_P10,10}, IfxPort_OutputIdx_alt1}

Definition at line 2287 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_6N_TOUT154_P02_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_6N_TOUT154_P02_14_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 154, {&MODULE_P02,14}, IfxPort_OutputIdx_alt1}

Definition at line 2275 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_6N_TOUT156_P01_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_6N_TOUT156_P01_2_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_e, 156, {&MODULE_P01, 2}, IfxPort_OutputIdx_alt1}

Definition at line 2276 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_6N_TOUT175_P31_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_6N_TOUT175_P31_1_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_e, 175, {&MODULE_P31, 1}, IfxPort_OutputIdx_alt1}

Definition at line 2277 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_6N_TOUT207_P25_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_6N_TOUT207_P25_1_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_e, 207, {&MODULE_P25, 1}, IfxPort_OutputIdx_alt1}

Definition at line 2278 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_6N_TOUT242_P15_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_6N_TOUT242_P15_10_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 242, {&MODULE_P15,10}, IfxPort_OutputIdx_alt1}

Definition at line 2279 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_6N_TOUT267_P10_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_6N_TOUT267_P10_14_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 267, {&MODULE_P10,14}, IfxPort_OutputIdx_alt1}

Definition at line 2280 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_7_TOUT137_P22_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_7_TOUT137_P22_11_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 137, {&MODULE_P22,11}, IfxPort_OutputIdx_alt1}

Definition at line 2294 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_7_TOUT161_P01_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_7_TOUT161_P01_13_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 161, {&MODULE_P01,13}, IfxPort_OutputIdx_alt1}

Definition at line 2295 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_7_TOUT181_P31_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_7_TOUT181_P31_7_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 181, {&MODULE_P31, 7}, IfxPort_OutputIdx_alt1}

Definition at line 2296 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_7_TOUT213_P25_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_7_TOUT213_P25_7_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 213, {&MODULE_P25, 7}, IfxPort_OutputIdx_alt1}

Definition at line 2297 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_7_TOUT248_P13_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_7_TOUT248_P13_9_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 248, {&MODULE_P13, 9}, IfxPort_OutputIdx_alt1}

Definition at line 2298 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_7_TOUT269_P10_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_7_TOUT269_P10_11_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 269, {&MODULE_P10,11}, IfxPort_OutputIdx_alt1}

Definition at line 2299 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_7N_TOUT152_P02_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_7N_TOUT152_P02_15_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 152, {&MODULE_P02,15}, IfxPort_OutputIdx_alt1}

Definition at line 2288 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_7N_TOUT157_P01_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_7N_TOUT157_P01_15_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_e, 157, {&MODULE_P01,15}, IfxPort_OutputIdx_alt1}

Definition at line 2289 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_7N_TOUT176_P31_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_7N_TOUT176_P31_2_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_e, 176, {&MODULE_P31, 2}, IfxPort_OutputIdx_alt1}

Definition at line 2290 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_7N_TOUT208_P25_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_7N_TOUT208_P25_2_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_e, 208, {&MODULE_P25, 2}, IfxPort_OutputIdx_alt1}

Definition at line 2291 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_7N_TOUT243_P15_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_7N_TOUT243_P15_11_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 243, {&MODULE_P15,11}, IfxPort_OutputIdx_alt1}

Definition at line 2292 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_7N_TOUT270_P10_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_7N_TOUT270_P10_15_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 270, {&MODULE_P10,15}, IfxPort_OutputIdx_alt1}

Definition at line 2293 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_8_TOUT162_P01_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_8_TOUT162_P01_8_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 162, {&MODULE_P01, 8}, IfxPort_OutputIdx_alt1}

Definition at line 2300 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_8_TOUT182_P31_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_8_TOUT182_P31_8_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 182, {&MODULE_P31, 8}, IfxPort_OutputIdx_alt1}

Definition at line 2301 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_8_TOUT186_P31_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_8_TOUT186_P31_12_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_e, 186, {&MODULE_P31,12}, IfxPort_OutputIdx_alt1}

Definition at line 2302 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_8_TOUT214_P25_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_8_TOUT214_P25_8_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 214, {&MODULE_P25, 8}, IfxPort_OutputIdx_alt1}

Definition at line 2303 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_8_TOUT218_P25_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_8_TOUT218_P25_12_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_e, 218, {&MODULE_P25,12}, IfxPort_OutputIdx_alt1}

Definition at line 2304 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_8_TOUT249_P13_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_8_TOUT249_P13_12_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_b, 249, {&MODULE_P13,12}, IfxPort_OutputIdx_alt1}

Definition at line 2305 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_9_TOUT163_P01_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_9_TOUT163_P01_10_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 163, {&MODULE_P01,10}, IfxPort_OutputIdx_alt1}

Definition at line 2306 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_9_TOUT183_P31_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_9_TOUT183_P31_9_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 183, {&MODULE_P31, 9}, IfxPort_OutputIdx_alt1}

Definition at line 2307 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_9_TOUT187_P31_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_9_TOUT187_P31_13_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_e, 187, {&MODULE_P31,13}, IfxPort_OutputIdx_alt1}

Definition at line 2308 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_9_TOUT215_P25_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_9_TOUT215_P25_9_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 215, {&MODULE_P25, 9}, IfxPort_OutputIdx_alt1}

Definition at line 2309 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_9_TOUT219_P25_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_9_TOUT219_P25_13_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_e, 219, {&MODULE_P25,13}, IfxPort_OutputIdx_alt1}

Definition at line 2310 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM3_9_TOUT265_P10_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_9_TOUT265_P10_9_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_b, 265, {&MODULE_P10, 9}, IfxPort_OutputIdx_alt1}

Definition at line 2311 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_0_TOUT155_P01_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_0_TOUT155_P01_0_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 155, {&MODULE_P01, 0}, IfxPort_OutputIdx_alt1}

Definition at line 2312 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_0_TOUT162_P01_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_0_TOUT162_P01_8_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_f, 162, {&MODULE_P01, 8}, IfxPort_OutputIdx_alt1}

Definition at line 2313 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_0_TOUT190_P30_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_0_TOUT190_P30_0_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 190, {&MODULE_P30, 0}, IfxPort_OutputIdx_alt1}

Definition at line 2314 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_0_TOUT222_P24_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_0_TOUT222_P24_0_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 222, {&MODULE_P24, 0}, IfxPort_OutputIdx_alt1}

Definition at line 2315 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_0_TOUT250_P13_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_0_TOUT250_P13_11_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 250, {&MODULE_P13,11}, IfxPort_OutputIdx_alt1}

Definition at line 2316 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_10_TOUT164_P01_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_10_TOUT164_P01_14_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 164, {&MODULE_P01,14}, IfxPort_OutputIdx_alt1}

Definition at line 2317 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_10_TOUT200_P30_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_10_TOUT200_P30_10_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 200, {&MODULE_P30,10}, IfxPort_OutputIdx_alt1}

Definition at line 2318 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_10_TOUT204_P30_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_10_TOUT204_P30_14_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_e, 204, {&MODULE_P30,14}, IfxPort_OutputIdx_alt1}

Definition at line 2319 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_10_TOUT232_P24_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_10_TOUT232_P24_10_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 232, {&MODULE_P24,10}, IfxPort_OutputIdx_alt1}

Definition at line 2320 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_10_TOUT260_P14_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_10_TOUT260_P14_13_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 260, {&MODULE_P14,13}, IfxPort_OutputIdx_alt1}

Definition at line 2321 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_11_TOUT166_P00_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_11_TOUT166_P00_14_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 166, {&MODULE_P00,14}, IfxPort_OutputIdx_alt1}

Definition at line 2322 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_11_TOUT201_P30_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_11_TOUT201_P30_11_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 201, {&MODULE_P30,11}, IfxPort_OutputIdx_alt1}

Definition at line 2323 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_11_TOUT205_P30_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_11_TOUT205_P30_15_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_e, 205, {&MODULE_P30,15}, IfxPort_OutputIdx_alt1}

Definition at line 2324 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_11_TOUT233_P24_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_11_TOUT233_P24_11_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 233, {&MODULE_P24,11}, IfxPort_OutputIdx_alt1}

Definition at line 2325 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_11_TOUT261_P14_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_11_TOUT261_P14_12_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 261, {&MODULE_P14,12}, IfxPort_OutputIdx_alt1}

Definition at line 2326 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_12_TOUT167_P00_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_12_TOUT167_P00_13_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_b, 167, {&MODULE_P00,13}, IfxPort_OutputIdx_alt1}

Definition at line 2327 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_12_TOUT202_P30_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_12_TOUT202_P30_12_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 202, {&MODULE_P30,12}, IfxPort_OutputIdx_alt1}

Definition at line 2328 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_12_TOUT230_P24_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_12_TOUT230_P24_8_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_e, 230, {&MODULE_P24, 8}, IfxPort_OutputIdx_alt1}

Definition at line 2329 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_12_TOUT234_P24_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_12_TOUT234_P24_12_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 234, {&MODULE_P24,12}, IfxPort_OutputIdx_alt1}

Definition at line 2330 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_12_TOUT262_P13_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_12_TOUT262_P13_13_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_b, 262, {&MODULE_P13,13}, IfxPort_OutputIdx_alt1}

Definition at line 2331 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_13_TOUT168_P00_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_13_TOUT168_P00_15_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 168, {&MODULE_P00,15}, IfxPort_OutputIdx_alt1}

Definition at line 2332 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_13_TOUT203_P30_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_13_TOUT203_P30_13_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 203, {&MODULE_P30,13}, IfxPort_OutputIdx_alt1}

Definition at line 2333 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_13_TOUT231_P24_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_13_TOUT231_P24_9_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_e, 231, {&MODULE_P24, 9}, IfxPort_OutputIdx_alt1}

Definition at line 2334 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_13_TOUT235_P24_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_13_TOUT235_P24_13_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 235, {&MODULE_P24,13}, IfxPort_OutputIdx_alt1}

Definition at line 2335 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_13_TOUT263_P14_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_13_TOUT263_P14_15_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 263, {&MODULE_P14,15}, IfxPort_OutputIdx_alt1}

Definition at line 2336 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_14_TOUT151_P02_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_14_TOUT151_P02_12_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 151, {&MODULE_P02,12}, IfxPort_OutputIdx_alt1}

Definition at line 2337 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_14_TOUT153_P02_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_14_TOUT153_P02_13_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 153, {&MODULE_P02,13}, IfxPort_OutputIdx_alt1}

Definition at line 2338 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_14_TOUT204_P30_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_14_TOUT204_P30_14_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 204, {&MODULE_P30,14}, IfxPort_OutputIdx_alt1}

Definition at line 2339 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_14_TOUT232_P24_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_14_TOUT232_P24_10_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_e, 232, {&MODULE_P24,10}, IfxPort_OutputIdx_alt1}

Definition at line 2340 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_14_TOUT236_P24_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_14_TOUT236_P24_14_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 236, {&MODULE_P24,14}, IfxPort_OutputIdx_alt1}

Definition at line 2341 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_14_TOUT264_P13_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_14_TOUT264_P13_15_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 264, {&MODULE_P13,15}, IfxPort_OutputIdx_alt1}

Definition at line 2342 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_15_TOUT152_P02_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_15_TOUT152_P02_15_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_b, 152, {&MODULE_P02,15}, IfxPort_OutputIdx_alt1}

Definition at line 2343 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_15_TOUT154_P02_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_15_TOUT154_P02_14_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_b, 154, {&MODULE_P02,14}, IfxPort_OutputIdx_alt1}

Definition at line 2344 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_15_TOUT205_P30_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_15_TOUT205_P30_15_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 205, {&MODULE_P30,15}, IfxPort_OutputIdx_alt1}

Definition at line 2345 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_15_TOUT233_P24_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_15_TOUT233_P24_11_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_e, 233, {&MODULE_P24,11}, IfxPort_OutputIdx_alt1}

Definition at line 2346 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_15_TOUT237_P24_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_15_TOUT237_P24_15_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 237, {&MODULE_P24,15}, IfxPort_OutputIdx_alt1}

Definition at line 2347 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_1_TOUT156_P01_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_1_TOUT156_P01_2_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 156, {&MODULE_P01, 2}, IfxPort_OutputIdx_alt1}

Definition at line 2348 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_1_TOUT163_P01_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_1_TOUT163_P01_10_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_f, 163, {&MODULE_P01,10}, IfxPort_OutputIdx_alt1}

Definition at line 2349 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_1_TOUT191_P30_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_1_TOUT191_P30_1_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 191, {&MODULE_P30, 1}, IfxPort_OutputIdx_alt1}

Definition at line 2350 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_1_TOUT223_P24_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_1_TOUT223_P24_1_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 223, {&MODULE_P24, 1}, IfxPort_OutputIdx_alt1}

Definition at line 2351 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_1_TOUT251_P13_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_1_TOUT251_P13_10_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 251, {&MODULE_P13,10}, IfxPort_OutputIdx_alt1}

Definition at line 2352 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_2_TOUT157_P01_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_2_TOUT157_P01_15_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 157, {&MODULE_P01,15}, IfxPort_OutputIdx_alt1}

Definition at line 2353 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_2_TOUT164_P01_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_2_TOUT164_P01_14_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_f, 164, {&MODULE_P01,14}, IfxPort_OutputIdx_alt1}

Definition at line 2354 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_2_TOUT192_P30_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_2_TOUT192_P30_2_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 192, {&MODULE_P30, 2}, IfxPort_OutputIdx_alt1}

Definition at line 2355 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_2_TOUT224_P24_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_2_TOUT224_P24_2_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 224, {&MODULE_P24, 2}, IfxPort_OutputIdx_alt1}

Definition at line 2356 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_2_TOUT252_P13_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_2_TOUT252_P13_14_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 252, {&MODULE_P13,14}, IfxPort_OutputIdx_alt1}

Definition at line 2357 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_3_TOUT165_P01_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_3_TOUT165_P01_11_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 165, {&MODULE_P01,11}, IfxPort_OutputIdx_alt1}

Definition at line 2358 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_3_TOUT193_P30_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_3_TOUT193_P30_3_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 193, {&MODULE_P30, 3}, IfxPort_OutputIdx_alt1}

Definition at line 2359 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_3_TOUT225_P24_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_3_TOUT225_P24_3_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 225, {&MODULE_P24, 3}, IfxPort_OutputIdx_alt1}

Definition at line 2360 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_3_TOUT253_P13_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_3_TOUT253_P13_4_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 253, {&MODULE_P13, 4}, IfxPort_OutputIdx_alt1}

Definition at line 2361 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_4_TOUT111_P01_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_4_TOUT111_P01_3_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_e, 111, {&MODULE_P01, 3}, IfxPort_OutputIdx_alt1}

Definition at line 2362 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_4_TOUT158_P01_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_4_TOUT158_P01_12_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 158, {&MODULE_P01,12}, IfxPort_OutputIdx_alt1}

Definition at line 2363 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_4_TOUT194_P30_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_4_TOUT194_P30_4_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 194, {&MODULE_P30, 4}, IfxPort_OutputIdx_alt1}

Definition at line 2364 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_4_TOUT226_P24_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_4_TOUT226_P24_4_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 226, {&MODULE_P24, 4}, IfxPort_OutputIdx_alt1}

Definition at line 2365 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_4_TOUT254_P13_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_4_TOUT254_P13_5_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 254, {&MODULE_P13, 5}, IfxPort_OutputIdx_alt1}

Definition at line 2366 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_4_TOUT8_P02_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_4_TOUT8_P02_8_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_e, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1}

Definition at line 2367 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_5_TOUT116_P02_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_5_TOUT116_P02_9_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 116, {&MODULE_P02, 9}, IfxPort_OutputIdx_alt1}

Definition at line 2368 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_5_TOUT159_P01_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_5_TOUT159_P01_1_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 159, {&MODULE_P01, 1}, IfxPort_OutputIdx_alt1}

Definition at line 2369 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_5_TOUT195_P30_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_5_TOUT195_P30_5_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 195, {&MODULE_P30, 5}, IfxPort_OutputIdx_alt1}

Definition at line 2370 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_5_TOUT227_P24_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_5_TOUT227_P24_5_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 227, {&MODULE_P24, 5}, IfxPort_OutputIdx_alt1}

Definition at line 2371 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_5_TOUT255_P13_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_5_TOUT255_P13_6_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 255, {&MODULE_P13, 6}, IfxPort_OutputIdx_alt1}

Definition at line 2372 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_6_TOUT117_P02_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_6_TOUT117_P02_10_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 117, {&MODULE_P02,10}, IfxPort_OutputIdx_alt1}

Definition at line 2373 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_6_TOUT160_P01_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_6_TOUT160_P01_9_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 160, {&MODULE_P01, 9}, IfxPort_OutputIdx_alt1}

Definition at line 2374 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_6_TOUT196_P30_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_6_TOUT196_P30_6_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 196, {&MODULE_P30, 6}, IfxPort_OutputIdx_alt1}

Definition at line 2375 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_6_TOUT228_P24_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_6_TOUT228_P24_6_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 228, {&MODULE_P24, 6}, IfxPort_OutputIdx_alt1}

Definition at line 2376 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_6_TOUT256_P13_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_6_TOUT256_P13_7_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 256, {&MODULE_P13, 7}, IfxPort_OutputIdx_alt1}

Definition at line 2377 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_7_TOUT118_P02_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_7_TOUT118_P02_11_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 118, {&MODULE_P02,11}, IfxPort_OutputIdx_alt1}

Definition at line 2378 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_7_TOUT161_P01_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_7_TOUT161_P01_13_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 161, {&MODULE_P01,13}, IfxPort_OutputIdx_alt1}

Definition at line 2379 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_7_TOUT197_P30_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_7_TOUT197_P30_7_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 197, {&MODULE_P30, 7}, IfxPort_OutputIdx_alt1}

Definition at line 2380 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_7_TOUT229_P24_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_7_TOUT229_P24_7_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 229, {&MODULE_P24, 7}, IfxPort_OutputIdx_alt1}

Definition at line 2381 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_7_TOUT264_P13_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_7_TOUT264_P13_15_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_h, 264, {&MODULE_P13,15}, IfxPort_OutputIdx_alt1}

Definition at line 2382 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_8_TOUT162_P01_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_8_TOUT162_P01_8_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_b, 162, {&MODULE_P01, 8}, IfxPort_OutputIdx_alt1}

Definition at line 2383 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_8_TOUT198_P30_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_8_TOUT198_P30_8_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 198, {&MODULE_P30, 8}, IfxPort_OutputIdx_alt1}

Definition at line 2384 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_8_TOUT202_P30_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_8_TOUT202_P30_12_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_e, 202, {&MODULE_P30,12}, IfxPort_OutputIdx_alt1}

Definition at line 2385 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_8_TOUT230_P24_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_8_TOUT230_P24_8_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 230, {&MODULE_P24, 8}, IfxPort_OutputIdx_alt1}

Definition at line 2386 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_8_TOUT258_P14_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_8_TOUT258_P14_11_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_b, 258, {&MODULE_P14,11}, IfxPort_OutputIdx_alt1}

Definition at line 2387 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_9_TOUT163_P01_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_9_TOUT163_P01_10_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_b, 163, {&MODULE_P01,10}, IfxPort_OutputIdx_alt1}

Definition at line 2388 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_9_TOUT199_P30_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_9_TOUT199_P30_9_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 199, {&MODULE_P30, 9}, IfxPort_OutputIdx_alt1}

Definition at line 2389 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_9_TOUT203_P30_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_9_TOUT203_P30_13_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_e, 203, {&MODULE_P30,13}, IfxPort_OutputIdx_alt1}

Definition at line 2390 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_9_TOUT231_P24_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_9_TOUT231_P24_9_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 231, {&MODULE_P24, 9}, IfxPort_OutputIdx_alt1}

Definition at line 2391 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM4_9_TOUT259_P14_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_9_TOUT259_P14_14_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_b, 259, {&MODULE_P14,14}, IfxPort_OutputIdx_alt1}

Definition at line 2392 of file IfxGtm_PinMap.c.


iLLD_TC38A: IfxGtm_PinMap.h File Reference

  • _PinMap
Data Structures | Typedefs | Enumerations | Functions | Variables
IfxGtm_PinMap.h File Reference
iLLD » GTM

GTM I/O map. More...

#include <IfxGtm_reg.h>
#include <_Impl/IfxGtm_cfg.h>
#include <Port/Std/IfxPort.h>
#include <Gtm/Std/IfxGtm_Atom.h>
#include <Gtm/Std/IfxGtm_Tom.h>
#include <Gtm/Std/IfxGtm_Tim.h>
Include dependency graph for IfxGtm_PinMap.h:

Go to the source code of this file.

Data Structures

struct | IfxGtm_Tim_TinMap
TIN pin mapping structure. More...
struct | IfxGtm_Atom_ToutMap
ATOM TOUT pin mapping structure. More...
struct | IfxGtm_Tom_ToutMap
TOM TOUT pin mapping structure. More...
struct | IfxGtm_Clk_Out
GTM Clock Output. More...

Typedefs

typedef IfxGtm_Atom_ToutMap * | IfxGtm_Atom_ToutMapP
Pointer to IfxGtm_Atom_ToutMap. More...
typedef IfxGtm_Tom_ToutMap * | IfxGtm_Tom_ToutMapP
Pointer to IfxGtm_Tom_ToutMap. More...

Enumerations

enum IfxGtm_ChXSel {
IfxGtm_ChXSel_a,
IfxGtm_ChXSel_b,
IfxGtm_ChXSel_c,
IfxGtm_ChXSel_d,
IfxGtm_ChXSel_e,
IfxGtm_ChXSel_f,
IfxGtm_ChXSel_g,
IfxGtm_ChXSel_h,
IfxGtm_ChXSel_i,
IfxGtm_ChXSel_j,
IfxGtm_ChXSel_k,
IfxGtm_ChXSel_l,
IfxGtm_ChXSel_m,
IfxGtm_ChXSel_n,
IfxGtm_ChXSel_o,
IfxGtm_ChXSel_p
}
CHxSEL register control code. More...
enum IfxGtm_ToutSel {
IfxGtm_ToutSel_a,
IfxGtm_ToutSel_b,
IfxGtm_ToutSel_c,
IfxGtm_ToutSel_d,
IfxGtm_ToutSel_e,
IfxGtm_ToutSel_f,
IfxGtm_ToutSel_g,
IfxGtm_ToutSel_h,
IfxGtm_ToutSel_i,
IfxGtm_ToutSel_j,
IfxGtm_ToutSel_k,
IfxGtm_ToutSel_l
}
TOUTSEL register control code. More...

Functions

IFX_EXTERN void | IfxGtm_PinMap_setTimTin (IfxGtm_Tim_TinMap *config, IfxPort_InputMode inputMode)
IFX_EXTERN void | IfxGtm_PinMap_setAtomTout (IfxGtm_Atom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
IFX_EXTERN void | IfxGtm_PinMap_setTomTout (IfxGtm_Tom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)

Variables

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0N_TOUT112_P01_4_OUT
IfxGtm_ATOM0_0N_TOUT112_P01_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0N_TOUT17_P00_8_OUT
IfxGtm_ATOM0_0N_TOUT17_P00_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0N_TOUT43_P23_2_OUT
IfxGtm_ATOM0_0N_TOUT43_P23_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0N_TOUT54_P21_3_OUT
IfxGtm_ATOM0_0N_TOUT54_P21_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0N_TOUT7_P02_7_OUT
IfxGtm_ATOM0_0N_TOUT7_P02_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT0_P02_0_OUT
IfxGtm_ATOM0_0_TOUT0_P02_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT48_P22_1_OUT
IfxGtm_ATOM0_0_TOUT48_P22_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT53_P21_2_OUT
IfxGtm_ATOM0_0_TOUT53_P21_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT85_P14_5_OUT
IfxGtm_ATOM0_0_TOUT85_P14_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT8_P02_8_OUT
IfxGtm_ATOM0_0_TOUT8_P02_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT9_P00_0_OUT
IfxGtm_ATOM0_0_TOUT9_P00_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT113_P01_5_OUT
IfxGtm_ATOM0_1N_TOUT113_P01_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT14_P00_5_OUT
IfxGtm_ATOM0_1N_TOUT14_P00_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT39_P32_3_OUT
IfxGtm_ATOM0_1N_TOUT39_P32_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT41_P23_0_OUT
IfxGtm_ATOM0_1N_TOUT41_P23_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT4_P02_4_OUT
IfxGtm_ATOM0_1N_TOUT4_P02_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT50_P22_3_OUT
IfxGtm_ATOM0_1N_TOUT50_P22_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT53_P21_2_OUT
IfxGtm_ATOM0_1N_TOUT53_P21_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT55_P21_4_OUT
IfxGtm_ATOM0_1N_TOUT55_P21_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT57_P21_6_OUT
IfxGtm_ATOM0_1N_TOUT57_P21_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT61_P20_3_OUT
IfxGtm_ATOM0_1N_TOUT61_P20_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT10_P00_1_OUT
IfxGtm_ATOM0_1_TOUT10_P00_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT116_P02_9_OUT
IfxGtm_ATOM0_1_TOUT116_P02_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT11_P00_2_OUT
IfxGtm_ATOM0_1_TOUT11_P00_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT1_P02_1_OUT
IfxGtm_ATOM0_1_TOUT1_P02_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT31_P33_9_OUT
IfxGtm_ATOM0_1_TOUT31_P33_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT47_P22_0_OUT
IfxGtm_ATOM0_1_TOUT47_P22_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT54_P21_3_OUT
IfxGtm_ATOM0_1_TOUT54_P21_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT84_P14_4_OUT
IfxGtm_ATOM0_1_TOUT84_P14_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT114_P01_6_OUT
IfxGtm_ATOM0_2N_TOUT114_P01_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT15_P00_6_OUT
IfxGtm_ATOM0_2N_TOUT15_P00_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT23_P33_1_OUT
IfxGtm_ATOM0_2N_TOUT23_P33_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT40_P32_4_OUT
IfxGtm_ATOM0_2N_TOUT40_P32_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT41_P23_0_OUT
IfxGtm_ATOM0_2N_TOUT41_P23_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT44_P23_3_OUT
IfxGtm_ATOM0_2N_TOUT44_P23_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT56_P21_5_OUT
IfxGtm_ATOM0_2N_TOUT56_P21_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT58_P21_7_OUT
IfxGtm_ATOM0_2N_TOUT58_P21_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT5_P02_5_OUT
IfxGtm_ATOM0_2N_TOUT5_P02_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT65_P20_9_OUT
IfxGtm_ATOM0_2N_TOUT65_P20_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT117_P02_10_OUT
IfxGtm_ATOM0_2_TOUT117_P02_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT12_P00_3_OUT
IfxGtm_ATOM0_2_TOUT12_P00_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT2_P02_2_OUT
IfxGtm_ATOM0_2_TOUT2_P02_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT33_P33_11_OUT
IfxGtm_ATOM0_2_TOUT33_P33_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT42_P23_1_OUT
IfxGtm_ATOM0_2_TOUT42_P23_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT46_P23_5_OUT
IfxGtm_ATOM0_2_TOUT46_P23_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT55_P21_4_OUT
IfxGtm_ATOM0_2_TOUT55_P21_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT83_P14_3_OUT
IfxGtm_ATOM0_2_TOUT83_P14_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT115_P01_7_OUT
IfxGtm_ATOM0_3N_TOUT115_P01_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT16_P00_7_OUT
IfxGtm_ATOM0_3N_TOUT16_P00_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT24_P33_2_OUT
IfxGtm_ATOM0_3N_TOUT24_P33_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT42_P23_1_OUT
IfxGtm_ATOM0_3N_TOUT42_P23_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT45_P23_4_OUT
IfxGtm_ATOM0_3N_TOUT45_P23_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT59_P20_0_OUT
IfxGtm_ATOM0_3N_TOUT59_P20_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT66_P20_10_OUT
IfxGtm_ATOM0_3N_TOUT66_P20_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT6_P02_6_OUT
IfxGtm_ATOM0_3N_TOUT6_P02_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT118_P02_11_OUT
IfxGtm_ATOM0_3_TOUT118_P02_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT13_P00_4_OUT
IfxGtm_ATOM0_3_TOUT13_P00_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT38_P32_2_OUT
IfxGtm_ATOM0_3_TOUT38_P32_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT3_P02_3_OUT
IfxGtm_ATOM0_3_TOUT3_P02_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT49_P22_2_OUT
IfxGtm_ATOM0_3_TOUT49_P22_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT56_P21_5_OUT
IfxGtm_ATOM0_3_TOUT56_P21_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT60_P20_1_OUT
IfxGtm_ATOM0_3_TOUT60_P20_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT82_P14_2_OUT
IfxGtm_ATOM0_3_TOUT82_P14_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4N_TOUT118_P02_11_OUT
IfxGtm_ATOM0_4N_TOUT118_P02_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4N_TOUT135_P22_9_OUT
IfxGtm_ATOM0_4N_TOUT135_P22_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4N_TOUT13_P00_4_OUT
IfxGtm_ATOM0_4N_TOUT13_P00_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4N_TOUT147_P34_2_OUT
IfxGtm_ATOM0_4N_TOUT147_P34_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4N_TOUT3_P02_3_OUT
IfxGtm_ATOM0_4N_TOUT3_P02_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT146_P34_1_OUT
IfxGtm_ATOM0_4_TOUT146_P34_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT14_P00_5_OUT
IfxGtm_ATOM0_4_TOUT14_P00_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT29_P33_7_OUT
IfxGtm_ATOM0_4_TOUT29_P33_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT39_P32_3_OUT
IfxGtm_ATOM0_4_TOUT39_P32_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT4_P02_4_OUT
IfxGtm_ATOM0_4_TOUT4_P02_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT50_P22_3_OUT
IfxGtm_ATOM0_4_TOUT50_P22_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT57_P21_6_OUT
IfxGtm_ATOM0_4_TOUT57_P21_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT61_P20_3_OUT
IfxGtm_ATOM0_4_TOUT61_P20_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT81_P14_1_OUT
IfxGtm_ATOM0_4_TOUT81_P14_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5N_TOUT0_P02_0_OUT
IfxGtm_ATOM0_5N_TOUT0_P02_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5N_TOUT136_P22_10_OUT
IfxGtm_ATOM0_5N_TOUT136_P22_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5N_TOUT148_P34_3_OUT
IfxGtm_ATOM0_5N_TOUT148_P34_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5N_TOUT26_P33_4_OUT
IfxGtm_ATOM0_5N_TOUT26_P33_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5N_TOUT8_P02_8_OUT
IfxGtm_ATOM0_5N_TOUT8_P02_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5N_TOUT9_P00_0_OUT
IfxGtm_ATOM0_5N_TOUT9_P00_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT15_P00_6_OUT
IfxGtm_ATOM0_5_TOUT15_P00_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT23_P33_1_OUT
IfxGtm_ATOM0_5_TOUT23_P33_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT40_P32_4_OUT
IfxGtm_ATOM0_5_TOUT40_P32_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT41_P23_0_OUT
IfxGtm_ATOM0_5_TOUT41_P23_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT58_P21_7_OUT
IfxGtm_ATOM0_5_TOUT58_P21_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT5_P02_5_OUT
IfxGtm_ATOM0_5_TOUT5_P02_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6N_TOUT10_P00_1_OUT
IfxGtm_ATOM0_6N_TOUT10_P00_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6N_TOUT116_P02_9_OUT
IfxGtm_ATOM0_6N_TOUT116_P02_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6N_TOUT11_P00_2_OUT
IfxGtm_ATOM0_6N_TOUT11_P00_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6N_TOUT137_P22_11_OUT
IfxGtm_ATOM0_6N_TOUT137_P22_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6N_TOUT149_P34_4_OUT
IfxGtm_ATOM0_6N_TOUT149_P34_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6N_TOUT1_P02_1_OUT
IfxGtm_ATOM0_6N_TOUT1_P02_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6N_TOUT27_P33_5_OUT
IfxGtm_ATOM0_6N_TOUT27_P33_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT106_P10_4_OUT
IfxGtm_ATOM0_6_TOUT106_P10_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT16_P00_7_OUT
IfxGtm_ATOM0_6_TOUT16_P00_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT24_P33_2_OUT
IfxGtm_ATOM0_6_TOUT24_P33_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT42_P23_1_OUT
IfxGtm_ATOM0_6_TOUT42_P23_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT59_P20_0_OUT
IfxGtm_ATOM0_6_TOUT59_P20_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT6_P02_6_OUT
IfxGtm_ATOM0_6_TOUT6_P02_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7N_TOUT117_P02_10_OUT
IfxGtm_ATOM0_7N_TOUT117_P02_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7N_TOUT12_P00_3_OUT
IfxGtm_ATOM0_7N_TOUT12_P00_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7N_TOUT150_P34_5_OUT
IfxGtm_ATOM0_7N_TOUT150_P34_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7N_TOUT28_P33_6_OUT
IfxGtm_ATOM0_7N_TOUT28_P33_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7N_TOUT2_P02_2_OUT
IfxGtm_ATOM0_7N_TOUT2_P02_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT17_P00_8_OUT
IfxGtm_ATOM0_7_TOUT17_P00_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT25_P33_3_OUT
IfxGtm_ATOM0_7_TOUT25_P33_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT45_P23_4_OUT
IfxGtm_ATOM0_7_TOUT45_P23_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT64_P20_8_OUT
IfxGtm_ATOM0_7_TOUT64_P20_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT7_P02_7_OUT
IfxGtm_ATOM0_7_TOUT7_P02_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0N_TOUT112_P01_4_OUT
IfxGtm_ATOM1_0N_TOUT112_P01_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0N_TOUT17_P00_8_OUT
IfxGtm_ATOM1_0N_TOUT17_P00_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0N_TOUT7_P02_7_OUT
IfxGtm_ATOM1_0N_TOUT7_P02_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT0_P02_0_OUT
IfxGtm_ATOM1_0_TOUT0_P02_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT109_P10_7_OUT
IfxGtm_ATOM1_0_TOUT109_P10_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT68_P20_12_OUT
IfxGtm_ATOM1_0_TOUT68_P20_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT76_P15_5_OUT
IfxGtm_ATOM1_0_TOUT76_P15_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT77_P15_6_OUT
IfxGtm_ATOM1_0_TOUT77_P15_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT87_P14_7_OUT
IfxGtm_ATOM1_0_TOUT87_P14_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT8_P02_8_OUT
IfxGtm_ATOM1_0_TOUT8_P02_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT9_P00_0_OUT
IfxGtm_ATOM1_0_TOUT9_P00_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1N_TOUT102_P10_0_OUT
IfxGtm_ATOM1_1N_TOUT102_P10_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1N_TOUT113_P01_5_OUT
IfxGtm_ATOM1_1N_TOUT113_P01_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1N_TOUT14_P00_5_OUT
IfxGtm_ATOM1_1N_TOUT14_P00_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1N_TOUT39_P32_3_OUT
IfxGtm_ATOM1_1N_TOUT39_P32_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1N_TOUT4_P02_4_OUT
IfxGtm_ATOM1_1N_TOUT4_P02_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1N_TOUT61_P20_3_OUT
IfxGtm_ATOM1_1N_TOUT61_P20_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1N_TOUT72_P15_1_OUT
IfxGtm_ATOM1_1N_TOUT72_P15_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT103_P10_1_OUT
IfxGtm_ATOM1_1_TOUT103_P10_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT10_P00_1_OUT
IfxGtm_ATOM1_1_TOUT10_P00_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT116_P02_9_OUT
IfxGtm_ATOM1_1_TOUT116_P02_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT11_P00_2_OUT
IfxGtm_ATOM1_1_TOUT11_P00_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT1_P02_1_OUT
IfxGtm_ATOM1_1_TOUT1_P02_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT31_P33_9_OUT
IfxGtm_ATOM1_1_TOUT31_P33_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT69_P20_13_OUT
IfxGtm_ATOM1_1_TOUT69_P20_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT78_P15_7_OUT
IfxGtm_ATOM1_1_TOUT78_P15_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT79_P15_8_OUT
IfxGtm_ATOM1_1_TOUT79_P15_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT86_P14_6_OUT
IfxGtm_ATOM1_1_TOUT86_P14_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT110_P10_8_OUT
IfxGtm_ATOM1_2N_TOUT110_P10_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT114_P01_6_OUT
IfxGtm_ATOM1_2N_TOUT114_P01_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT15_P00_6_OUT
IfxGtm_ATOM1_2N_TOUT15_P00_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT23_P33_1_OUT
IfxGtm_ATOM1_2N_TOUT23_P33_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT40_P32_4_OUT
IfxGtm_ATOM1_2N_TOUT40_P32_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT41_P23_0_OUT
IfxGtm_ATOM1_2N_TOUT41_P23_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT5_P02_5_OUT
IfxGtm_ATOM1_2N_TOUT5_P02_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT73_P15_2_OUT
IfxGtm_ATOM1_2N_TOUT73_P15_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT104_P10_2_OUT
IfxGtm_ATOM1_2_TOUT104_P10_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT107_P10_5_OUT
IfxGtm_ATOM1_2_TOUT107_P10_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT117_P02_10_OUT
IfxGtm_ATOM1_2_TOUT117_P02_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT12_P00_3_OUT
IfxGtm_ATOM1_2_TOUT12_P00_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT2_P02_2_OUT
IfxGtm_ATOM1_2_TOUT2_P02_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT33_P33_11_OUT
IfxGtm_ATOM1_2_TOUT33_P33_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT70_P20_14_OUT
IfxGtm_ATOM1_2_TOUT70_P20_14_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT80_P14_0_OUT
IfxGtm_ATOM1_2_TOUT80_P14_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3N_TOUT106_P10_4_OUT
IfxGtm_ATOM1_3N_TOUT106_P10_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3N_TOUT115_P01_7_OUT
IfxGtm_ATOM1_3N_TOUT115_P01_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3N_TOUT16_P00_7_OUT
IfxGtm_ATOM1_3N_TOUT16_P00_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3N_TOUT24_P33_2_OUT
IfxGtm_ATOM1_3N_TOUT24_P33_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3N_TOUT42_P23_1_OUT
IfxGtm_ATOM1_3N_TOUT42_P23_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3N_TOUT6_P02_6_OUT
IfxGtm_ATOM1_3N_TOUT6_P02_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3N_TOUT74_P15_3_OUT
IfxGtm_ATOM1_3N_TOUT74_P15_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT105_P10_3_OUT
IfxGtm_ATOM1_3_TOUT105_P10_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT108_P10_6_OUT
IfxGtm_ATOM1_3_TOUT108_P10_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT118_P02_11_OUT
IfxGtm_ATOM1_3_TOUT118_P02_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT13_P00_4_OUT
IfxGtm_ATOM1_3_TOUT13_P00_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT38_P32_2_OUT
IfxGtm_ATOM1_3_TOUT38_P32_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT3_P02_3_OUT
IfxGtm_ATOM1_3_TOUT3_P02_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT60_P20_1_OUT
IfxGtm_ATOM1_3_TOUT60_P20_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT71_P15_0_OUT
IfxGtm_ATOM1_3_TOUT71_P15_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT105_P10_3_OUT
IfxGtm_ATOM1_4N_TOUT105_P10_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT108_P10_6_OUT
IfxGtm_ATOM1_4N_TOUT108_P10_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT118_P02_11_OUT
IfxGtm_ATOM1_4N_TOUT118_P02_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT131_P22_5_OUT
IfxGtm_ATOM1_4N_TOUT131_P22_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT13_P00_4_OUT
IfxGtm_ATOM1_4N_TOUT13_P00_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT147_P34_2_OUT
IfxGtm_ATOM1_4N_TOUT147_P34_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT3_P02_3_OUT
IfxGtm_ATOM1_4N_TOUT3_P02_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT71_P15_0_OUT
IfxGtm_ATOM1_4N_TOUT71_P15_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT75_P15_4_OUT
IfxGtm_ATOM1_4N_TOUT75_P15_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT102_P10_0_OUT
IfxGtm_ATOM1_4_TOUT102_P10_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT130_P22_4_OUT
IfxGtm_ATOM1_4_TOUT130_P22_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT146_P34_1_OUT
IfxGtm_ATOM1_4_TOUT146_P34_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT14_P00_5_OUT
IfxGtm_ATOM1_4_TOUT14_P00_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT29_P33_7_OUT
IfxGtm_ATOM1_4_TOUT29_P33_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT39_P32_3_OUT
IfxGtm_ATOM1_4_TOUT39_P32_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT4_P02_4_OUT
IfxGtm_ATOM1_4_TOUT4_P02_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT61_P20_3_OUT
IfxGtm_ATOM1_4_TOUT61_P20_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT72_P15_1_OUT
IfxGtm_ATOM1_4_TOUT72_P15_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT0_P02_0_OUT
IfxGtm_ATOM1_5N_TOUT0_P02_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT109_P10_7_OUT
IfxGtm_ATOM1_5N_TOUT109_P10_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT132_P22_6_OUT
IfxGtm_ATOM1_5N_TOUT132_P22_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT148_P34_3_OUT
IfxGtm_ATOM1_5N_TOUT148_P34_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT26_P33_4_OUT
IfxGtm_ATOM1_5N_TOUT26_P33_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT76_P15_5_OUT
IfxGtm_ATOM1_5N_TOUT76_P15_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT77_P15_6_OUT
IfxGtm_ATOM1_5N_TOUT77_P15_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT8_P02_8_OUT
IfxGtm_ATOM1_5N_TOUT8_P02_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT9_P00_0_OUT
IfxGtm_ATOM1_5N_TOUT9_P00_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT110_P10_8_OUT
IfxGtm_ATOM1_5_TOUT110_P10_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT15_P00_6_OUT
IfxGtm_ATOM1_5_TOUT15_P00_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT23_P33_1_OUT
IfxGtm_ATOM1_5_TOUT23_P33_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT40_P32_4_OUT
IfxGtm_ATOM1_5_TOUT40_P32_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT41_P23_0_OUT
IfxGtm_ATOM1_5_TOUT41_P23_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT5_P02_5_OUT
IfxGtm_ATOM1_5_TOUT5_P02_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT65_P20_9_OUT
IfxGtm_ATOM1_5_TOUT65_P20_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT73_P15_2_OUT
IfxGtm_ATOM1_5_TOUT73_P15_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT103_P10_1_OUT
IfxGtm_ATOM1_6N_TOUT103_P10_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT10_P00_1_OUT
IfxGtm_ATOM1_6N_TOUT10_P00_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT116_P02_9_OUT
IfxGtm_ATOM1_6N_TOUT116_P02_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT11_P00_2_OUT
IfxGtm_ATOM1_6N_TOUT11_P00_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT133_P22_7_OUT
IfxGtm_ATOM1_6N_TOUT133_P22_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT149_P34_4_OUT
IfxGtm_ATOM1_6N_TOUT149_P34_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT1_P02_1_OUT
IfxGtm_ATOM1_6N_TOUT1_P02_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT27_P33_5_OUT
IfxGtm_ATOM1_6N_TOUT27_P33_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT78_P15_7_OUT
IfxGtm_ATOM1_6N_TOUT78_P15_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT106_P10_4_OUT
IfxGtm_ATOM1_6_TOUT106_P10_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT16_P00_7_OUT
IfxGtm_ATOM1_6_TOUT16_P00_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT24_P33_2_OUT
IfxGtm_ATOM1_6_TOUT24_P33_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT42_P23_1_OUT
IfxGtm_ATOM1_6_TOUT42_P23_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT66_P20_10_OUT
IfxGtm_ATOM1_6_TOUT66_P20_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT6_P02_6_OUT
IfxGtm_ATOM1_6_TOUT6_P02_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT74_P15_3_OUT
IfxGtm_ATOM1_6_TOUT74_P15_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT104_P10_2_OUT
IfxGtm_ATOM1_7N_TOUT104_P10_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT107_P10_5_OUT
IfxGtm_ATOM1_7N_TOUT107_P10_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT117_P02_10_OUT
IfxGtm_ATOM1_7N_TOUT117_P02_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT12_P00_3_OUT
IfxGtm_ATOM1_7N_TOUT12_P00_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT134_P22_8_OUT
IfxGtm_ATOM1_7N_TOUT134_P22_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT150_P34_5_OUT
IfxGtm_ATOM1_7N_TOUT150_P34_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT28_P33_6_OUT
IfxGtm_ATOM1_7N_TOUT28_P33_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT2_P02_2_OUT
IfxGtm_ATOM1_7N_TOUT2_P02_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT79_P15_8_OUT
IfxGtm_ATOM1_7N_TOUT79_P15_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT17_P00_8_OUT
IfxGtm_ATOM1_7_TOUT17_P00_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT25_P33_3_OUT
IfxGtm_ATOM1_7_TOUT25_P33_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT45_P23_4_OUT
IfxGtm_ATOM1_7_TOUT45_P23_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT67_P20_11_OUT
IfxGtm_ATOM1_7_TOUT67_P20_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT75_P15_4_OUT
IfxGtm_ATOM1_7_TOUT75_P15_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT7_P02_7_OUT
IfxGtm_ATOM1_7_TOUT7_P02_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0N_TOUT101_P11_12_OUT
IfxGtm_ATOM2_0N_TOUT101_P11_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0N_TOUT108_P10_6_OUT
IfxGtm_ATOM2_0N_TOUT108_P10_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0N_TOUT12_P00_3_OUT
IfxGtm_ATOM2_0N_TOUT12_P00_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0N_TOUT144_P33_15_OUT
IfxGtm_ATOM2_0N_TOUT144_P33_15_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0N_TOUT25_P33_3_OUT
IfxGtm_ATOM2_0N_TOUT25_P33_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0N_TOUT32_P33_10_OUT
IfxGtm_ATOM2_0N_TOUT32_P33_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0N_TOUT37_P32_1_OUT
IfxGtm_ATOM2_0N_TOUT37_P32_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT109_P10_7_OUT
IfxGtm_ATOM2_0_TOUT109_P10_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT18_P00_9_OUT
IfxGtm_ATOM2_0_TOUT18_P00_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT26_P33_4_OUT
IfxGtm_ATOM2_0_TOUT26_P33_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT32_P33_10_OUT
IfxGtm_ATOM2_0_TOUT32_P33_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT94_P13_3_OUT
IfxGtm_ATOM2_0_TOUT94_P13_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT105_P10_3_OUT
IfxGtm_ATOM2_1N_TOUT105_P10_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT167_P00_13_OUT
IfxGtm_ATOM2_1N_TOUT167_P00_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT22_P33_0_OUT
IfxGtm_ATOM2_1N_TOUT22_P33_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT30_P33_8_OUT
IfxGtm_ATOM2_1N_TOUT30_P33_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT34_P33_12_OUT
IfxGtm_ATOM2_1N_TOUT34_P33_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT51_P21_0_OUT
IfxGtm_ATOM2_1N_TOUT51_P21_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT90_P14_10_OUT
IfxGtm_ATOM2_1N_TOUT90_P14_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT91_P13_0_OUT
IfxGtm_ATOM2_1N_TOUT91_P13_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT98_P11_9_OUT
IfxGtm_ATOM2_1N_TOUT98_P11_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT9_P00_0_OUT
IfxGtm_ATOM2_1N_TOUT9_P00_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT102_P10_0_OUT
IfxGtm_ATOM2_1_TOUT102_P10_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT19_P00_10_OUT
IfxGtm_ATOM2_1_TOUT19_P00_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT27_P33_5_OUT
IfxGtm_ATOM2_1_TOUT27_P33_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT43_P23_2_OUT
IfxGtm_ATOM2_1_TOUT43_P23_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT90_P14_10_OUT
IfxGtm_ATOM2_1_TOUT90_P14_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT95_P11_2_OUT
IfxGtm_ATOM2_1_TOUT95_P11_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT106_P10_4_OUT
IfxGtm_ATOM2_2N_TOUT106_P10_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT10_P00_1_OUT
IfxGtm_ATOM2_2N_TOUT10_P00_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT114_P01_6_OUT
IfxGtm_ATOM2_2N_TOUT114_P01_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT138_P23_6_OUT
IfxGtm_ATOM2_2N_TOUT138_P23_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT166_P00_14_OUT
IfxGtm_ATOM2_2N_TOUT166_P00_14_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT23_P33_1_OUT
IfxGtm_ATOM2_2N_TOUT23_P33_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT31_P33_9_OUT
IfxGtm_ATOM2_2N_TOUT31_P33_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT35_P33_13_OUT
IfxGtm_ATOM2_2N_TOUT35_P33_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT52_P21_1_OUT
IfxGtm_ATOM2_2N_TOUT52_P21_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT91_P13_0_OUT
IfxGtm_ATOM2_2N_TOUT91_P13_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT92_P13_1_OUT
IfxGtm_ATOM2_2N_TOUT92_P13_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT99_P11_10_OUT
IfxGtm_ATOM2_2N_TOUT99_P11_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT103_P10_1_OUT
IfxGtm_ATOM2_2_TOUT103_P10_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT20_P00_11_OUT
IfxGtm_ATOM2_2_TOUT20_P00_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT28_P33_6_OUT
IfxGtm_ATOM2_2_TOUT28_P33_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT44_P23_3_OUT
IfxGtm_ATOM2_2_TOUT44_P23_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT88_P14_8_OUT
IfxGtm_ATOM2_2_TOUT88_P14_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT96_P11_3_OUT
IfxGtm_ATOM2_2_TOUT96_P11_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT100_P11_11_OUT
IfxGtm_ATOM2_3N_TOUT100_P11_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT107_P10_5_OUT
IfxGtm_ATOM2_3N_TOUT107_P10_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT115_P01_7_OUT
IfxGtm_ATOM2_3N_TOUT115_P01_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT11_P00_2_OUT
IfxGtm_ATOM2_3N_TOUT11_P00_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT139_P23_7_OUT
IfxGtm_ATOM2_3N_TOUT139_P23_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT143_P33_14_OUT
IfxGtm_ATOM2_3N_TOUT143_P33_14_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT168_P00_15_OUT
IfxGtm_ATOM2_3N_TOUT168_P00_15_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT24_P33_2_OUT
IfxGtm_ATOM2_3N_TOUT24_P33_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT33_P33_11_OUT
IfxGtm_ATOM2_3N_TOUT33_P33_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT36_P32_0_OUT
IfxGtm_ATOM2_3N_TOUT36_P32_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT62_P20_6_OUT
IfxGtm_ATOM2_3N_TOUT62_P20_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT92_P13_1_OUT
IfxGtm_ATOM2_3N_TOUT92_P13_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT93_P13_2_OUT
IfxGtm_ATOM2_3N_TOUT93_P13_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT104_P10_2_OUT
IfxGtm_ATOM2_3_TOUT104_P10_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT21_P00_12_OUT
IfxGtm_ATOM2_3_TOUT21_P00_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT29_P33_7_OUT
IfxGtm_ATOM2_3_TOUT29_P33_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT89_P14_9_OUT
IfxGtm_ATOM2_3_TOUT89_P14_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT97_P11_6_OUT
IfxGtm_ATOM2_3_TOUT97_P11_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4N_TOUT29_P33_7_OUT
IfxGtm_ATOM2_4N_TOUT29_P33_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4N_TOUT57_P21_6_OUT
IfxGtm_ATOM2_4N_TOUT57_P21_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4N_TOUT86_P14_6_OUT
IfxGtm_ATOM2_4N_TOUT86_P14_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4N_TOUT97_P11_6_OUT
IfxGtm_ATOM2_4N_TOUT97_P11_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT167_P00_13_OUT
IfxGtm_ATOM2_4_TOUT167_P00_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT22_P33_0_OUT
IfxGtm_ATOM2_4_TOUT22_P33_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT30_P33_8_OUT
IfxGtm_ATOM2_4_TOUT30_P33_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT34_P33_12_OUT
IfxGtm_ATOM2_4_TOUT34_P33_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT51_P21_0_OUT
IfxGtm_ATOM2_4_TOUT51_P21_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT90_P14_10_OUT
IfxGtm_ATOM2_4_TOUT90_P14_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT98_P11_9_OUT
IfxGtm_ATOM2_4_TOUT98_P11_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5N_TOUT120_P11_1_OUT
IfxGtm_ATOM2_5N_TOUT120_P11_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5N_TOUT26_P33_4_OUT
IfxGtm_ATOM2_5N_TOUT26_P33_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5N_TOUT59_P20_0_OUT
IfxGtm_ATOM2_5N_TOUT59_P20_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5N_TOUT87_P14_7_OUT
IfxGtm_ATOM2_5N_TOUT87_P14_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5N_TOUT94_P13_3_OUT
IfxGtm_ATOM2_5N_TOUT94_P13_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT138_P23_6_OUT
IfxGtm_ATOM2_5_TOUT138_P23_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT166_P00_14_OUT
IfxGtm_ATOM2_5_TOUT166_P00_14_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT35_P33_13_OUT
IfxGtm_ATOM2_5_TOUT35_P33_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT52_P21_1_OUT
IfxGtm_ATOM2_5_TOUT52_P21_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT65_P20_9_OUT
IfxGtm_ATOM2_5_TOUT65_P20_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT91_P13_0_OUT
IfxGtm_ATOM2_5_TOUT91_P13_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT99_P11_10_OUT
IfxGtm_ATOM2_5_TOUT99_P11_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6N_TOUT27_P33_5_OUT
IfxGtm_ATOM2_6N_TOUT27_P33_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6N_TOUT60_P20_1_OUT
IfxGtm_ATOM2_6N_TOUT60_P20_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6N_TOUT88_P14_8_OUT
IfxGtm_ATOM2_6N_TOUT88_P14_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6N_TOUT95_P11_2_OUT
IfxGtm_ATOM2_6N_TOUT95_P11_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT100_P11_11_OUT
IfxGtm_ATOM2_6_TOUT100_P11_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT139_P23_7_OUT
IfxGtm_ATOM2_6_TOUT139_P23_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT143_P33_14_OUT
IfxGtm_ATOM2_6_TOUT143_P33_14_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT168_P00_15_OUT
IfxGtm_ATOM2_6_TOUT168_P00_15_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT36_P32_0_OUT
IfxGtm_ATOM2_6_TOUT36_P32_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT62_P20_6_OUT
IfxGtm_ATOM2_6_TOUT62_P20_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT92_P13_1_OUT
IfxGtm_ATOM2_6_TOUT92_P13_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7N_TOUT28_P33_6_OUT
IfxGtm_ATOM2_7N_TOUT28_P33_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7N_TOUT61_P20_3_OUT
IfxGtm_ATOM2_7N_TOUT61_P20_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7N_TOUT89_P14_9_OUT
IfxGtm_ATOM2_7N_TOUT89_P14_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7N_TOUT96_P11_3_OUT
IfxGtm_ATOM2_7N_TOUT96_P11_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT101_P11_12_OUT
IfxGtm_ATOM2_7_TOUT101_P11_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT140_P32_5_OUT
IfxGtm_ATOM2_7_TOUT140_P32_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT144_P33_15_OUT
IfxGtm_ATOM2_7_TOUT144_P33_15_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT37_P32_1_OUT
IfxGtm_ATOM2_7_TOUT37_P32_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT63_P20_7_OUT
IfxGtm_ATOM2_7_TOUT63_P20_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT93_P13_2_OUT
IfxGtm_ATOM2_7_TOUT93_P13_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT101_P11_12_OUT
IfxGtm_ATOM3_0N_TOUT101_P11_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT144_P33_15_OUT
IfxGtm_ATOM3_0N_TOUT144_P33_15_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT17_P00_8_OUT
IfxGtm_ATOM3_0N_TOUT17_P00_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT25_P33_3_OUT
IfxGtm_ATOM3_0N_TOUT25_P33_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT32_P33_10_OUT
IfxGtm_ATOM3_0N_TOUT32_P33_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT37_P32_1_OUT
IfxGtm_ATOM3_0N_TOUT37_P32_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT63_P20_7_OUT
IfxGtm_ATOM3_0N_TOUT63_P20_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT76_P15_5_OUT
IfxGtm_ATOM3_0N_TOUT76_P15_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT18_P00_9_OUT
IfxGtm_ATOM3_0_TOUT18_P00_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT26_P33_4_OUT
IfxGtm_ATOM3_0_TOUT26_P33_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT32_P33_10_OUT
IfxGtm_ATOM3_0_TOUT32_P33_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT65_P20_9_OUT
IfxGtm_ATOM3_0_TOUT65_P20_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT94_P13_3_OUT
IfxGtm_ATOM3_0_TOUT94_P13_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT14_P00_5_OUT
IfxGtm_ATOM3_1N_TOUT14_P00_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT167_P00_13_OUT
IfxGtm_ATOM3_1N_TOUT167_P00_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT22_P33_0_OUT
IfxGtm_ATOM3_1N_TOUT22_P33_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT30_P33_8_OUT
IfxGtm_ATOM3_1N_TOUT30_P33_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT34_P33_12_OUT
IfxGtm_ATOM3_1N_TOUT34_P33_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT51_P21_0_OUT
IfxGtm_ATOM3_1N_TOUT51_P21_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT79_P15_8_OUT
IfxGtm_ATOM3_1N_TOUT79_P15_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT90_P14_10_OUT
IfxGtm_ATOM3_1N_TOUT90_P14_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT91_P13_0_OUT
IfxGtm_ATOM3_1N_TOUT91_P13_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT98_P11_9_OUT
IfxGtm_ATOM3_1N_TOUT98_P11_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT111_P01_3_OUT
IfxGtm_ATOM3_1_TOUT111_P01_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT128_P12_0_OUT
IfxGtm_ATOM3_1_TOUT128_P12_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT19_P00_10_OUT
IfxGtm_ATOM3_1_TOUT19_P00_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT27_P33_5_OUT
IfxGtm_ATOM3_1_TOUT27_P33_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT43_P23_2_OUT
IfxGtm_ATOM3_1_TOUT43_P23_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT64_P20_8_OUT
IfxGtm_ATOM3_1_TOUT64_P20_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT90_P14_10_OUT
IfxGtm_ATOM3_1_TOUT90_P14_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT95_P11_2_OUT
IfxGtm_ATOM3_1_TOUT95_P11_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT114_P01_6_OUT
IfxGtm_ATOM3_2N_TOUT114_P01_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT15_P00_6_OUT
IfxGtm_ATOM3_2N_TOUT15_P00_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT166_P00_14_OUT
IfxGtm_ATOM3_2N_TOUT166_P00_14_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT23_P33_1_OUT
IfxGtm_ATOM3_2N_TOUT23_P33_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT31_P33_9_OUT
IfxGtm_ATOM3_2N_TOUT31_P33_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT35_P33_13_OUT
IfxGtm_ATOM3_2N_TOUT35_P33_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT52_P21_1_OUT
IfxGtm_ATOM3_2N_TOUT52_P21_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT78_P15_7_OUT
IfxGtm_ATOM3_2N_TOUT78_P15_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT91_P13_0_OUT
IfxGtm_ATOM3_2N_TOUT91_P13_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT92_P13_1_OUT
IfxGtm_ATOM3_2N_TOUT92_P13_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT99_P11_10_OUT
IfxGtm_ATOM3_2N_TOUT99_P11_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT112_P01_4_OUT
IfxGtm_ATOM3_2_TOUT112_P01_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT20_P00_11_OUT
IfxGtm_ATOM3_2_TOUT20_P00_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT28_P33_6_OUT
IfxGtm_ATOM3_2_TOUT28_P33_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT44_P23_3_OUT
IfxGtm_ATOM3_2_TOUT44_P23_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT63_P20_7_OUT
IfxGtm_ATOM3_2_TOUT63_P20_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT88_P14_8_OUT
IfxGtm_ATOM3_2_TOUT88_P14_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT96_P11_3_OUT
IfxGtm_ATOM3_2_TOUT96_P11_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT100_P11_11_OUT
IfxGtm_ATOM3_3N_TOUT100_P11_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT115_P01_7_OUT
IfxGtm_ATOM3_3N_TOUT115_P01_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT143_P33_14_OUT
IfxGtm_ATOM3_3N_TOUT143_P33_14_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT168_P00_15_OUT
IfxGtm_ATOM3_3N_TOUT168_P00_15_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT16_P00_7_OUT
IfxGtm_ATOM3_3N_TOUT16_P00_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT24_P33_2_OUT
IfxGtm_ATOM3_3N_TOUT24_P33_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT33_P33_11_OUT
IfxGtm_ATOM3_3N_TOUT33_P33_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT36_P32_0_OUT
IfxGtm_ATOM3_3N_TOUT36_P32_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT62_P20_6_OUT
IfxGtm_ATOM3_3N_TOUT62_P20_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT77_P15_6_OUT
IfxGtm_ATOM3_3N_TOUT77_P15_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT92_P13_1_OUT
IfxGtm_ATOM3_3N_TOUT92_P13_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT93_P13_2_OUT
IfxGtm_ATOM3_3N_TOUT93_P13_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT113_P01_5_OUT
IfxGtm_ATOM3_3_TOUT113_P01_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT21_P00_12_OUT
IfxGtm_ATOM3_3_TOUT21_P00_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT29_P33_7_OUT
IfxGtm_ATOM3_3_TOUT29_P33_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT62_P20_6_OUT
IfxGtm_ATOM3_3_TOUT62_P20_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT89_P14_9_OUT
IfxGtm_ATOM3_3_TOUT89_P14_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT97_P11_6_OUT
IfxGtm_ATOM3_3_TOUT97_P11_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4N_TOUT135_P22_9_OUT
IfxGtm_ATOM3_4N_TOUT135_P22_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4N_TOUT21_P00_12_OUT
IfxGtm_ATOM3_4N_TOUT21_P00_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4N_TOUT29_P33_7_OUT
IfxGtm_ATOM3_4N_TOUT29_P33_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4N_TOUT57_P21_6_OUT
IfxGtm_ATOM3_4N_TOUT57_P21_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4N_TOUT86_P14_6_OUT
IfxGtm_ATOM3_4N_TOUT86_P14_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4N_TOUT97_P11_6_OUT
IfxGtm_ATOM3_4N_TOUT97_P11_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT114_P01_6_OUT
IfxGtm_ATOM3_4_TOUT114_P01_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT131_P22_5_OUT
IfxGtm_ATOM3_4_TOUT131_P22_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT167_P00_13_OUT
IfxGtm_ATOM3_4_TOUT167_P00_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT22_P33_0_OUT
IfxGtm_ATOM3_4_TOUT22_P33_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT30_P33_8_OUT
IfxGtm_ATOM3_4_TOUT30_P33_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT34_P33_12_OUT
IfxGtm_ATOM3_4_TOUT34_P33_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT51_P21_0_OUT
IfxGtm_ATOM3_4_TOUT51_P21_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT90_P14_10_OUT
IfxGtm_ATOM3_4_TOUT90_P14_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT98_P11_9_OUT
IfxGtm_ATOM3_4_TOUT98_P11_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5N_TOUT120_P11_1_OUT
IfxGtm_ATOM3_5N_TOUT120_P11_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5N_TOUT136_P22_10_OUT
IfxGtm_ATOM3_5N_TOUT136_P22_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5N_TOUT18_P00_9_OUT
IfxGtm_ATOM3_5N_TOUT18_P00_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5N_TOUT26_P33_4_OUT
IfxGtm_ATOM3_5N_TOUT26_P33_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5N_TOUT59_P20_0_OUT
IfxGtm_ATOM3_5N_TOUT59_P20_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5N_TOUT87_P14_7_OUT
IfxGtm_ATOM3_5N_TOUT87_P14_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5N_TOUT94_P13_3_OUT
IfxGtm_ATOM3_5N_TOUT94_P13_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT115_P01_7_OUT
IfxGtm_ATOM3_5_TOUT115_P01_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT132_P22_6_OUT
IfxGtm_ATOM3_5_TOUT132_P22_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT166_P00_14_OUT
IfxGtm_ATOM3_5_TOUT166_P00_14_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT35_P33_13_OUT
IfxGtm_ATOM3_5_TOUT35_P33_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT52_P21_1_OUT
IfxGtm_ATOM3_5_TOUT52_P21_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT64_P20_8_OUT
IfxGtm_ATOM3_5_TOUT64_P20_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT91_P13_0_OUT
IfxGtm_ATOM3_5_TOUT91_P13_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT99_P11_10_OUT
IfxGtm_ATOM3_5_TOUT99_P11_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6N_TOUT137_P22_11_OUT
IfxGtm_ATOM3_6N_TOUT137_P22_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6N_TOUT19_P00_10_OUT
IfxGtm_ATOM3_6N_TOUT19_P00_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6N_TOUT27_P33_5_OUT
IfxGtm_ATOM3_6N_TOUT27_P33_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6N_TOUT60_P20_1_OUT
IfxGtm_ATOM3_6N_TOUT60_P20_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6N_TOUT88_P14_8_OUT
IfxGtm_ATOM3_6N_TOUT88_P14_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6N_TOUT95_P11_2_OUT
IfxGtm_ATOM3_6N_TOUT95_P11_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT100_P11_11_OUT
IfxGtm_ATOM3_6_TOUT100_P11_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT133_P22_7_OUT
IfxGtm_ATOM3_6_TOUT133_P22_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT143_P33_14_OUT
IfxGtm_ATOM3_6_TOUT143_P33_14_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT168_P00_15_OUT
IfxGtm_ATOM3_6_TOUT168_P00_15_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT36_P32_0_OUT
IfxGtm_ATOM3_6_TOUT36_P32_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT62_P20_6_OUT
IfxGtm_ATOM3_6_TOUT62_P20_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT92_P13_1_OUT
IfxGtm_ATOM3_6_TOUT92_P13_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7N_TOUT20_P00_11_OUT
IfxGtm_ATOM3_7N_TOUT20_P00_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7N_TOUT28_P33_6_OUT
IfxGtm_ATOM3_7N_TOUT28_P33_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7N_TOUT61_P20_3_OUT
IfxGtm_ATOM3_7N_TOUT61_P20_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7N_TOUT89_P14_9_OUT
IfxGtm_ATOM3_7N_TOUT89_P14_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7N_TOUT96_P11_3_OUT
IfxGtm_ATOM3_7N_TOUT96_P11_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT101_P11_12_OUT
IfxGtm_ATOM3_7_TOUT101_P11_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT134_P22_8_OUT
IfxGtm_ATOM3_7_TOUT134_P22_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT144_P33_15_OUT
IfxGtm_ATOM3_7_TOUT144_P33_15_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT37_P32_1_OUT
IfxGtm_ATOM3_7_TOUT37_P32_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT63_P20_7_OUT
IfxGtm_ATOM3_7_TOUT63_P20_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT93_P13_2_OUT
IfxGtm_ATOM3_7_TOUT93_P13_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0N_TOUT87_P14_7_OUT
IfxGtm_ATOM4_0N_TOUT87_P14_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT109_P10_7_OUT
IfxGtm_ATOM4_0_TOUT109_P10_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT39_P32_3_OUT
IfxGtm_ATOM4_0_TOUT39_P32_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT48_P22_1_OUT
IfxGtm_ATOM4_0_TOUT48_P22_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT53_P21_2_OUT
IfxGtm_ATOM4_0_TOUT53_P21_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT68_P20_12_OUT
IfxGtm_ATOM4_0_TOUT68_P20_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT76_P15_5_OUT
IfxGtm_ATOM4_0_TOUT76_P15_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT77_P15_6_OUT
IfxGtm_ATOM4_0_TOUT77_P15_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT85_P14_5_OUT
IfxGtm_ATOM4_0_TOUT85_P14_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT87_P14_7_OUT
IfxGtm_ATOM4_0_TOUT87_P14_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT102_P10_0_OUT
IfxGtm_ATOM4_1N_TOUT102_P10_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT44_P23_3_OUT
IfxGtm_ATOM4_1N_TOUT44_P23_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT50_P22_3_OUT
IfxGtm_ATOM4_1N_TOUT50_P22_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT53_P21_2_OUT
IfxGtm_ATOM4_1N_TOUT53_P21_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT57_P21_6_OUT
IfxGtm_ATOM4_1N_TOUT57_P21_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT72_P15_1_OUT
IfxGtm_ATOM4_1N_TOUT72_P15_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT85_P14_5_OUT
IfxGtm_ATOM4_1N_TOUT85_P14_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT86_P14_6_OUT
IfxGtm_ATOM4_1N_TOUT86_P14_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT103_P10_1_OUT
IfxGtm_ATOM4_1_TOUT103_P10_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT41_P23_0_OUT
IfxGtm_ATOM4_1_TOUT41_P23_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT47_P22_0_OUT
IfxGtm_ATOM4_1_TOUT47_P22_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT54_P21_3_OUT
IfxGtm_ATOM4_1_TOUT54_P21_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT69_P20_13_OUT
IfxGtm_ATOM4_1_TOUT69_P20_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT78_P15_7_OUT
IfxGtm_ATOM4_1_TOUT78_P15_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT79_P15_8_OUT
IfxGtm_ATOM4_1_TOUT79_P15_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT84_P14_4_OUT
IfxGtm_ATOM4_1_TOUT84_P14_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT86_P14_6_OUT
IfxGtm_ATOM4_1_TOUT86_P14_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2N_TOUT110_P10_8_OUT
IfxGtm_ATOM4_2N_TOUT110_P10_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2N_TOUT45_P23_4_OUT
IfxGtm_ATOM4_2N_TOUT45_P23_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2N_TOUT52_P21_1_OUT
IfxGtm_ATOM4_2N_TOUT52_P21_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2N_TOUT58_P21_7_OUT
IfxGtm_ATOM4_2N_TOUT58_P21_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2N_TOUT65_P20_9_OUT
IfxGtm_ATOM4_2N_TOUT65_P20_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2N_TOUT73_P15_2_OUT
IfxGtm_ATOM4_2N_TOUT73_P15_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2N_TOUT81_P14_1_OUT
IfxGtm_ATOM4_2N_TOUT81_P14_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT104_P10_2_OUT
IfxGtm_ATOM4_2_TOUT104_P10_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT107_P10_5_OUT
IfxGtm_ATOM4_2_TOUT107_P10_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT42_P23_1_OUT
IfxGtm_ATOM4_2_TOUT42_P23_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT46_P23_5_OUT
IfxGtm_ATOM4_2_TOUT46_P23_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT55_P21_4_OUT
IfxGtm_ATOM4_2_TOUT55_P21_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT70_P20_14_OUT
IfxGtm_ATOM4_2_TOUT70_P20_14_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT80_P14_0_OUT
IfxGtm_ATOM4_2_TOUT80_P14_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT83_P14_3_OUT
IfxGtm_ATOM4_2_TOUT83_P14_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3N_TOUT106_P10_4_OUT
IfxGtm_ATOM4_3N_TOUT106_P10_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3N_TOUT46_P23_5_OUT
IfxGtm_ATOM4_3N_TOUT46_P23_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3N_TOUT51_P21_0_OUT
IfxGtm_ATOM4_3N_TOUT51_P21_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3N_TOUT59_P20_0_OUT
IfxGtm_ATOM4_3N_TOUT59_P20_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3N_TOUT66_P20_10_OUT
IfxGtm_ATOM4_3N_TOUT66_P20_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3N_TOUT74_P15_3_OUT
IfxGtm_ATOM4_3N_TOUT74_P15_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3N_TOUT80_P14_0_OUT
IfxGtm_ATOM4_3N_TOUT80_P14_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3_TOUT105_P10_3_OUT
IfxGtm_ATOM4_3_TOUT105_P10_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3_TOUT108_P10_6_OUT
IfxGtm_ATOM4_3_TOUT108_P10_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3_TOUT43_P23_2_OUT
IfxGtm_ATOM4_3_TOUT43_P23_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3_TOUT49_P22_2_OUT
IfxGtm_ATOM4_3_TOUT49_P22_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3_TOUT56_P21_5_OUT
IfxGtm_ATOM4_3_TOUT56_P21_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3_TOUT71_P15_0_OUT
IfxGtm_ATOM4_3_TOUT71_P15_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3_TOUT82_P14_2_OUT
IfxGtm_ATOM4_3_TOUT82_P14_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT105_P10_3_OUT
IfxGtm_ATOM4_4N_TOUT105_P10_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT108_P10_6_OUT
IfxGtm_ATOM4_4N_TOUT108_P10_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT132_P22_6_OUT
IfxGtm_ATOM4_4N_TOUT132_P22_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT21_P00_12_OUT
IfxGtm_ATOM4_4N_TOUT21_P00_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT56_P21_5_OUT
IfxGtm_ATOM4_4N_TOUT56_P21_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT71_P15_0_OUT
IfxGtm_ATOM4_4N_TOUT71_P15_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT75_P15_4_OUT
IfxGtm_ATOM4_4N_TOUT75_P15_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT95_P11_2_OUT
IfxGtm_ATOM4_4N_TOUT95_P11_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT102_P10_0_OUT
IfxGtm_ATOM4_4_TOUT102_P10_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT111_P01_3_OUT
IfxGtm_ATOM4_4_TOUT111_P01_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT131_P22_5_OUT
IfxGtm_ATOM4_4_TOUT131_P22_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT264_P13_15_OUT
IfxGtm_ATOM4_4_TOUT264_P13_15_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT44_P23_3_OUT
IfxGtm_ATOM4_4_TOUT44_P23_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT50_P22_3_OUT
IfxGtm_ATOM4_4_TOUT50_P22_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT57_P21_6_OUT
IfxGtm_ATOM4_4_TOUT57_P21_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT72_P15_1_OUT
IfxGtm_ATOM4_4_TOUT72_P15_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT81_P14_1_OUT
IfxGtm_ATOM4_4_TOUT81_P14_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5N_TOUT109_P10_7_OUT
IfxGtm_ATOM4_5N_TOUT109_P10_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5N_TOUT121_P11_4_OUT
IfxGtm_ATOM4_5N_TOUT121_P11_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5N_TOUT133_P22_7_OUT
IfxGtm_ATOM4_5N_TOUT133_P22_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5N_TOUT18_P00_9_OUT
IfxGtm_ATOM4_5N_TOUT18_P00_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5N_TOUT76_P15_5_OUT
IfxGtm_ATOM4_5N_TOUT76_P15_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5N_TOUT77_P15_6_OUT
IfxGtm_ATOM4_5N_TOUT77_P15_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT110_P10_8_OUT
IfxGtm_ATOM4_5_TOUT110_P10_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT116_P02_9_OUT
IfxGtm_ATOM4_5_TOUT116_P02_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT128_P12_0_OUT
IfxGtm_ATOM4_5_TOUT128_P12_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT130_P22_4_OUT
IfxGtm_ATOM4_5_TOUT130_P22_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT45_P23_4_OUT
IfxGtm_ATOM4_5_TOUT45_P23_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT56_P21_5_OUT
IfxGtm_ATOM4_5_TOUT56_P21_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT58_P21_7_OUT
IfxGtm_ATOM4_5_TOUT58_P21_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT65_P20_9_OUT
IfxGtm_ATOM4_5_TOUT65_P20_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT73_P15_2_OUT
IfxGtm_ATOM4_5_TOUT73_P15_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6N_TOUT103_P10_1_OUT
IfxGtm_ATOM4_6N_TOUT103_P10_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6N_TOUT134_P22_8_OUT
IfxGtm_ATOM4_6N_TOUT134_P22_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6N_TOUT19_P00_10_OUT
IfxGtm_ATOM4_6N_TOUT19_P00_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6N_TOUT78_P15_7_OUT
IfxGtm_ATOM4_6N_TOUT78_P15_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6N_TOUT97_P11_6_OUT
IfxGtm_ATOM4_6N_TOUT97_P11_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT106_P10_4_OUT
IfxGtm_ATOM4_6_TOUT106_P10_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT117_P02_10_OUT
IfxGtm_ATOM4_6_TOUT117_P02_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT129_P12_1_OUT
IfxGtm_ATOM4_6_TOUT129_P12_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT139_P23_7_OUT
IfxGtm_ATOM4_6_TOUT139_P23_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT46_P23_5_OUT
IfxGtm_ATOM4_6_TOUT46_P23_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT59_P20_0_OUT
IfxGtm_ATOM4_6_TOUT59_P20_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT66_P20_10_OUT
IfxGtm_ATOM4_6_TOUT66_P20_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT74_P15_3_OUT
IfxGtm_ATOM4_6_TOUT74_P15_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7N_TOUT104_P10_2_OUT
IfxGtm_ATOM4_7N_TOUT104_P10_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7N_TOUT107_P10_5_OUT
IfxGtm_ATOM4_7N_TOUT107_P10_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7N_TOUT124_P11_8_OUT
IfxGtm_ATOM4_7N_TOUT124_P11_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7N_TOUT135_P22_9_OUT
IfxGtm_ATOM4_7N_TOUT135_P22_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7N_TOUT20_P00_11_OUT
IfxGtm_ATOM4_7N_TOUT20_P00_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7N_TOUT79_P15_8_OUT
IfxGtm_ATOM4_7N_TOUT79_P15_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7_TOUT118_P02_11_OUT
IfxGtm_ATOM4_7_TOUT118_P02_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7_TOUT119_P11_0_OUT
IfxGtm_ATOM4_7_TOUT119_P11_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7_TOUT138_P23_6_OUT
IfxGtm_ATOM4_7_TOUT138_P23_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7_TOUT40_P32_4_OUT
IfxGtm_ATOM4_7_TOUT40_P32_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7_TOUT64_P20_8_OUT
IfxGtm_ATOM4_7_TOUT64_P20_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7_TOUT67_P20_11_OUT
IfxGtm_ATOM4_7_TOUT67_P20_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7_TOUT75_P15_4_OUT
IfxGtm_ATOM4_7_TOUT75_P15_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT126_P11_14_OUT
IfxGtm_ATOM5_0N_TOUT126_P11_14_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT134_P22_8_OUT
IfxGtm_ATOM5_0N_TOUT134_P22_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT150_P34_5_OUT
IfxGtm_ATOM5_0N_TOUT150_P34_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT161_P01_13_OUT
IfxGtm_ATOM5_0N_TOUT161_P01_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT181_P31_7_OUT
IfxGtm_ATOM5_0N_TOUT181_P31_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT213_P25_7_OUT
IfxGtm_ATOM5_0N_TOUT213_P25_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT261_P14_12_OUT
IfxGtm_ATOM5_0N_TOUT261_P14_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT264_P13_15_OUT
IfxGtm_ATOM5_0N_TOUT264_P13_15_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT119_P11_0_OUT
IfxGtm_ATOM5_0_TOUT119_P11_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT130_P22_4_OUT
IfxGtm_ATOM5_0_TOUT130_P22_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT146_P34_1_OUT
IfxGtm_ATOM5_0_TOUT146_P34_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT155_P01_0_OUT
IfxGtm_ATOM5_0_TOUT155_P01_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT162_P01_8_OUT
IfxGtm_ATOM5_0_TOUT162_P01_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT174_P31_0_OUT
IfxGtm_ATOM5_0_TOUT174_P31_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT206_P25_0_OUT
IfxGtm_ATOM5_0_TOUT206_P25_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT249_P13_12_OUT
IfxGtm_ATOM5_0_TOUT249_P13_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT258_P14_11_OUT
IfxGtm_ATOM5_0_TOUT258_P14_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT123_P11_7_OUT
IfxGtm_ATOM5_1N_TOUT123_P11_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT128_P12_0_OUT
IfxGtm_ATOM5_1N_TOUT128_P12_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT135_P22_9_OUT
IfxGtm_ATOM5_1N_TOUT135_P22_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT140_P32_5_OUT
IfxGtm_ATOM5_1N_TOUT140_P32_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT158_P01_12_OUT
IfxGtm_ATOM5_1N_TOUT158_P01_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT178_P31_4_OUT
IfxGtm_ATOM5_1N_TOUT178_P31_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT210_P25_4_OUT
IfxGtm_ATOM5_1N_TOUT210_P25_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT245_P15_13_OUT
IfxGtm_ATOM5_1N_TOUT245_P15_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT248_P13_9_OUT
IfxGtm_ATOM5_1N_TOUT248_P13_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT260_P14_13_OUT
IfxGtm_ATOM5_1N_TOUT260_P14_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT268_P10_13_OUT
IfxGtm_ATOM5_1N_TOUT268_P10_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT120_P11_1_OUT
IfxGtm_ATOM5_1_TOUT120_P11_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT131_P22_5_OUT
IfxGtm_ATOM5_1_TOUT131_P22_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT147_P34_2_OUT
IfxGtm_ATOM5_1_TOUT147_P34_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT156_P01_2_OUT
IfxGtm_ATOM5_1_TOUT156_P01_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT164_P01_14_OUT
IfxGtm_ATOM5_1_TOUT164_P01_14_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT175_P31_1_OUT
IfxGtm_ATOM5_1_TOUT175_P31_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT207_P25_1_OUT
IfxGtm_ATOM5_1_TOUT207_P25_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT242_P15_10_OUT
IfxGtm_ATOM5_1_TOUT242_P15_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT253_P13_4_OUT
IfxGtm_ATOM5_1_TOUT253_P13_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT265_P10_9_OUT
IfxGtm_ATOM5_1_TOUT265_P10_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT124_P11_8_OUT
IfxGtm_ATOM5_2N_TOUT124_P11_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT136_P22_10_OUT
IfxGtm_ATOM5_2N_TOUT136_P22_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT141_P32_6_OUT
IfxGtm_ATOM5_2N_TOUT141_P32_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT159_P01_1_OUT
IfxGtm_ATOM5_2N_TOUT159_P01_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT179_P31_5_OUT
IfxGtm_ATOM5_2N_TOUT179_P31_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT211_P25_5_OUT
IfxGtm_ATOM5_2N_TOUT211_P25_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT246_P15_14_OUT
IfxGtm_ATOM5_2N_TOUT246_P15_14_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT250_P13_11_OUT
IfxGtm_ATOM5_2N_TOUT250_P13_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT259_P14_14_OUT
IfxGtm_ATOM5_2N_TOUT259_P14_14_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT269_P10_11_OUT
IfxGtm_ATOM5_2N_TOUT269_P10_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT121_P11_4_OUT
IfxGtm_ATOM5_2_TOUT121_P11_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT132_P22_6_OUT
IfxGtm_ATOM5_2_TOUT132_P22_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT148_P34_3_OUT
IfxGtm_ATOM5_2_TOUT148_P34_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT152_P02_15_OUT
IfxGtm_ATOM5_2_TOUT152_P02_15_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT157_P01_15_OUT
IfxGtm_ATOM5_2_TOUT157_P01_15_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT176_P31_2_OUT
IfxGtm_ATOM5_2_TOUT176_P31_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT208_P25_2_OUT
IfxGtm_ATOM5_2_TOUT208_P25_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT243_P15_11_OUT
IfxGtm_ATOM5_2_TOUT243_P15_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT254_P13_5_OUT
IfxGtm_ATOM5_2_TOUT254_P13_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT266_P10_10_OUT
IfxGtm_ATOM5_2_TOUT266_P10_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT123_P11_7_OUT
IfxGtm_ATOM5_3N_TOUT123_P11_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT125_P11_13_OUT
IfxGtm_ATOM5_3N_TOUT125_P11_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT137_P22_11_OUT
IfxGtm_ATOM5_3N_TOUT137_P22_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT142_P32_7_OUT
IfxGtm_ATOM5_3N_TOUT142_P32_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT160_P01_9_OUT
IfxGtm_ATOM5_3N_TOUT160_P01_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT180_P31_6_OUT
IfxGtm_ATOM5_3N_TOUT180_P31_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT212_P25_6_OUT
IfxGtm_ATOM5_3N_TOUT212_P25_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT212_P26_0_OUT
IfxGtm_ATOM5_3N_TOUT212_P26_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT247_P15_15_OUT
IfxGtm_ATOM5_3N_TOUT247_P15_15_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT249_P13_12_OUT
IfxGtm_ATOM5_3N_TOUT249_P13_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT263_P14_15_OUT
IfxGtm_ATOM5_3N_TOUT263_P14_15_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT270_P10_15_OUT
IfxGtm_ATOM5_3N_TOUT270_P10_15_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT122_P11_5_OUT
IfxGtm_ATOM5_3_TOUT122_P11_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT133_P22_7_OUT
IfxGtm_ATOM5_3_TOUT133_P22_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT149_P34_4_OUT
IfxGtm_ATOM5_3_TOUT149_P34_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT163_P01_10_OUT
IfxGtm_ATOM5_3_TOUT163_P01_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT165_P01_11_OUT
IfxGtm_ATOM5_3_TOUT165_P01_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT177_P31_3_OUT
IfxGtm_ATOM5_3_TOUT177_P31_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT209_P25_3_OUT
IfxGtm_ATOM5_3_TOUT209_P25_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT244_P15_12_OUT
IfxGtm_ATOM5_3_TOUT244_P15_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT255_P13_6_OUT
IfxGtm_ATOM5_3_TOUT255_P13_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT267_P10_14_OUT
IfxGtm_ATOM5_3_TOUT267_P10_14_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4N_TOUT122_P11_5_OUT
IfxGtm_ATOM5_4N_TOUT122_P11_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4N_TOUT129_P12_1_OUT
IfxGtm_ATOM5_4N_TOUT129_P12_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4N_TOUT163_P01_10_OUT
IfxGtm_ATOM5_4N_TOUT163_P01_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4N_TOUT165_P01_11_OUT
IfxGtm_ATOM5_4N_TOUT165_P01_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4N_TOUT177_P31_3_OUT
IfxGtm_ATOM5_4N_TOUT177_P31_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4N_TOUT209_P25_3_OUT
IfxGtm_ATOM5_4N_TOUT209_P25_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4N_TOUT267_P10_14_OUT
IfxGtm_ATOM5_4N_TOUT267_P10_14_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT123_P11_7_OUT
IfxGtm_ATOM5_4_TOUT123_P11_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT134_P22_8_OUT
IfxGtm_ATOM5_4_TOUT134_P22_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT150_P34_5_OUT
IfxGtm_ATOM5_4_TOUT150_P34_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT158_P01_12_OUT
IfxGtm_ATOM5_4_TOUT158_P01_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT178_P31_4_OUT
IfxGtm_ATOM5_4_TOUT178_P31_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT210_P25_4_OUT
IfxGtm_ATOM5_4_TOUT210_P25_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT245_P15_13_OUT
IfxGtm_ATOM5_4_TOUT245_P15_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT248_P13_9_OUT
IfxGtm_ATOM5_4_TOUT248_P13_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT268_P10_13_OUT
IfxGtm_ATOM5_4_TOUT268_P10_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5N_TOUT119_P11_0_OUT
IfxGtm_ATOM5_5N_TOUT119_P11_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5N_TOUT155_P01_0_OUT
IfxGtm_ATOM5_5N_TOUT155_P01_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5N_TOUT162_P01_8_OUT
IfxGtm_ATOM5_5N_TOUT162_P01_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5N_TOUT174_P31_0_OUT
IfxGtm_ATOM5_5N_TOUT174_P31_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5N_TOUT206_P25_0_OUT
IfxGtm_ATOM5_5N_TOUT206_P25_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT124_P11_8_OUT
IfxGtm_ATOM5_5_TOUT124_P11_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT135_P22_9_OUT
IfxGtm_ATOM5_5_TOUT135_P22_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT140_P32_5_OUT
IfxGtm_ATOM5_5_TOUT140_P32_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT159_P01_1_OUT
IfxGtm_ATOM5_5_TOUT159_P01_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT179_P31_5_OUT
IfxGtm_ATOM5_5_TOUT179_P31_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT211_P25_5_OUT
IfxGtm_ATOM5_5_TOUT211_P25_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT246_P15_14_OUT
IfxGtm_ATOM5_5_TOUT246_P15_14_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT250_P13_11_OUT
IfxGtm_ATOM5_5_TOUT250_P13_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT269_P10_11_OUT
IfxGtm_ATOM5_5_TOUT269_P10_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6N_TOUT120_P11_1_OUT
IfxGtm_ATOM5_6N_TOUT120_P11_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6N_TOUT156_P01_2_OUT
IfxGtm_ATOM5_6N_TOUT156_P01_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6N_TOUT158_P01_12_OUT
IfxGtm_ATOM5_6N_TOUT158_P01_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6N_TOUT175_P31_1_OUT
IfxGtm_ATOM5_6N_TOUT175_P31_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6N_TOUT207_P25_1_OUT
IfxGtm_ATOM5_6N_TOUT207_P25_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6N_TOUT96_P11_3_OUT
IfxGtm_ATOM5_6N_TOUT96_P11_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT125_P11_13_OUT
IfxGtm_ATOM5_6_TOUT125_P11_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT136_P22_10_OUT
IfxGtm_ATOM5_6_TOUT136_P22_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT141_P32_6_OUT
IfxGtm_ATOM5_6_TOUT141_P32_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT160_P01_9_OUT
IfxGtm_ATOM5_6_TOUT160_P01_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT180_P31_6_OUT
IfxGtm_ATOM5_6_TOUT180_P31_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT212_P25_6_OUT
IfxGtm_ATOM5_6_TOUT212_P25_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT212_P26_0_OUT
IfxGtm_ATOM5_6_TOUT212_P26_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT247_P15_15_OUT
IfxGtm_ATOM5_6_TOUT247_P15_15_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT249_P13_12_OUT
IfxGtm_ATOM5_6_TOUT249_P13_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT270_P10_15_OUT
IfxGtm_ATOM5_6_TOUT270_P10_15_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7N_TOUT121_P11_4_OUT
IfxGtm_ATOM5_7N_TOUT121_P11_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7N_TOUT152_P02_15_OUT
IfxGtm_ATOM5_7N_TOUT152_P02_15_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7N_TOUT157_P01_15_OUT
IfxGtm_ATOM5_7N_TOUT157_P01_15_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7N_TOUT176_P31_2_OUT
IfxGtm_ATOM5_7N_TOUT176_P31_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7N_TOUT208_P25_2_OUT
IfxGtm_ATOM5_7N_TOUT208_P25_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7_TOUT126_P11_14_OUT
IfxGtm_ATOM5_7_TOUT126_P11_14_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7_TOUT137_P22_11_OUT
IfxGtm_ATOM5_7_TOUT137_P22_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7_TOUT142_P32_7_OUT
IfxGtm_ATOM5_7_TOUT142_P32_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7_TOUT161_P01_13_OUT
IfxGtm_ATOM5_7_TOUT161_P01_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7_TOUT181_P31_7_OUT
IfxGtm_ATOM5_7_TOUT181_P31_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7_TOUT213_P25_7_OUT
IfxGtm_ATOM5_7_TOUT213_P25_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7_TOUT248_P13_9_OUT
IfxGtm_ATOM5_7_TOUT248_P13_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT127_P11_15_OUT
IfxGtm_ATOM6_0_TOUT127_P11_15_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT141_P32_6_OUT
IfxGtm_ATOM6_0_TOUT141_P32_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT155_P01_0_OUT
IfxGtm_ATOM6_0_TOUT155_P01_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT162_P01_8_OUT
IfxGtm_ATOM6_0_TOUT162_P01_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT182_P31_8_OUT
IfxGtm_ATOM6_0_TOUT182_P31_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT214_P25_8_OUT
IfxGtm_ATOM6_0_TOUT214_P25_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT242_P15_10_OUT
IfxGtm_ATOM6_0_TOUT242_P15_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT250_P13_11_OUT
IfxGtm_ATOM6_0_TOUT250_P13_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT128_P12_0_OUT
IfxGtm_ATOM6_1_TOUT128_P12_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT142_P32_7_OUT
IfxGtm_ATOM6_1_TOUT142_P32_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT156_P01_2_OUT
IfxGtm_ATOM6_1_TOUT156_P01_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT164_P01_14_OUT
IfxGtm_ATOM6_1_TOUT164_P01_14_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT183_P31_9_OUT
IfxGtm_ATOM6_1_TOUT183_P31_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT215_P25_9_OUT
IfxGtm_ATOM6_1_TOUT215_P25_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT251_P13_10_OUT
IfxGtm_ATOM6_1_TOUT251_P13_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT258_P14_11_OUT
IfxGtm_ATOM6_1_TOUT258_P14_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT129_P12_1_OUT
IfxGtm_ATOM6_2_TOUT129_P12_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT143_P33_14_OUT
IfxGtm_ATOM6_2_TOUT143_P33_14_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT152_P02_15_OUT
IfxGtm_ATOM6_2_TOUT152_P02_15_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT157_P01_15_OUT
IfxGtm_ATOM6_2_TOUT157_P01_15_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT184_P31_10_OUT
IfxGtm_ATOM6_2_TOUT184_P31_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT216_P25_10_OUT
IfxGtm_ATOM6_2_TOUT216_P25_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT252_P13_14_OUT
IfxGtm_ATOM6_2_TOUT252_P13_14_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT259_P14_14_OUT
IfxGtm_ATOM6_2_TOUT259_P14_14_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT111_P01_3_OUT
IfxGtm_ATOM6_3_TOUT111_P01_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT144_P33_15_OUT
IfxGtm_ATOM6_3_TOUT144_P33_15_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT163_P01_10_OUT
IfxGtm_ATOM6_3_TOUT163_P01_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT165_P01_11_OUT
IfxGtm_ATOM6_3_TOUT165_P01_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT185_P31_11_OUT
IfxGtm_ATOM6_3_TOUT185_P31_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT217_P25_11_OUT
IfxGtm_ATOM6_3_TOUT217_P25_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT253_P13_4_OUT
IfxGtm_ATOM6_3_TOUT253_P13_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT260_P14_13_OUT
IfxGtm_ATOM6_3_TOUT260_P14_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT140_P32_5_OUT
IfxGtm_ATOM6_4_TOUT140_P32_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT143_P33_14_OUT
IfxGtm_ATOM6_4_TOUT143_P33_14_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT158_P01_12_OUT
IfxGtm_ATOM6_4_TOUT158_P01_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT186_P31_12_OUT
IfxGtm_ATOM6_4_TOUT186_P31_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT218_P25_12_OUT
IfxGtm_ATOM6_4_TOUT218_P25_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT254_P13_5_OUT
IfxGtm_ATOM6_4_TOUT254_P13_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT261_P14_12_OUT
IfxGtm_ATOM6_4_TOUT261_P14_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT31_P33_9_OUT
IfxGtm_ATOM6_4_TOUT31_P33_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_5_TOUT146_P34_1_OUT
IfxGtm_ATOM6_5_TOUT146_P34_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_5_TOUT159_P01_1_OUT
IfxGtm_ATOM6_5_TOUT159_P01_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_5_TOUT187_P31_13_OUT
IfxGtm_ATOM6_5_TOUT187_P31_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_5_TOUT219_P25_13_OUT
IfxGtm_ATOM6_5_TOUT219_P25_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_5_TOUT243_P15_11_OUT
IfxGtm_ATOM6_5_TOUT243_P15_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_5_TOUT255_P13_6_OUT
IfxGtm_ATOM6_5_TOUT255_P13_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_5_TOUT262_P13_13_OUT
IfxGtm_ATOM6_5_TOUT262_P13_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_6_TOUT147_P34_2_OUT
IfxGtm_ATOM6_6_TOUT147_P34_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_6_TOUT160_P01_9_OUT
IfxGtm_ATOM6_6_TOUT160_P01_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_6_TOUT188_P31_14_OUT
IfxGtm_ATOM6_6_TOUT188_P31_14_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_6_TOUT220_P25_14_OUT
IfxGtm_ATOM6_6_TOUT220_P25_14_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_6_TOUT256_P13_7_OUT
IfxGtm_ATOM6_6_TOUT256_P13_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_6_TOUT263_P14_15_OUT
IfxGtm_ATOM6_6_TOUT263_P14_15_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_7_TOUT148_P34_3_OUT
IfxGtm_ATOM6_7_TOUT148_P34_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_7_TOUT161_P01_13_OUT
IfxGtm_ATOM6_7_TOUT161_P01_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_7_TOUT189_P31_15_OUT
IfxGtm_ATOM6_7_TOUT189_P31_15_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_7_TOUT221_P25_15_OUT
IfxGtm_ATOM6_7_TOUT221_P25_15_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_7_TOUT244_P15_12_OUT
IfxGtm_ATOM6_7_TOUT244_P15_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_7_TOUT264_P13_15_OUT
IfxGtm_ATOM6_7_TOUT264_P13_15_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_0_TOUT149_P34_4_OUT
IfxGtm_ATOM7_0_TOUT149_P34_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_0_TOUT162_P01_8_OUT
IfxGtm_ATOM7_0_TOUT162_P01_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_0_TOUT190_P30_0_OUT
IfxGtm_ATOM7_0_TOUT190_P30_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_0_TOUT222_P24_0_OUT
IfxGtm_ATOM7_0_TOUT222_P24_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_0_TOUT249_P13_12_OUT
IfxGtm_ATOM7_0_TOUT249_P13_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_0_TOUT258_P14_11_OUT
IfxGtm_ATOM7_0_TOUT258_P14_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT150_P34_5_OUT
IfxGtm_ATOM7_1_TOUT150_P34_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT163_P01_10_OUT
IfxGtm_ATOM7_1_TOUT163_P01_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT191_P30_1_OUT
IfxGtm_ATOM7_1_TOUT191_P30_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT223_P24_1_OUT
IfxGtm_ATOM7_1_TOUT223_P24_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT242_P15_10_OUT
IfxGtm_ATOM7_1_TOUT242_P15_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT245_P15_13_OUT
IfxGtm_ATOM7_1_TOUT245_P15_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT253_P13_4_OUT
IfxGtm_ATOM7_1_TOUT253_P13_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT265_P10_9_OUT
IfxGtm_ATOM7_1_TOUT265_P10_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_2_TOUT164_P01_14_OUT
IfxGtm_ATOM7_2_TOUT164_P01_14_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_2_TOUT192_P30_2_OUT
IfxGtm_ATOM7_2_TOUT192_P30_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_2_TOUT224_P24_2_OUT
IfxGtm_ATOM7_2_TOUT224_P24_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_2_TOUT243_P15_11_OUT
IfxGtm_ATOM7_2_TOUT243_P15_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_2_TOUT246_P15_14_OUT
IfxGtm_ATOM7_2_TOUT246_P15_14_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_2_TOUT254_P13_5_OUT
IfxGtm_ATOM7_2_TOUT254_P13_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_2_TOUT266_P10_10_OUT
IfxGtm_ATOM7_2_TOUT266_P10_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_3_TOUT166_P00_14_OUT
IfxGtm_ATOM7_3_TOUT166_P00_14_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_3_TOUT193_P30_3_OUT
IfxGtm_ATOM7_3_TOUT193_P30_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_3_TOUT225_P24_3_OUT
IfxGtm_ATOM7_3_TOUT225_P24_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_3_TOUT244_P15_12_OUT
IfxGtm_ATOM7_3_TOUT244_P15_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_3_TOUT247_P15_15_OUT
IfxGtm_ATOM7_3_TOUT247_P15_15_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_3_TOUT255_P13_6_OUT
IfxGtm_ATOM7_3_TOUT255_P13_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_3_TOUT267_P10_14_OUT
IfxGtm_ATOM7_3_TOUT267_P10_14_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_4_TOUT167_P00_13_OUT
IfxGtm_ATOM7_4_TOUT167_P00_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_4_TOUT194_P30_4_OUT
IfxGtm_ATOM7_4_TOUT194_P30_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_4_TOUT226_P24_4_OUT
IfxGtm_ATOM7_4_TOUT226_P24_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_4_TOUT245_P15_13_OUT
IfxGtm_ATOM7_4_TOUT245_P15_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_4_TOUT248_P13_9_OUT
IfxGtm_ATOM7_4_TOUT248_P13_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_4_TOUT268_P10_13_OUT
IfxGtm_ATOM7_4_TOUT268_P10_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_5_TOUT168_P00_15_OUT
IfxGtm_ATOM7_5_TOUT168_P00_15_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_5_TOUT195_P30_5_OUT
IfxGtm_ATOM7_5_TOUT195_P30_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_5_TOUT227_P24_5_OUT
IfxGtm_ATOM7_5_TOUT227_P24_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_5_TOUT246_P15_14_OUT
IfxGtm_ATOM7_5_TOUT246_P15_14_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_5_TOUT251_P13_10_OUT
IfxGtm_ATOM7_5_TOUT251_P13_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_5_TOUT269_P10_11_OUT
IfxGtm_ATOM7_5_TOUT269_P10_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_6_TOUT151_P02_12_OUT
IfxGtm_ATOM7_6_TOUT151_P02_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_6_TOUT153_P02_13_OUT
IfxGtm_ATOM7_6_TOUT153_P02_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_6_TOUT196_P30_6_OUT
IfxGtm_ATOM7_6_TOUT196_P30_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_6_TOUT228_P24_6_OUT
IfxGtm_ATOM7_6_TOUT228_P24_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_6_TOUT247_P15_15_OUT
IfxGtm_ATOM7_6_TOUT247_P15_15_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_6_TOUT249_P13_12_OUT
IfxGtm_ATOM7_6_TOUT249_P13_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_6_TOUT270_P10_15_OUT
IfxGtm_ATOM7_6_TOUT270_P10_15_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_7_TOUT152_P02_15_OUT
IfxGtm_ATOM7_7_TOUT152_P02_15_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_7_TOUT154_P02_14_OUT
IfxGtm_ATOM7_7_TOUT154_P02_14_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_7_TOUT161_P01_13_OUT
IfxGtm_ATOM7_7_TOUT161_P01_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_7_TOUT197_P30_7_OUT
IfxGtm_ATOM7_7_TOUT197_P30_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_7_TOUT229_P24_7_OUT
IfxGtm_ATOM7_7_TOUT229_P24_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_7_TOUT248_P13_9_OUT
IfxGtm_ATOM7_7_TOUT248_P13_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_7_TOUT261_P14_12_OUT
IfxGtm_ATOM7_7_TOUT261_P14_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_0_TOUT162_P01_8_OUT
IfxGtm_ATOM8_0_TOUT162_P01_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_0_TOUT198_P30_8_OUT
IfxGtm_ATOM8_0_TOUT198_P30_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_0_TOUT230_P24_8_OUT
IfxGtm_ATOM8_0_TOUT230_P24_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_0_TOUT242_P15_10_OUT
IfxGtm_ATOM8_0_TOUT242_P15_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_0_TOUT250_P13_11_OUT
IfxGtm_ATOM8_0_TOUT250_P13_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_1_TOUT163_P01_10_OUT
IfxGtm_ATOM8_1_TOUT163_P01_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_1_TOUT199_P30_9_OUT
IfxGtm_ATOM8_1_TOUT199_P30_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_1_TOUT231_P24_9_OUT
IfxGtm_ATOM8_1_TOUT231_P24_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_1_TOUT251_P13_10_OUT
IfxGtm_ATOM8_1_TOUT251_P13_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_1_TOUT258_P14_11_OUT
IfxGtm_ATOM8_1_TOUT258_P14_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_2_TOUT164_P01_14_OUT
IfxGtm_ATOM8_2_TOUT164_P01_14_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_2_TOUT200_P30_10_OUT
IfxGtm_ATOM8_2_TOUT200_P30_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_2_TOUT232_P24_10_OUT
IfxGtm_ATOM8_2_TOUT232_P24_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_2_TOUT252_P13_14_OUT
IfxGtm_ATOM8_2_TOUT252_P13_14_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_2_TOUT259_P14_14_OUT
IfxGtm_ATOM8_2_TOUT259_P14_14_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_3_TOUT166_P00_14_OUT
IfxGtm_ATOM8_3_TOUT166_P00_14_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_3_TOUT201_P30_11_OUT
IfxGtm_ATOM8_3_TOUT201_P30_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_3_TOUT233_P24_11_OUT
IfxGtm_ATOM8_3_TOUT233_P24_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_3_TOUT253_P13_4_OUT
IfxGtm_ATOM8_3_TOUT253_P13_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_3_TOUT260_P14_13_OUT
IfxGtm_ATOM8_3_TOUT260_P14_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_4_TOUT167_P00_13_OUT
IfxGtm_ATOM8_4_TOUT167_P00_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_4_TOUT202_P30_12_OUT
IfxGtm_ATOM8_4_TOUT202_P30_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_4_TOUT234_P24_12_OUT
IfxGtm_ATOM8_4_TOUT234_P24_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_4_TOUT254_P13_5_OUT
IfxGtm_ATOM8_4_TOUT254_P13_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_4_TOUT261_P14_12_OUT
IfxGtm_ATOM8_4_TOUT261_P14_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_5_TOUT168_P00_15_OUT
IfxGtm_ATOM8_5_TOUT168_P00_15_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_5_TOUT203_P30_13_OUT
IfxGtm_ATOM8_5_TOUT203_P30_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_5_TOUT235_P24_13_OUT
IfxGtm_ATOM8_5_TOUT235_P24_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_5_TOUT243_P15_11_OUT
IfxGtm_ATOM8_5_TOUT243_P15_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_5_TOUT255_P13_6_OUT
IfxGtm_ATOM8_5_TOUT255_P13_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_5_TOUT262_P13_13_OUT
IfxGtm_ATOM8_5_TOUT262_P13_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_6_TOUT151_P02_12_OUT
IfxGtm_ATOM8_6_TOUT151_P02_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_6_TOUT153_P02_13_OUT
IfxGtm_ATOM8_6_TOUT153_P02_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_6_TOUT204_P30_14_OUT
IfxGtm_ATOM8_6_TOUT204_P30_14_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_6_TOUT236_P24_14_OUT
IfxGtm_ATOM8_6_TOUT236_P24_14_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_6_TOUT256_P13_7_OUT
IfxGtm_ATOM8_6_TOUT256_P13_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_6_TOUT263_P14_15_OUT
IfxGtm_ATOM8_6_TOUT263_P14_15_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_7_TOUT152_P02_15_OUT
IfxGtm_ATOM8_7_TOUT152_P02_15_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_7_TOUT154_P02_14_OUT
IfxGtm_ATOM8_7_TOUT154_P02_14_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_7_TOUT161_P01_13_OUT
IfxGtm_ATOM8_7_TOUT161_P01_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_7_TOUT205_P30_15_OUT
IfxGtm_ATOM8_7_TOUT205_P30_15_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_7_TOUT237_P24_15_OUT
IfxGtm_ATOM8_7_TOUT237_P24_15_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_7_TOUT244_P15_12_OUT
IfxGtm_ATOM8_7_TOUT244_P15_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_7_TOUT264_P13_15_OUT
IfxGtm_ATOM8_7_TOUT264_P13_15_OUT. More...
IFX_EXTERN IfxGtm_Clk_Out IfxGtm_CLK0_P23_1_OUT
CGM generated clock. More...
IFX_EXTERN IfxGtm_Clk_Out IfxGtm_CLK1_P32_4_OUT
CGM generated clock. More...
IFX_EXTERN IfxGtm_Clk_Out IfxGtm_CLK2_P11_12_OUT
CGM generated clock. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P00_9_IN
IfxGtm_TIM0_0_P00_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P02_0_IN
IfxGtm_TIM0_0_P02_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P10_7_IN
IfxGtm_TIM0_0_P10_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P13_12_IN
IfxGtm_TIM0_0_P13_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P14_5_IN
IfxGtm_TIM0_0_P14_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P14_7_IN
IfxGtm_TIM0_0_P14_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P15_6_IN
IfxGtm_TIM0_0_P15_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P21_2_IN
IfxGtm_TIM0_0_P21_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P22_1_IN
IfxGtm_TIM0_0_P22_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P33_10_IN
IfxGtm_TIM0_0_P33_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P33_4_IN
IfxGtm_TIM0_0_P33_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P00_10_IN
IfxGtm_TIM0_1_P00_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P02_1_IN
IfxGtm_TIM0_1_P02_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P10_1_IN
IfxGtm_TIM0_1_P10_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P10_9_IN
IfxGtm_TIM0_1_P10_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P14_6_IN
IfxGtm_TIM0_1_P14_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P15_7_IN
IfxGtm_TIM0_1_P15_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P21_3_IN
IfxGtm_TIM0_1_P21_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P22_0_IN
IfxGtm_TIM0_1_P22_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P33_5_IN
IfxGtm_TIM0_1_P33_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P33_9_IN
IfxGtm_TIM0_1_P33_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P00_11_IN
IfxGtm_TIM0_2_P00_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P02_2_IN
IfxGtm_TIM0_2_P02_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P02_9_IN
IfxGtm_TIM0_2_P02_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P10_10_IN
IfxGtm_TIM0_2_P10_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P10_2_IN
IfxGtm_TIM0_2_P10_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P10_5_IN
IfxGtm_TIM0_2_P10_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P15_8_IN
IfxGtm_TIM0_2_P15_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P21_4_IN
IfxGtm_TIM0_2_P21_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P23_5_IN
IfxGtm_TIM0_2_P23_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P33_11_IN
IfxGtm_TIM0_2_P33_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P33_6_IN
IfxGtm_TIM0_2_P33_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P00_12_IN
IfxGtm_TIM0_3_P00_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P02_10_IN
IfxGtm_TIM0_3_P02_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P02_3_IN
IfxGtm_TIM0_3_P02_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P10_14_IN
IfxGtm_TIM0_3_P10_14_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P10_3_IN
IfxGtm_TIM0_3_P10_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P10_6_IN
IfxGtm_TIM0_3_P10_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P14_0_IN
IfxGtm_TIM0_3_P14_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P21_5_IN
IfxGtm_TIM0_3_P21_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P22_2_IN
IfxGtm_TIM0_3_P22_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P32_2_IN
IfxGtm_TIM0_3_P32_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P33_7_IN
IfxGtm_TIM0_3_P33_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P02_4_IN
IfxGtm_TIM0_4_P02_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P10_0_IN
IfxGtm_TIM0_4_P10_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P10_13_IN
IfxGtm_TIM0_4_P10_13_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P14_1_IN
IfxGtm_TIM0_4_P14_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P21_6_IN
IfxGtm_TIM0_4_P21_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P22_3_IN
IfxGtm_TIM0_4_P22_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P32_3_IN
IfxGtm_TIM0_4_P32_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P33_0_IN
IfxGtm_TIM0_4_P33_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P33_8_IN
IfxGtm_TIM0_4_P33_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P01_3_IN
IfxGtm_TIM0_5_P01_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P02_5_IN
IfxGtm_TIM0_5_P02_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P10_11_IN
IfxGtm_TIM0_5_P10_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P10_8_IN
IfxGtm_TIM0_5_P10_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P14_2_IN
IfxGtm_TIM0_5_P14_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P21_7_IN
IfxGtm_TIM0_5_P21_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P23_0_IN
IfxGtm_TIM0_5_P23_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P32_4_IN
IfxGtm_TIM0_5_P32_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P33_1_IN
IfxGtm_TIM0_5_P33_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P01_4_IN
IfxGtm_TIM0_6_P01_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P02_6_IN
IfxGtm_TIM0_6_P02_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P10_15_IN
IfxGtm_TIM0_6_P10_15_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P10_4_IN
IfxGtm_TIM0_6_P10_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P14_3_IN
IfxGtm_TIM0_6_P14_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P20_0_IN
IfxGtm_TIM0_6_P20_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P23_1_IN
IfxGtm_TIM0_6_P23_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P23_2_IN
IfxGtm_TIM0_6_P23_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P33_2_IN
IfxGtm_TIM0_6_P33_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P02_11_IN
IfxGtm_TIM0_7_P02_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P02_7_IN
IfxGtm_TIM0_7_P02_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P11_15_IN
IfxGtm_TIM0_7_P11_15_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P14_4_IN
IfxGtm_TIM0_7_P14_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P20_8_IN
IfxGtm_TIM0_7_P20_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P23_3_IN
IfxGtm_TIM0_7_P23_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P23_4_IN
IfxGtm_TIM0_7_P23_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P33_3_IN
IfxGtm_TIM0_7_P33_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P00_9_IN
IfxGtm_TIM1_0_P00_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P02_0_IN
IfxGtm_TIM1_0_P02_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P10_7_IN
IfxGtm_TIM1_0_P10_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P14_5_IN
IfxGtm_TIM1_0_P14_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P14_7_IN
IfxGtm_TIM1_0_P14_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P15_6_IN
IfxGtm_TIM1_0_P15_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P21_2_IN
IfxGtm_TIM1_0_P21_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P22_1_IN
IfxGtm_TIM1_0_P22_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P33_10_IN
IfxGtm_TIM1_0_P33_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P33_4_IN
IfxGtm_TIM1_0_P33_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P00_10_IN
IfxGtm_TIM1_1_P00_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P02_1_IN
IfxGtm_TIM1_1_P02_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P10_1_IN
IfxGtm_TIM1_1_P10_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P14_6_IN
IfxGtm_TIM1_1_P14_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P15_7_IN
IfxGtm_TIM1_1_P15_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P21_3_IN
IfxGtm_TIM1_1_P21_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P22_0_IN
IfxGtm_TIM1_1_P22_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P33_5_IN
IfxGtm_TIM1_1_P33_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P33_9_IN
IfxGtm_TIM1_1_P33_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P00_11_IN
IfxGtm_TIM1_2_P00_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P02_2_IN
IfxGtm_TIM1_2_P02_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P10_2_IN
IfxGtm_TIM1_2_P10_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P10_5_IN
IfxGtm_TIM1_2_P10_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P15_8_IN
IfxGtm_TIM1_2_P15_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P21_4_IN
IfxGtm_TIM1_2_P21_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P23_5_IN
IfxGtm_TIM1_2_P23_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P23_6_IN
IfxGtm_TIM1_2_P23_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P33_11_IN
IfxGtm_TIM1_2_P33_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P33_6_IN
IfxGtm_TIM1_2_P33_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P00_12_IN
IfxGtm_TIM1_3_P00_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P02_3_IN
IfxGtm_TIM1_3_P02_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P10_3_IN
IfxGtm_TIM1_3_P10_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P10_6_IN
IfxGtm_TIM1_3_P10_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P14_0_IN
IfxGtm_TIM1_3_P14_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P21_5_IN
IfxGtm_TIM1_3_P21_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P22_2_IN
IfxGtm_TIM1_3_P22_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P23_7_IN
IfxGtm_TIM1_3_P23_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P32_2_IN
IfxGtm_TIM1_3_P32_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P33_7_IN
IfxGtm_TIM1_3_P33_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P02_4_IN
IfxGtm_TIM1_4_P02_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P10_0_IN
IfxGtm_TIM1_4_P10_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P14_1_IN
IfxGtm_TIM1_4_P14_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P20_0_IN
IfxGtm_TIM1_4_P20_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P21_6_IN
IfxGtm_TIM1_4_P21_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P22_3_IN
IfxGtm_TIM1_4_P22_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P32_3_IN
IfxGtm_TIM1_4_P32_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P33_0_IN
IfxGtm_TIM1_4_P33_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P33_8_IN
IfxGtm_TIM1_4_P33_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P02_5_IN
IfxGtm_TIM1_5_P02_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P10_8_IN
IfxGtm_TIM1_5_P10_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P14_2_IN
IfxGtm_TIM1_5_P14_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P20_7_IN
IfxGtm_TIM1_5_P20_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P21_7_IN
IfxGtm_TIM1_5_P21_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P23_0_IN
IfxGtm_TIM1_5_P23_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P32_4_IN
IfxGtm_TIM1_5_P32_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P33_1_IN
IfxGtm_TIM1_5_P33_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_P02_6_IN
IfxGtm_TIM1_6_P02_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_P10_4_IN
IfxGtm_TIM1_6_P10_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_P14_3_IN
IfxGtm_TIM1_6_P14_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_P20_0_IN
IfxGtm_TIM1_6_P20_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_P23_1_IN
IfxGtm_TIM1_6_P23_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_P23_2_IN
IfxGtm_TIM1_6_P23_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_P33_2_IN
IfxGtm_TIM1_6_P33_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_P02_7_IN
IfxGtm_TIM1_7_P02_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_P14_4_IN
IfxGtm_TIM1_7_P14_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_P20_8_IN
IfxGtm_TIM1_7_P20_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_P23_3_IN
IfxGtm_TIM1_7_P23_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_P23_4_IN
IfxGtm_TIM1_7_P23_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_P33_3_IN
IfxGtm_TIM1_7_P33_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P00_0_IN
IfxGtm_TIM2_0_P00_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P01_3_IN
IfxGtm_TIM2_0_P01_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P02_8_IN
IfxGtm_TIM2_0_P02_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P11_0_IN
IfxGtm_TIM2_0_P11_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P11_10_IN
IfxGtm_TIM2_0_P11_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P13_3_IN
IfxGtm_TIM2_0_P13_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P15_5_IN
IfxGtm_TIM2_0_P15_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P20_12_IN
IfxGtm_TIM2_0_P20_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P31_0_IN
IfxGtm_TIM2_0_P31_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P33_12_IN
IfxGtm_TIM2_0_P33_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P33_14_IN
IfxGtm_TIM2_0_P33_14_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P00_1_IN
IfxGtm_TIM2_1_P00_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P00_2_IN
IfxGtm_TIM2_1_P00_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P01_4_IN
IfxGtm_TIM2_1_P01_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P11_1_IN
IfxGtm_TIM2_1_P11_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P11_2_IN
IfxGtm_TIM2_1_P11_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P15_10_IN
IfxGtm_TIM2_1_P15_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P20_13_IN
IfxGtm_TIM2_1_P20_13_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P31_1_IN
IfxGtm_TIM2_1_P31_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P33_13_IN
IfxGtm_TIM2_1_P33_13_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P33_15_IN
IfxGtm_TIM2_1_P33_15_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P00_3_IN
IfxGtm_TIM2_2_P00_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P01_5_IN
IfxGtm_TIM2_2_P01_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P11_3_IN
IfxGtm_TIM2_2_P11_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P11_4_IN
IfxGtm_TIM2_2_P11_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P14_8_IN
IfxGtm_TIM2_2_P14_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P15_11_IN
IfxGtm_TIM2_2_P15_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P15_6_IN
IfxGtm_TIM2_2_P15_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P20_14_IN
IfxGtm_TIM2_2_P20_14_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P31_2_IN
IfxGtm_TIM2_2_P31_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P32_0_IN
IfxGtm_TIM2_2_P32_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P00_4_IN
IfxGtm_TIM2_3_P00_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P01_5_IN
IfxGtm_TIM2_3_P01_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P11_5_IN
IfxGtm_TIM2_3_P11_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P11_6_IN
IfxGtm_TIM2_3_P11_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P14_9_IN
IfxGtm_TIM2_3_P14_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P15_0_IN
IfxGtm_TIM2_3_P15_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P15_12_IN
IfxGtm_TIM2_3_P15_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P20_1_IN
IfxGtm_TIM2_3_P20_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P31_3_IN
IfxGtm_TIM2_3_P31_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P34_1_IN
IfxGtm_TIM2_3_P34_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P00_5_IN
IfxGtm_TIM2_4_P00_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P02_14_IN
IfxGtm_TIM2_4_P02_14_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P11_7_IN
IfxGtm_TIM2_4_P11_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P11_9_IN
IfxGtm_TIM2_4_P11_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P14_10_IN
IfxGtm_TIM2_4_P14_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P15_13_IN
IfxGtm_TIM2_4_P15_13_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P15_1_IN
IfxGtm_TIM2_4_P15_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P20_3_IN
IfxGtm_TIM2_4_P20_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P21_0_IN
IfxGtm_TIM2_4_P21_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P31_4_IN
IfxGtm_TIM2_4_P31_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P34_2_IN
IfxGtm_TIM2_4_P34_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P00_6_IN
IfxGtm_TIM2_5_P00_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P01_6_IN
IfxGtm_TIM2_5_P01_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P02_15_IN
IfxGtm_TIM2_5_P02_15_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P11_10_IN
IfxGtm_TIM2_5_P11_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P11_8_IN
IfxGtm_TIM2_5_P11_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P13_0_IN
IfxGtm_TIM2_5_P13_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P15_14_IN
IfxGtm_TIM2_5_P15_14_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P15_2_IN
IfxGtm_TIM2_5_P15_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P20_9_IN
IfxGtm_TIM2_5_P20_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P21_1_IN
IfxGtm_TIM2_5_P21_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P31_5_IN
IfxGtm_TIM2_5_P31_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P34_3_IN
IfxGtm_TIM2_5_P34_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P00_7_IN
IfxGtm_TIM2_6_P00_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P01_0_IN
IfxGtm_TIM2_6_P01_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P11_11_IN
IfxGtm_TIM2_6_P11_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P11_13_IN
IfxGtm_TIM2_6_P11_13_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P13_1_IN
IfxGtm_TIM2_6_P13_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P15_15_IN
IfxGtm_TIM2_6_P15_15_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P15_3_IN
IfxGtm_TIM2_6_P15_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P20_10_IN
IfxGtm_TIM2_6_P20_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P20_6_IN
IfxGtm_TIM2_6_P20_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P22_6_IN
IfxGtm_TIM2_6_P22_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P31_6_IN
IfxGtm_TIM2_6_P31_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P34_4_IN
IfxGtm_TIM2_6_P34_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P00_8_IN
IfxGtm_TIM2_7_P00_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P01_7_IN
IfxGtm_TIM2_7_P01_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P11_12_IN
IfxGtm_TIM2_7_P11_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P11_14_IN
IfxGtm_TIM2_7_P11_14_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P13_2_IN
IfxGtm_TIM2_7_P13_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P13_9_IN
IfxGtm_TIM2_7_P13_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P15_4_IN
IfxGtm_TIM2_7_P15_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P20_11_IN
IfxGtm_TIM2_7_P20_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P20_7_IN
IfxGtm_TIM2_7_P20_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P31_7_IN
IfxGtm_TIM2_7_P31_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P34_5_IN
IfxGtm_TIM2_7_P34_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P00_0_IN
IfxGtm_TIM3_0_P00_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P00_5_IN
IfxGtm_TIM3_0_P00_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P02_6_IN
IfxGtm_TIM3_0_P02_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P02_8_IN
IfxGtm_TIM3_0_P02_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P11_11_IN
IfxGtm_TIM3_0_P11_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P12_0_IN
IfxGtm_TIM3_0_P12_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P13_11_IN
IfxGtm_TIM3_0_P13_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P13_3_IN
IfxGtm_TIM3_0_P13_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P15_5_IN
IfxGtm_TIM3_0_P15_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P20_12_IN
IfxGtm_TIM3_0_P20_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P22_4_IN
IfxGtm_TIM3_0_P22_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P25_0_IN
IfxGtm_TIM3_0_P25_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P33_0_IN
IfxGtm_TIM3_0_P33_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P33_12_IN
IfxGtm_TIM3_0_P33_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P00_1_IN
IfxGtm_TIM3_1_P00_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P00_2_IN
IfxGtm_TIM3_1_P00_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P00_6_IN
IfxGtm_TIM3_1_P00_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P02_7_IN
IfxGtm_TIM3_1_P02_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P11_2_IN
IfxGtm_TIM3_1_P11_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P12_1_IN
IfxGtm_TIM3_1_P12_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P13_10_IN
IfxGtm_TIM3_1_P13_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P14_11_IN
IfxGtm_TIM3_1_P14_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P20_13_IN
IfxGtm_TIM3_1_P20_13_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P22_5_IN
IfxGtm_TIM3_1_P22_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P25_1_IN
IfxGtm_TIM3_1_P25_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P33_13_IN
IfxGtm_TIM3_1_P33_13_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P33_1_IN
IfxGtm_TIM3_1_P33_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P00_3_IN
IfxGtm_TIM3_2_P00_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P00_7_IN
IfxGtm_TIM3_2_P00_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P02_8_IN
IfxGtm_TIM3_2_P02_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P11_3_IN
IfxGtm_TIM3_2_P11_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P13_14_IN
IfxGtm_TIM3_2_P13_14_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P14_14_IN
IfxGtm_TIM3_2_P14_14_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P14_8_IN
IfxGtm_TIM3_2_P14_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P20_14_IN
IfxGtm_TIM3_2_P20_14_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P22_6_IN
IfxGtm_TIM3_2_P22_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P25_2_IN
IfxGtm_TIM3_2_P25_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P32_0_IN
IfxGtm_TIM3_2_P32_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P33_2_IN
IfxGtm_TIM3_2_P33_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P00_4_IN
IfxGtm_TIM3_3_P00_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P00_8_IN
IfxGtm_TIM3_3_P00_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P02_9_IN
IfxGtm_TIM3_3_P02_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P11_6_IN
IfxGtm_TIM3_3_P11_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P13_4_IN
IfxGtm_TIM3_3_P13_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P14_13_IN
IfxGtm_TIM3_3_P14_13_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P14_9_IN
IfxGtm_TIM3_3_P14_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P15_0_IN
IfxGtm_TIM3_3_P15_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P20_1_IN
IfxGtm_TIM3_3_P20_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P22_7_IN
IfxGtm_TIM3_3_P22_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P25_3_IN
IfxGtm_TIM3_3_P25_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P32_1_IN
IfxGtm_TIM3_3_P32_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P33_3_IN
IfxGtm_TIM3_3_P33_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P00_5_IN
IfxGtm_TIM3_4_P00_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P02_10_IN
IfxGtm_TIM3_4_P02_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P11_9_IN
IfxGtm_TIM3_4_P11_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P13_5_IN
IfxGtm_TIM3_4_P13_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P14_10_IN
IfxGtm_TIM3_4_P14_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P14_12_IN
IfxGtm_TIM3_4_P14_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P15_1_IN
IfxGtm_TIM3_4_P15_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P20_3_IN
IfxGtm_TIM3_4_P20_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P21_0_IN
IfxGtm_TIM3_4_P21_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P22_8_IN
IfxGtm_TIM3_4_P22_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P25_4_IN
IfxGtm_TIM3_4_P25_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P34_1_IN
IfxGtm_TIM3_4_P34_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P00_6_IN
IfxGtm_TIM3_5_P00_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P02_11_IN
IfxGtm_TIM3_5_P02_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P11_10_IN
IfxGtm_TIM3_5_P11_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P13_0_IN
IfxGtm_TIM3_5_P13_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P13_13_IN
IfxGtm_TIM3_5_P13_13_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P13_6_IN
IfxGtm_TIM3_5_P13_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P15_2_IN
IfxGtm_TIM3_5_P15_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P20_9_IN
IfxGtm_TIM3_5_P20_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P21_1_IN
IfxGtm_TIM3_5_P21_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P22_9_IN
IfxGtm_TIM3_5_P22_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P25_5_IN
IfxGtm_TIM3_5_P25_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P32_5_IN
IfxGtm_TIM3_5_P32_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P34_2_IN
IfxGtm_TIM3_5_P34_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P00_7_IN
IfxGtm_TIM3_6_P00_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P02_12_IN
IfxGtm_TIM3_6_P02_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P11_11_IN
IfxGtm_TIM3_6_P11_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P13_1_IN
IfxGtm_TIM3_6_P13_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P13_7_IN
IfxGtm_TIM3_6_P13_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P14_15_IN
IfxGtm_TIM3_6_P14_15_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P15_3_IN
IfxGtm_TIM3_6_P15_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P20_10_IN
IfxGtm_TIM3_6_P20_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P20_6_IN
IfxGtm_TIM3_6_P20_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P22_10_IN
IfxGtm_TIM3_6_P22_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P25_6_IN
IfxGtm_TIM3_6_P25_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P26_0_IN
IfxGtm_TIM3_6_P26_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P32_6_IN
IfxGtm_TIM3_6_P32_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P34_3_IN
IfxGtm_TIM3_6_P34_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P00_8_IN
IfxGtm_TIM3_7_P00_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P02_13_IN
IfxGtm_TIM3_7_P02_13_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P11_12_IN
IfxGtm_TIM3_7_P11_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P13_15_IN
IfxGtm_TIM3_7_P13_15_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P13_2_IN
IfxGtm_TIM3_7_P13_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P15_4_IN
IfxGtm_TIM3_7_P15_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P20_11_IN
IfxGtm_TIM3_7_P20_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P20_7_IN
IfxGtm_TIM3_7_P20_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P22_11_IN
IfxGtm_TIM3_7_P22_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P25_7_IN
IfxGtm_TIM3_7_P25_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P32_7_IN
IfxGtm_TIM3_7_P32_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P34_4_IN
IfxGtm_TIM3_7_P34_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P00_13_IN
IfxGtm_TIM4_0_P00_13_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P00_9_IN
IfxGtm_TIM4_0_P00_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P01_12_IN
IfxGtm_TIM4_0_P01_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P02_12_IN
IfxGtm_TIM4_0_P02_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P10_0_IN
IfxGtm_TIM4_0_P10_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P10_8_IN
IfxGtm_TIM4_0_P10_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P11_0_IN
IfxGtm_TIM4_0_P11_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P12_0_IN
IfxGtm_TIM4_0_P12_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P13_12_IN
IfxGtm_TIM4_0_P13_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P21_0_IN
IfxGtm_TIM4_0_P21_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P24_0_IN
IfxGtm_TIM4_0_P24_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P25_8_IN
IfxGtm_TIM4_0_P25_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P30_0_IN
IfxGtm_TIM4_0_P30_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P32_7_IN
IfxGtm_TIM4_0_P32_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P00_10_IN
IfxGtm_TIM4_1_P00_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P00_15_IN
IfxGtm_TIM4_1_P00_15_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P01_1_IN
IfxGtm_TIM4_1_P01_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P02_15_IN
IfxGtm_TIM4_1_P02_15_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P10_9_IN
IfxGtm_TIM4_1_P10_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P11_1_IN
IfxGtm_TIM4_1_P11_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P12_1_IN
IfxGtm_TIM4_1_P12_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P15_10_IN
IfxGtm_TIM4_1_P15_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P21_1_IN
IfxGtm_TIM4_1_P21_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P24_1_IN
IfxGtm_TIM4_1_P24_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P25_9_IN
IfxGtm_TIM4_1_P25_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P30_1_IN
IfxGtm_TIM4_1_P30_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P32_5_IN
IfxGtm_TIM4_1_P32_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P00_11_IN
IfxGtm_TIM4_2_P00_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P01_9_IN
IfxGtm_TIM4_2_P01_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P02_13_IN
IfxGtm_TIM4_2_P02_13_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P02_9_IN
IfxGtm_TIM4_2_P02_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P10_10_IN
IfxGtm_TIM4_2_P10_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P10_6_IN
IfxGtm_TIM4_2_P10_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P11_4_IN
IfxGtm_TIM4_2_P11_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P15_11_IN
IfxGtm_TIM4_2_P15_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P21_6_IN
IfxGtm_TIM4_2_P21_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P23_6_IN
IfxGtm_TIM4_2_P23_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P24_2_IN
IfxGtm_TIM4_2_P24_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P25_10_IN
IfxGtm_TIM4_2_P25_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P30_2_IN
IfxGtm_TIM4_2_P30_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P00_12_IN
IfxGtm_TIM4_3_P00_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P01_13_IN
IfxGtm_TIM4_3_P01_13_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P02_10_IN
IfxGtm_TIM4_3_P02_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P02_14_IN
IfxGtm_TIM4_3_P02_14_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P10_14_IN
IfxGtm_TIM4_3_P10_14_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P10_5_IN
IfxGtm_TIM4_3_P10_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P11_5_IN
IfxGtm_TIM4_3_P11_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P15_12_IN
IfxGtm_TIM4_3_P15_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P21_7_IN
IfxGtm_TIM4_3_P21_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P23_7_IN
IfxGtm_TIM4_3_P23_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P24_3_IN
IfxGtm_TIM4_3_P24_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P25_11_IN
IfxGtm_TIM4_3_P25_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P30_3_IN
IfxGtm_TIM4_3_P30_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P01_0_IN
IfxGtm_TIM4_4_P01_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P01_8_IN
IfxGtm_TIM4_4_P01_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P02_11_IN
IfxGtm_TIM4_4_P02_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P10_13_IN
IfxGtm_TIM4_4_P10_13_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P10_1_IN
IfxGtm_TIM4_4_P10_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P11_7_IN
IfxGtm_TIM4_4_P11_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P15_13_IN
IfxGtm_TIM4_4_P15_13_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P20_1_IN
IfxGtm_TIM4_4_P20_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P24_4_IN
IfxGtm_TIM4_4_P24_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P25_12_IN
IfxGtm_TIM4_4_P25_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P30_4_IN
IfxGtm_TIM4_4_P30_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P32_6_IN
IfxGtm_TIM4_4_P32_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P33_10_IN
IfxGtm_TIM4_4_P33_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P33_4_IN
IfxGtm_TIM4_4_P33_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P01_10_IN
IfxGtm_TIM4_5_P01_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P01_2_IN
IfxGtm_TIM4_5_P01_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P01_3_IN
IfxGtm_TIM4_5_P01_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P10_11_IN
IfxGtm_TIM4_5_P10_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P10_2_IN
IfxGtm_TIM4_5_P10_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P11_8_IN
IfxGtm_TIM4_5_P11_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P15_14_IN
IfxGtm_TIM4_5_P15_14_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P20_3_IN
IfxGtm_TIM4_5_P20_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P24_5_IN
IfxGtm_TIM4_5_P24_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P25_13_IN
IfxGtm_TIM4_5_P25_13_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P30_5_IN
IfxGtm_TIM4_5_P30_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P33_14_IN
IfxGtm_TIM4_5_P33_14_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P33_5_IN
IfxGtm_TIM4_5_P33_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P01_14_IN
IfxGtm_TIM4_6_P01_14_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P01_15_IN
IfxGtm_TIM4_6_P01_15_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P01_4_IN
IfxGtm_TIM4_6_P01_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P10_15_IN
IfxGtm_TIM4_6_P10_15_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P10_3_IN
IfxGtm_TIM4_6_P10_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P11_13_IN
IfxGtm_TIM4_6_P11_13_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P15_15_IN
IfxGtm_TIM4_6_P15_15_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P24_6_IN
IfxGtm_TIM4_6_P24_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P25_14_IN
IfxGtm_TIM4_6_P25_14_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P30_6_IN
IfxGtm_TIM4_6_P30_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P33_15_IN
IfxGtm_TIM4_6_P33_15_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P00_14_IN
IfxGtm_TIM4_7_P00_14_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P01_11_IN
IfxGtm_TIM4_7_P01_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P10_4_IN
IfxGtm_TIM4_7_P10_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P11_14_IN
IfxGtm_TIM4_7_P11_14_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P11_15_IN
IfxGtm_TIM4_7_P11_15_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P13_9_IN
IfxGtm_TIM4_7_P13_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P14_7_IN
IfxGtm_TIM4_7_P14_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P24_7_IN
IfxGtm_TIM4_7_P24_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P25_15_IN
IfxGtm_TIM4_7_P25_15_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P30_7_IN
IfxGtm_TIM4_7_P30_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P34_5_IN
IfxGtm_TIM4_7_P34_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P00_13_IN
IfxGtm_TIM5_0_P00_13_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P01_12_IN
IfxGtm_TIM5_0_P01_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P01_8_IN
IfxGtm_TIM5_0_P01_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P02_12_IN
IfxGtm_TIM5_0_P02_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P13_11_IN
IfxGtm_TIM5_0_P13_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P22_8_IN
IfxGtm_TIM5_0_P22_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P24_8_IN
IfxGtm_TIM5_0_P24_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P30_8_IN
IfxGtm_TIM5_0_P30_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P31_8_IN
IfxGtm_TIM5_0_P31_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P33_14_IN
IfxGtm_TIM5_0_P33_14_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P00_15_IN
IfxGtm_TIM5_1_P00_15_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P01_1_IN
IfxGtm_TIM5_1_P01_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P01_9_IN
IfxGtm_TIM5_1_P01_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P02_15_IN
IfxGtm_TIM5_1_P02_15_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P13_10_IN
IfxGtm_TIM5_1_P13_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P14_11_IN
IfxGtm_TIM5_1_P14_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P22_9_IN
IfxGtm_TIM5_1_P22_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P24_9_IN
IfxGtm_TIM5_1_P24_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P30_9_IN
IfxGtm_TIM5_1_P30_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P31_9_IN
IfxGtm_TIM5_1_P31_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P33_15_IN
IfxGtm_TIM5_1_P33_15_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P01_10_IN
IfxGtm_TIM5_2_P01_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P01_9_IN
IfxGtm_TIM5_2_P01_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P02_13_IN
IfxGtm_TIM5_2_P02_13_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P13_14_IN
IfxGtm_TIM5_2_P13_14_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P14_14_IN
IfxGtm_TIM5_2_P14_14_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P22_10_IN
IfxGtm_TIM5_2_P22_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P24_10_IN
IfxGtm_TIM5_2_P24_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P30_10_IN
IfxGtm_TIM5_2_P30_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P31_10_IN
IfxGtm_TIM5_2_P31_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P01_11_IN
IfxGtm_TIM5_3_P01_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P01_13_IN
IfxGtm_TIM5_3_P01_13_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P01_5_IN
IfxGtm_TIM5_3_P01_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P02_14_IN
IfxGtm_TIM5_3_P02_14_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P13_4_IN
IfxGtm_TIM5_3_P13_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P14_13_IN
IfxGtm_TIM5_3_P14_13_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P22_11_IN
IfxGtm_TIM5_3_P22_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P24_11_IN
IfxGtm_TIM5_3_P24_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P30_11_IN
IfxGtm_TIM5_3_P30_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P31_11_IN
IfxGtm_TIM5_3_P31_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P34_1_IN
IfxGtm_TIM5_3_P34_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P00_0_IN
IfxGtm_TIM5_4_P00_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P01_0_IN
IfxGtm_TIM5_4_P01_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P01_8_IN
IfxGtm_TIM5_4_P01_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P13_5_IN
IfxGtm_TIM5_4_P13_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P14_12_IN
IfxGtm_TIM5_4_P14_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P21_2_IN
IfxGtm_TIM5_4_P21_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P24_12_IN
IfxGtm_TIM5_4_P24_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P30_12_IN
IfxGtm_TIM5_4_P30_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P31_12_IN
IfxGtm_TIM5_4_P31_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P34_2_IN
IfxGtm_TIM5_4_P34_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P00_1_IN
IfxGtm_TIM5_5_P00_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P01_10_IN
IfxGtm_TIM5_5_P01_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P01_2_IN
IfxGtm_TIM5_5_P01_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P01_6_IN
IfxGtm_TIM5_5_P01_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P13_13_IN
IfxGtm_TIM5_5_P13_13_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P13_6_IN
IfxGtm_TIM5_5_P13_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P21_3_IN
IfxGtm_TIM5_5_P21_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P24_13_IN
IfxGtm_TIM5_5_P24_13_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P30_13_IN
IfxGtm_TIM5_5_P30_13_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P31_13_IN
IfxGtm_TIM5_5_P31_13_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P32_5_IN
IfxGtm_TIM5_5_P32_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P34_3_IN
IfxGtm_TIM5_5_P34_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P00_2_IN
IfxGtm_TIM5_6_P00_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P01_14_IN
IfxGtm_TIM5_6_P01_14_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P01_15_IN
IfxGtm_TIM5_6_P01_15_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P01_6_IN
IfxGtm_TIM5_6_P01_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P13_7_IN
IfxGtm_TIM5_6_P13_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P14_15_IN
IfxGtm_TIM5_6_P14_15_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P21_4_IN
IfxGtm_TIM5_6_P21_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P24_14_IN
IfxGtm_TIM5_6_P24_14_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P30_14_IN
IfxGtm_TIM5_6_P30_14_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P31_14_IN
IfxGtm_TIM5_6_P31_14_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P32_6_IN
IfxGtm_TIM5_6_P32_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P34_4_IN
IfxGtm_TIM5_6_P34_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P00_14_IN
IfxGtm_TIM5_7_P00_14_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P00_3_IN
IfxGtm_TIM5_7_P00_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P01_11_IN
IfxGtm_TIM5_7_P01_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P01_7_IN
IfxGtm_TIM5_7_P01_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P13_15_IN
IfxGtm_TIM5_7_P13_15_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P21_5_IN
IfxGtm_TIM5_7_P21_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P24_15_IN
IfxGtm_TIM5_7_P24_15_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P30_15_IN
IfxGtm_TIM5_7_P30_15_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P31_15_IN
IfxGtm_TIM5_7_P31_15_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P32_7_IN
IfxGtm_TIM5_7_P32_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P34_5_IN
IfxGtm_TIM5_7_P34_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P01_12_IN
IfxGtm_TIM6_0_P01_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P10_9_IN
IfxGtm_TIM6_0_P10_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P13_4_IN
IfxGtm_TIM6_0_P13_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P20_6_IN
IfxGtm_TIM6_0_P20_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P23_7_IN
IfxGtm_TIM6_0_P23_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P24_0_IN
IfxGtm_TIM6_0_P24_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P25_0_IN
IfxGtm_TIM6_0_P25_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P30_8_IN
IfxGtm_TIM6_0_P30_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P31_8_IN
IfxGtm_TIM6_0_P31_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P01_13_IN
IfxGtm_TIM6_1_P01_13_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P10_10_IN
IfxGtm_TIM6_1_P10_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P13_5_IN
IfxGtm_TIM6_1_P13_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P20_7_IN
IfxGtm_TIM6_1_P20_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P23_6_IN
IfxGtm_TIM6_1_P23_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P24_1_IN
IfxGtm_TIM6_1_P24_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P25_1_IN
IfxGtm_TIM6_1_P25_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P30_9_IN
IfxGtm_TIM6_1_P30_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P31_9_IN
IfxGtm_TIM6_1_P31_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P01_14_IN
IfxGtm_TIM6_2_P01_14_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P10_11_IN
IfxGtm_TIM6_2_P10_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P13_6_IN
IfxGtm_TIM6_2_P13_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P20_8_IN
IfxGtm_TIM6_2_P20_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P23_5_IN
IfxGtm_TIM6_2_P23_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P24_2_IN
IfxGtm_TIM6_2_P24_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P25_2_IN
IfxGtm_TIM6_2_P25_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P30_10_IN
IfxGtm_TIM6_2_P30_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P31_10_IN
IfxGtm_TIM6_2_P31_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P01_15_IN
IfxGtm_TIM6_3_P01_15_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P10_13_IN
IfxGtm_TIM6_3_P10_13_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P13_7_IN
IfxGtm_TIM6_3_P13_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P20_9_IN
IfxGtm_TIM6_3_P20_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P23_4_IN
IfxGtm_TIM6_3_P23_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P24_3_IN
IfxGtm_TIM6_3_P24_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P25_3_IN
IfxGtm_TIM6_3_P25_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P30_11_IN
IfxGtm_TIM6_3_P30_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P31_11_IN
IfxGtm_TIM6_3_P31_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P00_4_IN
IfxGtm_TIM6_4_P00_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P13_9_IN
IfxGtm_TIM6_4_P13_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P14_12_IN
IfxGtm_TIM6_4_P14_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P23_3_IN
IfxGtm_TIM6_4_P23_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P24_4_IN
IfxGtm_TIM6_4_P24_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P25_4_IN
IfxGtm_TIM6_4_P25_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P30_12_IN
IfxGtm_TIM6_4_P30_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P31_12_IN
IfxGtm_TIM6_4_P31_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P00_13_IN
IfxGtm_TIM6_5_P00_13_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P13_10_IN
IfxGtm_TIM6_5_P13_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P14_13_IN
IfxGtm_TIM6_5_P14_13_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P23_2_IN
IfxGtm_TIM6_5_P23_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P24_5_IN
IfxGtm_TIM6_5_P24_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P25_5_IN
IfxGtm_TIM6_5_P25_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P30_13_IN
IfxGtm_TIM6_5_P30_13_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P31_13_IN
IfxGtm_TIM6_5_P31_13_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P00_14_IN
IfxGtm_TIM6_6_P00_14_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P13_11_IN
IfxGtm_TIM6_6_P13_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P14_14_IN
IfxGtm_TIM6_6_P14_14_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P23_1_IN
IfxGtm_TIM6_6_P23_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P24_6_IN
IfxGtm_TIM6_6_P24_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P25_6_IN
IfxGtm_TIM6_6_P25_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P26_0_IN
IfxGtm_TIM6_6_P26_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P30_14_IN
IfxGtm_TIM6_6_P30_14_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P31_14_IN
IfxGtm_TIM6_6_P31_14_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P00_15_IN
IfxGtm_TIM6_7_P00_15_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P13_12_IN
IfxGtm_TIM6_7_P13_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P14_15_IN
IfxGtm_TIM6_7_P14_15_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P23_0_IN
IfxGtm_TIM6_7_P23_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P24_7_IN
IfxGtm_TIM6_7_P24_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P25_7_IN
IfxGtm_TIM6_7_P25_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P30_15_IN
IfxGtm_TIM6_7_P30_15_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P31_15_IN
IfxGtm_TIM6_7_P31_15_IN. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT106_P10_4_OUT
IfxGtm_TOM0_0N_TOUT106_P10_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT17_P00_8_OUT
IfxGtm_TOM0_0N_TOUT17_P00_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT25_P33_3_OUT
IfxGtm_TOM0_0N_TOUT25_P33_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT34_P33_12_OUT
IfxGtm_TOM0_0N_TOUT34_P33_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT51_P21_0_OUT
IfxGtm_TOM0_0N_TOUT51_P21_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT61_P20_3_OUT
IfxGtm_TOM0_0N_TOUT61_P20_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT72_P15_1_OUT
IfxGtm_TOM0_0N_TOUT72_P15_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT7_P02_7_OUT
IfxGtm_TOM0_0N_TOUT7_P02_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT91_P13_0_OUT
IfxGtm_TOM0_0N_TOUT91_P13_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT9_P00_0_OUT
IfxGtm_TOM0_0N_TOUT9_P00_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT0_P02_0_OUT
IfxGtm_TOM0_0_TOUT0_P02_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT109_P10_7_OUT
IfxGtm_TOM0_0_TOUT109_P10_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT151_P02_12_OUT
IfxGtm_TOM0_0_TOUT151_P02_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT18_P00_9_OUT
IfxGtm_TOM0_0_TOUT18_P00_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT26_P33_4_OUT
IfxGtm_TOM0_0_TOUT26_P33_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT32_P33_10_OUT
IfxGtm_TOM0_0_TOUT32_P33_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT53_P21_2_OUT
IfxGtm_TOM0_0_TOUT53_P21_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT76_P15_5_OUT
IfxGtm_TOM0_0_TOUT76_P15_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT77_P15_6_OUT
IfxGtm_TOM0_0_TOUT77_P15_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT85_P14_5_OUT
IfxGtm_TOM0_0_TOUT85_P14_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT87_P14_7_OUT
IfxGtm_TOM0_0_TOUT87_P14_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT12_P00_3_OUT
IfxGtm_TOM0_10_TOUT12_P00_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT2_P02_2_OUT
IfxGtm_TOM0_10_TOUT2_P02_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT41_P23_0_OUT
IfxGtm_TOM0_10_TOUT41_P23_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT46_P23_5_OUT
IfxGtm_TOM0_10_TOUT46_P23_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT96_P11_3_OUT
IfxGtm_TOM0_10_TOUT96_P11_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT13_P00_4_OUT
IfxGtm_TOM0_11_TOUT13_P00_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT3_P02_3_OUT
IfxGtm_TOM0_11_TOUT3_P02_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT43_P23_2_OUT
IfxGtm_TOM0_11_TOUT43_P23_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT49_P22_2_OUT
IfxGtm_TOM0_11_TOUT49_P22_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT97_P11_6_OUT
IfxGtm_TOM0_11_TOUT97_P11_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT14_P00_5_OUT
IfxGtm_TOM0_12_TOUT14_P00_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT44_P23_3_OUT
IfxGtm_TOM0_12_TOUT44_P23_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT4_P02_4_OUT
IfxGtm_TOM0_12_TOUT4_P02_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT50_P22_3_OUT
IfxGtm_TOM0_12_TOUT50_P22_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT98_P11_9_OUT
IfxGtm_TOM0_12_TOUT98_P11_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT15_P00_6_OUT
IfxGtm_TOM0_13_TOUT15_P00_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT5_P02_5_OUT
IfxGtm_TOM0_13_TOUT5_P02_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT99_P11_10_OUT
IfxGtm_TOM0_13_TOUT99_P11_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT100_P11_11_OUT
IfxGtm_TOM0_14_TOUT100_P11_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT16_P00_7_OUT
IfxGtm_TOM0_14_TOUT16_P00_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT6_P02_6_OUT
IfxGtm_TOM0_14_TOUT6_P02_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT101_P11_12_OUT
IfxGtm_TOM0_15_TOUT101_P11_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT17_P00_8_OUT
IfxGtm_TOM0_15_TOUT17_P00_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT42_P23_1_OUT
IfxGtm_TOM0_15_TOUT42_P23_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT7_P02_7_OUT
IfxGtm_TOM0_15_TOUT7_P02_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT107_P10_5_OUT
IfxGtm_TOM0_1N_TOUT107_P10_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT10_P00_1_OUT
IfxGtm_TOM0_1N_TOUT10_P00_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT14_P00_5_OUT
IfxGtm_TOM0_1N_TOUT14_P00_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT22_P33_0_OUT
IfxGtm_TOM0_1N_TOUT22_P33_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT30_P33_8_OUT
IfxGtm_TOM0_1N_TOUT30_P33_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT35_P33_13_OUT
IfxGtm_TOM0_1N_TOUT35_P33_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT39_P32_3_OUT
IfxGtm_TOM0_1N_TOUT39_P32_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT4_P02_4_OUT
IfxGtm_TOM0_1N_TOUT4_P02_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT52_P21_1_OUT
IfxGtm_TOM0_1N_TOUT52_P21_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT57_P21_6_OUT
IfxGtm_TOM0_1N_TOUT57_P21_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT73_P15_2_OUT
IfxGtm_TOM0_1N_TOUT73_P15_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT90_P14_10_OUT
IfxGtm_TOM0_1N_TOUT90_P14_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT92_P13_1_OUT
IfxGtm_TOM0_1N_TOUT92_P13_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT103_P10_1_OUT
IfxGtm_TOM0_1_TOUT103_P10_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT116_P02_9_OUT
IfxGtm_TOM0_1_TOUT116_P02_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT19_P00_10_OUT
IfxGtm_TOM0_1_TOUT19_P00_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT1_P02_1_OUT
IfxGtm_TOM0_1_TOUT1_P02_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT27_P33_5_OUT
IfxGtm_TOM0_1_TOUT27_P33_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT31_P33_9_OUT
IfxGtm_TOM0_1_TOUT31_P33_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT54_P21_3_OUT
IfxGtm_TOM0_1_TOUT54_P21_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT78_P15_7_OUT
IfxGtm_TOM0_1_TOUT78_P15_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT86_P14_6_OUT
IfxGtm_TOM0_1_TOUT86_P14_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT108_P10_6_OUT
IfxGtm_TOM0_2N_TOUT108_P10_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT11_P00_2_OUT
IfxGtm_TOM0_2N_TOUT11_P00_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT143_P33_14_OUT
IfxGtm_TOM0_2N_TOUT143_P33_14_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT15_P00_6_OUT
IfxGtm_TOM0_2N_TOUT15_P00_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT23_P33_1_OUT
IfxGtm_TOM0_2N_TOUT23_P33_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT40_P32_4_OUT
IfxGtm_TOM0_2N_TOUT40_P32_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT58_P21_7_OUT
IfxGtm_TOM0_2N_TOUT58_P21_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT5_P02_5_OUT
IfxGtm_TOM0_2N_TOUT5_P02_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT74_P15_3_OUT
IfxGtm_TOM0_2N_TOUT74_P15_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT93_P13_2_OUT
IfxGtm_TOM0_2N_TOUT93_P13_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT104_P10_2_OUT
IfxGtm_TOM0_2_TOUT104_P10_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT107_P10_5_OUT
IfxGtm_TOM0_2_TOUT107_P10_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT117_P02_10_OUT
IfxGtm_TOM0_2_TOUT117_P02_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT20_P00_11_OUT
IfxGtm_TOM0_2_TOUT20_P00_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT28_P33_6_OUT
IfxGtm_TOM0_2_TOUT28_P33_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT2_P02_2_OUT
IfxGtm_TOM0_2_TOUT2_P02_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT33_P33_11_OUT
IfxGtm_TOM0_2_TOUT33_P33_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT55_P21_4_OUT
IfxGtm_TOM0_2_TOUT55_P21_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT79_P15_8_OUT
IfxGtm_TOM0_2_TOUT79_P15_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT88_P14_8_OUT
IfxGtm_TOM0_2_TOUT88_P14_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT109_P10_7_OUT
IfxGtm_TOM0_3N_TOUT109_P10_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT12_P00_3_OUT
IfxGtm_TOM0_3N_TOUT12_P00_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT144_P33_15_OUT
IfxGtm_TOM0_3N_TOUT144_P33_15_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT16_P00_7_OUT
IfxGtm_TOM0_3N_TOUT16_P00_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT24_P33_2_OUT
IfxGtm_TOM0_3N_TOUT24_P33_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT42_P23_1_OUT
IfxGtm_TOM0_3N_TOUT42_P23_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT59_P20_0_OUT
IfxGtm_TOM0_3N_TOUT59_P20_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT60_P20_1_OUT
IfxGtm_TOM0_3N_TOUT60_P20_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT6_P02_6_OUT
IfxGtm_TOM0_3N_TOUT6_P02_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT75_P15_4_OUT
IfxGtm_TOM0_3N_TOUT75_P15_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT94_P13_3_OUT
IfxGtm_TOM0_3N_TOUT94_P13_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT105_P10_3_OUT
IfxGtm_TOM0_3_TOUT105_P10_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT108_P10_6_OUT
IfxGtm_TOM0_3_TOUT108_P10_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT118_P02_11_OUT
IfxGtm_TOM0_3_TOUT118_P02_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT21_P00_12_OUT
IfxGtm_TOM0_3_TOUT21_P00_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT29_P33_7_OUT
IfxGtm_TOM0_3_TOUT29_P33_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT38_P32_2_OUT
IfxGtm_TOM0_3_TOUT38_P32_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT3_P02_3_OUT
IfxGtm_TOM0_3_TOUT3_P02_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT56_P21_5_OUT
IfxGtm_TOM0_3_TOUT56_P21_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT71_P15_0_OUT
IfxGtm_TOM0_3_TOUT71_P15_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT80_P14_0_OUT
IfxGtm_TOM0_3_TOUT80_P14_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT89_P14_9_OUT
IfxGtm_TOM0_3_TOUT89_P14_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT10_P00_1_OUT
IfxGtm_TOM0_4N_TOUT10_P00_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT143_P33_14_OUT
IfxGtm_TOM0_4N_TOUT143_P33_14_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT147_P34_2_OUT
IfxGtm_TOM0_4N_TOUT147_P34_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT1_P02_1_OUT
IfxGtm_TOM0_4N_TOUT1_P02_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT29_P33_7_OUT
IfxGtm_TOM0_4N_TOUT29_P33_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT36_P32_0_OUT
IfxGtm_TOM0_4N_TOUT36_P32_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT54_P21_3_OUT
IfxGtm_TOM0_4N_TOUT54_P21_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT56_P21_5_OUT
IfxGtm_TOM0_4N_TOUT56_P21_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT65_P20_9_OUT
IfxGtm_TOM0_4N_TOUT65_P20_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT73_P15_2_OUT
IfxGtm_TOM0_4N_TOUT73_P15_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT89_P14_9_OUT
IfxGtm_TOM0_4N_TOUT89_P14_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT8_P02_8_OUT
IfxGtm_TOM0_4N_TOUT8_P02_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT95_P11_2_OUT
IfxGtm_TOM0_4N_TOUT95_P11_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT96_P11_3_OUT
IfxGtm_TOM0_4N_TOUT96_P11_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT0_P02_0_OUT
IfxGtm_TOM0_4_TOUT0_P02_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT102_P10_0_OUT
IfxGtm_TOM0_4_TOUT102_P10_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT124_P11_8_OUT
IfxGtm_TOM0_4_TOUT124_P11_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT22_P33_0_OUT
IfxGtm_TOM0_4_TOUT22_P33_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT30_P33_8_OUT
IfxGtm_TOM0_4_TOUT30_P33_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT37_P32_1_OUT
IfxGtm_TOM0_4_TOUT37_P32_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT39_P32_3_OUT
IfxGtm_TOM0_4_TOUT39_P32_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT53_P21_2_OUT
IfxGtm_TOM0_4_TOUT53_P21_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT57_P21_6_OUT
IfxGtm_TOM0_4_TOUT57_P21_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT64_P20_8_OUT
IfxGtm_TOM0_4_TOUT64_P20_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT72_P15_1_OUT
IfxGtm_TOM0_4_TOUT72_P15_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT81_P14_1_OUT
IfxGtm_TOM0_4_TOUT81_P14_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT90_P14_10_OUT
IfxGtm_TOM0_4_TOUT90_P14_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT94_P13_3_OUT
IfxGtm_TOM0_4_TOUT94_P13_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT9_P00_0_OUT
IfxGtm_TOM0_4_TOUT9_P00_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT121_P11_4_OUT
IfxGtm_TOM0_5N_TOUT121_P11_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT12_P00_3_OUT
IfxGtm_TOM0_5N_TOUT12_P00_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT144_P33_15_OUT
IfxGtm_TOM0_5N_TOUT144_P33_15_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT148_P34_3_OUT
IfxGtm_TOM0_5N_TOUT148_P34_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT26_P33_4_OUT
IfxGtm_TOM0_5N_TOUT26_P33_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT28_P33_6_OUT
IfxGtm_TOM0_5N_TOUT28_P33_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT32_P33_10_OUT
IfxGtm_TOM0_5N_TOUT32_P33_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT37_P32_1_OUT
IfxGtm_TOM0_5N_TOUT37_P32_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT3_P02_3_OUT
IfxGtm_TOM0_5N_TOUT3_P02_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT53_P21_2_OUT
IfxGtm_TOM0_5N_TOUT53_P21_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT56_P21_5_OUT
IfxGtm_TOM0_5N_TOUT56_P21_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT67_P20_11_OUT
IfxGtm_TOM0_5N_TOUT67_P20_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT76_P15_5_OUT
IfxGtm_TOM0_5N_TOUT76_P15_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT77_P15_6_OUT
IfxGtm_TOM0_5N_TOUT77_P15_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT87_P14_7_OUT
IfxGtm_TOM0_5N_TOUT87_P14_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT97_P11_6_OUT
IfxGtm_TOM0_5N_TOUT97_P11_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT110_P10_8_OUT
IfxGtm_TOM0_5_TOUT110_P10_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT11_P00_2_OUT
IfxGtm_TOM0_5_TOUT11_P00_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT128_P12_0_OUT
IfxGtm_TOM0_5_TOUT128_P12_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT23_P33_1_OUT
IfxGtm_TOM0_5_TOUT23_P33_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT27_P33_5_OUT
IfxGtm_TOM0_5_TOUT27_P33_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT2_P02_2_OUT
IfxGtm_TOM0_5_TOUT2_P02_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT40_P32_4_OUT
IfxGtm_TOM0_5_TOUT40_P32_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT55_P21_4_OUT
IfxGtm_TOM0_5_TOUT55_P21_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT58_P21_7_OUT
IfxGtm_TOM0_5_TOUT58_P21_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT66_P20_10_OUT
IfxGtm_TOM0_5_TOUT66_P20_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT74_P15_3_OUT
IfxGtm_TOM0_5_TOUT74_P15_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT82_P14_2_OUT
IfxGtm_TOM0_5_TOUT82_P14_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT91_P13_0_OUT
IfxGtm_TOM0_5_TOUT91_P13_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT96_P11_3_OUT
IfxGtm_TOM0_5_TOUT96_P11_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT149_P34_4_OUT
IfxGtm_TOM0_6N_TOUT149_P34_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT14_P00_5_OUT
IfxGtm_TOM0_6N_TOUT14_P00_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT27_P33_5_OUT
IfxGtm_TOM0_6N_TOUT27_P33_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT30_P33_8_OUT
IfxGtm_TOM0_6N_TOUT30_P33_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT31_P33_9_OUT
IfxGtm_TOM0_6N_TOUT31_P33_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT38_P32_2_OUT
IfxGtm_TOM0_6N_TOUT38_P32_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT40_P32_4_OUT
IfxGtm_TOM0_6N_TOUT40_P32_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT49_P22_2_OUT
IfxGtm_TOM0_6N_TOUT49_P22_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT54_P21_3_OUT
IfxGtm_TOM0_6N_TOUT54_P21_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT5_P02_5_OUT
IfxGtm_TOM0_6N_TOUT5_P02_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT69_P20_13_OUT
IfxGtm_TOM0_6N_TOUT69_P20_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT78_P15_7_OUT
IfxGtm_TOM0_6N_TOUT78_P15_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT82_P14_2_OUT
IfxGtm_TOM0_6N_TOUT82_P14_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT86_P14_6_OUT
IfxGtm_TOM0_6N_TOUT86_P14_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT91_P13_0_OUT
IfxGtm_TOM0_6N_TOUT91_P13_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT97_P11_6_OUT
IfxGtm_TOM0_6N_TOUT97_P11_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT99_P11_10_OUT
IfxGtm_TOM0_6N_TOUT99_P11_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT106_P10_4_OUT
IfxGtm_TOM0_6_TOUT106_P10_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT129_P12_1_OUT
IfxGtm_TOM0_6_TOUT129_P12_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT13_P00_4_OUT
IfxGtm_TOM0_6_TOUT13_P00_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT24_P33_2_OUT
IfxGtm_TOM0_6_TOUT24_P33_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT29_P33_7_OUT
IfxGtm_TOM0_6_TOUT29_P33_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT42_P23_1_OUT
IfxGtm_TOM0_6_TOUT42_P23_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT48_P22_1_OUT
IfxGtm_TOM0_6_TOUT48_P22_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT4_P02_4_OUT
IfxGtm_TOM0_6_TOUT4_P02_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT59_P20_0_OUT
IfxGtm_TOM0_6_TOUT59_P20_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT68_P20_12_OUT
IfxGtm_TOM0_6_TOUT68_P20_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT80_P14_0_OUT
IfxGtm_TOM0_6_TOUT80_P14_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT83_P14_3_OUT
IfxGtm_TOM0_6_TOUT83_P14_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT92_P13_1_OUT
IfxGtm_TOM0_6_TOUT92_P13_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT98_P11_9_OUT
IfxGtm_TOM0_6_TOUT98_P11_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT100_P11_11_OUT
IfxGtm_TOM0_7N_TOUT100_P11_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT123_P11_7_OUT
IfxGtm_TOM0_7N_TOUT123_P11_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT130_P22_4_OUT
IfxGtm_TOM0_7N_TOUT130_P22_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT150_P34_5_OUT
IfxGtm_TOM0_7N_TOUT150_P34_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT16_P00_7_OUT
IfxGtm_TOM0_7N_TOUT16_P00_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT28_P33_6_OUT
IfxGtm_TOM0_7N_TOUT28_P33_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT32_P33_10_OUT
IfxGtm_TOM0_7N_TOUT32_P33_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT33_P33_11_OUT
IfxGtm_TOM0_7N_TOUT33_P33_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT39_P32_3_OUT
IfxGtm_TOM0_7N_TOUT39_P32_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT42_P23_1_OUT
IfxGtm_TOM0_7N_TOUT42_P23_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT55_P21_4_OUT
IfxGtm_TOM0_7N_TOUT55_P21_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT71_P15_0_OUT
IfxGtm_TOM0_7N_TOUT71_P15_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT79_P15_8_OUT
IfxGtm_TOM0_7N_TOUT79_P15_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT7_P02_7_OUT
IfxGtm_TOM0_7N_TOUT7_P02_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT84_P14_4_OUT
IfxGtm_TOM0_7N_TOUT84_P14_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT88_P14_8_OUT
IfxGtm_TOM0_7N_TOUT88_P14_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT93_P13_2_OUT
IfxGtm_TOM0_7N_TOUT93_P13_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT101_P11_12_OUT
IfxGtm_TOM0_7_TOUT101_P11_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT119_P11_0_OUT
IfxGtm_TOM0_7_TOUT119_P11_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT15_P00_6_OUT
IfxGtm_TOM0_7_TOUT15_P00_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT25_P33_3_OUT
IfxGtm_TOM0_7_TOUT25_P33_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT31_P33_9_OUT
IfxGtm_TOM0_7_TOUT31_P33_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT45_P23_4_OUT
IfxGtm_TOM0_7_TOUT45_P23_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT50_P22_3_OUT
IfxGtm_TOM0_7_TOUT50_P22_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT6_P02_6_OUT
IfxGtm_TOM0_7_TOUT6_P02_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT70_P20_14_OUT
IfxGtm_TOM0_7_TOUT70_P20_14_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT81_P14_1_OUT
IfxGtm_TOM0_7_TOUT81_P14_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT84_P14_4_OUT
IfxGtm_TOM0_7_TOUT84_P14_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT92_P13_1_OUT
IfxGtm_TOM0_7_TOUT92_P13_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT93_P13_2_OUT
IfxGtm_TOM0_7_TOUT93_P13_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT0_P02_0_OUT
IfxGtm_TOM0_8_TOUT0_P02_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT48_P22_1_OUT
IfxGtm_TOM0_8_TOUT48_P22_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT51_P21_0_OUT
IfxGtm_TOM0_8_TOUT51_P21_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT8_P02_8_OUT
IfxGtm_TOM0_8_TOUT8_P02_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT94_P13_3_OUT
IfxGtm_TOM0_8_TOUT94_P13_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT95_P11_2_OUT
IfxGtm_TOM0_8_TOUT95_P11_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT9_P00_0_OUT
IfxGtm_TOM0_8_TOUT9_P00_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT10_P00_1_OUT
IfxGtm_TOM0_9_TOUT10_P00_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT11_P00_2_OUT
IfxGtm_TOM0_9_TOUT11_P00_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT1_P02_1_OUT
IfxGtm_TOM0_9_TOUT1_P02_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT47_P22_0_OUT
IfxGtm_TOM0_9_TOUT47_P22_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT52_P21_1_OUT
IfxGtm_TOM0_9_TOUT52_P21_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0N_TOUT17_P00_8_OUT
IfxGtm_TOM1_0N_TOUT17_P00_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0N_TOUT25_P33_3_OUT
IfxGtm_TOM1_0N_TOUT25_P33_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0N_TOUT34_P33_12_OUT
IfxGtm_TOM1_0N_TOUT34_P33_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0N_TOUT75_P15_4_OUT
IfxGtm_TOM1_0N_TOUT75_P15_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0N_TOUT7_P02_7_OUT
IfxGtm_TOM1_0N_TOUT7_P02_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT0_P02_0_OUT
IfxGtm_TOM1_0_TOUT0_P02_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT18_P00_9_OUT
IfxGtm_TOM1_0_TOUT18_P00_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT26_P33_4_OUT
IfxGtm_TOM1_0_TOUT26_P33_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT32_P33_10_OUT
IfxGtm_TOM1_0_TOUT32_P33_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT68_P20_12_OUT
IfxGtm_TOM1_0_TOUT68_P20_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT76_P15_5_OUT
IfxGtm_TOM1_0_TOUT76_P15_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT77_P15_6_OUT
IfxGtm_TOM1_0_TOUT77_P15_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT85_P14_5_OUT
IfxGtm_TOM1_0_TOUT85_P14_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT8_P02_8_OUT
IfxGtm_TOM1_0_TOUT8_P02_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT9_P00_0_OUT
IfxGtm_TOM1_0_TOUT9_P00_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT143_P33_14_OUT
IfxGtm_TOM1_10_TOUT143_P33_14_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT266_P10_10_OUT
IfxGtm_TOM1_10_TOUT266_P10_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT2_P02_2_OUT
IfxGtm_TOM1_10_TOUT2_P02_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT62_P20_6_OUT
IfxGtm_TOM1_10_TOUT62_P20_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT144_P33_15_OUT
IfxGtm_TOM1_11_TOUT144_P33_15_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT267_P10_14_OUT
IfxGtm_TOM1_11_TOUT267_P10_14_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT3_P02_3_OUT
IfxGtm_TOM1_11_TOUT3_P02_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT60_P20_1_OUT
IfxGtm_TOM1_11_TOUT60_P20_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT63_P20_7_OUT
IfxGtm_TOM1_11_TOUT63_P20_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT268_P10_13_OUT
IfxGtm_TOM1_12_TOUT268_P10_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT34_P33_12_OUT
IfxGtm_TOM1_12_TOUT34_P33_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT4_P02_4_OUT
IfxGtm_TOM1_12_TOUT4_P02_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT61_P20_3_OUT
IfxGtm_TOM1_12_TOUT61_P20_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT146_P34_1_OUT
IfxGtm_TOM1_13_TOUT146_P34_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT269_P10_11_OUT
IfxGtm_TOM1_13_TOUT269_P10_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT35_P33_13_OUT
IfxGtm_TOM1_13_TOUT35_P33_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT5_P02_5_OUT
IfxGtm_TOM1_13_TOUT5_P02_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT65_P20_9_OUT
IfxGtm_TOM1_13_TOUT65_P20_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT147_P34_2_OUT
IfxGtm_TOM1_14_TOUT147_P34_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT270_P10_15_OUT
IfxGtm_TOM1_14_TOUT270_P10_15_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT36_P32_0_OUT
IfxGtm_TOM1_14_TOUT36_P32_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT66_P20_10_OUT
IfxGtm_TOM1_14_TOUT66_P20_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT6_P02_6_OUT
IfxGtm_TOM1_14_TOUT6_P02_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT148_P34_3_OUT
IfxGtm_TOM1_15_TOUT148_P34_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT150_P34_5_OUT
IfxGtm_TOM1_15_TOUT150_P34_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT37_P32_1_OUT
IfxGtm_TOM1_15_TOUT37_P32_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT67_P20_11_OUT
IfxGtm_TOM1_15_TOUT67_P20_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT7_P02_7_OUT
IfxGtm_TOM1_15_TOUT7_P02_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT14_P00_5_OUT
IfxGtm_TOM1_1N_TOUT14_P00_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT22_P33_0_OUT
IfxGtm_TOM1_1N_TOUT22_P33_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT245_P15_13_OUT
IfxGtm_TOM1_1N_TOUT245_P15_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT30_P33_8_OUT
IfxGtm_TOM1_1N_TOUT30_P33_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT35_P33_13_OUT
IfxGtm_TOM1_1N_TOUT35_P33_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT39_P32_3_OUT
IfxGtm_TOM1_1N_TOUT39_P32_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT4_P02_4_OUT
IfxGtm_TOM1_1N_TOUT4_P02_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT72_P15_1_OUT
IfxGtm_TOM1_1N_TOUT72_P15_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT10_P00_1_OUT
IfxGtm_TOM1_1_TOUT10_P00_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT116_P02_9_OUT
IfxGtm_TOM1_1_TOUT116_P02_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT11_P00_2_OUT
IfxGtm_TOM1_1_TOUT11_P00_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT19_P00_10_OUT
IfxGtm_TOM1_1_TOUT19_P00_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT1_P02_1_OUT
IfxGtm_TOM1_1_TOUT1_P02_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT242_P15_10_OUT
IfxGtm_TOM1_1_TOUT242_P15_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT27_P33_5_OUT
IfxGtm_TOM1_1_TOUT27_P33_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT31_P33_9_OUT
IfxGtm_TOM1_1_TOUT31_P33_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT69_P20_13_OUT
IfxGtm_TOM1_1_TOUT69_P20_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT78_P15_7_OUT
IfxGtm_TOM1_1_TOUT78_P15_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT86_P14_6_OUT
IfxGtm_TOM1_1_TOUT86_P14_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT143_P33_14_OUT
IfxGtm_TOM1_2N_TOUT143_P33_14_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT15_P00_6_OUT
IfxGtm_TOM1_2N_TOUT15_P00_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT23_P33_1_OUT
IfxGtm_TOM1_2N_TOUT23_P33_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT246_P15_14_OUT
IfxGtm_TOM1_2N_TOUT246_P15_14_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT40_P32_4_OUT
IfxGtm_TOM1_2N_TOUT40_P32_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT41_P23_0_OUT
IfxGtm_TOM1_2N_TOUT41_P23_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT5_P02_5_OUT
IfxGtm_TOM1_2N_TOUT5_P02_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT73_P15_2_OUT
IfxGtm_TOM1_2N_TOUT73_P15_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT117_P02_10_OUT
IfxGtm_TOM1_2_TOUT117_P02_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT12_P00_3_OUT
IfxGtm_TOM1_2_TOUT12_P00_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT20_P00_11_OUT
IfxGtm_TOM1_2_TOUT20_P00_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT243_P15_11_OUT
IfxGtm_TOM1_2_TOUT243_P15_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT28_P33_6_OUT
IfxGtm_TOM1_2_TOUT28_P33_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT2_P02_2_OUT
IfxGtm_TOM1_2_TOUT2_P02_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT33_P33_11_OUT
IfxGtm_TOM1_2_TOUT33_P33_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT70_P20_14_OUT
IfxGtm_TOM1_2_TOUT70_P20_14_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT79_P15_8_OUT
IfxGtm_TOM1_2_TOUT79_P15_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3N_TOUT144_P33_15_OUT
IfxGtm_TOM1_3N_TOUT144_P33_15_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3N_TOUT16_P00_7_OUT
IfxGtm_TOM1_3N_TOUT16_P00_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3N_TOUT247_P15_15_OUT
IfxGtm_TOM1_3N_TOUT247_P15_15_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3N_TOUT24_P33_2_OUT
IfxGtm_TOM1_3N_TOUT24_P33_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3N_TOUT43_P23_2_OUT
IfxGtm_TOM1_3N_TOUT43_P23_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3N_TOUT6_P02_6_OUT
IfxGtm_TOM1_3N_TOUT6_P02_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3N_TOUT74_P15_3_OUT
IfxGtm_TOM1_3N_TOUT74_P15_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT118_P02_11_OUT
IfxGtm_TOM1_3_TOUT118_P02_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT13_P00_4_OUT
IfxGtm_TOM1_3_TOUT13_P00_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT21_P00_12_OUT
IfxGtm_TOM1_3_TOUT21_P00_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT244_P15_12_OUT
IfxGtm_TOM1_3_TOUT244_P15_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT29_P33_7_OUT
IfxGtm_TOM1_3_TOUT29_P33_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT38_P32_2_OUT
IfxGtm_TOM1_3_TOUT38_P32_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT3_P02_3_OUT
IfxGtm_TOM1_3_TOUT3_P02_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT71_P15_0_OUT
IfxGtm_TOM1_3_TOUT71_P15_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT80_P14_0_OUT
IfxGtm_TOM1_3_TOUT80_P14_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT10_P00_1_OUT
IfxGtm_TOM1_4N_TOUT10_P00_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT13_P00_4_OUT
IfxGtm_TOM1_4N_TOUT13_P00_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT143_P33_14_OUT
IfxGtm_TOM1_4N_TOUT143_P33_14_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT147_P34_2_OUT
IfxGtm_TOM1_4N_TOUT147_P34_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT1_P02_1_OUT
IfxGtm_TOM1_4N_TOUT1_P02_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT21_P00_12_OUT
IfxGtm_TOM1_4N_TOUT21_P00_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT244_P15_12_OUT
IfxGtm_TOM1_4N_TOUT244_P15_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT29_P33_7_OUT
IfxGtm_TOM1_4N_TOUT29_P33_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT36_P32_0_OUT
IfxGtm_TOM1_4N_TOUT36_P32_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT54_P21_3_OUT
IfxGtm_TOM1_4N_TOUT54_P21_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT65_P20_9_OUT
IfxGtm_TOM1_4N_TOUT65_P20_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT71_P15_0_OUT
IfxGtm_TOM1_4N_TOUT71_P15_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT73_P15_2_OUT
IfxGtm_TOM1_4N_TOUT73_P15_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT8_P02_8_OUT
IfxGtm_TOM1_4N_TOUT8_P02_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT95_P11_2_OUT
IfxGtm_TOM1_4N_TOUT95_P11_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT0_P02_0_OUT
IfxGtm_TOM1_4_TOUT0_P02_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT124_P11_8_OUT
IfxGtm_TOM1_4_TOUT124_P11_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT14_P00_5_OUT
IfxGtm_TOM1_4_TOUT14_P00_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT22_P33_0_OUT
IfxGtm_TOM1_4_TOUT22_P33_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT245_P15_13_OUT
IfxGtm_TOM1_4_TOUT245_P15_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT30_P33_8_OUT
IfxGtm_TOM1_4_TOUT30_P33_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT37_P32_1_OUT
IfxGtm_TOM1_4_TOUT37_P32_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT39_P32_3_OUT
IfxGtm_TOM1_4_TOUT39_P32_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT53_P21_2_OUT
IfxGtm_TOM1_4_TOUT53_P21_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT64_P20_8_OUT
IfxGtm_TOM1_4_TOUT64_P20_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT72_P15_1_OUT
IfxGtm_TOM1_4_TOUT72_P15_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT81_P14_1_OUT
IfxGtm_TOM1_4_TOUT81_P14_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT94_P13_3_OUT
IfxGtm_TOM1_4_TOUT94_P13_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT9_P00_0_OUT
IfxGtm_TOM1_4_TOUT9_P00_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT12_P00_3_OUT
IfxGtm_TOM1_5N_TOUT12_P00_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT144_P33_15_OUT
IfxGtm_TOM1_5N_TOUT144_P33_15_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT148_P34_3_OUT
IfxGtm_TOM1_5N_TOUT148_P34_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT18_P00_9_OUT
IfxGtm_TOM1_5N_TOUT18_P00_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT26_P33_4_OUT
IfxGtm_TOM1_5N_TOUT26_P33_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT28_P33_6_OUT
IfxGtm_TOM1_5N_TOUT28_P33_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT32_P33_10_OUT
IfxGtm_TOM1_5N_TOUT32_P33_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT37_P32_1_OUT
IfxGtm_TOM1_5N_TOUT37_P32_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT3_P02_3_OUT
IfxGtm_TOM1_5N_TOUT3_P02_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT56_P21_5_OUT
IfxGtm_TOM1_5N_TOUT56_P21_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT67_P20_11_OUT
IfxGtm_TOM1_5N_TOUT67_P20_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT76_P15_5_OUT
IfxGtm_TOM1_5N_TOUT76_P15_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT77_P15_6_OUT
IfxGtm_TOM1_5N_TOUT77_P15_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT97_P11_6_OUT
IfxGtm_TOM1_5N_TOUT97_P11_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT9_P00_0_OUT
IfxGtm_TOM1_5N_TOUT9_P00_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT11_P00_2_OUT
IfxGtm_TOM1_5_TOUT11_P00_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT15_P00_6_OUT
IfxGtm_TOM1_5_TOUT15_P00_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT23_P33_1_OUT
IfxGtm_TOM1_5_TOUT23_P33_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT246_P15_14_OUT
IfxGtm_TOM1_5_TOUT246_P15_14_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT27_P33_5_OUT
IfxGtm_TOM1_5_TOUT27_P33_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT2_P02_2_OUT
IfxGtm_TOM1_5_TOUT2_P02_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT40_P32_4_OUT
IfxGtm_TOM1_5_TOUT40_P32_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT41_P23_0_OUT
IfxGtm_TOM1_5_TOUT41_P23_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT55_P21_4_OUT
IfxGtm_TOM1_5_TOUT55_P21_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT66_P20_10_OUT
IfxGtm_TOM1_5_TOUT66_P20_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT73_P15_2_OUT
IfxGtm_TOM1_5_TOUT73_P15_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT74_P15_3_OUT
IfxGtm_TOM1_5_TOUT74_P15_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT82_P14_2_OUT
IfxGtm_TOM1_5_TOUT82_P14_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT96_P11_3_OUT
IfxGtm_TOM1_5_TOUT96_P11_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT10_P00_1_OUT
IfxGtm_TOM1_6N_TOUT10_P00_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT11_P00_2_OUT
IfxGtm_TOM1_6N_TOUT11_P00_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT149_P34_4_OUT
IfxGtm_TOM1_6N_TOUT149_P34_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT14_P00_5_OUT
IfxGtm_TOM1_6N_TOUT14_P00_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT19_P00_10_OUT
IfxGtm_TOM1_6N_TOUT19_P00_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT242_P15_10_OUT
IfxGtm_TOM1_6N_TOUT242_P15_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT27_P33_5_OUT
IfxGtm_TOM1_6N_TOUT27_P33_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT30_P33_8_OUT
IfxGtm_TOM1_6N_TOUT30_P33_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT31_P33_9_OUT
IfxGtm_TOM1_6N_TOUT31_P33_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT38_P32_2_OUT
IfxGtm_TOM1_6N_TOUT38_P32_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT40_P32_4_OUT
IfxGtm_TOM1_6N_TOUT40_P32_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT49_P22_2_OUT
IfxGtm_TOM1_6N_TOUT49_P22_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT5_P02_5_OUT
IfxGtm_TOM1_6N_TOUT5_P02_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT69_P20_13_OUT
IfxGtm_TOM1_6N_TOUT69_P20_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT78_P15_7_OUT
IfxGtm_TOM1_6N_TOUT78_P15_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT82_P14_2_OUT
IfxGtm_TOM1_6N_TOUT82_P14_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT91_P13_0_OUT
IfxGtm_TOM1_6N_TOUT91_P13_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT99_P11_10_OUT
IfxGtm_TOM1_6N_TOUT99_P11_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT13_P00_4_OUT
IfxGtm_TOM1_6_TOUT13_P00_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT16_P00_7_OUT
IfxGtm_TOM1_6_TOUT16_P00_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT247_P15_15_OUT
IfxGtm_TOM1_6_TOUT247_P15_15_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT24_P33_2_OUT
IfxGtm_TOM1_6_TOUT24_P33_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT29_P33_7_OUT
IfxGtm_TOM1_6_TOUT29_P33_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT43_P23_2_OUT
IfxGtm_TOM1_6_TOUT43_P23_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT48_P22_1_OUT
IfxGtm_TOM1_6_TOUT48_P22_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT4_P02_4_OUT
IfxGtm_TOM1_6_TOUT4_P02_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT68_P20_12_OUT
IfxGtm_TOM1_6_TOUT68_P20_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT74_P15_3_OUT
IfxGtm_TOM1_6_TOUT74_P15_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT80_P14_0_OUT
IfxGtm_TOM1_6_TOUT80_P14_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT83_P14_3_OUT
IfxGtm_TOM1_6_TOUT83_P14_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT98_P11_9_OUT
IfxGtm_TOM1_6_TOUT98_P11_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT100_P11_11_OUT
IfxGtm_TOM1_7N_TOUT100_P11_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT12_P00_3_OUT
IfxGtm_TOM1_7N_TOUT12_P00_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT130_P22_4_OUT
IfxGtm_TOM1_7N_TOUT130_P22_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT150_P34_5_OUT
IfxGtm_TOM1_7N_TOUT150_P34_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT16_P00_7_OUT
IfxGtm_TOM1_7N_TOUT16_P00_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT20_P00_11_OUT
IfxGtm_TOM1_7N_TOUT20_P00_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT243_P15_11_OUT
IfxGtm_TOM1_7N_TOUT243_P15_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT28_P33_6_OUT
IfxGtm_TOM1_7N_TOUT28_P33_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT32_P33_10_OUT
IfxGtm_TOM1_7N_TOUT32_P33_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT33_P33_11_OUT
IfxGtm_TOM1_7N_TOUT33_P33_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT39_P32_3_OUT
IfxGtm_TOM1_7N_TOUT39_P32_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT42_P23_1_OUT
IfxGtm_TOM1_7N_TOUT42_P23_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT71_P15_0_OUT
IfxGtm_TOM1_7N_TOUT71_P15_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT79_P15_8_OUT
IfxGtm_TOM1_7N_TOUT79_P15_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT7_P02_7_OUT
IfxGtm_TOM1_7N_TOUT7_P02_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT84_P14_4_OUT
IfxGtm_TOM1_7N_TOUT84_P14_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT93_P13_2_OUT
IfxGtm_TOM1_7N_TOUT93_P13_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT101_P11_12_OUT
IfxGtm_TOM1_7_TOUT101_P11_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT15_P00_6_OUT
IfxGtm_TOM1_7_TOUT15_P00_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT17_P00_8_OUT
IfxGtm_TOM1_7_TOUT17_P00_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT248_P13_9_OUT
IfxGtm_TOM1_7_TOUT248_P13_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT25_P33_3_OUT
IfxGtm_TOM1_7_TOUT25_P33_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT31_P33_9_OUT
IfxGtm_TOM1_7_TOUT31_P33_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT44_P23_3_OUT
IfxGtm_TOM1_7_TOUT44_P23_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT45_P23_4_OUT
IfxGtm_TOM1_7_TOUT45_P23_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT50_P22_3_OUT
IfxGtm_TOM1_7_TOUT50_P22_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT64_P20_8_OUT
IfxGtm_TOM1_7_TOUT64_P20_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT6_P02_6_OUT
IfxGtm_TOM1_7_TOUT6_P02_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT70_P20_14_OUT
IfxGtm_TOM1_7_TOUT70_P20_14_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT75_P15_4_OUT
IfxGtm_TOM1_7_TOUT75_P15_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT81_P14_1_OUT
IfxGtm_TOM1_7_TOUT81_P14_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT84_P14_4_OUT
IfxGtm_TOM1_7_TOUT84_P14_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT92_P13_1_OUT
IfxGtm_TOM1_7_TOUT92_P13_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT0_P02_0_OUT
IfxGtm_TOM1_8_TOUT0_P02_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT128_P12_0_OUT
IfxGtm_TOM1_8_TOUT128_P12_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT141_P32_6_OUT
IfxGtm_TOM1_8_TOUT141_P32_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT249_P13_12_OUT
IfxGtm_TOM1_8_TOUT249_P13_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT129_P12_1_OUT
IfxGtm_TOM1_9_TOUT129_P12_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT142_P32_7_OUT
IfxGtm_TOM1_9_TOUT142_P32_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT1_P02_1_OUT
IfxGtm_TOM1_9_TOUT1_P02_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT265_P10_9_OUT
IfxGtm_TOM1_9_TOUT265_P10_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT101_P11_12_OUT
IfxGtm_TOM2_0N_TOUT101_P11_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT126_P11_14_OUT
IfxGtm_TOM2_0N_TOUT126_P11_14_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT264_P13_15_OUT
IfxGtm_TOM2_0N_TOUT264_P13_15_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT43_P23_2_OUT
IfxGtm_TOM2_0N_TOUT43_P23_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT51_P21_0_OUT
IfxGtm_TOM2_0N_TOUT51_P21_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT61_P20_3_OUT
IfxGtm_TOM2_0N_TOUT61_P20_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT76_P15_5_OUT
IfxGtm_TOM2_0N_TOUT76_P15_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT91_P13_0_OUT
IfxGtm_TOM2_0N_TOUT91_P13_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT119_P11_0_OUT
IfxGtm_TOM2_0_TOUT119_P11_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT120_P11_1_OUT
IfxGtm_TOM2_0_TOUT120_P11_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT250_P13_11_OUT
IfxGtm_TOM2_0_TOUT250_P13_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT48_P22_1_OUT
IfxGtm_TOM2_0_TOUT48_P22_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT53_P21_2_OUT
IfxGtm_TOM2_0_TOUT53_P21_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT65_P20_9_OUT
IfxGtm_TOM2_0_TOUT65_P20_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT87_P14_7_OUT
IfxGtm_TOM2_0_TOUT87_P14_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT94_P13_3_OUT
IfxGtm_TOM2_0_TOUT94_P13_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT95_P11_2_OUT
IfxGtm_TOM2_0_TOUT95_P11_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_10_TOUT104_P10_2_OUT
IfxGtm_TOM2_10_TOUT104_P10_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_10_TOUT107_P10_5_OUT
IfxGtm_TOM2_10_TOUT107_P10_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_10_TOUT133_P22_7_OUT
IfxGtm_TOM2_10_TOUT133_P22_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_10_TOUT260_P14_13_OUT
IfxGtm_TOM2_10_TOUT260_P14_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_10_TOUT62_P20_6_OUT
IfxGtm_TOM2_10_TOUT62_P20_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_10_TOUT70_P20_14_OUT
IfxGtm_TOM2_10_TOUT70_P20_14_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_11_TOUT105_P10_3_OUT
IfxGtm_TOM2_11_TOUT105_P10_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_11_TOUT108_P10_6_OUT
IfxGtm_TOM2_11_TOUT108_P10_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_11_TOUT134_P22_8_OUT
IfxGtm_TOM2_11_TOUT134_P22_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_11_TOUT261_P14_12_OUT
IfxGtm_TOM2_11_TOUT261_P14_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_11_TOUT63_P20_7_OUT
IfxGtm_TOM2_11_TOUT63_P20_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_11_TOUT71_P15_0_OUT
IfxGtm_TOM2_11_TOUT71_P15_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_12_TOUT102_P10_0_OUT
IfxGtm_TOM2_12_TOUT102_P10_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_12_TOUT135_P22_9_OUT
IfxGtm_TOM2_12_TOUT135_P22_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_12_TOUT262_P13_13_OUT
IfxGtm_TOM2_12_TOUT262_P13_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_12_TOUT34_P33_12_OUT
IfxGtm_TOM2_12_TOUT34_P33_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_12_TOUT72_P15_1_OUT
IfxGtm_TOM2_12_TOUT72_P15_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_13_TOUT110_P10_8_OUT
IfxGtm_TOM2_13_TOUT110_P10_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_13_TOUT136_P22_10_OUT
IfxGtm_TOM2_13_TOUT136_P22_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_13_TOUT263_P14_15_OUT
IfxGtm_TOM2_13_TOUT263_P14_15_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_13_TOUT35_P33_13_OUT
IfxGtm_TOM2_13_TOUT35_P33_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_13_TOUT65_P20_9_OUT
IfxGtm_TOM2_13_TOUT65_P20_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_13_TOUT73_P15_2_OUT
IfxGtm_TOM2_13_TOUT73_P15_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_14_TOUT137_P22_11_OUT
IfxGtm_TOM2_14_TOUT137_P22_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_14_TOUT264_P13_15_OUT
IfxGtm_TOM2_14_TOUT264_P13_15_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_14_TOUT36_P32_0_OUT
IfxGtm_TOM2_14_TOUT36_P32_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_14_TOUT66_P20_10_OUT
IfxGtm_TOM2_14_TOUT66_P20_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_14_TOUT74_P15_3_OUT
IfxGtm_TOM2_14_TOUT74_P15_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_15_TOUT149_P34_4_OUT
IfxGtm_TOM2_15_TOUT149_P34_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_15_TOUT37_P32_1_OUT
IfxGtm_TOM2_15_TOUT37_P32_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_15_TOUT67_P20_11_OUT
IfxGtm_TOM2_15_TOUT67_P20_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_15_TOUT75_P15_4_OUT
IfxGtm_TOM2_15_TOUT75_P15_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT123_P11_7_OUT
IfxGtm_TOM2_1N_TOUT123_P11_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT124_P11_8_OUT
IfxGtm_TOM2_1N_TOUT124_P11_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT254_P13_5_OUT
IfxGtm_TOM2_1N_TOUT254_P13_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT44_P23_3_OUT
IfxGtm_TOM2_1N_TOUT44_P23_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT50_P22_3_OUT
IfxGtm_TOM2_1N_TOUT50_P22_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT52_P21_1_OUT
IfxGtm_TOM2_1N_TOUT52_P21_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT57_P21_6_OUT
IfxGtm_TOM2_1N_TOUT57_P21_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT61_P20_3_OUT
IfxGtm_TOM2_1N_TOUT61_P20_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT79_P15_8_OUT
IfxGtm_TOM2_1N_TOUT79_P15_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT90_P14_10_OUT
IfxGtm_TOM2_1N_TOUT90_P14_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT92_P13_1_OUT
IfxGtm_TOM2_1N_TOUT92_P13_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT98_P11_9_OUT
IfxGtm_TOM2_1N_TOUT98_P11_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1_TOUT120_P11_1_OUT
IfxGtm_TOM2_1_TOUT120_P11_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1_TOUT127_P11_15_OUT
IfxGtm_TOM2_1_TOUT127_P11_15_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1_TOUT251_P13_10_OUT
IfxGtm_TOM2_1_TOUT251_P13_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1_TOUT47_P22_0_OUT
IfxGtm_TOM2_1_TOUT47_P22_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1_TOUT54_P21_3_OUT
IfxGtm_TOM2_1_TOUT54_P21_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1_TOUT64_P20_8_OUT
IfxGtm_TOM2_1_TOUT64_P20_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1_TOUT95_P11_2_OUT
IfxGtm_TOM2_1_TOUT95_P11_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2N_TOUT124_P11_8_OUT
IfxGtm_TOM2_2N_TOUT124_P11_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2N_TOUT255_P13_6_OUT
IfxGtm_TOM2_2N_TOUT255_P13_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2N_TOUT46_P23_5_OUT
IfxGtm_TOM2_2N_TOUT46_P23_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2N_TOUT58_P21_7_OUT
IfxGtm_TOM2_2N_TOUT58_P21_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2N_TOUT78_P15_7_OUT
IfxGtm_TOM2_2N_TOUT78_P15_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2N_TOUT93_P13_2_OUT
IfxGtm_TOM2_2N_TOUT93_P13_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2N_TOUT99_P11_10_OUT
IfxGtm_TOM2_2N_TOUT99_P11_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT121_P11_4_OUT
IfxGtm_TOM2_2_TOUT121_P11_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT125_P11_13_OUT
IfxGtm_TOM2_2_TOUT125_P11_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT252_P13_14_OUT
IfxGtm_TOM2_2_TOUT252_P13_14_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT46_P23_5_OUT
IfxGtm_TOM2_2_TOUT46_P23_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT50_P22_3_OUT
IfxGtm_TOM2_2_TOUT50_P22_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT55_P21_4_OUT
IfxGtm_TOM2_2_TOUT55_P21_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT63_P20_7_OUT
IfxGtm_TOM2_2_TOUT63_P20_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT88_P14_8_OUT
IfxGtm_TOM2_2_TOUT88_P14_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT96_P11_3_OUT
IfxGtm_TOM2_2_TOUT96_P11_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3N_TOUT100_P11_11_OUT
IfxGtm_TOM2_3N_TOUT100_P11_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3N_TOUT106_P10_4_OUT
IfxGtm_TOM2_3N_TOUT106_P10_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3N_TOUT122_P11_5_OUT
IfxGtm_TOM2_3N_TOUT122_P11_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3N_TOUT256_P13_7_OUT
IfxGtm_TOM2_3N_TOUT256_P13_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3N_TOUT45_P23_4_OUT
IfxGtm_TOM2_3N_TOUT45_P23_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3N_TOUT59_P20_0_OUT
IfxGtm_TOM2_3N_TOUT59_P20_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3N_TOUT77_P15_6_OUT
IfxGtm_TOM2_3N_TOUT77_P15_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT122_P11_5_OUT
IfxGtm_TOM2_3_TOUT122_P11_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT126_P11_14_OUT
IfxGtm_TOM2_3_TOUT126_P11_14_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT253_P13_4_OUT
IfxGtm_TOM2_3_TOUT253_P13_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT49_P22_2_OUT
IfxGtm_TOM2_3_TOUT49_P22_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT56_P21_5_OUT
IfxGtm_TOM2_3_TOUT56_P21_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT60_P20_1_OUT
IfxGtm_TOM2_3_TOUT60_P20_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT62_P20_6_OUT
IfxGtm_TOM2_3_TOUT62_P20_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT89_P14_9_OUT
IfxGtm_TOM2_3_TOUT89_P14_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT97_P11_6_OUT
IfxGtm_TOM2_3_TOUT97_P11_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT106_P10_4_OUT
IfxGtm_TOM2_4N_TOUT106_P10_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT120_P11_1_OUT
IfxGtm_TOM2_4N_TOUT120_P11_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT122_P11_5_OUT
IfxGtm_TOM2_4N_TOUT122_P11_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT126_P11_14_OUT
IfxGtm_TOM2_4N_TOUT126_P11_14_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT137_P22_11_OUT
IfxGtm_TOM2_4N_TOUT137_P22_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT253_P13_4_OUT
IfxGtm_TOM2_4N_TOUT253_P13_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT56_P21_5_OUT
IfxGtm_TOM2_4N_TOUT56_P21_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT60_P20_1_OUT
IfxGtm_TOM2_4N_TOUT60_P20_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT89_P14_9_OUT
IfxGtm_TOM2_4N_TOUT89_P14_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT97_P11_6_OUT
IfxGtm_TOM2_4N_TOUT97_P11_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT102_P10_0_OUT
IfxGtm_TOM2_4_TOUT102_P10_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT123_P11_7_OUT
IfxGtm_TOM2_4_TOUT123_P11_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT133_P22_7_OUT
IfxGtm_TOM2_4_TOUT133_P22_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT254_P13_5_OUT
IfxGtm_TOM2_4_TOUT254_P13_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT50_P22_3_OUT
IfxGtm_TOM2_4_TOUT50_P22_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT57_P21_6_OUT
IfxGtm_TOM2_4_TOUT57_P21_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT61_P20_3_OUT
IfxGtm_TOM2_4_TOUT61_P20_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT90_P14_10_OUT
IfxGtm_TOM2_4_TOUT90_P14_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT98_P11_9_OUT
IfxGtm_TOM2_4_TOUT98_P11_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5N_TOUT107_P10_5_OUT
IfxGtm_TOM2_5N_TOUT107_P10_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5N_TOUT119_P11_0_OUT
IfxGtm_TOM2_5N_TOUT119_P11_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5N_TOUT136_P22_10_OUT
IfxGtm_TOM2_5N_TOUT136_P22_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5N_TOUT250_P13_11_OUT
IfxGtm_TOM2_5N_TOUT250_P13_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5N_TOUT53_P21_2_OUT
IfxGtm_TOM2_5N_TOUT53_P21_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5N_TOUT87_P14_7_OUT
IfxGtm_TOM2_5N_TOUT87_P14_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5N_TOUT94_P13_3_OUT
IfxGtm_TOM2_5N_TOUT94_P13_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5_TOUT103_P10_1_OUT
IfxGtm_TOM2_5_TOUT103_P10_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5_TOUT124_P11_8_OUT
IfxGtm_TOM2_5_TOUT124_P11_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5_TOUT132_P22_6_OUT
IfxGtm_TOM2_5_TOUT132_P22_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5_TOUT255_P13_6_OUT
IfxGtm_TOM2_5_TOUT255_P13_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5_TOUT58_P21_7_OUT
IfxGtm_TOM2_5_TOUT58_P21_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5_TOUT91_P13_0_OUT
IfxGtm_TOM2_5_TOUT91_P13_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5_TOUT99_P11_10_OUT
IfxGtm_TOM2_5_TOUT99_P11_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT108_P10_6_OUT
IfxGtm_TOM2_6N_TOUT108_P10_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT120_P11_1_OUT
IfxGtm_TOM2_6N_TOUT120_P11_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT122_P11_5_OUT
IfxGtm_TOM2_6N_TOUT122_P11_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT135_P22_9_OUT
IfxGtm_TOM2_6N_TOUT135_P22_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT251_P13_10_OUT
IfxGtm_TOM2_6N_TOUT251_P13_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT54_P21_3_OUT
IfxGtm_TOM2_6N_TOUT54_P21_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT86_P14_6_OUT
IfxGtm_TOM2_6N_TOUT86_P14_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT95_P11_2_OUT
IfxGtm_TOM2_6N_TOUT95_P11_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT100_P11_11_OUT
IfxGtm_TOM2_6_TOUT100_P11_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT104_P10_2_OUT
IfxGtm_TOM2_6_TOUT104_P10_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT106_P10_4_OUT
IfxGtm_TOM2_6_TOUT106_P10_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT125_P11_13_OUT
IfxGtm_TOM2_6_TOUT125_P11_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT131_P22_5_OUT
IfxGtm_TOM2_6_TOUT131_P22_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT256_P13_7_OUT
IfxGtm_TOM2_6_TOUT256_P13_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT59_P20_0_OUT
IfxGtm_TOM2_6_TOUT59_P20_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT92_P13_1_OUT
IfxGtm_TOM2_6_TOUT92_P13_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT109_P10_7_OUT
IfxGtm_TOM2_7N_TOUT109_P10_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT121_P11_4_OUT
IfxGtm_TOM2_7N_TOUT121_P11_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT134_P22_8_OUT
IfxGtm_TOM2_7N_TOUT134_P22_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT252_P13_14_OUT
IfxGtm_TOM2_7N_TOUT252_P13_14_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT55_P21_4_OUT
IfxGtm_TOM2_7N_TOUT55_P21_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT88_P14_8_OUT
IfxGtm_TOM2_7N_TOUT88_P14_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT96_P11_3_OUT
IfxGtm_TOM2_7N_TOUT96_P11_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT98_P11_9_OUT
IfxGtm_TOM2_7N_TOUT98_P11_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7_TOUT101_P11_12_OUT
IfxGtm_TOM2_7_TOUT101_P11_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7_TOUT105_P10_3_OUT
IfxGtm_TOM2_7_TOUT105_P10_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7_TOUT126_P11_14_OUT
IfxGtm_TOM2_7_TOUT126_P11_14_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7_TOUT130_P22_4_OUT
IfxGtm_TOM2_7_TOUT130_P22_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7_TOUT264_P13_15_OUT
IfxGtm_TOM2_7_TOUT264_P13_15_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7_TOUT64_P20_8_OUT
IfxGtm_TOM2_7_TOUT64_P20_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7_TOUT93_P13_2_OUT
IfxGtm_TOM2_7_TOUT93_P13_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_8_TOUT109_P10_7_OUT
IfxGtm_TOM2_8_TOUT109_P10_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_8_TOUT127_P11_15_OUT
IfxGtm_TOM2_8_TOUT127_P11_15_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_8_TOUT131_P22_5_OUT
IfxGtm_TOM2_8_TOUT131_P22_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_8_TOUT258_P14_11_OUT
IfxGtm_TOM2_8_TOUT258_P14_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_8_TOUT51_P21_0_OUT
IfxGtm_TOM2_8_TOUT51_P21_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_8_TOUT68_P20_12_OUT
IfxGtm_TOM2_8_TOUT68_P20_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_9_TOUT103_P10_1_OUT
IfxGtm_TOM2_9_TOUT103_P10_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_9_TOUT132_P22_6_OUT
IfxGtm_TOM2_9_TOUT132_P22_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_9_TOUT259_P14_14_OUT
IfxGtm_TOM2_9_TOUT259_P14_14_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_9_TOUT52_P21_1_OUT
IfxGtm_TOM2_9_TOUT52_P21_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_9_TOUT69_P20_13_OUT
IfxGtm_TOM2_9_TOUT69_P20_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_0N_TOUT134_P22_8_OUT
IfxGtm_TOM3_0N_TOUT134_P22_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_0N_TOUT161_P01_13_OUT
IfxGtm_TOM3_0N_TOUT161_P01_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_0N_TOUT181_P31_7_OUT
IfxGtm_TOM3_0N_TOUT181_P31_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_0N_TOUT213_P25_7_OUT
IfxGtm_TOM3_0N_TOUT213_P25_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_0N_TOUT8_P02_8_OUT
IfxGtm_TOM3_0N_TOUT8_P02_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_0_TOUT110_P10_8_OUT
IfxGtm_TOM3_0_TOUT110_P10_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_0_TOUT115_P01_7_OUT
IfxGtm_TOM3_0_TOUT115_P01_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_0_TOUT130_P22_4_OUT
IfxGtm_TOM3_0_TOUT130_P22_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_0_TOUT155_P01_0_OUT
IfxGtm_TOM3_0_TOUT155_P01_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_0_TOUT162_P01_8_OUT
IfxGtm_TOM3_0_TOUT162_P01_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_0_TOUT174_P31_0_OUT
IfxGtm_TOM3_0_TOUT174_P31_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_0_TOUT206_P25_0_OUT
IfxGtm_TOM3_0_TOUT206_P25_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_10_TOUT164_P01_14_OUT
IfxGtm_TOM3_10_TOUT164_P01_14_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_10_TOUT184_P31_10_OUT
IfxGtm_TOM3_10_TOUT184_P31_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_10_TOUT188_P31_14_OUT
IfxGtm_TOM3_10_TOUT188_P31_14_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_10_TOUT216_P25_10_OUT
IfxGtm_TOM3_10_TOUT216_P25_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_10_TOUT220_P25_14_OUT
IfxGtm_TOM3_10_TOUT220_P25_14_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_10_TOUT266_P10_10_OUT
IfxGtm_TOM3_10_TOUT266_P10_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_11_TOUT166_P00_14_OUT
IfxGtm_TOM3_11_TOUT166_P00_14_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_11_TOUT185_P31_11_OUT
IfxGtm_TOM3_11_TOUT185_P31_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_11_TOUT189_P31_15_OUT
IfxGtm_TOM3_11_TOUT189_P31_15_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_11_TOUT217_P25_11_OUT
IfxGtm_TOM3_11_TOUT217_P25_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_11_TOUT221_P25_15_OUT
IfxGtm_TOM3_11_TOUT221_P25_15_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_11_TOUT267_P10_14_OUT
IfxGtm_TOM3_11_TOUT267_P10_14_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_12_TOUT167_P00_13_OUT
IfxGtm_TOM3_12_TOUT167_P00_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_12_TOUT186_P31_12_OUT
IfxGtm_TOM3_12_TOUT186_P31_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_12_TOUT218_P25_12_OUT
IfxGtm_TOM3_12_TOUT218_P25_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_12_TOUT268_P10_13_OUT
IfxGtm_TOM3_12_TOUT268_P10_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_13_TOUT138_P23_6_OUT
IfxGtm_TOM3_13_TOUT138_P23_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_13_TOUT168_P00_15_OUT
IfxGtm_TOM3_13_TOUT168_P00_15_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_13_TOUT187_P31_13_OUT
IfxGtm_TOM3_13_TOUT187_P31_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_13_TOUT219_P25_13_OUT
IfxGtm_TOM3_13_TOUT219_P25_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_13_TOUT269_P10_11_OUT
IfxGtm_TOM3_13_TOUT269_P10_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_14_TOUT139_P23_7_OUT
IfxGtm_TOM3_14_TOUT139_P23_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_14_TOUT151_P02_12_OUT
IfxGtm_TOM3_14_TOUT151_P02_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_14_TOUT153_P02_13_OUT
IfxGtm_TOM3_14_TOUT153_P02_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_14_TOUT188_P31_14_OUT
IfxGtm_TOM3_14_TOUT188_P31_14_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_14_TOUT220_P25_14_OUT
IfxGtm_TOM3_14_TOUT220_P25_14_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_14_TOUT270_P10_15_OUT
IfxGtm_TOM3_14_TOUT270_P10_15_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_15_TOUT140_P32_5_OUT
IfxGtm_TOM3_15_TOUT140_P32_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_15_TOUT152_P02_15_OUT
IfxGtm_TOM3_15_TOUT152_P02_15_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_15_TOUT154_P02_14_OUT
IfxGtm_TOM3_15_TOUT154_P02_14_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_15_TOUT189_P31_15_OUT
IfxGtm_TOM3_15_TOUT189_P31_15_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_15_TOUT221_P25_15_OUT
IfxGtm_TOM3_15_TOUT221_P25_15_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1N_TOUT116_P02_9_OUT
IfxGtm_TOM3_1N_TOUT116_P02_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1N_TOUT135_P22_9_OUT
IfxGtm_TOM3_1N_TOUT135_P22_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1N_TOUT158_P01_12_OUT
IfxGtm_TOM3_1N_TOUT158_P01_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1N_TOUT178_P31_4_OUT
IfxGtm_TOM3_1N_TOUT178_P31_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1N_TOUT210_P25_4_OUT
IfxGtm_TOM3_1N_TOUT210_P25_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1N_TOUT245_P15_13_OUT
IfxGtm_TOM3_1N_TOUT245_P15_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1N_TOUT268_P10_13_OUT
IfxGtm_TOM3_1N_TOUT268_P10_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT111_P01_3_OUT
IfxGtm_TOM3_1_TOUT111_P01_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT114_P01_6_OUT
IfxGtm_TOM3_1_TOUT114_P01_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT131_P22_5_OUT
IfxGtm_TOM3_1_TOUT131_P22_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT156_P01_2_OUT
IfxGtm_TOM3_1_TOUT156_P01_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT163_P01_10_OUT
IfxGtm_TOM3_1_TOUT163_P01_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT175_P31_1_OUT
IfxGtm_TOM3_1_TOUT175_P31_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT207_P25_1_OUT
IfxGtm_TOM3_1_TOUT207_P25_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT242_P15_10_OUT
IfxGtm_TOM3_1_TOUT242_P15_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT265_P10_9_OUT
IfxGtm_TOM3_1_TOUT265_P10_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2N_TOUT117_P02_10_OUT
IfxGtm_TOM3_2N_TOUT117_P02_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2N_TOUT136_P22_10_OUT
IfxGtm_TOM3_2N_TOUT136_P22_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2N_TOUT159_P01_1_OUT
IfxGtm_TOM3_2N_TOUT159_P01_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2N_TOUT179_P31_5_OUT
IfxGtm_TOM3_2N_TOUT179_P31_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2N_TOUT211_P25_5_OUT
IfxGtm_TOM3_2N_TOUT211_P25_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2N_TOUT246_P15_14_OUT
IfxGtm_TOM3_2N_TOUT246_P15_14_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2N_TOUT267_P10_14_OUT
IfxGtm_TOM3_2N_TOUT267_P10_14_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT112_P01_4_OUT
IfxGtm_TOM3_2_TOUT112_P01_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT132_P22_6_OUT
IfxGtm_TOM3_2_TOUT132_P22_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT157_P01_15_OUT
IfxGtm_TOM3_2_TOUT157_P01_15_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT164_P01_14_OUT
IfxGtm_TOM3_2_TOUT164_P01_14_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT176_P31_2_OUT
IfxGtm_TOM3_2_TOUT176_P31_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT208_P25_2_OUT
IfxGtm_TOM3_2_TOUT208_P25_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT243_P15_11_OUT
IfxGtm_TOM3_2_TOUT243_P15_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT266_P10_10_OUT
IfxGtm_TOM3_2_TOUT266_P10_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT118_P02_11_OUT
IfxGtm_TOM3_3N_TOUT118_P02_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT137_P22_11_OUT
IfxGtm_TOM3_3N_TOUT137_P22_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT160_P01_9_OUT
IfxGtm_TOM3_3N_TOUT160_P01_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT180_P31_6_OUT
IfxGtm_TOM3_3N_TOUT180_P31_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT212_P25_6_OUT
IfxGtm_TOM3_3N_TOUT212_P25_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT212_P26_0_OUT
IfxGtm_TOM3_3N_TOUT212_P26_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT247_P15_15_OUT
IfxGtm_TOM3_3N_TOUT247_P15_15_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT270_P10_15_OUT
IfxGtm_TOM3_3N_TOUT270_P10_15_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3_TOUT113_P01_5_OUT
IfxGtm_TOM3_3_TOUT113_P01_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3_TOUT133_P22_7_OUT
IfxGtm_TOM3_3_TOUT133_P22_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3_TOUT165_P01_11_OUT
IfxGtm_TOM3_3_TOUT165_P01_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3_TOUT177_P31_3_OUT
IfxGtm_TOM3_3_TOUT177_P31_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3_TOUT209_P25_3_OUT
IfxGtm_TOM3_3_TOUT209_P25_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3_TOUT244_P15_12_OUT
IfxGtm_TOM3_3_TOUT244_P15_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3_TOUT269_P10_11_OUT
IfxGtm_TOM3_3_TOUT269_P10_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_4N_TOUT151_P02_12_OUT
IfxGtm_TOM3_4N_TOUT151_P02_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_4N_TOUT165_P01_11_OUT
IfxGtm_TOM3_4N_TOUT165_P01_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_4N_TOUT177_P31_3_OUT
IfxGtm_TOM3_4N_TOUT177_P31_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_4N_TOUT209_P25_3_OUT
IfxGtm_TOM3_4N_TOUT209_P25_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_4N_TOUT244_P15_12_OUT
IfxGtm_TOM3_4N_TOUT244_P15_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT110_P10_8_OUT
IfxGtm_TOM3_4_TOUT110_P10_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT111_P01_3_OUT
IfxGtm_TOM3_4_TOUT111_P01_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT114_P01_6_OUT
IfxGtm_TOM3_4_TOUT114_P01_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT134_P22_8_OUT
IfxGtm_TOM3_4_TOUT134_P22_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT158_P01_12_OUT
IfxGtm_TOM3_4_TOUT158_P01_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT178_P31_4_OUT
IfxGtm_TOM3_4_TOUT178_P31_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT210_P25_4_OUT
IfxGtm_TOM3_4_TOUT210_P25_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT245_P15_13_OUT
IfxGtm_TOM3_4_TOUT245_P15_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_5N_TOUT153_P02_13_OUT
IfxGtm_TOM3_5N_TOUT153_P02_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_5N_TOUT155_P01_0_OUT
IfxGtm_TOM3_5N_TOUT155_P01_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_5N_TOUT166_P00_14_OUT
IfxGtm_TOM3_5N_TOUT166_P00_14_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_5N_TOUT174_P31_0_OUT
IfxGtm_TOM3_5N_TOUT174_P31_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_5N_TOUT206_P25_0_OUT
IfxGtm_TOM3_5N_TOUT206_P25_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_5N_TOUT268_P10_13_OUT
IfxGtm_TOM3_5N_TOUT268_P10_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_5_TOUT115_P01_7_OUT
IfxGtm_TOM3_5_TOUT115_P01_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_5_TOUT135_P22_9_OUT
IfxGtm_TOM3_5_TOUT135_P22_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_5_TOUT159_P01_1_OUT
IfxGtm_TOM3_5_TOUT159_P01_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_5_TOUT179_P31_5_OUT
IfxGtm_TOM3_5_TOUT179_P31_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_5_TOUT211_P25_5_OUT
IfxGtm_TOM3_5_TOUT211_P25_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_5_TOUT246_P15_14_OUT
IfxGtm_TOM3_5_TOUT246_P15_14_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_5_TOUT265_P10_9_OUT
IfxGtm_TOM3_5_TOUT265_P10_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_6N_TOUT154_P02_14_OUT
IfxGtm_TOM3_6N_TOUT154_P02_14_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_6N_TOUT156_P01_2_OUT
IfxGtm_TOM3_6N_TOUT156_P01_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_6N_TOUT175_P31_1_OUT
IfxGtm_TOM3_6N_TOUT175_P31_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_6N_TOUT207_P25_1_OUT
IfxGtm_TOM3_6N_TOUT207_P25_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_6N_TOUT242_P15_10_OUT
IfxGtm_TOM3_6N_TOUT242_P15_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_6N_TOUT267_P10_14_OUT
IfxGtm_TOM3_6N_TOUT267_P10_14_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_6_TOUT136_P22_10_OUT
IfxGtm_TOM3_6_TOUT136_P22_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_6_TOUT160_P01_9_OUT
IfxGtm_TOM3_6_TOUT160_P01_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_6_TOUT180_P31_6_OUT
IfxGtm_TOM3_6_TOUT180_P31_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_6_TOUT212_P25_6_OUT
IfxGtm_TOM3_6_TOUT212_P25_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_6_TOUT212_P26_0_OUT
IfxGtm_TOM3_6_TOUT212_P26_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_6_TOUT247_P15_15_OUT
IfxGtm_TOM3_6_TOUT247_P15_15_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_6_TOUT266_P10_10_OUT
IfxGtm_TOM3_6_TOUT266_P10_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_7N_TOUT152_P02_15_OUT
IfxGtm_TOM3_7N_TOUT152_P02_15_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_7N_TOUT157_P01_15_OUT
IfxGtm_TOM3_7N_TOUT157_P01_15_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_7N_TOUT176_P31_2_OUT
IfxGtm_TOM3_7N_TOUT176_P31_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_7N_TOUT208_P25_2_OUT
IfxGtm_TOM3_7N_TOUT208_P25_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_7N_TOUT243_P15_11_OUT
IfxGtm_TOM3_7N_TOUT243_P15_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_7N_TOUT270_P10_15_OUT
IfxGtm_TOM3_7N_TOUT270_P10_15_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_7_TOUT137_P22_11_OUT
IfxGtm_TOM3_7_TOUT137_P22_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_7_TOUT161_P01_13_OUT
IfxGtm_TOM3_7_TOUT161_P01_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_7_TOUT181_P31_7_OUT
IfxGtm_TOM3_7_TOUT181_P31_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_7_TOUT213_P25_7_OUT
IfxGtm_TOM3_7_TOUT213_P25_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_7_TOUT248_P13_9_OUT
IfxGtm_TOM3_7_TOUT248_P13_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_7_TOUT269_P10_11_OUT
IfxGtm_TOM3_7_TOUT269_P10_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_8_TOUT162_P01_8_OUT
IfxGtm_TOM3_8_TOUT162_P01_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_8_TOUT182_P31_8_OUT
IfxGtm_TOM3_8_TOUT182_P31_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_8_TOUT186_P31_12_OUT
IfxGtm_TOM3_8_TOUT186_P31_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_8_TOUT214_P25_8_OUT
IfxGtm_TOM3_8_TOUT214_P25_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_8_TOUT218_P25_12_OUT
IfxGtm_TOM3_8_TOUT218_P25_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_8_TOUT249_P13_12_OUT
IfxGtm_TOM3_8_TOUT249_P13_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_9_TOUT163_P01_10_OUT
IfxGtm_TOM3_9_TOUT163_P01_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_9_TOUT183_P31_9_OUT
IfxGtm_TOM3_9_TOUT183_P31_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_9_TOUT187_P31_13_OUT
IfxGtm_TOM3_9_TOUT187_P31_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_9_TOUT215_P25_9_OUT
IfxGtm_TOM3_9_TOUT215_P25_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_9_TOUT219_P25_13_OUT
IfxGtm_TOM3_9_TOUT219_P25_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_9_TOUT265_P10_9_OUT
IfxGtm_TOM3_9_TOUT265_P10_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_0_TOUT155_P01_0_OUT
IfxGtm_TOM4_0_TOUT155_P01_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_0_TOUT162_P01_8_OUT
IfxGtm_TOM4_0_TOUT162_P01_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_0_TOUT190_P30_0_OUT
IfxGtm_TOM4_0_TOUT190_P30_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_0_TOUT222_P24_0_OUT
IfxGtm_TOM4_0_TOUT222_P24_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_0_TOUT250_P13_11_OUT
IfxGtm_TOM4_0_TOUT250_P13_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_10_TOUT164_P01_14_OUT
IfxGtm_TOM4_10_TOUT164_P01_14_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_10_TOUT200_P30_10_OUT
IfxGtm_TOM4_10_TOUT200_P30_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_10_TOUT204_P30_14_OUT
IfxGtm_TOM4_10_TOUT204_P30_14_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_10_TOUT232_P24_10_OUT
IfxGtm_TOM4_10_TOUT232_P24_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_10_TOUT260_P14_13_OUT
IfxGtm_TOM4_10_TOUT260_P14_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_11_TOUT166_P00_14_OUT
IfxGtm_TOM4_11_TOUT166_P00_14_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_11_TOUT201_P30_11_OUT
IfxGtm_TOM4_11_TOUT201_P30_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_11_TOUT205_P30_15_OUT
IfxGtm_TOM4_11_TOUT205_P30_15_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_11_TOUT233_P24_11_OUT
IfxGtm_TOM4_11_TOUT233_P24_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_11_TOUT261_P14_12_OUT
IfxGtm_TOM4_11_TOUT261_P14_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_12_TOUT167_P00_13_OUT
IfxGtm_TOM4_12_TOUT167_P00_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_12_TOUT202_P30_12_OUT
IfxGtm_TOM4_12_TOUT202_P30_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_12_TOUT230_P24_8_OUT
IfxGtm_TOM4_12_TOUT230_P24_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_12_TOUT234_P24_12_OUT
IfxGtm_TOM4_12_TOUT234_P24_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_12_TOUT262_P13_13_OUT
IfxGtm_TOM4_12_TOUT262_P13_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_13_TOUT168_P00_15_OUT
IfxGtm_TOM4_13_TOUT168_P00_15_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_13_TOUT203_P30_13_OUT
IfxGtm_TOM4_13_TOUT203_P30_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_13_TOUT231_P24_9_OUT
IfxGtm_TOM4_13_TOUT231_P24_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_13_TOUT235_P24_13_OUT
IfxGtm_TOM4_13_TOUT235_P24_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_13_TOUT263_P14_15_OUT
IfxGtm_TOM4_13_TOUT263_P14_15_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_14_TOUT151_P02_12_OUT
IfxGtm_TOM4_14_TOUT151_P02_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_14_TOUT153_P02_13_OUT
IfxGtm_TOM4_14_TOUT153_P02_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_14_TOUT204_P30_14_OUT
IfxGtm_TOM4_14_TOUT204_P30_14_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_14_TOUT232_P24_10_OUT
IfxGtm_TOM4_14_TOUT232_P24_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_14_TOUT236_P24_14_OUT
IfxGtm_TOM4_14_TOUT236_P24_14_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_14_TOUT264_P13_15_OUT
IfxGtm_TOM4_14_TOUT264_P13_15_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_15_TOUT152_P02_15_OUT
IfxGtm_TOM4_15_TOUT152_P02_15_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_15_TOUT154_P02_14_OUT
IfxGtm_TOM4_15_TOUT154_P02_14_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_15_TOUT205_P30_15_OUT
IfxGtm_TOM4_15_TOUT205_P30_15_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_15_TOUT233_P24_11_OUT
IfxGtm_TOM4_15_TOUT233_P24_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_15_TOUT237_P24_15_OUT
IfxGtm_TOM4_15_TOUT237_P24_15_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_1_TOUT156_P01_2_OUT
IfxGtm_TOM4_1_TOUT156_P01_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_1_TOUT163_P01_10_OUT
IfxGtm_TOM4_1_TOUT163_P01_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_1_TOUT191_P30_1_OUT
IfxGtm_TOM4_1_TOUT191_P30_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_1_TOUT223_P24_1_OUT
IfxGtm_TOM4_1_TOUT223_P24_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_1_TOUT251_P13_10_OUT
IfxGtm_TOM4_1_TOUT251_P13_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_2_TOUT157_P01_15_OUT
IfxGtm_TOM4_2_TOUT157_P01_15_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_2_TOUT164_P01_14_OUT
IfxGtm_TOM4_2_TOUT164_P01_14_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_2_TOUT192_P30_2_OUT
IfxGtm_TOM4_2_TOUT192_P30_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_2_TOUT224_P24_2_OUT
IfxGtm_TOM4_2_TOUT224_P24_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_2_TOUT252_P13_14_OUT
IfxGtm_TOM4_2_TOUT252_P13_14_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_3_TOUT165_P01_11_OUT
IfxGtm_TOM4_3_TOUT165_P01_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_3_TOUT193_P30_3_OUT
IfxGtm_TOM4_3_TOUT193_P30_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_3_TOUT225_P24_3_OUT
IfxGtm_TOM4_3_TOUT225_P24_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_3_TOUT253_P13_4_OUT
IfxGtm_TOM4_3_TOUT253_P13_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_4_TOUT111_P01_3_OUT
IfxGtm_TOM4_4_TOUT111_P01_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_4_TOUT158_P01_12_OUT
IfxGtm_TOM4_4_TOUT158_P01_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_4_TOUT194_P30_4_OUT
IfxGtm_TOM4_4_TOUT194_P30_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_4_TOUT226_P24_4_OUT
IfxGtm_TOM4_4_TOUT226_P24_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_4_TOUT254_P13_5_OUT
IfxGtm_TOM4_4_TOUT254_P13_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_4_TOUT8_P02_8_OUT
IfxGtm_TOM4_4_TOUT8_P02_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_5_TOUT116_P02_9_OUT
IfxGtm_TOM4_5_TOUT116_P02_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_5_TOUT159_P01_1_OUT
IfxGtm_TOM4_5_TOUT159_P01_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_5_TOUT195_P30_5_OUT
IfxGtm_TOM4_5_TOUT195_P30_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_5_TOUT227_P24_5_OUT
IfxGtm_TOM4_5_TOUT227_P24_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_5_TOUT255_P13_6_OUT
IfxGtm_TOM4_5_TOUT255_P13_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_6_TOUT117_P02_10_OUT
IfxGtm_TOM4_6_TOUT117_P02_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_6_TOUT160_P01_9_OUT
IfxGtm_TOM4_6_TOUT160_P01_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_6_TOUT196_P30_6_OUT
IfxGtm_TOM4_6_TOUT196_P30_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_6_TOUT228_P24_6_OUT
IfxGtm_TOM4_6_TOUT228_P24_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_6_TOUT256_P13_7_OUT
IfxGtm_TOM4_6_TOUT256_P13_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_7_TOUT118_P02_11_OUT
IfxGtm_TOM4_7_TOUT118_P02_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_7_TOUT161_P01_13_OUT
IfxGtm_TOM4_7_TOUT161_P01_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_7_TOUT197_P30_7_OUT
IfxGtm_TOM4_7_TOUT197_P30_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_7_TOUT229_P24_7_OUT
IfxGtm_TOM4_7_TOUT229_P24_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_7_TOUT264_P13_15_OUT
IfxGtm_TOM4_7_TOUT264_P13_15_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_8_TOUT162_P01_8_OUT
IfxGtm_TOM4_8_TOUT162_P01_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_8_TOUT198_P30_8_OUT
IfxGtm_TOM4_8_TOUT198_P30_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_8_TOUT202_P30_12_OUT
IfxGtm_TOM4_8_TOUT202_P30_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_8_TOUT230_P24_8_OUT
IfxGtm_TOM4_8_TOUT230_P24_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_8_TOUT258_P14_11_OUT
IfxGtm_TOM4_8_TOUT258_P14_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_9_TOUT163_P01_10_OUT
IfxGtm_TOM4_9_TOUT163_P01_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_9_TOUT199_P30_9_OUT
IfxGtm_TOM4_9_TOUT199_P30_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_9_TOUT203_P30_13_OUT
IfxGtm_TOM4_9_TOUT203_P30_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_9_TOUT231_P24_9_OUT
IfxGtm_TOM4_9_TOUT231_P24_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_9_TOUT259_P14_14_OUT
IfxGtm_TOM4_9_TOUT259_P14_14_OUT. More...

Detailed Description

GTM I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_PinMap.h.


iLLD_TC38A: IfxGtm_Atom_Dtm_PwmHl.h File Reference

  • Gtm
  • Atom
  • Dtm_PwmHl
Data Structures | Macros | Typedefs | Functions
IfxGtm_Atom_Dtm_PwmHl.h File Reference
iLLD » GTM

GTM DTM_PWMHL details. More...

#include "StdIf/IfxStdIf_PwmHl.h"
#include "Gtm/Atom/Timer/IfxGtm_Atom_Timer.h"
#include "Gtm/Std/IfxGtm_Dtm.h"
Include dependency graph for IfxGtm_Atom_Dtm_PwmHl.h:

Go to the source code of this file.

Data Structures

struct | IfxGtm_Atom_Dtm_PwmHl_Base
Multi-channels PWM object definition (channels only) More...
struct | IfxGtm_Atom_Dtm_PwmHl_Config
GTM ATOM: PWM HL configuration. More...
struct | IfxGtm_Atom_Dtm_PwmHl_Mode
Structure for PWM configuration. More...
struct | IfxGtm_Atom_Dtm_PwmHl_s
GTM ATOM PWM driver. More...

Macros

#define | IFXGTM_ATOM_DTM_PWMHL_MAX_NUM_CHANNELS (8)
Maximal number of channels handled by the driver. One channel has a top and bottom pwm output. More...
#define | IFXGTM_ATOM_DTM_PWMHL_MAX_DEADTIME_IN_TICKS (1023)

Typedefs

typedef struct IfxGtm_Atom_Dtm_PwmHl_s | IfxGtm_AtomDtm_PwmHl
typedef void(* | IfxGtm_Atom_Dtm_PwmHl_Update) (IfxGtm_AtomDtm_PwmHl *driver, Ifx_TimerValue *tOn)
typedef void(* | IfxGtm_Atom_Dtm_PwmHl_UpdateShift) (IfxGtm_AtomDtm_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
typedef void(* | IfxGtm_Atom_Dtm_PwmHl_UpdatePulse) (IfxGtm_AtomDtm_PwmHl *driver, float32 *tOn, float32 *offset)

Functions

IFX_EXTERN boolean | IfxGtm_Atom_Dtm_PwmHl_init (IfxGtm_AtomDtm_PwmHl *driver, const IfxGtm_Atom_Dtm_PwmHl_Config *config)
Initializes the timer object note : To ensure that the channels counter are reset by the timer and do not overflow, leading to random signal on the output, the timer must be started before the call to this function. More...
IFX_EXTERN void | IfxGtm_Atom_Dtm_PwmHl_initConfig (IfxGtm_Atom_Dtm_PwmHl_Config *config)
Initialize the configuration structure to default. More...
IFX_EXTERN float32 | IfxGtm_Atom_Dtm_PwmHl_getDeadtime (IfxGtm_AtomDtm_PwmHl *driver)
Returns the dead time. More...
IFX_EXTERN Ifx_TickTime | IfxGtm_Atom_Dtm_PwmHl_getDeadtimeTick (IfxGtm_AtomDtm_PwmHl *driver)
IFX_EXTERN float32 | IfxGtm_Atom_Dtm_PwmHl_getMinPulse (IfxGtm_AtomDtm_PwmHl *driver)
Returns the minimum pulse. More...
IFX_EXTERN Ifx_Pwm_Mode | IfxGtm_Atom_Dtm_PwmHl_getMode (IfxGtm_AtomDtm_PwmHl *driver)
Returns Pwm mode. More...
IFX_EXTERN boolean | IfxGtm_Atom_Dtm_PwmHl_setDeadtime (IfxGtm_AtomDtm_PwmHl *driver, float32 deadtime)
Sets the dead time. More...
IFX_EXTERN boolean | IfxGtm_Atom_Dtm_PwmHl_setMinPulse (IfxGtm_AtomDtm_PwmHl *driver, float32 minPulse)
Sets the minimum pulse. More...
IFX_EXTERN boolean | IfxGtm_Atom_Dtm_PwmHl_setMode (IfxGtm_AtomDtm_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate() More...
IFX_EXTERN void | IfxGtm_Atom_Dtm_PwmHl_setOnTimeAndShift (IfxGtm_AtomDtm_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets the ON time and Shift. More...
IFX_EXTERN void | IfxGtm_Atom_Dtm_PwmHl_setPulse (IfxGtm_AtomDtm_PwmHl *driver, float32 *tOn, float32 *offset)
Sets the ON time and offset, all switched are independent. More...
IFX_EXTERN void | IfxGtm_Atom_Dtm_PwmHl_setupChannels (IfxGtm_AtomDtm_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set up channels. More...
IFX_EXTERN boolean | IfxGtm_Atom_Dtm_PwmHl_stdIfPwmHlInit (IfxStdIf_PwmHl *stdif, IfxGtm_AtomDtm_PwmHl *driver)
Initialises the statndard interface Pwm. More...

Detailed Description

GTM DTM_PWMHL details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Atom_Dtm_PwmHl.h.

Data Structure Documentation

◆ IfxGtm_Atom_Dtm_PwmHl_Base

struct IfxGtm_Atom_Dtm_PwmHl_Base

Multi-channels PWM object definition (channels only)

Definition at line 123 of file IfxGtm_Atom_Dtm_PwmHl.h.

Data Fields
Ifx_ActiveState | ccxActiveState | Top PWM active state.
uint8 | channelCount | Number of PWM channels, one channel is made of a top and bottom channel.
Ifx_ActiveState | coutxActiveState | Bottom PWM active state.
Ifx_TimerValue | deadtime | Dead time between the top and bottom channel in ticks.
boolean | inverted | Flag indicating the center aligned inverted mode (TRUE)
Ifx_TimerValue | maxPulse | internal parameter
Ifx_TimerValue | minPulse | minimum pulse that is output, shorter pulse time will be output as 0% duty cycle
Ifx_Pwm_Mode | mode | actual PWM mode
sint8 | setMode | A non zero flag indicates that the PWM mode is being modified.

◆ IfxGtm_Atom_Dtm_PwmHl_Config

struct IfxGtm_Atom_Dtm_PwmHl_Config

GTM ATOM: PWM HL configuration.

Definition at line 138 of file IfxGtm_Atom_Dtm_PwmHl.h.

Collaboration diagram for IfxGtm_Atom_Dtm_PwmHl_Config:
[legend]
Data Fields
IfxGtm_Atom | atom | ATOM unit used.
IfxStdIf_PwmHl_Config | base | PWM HL standard interface configuration.
IFX_CONST IfxGtm_Atom_ToutMapP * | ccx | Pointer to an array of size pwmHl.channels.channelCount containing the channels used. Channels must be adjacent channels.
IFX_CONST IfxGtm_Atom_ToutMapP * | coutx | Pointer to an array of size pwmHl.channels.channelCount containing the channels used. Channels must be adjacent channels.
IfxGtm_Dtm_ClockSource | deadTimeClock | Clock used for the dead time generation.
boolean | initPins | TRUE: Initialize pins in driver, FALSE: Don't initialize pins in driver. User handles separately.
IfxGtm_Atom_Timer * | timer | Pointer to the linked timer object.

◆ IfxGtm_Atom_Dtm_PwmHl_Mode

struct IfxGtm_Atom_Dtm_PwmHl_Mode

Structure for PWM configuration.

Definition at line 151 of file IfxGtm_Atom_Dtm_PwmHl.h.

Collaboration diagram for IfxGtm_Atom_Dtm_PwmHl_Mode:
[legend]
Data Fields
boolean | inverted | Inverted configuration for the selected mode.
Ifx_Pwm_Mode | mode | PWM mode.
IfxGtm_Atom_Dtm_PwmHl_Update | update | update call back function for the selected mode
IfxGtm_Atom_Dtm_PwmHl_UpdateShift | updateAndShift | update shift call back function for the selected mode
IfxGtm_Atom_Dtm_PwmHl_UpdatePulse | updatePulse | update pulse call back function for the selected mode

◆ IfxGtm_Atom_Dtm_PwmHl_s

struct IfxGtm_Atom_Dtm_PwmHl_s

GTM ATOM PWM driver.

Definition at line 162 of file IfxGtm_Atom_Dtm_PwmHl.h.

Collaboration diagram for IfxGtm_Atom_Dtm_PwmHl_s:
[legend]
Data Fields
Ifx_GTM_ATOM_AGC * | agc | AGC unit used.
Ifx_GTM_ATOM * | atom | ATOM unit used.
IfxGtm_Atom_Dtm_PwmHl_Base | base | Multi-channels PWM object definition (channels only)
IfxGtm_Atom_Ch | ccx[IFXGTM_ATOM_DTM_PWMHL_MAX_NUM_CHANNELS] | ATOM channels used for the CCCX outputs.
IfxGtm_Atom_Ch | coutx[IFXGTM_ATOM_DTM_PWMHL_MAX_NUM_CHANNELS] | ATOM channels used for the OUTX outputs.
Ifx_GTM_CDTM_DTM * | dtm[IFXGTM_ATOM_DTM_PWMHL_MAX_NUM_CHANNELS] | Dead time module (DTM) used. Matching the Atom.
IfxGtm_Dtm_Ch | dtmChannel[IFXGTM_ATOM_DTM_PWMHL_MAX_NUM_CHANNELS] | DTM channel used.
float32 | dtmClockFreq | Deadtime module input clock frequency (cached value)
IfxGtm_Atom_Timer * | timer | Pointer to the linked timer object.
IfxGtm_Atom_Dtm_PwmHl_Update | update | update call back function for the selected mode
IfxGtm_Atom_Dtm_PwmHl_UpdateShift | updateAndShift | update shift call back function for the selected mode
IfxGtm_Atom_Dtm_PwmHl_UpdatePulse | updatePulse | update pulse call back function for the selected mode

Macro Definition Documentation

◆ IFXGTM_ATOM_DTM_PWMHL_MAX_DEADTIME_IN_TICKS

#define IFXGTM_ATOM_DTM_PWMHL_MAX_DEADTIME_IN_TICKS (1023)

Definition at line 103 of file IfxGtm_Atom_Dtm_PwmHl.h.

Referenced by IfxGtm_Atom_Dtm_PwmHl_setDeadtime().

◆ IFXGTM_ATOM_DTM_PWMHL_MAX_NUM_CHANNELS

#define IFXGTM_ATOM_DTM_PWMHL_MAX_NUM_CHANNELS (8)

Maximal number of channels handled by the driver. One channel has a top and bottom pwm output.

Definition at line 101 of file IfxGtm_Atom_Dtm_PwmHl.h.

Referenced by IfxGtm_Atom_Dtm_PwmHl_init().

Typedef Documentation

◆ IfxGtm_Atom_Dtm_PwmHl_Update

typedef void(* IfxGtm_Atom_Dtm_PwmHl_Update) (IfxGtm_AtomDtm_PwmHl *driver, Ifx_TimerValue *tOn)

Definition at line 111 of file IfxGtm_Atom_Dtm_PwmHl.h.

◆ IfxGtm_Atom_Dtm_PwmHl_UpdatePulse

typedef void(* IfxGtm_Atom_Dtm_PwmHl_UpdatePulse) (IfxGtm_AtomDtm_PwmHl *driver, float32 *tOn, float32 *offset)

Definition at line 115 of file IfxGtm_Atom_Dtm_PwmHl.h.

◆ IfxGtm_Atom_Dtm_PwmHl_UpdateShift

typedef void(* IfxGtm_Atom_Dtm_PwmHl_UpdateShift) (IfxGtm_AtomDtm_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)

Definition at line 113 of file IfxGtm_Atom_Dtm_PwmHl.h.

◆ IfxGtm_AtomDtm_PwmHl

typedef struct IfxGtm_Atom_Dtm_PwmHl_s IfxGtm_AtomDtm_PwmHl

Definition at line 109 of file IfxGtm_Atom_Dtm_PwmHl.h.

Function Documentation

◆ IfxGtm_Atom_Dtm_PwmHl_getDeadtime()

IFX_EXTERN float32 IfxGtm_Atom_Dtm_PwmHl_getDeadtime ( IfxGtm_AtomDtm_PwmHl * driver )

Returns the dead time.

Parameters
driver driver GTM ATOM PWM driver
Returns
Dead Time

Definition at line 284 of file IfxGtm_Atom_Dtm_PwmHl.c.

Referenced by IfxGtm_Atom_Dtm_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_Dtm_PwmHl_getDeadtimeTick()

IFX_EXTERN Ifx_TickTime IfxGtm_Atom_Dtm_PwmHl_getDeadtimeTick ( IfxGtm_AtomDtm_PwmHl * driver )

Definition at line 290 of file IfxGtm_Atom_Dtm_PwmHl.c.

Referenced by IfxGtm_Atom_Dtm_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_Dtm_PwmHl_getMinPulse()

IFX_EXTERN float32 IfxGtm_Atom_Dtm_PwmHl_getMinPulse ( IfxGtm_AtomDtm_PwmHl * driver )

Returns the minimum pulse.

Parameters
driver driver GTM ATOM PWM driver
Returns
Min Pulse

Definition at line 296 of file IfxGtm_Atom_Dtm_PwmHl.c.

Referenced by IfxGtm_Atom_Dtm_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_Dtm_PwmHl_getMode()

IFX_EXTERN Ifx_Pwm_Mode IfxGtm_Atom_Dtm_PwmHl_getMode ( IfxGtm_AtomDtm_PwmHl * driver )

Returns Pwm mode.

Parameters
driver driver GTM ATOM PWM driver
Returns
Pwm mode

Definition at line 302 of file IfxGtm_Atom_Dtm_PwmHl.c.

Referenced by IfxGtm_Atom_Dtm_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_Dtm_PwmHl_init()

IFX_EXTERN boolean IfxGtm_Atom_Dtm_PwmHl_init | ( | IfxGtm_AtomDtm_PwmHl * | driver,
 |  | const IfxGtm_Atom_Dtm_PwmHl_Config * | config
 | ) |  |

Initializes the timer object note : To ensure that the channels counter are reset by the timer and do not overflow, leading to random signal on the output, the timer must be started before the call to this function.

Parameters
driver | driver GTM ATOM PWM driver
config | config GTM ATOM: PWM HL configuration
Returns
TRUE on success else FALSE

Definition at line 159 of file IfxGtm_Atom_Dtm_PwmHl.c.

◆ IfxGtm_Atom_Dtm_PwmHl_initConfig()

IFX_EXTERN void IfxGtm_Atom_Dtm_PwmHl_initConfig ( IfxGtm_Atom_Dtm_PwmHl_Config * config )

Initialize the configuration structure to default.

Parameters
config config Channel configuration. This parameter is Initialised by the function
Returns
None

Definition at line 272 of file IfxGtm_Atom_Dtm_PwmHl.c.

◆ IfxGtm_Atom_Dtm_PwmHl_setDeadtime()

IFX_EXTERN boolean IfxGtm_Atom_Dtm_PwmHl_setDeadtime | ( | IfxGtm_AtomDtm_PwmHl * | driver,
 |  | float32 | deadtime
 | ) |  |

Sets the dead time.

Parameters
driver | driver GTM ATOM PWM driver
deadtime | deadtime Dead time value
Returns
TRUE on success else FALSE

Definition at line 308 of file IfxGtm_Atom_Dtm_PwmHl.c.

Referenced by IfxGtm_Atom_Dtm_PwmHl_init(), and IfxGtm_Atom_Dtm_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_Dtm_PwmHl_setMinPulse()

IFX_EXTERN boolean IfxGtm_Atom_Dtm_PwmHl_setMinPulse | ( | IfxGtm_AtomDtm_PwmHl * | driver,
 |  | float32 | minPulse
 | ) |  |

Sets the minimum pulse.

Parameters
driver | driver GTM ATOM PWM driver
minPulse | minPulse Minimum pulse
Returns
TRUE on success else FALSE

Definition at line 331 of file IfxGtm_Atom_Dtm_PwmHl.c.

Referenced by IfxGtm_Atom_Dtm_PwmHl_init(), and IfxGtm_Atom_Dtm_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_Dtm_PwmHl_setMode()

IFX_EXTERN boolean IfxGtm_Atom_Dtm_PwmHl_setMode | ( | IfxGtm_AtomDtm_PwmHl * | driver,
 |  | Ifx_Pwm_Mode | mode
 | ) |  |

Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate()

Parameters
driver | driver GTM ATOM PWM driver
mode | mode Pwm mode
Returns
TRUE on success else FALSE

Definition at line 342 of file IfxGtm_Atom_Dtm_PwmHl.c.

Referenced by IfxGtm_Atom_Dtm_PwmHl_init(), and IfxGtm_Atom_Dtm_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_Dtm_PwmHl_setOnTimeAndShift()

IFX_EXTERN void IfxGtm_Atom_Dtm_PwmHl_setOnTimeAndShift | ( | IfxGtm_AtomDtm_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn,
 |  | Ifx_TimerValue * | shift
 | ) |  |

Sets the ON time and Shift.

Parameters
driver | driver GTM ATOM PWM driver
tOn | tOn ON time
shift | Shift value in ticks
Returns
None

Definition at line 384 of file IfxGtm_Atom_Dtm_PwmHl.c.

Referenced by IfxGtm_Atom_Dtm_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_Dtm_PwmHl_setPulse()

IFX_EXTERN void IfxGtm_Atom_Dtm_PwmHl_setPulse | ( | IfxGtm_AtomDtm_PwmHl * | driver,
 |  | float32 * | tOn,
 |  | float32 * | offset
 | ) |  |

Sets the ON time and offset, all switched are independent.

Parameters
driver | driver GTM ATOM PWM driver
tOn | tOn ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
offset | offset Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
Returns
None

Definition at line 390 of file IfxGtm_Atom_Dtm_PwmHl.c.

Referenced by IfxGtm_Atom_Dtm_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_Dtm_PwmHl_setupChannels()

IFX_EXTERN void IfxGtm_Atom_Dtm_PwmHl_setupChannels | ( | IfxGtm_AtomDtm_PwmHl * | driver,
 |  | boolean * | activeCh,
 |  | boolean * | stuckSt
 | ) |  |

Set up channels.

Parameters
driver | driver GTM ATOM PWM driver
activeCh | Active channel
stuckSt | Stuck state
Returns
None

Definition at line 396 of file IfxGtm_Atom_Dtm_PwmHl.c.

Referenced by IfxGtm_Atom_Dtm_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_Dtm_PwmHl_stdIfPwmHlInit()

IFX_EXTERN boolean IfxGtm_Atom_Dtm_PwmHl_stdIfPwmHlInit | ( | IfxStdIf_PwmHl * | stdif,
 |  | IfxGtm_AtomDtm_PwmHl * | driver
 | ) |  |

Initialises the statndard interface Pwm.

Parameters
stdif | Standard interface object, will be initialized by the function
driver | Interface driver to be used by the standard interface. must be initialised separately
Returns
TRUE on success else FALSE

Definition at line 405 of file IfxGtm_Atom_Dtm_PwmHl.c.


iLLD_TC38A: IfxGtm_Atom_Pwm.h File Reference

  • Gtm
  • Atom
  • Pwm
Data Structures | Functions
IfxGtm_Atom_Pwm.h File Reference
iLLD » GTM

GTM PWM details. More...

#include "_PinMap/IfxGtm_PinMap.h"
#include "Gtm/Std/IfxGtm_Atom.h"
#include "Gtm/Std/IfxGtm_Cmu.h"
#include "Gtm/Std/IfxGtm_Dtm.h"
#include "Cpu/Std/IfxCpu.h"
Include dependency graph for IfxGtm_Atom_Pwm.h:

Go to the source code of this file.

Data Structures

struct | IfxGtm_Atom_Pwm_Interrupt
configuration structure for interrupts More...
struct | IfxGtm_Atom_Pwm_pin
configuration structure for output pin More...
struct | IfxGtm_Atom_Pwm_Config
Configuration structure. More...
struct | IfxGtm_Atom_Pwm_Driver
Driver Handle. More...

Functions

IFX_EXTERN boolean | IfxGtm_Atom_Pwm_init (IfxGtm_Atom_Pwm_Driver *driver, const IfxGtm_Atom_Pwm_Config *config)
Initialises the Timer object. More...
IFX_EXTERN void | IfxGtm_Atom_Pwm_initConfig (IfxGtm_Atom_Pwm_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default. More...
IFX_EXTERN void | IfxGtm_Atom_Pwm_start (IfxGtm_Atom_Pwm_Driver *driver, boolean immediate)
Starts the PWM generation from the configured channel. More...
IFX_EXTERN void | IfxGtm_Atom_Pwm_stop (IfxGtm_Atom_Pwm_Driver *driver, boolean immediate)
Stops the PWM generation from the configured channel. More...

Detailed Description

GTM PWM details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Atom_Pwm.h.


iLLD_TC38A: IfxGtm_Atom_PwmHl.h File Reference

  • Gtm
  • Atom
  • PwmHl
Data Structures | Macros | Typedefs | Functions
IfxGtm_Atom_PwmHl.h File Reference
iLLD » GTM

GTM PWMHL details. More...

#include "StdIf/IfxStdIf_PwmHl.h"
#include "Gtm/Atom/Timer/IfxGtm_Atom_Timer.h"
Include dependency graph for IfxGtm_Atom_PwmHl.h:

Go to the source code of this file.

Data Structures

struct | IfxGtm_Atom_PwmHl_Base
Multi-channels PWM object definition (channels only) More...
struct | IfxGtm_Atom_PwmHl_Config
GTM ATOM: PWM HL configuration. More...
struct | IfxGtm_Atom_PwmHl_Mode
Structure for PWM configuration. More...
struct | IfxGtm_Atom_PwmHl_s
GTM ATOM PWM driver. More...

Macros

#define IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS (8)
Maximal number of channels handled by the driver. One channel has a top and bottom pwm output. More...

Typedefs

typedef struct IfxGtm_Atom_PwmHl_s | IfxGtm_Atom_PwmHl
typedef void(* | IfxGtm_Atom_PwmHl_Update) (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
typedef void(* | IfxGtm_Atom_PwmHl_UpdateShift) (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
typedef void(* | IfxGtm_Atom_PwmHl_UpdatePulse) (IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)

Functions

IFX_EXTERN boolean | IfxGtm_Atom_PwmHl_init (IfxGtm_Atom_PwmHl *driver, const IfxGtm_Atom_PwmHl_Config *config)
Initializes the timer object note To ensure that the channels counter are reset by the timer and do not overflow, leading to random signal on the output, the timer must be started before the call to this function. More...
IFX_EXTERN void | IfxGtm_Atom_PwmHl_initConfig (IfxGtm_Atom_PwmHl_Config *config)
Initialize the configuration structure to default. More...
IFX_EXTERN float32 | IfxGtm_Atom_PwmHl_getDeadtime (IfxGtm_Atom_PwmHl *driver)
Returns the dead time. More...
IFX_EXTERN float32 | IfxGtm_Atom_PwmHl_getMinPulse (IfxGtm_Atom_PwmHl *driver)
Returns the minimum pulse. More...
IFX_EXTERN Ifx_Pwm_Mode | IfxGtm_Atom_PwmHl_getMode (IfxGtm_Atom_PwmHl *driver)
Returns Pwm mode. More...
IFX_EXTERN boolean | IfxGtm_Atom_PwmHl_setDeadtime (IfxGtm_Atom_PwmHl *driver, float32 deadtime)
Sets the dead time. More...
IFX_EXTERN boolean | IfxGtm_Atom_PwmHl_setMinPulse (IfxGtm_Atom_PwmHl *driver, float32 minPulse)
Sets the minimum pulse. More...
IFX_EXTERN boolean | IfxGtm_Atom_PwmHl_setMode (IfxGtm_Atom_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate() More...
IFX_EXTERN void | IfxGtm_Atom_PwmHl_setOnTime (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Sets the ON time. More...
IFX_EXTERN void | IfxGtm_Atom_PwmHl_setOnTimeAndShift (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets the ON time and Shift. More...
IFX_EXTERN void | IfxGtm_Atom_PwmHl_setPulse (IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
Sets the ON time and offset, all switched are independent. More...
IFX_EXTERN void | IfxGtm_Atom_PwmHl_setupChannels (IfxGtm_Atom_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set up channels. More...
IFX_EXTERN boolean | IfxGtm_Atom_PwmHl_stdIfPwmHlInit (IfxStdIf_PwmHl *stdif, IfxGtm_Atom_PwmHl *driver)
Initialises the statndard interface Pwm. More...

Detailed Description

GTM PWMHL details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Atom_PwmHl.h.

Macro Definition Documentation

◆ IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS

#define IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS (8)

Maximal number of channels handled by the driver. One channel has a top and bottom pwm output.

Definition at line 106 of file IfxGtm_Atom_PwmHl.h.

Referenced by IfxGtm_Atom_Dtm_PwmHl_init(), and IfxGtm_Atom_PwmHl_init().

Typedef Documentation

◆ IfxGtm_Atom_PwmHl

typedef struct IfxGtm_Atom_PwmHl_s IfxGtm_Atom_PwmHl

Definition at line 112 of file IfxGtm_Atom_PwmHl.h.

◆ IfxGtm_Atom_PwmHl_Update

typedef void(* IfxGtm_Atom_PwmHl_Update) (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)

Definition at line 114 of file IfxGtm_Atom_PwmHl.h.

◆ IfxGtm_Atom_PwmHl_UpdatePulse

typedef void(* IfxGtm_Atom_PwmHl_UpdatePulse) (IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)

Definition at line 118 of file IfxGtm_Atom_PwmHl.h.

◆ IfxGtm_Atom_PwmHl_UpdateShift

typedef void(* IfxGtm_Atom_PwmHl_UpdateShift) (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)

Definition at line 116 of file IfxGtm_Atom_PwmHl.h.


iLLD_TC38A: IfxGtm_Atom_Timer.h File Reference

  • Gtm
  • Atom
  • Timer
Data Structures | Functions
IfxGtm_Atom_Timer.h File Reference
iLLD » GTM

GTM TIMER details. More...

#include "_PinMap/IfxGtm_PinMap.h"
#include "Gtm/Std/IfxGtm_Atom.h"
#include "Gtm/Std/IfxGtm_Cmu.h"
#include "Gtm/Std/IfxGtm_Dtm.h"
#include "StdIf/IfxStdIf_Timer.h"
Include dependency graph for IfxGtm_Atom_Timer.h:

Go to the source code of this file.

Data Structures

struct | IfxGtm_Atom_Timer_Base
Structure for the timer base. More...
struct | IfxGtm_Atom_Timer
TOM Timer interface. More...
struct | IfxGtm_Atom_Timer_Config
Configuration structure for TOM Timer. More...

Functions

IFX_EXTERN boolean | IfxGtm_Atom_Timer_acknowledgeTimerIrq (IfxGtm_Atom_Timer *driver)
Returns the timer event. More...
IFX_EXTERN boolean | IfxGtm_Atom_Timer_acknowledgeTriggerIrq (IfxGtm_Atom_Timer *driver)
Returns the trigger event. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_addToChannelMask (IfxGtm_Atom_Timer *driver, IfxGtm_Atom_Ch channel)
Add a channel to the channel mask Channels present in the mask are started, stopped, updated at the same time as the timer: IfxGtm_Atom_Timer_applyUpdate, IfxGtm_Atom_Timer_disableUpdate, IfxGtm_Atom_Timer_stop, IfxGtm_Atom_Timer_run. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_applyUpdate (IfxGtm_Atom_Timer *driver)
Enables the transfer of the shadow registers. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_disableUpdate (IfxGtm_Atom_Timer *driver)
Disables the upadte. More...
IFX_EXTERN float32 | IfxGtm_Atom_Timer_getFrequency (IfxGtm_Atom_Timer *driver)
Returns the frequency. More...
IFX_EXTERN float32 | IfxGtm_Atom_Timer_getInputFrequency (IfxGtm_Atom_Timer *driver)
Returns the Input frequncy. More...
IFX_EXTERN Ifx_TimerValue | IfxGtm_Atom_Timer_getPeriod (IfxGtm_Atom_Timer *driver)
Returns the period of the timer. More...
IFX_EXTERN float32 | IfxGtm_Atom_Timer_getResolution (IfxGtm_Atom_Timer *driver)
Returns the resolution. More...
IFX_EXTERN Ifx_TimerValue | IfxGtm_Atom_Timer_getTrigger (IfxGtm_Atom_Timer *driver)
Returns the trigger point. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_run (IfxGtm_Atom_Timer *driver)
Runs the timer. More...
IFX_EXTERN boolean | IfxGtm_Atom_Timer_setFrequency (IfxGtm_Atom_Timer *driver, float32 frequency)
Sets the frequency. More...
IFX_EXTERN boolean | IfxGtm_Atom_Timer_setPeriod (IfxGtm_Atom_Timer *driver, Ifx_TimerValue period)
Sets the period for the timer. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_setSingleMode (IfxGtm_Atom_Timer *driver, boolean enabled)
Sets the single shot mode of the timer. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_setTrigger (IfxGtm_Atom_Timer *driver, Ifx_TimerValue triggerPoint)
Sets the trigger. More...
IFX_EXTERN boolean | IfxGtm_Atom_Timer_stdIfTimerInit (IfxStdIf_Timer *stdif, IfxGtm_Atom_Timer *driver)
Initializes the standard interface timer. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_stop (IfxGtm_Atom_Timer *driver)
Stops the timer. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_updateInputFrequency (IfxGtm_Atom_Timer *driver)
Updates the input frequency. More...
IFX_EXTERN Ifx_TimerValue | IfxGtm_Atom_Timer_getOffset (IfxGtm_Atom_Timer *driver)
Returns the initial timer offset in ticks. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Atom_Timer_getPointer (IfxGtm_Atom_Timer *driver)
Returns the pointer to timer channel. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Atom_Timer_getTriggerPointer (IfxGtm_Atom_Timer *driver)
Returns the pointer to trigger channel. More...
IFX_EXTERN boolean | IfxGtm_Atom_Timer_init (IfxGtm_Atom_Timer *driver, const IfxGtm_Atom_Timer_Config *config)
Initialises the timer object. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_initConfig (IfxGtm_Atom_Timer_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default. More...

Detailed Description

GTM TIMER details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Atom_Timer.h.


iLLD_TC38A: IfxGtm.h File Reference

  • Gtm
  • Std
Enumerations | Functions
IfxGtm.h File Reference
iLLD » GTM

GTM basic functionality. More...

#include "_Impl/IfxGtm_cfg.h"
Include dependency graph for IfxGtm.h:

Go to the source code of this file.

Enumerations

enum IfxGtm_IrqMode {
IfxGtm_IrqMode_level = 0,
IfxGtm_IrqMode_pulse = 1,
IfxGtm_IrqMode_pulseNotify = 2,
IfxGtm_IrqMode_singlePulse = 3
}
Enum for GTM interrupt modes. More...
enum IfxGtm_SuspendMode {
IfxGtm_SuspendMode_none = 0,
IfxGtm_SuspendMode_hard = 1,
IfxGtm_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...

Functions

IFX_INLINE boolean | IfxGtm_isEnabled (Ifx_GTM *gtm)
Returs the status of module enabled or disabled. More...
IFX_INLINE boolean | IfxGtm_isModuleSuspended (Ifx_GTM *gtm)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxGtm_setSuspendMode (Ifx_GTM *gtm, IfxGtm_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN void | IfxGtm_disable (Ifx_GTM *gtm)
Disables the module. More...
IFX_EXTERN void | IfxGtm_enable (Ifx_GTM *gtm)
Enables the module. More...
IFX_EXTERN float32 | IfxGtm_getSysClkFrequency (void)
returns the GTM SYSCLK frequency. Refer to the Clock distribution for details on GTM SYS CLK. More...
IFX_EXTERN float32 | IfxGtm_getClusterFrequency (Ifx_GTM *gtm, IfxGtm_Cluster cluster)
returns the cluster frequency of the GTM cluster. If the cluster is disabled, then it will return 0 as frequency. More...

Detailed Description

GTM basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm.h.

Function Documentation

◆ IfxGtm_getClusterFrequency()

IFX_EXTERN float32 IfxGtm_getClusterFrequency | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Cluster | cluster
 | ) |  |

returns the cluster frequency of the GTM cluster. If the cluster is disabled, then it will return 0 as frequency.

Parameters
gtm | pointer to gtm device
cluster | index of cluster
Returns
cluster frequency

Definition at line 80 of file IfxGtm.c.

Referenced by IfxGtm_Cmu_getModuleFrequency().

◆ IfxGtm_getSysClkFrequency()

IFX_EXTERN float32 IfxGtm_getSysClkFrequency ( void )

returns the GTM SYSCLK frequency. Refer to the Clock distribution for details on GTM SYS CLK.

Returns
sysFreq

Definition at line 74 of file IfxGtm.c.

Referenced by IfxGtm_getClusterFrequency().


iLLD_TC38A: IfxGtm_Atom.h File Reference

  • Gtm
  • Std
Enumerations | Functions
IfxGtm_Atom.h File Reference
iLLD » GTM

GTM basic functionality. More...

#include "_Impl/IfxGtm_cfg.h"
#include "IfxGtm.h"
#include "IfxGtm_Tbu.h"
#include "Src/Std/IfxSrc.h"
#include "IfxGtm_Cmu.h"
#include "stddef.h"
Include dependency graph for IfxGtm_Atom.h:

Go to the source code of this file.

Enumerations

enum IfxGtm_Atom_Ch_OutputTrigger {
IfxGtm_Atom_Ch_OutputTrigger_forward = 0,
IfxGtm_Atom_Ch_OutputTrigger_generate = 1
}
Reset source for channel counter CN0. More...
enum IfxGtm_Atom_Ch_ResetEvent {
IfxGtm_Atom_Ch_ResetEvent_onCm0 = 0,
IfxGtm_Atom_Ch_ResetEvent_onTrigger = 1
}
Reset event for channel counter CN0. More...
enum IfxGtm_Atom_Mode {
IfxGtm_Atom_Mode_outputImmediate,
IfxGtm_Atom_Mode_outputCompare,
IfxGtm_Atom_Mode_outputPwm,
IfxGtm_Atom_Mode_outputSerial
}
Enum for ATOM mode. More...
enum IfxGtm_Atom_AruInput {
IfxGtm_Atom_AruInput_disabled = 0,
IfxGtm_Atom_AruInput_enabled = 1
}
Enable/disable of Aru Input to ATOM channel. More...
enum IfxGtm_Atom_SomcControl {
IfxGtm_Atom_SomcControl_compareBoth = 0,
IfxGtm_Atom_SomcControl_compareBoth1 = 1,
IfxGtm_Atom_SomcControl_ccu0Ts0 = 2,
IfxGtm_Atom_SomcControl_ccu1Ts12 = 3,
IfxGtm_Atom_SomcControl_ccu0ccu1Ts0 = 4,
IfxGtm_Atom_SomcControl_ccu0ccu1Ts12 = 5,
IfxGtm_Atom_SomcControl_ccu0Ts0ccu1Ts12 = 6,
IfxGtm_Atom_SomcControl_cancelCompare = 7
}
Match Compare control modes. More...
enum IfxGtm_Atom_SomcSignalLevelControl {
IfxGtm_Atom_SomcSignalLevelControl_noChange = 0,
IfxGtm_Atom_SomcSignalLevelControl_sl0out1 = 1,
IfxGtm_Atom_SomcSignalLevelControl_sl0out0 = 2,
IfxGtm_Atom_SomcSignalLevelControl_toggle = 3
}
SOMC signal level Control. More...

Functions

IFX_INLINE Ifx_GTM_ATOM_CH * | IfxGtm_Atom_Ch_getChannelPointer (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the base addredd of selected Atom channel. More...
IFX_INLINE void | IfxGtm_Atom_Ch_setCompareShadow (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowZero, uint32 shadowOne)
Sets the compare 0 and 1 shadow values. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_clearOneNotification (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Clears the channel One notification. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_clearZeroNotification (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Clears the channel Zero notification. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_configurePwmMode (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock, Ifx_ActiveState activeState, IfxGtm_Atom_Ch_ResetEvent resetEvent, IfxGtm_Atom_Ch_OutputTrigger trigger)
IFX_EXTERN float32 | IfxGtm_Atom_Ch_getClockFrequency (Ifx_GTM *gtm, Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the ATOM channel input clock frequency in Hz. More...
IFX_EXTERN IfxGtm_Cmu_Clk | IfxGtm_Atom_Ch_getClockSource (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the channel clock source. More...
IFX_EXTERN uint32 | IfxGtm_Atom_Ch_getCompareOne (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare one value. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Atom_Ch_getCompareOnePointer (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare one pointer. More...
IFX_EXTERN uint32 | IfxGtm_Atom_Ch_getCompareZero (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare zero value. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Atom_Ch_getCompareZeroPointer (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare zero pointer. More...
IFX_EXTERN boolean | IfxGtm_Atom_Ch_getOutputLevel (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Gets the ATOM output level. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxGtm_Atom_Ch_getSrcPointer (Ifx_GTM *gtm, IfxGtm_Atom atom, IfxGtm_Atom_Ch channel)
Returns a pointer to the ATOM channel SRC. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Atom_Ch_getTimerPointer (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the Timer pointer. More...
IFX_EXTERN boolean | IfxGtm_Atom_Ch_isOneNotification (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the status of channel One notification. More...
IFX_EXTERN boolean | IfxGtm_Atom_Ch_isZeroNotification (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the status of channel Zero notification. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_raiseInterruptOne (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Raises the interrupt for Compare 1. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_raiseInterruptZero (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Raises the interrupt for Compare 0. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setClockSource (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock)
Sets the channel clock source. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setCompare (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareZero, uint32 compareOne)
Sets the compare 0 and 1 values. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setCompareOne (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareOne)
Sets the compare 1 value. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setCompareOneShadow (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowOne)
Sets the compare 1 shadow value. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setCompareZero (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareZero)
Sets the compare 0 value. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setCompareZeroShadow (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowZero)
Sets the compare 0 shadow value. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setCounterValue (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 value)
Sets the counter value. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setMode (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Mode mode)
set the Atom operating mode More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setNotification (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne)
Sets the channel notification. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setOneShotMode (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, boolean enabled)
Enable/disable the one shot mode. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setResetSource (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Ch_ResetEvent event)
Sets the channel clock source either from local or from previous channel. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setSignalLevel (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, Ifx_ActiveState activeState)
Sets the signal level. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setTriggerOutput (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Ch_OutputTrigger trigger)
Sets the channel trigger output. More...
IFX_EXTERN uint32 | IfxGtm_Atom_Ch_getCounterValue (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Get the counter value. More...
IFX_INLINE void | IfxGtm_Atom_Agc_setChannelsUpdate (Ifx_GTM_ATOM_AGC *agc, uint32 value)
Sets the channels for update (UPEN) More...
IFX_EXTERN uint32 | IfxGtm_Atom_Agc_buildFeature (uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable. More...
IFX_EXTERN uint32 | IfxGtm_Atom_Agc_buildFeatureForChannel (IfxGtm_Atom_Ch channel, boolean enabled, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable for a single channel. More...
IFX_EXTERN void | IfxGtm_Atom_Agc_enableChannel (Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel (ENDIS) More...
IFX_EXTERN void | IfxGtm_Atom_Agc_enableChannelOutput (Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel output (OUTEN) More...
IFX_EXTERN void | IfxGtm_Atom_Agc_enableChannelUpdate (Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled)
Enable/disable one channel for update (UPEN) More...
IFX_EXTERN void | IfxGtm_Atom_Agc_enableChannels (Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels (ENDIS) More...
IFX_EXTERN void | IfxGtm_Atom_Agc_enableChannelsOutput (Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels output (OUTEN) More...
IFX_EXTERN void | IfxGtm_Atom_Agc_enableChannelsTrigger (Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask)
Enable/disable the TGC channels trigger. More...
IFX_EXTERN void | IfxGtm_Atom_Agc_enableChannelsUpdate (Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask)
Enable/disable one or more channels for update (UPEN) More...
IFX_EXTERN void | IfxGtm_Atom_Agc_enableTimeTrigger (Ifx_GTM_ATOM_AGC *agc, boolean enabled)
Enable/disable the time base trigger. More...
IFX_EXTERN void | IfxGtm_Atom_Agc_resetChannels (Ifx_GTM_ATOM_AGC *agc, uint32 resetMask)
Reset one or more channels. More...
IFX_EXTERN void | IfxGtm_Atom_Agc_setChannelForceUpdate (Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean resetEnabled)
Enable/disable one channel for update (FUPD) More...
IFX_EXTERN void | IfxGtm_Atom_Agc_setChannelsForceUpdate (Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
Enable/disable one or more channels for the force update feature (FUPD) More...
IFX_EXTERN void | IfxGtm_Atom_Agc_setTimeTrigger (Ifx_GTM_ATOM_AGC *agc, IfxGtm_Tbu_Ts base, uint32 value)
Sets the trigger time base and time base value. More...
IFX_EXTERN void | IfxGtm_Atom_Agc_trigger (Ifx_GTM_ATOM_AGC *agc)
Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG) More...
IFX_INLINE void | IfxGtm_Atom_setTout (uint32 toutNum, uint32 toutSel)
Configures the tout selection. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setAruInput (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, boolean enabled)
enable/disable ARU input for the ATOM channel specified. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setSomcControl (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_SomcControl control)
sets the SOMC control bits for the specified ATOM channel More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setSomcSignalLevelControl (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_SomcSignalLevelControl ctrl)
sets the SL control for SOMC mode. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setAruReadAddress0 (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 address)
set the ARU read address 0 More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setAruReadAddress1 (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 address)
set the ARU read address 1 More...
IFX_EXTERN uint32 | IfxGtm_Atom_getShadowZero (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the shadow zero value. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Atom_getShadowZeroPointer (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the shadow zero pointer. More...
IFX_EXTERN uint32 | IfxGtm_Atom_getShadowOne (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the shadow one value. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Atom_getShadowOnePointer (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the shadow One pointer. More...

Detailed Description

GTM basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Atom.h.

Enumeration Type Documentation

◆ IfxGtm_Atom_AruInput

enum IfxGtm_Atom_AruInput

Enable/disable of Aru Input to ATOM channel.

Enumerator
IfxGtm_Atom_AruInput_disabled | ARU input disabled.
IfxGtm_Atom_AruInput_enabled | ARU input enabled.

Definition at line 105 of file IfxGtm_Atom.h.

◆ IfxGtm_Atom_SomcControl

enum IfxGtm_Atom_SomcControl

Match Compare control modes.

Enumerator
IfxGtm_Atom_SomcControl_compareBoth | compare CCU0 and CCU1 in parallel
IfxGtm_Atom_SomcControl_compareBoth1 | compare CCU0 and CCU1 in parallel
IfxGtm_Atom_SomcControl_ccu0Ts0 | compare CCU0 against TS0
IfxGtm_Atom_SomcControl_ccu1Ts12 | compare only CCU1 against TS1 or TS2
IfxGtm_Atom_SomcControl_ccu0ccu1Ts0 | compare CCU0 then CCU1, use TS0
IfxGtm_Atom_SomcControl_ccu0ccu1Ts12 | compare CCU0 then CCU1. Use TS1 or TS2
IfxGtm_Atom_SomcControl_ccu0Ts0ccu1Ts12 | compare CCU0 with TS0 then CCU1 with TS1 or TS2
IfxGtm_Atom_SomcControl_cancelCompare | Cancel pending compare events.

Definition at line 113 of file IfxGtm_Atom.h.

◆ IfxGtm_Atom_SomcSignalLevelControl

enum IfxGtm_Atom_SomcSignalLevelControl

SOMC signal level Control.

Enumerator
IfxGtm_Atom_SomcSignalLevelControl_noChange | no signal level change at output
IfxGtm_Atom_SomcSignalLevelControl_sl0out1 | SL= 0 -> Out=1; SL=1->Out=0.
IfxGtm_Atom_SomcSignalLevelControl_sl0out0 | SL=0->Out=0; SL=1->Out=1.
IfxGtm_Atom_SomcSignalLevelControl_toggle | toggle the output signal level

Definition at line 127 of file IfxGtm_Atom.h.

Function Documentation

◆ IfxGtm_Atom_Ch_setAruInput()

IFX_EXTERN void IfxGtm_Atom_Ch_setAruInput | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | boolean | enabled
 | ) |  |

enable/disable ARU input for the ATOM channel specified.

Parameters
atom | pointer to the ATOM instance
channel | index of ATOM channel
enabled | ARU enable status
Returns
None

Definition at line 521 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Ch_setAruReadAddress0()

IFX_EXTERN void IfxGtm_Atom_Ch_setAruReadAddress0 | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | uint32 | address
 | ) |  |

set the ARU read address 0

Parameters
atom | pointer to ATOM instance
channel | ATOM channel index
address | ARU read address 0
Returns
None

Definition at line 553 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Ch_setAruReadAddress1()

IFX_EXTERN void IfxGtm_Atom_Ch_setAruReadAddress1 | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | uint32 | address
 | ) |  |

set the ARU read address 1

Parameters
atom | pointer to ATOM instance
channel | ATOM channel index
address | ARU read address 1
Returns
None

Definition at line 560 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Ch_setSomcControl()

IFX_EXTERN void IfxGtm_Atom_Ch_setSomcControl | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | IfxGtm_Atom_SomcControl | control
 | ) |  |

sets the SOMC control bits for the specified ATOM channel

Parameters
atom | pointer to ATOM instance
channel | ATOM channel index
control | SOMC control mode enum
Returns
None

Definition at line 537 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Ch_setSomcSignalLevelControl()

IFX_EXTERN void IfxGtm_Atom_Ch_setSomcSignalLevelControl | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | IfxGtm_Atom_SomcSignalLevelControl | ctrl
 | ) |  |

sets the SL control for SOMC mode.

Parameters
atom | pointer to the ATOM instance
channel | index of ATOM channel
ctrl | SIgnal level control
Returns
None

Definition at line 545 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_getShadowOne()

IFX_EXTERN uint32 IfxGtm_Atom_getShadowOne | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Returns the shadow one value.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
shadow one value

Definition at line 583 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_getShadowOnePointer()

IFX_EXTERN volatile uint32* IfxGtm_Atom_getShadowOnePointer | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Returns the shadow One pointer.

Parameters
atom | Pointer to the ATOM object
channel | channel index
Returns
shadow One pointer

Definition at line 591 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_getShadowZero()

IFX_EXTERN uint32 IfxGtm_Atom_getShadowZero | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Returns the shadow zero value.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
shadow zero value

Definition at line 567 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_getShadowZeroPointer()

IFX_EXTERN volatile uint32* IfxGtm_Atom_getShadowZeroPointer | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Returns the shadow zero pointer.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
shadow zero value

Definition at line 575 of file IfxGtm_Atom.c.


iLLD_TC38A: IfxGtm_Cmu.h File Reference

  • Gtm
  • Std
Enumerations | Functions
IfxGtm_Cmu.h File Reference
iLLD » GTM

GTM basic functionality. More...

#include "_Impl/IfxGtm_cfg.h"
Include dependency graph for IfxGtm_Cmu.h:

Go to the source code of this file.

Enumerations

enum IfxGtm_Cmu_Clk {
IfxGtm_Cmu_Clk_0 = 0,
IfxGtm_Cmu_Clk_1,
IfxGtm_Cmu_Clk_2,
IfxGtm_Cmu_Clk_3,
IfxGtm_Cmu_Clk_4,
IfxGtm_Cmu_Clk_5,
IfxGtm_Cmu_Clk_6,
IfxGtm_Cmu_Clk_7
}
enum IfxGtm_Cmu_Eclk {
IfxGtm_Cmu_Eclk_0 = 0,
IfxGtm_Cmu_Eclk_1,
IfxGtm_Cmu_Eclk_2
}
enum IfxGtm_Cmu_Fxclk {
IfxGtm_Cmu_Fxclk_0 = 0,
IfxGtm_Cmu_Fxclk_1,
IfxGtm_Cmu_Fxclk_2,
IfxGtm_Cmu_Fxclk_3,
IfxGtm_Cmu_Fxclk_4
}
enum IfxGtm_Cmu_Tim_Filter_Clk {
IfxGtm_Cmu_Tim_Filter_Clk_0,
IfxGtm_Cmu_Tim_Filter_Clk_1,
IfxGtm_Cmu_Tim_Filter_Clk_6,
IfxGtm_Cmu_Tim_Filter_Clk_7
}
Tim Filter counter frequency select. More...

Functions

IFX_EXTERN void | IfxGtm_Cmu_enableClocks (Ifx_GTM *gtm, uint32 clkMask)
Enable / Disable the configurable, fixed, and external clocks. More...
IFX_EXTERN float32 | IfxGtm_Cmu_getClkFrequency (Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean assumeEnabled)
Returns the GTM configurable clock frequency in Hz. More...
IFX_EXTERN float32 | IfxGtm_Cmu_getEclkFrequency (Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex, boolean assumeEnabled)
Returns the GTM external clock frequency in Hz. More...
IFX_EXTERN float32 | IfxGtm_Cmu_getFxClkFrequency (Ifx_GTM *gtm, IfxGtm_Cmu_Fxclk clkIndex, boolean assumeEnabled)
Returns the GTM fixed clock frequency in Hz. More...
IFX_EXTERN float32 | IfxGtm_Cmu_getGclkFrequency (Ifx_GTM *gtm)
Returns the GTM global clock frequency in Hz. More...
IFX_EXTERN float32 | IfxGtm_Cmu_getModuleFrequency (Ifx_GTM *gtm)
returns the CMU module frequency in Hz. This is only for CMU module frequency. For GTM SYS frequency: IfxGtm_getSysClkFrequency() is to be used. More...
IFX_EXTERN boolean | IfxGtm_Cmu_isClkClockEnabled (Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex)
Returns the configurable clock enable status. More...
IFX_EXTERN boolean | IfxGtm_Cmu_isEclkClockEnabled (Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex)
Returns the external clock enable status. More...
IFX_EXTERN boolean | IfxGtm_Cmu_isFxClockEnabled (Ifx_GTM *gtm)
Returns the fixed clock enable status. More...
IFX_EXTERN void | IfxGtm_Cmu_selectClkInput (Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean useGlobal)
Select the clock input for CLK6 and CLK7 note The frequency can only be modified when the corresponding clock is disabled using IfxGtm_Cmu_enableClocks() More...
IFX_EXTERN void | IfxGtm_Cmu_setClkFrequency (Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, float32 frequency)
Set the GTM configurable clock frequency in Hz. More...
IFX_EXTERN void | IfxGtm_Cmu_setEclkFrequency (Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex, float32 frequency)
Set the GTM external clock frequency in Hz. More...
IFX_EXTERN void | IfxGtm_Cmu_setGclkFrequency (Ifx_GTM *gtm, float32 frequency)
Set the GTM global clock frequency in Hz. More...

Detailed Description

GTM basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Cmu.h.


iLLD_TC38A: IfxGtm_Dpll.h File Reference

  • Gtm
  • Std
Functions
IfxGtm_Dpll.h File Reference
iLLD » GTM

GTM basic functionality. More...

#include "_Impl/IfxGtm_cfg.h"
Include dependency graph for IfxGtm_Dpll.h:

Go to the source code of this file.

Functions

IFX_EXTERN float32 IfxGtm_Dpll_getSubIncFrequency (Ifx_GTM *gtm, IfxGtm_Dpll_SubInc index)
Dummy Function, returns 0.0F. More...

Detailed Description

GTM basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Dpll.h.


iLLD_TC38A: IfxGtm_Dtm.h File Reference

  • Gtm
  • Std
Enumerations | Functions
IfxGtm_Dtm.h File Reference
iLLD » GTM

GTM basic functionality. More...

#include "_Impl/IfxGtm_cfg.h"
#include "IfxGtm_reg.h"
#include "IfxGtm_Cmu.h"
#include "Scu/Std/IfxScuCcu.h"
Include dependency graph for IfxGtm_Dtm.h:

Go to the source code of this file.

Enumerations

enum IfxGtm_Dtm_ClockSource {
IfxGtm_Dtm_ClockSource_systemClock,
IfxGtm_Dtm_ClockSource_cmuClock0,
IfxGtm_Dtm_ClockSource_cmuClock1,
IfxGtm_Dtm_ClockSource_cmuClock2
}
Clock source for DTM object
Definition in IfxGTM.DTM[i].CTRL.B.CLKSEL ( i = 0 to 35) More...
enum IfxGtm_Dtm_Output1Function {
IfxGtm_Dtm_Output1Function_signalEdgeTrigger,
IfxGtm_Dtm_Output1Function_xorOfDtmInputandShiftSignal,
IfxGtm_Dtm_Output1Function_andOfDtmInputandShiftSignal,
IfxGtm_Dtm_Output1Function_dtmInputSignal
}
Output x function of channel y
Definition in IfxGTM.DTM[i].CH.CTRL1.B.O1Fx ( i = 0 to 35 and x = 0 to 3) More...
enum IfxGtm_Dtm_Output1Select {
IfxGtm_Dtm_Output1Select_inverseDeadTime,
IfxGtm_Dtm_Output1Select_specialFunction
}
Output 1 selection of channel x (x = 0 to 3)
Definition in IfxGTM.DTM[i].CH.CTRL1.B.O1SELx ( i = 0 to 35 and x = 0 to 3) More...
enum IfxGtm_Dtm_DeadTimePath {
IfxGtm_Dtm_DeadTimePath_feedThrough,
IfxGtm_Dtm_DeadTimePath_enable
}
Dead Time Path on output x of channel y
Definition in IfxGTM.DTM[i].CH.CTRL2.B.DTxy ( i = 0 to 35; x = 0 , 1; and y = 0 to 4) More...

Functions

IFX_INLINE void | IfxGtm_Dtm_setClockSource (Ifx_GTM_CDTM_DTM *dtm, IfxGtm_Dtm_ClockSource clockSource)
Sets the clock source for DTM object. More...
IFX_INLINE void | IfxGtm_Dtm_setOutput0DeadTimePath (Ifx_GTM_CDTM_DTM *dtm, IfxGtm_Dtm_Ch channel, IfxGtm_Dtm_DeadTimePath deadTimePath)
Sets the Output 0 Dead Time Path for DTM channel. More...
IFX_INLINE void | IfxGtm_Dtm_setOutput1DeadTimePath (Ifx_GTM_CDTM_DTM *dtm, IfxGtm_Dtm_Ch channel, IfxGtm_Dtm_DeadTimePath deadTimePath)
Sets the Output 1 Dead Time Path for DTM channel. More...
IFX_INLINE void | IfxGtm_Dtm_setOutput1Function (Ifx_GTM_CDTM_DTM *dtm, IfxGtm_Dtm_Ch channel, IfxGtm_Dtm_Output1Function output1Function)
Sets the Output Function for DTM channel. More...
IFX_INLINE void | IfxGtm_Dtm_setOutput1Select (Ifx_GTM_CDTM_DTM *dtm, IfxGtm_Dtm_Ch channel, IfxGtm_Dtm_Output1Select output1Select)
Sets the Output Selection for DTM channel. More...
IFX_INLINE IfxGtm_Cdtm | IfxGtm_Dtm_getCdtmIndex (IfxGtm_Atom atom)
return the ATOM corresponding CDTM More...
IFX_INLINE IfxGtm_Dtm | IfxGtm_Dtm_getDtmIndex (IfxGtm_Atom atom, IfxGtm_Atom_Ch channel)
return the ATOM channel corresponding DTM More...
IFX_INLINE IfxGtm_Dtm_Ch | IfxGtm_Dtm_getDtmChannel (IfxGtm_Atom_Ch atomChannel)
return the ATOM channel corresponding DTM channel More...
IFX_INLINE void | IfxGtm_Dtm_setDeadtime (Ifx_GTM_CDTM_DTM *dtm, IfxGtm_Dtm_Ch channel, uint32 risingEdge, float32 fallingEdge)
Sets the deadtime. More...
IFX_INLINE IfxGtm_Dtm_ClockSource | IfxGtm_Dtm_getClockSource (Ifx_GTM_CDTM_DTM *dtm)
Return the clock source of the DTM object. More...
IFX_EXTERN Ifx_GTM_CDTM_DTM * | IfxGtm_Dtm_getDtmPointer (Ifx_GTM *gtm, IfxGtm_Cdtm cdtmIndex, IfxGtm_Dtm dtmIndex)
returns the base address of selected DTM instance More...
IFX_EXTERN float32 | IfxGtm_Dtm_getClockFrequency (Ifx_GTM *gtm, IfxGtm_Cdtm cdtmIndex, IfxGtm_Dtm dtmIndex)
Returns the clock frequency in Hz of the DTM. More...

Detailed Description

GTM basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Dtm.h.

Enumeration Type Documentation

◆ IfxGtm_Dtm_DeadTimePath

enum IfxGtm_Dtm_DeadTimePath

Dead Time Path on output x of channel y
Definition in IfxGTM.DTM[i].CH.CTRL2.B.DTxy ( i = 0 to 35; x = 0 , 1; and y = 0 to 4)

Enumerator
IfxGtm_Dtm_DeadTimePath_feedThrough | Feed through from DTM input to output (DTM[i]_INx to DTM[i]_OUTx (i = 0 to 35 and x = 0 to 4)
IfxGtm_Dtm_DeadTimePath_enable | Dead Time Path enabled.

Definition at line 103 of file IfxGtm_Dtm.h.

Function Documentation

◆ IfxGtm_Dtm_getCdtmIndex()

IFX_INLINE IfxGtm_Cdtm IfxGtm_Dtm_getCdtmIndex ( IfxGtm_Atom atom )

return the ATOM corresponding CDTM

Definition at line 254 of file IfxGtm_Dtm.h.

Referenced by IfxGtm_Atom_Dtm_PwmHl_init(), and IfxGtm_Tom_Dtm_PwmHl_init().

◆ IfxGtm_Dtm_getClockFrequency()

IFX_EXTERN float32 IfxGtm_Dtm_getClockFrequency | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Cdtm | cdtmIndex,
 |  | IfxGtm_Dtm | dtmIndex
 | ) |  |

Returns the clock frequency in Hz of the DTM.

Parameters
gtm | pointer to GTM register base
cdtmIndex | CDTM index
dtmIndex | DTM index
Returns
DTM input clock frequency in Hz

Definition at line 69 of file IfxGtm_Dtm.c.

Referenced by IfxGtm_Atom_Dtm_PwmHl_init(), and IfxGtm_Tom_Dtm_PwmHl_init().

◆ IfxGtm_Dtm_getClockSource()

IFX_INLINE IfxGtm_Dtm_ClockSource IfxGtm_Dtm_getClockSource ( Ifx_GTM_CDTM_DTM * dtm )

Return the clock source of the DTM object.

Parameters
dtm Pointer to the DTM object
Returns
Return the clock source of the DTM object

Definition at line 305 of file IfxGtm_Dtm.h.

Referenced by IfxGtm_Dtm_getClockFrequency().

◆ IfxGtm_Dtm_getDtmChannel()

IFX_INLINE IfxGtm_Dtm_Ch IfxGtm_Dtm_getDtmChannel ( IfxGtm_Atom_Ch atomChannel )

return the ATOM channel corresponding DTM channel

Definition at line 277 of file IfxGtm_Dtm.h.

Referenced by IfxGtm_Atom_Dtm_PwmHl_init(), and IfxGtm_Tom_Dtm_PwmHl_init().

◆ IfxGtm_Dtm_getDtmIndex()

IFX_INLINE IfxGtm_Dtm IfxGtm_Dtm_getDtmIndex | ( | IfxGtm_Atom | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

return the ATOM channel corresponding DTM

Definition at line 260 of file IfxGtm_Dtm.h.

Referenced by IfxGtm_Atom_Dtm_PwmHl_init(), and IfxGtm_Tom_Dtm_PwmHl_init().

◆ IfxGtm_Dtm_getDtmPointer()

IFX_EXTERN Ifx_GTM_CDTM_DTM* IfxGtm_Dtm_getDtmPointer | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Cdtm | cdtmIndex,
 |  | IfxGtm_Dtm | dtmIndex
 | ) |  |

returns the base address of selected DTM instance

Parameters
gtm | pointer to GTM register base
cdtmIndex | CDTM index
dtmIndex | DTM index
Returns
Base address of DTM

Definition at line 52 of file IfxGtm_Dtm.c.

Referenced by IfxGtm_Atom_Dtm_PwmHl_init(), IfxGtm_Dtm_getClockFrequency(), and IfxGtm_Tom_Dtm_PwmHl_init().

◆ IfxGtm_Dtm_setDeadtime()

IFX_INLINE void IfxGtm_Dtm_setDeadtime | ( | Ifx_GTM_CDTM_DTM * | dtm,
 |  | IfxGtm_Dtm_Ch | channel,
 |  | uint32 | risingEdge,
 |  | float32 | fallingEdge
 | ) |  |

Sets the deadtime.

Parameters
dtm | Pointer to the DTM object
channel | Channel index
risingEdge | Deadtime for rising edge
fallingEdge | Deadtime for falling edge
Returns
None

Definition at line 298 of file IfxGtm_Dtm.h.

Referenced by IfxGtm_Atom_Dtm_PwmHl_setDeadtime(), and IfxGtm_Tom_Dtm_PwmHl_setDeadtime().


iLLD_TC38A: IfxGtm_Psm.h File Reference

  • Gtm
  • Std
Enumerations | Functions
IfxGtm_Psm.h File Reference
iLLD » GTM

GTM basic functionality. More...

#include "_Impl/IfxGtm_cfg.h"
#include "IfxGtm.h"
#include "_Utilities/Ifx_Assert.h"
#include "Src/Std/IfxSrc.h"
Include dependency graph for IfxGtm_Psm.h:

Go to the source code of this file.

Enumerations

enum IfxGtm_Psm_F2aStream {
IfxGtm_Psm_F2aStream_0,
IfxGtm_Psm_F2aStream_1,
IfxGtm_Psm_F2aStream_2,
IfxGtm_Psm_F2aStream_3,
IfxGtm_Psm_F2aStream_4,
IfxGtm_Psm_F2aStream_5,
IfxGtm_Psm_F2aStream_6,
IfxGtm_Psm_F2aStream_7
}
Enumeration listing the F2A streams. More...
enum IfxGtm_Psm_F2aStreamState {
IfxGtm_Psm_F2aStreamState_readDisabled = 0,
IfxGtm_Psm_F2aStreamState_disabled = 1,
IfxGtm_Psm_F2aStreamState_enabled = 2,
IfxGtm_Psm_F2aStreamState_readEnabled = 3
}
Enumeration lisitng the enabled/disabled state of the F2A channel streams. More...
enum IfxGtm_Psm_F2aTransferDirection {
IfxGtm_Psm_F2aTransferDirection_aruToFifo = 0,
IfxGtm_Psm_F2aTransferDirection_fifoToAru = 1
}
Enumeration listing the transfer direction of the F2a Streams. Definition in F2A_CH_STR_CFG.B.DIR. More...
enum IfxGtm_Psm_F2aTransferMode {
IfxGtm_Psm_F2aTransferMode_transferLowWord = 0,
IfxGtm_Psm_F2aTransferMode_transferHighWord = 1,
IfxGtm_Psm_F2aTransferMode_transferBothWords = 2
}
Enumeration listing the Transfer Mode of the F2A. Definition in F2A_CH_STR_CFG.TMODE. More...
enum IfxGtm_Psm_FifoChannel {
IfxGtm_Psm_FifoChannel_0,
IfxGtm_Psm_FifoChannel_1,
IfxGtm_Psm_FifoChannel_2,
IfxGtm_Psm_FifoChannel_3,
IfxGtm_Psm_FifoChannel_4,
IfxGtm_Psm_FifoChannel_5,
IfxGtm_Psm_FifoChannel_6,
IfxGtm_Psm_FifoChannel_7
}
Enumeration lisiting Fifo Channels. More...
enum IfxGtm_Psm_FifoChannelDmaHystDir {
IfxGtm_Psm_FifoChannelDmaHystDir_read = 0,
IfxGtm_Psm_FifoChannelDmaHystDir_write = 1
}
Enumeration list of the DMA direction in hysteresis modes.
definition in FIFO_CH_IRQ_MODE.DMA_HYST_DIR. More...
enum IfxGtm_Psm_FifoChannelInterrupt {
IfxGtm_Psm_FifoChannelInterrupt_empty = 0,
IfxGtm_Psm_FifoChannelInterrupt_full = 1,
IfxGtm_Psm_FifoChannelInterrupt_lowerWm = 2,
IfxGtm_Psm_FifoChannelInterrupt_upperWm = 3
}
Interrupts of the Fifo Channel. More...
enum IfxGtm_Psm_FifoChannelMode {
IfxGtm_Psm_FifoChannelMode_normal = 0,
IfxGtm_Psm_FifoChannelMode_ringBuffer = 1
}
Enumeration list for modes of FIFO operation.
Definition in FIFO_CH_CTRL.RBM. More...
enum IfxGtm_Psm_FifoChannelStatus {
IfxGtm_Psm_FifoChannelStatus_empty = 0,
IfxGtm_Psm_FifoChannelStatus_full = 1,
IfxGtm_Psm_FifoChannelStatus_lowerWm = 2,
IfxGtm_Psm_FifoChannelStatus_upperWm = 3,
IfxGtm_Psm_FifoChannelStatus_normal = 4
}
Enumeration listing the Fifo Channel Status.
Definition in FIFO_CH_STATUS register. More...
enum IfxGtm_Psm_InterruptMode {
IfxGtm_Psm_InterruptMode_level = 0,
IfxGtm_Psm_InterruptMode_pulse = 1,
IfxGtm_Psm_InterruptMode_pulseNotify = 2,
IfxGtm_Psm_InterruptMode_singlePulse = 3
}
List of mode of interrupt Definition in FIFO_CH_IRQ_MODE.IRQ_MODE. More...

Functions

IFX_INLINE void | IfxGtm_Psm_Fifo_setChannelMode (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, IfxGtm_Psm_FifoChannelMode mode)
sets the mode of operation of FIFO More...
IFX_INLINE Ifx_GTM_PSM_FIFO_CH * | IfxGtm_Psm_Fifo_getChannelPointer (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
get the Pointer to the Fifo Channel SFR More...
IFX_INLINE Ifx_GTM_PSM_FIFO * | IfxGtm_Psm_Fifo_getPointer (IfxGtm_Psm_Fifo fifo)
get pointer to the FIFO object SFR block More...
IFX_INLINE void | IfxGtm_Psm_Fifo_flushChannelFifo (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
Flush the contents of the specified Fifo Channel. More...
IFX_INLINE void | IfxGtm_Psm_Fifo_enableRamAccess (IfxGtm_Psm_Fifo fifo)
Unlock the direct RAM access to the FIFO specified. This control bit applies RAM write access to all channels of the specified FIFO. More...
IFX_INLINE void | IfxGtm_Psm_Fifo_disableRamAccess (IfxGtm_Psm_Fifo fifo)
Disable Direct RAM access to the specified Fifo. The setting is applicable to all channels of specified Fifo. More...
IFX_INLINE uint32 | IfxGtm_Psm_Fifo_getChannelStartAddress (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
get the logical start address of the Fifo Channel. The address range is 0 - (IFXGTM_PSM_FIFORAMSIZE-1). More...
IFX_INLINE uint32 | IfxGtm_Psm_Fifo_getChannelEndAddress (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
get the logical end address of the Fifo Channel. The address range is 0 - (IFXGTM_PSM_FIFORAMSIZE-1). More...
IFX_INLINE uint32 | IfxGtm_Psm_Fifo_getChannelSize (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
get the RAM size usage of the specified FIFO channel. Returns the value : (END_ADDRESS - START_ADDRESS) + 1 Each unit is 29 bits wide. More...
IFX_INLINE uint32 | IfxGtm_Psm_Fifo_getChannelFillLevel (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
get the Fill level of the Fifo Channel specified. The Fill level is in range: 0 < Level <= ( (END_ADDRESS - START_ADDRESS) + 1 ) More...
IFX_INLINE uint32 | IfxGtm_Psm_Fifo_getChannelUpperWatermark (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
Get the upper watermark level of the Fifo Channel. More...
IFX_INLINE uint32 | IfxGtm_Psm_Fifo_getChannelLowerWatermark (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
Get the Lower watermark level of the Fifo Channel. More...
IFX_INLINE uint32 | IfxGtm_Psm_Fifo_getChannelWritePtr (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
get the write pointer of the specified Fifo Channel More...
IFX_INLINE uint32 | IfxGtm_Psm_Fifo_getChannelReadPtr (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
get the read pointer of the specified Fifo Channel More...
IFX_INLINE boolean | IfxGtm_Psm_Fifo_getChannelInterruptStatus (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, IfxGtm_Psm_FifoChannelInterrupt interrupt)
get the Status of Interrupt raised. More...
IFX_INLINE void | IfxGtm_Psm_Fifo_setChannelInterruptMode (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, IfxGtm_Psm_InterruptMode irqmode)
set the mode of interrupt More...
IFX_INLINE void | IfxGtm_Psm_Fifo_setChannelDmaHystMode (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, boolean enabled, IfxGtm_Psm_FifoChannelDmaHystDir dir)
set the mode of DMA hysteresis. More...
IFX_INLINE void | IfxGtm_Psm_Fifo_clearChannelInterrupt (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, IfxGtm_Psm_FifoChannelInterrupt interrupt)
clear the interrupt of specified type. More...
IFX_INLINE void | IfxGtm_Psm_Fifo_clearAllChannelInterrupts (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
clear all the interrupts for the Fifo Channel More...
IFX_INLINE Ifx_GTM_PSM_F2A * | IfxGtm_Psm_F2a_getPointer (IfxGtm_Psm_F2a f2a)
get the pointer to the F2A of the specified Fifo object. More...
IFX_INLINE void | IfxGtm_Psm_F2a_setAruReadAddress (IfxGtm_Psm_F2a f2a, IfxGtm_Psm_F2aStream f2aStream, uint32 address)
set the ARU read address of the specified F2A stream More...
IFX_INLINE void | IfxGtm_Psm_F2a_setTransferMode (IfxGtm_Psm_F2a f2a, IfxGtm_Psm_F2aStream f2aStream, IfxGtm_Psm_F2aTransferMode mode)
set the Transfer Mode of the F2A stream. More...
IFX_INLINE IfxGtm_Psm_F2aTransferMode | IfxGtm_Psm_F2a_getTransferMode (IfxGtm_Psm_F2a f2a, IfxGtm_Psm_F2aStream f2aStream)
get the Transfer mode of the specified F2A stream. More...
IFX_INLINE void | IfxGtm_Psm_F2a_setTransferDirection (IfxGtm_Psm_F2a f2a, IfxGtm_Psm_F2aStream f2aStream, IfxGtm_Psm_F2aTransferDirection dir)
set the transfer direction of the F2A stream. More...
IFX_INLINE IfxGtm_Psm_F2aTransferDirection | IfxGtm_Psm_F2a_getTransferDirection (IfxGtm_Psm_F2a f2a, IfxGtm_Psm_F2aStream f2aStream)
get the transfer direction of the F2A stream. More...
IFX_INLINE Ifx_SRC_SRCR * | IfxGtm_Psm_Fifo_getChannelSrcPointer (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
get the SRC pointer for the specified FIFO channel. More...
IFX_INLINE Ifx_GTM_PSM_AFD_CH * | IfxGtm_Psm_Afd_getChannelPointer (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
get the Pointer to the AFD buffer for Fifo channel. More...
IFX_INLINE void | IfxGtm_Psm_Afd_writeChannelBuffer (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, uint32 data)
write the data into the Buffer access register of specified Fifo Channel More...
IFX_EXTERN void | IfxGtm_Psm_Fifo_setChannelEndAddress (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, uint32 address)
Set the logical end address for the specified Fifo Channel. The address range is 0 - (IFXGTM_PSM_FIFORAMSIZE - 1). END address should be in range: START address<address<IFXGTM_PSM_FIFORAMSIZE. More...
IFX_EXTERN void | IfxGtm_Psm_Fifo_setChannelStartAddress (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, uint32 address)
Set the logical start address for the specified Fifo Channel. The address range is 0 - (IFXGTM_PSM_FIFORAMSIZE - 1). START address should be in range: 0<address<IFXGTM_PSM_FIFORAMSIZE. More...
IFX_EXTERN void | IfxGtm_Psm_Fifo_setChannelSize (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, uint32 size)
set the RAM size of the specified FIFO channel. The RAM size should be in range: 0 - ((IFXGTM_PSM_FIFORAMSIZE - START address) + 1) Caution: This will modify the END address of the Fifo Channel RAM. This will also flush the FIFO as the END address gets modified. More...
IFX_EXTERN void | IfxGtm_Psm_Fifo_setChannelUpperWatermark (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, uint32 upperWm)
set the upper watermark of the specified Fifo Channel. Upper watermark must be in range: 0 < addr < (END_ADDRESS - START_ADDRESS) More...
IFX_EXTERN void | IfxGtm_Psm_Fifo_setChannelLowerWatermark (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, uint32 lowerWm)
set the upper watermark of the specified Fifo Channel. Upper watermark must be in range: 0 < addr < (END_ADDRESS - START_ADDRESS) More...
IFX_EXTERN IfxGtm_Psm_FifoChannelStatus | IfxGtm_Psm_Fifo_getChannelStatus (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
get the Status of the Fifo Channel. Returns either Full, Empty, Upper WM or Lower WM reached status. If none of the above, it will return "normal" status. More...
IFX_EXTERN void | IfxGtm_Psm_Fifo_enableChannelInterrupt (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, IfxGtm_Psm_FifoChannelInterrupt interrupt)
enable the interrupt type More...
IFX_EXTERN void | IfxGtm_Psm_Fifo_disableChannelInterrupt (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, IfxGtm_Psm_FifoChannelInterrupt interrupt)
disable the interrupt for Fifo Channel More...
IFX_EXTERN void | IfxGtm_Psm_Fifo_setChannelInterrupt (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, IfxGtm_Psm_FifoChannelInterrupt interrupt)
forces the Interrupt from Fifo Channel More...
IFX_EXTERN void | IfxGtm_Psm_F2a_enableStream (IfxGtm_Psm_F2a f2a, IfxGtm_Psm_F2aStream f2aStream)
enable the selected stream of the F2A. More...
IFX_EXTERN void | IfxGtm_Psm_F2a_disableStream (IfxGtm_Psm_F2a f2a, IfxGtm_Psm_F2aStream f2aStream)
disables the specified stream of the F2A More...
IFX_EXTERN IfxGtm_Psm_F2aStreamState | IfxGtm_Psm_F2a_getStreamState (IfxGtm_Psm_F2a f2a, IfxGtm_Psm_F2aStream f2aStream)
get the state of the specified fifo stream. More...

Detailed Description

GTM basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

This Module provides the standard interfaces to manipulate and read PSM sub-module registers in GTM. This Module can be used to abstract the register names and addressing from higher layer software code. PSM includes: FIFO, A2F (AEI to FIFO) and F2A (FIFO to ARU) Interfaces.

Definition in file IfxGtm_Psm.h.


iLLD_TC38A: IfxGtm_Spe.h File Reference

  • Gtm
  • Std
Data Structures | Macros | Enumerations | Functions
IfxGtm_Spe.h File Reference
iLLD » GTM

GTM basic functionality. More...

#include "_Impl/IfxGtm_cfg.h"
#include "IfxGtm.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "IfxGtm_bf.h"
#include "Src/Std/IfxSrc.h"
Include dependency graph for IfxGtm_Spe.h:

Go to the source code of this file.

Data Structures

struct | IfxGtm_Spe_ChannelOutputs
specifies the output pattern structure. More...
struct | IfxGtm_Spe_PatternSignal
Struct describing the individual input signals in the pattern. More...
union | IfxGtm_Spe_InputPattern
Struct describing the pattern of Input signal to the SPE submodule. More...
union | IfxGtm_Spe_OutputPattern
specifies the output pattern to be given to the TOM output from given SPE. Union implementation can be read in word or individual channel output units. More...

Macros

#define | IFXGTM_SPE_GET_TRIGSEL(x) ((uint32)(x & (uint32)3))
Macro to get the TRIG_SEL value in CTRL_STAT register. Input(x): Enum value of IfxGtm_Spe_TriggerSource. More...
#define | IFXGTM_SPE_GET_ETRIG(x) ((uint32)((x & (uint32)4) >> 2))
Macro to get the ETRIG_SEL value in CTRL_STAT register. Input(x): Enum value of IfxGtm_Spe_TriggerSource. More...
#define | IFXGTM_SPE_SETSINGLEPATTERN(spepat_temp, pattern, pat_index) ((spepat_temp | ((uint32)0xFu << (pat_index * 4))) & (pattern << (pat_index * 4)))
sets a single input pattern into the SPE_PAT register. More...
#define | IFXGTM_SPE_GETALLPATTERNS(pat_ptr)
sets all the input patterns specified into the SPE_PAT register. This can be used to derive SPE_PAT from pattern array specified by user. More...
#define | IFXGTM_SPE_SETCHANNELOUTPUT(speoutpat, output, ch) ((speoutpat | ((uint32)0x3u << (ch * 2))) & ((uint32)output << (ch * 2)))
macro used to set a single channel output into the SPE OUT PAT register. More...

Enumerations

enum IfxGtm_Spe_ChannelOutputType {
IfxGtm_Spe_ChannelOutputType_tomCh0Sour = 0,
IfxGtm_Spe_ChannelOutputType_tomCh1Sour = 1,
IfxGtm_Spe_ChannelOutputType_0 = 2,
IfxGtm_Spe_ChannelOutputType_1 = 3
}
enumeration containing TOM channel output types possible from SPE. Used to specify the Channel outputs in individual SPE_OUT_PAT registers. More...
enum IfxGtm_Spe_ControlCommand {
IfxGtm_Spe_ControlCommand_patPtr = 0,
IfxGtm_Spe_ControlCommand_bwdPatPtr = 1,
IfxGtm_Spe_ControlCommand_outPat6 = 2,
IfxGtm_Spe_ControlCommand_outPat7 = 3
}
Specifies the type of control command which selects the output pattern register(OUT_PAT) used to udpate OUT_CTRL. Used to fill in the SPE_CTRL_CMD field in SPE_CMD register. More...
enum IfxGtm_Spe_Direction {
IfxGtm_Spe_Direction_fwd = 0,
IfxGtm_Spe_Direction_bwd = 1
}
Describes the rotation direction of the input signal patterns. More...
enum IfxGtm_Spe_InputSignal {
IfxGtm_Spe_InputSignal_chX = 0,
IfxGtm_Spe_InputSignal_chY = 1,
IfxGtm_Spe_InputSignal_chZ = 2
}
Input signal which is mapped from TIMj_CH(48) Used to set GTM.SPE.CTRL_STAT.B.SIEx. More...
enum IfxGtm_Spe_InterruptMode {
IfxGtm_Spe_InterruptMode_level = 0,
IfxGtm_Spe_InterruptMode_pulse = 1,
IfxGtm_Spe_InterruptMode_pulseNotify = 2,
IfxGtm_Spe_InterruptMode_singlePulse = 3
}
mode of interrupt - used to specify the IRQ_MODE register. More...
enum IfxGtm_Spe_InterruptSignal {
IfxGtm_Spe_InterruptSignal_nipd = 0,
IfxGtm_Spe_InterruptSignal_dchg = 1,
IfxGtm_Spe_InterruptSignal_perr = 2,
IfxGtm_Spe_InterruptSignal_bis = 3,
IfxGtm_Spe_InterruptSignal_rcmp = 4,
IfxGtm_Spe_InterruptSignal_count = 5
}
Enumeration containing interrupt signals from SPE. This is used to manipulate and retrieve interrupt flags from Interrupt control registers in SPE. More...
enum IfxGtm_Spe_OutChannel {
IfxGtm_Spe_OutChannel_0,
IfxGtm_Spe_OutChannel_1,
IfxGtm_Spe_OutChannel_2,
IfxGtm_Spe_OutChannel_3,
IfxGtm_Spe_OutChannel_4,
IfxGtm_Spe_OutChannel_5,
IfxGtm_Spe_OutChannel_6,
IfxGtm_Spe_OutChannel_7
}
SPE module output channel number. More...
enum IfxGtm_Spe_PatternIndex {
IfxGtm_Spe_PatternIndex_0,
IfxGtm_Spe_PatternIndex_1,
IfxGtm_Spe_PatternIndex_2,
IfxGtm_Spe_PatternIndex_3,
IfxGtm_Spe_PatternIndex_4,
IfxGtm_Spe_PatternIndex_5,
IfxGtm_Spe_PatternIndex_6,
IfxGtm_Spe_PatternIndex_7
}
Pattern Index Number of the valid Input sequence to the SPE. range from 0-7. More...

Functions

IFX_INLINE void | IfxGtm_Spe_clearAllInterrupts (Ifx_GTM_SPE *spe)
clears all the Interrupts More...
IFX_INLINE void | IfxGtm_Spe_clearInterrupt (Ifx_GTM_SPE *spe, IfxGtm_Spe_InterruptSignal interrupt)
clears the specific interrupt flag. More...
IFX_INLINE void | IfxGtm_Spe_enableModule (Ifx_GTM_SPE *spe, boolean enabled)
enables/disables the SPE module based on boolean input. More...
IFX_INLINE uint32 | IfxGtm_Spe_getActualInputPat (Ifx_GTM_SPE *spe)
returns the actual input pattern as a word format. More...
IFX_INLINE uint32 | IfxGtm_Spe_getBwdPatternPtr (Ifx_GTM_SPE *spe)
returns the backwards pattern pointer. More...
IFX_INLINE IfxGtm_Spe_ControlCommand | IfxGtm_Spe_getControlCommand (Ifx_GTM_SPE *spe)
retrieves the Control command used to select Pattern pointer which selects OUT_PAT. More...
IFX_INLINE IfxGtm_Spe_Direction | IfxGtm_Spe_getDir (Ifx_GTM_SPE *spe)
gets the actual rotation direction of the input signals. More...
IFX_INLINE uint32 | IfxGtm_Spe_getNewInputPat (Ifx_GTM_SPE *spe)
gets the new input pattern in word format. More...
IFX_INLINE uint32 | IfxGtm_Spe_getOutputCtrl (Ifx_GTM_SPE *spe)
gets the output control register (OUT_CTRL) as a whole word to read the curent output patttern. More...
IFX_INLINE uint32 | IfxGtm_Spe_getOutputPattern (Ifx_GTM_SPE *spe, IfxGtm_Spe_PatternIndex patIndex)
returns the output pattern for the specified index as a whole word. More...
IFX_INLINE uint32 | IfxGtm_Spe_getPatternPtr (Ifx_GTM_SPE *spe)
returns the pattern pointer which indicates the currently pointed SPE_OUT_PAT register. More...
IFX_INLINE IfxGtm_Spe_Direction | IfxGtm_Spe_getPrevDir (Ifx_GTM_SPE *spe)
gets the previous rotation direction. More...
IFX_INLINE uint32 | IfxGtm_Spe_getPreviousInputPat (Ifx_GTM_SPE *spe)
gets the previous input pattern in word format. More...
IFX_INLINE uint32 | IfxGtm_Spe_getRevCounter (Ifx_GTM_SPE *spe)
returns the step counter as a 32 bit word More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxGtm_Spe_getSrcPointer (IfxGtm_Spe spe)
Get the Pointer to the Interrupt Request Node of specified SPE object. More...
IFX_INLINE void | IfxGtm_Spe_selectTimInput (Ifx_GTM_SPE *spe, IfxGtm_Spe_TimInput timInput)
selects the Tim Input Channels to give input to the SPE submodule. More...
IFX_INLINE void | IfxGtm_Spe_setBwdPatternPtr (Ifx_GTM_SPE *spe, IfxGtm_Spe_PatternIndex patIndex)
sets the Backward pattern pointer to the CTRL_STAT2 register. This will be used to command if control command is set to backwards in CTRL_CMD register. More...
IFX_INLINE void | IfxGtm_Spe_setControlCommand (Ifx_GTM_SPE *spe, IfxGtm_Spe_ControlCommand cmd)
set the CTRL_CMD field to select which pattern pointer is used to select OUT_PAT. More...
IFX_INLINE void | IfxGtm_Spe_setFastShutoff (Ifx_GTM_SPE *spe, boolean enabled)
Used to set the Fast shutoff Mode. True: Enable Fast Shutoff False: Disable Fast Shutoff. More...
IFX_INLINE void | IfxGtm_Spe_setInterruptMode (Ifx_GTM_SPE *spe, IfxGtm_Spe_InterruptMode mode)
sets the desired mode as the interrupt mode from SPE submodule. More...
IFX_INLINE void | IfxGtm_Spe_setOutputCtrl (Ifx_GTM_SPE *spe, IfxGtm_Spe_OutputPattern *patPtr)
writes into the out_ctrl register with the specified output pattern. More...
IFX_INLINE void | IfxGtm_Spe_setPatternPtr (Ifx_GTM_SPE *spe, IfxGtm_Spe_PatternIndex patIndex)
sets the Pattern Index into the CTRL_STAT register, which will in turn point to the corresponding SPE_OUT_PAT register. More...
IFX_INLINE void | IfxGtm_Spe_setRevCounter (Ifx_GTM_SPE *spe, uint32 count)
sets the step counter to a specific value. More...
IFX_INLINE void | IfxGtm_Spe_triggerUpdate (Ifx_GTM_SPE *spe)
Trigger the update of OUT_CTRL register with the OUT_PAT selected by Control Command. More...
IFX_EXTERN void | IfxGtm_Spe_disableInterrupt (Ifx_GTM_SPE *spe, IfxGtm_Spe_InterruptSignal interrupt)
disables the SPE interrupt of specified type. More...
IFX_EXTERN void | IfxGtm_Spe_enableErrorInterrupt (Ifx_GTM_SPE *spe, IfxGtm_Spe_InterruptSignal interrupt, boolean enabled)
enables the error interrupt of the specified type. More...
IFX_EXTERN void | IfxGtm_Spe_enableInput (Ifx_GTM_SPE *spe, IfxGtm_Spe_InputSignal inputSignal, boolean enabled)
enables/disables the input to sPE from the selected input signal source. More...
IFX_EXTERN void | IfxGtm_Spe_enableInterrupt (Ifx_GTM_SPE *spe, IfxGtm_Spe_InterruptSignal interrupt)
enables the SPE interrupt of specified type. More...
IFX_EXTERN uint32 | IfxGtm_Spe_getFastShutoffLevel (Ifx_GTM_SPE *spe, IfxGtm_Spe_OutChannel channel)
return fast shutoff level. More...
IFX_EXTERN boolean | IfxGtm_Spe_getInterruptStatus (Ifx_GTM_SPE *spe, IfxGtm_Spe_InterruptSignal interrupt)
returns the interrupt status of specified interrupt signal More...
IFX_EXTERN uint32 | IfxGtm_Spe_getRevCompare (Ifx_GTM_SPE *spe)
returns the step counter compare value as a 32 bit word. More...
IFX_EXTERN void | IfxGtm_Spe_selectTrigger (Ifx_GTM_SPE *spe, IfxGtm_Spe_TriggerSource trigger)
selects the source which will trigger the spe control output.a More...
IFX_EXTERN void | IfxGtm_Spe_setAllInputPatterns (Ifx_GTM_SPE *spe, IfxGtm_Spe_InputPattern *patPtr)
sets all the specified input patterns into the SPE_PAT register More...
IFX_EXTERN void | IfxGtm_Spe_setInputPattern (Ifx_GTM_SPE *spe, IfxGtm_Spe_InputPattern *patPtr, IfxGtm_Spe_PatternIndex patIndex)
writes SPE[i]_PAT with the individual pattern specified according to the pattern index. More...
IFX_EXTERN void | IfxGtm_Spe_setInterrupt (Ifx_GTM_SPE *spe, IfxGtm_Spe_InterruptSignal interrupt)
forces the interrupt of specified type by software More...
IFX_EXTERN void | IfxGtm_Spe_setOutputPattern (Ifx_GTM_SPE *spe, IfxGtm_Spe_OutputPattern *patPtr, IfxGtm_Spe_PatternIndex patIndex)
sets the output pattern from pointer to the corresponding SPE_OUT_PAT register specified by the index. More...
IFX_EXTERN void | IfxGtm_Spe_setRevCompare (Ifx_GTM_SPE *spe, uint32 count)
sets the step compare count to the specified value. More...

Detailed Description

GTM basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

This Module provides the standard interfaces to manipulate and read SPE sub-module registers in GTM. This Module can be used to abstract the register names and addressing from higher layer software code.

Definition in file IfxGtm_Spe.h.

Macro Definition Documentation

◆ IFXGTM_SPE_GET_ETRIG

#define IFXGTM_SPE_GET_ETRIG ( x ) ((uint32)((x & (uint32)4) >> 2))

Macro to get the ETRIG_SEL value in CTRL_STAT register. Input(x): Enum value of IfxGtm_Spe_TriggerSource.

Definition at line 80 of file IfxGtm_Spe.h.

Referenced by IfxGtm_Spe_selectTrigger().

◆ IFXGTM_SPE_GET_TRIGSEL

#define IFXGTM_SPE_GET_TRIGSEL ( x ) ((uint32)(x & (uint32)3))

Macro to get the TRIG_SEL value in CTRL_STAT register. Input(x): Enum value of IfxGtm_Spe_TriggerSource.

Definition at line 75 of file IfxGtm_Spe.h.

Referenced by IfxGtm_Spe_selectTrigger().

◆ IFXGTM_SPE_GETALLPATTERNS

#define IFXGTM_SPE_GETALLPATTERNS ( pat_ptr )
Value:
((pat_ptr->U) | \
((pat_ptr + 1)->U << 4) | \
((pat_ptr + 2)->U << 8) | \
((pat_ptr + 3)->U << 12) | \
((pat_ptr + 4)->U << 16) | \
((pat_ptr + 5)->U << 20) | \
((pat_ptr + 6)->U << 24) | \
((pat_ptr + 7)->U << 28))

sets all the input patterns specified into the SPE_PAT register. This can be used to derive SPE_PAT from pattern array specified by user.

Definition at line 89 of file IfxGtm_Spe.h.

Referenced by IfxGtm_Spe_setAllInputPatterns().

◆ IFXGTM_SPE_SETCHANNELOUTPUT

#define IFXGTM_SPE_SETCHANNELOUTPUT | ( | speoutpat,
 |  | output,
 |  | ch
 | ) | ((speoutpat | ((uint32)0x3u << (ch * 2))) & ((uint32)output << (ch * 2)))

macro used to set a single channel output into the SPE OUT PAT register.

Definition at line 101 of file IfxGtm_Spe.h.

◆ IFXGTM_SPE_SETSINGLEPATTERN

#define IFXGTM_SPE_SETSINGLEPATTERN | ( | spepat_temp,
 |  | pattern,
 |  | pat_index
 | ) | ((spepat_temp | ((uint32)0xFu << (pat_index * 4))) & (pattern << (pat_index * 4)))

sets a single input pattern into the SPE_PAT register.

Definition at line 84 of file IfxGtm_Spe.h.

Referenced by IfxGtm_Spe_setInputPattern().


iLLD_TC38A: IfxGtm_Tbu.h File Reference

  • Gtm
  • Std
Enumerations | Functions
IfxGtm_Tbu.h File Reference
iLLD » GTM

GTM basic functionality. More...

#include "_Impl/IfxGtm_cfg.h"
Include dependency graph for IfxGtm_Tbu.h:

Go to the source code of this file.

Enumerations

enum IfxGtm_Tbu_Ts {
IfxGtm_Tbu_Ts_0,
IfxGtm_Tbu_Ts_1,
IfxGtm_Tbu_Ts_2,
IfxGtm_Tbu_Ts_3
}
GTM TOM TBU Time stamps. More...

Functions

IFX_INLINE void | IfxGtm_Tbu_enableChannel (Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel)
Enables the channel. More...
IFX_INLINE boolean | IfxGtm_Tbu_isChannelEnabled (Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel)
Function to check if a TBU channel is enabled. Returns TRUE if the corresponding channel is enabled Returns FALSE if the corresponding channel is disabled. More...
IFX_EXTERN float32 | IfxGtm_Tbu_getClockFrequency (Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel)
Returns the clock frequency. More...

Detailed Description

GTM basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Tbu.h.


iLLD_TC38A: IfxGtm_Tim.h File Reference

  • Gtm
  • Std
Data Structures | Enumerations | Functions
IfxGtm_Tim.h File Reference
iLLD » GTM

GTM basic functionality. More...

#include "_Impl/IfxGtm_cfg.h"
#include "Src/Std/IfxSrc.h"
#include "IfxGtm.h"
#include "IfxGtm_Cmu.h"
#include "IfxGtm_bf.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
Include dependency graph for IfxGtm_Tim.h:

Go to the source code of this file.

Data Structures

struct | IfxGtm_Tim_ChannelControl
Channel control. More...
struct | IfxGtm_Tim_InputSourceSelect

Enumerations

enum IfxGtm_Tim_CntsSel {
IfxGtm_Tim_CntsSel_cntReg = 0,
IfxGtm_Tim_CntsSel_tbuTs0
}
enum IfxGtm_Tim_FilterCounter {
IfxGtm_Tim_FilterCounter_upDown = 0,
IfxGtm_Tim_FilterCounter_hold
}
Enum for Filter counter. More...
enum IfxGtm_Tim_FilterCounterFreqSel {
IfxGtm_Tim_FilterCounterFreqSel_cmuClk0 = 0,
IfxGtm_Tim_FilterCounterFreqSel_cmuClk1 = 1,
IfxGtm_Tim_FilterCounterFreqSel_cmuClk6 = 2,
IfxGtm_Tim_FilterCounterFreqSel_cmuClk7 = 3
}
Enum for Filter counter Frequency Selection. More...
enum IfxGtm_Tim_FilterMode {
IfxGtm_Tim_FilterMode_immediateEdgePropagation = 0,
IfxGtm_Tim_FilterMode_individualDeglitchTime
}
Enum for Filter mode. More...
enum IfxGtm_Tim_GprSel {
IfxGtm_Tim_GprSel_tbuTs0 = 0,
IfxGtm_Tim_GprSel_tbuTs1,
IfxGtm_Tim_GprSel_tbuTs2,
IfxGtm_Tim_GprSel_cnts
}
enum IfxGtm_Tim_Input {
IfxGtm_Tim_Input_currentChannel = 0,
IfxGtm_Tim_Input_adjacentChannel
}
enum IfxGtm_Tim_IrqMode {
IfxGtm_Tim_IrqMode_level = 0,
IfxGtm_Tim_IrqMode_pulse,
IfxGtm_Tim_IrqMode_pulseNotify,
IfxGtm_Tim_IrqMode_singlePulseMode,
IfxGtm_Tim_IrqMode_none = -1
}
enum IfxGtm_Tim_IrqType {
IfxGtm_Tim_IrqType_newVal = 0,
IfxGtm_Tim_IrqType_ecntOverflow = 1,
IfxGtm_Tim_IrqType_cntOverflow = 2,
IfxGtm_Tim_IrqType_gprOverflow = 3,
IfxGtm_Tim_IrqType_timeoutDetect = 4,
IfxGtm_Tim_IrqType_glitchDetect = 5
}
enum IfxGtm_Tim_Mode {
IfxGtm_Tim_Mode_pwmMeasurement = 0,
IfxGtm_Tim_Mode_pulseIntegration,
IfxGtm_Tim_Mode_inputEvent,
IfxGtm_Tim_Mode_inputPrescaler,
IfxGtm_Tim_Mode_bitCompression
}
enum IfxGtm_Tim_Timeout {
IfxGtm_Tim_Timeout_disabled,
IfxGtm_Tim_Timeout_risingEdge,
IfxGtm_Tim_Timeout_fallingEdge,
IfxGtm_Tim_Timeout_bothEdge
}
Enum for Timeout control. More...

Functions

IFX_INLINE void | IfxGtm_Tim_Ch_clearAuxInputSourceSelection (Ifx_GTM *gtm, IfxGtm_Tim timIndex, IfxGtm_Tim_Ch channel)
This function clears the Aux input Source selection for the given channel. More...
IFX_INLINE void | IfxGtm_Tim_Ch_clearCntOverflowEvent (Ifx_GTM_TIM_CH *channel)
Clears the counter overflow flag. More...
IFX_INLINE void | IfxGtm_Tim_Ch_clearDataLostEvent (Ifx_GTM_TIM_CH *channel)
Clears the data lost flag. More...
IFX_INLINE void | IfxGtm_Tim_Ch_clearEcntOverflowEvent (Ifx_GTM_TIM_CH *channel)
Clears the event counter overflow flag. More...
IFX_INLINE void | IfxGtm_Tim_Ch_clearGlitchEvent (Ifx_GTM_TIM_CH *channel)
Clears the glitch flag. More...
IFX_INLINE void | IfxGtm_Tim_Ch_clearNewValueEvent (Ifx_GTM_TIM_CH *channel)
Clears the new value flag. More...
IFX_INLINE void | IfxGtm_Tim_Ch_clearNotification (Ifx_GTM_TIM_CH *channel, IfxGtm_Tim_IrqType irqType)
Clear the interrupt notification. More...
IFX_INLINE boolean | IfxGtm_Tim_Ch_getNotification (Ifx_GTM_TIM_CH *channel, IfxGtm_Tim_IrqType irqType)
Returns the status of channel notification. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxGtm_Tim_Ch_getSrcPointer (Ifx_GTM *gtm, IfxGtm_Tim tim, IfxGtm_Tim_Ch channel)
Returns a pointer to the TIM channel SRC. More...
IFX_INLINE boolean | IfxGtm_Tim_Ch_isCntOverflowEvent (Ifx_GTM_TIM_CH *channel)
Test the counter overflow flag. More...
IFX_INLINE boolean | IfxGtm_Tim_Ch_isDataLostEvent (Ifx_GTM_TIM_CH *channel)
Test the data lost flag. More...
IFX_INLINE boolean | IfxGtm_Tim_Ch_isEcntOverflowEvent (Ifx_GTM_TIM_CH *channel)
Test the event counter overflow flag. More...
IFX_INLINE boolean | IfxGtm_Tim_Ch_isGlitchEvent (Ifx_GTM_TIM_CH *channel)
Test the glitch flag. More...
IFX_INLINE boolean | IfxGtm_Tim_Ch_isNewValueEvent (Ifx_GTM_TIM_CH *channel)
Test the new value flag. More...
IFX_INLINE void | IfxGtm_Tim_Ch_setAuxInputSourceSelection (Ifx_GTM *gtm, IfxGtm_Tim timIndex, IfxGtm_Tim_Ch channel)
set the Auxilary input source selection of a particular channel. More...
IFX_INLINE void | IfxGtm_Tim_Ch_setEdgeCounter (Ifx_GTM_TIM_CH *channel, uint8 edgeCounter)
This function configures the Edge counter register. More...
IFX_INLINE void | IfxGtm_Tim_Ch_setFallingEdgeFilterTime (Ifx_GTM_TIM_CH *channel, uint32 filterTime)
This function configures the Falling edge Filter Parameter. More...
IFX_INLINE void | IfxGtm_Tim_Ch_setInputSourceSelection (Ifx_GTM_TIM *tim, IfxGtm_Tim_Ch channel, IfxGtm_Tim_InputSourceSelect inputSource)
This function configures the Input source selection register. More...
IFX_INLINE void | IfxGtm_Tim_Ch_setNotification (Ifx_GTM_TIM_CH *channel, IfxGtm_Tim_IrqType irqType)
set the Interrupt Notification More...
IFX_INLINE void | IfxGtm_Tim_Ch_setRisingEdgeFilterTime (Ifx_GTM_TIM_CH *channel, uint32 filterTime)
This function configures theRaising edge Filter Parameter. More...
IFX_INLINE void | IfxGtm_Tim_Ch_setShadowCounter (Ifx_GTM_TIM_CH *channel, uint32 shadowCounter)
This function configures the Shadow counter register. More...
IFX_INLINE Ifx_GTM_TIM_CH * | IfxGtm_Tim_getChannel (Ifx_GTM_TIM *tim, IfxGtm_Tim_Ch channel)
Returns the pointer to the TIM channel. More...
IFX_INLINE void | IfxGtm_Tim_Ch_resetChannel (Ifx_GTM_TIM *tim, IfxGtm_Tim_Ch channel)
Reset the specified TIM channel. More...
IFX_EXTERN float32 | IfxGtm_Tim_Ch_getCaptureClockFrequency (Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Capture Clock Frequency. More...
IFX_EXTERN IfxGtm_Cmu_Clk | IfxGtm_Tim_Ch_getCaptureClockSource (Ifx_GTM_TIM_CH *channel)
Returns the capture clock source selected. More...
IFX_EXTERN float32 | IfxGtm_Tim_Ch_getFilterClockFrequency (Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Filter Clock Frequency. More...
IFX_EXTERN IfxGtm_Cmu_Tim_Filter_Clk | IfxGtm_Tim_Ch_getFilterClockSource (Ifx_GTM_TIM_CH *channel)
Returns the Filter clock source selected. More...
IFX_EXTERN float32 | IfxGtm_Tim_Ch_getTimeoutClockFrequency (Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Timeout Clock Frequency. More...
IFX_EXTERN IfxGtm_Cmu_Clk | IfxGtm_Tim_Ch_getTimeoutClockSource (Ifx_GTM_TIM_CH *channel)
Returns the Timeout clock source selected. More...
IFX_EXTERN void | IfxGtm_Tim_Ch_setChannelNotification (Ifx_GTM_TIM_CH *channel, boolean irqOnNewVal, boolean irqOnCntOverflow, boolean irqOnEcntOverflow, boolean irqOnDatalost)
Set the channel notification. More...
IFX_EXTERN void | IfxGtm_Tim_Ch_setClockSource (Ifx_GTM_TIM_CH *channel, IfxGtm_Cmu_Clk clock)
Set the channel clock source. More...
IFX_EXTERN void | IfxGtm_Tim_Ch_setControl (Ifx_GTM_TIM_CH *channel, IfxGtm_Tim_ChannelControl control)
This function configures the TIM channel Control register. More...
IFX_EXTERN void | IfxGtm_Tim_Ch_setFilterNotification (Ifx_GTM_TIM_CH *channel, boolean irqOnGlitch)
Set the filter notification. More...
IFX_EXTERN void | IfxGtm_Tim_Ch_setNotificationMode (Ifx_GTM_TIM_CH *channel, IfxGtm_IrqMode mode)
This function configures the TIM channel IRQ mode. More...
IFX_EXTERN void | IfxGtm_Tim_Ch_setTimeoutNotification (Ifx_GTM_TIM_CH *channel, boolean irqOnTimeout)
Set the timeout notification. More...
IFX_INLINE void | IfxGtm_Tim_Ch_setTimTin (IfxGtm_Tim timIndex, IfxGtm_Tim_Ch channelIndex, uint32 tinSel)
sets the TIMINSEL register with the required mux setting More...

Detailed Description

GTM basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Tim.h.

Data Structure Documentation

◆ IfxGtm_Tim_ChannelControl

struct IfxGtm_Tim_ChannelControl

Channel control.

Definition at line 163 of file IfxGtm_Tim.h.

Data Fields
boolean | channelInputControl | 0- use signal TIM_IN(x) as input for channel . 1- use signal TIM_IN(x-1) as input for channel x (or TIM_IN(m-1) if x is 0)
IfxGtm_Cmu_Clk | clkSel | CMU clock source select for channel.
IfxGtm_Tim_CntsSel | cntsSel | Selection for CNTS register.
boolean | egpr0Sel | Extension of GPR0_SEL bit field.
boolean | egpr1Sel | Extension of GPR1_SEL bit field.
boolean | enable | TIM channel enable.
boolean | enableAruRouting | GPR0 and GPR1 register values routed to ARU. 0- Registers content not routed. 1- Registers content routed.
boolean | enableCounterReset | Enables resetting of counter in certain modes ( TIM_MODE=0b101 (TGPS) / TIM_MODE=0b000 (TPWM)) 0- ECNT counter operating in wrap around mode / ECNT counter operating in wrap around mode, CNT is reset on active input edge defined by DSL 1 - ECNT counter is reset with periodic sampling / ECNT counter operating in wrap around mode, CNT is reset on active and inactive input edge else ECNT counter operating in wrap around mode; In TIM_MODE=0b110 (TSSM) the bit field ECNT_RESET defines the initial polarity for the shift register.
boolean | enableExternalCaptureMode | Enables external capture mode.
boolean | enableFilter | enable Filter
boolean | enableOneShotMode | enable OneShot Mode (disable - continous operation mode)
boolean | extendEdgeCounterOverflow | Extended Edge counter overflow behavior 0- Overflow will be signaled on ECNT bit width = 8 1- Overflow will be signaled on EECNT bit width (full range)
IfxGtm_Tim_FilterCounterFreqSel | filterCounterFrequency | Filter counter frequency select.
IfxGtm_Tim_FilterCounter | filterCounterModeFallingEdge | Filter counter mode for falling edge.
IfxGtm_Tim_FilterCounter | filterCounterModeRisingEdge | Filter counter mode for rising edge.
IfxGtm_Tim_FilterMode | filterModeFallingEdge | Filter mode for falling edge.
IfxGtm_Tim_FilterMode | filterModeRisingEdge | Filter mode for rising edge.
IfxGtm_Tim_GprSel | gpr0Sel | Selection for GPR0 register.
IfxGtm_Tim_GprSel | gpr1Sel | Selection for GPR1 register.
boolean | ignoreSignalLevel | ignore Signal Level. 0- use DSL bit for selecting active signal level (TIEM). 1- ignore DSL and treat both edges as active edge (TIEM).
IfxGtm_Tim_Mode | mode | TIM channel Mode.
boolean | signalLevelControl | Signal level control 0- Measurement starts with falling edge (low level measurement). 1- Measurement starts with rising edge (high level measurement) In TIM_MODE=0b110 (TSSM) the bit field DSL defines the shift direction. 0- Shift left 1- Shift right.
IfxGtm_Tim_Timeout | timeoutControl | Timeout control.

◆ IfxGtm_Tim_InputSourceSelect

struct IfxGtm_Tim_InputSourceSelect

Definition at line 205 of file IfxGtm_Tim.h.

Data Fields
uint8 | mode | Input source to Channel. multi-core encoding in use (MODE_x(1) defines the state of the signal) 00- State is 0 (ignore write access) 01- Change state to 0 10- Change state to 1 11- State is 1 (ignore write access)
uint8 | value |

Function Documentation

◆ IfxGtm_Tim_Ch_setTimTin()

IFX_INLINE void IfxGtm_Tim_Ch_setTimTin | ( | IfxGtm_Tim | timIndex,
 |  | IfxGtm_Tim_Ch | channelIndex,
 |  | uint32 | tinSel
 | ) |  |

sets the TIMINSEL register with the required mux setting

Parameters
timIndex | Index of TIM module
channelIndex | index of TIM channel
tinSel | MUX value selection
Returns
None

Definition at line 635 of file IfxGtm_Tim.h.


iLLD_TC38A: IfxGtm_Tom.h File Reference

  • Gtm
  • Std
Macros | Enumerations | Functions
IfxGtm_Tom.h File Reference
iLLD » GTM

GTM basic functionality. More...

#include "_Impl/IfxGtm_cfg.h"
#include "IfxGtm.h"
#include "IfxGtm_Tbu.h"
#include "Src/Std/IfxSrc.h"
Include dependency graph for IfxGtm_Tom.h:

Go to the source code of this file.

Macros

#define IFXGTM_TOM_NUM_TGC_CHANNELS (8)
Number of channels per TOM TGC. More...

Enumerations

enum IfxGtm_Tom_Ch_ClkSrc {
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk0 = 0,
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk1 = 1,
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk2 = 2,
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk3 = 3,
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk4 = 4,
IfxGtm_Tom_Ch_ClkSrc_noClock = 5
}
Clock source for the TOM channels. More...
enum IfxGtm_Tom_Ch_OutputTrigger {
IfxGtm_Tom_Ch_OutputTrigger_forward = 0,
IfxGtm_Tom_Ch_OutputTrigger_generate = 1
}
Reset source for channel counter CN0. More...
enum IfxGtm_Tom_Ch_ResetEvent {
IfxGtm_Tom_Ch_ResetEvent_onCm0 = 0,
IfxGtm_Tom_Ch_ResetEvent_onTrigger = 1
}
Reset event for channel counter CN0. More...

Functions

IFX_INLINE Ifx_GTM_TOM_CH * | IfxGtm_Tom_Ch_getChannelPointer (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the base addredd of selected Tom channel. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_clearOneNotification (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Clears the channel One notification. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_clearZeroNotification (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Clears the channel Zero notification. More...
IFX_EXTERN float32 | IfxGtm_Tom_Ch_getClockFrequency (Ifx_GTM *gtm, Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the TOM channel input clock frequency in Hz. More...
IFX_EXTERN IfxGtm_Tom_Ch_ClkSrc | IfxGtm_Tom_Ch_getClockSource (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the channel clock source. More...
IFX_EXTERN uint32 | IfxGtm_Tom_Ch_getCompareOne (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare one value. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Tom_Ch_getCompareOnePointer (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare one pointer. More...
IFX_EXTERN uint32 | IfxGtm_Tom_Ch_getCompareZero (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare zero value. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Tom_Ch_getCompareZeroPointer (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare zero pointer. More...
IFX_EXTERN boolean | IfxGtm_Tom_Ch_getOutputLevel (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Gets the TOM output level. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxGtm_Tom_Ch_getSrcPointer (Ifx_GTM *gtm, IfxGtm_Tom tom, IfxGtm_Tom_Ch channel)
Returns a pointer to the TOM channel SRC. More...
IFX_EXTERN Ifx_GTM_TOM_TGC * | IfxGtm_Tom_Ch_getTgcPointer (Ifx_GTM_TOM *tom, uint32 tgcIndex)
Returns the TGC pointer. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Tom_Ch_getTimerPointer (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the Timer pointer. More...
IFX_EXTERN boolean | IfxGtm_Tom_Ch_isOneNotification (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the status of channel One notification. More...
IFX_EXTERN boolean | IfxGtm_Tom_Ch_isZeroNotification (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the status of channel Zero notification. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_raiseInterruptOne (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Raises the interrupt for Compare 1. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_raiseInterruptZero (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Raises the interrupt for Compare 0. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setClockSource (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ClkSrc clock)
Sets the channel clock source. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setCompare (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareZero, uint32 compareOne)
Sets the compare 0 and 1 values. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setCompareOne (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareOne)
Sets the compare 1 value. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setCompareOneShadow (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowOne)
Sets the compare 1 shadow value. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setCompareShadow (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero, uint32 shadowOne)
Sets the compare 0 and 1 shadow values. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setCompareZero (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareZero)
Sets the compare 0 value. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setCompareZeroShadow (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero)
Sets the compare 0 shadow value. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setCounterValue (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 value)
Sets the counter value. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setGatedCounter (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the gated counter mode (channel 0 to 7 only) More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setNotification (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne)
Sets the channel notification. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setOneShotMode (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the one shot mode. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setPcm (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the PCM mode (channel 15 only) More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setResetSource (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ResetEvent event)
Sets the channel clock source either from local or from previous channel. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setSignalLevel (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, Ifx_ActiveState activeState)
Sets the signal level. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setSpe (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the SPE mode (channel 0 to 7 only) More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setTriggerOutput (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_OutputTrigger trigger)
Sets the channel trigger output. More...
IFX_INLINE void | IfxGtm_Tom_Tgc_writeGlobalControl (Ifx_GTM_TOM_TGC *tgc, uint32 control)
Sets the tgc global control value. More...
IFX_EXTERN uint32 | IfxGtm_Tom_Tgc_buildFeature (uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable. More...
IFX_EXTERN uint32 | IfxGtm_Tom_Tgc_buildFeatureForChannel (IfxGtm_Tom_Ch channel, boolean enabled, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable for a single channel. More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_enableChannel (Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel (ENDIS) More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_enableChannelOutput (Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel output (OUTEN) More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_enableChannelUpdate (Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable one channel for update (UPEN) More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_enableChannels (Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels (ENDIS) More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_enableChannelsOutput (Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels output (OUTEN) More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_enableChannelsTrigger (Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask)
Enable/disable the TGC channels trigger. More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_enableChannelsUpdate (Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask)
Enable/disable one or more channels for update (UPEN) More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_enableTimeTrigger (Ifx_GTM_TOM_TGC *tgc, boolean enabled)
Enable/disable the time base trigger. More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_resetChannels (Ifx_GTM_TOM_TGC *tgc, uint32 resetMask)
Reset one or more channels. More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_setChannelForceUpdate (Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean resetEnabled)
Enable/disable one channel for update (FUPD) More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_setChannelsForceUpdate (Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
Enable/disable one or more channels for the force update feature (FUPD) More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_setTimeTrigger (Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tbu_Ts base, uint32 value)
Sets the trigger time base and time base value. More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_trigger (Ifx_GTM_TOM_TGC *tgc)
Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG) More...
IFX_INLINE void | IfxGtm_Tom_setTout (uint32 toutNum, uint32 toutSel)
Configures the tout selection. More...

Detailed Description

GTM basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Tom.h.

Macro Definition Documentation

◆ IFXGTM_TOM_NUM_TGC_CHANNELS

#define IFXGTM_TOM_NUM_TGC_CHANNELS (8)

Number of channels per TOM TGC.

Definition at line 73 of file IfxGtm_Tom.h.

Referenced by IfxGtm_Tom_Tgc_buildFeature(), and IfxGtm_Tom_Tgc_resetChannels().


iLLD_TC38A: IfxGtm_Tim_In.h File Reference

  • Gtm
  • Tim
  • In
Data Structures | Enumerations | Functions
IfxGtm_Tim_In.h File Reference
iLLD » GTM

GTM IN details. More...

#include "_PinMap/IfxGtm_PinMap.h"
#include "Gtm/Std/IfxGtm_Tim.h"
#include "Gtm/Std/IfxGtm_Cmu.h"
#include "Cpu/Std/IfxCpu.h"
#include "_Utilities/Ifx_Assert.h"
Include dependency graph for IfxGtm_Tim_In.h:

Go to the source code of this file.

Data Structures

struct | IfxGtm_Tim_In_ConfigCapture
Configuration structure for TIM capture. More...
struct | IfxGtm_Tim_In_ConfigFilter
Configuration structure for TIM filter. More...
struct | IfxGtm_Tim_In_ConfigTimeout
Configuration structure for TIM timeout. More...
struct | IfxGtm_Tim_In
Driver Handle. More...
struct | IfxGtm_Tim_In_Config
Configuration structure for TIM input capture. More...

Enumerations

enum IfxGtm_Tim_In_ConfigFilterMode {
IfxGtm_Tim_In_ConfigFilterMode_immediateEdgePropagation,
IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeUpDown,
IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeHold,
IfxGtm_Tim_In_ConfigFilterMode_none
}
Config Filter Mode. More...
enum IfxGtm_Tim_In_Input {
IfxGtm_Tim_In_Input_currentChannel,
IfxGtm_Tim_In_Input_adjacentChannel,
IfxGtm_Tim_In_Input_aux
}
Input Source. More...

Functions

IFX_INLINE void | IfxGtm_Tim_In_clearNewData (IfxGtm_Tim_In *driver)
Clear the new data flag. More...
IFX_INLINE float32 | IfxGtm_Tim_In_getDutyPercent (IfxGtm_Tim_In *driver, boolean *dataCoherent)
return the dutycycle in percent More...
IFX_INLINE float32 | IfxGtm_Tim_In_getPeriodSecond (IfxGtm_Tim_In *driver)
Return the period in second. More...
IFX_INLINE sint32 | IfxGtm_Tim_In_getPeriodTicks (IfxGtm_Tim_In *driver)
Return the period value in tick. More...
IFX_INLINE sint32 | IfxGtm_Tim_In_getPulseLengthTick (IfxGtm_Tim_In *driver)
Return the pulse length value in tick. More...
IFX_INLINE boolean | IfxGtm_Tim_In_isDataLost (IfxGtm_Tim_In *driver)
Indicates if data were lost. More...
IFX_INLINE boolean | IfxGtm_Tim_In_isNewData (IfxGtm_Tim_In *driver)
Indicates if new data are present (new data flag) More...
IFX_EXTERN boolean | IfxGtm_Tim_In_init (IfxGtm_Tim_In *driver, const IfxGtm_Tim_In_Config *config)
Initializes the input capture object. More...
IFX_EXTERN void | IfxGtm_Tim_In_initConfig (IfxGtm_Tim_In_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default. More...
IFX_EXTERN void | IfxGtm_Tim_In_onIsr (IfxGtm_Tim_In *driver)
will update the driver state
To be called in the interrupt generated by the IfxGtm_Tim_In driver More...
IFX_EXTERN void | IfxGtm_Tim_In_update (IfxGtm_Tim_In *driver)
Updates the period and duty cycle. More...

Detailed Description

GTM IN details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Tim_In.h.


iLLD_TC38A: IfxGtm_Tim_Timer.h File Reference

  • Gtm
  • Tim
  • Timer
Data Structures | Functions
IfxGtm_Tim_Timer.h File Reference
iLLD » GTM

GTM TIMER details. More...

#include "Gtm/Std/IfxGtm_Tim.h"
#include "Gtm/Std/IfxGtm_Cmu.h"
#include "_Impl/IfxGtm_cfg.h"
Include dependency graph for IfxGtm_Tim_Timer.h:

Go to the source code of this file.

Data Structures

struct | IfxGtm_Tim_Timer
Tim handle data structure. More...
struct | IfxGtm_Tim_Timer_Config
Tim configuration data structure. More...

Functions

IFX_EXTERN void | IfxGtm_Tim_Timer_initChannel (IfxGtm_Tim_Timer *driver, IfxGtm_Tim_Timer_Config *config)
Initialises the TIM channel object. More...
IFX_EXTERN void | IfxGtm_Tim_Timer_initChannelConfig (IfxGtm_Tim_Timer_Config *config, Ifx_GTM *gtm)
Initialise the config struct with default TIM channel configuration. More...

Detailed Description

GTM TIMER details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Tim_Timer.h.

Data Structure Documentation

◆ IfxGtm_Tim_Timer

struct IfxGtm_Tim_Timer

Tim handle data structure.

Definition at line 62 of file IfxGtm_Tim_Timer.h.

Data Fields
IfxGtm_Tim_Ch | channel | Tim channel no.
Ifx_GTM * | gtm | Pointer to GTM module.
Ifx_GTM_TIM * | tim | Pointer to TIM module.
IfxGtm_Tim | timIndex | Specifies the TIM module no.

◆ IfxGtm_Tim_Timer_Config

struct IfxGtm_Tim_Timer_Config

Tim configuration data structure.

Definition at line 72 of file IfxGtm_Tim_Timer.h.

Collaboration diagram for IfxGtm_Tim_Timer_Config:
[legend]
Data Fields
IfxGtm_Tim_Ch | channel | Tim channel no.
IfxGtm_Tim_ChannelControl | channelControl | Control configuration.
boolean | enableAuxInputSourceSelect | enable aurilliary input source selection
uint32 | fallingEdgeFilterTime | Filter Falling Edge parameter.
IfxGtm_Tim_InputSourceSelect | inputSourceSelect | input source selection (mode , Value)
boolean | irqEnable | enable interrupt notification
IfxGtm_IrqMode | irqMode | interrupt mode (level/pulse/pulse notify/single pulse)
IfxGtm_Tim_IrqType | irqType | interrupt type (new value/ ecnt overflow/ gpr overflow/ cnt overflow / TO detect / glitch detect)
uint32 | raisingEdgeFilterTime | Filter Raising Edge parameter.
uint32 | shadowCounter | Shadow counter value.
IfxGtm_Tim | timIndex | Specifies the TIM instance number.

Function Documentation

◆ IfxGtm_Tim_Timer_initChannel()

IFX_EXTERN void IfxGtm_Tim_Timer_initChannel | ( | IfxGtm_Tim_Timer * | driver,
 |  | IfxGtm_Tim_Timer_Config * | config
 | ) |  |

Initialises the TIM channel object.

Parameters
driver | TOM Timer interface Handle
config | Configuration structure for TIM
Returns
None

Definition at line 53 of file IfxGtm_Tim_Timer.c.

◆ IfxGtm_Tim_Timer_initChannelConfig()

IFX_EXTERN void IfxGtm_Tim_Timer_initChannelConfig | ( | IfxGtm_Tim_Timer_Config * | config,
 |  | Ifx_GTM * | gtm
 | ) |  |

Initialise the config struct with default TIM channel configuration.

Parameters
config | pointer to the TIM Channel configuration (it will be initialized by this function)
gtm | Pointer to GTM module
Returns
None

Definition at line 87 of file IfxGtm_Tim_Timer.c.


iLLD_TC38A: IfxGtm_Tom_Dtm_PwmHl.h File Reference

  • Gtm
  • Tom
  • Dtm_PwmHl
Data Structures | Macros | Typedefs | Functions
IfxGtm_Tom_Dtm_PwmHl.h File Reference
iLLD » GTM

GTM DTM_PWMHL details. More...

#include "StdIf/IfxStdIf_PwmHl.h"
#include "Gtm/Tom/Timer/IfxGtm_Tom_Timer.h"
#include "Gtm/Std/IfxGtm_Dtm.h"
Include dependency graph for IfxGtm_Tom_Dtm_PwmHl.h:

Go to the source code of this file.

Data Structures

struct | IfxGtm_Tom_Dtm_PwmHl_Base
Multi-channels PWM object definition (channels only) More...
struct | IfxGtm_Tom_Dtm_PwmHl_Config
GTM TOM: PWM HL configuration. More...
struct | IfxGtm_Tom_Dtm_PwmHl_Mode
Structure for PWM configuration. More...
struct | IfxGtm_Tom_Dtm_PwmHl_s
GTM TOM PWM driver. More...

Macros

#define | IFXGTM_TOM_DTM_PWMHL_MAX_NUM_CHANNELS (3)
Maximal number of channels handled by the driver. One channel has a top and bottom pwm output. More...
#define | IFXGTM_TOM_DTM_PWMHL_MAX_DEADTIME_IN_TICKS (1023)

Typedefs

typedef struct IfxGtm_Tom_Dtm_PwmHl_s | IfxGtm_TomDtm_PwmHl
typedef void(* | IfxGtm_Tom_Dtm_PwmHl_Update) (IfxGtm_TomDtm_PwmHl *driver, Ifx_TimerValue *tOn)
typedef void(* | IfxGtm_Tom_Dtm_PwmHl_UpdateShift) (IfxGtm_TomDtm_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
typedef void(* | IfxGtm_Tom_Dtm_PwmHl_UpdatePulse) (IfxGtm_TomDtm_PwmHl *driver, float32 *tOn, float32 *offset)

Functions

IFX_EXTERN boolean | IfxGtm_Tom_Dtm_PwmHl_init (IfxGtm_TomDtm_PwmHl *driver, const IfxGtm_Tom_Dtm_PwmHl_Config *config)
Initializes the timer object note : To ensure that the channels counter are reset by the timer and do not overflow, leading to random signal on the output, the timer must be started before the call to this function. More...
IFX_EXTERN void | IfxGtm_Tom_Dtm_PwmHl_initConfig (IfxGtm_Tom_Dtm_PwmHl_Config *config)
Initialize the configuration structure to default. More...
IFX_EXTERN float32 | IfxGtm_Tom_Dtm_PwmHl_getDeadtime (IfxGtm_TomDtm_PwmHl *driver)
Returns the dead time. More...
IFX_EXTERN Ifx_TickTime | IfxGtm_Tom_Dtm_PwmHl_getDeadtimeTick (IfxGtm_TomDtm_PwmHl *driver)
IFX_EXTERN float32 | IfxGtm_Tom_Dtm_PwmHl_getMinPulse (IfxGtm_TomDtm_PwmHl *driver)
Returns the minimum pulse. More...
IFX_EXTERN Ifx_Pwm_Mode | IfxGtm_Tom_Dtm_PwmHl_getMode (IfxGtm_TomDtm_PwmHl *driver)
Returns Pwm mode. More...
IFX_EXTERN boolean | IfxGtm_Tom_Dtm_PwmHl_setDeadtime (IfxGtm_TomDtm_PwmHl *driver, float32 deadtime)
Sets the dead time. More...
IFX_EXTERN boolean | IfxGtm_Tom_Dtm_PwmHl_setMinPulse (IfxGtm_TomDtm_PwmHl *driver, float32 minPulse)
Sets the minimum pulse. More...
IFX_EXTERN boolean | IfxGtm_Tom_Dtm_PwmHl_setMode (IfxGtm_TomDtm_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate() More...
IFX_EXTERN void | IfxGtm_Tom_Dtm_PwmHl_setOnTimeAndShift (IfxGtm_TomDtm_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets the ON time and Shift. More...
IFX_EXTERN void | IfxGtm_Tom_Dtm_PwmHl_setPulse (IfxGtm_TomDtm_PwmHl *driver, float32 *tOn, float32 *offset)
Sets the ON time and offset, all switched are independent. More...
IFX_EXTERN void | IfxGtm_Tom_Dtm_PwmHl_setupChannels (IfxGtm_TomDtm_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set up channels. More...
IFX_EXTERN boolean | IfxGtm_Tom_Dtm_PwmHl_stdIfPwmHlInit (IfxStdIf_PwmHl *stdif, IfxGtm_TomDtm_PwmHl *driver)
Initialises the statndard interface Pwm. More...

Detailed Description

GTM DTM_PWMHL details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Tom_Dtm_PwmHl.h.

Data Structure Documentation

◆ IfxGtm_Tom_Dtm_PwmHl_Base

struct IfxGtm_Tom_Dtm_PwmHl_Base

Multi-channels PWM object definition (channels only)

Definition at line 123 of file IfxGtm_Tom_Dtm_PwmHl.h.

Data Fields
Ifx_ActiveState | ccxActiveState | Top PWM active state.
uint8 | channelCount | Number of PWM channels, one channel is made of a top and bottom channel.
Ifx_ActiveState | coutxActiveState | Bottom PWM active state.
Ifx_TimerValue | deadtime | Dead time between the top and bottom channel in ticks.
boolean | inverted | Flag indicating the center aligned inverted mode (TRUE)
Ifx_TimerValue | maxPulse | internal parameter
Ifx_TimerValue | minPulse | minimum pulse that is output, shorter pulse time will be output as 0% duty cycle
Ifx_Pwm_Mode | mode | actual PWM mode
sint8 | setMode | A non zero flag indicates that the PWM mode is being modified.

◆ IfxGtm_Tom_Dtm_PwmHl_Config

struct IfxGtm_Tom_Dtm_PwmHl_Config

GTM TOM: PWM HL configuration.

Definition at line 138 of file IfxGtm_Tom_Dtm_PwmHl.h.

Collaboration diagram for IfxGtm_Tom_Dtm_PwmHl_Config:
[legend]
Data Fields
IfxStdIf_PwmHl_Config | base | PWM HL standard interface configuration.
IFX_CONST IfxGtm_Tom_ToutMapP * | ccx | Pointer to an array of size pwmHl.channels.channelCount containing the channels used. Channels must be adjacent channels.
IFX_CONST IfxGtm_Tom_ToutMapP * | coutx | Pointer to an array of size pwmHl.channels.channelCount containing the channels used. Channels must be adjacent channels.
IfxGtm_Dtm_ClockSource | deadTimeClock | Clock used for the dead time generation.
boolean | initPins | TRUE: Initialize pins in driver, FALSE: Don't initialize pins in driver. User handles separately.
IfxGtm_Tom_Timer * | timer | Pointer to the linked timer object.
IfxGtm_Tom | tom | TOM unit used.

◆ IfxGtm_Tom_Dtm_PwmHl_Mode

struct IfxGtm_Tom_Dtm_PwmHl_Mode

Structure for PWM configuration.

Definition at line 151 of file IfxGtm_Tom_Dtm_PwmHl.h.

Collaboration diagram for IfxGtm_Tom_Dtm_PwmHl_Mode:
[legend]
Data Fields
boolean | inverted | Inverted configuration for the selected mode.
Ifx_Pwm_Mode | mode | PWM mode.
IfxGtm_Tom_Dtm_PwmHl_Update | update | update call back function for the selected mode
IfxGtm_Tom_Dtm_PwmHl_UpdateShift | updateAndShift | update shift call back function for the selected mode
IfxGtm_Tom_Dtm_PwmHl_UpdatePulse | updatePulse | update pulse call back function for the selected mode

◆ IfxGtm_Tom_Dtm_PwmHl_s

struct IfxGtm_Tom_Dtm_PwmHl_s

GTM TOM PWM driver.

Definition at line 162 of file IfxGtm_Tom_Dtm_PwmHl.h.

Collaboration diagram for IfxGtm_Tom_Dtm_PwmHl_s:
[legend]
Data Fields
IfxGtm_Tom_Dtm_PwmHl_Base | base | Multi-channels PWM object definition (channels only)
IfxGtm_Tom_Ch | ccx[IFXGTM_TOM_DTM_PWMHL_MAX_NUM_CHANNELS] | TOM channels used for the CCCX outputs.
IfxGtm_Tom_Ch | coutx[IFXGTM_TOM_DTM_PWMHL_MAX_NUM_CHANNELS] | TOM channels used for the OUTX outputs.
Ifx_GTM_CDTM_DTM * | dtm[IFXGTM_TOM_DTM_PWMHL_MAX_NUM_CHANNELS] | Dead time module (DTM) used. Matching the Tom.
IfxGtm_Dtm_Ch | dtmChannel[IFXGTM_TOM_DTM_PWMHL_MAX_NUM_CHANNELS] | DTM channel used.
float32 | dtmClockFreq | Deadtime module input clock frequency (cached value)
Ifx_GTM_TOM_TGC * | tgc | TGC unit used.
IfxGtm_Tom_Timer * | timer | Pointer to the linked timer object.
Ifx_GTM_TOM * | tom | TOM unit used.
IfxGtm_Tom_Dtm_PwmHl_Update | update | update call back function for the selected mode
IfxGtm_Tom_Dtm_PwmHl_UpdateShift | updateAndShift | update shift call back function for the selected mode
IfxGtm_Tom_Dtm_PwmHl_UpdatePulse | updatePulse | update pulse call back function for the selected mode

Macro Definition Documentation

◆ IFXGTM_TOM_DTM_PWMHL_MAX_DEADTIME_IN_TICKS

#define IFXGTM_TOM_DTM_PWMHL_MAX_DEADTIME_IN_TICKS (1023)

Definition at line 103 of file IfxGtm_Tom_Dtm_PwmHl.h.

Referenced by IfxGtm_Tom_Dtm_PwmHl_setDeadtime().

◆ IFXGTM_TOM_DTM_PWMHL_MAX_NUM_CHANNELS

#define IFXGTM_TOM_DTM_PWMHL_MAX_NUM_CHANNELS (3)

Maximal number of channels handled by the driver. One channel has a top and bottom pwm output.

Definition at line 101 of file IfxGtm_Tom_Dtm_PwmHl.h.

Referenced by IfxGtm_Tom_Dtm_PwmHl_init().

Typedef Documentation

◆ IfxGtm_Tom_Dtm_PwmHl_Update

typedef void(* IfxGtm_Tom_Dtm_PwmHl_Update) (IfxGtm_TomDtm_PwmHl *driver, Ifx_TimerValue *tOn)

Definition at line 111 of file IfxGtm_Tom_Dtm_PwmHl.h.

◆ IfxGtm_Tom_Dtm_PwmHl_UpdatePulse

typedef void(* IfxGtm_Tom_Dtm_PwmHl_UpdatePulse) (IfxGtm_TomDtm_PwmHl *driver, float32 *tOn, float32 *offset)

Definition at line 115 of file IfxGtm_Tom_Dtm_PwmHl.h.

◆ IfxGtm_Tom_Dtm_PwmHl_UpdateShift

typedef void(* IfxGtm_Tom_Dtm_PwmHl_UpdateShift) (IfxGtm_TomDtm_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)

Definition at line 113 of file IfxGtm_Tom_Dtm_PwmHl.h.

◆ IfxGtm_TomDtm_PwmHl

typedef struct IfxGtm_Tom_Dtm_PwmHl_s IfxGtm_TomDtm_PwmHl

Definition at line 109 of file IfxGtm_Tom_Dtm_PwmHl.h.

Function Documentation

◆ IfxGtm_Tom_Dtm_PwmHl_getDeadtime()

IFX_EXTERN float32 IfxGtm_Tom_Dtm_PwmHl_getDeadtime ( IfxGtm_TomDtm_PwmHl * driver )

Returns the dead time.

Parameters
driver driver GTM TOM PWM driver
Returns
Dead Time

Definition at line 285 of file IfxGtm_Tom_Dtm_PwmHl.c.

Referenced by IfxGtm_Tom_Dtm_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_Dtm_PwmHl_getDeadtimeTick()

IFX_EXTERN Ifx_TickTime IfxGtm_Tom_Dtm_PwmHl_getDeadtimeTick ( IfxGtm_TomDtm_PwmHl * driver )

Definition at line 291 of file IfxGtm_Tom_Dtm_PwmHl.c.

Referenced by IfxGtm_Tom_Dtm_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_Dtm_PwmHl_getMinPulse()

IFX_EXTERN float32 IfxGtm_Tom_Dtm_PwmHl_getMinPulse ( IfxGtm_TomDtm_PwmHl * driver )

Returns the minimum pulse.

Parameters
driver driver GTM TOM PWM driver
Returns
Min Pulse

Definition at line 297 of file IfxGtm_Tom_Dtm_PwmHl.c.

Referenced by IfxGtm_Tom_Dtm_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_Dtm_PwmHl_getMode()

IFX_EXTERN Ifx_Pwm_Mode IfxGtm_Tom_Dtm_PwmHl_getMode ( IfxGtm_TomDtm_PwmHl * driver )

Returns Pwm mode.

Parameters
driver driver GTM TOM PWM driver
Returns
Pwm mode

Definition at line 303 of file IfxGtm_Tom_Dtm_PwmHl.c.

Referenced by IfxGtm_Tom_Dtm_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_Dtm_PwmHl_init()

IFX_EXTERN boolean IfxGtm_Tom_Dtm_PwmHl_init | ( | IfxGtm_TomDtm_PwmHl * | driver,
 |  | const IfxGtm_Tom_Dtm_PwmHl_Config * | config
 | ) |  |

Initializes the timer object note : To ensure that the channels counter are reset by the timer and do not overflow, leading to random signal on the output, the timer must be started before the call to this function.

Parameters
driver | driver GTM TOM PWM driver
config | config GTM TOM: PWM HL configuration
Returns
TRUE on success else FALSE

Definition at line 159 of file IfxGtm_Tom_Dtm_PwmHl.c.

◆ IfxGtm_Tom_Dtm_PwmHl_initConfig()

IFX_EXTERN void IfxGtm_Tom_Dtm_PwmHl_initConfig ( IfxGtm_Tom_Dtm_PwmHl_Config * config )

Initialize the configuration structure to default.

Parameters
config config Channel configuration. This parameter is Initialised by the function
Returns
None

Definition at line 273 of file IfxGtm_Tom_Dtm_PwmHl.c.

◆ IfxGtm_Tom_Dtm_PwmHl_setDeadtime()

IFX_EXTERN boolean IfxGtm_Tom_Dtm_PwmHl_setDeadtime | ( | IfxGtm_TomDtm_PwmHl * | driver,
 |  | float32 | deadtime
 | ) |  |

Sets the dead time.

Parameters
driver | driver GTM TOM PWM driver
deadtime | deadtime Dead time value
Returns
TRUE on success else FALSE

Definition at line 309 of file IfxGtm_Tom_Dtm_PwmHl.c.

Referenced by IfxGtm_Tom_Dtm_PwmHl_init(), and IfxGtm_Tom_Dtm_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_Dtm_PwmHl_setMinPulse()

IFX_EXTERN boolean IfxGtm_Tom_Dtm_PwmHl_setMinPulse | ( | IfxGtm_TomDtm_PwmHl * | driver,
 |  | float32 | minPulse
 | ) |  |

Sets the minimum pulse.

Parameters
driver | driver GTM TOM PWM driver
minPulse | minPulse Minimum pulse
Returns
TRUE on success else FALSE

Definition at line 332 of file IfxGtm_Tom_Dtm_PwmHl.c.

Referenced by IfxGtm_Tom_Dtm_PwmHl_init(), and IfxGtm_Tom_Dtm_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_Dtm_PwmHl_setMode()

IFX_EXTERN boolean IfxGtm_Tom_Dtm_PwmHl_setMode | ( | IfxGtm_TomDtm_PwmHl * | driver,
 |  | Ifx_Pwm_Mode | mode
 | ) |  |

Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate()

Parameters
driver | driver GTM TOM PWM driver
mode | mode Pwm mode
Returns
TRUE on success else FALSE

Definition at line 343 of file IfxGtm_Tom_Dtm_PwmHl.c.

Referenced by IfxGtm_Tom_Dtm_PwmHl_init(), and IfxGtm_Tom_Dtm_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_Dtm_PwmHl_setOnTimeAndShift()

IFX_EXTERN void IfxGtm_Tom_Dtm_PwmHl_setOnTimeAndShift | ( | IfxGtm_TomDtm_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn,
 |  | Ifx_TimerValue * | shift
 | ) |  |

Sets the ON time and Shift.

Parameters
driver | driver GTM TOM PWM driver
tOn | tOn ON time
shift | Shift value in ticks
Returns
None

Definition at line 385 of file IfxGtm_Tom_Dtm_PwmHl.c.

Referenced by IfxGtm_Tom_Dtm_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_Dtm_PwmHl_setPulse()

IFX_EXTERN void IfxGtm_Tom_Dtm_PwmHl_setPulse | ( | IfxGtm_TomDtm_PwmHl * | driver,
 |  | float32 * | tOn,
 |  | float32 * | offset
 | ) |  |

Sets the ON time and offset, all switched are independent.

Parameters
driver | driver GTM TOM PWM driver
tOn | tOn ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
offset | offset Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
Returns
None

Definition at line 391 of file IfxGtm_Tom_Dtm_PwmHl.c.

Referenced by IfxGtm_Tom_Dtm_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_Dtm_PwmHl_setupChannels()

IFX_EXTERN void IfxGtm_Tom_Dtm_PwmHl_setupChannels | ( | IfxGtm_TomDtm_PwmHl * | driver,
 |  | boolean * | activeCh,
 |  | boolean * | stuckSt
 | ) |  |

Set up channels.

Parameters
driver | driver GTM TOM PWM driver
activeCh | Active channel
stuckSt | Stuck state
Returns
None

Definition at line 397 of file IfxGtm_Tom_Dtm_PwmHl.c.

Referenced by IfxGtm_Tom_Dtm_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_Dtm_PwmHl_stdIfPwmHlInit()

IFX_EXTERN boolean IfxGtm_Tom_Dtm_PwmHl_stdIfPwmHlInit | ( | IfxStdIf_PwmHl * | stdif,
 |  | IfxGtm_TomDtm_PwmHl * | driver
 | ) |  |

Initialises the statndard interface Pwm.

Parameters
stdif | Standard interface object, will be initialized by the function
driver | Interface driver to be used by the standard interface. must be initialised separately
Returns
TRUE on success else FALSE

Definition at line 406 of file IfxGtm_Tom_Dtm_PwmHl.c.


iLLD_TC38A: IfxGtm_Tom_Pwm.h File Reference

  • Gtm
  • Tom
  • Pwm
Data Structures | Functions
IfxGtm_Tom_Pwm.h File Reference
iLLD » GTM

GTM PWM details. More...

#include "_PinMap/IfxGtm_PinMap.h"
#include "Gtm/Std/IfxGtm_Tom.h"
#include "Gtm/Std/IfxGtm_Cmu.h"
#include "Gtm/Std/IfxGtm_Dtm.h"
#include "Cpu/Std/IfxCpu.h"
Include dependency graph for IfxGtm_Tom_Pwm.h:

Go to the source code of this file.

Data Structures

struct | IfxGtm_Tom_Pwm_Interrupt
configuration structure for interrupts More...
struct | IfxGtm_Tom_Pwm_pin
configuration structure for output pin More...
struct | IfxGtm_Tom_Pwm_Config
Configuration structure. More...
struct | IfxGtm_Tom_Pwm_Driver
Driver Handle. More...

Functions

IFX_EXTERN boolean | IfxGtm_Tom_Pwm_init (IfxGtm_Tom_Pwm_Driver *driver, const IfxGtm_Tom_Pwm_Config *config)
Initialises the Timer object. More...
IFX_EXTERN void | IfxGtm_Tom_Pwm_initConfig (IfxGtm_Tom_Pwm_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default. More...
IFX_EXTERN void | IfxGtm_Tom_Pwm_start (IfxGtm_Tom_Pwm_Driver *driver, boolean immediate)
starts the PWM generation from the configured channel More...
IFX_EXTERN void | IfxGtm_Tom_Pwm_stop (IfxGtm_Tom_Pwm_Driver *driver, boolean immediate)
Stops the PWM generation from the configured channel. More...

Detailed Description

GTM PWM details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Tom_Pwm.h.

Data Structure Documentation

◆ IfxGtm_Tom_Pwm_pin

struct IfxGtm_Tom_Pwm_pin

configuration structure for output pin

Definition at line 150 of file IfxGtm_Tom_Pwm.h.

Collaboration diagram for IfxGtm_Tom_Pwm_pin:
[legend]
Data Fields
IfxPort_OutputMode | outputMode | Output mode.
IfxGtm_Tom_ToutMap * | outputPin | output pin
IfxPort_PadDriver | padDriver | Pad driver.

Function Documentation

◆ IfxGtm_Tom_Pwm_start()

IFX_EXTERN void IfxGtm_Tom_Pwm_start | ( | IfxGtm_Tom_Pwm_Driver * | driver,
 |  | boolean | immediate
 | ) |  |

starts the PWM generation from the configured channel

Parameters
driver | handle for the PWM device
immediate | immediate start or not
Returns
None

Definition at line 184 of file IfxGtm_Tom_Pwm.c.

◆ IfxGtm_Tom_Pwm_stop()

IFX_EXTERN void IfxGtm_Tom_Pwm_stop | ( | IfxGtm_Tom_Pwm_Driver * | driver,
 |  | boolean | immediate
 | ) |  |

Stops the PWM generation from the configured channel.

Parameters
driver | handle for the PWM device
immediate | immediate start or not.
Returns
None

Definition at line 195 of file IfxGtm_Tom_Pwm.c.


iLLD_TC38A: IfxGtm_Tom_PwmHl.h File Reference

  • Gtm
  • Tom
  • PwmHl
Data Structures | Macros | Typedefs | Functions
IfxGtm_Tom_PwmHl.h File Reference
iLLD » GTM

GTM PWMHL details. More...

#include "StdIf/IfxStdIf_PwmHl.h"
#include "Gtm/Tom/Timer/IfxGtm_Tom_Timer.h"
Include dependency graph for IfxGtm_Tom_PwmHl.h:

Go to the source code of this file.

Data Structures

struct | IfxGtm_Tom_PwmHl_Base
Multi-channels PWM object definition (channels only) More...
struct | IfxGtm_Tom_PwmHl_Config
GTM TOM: PWM HL configuration. More...
struct | IfxGtm_Tom_PwmHl_Mode
Structure for PWM configuration. More...
struct | IfxGtm_Tom_PwmHl_s
GTM TOM PWM driver. More...

Macros

#define IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS (3)
Maximal number of channels handled by the driver. One channel has a top and bottom pwm output Limited to 3 because the PWM channels used must be owned by the same TGC. More...

Typedefs

typedef struct IfxGtm_Tom_PwmHl_s | IfxGtm_Tom_PwmHl
typedef void(* | IfxGtm_Tom_PwmHl_Update) (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
typedef void(* | IfxGtm_Tom_PwmHl_UpdateShift) (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
typedef void(* | IfxGtm_Tom_PwmHl_UpdatePulse) (IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)

Functions

IFX_EXTERN boolean | IfxGtm_Tom_PwmHl_init (IfxGtm_Tom_PwmHl *driver, const IfxGtm_Tom_PwmHl_Config *config)
Initializes the timer object note To ensure that the channels counter are reset by the timer and do not overflow, leading to random signal on the output, the timer must be started before the call to this function. Note: all PWM channels must use the same TGC Note: the current implementation must use the same TGC for the timer and PWM channels. More...
IFX_EXTERN void | IfxGtm_Tom_PwmHl_initConfig (IfxGtm_Tom_PwmHl_Config *config)
Initialize the configuration structure to default. More...
IFX_EXTERN float32 | IfxGtm_Tom_PwmHl_getDeadtime (IfxGtm_Tom_PwmHl *driver)
Returns the dead time. More...
IFX_EXTERN float32 | IfxGtm_Tom_PwmHl_getMinPulse (IfxGtm_Tom_PwmHl *driver)
Returns the minimum pulse. More...
IFX_EXTERN Ifx_Pwm_Mode | IfxGtm_Tom_PwmHl_getMode (IfxGtm_Tom_PwmHl *driver)
Returns Pwm mode. More...
IFX_EXTERN boolean | IfxGtm_Tom_PwmHl_setDeadtime (IfxGtm_Tom_PwmHl *driver, float32 deadtime)
Sets the dead time. More...
IFX_EXTERN boolean | IfxGtm_Tom_PwmHl_setMinPulse (IfxGtm_Tom_PwmHl *driver, float32 minPulse)
Sets the minimum pulse. More...
IFX_EXTERN boolean | IfxGtm_Tom_PwmHl_setMode (IfxGtm_Tom_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate() More...
IFX_EXTERN void | IfxGtm_Tom_PwmHl_setOnTime (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Sets the ON time. More...
IFX_EXTERN void | IfxGtm_Tom_PwmHl_setOnTimeAndShift (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets the ON time and Shift. More...
IFX_EXTERN void | IfxGtm_Tom_PwmHl_setPulse (IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
Sets the ON time and offset, all switched are independent. More...
IFX_EXTERN void | IfxGtm_Tom_PwmHl_setupChannels (IfxGtm_Tom_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set up channels. More...
IFX_EXTERN boolean | IfxGtm_Tom_PwmHl_stdIfPwmHlInit (IfxStdIf_PwmHl *stdif, IfxGtm_Tom_PwmHl *driver)
Initialises the statndard interface Pwm. More...

Detailed Description

GTM PWMHL details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Tom_PwmHl.h.

Macro Definition Documentation

◆ IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS

#define IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS (3)

Maximal number of channels handled by the driver. One channel has a top and bottom pwm output Limited to 3 because the PWM channels used must be owned by the same TGC.

Definition at line 146 of file IfxGtm_Tom_PwmHl.h.

Referenced by IfxGtm_Tom_Dtm_PwmHl_init(), and IfxGtm_Tom_PwmHl_init().

Typedef Documentation

◆ IfxGtm_Tom_PwmHl

typedef struct IfxGtm_Tom_PwmHl_s IfxGtm_Tom_PwmHl

Definition at line 152 of file IfxGtm_Tom_PwmHl.h.

◆ IfxGtm_Tom_PwmHl_Update

typedef void(* IfxGtm_Tom_PwmHl_Update) (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)

Definition at line 154 of file IfxGtm_Tom_PwmHl.h.

◆ IfxGtm_Tom_PwmHl_UpdatePulse

typedef void(* IfxGtm_Tom_PwmHl_UpdatePulse) (IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)

Definition at line 158 of file IfxGtm_Tom_PwmHl.h.

◆ IfxGtm_Tom_PwmHl_UpdateShift

typedef void(* IfxGtm_Tom_PwmHl_UpdateShift) (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)

Definition at line 156 of file IfxGtm_Tom_PwmHl.h.


iLLD_TC38A: IfxGtm_Tom_Timer.h File Reference

  • Gtm
  • Tom
  • Timer
Data Structures | Functions
IfxGtm_Tom_Timer.h File Reference
iLLD » GTM

GTM TIMER details. More...

#include "_PinMap/IfxGtm_PinMap.h"
#include "Gtm/Std/IfxGtm_Tom.h"
#include "Gtm/Std/IfxGtm_Cmu.h"
#include "Gtm/Std/IfxGtm_Dtm.h"
#include "StdIf/IfxStdIf_Timer.h"
Include dependency graph for IfxGtm_Tom_Timer.h:

Go to the source code of this file.

Data Structures

struct | IfxGtm_Tom_Timer_Base
Structure for the timer base. More...
struct | IfxGtm_Tom_Timer
TOM Timer interface Handle. More...
struct | IfxGtm_Tom_Timer_Config
Configuration structure for TOM Timer. More...

Functions

IFX_EXTERN Ifx_TimerValue | IfxGtm_Tom_Timer_getOffset (IfxGtm_Tom_Timer *driver)
Returns the initial timer offset in ticks. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Tom_Timer_getPointer (IfxGtm_Tom_Timer *driver)
Returns the pointer to timer channel. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Tom_Timer_getTriggerPointer (IfxGtm_Tom_Timer *driver)
Returns the pointer to trigger channel. More...
IFX_EXTERN boolean | IfxGtm_Tom_Timer_init (IfxGtm_Tom_Timer *driver, const IfxGtm_Tom_Timer_Config *config)
Initialises the timer object. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_initConfig (IfxGtm_Tom_Timer_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default. More...
IFX_EXTERN boolean | IfxGtm_Tom_Timer_acknowledgeTimerIrq (IfxGtm_Tom_Timer *driver)
Returns the timer event. More...
IFX_EXTERN boolean | IfxGtm_Tom_Timer_acknowledgeTriggerIrq (IfxGtm_Tom_Timer *driver)
Returns the trigger event. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_addToChannelMask (IfxGtm_Tom_Timer *driver, IfxGtm_Tom_Ch channel)
Add a channel to the channel mask Channels present in the mask are started, stopped, updated at the same time as the timer: IfxGtm_Tom_Timer_applyUpdate, IfxGtm_Tom_Timer_disableUpdate, IfxGtm_Tom_Timer_stop, IfxGtm_Tom_Timer_run. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_applyUpdate (IfxGtm_Tom_Timer *driver)
Enables the transfer of the shadow registers. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_disableUpdate (IfxGtm_Tom_Timer *driver)
Disables the upadte. More...
IFX_EXTERN float32 | IfxGtm_Tom_Timer_getFrequency (IfxGtm_Tom_Timer *driver)
Returns the frequency. More...
IFX_EXTERN float32 | IfxGtm_Tom_Timer_getInputFrequency (IfxGtm_Tom_Timer *driver)
Returns the Input frequncy. More...
IFX_EXTERN Ifx_TimerValue | IfxGtm_Tom_Timer_getPeriod (IfxGtm_Tom_Timer *driver)
Returns the period of the timer. More...
IFX_EXTERN float32 | IfxGtm_Tom_Timer_getResolution (IfxGtm_Tom_Timer *driver)
Returns the resolution. More...
IFX_EXTERN Ifx_TimerValue | IfxGtm_Tom_Timer_getTrigger (IfxGtm_Tom_Timer *driver)
Returns the trigger point. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_run (IfxGtm_Tom_Timer *driver)
Runs the timer. More...
IFX_EXTERN boolean | IfxGtm_Tom_Timer_setFrequency (IfxGtm_Tom_Timer *driver, float32 frequency)
Sets the frequency. More...
IFX_EXTERN boolean | IfxGtm_Tom_Timer_setPeriod (IfxGtm_Tom_Timer *driver, Ifx_TimerValue period)
Sets the period for the timer. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_setSingleMode (IfxGtm_Tom_Timer *driver, boolean enabled)
Sets the single shot mode of the timer. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_setTrigger (IfxGtm_Tom_Timer *driver, Ifx_TimerValue triggerPoint)
Sets the trigger. More...
IFX_EXTERN boolean | IfxGtm_Tom_Timer_stdIfTimerInit (IfxStdIf_Timer *stdif, IfxGtm_Tom_Timer *driver)
Initializes the standard interface timer. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_stop (IfxGtm_Tom_Timer *driver)
Stops the timer. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_updateInputFrequency (IfxGtm_Tom_Timer *driver)
Updates the input frequency. More...

Detailed Description

GTM TIMER details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Tom_Timer.h.


iLLD_TC38A: IfxGtm_Trig.h File Reference

  • Gtm
  • Trig
Enumerations | Functions
IfxGtm_Trig.h File Reference
iLLD » GTM

GTM TRIG details. More...

#include "Cpu/Std/Ifx_Types.h"
#include "_Impl/IfxGtm_cfg.h"
#include "Gtm/Std/IfxGtm_Tim.h"
Include dependency graph for IfxGtm_Trig.h:

Go to the source code of this file.

Enumerations

enum IfxGtm_Trig_AdcGroup {
IfxGtm_Trig_AdcGroup_0,
IfxGtm_Trig_AdcGroup_1,
IfxGtm_Trig_AdcGroup_2,
IfxGtm_Trig_AdcGroup_3,
IfxGtm_Trig_AdcGroup_4,
IfxGtm_Trig_AdcGroup_5,
IfxGtm_Trig_AdcGroup_6,
IfxGtm_Trig_AdcGroup_7,
IfxGtm_Trig_AdcGroup_8,
IfxGtm_Trig_AdcGroup_9,
IfxGtm_Trig_AdcGroup_10,
IfxGtm_Trig_AdcGroup_11
}
Enum for ADC group. More...
enum IfxGtm_Trig_AdcTrig {
IfxGtm_Trig_AdcTrig_0,
IfxGtm_Trig_AdcTrig_1,
IfxGtm_Trig_AdcTrig_2,
IfxGtm_Trig_AdcTrig_3,
IfxGtm_Trig_AdcTrig_4,
IfxGtm_Trig_AdcTrig_count
}
Enum for ADC trigger. More...
enum IfxGtm_Trig_AdcTrigChannel {
IfxGtm_Trig_AdcTrigChannel_3,
IfxGtm_Trig_AdcTrigChannel_4,
IfxGtm_Trig_AdcTrigChannel_5,
IfxGtm_Trig_AdcTrigChannel_6,
IfxGtm_Trig_AdcTrigChannel_7,
IfxGtm_Trig_AdcTrigChannel_11,
IfxGtm_Trig_AdcTrigChannel_12,
IfxGtm_Trig_AdcTrigChannel_13,
IfxGtm_Trig_AdcTrigChannel_14,
IfxGtm_Trig_AdcTrigChannel_15,
IfxGtm_Trig_AdcTrigChannel_count
}
Enum for ADC trigger channel. More...
enum IfxGtm_Trig_AdcTrigSource {
IfxGtm_Trig_AdcTrigSource_atom0,
IfxGtm_Trig_AdcTrigSource_atom1,
IfxGtm_Trig_AdcTrigSource_atom2,
IfxGtm_Trig_AdcTrigSource_atom3,
IfxGtm_Trig_AdcTrigSource_atom4,
IfxGtm_Trig_AdcTrigSource_atom5,
IfxGtm_Trig_AdcTrigSource_atom6,
IfxGtm_Trig_AdcTrigSource_atom7,
IfxGtm_Trig_AdcTrigSource_atom8,
IfxGtm_Trig_AdcTrigSource_atom9,
IfxGtm_Trig_AdcTrigSource_atom10,
IfxGtm_Trig_AdcTrigSource_atom11,
IfxGtm_Trig_AdcTrigSource_tom0,
IfxGtm_Trig_AdcTrigSource_tom1,
IfxGtm_Trig_AdcTrigSource_tom2,
IfxGtm_Trig_AdcTrigSource_tom3,
IfxGtm_Trig_AdcTrigSource_tom4,
IfxGtm_Trig_AdcTrigSource_tom5,
IfxGtm_Trig_AdcTrigSource_count
}
Enum for ADC trigger source. More...
enum IfxGtm_Trig_CanDevice {
IfxGtm_Trig_CanDevice_0,
IfxGtm_Trig_CanDevice_1,
IfxGtm_Trig_CanDevice_2,
IfxGtm_Trig_CanDevice_count
}
CAN device enum. More...
enum IfxGtm_Trig_CanTrig {
IfxGtm_Trig_CanTrig_0,
IfxGtm_Trig_CanTrig_1,
IfxGtm_Trig_CanTrig_2,
IfxGtm_Trig_CanTrig_3,
IfxGtm_Trig_CanTrig_count
}
Enum for CAN trigger. More...
enum IfxGtm_Trig_CanTrigChannel {
IfxGtm_Trig_CanTrigChannel_0,
IfxGtm_Trig_CanTrigChannel_1,
IfxGtm_Trig_CanTrigChannel_2,
IfxGtm_Trig_CanTrigChannel_3,
IfxGtm_Trig_CanTrigChannel_4,
IfxGtm_Trig_CanTrigChannel_5,
IfxGtm_Trig_CanTrigChannel_6,
IfxGtm_Trig_CanTrigChannel_7,
IfxGtm_Trig_CanTrigChannel_11,
IfxGtm_Trig_CanTrigChannel_12,
IfxGtm_Trig_CanTrigChannel_13,
IfxGtm_Trig_CanTrigChannel_14,
IfxGtm_Trig_CanTrigChannel_count
}
Enum for CAN trigger channel. More...
enum IfxGtm_Trig_CanTrigSource {
IfxGtm_Trig_CanTrigSource_tom0,
IfxGtm_Trig_CanTrigSource_tom1,
IfxGtm_Trig_CanTrigSource_atom0,
IfxGtm_Trig_CanTrigSource_atom1,
IfxGtm_Trig_CanTrigSource_atom2,
IfxGtm_Trig_CanTrigSource_count
}
Enum for CAN trigger source. More...
enum IfxGtm_Trig_EdsadcTrig {
IfxGtm_Trig_EdsadcTrig_0,
IfxGtm_Trig_EdsadcTrig_1,
IfxGtm_Trig_EdsadcTrig_2,
IfxGtm_Trig_EdsadcTrig_3
}
Enum for EDSADC trigger. More...
enum IfxGtm_Trig_EdsadcTrigSource {
IfxGtm_Trig_EdsadcTrigSource_tom0_6,
IfxGtm_Trig_EdsadcTrigSource_tom0_7,
IfxGtm_Trig_EdsadcTrigSource_tom0_13,
IfxGtm_Trig_EdsadcTrigSource_tom0_14,
IfxGtm_Trig_EdsadcTrigSource_atom0_4,
IfxGtm_Trig_EdsadcTrigSource_atom0_5,
IfxGtm_Trig_EdsadcTrigSource_atom0_6,
IfxGtm_Trig_EdsadcTrigSource_atom0_7,
IfxGtm_Trig_EdsadcTrigSource_atom1_4,
IfxGtm_Trig_EdsadcTrigSource_atom1_5,
IfxGtm_Trig_EdsadcTrigSource_atom1_6,
IfxGtm_Trig_EdsadcTrigSource_atom1_7,
IfxGtm_Trig_EdsadcTrigSource_atom4_6,
IfxGtm_Trig_EdsadcTrigSource_atom4_7,
IfxGtm_Trig_EdsadcTrigSource_atom6_6,
IfxGtm_Trig_EdsadcTrigSource_reserved0,
IfxGtm_Trig_EdsadcTrigSource_tom2_6,
IfxGtm_Trig_EdsadcTrigSource_tom2_7,
IfxGtm_Trig_EdsadcTrigSource_tom2_13,
IfxGtm_Trig_EdsadcTrigSource_tom2_14,
IfxGtm_Trig_EdsadcTrigSource_atom2_4,
IfxGtm_Trig_EdsadcTrigSource_atom2_5,
IfxGtm_Trig_EdsadcTrigSource_atom2_6,
IfxGtm_Trig_EdsadcTrigSource_atom2_7,
IfxGtm_Trig_EdsadcTrigSource_atom3_4,
IfxGtm_Trig_EdsadcTrigSource_atom3_5,
IfxGtm_Trig_EdsadcTrigSource_atom3_6,
IfxGtm_Trig_EdsadcTrigSource_atom3_7,
IfxGtm_Trig_EdsadcTrigSource_atom5_6,
IfxGtm_Trig_EdsadcTrigSource_atom5_7,
IfxGtm_Trig_EdsadcTrigSource_atom6_7,
IfxGtm_Trig_EdsadcTrigSource_reserved1,
IfxGtm_Trig_EdsadcTrigSource_tom1_7,
IfxGtm_Trig_EdsadcTrigSource_tom1_14,
IfxGtm_Trig_EdsadcTrigSource_tom3_7,
IfxGtm_Trig_EdsadcTrigSource_tom3_14,
IfxGtm_Trig_EdsadcTrigSource_tom4_7,
IfxGtm_Trig_EdsadcTrigSource_tom4_14,
IfxGtm_Trig_EdsadcTrigSource_tom5_7,
IfxGtm_Trig_EdsadcTrigSource_tom5_14,
IfxGtm_Trig_EdsadcTrigSource_atom7_6,
IfxGtm_Trig_EdsadcTrigSource_atom7_7,
IfxGtm_Trig_EdsadcTrigSource_atom8_6,
IfxGtm_Trig_EdsadcTrigSource_atom8_7,
IfxGtm_Trig_EdsadcTrigSource_atom9_6,
IfxGtm_Trig_EdsadcTrigSource_atom9_7,
IfxGtm_Trig_EdsadcTrigSource_atom11_6,
IfxGtm_Trig_EdsadcTrigSource_reserved2,
IfxGtm_Trig_EdsadcTrigSource_tom1_6,
IfxGtm_Trig_EdsadcTrigSource_atom10_6,
IfxGtm_Trig_EdsadcTrigSource_atom10_7,
IfxGtm_Trig_EdsadcTrigSource_atom11_7
}
Enum for EDSADC trigger source. More...
enum IfxGtm_Trig_MscTrigChannel {
IfxGtm_Trig_MscTrigChannel_0,
IfxGtm_Trig_MscTrigChannel_1,
IfxGtm_Trig_MscTrigChannel_2,
IfxGtm_Trig_MscTrigChannel_3,
IfxGtm_Trig_MscTrigChannel_4,
IfxGtm_Trig_MscTrigChannel_5,
IfxGtm_Trig_MscTrigChannel_6,
IfxGtm_Trig_MscTrigChannel_7,
IfxGtm_Trig_MscTrigChannel_8,
IfxGtm_Trig_MscTrigChannel_9,
IfxGtm_Trig_MscTrigChannel_10,
IfxGtm_Trig_MscTrigChannel_11,
IfxGtm_Trig_MscTrigChannel_12,
IfxGtm_Trig_MscTrigChannel_13,
IfxGtm_Trig_MscTrigChannel_14,
IfxGtm_Trig_MscTrigChannel_15,
IfxGtm_Trig_MscTrigChannel_count
}
Enum for MSC trigger channel. More...
enum IfxGtm_Trig_MscTrigInput {
IfxGtm_Trig_MscTrigInput_low,
IfxGtm_Trig_MscTrigInput_lowExtended,
IfxGtm_Trig_MscTrigInput_high
}
Enum for MSC trigger Input Type. More...
enum IfxGtm_Trig_MscTrigOutput {
IfxGtm_Trig_MscTrigOutput_0,
IfxGtm_Trig_MscTrigOutput_1,
IfxGtm_Trig_MscTrigOutput_2,
IfxGtm_Trig_MscTrigOutput_3
}
Enum for MSC trigger output select. More...
enum IfxGtm_Trig_MscTrigSet {
IfxGtm_Trig_MscTrigSet_1,
IfxGtm_Trig_MscTrigSet_2,
IfxGtm_Trig_MscTrigSet_3,
IfxGtm_Trig_MscTrigSet_4,
IfxGtm_Trig_MscTrigSet_5,
IfxGtm_Trig_MscTrigSet_6,
IfxGtm_Trig_MscTrigSet_7,
IfxGtm_Trig_MscTrigSet_8,
IfxGtm_Trig_MscTrigSet_9,
IfxGtm_Trig_MscTrigSet_count
}
Enum for MSC Sets. More...
enum IfxGtm_Trig_MscTrigSignal {
IfxGtm_Trig_MscTrigSignal_0,
IfxGtm_Trig_MscTrigSignal_1,
IfxGtm_Trig_MscTrigSignal_2,
IfxGtm_Trig_MscTrigSignal_3,
IfxGtm_Trig_MscTrigSignal_4,
IfxGtm_Trig_MscTrigSignal_5,
IfxGtm_Trig_MscTrigSignal_6,
IfxGtm_Trig_MscTrigSignal_7,
IfxGtm_Trig_MscTrigSignal_8,
IfxGtm_Trig_MscTrigSignal_9,
IfxGtm_Trig_MscTrigSignal_10,
IfxGtm_Trig_MscTrigSignal_11,
IfxGtm_Trig_MscTrigSignal_12,
IfxGtm_Trig_MscTrigSignal_13,
IfxGtm_Trig_MscTrigSignal_14,
IfxGtm_Trig_MscTrigSignal_15
}
Enum for MSC Signal. More...
enum IfxGtm_Trig_MscTrigSource {
IfxGtm_Trig_MscTrigSource_tom0,
IfxGtm_Trig_MscTrigSource_tom1,
IfxGtm_Trig_MscTrigSource_tom2,
IfxGtm_Trig_MscTrigSource_tom3,
IfxGtm_Trig_MscTrigSource_tom4,
IfxGtm_Trig_MscTrigSource_tom5,
IfxGtm_Trig_MscTrigSource_atom0,
IfxGtm_Trig_MscTrigSource_atom1,
IfxGtm_Trig_MscTrigSource_atom2,
IfxGtm_Trig_MscTrigSource_atom3,
IfxGtm_Trig_MscTrigSource_atom4,
IfxGtm_Trig_MscTrigSource_atom5,
IfxGtm_Trig_MscTrigSource_atom6,
IfxGtm_Trig_MscTrigSource_atom7,
IfxGtm_Trig_MscTrigSource_atom8,
IfxGtm_Trig_MscTrigSource_atom9,
IfxGtm_Trig_MscTrigSource_atom10,
IfxGtm_Trig_MscTrigSource_atom11,
IfxGtm_Trig_MscTrigSource_count
}
Enum for MSC trigger source. More...
enum IfxGtm_Trig_Psi5TrigSource {
IfxGtm_Trig_Psi5TrigSource_no_Trigger,
IfxGtm_Trig_Psi5TrigSource_tom2_6,
IfxGtm_Trig_Psi5TrigSource_tom2_7,
IfxGtm_Trig_Psi5TrigSource_tom2_13,
IfxGtm_Trig_Psi5TrigSource_tom2_14,
IfxGtm_Trig_Psi5TrigSource_atom2_4,
IfxGtm_Trig_Psi5TrigSource_atom2_5,
IfxGtm_Trig_Psi5TrigSource_atom2_6,
IfxGtm_Trig_Psi5TrigSource_atom2_7,
IfxGtm_Trig_Psi5TrigSource_tom0_6,
IfxGtm_Trig_Psi5TrigSource_tom0_7,
IfxGtm_Trig_Psi5TrigSource_tom0_13,
IfxGtm_Trig_Psi5TrigSource_tom0_14
}
Enum for PSI5 trigger source. More...
enum IfxGtm_Trig_Psi5sTrigSource {
IfxGtm_Trig_Psi5sTrigSource_no_Trigger,
IfxGtm_Trig_Psi5sTrigSource_tomX_6,
IfxGtm_Trig_Psi5sTrigSource_tomX_7,
IfxGtm_Trig_Psi5sTrigSource_tomX_13,
IfxGtm_Trig_Psi5sTrigSource_tomX_14,
IfxGtm_Trig_Psi5sTrigSource_atomX_4,
IfxGtm_Trig_Psi5sTrigSource_atomX_5,
IfxGtm_Trig_Psi5sTrigSource_atomX_6,
IfxGtm_Trig_Psi5sTrigSource_atomX_7
}
Enum for DSADC trigger source. More...
enum IfxGtm_Trig_SentGroup {
IfxGtm_Trig_SentGroup_0,
IfxGtm_Trig_SentGroup_1,
IfxGtm_Trig_SentGroup_2,
IfxGtm_Trig_SentGroup_3,
IfxGtm_Trig_SentGroup_4,
IfxGtm_Trig_SentGroup_5,
IfxGtm_Trig_SentGroup_6,
IfxGtm_Trig_SentGroup_7,
IfxGtm_Trig_SentGroup_8,
IfxGtm_Trig_SentGroup_9,
IfxGtm_Trig_SentGroup_10,
IfxGtm_Trig_SentGroup_11,
IfxGtm_Trig_SentGroup_12,
IfxGtm_Trig_SentGroup_13,
IfxGtm_Trig_SentGroup_14,
IfxGtm_Trig_SentGroup_15
}
Enum for SENT group. More...
enum IfxGtm_Trig_SentTrig {
IfxGtm_Trig_SentTrig_0,
IfxGtm_Trig_SentTrig_1,
IfxGtm_Trig_SentTrig_2,
IfxGtm_Trig_SentTrig_3
}
Enum for SENT trigger. More...
enum IfxGtm_Trig_SentTrigChannel {
IfxGtm_Trig_SentTrigChannel_3,
IfxGtm_Trig_SentTrigChannel_4,
IfxGtm_Trig_SentTrigChannel_5,
IfxGtm_Trig_SentTrigChannel_6,
IfxGtm_Trig_SentTrigChannel_7,
IfxGtm_Trig_SentTrigChannel_11,
IfxGtm_Trig_SentTrigChannel_12,
IfxGtm_Trig_SentTrigChannel_13,
IfxGtm_Trig_SentTrigChannel_14,
IfxGtm_Trig_SentTrigChannel_15,
IfxGtm_Trig_SentTrigChannel_count
}
Enum for SENT trigger channel. More...
enum IfxGtm_Trig_SentTrigSource {
IfxGtm_Trig_SentTrigSource_atom0,
IfxGtm_Trig_SentTrigSource_atom1,
IfxGtm_Trig_SentTrigSource_atom2,
IfxGtm_Trig_SentTrigSource_atom3,
IfxGtm_Trig_SentTrigSource_atom4,
IfxGtm_Trig_SentTrigSource_atom5,
IfxGtm_Trig_SentTrigSource_atom6,
IfxGtm_Trig_SentTrigSource_atom7,
IfxGtm_Trig_SentTrigSource_atom8,
IfxGtm_Trig_SentTrigSource_atom9,
IfxGtm_Trig_SentTrigSource_atom10,
IfxGtm_Trig_SentTrigSource_atom11,
IfxGtm_Trig_SentTrigSource_tom0,
IfxGtm_Trig_SentTrigSource_tom1,
IfxGtm_Trig_SentTrigSource_tom2,
IfxGtm_Trig_SentTrigSource_tom3,
IfxGtm_Trig_SentTrigSource_tom4,
IfxGtm_Trig_SentTrigSource_tom5,
IfxGtm_Trig_SentTrigSource_count
}
Enum for SENT trigger source. More...

Functions

IFX_EXTERN boolean | IfxGtm_Trig_fromEdsadc (Ifx_GTM *gtm, uint32 edsadcChannel, IfxGtm_Tim tim, IfxGtm_Tim_Ch timChannel)
IFX_EXTERN boolean | IfxGtm_Trig_fromMsc (Ifx_GTM *gtm, uint32 msc, IfxGtm_Trig_MscTrigInput input, IfxGtm_Trig_MscTrigOutput output, IfxGtm_Trig_MscTrigSignal signal)
IFX_EXTERN boolean | IfxGtm_Trig_toCan (Ifx_GTM *gtm, IfxGtm_Trig_CanTrig canTrig, IfxGtm_Trig_CanDevice canDevice, IfxGtm_Trig_CanTrigSource source, IfxGtm_Trig_CanTrigChannel channel)
IFX_EXTERN boolean | IfxGtm_Trig_toEVadc (Ifx_GTM *gtm, IfxGtm_Trig_AdcGroup adcGroup, IfxGtm_Trig_AdcTrig adcTrig, IfxGtm_Trig_AdcTrigSource source, IfxGtm_Trig_AdcTrigChannel channel)
IFX_EXTERN void | IfxGtm_Trig_toEVadcClear (Ifx_GTM *gtm, IfxGtm_Trig_AdcGroup adcGroup, IfxGtm_Trig_AdcTrig adcTrig)
IFX_EXTERN void | IfxGtm_Trig_toEdsadc (Ifx_GTM *gtm, uint32 edsadcChannel, IfxGtm_Trig_EdsadcTrig edsadcTrig, IfxGtm_Trig_EdsadcTrigSource sel)
IFX_EXTERN boolean | IfxGtm_Trig_toMsc (Ifx_GTM *gtm, IfxGtm_Trig_MscTrigSignal signal, IfxGtm_Trig_MscTrigSet mscSet, IfxGtm_Trig_MscTrigSource source, IfxGtm_Trig_MscTrigChannel channel)
IFX_EXTERN void | IfxGtm_Trig_toPsi5 (Ifx_GTM *gtm, uint32 psi5Channel, IfxGtm_Trig_Psi5TrigSource sel)
IFX_EXTERN void | IfxGtm_Trig_toPsi5s (Ifx_GTM *gtm, uint32 psi5sChannel, IfxGtm_Trig_Psi5sTrigSource sel)
IFX_EXTERN boolean | IfxGtm_Trig_toSent (Ifx_GTM *gtm, IfxGtm_Trig_SentGroup sentGroup, IfxGtm_Trig_SentTrig sentTrig, IfxGtm_Trig_SentTrigSource source, IfxGtm_Trig_SentTrigChannel channel)

Detailed Description

GTM TRIG details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Trig.h.


iLLD_TC38A: HSSL

Modules | Files
HSSL
iLLD
Collaboration diagram for HSSL:

Modules

Implementation
Standard Driver
How to use the HSSL Interface driver?
HSSL

Files

file | IfxHssl_cfg.h
HSSL on-chip implementation data.
file | IfxHssl_Hssl.h
HSSL HSSL details.
file | IfxHssl.h
HSSL basic functionality.

Detailed Description


iLLD_TC38A: Implementation

Modules
Implementation
iLLD » HSSL
Collaboration diagram for Implementation:

Modules

Enumerations

Detailed Description


iLLD_TC38A: Enumerations

Enumerations | Variables
Enumerations
iLLD » HSSL » Implementation
Collaboration diagram for Enumerations:

Enumerations

enum IfxHssl_hsctIndex {
IfxHssl_hsctIndex_none = -1,
IfxHssl_hsctIndex_0 = 0
}
List of the available Hsct resources. More...
enum IfxHssl_hsslIndex {
IfxHssl_hsslIndex_none = -1,
IfxHssl_hsslIndex_0 = 0
}
List of the available Hssl resources. More...

Variables

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsctIndexMap [IFXHSSL_NUM_MODULES]
IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsslIndexMap [IFXHSSL_NUM_MODULES]

Detailed Description

Enumeration Type Documentation

◆ IfxHssl_hsctIndex

enum IfxHssl_hsctIndex

List of the available Hsct resources.

Enumerator
IfxHssl_hsctIndex_none | Not Selected.
IfxHssl_hsctIndex_0 | HSCT index 0.

Definition at line 80 of file IfxHssl_cfg.h.

◆ IfxHssl_hsslIndex

enum IfxHssl_hsslIndex

List of the available Hssl resources.

Enumerator
IfxHssl_hsslIndex_none | Not Selected.
IfxHssl_hsslIndex_0 | HSSL index 0.

Definition at line 88 of file IfxHssl_cfg.h.

Variable Documentation

◆ IfxHssl_cfg_hsctIndexMap

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsctIndexMap[IFXHSSL_NUM_MODULES]

Definition at line 103 of file IfxHssl_cfg.h.

◆ IfxHssl_cfg_hsslIndexMap

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsslIndexMap[IFXHSSL_NUM_MODULES]

Definition at line 105 of file IfxHssl_cfg.h.


iLLD_TC38A: Standard Driver

Modules
Standard Driver
iLLD » HSSL
Collaboration diagram for Standard Driver:

Modules

Enumerations
Hsct Functions
Data Structures
Hssl Functions

Detailed Description


iLLD_TC38A: Enumerations

Enumerations
Enumerations
iLLD » HSSL » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxHssl_ChannelId {
IfxHssl_ChannelId_0,
IfxHssl_ChannelId_1,
IfxHssl_ChannelId_2,
IfxHssl_ChannelId_3
}
channel selection More...
enum IfxHssl_Command {
IfxHssl_Command_noAction = 0,
IfxHssl_Command_readFrame = 1,
IfxHssl_Command_writeFrame = 2,
IfxHssl_Command_triggerFrame = 3
}
communication command selection Definition in Ifx_HSSL.I.ICON.B.RWT More...
enum IfxHssl_ControlCommand {
IfxHssl_ControlCommand_ping = 0,
IfxHssl_ControlCommand_highSpeedClockStart = 2,
IfxHssl_ControlCommand_highSpeedClockStop = 4,
IfxHssl_ControlCommand_lowSpeedTransmission = 8,
IfxHssl_ControlCommand_highSpeedTransmission = 16,
IfxHssl_ControlCommand_lowSpeedReception = 32,
IfxHssl_ControlCommand_mediumSpeedReception = 64,
IfxHssl_ControlCommand_highSpeedReception = 128,
IfxHssl_ControlCommand_enableReception = 49,
IfxHssl_ControlCommand_disableReception = 50,
IfxHssl_ControlCommand_turnOnClockTestMode = 52,
IfxHssl_ControlCommand_turnOffClockTestMode = 56,
IfxHssl_ControlCommand_turnOnPayloadLoopback = 255
}
predefined control command payload values More...
enum IfxHssl_DataLength {
IfxHssl_DataLength_8bit = 0,
IfxHssl_DataLength_16bit = 1,
IfxHssl_DataLength_32bit = 2
}
Defines the length of the data in bits of the write and read command. Definition in Ifx_HSSL.I.ICON.B.DATLEN. More...
enum IfxHssl_Hsct_InterruptSource {
IfxHssl_Hsct_InterruptSource_headerError = IFX_HSCT_IRQ_HER_OFF,
IfxHssl_Hsct_InterruptSource_payloadError = IFX_HSCT_IRQ_PYER_OFF,
IfxHssl_Hsct_InterruptSource_commandError = IFX_HSCT_IRQ_CER_OFF,
IfxHssl_Hsct_InterruptSource_interfaceControlFrameSend = IFX_HSCT_IRQ_IFCFS_OFF,
IfxHssl_Hsct_InterruptSource_speedModeSwitchError = IFX_HSCT_IRQ_SMER_OFF,
IfxHssl_Hsct_InterruptSource_unsolicitedMessageSendFinished = IFX_HSCT_IRQ_USMSF_OFF,
IfxHssl_Hsct_InterruptSource_pllLockLosterror = IFX_HSCT_IRQ_PLER_OFF,
IfxHssl_Hsct_InterruptSource_UnsolicitedMessageReceived = IFX_HSCT_IRQ_USM_OFF,
IfxHssl_Hsct_InterruptSource_pingAnswerReceived = IFX_HSCT_IRQ_PAR_OFF,
IfxHssl_Hsct_InterruptSource_txTransferError = IFX_HSCT_IRQ_TXTE_OFF,
IfxHssl_Hsct_InterruptSource_synchronizationFifoOverflow = IFX_HSCT_IRQ_SFO_OFF,
IfxHssl_Hsct_InterruptSource_synchronizationFifoUnderflow = IFX_HSCT_IRQ_SFU_OFF
}
HSCT interrupt source Definition in Ifx_HSCT.IRQ. More...
enum IfxHssl_Hsct_SleepMode {
IfxHssl_Hsct_SleepMode_enable = 0,
IfxHssl_Hsct_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_HSCT.CLC.B.EDIS. More...
enum IfxHssl_Hssl_SleepMode {
IfxHssl_Hssl_SleepMode_enable = 0,
IfxHssl_Hssl_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_HSSL.CLC.B.EDIS. More...
enum IfxHssl_InterfaceMode {
IfxHssl_InterfaceMode_master = 0,
IfxHssl_InterfaceMode_slave = 1
}
interface mode (master IF /slave IF) Definition in Ifx_HSCT.INIT.B.IFM More...
enum IfxHssl_MasterModeRxSpeed {
IfxHssl_MasterModeRxSpeed_lowSpeed = 0,
IfxHssl_MasterModeRxSpeed_mediumSpeed = 1,
IfxHssl_MasterModeRxSpeed_highSpeed = 2
}
master mode receive speed Definition in Ifx_HSCT.IFCTRL.B.MRXSPEED More...
enum IfxHssl_MasterModeTxSpeed {
IfxHssl_MasterModeTxSpeed_lowSpeed = 0,
IfxHssl_MasterModeTxSpeed_highSpeed = 2
}
master mode transmit speed Definition in Ifx_HSCT.IFCTRL.B.MTXSPEED More...
enum IfxHssl_PllReferenceClock {
IfxHssl_PllReferenceClock_hsctSystemClockInput = 0,
IfxHssl_PllReferenceClock_oscillatorInput = 1
}
PLL reference clock Definition in Ifx_HSCT.CONFIGPHY.B.OSCCLKEN. More...
enum IfxHssl_RefClockFrequency {
IfxHssl_RefClockFrequency_10Mhz = 0,
IfxHssl_RefClockFrequency_20Mhz = 1,
IfxHssl_RefClockFrequency_40Mhz = 2
}
SysClk / Reference Clock Frequency rate Definition in Ifx_HSCT.INIT.B.SRCF. More...
enum IfxHssl_StreamingMode {
IfxHssl_StreamingMode_continuous = 0,
IfxHssl_StreamingMode_single = 1
}
streaming mode ( single / continuous ) Definition in Ifx_HSSL.CFG.B.SMT/SMR More...
enum IfxHssl_SuspendMode {
IfxHssl_SuspendMode_none = 0,
IfxHssl_SuspendMode_hard = 1,
IfxHssl_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxHssl_SysClockDivider {
IfxHssl_SysClockDivider_1 = 0,
IfxHssl_SysClockDivider_2 = 1,
IfxHssl_SysClockDivider_4 = 2
}
SysClk divider Definition in Ifx_HSCT.INIT.B.SSCF. More...

Detailed Description

Enumeration Type Documentation

◆ IfxHssl_ChannelId

enum IfxHssl_ChannelId

channel selection

Enumerator
IfxHssl_ChannelId_0 | Channel 0.
IfxHssl_ChannelId_1 | Channel 1.
IfxHssl_ChannelId_2 | Channel 2.
IfxHssl_ChannelId_3 | Channel 3.

Definition at line 74 of file IfxHssl.h.

◆ IfxHssl_Command

enum IfxHssl_Command

communication command selection Definition in Ifx_HSSL.I.ICON.B.RWT

Enumerator
IfxHssl_Command_noAction | command no action
IfxHssl_Command_readFrame | command read frame
IfxHssl_Command_writeFrame | command write frame
IfxHssl_Command_triggerFrame | command trigger frame

Definition at line 85 of file IfxHssl.h.

◆ IfxHssl_ControlCommand

enum IfxHssl_ControlCommand

predefined control command payload values

Enumerator
IfxHssl_ControlCommand_ping | ping (send by master. Slave sends back a fixed 32-bit payload result.)
IfxHssl_ControlCommand_highSpeedClockStart | slave interface clock multiplier start (in preparation for high speed mode)
IfxHssl_ControlCommand_highSpeedClockStop | slave interface clock multiplier stop (after fallback from high speed mode)
IfxHssl_ControlCommand_lowSpeedTransmission | select low speed mode for transfers from the Master to the Slave
IfxHssl_ControlCommand_highSpeedTransmission | select high speed mode for transfers from the Master to the Slave
IfxHssl_ControlCommand_lowSpeedReception | select low speed mode for transfers from the Slave to the Master
IfxHssl_ControlCommand_mediumSpeedReception | select medium speed mode for transfers from the Slave to the master
IfxHssl_ControlCommand_highSpeedReception | select high speed mode for transfers from the Slave to the master
IfxHssl_ControlCommand_enableReception | enable Slave interface transmitter
IfxHssl_ControlCommand_disableReception | disable Slave interface transmitter
IfxHssl_ControlCommand_turnOnClockTestMode | turn on clock test mode
IfxHssl_ControlCommand_turnOffClockTestMode | turn off clock test mode
IfxHssl_ControlCommand_turnOnPayloadLoopback | turn on payload loopback

Definition at line 95 of file IfxHssl.h.

◆ IfxHssl_DataLength

enum IfxHssl_DataLength

Defines the length of the data in bits of the write and read command. Definition in Ifx_HSSL.I.ICON.B.DATLEN.

Enumerator
IfxHssl_DataLength_8bit | 8 bit
IfxHssl_DataLength_16bit | 16 bit
IfxHssl_DataLength_32bit | 32 bit

Definition at line 115 of file IfxHssl.h.

◆ IfxHssl_Hsct_InterruptSource

enum IfxHssl_Hsct_InterruptSource

HSCT interrupt source Definition in Ifx_HSCT.IRQ.

Enumerator
IfxHssl_Hsct_InterruptSource_headerError | Header error detected.
IfxHssl_Hsct_InterruptSource_payloadError | Payload error detected.
IfxHssl_Hsct_InterruptSource_commandError | HSCT Command error.
IfxHssl_Hsct_InterruptSource_interfaceControlFrameSend | Interface control frame send.
IfxHssl_Hsct_InterruptSource_speedModeSwitchError | Speed mode switch error.
IfxHssl_Hsct_InterruptSource_unsolicitedMessageSendFinished | Unsolicited message frame send finished.
IfxHssl_Hsct_InterruptSource_pllLockLosterror | Pll lock lost error.
IfxHssl_Hsct_InterruptSource_UnsolicitedMessageReceived | Unsolicited message received.
IfxHssl_Hsct_InterruptSource_pingAnswerReceived | PING Answer Received.
IfxHssl_Hsct_InterruptSource_txTransferError | TX transfer error occurred on a disabled TX channel.
IfxHssl_Hsct_InterruptSource_synchronizationFifoOverflow | Synchronization FIFO overflow (in RX direction)
IfxHssl_Hsct_InterruptSource_synchronizationFifoUnderflow | Synchronization FIFO underflow (in TX direction)

Definition at line 125 of file IfxHssl.h.

◆ IfxHssl_Hsct_SleepMode

enum IfxHssl_Hsct_SleepMode

Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_HSCT.CLC.B.EDIS.

Enumerator
IfxHssl_Hsct_SleepMode_enable | enables sleep mode
IfxHssl_Hsct_SleepMode_disable | disables sleep mode

Definition at line 147 of file IfxHssl.h.

◆ IfxHssl_Hssl_SleepMode

enum IfxHssl_Hssl_SleepMode

Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_HSSL.CLC.B.EDIS.

Enumerator
IfxHssl_Hssl_SleepMode_enable | enables sleep mode
IfxHssl_Hssl_SleepMode_disable | disables sleep mode

Definition at line 156 of file IfxHssl.h.

◆ IfxHssl_InterfaceMode

enum IfxHssl_InterfaceMode

interface mode (master IF /slave IF) Definition in Ifx_HSCT.INIT.B.IFM

Enumerator
IfxHssl_InterfaceMode_master | master IF mode
IfxHssl_InterfaceMode_slave | slave IF mode

Definition at line 165 of file IfxHssl.h.

◆ IfxHssl_MasterModeRxSpeed

enum IfxHssl_MasterModeRxSpeed

master mode receive speed Definition in Ifx_HSCT.IFCTRL.B.MRXSPEED

Enumerator
IfxHssl_MasterModeRxSpeed_lowSpeed | low speed
IfxHssl_MasterModeRxSpeed_mediumSpeed | medium speed
IfxHssl_MasterModeRxSpeed_highSpeed | high speed

Definition at line 174 of file IfxHssl.h.

◆ IfxHssl_MasterModeTxSpeed

enum IfxHssl_MasterModeTxSpeed

master mode transmit speed Definition in Ifx_HSCT.IFCTRL.B.MTXSPEED

Enumerator
IfxHssl_MasterModeTxSpeed_lowSpeed | low speed
IfxHssl_MasterModeTxSpeed_highSpeed | high speed

Definition at line 184 of file IfxHssl.h.

◆ IfxHssl_PllReferenceClock

enum IfxHssl_PllReferenceClock

PLL reference clock Definition in Ifx_HSCT.CONFIGPHY.B.OSCCLKEN.

Enumerator
IfxHssl_PllReferenceClock_hsctSystemClockInput | hsct system clock input (HSCT SysClk_i)
IfxHssl_PllReferenceClock_oscillatorInput | oscillator input

Definition at line 193 of file IfxHssl.h.

◆ IfxHssl_RefClockFrequency

enum IfxHssl_RefClockFrequency

SysClk / Reference Clock Frequency rate Definition in Ifx_HSCT.INIT.B.SRCF.

Enumerator
IfxHssl_RefClockFrequency_10Mhz | SysClk/ RefClk is 10 MHz.
IfxHssl_RefClockFrequency_20Mhz | SysClk/ RefClk is 20 MHz.
IfxHssl_RefClockFrequency_40Mhz | SysClk/ RefClk is 40 MHz.

Definition at line 202 of file IfxHssl.h.

◆ IfxHssl_StreamingMode

enum IfxHssl_StreamingMode

streaming mode ( single / continuous ) Definition in Ifx_HSSL.CFG.B.SMT/SMR

Enumerator
IfxHssl_StreamingMode_continuous | streaming mode continuous (with two memory blocks)
IfxHssl_StreamingMode_single | streaming mode single (with one memory block)

Definition at line 212 of file IfxHssl.h.

◆ IfxHssl_SuspendMode

enum IfxHssl_SuspendMode

OCDS Suspend Control (OCDS.SUS)

Enumerator
IfxHssl_SuspendMode_none | No suspend.
IfxHssl_SuspendMode_hard | Hard Suspend.
IfxHssl_SuspendMode_soft | Soft Suspend.

Definition at line 220 of file IfxHssl.h.

◆ IfxHssl_SysClockDivider

enum IfxHssl_SysClockDivider

SysClk divider Definition in Ifx_HSCT.INIT.B.SSCF.

Enumerator
IfxHssl_SysClockDivider_1 | SysClk Divider 1/1.
IfxHssl_SysClockDivider_2 | SysClk Divider 1/2.
IfxHssl_SysClockDivider_4 | SysClk Divider 1/4.

Definition at line 230 of file IfxHssl.h.


iLLD_TC38A: Hsct Functions

Functions
Hsct Functions
iLLD » HSSL » Standard Driver
Collaboration diagram for Hsct Functions:

Functions

IFX_INLINE void | IfxHssl_clearHsctInterruptFlag (Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source)
Clears the HSCT interrupt flag. More...
IFX_INLINE void | IfxHssl_disableHsctInterruptFlag (Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source)
Enables HSCT interrupt flag. More...
IFX_INLINE void | IfxHssl_enableHsctInterrupt (Ifx_HSCT *hsct, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSCT interrupt. More...
IFX_INLINE void | IfxHssl_enableHsctInterruptFlag (Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source)
Enables HSCT interrupt flag. More...
IFX_INLINE void | IfxHssl_enableHsctLvdsLoopback (Ifx_HSCT *hsct)
Enables HSCT LVDS loopback. More...
IFX_INLINE boolean | IfxHssl_getHsctInterruptFlagStatus (Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source)
Returns the HSCT interrupt flag status. More...
IFX_INLINE void | IfxHssl_setHsctSleepMode (Ifx_HSCT *hsct, IfxHssl_Hsct_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE uint32 | IfxHssl_getHsctUnsolicitedStatusMessage (Ifx_HSCT *hsct)
Get the last received unsolicited status message. More...
IFX_INLINE void | IfxHssl_sendHsctUnsolicitedStatusMessage (Ifx_HSCT *hsct, uint32 message)
Send the unsolicited status message. More...
IFX_INLINE void | IfxHssl_setHsctRxLinkSpeed (Ifx_HSCT *hsct, IfxHssl_MasterModeRxSpeed rxSpeed)
Set the HSCT RX link speed. More...
IFX_INLINE void | IfxHssl_setHsctTxLinkSpeed (Ifx_HSCT *hsct, IfxHssl_MasterModeTxSpeed txSpeed)
Set the HSCT TX link speed. More...
IFX_INLINE void | IfxHssl_enableHsctTransmitPath (Ifx_HSCT *hsct)
Enable hsct transmit path in master interface. More...
IFX_INLINE void | IfxHssl_enableHsctReceivePath (Ifx_HSCT *hsct)
Enable hsct receive path in master interface. More...
IFX_INLINE void | IfxHssl_disableHsctTransmitPath (Ifx_HSCT *hsct)
Disable hsct transmit path in master interface. More...
IFX_INLINE void | IfxHssl_disableHsctReceivePath (Ifx_HSCT *hsct)
Disable hsct receive path in master interface. More...
IFX_EXTERN void | IfxHssl_disableHsctModule (Ifx_HSCT *hsct)
Disables hsct module. More...
IFX_EXTERN void | IfxHssl_enableHsctModule (Ifx_HSCT *hsct)
Enables hsct module. More...
IFX_EXTERN Ifx_HSCT * | IfxHssl_getHsctAddress (IfxHssl_hsctIndex hsct)
IFX_EXTERN IfxHssl_hsctIndex | IfxHssl_getHsctIndex (Ifx_HSCT *hsct)
API to get the resource index of the HSCT specified. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxHssl_getHsctSrcPointer (Ifx_HSCT *hsct)
Returns the SRC pointer for HSCT. More...
IFX_EXTERN void | IfxHssl_resetHsctKernel (Ifx_HSCT *hsct)
resets HSCT kernel More...

Detailed Description

Function Documentation

◆ IfxHssl_clearHsctInterruptFlag()

IFX_INLINE void IfxHssl_clearHsctInterruptFlag | ( | Ifx_HSCT * | hsct,
 |  | IfxHssl_Hsct_InterruptSource | source
 | ) |  |

Clears the HSCT interrupt flag.

Parameters
hsct | pointer to HSCT registers
source | HSCT interrupt source
Returns
None

Definition at line 701 of file IfxHssl.h.

◆ IfxHssl_disableHsctInterruptFlag()

IFX_INLINE void IfxHssl_disableHsctInterruptFlag | ( | Ifx_HSCT * | hsct,
 |  | IfxHssl_Hsct_InterruptSource | source
 | ) |  |

Enables HSCT interrupt flag.

Parameters
hsct | pointer to HSCT registers
source | HSCT interrupt source
Returns
None

Definition at line 728 of file IfxHssl.h.

◆ IfxHssl_disableHsctModule()

IFX_EXTERN void IfxHssl_disableHsctModule ( Ifx_HSCT * hsct )

Disables hsct module.

Parameters
hsct pointer to HSCT registers
Returns
None

Definition at line 53 of file IfxHssl.c.

◆ IfxHssl_disableHsctReceivePath()

IFX_INLINE void IfxHssl_disableHsctReceivePath ( Ifx_HSCT * hsct )

Disable hsct receive path in master interface.

Parameters
hsct pointer to HSCT registers
Returns
None

Definition at line 979 of file IfxHssl.h.

◆ IfxHssl_disableHsctTransmitPath()

IFX_INLINE void IfxHssl_disableHsctTransmitPath ( Ifx_HSCT * hsct )

Disable hsct transmit path in master interface.

Parameters
hsct pointer to HSCT registers
Returns
None

Definition at line 973 of file IfxHssl.h.

◆ IfxHssl_enableHsctInterrupt()

IFX_INLINE void IfxHssl_enableHsctInterrupt | ( | Ifx_HSCT * | hsct,
 |  | IfxSrc_Tos | typeOfService,
 |  | uint16 | priority
 | ) |  |

Enables HSCT interrupt.

Parameters
hsct | pointer to HSCT registers
typeOfService | Type of Service (Cpu or DMA)
priority | Priority of the interrupt
Returns
None

Definition at line 755 of file IfxHssl.h.

◆ IfxHssl_enableHsctInterruptFlag()

IFX_INLINE void IfxHssl_enableHsctInterruptFlag | ( | Ifx_HSCT * | hsct,
 |  | IfxHssl_Hsct_InterruptSource | source
 | ) |  |

Enables HSCT interrupt flag.

Parameters
hsct | pointer to HSCT registers
source | HSCT interrupt source
Returns
None

Definition at line 764 of file IfxHssl.h.

◆ IfxHssl_enableHsctLvdsLoopback()

IFX_INLINE void IfxHssl_enableHsctLvdsLoopback ( Ifx_HSCT * hsct )

Enables HSCT LVDS loopback.

Parameters
hsct pointer to HSCT registers
Returns
None

Definition at line 771 of file IfxHssl.h.

◆ IfxHssl_enableHsctModule()

IFX_EXTERN void IfxHssl_enableHsctModule ( Ifx_HSCT * hsct )

Enables hsct module.

Parameters
hsct pointer to HSCT registers
Returns
None

Definition at line 71 of file IfxHssl.c.

Referenced by IfxHssl_Hssl_initHsctModule().

◆ IfxHssl_enableHsctReceivePath()

IFX_INLINE void IfxHssl_enableHsctReceivePath ( Ifx_HSCT * hsct )

Enable hsct receive path in master interface.

Parameters
hsct pointer to HSCT registers
Returns
None

Definition at line 967 of file IfxHssl.h.

◆ IfxHssl_enableHsctTransmitPath()

IFX_INLINE void IfxHssl_enableHsctTransmitPath ( Ifx_HSCT * hsct )

Enable hsct transmit path in master interface.

Parameters
hsct pointer to HSCT registers
Returns
None

Definition at line 961 of file IfxHssl.h.

◆ IfxHssl_getHsctAddress()

IFX_EXTERN Ifx_HSCT* IfxHssl_getHsctAddress ( IfxHssl_hsctIndex hsct )
Parameters
hsct Resource index of the HSCT
Returns
HSCT module register address

Definition at line 89 of file IfxHssl.c.

◆ IfxHssl_getHsctIndex()

IFX_EXTERN IfxHssl_hsctIndex IfxHssl_getHsctIndex ( Ifx_HSCT * hsct )

API to get the resource index of the HSCT specified.

Returns
Resource index of the HSCT

Definition at line 106 of file IfxHssl.c.

◆ IfxHssl_getHsctInterruptFlagStatus()

IFX_INLINE boolean IfxHssl_getHsctInterruptFlagStatus | ( | Ifx_HSCT * | hsct,
 |  | IfxHssl_Hsct_InterruptSource | source
 | ) |  |

Returns the HSCT interrupt flag status.

Parameters
hsct | pointer to HSCT registers
source | HSCT interrupt source
Returns
Status (TRUE / FALSE)

Definition at line 848 of file IfxHssl.h.

◆ IfxHssl_getHsctSrcPointer()

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxHssl_getHsctSrcPointer ( Ifx_HSCT * hsct )

Returns the SRC pointer for HSCT.

Parameters
hsct pointer to HSCT registers
Returns
SRC pointer for HSCT

Definition at line 126 of file IfxHssl.c.

Referenced by IfxHssl_enableHsctInterrupt().

◆ IfxHssl_getHsctUnsolicitedStatusMessage()

IFX_INLINE uint32 IfxHssl_getHsctUnsolicitedStatusMessage ( Ifx_HSCT * hsct )

Get the last received unsolicited status message.

Parameters
hsct pointer to HSCT registers
Returns
Get the unsolicited status message.

Definition at line 937 of file IfxHssl.h.

◆ IfxHssl_resetHsctKernel()

IFX_EXTERN void IfxHssl_resetHsctKernel ( Ifx_HSCT * hsct )

resets HSCT kernel

Parameters
hsct pointer to HSCT registers
Returns
None

Definition at line 205 of file IfxHssl.c.

◆ IfxHssl_sendHsctUnsolicitedStatusMessage()

IFX_INLINE void IfxHssl_sendHsctUnsolicitedStatusMessage | ( | Ifx_HSCT * | hsct,
 |  | uint32 | message
 | ) |  |

Send the unsolicited status message.

Parameters
hsct | pointer to HSCT registers
message | Unsolicited status message to be sent
Returns
None

Definition at line 943 of file IfxHssl.h.

◆ IfxHssl_setHsctRxLinkSpeed()

IFX_INLINE void IfxHssl_setHsctRxLinkSpeed | ( | Ifx_HSCT * | hsct,
 |  | IfxHssl_MasterModeRxSpeed | rxSpeed
 | ) |  |

Set the HSCT RX link speed.

Parameters
hsct | pointer to HSCT registers
rxSpeed | Speed for Rx link
Returns
None

Definition at line 949 of file IfxHssl.h.

◆ IfxHssl_setHsctSleepMode()

IFX_INLINE void IfxHssl_setHsctSleepMode | ( | Ifx_HSCT * | hsct,
 |  | IfxHssl_Hsct_SleepMode | mode
 | ) |  |

Sets the sensitivity of the module to sleep signal.

Parameters
hsct | pointer to HSCT registers
mode | mode selection (enable/disable)
Returns
None

Definition at line 890 of file IfxHssl.h.

◆ IfxHssl_setHsctTxLinkSpeed()

IFX_INLINE void IfxHssl_setHsctTxLinkSpeed | ( | Ifx_HSCT * | hsct,
 |  | IfxHssl_MasterModeTxSpeed | txSpeed
 | ) |  |

Set the HSCT TX link speed.

Parameters
hsct | pointer to HSCT registers
txSpeed | Speed for Tx link
Returns
None

Definition at line 955 of file IfxHssl.h.


iLLD_TC38A: Data Structures

Data Structures
Data Structures
iLLD » HSSL » Standard Driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxHssl_Hsct
HSCT module handle. More...
struct | IfxHssl_Hsct_Config
Configuration structure of the HSCT module. More...

Detailed Description

Data Structure Documentation

◆ IfxHssl_Hsct

struct IfxHssl_Hsct

HSCT module handle.

Definition at line 271 of file IfxHssl.h.

Data Fields
Ifx_HSCT * | hsct | pointer to HSCT registers
boolean | loopBack | loopc back selection

◆ IfxHssl_Hsct_Config

struct IfxHssl_Hsct_Config

Configuration structure of the HSCT module.

Definition at line 279 of file IfxHssl.h.

Data Fields
boolean | highSpeedMode | high speed mode selection
Ifx_HSCT * | hsct | pointer to HSCT registers
IfxHssl_InterfaceMode | interfaceMode | interface mode (master IF /slave IF)
boolean | loopBack | loopc back selection


iLLD_TC38A: Hssl Functions

Functions
Hssl Functions
iLLD » HSSL » Standard Driver
Collaboration diagram for Hssl Functions:

Functions

IFX_INLINE void | IfxHssl_clearHsslChannelErrorInterruptFlag (Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId)
Clears the HSSl channel error interrupt flag. More...
IFX_INLINE void | IfxHssl_clearHsslGlobalErrorInterruptFlag (Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source)
Clears the HSSl global error interrupt flag. More...
IFX_INLINE void | IfxHssl_clearInitialiseModeFlag (Ifx_HSSL *hssl)
Clears the Initialise Mode Flag status. More...
IFX_INLINE void | IfxHssl_disableHsslChannelErrorInterruptFlag (Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId)
Enables the HSSl channel error interrupt flag, which trggers the ERR interrupt. More...
IFX_INLINE void | IfxHssl_disableHsslGlobalErrorInterruptFlag (Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source)
Disables the HSSl channel error interrupt flag, which trggers the EXI interrupt. More...
IFX_INLINE void | IfxHssl_enableAllErrorFlags (Ifx_HSSL *hssl)
Enables all error flags. More...
IFX_INLINE void | IfxHssl_enableHsslCOKInterrupt (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSSL COK interrupt of specified channel. More...
IFX_INLINE void | IfxHssl_enableHsslChannelErrorInterruptFlag (Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId)
Enables the HSSl channel error interrupt flag, which trggers the ERR interrupt. More...
IFX_INLINE void | IfxHssl_enableHsslERRInterrupt (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSSL ERR interrupt of specified channel. More...
IFX_INLINE void | IfxHssl_enableHsslEXIInterrupt (Ifx_HSSL *hssl, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSSL EXI interrupt of specified channel. More...
IFX_INLINE void | IfxHssl_enableHsslGlobalErrorInterruptFlag (Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source)
Enables the HSSl global error interrupt flag, which trggers the EXI interrupt. More...
IFX_INLINE void | IfxHssl_enableHsslRDIInterrupt (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSSL RDI interrupt of specified channel. More...
IFX_INLINE void | IfxHssl_enableHsslTRGInterrupt (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSSL TRG interrupt of specified channel. More...
IFX_INLINE uint32 | IfxHssl_getAllMflagsStatus (Ifx_HSSL *hssl)
Returns the status of all MFLAGS status. More...
IFX_INLINE uint16 | IfxHssl_getCurrentCount (Ifx_HSSL *hssl)
Returns the Current Count value. More...
IFX_INLINE boolean | IfxHssl_getHsslChannelErrorInterruptFlagStatus (Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId)
Clears the HSSl channel error interrupt flag. More...
IFX_INLINE boolean | IfxHssl_getHsslGloabalErrorInterruptFlagStatus (Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source)
Clears the HSSl global error interrupt flag. More...
IFX_INLINE boolean | IfxHssl_getInitialiseModeFlagStatus (Ifx_HSSL *hssl)
Returns the Initialise Mode Flag status. More...
IFX_INLINE uint16 | IfxHssl_getReloadCount (Ifx_HSSL *hssl)
Returns the Reload Count value. More...
IFX_INLINE boolean | IfxHssl_isModuleSuspended (Ifx_HSSL *hssl)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxHssl_setHsslSleepMode (Ifx_HSSL *hssl, IfxHssl_Hssl_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxHssl_setInitialiseModeFlag (Ifx_HSSL *hssl)
Sets the Initialise Mode Flag. More...
IFX_INLINE void | IfxHssl_setReloadCount (Ifx_HSSL *hssl, uint16 reloadValue)
Sets the reload Count. More...
IFX_INLINE void | IfxHssl_setSuspendMode (Ifx_HSSL *hssl, IfxHssl_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_INLINE void | IfxHssl_setTimeoutReloadValue (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, uint8 timeoutValue)
Sets the Timeout Reload Value. More...
IFX_EXTERN void | IfxHssl_disableHsslModule (Ifx_HSSL *hssl)
DIsables the hssl module. More...
IFX_EXTERN void | IfxHssl_enableHsslModule (Ifx_HSSL *hssl)
Enables the hssl module. More...
IFX_EXTERN Ifx_HSSL * | IfxHssl_getHsslAddress (IfxHssl_hsslIndex hssl)
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxHssl_getHsslCOKSrcPointer (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL COK of specified channel. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxHssl_getHsslERRSrcPointer (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL ERR of specified channel. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxHssl_getHsslEXISrcPointer (Ifx_HSSL *hssl)
Returns the SRC pointer for HSSL EXI interrupt. More...
IFX_EXTERN IfxHssl_hsslIndex | IfxHssl_getHsslIndex (Ifx_HSSL *hssl)
API to get the resource index of the HSSL specified. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxHssl_getHsslRDISrcPointer (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL COK of specified channel. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxHssl_getHsslTRGSrcPointer (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL TRG of specified channel. More...
IFX_EXTERN void | IfxHssl_resetHsslKernel (Ifx_HSSL *hssl)
resets the HSSL kernel More...

Detailed Description

Function Documentation

◆ IfxHssl_clearHsslChannelErrorInterruptFlag()

IFX_INLINE void IfxHssl_clearHsslChannelErrorInterruptFlag | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_Hssl_ERRInterruptSource | source,
 |  | IfxHssl_ChannelId | channelId
 | ) |  |

Clears the HSSl channel error interrupt flag.

Parameters
hssl | pointer to HSSl registers
source | HSSL channel error interrupt source
channelId | HSSL channel number
Returns
None

Definition at line 708 of file IfxHssl.h.

◆ IfxHssl_clearHsslGlobalErrorInterruptFlag()

IFX_INLINE void IfxHssl_clearHsslGlobalErrorInterruptFlag | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_Hssl_EXIInterruptSource | source
 | ) |  |

Clears the HSSl global error interrupt flag.

Parameters
hssl | pointer to HSSl registers
source | HSSL global error interrupt source
Returns
None

Definition at line 715 of file IfxHssl.h.

◆ IfxHssl_clearInitialiseModeFlag()

IFX_INLINE void IfxHssl_clearInitialiseModeFlag ( Ifx_HSSL * hssl )

Clears the Initialise Mode Flag status.

Parameters
hssl pointer to HSSL registers
Returns
None

Definition at line 722 of file IfxHssl.h.

◆ IfxHssl_disableHsslChannelErrorInterruptFlag()

IFX_INLINE void IfxHssl_disableHsslChannelErrorInterruptFlag | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_Hssl_ERRInterruptSource | source,
 |  | IfxHssl_ChannelId | channelId
 | ) |  |

Enables the HSSl channel error interrupt flag, which trggers the ERR interrupt.

Parameters
hssl | pointer to HSSl registers
source | HSSL channel error interrupt source
channelId | HSSL channel number
Returns
None

Definition at line 735 of file IfxHssl.h.

◆ IfxHssl_disableHsslGlobalErrorInterruptFlag()

IFX_INLINE void IfxHssl_disableHsslGlobalErrorInterruptFlag | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_Hssl_EXIInterruptSource | source
 | ) |  |

Disables the HSSl channel error interrupt flag, which trggers the EXI interrupt.

Parameters
hssl | pointer to HSSl registers
source | HSSL global error interrupt source
Returns
None

Definition at line 742 of file IfxHssl.h.

◆ IfxHssl_disableHsslModule()

IFX_EXTERN void IfxHssl_disableHsslModule ( Ifx_HSSL * hssl )

DIsables the hssl module.

Parameters
hssl pointer to HSSl registers
Returns
None

Definition at line 62 of file IfxHssl.c.

◆ IfxHssl_enableAllErrorFlags()

IFX_INLINE void IfxHssl_enableAllErrorFlags ( Ifx_HSSL * hssl )

Enables all error flags.

Parameters
hssl pointer to HSSL registers
Returns
None

Definition at line 749 of file IfxHssl.h.

◆ IfxHssl_enableHsslChannelErrorInterruptFlag()

IFX_INLINE void IfxHssl_enableHsslChannelErrorInterruptFlag | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_Hssl_ERRInterruptSource | source,
 |  | IfxHssl_ChannelId | channelId
 | ) |  |

Enables the HSSl channel error interrupt flag, which trggers the ERR interrupt.

Parameters
hssl | pointer to HSSl registers
source | HSSL channel error interrupt source
channelId | HSSL channel number
Returns
None

Definition at line 786 of file IfxHssl.h.

◆ IfxHssl_enableHsslCOKInterrupt()

IFX_INLINE void IfxHssl_enableHsslCOKInterrupt | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_ChannelId | channelId,
 |  | IfxSrc_Tos | typeOfService,
 |  | uint16 | priority
 | ) |  |

Enables HSSL COK interrupt of specified channel.

Parameters
hssl | pointer to HSSl registers
channelId | HSSL channel number
typeOfService | Type of Service (Cpu or DMA)
priority | Priority of the interrupt
Returns
None

Definition at line 777 of file IfxHssl.h.

◆ IfxHssl_enableHsslERRInterrupt()

IFX_INLINE void IfxHssl_enableHsslERRInterrupt | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_ChannelId | channelId,
 |  | IfxSrc_Tos | typeOfService,
 |  | uint16 | priority
 | ) |  |

Enables HSSL ERR interrupt of specified channel.

Parameters
hssl | pointer to HSSl registers
channelId | HSSL channel number
typeOfService | Type of Service (Cpu or DMA)
priority | Priority of the interrupt
Returns
None

Definition at line 793 of file IfxHssl.h.

◆ IfxHssl_enableHsslEXIInterrupt()

IFX_INLINE void IfxHssl_enableHsslEXIInterrupt | ( | Ifx_HSSL * | hssl,
 |  | IfxSrc_Tos | typeOfService,
 |  | uint16 | priority
 | ) |  |

Enables HSSL EXI interrupt of specified channel.

Parameters
hssl | pointer to HSSl registers
typeOfService | Type of Service (Cpu or DMA)
priority | Priority of the interrupt
Returns
None

Definition at line 802 of file IfxHssl.h.

◆ IfxHssl_enableHsslGlobalErrorInterruptFlag()

IFX_INLINE void IfxHssl_enableHsslGlobalErrorInterruptFlag | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_Hssl_EXIInterruptSource | source
 | ) |  |

Enables the HSSl global error interrupt flag, which trggers the EXI interrupt.

Parameters
hssl | pointer to HSSl registers
source | HSSL global error interrupt source
Returns
None

Definition at line 811 of file IfxHssl.h.

◆ IfxHssl_enableHsslModule()

IFX_EXTERN void IfxHssl_enableHsslModule ( Ifx_HSSL * hssl )

Enables the hssl module.

Parameters
hssl pointer to HSSl registers
Returns
None

Definition at line 80 of file IfxHssl.c.

Referenced by IfxHssl_Hssl_initHsslModule().

◆ IfxHssl_enableHsslRDIInterrupt()

IFX_INLINE void IfxHssl_enableHsslRDIInterrupt | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_ChannelId | channelId,
 |  | IfxSrc_Tos | typeOfService,
 |  | uint16 | priority
 | ) |  |

Enables HSSL RDI interrupt of specified channel.

Parameters
hssl | pointer to HSSl registers
channelId | HSSL channel number
typeOfService | Type of Service (Cpu or DMA)
priority | Priority of the interrupt
Returns
None

Definition at line 818 of file IfxHssl.h.

◆ IfxHssl_enableHsslTRGInterrupt()

IFX_INLINE void IfxHssl_enableHsslTRGInterrupt | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_ChannelId | channelId,
 |  | IfxSrc_Tos | typeOfService,
 |  | uint16 | priority
 | ) |  |

Enables HSSL TRG interrupt of specified channel.

Parameters
hssl | pointer to HSSl registers
channelId | HSSL channel number
typeOfService | Type of Service (Cpu or DMA)
priority | Priority of the interrupt
Returns
None

Definition at line 827 of file IfxHssl.h.

◆ IfxHssl_getAllMflagsStatus()

IFX_INLINE uint32 IfxHssl_getAllMflagsStatus ( Ifx_HSSL * hssl )

Returns the status of all MFLAGS status.

Parameters
hssl pointer to HSSL registers
Returns
MFLAGS status

Definition at line 836 of file IfxHssl.h.

◆ IfxHssl_getCurrentCount()

IFX_INLINE uint16 IfxHssl_getCurrentCount ( Ifx_HSSL * hssl )

Returns the Current Count value.

Parameters
hssl pointer to HSSL registers
Returns
Current Count value

Definition at line 842 of file IfxHssl.h.

◆ IfxHssl_getHsslAddress()

IFX_EXTERN Ifx_HSSL* IfxHssl_getHsslAddress ( IfxHssl_hsslIndex hssl )
Parameters
hssl Resource index of the HSSL
Returns
HSSL module register address

Definition at line 133 of file IfxHssl.c.

◆ IfxHssl_getHsslChannelErrorInterruptFlagStatus()

IFX_INLINE boolean IfxHssl_getHsslChannelErrorInterruptFlagStatus | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_Hssl_ERRInterruptSource | source,
 |  | IfxHssl_ChannelId | channelId
 | ) |  |

Clears the HSSl channel error interrupt flag.

Parameters
hssl | pointer to HSSl registers
source | HSSL channel error interrupt source
channelId | HSSL channel number
Returns
Status (TRUE / FALSE)

Definition at line 854 of file IfxHssl.h.

◆ IfxHssl_getHsslCOKSrcPointer()

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxHssl_getHsslCOKSrcPointer | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_ChannelId | channelId
 | ) |  |

Returns the SRC pointer for HSSL COK of specified channel.

Parameters
hssl | pointer to HSSl registers
channelId | HSSL channel number
Returns
SRC pointer for HSSL COK interrupt of specific channel

Definition at line 150 of file IfxHssl.c.

Referenced by IfxHssl_enableHsslCOKInterrupt().

◆ IfxHssl_getHsslERRSrcPointer()

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxHssl_getHsslERRSrcPointer | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_ChannelId | channelId
 | ) |  |

Returns the SRC pointer for HSSL ERR of specified channel.

Parameters
hssl | pointer to HSSl registers
channelId | HSSL channel number
Returns
SRC pointer for HSSL ERR interrupt of specific channel

Definition at line 157 of file IfxHssl.c.

Referenced by IfxHssl_enableHsslERRInterrupt().

◆ IfxHssl_getHsslEXISrcPointer()

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxHssl_getHsslEXISrcPointer ( Ifx_HSSL * hssl )

Returns the SRC pointer for HSSL EXI interrupt.

Parameters
hssl pointer to HSSl registers
Returns
SRC pointer for HSSL EXI interrupt

Definition at line 164 of file IfxHssl.c.

Referenced by IfxHssl_enableHsslEXIInterrupt().

◆ IfxHssl_getHsslGloabalErrorInterruptFlagStatus()

IFX_INLINE boolean IfxHssl_getHsslGloabalErrorInterruptFlagStatus | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_Hssl_EXIInterruptSource | source
 | ) |  |

Clears the HSSl global error interrupt flag.

Parameters
hssl | pointer to HSSl registers
source | HSSL global error interrupt source
Returns
Status (TRUE / FALSE)

Definition at line 860 of file IfxHssl.h.

◆ IfxHssl_getHsslIndex()

IFX_EXTERN IfxHssl_hsslIndex IfxHssl_getHsslIndex ( Ifx_HSSL * hssl )

API to get the resource index of the HSSL specified.

Returns
Resource index of the HSSL

Definition at line 171 of file IfxHssl.c.

◆ IfxHssl_getHsslRDISrcPointer()

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxHssl_getHsslRDISrcPointer | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_ChannelId | channelId
 | ) |  |

Returns the SRC pointer for HSSL COK of specified channel.

Parameters
hssl | pointer to HSSl registers
channelId | HSSL channel number
Returns
SRC pointer for HSSL RDI interrupt of specific channel

Definition at line 191 of file IfxHssl.c.

Referenced by IfxHssl_enableHsslRDIInterrupt().

◆ IfxHssl_getHsslTRGSrcPointer()

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxHssl_getHsslTRGSrcPointer | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_ChannelId | channelId
 | ) |  |

Returns the SRC pointer for HSSL TRG of specified channel.

Parameters
hssl | pointer to HSSl registers
channelId | HSSL channel number
Returns
SRC pointer for HSSL TRG interrupt of specific channel

Definition at line 198 of file IfxHssl.c.

Referenced by IfxHssl_enableHsslTRGInterrupt().

◆ IfxHssl_getInitialiseModeFlagStatus()

IFX_INLINE boolean IfxHssl_getInitialiseModeFlagStatus ( Ifx_HSSL * hssl )

Returns the Initialise Mode Flag status.

Parameters
hssl pointer to HSSL registers
Returns
status : TRUE/FALSE

Definition at line 866 of file IfxHssl.h.

◆ IfxHssl_getReloadCount()

IFX_INLINE uint16 IfxHssl_getReloadCount ( Ifx_HSSL * hssl )

Returns the Reload Count value.

Parameters
hssl pointer to HSSL registers
Returns
Current Count value

Definition at line 872 of file IfxHssl.h.

◆ IfxHssl_isModuleSuspended()

IFX_INLINE boolean IfxHssl_isModuleSuspended ( Ifx_HSSL * hssl )

Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended.

Parameters
hssl Pointer to HSSL module registers
Returns
Suspend status (TRUE / FALSE)

Definition at line 878 of file IfxHssl.h.

◆ IfxHssl_resetHsslKernel()

IFX_EXTERN void IfxHssl_resetHsslKernel ( Ifx_HSSL * hssl )

resets the HSSL kernel

Parameters
hssl pointer to HSSL registers
Returns
None

Definition at line 224 of file IfxHssl.c.

◆ IfxHssl_setHsslSleepMode()

IFX_INLINE void IfxHssl_setHsslSleepMode | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_Hssl_SleepMode | mode
 | ) |  |

Sets the sensitivity of the module to sleep signal.

Parameters
hssl | pointer to HSSL registers
mode | mode selection (enable/disable)
Returns
None

Definition at line 899 of file IfxHssl.h.

◆ IfxHssl_setInitialiseModeFlag()

IFX_INLINE void IfxHssl_setInitialiseModeFlag ( Ifx_HSSL * hssl )

Sets the Initialise Mode Flag.

Parameters
hssl pointer to HSSL registers
Returns
None

Definition at line 908 of file IfxHssl.h.

◆ IfxHssl_setReloadCount()

IFX_INLINE void IfxHssl_setReloadCount | ( | Ifx_HSSL * | hssl,
 |  | uint16 | reloadValue
 | ) |  |

Sets the reload Count.

Parameters
hssl | pointer to HSSL registers
reloadValue | Reload Value
Returns
None

Definition at line 914 of file IfxHssl.h.

◆ IfxHssl_setSuspendMode()

IFX_INLINE void IfxHssl_setSuspendMode | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_SuspendMode | mode
 | ) |  |

Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.

Parameters
hssl | Pointer to HSSL module registers
mode | Module suspend mode
Returns
None

Definition at line 920 of file IfxHssl.h.

◆ IfxHssl_setTimeoutReloadValue()

IFX_INLINE void IfxHssl_setTimeoutReloadValue | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_ChannelId | channelId,
 |  | uint8 | timeoutValue
 | ) |  |

Sets the Timeout Reload Value.

Parameters
hssl | pointer to HSSL registers
channelId | HSSL channel number
timeoutValue | Timeout Value
Returns
None

Definition at line 931 of file IfxHssl.h.


iLLD_TC38A: How to use the HSSL Interface driver?

How to use the HSSL Interface driver?
iLLD » HSSL
Collaboration diagram for How to use the HSSL Interface driver?:

The HSSL interface driver provides a default HSSL/HSCT configuration for point to point communication at two transfer speeds, 5MBaud (low speed) and 320MBaud (high speed). It also supports streaming transfers of data a memory block at both low and high speeds.

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Hssl/Hssl/IfxHssl_Hssl.h>

Variables

Declare the HSSL handle, HSCT handle and channel array as global variables in your C code:

// used globally
static IfxHssl_Hssl hssl;
static IfxHssl_Hsct hsct;
IfxHssl_Hssl_Channel hsslChannel[4];
__attribute__ ((aligned(256))) uint32 txData[80]; // needs to be declared globally in case of streaming transfers

Module Initialisation

The module initialisation can be done as follows:

// create module config
IfxHssl_Hsct_Config hsctConfig;
IfxHssl_Hssl_initHsctModuleConfig(&hsctConfig, &MODULE_HSCT);
// select the interface mode (in case of slave)
hsctConfig.interfaceMode = IfxHssl_InterfaceMode_slave;
// select the high speed mode if required
hsctConfig.highSpeedMode = TRUE;
// initialize module
// IfxHssl_Hsct hsct; defined globally
IfxHssl_Hssl_initHsctModule(&hsct, &hsctConfig);
// create module config
IfxHssl_Hssl_Config hsslConfig;
IfxHssl_Hssl_initHsslModuleConfig(&hsslConfig, &MODULE_HSSL);
// IfxHssl_Hssl hssl; defined globally
IfxHssl_Hssl_initHsslModule(&hssl, &hsslConfig);

If application intends to explicitly configure the pins for HSCT module IFXHSSL_HSCT_DISABLE_PINCONFIG macro should be defined in the application. The explicit pin assignment should be done prior to IfxHssl_Hssl_initHsctModule().

For explicitly changing the default configuration of the REFCLK and the SYSCLK of HSCT module the below macros are provided

IFXHSSL_HSCT_ENABLE_REF_CLK_10MHZ - This macro sets the REFCLK in the Hsct module to 10MHz (Default value of REFCLK is 20MHz).

IFXHSSL_HSCT_ENABLE_SYS_CLK_DIV_2 - This macro sets the SYSCLK divider value. Recomended value for SYSCLK is 20MHz.

Application can use the macros for changing the default clock configuration on HSCT module.

Note: In case of HSCT Slave configuration, application has to select SysClk pin as the clock source.

After the port initialisation of HSCT slave device ie. after calling IfxHssl_Hssl_initHsctModule(), configure the SCU system PLL as below

IfxScuCcu_initConfig(&IfxScuCcu_sampleClockConfig);
// Set the clock to SysClk generated from HSCT master interface
IfxScuCcu_sampleClockConfig.pllInitialStepConfig.pllsParameters.pllInputClockSelection = IfxScuCcu_PllInputClockSelection_fSysclk;
IfxScuCcu_init(&IfxScuCcu_sampleClockConfig);
// Wait till PLL is locked

Channel Initialisation

The Channel initialisation can be done as follows:

// create HSSL channel config
IfxHssl_Hssl_ChannelConfig hsslChannelConfig;
IfxHssl_Hssl_initChannelConfig(&hsslChannelConfig, &hssl, &hsct);
// initialize the channels
// IfxHssl_Hssl_Channel hsslChannel[4]; defined globally
for(int i=0; i<4; ++i)
{
hsslChannelConfig.channelId = (IfxHssl_ChannelId)i;
IfxHssl_Hssl_initChannel(&hsslChannel[i], &hsslChannelConfig);
}

Changing HSCT link speed

The link speed change can be done as follows

As per the above settings the HSCT master is in High speed reception and transmission.

The pseudo code for setting the target to High speed is as below

// Set the Tx link speed of the master to Low speed
IfxHssl_setHsctTxLinkSpeed(&hsct , IfxHssl_MasterModeTxSpeed_lowSpeed);
// Enable reception at the Slave
IfxHssl_Hssl_sendControlCommand(&hsct,IfxHssl_ControlCommand_enableReception);
// Send interface commmand to change Rx to High speed at the target
IfxHssl_Hssl_sendControlCommand(&hsct,IfxHssl_ControlCommand_highSpeedReception);
// Send interface commmand to change Tx to High speed at the target
IfxHssl_Hssl_sendControlCommand(&hsct,IfxHssl_ControlCommand_highSpeedTransmission);
// Set the Tx link speed of the master to High speed
IfxHssl_setHsctTxLinkSpeed(&hsct , IfxHssl_MasterModeTxSpeed_highSpeed);

The pseudo code for setitng the target to Low speed from High speed (ie. if hsctConfig.highSpeedMode is set to TRUE).

// Set the Tx link speed of master to Low speed
IfxHssl_setHsctTxLinkSpeed(&hsct , IfxHssl_MasterModeTxSpeed_lowSpeed);
// Send interface command to change Rx to low speed at the target
IfxHssl_Hssl_sendControlCommand(&hsct,IfxHssl_ControlCommand_lowSpeedReception);
// Set the Rx link speed of master to Low speed
IfxHssl_setHsctRxLinkSpeed(&hsct, IfxHssl_MasterModeRxSpeed_lowSpeed);
// Send interface command to change Tx to low speed at the target
IfxHssl_Hssl_sendControlCommand(&hsct,IfxHssl_ControlCommand_lowSpeedTransmission);

The HSSL is ready for use now!

Data Transfers

Simple Transfers

The HSSL driver provides simple to use data transfer functions,

It supports direct writing of 8/16/32 bit data from the initiator into a target's register, as well as reading a value from the target

// write some data to remote location:
IfxHssl_Hssl_write(&hsslChannel[0], 0x70000000, 0x12345678, IfxHssl_DataLength_32bit);
// wait for the acknowledgement
while( IfxHssl_Hssl_waitAcknowledge(&hsslChannel[0]) != IfxHssl_Hssl_Status_ok )
{
if( IfxHssl_Hssl_waitAcknowledge(&hsslChannel[0]) == IfxHssl_Hssl_Status_error )
{
IfxHssl_Hssl_checkErrors(&hssl);
break;
}
}

A simple to use receive function is available as well.

// read some data from remote location:
IfxHssl_Hssl_read(&hsslChannel[0], 0x70000000, IfxHssl_DataLength_32bit);
// wait for the acknowledgement
while( IfxHssl_Hssl_waitAcknowledge(&hsslChannel[0]) != IfxHssl_Hssl_Status_ok )
{
if( IfxHssl_Hssl_waitAcknowledge(&hsslChannel[0]) == IfxHssl_Hssl_Status_error )
{
IfxHssl_Hssl_checkErrors(&hssl);
break;
}
}
// read data from the register
uint32 dataL = IfxHssl_Hssl_getReadData(&hsslChannel[0]);

Streaming Transfers

HSSL driver also supports streaming transfers of data as a memory block at both low and high speeds.

Preparing the target for streaming with the desired memory location where the data needs to be transfered

// choose a channel other than channel2 for register access
// prepare streaming of single memory block
IfxHssl_Hssl_prepareStream(&hsslChannel[0], 0x70000000, 10);

Stream the memory block

Usage Example:

// __attribute__ ((aligned(256))) uint32 txData[80]; expected to be declared globally
// for single block streaming transfer
// change the txData address to global address before passing it to the API
// IfxHssl_Hssl_writeStream(&hssl, (uint32 *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), (uint32)txData), 10);
IfxHssl_Hssl_writeStream(&hssl, txData, 10);
// wait until the streaming is finished
while( IfxHssl_Hssl_waitAcknowledge(&hsslChannel[2]) != IfxHssl_Hssl_Status_ok )
{}

DMA Operated Command Queues

It makes sense to do this from outside the driver, by initialising the DMA after HSSL, and send command queues through linked lists here is an example of how to use DMA operated command queues.

Include following header files into your C code:

#include <Hssl/Hssl/IfxHssl_Hssl.h>
#include <Dma/Dma/IfxDma_Dma.h>
#include <Scu/Std/IfxScuWdt.h>

Declare the HSSL handle, HSCT handle, HSSL channel handle and DMA channel handle as global variables in your C code:

// used globally
static IfxHssl_Hssl hssl;
static IfxHssl_Hsct hsct;
IfxHssl_Hssl_Channel hsslChannel;
// DMA channel handle
IfxDma_Dma_Channel chn;
// Linked List storage
// IMPORTANT: it has to be aligned to an 64bit address, otherwise DMA can't read it
#define NUM_LINKED_LIST_ITEMS 3
__attribute__ ((aligned(64))) Ifx_DMA_CH linkedList[NUM_LINKED_LIST_ITEMS] ;
// transfer these values to channel 0 : HSSL_IWD0, HSSL_ICON0, HSSL_IRWA0 registers via linked lists
#define NUM_TRANSFERED_WORDS 3
// three write command queues with different data and to different addresses on slave
uint32 sourceBuffer[NUM_LINKED_LIST_ITEMS][NUM_TRANSFERED_WORDS] = {
{0xC0CAC01A, 0xFF0A0000, 0x70000000},
{0xBA5EBA11, 0xFF0A0000, 0x70000010},
{0xDEADBEEF, 0xFF0A0000, 0x70000020}
};
// three command queues to the same channel 0
const uint32 destinationAddresses[NUM_LINKED_LIST_ITEMS] = {
(uint32)&HSSL_I0_IWD,
(uint32)&HSSL_I0_IWD,
(uint32)&HSSL_I0_IWD
};

Initialise the hssl module, see Module Initialisation

Initialise the hssl channel

// create HSSL channel config
IfxHssl_Hssl_ChannelConfig hsslChannelConfig;
IfxHssl_Hssl_initChannelConfig(&hsslChannelConfig, &hssl, &hsct);
// initialize the channel 0
// IfxHssl_Hssl_Channel hsslChannel; defined globally
hsslChannelConfig.channelId = 0;
IfxHssl_Hssl_initChannel(&hsslChannel, &hsslChannelConfig);

Build a linked list

// create module config
IfxDma_Dma_Config dmaConfig;
IfxDma_Dma_initModuleConfig(&dmaConfig, &MODULE_DMA);
// initialize module
IfxDma_Dma dma;
IfxDma_Dma_initModule(&dma, &dmaConfig);
// initial channel configuration
IfxDma_Dma_ChannelConfig cfg;
IfxDma_Dma_initChannelConfig(&cfg, &dma);
// following settings are used by all transactions
cfg.transferCount = NUM_TRANSFERED_WORDS;
cfg.requestMode = IfxDma_ChannelRequestMode_completeTransactionPerRequest;
cfg.moveSize = IfxDma_ChannelMoveSize_32bit;
cfg.shadowControl = IfxDma_ChannelShadow_linkedList;
// generate linked list items
for(int i=0; i<NUM_LINKED_LIST_ITEMS; ++i) {
cfg.sourceAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &sourceBuffer[i]);
cfg.destinationAddress = destinationAddresses[i];
// address to next transaction set
cfg.shadowAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), (uint32)&linkedList[(i + 1) % NUM_LINKED_LIST_ITEMS]);
// transfer first transaction set into DMA channel
if( i == 0 ) {
IfxDma_Dma_initChannel(&chn, &cfg);
}
// transfer into linked list storage
IfxDma_Dma_initLinkedListEntry((void *)&linkedList[i], &cfg);
if( i == 0 ) {
// - trigger channel interrupt once the first transaction set has been loaded (again) into DMA channel
linkedList[i].CHCSR.B.SIT = 1;
} else {
// - activate SCH (transaction request) for each entry, expect for the first one (linked list terminated here)
linkedList[i].CHCSR.B.SCH = 1;
}
}

The transfer can be started via software with:

// clear service request flag
(IfxDma_Dma_getSrcPointer(&chn))->B.CLRR = 1;
// start linked list transaction
IfxDma_Dma_startChannelTransaction(&chn);
// wait for service request which is triggered at the end of linked list transfers
while( !(IfxDma_Dma_getSrcPointer(&chn))->B.SRR );

Interrupts usage

Interrupts can be enabled from the application by using the APIs provided in the driver, there are APIs available in the driver to enable, disable, clear and read the status of interrupt falgs, along with these,
APIs to enable the the enterrupts are also available.

here is an example of how to use the interrupts in HSSL driver.

Using HSCT interrupts

After initialising HSCT module Module Initialisation

choose what flags needs to be enabled for HSCT interrupt and call the following function once for each flag by choosing the right flag as parameter,
and after choosing all the flags needed, enable the HSCT interrupt with desired type of service and priority.

Ifx_HSCT *hsct = &MODULE_HSCT;
IfxHssl_enableHsctInterruptFlag(hsct, IfxHssl_Hsct_InterruptSource_headerError);
IfxHssl_enableHsctInterruptFlag(hsct, IfxHssl_Hsct_InterruptSource_payloadError);
IfxHssl_enableHsctInterruptFlag(hsct, IfxHssl_Hsct_InterruptSource_commandError);
IfxHssl_enableHsctInterruptFlag(hsct, IfxHssl_Hsct_InterruptSource_speedModeSwitchError);
// enable the HSCT interrupt
IfxHssl_enableHsctInterrupt(hsct, IfxSrc_Tos_cpu0, 4);

Using HSSl interrupts

HSSL global error interrupt (EXI)

After initilaising HSSL module Module Initialisation

choose what flags needs to be enabled for HSSL global error (EXI) interrupt and call the following function once for each flag by choosing the right flag as parameter,
and after choosing all the flags needed, enable the HSSL EXI interrupt with desired type of service and priority

Ifx_HSSL *hssl = &MODULE_HSSL;
IfxHssl_enableHsslGlobalErrorInterruptFlag(hssl, IfxHssl_Hssl_EXIInterruptSource_busAccessError);
IfxHssl_enableHsslGlobalErrorInterruptFlag(hssl, IfxHssl_Hssl_EXIInterruptSource_dataLengthError);
IfxHssl_enableHsslGlobalErrorInterruptFlag(hssl, IfxHssl_Hssl_EXIInterruptSource_crcError);
// enable the HSSL EXI interrupt
IfxHssl_enableHsslEXIInterrupt(hssl, IfxSrc_Tos_cpu0, 6);

HSSL channel specific error interrupt (ERR)

After initilaising HSSL channel Channel Initialisation

choose what flags needs to be enabled for HSSL channel specific error (ERR) interrupt and call the following function once for each flag by choosing the right flag as parameter,
and after choosing all the flags needed, enable the HSSL ERR interrupt with desired channel, type of service and priority

Ifx_HSSL *hssl = &MODULE_HSSL;
IfxHssl_enableHsslChannelErrorInterruptFlag(hssl, channelId_0, IfxHssl_Hssl_ERRInterruptSource_transactionTagError);
IfxHssl_enableHsslChannelErrorInterruptFlag(hssl, channelId_0, IfxHssl_Hssl_ERRInterruptSource_timeoutError);
// enable the HSSL ERR interrupt
IfxHssl_enableHsslERRInterrupt(hssl, channelId_0, IfxSrc_Tos_cpu0, 8);

you can define the ISR of your own and service the interrupt, please refer to more general usage of interrupts How to define Interrupts?

some additional APIs to clear, disable interrupt flags and get flag status are also available.


iLLD_TC38A: HSSL

Modules
HSSL
iLLD » HSSL
Collaboration diagram for HSSL:

Modules

Data Structures
Enumerations
Module Functions
Channel Functions
Simple Communication
Error Handling
Streaming Communication

Detailed Description


iLLD_TC38A: Data Structures

Data Structures
Data Structures
iLLD » HSSL » HSSL
Collaboration diagram for Data Structures:

Data Structures

struct | IfxHssl_Hssl_AccessWindow
structure for access windows More...
struct | IfxHssl_Hssl
HSSL Handle. More...
struct | IfxHssl_Hssl_Channel
channel handle More...
struct | IfxHssl_Hssl_ChannelConfig
configuration structure for channel More...
struct | IfxHssl_Hssl_Config
configuration structure of the HSSL module More...

Detailed Description

Data Structure Documentation

◆ IfxHssl_Hssl_AccessWindow

struct IfxHssl_Hssl_AccessWindow

structure for access windows

Definition at line 500 of file IfxHssl_Hssl.h.

Data Fields
uint32 | end | end of the access
uint32 | start | start of the access

◆ IfxHssl_Hssl

struct IfxHssl_Hssl

HSSL Handle.

Definition at line 527 of file IfxHssl_Hssl.h.

Collaboration diagram for IfxHssl_Hssl:
[legend]
Data Fields
IfxHssl_Hssl_errorFlags | errorFlags | structure for error flags
Ifx_HSSL * | hssl | pointer to HSSL register
boolean | loopBack | loop back (enable / disable) for streaming transfers within the microcontroller

◆ IfxHssl_Hssl_Channel

struct IfxHssl_Hssl_Channel

channel handle

Definition at line 536 of file IfxHssl_Hssl.h.

Data Fields
IfxHssl_ChannelId | channelId | channel number (id)
IfxHssl_Hssl_FrameRequest | currentFrameRequest | current frame request
Ifx_HSCT * | hsct | pointer to HSCT registers
Ifx_HSSL * | hssl | pointer to HSSL registers
boolean | loopBack | loopback (enable / disable) for streaming transfers within the microcontroller
IfxHssl_StreamingMode | streamingMode | streaming mode selection ( single / continuous )
boolean | streamingModeOn | streaming mode or command mode

◆ IfxHssl_Hssl_ChannelConfig

struct IfxHssl_Hssl_ChannelConfig

configuration structure for channel

Definition at line 549 of file IfxHssl_Hssl.h.

Data Fields
IfxHssl_ChannelId | channelId | channel number (id)
Ifx_HSCT * | hsct | pointer to HSCT registers
Ifx_HSSL * | hssl | pointer to HSSL registers
boolean | loopBack | loop back (enable / disable) for streaming transfers within the microcontroller
IfxHssl_StreamingMode | streamingMode | streaming mode selection ( single / continuous )

◆ IfxHssl_Hssl_Config

struct IfxHssl_Hssl_Config

configuration structure of the HSSL module

Definition at line 560 of file IfxHssl_Hssl.h.

Collaboration diagram for IfxHssl_Hssl_Config:
[legend]
Data Fields
IfxHssl_Hssl_AccessWindow | accessWindow0 | access window of channel 0
IfxHssl_Hssl_AccessWindow | accessWindow1 | access window of channel 1
IfxHssl_Hssl_AccessWindow | accessWindow2 | access window of channel 2
IfxHssl_Hssl_AccessWindow | accessWindow3 | access window of channel 3
Ifx_HSSL * | hssl | pointer to HSSL registers
uint16 | preDivider | Defines the down-scaled module clock to be used by all channel timeout timers.


iLLD_TC38A: Enumerations

Enumerations
Enumerations
iLLD » HSSL » HSSL
Collaboration diagram for Enumerations:

Enumerations

enum IfxHssl_Hssl_FrameRequest {
IfxHssl_Hssl_FrameRequest_readFrame = 1,
IfxHssl_Hssl_FrameRequest_writeFrame = 2,
IfxHssl_Hssl_FrameRequest_triggerFrame = 3,
IfxHssl_Hssl_FrameRequest_readId = 4,
IfxHssl_Hssl_FrameRequest_noAction = 5
}
frame request selection More...
enum IfxHssl_Hssl_Status {
IfxHssl_Hssl_Status_ok = 0,
IfxHssl_Hssl_Status_busy = 1,
IfxHssl_Hssl_Status_error = 2
}
module status More...

Detailed Description

Enumeration Type Documentation

◆ IfxHssl_Hssl_FrameRequest

enum IfxHssl_Hssl_FrameRequest

frame request selection

Enumerator
IfxHssl_Hssl_FrameRequest_readFrame | read frame rquest
IfxHssl_Hssl_FrameRequest_writeFrame | write frame rquest
IfxHssl_Hssl_FrameRequest_triggerFrame | trigger frame rquest
IfxHssl_Hssl_FrameRequest_readId | read id request
IfxHssl_Hssl_FrameRequest_noAction | no action

Definition at line 472 of file IfxHssl_Hssl.h.

◆ IfxHssl_Hssl_Status

enum IfxHssl_Hssl_Status

module status

Enumerator
IfxHssl_Hssl_Status_ok | status ok
IfxHssl_Hssl_Status_busy | status busy
IfxHssl_Hssl_Status_error | status error

Definition at line 483 of file IfxHssl_Hssl.h.


iLLD_TC38A: Module Functions

Functions
Module Functions
iLLD » HSSL » HSSL
Collaboration diagram for Module Functions:

Functions

IFX_EXTERN void | IfxHssl_Hssl_initHsctModule (IfxHssl_Hsct *hsct, const IfxHssl_Hsct_Config *config)
Initialises the module. More...
IFX_EXTERN void | IfxHssl_Hssl_initHsctModuleConfig (IfxHssl_Hsct_Config *config, Ifx_HSCT *hsct)
Fills the config structure with default values. More...
IFX_EXTERN void | IfxHssl_Hssl_initHsslModule (IfxHssl_Hssl *hssl, const IfxHssl_Hssl_Config *config)
Initialises the Hssl module. More...
IFX_EXTERN void | IfxHssl_Hssl_initHsslModuleConfig (IfxHssl_Hssl_Config *config, Ifx_HSSL *hssl)
Fills the config structure with default values. More...

Detailed Description

Function Documentation

◆ IfxHssl_Hssl_initHsctModule()

IFX_EXTERN void IfxHssl_Hssl_initHsctModule | ( | IfxHssl_Hsct * | hsct,
 |  | const IfxHssl_Hsct_Config * | config
 | ) |  |

Initialises the module.

Parameters
hsct | HSCT Handle
config | configuration structure of the HSCT module
Returns
None

A coding example can be found in How to use the HSSL Interface driver?

Definition at line 157 of file IfxHssl_Hssl.c.

◆ IfxHssl_Hssl_initHsctModuleConfig()

IFX_EXTERN void IfxHssl_Hssl_initHsctModuleConfig | ( | IfxHssl_Hsct_Config * | config,
 |  | Ifx_HSCT * | hsct
 | ) |  |

Fills the config structure with default values.

Parameters
config | configuration structure of the HSCT module
hsct | pointer to HSCT register
Returns
None

A coding example can be found in How to use the HSSL Interface driver?

Definition at line 266 of file IfxHssl_Hssl.c.

◆ IfxHssl_Hssl_initHsslModule()

IFX_EXTERN void IfxHssl_Hssl_initHsslModule | ( | IfxHssl_Hssl * | hssl,
 |  | const IfxHssl_Hssl_Config * | config
 | ) |  |

Initialises the Hssl module.

Parameters
hssl | HSSL handle
config | configuration structure of the module
Returns
None

A coding example can be found in How to use the HSSL Interface driver?

Definition at line 280 of file IfxHssl_Hssl.c.

◆ IfxHssl_Hssl_initHsslModuleConfig()

IFX_EXTERN void IfxHssl_Hssl_initHsslModuleConfig | ( | IfxHssl_Hssl_Config * | config,
 |  | Ifx_HSSL * | hssl
 | ) |  |

Fills the config structure with default values.

Parameters
config | configuration structure of the module
hssl | pointer to HSSL registers
Returns
None

A coding example can be found in How to use the HSSL Interface driver?

Definition at line 311 of file IfxHssl_Hssl.c.


iLLD_TC38A: Channel Functions

Functions
Channel Functions
iLLD » HSSL » HSSL
Collaboration diagram for Channel Functions:

Functions

IFX_EXTERN void | IfxHssl_Hssl_initChannel (IfxHssl_Hssl_Channel *channel, const IfxHssl_Hssl_ChannelConfig *channelConfig)
Initialises the channel. More...
IFX_EXTERN void | IfxHssl_Hssl_initChannelConfig (IfxHssl_Hssl_ChannelConfig *channelConfig, IfxHssl_Hssl *hssl, IfxHssl_Hsct *hsct)
Fills the channel config structure with default values. More...

Detailed Description

Function Documentation

◆ IfxHssl_Hssl_initChannel()

IFX_EXTERN void IfxHssl_Hssl_initChannel | ( | IfxHssl_Hssl_Channel * | channel,
 |  | const IfxHssl_Hssl_ChannelConfig * | channelConfig
 | ) |  |

Initialises the channel.

Parameters
channel | channel handle
channelConfig | configuration structure for channel
Returns
None

A coding example can be found in How to use the HSSL Interface driver?

Definition at line 131 of file IfxHssl_Hssl.c.

◆ IfxHssl_Hssl_initChannelConfig()

IFX_EXTERN void IfxHssl_Hssl_initChannelConfig | ( | IfxHssl_Hssl_ChannelConfig * | channelConfig,
 |  | IfxHssl_Hssl * | hssl,
 |  | IfxHssl_Hsct * | hsct
 | ) |  |

Fills the channel config structure with default values.

Parameters
channelConfig | configuration structure for channel
hssl | HSSL Handle
hsct | HSCT Handle
Returns
None

A coding example can be found in How to use the HSSL Interface driver?

Definition at line 145 of file IfxHssl_Hssl.c.


iLLD_TC38A: Simple Communication

Functions
Simple Communication
iLLD » HSSL » HSSL
Collaboration diagram for Simple Communication:

Functions

IFX_INLINE uint32 | IfxHssl_Hssl_getReadData (IfxHssl_Hssl_Channel *channel)
reads and returs the data More...
IFX_EXTERN IfxHssl_Hssl_Status | IfxHssl_Hssl_read (IfxHssl_Hssl_Channel *channel, uint32 address, IfxHssl_DataLength dataLength)
Initiates read request. More...
IFX_EXTERN void | IfxHssl_Hssl_sendControlCommand (IfxHssl_Hsct *hsct, uint8 command)
sends a predefined command from master to slave More...
IFX_EXTERN IfxHssl_Hssl_Status | IfxHssl_Hssl_singleFrameRequest (IfxHssl_Hssl_Channel *channel, IfxHssl_Hssl_FrameRequest frameRequest, uint32 address, uint32 data, IfxHssl_DataLength dataLength)
serves the frame request (read, write, trigger frame and read id) More...
IFX_EXTERN IfxHssl_Hssl_Status | IfxHssl_Hssl_waitAcknowledge (IfxHssl_Hssl_Channel *channel)
waits until the current transaction is done More...
IFX_EXTERN IfxHssl_Hssl_Status | IfxHssl_Hssl_write (IfxHssl_Hssl_Channel *channel, uint32 address, uint32 data, IfxHssl_DataLength dataLength)
writes single frame of data into the specified address More...

Detailed Description

Function Documentation

◆ IfxHssl_Hssl_getReadData()

IFX_INLINE uint32 IfxHssl_Hssl_getReadData ( IfxHssl_Hssl_Channel * channel )

reads and returs the data

Parameters
channel channel handle
Returns
data

A coding example can be found in How to use the HSSL Interface driver?

Definition at line 793 of file IfxHssl_Hssl.h.

Referenced by IfxHssl_Hssl_prepareStream().

◆ IfxHssl_Hssl_read()

IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_read | ( | IfxHssl_Hssl_Channel * | channel,
 |  | uint32 | address,
 |  | IfxHssl_DataLength | dataLength
 | ) |  |

Initiates read request.

Parameters
channel | channel handle
address | address of the location from where the data is to be read
dataLength | length of the data
Returns
module status (ok, busy, error)

A coding example can be found in How to use the HSSL Interface driver?

Definition at line 445 of file IfxHssl_Hssl.c.

Referenced by IfxHssl_Hssl_prepareStream().

◆ IfxHssl_Hssl_sendControlCommand()

IFX_EXTERN void IfxHssl_Hssl_sendControlCommand | ( | IfxHssl_Hsct * | hsct,
 |  | uint8 | command
 | ) |  |

sends a predefined command from master to slave

Parameters
hsct | HSCT Handle
command | command value
Returns
None

Usage Example:

// enable slave Tx channel (Rx disable to Rx low peed)
IfxHssl_Hssl_sendControlCommand(&channel, IfxHssl_ControlCommand_enableReception);

Definition at line 452 of file IfxHssl_Hssl.c.

◆ IfxHssl_Hssl_singleFrameRequest()

IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_singleFrameRequest | ( | IfxHssl_Hssl_Channel * | channel,
 |  | IfxHssl_Hssl_FrameRequest | frameRequest,
 |  | uint32 | address,
 |  | uint32 | data,
 |  | IfxHssl_DataLength | dataLength
 | ) |  |

serves the frame request (read, write, trigger frame and read id)

Parameters
channel | channel handle
frameRequest | frame request
address | address of the location (to be written into / read from)
data | data to be written
dataLength | length of the data
Returns
module status (ok, busy, error)

Definition at line 463 of file IfxHssl_Hssl.c.

Referenced by IfxHssl_Hssl_prepareStream(), IfxHssl_Hssl_read(), and IfxHssl_Hssl_write().

◆ IfxHssl_Hssl_waitAcknowledge()

IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_waitAcknowledge ( IfxHssl_Hssl_Channel * channel )

waits until the current transaction is done

Parameters
channel channel handle
Returns
module status (ok, busy, error)

A coding example can be found in How to use the HSSL Interface driver?

Definition at line 506 of file IfxHssl_Hssl.c.

Referenced by IfxHssl_Hssl_prepareStream().

◆ IfxHssl_Hssl_write()

IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_write | ( | IfxHssl_Hssl_Channel * | channel,
 |  | uint32 | address,
 |  | uint32 | data,
 |  | IfxHssl_DataLength | dataLength
 | ) |  |

writes single frame of data into the specified address

Parameters
channel | channel handle
address | address of the location where the data is to be written
data | data that needs to be written
dataLength | length of the data (8, 16, 32 bit)
Returns
module status (ok, busy, error)

A coding example can be found in How to use the HSSL Interface driver?

Definition at line 565 of file IfxHssl_Hssl.c.


iLLD_TC38A: Error Handling

Functions
Error Handling
iLLD » HSSL » HSSL
Collaboration diagram for Error Handling:

Functions

IFX_EXTERN void | IfxHssl_Hssl_checkErrors (IfxHssl_Hssl *hssl)
stores the status of errors in the respective members of the error flags structure More...
IFX_EXTERN void | IfxHssl_Hssl_clearErrorFlags (IfxHssl_Hssl *hssl)
clears the status of members in the error flags structure More...
IFX_EXTERN void | IfxHssl_Hssl_delay (IfxHssl_Hsct *hsct)
a simple software delay More...

Detailed Description

Function Documentation

◆ IfxHssl_Hssl_checkErrors()

IFX_EXTERN void IfxHssl_Hssl_checkErrors ( IfxHssl_Hssl * hssl )

stores the status of errors in the respective members of the error flags structure

Parameters
hssl HSSL Handle
Returns
None

Definition at line 53 of file IfxHssl_Hssl.c.

◆ IfxHssl_Hssl_clearErrorFlags()

IFX_EXTERN void IfxHssl_Hssl_clearErrorFlags ( IfxHssl_Hssl * hssl )

clears the status of members in the error flags structure

Parameters
hssl HSSL Handle
Returns
None

Definition at line 105 of file IfxHssl_Hssl.c.

◆ IfxHssl_Hssl_delay()

IFX_EXTERN void IfxHssl_Hssl_delay ( IfxHssl_Hsct * hsct )

a simple software delay

Parameters
hsct HSCT Handle
Returns
None

Definition at line 119 of file IfxHssl_Hssl.c.

Referenced by IfxHssl_Hssl_sendControlCommand().


iLLD_TC38A: Streaming Communication

Functions
Streaming Communication
iLLD » HSSL » HSSL
Collaboration diagram for Streaming Communication:

Functions

IFX_EXTERN IfxHssl_Hssl_Status | IfxHssl_Hssl_prepareStream (IfxHssl_Hssl_Channel *channel, uint32 slaveTargetAddress, Ifx_SizeT count)
Prepares the target device for streaming. More...
IFX_EXTERN IfxHssl_Hssl_Status | IfxHssl_Hssl_writeStream (IfxHssl_Hssl *hssl, uint32 *data, Ifx_SizeT count)
transfers one memory block of data useful for transfering huge data from one location to another and between devices. NOTE: This function should be called only for IfxHssl_ChannelId_2 More...

Detailed Description

Function Documentation

◆ IfxHssl_Hssl_prepareStream()

IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_prepareStream | ( | IfxHssl_Hssl_Channel * | channel,
 |  | uint32 | slaveTargetAddress,
 |  | Ifx_SizeT | count
 | ) |  |

Prepares the target device for streaming.

Parameters
channel | channel handle
slaveTargetAddress | address of the location on target device where the data needs to be transfered
count | Frame count (length of the data in the memory as 256 bytes per frame)
Returns
module status (ok, busy, error)

A coding example can be found in How to use the HSSL Interface driver?

Definition at line 330 of file IfxHssl_Hssl.c.

◆ IfxHssl_Hssl_writeStream()

IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_writeStream | ( | IfxHssl_Hssl * | hssl,
 |  | uint32 * | data,
 |  | Ifx_SizeT | count
 | ) |  |

transfers one memory block of data useful for transfering huge data from one location to another and between devices. NOTE: This function should be called only for IfxHssl_ChannelId_2

Parameters
hssl | HSSL handle
data | starting address of the location to be read from (memory block 0 / HSSL_ISSA0)
count | Frame count (length of the data in the memory as 256 bytes per frame)
Returns
module status (ok, busy, error)

A coding example can be found in How to use the HSSL Interface driver?

Definition at line 571 of file IfxHssl_Hssl.c.


iLLD_TC38A: IfxHssl_cfg.h File Reference

  • _Impl
Macros | Enumerations | Variables
IfxHssl_cfg.h File Reference
iLLD » HSSL

HSSL on-chip implementation data. More...

#include "Cpu/Std/Ifx_Types.h"
#include "IfxHssl_reg.h"
#include "IfxHsct_reg.h"
Include dependency graph for IfxHssl_cfg.h:

Go to the source code of this file.

Macros

#define | IFXHSSL_NUM_CHANNELS 4
#define | IFXHSSL_NUM_MODULES 1
#define | IFXHSSL_JTAG_ID_ADDRESS (0xF0000464u)

Enumerations

enum IfxHssl_hsctIndex {
IfxHssl_hsctIndex_none = -1,
IfxHssl_hsctIndex_0 = 0
}
List of the available Hsct resources. More...
enum IfxHssl_hsslIndex {
IfxHssl_hsslIndex_none = -1,
IfxHssl_hsslIndex_0 = 0
}
List of the available Hssl resources. More...

Variables

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsctIndexMap [IFXHSSL_NUM_MODULES]
IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsslIndexMap [IFXHSSL_NUM_MODULES]

Detailed Description

HSSL on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxHssl_cfg.h.

Macro Definition Documentation

◆ IFXHSSL_JTAG_ID_ADDRESS

#define IFXHSSL_JTAG_ID_ADDRESS (0xF0000464u)

Definition at line 70 of file IfxHssl_cfg.h.

Referenced by IfxHssl_Hssl_initHsslModule().

◆ IFXHSSL_NUM_CHANNELS

#define IFXHSSL_NUM_CHANNELS 4

Definition at line 66 of file IfxHssl_cfg.h.

◆ IFXHSSL_NUM_MODULES

#define IFXHSSL_NUM_MODULES 1

Definition at line 68 of file IfxHssl_cfg.h.

Referenced by IfxHssl_getHsctAddress(), IfxHssl_getHsctIndex(), IfxHssl_getHsslAddress(), and IfxHssl_getHsslIndex().


iLLD_TC38A: IfxHssl_Hssl.h File Reference

  • Hssl
  • Hssl
Data Structures | Enumerations | Functions
IfxHssl_Hssl.h File Reference
iLLD » HSSL

HSSL HSSL details. More...

#include "Hssl/Std/IfxHssl.h"
#include "Port/Std/IfxPort.h"
Include dependency graph for IfxHssl_Hssl.h:

Go to the source code of this file.

Data Structures

struct | IfxHssl_Hssl_AccessWindow
structure for access windows More...
struct | IfxHssl_Hssl_errorFlags
structure for error flags More...
struct | IfxHssl_Hssl
HSSL Handle. More...
struct | IfxHssl_Hssl_Channel
channel handle More...
struct | IfxHssl_Hssl_ChannelConfig
configuration structure for channel More...
struct | IfxHssl_Hssl_Config
configuration structure of the HSSL module More...

Enumerations

enum IfxHssl_Hssl_FrameRequest {
IfxHssl_Hssl_FrameRequest_readFrame = 1,
IfxHssl_Hssl_FrameRequest_writeFrame = 2,
IfxHssl_Hssl_FrameRequest_triggerFrame = 3,
IfxHssl_Hssl_FrameRequest_readId = 4,
IfxHssl_Hssl_FrameRequest_noAction = 5
}
frame request selection More...
enum IfxHssl_Hssl_Status {
IfxHssl_Hssl_Status_ok = 0,
IfxHssl_Hssl_Status_busy = 1,
IfxHssl_Hssl_Status_error = 2
}
module status More...

Functions

IFX_EXTERN void | IfxHssl_Hssl_initHsctModule (IfxHssl_Hsct *hsct, const IfxHssl_Hsct_Config *config)
Initialises the module. More...
IFX_EXTERN void | IfxHssl_Hssl_initHsctModuleConfig (IfxHssl_Hsct_Config *config, Ifx_HSCT *hsct)
Fills the config structure with default values. More...
IFX_EXTERN void | IfxHssl_Hssl_initHsslModule (IfxHssl_Hssl *hssl, const IfxHssl_Hssl_Config *config)
Initialises the Hssl module. More...
IFX_EXTERN void | IfxHssl_Hssl_initHsslModuleConfig (IfxHssl_Hssl_Config *config, Ifx_HSSL *hssl)
Fills the config structure with default values. More...
IFX_EXTERN void | IfxHssl_Hssl_initChannel (IfxHssl_Hssl_Channel *channel, const IfxHssl_Hssl_ChannelConfig *channelConfig)
Initialises the channel. More...
IFX_EXTERN void | IfxHssl_Hssl_initChannelConfig (IfxHssl_Hssl_ChannelConfig *channelConfig, IfxHssl_Hssl *hssl, IfxHssl_Hsct *hsct)
Fills the channel config structure with default values. More...
IFX_INLINE uint32 | IfxHssl_Hssl_getReadData (IfxHssl_Hssl_Channel *channel)
reads and returs the data More...
IFX_EXTERN IfxHssl_Hssl_Status | IfxHssl_Hssl_read (IfxHssl_Hssl_Channel *channel, uint32 address, IfxHssl_DataLength dataLength)
Initiates read request. More...
IFX_EXTERN void | IfxHssl_Hssl_sendControlCommand (IfxHssl_Hsct *hsct, uint8 command)
sends a predefined command from master to slave More...
IFX_EXTERN IfxHssl_Hssl_Status | IfxHssl_Hssl_singleFrameRequest (IfxHssl_Hssl_Channel *channel, IfxHssl_Hssl_FrameRequest frameRequest, uint32 address, uint32 data, IfxHssl_DataLength dataLength)
serves the frame request (read, write, trigger frame and read id) More...
IFX_EXTERN IfxHssl_Hssl_Status | IfxHssl_Hssl_waitAcknowledge (IfxHssl_Hssl_Channel *channel)
waits until the current transaction is done More...
IFX_EXTERN IfxHssl_Hssl_Status | IfxHssl_Hssl_write (IfxHssl_Hssl_Channel *channel, uint32 address, uint32 data, IfxHssl_DataLength dataLength)
writes single frame of data into the specified address More...
IFX_EXTERN void | IfxHssl_Hssl_checkErrors (IfxHssl_Hssl *hssl)
stores the status of errors in the respective members of the error flags structure More...
IFX_EXTERN void | IfxHssl_Hssl_clearErrorFlags (IfxHssl_Hssl *hssl)
clears the status of members in the error flags structure More...
IFX_EXTERN void | IfxHssl_Hssl_delay (IfxHssl_Hsct *hsct)
a simple software delay More...
IFX_EXTERN IfxHssl_Hssl_Status | IfxHssl_Hssl_prepareStream (IfxHssl_Hssl_Channel *channel, uint32 slaveTargetAddress, Ifx_SizeT count)
Prepares the target device for streaming. More...
IFX_EXTERN IfxHssl_Hssl_Status | IfxHssl_Hssl_writeStream (IfxHssl_Hssl *hssl, uint32 *data, Ifx_SizeT count)
transfers one memory block of data useful for transfering huge data from one location to another and between devices. NOTE: This function should be called only for IfxHssl_ChannelId_2 More...

Detailed Description

HSSL HSSL details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxHssl_Hssl.h.

Data Structure Documentation

◆ IfxHssl_Hssl_errorFlags

struct IfxHssl_Hssl_errorFlags

structure for error flags

Definition at line 510 of file IfxHssl_Hssl.h.

Data Fields
uint8 | busAccessError: 1 | SRI/SPB bus access error.
uint8 | channelNumberCodeError: 1 | PHY inconsistency error 1 (channel number code error)
uint8 | crcError: 1 | CRC error.
uint8 | dataLengthError: 1 | PHY inconsistency error 2 (data length error)
uint8 | memoryAccessViolation: 1 | memory access violation
uint8 | notAcknowledgeError: 1 | not acknowledge error / tag error
uint8 | timeoutError: 1 | timeout error
uint8 | transactionTagError: 1 | transaction tag error
uint8 | unexpectedError: 1 | unexpected type of frame error


iLLD_TC38A: IfxHssl.h File Reference

  • Hssl
  • Std
Data Structures | Enumerations | Functions
IfxHssl.h File Reference
iLLD » HSSL

HSSL basic functionality. More...

#include "_Impl/IfxHssl_cfg.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "Scu/Std/IfxScuWdt.h"
#include "IfxHssl_bf.h"
#include "IfxHsct_bf.h"
#include "Src/Std/IfxSrc.h"
Include dependency graph for IfxHssl.h:

Go to the source code of this file.

Data Structures

struct | IfxHssl_Hsct
HSCT module handle. More...
struct | IfxHssl_Hsct_Config
Configuration structure of the HSCT module. More...

Enumerations

enum IfxHssl_ChannelId {
IfxHssl_ChannelId_0,
IfxHssl_ChannelId_1,
IfxHssl_ChannelId_2,
IfxHssl_ChannelId_3
}
channel selection More...
enum IfxHssl_Command {
IfxHssl_Command_noAction = 0,
IfxHssl_Command_readFrame = 1,
IfxHssl_Command_writeFrame = 2,
IfxHssl_Command_triggerFrame = 3
}
communication command selection Definition in Ifx_HSSL.I.ICON.B.RWT More...
enum IfxHssl_ControlCommand {
IfxHssl_ControlCommand_ping = 0,
IfxHssl_ControlCommand_highSpeedClockStart = 2,
IfxHssl_ControlCommand_highSpeedClockStop = 4,
IfxHssl_ControlCommand_lowSpeedTransmission = 8,
IfxHssl_ControlCommand_highSpeedTransmission = 16,
IfxHssl_ControlCommand_lowSpeedReception = 32,
IfxHssl_ControlCommand_mediumSpeedReception = 64,
IfxHssl_ControlCommand_highSpeedReception = 128,
IfxHssl_ControlCommand_enableReception = 49,
IfxHssl_ControlCommand_disableReception = 50,
IfxHssl_ControlCommand_turnOnClockTestMode = 52,
IfxHssl_ControlCommand_turnOffClockTestMode = 56,
IfxHssl_ControlCommand_turnOnPayloadLoopback = 255
}
predefined control command payload values More...
enum IfxHssl_DataLength {
IfxHssl_DataLength_8bit = 0,
IfxHssl_DataLength_16bit = 1,
IfxHssl_DataLength_32bit = 2
}
Defines the length of the data in bits of the write and read command. Definition in Ifx_HSSL.I.ICON.B.DATLEN. More...
enum IfxHssl_Hsct_InterruptSource {
IfxHssl_Hsct_InterruptSource_headerError = IFX_HSCT_IRQ_HER_OFF,
IfxHssl_Hsct_InterruptSource_payloadError = IFX_HSCT_IRQ_PYER_OFF,
IfxHssl_Hsct_InterruptSource_commandError = IFX_HSCT_IRQ_CER_OFF,
IfxHssl_Hsct_InterruptSource_interfaceControlFrameSend = IFX_HSCT_IRQ_IFCFS_OFF,
IfxHssl_Hsct_InterruptSource_speedModeSwitchError = IFX_HSCT_IRQ_SMER_OFF,
IfxHssl_Hsct_InterruptSource_unsolicitedMessageSendFinished = IFX_HSCT_IRQ_USMSF_OFF,
IfxHssl_Hsct_InterruptSource_pllLockLosterror = IFX_HSCT_IRQ_PLER_OFF,
IfxHssl_Hsct_InterruptSource_UnsolicitedMessageReceived = IFX_HSCT_IRQ_USM_OFF,
IfxHssl_Hsct_InterruptSource_pingAnswerReceived = IFX_HSCT_IRQ_PAR_OFF,
IfxHssl_Hsct_InterruptSource_txTransferError = IFX_HSCT_IRQ_TXTE_OFF,
IfxHssl_Hsct_InterruptSource_synchronizationFifoOverflow = IFX_HSCT_IRQ_SFO_OFF,
IfxHssl_Hsct_InterruptSource_synchronizationFifoUnderflow = IFX_HSCT_IRQ_SFU_OFF
}
HSCT interrupt source Definition in Ifx_HSCT.IRQ. More...
enum IfxHssl_Hsct_SleepMode {
IfxHssl_Hsct_SleepMode_enable = 0,
IfxHssl_Hsct_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_HSCT.CLC.B.EDIS. More...
enum IfxHssl_Hssl_SleepMode {
IfxHssl_Hssl_SleepMode_enable = 0,
IfxHssl_Hssl_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_HSSL.CLC.B.EDIS. More...
enum IfxHssl_InterfaceMode {
IfxHssl_InterfaceMode_master = 0,
IfxHssl_InterfaceMode_slave = 1
}
interface mode (master IF /slave IF) Definition in Ifx_HSCT.INIT.B.IFM More...
enum IfxHssl_MasterModeRxSpeed {
IfxHssl_MasterModeRxSpeed_lowSpeed = 0,
IfxHssl_MasterModeRxSpeed_mediumSpeed = 1,
IfxHssl_MasterModeRxSpeed_highSpeed = 2
}
master mode receive speed Definition in Ifx_HSCT.IFCTRL.B.MRXSPEED More...
enum IfxHssl_MasterModeTxSpeed {
IfxHssl_MasterModeTxSpeed_lowSpeed = 0,
IfxHssl_MasterModeTxSpeed_highSpeed = 2
}
master mode transmit speed Definition in Ifx_HSCT.IFCTRL.B.MTXSPEED More...
enum IfxHssl_PllReferenceClock {
IfxHssl_PllReferenceClock_hsctSystemClockInput = 0,
IfxHssl_PllReferenceClock_oscillatorInput = 1
}
PLL reference clock Definition in Ifx_HSCT.CONFIGPHY.B.OSCCLKEN. More...
enum IfxHssl_RefClockFrequency {
IfxHssl_RefClockFrequency_10Mhz = 0,
IfxHssl_RefClockFrequency_20Mhz = 1,
IfxHssl_RefClockFrequency_40Mhz = 2
}
SysClk / Reference Clock Frequency rate Definition in Ifx_HSCT.INIT.B.SRCF. More...
enum IfxHssl_StreamingMode {
IfxHssl_StreamingMode_continuous = 0,
IfxHssl_StreamingMode_single = 1
}
streaming mode ( single / continuous ) Definition in Ifx_HSSL.CFG.B.SMT/SMR More...
enum IfxHssl_SuspendMode {
IfxHssl_SuspendMode_none = 0,
IfxHssl_SuspendMode_hard = 1,
IfxHssl_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxHssl_SysClockDivider {
IfxHssl_SysClockDivider_1 = 0,
IfxHssl_SysClockDivider_2 = 1,
IfxHssl_SysClockDivider_4 = 2
}
SysClk divider Definition in Ifx_HSCT.INIT.B.SSCF. More...
enum IfxHssl_Hssl_ERRInterruptSource {
IfxHssl_Hssl_ERRInterruptSource_notAcknowledgeError = IFX_HSSL_MFLAGS_NACK_OFF,
IfxHssl_Hssl_ERRInterruptSource_transactionTagError = IFX_HSSL_MFLAGS_TTE_OFF,
IfxHssl_Hssl_ERRInterruptSource_timeoutError = IFX_HSSL_MFLAGS_TIMEOUT_OFF,
IfxHssl_Hssl_ERRInterruptSource_unexpectedError = IFX_HSSL_MFLAGS_UNEXPECTED_OFF
}
HSSL channel error interrupt source, which triggers the ERR interrupt Definition in Ifx_HSSL.MFLAGS. More...
enum IfxHssl_Hssl_EXIInterruptSource {
IfxHssl_Hssl_EXIInterruptSource_memoryAccessViolation = IFX_HSSL_MFLAGS_MAV_OFF,
IfxHssl_Hssl_EXIInterruptSource_busAccessError = IFX_HSSL_MFLAGS_SRIE_OFF,
IfxHssl_Hssl_EXIInterruptSource_channelNumberCodeError = IFX_HSSL_MFLAGS_PIE1_OFF,
IfxHssl_Hssl_EXIInterruptSource_dataLengthError = IFX_HSSL_MFLAGS_PIE2_OFF,
IfxHssl_Hssl_EXIInterruptSource_crcError = IFX_HSSL_MFLAGS_CRCE_OFF
}
HSSL global error interrupt source, which triggers the EXI interrupt Definition in Ifx_HSSL.MFLAGS. More...

Functions

IFX_INLINE void | IfxHssl_clearHsctInterruptFlag (Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source)
Clears the HSCT interrupt flag. More...
IFX_INLINE void | IfxHssl_disableHsctInterruptFlag (Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source)
Enables HSCT interrupt flag. More...
IFX_INLINE void | IfxHssl_enableHsctInterrupt (Ifx_HSCT *hsct, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSCT interrupt. More...
IFX_INLINE void | IfxHssl_enableHsctInterruptFlag (Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source)
Enables HSCT interrupt flag. More...
IFX_INLINE void | IfxHssl_enableHsctLvdsLoopback (Ifx_HSCT *hsct)
Enables HSCT LVDS loopback. More...
IFX_INLINE boolean | IfxHssl_getHsctInterruptFlagStatus (Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source)
Returns the HSCT interrupt flag status. More...
IFX_INLINE void | IfxHssl_setHsctSleepMode (Ifx_HSCT *hsct, IfxHssl_Hsct_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE uint32 | IfxHssl_getHsctUnsolicitedStatusMessage (Ifx_HSCT *hsct)
Get the last received unsolicited status message. More...
IFX_INLINE void | IfxHssl_sendHsctUnsolicitedStatusMessage (Ifx_HSCT *hsct, uint32 message)
Send the unsolicited status message. More...
IFX_INLINE void | IfxHssl_setHsctRxLinkSpeed (Ifx_HSCT *hsct, IfxHssl_MasterModeRxSpeed rxSpeed)
Set the HSCT RX link speed. More...
IFX_INLINE void | IfxHssl_setHsctTxLinkSpeed (Ifx_HSCT *hsct, IfxHssl_MasterModeTxSpeed txSpeed)
Set the HSCT TX link speed. More...
IFX_INLINE void | IfxHssl_enableHsctTransmitPath (Ifx_HSCT *hsct)
Enable hsct transmit path in master interface. More...
IFX_INLINE void | IfxHssl_enableHsctReceivePath (Ifx_HSCT *hsct)
Enable hsct receive path in master interface. More...
IFX_INLINE void | IfxHssl_disableHsctTransmitPath (Ifx_HSCT *hsct)
Disable hsct transmit path in master interface. More...
IFX_INLINE void | IfxHssl_disableHsctReceivePath (Ifx_HSCT *hsct)
Disable hsct receive path in master interface. More...
IFX_EXTERN void | IfxHssl_disableHsctModule (Ifx_HSCT *hsct)
Disables hsct module. More...
IFX_EXTERN void | IfxHssl_enableHsctModule (Ifx_HSCT *hsct)
Enables hsct module. More...
IFX_EXTERN Ifx_HSCT * | IfxHssl_getHsctAddress (IfxHssl_hsctIndex hsct)
IFX_EXTERN IfxHssl_hsctIndex | IfxHssl_getHsctIndex (Ifx_HSCT *hsct)
API to get the resource index of the HSCT specified. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxHssl_getHsctSrcPointer (Ifx_HSCT *hsct)
Returns the SRC pointer for HSCT. More...
IFX_EXTERN void | IfxHssl_resetHsctKernel (Ifx_HSCT *hsct)
resets HSCT kernel More...
IFX_INLINE void | IfxHssl_clearHsslChannelErrorInterruptFlag (Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId)
Clears the HSSl channel error interrupt flag. More...
IFX_INLINE void | IfxHssl_clearHsslGlobalErrorInterruptFlag (Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source)
Clears the HSSl global error interrupt flag. More...
IFX_INLINE void | IfxHssl_clearInitialiseModeFlag (Ifx_HSSL *hssl)
Clears the Initialise Mode Flag status. More...
IFX_INLINE void | IfxHssl_disableHsslChannelErrorInterruptFlag (Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId)
Enables the HSSl channel error interrupt flag, which trggers the ERR interrupt. More...
IFX_INLINE void | IfxHssl_disableHsslGlobalErrorInterruptFlag (Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source)
Disables the HSSl channel error interrupt flag, which trggers the EXI interrupt. More...
IFX_INLINE void | IfxHssl_enableAllErrorFlags (Ifx_HSSL *hssl)
Enables all error flags. More...
IFX_INLINE void | IfxHssl_enableHsslCOKInterrupt (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSSL COK interrupt of specified channel. More...
IFX_INLINE void | IfxHssl_enableHsslChannelErrorInterruptFlag (Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId)
Enables the HSSl channel error interrupt flag, which trggers the ERR interrupt. More...
IFX_INLINE void | IfxHssl_enableHsslERRInterrupt (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSSL ERR interrupt of specified channel. More...
IFX_INLINE void | IfxHssl_enableHsslEXIInterrupt (Ifx_HSSL *hssl, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSSL EXI interrupt of specified channel. More...
IFX_INLINE void | IfxHssl_enableHsslGlobalErrorInterruptFlag (Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source)
Enables the HSSl global error interrupt flag, which trggers the EXI interrupt. More...
IFX_INLINE void | IfxHssl_enableHsslRDIInterrupt (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSSL RDI interrupt of specified channel. More...
IFX_INLINE void | IfxHssl_enableHsslTRGInterrupt (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSSL TRG interrupt of specified channel. More...
IFX_INLINE uint32 | IfxHssl_getAllMflagsStatus (Ifx_HSSL *hssl)
Returns the status of all MFLAGS status. More...
IFX_INLINE uint16 | IfxHssl_getCurrentCount (Ifx_HSSL *hssl)
Returns the Current Count value. More...
IFX_INLINE boolean | IfxHssl_getHsslChannelErrorInterruptFlagStatus (Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId)
Clears the HSSl channel error interrupt flag. More...
IFX_INLINE boolean | IfxHssl_getHsslGloabalErrorInterruptFlagStatus (Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source)
Clears the HSSl global error interrupt flag. More...
IFX_INLINE boolean | IfxHssl_getInitialiseModeFlagStatus (Ifx_HSSL *hssl)
Returns the Initialise Mode Flag status. More...
IFX_INLINE uint16 | IfxHssl_getReloadCount (Ifx_HSSL *hssl)
Returns the Reload Count value. More...
IFX_INLINE boolean | IfxHssl_isModuleSuspended (Ifx_HSSL *hssl)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxHssl_setHsslSleepMode (Ifx_HSSL *hssl, IfxHssl_Hssl_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxHssl_setInitialiseModeFlag (Ifx_HSSL *hssl)
Sets the Initialise Mode Flag. More...
IFX_INLINE void | IfxHssl_setReloadCount (Ifx_HSSL *hssl, uint16 reloadValue)
Sets the reload Count. More...
IFX_INLINE void | IfxHssl_setSuspendMode (Ifx_HSSL *hssl, IfxHssl_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_INLINE void | IfxHssl_setTimeoutReloadValue (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, uint8 timeoutValue)
Sets the Timeout Reload Value. More...
IFX_EXTERN void | IfxHssl_disableHsslModule (Ifx_HSSL *hssl)
DIsables the hssl module. More...
IFX_EXTERN void | IfxHssl_enableHsslModule (Ifx_HSSL *hssl)
Enables the hssl module. More...
IFX_EXTERN Ifx_HSSL * | IfxHssl_getHsslAddress (IfxHssl_hsslIndex hssl)
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxHssl_getHsslCOKSrcPointer (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL COK of specified channel. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxHssl_getHsslERRSrcPointer (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL ERR of specified channel. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxHssl_getHsslEXISrcPointer (Ifx_HSSL *hssl)
Returns the SRC pointer for HSSL EXI interrupt. More...
IFX_EXTERN IfxHssl_hsslIndex | IfxHssl_getHsslIndex (Ifx_HSSL *hssl)
API to get the resource index of the HSSL specified. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxHssl_getHsslRDISrcPointer (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL COK of specified channel. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxHssl_getHsslTRGSrcPointer (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL TRG of specified channel. More...
IFX_EXTERN void | IfxHssl_resetHsslKernel (Ifx_HSSL *hssl)
resets the HSSL kernel More...

Detailed Description

HSSL basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxHssl.h.

Enumeration Type Documentation

◆ IfxHssl_Hssl_ERRInterruptSource

enum IfxHssl_Hssl_ERRInterruptSource

HSSL channel error interrupt source, which triggers the ERR interrupt Definition in Ifx_HSSL.MFLAGS.

Enumerator
IfxHssl_Hssl_ERRInterruptSource_notAcknowledgeError | NACK error (triggers ERR interrupt)
IfxHssl_Hssl_ERRInterruptSource_transactionTagError | Transaction Tag Error (triggers ERR interrupt)
IfxHssl_Hssl_ERRInterruptSource_timeoutError | Timeout error (triggers ERR interrupt)
IfxHssl_Hssl_ERRInterruptSource_unexpectedError | Unexpected error (triggers ERR interrupt)

Definition at line 242 of file IfxHssl.h.

◆ IfxHssl_Hssl_EXIInterruptSource

enum IfxHssl_Hssl_EXIInterruptSource

HSSL global error interrupt source, which triggers the EXI interrupt Definition in Ifx_HSSL.MFLAGS.

Enumerator
IfxHssl_Hssl_EXIInterruptSource_memoryAccessViolation | Memory Access Violation error (triggers EXI interrupt)
IfxHssl_Hssl_EXIInterruptSource_busAccessError | SRI/SPB Bus Access Error (triggers EXI interrupt)
IfxHssl_Hssl_EXIInterruptSource_channelNumberCodeError | PHY Inconsistency Error 1 (Channel Number Code Error, triggers EXI interrupt)
IfxHssl_Hssl_EXIInterruptSource_dataLengthError | PHY Inconsistency Error 2 (Data Length Error, triggers EXI interrupt)
IfxHssl_Hssl_EXIInterruptSource_crcError | CRC error (triggers EXI interrupt)

Definition at line 253 of file IfxHssl.h.


iLLD_TC38A: I2C

Modules | Files
I2C
iLLD
Collaboration diagram for I2C:

Modules

Implementation
Standard Driver
I2C Pin Mapping
How to use the I2c driver?
I2C

Files

file | IfxI2c_cfg.h
I2C on-chip implementation data.
file | IfxI2c_PinMap.c
I2C I/O map.
file | IfxI2c_PinMap.h
I2C I/O map.
file | IfxI2c_I2c.h
I2C I2C details.
file | IfxI2c.h
I2C basic functionality.

Detailed Description


iLLD_TC38A: Implementation

Modules
Implementation
iLLD » I2C
Collaboration diagram for Implementation:

Modules

Enumerations

Detailed Description


iLLD_TC38A: Enumerations

Enumerations | Variables
Enumerations
iLLD » I2C » Implementation
Collaboration diagram for Enumerations:

Enumerations

enum IfxI2c_Index {
IfxI2c_Index_none = -1,
IfxI2c_Index_0 = 0,
IfxI2c_Index_1
}
List of the available I2c interfaces. More...

Variables

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxI2c_cfg_indexMap [IFXI2C_NUM_MODULES]

Detailed Description

Enumeration Type Documentation

◆ IfxI2c_Index

enum IfxI2c_Index

List of the available I2c interfaces.

Enumerator
IfxI2c_Index_none | Not Selected.
IfxI2c_Index_0 | I2C Index 0.
IfxI2c_Index_1 | I2C Index 1.

Definition at line 77 of file IfxI2c_cfg.h.

Variable Documentation

◆ IfxI2c_cfg_indexMap

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxI2c_cfg_indexMap[IFXI2C_NUM_MODULES]

Definition at line 92 of file IfxI2c_cfg.h.


iLLD_TC38A: Standard Driver

Modules
Standard Driver
iLLD » I2C
Collaboration diagram for Standard Driver:

Modules

Enumerations
Functions
Data Structures

Detailed Description


iLLD_TC38A: Enumerations

Enumerations
Enumerations
iLLD » I2C » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxI2c_AddressMode {
IfxI2c_AddressMode_7Bit = 0,
IfxI2c_AddressMode_10Bit = 1
}
Selects width of address bits (7 or 10 bits) Definition in Ifx_I2C.ADDRCFG.B.TBAM. More...
enum IfxI2c_BusStatus {
IfxI2c_BusStatus_idle = 0,
IfxI2c_BusStatus_started = 1,
IfxI2c_BusStatus_busyMaster = 2,
IfxI2c_BusStatus_remoteSlave = 3
}
enum IfxI2c_DtrInterruptSource {
IfxI2c_DtrInterruptSource_lastSingleRequest = IFX_I2C_IMSC_LSREQ_INT_OFF,
IfxI2c_DtrInterruptSource_singleRequest = IFX_I2C_IMSC_SREQ_INT_OFF,
IfxI2c_DtrInterruptSource_lastBurstRequest = IFX_I2C_IMSC_LBREQ_INT_OFF,
IfxI2c_DtrInterruptSource_burstRequest = IFX_I2C_IMSC_BREQ_INT_OFF
}
enables DTR interrupt flags Definition in Ifx.I2C.IMSC.U More...
enum IfxI2c_ErrorInterruptSource {
IfxI2c_ErrorInterruptSource_rxFifoUnderflow = IFX_I2C_ERRIRQSM_RXF_UFL_OFF,
IfxI2c_ErrorInterruptSource_rxFifoOverflow = IFX_I2C_ERRIRQSM_RXF_OFL_OFF,
IfxI2c_ErrorInterruptSource_txFifoUnderflow = IFX_I2C_ERRIRQSM_TXF_UFL_OFF,
IfxI2c_ErrorInterruptSource_txFifoOverflow = IFX_I2C_ERRIRQSM_TXF_OFL_OFF
}
enable error interrupt request source Definition in Ifx.I2C.ERRIRQSM.U More...
enum IfxI2c_Mode {
IfxI2c_Mode_StandardAndFast = 0,
IfxI2c_Mode_HighSpeed = 1
}
Select speed mode. Standard and Fast or High Speed mode. More...
enum IfxI2c_PinSelect {
IfxI2c_PinSelect_a = 0,
IfxI2c_PinSelect_b = 1,
IfxI2c_PinSelect_c = 2,
IfxI2c_PinSelect_d = 3,
IfxI2c_PinSelect_e = 4,
IfxI2c_PinSelect_f = 5,
IfxI2c_PinSelect_g = 6,
IfxI2c_PinSelect_h = 7
}
enum IfxI2c_ProtocolInterruptSource {
IfxI2c_ProtocolInterruptSource_addressMatch = IFX_I2C_PIRQSM_AM_OFF,
IfxI2c_ProtocolInterruptSource_generalCall = IFX_I2C_PIRQSM_GC_OFF,
IfxI2c_ProtocolInterruptSource_masterCode = IFX_I2C_PIRQSM_MC_OFF,
IfxI2c_ProtocolInterruptSource_arbitrationLost = IFX_I2C_PIRQSM_AL_OFF,
IfxI2c_ProtocolInterruptSource_notAcknowledgeReceived = IFX_I2C_PIRQSM_NACK_OFF,
IfxI2c_ProtocolInterruptSource_transmissionEnd = IFX_I2C_PIRQSM_TX_END_OFF,
IfxI2c_ProtocolInterruptSource_receiveMode = IFX_I2C_PIRQSM_RX_OFF
}
enable protocol interrupt source Definition in Ifx.I2C.PIRQSM.U More...
enum IfxI2c_SleepMode {
IfxI2c_SleepMode_enable = 0,
IfxI2c_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_I2C.CLC1.B.EDIS. More...

Detailed Description

Enumeration Type Documentation

◆ IfxI2c_AddressMode

enum IfxI2c_AddressMode

Selects width of address bits (7 or 10 bits) Definition in Ifx_I2C.ADDRCFG.B.TBAM.

Enumerator
IfxI2c_AddressMode_7Bit | sets 7 bit address
IfxI2c_AddressMode_10Bit | sets 10 bit address

Definition at line 80 of file IfxI2c.h.

◆ IfxI2c_BusStatus

enum IfxI2c_BusStatus
Enumerator
IfxI2c_BusStatus_idle | idle
IfxI2c_BusStatus_started | started
IfxI2c_BusStatus_busyMaster | busy Master
IfxI2c_BusStatus_remoteSlave | remote Slave

Definition at line 86 of file IfxI2c.h.

◆ IfxI2c_DtrInterruptSource

enum IfxI2c_DtrInterruptSource

enables DTR interrupt flags Definition in Ifx.I2C.IMSC.U

Enumerator
IfxI2c_DtrInterruptSource_lastSingleRequest | last single service request
IfxI2c_DtrInterruptSource_singleRequest | single service request
IfxI2c_DtrInterruptSource_lastBurstRequest | last burst service request
IfxI2c_DtrInterruptSource_burstRequest | burst service request

Definition at line 97 of file IfxI2c.h.

◆ IfxI2c_ErrorInterruptSource

enum IfxI2c_ErrorInterruptSource

enable error interrupt request source Definition in Ifx.I2C.ERRIRQSM.U

Enumerator
IfxI2c_ErrorInterruptSource_rxFifoUnderflow | receive fifo underflow service request
IfxI2c_ErrorInterruptSource_rxFifoOverflow | receive fifo overflow service request
IfxI2c_ErrorInterruptSource_txFifoUnderflow | transmit fifo underflow service request
IfxI2c_ErrorInterruptSource_txFifoOverflow | transmit fifo overflow service request

Definition at line 108 of file IfxI2c.h.

◆ IfxI2c_Mode

enum IfxI2c_Mode

Select speed mode. Standard and Fast or High Speed mode.

Enumerator
IfxI2c_Mode_StandardAndFast | Sets Standard and Fast speed mode.
IfxI2c_Mode_HighSpeed | Sets HighSpeed Mode.

Definition at line 118 of file IfxI2c.h.

◆ IfxI2c_PinSelect

enum IfxI2c_PinSelect
Enumerator
IfxI2c_PinSelect_a
IfxI2c_PinSelect_b
IfxI2c_PinSelect_c
IfxI2c_PinSelect_d
IfxI2c_PinSelect_e
IfxI2c_PinSelect_f
IfxI2c_PinSelect_g
IfxI2c_PinSelect_h

Definition at line 124 of file IfxI2c.h.

◆ IfxI2c_ProtocolInterruptSource

enum IfxI2c_ProtocolInterruptSource

enable protocol interrupt source Definition in Ifx.I2C.PIRQSM.U

Enumerator
IfxI2c_ProtocolInterruptSource_addressMatch | address match service request
IfxI2c_ProtocolInterruptSource_generalCall | general call service request
IfxI2c_ProtocolInterruptSource_masterCode | master code service request
IfxI2c_ProtocolInterruptSource_arbitrationLost | arbitration lost service request
IfxI2c_ProtocolInterruptSource_notAcknowledgeReceived | not acknowledge received service request
IfxI2c_ProtocolInterruptSource_transmissionEnd | transmission end service request
IfxI2c_ProtocolInterruptSource_receiveMode | receive mode service request

Definition at line 139 of file IfxI2c.h.

◆ IfxI2c_SleepMode

enum IfxI2c_SleepMode

Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_I2C.CLC1.B.EDIS.

Enumerator
IfxI2c_SleepMode_enable | enables sleep mode
IfxI2c_SleepMode_disable | disables sleep mode

Definition at line 153 of file IfxI2c.h.


iLLD_TC38A: Functions

Functions
Functions
iLLD » I2C » Standard Driver
Collaboration diagram for Functions:

Functions

IFX_INLINE boolean | IfxI2c_busIsFree (Ifx_I2C *i2c)
Returns if the bus is free. More...
IFX_INLINE void | IfxI2c_clearAllDtrInterruptSources (Ifx_I2C *i2c)
clears all DTR interrupt sources More...
IFX_INLINE void | IfxI2c_clearAllErrorInterruptSources (Ifx_I2C *i2c)
clears all Error Interrupt sources More...
IFX_INLINE void | IfxI2c_clearAllProtocolInterruptSources (Ifx_I2C *i2c)
Clears all Protocol Interrupt sources. More...
IFX_INLINE void | IfxI2c_clearDtrInterruptSource (Ifx_I2C *i2c, IfxI2c_DtrInterruptSource source)
clears the specified source of DTR interrupt More...
IFX_INLINE void | IfxI2c_clearErrorInterruptSource (Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source)
clears the specified source of error interrupt More...
IFX_INLINE void | IfxI2c_clearProtocolInterruptSource (Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
clears the specified source of protocol interrupt More...
IFX_INLINE void | IfxI2c_clearRequestBuffer (Ifx_I2C *i2c)
Data request is cleared automatically. More...
IFX_INLINE void | IfxI2c_disableDtrInterruptSource (Ifx_I2C *i2c, IfxI2c_DtrInterruptSource source)
disables the specified source of DTR interupt More...
IFX_INLINE void | IfxI2c_disableErrorInterruptFlag (Ifx_I2C *i2c)
disables the error interrupt flag More...
IFX_INLINE void | IfxI2c_disableErrorInterruptSource (Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source)
disables the specified source of error interrupt More...
IFX_INLINE void | IfxI2c_disableProtocolInterruptFlag (Ifx_I2C *i2c)
disables the Protocol interrupt flag More...
IFX_INLINE void | IfxI2c_disableProtocolInterruptSource (Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
disables the specified source of protocol interrupt More...
IFX_INLINE void | IfxI2c_enableDtrInterruptSource (Ifx_I2C *i2c, IfxI2c_DtrInterruptSource source)
enables the specified source of DTR interupt More...
IFX_INLINE void | IfxI2c_enableErrorInterruptFlag (Ifx_I2C *i2c)
enables the error interrupt flag More...
IFX_INLINE void | IfxI2c_enableErrorInterruptSource (Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source)
enables the specified source of error interrupt More...
IFX_INLINE void | IfxI2c_enableProtocolInterruptFlag (Ifx_I2C *i2c)
enables the protocol interrupt flag More...
IFX_INLINE void | IfxI2c_enableProtocolInterruptSource (Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
enables the specified source of protocol interrupt More...
IFX_INLINE IfxI2c_BusStatus | IfxI2c_getBusStatus (Ifx_I2C *i2c)
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxI2c_getDtrSrcPointer (Ifx_I2C *i2c)
Returns the SRC pointer for I2C DTR interrupt. More...
IFX_INLINE boolean | IfxI2c_getDtrinterruptSourceStatus (Ifx_I2C *i2c, IfxI2c_DtrInterruptSource source)
returns the status of specified DTR interrupt source More...
IFX_INLINE boolean | IfxI2c_getErrorInterruptFlagStatus (Ifx_I2C *i2c)
returns the current status of error interrupt flag More...
IFX_INLINE boolean | IfxI2c_getErrorInterruptSourceStatus (Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source)
returns the status of the error interrupt source More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxI2c_getErrorSrcPointer (Ifx_I2C *i2c)
Returns the SRC pointer for I2C Error interrupt. More...
IFX_INLINE boolean | IfxI2c_getProtocolInterruptFlagStatus (Ifx_I2C *i2c)
returns the current raw status of protocol interrupt More...
IFX_INLINE boolean | IfxI2c_getProtocolInterruptSourceStatus (Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
returns the status of specified protocol interrupt source More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxI2c_getProtocolSrcPointer (Ifx_I2C *i2c)
Returns the SRC pointer for I2C Protocol interrupt. More...
IFX_INLINE boolean | IfxI2c_isFifoRequest (Ifx_I2C *i2c)
Returns if the Fifo is requesting new data. More...
IFX_INLINE void | IfxI2c_run (Ifx_I2C *i2c)
IFX_INLINE void | IfxI2c_setBitAddressMode (Ifx_I2C *i2c, IfxI2c_AddressMode mode)
Sets width of I2C address to 7 or 10 bits. More...
IFX_INLINE void | IfxI2c_setPinSelection (Ifx_I2C *i2c, IfxI2c_PinSelect pisel)
selects the pin More...
IFX_INLINE void | IfxI2c_setReceivePacketSize (Ifx_I2C *i2c, Ifx_SizeT size)
Sets the number of bytes to be received. More...
IFX_INLINE void | IfxI2c_setSlaveDeviceAddress (Ifx_I2C *i2c, uint16 address)
IFX_INLINE void | IfxI2c_setSleepMode (Ifx_I2C *i2c, IfxI2c_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxI2c_setTransmitPacketSize (Ifx_I2C *i2c, Ifx_SizeT size)
Sets the number of bytes to be tansmitted. More...
IFX_INLINE void | IfxI2c_stop (Ifx_I2C *i2c)
IFX_INLINE void | IfxI2c_waitBusFree (Ifx_I2C *i2c)
IFX_INLINE void | IfxI2c_writeFifo (Ifx_I2C *i2c, uint32 packet)
Writes a packet (4 bytes) into the Fifo. More...
IFX_EXTERN void | IfxI2c_configureAsMaster (Ifx_I2C *i2c)
Configures the Module as Master. More...
IFX_EXTERN void | IfxI2c_disableModule (Ifx_I2C *i2c)
Disables the I2c Module. More...
IFX_EXTERN void | IfxI2c_enableDtrInterrupt (Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
enables the DTR interrupt More...
IFX_EXTERN void | IfxI2c_enableErrorInterrupt (Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
Enables the Error interrupt. More...
IFX_EXTERN void | IfxI2c_enableModule (Ifx_I2C *i2c)
Enables the I2c Module. More...
IFX_EXTERN void | IfxI2c_enableProtocolInterrupt (void *i2c, IfxSrc_Tos typeOfService, uint16 priority)
Enables the protocol interrupt. More...
IFX_EXTERN Ifx_I2C * | IfxI2c_getAddress (IfxI2c_Index i2c)
IFX_EXTERN float32 | IfxI2c_getBaudrate (Ifx_I2C *i2c)
Returns the real Baudrate. More...
IFX_EXTERN IfxI2c_Index | IfxI2c_getIndex (Ifx_I2C *i2c)
API to get the resource index of the I2C specified. More...
IFX_EXTERN void | IfxI2c_initSclSdaPin (const IfxI2c_Scl_InOut *scl, const IfxI2c_Sda_InOut *sda, IfxPort_PadDriver padDriver)
IFX_EXTERN void | IfxI2c_releaseBus (Ifx_I2C *i2c)
Releases the bus, i.e puts a stop condition on the bus. More...
IFX_EXTERN void | IfxI2c_resetFifo (Ifx_I2C *i2c)
IFX_EXTERN void | IfxI2c_resetModule (Ifx_I2C *i2c)
resets the I2c kernel More...
IFX_EXTERN void | IfxI2c_setBaudrate (Ifx_I2C *i2c, float32 baudrate)
Calculates the desired baudrate. More...

Detailed Description

Function Documentation

◆ IfxI2c_busIsFree()

IFX_INLINE boolean IfxI2c_busIsFree ( Ifx_I2C * i2c )

Returns if the bus is free.

Definition at line 535 of file IfxI2c.h.

Referenced by IfxI2c_I2c_read(), and IfxI2c_I2c_write().

◆ IfxI2c_clearAllDtrInterruptSources()

IFX_INLINE void IfxI2c_clearAllDtrInterruptSources ( Ifx_I2C * i2c )

clears all DTR interrupt sources

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 548 of file IfxI2c.h.

Referenced by IfxI2c_configureHighSpeedMode(), IfxI2c_I2c_read(), and IfxI2c_I2c_write().

◆ IfxI2c_clearAllErrorInterruptSources()

IFX_INLINE void IfxI2c_clearAllErrorInterruptSources ( Ifx_I2C * i2c )

clears all Error Interrupt sources

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 554 of file IfxI2c.h.

Referenced by IfxI2c_I2c_read(), and IfxI2c_I2c_write().

◆ IfxI2c_clearAllProtocolInterruptSources()

IFX_INLINE void IfxI2c_clearAllProtocolInterruptSources ( Ifx_I2C * i2c )

Clears all Protocol Interrupt sources.

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 560 of file IfxI2c.h.

Referenced by IfxI2c_configureHighSpeedMode(), IfxI2c_I2c_read(), and IfxI2c_I2c_write().

◆ IfxI2c_clearDtrInterruptSource()

IFX_INLINE void IfxI2c_clearDtrInterruptSource | ( | Ifx_I2C * | i2c,
 |  | IfxI2c_DtrInterruptSource | source
 | ) |  |

clears the specified source of DTR interrupt

Parameters
i2c | pointer to i2c registers
source | DTR interrupt source
Returns
None

Definition at line 566 of file IfxI2c.h.

◆ IfxI2c_clearErrorInterruptSource()

IFX_INLINE void IfxI2c_clearErrorInterruptSource | ( | Ifx_I2C * | i2c,
 |  | IfxI2c_ErrorInterruptSource | source
 | ) |  |

clears the specified source of error interrupt

Parameters
i2c | pointer to i2c registers
source | error interrupt source
Returns
None

Definition at line 572 of file IfxI2c.h.

◆ IfxI2c_clearProtocolInterruptSource()

IFX_INLINE void IfxI2c_clearProtocolInterruptSource | ( | Ifx_I2C * | i2c,
 |  | IfxI2c_ProtocolInterruptSource | source
 | ) |  |

clears the specified source of protocol interrupt

Parameters
i2c | pointer to i2c registers
source | protocol interrupt source
Returns
None

Definition at line 578 of file IfxI2c.h.

Referenced by IfxI2c_I2c_read(), IfxI2c_I2c_write(), and IfxI2c_releaseBus().

◆ IfxI2c_clearRequestBuffer()

IFX_INLINE void IfxI2c_clearRequestBuffer ( Ifx_I2C * i2c )

Data request is cleared automatically.

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 584 of file IfxI2c.h.

◆ IfxI2c_configureAsMaster()

IFX_EXTERN void IfxI2c_configureAsMaster ( Ifx_I2C * i2c )

Configures the Module as Master.

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 52 of file IfxI2c.c.

Referenced by IfxI2c_I2c_initModule().

◆ IfxI2c_disableDtrInterruptSource()

IFX_INLINE void IfxI2c_disableDtrInterruptSource | ( | Ifx_I2C * | i2c,
 |  | IfxI2c_DtrInterruptSource | source
 | ) |  |

disables the specified source of DTR interupt

Parameters
i2c | pointer to i2c registers
source | DTR interrupt source
Returns
None

Definition at line 590 of file IfxI2c.h.

◆ IfxI2c_disableErrorInterruptFlag()

IFX_INLINE void IfxI2c_disableErrorInterruptFlag ( Ifx_I2C * i2c )

disables the error interrupt flag

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 596 of file IfxI2c.h.

◆ IfxI2c_disableErrorInterruptSource()

IFX_INLINE void IfxI2c_disableErrorInterruptSource | ( | Ifx_I2C * | i2c,
 |  | IfxI2c_ErrorInterruptSource | source
 | ) |  |

disables the specified source of error interrupt

Parameters
i2c | pointer to i2c registers
source | error interrupt source
Returns
None

Definition at line 602 of file IfxI2c.h.

◆ IfxI2c_disableModule()

IFX_EXTERN void IfxI2c_disableModule ( Ifx_I2C * i2c )

Disables the I2c Module.

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 72 of file IfxI2c.c.

◆ IfxI2c_disableProtocolInterruptFlag()

IFX_INLINE void IfxI2c_disableProtocolInterruptFlag ( Ifx_I2C * i2c )

disables the Protocol interrupt flag

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 608 of file IfxI2c.h.

◆ IfxI2c_disableProtocolInterruptSource()

IFX_INLINE void IfxI2c_disableProtocolInterruptSource | ( | Ifx_I2C * | i2c,
 |  | IfxI2c_ProtocolInterruptSource | source
 | ) |  |

disables the specified source of protocol interrupt

Parameters
i2c | pointer to i2c registers
source | protocol interrupt source
Returns
None

Definition at line 614 of file IfxI2c.h.

◆ IfxI2c_enableDtrInterrupt()

IFX_EXTERN void IfxI2c_enableDtrInterrupt | ( | Ifx_I2C * | i2c,
 |  | IfxSrc_Tos | typeOfService,
 |  | uint16 | priority
 | ) |  |

enables the DTR interrupt

Parameters
i2c | pointer to i2c registers
typeOfService | Type of Service (Cpu or DMA)
priority | priority of the interrupt
Returns
None

Definition at line 87 of file IfxI2c.c.

◆ IfxI2c_enableDtrInterruptSource()

IFX_INLINE void IfxI2c_enableDtrInterruptSource | ( | Ifx_I2C * | i2c,
 |  | IfxI2c_DtrInterruptSource | source
 | ) |  |

enables the specified source of DTR interupt

Parameters
i2c | pointer to i2c registers
source | DTR interrupt source
Returns
None

Definition at line 620 of file IfxI2c.h.

◆ IfxI2c_enableErrorInterrupt()

IFX_EXTERN void IfxI2c_enableErrorInterrupt | ( | Ifx_I2C * | i2c,
 |  | IfxSrc_Tos | typeOfService,
 |  | uint16 | priority
 | ) |  |

Enables the Error interrupt.

Parameters
i2c | pointer to i2c registers
typeOfService | Type of Service (Cpu or DMA)
priority | priority of the interrupt
Returns
None

Definition at line 96 of file IfxI2c.c.

◆ IfxI2c_enableErrorInterruptFlag()

IFX_INLINE void IfxI2c_enableErrorInterruptFlag ( Ifx_I2C * i2c )

enables the error interrupt flag

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 626 of file IfxI2c.h.

◆ IfxI2c_enableErrorInterruptSource()

IFX_INLINE void IfxI2c_enableErrorInterruptSource | ( | Ifx_I2C * | i2c,
 |  | IfxI2c_ErrorInterruptSource | source
 | ) |  |

enables the specified source of error interrupt

Parameters
i2c | pointer to i2c registers
source | error interrupt source
Returns
None

Definition at line 632 of file IfxI2c.h.

◆ IfxI2c_enableModule()

IFX_EXTERN void IfxI2c_enableModule ( Ifx_I2C * i2c )

Enables the I2c Module.

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 105 of file IfxI2c.c.

Referenced by IfxI2c_I2c_initModule().

◆ IfxI2c_enableProtocolInterrupt()

IFX_EXTERN void IfxI2c_enableProtocolInterrupt | ( | void * | i2c,
 |  | IfxSrc_Tos | typeOfService,
 |  | uint16 | priority
 | ) |  |

Enables the protocol interrupt.

Parameters
i2c | pointer to i2c registers
typeOfService | Type of Service (Cpu or DMA)
priority | Priority of the interrupt
Returns
None

Definition at line 134 of file IfxI2c.c.

◆ IfxI2c_enableProtocolInterruptFlag()

IFX_INLINE void IfxI2c_enableProtocolInterruptFlag ( Ifx_I2C * i2c )

enables the protocol interrupt flag

Parameters
i2c pointer to I2C registers
Returns
None

Definition at line 638 of file IfxI2c.h.

◆ IfxI2c_enableProtocolInterruptSource()

IFX_INLINE void IfxI2c_enableProtocolInterruptSource | ( | Ifx_I2C * | i2c,
 |  | IfxI2c_ProtocolInterruptSource | source
 | ) |  |

enables the specified source of protocol interrupt

Parameters
i2c | pointer to I2C registers
source | protocol interrupt source
Returns
None

Definition at line 644 of file IfxI2c.h.

◆ IfxI2c_getAddress()

IFX_EXTERN Ifx_I2C* IfxI2c_getAddress ( IfxI2c_Index i2c )
Parameters
i2c Resource index of the I2c
Returns
I2C module register address

Definition at line 143 of file IfxI2c.c.

◆ IfxI2c_getBaudrate()

IFX_EXTERN float32 IfxI2c_getBaudrate ( Ifx_I2C * i2c )

Returns the real Baudrate.

Returns
Baudrate

Definition at line 160 of file IfxI2c.c.

Referenced by IfxI2c_I2c_getBaudrate(), and IfxI2c_I2c_initModule().

◆ IfxI2c_getBusStatus()

IFX_INLINE IfxI2c_BusStatus IfxI2c_getBusStatus ( Ifx_I2C * i2c )
Parameters
i2c pointer to i2c registers
Returns
BusStatus

Definition at line 650 of file IfxI2c.h.

Referenced by IfxI2c_configureHighSpeedMode(), IfxI2c_I2c_initModule(), IfxI2c_I2c_read(), IfxI2c_I2c_write(), and IfxI2c_waitBusFree().

◆ IfxI2c_getDtrinterruptSourceStatus()

IFX_INLINE boolean IfxI2c_getDtrinterruptSourceStatus | ( | Ifx_I2C * | i2c,
 |  | IfxI2c_DtrInterruptSource | source
 | ) |  |

returns the status of specified DTR interrupt source

Parameters
i2c | pointer to i2c registers
source | DTR interrupt source
Returns
status

Definition at line 669 of file IfxI2c.h.

◆ IfxI2c_getDtrSrcPointer()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxI2c_getDtrSrcPointer ( Ifx_I2C * i2c )

Returns the SRC pointer for I2C DTR interrupt.

Parameters
i2c pointer to i2c registers
Returns
SRC pointer for I2C DTR interrupt

Definition at line 656 of file IfxI2c.h.

Referenced by IfxI2c_enableDtrInterrupt().

◆ IfxI2c_getErrorInterruptFlagStatus()

IFX_INLINE boolean IfxI2c_getErrorInterruptFlagStatus ( Ifx_I2C * i2c )

returns the current status of error interrupt flag

Parameters
i2c pointer to i2c registers
Returns
status

Definition at line 675 of file IfxI2c.h.

◆ IfxI2c_getErrorInterruptSourceStatus()

IFX_INLINE boolean IfxI2c_getErrorInterruptSourceStatus | ( | Ifx_I2C * | i2c,
 |  | IfxI2c_ErrorInterruptSource | source
 | ) |  |

returns the status of the error interrupt source

Parameters
i2c | pointer to i2c registers
source | error interrupt source
Returns
status

Definition at line 681 of file IfxI2c.h.

◆ IfxI2c_getErrorSrcPointer()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxI2c_getErrorSrcPointer ( Ifx_I2C * i2c )

Returns the SRC pointer for I2C Error interrupt.

Parameters
i2c pointer to i2c registers
Returns
SRC pointer for I2C Error Service interrupt

Definition at line 687 of file IfxI2c.h.

Referenced by IfxI2c_enableErrorInterrupt().

◆ IfxI2c_getIndex()

IFX_EXTERN IfxI2c_Index IfxI2c_getIndex ( Ifx_I2C * i2c )

API to get the resource index of the I2C specified.

Parameters
i2c Pointer to the I2C HW module (register memory map)
Returns
Resource index of the I2C

Definition at line 184 of file IfxI2c.c.

◆ IfxI2c_getProtocolInterruptFlagStatus()

IFX_INLINE boolean IfxI2c_getProtocolInterruptFlagStatus ( Ifx_I2C * i2c )

returns the current raw status of protocol interrupt

Parameters
i2c pointer to i2c registers
Returns
status

Definition at line 700 of file IfxI2c.h.

◆ IfxI2c_getProtocolInterruptSourceStatus()

IFX_INLINE boolean IfxI2c_getProtocolInterruptSourceStatus | ( | Ifx_I2C * | i2c,
 |  | IfxI2c_ProtocolInterruptSource | source
 | ) |  |

returns the status of specified protocol interrupt source

Parameters
i2c | pointer to i2c registers
source | protocol interrupt source
Returns
status

Definition at line 706 of file IfxI2c.h.

Referenced by IfxI2c_configureHighSpeedMode(), IfxI2c_I2c_read(), IfxI2c_I2c_write(), and IfxI2c_releaseBus().

◆ IfxI2c_getProtocolSrcPointer()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxI2c_getProtocolSrcPointer ( Ifx_I2C * i2c )

Returns the SRC pointer for I2C Protocol interrupt.

Parameters
i2c pointer to i2c registers
Returns
SRC pointer for I2C Protocol Service interrupt

Definition at line 712 of file IfxI2c.h.

Referenced by IfxI2c_enableProtocolInterrupt().

◆ IfxI2c_initSclSdaPin()

IFX_EXTERN void IfxI2c_initSclSdaPin | ( | const IfxI2c_Scl_InOut * | scl,
 |  | const IfxI2c_Sda_InOut * | sda,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |
Returns
None

Definition at line 204 of file IfxI2c.c.

Referenced by IfxI2c_I2c_initModule().

◆ IfxI2c_isFifoRequest()

IFX_INLINE boolean IfxI2c_isFifoRequest ( Ifx_I2C * i2c )

Returns if the Fifo is requesting new data.

Definition at line 725 of file IfxI2c.h.

◆ IfxI2c_releaseBus()

IFX_EXTERN void IfxI2c_releaseBus ( Ifx_I2C * i2c )

Releases the bus, i.e puts a stop condition on the bus.

Returns
None

Definition at line 215 of file IfxI2c.c.

Referenced by IfxI2c_I2c_read(), and IfxI2c_I2c_write().

◆ IfxI2c_resetFifo()

IFX_EXTERN void IfxI2c_resetFifo ( Ifx_I2C * i2c )
Returns
None

Definition at line 231 of file IfxI2c.c.

◆ IfxI2c_resetModule()

IFX_EXTERN void IfxI2c_resetModule ( Ifx_I2C * i2c )

resets the I2c kernel

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 244 of file IfxI2c.c.

◆ IfxI2c_run()

IFX_INLINE void IfxI2c_run ( Ifx_I2C * i2c )
Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 731 of file IfxI2c.h.

Referenced by IfxI2c_configureHighSpeedMode(), and IfxI2c_I2c_initModule().

◆ IfxI2c_setBaudrate()

IFX_EXTERN void IfxI2c_setBaudrate | ( | Ifx_I2C * | i2c,
 |  | float32 | baudrate
 | ) |  |

Calculates the desired baudrate.

Parameters
i2c | pointer to i2c registers
baudrate | specifies the baud rate
Returns
None

Definition at line 263 of file IfxI2c.c.

Referenced by IfxI2c_I2c_initModule().

◆ IfxI2c_setBitAddressMode()

IFX_INLINE void IfxI2c_setBitAddressMode | ( | Ifx_I2C * | i2c,
 |  | IfxI2c_AddressMode | mode
 | ) |  |

Sets width of I2C address to 7 or 10 bits.

Parameters
i2c | pointer to i2c registers
mode | selects 7 or 10 bits address
Returns
None

Definition at line 737 of file IfxI2c.h.

◆ IfxI2c_setPinSelection()

IFX_INLINE void IfxI2c_setPinSelection | ( | Ifx_I2C * | i2c,
 |  | IfxI2c_PinSelect | pisel
 | ) |  |

selects the pin

Parameters
i2c | pointer to i2c registers
pisel | pin to be select
Returns
None

Definition at line 743 of file IfxI2c.h.

Referenced by IfxI2c_initSclSdaPin().

◆ IfxI2c_setReceivePacketSize()

IFX_INLINE void IfxI2c_setReceivePacketSize | ( | Ifx_I2C * | i2c,
 |  | Ifx_SizeT | size
 | ) |  |

Sets the number of bytes to be received.

Parameters
i2c | pointer to i2c registers
size | number of packets
Returns
None

Definition at line 749 of file IfxI2c.h.

Referenced by IfxI2c_I2c_read().

◆ IfxI2c_setSlaveDeviceAddress()

IFX_INLINE void IfxI2c_setSlaveDeviceAddress | ( | Ifx_I2C * | i2c,
 |  | uint16 | address
 | ) |  |
Parameters
i2c | pointer to i2c registers
address | device address
Returns
None

Definition at line 755 of file IfxI2c.h.

◆ IfxI2c_setSleepMode()

IFX_INLINE void IfxI2c_setSleepMode | ( | Ifx_I2C * | i2c,
 |  | IfxI2c_SleepMode | mode
 | ) |  |

Sets the sensitivity of the module to sleep signal.

Parameters
i2c | pointer to i2c registers
mode | mode selection (enable / disable)
Returns
None

Definition at line 761 of file IfxI2c.h.

◆ IfxI2c_setTransmitPacketSize()

IFX_INLINE void IfxI2c_setTransmitPacketSize | ( | Ifx_I2C * | i2c,
 |  | Ifx_SizeT | size
 | ) |  |

Sets the number of bytes to be tansmitted.

Parameters
i2c | pointer to i2c registers
size | number of packets
Returns
None

Definition at line 767 of file IfxI2c.h.

Referenced by IfxI2c_configureHighSpeedMode(), IfxI2c_I2c_read(), and IfxI2c_I2c_write().

◆ IfxI2c_stop()

IFX_INLINE void IfxI2c_stop ( Ifx_I2C * i2c )
Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 773 of file IfxI2c.h.

Referenced by IfxI2c_configureAsMaster(), IfxI2c_configureHighSpeedMode(), and IfxI2c_I2c_initModule().

◆ IfxI2c_waitBusFree()

IFX_INLINE void IfxI2c_waitBusFree ( Ifx_I2C * i2c )
Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 779 of file IfxI2c.h.

◆ IfxI2c_writeFifo()

IFX_INLINE void IfxI2c_writeFifo | ( | Ifx_I2C * | i2c,
 |  | uint32 | packet
 | ) |  |

Writes a packet (4 bytes) into the Fifo.

Parameters
i2c | pointer to i2c registers
packet | specifies the byte to be transfer
Returns
None

Definition at line 786 of file IfxI2c.h.

Referenced by IfxI2c_configureHighSpeedMode(), IfxI2c_I2c_read(), and IfxI2c_I2c_write().


iLLD_TC38A: Data Structures

Data Structures
Data Structures
iLLD » I2C » Standard Driver
Collaboration diagram for Data Structures:

Data Structures

struct IfxI2c_Pins
Pin Structure. More...

Detailed Description

Data Structure Documentation

◆ IfxI2c_Pins

struct IfxI2c_Pins

Pin Structure.

Definition at line 169 of file IfxI2c.h.

Collaboration diagram for IfxI2c_Pins:
[legend]
Data Fields
IfxPort_PadDriver | padDriver
IfxI2c_Scl_InOut * | scl
IfxI2c_Sda_InOut * | sda


iLLD_TC38A: I2C Pin Mapping

Data Structures | Macros | Variables
I2C Pin Mapping
iLLD » I2C
Collaboration diagram for I2C Pin Mapping:

Data Structures

struct | IfxI2c_Scl_InOut
SCL input mapping structure. More...
struct | IfxI2c_Sda_InOut
SDA input mapping structure. More...

Macros

#define | IFXI2C_PINMAP_NUM_MODULES 2
Table dimensions. More...
#define | IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS 3
#define | IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS 3

Variables

IFX_EXTERN IfxI2c_Scl_InOut IfxI2c0_SCL_P02_5_INOUT
Serial Clock Output and input. More...
IFX_EXTERN IfxI2c_Scl_InOut IfxI2c0_SCL_P13_1_INOUT
Serial Clock Output and input. More...
IFX_EXTERN IfxI2c_Scl_InOut IfxI2c0_SCL_P15_4_INOUT
Serial Clock Output and input. More...
IFX_EXTERN IfxI2c_Scl_InOut IfxI2c1_SCL_P11_14_INOUT
Serial Clock Output and input. More...
IFX_EXTERN IfxI2c_Scl_InOut IfxI2c1_SCL_P13_9_INOUT
Serial Clock Output and input. More...
IFX_EXTERN IfxI2c_Sda_InOut IfxI2c0_SDA_P02_4_INOUT
Serial Data Output and input. More...
IFX_EXTERN IfxI2c_Sda_InOut IfxI2c0_SDA_P13_2_INOUT
Serial Data Output and input. More...
IFX_EXTERN IfxI2c_Sda_InOut IfxI2c0_SDA_P15_5_INOUT
Serial Data Output and input. More...
IFX_EXTERN IfxI2c_Sda_InOut IfxI2c1_SDA_P11_13_INOUT
Serial Data Output and input. More...
IFX_EXTERN IfxI2c_Sda_InOut IfxI2c1_SDA_P13_12_INOUT
Serial Data Output and input. More...
IFX_EXTERN const IfxI2c_Scl_InOut * | IfxI2c_Scl_InOut_pinTable [IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS]
IfxI2c_Scl_InOut table. More...
IFX_EXTERN const IfxI2c_Sda_InOut * | IfxI2c_Sda_InOut_pinTable [IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS]
IfxI2c_Sda_InOut table. More...

Detailed Description

Data Structure Documentation

◆ IfxI2c_Scl_InOut

struct IfxI2c_Scl_InOut

SCL input mapping structure.

Definition at line 56 of file IfxI2c_PinMap.h.

Collaboration diagram for IfxI2c_Scl_InOut:
[legend]
Data Fields
Ifx_RxSel | inSelect | Input multiplexer value.
Ifx_I2C * | module | Base address.
IfxPort_OutputIdx | outSelect | Port control code.
IfxPort_Pin | pin | Port pin.

◆ IfxI2c_Sda_InOut

struct IfxI2c_Sda_InOut

SDA input mapping structure.

Definition at line 65 of file IfxI2c_PinMap.h.

Collaboration diagram for IfxI2c_Sda_InOut:
[legend]
Data Fields
Ifx_RxSel | inSelect | Input multiplexer value.
Ifx_I2C * | module | Base address.
IfxPort_OutputIdx | outSelect | Port control code.
IfxPort_Pin | pin | Port pin.

Macro Definition Documentation

◆ IFXI2C_PINMAP_NUM_MODULES

#define IFXI2C_PINMAP_NUM_MODULES 2

Table dimensions.

Definition at line 85 of file IfxI2c_PinMap.h.

◆ IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS

#define IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS 3

Definition at line 86 of file IfxI2c_PinMap.h.

◆ IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS

#define IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS 3

Definition at line 87 of file IfxI2c_PinMap.h.

Variable Documentation

◆ IfxI2c0_SCL_P02_5_INOUT

IFX_EXTERN IfxI2c_Scl_InOut IfxI2c0_SCL_P02_5_INOUT

Serial Clock Output and input.

Definition at line 73 of file IfxI2c_PinMap.h.

◆ IfxI2c0_SCL_P13_1_INOUT

IFX_EXTERN IfxI2c_Scl_InOut IfxI2c0_SCL_P13_1_INOUT

Serial Clock Output and input.

Definition at line 74 of file IfxI2c_PinMap.h.

◆ IfxI2c0_SCL_P15_4_INOUT

IFX_EXTERN IfxI2c_Scl_InOut IfxI2c0_SCL_P15_4_INOUT

Serial Clock Output and input.

Definition at line 75 of file IfxI2c_PinMap.h.

◆ IfxI2c0_SDA_P02_4_INOUT

IFX_EXTERN IfxI2c_Sda_InOut IfxI2c0_SDA_P02_4_INOUT

Serial Data Output and input.

Definition at line 78 of file IfxI2c_PinMap.h.

◆ IfxI2c0_SDA_P13_2_INOUT

IFX_EXTERN IfxI2c_Sda_InOut IfxI2c0_SDA_P13_2_INOUT

Serial Data Output and input.

Definition at line 79 of file IfxI2c_PinMap.h.

◆ IfxI2c0_SDA_P15_5_INOUT

IFX_EXTERN IfxI2c_Sda_InOut IfxI2c0_SDA_P15_5_INOUT

Serial Data Output and input.

Definition at line 80 of file IfxI2c_PinMap.h.

◆ IfxI2c1_SCL_P11_14_INOUT

IFX_EXTERN IfxI2c_Scl_InOut IfxI2c1_SCL_P11_14_INOUT

Serial Clock Output and input.

Definition at line 76 of file IfxI2c_PinMap.h.

◆ IfxI2c1_SCL_P13_9_INOUT

IFX_EXTERN IfxI2c_Scl_InOut IfxI2c1_SCL_P13_9_INOUT

Serial Clock Output and input.

Definition at line 77 of file IfxI2c_PinMap.h.

◆ IfxI2c1_SDA_P11_13_INOUT

IFX_EXTERN IfxI2c_Sda_InOut IfxI2c1_SDA_P11_13_INOUT

Serial Data Output and input.

Definition at line 81 of file IfxI2c_PinMap.h.

◆ IfxI2c1_SDA_P13_12_INOUT

IFX_EXTERN IfxI2c_Sda_InOut IfxI2c1_SDA_P13_12_INOUT

Serial Data Output and input.

Definition at line 82 of file IfxI2c_PinMap.h.

◆ IfxI2c_Scl_InOut_pinTable

IFX_EXTERN const IfxI2c_Scl_InOut* IfxI2c_Scl_InOut_pinTable[IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS]

IfxI2c_Scl_InOut table.

Definition at line 91 of file IfxI2c_PinMap.h.

◆ IfxI2c_Sda_InOut_pinTable

IFX_EXTERN const IfxI2c_Sda_InOut* IfxI2c_Sda_InOut_pinTable[IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS]

IfxI2c_Sda_InOut table.

Definition at line 94 of file IfxI2c_PinMap.h.


iLLD_TC38A: How to use the I2c driver?

How to use the I2c driver?
iLLD » I2C
Collaboration diagram for How to use the I2c driver?:

The I2c driver provides a default configuration for 8bit wide data transfers in Master mode.

NOTE: Interrupts are disabled during data transfers as long as the driver operates on the I2C hardware FIFO, except for reading 32 bytes or less. This is due to limitations of the I2c Module.

NOTE : Send Slave address as 8-bit by left shifting it by 1.E.g incase of EEPROM,slave address is 7 bit represented as 0x50, after left shifting it by 1, it will be 0xa0

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation Preparation

Include Files

Include following header file into your C code:

#include <I2c/I2c/IfxI2c_I2c.h>

Variables

Declare the I2c handle, the I2c device handle and the data buffer in your C code:

// used globally
static IfxI2c_I2c i2c; // i2c handle
static IfxI2c_I2c_Device i2cDev; // slave device handle
uint8 data[128]; // data buffer

Module Initialisation

// create config structure
IfxI2c_I2c_Config config;
// fill structure with default values and Module address
IfxI2c_I2c_initConfig(&config, &MODULE_I2C0);
// configure pins
const IfxI2c_Pins pins = {
&IfxI2c0_SCL_P02_5_INOUT,
&IfxI2c0_SDA_P02_4_INOUT,
IfxPort_PadDriver_cmosAutomotiveSpeed1
};
config.pins = &pins;
// For HighSpeed Mode configure the baudrate greater than 400KHz and set config.mode = IfxI2c_Mode_HighSpeed;
config.mode = IfxI2c_Mode_StandardAndFast;
config.baudrate = 400000; // 400 kHz
// initialize module
IfxI2c_I2c_initModule(&i2c, &config);

Device Initialisation

Here the i2c device handle is initialized.

// create device config
IfxI2c_I2c_deviceConfig i2cDeviceConfig;
// fill structure with default values and i2c Handler
IfxI2c_I2c_initDeviceConfig(&i2cDeviceConfig, &i2c);
// set device specifig values.
i2cDeviceConfig.deviceAddress = 0xa0; // 8 bit device address
// initialize the i2c device handle
IfxI2c_I2c_initDevice(&i2cDev, &i2cDeviceConfig);

Data Transfers

Example for an i2c EEPROM.

Write

uint16 addr = 0x0000;
// setup the device's internal address
data[0] = addr >> 8; // High byte
data[1] = (uint8)addr; // Low byte
// setup data to be written
data[2] = 0x01;
data[3] = 0x02;
data[4] = 0x03;
uint8 size = 5; // 5 bytes to transmit to i2cDev (data and internal address)
// write data to device as soon as it is ready
while(IfxI2c_I2c_write(&i2cDev, data, size) == IfxI2c_I2c_Status_nak);

Read

Ifx_SizeT size;
uint16 addr = 0x0000;
// setup internal address to be read from
data[0] = addr >> 8; // High byte
data[1] = (uint8)addr; // Low byte
size = 2;
while(IfxI2c_I2c_write(&i2cDev, data, size) == IfxI2c_I2c_Status_nak);
size = 8; // 8 bytes to read
// read device data to data array
while(IfxI2c_I2c_read(&i2cDev, data, size) == IfxI2c_I2c_Status_nak);

Acknowledge Polling

It is also possible to poll explicitly for NAK.

By using write operations:

// size = 0;
while(IfxI2c_I2c_write(&i2cDev, data, 0) == IfxI2c_I2c_Status_nak)); // where data is just a dummy pointer

By using read operations:

// size = 0;
while(IfxI2c_I2c_read(&i2cDev, data, 0) == IfxI2c_I2c_Status_nak)); // where data is just a dummy pointer

Interrupts usage

Interrupts can be enabled from the application by using the APIs provided in the driver, there are APIs available in the driver to enable, disable, clear and read the status of interrupt falgs, along with these,
APIs to enable the the interrupts are also available.

here is an example of how to use the interrupts in I2C driver.

Using I2C interrupts

I2C DTR interrupt (DTR)

After initilaising I2C device Device Initialisation

choose the DTR interrupt sources needed to be enabled for I2C module and call the following functions once for each DTR interrupt source by choosing the right
DTR interrupt source as parameter,and after choosing all the DTR interrupt sources, enable I2C DTR service request or interrupt with desired type of service and priority

//enable DTR interrupt sources
Ifx_I2C *i2c = &MODULE_I2C0; // or choose &MODULE_I2C1
IfxI2c_enableDTRInterruptSource(i2c, IfxI2c_DtrInterruptSource_lastSingleRequest);
IfxI2c_enableDTRInterruptSource(i2c, IfxI2c_DtrInterruptSource_lastBurstRequest);
// enable the DTR interrupt
IfxI2c_enableDTRInterrupt(i2c, IfxSrc_Tos_cpu0, 8);

I2C error interrupt (ERR)

After initilaising I2C device Device Initialisation

choose the error interrupt sources needed to be enabled for I2C module and call the following functions once for each error interrupt source by choosing the right
error interrupt source as parameter,and after choosing all the error interrupt sources, enable the I2C error interrupt flag and then enable I2C error service request or interrupt with desired type of service and priority

//enable error interrupt sources
Ifx_I2C *i2c = &MODULE_I2C0; // or choose &MODULE_I2C1
IfxI2c_enableErrorInterruptSource(i2c, IfxI2c_ErrorInterruptSource_rxFifoUnderflow);
IfxI2c_enableErrorInterruptSource(i2c, IfxI2c_ErrorInterruptSource_txFifoOverflow);
// enable the error interrupt flag
IfxI2c_enableErrorInterruptFlag(Ifx_I2C *i2c);
// enable the error interrupt
IfxI2c_enableErrorInterrupt(i2c, IfxSrc_Tos_cpu0, 8);

I2C protocol interrupt (PROTOCOL)

After initilaising I2C device Device Initialisation

choose the protocol interrupt sources needed to be enabled for I2C module and call the following functions once for each protocol interrupt source by choosing the
right protocol interrupt source as parameter,and after choosing all the protocol interrupt sources, enable the I2C protocol interrupt flag and then enable
I2C protocol service request or interrupt with desired type of service and priority

//enable protocol interrupt sources
Ifx_I2C *i2c = &MODULE_I2C0; // or choose &MODULE_I2C1
IfxI2c_enableProtocolInterruptSource(i2c, IfxI2c_ProtocolInterruptSource_addressMatch);
IfxI2c_enableProtocolInterruptSource(i2c, IfxI2c_ProtocolInterruptSource_arbitrationLost);
// enable the protocol interrupt flag
IfxI2c_enableProtocolInterruptFlag(Ifx_I2C *i2c);
// enable the protocol interrupt
IfxI2c_enableProtocolInterrupt(i2c, IfxSrc_Tos_cpu0, 8);

you can define the ISR of your own and service the interrupt, please refer to more general usage of interrupts How to define Interrupts?

some additional APIs to clear, disable interrupt flags and get flag status are also available.


iLLD_TC38A: I2C

Modules
I2C
iLLD » I2C
Collaboration diagram for I2C:

Modules

Module Functions
Enumerations
Data Structures

Detailed Description


iLLD_TC38A: Module Functions

Functions
Module Functions
iLLD » I2C » I2C
Collaboration diagram for Module Functions:

Functions

IFX_EXTERN float32 | IfxI2c_I2c_getBaudrate (IfxI2c_I2c *i2c)
returns the baudrate of SCL More...
IFX_EXTERN void | IfxI2c_I2c_initConfig (IfxI2c_I2c_Config *config, Ifx_I2C *i2c)
Fills the config structure with default values. More...
IFX_EXTERN void | IfxI2c_I2c_initDevice (IfxI2c_I2c_Device *i2cDevice, const IfxI2c_I2c_deviceConfig *i2cDeviceConfig)
Initializes the device Handler. More...
IFX_EXTERN void | IfxI2c_I2c_initDeviceConfig (IfxI2c_I2c_deviceConfig *i2cDeviceConfig, IfxI2c_I2c *i2c)
Fills the config structure of the slave device with default values. More...
IFX_EXTERN void | IfxI2c_I2c_initModule (IfxI2c_I2c *i2c, const IfxI2c_I2c_Config *config)
Initializes the Module. More...
IFX_EXTERN IfxI2c_I2c_Status | IfxI2c_I2c_read (IfxI2c_I2c_Device *i2cDevice, volatile uint8 *data, Ifx_SizeT size)
reads the I2c device More...
IFX_EXTERN IfxI2c_I2c_Status | IfxI2c_I2c_write (IfxI2c_I2c_Device *i2cDevice, volatile uint8 *data, Ifx_SizeT size)
writes to the I2c device More...

Detailed Description

Function Documentation

◆ IfxI2c_I2c_getBaudrate()

IFX_EXTERN float32 IfxI2c_I2c_getBaudrate ( IfxI2c_I2c * i2c )

returns the baudrate of SCL

Parameters
i2c i2c Handler

Definition at line 53 of file IfxI2c_I2c.c.

◆ IfxI2c_I2c_initConfig()

IFX_EXTERN void IfxI2c_I2c_initConfig | ( | IfxI2c_I2c_Config * | config,
 |  | Ifx_I2C * | i2c
 | ) |  |

Fills the config structure with default values.

Parameters
config | Structure to configure the Module
i2c | Module address
Returns
None

Definition at line 59 of file IfxI2c_I2c.c.

◆ IfxI2c_I2c_initDevice()

IFX_EXTERN void IfxI2c_I2c_initDevice | ( | IfxI2c_I2c_Device * | i2cDevice,
 |  | const IfxI2c_I2c_deviceConfig * | i2cDeviceConfig
 | ) |  |

Initializes the device Handler.

Parameters
i2cDevice | I2c device Handler
i2cDeviceConfig | Structure to configure the device's data structure
Returns
None

A coding example can be found in How to use the I2c driver?

Definition at line 68 of file IfxI2c_I2c.c.

◆ IfxI2c_I2c_initDeviceConfig()

IFX_EXTERN void IfxI2c_I2c_initDeviceConfig | ( | IfxI2c_I2c_deviceConfig * | i2cDeviceConfig,
 |  | IfxI2c_I2c * | i2c
 | ) |  |

Fills the config structure of the slave device with default values.

Parameters
i2cDeviceConfig | Structure to configure the device's data structure
i2c | Handler
Returns
None

Definition at line 77 of file IfxI2c_I2c.c.

◆ IfxI2c_I2c_initModule()

IFX_EXTERN void IfxI2c_I2c_initModule | ( | IfxI2c_I2c * | i2c,
 |  | const IfxI2c_I2c_Config * | config
 | ) |  |

Initializes the Module.

Parameters
i2c | Handler
config | Configuration structure
Returns
None

A coding example can be found in How to use the I2c driver?

Definition at line 86 of file IfxI2c_I2c.c.

◆ IfxI2c_I2c_read()

IFX_EXTERN IfxI2c_I2c_Status IfxI2c_I2c_read | ( | IfxI2c_I2c_Device * | i2cDevice,
 |  | volatile uint8 * | data,
 |  | Ifx_SizeT | size
 | ) |  |

reads the I2c device

A coding example can be found in How to use the I2c driver?

Definition at line 116 of file IfxI2c_I2c.c.

◆ IfxI2c_I2c_write()

IFX_EXTERN IfxI2c_I2c_Status IfxI2c_I2c_write | ( | IfxI2c_I2c_Device * | i2cDevice,
 |  | volatile uint8 * | data,
 |  | Ifx_SizeT | size
 | ) |  |

writes to the I2c device

A coding example can be found in How to use the I2c driver?

Definition at line 387 of file IfxI2c_I2c.c.


iLLD_TC38A: Enumerations

Enumerations
Enumerations
iLLD » I2C » I2C
Collaboration diagram for Enumerations:

Enumerations

enum IfxI2c_I2c_Status {
IfxI2c_I2c_Status_ok = 0,
IfxI2c_I2c_Status_nak = 1,
IfxI2c_I2c_Status_al = 2,
IfxI2c_I2c_Status_busNotFree = 3,
IfxI2c_I2c_Status_error = 4
}

Detailed Description

Enumeration Type Documentation

◆ IfxI2c_I2c_Status

enum IfxI2c_I2c_Status
Enumerator
IfxI2c_I2c_Status_ok | ok
IfxI2c_I2c_Status_nak | NAK.
IfxI2c_I2c_Status_al | Arbitration Lost.
IfxI2c_I2c_Status_busNotFree | bus is not free
IfxI2c_I2c_Status_error | error

Definition at line 269 of file IfxI2c_I2c.h.


iLLD_TC38A: Data Structures

Data Structures
Data Structures
iLLD » I2C » I2C
Collaboration diagram for Data Structures:

Data Structures

struct | IfxI2c_I2c
Handler. More...
struct | IfxI2c_I2c_Config
Structure to configure the Module. More...
struct | IfxI2c_I2c_Device
Structure with slave device data. More...
struct | IfxI2c_I2c_deviceConfig
Structure to configure the device's data structure. More...

Detailed Description

Data Structure Documentation

◆ IfxI2c_I2c

struct IfxI2c_I2c

Handler.

Definition at line 288 of file IfxI2c_I2c.h.

Data Fields
float32 | baudrate | Baudrate.
IfxI2c_BusStatus | busStatus | Status of the bus.
Ifx_I2C * | i2c | Module Pointer.
IfxI2c_I2c_Status | status | Status of the last bus operation.

◆ IfxI2c_I2c_Config

struct IfxI2c_I2c_Config

Structure to configure the Module.

Definition at line 298 of file IfxI2c_I2c.h.

Collaboration diagram for IfxI2c_I2c_Config:
[legend]
Data Fields
float32 | baudrate | Baudrate.
Ifx_I2C * | i2c | Module Pointer.
IfxI2c_Mode | mode | Speed Mode.
IFX_CONST IfxI2c_Pins * | pins | Pins.

◆ IfxI2c_I2c_Device

struct IfxI2c_I2c_Device

Structure with slave device data.

Definition at line 308 of file IfxI2c_I2c.h.

Collaboration diagram for IfxI2c_I2c_Device:
[legend]
Data Fields
IfxI2c_AddressMode | addressMode | slave device's address (7 or 10 bits)
uint16 | deviceAddress | the slave device's address
IfxI2c_I2c * | i2c | Module Pionter.
IfxI2c_Mode | speedMode | slave device in Standard/Fast or High Speed mode.

◆ IfxI2c_I2c_deviceConfig

struct IfxI2c_I2c_deviceConfig

Structure to configure the device's data structure.

Definition at line 318 of file IfxI2c_I2c.h.

Collaboration diagram for IfxI2c_I2c_deviceConfig:
[legend]
Data Fields
IfxI2c_AddressMode | addressMode | slave device's address (7 or 10 bits)
uint16 | deviceAddress | the slave device's address
IfxI2c_I2c * | i2c | Module Pointer.
IfxI2c_Mode | speedMode | slave device in Standard/Fast or High Speed mode.


iLLD_TC38A: IfxI2c_cfg.h File Reference

  • _Impl
Macros | Enumerations | Variables
IfxI2c_cfg.h File Reference
iLLD » I2C

I2C on-chip implementation data. More...

#include "Cpu/Std/Ifx_Types.h"
#include "IfxI2c_reg.h"
Include dependency graph for IfxI2c_cfg.h:

Go to the source code of this file.

Macros

#define IFXI2C_NUM_MODULES (2)

Enumerations

enum IfxI2c_Index {
IfxI2c_Index_none = -1,
IfxI2c_Index_0 = 0,
IfxI2c_Index_1
}
List of the available I2c interfaces. More...

Variables

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxI2c_cfg_indexMap [IFXI2C_NUM_MODULES]

Detailed Description

I2C on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxI2c_cfg.h.

Macro Definition Documentation

◆ IFXI2C_NUM_MODULES

#define IFXI2C_NUM_MODULES (2)

Definition at line 67 of file IfxI2c_cfg.h.

Referenced by IfxI2c_getAddress(), and IfxI2c_getIndex().


iLLD_TC38A: IfxI2c_PinMap.c File Reference

  • _PinMap
Variables
IfxI2c_PinMap.c File Reference
iLLD » I2C

I2C I/O map. More...

#include "IfxI2c_PinMap.h"
Include dependency graph for IfxI2c_PinMap.c:

Go to the source code of this file.

Variables

IfxI2c_Scl_InOut | IfxI2c0_SCL_P02_5_INOUT = {&MODULE_I2C0, {&MODULE_P02, 5}, Ifx_RxSel_a, IfxPort_OutputIdx_alt5}
IfxI2c_Scl_InOut | IfxI2c0_SCL_P13_1_INOUT = {&MODULE_I2C0, {&MODULE_P13, 1}, Ifx_RxSel_b, IfxPort_OutputIdx_alt6}
IfxI2c_Scl_InOut | IfxI2c0_SCL_P15_4_INOUT = {&MODULE_I2C0, {&MODULE_P15, 4}, Ifx_RxSel_c, IfxPort_OutputIdx_alt6}
IfxI2c_Scl_InOut | IfxI2c1_SCL_P11_14_INOUT = {&MODULE_I2C1, {&MODULE_P11,14}, Ifx_RxSel_a, IfxPort_OutputIdx_alt6}
IfxI2c_Scl_InOut | IfxI2c1_SCL_P13_9_INOUT = {&MODULE_I2C1, {&MODULE_P13, 9}, Ifx_RxSel_b, IfxPort_OutputIdx_alt6}
IfxI2c_Sda_InOut | IfxI2c0_SDA_P02_4_INOUT = {&MODULE_I2C0, {&MODULE_P02, 4}, Ifx_RxSel_a, IfxPort_OutputIdx_alt5}
IfxI2c_Sda_InOut | IfxI2c0_SDA_P13_2_INOUT = {&MODULE_I2C0, {&MODULE_P13, 2}, Ifx_RxSel_b, IfxPort_OutputIdx_alt6}
IfxI2c_Sda_InOut | IfxI2c0_SDA_P15_5_INOUT = {&MODULE_I2C0, {&MODULE_P15, 5}, Ifx_RxSel_c, IfxPort_OutputIdx_alt6}
IfxI2c_Sda_InOut | IfxI2c1_SDA_P11_13_INOUT = {&MODULE_I2C1, {&MODULE_P11,13}, Ifx_RxSel_a, IfxPort_OutputIdx_alt6}
IfxI2c_Sda_InOut | IfxI2c1_SDA_P13_12_INOUT = {&MODULE_I2C1, {&MODULE_P13,12}, Ifx_RxSel_b, IfxPort_OutputIdx_alt6}
const IfxI2c_Scl_InOut * | IfxI2c_Scl_InOut_pinTable [IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS]
const IfxI2c_Sda_InOut * | IfxI2c_Sda_InOut_pinTable [IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS]

Detailed Description

I2C I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxI2c_PinMap.c.

Variable Documentation

◆ IfxI2c0_SCL_P02_5_INOUT

IfxI2c_Scl_InOut IfxI2c0_SCL_P02_5_INOUT = {&MODULE_I2C0, {&MODULE_P02, 5}, Ifx_RxSel_a, IfxPort_OutputIdx_alt5}

Definition at line 45 of file IfxI2c_PinMap.c.

◆ IfxI2c0_SCL_P13_1_INOUT

IfxI2c_Scl_InOut IfxI2c0_SCL_P13_1_INOUT = {&MODULE_I2C0, {&MODULE_P13, 1}, Ifx_RxSel_b, IfxPort_OutputIdx_alt6}

Definition at line 46 of file IfxI2c_PinMap.c.

◆ IfxI2c0_SCL_P15_4_INOUT

IfxI2c_Scl_InOut IfxI2c0_SCL_P15_4_INOUT = {&MODULE_I2C0, {&MODULE_P15, 4}, Ifx_RxSel_c, IfxPort_OutputIdx_alt6}

Definition at line 47 of file IfxI2c_PinMap.c.

◆ IfxI2c0_SDA_P02_4_INOUT

IfxI2c_Sda_InOut IfxI2c0_SDA_P02_4_INOUT = {&MODULE_I2C0, {&MODULE_P02, 4}, Ifx_RxSel_a, IfxPort_OutputIdx_alt5}

Definition at line 50 of file IfxI2c_PinMap.c.

◆ IfxI2c0_SDA_P13_2_INOUT

IfxI2c_Sda_InOut IfxI2c0_SDA_P13_2_INOUT = {&MODULE_I2C0, {&MODULE_P13, 2}, Ifx_RxSel_b, IfxPort_OutputIdx_alt6}

Definition at line 51 of file IfxI2c_PinMap.c.

◆ IfxI2c0_SDA_P15_5_INOUT

IfxI2c_Sda_InOut IfxI2c0_SDA_P15_5_INOUT = {&MODULE_I2C0, {&MODULE_P15, 5}, Ifx_RxSel_c, IfxPort_OutputIdx_alt6}

Definition at line 52 of file IfxI2c_PinMap.c.

◆ IfxI2c1_SCL_P11_14_INOUT

IfxI2c_Scl_InOut IfxI2c1_SCL_P11_14_INOUT = {&MODULE_I2C1, {&MODULE_P11,14}, Ifx_RxSel_a, IfxPort_OutputIdx_alt6}

Definition at line 48 of file IfxI2c_PinMap.c.

◆ IfxI2c1_SCL_P13_9_INOUT

IfxI2c_Scl_InOut IfxI2c1_SCL_P13_9_INOUT = {&MODULE_I2C1, {&MODULE_P13, 9}, Ifx_RxSel_b, IfxPort_OutputIdx_alt6}

Definition at line 49 of file IfxI2c_PinMap.c.

◆ IfxI2c1_SDA_P11_13_INOUT

IfxI2c_Sda_InOut IfxI2c1_SDA_P11_13_INOUT = {&MODULE_I2C1, {&MODULE_P11,13}, Ifx_RxSel_a, IfxPort_OutputIdx_alt6}

Definition at line 53 of file IfxI2c_PinMap.c.

◆ IfxI2c1_SDA_P13_12_INOUT

IfxI2c_Sda_InOut IfxI2c1_SDA_P13_12_INOUT = {&MODULE_I2C1, {&MODULE_P13,12}, Ifx_RxSel_b, IfxPort_OutputIdx_alt6}

Definition at line 54 of file IfxI2c_PinMap.c.

◆ IfxI2c_Scl_InOut_pinTable

const IfxI2c_Scl_InOut* IfxI2c_Scl_InOut_pinTable[IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS]
Initial value:
= {
{
&IfxI2c0_SCL_P02_5_INOUT,
&IfxI2c0_SCL_P13_1_INOUT,
&IfxI2c0_SCL_P15_4_INOUT
},
{
&IfxI2c1_SCL_P11_14_INOUT,
&IfxI2c1_SCL_P13_9_INOUT,
NULL_PTR
}
}
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxI2c0_SCL_P13_1_INOUT
IfxI2c_Scl_InOut IfxI2c0_SCL_P13_1_INOUT
Definition: IfxI2c_PinMap.c:46
IfxI2c1_SCL_P11_14_INOUT
IfxI2c_Scl_InOut IfxI2c1_SCL_P11_14_INOUT
Definition: IfxI2c_PinMap.c:48
IfxI2c1_SCL_P13_9_INOUT
IfxI2c_Scl_InOut IfxI2c1_SCL_P13_9_INOUT
Definition: IfxI2c_PinMap.c:49
IfxI2c0_SCL_P02_5_INOUT
IfxI2c_Scl_InOut IfxI2c0_SCL_P02_5_INOUT
Definition: IfxI2c_PinMap.c:45
IfxI2c0_SCL_P15_4_INOUT
IfxI2c_Scl_InOut IfxI2c0_SCL_P15_4_INOUT
Definition: IfxI2c_PinMap.c:47

Definition at line 57 of file IfxI2c_PinMap.c.

◆ IfxI2c_Sda_InOut_pinTable

const IfxI2c_Sda_InOut* IfxI2c_Sda_InOut_pinTable[IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS]
Initial value:
= {
{
&IfxI2c0_SDA_P02_4_INOUT,
&IfxI2c0_SDA_P13_2_INOUT,
&IfxI2c0_SDA_P15_5_INOUT
},
{
&IfxI2c1_SDA_P11_13_INOUT,
&IfxI2c1_SDA_P13_12_INOUT,
NULL_PTR
}
}
IfxI2c1_SDA_P11_13_INOUT
IfxI2c_Sda_InOut IfxI2c1_SDA_P11_13_INOUT
Definition: IfxI2c_PinMap.c:53
IfxI2c1_SDA_P13_12_INOUT
IfxI2c_Sda_InOut IfxI2c1_SDA_P13_12_INOUT
Definition: IfxI2c_PinMap.c:54
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxI2c0_SDA_P15_5_INOUT
IfxI2c_Sda_InOut IfxI2c0_SDA_P15_5_INOUT
Definition: IfxI2c_PinMap.c:52
IfxI2c0_SDA_P13_2_INOUT
IfxI2c_Sda_InOut IfxI2c0_SDA_P13_2_INOUT
Definition: IfxI2c_PinMap.c:51
IfxI2c0_SDA_P02_4_INOUT
IfxI2c_Sda_InOut IfxI2c0_SDA_P02_4_INOUT
Definition: IfxI2c_PinMap.c:50

Definition at line 70 of file IfxI2c_PinMap.c.


iLLD_TC38A: IfxI2c_PinMap.h File Reference

  • _PinMap
Data Structures | Macros | Variables
IfxI2c_PinMap.h File Reference
iLLD » I2C

I2C I/O map. More...

#include <IfxI2c_reg.h>
#include <_Impl/IfxI2c_cfg.h>
#include <Port/Std/IfxPort.h>
Include dependency graph for IfxI2c_PinMap.h:

Go to the source code of this file.

Data Structures

struct | IfxI2c_Scl_InOut
SCL input mapping structure. More...
struct | IfxI2c_Sda_InOut
SDA input mapping structure. More...

Macros

#define | IFXI2C_PINMAP_NUM_MODULES 2
Table dimensions. More...
#define | IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS 3
#define | IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS 3

Variables

IFX_EXTERN IfxI2c_Scl_InOut IfxI2c0_SCL_P02_5_INOUT
Serial Clock Output and input. More...
IFX_EXTERN IfxI2c_Scl_InOut IfxI2c0_SCL_P13_1_INOUT
Serial Clock Output and input. More...
IFX_EXTERN IfxI2c_Scl_InOut IfxI2c0_SCL_P15_4_INOUT
Serial Clock Output and input. More...
IFX_EXTERN IfxI2c_Scl_InOut IfxI2c1_SCL_P11_14_INOUT
Serial Clock Output and input. More...
IFX_EXTERN IfxI2c_Scl_InOut IfxI2c1_SCL_P13_9_INOUT
Serial Clock Output and input. More...
IFX_EXTERN IfxI2c_Sda_InOut IfxI2c0_SDA_P02_4_INOUT
Serial Data Output and input. More...
IFX_EXTERN IfxI2c_Sda_InOut IfxI2c0_SDA_P13_2_INOUT
Serial Data Output and input. More...
IFX_EXTERN IfxI2c_Sda_InOut IfxI2c0_SDA_P15_5_INOUT
Serial Data Output and input. More...
IFX_EXTERN IfxI2c_Sda_InOut IfxI2c1_SDA_P11_13_INOUT
Serial Data Output and input. More...
IFX_EXTERN IfxI2c_Sda_InOut IfxI2c1_SDA_P13_12_INOUT
Serial Data Output and input. More...
IFX_EXTERN const IfxI2c_Scl_InOut * | IfxI2c_Scl_InOut_pinTable [IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS]
IfxI2c_Scl_InOut table. More...
IFX_EXTERN const IfxI2c_Sda_InOut * | IfxI2c_Sda_InOut_pinTable [IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS]
IfxI2c_Sda_InOut table. More...

Detailed Description

I2C I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxI2c_PinMap.h.


iLLD_TC38A: IfxI2c_I2c.h File Reference

  • I2c
  • I2c
Data Structures | Enumerations | Functions
IfxI2c_I2c.h File Reference
iLLD » I2C

I2C I2C details. More...

#include "I2c/Std/IfxI2c.h"
#include "Cpu/Std/IfxCpu.h"
Include dependency graph for IfxI2c_I2c.h:

Go to the source code of this file.

Data Structures

struct | IfxI2c_I2c
Handler. More...
struct | IfxI2c_I2c_Config
Structure to configure the Module. More...
struct | IfxI2c_I2c_Device
Structure with slave device data. More...
struct | IfxI2c_I2c_deviceConfig
Structure to configure the device's data structure. More...

Enumerations

enum IfxI2c_I2c_Status {
IfxI2c_I2c_Status_ok = 0,
IfxI2c_I2c_Status_nak = 1,
IfxI2c_I2c_Status_al = 2,
IfxI2c_I2c_Status_busNotFree = 3,
IfxI2c_I2c_Status_error = 4
}

Functions

IFX_EXTERN float32 | IfxI2c_I2c_getBaudrate (IfxI2c_I2c *i2c)
returns the baudrate of SCL More...
IFX_EXTERN void | IfxI2c_I2c_initConfig (IfxI2c_I2c_Config *config, Ifx_I2C *i2c)
Fills the config structure with default values. More...
IFX_EXTERN void | IfxI2c_I2c_initDevice (IfxI2c_I2c_Device *i2cDevice, const IfxI2c_I2c_deviceConfig *i2cDeviceConfig)
Initializes the device Handler. More...
IFX_EXTERN void | IfxI2c_I2c_initDeviceConfig (IfxI2c_I2c_deviceConfig *i2cDeviceConfig, IfxI2c_I2c *i2c)
Fills the config structure of the slave device with default values. More...
IFX_EXTERN void | IfxI2c_I2c_initModule (IfxI2c_I2c *i2c, const IfxI2c_I2c_Config *config)
Initializes the Module. More...
IFX_EXTERN IfxI2c_I2c_Status | IfxI2c_I2c_read (IfxI2c_I2c_Device *i2cDevice, volatile uint8 *data, Ifx_SizeT size)
reads the I2c device More...
IFX_EXTERN IfxI2c_I2c_Status | IfxI2c_I2c_write (IfxI2c_I2c_Device *i2cDevice, volatile uint8 *data, Ifx_SizeT size)
writes to the I2c device More...

Detailed Description

I2C I2C details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxI2c_I2c.h.


iLLD_TC38A: IfxI2c.h File Reference

  • I2c
  • Std
Data Structures | Macros | Enumerations | Functions
IfxI2c.h File Reference
iLLD » I2C

I2C basic functionality. More...

#include "_Impl/IfxI2c_cfg.h"
#include "Scu/Std/IfxScuWdt.h"
#include "Scu/Std/IfxScuCcu.h"
#include "IfxI2c_bf.h"
#include "_PinMap/IfxI2c_PinMap.h"
#include "Src/Std/IfxSrc.h"
Include dependency graph for IfxI2c.h:

Go to the source code of this file.

Data Structures

struct IfxI2c_Pins
Pin Structure. More...

Macros

#define IFXI2C_HIGHSPEED_MASTER_CODE (0xEU)
Master code for high speed mode. More...

Enumerations

enum IfxI2c_AddressMode {
IfxI2c_AddressMode_7Bit = 0,
IfxI2c_AddressMode_10Bit = 1
}
Selects width of address bits (7 or 10 bits) Definition in Ifx_I2C.ADDRCFG.B.TBAM. More...
enum IfxI2c_BusStatus {
IfxI2c_BusStatus_idle = 0,
IfxI2c_BusStatus_started = 1,
IfxI2c_BusStatus_busyMaster = 2,
IfxI2c_BusStatus_remoteSlave = 3
}
enum IfxI2c_DtrInterruptSource {
IfxI2c_DtrInterruptSource_lastSingleRequest = IFX_I2C_IMSC_LSREQ_INT_OFF,
IfxI2c_DtrInterruptSource_singleRequest = IFX_I2C_IMSC_SREQ_INT_OFF,
IfxI2c_DtrInterruptSource_lastBurstRequest = IFX_I2C_IMSC_LBREQ_INT_OFF,
IfxI2c_DtrInterruptSource_burstRequest = IFX_I2C_IMSC_BREQ_INT_OFF
}
enables DTR interrupt flags Definition in Ifx.I2C.IMSC.U More...
enum IfxI2c_ErrorInterruptSource {
IfxI2c_ErrorInterruptSource_rxFifoUnderflow = IFX_I2C_ERRIRQSM_RXF_UFL_OFF,
IfxI2c_ErrorInterruptSource_rxFifoOverflow = IFX_I2C_ERRIRQSM_RXF_OFL_OFF,
IfxI2c_ErrorInterruptSource_txFifoUnderflow = IFX_I2C_ERRIRQSM_TXF_UFL_OFF,
IfxI2c_ErrorInterruptSource_txFifoOverflow = IFX_I2C_ERRIRQSM_TXF_OFL_OFF
}
enable error interrupt request source Definition in Ifx.I2C.ERRIRQSM.U More...
enum IfxI2c_Mode {
IfxI2c_Mode_StandardAndFast = 0,
IfxI2c_Mode_HighSpeed = 1
}
Select speed mode. Standard and Fast or High Speed mode. More...
enum IfxI2c_PinSelect {
IfxI2c_PinSelect_a = 0,
IfxI2c_PinSelect_b = 1,
IfxI2c_PinSelect_c = 2,
IfxI2c_PinSelect_d = 3,
IfxI2c_PinSelect_e = 4,
IfxI2c_PinSelect_f = 5,
IfxI2c_PinSelect_g = 6,
IfxI2c_PinSelect_h = 7
}
enum IfxI2c_ProtocolInterruptSource {
IfxI2c_ProtocolInterruptSource_addressMatch = IFX_I2C_PIRQSM_AM_OFF,
IfxI2c_ProtocolInterruptSource_generalCall = IFX_I2C_PIRQSM_GC_OFF,
IfxI2c_ProtocolInterruptSource_masterCode = IFX_I2C_PIRQSM_MC_OFF,
IfxI2c_ProtocolInterruptSource_arbitrationLost = IFX_I2C_PIRQSM_AL_OFF,
IfxI2c_ProtocolInterruptSource_notAcknowledgeReceived = IFX_I2C_PIRQSM_NACK_OFF,
IfxI2c_ProtocolInterruptSource_transmissionEnd = IFX_I2C_PIRQSM_TX_END_OFF,
IfxI2c_ProtocolInterruptSource_receiveMode = IFX_I2C_PIRQSM_RX_OFF
}
enable protocol interrupt source Definition in Ifx.I2C.PIRQSM.U More...
enum IfxI2c_SleepMode {
IfxI2c_SleepMode_enable = 0,
IfxI2c_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_I2C.CLC1.B.EDIS. More...

Functions

IFX_INLINE boolean | IfxI2c_busIsFree (Ifx_I2C *i2c)
Returns if the bus is free. More...
IFX_INLINE void | IfxI2c_clearAllDtrInterruptSources (Ifx_I2C *i2c)
clears all DTR interrupt sources More...
IFX_INLINE void | IfxI2c_clearAllErrorInterruptSources (Ifx_I2C *i2c)
clears all Error Interrupt sources More...
IFX_INLINE void | IfxI2c_clearAllProtocolInterruptSources (Ifx_I2C *i2c)
Clears all Protocol Interrupt sources. More...
IFX_INLINE void | IfxI2c_clearDtrInterruptSource (Ifx_I2C *i2c, IfxI2c_DtrInterruptSource source)
clears the specified source of DTR interrupt More...
IFX_INLINE void | IfxI2c_clearErrorInterruptSource (Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source)
clears the specified source of error interrupt More...
IFX_INLINE void | IfxI2c_clearProtocolInterruptSource (Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
clears the specified source of protocol interrupt More...
IFX_INLINE void | IfxI2c_clearRequestBuffer (Ifx_I2C *i2c)
Data request is cleared automatically. More...
IFX_INLINE void | IfxI2c_disableDtrInterruptSource (Ifx_I2C *i2c, IfxI2c_DtrInterruptSource source)
disables the specified source of DTR interupt More...
IFX_INLINE void | IfxI2c_disableErrorInterruptFlag (Ifx_I2C *i2c)
disables the error interrupt flag More...
IFX_INLINE void | IfxI2c_disableErrorInterruptSource (Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source)
disables the specified source of error interrupt More...
IFX_INLINE void | IfxI2c_disableProtocolInterruptFlag (Ifx_I2C *i2c)
disables the Protocol interrupt flag More...
IFX_INLINE void | IfxI2c_disableProtocolInterruptSource (Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
disables the specified source of protocol interrupt More...
IFX_INLINE void | IfxI2c_enableDtrInterruptSource (Ifx_I2C *i2c, IfxI2c_DtrInterruptSource source)
enables the specified source of DTR interupt More...
IFX_INLINE void | IfxI2c_enableErrorInterruptFlag (Ifx_I2C *i2c)
enables the error interrupt flag More...
IFX_INLINE void | IfxI2c_enableErrorInterruptSource (Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source)
enables the specified source of error interrupt More...
IFX_INLINE void | IfxI2c_enableProtocolInterruptFlag (Ifx_I2C *i2c)
enables the protocol interrupt flag More...
IFX_INLINE void | IfxI2c_enableProtocolInterruptSource (Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
enables the specified source of protocol interrupt More...
IFX_INLINE IfxI2c_BusStatus | IfxI2c_getBusStatus (Ifx_I2C *i2c)
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxI2c_getDtrSrcPointer (Ifx_I2C *i2c)
Returns the SRC pointer for I2C DTR interrupt. More...
IFX_INLINE boolean | IfxI2c_getDtrinterruptSourceStatus (Ifx_I2C *i2c, IfxI2c_DtrInterruptSource source)
returns the status of specified DTR interrupt source More...
IFX_INLINE boolean | IfxI2c_getErrorInterruptFlagStatus (Ifx_I2C *i2c)
returns the current status of error interrupt flag More...
IFX_INLINE boolean | IfxI2c_getErrorInterruptSourceStatus (Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source)
returns the status of the error interrupt source More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxI2c_getErrorSrcPointer (Ifx_I2C *i2c)
Returns the SRC pointer for I2C Error interrupt. More...
IFX_INLINE boolean | IfxI2c_getProtocolInterruptFlagStatus (Ifx_I2C *i2c)
returns the current raw status of protocol interrupt More...
IFX_INLINE boolean | IfxI2c_getProtocolInterruptSourceStatus (Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
returns the status of specified protocol interrupt source More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxI2c_getProtocolSrcPointer (Ifx_I2C *i2c)
Returns the SRC pointer for I2C Protocol interrupt. More...
IFX_INLINE boolean | IfxI2c_isFifoRequest (Ifx_I2C *i2c)
Returns if the Fifo is requesting new data. More...
IFX_INLINE void | IfxI2c_run (Ifx_I2C *i2c)
IFX_INLINE void | IfxI2c_setBitAddressMode (Ifx_I2C *i2c, IfxI2c_AddressMode mode)
Sets width of I2C address to 7 or 10 bits. More...
IFX_INLINE void | IfxI2c_setPinSelection (Ifx_I2C *i2c, IfxI2c_PinSelect pisel)
selects the pin More...
IFX_INLINE void | IfxI2c_setReceivePacketSize (Ifx_I2C *i2c, Ifx_SizeT size)
Sets the number of bytes to be received. More...
IFX_INLINE void | IfxI2c_setSlaveDeviceAddress (Ifx_I2C *i2c, uint16 address)
IFX_INLINE void | IfxI2c_setSleepMode (Ifx_I2C *i2c, IfxI2c_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxI2c_setTransmitPacketSize (Ifx_I2C *i2c, Ifx_SizeT size)
Sets the number of bytes to be tansmitted. More...
IFX_INLINE void | IfxI2c_stop (Ifx_I2C *i2c)
IFX_INLINE void | IfxI2c_waitBusFree (Ifx_I2C *i2c)
IFX_INLINE void | IfxI2c_writeFifo (Ifx_I2C *i2c, uint32 packet)
Writes a packet (4 bytes) into the Fifo. More...
IFX_EXTERN void | IfxI2c_configureAsMaster (Ifx_I2C *i2c)
Configures the Module as Master. More...
IFX_EXTERN void | IfxI2c_disableModule (Ifx_I2C *i2c)
Disables the I2c Module. More...
IFX_EXTERN void | IfxI2c_enableDtrInterrupt (Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
enables the DTR interrupt More...
IFX_EXTERN void | IfxI2c_enableErrorInterrupt (Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
Enables the Error interrupt. More...
IFX_EXTERN void | IfxI2c_enableModule (Ifx_I2C *i2c)
Enables the I2c Module. More...
IFX_EXTERN void | IfxI2c_enableProtocolInterrupt (void *i2c, IfxSrc_Tos typeOfService, uint16 priority)
Enables the protocol interrupt. More...
IFX_EXTERN Ifx_I2C * | IfxI2c_getAddress (IfxI2c_Index i2c)
IFX_EXTERN float32 | IfxI2c_getBaudrate (Ifx_I2C *i2c)
Returns the real Baudrate. More...
IFX_EXTERN IfxI2c_Index | IfxI2c_getIndex (Ifx_I2C *i2c)
API to get the resource index of the I2C specified. More...
IFX_EXTERN void | IfxI2c_initSclSdaPin (const IfxI2c_Scl_InOut *scl, const IfxI2c_Sda_InOut *sda, IfxPort_PadDriver padDriver)
IFX_EXTERN void | IfxI2c_releaseBus (Ifx_I2C *i2c)
Releases the bus, i.e puts a stop condition on the bus. More...
IFX_EXTERN void | IfxI2c_resetFifo (Ifx_I2C *i2c)
IFX_EXTERN void | IfxI2c_resetModule (Ifx_I2C *i2c)
resets the I2c kernel More...
IFX_EXTERN void | IfxI2c_setBaudrate (Ifx_I2C *i2c, float32 baudrate)
Calculates the desired baudrate. More...
IFX_EXTERN void | IfxI2c_configureHighSpeedMode (Ifx_I2C *i2c)
Configure the i2c master to high speed mode baudrate > 400kbits/s. More...

Detailed Description

I2C basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxI2c.h.

Macro Definition Documentation

◆ IFXI2C_HIGHSPEED_MASTER_CODE

#define IFXI2C_HIGHSPEED_MASTER_CODE (0xEU)

Master code for high speed mode.

Definition at line 69 of file IfxI2c.h.

Referenced by IfxI2c_configureHighSpeedMode(), IfxI2c_I2c_read(), and IfxI2c_I2c_write().

Function Documentation

◆ IfxI2c_configureHighSpeedMode()

IFX_EXTERN void IfxI2c_configureHighSpeedMode ( Ifx_I2C * i2c )

Configure the i2c master to high speed mode baudrate > 400kbits/s.

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 316 of file IfxI2c.c.

Referenced by IfxI2c_I2c_initModule().


iLLD_TC38A: IOM

Modules | Files
IOM
iLLD
Collaboration diagram for IOM:

Modules

Implementation
Standard Driver
IOM Driver
Obselete Interface for backward compatibility, (Not recommended for use)
Obselete Interface for backward compatibility, (Not recommended for use)

Files

file | IfxIom_cfg.h
IOM on-chip implementation data.
file | IfxIom_Driver.h
IOM DRIVER details.
file | IfxIom_Iom.h
IOM IOM details.
file | IfxIom.h
IOM basic functionality.

Detailed Description


iLLD_TC38A: Implementation

Modules
Implementation
iLLD » IOM
Collaboration diagram for Implementation:

Modules

Enum input signals
Enumeration inputs

Detailed Description


iLLD_TC38A: Enum input signals

Enumerations
Enum input signals
iLLD » IOM » Implementation
Collaboration diagram for Enum input signals:

Enumerations

enum IfxIom_MonInputSignal {
IfxIom_MonInputSignal_p = 0,
IfxIom_MonInputSignal_0 = 1,
IfxIom_MonInputSignal_1 = 2,
IfxIom_MonInputSignal_2 = 3
}
IOM_FPCCTRk.ISM. More...
enum IfxIom_RefInputSignal {
IfxIom_RefInputSignal_p = 0,
IfxIom_RefInputSignal_0 = 1,
IfxIom_RefInputSignal_1 = 2,
IfxIom_RefInputSignal_2 = 3,
IfxIom_RefInputSignal_xorCombiner = 4
}
IOM_FPCCTRk.ISR. More...

Detailed Description

Enumeration Type Documentation

◆ IfxIom_MonInputSignal

enum IfxIom_MonInputSignal

IOM_FPCCTRk.ISM.

Enumerator
IfxIom_MonInputSignal_p | Signal input Pn_IN (from portlogic) selected.
IfxIom_MonInputSignal_0 | Monitor Signal Input 0 selected.
IfxIom_MonInputSignal_1 | Monitor Signal Input 1 selected.
IfxIom_MonInputSignal_2 | Monitor Signal Input 2 selected.

Definition at line 76 of file IfxIom_cfg.h.

◆ IfxIom_RefInputSignal

enum IfxIom_RefInputSignal

IOM_FPCCTRk.ISR.

Enumerator
IfxIom_RefInputSignal_p | Signal input Pn_IN (from portlogic) selected.
IfxIom_RefInputSignal_0 | Monitor Signal Input 0 selected.
IfxIom_RefInputSignal_1 | Monitor Signal Input 1 selected.
IfxIom_RefInputSignal_2 | Monitor Signal Input 2 selected.
IfxIom_RefInputSignal_xorCombiner | GTM XOR Combiner selected.

Definition at line 86 of file IfxIom_cfg.h.


iLLD_TC38A: Enumeration inputs

Enumerations
Enumeration inputs
iLLD » IOM » Implementation
Collaboration diagram for Enumeration inputs:

Enumerations

enum IfxIom_MonInput {
IfxIom_MonInput_p33_0 = (IfxIom_MonInputSignal_p << 8) | 0x0,
IfxIom_MonInput_p33_1 = (IfxIom_MonInputSignal_p << 8) | 0x1,
IfxIom_MonInput_p33_2 = (IfxIom_MonInputSignal_p << 8) | 0x2,
IfxIom_MonInput_p33_3 = (IfxIom_MonInputSignal_p << 8) | 0x3,
IfxIom_MonInput_p33_4 = (IfxIom_MonInputSignal_p << 8) | 0x4,
IfxIom_MonInput_p33_5 = (IfxIom_MonInputSignal_p << 8) | 0x5,
IfxIom_MonInput_p33_6 = (IfxIom_MonInputSignal_p << 8) | 0x6,
IfxIom_MonInput_p33_7 = (IfxIom_MonInputSignal_p << 8) | 0x7,
IfxIom_MonInput_p33_8 = (IfxIom_MonInputSignal_p << 8) | 0x8,
IfxIom_MonInput_p33_9 = (IfxIom_MonInputSignal_p << 8) | 0x9,
IfxIom_MonInput_p33_10 = (IfxIom_MonInputSignal_p << 8) | 0xa,
IfxIom_MonInput_p33_11 = (IfxIom_MonInputSignal_p << 8) | 0xb,
IfxIom_MonInput_p33_12 = (IfxIom_MonInputSignal_p << 8) | 0xc,
IfxIom_MonInput_p20_12 = (IfxIom_MonInputSignal_p << 8) | 0xd,
IfxIom_MonInput_p20_13 = (IfxIom_MonInputSignal_p << 8) | 0xe,
IfxIom_MonInput_p20_14 = (IfxIom_MonInputSignal_p << 8) | 0xf,
IfxIom_MonInput_gtmTout22 = (IfxIom_MonInputSignal_0 << 8) | 0x0,
IfxIom_MonInput_gtmTout23 = (IfxIom_MonInputSignal_0 << 8) | 0x1,
IfxIom_MonInput_gtmTout24 = (IfxIom_MonInputSignal_0 << 8) | 0x2,
IfxIom_MonInput_gtmTout25 = (IfxIom_MonInputSignal_0 << 8) | 0x3,
IfxIom_MonInput_gtmTout26 = (IfxIom_MonInputSignal_0 << 8) | 0x4,
IfxIom_MonInput_gtmTout27 = (IfxIom_MonInputSignal_0 << 8) | 0x5,
IfxIom_MonInput_gtmTout28 = (IfxIom_MonInputSignal_0 << 8) | 0x6,
IfxIom_MonInput_gtmTout29 = (IfxIom_MonInputSignal_0 << 8) | 0x7,
IfxIom_MonInput_gtmTout30 = (IfxIom_MonInputSignal_0 << 8) | 0x8,
IfxIom_MonInput_gtmTout31 = (IfxIom_MonInputSignal_0 << 8) | 0x9,
IfxIom_MonInput_gtmTout32 = (IfxIom_MonInputSignal_0 << 8) | 0xa,
IfxIom_MonInput_gtmTout33 = (IfxIom_MonInputSignal_0 << 8) | 0xb,
IfxIom_MonInput_gtmTout34 = (IfxIom_MonInputSignal_0 << 8) | 0xc,
IfxIom_MonInput_gtmTout68 = (IfxIom_MonInputSignal_0 << 8) | 0xd,
IfxIom_MonInput_gtmTout69 = (IfxIom_MonInputSignal_0 << 8) | 0xe,
IfxIom_MonInput_gtmTout70 = (IfxIom_MonInputSignal_0 << 8) | 0xf,
IfxIom_MonInput_ccu60Cc62 = (IfxIom_MonInputSignal_1 << 8) | 0x0,
IfxIom_MonInput_ccu60Cc61 = (IfxIom_MonInputSignal_1 << 8) | 0x1,
IfxIom_MonInput_ccu60Cc60 = (IfxIom_MonInputSignal_1 << 8) | 0x2,
IfxIom_MonInput_ccu60Cout60 = (IfxIom_MonInputSignal_1 << 8) | 0x3,
IfxIom_MonInput_ccu60Cout61 = (IfxIom_MonInputSignal_1 << 8) | 0x4,
IfxIom_MonInput_ccu60Cout62 = (IfxIom_MonInputSignal_1 << 8) | 0x5,
IfxIom_MonInput_ccu60Cout63 = (IfxIom_MonInputSignal_1 << 8) | 0x6,
IfxIom_MonInput_ccu61Cout63 = (IfxIom_MonInputSignal_1 << 8) | 0x7,
IfxIom_MonInput_ccu61Cc60 = (IfxIom_MonInputSignal_1 << 8) | 0x8,
IfxIom_MonInput_ccu61Cc61 = (IfxIom_MonInputSignal_1 << 8) | 0x9,
IfxIom_MonInput_ccu61Cc62 = (IfxIom_MonInputSignal_1 << 8) | 0xa,
IfxIom_MonInput_ccu61Cout60 = (IfxIom_MonInputSignal_1 << 8) | 0xb,
IfxIom_MonInput_ccu61Cout61 = (IfxIom_MonInputSignal_1 << 8) | 0xc,
IfxIom_MonInput_ccu61Cout62 = (IfxIom_MonInputSignal_1 << 8) | 0xd,
IfxIom_MonInput_psi5Psitx0 = (IfxIom_MonInputSignal_1 << 8) | 0xe,
IfxIom_MonInput_psi5Psitx1 = (IfxIom_MonInputSignal_1 << 8) | 0xf,
IfxIom_MonInput_qspi0Mrst = (IfxIom_MonInputSignal_2 << 8) | 0x0,
IfxIom_MonInput_qspi1Mrst = (IfxIom_MonInputSignal_2 << 8) | 0x1,
IfxIom_MonInput_qspi2Mrst = (IfxIom_MonInputSignal_2 << 8) | 0x2,
IfxIom_MonInput_qspi3Mrst = (IfxIom_MonInputSignal_2 << 8) | 0x3,
IfxIom_MonInput_gnd = (IfxIom_MonInputSignal_2 << 8) | 0x4,
IfxIom_MonInput_canNode0Txd = (IfxIom_MonInputSignal_2 << 8) | 0x5,
IfxIom_MonInput_canNode1Txd = (IfxIom_MonInputSignal_2 << 8) | 0x6,
IfxIom_MonInput_canNode2Txd = (IfxIom_MonInputSignal_2 << 8) | 0x7,
IfxIom_MonInput_canNode3Txd = (IfxIom_MonInputSignal_2 << 8) | 0x8,
IfxIom_MonInput_gtmTout104 = (IfxIom_MonInputSignal_2 << 8) | 0x9,
IfxIom_MonInput_gtmTout105 = (IfxIom_MonInputSignal_2 << 8) | 0xa,
IfxIom_MonInput_gtmTout106 = (IfxIom_MonInputSignal_2 << 8) | 0xb,
IfxIom_MonInput_asclin0Atx = (IfxIom_MonInputSignal_2 << 8) | 0xc,
IfxIom_MonInput_asclin1Atx = (IfxIom_MonInputSignal_2 << 8) | 0xd,
IfxIom_MonInput_asclin2Atx = (IfxIom_MonInputSignal_2 << 8) | 0xe,
IfxIom_MonInput_asclin3Atx = (IfxIom_MonInputSignal_2 << 8) | 0xf
}
LAM mon inputs. More...
enum IfxIom_RefInput {
IfxIom_RefInput_p33_0 = (IfxIom_RefInputSignal_p << 8) | 0x0,
IfxIom_RefInput_p33_1 = (IfxIom_RefInputSignal_p << 8) | 0x1,
IfxIom_RefInput_p33_2 = (IfxIom_RefInputSignal_p << 8) | 0x2,
IfxIom_RefInput_p33_3 = (IfxIom_RefInputSignal_p << 8) | 0x3,
IfxIom_RefInput_p33_4 = (IfxIom_RefInputSignal_p << 8) | 0x4,
IfxIom_RefInput_p33_5 = (IfxIom_RefInputSignal_p << 8) | 0x5,
IfxIom_RefInput_p33_6 = (IfxIom_RefInputSignal_p << 8) | 0x6,
IfxIom_RefInput_p33_7 = (IfxIom_RefInputSignal_p << 8) | 0x7,
IfxIom_RefInput_p33_8 = (IfxIom_RefInputSignal_p << 8) | 0x8,
IfxIom_RefInput_p33_9 = (IfxIom_RefInputSignal_p << 8) | 0x9,
IfxIom_RefInput_p33_10 = (IfxIom_RefInputSignal_p << 8) | 0xa,
IfxIom_RefInput_p33_11 = (IfxIom_RefInputSignal_p << 8) | 0xb,
IfxIom_RefInput_p33_12 = (IfxIom_RefInputSignal_p << 8) | 0xc,
IfxIom_RefInput_p20_12 = (IfxIom_RefInputSignal_p << 8) | 0xd,
IfxIom_RefInput_p20_13 = (IfxIom_RefInputSignal_p << 8) | 0xe,
IfxIom_RefInput_p20_14 = (IfxIom_RefInputSignal_p << 8) | 0xf,
IfxIom_RefInput_gtmTout0 = (IfxIom_RefInputSignal_0 << 8) | 0x0,
IfxIom_RefInput_gtmTout1 = (IfxIom_RefInputSignal_0 << 8) | 0x1,
IfxIom_RefInput_gtmTout2 = (IfxIom_RefInputSignal_0 << 8) | 0x2,
IfxIom_RefInput_gtmTout3 = (IfxIom_RefInputSignal_0 << 8) | 0x3,
IfxIom_RefInput_gtmTout4 = (IfxIom_RefInputSignal_0 << 8) | 0x4,
IfxIom_RefInput_gtmTout5 = (IfxIom_RefInputSignal_0 << 8) | 0x5,
IfxIom_RefInput_gtmTout6 = (IfxIom_RefInputSignal_0 << 8) | 0x6,
IfxIom_RefInput_gtmTout7 = (IfxIom_RefInputSignal_0 << 8) | 0x7,
IfxIom_RefInput_gtmTout8 = (IfxIom_RefInputSignal_0 << 8) | 0x8,
IfxIom_RefInput_gtmTout9 = (IfxIom_RefInputSignal_0 << 8) | 0x9,
IfxIom_RefInput_gtmTout10 = (IfxIom_RefInputSignal_0 << 8) | 0xa,
IfxIom_RefInput_gtmTout11 = (IfxIom_RefInputSignal_0 << 8) | 0xb,
IfxIom_RefInput_gtmTout12 = (IfxIom_RefInputSignal_0 << 8) | 0xc,
IfxIom_RefInput_gtmTout13 = (IfxIom_RefInputSignal_0 << 8) | 0xd,
IfxIom_RefInput_gtmTout14 = (IfxIom_RefInputSignal_0 << 8) | 0xe,
IfxIom_RefInput_gtmTout15 = (IfxIom_RefInputSignal_0 << 8) | 0xf,
IfxIom_RefInput_ccu60Cout63 = (IfxIom_RefInputSignal_1 << 8) | 0x0,
IfxIom_RefInput_ccu60Cout62 = (IfxIom_RefInputSignal_1 << 8) | 0x1,
IfxIom_RefInput_ccu60Cout61 = (IfxIom_RefInputSignal_1 << 8) | 0x2,
IfxIom_RefInput_ccu60Cout60 = (IfxIom_RefInputSignal_1 << 8) | 0x3,
IfxIom_RefInput_ccu60Cc62 = (IfxIom_RefInputSignal_1 << 8) | 0x4,
IfxIom_RefInput_ccu60Cc61 = (IfxIom_RefInputSignal_1 << 8) | 0x5,
IfxIom_RefInput_ccu60Cc60 = (IfxIom_RefInputSignal_1 << 8) | 0x6,
IfxIom_RefInput_ccu61Cout63 = (IfxIom_RefInputSignal_1 << 8) | 0x7,
IfxIom_RefInput_ccu61Cout62 = (IfxIom_RefInputSignal_1 << 8) | 0x8,
IfxIom_RefInput_ccu61Cout61 = (IfxIom_RefInputSignal_1 << 8) | 0x9,
IfxIom_RefInput_ccu61Cout60 = (IfxIom_RefInputSignal_1 << 8) | 0xa,
IfxIom_RefInput_ccu61Cc62 = (IfxIom_RefInputSignal_1 << 8) | 0xb,
IfxIom_RefInput_ccu61Cc61 = (IfxIom_RefInputSignal_1 << 8) | 0xc,
IfxIom_RefInput_ccu61Cc60 = (IfxIom_RefInputSignal_1 << 8) | 0xd,
IfxIom_RefInput_psi5Psitx0 = (IfxIom_RefInputSignal_1 << 8) | 0xe,
IfxIom_RefInput_psi5Psitx2 = (IfxIom_RefInputSignal_1 << 8) | 0xf,
IfxIom_RefInput_qspi0Mrst = (IfxIom_RefInputSignal_2 << 8) | 0x0,
IfxIom_RefInput_qspi1Mrst = (IfxIom_RefInputSignal_2 << 8) | 0x1,
IfxIom_RefInput_qspi2Mrst = (IfxIom_RefInputSignal_2 << 8) | 0x2,
IfxIom_RefInput_qspi3Mrst = (IfxIom_RefInputSignal_2 << 8) | 0x3,
IfxIom_RefInput_gnd = (IfxIom_RefInputSignal_2 << 8) | 0x4,
IfxIom_RefInput_canNode0Txd = (IfxIom_RefInputSignal_2 << 8) | 0x5,
IfxIom_RefInput_canNode1Txd = (IfxIom_RefInputSignal_2 << 8) | 0x6,
IfxIom_RefInput_canNode2Txd = (IfxIom_RefInputSignal_2 << 8) | 0x7,
IfxIom_RefInput_canNode3Txd = (IfxIom_RefInputSignal_2 << 8) | 0x8,
IfxIom_RefInput_gtmTout107 = (IfxIom_RefInputSignal_2 << 8) | 0x9,
IfxIom_RefInput_gtmTout108 = (IfxIom_RefInputSignal_2 << 8) | 0xa,
IfxIom_RefInput_gtmTout109 = (IfxIom_RefInputSignal_2 << 8) | 0xb,
IfxIom_RefInput_asclin0Atx = (IfxIom_RefInputSignal_2 << 8) | 0xc,
IfxIom_RefInput_asclin1Atx = (IfxIom_RefInputSignal_2 << 8) | 0xd,
IfxIom_RefInput_asclin2Atx = (IfxIom_RefInputSignal_2 << 8) | 0xe,
IfxIom_RefInput_asclin3Atx = (IfxIom_RefInputSignal_2 << 8) | 0xf,
IfxIom_RefInput_exorCombiner = (IfxIom_RefInputSignal_xorCombiner << 8) | 0x0
}
LAM ref inputs. More...

Detailed Description

Enumeration Type Documentation

◆ IfxIom_MonInput

enum IfxIom_MonInput

LAM mon inputs.

Enumerator
IfxIom_MonInput_p33_0 | Value=0xXXYY where XX=ISM, YY=k.
IfxIom_MonInput_p33_1 |
IfxIom_MonInput_p33_2 |
IfxIom_MonInput_p33_3 |
IfxIom_MonInput_p33_4 |
IfxIom_MonInput_p33_5 |
IfxIom_MonInput_p33_6 |
IfxIom_MonInput_p33_7 |
IfxIom_MonInput_p33_8 |
IfxIom_MonInput_p33_9 |
IfxIom_MonInput_p33_10 |
IfxIom_MonInput_p33_11 |
IfxIom_MonInput_p33_12 |
IfxIom_MonInput_p20_12 |
IfxIom_MonInput_p20_13 |
IfxIom_MonInput_p20_14 |
IfxIom_MonInput_gtmTout22 |
IfxIom_MonInput_gtmTout23 |
IfxIom_MonInput_gtmTout24 |
IfxIom_MonInput_gtmTout25 |
IfxIom_MonInput_gtmTout26 |
IfxIom_MonInput_gtmTout27 |
IfxIom_MonInput_gtmTout28 |
IfxIom_MonInput_gtmTout29 |
IfxIom_MonInput_gtmTout30 |
IfxIom_MonInput_gtmTout31 |
IfxIom_MonInput_gtmTout32 |
IfxIom_MonInput_gtmTout33 |
IfxIom_MonInput_gtmTout34 |
IfxIom_MonInput_gtmTout68 |
IfxIom_MonInput_gtmTout69 |
IfxIom_MonInput_gtmTout70 |
IfxIom_MonInput_ccu60Cc62 |
IfxIom_MonInput_ccu60Cc61 |
IfxIom_MonInput_ccu60Cc60 |
IfxIom_MonInput_ccu60Cout60 |
IfxIom_MonInput_ccu60Cout61 |
IfxIom_MonInput_ccu60Cout62 |
IfxIom_MonInput_ccu60Cout63 |
IfxIom_MonInput_ccu61Cout63 |
IfxIom_MonInput_ccu61Cc60 |
IfxIom_MonInput_ccu61Cc61 |
IfxIom_MonInput_ccu61Cc62 |
IfxIom_MonInput_ccu61Cout60 |
IfxIom_MonInput_ccu61Cout61 |
IfxIom_MonInput_ccu61Cout62 |
IfxIom_MonInput_psi5Psitx0 |
IfxIom_MonInput_psi5Psitx1 |
IfxIom_MonInput_qspi0Mrst |
IfxIom_MonInput_qspi1Mrst |
IfxIom_MonInput_qspi2Mrst |
IfxIom_MonInput_qspi3Mrst |
IfxIom_MonInput_gnd |
IfxIom_MonInput_canNode0Txd |
IfxIom_MonInput_canNode1Txd |
IfxIom_MonInput_canNode2Txd |
IfxIom_MonInput_canNode3Txd |
IfxIom_MonInput_gtmTout104 |
IfxIom_MonInput_gtmTout105 |
IfxIom_MonInput_gtmTout106 |
IfxIom_MonInput_asclin0Atx |
IfxIom_MonInput_asclin1Atx |
IfxIom_MonInput_asclin2Atx |
IfxIom_MonInput_asclin3Atx |

Definition at line 101 of file IfxIom_cfg.h.

◆ IfxIom_RefInput

enum IfxIom_RefInput

LAM ref inputs.

Enumerator
IfxIom_RefInput_p33_0
IfxIom_RefInput_p33_1
IfxIom_RefInput_p33_2
IfxIom_RefInput_p33_3
IfxIom_RefInput_p33_4
IfxIom_RefInput_p33_5
IfxIom_RefInput_p33_6
IfxIom_RefInput_p33_7
IfxIom_RefInput_p33_8
IfxIom_RefInput_p33_9
IfxIom_RefInput_p33_10
IfxIom_RefInput_p33_11
IfxIom_RefInput_p33_12
IfxIom_RefInput_p20_12
IfxIom_RefInput_p20_13
IfxIom_RefInput_p20_14
IfxIom_RefInput_gtmTout0
IfxIom_RefInput_gtmTout1
IfxIom_RefInput_gtmTout2
IfxIom_RefInput_gtmTout3
IfxIom_RefInput_gtmTout4
IfxIom_RefInput_gtmTout5
IfxIom_RefInput_gtmTout6
IfxIom_RefInput_gtmTout7
IfxIom_RefInput_gtmTout8
IfxIom_RefInput_gtmTout9
IfxIom_RefInput_gtmTout10
IfxIom_RefInput_gtmTout11
IfxIom_RefInput_gtmTout12
IfxIom_RefInput_gtmTout13
IfxIom_RefInput_gtmTout14
IfxIom_RefInput_gtmTout15
IfxIom_RefInput_ccu60Cout63
IfxIom_RefInput_ccu60Cout62
IfxIom_RefInput_ccu60Cout61
IfxIom_RefInput_ccu60Cout60
IfxIom_RefInput_ccu60Cc62
IfxIom_RefInput_ccu60Cc61
IfxIom_RefInput_ccu60Cc60
IfxIom_RefInput_ccu61Cout63
IfxIom_RefInput_ccu61Cout62
IfxIom_RefInput_ccu61Cout61
IfxIom_RefInput_ccu61Cout60
IfxIom_RefInput_ccu61Cc62
IfxIom_RefInput_ccu61Cc61
IfxIom_RefInput_ccu61Cc60
IfxIom_RefInput_psi5Psitx0
IfxIom_RefInput_psi5Psitx2
IfxIom_RefInput_qspi0Mrst
IfxIom_RefInput_qspi1Mrst
IfxIom_RefInput_qspi2Mrst
IfxIom_RefInput_qspi3Mrst
IfxIom_RefInput_gnd
IfxIom_RefInput_canNode0Txd
IfxIom_RefInput_canNode1Txd
IfxIom_RefInput_canNode2Txd
IfxIom_RefInput_canNode3Txd
IfxIom_RefInput_gtmTout107
IfxIom_RefInput_gtmTout108
IfxIom_RefInput_gtmTout109
IfxIom_RefInput_asclin0Atx
IfxIom_RefInput_asclin1Atx
IfxIom_RefInput_asclin2Atx
IfxIom_RefInput_asclin3Atx
IfxIom_RefInput_exorCombiner

Definition at line 171 of file IfxIom_cfg.h.


iLLD_TC38A: Standard Driver

Modules
Standard Driver
iLLD » IOM
Collaboration diagram for Standard Driver:

Modules

Enumeration
Utility Functions
Enumeration Obsolete (NOt recommended for use)
Module Functions Obsolete (NOt recommended for use)

Detailed Description


iLLD_TC38A: Enumeration

Enumerations
Enumeration
iLLD » IOM » Standard Driver
Collaboration diagram for Enumeration:

Enumerations

enum IfxIom_LamEventSource {
IfxIom_LamEventSource_mon = 0,
IfxIom_LamEventSource_monXorRef = 1
}
Event source configuration IOM_LAMCFGm.MOS. More...
enum IfxIom_LamEventTrigger {
IfxIom_LamEventTrigger_none = 0,
IfxIom_LamEventTrigger_risingEdge = 1,
IfxIom_LamEventTrigger_fallingEdge = 2,
IfxIom_LamEventTrigger_anyEdge = 3
}
Event trigger configuration IOM_LAMCFGm.EDS upper two bits. More...
enum IfxIom_LamEventWindowClearEvent {
IfxIom_LamEventWindowClearEvent_none = 0,
IfxIom_LamEventWindowClearEvent_risingEdge = 1,
IfxIom_LamEventWindowClearEvent_fallingEdge = 2,
IfxIom_LamEventWindowClearEvent_anyEdge = 3
}
Timer clear event configuration IOM_LAMCFGm.EDS upper lower bits. More...
enum IfxIom_LamEventWindowControlSource {
IfxIom_LamEventWindowControlSource_ref = 0,
IfxIom_LamEventWindowControlSource_mon = 1
}
Timer control source configuration IOM_LAMCFGm.EWS. More...
enum IfxIom_LamEventWindowRunControl {
IfxIom_LamEventWindowRunControl_freeRunning = 0,
IfxIom_LamEventWindowRunControl_gated = 1
}
Timer run configuration IOM_LAMCFGm.RMS. More...
enum IfxIom_LamFilterMode {
IfxIom_LamFilterMode_delayDebounceBothEdge = 0,
IfxIom_LamFilterMode_immediateDebounceBothEdge = 1,
IfxIom_LamFilterMode_immediateDebounceRisingEdge = 2,
IfxIom_LamFilterMode_immediateDebounceFallingEdge = 3,
IfxIom_LamFilterMode_delayDebounceRisingEdgeImmediateDebounceFallingEdge = 4,
IfxIom_LamFilterMode_immediateDebounceRisingEdgeDelayDebounceFallingEdge = 5,
IfxIom_LamFilterMode_prescalerOnRisingEdge = 6,
IfxIom_LamFilterMode_prescalerOnFallingEdge = 7,
IfxIom_LamFilterMode_noFilter = 8
}
FPC filer mode IOM_FPCCTRk.MOD, with additional definition for noFilter. More...
enum IfxIom_LamId {
IfxIom_LamId_0 = 0,
IfxIom_LamId_1,
IfxIom_LamId_2,
IfxIom_LamId_3,
IfxIom_LamId_4,
IfxIom_LamId_5,
IfxIom_LamId_6,
IfxIom_LamId_7,
IfxIom_LamId_8,
IfxIom_LamId_9,
IfxIom_LamId_10,
IfxIom_LamId_11,
IfxIom_LamId_12,
IfxIom_LamId_13,
IfxIom_LamId_14,
IfxIom_LamId_15
}
Specifies the Logic Module Analyser Module Number. More...
enum IfxIom_SleepMode {
IfxIom_SleepMode_enable = 0,
IfxIom_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_IOM.CLC.B.EDIS. More...

Detailed Description

Enumeration Type Documentation

◆ IfxIom_LamEventSource

enum IfxIom_LamEventSource

Event source configuration IOM_LAMCFGm.MOS.

Enumerator
IfxIom_LamEventSource_mon | Monitor signal is sourced directly from FPCmch.
IfxIom_LamEventSource_monXorRef | Monitor signal is EXOR'd with FPCrch.

Definition at line 72 of file IfxIom.h.

◆ IfxIom_LamEventTrigger

enum IfxIom_LamEventTrigger

Event trigger configuration IOM_LAMCFGm.EDS upper two bits.

Enumerator
IfxIom_LamEventTrigger_none | Neither edge used to gate event generation.
IfxIom_LamEventTrigger_risingEdge | Positive edge used to gate event generation.
IfxIom_LamEventTrigger_fallingEdge | Negative edge used to gate event generation.
IfxIom_LamEventTrigger_anyEdge | Either edge used to gate event generation.

Definition at line 81 of file IfxIom.h.

◆ IfxIom_LamEventWindowClearEvent

enum IfxIom_LamEventWindowClearEvent

Timer clear event configuration IOM_LAMCFGm.EDS upper lower bits.

Enumerator
IfxIom_LamEventWindowClearEvent_none | Neither edge used to clear event windowcounter.
IfxIom_LamEventWindowClearEvent_risingEdge | Positive edge used to clear event windowcounter.
IfxIom_LamEventWindowClearEvent_fallingEdge | Negative edge used to clear event windowcounter.
IfxIom_LamEventWindowClearEvent_anyEdge | Either edge used to clear event windowcounter.

Definition at line 92 of file IfxIom.h.

◆ IfxIom_LamEventWindowControlSource

enum IfxIom_LamEventWindowControlSource

Timer control source configuration IOM_LAMCFGm.EWS.

Enumerator
IfxIom_LamEventWindowControlSource_ref | Event window generation is determined from the reference signal.
IfxIom_LamEventWindowControlSource_mon | Event window generation is determined from the monitor signal.

Definition at line 103 of file IfxIom.h.

◆ IfxIom_LamEventWindowRunControl

enum IfxIom_LamEventWindowRunControl

Timer run configuration IOM_LAMCFGm.RMS.

Enumerator
IfxIom_LamEventWindowRunControl_freeRunning | Event window generation is free-running.
IfxIom_LamEventWindowRunControl_gated | Event window generation is gated with the monitor or reference signal.

Definition at line 112 of file IfxIom.h.

◆ IfxIom_LamFilterMode

enum IfxIom_LamFilterMode

FPC filer mode IOM_FPCCTRk.MOD, with additional definition for noFilter.

Enumerator
IfxIom_LamFilterMode_delayDebounceBothEdge | Delayed Debounce Filter Mode on both edges.
IfxIom_LamFilterMode_immediateDebounceBothEdge | Immediate Debounce Filter Mode on both edges.
IfxIom_LamFilterMode_immediateDebounceRisingEdge | Rising edge: Immediate Debounce Filter Mode, falling edge: no filtering.
IfxIom_LamFilterMode_immediateDebounceFallingEdge | Rising edge: no filtering, falling edge: Immediate Debounce Filter Mode.
IfxIom_LamFilterMode_delayDebounceRisingEdgeImmediateDebounceFallingEdge | Rising edge: Delayed Debounce Filter Mode, falling edge: Immediate Debounce Filter Mode.
IfxIom_LamFilterMode_immediateDebounceRisingEdgeDelayDebounceFallingEdge | Immediate Debounce Filter Mode, falling edge: Delayed Debounce Filter Mode.
IfxIom_LamFilterMode_prescalerOnRisingEdge | Prescaler Mode (triggered on rising edge)
IfxIom_LamFilterMode_prescalerOnFallingEdge | Prescaler Mode (triggered on falling edge)
IfxIom_LamFilterMode_noFilter | No filter (value used for software only )

Definition at line 121 of file IfxIom.h.

◆ IfxIom_LamId

enum IfxIom_LamId

Specifies the Logic Module Analyser Module Number.

Enumerator
IfxIom_LamId_0 | Specifies the LAM Id0.
IfxIom_LamId_1 | Specifies the LAM Id1.
IfxIom_LamId_2 | Specifies the LAM Id2.
IfxIom_LamId_3 | Specifies the LAM Id3.
IfxIom_LamId_4 | Specifies the LAM Id4.
IfxIom_LamId_5 | Specifies the LAM Id5.
IfxIom_LamId_6 | Specifies the LAM Id6.
IfxIom_LamId_7 | Specifies the LAM Id7.
IfxIom_LamId_8 | Specifies the LAM Id8.
IfxIom_LamId_9 | Specifies the LAM Id9.
IfxIom_LamId_10 | Specifies the LAM Id10.
IfxIom_LamId_11 | Specifies the LAM Id11.
IfxIom_LamId_12 | Specifies the LAM Id12.
IfxIom_LamId_13 | Specifies the LAM Id13.
IfxIom_LamId_14 | Specifies the LAM Id14.
IfxIom_LamId_15 | Specifies the LAM Id15.

Definition at line 136 of file IfxIom.h.

◆ IfxIom_SleepMode

enum IfxIom_SleepMode

Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_IOM.CLC.B.EDIS.

Enumerator
IfxIom_SleepMode_enable | Enables sleep mode.
IfxIom_SleepMode_disable | Disables sleep mode.

Definition at line 159 of file IfxIom.h.


iLLD_TC38A: Utility Functions

Functions
Utility Functions
iLLD » IOM » Standard Driver
Collaboration diagram for Utility Functions:

Functions

IFX_INLINE void | IfxIom_disableModule (Ifx_IOM *iom)
Disables the IOM module . More...
IFX_INLINE void | IfxIom_enableModule (Ifx_IOM *iom, uint8 clockDivider)
Enable the IOM module control. More...
IFX_INLINE void | IfxIom_setSleepMode (Ifx_IOM *iom, IfxIom_SleepMode mode)
Enable/disable the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxIom_setTimerValueOfFilterAndPrescalerCell (Ifx_IOM *iom, IfxIom_FpcChannelId channelId, uint16 value)
Enable/disable the sensitivity of the module to sleep signal. More...
IFX_EXTERN float32 | IfxIom_getFrequency (Ifx_IOM *iom)
Return the frequency used for the filter and timers clock. More...
IFX_EXTERN void | IfxIom_resetModule (Ifx_IOM *iom)
Reset the IOM module. More...

Detailed Description

Function Documentation

◆ IfxIom_disableModule()

IFX_INLINE void IfxIom_disableModule ( Ifx_IOM * iom )

Disables the IOM module .

Parameters
iom Pointer to IOM module registers
Returns
None

Definition at line 444 of file IfxIom.h.

◆ IfxIom_enableModule()

IFX_INLINE void IfxIom_enableModule | ( | Ifx_IOM * | iom,
 |  | uint8 | clockDivider
 | ) |  |

Enable the IOM module control.

Parameters
iom | Pointer to IOM module registers
clockDivider | IOM clock divider. Set to 1 for max clock.
Returns
None

Definition at line 454 of file IfxIom.h.

Referenced by IfxIom_Iom_initModule().

◆ IfxIom_getFrequency()

IFX_EXTERN float32 IfxIom_getFrequency ( Ifx_IOM * iom )

Return the frequency used for the filter and timers clock.

Parameters
iom Pointer to IOM module registers

Definition at line 53 of file IfxIom.c.

Referenced by IfxIom_Driver_initLam().

◆ IfxIom_resetModule()

IFX_EXTERN void IfxIom_resetModule ( Ifx_IOM * iom )

Reset the IOM module.

Parameters
iom Pointer to IOM module registers
Returns
None

Definition at line 66 of file IfxIom.c.

Referenced by IfxIom_Iom_deInitModule().

◆ IfxIom_setSleepMode()

IFX_INLINE void IfxIom_setSleepMode | ( | Ifx_IOM * | iom,
 |  | IfxIom_SleepMode | mode
 | ) |  |

Enable/disable the sensitivity of the module to sleep signal.

Parameters
iom | Pointer to IOM registers
mode | Mode selection (enable/disable)
Returns
None

Definition at line 474 of file IfxIom.h.

◆ IfxIom_setTimerValueOfFilterAndPrescalerCell()

IFX_INLINE void IfxIom_setTimerValueOfFilterAndPrescalerCell | ( | Ifx_IOM * | iom,
 |  | IfxIom_FpcChannelId | channelId,
 |  | uint16 | value
 | ) |  |

Enable/disable the sensitivity of the module to sleep signal.

Parameters
iom | Pointer to IOM registers
channelId | FPC channel ID
value | Prescaler Value
Returns
None

Definition at line 483 of file IfxIom.h.


iLLD_TC38A: Enumeration Obsolete (NOt recommended for use)

Enumerations
Enumeration Obsolete (NOt recommended for use)
iLLD » IOM » Standard Driver
Collaboration diagram for Enumeration Obsolete (NOt recommended for use):

Enumerations

enum IfxIom_EdgeClearType {
IfxIom_EdgeClearType_rising = 0,
IfxIom_EdgeClearType_falling = 1,
IfxIom_EdgeClearType_risingFalling = 2
}
Specifies the edge type which need to be cleared. More...
enum IfxIom_EventActiveEdgeSelection {
IfxIom_EventActiveEdgeSelection_neitherGateNeitherClear = 0,
IfxIom_EventActiveEdgeSelection_neitherGatePositiveClear = 1,
IfxIom_EventActiveEdgeSelection_neitherGateNegativeClear = 2,
IfxIom_EventActiveEdgeSelection_neitherGateEitherClear = 3,
IfxIom_EventActiveEdgeSelection_positiveGateNeitherClear = 4,
IfxIom_EventActiveEdgeSelection_positiveGatePositiveClear = 5,
IfxIom_EventActiveEdgeSelection_positiveGateNegativeClear = 6,
IfxIom_EventActiveEdgeSelection_positiveGateEitherClear = 7,
IfxIom_EventActiveEdgeSelection_negativeGateNeitherClear = 8,
IfxIom_EventActiveEdgeSelection_negativeGatePositiveClear = 9,
IfxIom_EventActiveEdgeSelection_negativeGateNegativeClear = 10,
IfxIom_EventActiveEdgeSelection_negativeGateEitherClear = 11,
IfxIom_EventActiveEdgeSelection_eitherGateNeitherClear = 12,
IfxIom_EventActiveEdgeSelection_eitherGatePositiveClear = 13,
IfxIom_EventActiveEdgeSelection_eitherGateNegativeClear = 14,
IfxIom_EventActiveEdgeSelection_eitherGateEitherClear = 15
}
LAMCFG[lamId].EDS, Specifies which active edges of the monitor and reference signals are used for the event window generation. More...
enum IfxIom_EventCounterChannel {
IfxIom_EventCounterChannel_0 = 0,
IfxIom_EventCounterChannel_1,
IfxIom_EventCounterChannel_2,
IfxIom_EventCounterChannel_3,
IfxIom_EventCounterChannel_4,
IfxIom_EventCounterChannel_5,
IfxIom_EventCounterChannel_6,
IfxIom_EventCounterChannel_7,
IfxIom_EventCounterChannel_8,
IfxIom_EventCounterChannel_9,
IfxIom_EventCounterChannel_10,
IfxIom_EventCounterChannel_11,
IfxIom_EventCounterChannel_12,
IfxIom_EventCounterChannel_13,
IfxIom_EventCounterChannel_14,
IfxIom_EventCounterChannel_15
}
ECMCCFG.SELCx(x= 0,1,2,3), Specifies which channel event output is to be routed to counterCn. More...
enum IfxIom_EventCounterThreshold {
IfxIom_EventCounterThreshold_disable = 0,
IfxIom_EventCounterThreshold_1 = 1,
IfxIom_EventCounterThreshold_2,
IfxIom_EventCounterThreshold_3,
IfxIom_EventCounterThreshold_4,
IfxIom_EventCounterThreshold_5,
IfxIom_EventCounterThreshold_6,
IfxIom_EventCounterThreshold_7,
IfxIom_EventCounterThreshold_8,
IfxIom_EventCounterThreshold_9,
IfxIom_EventCounterThreshold_10,
IfxIom_EventCounterThreshold_11,
IfxIom_EventCounterThreshold_12,
IfxIom_EventCounterThreshold_13,
IfxIom_EventCounterThreshold_14,
IfxIom_EventCounterThreshold_15
}
ECMCCFG.THRCx(x= 0,1,2,3), Specifies the threshold count value. Upon the counter meeting the threshold, the counter event output becomes active high. More...
enum IfxIom_EventSource {
IfxIom_EventSource_reference = 0,
IfxIom_EventSource_monitor = 1
}
LAMCFG[lamId].EWS, Specifies whether the event window generation is from the monitor or reference signal. More...
enum IfxIom_FilterMode {
IfxIom_FilterMode_delayedDebounce = 0,
IfxIom_FilterMode_immediateDebounce = 1,
IfxIom_FilterMode_risingEdgeImmediateDebounce = 2,
IfxIom_FilterMode_fallingEdgeImmediateDebounce = 3,
IfxIom_FilterMode_risingEdgeDelayedFallingEdgeImmediateDebounce = 4,
IfxIom_FilterMode_fallingEdgeDelayedRisingEdgeImmediateDebounce = 5,
IfxIom_FilterMode_risingEdgePrescaler = 6,
IfxIom_FilterMode_FallingEdgePrescaler = 7
}
FPCCTR[channelId].MOD, Specifies the Filter & Prescaler Cell mode. More...
enum IfxIom_FpcChannelId {
IfxIom_FpcChannelId_0 = 0,
IfxIom_FpcChannelId_1,
IfxIom_FpcChannelId_2,
IfxIom_FpcChannelId_3,
IfxIom_FpcChannelId_4,
IfxIom_FpcChannelId_5,
IfxIom_FpcChannelId_6,
IfxIom_FpcChannelId_7,
IfxIom_FpcChannelId_8,
IfxIom_FpcChannelId_9,
IfxIom_FpcChannelId_10,
IfxIom_FpcChannelId_11,
IfxIom_FpcChannelId_12,
IfxIom_FpcChannelId_13,
IfxIom_FpcChannelId_14,
IfxIom_FpcChannelId_15
}
Specifies the number of Filter & Prescaler Cell channel Id. More...
enum IfxIom_LamMonitorInputChannel {
IfxIom_LamMonitorInputChannel_0 = 0,
IfxIom_LamMonitorInputChannel_1,
IfxIom_LamMonitorInputChannel_2,
IfxIom_LamMonitorInputChannel_3,
IfxIom_LamMonitorInputChannel_4,
IfxIom_LamMonitorInputChannel_5,
IfxIom_LamMonitorInputChannel_6,
IfxIom_LamMonitorInputChannel_7,
IfxIom_LamMonitorInputChannel_8,
IfxIom_LamMonitorInputChannel_9,
IfxIom_LamMonitorInputChannel_10,
IfxIom_LamMonitorInputChannel_11,
IfxIom_LamMonitorInputChannel_12,
IfxIom_LamMonitorInputChannel_13,
IfxIom_LamMonitorInputChannel_14,
IfxIom_LamMonitorInputChannel_15
}
LAMCFG[lamId].MCS, Specifies which FPC/mux block monitor output signal is to be used for LAM block. More...
enum IfxIom_LamMonitorSource {
IfxIom_LamMonitorSource_directFpcMonitor = 0,
IfxIom_LamMonitorSource_exoredFpcMonitor = 1
}
LAMCFG[lamId].MOS, Specifies whether the monitor signal from the FPC monitor channel is sourced directly or compared with the reference signal from the FPC reference channel for the event compare. More...
enum IfxIom_LamReferenceInputChannel {
IfxIom_LamReferenceInputChannel_0 = 0,
IfxIom_LamReferenceInputChannel_1,
IfxIom_LamReferenceInputChannel_2,
IfxIom_LamReferenceInputChannel_3,
IfxIom_LamReferenceInputChannel_4,
IfxIom_LamReferenceInputChannel_5,
IfxIom_LamReferenceInputChannel_6,
IfxIom_LamReferenceInputChannel_7,
IfxIom_LamReferenceInputChannel_8,
IfxIom_LamReferenceInputChannel_9,
IfxIom_LamReferenceInputChannel_10,
IfxIom_LamReferenceInputChannel_11,
IfxIom_LamReferenceInputChannel_12,
IfxIom_LamReferenceInputChannel_13,
IfxIom_LamReferenceInputChannel_14,
IfxIom_LamReferenceInputChannel_15
}
LAMCFG[lamId].RCS, Specifies which FPC/mux block reference output signal is to be used for LAM block. More...
enum IfxIom_LamRunMode {
IfxIom_LamRunMode_freeRunning = 0,
IfxIom_LamRunMode_gated = 1
}
LAMCFG[lamId].RMS, Specifies whether the event window generation is free-running or gated with the monitor or reference. More...
enum IfxIom_MonitorSignal {
IfxIom_MonitorSignal_portLogic = 0,
IfxIom_MonitorSignal_0 = 1,
IfxIom_MonitorSignal_1,
IfxIom_MonitorSignal_2
}
FPCCTR[channelId].ISM, Specifies the monitor signal input for Filter & Prescaler cell. More...
enum IfxIom_ReferenceSignal {
IfxIom_ReferenceSignal_portLogic = 0,
IfxIom_ReferenceSignal_0 = 1,
IfxIom_ReferenceSignal_1,
IfxIom_ReferenceSignal_2,
IfxIom_ReferenceSignal_gtmEXORCombiner = 4
}
FPCCTR[channelId].ISR,Specifies the reference signal input for Filter & Prescaler cell. More...

Detailed Description

Enumeration Type Documentation

◆ IfxIom_EdgeClearType

enum IfxIom_EdgeClearType

Specifies the edge type which need to be cleared.

Enumerator
IfxIom_EdgeClearType_rising | Specifies rising edge to be cleared.
IfxIom_EdgeClearType_falling | Specifies falling edge to be cleared.
IfxIom_EdgeClearType_risingFalling | Specifies both rising falling edge to be cleared.

Definition at line 171 of file IfxIom.h.

◆ IfxIom_EventActiveEdgeSelection

enum IfxIom_EventActiveEdgeSelection

LAMCFG[lamId].EDS, Specifies which active edges of the monitor and reference signals are used for the event window generation.

Enumerator
IfxIom_EventActiveEdgeSelection_neitherGateNeitherClear | neither edge used to gate event generation and neither edge used to clear event windowcounter.
IfxIom_EventActiveEdgeSelection_neitherGatePositiveClear | neither edge used to gate event generation and positive edge used to clear event windowcounter.
IfxIom_EventActiveEdgeSelection_neitherGateNegativeClear | neither edge used to gate event generation and negative edge used to clear event windowcounter.
IfxIom_EventActiveEdgeSelection_neitherGateEitherClear | neither edge used to gate event generation and either edge used to clear event windowcounter.
IfxIom_EventActiveEdgeSelection_positiveGateNeitherClear | positive edge used to gate event generation and neither edge used to clear event windowcounter.
IfxIom_EventActiveEdgeSelection_positiveGatePositiveClear | positive edge used to gate event generation and positive edge used to clear event windowcounter.
IfxIom_EventActiveEdgeSelection_positiveGateNegativeClear | positive edge used to gate event generation and negative edge used to clear event windowcounter.
IfxIom_EventActiveEdgeSelection_positiveGateEitherClear | positive edge used to gate event generation and negative edge used to clear event windowcounter.
IfxIom_EventActiveEdgeSelection_negativeGateNeitherClear | negative edge used to gate event generation and neither edge used to clear event windowcounter.
IfxIom_EventActiveEdgeSelection_negativeGatePositiveClear | negative edge used to gate event generation and positive edge used to clear event windowcounter.
IfxIom_EventActiveEdgeSelection_negativeGateNegativeClear | negative edge used to gate event generation and negative edge used to clear event windowcounter.
IfxIom_EventActiveEdgeSelection_negativeGateEitherClear | negative edge used to gate event generation and either edge used to clear event windowcounter.
IfxIom_EventActiveEdgeSelection_eitherGateNeitherClear | either edge used to gate event generation and neither edge used to clear event windowcounter.
IfxIom_EventActiveEdgeSelection_eitherGatePositiveClear | either edge used to gate event generation and positive edge used to clear event windowcounter.
IfxIom_EventActiveEdgeSelection_eitherGateNegativeClear | either edge used to gate event generation and negative edge used to clear event windowcounter.
IfxIom_EventActiveEdgeSelection_eitherGateEitherClear | either edge used to gate event generation and either edge used to clear event windowcounter.

Definition at line 180 of file IfxIom.h.

◆ IfxIom_EventCounterChannel

enum IfxIom_EventCounterChannel

ECMCCFG.SELCx(x= 0,1,2,3), Specifies which channel event output is to be routed to counterCn.

Enumerator
IfxIom_EventCounterChannel_0 | channel 0 event output to be routed to event counter
IfxIom_EventCounterChannel_1 | channel 1 event output to be routed to event counter
IfxIom_EventCounterChannel_2 | channel 2 event output to be routed to event counter
IfxIom_EventCounterChannel_3 | channel 3 event output to be routed to event counter
IfxIom_EventCounterChannel_4 | channel 4 event output to be routed to event counter
IfxIom_EventCounterChannel_5 | channel 5 event output to be routed to event counter
IfxIom_EventCounterChannel_6 | channel 6 event output to be routed to event counter
IfxIom_EventCounterChannel_7 | channel 7 event output to be routed to event counter
IfxIom_EventCounterChannel_8 | channel 8 event output to be routed to event counter
IfxIom_EventCounterChannel_9 | channel 9 event output to be routed to event counter
IfxIom_EventCounterChannel_10 | channel 10 event output to be routed to event counter
IfxIom_EventCounterChannel_11 | channel 11 event output to be routed to event counter
IfxIom_EventCounterChannel_12 | channel 12 event output to be routed to event counter
IfxIom_EventCounterChannel_13 | channel 13 event output to be routed to event counter
IfxIom_EventCounterChannel_14 | channel 14 event output to be routed to event counter
IfxIom_EventCounterChannel_15 | channel 15 event output to be routed to event counter

Definition at line 202 of file IfxIom.h.

◆ IfxIom_EventCounterThreshold

enum IfxIom_EventCounterThreshold

ECMCCFG.THRCx(x= 0,1,2,3), Specifies the threshold count value. Upon the counter meeting the threshold, the counter event output becomes active high.

Enumerator
IfxIom_EventCounterThreshold_disable | Specifies counter event output set to inactive.
IfxIom_EventCounterThreshold_1 | Specifies threshold count value 1.
IfxIom_EventCounterThreshold_2 | Specifies threshold count value 2.
IfxIom_EventCounterThreshold_3 | Specifies threshold count value 3.
IfxIom_EventCounterThreshold_4 | Specifies threshold count value 4.
IfxIom_EventCounterThreshold_5 | Specifies threshold count value 5.
IfxIom_EventCounterThreshold_6 | Specifies threshold count value 6.
IfxIom_EventCounterThreshold_7 | Specifies threshold count value 7.
IfxIom_EventCounterThreshold_8 | Specifies threshold count value 8.
IfxIom_EventCounterThreshold_9 | Specifies threshold count value 9.
IfxIom_EventCounterThreshold_10 | Specifies threshold count value 10.
IfxIom_EventCounterThreshold_11 | Specifies threshold count value 11.
IfxIom_EventCounterThreshold_12 | Specifies threshold count value 12.
IfxIom_EventCounterThreshold_13 | Specifies threshold count value 13.
IfxIom_EventCounterThreshold_14 | Specifies threshold count value 14.
IfxIom_EventCounterThreshold_15 | Specifies threshold count value 15.

Definition at line 224 of file IfxIom.h.

◆ IfxIom_EventSource

enum IfxIom_EventSource

LAMCFG[lamId].EWS, Specifies whether the event window generation is from the monitor or reference signal.

Enumerator
IfxIom_EventSource_reference | Specifies the event window generation is from the reference signal.
IfxIom_EventSource_monitor | Specifies the event window generation is from the monitor signal.

Definition at line 247 of file IfxIom.h.

◆ IfxIom_FilterMode

enum IfxIom_FilterMode

FPCCTR[channelId].MOD, Specifies the Filter & Prescaler Cell mode.

Enumerator
IfxIom_FilterMode_delayedDebounce | Specifies Delayed Debounce filter mode.
IfxIom_FilterMode_immediateDebounce | Specifies Immediate Debounce filter mode.
IfxIom_FilterMode_risingEdgeImmediateDebounce | Specifies Rising Edge Immediate Debounce filter mode.
IfxIom_FilterMode_fallingEdgeImmediateDebounce | Specifies Falling Edge Immediate Debounce filter mode.
IfxIom_FilterMode_risingEdgeDelayedFallingEdgeImmediateDebounce | Specifies RisingEdge Delayed FallingEdge Immediate Debounce filter mode.
IfxIom_FilterMode_fallingEdgeDelayedRisingEdgeImmediateDebounce | Specifies FallingEdge Delayed RisingEdge Immediate Debounce filter mode.
IfxIom_FilterMode_risingEdgePrescaler | Specifies RisingEdge Prescaler filter mode.
IfxIom_FilterMode_FallingEdgePrescaler | Specifies FallingEdge Prescaler filter mode.

Definition at line 255 of file IfxIom.h.

◆ IfxIom_FpcChannelId

enum IfxIom_FpcChannelId

Specifies the number of Filter & Prescaler Cell channel Id.

Enumerator
IfxIom_FpcChannelId_0 | Specifies the FPC channel 0.
IfxIom_FpcChannelId_1 | Specifies the FPC channel 1.
IfxIom_FpcChannelId_2 | Specifies the FPC channel 2.
IfxIom_FpcChannelId_3 | Specifies the FPC channel 3.
IfxIom_FpcChannelId_4 | Specifies the FPC channel 4.
IfxIom_FpcChannelId_5 | Specifies the FPC channel 5.
IfxIom_FpcChannelId_6 | Specifies the FPC channel 6.
IfxIom_FpcChannelId_7 | Specifies the FPC channel 7.
IfxIom_FpcChannelId_8 | Specifies the FPC channel 8.
IfxIom_FpcChannelId_9 | Specifies the FPC channel 9.
IfxIom_FpcChannelId_10 | Specifies the FPC channel 10.
IfxIom_FpcChannelId_11 | Specifies the FPC channel 11.
IfxIom_FpcChannelId_12 | Specifies the FPC channel 12.
IfxIom_FpcChannelId_13 | Specifies the FPC channel 13.
IfxIom_FpcChannelId_14 | Specifies the FPC channel 14.
IfxIom_FpcChannelId_15 | Specifies the FPC channel 15.

Definition at line 269 of file IfxIom.h.

◆ IfxIom_LamMonitorInputChannel

enum IfxIom_LamMonitorInputChannel

LAMCFG[lamId].MCS, Specifies which FPC/mux block monitor output signal is to be used for LAM block.

Enumerator
IfxIom_LamMonitorInputChannel_0 | Specifies 0 FPC/mux block monitor output signal is to be used for LAM block.
IfxIom_LamMonitorInputChannel_1 | Specifies 1 FPC/mux block monitor output signal is to be used for LAM block.
IfxIom_LamMonitorInputChannel_2 | Specifies 2 FPC/mux block monitor output signal is to be used for LAM block.
IfxIom_LamMonitorInputChannel_3 | Specifies 3 FPC/mux block monitor output signal is to be used for LAM block.
IfxIom_LamMonitorInputChannel_4 | Specifies 4 FPC/mux block monitor output signal is to be used for LAM block.
IfxIom_LamMonitorInputChannel_5 | Specifies 5 FPC/mux block monitor output signal is to be used for LAM block.
IfxIom_LamMonitorInputChannel_6 | Specifies 6 FPC/mux block monitor output signal is to be used for LAM block.
IfxIom_LamMonitorInputChannel_7 | Specifies 7 FPC/mux block monitor output signal is to be used for LAM block.
IfxIom_LamMonitorInputChannel_8 | Specifies 8 FPC/mux block monitor output signal is to be used for LAM block.
IfxIom_LamMonitorInputChannel_9 | Specifies 9 FPC/mux block monitor output signal is to be used for LAM block.
IfxIom_LamMonitorInputChannel_10 | Specifies 10 FPC/mux block monitor output signal is to be used for LAM block.
IfxIom_LamMonitorInputChannel_11 | Specifies 11 FPC/mux block monitor output signal is to be used for LAM block.
IfxIom_LamMonitorInputChannel_12 | Specifies 12 FPC/mux block monitor output signal is to be used for LAM block.
IfxIom_LamMonitorInputChannel_13 | Specifies 13 FPC/mux block monitor output signal is to be used for LAM block.
IfxIom_LamMonitorInputChannel_14 | Specifies 14 FPC/mux block monitor output signal is to be used for LAM block.
IfxIom_LamMonitorInputChannel_15 | Specifies 15 FPC/mux block monitor output signal is to be used for LAM block.

Definition at line 291 of file IfxIom.h.

◆ IfxIom_LamMonitorSource

enum IfxIom_LamMonitorSource

LAMCFG[lamId].MOS, Specifies whether the monitor signal from the FPC monitor channel is sourced directly or compared with the reference signal from the FPC reference channel for the event compare.

Enumerator
IfxIom_LamMonitorSource_directFpcMonitor | Monitor signal is sourced directly from FPC monitor channel.
IfxIom_LamMonitorSource_exoredFpcMonitor | Monitor signal is EXORed with FPC reference channel.

Definition at line 313 of file IfxIom.h.

◆ IfxIom_LamReferenceInputChannel

enum IfxIom_LamReferenceInputChannel

LAMCFG[lamId].RCS, Specifies which FPC/mux block reference output signal is to be used for LAM block.

Enumerator
IfxIom_LamReferenceInputChannel_0 | Specifies 0 FPC/mux block reference output signal is to be used for LAM block.
IfxIom_LamReferenceInputChannel_1 | Specifies 1 FPC/mux block reference output signal is to be used for LAM block.
IfxIom_LamReferenceInputChannel_2 | Specifies 2 FPC/mux block reference output signal is to be used for LAM block.
IfxIom_LamReferenceInputChannel_3 | Specifies 3 FPC/mux block reference output signal is to be used for LAM block.
IfxIom_LamReferenceInputChannel_4 | Specifies 4 FPC/mux block reference output signal is to be used for LAM block.
IfxIom_LamReferenceInputChannel_5 | Specifies 5 FPC/mux block reference output signal is to be used for LAM block.
IfxIom_LamReferenceInputChannel_6 | Specifies 6 FPC/mux block reference output signal is to be used for LAM block.
IfxIom_LamReferenceInputChannel_7 | Specifies 7 FPC/mux block reference output signal is to be used for LAM block.
IfxIom_LamReferenceInputChannel_8 | Specifies 8 FPC/mux block reference output signal is to be used for LAM block.
IfxIom_LamReferenceInputChannel_9 | Specifies 9 FPC/mux block reference output signal is to be used for LAM block.
IfxIom_LamReferenceInputChannel_10 | Specifies 10 FPC/mux block reference output signal is to be used for LAM block.
IfxIom_LamReferenceInputChannel_11 | Specifies 11 FPC/mux block reference output signal is to be used for LAM block.
IfxIom_LamReferenceInputChannel_12 | Specifies 12 FPC/mux block reference output signal is to be used for LAM block.
IfxIom_LamReferenceInputChannel_13 | Specifies 13 FPC/mux block reference output signal is to be used for LAM block.
IfxIom_LamReferenceInputChannel_14 | Specifies 14 FPC/mux block reference output signal is to be used for LAM block.
IfxIom_LamReferenceInputChannel_15 | Specifies 15 FPC/mux block reference output signal is to be used for LAM block.

Definition at line 321 of file IfxIom.h.

◆ IfxIom_LamRunMode

enum IfxIom_LamRunMode

LAMCFG[lamId].RMS, Specifies whether the event window generation is free-running or gated with the monitor or reference.

Enumerator
IfxIom_LamRunMode_freeRunning | Specifies event window generation is free-running.
IfxIom_LamRunMode_gated | Specifies event window generation is gated with the monitor or reference signal.

Definition at line 343 of file IfxIom.h.

◆ IfxIom_MonitorSignal

enum IfxIom_MonitorSignal

FPCCTR[channelId].ISM, Specifies the monitor signal input for Filter & Prescaler cell.

Enumerator
IfxIom_MonitorSignal_portLogic | Specifies the specific pad pins as monitor signal.
IfxIom_MonitorSignal_0 | Specifies the monitor signal 0.
IfxIom_MonitorSignal_1 | Specifies the monitor signal 1.
IfxIom_MonitorSignal_2 | Specifies the monitor signal 2.

Definition at line 352 of file IfxIom.h.

◆ IfxIom_ReferenceSignal

enum IfxIom_ReferenceSignal

FPCCTR[channelId].ISR,Specifies the reference signal input for Filter & Prescaler cell.

Enumerator
IfxIom_ReferenceSignal_portLogic | Specifies the specific pad pins as reference signal.
IfxIom_ReferenceSignal_0 | Specifies the reference signal 0.
IfxIom_ReferenceSignal_1 | Specifies the reference signal 1.
IfxIom_ReferenceSignal_2 | Specifies the reference signal 2.
IfxIom_ReferenceSignal_gtmEXORCombiner | Specifies the GTM EXOR Combiner pins.

Definition at line 362 of file IfxIom.h.


iLLD_TC38A: Module Functions Obsolete (NOt recommended for use)

Functions
Module Functions Obsolete (NOt recommended for use)
iLLD » IOM » Standard Driver
Collaboration diagram for Module Functions Obsolete (NOt recommended for use):

Functions

IFX_INLINE uint16 IfxIom_eventTriggerHistory (Ifx_IOM *iom)

Detailed Description

Function Documentation

◆ IfxIom_eventTriggerHistory()

IFX_INLINE uint16 IfxIom_eventTriggerHistory ( Ifx_IOM * iom )
Parameters
iom pointer to IOM register space
Returns
the last generated event

Definition at line 465 of file IfxIom.h.


iLLD_TC38A: IOM Driver

Modules
IOM Driver
iLLD » IOM
Collaboration diagram for IOM Driver:

Modules

Driver Functions
Structures

Detailed Description


iLLD_TC38A: Driver Functions

Functions
Driver Functions
iLLD » IOM » IOM Driver
Collaboration diagram for Driver Functions:

Functions

IFX_EXTERN void | IfxIom_Driver_clearAllGlitch (IfxIom_Driver *driver)
Clear all LAM monitor and reference glitch flags. More...
IFX_EXTERN void | IfxIom_Driver_clearHistory (IfxIom_Driver *driver)
Clear the IOM event history. More...
IFX_EXTERN void | IfxIom_Driver_clearLamMonGlitch (IfxIom_Driver_Lam *driver)
Clear the LAM monitor signal glitch flag. More...
IFX_EXTERN void | IfxIom_Driver_clearLamRefGlitch (IfxIom_Driver_Lam *driver)
Clear the LAM reference signal glitch flag. More...
IFX_EXTERN uint32 | IfxIom_Driver_disableEvents (IfxIom_Driver *driver)
Disable all event generation. More...
IFX_EXTERN void | IfxIom_Driver_disableLamEvent (IfxIom_Driver_Lam *driver)
Disable the event generation for the LAM. More...
IFX_EXTERN void | IfxIom_Driver_enableLamEvent (IfxIom_Driver_Lam *driver)
Enable the event genration for the LAM. More...
IFX_EXTERN void | IfxIom_Driver_getHistory (IfxIom_Driver *driver, uint16 *a, uint16 *b, uint16 *c, uint16 *d)
Return the IOM event history. In returned mask value, bit0= LAM0, bit1=LAM1, ... More...
IFX_EXTERN boolean | IfxIom_Driver_init (IfxIom_Driver *driver, IfxIom_Driver_Config *config)
Initialize the IOM Must be called before IfxIom_Driver_initLam() More...
IFX_EXTERN void | IfxIom_Driver_initConfig (IfxIom_Driver_Config *config, Ifx_IOM *module)
Set the IOM default configuration. More...
IFX_EXTERN boolean | IfxIom_Driver_initLam (IfxIom_Driver_Lam *driver, IfxIom_Driver_LamConfig *config)
Initialize the LAM channel. More...
IFX_EXTERN void | IfxIom_Driver_initLamConfig (IfxIom_Driver_LamConfig *config, IfxIom_Driver *driver)
Set the LAM default configuration. More...
IFX_EXTERN void | IfxIom_Driver_isLamMonGlitch (IfxIom_Driver_Lam *driver, boolean *risingEdgeGlitch, boolean *fallingEdgeGlitch)
Return the LAM monitor glitch flags. More...
IFX_EXTERN void | IfxIom_Driver_isLamRefGlitch (IfxIom_Driver_Lam *driver, boolean *risingEdgeGlitch, boolean *fallingEdgeGlitch)
Return the LAM reference glitch flags. More...
IFX_EXTERN void | IfxIom_Driver_restoreEvents (IfxIom_Driver *driver, uint32 mask)
Restore the IOM event mask. More...

Detailed Description

Function Documentation

◆ IfxIom_Driver_clearAllGlitch()

IFX_EXTERN void IfxIom_Driver_clearAllGlitch ( IfxIom_Driver * driver )

Clear all LAM monitor and reference glitch flags.

Parameters
driver Pointer to the IOM driver object
Returns
None

Definition at line 66 of file IfxIom_Driver.c.

◆ IfxIom_Driver_clearHistory()

IFX_EXTERN void IfxIom_Driver_clearHistory ( IfxIom_Driver * driver )

Clear the IOM event history.

Parameters
driver Pointer to the IOM driver object
Returns
None

Definition at line 73 of file IfxIom_Driver.c.

◆ IfxIom_Driver_clearLamMonGlitch()

IFX_EXTERN void IfxIom_Driver_clearLamMonGlitch ( IfxIom_Driver_Lam * driver )

Clear the LAM monitor signal glitch flag.

Parameters
driver Pointer to the LAM driver object
Returns
None

Definition at line 80 of file IfxIom_Driver.c.

◆ IfxIom_Driver_clearLamRefGlitch()

IFX_EXTERN void IfxIom_Driver_clearLamRefGlitch ( IfxIom_Driver_Lam * driver )

Clear the LAM reference signal glitch flag.

Parameters
driver Pointer to the LAM driver object
Returns
None

Definition at line 91 of file IfxIom_Driver.c.

◆ IfxIom_Driver_disableEvents()

IFX_EXTERN uint32 IfxIom_Driver_disableEvents ( IfxIom_Driver * driver )

Disable all event generation.

Parameters
driver Pointer to the IOM driver object
Returns
Return the configured events

Definition at line 102 of file IfxIom_Driver.c.

◆ IfxIom_Driver_disableLamEvent()

IFX_EXTERN void IfxIom_Driver_disableLamEvent ( IfxIom_Driver_Lam * driver )

Disable the event generation for the LAM.

Parameters
driver Pointer to the LAM driver object
Returns
None

Definition at line 111 of file IfxIom_Driver.c.

◆ IfxIom_Driver_enableLamEvent()

IFX_EXTERN void IfxIom_Driver_enableLamEvent ( IfxIom_Driver_Lam * driver )

Enable the event genration for the LAM.

Parameters
driver Pointer to the LAM driver object
Returns
None

Definition at line 132 of file IfxIom_Driver.c.

◆ IfxIom_Driver_getHistory()

IFX_EXTERN void IfxIom_Driver_getHistory | ( | IfxIom_Driver * | driver,
 |  | uint16 * | a,
 |  | uint16 * | b,
 |  | uint16 * | c,
 |  | uint16 * | d
 | ) |  |

Return the IOM event history. In returned mask value, bit0= LAM0, bit1=LAM1, ...

Parameters
driver | Pointer to the IOM driver object
a | Event mask of history level 0 (Last event)
b | Event mask of history level 1
c | Event mask of history level 2
d | Event mask of history level 3 (oldest event)
Returns
None

Definition at line 153 of file IfxIom_Driver.c.

◆ IfxIom_Driver_init()

IFX_EXTERN boolean IfxIom_Driver_init | ( | IfxIom_Driver * | driver,
 |  | IfxIom_Driver_Config * | config
 | ) |  |

Initialize the IOM Must be called before IfxIom_Driver_initLam()

Parameters
driver | Pointer to the IOM driver object. Will be initialized by the function
config | IOM driver configuration
Returns
TRUE in case of success else FALSE

Definition at line 168 of file IfxIom_Driver.c.

◆ IfxIom_Driver_initConfig()

IFX_EXTERN void IfxIom_Driver_initConfig | ( | IfxIom_Driver_Config * | config,
 |  | Ifx_IOM * | module
 | ) |  |

Set the IOM default configuration.

Parameters
config | IOM configuration. Will be initialized by the function
module | Pointer to the IOM module
Returns
None

Definition at line 177 of file IfxIom_Driver.c.

◆ IfxIom_Driver_initLam()

IFX_EXTERN boolean IfxIom_Driver_initLam | ( | IfxIom_Driver_Lam * | driver,
 |  | IfxIom_Driver_LamConfig * | config
 | ) |  |

Initialize the LAM channel.

Parameters
driver | Pointer to the LAM driver object. Will be initialized by the function
config | LAM driver configuration
Returns
TRUE in case of success else FALSE

Definition at line 183 of file IfxIom_Driver.c.

◆ IfxIom_Driver_initLamConfig()

IFX_EXTERN void IfxIom_Driver_initLamConfig | ( | IfxIom_Driver_LamConfig * | config,
 |  | IfxIom_Driver * | driver
 | ) |  |

Set the LAM default configuration.

Parameters
config | LAM configuration. Will be initialized by the function
driver | Pointer to the IOM driver object
Returns
None

Definition at line 333 of file IfxIom_Driver.c.

◆ IfxIom_Driver_isLamMonGlitch()

IFX_EXTERN void IfxIom_Driver_isLamMonGlitch | ( | IfxIom_Driver_Lam * | driver,
 |  | boolean * | risingEdgeGlitch,
 |  | boolean * | fallingEdgeGlitch
 | ) |  |

Return the LAM monitor glitch flags.

Parameters
driver | Pointer to the LAM driver object
risingEdgeGlitch | Set to TRUE by the function if rising edge glitch were detected on the monitor signal
fallingEdgeGlitch | Set to TRUE by the function if falling edge glitch were detected on the monitor signal
Returns
None

Definition at line 362 of file IfxIom_Driver.c.

◆ IfxIom_Driver_isLamRefGlitch()

IFX_EXTERN void IfxIom_Driver_isLamRefGlitch | ( | IfxIom_Driver_Lam * | driver,
 |  | boolean * | risingEdgeGlitch,
 |  | boolean * | fallingEdgeGlitch
 | ) |  |

Return the LAM reference glitch flags.

Parameters
driver | Pointer to the LAM driver object
risingEdgeGlitch | Set to TRUE by the function if rising edge glitch were detected on the reference signal
fallingEdgeGlitch | Set to TRUE by the function if falling edge glitch were detected on the reference signal
Returns
None

Definition at line 381 of file IfxIom_Driver.c.

◆ IfxIom_Driver_restoreEvents()

IFX_EXTERN void IfxIom_Driver_restoreEvents | ( | IfxIom_Driver * | driver,
 |  | uint32 | mask
 | ) |  |

Restore the IOM event mask.

Parameters
driver | Pointer to the IOM driver object
mask | Event configuration as returned by IfxIom_Driver_disableEvents()
Returns
None

Definition at line 400 of file IfxIom_Driver.c.


iLLD_TC38A: Structures

Data Structures
Structures
iLLD » IOM » IOM Driver
Collaboration diagram for Structures:

Data Structures

struct | IfxIom_Driver_LamFilterConfig
IOM LAM filter configuration. More...
struct | IfxIom_Driver
IOM driver. More...
struct | IfxIom_Driver_LamEventConfig
IOM LAM event configuration. More...
struct | IfxIom_Driver_LamEventWindowConfig
IOM LAM event window configuration. More...
struct | IfxIom_Driver_LamMonConfig
IOM LAM monitor input configuration. More...
struct | IfxIom_Driver_LamRefConfig
IOM LAM reference input configuration. More...
struct | IfxIom_Driver_Config
IOM Driver Configuration. More...
struct | IfxIom_Driver_Lam
IOM LAM object. More...
struct | IfxIom_Driver_LamConfig
IOM LAM configuration. More...

Detailed Description

Data Structure Documentation

◆ IfxIom_Driver_LamFilterConfig

struct IfxIom_Driver_LamFilterConfig

IOM LAM filter configuration.

Definition at line 122 of file IfxIom_Driver.h.

Data Fields
boolean | clearTimerOnGlitch | If set, the timer is cleared on glitch, else it is decremented.
float32 | fallingEdgeFilterTime | Falling edge filter time in second for immediate debounce filter mode. In delayed filter time this corresponds to the minimal filter time.
IfxIom_LamFilterMode | mode | Filter mode.
uint32 | prescalerFactor | Prescaler factor, must be > 0, only valid for prescaler mode.
float32 | risingEdgeFilterTime | Rising edge filter time in second for immediate debounce filter mode. In delayed filter time this corresponds to the minimal filter time.

◆ IfxIom_Driver

struct IfxIom_Driver

IOM driver.

Definition at line 137 of file IfxIom_Driver.h.

Data Fields
uint8 | accumulatedEventUsedMask | Indicates the used / unused accumulated counter ECM. bit0=CTS0, bit1=CTS2, ... 0=unused, 1=used.
uint16 | lamUsedMask | Indicates the used / unused LAM. bit0=LAM0, bit1=LAM2, ... 0=unused, 1=used.
Ifx_IOM * | module | Pointer to IOM module SFR set.

◆ IfxIom_Driver_LamEventConfig

struct IfxIom_Driver_LamEventConfig

IOM LAM event configuration.

Definition at line 146 of file IfxIom_Driver.h.

Data Fields
IfxIom_LamEventSource | source | Event source.
IfxIom_LamEventTrigger | trigger | Event trigger.

◆ IfxIom_Driver_LamEventWindowConfig

struct IfxIom_Driver_LamEventWindowConfig

IOM LAM event window configuration.

Definition at line 154 of file IfxIom_Driver.h.

Data Fields
IfxIom_LamEventWindowClearEvent | clearEvent | Timer clear event.
IfxIom_LamEventWindowControlSource | controlSource | Timer control source.
boolean | inverted | If TRUE, the event window is inverted.
IfxIom_LamEventWindowRunControl | run | Timer run control.
float32 | threshold | Event window threshold in second. If 0, no event are generated.

◆ IfxIom_Driver_LamMonConfig

struct IfxIom_Driver_LamMonConfig

IOM LAM monitor input configuration.

Definition at line 165 of file IfxIom_Driver.h.

Collaboration diagram for IfxIom_Driver_LamMonConfig:
[legend]
Data Fields
IfxIom_Driver_LamFilterConfig | filter | Filter configuration.
IfxIom_MonInput | input | Monitor input.
boolean | inverted | If TRUE, the signal is inverted.

◆ IfxIom_Driver_LamRefConfig

struct IfxIom_Driver_LamRefConfig

IOM LAM reference input configuration.

Definition at line 174 of file IfxIom_Driver.h.

Collaboration diagram for IfxIom_Driver_LamRefConfig:
[legend]
Data Fields
IfxIom_Driver_LamFilterConfig | filter | Filter configuration.
IfxIom_RefInput | input | Reference input.
boolean | inverted | If TRUE, the signal is inverted.

◆ IfxIom_Driver_Config

struct IfxIom_Driver_Config

IOM Driver Configuration.

Definition at line 187 of file IfxIom_Driver.h.

Data Fields
Ifx_IOM * module IOM module SFRs.

◆ IfxIom_Driver_Lam

struct IfxIom_Driver_Lam

IOM LAM object.

Definition at line 194 of file IfxIom_Driver.h.

Collaboration diagram for IfxIom_Driver_Lam:
[legend]
Data Fields
sint8 | accumulatedCounterIndex | Accumulated counter used. Negative value means no counter used.
IfxIom_LamId | channel | LAM Channel.
IfxIom_Driver * | iomDriver | Main IOM Driver.
uint8 | monIndex | Monitor input index.
IfxIom_MonInputSignal | monInput | Monitor input.
uint8 | refIndex | Reference input index.
IfxIom_RefInputSignal | refInput | Reference input.
uint8 | systemEventTriggerThreshold | Specifies the number of LAM event that triggers the System Event. Value 0 disables the trigger event. Value one enables the trigger event. Value from 2 to 15 will use the counter to filter events, max 4 counters exists for the IOM.

◆ IfxIom_Driver_LamConfig

struct IfxIom_Driver_LamConfig

IOM LAM configuration.

Definition at line 208 of file IfxIom_Driver.h.

Collaboration diagram for IfxIom_Driver_LamConfig:
[legend]
Data Fields
IfxIom_LamId | channel | LAM channel to be used.
IfxIom_Driver_LamEventConfig | event | LAM event configuration.
IfxIom_Driver_LamEventWindowConfig | eventWindow | LAM eventWindow configuration.
IfxIom_Driver * | iomDriver | Pointer to the IOM driver.
IfxIom_Driver_LamMonConfig | mon | LAM Monitor input configuration.
IfxIom_Driver_LamRefConfig | ref | LAM reference input configuration.
uint8 | systemEventTriggerThreshold | Specifies the number of LAM event that triggers the System Event. Value 0 disables the trigger event. Value one enables the trigger event. Value from 2 to 15 will use the counter to filter events, max 4 counters exists for the IOM.


iLLD_TC38A: Obselete Interface for backward compatibility, (Not recommended for use)

Modules
Obselete Interface for backward compatibility, (Not recommended for use)
iLLD » IOM
Collaboration diagram for Obselete Interface for backward compatibility, (Not recommended for use):

Modules

How to use the IOM Iom Interface driver?

Detailed Description


iLLD_TC38A: How to use the IOM Iom Interface driver?

How to use the IOM Iom Interface driver?
iLLD » IOM » Obselete Interface for backward compatibility, (Not recommended for use)
Collaboration diagram for How to use the IOM Iom Interface driver?:

IOM Module takes the monitor and reference signals from applicable system peripherals(GTM,CCU6,QSPI,PSI5,ASCLIN) and also from external hardware(Sensors) and compare them with respect to one another and generate the alarm events which are routed to SMU.

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Iom/Iom/IfxIom_Iom.h>

Variables

Declare the IOM handle and the configuration buffers as global variables in your C code:

static IfxIom_Iom_EcmConfig ecmConfig;
static IfxIom_Iom_FpcConfig fpcConfig;
static IfxIom_Iom_LamConfig lamConfig;
static IfxIom_Iom iom;

Module Initialisation

The module initialisation can be done in the same function. Here an example:

//Initialize the module handle
IfxIom_Iom_initModuleConfig(&iom, &MODULE_IOM);
//Enable the module control
IfxIom_Iom_initModule(&iom);
//Initialize the default Filter & Prescaler Cell channel configuration buffer
IfxIom_Iom_initFpcChannelConfig(&fpcConfig);
//Filter & Prescaler Cell channel supplied configuration
fpcConfig.channelId = IfxIom_FpcChannelId_2;
fpcConfig.filterMode = IfxIom_FilterMode_delayedDebounce;
fpcConfig.comparatorThreshold = 15;
fpcConfig.monitorSignal = IfxIom_MonitorSignal_portLogic;
fpcConfig.referenceSignal = IfxIom_ReferenceSignal_0;
fpcConfig.timerReset = TRUE;
//Initialize the Filter & Prescaler Cell channel with supplied configuration
IfxIom_Iom_initFpcChannel(&iom, &fpcConfig);
//Initialize the default Logic Analyser Module configuration buffer
IfxIom_Iom_initAnalyserConfig(&lamConfig);
//Logic Analyser Module Block supplied configuration
lamConfig.monitorSignalInverted = FALSE;
lamConfig.referenceSignalInverted = FALSE;
lamConfig.lamMonitorSource = IfxIom_LamMonitorSource_directFpcMonitor;
lamConfig.lamMode = IfxIom_LamRunMode_freeRunning;
lamConfig.eventSource = IfxIom_EventSource_monitor;
lamConfig.eventActiveEdgeSelection = IfxIom_EventActiveEdgeSelection_negativeGateEitherClear;
lamConfig.eventWindowInverted = TRUE;
lamConfig.lamMonitorInputChannel = IfxIom_LamMonitorInputChannel_2;
lamConfig.lamReferenceInputChannel = IfxIom_LamReferenceInputChannel_2;
lamConfig.lamId = IfxIom_LamId_2;
lamConfig.eventWindowThreshold = 15;
//Initialize the Logic Analyser Module with supplied configuration
IfxIom_Iom_initAnalyser(&iom, &lamConfig);
//Initialize the default Event Combiner Module configuration buffer
IfxIom_Iom_initCombinerConfig(&ecmConfig);
//Initialize the Logic Analyser Module with supplied configuration
IfxIom_Iom_initCombiner(&iom, &ecmConfig);

The IOM is ready for use now!

Once the Iom driver is initialized, GTM or CCU6 or QSPI or PSI5 or ASCLIN should be configured to get the two signals with some delay by which event occur.

The tested two signals are at below pins.

To generate GTM signals see IfxLld_Gtm_Tom_PwmHl_Usage

Two GTM signals at below PWM out pins are used as monitor or reference to IOM

First pin is for Monitor and second pin is for reference. The above initialized IOM generates the event to SMU if pulse or duty cycle too short.


iLLD_TC38A: Obselete Interface for backward compatibility, (Not recommended for use)

Modules
Obselete Interface for backward compatibility, (Not recommended for use)
iLLD » IOM
Collaboration diagram for Obselete Interface for backward compatibility, (Not recommended for use):

Modules

Data Structures
Module Functions
Operative Functions

Detailed Description


iLLD_TC38A: Data Structures

Data Structures
Data Structures
iLLD » IOM » Obselete Interface for backward compatibility, (Not recommended for use)
Collaboration diagram for Data Structures:

Data Structures

struct | IfxIom_Iom_EcmGlobalEventSelectionBits
Event Combiner Module Global Event Selection Bit Field. More...
struct | IfxIom_Iom_EcmConfigCounter
union | IfxIom_Iom_EcmGlobalEventSelection
Event Combiner Module Global Event Selection. More...
struct | IfxIom_Iom
Specifies handle to IOM module. More...
struct | IfxIom_Iom_EcmConfig
Specifies the ECM block configuration structure. More...
struct | IfxIom_Iom_FpcConfig
Specifies Filter and Prescaler Cell configuration. More...
struct | IfxIom_Iom_LamConfig
Specifies Logic Analyser Module configuration. More...

Detailed Description

Data Structure Documentation

◆ IfxIom_Iom_EcmGlobalEventSelectionBits

struct IfxIom_Iom_EcmGlobalEventSelectionBits

Event Combiner Module Global Event Selection Bit Field.

Definition at line 158 of file IfxIom_Iom.h.

Data Fields
uint32 | countedEventCombinerSelection0: 1 | Determines the inclusion of the respective channel event counter output (1 of 4) in the generation of the global event (AND function).
uint32 | countedEventCombinerSelection1: 1 | Determines the inclusion of the respective channel event counter output (1 of 4) in the generation of the global event (AND function).
uint32 | countedEventCombinerSelection2: 1 | Determines the inclusion of the respective channel event counter output (1 of 4) in the generation of the global event (AND function).
uint32 | countedEventCombinerSelection3: 1 | Determines the inclusion of the respective channel event counter output (1 of 4) in the generation of the global event (AND function).
uint32 | eventCombinerSelection0: 1 | Determines the inclusion of the channel0 event in the generation of the global event.
uint32 | eventCombinerSelection1: 1 | Determines the inclusion of the channel1 event in the generation of the global event.
uint32 | eventCombinerSelection10: 1 | Determines the inclusion of the channel10 event in the generation of the global event.
uint32 | eventCombinerSelection11: 1 | Determines the inclusion of the channel11 event in the generation of the global event.
uint32 | eventCombinerSelection12: 1 | Determines the inclusion of the channel12 event in the generation of the global event.
uint32 | eventCombinerSelection13: 1 | Determines the inclusion of the channel13 event in the generation of the global event.
uint32 | eventCombinerSelection14: 1 | Determines the inclusion of the channel14 event in the generation of the global event.
uint32 | eventCombinerSelection15: 1 | Determines the inclusion of the channel15 event in the generation of the global event.
uint32 | eventCombinerSelection2: 1 | Determines the inclusion of the channel2 event in the generation of the global event.
uint32 | eventCombinerSelection3: 1 | Determines the inclusion of the channel3 event in the generation of the global event.
uint32 | eventCombinerSelection4: 1 | Determines the inclusion of the channel4 event in the generation of the global event.
uint32 | eventCombinerSelection5: 1 | Determines the inclusion of the channel5 event in the generation of the global event.
uint32 | eventCombinerSelection6: 1 | Determines the inclusion of the channel6 event in the generation of the global event.
uint32 | eventCombinerSelection7: 1 | Determines the inclusion of the channel7 event in the generation of the global event.
uint32 | eventCombinerSelection8: 1 | Determines the inclusion of the channel8 event in the generation of the global event.
uint32 | eventCombinerSelection9: 1 | Determines the inclusion of the channel9 event in the generation of the global event.
uint32 | reserved: 12 | reserved

◆ IfxIom_Iom_EcmConfigCounter

struct IfxIom_Iom_EcmConfigCounter

Definition at line 187 of file IfxIom_Iom.h.

Data Fields
IfxIom_EventCounterChannel | input | Specifies which channel output event to be routed to the Counter.
IfxIom_EventCounterThreshold | threshold | Specifies the Counter threshold value.

◆ IfxIom_Iom_EcmGlobalEventSelection

union IfxIom_Iom_EcmGlobalEventSelection

Event Combiner Module Global Event Selection.

Definition at line 195 of file IfxIom_Iom.h.

Collaboration diagram for IfxIom_Iom_EcmGlobalEventSelection:
[legend]
Data Fields
IfxIom_Iom_EcmGlobalEventSelectionBits | B
uint32 | U

◆ IfxIom_Iom

struct IfxIom_Iom

Specifies handle to IOM module.

Definition at line 207 of file IfxIom_Iom.h.

Data Fields
Ifx_IOM * iom Specifies the pointer to IOM registers.

◆ IfxIom_Iom_EcmConfig

struct IfxIom_Iom_EcmConfig

Specifies the ECM block configuration structure.

Definition at line 214 of file IfxIom_Iom.h.

Collaboration diagram for IfxIom_Iom_EcmConfig:
[legend]
Data Fields
IfxIom_Iom_EcmConfigCounter | eventCounter[4] |
IfxIom_Iom_EcmGlobalEventSelection | globalEventSelection | Specifies which channel event & which counted event to be included in global event generation. bit [15:0] specifies the channel event selection and bit [19:16] specifies accumulated event.

◆ IfxIom_Iom_FpcConfig

struct IfxIom_Iom_FpcConfig

Specifies Filter and Prescaler Cell configuration.

Definition at line 222 of file IfxIom_Iom.h.

Data Fields
IfxIom_FpcChannelId | channelId | Specifies the number of Filter & Prescaler Cell channel.
uint16 | comparatorThreshold | Specifies the threshold value that is compared with timer.
IfxIom_EdgeClearType | edgeType | Specifies the edge type which need to be cleared.
boolean | exorInputEnable[8] | Specifies the EXOR GTM input signal enable array (8 GTM inputs can be selected by enabling them).
IfxIom_FilterMode | filterMode | Specifies the Filter & Prescaler Cell mode.
IfxIom_MonitorSignal | monitorSignal | Specifies the monitor signal input for Filter & Prescaler cell.
IfxIom_ReferenceSignal | referenceSignal | Specifies the reference signal input for Filter & Prescaler cell.
boolean | timerReset | Specifies the timer reset bit.

◆ IfxIom_Iom_LamConfig

struct IfxIom_Iom_LamConfig

Specifies Logic Analyser Module configuration.

Definition at line 236 of file IfxIom_Iom.h.

Data Fields
IfxIom_EventActiveEdgeSelection | eventActiveEdgeSelection | Specifies which active edges of the monitor and reference signals are used for the event window generation.
IfxIom_EventSource | eventSource | Specifies whether the event window generation is from the monitor or reference signal.
boolean | eventWindowInverted | Specifies whether the event window polarity is inverted or not.
uint32 | eventWindowThreshold | This bit field determines the threshold value for the event window counter from which an event is generated.
IfxIom_LamId | lamId | Specifies Id of Logic Analyser Module.
IfxIom_LamRunMode | lamMode | Specifies whether the event window generation is free-running or gated with the monitor or reference.
IfxIom_LamMonitorInputChannel | lamMonitorInputChannel | Specifies which FPC/mux block monitor output signal is to be used for LAM block.
IfxIom_LamMonitorSource | lamMonitorSource | Specifies whether the monitor signal from the FPC monitor channel is sourced directly or compared with the reference signal from the FPC reference channel for the event compare.
IfxIom_LamReferenceInputChannel | lamReferenceInputChannel | Specifies which FPC/mux block reference output signal is to be used for LAM block.
boolean | monitorSignalInverted | Specifies whether the monitor signal from the FPC channel to LAM is inverted or not.
boolean | referenceSignalInverted | Specifies whether the reference signal from the FPC channel to LAM is inverted or not.


iLLD_TC38A: Module Functions

Functions
Module Functions
iLLD » IOM » Obselete Interface for backward compatibility, (Not recommended for use)
Collaboration diagram for Module Functions:

Functions

IFX_EXTERN void | IfxIom_Iom_deInitModule (IfxIom_Iom *iom)
Reset the IOM module. More...
IFX_EXTERN boolean | IfxIom_Iom_initAnalyser (IfxIom_Iom *iom, const IfxIom_Iom_LamConfig *lamConfig)
Initializes the Logic Analyser Module for internal event generation. More...
IFX_EXTERN void | IfxIom_Iom_initAnalyserConfig (IfxIom_Iom_LamConfig *lamConfig)
Initializes the default Logic Analyser Module buffer. More...
IFX_EXTERN boolean | IfxIom_Iom_initCombiner (IfxIom_Iom *iom, const IfxIom_Iom_EcmConfig *ecmConfig)
Initializes the Event Combiner Module for Global event. More...
IFX_EXTERN void | IfxIom_Iom_initCombinerConfig (IfxIom_Iom_EcmConfig *ecmConfig)
Initializes the default Event Combiner Module buffer. More...
IFX_EXTERN boolean | IfxIom_Iom_initFpcChannel (IfxIom_Iom *iom, const IfxIom_Iom_FpcConfig *fpcConfig)
Initializes the Filter & Prescaler Cell for filtering the signals. More...
IFX_EXTERN void | IfxIom_Iom_initFpcChannelConfig (IfxIom_Iom_FpcConfig *fpcConfig)
Initializes the default Filter & Prescaler Cell buffer. More...
IFX_EXTERN boolean | IfxIom_Iom_initModule (IfxIom_Iom *iom)
Initialize the IOM module with supplied configuration. More...
IFX_EXTERN void | IfxIom_Iom_initModuleConfig (IfxIom_Iom *iom, Ifx_IOM *module)
Initializes the Module default configuration buffer. More...

Detailed Description

Function Documentation

◆ IfxIom_Iom_deInitModule()

IFX_EXTERN void IfxIom_Iom_deInitModule ( IfxIom_Iom * iom )

Reset the IOM module.

Parameters
iom Specifies handle to IOM module.
Returns
None

Definition at line 84 of file IfxIom_Iom.c.

◆ IfxIom_Iom_initAnalyser()

IFX_EXTERN boolean IfxIom_Iom_initAnalyser | ( | IfxIom_Iom * | iom,
 |  | const IfxIom_Iom_LamConfig * | lamConfig
 | ) |  |

Initializes the Logic Analyser Module for internal event generation.

Parameters
iom | Specifies handle to IOM module.
lamConfig | Specifies Logic Analyser Module configuration.
Returns
Return TRUE if valid initialization otherwise FALSE

Usage example: see How to use the IOM Iom Interface driver?

Definition at line 90 of file IfxIom_Iom.c.

◆ IfxIom_Iom_initAnalyserConfig()

IFX_EXTERN void IfxIom_Iom_initAnalyserConfig ( IfxIom_Iom_LamConfig * lamConfig )

Initializes the default Logic Analyser Module buffer.

Parameters
lamConfig Specifies Logic Analyser Module configuration.
Returns
None

Usage example: see How to use the IOM Iom Interface driver?

Definition at line 121 of file IfxIom_Iom.c.

◆ IfxIom_Iom_initCombiner()

IFX_EXTERN boolean IfxIom_Iom_initCombiner | ( | IfxIom_Iom * | iom,
 |  | const IfxIom_Iom_EcmConfig * | ecmConfig
 | ) |  |

Initializes the Event Combiner Module for Global event.

Parameters
iom | Specifies handle to IOM module.
ecmConfig | Specifies the ECM block configuration structure
Returns
Return TRUE if valid initialization otherwise FALSE

Usage example: see How to use the IOM Iom Interface driver?

Definition at line 137 of file IfxIom_Iom.c.

◆ IfxIom_Iom_initCombinerConfig()

IFX_EXTERN void IfxIom_Iom_initCombinerConfig ( IfxIom_Iom_EcmConfig * ecmConfig )

Initializes the default Event Combiner Module buffer.

Parameters
ecmConfig Specifies the ECM block configuration structure
Returns
None

Usage example: see How to use the IOM Iom Interface driver?

Definition at line 162 of file IfxIom_Iom.c.

◆ IfxIom_Iom_initFpcChannel()

IFX_EXTERN boolean IfxIom_Iom_initFpcChannel | ( | IfxIom_Iom * | iom,
 |  | const IfxIom_Iom_FpcConfig * | fpcConfig
 | ) |  |

Initializes the Filter & Prescaler Cell for filtering the signals.

Parameters
iom | Specifies handle to IOM module.
fpcConfig | Specifies Filter and Prescaler Cell configuration.
Returns
Return TRUE if valid initialization otherwise FALSE

Usage example: see How to use the IOM Iom Interface driver?

Definition at line 175 of file IfxIom_Iom.c.

◆ IfxIom_Iom_initFpcChannelConfig()

IFX_EXTERN void IfxIom_Iom_initFpcChannelConfig ( IfxIom_Iom_FpcConfig * fpcConfig )

Initializes the default Filter & Prescaler Cell buffer.

Parameters
fpcConfig Specifies Filter and Prescaler Cell configuration.
Returns
None

Usage example: see How to use the IOM Iom Interface driver?

Definition at line 216 of file IfxIom_Iom.c.

◆ IfxIom_Iom_initModule()

IFX_EXTERN boolean IfxIom_Iom_initModule ( IfxIom_Iom * iom )

Initialize the IOM module with supplied configuration.

Parameters
iom Specifies handle to IOM module.
Returns
Return TRUE if valid module initialization otherwise FALSE.

Usage example: see How to use the IOM Iom Interface driver?

Definition at line 234 of file IfxIom_Iom.c.

◆ IfxIom_Iom_initModuleConfig()

IFX_EXTERN void IfxIom_Iom_initModuleConfig | ( | IfxIom_Iom * | iom,
 |  | Ifx_IOM * | module
 | ) |  |

Initializes the Module default configuration buffer.

Parameters
iom | Specifies the IOM configuration structure
module | Specifies handle to IOM module.
Returns
None

Usage example: see How to use the IOM Iom Interface driver?

Definition at line 255 of file IfxIom_Iom.c.


iLLD_TC38A: Operative Functions

Functions
Operative Functions
iLLD » IOM » Obselete Interface for backward compatibility, (Not recommended for use)
Collaboration diagram for Operative Functions:

Functions

IFX_EXTERN void IfxIom_Iom_clearFpcEdges (IfxIom_Iom_FpcConfig *fpcConfig, IfxIom_Iom *iom)
clear the falling and rising edges which are detected. More...

Detailed Description

Function Documentation

◆ IfxIom_Iom_clearFpcEdges()

IFX_EXTERN void IfxIom_Iom_clearFpcEdges | ( | IfxIom_Iom_FpcConfig * | fpcConfig,
 |  | IfxIom_Iom * | iom
 | ) |  |

clear the falling and rising edges which are detected.

Parameters
fpcConfig | Specifies Filter and Prescaler Cell configuration.
iom | Specifies handle to IOM module.
Returns
None

Usage example: see How to use the IOM Iom Interface driver?

Definition at line 53 of file IfxIom_Iom.c.


iLLD_TC38A: IfxIom_cfg.h File Reference

  • _Impl
Macros | Enumerations
IfxIom_cfg.h File Reference
iLLD » IOM

IOM on-chip implementation data. More...

Go to the source code of this file.

Macros

#define IFXIOM_NUM_CHANNELS 16
Specifies maximum number of channels. More...

Enumerations

enum IfxIom_MonInputSignal {
IfxIom_MonInputSignal_p = 0,
IfxIom_MonInputSignal_0 = 1,
IfxIom_MonInputSignal_1 = 2,
IfxIom_MonInputSignal_2 = 3
}
IOM_FPCCTRk.ISM. More...
enum IfxIom_RefInputSignal {
IfxIom_RefInputSignal_p = 0,
IfxIom_RefInputSignal_0 = 1,
IfxIom_RefInputSignal_1 = 2,
IfxIom_RefInputSignal_2 = 3,
IfxIom_RefInputSignal_xorCombiner = 4
}
IOM_FPCCTRk.ISR. More...
enum IfxIom_MonInput {
IfxIom_MonInput_p33_0 = (IfxIom_MonInputSignal_p << 8) | 0x0,
IfxIom_MonInput_p33_1 = (IfxIom_MonInputSignal_p << 8) | 0x1,
IfxIom_MonInput_p33_2 = (IfxIom_MonInputSignal_p << 8) | 0x2,
IfxIom_MonInput_p33_3 = (IfxIom_MonInputSignal_p << 8) | 0x3,
IfxIom_MonInput_p33_4 = (IfxIom_MonInputSignal_p << 8) | 0x4,
IfxIom_MonInput_p33_5 = (IfxIom_MonInputSignal_p << 8) | 0x5,
IfxIom_MonInput_p33_6 = (IfxIom_MonInputSignal_p << 8) | 0x6,
IfxIom_MonInput_p33_7 = (IfxIom_MonInputSignal_p << 8) | 0x7,
IfxIom_MonInput_p33_8 = (IfxIom_MonInputSignal_p << 8) | 0x8,
IfxIom_MonInput_p33_9 = (IfxIom_MonInputSignal_p << 8) | 0x9,
IfxIom_MonInput_p33_10 = (IfxIom_MonInputSignal_p << 8) | 0xa,
IfxIom_MonInput_p33_11 = (IfxIom_MonInputSignal_p << 8) | 0xb,
IfxIom_MonInput_p33_12 = (IfxIom_MonInputSignal_p << 8) | 0xc,
IfxIom_MonInput_p20_12 = (IfxIom_MonInputSignal_p << 8) | 0xd,
IfxIom_MonInput_p20_13 = (IfxIom_MonInputSignal_p << 8) | 0xe,
IfxIom_MonInput_p20_14 = (IfxIom_MonInputSignal_p << 8) | 0xf,
IfxIom_MonInput_gtmTout22 = (IfxIom_MonInputSignal_0 << 8) | 0x0,
IfxIom_MonInput_gtmTout23 = (IfxIom_MonInputSignal_0 << 8) | 0x1,
IfxIom_MonInput_gtmTout24 = (IfxIom_MonInputSignal_0 << 8) | 0x2,
IfxIom_MonInput_gtmTout25 = (IfxIom_MonInputSignal_0 << 8) | 0x3,
IfxIom_MonInput_gtmTout26 = (IfxIom_MonInputSignal_0 << 8) | 0x4,
IfxIom_MonInput_gtmTout27 = (IfxIom_MonInputSignal_0 << 8) | 0x5,
IfxIom_MonInput_gtmTout28 = (IfxIom_MonInputSignal_0 << 8) | 0x6,
IfxIom_MonInput_gtmTout29 = (IfxIom_MonInputSignal_0 << 8) | 0x7,
IfxIom_MonInput_gtmTout30 = (IfxIom_MonInputSignal_0 << 8) | 0x8,
IfxIom_MonInput_gtmTout31 = (IfxIom_MonInputSignal_0 << 8) | 0x9,
IfxIom_MonInput_gtmTout32 = (IfxIom_MonInputSignal_0 << 8) | 0xa,
IfxIom_MonInput_gtmTout33 = (IfxIom_MonInputSignal_0 << 8) | 0xb,
IfxIom_MonInput_gtmTout34 = (IfxIom_MonInputSignal_0 << 8) | 0xc,
IfxIom_MonInput_gtmTout68 = (IfxIom_MonInputSignal_0 << 8) | 0xd,
IfxIom_MonInput_gtmTout69 = (IfxIom_MonInputSignal_0 << 8) | 0xe,
IfxIom_MonInput_gtmTout70 = (IfxIom_MonInputSignal_0 << 8) | 0xf,
IfxIom_MonInput_ccu60Cc62 = (IfxIom_MonInputSignal_1 << 8) | 0x0,
IfxIom_MonInput_ccu60Cc61 = (IfxIom_MonInputSignal_1 << 8) | 0x1,
IfxIom_MonInput_ccu60Cc60 = (IfxIom_MonInputSignal_1 << 8) | 0x2,
IfxIom_MonInput_ccu60Cout60 = (IfxIom_MonInputSignal_1 << 8) | 0x3,
IfxIom_MonInput_ccu60Cout61 = (IfxIom_MonInputSignal_1 << 8) | 0x4,
IfxIom_MonInput_ccu60Cout62 = (IfxIom_MonInputSignal_1 << 8) | 0x5,
IfxIom_MonInput_ccu60Cout63 = (IfxIom_MonInputSignal_1 << 8) | 0x6,
IfxIom_MonInput_ccu61Cout63 = (IfxIom_MonInputSignal_1 << 8) | 0x7,
IfxIom_MonInput_ccu61Cc60 = (IfxIom_MonInputSignal_1 << 8) | 0x8,
IfxIom_MonInput_ccu61Cc61 = (IfxIom_MonInputSignal_1 << 8) | 0x9,
IfxIom_MonInput_ccu61Cc62 = (IfxIom_MonInputSignal_1 << 8) | 0xa,
IfxIom_MonInput_ccu61Cout60 = (IfxIom_MonInputSignal_1 << 8) | 0xb,
IfxIom_MonInput_ccu61Cout61 = (IfxIom_MonInputSignal_1 << 8) | 0xc,
IfxIom_MonInput_ccu61Cout62 = (IfxIom_MonInputSignal_1 << 8) | 0xd,
IfxIom_MonInput_psi5Psitx0 = (IfxIom_MonInputSignal_1 << 8) | 0xe,
IfxIom_MonInput_psi5Psitx1 = (IfxIom_MonInputSignal_1 << 8) | 0xf,
IfxIom_MonInput_qspi0Mrst = (IfxIom_MonInputSignal_2 << 8) | 0x0,
IfxIom_MonInput_qspi1Mrst = (IfxIom_MonInputSignal_2 << 8) | 0x1,
IfxIom_MonInput_qspi2Mrst = (IfxIom_MonInputSignal_2 << 8) | 0x2,
IfxIom_MonInput_qspi3Mrst = (IfxIom_MonInputSignal_2 << 8) | 0x3,
IfxIom_MonInput_gnd = (IfxIom_MonInputSignal_2 << 8) | 0x4,
IfxIom_MonInput_canNode0Txd = (IfxIom_MonInputSignal_2 << 8) | 0x5,
IfxIom_MonInput_canNode1Txd = (IfxIom_MonInputSignal_2 << 8) | 0x6,
IfxIom_MonInput_canNode2Txd = (IfxIom_MonInputSignal_2 << 8) | 0x7,
IfxIom_MonInput_canNode3Txd = (IfxIom_MonInputSignal_2 << 8) | 0x8,
IfxIom_MonInput_gtmTout104 = (IfxIom_MonInputSignal_2 << 8) | 0x9,
IfxIom_MonInput_gtmTout105 = (IfxIom_MonInputSignal_2 << 8) | 0xa,
IfxIom_MonInput_gtmTout106 = (IfxIom_MonInputSignal_2 << 8) | 0xb,
IfxIom_MonInput_asclin0Atx = (IfxIom_MonInputSignal_2 << 8) | 0xc,
IfxIom_MonInput_asclin1Atx = (IfxIom_MonInputSignal_2 << 8) | 0xd,
IfxIom_MonInput_asclin2Atx = (IfxIom_MonInputSignal_2 << 8) | 0xe,
IfxIom_MonInput_asclin3Atx = (IfxIom_MonInputSignal_2 << 8) | 0xf
}
LAM mon inputs. More...
enum IfxIom_RefInput {
IfxIom_RefInput_p33_0 = (IfxIom_RefInputSignal_p << 8) | 0x0,
IfxIom_RefInput_p33_1 = (IfxIom_RefInputSignal_p << 8) | 0x1,
IfxIom_RefInput_p33_2 = (IfxIom_RefInputSignal_p << 8) | 0x2,
IfxIom_RefInput_p33_3 = (IfxIom_RefInputSignal_p << 8) | 0x3,
IfxIom_RefInput_p33_4 = (IfxIom_RefInputSignal_p << 8) | 0x4,
IfxIom_RefInput_p33_5 = (IfxIom_RefInputSignal_p << 8) | 0x5,
IfxIom_RefInput_p33_6 = (IfxIom_RefInputSignal_p << 8) | 0x6,
IfxIom_RefInput_p33_7 = (IfxIom_RefInputSignal_p << 8) | 0x7,
IfxIom_RefInput_p33_8 = (IfxIom_RefInputSignal_p << 8) | 0x8,
IfxIom_RefInput_p33_9 = (IfxIom_RefInputSignal_p << 8) | 0x9,
IfxIom_RefInput_p33_10 = (IfxIom_RefInputSignal_p << 8) | 0xa,
IfxIom_RefInput_p33_11 = (IfxIom_RefInputSignal_p << 8) | 0xb,
IfxIom_RefInput_p33_12 = (IfxIom_RefInputSignal_p << 8) | 0xc,
IfxIom_RefInput_p20_12 = (IfxIom_RefInputSignal_p << 8) | 0xd,
IfxIom_RefInput_p20_13 = (IfxIom_RefInputSignal_p << 8) | 0xe,
IfxIom_RefInput_p20_14 = (IfxIom_RefInputSignal_p << 8) | 0xf,
IfxIom_RefInput_gtmTout0 = (IfxIom_RefInputSignal_0 << 8) | 0x0,
IfxIom_RefInput_gtmTout1 = (IfxIom_RefInputSignal_0 << 8) | 0x1,
IfxIom_RefInput_gtmTout2 = (IfxIom_RefInputSignal_0 << 8) | 0x2,
IfxIom_RefInput_gtmTout3 = (IfxIom_RefInputSignal_0 << 8) | 0x3,
IfxIom_RefInput_gtmTout4 = (IfxIom_RefInputSignal_0 << 8) | 0x4,
IfxIom_RefInput_gtmTout5 = (IfxIom_RefInputSignal_0 << 8) | 0x5,
IfxIom_RefInput_gtmTout6 = (IfxIom_RefInputSignal_0 << 8) | 0x6,
IfxIom_RefInput_gtmTout7 = (IfxIom_RefInputSignal_0 << 8) | 0x7,
IfxIom_RefInput_gtmTout8 = (IfxIom_RefInputSignal_0 << 8) | 0x8,
IfxIom_RefInput_gtmTout9 = (IfxIom_RefInputSignal_0 << 8) | 0x9,
IfxIom_RefInput_gtmTout10 = (IfxIom_RefInputSignal_0 << 8) | 0xa,
IfxIom_RefInput_gtmTout11 = (IfxIom_RefInputSignal_0 << 8) | 0xb,
IfxIom_RefInput_gtmTout12 = (IfxIom_RefInputSignal_0 << 8) | 0xc,
IfxIom_RefInput_gtmTout13 = (IfxIom_RefInputSignal_0 << 8) | 0xd,
IfxIom_RefInput_gtmTout14 = (IfxIom_RefInputSignal_0 << 8) | 0xe,
IfxIom_RefInput_gtmTout15 = (IfxIom_RefInputSignal_0 << 8) | 0xf,
IfxIom_RefInput_ccu60Cout63 = (IfxIom_RefInputSignal_1 << 8) | 0x0,
IfxIom_RefInput_ccu60Cout62 = (IfxIom_RefInputSignal_1 << 8) | 0x1,
IfxIom_RefInput_ccu60Cout61 = (IfxIom_RefInputSignal_1 << 8) | 0x2,
IfxIom_RefInput_ccu60Cout60 = (IfxIom_RefInputSignal_1 << 8) | 0x3,
IfxIom_RefInput_ccu60Cc62 = (IfxIom_RefInputSignal_1 << 8) | 0x4,
IfxIom_RefInput_ccu60Cc61 = (IfxIom_RefInputSignal_1 << 8) | 0x5,
IfxIom_RefInput_ccu60Cc60 = (IfxIom_RefInputSignal_1 << 8) | 0x6,
IfxIom_RefInput_ccu61Cout63 = (IfxIom_RefInputSignal_1 << 8) | 0x7,
IfxIom_RefInput_ccu61Cout62 = (IfxIom_RefInputSignal_1 << 8) | 0x8,
IfxIom_RefInput_ccu61Cout61 = (IfxIom_RefInputSignal_1 << 8) | 0x9,
IfxIom_RefInput_ccu61Cout60 = (IfxIom_RefInputSignal_1 << 8) | 0xa,
IfxIom_RefInput_ccu61Cc62 = (IfxIom_RefInputSignal_1 << 8) | 0xb,
IfxIom_RefInput_ccu61Cc61 = (IfxIom_RefInputSignal_1 << 8) | 0xc,
IfxIom_RefInput_ccu61Cc60 = (IfxIom_RefInputSignal_1 << 8) | 0xd,
IfxIom_RefInput_psi5Psitx0 = (IfxIom_RefInputSignal_1 << 8) | 0xe,
IfxIom_RefInput_psi5Psitx2 = (IfxIom_RefInputSignal_1 << 8) | 0xf,
IfxIom_RefInput_qspi0Mrst = (IfxIom_RefInputSignal_2 << 8) | 0x0,
IfxIom_RefInput_qspi1Mrst = (IfxIom_RefInputSignal_2 << 8) | 0x1,
IfxIom_RefInput_qspi2Mrst = (IfxIom_RefInputSignal_2 << 8) | 0x2,
IfxIom_RefInput_qspi3Mrst = (IfxIom_RefInputSignal_2 << 8) | 0x3,
IfxIom_RefInput_gnd = (IfxIom_RefInputSignal_2 << 8) | 0x4,
IfxIom_RefInput_canNode0Txd = (IfxIom_RefInputSignal_2 << 8) | 0x5,
IfxIom_RefInput_canNode1Txd = (IfxIom_RefInputSignal_2 << 8) | 0x6,
IfxIom_RefInput_canNode2Txd = (IfxIom_RefInputSignal_2 << 8) | 0x7,
IfxIom_RefInput_canNode3Txd = (IfxIom_RefInputSignal_2 << 8) | 0x8,
IfxIom_RefInput_gtmTout107 = (IfxIom_RefInputSignal_2 << 8) | 0x9,
IfxIom_RefInput_gtmTout108 = (IfxIom_RefInputSignal_2 << 8) | 0xa,
IfxIom_RefInput_gtmTout109 = (IfxIom_RefInputSignal_2 << 8) | 0xb,
IfxIom_RefInput_asclin0Atx = (IfxIom_RefInputSignal_2 << 8) | 0xc,
IfxIom_RefInput_asclin1Atx = (IfxIom_RefInputSignal_2 << 8) | 0xd,
IfxIom_RefInput_asclin2Atx = (IfxIom_RefInputSignal_2 << 8) | 0xe,
IfxIom_RefInput_asclin3Atx = (IfxIom_RefInputSignal_2 << 8) | 0xf,
IfxIom_RefInput_exorCombiner = (IfxIom_RefInputSignal_xorCombiner << 8) | 0x0
}
LAM ref inputs. More...

Detailed Description

IOM on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxIom_cfg.h.

Macro Definition Documentation

◆ IFXIOM_NUM_CHANNELS

#define IFXIOM_NUM_CHANNELS 16

Specifies maximum number of channels.

Definition at line 66 of file IfxIom_cfg.h.


iLLD_TC38A: IfxIom_Driver.h File Reference

  • Iom
  • Driver
Data Structures | Functions
IfxIom_Driver.h File Reference
iLLD » IOM

IOM DRIVER details. More...

#include "Iom/Std/IfxIom.h"
Include dependency graph for IfxIom_Driver.h:

Go to the source code of this file.

Data Structures

struct | IfxIom_Driver_LamFilterConfig
IOM LAM filter configuration. More...
struct | IfxIom_Driver
IOM driver. More...
struct | IfxIom_Driver_LamEventConfig
IOM LAM event configuration. More...
struct | IfxIom_Driver_LamEventWindowConfig
IOM LAM event window configuration. More...
struct | IfxIom_Driver_LamMonConfig
IOM LAM monitor input configuration. More...
struct | IfxIom_Driver_LamRefConfig
IOM LAM reference input configuration. More...
struct | IfxIom_Driver_Config
IOM Driver Configuration. More...
struct | IfxIom_Driver_Lam
IOM LAM object. More...
struct | IfxIom_Driver_LamConfig
IOM LAM configuration. More...

Functions

IFX_EXTERN void | IfxIom_Driver_clearAllGlitch (IfxIom_Driver *driver)
Clear all LAM monitor and reference glitch flags. More...
IFX_EXTERN void | IfxIom_Driver_clearHistory (IfxIom_Driver *driver)
Clear the IOM event history. More...
IFX_EXTERN void | IfxIom_Driver_clearLamMonGlitch (IfxIom_Driver_Lam *driver)
Clear the LAM monitor signal glitch flag. More...
IFX_EXTERN void | IfxIom_Driver_clearLamRefGlitch (IfxIom_Driver_Lam *driver)
Clear the LAM reference signal glitch flag. More...
IFX_EXTERN uint32 | IfxIom_Driver_disableEvents (IfxIom_Driver *driver)
Disable all event generation. More...
IFX_EXTERN void | IfxIom_Driver_disableLamEvent (IfxIom_Driver_Lam *driver)
Disable the event generation for the LAM. More...
IFX_EXTERN void | IfxIom_Driver_enableLamEvent (IfxIom_Driver_Lam *driver)
Enable the event genration for the LAM. More...
IFX_EXTERN void | IfxIom_Driver_getHistory (IfxIom_Driver *driver, uint16 *a, uint16 *b, uint16 *c, uint16 *d)
Return the IOM event history. In returned mask value, bit0= LAM0, bit1=LAM1, ... More...
IFX_EXTERN boolean | IfxIom_Driver_init (IfxIom_Driver *driver, IfxIom_Driver_Config *config)
Initialize the IOM Must be called before IfxIom_Driver_initLam() More...
IFX_EXTERN void | IfxIom_Driver_initConfig (IfxIom_Driver_Config *config, Ifx_IOM *module)
Set the IOM default configuration. More...
IFX_EXTERN boolean | IfxIom_Driver_initLam (IfxIom_Driver_Lam *driver, IfxIom_Driver_LamConfig *config)
Initialize the LAM channel. More...
IFX_EXTERN void | IfxIom_Driver_initLamConfig (IfxIom_Driver_LamConfig *config, IfxIom_Driver *driver)
Set the LAM default configuration. More...
IFX_EXTERN void | IfxIom_Driver_isLamMonGlitch (IfxIom_Driver_Lam *driver, boolean *risingEdgeGlitch, boolean *fallingEdgeGlitch)
Return the LAM monitor glitch flags. More...
IFX_EXTERN void | IfxIom_Driver_isLamRefGlitch (IfxIom_Driver_Lam *driver, boolean *risingEdgeGlitch, boolean *fallingEdgeGlitch)
Return the LAM reference glitch flags. More...
IFX_EXTERN void | IfxIom_Driver_restoreEvents (IfxIom_Driver *driver, uint32 mask)
Restore the IOM event mask. More...

Detailed Description

IOM DRIVER details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

The IOM driver enable easy usage of the IOM module, by abstracting the internal module structure. For it's configuration it requires the LAM channel to be used together with the reference and monitor signal. The muxes and filters are configured accordingly. The driver handles the event combiner "accumulated event timer" resources base on the single or multi-event configuration making use of the next free timer if required.

Double resource usage (LAM channel, accumulated event timers) is checked and reported at driver initialization .

The driver care for the timing and clock conversion, all timing configuration are to be given in second.

Example of use:

  • Initialization of the Iom
  • Initialization of LAM channel 0 with:
    • IOM monitor input: External pin P20.13, delay debounce filter both edge 0.5us, signal inverted,
    • IOM reference: GTM TOUT14, no filter, not inverted
    • Event window controlled by ref signal, with a free running timer and cleared on any edge of the reference signal, threshold set to 1us
    • Event source is XOR of monitor and reference signal, event is triggered on falling edge of the XOR
    • An alarm signal is generated if the monitor signal is not within the threshold, after two events.
void InitLam(IfxIom_Driver *driver, IfxIom_Driver *lam){
IfxIom_Driver_Config configDriver;
IfxIom_Driver_LamConfig configLam;
IfxIom_Driver_initConfig(&configDriver, &MODULE_IOM);
IfxIom_Driver_init(driver, &configDriver);
IfxIom_Driver_initLamConfig(&configLam, driver);
configLam.channel = IfxIom_LamId_0;
configLam.mon.input = IfxIom_MonInput_p20_13;
configLam.mon.filter.mode = IfxIom_LamFilterMode_delayDebounceBothEdge;
configLam.mon.filter.clearTimerOnGlitch = FALSE;
configLam.mon.filter.fallingEdgeFilterTime = 0.5e-6;
configLam.mon.filter.risingEdgeFilterTime = configLam.ref.filter.fallingEdgeFilterTime;
configLam.mon.inverted = TRUE;
configLam.ref.input= IfxIom_RefInput_gtmTout14;
configLam.ref.filter.mode = IfxIom_LamFilterMode_noFilter;
configLam.ref.inverted = FALSE;
configLam.eventWindow.controlSource = IfxIom_LamEventWindowControlSource_ref;
configLam.eventWindow.run = IfxIom_LamEventWindowRunControl_freeRunning;
configLam.eventWindow.clearEvent = IfxIom_LamEventWindowClearEvent_anyEdge;
configLam.eventWindow.threshold = 1e-6;
configLam.event.source = IfxIom_LamEventSource_monXorRef;
configLam.event.trigger = IfxIom_LamEventTrigger_fallingEdge;
configLam.systemEventTriggerThreshold = 2;
IfxIom_Driver_initLam(lam, &configLam);
}

Definition in file IfxIom_Driver.h.


iLLD_TC38A: IfxIom_Iom.h File Reference

  • Iom
  • Iom
Data Structures | Functions
IfxIom_Iom.h File Reference
iLLD » IOM

IOM IOM details. More...

#include "Iom/Std/IfxIom.h"
Include dependency graph for IfxIom_Iom.h:

Go to the source code of this file.

Data Structures

struct | IfxIom_Iom_EcmGlobalEventSelectionBits
Event Combiner Module Global Event Selection Bit Field. More...
struct | IfxIom_Iom_EcmConfigCounter
union | IfxIom_Iom_EcmGlobalEventSelection
Event Combiner Module Global Event Selection. More...
struct | IfxIom_Iom
Specifies handle to IOM module. More...
struct | IfxIom_Iom_EcmConfig
Specifies the ECM block configuration structure. More...
struct | IfxIom_Iom_FpcConfig
Specifies Filter and Prescaler Cell configuration. More...
struct | IfxIom_Iom_LamConfig
Specifies Logic Analyser Module configuration. More...

Functions

IFX_EXTERN void | IfxIom_Iom_deInitModule (IfxIom_Iom *iom)
Reset the IOM module. More...
IFX_EXTERN boolean | IfxIom_Iom_initAnalyser (IfxIom_Iom *iom, const IfxIom_Iom_LamConfig *lamConfig)
Initializes the Logic Analyser Module for internal event generation. More...
IFX_EXTERN void | IfxIom_Iom_initAnalyserConfig (IfxIom_Iom_LamConfig *lamConfig)
Initializes the default Logic Analyser Module buffer. More...
IFX_EXTERN boolean | IfxIom_Iom_initCombiner (IfxIom_Iom *iom, const IfxIom_Iom_EcmConfig *ecmConfig)
Initializes the Event Combiner Module for Global event. More...
IFX_EXTERN void | IfxIom_Iom_initCombinerConfig (IfxIom_Iom_EcmConfig *ecmConfig)
Initializes the default Event Combiner Module buffer. More...
IFX_EXTERN boolean | IfxIom_Iom_initFpcChannel (IfxIom_Iom *iom, const IfxIom_Iom_FpcConfig *fpcConfig)
Initializes the Filter & Prescaler Cell for filtering the signals. More...
IFX_EXTERN void | IfxIom_Iom_initFpcChannelConfig (IfxIom_Iom_FpcConfig *fpcConfig)
Initializes the default Filter & Prescaler Cell buffer. More...
IFX_EXTERN boolean | IfxIom_Iom_initModule (IfxIom_Iom *iom)
Initialize the IOM module with supplied configuration. More...
IFX_EXTERN void | IfxIom_Iom_initModuleConfig (IfxIom_Iom *iom, Ifx_IOM *module)
Initializes the Module default configuration buffer. More...
IFX_EXTERN void | IfxIom_Iom_clearFpcEdges (IfxIom_Iom_FpcConfig *fpcConfig, IfxIom_Iom *iom)
clear the falling and rising edges which are detected. More...

Detailed Description

IOM IOM details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxIom_Iom.h.


iLLD_TC38A: IfxIom.h File Reference

  • Iom
  • Std
Enumerations | Functions
IfxIom.h File Reference
iLLD » IOM

IOM basic functionality. More...

#include "_Impl/IfxIom_cfg.h"
#include "IfxIom_reg.h"
#include "Scu/Std/IfxScuWdt.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
Include dependency graph for IfxIom.h:

Go to the source code of this file.

Enumerations

enum IfxIom_LamEventSource {
IfxIom_LamEventSource_mon = 0,
IfxIom_LamEventSource_monXorRef = 1
}
Event source configuration IOM_LAMCFGm.MOS. More...
enum IfxIom_LamEventTrigger {
IfxIom_LamEventTrigger_none = 0,
IfxIom_LamEventTrigger_risingEdge = 1,
IfxIom_LamEventTrigger_fallingEdge = 2,
IfxIom_LamEventTrigger_anyEdge = 3
}
Event trigger configuration IOM_LAMCFGm.EDS upper two bits. More...
enum IfxIom_LamEventWindowClearEvent {
IfxIom_LamEventWindowClearEvent_none = 0,
IfxIom_LamEventWindowClearEvent_risingEdge = 1,
IfxIom_LamEventWindowClearEvent_fallingEdge = 2,
IfxIom_LamEventWindowClearEvent_anyEdge = 3
}
Timer clear event configuration IOM_LAMCFGm.EDS upper lower bits. More...
enum IfxIom_LamEventWindowControlSource {
IfxIom_LamEventWindowControlSource_ref = 0,
IfxIom_LamEventWindowControlSource_mon = 1
}
Timer control source configuration IOM_LAMCFGm.EWS. More...
enum IfxIom_LamEventWindowRunControl {
IfxIom_LamEventWindowRunControl_freeRunning = 0,
IfxIom_LamEventWindowRunControl_gated = 1
}
Timer run configuration IOM_LAMCFGm.RMS. More...
enum IfxIom_LamFilterMode {
IfxIom_LamFilterMode_delayDebounceBothEdge = 0,
IfxIom_LamFilterMode_immediateDebounceBothEdge = 1,
IfxIom_LamFilterMode_immediateDebounceRisingEdge = 2,
IfxIom_LamFilterMode_immediateDebounceFallingEdge = 3,
IfxIom_LamFilterMode_delayDebounceRisingEdgeImmediateDebounceFallingEdge = 4,
IfxIom_LamFilterMode_immediateDebounceRisingEdgeDelayDebounceFallingEdge = 5,
IfxIom_LamFilterMode_prescalerOnRisingEdge = 6,
IfxIom_LamFilterMode_prescalerOnFallingEdge = 7,
IfxIom_LamFilterMode_noFilter = 8
}
FPC filer mode IOM_FPCCTRk.MOD, with additional definition for noFilter. More...
enum IfxIom_LamId {
IfxIom_LamId_0 = 0,
IfxIom_LamId_1,
IfxIom_LamId_2,
IfxIom_LamId_3,
IfxIom_LamId_4,
IfxIom_LamId_5,
IfxIom_LamId_6,
IfxIom_LamId_7,
IfxIom_LamId_8,
IfxIom_LamId_9,
IfxIom_LamId_10,
IfxIom_LamId_11,
IfxIom_LamId_12,
IfxIom_LamId_13,
IfxIom_LamId_14,
IfxIom_LamId_15
}
Specifies the Logic Module Analyser Module Number. More...
enum IfxIom_SleepMode {
IfxIom_SleepMode_enable = 0,
IfxIom_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_IOM.CLC.B.EDIS. More...
enum IfxIom_EdgeClearType {
IfxIom_EdgeClearType_rising = 0,
IfxIom_EdgeClearType_falling = 1,
IfxIom_EdgeClearType_risingFalling = 2
}
Specifies the edge type which need to be cleared. More...
enum IfxIom_EventActiveEdgeSelection {
IfxIom_EventActiveEdgeSelection_neitherGateNeitherClear = 0,
IfxIom_EventActiveEdgeSelection_neitherGatePositiveClear = 1,
IfxIom_EventActiveEdgeSelection_neitherGateNegativeClear = 2,
IfxIom_EventActiveEdgeSelection_neitherGateEitherClear = 3,
IfxIom_EventActiveEdgeSelection_positiveGateNeitherClear = 4,
IfxIom_EventActiveEdgeSelection_positiveGatePositiveClear = 5,
IfxIom_EventActiveEdgeSelection_positiveGateNegativeClear = 6,
IfxIom_EventActiveEdgeSelection_positiveGateEitherClear = 7,
IfxIom_EventActiveEdgeSelection_negativeGateNeitherClear = 8,
IfxIom_EventActiveEdgeSelection_negativeGatePositiveClear = 9,
IfxIom_EventActiveEdgeSelection_negativeGateNegativeClear = 10,
IfxIom_EventActiveEdgeSelection_negativeGateEitherClear = 11,
IfxIom_EventActiveEdgeSelection_eitherGateNeitherClear = 12,
IfxIom_EventActiveEdgeSelection_eitherGatePositiveClear = 13,
IfxIom_EventActiveEdgeSelection_eitherGateNegativeClear = 14,
IfxIom_EventActiveEdgeSelection_eitherGateEitherClear = 15
}
LAMCFG[lamId].EDS, Specifies which active edges of the monitor and reference signals are used for the event window generation. More...
enum IfxIom_EventCounterChannel {
IfxIom_EventCounterChannel_0 = 0,
IfxIom_EventCounterChannel_1,
IfxIom_EventCounterChannel_2,
IfxIom_EventCounterChannel_3,
IfxIom_EventCounterChannel_4,
IfxIom_EventCounterChannel_5,
IfxIom_EventCounterChannel_6,
IfxIom_EventCounterChannel_7,
IfxIom_EventCounterChannel_8,
IfxIom_EventCounterChannel_9,
IfxIom_EventCounterChannel_10,
IfxIom_EventCounterChannel_11,
IfxIom_EventCounterChannel_12,
IfxIom_EventCounterChannel_13,
IfxIom_EventCounterChannel_14,
IfxIom_EventCounterChannel_15
}
ECMCCFG.SELCx(x= 0,1,2,3), Specifies which channel event output is to be routed to counterCn. More...
enum IfxIom_EventCounterThreshold {
IfxIom_EventCounterThreshold_disable = 0,
IfxIom_EventCounterThreshold_1 = 1,
IfxIom_EventCounterThreshold_2,
IfxIom_EventCounterThreshold_3,
IfxIom_EventCounterThreshold_4,
IfxIom_EventCounterThreshold_5,
IfxIom_EventCounterThreshold_6,
IfxIom_EventCounterThreshold_7,
IfxIom_EventCounterThreshold_8,
IfxIom_EventCounterThreshold_9,
IfxIom_EventCounterThreshold_10,
IfxIom_EventCounterThreshold_11,
IfxIom_EventCounterThreshold_12,
IfxIom_EventCounterThreshold_13,
IfxIom_EventCounterThreshold_14,
IfxIom_EventCounterThreshold_15
}
ECMCCFG.THRCx(x= 0,1,2,3), Specifies the threshold count value. Upon the counter meeting the threshold, the counter event output becomes active high. More...
enum IfxIom_EventSource {
IfxIom_EventSource_reference = 0,
IfxIom_EventSource_monitor = 1
}
LAMCFG[lamId].EWS, Specifies whether the event window generation is from the monitor or reference signal. More...
enum IfxIom_FilterMode {
IfxIom_FilterMode_delayedDebounce = 0,
IfxIom_FilterMode_immediateDebounce = 1,
IfxIom_FilterMode_risingEdgeImmediateDebounce = 2,
IfxIom_FilterMode_fallingEdgeImmediateDebounce = 3,
IfxIom_FilterMode_risingEdgeDelayedFallingEdgeImmediateDebounce = 4,
IfxIom_FilterMode_fallingEdgeDelayedRisingEdgeImmediateDebounce = 5,
IfxIom_FilterMode_risingEdgePrescaler = 6,
IfxIom_FilterMode_FallingEdgePrescaler = 7
}
FPCCTR[channelId].MOD, Specifies the Filter & Prescaler Cell mode. More...
enum IfxIom_FpcChannelId {
IfxIom_FpcChannelId_0 = 0,
IfxIom_FpcChannelId_1,
IfxIom_FpcChannelId_2,
IfxIom_FpcChannelId_3,
IfxIom_FpcChannelId_4,
IfxIom_FpcChannelId_5,
IfxIom_FpcChannelId_6,
IfxIom_FpcChannelId_7,
IfxIom_FpcChannelId_8,
IfxIom_FpcChannelId_9,
IfxIom_FpcChannelId_10,
IfxIom_FpcChannelId_11,
IfxIom_FpcChannelId_12,
IfxIom_FpcChannelId_13,
IfxIom_FpcChannelId_14,
IfxIom_FpcChannelId_15
}
Specifies the number of Filter & Prescaler Cell channel Id. More...
enum IfxIom_LamMonitorInputChannel {
IfxIom_LamMonitorInputChannel_0 = 0,
IfxIom_LamMonitorInputChannel_1,
IfxIom_LamMonitorInputChannel_2,
IfxIom_LamMonitorInputChannel_3,
IfxIom_LamMonitorInputChannel_4,
IfxIom_LamMonitorInputChannel_5,
IfxIom_LamMonitorInputChannel_6,
IfxIom_LamMonitorInputChannel_7,
IfxIom_LamMonitorInputChannel_8,
IfxIom_LamMonitorInputChannel_9,
IfxIom_LamMonitorInputChannel_10,
IfxIom_LamMonitorInputChannel_11,
IfxIom_LamMonitorInputChannel_12,
IfxIom_LamMonitorInputChannel_13,
IfxIom_LamMonitorInputChannel_14,
IfxIom_LamMonitorInputChannel_15
}
LAMCFG[lamId].MCS, Specifies which FPC/mux block monitor output signal is to be used for LAM block. More...
enum IfxIom_LamMonitorSource {
IfxIom_LamMonitorSource_directFpcMonitor = 0,
IfxIom_LamMonitorSource_exoredFpcMonitor = 1
}
LAMCFG[lamId].MOS, Specifies whether the monitor signal from the FPC monitor channel is sourced directly or compared with the reference signal from the FPC reference channel for the event compare. More...
enum IfxIom_LamReferenceInputChannel {
IfxIom_LamReferenceInputChannel_0 = 0,
IfxIom_LamReferenceInputChannel_1,
IfxIom_LamReferenceInputChannel_2,
IfxIom_LamReferenceInputChannel_3,
IfxIom_LamReferenceInputChannel_4,
IfxIom_LamReferenceInputChannel_5,
IfxIom_LamReferenceInputChannel_6,
IfxIom_LamReferenceInputChannel_7,
IfxIom_LamReferenceInputChannel_8,
IfxIom_LamReferenceInputChannel_9,
IfxIom_LamReferenceInputChannel_10,
IfxIom_LamReferenceInputChannel_11,
IfxIom_LamReferenceInputChannel_12,
IfxIom_LamReferenceInputChannel_13,
IfxIom_LamReferenceInputChannel_14,
IfxIom_LamReferenceInputChannel_15
}
LAMCFG[lamId].RCS, Specifies which FPC/mux block reference output signal is to be used for LAM block. More...
enum IfxIom_LamRunMode {
IfxIom_LamRunMode_freeRunning = 0,
IfxIom_LamRunMode_gated = 1
}
LAMCFG[lamId].RMS, Specifies whether the event window generation is free-running or gated with the monitor or reference. More...
enum IfxIom_MonitorSignal {
IfxIom_MonitorSignal_portLogic = 0,
IfxIom_MonitorSignal_0 = 1,
IfxIom_MonitorSignal_1,
IfxIom_MonitorSignal_2
}
FPCCTR[channelId].ISM, Specifies the monitor signal input for Filter & Prescaler cell. More...
enum IfxIom_ReferenceSignal {
IfxIom_ReferenceSignal_portLogic = 0,
IfxIom_ReferenceSignal_0 = 1,
IfxIom_ReferenceSignal_1,
IfxIom_ReferenceSignal_2,
IfxIom_ReferenceSignal_gtmEXORCombiner = 4
}
FPCCTR[channelId].ISR,Specifies the reference signal input for Filter & Prescaler cell. More...

Functions

IFX_INLINE void | IfxIom_disableModule (Ifx_IOM *iom)
Disables the IOM module . More...
IFX_INLINE void | IfxIom_enableModule (Ifx_IOM *iom, uint8 clockDivider)
Enable the IOM module control. More...
IFX_INLINE void | IfxIom_setSleepMode (Ifx_IOM *iom, IfxIom_SleepMode mode)
Enable/disable the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxIom_setTimerValueOfFilterAndPrescalerCell (Ifx_IOM *iom, IfxIom_FpcChannelId channelId, uint16 value)
Enable/disable the sensitivity of the module to sleep signal. More...
IFX_EXTERN float32 | IfxIom_getFrequency (Ifx_IOM *iom)
Return the frequency used for the filter and timers clock. More...
IFX_EXTERN void | IfxIom_resetModule (Ifx_IOM *iom)
Reset the IOM module. More...
IFX_INLINE uint16 | IfxIom_eventTriggerHistory (Ifx_IOM *iom)

Detailed Description

IOM basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxIom.h.


iLLD_TC38A: Lmu

Modules | Files
Lmu
iLLD
Collaboration diagram for Lmu:

Modules

Implementation

Files

file IfxLmu_cfg.h
Lmu on-chip implementation data.

Detailed Description


iLLD_TC38A: Implementation

Implementation
iLLD » Lmu
Collaboration diagram for Implementation:


iLLD_TC38A: IfxLmu_cfg.h File Reference

  • _Impl
Macros
IfxLmu_cfg.h File Reference
iLLD » Lmu

Lmu on-chip implementation data. More...

Go to the source code of this file.

Macros

#define IFXLMU_NUM_MODULES 1
Specifies maximum number of Modules. More...

Detailed Description

Lmu on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxLmu_cfg.h.

Macro Definition Documentation

◆ IFXLMU_NUM_MODULES

#define IFXLMU_NUM_MODULES 1

Specifies maximum number of Modules.

Definition at line 60 of file IfxLmu_cfg.h.


iLLD_TC38A: MSC

Modules | Files
MSC
iLLD
Collaboration diagram for MSC:

Modules

Implementation
Standard Driver
MSC Pin Mapping
How to use the MSC Interface driver?
MSC

Files

file | IfxMsc_cfg.h
MSC on-chip implementation data.
file | IfxMsc_PinMap.c
MSC I/O map.
file | IfxMsc_PinMap.h
MSC I/O map.
file | IfxMsc_Msc.h
MSC MSC details.
file | IfxMsc.h
MSC basic functionality.

Detailed Description


iLLD_TC38A: Implementation

Modules
Implementation
iLLD » MSC
Collaboration diagram for Implementation:

Modules

Enumerations

Detailed Description


iLLD_TC38A: Enumerations

Enumerations
Enumerations
iLLD » MSC » Implementation
Collaboration diagram for Enumerations:

Enumerations

enum IfxMsc_Index {
IfxMsc_Index_none = -1,
IfxMsc_Index_0 = 0,
IfxMsc_Index_1,
IfxMsc_Index_2
}
List of the available MSC resources. More...

Detailed Description

Enumeration Type Documentation

◆ IfxMsc_Index

enum IfxMsc_Index

List of the available MSC resources.

Enumerator
IfxMsc_Index_none | Not Selected.
IfxMsc_Index_0 | "MSC index "+str(x)
IfxMsc_Index_1 | "MSC index "+str(x)
IfxMsc_Index_2 | "MSC index "+str(x)

Definition at line 79 of file IfxMsc_cfg.h.


iLLD_TC38A: Standard Driver

Modules
Standard Driver
iLLD » MSC
Collaboration diagram for Standard Driver:

Modules

Enumerations
Configure Flags
Set Command Target
Set Data
Get Data
Enable Module
Reset Module
Baud Calculator
IO Pin Configuration Functions
Module Functions

Detailed Description


iLLD_TC38A: Enumerations

Enumerations
Enumerations
iLLD » MSC » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxMsc_ActivePhaseSelection {
IfxMsc_ActivePhaseSelection_none = 0,
IfxMsc_ActivePhaseSelection_lowLevel = 1
}
Enable SRL/SRH Active Phase Selection Bit
Definition in Ifx_MSC.DSC.B.ENSELH and Ifx_MSC.DSC.B.ENSELL. More...
enum IfxMsc_AsynchronousBlock {
IfxMsc_AsynchronousBlock_bypassed = 0,
IfxMsc_AsynchronousBlock_noBypassed = 1
}
Asynchronous Block Configuration Register - Asynchronous Block Bypass
Definition in Ifx_MSC.ABC.B.ABB. More...
enum IfxMsc_ChipSelectActiveState {
IfxMsc_ChipSelectActiveState_high = 0,
IfxMsc_ChipSelectActiveState_low = 1
}
Output Control Register - Chip Selection Line Polarity
Definition in Ifx_MSC.OCR.B.CSLP. More...
enum IfxMsc_ClockSelect {
IfxMsc_ClockSelect_noClock = 0,
IfxMsc_ClockSelect_fper = 1
}
Asynchronous Block Configuration Register - Clock Select
Definition in Ifx_MSC.ABC.B.CLKSEL. More...
enum IfxMsc_CommandDataCommandRepetitionMode {
IfxMsc_CommandDataCommandRepetitionMode_disabled = 0,
IfxMsc_CommandDataCommandRepetitionMode_enabled = 1
}
Downstream Control Enhanced Register - Command-Data-Command in Data Repetition Mode
Definition in Ifx_MSC.DSCE.B.CDCM. More...
enum IfxMsc_CommandFrameInterrupt {
IfxMsc_CommandFrameInterrupt_disabled = 0,
IfxMsc_CommandFrameInterrupt_enabled = 1
}
Interrupt Control Register - Command Frame Interrupt Enable
Definition in Ifx_MSC.ICR.B.ECIE. More...
enum IfxMsc_CommandFrameInterruptNode {
IfxMsc_CommandFrameInterruptNode_SR0 = 0,
IfxMsc_CommandFrameInterruptNode_SR1,
IfxMsc_CommandFrameInterruptNode_SR2,
IfxMsc_CommandFrameInterruptNode_SR3
}
Interrupt Control Register - Command Frame Interrupt Node Pointer
Definition in Ifx_MSC.ICR.B.ECIP. More...
enum IfxMsc_CommandFrameLength {
IfxMsc_CommandFrameLength_0 = 0,
IfxMsc_CommandFrameLength_1 = 1,
IfxMsc_CommandFrameLength_2 = 2,
IfxMsc_CommandFrameLength_3,
IfxMsc_CommandFrameLength_4,
IfxMsc_CommandFrameLength_5,
IfxMsc_CommandFrameLength_6,
IfxMsc_CommandFrameLength_7,
IfxMsc_CommandFrameLength_8,
IfxMsc_CommandFrameLength_9,
IfxMsc_CommandFrameLength_10,
IfxMsc_CommandFrameLength_11,
IfxMsc_CommandFrameLength_12,
IfxMsc_CommandFrameLength_13,
IfxMsc_CommandFrameLength_14,
IfxMsc_CommandFrameLength_15,
IfxMsc_CommandFrameLength_16,
IfxMsc_CommandFrameLength_17 = 17,
IfxMsc_CommandFrameLength_18 = 18,
IfxMsc_CommandFrameLength_19,
IfxMsc_CommandFrameLength_20,
IfxMsc_CommandFrameLength_21,
IfxMsc_CommandFrameLength_22,
IfxMsc_CommandFrameLength_23,
IfxMsc_CommandFrameLength_24,
IfxMsc_CommandFrameLength_25,
IfxMsc_CommandFrameLength_26,
IfxMsc_CommandFrameLength_27,
IfxMsc_CommandFrameLength_28,
IfxMsc_CommandFrameLength_29,
IfxMsc_CommandFrameLength_30,
IfxMsc_CommandFrameLength_31,
IfxMsc_CommandFrameLength_32
}
Number of Bits shifted at command frames
Definition in Ifx_MSC.DSC.B.NBC. More...
enum IfxMsc_ControlFrameExtensionPassivePhaseLength {
IfxMsc_ControlFrameExtensionPassivePhaseLength_0 = 0,
IfxMsc_ControlFrameExtensionPassivePhaseLength_1,
IfxMsc_ControlFrameExtensionPassivePhaseLength_2,
IfxMsc_ControlFrameExtensionPassivePhaseLength_3,
IfxMsc_ControlFrameExtensionPassivePhaseLength_4,
IfxMsc_ControlFrameExtensionPassivePhaseLength_5,
IfxMsc_ControlFrameExtensionPassivePhaseLength_6,
IfxMsc_ControlFrameExtensionPassivePhaseLength_7,
IfxMsc_ControlFrameExtensionPassivePhaseLength_8,
IfxMsc_ControlFrameExtensionPassivePhaseLength_9,
IfxMsc_ControlFrameExtensionPassivePhaseLength_10,
IfxMsc_ControlFrameExtensionPassivePhaseLength_11,
IfxMsc_ControlFrameExtensionPassivePhaseLength_12,
IfxMsc_ControlFrameExtensionPassivePhaseLength_13,
IfxMsc_ControlFrameExtensionPassivePhaseLength_14,
IfxMsc_ControlFrameExtensionPassivePhaseLength_15,
IfxMsc_ControlFrameExtensionPassivePhaseLength_16,
IfxMsc_ControlFrameExtensionPassivePhaseLength_17,
IfxMsc_ControlFrameExtensionPassivePhaseLength_18,
IfxMsc_ControlFrameExtensionPassivePhaseLength_19,
IfxMsc_ControlFrameExtensionPassivePhaseLength_20,
IfxMsc_ControlFrameExtensionPassivePhaseLength_21,
IfxMsc_ControlFrameExtensionPassivePhaseLength_22,
IfxMsc_ControlFrameExtensionPassivePhaseLength_23,
IfxMsc_ControlFrameExtensionPassivePhaseLength_24,
IfxMsc_ControlFrameExtensionPassivePhaseLength_25,
IfxMsc_ControlFrameExtensionPassivePhaseLength_26,
IfxMsc_ControlFrameExtensionPassivePhaseLength_27,
IfxMsc_ControlFrameExtensionPassivePhaseLength_28,
IfxMsc_ControlFrameExtensionPassivePhaseLength_29,
IfxMsc_ControlFrameExtensionPassivePhaseLength_30,
IfxMsc_ControlFrameExtensionPassivePhaseLength_31,
IfxMsc_ControlFrameExtensionPassivePhaseLength_32,
IfxMsc_ControlFrameExtensionPassivePhaseLength_33,
IfxMsc_ControlFrameExtensionPassivePhaseLength_34,
IfxMsc_ControlFrameExtensionPassivePhaseLength_35,
IfxMsc_ControlFrameExtensionPassivePhaseLength_36,
IfxMsc_ControlFrameExtensionPassivePhaseLength_37,
IfxMsc_ControlFrameExtensionPassivePhaseLength_38,
IfxMsc_ControlFrameExtensionPassivePhaseLength_39,
IfxMsc_ControlFrameExtensionPassivePhaseLength_40,
IfxMsc_ControlFrameExtensionPassivePhaseLength_41,
IfxMsc_ControlFrameExtensionPassivePhaseLength_42,
IfxMsc_ControlFrameExtensionPassivePhaseLength_43,
IfxMsc_ControlFrameExtensionPassivePhaseLength_44,
IfxMsc_ControlFrameExtensionPassivePhaseLength_45,
IfxMsc_ControlFrameExtensionPassivePhaseLength_46,
IfxMsc_ControlFrameExtensionPassivePhaseLength_47,
IfxMsc_ControlFrameExtensionPassivePhaseLength_48,
IfxMsc_ControlFrameExtensionPassivePhaseLength_49,
IfxMsc_ControlFrameExtensionPassivePhaseLength_50,
IfxMsc_ControlFrameExtensionPassivePhaseLength_51,
IfxMsc_ControlFrameExtensionPassivePhaseLength_52,
IfxMsc_ControlFrameExtensionPassivePhaseLength_53,
IfxMsc_ControlFrameExtensionPassivePhaseLength_54,
IfxMsc_ControlFrameExtensionPassivePhaseLength_55,
IfxMsc_ControlFrameExtensionPassivePhaseLength_56,
IfxMsc_ControlFrameExtensionPassivePhaseLength_57,
IfxMsc_ControlFrameExtensionPassivePhaseLength_58,
IfxMsc_ControlFrameExtensionPassivePhaseLength_59,
IfxMsc_ControlFrameExtensionPassivePhaseLength_60,
IfxMsc_ControlFrameExtensionPassivePhaseLength_61,
IfxMsc_ControlFrameExtensionPassivePhaseLength_62,
IfxMsc_ControlFrameExtensionPassivePhaseLength_63,
IfxMsc_ControlFrameExtensionPassivePhaseLength_64,
IfxMsc_ControlFrameExtensionPassivePhaseLength_65,
IfxMsc_ControlFrameExtensionPassivePhaseLength_66,
IfxMsc_ControlFrameExtensionPassivePhaseLength_67,
IfxMsc_ControlFrameExtensionPassivePhaseLength_68,
IfxMsc_ControlFrameExtensionPassivePhaseLength_69,
IfxMsc_ControlFrameExtensionPassivePhaseLength_70,
IfxMsc_ControlFrameExtensionPassivePhaseLength_71,
IfxMsc_ControlFrameExtensionPassivePhaseLength_72,
IfxMsc_ControlFrameExtensionPassivePhaseLength_73,
IfxMsc_ControlFrameExtensionPassivePhaseLength_74,
IfxMsc_ControlFrameExtensionPassivePhaseLength_75,
IfxMsc_ControlFrameExtensionPassivePhaseLength_76,
IfxMsc_ControlFrameExtensionPassivePhaseLength_77,
IfxMsc_ControlFrameExtensionPassivePhaseLength_78,
IfxMsc_ControlFrameExtensionPassivePhaseLength_79,
IfxMsc_ControlFrameExtensionPassivePhaseLength_80,
IfxMsc_ControlFrameExtensionPassivePhaseLength_81,
IfxMsc_ControlFrameExtensionPassivePhaseLength_82,
IfxMsc_ControlFrameExtensionPassivePhaseLength_83,
IfxMsc_ControlFrameExtensionPassivePhaseLength_84,
IfxMsc_ControlFrameExtensionPassivePhaseLength_85,
IfxMsc_ControlFrameExtensionPassivePhaseLength_86,
IfxMsc_ControlFrameExtensionPassivePhaseLength_87,
IfxMsc_ControlFrameExtensionPassivePhaseLength_88,
IfxMsc_ControlFrameExtensionPassivePhaseLength_89,
IfxMsc_ControlFrameExtensionPassivePhaseLength_90,
IfxMsc_ControlFrameExtensionPassivePhaseLength_91,
IfxMsc_ControlFrameExtensionPassivePhaseLength_92,
IfxMsc_ControlFrameExtensionPassivePhaseLength_93,
IfxMsc_ControlFrameExtensionPassivePhaseLength_94,
IfxMsc_ControlFrameExtensionPassivePhaseLength_95,
IfxMsc_ControlFrameExtensionPassivePhaseLength_96,
IfxMsc_ControlFrameExtensionPassivePhaseLength_97,
IfxMsc_ControlFrameExtensionPassivePhaseLength_98,
IfxMsc_ControlFrameExtensionPassivePhaseLength_99,
IfxMsc_ControlFrameExtensionPassivePhaseLength_100,
IfxMsc_ControlFrameExtensionPassivePhaseLength_101,
IfxMsc_ControlFrameExtensionPassivePhaseLength_102,
IfxMsc_ControlFrameExtensionPassivePhaseLength_103,
IfxMsc_ControlFrameExtensionPassivePhaseLength_104,
IfxMsc_ControlFrameExtensionPassivePhaseLength_105,
IfxMsc_ControlFrameExtensionPassivePhaseLength_106,
IfxMsc_ControlFrameExtensionPassivePhaseLength_107,
IfxMsc_ControlFrameExtensionPassivePhaseLength_108,
IfxMsc_ControlFrameExtensionPassivePhaseLength_109,
IfxMsc_ControlFrameExtensionPassivePhaseLength_110,
IfxMsc_ControlFrameExtensionPassivePhaseLength_111,
IfxMsc_ControlFrameExtensionPassivePhaseLength_112,
IfxMsc_ControlFrameExtensionPassivePhaseLength_113,
IfxMsc_ControlFrameExtensionPassivePhaseLength_114,
IfxMsc_ControlFrameExtensionPassivePhaseLength_115,
IfxMsc_ControlFrameExtensionPassivePhaseLength_116,
IfxMsc_ControlFrameExtensionPassivePhaseLength_117,
IfxMsc_ControlFrameExtensionPassivePhaseLength_118,
IfxMsc_ControlFrameExtensionPassivePhaseLength_119,
IfxMsc_ControlFrameExtensionPassivePhaseLength_120,
IfxMsc_ControlFrameExtensionPassivePhaseLength_121,
IfxMsc_ControlFrameExtensionPassivePhaseLength_122,
IfxMsc_ControlFrameExtensionPassivePhaseLength_123,
IfxMsc_ControlFrameExtensionPassivePhaseLength_124,
IfxMsc_ControlFrameExtensionPassivePhaseLength_125,
IfxMsc_ControlFrameExtensionPassivePhaseLength_126,
IfxMsc_ControlFrameExtensionPassivePhaseLength_127
}
Downstream Timing Extension Register - Passive Phase Length at Control Frames Extension
Definition in Ifx_MSC.DSTE.B.PPCE. More...
enum IfxMsc_DataFrameExtensionPassivePhaseLength {
IfxMsc_DataFrameExtensionPassivePhaseLength_0 = 0,
IfxMsc_DataFrameExtensionPassivePhaseLength_1,
IfxMsc_DataFrameExtensionPassivePhaseLength_2,
IfxMsc_DataFrameExtensionPassivePhaseLength_3
}
Downstream Timing Extension Register - Passive Phase Length at Data Frames Extension
Definition in Ifx_MSC.DSTE.B.PPDE. More...
enum IfxMsc_DataFrameInterrupt {
IfxMsc_DataFrameInterrupt_disabled = 0,
IfxMsc_DataFrameInterrupt_atLastDataBit = 1,
IfxMsc_DataFrameInterrupt_atFirstDataBit = 2
}
Interrupt Control Register - Data Frame Interrupt Enable
Definition in Ifx_MSC.ICR.B.EDIE. More...
enum IfxMsc_DataFrameInterruptNode {
IfxMsc_DataFrameInterruptNode_SR0 = 0,
IfxMsc_DataFrameInterruptNode_SR1,
IfxMsc_DataFrameInterruptNode_SR2,
IfxMsc_DataFrameInterruptNode_SR3
}
Interrupt Control Register - Data Frame Interrupt Node Pointer
Definition in Ifx_MSC.ICR.B.EDIP. More...
enum IfxMsc_DataFrameLength {
IfxMsc_DataFrameLength_0 = 0,
IfxMsc_DataFrameLength_1 = 1,
IfxMsc_DataFrameLength_2 = 2,
IfxMsc_DataFrameLength_3,
IfxMsc_DataFrameLength_4,
IfxMsc_DataFrameLength_5,
IfxMsc_DataFrameLength_6,
IfxMsc_DataFrameLength_7,
IfxMsc_DataFrameLength_8,
IfxMsc_DataFrameLength_9,
IfxMsc_DataFrameLength_10,
IfxMsc_DataFrameLength_11,
IfxMsc_DataFrameLength_12,
IfxMsc_DataFrameLength_13,
IfxMsc_DataFrameLength_14,
IfxMsc_DataFrameLength_15,
IfxMsc_DataFrameLength_16
}
Number of SRx[] (x->SRL/SRH) Bits Shifted at Data Frames
Definition in Ifx_MSC.DSC.B.NDBH and Ifx_MSC.DSC.B.NDBL. More...
enum IfxMsc_DataFramePassivePhaseLength {
IfxMsc_DataFramePassivePhaseLength_2 = 2,
IfxMsc_DataFramePassivePhaseLength_3,
IfxMsc_DataFramePassivePhaseLength_4,
IfxMsc_DataFramePassivePhaseLength_5,
IfxMsc_DataFramePassivePhaseLength_6,
IfxMsc_DataFramePassivePhaseLength_7,
IfxMsc_DataFramePassivePhaseLength_8,
IfxMsc_DataFramePassivePhaseLength_9,
IfxMsc_DataFramePassivePhaseLength_10,
IfxMsc_DataFramePassivePhaseLength_11,
IfxMsc_DataFramePassivePhaseLength_12,
IfxMsc_DataFramePassivePhaseLength_13,
IfxMsc_DataFramePassivePhaseLength_14,
IfxMsc_DataFramePassivePhaseLength_15,
IfxMsc_DataFramePassivePhaseLength_16,
IfxMsc_DataFramePassivePhaseLength_17,
IfxMsc_DataFramePassivePhaseLength_18,
IfxMsc_DataFramePassivePhaseLength_19,
IfxMsc_DataFramePassivePhaseLength_20,
IfxMsc_DataFramePassivePhaseLength_21,
IfxMsc_DataFramePassivePhaseLength_22,
IfxMsc_DataFramePassivePhaseLength_23,
IfxMsc_DataFramePassivePhaseLength_24,
IfxMsc_DataFramePassivePhaseLength_25,
IfxMsc_DataFramePassivePhaseLength_26,
IfxMsc_DataFramePassivePhaseLength_27,
IfxMsc_DataFramePassivePhaseLength_28,
IfxMsc_DataFramePassivePhaseLength_29,
IfxMsc_DataFramePassivePhaseLength_30,
IfxMsc_DataFramePassivePhaseLength_31,
IfxMsc_DataFramePassivePhaseLength_32
}
Passive Phase Length at Data Frames
Definition in Ifx_MSC.DSC.B.PPD. More...
enum IfxMsc_DividerMode {
IfxMsc_DividerMode_normal = 1,
IfxMsc_DividerMode_fractional = 2
}
Divider mode. More...
enum IfxMsc_EmergencyStop {
IfxMsc_EmergencyStop_disabled = 0,
IfxMsc_EmergencyStop_enabled = 1
}
Emergency Stop Register - Emergency stop feature Enable or Disable - SRL and SRH
Definition in Ifx_MSC.ESR. More...
enum IfxMsc_Extension {
IfxMsc_Extension_disabled = 0,
IfxMsc_Extension_enabled = 1
}
Downstream Control Enhanced Register - Extension Enable
Definition in Ifx_MSC.DSCE.B.NDBLE. More...
enum IfxMsc_ExternalBitInjectionPosition {
IfxMsc_ExternalBitInjectionPosition_0 = 0,
IfxMsc_ExternalBitInjectionPosition_1,
IfxMsc_ExternalBitInjectionPosition_2,
IfxMsc_ExternalBitInjectionPosition_3,
IfxMsc_ExternalBitInjectionPosition_4,
IfxMsc_ExternalBitInjectionPosition_5,
IfxMsc_ExternalBitInjectionPosition_6,
IfxMsc_ExternalBitInjectionPosition_7,
IfxMsc_ExternalBitInjectionPosition_8,
IfxMsc_ExternalBitInjectionPosition_9,
IfxMsc_ExternalBitInjectionPosition_10,
IfxMsc_ExternalBitInjectionPosition_11,
IfxMsc_ExternalBitInjectionPosition_12,
IfxMsc_ExternalBitInjectionPosition_13,
IfxMsc_ExternalBitInjectionPosition_14,
IfxMsc_ExternalBitInjectionPosition_15,
IfxMsc_ExternalBitInjectionPosition_16,
IfxMsc_ExternalBitInjectionPosition_17,
IfxMsc_ExternalBitInjectionPosition_18,
IfxMsc_ExternalBitInjectionPosition_19,
IfxMsc_ExternalBitInjectionPosition_20,
IfxMsc_ExternalBitInjectionPosition_21,
IfxMsc_ExternalBitInjectionPosition_22,
IfxMsc_ExternalBitInjectionPosition_23,
IfxMsc_ExternalBitInjectionPosition_24,
IfxMsc_ExternalBitInjectionPosition_25,
IfxMsc_ExternalBitInjectionPosition_26,
IfxMsc_ExternalBitInjectionPosition_27,
IfxMsc_ExternalBitInjectionPosition_28,
IfxMsc_ExternalBitInjectionPosition_29,
IfxMsc_ExternalBitInjectionPosition_30,
IfxMsc_ExternalBitInjectionPosition_31,
IfxMsc_ExternalBitInjectionPosition_32,
IfxMsc_ExternalBitInjectionPosition_33,
IfxMsc_ExternalBitInjectionPosition_34,
IfxMsc_ExternalBitInjectionPosition_35,
IfxMsc_ExternalBitInjectionPosition_36,
IfxMsc_ExternalBitInjectionPosition_37,
IfxMsc_ExternalBitInjectionPosition_38,
IfxMsc_ExternalBitInjectionPosition_39,
IfxMsc_ExternalBitInjectionPosition_40,
IfxMsc_ExternalBitInjectionPosition_41,
IfxMsc_ExternalBitInjectionPosition_42,
IfxMsc_ExternalBitInjectionPosition_43,
IfxMsc_ExternalBitInjectionPosition_44,
IfxMsc_ExternalBitInjectionPosition_45,
IfxMsc_ExternalBitInjectionPosition_46,
IfxMsc_ExternalBitInjectionPosition_47,
IfxMsc_ExternalBitInjectionPosition_48,
IfxMsc_ExternalBitInjectionPosition_49,
IfxMsc_ExternalBitInjectionPosition_50,
IfxMsc_ExternalBitInjectionPosition_51,
IfxMsc_ExternalBitInjectionPosition_52,
IfxMsc_ExternalBitInjectionPosition_53,
IfxMsc_ExternalBitInjectionPosition_54,
IfxMsc_ExternalBitInjectionPosition_55,
IfxMsc_ExternalBitInjectionPosition_56,
IfxMsc_ExternalBitInjectionPosition_57,
IfxMsc_ExternalBitInjectionPosition_58,
IfxMsc_ExternalBitInjectionPosition_59,
IfxMsc_ExternalBitInjectionPosition_60,
IfxMsc_ExternalBitInjectionPosition_61,
IfxMsc_ExternalBitInjectionPosition_62,
IfxMsc_ExternalBitInjectionPosition_63
}
Downstream Control Enhanced Register - Injection Position of the Pin 0 and 1 Signal
Definition in Ifx_MSC.DSCE.B.INJPOSP0 and Ifx_MSC.DSCE.B.INJPOSP1. More...
enum IfxMsc_ExternalSignalInjection {
IfxMsc_ExternalSignalInjection_disabled = 0,
IfxMsc_ExternalSignalInjection_enabled = 1
}
Downstream Control Enhanced Register - Injection Enable of the Pin 0 and 1 Signal
Definition in Ifx_MSC.DSCE.B.INJENP0 and Ifx_MSC.DSCE.B.INJENP1. More...
enum IfxMsc_FastMode {
IfxMsc_FastMode_disabled = 0,
IfxMsc_FastMode_enabled = 1
}
Enum for enable and disable Fast Mode. More...
enum IfxMsc_FclClockControlEnabled {
IfxMsc_FclClockControlEnabled_activePhaseOnly = 0,
IfxMsc_FclClockControlEnabled_always = 1
}
Output Control Register - Clock Control
Definition in Ifx_MSC.OCR.B.CLKCTRL. More...
enum IfxMsc_FclLinePolarity {
IfxMsc_FclLinePolarity_nonInverted = 0,
IfxMsc_FclLinePolarity_inverted = 1
}
Output Control Register - FCLP Line Polarity
Definition in Ifx_MSC.OCR.B.CLP. More...
enum IfxMsc_HardwareClock {
IfxMsc_HardwareClock_disabled = 0,
IfxMsc_HardwareClock_enabled = 1
}
Enable hardware clock control. More...
enum IfxMsc_InterruptServiceRequest {
IfxMsc_InterruptServiceRequest_0 = 0,
IfxMsc_InterruptServiceRequest_1,
IfxMsc_InterruptServiceRequest_2,
IfxMsc_InterruptServiceRequest_3,
IfxMsc_InterruptServiceRequest_4
}
Interrupt Service Request. More...
enum IfxMsc_ModuleSuspendRequestBit {
IfxMsc_ModuleSuspendRequestBit_noSuspend = 0,
IfxMsc_ModuleSuspendRequestBit_hardSuspend = 1,
IfxMsc_ModuleSuspendRequestBit_softSuspend = 2
}
OCDS Control and Status - OCDS Suspend Control Definition in Ifx_MSC.OCS.B.SUS. More...
enum IfxMsc_MsbBitDataExtension {
IfxMsc_MsbBitDataExtension_notPresent = 0,
IfxMsc_MsbBitDataExtension_present = 1
}
Downstream Control Enhanced Register - Number of SRL/SRH Bits Shifted at Data Frames Extension (NDBL/NDBH)
Definition in Ifx_MSC.DSCE.B.NDBLE and Ifx_MSC.DSCE.B.NDBHE. More...
enum IfxMsc_NDividerAbra {
IfxMsc_NDividerAbra_1 = 0,
IfxMsc_NDividerAbra_2,
IfxMsc_NDividerAbra_3,
IfxMsc_NDividerAbra_4,
IfxMsc_NDividerAbra_5,
IfxMsc_NDividerAbra_6,
IfxMsc_NDividerAbra_7,
IfxMsc_NDividerAbra_8
}
Asynchronous Block Configuration Register - N Divider ABRA
Definition in Ifx_MSC.ABC.B.NDA. More...
enum IfxMsc_NDividerDownstream {
IfxMsc_NDividerDownstream_1 = 0,
IfxMsc_NDividerDownstream_2,
IfxMsc_NDividerDownstream_3,
IfxMsc_NDividerDownstream_4,
IfxMsc_NDividerDownstream_5,
IfxMsc_NDividerDownstream_6,
IfxMsc_NDividerDownstream_7,
IfxMsc_NDividerDownstream_8,
IfxMsc_NDividerDownstream_9,
IfxMsc_NDividerDownstream_10,
IfxMsc_NDividerDownstream_11,
IfxMsc_NDividerDownstream_12,
IfxMsc_NDividerDownstream_13,
IfxMsc_NDividerDownstream_14,
IfxMsc_NDividerDownstream_15,
IfxMsc_NDividerDownstream_16
}
Downstream Timing Extension Register - N Divider Downstream
Definition in Ifx_MSC.DSTE.B.NDD. More...
enum IfxMsc_OverflowInterrupt {
IfxMsc_OverflowInterrupt_disabled = 0,
IfxMsc_OverflowInterrupt_enabled = 1
}
Asynchronous Block Configuration Register - Overflow Interrupt Enable
Definition in Ifx_MSC.ABC.B.OIE. More...
enum IfxMsc_OverflowInterruptNode {
IfxMsc_OverflowInterruptNode_SR0 = 0,
IfxMsc_OverflowInterruptNode_SR1,
IfxMsc_OverflowInterruptNode_SR2,
IfxMsc_OverflowInterruptNode_SR3,
IfxMsc_OverflowInterruptNode_SR4
}
Asynchronous Block Configuration Register - Overflow Interrupt Node Pointer
Definition in Ifx_MSC.ABC.B.OIP. More...
enum IfxMsc_Parity {
IfxMsc_Parity_even = 0,
IfxMsc_Parity_odd = 1
}
Parity Mode
Definition in Ifx_MSC.USR.B.PCT. More...
enum IfxMsc_PassiveTimeFrameCount {
IfxMsc_PassiveTimeFrameCount_0 = 0,
IfxMsc_PassiveTimeFrameCount_1 = 1,
IfxMsc_PassiveTimeFrameCount_2,
IfxMsc_PassiveTimeFrameCount_3,
IfxMsc_PassiveTimeFrameCount_4,
IfxMsc_PassiveTimeFrameCount_5,
IfxMsc_PassiveTimeFrameCount_6,
IfxMsc_PassiveTimeFrameCount_7,
IfxMsc_PassiveTimeFrameCount_8,
IfxMsc_PassiveTimeFrameCount_9,
IfxMsc_PassiveTimeFrameCount_10,
IfxMsc_PassiveTimeFrameCount_11,
IfxMsc_PassiveTimeFrameCount_12,
IfxMsc_PassiveTimeFrameCount_13,
IfxMsc_PassiveTimeFrameCount_14,
IfxMsc_PassiveTimeFrameCount_15
}
Downstream Status Register - Number Of Passive Time Frames
Definition in Ifx_MSC.DSS.B.NPTF. More...
enum IfxMsc_ReceiveDataInterrupt {
IfxMsc_ReceiveDataInterrupt_disabled = 0,
IfxMsc_ReceiveDataInterrupt_onDataReceive = 1,
IfxMsc_ReceiveDataInterrupt_onRdieSet = 2,
IfxMsc_ReceiveDataInterrupt_onDataReceiveInUd3 = 3
}
Interrupt Control Register - Receive Data Interrupt Enable
Definition in Ifx_MSC.ICR.B.RDIE. More...
enum IfxMsc_ReceiveDataInterruptNode {
IfxMsc_ReceiveDataInterruptNode_SR0 = 0,
IfxMsc_ReceiveDataInterruptNode_SR1,
IfxMsc_ReceiveDataInterruptNode_SR2,
IfxMsc_ReceiveDataInterruptNode_SR3
}
Interrupt Control Register - Receive Data Interrupt Pointer
Definition in Ifx_MSC.ICR.B.RDIP. More...
enum IfxMsc_SdiLinePolarity {
IfxMsc_SdiLinePolarity_likeSi = 0,
IfxMsc_SdiLinePolarity_invertedSi = 1
}
Output Control Register - SDI Line Polarity
Definition in Ifx_MSC.OCR.B.ILP. More...
enum IfxMsc_SerialDataInput {
IfxMsc_SerialDataInput_0 = 0,
IfxMsc_SerialDataInput_1,
IfxMsc_SerialDataInput_2,
IfxMsc_SerialDataInput_3,
IfxMsc_SerialDataInput_4,
IfxMsc_SerialDataInput_5,
IfxMsc_SerialDataInput_6,
IfxMsc_SerialDataInput_7
}
Output Control Register - Serial Data Input Selection
Definition in Ifx_MSC.OCR.B.SDISEL. More...
enum IfxMsc_ServiceRequestDelay {
IfxMsc_ServiceRequestDelay_noDelay = 0,
IfxMsc_ServiceRequestDelay_1bit = 1
}
Service Request Delay
Definition in Ifx_MSC.USR.B.SRDC. More...
enum IfxMsc_ShiftClockPhaseDuration {
IfxMsc_ShiftClockPhaseDuration_1 = 0,
IfxMsc_ShiftClockPhaseDuration_2,
IfxMsc_ShiftClockPhaseDuration_3,
IfxMsc_ShiftClockPhaseDuration_4,
IfxMsc_ShiftClockPhaseDuration_5,
IfxMsc_ShiftClockPhaseDuration_6,
IfxMsc_ShiftClockPhaseDuration_7,
IfxMsc_ShiftClockPhaseDuration_8,
IfxMsc_ShiftClockPhaseDuration_9,
IfxMsc_ShiftClockPhaseDuration_10,
IfxMsc_ShiftClockPhaseDuration_11,
IfxMsc_ShiftClockPhaseDuration_12,
IfxMsc_ShiftClockPhaseDuration_13,
IfxMsc_ShiftClockPhaseDuration_14,
IfxMsc_ShiftClockPhaseDuration_15,
IfxMsc_ShiftClockPhaseDuration_16
}
Asynchronous Block Configuration Register - Duration of the Low/High Phase of the Shift Clock
Definition in Ifx_MSC.ABC.B.LOW and Ifx_MSC.ABC.B.HIGH. More...
enum IfxMsc_SleepMode {
IfxMsc_SleepMode_enable = 0,
IfxMsc_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_MSC.CLC.B.EDIS. More...
enum IfxMsc_SoLinePolarity {
IfxMsc_SoLinePolarity_nonInverted = 0,
IfxMsc_SoLinePolarity_inverted = 1
}
Output Control Register - SOP Line Polarity
Definition in Ifx_MSC.OCR.B.SLP. More...
enum IfxMsc_Source {
IfxMsc_Source_downstreamDataRegister = 0,
IfxMsc_Source_alternateInputLine = 2,
IfxMsc_Source_alternateInputLineInverted = 3
}
Downstream Select Data Source Low Register - Select Source for - SRL and SRHNumber Of Passive Time Frames
Definition in Ifx_MSC.DSDSL and Ifx_MSC.DSDSH. More...
enum IfxMsc_SuspendMode {
IfxMsc_SuspendMode_none = 0,
IfxMsc_SuspendMode_hard = 1,
IfxMsc_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxMsc_Target {
IfxMsc_Target_en0 = 0,
IfxMsc_Target_en1,
IfxMsc_Target_en2,
IfxMsc_Target_en3
}
Msc Targets - use as chip enable selection for ENH, ENL and ENC. More...
enum IfxMsc_TimeFrameInterrupt {
IfxMsc_TimeFrameInterrupt_disabled = 0,
IfxMsc_TimeFrameInterrupt_enabled = 1
}
Interrupt Control Register - Time Frame Interrupt Enable
Definition in Ifx_MSC.ICR.B.TFIE. More...
enum IfxMsc_TimeFrameInterruptNode {
IfxMsc_TimeFrameInterruptNode_SR0 = 0,
IfxMsc_TimeFrameInterruptNode_SR1,
IfxMsc_TimeFrameInterruptNode_SR2,
IfxMsc_TimeFrameInterruptNode_SR3
}
Interrupt Control Register - Time Frame Interrupt Pointer
Definition in Ifx_MSC.ICR.B.TFIP. More...
enum IfxMsc_TransmissionMode {
IfxMsc_TransmissionMode_triggered = 0,
IfxMsc_TransmissionMode_dataRepetition = 1
}
Downstream Channel Transmission Mode
Definition in Ifx_MSC.DSC.B.TM. More...
enum IfxMsc_UnderflowInterrupt {
IfxMsc_UnderflowInterrupt_disabled = 0,
IfxMsc_UnderflowInterrupt_enabled = 1
}
Asynchronous Block Configuration Register - Underflow Interrupt Enable
Definition in Ifx_MSC.ABC.B.UIE. More...
enum IfxMsc_UnderflowInterruptNode {
IfxMsc_UnderflowInterruptNode_SR0 = 0,
IfxMsc_UnderflowInterruptNode_SR1,
IfxMsc_UnderflowInterruptNode_SR2,
IfxMsc_UnderflowInterruptNode_SR3,
IfxMsc_UnderflowInterruptNode_SR4
}
Asynchronous Block Configuration Register - Underflow Interrupt Node Pointer
Definition in Ifx_MSC.ABC.B.UIP. More...
enum IfxMsc_UpstreamChannelFrameType {
IfxMsc_UpstreamChannelFrameType_12bit = 0,
IfxMsc_UpstreamChannelFrameType_16bit = 1
}
Channel Frame Type
Definition in Ifx_MSC.USR.B.UFT. More...
enum IfxMsc_UpstreamChannelReceivingRate {
IfxMsc_UpstreamChannelReceivingRate_disabled = 0,
IfxMsc_UpstreamChannelReceivingRate_4 = 1,
IfxMsc_UpstreamChannelReceivingRate_8 = 2,
IfxMsc_UpstreamChannelReceivingRate_16 = 3,
IfxMsc_UpstreamChannelReceivingRate_32 = 4,
IfxMsc_UpstreamChannelReceivingRate_64 = 5,
IfxMsc_UpstreamChannelReceivingRate_128 = 6,
IfxMsc_UpstreamChannelReceivingRate_256 = 7
}
Upstream Receiving Rate
Definition in Ifx_MSC.USR.B.URR. More...
enum IfxMsc_UpstreamTimeoutInterrupt {
IfxMsc_UpstreamTimeoutInterrupt_disabled = 0,
IfxMsc_UpstreamTimeoutInterrupt_enabled = 1
}
Upstream Control Enhanced Register 1 - Upstream Timeout Interrupt Enable
Definition in Ifx_MSC.USCE.B.USTOEN. More...
enum IfxMsc_UpstreamTimeoutInterruptNode {
IfxMsc_UpstreamTimeoutInterruptNode_SR0 = 0,
IfxMsc_UpstreamTimeoutInterruptNode_SR1,
IfxMsc_UpstreamTimeoutInterruptNode_SR2,
IfxMsc_UpstreamTimeoutInterruptNode_SR3,
IfxMsc_UpstreamTimeoutInterruptNode_SR4
}
Upstream Control Enhanced Register 1 - Upstream Timeout Interrupt Node Pointer
Definition in Ifx_MSC.USCE.B.USTOIP. More...
enum IfxMsc_UpstreamTimeoutPrescaler {
IfxMsc_UpstreamTimeoutPrescaler_1 = 0,
IfxMsc_UpstreamTimeoutPrescaler_2 = 1,
IfxMsc_UpstreamTimeoutPrescaler_4 = 2,
IfxMsc_UpstreamTimeoutPrescaler_8 = 3,
IfxMsc_UpstreamTimeoutPrescaler_16 = 4,
IfxMsc_UpstreamTimeoutPrescaler_32 = 5,
IfxMsc_UpstreamTimeoutPrescaler_64 = 6,
IfxMsc_UpstreamTimeoutPrescaler_128 = 7,
IfxMsc_UpstreamTimeoutPrescaler_256 = 8,
IfxMsc_UpstreamTimeoutPrescaler_512 = 9,
IfxMsc_UpstreamTimeoutPrescaler_1024 = 10,
IfxMsc_UpstreamTimeoutPrescaler_2048 = 11,
IfxMsc_UpstreamTimeoutPrescaler_4096 = 12,
IfxMsc_UpstreamTimeoutPrescaler_8192 = 13,
IfxMsc_UpstreamTimeoutPrescaler_16384 = 14,
IfxMsc_UpstreamTimeoutPrescaler_32768 = 15
}
Upstream Control Enhanced Register 1 - Upstream Timeout Prescaler
Definition in Ifx_MSC.USCE.B.USTOPRE. More...
enum IfxMsc_UpstreamTimeoutValue {
IfxMsc_UpstreamTimeoutValue_1 = 0,
IfxMsc_UpstreamTimeoutValue_2,
IfxMsc_UpstreamTimeoutValue_3,
IfxMsc_UpstreamTimeoutValue_4,
IfxMsc_UpstreamTimeoutValue_5,
IfxMsc_UpstreamTimeoutValue_6,
IfxMsc_UpstreamTimeoutValue_7,
IfxMsc_UpstreamTimeoutValue_8,
IfxMsc_UpstreamTimeoutValue_9,
IfxMsc_UpstreamTimeoutValue_10,
IfxMsc_UpstreamTimeoutValue_11,
IfxMsc_UpstreamTimeoutValue_12,
IfxMsc_UpstreamTimeoutValue_13,
IfxMsc_UpstreamTimeoutValue_14,
IfxMsc_UpstreamTimeoutValue_15,
IfxMsc_UpstreamTimeoutValue_16
}
Upstream Control Enhanced Register 1 - Upstream Timeout Value
Definition in Ifx_MSC.USCE.B.USTOVAL. More...

Detailed Description

Enumeration Type Documentation

◆ IfxMsc_ActivePhaseSelection

enum IfxMsc_ActivePhaseSelection

Enable SRL/SRH Active Phase Selection Bit
Definition in Ifx_MSC.DSC.B.ENSELH and Ifx_MSC.DSC.B.ENSELL.

Enumerator
IfxMsc_ActivePhaseSelection_none | No selection bit inserted.
IfxMsc_ActivePhaseSelection_lowLevel | Low level selection bit inserted.

Definition at line 87 of file IfxMsc.h.

◆ IfxMsc_AsynchronousBlock

enum IfxMsc_AsynchronousBlock

Asynchronous Block Configuration Register - Asynchronous Block Bypass
Definition in Ifx_MSC.ABC.B.ABB.

Enumerator
IfxMsc_AsynchronousBlock_bypassed | Asynchronous block and the n-divider of the MSC downstream path are bypassed and are disabled.
IfxMsc_AsynchronousBlock_noBypassed | Asynchronous block and the n-divider of the MSC downstream path are active.

Definition at line 96 of file IfxMsc.h.

◆ IfxMsc_ChipSelectActiveState

enum IfxMsc_ChipSelectActiveState

Output Control Register - Chip Selection Line Polarity
Definition in Ifx_MSC.OCR.B.CSLP.

Enumerator
IfxMsc_ChipSelectActiveState_high | EN[3:0] and ENL,ENH,ENC polarities are identical.
IfxMsc_ChipSelectActiveState_low | EN[3:0] and ENL,ENH,ENC polarities are inverted.

Definition at line 105 of file IfxMsc.h.

◆ IfxMsc_ClockSelect

enum IfxMsc_ClockSelect

Asynchronous Block Configuration Register - Clock Select
Definition in Ifx_MSC.ABC.B.CLKSEL.

Enumerator
IfxMsc_ClockSelect_noClock | no clock source for the ABRA block
IfxMsc_ClockSelect_fper | f_PER is the clock source for the ABRA block

Definition at line 114 of file IfxMsc.h.

◆ IfxMsc_CommandDataCommandRepetitionMode

enum IfxMsc_CommandDataCommandRepetitionMode

Downstream Control Enhanced Register - Command-Data-Command in Data Repetition Mode
Definition in Ifx_MSC.DSCE.B.CDCM.

Enumerator
IfxMsc_CommandDataCommandRepetitionMode_disabled | Disables the automatic insertion of data.
IfxMsc_CommandDataCommandRepetitionMode_enabled | Enables the automatic insertion of data.

Definition at line 123 of file IfxMsc.h.

◆ IfxMsc_CommandFrameInterrupt

enum IfxMsc_CommandFrameInterrupt

Interrupt Control Register - Command Frame Interrupt Enable
Definition in Ifx_MSC.ICR.B.ECIE.

Enumerator
IfxMsc_CommandFrameInterrupt_disabled | Interrupt generation disabled.
IfxMsc_CommandFrameInterrupt_enabled | Interrupt generation enabled.

Definition at line 132 of file IfxMsc.h.

◆ IfxMsc_CommandFrameInterruptNode

enum IfxMsc_CommandFrameInterruptNode

Interrupt Control Register - Command Frame Interrupt Node Pointer
Definition in Ifx_MSC.ICR.B.ECIP.

Enumerator
IfxMsc_CommandFrameInterruptNode_SR0 | Service request output SR0 selected.
IfxMsc_CommandFrameInterruptNode_SR1 | Service request output SR1 selected.
IfxMsc_CommandFrameInterruptNode_SR2 | Service request output SR2 selected.
IfxMsc_CommandFrameInterruptNode_SR3 | Service request output SR3 selected.

Definition at line 141 of file IfxMsc.h.

◆ IfxMsc_CommandFrameLength

enum IfxMsc_CommandFrameLength

Number of Bits shifted at command frames
Definition in Ifx_MSC.DSC.B.NBC.

Enumerator
IfxMsc_CommandFrameLength_0 | No bit shifted.
IfxMsc_CommandFrameLength_1 | SRL[0] Shifted.
IfxMsc_CommandFrameLength_2 | SRL[1:0] Shifted.
IfxMsc_CommandFrameLength_3 | SRL[2:0] Shifted.
IfxMsc_CommandFrameLength_4 | SRL[3:0] Shifted.
IfxMsc_CommandFrameLength_5 | SRL[4:0] Shifted.
IfxMsc_CommandFrameLength_6 | SRL[5:0] Shifted.
IfxMsc_CommandFrameLength_7 | SRL[6:0] Shifted.
IfxMsc_CommandFrameLength_8 | SRL[7:0] Shifted.
IfxMsc_CommandFrameLength_9 | SRL[8:0] Shifted.
IfxMsc_CommandFrameLength_10 | SRL[9:0] Shifted.
IfxMsc_CommandFrameLength_11 | SRL[10:0] Shifted.
IfxMsc_CommandFrameLength_12 | SRL[11:0] Shifted.
IfxMsc_CommandFrameLength_13 | SRL[12:0] Shifted.
IfxMsc_CommandFrameLength_14 | SRL[13:0] Shifted.
IfxMsc_CommandFrameLength_15 | SRL[14:0] Shifted.
IfxMsc_CommandFrameLength_16 | SRL[15:0] Shifted.
IfxMsc_CommandFrameLength_17 | SRL[15:0] and SRH[0] Shifted.
IfxMsc_CommandFrameLength_18 | SRL[15:0] and SRH[1:0] Shifted.
IfxMsc_CommandFrameLength_19 | SRL[15:0] and SRH[2:0] Shifted.
IfxMsc_CommandFrameLength_20 | SRL[15:0] and SRH[3:0] Shifted.
IfxMsc_CommandFrameLength_21 | SRL[15:0] and SRH[4:0] Shifted.
IfxMsc_CommandFrameLength_22 | SRL[15:0] and SRH[5:0] Shifted.
IfxMsc_CommandFrameLength_23 | SRL[15:0] and SRH[6:0] Shifted.
IfxMsc_CommandFrameLength_24 | SRL[15:0] and SRH[7:0] Shifted.
IfxMsc_CommandFrameLength_25 | SRL[15:0] and SRH[8:0] Shifted.
IfxMsc_CommandFrameLength_26 | SRL[15:0] and SRH[9:0] Shifted.
IfxMsc_CommandFrameLength_27 | SRL[15:0] and SRH[10:0] Shifted.
IfxMsc_CommandFrameLength_28 | SRL[15:0] and SRH[11:0] Shifted.
IfxMsc_CommandFrameLength_29 | SRL[15:0] and SRH[12:0] Shifted.
IfxMsc_CommandFrameLength_30 | SRL[15:0] and SRH[13:0] Shifted.
IfxMsc_CommandFrameLength_31 | SRL[15:0] and SRH[14:0] Shifted.
IfxMsc_CommandFrameLength_32 | SRL[15:0] and SRH[15:0] Shifted.

Definition at line 152 of file IfxMsc.h.

◆ IfxMsc_ControlFrameExtensionPassivePhaseLength

enum IfxMsc_ControlFrameExtensionPassivePhaseLength

Downstream Timing Extension Register - Passive Phase Length at Control Frames Extension
Definition in Ifx_MSC.DSTE.B.PPCE.

Enumerator
IfxMsc_ControlFrameExtensionPassivePhaseLength_0 | Length of Command frames passive phase is 2.
IfxMsc_ControlFrameExtensionPassivePhaseLength_1 | Length of Command frames passive phase is 3.
IfxMsc_ControlFrameExtensionPassivePhaseLength_2 | Length of Command frames passive phase is 4.
IfxMsc_ControlFrameExtensionPassivePhaseLength_3 | Length of Command frames passive phase is 5.
IfxMsc_ControlFrameExtensionPassivePhaseLength_4 | Length of Command frames passive phase is 6.
IfxMsc_ControlFrameExtensionPassivePhaseLength_5 | Length of Command frames passive phase is 7.
IfxMsc_ControlFrameExtensionPassivePhaseLength_6 | Length of Command frames passive phase is 8.
IfxMsc_ControlFrameExtensionPassivePhaseLength_7 | Length of Command frames passive phase is 9.
IfxMsc_ControlFrameExtensionPassivePhaseLength_8 | Length of Command frames passive phase is 10.
IfxMsc_ControlFrameExtensionPassivePhaseLength_9 | Length of Command frames passive phase is 11.
IfxMsc_ControlFrameExtensionPassivePhaseLength_10 | Length of Command frames passive phase is 12.
IfxMsc_ControlFrameExtensionPassivePhaseLength_11 | Length of Command frames passive phase is 13.
IfxMsc_ControlFrameExtensionPassivePhaseLength_12 | Length of Command frames passive phase is 14.
IfxMsc_ControlFrameExtensionPassivePhaseLength_13 | Length of Command frames passive phase is 15.
IfxMsc_ControlFrameExtensionPassivePhaseLength_14 | Length of Command frames passive phase is 16.
IfxMsc_ControlFrameExtensionPassivePhaseLength_15 | Length of Command frames passive phase is 17.
IfxMsc_ControlFrameExtensionPassivePhaseLength_16 | Length of Command frames passive phase is 18.
IfxMsc_ControlFrameExtensionPassivePhaseLength_17 | Length of Command frames passive phase is 19.
IfxMsc_ControlFrameExtensionPassivePhaseLength_18 | Length of Command frames passive phase is 20.
IfxMsc_ControlFrameExtensionPassivePhaseLength_19 | Length of Command frames passive phase is 21.
IfxMsc_ControlFrameExtensionPassivePhaseLength_20 | Length of Command frames passive phase is 22.
IfxMsc_ControlFrameExtensionPassivePhaseLength_21 | Length of Command frames passive phase is 23.
IfxMsc_ControlFrameExtensionPassivePhaseLength_22 | Length of Command frames passive phase is 24.
IfxMsc_ControlFrameExtensionPassivePhaseLength_23 | Length of Command frames passive phase is 25.
IfxMsc_ControlFrameExtensionPassivePhaseLength_24 | Length of Command frames passive phase is 26.
IfxMsc_ControlFrameExtensionPassivePhaseLength_25 | Length of Command frames passive phase is 27.
IfxMsc_ControlFrameExtensionPassivePhaseLength_26 | Length of Command frames passive phase is 28.
IfxMsc_ControlFrameExtensionPassivePhaseLength_27 | Length of Command frames passive phase is 29.
IfxMsc_ControlFrameExtensionPassivePhaseLength_28 | Length of Command frames passive phase is 30.
IfxMsc_ControlFrameExtensionPassivePhaseLength_29 | Length of Command frames passive phase is 31.
IfxMsc_ControlFrameExtensionPassivePhaseLength_30 | Length of Command frames passive phase is 32.
IfxMsc_ControlFrameExtensionPassivePhaseLength_31 | Length of Command frames passive phase is 33.
IfxMsc_ControlFrameExtensionPassivePhaseLength_32 | Length of Command frames passive phase is 34.
IfxMsc_ControlFrameExtensionPassivePhaseLength_33 | Length of Command frames passive phase is 35.
IfxMsc_ControlFrameExtensionPassivePhaseLength_34 | Length of Command frames passive phase is 36.
IfxMsc_ControlFrameExtensionPassivePhaseLength_35 | Length of Command frames passive phase is 37.
IfxMsc_ControlFrameExtensionPassivePhaseLength_36 | Length of Command frames passive phase is 38.
IfxMsc_ControlFrameExtensionPassivePhaseLength_37 | Length of Command frames passive phase is 39.
IfxMsc_ControlFrameExtensionPassivePhaseLength_38 | Length of Command frames passive phase is 40.
IfxMsc_ControlFrameExtensionPassivePhaseLength_39 | Length of Command frames passive phase is 41.
IfxMsc_ControlFrameExtensionPassivePhaseLength_40 | Length of Command frames passive phase is 42.
IfxMsc_ControlFrameExtensionPassivePhaseLength_41 | Length of Command frames passive phase is 43.
IfxMsc_ControlFrameExtensionPassivePhaseLength_42 | Length of Command frames passive phase is 44.
IfxMsc_ControlFrameExtensionPassivePhaseLength_43 | Length of Command frames passive phase is 45.
IfxMsc_ControlFrameExtensionPassivePhaseLength_44 | Length of Command frames passive phase is 46.
IfxMsc_ControlFrameExtensionPassivePhaseLength_45 | Length of Command frames passive phase is 47.
IfxMsc_ControlFrameExtensionPassivePhaseLength_46 | Length of Command frames passive phase is 48.
IfxMsc_ControlFrameExtensionPassivePhaseLength_47 | Length of Command frames passive phase is 49.
IfxMsc_ControlFrameExtensionPassivePhaseLength_48 | Length of Command frames passive phase is 50.
IfxMsc_ControlFrameExtensionPassivePhaseLength_49 | Length of Command frames passive phase is 51.
IfxMsc_ControlFrameExtensionPassivePhaseLength_50 | Length of Command frames passive phase is 52.
IfxMsc_ControlFrameExtensionPassivePhaseLength_51 | Length of Command frames passive phase is 53.
IfxMsc_ControlFrameExtensionPassivePhaseLength_52 | Length of Command frames passive phase is 54.
IfxMsc_ControlFrameExtensionPassivePhaseLength_53 | Length of Command frames passive phase is 55.
IfxMsc_ControlFrameExtensionPassivePhaseLength_54 | Length of Command frames passive phase is 56.
IfxMsc_ControlFrameExtensionPassivePhaseLength_55 | Length of Command frames passive phase is 57.
IfxMsc_ControlFrameExtensionPassivePhaseLength_56 | Length of Command frames passive phase is 58.
IfxMsc_ControlFrameExtensionPassivePhaseLength_57 | Length of Command frames passive phase is 59.
IfxMsc_ControlFrameExtensionPassivePhaseLength_58 | Length of Command frames passive phase is 60.
IfxMsc_ControlFrameExtensionPassivePhaseLength_59 | Length of Command frames passive phase is 61.
IfxMsc_ControlFrameExtensionPassivePhaseLength_60 | Length of Command frames passive phase is 62.
IfxMsc_ControlFrameExtensionPassivePhaseLength_61 | Length of Command frames passive phase is 63.
IfxMsc_ControlFrameExtensionPassivePhaseLength_62 | Length of Command frames passive phase is 64.
IfxMsc_ControlFrameExtensionPassivePhaseLength_63 | Length of Command frames passive phase is 65.
IfxMsc_ControlFrameExtensionPassivePhaseLength_64 | Length of Command frames passive phase is 66.
IfxMsc_ControlFrameExtensionPassivePhaseLength_65 | Length of Command frames passive phase is 67.
IfxMsc_ControlFrameExtensionPassivePhaseLength_66 | Length of Command frames passive phase is 68.
IfxMsc_ControlFrameExtensionPassivePhaseLength_67 | Length of Command frames passive phase is 69.
IfxMsc_ControlFrameExtensionPassivePhaseLength_68 | Length of Command frames passive phase is 70.
IfxMsc_ControlFrameExtensionPassivePhaseLength_69 | Length of Command frames passive phase is 71.
IfxMsc_ControlFrameExtensionPassivePhaseLength_70 | Length of Command frames passive phase is 72.
IfxMsc_ControlFrameExtensionPassivePhaseLength_71 | Length of Command frames passive phase is 73.
IfxMsc_ControlFrameExtensionPassivePhaseLength_72 | Length of Command frames passive phase is 74.
IfxMsc_ControlFrameExtensionPassivePhaseLength_73 | Length of Command frames passive phase is 75.
IfxMsc_ControlFrameExtensionPassivePhaseLength_74 | Length of Command frames passive phase is 76.
IfxMsc_ControlFrameExtensionPassivePhaseLength_75 | Length of Command frames passive phase is 77.
IfxMsc_ControlFrameExtensionPassivePhaseLength_76 | Length of Command frames passive phase is 78.
IfxMsc_ControlFrameExtensionPassivePhaseLength_77 | Length of Command frames passive phase is 79.
IfxMsc_ControlFrameExtensionPassivePhaseLength_78 | Length of Command frames passive phase is 80.
IfxMsc_ControlFrameExtensionPassivePhaseLength_79 | Length of Command frames passive phase is 81.
IfxMsc_ControlFrameExtensionPassivePhaseLength_80 | Length of Command frames passive phase is 82.
IfxMsc_ControlFrameExtensionPassivePhaseLength_81 | Length of Command frames passive phase is 83.
IfxMsc_ControlFrameExtensionPassivePhaseLength_82 | Length of Command frames passive phase is 84.
IfxMsc_ControlFrameExtensionPassivePhaseLength_83 | Length of Command frames passive phase is 85.
IfxMsc_ControlFrameExtensionPassivePhaseLength_84 | Length of Command frames passive phase is 86.
IfxMsc_ControlFrameExtensionPassivePhaseLength_85 | Length of Command frames passive phase is 87.
IfxMsc_ControlFrameExtensionPassivePhaseLength_86 | Length of Command frames passive phase is 88.
IfxMsc_ControlFrameExtensionPassivePhaseLength_87 | Length of Command frames passive phase is 89.
IfxMsc_ControlFrameExtensionPassivePhaseLength_88 | Length of Command frames passive phase is 90.
IfxMsc_ControlFrameExtensionPassivePhaseLength_89 | Length of Command frames passive phase is 91.
IfxMsc_ControlFrameExtensionPassivePhaseLength_90 | Length of Command frames passive phase is 92.
IfxMsc_ControlFrameExtensionPassivePhaseLength_91 | Length of Command frames passive phase is 93.
IfxMsc_ControlFrameExtensionPassivePhaseLength_92 | Length of Command frames passive phase is 94.
IfxMsc_ControlFrameExtensionPassivePhaseLength_93 | Length of Command frames passive phase is 95.
IfxMsc_ControlFrameExtensionPassivePhaseLength_94 | Length of Command frames passive phase is 96.
IfxMsc_ControlFrameExtensionPassivePhaseLength_95 | Length of Command frames passive phase is 97.
IfxMsc_ControlFrameExtensionPassivePhaseLength_96 | Length of Command frames passive phase is 98.
IfxMsc_ControlFrameExtensionPassivePhaseLength_97 | Length of Command frames passive phase is 99.
IfxMsc_ControlFrameExtensionPassivePhaseLength_98 | Length of Command frames passive phase is 100.
IfxMsc_ControlFrameExtensionPassivePhaseLength_99 | Length of Command frames passive phase is 101.
IfxMsc_ControlFrameExtensionPassivePhaseLength_100 | Length of Command frames passive phase is 102.
IfxMsc_ControlFrameExtensionPassivePhaseLength_101 | Length of Command frames passive phase is 103.
IfxMsc_ControlFrameExtensionPassivePhaseLength_102 | Length of Command frames passive phase is 104.
IfxMsc_ControlFrameExtensionPassivePhaseLength_103 | Length of Command frames passive phase is 105.
IfxMsc_ControlFrameExtensionPassivePhaseLength_104 | Length of Command frames passive phase is 106.
IfxMsc_ControlFrameExtensionPassivePhaseLength_105 | Length of Command frames passive phase is 107.
IfxMsc_ControlFrameExtensionPassivePhaseLength_106 | Length of Command frames passive phase is 108.
IfxMsc_ControlFrameExtensionPassivePhaseLength_107 | Length of Command frames passive phase is 109.
IfxMsc_ControlFrameExtensionPassivePhaseLength_108 | Length of Command frames passive phase is 110.
IfxMsc_ControlFrameExtensionPassivePhaseLength_109 | Length of Command frames passive phase is 111.
IfxMsc_ControlFrameExtensionPassivePhaseLength_110 | Length of Command frames passive phase is 112.
IfxMsc_ControlFrameExtensionPassivePhaseLength_111 | Length of Command frames passive phase is 113.
IfxMsc_ControlFrameExtensionPassivePhaseLength_112 | Length of Command frames passive phase is 114.
IfxMsc_ControlFrameExtensionPassivePhaseLength_113 | Length of Command frames passive phase is 115.
IfxMsc_ControlFrameExtensionPassivePhaseLength_114 | Length of Command frames passive phase is 116.
IfxMsc_ControlFrameExtensionPassivePhaseLength_115 | Length of Command frames passive phase is 117.
IfxMsc_ControlFrameExtensionPassivePhaseLength_116 | Length of Command frames passive phase is 118.
IfxMsc_ControlFrameExtensionPassivePhaseLength_117 | Length of Command frames passive phase is 119.
IfxMsc_ControlFrameExtensionPassivePhaseLength_118 | Length of Command frames passive phase is 120.
IfxMsc_ControlFrameExtensionPassivePhaseLength_119 | Length of Command frames passive phase is 121.
IfxMsc_ControlFrameExtensionPassivePhaseLength_120 | Length of Command frames passive phase is 122.
IfxMsc_ControlFrameExtensionPassivePhaseLength_121 | Length of Command frames passive phase is 123.
IfxMsc_ControlFrameExtensionPassivePhaseLength_122 | Length of Command frames passive phase is 124.
IfxMsc_ControlFrameExtensionPassivePhaseLength_123 | Length of Command frames passive phase is 125.
IfxMsc_ControlFrameExtensionPassivePhaseLength_124 | Length of Command frames passive phase is 126.
IfxMsc_ControlFrameExtensionPassivePhaseLength_125 | Length of Command frames passive phase is 127.
IfxMsc_ControlFrameExtensionPassivePhaseLength_126 | Length of Command frames passive phase is 128.
IfxMsc_ControlFrameExtensionPassivePhaseLength_127 | Length of Command frames passive phase is 129.

Definition at line 192 of file IfxMsc.h.

◆ IfxMsc_DataFrameExtensionPassivePhaseLength

enum IfxMsc_DataFrameExtensionPassivePhaseLength

Downstream Timing Extension Register - Passive Phase Length at Data Frames Extension
Definition in Ifx_MSC.DSTE.B.PPDE.

Enumerator
IfxMsc_DataFrameExtensionPassivePhaseLength_0 | 0 Additional MSB bits extension of the PPD bit field
IfxMsc_DataFrameExtensionPassivePhaseLength_1 | 1 Additional MSB bits extension of the PPD bit field
IfxMsc_DataFrameExtensionPassivePhaseLength_2 | 2 Additional MSB bits extension of the PPD bit field
IfxMsc_DataFrameExtensionPassivePhaseLength_3 | 3 Additional MSB bits extension of the PPD bit field

Definition at line 327 of file IfxMsc.h.

◆ IfxMsc_DataFrameInterrupt

enum IfxMsc_DataFrameInterrupt

Interrupt Control Register - Data Frame Interrupt Enable
Definition in Ifx_MSC.ICR.B.EDIE.

Enumerator
IfxMsc_DataFrameInterrupt_disabled | Interrupt generation Disable.
IfxMsc_DataFrameInterrupt_atLastDataBit | An interrupt is generated when the last data bit has been shifted out.
IfxMsc_DataFrameInterrupt_atFirstDataBit | An interrupt is generated when the First data bit has been shifted out.

Definition at line 338 of file IfxMsc.h.

◆ IfxMsc_DataFrameInterruptNode

enum IfxMsc_DataFrameInterruptNode

Interrupt Control Register - Data Frame Interrupt Node Pointer
Definition in Ifx_MSC.ICR.B.EDIP.

Enumerator
IfxMsc_DataFrameInterruptNode_SR0 | Service request output SR0 selected.
IfxMsc_DataFrameInterruptNode_SR1 | Service request output SR1 selected.
IfxMsc_DataFrameInterruptNode_SR2 | Service request output SR2 selected.
IfxMsc_DataFrameInterruptNode_SR3 | Service request output SR3 selected.

Definition at line 348 of file IfxMsc.h.

◆ IfxMsc_DataFrameLength

enum IfxMsc_DataFrameLength

Number of SRx[] (x->SRL/SRH) Bits Shifted at Data Frames
Definition in Ifx_MSC.DSC.B.NDBH and Ifx_MSC.DSC.B.NDBL.

Enumerator
IfxMsc_DataFrameLength_0 | No SRx bit shifted.
IfxMsc_DataFrameLength_1 | SRx[0] Shifted.
IfxMsc_DataFrameLength_2 | SRx[1:0] Shifted.
IfxMsc_DataFrameLength_3 | SRx[2:0] Shifted.
IfxMsc_DataFrameLength_4 | SRx[3:0] Shifted.
IfxMsc_DataFrameLength_5 | SRx[4:0] Shifted.
IfxMsc_DataFrameLength_6 | SRx[5:0] Shifted.
IfxMsc_DataFrameLength_7 | SRx[6:0] Shifted.
IfxMsc_DataFrameLength_8 | SRx[7:0] Shifted.
IfxMsc_DataFrameLength_9 | SRx[8:0] Shifted.
IfxMsc_DataFrameLength_10 | SRx[9:0] Shifted.
IfxMsc_DataFrameLength_11 | SRx[10:0] Shifted.
IfxMsc_DataFrameLength_12 | SRx[11:0] Shifted.
IfxMsc_DataFrameLength_13 | SRx[12:0] Shifted.
IfxMsc_DataFrameLength_14 | SRx[13:0] Shifted.
IfxMsc_DataFrameLength_15 | SRx[14:0] Shifted.
IfxMsc_DataFrameLength_16 | SRx[15:0] Shifted.

Definition at line 359 of file IfxMsc.h.

◆ IfxMsc_DataFramePassivePhaseLength

enum IfxMsc_DataFramePassivePhaseLength

Passive Phase Length at Data Frames
Definition in Ifx_MSC.DSC.B.PPD.

Enumerator
IfxMsc_DataFramePassivePhaseLength_2 | Passive phase length is 2 tFCL.
IfxMsc_DataFramePassivePhaseLength_3 | Passive phase length is 3 tFCL.
IfxMsc_DataFramePassivePhaseLength_4 | Passive phase length is 4 tFCL.
IfxMsc_DataFramePassivePhaseLength_5 | Passive phase length is 5 tFCL.
IfxMsc_DataFramePassivePhaseLength_6 | Passive phase length is 6 tFCL.
IfxMsc_DataFramePassivePhaseLength_7 | Passive phase length is 7 tFCL.
IfxMsc_DataFramePassivePhaseLength_8 | Passive phase length is 8 tFCL.
IfxMsc_DataFramePassivePhaseLength_9 | Passive phase length is 9 tFCL.
IfxMsc_DataFramePassivePhaseLength_10 | Passive phase length is 10 tFCL.
IfxMsc_DataFramePassivePhaseLength_11 | Passive phase length is 11 tFCL.
IfxMsc_DataFramePassivePhaseLength_12 | Passive phase length is 12 tFCL.
IfxMsc_DataFramePassivePhaseLength_13 | Passive phase length is 13 tFCL.
IfxMsc_DataFramePassivePhaseLength_14 | Passive phase length is 14 tFCL.
IfxMsc_DataFramePassivePhaseLength_15 | Passive phase length is 15 tFCL.
IfxMsc_DataFramePassivePhaseLength_16 | Passive phase length is 16 tFCL.
IfxMsc_DataFramePassivePhaseLength_17 | Passive phase length is 17 tFCL.
IfxMsc_DataFramePassivePhaseLength_18 | Passive phase length is 18 tFCL.
IfxMsc_DataFramePassivePhaseLength_19 | Passive phase length is 19 tFCL.
IfxMsc_DataFramePassivePhaseLength_20 | Passive phase length is 20 tFCL.
IfxMsc_DataFramePassivePhaseLength_21 | Passive phase length is 21 tFCL.
IfxMsc_DataFramePassivePhaseLength_22 | Passive phase length is 22 tFCL.
IfxMsc_DataFramePassivePhaseLength_23 | Passive phase length is 23 tFCL.
IfxMsc_DataFramePassivePhaseLength_24 | Passive phase length is 24 tFCL.
IfxMsc_DataFramePassivePhaseLength_25 | Passive phase length is 25 tFCL.
IfxMsc_DataFramePassivePhaseLength_26 | Passive phase length is 26 tFCL.
IfxMsc_DataFramePassivePhaseLength_27 | Passive phase length is 27 tFCL.
IfxMsc_DataFramePassivePhaseLength_28 | Passive phase length is 28 tFCL.
IfxMsc_DataFramePassivePhaseLength_29 | Passive phase length is 29 tFCL.
IfxMsc_DataFramePassivePhaseLength_30 | Passive phase length is 30 tFCL.
IfxMsc_DataFramePassivePhaseLength_31 | Passive phase length is 31 tFCL.
IfxMsc_DataFramePassivePhaseLength_32 | Passive phase length is 32 tFCL.

Definition at line 383 of file IfxMsc.h.

◆ IfxMsc_DividerMode

enum IfxMsc_DividerMode

Divider mode.

Enumerator
IfxMsc_DividerMode_normal | divider mode is normal
IfxMsc_DividerMode_fractional | divider mode is fractional

Definition at line 420 of file IfxMsc.h.

◆ IfxMsc_EmergencyStop

enum IfxMsc_EmergencyStop

Emergency Stop Register - Emergency stop feature Enable or Disable - SRL and SRH
Definition in Ifx_MSC.ESR.

Enumerator
IfxMsc_EmergencyStop_disabled | Emergency stop feature for SRx bit is Disabled.
IfxMsc_EmergencyStop_enabled | Emergency stop feature for SRx bit is Enabled.

Definition at line 429 of file IfxMsc.h.

◆ IfxMsc_Extension

enum IfxMsc_Extension

Downstream Control Enhanced Register - Extension Enable
Definition in Ifx_MSC.DSCE.B.NDBLE.

Enumerator
IfxMsc_Extension_disabled | Disables the extension bit fields.
IfxMsc_Extension_enabled | Enables the extension bit fields.

Definition at line 438 of file IfxMsc.h.

◆ IfxMsc_ExternalBitInjectionPosition

enum IfxMsc_ExternalBitInjectionPosition

Downstream Control Enhanced Register - Injection Position of the Pin 0 and 1 Signal
Definition in Ifx_MSC.DSCE.B.INJPOSP0 and Ifx_MSC.DSCE.B.INJPOSP1.

Enumerator
IfxMsc_ExternalBitInjectionPosition_0 | Injected external bit is at Position 0 of the data frame.
IfxMsc_ExternalBitInjectionPosition_1 | Injected external bit is at Position 1 of the data frame.
IfxMsc_ExternalBitInjectionPosition_2 | Injected external bit is at Position 2 of the data frame.
IfxMsc_ExternalBitInjectionPosition_3 | Injected external bit is at Position 3 of the data frame.
IfxMsc_ExternalBitInjectionPosition_4 | Injected external bit is at Position 4 of the data frame.
IfxMsc_ExternalBitInjectionPosition_5 | Injected external bit is at Position 5 of the data frame.
IfxMsc_ExternalBitInjectionPosition_6 | Injected external bit is at Position 6 of the data frame.
IfxMsc_ExternalBitInjectionPosition_7 | Injected external bit is at Position 7 of the data frame.
IfxMsc_ExternalBitInjectionPosition_8 | Injected external bit is at Position 8 of the data frame.
IfxMsc_ExternalBitInjectionPosition_9 | Injected external bit is at Position 9 of the data frame.
IfxMsc_ExternalBitInjectionPosition_10 | Injected external bit is at Position 10 of the data frame.
IfxMsc_ExternalBitInjectionPosition_11 | Injected external bit is at Position 11 of the data frame.
IfxMsc_ExternalBitInjectionPosition_12 | Injected external bit is at Position 12 of the data frame.
IfxMsc_ExternalBitInjectionPosition_13 | Injected external bit is at Position 13 of the data frame.
IfxMsc_ExternalBitInjectionPosition_14 | Injected external bit is at Position 14 of the data frame.
IfxMsc_ExternalBitInjectionPosition_15 | Injected external bit is at Position 15 of the data frame.
IfxMsc_ExternalBitInjectionPosition_16 | Injected external bit is at Position 16 of the data frame.
IfxMsc_ExternalBitInjectionPosition_17 | Injected external bit is at Position 17 of the data frame.
IfxMsc_ExternalBitInjectionPosition_18 | Injected external bit is at Position 18 of the data frame.
IfxMsc_ExternalBitInjectionPosition_19 | Injected external bit is at Position 19 of the data frame.
IfxMsc_ExternalBitInjectionPosition_20 | Injected external bit is at Position 20 of the data frame.
IfxMsc_ExternalBitInjectionPosition_21 | Injected external bit is at Position 21 of the data frame.
IfxMsc_ExternalBitInjectionPosition_22 | Injected external bit is at Position 22 of the data frame.
IfxMsc_ExternalBitInjectionPosition_23 | Injected external bit is at Position 23 of the data frame.
IfxMsc_ExternalBitInjectionPosition_24 | Injected external bit is at Position 24 of the data frame.
IfxMsc_ExternalBitInjectionPosition_25 | Injected external bit is at Position 25 of the data frame.
IfxMsc_ExternalBitInjectionPosition_26 | Injected external bit is at Position 26 of the data frame.
IfxMsc_ExternalBitInjectionPosition_27 | Injected external bit is at Position 27 of the data frame.
IfxMsc_ExternalBitInjectionPosition_28 | Injected external bit is at Position 28 of the data frame.
IfxMsc_ExternalBitInjectionPosition_29 | Injected external bit is at Position 29 of the data frame.
IfxMsc_ExternalBitInjectionPosition_30 | Injected external bit is at Position 30 of the data frame.
IfxMsc_ExternalBitInjectionPosition_31 | Injected external bit is at Position 31 of the data frame.
IfxMsc_ExternalBitInjectionPosition_32 | Injected external bit is at Position 32 of the data frame.
IfxMsc_ExternalBitInjectionPosition_33 | Injected external bit is at Position 33 of the data frame.
IfxMsc_ExternalBitInjectionPosition_34 | Injected external bit is at Position 34 of the data frame.
IfxMsc_ExternalBitInjectionPosition_35 | Injected external bit is at Position 35 of the data frame.
IfxMsc_ExternalBitInjectionPosition_36 | Injected external bit is at Position 36 of the data frame.
IfxMsc_ExternalBitInjectionPosition_37 | Injected external bit is at Position 37 of the data frame.
IfxMsc_ExternalBitInjectionPosition_38 | Injected external bit is at Position 38 of the data frame.
IfxMsc_ExternalBitInjectionPosition_39 | Injected external bit is at Position 39 of the data frame.
IfxMsc_ExternalBitInjectionPosition_40 | Injected external bit is at Position 40 of the data frame.
IfxMsc_ExternalBitInjectionPosition_41 | Injected external bit is at Position 41 of the data frame.
IfxMsc_ExternalBitInjectionPosition_42 | Injected external bit is at Position 42 of the data frame.
IfxMsc_ExternalBitInjectionPosition_43 | Injected external bit is at Position 43 of the data frame.
IfxMsc_ExternalBitInjectionPosition_44 | Injected external bit is at Position 44 of the data frame.
IfxMsc_ExternalBitInjectionPosition_45 | Injected external bit is at Position 45 of the data frame.
IfxMsc_ExternalBitInjectionPosition_46 | Injected external bit is at Position 46 of the data frame.
IfxMsc_ExternalBitInjectionPosition_47 | Injected external bit is at Position 47 of the data frame.
IfxMsc_ExternalBitInjectionPosition_48 | Injected external bit is at Position 48 of the data frame.
IfxMsc_ExternalBitInjectionPosition_49 | Injected external bit is at Position 49 of the data frame.
IfxMsc_ExternalBitInjectionPosition_50 | Injected external bit is at Position 50 of the data frame.
IfxMsc_ExternalBitInjectionPosition_51 | Injected external bit is at Position 51 of the data frame.
IfxMsc_ExternalBitInjectionPosition_52 | Injected external bit is at Position 52 of the data frame.
IfxMsc_ExternalBitInjectionPosition_53 | Injected external bit is at Position 53 of the data frame.
IfxMsc_ExternalBitInjectionPosition_54 | Injected external bit is at Position 54 of the data frame.
IfxMsc_ExternalBitInjectionPosition_55 | Injected external bit is at Position 55 of the data frame.
IfxMsc_ExternalBitInjectionPosition_56 | Injected external bit is at Position 56 of the data frame.
IfxMsc_ExternalBitInjectionPosition_57 | Injected external bit is at Position 57 of the data frame.
IfxMsc_ExternalBitInjectionPosition_58 | Injected external bit is at Position 58 of the data frame.
IfxMsc_ExternalBitInjectionPosition_59 | Injected external bit is at Position 59 of the data frame.
IfxMsc_ExternalBitInjectionPosition_60 | Injected external bit is at Position 60 of the data frame.
IfxMsc_ExternalBitInjectionPosition_61 | Injected external bit is at Position 61 of the data frame.
IfxMsc_ExternalBitInjectionPosition_62 | Injected external bit is at Position 62 of the data frame.
IfxMsc_ExternalBitInjectionPosition_63 | Injected external bit is at Position 63 of the data frame.

Definition at line 447 of file IfxMsc.h.

◆ IfxMsc_ExternalSignalInjection

enum IfxMsc_ExternalSignalInjection

Downstream Control Enhanced Register - Injection Enable of the Pin 0 and 1 Signal
Definition in Ifx_MSC.DSCE.B.INJENP0 and Ifx_MSC.DSCE.B.INJENP1.

Enumerator
IfxMsc_ExternalSignalInjection_disabled | Disables the external signal injection in a data frame.
IfxMsc_ExternalSignalInjection_enabled | Enables the external signal injection in a data frame.

Definition at line 518 of file IfxMsc.h.

◆ IfxMsc_FastMode

enum IfxMsc_FastMode

Enum for enable and disable Fast Mode.

Enumerator
IfxMsc_FastMode_disabled | Disable Fast Mode(DSTE.FM=0).Needs to be cleared with DSTE.UL1=1 in the same cycle.
IfxMsc_FastMode_enabled | Enable Fast Mode(DSTE.FM=1).Needs to be cleared with DSTE.UL1=1 in the same cycle.

Definition at line 526 of file IfxMsc.h.

◆ IfxMsc_FclClockControlEnabled

enum IfxMsc_FclClockControlEnabled

Output Control Register - Clock Control
Definition in Ifx_MSC.OCR.B.CLKCTRL.

Enumerator
IfxMsc_FclClockControlEnabled_activePhaseOnly | FCL is active during active phases of data or command frames.
IfxMsc_FclClockControlEnabled_always | FCL is always active.

Definition at line 535 of file IfxMsc.h.

◆ IfxMsc_FclLinePolarity

enum IfxMsc_FclLinePolarity

Output Control Register - FCLP Line Polarity
Definition in Ifx_MSC.OCR.B.CLP.

Enumerator
IfxMsc_FclLinePolarity_nonInverted | FCLP and FCL signal polarity is identical.
IfxMsc_FclLinePolarity_inverted | FCLP signal has inverted FCL signal polarity.

Definition at line 544 of file IfxMsc.h.

◆ IfxMsc_HardwareClock

enum IfxMsc_HardwareClock

Enable hardware clock control.

Enumerator
IfxMsc_HardwareClock_disabled | Hardware clock disable.
IfxMsc_HardwareClock_enabled | Hardware clock enable.

Definition at line 552 of file IfxMsc.h.

◆ IfxMsc_InterruptServiceRequest

enum IfxMsc_InterruptServiceRequest

Interrupt Service Request.

Enumerator
IfxMsc_InterruptServiceRequest_0 | Interrupt Service Request number0.
IfxMsc_InterruptServiceRequest_1 | Interrupt Service Request number1.
IfxMsc_InterruptServiceRequest_2 | Interrupt Service Request number2.
IfxMsc_InterruptServiceRequest_3 | Interrupt Service Request number3.
IfxMsc_InterruptServiceRequest_4 | Interrupt Service Request number4.

Definition at line 560 of file IfxMsc.h.

◆ IfxMsc_ModuleSuspendRequestBit

enum IfxMsc_ModuleSuspendRequestBit

OCDS Control and Status - OCDS Suspend Control Definition in Ifx_MSC.OCS.B.SUS.

Enumerator
IfxMsc_ModuleSuspendRequestBit_noSuspend | OCDS is not suspended.
IfxMsc_ModuleSuspendRequestBit_hardSuspend | OCDS is Hard suspended. Clock is switched off immediately.
IfxMsc_ModuleSuspendRequestBit_softSuspend | OCDS is Soft suspended.

Definition at line 572 of file IfxMsc.h.

◆ IfxMsc_MsbBitDataExtension

enum IfxMsc_MsbBitDataExtension

Downstream Control Enhanced Register - Number of SRL/SRH Bits Shifted at Data Frames Extension (NDBL/NDBH)
Definition in Ifx_MSC.DSCE.B.NDBLE and Ifx_MSC.DSCE.B.NDBHE.

Enumerator
IfxMsc_MsbBitDataExtension_notPresent | Additional MSB bit is not present in the extension of the NDBL/NDBH bit field.
IfxMsc_MsbBitDataExtension_present | Additional MSB bit is present in the extension of the NDBL/NDBH bit field.

Definition at line 582 of file IfxMsc.h.

◆ IfxMsc_NDividerAbra

enum IfxMsc_NDividerAbra

Asynchronous Block Configuration Register - N Divider ABRA
Definition in Ifx_MSC.ABC.B.NDA.

Enumerator
IfxMsc_NDividerAbra_1 | Division ratio is 1.
IfxMsc_NDividerAbra_2 | Division ratio is 2.
IfxMsc_NDividerAbra_3 | Division ratio is 3.
IfxMsc_NDividerAbra_4 | Division ratio is 4.
IfxMsc_NDividerAbra_5 | Division ratio is 5.
IfxMsc_NDividerAbra_6 | Division ratio is 6.
IfxMsc_NDividerAbra_7 | Division ratio is 7.
IfxMsc_NDividerAbra_8 | Division ratio is 8.

Definition at line 591 of file IfxMsc.h.

◆ IfxMsc_NDividerDownstream

enum IfxMsc_NDividerDownstream

Downstream Timing Extension Register - N Divider Downstream
Definition in Ifx_MSC.DSTE.B.NDD.

Enumerator
IfxMsc_NDividerDownstream_1 | division ratio is 1
IfxMsc_NDividerDownstream_2 | division ratio is 2
IfxMsc_NDividerDownstream_3 | division ratio is 3
IfxMsc_NDividerDownstream_4 | division ratio is 4
IfxMsc_NDividerDownstream_5 | division ratio is 5
IfxMsc_NDividerDownstream_6 | division ratio is 6
IfxMsc_NDividerDownstream_7 | division ratio is 7
IfxMsc_NDividerDownstream_8 | division ratio is 8
IfxMsc_NDividerDownstream_9 | division ratio is 9
IfxMsc_NDividerDownstream_10 | division ratio is 10
IfxMsc_NDividerDownstream_11 | division ratio is 11
IfxMsc_NDividerDownstream_12 | division ratio is 12
IfxMsc_NDividerDownstream_13 | division ratio is 13
IfxMsc_NDividerDownstream_14 | division ratio is 14
IfxMsc_NDividerDownstream_15 | division ratio is 15
IfxMsc_NDividerDownstream_16 | division ratio is 16

Definition at line 606 of file IfxMsc.h.

◆ IfxMsc_OverflowInterrupt

enum IfxMsc_OverflowInterrupt

Asynchronous Block Configuration Register - Overflow Interrupt Enable
Definition in Ifx_MSC.ABC.B.OIE.

Enumerator
IfxMsc_OverflowInterrupt_disabled | Disables the path of the overflow interrupt towards the interrupt node.
IfxMsc_OverflowInterrupt_enabled | Enables the path of the overflow interrupt towards the interrupt node.

Definition at line 629 of file IfxMsc.h.

◆ IfxMsc_OverflowInterruptNode

enum IfxMsc_OverflowInterruptNode

Asynchronous Block Configuration Register - Overflow Interrupt Node Pointer
Definition in Ifx_MSC.ABC.B.OIP.

Enumerator
IfxMsc_OverflowInterruptNode_SR0 | Service request output SR0 selected.
IfxMsc_OverflowInterruptNode_SR1 | Service request output SR1 selected.
IfxMsc_OverflowInterruptNode_SR2 | Service request output SR2 selected.
IfxMsc_OverflowInterruptNode_SR3 | Service request output SR3 selected.
IfxMsc_OverflowInterruptNode_SR4 | Service request output SR4 selected.

Definition at line 638 of file IfxMsc.h.

◆ IfxMsc_Parity

enum IfxMsc_Parity

Parity Mode
Definition in Ifx_MSC.USR.B.PCT.

Enumerator
IfxMsc_Parity_even | Even Parity.
IfxMsc_Parity_odd | Odd Parity.

Definition at line 650 of file IfxMsc.h.

◆ IfxMsc_PassiveTimeFrameCount

enum IfxMsc_PassiveTimeFrameCount

Downstream Status Register - Number Of Passive Time Frames
Definition in Ifx_MSC.DSS.B.NPTF.

Enumerator
IfxMsc_PassiveTimeFrameCount_0 | No Passive time frames inserted.
IfxMsc_PassiveTimeFrameCount_1 | 1 Passive time frames inserted
IfxMsc_PassiveTimeFrameCount_2 | 2 Passive time frames inserted
IfxMsc_PassiveTimeFrameCount_3 | 3 Passive time frames inserted
IfxMsc_PassiveTimeFrameCount_4 | 4 Passive time frames inserted
IfxMsc_PassiveTimeFrameCount_5 | 5 Passive time frames inserted
IfxMsc_PassiveTimeFrameCount_6 | 6 Passive time frames inserted
IfxMsc_PassiveTimeFrameCount_7 | 7 Passive time frames inserted
IfxMsc_PassiveTimeFrameCount_8 | 8 Passive time frames inserted
IfxMsc_PassiveTimeFrameCount_9 | 9 Passive time frames inserted
IfxMsc_PassiveTimeFrameCount_10 | 10 Passive time frames inserted
IfxMsc_PassiveTimeFrameCount_11 | 11 Passive time frames inserted
IfxMsc_PassiveTimeFrameCount_12 | 12 Passive time frames inserted
IfxMsc_PassiveTimeFrameCount_13 | 13 Passive time frames inserted
IfxMsc_PassiveTimeFrameCount_14 | 14 Passive time frames inserted
IfxMsc_PassiveTimeFrameCount_15 | 15 Passive time frames inserted

Definition at line 659 of file IfxMsc.h.

◆ IfxMsc_ReceiveDataInterrupt

enum IfxMsc_ReceiveDataInterrupt

Interrupt Control Register - Receive Data Interrupt Enable
Definition in Ifx_MSC.ICR.B.RDIE.

Enumerator
IfxMsc_ReceiveDataInterrupt_disabled | Interrupt generation disabled.
IfxMsc_ReceiveDataInterrupt_onDataReceive | An interrupt is generated when data is received and written into the upstream data registers.
IfxMsc_ReceiveDataInterrupt_onRdieSet | An interrupt is generated as with RDIE = 01B but only if the received data is not equal to 00H.
IfxMsc_ReceiveDataInterrupt_onDataReceiveInUd3 | An interrupt is generated as with RDIE = 01B but only if the received data is not equal to 00H.

Definition at line 682 of file IfxMsc.h.

◆ IfxMsc_ReceiveDataInterruptNode

enum IfxMsc_ReceiveDataInterruptNode

Interrupt Control Register - Receive Data Interrupt Pointer
Definition in Ifx_MSC.ICR.B.RDIP.

Enumerator
IfxMsc_ReceiveDataInterruptNode_SR0 | Service request output SR0 selected.
IfxMsc_ReceiveDataInterruptNode_SR1 | Service request output SR1 selected.
IfxMsc_ReceiveDataInterruptNode_SR2 | Service request output SR2 selected.
IfxMsc_ReceiveDataInterruptNode_SR3 | Service request output SR3 selected.

Definition at line 693 of file IfxMsc.h.

◆ IfxMsc_SdiLinePolarity

enum IfxMsc_SdiLinePolarity

Output Control Register - SDI Line Polarity
Definition in Ifx_MSC.OCR.B.ILP.

Enumerator
IfxMsc_SdiLinePolarity_likeSi | SDI and SI signal polarities are identical.
IfxMsc_SdiLinePolarity_invertedSi | SDI and SI signal polarities are inverted.

Definition at line 704 of file IfxMsc.h.

◆ IfxMsc_SerialDataInput

enum IfxMsc_SerialDataInput

Output Control Register - Serial Data Input Selection
Definition in Ifx_MSC.OCR.B.SDISEL.

Enumerator
IfxMsc_SerialDataInput_0 | SDI0 is selected for the SDI of the upstream channel.
IfxMsc_SerialDataInput_1 | SDI1 is selected for the SDI of the upstream channel.
IfxMsc_SerialDataInput_2 | SDI2 is selected for the SDI of the upstream channel.
IfxMsc_SerialDataInput_3 | SDI3 is selected for the SDI of the upstream channel.
IfxMsc_SerialDataInput_4 | SDI4 is selected for the SDI of the upstream channel.
IfxMsc_SerialDataInput_5 | SDI5 is selected for the SDI of the upstream channel.
IfxMsc_SerialDataInput_6 | SDI6 is selected for the SDI of the upstream channel.
IfxMsc_SerialDataInput_7 | SDI7 is selected for the SDI of the upstream channel.

Definition at line 713 of file IfxMsc.h.

◆ IfxMsc_ServiceRequestDelay

enum IfxMsc_ServiceRequestDelay

Service Request Delay
Definition in Ifx_MSC.USR.B.SRDC.

Enumerator
IfxMsc_ServiceRequestDelay_noDelay | No Delay.
IfxMsc_ServiceRequestDelay_1bit | Delay of 1 bit time.

Definition at line 728 of file IfxMsc.h.

◆ IfxMsc_ShiftClockPhaseDuration

enum IfxMsc_ShiftClockPhaseDuration

Asynchronous Block Configuration Register - Duration of the Low/High Phase of the Shift Clock
Definition in Ifx_MSC.ABC.B.LOW and Ifx_MSC.ABC.B.HIGH.

Enumerator
IfxMsc_ShiftClockPhaseDuration_1 | Duration in periods of f_A is 1.
IfxMsc_ShiftClockPhaseDuration_2 | Duration in periods of f_A is 2.
IfxMsc_ShiftClockPhaseDuration_3 | Duration in periods of f_A is 3.
IfxMsc_ShiftClockPhaseDuration_4 | Duration in periods of f_A is 4.
IfxMsc_ShiftClockPhaseDuration_5 | Duration in periods of f_A is 5.
IfxMsc_ShiftClockPhaseDuration_6 | Duration in periods of f_A is 6.
IfxMsc_ShiftClockPhaseDuration_7 | Duration in periods of f_A is 7.
IfxMsc_ShiftClockPhaseDuration_8 | Duration in periods of f_A is 8.
IfxMsc_ShiftClockPhaseDuration_9 | Duration in periods of f_A is 9.
IfxMsc_ShiftClockPhaseDuration_10 | Duration in periods of f_A is 10.
IfxMsc_ShiftClockPhaseDuration_11 | Duration in periods of f_A is 11.
IfxMsc_ShiftClockPhaseDuration_12 | Duration in periods of f_A is 12.
IfxMsc_ShiftClockPhaseDuration_13 | Duration in periods of f_A is 13.
IfxMsc_ShiftClockPhaseDuration_14 | Duration in periods of f_A is 14.
IfxMsc_ShiftClockPhaseDuration_15 | Duration in periods of f_A is 15.
IfxMsc_ShiftClockPhaseDuration_16 | Duration in periods of f_A is 16.

Definition at line 737 of file IfxMsc.h.

◆ IfxMsc_SleepMode

enum IfxMsc_SleepMode

Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_MSC.CLC.B.EDIS.

Enumerator
IfxMsc_SleepMode_enable | enables sleep mode
IfxMsc_SleepMode_disable | disables sleep mode

Definition at line 760 of file IfxMsc.h.

◆ IfxMsc_SoLinePolarity

enum IfxMsc_SoLinePolarity

Output Control Register - SOP Line Polarity
Definition in Ifx_MSC.OCR.B.SLP.

Enumerator
IfxMsc_SoLinePolarity_nonInverted | SOP and SO polarity is identical.
IfxMsc_SoLinePolarity_inverted | SOP and SO polarity is inverted.

Definition at line 769 of file IfxMsc.h.

◆ IfxMsc_Source

enum IfxMsc_Source

Downstream Select Data Source Low Register - Select Source for - SRL and SRHNumber Of Passive Time Frames
Definition in Ifx_MSC.DSDSL and Ifx_MSC.DSDSH.

Enumerator
IfxMsc_Source_downstreamDataRegister | SRx[16] is taken from data Register DD.DDL[xx].
IfxMsc_Source_alternateInputLine | SRx[16] is taken from ALTINL input line.
IfxMsc_Source_alternateInputLineInverted | SRx[16] is taken from ALTINL input line in inverted state.

Definition at line 778 of file IfxMsc.h.

◆ IfxMsc_SuspendMode

enum IfxMsc_SuspendMode

OCDS Suspend Control (OCDS.SUS)

Enumerator
IfxMsc_SuspendMode_none | No suspend.
IfxMsc_SuspendMode_hard | Hard Suspend.
IfxMsc_SuspendMode_soft | Soft Suspend.

Definition at line 787 of file IfxMsc.h.

◆ IfxMsc_Target

enum IfxMsc_Target

Msc Targets - use as chip enable selection for ENH, ENL and ENC.

Enumerator
IfxMsc_Target_en0 | Target EN0.
IfxMsc_Target_en1 | Target EN1.
IfxMsc_Target_en2 | Target EN2.
IfxMsc_Target_en3 | Target EN3.

Definition at line 796 of file IfxMsc.h.

◆ IfxMsc_TimeFrameInterrupt

enum IfxMsc_TimeFrameInterrupt

Interrupt Control Register - Time Frame Interrupt Enable
Definition in Ifx_MSC.ICR.B.TFIE.

Enumerator
IfxMsc_TimeFrameInterrupt_disabled | Interrupt generation disabled.
IfxMsc_TimeFrameInterrupt_enabled | Interrupt generation enabled.

Definition at line 807 of file IfxMsc.h.

◆ IfxMsc_TimeFrameInterruptNode

enum IfxMsc_TimeFrameInterruptNode

Interrupt Control Register - Time Frame Interrupt Pointer
Definition in Ifx_MSC.ICR.B.TFIP.

Enumerator
IfxMsc_TimeFrameInterruptNode_SR0 | Service request output SR0 selected.
IfxMsc_TimeFrameInterruptNode_SR1 | Service request output SR1 selected.
IfxMsc_TimeFrameInterruptNode_SR2 | Service request output SR2 selected.
IfxMsc_TimeFrameInterruptNode_SR3 | Service request output SR3 selected.

Definition at line 816 of file IfxMsc.h.

◆ IfxMsc_TransmissionMode

enum IfxMsc_TransmissionMode

Downstream Channel Transmission Mode
Definition in Ifx_MSC.DSC.B.TM.

Enumerator
IfxMsc_TransmissionMode_triggered | Triggered Mode.
IfxMsc_TransmissionMode_dataRepetition | Data Repetition Mode.

Definition at line 827 of file IfxMsc.h.

◆ IfxMsc_UnderflowInterrupt

enum IfxMsc_UnderflowInterrupt

Asynchronous Block Configuration Register - Underflow Interrupt Enable
Definition in Ifx_MSC.ABC.B.UIE.

Enumerator
IfxMsc_UnderflowInterrupt_disabled | Disables the path of the Underflow interrupt towards the interrupt node.
IfxMsc_UnderflowInterrupt_enabled | Enables the path of the Underflow interrupt towards the interrupt node.

Definition at line 836 of file IfxMsc.h.

◆ IfxMsc_UnderflowInterruptNode

enum IfxMsc_UnderflowInterruptNode

Asynchronous Block Configuration Register - Underflow Interrupt Node Pointer
Definition in Ifx_MSC.ABC.B.UIP.

Enumerator
IfxMsc_UnderflowInterruptNode_SR0 | Service request output SR0 selected.
IfxMsc_UnderflowInterruptNode_SR1 | Service request output SR1 selected.
IfxMsc_UnderflowInterruptNode_SR2 | Service request output SR2 selected.
IfxMsc_UnderflowInterruptNode_SR3 | Service request output SR3 selected.
IfxMsc_UnderflowInterruptNode_SR4 | Service request output SR4 selected.

Definition at line 845 of file IfxMsc.h.

◆ IfxMsc_UpstreamChannelFrameType

enum IfxMsc_UpstreamChannelFrameType

Channel Frame Type
Definition in Ifx_MSC.USR.B.UFT.

Enumerator
IfxMsc_UpstreamChannelFrameType_12bit | 12-bit Upstream frame selected
IfxMsc_UpstreamChannelFrameType_16bit | 16-bit Upstream frame selected

Definition at line 857 of file IfxMsc.h.

◆ IfxMsc_UpstreamChannelReceivingRate

enum IfxMsc_UpstreamChannelReceivingRate

Upstream Receiving Rate
Definition in Ifx_MSC.USR.B.URR.

Enumerator
IfxMsc_UpstreamChannelReceivingRate_disabled | Disabled.
IfxMsc_UpstreamChannelReceivingRate_4 | Baud rate = f_MSC / 4.
IfxMsc_UpstreamChannelReceivingRate_8 | Baud rate = f_MSC / 8.
IfxMsc_UpstreamChannelReceivingRate_16 | Baud rate = f_MSC / 16.
IfxMsc_UpstreamChannelReceivingRate_32 | Baud rate = f_MSC / 32.
IfxMsc_UpstreamChannelReceivingRate_64 | Baud rate = f_MSC / 64.
IfxMsc_UpstreamChannelReceivingRate_128 | Baud rate = f_MSC / 128.
IfxMsc_UpstreamChannelReceivingRate_256 | Baud rate = f_MSC / 256.

Definition at line 866 of file IfxMsc.h.

◆ IfxMsc_UpstreamTimeoutInterrupt

enum IfxMsc_UpstreamTimeoutInterrupt

Upstream Control Enhanced Register 1 - Upstream Timeout Interrupt Enable
Definition in Ifx_MSC.USCE.B.USTOEN.

Enumerator
IfxMsc_UpstreamTimeoutInterrupt_disabled | Upstream Timeout Interrupt Disabled.
IfxMsc_UpstreamTimeoutInterrupt_enabled | Upstream Timeout Interrupt Enabled.

Definition at line 881 of file IfxMsc.h.

◆ IfxMsc_UpstreamTimeoutInterruptNode

enum IfxMsc_UpstreamTimeoutInterruptNode

Upstream Control Enhanced Register 1 - Upstream Timeout Interrupt Node Pointer
Definition in Ifx_MSC.USCE.B.USTOIP.

Enumerator
IfxMsc_UpstreamTimeoutInterruptNode_SR0 | Service request output SR0 selected.
IfxMsc_UpstreamTimeoutInterruptNode_SR1 | Service request output SR1 selected.
IfxMsc_UpstreamTimeoutInterruptNode_SR2 | Service request output SR2 selected.
IfxMsc_UpstreamTimeoutInterruptNode_SR3 | Service request output SR3 selected.
IfxMsc_UpstreamTimeoutInterruptNode_SR4 | Service request output SR4 selected.

Definition at line 890 of file IfxMsc.h.

◆ IfxMsc_UpstreamTimeoutPrescaler

enum IfxMsc_UpstreamTimeoutPrescaler

Upstream Control Enhanced Register 1 - Upstream Timeout Prescaler
Definition in Ifx_MSC.USCE.B.USTOPRE.

Enumerator
IfxMsc_UpstreamTimeoutPrescaler_1 | Prescale value 1 for the upstream time-out limit.
IfxMsc_UpstreamTimeoutPrescaler_2 | Prescale value 2 for the upstream time-out limit.
IfxMsc_UpstreamTimeoutPrescaler_4 | Prescale value 4 for the upstream time-out limit.
IfxMsc_UpstreamTimeoutPrescaler_8 | Prescale value 8 for the upstream time-out limit.
IfxMsc_UpstreamTimeoutPrescaler_16 | Prescale value 16 for the upstream time-out limit.
IfxMsc_UpstreamTimeoutPrescaler_32 | Prescale value 32 for the upstream time-out limit.
IfxMsc_UpstreamTimeoutPrescaler_64 | Prescale value 64 for the upstream time-out limit.
IfxMsc_UpstreamTimeoutPrescaler_128 | Prescale value 128 for the upstream time-out limit.
IfxMsc_UpstreamTimeoutPrescaler_256 | Prescale value 256 for the upstream time-out limit.
IfxMsc_UpstreamTimeoutPrescaler_512 | Prescale value 512 for the upstream time-out limit.
IfxMsc_UpstreamTimeoutPrescaler_1024 | Prescale value 1024 for the upstream time-out limit.
IfxMsc_UpstreamTimeoutPrescaler_2048 | Prescale value 2048 for the upstream time-out limit.
IfxMsc_UpstreamTimeoutPrescaler_4096 | Prescale value 4096 for the upstream time-out limit.
IfxMsc_UpstreamTimeoutPrescaler_8192 | Prescale value 8192 for the upstream time-out limit.
IfxMsc_UpstreamTimeoutPrescaler_16384 | Prescale value 16384 for the upstream time-out limit.
IfxMsc_UpstreamTimeoutPrescaler_32768 | Prescale value 32768 for the upstream time-out limit.

Definition at line 902 of file IfxMsc.h.

◆ IfxMsc_UpstreamTimeoutValue

enum IfxMsc_UpstreamTimeoutValue

Upstream Control Enhanced Register 1 - Upstream Timeout Value
Definition in Ifx_MSC.USCE.B.USTOVAL.

Enumerator
IfxMsc_UpstreamTimeoutValue_1 | Upstream timeout value for the N-Divider.
IfxMsc_UpstreamTimeoutValue_2 | Upstream timeout value for the N-Divider.
IfxMsc_UpstreamTimeoutValue_3 | Upstream timeout value for the N-Divider.
IfxMsc_UpstreamTimeoutValue_4 | Upstream timeout value for the N-Divider.
IfxMsc_UpstreamTimeoutValue_5 | Upstream timeout value for the N-Divider.
IfxMsc_UpstreamTimeoutValue_6 | Upstream timeout value for the N-Divider.
IfxMsc_UpstreamTimeoutValue_7 | Upstream timeout value for the N-Divider.
IfxMsc_UpstreamTimeoutValue_8 | Upstream timeout value for the N-Divider.
IfxMsc_UpstreamTimeoutValue_9 | Upstream timeout value for the N-Divider.
IfxMsc_UpstreamTimeoutValue_10 | Upstream timeout value for the N-Divider.
IfxMsc_UpstreamTimeoutValue_11 | Upstream timeout value for the N-Divider.
IfxMsc_UpstreamTimeoutValue_12 | Upstream timeout value for the N-Divider.
IfxMsc_UpstreamTimeoutValue_13 | Upstream timeout value for the N-Divider.
IfxMsc_UpstreamTimeoutValue_14 | Upstream timeout value for the N-Divider.
IfxMsc_UpstreamTimeoutValue_15 | Upstream timeout value for the N-Divider.
IfxMsc_UpstreamTimeoutValue_16 | Upstream timeout value for the N-Divider.

Definition at line 925 of file IfxMsc.h.


iLLD_TC38A: Configure Flags

Functions
Configure Flags
iLLD » MSC » Standard Driver
Collaboration diagram for Configure Flags:

Functions

IFX_INLINE void | IfxMsc_clearAbraOverflowFlag (Ifx_MSC *msc)
Clear ABRA overflow flag. More...
IFX_INLINE void | IfxMsc_clearAbraUnderflowFlag (Ifx_MSC *msc)
Clear ABRA underflow flag. More...
IFX_INLINE void | IfxMsc_clearUpstreamTimeout (Ifx_MSC *msc)
Clear Upstream timeout. More...
IFX_INLINE void | IfxMsc_clearUpstreamValidFlag (Ifx_MSC *msc, uint8 upstreamIdx)
Clear the valid flag. More...
IFX_INLINE boolean | IfxMsc_getUpstreamValidFlag (Ifx_MSC *msc, uint8 upstreamIdx)
Get the status of the valid flag. More...

Detailed Description

Function Documentation

◆ IfxMsc_clearAbraOverflowFlag()

IFX_INLINE void IfxMsc_clearAbraOverflowFlag ( Ifx_MSC * msc )

Clear ABRA overflow flag.

Parameters
msc pointer to the base of MSC registers
Returns
None

Definition at line 1502 of file IfxMsc.h.

◆ IfxMsc_clearAbraUnderflowFlag()

IFX_INLINE void IfxMsc_clearAbraUnderflowFlag ( Ifx_MSC * msc )

Clear ABRA underflow flag.

Parameters
msc pointer to the base of MSC registers
Returns
None

Definition at line 1509 of file IfxMsc.h.

◆ IfxMsc_clearUpstreamTimeout()

IFX_INLINE void IfxMsc_clearUpstreamTimeout ( Ifx_MSC * msc )

Clear Upstream timeout.

Parameters
msc pointer to the base of MSC registers
Returns
None

Definition at line 1522 of file IfxMsc.h.

◆ IfxMsc_clearUpstreamValidFlag()

IFX_INLINE void IfxMsc_clearUpstreamValidFlag | ( | Ifx_MSC * | msc,
 |  | uint8 | upstreamIdx
 | ) |  |

Clear the valid flag.

Parameters
msc | pointer to the base of MSC registers
upstreamIdx | data register ID
Returns
None

Definition at line 1529 of file IfxMsc.h.

Referenced by IfxMsc_Msc_receiveData().

◆ IfxMsc_getUpstreamValidFlag()

IFX_INLINE boolean IfxMsc_getUpstreamValidFlag | ( | Ifx_MSC * | msc,
 |  | uint8 | upstreamIdx
 | ) |  |

Get the status of the valid flag.

Parameters
msc | pointer to the base of MSC registers
upstreamIdx | data register ID
Returns
Status TRUE or FALSE

Definition at line 1623 of file IfxMsc.h.

Referenced by IfxMsc_Msc_receiveData().


iLLD_TC38A: Set Command Target

Functions
Set Command Target
iLLD » MSC » Standard Driver
Collaboration diagram for Set Command Target:

Functions

IFX_INLINE void IfxMsc_setCommandTarget (Ifx_MSC *msc, IfxMsc_Target enX)
Select the target for command phase. More...

Detailed Description

Function Documentation

◆ IfxMsc_setCommandTarget()

IFX_INLINE void IfxMsc_setCommandTarget | ( | Ifx_MSC * | msc,
 |  | IfxMsc_Target | enX
 | ) |  |

Select the target for command phase.

Parameters
msc | pointer to the base of MSC registers
enX | Target to be selected
Returns
None

Definition at line 1722 of file IfxMsc.h.

Referenced by IfxMsc_Msc_initModule(), and IfxMsc_Msc_setCommandTarget().


iLLD_TC38A: Set Data

Functions
Set Data
iLLD » MSC » Standard Driver
Collaboration diagram for Set Data:

Functions

IFX_INLINE void | IfxMsc_setDataHighTarget (Ifx_MSC *msc, IfxMsc_Target enX)
Select the target for data high phase. More...
IFX_INLINE void | IfxMsc_setDataLowTarget (Ifx_MSC *msc, IfxMsc_Target enX)
Select the target for data low phase. More...

Detailed Description

Function Documentation

◆ IfxMsc_setDataHighTarget()

IFX_INLINE void IfxMsc_setDataHighTarget | ( | Ifx_MSC * | msc,
 |  | IfxMsc_Target | enX
 | ) |  |

Select the target for data high phase.

Parameters
msc | pointer to the base of MSC registers
enX | Target to be selected
Returns
None

Definition at line 1729 of file IfxMsc.h.

Referenced by IfxMsc_Msc_initModule(), and IfxMsc_Msc_setDataTarget().

◆ IfxMsc_setDataLowTarget()

IFX_INLINE void IfxMsc_setDataLowTarget | ( | Ifx_MSC * | msc,
 |  | IfxMsc_Target | enX
 | ) |  |

Select the target for data low phase.

Parameters
msc | pointer to the base of MSC registers
enX | Target to be selected
Returns
None

Definition at line 1736 of file IfxMsc.h.

Referenced by IfxMsc_Msc_initModule(), and IfxMsc_Msc_setDataTarget().


iLLD_TC38A: Get Data

Functions
Get Data
iLLD » MSC » Standard Driver
Collaboration diagram for Get Data:

Functions

IFX_INLINE uint16 | IfxMsc_getData (Ifx_MSC *msc, uint8 upstreamIdx)
Get the upstream data from upstream data register. More...
IFX_INLINE IfxMsc_Target | IfxMsc_getDataHighTarget (Ifx_MSC *msc)
Get the selected target during high phase. More...
IFX_INLINE IfxMsc_Target | IfxMsc_getDataLowTarget (Ifx_MSC *msc)
Get the selected target during low phase. More...

Detailed Description

Function Documentation

◆ IfxMsc_getData()

IFX_INLINE uint16 IfxMsc_getData | ( | Ifx_MSC * | msc,
 |  | uint8 | upstreamIdx
 | ) |  |

Get the upstream data from upstream data register.

Parameters
msc | pointer to the base of MSC registers
upstreamIdx | Upstream data register ID
Returns
Recevived data

Definition at line 1559 of file IfxMsc.h.

Referenced by IfxMsc_Msc_receiveData().

◆ IfxMsc_getDataHighTarget()

IFX_INLINE IfxMsc_Target IfxMsc_getDataHighTarget ( Ifx_MSC * msc )

Get the selected target during high phase.

Parameters
msc pointer to the base of MSC registers
Returns
Selected target

Definition at line 1569 of file IfxMsc.h.

Referenced by IfxMsc_Msc_getTarget().

◆ IfxMsc_getDataLowTarget()

IFX_INLINE IfxMsc_Target IfxMsc_getDataLowTarget ( Ifx_MSC * msc )

Get the selected target during low phase.

Parameters
msc pointer to the base of MSC registers
Returns
Selected target

Definition at line 1576 of file IfxMsc.h.

Referenced by IfxMsc_Msc_getTarget().


iLLD_TC38A: Enable Module

Functions
Enable Module
iLLD » MSC » Standard Driver
Collaboration diagram for Enable Module:

Functions

IFX_EXTERN void | IfxMsc_disableModule (Ifx_MSC *msc)
Disable MSC kernel. More...
IFX_EXTERN void | IfxMsc_enableModule (Ifx_MSC *msc)
Enable MSC kernel. More...

Detailed Description

Function Documentation

◆ IfxMsc_disableModule()

IFX_EXTERN void IfxMsc_disableModule ( Ifx_MSC * msc )

Disable MSC kernel.

Parameters
msc pointer to the base of MSC registers
Returns
None

Definition at line 76 of file IfxMsc.c.

◆ IfxMsc_enableModule()

IFX_EXTERN void IfxMsc_enableModule ( Ifx_MSC * msc )

Enable MSC kernel.

Parameters
msc pointer to the base of MSC registers
Returns
None

Definition at line 127 of file IfxMsc.c.

Referenced by IfxMsc_Msc_initModule().


iLLD_TC38A: Reset Module

Functions
Reset Module
iLLD » MSC » Standard Driver
Collaboration diagram for Reset Module:

Functions

IFX_EXTERN void | IfxMsc_clearReset (Ifx_MSC *msc)
Clear reset bit of MSC kernel. More...
IFX_EXTERN void | IfxMsc_resetModule (Ifx_MSC *msc)
Reset MSC kernel. More...

Detailed Description

Function Documentation

◆ IfxMsc_clearReset()

IFX_EXTERN void IfxMsc_clearReset ( Ifx_MSC * msc )

Clear reset bit of MSC kernel.

Parameters
msc pointer to the base of MSC registers
Returns
None

Definition at line 61 of file IfxMsc.c.

◆ IfxMsc_resetModule()

IFX_EXTERN void IfxMsc_resetModule ( Ifx_MSC * msc )

Reset MSC kernel.

Parameters
msc pointer to the base of MSC registers
Returns
None

Definition at line 194 of file IfxMsc.c.

Referenced by IfxMsc_Msc_deInitModule().


iLLD_TC38A: Baud Calculator

Functions
Baud Calculator
iLLD » MSC » Standard Driver
Collaboration diagram for Baud Calculator:

Functions

IFX_EXTERN uint32 | IfxMsc_downstreamAbraBaudCalculator (uint32 baud)
Get the NDD value for the supplied baud rate when when ABRA block is enabled. More...
IFX_EXTERN uint64 | IfxMsc_upstreamFractionalBaudCalculator (Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is fractional. More...
IFX_EXTERN uint32 | IfxMsc_upstreamNormalBaudCalculator (Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is normal. More...

Detailed Description

Function Documentation

◆ IfxMsc_downstreamAbraBaudCalculator()

IFX_EXTERN uint32 IfxMsc_downstreamAbraBaudCalculator ( uint32 baud )

Get the NDD value for the supplied baud rate when when ABRA block is enabled.

Parameters
baud Required baud rate
Returns
NDD value

Definition at line 86 of file IfxMsc.c.

Referenced by IfxMsc_Msc_initializeAbra().

◆ IfxMsc_upstreamFractionalBaudCalculator()

IFX_EXTERN uint64 IfxMsc_upstreamFractionalBaudCalculator | ( | Ifx_MSC * | msc,
 |  | uint32 | baud
 | ) |  |

Get the step value for the supplied baud rate when divider mode is fractional.

Parameters
msc | pointer to the base of MSC registers
baud | Required baud rate
Returns
Step value

Definition at line 215 of file IfxMsc.c.

Referenced by IfxMsc_Msc_initModule().

◆ IfxMsc_upstreamNormalBaudCalculator()

IFX_EXTERN uint32 IfxMsc_upstreamNormalBaudCalculator | ( | Ifx_MSC * | msc,
 |  | uint32 | baud
 | ) |  |

Get the step value for the supplied baud rate when divider mode is normal.

Parameters
msc | pointer to the base of MSC registers
baud | Required baud rate
Returns
Step value

Definition at line 238 of file IfxMsc.c.

Referenced by IfxMsc_Msc_initModule().


iLLD_TC38A: IO Pin Configuration Functions

Functions
IO Pin Configuration Functions
iLLD » MSC » Standard Driver
Collaboration diagram for IO Pin Configuration Functions:

Functions

IFX_INLINE void | IfxMsc_initEnPin (const IfxMsc_En_Out *en, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a EN output. More...
IFX_INLINE void | IfxMsc_initFclnPin (const IfxMsc_Fcln_Out *fcln, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a FCLN output. More...
IFX_INLINE void | IfxMsc_initFclpPin (const IfxMsc_Fclp_Out *fclp, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a FCLP output. More...
IFX_INLINE void | IfxMsc_initInjPin (const IfxMsc_Inj_In *inj, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a INJ input. More...
IFX_INLINE void | IfxMsc_initSdiPin (const IfxMsc_Sdi_In *sdi, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a SDI input. More...
IFX_INLINE void | IfxMsc_initSonPin (const IfxMsc_Son_Out *son, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a SON output. More...
IFX_INLINE void | IfxMsc_initSopPin (const IfxMsc_Sop_Out *sop, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a SOP output. More...

Detailed Description

Function Documentation

◆ IfxMsc_initEnPin()

IFX_INLINE void IfxMsc_initEnPin | ( | const IfxMsc_En_Out * | en,
 |  | IfxPort_OutputMode | pinMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a EN output.

Parameters
en | the EN Pin which should be configured
pinMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 1633 of file IfxMsc.h.

Referenced by IfxMsc_Msc_initModule().

◆ IfxMsc_initFclnPin()

IFX_INLINE void IfxMsc_initFclnPin | ( | const IfxMsc_Fcln_Out * | fcln,
 |  | IfxPort_OutputMode | pinMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a FCLN output.

Parameters
fcln | the FCLN Pin which should be configured
pinMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 1643 of file IfxMsc.h.

Referenced by IfxMsc_Msc_initModule().

◆ IfxMsc_initFclpPin()

IFX_INLINE void IfxMsc_initFclpPin | ( | const IfxMsc_Fclp_Out * | fclp,
 |  | IfxPort_OutputMode | pinMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a FCLP output.

Parameters
fclp | the FCLP Pin which should be configured
pinMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 1653 of file IfxMsc.h.

Referenced by IfxMsc_Msc_initModule().

◆ IfxMsc_initInjPin()

IFX_INLINE void IfxMsc_initInjPin | ( | const IfxMsc_Inj_In * | inj,
 |  | IfxPort_InputMode | pinMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a INJ input.

Parameters
inj | the INJ Pin which should be configured
pinMode | the pin input mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 1663 of file IfxMsc.h.

Referenced by IfxMsc_Msc_initModule().

◆ IfxMsc_initSdiPin()

IFX_INLINE void IfxMsc_initSdiPin | ( | const IfxMsc_Sdi_In * | sdi,
 |  | IfxPort_InputMode | pinMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a SDI input.

Parameters
sdi | the SDI Pin which should be configured
pinMode | the pin input mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 1673 of file IfxMsc.h.

Referenced by IfxMsc_Msc_initModule().

◆ IfxMsc_initSonPin()

IFX_INLINE void IfxMsc_initSonPin | ( | const IfxMsc_Son_Out * | son,
 |  | IfxPort_OutputMode | pinMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a SON output.

Parameters
son | the SON Pin which should be configured
pinMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 1684 of file IfxMsc.h.

Referenced by IfxMsc_Msc_initModule().

◆ IfxMsc_initSopPin()

IFX_INLINE void IfxMsc_initSopPin | ( | const IfxMsc_Sop_Out * | sop,
 |  | IfxPort_OutputMode | pinMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a SOP output.

Parameters
sop | the SOP Pin which should be configured
pinMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 1694 of file IfxMsc.h.

Referenced by IfxMsc_Msc_initModule().


iLLD_TC38A: Module Functions

Functions
Module Functions
iLLD » MSC » Standard Driver
Collaboration diagram for Module Functions:

Functions

IFX_EXTERN Ifx_MSC * | IfxMsc_getAddress (IfxMsc_Index msc)
IFX_EXTERN IfxMsc_Index | IfxMsc_getIndex (Ifx_MSC *msc)
API to get the resource index of the MSC specified. More...

Detailed Description

Function Documentation

◆ IfxMsc_getAddress()

IFX_EXTERN Ifx_MSC* IfxMsc_getAddress ( IfxMsc_Index msc )
Parameters
msc Resource index of the MSC
Returns
MSC module register address

Definition at line 140 of file IfxMsc.c.

◆ IfxMsc_getIndex()

IFX_EXTERN IfxMsc_Index IfxMsc_getIndex ( Ifx_MSC * msc )

API to get the resource index of the MSC specified.

Parameters
msc Pointer to the MSC HW module (register memory map)
Returns
Resource index of the ERAY

Definition at line 167 of file IfxMsc.c.

Referenced by IfxMsc_getSrcPointer().


iLLD_TC38A: MSC Pin Mapping

Data Structures | Macros | Variables
MSC Pin Mapping
iLLD » MSC
Collaboration diagram for MSC Pin Mapping:

Data Structures

struct | IfxMsc_Inj_In
INJ pin mapping structure. More...
struct | IfxMsc_Sdi_In
SDI pin mapping structure. More...
struct | IfxMsc_En_Out
EN pin mapping structure. More...
struct | IfxMsc_Fclp_Out
FCLP pin mapping structure. More...
struct | IfxMsc_Fcln_Out
FCLN pin mapping structure. More...
struct | IfxMsc_Sop_Out
SOP pin mapping structure. More...
struct | IfxMsc_Son_Out
SON pin mapping structure. More...

Macros

#define | IFXMSC_PINMAP_NUM_MODULES 3
Table dimensions. More...
#define | IFXMSC_PINMAP_NUM_TARGETS 3
#define | IFXMSC_PINMAP_EN_OUT_NUM_ITEMS 6
#define | IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS 1
#define | IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS 3
#define | IFXMSC_PINMAP_INJ_IN_NUM_ITEMS 2
#define | IFXMSC_PINMAP_SDI_IN_NUM_ITEMS 4
#define | IFXMSC_PINMAP_SON_OUT_NUM_ITEMS 1
#define | IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS 2

Variables

IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P10_2_OUT
Chip Select. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P10_3_OUT
Chip Select. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P10_4_OUT
Chip Select. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P11_11_OUT
Chip Select. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P14_10_OUT
Chip Select. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P15_5_OUT
Chip Select. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P10_1_OUT
Chip Select. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P11_2_OUT
Chip Select. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P13_0_OUT
Chip Select. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P14_9_OUT
Chip Select. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P15_3_OUT
Chip Select. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc1_EN0_P23_4_OUT
Chip Select. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc1_EN0_P32_4_OUT
Chip Select. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc1_EN1_P23_5_OUT
Chip Select. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc2_EN0_P13_4_OUT
Chip Select. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc2_EN0_P14_14_OUT
Chip Select. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc2_EN1_P14_13_OUT
Chip Select. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc2_EN2_P14_11_OUT
Chip Select. More...
IFX_EXTERN IfxMsc_Fcln_Out IfxMsc0_FCLN_P13_0_OUT
Shift-clock inverted part of the differential signal. More...
IFX_EXTERN IfxMsc_Fcln_Out IfxMsc1_FCLN_P22_0_OUT
Shift-clock inverted part of the differential signal. More...
IFX_EXTERN IfxMsc_Fcln_Out IfxMsc2_FCLN_P13_4_OUT
Shift-clock inverted part of the differential signal. More...
IFX_EXTERN IfxMsc_Fclp_Out IfxMsc0_FCLP_P11_6_OUT
Shift-clock direct part of the differential signal. More...
IFX_EXTERN IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_1_OUT
Shift-clock direct part of the differential signal. More...
IFX_EXTERN IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_2_OUT
Shift-clock direct part of the differential signal. More...
IFX_EXTERN IfxMsc_Fclp_Out IfxMsc1_FCLP_P22_1_OUT
Shift-clock direct part of the differential signal. More...
IFX_EXTERN IfxMsc_Fclp_Out IfxMsc2_FCLP_P13_5_OUT
Shift-clock direct part of the differential signal. More...
IFX_EXTERN IfxMsc_Inj_In IfxMsc0_INJ0_P00_0_IN
Injection signal from port. More...
IFX_EXTERN IfxMsc_Inj_In IfxMsc0_INJ1_P10_5_IN
Injection signal from port. More...
IFX_EXTERN IfxMsc_Inj_In IfxMsc1_INJ0_P23_3_IN
Injection signal from port. More...
IFX_EXTERN IfxMsc_Inj_In IfxMsc1_INJ1_P33_13_IN
Injection signal from port. More...
IFX_EXTERN IfxMsc_Inj_In IfxMsc2_INJ0_P13_13_IN
Injection signal from port. More...
IFX_EXTERN IfxMsc_Inj_In IfxMsc2_INJ1_P14_15_IN
Injection signal from port. More...
IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI0_P11_10_IN
Upstream assynchronous input signal. More...
IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI1_P10_2_IN
Upstream assynchronous input signal. More...
IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI2_P14_3_IN
Upstream assynchronous input signal. More...
IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI3_P11_3_IN
Upstream assynchronous input signal. More...
IFX_EXTERN IfxMsc_Sdi_In IfxMsc1_SDI0_P23_1_IN
Upstream assynchronous input signal. More...
IFX_EXTERN IfxMsc_Sdi_In IfxMsc1_SDI1_P02_3_IN
Upstream assynchronous input signal. More...
IFX_EXTERN IfxMsc_Sdi_In IfxMsc1_SDI2_P32_4_IN
Upstream assynchronous input signal. More...
IFX_EXTERN IfxMsc_Sdi_In IfxMsc2_SDI0_P14_12_IN
Upstream assynchronous input signal. More...
IFX_EXTERN IfxMsc_Sdi_In IfxMsc2_SDI1_P14_11_IN
Upstream assynchronous input signal. More...
IFX_EXTERN IfxMsc_Son_Out IfxMsc0_SON_P13_2_OUT
Data output - inverted part of the differential signal. More...
IFX_EXTERN IfxMsc_Son_Out IfxMsc1_SON_P22_2_OUT
Data output - inverted part of the differential signal. More...
IFX_EXTERN IfxMsc_Son_Out IfxMsc2_SON_P13_6_OUT
Data output - inverted part of the differential signal. More...
IFX_EXTERN IfxMsc_Sop_Out IfxMsc0_SOP_P11_9_OUT
Data output - direct part of the differential signal. More...
IFX_EXTERN IfxMsc_Sop_Out IfxMsc0_SOP_P13_3_OUT
Data output - direct part of the differential signal. More...
IFX_EXTERN IfxMsc_Sop_Out IfxMsc1_SOP_P22_3_OUT
Data output - direct part of the differential signal. More...
IFX_EXTERN IfxMsc_Sop_Out IfxMsc2_SOP_P13_7_OUT
Data output - direct part of the differential signal. More...
IFX_EXTERN IfxMsc_Sop_Out IfxMsc2_SOP_P14_11_OUT
Data output - direct part of the differential signal. More...
IFX_EXTERN const IfxMsc_En_Out * | IfxMsc_En_Out_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_NUM_TARGETS][IFXMSC_PINMAP_EN_OUT_NUM_ITEMS]
IfxMsc_En_Out table. More...
IFX_EXTERN const IfxMsc_Fcln_Out * | IfxMsc_Fcln_Out_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS]
IfxMsc_Fcln_Out table. More...
IFX_EXTERN const IfxMsc_Fclp_Out * | IfxMsc_Fclp_Out_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS]
IfxMsc_Fclp_Out table. More...
IFX_EXTERN const IfxMsc_Inj_In * | IfxMsc_Inj_In_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_INJ_IN_NUM_ITEMS]
IfxMsc_Inj_In table. More...
IFX_EXTERN const IfxMsc_Sdi_In * | IfxMsc_Sdi_In_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SDI_IN_NUM_ITEMS]
IfxMsc_Sdi_In table. More...
IFX_EXTERN const IfxMsc_Son_Out * | IfxMsc_Son_Out_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SON_OUT_NUM_ITEMS]
IfxMsc_Son_Out table. More...
IFX_EXTERN const IfxMsc_Sop_Out * | IfxMsc_Sop_Out_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS]
IfxMsc_Sop_Out table. More...

Detailed Description

Data Structure Documentation

◆ IfxMsc_Inj_In

struct IfxMsc_Inj_In

INJ pin mapping structure.

Definition at line 56 of file IfxMsc_PinMap.h.

Collaboration diagram for IfxMsc_Inj_In:
[legend]
Data Fields
Ifx_MSC * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxMsc_Sdi_In

struct IfxMsc_Sdi_In

SDI pin mapping structure.

Definition at line 64 of file IfxMsc_PinMap.h.

Collaboration diagram for IfxMsc_Sdi_In:
[legend]
Data Fields
Ifx_MSC * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxMsc_En_Out

struct IfxMsc_En_Out

EN pin mapping structure.

Definition at line 72 of file IfxMsc_PinMap.h.

Collaboration diagram for IfxMsc_En_Out:
[legend]
Data Fields
Ifx_MSC * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.
uint8 | target | Target ID.

◆ IfxMsc_Fclp_Out

struct IfxMsc_Fclp_Out

FCLP pin mapping structure.

Definition at line 81 of file IfxMsc_PinMap.h.

Collaboration diagram for IfxMsc_Fclp_Out:
[legend]
Data Fields
Ifx_MSC * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxMsc_Fcln_Out

struct IfxMsc_Fcln_Out

FCLN pin mapping structure.

Definition at line 89 of file IfxMsc_PinMap.h.

Collaboration diagram for IfxMsc_Fcln_Out:
[legend]
Data Fields
Ifx_MSC * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxMsc_Sop_Out

struct IfxMsc_Sop_Out

SOP pin mapping structure.

Definition at line 97 of file IfxMsc_PinMap.h.

Collaboration diagram for IfxMsc_Sop_Out:
[legend]
Data Fields
Ifx_MSC * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxMsc_Son_Out

struct IfxMsc_Son_Out

SON pin mapping structure.

Definition at line 105 of file IfxMsc_PinMap.h.

Collaboration diagram for IfxMsc_Son_Out:
[legend]
Data Fields
Ifx_MSC * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

Macro Definition Documentation

◆ IFXMSC_PINMAP_EN_OUT_NUM_ITEMS

#define IFXMSC_PINMAP_EN_OUT_NUM_ITEMS 6

Definition at line 165 of file IfxMsc_PinMap.h.

◆ IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS

#define IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS 1

Definition at line 166 of file IfxMsc_PinMap.h.

◆ IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS

#define IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS 3

Definition at line 167 of file IfxMsc_PinMap.h.

◆ IFXMSC_PINMAP_INJ_IN_NUM_ITEMS

#define IFXMSC_PINMAP_INJ_IN_NUM_ITEMS 2

Definition at line 168 of file IfxMsc_PinMap.h.

◆ IFXMSC_PINMAP_NUM_MODULES

#define IFXMSC_PINMAP_NUM_MODULES 3

Table dimensions.

Definition at line 163 of file IfxMsc_PinMap.h.

◆ IFXMSC_PINMAP_NUM_TARGETS

#define IFXMSC_PINMAP_NUM_TARGETS 3

Definition at line 164 of file IfxMsc_PinMap.h.

◆ IFXMSC_PINMAP_SDI_IN_NUM_ITEMS

#define IFXMSC_PINMAP_SDI_IN_NUM_ITEMS 4

Definition at line 169 of file IfxMsc_PinMap.h.

◆ IFXMSC_PINMAP_SON_OUT_NUM_ITEMS

#define IFXMSC_PINMAP_SON_OUT_NUM_ITEMS 1

Definition at line 170 of file IfxMsc_PinMap.h.

◆ IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS

#define IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS 2

Definition at line 171 of file IfxMsc_PinMap.h.

Variable Documentation

◆ IfxMsc0_EN0_P10_2_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P10_2_OUT

Chip Select.

Definition at line 112 of file IfxMsc_PinMap.h.

◆ IfxMsc0_EN0_P10_3_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P10_3_OUT

Chip Select.

Definition at line 113 of file IfxMsc_PinMap.h.

◆ IfxMsc0_EN0_P10_4_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P10_4_OUT

Chip Select.

Definition at line 114 of file IfxMsc_PinMap.h.

◆ IfxMsc0_EN0_P11_11_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P11_11_OUT

Chip Select.

Definition at line 115 of file IfxMsc_PinMap.h.

◆ IfxMsc0_EN0_P14_10_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P14_10_OUT

Chip Select.

Definition at line 116 of file IfxMsc_PinMap.h.

◆ IfxMsc0_EN0_P15_5_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P15_5_OUT

Chip Select.

Definition at line 117 of file IfxMsc_PinMap.h.

◆ IfxMsc0_EN1_P10_1_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P10_1_OUT

Chip Select.

Definition at line 118 of file IfxMsc_PinMap.h.

◆ IfxMsc0_EN1_P11_2_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P11_2_OUT

Chip Select.

Definition at line 119 of file IfxMsc_PinMap.h.

◆ IfxMsc0_EN1_P13_0_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P13_0_OUT

Chip Select.

Definition at line 120 of file IfxMsc_PinMap.h.

◆ IfxMsc0_EN1_P14_9_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P14_9_OUT

Chip Select.

Definition at line 121 of file IfxMsc_PinMap.h.

◆ IfxMsc0_EN1_P15_3_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P15_3_OUT

Chip Select.

Definition at line 122 of file IfxMsc_PinMap.h.

◆ IfxMsc0_FCLN_P13_0_OUT

IFX_EXTERN IfxMsc_Fcln_Out IfxMsc0_FCLN_P13_0_OUT

Shift-clock inverted part of the differential signal.

Definition at line 130 of file IfxMsc_PinMap.h.

◆ IfxMsc0_FCLP_P11_6_OUT

IFX_EXTERN IfxMsc_Fclp_Out IfxMsc0_FCLP_P11_6_OUT

Shift-clock direct part of the differential signal.

Definition at line 133 of file IfxMsc_PinMap.h.

◆ IfxMsc0_FCLP_P13_1_OUT

IFX_EXTERN IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_1_OUT

Shift-clock direct part of the differential signal.

Definition at line 134 of file IfxMsc_PinMap.h.

◆ IfxMsc0_FCLP_P13_2_OUT

IFX_EXTERN IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_2_OUT

Shift-clock direct part of the differential signal.

Definition at line 135 of file IfxMsc_PinMap.h.

◆ IfxMsc0_INJ0_P00_0_IN

IFX_EXTERN IfxMsc_Inj_In IfxMsc0_INJ0_P00_0_IN

Injection signal from port.

Definition at line 138 of file IfxMsc_PinMap.h.

◆ IfxMsc0_INJ1_P10_5_IN

IFX_EXTERN IfxMsc_Inj_In IfxMsc0_INJ1_P10_5_IN

Injection signal from port.

Definition at line 139 of file IfxMsc_PinMap.h.

◆ IfxMsc0_SDI0_P11_10_IN

IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI0_P11_10_IN

Upstream assynchronous input signal.

Definition at line 144 of file IfxMsc_PinMap.h.

◆ IfxMsc0_SDI1_P10_2_IN

IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI1_P10_2_IN

Upstream assynchronous input signal.

Definition at line 145 of file IfxMsc_PinMap.h.

◆ IfxMsc0_SDI2_P14_3_IN

IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI2_P14_3_IN

Upstream assynchronous input signal.

Definition at line 146 of file IfxMsc_PinMap.h.

◆ IfxMsc0_SDI3_P11_3_IN

IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI3_P11_3_IN

Upstream assynchronous input signal.

Definition at line 147 of file IfxMsc_PinMap.h.

◆ IfxMsc0_SON_P13_2_OUT

IFX_EXTERN IfxMsc_Son_Out IfxMsc0_SON_P13_2_OUT

Data output - inverted part of the differential signal.

Definition at line 153 of file IfxMsc_PinMap.h.

◆ IfxMsc0_SOP_P11_9_OUT

IFX_EXTERN IfxMsc_Sop_Out IfxMsc0_SOP_P11_9_OUT

Data output - direct part of the differential signal.

Definition at line 156 of file IfxMsc_PinMap.h.

◆ IfxMsc0_SOP_P13_3_OUT

IFX_EXTERN IfxMsc_Sop_Out IfxMsc0_SOP_P13_3_OUT

Data output - direct part of the differential signal.

Definition at line 157 of file IfxMsc_PinMap.h.

◆ IfxMsc1_EN0_P23_4_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc1_EN0_P23_4_OUT

Chip Select.

Definition at line 123 of file IfxMsc_PinMap.h.

◆ IfxMsc1_EN0_P32_4_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc1_EN0_P32_4_OUT

Chip Select.

Definition at line 124 of file IfxMsc_PinMap.h.

◆ IfxMsc1_EN1_P23_5_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc1_EN1_P23_5_OUT

Chip Select.

Definition at line 125 of file IfxMsc_PinMap.h.

◆ IfxMsc1_FCLN_P22_0_OUT

IFX_EXTERN IfxMsc_Fcln_Out IfxMsc1_FCLN_P22_0_OUT

Shift-clock inverted part of the differential signal.

Definition at line 131 of file IfxMsc_PinMap.h.

◆ IfxMsc1_FCLP_P22_1_OUT

IFX_EXTERN IfxMsc_Fclp_Out IfxMsc1_FCLP_P22_1_OUT

Shift-clock direct part of the differential signal.

Definition at line 136 of file IfxMsc_PinMap.h.

◆ IfxMsc1_INJ0_P23_3_IN

IFX_EXTERN IfxMsc_Inj_In IfxMsc1_INJ0_P23_3_IN

Injection signal from port.

Definition at line 140 of file IfxMsc_PinMap.h.

◆ IfxMsc1_INJ1_P33_13_IN

IFX_EXTERN IfxMsc_Inj_In IfxMsc1_INJ1_P33_13_IN

Injection signal from port.

Definition at line 141 of file IfxMsc_PinMap.h.

◆ IfxMsc1_SDI0_P23_1_IN

IFX_EXTERN IfxMsc_Sdi_In IfxMsc1_SDI0_P23_1_IN

Upstream assynchronous input signal.

Definition at line 148 of file IfxMsc_PinMap.h.

◆ IfxMsc1_SDI1_P02_3_IN

IFX_EXTERN IfxMsc_Sdi_In IfxMsc1_SDI1_P02_3_IN

Upstream assynchronous input signal.

Definition at line 149 of file IfxMsc_PinMap.h.

◆ IfxMsc1_SDI2_P32_4_IN

IFX_EXTERN IfxMsc_Sdi_In IfxMsc1_SDI2_P32_4_IN

Upstream assynchronous input signal.

Definition at line 150 of file IfxMsc_PinMap.h.

◆ IfxMsc1_SON_P22_2_OUT

IFX_EXTERN IfxMsc_Son_Out IfxMsc1_SON_P22_2_OUT

Data output - inverted part of the differential signal.

Definition at line 154 of file IfxMsc_PinMap.h.

◆ IfxMsc1_SOP_P22_3_OUT

IFX_EXTERN IfxMsc_Sop_Out IfxMsc1_SOP_P22_3_OUT

Data output - direct part of the differential signal.

Definition at line 158 of file IfxMsc_PinMap.h.

◆ IfxMsc2_EN0_P13_4_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc2_EN0_P13_4_OUT

Chip Select.

Definition at line 126 of file IfxMsc_PinMap.h.

◆ IfxMsc2_EN0_P14_14_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc2_EN0_P14_14_OUT

Chip Select.

Definition at line 127 of file IfxMsc_PinMap.h.

◆ IfxMsc2_EN1_P14_13_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc2_EN1_P14_13_OUT

Chip Select.

Definition at line 128 of file IfxMsc_PinMap.h.

◆ IfxMsc2_EN2_P14_11_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc2_EN2_P14_11_OUT

Chip Select.

Definition at line 129 of file IfxMsc_PinMap.h.

◆ IfxMsc2_FCLN_P13_4_OUT

IFX_EXTERN IfxMsc_Fcln_Out IfxMsc2_FCLN_P13_4_OUT

Shift-clock inverted part of the differential signal.

Definition at line 132 of file IfxMsc_PinMap.h.

◆ IfxMsc2_FCLP_P13_5_OUT

IFX_EXTERN IfxMsc_Fclp_Out IfxMsc2_FCLP_P13_5_OUT

Shift-clock direct part of the differential signal.

Definition at line 137 of file IfxMsc_PinMap.h.

◆ IfxMsc2_INJ0_P13_13_IN

IFX_EXTERN IfxMsc_Inj_In IfxMsc2_INJ0_P13_13_IN

Injection signal from port.

Definition at line 142 of file IfxMsc_PinMap.h.

◆ IfxMsc2_INJ1_P14_15_IN

IFX_EXTERN IfxMsc_Inj_In IfxMsc2_INJ1_P14_15_IN

Injection signal from port.

Definition at line 143 of file IfxMsc_PinMap.h.

◆ IfxMsc2_SDI0_P14_12_IN

IFX_EXTERN IfxMsc_Sdi_In IfxMsc2_SDI0_P14_12_IN

Upstream assynchronous input signal.

Definition at line 151 of file IfxMsc_PinMap.h.

◆ IfxMsc2_SDI1_P14_11_IN

IFX_EXTERN IfxMsc_Sdi_In IfxMsc2_SDI1_P14_11_IN

Upstream assynchronous input signal.

Definition at line 152 of file IfxMsc_PinMap.h.

◆ IfxMsc2_SON_P13_6_OUT

IFX_EXTERN IfxMsc_Son_Out IfxMsc2_SON_P13_6_OUT

Data output - inverted part of the differential signal.

Definition at line 155 of file IfxMsc_PinMap.h.

◆ IfxMsc2_SOP_P13_7_OUT

IFX_EXTERN IfxMsc_Sop_Out IfxMsc2_SOP_P13_7_OUT

Data output - direct part of the differential signal.

Definition at line 159 of file IfxMsc_PinMap.h.

◆ IfxMsc2_SOP_P14_11_OUT

IFX_EXTERN IfxMsc_Sop_Out IfxMsc2_SOP_P14_11_OUT

Data output - direct part of the differential signal.

Definition at line 160 of file IfxMsc_PinMap.h.

◆ IfxMsc_En_Out_pinTable

IFX_EXTERN const IfxMsc_En_Out* IfxMsc_En_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_NUM_TARGETS][IFXMSC_PINMAP_EN_OUT_NUM_ITEMS]

IfxMsc_En_Out table.

Definition at line 175 of file IfxMsc_PinMap.h.

◆ IfxMsc_Fcln_Out_pinTable

IFX_EXTERN const IfxMsc_Fcln_Out* IfxMsc_Fcln_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS]

IfxMsc_Fcln_Out table.

Definition at line 178 of file IfxMsc_PinMap.h.

◆ IfxMsc_Fclp_Out_pinTable

IFX_EXTERN const IfxMsc_Fclp_Out* IfxMsc_Fclp_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS]

IfxMsc_Fclp_Out table.

Definition at line 181 of file IfxMsc_PinMap.h.

◆ IfxMsc_Inj_In_pinTable

IFX_EXTERN const IfxMsc_Inj_In* IfxMsc_Inj_In_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_INJ_IN_NUM_ITEMS]

IfxMsc_Inj_In table.

Definition at line 184 of file IfxMsc_PinMap.h.

◆ IfxMsc_Sdi_In_pinTable

IFX_EXTERN const IfxMsc_Sdi_In* IfxMsc_Sdi_In_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SDI_IN_NUM_ITEMS]

IfxMsc_Sdi_In table.

Definition at line 187 of file IfxMsc_PinMap.h.

◆ IfxMsc_Son_Out_pinTable

IFX_EXTERN const IfxMsc_Son_Out* IfxMsc_Son_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SON_OUT_NUM_ITEMS]

IfxMsc_Son_Out table.

Definition at line 190 of file IfxMsc_PinMap.h.

◆ IfxMsc_Sop_Out_pinTable

IFX_EXTERN const IfxMsc_Sop_Out* IfxMsc_Sop_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS]

IfxMsc_Sop_Out table.

Definition at line 193 of file IfxMsc_PinMap.h.


iLLD_TC38A: How to use the MSC Interface driver?

How to use the MSC Interface driver?
iLLD » MSC
Collaboration diagram for How to use the MSC Interface driver?:

The MSC interface driver provides a default MSC configuration

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Msc/Msc/IfxMsc_Msc.h>

Variables

Declare the MSC handle as global variable in your C code:

// MSC handle
static IfxMsc_Msc *msc;
// IO Pins
static const IfxMsc_Msc_Io IfxMsc_PinMap[IFXMSC_NUM_MODULES] = {
{
{ &IfxMsc0_FCLP_P13_1_OUT, IfxPort_OutputMode_pushPull },
{ &IfxMsc0_FCLN_P13_0_OUT, IfxPort_OutputMode_pushPull },
{ &IfxMsc0_SOP_P13_3_OUT, IfxPort_OutputMode_pushPull },
{ &IfxMsc0_SON_P13_2_OUT, IfxPort_OutputMode_pushPull },
{ &IfxMsc0_EN0_P10_3_OUT, IfxPort_OutputMode_pushPull },
{ &IfxMsc0_EN1_P11_2_OUT, IfxPort_OutputMode_pushPull },
{NULL_PTR},
{NULL_PTR},
{ &IfxMsc0_SDI0_P11_10_IN, IfxPort_InputMode_pullUp },
{ &IfxMsc0_INJ0_P00_0_IN, IfxPort_InputMode_pullUp },
{ &IfxMsc0_INJ1_P10_5_IN, IfxPort_InputMode_pullUp },
IfxPort_PadDriver_cmosAutomotiveSpeed3
},
#if IFXMSC_NUM_MODULES >= 2
{
{ &IfxMsc1_FCLP_P22_1_OUT, IfxPort_OutputMode_pushPull },
{ &IfxMsc1_FCLN_P22_0_OUT, IfxPort_OutputMode_pushPull },
{ &IfxMsc1_SOP_P22_3_OUT, IfxPort_OutputMode_pushPull },
{ &IfxMsc1_SON_P22_2_OUT, IfxPort_OutputMode_pushPull },
{ &IfxMsc1_EN0_P23_4_OUT, IfxPort_OutputMode_pushPull },
{ &IfxMsc1_EN1_P23_5_OUT, IfxPort_OutputMode_pushPull },
{NULL_PTR},
{NULL_PTR},
{ &IfxMsc1_SDI0_P23_1_IN, IfxPort_InputMode_pullUp },
{ &IfxMsc1_INJ0_P23_3_IN, IfxPort_InputMode_pullUp },
{ &IfxMsc1_INJ1_P33_13_IN, IfxPort_InputMode_pullUp },
IfxPort_PadDriver_cmosAutomotiveSpeed3
},
#endif
};

Module Initialisation

The module initialisation can be done as followed:

// create configuration (same is used for all MSCs)
IfxMsc_Msc_Config mscConfig;
IfxMsc_Msc_initModuleConfig(&mscConfig, &MODULE_MSC0);
// increase baudrate for faster simulation:
mscConfig.clockConfig.baudrate = 25000000;
mscConfig.clockConfig.dividerMode = IfxMsc_DividerMode_fractional;
// FCL only activated on transfers
mscConfig.outputControlConfig.fclClockControl = IfxMsc_FclClockControlEnabled_activePhaseOnly;
// in this case we also don't need a selection bit
mscConfig.downstreamConfig.srlActivePhaseSelection = IfxMsc_ActivePhaseSelection_none;
mscConfig.downstreamConfig.srhActivePhaseSelection = IfxMsc_ActivePhaseSelection_none;
// initialize MSCs
for(int i=0; i<IFXMSC_NUM_MODULES; ++i) {
// init module pointer
mscConfig.msc = (Ifx_MSC*)IfxMsc_cfg_indexMap[i].module;
// IO Config
mscConfig.io = IfxMsc_PinMap[i];
// initialize module
IfxMsc_Msc_initModule(&msc[i], &mscConfig);
}

The MSC is ready for use now!

Data Transfers

The MSC driver provides simple to use transfer function

for(int n=0; n<10; ++n) {
// clear IRQ flag of previous transfer
for(int i=0; i<IFXMSC_NUM_MODULES; ++i) {
msc[i].msc->ISC.B.CDEDI = 1;
}
// new transfer
for(int i=0; i<IFXMSC_NUM_MODULES; ++i) {
const unsigned dataL = i*0x1000 + n;
const unsigned dataH = i*0x1000 + 0x0100 + n;
IfxMsc_Msc_sendData(&msc[i], dataL, dataH);
}
// wait until transfers are finished
for(int i=0; i<IFXMSC_NUM_MODULES; ++i) {
while( !msc[i].msc->ISR.B.DEDI ); // check if new data could be written
while( msc[i].msc->DSS.B.DFA ); // check if we are still in the active data phase
}
}


iLLD_TC38A: MSC

Modules
MSC
iLLD » MSC
Collaboration diagram for MSC:

Modules

Enumerations
Data Structures
Module Initialize Functions
Send Functions
Receive Functions
Target Read Write Functions

Detailed Description


iLLD_TC38A: Enumerations

Enumerations
Enumerations
iLLD » MSC » MSC
Collaboration diagram for Enumerations:

Enumerations

enum IfxMsc_Msc_Target {
IfxMsc_Msc_Target_low = 0,
IfxMsc_Msc_Target_high = 1
}
Msc Instance Number. More...

Detailed Description

Enumeration Type Documentation

◆ IfxMsc_Msc_Target

enum IfxMsc_Msc_Target

Msc Instance Number.

Enumerator
IfxMsc_Msc_Target_low | MSC Target Low.
IfxMsc_Msc_Target_high | MSC Target High.

Definition at line 197 of file IfxMsc_Msc.h.


iLLD_TC38A: Data Structures

Data Structures
Data Structures
iLLD » MSC » MSC
Collaboration diagram for Data Structures:

Data Structures

struct | IfxMsc_Msc_en
struct | IfxMsc_Msc_fcln
struct | IfxMsc_Msc_fclp
struct | IfxMsc_Msc_inj0
struct | IfxMsc_Msc_inj1
struct | IfxMsc_Msc_sdi
struct | IfxMsc_Msc_son
struct | IfxMsc_Msc_sop
struct | IfxMsc_Msc_Abra
ABRA block Configuration Structure. More...
struct | IfxMsc_Msc_Clock
Clock configuration data Structure. More...
struct | IfxMsc_Msc_CommandExtensionConfig
Configuration Settings for CX mode. More...
struct | IfxMsc_Msc_DownstreamControlConfig
Downstream Control Configuration Structure. More...
struct | IfxMsc_Msc_DownstreamControlExtensionConfig
Downstream Control Extension Configuration Structure. More...
struct | IfxMsc_Msc_InterruptConfig
Interrupt Configuration Structure. More...
struct | IfxMsc_Msc_Io
MSC Pin Configuration Structure. More...
struct | IfxMsc_Msc_OutputControlConfig
Output Control Configuration Structure. More...
struct | IfxMsc_Msc_UpstreamStatusConfig
Upstream Control Configuration Structure. More...
struct | IfxMsc_Msc
MSC base address data Structure. More...
struct | IfxMsc_Msc_Config
MSC Module Configuration Structure. More...

Detailed Description

Data Structure Documentation

◆ IfxMsc_Msc_en

struct IfxMsc_Msc_en

Definition at line 211 of file IfxMsc_Msc.h.

Collaboration diagram for IfxMsc_Msc_en:
[legend]
Data Fields
IfxPort_OutputMode | mode
IfxMsc_En_Out * | pin

◆ IfxMsc_Msc_fcln

struct IfxMsc_Msc_fcln

Definition at line 217 of file IfxMsc_Msc.h.

Collaboration diagram for IfxMsc_Msc_fcln:
[legend]
Data Fields
IfxPort_OutputMode | mode
IfxMsc_Fcln_Out * | pin

◆ IfxMsc_Msc_fclp

struct IfxMsc_Msc_fclp

Definition at line 223 of file IfxMsc_Msc.h.

Collaboration diagram for IfxMsc_Msc_fclp:
[legend]
Data Fields
IfxPort_OutputMode | mode
IfxMsc_Fclp_Out * | pin

◆ IfxMsc_Msc_inj0

struct IfxMsc_Msc_inj0

Definition at line 229 of file IfxMsc_Msc.h.

Collaboration diagram for IfxMsc_Msc_inj0:
[legend]
Data Fields
IfxPort_InputMode | mode
IfxMsc_Inj_In * | pin

◆ IfxMsc_Msc_inj1

struct IfxMsc_Msc_inj1

Definition at line 235 of file IfxMsc_Msc.h.

Collaboration diagram for IfxMsc_Msc_inj1:
[legend]
Data Fields
IfxPort_InputMode | mode
IfxMsc_Inj_In * | pin

◆ IfxMsc_Msc_sdi

struct IfxMsc_Msc_sdi

Definition at line 241 of file IfxMsc_Msc.h.

Collaboration diagram for IfxMsc_Msc_sdi:
[legend]
Data Fields
IfxPort_InputMode | mode
IfxMsc_Sdi_In * | pin

◆ IfxMsc_Msc_son

struct IfxMsc_Msc_son

Definition at line 247 of file IfxMsc_Msc.h.

Collaboration diagram for IfxMsc_Msc_son:
[legend]
Data Fields
IfxPort_OutputMode | mode
IfxMsc_Son_Out * | pin

◆ IfxMsc_Msc_sop

struct IfxMsc_Msc_sop

Definition at line 253 of file IfxMsc_Msc.h.

Collaboration diagram for IfxMsc_Msc_sop:
[legend]
Data Fields
IfxPort_OutputMode | mode
IfxMsc_Sop_Out * | pin

◆ IfxMsc_Msc_Abra

struct IfxMsc_Msc_Abra

ABRA block Configuration Structure.

Definition at line 265 of file IfxMsc_Msc.h.

Data Fields
IfxMsc_AsynchronousBlock | abraBlockBypass | Specifies ABRA block bypass.
uint32 | abraDownstreamBlockBaudrate | Specifies ABRA downstream block baud.
IfxMsc_ClockSelect | clockSelectAbra | Specifies the clock select for ABRA.
IfxMsc_ShiftClockPhaseDuration | highPhaseOfShiftClock | Specifies High phase of shift clock.
IfxMsc_ShiftClockPhaseDuration | lowPhaseOfShiftClock | Specifies Low phase of shift clock.
IfxMsc_NDividerAbra | nDividerAbra | Specifies the N divider.

◆ IfxMsc_Msc_Clock

struct IfxMsc_Msc_Clock

Clock configuration data Structure.

Definition at line 277 of file IfxMsc_Msc.h.

Data Fields
uint32 | baudrate | Specifies the baud rate.
IfxMsc_DividerMode | dividerMode | Specifies divided clock properties.
uint16 | step | Specifies the step value.

◆ IfxMsc_Msc_CommandExtensionConfig

struct IfxMsc_Msc_CommandExtensionConfig

Configuration Settings for CX mode.

Definition at line 286 of file IfxMsc_Msc.h.

Data Fields
IfxMsc_CommandFrameLength | commandFrameLength |
IfxMsc_ControlFrameExtensionPassivePhaseLength | commandFramePassivePhaseLength |
IfxMsc_Extension | extension | To enable or disable the CX mode.
IfxMsc_FastMode | fastMode | To enable or disable Fast Mode.
IfxMsc_NDividerDownstream | nDividerDownstream | For configuring DSTE.NDD divider value.
IfxMsc_ActivePhaseSelection | srhActivePhaseSelection | Specifies the Enable SRH active phase selection bit.
IfxMsc_MsbBitDataExtension | srhBitsShiftedAtDataFramesExtension | Adds 16 to number of SRH data frame bits if enabled.
IfxMsc_DataFrameLength | srhDataFrameLength | Number of SRH bits to be transmitted.
IfxMsc_ActivePhaseSelection | srlActivePhaseSelection | Specifies the Enable SRL active phase selection bit.
IfxMsc_MsbBitDataExtension | srlBitsShiftedAtDataFramesExtension | Adds 16 to number of SRL data frame bits if enabled.
IfxMsc_DataFrameLength | srlDataFrameLength | Number of SRL bits to be transmitted.

◆ IfxMsc_Msc_DownstreamControlConfig

struct IfxMsc_Msc_DownstreamControlConfig

Downstream Control Configuration Structure.

Definition at line 303 of file IfxMsc_Msc.h.

Data Fields
IfxMsc_CommandDataCommandRepetitionMode | commandDataCommandReceptionMode | Specifies the Command-Data-Command in Data Repetition Mode.
IfxMsc_CommandFrameLength | commandFrameLength | Specifies the Number of bits shifted at command frames.
IfxMsc_DataFramePassivePhaseLength | dataFramePassivePhaseLength | Specifies the Passive Phase Length at Data Frames.
uint32 | downstreamDataSourcesHigh | Specifies the Downstream Data Source selections High.
uint32 | downstreamDataSourcesLow | Specifies the Downstream Data Source selections Low.
uint32 | emergencyStopEnableBits | Emergency Stop.
IfxMsc_ExternalSignalInjection | externalSignalInjectionPin0 | Specifies the Injection Enable Pin 0.
IfxMsc_ExternalSignalInjection | externalSignalInjectionPin1 | Specifies the Injection Enable Pin 1.
IfxMsc_ExternalBitInjectionPosition | injectionPositionPin0 | Specifies the Injection Position Pin 0.
IfxMsc_ExternalBitInjectionPosition | injectionPositionPin1 | Specifies the Injection Position Pin 1.
IfxMsc_PassiveTimeFrameCount | passiveTimeFrameCount | Specifies the Number of Passive Time Frames.
IfxMsc_ActivePhaseSelection | srhActivePhaseSelection | Specifies the Enable SRL active phase selection bit.
IfxMsc_DataFrameLength | srhDataFrameLength | Specifies the Number of SRH bits shifted at data frames.
IfxMsc_ActivePhaseSelection | srlActivePhaseSelection | Specifies the Enable SRL active phase selection bit.
IfxMsc_DataFrameLength | srlDataFrameLength | Specifies the Number of SRL bits shifted at data frames.
IfxMsc_TransmissionMode | transmissionMode | Specifies the transmission Mode.

◆ IfxMsc_Msc_DownstreamControlExtensionConfig

struct IfxMsc_Msc_DownstreamControlExtensionConfig

Downstream Control Extension Configuration Structure.

Definition at line 325 of file IfxMsc_Msc.h.

Data Fields
IfxMsc_ControlFrameExtensionPassivePhaseLength | controlFrameExtensionPassivePhaseLength | Specifies the Passive Phase Length at Control Frames Extension.
IfxMsc_DataFrameExtensionPassivePhaseLength | dataFrameExtensionPassivePhaseLength | Specifies the Passive Phase Length at Data Frames Extension.
uint32 | downstreamExtensionDataSourcesHigh | Specifies the Downstream Select Data Source High Extension.
uint32 | downstreamExtensionDataSourcesLow | Specifies the Downstream Select Data Source Low Extension.
uint32 | emergencyStopExtensionEnableBits | Emergency Stop Extension.
IfxMsc_Extension | extension | Specifies the Extension Enable.
IfxMsc_NDividerDownstream | nDividerDownstream | Specifies the division ratio for downstream generator clock.
IfxMsc_MsbBitDataExtension | srhBitsShiftedAtDataFramesExtension | Specifies the Number of SRHE bits shifted at Data Frames.
IfxMsc_MsbBitDataExtension | srlBitsShiftedAtDataFramesExtension | Specifies the Number of SRLE bits shifted at Data Frames.

◆ IfxMsc_Msc_InterruptConfig

struct IfxMsc_Msc_InterruptConfig

Interrupt Configuration Structure.

Definition at line 340 of file IfxMsc_Msc.h.

Data Fields
IfxMsc_CommandFrameInterrupt | commandFrameInterrupt | Specifies the Command Frame Interrupt Mode.
IfxMsc_CommandFrameInterruptNode | commandFrameInterruptNode | Specifies the Command Frame Interrupt Node.
IfxMsc_DataFrameInterrupt | dataFrameInterrupt | Specifies the Data Frame Interrupt Mode.
IfxMsc_DataFrameInterruptNode | dataFrameInterruptNode | Specifies the Data Frame Interrupt Node.
IfxMsc_OverflowInterrupt | overflowInterrupt | Specifies the ABRA Overflow Interrupt Mode.
IfxMsc_OverflowInterruptNode | overflowInterruptNode | Specifies the ABRA Overflow Interrupt Node.
IfxMsc_ReceiveDataInterrupt | receiveDataInterrupt | Specifies the Receive Interrupt Mode.
IfxMsc_ReceiveDataInterruptNode | receiveDataInterruptNode | Specifies the Receive Interrupt Node.
IfxMsc_TimeFrameInterrupt | timeFrameInterrupt | Specifies the Time Frame Interrupt Mode.
IfxMsc_TimeFrameInterruptNode | timeFrameInterruptNode | Specifies the Time Frame Interrupt Node.
IfxMsc_UnderflowInterrupt | underflowInterrupt | Specifies the ABRA Underflow Interrupt Mode.
IfxMsc_UnderflowInterruptNode | underflowInterruptNode | Specifies the ABRA Underflow Interrupt Node.
IfxMsc_UpstreamTimeoutInterrupt | upstreamTimeoutInterrupt | Specifies the Upstream Timeout Interrupt Mode.
IfxMsc_UpstreamTimeoutInterruptNode | upstreamTimeoutInterruptNode | Specifies the Upstream Timeout Interrupt Node.

◆ IfxMsc_Msc_Io

struct IfxMsc_Msc_Io

MSC Pin Configuration Structure.

Definition at line 360 of file IfxMsc_Msc.h.

Collaboration diagram for IfxMsc_Msc_Io:
[legend]
Data Fields
IfxMsc_Msc_en | en0
IfxMsc_Msc_en | en1
IfxMsc_Msc_en | en2
IfxMsc_Msc_en | en3
IfxMsc_Msc_fcln | fcln
IfxMsc_Msc_fclp | fclp
IfxMsc_Msc_inj0 | inj0
IfxMsc_Msc_inj1 | inj1
IfxPort_PadDriver | pinDriver
IfxMsc_Msc_sdi | sdi
IfxMsc_Msc_son | son
IfxMsc_Msc_sop | sop

◆ IfxMsc_Msc_OutputControlConfig

struct IfxMsc_Msc_OutputControlConfig

Output Control Configuration Structure.

Definition at line 378 of file IfxMsc_Msc.h.

Data Fields
IfxMsc_ChipSelectActiveState | cslpPolarity | Specifies the CSLP Polarity.
IfxMsc_FclClockControlEnabled | fclClockControl | Specifies the CLKCTRL Polarity.
IfxMsc_FclLinePolarity | fclpPolarity | Specifies the FCLP Polarity.
IfxMsc_SdiLinePolarity | sdiLinePolarity | Specifies the ILP Polarity.
IfxMsc_SoLinePolarity | sopPolarity | Specifies the SLP Polarity.

◆ IfxMsc_Msc_UpstreamStatusConfig

struct IfxMsc_Msc_UpstreamStatusConfig

Upstream Control Configuration Structure.

Definition at line 389 of file IfxMsc_Msc.h.

Data Fields
IfxMsc_Parity | parity | Specifies the Parity Mode.
IfxMsc_ServiceRequestDelay | serviceRequestDelay | Specifies the Service Request Delay.
IfxMsc_UpstreamChannelFrameType | upstreamChannelFrameType | Specifies the Upstream Channel Frame Type.
IfxMsc_UpstreamChannelReceivingRate | upstreamChannelReceivingRate | Specifies the Upstream Channel Receiving Rate.
IfxMsc_UpstreamTimeoutPrescaler | upstreamTimeoutPrescaler | Specifies the Upstream Timeout Prescaler.
IfxMsc_UpstreamTimeoutValue | upstreamTimeoutValue | Specifies the Upstream Timeout Value.

◆ IfxMsc_Msc

struct IfxMsc_Msc

MSC base address data Structure.

Definition at line 405 of file IfxMsc_Msc.h.

Data Fields
Ifx_MSC * msc Specifies the pointer to the MSC registers.

◆ IfxMsc_Msc_Config

struct IfxMsc_Msc_Config

MSC Module Configuration Structure.

Definition at line 412 of file IfxMsc_Msc.h.

Collaboration diagram for IfxMsc_Msc_Config:
[legend]
Data Fields
IfxMsc_Msc_Abra | abraConfig | Specifies the ABRA configuration.
IfxMsc_Msc_Clock | clockConfig | Specifies the Clock configuration.
IfxMsc_Msc_CommandExtensionConfig | commandExtensionConfig | Configuration for CX mode.
IfxMsc_Msc_DownstreamControlConfig | downstreamConfig | Specifies the Downstream configuration.
IfxMsc_Msc_DownstreamControlExtensionConfig | downstreamExtensionConfig | Specifies the Downstream Extension configuration.
IfxMsc_Msc_InterruptConfig | interruptConfig | Specifies the Interrupt configuration.
IfxMsc_Msc_Io | io | Specifies the IO Pin configuration.
Ifx_MSC * | msc | Specifies the pointer to the MSC registers.
IfxMsc_Msc_OutputControlConfig | outputControlConfig | Specifies the Output Control configuration.
IfxMsc_Target | target[IFXMSC_NUM_ENABLE_SELECT_LINES] | Specifies the Downstream targets.
IfxMsc_Msc_UpstreamStatusConfig | upstreamConfig | Specifies the Upstream configuration.


iLLD_TC38A: Module Initialize Functions

Functions
Module Initialize Functions
iLLD » MSC » MSC
Collaboration diagram for Module Initialize Functions:

Functions

IFX_EXTERN void | IfxMsc_Msc_deInitModule (IfxMsc_Msc *msc)
de-initialize MSC module More...
IFX_EXTERN void | IfxMsc_Msc_initModule (IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
initialize the MSC module More...
IFX_EXTERN void | IfxMsc_Msc_initModuleConfig (IfxMsc_Msc_Config *config, Ifx_MSC *msc)
initialize the MSC module configuration More...
IFX_EXTERN void | IfxMsc_Msc_initializeAbra (IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
initialize the ABRA block More...
IFX_EXTERN void | IfxMsc_Msc_initializeDataExtension (IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
initialize the MSC data extension block for 64bit operation More...
IFX_EXTERN void | IfxMsc_Msc_initializeCommandExtension (IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)

Detailed Description

Function Documentation

◆ IfxMsc_Msc_deInitModule()

IFX_EXTERN void IfxMsc_Msc_deInitModule ( IfxMsc_Msc * msc )

de-initialize MSC module

Parameters
msc pointer to the MSC module handle
Returns
None
IfxMsc_Msc_deInitModule(&msc);

Definition at line 54 of file IfxMsc_Msc.c.

◆ IfxMsc_Msc_initializeAbra()

IFX_EXTERN void IfxMsc_Msc_initializeAbra | ( | IfxMsc_Msc * | msc,
 |  | const IfxMsc_Msc_Config * | config
 | ) |  |

initialize the ABRA block

Parameters
msc | pointer to the MSC module handle
config | pointer to the MSC module configuration
Returns
None

Definition at line 560 of file IfxMsc_Msc.c.

Referenced by IfxMsc_Msc_initModule().

◆ IfxMsc_Msc_initializeCommandExtension()

IFX_EXTERN void IfxMsc_Msc_initializeCommandExtension | ( | IfxMsc_Msc * | msc,
 |  | const IfxMsc_Msc_Config * | config
 | ) |  |
Parameters
msc | MSC handle
config | configuration
Returns
None

Definition at line 741 of file IfxMsc_Msc.c.

Referenced by IfxMsc_Msc_initModule().

◆ IfxMsc_Msc_initializeDataExtension()

IFX_EXTERN void IfxMsc_Msc_initializeDataExtension | ( | IfxMsc_Msc * | msc,
 |  | const IfxMsc_Msc_Config * | config
 | ) |  |

initialize the MSC data extension block for 64bit operation

Parameters
msc | pointer to the MSC module handle
config | pointer to the MSC module configuration
Returns
None

Definition at line 590 of file IfxMsc_Msc.c.

Referenced by IfxMsc_Msc_initModule().

◆ IfxMsc_Msc_initModule()

IFX_EXTERN void IfxMsc_Msc_initModule | ( | IfxMsc_Msc * | msc,
 |  | const IfxMsc_Msc_Config * | config
 | ) |  |

initialize the MSC module

Parameters
msc | pointer to the MSC module handle
config | pointer to the MSC module configuration
Returns
None

A coding example can be found in How to use the MSC Interface driver?

Definition at line 78 of file IfxMsc_Msc.c.

◆ IfxMsc_Msc_initModuleConfig()

IFX_EXTERN void IfxMsc_Msc_initModuleConfig | ( | IfxMsc_Msc_Config * | config,
 |  | Ifx_MSC * | msc
 | ) |  |

initialize the MSC module configuration

Parameters
config | pointer to the MSC configuration
msc | pointer to the MSC registers
Returns
None

A coding example can be found in How to use the MSC Interface driver?

Definition at line 413 of file IfxMsc_Msc.c.


iLLD_TC38A: Send Functions

Functions
Send Functions
iLLD » MSC » MSC
Collaboration diagram for Send Functions:

Functions

IFX_EXTERN void | IfxMsc_Msc_sendCommand (IfxMsc_Msc *msc, uint32 command)
send downstream command More...
IFX_EXTERN void | IfxMsc_Msc_sendData (IfxMsc_Msc *msc, uint16 dataLow, uint16 dataHigh)
send complete downstream data, both high and low More...
IFX_EXTERN void | IfxMsc_Msc_sendDataExtension (IfxMsc_Msc *msc, uint32 data, uint32 dataExtension)
Send downstream data extension (64bit) More...
IFX_EXTERN void | IfxMsc_Msc_sendDataHigh (IfxMsc_Msc *msc, uint16 data)
send high downstream data More...
IFX_EXTERN void | IfxMsc_Msc_sendDataLow (IfxMsc_Msc *msc, uint16 data)
send high downstream data More...

Detailed Description

Function Documentation

◆ IfxMsc_Msc_sendCommand()

IFX_EXTERN void IfxMsc_Msc_sendCommand | ( | IfxMsc_Msc * | msc,
 |  | uint32 | command
 | ) |  |

send downstream command

Parameters
msc | pointer to the MSC module handle
command | transmit command
Returns
None

Definition at line 658 of file IfxMsc_Msc.c.

◆ IfxMsc_Msc_sendData()

IFX_EXTERN void IfxMsc_Msc_sendData | ( | IfxMsc_Msc * | msc,
 |  | uint16 | dataLow,
 |  | uint16 | dataHigh
 | ) |  |

send complete downstream data, both high and low

Parameters
msc | pointer to the MSC module handle
dataLow | low data to be transmitted
dataHigh | high data to be transmitted
Returns
None

A coding example can be found in How to use the MSC Interface driver?

Definition at line 667 of file IfxMsc_Msc.c.

◆ IfxMsc_Msc_sendDataExtension()

IFX_EXTERN void IfxMsc_Msc_sendDataExtension | ( | IfxMsc_Msc * | msc,
 |  | uint32 | data,
 |  | uint32 | dataExtension
 | ) |  |

Send downstream data extension (64bit)

Parameters
msc | pointer to the MSC module handle
data | Data to send
dataExtension | Data extension to send
Returns
None

Definition at line 685 of file IfxMsc_Msc.c.

◆ IfxMsc_Msc_sendDataHigh()

IFX_EXTERN void IfxMsc_Msc_sendDataHigh | ( | IfxMsc_Msc * | msc,
 |  | uint16 | data
 | ) |  |

send high downstream data

Parameters
msc | pointer to the MSC module handle
data | high downstream data to be transmitted
Returns
None

Definition at line 698 of file IfxMsc_Msc.c.

◆ IfxMsc_Msc_sendDataLow()

IFX_EXTERN void IfxMsc_Msc_sendDataLow | ( | IfxMsc_Msc * | msc,
 |  | uint16 | data
 | ) |  |

send high downstream data

Parameters
msc | pointer to the MSC module handle
data | low downstream data to be transmitted
Returns
None

Definition at line 710 of file IfxMsc_Msc.c.


iLLD_TC38A: Receive Functions

Functions
Receive Functions
iLLD » MSC » MSC
Collaboration diagram for Receive Functions:

Functions

IFX_EXTERN uint32 IfxMsc_Msc_receiveData (IfxMsc_Msc *msc, uint8 upstreamIdx)
receive upstream data More...

Detailed Description

Function Documentation

◆ IfxMsc_Msc_receiveData()

IFX_EXTERN uint32 IfxMsc_Msc_receiveData | ( | IfxMsc_Msc * | msc,
 |  | uint8 | upstreamIdx
 | ) |  |

receive upstream data

Parameters
msc | pointer to the MSC module handle
upstreamIdx | index of the upstream data register
Returns
data

Definition at line 637 of file IfxMsc_Msc.c.


iLLD_TC38A: Target Read Write Functions

Functions
Target Read Write Functions
iLLD » MSC » MSC
Collaboration diagram for Target Read Write Functions:

Functions

IFX_EXTERN IfxMsc_Target | IfxMsc_Msc_getTarget (IfxMsc_Msc *msc, IfxMsc_Msc_Target target)
get the target during high and low phase More...
IFX_EXTERN void | IfxMsc_Msc_setCommandTarget (IfxMsc_Msc *msc, IfxMsc_Target enX)
set the command for target More...
IFX_EXTERN void | IfxMsc_Msc_setDataTarget (IfxMsc_Msc *msc, IfxMsc_Target enXHigh, IfxMsc_Target enXLow)
set the target data to be transmitted during low and high phase More...

Detailed Description

Function Documentation

◆ IfxMsc_Msc_getTarget()

IFX_EXTERN IfxMsc_Target IfxMsc_Msc_getTarget | ( | IfxMsc_Msc * | msc,
 |  | IfxMsc_Msc_Target | target
 | ) |  |

get the target during high and low phase

Parameters
msc | pointer to the MSC module handle
target | low phase target or high phase target
Returns
selected target

Definition at line 60 of file IfxMsc_Msc.c.

Referenced by IfxMsc_Msc_initModule().

◆ IfxMsc_Msc_setCommandTarget()

IFX_EXTERN void IfxMsc_Msc_setCommandTarget | ( | IfxMsc_Msc * | msc,
 |  | IfxMsc_Target | enX
 | ) |  |

set the command for target

Parameters
msc | pointer to the MSC module handle
enX | enX target to be selected
Returns
None

Definition at line 722 of file IfxMsc_Msc.c.

◆ IfxMsc_Msc_setDataTarget()

IFX_EXTERN void IfxMsc_Msc_setDataTarget | ( | IfxMsc_Msc * | msc,
 |  | IfxMsc_Target | enXHigh,
 |  | IfxMsc_Target | enXLow
 | ) |  |

set the target data to be transmitted during low and high phase

Parameters
msc | pointer to the MSC module handle
enXHigh | high target to be selected
enXLow | low target to be selected
Returns
None

Definition at line 730 of file IfxMsc_Msc.c.


iLLD_TC38A: IfxMsc_cfg.h File Reference

  • _Impl
Macros | Enumerations | Variables
IfxMsc_cfg.h File Reference
iLLD » MSC

MSC on-chip implementation data. More...

#include "Cpu/Std/Ifx_Types.h"
#include "IfxMsc_reg.h"
Include dependency graph for IfxMsc_cfg.h:

Go to the source code of this file.

Macros

#define | IFXMSC_NUM_MODULES 3
#define | IFXMSC_NUM_ENABLE_SELECT_LINES (4)

Enumerations

enum IfxMsc_Index {
IfxMsc_Index_none = -1,
IfxMsc_Index_0 = 0,
IfxMsc_Index_1,
IfxMsc_Index_2
}
List of the available MSC resources. More...

Variables

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxMsc_cfg_indexMap [IFXMSC_NUM_MODULES]

Detailed Description

MSC on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxMsc_cfg.h.

Macro Definition Documentation

◆ IFXMSC_NUM_ENABLE_SELECT_LINES

#define IFXMSC_NUM_ENABLE_SELECT_LINES (4)

Definition at line 69 of file IfxMsc_cfg.h.

◆ IFXMSC_NUM_MODULES

#define IFXMSC_NUM_MODULES 3

Definition at line 67 of file IfxMsc_cfg.h.

Referenced by IfxMsc_getAddress(), and IfxMsc_getIndex().

Variable Documentation

◆ IfxMsc_cfg_indexMap

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxMsc_cfg_indexMap[IFXMSC_NUM_MODULES]

Definition at line 92 of file IfxMsc_cfg.h.


iLLD_TC38A: IfxMsc_PinMap.c File Reference

  • _PinMap
Variables
IfxMsc_PinMap.c File Reference
iLLD » MSC

MSC I/O map. More...

#include "IfxMsc_PinMap.h"
Include dependency graph for IfxMsc_PinMap.c:

Go to the source code of this file.

Variables

IfxMsc_En_Out | IfxMsc0_EN0_P10_2_OUT = {&MODULE_MSC0, 0, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt4}
IfxMsc_En_Out | IfxMsc0_EN0_P10_3_OUT = {&MODULE_MSC0, 0, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt4}
IfxMsc_En_Out | IfxMsc0_EN0_P10_4_OUT = {&MODULE_MSC0, 0, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt5}
IfxMsc_En_Out | IfxMsc0_EN0_P11_11_OUT = {&MODULE_MSC0, 0, {&MODULE_P11,11}, IfxPort_OutputIdx_alt5}
IfxMsc_En_Out | IfxMsc0_EN0_P14_10_OUT = {&MODULE_MSC0, 0, {&MODULE_P14,10}, IfxPort_OutputIdx_alt3}
IfxMsc_En_Out | IfxMsc0_EN0_P15_5_OUT = {&MODULE_MSC0, 0, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt5}
IfxMsc_En_Out | IfxMsc0_EN1_P10_1_OUT = {&MODULE_MSC0, 1, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt4}
IfxMsc_En_Out | IfxMsc0_EN1_P11_2_OUT = {&MODULE_MSC0, 1, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt5}
IfxMsc_En_Out | IfxMsc0_EN1_P13_0_OUT = {&MODULE_MSC0, 1, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt4}
IfxMsc_En_Out | IfxMsc0_EN1_P14_9_OUT = {&MODULE_MSC0, 1, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt3}
IfxMsc_En_Out | IfxMsc0_EN1_P15_3_OUT = {&MODULE_MSC0, 1, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt5}
IfxMsc_En_Out | IfxMsc1_EN0_P23_4_OUT = {&MODULE_MSC1, 0, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt5}
IfxMsc_En_Out | IfxMsc1_EN0_P32_4_OUT = {&MODULE_MSC1, 0, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt5}
IfxMsc_En_Out | IfxMsc1_EN1_P23_5_OUT = {&MODULE_MSC1, 1, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt5}
IfxMsc_En_Out | IfxMsc2_EN0_P13_4_OUT = {&MODULE_MSC2, 0, {&MODULE_P13, 4}, IfxPort_OutputIdx_alt4}
IfxMsc_En_Out | IfxMsc2_EN0_P14_14_OUT = {&MODULE_MSC2, 0, {&MODULE_P14,14}, IfxPort_OutputIdx_alt4}
IfxMsc_En_Out | IfxMsc2_EN1_P14_13_OUT = {&MODULE_MSC2, 1, {&MODULE_P14,13}, IfxPort_OutputIdx_alt4}
IfxMsc_En_Out | IfxMsc2_EN2_P14_11_OUT = {&MODULE_MSC2, 2, {&MODULE_P14,11}, IfxPort_OutputIdx_alt4}
IfxMsc_Fcln_Out | IfxMsc0_FCLN_P13_0_OUT = {&MODULE_MSC0, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt5}
IfxMsc_Fcln_Out | IfxMsc1_FCLN_P22_0_OUT = {&MODULE_MSC1, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt5}
IfxMsc_Fcln_Out | IfxMsc2_FCLN_P13_4_OUT = {&MODULE_MSC2, {&MODULE_P13, 4}, IfxPort_OutputIdx_alt5}
IfxMsc_Fclp_Out | IfxMsc0_FCLP_P11_6_OUT = {&MODULE_MSC0, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt5}
IfxMsc_Fclp_Out | IfxMsc0_FCLP_P13_1_OUT = {&MODULE_MSC0, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt5}
IfxMsc_Fclp_Out | IfxMsc0_FCLP_P13_2_OUT = {&MODULE_MSC0, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt4}
IfxMsc_Fclp_Out | IfxMsc1_FCLP_P22_1_OUT = {&MODULE_MSC1, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt5}
IfxMsc_Fclp_Out | IfxMsc2_FCLP_P13_5_OUT = {&MODULE_MSC2, {&MODULE_P13, 5}, IfxPort_OutputIdx_alt5}
IfxMsc_Inj_In | IfxMsc0_INJ0_P00_0_IN = {&MODULE_MSC0, {&MODULE_P00, 0}, Ifx_RxSel_a}
IfxMsc_Inj_In | IfxMsc0_INJ1_P10_5_IN = {&MODULE_MSC0, {&MODULE_P10, 5}, Ifx_RxSel_b}
IfxMsc_Inj_In | IfxMsc1_INJ0_P23_3_IN = {&MODULE_MSC1, {&MODULE_P23, 3}, Ifx_RxSel_a}
IfxMsc_Inj_In | IfxMsc1_INJ1_P33_13_IN = {&MODULE_MSC1, {&MODULE_P33,13}, Ifx_RxSel_b}
IfxMsc_Inj_In | IfxMsc2_INJ0_P13_13_IN = {&MODULE_MSC2, {&MODULE_P13,13}, Ifx_RxSel_a}
IfxMsc_Inj_In | IfxMsc2_INJ1_P14_15_IN = {&MODULE_MSC2, {&MODULE_P14,15}, Ifx_RxSel_b}
IfxMsc_Sdi_In | IfxMsc0_SDI0_P11_10_IN = {&MODULE_MSC0, {&MODULE_P11,10}, Ifx_RxSel_a}
IfxMsc_Sdi_In | IfxMsc0_SDI1_P10_2_IN = {&MODULE_MSC0, {&MODULE_P10, 2}, Ifx_RxSel_b}
IfxMsc_Sdi_In | IfxMsc0_SDI2_P14_3_IN = {&MODULE_MSC0, {&MODULE_P14, 3}, Ifx_RxSel_c}
IfxMsc_Sdi_In | IfxMsc0_SDI3_P11_3_IN = {&MODULE_MSC0, {&MODULE_P11, 3}, Ifx_RxSel_d}
IfxMsc_Sdi_In | IfxMsc1_SDI0_P23_1_IN = {&MODULE_MSC1, {&MODULE_P23, 1}, Ifx_RxSel_a}
IfxMsc_Sdi_In | IfxMsc1_SDI1_P02_3_IN = {&MODULE_MSC1, {&MODULE_P02, 3}, Ifx_RxSel_b}
IfxMsc_Sdi_In | IfxMsc1_SDI2_P32_4_IN = {&MODULE_MSC1, {&MODULE_P32, 4}, Ifx_RxSel_c}
IfxMsc_Sdi_In | IfxMsc2_SDI0_P14_12_IN = {&MODULE_MSC2, {&MODULE_P14,12}, Ifx_RxSel_a}
IfxMsc_Sdi_In | IfxMsc2_SDI1_P14_11_IN = {&MODULE_MSC2, {&MODULE_P14,11}, Ifx_RxSel_b}
IfxMsc_Son_Out | IfxMsc0_SON_P13_2_OUT = {&MODULE_MSC0, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt5}
IfxMsc_Son_Out | IfxMsc1_SON_P22_2_OUT = {&MODULE_MSC1, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt5}
IfxMsc_Son_Out | IfxMsc2_SON_P13_6_OUT = {&MODULE_MSC2, {&MODULE_P13, 6}, IfxPort_OutputIdx_alt5}
IfxMsc_Sop_Out | IfxMsc0_SOP_P11_9_OUT = {&MODULE_MSC0, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt5}
IfxMsc_Sop_Out | IfxMsc0_SOP_P13_3_OUT = {&MODULE_MSC0, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt5}
IfxMsc_Sop_Out | IfxMsc1_SOP_P22_3_OUT = {&MODULE_MSC1, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt5}
IfxMsc_Sop_Out | IfxMsc2_SOP_P13_7_OUT = {&MODULE_MSC2, {&MODULE_P13, 7}, IfxPort_OutputIdx_alt5}
IfxMsc_Sop_Out | IfxMsc2_SOP_P14_11_OUT = {&MODULE_MSC2, {&MODULE_P14,11}, IfxPort_OutputIdx_alt5}
const IfxMsc_En_Out * | IfxMsc_En_Out_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_NUM_TARGETS][IFXMSC_PINMAP_EN_OUT_NUM_ITEMS]
const IfxMsc_Fcln_Out * | IfxMsc_Fcln_Out_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS]
const IfxMsc_Fclp_Out * | IfxMsc_Fclp_Out_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS]
const IfxMsc_Inj_In * | IfxMsc_Inj_In_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_INJ_IN_NUM_ITEMS]
const IfxMsc_Sdi_In * | IfxMsc_Sdi_In_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SDI_IN_NUM_ITEMS]
const IfxMsc_Son_Out * | IfxMsc_Son_Out_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SON_OUT_NUM_ITEMS]
const IfxMsc_Sop_Out * | IfxMsc_Sop_Out_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS]

Detailed Description

MSC I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxMsc_PinMap.c.

Variable Documentation

◆ IfxMsc0_EN0_P10_2_OUT

IfxMsc_En_Out IfxMsc0_EN0_P10_2_OUT = {&MODULE_MSC0, 0, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt4}

Definition at line 45 of file IfxMsc_PinMap.c.

◆ IfxMsc0_EN0_P10_3_OUT

IfxMsc_En_Out IfxMsc0_EN0_P10_3_OUT = {&MODULE_MSC0, 0, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt4}

Definition at line 46 of file IfxMsc_PinMap.c.

◆ IfxMsc0_EN0_P10_4_OUT

IfxMsc_En_Out IfxMsc0_EN0_P10_4_OUT = {&MODULE_MSC0, 0, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt5}

Definition at line 47 of file IfxMsc_PinMap.c.

◆ IfxMsc0_EN0_P11_11_OUT

IfxMsc_En_Out IfxMsc0_EN0_P11_11_OUT = {&MODULE_MSC0, 0, {&MODULE_P11,11}, IfxPort_OutputIdx_alt5}

Definition at line 48 of file IfxMsc_PinMap.c.

◆ IfxMsc0_EN0_P14_10_OUT

IfxMsc_En_Out IfxMsc0_EN0_P14_10_OUT = {&MODULE_MSC0, 0, {&MODULE_P14,10}, IfxPort_OutputIdx_alt3}

Definition at line 49 of file IfxMsc_PinMap.c.

◆ IfxMsc0_EN0_P15_5_OUT

IfxMsc_En_Out IfxMsc0_EN0_P15_5_OUT = {&MODULE_MSC0, 0, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt5}

Definition at line 50 of file IfxMsc_PinMap.c.

◆ IfxMsc0_EN1_P10_1_OUT

IfxMsc_En_Out IfxMsc0_EN1_P10_1_OUT = {&MODULE_MSC0, 1, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt4}

Definition at line 51 of file IfxMsc_PinMap.c.

◆ IfxMsc0_EN1_P11_2_OUT

IfxMsc_En_Out IfxMsc0_EN1_P11_2_OUT = {&MODULE_MSC0, 1, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt5}

Definition at line 52 of file IfxMsc_PinMap.c.

◆ IfxMsc0_EN1_P13_0_OUT

IfxMsc_En_Out IfxMsc0_EN1_P13_0_OUT = {&MODULE_MSC0, 1, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt4}

Definition at line 53 of file IfxMsc_PinMap.c.

◆ IfxMsc0_EN1_P14_9_OUT

IfxMsc_En_Out IfxMsc0_EN1_P14_9_OUT = {&MODULE_MSC0, 1, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt3}

Definition at line 54 of file IfxMsc_PinMap.c.

◆ IfxMsc0_EN1_P15_3_OUT

IfxMsc_En_Out IfxMsc0_EN1_P15_3_OUT = {&MODULE_MSC0, 1, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt5}

Definition at line 55 of file IfxMsc_PinMap.c.

◆ IfxMsc0_FCLN_P13_0_OUT

IfxMsc_Fcln_Out IfxMsc0_FCLN_P13_0_OUT = {&MODULE_MSC0, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt5}

Definition at line 63 of file IfxMsc_PinMap.c.

◆ IfxMsc0_FCLP_P11_6_OUT

IfxMsc_Fclp_Out IfxMsc0_FCLP_P11_6_OUT = {&MODULE_MSC0, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt5}

Definition at line 66 of file IfxMsc_PinMap.c.

◆ IfxMsc0_FCLP_P13_1_OUT

IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_1_OUT = {&MODULE_MSC0, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt5}

Definition at line 67 of file IfxMsc_PinMap.c.

◆ IfxMsc0_FCLP_P13_2_OUT

IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_2_OUT = {&MODULE_MSC0, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt4}

Definition at line 68 of file IfxMsc_PinMap.c.

◆ IfxMsc0_INJ0_P00_0_IN

IfxMsc_Inj_In IfxMsc0_INJ0_P00_0_IN = {&MODULE_MSC0, {&MODULE_P00, 0}, Ifx_RxSel_a}

Definition at line 71 of file IfxMsc_PinMap.c.

◆ IfxMsc0_INJ1_P10_5_IN

IfxMsc_Inj_In IfxMsc0_INJ1_P10_5_IN = {&MODULE_MSC0, {&MODULE_P10, 5}, Ifx_RxSel_b}

Definition at line 72 of file IfxMsc_PinMap.c.

◆ IfxMsc0_SDI0_P11_10_IN

IfxMsc_Sdi_In IfxMsc0_SDI0_P11_10_IN = {&MODULE_MSC0, {&MODULE_P11,10}, Ifx_RxSel_a}

Definition at line 77 of file IfxMsc_PinMap.c.

◆ IfxMsc0_SDI1_P10_2_IN

IfxMsc_Sdi_In IfxMsc0_SDI1_P10_2_IN = {&MODULE_MSC0, {&MODULE_P10, 2}, Ifx_RxSel_b}

Definition at line 78 of file IfxMsc_PinMap.c.

◆ IfxMsc0_SDI2_P14_3_IN

IfxMsc_Sdi_In IfxMsc0_SDI2_P14_3_IN = {&MODULE_MSC0, {&MODULE_P14, 3}, Ifx_RxSel_c}

Definition at line 79 of file IfxMsc_PinMap.c.

◆ IfxMsc0_SDI3_P11_3_IN

IfxMsc_Sdi_In IfxMsc0_SDI3_P11_3_IN = {&MODULE_MSC0, {&MODULE_P11, 3}, Ifx_RxSel_d}

Definition at line 80 of file IfxMsc_PinMap.c.

◆ IfxMsc0_SON_P13_2_OUT

IfxMsc_Son_Out IfxMsc0_SON_P13_2_OUT = {&MODULE_MSC0, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt5}

Definition at line 86 of file IfxMsc_PinMap.c.

◆ IfxMsc0_SOP_P11_9_OUT

IfxMsc_Sop_Out IfxMsc0_SOP_P11_9_OUT = {&MODULE_MSC0, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt5}

Definition at line 89 of file IfxMsc_PinMap.c.

◆ IfxMsc0_SOP_P13_3_OUT

IfxMsc_Sop_Out IfxMsc0_SOP_P13_3_OUT = {&MODULE_MSC0, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt5}

Definition at line 90 of file IfxMsc_PinMap.c.

◆ IfxMsc1_EN0_P23_4_OUT

IfxMsc_En_Out IfxMsc1_EN0_P23_4_OUT = {&MODULE_MSC1, 0, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt5}

Definition at line 56 of file IfxMsc_PinMap.c.

◆ IfxMsc1_EN0_P32_4_OUT

IfxMsc_En_Out IfxMsc1_EN0_P32_4_OUT = {&MODULE_MSC1, 0, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt5}

Definition at line 57 of file IfxMsc_PinMap.c.

◆ IfxMsc1_EN1_P23_5_OUT

IfxMsc_En_Out IfxMsc1_EN1_P23_5_OUT = {&MODULE_MSC1, 1, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt5}

Definition at line 58 of file IfxMsc_PinMap.c.

◆ IfxMsc1_FCLN_P22_0_OUT

IfxMsc_Fcln_Out IfxMsc1_FCLN_P22_0_OUT = {&MODULE_MSC1, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt5}

Definition at line 64 of file IfxMsc_PinMap.c.

◆ IfxMsc1_FCLP_P22_1_OUT

IfxMsc_Fclp_Out IfxMsc1_FCLP_P22_1_OUT = {&MODULE_MSC1, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt5}

Definition at line 69 of file IfxMsc_PinMap.c.

◆ IfxMsc1_INJ0_P23_3_IN

IfxMsc_Inj_In IfxMsc1_INJ0_P23_3_IN = {&MODULE_MSC1, {&MODULE_P23, 3}, Ifx_RxSel_a}

Definition at line 73 of file IfxMsc_PinMap.c.

◆ IfxMsc1_INJ1_P33_13_IN

IfxMsc_Inj_In IfxMsc1_INJ1_P33_13_IN = {&MODULE_MSC1, {&MODULE_P33,13}, Ifx_RxSel_b}

Definition at line 74 of file IfxMsc_PinMap.c.

◆ IfxMsc1_SDI0_P23_1_IN

IfxMsc_Sdi_In IfxMsc1_SDI0_P23_1_IN = {&MODULE_MSC1, {&MODULE_P23, 1}, Ifx_RxSel_a}

Definition at line 81 of file IfxMsc_PinMap.c.

◆ IfxMsc1_SDI1_P02_3_IN

IfxMsc_Sdi_In IfxMsc1_SDI1_P02_3_IN = {&MODULE_MSC1, {&MODULE_P02, 3}, Ifx_RxSel_b}

Definition at line 82 of file IfxMsc_PinMap.c.

◆ IfxMsc1_SDI2_P32_4_IN

IfxMsc_Sdi_In IfxMsc1_SDI2_P32_4_IN = {&MODULE_MSC1, {&MODULE_P32, 4}, Ifx_RxSel_c}

Definition at line 83 of file IfxMsc_PinMap.c.

◆ IfxMsc1_SON_P22_2_OUT

IfxMsc_Son_Out IfxMsc1_SON_P22_2_OUT = {&MODULE_MSC1, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt5}

Definition at line 87 of file IfxMsc_PinMap.c.

◆ IfxMsc1_SOP_P22_3_OUT

IfxMsc_Sop_Out IfxMsc1_SOP_P22_3_OUT = {&MODULE_MSC1, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt5}

Definition at line 91 of file IfxMsc_PinMap.c.

◆ IfxMsc2_EN0_P13_4_OUT

IfxMsc_En_Out IfxMsc2_EN0_P13_4_OUT = {&MODULE_MSC2, 0, {&MODULE_P13, 4}, IfxPort_OutputIdx_alt4}

Definition at line 59 of file IfxMsc_PinMap.c.

◆ IfxMsc2_EN0_P14_14_OUT

IfxMsc_En_Out IfxMsc2_EN0_P14_14_OUT = {&MODULE_MSC2, 0, {&MODULE_P14,14}, IfxPort_OutputIdx_alt4}

Definition at line 60 of file IfxMsc_PinMap.c.

◆ IfxMsc2_EN1_P14_13_OUT

IfxMsc_En_Out IfxMsc2_EN1_P14_13_OUT = {&MODULE_MSC2, 1, {&MODULE_P14,13}, IfxPort_OutputIdx_alt4}

Definition at line 61 of file IfxMsc_PinMap.c.

◆ IfxMsc2_EN2_P14_11_OUT

IfxMsc_En_Out IfxMsc2_EN2_P14_11_OUT = {&MODULE_MSC2, 2, {&MODULE_P14,11}, IfxPort_OutputIdx_alt4}

Definition at line 62 of file IfxMsc_PinMap.c.

◆ IfxMsc2_FCLN_P13_4_OUT

IfxMsc_Fcln_Out IfxMsc2_FCLN_P13_4_OUT = {&MODULE_MSC2, {&MODULE_P13, 4}, IfxPort_OutputIdx_alt5}

Definition at line 65 of file IfxMsc_PinMap.c.

◆ IfxMsc2_FCLP_P13_5_OUT

IfxMsc_Fclp_Out IfxMsc2_FCLP_P13_5_OUT = {&MODULE_MSC2, {&MODULE_P13, 5}, IfxPort_OutputIdx_alt5}

Definition at line 70 of file IfxMsc_PinMap.c.

◆ IfxMsc2_INJ0_P13_13_IN

IfxMsc_Inj_In IfxMsc2_INJ0_P13_13_IN = {&MODULE_MSC2, {&MODULE_P13,13}, Ifx_RxSel_a}

Definition at line 75 of file IfxMsc_PinMap.c.

◆ IfxMsc2_INJ1_P14_15_IN

IfxMsc_Inj_In IfxMsc2_INJ1_P14_15_IN = {&MODULE_MSC2, {&MODULE_P14,15}, Ifx_RxSel_b}

Definition at line 76 of file IfxMsc_PinMap.c.

◆ IfxMsc2_SDI0_P14_12_IN

IfxMsc_Sdi_In IfxMsc2_SDI0_P14_12_IN = {&MODULE_MSC2, {&MODULE_P14,12}, Ifx_RxSel_a}

Definition at line 84 of file IfxMsc_PinMap.c.

◆ IfxMsc2_SDI1_P14_11_IN

IfxMsc_Sdi_In IfxMsc2_SDI1_P14_11_IN = {&MODULE_MSC2, {&MODULE_P14,11}, Ifx_RxSel_b}

Definition at line 85 of file IfxMsc_PinMap.c.

◆ IfxMsc2_SON_P13_6_OUT

IfxMsc_Son_Out IfxMsc2_SON_P13_6_OUT = {&MODULE_MSC2, {&MODULE_P13, 6}, IfxPort_OutputIdx_alt5}

Definition at line 88 of file IfxMsc_PinMap.c.

◆ IfxMsc2_SOP_P13_7_OUT

IfxMsc_Sop_Out IfxMsc2_SOP_P13_7_OUT = {&MODULE_MSC2, {&MODULE_P13, 7}, IfxPort_OutputIdx_alt5}

Definition at line 92 of file IfxMsc_PinMap.c.

◆ IfxMsc2_SOP_P14_11_OUT

IfxMsc_Sop_Out IfxMsc2_SOP_P14_11_OUT = {&MODULE_MSC2, {&MODULE_P14,11}, IfxPort_OutputIdx_alt5}

Definition at line 93 of file IfxMsc_PinMap.c.

◆ IfxMsc_En_Out_pinTable

const IfxMsc_En_Out* IfxMsc_En_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_NUM_TARGETS][IFXMSC_PINMAP_EN_OUT_NUM_ITEMS]

Definition at line 96 of file IfxMsc_PinMap.c.

◆ IfxMsc_Fcln_Out_pinTable

const IfxMsc_Fcln_Out* IfxMsc_Fcln_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxMsc0_FCLN_P13_0_OUT
},
{
&IfxMsc1_FCLN_P22_0_OUT
},
{
&IfxMsc2_FCLN_P13_4_OUT
}
}
IfxMsc1_FCLN_P22_0_OUT
IfxMsc_Fcln_Out IfxMsc1_FCLN_P22_0_OUT
Definition: IfxMsc_PinMap.c:64
IfxMsc0_FCLN_P13_0_OUT
IfxMsc_Fcln_Out IfxMsc0_FCLN_P13_0_OUT
Definition: IfxMsc_PinMap.c:63
IfxMsc2_FCLN_P13_4_OUT
IfxMsc_Fcln_Out IfxMsc2_FCLN_P13_4_OUT
Definition: IfxMsc_PinMap.c:65

Definition at line 177 of file IfxMsc_PinMap.c.

◆ IfxMsc_Fclp_Out_pinTable

const IfxMsc_Fclp_Out* IfxMsc_Fclp_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxMsc0_FCLP_P11_6_OUT,
&IfxMsc0_FCLP_P13_1_OUT,
&IfxMsc0_FCLP_P13_2_OUT
},
{
&IfxMsc1_FCLP_P22_1_OUT,
NULL_PTR,
NULL_PTR
},
{
&IfxMsc2_FCLP_P13_5_OUT,
NULL_PTR,
NULL_PTR
}
}
IfxMsc0_FCLP_P13_1_OUT
IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_1_OUT
Definition: IfxMsc_PinMap.c:67
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxMsc1_FCLP_P22_1_OUT
IfxMsc_Fclp_Out IfxMsc1_FCLP_P22_1_OUT
Definition: IfxMsc_PinMap.c:69
IfxMsc0_FCLP_P13_2_OUT
IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_2_OUT
Definition: IfxMsc_PinMap.c:68
IfxMsc2_FCLP_P13_5_OUT
IfxMsc_Fclp_Out IfxMsc2_FCLP_P13_5_OUT
Definition: IfxMsc_PinMap.c:70
IfxMsc0_FCLP_P11_6_OUT
IfxMsc_Fclp_Out IfxMsc0_FCLP_P11_6_OUT
Definition: IfxMsc_PinMap.c:66

Definition at line 189 of file IfxMsc_PinMap.c.

◆ IfxMsc_Inj_In_pinTable

const IfxMsc_Inj_In* IfxMsc_Inj_In_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_INJ_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxMsc0_INJ0_P00_0_IN,
&IfxMsc0_INJ1_P10_5_IN
},
{
&IfxMsc1_INJ0_P23_3_IN,
&IfxMsc1_INJ1_P33_13_IN
},
{
&IfxMsc2_INJ0_P13_13_IN,
&IfxMsc2_INJ1_P14_15_IN
}
}
IfxMsc1_INJ0_P23_3_IN
IfxMsc_Inj_In IfxMsc1_INJ0_P23_3_IN
Definition: IfxMsc_PinMap.c:73
IfxMsc2_INJ0_P13_13_IN
IfxMsc_Inj_In IfxMsc2_INJ0_P13_13_IN
Definition: IfxMsc_PinMap.c:75
IfxMsc2_INJ1_P14_15_IN
IfxMsc_Inj_In IfxMsc2_INJ1_P14_15_IN
Definition: IfxMsc_PinMap.c:76
IfxMsc0_INJ1_P10_5_IN
IfxMsc_Inj_In IfxMsc0_INJ1_P10_5_IN
Definition: IfxMsc_PinMap.c:72
IfxMsc0_INJ0_P00_0_IN
IfxMsc_Inj_In IfxMsc0_INJ0_P00_0_IN
Definition: IfxMsc_PinMap.c:71
IfxMsc1_INJ1_P33_13_IN
IfxMsc_Inj_In IfxMsc1_INJ1_P33_13_IN
Definition: IfxMsc_PinMap.c:74

Definition at line 207 of file IfxMsc_PinMap.c.

◆ IfxMsc_Sdi_In_pinTable

const IfxMsc_Sdi_In* IfxMsc_Sdi_In_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SDI_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxMsc0_SDI0_P11_10_IN,
&IfxMsc0_SDI1_P10_2_IN,
&IfxMsc0_SDI2_P14_3_IN,
&IfxMsc0_SDI3_P11_3_IN
},
{
&IfxMsc1_SDI0_P23_1_IN,
&IfxMsc1_SDI1_P02_3_IN,
&IfxMsc1_SDI2_P32_4_IN,
NULL_PTR
},
{
&IfxMsc2_SDI0_P14_12_IN,
&IfxMsc2_SDI1_P14_11_IN,
NULL_PTR,
NULL_PTR
}
}
IfxMsc1_SDI0_P23_1_IN
IfxMsc_Sdi_In IfxMsc1_SDI0_P23_1_IN
Definition: IfxMsc_PinMap.c:81
IfxMsc1_SDI2_P32_4_IN
IfxMsc_Sdi_In IfxMsc1_SDI2_P32_4_IN
Definition: IfxMsc_PinMap.c:83
IfxMsc2_SDI1_P14_11_IN
IfxMsc_Sdi_In IfxMsc2_SDI1_P14_11_IN
Definition: IfxMsc_PinMap.c:85
IfxMsc2_SDI0_P14_12_IN
IfxMsc_Sdi_In IfxMsc2_SDI0_P14_12_IN
Definition: IfxMsc_PinMap.c:84
IfxMsc0_SDI2_P14_3_IN
IfxMsc_Sdi_In IfxMsc0_SDI2_P14_3_IN
Definition: IfxMsc_PinMap.c:79
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxMsc0_SDI3_P11_3_IN
IfxMsc_Sdi_In IfxMsc0_SDI3_P11_3_IN
Definition: IfxMsc_PinMap.c:80
IfxMsc0_SDI1_P10_2_IN
IfxMsc_Sdi_In IfxMsc0_SDI1_P10_2_IN
Definition: IfxMsc_PinMap.c:78
IfxMsc0_SDI0_P11_10_IN
IfxMsc_Sdi_In IfxMsc0_SDI0_P11_10_IN
Definition: IfxMsc_PinMap.c:77
IfxMsc1_SDI1_P02_3_IN
IfxMsc_Sdi_In IfxMsc1_SDI1_P02_3_IN
Definition: IfxMsc_PinMap.c:82

Definition at line 222 of file IfxMsc_PinMap.c.

◆ IfxMsc_Son_Out_pinTable

const IfxMsc_Son_Out* IfxMsc_Son_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SON_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxMsc0_SON_P13_2_OUT
},
{
&IfxMsc1_SON_P22_2_OUT
},
{
&IfxMsc2_SON_P13_6_OUT
}
}
IfxMsc2_SON_P13_6_OUT
IfxMsc_Son_Out IfxMsc2_SON_P13_6_OUT
Definition: IfxMsc_PinMap.c:88
IfxMsc0_SON_P13_2_OUT
IfxMsc_Son_Out IfxMsc0_SON_P13_2_OUT
Definition: IfxMsc_PinMap.c:86
IfxMsc1_SON_P22_2_OUT
IfxMsc_Son_Out IfxMsc1_SON_P22_2_OUT
Definition: IfxMsc_PinMap.c:87

Definition at line 243 of file IfxMsc_PinMap.c.

◆ IfxMsc_Sop_Out_pinTable

const IfxMsc_Sop_Out* IfxMsc_Sop_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxMsc0_SOP_P11_9_OUT,
&IfxMsc0_SOP_P13_3_OUT
},
{
&IfxMsc1_SOP_P22_3_OUT,
NULL_PTR
},
{
&IfxMsc2_SOP_P13_7_OUT,
&IfxMsc2_SOP_P14_11_OUT
}
}
IfxMsc2_SOP_P14_11_OUT
IfxMsc_Sop_Out IfxMsc2_SOP_P14_11_OUT
Definition: IfxMsc_PinMap.c:93
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxMsc1_SOP_P22_3_OUT
IfxMsc_Sop_Out IfxMsc1_SOP_P22_3_OUT
Definition: IfxMsc_PinMap.c:91
IfxMsc2_SOP_P13_7_OUT
IfxMsc_Sop_Out IfxMsc2_SOP_P13_7_OUT
Definition: IfxMsc_PinMap.c:92
IfxMsc0_SOP_P11_9_OUT
IfxMsc_Sop_Out IfxMsc0_SOP_P11_9_OUT
Definition: IfxMsc_PinMap.c:89
IfxMsc0_SOP_P13_3_OUT
IfxMsc_Sop_Out IfxMsc0_SOP_P13_3_OUT
Definition: IfxMsc_PinMap.c:90

Definition at line 255 of file IfxMsc_PinMap.c.


iLLD_TC38A: IfxMsc_PinMap.h File Reference

  • _PinMap
Data Structures | Macros | Variables
IfxMsc_PinMap.h File Reference
iLLD » MSC

MSC I/O map. More...

#include <IfxMsc_reg.h>
#include <_Impl/IfxMsc_cfg.h>
#include <Port/Std/IfxPort.h>
Include dependency graph for IfxMsc_PinMap.h:

Go to the source code of this file.

Data Structures

struct | IfxMsc_Inj_In
INJ pin mapping structure. More...
struct | IfxMsc_Sdi_In
SDI pin mapping structure. More...
struct | IfxMsc_En_Out
EN pin mapping structure. More...
struct | IfxMsc_Fclp_Out
FCLP pin mapping structure. More...
struct | IfxMsc_Fcln_Out
FCLN pin mapping structure. More...
struct | IfxMsc_Sop_Out
SOP pin mapping structure. More...
struct | IfxMsc_Son_Out
SON pin mapping structure. More...

Macros

#define | IFXMSC_PINMAP_NUM_MODULES 3
Table dimensions. More...
#define | IFXMSC_PINMAP_NUM_TARGETS 3
#define | IFXMSC_PINMAP_EN_OUT_NUM_ITEMS 6
#define | IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS 1
#define | IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS 3
#define | IFXMSC_PINMAP_INJ_IN_NUM_ITEMS 2
#define | IFXMSC_PINMAP_SDI_IN_NUM_ITEMS 4
#define | IFXMSC_PINMAP_SON_OUT_NUM_ITEMS 1
#define | IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS 2

Variables

IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P10_2_OUT
Chip Select. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P10_3_OUT
Chip Select. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P10_4_OUT
Chip Select. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P11_11_OUT
Chip Select. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P14_10_OUT
Chip Select. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P15_5_OUT
Chip Select. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P10_1_OUT
Chip Select. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P11_2_OUT
Chip Select. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P13_0_OUT
Chip Select. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P14_9_OUT
Chip Select. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P15_3_OUT
Chip Select. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc1_EN0_P23_4_OUT
Chip Select. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc1_EN0_P32_4_OUT
Chip Select. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc1_EN1_P23_5_OUT
Chip Select. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc2_EN0_P13_4_OUT
Chip Select. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc2_EN0_P14_14_OUT
Chip Select. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc2_EN1_P14_13_OUT
Chip Select. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc2_EN2_P14_11_OUT
Chip Select. More...
IFX_EXTERN IfxMsc_Fcln_Out IfxMsc0_FCLN_P13_0_OUT
Shift-clock inverted part of the differential signal. More...
IFX_EXTERN IfxMsc_Fcln_Out IfxMsc1_FCLN_P22_0_OUT
Shift-clock inverted part of the differential signal. More...
IFX_EXTERN IfxMsc_Fcln_Out IfxMsc2_FCLN_P13_4_OUT
Shift-clock inverted part of the differential signal. More...
IFX_EXTERN IfxMsc_Fclp_Out IfxMsc0_FCLP_P11_6_OUT
Shift-clock direct part of the differential signal. More...
IFX_EXTERN IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_1_OUT
Shift-clock direct part of the differential signal. More...
IFX_EXTERN IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_2_OUT
Shift-clock direct part of the differential signal. More...
IFX_EXTERN IfxMsc_Fclp_Out IfxMsc1_FCLP_P22_1_OUT
Shift-clock direct part of the differential signal. More...
IFX_EXTERN IfxMsc_Fclp_Out IfxMsc2_FCLP_P13_5_OUT
Shift-clock direct part of the differential signal. More...
IFX_EXTERN IfxMsc_Inj_In IfxMsc0_INJ0_P00_0_IN
Injection signal from port. More...
IFX_EXTERN IfxMsc_Inj_In IfxMsc0_INJ1_P10_5_IN
Injection signal from port. More...
IFX_EXTERN IfxMsc_Inj_In IfxMsc1_INJ0_P23_3_IN
Injection signal from port. More...
IFX_EXTERN IfxMsc_Inj_In IfxMsc1_INJ1_P33_13_IN
Injection signal from port. More...
IFX_EXTERN IfxMsc_Inj_In IfxMsc2_INJ0_P13_13_IN
Injection signal from port. More...
IFX_EXTERN IfxMsc_Inj_In IfxMsc2_INJ1_P14_15_IN
Injection signal from port. More...
IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI0_P11_10_IN
Upstream assynchronous input signal. More...
IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI1_P10_2_IN
Upstream assynchronous input signal. More...
IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI2_P14_3_IN
Upstream assynchronous input signal. More...
IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI3_P11_3_IN
Upstream assynchronous input signal. More...
IFX_EXTERN IfxMsc_Sdi_In IfxMsc1_SDI0_P23_1_IN
Upstream assynchronous input signal. More...
IFX_EXTERN IfxMsc_Sdi_In IfxMsc1_SDI1_P02_3_IN
Upstream assynchronous input signal. More...
IFX_EXTERN IfxMsc_Sdi_In IfxMsc1_SDI2_P32_4_IN
Upstream assynchronous input signal. More...
IFX_EXTERN IfxMsc_Sdi_In IfxMsc2_SDI0_P14_12_IN
Upstream assynchronous input signal. More...
IFX_EXTERN IfxMsc_Sdi_In IfxMsc2_SDI1_P14_11_IN
Upstream assynchronous input signal. More...
IFX_EXTERN IfxMsc_Son_Out IfxMsc0_SON_P13_2_OUT
Data output - inverted part of the differential signal. More...
IFX_EXTERN IfxMsc_Son_Out IfxMsc1_SON_P22_2_OUT
Data output - inverted part of the differential signal. More...
IFX_EXTERN IfxMsc_Son_Out IfxMsc2_SON_P13_6_OUT
Data output - inverted part of the differential signal. More...
IFX_EXTERN IfxMsc_Sop_Out IfxMsc0_SOP_P11_9_OUT
Data output - direct part of the differential signal. More...
IFX_EXTERN IfxMsc_Sop_Out IfxMsc0_SOP_P13_3_OUT
Data output - direct part of the differential signal. More...
IFX_EXTERN IfxMsc_Sop_Out IfxMsc1_SOP_P22_3_OUT
Data output - direct part of the differential signal. More...
IFX_EXTERN IfxMsc_Sop_Out IfxMsc2_SOP_P13_7_OUT
Data output - direct part of the differential signal. More...
IFX_EXTERN IfxMsc_Sop_Out IfxMsc2_SOP_P14_11_OUT
Data output - direct part of the differential signal. More...
IFX_EXTERN const IfxMsc_En_Out * | IfxMsc_En_Out_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_NUM_TARGETS][IFXMSC_PINMAP_EN_OUT_NUM_ITEMS]
IfxMsc_En_Out table. More...
IFX_EXTERN const IfxMsc_Fcln_Out * | IfxMsc_Fcln_Out_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS]
IfxMsc_Fcln_Out table. More...
IFX_EXTERN const IfxMsc_Fclp_Out * | IfxMsc_Fclp_Out_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS]
IfxMsc_Fclp_Out table. More...
IFX_EXTERN const IfxMsc_Inj_In * | IfxMsc_Inj_In_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_INJ_IN_NUM_ITEMS]
IfxMsc_Inj_In table. More...
IFX_EXTERN const IfxMsc_Sdi_In * | IfxMsc_Sdi_In_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SDI_IN_NUM_ITEMS]
IfxMsc_Sdi_In table. More...
IFX_EXTERN const IfxMsc_Son_Out * | IfxMsc_Son_Out_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SON_OUT_NUM_ITEMS]
IfxMsc_Son_Out table. More...
IFX_EXTERN const IfxMsc_Sop_Out * | IfxMsc_Sop_Out_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS]
IfxMsc_Sop_Out table. More...

Detailed Description

MSC I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxMsc_PinMap.h.


iLLD_TC38A: IfxMsc_Msc.h File Reference

  • Msc
  • Msc
Data Structures | Enumerations | Functions
IfxMsc_Msc.h File Reference
iLLD » MSC

MSC MSC details. More...

#include "Msc/Std/IfxMsc.h"
Include dependency graph for IfxMsc_Msc.h:

Go to the source code of this file.

Data Structures

struct | IfxMsc_Msc_en
struct | IfxMsc_Msc_fcln
struct | IfxMsc_Msc_fclp
struct | IfxMsc_Msc_inj0
struct | IfxMsc_Msc_inj1
struct | IfxMsc_Msc_sdi
struct | IfxMsc_Msc_son
struct | IfxMsc_Msc_sop
struct | IfxMsc_Msc_Abra
ABRA block Configuration Structure. More...
struct | IfxMsc_Msc_Clock
Clock configuration data Structure. More...
struct | IfxMsc_Msc_CommandExtensionConfig
Configuration Settings for CX mode. More...
struct | IfxMsc_Msc_DownstreamControlConfig
Downstream Control Configuration Structure. More...
struct | IfxMsc_Msc_DownstreamControlExtensionConfig
Downstream Control Extension Configuration Structure. More...
struct | IfxMsc_Msc_InterruptConfig
Interrupt Configuration Structure. More...
struct | IfxMsc_Msc_Io
MSC Pin Configuration Structure. More...
struct | IfxMsc_Msc_OutputControlConfig
Output Control Configuration Structure. More...
struct | IfxMsc_Msc_UpstreamStatusConfig
Upstream Control Configuration Structure. More...
struct | IfxMsc_Msc
MSC base address data Structure. More...
struct | IfxMsc_Msc_Config
MSC Module Configuration Structure. More...

Enumerations

enum IfxMsc_Msc_Target {
IfxMsc_Msc_Target_low = 0,
IfxMsc_Msc_Target_high = 1
}
Msc Instance Number. More...

Functions

IFX_EXTERN void | IfxMsc_Msc_deInitModule (IfxMsc_Msc *msc)
de-initialize MSC module More...
IFX_EXTERN void | IfxMsc_Msc_initModule (IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
initialize the MSC module More...
IFX_EXTERN void | IfxMsc_Msc_initModuleConfig (IfxMsc_Msc_Config *config, Ifx_MSC *msc)
initialize the MSC module configuration More...
IFX_EXTERN void | IfxMsc_Msc_initializeAbra (IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
initialize the ABRA block More...
IFX_EXTERN void | IfxMsc_Msc_initializeDataExtension (IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
initialize the MSC data extension block for 64bit operation More...
IFX_EXTERN void | IfxMsc_Msc_initializeCommandExtension (IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
IFX_EXTERN void | IfxMsc_Msc_sendCommand (IfxMsc_Msc *msc, uint32 command)
send downstream command More...
IFX_EXTERN void | IfxMsc_Msc_sendData (IfxMsc_Msc *msc, uint16 dataLow, uint16 dataHigh)
send complete downstream data, both high and low More...
IFX_EXTERN void | IfxMsc_Msc_sendDataExtension (IfxMsc_Msc *msc, uint32 data, uint32 dataExtension)
Send downstream data extension (64bit) More...
IFX_EXTERN void | IfxMsc_Msc_sendDataHigh (IfxMsc_Msc *msc, uint16 data)
send high downstream data More...
IFX_EXTERN void | IfxMsc_Msc_sendDataLow (IfxMsc_Msc *msc, uint16 data)
send high downstream data More...
IFX_EXTERN uint32 | IfxMsc_Msc_receiveData (IfxMsc_Msc *msc, uint8 upstreamIdx)
receive upstream data More...
IFX_EXTERN IfxMsc_Target | IfxMsc_Msc_getTarget (IfxMsc_Msc *msc, IfxMsc_Msc_Target target)
get the target during high and low phase More...
IFX_EXTERN void | IfxMsc_Msc_setCommandTarget (IfxMsc_Msc *msc, IfxMsc_Target enX)
set the command for target More...
IFX_EXTERN void | IfxMsc_Msc_setDataTarget (IfxMsc_Msc *msc, IfxMsc_Target enXHigh, IfxMsc_Target enXLow)
set the target data to be transmitted during low and high phase More...
IFX_INLINE void | IfxMsc_Msc_clearDataFrameInterrupt (IfxMsc_Msc *msc)
IFX_INLINE boolean | IfxMsc_Msc_getActiveDataFrameStatus (IfxMsc_Msc *msc)
IFX_INLINE boolean | IfxMsc_Msc_getDataFrameInterruptStatus (IfxMsc_Msc *msc)

Detailed Description

MSC MSC details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxMsc_Msc.h.

Function Documentation

◆ IfxMsc_Msc_clearDataFrameInterrupt()

IFX_INLINE void IfxMsc_Msc_clearDataFrameInterrupt ( IfxMsc_Msc * msc )
Parameters
msc pointer to the MSC module handle
Returns
None

Definition at line 612 of file IfxMsc_Msc.h.

◆ IfxMsc_Msc_getActiveDataFrameStatus()

IFX_INLINE boolean IfxMsc_Msc_getActiveDataFrameStatus ( IfxMsc_Msc * msc )
Parameters
msc pointer to the MSC module handle
Returns
status of the active data frame

Definition at line 618 of file IfxMsc_Msc.h.

◆ IfxMsc_Msc_getDataFrameInterruptStatus()

IFX_INLINE boolean IfxMsc_Msc_getDataFrameInterruptStatus ( IfxMsc_Msc * msc )
Parameters
msc pointer to the MSC module handle
Returns
status of the data frame interrupt

Definition at line 624 of file IfxMsc_Msc.h.


iLLD_TC38A: IfxMsc.h File Reference

  • Msc
  • Std
Data Structures | Enumerations | Functions
IfxMsc.h File Reference
iLLD » MSC

MSC basic functionality. More...

#include "_Impl/IfxMsc_cfg.h"
#include "Scu/Std/IfxScuCcu.h"
#include "Scu/Std/IfxScuWdt.h"
#include "_PinMap/IfxMsc_PinMap.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
Include dependency graph for IfxMsc.h:

Go to the source code of this file.

Data Structures

struct IfxMsc_CxModeCommand
64 bit commnd to be loaded first to DCE & then to DC for transmission. More...

Enumerations

enum IfxMsc_ActivePhaseSelection {
IfxMsc_ActivePhaseSelection_none = 0,
IfxMsc_ActivePhaseSelection_lowLevel = 1
}
Enable SRL/SRH Active Phase Selection Bit
Definition in Ifx_MSC.DSC.B.ENSELH and Ifx_MSC.DSC.B.ENSELL. More...
enum IfxMsc_AsynchronousBlock {
IfxMsc_AsynchronousBlock_bypassed = 0,
IfxMsc_AsynchronousBlock_noBypassed = 1
}
Asynchronous Block Configuration Register - Asynchronous Block Bypass
Definition in Ifx_MSC.ABC.B.ABB. More...
enum IfxMsc_ChipSelectActiveState {
IfxMsc_ChipSelectActiveState_high = 0,
IfxMsc_ChipSelectActiveState_low = 1
}
Output Control Register - Chip Selection Line Polarity
Definition in Ifx_MSC.OCR.B.CSLP. More...
enum IfxMsc_ClockSelect {
IfxMsc_ClockSelect_noClock = 0,
IfxMsc_ClockSelect_fper = 1
}
Asynchronous Block Configuration Register - Clock Select
Definition in Ifx_MSC.ABC.B.CLKSEL. More...
enum IfxMsc_CommandDataCommandRepetitionMode {
IfxMsc_CommandDataCommandRepetitionMode_disabled = 0,
IfxMsc_CommandDataCommandRepetitionMode_enabled = 1
}
Downstream Control Enhanced Register - Command-Data-Command in Data Repetition Mode
Definition in Ifx_MSC.DSCE.B.CDCM. More...
enum IfxMsc_CommandFrameInterrupt {
IfxMsc_CommandFrameInterrupt_disabled = 0,
IfxMsc_CommandFrameInterrupt_enabled = 1
}
Interrupt Control Register - Command Frame Interrupt Enable
Definition in Ifx_MSC.ICR.B.ECIE. More...
enum IfxMsc_CommandFrameInterruptNode {
IfxMsc_CommandFrameInterruptNode_SR0 = 0,
IfxMsc_CommandFrameInterruptNode_SR1,
IfxMsc_CommandFrameInterruptNode_SR2,
IfxMsc_CommandFrameInterruptNode_SR3
}
Interrupt Control Register - Command Frame Interrupt Node Pointer
Definition in Ifx_MSC.ICR.B.ECIP. More...
enum IfxMsc_CommandFrameLength {
IfxMsc_CommandFrameLength_0 = 0,
IfxMsc_CommandFrameLength_1 = 1,
IfxMsc_CommandFrameLength_2 = 2,
IfxMsc_CommandFrameLength_3,
IfxMsc_CommandFrameLength_4,
IfxMsc_CommandFrameLength_5,
IfxMsc_CommandFrameLength_6,
IfxMsc_CommandFrameLength_7,
IfxMsc_CommandFrameLength_8,
IfxMsc_CommandFrameLength_9,
IfxMsc_CommandFrameLength_10,
IfxMsc_CommandFrameLength_11,
IfxMsc_CommandFrameLength_12,
IfxMsc_CommandFrameLength_13,
IfxMsc_CommandFrameLength_14,
IfxMsc_CommandFrameLength_15,
IfxMsc_CommandFrameLength_16,
IfxMsc_CommandFrameLength_17 = 17,
IfxMsc_CommandFrameLength_18 = 18,
IfxMsc_CommandFrameLength_19,
IfxMsc_CommandFrameLength_20,
IfxMsc_CommandFrameLength_21,
IfxMsc_CommandFrameLength_22,
IfxMsc_CommandFrameLength_23,
IfxMsc_CommandFrameLength_24,
IfxMsc_CommandFrameLength_25,
IfxMsc_CommandFrameLength_26,
IfxMsc_CommandFrameLength_27,
IfxMsc_CommandFrameLength_28,
IfxMsc_CommandFrameLength_29,
IfxMsc_CommandFrameLength_30,
IfxMsc_CommandFrameLength_31,
IfxMsc_CommandFrameLength_32
}
Number of Bits shifted at command frames
Definition in Ifx_MSC.DSC.B.NBC. More...
enum IfxMsc_ControlFrameExtensionPassivePhaseLength {
IfxMsc_ControlFrameExtensionPassivePhaseLength_0 = 0,
IfxMsc_ControlFrameExtensionPassivePhaseLength_1,
IfxMsc_ControlFrameExtensionPassivePhaseLength_2,
IfxMsc_ControlFrameExtensionPassivePhaseLength_3,
IfxMsc_ControlFrameExtensionPassivePhaseLength_4,
IfxMsc_ControlFrameExtensionPassivePhaseLength_5,
IfxMsc_ControlFrameExtensionPassivePhaseLength_6,
IfxMsc_ControlFrameExtensionPassivePhaseLength_7,
IfxMsc_ControlFrameExtensionPassivePhaseLength_8,
IfxMsc_ControlFrameExtensionPassivePhaseLength_9,
IfxMsc_ControlFrameExtensionPassivePhaseLength_10,
IfxMsc_ControlFrameExtensionPassivePhaseLength_11,
IfxMsc_ControlFrameExtensionPassivePhaseLength_12,
IfxMsc_ControlFrameExtensionPassivePhaseLength_13,
IfxMsc_ControlFrameExtensionPassivePhaseLength_14,
IfxMsc_ControlFrameExtensionPassivePhaseLength_15,
IfxMsc_ControlFrameExtensionPassivePhaseLength_16,
IfxMsc_ControlFrameExtensionPassivePhaseLength_17,
IfxMsc_ControlFrameExtensionPassivePhaseLength_18,
IfxMsc_ControlFrameExtensionPassivePhaseLength_19,
IfxMsc_ControlFrameExtensionPassivePhaseLength_20,
IfxMsc_ControlFrameExtensionPassivePhaseLength_21,
IfxMsc_ControlFrameExtensionPassivePhaseLength_22,
IfxMsc_ControlFrameExtensionPassivePhaseLength_23,
IfxMsc_ControlFrameExtensionPassivePhaseLength_24,
IfxMsc_ControlFrameExtensionPassivePhaseLength_25,
IfxMsc_ControlFrameExtensionPassivePhaseLength_26,
IfxMsc_ControlFrameExtensionPassivePhaseLength_27,
IfxMsc_ControlFrameExtensionPassivePhaseLength_28,
IfxMsc_ControlFrameExtensionPassivePhaseLength_29,
IfxMsc_ControlFrameExtensionPassivePhaseLength_30,
IfxMsc_ControlFrameExtensionPassivePhaseLength_31,
IfxMsc_ControlFrameExtensionPassivePhaseLength_32,
IfxMsc_ControlFrameExtensionPassivePhaseLength_33,
IfxMsc_ControlFrameExtensionPassivePhaseLength_34,
IfxMsc_ControlFrameExtensionPassivePhaseLength_35,
IfxMsc_ControlFrameExtensionPassivePhaseLength_36,
IfxMsc_ControlFrameExtensionPassivePhaseLength_37,
IfxMsc_ControlFrameExtensionPassivePhaseLength_38,
IfxMsc_ControlFrameExtensionPassivePhaseLength_39,
IfxMsc_ControlFrameExtensionPassivePhaseLength_40,
IfxMsc_ControlFrameExtensionPassivePhaseLength_41,
IfxMsc_ControlFrameExtensionPassivePhaseLength_42,
IfxMsc_ControlFrameExtensionPassivePhaseLength_43,
IfxMsc_ControlFrameExtensionPassivePhaseLength_44,
IfxMsc_ControlFrameExtensionPassivePhaseLength_45,
IfxMsc_ControlFrameExtensionPassivePhaseLength_46,
IfxMsc_ControlFrameExtensionPassivePhaseLength_47,
IfxMsc_ControlFrameExtensionPassivePhaseLength_48,
IfxMsc_ControlFrameExtensionPassivePhaseLength_49,
IfxMsc_ControlFrameExtensionPassivePhaseLength_50,
IfxMsc_ControlFrameExtensionPassivePhaseLength_51,
IfxMsc_ControlFrameExtensionPassivePhaseLength_52,
IfxMsc_ControlFrameExtensionPassivePhaseLength_53,
IfxMsc_ControlFrameExtensionPassivePhaseLength_54,
IfxMsc_ControlFrameExtensionPassivePhaseLength_55,
IfxMsc_ControlFrameExtensionPassivePhaseLength_56,
IfxMsc_ControlFrameExtensionPassivePhaseLength_57,
IfxMsc_ControlFrameExtensionPassivePhaseLength_58,
IfxMsc_ControlFrameExtensionPassivePhaseLength_59,
IfxMsc_ControlFrameExtensionPassivePhaseLength_60,
IfxMsc_ControlFrameExtensionPassivePhaseLength_61,
IfxMsc_ControlFrameExtensionPassivePhaseLength_62,
IfxMsc_ControlFrameExtensionPassivePhaseLength_63,
IfxMsc_ControlFrameExtensionPassivePhaseLength_64,
IfxMsc_ControlFrameExtensionPassivePhaseLength_65,
IfxMsc_ControlFrameExtensionPassivePhaseLength_66,
IfxMsc_ControlFrameExtensionPassivePhaseLength_67,
IfxMsc_ControlFrameExtensionPassivePhaseLength_68,
IfxMsc_ControlFrameExtensionPassivePhaseLength_69,
IfxMsc_ControlFrameExtensionPassivePhaseLength_70,
IfxMsc_ControlFrameExtensionPassivePhaseLength_71,
IfxMsc_ControlFrameExtensionPassivePhaseLength_72,
IfxMsc_ControlFrameExtensionPassivePhaseLength_73,
IfxMsc_ControlFrameExtensionPassivePhaseLength_74,
IfxMsc_ControlFrameExtensionPassivePhaseLength_75,
IfxMsc_ControlFrameExtensionPassivePhaseLength_76,
IfxMsc_ControlFrameExtensionPassivePhaseLength_77,
IfxMsc_ControlFrameExtensionPassivePhaseLength_78,
IfxMsc_ControlFrameExtensionPassivePhaseLength_79,
IfxMsc_ControlFrameExtensionPassivePhaseLength_80,
IfxMsc_ControlFrameExtensionPassivePhaseLength_81,
IfxMsc_ControlFrameExtensionPassivePhaseLength_82,
IfxMsc_ControlFrameExtensionPassivePhaseLength_83,
IfxMsc_ControlFrameExtensionPassivePhaseLength_84,
IfxMsc_ControlFrameExtensionPassivePhaseLength_85,
IfxMsc_ControlFrameExtensionPassivePhaseLength_86,
IfxMsc_ControlFrameExtensionPassivePhaseLength_87,
IfxMsc_ControlFrameExtensionPassivePhaseLength_88,
IfxMsc_ControlFrameExtensionPassivePhaseLength_89,
IfxMsc_ControlFrameExtensionPassivePhaseLength_90,
IfxMsc_ControlFrameExtensionPassivePhaseLength_91,
IfxMsc_ControlFrameExtensionPassivePhaseLength_92,
IfxMsc_ControlFrameExtensionPassivePhaseLength_93,
IfxMsc_ControlFrameExtensionPassivePhaseLength_94,
IfxMsc_ControlFrameExtensionPassivePhaseLength_95,
IfxMsc_ControlFrameExtensionPassivePhaseLength_96,
IfxMsc_ControlFrameExtensionPassivePhaseLength_97,
IfxMsc_ControlFrameExtensionPassivePhaseLength_98,
IfxMsc_ControlFrameExtensionPassivePhaseLength_99,
IfxMsc_ControlFrameExtensionPassivePhaseLength_100,
IfxMsc_ControlFrameExtensionPassivePhaseLength_101,
IfxMsc_ControlFrameExtensionPassivePhaseLength_102,
IfxMsc_ControlFrameExtensionPassivePhaseLength_103,
IfxMsc_ControlFrameExtensionPassivePhaseLength_104,
IfxMsc_ControlFrameExtensionPassivePhaseLength_105,
IfxMsc_ControlFrameExtensionPassivePhaseLength_106,
IfxMsc_ControlFrameExtensionPassivePhaseLength_107,
IfxMsc_ControlFrameExtensionPassivePhaseLength_108,
IfxMsc_ControlFrameExtensionPassivePhaseLength_109,
IfxMsc_ControlFrameExtensionPassivePhaseLength_110,
IfxMsc_ControlFrameExtensionPassivePhaseLength_111,
IfxMsc_ControlFrameExtensionPassivePhaseLength_112,
IfxMsc_ControlFrameExtensionPassivePhaseLength_113,
IfxMsc_ControlFrameExtensionPassivePhaseLength_114,
IfxMsc_ControlFrameExtensionPassivePhaseLength_115,
IfxMsc_ControlFrameExtensionPassivePhaseLength_116,
IfxMsc_ControlFrameExtensionPassivePhaseLength_117,
IfxMsc_ControlFrameExtensionPassivePhaseLength_118,
IfxMsc_ControlFrameExtensionPassivePhaseLength_119,
IfxMsc_ControlFrameExtensionPassivePhaseLength_120,
IfxMsc_ControlFrameExtensionPassivePhaseLength_121,
IfxMsc_ControlFrameExtensionPassivePhaseLength_122,
IfxMsc_ControlFrameExtensionPassivePhaseLength_123,
IfxMsc_ControlFrameExtensionPassivePhaseLength_124,
IfxMsc_ControlFrameExtensionPassivePhaseLength_125,
IfxMsc_ControlFrameExtensionPassivePhaseLength_126,
IfxMsc_ControlFrameExtensionPassivePhaseLength_127
}
Downstream Timing Extension Register - Passive Phase Length at Control Frames Extension
Definition in Ifx_MSC.DSTE.B.PPCE. More...
enum IfxMsc_DataFrameExtensionPassivePhaseLength {
IfxMsc_DataFrameExtensionPassivePhaseLength_0 = 0,
IfxMsc_DataFrameExtensionPassivePhaseLength_1,
IfxMsc_DataFrameExtensionPassivePhaseLength_2,
IfxMsc_DataFrameExtensionPassivePhaseLength_3
}
Downstream Timing Extension Register - Passive Phase Length at Data Frames Extension
Definition in Ifx_MSC.DSTE.B.PPDE. More...
enum IfxMsc_DataFrameInterrupt {
IfxMsc_DataFrameInterrupt_disabled = 0,
IfxMsc_DataFrameInterrupt_atLastDataBit = 1,
IfxMsc_DataFrameInterrupt_atFirstDataBit = 2
}
Interrupt Control Register - Data Frame Interrupt Enable
Definition in Ifx_MSC.ICR.B.EDIE. More...
enum IfxMsc_DataFrameInterruptNode {
IfxMsc_DataFrameInterruptNode_SR0 = 0,
IfxMsc_DataFrameInterruptNode_SR1,
IfxMsc_DataFrameInterruptNode_SR2,
IfxMsc_DataFrameInterruptNode_SR3
}
Interrupt Control Register - Data Frame Interrupt Node Pointer
Definition in Ifx_MSC.ICR.B.EDIP. More...
enum IfxMsc_DataFrameLength {
IfxMsc_DataFrameLength_0 = 0,
IfxMsc_DataFrameLength_1 = 1,
IfxMsc_DataFrameLength_2 = 2,
IfxMsc_DataFrameLength_3,
IfxMsc_DataFrameLength_4,
IfxMsc_DataFrameLength_5,
IfxMsc_DataFrameLength_6,
IfxMsc_DataFrameLength_7,
IfxMsc_DataFrameLength_8,
IfxMsc_DataFrameLength_9,
IfxMsc_DataFrameLength_10,
IfxMsc_DataFrameLength_11,
IfxMsc_DataFrameLength_12,
IfxMsc_DataFrameLength_13,
IfxMsc_DataFrameLength_14,
IfxMsc_DataFrameLength_15,
IfxMsc_DataFrameLength_16
}
Number of SRx[] (x->SRL/SRH) Bits Shifted at Data Frames
Definition in Ifx_MSC.DSC.B.NDBH and Ifx_MSC.DSC.B.NDBL. More...
enum IfxMsc_DataFramePassivePhaseLength {
IfxMsc_DataFramePassivePhaseLength_2 = 2,
IfxMsc_DataFramePassivePhaseLength_3,
IfxMsc_DataFramePassivePhaseLength_4,
IfxMsc_DataFramePassivePhaseLength_5,
IfxMsc_DataFramePassivePhaseLength_6,
IfxMsc_DataFramePassivePhaseLength_7,
IfxMsc_DataFramePassivePhaseLength_8,
IfxMsc_DataFramePassivePhaseLength_9,
IfxMsc_DataFramePassivePhaseLength_10,
IfxMsc_DataFramePassivePhaseLength_11,
IfxMsc_DataFramePassivePhaseLength_12,
IfxMsc_DataFramePassivePhaseLength_13,
IfxMsc_DataFramePassivePhaseLength_14,
IfxMsc_DataFramePassivePhaseLength_15,
IfxMsc_DataFramePassivePhaseLength_16,
IfxMsc_DataFramePassivePhaseLength_17,
IfxMsc_DataFramePassivePhaseLength_18,
IfxMsc_DataFramePassivePhaseLength_19,
IfxMsc_DataFramePassivePhaseLength_20,
IfxMsc_DataFramePassivePhaseLength_21,
IfxMsc_DataFramePassivePhaseLength_22,
IfxMsc_DataFramePassivePhaseLength_23,
IfxMsc_DataFramePassivePhaseLength_24,
IfxMsc_DataFramePassivePhaseLength_25,
IfxMsc_DataFramePassivePhaseLength_26,
IfxMsc_DataFramePassivePhaseLength_27,
IfxMsc_DataFramePassivePhaseLength_28,
IfxMsc_DataFramePassivePhaseLength_29,
IfxMsc_DataFramePassivePhaseLength_30,
IfxMsc_DataFramePassivePhaseLength_31,
IfxMsc_DataFramePassivePhaseLength_32
}
Passive Phase Length at Data Frames
Definition in Ifx_MSC.DSC.B.PPD. More...
enum IfxMsc_DividerMode {
IfxMsc_DividerMode_normal = 1,
IfxMsc_DividerMode_fractional = 2
}
Divider mode. More...
enum IfxMsc_EmergencyStop {
IfxMsc_EmergencyStop_disabled = 0,
IfxMsc_EmergencyStop_enabled = 1
}
Emergency Stop Register - Emergency stop feature Enable or Disable - SRL and SRH
Definition in Ifx_MSC.ESR. More...
enum IfxMsc_Extension {
IfxMsc_Extension_disabled = 0,
IfxMsc_Extension_enabled = 1
}
Downstream Control Enhanced Register - Extension Enable
Definition in Ifx_MSC.DSCE.B.NDBLE. More...
enum IfxMsc_ExternalBitInjectionPosition {
IfxMsc_ExternalBitInjectionPosition_0 = 0,
IfxMsc_ExternalBitInjectionPosition_1,
IfxMsc_ExternalBitInjectionPosition_2,
IfxMsc_ExternalBitInjectionPosition_3,
IfxMsc_ExternalBitInjectionPosition_4,
IfxMsc_ExternalBitInjectionPosition_5,
IfxMsc_ExternalBitInjectionPosition_6,
IfxMsc_ExternalBitInjectionPosition_7,
IfxMsc_ExternalBitInjectionPosition_8,
IfxMsc_ExternalBitInjectionPosition_9,
IfxMsc_ExternalBitInjectionPosition_10,
IfxMsc_ExternalBitInjectionPosition_11,
IfxMsc_ExternalBitInjectionPosition_12,
IfxMsc_ExternalBitInjectionPosition_13,
IfxMsc_ExternalBitInjectionPosition_14,
IfxMsc_ExternalBitInjectionPosition_15,
IfxMsc_ExternalBitInjectionPosition_16,
IfxMsc_ExternalBitInjectionPosition_17,
IfxMsc_ExternalBitInjectionPosition_18,
IfxMsc_ExternalBitInjectionPosition_19,
IfxMsc_ExternalBitInjectionPosition_20,
IfxMsc_ExternalBitInjectionPosition_21,
IfxMsc_ExternalBitInjectionPosition_22,
IfxMsc_ExternalBitInjectionPosition_23,
IfxMsc_ExternalBitInjectionPosition_24,
IfxMsc_ExternalBitInjectionPosition_25,
IfxMsc_ExternalBitInjectionPosition_26,
IfxMsc_ExternalBitInjectionPosition_27,
IfxMsc_ExternalBitInjectionPosition_28,
IfxMsc_ExternalBitInjectionPosition_29,
IfxMsc_ExternalBitInjectionPosition_30,
IfxMsc_ExternalBitInjectionPosition_31,
IfxMsc_ExternalBitInjectionPosition_32,
IfxMsc_ExternalBitInjectionPosition_33,
IfxMsc_ExternalBitInjectionPosition_34,
IfxMsc_ExternalBitInjectionPosition_35,
IfxMsc_ExternalBitInjectionPosition_36,
IfxMsc_ExternalBitInjectionPosition_37,
IfxMsc_ExternalBitInjectionPosition_38,
IfxMsc_ExternalBitInjectionPosition_39,
IfxMsc_ExternalBitInjectionPosition_40,
IfxMsc_ExternalBitInjectionPosition_41,
IfxMsc_ExternalBitInjectionPosition_42,
IfxMsc_ExternalBitInjectionPosition_43,
IfxMsc_ExternalBitInjectionPosition_44,
IfxMsc_ExternalBitInjectionPosition_45,
IfxMsc_ExternalBitInjectionPosition_46,
IfxMsc_ExternalBitInjectionPosition_47,
IfxMsc_ExternalBitInjectionPosition_48,
IfxMsc_ExternalBitInjectionPosition_49,
IfxMsc_ExternalBitInjectionPosition_50,
IfxMsc_ExternalBitInjectionPosition_51,
IfxMsc_ExternalBitInjectionPosition_52,
IfxMsc_ExternalBitInjectionPosition_53,
IfxMsc_ExternalBitInjectionPosition_54,
IfxMsc_ExternalBitInjectionPosition_55,
IfxMsc_ExternalBitInjectionPosition_56,
IfxMsc_ExternalBitInjectionPosition_57,
IfxMsc_ExternalBitInjectionPosition_58,
IfxMsc_ExternalBitInjectionPosition_59,
IfxMsc_ExternalBitInjectionPosition_60,
IfxMsc_ExternalBitInjectionPosition_61,
IfxMsc_ExternalBitInjectionPosition_62,
IfxMsc_ExternalBitInjectionPosition_63
}
Downstream Control Enhanced Register - Injection Position of the Pin 0 and 1 Signal
Definition in Ifx_MSC.DSCE.B.INJPOSP0 and Ifx_MSC.DSCE.B.INJPOSP1. More...
enum IfxMsc_ExternalSignalInjection {
IfxMsc_ExternalSignalInjection_disabled = 0,
IfxMsc_ExternalSignalInjection_enabled = 1
}
Downstream Control Enhanced Register - Injection Enable of the Pin 0 and 1 Signal
Definition in Ifx_MSC.DSCE.B.INJENP0 and Ifx_MSC.DSCE.B.INJENP1. More...
enum IfxMsc_FastMode {
IfxMsc_FastMode_disabled = 0,
IfxMsc_FastMode_enabled = 1
}
Enum for enable and disable Fast Mode. More...
enum IfxMsc_FclClockControlEnabled {
IfxMsc_FclClockControlEnabled_activePhaseOnly = 0,
IfxMsc_FclClockControlEnabled_always = 1
}
Output Control Register - Clock Control
Definition in Ifx_MSC.OCR.B.CLKCTRL. More...
enum IfxMsc_FclLinePolarity {
IfxMsc_FclLinePolarity_nonInverted = 0,
IfxMsc_FclLinePolarity_inverted = 1
}
Output Control Register - FCLP Line Polarity
Definition in Ifx_MSC.OCR.B.CLP. More...
enum IfxMsc_HardwareClock {
IfxMsc_HardwareClock_disabled = 0,
IfxMsc_HardwareClock_enabled = 1
}
Enable hardware clock control. More...
enum IfxMsc_InterruptServiceRequest {
IfxMsc_InterruptServiceRequest_0 = 0,
IfxMsc_InterruptServiceRequest_1,
IfxMsc_InterruptServiceRequest_2,
IfxMsc_InterruptServiceRequest_3,
IfxMsc_InterruptServiceRequest_4
}
Interrupt Service Request. More...
enum IfxMsc_ModuleSuspendRequestBit {
IfxMsc_ModuleSuspendRequestBit_noSuspend = 0,
IfxMsc_ModuleSuspendRequestBit_hardSuspend = 1,
IfxMsc_ModuleSuspendRequestBit_softSuspend = 2
}
OCDS Control and Status - OCDS Suspend Control Definition in Ifx_MSC.OCS.B.SUS. More...
enum IfxMsc_MsbBitDataExtension {
IfxMsc_MsbBitDataExtension_notPresent = 0,
IfxMsc_MsbBitDataExtension_present = 1
}
Downstream Control Enhanced Register - Number of SRL/SRH Bits Shifted at Data Frames Extension (NDBL/NDBH)
Definition in Ifx_MSC.DSCE.B.NDBLE and Ifx_MSC.DSCE.B.NDBHE. More...
enum IfxMsc_NDividerAbra {
IfxMsc_NDividerAbra_1 = 0,
IfxMsc_NDividerAbra_2,
IfxMsc_NDividerAbra_3,
IfxMsc_NDividerAbra_4,
IfxMsc_NDividerAbra_5,
IfxMsc_NDividerAbra_6,
IfxMsc_NDividerAbra_7,
IfxMsc_NDividerAbra_8
}
Asynchronous Block Configuration Register - N Divider ABRA
Definition in Ifx_MSC.ABC.B.NDA. More...
enum IfxMsc_NDividerDownstream {
IfxMsc_NDividerDownstream_1 = 0,
IfxMsc_NDividerDownstream_2,
IfxMsc_NDividerDownstream_3,
IfxMsc_NDividerDownstream_4,
IfxMsc_NDividerDownstream_5,
IfxMsc_NDividerDownstream_6,
IfxMsc_NDividerDownstream_7,
IfxMsc_NDividerDownstream_8,
IfxMsc_NDividerDownstream_9,
IfxMsc_NDividerDownstream_10,
IfxMsc_NDividerDownstream_11,
IfxMsc_NDividerDownstream_12,
IfxMsc_NDividerDownstream_13,
IfxMsc_NDividerDownstream_14,
IfxMsc_NDividerDownstream_15,
IfxMsc_NDividerDownstream_16
}
Downstream Timing Extension Register - N Divider Downstream
Definition in Ifx_MSC.DSTE.B.NDD. More...
enum IfxMsc_OverflowInterrupt {
IfxMsc_OverflowInterrupt_disabled = 0,
IfxMsc_OverflowInterrupt_enabled = 1
}
Asynchronous Block Configuration Register - Overflow Interrupt Enable
Definition in Ifx_MSC.ABC.B.OIE. More...
enum IfxMsc_OverflowInterruptNode {
IfxMsc_OverflowInterruptNode_SR0 = 0,
IfxMsc_OverflowInterruptNode_SR1,
IfxMsc_OverflowInterruptNode_SR2,
IfxMsc_OverflowInterruptNode_SR3,
IfxMsc_OverflowInterruptNode_SR4
}
Asynchronous Block Configuration Register - Overflow Interrupt Node Pointer
Definition in Ifx_MSC.ABC.B.OIP. More...
enum IfxMsc_Parity {
IfxMsc_Parity_even = 0,
IfxMsc_Parity_odd = 1
}
Parity Mode
Definition in Ifx_MSC.USR.B.PCT. More...
enum IfxMsc_PassiveTimeFrameCount {
IfxMsc_PassiveTimeFrameCount_0 = 0,
IfxMsc_PassiveTimeFrameCount_1 = 1,
IfxMsc_PassiveTimeFrameCount_2,
IfxMsc_PassiveTimeFrameCount_3,
IfxMsc_PassiveTimeFrameCount_4,
IfxMsc_PassiveTimeFrameCount_5,
IfxMsc_PassiveTimeFrameCount_6,
IfxMsc_PassiveTimeFrameCount_7,
IfxMsc_PassiveTimeFrameCount_8,
IfxMsc_PassiveTimeFrameCount_9,
IfxMsc_PassiveTimeFrameCount_10,
IfxMsc_PassiveTimeFrameCount_11,
IfxMsc_PassiveTimeFrameCount_12,
IfxMsc_PassiveTimeFrameCount_13,
IfxMsc_PassiveTimeFrameCount_14,
IfxMsc_PassiveTimeFrameCount_15
}
Downstream Status Register - Number Of Passive Time Frames
Definition in Ifx_MSC.DSS.B.NPTF. More...
enum IfxMsc_ReceiveDataInterrupt {
IfxMsc_ReceiveDataInterrupt_disabled = 0,
IfxMsc_ReceiveDataInterrupt_onDataReceive = 1,
IfxMsc_ReceiveDataInterrupt_onRdieSet = 2,
IfxMsc_ReceiveDataInterrupt_onDataReceiveInUd3 = 3
}
Interrupt Control Register - Receive Data Interrupt Enable
Definition in Ifx_MSC.ICR.B.RDIE. More...
enum IfxMsc_ReceiveDataInterruptNode {
IfxMsc_ReceiveDataInterruptNode_SR0 = 0,
IfxMsc_ReceiveDataInterruptNode_SR1,
IfxMsc_ReceiveDataInterruptNode_SR2,
IfxMsc_ReceiveDataInterruptNode_SR3
}
Interrupt Control Register - Receive Data Interrupt Pointer
Definition in Ifx_MSC.ICR.B.RDIP. More...
enum IfxMsc_SdiLinePolarity {
IfxMsc_SdiLinePolarity_likeSi = 0,
IfxMsc_SdiLinePolarity_invertedSi = 1
}
Output Control Register - SDI Line Polarity
Definition in Ifx_MSC.OCR.B.ILP. More...
enum IfxMsc_SerialDataInput {
IfxMsc_SerialDataInput_0 = 0,
IfxMsc_SerialDataInput_1,
IfxMsc_SerialDataInput_2,
IfxMsc_SerialDataInput_3,
IfxMsc_SerialDataInput_4,
IfxMsc_SerialDataInput_5,
IfxMsc_SerialDataInput_6,
IfxMsc_SerialDataInput_7
}
Output Control Register - Serial Data Input Selection
Definition in Ifx_MSC.OCR.B.SDISEL. More...
enum IfxMsc_ServiceRequestDelay {
IfxMsc_ServiceRequestDelay_noDelay = 0,
IfxMsc_ServiceRequestDelay_1bit = 1
}
Service Request Delay
Definition in Ifx_MSC.USR.B.SRDC. More...
enum IfxMsc_ShiftClockPhaseDuration {
IfxMsc_ShiftClockPhaseDuration_1 = 0,
IfxMsc_ShiftClockPhaseDuration_2,
IfxMsc_ShiftClockPhaseDuration_3,
IfxMsc_ShiftClockPhaseDuration_4,
IfxMsc_ShiftClockPhaseDuration_5,
IfxMsc_ShiftClockPhaseDuration_6,
IfxMsc_ShiftClockPhaseDuration_7,
IfxMsc_ShiftClockPhaseDuration_8,
IfxMsc_ShiftClockPhaseDuration_9,
IfxMsc_ShiftClockPhaseDuration_10,
IfxMsc_ShiftClockPhaseDuration_11,
IfxMsc_ShiftClockPhaseDuration_12,
IfxMsc_ShiftClockPhaseDuration_13,
IfxMsc_ShiftClockPhaseDuration_14,
IfxMsc_ShiftClockPhaseDuration_15,
IfxMsc_ShiftClockPhaseDuration_16
}
Asynchronous Block Configuration Register - Duration of the Low/High Phase of the Shift Clock
Definition in Ifx_MSC.ABC.B.LOW and Ifx_MSC.ABC.B.HIGH. More...
enum IfxMsc_SleepMode {
IfxMsc_SleepMode_enable = 0,
IfxMsc_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_MSC.CLC.B.EDIS. More...
enum IfxMsc_SoLinePolarity {
IfxMsc_SoLinePolarity_nonInverted = 0,
IfxMsc_SoLinePolarity_inverted = 1
}
Output Control Register - SOP Line Polarity
Definition in Ifx_MSC.OCR.B.SLP. More...
enum IfxMsc_Source {
IfxMsc_Source_downstreamDataRegister = 0,
IfxMsc_Source_alternateInputLine = 2,
IfxMsc_Source_alternateInputLineInverted = 3
}
Downstream Select Data Source Low Register - Select Source for - SRL and SRHNumber Of Passive Time Frames
Definition in Ifx_MSC.DSDSL and Ifx_MSC.DSDSH. More...
enum IfxMsc_SuspendMode {
IfxMsc_SuspendMode_none = 0,
IfxMsc_SuspendMode_hard = 1,
IfxMsc_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxMsc_Target {
IfxMsc_Target_en0 = 0,
IfxMsc_Target_en1,
IfxMsc_Target_en2,
IfxMsc_Target_en3
}
Msc Targets - use as chip enable selection for ENH, ENL and ENC. More...
enum IfxMsc_TimeFrameInterrupt {
IfxMsc_TimeFrameInterrupt_disabled = 0,
IfxMsc_TimeFrameInterrupt_enabled = 1
}
Interrupt Control Register - Time Frame Interrupt Enable
Definition in Ifx_MSC.ICR.B.TFIE. More...
enum IfxMsc_TimeFrameInterruptNode {
IfxMsc_TimeFrameInterruptNode_SR0 = 0,
IfxMsc_TimeFrameInterruptNode_SR1,
IfxMsc_TimeFrameInterruptNode_SR2,
IfxMsc_TimeFrameInterruptNode_SR3
}
Interrupt Control Register - Time Frame Interrupt Pointer
Definition in Ifx_MSC.ICR.B.TFIP. More...
enum IfxMsc_TransmissionMode {
IfxMsc_TransmissionMode_triggered = 0,
IfxMsc_TransmissionMode_dataRepetition = 1
}
Downstream Channel Transmission Mode
Definition in Ifx_MSC.DSC.B.TM. More...
enum IfxMsc_UnderflowInterrupt {
IfxMsc_UnderflowInterrupt_disabled = 0,
IfxMsc_UnderflowInterrupt_enabled = 1
}
Asynchronous Block Configuration Register - Underflow Interrupt Enable
Definition in Ifx_MSC.ABC.B.UIE. More...
enum IfxMsc_UnderflowInterruptNode {
IfxMsc_UnderflowInterruptNode_SR0 = 0,
IfxMsc_UnderflowInterruptNode_SR1,
IfxMsc_UnderflowInterruptNode_SR2,
IfxMsc_UnderflowInterruptNode_SR3,
IfxMsc_UnderflowInterruptNode_SR4
}
Asynchronous Block Configuration Register - Underflow Interrupt Node Pointer
Definition in Ifx_MSC.ABC.B.UIP. More...
enum IfxMsc_UpstreamChannelFrameType {
IfxMsc_UpstreamChannelFrameType_12bit = 0,
IfxMsc_UpstreamChannelFrameType_16bit = 1
}
Channel Frame Type
Definition in Ifx_MSC.USR.B.UFT. More...
enum IfxMsc_UpstreamChannelReceivingRate {
IfxMsc_UpstreamChannelReceivingRate_disabled = 0,
IfxMsc_UpstreamChannelReceivingRate_4 = 1,
IfxMsc_UpstreamChannelReceivingRate_8 = 2,
IfxMsc_UpstreamChannelReceivingRate_16 = 3,
IfxMsc_UpstreamChannelReceivingRate_32 = 4,
IfxMsc_UpstreamChannelReceivingRate_64 = 5,
IfxMsc_UpstreamChannelReceivingRate_128 = 6,
IfxMsc_UpstreamChannelReceivingRate_256 = 7
}
Upstream Receiving Rate
Definition in Ifx_MSC.USR.B.URR. More...
enum IfxMsc_UpstreamTimeoutInterrupt {
IfxMsc_UpstreamTimeoutInterrupt_disabled = 0,
IfxMsc_UpstreamTimeoutInterrupt_enabled = 1
}
Upstream Control Enhanced Register 1 - Upstream Timeout Interrupt Enable
Definition in Ifx_MSC.USCE.B.USTOEN. More...
enum IfxMsc_UpstreamTimeoutInterruptNode {
IfxMsc_UpstreamTimeoutInterruptNode_SR0 = 0,
IfxMsc_UpstreamTimeoutInterruptNode_SR1,
IfxMsc_UpstreamTimeoutInterruptNode_SR2,
IfxMsc_UpstreamTimeoutInterruptNode_SR3,
IfxMsc_UpstreamTimeoutInterruptNode_SR4
}
Upstream Control Enhanced Register 1 - Upstream Timeout Interrupt Node Pointer
Definition in Ifx_MSC.USCE.B.USTOIP. More...
enum IfxMsc_UpstreamTimeoutPrescaler {
IfxMsc_UpstreamTimeoutPrescaler_1 = 0,
IfxMsc_UpstreamTimeoutPrescaler_2 = 1,
IfxMsc_UpstreamTimeoutPrescaler_4 = 2,
IfxMsc_UpstreamTimeoutPrescaler_8 = 3,
IfxMsc_UpstreamTimeoutPrescaler_16 = 4,
IfxMsc_UpstreamTimeoutPrescaler_32 = 5,
IfxMsc_UpstreamTimeoutPrescaler_64 = 6,
IfxMsc_UpstreamTimeoutPrescaler_128 = 7,
IfxMsc_UpstreamTimeoutPrescaler_256 = 8,
IfxMsc_UpstreamTimeoutPrescaler_512 = 9,
IfxMsc_UpstreamTimeoutPrescaler_1024 = 10,
IfxMsc_UpstreamTimeoutPrescaler_2048 = 11,
IfxMsc_UpstreamTimeoutPrescaler_4096 = 12,
IfxMsc_UpstreamTimeoutPrescaler_8192 = 13,
IfxMsc_UpstreamTimeoutPrescaler_16384 = 14,
IfxMsc_UpstreamTimeoutPrescaler_32768 = 15
}
Upstream Control Enhanced Register 1 - Upstream Timeout Prescaler
Definition in Ifx_MSC.USCE.B.USTOPRE. More...
enum IfxMsc_UpstreamTimeoutValue {
IfxMsc_UpstreamTimeoutValue_1 = 0,
IfxMsc_UpstreamTimeoutValue_2,
IfxMsc_UpstreamTimeoutValue_3,
IfxMsc_UpstreamTimeoutValue_4,
IfxMsc_UpstreamTimeoutValue_5,
IfxMsc_UpstreamTimeoutValue_6,
IfxMsc_UpstreamTimeoutValue_7,
IfxMsc_UpstreamTimeoutValue_8,
IfxMsc_UpstreamTimeoutValue_9,
IfxMsc_UpstreamTimeoutValue_10,
IfxMsc_UpstreamTimeoutValue_11,
IfxMsc_UpstreamTimeoutValue_12,
IfxMsc_UpstreamTimeoutValue_13,
IfxMsc_UpstreamTimeoutValue_14,
IfxMsc_UpstreamTimeoutValue_15,
IfxMsc_UpstreamTimeoutValue_16
}
Upstream Control Enhanced Register 1 - Upstream Timeout Value
Definition in Ifx_MSC.USCE.B.USTOVAL. More...

Functions

IFX_INLINE void | IfxMsc_clearAbraOverflowFlag (Ifx_MSC *msc)
Clear ABRA overflow flag. More...
IFX_INLINE void | IfxMsc_clearAbraUnderflowFlag (Ifx_MSC *msc)
Clear ABRA underflow flag. More...
IFX_INLINE void | IfxMsc_clearUpstreamTimeout (Ifx_MSC *msc)
Clear Upstream timeout. More...
IFX_INLINE void | IfxMsc_clearUpstreamValidFlag (Ifx_MSC *msc, uint8 upstreamIdx)
Clear the valid flag. More...
IFX_INLINE boolean | IfxMsc_getUpstreamValidFlag (Ifx_MSC *msc, uint8 upstreamIdx)
Get the status of the valid flag. More...
IFX_INLINE void | IfxMsc_setCommandTarget (Ifx_MSC *msc, IfxMsc_Target enX)
Select the target for command phase. More...
IFX_INLINE void | IfxMsc_setDataHighTarget (Ifx_MSC *msc, IfxMsc_Target enX)
Select the target for data high phase. More...
IFX_INLINE void | IfxMsc_setDataLowTarget (Ifx_MSC *msc, IfxMsc_Target enX)
Select the target for data low phase. More...
IFX_INLINE uint16 | IfxMsc_getData (Ifx_MSC *msc, uint8 upstreamIdx)
Get the upstream data from upstream data register. More...
IFX_INLINE IfxMsc_Target | IfxMsc_getDataHighTarget (Ifx_MSC *msc)
Get the selected target during high phase. More...
IFX_INLINE IfxMsc_Target | IfxMsc_getDataLowTarget (Ifx_MSC *msc)
Get the selected target during low phase. More...
IFX_EXTERN void | IfxMsc_disableModule (Ifx_MSC *msc)
Disable MSC kernel. More...
IFX_EXTERN void | IfxMsc_enableModule (Ifx_MSC *msc)
Enable MSC kernel. More...
IFX_EXTERN void | IfxMsc_clearReset (Ifx_MSC *msc)
Clear reset bit of MSC kernel. More...
IFX_EXTERN void | IfxMsc_resetModule (Ifx_MSC *msc)
Reset MSC kernel. More...
IFX_EXTERN uint32 | IfxMsc_downstreamAbraBaudCalculator (uint32 baud)
Get the NDD value for the supplied baud rate when when ABRA block is enabled. More...
IFX_EXTERN uint64 | IfxMsc_upstreamFractionalBaudCalculator (Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is fractional. More...
IFX_EXTERN uint32 | IfxMsc_upstreamNormalBaudCalculator (Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is normal. More...
IFX_INLINE void | IfxMsc_initEnPin (const IfxMsc_En_Out *en, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a EN output. More...
IFX_INLINE void | IfxMsc_initFclnPin (const IfxMsc_Fcln_Out *fcln, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a FCLN output. More...
IFX_INLINE void | IfxMsc_initFclpPin (const IfxMsc_Fclp_Out *fclp, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a FCLP output. More...
IFX_INLINE void | IfxMsc_initInjPin (const IfxMsc_Inj_In *inj, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a INJ input. More...
IFX_INLINE void | IfxMsc_initSdiPin (const IfxMsc_Sdi_In *sdi, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a SDI input. More...
IFX_INLINE void | IfxMsc_initSonPin (const IfxMsc_Son_Out *son, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a SON output. More...
IFX_INLINE void | IfxMsc_initSopPin (const IfxMsc_Sop_Out *sop, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a SOP output. More...
IFX_EXTERN Ifx_MSC * | IfxMsc_getAddress (IfxMsc_Index msc)
IFX_EXTERN IfxMsc_Index | IfxMsc_getIndex (Ifx_MSC *msc)
API to get the resource index of the MSC specified. More...
IFX_INLINE void | IfxMsc_clearRecieveDataInterruptFlag (Ifx_MSC *msc)
Clears The Recieve Data Interrupt Flag. More...
IFX_INLINE void | IfxMsc_clearValidbit (Ifx_MSC *msc, uint8 upstreamIdx)
Clears the Valid bit. More...
IFX_INLINE void | IfxMsc_disableUpstreamTimeoutInterrupt (Ifx_MSC *msc)
Disables the Upstream Timeout Interrupt. More...
IFX_INLINE void | IfxMsc_enableUpstreamTimeoutInterrupt (Ifx_MSC *msc)
Enables the Upstream Timeout Interrupt. More...
IFX_INLINE boolean | IfxMsc_getAsyncClockBypass (Ifx_MSC *msc)
Returns the value of Asynchronous clock Bypass bit. More...
IFX_INLINE boolean | IfxMsc_getDownStreamExtension (Ifx_MSC *msc)
Returns the value of Down stream extension enable bit. More...
IFX_INLINE boolean | IfxMsc_getRecieveDataInterruptFlag (Ifx_MSC *msc)
Returns the Recieve DataInterrupt Flag Status. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxMsc_getSrcPointer (Ifx_MSC *msc, IfxMsc_InterruptServiceRequest intRequest)
Returns the Src pointer for the selected MSC interrupt node. More...
IFX_INLINE uint32 | IfxMsc_getUpstreamData (Ifx_MSC *msc, uint8 upstreamIdx)
Returns the Upstream Data. More...
IFX_INLINE boolean | IfxMsc_getUpstreamParityErrorFlag (Ifx_MSC *msc, uint8 upstreamIdx)
Returns the Upstream Parity Error Flag Status. More...
IFX_INLINE boolean | IfxMsc_getUpstreamTimeoutFlag (Ifx_MSC *msc)
Returns Upstream Timeout Flag Status. More...
IFX_INLINE boolean | IfxMsc_isModuleSuspended (Ifx_MSC *msc)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxMsc_setAsyncClockBypass (Ifx_MSC *msc, boolean value)
Set or reset the Asynchronous clock bypass bit. More...
IFX_INLINE void | IfxMsc_setDownStreamData (Ifx_MSC *msc, uint32 data)
Sets the Down stream data. More...
IFX_INLINE void | IfxMsc_setDownStreamExtension (Ifx_MSC *msc, boolean value)
Set or reset the Down stream extension enable bit. More...
IFX_INLINE void | IfxMsc_setDownStreamExtensionData (Ifx_MSC *msc, uint32 data)
Sets the Down stream Extension data. More...
IFX_INLINE void | IfxMsc_setFastMode (Ifx_MSC *msc, boolean value)
Set or reset the Fast Mode bit. Select the correct NDD value when using Fast mode. More...
IFX_INLINE void | IfxMsc_setFractionalDividerStep (Ifx_MSC *msc, uint16 value)
Sets The Fractional Divider Step. More...
IFX_INLINE void | IfxMsc_setNdividerDownstream (Ifx_MSC *msc, IfxMsc_NDividerDownstream divisionRatio)
Set the required N divider downstream value. More...
IFX_INLINE void | IfxMsc_setResetCommandExtensionMode (Ifx_MSC *msc, boolean value)
To enable or disable CX mode. More...
IFX_INLINE void | IfxMsc_setSerialDataInputSelect (Ifx_MSC *msc, IfxMsc_SerialDataInput select)
Sets The Serial Data Input Select. More...
IFX_INLINE void | IfxMsc_setSleepMode (Ifx_MSC *msc, IfxMsc_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxMsc_setSuspendMode (Ifx_MSC *msc, IfxMsc_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_INLINE void | IfxMsc_setTransmissionMode (Ifx_MSC *msc, IfxMsc_TransmissionMode mode)
Sets the Transmission Mode. More...
IFX_INLINE void | IfxMsc_setUpstreamChannelRecieveRate (Ifx_MSC *msc, IfxMsc_UpstreamChannelReceivingRate recieveRate)
Sets The Upstream Channel Recieve Rate. More...
IFX_INLINE void | IfxMsc_setUpstreamTimeout (Ifx_MSC *msc, IfxMsc_UpstreamTimeoutValue timeoutVal)
Sets The Upstream Timeout. More...
IFX_INLINE void | IfxMsc_setUpstreamTimeoutPrescalar (Ifx_MSC *msc, IfxMsc_UpstreamTimeoutPrescaler prescalar)
Sets The Upstream Timeout Prescalar. More...
IFX_INLINE boolean | IfxMsc_hasAbraOverflowErrorOccured (Ifx_MSC *msc)
Indicates if Overflow error has occured. More...
IFX_INLINE boolean | IfxMsc_hasAbraUnderflowErrorOccured (Ifx_MSC *msc)
Indicates if Underflow error has occured. More...
IFX_INLINE void | IfxMsc_setAbraOverflowFlag (Ifx_MSC *msc)
Sets the Overflow Flag and will trigger the overflow interrupt, if enabled. More...
IFX_INLINE void | IfxMsc_setAbraUnderflowFlag (Ifx_MSC *msc)
Sets the Underflow Flag and will trigger the underflow interrupt, if enabled. More...
IFX_EXTERN void | IfxMsc_clearDataFrameInterruptFlag (Ifx_MSC *msc)
clear data frame interrupt flag More...
IFX_EXTERN uint64 | IfxMsc_downstreamFractionalBaudCalculator (Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is fractional for downstream. More...
IFX_EXTERN uint32 | IfxMsc_downstreamNormalBaudCalculator (Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is normal for downstream. More...
IFX_EXTERN boolean | IfxMsc_getActiveDataFrameStatus (Ifx_MSC *msc)
get the status of the active data frame More...
IFX_EXTERN boolean | IfxMsc_getDataFrameInterruptFlag (Ifx_MSC *msc)
get the status of the data frame interrupt flag More...
IFX_EXTERN void | IfxMsc_manualLoadCxModeCommand (Ifx_MSC *msc, IfxMsc_CxModeCommand *command64)
IFX_EXTERN float32 | IfxMsc_getDownstreamAbraBaudrate (Ifx_MSC *msc)
Returns the downstream ABRA baudrate. More...
IFX_EXTERN float32 | IfxMsc_getDownstreamAbraDisabledBaudrate (Ifx_MSC *msc)
Returns the downstream baudrate(with ABRA disabled) More...
IFX_EXTERN float32 | IfxMsc_getDownstreamBaudrate (Ifx_MSC *msc)

Detailed Description

MSC basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxMsc.h.

Data Structure Documentation

◆ IfxMsc_CxModeCommand

struct IfxMsc_CxModeCommand

64 bit commnd to be loaded first to DCE & then to DC for transmission.

Definition at line 953 of file IfxMsc.h.

Data Fields
uint32 | dc | Command to be wrtten to DC register.
uint32 | dce | Command to be wrtten to DCE register.

Function Documentation

◆ IfxMsc_clearDataFrameInterruptFlag()

IFX_EXTERN void IfxMsc_clearDataFrameInterruptFlag ( Ifx_MSC * msc )

clear data frame interrupt flag

Parameters
msc pointer to the base of MSC registers
Returns
None

Definition at line 54 of file IfxMsc.c.

Referenced by IfxMsc_Msc_clearDataFrameInterrupt().

◆ IfxMsc_clearRecieveDataInterruptFlag()

IFX_INLINE void IfxMsc_clearRecieveDataInterruptFlag ( Ifx_MSC * msc )

Clears The Recieve Data Interrupt Flag.

Parameters
msc pointer to the base of MSC registers
Returns
None

Definition at line 1516 of file IfxMsc.h.

◆ IfxMsc_clearValidbit()

IFX_INLINE void IfxMsc_clearValidbit | ( | Ifx_MSC * | msc,
 |  | uint8 | upstreamIdx
 | ) |  |

Clears the Valid bit.

Parameters
msc | pointer to the base of MSC registers
upstreamIdx | upstream index
Returns
None

Definition at line 1535 of file IfxMsc.h.

◆ IfxMsc_disableUpstreamTimeoutInterrupt()

IFX_INLINE void IfxMsc_disableUpstreamTimeoutInterrupt ( Ifx_MSC * msc )

Disables the Upstream Timeout Interrupt.

Parameters
msc pointer to the base of MSC registers
Returns
None

Definition at line 1541 of file IfxMsc.h.

◆ IfxMsc_downstreamFractionalBaudCalculator()

IFX_EXTERN uint64 IfxMsc_downstreamFractionalBaudCalculator | ( | Ifx_MSC * | msc,
 |  | uint32 | baud
 | ) |  |

Get the step value for the supplied baud rate when divider mode is fractional for downstream.

Parameters
msc | pointer to the base of MSC registers
baud | Required baud rate
Returns
Step Value

Definition at line 99 of file IfxMsc.c.

◆ IfxMsc_downstreamNormalBaudCalculator()

IFX_EXTERN uint32 IfxMsc_downstreamNormalBaudCalculator | ( | Ifx_MSC * | msc,
 |  | uint32 | baud
 | ) |  |

Get the step value for the supplied baud rate when divider mode is normal for downstream.

Parameters
msc | Select DataType Ref
baud | Required baud rate
Returns
Step value

Definition at line 112 of file IfxMsc.c.

◆ IfxMsc_enableUpstreamTimeoutInterrupt()

IFX_INLINE void IfxMsc_enableUpstreamTimeoutInterrupt ( Ifx_MSC * msc )

Enables the Upstream Timeout Interrupt.

Parameters
msc pointer to the base of MSC registers
Returns
None

Definition at line 1547 of file IfxMsc.h.

◆ IfxMsc_getActiveDataFrameStatus()

IFX_EXTERN boolean IfxMsc_getActiveDataFrameStatus ( Ifx_MSC * msc )

get the status of the active data frame

Parameters
msc pointer to the base of MSC registers
Returns
Status TRUE or FALSE

Definition at line 134 of file IfxMsc.c.

Referenced by IfxMsc_Msc_getActiveDataFrameStatus().

◆ IfxMsc_getAsyncClockBypass()

IFX_INLINE boolean IfxMsc_getAsyncClockBypass ( Ifx_MSC * msc )

Returns the value of Asynchronous clock Bypass bit.

Parameters
msc pointer to the base of MSC registers
Returns
Get the value of Asynchronous clock bypass enable bit.

Definition at line 1553 of file IfxMsc.h.

◆ IfxMsc_getDataFrameInterruptFlag()

IFX_EXTERN boolean IfxMsc_getDataFrameInterruptFlag ( Ifx_MSC * msc )

get the status of the data frame interrupt flag

Parameters
msc pointer to the base of MSC registers
Returns
Status TRUE or FALSE

Definition at line 157 of file IfxMsc.c.

Referenced by IfxMsc_Msc_getDataFrameInterruptStatus().

◆ IfxMsc_getDownstreamAbraBaudrate()

IFX_EXTERN float32 IfxMsc_getDownstreamAbraBaudrate ( Ifx_MSC * msc )

Returns the downstream ABRA baudrate.

Parameters
msc Pointer to MSC SFR base address
Returns
Downstream ABRA baudrate

Definition at line 261 of file IfxMsc.c.

Referenced by IfxMsc_getDownstreamBaudrate().

◆ IfxMsc_getDownstreamAbraDisabledBaudrate()

IFX_EXTERN float32 IfxMsc_getDownstreamAbraDisabledBaudrate ( Ifx_MSC * msc )

Returns the downstream baudrate(with ABRA disabled)

Parameters
msc Pointer to MSC SFR base address
Returns
Returns the downstream baudrate(in case of ABRA disabled)

Definition at line 275 of file IfxMsc.c.

Referenced by IfxMsc_getDownstreamBaudrate().

◆ IfxMsc_getDownstreamBaudrate()

IFX_EXTERN float32 IfxMsc_getDownstreamBaudrate ( Ifx_MSC * msc )
Parameters
msc Pointer to MSC SFR base address
Returns
Returns the downstream baudrate.

Definition at line 296 of file IfxMsc.c.

◆ IfxMsc_getDownStreamExtension()

IFX_INLINE boolean IfxMsc_getDownStreamExtension ( Ifx_MSC * msc )

Returns the value of Down stream extension enable bit.

Parameters
msc pointer to the base of MSC registers
Returns
Get the value of Down stream extension enable bit.

Definition at line 1583 of file IfxMsc.h.

◆ IfxMsc_getRecieveDataInterruptFlag()

IFX_INLINE boolean IfxMsc_getRecieveDataInterruptFlag ( Ifx_MSC * msc )

Returns the Recieve DataInterrupt Flag Status.

Parameters
msc pointer to the base of MSC registers
Returns
Status

Definition at line 1589 of file IfxMsc.h.

◆ IfxMsc_getSrcPointer()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxMsc_getSrcPointer | ( | Ifx_MSC * | msc,
 |  | IfxMsc_InterruptServiceRequest | intRequest
 | ) |  |

Returns the Src pointer for the selected MSC interrupt node.

Parameters
msc | pointer to the base of MSC registers
intRequest | Interrupt Request
Returns
Pointer to SRCR register

Definition at line 1595 of file IfxMsc.h.

◆ IfxMsc_getUpstreamData()

IFX_INLINE uint32 IfxMsc_getUpstreamData | ( | Ifx_MSC * | msc,
 |  | uint8 | upstreamIdx
 | ) |  |

Returns the Upstream Data.

Parameters
msc | pointer to the base of MSC registers
upstreamIdx | upstream index
Returns
Upstream Data

Definition at line 1605 of file IfxMsc.h.

◆ IfxMsc_getUpstreamParityErrorFlag()

IFX_INLINE boolean IfxMsc_getUpstreamParityErrorFlag | ( | Ifx_MSC * | msc,
 |  | uint8 | upstreamIdx
 | ) |  |

Returns the Upstream Parity Error Flag Status.

Parameters
msc | pointer to the base of MSC registers
upstreamIdx | upstream index
Returns
Status

Definition at line 1611 of file IfxMsc.h.

◆ IfxMsc_getUpstreamTimeoutFlag()

IFX_INLINE boolean IfxMsc_getUpstreamTimeoutFlag ( Ifx_MSC * msc )

Returns Upstream Timeout Flag Status.

Parameters
msc pointer to the base of MSC registers
Returns
Status

Definition at line 1617 of file IfxMsc.h.

◆ IfxMsc_hasAbraOverflowErrorOccured()

IFX_INLINE boolean IfxMsc_hasAbraOverflowErrorOccured ( Ifx_MSC * msc )

Indicates if Overflow error has occured.

Parameters
msc Pointer to MSC SFR base address
Returns
Returns overflow error status

Definition at line 1876 of file IfxMsc.h.

◆ IfxMsc_hasAbraUnderflowErrorOccured()

IFX_INLINE boolean IfxMsc_hasAbraUnderflowErrorOccured ( Ifx_MSC * msc )

Indicates if Underflow error has occured.

Parameters
msc Pointer to MSC SFR base address
Returns
Returns underflow error status

Definition at line 1882 of file IfxMsc.h.

◆ IfxMsc_isModuleSuspended()

IFX_INLINE boolean IfxMsc_isModuleSuspended ( Ifx_MSC * msc )

Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended.

Parameters
msc Pointer to MSC module registers
Returns
Suspend status (TRUE / FALSE)

Definition at line 1704 of file IfxMsc.h.

◆ IfxMsc_manualLoadCxModeCommand()

IFX_EXTERN void IfxMsc_manualLoadCxModeCommand | ( | Ifx_MSC * | msc,
 |  | IfxMsc_CxModeCommand * | command64
 | ) |  |
Parameters
msc | Pointer to MSC module SFRs
command64 | Command struct to be loaded to DCE & DC
Returns
None

Definition at line 187 of file IfxMsc.c.

◆ IfxMsc_setAbraOverflowFlag()

IFX_INLINE void IfxMsc_setAbraOverflowFlag ( Ifx_MSC * msc )

Sets the Overflow Flag and will trigger the overflow interrupt, if enabled.

Parameters
msc Pointer to MSC SFR base address
Returns
None

Definition at line 1888 of file IfxMsc.h.

◆ IfxMsc_setAbraUnderflowFlag()

IFX_INLINE void IfxMsc_setAbraUnderflowFlag ( Ifx_MSC * msc )

Sets the Underflow Flag and will trigger the underflow interrupt, if enabled.

Parameters
msc Pointer to MSC SFR base address
Returns
None

Definition at line 1895 of file IfxMsc.h.

◆ IfxMsc_setAsyncClockBypass()

IFX_INLINE void IfxMsc_setAsyncClockBypass | ( | Ifx_MSC * | msc,
 |  | boolean | value
 | ) |  |

Set or reset the Asynchronous clock bypass bit.

Parameters
msc | pointer to the base of MSC registers
value | Set / reset value.
Returns
None

Definition at line 1716 of file IfxMsc.h.

◆ IfxMsc_setDownStreamData()

IFX_INLINE void IfxMsc_setDownStreamData | ( | Ifx_MSC * | msc,
 |  | uint32 | data
 | ) |  |

Sets the Down stream data.

Parameters
msc | pointer to the base of MSC registers
data | Data
Returns
None

Definition at line 1743 of file IfxMsc.h.

◆ IfxMsc_setDownStreamExtension()

IFX_INLINE void IfxMsc_setDownStreamExtension | ( | Ifx_MSC * | msc,
 |  | boolean | value
 | ) |  |

Set or reset the Down stream extension enable bit.

Parameters
msc | pointer to the base of MSC registers
value | Set / reset value.
Returns
None

Definition at line 1749 of file IfxMsc.h.

◆ IfxMsc_setDownStreamExtensionData()

IFX_INLINE void IfxMsc_setDownStreamExtensionData | ( | Ifx_MSC * | msc,
 |  | uint32 | data
 | ) |  |

Sets the Down stream Extension data.

Parameters
msc | pointer to the base of MSC registers
data | Data
Returns
None

Definition at line 1755 of file IfxMsc.h.

◆ IfxMsc_setFastMode()

IFX_INLINE void IfxMsc_setFastMode | ( | Ifx_MSC * | msc,
 |  | boolean | value
 | ) |  |

Set or reset the Fast Mode bit. Select the correct NDD value when using Fast mode.

Parameters
msc | pointer to the base of MSC registers
value | Set / reset value.
Returns
None

Definition at line 1761 of file IfxMsc.h.

◆ IfxMsc_setFractionalDividerStep()

IFX_INLINE void IfxMsc_setFractionalDividerStep | ( | Ifx_MSC * | msc,
 |  | uint16 | value
 | ) |  |

Sets The Fractional Divider Step.

Parameters
msc | pointer to the base of MSC registers
value | Value
Returns
None

Definition at line 1781 of file IfxMsc.h.

◆ IfxMsc_setNdividerDownstream()

IFX_INLINE void IfxMsc_setNdividerDownstream | ( | Ifx_MSC * | msc,
 |  | IfxMsc_NDividerDownstream | divisionRatio
 | ) |  |

Set the required N divider downstream value.

Parameters
msc | pointer to the base of MSC registers
divisionRatio | select the required division ratio.
Returns
None

Definition at line 1802 of file IfxMsc.h.

◆ IfxMsc_setResetCommandExtensionMode()

IFX_INLINE void IfxMsc_setResetCommandExtensionMode | ( | Ifx_MSC * | msc,
 |  | boolean | value
 | ) |  |

To enable or disable CX mode.

Parameters
msc
value To enable or disable CX mode
Returns
None

Definition at line 1808 of file IfxMsc.h.

◆ IfxMsc_setSerialDataInputSelect()

IFX_INLINE void IfxMsc_setSerialDataInputSelect | ( | Ifx_MSC * | msc,
 |  | IfxMsc_SerialDataInput | select
 | ) |  |

Sets The Serial Data Input Select.

Parameters
msc | pointer to the base of MSC registers
select | Serial Data Input Select
Returns
None

Definition at line 1826 of file IfxMsc.h.

◆ IfxMsc_setSleepMode()

IFX_INLINE void IfxMsc_setSleepMode | ( | Ifx_MSC * | msc,
 |  | IfxMsc_SleepMode | mode
 | ) |  |

Sets the sensitivity of the module to sleep signal.

Parameters
msc | pointer to MSC registers
mode | mode selection (enable/disable)
Returns
None

Definition at line 1832 of file IfxMsc.h.

◆ IfxMsc_setSuspendMode()

IFX_INLINE void IfxMsc_setSuspendMode | ( | Ifx_MSC * | msc,
 |  | IfxMsc_SuspendMode | mode
 | ) |  |

Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.

Parameters
msc | Pointer to MSC module registers
mode | Module suspend mode
Returns
None

Definition at line 1841 of file IfxMsc.h.

◆ IfxMsc_setTransmissionMode()

IFX_INLINE void IfxMsc_setTransmissionMode | ( | Ifx_MSC * | msc,
 |  | IfxMsc_TransmissionMode | mode
 | ) |  |

Sets the Transmission Mode.

Parameters
msc | pointer to the base of MSC registers
mode | mode
Returns
None

Definition at line 1852 of file IfxMsc.h.

◆ IfxMsc_setUpstreamChannelRecieveRate()

IFX_INLINE void IfxMsc_setUpstreamChannelRecieveRate | ( | Ifx_MSC * | msc,
 |  | IfxMsc_UpstreamChannelReceivingRate | recieveRate
 | ) |  |

Sets The Upstream Channel Recieve Rate.

Parameters
msc | pointer to the base of MSC registers
recieveRate | Recieve Rate
Returns
None

Definition at line 1858 of file IfxMsc.h.

◆ IfxMsc_setUpstreamTimeout()

IFX_INLINE void IfxMsc_setUpstreamTimeout | ( | Ifx_MSC * | msc,
 |  | IfxMsc_UpstreamTimeoutValue | timeoutVal
 | ) |  |

Sets The Upstream Timeout.

Parameters
msc | pointer to the base of MSC registers
timeoutVal | Timeout Value
Returns
None

Definition at line 1864 of file IfxMsc.h.

◆ IfxMsc_setUpstreamTimeoutPrescalar()

IFX_INLINE void IfxMsc_setUpstreamTimeoutPrescalar | ( | Ifx_MSC * | msc,
 |  | IfxMsc_UpstreamTimeoutPrescaler | prescalar
 | ) |  |

Sets The Upstream Timeout Prescalar.

Parameters
msc | pointer to the base of MSC registers
prescalar | prescalar
Returns
None

Definition at line 1870 of file IfxMsc.h.


iLLD_TC38A: MTU

Modules | Files
MTU
iLLD
Collaboration diagram for MTU:

Modules

Implementation
Standard Driver
How to use the Mtu driver?

Files

file | IfxMtu_cfg.h
Mtu on-chip implementation data.
file | IfxMtu.h
MTU basic functionality.

Detailed Description


iLLD_TC38A: Implementation

Implementation
iLLD » MTU
Collaboration diagram for Implementation:


iLLD_TC38A: Standard Driver

Modules
Standard Driver
iLLD » MTU
Collaboration diagram for Standard Driver:

Modules

Utility Functions
MBIST Operations
MBIST Error Tracking

Detailed Description


iLLD_TC38A: Utility Functions

Functions
Utility Functions
iLLD » MTU » Standard Driver
Collaboration diagram for Utility Functions:

Functions

IFX_INLINE void | IfxMtu_disableMbistShell (IfxMtu_MbistSel mbistSel)
Disables the MBIST Shell of the given SRAM. More...
IFX_INLINE void | IfxMtu_enableMbistShell (IfxMtu_MbistSel mbistSel)
Enables the MBIST Shell of the given SRAM. More...
IFX_INLINE void | IfxMtu_enableModule (void)
Enables the MTU module. More...
IFX_INLINE uint32 | IfxMtu_getMemDoneRegisterIndex (IfxMtu_MbistSel mbistSel)
returns register offset (x) and register bit offset (y) (MEMDONE[x].B.y) More...
IFX_INLINE boolean | IfxMtu_isAutoInitRunning (IfxMtu_MbistSel mbistSel)
Returns TRUE if Auto-Initialisation is running for the given SRAM. More...
IFX_INLINE boolean | IfxMtu_isModuleEnabled (void)
Returns the status of whether the module is enabled or not. More...

Detailed Description

Function Documentation

◆ IfxMtu_disableMbistShell()

IFX_INLINE void IfxMtu_disableMbistShell ( IfxMtu_MbistSel mbistSel )

Disables the MBIST Shell of the given SRAM.

Parameters
mbistSel Memory Selection
Returns
None

Usage Example

IfxMtu_disableMbistShell(IfxMtu_MbistSel_cpu0Dtag);
// Note: Wait for Auto-initilisation to be completed for auto-init memories like cpu-Dtag, cpu-Ptag, Cpu-Dcache, Cpu-Pcache
while (IfxMtu_isAutoInitRunning(IfxMtu_MbistSel_cpu0Dtag))
{}

Definition at line 774 of file IfxMtu.h.

Referenced by IfxMtu_clearSramContinue(), IfxMtu_runCheckerBoardTest(), IfxMtu_runMarchUTest(), and IfxMtu_runNonDestructiveInversionTest().

◆ IfxMtu_enableMbistShell()

IFX_INLINE void IfxMtu_enableMbistShell ( IfxMtu_MbistSel mbistSel )

Enables the MBIST Shell of the given SRAM.

Parameters
mbistSel Memory Selection
Returns
None

Usage Example

// Enable MTU clock
{
uint16 password = IfxScuWdt_getCpuWatchdogPassword();
IfxScuWdt_clearCpuEndinit(password);
IfxMtu_enableModule();
IfxScuWdt_setCpuEndinit(password);
}
{
IfxMtu_enableMbistShell(IfxMtu_MbistSel_cpu0Dtag);
// Note: Wait for Auto-initilisation to be completed for auto-init memories like cpu-Dtag, cpu-Ptag, Cpu-Dcache, Cpu-Pcache,
while (IfxMtu_isAutoInitRunning(IfxMtu_MbistSel_cpu0Dtag))
{}
}

Definition at line 805 of file IfxMtu.h.

Referenced by IfxMtu_clearSramStart(), IfxMtu_runCheckerBoardTest(), IfxMtu_runMarchUTest(), and IfxMtu_runNonDestructiveInversionTest().

◆ IfxMtu_enableModule()

IFX_INLINE void IfxMtu_enableModule ( void )

Enables the MTU module.

Returns
None

Definition at line 816 of file IfxMtu.h.

Referenced by IfxEray_Eray_initModule(), and IfxMtu_runMbist().

◆ IfxMtu_getMemDoneRegisterIndex()

IFX_INLINE uint32 IfxMtu_getMemDoneRegisterIndex ( IfxMtu_MbistSel mbistSel )

returns register offset (x) and register bit offset (y) (MEMDONE[x].B.y)

Parameters
mbistSel Memory Selection
Returns
returns register offset (x) and register bit offset (y) (MEMDONE[x].B.y)

Definition at line 837 of file IfxMtu.h.

Referenced by IfxMtu_isMbistDone().

◆ IfxMtu_isAutoInitRunning()

IFX_INLINE boolean IfxMtu_isAutoInitRunning ( IfxMtu_MbistSel mbistSel )

Returns TRUE if Auto-Initialisation is running for the given SRAM.

Should be polled after MBIST enableMbistShell to ensure that an auto-init operation is finished before starting a new operation.

Parameters
mbistSel Memory Selection
Returns
TRUE if auto-initialisation running.

Definition at line 860 of file IfxMtu.h.

Referenced by IfxMtu_clearSramContinue(), IfxMtu_clearSramStart(), IfxMtu_runCheckerBoardTest(), IfxMtu_runMarchUTest(), IfxMtu_runMbistClearRam(), IfxMtu_runMbistConfigPatterns(), IfxMtu_runMbistConfigRange(), and IfxMtu_runNonDestructiveInversionTest().

◆ IfxMtu_isModuleEnabled()

IFX_INLINE boolean IfxMtu_isModuleEnabled ( void )

Returns the status of whether the module is enabled or not.

Returns

Definition at line 896 of file IfxMtu.h.

Referenced by IfxMtu_runMbist().


iLLD_TC38A: MBIST Operations

Data Structures | Functions
MBIST Operations
iLLD » MTU » Standard Driver
Collaboration diagram for MBIST Operations:

Data Structures

struct | IfxMtu_MbistConfigPattern
struct | IfxMtu_MbistSshConfig
struct | IfxMtu_MbistConfig

Functions

IFX_STATIC void | IfxMtu_runMbistConfigMtest (const IfxMtu_MbistConfig *mbistConfig)
IFX_STATIC void | IfxMtu_runMbistConfigRange (const IfxMtu_MbistConfig *mbistConfig)
IFX_STATIC void | IfxMtu_runMbistClearRam (const IfxMtu_MbistConfig *mbistConfig)
IFX_STATIC void | IfxMtu_runMbistConfigPatterns (const IfxMtu_MbistConfig *mbistConfig)
IFX_STATIC boolean | IfxMtu_runMbistEnd (uint32 testsDone)
IFX_INLINE void | IfxMtu_disableErrorReporting (IfxMtu_MbistSel mbistSel)
This function disables alarm-reporting flags. More...
IFX_INLINE void | IfxMtu_enableErrorReporting (IfxMtu_MbistSel mbistSel)
This function enables alarm-reporting flags. More...
IFX_INLINE boolean | IfxMtu_isMbistDone (IfxMtu_MbistSel mbistSel)
This Function returns the status of MBIST clear Sram operation. More...
IFX_EXTERN void | IfxMtu_clearSram (IfxMtu_MbistSel mbistSel)
Function to Clear the MBIST SRAM (Synchronous mode). Note: The function clears & sets safety endinit bit while running the test to prevent watchdog TO and automatically restores the endinit state (same state at the time of entering the function) at the end. More...
IFX_EXTERN void | IfxMtu_clearSramContinue (IfxMtu_MbistSel mbistSel)
This Function should be called after MBIST Clear SRAM operation is completed. Note: The function should be called with safety endinit bit cleared. More...
IFX_EXTERN void | IfxMtu_clearSramStart (IfxMtu_MbistSel mbistSel)
This Function triggers the Clear the MBIST SRAM operation (Asynchronous operation). It doesn't wait till the end of operation. The application has to poll the Mbist status (IfxMtu_isMbistDone()) in a task and once the operation is done, the IfxMtu_clearSramContinue() function should be called to complete the operation. Alternately the application can enable the "memory test done" interrupt. And in the ISR, the IfxMtu_clearSramContinue() has to be called. If Synchronous usage is need, use IfxMtu_clearSram() function. Note: The function should be called with safety endinit bit cleared. More...
IFX_EXTERN boolean | IfxMtu_isTestPass (const IfxMtu_MbistConfig *mbistConfig)
Check if the last MBIST Passed This function shall check for all the configured SSH cells if the tests were passed. More...
IFX_EXTERN void | IfxMtu_readSramAddress (IfxMtu_MbistSel mbistSel, uint16 sramAddress)
IFX_EXTERN uint8 | IfxMtu_runCheckerBoardTest (IfxMtu_MbistSel mbistSel, uint8 rangeSel, uint8 rangeAddrUp, uint8 rangeAddrLow, uint16 *errorAddr, uint32 numberRedundancyLines)
Run CheckerBoard test. This test consists of writing the physical checkerboard pattern into the memory, then reading it back for verification Note: The function clears & sets safety endinit bit while running the test to prevent watchdog TO and automatically restores the endinit state (same state at the time of entering the function) at the end. More...
IFX_EXTERN uint8 | IfxMtu_runMarchUTest (IfxMtu_MbistSel mbistSel, uint8 rangeSel, uint8 rangeAddrUp, uint8 rangeAddrLow, uint16 *errorAddr)
Run March U test. This test MARCHES 0 and 1 values through the memory array in an up and down direction. More precisely, 0 and 1 values are propagated through the memory in each direction; i.e. a single bit cell toggles into each direction with the neighboring cells having a given value and, in another run, the inverse given value. Note: The function clears & sets safety endinit bit while running the test to prevent watchdog TO and automatically restores the endinit state (same state at the time of entering the function) at the end. More...
IFX_EXTERN uint8 | IfxMtu_runNonDestructiveInversionTest (IfxMtu_MbistSel mbistSel, uint8 rangeSel, uint8 rangeAddrUp, uint8 rangeAddrLow, uint16 *errorAddr)
This function runs the Non-Destructive Inversion test algorithm. Non-Destructive Inversion test can be considered as a simple linear test that is able to find all Stuck-At faults (the cell remains stuck at a value for any operation) without destroying any user data. The test accesses every Word in the address range defined by the RANGE register, four times. Test Steps: More...
IFX_EXTERN void | IfxMtu_writeSramAddress (IfxMtu_MbistSel mbistSel, uint16 sramAddress)
IFX_EXTERN boolean | IfxMtu_runMbistAll (const IfxMtu_MbistConfig *const mbistConfig[])
Run the MBIST on all configured Gang configurations Requirements: 1) This function shall run the tests on all SRAMs, which configured by the SSH structure array 1.1) Address range (already scrambled address info) is made available through configuration 1.2) Part of the test pattern is passed through MCONTROL 2) For each cell, the test shall execute all the configuration patterns as passed through pattern array 2.1) Test for each configuration pattern shall end either for the completion or for the failure 2.2) Test shall only end if the test is finished (with or without pass) or timeout 2.3) Failed test shall not be evaluated (this function only runs the tests) 3) Function shall return TRUE if the test execution for one of the configuration patterns is not finished 4) Function shall return FALSE if the test execution is finished Assumptions of usage: 1) This function is not interrupted. 2) DSPRAM of the CPU on which this function is running is being tested 2) For destructive tests, the tested ram shall be re initialized by user. More...
IFX_EXTERN boolean | IfxMtu_runMbist (const IfxMtu_MbistConfig *mbistConfig)
Run the MBIST on configured Gang configuration Requirements: 1) This function shall run the tests on all SRAMs, which configured by the SSH structure array 1.1) Address range (already scrambled address info) is made available through configuration 1.2) Part of the test pattern is passed through MCONTROL 2) For each cell, the test shall execute all the configuration patterns as passed through pattern array 2.1) Test for each configuration pattern shall end either for the completion or for the failure 2.2) Test shall only end if the test is finished (with or without pass) or timeout 2.3) Failed test shall not be evaluated (this function only runs the tests) 3) Function shall return TRUE if the test execution for one of the configuration patterns is not finished 4) Function shall return FALSE if the test execution is finished Assumptions of usage: 1) This function is not interrupted. 2) DSPRAM of the CPU on which this function is running is being tested 2) For destructive tests, the tested ram shall be re initialized by user. More...

Detailed Description

Data Structure Documentation

◆ IfxMtu_MbistConfigPattern

struct IfxMtu_MbistConfigPattern

Definition at line 371 of file IfxMtu.h.

Data Fields
Ifx_MTU_MC_CONFIG0 | config0
Ifx_MTU_MC_CONFIG1 | config1

◆ IfxMtu_MbistSshConfig

struct IfxMtu_MbistSshConfig

Definition at line 377 of file IfxMtu.h.

Data Fields
uint8 | highAddress | Higher address (scrambled) of memory Range to be tested.
uint8 | lowAddress | Lower address (scrambled) of memory Range to be tested.
uint8 | preClearEnable | Enable SRAM clearing before the test.
IfxMtu_MbistSel | sshSel | Member (config0)
uint8 | uncorrectableErrorThreshold | Threshold number for uncorrectable errors.

◆ IfxMtu_MbistConfig

struct IfxMtu_MbistConfig

Definition at line 390 of file IfxMtu.h.

Collaboration diagram for IfxMtu_MbistConfig:
[legend]
Data Fields
IFX_CONST IfxMtu_MbistConfigPattern * | configPatterns | Pointer to number of configuration patterns.
Ifx_MTU_MC_MCONTROL | mcontrol | Value of MCONTROL register except START bit.
uint8 | numOfConfigPatterns | Number of configuration patterns.
uint8 | numOfSshConfigurations | Number of SSH Configurations in the memory test.
IFX_CONST IfxMtu_MbistSshConfig * | sshConfigurations | Pointer to number of SSH configuration structures.

Function Documentation

◆ IfxMtu_clearSram()

IFX_EXTERN void IfxMtu_clearSram ( IfxMtu_MbistSel mbistSel )

Function to Clear the MBIST SRAM (Synchronous mode). Note: The function clears & sets safety endinit bit while running the test to prevent watchdog TO and automatically restores the endinit state (same state at the time of entering the function) at the end.

Parameters
mbistSel Memory Selection
Returns
None

A coding example can be found in How to use the Mtu driver?

Definition at line 126 of file IfxMtu.c.

Referenced by IfxEray_Eray_initModule().

◆ IfxMtu_clearSramContinue()

IFX_EXTERN void IfxMtu_clearSramContinue ( IfxMtu_MbistSel mbistSel )

This Function should be called after MBIST Clear SRAM operation is completed. Note: The function should be called with safety endinit bit cleared.

Parameters
mbistSel Memory Selection
Returns
None

A coding example can be found in How to use the Mtu driver?

Definition at line 166 of file IfxMtu.c.

Referenced by IfxMtu_clearSram().

◆ IfxMtu_clearSramStart()

IFX_EXTERN void IfxMtu_clearSramStart ( IfxMtu_MbistSel mbistSel )

This Function triggers the Clear the MBIST SRAM operation (Asynchronous operation). It doesn't wait till the end of operation. The application has to poll the Mbist status (IfxMtu_isMbistDone()) in a task and once the operation is done, the IfxMtu_clearSramContinue() function should be called to complete the operation. Alternately the application can enable the "memory test done" interrupt. And in the ISR, the IfxMtu_clearSramContinue() has to be called. If Synchronous usage is need, use IfxMtu_clearSram() function. Note: The function should be called with safety endinit bit cleared.

Parameters
mbistSel Memory Selection
Returns
None

A coding example can be found in How to use the Mtu driver?

Definition at line 179 of file IfxMtu.c.

Referenced by IfxMtu_clearSram().

◆ IfxMtu_disableErrorReporting()

IFX_INLINE void IfxMtu_disableErrorReporting ( IfxMtu_MbistSel mbistSel )

This function disables alarm-reporting flags.

Parameters
mbistSel Memory Selection
Returns
None

Definition at line 766 of file IfxMtu.h.

◆ IfxMtu_enableErrorReporting()

IFX_INLINE void IfxMtu_enableErrorReporting ( IfxMtu_MbistSel mbistSel )

This function enables alarm-reporting flags.

Parameters
mbistSel Memory Selection
Returns
None

Definition at line 797 of file IfxMtu.h.

◆ IfxMtu_isMbistDone()

IFX_INLINE boolean IfxMtu_isMbistDone ( IfxMtu_MbistSel mbistSel )

This Function returns the status of MBIST clear Sram operation.

Parameters
mbistSel Memory Selection
Returns
status of Mbist Clear Sram operation (TRUE - Operation completed, FALSE - Operation still in progress)

A coding example can be found in How to use the Mtu driver?

Definition at line 882 of file IfxMtu.h.

Referenced by IfxMtu_clearSram(), IfxMtu_disableMbistShell(), IfxMtu_readSramAddress(), IfxMtu_runCheckerBoardTest(), IfxMtu_runMarchUTest(), IfxMtu_runNonDestructiveInversionTest(), and IfxMtu_writeSramAddress().

◆ IfxMtu_isTestPass()

IFX_EXTERN boolean IfxMtu_isTestPass ( const IfxMtu_MbistConfig * mbistConfig )

Check if the last MBIST Passed This function shall check for all the configured SSH cells if the tests were passed.

Parameters
mbistConfig pointer to the configuration structure for the RAM test
Returns
TRUE: Test passed; FALSE: Test failed.

Definition at line 322 of file IfxMtu.c.

Referenced by IfxMtu_runMbistAll().

◆ IfxMtu_readSramAddress()

IFX_EXTERN void IfxMtu_readSramAddress | ( | IfxMtu_MbistSel | mbistSel,
 |  | uint16 | sramAddress
 | ) |  |
Parameters
mbistSel | Memory Selection
sramAddress | SRAM address which should be read
Returns
None

A coding example can be found in How to use the Mtu driver?

Definition at line 343 of file IfxMtu.c.

Referenced by IfxMtu_clearSramContinue().

◆ IfxMtu_runCheckerBoardTest()

IFX_EXTERN uint8 IfxMtu_runCheckerBoardTest | ( | IfxMtu_MbistSel | mbistSel,
 |  | uint8 | rangeSel,
 |  | uint8 | rangeAddrUp,
 |  | uint8 | rangeAddrLow,
 |  | uint16 * | errorAddr,
 |  | uint32 | numberRedundancyLines
 | ) |  |

Run CheckerBoard test. This test consists of writing the physical checkerboard pattern into the memory, then reading it back for verification Note: The function clears & sets safety endinit bit while running the test to prevent watchdog TO and automatically restores the endinit state (same state at the time of entering the function) at the end.

Parameters
mbistSel | Memory Selection
rangeSel | enable/disable range Selection (0 - disable, 1- enable)
rangeAddrUp | when range mode is enabled, it specifies the upper logical block address limit in 64 word increments.
rangeAddrLow | when range mode is enabled, it specifies the lower logical block address limit.
errorAddr | If the test fails, it contains the error address (bit0 - bit12) and memory block index (Bit13 - Bit15)
numberRedundancyLines | Number of redundancy lines
Returns
Test Status (0-PASS, 1- FAIL)

Definition at line 368 of file IfxMtu.c.

◆ IfxMtu_runMarchUTest()

IFX_EXTERN uint8 IfxMtu_runMarchUTest | ( | IfxMtu_MbistSel | mbistSel,
 |  | uint8 | rangeSel,
 |  | uint8 | rangeAddrUp,
 |  | uint8 | rangeAddrLow,
 |  | uint16 * | errorAddr
 | ) |  |

Run March U test. This test MARCHES 0 and 1 values through the memory array in an up and down direction. More precisely, 0 and 1 values are propagated through the memory in each direction; i.e. a single bit cell toggles into each direction with the neighboring cells having a given value and, in another run, the inverse given value. Note: The function clears & sets safety endinit bit while running the test to prevent watchdog TO and automatically restores the endinit state (same state at the time of entering the function) at the end.

Parameters
mbistSel | Memory Selection
rangeSel | enable/disable range Selection (0 - disable, 1- enable)
rangeAddrUp | when range mode is enabled, it specifies the upper logical block address limit in 64 word increments.
rangeAddrLow | when range mode is enabled, it specifies the lower logical block address limit.
errorAddr | If the test fails, it contains the error address (bit0 - bit12) and memory block index (Bit13 - Bit15)
Returns
Test Status (0-PASS, 1- FAIL)

Definition at line 456 of file IfxMtu.c.

◆ IfxMtu_runMbist()

IFX_EXTERN boolean IfxMtu_runMbist ( const IfxMtu_MbistConfig * mbistConfig )

Run the MBIST on configured Gang configuration Requirements: 1) This function shall run the tests on all SRAMs, which configured by the SSH structure array 1.1) Address range (already scrambled address info) is made available through configuration 1.2) Part of the test pattern is passed through MCONTROL 2) For each cell, the test shall execute all the configuration patterns as passed through pattern array 2.1) Test for each configuration pattern shall end either for the completion or for the failure 2.2) Test shall only end if the test is finished (with or without pass) or timeout 2.3) Failed test shall not be evaluated (this function only runs the tests) 3) Function shall return TRUE if the test execution for one of the configuration patterns is not finished 4) Function shall return FALSE if the test execution is finished Assumptions of usage: 1) This function is not interrupted. 2) DSPRAM of the CPU on which this function is running is being tested 2) For destructive tests, the tested ram shall be re initialized by user.

Parameters
mbistConfig pointer to the configuration structure for the RAM test
Returns
TRUE: Test is successfully finished; FALSE: Test is not successfully finished.

Definition at line 698 of file IfxMtu.c.

Referenced by IfxMtu_runMbistAll().

◆ IfxMtu_runMbistAll()

IFX_EXTERN boolean IfxMtu_runMbistAll ( const IfxMtu_MbistConfig *const mbistConfig[] )

Run the MBIST on all configured Gang configurations Requirements: 1) This function shall run the tests on all SRAMs, which configured by the SSH structure array 1.1) Address range (already scrambled address info) is made available through configuration 1.2) Part of the test pattern is passed through MCONTROL 2) For each cell, the test shall execute all the configuration patterns as passed through pattern array 2.1) Test for each configuration pattern shall end either for the completion or for the failure 2.2) Test shall only end if the test is finished (with or without pass) or timeout 2.3) Failed test shall not be evaluated (this function only runs the tests) 3) Function shall return TRUE if the test execution for one of the configuration patterns is not finished 4) Function shall return FALSE if the test execution is finished Assumptions of usage: 1) This function is not interrupted. 2) DSPRAM of the CPU on which this function is running is being tested 2) For destructive tests, the tested ram shall be re initialized by user.

Parameters
mbistConfig pointer to the configuration structure for the RAM test
Returns
TRUE: Test is successfully finished; FALSE: Test is not successfully finished.

Definition at line 663 of file IfxMtu.c.

◆ IfxMtu_runMbistClearRam()

IFX_STATIC void IfxMtu_runMbistClearRam ( const IfxMtu_MbistConfig * mbistConfig )
Parameters
mbistConfig pointer to the configuration structure for the RAM test
Returns
None

Setup Configuration pattern for each SSH CONFIGx

Definition at line 803 of file IfxMtu.c.

Referenced by IfxMtu_runMbistConfigRange().

◆ IfxMtu_runMbistConfigMtest()

IFX_STATIC void IfxMtu_runMbistConfigMtest ( const IfxMtu_MbistConfig * mbistConfig )
Parameters
mbistConfig pointer to the configuration structure for the RAM test
Returns
None

Definition at line 716 of file IfxMtu.c.

Referenced by IfxMtu_runMbist().

◆ IfxMtu_runMbistConfigPatterns()

IFX_STATIC void IfxMtu_runMbistConfigPatterns ( const IfxMtu_MbistConfig * mbistConfig )
Parameters
mbistConfig pointer to the configuration structure for the RAM test
Returns
None

Setup Configuration pattern for each SSH CONFIGx

Definition at line 858 of file IfxMtu.c.

Referenced by IfxMtu_runMbistClearRam().

◆ IfxMtu_runMbistConfigRange()

IFX_STATIC void IfxMtu_runMbistConfigRange ( const IfxMtu_MbistConfig * mbistConfig )
Parameters
mbistConfig pointer to the configuration structure for the RAM test
Returns
None

Definition at line 771 of file IfxMtu.c.

Referenced by IfxMtu_runMbistConfigMtest().

◆ IfxMtu_runMbistEnd()

IFX_STATIC boolean IfxMtu_runMbistEnd ( uint32 testsDone )
Parameters
testsDone tests Done status
Returns
test done status

Definition at line 917 of file IfxMtu.c.

Referenced by IfxMtu_runMbistClearRam(), IfxMtu_runMbistConfigMtest(), and IfxMtu_runMbistConfigPatterns().

◆ IfxMtu_runNonDestructiveInversionTest()

IFX_EXTERN uint8 IfxMtu_runNonDestructiveInversionTest | ( | IfxMtu_MbistSel | mbistSel,
 |  | uint8 | rangeSel,
 |  | uint8 | rangeAddrUp,
 |  | uint8 | rangeAddrLow,
 |  | uint16 * | errorAddr
 | ) |  |

This function runs the Non-Destructive Inversion test algorithm. Non-Destructive Inversion test can be considered as a simple linear test that is able to find all Stuck-At faults (the cell remains stuck at a value for any operation) without destroying any user data. The test accesses every Word in the address range defined by the RANGE register, four times. Test Steps:

  1. Read data Word including check bits
  2. write back all bits inverted
  3. Read data Word including check bits
  4. Write back all bits inverted At the end of this procedure the user data remains unchanged and and every bit has been set to 0 and 1. Any single Stuck-At error will be visible as a correctable error. Note: The function clears & sets safety endinit bit while running the test to prevent watchdog TO and automatically restores the endinit state (same state at the time of entering the function) at the end. The Error flags need to be cleared to enable further tracking after the test
    Parameters
    mbistSel | Memory Selection
    rangeSel | enable/disable range Selection (0 - disable, 1- enable)
    rangeAddrUp | when range mode is enabled, it specifies the upper logical block address limit in 64 word increments.
    rangeAddrLow | when range mode is enabled, it specifies the lower logical block address limit.
    errorAddr | If the test fails, it contains the error address (bit0 - bit12) and memory block index (Bit13 - Bit15)
    Returns
    Test Status (0-PASS, 1- FAIL)

Definition at line 547 of file IfxMtu.c.

◆ IfxMtu_writeSramAddress()

IFX_EXTERN void IfxMtu_writeSramAddress | ( | IfxMtu_MbistSel | mbistSel,
 |  | uint16 | sramAddress
 | ) |  |
Parameters
mbistSel | Memory Selection
sramAddress | SRAM address which should be written
Returns
None

Definition at line 620 of file IfxMtu.c.


iLLD_TC38A: MBIST Error Tracking

Functions
MBIST Error Tracking
iLLD » MTU » Standard Driver
Collaboration diagram for MBIST Error Tracking:

Functions

IFX_INLINE boolean | IfxMtu_isErrorTrackingEnabled (IfxMtu_MbistSel mbistSel)
Returns the status of the error tracking. More...
IFX_INLINE boolean | IfxMtu_isErrorTrackingOverflow (IfxMtu_MbistSel mbistSel)
Returns the error tracking overflow status. More...
IFX_INLINE boolean | IfxMtu_checkErrorFlags (IfxMtu_MbistSel mbistSel)
Returns True if any Error Flags are set. More...
IFX_EXTERN void | IfxMtu_clearErrorTracking (IfxMtu_MbistSel mbistSel)
Clears the error tracking registers (ETRR), valid and overflow bits. More...
IFX_EXTERN void | IfxMtu_enableErrorTracking (IfxMtu_MbistSel mbistSel, boolean enable)
Enables the tracking of SRAM errors. More...
IFX_EXTERN uint32 | IfxMtu_getSystemAddress (IfxMtu_MbistSel mbistSel, Ifx_MTU_MC_ETRR trackedSramAddress)
Returns the descrambled system address based on a tracked SRAM error which consists of ADDR and MBI (SRAM address and block) More...
IFX_EXTERN uint8 | IfxMtu_getTrackedSramAddresses (IfxMtu_MbistSel mbistSel, Ifx_MTU_MC_ETRR *trackedSramAddresses)
Returns the tracked SRAM error addresses and memory blocks which are stored in the MBIST ETRR registers. More...

Detailed Description

Function Documentation

◆ IfxMtu_checkErrorFlags()

IFX_INLINE boolean IfxMtu_checkErrorFlags ( IfxMtu_MbistSel mbistSel )

Returns True if any Error Flags are set.

Parameters
mbistSel Memory slection
Returns
True if any error Flag is set

Definition at line 902 of file IfxMtu.h.

Referenced by IfxMtu_runNonDestructiveInversionTest().

◆ IfxMtu_clearErrorTracking()

IFX_EXTERN void IfxMtu_clearErrorTracking ( IfxMtu_MbistSel mbistSel )

Clears the error tracking registers (ETRR), valid and overflow bits.

Parameters
mbistSel Memory Selection
Returns
None

A coding example can be found in How to use the Mtu driver?

Definition at line 119 of file IfxMtu.c.

◆ IfxMtu_enableErrorTracking()

IFX_EXTERN void IfxMtu_enableErrorTracking | ( | IfxMtu_MbistSel | mbistSel,
 |  | boolean | enable
 | ) |  |

Enables the tracking of SRAM errors.

Parameters
mbistSel | Memory Selection
enable | TRUE to enable error tracking, FALSE to disable error tracking.
Returns
None

A coding example can be found in How to use the Mtu driver?

Definition at line 196 of file IfxMtu.c.

◆ IfxMtu_getSystemAddress()

IFX_EXTERN uint32 IfxMtu_getSystemAddress | ( | IfxMtu_MbistSel | mbistSel,
 |  | Ifx_MTU_MC_ETRR | trackedSramAddress
 | ) |  |

Returns the descrambled system address based on a tracked SRAM error which consists of ADDR and MBI (SRAM address and block)

Please note that not all memories of the system are supported by this function. Additional memories will be considered on request.

Parameters
mbistSel | Memory Selection
trackedSramAddress | tracked SRAM address which consists of an ADDR and MBI field (SRAM address and block)
Returns
descrambled system address if supported by this function, otherwise 0

Example usage: see IfxMtu_getTrackedSramAddresses

Definition at line 211 of file IfxMtu.c.

◆ IfxMtu_getTrackedSramAddresses()

IFX_EXTERN uint8 IfxMtu_getTrackedSramAddresses | ( | IfxMtu_MbistSel | mbistSel,
 |  | Ifx_MTU_MC_ETRR * | trackedSramAddresses
 | ) |  |

Returns the tracked SRAM error addresses and memory blocks which are stored in the MBIST ETRR registers.

Parameters
mbistSel | Memory Selection
trackedSramAddresses | will contain the tracked error addresses in trackedSramAdresses[x].B.ADDR and affected blocks in sramAddresses[x].B.MBI

The array size shall be IFXMTU_MAX_TRACKED_ADDRESSES

Returns
number of tracked errors (0..IFXMTU_MAX_TRACKED_ADDRESSES)

Example usage to print out tracked errors of a given memory:

We assume that the MTU clock has already been enabled, and that the MBIST instance has been selected; e.g. for LMU:

uint16 password = IfxScuWdt_getCpuWatchdogPassword();
IfxScuWdt_clearCpuEndinit(password);
IfxMtu_enableModule();
IfxMtu_MbistSel mbistSel = IfxMtu_MbistSel_lmu;
IfxMtu_enableMbistShell(mbistSel);
// for auto-init memories: wait for the end of the clear operation
while (IfxMtu_isAutoInitRunning(mbistSel))
{}

Now the tracking information can be retrieved with:

{
Ifx_MC_ETRR trackedSramAddresses[IFXMTU_MAX_TRACKED_ADDRESSES];
uint8 numTrackedAddresses = IfxMtu_getTrackedSramAddresses(mbistSel, trackedSramAddresses);
clib_ver_printf("Tracked addresses: %d (Overflow: %d)\n",
numTrackedAddresses,
IfxMtu_isErrorTrackingOverflow(mbistSel) ? 1 : 0);
for(int i=0; i<numTrackedAddresses; ++i) {
clib_ver_printf("%d: A:0x%04x MBI:%d -> SystemAddress: 0x%08x\n",
i,
trackedSramAddresses[i].B.ADDR,
trackedSramAddresses[i].B.MBI,
IfxMtu_getSystemAddress(mbistSel, trackedSramAddresses[i]));
}
}

Definition at line 298 of file IfxMtu.c.

◆ IfxMtu_isErrorTrackingEnabled()

IFX_INLINE boolean IfxMtu_isErrorTrackingEnabled ( IfxMtu_MbistSel mbistSel )

Returns the status of the error tracking.

Parameters
mbistSel Memory Selection
Returns
TRUE if error tracking enabled.

Definition at line 868 of file IfxMtu.h.

◆ IfxMtu_isErrorTrackingOverflow()

IFX_INLINE boolean IfxMtu_isErrorTrackingOverflow ( IfxMtu_MbistSel mbistSel )

Returns the error tracking overflow status.

Parameters
mbistSel Memory Selection
Returns
TRUE if more errors were detected since last clear than error tracking registers are available, or if more than one memory block was in error at the same time.

Definition at line 875 of file IfxMtu.h.


iLLD_TC38A: How to use the Mtu driver?

How to use the Mtu driver?
iLLD » MTU
Collaboration diagram for How to use the Mtu driver?:

The Memory Test Unit (MTU) controls and monitors the test, initialization and data integrity checking functions of the various internal memories in the device

The Mtu driver provides set of routines for various Mbist operations

In the following sections it will be described, how to integrate the Mtu driver into the application framework.

Sram Initialisation

Include Files

Include following header file into your C code:

#include <Mtu/IfxMtu.h>
// include below file only if interrupt mode is used.
#include "Src/Std/IfxSrc.h"

Variables

// used only if interrupt mode is used.
static IfxMtu_MbistSel mbistSel;

Interrupt Handler Installation

See also How to define Interrupts?

Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:

// priorities are normally defined in Ifx_IntPrioDef.h
#define IFX_INTPRIO_MTU 10

Add the interrupt service routines to your C code. They have to call the Mtu interrupt handlers:

IFX_INTERRUPT(mtuDoneISR, 0, IFX_INTPRIO_MTU)
{
IfxMtu_isrDone();
}

Finally install the interrupt handlers in your initialisation function:

volatile Ifx_SRC_SRCR *src;
src = &MODULE_SRC.MTUDONE ;
IfxSrc_init(src, IfxCpu_Irq_getTos(IfxCpu_getCoreIndex()) , IFX_INTPRIO_MTU );
IfxSrc_enable(src);
// install interrupt handlers
IfxCpu_Irq_installInterruptHandler(&mtuDoneISR, IFX_INTPRIO_MTU);
IfxCpu_enableInterrupts();

Clear Sram (Synchronous polling mode)

The Sram initialisation in synchronous polling mode (i.e wait till the complete operation is done) can be used as:

clearSram(IfxMtu_MbistSel_cpu0Dspr);

Clear Sram (Asynchronous polling mode)

The Sram initialisation can be triggered by calling IfxMtu_clearSramStart() function, then can be queried for completion in a task using IfxMtu_isMbistDone. Once it's completed, then IfxMtu_clearSramContinue() has to be called. Note: The Safety Endinit watchdog has to be cleared before and set after for the IfxMtu_clearSramStart() and IfxMtu_clearSramContinue() functions.

Following code triggers Sram initilisation.

uint16 password = 0;
password = IfxScuWdt_getSafetyWatchdogPassword();
// Clear EndInit
IfxScuWdt_clearSafetyEndinit(password);
IfxMtu_clearSramStart(IfxMtu_MbistSel_cpu0Dspr);
// Set EndInit Watchdog
IfxScuWdt_setSafetyEndinit(password);

Sram initialisation status can be queried in a task and once done complete the operation using:

if (IfxMtu_isMbistDone(IfxMtu_MbistSel_cpu0Dspr))
{
// Sram Clear operation done
// Clear EndInit
IfxScuWdt_clearSafetyEndinit(password);
IfxMtu_clearSramContinue(IfxMtu_MbistSel_cpu0Dspr);
// Set EndInit Watchdog
IfxScuWdt_setSafetyEndinit(password);
}
else
{
// Sram operation is still in progress
}

Clear Sram (Asynchronous interrupt mode)

Do the interrupt configuration and initialisation as specified in Interrupt Handler Installation The Sram initialisation can be triggered by calling IfxMtu_clearSramStart() function. Once the operation is completed, Mtu Done isr is raised. Inside the Isr IfxMtu_clearSramContinue() has to be called. Note: The Safety Endinit watchdog has to be cleared before and set after for the IfxMtu_clearSramStart() and IfxMtu_clearSramContinue() functions.

Following code triggers Sram initialisation.

uint16 password = 0;
password = IfxScuWdt_getSafetyWatchdogPassword();
// Clear EndInit
IfxScuWdt_clearSafetyEndinit(password);
mbistSel = IfxMtu_MbistSel_cpu0Dspr; // mbistSel is a static / global variable.
IfxMtu_clearSramStart(mbistSel);
// Set EndInit Watchdog
IfxScuWdt_setSafetyEndinit(password);

In the Mtu done isr, the following code can be used.

if (IfxMtu_isMbistDone(mbistSel))
{
// Sram Clear operation done
// Clear EndInit
IfxScuWdt_clearSafetyEndinit(password);
IfxMtu_clearSramContinue(mbistSel);
// Set EndInit Watchdog
IfxScuWdt_setSafetyEndinit(password);
}

Sram Error tracking

Example usage of Sram Error tracking

IfxScuWdt_clearSafetyEndinit(password);
IfxMtu_MbistSel mbistSel = IfxMtu_MbistSel_cpu1Dspr;
Ifx_MC *mc = (Ifx_MC *)(IFXMTU_MC_ADDRESS_BASE + 0x100 * mbistSel);
IfxMtu_enableMbistShell(mbistSel);
// for auto-init memories: wait for the end of the clear operation
while (IfxMtu_isAutoInitRunning(mbistSel))
{}
IfxMtu_enableErrorTracking(mbistSel, TRUE);
uint32 numEtrr = 5;
// print tracked error address
{
Ifx_MC_ETRR trackedSramAddresses[IFXMTU_MAX_TRACKED_ADDRESSES];
uint8 numTrackedAddresses = IfxMtu_getTrackedSramAddresses(mbistSel, trackedSramAddresses);
for(uint32 i=0; i<numEtrr; ++i) {
printf("%d: Error Address:0x%04x, Error System Address:0x%04x \n",
i,
trackedSramAddresses[i].B.ADDR,
IfxMtu_getSystemAddress(mbistSel, trackedSramAddresses[i]));
}
}
}
IfxMtu_disableMbistShell(mbistSel);
IfxScuWdt_setSafetyEndinit(password);

Memory Tests

Non Destructive Inversion Test

Usage Example:

// Enable MTU clock
{
uint16 password = IfxScuWdt_getCpuWatchdogPassword();
IfxScuWdt_clearCpuEndinit(password);
IfxMtu_enableModule();
IfxScuWdt_setCpuEndinit(password);
}
{
uint16 password = IfxScuWdt_getSafetyWatchdogPassword();
uint16 errAddr = 0;
IfxScuWdt_clearSafetyEndinit(password);
// run Non distructive inversion test for cpu0 DSPR memory (Range selection disabled)
IfxMtu_runNonDestructiveInversionTest(IfxMtu_MbistSel_cpu0Dspr, 0, 0xFF, 0, &errAddr);
// Clear Error Flags which are set in case you want to run further tests
IfxMtu_clearErrorTracking(IfxMtu_MbistSel_cpu0Dspr);
IfxScuWdt_setSafetyEndinit(password);
}

Checker Board Test

Usage Example:

// Enable MTU clock
{
uint16 password = IfxScuWdt_getCpuWatchdogPassword();
IfxScuWdt_clearCpuEndinit(password);
IfxMtu_enableModule();
IfxScuWdt_setCpuEndinit(password);
}
{
uint16 password = IfxScuWdt_getSafetyWatchdogPassword();
uint16 errAddr = 0;
IfxScuWdt_clearSafetyEndinit(password);
// run checkerboard test for cpu0 DSPR memory (Range selection disabled)
IfxMtu_runCheckerBoardTest(IfxMtu_MbistSel_cpu0Dspr, 0, 0xFFFF, 0, &errAddr, 0);
IfxScuWdt_setSafetyEndinit(password);
}

MarchU Test

Usage Example:

// Enable MTU clock
{
uint16 password = IfxScuWdt_getCpuWatchdogPassword();
IfxScuWdt_clearCpuEndinit(password);
IfxMtu_enableModule();
IfxScuWdt_setCpuEndinit(password);
}
{
uint16 password = IfxScuWdt_getSafetyWatchdogPassword();
uint16 errAddr = 0;
IfxScuWdt_clearSafetyEndinit(password);
// run March U test for cpu0 DSPR memory (Range selection disabled)
IfxMtu_runMarchUTest(IfxMtu_MbistSel_cpu0Dspr, 0, 0xFFFF, 0, &errAddr);
IfxScuWdt_setSafetyEndinit(password);
}


iLLD_TC38A: IfxMtu_cfg.h File Reference

  • _Impl
Data Structures | Macros | Enumerations | Variables
IfxMtu_cfg.h File Reference
iLLD » MTU

Mtu on-chip implementation data. More...

#include "Cpu/Std/IfxCpu.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "IfxMtu_reg.h"
Include dependency graph for IfxMtu_cfg.h:

Go to the source code of this file.

Data Structures

struct IfxMtu_SramItem
Describes physical parameters of a SRAM memory. More...

Macros

#define | IFXMTU_MC_ADDRESS_BASE (0xF0061000u)
Base address of first MBIST Control Block. More...
#define | IFXMTU_NUM_MBIST_TABLE_ITEMS (84)
Number of MBIST Table items. More...
#define | IFXMTU_MAX_TRACKED_ADDRESSES (5)
Maximum number of tracked SRAM addresses (ETTR) More...
#define | IFXMTU_SCRAMBLED_RANGE_ADDR_DSPR0(memoryMapedAddr) (uint8)((memoryMapedAddr - 0x70000000) / (16 * 64))
#define | IFXMTU_SCRAMBLED_RANGE_ADDR_DSPR1(memoryMapedAddr) (uint8)((memoryMapedAddr - 0x60000000) / (16 * 64))
#define | IFXMTU_SCRAMBLED_RANGE_ADDR_DSPR2(memoryMapedAddr) (uint8)((memoryMapedAddr - 0x50000000) / (16 * 64))
#define | IFXMTU_SCRAMBLED_RANGE_ADDR_DSPR3(memoryMapedAddr) (uint8)((memoryMapedAddr - 0x40000000) / (16 * 64))
#define | IFXMTU_SCRAMBLED_RANGE_ADDR_PSPR0(memoryMapedAddr) (uint8)((memoryMapedAddr - 0x70100000) / (16 * 64))
#define | IFXMTU_SCRAMBLED_RANGE_ADDR_PSPR1(memoryMapedAddr) (uint8)((memoryMapedAddr - 0x60100000) / (16 * 64))
#define | IFXMTU_SCRAMBLED_RANGE_ADDR_PSPR2(memoryMapedAddr) (uint8)((memoryMapedAddr - 0x50100000) / (16 * 64))
#define | IFXMTU_SCRAMBLED_RANGE_ADDR_PSPR3(memoryMapedAddr) (uint8)((memoryMapedAddr - 0x40100000) / (16 * 64))
#define | IFXMTU_SCRAMBLED_RANGE_ADDR_DLMU0(memoryMapedAddr) (uint8)((memoryMapedAddr - 0x90000000) / (16 * 64))
#define | IFXMTU_SCRAMBLED_RANGE_ADDR_DLMU1(memoryMapedAddr) (uint8)((memoryMapedAddr - 0x90010000) / (16 * 64))
#define | IFXMTU_SCRAMBLED_RANGE_ADDR_DLMU2(memoryMapedAddr) (uint8)((memoryMapedAddr - 0x90020000) / (16 * 64))
#define | IFXMTU_SCRAMBLED_RANGE_ADDR_DLMU3(memoryMapedAddr) (uint8)((memoryMapedAddr - 0x90030000) / (16 * 64))

Enumerations

enum IfxMtu_MbistSel {
IfxMtu_MbistSel_none = -1,
IfxMtu_MbistSel_cpu0Dspr = 0,
IfxMtu_MbistSel_cpu0Dtag = 1,
IfxMtu_MbistSel_cpu0Pspr = 2,
IfxMtu_MbistSel_cpu0Ptag = 3,
IfxMtu_MbistSel_cpu0Dlmu = 4,
IfxMtu_MbistSel_cpu1Dspr = 5,
IfxMtu_MbistSel_cpu1Dtag = 6,
IfxMtu_MbistSel_cpu1Pspr = 7,
IfxMtu_MbistSel_cpu1Ptag = 8,
IfxMtu_MbistSel_cpu1Dlmu = 9,
IfxMtu_MbistSel_cpu2Dspr = 10,
IfxMtu_MbistSel_cpu2Dtag = 11,
IfxMtu_MbistSel_cpu2Pspr = 12,
IfxMtu_MbistSel_cpu2Ptag = 13,
IfxMtu_MbistSel_cpu2Dlmu = 14,
IfxMtu_MbistSel_cpu3Dspr = 15,
IfxMtu_MbistSel_cpu3Dtag = 16,
IfxMtu_MbistSel_cpu3Pspr = 17,
IfxMtu_MbistSel_cpu3Ptag = 18,
IfxMtu_MbistSel_cpu3Dlmu = 19,
IfxMtu_MbistSel_lmu0 = 30,
IfxMtu_MbistSel_cpu0Dspr1 = 34,
IfxMtu_MbistSel_cpu1Dspr1 = 35,
IfxMtu_MbistSel_dam0 = 38,
IfxMtu_MbistSel_dma = 41,
IfxMtu_MbistSel_miniMcds = 42,
IfxMtu_MbistSel_gtmFifo = 53,
IfxMtu_MbistSel_gtmMcs0Slow = 54,
IfxMtu_MbistSel_gtmMcs0Fast = 55,
IfxMtu_MbistSel_gtmMcs1Slow = 56,
IfxMtu_MbistSel_gtmMcs1Fast = 57,
IfxMtu_MbistSel_gtmDpll1a = 58,
IfxMtu_MbistSel_gtmDpll1b = 59,
IfxMtu_MbistSel_gtmDpll2 = 60,
IfxMtu_MbistSel_mcan0 = 62,
IfxMtu_MbistSel_mcan1 = 63,
IfxMtu_MbistSel_mcan2 = 64,
IfxMtu_MbistSel_psi5 = 65,
IfxMtu_MbistSel_eray0Obf = 66,
IfxMtu_MbistSel_eray1Obf = 67,
IfxMtu_MbistSel_eray0IbfTbf = 68,
IfxMtu_MbistSel_eray1IbfTbf = 69,
IfxMtu_MbistSel_eray0Mbf = 70,
IfxMtu_MbistSel_eray1Mbf = 71,
IfxMtu_MbistSel_scrXram = 77,
IfxMtu_MbistSel_scrIram = 78,
IfxMtu_MbistSel_ethermacRx = 82,
IfxMtu_MbistSel_ethermacTx = 83
}
MBIST Selection. More...

Variables

IFX_EXTERN const IfxMtu_SramItem IfxMtu_sramTable [IFXMTU_NUM_MBIST_TABLE_ITEMS]

Detailed Description

Mtu on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxMtu_cfg.h.

Data Structure Documentation

◆ IfxMtu_SramItem

struct IfxMtu_SramItem

Describes physical parameters of a SRAM memory.

Definition at line 158 of file IfxMtu_cfg.h.

Data Fields
uint16 | dataSize | Data Size of each memory block.
uint8 | eccInvPos0 | First ECC bit which needs to be inverted.
uint8 | eccInvPos1 | Second ECC bit which needs to be inverted.
uint8 | eccSize | ECC Size of each memory block.
uint8 | numBlocks | number of SRAM blocks

Macro Definition Documentation

◆ IFXMTU_MAX_TRACKED_ADDRESSES

#define IFXMTU_MAX_TRACKED_ADDRESSES (5)

Maximum number of tracked SRAM addresses (ETTR)

Definition at line 74 of file IfxMtu_cfg.h.

Referenced by IfxMtu_getTrackedSramAddresses().

◆ IFXMTU_MC_ADDRESS_BASE

#define IFXMTU_MC_ADDRESS_BASE (0xF0061000u)

Base address of first MBIST Control Block.

Definition at line 66 of file IfxMtu_cfg.h.

◆ IFXMTU_NUM_MBIST_TABLE_ITEMS

#define IFXMTU_NUM_MBIST_TABLE_ITEMS (84)

Number of MBIST Table items.

Definition at line 70 of file IfxMtu_cfg.h.

◆ IFXMTU_SCRAMBLED_RANGE_ADDR_DLMU0

#define IFXMTU_SCRAMBLED_RANGE_ADDR_DLMU0 ( memoryMapedAddr ) (uint8)((memoryMapedAddr - 0x90000000) / (16 * 64))

Definition at line 87 of file IfxMtu_cfg.h.

◆ IFXMTU_SCRAMBLED_RANGE_ADDR_DLMU1

#define IFXMTU_SCRAMBLED_RANGE_ADDR_DLMU1 ( memoryMapedAddr ) (uint8)((memoryMapedAddr - 0x90010000) / (16 * 64))

Definition at line 88 of file IfxMtu_cfg.h.

◆ IFXMTU_SCRAMBLED_RANGE_ADDR_DLMU2

#define IFXMTU_SCRAMBLED_RANGE_ADDR_DLMU2 ( memoryMapedAddr ) (uint8)((memoryMapedAddr - 0x90020000) / (16 * 64))

Definition at line 89 of file IfxMtu_cfg.h.

◆ IFXMTU_SCRAMBLED_RANGE_ADDR_DLMU3

#define IFXMTU_SCRAMBLED_RANGE_ADDR_DLMU3 ( memoryMapedAddr ) (uint8)((memoryMapedAddr - 0x90030000) / (16 * 64))

Definition at line 90 of file IfxMtu_cfg.h.

◆ IFXMTU_SCRAMBLED_RANGE_ADDR_DSPR0

#define IFXMTU_SCRAMBLED_RANGE_ADDR_DSPR0 ( memoryMapedAddr ) (uint8)((memoryMapedAddr - 0x70000000) / (16 * 64))

Conversion to SRAM address from Memory Mapped address

Definition at line 79 of file IfxMtu_cfg.h.

◆ IFXMTU_SCRAMBLED_RANGE_ADDR_DSPR1

#define IFXMTU_SCRAMBLED_RANGE_ADDR_DSPR1 ( memoryMapedAddr ) (uint8)((memoryMapedAddr - 0x60000000) / (16 * 64))

Definition at line 80 of file IfxMtu_cfg.h.

◆ IFXMTU_SCRAMBLED_RANGE_ADDR_DSPR2

#define IFXMTU_SCRAMBLED_RANGE_ADDR_DSPR2 ( memoryMapedAddr ) (uint8)((memoryMapedAddr - 0x50000000) / (16 * 64))

Definition at line 81 of file IfxMtu_cfg.h.

◆ IFXMTU_SCRAMBLED_RANGE_ADDR_DSPR3

#define IFXMTU_SCRAMBLED_RANGE_ADDR_DSPR3 ( memoryMapedAddr ) (uint8)((memoryMapedAddr - 0x40000000) / (16 * 64))

Definition at line 82 of file IfxMtu_cfg.h.

◆ IFXMTU_SCRAMBLED_RANGE_ADDR_PSPR0

#define IFXMTU_SCRAMBLED_RANGE_ADDR_PSPR0 ( memoryMapedAddr ) (uint8)((memoryMapedAddr - 0x70100000) / (16 * 64))

Definition at line 83 of file IfxMtu_cfg.h.

◆ IFXMTU_SCRAMBLED_RANGE_ADDR_PSPR1

#define IFXMTU_SCRAMBLED_RANGE_ADDR_PSPR1 ( memoryMapedAddr ) (uint8)((memoryMapedAddr - 0x60100000) / (16 * 64))

Definition at line 84 of file IfxMtu_cfg.h.

◆ IFXMTU_SCRAMBLED_RANGE_ADDR_PSPR2

#define IFXMTU_SCRAMBLED_RANGE_ADDR_PSPR2 ( memoryMapedAddr ) (uint8)((memoryMapedAddr - 0x50100000) / (16 * 64))

Definition at line 85 of file IfxMtu_cfg.h.

◆ IFXMTU_SCRAMBLED_RANGE_ADDR_PSPR3

#define IFXMTU_SCRAMBLED_RANGE_ADDR_PSPR3 ( memoryMapedAddr ) (uint8)((memoryMapedAddr - 0x40100000) / (16 * 64))

Definition at line 86 of file IfxMtu_cfg.h.

Enumeration Type Documentation

◆ IfxMtu_MbistSel

enum IfxMtu_MbistSel

MBIST Selection.

Enumerator
IfxMtu_MbistSel_none
IfxMtu_MbistSel_cpu0Dspr
IfxMtu_MbistSel_cpu0Dtag
IfxMtu_MbistSel_cpu0Pspr
IfxMtu_MbistSel_cpu0Ptag
IfxMtu_MbistSel_cpu0Dlmu
IfxMtu_MbistSel_cpu1Dspr
IfxMtu_MbistSel_cpu1Dtag
IfxMtu_MbistSel_cpu1Pspr
IfxMtu_MbistSel_cpu1Ptag
IfxMtu_MbistSel_cpu1Dlmu
IfxMtu_MbistSel_cpu2Dspr
IfxMtu_MbistSel_cpu2Dtag
IfxMtu_MbistSel_cpu2Pspr
IfxMtu_MbistSel_cpu2Ptag
IfxMtu_MbistSel_cpu2Dlmu
IfxMtu_MbistSel_cpu3Dspr
IfxMtu_MbistSel_cpu3Dtag
IfxMtu_MbistSel_cpu3Pspr
IfxMtu_MbistSel_cpu3Ptag
IfxMtu_MbistSel_cpu3Dlmu
IfxMtu_MbistSel_lmu0
IfxMtu_MbistSel_cpu0Dspr1
IfxMtu_MbistSel_cpu1Dspr1
IfxMtu_MbistSel_dam0
IfxMtu_MbistSel_dma
IfxMtu_MbistSel_miniMcds
IfxMtu_MbistSel_gtmFifo
IfxMtu_MbistSel_gtmMcs0Slow
IfxMtu_MbistSel_gtmMcs0Fast
IfxMtu_MbistSel_gtmMcs1Slow
IfxMtu_MbistSel_gtmMcs1Fast
IfxMtu_MbistSel_gtmDpll1a
IfxMtu_MbistSel_gtmDpll1b
IfxMtu_MbistSel_gtmDpll2
IfxMtu_MbistSel_mcan0
IfxMtu_MbistSel_mcan1
IfxMtu_MbistSel_mcan2
IfxMtu_MbistSel_psi5
IfxMtu_MbistSel_eray0Obf
IfxMtu_MbistSel_eray1Obf
IfxMtu_MbistSel_eray0IbfTbf
IfxMtu_MbistSel_eray1IbfTbf
IfxMtu_MbistSel_eray0Mbf
IfxMtu_MbistSel_eray1Mbf
IfxMtu_MbistSel_scrXram
IfxMtu_MbistSel_scrIram
IfxMtu_MbistSel_ethermacRx
IfxMtu_MbistSel_ethermacTx

Definition at line 99 of file IfxMtu_cfg.h.

Variable Documentation

◆ IfxMtu_sramTable

IFX_EXTERN const IfxMtu_SramItem IfxMtu_sramTable[IFXMTU_NUM_MBIST_TABLE_ITEMS]

Definition at line 171 of file IfxMtu_cfg.h.


iLLD_TC38A: IfxMtu.h File Reference

  • Mtu
  • Std
Data Structures | Macros | Functions
IfxMtu.h File Reference
iLLD » MTU

MTU basic functionality. More...

#include "_Impl/IfxMtu_cfg.h"
#include "IfxMtu_reg.h"
#include "IfxScu_reg.h"
#include "_Utilities/Ifx_Assert.h"
#include "Scu/Std/IfxScuWdt.h"
#include "Scu/Std/IfxScuCcu.h"
#include "IfxMtu_bf.h"
Include dependency graph for IfxMtu.h:

Go to the source code of this file.

Data Structures

struct | IfxMtu_MbistConfigPattern
struct | IfxMtu_MbistSshConfig
struct | IfxMtu_MbistConfig

Macros

#define | IFXMTU_WAIT_TIMEOUTCOUNT (((sint32)0x1000))
#define | IFXMTU_LOOP_TIMEOUT_CHECK(tVar, tErr)
#define | IFXMTU_MBIST_CONFIG_NONDISTTEST_MCONTROL {(0x4008U)}
Configuration patterns for the MBIST Array of configurations which are used by MCx_CONFIG0 register. More...
#define | IFXMTU_MBIST_CONFIG_NONDISTTEST_CONFIG0
#define | IFXMTU_MBIST_CONFIG_NONDISTTEST_CONFIG1
#define | IFXMTU_ERROR_FLAGS_MASK
Mask for the ERROR flags. More...

Functions

IFX_INLINE void | IfxMtu_disableMbistShell (IfxMtu_MbistSel mbistSel)
Disables the MBIST Shell of the given SRAM. More...
IFX_INLINE void | IfxMtu_enableMbistShell (IfxMtu_MbistSel mbistSel)
Enables the MBIST Shell of the given SRAM. More...
IFX_INLINE void | IfxMtu_enableModule (void)
Enables the MTU module. More...
IFX_INLINE uint32 | IfxMtu_getMemDoneRegisterIndex (IfxMtu_MbistSel mbistSel)
returns register offset (x) and register bit offset (y) (MEMDONE[x].B.y) More...
IFX_INLINE boolean | IfxMtu_isAutoInitRunning (IfxMtu_MbistSel mbistSel)
Returns TRUE if Auto-Initialisation is running for the given SRAM. More...
IFX_INLINE boolean | IfxMtu_isModuleEnabled (void)
Returns the status of whether the module is enabled or not. More...
IFX_INLINE void | IfxMtu_disableErrorReporting (IfxMtu_MbistSel mbistSel)
This function disables alarm-reporting flags. More...
IFX_INLINE void | IfxMtu_enableErrorReporting (IfxMtu_MbistSel mbistSel)
This function enables alarm-reporting flags. More...
IFX_INLINE boolean | IfxMtu_isMbistDone (IfxMtu_MbistSel mbistSel)
This Function returns the status of MBIST clear Sram operation. More...
IFX_EXTERN void | IfxMtu_clearSram (IfxMtu_MbistSel mbistSel)
Function to Clear the MBIST SRAM (Synchronous mode). Note: The function clears & sets safety endinit bit while running the test to prevent watchdog TO and automatically restores the endinit state (same state at the time of entering the function) at the end. More...
IFX_EXTERN void | IfxMtu_clearSramContinue (IfxMtu_MbistSel mbistSel)
This Function should be called after MBIST Clear SRAM operation is completed. Note: The function should be called with safety endinit bit cleared. More...
IFX_EXTERN void | IfxMtu_clearSramStart (IfxMtu_MbistSel mbistSel)
This Function triggers the Clear the MBIST SRAM operation (Asynchronous operation). It doesn't wait till the end of operation. The application has to poll the Mbist status (IfxMtu_isMbistDone()) in a task and once the operation is done, the IfxMtu_clearSramContinue() function should be called to complete the operation. Alternately the application can enable the "memory test done" interrupt. And in the ISR, the IfxMtu_clearSramContinue() has to be called. If Synchronous usage is need, use IfxMtu_clearSram() function. Note: The function should be called with safety endinit bit cleared. More...
IFX_EXTERN boolean | IfxMtu_isTestPass (const IfxMtu_MbistConfig *mbistConfig)
Check if the last MBIST Passed This function shall check for all the configured SSH cells if the tests were passed. More...
IFX_EXTERN void | IfxMtu_readSramAddress (IfxMtu_MbistSel mbistSel, uint16 sramAddress)
IFX_EXTERN uint8 | IfxMtu_runCheckerBoardTest (IfxMtu_MbistSel mbistSel, uint8 rangeSel, uint8 rangeAddrUp, uint8 rangeAddrLow, uint16 *errorAddr, uint32 numberRedundancyLines)
Run CheckerBoard test. This test consists of writing the physical checkerboard pattern into the memory, then reading it back for verification Note: The function clears & sets safety endinit bit while running the test to prevent watchdog TO and automatically restores the endinit state (same state at the time of entering the function) at the end. More...
IFX_EXTERN uint8 | IfxMtu_runMarchUTest (IfxMtu_MbistSel mbistSel, uint8 rangeSel, uint8 rangeAddrUp, uint8 rangeAddrLow, uint16 *errorAddr)
Run March U test. This test MARCHES 0 and 1 values through the memory array in an up and down direction. More precisely, 0 and 1 values are propagated through the memory in each direction; i.e. a single bit cell toggles into each direction with the neighboring cells having a given value and, in another run, the inverse given value. Note: The function clears & sets safety endinit bit while running the test to prevent watchdog TO and automatically restores the endinit state (same state at the time of entering the function) at the end. More...
IFX_EXTERN uint8 | IfxMtu_runNonDestructiveInversionTest (IfxMtu_MbistSel mbistSel, uint8 rangeSel, uint8 rangeAddrUp, uint8 rangeAddrLow, uint16 *errorAddr)
This function runs the Non-Destructive Inversion test algorithm. Non-Destructive Inversion test can be considered as a simple linear test that is able to find all Stuck-At faults (the cell remains stuck at a value for any operation) without destroying any user data. The test accesses every Word in the address range defined by the RANGE register, four times. Test Steps: More...
IFX_EXTERN void | IfxMtu_writeSramAddress (IfxMtu_MbistSel mbistSel, uint16 sramAddress)
IFX_EXTERN boolean | IfxMtu_runMbistAll (const IfxMtu_MbistConfig *const mbistConfig[])
Run the MBIST on all configured Gang configurations Requirements: 1) This function shall run the tests on all SRAMs, which configured by the SSH structure array 1.1) Address range (already scrambled address info) is made available through configuration 1.2) Part of the test pattern is passed through MCONTROL 2) For each cell, the test shall execute all the configuration patterns as passed through pattern array 2.1) Test for each configuration pattern shall end either for the completion or for the failure 2.2) Test shall only end if the test is finished (with or without pass) or timeout 2.3) Failed test shall not be evaluated (this function only runs the tests) 3) Function shall return TRUE if the test execution for one of the configuration patterns is not finished 4) Function shall return FALSE if the test execution is finished Assumptions of usage: 1) This function is not interrupted. 2) DSPRAM of the CPU on which this function is running is being tested 2) For destructive tests, the tested ram shall be re initialized by user. More...
IFX_EXTERN boolean | IfxMtu_runMbist (const IfxMtu_MbistConfig *mbistConfig)
Run the MBIST on configured Gang configuration Requirements: 1) This function shall run the tests on all SRAMs, which configured by the SSH structure array 1.1) Address range (already scrambled address info) is made available through configuration 1.2) Part of the test pattern is passed through MCONTROL 2) For each cell, the test shall execute all the configuration patterns as passed through pattern array 2.1) Test for each configuration pattern shall end either for the completion or for the failure 2.2) Test shall only end if the test is finished (with or without pass) or timeout 2.3) Failed test shall not be evaluated (this function only runs the tests) 3) Function shall return TRUE if the test execution for one of the configuration patterns is not finished 4) Function shall return FALSE if the test execution is finished Assumptions of usage: 1) This function is not interrupted. 2) DSPRAM of the CPU on which this function is running is being tested 2) For destructive tests, the tested ram shall be re initialized by user. More...
IFX_INLINE boolean | IfxMtu_isErrorTrackingEnabled (IfxMtu_MbistSel mbistSel)
Returns the status of the error tracking. More...
IFX_INLINE boolean | IfxMtu_isErrorTrackingOverflow (IfxMtu_MbistSel mbistSel)
Returns the error tracking overflow status. More...
IFX_INLINE boolean | IfxMtu_checkErrorFlags (IfxMtu_MbistSel mbistSel)
Returns True if any Error Flags are set. More...
IFX_EXTERN void | IfxMtu_clearErrorTracking (IfxMtu_MbistSel mbistSel)
Clears the error tracking registers (ETRR), valid and overflow bits. More...
IFX_EXTERN void | IfxMtu_enableErrorTracking (IfxMtu_MbistSel mbistSel, boolean enable)
Enables the tracking of SRAM errors. More...
IFX_EXTERN uint32 | IfxMtu_getSystemAddress (IfxMtu_MbistSel mbistSel, Ifx_MTU_MC_ETRR trackedSramAddress)
Returns the descrambled system address based on a tracked SRAM error which consists of ADDR and MBI (SRAM address and block) More...
IFX_EXTERN uint8 | IfxMtu_getTrackedSramAddresses (IfxMtu_MbistSel mbistSel, Ifx_MTU_MC_ETRR *trackedSramAddresses)
Returns the tracked SRAM error addresses and memory blocks which are stored in the MBIST ETRR registers. More...

Detailed Description

MTU basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxMtu.h.

Macro Definition Documentation

◆ IFXMTU_ERROR_FLAGS_MASK

#define IFXMTU_ERROR_FLAGS_MASK
Value:
(((unsigned int)IFX_MTU_MC_ECCD_EOV_MSK << IFX_MTU_MC_ECCD_EOV_OFF) | \
((unsigned int)IFX_MTU_MC_ECCD_CERR_MSK << IFX_MTU_MC_ECCD_CERR_OFF) | \
((unsigned int)IFX_MTU_MC_ECCD_UCERR_MSK << IFX_MTU_MC_ECCD_UCERR_OFF) | \
((unsigned int)IFX_MTU_MC_ECCD_MERR_MSK << IFX_MTU_MC_ECCD_MERR_OFF))

Mask for the ERROR flags.

Definition at line 359 of file IfxMtu.h.

Referenced by IfxMtu_checkErrorFlags().

◆ IFXMTU_LOOP_TIMEOUT_CHECK

#define IFXMTU_LOOP_TIMEOUT_CHECK | ( | tVar,
 |  | tErr
 | ) |
Value:
{ \
if (((sint32)--tVar) <= 0) \
{ \
tErr = (uint8)1; \
break; \
} \
else \
{ \
} \
}
sint32
long sint32
Definition: Platform_Types.h:134
uint8
unsigned char uint8
Definition: Platform_Types.h:108

Definition at line 323 of file IfxMtu.h.

◆ IFXMTU_MBIST_CONFIG_NONDISTTEST_CONFIG0

#define IFXMTU_MBIST_CONFIG_NONDISTTEST_CONFIG0
Value:
{ \
( \
(5U << IFX_MTU_MC_CONFIG0_ACCSTYPE_OFF) | \
(4U << IFX_MTU_MC_CONFIG0_NUMACCS_OFF) \
) \
}

Definition at line 340 of file IfxMtu.h.

◆ IFXMTU_MBIST_CONFIG_NONDISTTEST_CONFIG1

#define IFXMTU_MBIST_CONFIG_NONDISTTEST_CONFIG1
Value:
{ \
( \
(8U << IFX_MTU_MC_CONFIG1_ACCSPAT_OFF) | \
(0U << IFX_MTU_MC_CONFIG1_SELFASTB_OFF) | \
(5U << IFX_MTU_MC_CONFIG1_AG_MOD_OFF) \
) \
}

Definition at line 348 of file IfxMtu.h.

◆ IFXMTU_MBIST_CONFIG_NONDISTTEST_MCONTROL

#define IFXMTU_MBIST_CONFIG_NONDISTTEST_MCONTROL {(0x4008U)}

Configuration patterns for the MBIST Array of configurations which are used by MCx_CONFIG0 register.

Definition at line 338 of file IfxMtu.h.

◆ IFXMTU_WAIT_TIMEOUTCOUNT

#define IFXMTU_WAIT_TIMEOUTCOUNT (((sint32)0x1000))

Definition at line 321 of file IfxMtu.h.

Referenced by IfxMtu_runMbistClearRam(), IfxMtu_runMbistConfigMtest(), IfxMtu_runMbistConfigPatterns(), and IfxMtu_runMbistEnd().


iLLD_TC38A: PMS

Modules | Files
PMS
iLLD
Collaboration diagram for PMS:

Modules

Implementation
Pm and Evr Drivers
PMS Pin Mapping

Files

file | IfxPms_cfg.h
PMS on-chip implementation data.
file | IfxPms_PinMap.c
PMS I/O map.
file | IfxPms_PinMap.h
PMS I/O map.
file | IfxPmsEvr.h
PMS basic functionality.
file | IfxPmsPm.h
PMS basic functionality.

Detailed Description


iLLD_TC38A: Implementation

Implementation
iLLD » PMS
Collaboration diagram for Implementation:


iLLD_TC38A: Pm and Evr Drivers

Modules
Pm and Evr Drivers
iLLD » PMS
Collaboration diagram for Pm and Evr Drivers:

Modules

EVR
PM

Detailed Description


iLLD_TC38A: EVR

Modules
EVR
iLLD » PMS » Pm and Evr Drivers
Collaboration diagram for EVR:

Modules

Enumerations
Over Voltage Functions
Module Functions
Under Voltage Functions
EVRC Functions
EVR33 Functions
SWD Functions

Detailed Description


iLLD_TC38A: Enumerations

Enumerations
Enumerations
iLLD » PMS » Pm and Evr Drivers » EVR
Collaboration diagram for Enumerations:

Enumerations

enum IfxPmsEvr_EnableInterrupt {
IfxPmsEvr_EnableInterrupt_ovswd = 0,
IfxPmsEvr_EnableInterrupt_uvswd = 1,
IfxPmsEvr_EnableInterrupt_ov33 = 2,
IfxPmsEvr_EnableInterrupt_uv33 = 3,
IfxPmsEvr_EnableInterrupt_ovc = 4,
IfxPmsEvr_EnableInterrupt_uvc = 5,
IfxPmsEvr_EnableInterrupt_ovpre = 6,
IfxPmsEvr_EnableInterrupt_uvpre = 7,
IfxPmsEvr_EnableInterrupt_ovddm = 8,
IfxPmsEvr_EnableInterrupt_uvddm = 9,
IfxPmsEvr_EnableInterrupt_ovsb = 10,
IfxPmsEvr_EnableInterrupt_uvsb = 11,
IfxPmsEvr_EnableInterrupt_evrcmod = 16,
IfxPmsEvr_EnableInterrupt_sdvok = 17,
IfxPmsEvr_EnableInterrupt_synclck = 18,
IfxPmsEvr_EnableInterrupt_swdlvl = 19,
IfxPmsEvr_EnableInterrupt_wutwkp = 21,
IfxPmsEvr_EnableInterrupt_esr0wkp = 22,
IfxPmsEvr_EnableInterrupt_esr1wkp = 23,
IfxPmsEvr_EnableInterrupt_pinawkp = 24,
IfxPmsEvr_EnableInterrupt_pinbwkp = 25,
IfxPmsEvr_EnableInterrupt_scrint = 26,
IfxPmsEvr_EnableInterrupt_scrrst = 27,
IfxPmsEvr_EnableInterrupt_screcc = 28,
IfxPmsEvr_EnableInterrupt_scrwdt = 29
}
Configure respective interrupts define in register Ifx_PMS.PMSIEN. More...
enum IfxPmsEvr_EvrcMode {
IfxPmsEvr_EvrcMode_pwmMode = 0,
IfxPmsEvr_EvrcMode_lowPowerMode = 1,
IfxPmsEvr_EvrcMode_startupMode = 2,
IfxPmsEvr_EvrcMode_disableMode = 3
}
Current operation mode of EVRC Regulator defined in Ifx_PMS.EVR.STAT.B.EVRCMOD. More...
enum IfxPmsEvr_ExtSyncSwitchingFreqDivFactor {
IfxPmsEvr_ExtSyncSwitchingFreqDivFactor_1 = 0,
IfxPmsEvr_ExtSyncSwitchingFreqDivFactor_2 = 1,
IfxPmsEvr_ExtSyncSwitchingFreqDivFactor_4 = 2,
IfxPmsEvr_ExtSyncSwitchingFreqDivFactor_8 = 3,
IfxPmsEvr_ExtSyncSwitchingFreqDivFactor_16 = 4,
IfxPmsEvr_ExtSyncSwitchingFreqDivFactor_32 = 5
}
Switching frequency division factor for external synchronisation defined in Ifx_PMS.EVRSDCTRL7.B.SYNCDIVFAC. More...
enum IfxPmsEvr_OverVoltageMonitoring {
IfxPmsEvr_OverVoltageMonitoring_inactive = 0,
IfxPmsEvr_OverVoltageMonitoring_lowToHighVoltageTransition = 1,
IfxPmsEvr_OverVoltageMonitoring_highToLowVoltageTransition = 2,
IfxPmsEvr_OverVoltageMonitoring_eitherDirectionVoltageTransition = 3
}
Monitoring OverVoltage for all bitfields defined in .Ifx_PMS.EVR.MONCTRL register for overvoltage monitoring. More...
enum IfxPmsEvr_PrimaryAdcTrimValue {
IfxPmsEvr_PrimaryAdcTrimValue_0 = 0,
IfxPmsEvr_PrimaryAdcTrimValue_1,
IfxPmsEvr_PrimaryAdcTrimValue_2,
IfxPmsEvr_PrimaryAdcTrimValue_3,
IfxPmsEvr_PrimaryAdcTrimValue_4,
IfxPmsEvr_PrimaryAdcTrimValue_5,
IfxPmsEvr_PrimaryAdcTrimValue_6,
IfxPmsEvr_PrimaryAdcTrimValue_7,
IfxPmsEvr_PrimaryAdcTrimValue_8,
IfxPmsEvr_PrimaryAdcTrimValue_9,
IfxPmsEvr_PrimaryAdcTrimValue_10,
IfxPmsEvr_PrimaryAdcTrimValue_11,
IfxPmsEvr_PrimaryAdcTrimValue_12,
IfxPmsEvr_PrimaryAdcTrimValue_13,
IfxPmsEvr_PrimaryAdcTrimValue_14,
IfxPmsEvr_PrimaryAdcTrimValue_15,
IfxPmsEvr_PrimaryAdcTrimValue_16,
IfxPmsEvr_PrimaryAdcTrimValue_17,
IfxPmsEvr_PrimaryAdcTrimValue_18,
IfxPmsEvr_PrimaryAdcTrimValue_19,
IfxPmsEvr_PrimaryAdcTrimValue_20,
IfxPmsEvr_PrimaryAdcTrimValue_21,
IfxPmsEvr_PrimaryAdcTrimValue_22,
IfxPmsEvr_PrimaryAdcTrimValue_23,
IfxPmsEvr_PrimaryAdcTrimValue_24,
IfxPmsEvr_PrimaryAdcTrimValue_25,
IfxPmsEvr_PrimaryAdcTrimValue_26,
IfxPmsEvr_PrimaryAdcTrimValue_27,
IfxPmsEvr_PrimaryAdcTrimValue_28,
IfxPmsEvr_PrimaryAdcTrimValue_29,
IfxPmsEvr_PrimaryAdcTrimValue_30,
IfxPmsEvr_PrimaryAdcTrimValue_31,
IfxPmsEvr_PrimaryAdcTrimValue_32,
IfxPmsEvr_PrimaryAdcTrimValue_33,
IfxPmsEvr_PrimaryAdcTrimValue_34,
IfxPmsEvr_PrimaryAdcTrimValue_35,
IfxPmsEvr_PrimaryAdcTrimValue_36,
IfxPmsEvr_PrimaryAdcTrimValue_37,
IfxPmsEvr_PrimaryAdcTrimValue_38,
IfxPmsEvr_PrimaryAdcTrimValue_39,
IfxPmsEvr_PrimaryAdcTrimValue_40,
IfxPmsEvr_PrimaryAdcTrimValue_41,
IfxPmsEvr_PrimaryAdcTrimValue_42,
IfxPmsEvr_PrimaryAdcTrimValue_43,
IfxPmsEvr_PrimaryAdcTrimValue_44,
IfxPmsEvr_PrimaryAdcTrimValue_45,
IfxPmsEvr_PrimaryAdcTrimValue_46,
IfxPmsEvr_PrimaryAdcTrimValue_47,
IfxPmsEvr_PrimaryAdcTrimValue_48,
IfxPmsEvr_PrimaryAdcTrimValue_49,
IfxPmsEvr_PrimaryAdcTrimValue_50,
IfxPmsEvr_PrimaryAdcTrimValue_51,
IfxPmsEvr_PrimaryAdcTrimValue_52,
IfxPmsEvr_PrimaryAdcTrimValue_53,
IfxPmsEvr_PrimaryAdcTrimValue_54,
IfxPmsEvr_PrimaryAdcTrimValue_55,
IfxPmsEvr_PrimaryAdcTrimValue_56,
IfxPmsEvr_PrimaryAdcTrimValue_57,
IfxPmsEvr_PrimaryAdcTrimValue_58,
IfxPmsEvr_PrimaryAdcTrimValue_59,
IfxPmsEvr_PrimaryAdcTrimValue_60,
IfxPmsEvr_PrimaryAdcTrimValue_61,
IfxPmsEvr_PrimaryAdcTrimValue_62,
IfxPmsEvr_PrimaryAdcTrimValue_63
}
set TRIM Value For respective Voltages. Defined in Ifx_PMS.EVR.TRIM and Ifx_PMS.EVR.TRIM2 More...
enum IfxPmsEvr_SecondaryVoltageErrorCounter {
IfxPmsEvr_SecondaryVoltageErrorCounter_level0 = 0,
IfxPmsEvr_SecondaryVoltageErrorCounter_level1,
IfxPmsEvr_SecondaryVoltageErrorCounter_level2,
IfxPmsEvr_SecondaryVoltageErrorCounter_level3,
IfxPmsEvr_SecondaryVoltageErrorCounter_level4,
IfxPmsEvr_SecondaryVoltageErrorCounter_level5,
IfxPmsEvr_SecondaryVoltageErrorCounter_level6,
IfxPmsEvr_SecondaryVoltageErrorCounter_level7,
IfxPmsEvr_SecondaryVoltageErrorCounter_level8,
IfxPmsEvr_SecondaryVoltageErrorCounter_level9,
IfxPmsEvr_SecondaryVoltageErrorCounter_level10,
IfxPmsEvr_SecondaryVoltageErrorCounter_level11,
IfxPmsEvr_SecondaryVoltageErrorCounter_level12,
IfxPmsEvr_SecondaryVoltageErrorCounter_level13,
IfxPmsEvr_SecondaryVoltageErrorCounter_level14,
IfxPmsEvr_SecondaryVoltageErrorCounter_level15,
IfxPmsEvr_SecondaryVoltageErrorCounter_level16,
IfxPmsEvr_SecondaryVoltageErrorCounter_level17,
IfxPmsEvr_SecondaryVoltageErrorCounter_level18,
IfxPmsEvr_SecondaryVoltageErrorCounter_level19,
IfxPmsEvr_SecondaryVoltageErrorCounter_level20,
IfxPmsEvr_SecondaryVoltageErrorCounter_level21,
IfxPmsEvr_SecondaryVoltageErrorCounter_level22,
IfxPmsEvr_SecondaryVoltageErrorCounter_level23,
IfxPmsEvr_SecondaryVoltageErrorCounter_level24,
IfxPmsEvr_SecondaryVoltageErrorCounter_level25,
IfxPmsEvr_SecondaryVoltageErrorCounter_level26,
IfxPmsEvr_SecondaryVoltageErrorCounter_level27,
IfxPmsEvr_SecondaryVoltageErrorCounter_level28,
IfxPmsEvr_SecondaryVoltageErrorCounter_level29,
IfxPmsEvr_SecondaryVoltageErrorCounter_level30,
IfxPmsEvr_SecondaryVoltageErrorCounter_level31,
IfxPmsEvr_SecondaryVoltageErrorCounter_level32,
IfxPmsEvr_SecondaryVoltageErrorCounter_level33,
IfxPmsEvr_SecondaryVoltageErrorCounter_level34,
IfxPmsEvr_SecondaryVoltageErrorCounter_level35,
IfxPmsEvr_SecondaryVoltageErrorCounter_level36,
IfxPmsEvr_SecondaryVoltageErrorCounter_level37,
IfxPmsEvr_SecondaryVoltageErrorCounter_level38,
IfxPmsEvr_SecondaryVoltageErrorCounter_level39,
IfxPmsEvr_SecondaryVoltageErrorCounter_level40,
IfxPmsEvr_SecondaryVoltageErrorCounter_level41,
IfxPmsEvr_SecondaryVoltageErrorCounter_level42,
IfxPmsEvr_SecondaryVoltageErrorCounter_level43,
IfxPmsEvr_SecondaryVoltageErrorCounter_level44,
IfxPmsEvr_SecondaryVoltageErrorCounter_level45,
IfxPmsEvr_SecondaryVoltageErrorCounter_level46,
IfxPmsEvr_SecondaryVoltageErrorCounter_level47,
IfxPmsEvr_SecondaryVoltageErrorCounter_level48,
IfxPmsEvr_SecondaryVoltageErrorCounter_level49,
IfxPmsEvr_SecondaryVoltageErrorCounter_level50,
IfxPmsEvr_SecondaryVoltageErrorCounter_level51,
IfxPmsEvr_SecondaryVoltageErrorCounter_level52,
IfxPmsEvr_SecondaryVoltageErrorCounter_level53,
IfxPmsEvr_SecondaryVoltageErrorCounter_level54,
IfxPmsEvr_SecondaryVoltageErrorCounter_level55,
IfxPmsEvr_SecondaryVoltageErrorCounter_level56,
IfxPmsEvr_SecondaryVoltageErrorCounter_level57,
IfxPmsEvr_SecondaryVoltageErrorCounter_level58,
IfxPmsEvr_SecondaryVoltageErrorCounter_level59,
IfxPmsEvr_SecondaryVoltageErrorCounter_level60,
IfxPmsEvr_SecondaryVoltageErrorCounter_level61,
IfxPmsEvr_SecondaryVoltageErrorCounter_level62,
IfxPmsEvr_SecondaryVoltageErrorCounter_level63
}
This Declare the Under and overvoltage counter defined in Ifx_PMS.EVR.MONFILT.B.ERRCNTLIMT. More...
enum IfxPmsEvr_SupplyFilter {
IfxPmsEvr_SupplyFilter_eachConversionResult = 0,
IfxPmsEvr_SupplyFilter_avgAdcConversionResult0 = 1,
IfxPmsEvr_SupplyFilter_avgAdcConversionResult1,
IfxPmsEvr_SupplyFilter_avgAdcConversionResult2,
IfxPmsEvr_SupplyFilter_avgAdcConversionResult3,
IfxPmsEvr_SupplyFilter_avgAdcConversionResult4,
IfxPmsEvr_SupplyFilter_avgAdcConversionResult5,
IfxPmsEvr_SupplyFilter_avgAdcConversionResult6,
IfxPmsEvr_SupplyFilter_avgAdcConversionResult7,
IfxPmsEvr_SupplyFilter_avgAdcConversionResult8,
IfxPmsEvr_SupplyFilter_avgAdcConversionResult9,
IfxPmsEvr_SupplyFilter_avgAdcConversionResult10,
IfxPmsEvr_SupplyFilter_avgAdcConversionResult11,
IfxPmsEvr_SupplyFilter_avgAdcConversionResult12,
IfxPmsEvr_SupplyFilter_avgAdcConversionResult13,
IfxPmsEvr_SupplyFilter_avgAdcConversionResult14
}
ADC result for the generating Alarm declare in Ifx_PMS.EVR.MONFILT. More...
enum IfxPmsEvr_SupplyMode {
IfxPmsEvr_SupplyMode_evrc = 0,
IfxPmsEvr_SupplyMode_evr33 = 1,
IfxPmsEvr_SupplyMode_swd = 2,
IfxPmsEvr_SupplyMode_evrpr = 3,
IfxPmsEvr_SupplyMode_vddm = 4,
IfxPmsEvr_SupplyMode_sb = 5
}
Controls the voltage supply Type. More...
enum IfxPmsEvr_UnderVoltageMonitoring {
IfxPmsEvr_UnderVoltageMonitoring_inactive = 0,
IfxPmsEvr_UnderVoltageMonitoring_lowToHighVoltageTransition = 1,
IfxPmsEvr_UnderVoltageMonitoring_highToLowVoltageTransition = 2,
IfxPmsEvr_UnderVoltageMonitoring_eitherDirectionVoltageTransition = 3
}
Monitoring underVoltage for all bitfields defined in Ifx_PMS.EVR.MONCTRL register for undervoltage monitoring. More...

Detailed Description

Enumeration Type Documentation

◆ IfxPmsEvr_EnableInterrupt

enum IfxPmsEvr_EnableInterrupt

Configure respective interrupts define in register Ifx_PMS.PMSIEN.

Enumerator
IfxPmsEvr_EnableInterrupt_ovswd | OVSWD Interrupt enable.
IfxPmsEvr_EnableInterrupt_uvswd | UVSWD Interrupt enable.
IfxPmsEvr_EnableInterrupt_ov33 | OV33Interrupt enable.
IfxPmsEvr_EnableInterrupt_uv33 | UV33 Interrupt enable.
IfxPmsEvr_EnableInterrupt_ovc | OVC Interrupt enable.
IfxPmsEvr_EnableInterrupt_uvc | UVC Interrupt enable.
IfxPmsEvr_EnableInterrupt_ovpre | OVPRE Interrupt enable.
IfxPmsEvr_EnableInterrupt_uvpre | UVPRE Interrupt enable.
IfxPmsEvr_EnableInterrupt_ovddm | OVDDM Interrupt enable.
IfxPmsEvr_EnableInterrupt_uvddm | UVDDM Interrupt enable.
IfxPmsEvr_EnableInterrupt_ovsb | OVSB Interrupt enable.
IfxPmsEvr_EnableInterrupt_uvsb | UVSB Interrupt enable.
IfxPmsEvr_EnableInterrupt_evrcmod | EVRCMOD Interrupt enable.
IfxPmsEvr_EnableInterrupt_sdvok | SDVOK Interrupt enable.
IfxPmsEvr_EnableInterrupt_synclck | SD SYNCLCK Interrupt enable.
IfxPmsEvr_EnableInterrupt_swdlvl | SWDLVL Interrupt enable.
IfxPmsEvr_EnableInterrupt_wutwkp | WUT WKP Interrupt enable.
IfxPmsEvr_EnableInterrupt_esr0wkp | ESR0 WKP Interrupt enable.
IfxPmsEvr_EnableInterrupt_esr1wkp | ESR1 WKP Interrupt enable.
IfxPmsEvr_EnableInterrupt_pinawkp | PINA WKP Interrupt enable.
IfxPmsEvr_EnableInterrupt_pinbwkp | PINB WKP Interrupt enable.
IfxPmsEvr_EnableInterrupt_scrint | SCR INT Interrupt enable.
IfxPmsEvr_EnableInterrupt_scrrst | SCR RST Interrupt enable.
IfxPmsEvr_EnableInterrupt_screcc | SCR ECC Interrupt enable.
IfxPmsEvr_EnableInterrupt_scrwdt | SCR WDT Interrupt enable.

Definition at line 94 of file IfxPmsEvr.h.

◆ IfxPmsEvr_EvrcMode

enum IfxPmsEvr_EvrcMode

Current operation mode of EVRC Regulator defined in Ifx_PMS.EVR.STAT.B.EVRCMOD.

Enumerator
IfxPmsEvr_EvrcMode_pwmMode | The step-down converter is in normal operational closed loop state.
IfxPmsEvr_EvrcMode_lowPowerMode | The step-down converter is in low power state.
IfxPmsEvr_EvrcMode_startupMode | The step-down converter is in start-up phase.
IfxPmsEvr_EvrcMode_disableMode | EVRC is Disable.

Definition at line 125 of file IfxPmsEvr.h.

◆ IfxPmsEvr_ExtSyncSwitchingFreqDivFactor

enum IfxPmsEvr_ExtSyncSwitchingFreqDivFactor

Switching frequency division factor for external synchronisation defined in Ifx_PMS.EVRSDCTRL7.B.SYNCDIVFAC.

Enumerator
IfxPmsEvr_ExtSyncSwitchingFreqDivFactor_1 | fDCDCSYNC = fDCDC. The actual duty cycle is routed.
IfxPmsEvr_ExtSyncSwitchingFreqDivFactor_2 | fDCDCSYNC = fDCDC/2. Duty cycle is constant at 50%.
IfxPmsEvr_ExtSyncSwitchingFreqDivFactor_4 | fDCDCSYNC = fDCDC/4. Duty cycle is constant at 50%.
IfxPmsEvr_ExtSyncSwitchingFreqDivFactor_8 | fDCDCSYNC = fDCDC/8. Duty cycle is constant at 50%.
IfxPmsEvr_ExtSyncSwitchingFreqDivFactor_16 | fDCDCSYNC = fDCDC/16. Duty cycle is constant at 50%.
IfxPmsEvr_ExtSyncSwitchingFreqDivFactor_32 | fDCDCSYNC = fDCDC/32. Duty cycle is constant at 50%.

Definition at line 138 of file IfxPmsEvr.h.

◆ IfxPmsEvr_OverVoltageMonitoring

enum IfxPmsEvr_OverVoltageMonitoring

Monitoring OverVoltage for all bitfields defined in .Ifx_PMS.EVR.MONCTRL register for overvoltage monitoring.

Enumerator
IfxPmsEvr_OverVoltageMonitoring_inactive | Over-Voltage Monitoring inactive.
IfxPmsEvr_OverVoltageMonitoring_lowToHighVoltageTransition | Over-Voltage event is generated when threshold is crossed in lower to higher voltage transition.
IfxPmsEvr_OverVoltageMonitoring_highToLowVoltageTransition | Over-Voltage event is generated when threshold is crossed in higher to lower voltage transition.
IfxPmsEvr_OverVoltageMonitoring_eitherDirectionVoltageTransition | Over-Voltage event is generated when threshold is crossed in either direction.

Definition at line 151 of file IfxPmsEvr.h.

◆ IfxPmsEvr_PrimaryAdcTrimValue

enum IfxPmsEvr_PrimaryAdcTrimValue

set TRIM Value For respective Voltages. Defined in Ifx_PMS.EVR.TRIM and Ifx_PMS.EVR.TRIM2

Enumerator
IfxPmsEvr_PrimaryAdcTrimValue_0 | Primary Adc Trim Value 0.
IfxPmsEvr_PrimaryAdcTrimValue_1 | Primary Adc Trim Value 1.
IfxPmsEvr_PrimaryAdcTrimValue_2 | Primary Adc Trim Value 2.
IfxPmsEvr_PrimaryAdcTrimValue_3 | Primary Adc Trim Value 3.
IfxPmsEvr_PrimaryAdcTrimValue_4 | Primary Adc Trim Value 4.
IfxPmsEvr_PrimaryAdcTrimValue_5 | Primary Adc Trim Value 5.
IfxPmsEvr_PrimaryAdcTrimValue_6 | Primary Adc Trim Value 6.
IfxPmsEvr_PrimaryAdcTrimValue_7 | Primary Adc Trim Value 7.
IfxPmsEvr_PrimaryAdcTrimValue_8 | Primary Adc Trim Value 8.
IfxPmsEvr_PrimaryAdcTrimValue_9 | Primary Adc Trim Value 9.
IfxPmsEvr_PrimaryAdcTrimValue_10 | Primary Adc Trim Value 10.
IfxPmsEvr_PrimaryAdcTrimValue_11 | Primary Adc Trim Value 11.
IfxPmsEvr_PrimaryAdcTrimValue_12 | Primary Adc Trim Value 12.
IfxPmsEvr_PrimaryAdcTrimValue_13 | Primary Adc Trim Value 13.
IfxPmsEvr_PrimaryAdcTrimValue_14 | Primary Adc Trim Value 14.
IfxPmsEvr_PrimaryAdcTrimValue_15 | Primary Adc Trim Value 15.
IfxPmsEvr_PrimaryAdcTrimValue_16 | Primary Adc Trim Value 16.
IfxPmsEvr_PrimaryAdcTrimValue_17 | Primary Adc Trim Value 17.
IfxPmsEvr_PrimaryAdcTrimValue_18 | Primary Adc Trim Value 18.
IfxPmsEvr_PrimaryAdcTrimValue_19 | Primary Adc Trim Value 19.
IfxPmsEvr_PrimaryAdcTrimValue_20 | Primary Adc Trim Value 20.
IfxPmsEvr_PrimaryAdcTrimValue_21 | Primary Adc Trim Value 21.
IfxPmsEvr_PrimaryAdcTrimValue_22 | Primary Adc Trim Value 22.
IfxPmsEvr_PrimaryAdcTrimValue_23 | Primary Adc Trim Value 23.
IfxPmsEvr_PrimaryAdcTrimValue_24 | Primary Adc Trim Value 24.
IfxPmsEvr_PrimaryAdcTrimValue_25 | Primary Adc Trim Value 25.
IfxPmsEvr_PrimaryAdcTrimValue_26 | Primary Adc Trim Value 26.
IfxPmsEvr_PrimaryAdcTrimValue_27 | Primary Adc Trim Value 27.
IfxPmsEvr_PrimaryAdcTrimValue_28 | Primary Adc Trim Value 28.
IfxPmsEvr_PrimaryAdcTrimValue_29 | Primary Adc Trim Value 29.
IfxPmsEvr_PrimaryAdcTrimValue_30 | Primary Adc Trim Value 30.
IfxPmsEvr_PrimaryAdcTrimValue_31 | Primary Adc Trim Value 31.
IfxPmsEvr_PrimaryAdcTrimValue_32 | Primary Adc Trim Value 32.
IfxPmsEvr_PrimaryAdcTrimValue_33 | Primary Adc Trim Value 33.
IfxPmsEvr_PrimaryAdcTrimValue_34 | Primary Adc Trim Value 34.
IfxPmsEvr_PrimaryAdcTrimValue_35 | Primary Adc Trim Value 35.
IfxPmsEvr_PrimaryAdcTrimValue_36 | Primary Adc Trim Value 36.
IfxPmsEvr_PrimaryAdcTrimValue_37 | Primary Adc Trim Value 37.
IfxPmsEvr_PrimaryAdcTrimValue_38 | Primary Adc Trim Value 38.
IfxPmsEvr_PrimaryAdcTrimValue_39 | Primary Adc Trim Value 39.
IfxPmsEvr_PrimaryAdcTrimValue_40 | Primary Adc Trim Value 40.
IfxPmsEvr_PrimaryAdcTrimValue_41 | Primary Adc Trim Value 41.
IfxPmsEvr_PrimaryAdcTrimValue_42 | Primary Adc Trim Value 42.
IfxPmsEvr_PrimaryAdcTrimValue_43 | Primary Adc Trim Value 43.
IfxPmsEvr_PrimaryAdcTrimValue_44 | Primary Adc Trim Value 44.
IfxPmsEvr_PrimaryAdcTrimValue_45 | Primary Adc Trim Value 45.
IfxPmsEvr_PrimaryAdcTrimValue_46 | Primary Adc Trim Value 46.
IfxPmsEvr_PrimaryAdcTrimValue_47 | Primary Adc Trim Value 47.
IfxPmsEvr_PrimaryAdcTrimValue_48 | Primary Adc Trim Value 48.
IfxPmsEvr_PrimaryAdcTrimValue_49 | Primary Adc Trim Value 49.
IfxPmsEvr_PrimaryAdcTrimValue_50 | Primary Adc Trim Value 50.
IfxPmsEvr_PrimaryAdcTrimValue_51 | Primary Adc Trim Value 51.
IfxPmsEvr_PrimaryAdcTrimValue_52 | Primary Adc Trim Value 52.
IfxPmsEvr_PrimaryAdcTrimValue_53 | Primary Adc Trim Value 53.
IfxPmsEvr_PrimaryAdcTrimValue_54 | Primary Adc Trim Value 54.
IfxPmsEvr_PrimaryAdcTrimValue_55 | Primary Adc Trim Value 55.
IfxPmsEvr_PrimaryAdcTrimValue_56 | Primary Adc Trim Value 56.
IfxPmsEvr_PrimaryAdcTrimValue_57 | Primary Adc Trim Value 57.
IfxPmsEvr_PrimaryAdcTrimValue_58 | Primary Adc Trim Value 58.
IfxPmsEvr_PrimaryAdcTrimValue_59 | Primary Adc Trim Value 59.
IfxPmsEvr_PrimaryAdcTrimValue_60 | Primary Adc Trim Value 60.
IfxPmsEvr_PrimaryAdcTrimValue_61 | Primary Adc Trim Value 61.
IfxPmsEvr_PrimaryAdcTrimValue_62 | Primary Adc Trim Value 62.
IfxPmsEvr_PrimaryAdcTrimValue_63 | Primary Adc Trim Value 63.

Definition at line 162 of file IfxPmsEvr.h.

◆ IfxPmsEvr_SecondaryVoltageErrorCounter

enum IfxPmsEvr_SecondaryVoltageErrorCounter

This Declare the Under and overvoltage counter defined in Ifx_PMS.EVR.MONFILT.B.ERRCNTLIMT.

Enumerator
IfxPmsEvr_SecondaryVoltageErrorCounter_level0 | Error Counter Limit 0.
IfxPmsEvr_SecondaryVoltageErrorCounter_level1 | Error Counter Limit 1.
IfxPmsEvr_SecondaryVoltageErrorCounter_level2 | Error Counter Limit 2.
IfxPmsEvr_SecondaryVoltageErrorCounter_level3 | Error Counter Limit 3.
IfxPmsEvr_SecondaryVoltageErrorCounter_level4 | Error Counter Limit 4.
IfxPmsEvr_SecondaryVoltageErrorCounter_level5 | Error Counter Limit 5.
IfxPmsEvr_SecondaryVoltageErrorCounter_level6 | Error Counter Limit 6.
IfxPmsEvr_SecondaryVoltageErrorCounter_level7 | Error Counter Limit 7.
IfxPmsEvr_SecondaryVoltageErrorCounter_level8 | Error Counter Limit 8.
IfxPmsEvr_SecondaryVoltageErrorCounter_level9 | Error Counter Limit 9.
IfxPmsEvr_SecondaryVoltageErrorCounter_level10 | Error Counter Limit 10.
IfxPmsEvr_SecondaryVoltageErrorCounter_level11 | Error Counter Limit 11.
IfxPmsEvr_SecondaryVoltageErrorCounter_level12 | Error Counter Limit 12.
IfxPmsEvr_SecondaryVoltageErrorCounter_level13 | Error Counter Limit 13.
IfxPmsEvr_SecondaryVoltageErrorCounter_level14 | Error Counter Limit 14.
IfxPmsEvr_SecondaryVoltageErrorCounter_level15 | Error Counter Limit 15.
IfxPmsEvr_SecondaryVoltageErrorCounter_level16 | Error Counter Limit 16.
IfxPmsEvr_SecondaryVoltageErrorCounter_level17 | Error Counter Limit 17.
IfxPmsEvr_SecondaryVoltageErrorCounter_level18 | Error Counter Limit 18.
IfxPmsEvr_SecondaryVoltageErrorCounter_level19 | Error Counter Limit 19.
IfxPmsEvr_SecondaryVoltageErrorCounter_level20 | Error Counter Limit 20.
IfxPmsEvr_SecondaryVoltageErrorCounter_level21 | Error Counter Limit 21.
IfxPmsEvr_SecondaryVoltageErrorCounter_level22 | Error Counter Limit 22.
IfxPmsEvr_SecondaryVoltageErrorCounter_level23 | Error Counter Limit 23.
IfxPmsEvr_SecondaryVoltageErrorCounter_level24 | Error Counter Limit 24.
IfxPmsEvr_SecondaryVoltageErrorCounter_level25 | Error Counter Limit 25.
IfxPmsEvr_SecondaryVoltageErrorCounter_level26 | Error Counter Limit 26.
IfxPmsEvr_SecondaryVoltageErrorCounter_level27 | Error Counter Limit 27.
IfxPmsEvr_SecondaryVoltageErrorCounter_level28 | Error Counter Limit 28.
IfxPmsEvr_SecondaryVoltageErrorCounter_level29 | Error Counter Limit 29.
IfxPmsEvr_SecondaryVoltageErrorCounter_level30 | Error Counter Limit 30.
IfxPmsEvr_SecondaryVoltageErrorCounter_level31 | Error Counter Limit 31.
IfxPmsEvr_SecondaryVoltageErrorCounter_level32 | Error Counter Limit 32.
IfxPmsEvr_SecondaryVoltageErrorCounter_level33 | Error Counter Limit 33.
IfxPmsEvr_SecondaryVoltageErrorCounter_level34 | Error Counter Limit 34.
IfxPmsEvr_SecondaryVoltageErrorCounter_level35 | Error Counter Limit 35.
IfxPmsEvr_SecondaryVoltageErrorCounter_level36 | Error Counter Limit 36.
IfxPmsEvr_SecondaryVoltageErrorCounter_level37 | Error Counter Limit 37.
IfxPmsEvr_SecondaryVoltageErrorCounter_level38 | Error Counter Limit 38.
IfxPmsEvr_SecondaryVoltageErrorCounter_level39 | Error Counter Limit 39.
IfxPmsEvr_SecondaryVoltageErrorCounter_level40 | Error Counter Limit 40.
IfxPmsEvr_SecondaryVoltageErrorCounter_level41 | Error Counter Limit 41.
IfxPmsEvr_SecondaryVoltageErrorCounter_level42 | Error Counter Limit 42.
IfxPmsEvr_SecondaryVoltageErrorCounter_level43 | Error Counter Limit 43.
IfxPmsEvr_SecondaryVoltageErrorCounter_level44 | Error Counter Limit 44.
IfxPmsEvr_SecondaryVoltageErrorCounter_level45 | Error Counter Limit 45.
IfxPmsEvr_SecondaryVoltageErrorCounter_level46 | Error Counter Limit 46.
IfxPmsEvr_SecondaryVoltageErrorCounter_level47 | Error Counter Limit 47.
IfxPmsEvr_SecondaryVoltageErrorCounter_level48 | Error Counter Limit 48.
IfxPmsEvr_SecondaryVoltageErrorCounter_level49 | Error Counter Limit 49.
IfxPmsEvr_SecondaryVoltageErrorCounter_level50 | Error Counter Limit 50.
IfxPmsEvr_SecondaryVoltageErrorCounter_level51 | Error Counter Limit 51.
IfxPmsEvr_SecondaryVoltageErrorCounter_level52 | Error Counter Limit 52.
IfxPmsEvr_SecondaryVoltageErrorCounter_level53 | Error Counter Limit 53.
IfxPmsEvr_SecondaryVoltageErrorCounter_level54 | Error Counter Limit 54.
IfxPmsEvr_SecondaryVoltageErrorCounter_level55 | Error Counter Limit 55.
IfxPmsEvr_SecondaryVoltageErrorCounter_level56 | Error Counter Limit 56.
IfxPmsEvr_SecondaryVoltageErrorCounter_level57 | Error Counter Limit 57.
IfxPmsEvr_SecondaryVoltageErrorCounter_level58 | Error Counter Limit 58.
IfxPmsEvr_SecondaryVoltageErrorCounter_level59 | Error Counter Limit 59.
IfxPmsEvr_SecondaryVoltageErrorCounter_level60 | Error Counter Limit 60.
IfxPmsEvr_SecondaryVoltageErrorCounter_level61 | Error Counter Limit 61.
IfxPmsEvr_SecondaryVoltageErrorCounter_level62 | Error Counter Limit 62.
IfxPmsEvr_SecondaryVoltageErrorCounter_level63 | Error Counter Limit 63.

Definition at line 232 of file IfxPmsEvr.h.

◆ IfxPmsEvr_SupplyFilter

enum IfxPmsEvr_SupplyFilter

ADC result for the generating Alarm declare in Ifx_PMS.EVR.MONFILT.

Enumerator
IfxPmsEvr_SupplyFilter_eachConversionResult | Each conversion result is compared with threshold to generate alarm.
IfxPmsEvr_SupplyFilter_avgAdcConversionResult0 | A moving mean average of consecutive 0 ADC results.
IfxPmsEvr_SupplyFilter_avgAdcConversionResult1 | A moving mean average of consecutive 1 ADC results.
IfxPmsEvr_SupplyFilter_avgAdcConversionResult2 | A moving mean average of consecutive 2 ADC results.
IfxPmsEvr_SupplyFilter_avgAdcConversionResult3 | A moving mean average of consecutive 3 ADC results.
IfxPmsEvr_SupplyFilter_avgAdcConversionResult4 | A moving mean average of consecutive 4 ADC results.
IfxPmsEvr_SupplyFilter_avgAdcConversionResult5 | A moving mean average of consecutive 5 ADC results.
IfxPmsEvr_SupplyFilter_avgAdcConversionResult6 | A moving mean average of consecutive 6 ADC results.
IfxPmsEvr_SupplyFilter_avgAdcConversionResult7 | A moving mean average of consecutive 7 ADC results.
IfxPmsEvr_SupplyFilter_avgAdcConversionResult8 | A moving mean average of consecutive 8 ADC results.
IfxPmsEvr_SupplyFilter_avgAdcConversionResult9 | A moving mean average of consecutive 9 ADC results.
IfxPmsEvr_SupplyFilter_avgAdcConversionResult10 | A moving mean average of consecutive 10 ADC results.
IfxPmsEvr_SupplyFilter_avgAdcConversionResult11 | A moving mean average of consecutive 11 ADC results.
IfxPmsEvr_SupplyFilter_avgAdcConversionResult12 | A moving mean average of consecutive 12 ADC results.
IfxPmsEvr_SupplyFilter_avgAdcConversionResult13 | A moving mean average of consecutive 13 ADC results.
IfxPmsEvr_SupplyFilter_avgAdcConversionResult14 | A moving mean average of consecutive 14 ADC results.

Definition at line 302 of file IfxPmsEvr.h.

◆ IfxPmsEvr_SupplyMode

enum IfxPmsEvr_SupplyMode

Controls the voltage supply Type.

Enumerator
IfxPmsEvr_SupplyMode_evrc | select EVRC regulator or VDD Supply
IfxPmsEvr_SupplyMode_evr33 | select EVR33 regulator or VDDP3 Supply
IfxPmsEvr_SupplyMode_swd | select external VEXT suppy watchdog
IfxPmsEvr_SupplyMode_evrpr | select EVRPR or VDDPD supply
IfxPmsEvr_SupplyMode_vddm | VDDM ADC Supply.
IfxPmsEvr_SupplyMode_sb | EVR Standby Supply or VEVRSB supply.

Definition at line 324 of file IfxPmsEvr.h.

◆ IfxPmsEvr_UnderVoltageMonitoring

enum IfxPmsEvr_UnderVoltageMonitoring

Monitoring underVoltage for all bitfields defined in Ifx_PMS.EVR.MONCTRL register for undervoltage monitoring.

Enumerator
IfxPmsEvr_UnderVoltageMonitoring_inactive | Under-Voltage Monitoring inactive.
IfxPmsEvr_UnderVoltageMonitoring_lowToHighVoltageTransition | under-Voltage event is generated when threshold is crossed in lower to higher voltage transition
IfxPmsEvr_UnderVoltageMonitoring_highToLowVoltageTransition | Under-Voltage event is generated when threshold is crossed in higher to lower voltage transition.
IfxPmsEvr_UnderVoltageMonitoring_eitherDirectionVoltageTransition | Under-Voltage event is generated when threshold is crossed in either direction.

Definition at line 337 of file IfxPmsEvr.h.


iLLD_TC38A: Over Voltage Functions

Functions
Over Voltage Functions
iLLD » PMS » Pm and Evr Drivers » EVR
Collaboration diagram for Over Voltage Functions:

Functions

IFX_INLINE void | IfxPmsEvr_setOverVoltageMonitoringMode (Ifx_PMS *pms, IfxPmsEvr_OverVoltageMonitoring mode, IfxPmsEvr_SupplyMode supply)
set Over Voltage Monitoring Mode More...
IFX_EXTERN void | IfxPmsEvr_setSecondaryOverVoltageThresholdMv (Ifx_PMS *pms, float32 thresholdLevel, IfxPmsEvr_SupplyMode supply)
set Secondary Over Voltage Threshold level More...

Detailed Description

Function Documentation

◆ IfxPmsEvr_setOverVoltageMonitoringMode()

IFX_INLINE void IfxPmsEvr_setOverVoltageMonitoringMode | ( | Ifx_PMS * | pms,
 |  | IfxPmsEvr_OverVoltageMonitoring | mode,
 |  | IfxPmsEvr_SupplyMode | supply
 | ) |  |

set Over Voltage Monitoring Mode

Parameters
pms | pointer to the Module space
mode | specifies the monitoring mode
supply | select EVRC,EVR33,VDDM,SWD or SB supply
Returns
None

Definition at line 1035 of file IfxPmsEvr.h.

◆ IfxPmsEvr_setSecondaryOverVoltageThresholdMv()

IFX_EXTERN void IfxPmsEvr_setSecondaryOverVoltageThresholdMv | ( | Ifx_PMS * | pms,
 |  | float32 | thresholdLevel,
 |  | IfxPmsEvr_SupplyMode | supply
 | ) |  |

set Secondary Over Voltage Threshold level

Parameters
pms | Pointer to PMS Module
thresholdLevel | over-voltage monitoring threshold level of the respective regulator output or supply
supply | select EVRC,EVR33,SWD,EVRPR,VDDM or SB supply mode
Returns
None

Definition at line 205 of file IfxPmsEvr.c.


iLLD_TC38A: Module Functions

Functions
Module Functions
iLLD » PMS » Pm and Evr Drivers » EVR
Collaboration diagram for Module Functions:

Functions

IFX_INLINE void | IfxPmsEvr_configureBlankingFilterDelay (Ifx_PMS *pms, uint8 delay)
Configure a Blanking Filter Delay. More...
IFX_INLINE void | IfxPmsEvr_enableDcdcSynchronisation (Ifx_PMS *pms, boolean enabled)
This function enables the synchronisation output to synchronize the external SMPS regulator with respect to the internal EVRC regulator. More...
IFX_INLINE void | IfxPmsEvr_enableInterrupts (Ifx_PMS *pms, IfxPmsEvr_EnableInterrupt interruptType)
Enable Interrupts. More...
IFX_INLINE void | IfxPmsEvr_enableWakeupOnVextSupplyRampUp (Ifx_PMS *pms, boolean enabled)
enables wakeup on VEXT supply ramp-up after blanking filter time has expired More...
IFX_INLINE void | IfxPmsEvr_fineTrimEvrClock (Ifx_PMS *pms, uint8 trimValue)
OSC Fine Trim 100MHz Clock. More...
IFX_INLINE void | IfxPmsEvr_setFrequencySpreadThreshold (Ifx_PMS *pms, uint16 thresholdLevel)
set frequency spread threshold More...
IFX_INLINE void | IfxPmsEvr_setNmosLevel (Ifx_PMS *pms, boolean nmosLevel)
This configures the state of N ch. MOSFET driver during start-up and shut-down phases. More...
IFX_INLINE void | IfxPmsEvr_setPmosLevel (Ifx_PMS *pms, boolean pmosLevel)
This configures the state of P ch. MOSFET driver during start-up and shut-down phases. More...
IFX_INLINE void | IfxPmsEvr_setRegulatorSwitchingFrequency (Ifx_PMS *pms, uint16 samplingFactor)
set regulator switching frequency in Hz....(100MHz/samplingFactor) More...
IFX_INLINE void | IfxPmsEvr_setResetTrimValueMv (Ifx_PMS *pms, float32 resetTrimValue, IfxPmsEvr_SupplyMode supply)
set reset trim value for EVRC,EVR33 and external VEXT supply More...
IFX_INLINE void | IfxPmsEvr_setSdRegulatorOutputLevel (Ifx_PMS *pms, uint8 outputLevel)
SD Regulator Voltage Target selection. More...
IFX_INLINE void | IfxPmsEvr_setSdRegulatorPrimaryAdcTrimValue (Ifx_PMS *pms, IfxPmsEvr_PrimaryAdcTrimValue trimValue)
SD Regulator Voltage Trim Value. More...
IFX_INLINE void | IfxPmsEvr_setStandbyRamSupply (Ifx_PMS *pms, uint8 ramBlock)
set DLMU RAM Block in Standby Mode More...
IFX_INLINE void | IfxPmsEvr_setSwitchingFreqDivFactorForExternalsync (Ifx_PMS *pms, IfxPmsEvr_ExtSyncSwitchingFreqDivFactor divider)
Set Switching frequency division factor for external synchronisation. More...
IFX_INLINE void | IfxPmsEvr_signedFineTrimEvrClock (Ifx_PMS *pms, sint8 trimValue)
OSC Fine Trim 100MHz Clock. More...
IFX_EXTERN void | IfxPmsEvr_filterSecondaryConversionResult (Ifx_PMS *pms, IfxPmsEvr_SupplyFilter adcFilterValue, IfxPmsEvr_SupplyMode supply)
filter the each conversion result or avarage of consecutive adc result to compare with threshold More...
IFX_EXTERN uint8 | IfxPmsEvr_getSecondaryAdcResult (Ifx_PMS *pms, IfxPmsEvr_SupplyMode supply)
get secondray ADC result for respective Voltage supply More...

Detailed Description

Function Documentation

◆ IfxPmsEvr_configureBlankingFilterDelay()

IFX_INLINE void IfxPmsEvr_configureBlankingFilterDelay | ( | Ifx_PMS * | pms,
 |  | uint8 | delay
 | ) |  |

Configure a Blanking Filter Delay.

Parameters
pms | Pointer To PMS Module
delay | Blanking Filter Delay in ms
Returns
None

Definition at line 769 of file IfxPmsEvr.h.

◆ IfxPmsEvr_enableDcdcSynchronisation()

IFX_INLINE void IfxPmsEvr_enableDcdcSynchronisation | ( | Ifx_PMS * | pms,
 |  | boolean | enabled
 | ) |  |

This function enables the synchronisation output to synchronize the external SMPS regulator with respect to the internal EVRC regulator.

Parameters
pms | Pointer to PMS Module
enabled | enable/disable DC-DC synchronisation
Returns
None

Definition at line 793 of file IfxPmsEvr.h.

◆ IfxPmsEvr_enableInterrupts()

IFX_INLINE void IfxPmsEvr_enableInterrupts | ( | Ifx_PMS * | pms,
 |  | IfxPmsEvr_EnableInterrupt | interruptType
 | ) |  |

Enable Interrupts.

Parameters
pms | Pointer to PMS Module
interruptType | Select The Interrupt Type
Returns
None

Definition at line 805 of file IfxPmsEvr.h.

◆ IfxPmsEvr_enableWakeupOnVextSupplyRampUp()

IFX_INLINE void IfxPmsEvr_enableWakeupOnVextSupplyRampUp | ( | Ifx_PMS * | pms,
 |  | boolean | enabled
 | ) |  |

enables wakeup on VEXT supply ramp-up after blanking filter time has expired

Parameters
pms | Pointer To PMS Module
enabled | Wake-up Enable on VEXT Supply ramp-up
Returns
None

Definition at line 817 of file IfxPmsEvr.h.

◆ IfxPmsEvr_filterSecondaryConversionResult()

IFX_EXTERN void IfxPmsEvr_filterSecondaryConversionResult | ( | Ifx_PMS * | pms,
 |  | IfxPmsEvr_SupplyFilter | adcFilterValue,
 |  | IfxPmsEvr_SupplyMode | supply
 | ) |  |

filter the each conversion result or avarage of consecutive adc result to compare with threshold

Parameters
pms | Pointer to PMS Module
adcFilterValue | specify average of consecutive ADC results
supply | select EVRC,EVR33,SWD,EVRPR,VDDM or SB supply mode
Returns
None

Definition at line 145 of file IfxPmsEvr.c.

◆ IfxPmsEvr_fineTrimEvrClock()

IFX_INLINE void IfxPmsEvr_fineTrimEvrClock | ( | Ifx_PMS * | pms,
 |  | uint8 | trimValue
 | ) |  |

OSC Fine Trim 100MHz Clock.

Parameters
pms | pointer to PMS Module
trimValue | OSC fine trim value
Returns
None

Definition at line 854 of file IfxPmsEvr.h.

◆ IfxPmsEvr_getSecondaryAdcResult()

IFX_EXTERN uint8 IfxPmsEvr_getSecondaryAdcResult | ( | Ifx_PMS * | pms,
 |  | IfxPmsEvr_SupplyMode | supply
 | ) |  |

get secondray ADC result for respective Voltage supply

Parameters
pms | Pointer To PMS Module
supply | select EVRC,EVR33,SWD,EVRPR,VDDM or SB supply mode
Returns
last conversion result of the ADC measurement of respective voltage by secondary monitor

Definition at line 181 of file IfxPmsEvr.c.

◆ IfxPmsEvr_setFrequencySpreadThreshold()

IFX_INLINE void IfxPmsEvr_setFrequencySpreadThreshold | ( | Ifx_PMS * | pms,
 |  | uint16 | thresholdLevel
 | ) |  |

set frequency spread threshold

Parameters
pms | pointer to PMS module
thresholdLevel | maximum frequency spreading value
Returns
None

Definition at line 1010 of file IfxPmsEvr.h.

◆ IfxPmsEvr_setNmosLevel()

IFX_INLINE void IfxPmsEvr_setNmosLevel | ( | Ifx_PMS * | pms,
 |  | boolean | nmosLevel
 | ) |  |

This configures the state of N ch. MOSFET driver during start-up and shut-down phases.

Parameters
pms | Pointer to PMS Module
nmosLevel | TRISTATE/LOW
Returns
None

Definition at line 1022 of file IfxPmsEvr.h.

◆ IfxPmsEvr_setPmosLevel()

IFX_INLINE void IfxPmsEvr_setPmosLevel | ( | Ifx_PMS * | pms,
 |  | boolean | pmosLevel
 | ) |  |

This configures the state of P ch. MOSFET driver during start-up and shut-down phases.

Parameters
pms | Pointer to PMS Module
pmosLevel | TRISTATE/LOW
Returns
None

Definition at line 1071 of file IfxPmsEvr.h.

◆ IfxPmsEvr_setRegulatorSwitchingFrequency()

IFX_INLINE void IfxPmsEvr_setRegulatorSwitchingFrequency | ( | Ifx_PMS * | pms,
 |  | uint16 | samplingFactor
 | ) |  |

set regulator switching frequency in Hz....(100MHz/samplingFactor)

Parameters
pms | Pointer to PMS Module
samplingFactor | Over-sampling Factor
Returns
None

Definition at line 1084 of file IfxPmsEvr.h.

◆ IfxPmsEvr_setResetTrimValueMv()

IFX_INLINE void IfxPmsEvr_setResetTrimValueMv | ( | Ifx_PMS * | pms,
 |  | float32 | resetTrimValue,
 |  | IfxPmsEvr_SupplyMode | supply
 | ) |  |

set reset trim value for EVRC,EVR33 and external VEXT supply

Parameters
pms | Pointer to PMS Module Space
resetTrimValue | Reset Trim Value
supply | select EVRC,EVR33 regulator or external VEXT supply watchdog
Returns
None

Definition at line 1097 of file IfxPmsEvr.h.

◆ IfxPmsEvr_setSdRegulatorOutputLevel()

IFX_INLINE void IfxPmsEvr_setSdRegulatorOutputLevel | ( | Ifx_PMS * | pms,
 |  | uint8 | outputLevel
 | ) |  |

SD Regulator Voltage Target selection.

Parameters
pms | Pointer to PMS Module
outputLevel | The VDD output level of the Step down regulator
Returns
None

Definition at line 1126 of file IfxPmsEvr.h.

◆ IfxPmsEvr_setSdRegulatorPrimaryAdcTrimValue()

IFX_INLINE void IfxPmsEvr_setSdRegulatorPrimaryAdcTrimValue | ( | Ifx_PMS * | pms,
 |  | IfxPmsEvr_PrimaryAdcTrimValue | trimValue
 | ) |  |

SD Regulator Voltage Trim Value.

Parameters
pms | Pointer to PMS Moule Space
trimValue | offset added to the VDD output level
Returns
None

Definition at line 1138 of file IfxPmsEvr.h.

◆ IfxPmsEvr_setStandbyRamSupply()

IFX_INLINE void IfxPmsEvr_setStandbyRamSupply | ( | Ifx_PMS * | pms,
 |  | uint8 | ramBlock
 | ) |  |

set DLMU RAM Block in Standby Mode

Parameters
pms | Pointer To PMS Module
ramBlock | DLMU RAM block
Returns
None

Definition at line 1149 of file IfxPmsEvr.h.

◆ IfxPmsEvr_setSwitchingFreqDivFactorForExternalsync()

IFX_INLINE void IfxPmsEvr_setSwitchingFreqDivFactorForExternalsync | ( | Ifx_PMS * | pms,
 |  | IfxPmsEvr_ExtSyncSwitchingFreqDivFactor | divider
 | ) |  |

Set Switching frequency division factor for external synchronisation.

Parameters
pms | Pointer To PMS Module
divider | Switching frequency division factor for external synchronisation
Returns
None

Definition at line 1161 of file IfxPmsEvr.h.

◆ IfxPmsEvr_signedFineTrimEvrClock()

IFX_INLINE void IfxPmsEvr_signedFineTrimEvrClock | ( | Ifx_PMS * | pms,
 |  | sint8 | trimValue
 | ) |  |

OSC Fine Trim 100MHz Clock.

Parameters
pms | Pointer to PMS Module
trimValue | OSC Signed fine trim value
Returns
None

Definition at line 1206 of file IfxPmsEvr.h.


iLLD_TC38A: Under Voltage Functions

Functions
Under Voltage Functions
iLLD » PMS » Pm and Evr Drivers » EVR
Collaboration diagram for Under Voltage Functions:

Functions

IFX_INLINE void | IfxPmsEvr_setUnderVoltageMonitoringMode (Ifx_PMS *pms, IfxPmsEvr_UnderVoltageMonitoring mode, IfxPmsEvr_SupplyMode supply)
set Under Voltage Monitoring mode More...
IFX_EXTERN void | IfxPmsEvr_setSecondaryUnderVoltageThresholdMv (Ifx_PMS *pms, float32 thresholdLevel, IfxPmsEvr_SupplyMode supply)
set Secondary under Voltage Threshold level More...

Detailed Description

Function Documentation

◆ IfxPmsEvr_setSecondaryUnderVoltageThresholdMv()

IFX_EXTERN void IfxPmsEvr_setSecondaryUnderVoltageThresholdMv | ( | Ifx_PMS * | pms,
 |  | float32 | thresholdLevel,
 |  | IfxPmsEvr_SupplyMode | supply
 | ) |  |

set Secondary under Voltage Threshold level

Parameters
pms | Pointer to PMS Module space
thresholdLevel | under-voltage monitoring threshold level of the respective regulator output or supply
supply | select EVRC,EVR33,SWD,EVRPR,VDDM or SB supply mode
Returns
None

Definition at line 244 of file IfxPmsEvr.c.

Referenced by IfxPmsPm_startStandbySequenceInFlash().

◆ IfxPmsEvr_setUnderVoltageMonitoringMode()

IFX_INLINE void IfxPmsEvr_setUnderVoltageMonitoringMode | ( | Ifx_PMS * | pms,
 |  | IfxPmsEvr_UnderVoltageMonitoring | mode,
 |  | IfxPmsEvr_SupplyMode | supply
 | ) |  |

set Under Voltage Monitoring mode

Parameters
pms | Pointer to the PMS Module space
mode | specifies the monitoring mode
supply | select EVRC,EVR33,VDDM,SWD or SB supply
Returns
None

Definition at line 1171 of file IfxPmsEvr.h.


iLLD_TC38A: EVRC Functions

Functions
EVRC Functions
iLLD » PMS » Pm and Evr Drivers » EVR
Collaboration diagram for EVRC Functions:

Functions

IFX_INLINE void | IfxPmsEvr_evrcResetTriggerSignalConfig (Ifx_PMS *pms, boolean enableReset)
Enabled/Disable Reset Trigger signal for EVRC. More...
IFX_INLINE float32 | IfxPmsEvr_getAdcVddResult (float32 averageADCC)
IFX_INLINE IfxPmsEvr_EvrcMode | IfxPmsEvr_getEvrcMode (Ifx_PMS *pms)
get current operating mode of EVRC More...
IFX_INLINE boolean | IfxPmsEvr_getEvrcVoltageRegulator (Ifx_PMS *pms)
get EVRC Regulator Voltage status More...
IFX_INLINE uint8 | IfxPmsEvr_getPrimaryAdcEvrcResult (Ifx_PMS *pms)
get ADC 1.25 V Core Voltage Conversion Result More...

Detailed Description

Function Documentation

◆ IfxPmsEvr_evrcResetTriggerSignalConfig()

IFX_INLINE void IfxPmsEvr_evrcResetTriggerSignalConfig | ( | Ifx_PMS * | pms,
 |  | boolean | enableReset
 | ) |  |

Enabled/Disable Reset Trigger signal for EVRC.

Parameters
pms | pointer to PMS Module
enableReset | Enable/Disable the reset trigger signal
Returns
None

Definition at line 841 of file IfxPmsEvr.h.

◆ IfxPmsEvr_getAdcVddResult()

IFX_INLINE float32 IfxPmsEvr_getAdcVddResult ( float32 averageADCC )
Parameters
averageADCC Average value of PMS_EVRADCSTAT.ADCCV.
Returns
ADC VDD Core Voltage Conversion Result

Definition at line 866 of file IfxPmsEvr.h.

◆ IfxPmsEvr_getEvrcMode()

IFX_INLINE IfxPmsEvr_EvrcMode IfxPmsEvr_getEvrcMode ( Ifx_PMS * pms )

get current operating mode of EVRC

Parameters
pms Pointer to PMS Module Space
Returns
EVRC Mode

Definition at line 890 of file IfxPmsEvr.h.

◆ IfxPmsEvr_getEvrcVoltageRegulator()

IFX_INLINE boolean IfxPmsEvr_getEvrcVoltageRegulator ( Ifx_PMS * pms )

get EVRC Regulator Voltage status

Parameters
pms Pointer to PMS Module Space
Returns
EVRC Regulator Voltage OK status

Definition at line 896 of file IfxPmsEvr.h.

◆ IfxPmsEvr_getPrimaryAdcEvrcResult()

IFX_INLINE uint8 IfxPmsEvr_getPrimaryAdcEvrcResult ( Ifx_PMS * pms )

get ADC 1.25 V Core Voltage Conversion Result

Parameters
pms Pointer to PMS Module space
Returns
last conversion result of the ADC measurement of the VDD / EVRC supply by the Primary Monitor

Definition at line 908 of file IfxPmsEvr.h.


iLLD_TC38A: EVR33 Functions

Functions
EVR33 Functions
iLLD » PMS » Pm and Evr Drivers » EVR
Collaboration diagram for EVR33 Functions:

Functions

IFX_INLINE void | IfxPmsEvr_evr33ResetTriggerSignalConfig (Ifx_PMS *pms, boolean enableReset)
Enabled/Disable Reset Trigger signal for EVR33. More...
IFX_INLINE uint8 | IfxPmsEvr_getPrimaryAdcEvr33Result (Ifx_PMS *pms)
get ADC 3.3 V Voltage Conversion Result More...
IFX_INLINE void | IfxPmsEvr_setEvr33PrimaryAdcTrimValue (Ifx_PMS *pms, IfxPmsEvr_PrimaryAdcTrimValue trimValue)
set 3.3 V Regulator Voltage Primary ADC Trim Value More...
IFX_INLINE void | IfxPmsEvr_setEvr33VoltageOutputlevel (Ifx_PMS *pms, uint8 outputLevel)
The VDDP3 output level of the EVR33 LDO regulator. More...

Detailed Description

Function Documentation

◆ IfxPmsEvr_evr33ResetTriggerSignalConfig()

IFX_INLINE void IfxPmsEvr_evr33ResetTriggerSignalConfig | ( | Ifx_PMS * | pms,
 |  | boolean | enableReset
 | ) |  |

Enabled/Disable Reset Trigger signal for EVR33.

Parameters
pms | pointer to PMS Module
enableReset | Enable/Disable the reset trigger signal
Returns
None

Definition at line 829 of file IfxPmsEvr.h.

◆ IfxPmsEvr_getPrimaryAdcEvr33Result()

IFX_INLINE uint8 IfxPmsEvr_getPrimaryAdcEvr33Result ( Ifx_PMS * pms )

get ADC 3.3 V Voltage Conversion Result

Parameters
pms Pointer to PMS Module Space
Returns
last conversion result of the ADC measurement of the VDDP3 / EVR33 supply by the Primary Monitor

Definition at line 902 of file IfxPmsEvr.h.

◆ IfxPmsEvr_setEvr33PrimaryAdcTrimValue()

IFX_INLINE void IfxPmsEvr_setEvr33PrimaryAdcTrimValue | ( | Ifx_PMS * | pms,
 |  | IfxPmsEvr_PrimaryAdcTrimValue | trimValue
 | ) |  |

set 3.3 V Regulator Voltage Primary ADC Trim Value

Parameters
pms | Pointer to PMS Module
trimValue | Trimming value offeset added to Output level
Returns
None

Definition at line 987 of file IfxPmsEvr.h.

◆ IfxPmsEvr_setEvr33VoltageOutputlevel()

IFX_INLINE void IfxPmsEvr_setEvr33VoltageOutputlevel | ( | Ifx_PMS * | pms,
 |  | uint8 | outputLevel
 | ) |  |

The VDDP3 output level of the EVR33 LDO regulator.

Parameters
pms | Pointer to PMS Module
outputLevel | define VDDP3 output level of the EVR33 LDO regulator.
Returns
None

Definition at line 998 of file IfxPmsEvr.h.


iLLD_TC38A: SWD Functions

Functions
SWD Functions
iLLD » PMS » Pm and Evr Drivers » EVR
Collaboration diagram for SWD Functions:

Functions

IFX_INLINE uint8 | IfxPmsEvr_getPrimaryAdcSwdResult (Ifx_PMS *pms)
get ADC External Supply Conversion Result More...
IFX_INLINE void | IfxPmsEvr_swdResetTriggerSignalConfig (Ifx_PMS *pms, boolean enableReset)
Enabled/Disable Reset Trigger signal for SWD. More...

Detailed Description

Function Documentation

◆ IfxPmsEvr_getPrimaryAdcSwdResult()

IFX_INLINE uint8 IfxPmsEvr_getPrimaryAdcSwdResult ( Ifx_PMS * pms )

get ADC External Supply Conversion Result

Parameters
pms Pointer to PMS Module space
Returns
last conversion result of the ADC measurement of the external VEXT (3.3V / 5V) supply by the Primary Monitor

Definition at line 914 of file IfxPmsEvr.h.

◆ IfxPmsEvr_swdResetTriggerSignalConfig()

IFX_INLINE void IfxPmsEvr_swdResetTriggerSignalConfig | ( | Ifx_PMS * | pms,
 |  | boolean | enableReset
 | ) |  |

Enabled/Disable Reset Trigger signal for SWD.

Parameters
pms | Pointer to PMS Module
enableReset | Enable/Disable the reset trigger signal
Returns
None

Definition at line 1217 of file IfxPmsEvr.h.


iLLD_TC38A: PM

Modules
PM
iLLD » PMS » Pm and Evr Drivers
Collaboration diagram for PM:

Modules

Enumerations
Data Structures
System Modes
Cpu Modes
WakeupModes

Detailed Description


iLLD_TC38A: Enumerations

Enumerations
Enumerations
iLLD » PMS » Pm and Evr Drivers » PM
Collaboration diagram for Enumerations:

Enumerations

enum IfxPmsPm_BlankingFilterDelay {
IfxPmsPm_BlankingFilterDelay_0ms = 0,
IfxPmsPm_BlankingFilterDelay_2_5ms = 1,
IfxPmsPm_BlankingFilterDelay_5ms = 2,
IfxPmsPm_BlankingFilterDelay_10ms = 3,
IfxPmsPm_BlankingFilterDelay_20ms = 4,
IfxPmsPm_BlankingFilterDelay_40ms = 5,
IfxPmsPm_BlankingFilterDelay_80ms = 6,
IfxPmsPm_BlankingFilterDelay_160ms = 7,
IfxPmsPm_BlankingFilterDelay_320ms = 8,
IfxPmsPm_BlankingFilterDelay_640ms = 9,
IfxPmsPm_BlankingFilterDelay_1280ms = 0xA,
IfxPmsPm_BlankingFilterDelay_2560ms = 0xB,
IfxPmsPm_BlankingFilterDelay_5120ms = 0xC,
IfxPmsPm_BlankingFilterDelay_10240ms = 0xD
}
Exposes the optons for minimum duration between standby entry and Wakeup.If any wakeup request comes up before this time is elapsed after standby entry, then it's ignored.Configured in PMS_PMSWCR.B.BLNKFIL. More...
enum IfxPmsPm_DigitalFilter {
IfxPmsPm_DigitalFilter_bypassed = 0,
IfxPmsPm_DigitalFilter_used = 1
}
The Digital filter enable/disabled As defined in Ifx_PMS.PMSW.CR0.B.ESRxDFEN and Ifx_PMS.PMSW.CR0.B.PINxDFEN. More...
enum IfxPmsPm_EdgeDetectionControl {
IfxPmsPm_EdgeDetectionControl_never = 0,
IfxPmsPm_EdgeDetectionControl_onRisingEdge = 1,
IfxPmsPm_EdgeDetectionControl_onFallingEdge = 2,
IfxPmsPm_EdgeDetectionControl_always = 3
}
Edge detection control mode for ESR and PINA/PINB As defined in Ifx_PMS.PMSW.CR0.B.ESRxEDCON and Ifx_PMS.PMSW.CR0.B.PINxEDCON. More...
enum IfxPmsPm_Esr0PinStateRequest {
IfxPmsPm_Esr0PinStateRequest_resetOutput = 0,
IfxPmsPm_Esr0PinStateRequest_tristate = 1
}
Request to set ESR0 pin pads to either input with weak pullup or tristate.Configured in PMS_PMSWCR5.B.ESR0TRIST. More...
enum IfxPmsPm_LoadJumpStatus {
IfxPmsPm_LoadJumpStatus_inactive = 0,
IfxPmsPm_LoadJumpStatus_swTriggeredRequestActive = 1,
IfxPmsPm_LoadJumpStatus_hwTriggeredRequestActive = 2
}
List of different statuses related to Load Jump This is reflected in SCU_PMTRCSR2.B.LJTRUN. More...
enum IfxPmsPm_PadStateRequest {
IfxPmsPm_PadStateRequest_inputWithWeakPullUp = 0,
IfxPmsPm_PadStateRequest_tristate = 1
}
Request to set pads to either input with weak pullup or tristate.Configured in PMS_PMSWCR5.B.TRISTREQ. More...
enum IfxPmsPm_PinEdgeTriggerEvent {
IfxPmsPm_PinEdgeTriggerEvent_none = 0,
IfxPmsPm_PinEdgeTriggerEvent_risingEdge = 1,
IfxPmsPm_PinEdgeTriggerEvent_fallingEdge = 2,
IfxPmsPm_PinEdgeTriggerEvent_bothRisingAndFallingEdge = 3
}
enum IfxPmsPm_RampingMode {
IfxPmsPm_RampingMode_none = 0,
IfxPmsPm_RampingMode_up = 1,
IfxPmsPm_RampingMode_down = 2,
IfxPmsPm_RampingMode_both = 3
}
Different options for when event triggering is desired(See EVRMONCTRL). More...
enum IfxPmsPm_RequestPowerMode {
IfxPmsPm_RequestPowerMode_run = 0,
IfxPmsPm_RequestPowerMode_idle = 1,
IfxPmsPm_RequestPowerMode_sleep = 2,
IfxPmsPm_RequestPowerMode_standby = 3
}
System power mode As defined in Ifx_SCU.PMCSR[x].B.REQSLP. More...
enum IfxPmsPm_ScrClocking {
IfxPmsPm_ScrClocking_100mhzOptional = 0,
IfxPmsPm_ScrClocking_bothClocksActiive = 1
}
Defines Clocking options for SCR in PMS_PMSWCR4.B.SCRCLKSEL. More...
enum IfxPmsPm_StandbyRamSupply {
IfxPmsPm_StandbyRamSupply_never = 0,
IfxPmsPm_StandbyRamSupply_cpu0Block0 = 1,
IfxPmsPm_StandbyRamSupply_cpu0Block01 = 2,
IfxPmsPm_StandbyRamSupply_cpu1Block01 = 4,
IfxPmsPm_StandbyRamSupply_cpu0Cpu1 = 7
}
The RAM being used in Standby mode As defined in Ifx_PMS.PMSW.CR0.B.STBYRAMSEL. More...
enum IfxPmsPm_StandbyTriggerMode {
IfxPmsPm_StandbyTriggerMode_software = 0,
IfxPmsPm_StandbyTriggerMode_hardware_undervoltage = 1,
IfxPmsPm_StandbyTriggerMode_hardware_nmi = 4
}
Defines events to trigger entry to Standby mode. More...
enum IfxPmsPm_ThresholdEvent {
IfxPmsPm_ThresholdEvent_overvoltage = 0,
IfxPmsPm_ThresholdEvent_undervoltage = 4
}
types of event More...
enum IfxPmsPm_VoltageDroopRequest {
IfxPmsPm_VoltageDroopRequest_positive = 1,
IfxPmsPm_VoltageDroopRequest_negative = 2
}
Direction of Voltage Droop(positive and negative) To be specified in SCU_PMTRCSR3.B.VDROOPREQ. More...
enum IfxPmsPm_VoltageDroopStatus {
IfxPmsPm_VoltageDroopStatus_inactive = 0,
IfxPmsPm_VoltageDroopStatus_swTriggeredRequestActive = 1,
IfxPmsPm_VoltageDroopStatus_hwTriggeredRequestActive = 2
}
List of different statuses related to Load Jump This is reflected in SCU_PMTRCSR3.B.VDTRUN. More...
enum IfxPmsPm_VoltageDroopStep {
IfxPmsPm_VoltageDroopStep_0mV = 0,
IfxPmsPm_VoltageDroopStep_5mV = 1U,
IfxPmsPm_VoltageDroopStep_10mV = 2U,
IfxPmsPm_VoltageDroopStep_15mV = 3U,
IfxPmsPm_VoltageDroopStep_20mV = 4U,
IfxPmsPm_VoltageDroopStep_25mV = 5U,
IfxPmsPm_VoltageDroopStep_30mV = 6U,
IfxPmsPm_VoltageDroopStep_35mV = 7U,
IfxPmsPm_VoltageDroopStep_40mV = 8U,
IfxPmsPm_VoltageDroopStep_45mV = 9U,
IfxPmsPm_VoltageDroopStep_50mV = 10U,
IfxPmsPm_VoltageDroopStep_55mV = 11U,
IfxPmsPm_VoltageDroopStep_60mV = 12U,
IfxPmsPm_VoltageDroopStep_65mV = 13U,
IfxPmsPm_VoltageDroopStep_70mV = 14U,
IfxPmsPm_VoltageDroopStep_75mV = 15U
}
Lists out volatge droop steps. More...
enum IfxPmsPm_VoltageSource {
IfxPmsPm_VoltageSource_vdd = 0,
IfxPmsPm_VoltageSource_vddpd = 2,
IfxPmsPm_VoltageSource_vddp3 = 8,
IfxPmsPm_VoltageSource_vddm = 10,
IfxPmsPm_VoltageSource_vext = 16,
IfxPmsPm_VoltageSource_vevrsb = 18
}
Different voltage sources extrnally supplied to/inside AURIX2G. More...
enum IfxPmsPm_WakeupOn {
IfxPmsPm_WakeupOn_esr0 = 0,
IfxPmsPm_WakeupOn_esr1 = 1,
IfxPmsPm_WakeupOn_pinA = 2,
IfxPmsPm_WakeupOn_pinB = 3,
IfxPmsPm_WakeupOn_porst = 4,
IfxPmsPm_WakeupOn_timer = 5,
IfxPmsPm_WakeupOn_power = 6,
IfxPmsPm_WakeupOn_scr = 7
}
Wake up configuration defined in Ifx_PMS.PMSW.CR0.B.ESRxWKEN,Ifx_PMS.PMSW.CR0.B.PINxWKEN and Ifx_PMS.PMSW.CR0.B.PORSTWKEN. More...
enum IfxPmsPm_WakeupTimerMode {
IfxPmsPm_WakeupTimerMode_autoReload = 0,
IfxPmsPm_WakeupTimerMode_autoStop = 1
}
Select wakup timer operation mode As defined in Ifx_PMS.PMSW.CR3.B.WUTMODE. More...
enum IfxPmsPm_WutClock {
IfxPmsPm_WutClock_70kHz = 0,
IfxPmsPm_WutClock_68Hz = 1
}
Clock for WUT. More...

Detailed Description

Enumeration Type Documentation

◆ IfxPmsPm_BlankingFilterDelay

enum IfxPmsPm_BlankingFilterDelay

Exposes the optons for minimum duration between standby entry and Wakeup.If any wakeup request comes up before this time is elapsed after standby entry, then it's ignored.Configured in PMS_PMSWCR.B.BLNKFIL.

Enumerator
IfxPmsPm_BlankingFilterDelay_0ms | No blanking filter delay.
IfxPmsPm_BlankingFilterDelay_2_5ms | Blanking delay on 2.5ms.
IfxPmsPm_BlankingFilterDelay_5ms | Blanking delay on 5ms.
IfxPmsPm_BlankingFilterDelay_10ms | Blanking delay on 10ms.
IfxPmsPm_BlankingFilterDelay_20ms | Blanking delay on 20ms.
IfxPmsPm_BlankingFilterDelay_40ms | Blanking delay on 40ms.
IfxPmsPm_BlankingFilterDelay_80ms | Blanking delay on 80ms.
IfxPmsPm_BlankingFilterDelay_160ms | Blanking delay on 160ms.
IfxPmsPm_BlankingFilterDelay_320ms | Blanking delay on 320ms.
IfxPmsPm_BlankingFilterDelay_640ms | Blanking delay on 640ms.
IfxPmsPm_BlankingFilterDelay_1280ms | Blanking delay on 1280ms.
IfxPmsPm_BlankingFilterDelay_2560ms | Blanking delay on 2560ms.
IfxPmsPm_BlankingFilterDelay_5120ms | Blanking delay on 5120ms.
IfxPmsPm_BlankingFilterDelay_10240ms | Blanking delay on 1024ms.

Definition at line 82 of file IfxPmsPm.h.

◆ IfxPmsPm_DigitalFilter

enum IfxPmsPm_DigitalFilter

The Digital filter enable/disabled As defined in Ifx_PMS.PMSW.CR0.B.ESRxDFEN and Ifx_PMS.PMSW.CR0.B.PINxDFEN.

Enumerator
IfxPmsPm_DigitalFilter_bypassed | The Filter is Bypassed.
IfxPmsPm_DigitalFilter_used | The Filter is Used.

Definition at line 103 of file IfxPmsPm.h.

◆ IfxPmsPm_EdgeDetectionControl

enum IfxPmsPm_EdgeDetectionControl

Edge detection control mode for ESR and PINA/PINB As defined in Ifx_PMS.PMSW.CR0.B.ESRxEDCON and Ifx_PMS.PMSW.CR0.B.PINxEDCON.

Enumerator
IfxPmsPm_EdgeDetectionControl_never | No Trigger is Generated.
IfxPmsPm_EdgeDetectionControl_onRisingEdge | Trigger is generated upon a Rising edge.
IfxPmsPm_EdgeDetectionControl_onFallingEdge | Triggerr is generated upon a falling edge.
IfxPmsPm_EdgeDetectionControl_always | A trigger is generated upon a either edges.

Definition at line 112 of file IfxPmsPm.h.

◆ IfxPmsPm_Esr0PinStateRequest

enum IfxPmsPm_Esr0PinStateRequest

Request to set ESR0 pin pads to either input with weak pullup or tristate.Configured in PMS_PMSWCR5.B.ESR0TRIST.

Enumerator
IfxPmsPm_Esr0PinStateRequest_resetOutput |
IfxPmsPm_Esr0PinStateRequest_tristate | Set the ESR0 pin pad to tristate.

Definition at line 122 of file IfxPmsPm.h.

◆ IfxPmsPm_LoadJumpStatus

enum IfxPmsPm_LoadJumpStatus

List of different statuses related to Load Jump This is reflected in SCU_PMTRCSR2.B.LJTRUN.

Enumerator
IfxPmsPm_LoadJumpStatus_inactive | Load Jump and Load Jump Timer inactive.
IfxPmsPm_LoadJumpStatus_swTriggeredRequestActive | A SW triggered Load Jump active and Load Jump Timer active.
IfxPmsPm_LoadJumpStatus_hwTriggeredRequestActive | A HW triggered Load Jump active and Load Jump Timer active.

Definition at line 131 of file IfxPmsPm.h.

◆ IfxPmsPm_PadStateRequest

enum IfxPmsPm_PadStateRequest

Request to set pads to either input with weak pullup or tristate.Configured in PMS_PMSWCR5.B.TRISTREQ.

Enumerator
IfxPmsPm_PadStateRequest_inputWithWeakPullUp | Set pads to input with weak pullup.
IfxPmsPm_PadStateRequest_tristate | Set pads to tristate.

Definition at line 140 of file IfxPmsPm.h.

◆ IfxPmsPm_PinEdgeTriggerEvent

enum IfxPmsPm_PinEdgeTriggerEvent
Enumerator
IfxPmsPm_PinEdgeTriggerEvent_none | None of the edges will trigger anything.
IfxPmsPm_PinEdgeTriggerEvent_risingEdge | Trigger is generated upon a rising edge.
IfxPmsPm_PinEdgeTriggerEvent_fallingEdge | Trigger is generated upon a falling edge.
IfxPmsPm_PinEdgeTriggerEvent_bothRisingAndFallingEdge | A trigger is generated upon a rising OR falling edge.

Definition at line 146 of file IfxPmsPm.h.

◆ IfxPmsPm_RampingMode

enum IfxPmsPm_RampingMode

Different options for when event triggering is desired(See EVRMONCTRL).

Enumerator
IfxPmsPm_RampingMode_none | Monitoring inactive. This results in a complete reset of the comparator unit, status bits and filter values and alarm is deasserted.
IfxPmsPm_RampingMode_up | Event is triggered when the threshold is crossed in a lower to higher voltage transition. Greater than or equal compare is used.
IfxPmsPm_RampingMode_down | Event is triggered when the threshold is crossed in a higher to lower voltage transition. Less than or equal compare is used.
IfxPmsPm_RampingMode_both | Event is triggered when the threshold is crossed in either direction. Greater than or equal compare is used.

Definition at line 156 of file IfxPmsPm.h.

◆ IfxPmsPm_RequestPowerMode

enum IfxPmsPm_RequestPowerMode

System power mode As defined in Ifx_SCU.PMCSR[x].B.REQSLP.

Enumerator
IfxPmsPm_RequestPowerMode_run | Request CPU Run Mode.
IfxPmsPm_RequestPowerMode_idle | Request CPU Idle Mode.
IfxPmsPm_RequestPowerMode_sleep | Request CPU Sleep Mode.
IfxPmsPm_RequestPowerMode_standby | Request CPU Standby Mode.

Definition at line 174 of file IfxPmsPm.h.

◆ IfxPmsPm_ScrClocking

enum IfxPmsPm_ScrClocking

Defines Clocking options for SCR in PMS_PMSWCR4.B.SCRCLKSEL.

Enumerator
IfxPmsPm_ScrClocking_100mhzOptional | 100MHz oscillator can be enabled or disabled based on request from Standby Controller. By default 100 MHz Oscillator is requested by SCR in Standby Mode.
IfxPmsPm_ScrClocking_bothClocksActiive | 100MHz oscillator is always active irrespective of SCR requests. Thus both 70 KHz Oscillator and 100 MHz oscillator are active in Standby Mode.

Definition at line 184 of file IfxPmsPm.h.

◆ IfxPmsPm_StandbyRamSupply

enum IfxPmsPm_StandbyRamSupply

The RAM being used in Standby mode As defined in Ifx_PMS.PMSW.CR0.B.STBYRAMSEL.

Enumerator
IfxPmsPm_StandbyRamSupply_never | Standby RAM is not supplied.
IfxPmsPm_StandbyRamSupply_cpu0Block0 | Standby RAM (CPU0 dLMU RAM Block 0) is supplied.
IfxPmsPm_StandbyRamSupply_cpu0Block01 | Standby RAM (CPU0 dLMU RAM Block0 + Block1) is supplied.
IfxPmsPm_StandbyRamSupply_cpu1Block01 | Standby RAM (CPU1 dLMU RAM Block0 + Block1) is supplied.
IfxPmsPm_StandbyRamSupply_cpu0Cpu1 | Standby RAM (CPU0 dLMU RAM Block0 + Block1) & (CPU1 dLMU RAM Block0 + Block1) is supplied.

Definition at line 197 of file IfxPmsPm.h.

◆ IfxPmsPm_StandbyTriggerMode

enum IfxPmsPm_StandbyTriggerMode

Defines events to trigger entry to Standby mode.

Enumerator
IfxPmsPm_StandbyTriggerMode_software | Standby request using MODULE_SCU.PMCSRx.B.REQSLP.
IfxPmsPm_StandbyTriggerMode_hardware_undervoltage | Standby trigger arising from VEXT/VDD undervoltage.
IfxPmsPm_StandbyTriggerMode_hardware_nmi | Standby request arising from any NMI/ESR1 pin assertion.

Definition at line 208 of file IfxPmsPm.h.

◆ IfxPmsPm_ThresholdEvent

enum IfxPmsPm_ThresholdEvent

types of event

Enumerator
IfxPmsPm_ThresholdEvent_overvoltage | Voltage is greater than the higher threshold.
IfxPmsPm_ThresholdEvent_undervoltage | Voltage is lesser than the lower threshold.

Definition at line 217 of file IfxPmsPm.h.

◆ IfxPmsPm_VoltageDroopRequest

enum IfxPmsPm_VoltageDroopRequest

Direction of Voltage Droop(positive and negative) To be specified in SCU_PMTRCSR3.B.VDROOPREQ.

Enumerator
IfxPmsPm_VoltageDroopRequest_positive | A Positive Voltage Droop Request made and taken. Voltage Droop Timer activated.
IfxPmsPm_VoltageDroopRequest_negative | A Negative Voltage Droop Request made and taken. Voltage Droop Timer activated.

Definition at line 226 of file IfxPmsPm.h.

◆ IfxPmsPm_VoltageDroopStatus

enum IfxPmsPm_VoltageDroopStatus

List of different statuses related to Load Jump This is reflected in SCU_PMTRCSR3.B.VDTRUN.

Enumerator
IfxPmsPm_VoltageDroopStatus_inactive | Voltage Droop and Voltage Droop Timer inactive.
IfxPmsPm_VoltageDroopStatus_swTriggeredRequestActive | A SW triggered Voltage Droop active and Voltage Droop Timer active.
IfxPmsPm_VoltageDroopStatus_hwTriggeredRequestActive | A HW triggered Voltage Droop active and Voltage Droop Timer active.

Definition at line 237 of file IfxPmsPm.h.

◆ IfxPmsPm_VoltageDroopStep

enum IfxPmsPm_VoltageDroopStep

Lists out volatge droop steps.

Enumerator
IfxPmsPm_VoltageDroopStep_0mV | Voltage Droop request of 0 mV.
IfxPmsPm_VoltageDroopStep_5mV | Voltage Droop request of 5 mV.
IfxPmsPm_VoltageDroopStep_10mV | Voltage Droop request of 10 mV.
IfxPmsPm_VoltageDroopStep_15mV | Voltage Droop request of 15 mV.
IfxPmsPm_VoltageDroopStep_20mV | Voltage Droop request of 20 mV.
IfxPmsPm_VoltageDroopStep_25mV | Voltage Droop request of 25 mV.
IfxPmsPm_VoltageDroopStep_30mV | Voltage Droop request of 30 mV.
IfxPmsPm_VoltageDroopStep_35mV | Voltage Droop request of 35 mV.
IfxPmsPm_VoltageDroopStep_40mV | Voltage Droop request of 40 mV.
IfxPmsPm_VoltageDroopStep_45mV | Voltage Droop request of 45 mV.
IfxPmsPm_VoltageDroopStep_50mV | Voltage Droop request of 50 mV.
IfxPmsPm_VoltageDroopStep_55mV | Voltage Droop request of 55 mV.
IfxPmsPm_VoltageDroopStep_60mV | Voltage Droop request of 60 mV.
IfxPmsPm_VoltageDroopStep_65mV | Voltage Droop request of 65 mV.
IfxPmsPm_VoltageDroopStep_70mV | Voltage Droop request of 70 mV.
IfxPmsPm_VoltageDroopStep_75mV | Voltage Droop request of 75 mV.

Definition at line 248 of file IfxPmsPm.h.

◆ IfxPmsPm_VoltageSource

enum IfxPmsPm_VoltageSource

Different voltage sources extrnally supplied to/inside AURIX2G.

Enumerator
IfxPmsPm_VoltageSource_vdd | 1.25V VDD voltage source(either from EVRC/supplied externally)
IfxPmsPm_VoltageSource_vddpd | 1.25V VDDPD Pre-Regulator Voltage
IfxPmsPm_VoltageSource_vddp3 | 3.3V VDDP3(either generated by EVR33 or externally provided)
IfxPmsPm_VoltageSource_vddm | VDDM - Analog supply for ADCs.
IfxPmsPm_VoltageSource_vext | VEXT(3.3V or 5V) external supply.
IfxPmsPm_VoltageSource_vevrsb | VEVRSB(3.3V or 5V) - Standby Domain Supply.

Definition at line 270 of file IfxPmsPm.h.

◆ IfxPmsPm_WakeupOn

enum IfxPmsPm_WakeupOn

Wake up configuration defined in Ifx_PMS.PMSW.CR0.B.ESRxWKEN,Ifx_PMS.PMSW.CR0.B.PINxWKEN and Ifx_PMS.PMSW.CR0.B.PORSTWKEN.

Enumerator
IfxPmsPm_WakeupOn_esr0 | ESR0 Wake-up enable from Standby.
IfxPmsPm_WakeupOn_esr1 | ESR1 Wake-up enable from Standby.
IfxPmsPm_WakeupOn_pinA | PINA Wake-up enable from Standby.
IfxPmsPm_WakeupOn_pinB | PINB Wake-up enable from Standby.
IfxPmsPm_WakeupOn_porst | PORST Wake-up enable from Standby.
IfxPmsPm_WakeupOn_timer | WUT Wake-up enable from Standby.
IfxPmsPm_WakeupOn_power | Power Wake-up enable Standby.
IfxPmsPm_WakeupOn_scr | SCR Wake-up enable from Standby.

Definition at line 283 of file IfxPmsPm.h.

◆ IfxPmsPm_WakeupTimerMode

enum IfxPmsPm_WakeupTimerMode

Select wakup timer operation mode As defined in Ifx_PMS.PMSW.CR3.B.WUTMODE.

Enumerator
IfxPmsPm_WakeupTimerMode_autoReload | WUT auto reload mode selected.
IfxPmsPm_WakeupTimerMode_autoStop | WUT auto stop mode selected.

Definition at line 298 of file IfxPmsPm.h.

◆ IfxPmsPm_WutClock

enum IfxPmsPm_WutClock

Clock for WUT.

Enumerator
IfxPmsPm_WutClock_70kHz | WUT has a 70 kHz clock input.
IfxPmsPm_WutClock_68Hz | Clock to WUT passes through a divider of 10.

Definition at line 306 of file IfxPmsPm.h.


iLLD_TC38A: Data Structures

Data Structures
Data Structures
iLLD » PMS » Pm and Evr Drivers » PM
Collaboration diagram for Data Structures:

Data Structures

struct | IfxPmsPm_LoadJumpConfig
Options for Load Jump. More...
struct | IfxPmsPm_SleepConfig
Configurable options for sleep mode. More...
struct | IfxPmsPm_StandbyConfig
Configurable Standby options. More...
struct | IfxPmsPm_VoltageDroopConfig
Volatge Droop Configuration. More...
struct | IfxPmsPm_WakeupConfig
Configure Wakeup in standby mode. More...

Detailed Description

Data Structure Documentation

◆ IfxPmsPm_LoadJumpConfig

struct IfxPmsPm_LoadJumpConfig

Options for Load Jump.

Definition at line 322 of file IfxPmsPm.h.

Data Fields
boolean | enableLoadJumpTimer | Enable or disable Load Jump Timer.
boolean | enableLoadJumpTimerOverflowFlag | Enable or disable update of Load Jump Timer Overflow Flag.
boolean | enableLoadJumpTimerOverflowInterrupt | Enable or disable Load Jump Timer Overflow Interrupt.

◆ IfxPmsPm_SleepConfig

struct IfxPmsPm_SleepConfig

Configurable options for sleep mode.

Definition at line 331 of file IfxPmsPm.h.

Data Fields
IfxScuCcu_Fsource | asclinClockSource | Clock Source for ASCLIN IfxScuCcu_Fsource_1 is f_source1 from K2 divider of Peripheral PLL IfxScuCcu_Fsource_2 is Oscillator clock bypassing the Peripheral PLL.
boolean | asclinEnabled | Whether ASCLIN will be enabled ir disabled during Sleep mode.
boolean | ccu6Enabled | Whether CCU6 will be enabled ir disabled during Sleep mode.
boolean | gethEnabled | Whether QSPI will be enabled ir disabled during Sleep mode.
boolean | gpt12Enabled | Whether GPT12 will be enabled ir disabled during Sleep mode.
boolean | gtmEnabled | Whether GTM will be enabled ir disabled during Sleep mode.
boolean | i2cEnabled | Whether I2C will be enabled ir disabled during Sleep mode.
IfxCpu_ResourceCpu | masterCpu | Core index of the master CPU.
IfxScuCcu_Fsource | mcanClockSource | Clock Source for MCAN IfxScuCcu_Fsource_1 is f_source1 from K2 divider of Peripheral PLL IfxScuCcu_Fsource_2 is Oscillator clock bypassing the Peripheral PLL.
boolean | mcanEnabled | Whether MCAN will be enabled ir disabled during Sleep mode.
IfxScuCcu_Fsource | qspiClockSource | Clock Source for MCAN IfxScuCcu_Fsource_1 is f_source1 from K2 divider of Peripheral PLL IfxScuCcu_Fsource_2 is f_source2 from K3 divider of Peripheral PLL.
boolean | qspiEnabled | Whether QSPI will be enabled ir disabled during Sleep mode.
boolean | stmEnabled | Whether STM will be enabled ir disabled during Sleep mode.

◆ IfxPmsPm_StandbyConfig

struct IfxPmsPm_StandbyConfig

Configurable Standby options.

Definition at line 356 of file IfxPmsPm.h.

Data Fields
boolean | enableScr | Whether to enable SCR or not.
boolean | enableStandbyOnVddRampDown | Enable Standby On VDD Ramp Down.
boolean | enableStandbyOnVextRampDown | Enable Standby On VEXT Ramp Down.
boolean | enableWakeupOnEsr0 | Enable wake-up on ESR0.
boolean | enableWakeupOnEsr1 | Enable wake-up on ESR1.
boolean | enableWakeupOnPinA | Enable wake-up on PINA.
boolean | enableWakeupOnPinB | Enable wake-up on PINB.
boolean | enableWakeupOnPorst | Enable wake-up on PORST pin assertion.
uint8 | enableWakeupOnPower | Enable wake-up on VEXT ramp up.
boolean | enableWakeupOnScr | Enable wake-up on request from SCR.
boolean | enableWakeupOnTimer | Enable wake-up on Wake Up Timer(WUT)
IfxPmsPm_DigitalFilter | esr0DigitalFilterUsage | Whether to use didital filer withe interpreting the pulse on ESR0 pin.
IfxPmsPm_Esr0PinStateRequest | esr0PinStateRequest | Request to remain in input with weak pull-up or get into tristate.
IfxPmsPm_PinEdgeTriggerEvent | esr0TriggerEvent | Trigger will be generated on which pulse edge of a pulse on ESR0 pin.
IfxPmsPm_DigitalFilter | esr1DigitalFilterUsage | Whether to use didital filer withe interpreting the pulse on ESR1 pin.
IfxPmsPm_PinEdgeTriggerEvent | esr1TriggerEvent | Trigger will be generated on which pulse edge of a pulse on ESR1 pin.
IfxCpu_ResourceCpu | masterCpu | CPU which can call powerdown modes.In IfxPmsPm_startStandbySequenceInFlash(),this value is being filled to reflect the core in which standby sequence is running as we're explicitly making it as the master CPU.
IfxPmsPm_BlankingFilterDelay | minDelayBeforeWakeUp | Selecting the duration, starting from Standby entry, after which wake-up triggers are effective.
IfxPmsPm_PadStateRequest | padStateRequest | Request to remain in input with weak pull-up or get into tristate.
IfxPmsPm_DigitalFilter | pinADigitalFilterUsage | Whether to use didital filer withe interpreting the pulse on PINA pin.
IfxPmsPm_PinEdgeTriggerEvent | pinATriggerEvent | Trigger will be generated on which pulse edge of a pulse on PINA pin.
IfxPmsPm_DigitalFilter | pinBDigitalFilterUsage | Whether to use didital filer withe interpreting the pulse on PINB pin.
IfxPmsPm_PinEdgeTriggerEvent | pinBTriggerEvent | Trigger will be generated on which pulse edge of a pulse on PINB pin.
IfxPmsPm_ScrClocking | scrClockSupply | Options for SCR clock supply.
IfxPmsPm_StandbyRamSupply | standbyRamBlock | Options for which part of the DLMU can be provided supply during standby.
IfxPmsPm_StandbyTriggerMode | trigger | Events which'll trigger Standby mode.
boolean | useWutStandbyAutoStopMode | Use the Auto Stop mode in WUT.
float32 | vddUnderVoltageThresholdLevel | Undervoltage threshold for VDD.
float32 | vextUnderVoltageThresholdLevel | Undervoltage threshold for VEXT.
IfxPmsPm_WutClock | wutClock | Clock select for WUT.
uint32 | wutReloadValue | The value from which the WUT will start downward count upon entering Standby.

◆ IfxPmsPm_VoltageDroopConfig

struct IfxPmsPm_VoltageDroopConfig

Volatge Droop Configuration.

Definition at line 393 of file IfxPmsPm.h.

Data Fields
IfxPmsPm_VoltageDroopRequest | droopRequestType | Type of Voltage Droop Request.
IfxPmsPm_VoltageDroopStep | droopStep | Value by which voltage change must happen.
boolean | enableVoltageDroopTimer | Enable or disable usage of Voltage Droop Timer.
boolean | enableVoltageDroopTimerOverflowFlag | Enable or disable usage of Voltage Droop Timer Overflow Flag.
boolean | enableVoltageDroopTimerOverflowInterrupt | Enable or disable usage of Voltage Droop Interrupt.

◆ IfxPmsPm_WakeupConfig

struct IfxPmsPm_WakeupConfig

Configure Wakeup in standby mode.

Definition at line 404 of file IfxPmsPm.h.

Data Fields
IfxPmsPm_DigitalFilter | filter | bypass/use digital filter
IfxPmsPm_WakeupTimerMode | mode | wake-up timer mode
uint32 | reloadCounter | reload count from where value starts counting down used in case of WUT configuration
IfxPmsPm_StandbyRamSupply | standbyRam | RAM being supply during standby mode.
IfxPmsPm_EdgeDetectionControl | trigger | Enable Wake-up on rising or falling edge.
IfxPmsPm_WakeupOn | wakeup | wake-up configuration


iLLD_TC38A: System Modes

Functions
System Modes
iLLD » PMS » Pm and Evr Drivers » PM
Collaboration diagram for System Modes:

Functions

IFX_INLINE void | IfxPmsPm_setSleepMode (IfxPmsPm_RequestPowerMode powerMode)
set system into sleep mode More...
IFX_EXTERN void | IfxPmsPm_setStandbyMode (Ifx_PMS *pms, IfxPmsPm_WakeupConfig *config, IfxPmsPm_RequestPowerMode powerMode)
set system into stand by mode Note: In this API Alarm has been disabled.Enable of SMU alarm has to be taken care seprately at application level More...
IFX_EXTERN void | IfxPmsPm_initStandbyConfig (IfxPmsPm_StandbyConfig *standbyConfig)
This function will initialize the configuration structure with default values. NOTE: More...
IFX_EXTERN void | IfxPmsPm_startStandbySequenceInFlash (IfxPmsPm_StandbyConfig *standbyConfig, const IfxScuCcu_Config *clockConfig)
IFX_EXTERN void | IfxPmsPm_continueStandbySequenceInRAM (IfxPmsPm_StandbyConfig *standbyConfig, const IfxScuCcu_Config *clockConfig)
IFX_EXTERN void | IfxPmsPm_initSleepConfig (IfxPmsPm_SleepConfig *sleepConfig)
IFX_EXTERN void | IfxPmsPm_startSleepSequenceinFlash (IfxPmsPm_SleepConfig *sleepConfig, IfxScuCcu_Config *clockConfig)
IFX_EXTERN void | IfxPmsPm_continueSleepSequenceInRAM (IfxPmsPm_SleepConfig *sleepConfig)
This is to be placed in PSPR of the Master CPU. More...

Detailed Description

Function Documentation

◆ IfxPmsPm_continueSleepSequenceInRAM()

IFX_EXTERN void IfxPmsPm_continueSleepSequenceInRAM ( IfxPmsPm_SleepConfig * sleepConfig )

This is to be placed in PSPR of the Master CPU.

Parameters
sleepConfig Configurable options for sleep mode
Returns
None

Definition at line 696 of file IfxPmsPm.c.

Referenced by IfxPmsPm_startSleepSequenceinFlash().

◆ IfxPmsPm_continueStandbySequenceInRAM()

IFX_EXTERN void IfxPmsPm_continueStandbySequenceInRAM | ( | IfxPmsPm_StandbyConfig * | standbyConfig,
 |  | const IfxScuCcu_Config * | clockConfig
 | ) |  |
Parameters
standbyConfig | Configuration structure with initialized Standby configuration options
clockConfig | Clock Configuration, with frequency ramp-up/down sequence
Returns
None

Definition at line 462 of file IfxPmsPm.c.

◆ IfxPmsPm_initSleepConfig()

IFX_EXTERN void IfxPmsPm_initSleepConfig ( IfxPmsPm_SleepConfig * sleepConfig )
Parameters
sleepConfig Configurable options for sleep mode
Returns
None

Definition at line 616 of file IfxPmsPm.c.

◆ IfxPmsPm_initStandbyConfig()

IFX_EXTERN void IfxPmsPm_initStandbyConfig ( IfxPmsPm_StandbyConfig * standbyConfig )

This function will initialize the configuration structure with default values. NOTE:

  1. Default values of vextUnderVoltageThresholdLevel and vddUnderVoltageThresholdLevel in the StandbyConfig structure are set to 0. Set it to appropriate levels(depending on application) before calling IfxPmsPm_startStandbySequenceInFlash().
    Parameters
    standbyConfig Configurable options for Standby Mode
    Returns
    None

Definition at line 316 of file IfxPmsPm.c.

◆ IfxPmsPm_setSleepMode()

IFX_INLINE void IfxPmsPm_setSleepMode ( IfxPmsPm_RequestPowerMode powerMode )

set system into sleep mode

Parameters
powerMode Select System power mode
Returns
None

IfxPmsPm_setSleepMode(IfxPmsPm_RequestPowerMode_idle);

Definition at line 784 of file IfxPmsPm.h.

◆ IfxPmsPm_setStandbyMode()

IFX_EXTERN void IfxPmsPm_setStandbyMode | ( | Ifx_PMS * | pms,
 |  | IfxPmsPm_WakeupConfig * | config,
 |  | IfxPmsPm_RequestPowerMode | powerMode
 | ) |  |

set system into stand by mode Note: In this API Alarm has been disabled.Enable of SMU alarm has to be taken care seprately at application level

Parameters
pms | Pointer to Module Space
config | Pointer to Wakeup configuration Structure
powerMode | Selects System standby mode
Returns
None

IfxPmsPm_WakeupConfig config; config.wakeup =IfxPmsPm_WakeupOn_esr1; //Wakeup using ESR1 config.filter = IfxPmsPm_DigitalFilter_used; //Digital Filter is used config.trigger = IfxPmsPm_EdgeDetectionControl_onRisingEdge; //Trigger is generated upon rising edge config.standbyRam = IfxPmsPm_StandbyRamSupply_cpu0Block0; // Standby RAM (CPU0 dLMU RAM Block 0) is supplied IfxPmsPm_setStandbyMode(&MODULE_PMS,&config, IfxPmsPm_RequestPowerMode_standby);

Definition at line 52 of file IfxPmsPm.c.

◆ IfxPmsPm_startSleepSequenceinFlash()

IFX_EXTERN void IfxPmsPm_startSleepSequenceinFlash | ( | IfxPmsPm_SleepConfig * | sleepConfig,
 |  | IfxScuCcu_Config * | clockConfig
 | ) |  |
Parameters
sleepConfig Configurable options for sleep mode
clockConfig
Returns
None

Definition at line 633 of file IfxPmsPm.c.

◆ IfxPmsPm_startStandbySequenceInFlash()

IFX_EXTERN void IfxPmsPm_startStandbySequenceInFlash | ( | IfxPmsPm_StandbyConfig * | standbyConfig,
 |  | const IfxScuCcu_Config * | clockConfig
 | ) |  |
Parameters
standbyConfig | Configuration structure with initialized Standby configuration options
clockConfig | Clock Configuration, with frequency ramp-up/down sequence
Returns
None

Definition at line 354 of file IfxPmsPm.c.


iLLD_TC38A: Cpu Modes

Functions
Cpu Modes
iLLD » PMS » Pm and Evr Drivers » PM
Collaboration diagram for Cpu Modes:

Functions

IFX_INLINE void | IfxPmsPm_setMasterCpu (IfxCpu_ResourceCpu cpuIndex)
Set a given CPU as a Master CPU i.e. ability to trigger power down modes. More...
IFX_INLINE IfxCpu_ResourceCpu | IfxPmsPm_getMasterCpu (void)
Gets the index of Master CPU. More...
IFX_EXTERN boolean | IfxPmsPm_setCoreMode (IfxCpu_ResourceCpu cpuIndex, IfxCpu_CoreMode mode)
Set core mode(Idle/Run) More...

Detailed Description

Function Documentation

◆ IfxPmsPm_getMasterCpu()

IFX_INLINE IfxCpu_ResourceCpu IfxPmsPm_getMasterCpu ( void )

Gets the index of Master CPU.

Definition at line 823 of file IfxPmsPm.h.

Referenced by IfxPmsPm_startSleepSequenceinFlash(), and IfxPmsPm_startStandbySequenceInFlash().

◆ IfxPmsPm_setCoreMode()

IFX_EXTERN boolean IfxPmsPm_setCoreMode | ( | IfxCpu_ResourceCpu | cpuIndex,
 |  | IfxCpu_CoreMode | mode
 | ) |  |

Set core mode(Idle/Run)

Parameters
cpuIndex | specifies cpu index
mode | Select mode to be set to put CPU into IDLE/RUN State
Returns
TRUE: If activity successfully performed FALSE: If Activity is not performed successfully

IfxCpu_setCoreMode(&MODULE_CPU0, IfxCpu_CoreMode_idle);

Definition at line 152 of file IfxPmsPm.c.

Referenced by IfxCpu_setCoreMode().

◆ IfxPmsPm_setMasterCpu()

IFX_INLINE void IfxPmsPm_setMasterCpu ( IfxCpu_ResourceCpu cpuIndex )

Set a given CPU as a Master CPU i.e. ability to trigger power down modes.

Parameters
cpuIndex Index to identify different CPU cores
Returns
None

Definition at line 811 of file IfxPmsPm.h.

Referenced by IfxPmsPm_startSleepSequenceinFlash(), and IfxPmsPm_startStandbySequenceInFlash().


iLLD_TC38A: WakeupModes

Functions
WakeupModes
iLLD » PMS » Pm and Evr Drivers » PM
Collaboration diagram for WakeupModes:

Functions

IFX_EXTERN void | IfxPmsPm_enableWakeup (Ifx_PMS *pms, IfxPmsPm_WakeupConfig *wakeup)
Enable Wakeup using PORST/ESR1/PINA/PINB/WUT/SCR/Power. More...
IFX_EXTERN void | IfxPmsPm_configureWakeup (IfxPmsPm_StandbyConfig *standbyConfig)
IFX_EXTERN void | IfxPmsPm_initiateWakeup (IfxScuCcu_Config *clockConfig)

Detailed Description

Function Documentation

◆ IfxPmsPm_configureWakeup()

IFX_EXTERN void IfxPmsPm_configureWakeup ( IfxPmsPm_StandbyConfig * standbyConfig )
Parameters
standbyConfig Pointer to Standby Configuration Structure
Returns
None

Definition at line 578 of file IfxPmsPm.c.

Referenced by IfxPmsPm_startStandbySequenceInFlash().

◆ IfxPmsPm_enableWakeup()

IFX_EXTERN void IfxPmsPm_enableWakeup | ( | Ifx_PMS * | pms,
 |  | IfxPmsPm_WakeupConfig * | wakeup
 | ) |  |

Enable Wakeup using PORST/ESR1/PINA/PINB/WUT/SCR/Power.

Parameters
pms | Pointer to PMS Module space
wakeup | Pointer to wakeup configuration strucutre
Returns
None

Definition at line 237 of file IfxPmsPm.c.

Referenced by IfxPmsPm_setStandbyMode().

◆ IfxPmsPm_initiateWakeup()

IFX_EXTERN void IfxPmsPm_initiateWakeup ( IfxScuCcu_Config * clockConfig )
Returns
None

Definition at line 749 of file IfxPmsPm.c.


iLLD_TC38A: PMS Pin Mapping

Data Structures | Macros | Variables
PMS Pin Mapping
iLLD » PMS
Collaboration diagram for PMS Pin Mapping:

Data Structures

struct | IfxPms_Wkp_In
Wakeup pin mapping structure. More...
struct | IfxPms_Dcdcsync_Out
DCDC Sync pin mapping structure. More...
struct | IfxPms_Hwcfg_In
Hardware Configuration pin mapping structure. More...

Macros

#define | IFXPMS_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXPMS_PINMAP_DCDCSYNC_OUT_NUM_ITEMS 2
#define | IFXPMS_PINMAP_HWCFG_IN_NUM_ITEMS 6
#define | IFXPMS_PINMAP_WKP_IN_NUM_ITEMS 2

Variables

IFX_EXTERN IfxPms_Dcdcsync_Out IfxPms_DCDCSYNC_P32_2_OUT
DC-DC synchronization output. More...
IFX_EXTERN IfxPms_Dcdcsync_Out IfxPms_DCDCSYNC_P32_4_OUT
DC-DC synchronization output. More...
IFX_EXTERN IfxPms_Hwcfg_In IfxPms_HWCFG1IN_P14_5_IN
HWCFG1 pin input. More...
IFX_EXTERN IfxPms_Hwcfg_In IfxPms_HWCFG2IN_P14_2_IN
HWCFG2 pin input. More...
IFX_EXTERN IfxPms_Hwcfg_In IfxPms_HWCFG3IN_P14_3_IN
HWCFG3 pin input. More...
IFX_EXTERN IfxPms_Hwcfg_In IfxPms_HWCFG4IN_P10_5_IN
HWCFG4 pin input. More...
IFX_EXTERN IfxPms_Hwcfg_In IfxPms_HWCFG5IN_P10_6_IN
HWCFG5 pin input. More...
IFX_EXTERN IfxPms_Hwcfg_In IfxPms_HWCFG6IN_P14_4_IN
HWCFG6 pin input. More...
IFX_EXTERN IfxPms_Wkp_In IfxPms_PINAWKP_P14_1_IN
PINA ( P14.1) pin input. More...
IFX_EXTERN IfxPms_Wkp_In IfxPms_PINBWKP_P33_12_IN
PINB (P33.12) pin input. More...
IFX_EXTERN const IfxPms_Dcdcsync_Out * | IfxPms_Dcdcsync_Out_pinTable [IFXPMS_PINMAP_NUM_MODULES][IFXPMS_PINMAP_DCDCSYNC_OUT_NUM_ITEMS]
IfxPms_Dcdcsync_Out table. More...
IFX_EXTERN const IfxPms_Hwcfg_In * | IfxPms_Hwcfg_In_pinTable [IFXPMS_PINMAP_NUM_MODULES][IFXPMS_PINMAP_HWCFG_IN_NUM_ITEMS]
IfxPms_Hwcfg_In table. More...
IFX_EXTERN const IfxPms_Wkp_In * | IfxPms_Wkp_In_pinTable [IFXPMS_PINMAP_NUM_MODULES][IFXPMS_PINMAP_WKP_IN_NUM_ITEMS]
IfxPms_Wkp_In table. More...

Detailed Description

Data Structure Documentation

◆ IfxPms_Wkp_In

struct IfxPms_Wkp_In

Wakeup pin mapping structure.

Definition at line 56 of file IfxPms_PinMap.h.

Collaboration diagram for IfxPms_Wkp_In:
[legend]
Data Fields
Ifx_PMS * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxPms_Dcdcsync_Out

struct IfxPms_Dcdcsync_Out

DCDC Sync pin mapping structure.

Definition at line 64 of file IfxPms_PinMap.h.

Collaboration diagram for IfxPms_Dcdcsync_Out:
[legend]
Data Fields
Ifx_PMS * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxPms_Hwcfg_In

struct IfxPms_Hwcfg_In

Hardware Configuration pin mapping structure.

Definition at line 72 of file IfxPms_PinMap.h.

Collaboration diagram for IfxPms_Hwcfg_In:
[legend]
Data Fields
Ifx_PMS * | module | Base address.
IfxPort_Pin | pin | Port pin.

Macro Definition Documentation

◆ IFXPMS_PINMAP_DCDCSYNC_OUT_NUM_ITEMS

#define IFXPMS_PINMAP_DCDCSYNC_OUT_NUM_ITEMS 2

Definition at line 92 of file IfxPms_PinMap.h.

◆ IFXPMS_PINMAP_HWCFG_IN_NUM_ITEMS

#define IFXPMS_PINMAP_HWCFG_IN_NUM_ITEMS 6

Definition at line 93 of file IfxPms_PinMap.h.

◆ IFXPMS_PINMAP_NUM_MODULES

#define IFXPMS_PINMAP_NUM_MODULES 1

Table dimensions.

Definition at line 91 of file IfxPms_PinMap.h.

◆ IFXPMS_PINMAP_WKP_IN_NUM_ITEMS

#define IFXPMS_PINMAP_WKP_IN_NUM_ITEMS 2

Definition at line 94 of file IfxPms_PinMap.h.

Variable Documentation

◆ IfxPms_Dcdcsync_Out_pinTable

IFX_EXTERN const IfxPms_Dcdcsync_Out* IfxPms_Dcdcsync_Out_pinTable[IFXPMS_PINMAP_NUM_MODULES][IFXPMS_PINMAP_DCDCSYNC_OUT_NUM_ITEMS]

IfxPms_Dcdcsync_Out table.

Definition at line 98 of file IfxPms_PinMap.h.

◆ IfxPms_DCDCSYNC_P32_2_OUT

IFX_EXTERN IfxPms_Dcdcsync_Out IfxPms_DCDCSYNC_P32_2_OUT

DC-DC synchronization output.

Definition at line 79 of file IfxPms_PinMap.h.

◆ IfxPms_DCDCSYNC_P32_4_OUT

IFX_EXTERN IfxPms_Dcdcsync_Out IfxPms_DCDCSYNC_P32_4_OUT

DC-DC synchronization output.

Definition at line 80 of file IfxPms_PinMap.h.

◆ IfxPms_HWCFG1IN_P14_5_IN

IFX_EXTERN IfxPms_Hwcfg_In IfxPms_HWCFG1IN_P14_5_IN

HWCFG1 pin input.

Definition at line 81 of file IfxPms_PinMap.h.

◆ IfxPms_HWCFG2IN_P14_2_IN

IFX_EXTERN IfxPms_Hwcfg_In IfxPms_HWCFG2IN_P14_2_IN

HWCFG2 pin input.

Definition at line 82 of file IfxPms_PinMap.h.

◆ IfxPms_HWCFG3IN_P14_3_IN

IFX_EXTERN IfxPms_Hwcfg_In IfxPms_HWCFG3IN_P14_3_IN

HWCFG3 pin input.

Definition at line 83 of file IfxPms_PinMap.h.

◆ IfxPms_HWCFG4IN_P10_5_IN

IFX_EXTERN IfxPms_Hwcfg_In IfxPms_HWCFG4IN_P10_5_IN

HWCFG4 pin input.

Definition at line 84 of file IfxPms_PinMap.h.

◆ IfxPms_HWCFG5IN_P10_6_IN

IFX_EXTERN IfxPms_Hwcfg_In IfxPms_HWCFG5IN_P10_6_IN

HWCFG5 pin input.

Definition at line 85 of file IfxPms_PinMap.h.

◆ IfxPms_HWCFG6IN_P14_4_IN

IFX_EXTERN IfxPms_Hwcfg_In IfxPms_HWCFG6IN_P14_4_IN

HWCFG6 pin input.

Definition at line 86 of file IfxPms_PinMap.h.

◆ IfxPms_Hwcfg_In_pinTable

IFX_EXTERN const IfxPms_Hwcfg_In* IfxPms_Hwcfg_In_pinTable[IFXPMS_PINMAP_NUM_MODULES][IFXPMS_PINMAP_HWCFG_IN_NUM_ITEMS]

IfxPms_Hwcfg_In table.

Definition at line 101 of file IfxPms_PinMap.h.

◆ IfxPms_PINAWKP_P14_1_IN

IFX_EXTERN IfxPms_Wkp_In IfxPms_PINAWKP_P14_1_IN

PINA ( P14.1) pin input.

Definition at line 87 of file IfxPms_PinMap.h.

◆ IfxPms_PINBWKP_P33_12_IN

IFX_EXTERN IfxPms_Wkp_In IfxPms_PINBWKP_P33_12_IN

PINB (P33.12) pin input.

Definition at line 88 of file IfxPms_PinMap.h.

◆ IfxPms_Wkp_In_pinTable

IFX_EXTERN const IfxPms_Wkp_In* IfxPms_Wkp_In_pinTable[IFXPMS_PINMAP_NUM_MODULES][IFXPMS_PINMAP_WKP_IN_NUM_ITEMS]

IfxPms_Wkp_In table.

Definition at line 104 of file IfxPms_PinMap.h.


iLLD_TC38A: IfxPms_cfg.h File Reference

  • _Impl
Macros
IfxPms_cfg.h File Reference
iLLD » PMS

PMS on-chip implementation data. More...

#include "Ifx_Cfg.h"
Include dependency graph for IfxPms_cfg.h:

Go to the source code of this file.

Macros

#define | IFXPMS_STANDBY_CPU0_DLMU_RAR_AREA (0x90000000U)
#define | IFXPMS_STANDBY_DLMU_RAR_SIZE (16U /* in words (32 bit) */)
#define | IFXPMS_STANDBY_CPU1_DLMU_RAR_AREA (0x90010000U)
#define | IFXPMS_NUM_MODULES (1)
#define | IFXPMS_DISABLE_MODULES_DURING_SLEEP
This macro is intended to be defined in Ifx_Cfg.h and is meant to cut off the clock supply to desired modules by writing to their respective CLC.B.DISR or CLC.B.EDIS It is used in IfxPmsPm_startSleepSequenceinFlash(). This macro is empty by default.For example: More...
#define | IFXPMS_DISABLE_ALL_MODULES_STANDBY
This macro is intended to be defined in Ifx_Cfg.h and is meant to cut off the clock supply to desired modules by writing to their respective CLC.B.DISR or CLC.B.EDIS. It is used in IfxPmsPm_startStandbySequenceInFlash(). More...
#define | IFXPMS_WAKEUP_MODULES
This macro is intended to be defined in Ifx_Cfg.h and is meant to restore the clock supply to desired modules by writing to their respective CLC.B.DISR. This is used in IfxPmsPm_initiateWakeup() This macro is empty by default.For example: More...
#define | IFXPMS_RESTART_EXECUTION
This macro is intended to be defined in Ifx_Cfg.h and is meant to contain any activity the application might need to do after wakeup. This can be done here in this macro or after the control returns from IfxPmsPm_initiateWakeup() This macro is empty by default. More...
#define | IFXPMS_WAIT_CYCLES 100
Number of cycles to wait after switching to backup clock is triggered before shutting down the oscillator. This is given as a configurable macro because the value required has been seen to vary and so the application may define it in Ifx_Cfg.h. More...

Detailed Description

PMS on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPms_cfg.h.

Macro Definition Documentation

◆ IFXPMS_DISABLE_ALL_MODULES_STANDBY

#define IFXPMS_DISABLE_ALL_MODULES_STANDBY

This macro is intended to be defined in Ifx_Cfg.h and is meant to cut off the clock supply to desired modules by writing to their respective CLC.B.DISR or CLC.B.EDIS. It is used in IfxPmsPm_startStandbySequenceInFlash().

This macro is empty by default.For example:

Example usage: #define IFXPMS_DISABLE_ALL_MODULES_STANDBY \ { \ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();\ IfxScuWdt_clearCpuEndinit(passwd); \ MODULE_ASCLIN.CLC.B.DISR = 1; \ MODULE_EVADC.CLC.B.DISR = 1; \ MODULE_EDSADC.CLC.B.DISR = 1; \ IfxScuWdt_setCpuEndinit(passwd); \ }

Definition at line 108 of file IfxPms_cfg.h.

Referenced by IfxPmsPm_startStandbySequenceInFlash().

◆ IFXPMS_DISABLE_MODULES_DURING_SLEEP

#define IFXPMS_DISABLE_MODULES_DURING_SLEEP

This macro is intended to be defined in Ifx_Cfg.h and is meant to cut off the clock supply to desired modules by writing to their respective CLC.B.DISR or CLC.B.EDIS It is used in IfxPmsPm_startSleepSequenceinFlash(). This macro is empty by default.For example:

Example usage: #define IFXPMS_DISABLE_MODULES_DURING_SLEEP \ { \ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();\ IfxScuWdt_clearCpuEndinit(passwd); \ MODULE_ASCLIN.CLC.B.DISR = 1; \ MODULE_EVADC.CLC.B.DISR = 1; \ MODULE_EDSADC.CLC.B.DISR = 1; \ IfxScuWdt_setCpuEndinit(passwd); \ }

Definition at line 87 of file IfxPms_cfg.h.

Referenced by IfxPmsPm_startSleepSequenceinFlash().

◆ IFXPMS_NUM_MODULES

#define IFXPMS_NUM_MODULES (1)

Definition at line 68 of file IfxPms_cfg.h.

◆ IFXPMS_RESTART_EXECUTION

#define IFXPMS_RESTART_EXECUTION

This macro is intended to be defined in Ifx_Cfg.h and is meant to contain any activity the application might need to do after wakeup. This can be done here in this macro or after the control returns from IfxPmsPm_initiateWakeup() This macro is empty by default.

Definition at line 136 of file IfxPms_cfg.h.

Referenced by IfxPmsPm_initiateWakeup().

◆ IFXPMS_STANDBY_CPU0_DLMU_RAR_AREA

#define IFXPMS_STANDBY_CPU0_DLMU_RAR_AREA (0x90000000U)

Definition at line 62 of file IfxPms_cfg.h.

◆ IFXPMS_STANDBY_CPU1_DLMU_RAR_AREA

#define IFXPMS_STANDBY_CPU1_DLMU_RAR_AREA (0x90010000U)

Definition at line 66 of file IfxPms_cfg.h.

◆ IFXPMS_STANDBY_DLMU_RAR_SIZE

#define IFXPMS_STANDBY_DLMU_RAR_SIZE (16U /* in words (32 bit) */)

Definition at line 64 of file IfxPms_cfg.h.

◆ IFXPMS_WAIT_CYCLES

#define IFXPMS_WAIT_CYCLES 100

Number of cycles to wait after switching to backup clock is triggered before shutting down the oscillator. This is given as a configurable macro because the value required has been seen to vary and so the application may define it in Ifx_Cfg.h.

Definition at line 143 of file IfxPms_cfg.h.

Referenced by IfxPmsPm_setStandbyMode().

◆ IFXPMS_WAKEUP_MODULES

#define IFXPMS_WAKEUP_MODULES

This macro is intended to be defined in Ifx_Cfg.h and is meant to restore the clock supply to desired modules by writing to their respective CLC.B.DISR. This is used in IfxPmsPm_initiateWakeup() This macro is empty by default.For example:

Example usage: #define IFXPMS_WAKEUP_MODULES \ { \ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();\ IfxScuWdt_clearCpuEndinit(passwd); \ MODULE_ASCLIN.CLC.B.DISR = 0; \ MODULE_EVADC.CLC.B.DISR = 0; \ MODULE_EDSADC.CLC.B.DISR = 0; \ IfxScuWdt_setCpuEndinit(passwd); \ }

Definition at line 128 of file IfxPms_cfg.h.

Referenced by IfxPmsPm_initiateWakeup().


iLLD_TC38A: IfxPms_PinMap.c File Reference

  • _PinMap
Variables
IfxPms_PinMap.c File Reference
iLLD » PMS

PMS I/O map. More...

#include "IfxPms_PinMap.h"
Include dependency graph for IfxPms_PinMap.c:

Go to the source code of this file.

Variables

IfxPms_Dcdcsync_Out | IfxPms_DCDCSYNC_P32_2_OUT = {&MODULE_PMS, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt6}
IfxPms_Dcdcsync_Out | IfxPms_DCDCSYNC_P32_4_OUT = {&MODULE_PMS, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt2}
IfxPms_Hwcfg_In | IfxPms_HWCFG1IN_P14_5_IN = {&MODULE_PMS, {&MODULE_P14, 5}}
IfxPms_Hwcfg_In | IfxPms_HWCFG2IN_P14_2_IN = {&MODULE_PMS, {&MODULE_P14, 2}}
IfxPms_Hwcfg_In | IfxPms_HWCFG3IN_P14_3_IN = {&MODULE_PMS, {&MODULE_P14, 3}}
IfxPms_Hwcfg_In | IfxPms_HWCFG4IN_P10_5_IN = {&MODULE_PMS, {&MODULE_P10, 5}}
IfxPms_Hwcfg_In | IfxPms_HWCFG5IN_P10_6_IN = {&MODULE_PMS, {&MODULE_P10, 6}}
IfxPms_Hwcfg_In | IfxPms_HWCFG6IN_P14_4_IN = {&MODULE_PMS, {&MODULE_P14, 4}}
IfxPms_Wkp_In | IfxPms_PINAWKP_P14_1_IN = {&MODULE_PMS, {&MODULE_P14, 1}, Ifx_RxSel_a}
IfxPms_Wkp_In | IfxPms_PINBWKP_P33_12_IN = {&MODULE_PMS, {&MODULE_P33,12}, Ifx_RxSel_b}
const IfxPms_Dcdcsync_Out * | IfxPms_Dcdcsync_Out_pinTable [IFXPMS_PINMAP_NUM_MODULES][IFXPMS_PINMAP_DCDCSYNC_OUT_NUM_ITEMS]
const IfxPms_Hwcfg_In * | IfxPms_Hwcfg_In_pinTable [IFXPMS_PINMAP_NUM_MODULES][IFXPMS_PINMAP_HWCFG_IN_NUM_ITEMS]
const IfxPms_Wkp_In * | IfxPms_Wkp_In_pinTable [IFXPMS_PINMAP_NUM_MODULES][IFXPMS_PINMAP_WKP_IN_NUM_ITEMS]

Detailed Description

PMS I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPms_PinMap.c.

Variable Documentation

◆ IfxPms_Dcdcsync_Out_pinTable

const IfxPms_Dcdcsync_Out* IfxPms_Dcdcsync_Out_pinTable[IFXPMS_PINMAP_NUM_MODULES][IFXPMS_PINMAP_DCDCSYNC_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxPms_DCDCSYNC_P32_2_OUT,
&IfxPms_DCDCSYNC_P32_4_OUT
}
}
IfxPms_DCDCSYNC_P32_4_OUT
IfxPms_Dcdcsync_Out IfxPms_DCDCSYNC_P32_4_OUT
Definition: IfxPms_PinMap.c:46
IfxPms_DCDCSYNC_P32_2_OUT
IfxPms_Dcdcsync_Out IfxPms_DCDCSYNC_P32_2_OUT
Definition: IfxPms_PinMap.c:45

Definition at line 57 of file IfxPms_PinMap.c.

◆ IfxPms_DCDCSYNC_P32_2_OUT

IfxPms_Dcdcsync_Out IfxPms_DCDCSYNC_P32_2_OUT = {&MODULE_PMS, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt6}

Definition at line 45 of file IfxPms_PinMap.c.

◆ IfxPms_DCDCSYNC_P32_4_OUT

IfxPms_Dcdcsync_Out IfxPms_DCDCSYNC_P32_4_OUT = {&MODULE_PMS, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt2}

Definition at line 46 of file IfxPms_PinMap.c.

◆ IfxPms_HWCFG1IN_P14_5_IN

IfxPms_Hwcfg_In IfxPms_HWCFG1IN_P14_5_IN = {&MODULE_PMS, {&MODULE_P14, 5}}

Definition at line 47 of file IfxPms_PinMap.c.

◆ IfxPms_HWCFG2IN_P14_2_IN

IfxPms_Hwcfg_In IfxPms_HWCFG2IN_P14_2_IN = {&MODULE_PMS, {&MODULE_P14, 2}}

Definition at line 48 of file IfxPms_PinMap.c.

◆ IfxPms_HWCFG3IN_P14_3_IN

IfxPms_Hwcfg_In IfxPms_HWCFG3IN_P14_3_IN = {&MODULE_PMS, {&MODULE_P14, 3}}

Definition at line 49 of file IfxPms_PinMap.c.

◆ IfxPms_HWCFG4IN_P10_5_IN

IfxPms_Hwcfg_In IfxPms_HWCFG4IN_P10_5_IN = {&MODULE_PMS, {&MODULE_P10, 5}}

Definition at line 50 of file IfxPms_PinMap.c.

◆ IfxPms_HWCFG5IN_P10_6_IN

IfxPms_Hwcfg_In IfxPms_HWCFG5IN_P10_6_IN = {&MODULE_PMS, {&MODULE_P10, 6}}

Definition at line 51 of file IfxPms_PinMap.c.

◆ IfxPms_HWCFG6IN_P14_4_IN

IfxPms_Hwcfg_In IfxPms_HWCFG6IN_P14_4_IN = {&MODULE_PMS, {&MODULE_P14, 4}}

Definition at line 52 of file IfxPms_PinMap.c.

◆ IfxPms_Hwcfg_In_pinTable

const IfxPms_Hwcfg_In* IfxPms_Hwcfg_In_pinTable[IFXPMS_PINMAP_NUM_MODULES][IFXPMS_PINMAP_HWCFG_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxPms_HWCFG6IN_P14_4_IN,
&IfxPms_HWCFG3IN_P14_3_IN,
&IfxPms_HWCFG1IN_P14_5_IN,
&IfxPms_HWCFG2IN_P14_2_IN,
&IfxPms_HWCFG5IN_P10_6_IN,
&IfxPms_HWCFG4IN_P10_5_IN
}
}
IfxPms_HWCFG1IN_P14_5_IN
IfxPms_Hwcfg_In IfxPms_HWCFG1IN_P14_5_IN
Definition: IfxPms_PinMap.c:47
IfxPms_HWCFG2IN_P14_2_IN
IfxPms_Hwcfg_In IfxPms_HWCFG2IN_P14_2_IN
Definition: IfxPms_PinMap.c:48
IfxPms_HWCFG5IN_P10_6_IN
IfxPms_Hwcfg_In IfxPms_HWCFG5IN_P10_6_IN
Definition: IfxPms_PinMap.c:51
IfxPms_HWCFG4IN_P10_5_IN
IfxPms_Hwcfg_In IfxPms_HWCFG4IN_P10_5_IN
Definition: IfxPms_PinMap.c:50
IfxPms_HWCFG6IN_P14_4_IN
IfxPms_Hwcfg_In IfxPms_HWCFG6IN_P14_4_IN
Definition: IfxPms_PinMap.c:52
IfxPms_HWCFG3IN_P14_3_IN
IfxPms_Hwcfg_In IfxPms_HWCFG3IN_P14_3_IN
Definition: IfxPms_PinMap.c:49

Definition at line 64 of file IfxPms_PinMap.c.

◆ IfxPms_PINAWKP_P14_1_IN

IfxPms_Wkp_In IfxPms_PINAWKP_P14_1_IN = {&MODULE_PMS, {&MODULE_P14, 1}, Ifx_RxSel_a}

Definition at line 53 of file IfxPms_PinMap.c.

◆ IfxPms_PINBWKP_P33_12_IN

IfxPms_Wkp_In IfxPms_PINBWKP_P33_12_IN = {&MODULE_PMS, {&MODULE_P33,12}, Ifx_RxSel_b}

Definition at line 54 of file IfxPms_PinMap.c.

◆ IfxPms_Wkp_In_pinTable

const IfxPms_Wkp_In* IfxPms_Wkp_In_pinTable[IFXPMS_PINMAP_NUM_MODULES][IFXPMS_PINMAP_WKP_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxPms_PINAWKP_P14_1_IN,
&IfxPms_PINBWKP_P33_12_IN
}
}
IfxPms_PINAWKP_P14_1_IN
IfxPms_Wkp_In IfxPms_PINAWKP_P14_1_IN
Definition: IfxPms_PinMap.c:53
IfxPms_PINBWKP_P33_12_IN
IfxPms_Wkp_In IfxPms_PINBWKP_P33_12_IN
Definition: IfxPms_PinMap.c:54

Definition at line 75 of file IfxPms_PinMap.c.


iLLD_TC38A: IfxPms_PinMap.h File Reference

  • _PinMap
Data Structures | Macros | Variables
IfxPms_PinMap.h File Reference
iLLD » PMS

PMS I/O map. More...

#include <IfxPms_reg.h>
#include <_Impl/IfxPms_cfg.h>
#include <Port/Std/IfxPort.h>
Include dependency graph for IfxPms_PinMap.h:

Go to the source code of this file.

Data Structures

struct | IfxPms_Wkp_In
Wakeup pin mapping structure. More...
struct | IfxPms_Dcdcsync_Out
DCDC Sync pin mapping structure. More...
struct | IfxPms_Hwcfg_In
Hardware Configuration pin mapping structure. More...

Macros

#define | IFXPMS_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXPMS_PINMAP_DCDCSYNC_OUT_NUM_ITEMS 2
#define | IFXPMS_PINMAP_HWCFG_IN_NUM_ITEMS 6
#define | IFXPMS_PINMAP_WKP_IN_NUM_ITEMS 2

Variables

IFX_EXTERN IfxPms_Dcdcsync_Out IfxPms_DCDCSYNC_P32_2_OUT
DC-DC synchronization output. More...
IFX_EXTERN IfxPms_Dcdcsync_Out IfxPms_DCDCSYNC_P32_4_OUT
DC-DC synchronization output. More...
IFX_EXTERN IfxPms_Hwcfg_In IfxPms_HWCFG1IN_P14_5_IN
HWCFG1 pin input. More...
IFX_EXTERN IfxPms_Hwcfg_In IfxPms_HWCFG2IN_P14_2_IN
HWCFG2 pin input. More...
IFX_EXTERN IfxPms_Hwcfg_In IfxPms_HWCFG3IN_P14_3_IN
HWCFG3 pin input. More...
IFX_EXTERN IfxPms_Hwcfg_In IfxPms_HWCFG4IN_P10_5_IN
HWCFG4 pin input. More...
IFX_EXTERN IfxPms_Hwcfg_In IfxPms_HWCFG5IN_P10_6_IN
HWCFG5 pin input. More...
IFX_EXTERN IfxPms_Hwcfg_In IfxPms_HWCFG6IN_P14_4_IN
HWCFG6 pin input. More...
IFX_EXTERN IfxPms_Wkp_In IfxPms_PINAWKP_P14_1_IN
PINA ( P14.1) pin input. More...
IFX_EXTERN IfxPms_Wkp_In IfxPms_PINBWKP_P33_12_IN
PINB (P33.12) pin input. More...
IFX_EXTERN const IfxPms_Dcdcsync_Out * | IfxPms_Dcdcsync_Out_pinTable [IFXPMS_PINMAP_NUM_MODULES][IFXPMS_PINMAP_DCDCSYNC_OUT_NUM_ITEMS]
IfxPms_Dcdcsync_Out table. More...
IFX_EXTERN const IfxPms_Hwcfg_In * | IfxPms_Hwcfg_In_pinTable [IFXPMS_PINMAP_NUM_MODULES][IFXPMS_PINMAP_HWCFG_IN_NUM_ITEMS]
IfxPms_Hwcfg_In table. More...
IFX_EXTERN const IfxPms_Wkp_In * | IfxPms_Wkp_In_pinTable [IFXPMS_PINMAP_NUM_MODULES][IFXPMS_PINMAP_WKP_IN_NUM_ITEMS]
IfxPms_Wkp_In table. More...

Detailed Description

PMS I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPms_PinMap.h.


iLLD_TC38A: IfxPmsEvr.h File Reference

  • Pms
  • Std
Data Structures | Macros | Enumerations | Functions | Variables
IfxPmsEvr.h File Reference
iLLD » PMS

PMS basic functionality. More...

#include "_Impl/IfxPms_cfg.h"
#include "Cpu/Std/IfxCpu.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "IfxPms_bf.h"
#include "IfxPms_reg.h"
#include "IfxStm_reg.h"
#include "IfxScu_reg.h"
Include dependency graph for IfxPmsEvr.h:

Go to the source code of this file.

Data Structures

struct | IfxPmsEvr_StepDownRegulatorRegConfig
struct | IfxPmsEvr_initSequencePhase
struct | IfxPmsEvr_checkRegConfig
struct | IfxPmsEvr_initSequence

Macros

#define | IFXPMSEVR_ADC_VDD_LSB (0.005f)
#define | IFXPMSEVR_ADC_VDDP3_LSB (0.015f)
#define | IFXPMSEVR_ADC_VEXT_LSB (0.02f)
#define | IFXPMSEVR_CTRL_UP_WAIT_TIMEOUTCOUNT (0x100)

Enumerations

enum IfxPmsEvr_EnableInterrupt {
IfxPmsEvr_EnableInterrupt_ovswd = 0,
IfxPmsEvr_EnableInterrupt_uvswd = 1,
IfxPmsEvr_EnableInterrupt_ov33 = 2,
IfxPmsEvr_EnableInterrupt_uv33 = 3,
IfxPmsEvr_EnableInterrupt_ovc = 4,
IfxPmsEvr_EnableInterrupt_uvc = 5,
IfxPmsEvr_EnableInterrupt_ovpre = 6,
IfxPmsEvr_EnableInterrupt_uvpre = 7,
IfxPmsEvr_EnableInterrupt_ovddm = 8,
IfxPmsEvr_EnableInterrupt_uvddm = 9,
IfxPmsEvr_EnableInterrupt_ovsb = 10,
IfxPmsEvr_EnableInterrupt_uvsb = 11,
IfxPmsEvr_EnableInterrupt_evrcmod = 16,
IfxPmsEvr_EnableInterrupt_sdvok = 17,
IfxPmsEvr_EnableInterrupt_synclck = 18,
IfxPmsEvr_EnableInterrupt_swdlvl = 19,
IfxPmsEvr_EnableInterrupt_wutwkp = 21,
IfxPmsEvr_EnableInterrupt_esr0wkp = 22,
IfxPmsEvr_EnableInterrupt_esr1wkp = 23,
IfxPmsEvr_EnableInterrupt_pinawkp = 24,
IfxPmsEvr_EnableInterrupt_pinbwkp = 25,
IfxPmsEvr_EnableInterrupt_scrint = 26,
IfxPmsEvr_EnableInterrupt_scrrst = 27,
IfxPmsEvr_EnableInterrupt_screcc = 28,
IfxPmsEvr_EnableInterrupt_scrwdt = 29
}
Configure respective interrupts define in register Ifx_PMS.PMSIEN. More...
enum IfxPmsEvr_EvrcMode {
IfxPmsEvr_EvrcMode_pwmMode = 0,
IfxPmsEvr_EvrcMode_lowPowerMode = 1,
IfxPmsEvr_EvrcMode_startupMode = 2,
IfxPmsEvr_EvrcMode_disableMode = 3
}
Current operation mode of EVRC Regulator defined in Ifx_PMS.EVR.STAT.B.EVRCMOD. More...
enum IfxPmsEvr_ExtSyncSwitchingFreqDivFactor {
IfxPmsEvr_ExtSyncSwitchingFreqDivFactor_1 = 0,
IfxPmsEvr_ExtSyncSwitchingFreqDivFactor_2 = 1,
IfxPmsEvr_ExtSyncSwitchingFreqDivFactor_4 = 2,
IfxPmsEvr_ExtSyncSwitchingFreqDivFactor_8 = 3,
IfxPmsEvr_ExtSyncSwitchingFreqDivFactor_16 = 4,
IfxPmsEvr_ExtSyncSwitchingFreqDivFactor_32 = 5
}
Switching frequency division factor for external synchronisation defined in Ifx_PMS.EVRSDCTRL7.B.SYNCDIVFAC. More...
enum IfxPmsEvr_OverVoltageMonitoring {
IfxPmsEvr_OverVoltageMonitoring_inactive = 0,
IfxPmsEvr_OverVoltageMonitoring_lowToHighVoltageTransition = 1,
IfxPmsEvr_OverVoltageMonitoring_highToLowVoltageTransition = 2,
IfxPmsEvr_OverVoltageMonitoring_eitherDirectionVoltageTransition = 3
}
Monitoring OverVoltage for all bitfields defined in .Ifx_PMS.EVR.MONCTRL register for overvoltage monitoring. More...
enum IfxPmsEvr_PrimaryAdcTrimValue {
IfxPmsEvr_PrimaryAdcTrimValue_0 = 0,
IfxPmsEvr_PrimaryAdcTrimValue_1,
IfxPmsEvr_PrimaryAdcTrimValue_2,
IfxPmsEvr_PrimaryAdcTrimValue_3,
IfxPmsEvr_PrimaryAdcTrimValue_4,
IfxPmsEvr_PrimaryAdcTrimValue_5,
IfxPmsEvr_PrimaryAdcTrimValue_6,
IfxPmsEvr_PrimaryAdcTrimValue_7,
IfxPmsEvr_PrimaryAdcTrimValue_8,
IfxPmsEvr_PrimaryAdcTrimValue_9,
IfxPmsEvr_PrimaryAdcTrimValue_10,
IfxPmsEvr_PrimaryAdcTrimValue_11,
IfxPmsEvr_PrimaryAdcTrimValue_12,
IfxPmsEvr_PrimaryAdcTrimValue_13,
IfxPmsEvr_PrimaryAdcTrimValue_14,
IfxPmsEvr_PrimaryAdcTrimValue_15,
IfxPmsEvr_PrimaryAdcTrimValue_16,
IfxPmsEvr_PrimaryAdcTrimValue_17,
IfxPmsEvr_PrimaryAdcTrimValue_18,
IfxPmsEvr_PrimaryAdcTrimValue_19,
IfxPmsEvr_PrimaryAdcTrimValue_20,
IfxPmsEvr_PrimaryAdcTrimValue_21,
IfxPmsEvr_PrimaryAdcTrimValue_22,
IfxPmsEvr_PrimaryAdcTrimValue_23,
IfxPmsEvr_PrimaryAdcTrimValue_24,
IfxPmsEvr_PrimaryAdcTrimValue_25,
IfxPmsEvr_PrimaryAdcTrimValue_26,
IfxPmsEvr_PrimaryAdcTrimValue_27,
IfxPmsEvr_PrimaryAdcTrimValue_28,
IfxPmsEvr_PrimaryAdcTrimValue_29,
IfxPmsEvr_PrimaryAdcTrimValue_30,
IfxPmsEvr_PrimaryAdcTrimValue_31,
IfxPmsEvr_PrimaryAdcTrimValue_32,
IfxPmsEvr_PrimaryAdcTrimValue_33,
IfxPmsEvr_PrimaryAdcTrimValue_34,
IfxPmsEvr_PrimaryAdcTrimValue_35,
IfxPmsEvr_PrimaryAdcTrimValue_36,
IfxPmsEvr_PrimaryAdcTrimValue_37,
IfxPmsEvr_PrimaryAdcTrimValue_38,
IfxPmsEvr_PrimaryAdcTrimValue_39,
IfxPmsEvr_PrimaryAdcTrimValue_40,
IfxPmsEvr_PrimaryAdcTrimValue_41,
IfxPmsEvr_PrimaryAdcTrimValue_42,
IfxPmsEvr_PrimaryAdcTrimValue_43,
IfxPmsEvr_PrimaryAdcTrimValue_44,
IfxPmsEvr_PrimaryAdcTrimValue_45,
IfxPmsEvr_PrimaryAdcTrimValue_46,
IfxPmsEvr_PrimaryAdcTrimValue_47,
IfxPmsEvr_PrimaryAdcTrimValue_48,
IfxPmsEvr_PrimaryAdcTrimValue_49,
IfxPmsEvr_PrimaryAdcTrimValue_50,
IfxPmsEvr_PrimaryAdcTrimValue_51,
IfxPmsEvr_PrimaryAdcTrimValue_52,
IfxPmsEvr_PrimaryAdcTrimValue_53,
IfxPmsEvr_PrimaryAdcTrimValue_54,
IfxPmsEvr_PrimaryAdcTrimValue_55,
IfxPmsEvr_PrimaryAdcTrimValue_56,
IfxPmsEvr_PrimaryAdcTrimValue_57,
IfxPmsEvr_PrimaryAdcTrimValue_58,
IfxPmsEvr_PrimaryAdcTrimValue_59,
IfxPmsEvr_PrimaryAdcTrimValue_60,
IfxPmsEvr_PrimaryAdcTrimValue_61,
IfxPmsEvr_PrimaryAdcTrimValue_62,
IfxPmsEvr_PrimaryAdcTrimValue_63
}
set TRIM Value For respective Voltages. Defined in Ifx_PMS.EVR.TRIM and Ifx_PMS.EVR.TRIM2 More...
enum IfxPmsEvr_SecondaryVoltageErrorCounter {
IfxPmsEvr_SecondaryVoltageErrorCounter_level0 = 0,
IfxPmsEvr_SecondaryVoltageErrorCounter_level1,
IfxPmsEvr_SecondaryVoltageErrorCounter_level2,
IfxPmsEvr_SecondaryVoltageErrorCounter_level3,
IfxPmsEvr_SecondaryVoltageErrorCounter_level4,
IfxPmsEvr_SecondaryVoltageErrorCounter_level5,
IfxPmsEvr_SecondaryVoltageErrorCounter_level6,
IfxPmsEvr_SecondaryVoltageErrorCounter_level7,
IfxPmsEvr_SecondaryVoltageErrorCounter_level8,
IfxPmsEvr_SecondaryVoltageErrorCounter_level9,
IfxPmsEvr_SecondaryVoltageErrorCounter_level10,
IfxPmsEvr_SecondaryVoltageErrorCounter_level11,
IfxPmsEvr_SecondaryVoltageErrorCounter_level12,
IfxPmsEvr_SecondaryVoltageErrorCounter_level13,
IfxPmsEvr_SecondaryVoltageErrorCounter_level14,
IfxPmsEvr_SecondaryVoltageErrorCounter_level15,
IfxPmsEvr_SecondaryVoltageErrorCounter_level16,
IfxPmsEvr_SecondaryVoltageErrorCounter_level17,
IfxPmsEvr_SecondaryVoltageErrorCounter_level18,
IfxPmsEvr_SecondaryVoltageErrorCounter_level19,
IfxPmsEvr_SecondaryVoltageErrorCounter_level20,
IfxPmsEvr_SecondaryVoltageErrorCounter_level21,
IfxPmsEvr_SecondaryVoltageErrorCounter_level22,
IfxPmsEvr_SecondaryVoltageErrorCounter_level23,
IfxPmsEvr_SecondaryVoltageErrorCounter_level24,
IfxPmsEvr_SecondaryVoltageErrorCounter_level25,
IfxPmsEvr_SecondaryVoltageErrorCounter_level26,
IfxPmsEvr_SecondaryVoltageErrorCounter_level27,
IfxPmsEvr_SecondaryVoltageErrorCounter_level28,
IfxPmsEvr_SecondaryVoltageErrorCounter_level29,
IfxPmsEvr_SecondaryVoltageErrorCounter_level30,
IfxPmsEvr_SecondaryVoltageErrorCounter_level31,
IfxPmsEvr_SecondaryVoltageErrorCounter_level32,
IfxPmsEvr_SecondaryVoltageErrorCounter_level33,
IfxPmsEvr_SecondaryVoltageErrorCounter_level34,
IfxPmsEvr_SecondaryVoltageErrorCounter_level35,
IfxPmsEvr_SecondaryVoltageErrorCounter_level36,
IfxPmsEvr_SecondaryVoltageErrorCounter_level37,
IfxPmsEvr_SecondaryVoltageErrorCounter_level38,
IfxPmsEvr_SecondaryVoltageErrorCounter_level39,
IfxPmsEvr_SecondaryVoltageErrorCounter_level40,
IfxPmsEvr_SecondaryVoltageErrorCounter_level41,
IfxPmsEvr_SecondaryVoltageErrorCounter_level42,
IfxPmsEvr_SecondaryVoltageErrorCounter_level43,
IfxPmsEvr_SecondaryVoltageErrorCounter_level44,
IfxPmsEvr_SecondaryVoltageErrorCounter_level45,
IfxPmsEvr_SecondaryVoltageErrorCounter_level46,
IfxPmsEvr_SecondaryVoltageErrorCounter_level47,
IfxPmsEvr_SecondaryVoltageErrorCounter_level48,
IfxPmsEvr_SecondaryVoltageErrorCounter_level49,
IfxPmsEvr_SecondaryVoltageErrorCounter_level50,
IfxPmsEvr_SecondaryVoltageErrorCounter_level51,
IfxPmsEvr_SecondaryVoltageErrorCounter_level52,
IfxPmsEvr_SecondaryVoltageErrorCounter_level53,
IfxPmsEvr_SecondaryVoltageErrorCounter_level54,
IfxPmsEvr_SecondaryVoltageErrorCounter_level55,
IfxPmsEvr_SecondaryVoltageErrorCounter_level56,
IfxPmsEvr_SecondaryVoltageErrorCounter_level57,
IfxPmsEvr_SecondaryVoltageErrorCounter_level58,
IfxPmsEvr_SecondaryVoltageErrorCounter_level59,
IfxPmsEvr_SecondaryVoltageErrorCounter_level60,
IfxPmsEvr_SecondaryVoltageErrorCounter_level61,
IfxPmsEvr_SecondaryVoltageErrorCounter_level62,
IfxPmsEvr_SecondaryVoltageErrorCounter_level63
}
This Declare the Under and overvoltage counter defined in Ifx_PMS.EVR.MONFILT.B.ERRCNTLIMT. More...
enum IfxPmsEvr_SupplyFilter {
IfxPmsEvr_SupplyFilter_eachConversionResult = 0,
IfxPmsEvr_SupplyFilter_avgAdcConversionResult0 = 1,
IfxPmsEvr_SupplyFilter_avgAdcConversionResult1,
IfxPmsEvr_SupplyFilter_avgAdcConversionResult2,
IfxPmsEvr_SupplyFilter_avgAdcConversionResult3,
IfxPmsEvr_SupplyFilter_avgAdcConversionResult4,
IfxPmsEvr_SupplyFilter_avgAdcConversionResult5,
IfxPmsEvr_SupplyFilter_avgAdcConversionResult6,
IfxPmsEvr_SupplyFilter_avgAdcConversionResult7,
IfxPmsEvr_SupplyFilter_avgAdcConversionResult8,
IfxPmsEvr_SupplyFilter_avgAdcConversionResult9,
IfxPmsEvr_SupplyFilter_avgAdcConversionResult10,
IfxPmsEvr_SupplyFilter_avgAdcConversionResult11,
IfxPmsEvr_SupplyFilter_avgAdcConversionResult12,
IfxPmsEvr_SupplyFilter_avgAdcConversionResult13,
IfxPmsEvr_SupplyFilter_avgAdcConversionResult14
}
ADC result for the generating Alarm declare in Ifx_PMS.EVR.MONFILT. More...
enum IfxPmsEvr_SupplyMode {
IfxPmsEvr_SupplyMode_evrc = 0,
IfxPmsEvr_SupplyMode_evr33 = 1,
IfxPmsEvr_SupplyMode_swd = 2,
IfxPmsEvr_SupplyMode_evrpr = 3,
IfxPmsEvr_SupplyMode_vddm = 4,
IfxPmsEvr_SupplyMode_sb = 5
}
Controls the voltage supply Type. More...
enum IfxPmsEvr_UnderVoltageMonitoring {
IfxPmsEvr_UnderVoltageMonitoring_inactive = 0,
IfxPmsEvr_UnderVoltageMonitoring_lowToHighVoltageTransition = 1,
IfxPmsEvr_UnderVoltageMonitoring_highToLowVoltageTransition = 2,
IfxPmsEvr_UnderVoltageMonitoring_eitherDirectionVoltageTransition = 3
}
Monitoring underVoltage for all bitfields defined in Ifx_PMS.EVR.MONCTRL register for undervoltage monitoring. More...

Functions

IFX_INLINE void | IfxPmsEvr_setOverVoltageMonitoringMode (Ifx_PMS *pms, IfxPmsEvr_OverVoltageMonitoring mode, IfxPmsEvr_SupplyMode supply)
set Over Voltage Monitoring Mode More...
IFX_EXTERN void | IfxPmsEvr_setSecondaryOverVoltageThresholdMv (Ifx_PMS *pms, float32 thresholdLevel, IfxPmsEvr_SupplyMode supply)
set Secondary Over Voltage Threshold level More...
IFX_INLINE void | IfxPmsEvr_configureBlankingFilterDelay (Ifx_PMS *pms, uint8 delay)
Configure a Blanking Filter Delay. More...
IFX_INLINE void | IfxPmsEvr_enableDcdcSynchronisation (Ifx_PMS *pms, boolean enabled)
This function enables the synchronisation output to synchronize the external SMPS regulator with respect to the internal EVRC regulator. More...
IFX_INLINE void | IfxPmsEvr_enableInterrupts (Ifx_PMS *pms, IfxPmsEvr_EnableInterrupt interruptType)
Enable Interrupts. More...
IFX_INLINE void | IfxPmsEvr_enableWakeupOnVextSupplyRampUp (Ifx_PMS *pms, boolean enabled)
enables wakeup on VEXT supply ramp-up after blanking filter time has expired More...
IFX_INLINE void | IfxPmsEvr_fineTrimEvrClock (Ifx_PMS *pms, uint8 trimValue)
OSC Fine Trim 100MHz Clock. More...
IFX_INLINE void | IfxPmsEvr_setFrequencySpreadThreshold (Ifx_PMS *pms, uint16 thresholdLevel)
set frequency spread threshold More...
IFX_INLINE void | IfxPmsEvr_setNmosLevel (Ifx_PMS *pms, boolean nmosLevel)
This configures the state of N ch. MOSFET driver during start-up and shut-down phases. More...
IFX_INLINE void | IfxPmsEvr_setPmosLevel (Ifx_PMS *pms, boolean pmosLevel)
This configures the state of P ch. MOSFET driver during start-up and shut-down phases. More...
IFX_INLINE void | IfxPmsEvr_setRegulatorSwitchingFrequency (Ifx_PMS *pms, uint16 samplingFactor)
set regulator switching frequency in Hz....(100MHz/samplingFactor) More...
IFX_INLINE void | IfxPmsEvr_setResetTrimValueMv (Ifx_PMS *pms, float32 resetTrimValue, IfxPmsEvr_SupplyMode supply)
set reset trim value for EVRC,EVR33 and external VEXT supply More...
IFX_INLINE void | IfxPmsEvr_setSdRegulatorOutputLevel (Ifx_PMS *pms, uint8 outputLevel)
SD Regulator Voltage Target selection. More...
IFX_INLINE void | IfxPmsEvr_setSdRegulatorPrimaryAdcTrimValue (Ifx_PMS *pms, IfxPmsEvr_PrimaryAdcTrimValue trimValue)
SD Regulator Voltage Trim Value. More...
IFX_INLINE void | IfxPmsEvr_setStandbyRamSupply (Ifx_PMS *pms, uint8 ramBlock)
set DLMU RAM Block in Standby Mode More...
IFX_INLINE void | IfxPmsEvr_setSwitchingFreqDivFactorForExternalsync (Ifx_PMS *pms, IfxPmsEvr_ExtSyncSwitchingFreqDivFactor divider)
Set Switching frequency division factor for external synchronisation. More...
IFX_INLINE void | IfxPmsEvr_signedFineTrimEvrClock (Ifx_PMS *pms, sint8 trimValue)
OSC Fine Trim 100MHz Clock. More...
IFX_EXTERN void | IfxPmsEvr_filterSecondaryConversionResult (Ifx_PMS *pms, IfxPmsEvr_SupplyFilter adcFilterValue, IfxPmsEvr_SupplyMode supply)
filter the each conversion result or avarage of consecutive adc result to compare with threshold More...
IFX_EXTERN uint8 | IfxPmsEvr_getSecondaryAdcResult (Ifx_PMS *pms, IfxPmsEvr_SupplyMode supply)
get secondray ADC result for respective Voltage supply More...
IFX_INLINE void | IfxPmsEvr_setUnderVoltageMonitoringMode (Ifx_PMS *pms, IfxPmsEvr_UnderVoltageMonitoring mode, IfxPmsEvr_SupplyMode supply)
set Under Voltage Monitoring mode More...
IFX_EXTERN void | IfxPmsEvr_setSecondaryUnderVoltageThresholdMv (Ifx_PMS *pms, float32 thresholdLevel, IfxPmsEvr_SupplyMode supply)
set Secondary under Voltage Threshold level More...
IFX_INLINE void | IfxPmsEvr_evrcResetTriggerSignalConfig (Ifx_PMS *pms, boolean enableReset)
Enabled/Disable Reset Trigger signal for EVRC. More...
IFX_INLINE float32 | IfxPmsEvr_getAdcVddResult (float32 averageADCC)
IFX_INLINE IfxPmsEvr_EvrcMode | IfxPmsEvr_getEvrcMode (Ifx_PMS *pms)
get current operating mode of EVRC More...
IFX_INLINE boolean | IfxPmsEvr_getEvrcVoltageRegulator (Ifx_PMS *pms)
get EVRC Regulator Voltage status More...
IFX_INLINE uint8 | IfxPmsEvr_getPrimaryAdcEvrcResult (Ifx_PMS *pms)
get ADC 1.25 V Core Voltage Conversion Result More...
IFX_INLINE void | IfxPmsEvr_evr33ResetTriggerSignalConfig (Ifx_PMS *pms, boolean enableReset)
Enabled/Disable Reset Trigger signal for EVR33. More...
IFX_INLINE uint8 | IfxPmsEvr_getPrimaryAdcEvr33Result (Ifx_PMS *pms)
get ADC 3.3 V Voltage Conversion Result More...
IFX_INLINE void | IfxPmsEvr_setEvr33PrimaryAdcTrimValue (Ifx_PMS *pms, IfxPmsEvr_PrimaryAdcTrimValue trimValue)
set 3.3 V Regulator Voltage Primary ADC Trim Value More...
IFX_INLINE void | IfxPmsEvr_setEvr33VoltageOutputlevel (Ifx_PMS *pms, uint8 outputLevel)
The VDDP3 output level of the EVR33 LDO regulator. More...
IFX_INLINE uint8 | IfxPmsEvr_getPrimaryAdcSwdResult (Ifx_PMS *pms)
get ADC External Supply Conversion Result More...
IFX_INLINE void | IfxPmsEvr_swdResetTriggerSignalConfig (Ifx_PMS *pms, boolean enableReset)
Enabled/Disable Reset Trigger signal for SWD. More...
IFX_INLINE boolean | IfxPmsEvr_areInitValuesRight (const IfxPmsEvr_checkRegConfig *const checkConfig)
IFX_INLINE void | IfxPmsEvr_disableInterrupt (Ifx_PMS *pms, IfxPmsEvr_EnableInterrupt interruptType)
Disable Interrupts. More...
IFX_INLINE float32 | IfxPmsEvr_getAdcVddp3Result (float32 averageADC33V)
IFX_INLINE float32 | IfxPmsEvr_getAdcVextResult (float32 averageADCSWDV)
IFX_INLINE boolean | IfxPmsEvr_runInitSequence (const IfxPmsEvr_initSequence *const sequence)
IFX_INLINE void | IfxPmsEvr_wait (float32 waitInSec)

Variables

IFX_EXTERN IFX_CONST IfxPmsEvr_StepDownRegulatorRegConfig IfxPmsEvr_cfgPhase1Default []
IFX_EXTERN IFX_CONST IfxPmsEvr_StepDownRegulatorRegConfig IfxPmsEvr_cfgPhase2Default []
IFX_EXTERN IFX_CONST IfxPmsEvr_StepDownRegulatorRegConfig IfxPmsEvr_cfgPhase3Default []
IFX_EXTERN IFX_CONST IfxPmsEvr_initSequencePhase IfxPmsEvr_cfgPhasesDefault []
IFX_EXTERN IFX_CONST IfxPmsEvr_initSequence IfxPmsEvr_cfgSequenceDefault
IFX_EXTERN IFX_CONST IfxPmsEvr_checkRegConfig IfxPmsEvr_checkRegCfgDefault
IFX_EXTERN IFX_CONST IfxPmsEvr_StepDownRegulatorRegConfig IfxPmsEvr_checkRegValuesDefault []

Detailed Description

PMS basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPmsEvr.h.

Data Structure Documentation

◆ IfxPmsEvr_StepDownRegulatorRegConfig

struct IfxPmsEvr_StepDownRegulatorRegConfig

Definition at line 351 of file IfxPmsEvr.h.

Data Fields
uint32 | mask | Mask to select the bit fields to be updated.
volatile void * | regAddr | Register Address to be updated.
uint32 | value | Register value to be updated.

◆ IfxPmsEvr_initSequencePhase

struct IfxPmsEvr_initSequencePhase

Definition at line 358 of file IfxPmsEvr.h.

Collaboration diagram for IfxPmsEvr_initSequencePhase:
[legend]
Data Fields
uint8 | numOfRegisters
IFX_CONST IfxPmsEvr_StepDownRegulatorRegConfig * | regConfig
float32 | waitInSecs

◆ IfxPmsEvr_checkRegConfig

struct IfxPmsEvr_checkRegConfig

Definition at line 365 of file IfxPmsEvr.h.

Collaboration diagram for IfxPmsEvr_checkRegConfig:
[legend]
Data Fields
uint8 | numOfRegisters
IFX_CONST IfxPmsEvr_StepDownRegulatorRegConfig * | regConfig

◆ IfxPmsEvr_initSequence

struct IfxPmsEvr_initSequence

Definition at line 371 of file IfxPmsEvr.h.

Collaboration diagram for IfxPmsEvr_initSequence:
[legend]
Data Fields
uint8 | numOfPhases
IFX_CONST IfxPmsEvr_initSequencePhase * | phaseConfig

Macro Definition Documentation

◆ IFXPMSEVR_ADC_VDD_LSB

#define IFXPMSEVR_ADC_VDD_LSB (0.005f)

Definition at line 78 of file IfxPmsEvr.h.

Referenced by IfxPmsEvr_getAdcVddResult().

◆ IFXPMSEVR_ADC_VDDP3_LSB

#define IFXPMSEVR_ADC_VDDP3_LSB (0.015f)

Definition at line 80 of file IfxPmsEvr.h.

Referenced by IfxPmsEvr_getAdcVddp3Result().

◆ IFXPMSEVR_ADC_VEXT_LSB

#define IFXPMSEVR_ADC_VEXT_LSB (0.02f)

Definition at line 82 of file IfxPmsEvr.h.

Referenced by IfxPmsEvr_getAdcVextResult().

◆ IFXPMSEVR_CTRL_UP_WAIT_TIMEOUTCOUNT

#define IFXPMSEVR_CTRL_UP_WAIT_TIMEOUTCOUNT (0x100)

Definition at line 84 of file IfxPmsEvr.h.

Referenced by IfxPmsEvr_runInitSequence().

Function Documentation

◆ IfxPmsEvr_areInitValuesRight()

IFX_INLINE boolean IfxPmsEvr_areInitValuesRight ( const IfxPmsEvr_checkRegConfig *const checkConfig )

Definition at line 735 of file IfxPmsEvr.h.

◆ IfxPmsEvr_disableInterrupt()

IFX_INLINE void IfxPmsEvr_disableInterrupt | ( | Ifx_PMS * | pms,
 |  | IfxPmsEvr_EnableInterrupt | interruptType
 | ) |  |

Disable Interrupts.

Returns
None

Definition at line 781 of file IfxPmsEvr.h.

◆ IfxPmsEvr_getAdcVddp3Result()

IFX_INLINE float32 IfxPmsEvr_getAdcVddp3Result ( float32 averageADC33V )
Parameters
averageADC33V Average of PMS_EVRSTAT.ADC33V values
Returns
ADC VDDP3 Voltage Conversion Result

Definition at line 874 of file IfxPmsEvr.h.

◆ IfxPmsEvr_getAdcVextResult()

IFX_INLINE float32 IfxPmsEvr_getAdcVextResult ( float32 averageADCSWDV )
Parameters
averageADCSWDV Average of PMS_EVRADCSTAT.ADCSWDV values.
Returns
ADC VEXT Supply Conversion Result

Definition at line 882 of file IfxPmsEvr.h.

◆ IfxPmsEvr_runInitSequence()

IFX_INLINE boolean IfxPmsEvr_runInitSequence ( const IfxPmsEvr_initSequence *const sequence )

During normal running one must wait for the LCK bit. However, for this function, as this is used only with CPU0 startup no wait required

Definition at line 925 of file IfxPmsEvr.h.

◆ IfxPmsEvr_wait()

IFX_INLINE void IfxPmsEvr_wait ( float32 waitInSec )
Returns
None

Definition at line 1229 of file IfxPmsEvr.h.

Referenced by IfxPmsEvr_runInitSequence().

Variable Documentation

◆ IfxPmsEvr_cfgPhase1Default

IFX_EXTERN IFX_CONST IfxPmsEvr_StepDownRegulatorRegConfig IfxPmsEvr_cfgPhase1Default[]

Definition at line 715 of file IfxPmsEvr.h.

◆ IfxPmsEvr_cfgPhase2Default

IFX_EXTERN IFX_CONST IfxPmsEvr_StepDownRegulatorRegConfig IfxPmsEvr_cfgPhase2Default[]

Definition at line 717 of file IfxPmsEvr.h.

◆ IfxPmsEvr_cfgPhase3Default

IFX_EXTERN IFX_CONST IfxPmsEvr_StepDownRegulatorRegConfig IfxPmsEvr_cfgPhase3Default[]

Definition at line 721 of file IfxPmsEvr.h.

◆ IfxPmsEvr_cfgPhasesDefault

IFX_EXTERN IFX_CONST IfxPmsEvr_initSequencePhase IfxPmsEvr_cfgPhasesDefault[]

Definition at line 723 of file IfxPmsEvr.h.

◆ IfxPmsEvr_cfgSequenceDefault

IFX_EXTERN IFX_CONST IfxPmsEvr_initSequence IfxPmsEvr_cfgSequenceDefault

Definition at line 725 of file IfxPmsEvr.h.

◆ IfxPmsEvr_checkRegCfgDefault

IFX_EXTERN IFX_CONST IfxPmsEvr_checkRegConfig IfxPmsEvr_checkRegCfgDefault

Definition at line 727 of file IfxPmsEvr.h.

◆ IfxPmsEvr_checkRegValuesDefault

IFX_EXTERN IFX_CONST IfxPmsEvr_StepDownRegulatorRegConfig IfxPmsEvr_checkRegValuesDefault[]

Definition at line 729 of file IfxPmsEvr.h.


iLLD_TC38A: IfxPmsPm.h File Reference

  • Pms
  • Std
Data Structures | Enumerations | Functions
IfxPmsPm.h File Reference
iLLD » PMS

PMS basic functionality. More...

#include "_Impl/IfxPms_cfg.h"
#include "Scu/Std/IfxScuWdt.h"
#include "Pms/Std/IfxPmsEvr.h"
#include "Cpu/Irq/IfxCpu_Irq.h"
#include "Scu/Std/IfxScuCcu.h"
#include "IfxCpu_bf.h"
#include "Cpu/Std/IfxCpu.h"
#include "IfxDmu_reg.h"
Include dependency graph for IfxPmsPm.h:

Go to the source code of this file.

Data Structures

struct | IfxPmsPm_LoadJumpConfig
Options for Load Jump. More...
struct | IfxPmsPm_SleepConfig
Configurable options for sleep mode. More...
struct | IfxPmsPm_StandbyConfig
Configurable Standby options. More...
struct | IfxPmsPm_VoltageDroopConfig
Volatge Droop Configuration. More...
struct | IfxPmsPm_WakeupConfig
Configure Wakeup in standby mode. More...

Enumerations

enum IfxPmsPm_BlankingFilterDelay {
IfxPmsPm_BlankingFilterDelay_0ms = 0,
IfxPmsPm_BlankingFilterDelay_2_5ms = 1,
IfxPmsPm_BlankingFilterDelay_5ms = 2,
IfxPmsPm_BlankingFilterDelay_10ms = 3,
IfxPmsPm_BlankingFilterDelay_20ms = 4,
IfxPmsPm_BlankingFilterDelay_40ms = 5,
IfxPmsPm_BlankingFilterDelay_80ms = 6,
IfxPmsPm_BlankingFilterDelay_160ms = 7,
IfxPmsPm_BlankingFilterDelay_320ms = 8,
IfxPmsPm_BlankingFilterDelay_640ms = 9,
IfxPmsPm_BlankingFilterDelay_1280ms = 0xA,
IfxPmsPm_BlankingFilterDelay_2560ms = 0xB,
IfxPmsPm_BlankingFilterDelay_5120ms = 0xC,
IfxPmsPm_BlankingFilterDelay_10240ms = 0xD
}
Exposes the optons for minimum duration between standby entry and Wakeup.If any wakeup request comes up before this time is elapsed after standby entry, then it's ignored.Configured in PMS_PMSWCR.B.BLNKFIL. More...
enum IfxPmsPm_DigitalFilter {
IfxPmsPm_DigitalFilter_bypassed = 0,
IfxPmsPm_DigitalFilter_used = 1
}
The Digital filter enable/disabled As defined in Ifx_PMS.PMSW.CR0.B.ESRxDFEN and Ifx_PMS.PMSW.CR0.B.PINxDFEN. More...
enum IfxPmsPm_EdgeDetectionControl {
IfxPmsPm_EdgeDetectionControl_never = 0,
IfxPmsPm_EdgeDetectionControl_onRisingEdge = 1,
IfxPmsPm_EdgeDetectionControl_onFallingEdge = 2,
IfxPmsPm_EdgeDetectionControl_always = 3
}
Edge detection control mode for ESR and PINA/PINB As defined in Ifx_PMS.PMSW.CR0.B.ESRxEDCON and Ifx_PMS.PMSW.CR0.B.PINxEDCON. More...
enum IfxPmsPm_Esr0PinStateRequest {
IfxPmsPm_Esr0PinStateRequest_resetOutput = 0,
IfxPmsPm_Esr0PinStateRequest_tristate = 1
}
Request to set ESR0 pin pads to either input with weak pullup or tristate.Configured in PMS_PMSWCR5.B.ESR0TRIST. More...
enum IfxPmsPm_LoadJumpStatus {
IfxPmsPm_LoadJumpStatus_inactive = 0,
IfxPmsPm_LoadJumpStatus_swTriggeredRequestActive = 1,
IfxPmsPm_LoadJumpStatus_hwTriggeredRequestActive = 2
}
List of different statuses related to Load Jump This is reflected in SCU_PMTRCSR2.B.LJTRUN. More...
enum IfxPmsPm_PadStateRequest {
IfxPmsPm_PadStateRequest_inputWithWeakPullUp = 0,
IfxPmsPm_PadStateRequest_tristate = 1
}
Request to set pads to either input with weak pullup or tristate.Configured in PMS_PMSWCR5.B.TRISTREQ. More...
enum IfxPmsPm_PinEdgeTriggerEvent {
IfxPmsPm_PinEdgeTriggerEvent_none = 0,
IfxPmsPm_PinEdgeTriggerEvent_risingEdge = 1,
IfxPmsPm_PinEdgeTriggerEvent_fallingEdge = 2,
IfxPmsPm_PinEdgeTriggerEvent_bothRisingAndFallingEdge = 3
}
enum IfxPmsPm_RampingMode {
IfxPmsPm_RampingMode_none = 0,
IfxPmsPm_RampingMode_up = 1,
IfxPmsPm_RampingMode_down = 2,
IfxPmsPm_RampingMode_both = 3
}
Different options for when event triggering is desired(See EVRMONCTRL). More...
enum IfxPmsPm_RequestPowerMode {
IfxPmsPm_RequestPowerMode_run = 0,
IfxPmsPm_RequestPowerMode_idle = 1,
IfxPmsPm_RequestPowerMode_sleep = 2,
IfxPmsPm_RequestPowerMode_standby = 3
}
System power mode As defined in Ifx_SCU.PMCSR[x].B.REQSLP. More...
enum IfxPmsPm_ScrClocking {
IfxPmsPm_ScrClocking_100mhzOptional = 0,
IfxPmsPm_ScrClocking_bothClocksActiive = 1
}
Defines Clocking options for SCR in PMS_PMSWCR4.B.SCRCLKSEL. More...
enum IfxPmsPm_StandbyRamSupply {
IfxPmsPm_StandbyRamSupply_never = 0,
IfxPmsPm_StandbyRamSupply_cpu0Block0 = 1,
IfxPmsPm_StandbyRamSupply_cpu0Block01 = 2,
IfxPmsPm_StandbyRamSupply_cpu1Block01 = 4,
IfxPmsPm_StandbyRamSupply_cpu0Cpu1 = 7
}
The RAM being used in Standby mode As defined in Ifx_PMS.PMSW.CR0.B.STBYRAMSEL. More...
enum IfxPmsPm_StandbyTriggerMode {
IfxPmsPm_StandbyTriggerMode_software = 0,
IfxPmsPm_StandbyTriggerMode_hardware_undervoltage = 1,
IfxPmsPm_StandbyTriggerMode_hardware_nmi = 4
}
Defines events to trigger entry to Standby mode. More...
enum IfxPmsPm_ThresholdEvent {
IfxPmsPm_ThresholdEvent_overvoltage = 0,
IfxPmsPm_ThresholdEvent_undervoltage = 4
}
types of event More...
enum IfxPmsPm_VoltageDroopRequest {
IfxPmsPm_VoltageDroopRequest_positive = 1,
IfxPmsPm_VoltageDroopRequest_negative = 2
}
Direction of Voltage Droop(positive and negative) To be specified in SCU_PMTRCSR3.B.VDROOPREQ. More...
enum IfxPmsPm_VoltageDroopStatus {
IfxPmsPm_VoltageDroopStatus_inactive = 0,
IfxPmsPm_VoltageDroopStatus_swTriggeredRequestActive = 1,
IfxPmsPm_VoltageDroopStatus_hwTriggeredRequestActive = 2
}
List of different statuses related to Load Jump This is reflected in SCU_PMTRCSR3.B.VDTRUN. More...
enum IfxPmsPm_VoltageDroopStep {
IfxPmsPm_VoltageDroopStep_0mV = 0,
IfxPmsPm_VoltageDroopStep_5mV = 1U,
IfxPmsPm_VoltageDroopStep_10mV = 2U,
IfxPmsPm_VoltageDroopStep_15mV = 3U,
IfxPmsPm_VoltageDroopStep_20mV = 4U,
IfxPmsPm_VoltageDroopStep_25mV = 5U,
IfxPmsPm_VoltageDroopStep_30mV = 6U,
IfxPmsPm_VoltageDroopStep_35mV = 7U,
IfxPmsPm_VoltageDroopStep_40mV = 8U,
IfxPmsPm_VoltageDroopStep_45mV = 9U,
IfxPmsPm_VoltageDroopStep_50mV = 10U,
IfxPmsPm_VoltageDroopStep_55mV = 11U,
IfxPmsPm_VoltageDroopStep_60mV = 12U,
IfxPmsPm_VoltageDroopStep_65mV = 13U,
IfxPmsPm_VoltageDroopStep_70mV = 14U,
IfxPmsPm_VoltageDroopStep_75mV = 15U
}
Lists out volatge droop steps. More...
enum IfxPmsPm_VoltageSource {
IfxPmsPm_VoltageSource_vdd = 0,
IfxPmsPm_VoltageSource_vddpd = 2,
IfxPmsPm_VoltageSource_vddp3 = 8,
IfxPmsPm_VoltageSource_vddm = 10,
IfxPmsPm_VoltageSource_vext = 16,
IfxPmsPm_VoltageSource_vevrsb = 18
}
Different voltage sources extrnally supplied to/inside AURIX2G. More...
enum IfxPmsPm_WakeupOn {
IfxPmsPm_WakeupOn_esr0 = 0,
IfxPmsPm_WakeupOn_esr1 = 1,
IfxPmsPm_WakeupOn_pinA = 2,
IfxPmsPm_WakeupOn_pinB = 3,
IfxPmsPm_WakeupOn_porst = 4,
IfxPmsPm_WakeupOn_timer = 5,
IfxPmsPm_WakeupOn_power = 6,
IfxPmsPm_WakeupOn_scr = 7
}
Wake up configuration defined in Ifx_PMS.PMSW.CR0.B.ESRxWKEN,Ifx_PMS.PMSW.CR0.B.PINxWKEN and Ifx_PMS.PMSW.CR0.B.PORSTWKEN. More...
enum IfxPmsPm_WakeupTimerMode {
IfxPmsPm_WakeupTimerMode_autoReload = 0,
IfxPmsPm_WakeupTimerMode_autoStop = 1
}
Select wakup timer operation mode As defined in Ifx_PMS.PMSW.CR3.B.WUTMODE. More...
enum IfxPmsPm_WutClock {
IfxPmsPm_WutClock_70kHz = 0,
IfxPmsPm_WutClock_68Hz = 1
}
Clock for WUT. More...

Functions

IFX_INLINE void | IfxPmsPm_setSleepMode (IfxPmsPm_RequestPowerMode powerMode)
set system into sleep mode More...
IFX_EXTERN void | IfxPmsPm_setStandbyMode (Ifx_PMS *pms, IfxPmsPm_WakeupConfig *config, IfxPmsPm_RequestPowerMode powerMode)
set system into stand by mode Note: In this API Alarm has been disabled.Enable of SMU alarm has to be taken care seprately at application level More...
IFX_EXTERN void | IfxPmsPm_initStandbyConfig (IfxPmsPm_StandbyConfig *standbyConfig)
This function will initialize the configuration structure with default values. NOTE: More...
IFX_EXTERN void | IfxPmsPm_startStandbySequenceInFlash (IfxPmsPm_StandbyConfig *standbyConfig, const IfxScuCcu_Config *clockConfig)
IFX_EXTERN void | IfxPmsPm_continueStandbySequenceInRAM (IfxPmsPm_StandbyConfig *standbyConfig, const IfxScuCcu_Config *clockConfig)
IFX_EXTERN void | IfxPmsPm_initSleepConfig (IfxPmsPm_SleepConfig *sleepConfig)
IFX_EXTERN void | IfxPmsPm_startSleepSequenceinFlash (IfxPmsPm_SleepConfig *sleepConfig, IfxScuCcu_Config *clockConfig)
IFX_EXTERN void | IfxPmsPm_continueSleepSequenceInRAM (IfxPmsPm_SleepConfig *sleepConfig)
This is to be placed in PSPR of the Master CPU. More...
IFX_INLINE void | IfxPmsPm_setMasterCpu (IfxCpu_ResourceCpu cpuIndex)
Set a given CPU as a Master CPU i.e. ability to trigger power down modes. More...
IFX_INLINE IfxCpu_ResourceCpu | IfxPmsPm_getMasterCpu (void)
Gets the index of Master CPU. More...
IFX_EXTERN boolean | IfxPmsPm_setCoreMode (IfxCpu_ResourceCpu cpuIndex, IfxCpu_CoreMode mode)
Set core mode(Idle/Run) More...
IFX_EXTERN void | IfxPmsPm_enableWakeup (Ifx_PMS *pms, IfxPmsPm_WakeupConfig *wakeup)
Enable Wakeup using PORST/ESR1/PINA/PINB/WUT/SCR/Power. More...
IFX_EXTERN void | IfxPmsPm_configureWakeup (IfxPmsPm_StandbyConfig *standbyConfig)
IFX_EXTERN void | IfxPmsPm_initiateWakeup (IfxScuCcu_Config *clockConfig)
IFX_INLINE void | IfxPmsPm_enableLoadJumpTimer (void)
Enables the usage of load jump timer. More...
IFX_INLINE void | IfxPmsPm_disableLoadJumpTimer (void)
Disables the usage of load jump timer. More...
IFX_INLINE void | IfxPmsPm_enableLoadJumpTimerOverflowFlag (void)
Enables the update of SCU_PMTRCSR2.B.LJTOV status bit on timer overflow or timeout. More...
IFX_INLINE void | IfxPmsPm_disableLoadJumpTimerOverflowFlag (void)
Disables the update of SCU_PMTRCSR2.B.LJTOV status bit on timer overflow or timeout. More...
IFX_INLINE void | IfxPmsPm_enableLoadJumpTimerOverflowInterrupt (void)
Enables the activation of interrupt on timer overflow or timeout. More...
IFX_INLINE void | IfxPmsPm_disableLoadJumpTimerOverflowInterrupt (void)
Disables the activation of interrupt on timer overflow or timeout. More...
IFX_INLINE void | IfxPmsPm_startLoadJumpTimer (void)
Starts Load jump timer. The SCU_PMTRCSR0.B.LJTSTRT bitfield remains set on a write and is cleared when SCU_PMTRCSR2.B.LJTOV bit is set if SCU_PMTRCSR0.B.LJTOVEN bit is enabled(Update of Load Jump Timer Overflow Flag SCU_PMTRCSR2.B.LJTOV is enabled ). More...
IFX_INLINE void | IfxPmsPm_stopLoadJumpTimer (void)
This stops the Load jump timer. The Load Jump Timer stops counter at the current value and timer re-starts from that value when LJTSTP is cleared and LJTSTRT is set. More...
IFX_INLINE void | IfxPmsPm_clearLoadJumpTimer (void)
Clears the Load Jump timer count. More...
IFX_INLINE void | IfxPmsPm_clearLoadJumpTimerOverflowFlag (void)
Clears Load Jump Timer Overflow Flag (SCU_PMTRCSR2.B.LJTOV) and sets PMTRCSR3.B.VDROOPREQ and PMTRCSR2.B.LDJMPREQ to 0 if Load Jump Timer Overflow Flag bit is enabled. More...
IFX_INLINE boolean | IfxPmsPm_hasLoadJumpTimerOverflowOccured (void)
Returns status of Load Jump Timer Overflow condition. More...
IFX_INLINE void | IfxPmsPm_setLoadJumpTimerCompareValue (uint16 compareValue)
Loads the compare value for Load Jump Timer in SCU_PMTRCSR1.B.LJTCV When the Timer count reaches this value, overflow condition occurs and the respective flag and interrupt occurs, if enabled. More...
IFX_INLINE uint16 | IfxPmsPm_getLoadJumpTimerCompareValue (void)
Reads the Load Jump Timer Compare value. More...
IFX_INLINE uint16 | IfxPmsPm_getLoadJumpTimerCountValue (void)
Returns the Load Jump Timer count value. More...
IFX_INLINE void | IfxPmsPm_requestLoadJump (void)
Issues a Load Jump request. More...
IFX_INLINE IfxPmsPm_LoadJumpStatus | IfxPmsPm_getLoadJumpStatus (void)
Returns the status of Load Jump request. More...
IFX_INLINE void | IfxPmsPm_enableVoltageDroopTimer (void)
Enables the usage of Voltage Droop Timer. More...
IFX_INLINE void | IfxPmsPm_enableVoltageDroopTimerOverflowFlag (void)
Enables the update of Voltage Droop Timer Overflow Flag on timer overflow or timeout. More...
IFX_INLINE void | IfxPmsPm_enableVoltageDroopTimerOverflowInterrupt (void)
Enables the activation of interrupt on timer overflow or timeout. More...
IFX_INLINE void | IfxPmsPm_disableVoltageDroopTimer (void)
Disables the usage of Voltage Droop Timer. More...
IFX_INLINE void | IfxPmsPm_disableVoltageDroopTimerOverflowFlag (void)
Disables the update of Voltage Droop Timer Overflow Flag on timer overflow or timeout. More...
IFX_INLINE void | IfxPmsPm_disableVoltageDroopTimerOverflowInterrupt (void)
Disables the activation of interrupt on timer overflow or timeout. More...
IFX_INLINE void | IfxPmsPm_startVoltageDroopTimer (void)
Starts Voltage Droop timer. More...
IFX_INLINE void | IfxPmsPm_stopVoltageDroopTimer (void)
Stops Voltage Droop timer and SCU cancels the droop request. More...
IFX_INLINE void | IfxPmsPm_clearVoltageDroopTimer (void)
Clear Voltage Droop timer count. Resets the Voltage Droop Timer and clears VDTRUN if usage of Voltage Droop Timer is enabled. More...
IFX_INLINE void | IfxPmsPm_clearVoltageDroopTimerOverflowFlag (void)
Clears Voltage Droop Timer Overflow Flag if Overflow Flag is enabled. More...
IFX_INLINE boolean | IfxPmsPm_hasVoltageDroopTimerOverflowOccured (void)
Returns Status of Voltage Droop Time overflow condition. More...
IFX_INLINE void | IfxPmsPm_setVoltageDroopTimerCompareValue (uint16 compareValue)
Loads the compare value for Voltage Droop Timer in SCU_PMTRCSR1.B.VDTCV When the Timer count reaches this value, overflow condition occurs and the respective flag and interrupt occurs, if enabled. More...
IFX_INLINE uint16 | IfxPmsPm_getVoltageDroopTimerCompareValue (void)
Reads the Voltage Droop Timer Compare Value. More...
IFX_INLINE uint16 | IfxPmsPm_readVoltageDroopTimerCountValue (void)
Gives Voltage Droop Timer count value. More...
IFX_INLINE void | IfxPmsPm_requestVoltageDroop (IfxPmsPm_VoltageDroopRequest droopRequest)
Issue a voltage droop request. More...
IFX_INLINE IfxPmsPm_VoltageDroopStatus | IfxPmsPm_getVoltageDroopStatus (void)
Returns the status of Load Jump request. More...
IFX_INLINE void | IfxPmsPm_setVoltageDroopStep (IfxPmsPm_VoltageDroopStep droopStep)
Loads the amount by which voltage will be requested to change. More...
IFX_EXTERN void | IfxPmsPm_configureSupplyMonitoring (Ifx_PMS *pms, IfxPmsPm_VoltageSource source, IfxPmsPm_ThresholdEvent event, IfxPmsPm_RampingMode mode)
IFX_EXTERN void | IfxPmsPm_initLoadJumpConfig (IfxPmsPm_LoadJumpConfig *loadJumpConfig)
IFX_EXTERN void | IfxPmsPm_initAndRequestLoadJump (IfxPmsPm_LoadJumpConfig *loadJumpConfig)
IFX_EXTERN void | IfxPmsPm_initVoltageDroopConfig (IfxPmsPm_VoltageDroopConfig *voltageDroopConfig)
IFX_EXTERN void | IfxPmsPm_initAndRequestVoltageDroop (IfxPmsPm_VoltageDroopConfig *voltageDroopConfig)
IFX_EXTERN void | IfxPmsPm_handleStandbyRam (uint32 *dataPointer, uint8 dataSize)
Copies dataSize bytes of data to standby RAM starting at dataPointer and appends the CRC over the copied data to it. More...

Detailed Description

PMS basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPmsPm.h.

Function Documentation

◆ IfxPmsPm_clearLoadJumpTimer()

IFX_INLINE void IfxPmsPm_clearLoadJumpTimer ( void )

Clears the Load Jump timer count.

Returns
None

Definition at line 901 of file IfxPmsPm.h.

◆ IfxPmsPm_clearLoadJumpTimerOverflowFlag()

IFX_INLINE void IfxPmsPm_clearLoadJumpTimerOverflowFlag ( void )

Clears Load Jump Timer Overflow Flag (SCU_PMTRCSR2.B.LJTOV) and sets PMTRCSR3.B.VDROOPREQ and PMTRCSR2.B.LDJMPREQ to 0 if Load Jump Timer Overflow Flag bit is enabled.

Returns
None

Definition at line 910 of file IfxPmsPm.h.

◆ IfxPmsPm_clearVoltageDroopTimer()

IFX_INLINE void IfxPmsPm_clearVoltageDroopTimer ( void )

Clear Voltage Droop timer count. Resets the Voltage Droop Timer and clears VDTRUN if usage of Voltage Droop Timer is enabled.

Returns
None

Definition at line 1033 of file IfxPmsPm.h.

◆ IfxPmsPm_clearVoltageDroopTimerOverflowFlag()

IFX_INLINE void IfxPmsPm_clearVoltageDroopTimerOverflowFlag ( void )

Clears Voltage Droop Timer Overflow Flag if Overflow Flag is enabled.

Returns
None

Definition at line 1042 of file IfxPmsPm.h.

◆ IfxPmsPm_configureSupplyMonitoring()

IFX_EXTERN void IfxPmsPm_configureSupplyMonitoring | ( | Ifx_PMS * | pms,
 |  | IfxPmsPm_VoltageSource | source,
 |  | IfxPmsPm_ThresholdEvent | event,
 |  | IfxPmsPm_RampingMode | mode
 | ) |  |
Parameters
pms | Pointer to PMS SFRs
source | Voltage source to be monitored
event | Type of event to be monitored.
mode | Ramping directions on which event needs to be detected.
Returns
None

Definition at line 306 of file IfxPmsPm.c.

◆ IfxPmsPm_disableLoadJumpTimer()

IFX_INLINE void IfxPmsPm_disableLoadJumpTimer ( void )

Disables the usage of load jump timer.

Returns
None

Definition at line 838 of file IfxPmsPm.h.

◆ IfxPmsPm_disableLoadJumpTimerOverflowFlag()

IFX_INLINE void IfxPmsPm_disableLoadJumpTimerOverflowFlag ( void )

Disables the update of SCU_PMTRCSR2.B.LJTOV status bit on timer overflow or timeout.

Returns
None

Definition at line 856 of file IfxPmsPm.h.

◆ IfxPmsPm_disableLoadJumpTimerOverflowInterrupt()

IFX_INLINE void IfxPmsPm_disableLoadJumpTimerOverflowInterrupt ( void )

Disables the activation of interrupt on timer overflow or timeout.

Returns
None

Definition at line 874 of file IfxPmsPm.h.

◆ IfxPmsPm_disableVoltageDroopTimer()

IFX_INLINE void IfxPmsPm_disableVoltageDroopTimer ( void )

Disables the usage of Voltage Droop Timer.

Returns
None

Definition at line 988 of file IfxPmsPm.h.

◆ IfxPmsPm_disableVoltageDroopTimerOverflowFlag()

IFX_INLINE void IfxPmsPm_disableVoltageDroopTimerOverflowFlag ( void )

Disables the update of Voltage Droop Timer Overflow Flag on timer overflow or timeout.

Returns
None

Definition at line 997 of file IfxPmsPm.h.

◆ IfxPmsPm_disableVoltageDroopTimerOverflowInterrupt()

IFX_INLINE void IfxPmsPm_disableVoltageDroopTimerOverflowInterrupt ( void )

Disables the activation of interrupt on timer overflow or timeout.

Returns
None

Definition at line 1006 of file IfxPmsPm.h.

◆ IfxPmsPm_enableLoadJumpTimer()

IFX_INLINE void IfxPmsPm_enableLoadJumpTimer ( void )

Enables the usage of load jump timer.

Returns
None

Definition at line 829 of file IfxPmsPm.h.

◆ IfxPmsPm_enableLoadJumpTimerOverflowFlag()

IFX_INLINE void IfxPmsPm_enableLoadJumpTimerOverflowFlag ( void )

Enables the update of SCU_PMTRCSR2.B.LJTOV status bit on timer overflow or timeout.

Returns
None

Definition at line 847 of file IfxPmsPm.h.

◆ IfxPmsPm_enableLoadJumpTimerOverflowInterrupt()

IFX_INLINE void IfxPmsPm_enableLoadJumpTimerOverflowInterrupt ( void )

Enables the activation of interrupt on timer overflow or timeout.

Returns
None

Definition at line 865 of file IfxPmsPm.h.

◆ IfxPmsPm_enableVoltageDroopTimer()

IFX_INLINE void IfxPmsPm_enableVoltageDroopTimer ( void )

Enables the usage of Voltage Droop Timer.

Returns
None

Definition at line 961 of file IfxPmsPm.h.

◆ IfxPmsPm_enableVoltageDroopTimerOverflowFlag()

IFX_INLINE void IfxPmsPm_enableVoltageDroopTimerOverflowFlag ( void )

Enables the update of Voltage Droop Timer Overflow Flag on timer overflow or timeout.

Returns
None

Definition at line 970 of file IfxPmsPm.h.

◆ IfxPmsPm_enableVoltageDroopTimerOverflowInterrupt()

IFX_INLINE void IfxPmsPm_enableVoltageDroopTimerOverflowInterrupt ( void )

Enables the activation of interrupt on timer overflow or timeout.

Returns
None

Definition at line 979 of file IfxPmsPm.h.

◆ IfxPmsPm_getLoadJumpStatus()

IFX_INLINE IfxPmsPm_LoadJumpStatus IfxPmsPm_getLoadJumpStatus ( void )

Returns the status of Load Jump request.

Returns
Load Jump request status

Definition at line 955 of file IfxPmsPm.h.

◆ IfxPmsPm_getLoadJumpTimerCompareValue()

IFX_INLINE uint16 IfxPmsPm_getLoadJumpTimerCompareValue ( void )

Reads the Load Jump Timer Compare value.

Returns
Load Jump Timer compare value

Definition at line 934 of file IfxPmsPm.h.

◆ IfxPmsPm_getLoadJumpTimerCountValue()

IFX_INLINE uint16 IfxPmsPm_getLoadJumpTimerCountValue ( void )

Returns the Load Jump Timer count value.

Returns
Load Jump Timer count value

Definition at line 940 of file IfxPmsPm.h.

◆ IfxPmsPm_getVoltageDroopStatus()

IFX_INLINE IfxPmsPm_VoltageDroopStatus IfxPmsPm_getVoltageDroopStatus ( void )

Returns the status of Load Jump request.

Returns
Voltage Droop request status

Definition at line 1087 of file IfxPmsPm.h.

◆ IfxPmsPm_getVoltageDroopTimerCompareValue()

IFX_INLINE uint16 IfxPmsPm_getVoltageDroopTimerCompareValue ( void )

Reads the Voltage Droop Timer Compare Value.

Returns
Voltage Droop Timer Compare Value

Definition at line 1066 of file IfxPmsPm.h.

◆ IfxPmsPm_handleStandbyRam()

IFX_EXTERN void IfxPmsPm_handleStandbyRam | ( | uint32 * | dataPointer,
 |  | uint8 | dataSize
 | ) |  |

Copies dataSize bytes of data to standby RAM starting at dataPointer and appends the CRC over the copied data to it.

Parameters
dataPointer | Pointer to beginning of the region containing addresses of the data to be saved. This is in standby RAM
dataSize | Total size(in units of 32 bit word) of the data to be copied
Returns
None

Definition at line 820 of file IfxPmsPm.c.

◆ IfxPmsPm_hasLoadJumpTimerOverflowOccured()

IFX_INLINE boolean IfxPmsPm_hasLoadJumpTimerOverflowOccured ( void )

Returns status of Load Jump Timer Overflow condition.

Returns
Status of Load Jump Timer Overflow condition

Definition at line 919 of file IfxPmsPm.h.

◆ IfxPmsPm_hasVoltageDroopTimerOverflowOccured()

IFX_INLINE boolean IfxPmsPm_hasVoltageDroopTimerOverflowOccured ( void )

Returns Status of Voltage Droop Time overflow condition.

Returns
Status of Voltage Droop Time overflow

Definition at line 1051 of file IfxPmsPm.h.

◆ IfxPmsPm_initAndRequestLoadJump()

IFX_EXTERN void IfxPmsPm_initAndRequestLoadJump ( IfxPmsPm_LoadJumpConfig * loadJumpConfig )
Returns
None

Definition at line 776 of file IfxPmsPm.c.

◆ IfxPmsPm_initAndRequestVoltageDroop()

IFX_EXTERN void IfxPmsPm_initAndRequestVoltageDroop ( IfxPmsPm_VoltageDroopConfig * voltageDroopConfig )
Parameters
voltageDroopConfig Voltage Droop Configuration Structure
Returns
None

Definition at line 805 of file IfxPmsPm.c.

◆ IfxPmsPm_initLoadJumpConfig()

IFX_EXTERN void IfxPmsPm_initLoadJumpConfig ( IfxPmsPm_LoadJumpConfig * loadJumpConfig )
Parameters
loadJumpConfig Initialize the Load Jump configuration
Returns
None

Definition at line 768 of file IfxPmsPm.c.

◆ IfxPmsPm_initVoltageDroopConfig()

IFX_EXTERN void IfxPmsPm_initVoltageDroopConfig ( IfxPmsPm_VoltageDroopConfig * voltageDroopConfig )
Returns
None

Definition at line 790 of file IfxPmsPm.c.

◆ IfxPmsPm_readVoltageDroopTimerCountValue()

IFX_INLINE uint16 IfxPmsPm_readVoltageDroopTimerCountValue ( void )

Gives Voltage Droop Timer count value.

Returns
Voltage Droop Timer Count Value

Definition at line 1072 of file IfxPmsPm.h.

◆ IfxPmsPm_requestLoadJump()

IFX_INLINE void IfxPmsPm_requestLoadJump ( void )

Issues a Load Jump request.

Returns
None

Definition at line 946 of file IfxPmsPm.h.

◆ IfxPmsPm_requestVoltageDroop()

IFX_INLINE void IfxPmsPm_requestVoltageDroop ( IfxPmsPm_VoltageDroopRequest droopRequest )

Issue a voltage droop request.

Parameters
droopRequest Type of Voltage Droop Request
Returns
None

Definition at line 1078 of file IfxPmsPm.h.

◆ IfxPmsPm_setLoadJumpTimerCompareValue()

IFX_INLINE void IfxPmsPm_setLoadJumpTimerCompareValue ( uint16 compareValue )

Loads the compare value for Load Jump Timer in SCU_PMTRCSR1.B.LJTCV When the Timer count reaches this value, overflow condition occurs and the respective flag and interrupt occurs, if enabled.

Parameters
compareValue Compare value for Load Jump Timer
Returns
None

Definition at line 925 of file IfxPmsPm.h.

◆ IfxPmsPm_setVoltageDroopStep()

IFX_INLINE void IfxPmsPm_setVoltageDroopStep ( IfxPmsPm_VoltageDroopStep droopStep )

Loads the amount by which voltage will be requested to change.

Parameters
droopStep The amount why by voltage change is requested
Returns
None

Definition at line 1093 of file IfxPmsPm.h.

◆ IfxPmsPm_setVoltageDroopTimerCompareValue()

IFX_INLINE void IfxPmsPm_setVoltageDroopTimerCompareValue ( uint16 compareValue )

Loads the compare value for Voltage Droop Timer in SCU_PMTRCSR1.B.VDTCV When the Timer count reaches this value, overflow condition occurs and the respective flag and interrupt occurs, if enabled.

Parameters
compareValue Voltage Droop Timer Compare Value
Returns
None

Definition at line 1057 of file IfxPmsPm.h.

◆ IfxPmsPm_startLoadJumpTimer()

IFX_INLINE void IfxPmsPm_startLoadJumpTimer ( void )

Starts Load jump timer. The SCU_PMTRCSR0.B.LJTSTRT bitfield remains set on a write and is cleared when SCU_PMTRCSR2.B.LJTOV bit is set if SCU_PMTRCSR0.B.LJTOVEN bit is enabled(Update of Load Jump Timer Overflow Flag SCU_PMTRCSR2.B.LJTOV is enabled ).

Returns
None

Definition at line 883 of file IfxPmsPm.h.

◆ IfxPmsPm_startVoltageDroopTimer()

IFX_INLINE void IfxPmsPm_startVoltageDroopTimer ( void )

Starts Voltage Droop timer.

Returns
None

Definition at line 1015 of file IfxPmsPm.h.

◆ IfxPmsPm_stopLoadJumpTimer()

IFX_INLINE void IfxPmsPm_stopLoadJumpTimer ( void )

This stops the Load jump timer. The Load Jump Timer stops counter at the current value and timer re-starts from that value when LJTSTP is cleared and LJTSTRT is set.

Returns
None

Definition at line 892 of file IfxPmsPm.h.

◆ IfxPmsPm_stopVoltageDroopTimer()

IFX_INLINE void IfxPmsPm_stopVoltageDroopTimer ( void )

Stops Voltage Droop timer and SCU cancels the droop request.

Returns
None

Definition at line 1024 of file IfxPmsPm.h.


iLLD_TC38A: PORTS

Modules | Files
PORTS
iLLD
Collaboration diagram for PORTS:

Modules

Implementation
Standard Driver
PORT Pin Mapping
How to use the PORT I/O driver?
Interface Driver

Files

file | IfxPort_cfg.h
PORT on-chip implementation data.
file | IfxPort_PinMap.c
PORT I/O map.
file | IfxPort_PinMap.h
PORT I/O map.
file | IfxPort_Io.h
PORT IO details.
file | IfxPort.h
PORT basic functionality.

Detailed Description


iLLD_TC38A: Implementation

Implementation
iLLD » PORTS
Collaboration diagram for Implementation:


iLLD_TC38A: Standard Driver

Modules
Standard Driver
iLLD » PORTS
Collaboration diagram for Standard Driver:

Modules

Enumerations
Data structures
Single Pin Functions
Group Access Functions

Detailed Description


iLLD_TC38A: Enumerations

Enumerations
Enumerations
iLLD » PORTS » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxPort_ControlledBy {
IfxPort_ControlledBy_port = 0,
IfxPort_ControlledBy_hsct = 1
}
The LVDS RX_DIS control function can be selected from the Port (default) or HSCT module.declared in MODULE_PORTx.LPCRx. More...
enum IfxPort_InputMode {
IfxPort_InputMode_undefined = -1,
IfxPort_InputMode_noPullDevice = 0 << 3,
IfxPort_InputMode_pullDown = 1U << 3,
IfxPort_InputMode_pullUp = 2U << 3
}
Ifx_P output modification modes definition. More...
enum IfxPort_LvdsMode {
IfxPort_LvdsMode_high = 0,
IfxPort_LvdsMode_medium = 1
}
specifies LVDS-M or LVDS-H mode as declare in Register MODULE_PORT.LPCRx.LVDSM More...
enum IfxPort_Mode {
IfxPort_Mode_inputNoPullDevice = 0,
IfxPort_Mode_inputPullDown = 8U,
IfxPort_Mode_inputPullUp = 0x10U,
IfxPort_Mode_outputPushPullGeneral = 0x80U,
IfxPort_Mode_outputPushPullAlt1 = 0x88U,
IfxPort_Mode_outputPushPullAlt2 = 0x90U,
IfxPort_Mode_outputPushPullAlt3 = 0x98U,
IfxPort_Mode_outputPushPullAlt4 = 0xA0U,
IfxPort_Mode_outputPushPullAlt5 = 0xA8U,
IfxPort_Mode_outputPushPullAlt6 = 0xB0U,
IfxPort_Mode_outputPushPullAlt7 = 0xB8U,
IfxPort_Mode_outputOpenDrainGeneral = 0xC0U,
IfxPort_Mode_outputOpenDrainAlt1 = 0xC8U,
IfxPort_Mode_outputOpenDrainAlt2 = 0xD0U,
IfxPort_Mode_outputOpenDrainAlt3 = 0xD8U,
IfxPort_Mode_outputOpenDrainAlt4 = 0xE0U,
IfxPort_Mode_outputOpenDrainAlt5 = 0xE8U,
IfxPort_Mode_outputOpenDrainAlt6 = 0xF0U,
IfxPort_Mode_outputOpenDrainAlt7 = 0xF8U
}
Ifx_P input / output mode definition. More...
enum IfxPort_OutputIdx {
IfxPort_OutputIdx_general = 0x10U << 3,
IfxPort_OutputIdx_alt1 = 0x11U << 3,
IfxPort_OutputIdx_alt2 = 0x12U << 3,
IfxPort_OutputIdx_alt3 = 0x13U << 3,
IfxPort_OutputIdx_alt4 = 0x14U << 3,
IfxPort_OutputIdx_alt5 = 0x15U << 3,
IfxPort_OutputIdx_alt6 = 0x16U << 3,
IfxPort_OutputIdx_alt7 = 0x17U << 3
}
Pin output alternate index. More...
enum IfxPort_OutputMode {
IfxPort_OutputMode_pushPull = 0x10U << 3,
IfxPort_OutputMode_openDrain = 0x18U << 3,
IfxPort_OutputMode_none = 0
}
Pin output mode definition. More...
enum IfxPort_PadDriver {
IfxPort_PadDriver_cmosAutomotiveSpeed1 = 0,
IfxPort_PadDriver_cmosAutomotiveSpeed2 = 1,
IfxPort_PadDriver_cmosAutomotiveSpeed3 = 2,
IfxPort_PadDriver_cmosAutomotiveSpeed4 = 3,
IfxPort_PadDriver_ttlSpeed1 = 8,
IfxPort_PadDriver_ttlSpeed2 = 9,
IfxPort_PadDriver_ttlSpeed3 = 10,
IfxPort_PadDriver_ttlSpeed4 = 11,
IfxPort_PadDriver_ttl3v3Speed1 = 12,
IfxPort_PadDriver_ttl3v3Speed2 = 13,
IfxPort_PadDriver_ttl3v3Speed3 = 14,
IfxPort_PadDriver_ttl3v3Speed4 = 15
}
Pad driver mode definition (strength and slew rate). More...
enum IfxPort_PadSupply {
IfxPort_PadSupply_3v = 0,
IfxPort_PadSupply_5v = 1
}
MODULE_PORTx.LPCRx.B.PS1.Selects between 5v and 3.3v on Vext supply for the LVDSM pair. More...
enum IfxPort_PinFunctionMode {
IfxPort_PinFunctionMode_digital = 0,
IfxPort_PinFunctionMode_analog = 1
}
enable analog/digital mode for port pin, as Defined in MODULE_PORTx.PDISC More...
enum IfxPort_State {
IfxPort_State_notChanged = (0 << 16) | (0 << 0),
IfxPort_State_high = (0 << 16) | (1U << 0),
IfxPort_State_low = (1U << 16) | (0 << 0),
IfxPort_State_toggled = (1U << 16) | (1U << 0)
}
Ifx_P output modification modes definition. More...

Detailed Description

Enumeration Type Documentation

◆ IfxPort_ControlledBy

enum IfxPort_ControlledBy

The LVDS RX_DIS control function can be selected from the Port (default) or HSCT module.declared in MODULE_PORTx.LPCRx.

Enumerator
IfxPort_ControlledBy_port | port controlled by PORT Module
IfxPort_ControlledBy_hsct | Port controlled by HSCT Module.

Definition at line 73 of file IfxPort.h.

◆ IfxPort_InputMode

enum IfxPort_InputMode

Ifx_P output modification modes definition.

Enumerator
IfxPort_InputMode_undefined
IfxPort_InputMode_noPullDevice
IfxPort_InputMode_pullDown
IfxPort_InputMode_pullUp

Definition at line 81 of file IfxPort.h.

◆ IfxPort_LvdsMode

enum IfxPort_LvdsMode

specifies LVDS-M or LVDS-H mode as declare in Register MODULE_PORT.LPCRx.LVDSM

Enumerator
IfxPort_LvdsMode_high | LVDS-H Mode.
IfxPort_LvdsMode_medium | LVDS-M Mode.

Definition at line 91 of file IfxPort.h.

◆ IfxPort_Mode

enum IfxPort_Mode

Ifx_P input / output mode definition.

See also
Ifx_P.IOCR, IfxPort_setPinMode()
Enumerator
IfxPort_Mode_inputNoPullDevice | Input, No pull device connected.
IfxPort_Mode_inputPullDown | Input, pull-down device connected.
IfxPort_Mode_inputPullUp | Input, pull-up device connected.
IfxPort_Mode_outputPushPullGeneral | Push-pull, General-purpose output.
IfxPort_Mode_outputPushPullAlt1 | Push-pull, Alternate output function 1.
IfxPort_Mode_outputPushPullAlt2 | Push-pull, Alternate output function 2.
IfxPort_Mode_outputPushPullAlt3 | Push-pull, Alternate output function 3.
IfxPort_Mode_outputPushPullAlt4 | Push-pull, Alternate output function 4.
IfxPort_Mode_outputPushPullAlt5 | Push-pull, Alternate output function 5.
IfxPort_Mode_outputPushPullAlt6 | Push-pull, Alternate output function 6.
IfxPort_Mode_outputPushPullAlt7 | Push-pull, Alternate output function 7.
IfxPort_Mode_outputOpenDrainGeneral | Open-drain, General-purpose output.
IfxPort_Mode_outputOpenDrainAlt1 | Open-drain, Alternate output function 1.
IfxPort_Mode_outputOpenDrainAlt2 | Open-drain, Alternate output function 2.
IfxPort_Mode_outputOpenDrainAlt3 | Open-drain, Alternate output function 3.
IfxPort_Mode_outputOpenDrainAlt4 | Open-drain, Alternate output function 4.
IfxPort_Mode_outputOpenDrainAlt5 | Open-drain, Alternate output function 5.
IfxPort_Mode_outputOpenDrainAlt6 | Open-drain, Alternate output function 6.
IfxPort_Mode_outputOpenDrainAlt7 | Open-drain, Alternate output function 7.

Definition at line 101 of file IfxPort.h.

◆ IfxPort_OutputIdx

enum IfxPort_OutputIdx

Pin output alternate index.

Enumerator
IfxPort_OutputIdx_general
IfxPort_OutputIdx_alt1
IfxPort_OutputIdx_alt2
IfxPort_OutputIdx_alt3
IfxPort_OutputIdx_alt4
IfxPort_OutputIdx_alt5
IfxPort_OutputIdx_alt6
IfxPort_OutputIdx_alt7

Definition at line 126 of file IfxPort.h.

◆ IfxPort_OutputMode

enum IfxPort_OutputMode

Pin output mode definition.

Enumerator
IfxPort_OutputMode_pushPull
IfxPort_OutputMode_openDrain
IfxPort_OutputMode_none

Definition at line 140 of file IfxPort.h.

◆ IfxPort_PadDriver

enum IfxPort_PadDriver

Pad driver mode definition (strength and slew rate).

See also
Ifx_P.PDR, IfxPort_setPinPadDriver()
Enumerator
IfxPort_PadDriver_cmosAutomotiveSpeed1 | Speed grade 1.
IfxPort_PadDriver_cmosAutomotiveSpeed2 | Speed grade 2.
IfxPort_PadDriver_cmosAutomotiveSpeed3 | Speed grade 3.
IfxPort_PadDriver_cmosAutomotiveSpeed4 | Speed grade 4.
IfxPort_PadDriver_ttlSpeed1 | Speed grade 1.
IfxPort_PadDriver_ttlSpeed2 | Speed grade 2.
IfxPort_PadDriver_ttlSpeed3 | Speed grade 3.
IfxPort_PadDriver_ttlSpeed4 | Speed grade 4.
IfxPort_PadDriver_ttl3v3Speed1 | 3.3v Pad supply speed1
IfxPort_PadDriver_ttl3v3Speed2 | 3.3v Pad supply speed2
IfxPort_PadDriver_ttl3v3Speed3 | 3.3v Pad supply speed3
IfxPort_PadDriver_ttl3v3Speed4 | 3.3v Pad supply speed4

Definition at line 151 of file IfxPort.h.

◆ IfxPort_PadSupply

enum IfxPort_PadSupply

MODULE_PORTx.LPCRx.B.PS1.Selects between 5v and 3.3v on Vext supply for the LVDSM pair.

Enumerator
IfxPort_PadSupply_3v | select,3.3v
IfxPort_PadSupply_5v | select,5V

Definition at line 169 of file IfxPort.h.

◆ IfxPort_PinFunctionMode

enum IfxPort_PinFunctionMode

enable analog/digital mode for port pin, as Defined in MODULE_PORTx.PDISC

Enumerator
IfxPort_PinFunctionMode_digital | Pad Pn.x is enabled and can be selected for digital function.
IfxPort_PinFunctionMode_analog | Pad Pn.x is enabled and can be selected for analog function.

Definition at line 177 of file IfxPort.h.

◆ IfxPort_State

enum IfxPort_State

Ifx_P output modification modes definition.

See also
Ifx_P.OMR, IfxPort_setPinState()
Enumerator
IfxPort_State_notChanged | Ifx_P pin is left unchanged.
IfxPort_State_high | Ifx_P pin is set to high.
IfxPort_State_low | Ifx_P pin is set to low.
IfxPort_State_toggled | Ifx_P pin is toggled.

Definition at line 187 of file IfxPort.h.


iLLD_TC38A: Data structures

Data Structures
Data structures
iLLD » PORTS » Standard Driver
Collaboration diagram for Data structures:

Data Structures

struct | IfxPort_LvdsConfig
To Configure LVDS mode. More...
struct | IfxPort_Pin
Defines a pin. More...
struct | IfxPort_Pin_Config
To configure pins. More...

Detailed Description

Data Structure Documentation

◆ IfxPort_LvdsConfig

struct IfxPort_LvdsConfig

To Configure LVDS mode.

Definition at line 237 of file IfxPort.h.

Data Fields
IfxPort_ControlledBy | enablePortControlled | specifies whether LVDS is controlled by PORT or HSCT
IfxPort_LvdsMode | lvdsMode | specifies LVDS-M or LVDS-H mode
IfxPort_PadSupply | padSupply | specify supply voltage

◆ IfxPort_Pin

struct IfxPort_Pin

Defines a pin.

Definition at line 246 of file IfxPort.h.

Data Fields
uint8 | pinIndex
Ifx_P * | port

◆ IfxPort_Pin_Config

struct IfxPort_Pin_Config

To configure pins.

Definition at line 254 of file IfxPort.h.

Data Fields
IfxPort_OutputIdx | mode
IfxPort_PadDriver | padDriver
uint8 | pinIndex
Ifx_P * | port


iLLD_TC38A: Single Pin Functions

Functions
Single Pin Functions
iLLD » PORTS » Standard Driver
Collaboration diagram for Single Pin Functions:

Functions

IFX_INLINE boolean | IfxPort_getPinState (Ifx_P *port, uint8 pinIndex)
Return the port state. More...
IFX_INLINE void | IfxPort_setPinFunctionMode (Ifx_P *port, uint8 pinIndex, IfxPort_PinFunctionMode mode)
set analog/digital mode for pin More...
IFX_INLINE void | IfxPort_setPinHigh (Ifx_P *port, uint8 pinIndex)
Set the port output. More...
IFX_INLINE void | IfxPort_setPinLow (Ifx_P *port, uint8 pinIndex)
Reset the port output. More...
IFX_INLINE void | IfxPort_setPinModeInput (Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode. More...
IFX_INLINE void | IfxPort_setPinModeOutput (Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode. More...
IFX_INLINE void | IfxPort_setPinState (Ifx_P *port, uint8 pinIndex, IfxPort_State action)
Set / Resets / Toggle the port output. More...
IFX_INLINE void | IfxPort_togglePin (Ifx_P *port, uint8 pinIndex)
Toggle the port output. More...
IFX_EXTERN boolean | IfxPort_disableEmergencyStop (Ifx_P *port, uint8 pinIndex)
Disable the emergency stop function. This function disables the emergency stop function. A check is done on port functionality. More...
IFX_EXTERN boolean | IfxPort_enableEmergencyStop (Ifx_P *port, uint8 pinIndex)
Enable the emergency stop function. This function enables the emergency stop function. A check is done on port functionality. More...
IFX_EXTERN void | IfxPort_setPinMode (Ifx_P *port, uint8 pinIndex, IfxPort_Mode mode)
Configure the port input / output mode. Also Configures the P40/P41 Port for digital functionality which bydefault support analog functionality. More...
IFX_EXTERN void | IfxPort_setPinModeLVDS (Ifx_P *port, uint8 pinIndex, IfxPort_Mode pinMode, IfxPort_LvdsConfig *lvds)
set lvds mode More...
IFX_EXTERN void | IfxPort_setPinPadDriver (Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode. More...
IFX_EXTERN void | IfxPort_setPinControllerSelection (Ifx_P *port, uint8 pinIndex)
Enable the Pin Controller Selection. More...
IFX_EXTERN void | IfxPort_resetPinControllerSelection (Ifx_P *port, uint8 pinIndex)
Disable the Pin Controller Selection. More...

Detailed Description

Function Documentation

◆ IfxPort_disableEmergencyStop()

IFX_EXTERN boolean IfxPort_disableEmergencyStop | ( | Ifx_P * | port,
 |  | uint8 | pinIndex
 | ) |  |

Disable the emergency stop function. This function disables the emergency stop function. A check is done on port functionality.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | Specifies the pin for which the emergency stop function should be disabled.
Returns
Returns TRUE if the emergency stop function has been disabled; FALSE if the emergency stop function could not be disabled

Coding example: /code if( !IfxPort_disableEmergencyStop(&MODULE_P33, 0) ) { // failed to disable emergency stop for P33.0 } /endcode

See also
IfxPort_disableEmergencyStop(), IfxPort_resetESR()

Definition at line 52 of file IfxPort.c.

◆ IfxPort_enableEmergencyStop()

IFX_EXTERN boolean IfxPort_enableEmergencyStop | ( | Ifx_P * | port,
 |  | uint8 | pinIndex
 | ) |  |

Enable the emergency stop function. This function enables the emergency stop function. A check is done on port functionality.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | Specifies the pin for which the emergency stop function should be enabled.
Returns
Returns TRUE if the emergency stop function has been enabled; FALSE if the emergency stop function could not be enabled

Coding example:

if( !IfxPort_enableEmergencyStop(&MODULE_P33, 0) ) {
// failed to enable emergency stop for P33.0
}
See also
IfxPort_disableEmergencyStop(), IfxPort_setESR()

Definition at line 75 of file IfxPort.c.

◆ IfxPort_getPinState()

IFX_INLINE boolean IfxPort_getPinState | ( | Ifx_P * | port,
 |  | uint8 | pinIndex
 | ) |  |

Return the port state.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | Specifies the pin for which the state should be returned.
Returns
Returns TRUE the pin is high; FALSE the pin is low

Coding example:

if( IfxPort_getPinState(&MODULE_P33, 0) ) {
// ...
}

Definition at line 635 of file IfxPort.h.

◆ IfxPort_resetPinControllerSelection()

IFX_EXTERN void IfxPort_resetPinControllerSelection | ( | Ifx_P * | port,
 |  | uint8 | pinIndex
 | ) |  |

Disable the Pin Controller Selection.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | Specifies the pin for which the mode has to be cleared.
Returns
None

Definition at line 428 of file IfxPort.c.

◆ IfxPort_setPinControllerSelection()

IFX_EXTERN void IfxPort_setPinControllerSelection | ( | Ifx_P * | port,
 |  | uint8 | pinIndex
 | ) |  |

Enable the Pin Controller Selection.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | Specifies the pin for which the mode has to be set.
Returns
None

Definition at line 337 of file IfxPort.c.

Referenced by IfxGeth_Eth_setupMiiInputPins(), IfxGeth_Eth_setupMiiOutputPins(), IfxGeth_Eth_setupRgmiiInputPins(), IfxGeth_Eth_setupRgmiiOutputPins(), IfxGeth_Eth_setupRmiiInputPins(), and IfxGeth_Eth_setupRmiiOutputPins().

◆ IfxPort_setPinFunctionMode()

IFX_INLINE void IfxPort_setPinFunctionMode | ( | Ifx_P * | port,
 |  | uint8 | pinIndex,
 |  | IfxPort_PinFunctionMode | mode
 | ) |  |

set analog/digital mode for pin

Parameters
port | Pointer to Port register space
pinIndex | specifies the pin index
mode | set analog/digital mode
Returns
None

Definition at line 647 of file IfxPort.h.

◆ IfxPort_setPinHigh()

IFX_INLINE void IfxPort_setPinHigh | ( | Ifx_P * | port,
 |  | uint8 | pinIndex
 | ) |  |

Set the port output.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | Specifies the pin to be set.
Returns
None

Coding example:

IfxPort_setPinHigh(&MODULE_P33, 0);
See also
IfxPort_setPinState(), IfxPort_setPinLow(), IfxPort_togglePin()

Definition at line 657 of file IfxPort.h.

◆ IfxPort_setPinLow()

IFX_INLINE void IfxPort_setPinLow | ( | Ifx_P * | port,
 |  | uint8 | pinIndex
 | ) |  |

Reset the port output.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | Specifies the pin to be reset.
Returns
None

Coding example:

IfxPort_setPinLow(&MODULE_P33, 0);
See also
IfxPort_setPinState(), IfxPort_setPinHigh(), IfxPort_togglePin()

Definition at line 663 of file IfxPort.h.

◆ IfxPort_setPinMode()

IFX_EXTERN void IfxPort_setPinMode | ( | Ifx_P * | port,
 |  | uint8 | pinIndex,
 |  | IfxPort_Mode | mode
 | ) |  |

Configure the port input / output mode. Also Configures the P40/P41 Port for digital functionality which bydefault support analog functionality.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | Specifies the pin to be configured.
mode | Specifies the port pin mode.
Returns
None

Coding example:

IfxPort_setPinMode(&MODULE_P33, 0, IfxPort_Mode_outputPushPullGeneral);

Definition at line 277 of file IfxPort.c.

Referenced by IfxPort_Io_initModule(), IfxPort_setPinModeInput(), and IfxPort_setPinModeOutput().

◆ IfxPort_setPinModeInput()

IFX_INLINE void IfxPort_setPinModeInput | ( | Ifx_P * | port,
 |  | uint8 | pinIndex,
 |  | IfxPort_InputMode | mode
 | ) |  |

Configure the port input / output mode.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | Specifies the pin to be configured.
mode | Specifies the port pin mode.
Returns
None

Coding example:

IfxPort_setPinModeInput(&MODULE_P33, 0, IfxPort_InputMode_pullUp);

Definition at line 669 of file IfxPort.h.

Referenced by IfxAsclin_initCtsPin(), IfxAsclin_initRxPin(), IfxCan_Node_initRxPin(), IfxCcu6_initCc60InPin(), IfxCcu6_initCc60InPinWithPadLevel(), IfxCcu6_initCc61InPin(), IfxCcu6_initCc61InPinWithPadLevel(), IfxCcu6_initCc62InPin(), IfxCcu6_initCc62InPinWithPadLevel(), IfxCcu6_initCcpos0Pin(), IfxCcu6_initCcpos0PinWithPadLevel(), IfxCcu6_initCcpos1Pin(), IfxCcu6_initCcpos1PinWithPadLevel(), IfxCcu6_initCcpos2Pin(), IfxCcu6_initCcpos2PinWithPadLevel(), IfxCcu6_initCtrapPin(), IfxCcu6_initCtrapPinWithPadLevel(), IfxCcu6_initT12hrPin(), IfxCcu6_initT12hrPinWithPadLevel(), IfxCcu6_initT13hrPin(), IfxCcu6_initT13hrPinWithPadLevel(), IfxEdsadc_initCinPin(), IfxEdsadc_initDinPin(), IfxEdsadc_initDsnPin(), IfxEdsadc_initDspPin(), IfxEdsadc_initItrPin(), IfxEdsadc_initSgPin(), IfxEray_initRxPin(), IfxEray_initRxPinWithPadLevel(), IfxGeth_Eth_setupMiiInputPins(), IfxGeth_Eth_setupRgmiiInputPins(), IfxGeth_Eth_setupRmiiInputPins(), IfxGpt12_initCapInPin(), IfxGpt12_initCapInPinWithPadLevel(), IfxGpt12_initTxEudInPin(), IfxGpt12_initTxEudInPinWithPadLevel(), IfxGpt12_initTxInPin(), IfxGpt12_initTxInPinWithPadLevel(), IfxGtm_PinMap_setTimTin(), IfxHssl_Hssl_initHsctModule(), IfxMsc_initInjPin(), IfxMsc_initSdiPin(), IfxPsi5_initRxPin(), IfxPsi5s_initRxPin(), IfxQspi_initMrstInPin(), IfxQspi_initMrstInPinWithPadLevel(), IfxQspi_initMtsrInPin(), IfxQspi_initMtsrInPinWithPadLevel(), IfxQspi_initSclkInPin(), IfxQspi_initSclkInPinWithPadLevel(), IfxQspi_initSlsi(), IfxQspi_initSlsiWithPadLevel(), IfxScuEru_initReqPin(), and IfxSent_initSentPin().

◆ IfxPort_setPinModeLVDS()

IFX_EXTERN void IfxPort_setPinModeLVDS | ( | Ifx_P * | port,
 |  | uint8 | pinIndex,
 |  | IfxPort_Mode | pinMode,
 |  | IfxPort_LvdsConfig * | lvds
 | ) |  |

set lvds mode

Parameters
port | pointer to Port Register space
pinIndex | specifies pin index
pinMode | specifes the mode of pin
lvds | config LVDS
Returns
None

Definition at line 295 of file IfxPort.c.

◆ IfxPort_setPinModeOutput()

IFX_INLINE void IfxPort_setPinModeOutput | ( | Ifx_P * | port,
 |  | uint8 | pinIndex,
 |  | IfxPort_OutputMode | mode,
 |  | IfxPort_OutputIdx | index
 | ) |  |

Configure the port input / output mode.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | Specifies the pin to be configured.
mode | Specifies the port pin mode.
index | Specifies the alternate (or general purpose) output channel.
Returns
None

Coding example:

IfxPort_setPinModeOutput(&MODULE_P33, 0, IfxPort_OutputMode_pushPull, IfxPort_OutputIdx_general);

Definition at line 675 of file IfxPort.h.

Referenced by IfxAsclin_initRtsPin(), IfxAsclin_initSclkPin(), IfxAsclin_initSlsoPin(), IfxAsclin_initTxPin(), IfxCan_Node_initTxPin(), IfxCcu6_initCc60OutPin(), IfxCcu6_initCc61OutPin(), IfxCcu6_initCc62OutPin(), IfxCcu6_initCout60Pin(), IfxCcu6_initCout61Pin(), IfxCcu6_initCout62Pin(), IfxCcu6_initCout63Pin(), IfxEdsadc_initCgPwmPin(), IfxEdsadc_initCoutPin(), IfxEray_initTxEnPin(), IfxEray_initTxPin(), IfxEvadc_initEmuxPin(), IfxEvadc_initGxBflPin(), IfxGeth_Eth_setupMiiOutputPins(), IfxGeth_Eth_setupRgmiiOutputPins(), IfxGeth_Eth_setupRmiiOutputPins(), IfxGpt12_initTxOutPin(), IfxGtm_PinMap_setAtomTout(), IfxGtm_PinMap_setTomTout(), IfxHssl_Hssl_initHsctModule(), IfxI2c_initSclSdaPin(), IfxMsc_initEnPin(), IfxMsc_initFclnPin(), IfxMsc_initFclpPin(), IfxMsc_initSonPin(), IfxMsc_initSopPin(), IfxPsi5_initTxPin(), IfxPsi5s_initClkPin(), IfxPsi5s_initTxPin(), IfxQspi_initMrstOutPin(), IfxQspi_initMtsrOutPin(), IfxQspi_initSclkOutPin(), IfxQspi_initSlso(), and IfxSent_initSpcPin().

◆ IfxPort_setPinPadDriver()

IFX_EXTERN void IfxPort_setPinPadDriver | ( | Ifx_P * | port,
 |  | uint8 | pinIndex,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Configure the pad driver mode.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | Specifies the pin for which the mode will be set.
padDriver | Specifies the driver mode.
Returns
None

Coding example:

// enable strong 3.3V driver
IfxPort_setPinPadDriver(&MODULE_P33, 0, IfxPort_PadDriver_cmosAutomotiveSpeed1);

Definition at line 322 of file IfxPort.c.

Referenced by IfxAsclin_initCtsPin(), IfxAsclin_initRtsPin(), IfxAsclin_initRxPin(), IfxAsclin_initSclkPin(), IfxAsclin_initSlsoPin(), IfxAsclin_initTxPin(), IfxCan_Node_initRxPin(), IfxCan_Node_initTxPin(), IfxCcu6_initCc60InPinWithPadLevel(), IfxCcu6_initCc60OutPin(), IfxCcu6_initCc61InPinWithPadLevel(), IfxCcu6_initCc61OutPin(), IfxCcu6_initCc62InPinWithPadLevel(), IfxCcu6_initCc62OutPin(), IfxCcu6_initCcpos0PinWithPadLevel(), IfxCcu6_initCcpos1PinWithPadLevel(), IfxCcu6_initCcpos2PinWithPadLevel(), IfxCcu6_initCout60Pin(), IfxCcu6_initCout61Pin(), IfxCcu6_initCout62Pin(), IfxCcu6_initCout63Pin(), IfxCcu6_initCtrapPinWithPadLevel(), IfxCcu6_initT12hrPinWithPadLevel(), IfxCcu6_initT13hrPinWithPadLevel(), IfxEdsadc_initCgPwmPin(), IfxEdsadc_initCinPin(), IfxEdsadc_initCoutPin(), IfxEdsadc_initDinPin(), IfxEdsadc_initDsnPin(), IfxEdsadc_initDspPin(), IfxEdsadc_initItrPin(), IfxEdsadc_initSgPin(), IfxEray_initRxPinWithPadLevel(), IfxEray_initTxEnPin(), IfxEray_initTxPin(), IfxEvadc_initEmuxPin(), IfxEvadc_initGxBflPin(), IfxGeth_Eth_setupMiiInputPins(), IfxGeth_Eth_setupMiiOutputPins(), IfxGeth_Eth_setupRgmiiInputPins(), IfxGeth_Eth_setupRgmiiOutputPins(), IfxGeth_Eth_setupRmiiInputPins(), IfxGeth_Eth_setupRmiiOutputPins(), IfxGpt12_initCapInPinWithPadLevel(), IfxGpt12_initTxEudInPinWithPadLevel(), IfxGpt12_initTxInPinWithPadLevel(), IfxGpt12_initTxOutPin(), IfxGtm_PinMap_setAtomTout(), IfxGtm_PinMap_setTomTout(), IfxHssl_Hssl_initHsctModule(), IfxI2c_initSclSdaPin(), IfxMsc_initEnPin(), IfxMsc_initFclnPin(), IfxMsc_initFclpPin(), IfxMsc_initInjPin(), IfxMsc_initSdiPin(), IfxMsc_initSonPin(), IfxMsc_initSopPin(), IfxPort_Io_initModule(), IfxPsi5_initRxPin(), IfxPsi5_initTxPin(), IfxPsi5s_initClkPin(), IfxPsi5s_initRxPin(), IfxPsi5s_initTxPin(), IfxQspi_initMrstInPinWithPadLevel(), IfxQspi_initMrstOutPin(), IfxQspi_initMtsrInPinWithPadLevel(), IfxQspi_initMtsrOutPin(), IfxQspi_initSclkInPinWithPadLevel(), IfxQspi_initSclkOutPin(), IfxQspi_initSlsiWithPadLevel(), IfxQspi_initSlso(), IfxSent_initSentPin(), and IfxSent_initSpcPin().

◆ IfxPort_setPinState()

IFX_INLINE void IfxPort_setPinState | ( | Ifx_P * | port,
 |  | uint8 | pinIndex,
 |  | IfxPort_State | action
 | ) |  |

Set / Resets / Toggle the port output.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | Specifies the pin to modify.
action | Specifies the action: set, reset, toggle.
Returns
None

Coding example:

IfxPort_setPinState(&MODULE_P33, 0, IfxPort_State_toggled);
IfxPort_setPinState(&MODULE_P33, 0, IfxPort_State_toggled);
IfxPort_setPinState(&MODULE_P33, 0, IfxPort_State_toggled);

Definition at line 681 of file IfxPort.h.

Referenced by IfxGtm_Tom_PwmHl_init(), IfxPort_setPinHigh(), IfxPort_setPinLow(), IfxPort_togglePin(), IfxQspi_SpiMaster_activateSlso(), and IfxQspi_SpiMaster_deactivateSlso().

◆ IfxPort_togglePin()

IFX_INLINE void IfxPort_togglePin | ( | Ifx_P * | port,
 |  | uint8 | pinIndex
 | ) |  |

Toggle the port output.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | Specifies the pin to be toggled.
Returns
None

Coding example:

IfxPort_togglePin(&MODULE_P33, 0);
See also
IfxPort_setPinState(), IfxPort_setPinLow(), IfxPort_setPinHigh()

Definition at line 687 of file IfxPort.h.


iLLD_TC38A: Group Access Functions

Functions
Group Access Functions
iLLD » PORTS » Standard Driver
Collaboration diagram for Group Access Functions:

Functions

IFX_INLINE uint32 | IfxPort_getGroupState (Ifx_P *port, uint8 pinIndex, uint16 mask)
Return the port group state. More...
IFX_INLINE void | IfxPort_setGroupState (Ifx_P *port, uint8 pinIndex, uint16 mask, uint16 data)
Set the port group state. More...
IFX_EXTERN Ifx_P * | IfxPort_getAddress (IfxPort_Index port)
Returns the module address of the selected Port module. More...
IFX_EXTERN IfxPort_Index | IfxPort_getIndex (Ifx_P *port)
Return port index within IfxModule_IndexMap (defined in IfxPort_cfg.c) More...
IFX_EXTERN void | IfxPort_setGroupModeInput (Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_InputMode mode)
Set pin modes to input at the pin location specified by '1' by the mask. More...
IFX_EXTERN void | IfxPort_setGroupModeOutput (Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Set pin modes to output at the pin location specified by '1' by the mask starting at pinIndex. More...
IFX_EXTERN void | IfxPort_setGroupPadDriver (Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_PadDriver padDriver)
Set pad driver strength at the pin location specified by '1' by the mask. More...

Detailed Description

Function Documentation

◆ IfxPort_getAddress()

IFX_EXTERN Ifx_P* IfxPort_getAddress ( IfxPort_Index port )

Returns the module address of the selected Port module.

Parameters
port Pointer to PORT module registers
Returns
PORT module register address

Definition at line 96 of file IfxPort.c.

◆ IfxPort_getGroupState()

IFX_INLINE uint32 IfxPort_getGroupState | ( | Ifx_P * | port,
 |  | uint8 | pinIndex,
 |  | uint16 | mask
 | ) |  |

Return the port group state.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | start at the given pin
mask | selects the pins which should be read (starting from pinIndex)
Returns
Returns the selected pin values

Coding example:

// read the current value of P33[7:0]
uint16 value = IfxPort_getGroupState(&MODULE_P33, 0, 0xff);

Definition at line 629 of file IfxPort.h.

◆ IfxPort_getIndex()

IFX_EXTERN IfxPort_Index IfxPort_getIndex ( Ifx_P * port )

Return port index within IfxModule_IndexMap (defined in IfxPort_cfg.c)

Parameters
port Pointer to the port for which the index number in IfxModule_IndexMap should be retrieved.
Returns
port index of IfxModule_IndexMap. return -1 in case of unknown port index.

Definition at line 115 of file IfxPort.c.

Referenced by IfxPort_modifyPinControllerSelection(), and IfxPort_setPinControllerSelection().

◆ IfxPort_setGroupModeInput()

IFX_EXTERN void IfxPort_setGroupModeInput | ( | Ifx_P * | port,
 |  | uint8 | pinIndex,
 |  | uint16 | mask,
 |  | IfxPort_InputMode | mode
 | ) |  |

Set pin modes to input at the pin location specified by '1' by the mask.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | start at the given pin
mask | selects the pins which should be modified (starting from pinIndex)
mode | Specifies the port pin mode.
Returns
None

Coding example:

// configure P33.[7:0] as GPIO inputs with Pull-Down enabled
IfxPort_setGroupModeInput(&MODULE_P33, 0, 0xff, IfxPort_InputMode_pullDown);

Definition at line 155 of file IfxPort.c.

◆ IfxPort_setGroupModeOutput()

IFX_EXTERN void IfxPort_setGroupModeOutput | ( | Ifx_P * | port,
 |  | uint8 | pinIndex,
 |  | uint16 | mask,
 |  | IfxPort_OutputMode | mode,
 |  | IfxPort_OutputIdx | index
 | ) |  |

Set pin modes to output at the pin location specified by '1' by the mask starting at pinIndex.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | start at the given pin
mask | selects the pins which should be modified (starting from pinIndex)
mode | Specifies the port pin mode.
index | Specifies the alternate (or general purpose) output channel.
Returns
None

Coding example:

// configure P33.[7:0] as GPIO outputs
IfxPort_setGroupModeOutput(&MODULE_P33, 0, 0xff, IfxPort_OutputMode_pushPull, IfxPort_OutputIdx_general);

Definition at line 193 of file IfxPort.c.

◆ IfxPort_setGroupPadDriver()

IFX_EXTERN void IfxPort_setGroupPadDriver | ( | Ifx_P * | port,
 |  | uint8 | pinIndex,
 |  | uint16 | mask,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Set pad driver strength at the pin location specified by '1' by the mask.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | start at the given pin
mask | selects the pins which should be modified (starting from pinIndex)
padDriver | Specifies the pad driver strength.
Returns
None

Coding example:

// configure P33.[7:0] to use CMOS pad driver with speed 1
IfxPort_setGroupPadDriver(&MODULE_P33, 0, 0xff, IfxPort_PadDriver_cmosAutomotiveSpeed1);

Definition at line 233 of file IfxPort.c.

◆ IfxPort_setGroupState()

IFX_INLINE void IfxPort_setGroupState | ( | Ifx_P * | port,
 |  | uint8 | pinIndex,
 |  | uint16 | mask,
 |  | uint16 | data
 | ) |  |

Set the port group state.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | start at the given pin
mask | selects the pins which should be modified (starting from pinIndex)
data | specifies the value which should be set
Returns
None

Coding example:

// configure P33.[7:0] as GPIO outputs
IfxPort_setGroupModeOutput(&MODULE_P33, 0, 0xff, IfxPort_OutputMode_pushPull, IfxPort_OutputIdx_general);
// set initial value
IfxPort_setGroupState(&MODULE_P33, 0, 0xff, 0x42);

Definition at line 641 of file IfxPort.h.


iLLD_TC38A: PORT Pin Mapping

Macros | Variables
PORT Pin Mapping
iLLD » PORTS
Collaboration diagram for PORT Pin Mapping:

Macros

#define | IFXPORT_PINMAP_NUM_MODULES 42
Table dimensions. More...
#define | IFXPORT_PINMAP_PIN_NUM_ITEMS 16

Variables

IFX_EXTERN IfxPort_Pin IfxPort_P00_0
IfxPort_P00_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_1
IfxPort_P00_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_10
IfxPort_P00_10. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_11
IfxPort_P00_11. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_12
IfxPort_P00_12. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_13
IfxPort_P00_13. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_14
IfxPort_P00_14. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_15
IfxPort_P00_15. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_2
IfxPort_P00_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_3
IfxPort_P00_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_4
IfxPort_P00_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_5
IfxPort_P00_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_6
IfxPort_P00_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_7
IfxPort_P00_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_8
IfxPort_P00_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_9
IfxPort_P00_9. More...
IFX_EXTERN IfxPort_Pin IfxPort_P01_0
IfxPort_P01_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P01_1
IfxPort_P01_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P01_10
IfxPort_P01_10. More...
IFX_EXTERN IfxPort_Pin IfxPort_P01_11
IfxPort_P01_11. More...
IFX_EXTERN IfxPort_Pin IfxPort_P01_12
IfxPort_P01_12. More...
IFX_EXTERN IfxPort_Pin IfxPort_P01_13
IfxPort_P01_13. More...
IFX_EXTERN IfxPort_Pin IfxPort_P01_14
IfxPort_P01_14. More...
IFX_EXTERN IfxPort_Pin IfxPort_P01_15
IfxPort_P01_15. More...
IFX_EXTERN IfxPort_Pin IfxPort_P01_2
IfxPort_P01_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P01_3
IfxPort_P01_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P01_4
IfxPort_P01_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P01_5
IfxPort_P01_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P01_6
IfxPort_P01_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P01_7
IfxPort_P01_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P01_8
IfxPort_P01_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P01_9
IfxPort_P01_9. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_0
IfxPort_P02_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_1
IfxPort_P02_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_10
IfxPort_P02_10. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_11
IfxPort_P02_11. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_12
IfxPort_P02_12. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_13
IfxPort_P02_13. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_14
IfxPort_P02_14. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_15
IfxPort_P02_15. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_2
IfxPort_P02_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_3
IfxPort_P02_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_4
IfxPort_P02_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_5
IfxPort_P02_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_6
IfxPort_P02_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_7
IfxPort_P02_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_8
IfxPort_P02_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_9
IfxPort_P02_9. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_0
IfxPort_P10_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_1
IfxPort_P10_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_10
IfxPort_P10_10. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_11
IfxPort_P10_11. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_13
IfxPort_P10_13. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_14
IfxPort_P10_14. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_15
IfxPort_P10_15. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_2
IfxPort_P10_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_3
IfxPort_P10_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_4
IfxPort_P10_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_5
IfxPort_P10_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_6
IfxPort_P10_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_7
IfxPort_P10_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_8
IfxPort_P10_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_9
IfxPort_P10_9. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_0
IfxPort_P11_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_1
IfxPort_P11_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_10
IfxPort_P11_10. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_11
IfxPort_P11_11. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_12
IfxPort_P11_12. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_13
IfxPort_P11_13. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_14
IfxPort_P11_14. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_15
IfxPort_P11_15. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_2
IfxPort_P11_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_3
IfxPort_P11_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_4
IfxPort_P11_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_5
IfxPort_P11_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_6
IfxPort_P11_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_7
IfxPort_P11_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_8
IfxPort_P11_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_9
IfxPort_P11_9. More...
IFX_EXTERN IfxPort_Pin IfxPort_P12_0
IfxPort_P12_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P12_1
IfxPort_P12_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P13_0
IfxPort_P13_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P13_1
IfxPort_P13_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P13_10
IfxPort_P13_10. More...
IFX_EXTERN IfxPort_Pin IfxPort_P13_11
IfxPort_P13_11. More...
IFX_EXTERN IfxPort_Pin IfxPort_P13_12
IfxPort_P13_12. More...
IFX_EXTERN IfxPort_Pin IfxPort_P13_13
IfxPort_P13_13. More...
IFX_EXTERN IfxPort_Pin IfxPort_P13_14
IfxPort_P13_14. More...
IFX_EXTERN IfxPort_Pin IfxPort_P13_15
IfxPort_P13_15. More...
IFX_EXTERN IfxPort_Pin IfxPort_P13_2
IfxPort_P13_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P13_3
IfxPort_P13_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P13_4
IfxPort_P13_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P13_5
IfxPort_P13_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P13_6
IfxPort_P13_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P13_7
IfxPort_P13_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P13_9
IfxPort_P13_9. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_0
IfxPort_P14_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_1
IfxPort_P14_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_10
IfxPort_P14_10. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_11
IfxPort_P14_11. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_12
IfxPort_P14_12. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_13
IfxPort_P14_13. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_14
IfxPort_P14_14. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_15
IfxPort_P14_15. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_2
IfxPort_P14_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_3
IfxPort_P14_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_4
IfxPort_P14_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_5
IfxPort_P14_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_6
IfxPort_P14_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_7
IfxPort_P14_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_8
IfxPort_P14_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_9
IfxPort_P14_9. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_0
IfxPort_P15_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_1
IfxPort_P15_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_10
IfxPort_P15_10. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_11
IfxPort_P15_11. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_12
IfxPort_P15_12. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_13
IfxPort_P15_13. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_14
IfxPort_P15_14. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_15
IfxPort_P15_15. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_2
IfxPort_P15_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_3
IfxPort_P15_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_4
IfxPort_P15_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_5
IfxPort_P15_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_6
IfxPort_P15_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_7
IfxPort_P15_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_8
IfxPort_P15_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_0
IfxPort_P20_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_1
IfxPort_P20_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_10
IfxPort_P20_10. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_11
IfxPort_P20_11. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_12
IfxPort_P20_12. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_13
IfxPort_P20_13. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_14
IfxPort_P20_14. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_3
IfxPort_P20_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_6
IfxPort_P20_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_7
IfxPort_P20_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_8
IfxPort_P20_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_9
IfxPort_P20_9. More...
IFX_EXTERN IfxPort_Pin IfxPort_P21_0
IfxPort_P21_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P21_1
IfxPort_P21_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P21_2
IfxPort_P21_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P21_3
IfxPort_P21_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P21_4
IfxPort_P21_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P21_5
IfxPort_P21_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P21_6
IfxPort_P21_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P21_7
IfxPort_P21_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P22_0
IfxPort_P22_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P22_1
IfxPort_P22_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P22_10
IfxPort_P22_10. More...
IFX_EXTERN IfxPort_Pin IfxPort_P22_11
IfxPort_P22_11. More...
IFX_EXTERN IfxPort_Pin IfxPort_P22_2
IfxPort_P22_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P22_3
IfxPort_P22_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P22_4
IfxPort_P22_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P22_5
IfxPort_P22_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P22_6
IfxPort_P22_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P22_7
IfxPort_P22_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P22_8
IfxPort_P22_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P22_9
IfxPort_P22_9. More...
IFX_EXTERN IfxPort_Pin IfxPort_P23_0
IfxPort_P23_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P23_1
IfxPort_P23_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P23_2
IfxPort_P23_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P23_3
IfxPort_P23_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P23_4
IfxPort_P23_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P23_5
IfxPort_P23_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P23_6
IfxPort_P23_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P23_7
IfxPort_P23_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P24_0
IfxPort_P24_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P24_1
IfxPort_P24_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P24_10
IfxPort_P24_10. More...
IFX_EXTERN IfxPort_Pin IfxPort_P24_11
IfxPort_P24_11. More...
IFX_EXTERN IfxPort_Pin IfxPort_P24_12
IfxPort_P24_12. More...
IFX_EXTERN IfxPort_Pin IfxPort_P24_13
IfxPort_P24_13. More...
IFX_EXTERN IfxPort_Pin IfxPort_P24_14
IfxPort_P24_14. More...
IFX_EXTERN IfxPort_Pin IfxPort_P24_15
IfxPort_P24_15. More...
IFX_EXTERN IfxPort_Pin IfxPort_P24_2
IfxPort_P24_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P24_3
IfxPort_P24_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P24_4
IfxPort_P24_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P24_5
IfxPort_P24_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P24_6
IfxPort_P24_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P24_7
IfxPort_P24_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P24_8
IfxPort_P24_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P24_9
IfxPort_P24_9. More...
IFX_EXTERN IfxPort_Pin IfxPort_P25_0
IfxPort_P25_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P25_1
IfxPort_P25_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P25_10
IfxPort_P25_10. More...
IFX_EXTERN IfxPort_Pin IfxPort_P25_11
IfxPort_P25_11. More...
IFX_EXTERN IfxPort_Pin IfxPort_P25_12
IfxPort_P25_12. More...
IFX_EXTERN IfxPort_Pin IfxPort_P25_13
IfxPort_P25_13. More...
IFX_EXTERN IfxPort_Pin IfxPort_P25_14
IfxPort_P25_14. More...
IFX_EXTERN IfxPort_Pin IfxPort_P25_15
IfxPort_P25_15. More...
IFX_EXTERN IfxPort_Pin IfxPort_P25_2
IfxPort_P25_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P25_3
IfxPort_P25_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P25_4
IfxPort_P25_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P25_5
IfxPort_P25_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P25_6
IfxPort_P25_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P25_7
IfxPort_P25_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P25_8
IfxPort_P25_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P25_9
IfxPort_P25_9. More...
IFX_EXTERN IfxPort_Pin IfxPort_P26_0
IfxPort_P26_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P30_0
IfxPort_P30_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P30_1
IfxPort_P30_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P30_10
IfxPort_P30_10. More...
IFX_EXTERN IfxPort_Pin IfxPort_P30_11
IfxPort_P30_11. More...
IFX_EXTERN IfxPort_Pin IfxPort_P30_12
IfxPort_P30_12. More...
IFX_EXTERN IfxPort_Pin IfxPort_P30_13
IfxPort_P30_13. More...
IFX_EXTERN IfxPort_Pin IfxPort_P30_14
IfxPort_P30_14. More...
IFX_EXTERN IfxPort_Pin IfxPort_P30_15
IfxPort_P30_15. More...
IFX_EXTERN IfxPort_Pin IfxPort_P30_2
IfxPort_P30_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P30_3
IfxPort_P30_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P30_4
IfxPort_P30_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P30_5
IfxPort_P30_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P30_6
IfxPort_P30_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P30_7
IfxPort_P30_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P30_8
IfxPort_P30_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P30_9
IfxPort_P30_9. More...
IFX_EXTERN IfxPort_Pin IfxPort_P31_0
IfxPort_P31_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P31_1
IfxPort_P31_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P31_10
IfxPort_P31_10. More...
IFX_EXTERN IfxPort_Pin IfxPort_P31_11
IfxPort_P31_11. More...
IFX_EXTERN IfxPort_Pin IfxPort_P31_12
IfxPort_P31_12. More...
IFX_EXTERN IfxPort_Pin IfxPort_P31_13
IfxPort_P31_13. More...
IFX_EXTERN IfxPort_Pin IfxPort_P31_14
IfxPort_P31_14. More...
IFX_EXTERN IfxPort_Pin IfxPort_P31_15
IfxPort_P31_15. More...
IFX_EXTERN IfxPort_Pin IfxPort_P31_2
IfxPort_P31_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P31_3
IfxPort_P31_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P31_4
IfxPort_P31_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P31_5
IfxPort_P31_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P31_6
IfxPort_P31_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P31_7
IfxPort_P31_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P31_8
IfxPort_P31_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P31_9
IfxPort_P31_9. More...
IFX_EXTERN IfxPort_Pin IfxPort_P32_0
IfxPort_P32_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P32_1
IfxPort_P32_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P32_2
IfxPort_P32_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P32_3
IfxPort_P32_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P32_4
IfxPort_P32_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P32_5
IfxPort_P32_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P32_6
IfxPort_P32_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P32_7
IfxPort_P32_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_0
IfxPort_P33_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_1
IfxPort_P33_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_10
IfxPort_P33_10. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_11
IfxPort_P33_11. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_12
IfxPort_P33_12. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_13
IfxPort_P33_13. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_14
IfxPort_P33_14. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_15
IfxPort_P33_15. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_2
IfxPort_P33_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_3
IfxPort_P33_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_4
IfxPort_P33_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_5
IfxPort_P33_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_6
IfxPort_P33_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_7
IfxPort_P33_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_8
IfxPort_P33_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_9
IfxPort_P33_9. More...
IFX_EXTERN IfxPort_Pin IfxPort_P34_1
IfxPort_P34_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P34_2
IfxPort_P34_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P34_3
IfxPort_P34_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P34_4
IfxPort_P34_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P34_5
IfxPort_P34_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_0
IfxPort_P40_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_1
IfxPort_P40_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_10
IfxPort_P40_10. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_11
IfxPort_P40_11. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_12
IfxPort_P40_12. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_13
IfxPort_P40_13. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_14
IfxPort_P40_14. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_15
IfxPort_P40_15. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_2
IfxPort_P40_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_3
IfxPort_P40_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_4
IfxPort_P40_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_5
IfxPort_P40_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_6
IfxPort_P40_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_7
IfxPort_P40_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_8
IfxPort_P40_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_9
IfxPort_P40_9. More...
IFX_EXTERN IfxPort_Pin IfxPort_P41_0
IfxPort_P41_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P41_1
IfxPort_P41_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P41_2
IfxPort_P41_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P41_3
IfxPort_P41_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P41_4
IfxPort_P41_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P41_5
IfxPort_P41_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P41_6
IfxPort_P41_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P41_7
IfxPort_P41_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P41_8
IfxPort_P41_8. More...
IFX_EXTERN const IfxPort_Pin * IfxPort_Pin_pinTable [IFXPORT_PINMAP_NUM_MODULES][IFXPORT_PINMAP_PIN_NUM_ITEMS]
IfxPort_Pin table. More...

Detailed Description

Macro Definition Documentation

◆ IFXPORT_PINMAP_NUM_MODULES

#define IFXPORT_PINMAP_NUM_MODULES 42

Table dimensions.

Definition at line 342 of file IfxPort_PinMap.h.

◆ IFXPORT_PINMAP_PIN_NUM_ITEMS

#define IFXPORT_PINMAP_PIN_NUM_ITEMS 16

Definition at line 343 of file IfxPort_PinMap.h.

Variable Documentation

◆ IfxPort_P00_0

IFX_EXTERN IfxPort_Pin IfxPort_P00_0

IfxPort_P00_0.

Definition at line 54 of file IfxPort_PinMap.h.

◆ IfxPort_P00_1

IFX_EXTERN IfxPort_Pin IfxPort_P00_1

IfxPort_P00_1.

Definition at line 55 of file IfxPort_PinMap.h.

◆ IfxPort_P00_10

IFX_EXTERN IfxPort_Pin IfxPort_P00_10

IfxPort_P00_10.

Definition at line 56 of file IfxPort_PinMap.h.

◆ IfxPort_P00_11

IFX_EXTERN IfxPort_Pin IfxPort_P00_11

IfxPort_P00_11.

Definition at line 57 of file IfxPort_PinMap.h.

◆ IfxPort_P00_12

IFX_EXTERN IfxPort_Pin IfxPort_P00_12

IfxPort_P00_12.

Definition at line 58 of file IfxPort_PinMap.h.

◆ IfxPort_P00_13

IFX_EXTERN IfxPort_Pin IfxPort_P00_13

IfxPort_P00_13.

Definition at line 59 of file IfxPort_PinMap.h.

◆ IfxPort_P00_14

IFX_EXTERN IfxPort_Pin IfxPort_P00_14

IfxPort_P00_14.

Definition at line 60 of file IfxPort_PinMap.h.

◆ IfxPort_P00_15

IFX_EXTERN IfxPort_Pin IfxPort_P00_15

IfxPort_P00_15.

Definition at line 61 of file IfxPort_PinMap.h.

◆ IfxPort_P00_2

IFX_EXTERN IfxPort_Pin IfxPort_P00_2

IfxPort_P00_2.

Definition at line 62 of file IfxPort_PinMap.h.

◆ IfxPort_P00_3

IFX_EXTERN IfxPort_Pin IfxPort_P00_3

IfxPort_P00_3.

Definition at line 63 of file IfxPort_PinMap.h.

◆ IfxPort_P00_4

IFX_EXTERN IfxPort_Pin IfxPort_P00_4

IfxPort_P00_4.

Definition at line 64 of file IfxPort_PinMap.h.

◆ IfxPort_P00_5

IFX_EXTERN IfxPort_Pin IfxPort_P00_5

IfxPort_P00_5.

Definition at line 65 of file IfxPort_PinMap.h.

◆ IfxPort_P00_6

IFX_EXTERN IfxPort_Pin IfxPort_P00_6

IfxPort_P00_6.

Definition at line 66 of file IfxPort_PinMap.h.

◆ IfxPort_P00_7

IFX_EXTERN IfxPort_Pin IfxPort_P00_7

IfxPort_P00_7.

Definition at line 67 of file IfxPort_PinMap.h.

◆ IfxPort_P00_8

IFX_EXTERN IfxPort_Pin IfxPort_P00_8

IfxPort_P00_8.

Definition at line 68 of file IfxPort_PinMap.h.

◆ IfxPort_P00_9

IFX_EXTERN IfxPort_Pin IfxPort_P00_9

IfxPort_P00_9.

Definition at line 69 of file IfxPort_PinMap.h.

◆ IfxPort_P01_0

IFX_EXTERN IfxPort_Pin IfxPort_P01_0

IfxPort_P01_0.

Definition at line 70 of file IfxPort_PinMap.h.

◆ IfxPort_P01_1

IFX_EXTERN IfxPort_Pin IfxPort_P01_1

IfxPort_P01_1.

Definition at line 71 of file IfxPort_PinMap.h.

◆ IfxPort_P01_10

IFX_EXTERN IfxPort_Pin IfxPort_P01_10

IfxPort_P01_10.

Definition at line 72 of file IfxPort_PinMap.h.

◆ IfxPort_P01_11

IFX_EXTERN IfxPort_Pin IfxPort_P01_11

IfxPort_P01_11.

Definition at line 73 of file IfxPort_PinMap.h.

◆ IfxPort_P01_12

IFX_EXTERN IfxPort_Pin IfxPort_P01_12

IfxPort_P01_12.

Definition at line 74 of file IfxPort_PinMap.h.

◆ IfxPort_P01_13

IFX_EXTERN IfxPort_Pin IfxPort_P01_13

IfxPort_P01_13.

Definition at line 75 of file IfxPort_PinMap.h.

◆ IfxPort_P01_14

IFX_EXTERN IfxPort_Pin IfxPort_P01_14

IfxPort_P01_14.

Definition at line 76 of file IfxPort_PinMap.h.

◆ IfxPort_P01_15

IFX_EXTERN IfxPort_Pin IfxPort_P01_15

IfxPort_P01_15.

Definition at line 77 of file IfxPort_PinMap.h.

◆ IfxPort_P01_2

IFX_EXTERN IfxPort_Pin IfxPort_P01_2

IfxPort_P01_2.

Definition at line 78 of file IfxPort_PinMap.h.

◆ IfxPort_P01_3

IFX_EXTERN IfxPort_Pin IfxPort_P01_3

IfxPort_P01_3.

Definition at line 79 of file IfxPort_PinMap.h.

◆ IfxPort_P01_4

IFX_EXTERN IfxPort_Pin IfxPort_P01_4

IfxPort_P01_4.

Definition at line 80 of file IfxPort_PinMap.h.

◆ IfxPort_P01_5

IFX_EXTERN IfxPort_Pin IfxPort_P01_5

IfxPort_P01_5.

Definition at line 81 of file IfxPort_PinMap.h.

◆ IfxPort_P01_6

IFX_EXTERN IfxPort_Pin IfxPort_P01_6

IfxPort_P01_6.

Definition at line 82 of file IfxPort_PinMap.h.

◆ IfxPort_P01_7

IFX_EXTERN IfxPort_Pin IfxPort_P01_7

IfxPort_P01_7.

Definition at line 83 of file IfxPort_PinMap.h.

◆ IfxPort_P01_8

IFX_EXTERN IfxPort_Pin IfxPort_P01_8

IfxPort_P01_8.

Definition at line 84 of file IfxPort_PinMap.h.

◆ IfxPort_P01_9

IFX_EXTERN IfxPort_Pin IfxPort_P01_9

IfxPort_P01_9.

Definition at line 85 of file IfxPort_PinMap.h.

◆ IfxPort_P02_0

IFX_EXTERN IfxPort_Pin IfxPort_P02_0

IfxPort_P02_0.

Definition at line 86 of file IfxPort_PinMap.h.

◆ IfxPort_P02_1

IFX_EXTERN IfxPort_Pin IfxPort_P02_1

IfxPort_P02_1.

Definition at line 87 of file IfxPort_PinMap.h.

◆ IfxPort_P02_10

IFX_EXTERN IfxPort_Pin IfxPort_P02_10

IfxPort_P02_10.

Definition at line 88 of file IfxPort_PinMap.h.

◆ IfxPort_P02_11

IFX_EXTERN IfxPort_Pin IfxPort_P02_11

IfxPort_P02_11.

Definition at line 89 of file IfxPort_PinMap.h.

◆ IfxPort_P02_12

IFX_EXTERN IfxPort_Pin IfxPort_P02_12

IfxPort_P02_12.

Definition at line 90 of file IfxPort_PinMap.h.

◆ IfxPort_P02_13

IFX_EXTERN IfxPort_Pin IfxPort_P02_13

IfxPort_P02_13.

Definition at line 91 of file IfxPort_PinMap.h.

◆ IfxPort_P02_14

IFX_EXTERN IfxPort_Pin IfxPort_P02_14

IfxPort_P02_14.

Definition at line 92 of file IfxPort_PinMap.h.

◆ IfxPort_P02_15

IFX_EXTERN IfxPort_Pin IfxPort_P02_15

IfxPort_P02_15.

Definition at line 93 of file IfxPort_PinMap.h.

◆ IfxPort_P02_2

IFX_EXTERN IfxPort_Pin IfxPort_P02_2

IfxPort_P02_2.

Definition at line 94 of file IfxPort_PinMap.h.

◆ IfxPort_P02_3

IFX_EXTERN IfxPort_Pin IfxPort_P02_3

IfxPort_P02_3.

Definition at line 95 of file IfxPort_PinMap.h.

◆ IfxPort_P02_4

IFX_EXTERN IfxPort_Pin IfxPort_P02_4

IfxPort_P02_4.

Definition at line 96 of file IfxPort_PinMap.h.

◆ IfxPort_P02_5

IFX_EXTERN IfxPort_Pin IfxPort_P02_5

IfxPort_P02_5.

Definition at line 97 of file IfxPort_PinMap.h.

◆ IfxPort_P02_6

IFX_EXTERN IfxPort_Pin IfxPort_P02_6

IfxPort_P02_6.

Definition at line 98 of file IfxPort_PinMap.h.

◆ IfxPort_P02_7

IFX_EXTERN IfxPort_Pin IfxPort_P02_7

IfxPort_P02_7.

Definition at line 99 of file IfxPort_PinMap.h.

◆ IfxPort_P02_8

IFX_EXTERN IfxPort_Pin IfxPort_P02_8

IfxPort_P02_8.

Definition at line 100 of file IfxPort_PinMap.h.

◆ IfxPort_P02_9

IFX_EXTERN IfxPort_Pin IfxPort_P02_9

IfxPort_P02_9.

Definition at line 101 of file IfxPort_PinMap.h.

◆ IfxPort_P10_0

IFX_EXTERN IfxPort_Pin IfxPort_P10_0

IfxPort_P10_0.

Definition at line 102 of file IfxPort_PinMap.h.

◆ IfxPort_P10_1

IFX_EXTERN IfxPort_Pin IfxPort_P10_1

IfxPort_P10_1.

Definition at line 103 of file IfxPort_PinMap.h.

◆ IfxPort_P10_10

IFX_EXTERN IfxPort_Pin IfxPort_P10_10

IfxPort_P10_10.

Definition at line 104 of file IfxPort_PinMap.h.

◆ IfxPort_P10_11

IFX_EXTERN IfxPort_Pin IfxPort_P10_11

IfxPort_P10_11.

Definition at line 105 of file IfxPort_PinMap.h.

◆ IfxPort_P10_13

IFX_EXTERN IfxPort_Pin IfxPort_P10_13

IfxPort_P10_13.

Definition at line 106 of file IfxPort_PinMap.h.

◆ IfxPort_P10_14

IFX_EXTERN IfxPort_Pin IfxPort_P10_14

IfxPort_P10_14.

Definition at line 107 of file IfxPort_PinMap.h.

◆ IfxPort_P10_15

IFX_EXTERN IfxPort_Pin IfxPort_P10_15

IfxPort_P10_15.

Definition at line 108 of file IfxPort_PinMap.h.

◆ IfxPort_P10_2

IFX_EXTERN IfxPort_Pin IfxPort_P10_2

IfxPort_P10_2.

Definition at line 109 of file IfxPort_PinMap.h.

◆ IfxPort_P10_3

IFX_EXTERN IfxPort_Pin IfxPort_P10_3

IfxPort_P10_3.

Definition at line 110 of file IfxPort_PinMap.h.

◆ IfxPort_P10_4

IFX_EXTERN IfxPort_Pin IfxPort_P10_4

IfxPort_P10_4.

Definition at line 111 of file IfxPort_PinMap.h.

◆ IfxPort_P10_5

IFX_EXTERN IfxPort_Pin IfxPort_P10_5

IfxPort_P10_5.

Definition at line 112 of file IfxPort_PinMap.h.

◆ IfxPort_P10_6

IFX_EXTERN IfxPort_Pin IfxPort_P10_6

IfxPort_P10_6.

Definition at line 113 of file IfxPort_PinMap.h.

◆ IfxPort_P10_7

IFX_EXTERN IfxPort_Pin IfxPort_P10_7

IfxPort_P10_7.

Definition at line 114 of file IfxPort_PinMap.h.

◆ IfxPort_P10_8

IFX_EXTERN IfxPort_Pin IfxPort_P10_8

IfxPort_P10_8.

Definition at line 115 of file IfxPort_PinMap.h.

◆ IfxPort_P10_9

IFX_EXTERN IfxPort_Pin IfxPort_P10_9

IfxPort_P10_9.

Definition at line 116 of file IfxPort_PinMap.h.

◆ IfxPort_P11_0

IFX_EXTERN IfxPort_Pin IfxPort_P11_0

IfxPort_P11_0.

Definition at line 117 of file IfxPort_PinMap.h.

◆ IfxPort_P11_1

IFX_EXTERN IfxPort_Pin IfxPort_P11_1

IfxPort_P11_1.

Definition at line 118 of file IfxPort_PinMap.h.

◆ IfxPort_P11_10

IFX_EXTERN IfxPort_Pin IfxPort_P11_10

IfxPort_P11_10.

Definition at line 119 of file IfxPort_PinMap.h.

◆ IfxPort_P11_11

IFX_EXTERN IfxPort_Pin IfxPort_P11_11

IfxPort_P11_11.

Definition at line 120 of file IfxPort_PinMap.h.

◆ IfxPort_P11_12

IFX_EXTERN IfxPort_Pin IfxPort_P11_12

IfxPort_P11_12.

Definition at line 121 of file IfxPort_PinMap.h.

◆ IfxPort_P11_13

IFX_EXTERN IfxPort_Pin IfxPort_P11_13

IfxPort_P11_13.

Definition at line 122 of file IfxPort_PinMap.h.

◆ IfxPort_P11_14

IFX_EXTERN IfxPort_Pin IfxPort_P11_14

IfxPort_P11_14.

Definition at line 123 of file IfxPort_PinMap.h.

◆ IfxPort_P11_15

IFX_EXTERN IfxPort_Pin IfxPort_P11_15

IfxPort_P11_15.

Definition at line 124 of file IfxPort_PinMap.h.

◆ IfxPort_P11_2

IFX_EXTERN IfxPort_Pin IfxPort_P11_2

IfxPort_P11_2.

Definition at line 125 of file IfxPort_PinMap.h.

◆ IfxPort_P11_3

IFX_EXTERN IfxPort_Pin IfxPort_P11_3

IfxPort_P11_3.

Definition at line 126 of file IfxPort_PinMap.h.

◆ IfxPort_P11_4

IFX_EXTERN IfxPort_Pin IfxPort_P11_4

IfxPort_P11_4.

Definition at line 127 of file IfxPort_PinMap.h.

◆ IfxPort_P11_5

IFX_EXTERN IfxPort_Pin IfxPort_P11_5

IfxPort_P11_5.

Definition at line 128 of file IfxPort_PinMap.h.

◆ IfxPort_P11_6

IFX_EXTERN IfxPort_Pin IfxPort_P11_6

IfxPort_P11_6.

Definition at line 129 of file IfxPort_PinMap.h.

◆ IfxPort_P11_7

IFX_EXTERN IfxPort_Pin IfxPort_P11_7

IfxPort_P11_7.

Definition at line 130 of file IfxPort_PinMap.h.

◆ IfxPort_P11_8

IFX_EXTERN IfxPort_Pin IfxPort_P11_8

IfxPort_P11_8.

Definition at line 131 of file IfxPort_PinMap.h.

◆ IfxPort_P11_9

IFX_EXTERN IfxPort_Pin IfxPort_P11_9

IfxPort_P11_9.

Definition at line 132 of file IfxPort_PinMap.h.

◆ IfxPort_P12_0

IFX_EXTERN IfxPort_Pin IfxPort_P12_0

IfxPort_P12_0.

Definition at line 133 of file IfxPort_PinMap.h.

◆ IfxPort_P12_1

IFX_EXTERN IfxPort_Pin IfxPort_P12_1

IfxPort_P12_1.

Definition at line 134 of file IfxPort_PinMap.h.

◆ IfxPort_P13_0

IFX_EXTERN IfxPort_Pin IfxPort_P13_0

IfxPort_P13_0.

Definition at line 135 of file IfxPort_PinMap.h.

◆ IfxPort_P13_1

IFX_EXTERN IfxPort_Pin IfxPort_P13_1

IfxPort_P13_1.

Definition at line 136 of file IfxPort_PinMap.h.

◆ IfxPort_P13_10

IFX_EXTERN IfxPort_Pin IfxPort_P13_10

IfxPort_P13_10.

Definition at line 137 of file IfxPort_PinMap.h.

◆ IfxPort_P13_11

IFX_EXTERN IfxPort_Pin IfxPort_P13_11

IfxPort_P13_11.

Definition at line 138 of file IfxPort_PinMap.h.

◆ IfxPort_P13_12

IFX_EXTERN IfxPort_Pin IfxPort_P13_12

IfxPort_P13_12.

Definition at line 139 of file IfxPort_PinMap.h.

◆ IfxPort_P13_13

IFX_EXTERN IfxPort_Pin IfxPort_P13_13

IfxPort_P13_13.

Definition at line 140 of file IfxPort_PinMap.h.

◆ IfxPort_P13_14

IFX_EXTERN IfxPort_Pin IfxPort_P13_14

IfxPort_P13_14.

Definition at line 141 of file IfxPort_PinMap.h.

◆ IfxPort_P13_15

IFX_EXTERN IfxPort_Pin IfxPort_P13_15

IfxPort_P13_15.

Definition at line 142 of file IfxPort_PinMap.h.

◆ IfxPort_P13_2

IFX_EXTERN IfxPort_Pin IfxPort_P13_2

IfxPort_P13_2.

Definition at line 143 of file IfxPort_PinMap.h.

◆ IfxPort_P13_3

IFX_EXTERN IfxPort_Pin IfxPort_P13_3

IfxPort_P13_3.

Definition at line 144 of file IfxPort_PinMap.h.

◆ IfxPort_P13_4

IFX_EXTERN IfxPort_Pin IfxPort_P13_4

IfxPort_P13_4.

Definition at line 145 of file IfxPort_PinMap.h.

◆ IfxPort_P13_5

IFX_EXTERN IfxPort_Pin IfxPort_P13_5

IfxPort_P13_5.

Definition at line 146 of file IfxPort_PinMap.h.

◆ IfxPort_P13_6

IFX_EXTERN IfxPort_Pin IfxPort_P13_6

IfxPort_P13_6.

Definition at line 147 of file IfxPort_PinMap.h.

◆ IfxPort_P13_7

IFX_EXTERN IfxPort_Pin IfxPort_P13_7

IfxPort_P13_7.

Definition at line 148 of file IfxPort_PinMap.h.

◆ IfxPort_P13_9

IFX_EXTERN IfxPort_Pin IfxPort_P13_9

IfxPort_P13_9.

Definition at line 149 of file IfxPort_PinMap.h.

◆ IfxPort_P14_0

IFX_EXTERN IfxPort_Pin IfxPort_P14_0

IfxPort_P14_0.

Definition at line 150 of file IfxPort_PinMap.h.

◆ IfxPort_P14_1

IFX_EXTERN IfxPort_Pin IfxPort_P14_1

IfxPort_P14_1.

Definition at line 151 of file IfxPort_PinMap.h.

◆ IfxPort_P14_10

IFX_EXTERN IfxPort_Pin IfxPort_P14_10

IfxPort_P14_10.

Definition at line 152 of file IfxPort_PinMap.h.

◆ IfxPort_P14_11

IFX_EXTERN IfxPort_Pin IfxPort_P14_11

IfxPort_P14_11.

Definition at line 153 of file IfxPort_PinMap.h.

◆ IfxPort_P14_12

IFX_EXTERN IfxPort_Pin IfxPort_P14_12

IfxPort_P14_12.

Definition at line 154 of file IfxPort_PinMap.h.

◆ IfxPort_P14_13

IFX_EXTERN IfxPort_Pin IfxPort_P14_13

IfxPort_P14_13.

Definition at line 155 of file IfxPort_PinMap.h.

◆ IfxPort_P14_14

IFX_EXTERN IfxPort_Pin IfxPort_P14_14

IfxPort_P14_14.

Definition at line 156 of file IfxPort_PinMap.h.

◆ IfxPort_P14_15

IFX_EXTERN IfxPort_Pin IfxPort_P14_15

IfxPort_P14_15.

Definition at line 157 of file IfxPort_PinMap.h.

◆ IfxPort_P14_2

IFX_EXTERN IfxPort_Pin IfxPort_P14_2

IfxPort_P14_2.

Definition at line 158 of file IfxPort_PinMap.h.

◆ IfxPort_P14_3

IFX_EXTERN IfxPort_Pin IfxPort_P14_3

IfxPort_P14_3.

Definition at line 159 of file IfxPort_PinMap.h.

◆ IfxPort_P14_4

IFX_EXTERN IfxPort_Pin IfxPort_P14_4

IfxPort_P14_4.

Definition at line 160 of file IfxPort_PinMap.h.

◆ IfxPort_P14_5

IFX_EXTERN IfxPort_Pin IfxPort_P14_5

IfxPort_P14_5.

Definition at line 161 of file IfxPort_PinMap.h.

◆ IfxPort_P14_6

IFX_EXTERN IfxPort_Pin IfxPort_P14_6

IfxPort_P14_6.

Definition at line 162 of file IfxPort_PinMap.h.

◆ IfxPort_P14_7

IFX_EXTERN IfxPort_Pin IfxPort_P14_7

IfxPort_P14_7.

Definition at line 163 of file IfxPort_PinMap.h.

◆ IfxPort_P14_8

IFX_EXTERN IfxPort_Pin IfxPort_P14_8

IfxPort_P14_8.

Definition at line 164 of file IfxPort_PinMap.h.

◆ IfxPort_P14_9

IFX_EXTERN IfxPort_Pin IfxPort_P14_9

IfxPort_P14_9.

Definition at line 165 of file IfxPort_PinMap.h.

◆ IfxPort_P15_0

IFX_EXTERN IfxPort_Pin IfxPort_P15_0

IfxPort_P15_0.

Definition at line 166 of file IfxPort_PinMap.h.

◆ IfxPort_P15_1

IFX_EXTERN IfxPort_Pin IfxPort_P15_1

IfxPort_P15_1.

Definition at line 167 of file IfxPort_PinMap.h.

◆ IfxPort_P15_10

IFX_EXTERN IfxPort_Pin IfxPort_P15_10

IfxPort_P15_10.

Definition at line 168 of file IfxPort_PinMap.h.

◆ IfxPort_P15_11

IFX_EXTERN IfxPort_Pin IfxPort_P15_11

IfxPort_P15_11.

Definition at line 169 of file IfxPort_PinMap.h.

◆ IfxPort_P15_12

IFX_EXTERN IfxPort_Pin IfxPort_P15_12

IfxPort_P15_12.

Definition at line 170 of file IfxPort_PinMap.h.

◆ IfxPort_P15_13

IFX_EXTERN IfxPort_Pin IfxPort_P15_13

IfxPort_P15_13.

Definition at line 171 of file IfxPort_PinMap.h.

◆ IfxPort_P15_14

IFX_EXTERN IfxPort_Pin IfxPort_P15_14

IfxPort_P15_14.

Definition at line 172 of file IfxPort_PinMap.h.

◆ IfxPort_P15_15

IFX_EXTERN IfxPort_Pin IfxPort_P15_15

IfxPort_P15_15.

Definition at line 173 of file IfxPort_PinMap.h.

◆ IfxPort_P15_2

IFX_EXTERN IfxPort_Pin IfxPort_P15_2

IfxPort_P15_2.

Definition at line 174 of file IfxPort_PinMap.h.

◆ IfxPort_P15_3

IFX_EXTERN IfxPort_Pin IfxPort_P15_3

IfxPort_P15_3.

Definition at line 175 of file IfxPort_PinMap.h.

◆ IfxPort_P15_4

IFX_EXTERN IfxPort_Pin IfxPort_P15_4

IfxPort_P15_4.

Definition at line 176 of file IfxPort_PinMap.h.

◆ IfxPort_P15_5

IFX_EXTERN IfxPort_Pin IfxPort_P15_5

IfxPort_P15_5.

Definition at line 177 of file IfxPort_PinMap.h.

◆ IfxPort_P15_6

IFX_EXTERN IfxPort_Pin IfxPort_P15_6

IfxPort_P15_6.

Definition at line 178 of file IfxPort_PinMap.h.

◆ IfxPort_P15_7

IFX_EXTERN IfxPort_Pin IfxPort_P15_7

IfxPort_P15_7.

Definition at line 179 of file IfxPort_PinMap.h.

◆ IfxPort_P15_8

IFX_EXTERN IfxPort_Pin IfxPort_P15_8

IfxPort_P15_8.

Definition at line 180 of file IfxPort_PinMap.h.

◆ IfxPort_P20_0

IFX_EXTERN IfxPort_Pin IfxPort_P20_0

IfxPort_P20_0.

Definition at line 181 of file IfxPort_PinMap.h.

◆ IfxPort_P20_1

IFX_EXTERN IfxPort_Pin IfxPort_P20_1

IfxPort_P20_1.

Definition at line 182 of file IfxPort_PinMap.h.

◆ IfxPort_P20_10

IFX_EXTERN IfxPort_Pin IfxPort_P20_10

IfxPort_P20_10.

Definition at line 183 of file IfxPort_PinMap.h.

◆ IfxPort_P20_11

IFX_EXTERN IfxPort_Pin IfxPort_P20_11

IfxPort_P20_11.

Definition at line 184 of file IfxPort_PinMap.h.

◆ IfxPort_P20_12

IFX_EXTERN IfxPort_Pin IfxPort_P20_12

IfxPort_P20_12.

Definition at line 185 of file IfxPort_PinMap.h.

◆ IfxPort_P20_13

IFX_EXTERN IfxPort_Pin IfxPort_P20_13

IfxPort_P20_13.

Definition at line 186 of file IfxPort_PinMap.h.

◆ IfxPort_P20_14

IFX_EXTERN IfxPort_Pin IfxPort_P20_14

IfxPort_P20_14.

Definition at line 187 of file IfxPort_PinMap.h.

◆ IfxPort_P20_3

IFX_EXTERN IfxPort_Pin IfxPort_P20_3

IfxPort_P20_3.

Definition at line 188 of file IfxPort_PinMap.h.

◆ IfxPort_P20_6

IFX_EXTERN IfxPort_Pin IfxPort_P20_6

IfxPort_P20_6.

Definition at line 189 of file IfxPort_PinMap.h.

◆ IfxPort_P20_7

IFX_EXTERN IfxPort_Pin IfxPort_P20_7

IfxPort_P20_7.

Definition at line 190 of file IfxPort_PinMap.h.

◆ IfxPort_P20_8

IFX_EXTERN IfxPort_Pin IfxPort_P20_8

IfxPort_P20_8.

Definition at line 191 of file IfxPort_PinMap.h.

◆ IfxPort_P20_9

IFX_EXTERN IfxPort_Pin IfxPort_P20_9

IfxPort_P20_9.

Definition at line 192 of file IfxPort_PinMap.h.

◆ IfxPort_P21_0

IFX_EXTERN IfxPort_Pin IfxPort_P21_0

IfxPort_P21_0.

Definition at line 193 of file IfxPort_PinMap.h.

◆ IfxPort_P21_1

IFX_EXTERN IfxPort_Pin IfxPort_P21_1

IfxPort_P21_1.

Definition at line 194 of file IfxPort_PinMap.h.

◆ IfxPort_P21_2

IFX_EXTERN IfxPort_Pin IfxPort_P21_2

IfxPort_P21_2.

Definition at line 195 of file IfxPort_PinMap.h.

◆ IfxPort_P21_3

IFX_EXTERN IfxPort_Pin IfxPort_P21_3

IfxPort_P21_3.

Definition at line 196 of file IfxPort_PinMap.h.

◆ IfxPort_P21_4

IFX_EXTERN IfxPort_Pin IfxPort_P21_4

IfxPort_P21_4.

Definition at line 197 of file IfxPort_PinMap.h.

◆ IfxPort_P21_5

IFX_EXTERN IfxPort_Pin IfxPort_P21_5

IfxPort_P21_5.

Definition at line 198 of file IfxPort_PinMap.h.

◆ IfxPort_P21_6

IFX_EXTERN IfxPort_Pin IfxPort_P21_6

IfxPort_P21_6.

Definition at line 199 of file IfxPort_PinMap.h.

◆ IfxPort_P21_7

IFX_EXTERN IfxPort_Pin IfxPort_P21_7

IfxPort_P21_7.

Definition at line 200 of file IfxPort_PinMap.h.

◆ IfxPort_P22_0

IFX_EXTERN IfxPort_Pin IfxPort_P22_0

IfxPort_P22_0.

Definition at line 201 of file IfxPort_PinMap.h.

◆ IfxPort_P22_1

IFX_EXTERN IfxPort_Pin IfxPort_P22_1

IfxPort_P22_1.

Definition at line 202 of file IfxPort_PinMap.h.

◆ IfxPort_P22_10

IFX_EXTERN IfxPort_Pin IfxPort_P22_10

IfxPort_P22_10.

Definition at line 203 of file IfxPort_PinMap.h.

◆ IfxPort_P22_11

IFX_EXTERN IfxPort_Pin IfxPort_P22_11

IfxPort_P22_11.

Definition at line 204 of file IfxPort_PinMap.h.

◆ IfxPort_P22_2

IFX_EXTERN IfxPort_Pin IfxPort_P22_2

IfxPort_P22_2.

Definition at line 205 of file IfxPort_PinMap.h.

◆ IfxPort_P22_3

IFX_EXTERN IfxPort_Pin IfxPort_P22_3

IfxPort_P22_3.

Definition at line 206 of file IfxPort_PinMap.h.

◆ IfxPort_P22_4

IFX_EXTERN IfxPort_Pin IfxPort_P22_4

IfxPort_P22_4.

Definition at line 207 of file IfxPort_PinMap.h.

◆ IfxPort_P22_5

IFX_EXTERN IfxPort_Pin IfxPort_P22_5

IfxPort_P22_5.

Definition at line 208 of file IfxPort_PinMap.h.

◆ IfxPort_P22_6

IFX_EXTERN IfxPort_Pin IfxPort_P22_6

IfxPort_P22_6.

Definition at line 209 of file IfxPort_PinMap.h.

◆ IfxPort_P22_7

IFX_EXTERN IfxPort_Pin IfxPort_P22_7

IfxPort_P22_7.

Definition at line 210 of file IfxPort_PinMap.h.

◆ IfxPort_P22_8

IFX_EXTERN IfxPort_Pin IfxPort_P22_8

IfxPort_P22_8.

Definition at line 211 of file IfxPort_PinMap.h.

◆ IfxPort_P22_9

IFX_EXTERN IfxPort_Pin IfxPort_P22_9

IfxPort_P22_9.

Definition at line 212 of file IfxPort_PinMap.h.

◆ IfxPort_P23_0

IFX_EXTERN IfxPort_Pin IfxPort_P23_0

IfxPort_P23_0.

Definition at line 213 of file IfxPort_PinMap.h.

◆ IfxPort_P23_1

IFX_EXTERN IfxPort_Pin IfxPort_P23_1

IfxPort_P23_1.

Definition at line 214 of file IfxPort_PinMap.h.

◆ IfxPort_P23_2

IFX_EXTERN IfxPort_Pin IfxPort_P23_2

IfxPort_P23_2.

Definition at line 215 of file IfxPort_PinMap.h.

◆ IfxPort_P23_3

IFX_EXTERN IfxPort_Pin IfxPort_P23_3

IfxPort_P23_3.

Definition at line 216 of file IfxPort_PinMap.h.

◆ IfxPort_P23_4

IFX_EXTERN IfxPort_Pin IfxPort_P23_4

IfxPort_P23_4.

Definition at line 217 of file IfxPort_PinMap.h.

◆ IfxPort_P23_5

IFX_EXTERN IfxPort_Pin IfxPort_P23_5

IfxPort_P23_5.

Definition at line 218 of file IfxPort_PinMap.h.

◆ IfxPort_P23_6

IFX_EXTERN IfxPort_Pin IfxPort_P23_6

IfxPort_P23_6.

Definition at line 219 of file IfxPort_PinMap.h.

◆ IfxPort_P23_7

IFX_EXTERN IfxPort_Pin IfxPort_P23_7

IfxPort_P23_7.

Definition at line 220 of file IfxPort_PinMap.h.

◆ IfxPort_P24_0

IFX_EXTERN IfxPort_Pin IfxPort_P24_0

IfxPort_P24_0.

Definition at line 221 of file IfxPort_PinMap.h.

◆ IfxPort_P24_1

IFX_EXTERN IfxPort_Pin IfxPort_P24_1

IfxPort_P24_1.

Definition at line 222 of file IfxPort_PinMap.h.

◆ IfxPort_P24_10

IFX_EXTERN IfxPort_Pin IfxPort_P24_10

IfxPort_P24_10.

Definition at line 223 of file IfxPort_PinMap.h.

◆ IfxPort_P24_11

IFX_EXTERN IfxPort_Pin IfxPort_P24_11

IfxPort_P24_11.

Definition at line 224 of file IfxPort_PinMap.h.

◆ IfxPort_P24_12

IFX_EXTERN IfxPort_Pin IfxPort_P24_12

IfxPort_P24_12.

Definition at line 225 of file IfxPort_PinMap.h.

◆ IfxPort_P24_13

IFX_EXTERN IfxPort_Pin IfxPort_P24_13

IfxPort_P24_13.

Definition at line 226 of file IfxPort_PinMap.h.

◆ IfxPort_P24_14

IFX_EXTERN IfxPort_Pin IfxPort_P24_14

IfxPort_P24_14.

Definition at line 227 of file IfxPort_PinMap.h.

◆ IfxPort_P24_15

IFX_EXTERN IfxPort_Pin IfxPort_P24_15

IfxPort_P24_15.

Definition at line 228 of file IfxPort_PinMap.h.

◆ IfxPort_P24_2

IFX_EXTERN IfxPort_Pin IfxPort_P24_2

IfxPort_P24_2.

Definition at line 229 of file IfxPort_PinMap.h.

◆ IfxPort_P24_3

IFX_EXTERN IfxPort_Pin IfxPort_P24_3

IfxPort_P24_3.

Definition at line 230 of file IfxPort_PinMap.h.

◆ IfxPort_P24_4

IFX_EXTERN IfxPort_Pin IfxPort_P24_4

IfxPort_P24_4.

Definition at line 231 of file IfxPort_PinMap.h.

◆ IfxPort_P24_5

IFX_EXTERN IfxPort_Pin IfxPort_P24_5

IfxPort_P24_5.

Definition at line 232 of file IfxPort_PinMap.h.

◆ IfxPort_P24_6

IFX_EXTERN IfxPort_Pin IfxPort_P24_6

IfxPort_P24_6.

Definition at line 233 of file IfxPort_PinMap.h.

◆ IfxPort_P24_7

IFX_EXTERN IfxPort_Pin IfxPort_P24_7

IfxPort_P24_7.

Definition at line 234 of file IfxPort_PinMap.h.

◆ IfxPort_P24_8

IFX_EXTERN IfxPort_Pin IfxPort_P24_8

IfxPort_P24_8.

Definition at line 235 of file IfxPort_PinMap.h.

◆ IfxPort_P24_9

IFX_EXTERN IfxPort_Pin IfxPort_P24_9

IfxPort_P24_9.

Definition at line 236 of file IfxPort_PinMap.h.

◆ IfxPort_P25_0

IFX_EXTERN IfxPort_Pin IfxPort_P25_0

IfxPort_P25_0.

Definition at line 237 of file IfxPort_PinMap.h.

◆ IfxPort_P25_1

IFX_EXTERN IfxPort_Pin IfxPort_P25_1

IfxPort_P25_1.

Definition at line 238 of file IfxPort_PinMap.h.

◆ IfxPort_P25_10

IFX_EXTERN IfxPort_Pin IfxPort_P25_10

IfxPort_P25_10.

Definition at line 239 of file IfxPort_PinMap.h.

◆ IfxPort_P25_11

IFX_EXTERN IfxPort_Pin IfxPort_P25_11

IfxPort_P25_11.

Definition at line 240 of file IfxPort_PinMap.h.

◆ IfxPort_P25_12

IFX_EXTERN IfxPort_Pin IfxPort_P25_12

IfxPort_P25_12.

Definition at line 241 of file IfxPort_PinMap.h.

◆ IfxPort_P25_13

IFX_EXTERN IfxPort_Pin IfxPort_P25_13

IfxPort_P25_13.

Definition at line 242 of file IfxPort_PinMap.h.

◆ IfxPort_P25_14

IFX_EXTERN IfxPort_Pin IfxPort_P25_14

IfxPort_P25_14.

Definition at line 243 of file IfxPort_PinMap.h.

◆ IfxPort_P25_15

IFX_EXTERN IfxPort_Pin IfxPort_P25_15

IfxPort_P25_15.

Definition at line 244 of file IfxPort_PinMap.h.

◆ IfxPort_P25_2

IFX_EXTERN IfxPort_Pin IfxPort_P25_2

IfxPort_P25_2.

Definition at line 245 of file IfxPort_PinMap.h.

◆ IfxPort_P25_3

IFX_EXTERN IfxPort_Pin IfxPort_P25_3

IfxPort_P25_3.

Definition at line 246 of file IfxPort_PinMap.h.

◆ IfxPort_P25_4

IFX_EXTERN IfxPort_Pin IfxPort_P25_4

IfxPort_P25_4.

Definition at line 247 of file IfxPort_PinMap.h.

◆ IfxPort_P25_5

IFX_EXTERN IfxPort_Pin IfxPort_P25_5

IfxPort_P25_5.

Definition at line 248 of file IfxPort_PinMap.h.

◆ IfxPort_P25_6

IFX_EXTERN IfxPort_Pin IfxPort_P25_6

IfxPort_P25_6.

Definition at line 249 of file IfxPort_PinMap.h.

◆ IfxPort_P25_7

IFX_EXTERN IfxPort_Pin IfxPort_P25_7

IfxPort_P25_7.

Definition at line 250 of file IfxPort_PinMap.h.

◆ IfxPort_P25_8

IFX_EXTERN IfxPort_Pin IfxPort_P25_8

IfxPort_P25_8.

Definition at line 251 of file IfxPort_PinMap.h.

◆ IfxPort_P25_9

IFX_EXTERN IfxPort_Pin IfxPort_P25_9

IfxPort_P25_9.

Definition at line 252 of file IfxPort_PinMap.h.

◆ IfxPort_P26_0

IFX_EXTERN IfxPort_Pin IfxPort_P26_0

IfxPort_P26_0.

Definition at line 253 of file IfxPort_PinMap.h.

◆ IfxPort_P30_0

IFX_EXTERN IfxPort_Pin IfxPort_P30_0

IfxPort_P30_0.

Definition at line 254 of file IfxPort_PinMap.h.

◆ IfxPort_P30_1

IFX_EXTERN IfxPort_Pin IfxPort_P30_1

IfxPort_P30_1.

Definition at line 255 of file IfxPort_PinMap.h.

◆ IfxPort_P30_10

IFX_EXTERN IfxPort_Pin IfxPort_P30_10

IfxPort_P30_10.

Definition at line 256 of file IfxPort_PinMap.h.

◆ IfxPort_P30_11

IFX_EXTERN IfxPort_Pin IfxPort_P30_11

IfxPort_P30_11.

Definition at line 257 of file IfxPort_PinMap.h.

◆ IfxPort_P30_12

IFX_EXTERN IfxPort_Pin IfxPort_P30_12

IfxPort_P30_12.

Definition at line 258 of file IfxPort_PinMap.h.

◆ IfxPort_P30_13

IFX_EXTERN IfxPort_Pin IfxPort_P30_13

IfxPort_P30_13.

Definition at line 259 of file IfxPort_PinMap.h.

◆ IfxPort_P30_14

IFX_EXTERN IfxPort_Pin IfxPort_P30_14

IfxPort_P30_14.

Definition at line 260 of file IfxPort_PinMap.h.

◆ IfxPort_P30_15

IFX_EXTERN IfxPort_Pin IfxPort_P30_15

IfxPort_P30_15.

Definition at line 261 of file IfxPort_PinMap.h.

◆ IfxPort_P30_2

IFX_EXTERN IfxPort_Pin IfxPort_P30_2

IfxPort_P30_2.

Definition at line 262 of file IfxPort_PinMap.h.

◆ IfxPort_P30_3

IFX_EXTERN IfxPort_Pin IfxPort_P30_3

IfxPort_P30_3.

Definition at line 263 of file IfxPort_PinMap.h.

◆ IfxPort_P30_4

IFX_EXTERN IfxPort_Pin IfxPort_P30_4

IfxPort_P30_4.

Definition at line 264 of file IfxPort_PinMap.h.

◆ IfxPort_P30_5

IFX_EXTERN IfxPort_Pin IfxPort_P30_5

IfxPort_P30_5.

Definition at line 265 of file IfxPort_PinMap.h.

◆ IfxPort_P30_6

IFX_EXTERN IfxPort_Pin IfxPort_P30_6

IfxPort_P30_6.

Definition at line 266 of file IfxPort_PinMap.h.

◆ IfxPort_P30_7

IFX_EXTERN IfxPort_Pin IfxPort_P30_7

IfxPort_P30_7.

Definition at line 267 of file IfxPort_PinMap.h.

◆ IfxPort_P30_8

IFX_EXTERN IfxPort_Pin IfxPort_P30_8

IfxPort_P30_8.

Definition at line 268 of file IfxPort_PinMap.h.

◆ IfxPort_P30_9

IFX_EXTERN IfxPort_Pin IfxPort_P30_9

IfxPort_P30_9.

Definition at line 269 of file IfxPort_PinMap.h.

◆ IfxPort_P31_0

IFX_EXTERN IfxPort_Pin IfxPort_P31_0

IfxPort_P31_0.

Definition at line 270 of file IfxPort_PinMap.h.

◆ IfxPort_P31_1

IFX_EXTERN IfxPort_Pin IfxPort_P31_1

IfxPort_P31_1.

Definition at line 271 of file IfxPort_PinMap.h.

◆ IfxPort_P31_10

IFX_EXTERN IfxPort_Pin IfxPort_P31_10

IfxPort_P31_10.

Definition at line 272 of file IfxPort_PinMap.h.

◆ IfxPort_P31_11

IFX_EXTERN IfxPort_Pin IfxPort_P31_11

IfxPort_P31_11.

Definition at line 273 of file IfxPort_PinMap.h.

◆ IfxPort_P31_12

IFX_EXTERN IfxPort_Pin IfxPort_P31_12

IfxPort_P31_12.

Definition at line 274 of file IfxPort_PinMap.h.

◆ IfxPort_P31_13

IFX_EXTERN IfxPort_Pin IfxPort_P31_13

IfxPort_P31_13.

Definition at line 275 of file IfxPort_PinMap.h.

◆ IfxPort_P31_14

IFX_EXTERN IfxPort_Pin IfxPort_P31_14

IfxPort_P31_14.

Definition at line 276 of file IfxPort_PinMap.h.

◆ IfxPort_P31_15

IFX_EXTERN IfxPort_Pin IfxPort_P31_15

IfxPort_P31_15.

Definition at line 277 of file IfxPort_PinMap.h.

◆ IfxPort_P31_2

IFX_EXTERN IfxPort_Pin IfxPort_P31_2

IfxPort_P31_2.

Definition at line 278 of file IfxPort_PinMap.h.

◆ IfxPort_P31_3

IFX_EXTERN IfxPort_Pin IfxPort_P31_3

IfxPort_P31_3.

Definition at line 279 of file IfxPort_PinMap.h.

◆ IfxPort_P31_4

IFX_EXTERN IfxPort_Pin IfxPort_P31_4

IfxPort_P31_4.

Definition at line 280 of file IfxPort_PinMap.h.

◆ IfxPort_P31_5

IFX_EXTERN IfxPort_Pin IfxPort_P31_5

IfxPort_P31_5.

Definition at line 281 of file IfxPort_PinMap.h.

◆ IfxPort_P31_6

IFX_EXTERN IfxPort_Pin IfxPort_P31_6

IfxPort_P31_6.

Definition at line 282 of file IfxPort_PinMap.h.

◆ IfxPort_P31_7

IFX_EXTERN IfxPort_Pin IfxPort_P31_7

IfxPort_P31_7.

Definition at line 283 of file IfxPort_PinMap.h.

◆ IfxPort_P31_8

IFX_EXTERN IfxPort_Pin IfxPort_P31_8

IfxPort_P31_8.

Definition at line 284 of file IfxPort_PinMap.h.

◆ IfxPort_P31_9

IFX_EXTERN IfxPort_Pin IfxPort_P31_9

IfxPort_P31_9.

Definition at line 285 of file IfxPort_PinMap.h.

◆ IfxPort_P32_0

IFX_EXTERN IfxPort_Pin IfxPort_P32_0

IfxPort_P32_0.

Definition at line 286 of file IfxPort_PinMap.h.

◆ IfxPort_P32_1

IFX_EXTERN IfxPort_Pin IfxPort_P32_1

IfxPort_P32_1.

Definition at line 287 of file IfxPort_PinMap.h.

◆ IfxPort_P32_2

IFX_EXTERN IfxPort_Pin IfxPort_P32_2

IfxPort_P32_2.

Definition at line 288 of file IfxPort_PinMap.h.

◆ IfxPort_P32_3

IFX_EXTERN IfxPort_Pin IfxPort_P32_3

IfxPort_P32_3.

Definition at line 289 of file IfxPort_PinMap.h.

◆ IfxPort_P32_4

IFX_EXTERN IfxPort_Pin IfxPort_P32_4

IfxPort_P32_4.

Definition at line 290 of file IfxPort_PinMap.h.

◆ IfxPort_P32_5

IFX_EXTERN IfxPort_Pin IfxPort_P32_5

IfxPort_P32_5.

Definition at line 291 of file IfxPort_PinMap.h.

◆ IfxPort_P32_6

IFX_EXTERN IfxPort_Pin IfxPort_P32_6

IfxPort_P32_6.

Definition at line 292 of file IfxPort_PinMap.h.

◆ IfxPort_P32_7

IFX_EXTERN IfxPort_Pin IfxPort_P32_7

IfxPort_P32_7.

Definition at line 293 of file IfxPort_PinMap.h.

◆ IfxPort_P33_0

IFX_EXTERN IfxPort_Pin IfxPort_P33_0

IfxPort_P33_0.

Definition at line 294 of file IfxPort_PinMap.h.

◆ IfxPort_P33_1

IFX_EXTERN IfxPort_Pin IfxPort_P33_1

IfxPort_P33_1.

Definition at line 295 of file IfxPort_PinMap.h.

◆ IfxPort_P33_10

IFX_EXTERN IfxPort_Pin IfxPort_P33_10

IfxPort_P33_10.

Definition at line 296 of file IfxPort_PinMap.h.

◆ IfxPort_P33_11

IFX_EXTERN IfxPort_Pin IfxPort_P33_11

IfxPort_P33_11.

Definition at line 297 of file IfxPort_PinMap.h.

◆ IfxPort_P33_12

IFX_EXTERN IfxPort_Pin IfxPort_P33_12

IfxPort_P33_12.

Definition at line 298 of file IfxPort_PinMap.h.

◆ IfxPort_P33_13

IFX_EXTERN IfxPort_Pin IfxPort_P33_13

IfxPort_P33_13.

Definition at line 299 of file IfxPort_PinMap.h.

◆ IfxPort_P33_14

IFX_EXTERN IfxPort_Pin IfxPort_P33_14

IfxPort_P33_14.

Definition at line 300 of file IfxPort_PinMap.h.

◆ IfxPort_P33_15

IFX_EXTERN IfxPort_Pin IfxPort_P33_15

IfxPort_P33_15.

Definition at line 301 of file IfxPort_PinMap.h.

◆ IfxPort_P33_2

IFX_EXTERN IfxPort_Pin IfxPort_P33_2

IfxPort_P33_2.

Definition at line 302 of file IfxPort_PinMap.h.

◆ IfxPort_P33_3

IFX_EXTERN IfxPort_Pin IfxPort_P33_3

IfxPort_P33_3.

Definition at line 303 of file IfxPort_PinMap.h.

◆ IfxPort_P33_4

IFX_EXTERN IfxPort_Pin IfxPort_P33_4

IfxPort_P33_4.

Definition at line 304 of file IfxPort_PinMap.h.

◆ IfxPort_P33_5

IFX_EXTERN IfxPort_Pin IfxPort_P33_5

IfxPort_P33_5.

Definition at line 305 of file IfxPort_PinMap.h.

◆ IfxPort_P33_6

IFX_EXTERN IfxPort_Pin IfxPort_P33_6

IfxPort_P33_6.

Definition at line 306 of file IfxPort_PinMap.h.

◆ IfxPort_P33_7

IFX_EXTERN IfxPort_Pin IfxPort_P33_7

IfxPort_P33_7.

Definition at line 307 of file IfxPort_PinMap.h.

◆ IfxPort_P33_8

IFX_EXTERN IfxPort_Pin IfxPort_P33_8

IfxPort_P33_8.

Definition at line 308 of file IfxPort_PinMap.h.

◆ IfxPort_P33_9

IFX_EXTERN IfxPort_Pin IfxPort_P33_9

IfxPort_P33_9.

Definition at line 309 of file IfxPort_PinMap.h.

◆ IfxPort_P34_1

IFX_EXTERN IfxPort_Pin IfxPort_P34_1

IfxPort_P34_1.

Definition at line 310 of file IfxPort_PinMap.h.

◆ IfxPort_P34_2

IFX_EXTERN IfxPort_Pin IfxPort_P34_2

IfxPort_P34_2.

Definition at line 311 of file IfxPort_PinMap.h.

◆ IfxPort_P34_3

IFX_EXTERN IfxPort_Pin IfxPort_P34_3

IfxPort_P34_3.

Definition at line 312 of file IfxPort_PinMap.h.

◆ IfxPort_P34_4

IFX_EXTERN IfxPort_Pin IfxPort_P34_4

IfxPort_P34_4.

Definition at line 313 of file IfxPort_PinMap.h.

◆ IfxPort_P34_5

IFX_EXTERN IfxPort_Pin IfxPort_P34_5

IfxPort_P34_5.

Definition at line 314 of file IfxPort_PinMap.h.

◆ IfxPort_P40_0

IFX_EXTERN IfxPort_Pin IfxPort_P40_0

IfxPort_P40_0.

Definition at line 315 of file IfxPort_PinMap.h.

◆ IfxPort_P40_1

IFX_EXTERN IfxPort_Pin IfxPort_P40_1

IfxPort_P40_1.

Definition at line 316 of file IfxPort_PinMap.h.

◆ IfxPort_P40_10

IFX_EXTERN IfxPort_Pin IfxPort_P40_10

IfxPort_P40_10.

Definition at line 317 of file IfxPort_PinMap.h.

◆ IfxPort_P40_11

IFX_EXTERN IfxPort_Pin IfxPort_P40_11

IfxPort_P40_11.

Definition at line 318 of file IfxPort_PinMap.h.

◆ IfxPort_P40_12

IFX_EXTERN IfxPort_Pin IfxPort_P40_12

IfxPort_P40_12.

Definition at line 319 of file IfxPort_PinMap.h.

◆ IfxPort_P40_13

IFX_EXTERN IfxPort_Pin IfxPort_P40_13

IfxPort_P40_13.

Definition at line 320 of file IfxPort_PinMap.h.

◆ IfxPort_P40_14

IFX_EXTERN IfxPort_Pin IfxPort_P40_14

IfxPort_P40_14.

Definition at line 321 of file IfxPort_PinMap.h.

◆ IfxPort_P40_15

IFX_EXTERN IfxPort_Pin IfxPort_P40_15

IfxPort_P40_15.

Definition at line 322 of file IfxPort_PinMap.h.

◆ IfxPort_P40_2

IFX_EXTERN IfxPort_Pin IfxPort_P40_2

IfxPort_P40_2.

Definition at line 323 of file IfxPort_PinMap.h.

◆ IfxPort_P40_3

IFX_EXTERN IfxPort_Pin IfxPort_P40_3

IfxPort_P40_3.

Definition at line 324 of file IfxPort_PinMap.h.

◆ IfxPort_P40_4

IFX_EXTERN IfxPort_Pin IfxPort_P40_4

IfxPort_P40_4.

Definition at line 325 of file IfxPort_PinMap.h.

◆ IfxPort_P40_5

IFX_EXTERN IfxPort_Pin IfxPort_P40_5

IfxPort_P40_5.

Definition at line 326 of file IfxPort_PinMap.h.

◆ IfxPort_P40_6

IFX_EXTERN IfxPort_Pin IfxPort_P40_6

IfxPort_P40_6.

Definition at line 327 of file IfxPort_PinMap.h.

◆ IfxPort_P40_7

IFX_EXTERN IfxPort_Pin IfxPort_P40_7

IfxPort_P40_7.

Definition at line 328 of file IfxPort_PinMap.h.

◆ IfxPort_P40_8

IFX_EXTERN IfxPort_Pin IfxPort_P40_8

IfxPort_P40_8.

Definition at line 329 of file IfxPort_PinMap.h.

◆ IfxPort_P40_9

IFX_EXTERN IfxPort_Pin IfxPort_P40_9

IfxPort_P40_9.

Definition at line 330 of file IfxPort_PinMap.h.

◆ IfxPort_P41_0

IFX_EXTERN IfxPort_Pin IfxPort_P41_0

IfxPort_P41_0.

Definition at line 331 of file IfxPort_PinMap.h.

◆ IfxPort_P41_1

IFX_EXTERN IfxPort_Pin IfxPort_P41_1

IfxPort_P41_1.

Definition at line 332 of file IfxPort_PinMap.h.

◆ IfxPort_P41_2

IFX_EXTERN IfxPort_Pin IfxPort_P41_2

IfxPort_P41_2.

Definition at line 333 of file IfxPort_PinMap.h.

◆ IfxPort_P41_3

IFX_EXTERN IfxPort_Pin IfxPort_P41_3

IfxPort_P41_3.

Definition at line 334 of file IfxPort_PinMap.h.

◆ IfxPort_P41_4

IFX_EXTERN IfxPort_Pin IfxPort_P41_4

IfxPort_P41_4.

Definition at line 335 of file IfxPort_PinMap.h.

◆ IfxPort_P41_5

IFX_EXTERN IfxPort_Pin IfxPort_P41_5

IfxPort_P41_5.

Definition at line 336 of file IfxPort_PinMap.h.

◆ IfxPort_P41_6

IFX_EXTERN IfxPort_Pin IfxPort_P41_6

IfxPort_P41_6.

Definition at line 337 of file IfxPort_PinMap.h.

◆ IfxPort_P41_7

IFX_EXTERN IfxPort_Pin IfxPort_P41_7

IfxPort_P41_7.

Definition at line 338 of file IfxPort_PinMap.h.

◆ IfxPort_P41_8

IFX_EXTERN IfxPort_Pin IfxPort_P41_8

IfxPort_P41_8.

Definition at line 339 of file IfxPort_PinMap.h.

◆ IfxPort_Pin_pinTable

IFX_EXTERN const IfxPort_Pin* IfxPort_Pin_pinTable[IFXPORT_PINMAP_NUM_MODULES][IFXPORT_PINMAP_PIN_NUM_ITEMS]

IfxPort_Pin table.

Definition at line 347 of file IfxPort_PinMap.h.


iLLD_TC38A: How to use the PORT I/O driver?

How to use the PORT I/O driver?
iLLD » PORTS
Collaboration diagram for How to use the PORT I/O driver?:

The PORT I/O driver provides several functions to easily configure and read pins. The configuration includes input/output, mode, pad driver strength and state. For referencing the pins and their ports a IfxPort_PinMap is available as well.

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Port/Io/IfxPort_Io.h>

Conifguration Table

Specify the used pins, their modes and (for outputs) the pad driver strength:
Note: For inputs the pad driver strength is only a dummy.

const IfxPort_Io_ConfigPin configPin[] = {
{&IfxPort_P00_0, IfxPort_Mode_inputPullDown, IfxPort_PadDriver_cmosAutomotiveSpeed1}, // P00.0
{&IfxPort_P33_0, IfxPort_Mode_outputPushPullGeneral, IfxPort_PadDriver_cmosAutomotiveSpeed1}, // P33.0
};

Note: the IfxPort_* pins are defined in IfxPort_PinMap

Port Initialisation

Assemble the final configuration structure:

const IfxPort_Io_Config conf = {
sizeof(configPin)/sizeof(IfxPort_Io_ConfigPin),
(IfxPort_Io_ConfigPin *)configPin
};

Call the initialisation function:

IfxPort_Io_initModule(&conf);

Now the pins are configured as specified.

Misc. Functions of the Standard Layer

Pin Mode Configuration

Generally, you can use one function for both inputs and outputs to set the desired mode.

// configure P33.0 as general output
IfxPort_setPinMode(&MODULE_P33, 0, IfxPort_Mode_outputPushPullGeneral);

For inputs use the IfxPort_setPinModeInput function:

// configure P33.0 as input with pullUp
IfxPort_setPinModeInput(&MODULE_P33, 0, IfxPort_InputMode_pullUp);

For outputs use the IfxPort_setModeOutput function:

// configure P33.0 as output in general pushPull mode
IfxPort_setPinModeOutput(&MODULE_P33, 0, IfxPort_OutputMode_pushPull, IfxPort_OutputIdx_general);

If the pin is an output, the pad driver should be configured as well:

IfxPort_setPinPadDriver(&MODULE_P33, 0, IfxPort_PadDriver_cmosAutomotiveSpeed1);

Reading Input State

Read the state of a single pin:

uint8 state = IfxPort_getPinState(&MODULE_P33, 0); // read P33.0

Setting Output State

Generally, you can use one function to set an output pin high or low or to toggle it.

IfxPort_setPinState(&MODULE_P33, 0, IfxPort_State_toggled); // toggle P33.0

An output pin can be set high as following:

IfxPort_setPinHigh(&MODULE_P33, 0); // P33.0 = 1

An output pin can be set low as following:

IfxPort_setPinLow(&MODULE_P33, 0); // P33.0 = 0

Configure Emergency Function

Enable emergency stop for P33.0:

IfxPort_enableEmergencyStop(&MODULE_P33, 0);

The driver also provides a function to disable this feature.


iLLD_TC38A: Interface Driver

Modules
Interface Driver
iLLD » PORTS
Collaboration diagram for Interface Driver:

Modules

Data Structures
Module Functions

Detailed Description


iLLD_TC38A: Data Structures

Data Structures
Data Structures
iLLD » PORTS » Interface Driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxPort_Io_ConfigPin
struct | IfxPort_Io_Config

Detailed Description

Data Structure Documentation

◆ IfxPort_Io_ConfigPin

struct IfxPort_Io_ConfigPin

Definition at line 176 of file IfxPort_Io.h.

Collaboration diagram for IfxPort_Io_ConfigPin:
[legend]
Data Fields
IfxPort_Mode | mode
IfxPort_PadDriver | padDriver
IFX_CONST IfxPort_Pin * | pin

◆ IfxPort_Io_Config

struct IfxPort_Io_Config

Definition at line 187 of file IfxPort_Io.h.

Collaboration diagram for IfxPort_Io_Config:
[legend]
Data Fields
IfxPort_Io_ConfigPin * | pinTable
uint32 | size


iLLD_TC38A: Module Functions

Functions
Module Functions
iLLD » PORTS » Interface Driver
Collaboration diagram for Module Functions:

Functions

IFX_EXTERN void IfxPort_Io_initModule (const IfxPort_Io_Config *config)

Detailed Description

Function Documentation

◆ IfxPort_Io_initModule()

IFX_EXTERN void IfxPort_Io_initModule ( const IfxPort_Io_Config * config )
Returns
None

Definition at line 52 of file IfxPort_Io.c.


iLLD_TC38A: IfxPort_cfg.h File Reference

  • _Impl
Data Structures | Macros | Enumerations | Variables
IfxPort_cfg.h File Reference
iLLD » PORTS

PORT on-chip implementation data. More...

#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "IfxPort_reg.h"
Include dependency graph for IfxPort_cfg.h:

Go to the source code of this file.

Data Structures

struct IfxPort_Esr_Masks
used by IfxPort_Esr_Masks table More...

Macros

#define | IFXPORT_NUM_MODULES (23)
Port count. More...
#define | IFXPORT_OUTOUTFEATURE_NONE (0xFFFFFFFF)

Enumerations

enum IfxPort_Index {
IfxPort_Index_00 = 0,
IfxPort_Index_01 = 1,
IfxPort_Index_02 = 2,
IfxPort_Index_10 = 10,
IfxPort_Index_11 = 11,
IfxPort_Index_12 = 12,
IfxPort_Index_13 = 13,
IfxPort_Index_14 = 14,
IfxPort_Index_15 = 15,
IfxPort_Index_20 = 20,
IfxPort_Index_21 = 21,
IfxPort_Index_22 = 22,
IfxPort_Index_23 = 23,
IfxPort_Index_24 = 24,
IfxPort_Index_25 = 25,
IfxPort_Index_26 = 26,
IfxPort_Index_30 = 30,
IfxPort_Index_31 = 31,
IfxPort_Index_32 = 32,
IfxPort_Index_33 = 33,
IfxPort_Index_34 = 34,
IfxPort_Index_40 = 40,
IfxPort_Index_41 = 41,
IfxPort_Index_none = -1
}
List of the available Port resources. More...

Variables

IFX_EXTERN IFX_CONST IfxPort_Esr_Masks IfxPort_cfg_esrMasks [IFXPORT_NUM_MODULES]
IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxPort_cfg_indexMap [IFXPORT_NUM_MODULES]

Detailed Description

PORT on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPort_cfg.h.

Data Structure Documentation

◆ IfxPort_Esr_Masks

struct IfxPort_Esr_Masks

used by IfxPort_Esr_Masks table

Definition at line 110 of file IfxPort_cfg.h.

Data Fields
uint16 | masks
Ifx_P * | port

Macro Definition Documentation

◆ IFXPORT_NUM_MODULES

#define IFXPORT_NUM_MODULES (23)

Port count.

Definition at line 66 of file IfxPort_cfg.h.

Referenced by IfxPort_disableEmergencyStop(), IfxPort_enableEmergencyStop(), IfxPort_getAddress(), and IfxPort_getIndex().

◆ IFXPORT_OUTOUTFEATURE_NONE

#define IFXPORT_OUTOUTFEATURE_NONE (0xFFFFFFFF)

Definition at line 68 of file IfxPort_cfg.h.

Enumeration Type Documentation

◆ IfxPort_Index

enum IfxPort_Index

List of the available Port resources.

Enumerator
IfxPort_Index_00 | PORT 00.
IfxPort_Index_01 | PORT 01.
IfxPort_Index_02 | PORT 02.
IfxPort_Index_10 | PORT 10.
IfxPort_Index_11 | PORT 11.
IfxPort_Index_12 | PORT 12.
IfxPort_Index_13 | PORT 13.
IfxPort_Index_14 | PORT 14.
IfxPort_Index_15 | PORT 15.
IfxPort_Index_20 | PORT 20.
IfxPort_Index_21 | PORT 21.
IfxPort_Index_22 | PORT 22.
IfxPort_Index_23 | PORT 23.
IfxPort_Index_24 | PORT 24.
IfxPort_Index_25 | PORT 25.
IfxPort_Index_26 | PORT 26.
IfxPort_Index_30 | PORT 30.
IfxPort_Index_31 | PORT 31.
IfxPort_Index_32 | PORT 32.
IfxPort_Index_33 | PORT 33.
IfxPort_Index_34 | PORT 34.
IfxPort_Index_40 | PORT 40.
IfxPort_Index_41 | PORT 41.
IfxPort_Index_none | none

Definition at line 76 of file IfxPort_cfg.h.

Variable Documentation

◆ IfxPort_cfg_esrMasks

IFX_EXTERN IFX_CONST IfxPort_Esr_Masks IfxPort_cfg_esrMasks[IFXPORT_NUM_MODULES]

Definition at line 120 of file IfxPort_cfg.h.

◆ IfxPort_cfg_indexMap

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxPort_cfg_indexMap[IFXPORT_NUM_MODULES]

Definition at line 122 of file IfxPort_cfg.h.


iLLD_TC38A: IfxPort_PinMap.c File Reference

  • _PinMap
Variables
IfxPort_PinMap.c File Reference
iLLD » PORTS

PORT I/O map. More...

#include "IfxPort_PinMap.h"
Include dependency graph for IfxPort_PinMap.c:

Go to the source code of this file.

Variables

IfxPort_Pin | IfxPort_P00_0 = {&MODULE_P00, 0}
IfxPort_Pin | IfxPort_P00_1 = {&MODULE_P00, 1}
IfxPort_Pin | IfxPort_P00_10 = {&MODULE_P00,10}
IfxPort_Pin | IfxPort_P00_11 = {&MODULE_P00,11}
IfxPort_Pin | IfxPort_P00_12 = {&MODULE_P00,12}
IfxPort_Pin | IfxPort_P00_13 = {&MODULE_P00,13}
IfxPort_Pin | IfxPort_P00_14 = {&MODULE_P00,14}
IfxPort_Pin | IfxPort_P00_15 = {&MODULE_P00,15}
IfxPort_Pin | IfxPort_P00_2 = {&MODULE_P00, 2}
IfxPort_Pin | IfxPort_P00_3 = {&MODULE_P00, 3}
IfxPort_Pin | IfxPort_P00_4 = {&MODULE_P00, 4}
IfxPort_Pin | IfxPort_P00_5 = {&MODULE_P00, 5}
IfxPort_Pin | IfxPort_P00_6 = {&MODULE_P00, 6}
IfxPort_Pin | IfxPort_P00_7 = {&MODULE_P00, 7}
IfxPort_Pin | IfxPort_P00_8 = {&MODULE_P00, 8}
IfxPort_Pin | IfxPort_P00_9 = {&MODULE_P00, 9}
IfxPort_Pin | IfxPort_P01_0 = {&MODULE_P01, 0}
IfxPort_Pin | IfxPort_P01_1 = {&MODULE_P01, 1}
IfxPort_Pin | IfxPort_P01_10 = {&MODULE_P01,10}
IfxPort_Pin | IfxPort_P01_11 = {&MODULE_P01,11}
IfxPort_Pin | IfxPort_P01_12 = {&MODULE_P01,12}
IfxPort_Pin | IfxPort_P01_13 = {&MODULE_P01,13}
IfxPort_Pin | IfxPort_P01_14 = {&MODULE_P01,14}
IfxPort_Pin | IfxPort_P01_15 = {&MODULE_P01,15}
IfxPort_Pin | IfxPort_P01_2 = {&MODULE_P01, 2}
IfxPort_Pin | IfxPort_P01_3 = {&MODULE_P01, 3}
IfxPort_Pin | IfxPort_P01_4 = {&MODULE_P01, 4}
IfxPort_Pin | IfxPort_P01_5 = {&MODULE_P01, 5}
IfxPort_Pin | IfxPort_P01_6 = {&MODULE_P01, 6}
IfxPort_Pin | IfxPort_P01_7 = {&MODULE_P01, 7}
IfxPort_Pin | IfxPort_P01_8 = {&MODULE_P01, 8}
IfxPort_Pin | IfxPort_P01_9 = {&MODULE_P01, 9}
IfxPort_Pin | IfxPort_P02_0 = {&MODULE_P02, 0}
IfxPort_Pin | IfxPort_P02_1 = {&MODULE_P02, 1}
IfxPort_Pin | IfxPort_P02_10 = {&MODULE_P02,10}
IfxPort_Pin | IfxPort_P02_11 = {&MODULE_P02,11}
IfxPort_Pin | IfxPort_P02_12 = {&MODULE_P02,12}
IfxPort_Pin | IfxPort_P02_13 = {&MODULE_P02,13}
IfxPort_Pin | IfxPort_P02_14 = {&MODULE_P02,14}
IfxPort_Pin | IfxPort_P02_15 = {&MODULE_P02,15}
IfxPort_Pin | IfxPort_P02_2 = {&MODULE_P02, 2}
IfxPort_Pin | IfxPort_P02_3 = {&MODULE_P02, 3}
IfxPort_Pin | IfxPort_P02_4 = {&MODULE_P02, 4}
IfxPort_Pin | IfxPort_P02_5 = {&MODULE_P02, 5}
IfxPort_Pin | IfxPort_P02_6 = {&MODULE_P02, 6}
IfxPort_Pin | IfxPort_P02_7 = {&MODULE_P02, 7}
IfxPort_Pin | IfxPort_P02_8 = {&MODULE_P02, 8}
IfxPort_Pin | IfxPort_P02_9 = {&MODULE_P02, 9}
IfxPort_Pin | IfxPort_P10_0 = {&MODULE_P10, 0}
IfxPort_Pin | IfxPort_P10_1 = {&MODULE_P10, 1}
IfxPort_Pin | IfxPort_P10_10 = {&MODULE_P10,10}
IfxPort_Pin | IfxPort_P10_11 = {&MODULE_P10,11}
IfxPort_Pin | IfxPort_P10_13 = {&MODULE_P10,13}
IfxPort_Pin | IfxPort_P10_14 = {&MODULE_P10,14}
IfxPort_Pin | IfxPort_P10_15 = {&MODULE_P10,15}
IfxPort_Pin | IfxPort_P10_2 = {&MODULE_P10, 2}
IfxPort_Pin | IfxPort_P10_3 = {&MODULE_P10, 3}
IfxPort_Pin | IfxPort_P10_4 = {&MODULE_P10, 4}
IfxPort_Pin | IfxPort_P10_5 = {&MODULE_P10, 5}
IfxPort_Pin | IfxPort_P10_6 = {&MODULE_P10, 6}
IfxPort_Pin | IfxPort_P10_7 = {&MODULE_P10, 7}
IfxPort_Pin | IfxPort_P10_8 = {&MODULE_P10, 8}
IfxPort_Pin | IfxPort_P10_9 = {&MODULE_P10, 9}
IfxPort_Pin | IfxPort_P11_0 = {&MODULE_P11, 0}
IfxPort_Pin | IfxPort_P11_1 = {&MODULE_P11, 1}
IfxPort_Pin | IfxPort_P11_10 = {&MODULE_P11,10}
IfxPort_Pin | IfxPort_P11_11 = {&MODULE_P11,11}
IfxPort_Pin | IfxPort_P11_12 = {&MODULE_P11,12}
IfxPort_Pin | IfxPort_P11_13 = {&MODULE_P11,13}
IfxPort_Pin | IfxPort_P11_14 = {&MODULE_P11,14}
IfxPort_Pin | IfxPort_P11_15 = {&MODULE_P11,15}
IfxPort_Pin | IfxPort_P11_2 = {&MODULE_P11, 2}
IfxPort_Pin | IfxPort_P11_3 = {&MODULE_P11, 3}
IfxPort_Pin | IfxPort_P11_4 = {&MODULE_P11, 4}
IfxPort_Pin | IfxPort_P11_5 = {&MODULE_P11, 5}
IfxPort_Pin | IfxPort_P11_6 = {&MODULE_P11, 6}
IfxPort_Pin | IfxPort_P11_7 = {&MODULE_P11, 7}
IfxPort_Pin | IfxPort_P11_8 = {&MODULE_P11, 8}
IfxPort_Pin | IfxPort_P11_9 = {&MODULE_P11, 9}
IfxPort_Pin | IfxPort_P12_0 = {&MODULE_P12, 0}
IfxPort_Pin | IfxPort_P12_1 = {&MODULE_P12, 1}
IfxPort_Pin | IfxPort_P13_0 = {&MODULE_P13, 0}
IfxPort_Pin | IfxPort_P13_1 = {&MODULE_P13, 1}
IfxPort_Pin | IfxPort_P13_10 = {&MODULE_P13,10}
IfxPort_Pin | IfxPort_P13_11 = {&MODULE_P13,11}
IfxPort_Pin | IfxPort_P13_12 = {&MODULE_P13,12}
IfxPort_Pin | IfxPort_P13_13 = {&MODULE_P13,13}
IfxPort_Pin | IfxPort_P13_14 = {&MODULE_P13,14}
IfxPort_Pin | IfxPort_P13_15 = {&MODULE_P13,15}
IfxPort_Pin | IfxPort_P13_2 = {&MODULE_P13, 2}
IfxPort_Pin | IfxPort_P13_3 = {&MODULE_P13, 3}
IfxPort_Pin | IfxPort_P13_4 = {&MODULE_P13, 4}
IfxPort_Pin | IfxPort_P13_5 = {&MODULE_P13, 5}
IfxPort_Pin | IfxPort_P13_6 = {&MODULE_P13, 6}
IfxPort_Pin | IfxPort_P13_7 = {&MODULE_P13, 7}
IfxPort_Pin | IfxPort_P13_9 = {&MODULE_P13, 9}
IfxPort_Pin | IfxPort_P14_0 = {&MODULE_P14, 0}
IfxPort_Pin | IfxPort_P14_1 = {&MODULE_P14, 1}
IfxPort_Pin | IfxPort_P14_10 = {&MODULE_P14,10}
IfxPort_Pin | IfxPort_P14_11 = {&MODULE_P14,11}
IfxPort_Pin | IfxPort_P14_12 = {&MODULE_P14,12}
IfxPort_Pin | IfxPort_P14_13 = {&MODULE_P14,13}
IfxPort_Pin | IfxPort_P14_14 = {&MODULE_P14,14}
IfxPort_Pin | IfxPort_P14_15 = {&MODULE_P14,15}
IfxPort_Pin | IfxPort_P14_2 = {&MODULE_P14, 2}
IfxPort_Pin | IfxPort_P14_3 = {&MODULE_P14, 3}
IfxPort_Pin | IfxPort_P14_4 = {&MODULE_P14, 4}
IfxPort_Pin | IfxPort_P14_5 = {&MODULE_P14, 5}
IfxPort_Pin | IfxPort_P14_6 = {&MODULE_P14, 6}
IfxPort_Pin | IfxPort_P14_7 = {&MODULE_P14, 7}
IfxPort_Pin | IfxPort_P14_8 = {&MODULE_P14, 8}
IfxPort_Pin | IfxPort_P14_9 = {&MODULE_P14, 9}
IfxPort_Pin | IfxPort_P15_0 = {&MODULE_P15, 0}
IfxPort_Pin | IfxPort_P15_1 = {&MODULE_P15, 1}
IfxPort_Pin | IfxPort_P15_10 = {&MODULE_P15,10}
IfxPort_Pin | IfxPort_P15_11 = {&MODULE_P15,11}
IfxPort_Pin | IfxPort_P15_12 = {&MODULE_P15,12}
IfxPort_Pin | IfxPort_P15_13 = {&MODULE_P15,13}
IfxPort_Pin | IfxPort_P15_14 = {&MODULE_P15,14}
IfxPort_Pin | IfxPort_P15_15 = {&MODULE_P15,15}
IfxPort_Pin | IfxPort_P15_2 = {&MODULE_P15, 2}
IfxPort_Pin | IfxPort_P15_3 = {&MODULE_P15, 3}
IfxPort_Pin | IfxPort_P15_4 = {&MODULE_P15, 4}
IfxPort_Pin | IfxPort_P15_5 = {&MODULE_P15, 5}
IfxPort_Pin | IfxPort_P15_6 = {&MODULE_P15, 6}
IfxPort_Pin | IfxPort_P15_7 = {&MODULE_P15, 7}
IfxPort_Pin | IfxPort_P15_8 = {&MODULE_P15, 8}
IfxPort_Pin | IfxPort_P20_0 = {&MODULE_P20, 0}
IfxPort_Pin | IfxPort_P20_1 = {&MODULE_P20, 1}
IfxPort_Pin | IfxPort_P20_10 = {&MODULE_P20,10}
IfxPort_Pin | IfxPort_P20_11 = {&MODULE_P20,11}
IfxPort_Pin | IfxPort_P20_12 = {&MODULE_P20,12}
IfxPort_Pin | IfxPort_P20_13 = {&MODULE_P20,13}
IfxPort_Pin | IfxPort_P20_14 = {&MODULE_P20,14}
IfxPort_Pin | IfxPort_P20_3 = {&MODULE_P20, 3}
IfxPort_Pin | IfxPort_P20_6 = {&MODULE_P20, 6}
IfxPort_Pin | IfxPort_P20_7 = {&MODULE_P20, 7}
IfxPort_Pin | IfxPort_P20_8 = {&MODULE_P20, 8}
IfxPort_Pin | IfxPort_P20_9 = {&MODULE_P20, 9}
IfxPort_Pin | IfxPort_P21_0 = {&MODULE_P21, 0}
IfxPort_Pin | IfxPort_P21_1 = {&MODULE_P21, 1}
IfxPort_Pin | IfxPort_P21_2 = {&MODULE_P21, 2}
IfxPort_Pin | IfxPort_P21_3 = {&MODULE_P21, 3}
IfxPort_Pin | IfxPort_P21_4 = {&MODULE_P21, 4}
IfxPort_Pin | IfxPort_P21_5 = {&MODULE_P21, 5}
IfxPort_Pin | IfxPort_P21_6 = {&MODULE_P21, 6}
IfxPort_Pin | IfxPort_P21_7 = {&MODULE_P21, 7}
IfxPort_Pin | IfxPort_P22_0 = {&MODULE_P22, 0}
IfxPort_Pin | IfxPort_P22_1 = {&MODULE_P22, 1}
IfxPort_Pin | IfxPort_P22_10 = {&MODULE_P22,10}
IfxPort_Pin | IfxPort_P22_11 = {&MODULE_P22,11}
IfxPort_Pin | IfxPort_P22_2 = {&MODULE_P22, 2}
IfxPort_Pin | IfxPort_P22_3 = {&MODULE_P22, 3}
IfxPort_Pin | IfxPort_P22_4 = {&MODULE_P22, 4}
IfxPort_Pin | IfxPort_P22_5 = {&MODULE_P22, 5}
IfxPort_Pin | IfxPort_P22_6 = {&MODULE_P22, 6}
IfxPort_Pin | IfxPort_P22_7 = {&MODULE_P22, 7}
IfxPort_Pin | IfxPort_P22_8 = {&MODULE_P22, 8}
IfxPort_Pin | IfxPort_P22_9 = {&MODULE_P22, 9}
IfxPort_Pin | IfxPort_P23_0 = {&MODULE_P23, 0}
IfxPort_Pin | IfxPort_P23_1 = {&MODULE_P23, 1}
IfxPort_Pin | IfxPort_P23_2 = {&MODULE_P23, 2}
IfxPort_Pin | IfxPort_P23_3 = {&MODULE_P23, 3}
IfxPort_Pin | IfxPort_P23_4 = {&MODULE_P23, 4}
IfxPort_Pin | IfxPort_P23_5 = {&MODULE_P23, 5}
IfxPort_Pin | IfxPort_P23_6 = {&MODULE_P23, 6}
IfxPort_Pin | IfxPort_P23_7 = {&MODULE_P23, 7}
IfxPort_Pin | IfxPort_P24_0 = {&MODULE_P24, 0}
IfxPort_Pin | IfxPort_P24_1 = {&MODULE_P24, 1}
IfxPort_Pin | IfxPort_P24_10 = {&MODULE_P24,10}
IfxPort_Pin | IfxPort_P24_11 = {&MODULE_P24,11}
IfxPort_Pin | IfxPort_P24_12 = {&MODULE_P24,12}
IfxPort_Pin | IfxPort_P24_13 = {&MODULE_P24,13}
IfxPort_Pin | IfxPort_P24_14 = {&MODULE_P24,14}
IfxPort_Pin | IfxPort_P24_15 = {&MODULE_P24,15}
IfxPort_Pin | IfxPort_P24_2 = {&MODULE_P24, 2}
IfxPort_Pin | IfxPort_P24_3 = {&MODULE_P24, 3}
IfxPort_Pin | IfxPort_P24_4 = {&MODULE_P24, 4}
IfxPort_Pin | IfxPort_P24_5 = {&MODULE_P24, 5}
IfxPort_Pin | IfxPort_P24_6 = {&MODULE_P24, 6}
IfxPort_Pin | IfxPort_P24_7 = {&MODULE_P24, 7}
IfxPort_Pin | IfxPort_P24_8 = {&MODULE_P24, 8}
IfxPort_Pin | IfxPort_P24_9 = {&MODULE_P24, 9}
IfxPort_Pin | IfxPort_P25_0 = {&MODULE_P25, 0}
IfxPort_Pin | IfxPort_P25_1 = {&MODULE_P25, 1}
IfxPort_Pin | IfxPort_P25_10 = {&MODULE_P25,10}
IfxPort_Pin | IfxPort_P25_11 = {&MODULE_P25,11}
IfxPort_Pin | IfxPort_P25_12 = {&MODULE_P25,12}
IfxPort_Pin | IfxPort_P25_13 = {&MODULE_P25,13}
IfxPort_Pin | IfxPort_P25_14 = {&MODULE_P25,14}
IfxPort_Pin | IfxPort_P25_15 = {&MODULE_P25,15}
IfxPort_Pin | IfxPort_P25_2 = {&MODULE_P25, 2}
IfxPort_Pin | IfxPort_P25_3 = {&MODULE_P25, 3}
IfxPort_Pin | IfxPort_P25_4 = {&MODULE_P25, 4}
IfxPort_Pin | IfxPort_P25_5 = {&MODULE_P25, 5}
IfxPort_Pin | IfxPort_P25_6 = {&MODULE_P25, 6}
IfxPort_Pin | IfxPort_P25_7 = {&MODULE_P25, 7}
IfxPort_Pin | IfxPort_P25_8 = {&MODULE_P25, 8}
IfxPort_Pin | IfxPort_P25_9 = {&MODULE_P25, 9}
IfxPort_Pin | IfxPort_P26_0 = {&MODULE_P26, 0}
IfxPort_Pin | IfxPort_P30_0 = {&MODULE_P30, 0}
IfxPort_Pin | IfxPort_P30_1 = {&MODULE_P30, 1}
IfxPort_Pin | IfxPort_P30_10 = {&MODULE_P30,10}
IfxPort_Pin | IfxPort_P30_11 = {&MODULE_P30,11}
IfxPort_Pin | IfxPort_P30_12 = {&MODULE_P30,12}
IfxPort_Pin | IfxPort_P30_13 = {&MODULE_P30,13}
IfxPort_Pin | IfxPort_P30_14 = {&MODULE_P30,14}
IfxPort_Pin | IfxPort_P30_15 = {&MODULE_P30,15}
IfxPort_Pin | IfxPort_P30_2 = {&MODULE_P30, 2}
IfxPort_Pin | IfxPort_P30_3 = {&MODULE_P30, 3}
IfxPort_Pin | IfxPort_P30_4 = {&MODULE_P30, 4}
IfxPort_Pin | IfxPort_P30_5 = {&MODULE_P30, 5}
IfxPort_Pin | IfxPort_P30_6 = {&MODULE_P30, 6}
IfxPort_Pin | IfxPort_P30_7 = {&MODULE_P30, 7}
IfxPort_Pin | IfxPort_P30_8 = {&MODULE_P30, 8}
IfxPort_Pin | IfxPort_P30_9 = {&MODULE_P30, 9}
IfxPort_Pin | IfxPort_P31_0 = {&MODULE_P31, 0}
IfxPort_Pin | IfxPort_P31_1 = {&MODULE_P31, 1}
IfxPort_Pin | IfxPort_P31_10 = {&MODULE_P31,10}
IfxPort_Pin | IfxPort_P31_11 = {&MODULE_P31,11}
IfxPort_Pin | IfxPort_P31_12 = {&MODULE_P31,12}
IfxPort_Pin | IfxPort_P31_13 = {&MODULE_P31,13}
IfxPort_Pin | IfxPort_P31_14 = {&MODULE_P31,14}
IfxPort_Pin | IfxPort_P31_15 = {&MODULE_P31,15}
IfxPort_Pin | IfxPort_P31_2 = {&MODULE_P31, 2}
IfxPort_Pin | IfxPort_P31_3 = {&MODULE_P31, 3}
IfxPort_Pin | IfxPort_P31_4 = {&MODULE_P31, 4}
IfxPort_Pin | IfxPort_P31_5 = {&MODULE_P31, 5}
IfxPort_Pin | IfxPort_P31_6 = {&MODULE_P31, 6}
IfxPort_Pin | IfxPort_P31_7 = {&MODULE_P31, 7}
IfxPort_Pin | IfxPort_P31_8 = {&MODULE_P31, 8}
IfxPort_Pin | IfxPort_P31_9 = {&MODULE_P31, 9}
IfxPort_Pin | IfxPort_P32_0 = {&MODULE_P32, 0}
IfxPort_Pin | IfxPort_P32_1 = {&MODULE_P32, 1}
IfxPort_Pin | IfxPort_P32_2 = {&MODULE_P32, 2}
IfxPort_Pin | IfxPort_P32_3 = {&MODULE_P32, 3}
IfxPort_Pin | IfxPort_P32_4 = {&MODULE_P32, 4}
IfxPort_Pin | IfxPort_P32_5 = {&MODULE_P32, 5}
IfxPort_Pin | IfxPort_P32_6 = {&MODULE_P32, 6}
IfxPort_Pin | IfxPort_P32_7 = {&MODULE_P32, 7}
IfxPort_Pin | IfxPort_P33_0 = {&MODULE_P33, 0}
IfxPort_Pin | IfxPort_P33_1 = {&MODULE_P33, 1}
IfxPort_Pin | IfxPort_P33_10 = {&MODULE_P33,10}
IfxPort_Pin | IfxPort_P33_11 = {&MODULE_P33,11}
IfxPort_Pin | IfxPort_P33_12 = {&MODULE_P33,12}
IfxPort_Pin | IfxPort_P33_13 = {&MODULE_P33,13}
IfxPort_Pin | IfxPort_P33_14 = {&MODULE_P33,14}
IfxPort_Pin | IfxPort_P33_15 = {&MODULE_P33,15}
IfxPort_Pin | IfxPort_P33_2 = {&MODULE_P33, 2}
IfxPort_Pin | IfxPort_P33_3 = {&MODULE_P33, 3}
IfxPort_Pin | IfxPort_P33_4 = {&MODULE_P33, 4}
IfxPort_Pin | IfxPort_P33_5 = {&MODULE_P33, 5}
IfxPort_Pin | IfxPort_P33_6 = {&MODULE_P33, 6}
IfxPort_Pin | IfxPort_P33_7 = {&MODULE_P33, 7}
IfxPort_Pin | IfxPort_P33_8 = {&MODULE_P33, 8}
IfxPort_Pin | IfxPort_P33_9 = {&MODULE_P33, 9}
IfxPort_Pin | IfxPort_P34_1 = {&MODULE_P34, 1}
IfxPort_Pin | IfxPort_P34_2 = {&MODULE_P34, 2}
IfxPort_Pin | IfxPort_P34_3 = {&MODULE_P34, 3}
IfxPort_Pin | IfxPort_P34_4 = {&MODULE_P34, 4}
IfxPort_Pin | IfxPort_P34_5 = {&MODULE_P34, 5}
IfxPort_Pin | IfxPort_P40_0 = {&MODULE_P40, 0}
IfxPort_Pin | IfxPort_P40_1 = {&MODULE_P40, 1}
IfxPort_Pin | IfxPort_P40_10 = {&MODULE_P40,10}
IfxPort_Pin | IfxPort_P40_11 = {&MODULE_P40,11}
IfxPort_Pin | IfxPort_P40_12 = {&MODULE_P40,12}
IfxPort_Pin | IfxPort_P40_13 = {&MODULE_P40,13}
IfxPort_Pin | IfxPort_P40_14 = {&MODULE_P40,14}
IfxPort_Pin | IfxPort_P40_15 = {&MODULE_P40,15}
IfxPort_Pin | IfxPort_P40_2 = {&MODULE_P40, 2}
IfxPort_Pin | IfxPort_P40_3 = {&MODULE_P40, 3}
IfxPort_Pin | IfxPort_P40_4 = {&MODULE_P40, 4}
IfxPort_Pin | IfxPort_P40_5 = {&MODULE_P40, 5}
IfxPort_Pin | IfxPort_P40_6 = {&MODULE_P40, 6}
IfxPort_Pin | IfxPort_P40_7 = {&MODULE_P40, 7}
IfxPort_Pin | IfxPort_P40_8 = {&MODULE_P40, 8}
IfxPort_Pin | IfxPort_P40_9 = {&MODULE_P40, 9}
IfxPort_Pin | IfxPort_P41_0 = {&MODULE_P41, 0}
IfxPort_Pin | IfxPort_P41_1 = {&MODULE_P41, 1}
IfxPort_Pin | IfxPort_P41_2 = {&MODULE_P41, 2}
IfxPort_Pin | IfxPort_P41_3 = {&MODULE_P41, 3}
IfxPort_Pin | IfxPort_P41_4 = {&MODULE_P41, 4}
IfxPort_Pin | IfxPort_P41_5 = {&MODULE_P41, 5}
IfxPort_Pin | IfxPort_P41_6 = {&MODULE_P41, 6}
IfxPort_Pin | IfxPort_P41_7 = {&MODULE_P41, 7}
IfxPort_Pin | IfxPort_P41_8 = {&MODULE_P41, 8}
const IfxPort_Pin * | IfxPort_Pin_pinTable [IFXPORT_PINMAP_NUM_MODULES][IFXPORT_PINMAP_PIN_NUM_ITEMS]

Detailed Description

PORT I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPort_PinMap.c.

Variable Documentation

◆ IfxPort_P00_0

IfxPort_Pin IfxPort_P00_0 = {&MODULE_P00, 0}

Definition at line 45 of file IfxPort_PinMap.c.

◆ IfxPort_P00_1

IfxPort_Pin IfxPort_P00_1 = {&MODULE_P00, 1}

Definition at line 46 of file IfxPort_PinMap.c.

◆ IfxPort_P00_10

IfxPort_Pin IfxPort_P00_10 = {&MODULE_P00,10}

Definition at line 47 of file IfxPort_PinMap.c.

◆ IfxPort_P00_11

IfxPort_Pin IfxPort_P00_11 = {&MODULE_P00,11}

Definition at line 48 of file IfxPort_PinMap.c.

◆ IfxPort_P00_12

IfxPort_Pin IfxPort_P00_12 = {&MODULE_P00,12}

Definition at line 49 of file IfxPort_PinMap.c.

◆ IfxPort_P00_13

IfxPort_Pin IfxPort_P00_13 = {&MODULE_P00,13}

Definition at line 50 of file IfxPort_PinMap.c.

◆ IfxPort_P00_14

IfxPort_Pin IfxPort_P00_14 = {&MODULE_P00,14}

Definition at line 51 of file IfxPort_PinMap.c.

◆ IfxPort_P00_15

IfxPort_Pin IfxPort_P00_15 = {&MODULE_P00,15}

Definition at line 52 of file IfxPort_PinMap.c.

◆ IfxPort_P00_2

IfxPort_Pin IfxPort_P00_2 = {&MODULE_P00, 2}

Definition at line 53 of file IfxPort_PinMap.c.

◆ IfxPort_P00_3

IfxPort_Pin IfxPort_P00_3 = {&MODULE_P00, 3}

Definition at line 54 of file IfxPort_PinMap.c.

◆ IfxPort_P00_4

IfxPort_Pin IfxPort_P00_4 = {&MODULE_P00, 4}

Definition at line 55 of file IfxPort_PinMap.c.

◆ IfxPort_P00_5

IfxPort_Pin IfxPort_P00_5 = {&MODULE_P00, 5}

Definition at line 56 of file IfxPort_PinMap.c.

◆ IfxPort_P00_6

IfxPort_Pin IfxPort_P00_6 = {&MODULE_P00, 6}

Definition at line 57 of file IfxPort_PinMap.c.

◆ IfxPort_P00_7

IfxPort_Pin IfxPort_P00_7 = {&MODULE_P00, 7}

Definition at line 58 of file IfxPort_PinMap.c.

◆ IfxPort_P00_8

IfxPort_Pin IfxPort_P00_8 = {&MODULE_P00, 8}

Definition at line 59 of file IfxPort_PinMap.c.

◆ IfxPort_P00_9

IfxPort_Pin IfxPort_P00_9 = {&MODULE_P00, 9}

Definition at line 60 of file IfxPort_PinMap.c.

◆ IfxPort_P01_0

IfxPort_Pin IfxPort_P01_0 = {&MODULE_P01, 0}

Definition at line 61 of file IfxPort_PinMap.c.

◆ IfxPort_P01_1

IfxPort_Pin IfxPort_P01_1 = {&MODULE_P01, 1}

Definition at line 62 of file IfxPort_PinMap.c.

◆ IfxPort_P01_10

IfxPort_Pin IfxPort_P01_10 = {&MODULE_P01,10}

Definition at line 63 of file IfxPort_PinMap.c.

◆ IfxPort_P01_11

IfxPort_Pin IfxPort_P01_11 = {&MODULE_P01,11}

Definition at line 64 of file IfxPort_PinMap.c.

◆ IfxPort_P01_12

IfxPort_Pin IfxPort_P01_12 = {&MODULE_P01,12}

Definition at line 65 of file IfxPort_PinMap.c.

◆ IfxPort_P01_13

IfxPort_Pin IfxPort_P01_13 = {&MODULE_P01,13}

Definition at line 66 of file IfxPort_PinMap.c.

◆ IfxPort_P01_14

IfxPort_Pin IfxPort_P01_14 = {&MODULE_P01,14}

Definition at line 67 of file IfxPort_PinMap.c.

◆ IfxPort_P01_15

IfxPort_Pin IfxPort_P01_15 = {&MODULE_P01,15}

Definition at line 68 of file IfxPort_PinMap.c.

◆ IfxPort_P01_2

IfxPort_Pin IfxPort_P01_2 = {&MODULE_P01, 2}

Definition at line 69 of file IfxPort_PinMap.c.

◆ IfxPort_P01_3

IfxPort_Pin IfxPort_P01_3 = {&MODULE_P01, 3}

Definition at line 70 of file IfxPort_PinMap.c.

◆ IfxPort_P01_4

IfxPort_Pin IfxPort_P01_4 = {&MODULE_P01, 4}

Definition at line 71 of file IfxPort_PinMap.c.

◆ IfxPort_P01_5

IfxPort_Pin IfxPort_P01_5 = {&MODULE_P01, 5}

Definition at line 72 of file IfxPort_PinMap.c.

◆ IfxPort_P01_6

IfxPort_Pin IfxPort_P01_6 = {&MODULE_P01, 6}

Definition at line 73 of file IfxPort_PinMap.c.

◆ IfxPort_P01_7

IfxPort_Pin IfxPort_P01_7 = {&MODULE_P01, 7}

Definition at line 74 of file IfxPort_PinMap.c.

◆ IfxPort_P01_8

IfxPort_Pin IfxPort_P01_8 = {&MODULE_P01, 8}

Definition at line 75 of file IfxPort_PinMap.c.

◆ IfxPort_P01_9

IfxPort_Pin IfxPort_P01_9 = {&MODULE_P01, 9}

Definition at line 76 of file IfxPort_PinMap.c.

◆ IfxPort_P02_0

IfxPort_Pin IfxPort_P02_0 = {&MODULE_P02, 0}

Definition at line 77 of file IfxPort_PinMap.c.

◆ IfxPort_P02_1

IfxPort_Pin IfxPort_P02_1 = {&MODULE_P02, 1}

Definition at line 78 of file IfxPort_PinMap.c.

◆ IfxPort_P02_10

IfxPort_Pin IfxPort_P02_10 = {&MODULE_P02,10}

Definition at line 79 of file IfxPort_PinMap.c.

◆ IfxPort_P02_11

IfxPort_Pin IfxPort_P02_11 = {&MODULE_P02,11}

Definition at line 80 of file IfxPort_PinMap.c.

◆ IfxPort_P02_12

IfxPort_Pin IfxPort_P02_12 = {&MODULE_P02,12}

Definition at line 81 of file IfxPort_PinMap.c.

◆ IfxPort_P02_13

IfxPort_Pin IfxPort_P02_13 = {&MODULE_P02,13}

Definition at line 82 of file IfxPort_PinMap.c.

◆ IfxPort_P02_14

IfxPort_Pin IfxPort_P02_14 = {&MODULE_P02,14}

Definition at line 83 of file IfxPort_PinMap.c.

◆ IfxPort_P02_15

IfxPort_Pin IfxPort_P02_15 = {&MODULE_P02,15}

Definition at line 84 of file IfxPort_PinMap.c.

◆ IfxPort_P02_2

IfxPort_Pin IfxPort_P02_2 = {&MODULE_P02, 2}

Definition at line 85 of file IfxPort_PinMap.c.

◆ IfxPort_P02_3

IfxPort_Pin IfxPort_P02_3 = {&MODULE_P02, 3}

Definition at line 86 of file IfxPort_PinMap.c.

◆ IfxPort_P02_4

IfxPort_Pin IfxPort_P02_4 = {&MODULE_P02, 4}

Definition at line 87 of file IfxPort_PinMap.c.

◆ IfxPort_P02_5

IfxPort_Pin IfxPort_P02_5 = {&MODULE_P02, 5}

Definition at line 88 of file IfxPort_PinMap.c.

◆ IfxPort_P02_6

IfxPort_Pin IfxPort_P02_6 = {&MODULE_P02, 6}

Definition at line 89 of file IfxPort_PinMap.c.

◆ IfxPort_P02_7

IfxPort_Pin IfxPort_P02_7 = {&MODULE_P02, 7}

Definition at line 90 of file IfxPort_PinMap.c.

◆ IfxPort_P02_8

IfxPort_Pin IfxPort_P02_8 = {&MODULE_P02, 8}

Definition at line 91 of file IfxPort_PinMap.c.

◆ IfxPort_P02_9

IfxPort_Pin IfxPort_P02_9 = {&MODULE_P02, 9}

Definition at line 92 of file IfxPort_PinMap.c.

◆ IfxPort_P10_0

IfxPort_Pin IfxPort_P10_0 = {&MODULE_P10, 0}

Definition at line 93 of file IfxPort_PinMap.c.

◆ IfxPort_P10_1

IfxPort_Pin IfxPort_P10_1 = {&MODULE_P10, 1}

Definition at line 94 of file IfxPort_PinMap.c.

◆ IfxPort_P10_10

IfxPort_Pin IfxPort_P10_10 = {&MODULE_P10,10}

Definition at line 95 of file IfxPort_PinMap.c.

◆ IfxPort_P10_11

IfxPort_Pin IfxPort_P10_11 = {&MODULE_P10,11}

Definition at line 96 of file IfxPort_PinMap.c.

◆ IfxPort_P10_13

IfxPort_Pin IfxPort_P10_13 = {&MODULE_P10,13}

Definition at line 97 of file IfxPort_PinMap.c.

◆ IfxPort_P10_14

IfxPort_Pin IfxPort_P10_14 = {&MODULE_P10,14}

Definition at line 98 of file IfxPort_PinMap.c.

◆ IfxPort_P10_15

IfxPort_Pin IfxPort_P10_15 = {&MODULE_P10,15}

Definition at line 99 of file IfxPort_PinMap.c.

◆ IfxPort_P10_2

IfxPort_Pin IfxPort_P10_2 = {&MODULE_P10, 2}

Definition at line 100 of file IfxPort_PinMap.c.

◆ IfxPort_P10_3

IfxPort_Pin IfxPort_P10_3 = {&MODULE_P10, 3}

Definition at line 101 of file IfxPort_PinMap.c.

◆ IfxPort_P10_4

IfxPort_Pin IfxPort_P10_4 = {&MODULE_P10, 4}

Definition at line 102 of file IfxPort_PinMap.c.

◆ IfxPort_P10_5

IfxPort_Pin IfxPort_P10_5 = {&MODULE_P10, 5}

Definition at line 103 of file IfxPort_PinMap.c.

◆ IfxPort_P10_6

IfxPort_Pin IfxPort_P10_6 = {&MODULE_P10, 6}

Definition at line 104 of file IfxPort_PinMap.c.

◆ IfxPort_P10_7

IfxPort_Pin IfxPort_P10_7 = {&MODULE_P10, 7}

Definition at line 105 of file IfxPort_PinMap.c.

◆ IfxPort_P10_8

IfxPort_Pin IfxPort_P10_8 = {&MODULE_P10, 8}

Definition at line 106 of file IfxPort_PinMap.c.

◆ IfxPort_P10_9

IfxPort_Pin IfxPort_P10_9 = {&MODULE_P10, 9}

Definition at line 107 of file IfxPort_PinMap.c.

◆ IfxPort_P11_0

IfxPort_Pin IfxPort_P11_0 = {&MODULE_P11, 0}

Definition at line 108 of file IfxPort_PinMap.c.

◆ IfxPort_P11_1

IfxPort_Pin IfxPort_P11_1 = {&MODULE_P11, 1}

Definition at line 109 of file IfxPort_PinMap.c.

◆ IfxPort_P11_10

IfxPort_Pin IfxPort_P11_10 = {&MODULE_P11,10}

Definition at line 110 of file IfxPort_PinMap.c.

◆ IfxPort_P11_11

IfxPort_Pin IfxPort_P11_11 = {&MODULE_P11,11}

Definition at line 111 of file IfxPort_PinMap.c.

◆ IfxPort_P11_12

IfxPort_Pin IfxPort_P11_12 = {&MODULE_P11,12}

Definition at line 112 of file IfxPort_PinMap.c.

◆ IfxPort_P11_13

IfxPort_Pin IfxPort_P11_13 = {&MODULE_P11,13}

Definition at line 113 of file IfxPort_PinMap.c.

◆ IfxPort_P11_14

IfxPort_Pin IfxPort_P11_14 = {&MODULE_P11,14}

Definition at line 114 of file IfxPort_PinMap.c.

◆ IfxPort_P11_15

IfxPort_Pin IfxPort_P11_15 = {&MODULE_P11,15}

Definition at line 115 of file IfxPort_PinMap.c.

◆ IfxPort_P11_2

IfxPort_Pin IfxPort_P11_2 = {&MODULE_P11, 2}

Definition at line 116 of file IfxPort_PinMap.c.

◆ IfxPort_P11_3

IfxPort_Pin IfxPort_P11_3 = {&MODULE_P11, 3}

Definition at line 117 of file IfxPort_PinMap.c.

◆ IfxPort_P11_4

IfxPort_Pin IfxPort_P11_4 = {&MODULE_P11, 4}

Definition at line 118 of file IfxPort_PinMap.c.

◆ IfxPort_P11_5

IfxPort_Pin IfxPort_P11_5 = {&MODULE_P11, 5}

Definition at line 119 of file IfxPort_PinMap.c.

◆ IfxPort_P11_6

IfxPort_Pin IfxPort_P11_6 = {&MODULE_P11, 6}

Definition at line 120 of file IfxPort_PinMap.c.

◆ IfxPort_P11_7

IfxPort_Pin IfxPort_P11_7 = {&MODULE_P11, 7}

Definition at line 121 of file IfxPort_PinMap.c.

◆ IfxPort_P11_8

IfxPort_Pin IfxPort_P11_8 = {&MODULE_P11, 8}

Definition at line 122 of file IfxPort_PinMap.c.

◆ IfxPort_P11_9

IfxPort_Pin IfxPort_P11_9 = {&MODULE_P11, 9}

Definition at line 123 of file IfxPort_PinMap.c.

◆ IfxPort_P12_0

IfxPort_Pin IfxPort_P12_0 = {&MODULE_P12, 0}

Definition at line 124 of file IfxPort_PinMap.c.

◆ IfxPort_P12_1

IfxPort_Pin IfxPort_P12_1 = {&MODULE_P12, 1}

Definition at line 125 of file IfxPort_PinMap.c.

◆ IfxPort_P13_0

IfxPort_Pin IfxPort_P13_0 = {&MODULE_P13, 0}

Definition at line 126 of file IfxPort_PinMap.c.

◆ IfxPort_P13_1

IfxPort_Pin IfxPort_P13_1 = {&MODULE_P13, 1}

Definition at line 127 of file IfxPort_PinMap.c.

◆ IfxPort_P13_10

IfxPort_Pin IfxPort_P13_10 = {&MODULE_P13,10}

Definition at line 128 of file IfxPort_PinMap.c.

◆ IfxPort_P13_11

IfxPort_Pin IfxPort_P13_11 = {&MODULE_P13,11}

Definition at line 129 of file IfxPort_PinMap.c.

◆ IfxPort_P13_12

IfxPort_Pin IfxPort_P13_12 = {&MODULE_P13,12}

Definition at line 130 of file IfxPort_PinMap.c.

◆ IfxPort_P13_13

IfxPort_Pin IfxPort_P13_13 = {&MODULE_P13,13}

Definition at line 131 of file IfxPort_PinMap.c.

◆ IfxPort_P13_14

IfxPort_Pin IfxPort_P13_14 = {&MODULE_P13,14}

Definition at line 132 of file IfxPort_PinMap.c.

◆ IfxPort_P13_15

IfxPort_Pin IfxPort_P13_15 = {&MODULE_P13,15}

Definition at line 133 of file IfxPort_PinMap.c.

◆ IfxPort_P13_2

IfxPort_Pin IfxPort_P13_2 = {&MODULE_P13, 2}

Definition at line 134 of file IfxPort_PinMap.c.

◆ IfxPort_P13_3

IfxPort_Pin IfxPort_P13_3 = {&MODULE_P13, 3}

Definition at line 135 of file IfxPort_PinMap.c.

◆ IfxPort_P13_4

IfxPort_Pin IfxPort_P13_4 = {&MODULE_P13, 4}

Definition at line 136 of file IfxPort_PinMap.c.

◆ IfxPort_P13_5

IfxPort_Pin IfxPort_P13_5 = {&MODULE_P13, 5}

Definition at line 137 of file IfxPort_PinMap.c.

◆ IfxPort_P13_6

IfxPort_Pin IfxPort_P13_6 = {&MODULE_P13, 6}

Definition at line 138 of file IfxPort_PinMap.c.

◆ IfxPort_P13_7

IfxPort_Pin IfxPort_P13_7 = {&MODULE_P13, 7}

Definition at line 139 of file IfxPort_PinMap.c.

◆ IfxPort_P13_9

IfxPort_Pin IfxPort_P13_9 = {&MODULE_P13, 9}

Definition at line 140 of file IfxPort_PinMap.c.

◆ IfxPort_P14_0

IfxPort_Pin IfxPort_P14_0 = {&MODULE_P14, 0}

Definition at line 141 of file IfxPort_PinMap.c.

◆ IfxPort_P14_1

IfxPort_Pin IfxPort_P14_1 = {&MODULE_P14, 1}

Definition at line 142 of file IfxPort_PinMap.c.

◆ IfxPort_P14_10

IfxPort_Pin IfxPort_P14_10 = {&MODULE_P14,10}

Definition at line 143 of file IfxPort_PinMap.c.

◆ IfxPort_P14_11

IfxPort_Pin IfxPort_P14_11 = {&MODULE_P14,11}

Definition at line 144 of file IfxPort_PinMap.c.

◆ IfxPort_P14_12

IfxPort_Pin IfxPort_P14_12 = {&MODULE_P14,12}

Definition at line 145 of file IfxPort_PinMap.c.

◆ IfxPort_P14_13

IfxPort_Pin IfxPort_P14_13 = {&MODULE_P14,13}

Definition at line 146 of file IfxPort_PinMap.c.

◆ IfxPort_P14_14

IfxPort_Pin IfxPort_P14_14 = {&MODULE_P14,14}

Definition at line 147 of file IfxPort_PinMap.c.

◆ IfxPort_P14_15

IfxPort_Pin IfxPort_P14_15 = {&MODULE_P14,15}

Definition at line 148 of file IfxPort_PinMap.c.

◆ IfxPort_P14_2

IfxPort_Pin IfxPort_P14_2 = {&MODULE_P14, 2}

Definition at line 149 of file IfxPort_PinMap.c.

◆ IfxPort_P14_3

IfxPort_Pin IfxPort_P14_3 = {&MODULE_P14, 3}

Definition at line 150 of file IfxPort_PinMap.c.

◆ IfxPort_P14_4

IfxPort_Pin IfxPort_P14_4 = {&MODULE_P14, 4}

Definition at line 151 of file IfxPort_PinMap.c.

◆ IfxPort_P14_5

IfxPort_Pin IfxPort_P14_5 = {&MODULE_P14, 5}

Definition at line 152 of file IfxPort_PinMap.c.

◆ IfxPort_P14_6

IfxPort_Pin IfxPort_P14_6 = {&MODULE_P14, 6}

Definition at line 153 of file IfxPort_PinMap.c.

◆ IfxPort_P14_7

IfxPort_Pin IfxPort_P14_7 = {&MODULE_P14, 7}

Definition at line 154 of file IfxPort_PinMap.c.

◆ IfxPort_P14_8

IfxPort_Pin IfxPort_P14_8 = {&MODULE_P14, 8}

Definition at line 155 of file IfxPort_PinMap.c.

◆ IfxPort_P14_9

IfxPort_Pin IfxPort_P14_9 = {&MODULE_P14, 9}

Definition at line 156 of file IfxPort_PinMap.c.

◆ IfxPort_P15_0

IfxPort_Pin IfxPort_P15_0 = {&MODULE_P15, 0}

Definition at line 157 of file IfxPort_PinMap.c.

◆ IfxPort_P15_1

IfxPort_Pin IfxPort_P15_1 = {&MODULE_P15, 1}

Definition at line 158 of file IfxPort_PinMap.c.

◆ IfxPort_P15_10

IfxPort_Pin IfxPort_P15_10 = {&MODULE_P15,10}

Definition at line 159 of file IfxPort_PinMap.c.

◆ IfxPort_P15_11

IfxPort_Pin IfxPort_P15_11 = {&MODULE_P15,11}

Definition at line 160 of file IfxPort_PinMap.c.

◆ IfxPort_P15_12

IfxPort_Pin IfxPort_P15_12 = {&MODULE_P15,12}

Definition at line 161 of file IfxPort_PinMap.c.

◆ IfxPort_P15_13

IfxPort_Pin IfxPort_P15_13 = {&MODULE_P15,13}

Definition at line 162 of file IfxPort_PinMap.c.

◆ IfxPort_P15_14

IfxPort_Pin IfxPort_P15_14 = {&MODULE_P15,14}

Definition at line 163 of file IfxPort_PinMap.c.

◆ IfxPort_P15_15

IfxPort_Pin IfxPort_P15_15 = {&MODULE_P15,15}

Definition at line 164 of file IfxPort_PinMap.c.

◆ IfxPort_P15_2

IfxPort_Pin IfxPort_P15_2 = {&MODULE_P15, 2}

Definition at line 165 of file IfxPort_PinMap.c.

◆ IfxPort_P15_3

IfxPort_Pin IfxPort_P15_3 = {&MODULE_P15, 3}

Definition at line 166 of file IfxPort_PinMap.c.

◆ IfxPort_P15_4

IfxPort_Pin IfxPort_P15_4 = {&MODULE_P15, 4}

Definition at line 167 of file IfxPort_PinMap.c.

◆ IfxPort_P15_5

IfxPort_Pin IfxPort_P15_5 = {&MODULE_P15, 5}

Definition at line 168 of file IfxPort_PinMap.c.

◆ IfxPort_P15_6

IfxPort_Pin IfxPort_P15_6 = {&MODULE_P15, 6}

Definition at line 169 of file IfxPort_PinMap.c.

◆ IfxPort_P15_7

IfxPort_Pin IfxPort_P15_7 = {&MODULE_P15, 7}

Definition at line 170 of file IfxPort_PinMap.c.

◆ IfxPort_P15_8

IfxPort_Pin IfxPort_P15_8 = {&MODULE_P15, 8}

Definition at line 171 of file IfxPort_PinMap.c.

◆ IfxPort_P20_0

IfxPort_Pin IfxPort_P20_0 = {&MODULE_P20, 0}

Definition at line 172 of file IfxPort_PinMap.c.

◆ IfxPort_P20_1

IfxPort_Pin IfxPort_P20_1 = {&MODULE_P20, 1}

Definition at line 173 of file IfxPort_PinMap.c.

◆ IfxPort_P20_10

IfxPort_Pin IfxPort_P20_10 = {&MODULE_P20,10}

Definition at line 174 of file IfxPort_PinMap.c.

◆ IfxPort_P20_11

IfxPort_Pin IfxPort_P20_11 = {&MODULE_P20,11}

Definition at line 175 of file IfxPort_PinMap.c.

◆ IfxPort_P20_12

IfxPort_Pin IfxPort_P20_12 = {&MODULE_P20,12}

Definition at line 176 of file IfxPort_PinMap.c.

◆ IfxPort_P20_13

IfxPort_Pin IfxPort_P20_13 = {&MODULE_P20,13}

Definition at line 177 of file IfxPort_PinMap.c.

◆ IfxPort_P20_14

IfxPort_Pin IfxPort_P20_14 = {&MODULE_P20,14}

Definition at line 178 of file IfxPort_PinMap.c.

◆ IfxPort_P20_3

IfxPort_Pin IfxPort_P20_3 = {&MODULE_P20, 3}

Definition at line 179 of file IfxPort_PinMap.c.

◆ IfxPort_P20_6

IfxPort_Pin IfxPort_P20_6 = {&MODULE_P20, 6}

Definition at line 180 of file IfxPort_PinMap.c.

◆ IfxPort_P20_7

IfxPort_Pin IfxPort_P20_7 = {&MODULE_P20, 7}

Definition at line 181 of file IfxPort_PinMap.c.

◆ IfxPort_P20_8

IfxPort_Pin IfxPort_P20_8 = {&MODULE_P20, 8}

Definition at line 182 of file IfxPort_PinMap.c.

◆ IfxPort_P20_9

IfxPort_Pin IfxPort_P20_9 = {&MODULE_P20, 9}

Definition at line 183 of file IfxPort_PinMap.c.

◆ IfxPort_P21_0

IfxPort_Pin IfxPort_P21_0 = {&MODULE_P21, 0}

Definition at line 184 of file IfxPort_PinMap.c.

◆ IfxPort_P21_1

IfxPort_Pin IfxPort_P21_1 = {&MODULE_P21, 1}

Definition at line 185 of file IfxPort_PinMap.c.

◆ IfxPort_P21_2

IfxPort_Pin IfxPort_P21_2 = {&MODULE_P21, 2}

Definition at line 186 of file IfxPort_PinMap.c.

◆ IfxPort_P21_3

IfxPort_Pin IfxPort_P21_3 = {&MODULE_P21, 3}

Definition at line 187 of file IfxPort_PinMap.c.

◆ IfxPort_P21_4

IfxPort_Pin IfxPort_P21_4 = {&MODULE_P21, 4}

Definition at line 188 of file IfxPort_PinMap.c.

◆ IfxPort_P21_5

IfxPort_Pin IfxPort_P21_5 = {&MODULE_P21, 5}

Definition at line 189 of file IfxPort_PinMap.c.

◆ IfxPort_P21_6

IfxPort_Pin IfxPort_P21_6 = {&MODULE_P21, 6}

Definition at line 190 of file IfxPort_PinMap.c.

◆ IfxPort_P21_7

IfxPort_Pin IfxPort_P21_7 = {&MODULE_P21, 7}

Definition at line 191 of file IfxPort_PinMap.c.

◆ IfxPort_P22_0

IfxPort_Pin IfxPort_P22_0 = {&MODULE_P22, 0}

Definition at line 192 of file IfxPort_PinMap.c.

◆ IfxPort_P22_1

IfxPort_Pin IfxPort_P22_1 = {&MODULE_P22, 1}

Definition at line 193 of file IfxPort_PinMap.c.

◆ IfxPort_P22_10

IfxPort_Pin IfxPort_P22_10 = {&MODULE_P22,10}

Definition at line 194 of file IfxPort_PinMap.c.

◆ IfxPort_P22_11

IfxPort_Pin IfxPort_P22_11 = {&MODULE_P22,11}

Definition at line 195 of file IfxPort_PinMap.c.

◆ IfxPort_P22_2

IfxPort_Pin IfxPort_P22_2 = {&MODULE_P22, 2}

Definition at line 196 of file IfxPort_PinMap.c.

◆ IfxPort_P22_3

IfxPort_Pin IfxPort_P22_3 = {&MODULE_P22, 3}

Definition at line 197 of file IfxPort_PinMap.c.

◆ IfxPort_P22_4

IfxPort_Pin IfxPort_P22_4 = {&MODULE_P22, 4}

Definition at line 198 of file IfxPort_PinMap.c.

◆ IfxPort_P22_5

IfxPort_Pin IfxPort_P22_5 = {&MODULE_P22, 5}

Definition at line 199 of file IfxPort_PinMap.c.

◆ IfxPort_P22_6

IfxPort_Pin IfxPort_P22_6 = {&MODULE_P22, 6}

Definition at line 200 of file IfxPort_PinMap.c.

◆ IfxPort_P22_7

IfxPort_Pin IfxPort_P22_7 = {&MODULE_P22, 7}

Definition at line 201 of file IfxPort_PinMap.c.

◆ IfxPort_P22_8

IfxPort_Pin IfxPort_P22_8 = {&MODULE_P22, 8}

Definition at line 202 of file IfxPort_PinMap.c.

◆ IfxPort_P22_9

IfxPort_Pin IfxPort_P22_9 = {&MODULE_P22, 9}

Definition at line 203 of file IfxPort_PinMap.c.

◆ IfxPort_P23_0

IfxPort_Pin IfxPort_P23_0 = {&MODULE_P23, 0}

Definition at line 204 of file IfxPort_PinMap.c.

◆ IfxPort_P23_1

IfxPort_Pin IfxPort_P23_1 = {&MODULE_P23, 1}

Definition at line 205 of file IfxPort_PinMap.c.

◆ IfxPort_P23_2

IfxPort_Pin IfxPort_P23_2 = {&MODULE_P23, 2}

Definition at line 206 of file IfxPort_PinMap.c.

◆ IfxPort_P23_3

IfxPort_Pin IfxPort_P23_3 = {&MODULE_P23, 3}

Definition at line 207 of file IfxPort_PinMap.c.

◆ IfxPort_P23_4

IfxPort_Pin IfxPort_P23_4 = {&MODULE_P23, 4}

Definition at line 208 of file IfxPort_PinMap.c.

◆ IfxPort_P23_5

IfxPort_Pin IfxPort_P23_5 = {&MODULE_P23, 5}

Definition at line 209 of file IfxPort_PinMap.c.

◆ IfxPort_P23_6

IfxPort_Pin IfxPort_P23_6 = {&MODULE_P23, 6}

Definition at line 210 of file IfxPort_PinMap.c.

◆ IfxPort_P23_7

IfxPort_Pin IfxPort_P23_7 = {&MODULE_P23, 7}

Definition at line 211 of file IfxPort_PinMap.c.

◆ IfxPort_P24_0

IfxPort_Pin IfxPort_P24_0 = {&MODULE_P24, 0}

Definition at line 212 of file IfxPort_PinMap.c.

◆ IfxPort_P24_1

IfxPort_Pin IfxPort_P24_1 = {&MODULE_P24, 1}

Definition at line 213 of file IfxPort_PinMap.c.

◆ IfxPort_P24_10

IfxPort_Pin IfxPort_P24_10 = {&MODULE_P24,10}

Definition at line 214 of file IfxPort_PinMap.c.

◆ IfxPort_P24_11

IfxPort_Pin IfxPort_P24_11 = {&MODULE_P24,11}

Definition at line 215 of file IfxPort_PinMap.c.

◆ IfxPort_P24_12

IfxPort_Pin IfxPort_P24_12 = {&MODULE_P24,12}

Definition at line 216 of file IfxPort_PinMap.c.

◆ IfxPort_P24_13

IfxPort_Pin IfxPort_P24_13 = {&MODULE_P24,13}

Definition at line 217 of file IfxPort_PinMap.c.

◆ IfxPort_P24_14

IfxPort_Pin IfxPort_P24_14 = {&MODULE_P24,14}

Definition at line 218 of file IfxPort_PinMap.c.

◆ IfxPort_P24_15

IfxPort_Pin IfxPort_P24_15 = {&MODULE_P24,15}

Definition at line 219 of file IfxPort_PinMap.c.

◆ IfxPort_P24_2

IfxPort_Pin IfxPort_P24_2 = {&MODULE_P24, 2}

Definition at line 220 of file IfxPort_PinMap.c.

◆ IfxPort_P24_3

IfxPort_Pin IfxPort_P24_3 = {&MODULE_P24, 3}

Definition at line 221 of file IfxPort_PinMap.c.

◆ IfxPort_P24_4

IfxPort_Pin IfxPort_P24_4 = {&MODULE_P24, 4}

Definition at line 222 of file IfxPort_PinMap.c.

◆ IfxPort_P24_5

IfxPort_Pin IfxPort_P24_5 = {&MODULE_P24, 5}

Definition at line 223 of file IfxPort_PinMap.c.

◆ IfxPort_P24_6

IfxPort_Pin IfxPort_P24_6 = {&MODULE_P24, 6}

Definition at line 224 of file IfxPort_PinMap.c.

◆ IfxPort_P24_7

IfxPort_Pin IfxPort_P24_7 = {&MODULE_P24, 7}

Definition at line 225 of file IfxPort_PinMap.c.

◆ IfxPort_P24_8

IfxPort_Pin IfxPort_P24_8 = {&MODULE_P24, 8}

Definition at line 226 of file IfxPort_PinMap.c.

◆ IfxPort_P24_9

IfxPort_Pin IfxPort_P24_9 = {&MODULE_P24, 9}

Definition at line 227 of file IfxPort_PinMap.c.

◆ IfxPort_P25_0

IfxPort_Pin IfxPort_P25_0 = {&MODULE_P25, 0}

Definition at line 228 of file IfxPort_PinMap.c.

◆ IfxPort_P25_1

IfxPort_Pin IfxPort_P25_1 = {&MODULE_P25, 1}

Definition at line 229 of file IfxPort_PinMap.c.

◆ IfxPort_P25_10

IfxPort_Pin IfxPort_P25_10 = {&MODULE_P25,10}

Definition at line 230 of file IfxPort_PinMap.c.

◆ IfxPort_P25_11

IfxPort_Pin IfxPort_P25_11 = {&MODULE_P25,11}

Definition at line 231 of file IfxPort_PinMap.c.

◆ IfxPort_P25_12

IfxPort_Pin IfxPort_P25_12 = {&MODULE_P25,12}

Definition at line 232 of file IfxPort_PinMap.c.

◆ IfxPort_P25_13

IfxPort_Pin IfxPort_P25_13 = {&MODULE_P25,13}

Definition at line 233 of file IfxPort_PinMap.c.

◆ IfxPort_P25_14

IfxPort_Pin IfxPort_P25_14 = {&MODULE_P25,14}

Definition at line 234 of file IfxPort_PinMap.c.

◆ IfxPort_P25_15

IfxPort_Pin IfxPort_P25_15 = {&MODULE_P25,15}

Definition at line 235 of file IfxPort_PinMap.c.

◆ IfxPort_P25_2

IfxPort_Pin IfxPort_P25_2 = {&MODULE_P25, 2}

Definition at line 236 of file IfxPort_PinMap.c.

◆ IfxPort_P25_3

IfxPort_Pin IfxPort_P25_3 = {&MODULE_P25, 3}

Definition at line 237 of file IfxPort_PinMap.c.

◆ IfxPort_P25_4

IfxPort_Pin IfxPort_P25_4 = {&MODULE_P25, 4}

Definition at line 238 of file IfxPort_PinMap.c.

◆ IfxPort_P25_5

IfxPort_Pin IfxPort_P25_5 = {&MODULE_P25, 5}

Definition at line 239 of file IfxPort_PinMap.c.

◆ IfxPort_P25_6

IfxPort_Pin IfxPort_P25_6 = {&MODULE_P25, 6}

Definition at line 240 of file IfxPort_PinMap.c.

◆ IfxPort_P25_7

IfxPort_Pin IfxPort_P25_7 = {&MODULE_P25, 7}

Definition at line 241 of file IfxPort_PinMap.c.

◆ IfxPort_P25_8

IfxPort_Pin IfxPort_P25_8 = {&MODULE_P25, 8}

Definition at line 242 of file IfxPort_PinMap.c.

◆ IfxPort_P25_9

IfxPort_Pin IfxPort_P25_9 = {&MODULE_P25, 9}

Definition at line 243 of file IfxPort_PinMap.c.

◆ IfxPort_P26_0

IfxPort_Pin IfxPort_P26_0 = {&MODULE_P26, 0}

Definition at line 244 of file IfxPort_PinMap.c.

◆ IfxPort_P30_0

IfxPort_Pin IfxPort_P30_0 = {&MODULE_P30, 0}

Definition at line 245 of file IfxPort_PinMap.c.

◆ IfxPort_P30_1

IfxPort_Pin IfxPort_P30_1 = {&MODULE_P30, 1}

Definition at line 246 of file IfxPort_PinMap.c.

◆ IfxPort_P30_10

IfxPort_Pin IfxPort_P30_10 = {&MODULE_P30,10}

Definition at line 247 of file IfxPort_PinMap.c.

◆ IfxPort_P30_11

IfxPort_Pin IfxPort_P30_11 = {&MODULE_P30,11}

Definition at line 248 of file IfxPort_PinMap.c.

◆ IfxPort_P30_12

IfxPort_Pin IfxPort_P30_12 = {&MODULE_P30,12}

Definition at line 249 of file IfxPort_PinMap.c.

◆ IfxPort_P30_13

IfxPort_Pin IfxPort_P30_13 = {&MODULE_P30,13}

Definition at line 250 of file IfxPort_PinMap.c.

◆ IfxPort_P30_14

IfxPort_Pin IfxPort_P30_14 = {&MODULE_P30,14}

Definition at line 251 of file IfxPort_PinMap.c.

◆ IfxPort_P30_15

IfxPort_Pin IfxPort_P30_15 = {&MODULE_P30,15}

Definition at line 252 of file IfxPort_PinMap.c.

◆ IfxPort_P30_2

IfxPort_Pin IfxPort_P30_2 = {&MODULE_P30, 2}

Definition at line 253 of file IfxPort_PinMap.c.

◆ IfxPort_P30_3

IfxPort_Pin IfxPort_P30_3 = {&MODULE_P30, 3}

Definition at line 254 of file IfxPort_PinMap.c.

◆ IfxPort_P30_4

IfxPort_Pin IfxPort_P30_4 = {&MODULE_P30, 4}

Definition at line 255 of file IfxPort_PinMap.c.

◆ IfxPort_P30_5

IfxPort_Pin IfxPort_P30_5 = {&MODULE_P30, 5}

Definition at line 256 of file IfxPort_PinMap.c.

◆ IfxPort_P30_6

IfxPort_Pin IfxPort_P30_6 = {&MODULE_P30, 6}

Definition at line 257 of file IfxPort_PinMap.c.

◆ IfxPort_P30_7

IfxPort_Pin IfxPort_P30_7 = {&MODULE_P30, 7}

Definition at line 258 of file IfxPort_PinMap.c.

◆ IfxPort_P30_8

IfxPort_Pin IfxPort_P30_8 = {&MODULE_P30, 8}

Definition at line 259 of file IfxPort_PinMap.c.

◆ IfxPort_P30_9

IfxPort_Pin IfxPort_P30_9 = {&MODULE_P30, 9}

Definition at line 260 of file IfxPort_PinMap.c.

◆ IfxPort_P31_0

IfxPort_Pin IfxPort_P31_0 = {&MODULE_P31, 0}

Definition at line 261 of file IfxPort_PinMap.c.

◆ IfxPort_P31_1

IfxPort_Pin IfxPort_P31_1 = {&MODULE_P31, 1}

Definition at line 262 of file IfxPort_PinMap.c.

◆ IfxPort_P31_10

IfxPort_Pin IfxPort_P31_10 = {&MODULE_P31,10}

Definition at line 263 of file IfxPort_PinMap.c.

◆ IfxPort_P31_11

IfxPort_Pin IfxPort_P31_11 = {&MODULE_P31,11}

Definition at line 264 of file IfxPort_PinMap.c.

◆ IfxPort_P31_12

IfxPort_Pin IfxPort_P31_12 = {&MODULE_P31,12}

Definition at line 265 of file IfxPort_PinMap.c.

◆ IfxPort_P31_13

IfxPort_Pin IfxPort_P31_13 = {&MODULE_P31,13}

Definition at line 266 of file IfxPort_PinMap.c.

◆ IfxPort_P31_14

IfxPort_Pin IfxPort_P31_14 = {&MODULE_P31,14}

Definition at line 267 of file IfxPort_PinMap.c.

◆ IfxPort_P31_15

IfxPort_Pin IfxPort_P31_15 = {&MODULE_P31,15}

Definition at line 268 of file IfxPort_PinMap.c.

◆ IfxPort_P31_2

IfxPort_Pin IfxPort_P31_2 = {&MODULE_P31, 2}

Definition at line 269 of file IfxPort_PinMap.c.

◆ IfxPort_P31_3

IfxPort_Pin IfxPort_P31_3 = {&MODULE_P31, 3}

Definition at line 270 of file IfxPort_PinMap.c.

◆ IfxPort_P31_4

IfxPort_Pin IfxPort_P31_4 = {&MODULE_P31, 4}

Definition at line 271 of file IfxPort_PinMap.c.

◆ IfxPort_P31_5

IfxPort_Pin IfxPort_P31_5 = {&MODULE_P31, 5}

Definition at line 272 of file IfxPort_PinMap.c.

◆ IfxPort_P31_6

IfxPort_Pin IfxPort_P31_6 = {&MODULE_P31, 6}

Definition at line 273 of file IfxPort_PinMap.c.

◆ IfxPort_P31_7

IfxPort_Pin IfxPort_P31_7 = {&MODULE_P31, 7}

Definition at line 274 of file IfxPort_PinMap.c.

◆ IfxPort_P31_8

IfxPort_Pin IfxPort_P31_8 = {&MODULE_P31, 8}

Definition at line 275 of file IfxPort_PinMap.c.

◆ IfxPort_P31_9

IfxPort_Pin IfxPort_P31_9 = {&MODULE_P31, 9}

Definition at line 276 of file IfxPort_PinMap.c.

◆ IfxPort_P32_0

IfxPort_Pin IfxPort_P32_0 = {&MODULE_P32, 0}

Definition at line 277 of file IfxPort_PinMap.c.

◆ IfxPort_P32_1

IfxPort_Pin IfxPort_P32_1 = {&MODULE_P32, 1}

Definition at line 278 of file IfxPort_PinMap.c.

◆ IfxPort_P32_2

IfxPort_Pin IfxPort_P32_2 = {&MODULE_P32, 2}

Definition at line 279 of file IfxPort_PinMap.c.

◆ IfxPort_P32_3

IfxPort_Pin IfxPort_P32_3 = {&MODULE_P32, 3}

Definition at line 280 of file IfxPort_PinMap.c.

◆ IfxPort_P32_4

IfxPort_Pin IfxPort_P32_4 = {&MODULE_P32, 4}

Definition at line 281 of file IfxPort_PinMap.c.

◆ IfxPort_P32_5

IfxPort_Pin IfxPort_P32_5 = {&MODULE_P32, 5}

Definition at line 282 of file IfxPort_PinMap.c.

◆ IfxPort_P32_6

IfxPort_Pin IfxPort_P32_6 = {&MODULE_P32, 6}

Definition at line 283 of file IfxPort_PinMap.c.

◆ IfxPort_P32_7

IfxPort_Pin IfxPort_P32_7 = {&MODULE_P32, 7}

Definition at line 284 of file IfxPort_PinMap.c.

◆ IfxPort_P33_0

IfxPort_Pin IfxPort_P33_0 = {&MODULE_P33, 0}

Definition at line 285 of file IfxPort_PinMap.c.

◆ IfxPort_P33_1

IfxPort_Pin IfxPort_P33_1 = {&MODULE_P33, 1}

Definition at line 286 of file IfxPort_PinMap.c.

◆ IfxPort_P33_10

IfxPort_Pin IfxPort_P33_10 = {&MODULE_P33,10}

Definition at line 287 of file IfxPort_PinMap.c.

◆ IfxPort_P33_11

IfxPort_Pin IfxPort_P33_11 = {&MODULE_P33,11}

Definition at line 288 of file IfxPort_PinMap.c.

◆ IfxPort_P33_12

IfxPort_Pin IfxPort_P33_12 = {&MODULE_P33,12}

Definition at line 289 of file IfxPort_PinMap.c.

◆ IfxPort_P33_13

IfxPort_Pin IfxPort_P33_13 = {&MODULE_P33,13}

Definition at line 290 of file IfxPort_PinMap.c.

◆ IfxPort_P33_14

IfxPort_Pin IfxPort_P33_14 = {&MODULE_P33,14}

Definition at line 291 of file IfxPort_PinMap.c.

◆ IfxPort_P33_15

IfxPort_Pin IfxPort_P33_15 = {&MODULE_P33,15}

Definition at line 292 of file IfxPort_PinMap.c.

◆ IfxPort_P33_2

IfxPort_Pin IfxPort_P33_2 = {&MODULE_P33, 2}

Definition at line 293 of file IfxPort_PinMap.c.

◆ IfxPort_P33_3

IfxPort_Pin IfxPort_P33_3 = {&MODULE_P33, 3}

Definition at line 294 of file IfxPort_PinMap.c.

◆ IfxPort_P33_4

IfxPort_Pin IfxPort_P33_4 = {&MODULE_P33, 4}

Definition at line 295 of file IfxPort_PinMap.c.

◆ IfxPort_P33_5

IfxPort_Pin IfxPort_P33_5 = {&MODULE_P33, 5}

Definition at line 296 of file IfxPort_PinMap.c.

◆ IfxPort_P33_6

IfxPort_Pin IfxPort_P33_6 = {&MODULE_P33, 6}

Definition at line 297 of file IfxPort_PinMap.c.

◆ IfxPort_P33_7

IfxPort_Pin IfxPort_P33_7 = {&MODULE_P33, 7}

Definition at line 298 of file IfxPort_PinMap.c.

◆ IfxPort_P33_8

IfxPort_Pin IfxPort_P33_8 = {&MODULE_P33, 8}

Definition at line 299 of file IfxPort_PinMap.c.

◆ IfxPort_P33_9

IfxPort_Pin IfxPort_P33_9 = {&MODULE_P33, 9}

Definition at line 300 of file IfxPort_PinMap.c.

◆ IfxPort_P34_1

IfxPort_Pin IfxPort_P34_1 = {&MODULE_P34, 1}

Definition at line 301 of file IfxPort_PinMap.c.

◆ IfxPort_P34_2

IfxPort_Pin IfxPort_P34_2 = {&MODULE_P34, 2}

Definition at line 302 of file IfxPort_PinMap.c.

◆ IfxPort_P34_3

IfxPort_Pin IfxPort_P34_3 = {&MODULE_P34, 3}

Definition at line 303 of file IfxPort_PinMap.c.

◆ IfxPort_P34_4

IfxPort_Pin IfxPort_P34_4 = {&MODULE_P34, 4}

Definition at line 304 of file IfxPort_PinMap.c.

◆ IfxPort_P34_5

IfxPort_Pin IfxPort_P34_5 = {&MODULE_P34, 5}

Definition at line 305 of file IfxPort_PinMap.c.

◆ IfxPort_P40_0

IfxPort_Pin IfxPort_P40_0 = {&MODULE_P40, 0}

Definition at line 306 of file IfxPort_PinMap.c.

◆ IfxPort_P40_1

IfxPort_Pin IfxPort_P40_1 = {&MODULE_P40, 1}

Definition at line 307 of file IfxPort_PinMap.c.

◆ IfxPort_P40_10

IfxPort_Pin IfxPort_P40_10 = {&MODULE_P40,10}

Definition at line 308 of file IfxPort_PinMap.c.

◆ IfxPort_P40_11

IfxPort_Pin IfxPort_P40_11 = {&MODULE_P40,11}

Definition at line 309 of file IfxPort_PinMap.c.

◆ IfxPort_P40_12

IfxPort_Pin IfxPort_P40_12 = {&MODULE_P40,12}

Definition at line 310 of file IfxPort_PinMap.c.

◆ IfxPort_P40_13

IfxPort_Pin IfxPort_P40_13 = {&MODULE_P40,13}

Definition at line 311 of file IfxPort_PinMap.c.

◆ IfxPort_P40_14

IfxPort_Pin IfxPort_P40_14 = {&MODULE_P40,14}

Definition at line 312 of file IfxPort_PinMap.c.

◆ IfxPort_P40_15

IfxPort_Pin IfxPort_P40_15 = {&MODULE_P40,15}

Definition at line 313 of file IfxPort_PinMap.c.

◆ IfxPort_P40_2

IfxPort_Pin IfxPort_P40_2 = {&MODULE_P40, 2}

Definition at line 314 of file IfxPort_PinMap.c.

◆ IfxPort_P40_3

IfxPort_Pin IfxPort_P40_3 = {&MODULE_P40, 3}

Definition at line 315 of file IfxPort_PinMap.c.

◆ IfxPort_P40_4

IfxPort_Pin IfxPort_P40_4 = {&MODULE_P40, 4}

Definition at line 316 of file IfxPort_PinMap.c.

◆ IfxPort_P40_5

IfxPort_Pin IfxPort_P40_5 = {&MODULE_P40, 5}

Definition at line 317 of file IfxPort_PinMap.c.

◆ IfxPort_P40_6

IfxPort_Pin IfxPort_P40_6 = {&MODULE_P40, 6}

Definition at line 318 of file IfxPort_PinMap.c.

◆ IfxPort_P40_7

IfxPort_Pin IfxPort_P40_7 = {&MODULE_P40, 7}

Definition at line 319 of file IfxPort_PinMap.c.

◆ IfxPort_P40_8

IfxPort_Pin IfxPort_P40_8 = {&MODULE_P40, 8}

Definition at line 320 of file IfxPort_PinMap.c.

◆ IfxPort_P40_9

IfxPort_Pin IfxPort_P40_9 = {&MODULE_P40, 9}

Definition at line 321 of file IfxPort_PinMap.c.

◆ IfxPort_P41_0

IfxPort_Pin IfxPort_P41_0 = {&MODULE_P41, 0}

Definition at line 322 of file IfxPort_PinMap.c.

◆ IfxPort_P41_1

IfxPort_Pin IfxPort_P41_1 = {&MODULE_P41, 1}

Definition at line 323 of file IfxPort_PinMap.c.

◆ IfxPort_P41_2

IfxPort_Pin IfxPort_P41_2 = {&MODULE_P41, 2}

Definition at line 324 of file IfxPort_PinMap.c.

◆ IfxPort_P41_3

IfxPort_Pin IfxPort_P41_3 = {&MODULE_P41, 3}

Definition at line 325 of file IfxPort_PinMap.c.

◆ IfxPort_P41_4

IfxPort_Pin IfxPort_P41_4 = {&MODULE_P41, 4}

Definition at line 326 of file IfxPort_PinMap.c.

◆ IfxPort_P41_5

IfxPort_Pin IfxPort_P41_5 = {&MODULE_P41, 5}

Definition at line 327 of file IfxPort_PinMap.c.

◆ IfxPort_P41_6

IfxPort_Pin IfxPort_P41_6 = {&MODULE_P41, 6}

Definition at line 328 of file IfxPort_PinMap.c.

◆ IfxPort_P41_7

IfxPort_Pin IfxPort_P41_7 = {&MODULE_P41, 7}

Definition at line 329 of file IfxPort_PinMap.c.

◆ IfxPort_P41_8

IfxPort_Pin IfxPort_P41_8 = {&MODULE_P41, 8}

Definition at line 330 of file IfxPort_PinMap.c.

◆ IfxPort_Pin_pinTable

const IfxPort_Pin* IfxPort_Pin_pinTable[IFXPORT_PINMAP_NUM_MODULES][IFXPORT_PINMAP_PIN_NUM_ITEMS]

Definition at line 333 of file IfxPort_PinMap.c.


iLLD_TC38A: IfxPort_PinMap.h File Reference

  • _PinMap
Macros | Variables
IfxPort_PinMap.h File Reference
iLLD » PORTS

PORT I/O map. More...

#include <Port/Std/IfxPort.h>
Include dependency graph for IfxPort_PinMap.h:

Go to the source code of this file.

Macros

#define | IFXPORT_PINMAP_NUM_MODULES 42
Table dimensions. More...
#define | IFXPORT_PINMAP_PIN_NUM_ITEMS 16

Variables

IFX_EXTERN IfxPort_Pin IfxPort_P00_0
IfxPort_P00_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_1
IfxPort_P00_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_10
IfxPort_P00_10. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_11
IfxPort_P00_11. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_12
IfxPort_P00_12. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_13
IfxPort_P00_13. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_14
IfxPort_P00_14. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_15
IfxPort_P00_15. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_2
IfxPort_P00_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_3
IfxPort_P00_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_4
IfxPort_P00_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_5
IfxPort_P00_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_6
IfxPort_P00_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_7
IfxPort_P00_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_8
IfxPort_P00_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_9
IfxPort_P00_9. More...
IFX_EXTERN IfxPort_Pin IfxPort_P01_0
IfxPort_P01_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P01_1
IfxPort_P01_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P01_10
IfxPort_P01_10. More...
IFX_EXTERN IfxPort_Pin IfxPort_P01_11
IfxPort_P01_11. More...
IFX_EXTERN IfxPort_Pin IfxPort_P01_12
IfxPort_P01_12. More...
IFX_EXTERN IfxPort_Pin IfxPort_P01_13
IfxPort_P01_13. More...
IFX_EXTERN IfxPort_Pin IfxPort_P01_14
IfxPort_P01_14. More...
IFX_EXTERN IfxPort_Pin IfxPort_P01_15
IfxPort_P01_15. More...
IFX_EXTERN IfxPort_Pin IfxPort_P01_2
IfxPort_P01_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P01_3
IfxPort_P01_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P01_4
IfxPort_P01_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P01_5
IfxPort_P01_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P01_6
IfxPort_P01_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P01_7
IfxPort_P01_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P01_8
IfxPort_P01_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P01_9
IfxPort_P01_9. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_0
IfxPort_P02_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_1
IfxPort_P02_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_10
IfxPort_P02_10. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_11
IfxPort_P02_11. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_12
IfxPort_P02_12. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_13
IfxPort_P02_13. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_14
IfxPort_P02_14. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_15
IfxPort_P02_15. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_2
IfxPort_P02_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_3
IfxPort_P02_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_4
IfxPort_P02_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_5
IfxPort_P02_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_6
IfxPort_P02_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_7
IfxPort_P02_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_8
IfxPort_P02_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_9
IfxPort_P02_9. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_0
IfxPort_P10_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_1
IfxPort_P10_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_10
IfxPort_P10_10. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_11
IfxPort_P10_11. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_13
IfxPort_P10_13. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_14
IfxPort_P10_14. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_15
IfxPort_P10_15. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_2
IfxPort_P10_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_3
IfxPort_P10_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_4
IfxPort_P10_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_5
IfxPort_P10_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_6
IfxPort_P10_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_7
IfxPort_P10_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_8
IfxPort_P10_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_9
IfxPort_P10_9. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_0
IfxPort_P11_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_1
IfxPort_P11_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_10
IfxPort_P11_10. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_11
IfxPort_P11_11. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_12
IfxPort_P11_12. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_13
IfxPort_P11_13. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_14
IfxPort_P11_14. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_15
IfxPort_P11_15. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_2
IfxPort_P11_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_3
IfxPort_P11_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_4
IfxPort_P11_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_5
IfxPort_P11_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_6
IfxPort_P11_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_7
IfxPort_P11_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_8
IfxPort_P11_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_9
IfxPort_P11_9. More...
IFX_EXTERN IfxPort_Pin IfxPort_P12_0
IfxPort_P12_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P12_1
IfxPort_P12_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P13_0
IfxPort_P13_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P13_1
IfxPort_P13_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P13_10
IfxPort_P13_10. More...
IFX_EXTERN IfxPort_Pin IfxPort_P13_11
IfxPort_P13_11. More...
IFX_EXTERN IfxPort_Pin IfxPort_P13_12
IfxPort_P13_12. More...
IFX_EXTERN IfxPort_Pin IfxPort_P13_13
IfxPort_P13_13. More...
IFX_EXTERN IfxPort_Pin IfxPort_P13_14
IfxPort_P13_14. More...
IFX_EXTERN IfxPort_Pin IfxPort_P13_15
IfxPort_P13_15. More...
IFX_EXTERN IfxPort_Pin IfxPort_P13_2
IfxPort_P13_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P13_3
IfxPort_P13_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P13_4
IfxPort_P13_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P13_5
IfxPort_P13_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P13_6
IfxPort_P13_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P13_7
IfxPort_P13_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P13_9
IfxPort_P13_9. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_0
IfxPort_P14_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_1
IfxPort_P14_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_10
IfxPort_P14_10. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_11
IfxPort_P14_11. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_12
IfxPort_P14_12. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_13
IfxPort_P14_13. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_14
IfxPort_P14_14. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_15
IfxPort_P14_15. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_2
IfxPort_P14_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_3
IfxPort_P14_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_4
IfxPort_P14_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_5
IfxPort_P14_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_6
IfxPort_P14_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_7
IfxPort_P14_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_8
IfxPort_P14_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_9
IfxPort_P14_9. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_0
IfxPort_P15_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_1
IfxPort_P15_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_10
IfxPort_P15_10. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_11
IfxPort_P15_11. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_12
IfxPort_P15_12. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_13
IfxPort_P15_13. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_14
IfxPort_P15_14. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_15
IfxPort_P15_15. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_2
IfxPort_P15_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_3
IfxPort_P15_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_4
IfxPort_P15_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_5
IfxPort_P15_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_6
IfxPort_P15_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_7
IfxPort_P15_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_8
IfxPort_P15_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_0
IfxPort_P20_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_1
IfxPort_P20_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_10
IfxPort_P20_10. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_11
IfxPort_P20_11. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_12
IfxPort_P20_12. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_13
IfxPort_P20_13. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_14
IfxPort_P20_14. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_3
IfxPort_P20_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_6
IfxPort_P20_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_7
IfxPort_P20_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_8
IfxPort_P20_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_9
IfxPort_P20_9. More...
IFX_EXTERN IfxPort_Pin IfxPort_P21_0
IfxPort_P21_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P21_1
IfxPort_P21_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P21_2
IfxPort_P21_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P21_3
IfxPort_P21_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P21_4
IfxPort_P21_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P21_5
IfxPort_P21_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P21_6
IfxPort_P21_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P21_7
IfxPort_P21_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P22_0
IfxPort_P22_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P22_1
IfxPort_P22_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P22_10
IfxPort_P22_10. More...
IFX_EXTERN IfxPort_Pin IfxPort_P22_11
IfxPort_P22_11. More...
IFX_EXTERN IfxPort_Pin IfxPort_P22_2
IfxPort_P22_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P22_3
IfxPort_P22_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P22_4
IfxPort_P22_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P22_5
IfxPort_P22_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P22_6
IfxPort_P22_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P22_7
IfxPort_P22_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P22_8
IfxPort_P22_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P22_9
IfxPort_P22_9. More...
IFX_EXTERN IfxPort_Pin IfxPort_P23_0
IfxPort_P23_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P23_1
IfxPort_P23_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P23_2
IfxPort_P23_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P23_3
IfxPort_P23_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P23_4
IfxPort_P23_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P23_5
IfxPort_P23_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P23_6
IfxPort_P23_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P23_7
IfxPort_P23_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P24_0
IfxPort_P24_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P24_1
IfxPort_P24_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P24_10
IfxPort_P24_10. More...
IFX_EXTERN IfxPort_Pin IfxPort_P24_11
IfxPort_P24_11. More...
IFX_EXTERN IfxPort_Pin IfxPort_P24_12
IfxPort_P24_12. More...
IFX_EXTERN IfxPort_Pin IfxPort_P24_13
IfxPort_P24_13. More...
IFX_EXTERN IfxPort_Pin IfxPort_P24_14
IfxPort_P24_14. More...
IFX_EXTERN IfxPort_Pin IfxPort_P24_15
IfxPort_P24_15. More...
IFX_EXTERN IfxPort_Pin IfxPort_P24_2
IfxPort_P24_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P24_3
IfxPort_P24_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P24_4
IfxPort_P24_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P24_5
IfxPort_P24_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P24_6
IfxPort_P24_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P24_7
IfxPort_P24_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P24_8
IfxPort_P24_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P24_9
IfxPort_P24_9. More...
IFX_EXTERN IfxPort_Pin IfxPort_P25_0
IfxPort_P25_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P25_1
IfxPort_P25_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P25_10
IfxPort_P25_10. More...
IFX_EXTERN IfxPort_Pin IfxPort_P25_11
IfxPort_P25_11. More...
IFX_EXTERN IfxPort_Pin IfxPort_P25_12
IfxPort_P25_12. More...
IFX_EXTERN IfxPort_Pin IfxPort_P25_13
IfxPort_P25_13. More...
IFX_EXTERN IfxPort_Pin IfxPort_P25_14
IfxPort_P25_14. More...
IFX_EXTERN IfxPort_Pin IfxPort_P25_15
IfxPort_P25_15. More...
IFX_EXTERN IfxPort_Pin IfxPort_P25_2
IfxPort_P25_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P25_3
IfxPort_P25_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P25_4
IfxPort_P25_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P25_5
IfxPort_P25_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P25_6
IfxPort_P25_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P25_7
IfxPort_P25_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P25_8
IfxPort_P25_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P25_9
IfxPort_P25_9. More...
IFX_EXTERN IfxPort_Pin IfxPort_P26_0
IfxPort_P26_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P30_0
IfxPort_P30_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P30_1
IfxPort_P30_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P30_10
IfxPort_P30_10. More...
IFX_EXTERN IfxPort_Pin IfxPort_P30_11
IfxPort_P30_11. More...
IFX_EXTERN IfxPort_Pin IfxPort_P30_12
IfxPort_P30_12. More...
IFX_EXTERN IfxPort_Pin IfxPort_P30_13
IfxPort_P30_13. More...
IFX_EXTERN IfxPort_Pin IfxPort_P30_14
IfxPort_P30_14. More...
IFX_EXTERN IfxPort_Pin IfxPort_P30_15
IfxPort_P30_15. More...
IFX_EXTERN IfxPort_Pin IfxPort_P30_2
IfxPort_P30_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P30_3
IfxPort_P30_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P30_4
IfxPort_P30_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P30_5
IfxPort_P30_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P30_6
IfxPort_P30_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P30_7
IfxPort_P30_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P30_8
IfxPort_P30_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P30_9
IfxPort_P30_9. More...
IFX_EXTERN IfxPort_Pin IfxPort_P31_0
IfxPort_P31_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P31_1
IfxPort_P31_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P31_10
IfxPort_P31_10. More...
IFX_EXTERN IfxPort_Pin IfxPort_P31_11
IfxPort_P31_11. More...
IFX_EXTERN IfxPort_Pin IfxPort_P31_12
IfxPort_P31_12. More...
IFX_EXTERN IfxPort_Pin IfxPort_P31_13
IfxPort_P31_13. More...
IFX_EXTERN IfxPort_Pin IfxPort_P31_14
IfxPort_P31_14. More...
IFX_EXTERN IfxPort_Pin IfxPort_P31_15
IfxPort_P31_15. More...
IFX_EXTERN IfxPort_Pin IfxPort_P31_2
IfxPort_P31_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P31_3
IfxPort_P31_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P31_4
IfxPort_P31_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P31_5
IfxPort_P31_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P31_6
IfxPort_P31_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P31_7
IfxPort_P31_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P31_8
IfxPort_P31_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P31_9
IfxPort_P31_9. More...
IFX_EXTERN IfxPort_Pin IfxPort_P32_0
IfxPort_P32_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P32_1
IfxPort_P32_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P32_2
IfxPort_P32_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P32_3
IfxPort_P32_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P32_4
IfxPort_P32_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P32_5
IfxPort_P32_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P32_6
IfxPort_P32_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P32_7
IfxPort_P32_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_0
IfxPort_P33_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_1
IfxPort_P33_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_10
IfxPort_P33_10. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_11
IfxPort_P33_11. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_12
IfxPort_P33_12. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_13
IfxPort_P33_13. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_14
IfxPort_P33_14. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_15
IfxPort_P33_15. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_2
IfxPort_P33_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_3
IfxPort_P33_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_4
IfxPort_P33_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_5
IfxPort_P33_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_6
IfxPort_P33_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_7
IfxPort_P33_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_8
IfxPort_P33_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_9
IfxPort_P33_9. More...
IFX_EXTERN IfxPort_Pin IfxPort_P34_1
IfxPort_P34_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P34_2
IfxPort_P34_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P34_3
IfxPort_P34_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P34_4
IfxPort_P34_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P34_5
IfxPort_P34_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_0
IfxPort_P40_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_1
IfxPort_P40_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_10
IfxPort_P40_10. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_11
IfxPort_P40_11. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_12
IfxPort_P40_12. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_13
IfxPort_P40_13. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_14
IfxPort_P40_14. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_15
IfxPort_P40_15. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_2
IfxPort_P40_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_3
IfxPort_P40_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_4
IfxPort_P40_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_5
IfxPort_P40_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_6
IfxPort_P40_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_7
IfxPort_P40_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_8
IfxPort_P40_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_9
IfxPort_P40_9. More...
IFX_EXTERN IfxPort_Pin IfxPort_P41_0
IfxPort_P41_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P41_1
IfxPort_P41_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P41_2
IfxPort_P41_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P41_3
IfxPort_P41_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P41_4
IfxPort_P41_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P41_5
IfxPort_P41_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P41_6
IfxPort_P41_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P41_7
IfxPort_P41_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P41_8
IfxPort_P41_8. More...
IFX_EXTERN const IfxPort_Pin * IfxPort_Pin_pinTable [IFXPORT_PINMAP_NUM_MODULES][IFXPORT_PINMAP_PIN_NUM_ITEMS]
IfxPort_Pin table. More...

Detailed Description

PORT I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPort_PinMap.h.


iLLD_TC38A: IfxPort_Io.h File Reference

  • Port
  • Io
Data Structures | Functions
IfxPort_Io.h File Reference
iLLD » PORTS

PORT IO details. More...

#include "Port/Std/IfxPort.h"
Include dependency graph for IfxPort_Io.h:

Go to the source code of this file.

Data Structures

struct | IfxPort_Io_ConfigPin
struct | IfxPort_Io_Config

Functions

IFX_EXTERN void IfxPort_Io_initModule (const IfxPort_Io_Config *config)

Detailed Description

PORT IO details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPort_Io.h.


iLLD_TC38A: IfxPort.h File Reference

  • Port
  • Std
Data Structures | Enumerations | Functions
IfxPort.h File Reference
iLLD » PORTS

PORT basic functionality. More...

#include "_Impl/IfxPort_cfg.h"
#include "Scu/Std/IfxScuWdt.h"
#include "_Utilities/Ifx_Assert.h"
Include dependency graph for IfxPort.h:

Go to the source code of this file.

Data Structures

struct | IfxPort_LvdsConfig
To Configure LVDS mode. More...
struct | IfxPort_Pin
Defines a pin. More...
struct | IfxPort_Pin_Config
To configure pins. More...

Enumerations

enum IfxPort_ControlledBy {
IfxPort_ControlledBy_port = 0,
IfxPort_ControlledBy_hsct = 1
}
The LVDS RX_DIS control function can be selected from the Port (default) or HSCT module.declared in MODULE_PORTx.LPCRx. More...
enum IfxPort_InputMode {
IfxPort_InputMode_undefined = -1,
IfxPort_InputMode_noPullDevice = 0 << 3,
IfxPort_InputMode_pullDown = 1U << 3,
IfxPort_InputMode_pullUp = 2U << 3
}
Ifx_P output modification modes definition. More...
enum IfxPort_LvdsMode {
IfxPort_LvdsMode_high = 0,
IfxPort_LvdsMode_medium = 1
}
specifies LVDS-M or LVDS-H mode as declare in Register MODULE_PORT.LPCRx.LVDSM More...
enum IfxPort_Mode {
IfxPort_Mode_inputNoPullDevice = 0,
IfxPort_Mode_inputPullDown = 8U,
IfxPort_Mode_inputPullUp = 0x10U,
IfxPort_Mode_outputPushPullGeneral = 0x80U,
IfxPort_Mode_outputPushPullAlt1 = 0x88U,
IfxPort_Mode_outputPushPullAlt2 = 0x90U,
IfxPort_Mode_outputPushPullAlt3 = 0x98U,
IfxPort_Mode_outputPushPullAlt4 = 0xA0U,
IfxPort_Mode_outputPushPullAlt5 = 0xA8U,
IfxPort_Mode_outputPushPullAlt6 = 0xB0U,
IfxPort_Mode_outputPushPullAlt7 = 0xB8U,
IfxPort_Mode_outputOpenDrainGeneral = 0xC0U,
IfxPort_Mode_outputOpenDrainAlt1 = 0xC8U,
IfxPort_Mode_outputOpenDrainAlt2 = 0xD0U,
IfxPort_Mode_outputOpenDrainAlt3 = 0xD8U,
IfxPort_Mode_outputOpenDrainAlt4 = 0xE0U,
IfxPort_Mode_outputOpenDrainAlt5 = 0xE8U,
IfxPort_Mode_outputOpenDrainAlt6 = 0xF0U,
IfxPort_Mode_outputOpenDrainAlt7 = 0xF8U
}
Ifx_P input / output mode definition. More...
enum IfxPort_OutputIdx {
IfxPort_OutputIdx_general = 0x10U << 3,
IfxPort_OutputIdx_alt1 = 0x11U << 3,
IfxPort_OutputIdx_alt2 = 0x12U << 3,
IfxPort_OutputIdx_alt3 = 0x13U << 3,
IfxPort_OutputIdx_alt4 = 0x14U << 3,
IfxPort_OutputIdx_alt5 = 0x15U << 3,
IfxPort_OutputIdx_alt6 = 0x16U << 3,
IfxPort_OutputIdx_alt7 = 0x17U << 3
}
Pin output alternate index. More...
enum IfxPort_OutputMode {
IfxPort_OutputMode_pushPull = 0x10U << 3,
IfxPort_OutputMode_openDrain = 0x18U << 3,
IfxPort_OutputMode_none = 0
}
Pin output mode definition. More...
enum IfxPort_PadDriver {
IfxPort_PadDriver_cmosAutomotiveSpeed1 = 0,
IfxPort_PadDriver_cmosAutomotiveSpeed2 = 1,
IfxPort_PadDriver_cmosAutomotiveSpeed3 = 2,
IfxPort_PadDriver_cmosAutomotiveSpeed4 = 3,
IfxPort_PadDriver_ttlSpeed1 = 8,
IfxPort_PadDriver_ttlSpeed2 = 9,
IfxPort_PadDriver_ttlSpeed3 = 10,
IfxPort_PadDriver_ttlSpeed4 = 11,
IfxPort_PadDriver_ttl3v3Speed1 = 12,
IfxPort_PadDriver_ttl3v3Speed2 = 13,
IfxPort_PadDriver_ttl3v3Speed3 = 14,
IfxPort_PadDriver_ttl3v3Speed4 = 15
}
Pad driver mode definition (strength and slew rate). More...
enum IfxPort_PadSupply {
IfxPort_PadSupply_3v = 0,
IfxPort_PadSupply_5v = 1
}
MODULE_PORTx.LPCRx.B.PS1.Selects between 5v and 3.3v on Vext supply for the LVDSM pair. More...
enum IfxPort_PinFunctionMode {
IfxPort_PinFunctionMode_digital = 0,
IfxPort_PinFunctionMode_analog = 1
}
enable analog/digital mode for port pin, as Defined in MODULE_PORTx.PDISC More...
enum IfxPort_State {
IfxPort_State_notChanged = (0 << 16) | (0 << 0),
IfxPort_State_high = (0 << 16) | (1U << 0),
IfxPort_State_low = (1U << 16) | (0 << 0),
IfxPort_State_toggled = (1U << 16) | (1U << 0)
}
Ifx_P output modification modes definition. More...
enum IfxPort_LvdsDirection {
IfxPort_LvdsDirection_rx = 0,
IfxPort_LvdsDirection_tx = 1
}
Enable/DIsable LVDS direction TX or RX. More...
enum IfxPort_LvdsPath {
IfxPort_LvdsPath_enable = 0,
IfxPort_LvdsPath_disable = 1
}
Enable/DIsable LVDS Path.declared in MODULE_PORTx.LPCRx.TX_EN and MODULE_PORTx.LPCRx.RX_EN. More...
enum IfxPort_LvdsPullDown {
IfxPort_LvdsPullDown_disable = 0,
IfxPort_LvdsPullDown_enable = 1
}
Specifies whether LVDS pull down resistor must be enabled/disabled as declared in Register MODULE_PORT.LPCRx.PWDPD. More...
enum IfxPort_LvdsTerminationMode {
IfxPort_LvdsTerminationMode_external = 0,
IfxPort_LvdsTerminationMode_internal = 1
}
Specifies LVDS-Termination mode as declare in Register MODULE_PORT.LPCRx.TERM. More...

Functions

IFX_INLINE boolean | IfxPort_getPinState (Ifx_P *port, uint8 pinIndex)
Return the port state. More...
IFX_INLINE void | IfxPort_setPinFunctionMode (Ifx_P *port, uint8 pinIndex, IfxPort_PinFunctionMode mode)
set analog/digital mode for pin More...
IFX_INLINE void | IfxPort_setPinHigh (Ifx_P *port, uint8 pinIndex)
Set the port output. More...
IFX_INLINE void | IfxPort_setPinLow (Ifx_P *port, uint8 pinIndex)
Reset the port output. More...
IFX_INLINE void | IfxPort_setPinModeInput (Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode. More...
IFX_INLINE void | IfxPort_setPinModeOutput (Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode. More...
IFX_INLINE void | IfxPort_setPinState (Ifx_P *port, uint8 pinIndex, IfxPort_State action)
Set / Resets / Toggle the port output. More...
IFX_INLINE void | IfxPort_togglePin (Ifx_P *port, uint8 pinIndex)
Toggle the port output. More...
IFX_EXTERN boolean | IfxPort_disableEmergencyStop (Ifx_P *port, uint8 pinIndex)
Disable the emergency stop function. This function disables the emergency stop function. A check is done on port functionality. More...
IFX_EXTERN boolean | IfxPort_enableEmergencyStop (Ifx_P *port, uint8 pinIndex)
Enable the emergency stop function. This function enables the emergency stop function. A check is done on port functionality. More...
IFX_EXTERN void | IfxPort_setPinMode (Ifx_P *port, uint8 pinIndex, IfxPort_Mode mode)
Configure the port input / output mode. Also Configures the P40/P41 Port for digital functionality which bydefault support analog functionality. More...
IFX_EXTERN void | IfxPort_setPinModeLVDS (Ifx_P *port, uint8 pinIndex, IfxPort_Mode pinMode, IfxPort_LvdsConfig *lvds)
set lvds mode More...
IFX_EXTERN void | IfxPort_setPinPadDriver (Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode. More...
IFX_EXTERN void | IfxPort_setPinControllerSelection (Ifx_P *port, uint8 pinIndex)
Enable the Pin Controller Selection. More...
IFX_EXTERN void | IfxPort_resetPinControllerSelection (Ifx_P *port, uint8 pinIndex)
Disable the Pin Controller Selection. More...
IFX_INLINE uint32 | IfxPort_getGroupState (Ifx_P *port, uint8 pinIndex, uint16 mask)
Return the port group state. More...
IFX_INLINE void | IfxPort_setGroupState (Ifx_P *port, uint8 pinIndex, uint16 mask, uint16 data)
Set the port group state. More...
IFX_EXTERN Ifx_P * | IfxPort_getAddress (IfxPort_Index port)
Returns the module address of the selected Port module. More...
IFX_EXTERN IfxPort_Index | IfxPort_getIndex (Ifx_P *port)
Return port index within IfxModule_IndexMap (defined in IfxPort_cfg.c) More...
IFX_EXTERN void | IfxPort_setGroupModeInput (Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_InputMode mode)
Set pin modes to input at the pin location specified by '1' by the mask. More...
IFX_EXTERN void | IfxPort_setGroupModeOutput (Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Set pin modes to output at the pin location specified by '1' by the mask starting at pinIndex. More...
IFX_EXTERN void | IfxPort_setGroupPadDriver (Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_PadDriver padDriver)
Set pad driver strength at the pin location specified by '1' by the mask. More...
IFX_EXTERN void | IfxPort_resetESR (Ifx_P *port, uint8 pinIndex)
Disable the emergency stop function. This function disables the emergency stop function. No check is done on port functionality. More...
IFX_EXTERN void | IfxPort_setESR (Ifx_P *port, uint8 pinIndex)
Enable the emergency stop function. This function enables the emergency stop function. No check is done on port functionality. More...
IFX_EXTERN void | IfxPort_modifyPinControllerSelection (Ifx_P *port, uint8 pinIndex, boolean mode)

Detailed Description

PORT basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPort.h.

Enumeration Type Documentation

◆ IfxPort_LvdsDirection

enum IfxPort_LvdsDirection

Enable/DIsable LVDS direction TX or RX.

Enumerator
IfxPort_LvdsDirection_rx | LVDS direction RX.
IfxPort_LvdsDirection_tx | LVDS direction TX.

Definition at line 199 of file IfxPort.h.

◆ IfxPort_LvdsPath

enum IfxPort_LvdsPath

Enable/DIsable LVDS Path.declared in MODULE_PORTx.LPCRx.TX_EN and MODULE_PORTx.LPCRx.RX_EN.

Enumerator
IfxPort_LvdsPath_enable | LVDS enabled.
IfxPort_LvdsPath_disable | LVDS disabled.

Definition at line 207 of file IfxPort.h.

◆ IfxPort_LvdsPullDown

enum IfxPort_LvdsPullDown

Specifies whether LVDS pull down resistor must be enabled/disabled as declared in Register MODULE_PORT.LPCRx.PWDPD.

Enumerator
IfxPort_LvdsPullDown_disable | Disable Pull Down resistor.
IfxPort_LvdsPullDown_enable | Enable Pull Down resistor.

Definition at line 215 of file IfxPort.h.

◆ IfxPort_LvdsTerminationMode

enum IfxPort_LvdsTerminationMode

Specifies LVDS-Termination mode as declare in Register MODULE_PORT.LPCRx.TERM.

Enumerator
IfxPort_LvdsTerminationMode_external | Termination Mode External.
IfxPort_LvdsTerminationMode_internal | Termination Mode Internal.

Definition at line 223 of file IfxPort.h.

Function Documentation

◆ IfxPort_modifyPinControllerSelection()

IFX_EXTERN void IfxPort_modifyPinControllerSelection | ( | Ifx_P * | port,
 |  | uint8 | pinIndex,
 |  | boolean | mode
 | ) |  |
Parameters
port | Pointer to the port which should be accessed.
pinIndex | Specifies the pin for which the mode has to be set.
mode | Selects the controller for the port pin(Tricore,EVADC,GETH,SCR etc) 0-> normal function 1-> Alternate functionality(SCR pin,EVADC PDD,GETH RGMII/MII etc)
Returns
None

Definition at line 438 of file IfxPort.c.

◆ IfxPort_resetESR()

IFX_EXTERN void IfxPort_resetESR | ( | Ifx_P * | port,
 |  | uint8 | pinIndex
 | ) |  |

Disable the emergency stop function. This function disables the emergency stop function. No check is done on port functionality.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | Specifies the pin for which the emergency stop function should be disabled.
Returns
None
See also
IfxPort_disableEmergencyStop()

Definition at line 135 of file IfxPort.c.

Referenced by IfxPort_disableEmergencyStop().

◆ IfxPort_setESR()

IFX_EXTERN void IfxPort_setESR | ( | Ifx_P * | port,
 |  | uint8 | pinIndex
 | ) |  |

Enable the emergency stop function. This function enables the emergency stop function. No check is done on port functionality.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | Specifies the pin for which the emergency stop function should be enabled.
Returns
None
See also
IfxPort_enableEmergencyStop()

Definition at line 145 of file IfxPort.c.

Referenced by IfxPort_enableEmergencyStop().


iLLD_TC38A: PSI5

Modules | Files
PSI5
iLLD
Collaboration diagram for PSI5:

Modules

Implementation
Standard Driver
PSI5 Pin Mapping
How to use the PSI5 PSI5 Interface driver?
PSI5

Files

file | IfxPsi5_cfg.h
PSI5 on-chip implementation data.
file | IfxPsi5_PinMap.c
PSI5 I/O map.
file | IfxPsi5_PinMap.h
PSI5 I/O map.
file | IfxPsi5_Psi5.h
PSI5 PSI5 details.
file | IfxPsi5.h
PSI5 basic functionality.

Detailed Description


iLLD_TC38A: Implementation

Modules
Implementation
iLLD » PSI5
Collaboration diagram for Implementation:

Modules

Enumerations

Detailed Description


iLLD_TC38A: Enumerations

Enumerations
iLLD » PSI5 » Implementation
Collaboration diagram for Enumerations:


iLLD_TC38A: Standard Driver

Modules
Standard Driver
iLLD » PSI5
Collaboration diagram for Standard Driver:

Modules

Enumerations
Channel Status Functions
IO Pin Configuration Functions
Interrupt configuration function
Operative functions

Detailed Description


iLLD_TC38A: Enumerations

Enumerations
Enumerations
iLLD » PSI5 » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxPsi5_AlternateInput {
IfxPsi5_AlternateInput_0 = 0,
IfxPsi5_AlternateInput_1,
IfxPsi5_AlternateInput_2,
IfxPsi5_AlternateInput_3
}
MODULE_PSI5.IOCRx.ALTI(x = 0,1,2),Alternate input selection. More...
enum IfxPsi5_BaudRate {
IfxPsi5_BaudRate_125 = 0,
IfxPsi5_BaudRate_189 = 1
}
MODULE_PSI5.RCRCx.BRS(x = 0,1,2),Baud rate selection. More...
enum IfxPsi5_CRCorParity {
IfxPsi5_CRCorParity_parity = 0,
IfxPsi5_CRCorParity_crc = 1
}
MODULE_PSI5.RCRBx.CRCy(x = 0,1,2; y=0,1,2,3,4,5),CRC or parity selection. More...
enum IfxPsi5_ClockType {
IfxPsi5_ClockType_fracDiv = 0,
IfxPsi5_ClockType_slowClock_125 = 1,
IfxPsi5_ClockType_fastClock_189 = 2,
IfxPsi5_ClockType_timeStamp = 3
}
Clock type. More...
enum IfxPsi5_DigitalInputFilterDepth {
IfxPsi5_DigitalInputFilterDepth_0 = 0,
IfxPsi5_DigitalInputFilterDepth_1,
IfxPsi5_DigitalInputFilterDepth_2,
IfxPsi5_DigitalInputFilterDepth_3,
IfxPsi5_DigitalInputFilterDepth_4,
IfxPsi5_DigitalInputFilterDepth_5,
IfxPsi5_DigitalInputFilterDepth_6,
IfxPsi5_DigitalInputFilterDepth_7,
IfxPsi5_DigitalInputFilterDepth_8,
IfxPsi5_DigitalInputFilterDepth_9,
IfxPsi5_DigitalInputFilterDepth_10,
IfxPsi5_DigitalInputFilterDepth_11,
IfxPsi5_DigitalInputFilterDepth_12,
IfxPsi5_DigitalInputFilterDepth_13,
IfxPsi5_DigitalInputFilterDepth_14,
IfxPsi5_DigitalInputFilterDepth_15
}
MODULE_PSI5.IOCRx.DEPTH(x = 0,1,2),Digital input filter depth. More...
enum IfxPsi5_DividerMode {
IfxPsi5_DividerMode_spb = 0,
IfxPsi5_DividerMode_normal = 1,
IfxPsi5_DividerMode_fractional = 2,
IfxPsi5_DividerMode_off = 3
}
MODULE_PSI5.FDR.DM,Divider mode. More...
enum IfxPsi5_FrameExpectation {
IfxPsi5_FrameExpectation_notExpected = 0,
IfxPsi5_FrameExpectation_expected = 1
}
MODULE_PSI5.RCRBx.FECy(x = 0,1,2; y=0,1,2,3,4,5),Frame expectation control. More...
enum IfxPsi5_InterruptNodePointer {
IfxPsi5_InterruptNodePointer_rsi = 0,
IfxPsi5_InterruptNodePointer_rdi = 1,
IfxPsi5_InterruptNodePointer_rbi = 2,
IfxPsi5_InterruptNodePointer_tdi = 3,
IfxPsi5_InterruptNodePointer_tbi = 4,
IfxPsi5_InterruptNodePointer_erri = 5,
IfxPsi5_InterruptNodePointer_sdi = 6,
IfxPsi5_InterruptNodePointer_fwi = 7
}
specifies interrupt node pointer defined in MODULE_PSI5.INP[x].U More...
enum IfxPsi5_InterruptRequest {
IfxPsi5_InterruptRequest_disabled = 0,
IfxPsi5_InterruptRequest_enabled = 1
}
Enable/Disable Interrupt Request.defined in MODULE_PSI5.INTENA[x]. More...
enum IfxPsi5_InterruptSource {
IfxPsi5_InterruptSource_rsi = 0,
IfxPsi5_InterruptSource_rdi = 1,
IfxPsi5_InterruptSource_rbi = 2,
IfxPsi5_InterruptSource_tei = 3,
IfxPsi5_InterruptSource_nbi = 4,
IfxPsi5_InterruptSource_mei = 5,
IfxPsi5_InterruptSource_crci = 6,
IfxPsi5_InterruptSource_fwi = 7,
IfxPsi5_InterruptSource_rui = 8,
IfxPsi5_InterruptSource_rmi = 9,
IfxPsi5_InterruptSource_tpi = 10,
IfxPsi5_InterruptSource_tpoi = 11,
IfxPsi5_InterruptSource_tsi = 12,
IfxPsi5_InterruptSource_tsoi = 13,
IfxPsi5_InterruptSource_toi = 14,
IfxPsi5_InterruptSource_tooi = 15,
IfxPsi5_InterruptSource_nfi = 16,
IfxPsi5_InterruptSource_wsi0 = 17,
IfxPsi5_InterruptSource_wsi1 = 18,
IfxPsi5_InterruptSource_wsi2 = 19,
IfxPsi5_InterruptSource_wsi3 = 20,
IfxPsi5_InterruptSource_wsi4 = 21,
IfxPsi5_InterruptSource_wsi5 = 22,
IfxPsi5_InterruptSource_sdi0 = 23,
IfxPsi5_InterruptSource_sdi1 = 24,
IfxPsi5_InterruptSource_sdi2 = 25,
IfxPsi5_InterruptSource_sdi3 = 26,
IfxPsi5_InterruptSource_sdi4 = 27,
IfxPsi5_InterruptSource_sdi5 = 28,
IfxPsi5_InterruptSource_soi0 = 29,
IfxPsi5_InterruptSource_soi1 = 30,
IfxPsi5_InterruptSource_soi2 = 31,
IfxPsi5_InterruptSource_soi3 = 32,
IfxPsi5_InterruptSource_soi4 = 33,
IfxPsi5_InterruptSource_soi5 = 34,
IfxPsi5_InterruptSource_scri0 = 35,
IfxPsi5_InterruptSource_scri1 = 36,
IfxPsi5_InterruptSource_scri2 = 37,
IfxPsi5_InterruptSource_scri3 = 38,
IfxPsi5_InterruptSource_scri4 = 39,
IfxPsi5_InterruptSource_scri5 = 40
}
enable the interrupt source of any interrupt of PSI5 Channel.specify in MODULE_PSI5.INTENA[x].U and MODULE_PSI5.INTENB[x].U More...
enum IfxPsi5_MessagingBits {
IfxPsi5_MessagingBits_absent = 0,
IfxPsi5_MessagingBits_present = 1
}
MODULE_PSI5.RCRBx.MSGy(x = 0,1,2; y=0,1,2,3,4,5),Messaging bits presence. More...
enum IfxPsi5_ReceiveDataRegisterTimestamp {
IfxPsi5_ReceiveDataRegisterTimestamp_pulse = 0,
IfxPsi5_ReceiveDataRegisterTimestamp_frame = 1
}
MODULE_PSI5.RCRCx.TSR(x = 0,1,2),Timestamp select for receive data registers. More...
enum IfxPsi5_SleepMode {
IfxPsi5_SleepMode_enable = 0,
IfxPsi5_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_PSI5.CLC.B.EDIS. More...
enum IfxPsi5_Slot {
IfxPsi5_Slot_0 = 0,
IfxPsi5_Slot_1,
IfxPsi5_Slot_2,
IfxPsi5_Slot_3,
IfxPsi5_Slot_4,
IfxPsi5_Slot_5
}
MODULE_PSI5.RDRHx.SC(x = 0-2),Slot Id. More...
enum IfxPsi5_SuspendMode {
IfxPsi5_SuspendMode_none = 0,
IfxPsi5_SuspendMode_hard = 1,
IfxPsi5_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxPsi5_TimeBase {
IfxPsi5_TimeBase_internal = 0,
IfxPsi5_TimeBase_external = 1
}
MODULE_PSI5.PGCx.TBS(x = 0,1,2),Time base. More...
enum IfxPsi5_TimestampRegister {
IfxPsi5_TimestampRegister_a = 0,
IfxPsi5_TimestampRegister_b = 1,
IfxPsi5_TimestampRegister_c = 2
}
MODULE_PSI5.RCRCx.TSP(x = 0,1,2),MODULE_PSI5.RCRCx.TSF(x = 0,1,2)Timestamp register type. More...
enum IfxPsi5_Trigger {
IfxPsi5_Trigger_0 = 0,
IfxPsi5_Trigger_1,
IfxPsi5_Trigger_2,
IfxPsi5_Trigger_3,
IfxPsi5_Trigger_4,
IfxPsi5_Trigger_5
}
MODULE_PSI5.PGCx.ETS(x = 0,1,2),Trigger Id. More...
enum IfxPsi5_TriggerOutput {
IfxPsi5_TriggerOutput_0 = 0,
IfxPsi5_TriggerOutput_1,
IfxPsi5_TriggerOutput_2,
IfxPsi5_TriggerOutput_3,
IfxPsi5_TriggerOutput_4,
IfxPsi5_TriggerOutput_5,
IfxPsi5_TriggerOutput_6,
IfxPsi5_TriggerOutput_7
}
Output line selected by node Pointer defined in MODULE_PSI5.INP[x].U. More...
enum IfxPsi5_TriggerType {
IfxPsi5_TriggerType_periodic = 0,
IfxPsi5_TriggerType_external = 1,
IfxPsi5_TriggerType_bypass = 2
}
Trigger type. More...
enum IfxPsi5_Verbose {
IfxPsi5_Verbose_off = 0,
IfxPsi5_Verbose_on = 1
}
MODULE_PSI5.RCRBx.VBSy(x = 0,1,2; y=0,1,2,3,4,5),Verbose mode. More...

Detailed Description

Enumeration Type Documentation

◆ IfxPsi5_AlternateInput

enum IfxPsi5_AlternateInput

MODULE_PSI5.IOCRx.ALTI(x = 0,1,2),Alternate input selection.

Enumerator
IfxPsi5_AlternateInput_0 | Alternate Input 0.
IfxPsi5_AlternateInput_1 | Alternate Input 1.
IfxPsi5_AlternateInput_2 | Alternate Input 2.
IfxPsi5_AlternateInput_3 | Alternate Input 3.

Definition at line 77 of file IfxPsi5.h.

◆ IfxPsi5_BaudRate

enum IfxPsi5_BaudRate

MODULE_PSI5.RCRCx.BRS(x = 0,1,2),Baud rate selection.

Enumerator
IfxPsi5_BaudRate_125 | Slow 125 kHz clock.
IfxPsi5_BaudRate_189 | Fast 189 kHz clock.

Definition at line 87 of file IfxPsi5.h.

◆ IfxPsi5_ClockType

enum IfxPsi5_ClockType

Clock type.

Enumerator
IfxPsi5_ClockType_fracDiv | Fractional Divide clock.
IfxPsi5_ClockType_slowClock_125 | Slow 125 kHz clock.
IfxPsi5_ClockType_fastClock_189 | Fast 189 kHz clock.
IfxPsi5_ClockType_timeStamp | Timestamp clock.

Definition at line 103 of file IfxPsi5.h.

◆ IfxPsi5_CRCorParity

enum IfxPsi5_CRCorParity

MODULE_PSI5.RCRBx.CRCy(x = 0,1,2; y=0,1,2,3,4,5),CRC or parity selection.

Enumerator
IfxPsi5_CRCorParity_parity | parity selection
IfxPsi5_CRCorParity_crc | CRC selection.

Definition at line 95 of file IfxPsi5.h.

◆ IfxPsi5_DigitalInputFilterDepth

enum IfxPsi5_DigitalInputFilterDepth

MODULE_PSI5.IOCRx.DEPTH(x = 0,1,2),Digital input filter depth.

Enumerator
IfxPsi5_DigitalInputFilterDepth_0 | Digital input filter depth is 0.
IfxPsi5_DigitalInputFilterDepth_1 | Digital input filter depth is 1.
IfxPsi5_DigitalInputFilterDepth_2 | Digital input filter depth is 2.
IfxPsi5_DigitalInputFilterDepth_3 | Digital input filter depth is 3.
IfxPsi5_DigitalInputFilterDepth_4 | Digital input filter depth is 4.
IfxPsi5_DigitalInputFilterDepth_5 | Digital input filter depth is 5.
IfxPsi5_DigitalInputFilterDepth_6 | Digital input filter depth is 6.
IfxPsi5_DigitalInputFilterDepth_7 | Digital input filter depth is 7.
IfxPsi5_DigitalInputFilterDepth_8 | Digital input filter depth is 8.
IfxPsi5_DigitalInputFilterDepth_9 | Digital input filter depth is 9.
IfxPsi5_DigitalInputFilterDepth_10 | Digital input filter depth is 10.
IfxPsi5_DigitalInputFilterDepth_11 | Digital input filter depth is 11.
IfxPsi5_DigitalInputFilterDepth_12 | Digital input filter depth is 12.
IfxPsi5_DigitalInputFilterDepth_13 | Digital input filter depth is 13.
IfxPsi5_DigitalInputFilterDepth_14 | Digital input filter depth is 14.
IfxPsi5_DigitalInputFilterDepth_15 | Digital input filter depth is 15.

Definition at line 113 of file IfxPsi5.h.

◆ IfxPsi5_DividerMode

enum IfxPsi5_DividerMode

MODULE_PSI5.FDR.DM,Divider mode.

Enumerator
IfxPsi5_DividerMode_spb | divider mode is off
IfxPsi5_DividerMode_normal | divider mode is normal
IfxPsi5_DividerMode_fractional | divider mode is fractional
IfxPsi5_DividerMode_off | divider mode is off

Definition at line 135 of file IfxPsi5.h.

◆ IfxPsi5_FrameExpectation

enum IfxPsi5_FrameExpectation

MODULE_PSI5.RCRBx.FECy(x = 0,1,2; y=0,1,2,3,4,5),Frame expectation control.

Enumerator
IfxPsi5_FrameExpectation_notExpected | No frame is expected.
IfxPsi5_FrameExpectation_expected | Frame is expected.

Definition at line 145 of file IfxPsi5.h.

◆ IfxPsi5_InterruptNodePointer

enum IfxPsi5_InterruptNodePointer

specifies interrupt node pointer defined in MODULE_PSI5.INP[x].U

Enumerator
IfxPsi5_InterruptNodePointer_rsi | Interrupt Node Pointer for Interrupt RSI.
IfxPsi5_InterruptNodePointer_rdi | Interrupt Node Pointer for Interrupt RDI.
IfxPsi5_InterruptNodePointer_rbi | Interrupt Node Pointer for Interrupt RBI.
IfxPsi5_InterruptNodePointer_tdi | Interrupt Node Pointer for Interrupt TDI.
IfxPsi5_InterruptNodePointer_tbi | Interrupt Node Pointer for Interrupt TBI.
IfxPsi5_InterruptNodePointer_erri | Interrupt Node Pointer for Interrupt ERRI.
IfxPsi5_InterruptNodePointer_sdi | Interrupt Node Pointer for Interrupt SDI.
IfxPsi5_InterruptNodePointer_fwi | Interrupt Node Pointer for Interrupt FWI.

Definition at line 153 of file IfxPsi5.h.

◆ IfxPsi5_InterruptRequest

enum IfxPsi5_InterruptRequest

Enable/Disable Interrupt Request.defined in MODULE_PSI5.INTENA[x].

Enumerator
IfxPsi5_InterruptRequest_disabled | No Interrupt Request can be generated for respective source.
IfxPsi5_InterruptRequest_enabled | An Interrupt Request can be generated for source.

Definition at line 167 of file IfxPsi5.h.

◆ IfxPsi5_InterruptSource

enum IfxPsi5_InterruptSource

enable the interrupt source of any interrupt of PSI5 Channel.specify in MODULE_PSI5.INTENA[x].U and MODULE_PSI5.INTENB[x].U

Enumerator
IfxPsi5_InterruptSource_rsi | Enable Interrupt Request RSI.
IfxPsi5_InterruptSource_rdi | Enable Interrupt Request RDI.
IfxPsi5_InterruptSource_rbi | Enable Interrupt Request RBI.
IfxPsi5_InterruptSource_tei | Enable Interrupt Request TEI.
IfxPsi5_InterruptSource_nbi | Enable Interrupt Request NBI.
IfxPsi5_InterruptSource_mei | Enable Interrupt Request MEI.
IfxPsi5_InterruptSource_crci | Enable Interrupt Request CRCI.
IfxPsi5_InterruptSource_fwi | Enable Interrupt Request FWI.
IfxPsi5_InterruptSource_rui | Enable Interrupt Request RUI.
IfxPsi5_InterruptSource_rmi | Enable Interrupt Request RMI.
IfxPsi5_InterruptSource_tpi | Enable Interrupt Request TPI.
IfxPsi5_InterruptSource_tpoi | Enable Interrupt Request TPOI.
IfxPsi5_InterruptSource_tsi | Enable Interrupt Request TSI.
IfxPsi5_InterruptSource_tsoi | Enable Interrupt Request TSOI.
IfxPsi5_InterruptSource_toi | Enable Interrupt Request TOI.
IfxPsi5_InterruptSource_tooi | Enable Interrupt Request TOOI.
IfxPsi5_InterruptSource_nfi | Enable Interrupt Request NFI.
IfxPsi5_InterruptSource_wsi0 | Enable Interrupt Request WSi0.
IfxPsi5_InterruptSource_wsi1 | Enable Interrupt Request WSI1.
IfxPsi5_InterruptSource_wsi2 | Enable Interrupt Request WSI2.
IfxPsi5_InterruptSource_wsi3 | Enable Interrupt Request WSI3.
IfxPsi5_InterruptSource_wsi4 | Enable Interrupt Request WSI4.
IfxPsi5_InterruptSource_wsi5 | Enable Interrupt Request WSI.
IfxPsi5_InterruptSource_sdi0 | Enable Interrupt Request SDI0.
IfxPsi5_InterruptSource_sdi1 | Enable Interrupt Request SDI1.
IfxPsi5_InterruptSource_sdi2 | Enable Interrupt Request SDI2.
IfxPsi5_InterruptSource_sdi3 | Enable Interrupt Request SDI3.
IfxPsi5_InterruptSource_sdi4 | Enable Interrupt Request SDI4.
IfxPsi5_InterruptSource_sdi5 | Enable Interrupt Request SDI5.
IfxPsi5_InterruptSource_soi0 | Enable Interrupt Request SOI0.
IfxPsi5_InterruptSource_soi1 | Enable Interrupt Request SOI1.
IfxPsi5_InterruptSource_soi2 | Enable Interrupt Request SOI2.
IfxPsi5_InterruptSource_soi3 | Enable Interrupt Request SOI3.
IfxPsi5_InterruptSource_soi4 | Enable Interrupt Request SOI4.
IfxPsi5_InterruptSource_soi5 | Enable Interrupt Request SOI4.
IfxPsi5_InterruptSource_scri0 | Enable Interrupt Request SCRI0.
IfxPsi5_InterruptSource_scri1 | Enable Interrupt Request SCRI1.
IfxPsi5_InterruptSource_scri2 | Enable Interrupt Request SCRI2.
IfxPsi5_InterruptSource_scri3 | Enable Interrupt Request SCRI3.
IfxPsi5_InterruptSource_scri4 | Enable Interrupt Request SCRI4.
IfxPsi5_InterruptSource_scri5 | Enable Interrupt Request SCRI5.

Definition at line 175 of file IfxPsi5.h.

◆ IfxPsi5_MessagingBits

enum IfxPsi5_MessagingBits

MODULE_PSI5.RCRBx.MSGy(x = 0,1,2; y=0,1,2,3,4,5),Messaging bits presence.

Enumerator
IfxPsi5_MessagingBits_absent | No messaging bits.
IfxPsi5_MessagingBits_present | 2 messaging bits

Definition at line 222 of file IfxPsi5.h.

◆ IfxPsi5_ReceiveDataRegisterTimestamp

enum IfxPsi5_ReceiveDataRegisterTimestamp

MODULE_PSI5.RCRCx.TSR(x = 0,1,2),Timestamp select for receive data registers.

Enumerator
IfxPsi5_ReceiveDataRegisterTimestamp_pulse | Pulse based timestamp SPTSC to be stored in RDRHC.
IfxPsi5_ReceiveDataRegisterTimestamp_frame | Start of frame based timestamp SPTSC to be stored in RDRHC.

Definition at line 230 of file IfxPsi5.h.

◆ IfxPsi5_SleepMode

enum IfxPsi5_SleepMode

Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_PSI5.CLC.B.EDIS.

Enumerator
IfxPsi5_SleepMode_enable | enables sleep mode
IfxPsi5_SleepMode_disable | disables sleep mode

Definition at line 239 of file IfxPsi5.h.

◆ IfxPsi5_Slot

enum IfxPsi5_Slot

MODULE_PSI5.RDRHx.SC(x = 0-2),Slot Id.

Enumerator
IfxPsi5_Slot_0 | slot 0
IfxPsi5_Slot_1 | slot 1
IfxPsi5_Slot_2 | slot 2
IfxPsi5_Slot_3 | slot 3
IfxPsi5_Slot_4 | slot 4
IfxPsi5_Slot_5 | slot 5

Definition at line 247 of file IfxPsi5.h.

◆ IfxPsi5_SuspendMode

enum IfxPsi5_SuspendMode

OCDS Suspend Control (OCDS.SUS)

Enumerator
IfxPsi5_SuspendMode_none | No suspend.
IfxPsi5_SuspendMode_hard | Hard Suspend.
IfxPsi5_SuspendMode_soft | Soft Suspend.

Definition at line 259 of file IfxPsi5.h.

◆ IfxPsi5_TimeBase

enum IfxPsi5_TimeBase

MODULE_PSI5.PGCx.TBS(x = 0,1,2),Time base.

Enumerator
IfxPsi5_TimeBase_internal | Internal time stamp clock.
IfxPsi5_TimeBase_external | External GTM inputs.

Definition at line 268 of file IfxPsi5.h.

◆ IfxPsi5_TimestampRegister

enum IfxPsi5_TimestampRegister

MODULE_PSI5.RCRCx.TSP(x = 0,1,2),MODULE_PSI5.RCRCx.TSF(x = 0,1,2)Timestamp register type.

Enumerator
IfxPsi5_TimestampRegister_a | Timestamp register A.
IfxPsi5_TimestampRegister_b | Timestamp register B.
IfxPsi5_TimestampRegister_c | Timestamp register C.

Definition at line 276 of file IfxPsi5.h.

◆ IfxPsi5_Trigger

enum IfxPsi5_Trigger

MODULE_PSI5.PGCx.ETS(x = 0,1,2),Trigger Id.

Enumerator
IfxPsi5_Trigger_0 | trigger 0
IfxPsi5_Trigger_1 | trigger 1
IfxPsi5_Trigger_2 | trigger 2
IfxPsi5_Trigger_3 | trigger 3
IfxPsi5_Trigger_4 | trigger 4
IfxPsi5_Trigger_5 | trigger 5

Definition at line 285 of file IfxPsi5.h.

◆ IfxPsi5_TriggerOutput

enum IfxPsi5_TriggerOutput

Output line selected by node Pointer defined in MODULE_PSI5.INP[x].U.

Enumerator
IfxPsi5_TriggerOutput_0 | Triggered output line is TRIGO_0.
IfxPsi5_TriggerOutput_1 | Triggered output line is TRIGO_1.
IfxPsi5_TriggerOutput_2 | Triggered output line is TRIGO_2.
IfxPsi5_TriggerOutput_3 | Triggered output line is TRIGO_3.
IfxPsi5_TriggerOutput_4 | Triggered output line is TRIGO_4.
IfxPsi5_TriggerOutput_5 | Triggered output line is TRIGO_5.
IfxPsi5_TriggerOutput_6 | Triggered output line is TRIGO_6.
IfxPsi5_TriggerOutput_7 | Triggered output line is TRIGO_7.

Definition at line 297 of file IfxPsi5.h.

◆ IfxPsi5_TriggerType

enum IfxPsi5_TriggerType

Trigger type.

Enumerator
IfxPsi5_TriggerType_periodic | Periodic trigger.
IfxPsi5_TriggerType_external | External trigger.
IfxPsi5_TriggerType_bypass | Bypassed trigger.

Definition at line 311 of file IfxPsi5.h.

◆ IfxPsi5_Verbose

enum IfxPsi5_Verbose

MODULE_PSI5.RCRBx.VBSy(x = 0,1,2; y=0,1,2,3,4,5),Verbose mode.

Enumerator
IfxPsi5_Verbose_off | Verbose mode is turned off.
IfxPsi5_Verbose_on | Verbose mode is turned on.

Definition at line 320 of file IfxPsi5.h.


iLLD_TC38A: Channel Status Functions

Functions
Channel Status Functions
iLLD » PSI5 » Standard Driver
Collaboration diagram for Channel Status Functions:

Functions

IFX_INLINE uint32 | IfxPsi5_getStatusCrci (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the CRCI status register contents for a channel More...
IFX_INLINE uint32 | IfxPsi5_getStatusMei (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the MEI status register contents for a channel More...
IFX_INLINE uint32 | IfxPsi5_getStatusNbi (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the NBI status register contents for a channel More...
IFX_INLINE uint32 | IfxPsi5_getStatusNfi (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the NFI status register contents for a channel More...
IFX_INLINE uint32 | IfxPsi5_getStatusRdi (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the RDI status register contents for a channel More...
IFX_INLINE uint32 | IfxPsi5_getStatusRmi (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the RMI status register contents for a channel More...
IFX_INLINE uint32 | IfxPsi5_getStatusRsi (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the RSI status register contents for a channel More...
IFX_INLINE uint32 | IfxPsi5_getStatusTei (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the TEI status register contents for a channel More...
IFX_INLINE void | IfxPsi5_setSleepMode (Ifx_PSI5 *psi5, IfxPsi5_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_EXTERN void | IfxPsi5_resetModule (Ifx_PSI5 *psi5)
resets PSI5 kernel More...

Detailed Description

Function Documentation

◆ IfxPsi5_getStatusCrci()

IFX_INLINE uint32 IfxPsi5_getStatusCrci | ( | Ifx_PSI5 * | psi5,
 |  | IfxPsi5_ChannelId | channel
 | ) |  |

access function to get the CRCI status register contents for a channel

Parameters
psi5 | pointer to the PSI5 register space
channel | channel Id
Returns
Crci status register contents

Definition at line 660 of file IfxPsi5.h.

◆ IfxPsi5_getStatusMei()

IFX_INLINE uint32 IfxPsi5_getStatusMei | ( | Ifx_PSI5 * | psi5,
 |  | IfxPsi5_ChannelId | channel
 | ) |  |

access function to get the MEI status register contents for a channel

Parameters
psi5 | pointer to the PSI5 register space
channel | channel Id
Returns
Mei status register contents

Definition at line 666 of file IfxPsi5.h.

◆ IfxPsi5_getStatusNbi()

IFX_INLINE uint32 IfxPsi5_getStatusNbi | ( | Ifx_PSI5 * | psi5,
 |  | IfxPsi5_ChannelId | channel
 | ) |  |

access function to get the NBI status register contents for a channel

Parameters
psi5 | pointer to the PSI5 register space
channel | channel Id
Returns
Nbi status register contents

Definition at line 672 of file IfxPsi5.h.

◆ IfxPsi5_getStatusNfi()

IFX_INLINE uint32 IfxPsi5_getStatusNfi | ( | Ifx_PSI5 * | psi5,
 |  | IfxPsi5_ChannelId | channel
 | ) |  |

access function to get the NFI status register contents for a channel

Parameters
psi5 | pointer to the PSI5 register space
channel | channel Id
Returns
Nfi status register contents

Definition at line 678 of file IfxPsi5.h.

◆ IfxPsi5_getStatusRdi()

IFX_INLINE uint32 IfxPsi5_getStatusRdi | ( | Ifx_PSI5 * | psi5,
 |  | IfxPsi5_ChannelId | channel
 | ) |  |

access function to get the RDI status register contents for a channel

Parameters
psi5 | pointer to the PSI5 register space
channel | channel Id
Returns
Rdi status register contents

Definition at line 684 of file IfxPsi5.h.

◆ IfxPsi5_getStatusRmi()

IFX_INLINE uint32 IfxPsi5_getStatusRmi | ( | Ifx_PSI5 * | psi5,
 |  | IfxPsi5_ChannelId | channel
 | ) |  |

access function to get the RMI status register contents for a channel

Parameters
psi5 | pointer to the PSI5 register space
channel | channel Id
Returns
Rmi status register contents

Definition at line 690 of file IfxPsi5.h.

◆ IfxPsi5_getStatusRsi()

IFX_INLINE uint32 IfxPsi5_getStatusRsi | ( | Ifx_PSI5 * | psi5,
 |  | IfxPsi5_ChannelId | channel
 | ) |  |

access function to get the RSI status register contents for a channel

Parameters
psi5 | pointer to the PSI5 register space
channel | channel Id
Returns
Rsi status register contents

Definition at line 696 of file IfxPsi5.h.

◆ IfxPsi5_getStatusTei()

IFX_INLINE uint32 IfxPsi5_getStatusTei | ( | Ifx_PSI5 * | psi5,
 |  | IfxPsi5_ChannelId | channel
 | ) |  |

access function to get the TEI status register contents for a channel

Parameters
psi5 | pointer to the PSI5 register space
channel | channel Id
Returns
Tei status register contents

Definition at line 702 of file IfxPsi5.h.

◆ IfxPsi5_resetModule()

IFX_EXTERN void IfxPsi5_resetModule ( Ifx_PSI5 * psi5 )

resets PSI5 kernel

Parameters
psi5 pointer to PSI5 registers
Returns
None

Definition at line 81 of file IfxPsi5.c.

◆ IfxPsi5_setSleepMode()

IFX_INLINE void IfxPsi5_setSleepMode | ( | Ifx_PSI5 * | psi5,
 |  | IfxPsi5_SleepMode | mode
 | ) |  |

Sets the sensitivity of the module to sleep signal.

Parameters
psi5 | pointer to PSI5 registers
mode | mode selection (enable / disable)
Returns
None

Definition at line 749 of file IfxPsi5.h.


iLLD_TC38A: IO Pin Configuration Functions

Functions
IO Pin Configuration Functions
iLLD » PSI5 » Standard Driver
Collaboration diagram for IO Pin Configuration Functions:

Functions

IFX_INLINE void | IfxPsi5_initRxPin (const IfxPsi5_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a RX input. More...
IFX_INLINE void | IfxPsi5_initTxPin (const IfxPsi5_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a TX output. More...
IFX_INLINE void | IfxPsi5_setRxInput (Ifx_PSI5_CH *psi5Ch, IfxPsi5_AlternateInput alternateInput)
Sets the alternate RX input. More...

Detailed Description

Function Documentation

◆ IfxPsi5_initRxPin()

IFX_INLINE void IfxPsi5_initRxPin | ( | const IfxPsi5_Rx_In * | rx,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a RX input.

Parameters
rx | the RX Pin which should be configured
inputMode | pin input mode which should be configured
padDriver | Pad Driver Configuration
Returns
None

Definition at line 708 of file IfxPsi5.h.

Referenced by IfxPsi5_Psi5_initChannel().

◆ IfxPsi5_initTxPin()

IFX_INLINE void IfxPsi5_initTxPin | ( | const IfxPsi5_Tx_Out * | tx,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a TX output.

Parameters
tx | the TX Pin which should be configured
outputMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 721 of file IfxPsi5.h.

Referenced by IfxPsi5_Psi5_initChannel().

◆ IfxPsi5_setRxInput()

IFX_INLINE void IfxPsi5_setRxInput | ( | Ifx_PSI5_CH * | psi5Ch,
 |  | IfxPsi5_AlternateInput | alternateInput
 | ) |  |

Sets the alternate RX input.

Parameters
psi5Ch | pointer to the PSI5 channel register space
alternateInput | Alternate RX input selection
Returns
None

Definition at line 740 of file IfxPsi5.h.

Referenced by IfxPsi5_initRxPin().


iLLD_TC38A: Interrupt configuration function

Functions
Interrupt configuration function
iLLD » PSI5 » Standard Driver
Collaboration diagram for Interrupt configuration function:

Functions

IFX_INLINE void | IfxPsi5_setInterruptNodePointer (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel, IfxPsi5_InterruptNodePointer nodePointer, IfxPsi5_TriggerOutput triggerOutputLine)
set respective service line for Interrupt source More...
IFX_EXTERN void | IfxPsi5_enableInterrupt (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel, IfxPsi5_InterruptSource interruptSource, IfxPsi5_InterruptRequest enabled)
enable/disable interrupt source More...

Detailed Description

Function Documentation

◆ IfxPsi5_enableInterrupt()

IFX_EXTERN void IfxPsi5_enableInterrupt | ( | Ifx_PSI5 * | psi5,
 |  | IfxPsi5_ChannelId | channel,
 |  | IfxPsi5_InterruptSource | interruptSource,
 |  | IfxPsi5_InterruptRequest | enabled
 | ) |  |

enable/disable interrupt source

Parameters
psi5 | pointer to PSI5 module
channel | specifies channel ID
interruptSource | specifies the interrupt source
enabled | Enable/Disable the respective source
Returns
None

Definition at line 63 of file IfxPsi5.c.

◆ IfxPsi5_setInterruptNodePointer()

IFX_INLINE void IfxPsi5_setInterruptNodePointer | ( | Ifx_PSI5 * | psi5,
 |  | IfxPsi5_ChannelId | channel,
 |  | IfxPsi5_InterruptNodePointer | nodePointer,
 |  | IfxPsi5_TriggerOutput | triggerOutputLine
 | ) |  |

set respective service line for Interrupt source

Parameters
psi5 | Pointer to PSI5 module
channel | specifies channel ID
nodePointer | specifies node pointer for respective interrupt source
triggerOutputLine | specifies trigger output line
Returns
None

Definition at line 731 of file IfxPsi5.h.


iLLD_TC38A: Operative functions

Functions
Operative functions
iLLD » PSI5 » Standard Driver
Collaboration diagram for Operative functions:

Functions

IFX_INLINE boolean | IfxPsi5_isModuleSuspended (Ifx_PSI5 *psi5)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxPsi5_setSuspendMode (Ifx_PSI5 *psi5, IfxPsi5_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN void | IfxPsi5_disableModule (Ifx_PSI5 *psi5)
Disable PSI5 kernel. More...

Detailed Description

Function Documentation

◆ IfxPsi5_disableModule()

IFX_EXTERN void IfxPsi5_disableModule ( Ifx_PSI5 * psi5 )

Disable PSI5 kernel.

Parameters
psi5 pointer to the base of PSI5 registers
Returns
None

Definition at line 54 of file IfxPsi5.c.

◆ IfxPsi5_isModuleSuspended()

IFX_INLINE boolean IfxPsi5_isModuleSuspended ( Ifx_PSI5 * psi5 )

Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended.

Parameters
psi5 Pointer to PSI5 module registers
Returns
Suspend status (TRUE / FALSE)

Definition at line 758 of file IfxPsi5.h.

◆ IfxPsi5_setSuspendMode()

IFX_INLINE void IfxPsi5_setSuspendMode | ( | Ifx_PSI5 * | psi5,
 |  | IfxPsi5_SuspendMode | mode
 | ) |  |

Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.

Parameters
psi5 | Pointer to PSI5 module registers
mode | Module suspend mode
Returns
None

Definition at line 770 of file IfxPsi5.h.


iLLD_TC38A: PSI5 Pin Mapping

Data Structures | Macros | Variables
PSI5 Pin Mapping
iLLD » PSI5
Collaboration diagram for PSI5 Pin Mapping:

Data Structures

struct | IfxPsi5_Rx_In
RX pin mapping structure. More...
struct | IfxPsi5_Tx_Out
TX pin mapping structure. More...

Macros

#define | IFXPSI5_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXPSI5_PINMAP_NUM_CHANNELS 4
#define | IFXPSI5_PINMAP_RX_IN_NUM_ITEMS 3
#define | IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS 3

Variables

IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX0A_P00_1_IN
RXD inputs (receive data) channel 0. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX0B_P02_3_IN
RXD inputs (receive data) channel 0. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX0C_P33_1_IN
RXD inputs (receive data) channel 0. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX1A_P00_3_IN
RXD inputs (receive data) channel 1. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX1B_P02_5_IN
RXD inputs (receive data) channel 1. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX1C_P33_3_IN
RXD inputs (receive data) channel 1. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX2A_P00_5_IN
RXD inputs (receive data) channel 2. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX2B_P02_7_IN
RXD inputs (receive data) channel 2. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX2C_P33_5_IN
RXD inputs (receive data) channel 2. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX3A_P13_10_IN
RXD inputs (receive data) channel 3. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX3B_P13_13_IN
RXD inputs (receive data) channel 3. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX3C_P10_6_IN
RXD inputs (receive data) channel 3. More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX0_P00_2_OUT
TXD outputs (send data) More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX0_P02_2_OUT
TXD outputs (send data) More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX0_P33_2_OUT
TXD outputs (send data) More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX1_P00_4_OUT
TXD outputs (send data) More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX1_P02_6_OUT
TXD outputs (send data) More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX1_P33_4_OUT
TXD outputs (send data) More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX2_P00_6_OUT
TXD outputs (send data) More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX2_P02_8_OUT
TXD outputs (send data) More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX2_P33_6_OUT
TXD outputs (send data) More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX3_P10_5_OUT
TXD outputs (send data) More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX3_P13_11_OUT
TXD outputs (send data) More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX3_P13_15_OUT
TXD outputs (send data) More...
IFX_EXTERN const IfxPsi5_Rx_In * | IfxPsi5_Rx_In_pinTable [IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_RX_IN_NUM_ITEMS]
IfxPsi5_Rx_In table. More...
IFX_EXTERN const IfxPsi5_Tx_Out * | IfxPsi5_Tx_Out_pinTable [IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS]
IfxPsi5_Tx_Out table. More...

Detailed Description

Data Structure Documentation

◆ IfxPsi5_Rx_In

struct IfxPsi5_Rx_In

RX pin mapping structure.

Definition at line 56 of file IfxPsi5_PinMap.h.

Collaboration diagram for IfxPsi5_Rx_In:
[legend]
Data Fields
IfxPsi5_ChannelId | channelId | Channel ID.
Ifx_PSI5 * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxPsi5_Tx_Out

struct IfxPsi5_Tx_Out

TX pin mapping structure.

Definition at line 65 of file IfxPsi5_PinMap.h.

Collaboration diagram for IfxPsi5_Tx_Out:
[legend]
Data Fields
IfxPsi5_ChannelId | channelId | Channel ID.
Ifx_PSI5 * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

Macro Definition Documentation

◆ IFXPSI5_PINMAP_NUM_CHANNELS

#define IFXPSI5_PINMAP_NUM_CHANNELS 4

Definition at line 100 of file IfxPsi5_PinMap.h.

◆ IFXPSI5_PINMAP_NUM_MODULES

#define IFXPSI5_PINMAP_NUM_MODULES 1

Table dimensions.

Definition at line 99 of file IfxPsi5_PinMap.h.

◆ IFXPSI5_PINMAP_RX_IN_NUM_ITEMS

#define IFXPSI5_PINMAP_RX_IN_NUM_ITEMS 3

Definition at line 101 of file IfxPsi5_PinMap.h.

◆ IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS

#define IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS 3

Definition at line 102 of file IfxPsi5_PinMap.h.

Variable Documentation

◆ IfxPsi5_RX0A_P00_1_IN

IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX0A_P00_1_IN

RXD inputs (receive data) channel 0.

Definition at line 73 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_RX0B_P02_3_IN

IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX0B_P02_3_IN

RXD inputs (receive data) channel 0.

Definition at line 74 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_RX0C_P33_1_IN

IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX0C_P33_1_IN

RXD inputs (receive data) channel 0.

Definition at line 75 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_RX1A_P00_3_IN

IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX1A_P00_3_IN

RXD inputs (receive data) channel 1.

Definition at line 76 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_RX1B_P02_5_IN

IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX1B_P02_5_IN

RXD inputs (receive data) channel 1.

Definition at line 77 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_RX1C_P33_3_IN

IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX1C_P33_3_IN

RXD inputs (receive data) channel 1.

Definition at line 78 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_RX2A_P00_5_IN

IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX2A_P00_5_IN

RXD inputs (receive data) channel 2.

Definition at line 79 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_RX2B_P02_7_IN

IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX2B_P02_7_IN

RXD inputs (receive data) channel 2.

Definition at line 80 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_RX2C_P33_5_IN

IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX2C_P33_5_IN

RXD inputs (receive data) channel 2.

Definition at line 81 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_RX3A_P13_10_IN

IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX3A_P13_10_IN

RXD inputs (receive data) channel 3.

Definition at line 82 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_RX3B_P13_13_IN

IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX3B_P13_13_IN

RXD inputs (receive data) channel 3.

Definition at line 83 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_RX3C_P10_6_IN

IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX3C_P10_6_IN

RXD inputs (receive data) channel 3.

Definition at line 84 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_Rx_In_pinTable

IFX_EXTERN const IfxPsi5_Rx_In* IfxPsi5_Rx_In_pinTable[IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_RX_IN_NUM_ITEMS]

IfxPsi5_Rx_In table.

Definition at line 106 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_TX0_P00_2_OUT

IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX0_P00_2_OUT

TXD outputs (send data)

Definition at line 85 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_TX0_P02_2_OUT

IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX0_P02_2_OUT

TXD outputs (send data)

Definition at line 86 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_TX0_P33_2_OUT

IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX0_P33_2_OUT

TXD outputs (send data)

Definition at line 87 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_TX1_P00_4_OUT

IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX1_P00_4_OUT

TXD outputs (send data)

Definition at line 88 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_TX1_P02_6_OUT

IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX1_P02_6_OUT

TXD outputs (send data)

Definition at line 89 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_TX1_P33_4_OUT

IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX1_P33_4_OUT

TXD outputs (send data)

Definition at line 90 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_TX2_P00_6_OUT

IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX2_P00_6_OUT

TXD outputs (send data)

Definition at line 91 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_TX2_P02_8_OUT

IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX2_P02_8_OUT

TXD outputs (send data)

Definition at line 92 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_TX2_P33_6_OUT

IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX2_P33_6_OUT

TXD outputs (send data)

Definition at line 93 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_TX3_P10_5_OUT

IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX3_P10_5_OUT

TXD outputs (send data)

Definition at line 94 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_TX3_P13_11_OUT

IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX3_P13_11_OUT

TXD outputs (send data)

Definition at line 95 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_TX3_P13_15_OUT

IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX3_P13_15_OUT

TXD outputs (send data)

Definition at line 96 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_Tx_Out_pinTable

IFX_EXTERN const IfxPsi5_Tx_Out* IfxPsi5_Tx_Out_pinTable[IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS]

IfxPsi5_Tx_Out table.

Definition at line 109 of file IfxPsi5_PinMap.h.


iLLD_TC38A: How to use the PSI5 PSI5 Interface driver?

How to use the PSI5 PSI5 Interface driver?
iLLD » PSI5
Collaboration diagram for How to use the PSI5 PSI5 Interface driver?:

PSI5 communicates with the external world via one input/output line for each channel.

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Psi5/Psi5/IfxPsi5_Psi5.h>

Variables

//used globally

IfxPsi5_Psi5_Channel psi5Channel[IFXPSI5_PINMAP_NUM_CHANNELS];

Module Initialisation

// create module config
IfxPsi5_Psi5_Config psi5Config;
IfxPsi5_Psi5_initModuleConfig(&psi5Config, &MODULE_PSI5);
// initialize module
IfxPsi5_Psi5 psi5;
IfxPsi5_Psi5_initModule(&psi5, &psi5Config);

Channel Initialisation

// create channel config
IfxPsi5_Psi5_ChannelConfig psi5ChannelConfig;
IfxPsi5_Psi5_initChannelConfig(&psi5ChannelConfig, &psi5);
psi5ChannelConfig.watchdogTimerLimit[0] = 0x32; // initial delay before slot 0 starts
psi5ChannelConfig.watchdogTimerLimit[1] = 0x90;
psi5ChannelConfig.watchdogTimerLimit[2] = 0x10;
psi5ChannelConfig.watchdogTimerLimit[3] = 0x10;
psi5ChannelConfig.watchdogTimerLimit[4] = 0x10;
psi5ChannelConfig.watchdogTimerLimit[5] = 0x10;
psi5ChannelConfig.watchdogTimerLimit[6] = 0x10;
for(int slot=0; slot<6; ++slot) {
psi5ChannelConfig.receiveControl.payloadLength[slot] = 8;
if( slot == 0 )
psi5ChannelConfig.receiveControl.frameExpectation[slot] = IfxPsi5_FrameExpectation_expected;
else
psi5ChannelConfig.receiveControl.frameExpectation[slot] = IfxPsi5_FrameExpectation_notExpected;
}
// initialize channels
for(int chn=0; chn<IFXPSI5_PINMAP_NUM_CHANNELS; ++chn) {
psi5ChannelConfig.channelId = (IfxPsi5_ChannelId)chn;
// TODO: currently no IOCRx.ALTI config field
unsigned alti = 0;
IfxPsi5_Psi5_PinsConfig pinsConfig;
for(int module=0;module<IFXPSI5_PINMAP_NUM_MODULES;module++)
{
pinsConfig.in = IfxPsi5_Rx_In_pinTable[module][chn][alti];
pinsConfig.inMode = IfxPort_InputMode_pullUp;
pinsConfig.out = IfxPsi5_Tx_Out_pinTable[module][chn][alti];
}
pinsConfig.outMode = IfxPort_OutputMode_pushPull;
pinsConfig.pinDriver = IfxPort_PadDriver_cmosAutomotiveSpeed1;
psi5ChannelConfig.pinsConfig = &pinsConfig;
IfxPsi5_Psi5_initChannel(&psi5Channel[chn], &psi5ChannelConfig);
}

read channel frame

for(int i=0; i<5; ++i) {
for(int chn=0; chn<IFXPSI5_PINMAP_NUM_CHANNELS; ++chn) {
IfxPsi5_Psi5_Frame frame;
while( !IfxPsi5_Psi5_readChannelFrame(&psi5Channel[chn], &frame) );
}
}


iLLD_TC38A: PSI5

Modules
PSI5
iLLD » PSI5
Collaboration diagram for PSI5:

Modules

Data Structures
Module Initialisation functions
Channel functions
Clock Intialisation functions

Detailed Description


iLLD_TC38A: Data Structures

Data Structures
Data Structures
iLLD » PSI5 » PSI5
Collaboration diagram for Data Structures:

Data Structures

struct | IfxPsi5_Psi5
PSI5 handle data structure. More...
struct | IfxPsi5_Psi5_ChannelTrigger
channel trigger configuration structure More...
struct | IfxPsi5_Psi5_Clock
Clock configuration data structure. More...
struct | IfxPsi5_Psi5_FrameData
Psi5 frame data structure with individual members. More...
struct | IfxPsi5_Psi5_InputOutputControl
Input output configuration structure. More...
struct | IfxPsi5_Psi5_Message
Psi5 serial message with individual members. More...
struct | IfxPsi5_Psi5_PulseGeneration
Sync pulse generation configuration structure. More...
struct | IfxPsi5_Psi5_Rdm
Psi5 frame in double word format. More...
struct | IfxPsi5_Psi5_Rds
Psi5 serial message as unsigned 32 bit value. More...
struct | IfxPsi5_Psi5_ReceiveControl
Receive control configuration structure. More...
struct | IfxPsi5_Psi5_TimeStampConfig
Timestamp configuration data structure. More...
struct | IfxPsi5_Psi5_TransmitControl
Transmit control configuration structure. More...
struct | IfxPsi5_Psi5_Channel
Channel handle data structure. More...
struct | IfxPsi5_Psi5_ChannelConfig
Channel configuration structure. More...
struct | IfxPsi5_Psi5_Config
PSI5 module configuration structure. More...
union | IfxPsi5_Psi5_Frame
Psi5 frame data union. More...
union | IfxPsi5_Psi5_SerialMessage
Psi5 serial message data structure. More...
struct | IfxPsi5_Psi5_StartupOptions
startup related options TBD More...

Detailed Description

Data Structure Documentation

◆ IfxPsi5_Psi5

struct IfxPsi5_Psi5

PSI5 handle data structure.

Definition at line 163 of file IfxPsi5_Psi5.h.

Data Fields
Ifx_PSI5 * psi5 Specifies the pointer to the PSI5 module registers.

◆ IfxPsi5_Psi5_ChannelTrigger

struct IfxPsi5_Psi5_ChannelTrigger

channel trigger configuration structure

Definition at line 170 of file IfxPsi5_Psi5.h.

Data Fields
uint32 | channelTriggerCounter | Specifies the channel trigger counter.
uint32 | channelTriggerValue | Specifies the channel trigger value CTV.

◆ IfxPsi5_Psi5_Clock

struct IfxPsi5_Psi5_Clock

Clock configuration data structure.

Definition at line 178 of file IfxPsi5_Psi5.h.

Data Fields
uint32 | frequency | Specifies the frequency for the clock.
IfxPsi5_DividerMode | mode | Specifies the mode of division for the clock.
IfxPsi5_ClockType | type | Specifies the type of clock (fracDiv / slow 125kHz / fast 189 kHz / timestamp)

◆ IfxPsi5_Psi5_FrameData

struct IfxPsi5_Psi5_FrameData

Psi5 frame data structure with individual members.

Definition at line 187 of file IfxPsi5_Psi5.h.

Data Fields
uint8 | crc: 3 | Received crc.
uint8 | crcError: 1 | Crc error flag.
uint8 | messagingBitsError: 1 | Messaging bits error flag.
uint8 | noFrameReceivedError: 1 | No frame received flag.
uint8 | numberOfBitsError: 1 | Number of bits error flag.
uint32 | readData: 28 | Received data.
uint8 | receiveMemoryOverflowError: 1 | Receive buffer overflow error flag.
uint8 | slotCounter: 3 | Slot counter.
uint8 | timeslotError: 1 | Time slot error flag.
uint32 | timestamp: 24 | Timestamp.

◆ IfxPsi5_Psi5_InputOutputControl

struct IfxPsi5_Psi5_InputOutputControl

Input output configuration structure.

Definition at line 203 of file IfxPsi5_Psi5.h.

Data Fields
IfxPsi5_DigitalInputFilterDepth | digitalInputFilterDepth | Specifies the the number of port input samples considered for floating average.
boolean | inputInverterEnabled | Specifies the pulse polarity of the input.
boolean | outputInverterEnabled | Specifies the pulse polarity of the output.

◆ IfxPsi5_Psi5_Message

struct IfxPsi5_Psi5_Message

Psi5 serial message with individual members.

Definition at line 212 of file IfxPsi5_Psi5.h.

Data Fields
uint8 | configuration: 1 | Serial message configuration.
uint8 | crc: 6 | Serial message crc.
uint8 | messageId: 8 | Serial message Id.
uint16 | serialData: 16 | Serial message data.
uint8 | serialMessageCRCFailedError: 1 | Serial message crc error flag.

◆ IfxPsi5_Psi5_PulseGeneration

struct IfxPsi5_Psi5_PulseGeneration

Sync pulse generation configuration structure.

Definition at line 223 of file IfxPsi5_Psi5.h.

Data Fields
uint32 | blankoutTime | Specifies the duration of blank out period.
uint32 | delayLength | Specifies the additional length of the pulse width for coding a '1'.
IfxPsi5_Trigger | externalTimeBaseSelect | Specifies the clock source for CTV in the case of external.
IfxPsi5_Trigger | externalTriggerSelect | Specifies the trigger source in case of external triggerring.
IfxPsi5_TriggerType | periodicOrExternalOrBypass | Specifies whether periodic trigger or external trigger or bypass is selected.
uint32 | pulseLength | Specifies the standard pulse width without data coding for standard pulse width or for coding a '0'.
IfxPsi5_TimeBase | timeBaseSelect | Specifies the clock source for CTV as internal or external.

◆ IfxPsi5_Psi5_Rdm

struct IfxPsi5_Psi5_Rdm

Psi5 frame in double word format.

Definition at line 236 of file IfxPsi5_Psi5.h.

Data Fields
uint32 | highWord | Upper 32 bits of the Psi5 frame.
uint32 | lowWord | Lower 32 bits of the Psi5 frame.

◆ IfxPsi5_Psi5_Rds

struct IfxPsi5_Psi5_Rds

Psi5 serial message as unsigned 32 bit value.

Definition at line 244 of file IfxPsi5_Psi5.h.

Data Fields
uint32 value 32 bit value of the Psi5 serial message

◆ IfxPsi5_Psi5_ReceiveControl

struct IfxPsi5_Psi5_ReceiveControl

Receive control configuration structure.

Definition at line 251 of file IfxPsi5_Psi5.h.

Data Fields
boolean | asynchronousModeSelected | Specifies the asynchronous mode of operation.
IfxPsi5_BaudRate | baudrateSelect | Specifies the baudrate selection.
IfxPsi5_CRCorParity | crcOrParity[IFXPSI5_NUM_SLOTS] | Specifies the crc or parity selection for the slots 0 to 5.
uint32 | fifoWarningLevel | Specifies the fifo warning level.
IfxPsi5_FrameExpectation | frameExpectation[IFXPSI5_NUM_SLOTS] | Specifies whether the frame is expected or not in the slots 0 to 5.
IfxPsi5_TimestampRegister | frameTimestampSelect | Specifies the timestamp register selection for start of frames.
IfxPsi5_MessagingBits | messagingBitsPresence[IFXPSI5_NUM_SLOTS] | Specifies the presence or absence of messaging bits in the slots 0 to 5.
uint32 | payloadLength[IFXPSI5_NUM_SLOTS] | Specifies the payload length for the slots 0 to 5.
IfxPsi5_TimestampRegister | pulseTimestampSelect | Specifies the timestamp register selection for pulses.
IfxPsi5_ReceiveDataRegisterTimestamp | receiveDataRegisterTimestamp | Specifies the pulse or start of frame based timestamp to be stored in receive data register RDRH.
IfxPsi5_Verbose | verbose[IFXPSI5_NUM_SLOTS] | Specifies the verbose is enabled or disabled for the slots 0 to 5.
IfxPsi5_Verbose | verboseForAsynchronousMode | Specifies the verbose mode selection in asynchronous mode of operation.

◆ IfxPsi5_Psi5_TimeStampConfig

struct IfxPsi5_Psi5_TimeStampConfig

Timestamp configuration data structure.

Definition at line 269 of file IfxPsi5_Psi5.h.

Data Fields
IfxPsi5_Trigger | externalTimeBaseSelect | Specifies the clock base for counter CTS in the case of external.
IfxPsi5_TimeBase | timeBaseSelect | Specifies the clock source for CTS as internal or external.

◆ IfxPsi5_Psi5_TransmitControl

struct IfxPsi5_Psi5_TransmitControl

Transmit control configuration structure.

Definition at line 277 of file IfxPsi5_Psi5.h.

Data Fields
boolean | bitStuffingEnabled | Specifies whether the bit stuffing is turned on or not.
boolean | crcGenerationEnabled | Specifies whether the crc generation is turned on or not.
boolean | enhancedProtocolSelected | Specifies whether the enhanced protocol is selected or not.
boolean | inhibitingAutomaticTransferEnabled | Specifies whether automatic transfer from the shift registers SSRL/H to SORL/H is inhibited or not.
uint32 | payloadLength | Specifies the payload length to be sent.
uint32 | sorPayloadLength | Specifies the payload length of SOR.
uint32 | ssrPayloadLength | Specifies the payload length of SSR.
boolean | startSequenceGenerationEnabled | Specifies whether the start sequence generation is turned on or not.

◆ IfxPsi5_Psi5_Channel

struct IfxPsi5_Psi5_Channel

Channel handle data structure.

Definition at line 306 of file IfxPsi5_Psi5.h.

Collaboration diagram for IfxPsi5_Psi5_Channel:
[legend]
Data Fields
Ifx_PSI5_CH * | channel | Pointer to the channel registers.
IfxPsi5_ChannelId | channelId | Specifies the channel index.
IfxPsi5_Psi5 * | module | The PSI5 handle structure.

◆ IfxPsi5_Psi5_ChannelConfig

struct IfxPsi5_Psi5_ChannelConfig

Channel configuration structure.

Definition at line 315 of file IfxPsi5_Psi5.h.

Collaboration diagram for IfxPsi5_Psi5_ChannelConfig:
[legend]
Data Fields
IfxPsi5_ChannelId | channelId | Specifies the channel index.
IfxPsi5_Psi5_ChannelTrigger | channelTrigger | Specifies the configuration for channel trigger.
IfxPsi5_Psi5_InputOutputControl | inputOutputControl | Specifies the configuration for input output control.
IFX_CONST IfxPsi5_Psi5 * | module | Specifies pointer to the IfxPsi5_Psi5 module handle.
IFX_CONST IfxPsi5_Psi5_PinsConfig * | pinsConfig | Pin Configuration structure.
IfxPsi5_Psi5_PulseGeneration | pulseGeneration | Specifies the configuration for sync pulse generation.
IfxPsi5_Psi5_ReceiveControl | receiveControl | Specifies the configuration for reception.
IfxPsi5_Psi5_TransmitControl | sendControl | Specifies the configuration for transmission.
uint32 | watchdogTimerLimit[IFXPSI5_NUM_WDTS] | Specifies the watchdog timer limit for each of the slots 0 to 6.

◆ IfxPsi5_Psi5_Config

struct IfxPsi5_Psi5_Config

PSI5 module configuration structure.

Definition at line 330 of file IfxPsi5_Psi5.h.

Collaboration diagram for IfxPsi5_Psi5_Config:
[legend]
Data Fields
IfxPsi5_Psi5_Clock | fastClock | Specifies the faster f189 clock properties.
IfxPsi5_Psi5_Clock | fracDiv | Specifies fractionally divided clock properties.
Ifx_PSI5 * | psi5 | Specifies the pointer to the PSI5 module registers.
IfxPsi5_Psi5_Clock | slowClock | Specifies the slower f125 clock properties.
IfxPsi5_Psi5_Clock | timestampClock | Specifies the time stamp clock properties.
IfxPsi5_Psi5_TimeStampConfig | timestampCounterA | Specifies the time stamp counter A properties.
IfxPsi5_Psi5_TimeStampConfig | timestampCounterB | Specifies the time stamp counter B properties.
IfxPsi5_Psi5_TimeStampConfig | timestampCounterC | Specifies the time stamp counter C properties.

◆ IfxPsi5_Psi5_Frame

union IfxPsi5_Psi5_Frame

Psi5 frame data union.

Definition at line 344 of file IfxPsi5_Psi5.h.

Collaboration diagram for IfxPsi5_Psi5_Frame:
[legend]
Data Fields
IfxPsi5_Psi5_FrameData | frame | Psi5 frame data structure with individual members.
IfxPsi5_Psi5_Rdm | rdm | Psi5 frame in double word format.

◆ IfxPsi5_Psi5_SerialMessage

union IfxPsi5_Psi5_SerialMessage

Psi5 serial message data structure.

Definition at line 352 of file IfxPsi5_Psi5.h.

Collaboration diagram for IfxPsi5_Psi5_SerialMessage:
[legend]
Data Fields
IfxPsi5_Psi5_Message | message | Psi5 serial message with individual members.
IfxPsi5_Psi5_Rds | rds | Psi5 serial message as unsigned 32 bit value.

◆ IfxPsi5_Psi5_StartupOptions

struct IfxPsi5_Psi5_StartupOptions

startup related options TBD

Definition at line 360 of file IfxPsi5_Psi5.h.

Data Fields
uint8 | a: 1 | TBD.
uint32 | b: 31 | TBD.


iLLD_TC38A: Module Initialisation functions

Functions
Module Initialisation functions
iLLD » PSI5 » PSI5
Collaboration diagram for Module Initialisation functions:

Functions

IFX_EXTERN void | IfxPsi5_Psi5_deInitModule (IfxPsi5_Psi5 *psi5)
Resets the PSI5 module. More...
IFX_EXTERN void | IfxPsi5_Psi5_enableModule (Ifx_PSI5 *psi5)
Enable PSI5 kernel. More...
IFX_EXTERN boolean | IfxPsi5_Psi5_initModule (IfxPsi5_Psi5 *psi5, const IfxPsi5_Psi5_Config *config)
Initialise the PSI5 with the supplied configureation. More...
IFX_EXTERN void | IfxPsi5_Psi5_initModuleConfig (IfxPsi5_Psi5_Config *config, Ifx_PSI5 *psi5)
Initialise buffer with default PSI5 configuration. More...
IFX_EXTERN void | IfxPsi5_Psi5_resetModule (Ifx_PSI5 *psi5)
Reset PSI5 kernel. More...

Detailed Description

Function Documentation

◆ IfxPsi5_Psi5_deInitModule()

IFX_EXTERN void IfxPsi5_Psi5_deInitModule ( IfxPsi5_Psi5 * psi5 )

Resets the PSI5 module.

Parameters
psi5 pointer to the PSI5 module
Returns
None

Definition at line 54 of file IfxPsi5_Psi5.c.

◆ IfxPsi5_Psi5_enableModule()

IFX_EXTERN void IfxPsi5_Psi5_enableModule ( Ifx_PSI5 * psi5 )

Enable PSI5 kernel.

Parameters
psi5 pointer to the base of PSI5 registers
Returns
None

Definition at line 62 of file IfxPsi5_Psi5.c.

Referenced by IfxPsi5_Psi5_initModule().

◆ IfxPsi5_Psi5_initModule()

IFX_EXTERN boolean IfxPsi5_Psi5_initModule | ( | IfxPsi5_Psi5 * | psi5,
 |  | const IfxPsi5_Psi5_Config * | config
 | ) |  |

Initialise the PSI5 with the supplied configureation.

Parameters
psi5 | pointer to the PSI5 module
config | pointer to the PSI5 configuration
Returns
return TRUE on success & FALSE if configuration not valid

A coding example can be found in How to use the PSI5 PSI5 Interface driver?

Definition at line 330 of file IfxPsi5_Psi5.c.

◆ IfxPsi5_Psi5_initModuleConfig()

IFX_EXTERN void IfxPsi5_Psi5_initModuleConfig | ( | IfxPsi5_Psi5_Config * | config,
 |  | Ifx_PSI5 * | psi5
 | ) |  |

Initialise buffer with default PSI5 configuration.

Parameters
config | pointer to the PSI5 module configuration
psi5 | base address of the PSI5 register space
Returns
None

A coding example can be found in How to use the PSI5 PSI5 Interface driver?

Definition at line 383 of file IfxPsi5_Psi5.c.

◆ IfxPsi5_Psi5_resetModule()

IFX_EXTERN void IfxPsi5_Psi5_resetModule ( Ifx_PSI5 * psi5 )

Reset PSI5 kernel.

Parameters
psi5 pointer to the base of PSI5 registers
Returns
None

Definition at line 540 of file IfxPsi5_Psi5.c.

Referenced by IfxPsi5_Psi5_deInitModule().


iLLD_TC38A: Channel functions

Functions
Channel functions
iLLD » PSI5 » PSI5
Collaboration diagram for Channel functions:

Functions

IFX_INLINE boolean | IfxPsi5_Psi5_startupChannel (IfxPsi5_Psi5_Channel *channel, IfxPsi5_Psi5_StartupOptions *options)
start the channel with the selected options More...
IFX_EXTERN boolean | IfxPsi5_Psi5_initChannel (IfxPsi5_Psi5_Channel *channel, const IfxPsi5_Psi5_ChannelConfig *config)
Initialize the channel with the supplied configuration. More...
IFX_EXTERN void | IfxPsi5_Psi5_initChannelConfig (IfxPsi5_Psi5_ChannelConfig *config, IfxPsi5_Psi5 *psi5)
Get the current channel configuration (e.g. sample settings) More...
IFX_EXTERN boolean | IfxPsi5_Psi5_readChannelFrame (IfxPsi5_Psi5_Channel *channel, IfxPsi5_Psi5_Frame *frame)
Gets the received psi5 frame for the channel. More...
IFX_EXTERN boolean | IfxPsi5_Psi5_readChannelSerialMessage (IfxPsi5_Psi5_Channel *channel, IfxPsi5_Slot slot, IfxPsi5_Psi5_SerialMessage *message)
Get the received serial message for the channel. More...
IFX_EXTERN boolean | IfxPsi5_Psi5_sendChannelData (IfxPsi5_Psi5_Channel *channel, uint64 data)
Transmit the data through the channel. More...

Detailed Description

Function Documentation

◆ IfxPsi5_Psi5_initChannel()

IFX_EXTERN boolean IfxPsi5_Psi5_initChannel | ( | IfxPsi5_Psi5_Channel * | channel,
 |  | const IfxPsi5_Psi5_ChannelConfig * | config
 | ) |  |

Initialize the channel with the supplied configuration.

Parameters
channel | pointer to the PSI5 channel
config | pointer to the PSI5 channel configuration
Returns
TRUE on success & FALSE if configuration not valid

A coding example can be found in How to use the PSI5 PSI5 Interface driver?

Definition at line 95 of file IfxPsi5_Psi5.c.

◆ IfxPsi5_Psi5_initChannelConfig()

IFX_EXTERN void IfxPsi5_Psi5_initChannelConfig | ( | IfxPsi5_Psi5_ChannelConfig * | config,
 |  | IfxPsi5_Psi5 * | psi5
 | ) |  |

Get the current channel configuration (e.g. sample settings)

Parameters
config | pointer to the PSI5 channel configuration
psi5 | pointer to the PSI5 module
Returns
None

A coding example can be found in How to use the PSI5 PSI5 Interface driver?

Definition at line 245 of file IfxPsi5_Psi5.c.

◆ IfxPsi5_Psi5_readChannelFrame()

IFX_EXTERN boolean IfxPsi5_Psi5_readChannelFrame | ( | IfxPsi5_Psi5_Channel * | channel,
 |  | IfxPsi5_Psi5_Frame * | frame
 | ) |  |

Gets the received psi5 frame for the channel.

Parameters
channel | pointer to the PSI5 channel
frame | pointer to the PSI5 frame buffer
Returns
TRUE if successful; FALSE if no frame available

A coding example can be found in How to use the PSI5 PSI5 Interface driver?

Definition at line 514 of file IfxPsi5_Psi5.c.

◆ IfxPsi5_Psi5_readChannelSerialMessage()

IFX_EXTERN boolean IfxPsi5_Psi5_readChannelSerialMessage | ( | IfxPsi5_Psi5_Channel * | channel,
 |  | IfxPsi5_Slot | slot,
 |  | IfxPsi5_Psi5_SerialMessage * | message
 | ) |  |

Get the received serial message for the channel.

Parameters
channel | pointer to the PSI5 channel
slot | Slot Id
message | pointer to the PSI5 serial message buffer
Returns
TRUE if successful; FALSE if no serial message available

Definition at line 532 of file IfxPsi5_Psi5.c.

◆ IfxPsi5_Psi5_sendChannelData()

IFX_EXTERN boolean IfxPsi5_Psi5_sendChannelData | ( | IfxPsi5_Psi5_Channel * | channel,
 |  | uint64 | data
 | ) |  |

Transmit the data through the channel.

Parameters
channel | pointer to the PSI5 channel
data | data to be sent
Returns
TRUE if successful; FALSE otherwise

A coding example can be found in How to use the PSI5 PSI5 Interface driver?

Definition at line 558 of file IfxPsi5_Psi5.c.

◆ IfxPsi5_Psi5_startupChannel()

IFX_INLINE boolean IfxPsi5_Psi5_startupChannel | ( | IfxPsi5_Psi5_Channel * | channel,
 |  | IfxPsi5_Psi5_StartupOptions * | options
 | ) |  |

start the channel with the selected options

Parameters
channel | pointer to the PSI5 channel
options | startup related options
Returns
TRUE if successful; FALSE otherwise

A coding example can be found in How to use the PSI5 PSI5 Interface driver?

Definition at line 512 of file IfxPsi5_Psi5.h.


iLLD_TC38A: Clock Intialisation functions

Functions
Clock Intialisation functions
iLLD » PSI5 » PSI5
Collaboration diagram for Clock Intialisation functions:

Functions

IFX_EXTERN uint32 | IfxPsi5_Psi5_getFracDivClock (Ifx_PSI5 *psi5)
Returns the configured fracDiv psi5 clock frequency in Hz. More...
IFX_EXTERN uint32 | IfxPsi5_Psi5_initializeClock (Ifx_PSI5 *psi5, const IfxPsi5_Psi5_Clock *clock)
Configure the fracDiv clock. More...

Detailed Description

Function Documentation

◆ IfxPsi5_Psi5_getFracDivClock()

IFX_EXTERN uint32 IfxPsi5_Psi5_getFracDivClock ( Ifx_PSI5 * psi5 )

Returns the configured fracDiv psi5 clock frequency in Hz.

Parameters
psi5 Pointer to the base of PSI5 registers
Returns
Returns the configured fracDiv psi5 clock frequency in Hz.

Definition at line 68 of file IfxPsi5_Psi5.c.

Referenced by IfxPsi5_Psi5_initializeClock().

◆ IfxPsi5_Psi5_initializeClock()

IFX_EXTERN uint32 IfxPsi5_Psi5_initializeClock | ( | Ifx_PSI5 * | psi5,
 |  | const IfxPsi5_Psi5_Clock * | clock
 | ) |  |

Configure the fracDiv clock.

Parameters
psi5 | Pointer to the base of PSI5 registers
clock | Specifies the required clock frequency in Hz.
Returns
Returns the configured clock frequency in Hz.

Definition at line 409 of file IfxPsi5_Psi5.c.

Referenced by IfxPsi5_Psi5_initModule().


iLLD_TC38A: IfxPsi5_cfg.h File Reference

  • _Impl
Macros | Enumerations
IfxPsi5_cfg.h File Reference
iLLD » PSI5

PSI5 on-chip implementation data. More...

Go to the source code of this file.

Macros

#define | IFXPSI5_STEP_RANGE 1024
#define | IFXPSI5_NUM_WDTS 7
#define | IFXPSI5_NUM_SLOTS 6
#define | IFXPSI5_ENABLE_CHANNELTRIGGER (1 << 8)
#define | IFXPSI5_ENABLE_CHANNEL (1 << 16)
#define | IFXPSI5_DEFAULT_SLOWCLOCK_FREQ 4000000
#define | IFXPSI5_DEFAULT_FASTCLOCK_FREQ 6000000
#define | IFXPSI5_DEFAULT_TIMESTAMP_FREQ 1000000
#define | IFXPSI5_NUM_CHANNELS 4
#define | IFXPSI5_NUM_MODULES (1)

Enumerations

enum IfxPsi5_ChannelId {
IfxPsi5_ChannelId_none = -1,
IfxPsi5_ChannelId_0 = 0,
IfxPsi5_ChannelId_1 = 1,
IfxPsi5_ChannelId_2 = 2,
IfxPsi5_ChannelId_3 = 3
}
Channel Id. More...

Detailed Description

PSI5 on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPsi5_cfg.h.

Macro Definition Documentation

◆ IFXPSI5_DEFAULT_FASTCLOCK_FREQ

#define IFXPSI5_DEFAULT_FASTCLOCK_FREQ 6000000

Definition at line 76 of file IfxPsi5_cfg.h.

Referenced by IfxPsi5_Psi5_initModuleConfig().

◆ IFXPSI5_DEFAULT_SLOWCLOCK_FREQ

#define IFXPSI5_DEFAULT_SLOWCLOCK_FREQ 4000000

Definition at line 74 of file IfxPsi5_cfg.h.

Referenced by IfxPsi5_Psi5_initModuleConfig().

◆ IFXPSI5_DEFAULT_TIMESTAMP_FREQ

#define IFXPSI5_DEFAULT_TIMESTAMP_FREQ 1000000

Definition at line 78 of file IfxPsi5_cfg.h.

Referenced by IfxPsi5_Psi5_initModuleConfig().

◆ IFXPSI5_ENABLE_CHANNEL

#define IFXPSI5_ENABLE_CHANNEL (1 << 16)

Definition at line 72 of file IfxPsi5_cfg.h.

Referenced by IfxPsi5_Psi5_initChannel().

◆ IFXPSI5_ENABLE_CHANNELTRIGGER

#define IFXPSI5_ENABLE_CHANNELTRIGGER (1 << 8)

Definition at line 70 of file IfxPsi5_cfg.h.

Referenced by IfxPsi5_Psi5_initChannel().

◆ IFXPSI5_NUM_CHANNELS

#define IFXPSI5_NUM_CHANNELS 4

Definition at line 80 of file IfxPsi5_cfg.h.

◆ IFXPSI5_NUM_MODULES

#define IFXPSI5_NUM_MODULES (1)

Definition at line 82 of file IfxPsi5_cfg.h.

◆ IFXPSI5_NUM_SLOTS

#define IFXPSI5_NUM_SLOTS 6

Definition at line 68 of file IfxPsi5_cfg.h.

◆ IFXPSI5_NUM_WDTS

#define IFXPSI5_NUM_WDTS 7

Definition at line 66 of file IfxPsi5_cfg.h.

Referenced by IfxPsi5_Psi5_initChannel().

◆ IFXPSI5_STEP_RANGE

#define IFXPSI5_STEP_RANGE 1024

Definition at line 64 of file IfxPsi5_cfg.h.

Referenced by IfxPsi5_Psi5_getFracDivClock(), and IfxPsi5_Psi5_initializeClock().

Enumeration Type Documentation

◆ IfxPsi5_ChannelId

enum IfxPsi5_ChannelId

Channel Id.

Enumerator
IfxPsi5_ChannelId_none | None of the Ifx_PSI5 Channels.
IfxPsi5_ChannelId_0 | Specifies PSI5 channel 0.
IfxPsi5_ChannelId_1 | Specifies PSI5 channel 1.
IfxPsi5_ChannelId_2 | Specifies PSI5 channel 2.
IfxPsi5_ChannelId_3 | Specifies PSI5 channel 3.

Definition at line 90 of file IfxPsi5_cfg.h.


iLLD_TC38A: IfxPsi5_PinMap.c File Reference

  • _PinMap
Variables
IfxPsi5_PinMap.c File Reference
iLLD » PSI5

PSI5 I/O map. More...

#include "IfxPsi5_PinMap.h"
Include dependency graph for IfxPsi5_PinMap.c:

Go to the source code of this file.

Variables

IfxPsi5_Rx_In | IfxPsi5_RX0A_P00_1_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P00, 1}, Ifx_RxSel_a}
IfxPsi5_Rx_In | IfxPsi5_RX0B_P02_3_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P02, 3}, Ifx_RxSel_b}
IfxPsi5_Rx_In | IfxPsi5_RX0C_P33_1_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P33, 1}, Ifx_RxSel_c}
IfxPsi5_Rx_In | IfxPsi5_RX1A_P00_3_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P00, 3}, Ifx_RxSel_a}
IfxPsi5_Rx_In | IfxPsi5_RX1B_P02_5_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P02, 5}, Ifx_RxSel_b}
IfxPsi5_Rx_In | IfxPsi5_RX1C_P33_3_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P33, 3}, Ifx_RxSel_c}
IfxPsi5_Rx_In | IfxPsi5_RX2A_P00_5_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P00, 5}, Ifx_RxSel_a}
IfxPsi5_Rx_In | IfxPsi5_RX2B_P02_7_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P02, 7}, Ifx_RxSel_b}
IfxPsi5_Rx_In | IfxPsi5_RX2C_P33_5_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P33, 5}, Ifx_RxSel_c}
IfxPsi5_Rx_In | IfxPsi5_RX3A_P13_10_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_3, {&MODULE_P13,10}, Ifx_RxSel_a}
IfxPsi5_Rx_In | IfxPsi5_RX3B_P13_13_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_3, {&MODULE_P13,13}, Ifx_RxSel_b}
IfxPsi5_Rx_In | IfxPsi5_RX3C_P10_6_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_3, {&MODULE_P10, 6}, Ifx_RxSel_c}
IfxPsi5_Tx_Out | IfxPsi5_TX0_P00_2_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt4}
IfxPsi5_Tx_Out | IfxPsi5_TX0_P02_2_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt4}
IfxPsi5_Tx_Out | IfxPsi5_TX0_P33_2_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt4}
IfxPsi5_Tx_Out | IfxPsi5_TX1_P00_4_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt4}
IfxPsi5_Tx_Out | IfxPsi5_TX1_P02_6_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt4}
IfxPsi5_Tx_Out | IfxPsi5_TX1_P33_4_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt4}
IfxPsi5_Tx_Out | IfxPsi5_TX2_P00_6_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt4}
IfxPsi5_Tx_Out | IfxPsi5_TX2_P02_8_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt4}
IfxPsi5_Tx_Out | IfxPsi5_TX2_P33_6_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt4}
IfxPsi5_Tx_Out | IfxPsi5_TX3_P10_5_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_3, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt7}
IfxPsi5_Tx_Out | IfxPsi5_TX3_P13_11_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_3, {&MODULE_P13,11}, IfxPort_OutputIdx_alt4}
IfxPsi5_Tx_Out | IfxPsi5_TX3_P13_15_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_3, {&MODULE_P13,15}, IfxPort_OutputIdx_alt4}
const IfxPsi5_Rx_In * | IfxPsi5_Rx_In_pinTable [IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_RX_IN_NUM_ITEMS]
const IfxPsi5_Tx_Out * | IfxPsi5_Tx_Out_pinTable [IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS]

Detailed Description

PSI5 I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPsi5_PinMap.c.

Variable Documentation

◆ IfxPsi5_RX0A_P00_1_IN

IfxPsi5_Rx_In IfxPsi5_RX0A_P00_1_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P00, 1}, Ifx_RxSel_a}

Definition at line 45 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_RX0B_P02_3_IN

IfxPsi5_Rx_In IfxPsi5_RX0B_P02_3_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P02, 3}, Ifx_RxSel_b}

Definition at line 46 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_RX0C_P33_1_IN

IfxPsi5_Rx_In IfxPsi5_RX0C_P33_1_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P33, 1}, Ifx_RxSel_c}

Definition at line 47 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_RX1A_P00_3_IN

IfxPsi5_Rx_In IfxPsi5_RX1A_P00_3_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P00, 3}, Ifx_RxSel_a}

Definition at line 48 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_RX1B_P02_5_IN

IfxPsi5_Rx_In IfxPsi5_RX1B_P02_5_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P02, 5}, Ifx_RxSel_b}

Definition at line 49 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_RX1C_P33_3_IN

IfxPsi5_Rx_In IfxPsi5_RX1C_P33_3_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P33, 3}, Ifx_RxSel_c}

Definition at line 50 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_RX2A_P00_5_IN

IfxPsi5_Rx_In IfxPsi5_RX2A_P00_5_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P00, 5}, Ifx_RxSel_a}

Definition at line 51 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_RX2B_P02_7_IN

IfxPsi5_Rx_In IfxPsi5_RX2B_P02_7_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P02, 7}, Ifx_RxSel_b}

Definition at line 52 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_RX2C_P33_5_IN

IfxPsi5_Rx_In IfxPsi5_RX2C_P33_5_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P33, 5}, Ifx_RxSel_c}

Definition at line 53 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_RX3A_P13_10_IN

IfxPsi5_Rx_In IfxPsi5_RX3A_P13_10_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_3, {&MODULE_P13,10}, Ifx_RxSel_a}

Definition at line 54 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_RX3B_P13_13_IN

IfxPsi5_Rx_In IfxPsi5_RX3B_P13_13_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_3, {&MODULE_P13,13}, Ifx_RxSel_b}

Definition at line 55 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_RX3C_P10_6_IN

IfxPsi5_Rx_In IfxPsi5_RX3C_P10_6_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_3, {&MODULE_P10, 6}, Ifx_RxSel_c}

Definition at line 56 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_Rx_In_pinTable

const IfxPsi5_Rx_In* IfxPsi5_Rx_In_pinTable[IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_RX_IN_NUM_ITEMS]
Initial value:
= {
{
{
&IfxPsi5_RX0A_P00_1_IN,
&IfxPsi5_RX0B_P02_3_IN,
&IfxPsi5_RX0C_P33_1_IN
},
{
&IfxPsi5_RX1A_P00_3_IN,
&IfxPsi5_RX1B_P02_5_IN,
&IfxPsi5_RX1C_P33_3_IN
},
{
&IfxPsi5_RX2A_P00_5_IN,
&IfxPsi5_RX2B_P02_7_IN,
&IfxPsi5_RX2C_P33_5_IN
},
{
&IfxPsi5_RX3A_P13_10_IN,
&IfxPsi5_RX3B_P13_13_IN,
&IfxPsi5_RX3C_P10_6_IN
}
}
}
IfxPsi5_RX1C_P33_3_IN
IfxPsi5_Rx_In IfxPsi5_RX1C_P33_3_IN
Definition: IfxPsi5_PinMap.c:50
IfxPsi5_RX3C_P10_6_IN
IfxPsi5_Rx_In IfxPsi5_RX3C_P10_6_IN
Definition: IfxPsi5_PinMap.c:56
IfxPsi5_RX1A_P00_3_IN
IfxPsi5_Rx_In IfxPsi5_RX1A_P00_3_IN
Definition: IfxPsi5_PinMap.c:48
IfxPsi5_RX0B_P02_3_IN
IfxPsi5_Rx_In IfxPsi5_RX0B_P02_3_IN
Definition: IfxPsi5_PinMap.c:46
IfxPsi5_RX3B_P13_13_IN
IfxPsi5_Rx_In IfxPsi5_RX3B_P13_13_IN
Definition: IfxPsi5_PinMap.c:55
IfxPsi5_RX0A_P00_1_IN
IfxPsi5_Rx_In IfxPsi5_RX0A_P00_1_IN
Definition: IfxPsi5_PinMap.c:45
IfxPsi5_RX0C_P33_1_IN
IfxPsi5_Rx_In IfxPsi5_RX0C_P33_1_IN
Definition: IfxPsi5_PinMap.c:47
IfxPsi5_RX2B_P02_7_IN
IfxPsi5_Rx_In IfxPsi5_RX2B_P02_7_IN
Definition: IfxPsi5_PinMap.c:52
IfxPsi5_RX2A_P00_5_IN
IfxPsi5_Rx_In IfxPsi5_RX2A_P00_5_IN
Definition: IfxPsi5_PinMap.c:51
IfxPsi5_RX3A_P13_10_IN
IfxPsi5_Rx_In IfxPsi5_RX3A_P13_10_IN
Definition: IfxPsi5_PinMap.c:54
IfxPsi5_RX1B_P02_5_IN
IfxPsi5_Rx_In IfxPsi5_RX1B_P02_5_IN
Definition: IfxPsi5_PinMap.c:49
IfxPsi5_RX2C_P33_5_IN
IfxPsi5_Rx_In IfxPsi5_RX2C_P33_5_IN
Definition: IfxPsi5_PinMap.c:53

Definition at line 71 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_TX0_P00_2_OUT

IfxPsi5_Tx_Out IfxPsi5_TX0_P00_2_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt4}

Definition at line 57 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_TX0_P02_2_OUT

IfxPsi5_Tx_Out IfxPsi5_TX0_P02_2_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt4}

Definition at line 58 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_TX0_P33_2_OUT

IfxPsi5_Tx_Out IfxPsi5_TX0_P33_2_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt4}

Definition at line 59 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_TX1_P00_4_OUT

IfxPsi5_Tx_Out IfxPsi5_TX1_P00_4_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt4}

Definition at line 60 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_TX1_P02_6_OUT

IfxPsi5_Tx_Out IfxPsi5_TX1_P02_6_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt4}

Definition at line 61 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_TX1_P33_4_OUT

IfxPsi5_Tx_Out IfxPsi5_TX1_P33_4_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt4}

Definition at line 62 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_TX2_P00_6_OUT

IfxPsi5_Tx_Out IfxPsi5_TX2_P00_6_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt4}

Definition at line 63 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_TX2_P02_8_OUT

IfxPsi5_Tx_Out IfxPsi5_TX2_P02_8_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt4}

Definition at line 64 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_TX2_P33_6_OUT

IfxPsi5_Tx_Out IfxPsi5_TX2_P33_6_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt4}

Definition at line 65 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_TX3_P10_5_OUT

IfxPsi5_Tx_Out IfxPsi5_TX3_P10_5_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_3, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt7}

Definition at line 66 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_TX3_P13_11_OUT

IfxPsi5_Tx_Out IfxPsi5_TX3_P13_11_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_3, {&MODULE_P13,11}, IfxPort_OutputIdx_alt4}

Definition at line 67 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_TX3_P13_15_OUT

IfxPsi5_Tx_Out IfxPsi5_TX3_P13_15_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_3, {&MODULE_P13,15}, IfxPort_OutputIdx_alt4}

Definition at line 68 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_Tx_Out_pinTable

const IfxPsi5_Tx_Out* IfxPsi5_Tx_Out_pinTable[IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS]
Initial value:
= {
{
{
&IfxPsi5_TX0_P00_2_OUT,
&IfxPsi5_TX0_P02_2_OUT,
&IfxPsi5_TX0_P33_2_OUT
},
{
&IfxPsi5_TX1_P00_4_OUT,
&IfxPsi5_TX1_P02_6_OUT,
&IfxPsi5_TX1_P33_4_OUT
},
{
&IfxPsi5_TX2_P00_6_OUT,
&IfxPsi5_TX2_P02_8_OUT,
&IfxPsi5_TX2_P33_6_OUT
},
{
&IfxPsi5_TX3_P10_5_OUT,
&IfxPsi5_TX3_P13_11_OUT,
&IfxPsi5_TX3_P13_15_OUT
}
}
}
IfxPsi5_TX0_P02_2_OUT
IfxPsi5_Tx_Out IfxPsi5_TX0_P02_2_OUT
Definition: IfxPsi5_PinMap.c:58
IfxPsi5_TX3_P13_15_OUT
IfxPsi5_Tx_Out IfxPsi5_TX3_P13_15_OUT
Definition: IfxPsi5_PinMap.c:68
IfxPsi5_TX0_P33_2_OUT
IfxPsi5_Tx_Out IfxPsi5_TX0_P33_2_OUT
Definition: IfxPsi5_PinMap.c:59
IfxPsi5_TX1_P33_4_OUT
IfxPsi5_Tx_Out IfxPsi5_TX1_P33_4_OUT
Definition: IfxPsi5_PinMap.c:62
IfxPsi5_TX3_P13_11_OUT
IfxPsi5_Tx_Out IfxPsi5_TX3_P13_11_OUT
Definition: IfxPsi5_PinMap.c:67
IfxPsi5_TX2_P02_8_OUT
IfxPsi5_Tx_Out IfxPsi5_TX2_P02_8_OUT
Definition: IfxPsi5_PinMap.c:64
IfxPsi5_TX1_P00_4_OUT
IfxPsi5_Tx_Out IfxPsi5_TX1_P00_4_OUT
Definition: IfxPsi5_PinMap.c:60
IfxPsi5_TX2_P00_6_OUT
IfxPsi5_Tx_Out IfxPsi5_TX2_P00_6_OUT
Definition: IfxPsi5_PinMap.c:63
IfxPsi5_TX0_P00_2_OUT
IfxPsi5_Tx_Out IfxPsi5_TX0_P00_2_OUT
Definition: IfxPsi5_PinMap.c:57
IfxPsi5_TX1_P02_6_OUT
IfxPsi5_Tx_Out IfxPsi5_TX1_P02_6_OUT
Definition: IfxPsi5_PinMap.c:61
IfxPsi5_TX3_P10_5_OUT
IfxPsi5_Tx_Out IfxPsi5_TX3_P10_5_OUT
Definition: IfxPsi5_PinMap.c:66
IfxPsi5_TX2_P33_6_OUT
IfxPsi5_Tx_Out IfxPsi5_TX2_P33_6_OUT
Definition: IfxPsi5_PinMap.c:65

Definition at line 96 of file IfxPsi5_PinMap.c.


iLLD_TC38A: IfxPsi5_PinMap.h File Reference

  • _PinMap
Data Structures | Macros | Variables
IfxPsi5_PinMap.h File Reference
iLLD » PSI5

PSI5 I/O map. More...

#include <IfxPsi5_reg.h>
#include <_Impl/IfxPsi5_cfg.h>
#include <Port/Std/IfxPort.h>
Include dependency graph for IfxPsi5_PinMap.h:

Go to the source code of this file.

Data Structures

struct | IfxPsi5_Rx_In
RX pin mapping structure. More...
struct | IfxPsi5_Tx_Out
TX pin mapping structure. More...

Macros

#define | IFXPSI5_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXPSI5_PINMAP_NUM_CHANNELS 4
#define | IFXPSI5_PINMAP_RX_IN_NUM_ITEMS 3
#define | IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS 3

Variables

IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX0A_P00_1_IN
RXD inputs (receive data) channel 0. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX0B_P02_3_IN
RXD inputs (receive data) channel 0. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX0C_P33_1_IN
RXD inputs (receive data) channel 0. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX1A_P00_3_IN
RXD inputs (receive data) channel 1. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX1B_P02_5_IN
RXD inputs (receive data) channel 1. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX1C_P33_3_IN
RXD inputs (receive data) channel 1. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX2A_P00_5_IN
RXD inputs (receive data) channel 2. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX2B_P02_7_IN
RXD inputs (receive data) channel 2. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX2C_P33_5_IN
RXD inputs (receive data) channel 2. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX3A_P13_10_IN
RXD inputs (receive data) channel 3. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX3B_P13_13_IN
RXD inputs (receive data) channel 3. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX3C_P10_6_IN
RXD inputs (receive data) channel 3. More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX0_P00_2_OUT
TXD outputs (send data) More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX0_P02_2_OUT
TXD outputs (send data) More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX0_P33_2_OUT
TXD outputs (send data) More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX1_P00_4_OUT
TXD outputs (send data) More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX1_P02_6_OUT
TXD outputs (send data) More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX1_P33_4_OUT
TXD outputs (send data) More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX2_P00_6_OUT
TXD outputs (send data) More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX2_P02_8_OUT
TXD outputs (send data) More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX2_P33_6_OUT
TXD outputs (send data) More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX3_P10_5_OUT
TXD outputs (send data) More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX3_P13_11_OUT
TXD outputs (send data) More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX3_P13_15_OUT
TXD outputs (send data) More...
IFX_EXTERN const IfxPsi5_Rx_In * | IfxPsi5_Rx_In_pinTable [IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_RX_IN_NUM_ITEMS]
IfxPsi5_Rx_In table. More...
IFX_EXTERN const IfxPsi5_Tx_Out * | IfxPsi5_Tx_Out_pinTable [IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS]
IfxPsi5_Tx_Out table. More...

Detailed Description

PSI5 I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPsi5_PinMap.h.


iLLD_TC38A: IfxPsi5_Psi5.h File Reference

  • Psi5
  • Psi5
Data Structures | Functions
IfxPsi5_Psi5.h File Reference
iLLD » PSI5

PSI5 PSI5 details. More...

#include "Psi5/Std/IfxPsi5.h"
#include "Scu/Std/IfxScuCcu.h"
#include "IfxPsi5_bf.h"
Include dependency graph for IfxPsi5_Psi5.h:

Go to the source code of this file.

Data Structures

struct | IfxPsi5_Psi5
PSI5 handle data structure. More...
struct | IfxPsi5_Psi5_ChannelTrigger
channel trigger configuration structure More...
struct | IfxPsi5_Psi5_Clock
Clock configuration data structure. More...
struct | IfxPsi5_Psi5_FrameData
Psi5 frame data structure with individual members. More...
struct | IfxPsi5_Psi5_InputOutputControl
Input output configuration structure. More...
struct | IfxPsi5_Psi5_Message
Psi5 serial message with individual members. More...
struct | IfxPsi5_Psi5_PulseGeneration
Sync pulse generation configuration structure. More...
struct | IfxPsi5_Psi5_Rdm
Psi5 frame in double word format. More...
struct | IfxPsi5_Psi5_Rds
Psi5 serial message as unsigned 32 bit value. More...
struct | IfxPsi5_Psi5_ReceiveControl
Receive control configuration structure. More...
struct | IfxPsi5_Psi5_TimeStampConfig
Timestamp configuration data structure. More...
struct | IfxPsi5_Psi5_TransmitControl
Transmit control configuration structure. More...
struct | IfxPsi5_Psi5_PinsConfig
Pin Configuration structure. More...
struct | IfxPsi5_Psi5_Channel
Channel handle data structure. More...
struct | IfxPsi5_Psi5_ChannelConfig
Channel configuration structure. More...
struct | IfxPsi5_Psi5_Config
PSI5 module configuration structure. More...
union | IfxPsi5_Psi5_Frame
Psi5 frame data union. More...
union | IfxPsi5_Psi5_SerialMessage
Psi5 serial message data structure. More...
struct | IfxPsi5_Psi5_StartupOptions
startup related options TBD More...

Functions

IFX_EXTERN void | IfxPsi5_Psi5_deInitModule (IfxPsi5_Psi5 *psi5)
Resets the PSI5 module. More...
IFX_EXTERN void | IfxPsi5_Psi5_enableModule (Ifx_PSI5 *psi5)
Enable PSI5 kernel. More...
IFX_EXTERN boolean | IfxPsi5_Psi5_initModule (IfxPsi5_Psi5 *psi5, const IfxPsi5_Psi5_Config *config)
Initialise the PSI5 with the supplied configureation. More...
IFX_EXTERN void | IfxPsi5_Psi5_initModuleConfig (IfxPsi5_Psi5_Config *config, Ifx_PSI5 *psi5)
Initialise buffer with default PSI5 configuration. More...
IFX_EXTERN void | IfxPsi5_Psi5_resetModule (Ifx_PSI5 *psi5)
Reset PSI5 kernel. More...
IFX_INLINE boolean | IfxPsi5_Psi5_startupChannel (IfxPsi5_Psi5_Channel *channel, IfxPsi5_Psi5_StartupOptions *options)
start the channel with the selected options More...
IFX_EXTERN boolean | IfxPsi5_Psi5_initChannel (IfxPsi5_Psi5_Channel *channel, const IfxPsi5_Psi5_ChannelConfig *config)
Initialize the channel with the supplied configuration. More...
IFX_EXTERN void | IfxPsi5_Psi5_initChannelConfig (IfxPsi5_Psi5_ChannelConfig *config, IfxPsi5_Psi5 *psi5)
Get the current channel configuration (e.g. sample settings) More...
IFX_EXTERN boolean | IfxPsi5_Psi5_readChannelFrame (IfxPsi5_Psi5_Channel *channel, IfxPsi5_Psi5_Frame *frame)
Gets the received psi5 frame for the channel. More...
IFX_EXTERN boolean | IfxPsi5_Psi5_readChannelSerialMessage (IfxPsi5_Psi5_Channel *channel, IfxPsi5_Slot slot, IfxPsi5_Psi5_SerialMessage *message)
Get the received serial message for the channel. More...
IFX_EXTERN boolean | IfxPsi5_Psi5_sendChannelData (IfxPsi5_Psi5_Channel *channel, uint64 data)
Transmit the data through the channel. More...
IFX_EXTERN uint32 | IfxPsi5_Psi5_getFracDivClock (Ifx_PSI5 *psi5)
Returns the configured fracDiv psi5 clock frequency in Hz. More...
IFX_EXTERN uint32 | IfxPsi5_Psi5_initializeClock (Ifx_PSI5 *psi5, const IfxPsi5_Psi5_Clock *clock)
Configure the fracDiv clock. More...

Detailed Description

PSI5 PSI5 details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPsi5_Psi5.h.

Data Structure Documentation

◆ IfxPsi5_Psi5_PinsConfig

struct IfxPsi5_Psi5_PinsConfig

Pin Configuration structure.

Definition at line 293 of file IfxPsi5_Psi5.h.

Collaboration diagram for IfxPsi5_Psi5_PinsConfig:
[legend]
Data Fields
IFX_CONST IfxPsi5_Rx_In * | in | The RX Pin which should be configured.
IfxPort_InputMode | inMode | The pin input mode which should be configured.
IFX_CONST IfxPsi5_Tx_Out * | out | The TX Pin which should be configured.
IfxPort_OutputMode | outMode | The pin output mode which should be configured.
IfxPort_PadDriver | pinDriver | The pad driver mode which should be configured.


iLLD_TC38A: IfxPsi5.h File Reference

  • Psi5
  • Std
Enumerations | Functions
IfxPsi5.h File Reference
iLLD » PSI5

PSI5 basic functionality. More...

#include "_Impl/IfxPsi5_cfg.h"
#include "_PinMap/IfxPsi5_PinMap.h"
#include "IfxPsi5_reg.h"
#include "Scu/Std/IfxScuWdt.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "Src/Std/IfxSrc.h"
Include dependency graph for IfxPsi5.h:

Go to the source code of this file.

Enumerations

enum IfxPsi5_AlternateInput {
IfxPsi5_AlternateInput_0 = 0,
IfxPsi5_AlternateInput_1,
IfxPsi5_AlternateInput_2,
IfxPsi5_AlternateInput_3
}
MODULE_PSI5.IOCRx.ALTI(x = 0,1,2),Alternate input selection. More...
enum IfxPsi5_BaudRate {
IfxPsi5_BaudRate_125 = 0,
IfxPsi5_BaudRate_189 = 1
}
MODULE_PSI5.RCRCx.BRS(x = 0,1,2),Baud rate selection. More...
enum IfxPsi5_CRCorParity {
IfxPsi5_CRCorParity_parity = 0,
IfxPsi5_CRCorParity_crc = 1
}
MODULE_PSI5.RCRBx.CRCy(x = 0,1,2; y=0,1,2,3,4,5),CRC or parity selection. More...
enum IfxPsi5_ClockType {
IfxPsi5_ClockType_fracDiv = 0,
IfxPsi5_ClockType_slowClock_125 = 1,
IfxPsi5_ClockType_fastClock_189 = 2,
IfxPsi5_ClockType_timeStamp = 3
}
Clock type. More...
enum IfxPsi5_DigitalInputFilterDepth {
IfxPsi5_DigitalInputFilterDepth_0 = 0,
IfxPsi5_DigitalInputFilterDepth_1,
IfxPsi5_DigitalInputFilterDepth_2,
IfxPsi5_DigitalInputFilterDepth_3,
IfxPsi5_DigitalInputFilterDepth_4,
IfxPsi5_DigitalInputFilterDepth_5,
IfxPsi5_DigitalInputFilterDepth_6,
IfxPsi5_DigitalInputFilterDepth_7,
IfxPsi5_DigitalInputFilterDepth_8,
IfxPsi5_DigitalInputFilterDepth_9,
IfxPsi5_DigitalInputFilterDepth_10,
IfxPsi5_DigitalInputFilterDepth_11,
IfxPsi5_DigitalInputFilterDepth_12,
IfxPsi5_DigitalInputFilterDepth_13,
IfxPsi5_DigitalInputFilterDepth_14,
IfxPsi5_DigitalInputFilterDepth_15
}
MODULE_PSI5.IOCRx.DEPTH(x = 0,1,2),Digital input filter depth. More...
enum IfxPsi5_DividerMode {
IfxPsi5_DividerMode_spb = 0,
IfxPsi5_DividerMode_normal = 1,
IfxPsi5_DividerMode_fractional = 2,
IfxPsi5_DividerMode_off = 3
}
MODULE_PSI5.FDR.DM,Divider mode. More...
enum IfxPsi5_FrameExpectation {
IfxPsi5_FrameExpectation_notExpected = 0,
IfxPsi5_FrameExpectation_expected = 1
}
MODULE_PSI5.RCRBx.FECy(x = 0,1,2; y=0,1,2,3,4,5),Frame expectation control. More...
enum IfxPsi5_InterruptNodePointer {
IfxPsi5_InterruptNodePointer_rsi = 0,
IfxPsi5_InterruptNodePointer_rdi = 1,
IfxPsi5_InterruptNodePointer_rbi = 2,
IfxPsi5_InterruptNodePointer_tdi = 3,
IfxPsi5_InterruptNodePointer_tbi = 4,
IfxPsi5_InterruptNodePointer_erri = 5,
IfxPsi5_InterruptNodePointer_sdi = 6,
IfxPsi5_InterruptNodePointer_fwi = 7
}
specifies interrupt node pointer defined in MODULE_PSI5.INP[x].U More...
enum IfxPsi5_InterruptRequest {
IfxPsi5_InterruptRequest_disabled = 0,
IfxPsi5_InterruptRequest_enabled = 1
}
Enable/Disable Interrupt Request.defined in MODULE_PSI5.INTENA[x]. More...
enum IfxPsi5_InterruptSource {
IfxPsi5_InterruptSource_rsi = 0,
IfxPsi5_InterruptSource_rdi = 1,
IfxPsi5_InterruptSource_rbi = 2,
IfxPsi5_InterruptSource_tei = 3,
IfxPsi5_InterruptSource_nbi = 4,
IfxPsi5_InterruptSource_mei = 5,
IfxPsi5_InterruptSource_crci = 6,
IfxPsi5_InterruptSource_fwi = 7,
IfxPsi5_InterruptSource_rui = 8,
IfxPsi5_InterruptSource_rmi = 9,
IfxPsi5_InterruptSource_tpi = 10,
IfxPsi5_InterruptSource_tpoi = 11,
IfxPsi5_InterruptSource_tsi = 12,
IfxPsi5_InterruptSource_tsoi = 13,
IfxPsi5_InterruptSource_toi = 14,
IfxPsi5_InterruptSource_tooi = 15,
IfxPsi5_InterruptSource_nfi = 16,
IfxPsi5_InterruptSource_wsi0 = 17,
IfxPsi5_InterruptSource_wsi1 = 18,
IfxPsi5_InterruptSource_wsi2 = 19,
IfxPsi5_InterruptSource_wsi3 = 20,
IfxPsi5_InterruptSource_wsi4 = 21,
IfxPsi5_InterruptSource_wsi5 = 22,
IfxPsi5_InterruptSource_sdi0 = 23,
IfxPsi5_InterruptSource_sdi1 = 24,
IfxPsi5_InterruptSource_sdi2 = 25,
IfxPsi5_InterruptSource_sdi3 = 26,
IfxPsi5_InterruptSource_sdi4 = 27,
IfxPsi5_InterruptSource_sdi5 = 28,
IfxPsi5_InterruptSource_soi0 = 29,
IfxPsi5_InterruptSource_soi1 = 30,
IfxPsi5_InterruptSource_soi2 = 31,
IfxPsi5_InterruptSource_soi3 = 32,
IfxPsi5_InterruptSource_soi4 = 33,
IfxPsi5_InterruptSource_soi5 = 34,
IfxPsi5_InterruptSource_scri0 = 35,
IfxPsi5_InterruptSource_scri1 = 36,
IfxPsi5_InterruptSource_scri2 = 37,
IfxPsi5_InterruptSource_scri3 = 38,
IfxPsi5_InterruptSource_scri4 = 39,
IfxPsi5_InterruptSource_scri5 = 40
}
enable the interrupt source of any interrupt of PSI5 Channel.specify in MODULE_PSI5.INTENA[x].U and MODULE_PSI5.INTENB[x].U More...
enum IfxPsi5_MessagingBits {
IfxPsi5_MessagingBits_absent = 0,
IfxPsi5_MessagingBits_present = 1
}
MODULE_PSI5.RCRBx.MSGy(x = 0,1,2; y=0,1,2,3,4,5),Messaging bits presence. More...
enum IfxPsi5_ReceiveDataRegisterTimestamp {
IfxPsi5_ReceiveDataRegisterTimestamp_pulse = 0,
IfxPsi5_ReceiveDataRegisterTimestamp_frame = 1
}
MODULE_PSI5.RCRCx.TSR(x = 0,1,2),Timestamp select for receive data registers. More...
enum IfxPsi5_SleepMode {
IfxPsi5_SleepMode_enable = 0,
IfxPsi5_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_PSI5.CLC.B.EDIS. More...
enum IfxPsi5_Slot {
IfxPsi5_Slot_0 = 0,
IfxPsi5_Slot_1,
IfxPsi5_Slot_2,
IfxPsi5_Slot_3,
IfxPsi5_Slot_4,
IfxPsi5_Slot_5
}
MODULE_PSI5.RDRHx.SC(x = 0-2),Slot Id. More...
enum IfxPsi5_SuspendMode {
IfxPsi5_SuspendMode_none = 0,
IfxPsi5_SuspendMode_hard = 1,
IfxPsi5_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxPsi5_TimeBase {
IfxPsi5_TimeBase_internal = 0,
IfxPsi5_TimeBase_external = 1
}
MODULE_PSI5.PGCx.TBS(x = 0,1,2),Time base. More...
enum IfxPsi5_TimestampRegister {
IfxPsi5_TimestampRegister_a = 0,
IfxPsi5_TimestampRegister_b = 1,
IfxPsi5_TimestampRegister_c = 2
}
MODULE_PSI5.RCRCx.TSP(x = 0,1,2),MODULE_PSI5.RCRCx.TSF(x = 0,1,2)Timestamp register type. More...
enum IfxPsi5_Trigger {
IfxPsi5_Trigger_0 = 0,
IfxPsi5_Trigger_1,
IfxPsi5_Trigger_2,
IfxPsi5_Trigger_3,
IfxPsi5_Trigger_4,
IfxPsi5_Trigger_5
}
MODULE_PSI5.PGCx.ETS(x = 0,1,2),Trigger Id. More...
enum IfxPsi5_TriggerOutput {
IfxPsi5_TriggerOutput_0 = 0,
IfxPsi5_TriggerOutput_1,
IfxPsi5_TriggerOutput_2,
IfxPsi5_TriggerOutput_3,
IfxPsi5_TriggerOutput_4,
IfxPsi5_TriggerOutput_5,
IfxPsi5_TriggerOutput_6,
IfxPsi5_TriggerOutput_7
}
Output line selected by node Pointer defined in MODULE_PSI5.INP[x].U. More...
enum IfxPsi5_TriggerType {
IfxPsi5_TriggerType_periodic = 0,
IfxPsi5_TriggerType_external = 1,
IfxPsi5_TriggerType_bypass = 2
}
Trigger type. More...
enum IfxPsi5_Verbose {
IfxPsi5_Verbose_off = 0,
IfxPsi5_Verbose_on = 1
}
MODULE_PSI5.RCRBx.VBSy(x = 0,1,2; y=0,1,2,3,4,5),Verbose mode. More...
enum IfxPsi5_FractionalDividerRegister {
IfxPsi5_FractionalDividerRegister_normal = 0,
IfxPsi5_FractionalDividerRegister_lowbitrate = 1,
IfxPsi5_FractionalDividerRegister_highbitrate = 2,
IfxPsi5_FractionalDividerRegister_timestamp = 3
}
Options for choosing different Fractional Divider Registers. More...
enum IfxPsi5_InterruptServiceRequest {
IfxPsi5_InterruptServiceRequest_0 = 0,
IfxPsi5_InterruptServiceRequest_1 = 1,
IfxPsi5_InterruptServiceRequest_2 = 2,
IfxPsi5_InterruptServiceRequest_3 = 3,
IfxPsi5_InterruptServiceRequest_4 = 4,
IfxPsi5_InterruptServiceRequest_5 = 5,
IfxPsi5_InterruptServiceRequest_6 = 6,
IfxPsi5_InterruptServiceRequest_7 = 7
}
enum IfxPsi5_InterruptStatusRegister {
IfxPsi5_InterruptStatusRegister_a = 0,
IfxPsi5_InterruptStatusRegister_b = 1
}
enum IfxPsi5_ReceiverControlRegister {
IfxPsi5_ReceiverControlRegister_a = 0,
IfxPsi5_ReceiverControlRegister_b = 1,
IfxPsi5_ReceiverControlRegister_c = 2
}
Optiond for different Receive Control Registers(RCRA,RCRB,RCRC) More...

Functions

IFX_INLINE uint32 | IfxPsi5_getStatusCrci (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the CRCI status register contents for a channel More...
IFX_INLINE uint32 | IfxPsi5_getStatusMei (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the MEI status register contents for a channel More...
IFX_INLINE uint32 | IfxPsi5_getStatusNbi (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the NBI status register contents for a channel More...
IFX_INLINE uint32 | IfxPsi5_getStatusNfi (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the NFI status register contents for a channel More...
IFX_INLINE uint32 | IfxPsi5_getStatusRdi (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the RDI status register contents for a channel More...
IFX_INLINE uint32 | IfxPsi5_getStatusRmi (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the RMI status register contents for a channel More...
IFX_INLINE uint32 | IfxPsi5_getStatusRsi (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the RSI status register contents for a channel More...
IFX_INLINE uint32 | IfxPsi5_getStatusTei (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the TEI status register contents for a channel More...
IFX_INLINE void | IfxPsi5_setSleepMode (Ifx_PSI5 *psi5, IfxPsi5_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_EXTERN void | IfxPsi5_resetModule (Ifx_PSI5 *psi5)
resets PSI5 kernel More...
IFX_INLINE void | IfxPsi5_initRxPin (const IfxPsi5_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a RX input. More...
IFX_INLINE void | IfxPsi5_initTxPin (const IfxPsi5_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a TX output. More...
IFX_INLINE void | IfxPsi5_setRxInput (Ifx_PSI5_CH *psi5Ch, IfxPsi5_AlternateInput alternateInput)
Sets the alternate RX input. More...
IFX_INLINE void | IfxPsi5_setInterruptNodePointer (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel, IfxPsi5_InterruptNodePointer nodePointer, IfxPsi5_TriggerOutput triggerOutputLine)
set respective service line for Interrupt source More...
IFX_EXTERN void | IfxPsi5_enableInterrupt (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel, IfxPsi5_InterruptSource interruptSource, IfxPsi5_InterruptRequest enabled)
enable/disable interrupt source More...
IFX_INLINE boolean | IfxPsi5_isModuleSuspended (Ifx_PSI5 *psi5)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxPsi5_setSuspendMode (Ifx_PSI5 *psi5, IfxPsi5_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN void | IfxPsi5_disableModule (Ifx_PSI5 *psi5)
Disable PSI5 kernel. More...
IFX_INLINE uint32 | IfxPsi5_getReceiveDataRegisterLow (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
IFX_INLINE void | IfxPsi5_clearAllInterrupt (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel, IfxPsi5_InterruptStatusRegister intStatusReg, uint32 value)
Clears interrupt flag for all sources. More...
IFX_INLINE uint32 | IfxPsi5_getInterruptStatus (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel, IfxPsi5_InterruptStatusRegister intStatusReg)
IFX_INLINE uint32 | IfxPsi5_readReceiveFifoData (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
For a particular channel it gets the oldest data content of up to 32 received data frames. I.e. RFCx.REP is pointing at the buffer presented. More...
IFX_INLINE uint16 | IfxPsi5_getWriteFifoPointer (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
Getting the FIFO write pointer for channel x. More...
IFX_INLINE uint16 | IfxPsi5_getReadFifoPointer (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
Getting the FIFO read pointer for channel x. More...
IFX_INLINE void | IfxPsi5_clearInterrupt (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel, IfxPsi5_InterruptSource interruptSource)
Clears the flag for a given interrupt source. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxPsi5_getSrcPointer (Ifx_PSI5 *psi5, IfxPsi5_InterruptServiceRequest intRequest)
Gives the pointer to the SRC register for respective PSI5 interrupt source. More...
IFX_INLINE void | IfxPsi5_enableAllChannels (Ifx_PSI5 *psi5)
Enabling all channels and error flags. More...
IFX_INLINE void | IfxPsi5_setReceiveFifoWarningLevel (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel, uint32 value)
Configures FIFO and Ring Buffer operation. More...
IFX_INLINE void | IfxPsi5_setReceiverControl (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel, IfxPsi5_ReceiverControlRegister rcr, uint32 value)
IFX_INLINE void | IfxPsi5_setFractionalDivider (Ifx_PSI5 *psi5, IfxPsi5_FractionalDividerRegister fcd, uint32 value)
IFX_EXTERN void | IfxPsi5_enableModule (Ifx_PSI5 *psi5)

Detailed Description

PSI5 basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPsi5.h.

Enumeration Type Documentation

◆ IfxPsi5_FractionalDividerRegister

enum IfxPsi5_FractionalDividerRegister

Options for choosing different Fractional Divider Registers.

Enumerator
IfxPsi5_FractionalDividerRegister_normal | The Fractional Divider Register controls the input clock f_fracdiv.
IfxPsi5_FractionalDividerRegister_lowbitrate | The Fractional Divider Register for lower Bit Rate contains the pre-divider that defines the time resolution of the f_125.It divides f_fracdiv by a factor and provides f_125 to all channels.
IfxPsi5_FractionalDividerRegister_highbitrate | The Fractional Divider Register for Higher Bit Rate contains the pre-divider that defines the time resolution of f_189. It divides f_fracdiv by a factor and provides f_189 to all channels.
IfxPsi5_FractionalDividerRegister_timestamp | The PSI5 Module Time Stamp Predivider Register contains the pre-divider that defines the time resolution of the Time Stamp Registers TSRA/B/C and the Sync Pulse Time Base Counter SBC. It divides fPSI5 by a factor. It contains as well the bits for reset control of the time stamp counters.

Definition at line 330 of file IfxPsi5.h.

◆ IfxPsi5_InterruptServiceRequest

enum IfxPsi5_InterruptServiceRequest
Enumerator
IfxPsi5_InterruptServiceRequest_0
IfxPsi5_InterruptServiceRequest_1
IfxPsi5_InterruptServiceRequest_2
IfxPsi5_InterruptServiceRequest_3
IfxPsi5_InterruptServiceRequest_4
IfxPsi5_InterruptServiceRequest_5
IfxPsi5_InterruptServiceRequest_6
IfxPsi5_InterruptServiceRequest_7

Definition at line 341 of file IfxPsi5.h.

◆ IfxPsi5_InterruptStatusRegister

enum IfxPsi5_InterruptStatusRegister
Enumerator
IfxPsi5_InterruptStatusRegister_a
IfxPsi5_InterruptStatusRegister_b

Definition at line 353 of file IfxPsi5.h.

◆ IfxPsi5_ReceiverControlRegister

enum IfxPsi5_ReceiverControlRegister

Optiond for different Receive Control Registers(RCRA,RCRB,RCRC)

Enumerator
IfxPsi5_ReceiverControlRegister_a | Receiver Control Register A configures the payload length of the up to 6 frames in the up to 6 slots.
IfxPsi5_ReceiverControlRegister_b | Receiver Control Register B configures up to 6 frame types in the up to 6 slots.
IfxPsi5_ReceiverControlRegister_c | Receiver Control Register C configures bit rate and time stamp sources.

Definition at line 361 of file IfxPsi5.h.

Function Documentation

◆ IfxPsi5_clearAllInterrupt()

IFX_INLINE void IfxPsi5_clearAllInterrupt | ( | Ifx_PSI5 * | psi5,
 |  | IfxPsi5_ChannelId | channel,
 |  | IfxPsi5_InterruptStatusRegister | intStatusReg,
 |  | uint32 | value
 | ) |  |

Clears interrupt flag for all sources.

Parameters
psi5 | Pointer to PSI5 SFR base register
channel | Channel Id of PSI5 channel whose receiver operation has to be configured
intStatusReg | The register to be selected depending on the interrupt source to be probed(slot specific sources are in INTSTATB)
value
Returns
None

Definition at line 787 of file IfxPsi5.h.

◆ IfxPsi5_clearInterrupt()

IFX_INLINE void IfxPsi5_clearInterrupt | ( | Ifx_PSI5 * | psi5,
 |  | IfxPsi5_ChannelId | channel,
 |  | IfxPsi5_InterruptSource | interruptSource
 | ) |  |

Clears the flag for a given interrupt source.

Parameters
psi5 | Pointer to PSI5 SFR base register
channel | Channel Id of PSI5 channel whose receiver operation has to be configured
interruptSource | Interrupt source to be cleared
Returns
None

Definition at line 831 of file IfxPsi5.h.

◆ IfxPsi5_enableAllChannels()

IFX_INLINE void IfxPsi5_enableAllChannels ( Ifx_PSI5 * psi5 )

Enabling all channels and error flags.

Parameters
psi5 Pointer to PSI5 SFR base register
Returns
None

Definition at line 851 of file IfxPsi5.h.

◆ IfxPsi5_enableModule()

IFX_EXTERN void IfxPsi5_enableModule ( Ifx_PSI5 * psi5 )
Returns
None

Definition at line 99 of file IfxPsi5.c.

◆ IfxPsi5_getInterruptStatus()

IFX_INLINE uint32 IfxPsi5_getInterruptStatus | ( | Ifx_PSI5 * | psi5,
 |  | IfxPsi5_ChannelId | channel,
 |  | IfxPsi5_InterruptStatusRegister | intStatusReg
 | ) |  |
Parameters
psi5 | Pointer to PSI5 SFR base register
channel | Channel Id of PSI5 channel whose receiver operation has to be configured
intStatusReg | The interrupt status register being probed(depending on the interrupt source being probed)
Returns
Returns the register value encapsulating the status of different sources

Definition at line 800 of file IfxPsi5.h.

◆ IfxPsi5_getReadFifoPointer()

IFX_INLINE uint16 IfxPsi5_getReadFifoPointer | ( | Ifx_PSI5 * | psi5,
 |  | IfxPsi5_ChannelId | channel
 | ) |  |

Getting the FIFO read pointer for channel x.

Parameters
psi5 | Pointer to PSI5 SFR base register
channel | Channel Id of PSI5 channel whose receiver operation has to be configured
Returns
Gives out pointer to the read buffer to be read next

Definition at line 825 of file IfxPsi5.h.

◆ IfxPsi5_getReceiveDataRegisterLow()

IFX_INLINE uint32 IfxPsi5_getReceiveDataRegisterLow | ( | Ifx_PSI5 * | psi5,
 |  | IfxPsi5_ChannelId | channel
 | ) |  |
Parameters
psi5 | Pointer to PSI5 SFR base register
channel | Channel Id of PSI5 channel whose receiver operation has to be configured

Definition at line 781 of file IfxPsi5.h.

◆ IfxPsi5_getSrcPointer()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxPsi5_getSrcPointer | ( | Ifx_PSI5 * | psi5,
 |  | IfxPsi5_InterruptServiceRequest | intRequest
 | ) |  |

Gives the pointer to the SRC register for respective PSI5 interrupt source.

Parameters
psi5 | Pointer to PSI5 SFR base register
intRequest | Interrupt Source
Returns
Address of the required SRC register

Definition at line 844 of file IfxPsi5.h.

◆ IfxPsi5_getWriteFifoPointer()

IFX_INLINE uint16 IfxPsi5_getWriteFifoPointer | ( | Ifx_PSI5 * | psi5,
 |  | IfxPsi5_ChannelId | channel
 | ) |  |

Getting the FIFO write pointer for channel x.

Parameters
psi5 | Pointer to PSI5 SFR base register
channel | Channel Id of PSI5 channel whose receiver operation has to be configured
Returns
Gives the address of the buffer written last.So before write to the buffer this value is incremented by 1.

Definition at line 819 of file IfxPsi5.h.

◆ IfxPsi5_readReceiveFifoData()

IFX_INLINE uint32 IfxPsi5_readReceiveFifoData | ( | Ifx_PSI5 * | psi5,
 |  | IfxPsi5_ChannelId | channel
 | ) |  |

For a particular channel it gets the oldest data content of up to 32 received data frames. I.e. RFCx.REP is pointing at the buffer presented.

Parameters
psi5 | Pointer to PSI5 SFR base register
channel | Channel Id of PSI5 channel whose receiver operation has to be configured
Returns
Gives the oldest data content of up to 32 received data frames.

Definition at line 813 of file IfxPsi5.h.

◆ IfxPsi5_setFractionalDivider()

IFX_INLINE void IfxPsi5_setFractionalDivider | ( | Ifx_PSI5 * | psi5,
 |  | IfxPsi5_FractionalDividerRegister | fcd,
 |  | uint32 | value
 | ) |  |
Parameters
psi5 | Pointer to PSI5 SFR base register
fcd | Select the appropriate divider register(see IfxPsi5_FractionalDividerRegister enum) for required functionality.
value | Contains value including divider values for different divider registers(FDR,FDRL,FDRH,FDRT)
Returns
None

Definition at line 890 of file IfxPsi5.h.

◆ IfxPsi5_setReceiveFifoWarningLevel()

IFX_INLINE void IfxPsi5_setReceiveFifoWarningLevel | ( | Ifx_PSI5 * | psi5,
 |  | IfxPsi5_ChannelId | channel,
 |  | uint32 | value
 | ) |  |

Configures FIFO and Ring Buffer operation.

Parameters
psi5 | Pointer to PSI5 SFR's base address
channel | Channel Id of PSI5 channel whose receiver operation has to be configured
value | Values representing differnt settings for FIFO and Ring Buffer like FIFO Read Pointer,FIFO/Ring Buffer Write Pointer,FIFO Warning Level,Write Pointer WRAP Indicator and FIFO Flushing
Returns
None

Definition at line 860 of file IfxPsi5.h.

◆ IfxPsi5_setReceiverControl()

IFX_INLINE void IfxPsi5_setReceiverControl | ( | Ifx_PSI5 * | psi5,
 |  | IfxPsi5_ChannelId | channel,
 |  | IfxPsi5_ReceiverControlRegister | rcr,
 |  | uint32 | value
 | ) |  |
Parameters
psi5 | Pointer to PSI5 SFR's base address
channel | Channel Id of PSI5 channel whose receiver operation has to be configured
rcr | The reciever control registers for setting up different parameters for PSI5 receiver operation. Functionalities related to registers A, B and C can be found in the IfxPsi5_ReceiverControlRegister enum.
value | Value to be written into the RCRy(y = A,B,C) register.
Returns
None

Configures the payload length of the up to 6 frames in 6 slots.

Definition at line 866 of file IfxPsi5.h.


iLLD_TC38A: PSI5S

Modules | Files
PSI5S
iLLD
Collaboration diagram for PSI5S:

Modules

Implementation
Standard Driver
PSI5S Pin Mapping
How to use the PSI5S PSI5S Interface driver?
PSI5S

Files

file | IfxPsi5s_cfg.h
PSI5S on-chip implementation data.
file | IfxPsi5s_PinMap.c
PSI5S I/O map.
file | IfxPsi5s_PinMap.h
PSI5S I/O map.
file | IfxPsi5s_Psi5s.h
PSI5S PSI5S details.
file | IfxPsi5s.h
PSI5S basic functionality.

Detailed Description


iLLD_TC38A: Implementation

Implementation
iLLD » PSI5S
Collaboration diagram for Implementation:


iLLD_TC38A: Standard Driver

Modules
Standard Driver
iLLD » PSI5S
Collaboration diagram for Standard Driver:

Modules

Enumerations
Channel Operative Functions
IO Pin Configuration Functions
Interrupt configuration functions
Module Functions

Detailed Description


iLLD_TC38A: Enumerations

Enumerations
Enumerations
iLLD » PSI5S » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxPsi5s_AlternateInput {
IfxPsi5s_AlternateInput_0 = 0,
IfxPsi5s_AlternateInput_1,
IfxPsi5s_AlternateInput_2,
IfxPsi5s_AlternateInput_3
}
MODULE_PSI5S.IOCR.ALTI:Alternate input. More...
enum IfxPsi5s_AscBaudratePrescalar {
IfxPsi5s_AscBaudratePrescalar_divideBy2 = 0,
IfxPsi5s_AscBaudratePrescalar_divideBy3 = 1
}
MODULE_PSI5S.BG.BR_VALUE:Baudrate prescalar select. More...
enum IfxPsi5s_AscMode {
IfxPsi5s_AscMode_sync = 0,
IfxPsi5s_AscMode_async_8bitData = 1,
IfxPsi5s_AscMode_async_7bitDataWithParity = 3,
IfxPsi5s_AscMode_async_9bitData = 4,
IfxPsi5s_AscMode_async_8bitDataWithWakeup = 5,
IfxPsi5s_AscMode_async_8bitDataWithParity = 7
}
MODULE_PSI5S.CON.M:ASC mode of operation. More...
enum IfxPsi5s_AscStopBits {
IfxPsi5s_AscStopBits_1 = 0,
IfxPsi5s_AscStopBits_2
}
MODULE_PSI5S.CON.STP: Number of stop bits. More...
enum IfxPsi5s_ChannelId {
IfxPsi5s_ChannelId_0 = 0,
IfxPsi5s_ChannelId_1,
IfxPsi5s_ChannelId_2,
IfxPsi5s_ChannelId_3,
IfxPsi5s_ChannelId_4,
IfxPsi5s_ChannelId_5,
IfxPsi5s_ChannelId_6,
IfxPsi5s_ChannelId_7,
IfxPsi5s_ChannelId_none = -1
}
PSI5S Channel Id defined in MODULE_PSI5S.RDS.B.CID. More...
enum IfxPsi5s_ClockType {
IfxPsi5s_ClockType_fracDiv = 0,
IfxPsi5s_ClockType_timeStamp = 1,
IfxPsi5s_ClockType_ascFracDiv = 2,
IfxPsi5s_ClockType_ascOutput = 3
}
Clock Selection. More...
enum IfxPsi5s_CrcOrParity {
IfxPsi5s_CrcOrParity_parity = 0,
IfxPsi5s_CrcOrParity_crc = 1
}
MODULE_PSI5S.RCRAx.CRCy(x= 0,1,..7:y=0,1,..,5),MODULE_PSI5S.RCRBx.CRCy(x= 0,1,..7:y=0,1,..,5)CRC or parity. More...
enum IfxPsi5s_DividerMode {
IfxPsi5s_DividerMode_spb = 0,
IfxPsi5s_DividerMode_normal = 1,
IfxPsi5s_DividerMode_fractional = 2,
IfxPsi5s_DividerMode_off = 3
}
MODULE_PSI5S.FDR.DM;MODULE_PSI5S.FDRT.B.DM:Divider mode. More...
enum IfxPsi5s_EnhancedProtocol {
IfxPsi5s_EnhancedProtocol_toothGapMethod = 0,
IfxPsi5s_EnhancedProtocol_pulseWidth_frameFormat_1to3 = 1,
IfxPsi5s_EnhancedProtocol_pulseWidth_frameFormat_4 = 3
}
MODULE_PSI5S.SCRx.EPS(x=0,1,...,7):Enhanced protocol types. More...
enum IfxPsi5s_FrameId {
IfxPsi5s_FrameId_frameHeader = 0,
IfxPsi5s_FrameId_rollingNumber = 1
}
MODULE_PSI5S.RCRAx.FIDS(x=0,1,....,7):.Frame ID updation. More...
enum IfxPsi5s_IdleTime {
IfxPsi5s_IdleTime_1 = 0,
IfxPsi5s_IdleTime_2,
IfxPsi5s_IdleTime_3,
IfxPsi5s_IdleTime_4,
IfxPsi5s_IdleTime_5,
IfxPsi5s_IdleTime_6,
IfxPsi5s_IdleTime_7,
IfxPsi5s_IdleTime_8,
IfxPsi5s_IdleTime_9,
IfxPsi5s_IdleTime_10,
IfxPsi5s_IdleTime_11,
IfxPsi5s_IdleTime_12,
IfxPsi5s_IdleTime_13,
IfxPsi5s_IdleTime_14,
IfxPsi5s_IdleTime_15,
IfxPsi5s_IdleTime_16
}
MODULE_PSI5S.GCR.IDT:Idle time bit count. More...
enum IfxPsi5s_InterruptRequest {
IfxPsi5s_InterruptRequest_disabled = 0,
IfxPsi5s_InterruptRequest_enabled = 1
}
Enable/Disable interrupt request .defined in MODULE_PSI5S.INTEN[x]. More...
enum IfxPsi5s_InterruptSource {
IfxPsi5s_InterruptSource_rsi = 0,
IfxPsi5s_InterruptSource_rdi = 1,
IfxPsi5s_InterruptSource_rbi = 2,
IfxPsi5s_InterruptSource_tei = 3,
IfxPsi5s_InterruptSource_chci = 4,
IfxPsi5s_InterruptSource_crci = 5,
IfxPsi5s_InterruptSource_tpi = 6,
IfxPsi5s_InterruptSource_tpoi = 7,
IfxPsi5s_InterruptSource_hdi = 8
}
Enable/Disable the interrupt and select interrupt source pointer defined in MODULE_PSI5S.INTEN[x].U and MODULE_PSI5S.INP[x].U. More...
enum IfxPsi5s_LoopBackMode {
IfxPsi5s_LoopBackMode_disable = 0,
IfxPsi5s_LoopBackMode_enable = 1
}
Enable/Disable Loop back Mode. More...
enum IfxPsi5s_MessagingBits {
IfxPsi5s_MessagingBits_absent = 0,
IfxPsi5s_MessagingBits_present = 1
}
Messaging bits presence. More...
enum IfxPsi5s_NumberExpectedFrames {
IfxPsi5s_NumberExpectedFrames_1 = 1,
IfxPsi5s_NumberExpectedFrames_2,
IfxPsi5s_NumberExpectedFrames_3,
IfxPsi5s_NumberExpectedFrames_4,
IfxPsi5s_NumberExpectedFrames_5,
IfxPsi5s_NumberExpectedFrames_6
}
MODULE_PSI5S.NFC.NFx:Expected Psi5s frames. More...
enum IfxPsi5s_SleepMode {
IfxPsi5s_SleepMode_enable = 0,
IfxPsi5s_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_PSI5S.CLC.B.EDIS. More...
enum IfxPsi5s_SuspendMode {
IfxPsi5s_SuspendMode_none = 0,
IfxPsi5s_SuspendMode_hard = 1,
IfxPsi5s_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxPsi5s_TimeBase {
IfxPsi5s_TimeBase_internal = 0,
IfxPsi5s_TimeBase_external = 1
}
MODULE_PSI5S.TSCNTA.B.TBS;MODULE_PSI5S.TSCNTB.B.TBS:Time base. More...
enum IfxPsi5s_TimeStampCount {
IfxPsi5s_TimeStampCount_stopped = 0,
IfxPsi5s_TimeStampCount_started = 1
}
Start/stop Current time stamp count. More...
enum IfxPsi5s_TimestampRegister {
IfxPsi5s_TimestampRegister_a = 0,
IfxPsi5s_TimestampRegister_b = 1
}
MODULE_PSI5S.TSCNTx(x= A,B):Timestamp register. More...
enum IfxPsi5s_TimestampTrigger {
IfxPsi5s_TimestampTrigger_syncPulse = 0,
IfxPsi5s_TimestampTrigger_frame = 1
}
MODULE_PSI5S.RCRAx.TSTS:Timestamp trigger. More...
enum IfxPsi5s_Trigger {
IfxPsi5s_Trigger_0 = 0,
IfxPsi5s_Trigger_1,
IfxPsi5s_Trigger_2,
IfxPsi5s_Trigger_3,
IfxPsi5s_Trigger_4,
IfxPsi5s_Trigger_5,
IfxPsi5s_Trigger_6,
IfxPsi5s_Trigger_7
}
MODULE_PSI5S.TSCNTA.B.ETB;MODULE_PSI5S.TSCNTB.B.ETB:Trigger Id. More...
enum IfxPsi5s_TriggerOutput {
IfxPsi5s_TriggerOutput_0 = 0,
IfxPsi5s_TriggerOutput_1,
IfxPsi5s_TriggerOutput_2,
IfxPsi5s_TriggerOutput_3,
IfxPsi5s_TriggerOutput_4,
IfxPsi5s_TriggerOutput_5,
IfxPsi5s_TriggerOutput_6,
IfxPsi5s_TriggerOutput_7
}
specifies service request line defined in MODULE_PSI5S.INP[x].U More...
enum IfxPsi5s_TriggerType {
IfxPsi5s_TriggerType_periodic = 0,
IfxPsi5s_TriggerType_external = 1
}
Trigger type defined in. More...
enum IfxPsi5s_UartFrameCount {
IfxPsi5s_UartFrameCount_3 = 0,
IfxPsi5s_UartFrameCount_4,
IfxPsi5s_UartFrameCount_5,
IfxPsi5s_UartFrameCount_6
}
MODULE_PSI5S.RCRAx.UFCY(x=0,1,...7;y=0,1...5):UART frame count. More...
enum IfxPsi5s_WatchdogTimerMode {
IfxPsi5s_WatchdogTimerMode_frame = 0,
IfxPsi5s_WatchdogTimerMode_syncPulse = 1
}
MODULE_PSI5S.RCRAx.WDMS:Watchdog timer mode. More...

Detailed Description

Enumeration Type Documentation

◆ IfxPsi5s_AlternateInput

enum IfxPsi5s_AlternateInput

MODULE_PSI5S.IOCR.ALTI:Alternate input.

Enumerator
IfxPsi5s_AlternateInput_0 | Alternate Input 0.
IfxPsi5s_AlternateInput_1 | Alternate Input 1.
IfxPsi5s_AlternateInput_2 | Alternate Input 2.
IfxPsi5s_AlternateInput_3 | Alternate Input 3.

Definition at line 78 of file IfxPsi5s.h.

◆ IfxPsi5s_AscBaudratePrescalar

enum IfxPsi5s_AscBaudratePrescalar

MODULE_PSI5S.BG.BR_VALUE:Baudrate prescalar select.

Enumerator
IfxPsi5s_AscBaudratePrescalar_divideBy2 | Divide by 2 is selected for baudrate timer prescalar.
IfxPsi5s_AscBaudratePrescalar_divideBy3 | Divide by 3 is selected for baudrate timer prescalar.

Definition at line 88 of file IfxPsi5s.h.

◆ IfxPsi5s_AscMode

enum IfxPsi5s_AscMode

MODULE_PSI5S.CON.M:ASC mode of operation.

Enumerator
IfxPsi5s_AscMode_sync | Synchronous mode.
IfxPsi5s_AscMode_async_8bitData | Asynchronous mode with 8 bit data.
IfxPsi5s_AscMode_async_7bitDataWithParity | Asynchronous mode with 7 bit data with parity.
IfxPsi5s_AscMode_async_9bitData | Asynchronous mode with 9 bit data.
IfxPsi5s_AscMode_async_8bitDataWithWakeup | Asynchronous mode with 8 bit data with wakeup.
IfxPsi5s_AscMode_async_8bitDataWithParity | Asynchronous mode with 8 bit data with parity.

Definition at line 96 of file IfxPsi5s.h.

◆ IfxPsi5s_AscStopBits

enum IfxPsi5s_AscStopBits

MODULE_PSI5S.CON.STP: Number of stop bits.

Enumerator
IfxPsi5s_AscStopBits_1 | 1 stop bit
IfxPsi5s_AscStopBits_2 | 2 stop bit

Definition at line 108 of file IfxPsi5s.h.

◆ IfxPsi5s_ChannelId

enum IfxPsi5s_ChannelId

PSI5S Channel Id defined in MODULE_PSI5S.RDS.B.CID.

Enumerator
IfxPsi5s_ChannelId_0 | Ifx_PSI5S Channel 0.
IfxPsi5s_ChannelId_1 | Ifx_PSI5S Channel 1.
IfxPsi5s_ChannelId_2 | Ifx_PSI5S Channel 2.
IfxPsi5s_ChannelId_3 | Ifx_PSI5S Channel 3.
IfxPsi5s_ChannelId_4 | Ifx_PSI5S Channel 4.
IfxPsi5s_ChannelId_5 | Ifx_PSI5S Channel 5.
IfxPsi5s_ChannelId_6 | Ifx_PSI5S Channel 6.
IfxPsi5s_ChannelId_7 | Ifx_PSI5S Channel 7.
IfxPsi5s_ChannelId_none | None of the Ifx_PSI5S Channels.

Definition at line 116 of file IfxPsi5s.h.

◆ IfxPsi5s_ClockType

enum IfxPsi5s_ClockType

Clock Selection.

Enumerator
IfxPsi5s_ClockType_fracDiv | Fractional Divide clock.
IfxPsi5s_ClockType_timeStamp | Timestamp clock.
IfxPsi5s_ClockType_ascFracDiv | Asc Fractional divider clock.
IfxPsi5s_ClockType_ascOutput | Asc output clock.

Definition at line 131 of file IfxPsi5s.h.

◆ IfxPsi5s_CrcOrParity

enum IfxPsi5s_CrcOrParity

MODULE_PSI5S.RCRAx.CRCy(x= 0,1,..7:y=0,1,..,5),MODULE_PSI5S.RCRBx.CRCy(x= 0,1,..7:y=0,1,..,5)CRC or parity.

Enumerator
IfxPsi5s_CrcOrParity_parity | parity selection
IfxPsi5s_CrcOrParity_crc | CRC selection.

Definition at line 141 of file IfxPsi5s.h.

◆ IfxPsi5s_DividerMode

enum IfxPsi5s_DividerMode

MODULE_PSI5S.FDR.DM;MODULE_PSI5S.FDRT.B.DM:Divider mode.

Enumerator
IfxPsi5s_DividerMode_spb | divider mode is off
IfxPsi5s_DividerMode_normal | divider mode is normal
IfxPsi5s_DividerMode_fractional | divider mode is fractional
IfxPsi5s_DividerMode_off | divider mode is off

Definition at line 149 of file IfxPsi5s.h.

◆ IfxPsi5s_EnhancedProtocol

enum IfxPsi5s_EnhancedProtocol

MODULE_PSI5S.SCRx.EPS(x=0,1,...,7):Enhanced protocol types.

Enumerator
IfxPsi5s_EnhancedProtocol_toothGapMethod | toothGapMethod Enhanced protocol type
IfxPsi5s_EnhancedProtocol_pulseWidth_frameFormat_1to3 | pulseWidth_frameFormat_1to3 Enhanced protocol type
IfxPsi5s_EnhancedProtocol_pulseWidth_frameFormat_4 | pulseWidth_frameFormat_4 Enhanced protocol type

Definition at line 159 of file IfxPsi5s.h.

◆ IfxPsi5s_FrameId

enum IfxPsi5s_FrameId

MODULE_PSI5S.RCRAx.FIDS(x=0,1,....,7):.Frame ID updation.

Enumerator
IfxPsi5s_FrameId_frameHeader | Frame ID is updated from packet frame header (Sync mode)
IfxPsi5s_FrameId_rollingNumber | Frame ID is a rolling number 0 .. 5 copied from FCNT.

Definition at line 168 of file IfxPsi5s.h.

◆ IfxPsi5s_IdleTime

enum IfxPsi5s_IdleTime

MODULE_PSI5S.GCR.IDT:Idle time bit count.

Enumerator
IfxPsi5s_IdleTime_1 | 1 bit Idle time
IfxPsi5s_IdleTime_2 | 2 bit Idle time
IfxPsi5s_IdleTime_3 | 3 bit Idle time
IfxPsi5s_IdleTime_4 | 4 bit Idle time
IfxPsi5s_IdleTime_5 | 5 bit Idle time
IfxPsi5s_IdleTime_6 | 6 bit Idle time
IfxPsi5s_IdleTime_7 | 7 bit Idle time
IfxPsi5s_IdleTime_8 | 8 bit Idle time
IfxPsi5s_IdleTime_9 | 9 bit Idle time
IfxPsi5s_IdleTime_10 | 10 bit Idle time
IfxPsi5s_IdleTime_11 | 11 bit Idle time
IfxPsi5s_IdleTime_12 | 12 bit Idle time
IfxPsi5s_IdleTime_13 | 13 bit Idle time
IfxPsi5s_IdleTime_14 | 14 bit Idle time
IfxPsi5s_IdleTime_15 | 15 bit Idle time
IfxPsi5s_IdleTime_16 | 16 bit Idle time

Definition at line 176 of file IfxPsi5s.h.

◆ IfxPsi5s_InterruptRequest

enum IfxPsi5s_InterruptRequest

Enable/Disable interrupt request .defined in MODULE_PSI5S.INTEN[x].

Enumerator
IfxPsi5s_InterruptRequest_disabled | no interrupt request can be generated for this source
IfxPsi5s_InterruptRequest_enabled | An Interrupt request can be generated for source.

Definition at line 198 of file IfxPsi5s.h.

◆ IfxPsi5s_InterruptSource

enum IfxPsi5s_InterruptSource

Enable/Disable the interrupt and select interrupt source pointer defined in MODULE_PSI5S.INTEN[x].U and MODULE_PSI5S.INP[x].U.

Enumerator
IfxPsi5s_InterruptSource_rsi |
IfxPsi5s_InterruptSource_rdi | Enable Interrupt Request RDI.
IfxPsi5s_InterruptSource_rbi | Enable Interrupt Request RBI.
IfxPsi5s_InterruptSource_tei | Enable Interrupt Request TEI.
IfxPsi5s_InterruptSource_chci | Enable Interrupt Request CHCI.
IfxPsi5s_InterruptSource_crci | Enable Interrupt Request CRCI.
IfxPsi5s_InterruptSource_tpi | Enable Interrupt Request TPI.
IfxPsi5s_InterruptSource_tpoi | Enable Interrupt Request TPOI.
IfxPsi5s_InterruptSource_hdi | Enable Interrupt Request HDI.

Definition at line 207 of file IfxPsi5s.h.

◆ IfxPsi5s_LoopBackMode

enum IfxPsi5s_LoopBackMode

Enable/Disable Loop back Mode.

Enumerator
IfxPsi5s_LoopBackMode_disable | loop-back mode disabled
IfxPsi5s_LoopBackMode_enable | loop-back mode enabled

Definition at line 222 of file IfxPsi5s.h.

◆ IfxPsi5s_MessagingBits

enum IfxPsi5s_MessagingBits

Messaging bits presence.

Enumerator
IfxPsi5s_MessagingBits_absent | No messaging bits.
IfxPsi5s_MessagingBits_present | 2 messaging bits

Definition at line 230 of file IfxPsi5s.h.

◆ IfxPsi5s_NumberExpectedFrames

enum IfxPsi5s_NumberExpectedFrames

MODULE_PSI5S.NFC.NFx:Expected Psi5s frames.

Enumerator
IfxPsi5s_NumberExpectedFrames_1 | 1 psi5s frame expected
IfxPsi5s_NumberExpectedFrames_2 | 2 psi5s frame expected
IfxPsi5s_NumberExpectedFrames_3 | 3 psi5s frame expected
IfxPsi5s_NumberExpectedFrames_4 | 4 psi5s frame expected
IfxPsi5s_NumberExpectedFrames_5 | 5 psi5s frame expected
IfxPsi5s_NumberExpectedFrames_6 | 6 psi5s frame expected

Definition at line 238 of file IfxPsi5s.h.

◆ IfxPsi5s_SleepMode

enum IfxPsi5s_SleepMode

Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_PSI5S.CLC.B.EDIS.

Enumerator
IfxPsi5s_SleepMode_enable | enables sleep mode
IfxPsi5s_SleepMode_disable | disables sleep mode

Definition at line 251 of file IfxPsi5s.h.

◆ IfxPsi5s_SuspendMode

enum IfxPsi5s_SuspendMode

OCDS Suspend Control (OCDS.SUS)

Enumerator
IfxPsi5s_SuspendMode_none | No suspend.
IfxPsi5s_SuspendMode_hard | Hard Suspend.
IfxPsi5s_SuspendMode_soft | Soft Suspend.

Definition at line 259 of file IfxPsi5s.h.

◆ IfxPsi5s_TimeBase

enum IfxPsi5s_TimeBase

MODULE_PSI5S.TSCNTA.B.TBS;MODULE_PSI5S.TSCNTB.B.TBS:Time base.

Enumerator
IfxPsi5s_TimeBase_internal | Internal time stamp clock.
IfxPsi5s_TimeBase_external | External GTM inputs.

Definition at line 268 of file IfxPsi5s.h.

◆ IfxPsi5s_TimeStampCount

enum IfxPsi5s_TimeStampCount

Start/stop Current time stamp count.

Enumerator
IfxPsi5s_TimeStampCount_stopped | CTS stopped.
IfxPsi5s_TimeStampCount_started | CTS Started.

Definition at line 276 of file IfxPsi5s.h.

◆ IfxPsi5s_TimestampRegister

enum IfxPsi5s_TimestampRegister

MODULE_PSI5S.TSCNTx(x= A,B):Timestamp register.

Enumerator
IfxPsi5s_TimestampRegister_a | Timestamp register A.
IfxPsi5s_TimestampRegister_b | Timestamp register B.

Definition at line 284 of file IfxPsi5s.h.

◆ IfxPsi5s_TimestampTrigger

enum IfxPsi5s_TimestampTrigger

MODULE_PSI5S.RCRAx.TSTS:Timestamp trigger.

Enumerator
IfxPsi5s_TimestampTrigger_syncPulse | Timestamp trigger on sync pulse.
IfxPsi5s_TimestampTrigger_frame | Timestamp trigger on any frame.

Definition at line 292 of file IfxPsi5s.h.

◆ IfxPsi5s_Trigger

enum IfxPsi5s_Trigger

MODULE_PSI5S.TSCNTA.B.ETB;MODULE_PSI5S.TSCNTB.B.ETB:Trigger Id.

Enumerator
IfxPsi5s_Trigger_0 | Trigger 0.
IfxPsi5s_Trigger_1 | Trigger 1.
IfxPsi5s_Trigger_2 | Trigger 2.
IfxPsi5s_Trigger_3 | Trigger 3.
IfxPsi5s_Trigger_4 | Trigger 4.
IfxPsi5s_Trigger_5 | Trigger 5.
IfxPsi5s_Trigger_6 | Trigger 6.
IfxPsi5s_Trigger_7 | Trigger 7.

Definition at line 300 of file IfxPsi5s.h.

◆ IfxPsi5s_TriggerOutput

enum IfxPsi5s_TriggerOutput

specifies service request line defined in MODULE_PSI5S.INP[x].U

Enumerator
IfxPsi5s_TriggerOutput_0 | Triggered output line is TRIGO_0.
IfxPsi5s_TriggerOutput_1 | Triggered output line is TRIGO_1.
IfxPsi5s_TriggerOutput_2 | Triggered output line is TRIGO_2.
IfxPsi5s_TriggerOutput_3 | Triggered output line is TRIGO_3.
IfxPsi5s_TriggerOutput_4 | Triggered output line is TRIGO_4.
IfxPsi5s_TriggerOutput_5 | Triggered output line is TRIGO_5.
IfxPsi5s_TriggerOutput_6 | Triggered output line is TRIGO_6.
IfxPsi5s_TriggerOutput_7 | Triggered output line is TRIGO_7.

Definition at line 314 of file IfxPsi5s.h.

◆ IfxPsi5s_TriggerType

enum IfxPsi5s_TriggerType

Trigger type defined in.

Enumerator
IfxPsi5s_TriggerType_periodic | Periodic trigger.
IfxPsi5s_TriggerType_external | External trigger.

Definition at line 328 of file IfxPsi5s.h.

◆ IfxPsi5s_UartFrameCount

enum IfxPsi5s_UartFrameCount

MODULE_PSI5S.RCRAx.UFCY(x=0,1,...7;y=0,1...5):UART frame count.

Enumerator
IfxPsi5s_UartFrameCount_3 | 3 UART frames
IfxPsi5s_UartFrameCount_4 | 4 UART frames
IfxPsi5s_UartFrameCount_5 | 5 UART frames
IfxPsi5s_UartFrameCount_6 | 6 UART frames

Definition at line 336 of file IfxPsi5s.h.

◆ IfxPsi5s_WatchdogTimerMode

enum IfxPsi5s_WatchdogTimerMode

MODULE_PSI5S.RCRAx.WDMS:Watchdog timer mode.

Enumerator
IfxPsi5s_WatchdogTimerMode_frame | Watch Dog Timer is restarted on reception of each recoverable frame (async mode)
IfxPsi5s_WatchdogTimerMode_syncPulse | Watch Dog Timer is restarted on Sync Pulse and stopped at reception of the last frame configured in NFC.NFx.(sync mode)

Definition at line 346 of file IfxPsi5s.h.


iLLD_TC38A: Channel Operative Functions

Functions
Channel Operative Functions
iLLD » PSI5S » Standard Driver
Collaboration diagram for Channel Operative Functions:

Functions

IFX_INLINE void | IfxPsi5s_fillAscTransmitBuffer (Ifx_PSI5S *psi5s, uint32 *data)
fill data into tx buffer for direct transmission(in ASC mode) More...
IFX_INLINE uint32 | IfxPsi5s_getReceiveBuffer (Ifx_PSI5S *psi5s)
received buffer in ASC mode More...
IFX_EXTERN void | IfxPsi5s_disableAscReceiver (Ifx_PSI5S *psi5s)
Asc receiver is disabled. More...
IFX_EXTERN void | IfxPsi5s_enableAscReceiver (Ifx_PSI5S *psi5s)
Enable ASC receiver. More...
IFX_EXTERN void | IfxPsi5s_enableDisableChannelTriggerCounters (Ifx_PSI5S *psi5s, uint32 channels, uint32 mask)
Enable/disable any combination of channel trigger counters selected by mask parameter. More...
IFX_EXTERN void | IfxPsi5s_enableDisableChannels (Ifx_PSI5S *psi5s, uint32 channels, uint32 mask)
Enable/disable any combination of channels selected by mask parameter. More...
IFX_EXTERN float32 | IfxPsi5s_getBaudrate (Ifx_PSI5S *psi5s, boolean synchMode, boolean divMode, IfxPsi5s_AscBaudratePrescalar baudrateSelection)
Baudrate frequency in HZ. More...
IFX_EXTERN void | IfxPsi5s_startAscTransactions (Ifx_PSI5S *psi5s)
Start ASC transactions. More...
IFX_EXTERN void | IfxPsi5s_stopAscTransactions (Ifx_PSI5S *psi5s)

Detailed Description

Function Documentation

◆ IfxPsi5s_disableAscReceiver()

IFX_EXTERN void IfxPsi5s_disableAscReceiver ( Ifx_PSI5S * psi5s )

Asc receiver is disabled.

Parameters
psi5s Pointer to PSI5S module registers
Returns
None

Definition at line 54 of file IfxPsi5s.c.

◆ IfxPsi5s_enableAscReceiver()

IFX_EXTERN void IfxPsi5s_enableAscReceiver ( Ifx_PSI5S * psi5s )

Enable ASC receiver.

Parameters
psi5s pointer to the PSI5S register space
Returns
None

Definition at line 69 of file IfxPsi5s.c.

Referenced by IfxPsi5s_Psi5s_enableAscReceiver().

◆ IfxPsi5s_enableDisableChannels()

IFX_EXTERN void IfxPsi5s_enableDisableChannels | ( | Ifx_PSI5S * | psi5s,
 |  | uint32 | channels,
 |  | uint32 | mask
 | ) |  |

Enable/disable any combination of channels selected by mask parameter.

Parameters
psi5s | pointer to the PSI5S register space
channels | specifies the channels which should be enabled/disabled
mask | specifies the channels which should be modified
Returns
None

Definition at line 83 of file IfxPsi5s.c.

Referenced by IfxPsi5s_Psi5s_enableDisableChannels().

◆ IfxPsi5s_enableDisableChannelTriggerCounters()

IFX_EXTERN void IfxPsi5s_enableDisableChannelTriggerCounters | ( | Ifx_PSI5S * | psi5s,
 |  | uint32 | channels,
 |  | uint32 | mask
 | ) |  |

Enable/disable any combination of channel trigger counters selected by mask parameter.

Parameters
psi5s | pointer to the PSI5S register space
channels | specifies the channel trigger counters which should be enabled/disabled
mask | specifies the channel trigger counters which should be modified
Returns
None

Definition at line 75 of file IfxPsi5s.c.

Referenced by IfxPsi5s_Psi5s_enableDisableChannelTriggerCounters().

◆ IfxPsi5s_fillAscTransmitBuffer()

IFX_INLINE void IfxPsi5s_fillAscTransmitBuffer | ( | Ifx_PSI5S * | psi5s,
 |  | uint32 * | data
 | ) |  |

fill data into tx buffer for direct transmission(in ASC mode)

Parameters
psi5s | pointer to the PSI5S register space
data | Pointer to data
Returns
None

Definition at line 703 of file IfxPsi5s.h.

◆ IfxPsi5s_getBaudrate()

IFX_EXTERN float32 IfxPsi5s_getBaudrate | ( | Ifx_PSI5S * | psi5s,
 |  | boolean | synchMode,
 |  | boolean | divMode,
 |  | IfxPsi5s_AscBaudratePrescalar | baudrateSelection
 | ) |  |

Baudrate frequency in HZ.

Parameters
psi5s | Pointer to PSI5s Register space
synchMode | Pointer to the configuration structure of ASC
divMode | specifies fractional/normal divider mode
baudrateSelection | select sbaudrate prescaler
Returns
baudrate in HZ

Definition at line 91 of file IfxPsi5s.c.

Referenced by IfxPsi5s_Psi5s_getBaudrate().

◆ IfxPsi5s_getReceiveBuffer()

IFX_INLINE uint32 IfxPsi5s_getReceiveBuffer ( Ifx_PSI5S * psi5s )

received buffer in ASC mode

Parameters
psi5s Pointer to PSI5s register space
Returns
recieved buffer value in asc mode

Definition at line 709 of file IfxPsi5s.h.

◆ IfxPsi5s_startAscTransactions()

IFX_EXTERN void IfxPsi5s_startAscTransactions ( Ifx_PSI5S * psi5s )

Start ASC transactions.

Parameters
psi5s pointer to the PSI5S register space
Returns
None

Definition at line 144 of file IfxPsi5s.c.

Referenced by IfxPsi5s_Psi5s_startAscTransactions().

◆ IfxPsi5s_stopAscTransactions()

IFX_EXTERN void IfxPsi5s_stopAscTransactions ( Ifx_PSI5S * psi5s )
Parameters
psi5s Pointer to PSI5S module registers
Returns
None

Definition at line 150 of file IfxPsi5s.c.


iLLD_TC38A: IO Pin Configuration Functions

Functions
IO Pin Configuration Functions
iLLD » PSI5S » Standard Driver
Collaboration diagram for IO Pin Configuration Functions:

Functions

IFX_INLINE void | IfxPsi5s_initClkPin (const IfxPsi5s_Clk_Out *clk, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a CLK output. More...
IFX_INLINE void | IfxPsi5s_initRxPin (const IfxPsi5s_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a RX input. More...
IFX_INLINE void | IfxPsi5s_initTxPin (const IfxPsi5s_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a TX output. More...
IFX_INLINE void | IfxPsi5s_setRxInput (Ifx_PSI5S *psi5s, IfxPsi5s_AlternateInput alti)
Selects the alternate input for Rx signal. More...

Detailed Description

Function Documentation

◆ IfxPsi5s_initClkPin()

IFX_INLINE void IfxPsi5s_initClkPin | ( | const IfxPsi5s_Clk_Out * | clk,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a CLK output.

Parameters
clk | the CLK Pin which should be configured
outputMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 727 of file IfxPsi5s.h.

Referenced by IfxPsi5s_Psi5s_initModule().

◆ IfxPsi5s_initRxPin()

IFX_INLINE void IfxPsi5s_initRxPin | ( | const IfxPsi5s_Rx_In * | rx,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a RX input.

Parameters
rx | the RX Pin which should be configured
inputMode | the pin input mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 737 of file IfxPsi5s.h.

Referenced by IfxPsi5s_Psi5s_initModule().

◆ IfxPsi5s_initTxPin()

IFX_INLINE void IfxPsi5s_initTxPin | ( | const IfxPsi5s_Tx_Out * | tx,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a TX output.

Parameters
tx | the TX Pin which should be configured
outputMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 748 of file IfxPsi5s.h.

Referenced by IfxPsi5s_Psi5s_initModule().

◆ IfxPsi5s_setRxInput()

IFX_INLINE void IfxPsi5s_setRxInput | ( | Ifx_PSI5S * | psi5s,
 |  | IfxPsi5s_AlternateInput | alti
 | ) |  |

Selects the alternate input for Rx signal.

Parameters
psi5s | pointer to PSI5S registers
alti | alternate input selection of Rx signal
Returns
None

Definition at line 788 of file IfxPsi5s.h.

Referenced by IfxPsi5s_initRxPin().


iLLD_TC38A: Interrupt configuration functions

Functions
Interrupt configuration functions
iLLD » PSI5S » Standard Driver
Collaboration diagram for Interrupt configuration functions:

Functions

IFX_INLINE void | IfxPsi5s_enableGlobalInterrupt (Ifx_PSI5S *psi5s, IfxPsi5s_GlobalInterruptSource interruptSource, IfxPsi5s_InterruptRequest enabled)
Enable /Disable Global Interrupt Source. More...
IFX_INLINE void | IfxPsi5s_enableInterrupt (Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channel, IfxPsi5s_InterruptSource interruptSource, IfxPsi5s_InterruptRequest enabled)
enable / disable interrupt source More...
IFX_INLINE boolean | IfxPsi5s_getReceiveInterruptStatus (Ifx_PSI5S *psi5s)
Get Receive Interrupt status. More...
IFX_INLINE boolean | IfxPsi5s_getTransmitInterruptStatus (Ifx_PSI5S *psi5s)
get Transmit Interrupt status More...
IFX_INLINE void | IfxPsi5s_setGlobalInterruptNodePointer (Ifx_PSI5S *psi5s, IfxPsi5s_GlobalInterruptSource nodePointer, IfxPsi5s_Trigger triggerOutputLine)
Sets the node pointers of PSI5-S ASC and for XCRCI and FOI. More...
IFX_INLINE void | IfxPsi5s_setInterruptNodePointer (Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channel, IfxPsi5s_InterruptSource nodePointer, IfxPsi5s_Trigger triggerOutputLine)
set interrupt node pointer More...

Detailed Description

Function Documentation

◆ IfxPsi5s_enableGlobalInterrupt()

IFX_INLINE void IfxPsi5s_enableGlobalInterrupt | ( | Ifx_PSI5S * | psi5s,
 |  | IfxPsi5s_GlobalInterruptSource | interruptSource,
 |  | IfxPsi5s_InterruptRequest | enabled
 | ) |  |

Enable /Disable Global Interrupt Source.

Parameters
psi5s | Pointer to PSI5S Module space
interruptSource | specifies Global Interrupt Source
enabled | enable /disable Interrupt
Returns
None

Definition at line 691 of file IfxPsi5s.h.

◆ IfxPsi5s_enableInterrupt()

IFX_INLINE void IfxPsi5s_enableInterrupt | ( | Ifx_PSI5S * | psi5s,
 |  | IfxPsi5s_ChannelId | channel,
 |  | IfxPsi5s_InterruptSource | interruptSource,
 |  | IfxPsi5s_InterruptRequest | enabled
 | ) |  |

enable / disable interrupt source

Parameters
psi5s | pointer to psi5s register space
channel | specifies channel number
interruptSource | specifies interrupt source
enabled | Enable / Disable the interrupt
Returns
None

Definition at line 697 of file IfxPsi5s.h.

◆ IfxPsi5s_getReceiveInterruptStatus()

IFX_INLINE boolean IfxPsi5s_getReceiveInterruptStatus ( Ifx_PSI5S * psi5s )

Get Receive Interrupt status.

Parameters
psi5s Pointer to PSI5S Register space
Returns
Receive Interrupt status

Definition at line 715 of file IfxPsi5s.h.

◆ IfxPsi5s_getTransmitInterruptStatus()

IFX_INLINE boolean IfxPsi5s_getTransmitInterruptStatus ( Ifx_PSI5S * psi5s )

get Transmit Interrupt status

Parameters
psi5s Pointer to PSI5S Module space
Returns
Transmit Interrupt status

Definition at line 721 of file IfxPsi5s.h.

◆ IfxPsi5s_setGlobalInterruptNodePointer()

IFX_INLINE void IfxPsi5s_setGlobalInterruptNodePointer | ( | Ifx_PSI5S * | psi5s,
 |  | IfxPsi5s_GlobalInterruptSource | nodePointer,
 |  | IfxPsi5s_Trigger | triggerOutputLine
 | ) |  |

Sets the node pointers of PSI5-S ASC and for XCRCI and FOI.

Parameters
psi5s | Pointer to PSI5S Register Space
nodePointer | specifies node pointer source
triggerOutputLine | select trigger Output Line
Returns
None

Definition at line 770 of file IfxPsi5s.h.

◆ IfxPsi5s_setInterruptNodePointer()

IFX_INLINE void IfxPsi5s_setInterruptNodePointer | ( | Ifx_PSI5S * | psi5s,
 |  | IfxPsi5s_ChannelId | channel,
 |  | IfxPsi5s_InterruptSource | nodePointer,
 |  | IfxPsi5s_Trigger | triggerOutputLine
 | ) |  |

set interrupt node pointer

Parameters
psi5s | specifies the pointer to PSI5S Module register space
channel | specifies channel number
nodePointer | specifies node pointer source
triggerOutputLine | select service request line
Returns
None

Definition at line 776 of file IfxPsi5s.h.


iLLD_TC38A: Module Functions

Functions
Module Functions
iLLD » PSI5S » Standard Driver
Collaboration diagram for Module Functions:

Functions

IFX_INLINE void | IfxPsi5s_clearTimeStampCounterA (Ifx_PSI5S *psi5s, boolean clearTimeStampCounter)
clear time stamp counter A More...
IFX_INLINE void | IfxPsi5s_clearTimeStampCounterB (Ifx_PSI5S *psi5s, boolean clearTimeStampCounter)
Clear Time Stamp Counter B. More...
IFX_INLINE boolean | IfxPsi5s_isModuleSuspended (Ifx_PSI5S *psi5s)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxPsi5s_setLoopBackMode (Ifx_PSI5S *psi5s, IfxPsi5s_LoopBackMode enabled)
enable /disable loop back mode More...
IFX_INLINE void | IfxPsi5s_setSleepMode (Ifx_PSI5S *psi5s, IfxPsi5s_SleepMode mode)
enable / disable sleep mode More...
IFX_INLINE void | IfxPsi5s_setSuspendMode (Ifx_PSI5S *psi5s, IfxPsi5s_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_INLINE void | IfxPsi5s_setTimeStampCounterA (Ifx_PSI5S *psi5s, IfxPsi5s_TimeStampCount startTimeStamp)
start time stamp counter A More...
IFX_INLINE void | IfxPsi5s_setTimeStampCounterB (Ifx_PSI5S *psi5s, IfxPsi5s_TimeStampCount startTimeStamp)
Start Time Stamp Counter B. More...
IFX_EXTERN void | IfxPsi5s_disableModule (Ifx_PSI5S *psi5s)
Disable PSI5S kernel. More...
IFX_EXTERN boolean | IfxPsi5s_getReadFrameStatus (Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channelId)
Get the received psi5s frame for the channel. More...
IFX_EXTERN boolean | IfxPsi5s_getSuccessfullyReceivedFrameStatus (Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channelId)
Indicates the successful reception of a frame. More...
IFX_EXTERN void | IfxPsi5s_resetModule (Ifx_PSI5S *psi5s)
resets PSI5S kernel More...

Detailed Description

Function Documentation

◆ IfxPsi5s_clearTimeStampCounterA()

IFX_INLINE void IfxPsi5s_clearTimeStampCounterA | ( | Ifx_PSI5S * | psi5s,
 |  | boolean | clearTimeStampCounter
 | ) |  |

clear time stamp counter A

Parameters
psi5s | Pointer to PSI5S Module space
clearTimeStampCounter | clear time stamp counter A
Returns
None

Definition at line 679 of file IfxPsi5s.h.

◆ IfxPsi5s_clearTimeStampCounterB()

IFX_INLINE void IfxPsi5s_clearTimeStampCounterB | ( | Ifx_PSI5S * | psi5s,
 |  | boolean | clearTimeStampCounter
 | ) |  |

Clear Time Stamp Counter B.

Parameters
psi5s | Pointer to PSI5S Module space
clearTimeStampCounter | clear Time Stamp Counter B
Returns
None

Definition at line 685 of file IfxPsi5s.h.

◆ IfxPsi5s_disableModule()

IFX_EXTERN void IfxPsi5s_disableModule ( Ifx_PSI5S * psi5s )

Disable PSI5S kernel.

Parameters
psi5s pointer to the base of PSI5S register space
Returns
None

Definition at line 60 of file IfxPsi5s.c.

◆ IfxPsi5s_getReadFrameStatus()

IFX_EXTERN boolean IfxPsi5s_getReadFrameStatus | ( | Ifx_PSI5S * | psi5s,
 |  | IfxPsi5s_ChannelId | channelId
 | ) |  |

Get the received psi5s frame for the channel.

Parameters
psi5s | Pointer to PSI5S Module
channelId | channel ID
Returns
Frame Status

Definition at line 113 of file IfxPsi5s.c.

Referenced by IfxPsi5s_Psi5s_getReadFrameStatus().

◆ IfxPsi5s_getSuccessfullyReceivedFrameStatus()

IFX_EXTERN boolean IfxPsi5s_getSuccessfullyReceivedFrameStatus | ( | Ifx_PSI5S * | psi5s,
 |  | IfxPsi5s_ChannelId | channelId
 | ) |  |

Indicates the successful reception of a frame.

Parameters
psi5s | Pointer to PSI5S module registers
channelId | Channel Number

Definition at line 119 of file IfxPsi5s.c.

◆ IfxPsi5s_isModuleSuspended()

IFX_INLINE boolean IfxPsi5s_isModuleSuspended ( Ifx_PSI5S * psi5s )

Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended.

Parameters
psi5s Pointer to PSI5S module registers
Returns
Suspend status (TRUE / FALSE)

Definition at line 758 of file IfxPsi5s.h.

◆ IfxPsi5s_resetModule()

IFX_EXTERN void IfxPsi5s_resetModule ( Ifx_PSI5S * psi5s )

resets PSI5S kernel

Parameters
psi5s pointer to PSI5S registers
Returns
None

Definition at line 125 of file IfxPsi5s.c.

◆ IfxPsi5s_setLoopBackMode()

IFX_INLINE void IfxPsi5s_setLoopBackMode | ( | Ifx_PSI5S * | psi5s,
 |  | IfxPsi5s_LoopBackMode | enabled
 | ) |  |

enable /disable loop back mode

Parameters
psi5s | pointer to PSI5S Register space
enabled | enable/disable loop back mode
Returns
None

Definition at line 782 of file IfxPsi5s.h.

Referenced by IfxPsi5s_Psi5s_initModule().

◆ IfxPsi5s_setSleepMode()

IFX_INLINE void IfxPsi5s_setSleepMode | ( | Ifx_PSI5S * | psi5s,
 |  | IfxPsi5s_SleepMode | mode
 | ) |  |

enable / disable sleep mode

Parameters
psi5s | Pointer to PSI5S register
mode | sleep mode (enable/disable)
Returns
None

Definition at line 794 of file IfxPsi5s.h.

◆ IfxPsi5s_setSuspendMode()

IFX_INLINE void IfxPsi5s_setSuspendMode | ( | Ifx_PSI5S * | psi5s,
 |  | IfxPsi5s_SuspendMode | mode
 | ) |  |

Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.

Parameters
psi5s | Pointer to PSI5S module registers
mode | Module suspend mode
Returns
None

Definition at line 803 of file IfxPsi5s.h.

◆ IfxPsi5s_setTimeStampCounterA()

IFX_INLINE void IfxPsi5s_setTimeStampCounterA | ( | Ifx_PSI5S * | psi5s,
 |  | IfxPsi5s_TimeStampCount | startTimeStamp
 | ) |  |

start time stamp counter A

Parameters
psi5s | Pointer to PSI5S Module space
startTimeStamp | Start/stop current time stamp count
Returns
None

Definition at line 814 of file IfxPsi5s.h.

◆ IfxPsi5s_setTimeStampCounterB()

IFX_INLINE void IfxPsi5s_setTimeStampCounterB | ( | Ifx_PSI5S * | psi5s,
 |  | IfxPsi5s_TimeStampCount | startTimeStamp
 | ) |  |

Start Time Stamp Counter B.

Parameters
psi5s | Pointer to PSI5S Module Space
startTimeStamp | start time stamp
Returns
None

Definition at line 820 of file IfxPsi5s.h.


iLLD_TC38A: PSI5S Pin Mapping

Data Structures | Macros | Variables
PSI5S Pin Mapping
iLLD » PSI5S
Collaboration diagram for PSI5S Pin Mapping:

Data Structures

struct | IfxPsi5s_Rx_In
RX pin mapping structure. More...
struct | IfxPsi5s_Tx_Out
TX pin mapping structure. More...
struct | IfxPsi5s_Clk_Out
CLK pin mapping structure. More...

Macros

#define | IFXPSI5S_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS 2
#define | IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS 3
#define | IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS 3

Variables

IFX_EXTERN IfxPsi5s_Clk_Out IfxPsi5s_CLK_P02_4_OUT
PSI5S CLK is a clock that can be used on a pin to drive the external PHY. More...
IFX_EXTERN IfxPsi5s_Clk_Out IfxPsi5s_CLK_P33_10_OUT
PSI5S CLK is a clock that can be used on a pin to drive the external PHY. More...
IFX_EXTERN IfxPsi5s_Rx_In IfxPsi5s_RXA_P00_3_IN
RX data input. More...
IFX_EXTERN IfxPsi5s_Rx_In IfxPsi5s_RXB_P02_5_IN
RX data input. More...
IFX_EXTERN IfxPsi5s_Rx_In IfxPsi5s_RXC_P33_5_IN
RX data input. More...
IFX_EXTERN IfxPsi5s_Tx_Out IfxPsi5s_TX_P00_4_OUT
TX data output. More...
IFX_EXTERN IfxPsi5s_Tx_Out IfxPsi5s_TX_P02_6_OUT
TX data output. More...
IFX_EXTERN IfxPsi5s_Tx_Out IfxPsi5s_TX_P33_6_OUT
TX data output. More...
IFX_EXTERN const IfxPsi5s_Clk_Out * | IfxPsi5s_Clk_Out_pinTable [IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS]
IfxPsi5s_Clk_Out table. More...
IFX_EXTERN const IfxPsi5s_Rx_In * | IfxPsi5s_Rx_In_pinTable [IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS]
IfxPsi5s_Rx_In table. More...
IFX_EXTERN const IfxPsi5s_Tx_Out * | IfxPsi5s_Tx_Out_pinTable [IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS]
IfxPsi5s_Tx_Out table. More...

Detailed Description

Data Structure Documentation

◆ IfxPsi5s_Rx_In

struct IfxPsi5s_Rx_In

RX pin mapping structure.

Definition at line 56 of file IfxPsi5s_PinMap.h.

Collaboration diagram for IfxPsi5s_Rx_In:
[legend]
Data Fields
Ifx_PSI5S * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxPsi5s_Tx_Out

struct IfxPsi5s_Tx_Out

TX pin mapping structure.

Definition at line 64 of file IfxPsi5s_PinMap.h.

Collaboration diagram for IfxPsi5s_Tx_Out:
[legend]
Data Fields
Ifx_PSI5S * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxPsi5s_Clk_Out

struct IfxPsi5s_Clk_Out

CLK pin mapping structure.

Definition at line 72 of file IfxPsi5s_PinMap.h.

Collaboration diagram for IfxPsi5s_Clk_Out:
[legend]
Data Fields
Ifx_PSI5S * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

Macro Definition Documentation

◆ IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS

#define IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS 2

Definition at line 91 of file IfxPsi5s_PinMap.h.

◆ IFXPSI5S_PINMAP_NUM_MODULES

#define IFXPSI5S_PINMAP_NUM_MODULES 1

Table dimensions.

Definition at line 90 of file IfxPsi5s_PinMap.h.

◆ IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS

#define IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS 3

Definition at line 92 of file IfxPsi5s_PinMap.h.

◆ IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS

#define IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS 3

Definition at line 93 of file IfxPsi5s_PinMap.h.

Variable Documentation

◆ IfxPsi5s_Clk_Out_pinTable

IFX_EXTERN const IfxPsi5s_Clk_Out* IfxPsi5s_Clk_Out_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS]

IfxPsi5s_Clk_Out table.

Definition at line 97 of file IfxPsi5s_PinMap.h.

◆ IfxPsi5s_CLK_P02_4_OUT

IFX_EXTERN IfxPsi5s_Clk_Out IfxPsi5s_CLK_P02_4_OUT

PSI5S CLK is a clock that can be used on a pin to drive the external PHY.

Definition at line 80 of file IfxPsi5s_PinMap.h.

◆ IfxPsi5s_CLK_P33_10_OUT

IFX_EXTERN IfxPsi5s_Clk_Out IfxPsi5s_CLK_P33_10_OUT

PSI5S CLK is a clock that can be used on a pin to drive the external PHY.

Definition at line 81 of file IfxPsi5s_PinMap.h.

◆ IfxPsi5s_Rx_In_pinTable

IFX_EXTERN const IfxPsi5s_Rx_In* IfxPsi5s_Rx_In_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS]

IfxPsi5s_Rx_In table.

Definition at line 100 of file IfxPsi5s_PinMap.h.

◆ IfxPsi5s_RXA_P00_3_IN

IFX_EXTERN IfxPsi5s_Rx_In IfxPsi5s_RXA_P00_3_IN

RX data input.

Definition at line 82 of file IfxPsi5s_PinMap.h.

◆ IfxPsi5s_RXB_P02_5_IN

IFX_EXTERN IfxPsi5s_Rx_In IfxPsi5s_RXB_P02_5_IN

RX data input.

Definition at line 83 of file IfxPsi5s_PinMap.h.

◆ IfxPsi5s_RXC_P33_5_IN

IFX_EXTERN IfxPsi5s_Rx_In IfxPsi5s_RXC_P33_5_IN

RX data input.

Definition at line 84 of file IfxPsi5s_PinMap.h.

◆ IfxPsi5s_Tx_Out_pinTable

IFX_EXTERN const IfxPsi5s_Tx_Out* IfxPsi5s_Tx_Out_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS]

IfxPsi5s_Tx_Out table.

Definition at line 103 of file IfxPsi5s_PinMap.h.

◆ IfxPsi5s_TX_P00_4_OUT

IFX_EXTERN IfxPsi5s_Tx_Out IfxPsi5s_TX_P00_4_OUT

TX data output.

Definition at line 85 of file IfxPsi5s_PinMap.h.

◆ IfxPsi5s_TX_P02_6_OUT

IFX_EXTERN IfxPsi5s_Tx_Out IfxPsi5s_TX_P02_6_OUT

TX data output.

Definition at line 86 of file IfxPsi5s_PinMap.h.

◆ IfxPsi5s_TX_P33_6_OUT

IFX_EXTERN IfxPsi5s_Tx_Out IfxPsi5s_TX_P33_6_OUT

TX data output.

Definition at line 87 of file IfxPsi5s_PinMap.h.


iLLD_TC38A: How to use the PSI5S PSI5S Interface driver?

How to use the PSI5S PSI5S Interface driver?
iLLD » PSI5S
Collaboration diagram for How to use the PSI5S PSI5S Interface driver?:

PSI5S defines a current loop based serial communication link typically used to connect airbag sensors or other peripheral devices.Data transmission and configuration of the sensor can be done by modulation of the Sync Pulses.

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Psi5s/Psi5s/IfxPsi5s_Psi5s.h>

Variables

// PSI5S handle
IfxPsi5s_Psi5s psi5s;

Module Initialisation

// create module config
IfxPsi5s_Psi5s_Config psi5sModuleConfig;
IfxPsi5s_Psi5s_initModuleConfig(&psi5sModuleConfig, &MODULE_PSI5S);
IfxPsi5s_Psi5s_initModule(&psi5s, &psi5sModuleConfig);

Channel Initialisation

// create channel config
IfxPsi5s_Psi5s_ChannelConfig psi5sChannelConfig;
IfxPsi5s_Psi5s_initChannelConfig(&psi5sChannelConfig, &psi5s);
// change channel (default is channel 0, change to channel 4)
psi5sChannelConfig.channelId = IfxPsi5s_ChannelId_4;
// change payloadlength (default is 0, i.e., no frame expecte; change to 8)
for(int slot=0; slot<6; ++slot)
{
psi5sChannelConfig.receiveControl.payloadLength[slot] = 8;
}
// change channel (default is channel 0, change to channel 4)
psi5sChannelConfig.channelId = IfxPsi5s_ChannelId_4;
// initialize the channel
IfxPsi5s_Psi5s_Channel psi5sChannel;
IfxPsi5s_Psi5s_initChannel(&psi5sChannel, &psi5sChannelConfig);

Now, PSI5S is ready. Then, call the below APIs to do operation.

Send Channel Data

uint32 channels = (1 << IfxPsi5s_ChannelId_4); // enable channel 4
uint32 mask = (1 << IfxPsi5s_ChannelId_4); // modify the selection for channel 4
// enable the channel trigger counter
IfxPsi5s_Psi5s_enableDisableChannelTriggerCounters(&psi5s, channels, mask);
// enable the channel
IfxPsi5s_Psi5s_enableDisableChannels(&psi5s, channels, mask);
// start ASC interface
IfxPsi5s_Psi5s_startAscTransactions(&psi5s);
uint32 data = 0x5;
// send data
if(IfxPsi5s_Psi5s_sendChannelData(&psi5sChannel, data))
{
// wait till data transfer is completed
while(psi5s.psi5s->INTSTAT[IfxPsi5s_ChannelId_4].B.TPI == 0);
}

Read Channel Frame

// enable ASC receiver
IfxPsi5s_Psi5s_enableAscReceiver(&psi5s);
// start ASC interface
IfxPsi5s_Psi5s_startAscTransactions(&psi5s);
// add the code below to initiate the sensor to transmit frames
// end of code to initiate the sensor to transmit frames
IfxPsi5s_Psi5s_Frame frame;
while(!IfxPsi5s_Psi5s_getReadFrameStatus(psi5,IfxPsi5s_ChannelId_4));
IfxPsi5s_Psi5s_readFrame(&psi5sChannel, &frame))


iLLD_TC38A: PSI5S

Modules
PSI5S
iLLD » PSI5S
Collaboration diagram for PSI5S:

Modules

Data Structures
Module Initialise Functions
Channel Functions
Utility Functions
Interrupt configuration Function

Detailed Description


iLLD_TC38A: Data Structures

Data Structures
Data Structures
iLLD » PSI5S » PSI5S
Collaboration diagram for Data Structures:

Data Structures

struct | IfxPsi5s_Psi5s_Clock
Clock configuration data structure. More...
struct | IfxPsi5s_Psi5s_ReceivedBits
Received individual bits. More...
struct | IfxPsi5s_Psi5s_ReceivedData
Receive data structure with different segments of data. More...
struct | IfxPsi5s_Psi5s_Timestamp
Received timestamp contents structure. More...
struct | IfxPsi5s_Psi5s
PSI5S handle data structure. More...
struct | IfxPsi5s_Psi5s_AscConfig
PSI5S module configuration structure. More...
struct | IfxPsi5s_Psi5s_ChannelTrigger
channel trigger configuration structure More...
struct | IfxPsi5s_Psi5s_GlobalControlConfig
PSI5S global control configuration structure. More...
struct | IfxPsi5s_Psi5s_Pins
Structure for PSI5S pin configuration. More...
struct | IfxPsi5s_Psi5s_PulseGeneration
Sync pulse generation configuration structure. More...
struct | IfxPsi5s_Psi5s_ReceiveControl
Receive control configuration structure - covers control fields from RCRA, RCRB and NFC registers. More...
union | IfxPsi5s_Psi5s_ReceiveData
"Received data" data structure More...
union | IfxPsi5s_Psi5s_ReceiveStatus
Receiver status data structure. More...
union | IfxPsi5s_Psi5s_ReceiveTimestamp
Receiver timestamp data structure. More...
struct | IfxPsi5s_Psi5s_TimeStampConfig
Timestamp configuration data structure. More...
struct | IfxPsi5s_Psi5s_TransmitControl
Transmit control configuration structure. More...
struct | IfxPsi5s_Psi5s_Channel
Channel handle data structure. More...
struct | IfxPsi5s_Psi5s_ChannelConfig
Channel configuration structure. More...
struct | IfxPsi5s_Psi5s_Config
PSI5S module configuration structure. More...
struct | IfxPsi5s_Psi5s_Frame
Psi5s frame data structure. More...

Detailed Description

Data Structure Documentation

◆ IfxPsi5s_Psi5s_Clock

struct IfxPsi5s_Psi5s_Clock

Clock configuration data structure.

Definition at line 179 of file IfxPsi5s_Psi5s.h.

Data Fields
uint32 | frequency | Specifies the frequency for the clock.
IfxPsi5s_DividerMode | mode | Specifies the mode of division for the clock.
IfxPsi5s_ClockType | type | Specifies the type of clock (fracDiv / timestamp)

◆ IfxPsi5s_Psi5s_ReceivedBits

struct IfxPsi5s_Psi5s_ReceivedBits

Received individual bits.

Definition at line 188 of file IfxPsi5s_Psi5s.h.

Data Fields
uint8 | actualUartFrameCount: 3 | UART frames actually received.
uint8 | ascFramingErrorFlag: 1 | ASC framing error flag.
uint8 | ascOverrunErrorFlag: 1 | ASC overrun error flag.
uint8 | ascParityErrorFlag: 1 | ASC parity error flag.
uint8 | channelId: 3 | Channel ID.
uint8 | crc: 3 | Received CRC.
uint8 | crcError: 1 | CRC error flag.
uint8 | errorFlag0: 1 | Error signalling flag 0.
uint8 | errorFlag1: 1 | Error signalling flag 1.
uint8 | frameId: 3 | Frame ID.
uint8 | headerErrorFlag: 1 | Header error signalling flag.
uint8 | packetFrameCount: 4 | Packet frame count.
uint8 | receiveBufferOverflowFlag: 1 | Receive buffer overflow flag.
uint8 | watchdogTimeoutErrorFlag: 1 | Watchdog timeout error flag.
uint8 | xcrc: 6 | Received XCRC.
uint8 | xcrcError: 1 | XCRC error flag.

◆ IfxPsi5s_Psi5s_ReceivedData

struct IfxPsi5s_Psi5s_ReceivedData

Receive data structure with different segments of data.

Definition at line 210 of file IfxPsi5s_Psi5s.h.

Data Fields
uint8 | packetFrameCount | Packet frame count.
uint32 | readData: 28 | Received data.

◆ IfxPsi5s_Psi5s_Timestamp

struct IfxPsi5s_Psi5s_Timestamp

Received timestamp contents structure.

Definition at line 218 of file IfxPsi5s_Psi5s.h.

Data Fields
uint8 | packetFrameCount: 4 | Packet frame count.
uint32 | timestamp: 24 | Received data.

◆ IfxPsi5s_Psi5s

struct IfxPsi5s_Psi5s

PSI5S handle data structure.

Definition at line 230 of file IfxPsi5s_Psi5s.h.

Data Fields
Ifx_PSI5S * psi5s Specifies the pointer to the PSI5S module registers.

◆ IfxPsi5s_Psi5s_AscConfig

struct IfxPsi5s_Psi5s_AscConfig

PSI5S module configuration structure.

Definition at line 237 of file IfxPsi5s_Psi5s.h.

Collaboration diagram for IfxPsi5s_Psi5s_AscConfig:
[legend]
Data Fields
uint32 | baudrateFrequency | Specifies the baudrate frequency.
IfxPsi5s_AscBaudratePrescalar | baudrateSelection | Specifies whether divide-by-2 or divide-by-3 is selected for baudrate prescalar.
IfxPsi5s_Psi5s_Clock | clockOutput | Specifies the output clock properties.
boolean | fractionalDividerEnabled | Specifies whether fractional divider is enabled or not.
boolean | framingCheckEnabled | Specifies whether framing check is enabled or not.
IfxPsi5s_LoopBackMode | loopbackEnabled | Specifies whether loopback is enabled or not.
boolean | overrunCheckEnabled | Specifies whether overrun check is enabled or not.
boolean | parityCheckEnabled | Specifies whether parity check is enabled or not.
IfxPsi5s_AscMode | receiveMode | Specifies the mode of operation for ASC receiver.
boolean | receiverOddParityEnabled | Specifies whether receiver parity check should be for even or odd.
IfxPsi5s_AscStopBits | stopBits | Specifies the number of stop bits.
IfxPsi5s_AscMode | transmitMode | Specifies the mode of operation for ASC transmitter.
boolean | transmitterOddParityEnabled | Specifies whether transmit parity generation should be even or odd.

◆ IfxPsi5s_Psi5s_ChannelTrigger

struct IfxPsi5s_Psi5s_ChannelTrigger

channel trigger configuration structure

Definition at line 256 of file IfxPsi5s_Psi5s.h.

Data Fields
uint32 | channelTriggerCounter | Specifies the channel trigger counter.
uint32 | channelTriggerValue | Specifies the channel trigger value CTV.

◆ IfxPsi5s_Psi5s_GlobalControlConfig

struct IfxPsi5s_Psi5s_GlobalControlConfig

PSI5S global control configuration structure.

Definition at line 264 of file IfxPsi5s_Psi5s.h.

Data Fields
boolean | ascOnlyMode | Specifies if the module is in ASC only mode.
boolean | crcErrorConsideredForRSI | Specifies whether CRCI is considered for RSI assertion.
boolean | framingErrorConsideredForRSI | Specifies whether FE is considered for RSI assertion.
boolean | headerErrorConsideredForRSI | Specifies whether HDI is considered for RSI assertion.
uint32 | idleTime | Specifies the number of stop bits in addition to last UART frame that is required for start of frame detection.
boolean | overrunErrorConsideredForRSI | Specifies whether OE is considered for RSI assertion.
boolean | parityErrorConsideredForRSI | Specifies whether PE is considered for RSI assertion.
boolean | receiveBufferErrorConsideredForRSI | Specifies whether RBI is considered for RSI assertion.
boolean | transmitErrorConsideredForRSI | Specifies whether TEI is considered for RSI assertion.
boolean | xcrcErrorConsideredForRSI | Specifies whether XCRCI is considered for RSI assertion.

◆ IfxPsi5s_Psi5s_Pins

struct IfxPsi5s_Psi5s_Pins

Structure for PSI5S pin configuration.

Definition at line 280 of file IfxPsi5s_Psi5s.h.

Collaboration diagram for IfxPsi5s_Psi5s_Pins:
[legend]
Data Fields
IFX_CONST IfxPsi5s_Clk_Out * | clk | PSI5S Clk Pin.
IfxPort_OutputMode | clkMode | Clk as output.
IfxPort_PadDriver | pinDriver | pad driver
IFX_CONST IfxPsi5s_Rx_In * | rx | PSI5S Rx pin.
IfxPort_InputMode | rxMode | Rx pin as input.
IFX_CONST IfxPsi5s_Tx_Out * | tx | PSI5S Tx pin.
IfxPort_OutputMode | txMode | Tx as output.

◆ IfxPsi5s_Psi5s_PulseGeneration

struct IfxPsi5s_Psi5s_PulseGeneration

Sync pulse generation configuration structure.

Definition at line 293 of file IfxPsi5s_Psi5s.h.

Data Fields
uint32 | codeforOne | Specifies the code used to represent '1' - referred as ATXCMD.
uint32 | codeforZero | Specifies the code used to represent '0' - referred as TXCMD.
IfxPsi5s_Trigger | externalTimeBaseSelect | Specifies the clock source for CTV in the case of external.
IfxPsi5s_Trigger | externalTriggerSelect | Specifies the trigger source in case of external triggerring.
IfxPsi5s_TriggerType | periodicOrExternal | Specifies whether periodic trigger or external trigger or bypass is selected.
IfxPsi5s_TimeBase | timeBaseSelect | Specifies the clock source for CTV as internal or external.

◆ IfxPsi5s_Psi5s_ReceiveControl

struct IfxPsi5s_Psi5s_ReceiveControl

Receive control configuration structure - covers control fields from RCRA, RCRB and NFC registers.

Definition at line 305 of file IfxPsi5s_Psi5s.h.

Data Fields
IfxPsi5s_CrcOrParity | crcOrParity[IFXPSI5S_NUM_SLOTS] | Specifies the crc or parity selection for the slots 0 to 5.
IfxPsi5s_FrameId | frameIdSelect | Specifies if frame ID is updated from frame header or is a rolling number 0..5 copied from FCNT.
IfxPsi5s_NumberExpectedFrames | numberOfFramesExpected | Specifies the number of psi5s frames expected.
uint32 | payloadLength[IFXPSI5S_NUM_SLOTS] | Specifies the payload length to be received for each slot.
boolean | timestampEnabled | Specifies whether the timestamp is enabled or not.
IfxPsi5s_TimestampRegister | timestampSelect | Specifies the timestamp register selection for pulses.
IfxPsi5s_TimestampTrigger | timestampTriggerSelect | Specifies the timestamp register selection for pulses.
IfxPsi5s_UartFrameCount | uartFrameCount[IFXPSI5S_NUM_SLOTS] | Specifies the expected number of UART frames per packet frame for each slot.
IfxPsi5s_WatchdogTimerMode | watchdogTimerModeSelect | Specifies the watchdog timer restart is wrt frame or sync pulse reception.

◆ IfxPsi5s_Psi5s_ReceiveData

union IfxPsi5s_Psi5s_ReceiveData

"Received data" data structure

Definition at line 320 of file IfxPsi5s_Psi5s.h.

Collaboration diagram for IfxPsi5s_Psi5s_ReceiveData:
[legend]
Data Fields
uint32 | rdr | received data with frame count
IfxPsi5s_Psi5s_ReceivedData | receivedData | Receive data structure with different segments of data.

◆ IfxPsi5s_Psi5s_ReceiveStatus

union IfxPsi5s_Psi5s_ReceiveStatus

Receiver status data structure.

Definition at line 328 of file IfxPsi5s_Psi5s.h.

Collaboration diagram for IfxPsi5s_Psi5s_ReceiveStatus:
[legend]
Data Fields
uint32 | rds | received status data.
IfxPsi5s_Psi5s_ReceivedBits | receivedBits | Received individual bits.

◆ IfxPsi5s_Psi5s_ReceiveTimestamp

union IfxPsi5s_Psi5s_ReceiveTimestamp

Receiver timestamp data structure.

Definition at line 336 of file IfxPsi5s_Psi5s.h.

Collaboration diagram for IfxPsi5s_Psi5s_ReceiveTimestamp:
[legend]
Data Fields
IfxPsi5s_Psi5s_Timestamp | timeStamp | Received timestamp contents structure.
uint32 | tsm | received timestamp along with frame count

◆ IfxPsi5s_Psi5s_TimeStampConfig

struct IfxPsi5s_Psi5s_TimeStampConfig

Timestamp configuration data structure.

Definition at line 344 of file IfxPsi5s_Psi5s.h.

Data Fields
IfxPsi5s_Trigger | externalTimeBaseSelect | Specifies the clock base for counter CTS in the case of external.
IfxPsi5s_TimeBase | timeBaseSelect | Specifies the clock source for CTS as internal or external.

◆ IfxPsi5s_Psi5s_TransmitControl

struct IfxPsi5s_Psi5s_TransmitControl

Transmit control configuration structure.

Definition at line 352 of file IfxPsi5s_Psi5s.h.

Data Fields
boolean | bitStuffControl | Specifies whether the bit stuffing is turned on or not.
boolean | crcGenerationControl | Specifies whether the crc generation is turned on or not.
IfxPsi5s_EnhancedProtocol | enhancedProtocolSelection | Specifies whether the enhanced protocol is selected or not.
uint32 | payloadLength | Specifies the payload length to be sent.
boolean | startSequenceGenerationControl | Specifies whether the start sequence generation is turned on or not.

◆ IfxPsi5s_Psi5s_Channel

struct IfxPsi5s_Psi5s_Channel

Channel handle data structure.

Definition at line 367 of file IfxPsi5s_Psi5s.h.

Collaboration diagram for IfxPsi5s_Psi5s_Channel:
[legend]
Data Fields
IfxPsi5s_ChannelId | channelId | Specifies the channel index.
IfxPsi5s_Psi5s * | module | The PSI5S handle structure.

◆ IfxPsi5s_Psi5s_ChannelConfig

struct IfxPsi5s_Psi5s_ChannelConfig

Channel configuration structure.

Definition at line 375 of file IfxPsi5s_Psi5s.h.

Collaboration diagram for IfxPsi5s_Psi5s_ChannelConfig:
[legend]
Data Fields
IfxPsi5s_ChannelId | channelId | Specifies the channel index.
IfxPsi5s_Psi5s_ChannelTrigger | channelTrigger | Specifies the configuration for channel trigger.
IFX_CONST IfxPsi5s_Psi5s * | module | Specifies pointer to the IfxPsi5s_Psi5s module handle.
IfxPsi5s_Psi5s_PulseGeneration | pulseGeneration | Specifies the configuration for sync pulse generation.
IfxPsi5s_Psi5s_ReceiveControl | receiveControl | Specifies the configuration for reception.
IfxPsi5s_Psi5s_TransmitControl | sendControl | Specifies the configuration for transmission.
uint32 | watchdogTimerLimit | Specifies the watchdog timer limit for each of the slots 0 to 6.

◆ IfxPsi5s_Psi5s_Config

struct IfxPsi5s_Psi5s_Config

PSI5S module configuration structure.

Definition at line 388 of file IfxPsi5s_Psi5s.h.

Collaboration diagram for IfxPsi5s_Psi5s_Config:
[legend]
Data Fields
IfxPsi5s_Psi5s_AscConfig | ascConfig | Specifies the configuration for ASC.
IfxPsi5s_Psi5s_Clock | fracDiv | Specifies fractionally divided clock properties.
IfxPsi5s_Psi5s_GlobalControlConfig | globalControlConfig | Specifies the global control configuration.
Ifx_PSI5S * | module | Specifies the pointer to the PSI5S module registers.
IFX_CONST IfxPsi5s_Psi5s_Pins * | pins | structure for PSI5S pin configuration
IfxPsi5s_Psi5s_Clock | timestampClock | Specifies the time stamp clock properties.
IfxPsi5s_Psi5s_TimeStampConfig | timestampCounterA | Specifies the time stamp counter A properties.
IfxPsi5s_Psi5s_TimeStampConfig | timestampCounterB | Specifies the time stamp counter B properties.

◆ IfxPsi5s_Psi5s_Frame

struct IfxPsi5s_Psi5s_Frame

Psi5s frame data structure.

Definition at line 402 of file IfxPsi5s_Psi5s.h.

Collaboration diagram for IfxPsi5s_Psi5s_Frame:
[legend]
Data Fields
IfxPsi5s_Psi5s_ReceiveData | data | Received data.
IfxPsi5s_Psi5s_ReceiveStatus | status | Receiver status.
IfxPsi5s_Psi5s_ReceiveTimestamp | timestamp | Receiver timestamp.


iLLD_TC38A: Module Initialise Functions

Functions
Module Initialise Functions
iLLD » PSI5S » PSI5S
Collaboration diagram for Module Initialise Functions:

Functions

IFX_EXTERN void | IfxPsi5s_Psi5s_deInitModule (IfxPsi5s_Psi5s *psi5s)
De-initialise the PSI5S module. More...
IFX_EXTERN boolean | IfxPsi5s_Psi5s_initModule (IfxPsi5s_Psi5s *psi5s, const IfxPsi5s_Psi5s_Config *config)
Initialise the PSI5S with the supplied configureation. More...
IFX_EXTERN void | IfxPsi5s_Psi5s_initModuleConfig (IfxPsi5s_Psi5s_Config *config, Ifx_PSI5S *psi5s)
Initialise buffer with default PSI5S configuration. More...

Detailed Description

Function Documentation

◆ IfxPsi5s_Psi5s_deInitModule()

IFX_EXTERN void IfxPsi5s_Psi5s_deInitModule ( IfxPsi5s_Psi5s * psi5s )

De-initialise the PSI5S module.

Parameters
psi5s pointer to the PSI5S module
Returns
None

Definition at line 84 of file IfxPsi5s_Psi5s.c.

◆ IfxPsi5s_Psi5s_initModule()

IFX_EXTERN boolean IfxPsi5s_Psi5s_initModule | ( | IfxPsi5s_Psi5s * | psi5s,
 |  | const IfxPsi5s_Psi5s_Config * | config
 | ) |  |

Initialise the PSI5S with the supplied configureation.

Parameters
psi5s | pointer to the PSI5S module
config | pointer to the PSI5S configuration
Returns
TRUE if valid otherwise FALSE

Usage Example: How to use the PSI5S PSI5S Interface driver?

Definition at line 279 of file IfxPsi5s_Psi5s.c.

◆ IfxPsi5s_Psi5s_initModuleConfig()

IFX_EXTERN void IfxPsi5s_Psi5s_initModuleConfig | ( | IfxPsi5s_Psi5s_Config * | config,
 |  | Ifx_PSI5S * | psi5s
 | ) |  |

Initialise buffer with default PSI5S configuration.

Parameters
config | pointer to the PSI5S module configuration buffer
psi5s | pointer to the PSI5S register space
Returns
None

Usage Example: How to use the PSI5S PSI5S Interface driver?

Definition at line 397 of file IfxPsi5s_Psi5s.c.


iLLD_TC38A: Channel Functions

Functions
Channel Functions
iLLD » PSI5S » PSI5S
Collaboration diagram for Channel Functions:

Functions

IFX_INLINE void | IfxPsi5s_Psi5s_enableAscReceiver (IfxPsi5s_Psi5s *psi5s)
Enable ASC interface receiver. More...
IFX_INLINE void | IfxPsi5s_Psi5s_enableDisableChannelTriggerCounters (IfxPsi5s_Psi5s *psi5s, uint32 channels, uint32 mask)
Access function to enable/disable any combination of channel trigger counters selected by mask parameter. More...
IFX_INLINE void | IfxPsi5s_Psi5s_enableDisableChannels (IfxPsi5s_Psi5s *psi5s, uint32 channels, uint32 mask)
Access function to enable/disable any combination of channels selected by mask parameter. More...
IFX_INLINE void | IfxPsi5s_Psi5s_startAscTransactions (IfxPsi5s_Psi5s *psi5s)
Start ASC transactions. More...
IFX_EXTERN boolean | IfxPsi5s_Psi5s_initChannel (IfxPsi5s_Psi5s_Channel *channel, const IfxPsi5s_Psi5s_ChannelConfig *config)
Initialize the channel with the supplied configuration. More...
IFX_EXTERN void | IfxPsi5s_Psi5s_initChannelConfig (IfxPsi5s_Psi5s_ChannelConfig *config, IfxPsi5s_Psi5s *psi5s)
Initialise buffer with default channel configuration. More...
IFX_EXTERN void | IfxPsi5s_Psi5s_readFrame (IfxPsi5s_Psi5s_Channel *channel, IfxPsi5s_Psi5s_Frame *frame)
Get the received psi5s frame for the channel. More...
IFX_EXTERN boolean | IfxPsi5s_Psi5s_sendChannelData (IfxPsi5s_Psi5s_Channel *channel, uint32 data)
Transmit the data through the channel. More...

Detailed Description

Function Documentation

◆ IfxPsi5s_Psi5s_enableAscReceiver()

IFX_INLINE void IfxPsi5s_Psi5s_enableAscReceiver ( IfxPsi5s_Psi5s * psi5s )

Enable ASC interface receiver.

Parameters
psi5s pointer to the PSI5S module
Returns
None

Usage Example: How to use the PSI5S PSI5S Interface driver?

Definition at line 582 of file IfxPsi5s_Psi5s.h.

◆ IfxPsi5s_Psi5s_enableDisableChannels()

IFX_INLINE void IfxPsi5s_Psi5s_enableDisableChannels | ( | IfxPsi5s_Psi5s * | psi5s,
 |  | uint32 | channels,
 |  | uint32 | mask
 | ) |  |

Access function to enable/disable any combination of channels selected by mask parameter.

Parameters
psi5s | pointer to the PSI5S module
channels | specifies the channels which should be enabled/disabled
mask | specifies the channels which should be modified
Returns
None

Usage Example: How to use the PSI5S PSI5S Interface driver?

Definition at line 594 of file IfxPsi5s_Psi5s.h.

◆ IfxPsi5s_Psi5s_enableDisableChannelTriggerCounters()

IFX_INLINE void IfxPsi5s_Psi5s_enableDisableChannelTriggerCounters | ( | IfxPsi5s_Psi5s * | psi5s,
 |  | uint32 | channels,
 |  | uint32 | mask
 | ) |  |

Access function to enable/disable any combination of channel trigger counters selected by mask parameter.

Parameters
psi5s | pointer to the PSI5S module
channels | specifies the channel trigger counters which should be enabled/disabled
mask | specifies the channel trigger counters which should be modified
Returns
None

Usage Example: How to use the PSI5S PSI5S Interface driver?

Definition at line 588 of file IfxPsi5s_Psi5s.h.

◆ IfxPsi5s_Psi5s_initChannel()

IFX_EXTERN boolean IfxPsi5s_Psi5s_initChannel | ( | IfxPsi5s_Psi5s_Channel * | channel,
 |  | const IfxPsi5s_Psi5s_ChannelConfig * | config
 | ) |  |

Initialize the channel with the supplied configuration.

Parameters
channel | pointer to the PSI5S channel
config | pointer to the PSI5S channel configuration
Returns
TRUE on success & FALSE if configuration not valid (e.g. missing resource)

Usage Example: How to use the PSI5S PSI5S Interface driver?

Definition at line 132 of file IfxPsi5s_Psi5s.c.

◆ IfxPsi5s_Psi5s_initChannelConfig()

IFX_EXTERN void IfxPsi5s_Psi5s_initChannelConfig | ( | IfxPsi5s_Psi5s_ChannelConfig * | config,
 |  | IfxPsi5s_Psi5s * | psi5s
 | ) |  |

Initialise buffer with default channel configuration.

Parameters
config | pointer to the PSI5S channel configuration
psi5s | pointer to the PSI5S module
Returns
None

Usage Example: How to use the PSI5S PSI5S Interface driver?

Definition at line 222 of file IfxPsi5s_Psi5s.c.

◆ IfxPsi5s_Psi5s_readFrame()

IFX_EXTERN void IfxPsi5s_Psi5s_readFrame | ( | IfxPsi5s_Psi5s_Channel * | channel,
 |  | IfxPsi5s_Psi5s_Frame * | frame
 | ) |  |

Get the received psi5s frame for the channel.

Parameters
channel | pointer to the PSI5S module
frame | pointer to the PSI5S frame buffer
Returns
None

Usage Example: How to use the PSI5S PSI5S Interface driver?

Definition at line 547 of file IfxPsi5s_Psi5s.c.

◆ IfxPsi5s_Psi5s_sendChannelData()

IFX_EXTERN boolean IfxPsi5s_Psi5s_sendChannelData | ( | IfxPsi5s_Psi5s_Channel * | channel,
 |  | uint32 | data
 | ) |  |

Transmit the data through the channel.

Parameters
channel | pointer to the PSI5S channel
data | data to be sent
Returns
TRUE if Sends data otherwise FALSE

Usage Example: How to use the PSI5S PSI5S Interface driver?

Definition at line 574 of file IfxPsi5s_Psi5s.c.

◆ IfxPsi5s_Psi5s_startAscTransactions()

IFX_INLINE void IfxPsi5s_Psi5s_startAscTransactions ( IfxPsi5s_Psi5s * psi5s )

Start ASC transactions.

Parameters
psi5s pointer to the PSI5S module
Returns
None

Usage Example: How to use the PSI5S PSI5S Interface driver?

Definition at line 600 of file IfxPsi5s_Psi5s.h.


iLLD_TC38A: Utility Functions

Functions
Utility Functions
iLLD » PSI5S » PSI5S
Collaboration diagram for Utility Functions:

Functions

IFX_STATIC uint32 | IfxPsi5s_Psi5s_getFracDivClock (Ifx_PSI5S *psi5s)
get the fracDiv clock frequency More...
IFX_STATIC uint32 | IfxPsi5s_Psi5s_initializeClock (Ifx_PSI5S *psi5s, const IfxPsi5s_Psi5s_Clock *clock)
Configure the fracDiv clock. More...
IFX_STATIC uint32 | IfxPsi5s_Psi5s_setBaudrate (Ifx_PSI5S *psi5s, uint32 baudrate, IfxPsi5s_Psi5s_AscConfig *ascConfig)
Configure the baudrate at the ASC interface. More...
IFX_EXTERN void | IfxPsi5s_Psi5s_enableModule (Ifx_PSI5S *psi5s)
Enable PSI5S kernel. More...
IFX_EXTERN void | IfxPsi5s_Psi5s_getBaudrate (Ifx_PSI5S *psi5s, IfxPsi5s_Psi5s_AscConfig *ascConfig)
get Baud Rate More...
IFX_EXTERN void | IfxPsi5s_Psi5s_resetModule (Ifx_PSI5S *psi5s)
Reset PSI5S kernel. More...

Detailed Description

Function Documentation

◆ IfxPsi5s_Psi5s_enableModule()

IFX_EXTERN void IfxPsi5s_Psi5s_enableModule ( Ifx_PSI5S * psi5s )

Enable PSI5S kernel.

Parameters
psi5s pointer to the base of PSI5S register space
Returns
None

Definition at line 91 of file IfxPsi5s_Psi5s.c.

Referenced by IfxPsi5s_Psi5s_initModule().

◆ IfxPsi5s_Psi5s_getBaudrate()

IFX_EXTERN void IfxPsi5s_Psi5s_getBaudrate | ( | Ifx_PSI5S * | psi5s,
 |  | IfxPsi5s_Psi5s_AscConfig * | ascConfig
 | ) |  |

get Baud Rate

Parameters
psi5s | Pointer to PSI5S Module space
ascConfig | Pointer to ASC configuration structure
Returns
None

Definition at line 97 of file IfxPsi5s_Psi5s.c.

◆ IfxPsi5s_Psi5s_getFracDivClock()

IFX_STATIC uint32 IfxPsi5s_Psi5s_getFracDivClock ( Ifx_PSI5S * psi5s )

get the fracDiv clock frequency

Parameters
psi5s Pointer to the base of PSI5S register space
Returns
Returns the configured fracDiv psi5s clock frequency in Hz.

Definition at line 105 of file IfxPsi5s_Psi5s.c.

Referenced by IfxPsi5s_Psi5s_initializeClock().

◆ IfxPsi5s_Psi5s_initializeClock()

IFX_STATIC uint32 IfxPsi5s_Psi5s_initializeClock | ( | Ifx_PSI5S * | psi5s,
 |  | const IfxPsi5s_Psi5s_Clock * | clock
 | ) |  |

Configure the fracDiv clock.

Parameters
psi5s | Pointer to the base of PSI5S register space
clock | Specifies the required clock frequency in Hz.
Returns
Returns the configured clock frequency in Hz.

Definition at line 440 of file IfxPsi5s_Psi5s.c.

Referenced by IfxPsi5s_Psi5s_initModule().

◆ IfxPsi5s_Psi5s_resetModule()

IFX_EXTERN void IfxPsi5s_Psi5s_resetModule ( Ifx_PSI5S * psi5s )

Reset PSI5S kernel.

Parameters
psi5s pointer to the base of PSI5S registers
Returns
None

Definition at line 557 of file IfxPsi5s_Psi5s.c.

Referenced by IfxPsi5s_Psi5s_deInitModule().

◆ IfxPsi5s_Psi5s_setBaudrate()

IFX_STATIC uint32 IfxPsi5s_Psi5s_setBaudrate | ( | Ifx_PSI5S * | psi5s,
 |  | uint32 | baudrate,
 |  | IfxPsi5s_Psi5s_AscConfig * | ascConfig
 | ) |  |

Configure the baudrate at the ASC interface.

Parameters
psi5s | Pointer to the base of PSI5S register space
baudrate | Frequency Specifies the required baudrate frequency in Hz.
ascConfig | pointer to the configuration structure for ASC
Returns
Returns the configured baudrate frequency in Hz.

Definition at line 589 of file IfxPsi5s_Psi5s.c.

Referenced by IfxPsi5s_Psi5s_initModule().


iLLD_TC38A: Interrupt configuration Function

Interrupt configuration Function
iLLD » PSI5S » PSI5S
Collaboration diagram for Interrupt configuration Function:


iLLD_TC38A: IfxPsi5s_cfg.h File Reference

  • _Impl
Macros
IfxPsi5s_cfg.h File Reference
iLLD » PSI5S

PSI5S on-chip implementation data. More...

Go to the source code of this file.

Macros

#define | IFXPSI5S_NUM_CHANNELS 8
#define | IFXPSI5S_STEP_RANGE 1024
#define | IFXPSI5S_NUM_WDTS 7
#define | IFXPSI5S_NUM_SLOTS 6
#define | IFXPSI5S_ENABLE_CHANNELTRIGGER (1 << 8)
#define | IFXPSI5S_ENABLE_CHANNEL (1 << 16)
#define | IFXPSI5S_BG_RANGE 8192
#define | IFXPSI5S_FDV_RANGE 2048
#define | IFXPSI5S_BAUDRATE_1562500 1562500
#define | IFXPSI5S_GCR_CHANNELS_ENABLE_MASK ((1 << IFXPSI5S_NUM_CHANNELS) - 1) << 16
//0x00FF0000 More...
#define | IFXPSI5S_GCR_CHANNEL_TRIGGER_COUNTERS_ENABLE_MASK ((1 << IFXPSI5S_NUM_CHANNELS) - 1) << 8
#define | IFXPSI5S_DEFAULT_SLOWCLOCK_FREQ 4000000
#define | IFXPSI5S_DEFAULT_FASTCLOCK_FREQ 6000000
#define | IFXPSI5S_DEFAULT_TIMESTAMP_FREQ 1000000
#define | IFXPSI5S_NUM_MODULES (1)

Detailed Description

PSI5S on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPsi5s_cfg.h.

Macro Definition Documentation

◆ IFXPSI5S_BAUDRATE_1562500

#define IFXPSI5S_BAUDRATE_1562500 1562500

Definition at line 78 of file IfxPsi5s_cfg.h.

Referenced by IfxPsi5s_Psi5s_initModuleConfig().

◆ IFXPSI5S_BG_RANGE

#define IFXPSI5S_BG_RANGE 8192

Definition at line 74 of file IfxPsi5s_cfg.h.

Referenced by IfxPsi5s_Psi5s_setBaudrate().

◆ IFXPSI5S_DEFAULT_FASTCLOCK_FREQ

#define IFXPSI5S_DEFAULT_FASTCLOCK_FREQ 6000000

Definition at line 88 of file IfxPsi5s_cfg.h.

◆ IFXPSI5S_DEFAULT_SLOWCLOCK_FREQ

#define IFXPSI5S_DEFAULT_SLOWCLOCK_FREQ 4000000

Definition at line 86 of file IfxPsi5s_cfg.h.

◆ IFXPSI5S_DEFAULT_TIMESTAMP_FREQ

#define IFXPSI5S_DEFAULT_TIMESTAMP_FREQ 1000000

Definition at line 90 of file IfxPsi5s_cfg.h.

◆ IFXPSI5S_ENABLE_CHANNEL

#define IFXPSI5S_ENABLE_CHANNEL (1 << 16)

Definition at line 72 of file IfxPsi5s_cfg.h.

◆ IFXPSI5S_ENABLE_CHANNELTRIGGER

#define IFXPSI5S_ENABLE_CHANNELTRIGGER (1 << 8)

Definition at line 70 of file IfxPsi5s_cfg.h.

◆ IFXPSI5S_FDV_RANGE

#define IFXPSI5S_FDV_RANGE 2048

Definition at line 76 of file IfxPsi5s_cfg.h.

Referenced by IfxPsi5s_getBaudrate(), and IfxPsi5s_Psi5s_setBaudrate().

◆ IFXPSI5S_GCR_CHANNEL_TRIGGER_COUNTERS_ENABLE_MASK

#define IFXPSI5S_GCR_CHANNEL_TRIGGER_COUNTERS_ENABLE_MASK ((1 << IFXPSI5S_NUM_CHANNELS) - 1) << 8

Definition at line 84 of file IfxPsi5s_cfg.h.

Referenced by IfxPsi5s_enableDisableChannelTriggerCounters().

◆ IFXPSI5S_GCR_CHANNELS_ENABLE_MASK

#define IFXPSI5S_GCR_CHANNELS_ENABLE_MASK ((1 << IFXPSI5S_NUM_CHANNELS) - 1) << 16

//0x00FF0000

Definition at line 82 of file IfxPsi5s_cfg.h.

Referenced by IfxPsi5s_enableDisableChannels().

◆ IFXPSI5S_NUM_CHANNELS

#define IFXPSI5S_NUM_CHANNELS 8

Definition at line 62 of file IfxPsi5s_cfg.h.

◆ IFXPSI5S_NUM_MODULES

#define IFXPSI5S_NUM_MODULES (1)

Definition at line 92 of file IfxPsi5s_cfg.h.

◆ IFXPSI5S_NUM_SLOTS

#define IFXPSI5S_NUM_SLOTS 6

Definition at line 68 of file IfxPsi5s_cfg.h.

◆ IFXPSI5S_NUM_WDTS

#define IFXPSI5S_NUM_WDTS 7

Definition at line 66 of file IfxPsi5s_cfg.h.

◆ IFXPSI5S_STEP_RANGE

#define IFXPSI5S_STEP_RANGE 1024

Definition at line 64 of file IfxPsi5s_cfg.h.

Referenced by IfxPsi5s_Psi5s_getFracDivClock(), and IfxPsi5s_Psi5s_initializeClock().


iLLD_TC38A: IfxPsi5s_PinMap.c File Reference

  • _PinMap
Variables
IfxPsi5s_PinMap.c File Reference
iLLD » PSI5S

PSI5S I/O map. More...

#include "IfxPsi5s_PinMap.h"
Include dependency graph for IfxPsi5s_PinMap.c:

Go to the source code of this file.

Variables

IfxPsi5s_Clk_Out | IfxPsi5s_CLK_P02_4_OUT = {&MODULE_PSI5S, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt4}
IfxPsi5s_Clk_Out | IfxPsi5s_CLK_P33_10_OUT = {&MODULE_PSI5S, {&MODULE_P33,10}, IfxPort_OutputIdx_alt5}
IfxPsi5s_Rx_In | IfxPsi5s_RXA_P00_3_IN = {&MODULE_PSI5S, {&MODULE_P00, 3}, Ifx_RxSel_a}
IfxPsi5s_Rx_In | IfxPsi5s_RXB_P02_5_IN = {&MODULE_PSI5S, {&MODULE_P02, 5}, Ifx_RxSel_b}
IfxPsi5s_Rx_In | IfxPsi5s_RXC_P33_5_IN = {&MODULE_PSI5S, {&MODULE_P33, 5}, Ifx_RxSel_c}
IfxPsi5s_Tx_Out | IfxPsi5s_TX_P00_4_OUT = {&MODULE_PSI5S, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt2}
IfxPsi5s_Tx_Out | IfxPsi5s_TX_P02_6_OUT = {&MODULE_PSI5S, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt2}
IfxPsi5s_Tx_Out | IfxPsi5s_TX_P33_6_OUT = {&MODULE_PSI5S, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt7}
const IfxPsi5s_Clk_Out * | IfxPsi5s_Clk_Out_pinTable [IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS]
const IfxPsi5s_Rx_In * | IfxPsi5s_Rx_In_pinTable [IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS]
const IfxPsi5s_Tx_Out * | IfxPsi5s_Tx_Out_pinTable [IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS]

Detailed Description

PSI5S I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPsi5s_PinMap.c.

Variable Documentation

◆ IfxPsi5s_Clk_Out_pinTable

const IfxPsi5s_Clk_Out* IfxPsi5s_Clk_Out_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxPsi5s_CLK_P02_4_OUT,
&IfxPsi5s_CLK_P33_10_OUT
}
}
IfxPsi5s_CLK_P33_10_OUT
IfxPsi5s_Clk_Out IfxPsi5s_CLK_P33_10_OUT
Definition: IfxPsi5s_PinMap.c:46
IfxPsi5s_CLK_P02_4_OUT
IfxPsi5s_Clk_Out IfxPsi5s_CLK_P02_4_OUT
Definition: IfxPsi5s_PinMap.c:45

Definition at line 55 of file IfxPsi5s_PinMap.c.

◆ IfxPsi5s_CLK_P02_4_OUT

IfxPsi5s_Clk_Out IfxPsi5s_CLK_P02_4_OUT = {&MODULE_PSI5S, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt4}

Definition at line 45 of file IfxPsi5s_PinMap.c.

◆ IfxPsi5s_CLK_P33_10_OUT

IfxPsi5s_Clk_Out IfxPsi5s_CLK_P33_10_OUT = {&MODULE_PSI5S, {&MODULE_P33,10}, IfxPort_OutputIdx_alt5}

Definition at line 46 of file IfxPsi5s_PinMap.c.

◆ IfxPsi5s_Rx_In_pinTable

const IfxPsi5s_Rx_In* IfxPsi5s_Rx_In_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxPsi5s_RXA_P00_3_IN,
&IfxPsi5s_RXB_P02_5_IN,
&IfxPsi5s_RXC_P33_5_IN
}
}
IfxPsi5s_RXC_P33_5_IN
IfxPsi5s_Rx_In IfxPsi5s_RXC_P33_5_IN
Definition: IfxPsi5s_PinMap.c:49
IfxPsi5s_RXA_P00_3_IN
IfxPsi5s_Rx_In IfxPsi5s_RXA_P00_3_IN
Definition: IfxPsi5s_PinMap.c:47
IfxPsi5s_RXB_P02_5_IN
IfxPsi5s_Rx_In IfxPsi5s_RXB_P02_5_IN
Definition: IfxPsi5s_PinMap.c:48

Definition at line 62 of file IfxPsi5s_PinMap.c.

◆ IfxPsi5s_RXA_P00_3_IN

IfxPsi5s_Rx_In IfxPsi5s_RXA_P00_3_IN = {&MODULE_PSI5S, {&MODULE_P00, 3}, Ifx_RxSel_a}

Definition at line 47 of file IfxPsi5s_PinMap.c.

◆ IfxPsi5s_RXB_P02_5_IN

IfxPsi5s_Rx_In IfxPsi5s_RXB_P02_5_IN = {&MODULE_PSI5S, {&MODULE_P02, 5}, Ifx_RxSel_b}

Definition at line 48 of file IfxPsi5s_PinMap.c.

◆ IfxPsi5s_RXC_P33_5_IN

IfxPsi5s_Rx_In IfxPsi5s_RXC_P33_5_IN = {&MODULE_PSI5S, {&MODULE_P33, 5}, Ifx_RxSel_c}

Definition at line 49 of file IfxPsi5s_PinMap.c.

◆ IfxPsi5s_Tx_Out_pinTable

const IfxPsi5s_Tx_Out* IfxPsi5s_Tx_Out_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxPsi5s_TX_P00_4_OUT,
&IfxPsi5s_TX_P02_6_OUT,
&IfxPsi5s_TX_P33_6_OUT
}
}
IfxPsi5s_TX_P33_6_OUT
IfxPsi5s_Tx_Out IfxPsi5s_TX_P33_6_OUT
Definition: IfxPsi5s_PinMap.c:52
IfxPsi5s_TX_P02_6_OUT
IfxPsi5s_Tx_Out IfxPsi5s_TX_P02_6_OUT
Definition: IfxPsi5s_PinMap.c:51
IfxPsi5s_TX_P00_4_OUT
IfxPsi5s_Tx_Out IfxPsi5s_TX_P00_4_OUT
Definition: IfxPsi5s_PinMap.c:50

Definition at line 70 of file IfxPsi5s_PinMap.c.

◆ IfxPsi5s_TX_P00_4_OUT

IfxPsi5s_Tx_Out IfxPsi5s_TX_P00_4_OUT = {&MODULE_PSI5S, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt2}

Definition at line 50 of file IfxPsi5s_PinMap.c.

◆ IfxPsi5s_TX_P02_6_OUT

IfxPsi5s_Tx_Out IfxPsi5s_TX_P02_6_OUT = {&MODULE_PSI5S, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt2}

Definition at line 51 of file IfxPsi5s_PinMap.c.

◆ IfxPsi5s_TX_P33_6_OUT

IfxPsi5s_Tx_Out IfxPsi5s_TX_P33_6_OUT = {&MODULE_PSI5S, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt7}

Definition at line 52 of file IfxPsi5s_PinMap.c.


iLLD_TC38A: IfxPsi5s_PinMap.h File Reference

  • _PinMap
Data Structures | Macros | Variables
IfxPsi5s_PinMap.h File Reference
iLLD » PSI5S

PSI5S I/O map. More...

#include <IfxPsi5s_reg.h>
#include <_Impl/IfxPsi5s_cfg.h>
#include <Port/Std/IfxPort.h>
Include dependency graph for IfxPsi5s_PinMap.h:

Go to the source code of this file.

Data Structures

struct | IfxPsi5s_Rx_In
RX pin mapping structure. More...
struct | IfxPsi5s_Tx_Out
TX pin mapping structure. More...
struct | IfxPsi5s_Clk_Out
CLK pin mapping structure. More...

Macros

#define | IFXPSI5S_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS 2
#define | IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS 3
#define | IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS 3

Variables

IFX_EXTERN IfxPsi5s_Clk_Out IfxPsi5s_CLK_P02_4_OUT
PSI5S CLK is a clock that can be used on a pin to drive the external PHY. More...
IFX_EXTERN IfxPsi5s_Clk_Out IfxPsi5s_CLK_P33_10_OUT
PSI5S CLK is a clock that can be used on a pin to drive the external PHY. More...
IFX_EXTERN IfxPsi5s_Rx_In IfxPsi5s_RXA_P00_3_IN
RX data input. More...
IFX_EXTERN IfxPsi5s_Rx_In IfxPsi5s_RXB_P02_5_IN
RX data input. More...
IFX_EXTERN IfxPsi5s_Rx_In IfxPsi5s_RXC_P33_5_IN
RX data input. More...
IFX_EXTERN IfxPsi5s_Tx_Out IfxPsi5s_TX_P00_4_OUT
TX data output. More...
IFX_EXTERN IfxPsi5s_Tx_Out IfxPsi5s_TX_P02_6_OUT
TX data output. More...
IFX_EXTERN IfxPsi5s_Tx_Out IfxPsi5s_TX_P33_6_OUT
TX data output. More...
IFX_EXTERN const IfxPsi5s_Clk_Out * | IfxPsi5s_Clk_Out_pinTable [IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS]
IfxPsi5s_Clk_Out table. More...
IFX_EXTERN const IfxPsi5s_Rx_In * | IfxPsi5s_Rx_In_pinTable [IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS]
IfxPsi5s_Rx_In table. More...
IFX_EXTERN const IfxPsi5s_Tx_Out * | IfxPsi5s_Tx_Out_pinTable [IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS]
IfxPsi5s_Tx_Out table. More...

Detailed Description

PSI5S I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPsi5s_PinMap.h.


iLLD_TC38A: IfxPsi5s_Psi5s.h File Reference

  • Psi5s
  • Psi5s
Data Structures | Functions
IfxPsi5s_Psi5s.h File Reference
iLLD » PSI5S

PSI5S PSI5S details. More...

#include "Psi5s/Std/IfxPsi5s.h"
#include "Scu/Std/IfxScuWdt.h"
Include dependency graph for IfxPsi5s_Psi5s.h:

Go to the source code of this file.

Data Structures

struct | IfxPsi5s_Psi5s_Clock
Clock configuration data structure. More...
struct | IfxPsi5s_Psi5s_ReceivedBits
Received individual bits. More...
struct | IfxPsi5s_Psi5s_ReceivedData
Receive data structure with different segments of data. More...
struct | IfxPsi5s_Psi5s_Timestamp
Received timestamp contents structure. More...
struct | IfxPsi5s_Psi5s
PSI5S handle data structure. More...
struct | IfxPsi5s_Psi5s_AscConfig
PSI5S module configuration structure. More...
struct | IfxPsi5s_Psi5s_ChannelTrigger
channel trigger configuration structure More...
struct | IfxPsi5s_Psi5s_GlobalControlConfig
PSI5S global control configuration structure. More...
struct | IfxPsi5s_Psi5s_Pins
Structure for PSI5S pin configuration. More...
struct | IfxPsi5s_Psi5s_PulseGeneration
Sync pulse generation configuration structure. More...
struct | IfxPsi5s_Psi5s_ReceiveControl
Receive control configuration structure - covers control fields from RCRA, RCRB and NFC registers. More...
union | IfxPsi5s_Psi5s_ReceiveData
"Received data" data structure More...
union | IfxPsi5s_Psi5s_ReceiveStatus
Receiver status data structure. More...
union | IfxPsi5s_Psi5s_ReceiveTimestamp
Receiver timestamp data structure. More...
struct | IfxPsi5s_Psi5s_TimeStampConfig
Timestamp configuration data structure. More...
struct | IfxPsi5s_Psi5s_TransmitControl
Transmit control configuration structure. More...
struct | IfxPsi5s_Psi5s_Channel
Channel handle data structure. More...
struct | IfxPsi5s_Psi5s_ChannelConfig
Channel configuration structure. More...
struct | IfxPsi5s_Psi5s_Config
PSI5S module configuration structure. More...
struct | IfxPsi5s_Psi5s_Frame
Psi5s frame data structure. More...

Functions

IFX_EXTERN void | IfxPsi5s_Psi5s_deInitModule (IfxPsi5s_Psi5s *psi5s)
De-initialise the PSI5S module. More...
IFX_EXTERN boolean | IfxPsi5s_Psi5s_initModule (IfxPsi5s_Psi5s *psi5s, const IfxPsi5s_Psi5s_Config *config)
Initialise the PSI5S with the supplied configureation. More...
IFX_EXTERN void | IfxPsi5s_Psi5s_initModuleConfig (IfxPsi5s_Psi5s_Config *config, Ifx_PSI5S *psi5s)
Initialise buffer with default PSI5S configuration. More...
IFX_INLINE void | IfxPsi5s_Psi5s_enableAscReceiver (IfxPsi5s_Psi5s *psi5s)
Enable ASC interface receiver. More...
IFX_INLINE void | IfxPsi5s_Psi5s_enableDisableChannelTriggerCounters (IfxPsi5s_Psi5s *psi5s, uint32 channels, uint32 mask)
Access function to enable/disable any combination of channel trigger counters selected by mask parameter. More...
IFX_INLINE void | IfxPsi5s_Psi5s_enableDisableChannels (IfxPsi5s_Psi5s *psi5s, uint32 channels, uint32 mask)
Access function to enable/disable any combination of channels selected by mask parameter. More...
IFX_INLINE void | IfxPsi5s_Psi5s_startAscTransactions (IfxPsi5s_Psi5s *psi5s)
Start ASC transactions. More...
IFX_EXTERN boolean | IfxPsi5s_Psi5s_initChannel (IfxPsi5s_Psi5s_Channel *channel, const IfxPsi5s_Psi5s_ChannelConfig *config)
Initialize the channel with the supplied configuration. More...
IFX_EXTERN void | IfxPsi5s_Psi5s_initChannelConfig (IfxPsi5s_Psi5s_ChannelConfig *config, IfxPsi5s_Psi5s *psi5s)
Initialise buffer with default channel configuration. More...
IFX_EXTERN void | IfxPsi5s_Psi5s_readFrame (IfxPsi5s_Psi5s_Channel *channel, IfxPsi5s_Psi5s_Frame *frame)
Get the received psi5s frame for the channel. More...
IFX_EXTERN boolean | IfxPsi5s_Psi5s_sendChannelData (IfxPsi5s_Psi5s_Channel *channel, uint32 data)
Transmit the data through the channel. More...
IFX_EXTERN void | IfxPsi5s_Psi5s_enableModule (Ifx_PSI5S *psi5s)
Enable PSI5S kernel. More...
IFX_EXTERN void | IfxPsi5s_Psi5s_getBaudrate (Ifx_PSI5S *psi5s, IfxPsi5s_Psi5s_AscConfig *ascConfig)
get Baud Rate More...
IFX_EXTERN void | IfxPsi5s_Psi5s_resetModule (Ifx_PSI5S *psi5s)
Reset PSI5S kernel. More...
IFX_INLINE boolean | IfxPsi5s_Psi5s_getReadFrameStatus (IfxPsi5s_Psi5s *psi5s, IfxPsi5s_ChannelId channelId)
Get the received psi5s frame for the channel. More...

Detailed Description

PSI5S PSI5S details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPsi5s_Psi5s.h.

Function Documentation

◆ IfxPsi5s_Psi5s_getReadFrameStatus()

IFX_INLINE boolean IfxPsi5s_Psi5s_getReadFrameStatus | ( | IfxPsi5s_Psi5s * | psi5s,
 |  | IfxPsi5s_ChannelId | channelId
 | ) |  |

Get the received psi5s frame for the channel.

Parameters
psi5s | pointer to the PSI5S module
channelId | specifies channelID
Returns
return the status of Frame

Definition at line 606 of file IfxPsi5s_Psi5s.h.


iLLD_TC38A: IfxPsi5s.h File Reference

  • Psi5s
  • Std
Enumerations | Functions
IfxPsi5s.h File Reference
iLLD » PSI5S

PSI5S basic functionality. More...

#include "_Impl/IfxPsi5s_cfg.h"
#include "_PinMap/IfxPsi5s_PinMap.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "IfxPsi5s_bf.h"
#include "IfxPsi5s_reg.h"
#include "Src/Std/IfxSrc.h"
#include "Scu/Std/IfxScuCcu.h"
Include dependency graph for IfxPsi5s.h:

Go to the source code of this file.

Enumerations

enum IfxPsi5s_AlternateInput {
IfxPsi5s_AlternateInput_0 = 0,
IfxPsi5s_AlternateInput_1,
IfxPsi5s_AlternateInput_2,
IfxPsi5s_AlternateInput_3
}
MODULE_PSI5S.IOCR.ALTI:Alternate input. More...
enum IfxPsi5s_AscBaudratePrescalar {
IfxPsi5s_AscBaudratePrescalar_divideBy2 = 0,
IfxPsi5s_AscBaudratePrescalar_divideBy3 = 1
}
MODULE_PSI5S.BG.BR_VALUE:Baudrate prescalar select. More...
enum IfxPsi5s_AscMode {
IfxPsi5s_AscMode_sync = 0,
IfxPsi5s_AscMode_async_8bitData = 1,
IfxPsi5s_AscMode_async_7bitDataWithParity = 3,
IfxPsi5s_AscMode_async_9bitData = 4,
IfxPsi5s_AscMode_async_8bitDataWithWakeup = 5,
IfxPsi5s_AscMode_async_8bitDataWithParity = 7
}
MODULE_PSI5S.CON.M:ASC mode of operation. More...
enum IfxPsi5s_AscStopBits {
IfxPsi5s_AscStopBits_1 = 0,
IfxPsi5s_AscStopBits_2
}
MODULE_PSI5S.CON.STP: Number of stop bits. More...
enum IfxPsi5s_ChannelId {
IfxPsi5s_ChannelId_0 = 0,
IfxPsi5s_ChannelId_1,
IfxPsi5s_ChannelId_2,
IfxPsi5s_ChannelId_3,
IfxPsi5s_ChannelId_4,
IfxPsi5s_ChannelId_5,
IfxPsi5s_ChannelId_6,
IfxPsi5s_ChannelId_7,
IfxPsi5s_ChannelId_none = -1
}
PSI5S Channel Id defined in MODULE_PSI5S.RDS.B.CID. More...
enum IfxPsi5s_ClockType {
IfxPsi5s_ClockType_fracDiv = 0,
IfxPsi5s_ClockType_timeStamp = 1,
IfxPsi5s_ClockType_ascFracDiv = 2,
IfxPsi5s_ClockType_ascOutput = 3
}
Clock Selection. More...
enum IfxPsi5s_CrcOrParity {
IfxPsi5s_CrcOrParity_parity = 0,
IfxPsi5s_CrcOrParity_crc = 1
}
MODULE_PSI5S.RCRAx.CRCy(x= 0,1,..7:y=0,1,..,5),MODULE_PSI5S.RCRBx.CRCy(x= 0,1,..7:y=0,1,..,5)CRC or parity. More...
enum IfxPsi5s_DividerMode {
IfxPsi5s_DividerMode_spb = 0,
IfxPsi5s_DividerMode_normal = 1,
IfxPsi5s_DividerMode_fractional = 2,
IfxPsi5s_DividerMode_off = 3
}
MODULE_PSI5S.FDR.DM;MODULE_PSI5S.FDRT.B.DM:Divider mode. More...
enum IfxPsi5s_EnhancedProtocol {
IfxPsi5s_EnhancedProtocol_toothGapMethod = 0,
IfxPsi5s_EnhancedProtocol_pulseWidth_frameFormat_1to3 = 1,
IfxPsi5s_EnhancedProtocol_pulseWidth_frameFormat_4 = 3
}
MODULE_PSI5S.SCRx.EPS(x=0,1,...,7):Enhanced protocol types. More...
enum IfxPsi5s_FrameId {
IfxPsi5s_FrameId_frameHeader = 0,
IfxPsi5s_FrameId_rollingNumber = 1
}
MODULE_PSI5S.RCRAx.FIDS(x=0,1,....,7):.Frame ID updation. More...
enum IfxPsi5s_IdleTime {
IfxPsi5s_IdleTime_1 = 0,
IfxPsi5s_IdleTime_2,
IfxPsi5s_IdleTime_3,
IfxPsi5s_IdleTime_4,
IfxPsi5s_IdleTime_5,
IfxPsi5s_IdleTime_6,
IfxPsi5s_IdleTime_7,
IfxPsi5s_IdleTime_8,
IfxPsi5s_IdleTime_9,
IfxPsi5s_IdleTime_10,
IfxPsi5s_IdleTime_11,
IfxPsi5s_IdleTime_12,
IfxPsi5s_IdleTime_13,
IfxPsi5s_IdleTime_14,
IfxPsi5s_IdleTime_15,
IfxPsi5s_IdleTime_16
}
MODULE_PSI5S.GCR.IDT:Idle time bit count. More...
enum IfxPsi5s_InterruptRequest {
IfxPsi5s_InterruptRequest_disabled = 0,
IfxPsi5s_InterruptRequest_enabled = 1
}
Enable/Disable interrupt request .defined in MODULE_PSI5S.INTEN[x]. More...
enum IfxPsi5s_InterruptSource {
IfxPsi5s_InterruptSource_rsi = 0,
IfxPsi5s_InterruptSource_rdi = 1,
IfxPsi5s_InterruptSource_rbi = 2,
IfxPsi5s_InterruptSource_tei = 3,
IfxPsi5s_InterruptSource_chci = 4,
IfxPsi5s_InterruptSource_crci = 5,
IfxPsi5s_InterruptSource_tpi = 6,
IfxPsi5s_InterruptSource_tpoi = 7,
IfxPsi5s_InterruptSource_hdi = 8
}
Enable/Disable the interrupt and select interrupt source pointer defined in MODULE_PSI5S.INTEN[x].U and MODULE_PSI5S.INP[x].U. More...
enum IfxPsi5s_LoopBackMode {
IfxPsi5s_LoopBackMode_disable = 0,
IfxPsi5s_LoopBackMode_enable = 1
}
Enable/Disable Loop back Mode. More...
enum IfxPsi5s_MessagingBits {
IfxPsi5s_MessagingBits_absent = 0,
IfxPsi5s_MessagingBits_present = 1
}
Messaging bits presence. More...
enum IfxPsi5s_NumberExpectedFrames {
IfxPsi5s_NumberExpectedFrames_1 = 1,
IfxPsi5s_NumberExpectedFrames_2,
IfxPsi5s_NumberExpectedFrames_3,
IfxPsi5s_NumberExpectedFrames_4,
IfxPsi5s_NumberExpectedFrames_5,
IfxPsi5s_NumberExpectedFrames_6
}
MODULE_PSI5S.NFC.NFx:Expected Psi5s frames. More...
enum IfxPsi5s_SleepMode {
IfxPsi5s_SleepMode_enable = 0,
IfxPsi5s_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_PSI5S.CLC.B.EDIS. More...
enum IfxPsi5s_SuspendMode {
IfxPsi5s_SuspendMode_none = 0,
IfxPsi5s_SuspendMode_hard = 1,
IfxPsi5s_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxPsi5s_TimeBase {
IfxPsi5s_TimeBase_internal = 0,
IfxPsi5s_TimeBase_external = 1
}
MODULE_PSI5S.TSCNTA.B.TBS;MODULE_PSI5S.TSCNTB.B.TBS:Time base. More...
enum IfxPsi5s_TimeStampCount {
IfxPsi5s_TimeStampCount_stopped = 0,
IfxPsi5s_TimeStampCount_started = 1
}
Start/stop Current time stamp count. More...
enum IfxPsi5s_TimestampRegister {
IfxPsi5s_TimestampRegister_a = 0,
IfxPsi5s_TimestampRegister_b = 1
}
MODULE_PSI5S.TSCNTx(x= A,B):Timestamp register. More...
enum IfxPsi5s_TimestampTrigger {
IfxPsi5s_TimestampTrigger_syncPulse = 0,
IfxPsi5s_TimestampTrigger_frame = 1
}
MODULE_PSI5S.RCRAx.TSTS:Timestamp trigger. More...
enum IfxPsi5s_Trigger {
IfxPsi5s_Trigger_0 = 0,
IfxPsi5s_Trigger_1,
IfxPsi5s_Trigger_2,
IfxPsi5s_Trigger_3,
IfxPsi5s_Trigger_4,
IfxPsi5s_Trigger_5,
IfxPsi5s_Trigger_6,
IfxPsi5s_Trigger_7
}
MODULE_PSI5S.TSCNTA.B.ETB;MODULE_PSI5S.TSCNTB.B.ETB:Trigger Id. More...
enum IfxPsi5s_TriggerOutput {
IfxPsi5s_TriggerOutput_0 = 0,
IfxPsi5s_TriggerOutput_1,
IfxPsi5s_TriggerOutput_2,
IfxPsi5s_TriggerOutput_3,
IfxPsi5s_TriggerOutput_4,
IfxPsi5s_TriggerOutput_5,
IfxPsi5s_TriggerOutput_6,
IfxPsi5s_TriggerOutput_7
}
specifies service request line defined in MODULE_PSI5S.INP[x].U More...
enum IfxPsi5s_TriggerType {
IfxPsi5s_TriggerType_periodic = 0,
IfxPsi5s_TriggerType_external = 1
}
Trigger type defined in. More...
enum IfxPsi5s_UartFrameCount {
IfxPsi5s_UartFrameCount_3 = 0,
IfxPsi5s_UartFrameCount_4,
IfxPsi5s_UartFrameCount_5,
IfxPsi5s_UartFrameCount_6
}
MODULE_PSI5S.RCRAx.UFCY(x=0,1,...7;y=0,1...5):UART frame count. More...
enum IfxPsi5s_WatchdogTimerMode {
IfxPsi5s_WatchdogTimerMode_frame = 0,
IfxPsi5s_WatchdogTimerMode_syncPulse = 1
}
MODULE_PSI5S.RCRAx.WDMS:Watchdog timer mode. More...
enum IfxPsi5s_GlobalInterruptSource {
IfxPsi5s_GlobalInterruptSource_tir = 0,
IfxPsi5s_GlobalInterruptSource_rir = 1,
IfxPsi5s_GlobalInterruptSource_eir = 2,
IfxPsi5s_GlobalInterruptSource_tbir = 3,
IfxPsi5s_GlobalInterruptSource_xcrci = 4,
IfxPsi5s_GlobalInterruptSource_foi = 5
}
List of Global interrupt sources or registers INTxG. More...

Functions

IFX_INLINE void | IfxPsi5s_fillAscTransmitBuffer (Ifx_PSI5S *psi5s, uint32 *data)
fill data into tx buffer for direct transmission(in ASC mode) More...
IFX_INLINE uint32 | IfxPsi5s_getReceiveBuffer (Ifx_PSI5S *psi5s)
received buffer in ASC mode More...
IFX_EXTERN void | IfxPsi5s_disableAscReceiver (Ifx_PSI5S *psi5s)
Asc receiver is disabled. More...
IFX_EXTERN void | IfxPsi5s_enableAscReceiver (Ifx_PSI5S *psi5s)
Enable ASC receiver. More...
IFX_EXTERN void | IfxPsi5s_enableDisableChannelTriggerCounters (Ifx_PSI5S *psi5s, uint32 channels, uint32 mask)
Enable/disable any combination of channel trigger counters selected by mask parameter. More...
IFX_EXTERN void | IfxPsi5s_enableDisableChannels (Ifx_PSI5S *psi5s, uint32 channels, uint32 mask)
Enable/disable any combination of channels selected by mask parameter. More...
IFX_EXTERN float32 | IfxPsi5s_getBaudrate (Ifx_PSI5S *psi5s, boolean synchMode, boolean divMode, IfxPsi5s_AscBaudratePrescalar baudrateSelection)
Baudrate frequency in HZ. More...
IFX_EXTERN void | IfxPsi5s_startAscTransactions (Ifx_PSI5S *psi5s)
Start ASC transactions. More...
IFX_EXTERN void | IfxPsi5s_stopAscTransactions (Ifx_PSI5S *psi5s)
IFX_INLINE void | IfxPsi5s_initClkPin (const IfxPsi5s_Clk_Out *clk, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a CLK output. More...
IFX_INLINE void | IfxPsi5s_initRxPin (const IfxPsi5s_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a RX input. More...
IFX_INLINE void | IfxPsi5s_initTxPin (const IfxPsi5s_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a TX output. More...
IFX_INLINE void | IfxPsi5s_setRxInput (Ifx_PSI5S *psi5s, IfxPsi5s_AlternateInput alti)
Selects the alternate input for Rx signal. More...
IFX_INLINE void | IfxPsi5s_enableGlobalInterrupt (Ifx_PSI5S *psi5s, IfxPsi5s_GlobalInterruptSource interruptSource, IfxPsi5s_InterruptRequest enabled)
Enable /Disable Global Interrupt Source. More...
IFX_INLINE void | IfxPsi5s_enableInterrupt (Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channel, IfxPsi5s_InterruptSource interruptSource, IfxPsi5s_InterruptRequest enabled)
enable / disable interrupt source More...
IFX_INLINE boolean | IfxPsi5s_getReceiveInterruptStatus (Ifx_PSI5S *psi5s)
Get Receive Interrupt status. More...
IFX_INLINE boolean | IfxPsi5s_getTransmitInterruptStatus (Ifx_PSI5S *psi5s)
get Transmit Interrupt status More...
IFX_INLINE void | IfxPsi5s_setGlobalInterruptNodePointer (Ifx_PSI5S *psi5s, IfxPsi5s_GlobalInterruptSource nodePointer, IfxPsi5s_Trigger triggerOutputLine)
Sets the node pointers of PSI5-S ASC and for XCRCI and FOI. More...
IFX_INLINE void | IfxPsi5s_setInterruptNodePointer (Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channel, IfxPsi5s_InterruptSource nodePointer, IfxPsi5s_Trigger triggerOutputLine)
set interrupt node pointer More...
IFX_INLINE void | IfxPsi5s_clearTimeStampCounterA (Ifx_PSI5S *psi5s, boolean clearTimeStampCounter)
clear time stamp counter A More...
IFX_INLINE void | IfxPsi5s_clearTimeStampCounterB (Ifx_PSI5S *psi5s, boolean clearTimeStampCounter)
Clear Time Stamp Counter B. More...
IFX_INLINE boolean | IfxPsi5s_isModuleSuspended (Ifx_PSI5S *psi5s)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxPsi5s_setLoopBackMode (Ifx_PSI5S *psi5s, IfxPsi5s_LoopBackMode enabled)
enable /disable loop back mode More...
IFX_INLINE void | IfxPsi5s_setSleepMode (Ifx_PSI5S *psi5s, IfxPsi5s_SleepMode mode)
enable / disable sleep mode More...
IFX_INLINE void | IfxPsi5s_setSuspendMode (Ifx_PSI5S *psi5s, IfxPsi5s_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_INLINE void | IfxPsi5s_setTimeStampCounterA (Ifx_PSI5S *psi5s, IfxPsi5s_TimeStampCount startTimeStamp)
start time stamp counter A More...
IFX_INLINE void | IfxPsi5s_setTimeStampCounterB (Ifx_PSI5S *psi5s, IfxPsi5s_TimeStampCount startTimeStamp)
Start Time Stamp Counter B. More...
IFX_EXTERN void | IfxPsi5s_disableModule (Ifx_PSI5S *psi5s)
Disable PSI5S kernel. More...
IFX_EXTERN boolean | IfxPsi5s_getReadFrameStatus (Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channelId)
Get the received psi5s frame for the channel. More...
IFX_EXTERN boolean | IfxPsi5s_getSuccessfullyReceivedFrameStatus (Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channelId)
Indicates the successful reception of a frame. More...
IFX_EXTERN void | IfxPsi5s_resetModule (Ifx_PSI5S *psi5s)
resets PSI5S kernel More...
IFX_INLINE boolean | IfxPsi5s_getInterruptStatus (Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channel, IfxPsi5s_InterruptSource interruptSource)
Shows status of any interrupt in any channell in PSI5S. More...
IFX_INLINE void | IfxPsi5s_clearInterruptStatus (Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channel, IfxPsi5s_InterruptSource interruptSource)
Clears the status of any interrupt of any PSI5-S channel. More...
IFX_INLINE boolean | IfxPsi5s_getGlobalInterruptStatus (Ifx_PSI5S *psi5s, IfxPsi5s_GlobalInterruptSource interruptSource)
Show the status of any global interrupt, i.e. of the ASC inside PSI5-S and XCRCI indicating a non recoverable message is received. More...
IFX_INLINE void | IfxPsi5s_clearGlobalInterruptStatus (Ifx_PSI5S *psi5s, IfxPsi5s_GlobalInterruptSource interruptSource)
Clears the status of any interrupt of the ASC integrated in PSI5-S and for XCRCI and FOI. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxPsi5s_getSrcAddress (Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channel)
Get address of the SRC register. More...

Detailed Description

PSI5S basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPsi5s.h.

Enumeration Type Documentation

◆ IfxPsi5s_GlobalInterruptSource

enum IfxPsi5s_GlobalInterruptSource

List of Global interrupt sources or registers INTxG.

Enumerator
IfxPsi5s_GlobalInterruptSource_tir | Enable Interrupt Request TIR.
IfxPsi5s_GlobalInterruptSource_rir | Enable Interrupt Request RIR.
IfxPsi5s_GlobalInterruptSource_eir | Enable Interrupt Request EIR.
IfxPsi5s_GlobalInterruptSource_tbir | Enable Interrupt Request TBIR.
IfxPsi5s_GlobalInterruptSource_xcrci | Enable Interrupt Request XCRCI.
IfxPsi5s_GlobalInterruptSource_foi | Enable Interrupt Request FOI.

Definition at line 356 of file IfxPsi5s.h.

Function Documentation

◆ IfxPsi5s_clearGlobalInterruptStatus()

IFX_INLINE void IfxPsi5s_clearGlobalInterruptStatus | ( | Ifx_PSI5S * | psi5s,
 |  | IfxPsi5s_GlobalInterruptSource | interruptSource
 | ) |  |

Clears the status of any interrupt of the ASC integrated in PSI5-S and for XCRCI and FOI.

Parameters
psi5s | Pointer to PSI5S SFR's base address
interruptSource | Interrupt source under consideration
Returns
None

Definition at line 844 of file IfxPsi5s.h.

◆ IfxPsi5s_clearInterruptStatus()

IFX_INLINE void IfxPsi5s_clearInterruptStatus | ( | Ifx_PSI5S * | psi5s,
 |  | IfxPsi5s_ChannelId | channel,
 |  | IfxPsi5s_InterruptSource | interruptSource
 | ) |  |

Clears the status of any interrupt of any PSI5-S channel.

Parameters
psi5s | Pointer to PSI5S SFR's base address
channel | Channel ID of channel whose interrupt needs to be cleared
interruptSource | Interrupt Source to be cleared
Returns
None

Definition at line 832 of file IfxPsi5s.h.

◆ IfxPsi5s_getGlobalInterruptStatus()

IFX_INLINE boolean IfxPsi5s_getGlobalInterruptStatus | ( | Ifx_PSI5S * | psi5s,
 |  | IfxPsi5s_GlobalInterruptSource | interruptSource
 | ) |  |

Show the status of any global interrupt, i.e. of the ASC inside PSI5-S and XCRCI indicating a non recoverable message is received.

Parameters
psi5s | Pointer to PSI5S SFR's base address
interruptSource | Interrupt source under consideration

Definition at line 838 of file IfxPsi5s.h.

◆ IfxPsi5s_getInterruptStatus()

IFX_INLINE boolean IfxPsi5s_getInterruptStatus | ( | Ifx_PSI5S * | psi5s,
 |  | IfxPsi5s_ChannelId | channel,
 |  | IfxPsi5s_InterruptSource | interruptSource
 | ) |  |

Shows status of any interrupt in any channell in PSI5S.

Parameters
psi5s | Pointer to PSI5S SFR's base address
channel | Channel ID of channel whose interrupt status is required
interruptSource | Interrupt Source to be cleared

Definition at line 826 of file IfxPsi5s.h.

◆ IfxPsi5s_getSrcAddress()

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxPsi5s_getSrcAddress | ( | Ifx_PSI5S * | psi5s,
 |  | IfxPsi5s_ChannelId | channel
 | ) |  |

Get address of the SRC register.

Parameters
psi5s | Pointer to PSI5S SFR's base address
channel | Channel ID of the channel to get the corresponding SRC pointer

Definition at line 156 of file IfxPsi5s.c.


iLLD_TC38A: QSPI

Modules | Files
QSPI
iLLD
Collaboration diagram for QSPI:

Modules

Implementation
Standard Driver
QSPI Pin Mapping
How to use the SPI Master Interface driver?
SPI Master Driver
How to use the SPI Slave Interface driver?
SPI Slave Driver

Files

file | IfxQspi_cfg.h
QSPI on-chip implementation data.
file | IfxQspi_PinMap.c
QSPI I/O map.
file | IfxQspi_PinMap.h
QSPI I/O map.
file | IfxQspi_SpiMaster.h
QSPI SPIMASTER details.
file | IfxQspi_SpiSlave.h
QSPI SPISLAVE details.
file | IfxQspi.h
QSPI basic functionality.

Detailed Description


iLLD_TC38A: Implementation

Modules
Implementation
iLLD » QSPI
Collaboration diagram for Implementation:

Modules

Enumerations

Detailed Description


iLLD_TC38A: Enumerations

Enumerations
iLLD » QSPI » Implementation
Collaboration diagram for Enumerations:


iLLD_TC38A: Standard Driver

Modules
Standard Driver
iLLD » QSPI
Collaboration diagram for Standard Driver:

Modules

Enumerations
Operative Functions
Support Functions
Interrupt Functions
IO Pin Configuration Functions

Detailed Description


iLLD_TC38A: Enumerations

Enumerations
Enumerations
iLLD » QSPI » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxQspi_ChannelId {
IfxQspi_ChannelId_0,
IfxQspi_ChannelId_1,
IfxQspi_ChannelId_2,
IfxQspi_ChannelId_3,
IfxQspi_ChannelId_4,
IfxQspi_ChannelId_5,
IfxQspi_ChannelId_6,
IfxQspi_ChannelId_7,
IfxQspi_ChannelId_8,
IfxQspi_ChannelId_9,
IfxQspi_ChannelId_10,
IfxQspi_ChannelId_11,
IfxQspi_ChannelId_12,
IfxQspi_ChannelId_13,
IfxQspi_ChannelId_14
}
QSPI channel Number (BACON.CS) More...
enum IfxQspi_DataLengthUnit {
IfxQspi_DataLengthUnit_bit = 0,
IfxQspi_DataLengthUnit_byte = 1
}
Data length unit of a frame (BACON.BYTE) More...
enum IfxQspi_Error {
IfxQspi_Error_none = 0,
IfxQspi_Error_parity = 1,
IfxQspi_Error_configuration = 2,
IfxQspi_Error_baudrate = 4,
IfxQspi_Error_txfifoOverflow = 8,
IfxQspi_Error_txfifoUnderflow = 16,
IfxQspi_Error_rxfifoOverflow = 32,
IfxQspi_Error_rxfifoUnderflow = 64,
IfxQspi_Error_expectTimeout = 128,
IfxQspi_Error_slsiMisplacedInactivation = 256
}
QSPI Error Flags (STATUS.ERRORFLAGS) More...
enum IfxQspi_ExpectTimeout {
IfxQspi_ExpectTimeout_64 = 0,
IfxQspi_ExpectTimeout_128 = 1,
IfxQspi_ExpectTimeout_256 = 2,
IfxQspi_ExpectTimeout_512 = 3,
IfxQspi_ExpectTimeout_1024 = 4,
IfxQspi_ExpectTimeout_2048 = 5,
IfxQspi_ExpectTimeout_4096 = 6,
IfxQspi_ExpectTimeout_8192 = 7,
IfxQspi_ExpectTimeout_16384 = 8,
IfxQspi_ExpectTimeout_32768 = 9,
IfxQspi_ExpectTimeout_65536 = 10,
IfxQspi_ExpectTimeout_131072 = 11,
IfxQspi_ExpectTimeout_262144 = 12,
IfxQspi_ExpectTimeout_524288 = 13,
IfxQspi_ExpectTimeout_1048576 = 14,
IfxQspi_ExpectTimeout_2097152 = 15
}
Frame Expect phase time out value. More...
enum IfxQspi_Mode {
IfxQspi_Mode_master = 0,
IfxQspi_Mode_pwmOverQspi = 1,
IfxQspi_Mode_slave = 2
}
QSPI controller mode (GLOBALCON.MODE) More...
enum IfxQspi_PauseRunTransition {
IfxQspi_PauseRunTransition_pause = 0,
IfxQspi_PauseRunTransition_run = 1
}
Request between pause and Run transition. More...
enum IfxQspi_Phase {
IfxQspi_Phase_wait = 0,
IfxQspi_Phase_idleA = 1,
IfxQspi_Phase_idleB = 2,
IfxQspi_Phase_lead = 3,
IfxQspi_Phase_data = 4,
IfxQspi_Phase_trail = 5,
IfxQspi_Phase_expect = 6,
IfxQspi_Phase_leadStrobe = 7,
IfxQspi_Phase_trailStrobe = 8
}
QSPI frame phase (STATUS.PHASE) More...
enum IfxQspi_PhaseTransitionEvent {
IfxQspi_PhaseTransitionEvent_endOfWait = 0,
IfxQspi_PhaseTransitionEvent_serialClockPolarityChange = 1,
IfxQspi_PhaseTransitionEvent_startOfFrame = 2,
IfxQspi_PhaseTransitionEvent_transmitBufferEmptied = 3,
IfxQspi_PhaseTransitionEvent_receiveBufferFilled = 4,
IfxQspi_PhaseTransitionEvent_endOfFrame = 5,
IfxQspi_PhaseTransitionEvent_dataNotAvailable = 6,
IfxQspi_PhaseTransitionEvent_endOfExpect = 7
}
Phase Transition Event. More...
enum IfxQspi_Reset {
IfxQspi_Reset_none = 0,
IfxQspi_Reset_stateMachineAndFifo = 1,
IfxQspi_Reset_registers = 2,
IfxQspi_Reset_kernel = 3
}
Reset Request (GLOBALCON.RESETS) More...
enum IfxQspi_RxFifoInt {
IfxQspi_RxFifoInt_0,
IfxQspi_RxFifoInt_1,
IfxQspi_RxFifoInt_2,
IfxQspi_RxFifoInt_3
}
Receive Fifo Interrupt Threshold. More...
enum IfxQspi_SleepMode {
IfxQspi_SleepMode_enable = 0,
IfxQspi_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_QSPI.CLC.B.EDIS. More...
enum IfxQspi_StrobeDelay {
IfxQspi_StrobeDelay_1,
IfxQspi_StrobeDelay_2,
IfxQspi_StrobeDelay_3,
IfxQspi_StrobeDelay_4,
IfxQspi_StrobeDelay_5,
IfxQspi_StrobeDelay_6,
IfxQspi_StrobeDelay_7,
IfxQspi_StrobeDelay_8,
IfxQspi_StrobeDelay_9,
IfxQspi_StrobeDelay_10,
IfxQspi_StrobeDelay_11,
IfxQspi_StrobeDelay_12,
IfxQspi_StrobeDelay_13,
IfxQspi_StrobeDelay_14,
IfxQspi_StrobeDelay_15,
IfxQspi_StrobeDelay_16,
IfxQspi_StrobeDelay_17,
IfxQspi_StrobeDelay_18,
IfxQspi_StrobeDelay_19,
IfxQspi_StrobeDelay_20,
IfxQspi_StrobeDelay_21,
IfxQspi_StrobeDelay_22,
IfxQspi_StrobeDelay_23,
IfxQspi_StrobeDelay_24,
IfxQspi_StrobeDelay_25,
IfxQspi_StrobeDelay_26,
IfxQspi_StrobeDelay_27,
IfxQspi_StrobeDelay_28,
IfxQspi_StrobeDelay_29,
IfxQspi_StrobeDelay_30,
IfxQspi_StrobeDelay_31,
IfxQspi_StrobeDelay_32
}
STROBE delay for SLSO in delayed mode (GLOBALCON.STROBE) More...
enum IfxQspi_TxFifoInt {
IfxQspi_TxFifoInt_1,
IfxQspi_TxFifoInt_2,
IfxQspi_TxFifoInt_3,
IfxQspi_TxFifoInt_4
}
Transmit Fifo Interrupt Threshold. More...

Detailed Description

Enumeration Type Documentation

◆ IfxQspi_ChannelId

enum IfxQspi_ChannelId

QSPI channel Number (BACON.CS)

Enumerator
IfxQspi_ChannelId_0 | Channel #0.
IfxQspi_ChannelId_1 | Channel #1.
IfxQspi_ChannelId_2 | Channel #2.
IfxQspi_ChannelId_3 | Channel #3.
IfxQspi_ChannelId_4 | Channel #4.
IfxQspi_ChannelId_5 | Channel #5.
IfxQspi_ChannelId_6 | Channel #6.
IfxQspi_ChannelId_7 | Channel #7.
IfxQspi_ChannelId_8 | Channel #8.
IfxQspi_ChannelId_9 | Channel #9.
IfxQspi_ChannelId_10 | Channel #10.
IfxQspi_ChannelId_11 | Channel #11.
IfxQspi_ChannelId_12 | Channel #12.
IfxQspi_ChannelId_13 | Channel #13.
IfxQspi_ChannelId_14 | Channel #14.

Definition at line 94 of file IfxQspi.h.

◆ IfxQspi_DataLengthUnit

enum IfxQspi_DataLengthUnit

Data length unit of a frame (BACON.BYTE)

Enumerator
IfxQspi_DataLengthUnit_bit | Data Length in Bits.
IfxQspi_DataLengthUnit_byte | Data length in Bytes.

Definition at line 115 of file IfxQspi.h.

◆ IfxQspi_Error

enum IfxQspi_Error

QSPI Error Flags (STATUS.ERRORFLAGS)

Enumerator
IfxQspi_Error_none | No Error.
IfxQspi_Error_parity | Parity Error.
IfxQspi_Error_configuration | Configuration Error.
IfxQspi_Error_baudrate | BaudRate Error.
IfxQspi_Error_txfifoOverflow | TX FIFO Overflow Error.
IfxQspi_Error_txfifoUnderflow | TX FIFO Underflow Error.
IfxQspi_Error_rxfifoOverflow | RX FIFO Overflow Error.
IfxQspi_Error_rxfifoUnderflow | RX FIFO Underflow Error.
IfxQspi_Error_expectTimeout | EXPECT Timeout Error.
IfxQspi_Error_slsiMisplacedInactivation | SLSI misplaced inactivation (slave mode)

Definition at line 123 of file IfxQspi.h.

◆ IfxQspi_ExpectTimeout

enum IfxQspi_ExpectTimeout

Frame Expect phase time out value.

Enumerator
IfxQspi_ExpectTimeout_64 | Expect phse time out 64.
IfxQspi_ExpectTimeout_128 | Expect phse time out 128.
IfxQspi_ExpectTimeout_256 | Expect phse time out 256.
IfxQspi_ExpectTimeout_512 | Expect phse time out 512.
IfxQspi_ExpectTimeout_1024 | Expect phse time out 1024.
IfxQspi_ExpectTimeout_2048 | Expect phse time out 2048.
IfxQspi_ExpectTimeout_4096 | Expect phse time out 4096.
IfxQspi_ExpectTimeout_8192 | Expect phse time out 8192.
IfxQspi_ExpectTimeout_16384 | Expect phse time out 16384.
IfxQspi_ExpectTimeout_32768 | Expect phse time out 32768.
IfxQspi_ExpectTimeout_65536 | Expect phse time out 65536.
IfxQspi_ExpectTimeout_131072 | Expect phse time out 131072.
IfxQspi_ExpectTimeout_262144 | Expect phse time out 262144.
IfxQspi_ExpectTimeout_524288 | Expect phse time out 524288.
IfxQspi_ExpectTimeout_1048576 | Expect phse time out 1048576.
IfxQspi_ExpectTimeout_2097152 | Expect phse time out 2097152.

Definition at line 139 of file IfxQspi.h.

◆ IfxQspi_Mode

enum IfxQspi_Mode

QSPI controller mode (GLOBALCON.MODE)

Enumerator
IfxQspi_Mode_master | QSPI in "master" mode.
IfxQspi_Mode_pwmOverQspi | QSPI in "PWM over QSPI" mode.
IfxQspi_Mode_slave | QSPI in "slave" mode.

Definition at line 161 of file IfxQspi.h.

◆ IfxQspi_PauseRunTransition

enum IfxQspi_PauseRunTransition

Request between pause and Run transition.

Enumerator
IfxQspi_PauseRunTransition_pause | Request value for pause.
IfxQspi_PauseRunTransition_run | Request value for Run.

Definition at line 170 of file IfxQspi.h.

◆ IfxQspi_Phase

enum IfxQspi_Phase

QSPI frame phase (STATUS.PHASE)

Enumerator
IfxQspi_Phase_wait | Frame wait phase.
IfxQspi_Phase_idleA | Frame idleA phase.
IfxQspi_Phase_idleB | frame idleB phase
IfxQspi_Phase_lead | Frame lead phase.
IfxQspi_Phase_data | Frame data phase.
IfxQspi_Phase_trail | Frame trail phase.
IfxQspi_Phase_expect | Frame expect phase.
IfxQspi_Phase_leadStrobe | Frame leadstrobe phase.
IfxQspi_Phase_trailStrobe | Frame trailstrobe phase.

Definition at line 178 of file IfxQspi.h.

◆ IfxQspi_PhaseTransitionEvent

enum IfxQspi_PhaseTransitionEvent

Phase Transition Event.

Enumerator
IfxQspi_PhaseTransitionEvent_endOfWait | BUSY (end of WAIT phase)
IfxQspi_PhaseTransitionEvent_serialClockPolarityChange | SCLKPC (serial clock polarity change)
IfxQspi_PhaseTransitionEvent_startOfFrame | SOF (Start Of Frame )
IfxQspi_PhaseTransitionEvent_transmitBufferEmptied | TBE (Transmit Buffer Emptied)
IfxQspi_PhaseTransitionEvent_receiveBufferFilled | RBF (Receive Buffer Filled)
IfxQspi_PhaseTransitionEvent_endOfFrame | EOF (End of Frame)
IfxQspi_PhaseTransitionEvent_dataNotAvailable | DNA (Data not Available = Start of Expect)
IfxQspi_PhaseTransitionEvent_endOfExpect | CONT (End of EXPECT phase)

Definition at line 193 of file IfxQspi.h.

◆ IfxQspi_Reset

enum IfxQspi_Reset

Reset Request (GLOBALCON.RESETS)

Enumerator
IfxQspi_Reset_none | No Reset.
IfxQspi_Reset_stateMachineAndFifo | State Machine, TXFIFO and RXFIFO reset, registers not reseted.
IfxQspi_Reset_registers | Registers Reset.
IfxQspi_Reset_kernel | Kernel / Module Reset.

Definition at line 207 of file IfxQspi.h.

◆ IfxQspi_RxFifoInt

enum IfxQspi_RxFifoInt

Receive Fifo Interrupt Threshold.

Enumerator
IfxQspi_RxFifoInt_0 | RxFifo Interrupt Threshold #0.
IfxQspi_RxFifoInt_1 | RxFifo Interrupt Threshold #1.
IfxQspi_RxFifoInt_2 | RxFifo Interrupt Threshold #2.
IfxQspi_RxFifoInt_3 | RxFifo Interrupt Threshold #3.

Definition at line 217 of file IfxQspi.h.

◆ IfxQspi_SleepMode

enum IfxQspi_SleepMode

Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_QSPI.CLC.B.EDIS.

Enumerator
IfxQspi_SleepMode_enable | Sleep Mode enabled.
IfxQspi_SleepMode_disable | Sleep Mode disabled.

Definition at line 228 of file IfxQspi.h.

◆ IfxQspi_StrobeDelay

enum IfxQspi_StrobeDelay

STROBE delay for SLSO in delayed mode (GLOBALCON.STROBE)

Enumerator
IfxQspi_StrobeDelay_1 | SLSO delay 1 cycle(s)
IfxQspi_StrobeDelay_2 | SLSO delay 2 cycle(s)
IfxQspi_StrobeDelay_3 | SLSO delay 3 cycle(s)
IfxQspi_StrobeDelay_4 | SLSO delay 4 cycle(s)
IfxQspi_StrobeDelay_5 | SLSO delay 5 cycle(s)
IfxQspi_StrobeDelay_6 | SLSO delay 6 cycle(s)
IfxQspi_StrobeDelay_7 | SLSO delay 7 cycle(s)
IfxQspi_StrobeDelay_8 | SLSO delay 8 cycle(s)
IfxQspi_StrobeDelay_9 | SLSO delay 9 cycle(s)
IfxQspi_StrobeDelay_10 | SLSO delay 10 cycle(s)
IfxQspi_StrobeDelay_11 | SLSO delay 11 cycle(s)
IfxQspi_StrobeDelay_12 | SLSO delay 12 cycle(s)
IfxQspi_StrobeDelay_13 | SLSO delay 13 cycle(s)
IfxQspi_StrobeDelay_14 | SLSO delay 14 cycle(s)
IfxQspi_StrobeDelay_15 | SLSO delay 15 cycle(s)
IfxQspi_StrobeDelay_16 | SLSO delay 16 cycle(s)
IfxQspi_StrobeDelay_17 | SLSO delay 17 cycle(s)
IfxQspi_StrobeDelay_18 | SLSO delay 18 cycle(s)
IfxQspi_StrobeDelay_19 | SLSO delay 19 cycle(s)
IfxQspi_StrobeDelay_20 | SLSO delay 20 cycle(s)
IfxQspi_StrobeDelay_21 | SLSO delay 21 cycle(s)
IfxQspi_StrobeDelay_22 | SLSO delay 22 cycle(s)
IfxQspi_StrobeDelay_23 | SLSO delay 23 cycle(s)
IfxQspi_StrobeDelay_24 | SLSO delay 24 cycle(s)
IfxQspi_StrobeDelay_25 | SLSO delay 25 cycle(s)
IfxQspi_StrobeDelay_26 | SLSO delay 26 cycle(s)
IfxQspi_StrobeDelay_27 | SLSO delay 27 cycle(s)
IfxQspi_StrobeDelay_28 | SLSO delay 28 cycle(s)
IfxQspi_StrobeDelay_29 | SLSO delay 29 cycle(s)
IfxQspi_StrobeDelay_30 | SLSO delay 30 cycle(s)
IfxQspi_StrobeDelay_31 | SLSO delay 31 cycle(s)
IfxQspi_StrobeDelay_32 | SLSO delay 32 cycle(s)

Definition at line 236 of file IfxQspi.h.

◆ IfxQspi_TxFifoInt

enum IfxQspi_TxFifoInt

Transmit Fifo Interrupt Threshold.

Enumerator
IfxQspi_TxFifoInt_1 | TxFifo Interrupt Threshold #1.
IfxQspi_TxFifoInt_2 | TxFifo Interrupt Threshold #2.
IfxQspi_TxFifoInt_3 | TxFifo Interrupt Threshold #3.
IfxQspi_TxFifoInt_4 | TxFifo Interrupt Threshold #4.

Definition at line 274 of file IfxQspi.h.


iLLD_TC38A: Operative Functions

Functions
Operative Functions
iLLD » QSPI » Standard Driver
Collaboration diagram for Operative Functions:

Functions

IFX_INLINE void | IfxQspi_clearAllEventFlags (Ifx_QSPI *qspi)
Clear ALL service requests. More...
IFX_INLINE void | IfxQspi_clearMoveCounterInterruptAfterLastFlag (Ifx_QSPI *qspi, boolean clearInterrupt)
clear the interrupt after last flag More...
IFX_INLINE void | IfxQspi_clearMoveCounterInterruptBeforeLastFlag (Ifx_QSPI *qspi, boolean clearInterrupt)
Clear the Interrupt before last flag. More...
IFX_INLINE void | IfxQspi_clearRxReq (Ifx_QSPI *qspi)
Clear RX service requests. More...
IFX_INLINE void | IfxQspi_clearTxReq (Ifx_QSPI *qspi)
Clear TX service requests. More...
IFX_INLINE void | IfxQspi_configPT1Event (Ifx_QSPI *qspi, IfxQspi_PhaseTransitionEvent pt1Config)
Configure PT1 event (also USR event depending if USREN=1 ) More...
IFX_INLINE void | IfxQspi_configPT2Event (Ifx_QSPI *qspi, IfxQspi_PhaseTransitionEvent pt2Config)
Configure PT2 event. More...
IFX_INLINE void | IfxQspi_enableLoopbackMode (Ifx_QSPI *qspi, boolean enable)
Enable/Disable Loopback mode. More...
IFX_INLINE void | IfxQspi_enablePT1Event (Ifx_QSPI *qspi, boolean enable)
enable Phase Transition1 Event More...
IFX_INLINE void | IfxQspi_enablePT2Event (Ifx_QSPI *qspi, boolean enable)
enable Phase Transition2 Event More...
IFX_INLINE void | IfxQspi_enableUsrEvent (Ifx_QSPI *qspi, boolean enable)
enable User Event (Event selected by PT1) More...
IFX_INLINE uint16 | IfxQspi_getErrorFlags (Ifx_QSPI *qspi)
IFX_INLINE void | IfxQspi_pause (Ifx_QSPI *qspi)
Request for Module in Pause state no interrupts no communication. More...
IFX_INLINE uint32 | IfxQspi_readReceiveFifo (Ifx_QSPI *qspi)
Read the oldest data from RXFIFO. More...
IFX_INLINE void | IfxQspi_requestReset (Ifx_QSPI *qspi, IfxQspi_Reset reset)
Request reset (State Machine & FIFO / Register / Module) More...
IFX_INLINE void | IfxQspi_run (Ifx_QSPI *qspi)
Request for QSPI in Run state. More...
IFX_INLINE void | IfxQspi_setMoveCounterInterruptAfterLastEnabled (Ifx_QSPI *qspi, boolean interruptEnabled)
Enable/Disable the Interrupt After last Byte. More...
IFX_INLINE void | IfxQspi_setMoveCounterInterruptAfterLastFlag (Ifx_QSPI *qspi, boolean setInterrupt)
Set the Interrupt after last flag. More...
IFX_INLINE void | IfxQspi_setMoveCounterInterruptBeforeLastEnabled (Ifx_QSPI *qspi, boolean interruptEnabled)
Enable the interrupt before last byte. More...
IFX_INLINE void | IfxQspi_setMoveCounterInterruptBeforeLastFlag (Ifx_QSPI *qspi, boolean setInterrupt)
set the interrupt before last flag More...
IFX_INLINE void | IfxQspi_setMoveCounterPrescalerTrailingDelay (Ifx_QSPI *qspi, const float baudrate)
Set the Trailing delay. More...
IFX_INLINE void | IfxQspi_setReceiveFifoInterrruptThreshold (Ifx_QSPI *qspi, IfxQspi_RxFifoInt rxFifoInt)
Set the threshold of RXFIFO for service request generation. More...
IFX_INLINE void | IfxQspi_trail2InjectionEnabled (Ifx_QSPI *qspi, boolean trail2Enabled)
specifies whether to inject the trail2 from bacon configuration or mccon configuration registers More...
IFX_INLINE void | IfxQspi_writeTransmitFifo (Ifx_QSPI *qspi, uint32 data)
Write Data into DATAENTRY register. More...
IFX_INLINE boolean | IfxQspi_isModuleSuspended (Ifx_QSPI *qspi)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxQspi_setSuspendMode (Ifx_QSPI *qspi, IfxQspi_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN void | IfxQspi_read16 (Ifx_QSPI *qspi, uint16 *data, Ifx_SizeT count)
Reads 16bit data from the Rx FIFO. More...
IFX_EXTERN void | IfxQspi_read32 (Ifx_QSPI *qspi, uint32 *data, Ifx_SizeT count)
Reads 32bit data from the Rx FIFO. More...
IFX_EXTERN void | IfxQspi_read8 (Ifx_QSPI *qspi, uint8 *data, Ifx_SizeT count)
Reads 8bit data from the Rx FIFO. More...
IFX_EXTERN void | IfxQspi_resetModule (Ifx_QSPI *qspi)
resets QSPI kernel More...
IFX_EXTERN void | IfxQspi_write16 (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint16 *data, Ifx_SizeT count)
Writes 16bit data into the Tx FIFO. More...
IFX_EXTERN void | IfxQspi_write32 (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 *data, Ifx_SizeT count)
Writes 32bit data into the Tx FIFO. More...
IFX_EXTERN void | IfxQspi_write8 (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 *data, Ifx_SizeT count)
Writes 8bit data into the Tx FIFO. More...

Detailed Description

Function Documentation

◆ IfxQspi_clearAllEventFlags()

IFX_INLINE void IfxQspi_clearAllEventFlags ( Ifx_QSPI * qspi )

Clear ALL service requests.

Parameters
qspi Pointer to QSPI module registers
Returns
None

Definition at line 960 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_initModule(), IfxQspi_SpiMaster_isrError(), IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), IfxQspi_SpiSlave_initModule(), IfxQspi_SpiSlave_isrError(), and IfxQspi_SpiSlave_write().

◆ IfxQspi_clearMoveCounterInterruptAfterLastFlag()

IFX_INLINE void IfxQspi_clearMoveCounterInterruptAfterLastFlag | ( | Ifx_QSPI * | qspi,
 |  | boolean | clearInterrupt
 | ) |  |

clear the interrupt after last flag

Parameters
qspi | Module register handler
clearInterrupt | clear the interrupt flag
Returns
None

Definition at line 966 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_moveCounterControlConfiguration().

◆ IfxQspi_clearMoveCounterInterruptBeforeLastFlag()

IFX_INLINE void IfxQspi_clearMoveCounterInterruptBeforeLastFlag | ( | Ifx_QSPI * | qspi,
 |  | boolean | clearInterrupt
 | ) |  |

Clear the Interrupt before last flag.

Parameters
qspi | handle to Module register
clearInterrupt | clear the interrupt
Returns
None

Definition at line 972 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_moveCounterControlConfiguration().

◆ IfxQspi_clearRxReq()

IFX_INLINE void IfxQspi_clearRxReq ( Ifx_QSPI * qspi )

Clear RX service requests.

Parameters
qspi Pointer to QSPI module registers
Returns
None

Definition at line 978 of file IfxQspi.h.

◆ IfxQspi_clearTxReq()

IFX_INLINE void IfxQspi_clearTxReq ( Ifx_QSPI * qspi )

Clear TX service requests.

Parameters
qspi Pointer to QSPI module registers
Returns
None

Definition at line 984 of file IfxQspi.h.

◆ IfxQspi_configPT1Event()

IFX_INLINE void IfxQspi_configPT1Event | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_PhaseTransitionEvent | pt1Config
 | ) |  |

Configure PT1 event (also USR event depending if USREN=1 )

Parameters
qspi | Pointer to QSPI module registers
pt1Config | Phase Transition1 Event Config
Returns
None

Definition at line 990 of file IfxQspi.h.

◆ IfxQspi_configPT2Event()

IFX_INLINE void IfxQspi_configPT2Event | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_PhaseTransitionEvent | pt2Config
 | ) |  |

Configure PT2 event.

Parameters
qspi | Pointer to QSPI module registers
pt2Config | Phase Transition2 Event Config
Returns
None

Definition at line 996 of file IfxQspi.h.

◆ IfxQspi_enableLoopbackMode()

IFX_INLINE void IfxQspi_enableLoopbackMode | ( | Ifx_QSPI * | qspi,
 |  | boolean | enable
 | ) |  |

Enable/Disable Loopback mode.

Parameters
qspi | Pointer to QSPI module registers
enable | Enable / Disable loopback
Returns
None

Definition at line 1002 of file IfxQspi.h.

◆ IfxQspi_enablePT1Event()

IFX_INLINE void IfxQspi_enablePT1Event | ( | Ifx_QSPI * | qspi,
 |  | boolean | enable
 | ) |  |

enable Phase Transition1 Event

Parameters
qspi | Pointer to QSPI module registers
enable | Enable (1) / Disable (0)
Returns
None

Definition at line 1010 of file IfxQspi.h.

◆ IfxQspi_enablePT2Event()

IFX_INLINE void IfxQspi_enablePT2Event | ( | Ifx_QSPI * | qspi,
 |  | boolean | enable
 | ) |  |

enable Phase Transition2 Event

Parameters
qspi | Pointer to QSPI module registers
enable | Enable (1) / Disable (0)
Returns
None

Definition at line 1016 of file IfxQspi.h.

◆ IfxQspi_enableUsrEvent()

IFX_INLINE void IfxQspi_enableUsrEvent | ( | Ifx_QSPI * | qspi,
 |  | boolean | enable
 | ) |  |

enable User Event (Event selected by PT1)

Parameters
qspi | Pointer to QSPI module registers
enable | Enable (1) / Disable (0)
Returns
None

Definition at line 1022 of file IfxQspi.h.

◆ IfxQspi_getErrorFlags()

IFX_INLINE uint16 IfxQspi_getErrorFlags ( Ifx_QSPI * qspi )
Parameters
qspi Pointer to QSPI module registers
Returns
Error Flags

Definition at line 1028 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_isrError(), and IfxQspi_SpiSlave_isrError().

◆ IfxQspi_isModuleSuspended()

IFX_INLINE boolean IfxQspi_isModuleSuspended ( Ifx_QSPI * qspi )

Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended.

Parameters
qspi Pointer to QSPI module registers
Returns
Suspend status (TRUE / FALSE)

Definition at line 1353 of file IfxQspi.h.

◆ IfxQspi_pause()

IFX_INLINE void IfxQspi_pause ( Ifx_QSPI * qspi )

Request for Module in Pause state no interrupts no communication.

Parameters
qspi Pointer to QSPI module registers
Returns
None

Definition at line 1168 of file IfxQspi.h.

◆ IfxQspi_read16()

IFX_EXTERN void IfxQspi_read16 | ( | Ifx_QSPI * | qspi,
 |  | uint16 * | data,
 |  | Ifx_SizeT | count
 | ) |  |

Reads 16bit data from the Rx FIFO.

Parameters
qspi | Pointer to QSPI module registers
data | Received data will be copied into this array
count | Number of items to be received
Returns
None

Definition at line 313 of file IfxQspi.c.

Referenced by IfxQspi_SpiMaster_read(), and IfxQspi_SpiSlave_read().

◆ IfxQspi_read32()

IFX_EXTERN void IfxQspi_read32 | ( | Ifx_QSPI * | qspi,
 |  | uint32 * | data,
 |  | Ifx_SizeT | count
 | ) |  |

Reads 32bit data from the Rx FIFO.

Parameters
qspi | Pointer to QSPI module registers
data | Received data will be copied into this array
count | Number of items to be received
Returns
None

Definition at line 325 of file IfxQspi.c.

Referenced by IfxQspi_SpiMaster_read(), and IfxQspi_SpiSlave_read().

◆ IfxQspi_read8()

IFX_EXTERN void IfxQspi_read8 | ( | Ifx_QSPI * | qspi,
 |  | uint8 * | data,
 |  | Ifx_SizeT | count
 | ) |  |

Reads 8bit data from the Rx FIFO.

Parameters
qspi | Pointer to QSPI module registers
data | Received data will be copied into this array
count | Number of items to be received
Returns
None

Definition at line 337 of file IfxQspi.c.

Referenced by IfxQspi_SpiMaster_read(), and IfxQspi_SpiSlave_read().

◆ IfxQspi_readReceiveFifo()

IFX_INLINE uint32 IfxQspi_readReceiveFifo ( Ifx_QSPI * qspi )

Read the oldest data from RXFIFO.

Parameters
qspi Pointer to QSPI module registers

Definition at line 1184 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_read(), IfxQspi_SpiMaster_readReceiveFifo(), IfxQspi_SpiSlave_read(), and IfxQspi_SpiSlave_readReceiveFifo().

◆ IfxQspi_requestReset()

IFX_INLINE void IfxQspi_requestReset | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_Reset | reset
 | ) |  |

Request reset (State Machine & FIFO / Register / Module)

Parameters
qspi | Pointer to QSPI module registers
reset | reset type (GLOBALCON.RESETS)
Returns
None

Definition at line 1190 of file IfxQspi.h.

◆ IfxQspi_resetModule()

IFX_EXTERN void IfxQspi_resetModule ( Ifx_QSPI * qspi )

resets QSPI kernel

Parameters
qspi pointer to QSPI registers
Returns
None

Definition at line 365 of file IfxQspi.c.

◆ IfxQspi_run()

IFX_INLINE void IfxQspi_run ( Ifx_QSPI * qspi )

Request for QSPI in Run state.

Parameters
qspi Pointer to QSPI module registers
Returns
None

Definition at line 1196 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_initModule(), and IfxQspi_SpiSlave_initModule().

◆ IfxQspi_setMoveCounterInterruptAfterLastEnabled()

IFX_INLINE void IfxQspi_setMoveCounterInterruptAfterLastEnabled | ( | Ifx_QSPI * | qspi,
 |  | boolean | interruptEnabled
 | ) |  |

Enable/Disable the Interrupt After last Byte.

Parameters
qspi | Module register handler
interruptEnabled | Enable/Disable the interrupt after last byte
Returns
None

Definition at line 1235 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_moveCounterControlConfiguration().

◆ IfxQspi_setMoveCounterInterruptAfterLastFlag()

IFX_INLINE void IfxQspi_setMoveCounterInterruptAfterLastFlag | ( | Ifx_QSPI * | qspi,
 |  | boolean | setInterrupt
 | ) |  |

Set the Interrupt after last flag.

Parameters
qspi | Module register handler
setInterrupt | set the interrupt Flag
Returns
None

Definition at line 1241 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_moveCounterControlConfiguration().

◆ IfxQspi_setMoveCounterInterruptBeforeLastEnabled()

IFX_INLINE void IfxQspi_setMoveCounterInterruptBeforeLastEnabled | ( | Ifx_QSPI * | qspi,
 |  | boolean | interruptEnabled
 | ) |  |

Enable the interrupt before last byte.

Parameters
qspi | Pointer to Qspi Module Register
interruptEnabled | Specifies Interrupt is enable or disable
Returns
None

Definition at line 1247 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_moveCounterControlConfiguration().

◆ IfxQspi_setMoveCounterInterruptBeforeLastFlag()

IFX_INLINE void IfxQspi_setMoveCounterInterruptBeforeLastFlag | ( | Ifx_QSPI * | qspi,
 |  | boolean | setInterrupt
 | ) |  |

set the interrupt before last flag

Parameters
qspi | Module register handler
setInterrupt | set the interrupt before last flag
Returns
None

Definition at line 1253 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_moveCounterControlConfiguration().

◆ IfxQspi_setMoveCounterPrescalerTrailingDelay()

IFX_INLINE void IfxQspi_setMoveCounterPrescalerTrailingDelay | ( | Ifx_QSPI * | qspi,
 |  | const float | baudrate
 | ) |  |

Set the Trailing delay.

Parameters
qspi | handle of Module
baudrate | Baud rate
Returns
None

Definition at line 1259 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_initChannel().

◆ IfxQspi_setReceiveFifoInterrruptThreshold()

IFX_INLINE void IfxQspi_setReceiveFifoInterrruptThreshold | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_RxFifoInt | rxFifoInt
 | ) |  |

Set the threshold of RXFIFO for service request generation.

Parameters
qspi | Pointer to QSPI module registers
rxFifoInt | RxFIFO Interrupt threshold to set
Returns
None

Definition at line 1265 of file IfxQspi.h.

◆ IfxQspi_setSuspendMode()

IFX_INLINE void IfxQspi_setSuspendMode | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_SuspendMode | mode
 | ) |  |

Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.

Parameters
qspi | Pointer to QSPI module registers
mode | Module suspend mode
Returns
None

Definition at line 1365 of file IfxQspi.h.

◆ IfxQspi_trail2InjectionEnabled()

IFX_INLINE void IfxQspi_trail2InjectionEnabled | ( | Ifx_QSPI * | qspi,
 |  | boolean | trail2Enabled
 | ) |  |

specifies whether to inject the trail2 from bacon configuration or mccon configuration registers

Parameters
qspi | Module Register Handler
trail2Enabled | Enable/Disable Trail2 from MCCON register
Returns
None

Definition at line 1302 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_moveCounterControlConfiguration().

◆ IfxQspi_write16()

IFX_EXTERN void IfxQspi_write16 | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_ChannelId | channelId,
 |  | uint16 * | data,
 |  | Ifx_SizeT | count
 | ) |  |

Writes 16bit data into the Tx FIFO.

Parameters
qspi | Pointer to QSPI module registers
channelId | Channel number to which econ val belongs
data | Array of data to be sent
count | Number of items to be sent
Returns
None

Definition at line 412 of file IfxQspi.c.

Referenced by IfxQspi_SpiMaster_write(), and IfxQspi_SpiSlave_write().

◆ IfxQspi_write32()

IFX_EXTERN void IfxQspi_write32 | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_ChannelId | channelId,
 |  | uint32 * | data,
 |  | Ifx_SizeT | count
 | ) |  |

Writes 32bit data into the Tx FIFO.

Parameters
qspi | Pointer to QSPI module registers
channelId | Channel number to which econ val belongs
data | Array of data to be sent
count | Number of items to be sent
Returns
None

Definition at line 425 of file IfxQspi.c.

Referenced by IfxQspi_SpiMaster_write(), and IfxQspi_SpiSlave_write().

◆ IfxQspi_write8()

IFX_EXTERN void IfxQspi_write8 | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_ChannelId | channelId,
 |  | uint8 * | data,
 |  | Ifx_SizeT | count
 | ) |  |

Writes 8bit data into the Tx FIFO.

Parameters
qspi | Pointer to QSPI module registers
channelId | Channel number to which econ val belongs
data | Array of data to be sent
count | Number of items to be sent
Returns
None

Definition at line 438 of file IfxQspi.c.

Referenced by IfxQspi_SpiMaster_write(), and IfxQspi_SpiSlave_write().

◆ IfxQspi_writeTransmitFifo()

IFX_INLINE void IfxQspi_writeTransmitFifo | ( | Ifx_QSPI * | qspi,
 |  | uint32 | data
 | ) |  |

Write Data into DATAENTRY register.

Parameters
qspi | Pointer to QSPI module registers
data | Data to be entered into TxFIFO
Returns
None

Definition at line 1347 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_isrDmaTransmit(), IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeTransmitFifo(), IfxQspi_SpiSlave_write(), and IfxQspi_SpiSlave_writeTransmitFifo().


iLLD_TC38A: Support Functions

Functions
Support Functions
iLLD » QSPI » Standard Driver
Collaboration diagram for Support Functions:

Functions

IFX_INLINE IfxQspi_Mode | IfxQspi_getMode (Ifx_QSPI *qspi)
Gets the current mode of QSPI. More...
IFX_INLINE float | IfxQspi_getModuleFrequency (Ifx_QSPI *qspi)
Specifies function to get module frequency. More...
IFX_INLINE IfxQspi_Phase | IfxQspi_getPhase (Ifx_QSPI *qspi)
Gets actual transmission phase. More...
IFX_INLINE uint8 | IfxQspi_getReceiveFifoLevel (Ifx_QSPI *qspi)
Gets the filling level of RXFIFO. More...
IFX_INLINE float | IfxQspi_getTimeQuantaFrequency (Ifx_QSPI *qspi)
Gets Time Quanta frequency. More...
IFX_INLINE uint8 | IfxQspi_getTransmitFifoLevel (Ifx_QSPI *qspi)
Gets the filling level of TXFIFO. More...
IFX_INLINE boolean | IfxQspi_isModuleEnabled (Ifx_QSPI *qspi)
Specifies the Module enable or disable status. More...
IFX_INLINE void | IfxQspi_setDisableModuleRequest (Ifx_QSPI *qspi)
Sets the disable module request. More...
IFX_INLINE void | IfxQspi_setEnableModuleRequest (Ifx_QSPI *qspi)
Sets the enable module request. More...
IFX_INLINE void | IfxQspi_setSleepMode (Ifx_QSPI *qspi, IfxQspi_SleepMode mode)
Sets the disable module request. More...
IFX_INLINE void | IfxQspi_setTransmitFifoInterrruptThreshold (Ifx_QSPI *qspi, IfxQspi_TxFifoInt txFifoInt)
Set the threshold of TXFIFO for service request generation. More...
IFX_INLINE void | IfxQspi_writeBasicConfiguration (Ifx_QSPI *qspi, uint32 baconVal)
Write configuration into BACON register. More...
IFX_INLINE void | IfxQspi_writeBasicConfigurationBeginStream (Ifx_QSPI *qspi, uint32 baconVal)
Write configuration into BACON register with .LAST flag set to 0. More...
IFX_INLINE void | IfxQspi_writeBasicConfigurationEndStream (Ifx_QSPI *qspi, uint32 baconVal)
Write configuration into BACON register with .LAST flag set to 1. More...
IFX_INLINE void | IfxQspi_writeExtendedConfiguration (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 econVal)
Writes channel timing configuration into ECON register. More...
IFX_INLINE void | IfxQspi_writeMixedDataTransmitFifo (Ifx_QSPI *qspi, uint32 mixEntryVal)
Writes Data and Configuration into MIXEDENTRY register. More...
IFX_EXTERN float | IfxQspi_calcRealBaudrate (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId)
Function to calculate baudrate of specified channel. More...
IFX_EXTERN uint32 | IfxQspi_calculateBasicConfigurationValue (Ifx_QSPI *qspi, const IfxQspi_ChannelId channelId, const SpiIf_ChMode *chMode, const float baudrate)
Function to calculate BACON register values. More...
IFX_EXTERN uint32 | IfxQspi_calculateExtendedConfigurationValue (Ifx_QSPI *qspi, const uint8 cs, const SpiIf_ChConfig *chConfig)
Function to calculate ECON register values. More...
IFX_EXTERN uint32 | IfxQspi_calculatePrescaler (Ifx_QSPI *qspi, float baudrate)
Function to calculate prescaler. More...
IFX_EXTERN uint32 | IfxQspi_calculateTimeQuantumLength (Ifx_QSPI *qspi, float maxBaudrate)
Specifies the function to calculate Time quantum length. More...
IFX_EXTERN Ifx_QSPI * | IfxQspi_getAddress (IfxQspi_Index qspi)
IFX_EXTERN IfxQspi_Index | IfxQspi_getIndex (Ifx_QSPI *qspi)
Specifies the function to get Index. More...
IFX_EXTERN uint32 | IfxQspi_recalcBasicConfiguration (uint32 oldBACON, Ifx_SizeT numOfData, boolean shortData, boolean lastData)
Re-calculated BACON from the oldBACON. More...
IFX_EXTERN void | IfxQspi_setSlaveSelectOutputControl (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, boolean outputEnable, boolean activeLevel)
Configures a Slave Select Output. More...
IFX_EXTERN void | IfxQspi_calculateDelayConstants (const Ifx_QSPI *qspi, const IfxQspi_ChannelId channelId, const SpiIf_ChMode *chMode, IfxQspi_DelayConst *delayConst)
Calculates the Delay constants (pre and delay) from the user specified CS delays. More...

Detailed Description

Function Documentation

◆ IfxQspi_calcRealBaudrate()

IFX_EXTERN float IfxQspi_calcRealBaudrate | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_ChannelId | channelId
 | ) |  |

Function to calculate baudrate of specified channel.

Parameters
qspi | Pointer to QSPI module registers
channelId | QSPI channel number
Returns
Actual baudrate in float

Definition at line 54 of file IfxQspi.c.

Referenced by IfxQspi_SpiMaster_getChannelConfig(), IfxQspi_SpiMaster_initChannel(), and IfxQspi_SpiMaster_setChannelBaudrate().

◆ IfxQspi_calculateBasicConfigurationValue()

IFX_EXTERN uint32 IfxQspi_calculateBasicConfigurationValue | ( | Ifx_QSPI * | qspi,
 |  | const IfxQspi_ChannelId | channelId,
 |  | const SpiIf_ChMode * | chMode,
 |  | const float | baudrate
 | ) |  |

Function to calculate BACON register values.

Parameters
qspi | Pointer to QSPI module registers
channelId | QSPI Channel Number
chMode | Frame configuration
baudrate | The desired baudrate
Returns
Calculated BACON value

Definition at line 67 of file IfxQspi.c.

Referenced by IfxQspi_SpiMaster_initChannel(), IfxQspi_SpiMaster_setChannelBaudrate(), and IfxQspi_SpiSlave_initModule().

◆ IfxQspi_calculateDelayConstants()

IFX_EXTERN void IfxQspi_calculateDelayConstants | ( | const Ifx_QSPI * | qspi,
 |  | const IfxQspi_ChannelId | channelId,
 |  | const SpiIf_ChMode * | chMode,
 |  | IfxQspi_DelayConst * | delayConst
 | ) |  |

Calculates the Delay constants (pre and delay) from the user specified CS delays.

Parameters
qspi | pointer to QSPI SFR
channelId | Channel ID no.
chMode | Pointer to Channel Mode
delayConst | Pointer to the Delay Consant Array
Returns
None

Definition at line 451 of file IfxQspi.c.

Referenced by IfxQspi_calculateBasicConfigurationValue().

◆ IfxQspi_calculateExtendedConfigurationValue()

IFX_EXTERN uint32 IfxQspi_calculateExtendedConfigurationValue | ( | Ifx_QSPI * | qspi,
 |  | const uint8 | cs,
 |  | const SpiIf_ChConfig * | chConfig
 | ) |  |

Function to calculate ECON register values.

Parameters
qspi | Pointer to QSPI module registers
cs | QSPI channel Number : 8->0,9->1,.......
chConfig | SPI Channel Configuration
Returns
Calculated ECON[CS] value

Definition at line 96 of file IfxQspi.c.

Referenced by IfxQspi_SpiMaster_initChannel(), IfxQspi_SpiMaster_setChannelBaudrate(), and IfxQspi_SpiSlave_initModule().

◆ IfxQspi_calculatePrescaler()

IFX_EXTERN uint32 IfxQspi_calculatePrescaler | ( | Ifx_QSPI * | qspi,
 |  | float | baudrate
 | ) |  |

Function to calculate prescaler.

Parameters
qspi | Pointer to QSPI module registers
baudrate | Maximum baudrate in Float
Returns
Prescaler in integer

Definition at line 209 of file IfxQspi.c.

Referenced by IfxQspi_setMoveCounterPrescalerTrailingDelay().

◆ IfxQspi_calculateTimeQuantumLength()

IFX_EXTERN uint32 IfxQspi_calculateTimeQuantumLength | ( | Ifx_QSPI * | qspi,
 |  | float | maxBaudrate
 | ) |  |

Specifies the function to calculate Time quantum length.

Parameters
qspi | Pointer to QSPI module registers
maxBaudrate | Maximum baudrate in Float
Returns
Time quantum length in integer

Definition at line 233 of file IfxQspi.c.

Referenced by IfxQspi_SpiMaster_initModule(), and IfxQspi_SpiSlave_initModule().

◆ IfxQspi_getAddress()

IFX_EXTERN Ifx_QSPI* IfxQspi_getAddress ( IfxQspi_Index qspi )
Parameters
qspi Pointer to QSPI module registers
Returns
QSPI module register address

Definition at line 276 of file IfxQspi.c.

◆ IfxQspi_getIndex()

IFX_EXTERN IfxQspi_Index IfxQspi_getIndex ( Ifx_QSPI * qspi )

Specifies the function to get Index.

Parameters
qspi Pointer to QSPI module registers
Returns
Index in Integer

Definition at line 293 of file IfxQspi.c.

Referenced by IfxQspi_getErrorSrc(), IfxQspi_getReceiveSrc(), and IfxQspi_getTransmitSrc().

◆ IfxQspi_getMode()

IFX_INLINE IfxQspi_Mode IfxQspi_getMode ( Ifx_QSPI * qspi )

Gets the current mode of QSPI.

Parameters
qspi Pointer to QSPI module registers
Returns
The current mode

Definition at line 1041 of file IfxQspi.h.

◆ IfxQspi_getModuleFrequency()

IFX_INLINE float IfxQspi_getModuleFrequency ( Ifx_QSPI * qspi )

Specifies function to get module frequency.

Parameters
qspi Pointer to QSPI module registers
Returns
Module frequency in Float value

Definition at line 1047 of file IfxQspi.h.

Referenced by IfxQspi_calculatePrescaler(), and IfxQspi_getTimeQuantaFrequency().

◆ IfxQspi_getPhase()

IFX_INLINE IfxQspi_Phase IfxQspi_getPhase ( Ifx_QSPI * qspi )

Gets actual transmission phase.

Parameters
qspi Pointer to QSPI module registers
Returns
Actual transmission phase

Definition at line 1055 of file IfxQspi.h.

Referenced by IfxQspi_pause().

◆ IfxQspi_getReceiveFifoLevel()

IFX_INLINE uint8 IfxQspi_getReceiveFifoLevel ( Ifx_QSPI * qspi )

Gets the filling level of RXFIFO.

Parameters
qspi Pointer to QSPI module registers
Returns
RxFIFO level

Definition at line 1061 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_read(), and IfxQspi_SpiSlave_read().

◆ IfxQspi_getTimeQuantaFrequency()

IFX_INLINE float IfxQspi_getTimeQuantaFrequency ( Ifx_QSPI * qspi )

Gets Time Quanta frequency.

Parameters
qspi Pointer to QSPI module registers
Returns
TQ frequency in float

Definition at line 1080 of file IfxQspi.h.

Referenced by IfxQspi_calculateExtendedConfigurationValue().

◆ IfxQspi_getTransmitFifoLevel()

IFX_INLINE uint8 IfxQspi_getTransmitFifoLevel ( Ifx_QSPI * qspi )

Gets the filling level of TXFIFO.

Parameters
qspi Pointer to QSPI module registers
Returns
TxFIFO level

Definition at line 1086 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_write(), and IfxQspi_SpiSlave_write().

◆ IfxQspi_isModuleEnabled()

IFX_INLINE boolean IfxQspi_isModuleEnabled ( Ifx_QSPI * qspi )

Specifies the Module enable or disable status.

Parameters
qspi Pointer to QSPI module registers
Returns
TRUE if module is enabled otherwise FALSE

Definition at line 1162 of file IfxQspi.h.

◆ IfxQspi_recalcBasicConfiguration()

IFX_EXTERN uint32 IfxQspi_recalcBasicConfiguration | ( | uint32 | oldBACON,
 |  | Ifx_SizeT | numOfData,
 |  | boolean | shortData,
 |  | boolean | lastData
 | ) |  |

Re-calculated BACON from the oldBACON.

Parameters
oldBACON | Old BACON value
numOfData | numOfData in LONG or CONTINUOUS mode
shortData | Specifies SHORT mode (TRUE) or other modes (FALSE)
lastData | Specifies last data in LONG or CONTINUOUS
Returns
Re-calculated BACON

Definition at line 349 of file IfxQspi.c.

◆ IfxQspi_setDisableModuleRequest()

IFX_INLINE void IfxQspi_setDisableModuleRequest ( Ifx_QSPI * qspi )

Sets the disable module request.

Parameters
qspi Pointer to QSPI module registers
Returns
None

Definition at line 1223 of file IfxQspi.h.

◆ IfxQspi_setEnableModuleRequest()

IFX_INLINE void IfxQspi_setEnableModuleRequest ( Ifx_QSPI * qspi )

Sets the enable module request.

Parameters
qspi Pointer to QSPI module registers
Returns
None

Definition at line 1229 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_initModule(), and IfxQspi_SpiSlave_initModule().

◆ IfxQspi_setSlaveSelectOutputControl()

IFX_EXTERN void IfxQspi_setSlaveSelectOutputControl | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_ChannelId | channelId,
 |  | boolean | outputEnable,
 |  | boolean | activeLevel
 | ) |  |

Configures a Slave Select Output.

Parameters
qspi | Pointer to QSPI module registers
channelId | Channel number to which econ val belongs
outputEnable | chip select output will be enabled during transaction
activeLevel | TRUE: active-high, FALSE: active-low
Returns
None

Definition at line 383 of file IfxQspi.c.

◆ IfxQspi_setSleepMode()

IFX_INLINE void IfxQspi_setSleepMode | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_SleepMode | mode
 | ) |  |

Sets the disable module request.

Parameters
qspi | Pointer to QSPI module registers
mode | Sleep mode selection
Returns
None

Definition at line 1277 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_initModule(), and IfxQspi_SpiSlave_initModule().

◆ IfxQspi_setTransmitFifoInterrruptThreshold()

IFX_INLINE void IfxQspi_setTransmitFifoInterrruptThreshold | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_TxFifoInt | txFifoInt
 | ) |  |

Set the threshold of TXFIFO for service request generation.

Parameters
qspi | Pointer to QSPI module registers
txFifoInt | TxFifo Interrupt threshold to set
Returns
None

Definition at line 1290 of file IfxQspi.h.

◆ IfxQspi_writeBasicConfiguration()

IFX_INLINE void IfxQspi_writeBasicConfiguration | ( | Ifx_QSPI * | qspi,
 |  | uint32 | baconVal
 | ) |  |

Write configuration into BACON register.

Parameters
qspi | Pointer to QSPI module registers
baconVal | baconVal Value to be entered in BACON register
Returns
None

Definition at line 1308 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_writeBasicConfiguration().

◆ IfxQspi_writeBasicConfigurationBeginStream()

IFX_INLINE void IfxQspi_writeBasicConfigurationBeginStream | ( | Ifx_QSPI * | qspi,
 |  | uint32 | baconVal
 | ) |  |

Write configuration into BACON register with .LAST flag set to 0.

Parameters
qspi | Pointer to QSPI module registers
baconVal | baconVal Value to be entered in BACON register
Returns
None

Definition at line 1314 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_write(), and IfxQspi_SpiSlave_initModule().

◆ IfxQspi_writeBasicConfigurationEndStream()

IFX_INLINE void IfxQspi_writeBasicConfigurationEndStream | ( | Ifx_QSPI * | qspi,
 |  | uint32 | baconVal
 | ) |  |

Write configuration into BACON register with .LAST flag set to 1.

Parameters
qspi | Pointer to QSPI module registers
baconVal | baconVal Value to be entered in BACON register
Returns
None

Definition at line 1324 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_isrDmaTransmit(), and IfxQspi_SpiMaster_write().

◆ IfxQspi_writeExtendedConfiguration()

IFX_INLINE void IfxQspi_writeExtendedConfiguration | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_ChannelId | channelId,
 |  | uint32 | econVal
 | ) |  |

Writes channel timing configuration into ECON register.

Parameters
qspi | Pointer to QSPI module registers
channelId | Channel number to which econ val belongs
econVal | Extended configuration value
Returns
None

Definition at line 1334 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_writeExtendedConfiguration().

◆ IfxQspi_writeMixedDataTransmitFifo()

IFX_INLINE void IfxQspi_writeMixedDataTransmitFifo | ( | Ifx_QSPI * | qspi,
 |  | uint32 | mixEntryVal
 | ) |  |

Writes Data and Configuration into MIXEDENTRY register.

Parameters
qspi | Pointer to QSPI module registers
mixEntryVal | Data and configuration in mixed
Returns
None

Definition at line 1341 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_writeMixedDataConfiguration().


iLLD_TC38A: Interrupt Functions

Functions
Interrupt Functions
iLLD » QSPI » Standard Driver
Collaboration diagram for Interrupt Functions:

Functions

IFX_INLINE volatile Ifx_SRC_SRCR * | IfxQspi_getErrorSrc (Ifx_QSPI *qspi)
Gets the Error request value. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxQspi_getReceiveSrc (Ifx_QSPI *qspi)
Gets the RXFIFO service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxQspi_getTransmitSrc (Ifx_QSPI *qspi)
Gets the TXFIFO service request. More...

Detailed Description

Function Documentation

◆ IfxQspi_getErrorSrc()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxQspi_getErrorSrc ( Ifx_QSPI * qspi )

Gets the Error request value.

Parameters
qspi Pointer to QSPI module registers
Returns
Error request value

Definition at line 1034 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_initModule(), IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), IfxQspi_SpiSlave_initModule(), and IfxQspi_SpiSlave_write().

◆ IfxQspi_getReceiveSrc()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxQspi_getReceiveSrc ( Ifx_QSPI * qspi )

Gets the RXFIFO service request.

Parameters
qspi Pointer to QSPI module registers
Returns
Receive service request value

Definition at line 1067 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_initModule(), IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), IfxQspi_SpiSlave_initModule(), and IfxQspi_SpiSlave_write().

◆ IfxQspi_getTransmitSrc()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxQspi_getTransmitSrc ( Ifx_QSPI * qspi )

Gets the TXFIFO service request.

Parameters
qspi Pointer to QSPI module registers
Returns
Transmission service request value

Definition at line 1092 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_initModule(), IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), IfxQspi_SpiSlave_initModule(), and IfxQspi_SpiSlave_write().


iLLD_TC38A: IO Pin Configuration Functions

Functions
IO Pin Configuration Functions
iLLD » QSPI » Standard Driver
Collaboration diagram for IO Pin Configuration Functions:

Functions

IFX_INLINE void | IfxQspi_initMrstInPin (const IfxQspi_Mrst_In *mrstIn, IfxPort_InputMode mrstInMode)
Initializes a MRST input. More...
IFX_INLINE void | IfxQspi_initMrstOutPin (const IfxQspi_Mrst_Out *mrstOut, IfxPort_OutputMode mrstOutMode, IfxPort_PadDriver padDriver)
Initializes a MRST output. More...
IFX_INLINE void | IfxQspi_initMtsrInPin (const IfxQspi_Mtsr_In *mtsrIn, IfxPort_InputMode mtsrInMode)
Initializes a MTSR input. More...
IFX_INLINE void | IfxQspi_initMtsrOutPin (const IfxQspi_Mtsr_Out *mtsrOut, IfxPort_OutputMode mtsrOutMode, IfxPort_PadDriver padDriver)
Initializes a MTSR output. More...
IFX_INLINE void | IfxQspi_initSclkInPin (const IfxQspi_Sclk_In *sclkIn, IfxPort_InputMode sclkInMode)
Initializes a SCLK input. More...
IFX_INLINE void | IfxQspi_initSclkOutPin (const IfxQspi_Sclk_Out *sclkOut, IfxPort_OutputMode sclkOutMode, IfxPort_PadDriver padDriver)
Initializes a SCLK output. More...
IFX_INLINE void | IfxQspi_initSlsi (const IfxQspi_Slsi_In *slsi, IfxPort_InputMode slsiMode)
Initializes a SLSI input. More...
IFX_INLINE void | IfxQspi_initSlso (const IfxQspi_Slso_Out *slso, IfxPort_OutputMode slsoMode, IfxPort_PadDriver padDriver, IfxPort_OutputIdx outIndex)
Initializes a SLSO output. More...

Detailed Description

Function Documentation

◆ IfxQspi_initMrstInPin()

IFX_INLINE void IfxQspi_initMrstInPin | ( | const IfxQspi_Mrst_In * | mrstIn,
 |  | IfxPort_InputMode | mrstInMode
 | ) |  |

Initializes a MRST input.

Parameters
mrstIn | the MRST Pin which should be configured
mrstInMode | the pin input mode which should be configured
Returns
None

Definition at line 1105 of file IfxQspi.h.

◆ IfxQspi_initMrstOutPin()

IFX_INLINE void IfxQspi_initMrstOutPin | ( | const IfxQspi_Mrst_Out * | mrstOut,
 |  | IfxPort_OutputMode | mrstOutMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a MRST output.

Parameters
mrstOut | the MRST Pin which should be configured
mrstOutMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 1112 of file IfxQspi.h.

Referenced by IfxQspi_SpiSlave_initModule().

◆ IfxQspi_initMtsrInPin()

IFX_INLINE void IfxQspi_initMtsrInPin | ( | const IfxQspi_Mtsr_In * | mtsrIn,
 |  | IfxPort_InputMode | mtsrInMode
 | ) |  |

Initializes a MTSR input.

Parameters
mtsrIn | the MTSR Pin which should be configured
mtsrInMode | the pin input mode which should be configured
Returns
None

Definition at line 1119 of file IfxQspi.h.

◆ IfxQspi_initMtsrOutPin()

IFX_INLINE void IfxQspi_initMtsrOutPin | ( | const IfxQspi_Mtsr_Out * | mtsrOut,
 |  | IfxPort_OutputMode | mtsrOutMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a MTSR output.

Parameters
mtsrOut | the MTSR Pin which should be configured
mtsrOutMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 1126 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_initModule().

◆ IfxQspi_initSclkInPin()

IFX_INLINE void IfxQspi_initSclkInPin | ( | const IfxQspi_Sclk_In * | sclkIn,
 |  | IfxPort_InputMode | sclkInMode
 | ) |  |

Initializes a SCLK input.

Parameters
sclkIn | the SCLK Pin which should be configured
sclkInMode | the pin input mode which should be configured
Returns
None

Definition at line 1133 of file IfxQspi.h.

◆ IfxQspi_initSclkOutPin()

IFX_INLINE void IfxQspi_initSclkOutPin | ( | const IfxQspi_Sclk_Out * | sclkOut,
 |  | IfxPort_OutputMode | sclkOutMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a SCLK output.

Parameters
sclkOut | the SCLK Pin which should be configured
sclkOutMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 1140 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_initModule().

◆ IfxQspi_initSlsi()

IFX_INLINE void IfxQspi_initSlsi | ( | const IfxQspi_Slsi_In * | slsi,
 |  | IfxPort_InputMode | slsiMode
 | ) |  |

Initializes a SLSI input.

Parameters
slsi | the SLSI Pin which should be configured
slsiMode | the pin input mode which should be configured
Returns
None

Definition at line 1147 of file IfxQspi.h.

◆ IfxQspi_initSlso()

IFX_INLINE void IfxQspi_initSlso | ( | const IfxQspi_Slso_Out * | slso,
 |  | IfxPort_OutputMode | slsoMode,
 |  | IfxPort_PadDriver | padDriver,
 |  | IfxPort_OutputIdx | outIndex
 | ) |  |

Initializes a SLSO output.

Parameters
slso | the SLSO Pin which should be configured
slsoMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
outIndex | Pin Pad driver index
Returns
None

Definition at line 1155 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_initChannel().


iLLD_TC38A: QSPI Pin Mapping

Data Structures | Macros | Variables
QSPI Pin Mapping
iLLD » QSPI
Collaboration diagram for QSPI Pin Mapping:

Data Structures

struct | IfxQspi_Mrst_In
MRST pin mapping structure. More...
struct | IfxQspi_Mtsr_In
MTSR pin mapping structure. More...
struct | IfxQspi_Sclk_In
SCLK pin mapping structure. More...
struct | IfxQspi_Slsi_In
SLSI pin mapping structure. More...
struct | IfxQspi_Hsicin_In
HSICIN pin mapping structure. More...
struct | IfxQspi_Mrst_Out
MRST pin mapping structure. More...
struct | IfxQspi_Mtsr_Out
MTSR pin mapping structure. More...
struct | IfxQspi_Sclk_Out
SCLK pin mapping structure. More...
struct | IfxQspi_Slso_Out
SLSO pin mapping structure. More...

Macros

#define | IFXQSPI_PINMAP_NUM_MODULES 5
Table dimensions. More...
#define | IFXQSPI_PINMAP_NUM_SLAVESELECTS 14
#define | IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS 6
#define | IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS 3
#define | IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS 4
#define | IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS 5
#define | IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS 4
#define | IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS 7
#define | IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS 2
#define | IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS 2

Variables

IFX_EXTERN IfxQspi_Mrst_In IfxQspi0_MRSTA_P20_12_IN
Master SPI data input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi0_MRSTB_P22_9_IN
Master SPI data input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi0_MRSTC_P22_6_IN
Master SPI data input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi1_MRSTA_P10_1_IN
Master SPI data input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi1_MRSTB_P11_3_IN
Master SPI data input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTA_P15_4_IN
Master SPI data input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTB_P15_7_IN
Master SPI data input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTCN_P21_2_IN
Master SPI data input (LVDS N line) More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTCP_P21_3_IN
Master SPI data input (LVDS P line) More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTD_P34_4_IN
Master SPI data input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTE_P15_2_IN
Master SPI data input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTFN_P14_9_IN
Master SPI data input (LVDS N line) More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTFP_P14_10_IN
Master SPI data input (LVDS P line) More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTA_P02_5_IN
Master SPI data input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTB_P10_7_IN
Master SPI data input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTC_P01_5_IN
Master SPI data input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi4_MRSTA_P33_13_IN
Master SPI data input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi4_MRSTB_P22_1_IN
Master SPI data input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi4_MRSTCN_P21_2_IN
Master SPI data input (LVDS N line) More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi4_MRSTCP_P21_3_IN
Master SPI data input (LVDS P line) More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi4_MRSTDN_P21_0_IN
Master SPI data input (LVDS N line) More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi4_MRSTDP_P21_1_IN
Master SPI data input (LVDS P line) More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi0_MRST_P20_12_OUT
Slave SPI data output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi0_MRST_P22_6_OUT
Slave SPI data output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi0_MRST_P22_9_OUT
Slave SPI data output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi1_MRST_P10_1_OUT
Slave SPI data output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi1_MRST_P10_6_OUT
Slave SPI data output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi1_MRST_P11_3_OUT
Slave SPI data output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi2_MRST_P15_4_OUT
Slave SPI data output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi2_MRST_P15_7_OUT
Slave SPI data output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi2_MRST_P34_4_OUT
Slave SPI data output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P01_5_OUT
Slave SPI data output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P02_5_OUT
Slave SPI data output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P10_7_OUT
Slave SPI data output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi4_MRST_P22_1_OUT
Slave SPI data output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi4_MRST_P33_13_OUT
Slave SPI data output. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi0_MTSRA_P20_14_IN
Slave SPI data input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi0_MTSRB_P22_10_IN
Slave SPI data input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi0_MTSRC_P22_5_IN
Slave SPI data input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi1_MTSRA_P10_3_IN
Slave SPI data input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi1_MTSRB_P11_9_IN
Slave SPI data input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi1_MTSRC_P10_4_IN
Slave SPI data input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi2_MTSRA_P15_5_IN
Slave SPI data input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi2_MTSRB_P15_6_IN
Slave SPI data input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi2_MTSRD_P34_5_IN
Slave SPI data input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRA_P02_6_IN
Slave SPI data input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRB_P10_6_IN
Slave SPI data input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRC_P01_6_IN
Slave SPI data input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi4_MTSRA_P33_12_IN
Slave SPI data input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi4_MTSRB_P22_0_IN
Slave SPI data input. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi0_MTSR_P20_12_OUT
Master SPI data output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi0_MTSR_P20_14_OUT
Master SPI data output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi0_MTSR_P22_10_OUT
Master SPI data output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi0_MTSR_P22_5_OUT
Master SPI data output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_1_OUT
Master SPI data output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_3_OUT
Master SPI data output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_4_OUT
Master SPI data output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P11_9_OUT
Master SPI data output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSRN_P13_2_OUT
Master SPI data output (LVDS N line) More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSRP_P13_3_OUT
Master SPI data output (LVDS P line) More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSR_P15_5_OUT
Master SPI data output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSR_P15_6_OUT
Master SPI data output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSR_P34_5_OUT
Master SPI data output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P01_6_OUT
Master SPI data output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P02_6_OUT
Master SPI data output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P10_6_OUT
Master SPI data output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi4_MTSRN_P22_2_OUT
Master SPI data output (LVDS N line) More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi4_MTSRP_P22_3_OUT
Master SPI data output (LVDS P line) More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi4_MTSR_P22_0_OUT
Master SPI data output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi4_MTSR_P33_12_OUT
Master SPI data output. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi0_SCLKA_P20_11_IN
Slave SPI clock inputs. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi0_SCLKB_P22_8_IN
Slave SPI clock inputs. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi0_SCLKC_P22_7_IN
Slave SPI clock inputs. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi1_SCLKA_P10_2_IN
Slave SPI clock inputs. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi1_SCLKB_P11_6_IN
Slave SPI clock inputs. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi2_SCLKA_P15_3_IN
Slave SPI clock inputs. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi2_SCLKB_P15_8_IN
Slave SPI clock inputs. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi2_SCLKD_P33_14_IN
Slave SPI clock inputs. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKA_P02_7_IN
Slave SPI clock inputs. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKB_P10_8_IN
Slave SPI clock inputs. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKC_P01_7_IN
Slave SPI clock inputs. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi4_SCLKA_P33_11_IN
Slave SPI clock inputs. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi4_SCLKB_P22_3_IN
Slave SPI clock inputs. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi0_SCLK_P20_11_OUT
Master SPI clock output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi0_SCLK_P20_13_OUT
Master SPI clock output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi0_SCLK_P22_7_OUT
Master SPI clock output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi0_SCLK_P22_8_OUT
Master SPI clock output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi1_SCLK_P10_2_OUT
Master SPI clock output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi1_SCLK_P11_6_OUT
Master SPI clock output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLKN_P13_0_OUT
Master SPI clock output (LVDS N line) More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLKP_P13_1_OUT
Master SPI clock output (LVDS P line) More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_3_OUT
Master SPI clock output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_6_OUT
Master SPI clock output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_8_OUT
Master SPI clock output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P33_14_OUT
Master SPI clock output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P33_1_OUT
Master SPI clock output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P01_7_OUT
Master SPI clock output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P02_7_OUT
Master SPI clock output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P10_8_OUT
Master SPI clock output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi4_SCLKN_P22_0_OUT
Master SPI clock output (LVDS N line) More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi4_SCLKP_P22_1_OUT
Master SPI clock output (LVDS P line) More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi4_SCLK_P22_3_OUT
Master SPI clock output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi4_SCLK_P33_11_OUT
Master SPI clock output. More...
IFX_EXTERN IfxQspi_Slsi_In IfxQspi0_SLSIA_P20_13_IN
Slave select input. More...
IFX_EXTERN IfxQspi_Slsi_In IfxQspi0_SLSIB_P20_9_IN
Slave select input. More...
IFX_EXTERN IfxQspi_Slsi_In IfxQspi1_SLSIA_P11_10_IN
Slave select input. More...
IFX_EXTERN IfxQspi_Slsi_In IfxQspi2_SLSIA_P15_2_IN
Slave select input. More...
IFX_EXTERN IfxQspi_Slsi_In IfxQspi2_SLSIB_P15_1_IN
Slave select input. More...
IFX_EXTERN IfxQspi_Slsi_In IfxQspi3_SLSIA_P02_4_IN
Slave select input. More...
IFX_EXTERN IfxQspi_Slsi_In IfxQspi3_SLSIB_P01_3_IN
Slave select input. More...
IFX_EXTERN IfxQspi_Slsi_In IfxQspi4_SLSIA_P33_10_IN
Slave select input. More...
IFX_EXTERN IfxQspi_Slsi_In IfxQspi4_SLSIB_P22_2_IN
Slave select input. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO0_P20_8_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO10_P22_11_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO11_P23_6_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO12_P22_4_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO13_P15_0_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO1_P20_9_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO2_P20_13_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO3_P11_10_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO4_P11_11_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO5_P11_2_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO6_P20_10_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO7_P33_5_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO8_P20_6_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO9_P20_3_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO0_P20_8_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO10_P10_0_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO1_P20_9_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO2_P20_13_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO3_P11_10_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO4_P11_11_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO5_P11_2_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO6_P33_10_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO7_P33_5_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO8_P10_4_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO9_P10_5_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO0_P15_2_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO10_P33_2_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO10_P34_3_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO11_P33_15_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO11_P33_6_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO12_P32_6_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO12_P33_4_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO1_P14_2_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO2_P14_6_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO3_P14_3_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO4_P14_7_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO5_P15_1_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO6_P33_13_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO7_P20_10_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO8_P20_6_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO9_P20_3_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO0_P02_4_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO10_P01_4_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO1_P02_0_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO2_P02_1_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO3_P00_5_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO3_P02_2_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO4_P00_2_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO4_P02_3_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO5_P02_12_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO5_P02_8_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO6_P00_8_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO6_P02_15_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO7_P00_9_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO7_P02_13_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO8_P10_5_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO9_P01_3_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO0_P33_10_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO1_P33_9_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO2_P33_3_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO2_P33_8_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO3_P22_2_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO4_P02_12_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO4_P23_5_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO5_P02_15_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO5_P23_4_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO6_P02_13_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO6_P23_1_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO7_P02_1_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO7_P33_7_OUT
Master slave select output. More...
IFX_EXTERN const IfxQspi_Mrst_In * | IfxQspi_Mrst_In_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS]
IfxQspi_Mrst_In table. More...
IFX_EXTERN const IfxQspi_Mrst_Out * | IfxQspi_Mrst_Out_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS]
IfxQspi_Mrst_Out table. More...
IFX_EXTERN const IfxQspi_Mtsr_In * | IfxQspi_Mtsr_In_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS]
IfxQspi_Mtsr_In table. More...
IFX_EXTERN const IfxQspi_Mtsr_Out * | IfxQspi_Mtsr_Out_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS]
IfxQspi_Mtsr_Out table. More...
IFX_EXTERN const IfxQspi_Sclk_In * | IfxQspi_Sclk_In_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS]
IfxQspi_Sclk_In table. More...
IFX_EXTERN const IfxQspi_Sclk_Out * | IfxQspi_Sclk_Out_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS]
IfxQspi_Sclk_Out table. More...
IFX_EXTERN const IfxQspi_Slsi_In * | IfxQspi_Slsi_In_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS]
IfxQspi_Slsi_In table. More...
IFX_EXTERN const IfxQspi_Slso_Out * | IfxQspi_Slso_Out_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_NUM_SLAVESELECTS][IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS]
IfxQspi_Slso_Out table. More...

Detailed Description

Data Structure Documentation

◆ IfxQspi_Mrst_In

struct IfxQspi_Mrst_In

MRST pin mapping structure.

Definition at line 56 of file IfxQspi_PinMap.h.

Collaboration diagram for IfxQspi_Mrst_In:
[legend]
Data Fields
Ifx_QSPI * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxQspi_Mtsr_In

struct IfxQspi_Mtsr_In

MTSR pin mapping structure.

Definition at line 64 of file IfxQspi_PinMap.h.

Collaboration diagram for IfxQspi_Mtsr_In:
[legend]
Data Fields
Ifx_QSPI * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxQspi_Sclk_In

struct IfxQspi_Sclk_In

SCLK pin mapping structure.

Definition at line 72 of file IfxQspi_PinMap.h.

Collaboration diagram for IfxQspi_Sclk_In:
[legend]
Data Fields
Ifx_QSPI * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxQspi_Slsi_In

struct IfxQspi_Slsi_In

SLSI pin mapping structure.

Definition at line 80 of file IfxQspi_PinMap.h.

Collaboration diagram for IfxQspi_Slsi_In:
[legend]
Data Fields
Ifx_QSPI * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxQspi_Hsicin_In

struct IfxQspi_Hsicin_In

HSICIN pin mapping structure.

Definition at line 88 of file IfxQspi_PinMap.h.

Collaboration diagram for IfxQspi_Hsicin_In:
[legend]
Data Fields
Ifx_QSPI * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxQspi_Mrst_Out

struct IfxQspi_Mrst_Out

MRST pin mapping structure.

Definition at line 96 of file IfxQspi_PinMap.h.

Collaboration diagram for IfxQspi_Mrst_Out:
[legend]
Data Fields
Ifx_QSPI * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxQspi_Mtsr_Out

struct IfxQspi_Mtsr_Out

MTSR pin mapping structure.

Definition at line 104 of file IfxQspi_PinMap.h.

Collaboration diagram for IfxQspi_Mtsr_Out:
[legend]
Data Fields
Ifx_QSPI * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxQspi_Sclk_Out

struct IfxQspi_Sclk_Out

SCLK pin mapping structure.

Definition at line 112 of file IfxQspi_PinMap.h.

Collaboration diagram for IfxQspi_Sclk_Out:
[legend]
Data Fields
Ifx_QSPI * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxQspi_Slso_Out

struct IfxQspi_Slso_Out

SLSO pin mapping structure.

Definition at line 120 of file IfxQspi_PinMap.h.

Collaboration diagram for IfxQspi_Slso_Out:
[legend]
Data Fields
Ifx_QSPI * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.
sint32 | slsoNr | Slave Select.

Macro Definition Documentation

◆ IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS

#define IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS 6

Definition at line 314 of file IfxQspi_PinMap.h.

◆ IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS

#define IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS 3

Definition at line 315 of file IfxQspi_PinMap.h.

◆ IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS

#define IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS 4

Definition at line 316 of file IfxQspi_PinMap.h.

◆ IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS

#define IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS 5

Definition at line 317 of file IfxQspi_PinMap.h.

◆ IFXQSPI_PINMAP_NUM_MODULES

#define IFXQSPI_PINMAP_NUM_MODULES 5

Table dimensions.

Definition at line 312 of file IfxQspi_PinMap.h.

◆ IFXQSPI_PINMAP_NUM_SLAVESELECTS

#define IFXQSPI_PINMAP_NUM_SLAVESELECTS 14

Definition at line 313 of file IfxQspi_PinMap.h.

◆ IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS

#define IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS 4

Definition at line 318 of file IfxQspi_PinMap.h.

◆ IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS

#define IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS 7

Definition at line 319 of file IfxQspi_PinMap.h.

◆ IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS

#define IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS 2

Definition at line 320 of file IfxQspi_PinMap.h.

◆ IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS

#define IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS 2

Definition at line 321 of file IfxQspi_PinMap.h.

Variable Documentation

◆ IfxQspi0_MRST_P20_12_OUT

IFX_EXTERN IfxQspi_Mrst_Out IfxQspi0_MRST_P20_12_OUT

Slave SPI data output.

Definition at line 150 of file IfxQspi_PinMap.h.

◆ IfxQspi0_MRST_P22_6_OUT

IFX_EXTERN IfxQspi_Mrst_Out IfxQspi0_MRST_P22_6_OUT

Slave SPI data output.

Definition at line 151 of file IfxQspi_PinMap.h.

◆ IfxQspi0_MRST_P22_9_OUT

IFX_EXTERN IfxQspi_Mrst_Out IfxQspi0_MRST_P22_9_OUT

Slave SPI data output.

Definition at line 152 of file IfxQspi_PinMap.h.

◆ IfxQspi0_MRSTA_P20_12_IN

IFX_EXTERN IfxQspi_Mrst_In IfxQspi0_MRSTA_P20_12_IN

Master SPI data input.

Definition at line 128 of file IfxQspi_PinMap.h.

◆ IfxQspi0_MRSTB_P22_9_IN

IFX_EXTERN IfxQspi_Mrst_In IfxQspi0_MRSTB_P22_9_IN

Master SPI data input.

Definition at line 129 of file IfxQspi_PinMap.h.

◆ IfxQspi0_MRSTC_P22_6_IN

IFX_EXTERN IfxQspi_Mrst_In IfxQspi0_MRSTC_P22_6_IN

Master SPI data input.

Definition at line 130 of file IfxQspi_PinMap.h.

◆ IfxQspi0_MTSR_P20_12_OUT

IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi0_MTSR_P20_12_OUT

Master SPI data output.

Definition at line 178 of file IfxQspi_PinMap.h.

◆ IfxQspi0_MTSR_P20_14_OUT

IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi0_MTSR_P20_14_OUT

Master SPI data output.

Definition at line 179 of file IfxQspi_PinMap.h.

◆ IfxQspi0_MTSR_P22_10_OUT

IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi0_MTSR_P22_10_OUT

Master SPI data output.

Definition at line 180 of file IfxQspi_PinMap.h.

◆ IfxQspi0_MTSR_P22_5_OUT

IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi0_MTSR_P22_5_OUT

Master SPI data output.

Definition at line 181 of file IfxQspi_PinMap.h.

◆ IfxQspi0_MTSRA_P20_14_IN

IFX_EXTERN IfxQspi_Mtsr_In IfxQspi0_MTSRA_P20_14_IN

Slave SPI data input.

Definition at line 164 of file IfxQspi_PinMap.h.

◆ IfxQspi0_MTSRB_P22_10_IN

IFX_EXTERN IfxQspi_Mtsr_In IfxQspi0_MTSRB_P22_10_IN

Slave SPI data input.

Definition at line 165 of file IfxQspi_PinMap.h.

◆ IfxQspi0_MTSRC_P22_5_IN

IFX_EXTERN IfxQspi_Mtsr_In IfxQspi0_MTSRC_P22_5_IN

Slave SPI data input.

Definition at line 166 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SCLK_P20_11_OUT

IFX_EXTERN IfxQspi_Sclk_Out IfxQspi0_SCLK_P20_11_OUT

Master SPI clock output.

Definition at line 211 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SCLK_P20_13_OUT

IFX_EXTERN IfxQspi_Sclk_Out IfxQspi0_SCLK_P20_13_OUT

Master SPI clock output.

Definition at line 212 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SCLK_P22_7_OUT

IFX_EXTERN IfxQspi_Sclk_Out IfxQspi0_SCLK_P22_7_OUT

Master SPI clock output.

Definition at line 213 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SCLK_P22_8_OUT

IFX_EXTERN IfxQspi_Sclk_Out IfxQspi0_SCLK_P22_8_OUT

Master SPI clock output.

Definition at line 214 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SCLKA_P20_11_IN

IFX_EXTERN IfxQspi_Sclk_In IfxQspi0_SCLKA_P20_11_IN

Slave SPI clock inputs.

Definition at line 198 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SCLKB_P22_8_IN

IFX_EXTERN IfxQspi_Sclk_In IfxQspi0_SCLKB_P22_8_IN

Slave SPI clock inputs.

Definition at line 199 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SCLKC_P22_7_IN

IFX_EXTERN IfxQspi_Sclk_In IfxQspi0_SCLKC_P22_7_IN

Slave SPI clock inputs.

Definition at line 200 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SLSIA_P20_13_IN

IFX_EXTERN IfxQspi_Slsi_In IfxQspi0_SLSIA_P20_13_IN

Slave select input.

Definition at line 231 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SLSIB_P20_9_IN

IFX_EXTERN IfxQspi_Slsi_In IfxQspi0_SLSIB_P20_9_IN

Slave select input.

Definition at line 232 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SLSO0_P20_8_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO0_P20_8_OUT

Master slave select output.

Definition at line 240 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SLSO10_P22_11_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO10_P22_11_OUT

Master slave select output.

Definition at line 241 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SLSO11_P23_6_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO11_P23_6_OUT

Master slave select output.

Definition at line 242 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SLSO12_P22_4_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO12_P22_4_OUT

Master slave select output.

Definition at line 243 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SLSO13_P15_0_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO13_P15_0_OUT

Master slave select output.

Definition at line 244 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SLSO1_P20_9_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO1_P20_9_OUT

Master slave select output.

Definition at line 245 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SLSO2_P20_13_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO2_P20_13_OUT

Master slave select output.

Definition at line 246 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SLSO3_P11_10_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO3_P11_10_OUT

Master slave select output.

Definition at line 247 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SLSO4_P11_11_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO4_P11_11_OUT

Master slave select output.

Definition at line 248 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SLSO5_P11_2_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO5_P11_2_OUT

Master slave select output.

Definition at line 249 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SLSO6_P20_10_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO6_P20_10_OUT

Master slave select output.

Definition at line 250 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SLSO7_P33_5_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO7_P33_5_OUT

Master slave select output.

Definition at line 251 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SLSO8_P20_6_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO8_P20_6_OUT

Master slave select output.

Definition at line 252 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SLSO9_P20_3_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO9_P20_3_OUT

Master slave select output.

Definition at line 253 of file IfxQspi_PinMap.h.

◆ IfxQspi1_MRST_P10_1_OUT

IFX_EXTERN IfxQspi_Mrst_Out IfxQspi1_MRST_P10_1_OUT

Slave SPI data output.

Definition at line 153 of file IfxQspi_PinMap.h.

◆ IfxQspi1_MRST_P10_6_OUT

IFX_EXTERN IfxQspi_Mrst_Out IfxQspi1_MRST_P10_6_OUT

Slave SPI data output.

Definition at line 154 of file IfxQspi_PinMap.h.

◆ IfxQspi1_MRST_P11_3_OUT

IFX_EXTERN IfxQspi_Mrst_Out IfxQspi1_MRST_P11_3_OUT

Slave SPI data output.

Definition at line 155 of file IfxQspi_PinMap.h.

◆ IfxQspi1_MRSTA_P10_1_IN

IFX_EXTERN IfxQspi_Mrst_In IfxQspi1_MRSTA_P10_1_IN

Master SPI data input.

Definition at line 131 of file IfxQspi_PinMap.h.

◆ IfxQspi1_MRSTB_P11_3_IN

IFX_EXTERN IfxQspi_Mrst_In IfxQspi1_MRSTB_P11_3_IN

Master SPI data input.

Definition at line 132 of file IfxQspi_PinMap.h.

◆ IfxQspi1_MTSR_P10_1_OUT

IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_1_OUT

Master SPI data output.

Definition at line 182 of file IfxQspi_PinMap.h.

◆ IfxQspi1_MTSR_P10_3_OUT

IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_3_OUT

Master SPI data output.

Definition at line 183 of file IfxQspi_PinMap.h.

◆ IfxQspi1_MTSR_P10_4_OUT

IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_4_OUT

Master SPI data output.

Definition at line 184 of file IfxQspi_PinMap.h.

◆ IfxQspi1_MTSR_P11_9_OUT

IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P11_9_OUT

Master SPI data output.

Definition at line 185 of file IfxQspi_PinMap.h.

◆ IfxQspi1_MTSRA_P10_3_IN

IFX_EXTERN IfxQspi_Mtsr_In IfxQspi1_MTSRA_P10_3_IN

Slave SPI data input.

Definition at line 167 of file IfxQspi_PinMap.h.

◆ IfxQspi1_MTSRB_P11_9_IN

IFX_EXTERN IfxQspi_Mtsr_In IfxQspi1_MTSRB_P11_9_IN

Slave SPI data input.

Definition at line 168 of file IfxQspi_PinMap.h.

◆ IfxQspi1_MTSRC_P10_4_IN

IFX_EXTERN IfxQspi_Mtsr_In IfxQspi1_MTSRC_P10_4_IN

Slave SPI data input.

Definition at line 169 of file IfxQspi_PinMap.h.

◆ IfxQspi1_SCLK_P10_2_OUT

IFX_EXTERN IfxQspi_Sclk_Out IfxQspi1_SCLK_P10_2_OUT

Master SPI clock output.

Definition at line 215 of file IfxQspi_PinMap.h.

◆ IfxQspi1_SCLK_P11_6_OUT

IFX_EXTERN IfxQspi_Sclk_Out IfxQspi1_SCLK_P11_6_OUT

Master SPI clock output.

Definition at line 216 of file IfxQspi_PinMap.h.

◆ IfxQspi1_SCLKA_P10_2_IN

IFX_EXTERN IfxQspi_Sclk_In IfxQspi1_SCLKA_P10_2_IN

Slave SPI clock inputs.

Definition at line 201 of file IfxQspi_PinMap.h.

◆ IfxQspi1_SCLKB_P11_6_IN

IFX_EXTERN IfxQspi_Sclk_In IfxQspi1_SCLKB_P11_6_IN

Slave SPI clock inputs.

Definition at line 202 of file IfxQspi_PinMap.h.

◆ IfxQspi1_SLSIA_P11_10_IN

IFX_EXTERN IfxQspi_Slsi_In IfxQspi1_SLSIA_P11_10_IN

Slave select input.

Definition at line 233 of file IfxQspi_PinMap.h.

◆ IfxQspi1_SLSO0_P20_8_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO0_P20_8_OUT

Master slave select output.

Definition at line 254 of file IfxQspi_PinMap.h.

◆ IfxQspi1_SLSO10_P10_0_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO10_P10_0_OUT

Master slave select output.

Definition at line 255 of file IfxQspi_PinMap.h.

◆ IfxQspi1_SLSO1_P20_9_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO1_P20_9_OUT

Master slave select output.

Definition at line 256 of file IfxQspi_PinMap.h.

◆ IfxQspi1_SLSO2_P20_13_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO2_P20_13_OUT

Master slave select output.

Definition at line 257 of file IfxQspi_PinMap.h.

◆ IfxQspi1_SLSO3_P11_10_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO3_P11_10_OUT

Master slave select output.

Definition at line 258 of file IfxQspi_PinMap.h.

◆ IfxQspi1_SLSO4_P11_11_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO4_P11_11_OUT

Master slave select output.

Definition at line 259 of file IfxQspi_PinMap.h.

◆ IfxQspi1_SLSO5_P11_2_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO5_P11_2_OUT

Master slave select output.

Definition at line 260 of file IfxQspi_PinMap.h.

◆ IfxQspi1_SLSO6_P33_10_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO6_P33_10_OUT

Master slave select output.

Definition at line 261 of file IfxQspi_PinMap.h.

◆ IfxQspi1_SLSO7_P33_5_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO7_P33_5_OUT

Master slave select output.

Definition at line 262 of file IfxQspi_PinMap.h.

◆ IfxQspi1_SLSO8_P10_4_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO8_P10_4_OUT

Master slave select output.

Definition at line 263 of file IfxQspi_PinMap.h.

◆ IfxQspi1_SLSO9_P10_5_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO9_P10_5_OUT

Master slave select output.

Definition at line 264 of file IfxQspi_PinMap.h.

◆ IfxQspi2_MRST_P15_4_OUT

IFX_EXTERN IfxQspi_Mrst_Out IfxQspi2_MRST_P15_4_OUT

Slave SPI data output.

Definition at line 156 of file IfxQspi_PinMap.h.

◆ IfxQspi2_MRST_P15_7_OUT

IFX_EXTERN IfxQspi_Mrst_Out IfxQspi2_MRST_P15_7_OUT

Slave SPI data output.

Definition at line 157 of file IfxQspi_PinMap.h.

◆ IfxQspi2_MRST_P34_4_OUT

IFX_EXTERN IfxQspi_Mrst_Out IfxQspi2_MRST_P34_4_OUT

Slave SPI data output.

Definition at line 158 of file IfxQspi_PinMap.h.

◆ IfxQspi2_MRSTA_P15_4_IN

IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTA_P15_4_IN

Master SPI data input.

Definition at line 133 of file IfxQspi_PinMap.h.

◆ IfxQspi2_MRSTB_P15_7_IN

IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTB_P15_7_IN

Master SPI data input.

Definition at line 134 of file IfxQspi_PinMap.h.

◆ IfxQspi2_MRSTCN_P21_2_IN

IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTCN_P21_2_IN

Master SPI data input (LVDS N line)

Definition at line 135 of file IfxQspi_PinMap.h.

◆ IfxQspi2_MRSTCP_P21_3_IN

IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTCP_P21_3_IN

Master SPI data input (LVDS P line)

Definition at line 136 of file IfxQspi_PinMap.h.

◆ IfxQspi2_MRSTD_P34_4_IN

IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTD_P34_4_IN

Master SPI data input.

Definition at line 137 of file IfxQspi_PinMap.h.

◆ IfxQspi2_MRSTE_P15_2_IN

IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTE_P15_2_IN

Master SPI data input.

Definition at line 138 of file IfxQspi_PinMap.h.

◆ IfxQspi2_MRSTFN_P14_9_IN

IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTFN_P14_9_IN

Master SPI data input (LVDS N line)

Definition at line 139 of file IfxQspi_PinMap.h.

◆ IfxQspi2_MRSTFP_P14_10_IN

IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTFP_P14_10_IN

Master SPI data input (LVDS P line)

Definition at line 140 of file IfxQspi_PinMap.h.

◆ IfxQspi2_MTSR_P15_5_OUT

IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSR_P15_5_OUT

Master SPI data output.

Definition at line 188 of file IfxQspi_PinMap.h.

◆ IfxQspi2_MTSR_P15_6_OUT

IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSR_P15_6_OUT

Master SPI data output.

Definition at line 189 of file IfxQspi_PinMap.h.

◆ IfxQspi2_MTSR_P34_5_OUT

IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSR_P34_5_OUT

Master SPI data output.

Definition at line 190 of file IfxQspi_PinMap.h.

◆ IfxQspi2_MTSRA_P15_5_IN

IFX_EXTERN IfxQspi_Mtsr_In IfxQspi2_MTSRA_P15_5_IN

Slave SPI data input.

Definition at line 170 of file IfxQspi_PinMap.h.

◆ IfxQspi2_MTSRB_P15_6_IN

IFX_EXTERN IfxQspi_Mtsr_In IfxQspi2_MTSRB_P15_6_IN

Slave SPI data input.

Definition at line 171 of file IfxQspi_PinMap.h.

◆ IfxQspi2_MTSRD_P34_5_IN

IFX_EXTERN IfxQspi_Mtsr_In IfxQspi2_MTSRD_P34_5_IN

Slave SPI data input.

Definition at line 172 of file IfxQspi_PinMap.h.

◆ IfxQspi2_MTSRN_P13_2_OUT

IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSRN_P13_2_OUT

Master SPI data output (LVDS N line)

Definition at line 186 of file IfxQspi_PinMap.h.

◆ IfxQspi2_MTSRP_P13_3_OUT

IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSRP_P13_3_OUT

Master SPI data output (LVDS P line)

Definition at line 187 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SCLK_P15_3_OUT

IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_3_OUT

Master SPI clock output.

Definition at line 219 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SCLK_P15_6_OUT

IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_6_OUT

Master SPI clock output.

Definition at line 220 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SCLK_P15_8_OUT

IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_8_OUT

Master SPI clock output.

Definition at line 221 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SCLK_P33_14_OUT

IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P33_14_OUT

Master SPI clock output.

Definition at line 222 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SCLK_P33_1_OUT

IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P33_1_OUT

Master SPI clock output.

Definition at line 223 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SCLKA_P15_3_IN

IFX_EXTERN IfxQspi_Sclk_In IfxQspi2_SCLKA_P15_3_IN

Slave SPI clock inputs.

Definition at line 203 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SCLKB_P15_8_IN

IFX_EXTERN IfxQspi_Sclk_In IfxQspi2_SCLKB_P15_8_IN

Slave SPI clock inputs.

Definition at line 204 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SCLKD_P33_14_IN

IFX_EXTERN IfxQspi_Sclk_In IfxQspi2_SCLKD_P33_14_IN

Slave SPI clock inputs.

Definition at line 205 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SCLKN_P13_0_OUT

IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLKN_P13_0_OUT

Master SPI clock output (LVDS N line)

Definition at line 217 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SCLKP_P13_1_OUT

IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLKP_P13_1_OUT

Master SPI clock output (LVDS P line)

Definition at line 218 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SLSIA_P15_2_IN

IFX_EXTERN IfxQspi_Slsi_In IfxQspi2_SLSIA_P15_2_IN

Slave select input.

Definition at line 234 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SLSIB_P15_1_IN

IFX_EXTERN IfxQspi_Slsi_In IfxQspi2_SLSIB_P15_1_IN

Slave select input.

Definition at line 235 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SLSO0_P15_2_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO0_P15_2_OUT

Master slave select output.

Definition at line 265 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SLSO10_P33_2_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO10_P33_2_OUT

Master slave select output.

Definition at line 266 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SLSO10_P34_3_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO10_P34_3_OUT

Master slave select output.

Definition at line 267 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SLSO11_P33_15_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO11_P33_15_OUT

Master slave select output.

Definition at line 268 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SLSO11_P33_6_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO11_P33_6_OUT

Master slave select output.

Definition at line 269 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SLSO12_P32_6_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO12_P32_6_OUT

Master slave select output.

Definition at line 270 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SLSO12_P33_4_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO12_P33_4_OUT

Master slave select output.

Definition at line 271 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SLSO1_P14_2_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO1_P14_2_OUT

Master slave select output.

Definition at line 272 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SLSO2_P14_6_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO2_P14_6_OUT

Master slave select output.

Definition at line 273 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SLSO3_P14_3_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO3_P14_3_OUT

Master slave select output.

Definition at line 274 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SLSO4_P14_7_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO4_P14_7_OUT

Master slave select output.

Definition at line 275 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SLSO5_P15_1_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO5_P15_1_OUT

Master slave select output.

Definition at line 276 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SLSO6_P33_13_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO6_P33_13_OUT

Master slave select output.

Definition at line 277 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SLSO7_P20_10_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO7_P20_10_OUT

Master slave select output.

Definition at line 278 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SLSO8_P20_6_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO8_P20_6_OUT

Master slave select output.

Definition at line 279 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SLSO9_P20_3_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO9_P20_3_OUT

Master slave select output.

Definition at line 280 of file IfxQspi_PinMap.h.

◆ IfxQspi3_MRST_P01_5_OUT

IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P01_5_OUT

Slave SPI data output.

Definition at line 159 of file IfxQspi_PinMap.h.

◆ IfxQspi3_MRST_P02_5_OUT

IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P02_5_OUT

Slave SPI data output.

Definition at line 160 of file IfxQspi_PinMap.h.

◆ IfxQspi3_MRST_P10_7_OUT

IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P10_7_OUT

Slave SPI data output.

Definition at line 161 of file IfxQspi_PinMap.h.

◆ IfxQspi3_MRSTA_P02_5_IN

IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTA_P02_5_IN

Master SPI data input.

Definition at line 141 of file IfxQspi_PinMap.h.

◆ IfxQspi3_MRSTB_P10_7_IN

IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTB_P10_7_IN

Master SPI data input.

Definition at line 142 of file IfxQspi_PinMap.h.

◆ IfxQspi3_MRSTC_P01_5_IN

IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTC_P01_5_IN

Master SPI data input.

Definition at line 143 of file IfxQspi_PinMap.h.

◆ IfxQspi3_MTSR_P01_6_OUT

IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P01_6_OUT

Master SPI data output.

Definition at line 191 of file IfxQspi_PinMap.h.

◆ IfxQspi3_MTSR_P02_6_OUT

IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P02_6_OUT

Master SPI data output.

Definition at line 192 of file IfxQspi_PinMap.h.

◆ IfxQspi3_MTSR_P10_6_OUT

IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P10_6_OUT

Master SPI data output.

Definition at line 193 of file IfxQspi_PinMap.h.

◆ IfxQspi3_MTSRA_P02_6_IN

IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRA_P02_6_IN

Slave SPI data input.

Definition at line 173 of file IfxQspi_PinMap.h.

◆ IfxQspi3_MTSRB_P10_6_IN

IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRB_P10_6_IN

Slave SPI data input.

Definition at line 174 of file IfxQspi_PinMap.h.

◆ IfxQspi3_MTSRC_P01_6_IN

IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRC_P01_6_IN

Slave SPI data input.

Definition at line 175 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SCLK_P01_7_OUT

IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P01_7_OUT

Master SPI clock output.

Definition at line 224 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SCLK_P02_7_OUT

IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P02_7_OUT

Master SPI clock output.

Definition at line 225 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SCLK_P10_8_OUT

IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P10_8_OUT

Master SPI clock output.

Definition at line 226 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SCLKA_P02_7_IN

IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKA_P02_7_IN

Slave SPI clock inputs.

Definition at line 206 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SCLKB_P10_8_IN

IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKB_P10_8_IN

Slave SPI clock inputs.

Definition at line 207 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SCLKC_P01_7_IN

IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKC_P01_7_IN

Slave SPI clock inputs.

Definition at line 208 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSIA_P02_4_IN

IFX_EXTERN IfxQspi_Slsi_In IfxQspi3_SLSIA_P02_4_IN

Slave select input.

Definition at line 236 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSIB_P01_3_IN

IFX_EXTERN IfxQspi_Slsi_In IfxQspi3_SLSIB_P01_3_IN

Slave select input.

Definition at line 237 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSO0_P02_4_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO0_P02_4_OUT

Master slave select output.

Definition at line 281 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSO10_P01_4_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO10_P01_4_OUT

Master slave select output.

Definition at line 282 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSO1_P02_0_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO1_P02_0_OUT

Master slave select output.

Definition at line 283 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSO2_P02_1_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO2_P02_1_OUT

Master slave select output.

Definition at line 284 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSO3_P00_5_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO3_P00_5_OUT

Master slave select output.

Definition at line 285 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSO3_P02_2_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO3_P02_2_OUT

Master slave select output.

Definition at line 286 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSO4_P00_2_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO4_P00_2_OUT

Master slave select output.

Definition at line 287 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSO4_P02_3_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO4_P02_3_OUT

Master slave select output.

Definition at line 288 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSO5_P02_12_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO5_P02_12_OUT

Master slave select output.

Definition at line 289 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSO5_P02_8_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO5_P02_8_OUT

Master slave select output.

Definition at line 290 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSO6_P00_8_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO6_P00_8_OUT

Master slave select output.

Definition at line 291 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSO6_P02_15_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO6_P02_15_OUT

Master slave select output.

Definition at line 292 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSO7_P00_9_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO7_P00_9_OUT

Master slave select output.

Definition at line 293 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSO7_P02_13_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO7_P02_13_OUT

Master slave select output.

Definition at line 294 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSO8_P10_5_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO8_P10_5_OUT

Master slave select output.

Definition at line 295 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSO9_P01_3_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO9_P01_3_OUT

Master slave select output.

Definition at line 296 of file IfxQspi_PinMap.h.

◆ IfxQspi4_MRST_P22_1_OUT

IFX_EXTERN IfxQspi_Mrst_Out IfxQspi4_MRST_P22_1_OUT

Slave SPI data output.

Definition at line 162 of file IfxQspi_PinMap.h.

◆ IfxQspi4_MRST_P33_13_OUT

IFX_EXTERN IfxQspi_Mrst_Out IfxQspi4_MRST_P33_13_OUT

Slave SPI data output.

Definition at line 163 of file IfxQspi_PinMap.h.

◆ IfxQspi4_MRSTA_P33_13_IN

IFX_EXTERN IfxQspi_Mrst_In IfxQspi4_MRSTA_P33_13_IN

Master SPI data input.

Definition at line 144 of file IfxQspi_PinMap.h.

◆ IfxQspi4_MRSTB_P22_1_IN

IFX_EXTERN IfxQspi_Mrst_In IfxQspi4_MRSTB_P22_1_IN

Master SPI data input.

Definition at line 145 of file IfxQspi_PinMap.h.

◆ IfxQspi4_MRSTCN_P21_2_IN

IFX_EXTERN IfxQspi_Mrst_In IfxQspi4_MRSTCN_P21_2_IN

Master SPI data input (LVDS N line)

Definition at line 146 of file IfxQspi_PinMap.h.

◆ IfxQspi4_MRSTCP_P21_3_IN

IFX_EXTERN IfxQspi_Mrst_In IfxQspi4_MRSTCP_P21_3_IN

Master SPI data input (LVDS P line)

Definition at line 147 of file IfxQspi_PinMap.h.

◆ IfxQspi4_MRSTDN_P21_0_IN

IFX_EXTERN IfxQspi_Mrst_In IfxQspi4_MRSTDN_P21_0_IN

Master SPI data input (LVDS N line)

Definition at line 148 of file IfxQspi_PinMap.h.

◆ IfxQspi4_MRSTDP_P21_1_IN

IFX_EXTERN IfxQspi_Mrst_In IfxQspi4_MRSTDP_P21_1_IN

Master SPI data input (LVDS P line)

Definition at line 149 of file IfxQspi_PinMap.h.

◆ IfxQspi4_MTSR_P22_0_OUT

IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi4_MTSR_P22_0_OUT

Master SPI data output.

Definition at line 196 of file IfxQspi_PinMap.h.

◆ IfxQspi4_MTSR_P33_12_OUT

IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi4_MTSR_P33_12_OUT

Master SPI data output.

Definition at line 197 of file IfxQspi_PinMap.h.

◆ IfxQspi4_MTSRA_P33_12_IN

IFX_EXTERN IfxQspi_Mtsr_In IfxQspi4_MTSRA_P33_12_IN

Slave SPI data input.

Definition at line 176 of file IfxQspi_PinMap.h.

◆ IfxQspi4_MTSRB_P22_0_IN

IFX_EXTERN IfxQspi_Mtsr_In IfxQspi4_MTSRB_P22_0_IN

Slave SPI data input.

Definition at line 177 of file IfxQspi_PinMap.h.

◆ IfxQspi4_MTSRN_P22_2_OUT

IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi4_MTSRN_P22_2_OUT

Master SPI data output (LVDS N line)

Definition at line 194 of file IfxQspi_PinMap.h.

◆ IfxQspi4_MTSRP_P22_3_OUT

IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi4_MTSRP_P22_3_OUT

Master SPI data output (LVDS P line)

Definition at line 195 of file IfxQspi_PinMap.h.

◆ IfxQspi4_SCLK_P22_3_OUT

IFX_EXTERN IfxQspi_Sclk_Out IfxQspi4_SCLK_P22_3_OUT

Master SPI clock output.

Definition at line 229 of file IfxQspi_PinMap.h.

◆ IfxQspi4_SCLK_P33_11_OUT

IFX_EXTERN IfxQspi_Sclk_Out IfxQspi4_SCLK_P33_11_OUT

Master SPI clock output.

Definition at line 230 of file IfxQspi_PinMap.h.

◆ IfxQspi4_SCLKA_P33_11_IN

IFX_EXTERN IfxQspi_Sclk_In IfxQspi4_SCLKA_P33_11_IN

Slave SPI clock inputs.

Definition at line 209 of file IfxQspi_PinMap.h.

◆ IfxQspi4_SCLKB_P22_3_IN

IFX_EXTERN IfxQspi_Sclk_In IfxQspi4_SCLKB_P22_3_IN

Slave SPI clock inputs.

Definition at line 210 of file IfxQspi_PinMap.h.

◆ IfxQspi4_SCLKN_P22_0_OUT

IFX_EXTERN IfxQspi_Sclk_Out IfxQspi4_SCLKN_P22_0_OUT

Master SPI clock output (LVDS N line)

Definition at line 227 of file IfxQspi_PinMap.h.

◆ IfxQspi4_SCLKP_P22_1_OUT

IFX_EXTERN IfxQspi_Sclk_Out IfxQspi4_SCLKP_P22_1_OUT

Master SPI clock output (LVDS P line)

Definition at line 228 of file IfxQspi_PinMap.h.

◆ IfxQspi4_SLSIA_P33_10_IN

IFX_EXTERN IfxQspi_Slsi_In IfxQspi4_SLSIA_P33_10_IN

Slave select input.

Definition at line 238 of file IfxQspi_PinMap.h.

◆ IfxQspi4_SLSIB_P22_2_IN

IFX_EXTERN IfxQspi_Slsi_In IfxQspi4_SLSIB_P22_2_IN

Slave select input.

Definition at line 239 of file IfxQspi_PinMap.h.

◆ IfxQspi4_SLSO0_P33_10_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO0_P33_10_OUT

Master slave select output.

Definition at line 297 of file IfxQspi_PinMap.h.

◆ IfxQspi4_SLSO1_P33_9_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO1_P33_9_OUT

Master slave select output.

Definition at line 298 of file IfxQspi_PinMap.h.

◆ IfxQspi4_SLSO2_P33_3_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO2_P33_3_OUT

Master slave select output.

Definition at line 299 of file IfxQspi_PinMap.h.

◆ IfxQspi4_SLSO2_P33_8_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO2_P33_8_OUT

Master slave select output.

Definition at line 300 of file IfxQspi_PinMap.h.

◆ IfxQspi4_SLSO3_P22_2_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO3_P22_2_OUT

Master slave select output.

Definition at line 301 of file IfxQspi_PinMap.h.

◆ IfxQspi4_SLSO4_P02_12_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO4_P02_12_OUT

Master slave select output.

Definition at line 302 of file IfxQspi_PinMap.h.

◆ IfxQspi4_SLSO4_P23_5_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO4_P23_5_OUT

Master slave select output.

Definition at line 303 of file IfxQspi_PinMap.h.

◆ IfxQspi4_SLSO5_P02_15_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO5_P02_15_OUT

Master slave select output.

Definition at line 304 of file IfxQspi_PinMap.h.

◆ IfxQspi4_SLSO5_P23_4_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO5_P23_4_OUT

Master slave select output.

Definition at line 305 of file IfxQspi_PinMap.h.

◆ IfxQspi4_SLSO6_P02_13_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO6_P02_13_OUT

Master slave select output.

Definition at line 306 of file IfxQspi_PinMap.h.

◆ IfxQspi4_SLSO6_P23_1_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO6_P23_1_OUT

Master slave select output.

Definition at line 307 of file IfxQspi_PinMap.h.

◆ IfxQspi4_SLSO7_P02_1_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO7_P02_1_OUT

Master slave select output.

Definition at line 308 of file IfxQspi_PinMap.h.

◆ IfxQspi4_SLSO7_P33_7_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO7_P33_7_OUT

Master slave select output.

Definition at line 309 of file IfxQspi_PinMap.h.

◆ IfxQspi_Mrst_In_pinTable

IFX_EXTERN const IfxQspi_Mrst_In* IfxQspi_Mrst_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS]

IfxQspi_Mrst_In table.

Definition at line 325 of file IfxQspi_PinMap.h.

◆ IfxQspi_Mrst_Out_pinTable

IFX_EXTERN const IfxQspi_Mrst_Out* IfxQspi_Mrst_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS]

IfxQspi_Mrst_Out table.

Definition at line 328 of file IfxQspi_PinMap.h.

◆ IfxQspi_Mtsr_In_pinTable

IFX_EXTERN const IfxQspi_Mtsr_In* IfxQspi_Mtsr_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS]

IfxQspi_Mtsr_In table.

Definition at line 331 of file IfxQspi_PinMap.h.

◆ IfxQspi_Mtsr_Out_pinTable

IFX_EXTERN const IfxQspi_Mtsr_Out* IfxQspi_Mtsr_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS]

IfxQspi_Mtsr_Out table.

Definition at line 334 of file IfxQspi_PinMap.h.

◆ IfxQspi_Sclk_In_pinTable

IFX_EXTERN const IfxQspi_Sclk_In* IfxQspi_Sclk_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS]

IfxQspi_Sclk_In table.

Definition at line 337 of file IfxQspi_PinMap.h.

◆ IfxQspi_Sclk_Out_pinTable

IFX_EXTERN const IfxQspi_Sclk_Out* IfxQspi_Sclk_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS]

IfxQspi_Sclk_Out table.

Definition at line 340 of file IfxQspi_PinMap.h.

◆ IfxQspi_Slsi_In_pinTable

IFX_EXTERN const IfxQspi_Slsi_In* IfxQspi_Slsi_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS]

IfxQspi_Slsi_In table.

Definition at line 343 of file IfxQspi_PinMap.h.

◆ IfxQspi_Slso_Out_pinTable

IFX_EXTERN const IfxQspi_Slso_Out* IfxQspi_Slso_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_NUM_SLAVESELECTS][IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS]

IfxQspi_Slso_Out table.

Definition at line 346 of file IfxQspi_PinMap.h.


iLLD_TC38A: How to use the SPI Master Interface driver?

How to use the SPI Master Interface driver?
iLLD » QSPI
Collaboration diagram for How to use the SPI Master Interface driver?:

The SPI Master interface driver provides a default QSPI configuration for a bidirectional serial communication of data words.

Data transactions are buffered by the hardware based FIFOs. Incoming and outgoing data is transfered in background from/to the QSPI peripheral by interrupt service handlers, which are part of this driver as well. This allows a nonblocking communication without stalling the thread(s) from where data is sent and received. Optionally Dma can be used for data transfers. Only the interrupt configuration and Module initialisation are different when dma is used.

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Qspi/SpiMaster/IfxQspi_SpiMaster.h>

Variables

Declare QSPI module and channel handles:

IfxQspi_SpiMaster spi;
IfxQspi_SpiMaster_Channel spiChannel;

In addition, declare global transmit and receive buffers for the data transfers:

#define SPI_BUFFER_SIZE 8
uint8 spiTxBuffer[SPI_BUFFER_SIZE];
uint8 spiRxBuffer[SPI_BUFFER_SIZE];

Interrupt Handler Installation (without dma use)

See also How to define Interrupts?

Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:

// priorities are normally defined in Ifx_IntPrioDef.h
#define IFX_INTPRIO_QSPI0_TX 1
#define IFX_INTPRIO_QSPI0_RX 2
#define IFX_INTPRIO_QSPI0_ER 5

Add the interrupt service routines to your C code. They have to call the QSPI interrupt handlers by passing the spi handle:

IFX_INTERRUPT(qspi0TxISR, 0, IFX_INTPRIO_QSPI0_TX)
{
IfxQspi_SpiMaster_isrTransmit(&spi);
}
IFX_INTERRUPT(qspi0RxISR, 0, IFX_INTPRIO_QSPI0_RX)
{
IfxQspi_SpiMaster_isrReceive(&spi);
}
IFX_INTERRUPT(qspi0ErISR, 0, IFX_INTPRIO_QSPI0_ER)
{
IfxQspi_SpiMaster_isrError(&spi);
// Process errors. Eg: parity Error is checked below
IfxQspi_SpiMaster_Channel *chHandle = IfxQspi_SpiMaster_activeChannel(&spi);
if( chHandle->errorFlags.parityError == 1)
{
// Parity Error
}
}

Finally install the interrupt handlers in your initialisation function:

// install interrupt handlers
IfxCpu_Irq_installInterruptHandler(&qspi0TxISR, IFX_INTPRIO_QSPI0_TX);
IfxCpu_Irq_installInterruptHandler(&qspi0RxISR, IFX_INTPRIO_QSPI0_RX);
IfxCpu_Irq_installInterruptHandler(&qspi0ErISR, IFX_INTPRIO_QSPI0_ER);
IfxCpu_enableInterrupts();

Interrupt Handler Installation (with dma use)

See also How to define Interrupts?

Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:

// qspi priorities
#define IFX_INTPRIO_QSPI0_TX 1 // DMA channel 1
#define IFX_INTPRIO_QSPI0_RX 2 // DMA channel 2
#define IFX_INTPRIO_QSPI0_ER 0x30
// dma priorities
#define IFX_INTPRIO_DMA_CH1 10
#define IFX_INTPRIO_DMA_CH2 11

Add the interrupt service routines to your C code. They have to call the QSPI interrupt handlers by passing the spi handle:

IFX_INTERRUPT(qspi0DmaTxISR, 0, IFX_INTPRIO_DMA_CH1 )
{
IfxQspi_SpiMaster_isrDmaTransmit(&spi);
}
IFX_INTERRUPT(qspi0DmaRxISR, 0, IFX_INTPRIO_DMA_CH2)
{
IfxQspi_SpiMaster_isrDmaReceive(&spi);
}
IFX_INTERRUPT(qspi0ErISR, 0, IFX_INTPRIO_QSPI0_ER)
{
IfxQspi_SpiMaster_isrError(&spi);
// Process errors. Eg: parity Error is checked below
IfxQspi_SpiMaster_Channel *chHandle = IfxQspi_SpiMaster_activeChannel(&spi);
if( chHandle->errorFlags.parityError == 1)
{
// Parity Error
}
}

Finally install the interrupt handlers in your initialisation function:

// install interrupt handlers
IfxCpu_Irq_installInterruptHandler(&qspi0DmaTxISR, IFX_INTPRIO_DMA_CH1);
IfxCpu_Irq_installInterruptHandler(&qspi0DmaRxISR, IFX_INTPRIO_DMA_CH2);
IfxCpu_Irq_installInterruptHandler(&qspi0ErISR, IFX_INTPRIO_QSPI0_ER);
IfxCpu_enableInterrupts();

Module Initialisation (without dma use)

The module initialisation can be done in the same function.

Here an example for master mode:

// create module config
IfxQspi_SpiMaster_Config spiMasterConfig;
IfxQspi_SpiMaster_initModuleConfig(&spiMasterConfig, &MODULE_QSPI0);
// set the desired mode and maximum baudrate
spiMasterConfig.base.mode = SpiIf_Mode_master;
spiMasterConfig.base.maximumBaudrate = 10000000;
// ISR priorities and interrupt target
spiMasterConfig.base.txPriority = IFX_INTPRIO_QSPI0_TX;
spiMasterConfig.base.rxPriority = IFX_INTPRIO_QSPI0_RX;
spiMasterConfig.base.erPriority = IFX_INTPRIO_QSPI0_ER;
spiMasterConfig.base.isrProvider = IfxCpu_Irq_getTos(IfxCpu_getCoreIndex());
// pin configuration
const IfxQspi_SpiMaster_Pins pins = {
&IfxQspi0_SCLK_P20_11_OUT, IfxPort_OutputMode_pushPull, // SCLK
&IfxQspi0_MTSR_P20_14_OUT, IfxPort_OutputMode_pushPull, // MTSR
&IfxQspi0_MRSTA_P20_12_IN, IfxPort_InputMode_pullDown, // MRST
IfxPort_PadDriver_cmosAutomotiveSpeed3 // pad driver mode
};
spiMasterConfig.pins = &pins;
// initialize module
//IfxQspi_SpiMaster spi; // defined globally
IfxQspi_SpiMaster_initModule(&spi, &spiMasterConfig);

Module Initialisation (with dma use)

The module initialisation can be done in the same function.

Here an example for master mode:

// create module config
IfxQspi_SpiMaster_Config spiMasterConfig;
IfxQspi_SpiMaster_initModuleConfig(&spiMasterConfig, &MODULE_QSPI0);
// set the desired mode and maximum baudrate
spiMasterConfig.base.mode = SpiIf_Mode_master;
spiMasterConfig.base.maximumBaudrate = 10000000;
// ISR priorities and interrupt target (with Dma usage)
spiMasterConfig.base.txPriority = IFX_INTPRIO_DMA_CH1;
spiMasterConfig.base.rxPriority = IFX_INTPRIO_DMA_CH2;
spiMasterConfig.base.erPriority = IFX_INTPRIO_QSPI0_ER;
// dma configuration.
spiMasterConfig.dma.txDmaChannelId = IfxDma_ChannelId_1;
spiMasterConfig.dma.rxDmaChannelId = IfxDma_ChannelId_2;
spiMasterConfig.dma.useDma = 1;
// pin configuration
const IfxQspi_SpiMaster_Pins pins = {
&IfxQspi0_SCLK_P20_11_OUT, IfxPort_OutputMode_pushPull, // SCLK
&IfxQspi0_MTSR_P20_14_OUT, IfxPort_OutputMode_pushPull, // MTSR
&IfxQspi0_MRSTA_P20_12_IN, IfxPort_InputMode_pullDown, // MRST
IfxPort_PadDriver_cmosAutomotiveSpeed3 // pad driver mode
};
spiMasterConfig.pins = &Pins;
// initialize module
//IfxQspi_SpiMaster spi; // defined globally
IfxQspi_SpiMaster_initModule(&spi, &spiMasterConfig);

SPI Channel Initialisation

After the module has been initialized, one or more SPI channels can be configured. Each channel has a dedicated select line.

Here an example for a SPI channel in master mode:

// create channel config
IfxQspi_SpiMaster_ChannelConfig spiMasterChannelConfig;
IfxQspi_SpiMaster_initChannelConfig(&spiMasterChannelConfig, &spi);
// set the baudrate for this channel
spiMasterChannelConfig.base.baudrate = 5000000;
// select pin configuration
const IfxQspi_SpiMaster_Output slsOutput = {
&IfxQspi0_SLSO7_P33_5_OUT,
IfxPort_OutputMode_pushPull,
IfxPort_PadDriver_cmosAutomotiveSpeed1
};
spiMasterChannelConfig.sls.output = (IfxQspi_SpiMaster_Output)slsOutput;
// initialize channel
//IfxQspi_SpiMaster_Channel spiChannel; // defined globally
IfxQspi_SpiMaster_initChannel(&spiChannel, &spiMasterChannelConfig);

The QSPI is ready for use now!

Data Transfers

In following examples we assume, that following buffers are declared globally:

// declared somewhere globally
#define SPI_BUFFER_SIZE 8
uint8 spiTxBuffer[SPI_BUFFER_SIZE] = { 1, 2, 3, 4, 5, 6, 7, 8 };
uint8 spiRxBuffer[SPI_BUFFER_SIZE] = { 0, 0, 0, 0, 0, 0, 0, 0 };

Sending and Receiving a data stream:

int i=0;
// wait until transfer of previous data stream is finished
while( IfxQspi_SpiMaster_getStatus(&spiChannel) == SpiIf_Status_busy );
// send/receive new stream
IfxQspi_SpiMaster_exchange(&spiChannel, &spiTxBuffer[i], &spiRxBuffer[i], SPI_BUFFER_SIZE);

Send only, discard received data:

// wait until transfer of previous data stream is finished
while( IfxQspi_SpiMaster_getStatus(&spiChannel) == SpiIf_Status_busy );
// send new stream
IfxQspi_SpiMaster_exchange(&spiChannel, &spiTxBuffer[i], NULL_PTR, SPI_BUFFER_SIZE);

Receive only, send all-1

// wait until transfer of previous data stream is finished
while( IfxQspi_SpiMaster_getStatus(&spiChannel) == SpiIf_Status_busy );
// receive new stream
IfxQspi_SpiMaster_exchange(&spiChannel, NULL_PTR, &spiRxBuffer[i], SPI_BUFFER_SIZE);

Phase transition and User Interrupt usage

Phase transition and user defined interrupts are not configured internal to Driver.

Example usage of Phase transition interrupt is given below

IfxCpu_Irq_installInterruptHandler(&qspi0PtISR, IFX_INTPRIO_QSPI0_PT);
IfxQspi_pause(&MODULE_QSPI0);
IfxQspi_configPT1Event(&MODULE_QSPI0, IfxQspi_PhaseTransitionEvent_startOfFrame); // Configured for PT1 SOF event
IfxQspi_enablePT1Event(&MODULE_QSPI0,TRUE);
IfxQspi_run(&MODULE_QSPI0);

Add the interrupt service routines to your C code. They have to call the QSPI interrupt handlers by passing the spi handle:

IFX_INTERRUPT(qspi0PtISR, 0, IFX_INTPRIO_QSPI0_PT )
{
IfxQspi_PhaseTransitionEvent event;
event = IfxQspi_SpiMaster_isrPhaseTransition(&spiMaster);
// process event
switch (event)
{
case IfxQspi_PhaseTransitionEvent_startOfFrame:
// SOF event
break;
// add other events if needed.
}
}

How to use XXL Mode with Dma

The Qspi XXL mode is similar to Short mode with the exception to configure mode to xxl before calling IfxQspi_SpiMaster_initChannel() function. The remaining usage is similar to Short / ShortContinuous Mode (default one) with Dma

spiMasterChannelConfig.mode = IfxQspi_SpiMaster_Mode_xxl;

How to use Long / Long Continuous Mode with Dma

The qspi Long mode is similar to short mode Except for below additional changes.

  1. Transmit buffer need to be defined (this is in addition to source/TX data buffer. This buffer is used to store the DATA + CONFIG for dma usage).
  2. Configure the Spi Channel configuration mode (new one) to long or longContinuous mode
  3. Preparing Transmit buffer content for long/long Continuous mode

Example Code is provided below.

Include Files

Include following header file into your C code:

#include <Qspi/SpiMaster/IfxQspi_SpiMaster.h>

Variables

Declare QSPI module and channel handles:

IfxQspi_SpiMaster spi;
IfxQspi_SpiMaster_Channel spiChannel;

In addition, declare global transmit and receive buffers for the data transfers:

#define SPI_BUFFER_SIZE 50
#define BACON_SIZE IFXQSPI_BACONSIZE(SPI_BUFFER_SIZE)
#define FIFO_SIZE IFXQSPI_FIFO32BITSIZE(SPI_BUFFER_SIZE)
// This should be 32 bit ; use addition of macros as shown
__attribute__ ((aligned(64))) uint32 spi0TxLongBuffer[BACON_SIZE + FIFO_SIZE];
uint8 spiTxBuffer[SPI_BUFFER_SIZE];
uint8 spiRxBuffer[SPI_BUFFER_SIZE];

Module Initialisation (with dma use)

The module initialisation can be done in the same function.

Here an example for master mode:

// create module config
IfxQspi_SpiMaster_Config spiMasterConfig;
IfxQspi_SpiMaster_initModuleConfig(&spiMasterConfig, &MODULE_QSPI0);
// set the desired mode and maximum baudrate
spiMasterConfig.base.mode = SpiIf_Mode_master;
spiMasterConfig.base.maximumBaudrate = 10000000;
// ISR priorities and interrupt target (with Dma usage)
spiMasterConfig.base.txPriority = IFX_INTPRIO_DMA_CH1;
spiMasterConfig.base.rxPriority = IFX_INTPRIO_DMA_CH2;
spiMasterConfig.base.erPriority = IFX_INTPRIO_QSPI0_ER;
// dma configuration.
spiMasterConfig.dma.txDmaChannelId = IfxDma_ChannelId_1;
spiMasterConfig.dma.rxDmaChannelId = IfxDma_ChannelId_2;
spiMasterConfig.dma.useDma = 1;
// pin configuration
const IfxQspi_SpiMaster_Pins pins = {
&IfxQspi0_SCLK_P20_11_OUT, IfxPort_OutputMode_pushPull, // SCLK
&IfxQspi0_MTSR_P20_14_OUT, IfxPort_OutputMode_pushPull, // MTSR
&IfxQspi0_MRSTA_P20_12_IN, IfxPort_InputMode_pullDown, // MRST
IfxPort_PadDriver_cmosAutomotiveSpeed3 // pad driver mode
};
spiMasterConfig.pins = &Pins;
// initialize module
//IfxQspi_SpiMaster spi; // defined globally
IfxQspi_SpiMaster_initModule(&spi, &spiMasterConfig);

SPI Channel Initialisation

After the module has been initialized, one or more SPI channels can be configured. Each channel has a dedicated select line.

Here an example for a SPI channel in master mode:

// create channel config
IfxQspi_SpiMaster_ChannelConfig spiMasterChannelConfig;
IfxQspi_SpiMaster_initChannelConfig(&spiMasterChannelConfig, &spi);
// set the baudrate for this channel
spiMasterChannelConfig.base.baudrate = 5000000;
// select pin configuration
const IfxQspi_SpiMaster_Output slsOutput = {
&IfxQspi0_SLSO7_P33_5_OUT,
IfxPort_OutputMode_pushPull,
IfxPort_PadDriver_cmosAutomotiveSpeed1
};
spiMasterChannelConfig.sls.output = (IfxQspi_SpiMaster_Output)slsOutput;
spiMasterChannelConfig.mode = IfxQspi_SpiMaster_Mode_longContinuous; // Select Long Continuous Mode
// initialize channel
//IfxQspi_SpiMaster_Channel spiChannel; // defined globally
IfxQspi_SpiMaster_initChannel(&spiChannel, &spiMasterChannelConfig);

Sending and Receiving a Long data stream:

int i=0;
// Pack data and Configuration to Transmit buffer (Only for Long / Long Continuous Mode(s))
IfxQspi_SpiMaster_packLongModeBuffer(&spiMasterChannel, spi0TxBuffer, spi0TxLongBuffer, SPI_BUFFER_SIZE);
// wait until transfer of previous data stream is finished
while( IfxQspi_SpiMaster_getStatus(&spiChannel) == SpiIf_Status_busy );
// send/receive new stream
IfxQspi_SpiMaster_exchange(&spiChannel, &spiTxBuffer[i], &spiRxBuffer[i], SPI_BUFFER_SIZE);

** NOTE for loopback mode ** In case you want to configure and test a SPI channel in loopback, you have to select: spiMasterChannelConfig.base.mode.loopback = 1

If an output pin is configured in loopback mode, the SPI channel number will be extracted from the pin map configuration.

If an output pin is not configured in loopback, the default SPI channel selected will be 0.


iLLD_TC38A: SPI Master Driver

Modules
SPI Master Driver
iLLD » QSPI
Collaboration diagram for SPI Master Driver:

Modules

Data Structures
Module Functions
Channel Functions
Support Functions
Communication
Interrupt Functions
Direct FIFO Access

Detailed Description


iLLD_TC38A: Data Structures

Data Structures | Enumerations
Data Structures
iLLD » QSPI » SPI Master Driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxQspi_SpiMaster_Input
SLSI pin configuration structure. More...
struct | IfxQspi_SpiMaster_Output
SLSO pin configuration structure. More...
struct | IfxQspi_SpiMaster_Dma
Dma handle. More...
struct | IfxQspi_SpiMaster_DmaConfig
Dma configuration. More...
struct | IfxQspi_SpiMaster_ErrorFlags
Qspi Master Mode Error Flags. More...
union | IfxQspi_SpiMaster_InputOutput
Union of Slave Select pins. More...
struct | IfxQspi_SpiMaster_MoveCounterControl
struct | IfxQspi_SpiMaster_Pins
Master pin IO configuration structure. More...
struct | IfxQspi_SpiMaster
Module handle data structure. More...
struct | IfxQspi_SpiMaster_ChannelConfig
Module Channel configuration structure. More...
struct | IfxQspi_SpiMaster_Channel_s
Module Channel handle structure. More...
struct | IfxQspi_SpiMaster_Config
Module configuration structure. More...

Enumerations

enum IfxQspi_SpiMaster_ChannelBasedCs {
IfxQspi_SpiMaster_ChannelBasedCs_disabled = 0,
IfxQspi_SpiMaster_ChannelBasedCs_enabled = 1
}
enum IfxQspi_SpiMaster_Mode {
IfxQspi_SpiMaster_Mode_short = 0,
IfxQspi_SpiMaster_Mode_long = 1,
IfxQspi_SpiMaster_Mode_shortContinuous = 2,
IfxQspi_SpiMaster_Mode_longContinuous = 3,
IfxQspi_SpiMaster_Mode_xxl = 4
}

Detailed Description

Data Structure Documentation

◆ IfxQspi_SpiMaster_Input

struct IfxQspi_SpiMaster_Input

SLSI pin configuration structure.

Definition at line 554 of file IfxQspi_SpiMaster.h.

Collaboration diagram for IfxQspi_SpiMaster_Input:
[legend]
Data Fields
IfxPort_InputMode | mode | The SLSI pin input mode.
IFX_CONST IfxQspi_Slsi_In * | pin | Pointer to SLSI in pin.

◆ IfxQspi_SpiMaster_Output

struct IfxQspi_SpiMaster_Output

SLSO pin configuration structure.

Definition at line 562 of file IfxQspi_SpiMaster.h.

Collaboration diagram for IfxQspi_SpiMaster_Output:
[legend]
Data Fields
IfxPort_PadDriver | driver | The pad driver mode which should be configured.
IfxPort_OutputMode | mode | The SLSO pin output mode.
IFX_CONST IfxQspi_Slso_Out * | pin | Pointer to SLSO out pin.

◆ IfxQspi_SpiMaster_Dma

struct IfxQspi_SpiMaster_Dma

Dma handle.

Definition at line 575 of file IfxQspi_SpiMaster.h.

Collaboration diagram for IfxQspi_SpiMaster_Dma:
[legend]
Data Fields
IfxDma_Dma_Channel | rxDmaChannel | receive DMA channel handle
IfxDma_ChannelId | rxDmaChannelId | DMA channel no for the Spi recieve.
IfxDma_Dma_Channel | txDmaChannel | transmit DMA channel handle
IfxDma_ChannelId | txDmaChannelId | DMA channel no for the Spi transmit.
boolean | useDma | use Dma for Data transfer/s

◆ IfxQspi_SpiMaster_DmaConfig

struct IfxQspi_SpiMaster_DmaConfig

Dma configuration.

Definition at line 586 of file IfxQspi_SpiMaster.h.

Data Fields
IfxDma_ChannelId | rxDmaChannelId | DMA channel no for the Spi recieve.
IfxDma_ChannelId | txDmaChannelId | DMA channel no for the Spi transmit.
boolean | useDma | use Dma for Data transfer/s

◆ IfxQspi_SpiMaster_ErrorFlags

struct IfxQspi_SpiMaster_ErrorFlags

Qspi Master Mode Error Flags.

Definition at line 595 of file IfxQspi_SpiMaster.h.

Data Fields
uint16 | baudrateError: 1 | [2:2] baudrate Error
uint16 | configurationError: 1 | [1:1] Configuration Error
uint16 | expectTimeoutError: 1 | [7:7] Expect Timeout Error
uint16 | parityError: 1 | [0:0] Parity Error
uint16 | rxFifoOverflowError: 1 | [5:5] RxFifo Overflow Error
uint16 | rxFifoUnderflowError: 1 | [6:6] RxFifo underflow Error
uint16 | txFifoOverflowError: 1 | [3:3] TxFifo Overflow Error
uint16 | txFifoUnderflowError: 1 | [4:4] TxFifo underflow Error

◆ IfxQspi_SpiMaster_InputOutput

union IfxQspi_SpiMaster_InputOutput

Union of Slave Select pins.

Definition at line 609 of file IfxQspi_SpiMaster.h.

Collaboration diagram for IfxQspi_SpiMaster_InputOutput:
[legend]
Data Fields
IfxQspi_SpiMaster_Input | input | SLSI pin configuration structure.
IfxQspi_SpiMaster_Output | output | SLSO pin configuration structure.

◆ IfxQspi_SpiMaster_MoveCounterControl

struct IfxQspi_SpiMaster_MoveCounterControl

Definition at line 615 of file IfxQspi_SpiMaster.h.

Data Fields
boolean | clearInterruptAfterLastFlag | Clear Interrupt After Last Flag.
boolean | clearInterruptBeforeLastFlag | Clear Interrupt Before Last Flag.
boolean | interruptAfterLastEnabled | Enable bit for Interrupt after last word.
boolean | interruptBeforeLastEnabled | Enable bit for Interrupt before last word.
uint16 | lastTrailingDelay: 3 | Last Trailing delay.
boolean | moveCounterEnabled | Enable the Move Counter.
boolean | setInterruptAfterLastFlag | Sets the Interrupt After Last Flag.
boolean | setInterruptBeforeLastFlag | Sets the Interrupt Before Last Flag.
boolean | trail2InjectionEnabled | Trail 2 Injection Enable.
uint16 | trailingDelay2Prescaler: 3 | Inject the trailing delay for last data.

◆ IfxQspi_SpiMaster_Pins

struct IfxQspi_SpiMaster_Pins

Master pin IO configuration structure.

Definition at line 631 of file IfxQspi_SpiMaster.h.

Collaboration diagram for IfxQspi_SpiMaster_Pins:
[legend]
Data Fields
IFX_CONST IfxQspi_Mrst_In * | mrst | Pointer to MRST in pin.
IfxPort_InputMode | mrstMode | The MRST pin input mode.
IFX_CONST IfxQspi_Mtsr_Out * | mtsr | Pointer to MTSR out pin.
IfxPort_OutputMode | mtsrMode | The MTSR pin output mode.
IfxPort_PadDriver | pinDriver | The pad driver mode which should be configured.
IFX_CONST IfxQspi_Sclk_Out * | sclk | Pointer to SLCK out pin.
IfxPort_OutputMode | sclkMode | The SCLK pin output mode.

◆ IfxQspi_SpiMaster

struct IfxQspi_SpiMaster

Module handle data structure.

Definition at line 648 of file IfxQspi_SpiMaster.h.

Collaboration diagram for IfxQspi_SpiMaster:
[legend]
Data Fields
SpiIf | base | Module SPI interface handle.
IfxQspi_SpiMaster_Dma | dma | dma handle
float32 | maximumBaudrate | Maximum Baud Rate for the SPI Module.
Ifx_QSPI * | qspi | Pointer to QSPI module registers.

◆ IfxQspi_SpiMaster_ChannelConfig

struct IfxQspi_SpiMaster_ChannelConfig

Module Channel configuration structure.

Definition at line 658 of file IfxQspi_SpiMaster.h.

Collaboration diagram for IfxQspi_SpiMaster_ChannelConfig:
[legend]
Data Fields
SpiIf_ChConfig | base | SPI interface channel configuration structure.
IfxQspi_SpiMaster_ChannelBasedCs | channelBasedCs | define the slso behaviour
uint32 | dummyRxValue | Dummy RX value for transmit only modes.
uint32 | dummyTxValue | Dummy TX value to be sent for "recieve only" modes.
IfxQspi_SpiMaster_Mode | mode | Qspi Operating Mode.
IfxQspi_SpiMaster_InputOutput | sls | Union of Slave Select pins.

◆ IfxQspi_SpiMaster_Channel_s

struct IfxQspi_SpiMaster_Channel_s

Module Channel handle structure.

Definition at line 670 of file IfxQspi_SpiMaster.h.

Collaboration diagram for IfxQspi_SpiMaster_Channel_s:
[legend]
Data Fields
IfxQspi_SpiMaster_AutoSlso | activateSlso | Specifies function for Auto SLSO activation.
Ifx_QSPI_BACON | bacon | basic configuration register
SpiIf_Ch | base | SPI interface channel handle structure.
IfxQspi_SpiMaster_ChannelBasedCs | channelBasedCs | define the slso behaviour
IfxQspi_ChannelId | channelId | QSPI channel Number.
uint8 | dataWidth | Number of bits which will be written into the FIFO.
IfxQspi_SpiMaster_AutoSlso | deactivateSlso | Specifies function for Auto SLSO deactivation.
uint32 | dummyRxValue | Dummy Rx value, for "transmit only" modes.
uint32 | dummyTxValue | Dummy TX value, which will be sent for "recieve only" mode.
IfxQspi_SpiMaster_ErrorFlags | errorFlags | Spi Master Error Flags.
boolean | firstWrite | Specifies whether the data id first write or not.
IfxQspi_SpiMaster_Mode | mode | Qspi Operating Mode.
IfxQspi_SpiMaster_MoveCounterControl | moveCounterControl | config move counter control register
IfxPort_Pin | slso | Defines SLSO pin.
Ifx_ActiveState | slsoActiveState | Specifies the current state of SLSO.

◆ IfxQspi_SpiMaster_Config

struct IfxQspi_SpiMaster_Config

Module configuration structure.

Definition at line 691 of file IfxQspi_SpiMaster.h.

Collaboration diagram for IfxQspi_SpiMaster_Config:
[legend]
Data Fields
boolean | allowSleepMode | Specifies module sleep mode.
SpiIf_Config | base | SPI interface configuration structure.
IfxQspi_SpiMaster_DmaConfig | dma | Dma configuration.
boolean | pauseOnBaudrateSpikeErrors | Specifies module pause on baudrate or spike errors.
IfxQspi_PauseRunTransition | pauseRunTransition | Specifies module run or pause mode.
IFX_CONST IfxQspi_SpiMaster_Pins * | pins | structure for QSPI Master pins
Ifx_QSPI * | qspi | Pointer to QSPI module registers.
IfxQspi_FifoMode | rxFifoMode | Specifies the Receive FIFO mode.
IfxQspi_RxFifoInt | rxFifoThreshold | Specifies the RXFIFO interrupt threshold.
IfxQspi_FifoMode | txFifoMode | Specifies the transmit FIFO mode.
IfxQspi_TxFifoInt | txFifoThreshold | Specifies the TXFIFO interrupt threshold.

Enumeration Type Documentation

◆ IfxQspi_SpiMaster_ChannelBasedCs

enum IfxQspi_SpiMaster_ChannelBasedCs
Enumerator
IfxQspi_SpiMaster_ChannelBasedCs_disabled | Slso will be low for complete frame.
IfxQspi_SpiMaster_ChannelBasedCs_enabled | Slso will toggle with every byte.

Definition at line 529 of file IfxQspi_SpiMaster.h.

◆ IfxQspi_SpiMaster_Mode

enum IfxQspi_SpiMaster_Mode
Enumerator
IfxQspi_SpiMaster_Mode_short | Short Mode.
IfxQspi_SpiMaster_Mode_long | Long Mode.
IfxQspi_SpiMaster_Mode_shortContinuous | Short Continous Mode.
IfxQspi_SpiMaster_Mode_longContinuous | Long Continous Mode.
IfxQspi_SpiMaster_Mode_xxl | XXL Mode.

Definition at line 535 of file IfxQspi_SpiMaster.h.


iLLD_TC38A: Module Functions

Functions
Module Functions
iLLD » QSPI » SPI Master Driver
Collaboration diagram for Module Functions:

Functions

IFX_EXTERN void | IfxQspi_SpiMaster_initModule (IfxQspi_SpiMaster *handle, const IfxQspi_SpiMaster_Config *config)
Initialises the module. More...
IFX_EXTERN void | IfxQspi_SpiMaster_initModuleConfig (IfxQspi_SpiMaster_Config *config, Ifx_QSPI *qspi)
Fills the config structure with default values. More...

Detailed Description

Function Documentation

◆ IfxQspi_SpiMaster_initModule()

IFX_EXTERN void IfxQspi_SpiMaster_initModule | ( | IfxQspi_SpiMaster * | handle,
 |  | const IfxQspi_SpiMaster_Config * | config
 | ) |  |

Initialises the module.

Parameters
handle | Module handle
config | Predefined configuration structure of the module
Returns
None

Usage example: see How to use the SPI Master Interface driver?

Definition at line 340 of file IfxQspi_SpiMaster.c.

◆ IfxQspi_SpiMaster_initModuleConfig()

IFX_EXTERN void IfxQspi_SpiMaster_initModuleConfig | ( | IfxQspi_SpiMaster_Config * | config,
 |  | Ifx_QSPI * | qspi
 | ) |  |

Fills the config structure with default values.

Parameters
config | Configuration structure which should be initialized.
qspi | pointer to QSPI registers
Returns
None

Usage example: see How to use the SPI Master Interface driver?

Definition at line 553 of file IfxQspi_SpiMaster.c.


iLLD_TC38A: Channel Functions

Functions
Channel Functions
iLLD » QSPI » SPI Master Driver
Collaboration diagram for Channel Functions:

Functions

IFX_STATIC IfxQspi_SpiMaster_Channel * | IfxQspi_SpiMaster_activeChannel (IfxQspi_SpiMaster *handle)
Gets current active channel. More...
IFX_EXTERN SpiIf_Status | IfxQspi_SpiMaster_initChannel (IfxQspi_SpiMaster_Channel *chHandle, const IfxQspi_SpiMaster_ChannelConfig *chConfig)
Initializes the channel. More...
IFX_EXTERN void | IfxQspi_SpiMaster_initChannelConfig (IfxQspi_SpiMaster_ChannelConfig *chConfig, IfxQspi_SpiMaster *handle)
Fills the config structure with default values. More...

Detailed Description

Function Documentation

◆ IfxQspi_SpiMaster_activeChannel()

IFX_STATIC IfxQspi_SpiMaster_Channel * IfxQspi_SpiMaster_activeChannel ( IfxQspi_SpiMaster * handle )

Gets current active channel.

Parameters
handle Module handle
Returns
current active channel

Definition at line 127 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_isrDmaReceive(), IfxQspi_SpiMaster_isrDmaTransmit(), IfxQspi_SpiMaster_isrError(), IfxQspi_SpiMaster_isrReceive(), and IfxQspi_SpiMaster_isrTransmit().

◆ IfxQspi_SpiMaster_initChannel()

IFX_EXTERN SpiIf_Status IfxQspi_SpiMaster_initChannel | ( | IfxQspi_SpiMaster_Channel * | chHandle,
 |  | const IfxQspi_SpiMaster_ChannelConfig * | chConfig
 | ) |  |

Initializes the channel.

Parameters
chHandle | Module Channel handle
chConfig | Channel configuration structure
Returns
Status of Channel (busy or ok or failure)

Usage example: see How to use the SPI Master Interface driver?

  • Override the SLSO manually as general-purpose output

Definition at line 230 of file IfxQspi_SpiMaster.c.

◆ IfxQspi_SpiMaster_initChannelConfig()

IFX_EXTERN void IfxQspi_SpiMaster_initChannelConfig | ( | IfxQspi_SpiMaster_ChannelConfig * | chConfig,
 |  | IfxQspi_SpiMaster * | handle
 | ) |  |

Fills the config structure with default values.

Parameters
chConfig | Configuration structure which should be initialized.
handle | Module handle
Returns
None

Usage example: see How to use the SPI Master Interface driver?

Definition at line 325 of file IfxQspi_SpiMaster.c.


iLLD_TC38A: Support Functions

Functions
Support Functions
iLLD » QSPI » SPI Master Driver
Collaboration diagram for Support Functions:

Functions

IFX_STATIC void | IfxQspi_SpiMaster_activateSlso (IfxQspi_SpiMaster_Channel *chHandle)
Active the SLSO pin. More...
IFX_STATIC void | IfxQspi_SpiMaster_deactivateSlso (IfxQspi_SpiMaster_Channel *chHandle)
Deactive the SLSO pin. More...
IFX_STATIC SpiIf_Status | IfxQspi_SpiMaster_lock (IfxQspi_SpiMaster *handle)
Locks the transfer and gets the current status of it. More...
IFX_STATIC void | IfxQspi_SpiMaster_read (IfxQspi_SpiMaster_Channel *chHandle)
Reads data from the Rx FIFO. More...
IFX_STATIC void | IfxQspi_SpiMaster_unlock (IfxQspi_SpiMaster *handle)
Unlocks the transfers. More...
IFX_STATIC void | IfxQspi_SpiMaster_write (IfxQspi_SpiMaster_Channel *chHandle)
Writes data into the Tx FIFO. More...
IFX_STATIC void | IfxQspi_SpiMaster_writeLong (IfxQspi_SpiMaster_Channel *chHandle)
Writes Long/xxl data into the Tx FIFO. More...

Detailed Description

Function Documentation

◆ IfxQspi_SpiMaster_activateSlso()

IFX_STATIC void IfxQspi_SpiMaster_activateSlso ( IfxQspi_SpiMaster_Channel * chHandle )

Active the SLSO pin.

Parameters
chHandle Module Channel handle
Returns
None

Definition at line 120 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_initChannel().

◆ IfxQspi_SpiMaster_deactivateSlso()

IFX_STATIC void IfxQspi_SpiMaster_deactivateSlso ( IfxQspi_SpiMaster_Channel * chHandle )

Deactive the SLSO pin.

Parameters
chHandle Module Channel handle
Returns
None

Definition at line 133 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_initChannel().

◆ IfxQspi_SpiMaster_lock()

IFX_STATIC SpiIf_Status IfxQspi_SpiMaster_lock ( IfxQspi_SpiMaster * handle )

Locks the transfer and gets the current status of it.

Parameters
handle Module handle
Returns
SpiIf_Status_ok if sending is done otherwise SpiIf_Status_busy.

Definition at line 768 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_exchange().

◆ IfxQspi_SpiMaster_read()

IFX_STATIC void IfxQspi_SpiMaster_read ( IfxQspi_SpiMaster_Channel * chHandle )

Reads data from the Rx FIFO.

Parameters
chHandle Module Channel handle
Returns
None

Definition at line 856 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_initChannel().

◆ IfxQspi_SpiMaster_unlock()

IFX_STATIC void IfxQspi_SpiMaster_unlock ( IfxQspi_SpiMaster * handle )

Unlocks the transfers.

Parameters
handle Module handle
Returns
None

Definition at line 924 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_isrDmaReceive(), IfxQspi_SpiMaster_isrError(), and IfxQspi_SpiMaster_read().

◆ IfxQspi_SpiMaster_write()

IFX_STATIC void IfxQspi_SpiMaster_write ( IfxQspi_SpiMaster_Channel * chHandle )

Writes data into the Tx FIFO.

Parameters
chHandle Module Channel handle
Returns
None

Definition at line 930 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_initChannel().

◆ IfxQspi_SpiMaster_writeLong()

IFX_STATIC void IfxQspi_SpiMaster_writeLong ( IfxQspi_SpiMaster_Channel * chHandle )

Writes Long/xxl data into the Tx FIFO.

Parameters
chHandle Module Channel handle
Returns
None

Definition at line 1235 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_exchange().


iLLD_TC38A: Communication

Functions
Communication
iLLD » QSPI » SPI Master Driver
Collaboration diagram for Communication:

Functions

IFX_EXTERN SpiIf_Status | IfxQspi_SpiMaster_exchange (IfxQspi_SpiMaster_Channel *chHandle, const void *src, void *dest, Ifx_SizeT count)
Exchanges data between source and data. More...
IFX_EXTERN SpiIf_Status | IfxQspi_SpiMaster_getStatus (IfxQspi_SpiMaster_Channel *chHandle)
Gets the transmission status. More...

Detailed Description

Function Documentation

◆ IfxQspi_SpiMaster_exchange()

IFX_EXTERN SpiIf_Status IfxQspi_SpiMaster_exchange | ( | IfxQspi_SpiMaster_Channel * | chHandle,
 |  | const void * | src,
 |  | void * | dest,
 |  | Ifx_SizeT | count
 | ) |  |

Exchanges data between source and data.

Parameters
chHandle | Module Channel handle
src | Source of data. Can be set to NULL_PTR if nothing to transmit (receive only) - in this case, all-1 will be sent.
dest | Destination to which to be sent.Can be set to NULL_PTR if nothing to receive(transmit only).
count | Number of data in pending
Returns
Status of exchange of data

Usage example: see How to use the SPI Master Interface driver?

Definition at line 140 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_initModule().

◆ IfxQspi_SpiMaster_getStatus()

IFX_EXTERN SpiIf_Status IfxQspi_SpiMaster_getStatus ( IfxQspi_SpiMaster_Channel * chHandle )

Gets the transmission status.

Parameters
chHandle Module Channel handle
Returns
Transmission status

Usage example: see How to use the SPI Master Interface driver?

Definition at line 217 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_initModule().


iLLD_TC38A: Interrupt Functions

Functions
Interrupt Functions
iLLD » QSPI » SPI Master Driver
Collaboration diagram for Interrupt Functions:

Functions

IFX_EXTERN void | IfxQspi_SpiMaster_isrDmaReceive (IfxQspi_SpiMaster *qspiHandle)
Transmit interrupt handler. More...
IFX_EXTERN void | IfxQspi_SpiMaster_isrDmaTransmit (IfxQspi_SpiMaster *qspiHandle)
Transmit interrupt handler. More...
IFX_EXTERN void | IfxQspi_SpiMaster_isrError (IfxQspi_SpiMaster *handle)
Error Interrupt handler. More...
IFX_EXTERN IfxQspi_PhaseTransitionEvent | IfxQspi_SpiMaster_isrPhaseTransition (IfxQspi_SpiMaster *handle)
Phase Transition interrupt handler. More...
IFX_EXTERN void | IfxQspi_SpiMaster_isrReceive (IfxQspi_SpiMaster *handle)
Receive Interrupt handler. More...
IFX_EXTERN void | IfxQspi_SpiMaster_isrTransmit (IfxQspi_SpiMaster *handle)
Transmit interrupt handler. More...
IFX_EXTERN IfxQspi_PhaseTransitionEvent | IfxQspi_SpiMaster_isrUserDefined (IfxQspi_SpiMaster *handle)
User defined interrupt handler. More...

Detailed Description

Function Documentation

◆ IfxQspi_SpiMaster_isrDmaReceive()

IFX_EXTERN void IfxQspi_SpiMaster_isrDmaReceive ( IfxQspi_SpiMaster * qspiHandle )

Transmit interrupt handler.

Parameters
qspiHandle Module handle
Returns
None

Definition at line 572 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_initModule().

◆ IfxQspi_SpiMaster_isrDmaTransmit()

IFX_EXTERN void IfxQspi_SpiMaster_isrDmaTransmit ( IfxQspi_SpiMaster * qspiHandle )

Transmit interrupt handler.

Parameters
qspiHandle Module handle
Returns
None

Definition at line 593 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_initModule().

◆ IfxQspi_SpiMaster_isrError()

IFX_EXTERN void IfxQspi_SpiMaster_isrError ( IfxQspi_SpiMaster * handle )

Error Interrupt handler.

Parameters
handle Module handle
Returns
None

Definition at line 648 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_initModule().

◆ IfxQspi_SpiMaster_isrPhaseTransition()

IFX_EXTERN IfxQspi_PhaseTransitionEvent IfxQspi_SpiMaster_isrPhaseTransition ( IfxQspi_SpiMaster * handle )

Phase Transition interrupt handler.

Parameters
handle Module handle
Returns
Phase Transition Event

Definition at line 717 of file IfxQspi_SpiMaster.c.

◆ IfxQspi_SpiMaster_isrReceive()

IFX_EXTERN void IfxQspi_SpiMaster_isrReceive ( IfxQspi_SpiMaster * handle )

Receive Interrupt handler.

Parameters
handle Module handle
Returns
None

Definition at line 737 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_initModule().

◆ IfxQspi_SpiMaster_isrTransmit()

IFX_EXTERN void IfxQspi_SpiMaster_isrTransmit ( IfxQspi_SpiMaster * handle )

Transmit interrupt handler.

Parameters
handle Module handle
Returns
None

Definition at line 745 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_initModule().

◆ IfxQspi_SpiMaster_isrUserDefined()

IFX_EXTERN IfxQspi_PhaseTransitionEvent IfxQspi_SpiMaster_isrUserDefined ( IfxQspi_SpiMaster * handle )

User defined interrupt handler.

Parameters
handle Module handle
Returns
User Event

Definition at line 753 of file IfxQspi_SpiMaster.c.


iLLD_TC38A: Direct FIFO Access

Functions
Direct FIFO Access
iLLD » QSPI » SPI Master Driver
Collaboration diagram for Direct FIFO Access:

Functions

IFX_INLINE uint32 | IfxQspi_SpiMaster_readReceiveFifo (IfxQspi_SpiMaster *handle)
Reads data or status in RxFIFO. More...
IFX_INLINE void | IfxQspi_SpiMaster_writeBasicConfiguration (IfxQspi_SpiMaster *handle, uint32 baconVal)
Writes Basic configuration value to Tx FIFO. More...
IFX_INLINE void | IfxQspi_SpiMaster_writeExtendedConfiguration (IfxQspi_SpiMaster_Channel *chHandle, uint32 econVal)
Writes extended configuration of the channel. More...
IFX_INLINE void | IfxQspi_SpiMaster_writeMixedDataConfiguration (IfxQspi_SpiMaster *handle, uint32 mixEntryVal)
Writes data and configuration mixed value to Tx FIFO. More...
IFX_INLINE void | IfxQspi_SpiMaster_writeTransmitFifo (IfxQspi_SpiMaster_Channel *chHandle, uint32 data)
Writes the data to TxFIFO. More...
IFX_EXTERN void | IfxQspi_SpiMaster_packLongModeBuffer (IfxQspi_SpiMaster_Channel *chHandle, void *data, uint32 *longFifoBuffer, Ifx_SizeT dataLength)
pack data to Long mode buffer More...

Detailed Description

Function Documentation

◆ IfxQspi_SpiMaster_packLongModeBuffer()

IFX_EXTERN void IfxQspi_SpiMaster_packLongModeBuffer | ( | IfxQspi_SpiMaster_Channel * | chHandle,
 |  | void * | data,
 |  | uint32 * | longFifoBuffer,
 |  | Ifx_SizeT | dataLength
 | ) |  |

pack data to Long mode buffer

Parameters
chHandle | Module Channel handle
data | source Data buffer to be packed
longFifoBuffer | destination buffer for data and configuration
dataLength | size of data in source buffer (in bytes)
Returns
None

Definition at line 787 of file IfxQspi_SpiMaster.c.

◆ IfxQspi_SpiMaster_readReceiveFifo()

IFX_INLINE uint32 IfxQspi_SpiMaster_readReceiveFifo ( IfxQspi_SpiMaster * handle )

Reads data or status in RxFIFO.

Parameters
handle Module handle
Returns
Data or Status in RxFIFO

Definition at line 931 of file IfxQspi_SpiMaster.h.

◆ IfxQspi_SpiMaster_writeBasicConfiguration()

IFX_INLINE void IfxQspi_SpiMaster_writeBasicConfiguration | ( | IfxQspi_SpiMaster * | handle,
 |  | uint32 | baconVal
 | ) |  |

Writes Basic configuration value to Tx FIFO.

Parameters
handle | Module handle
baconVal | Basic configuration value to be entered in TxFIFO
Returns
None

Definition at line 939 of file IfxQspi_SpiMaster.h.

◆ IfxQspi_SpiMaster_writeExtendedConfiguration()

IFX_INLINE void IfxQspi_SpiMaster_writeExtendedConfiguration | ( | IfxQspi_SpiMaster_Channel * | chHandle,
 |  | uint32 | econVal
 | ) |  |

Writes extended configuration of the channel.

Parameters
chHandle | Module Channel handle
econVal | Channel Timing configuration value
Returns
None

Definition at line 946 of file IfxQspi_SpiMaster.h.

◆ IfxQspi_SpiMaster_writeMixedDataConfiguration()

IFX_INLINE void IfxQspi_SpiMaster_writeMixedDataConfiguration | ( | IfxQspi_SpiMaster * | handle,
 |  | uint32 | mixEntryVal
 | ) |  |

Writes data and configuration mixed value to Tx FIFO.

Parameters
handle | Module handle
mixEntryVal | Mixed of Data and configuration
Returns
None

Definition at line 953 of file IfxQspi_SpiMaster.h.

◆ IfxQspi_SpiMaster_writeTransmitFifo()

IFX_INLINE void IfxQspi_SpiMaster_writeTransmitFifo | ( | IfxQspi_SpiMaster_Channel * | chHandle,
 |  | uint32 | data
 | ) |  |

Writes the data to TxFIFO.

Parameters
chHandle | Module Channel handle
data | Data to be entered in Tx FIFO
Returns
None

Definition at line 960 of file IfxQspi_SpiMaster.h.


iLLD_TC38A: How to use the SPI Slave Interface driver?

How to use the SPI Slave Interface driver?
iLLD » QSPI
Collaboration diagram for How to use the SPI Slave Interface driver?:

The SPI Slave interface driver provides a default QSPI configuration for a bidirectional serial communication of data words.

Data transactions are buffered by the hardware based FIFOs. Incoming and outgoing data is transfered in background from/to the QSPI peripheral by interrupt service handlers, which are part of this driver as well. This allows a nonblocking communication without stalling the thread(s) from where data is sent and received. Optionally Dma can be used for data transfers. Only the interrupt configuration and Module initialisation are different when dma is used.

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Qspi/SpiSlave/IfxQspi_SpiSlave.h>

Variables

Declare QSPI module handle:

IfxQspi_SpiSlave spi;

In addition, declare global transmit and receive buffers for the data transfers:

#define SPI_BUFFER_SIZE 8
uint8 spiTxBuffer[SPI_BUFFER_SIZE];
uint8 spiRxBuffer[SPI_BUFFER_SIZE];

Interrupt Handler Installation (without dma use)

See also How to define Interrupts?

Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:

// priorities are normally defined in Ifx_IntPrioDef.h
#define IFX_INTPRIO_QSPI2_TX 1
#define IFX_INTPRIO_QSPI2_RX 2
#define IFX_INTPRIO_QSPI2_ER 5

Add the interrupt service routines to your C code. They have to call the QSPI interrupt handlers by passing the spi handle:

IFX_INTERRUPT(qspi2TxISR, 0, IFX_INTPRIO_QSPI2_TX)
{
IfxQspi_SpiSlave_isrTransmit(&spi);
}
IFX_INTERRUPT(qspi2RxISR, 0, IFX_INTPRIO_QSPI2_RX)
{
IfxQspi_SpiSlave_isrReceive(&spi);
}
IFX_INTERRUPT(qspi2ErISR, 0, IFX_INTPRIO_QSPI2_ER)
{
IfxQspi_SpiSlave_isrError(&spi);
// Process errors. Eg: parity Error is checked below
if( spi.errorFlags.parityError == 1)
{
// Parity Error
}
}

Finally install the interrupt handlers in your initialisation function:

// install interrupt handlers
IfxCpu_Irq_installInterruptHandler(&qspi2TxISR, IFX_INTPRIO_QSPI2_TX);
IfxCpu_Irq_installInterruptHandler(&qspi2RxISR, IFX_INTPRIO_QSPI2_RX);
IfxCpu_Irq_installInterruptHandler(&qspi2ErISR, IFX_INTPRIO_QSPI2_ER);
IfxCpu_enableInterrupts();

Interrupt Handler Installation (with dma use)

See also How to define Interrupts?

Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:

// priorities are normally defined in Ifx_IntPrioDef.h
// qspi priorities
#define IFX_INTPRIO_QSPI2_TX 3 // DMA channel 3
#define IFX_INTPRIO_QSPI2_RX 4 // DMA channel 4
#define IFX_INTPRIO_QSPI2_ER 0x31
// dma priorities
#define IFX_INTPRIO_DMA_CH3 12
#define IFX_INTPRIO_DMA_CH4 13

Add the interrupt service routines to your C code. They have to call the QSPI interrupt handlers by passing the spi handle:

IFX_INTERRUPT(qspi2DmaTxISR, 0, IFX_INTPRIO_DMA_CH3)
{
IfxQspi_SpiSlave_isrDmaTransmit(&spi);
}
IFX_INTERRUPT(qspi2DmaRxISR, 0, IFX_INTPRIO_DMA_CH4)
{
IfxQspi_SpiSlave_isrDmaReceive(&spi);
}
IFX_INTERRUPT(qspi2ErISR, 0, IFX_INTPRIO_QSPI2_ER)
{
IfxQspi_SpiSlave_isrError(&spi);
// Process errors. Eg: parity Error is checked below
if( spi.errorFlags.parityError == 1)
{
// Parity Error
}
}

Finally install the interrupt handlers in your initialisation function:

// install interrupt handlers
IfxCpu_Irq_installInterruptHandler(&qspi2DmaTxISR, IFX_INTPRIO_DMA_CH3);
IfxCpu_Irq_installInterruptHandler(&qspi2DmaRxISR, IFX_INTPRIO_DMA_CH4);
IfxCpu_Irq_installInterruptHandler(&qspi2ErISR, IFX_INTPRIO_QSPI2_ER);
IfxCpu_enableInterrupts();

Module Initialisation (without dma use)

The module initialisation can be done in the same function.

Here an example for slave mode:

// create module config
IfxQspi_SpiSlave_Config spiSlaveConfig;
IfxQspi_SpiSlave_initModuleConfig(&spiSlaveConfig, &MODULE_QSPI2);
// set the maximum baudrate
spiSlaveConfig.base.maximumBaudrate = 10000000;
// ISR priorities and interrupt target
spiSlaveConfig.base.txPriority = IFX_INTPRIO_QSPI2_TX;
spiSlaveConfig.base.rxPriority = IFX_INTPRIO_QSPI2_RX;
spiSlaveConfig.base.erPriority = IFX_INTPRIO_QSPI2_ER;
spiSlaveConfig.base.isrProvider = IfxCpu_Irq_getTos(IfxCpu_getCoreIndex());
// pin configuration
const IfxQspi_SpiSlave_Pins slavePins = {
&IfxQspi2_SCLKA_P15_3_IN, IfxPort_InputMode_pullDown, // SCLK Pin
&IfxQspi2_MTSRA_P15_5_IN, IfxPort_InputMode_pullDown, // MTSR Pin
&IfxQspi2_MRST_P15_7_OUT, IfxPort_OutputMode_pushPull, // MRST Pin
&IfxQspi2_SLSIA_P15_2_IN, IfxPort_InputMode_pullDown, // SLSI Pin
IfxPort_PadDriver_cmosAutomotiveSpeed3 // pad driver mode
};
spiSlaveConfig.pins = &slavePins;
// initialize module
//IfxQspi_Spi spi; // defined globally
IfxQspi_SpiSlave_initModule(&spi, &spiSlaveConfig);

Module Initialisation (with dma use)

The module initialisation can be done in the same function.

Here an example for slave mode:

// create module config
IfxQspi_SpiSlave_Config spiSlaveConfig;
IfxQspi_SpiSlave_initModuleConfig(&spiSlaveConfig, &MODULE_QSPI2);
// set the maximum baudrate
spiSlaveConfig.base.maximumBaudrate = 10000000;
// ISR priorities and interrupt target (with dma usage)
spiSlaveConfig.base.txPriority = IFX_INTPRIO_DMA_CH3;
spiSlaveConfig.base.rxPriority = IFX_INTPRIO_DMA_CH4;
spiSlaveConfig.base.erPriority = IFX_INTPRIO_QSPI2_ER;
spiSlaveConfig.dma.txDmaChannelId = IfxDma_ChannelId_3;
spiSlaveConfig.dma.rxDmaChannelId = IfxDma_ChannelId_4;
spiSlaveConfig.dma.useDma = 1;
// pin configuration
const IfxQspi_SpiSlave_Pins slavePins = {
&IfxQspi2_SCLKA_P15_3_IN, IfxPort_InputMode_pullDown, // SCLK Pin
&IfxQspi2_MTSRA_P15_5_IN, IfxPort_InputMode_pullDown, // MTSR Pin
&IfxQspi2_MRST_P15_7_OUT, IfxPort_OutputMode_pushPull, // MRST Pin
&IfxQspi2_SLSIA_P15_2_IN, IfxPort_InputMode_pullDown, // SLSI Pin
IfxPort_PadDriver_cmosAutomotiveSpeed3 // pad driver mode
};
spiSlaveConfig.pins = &slavePins;
// initialize module
//IfxQspi_Spi spi; // defined globally
IfxQspi_SpiSlave_initModule(&spi, &spiSlaveConfig);

The QSPI is ready for use now!

Data Transfers

In following examples we assume, that following buffers are declared globally:

// declared somewhere globally
#define SPI_BUFFER_SIZE 8
uint8 spiTxBuffer[SPI_BUFFER_SIZE] = { 1, 2, 3, 4, 5, 6, 7, 8 };
uint8 spiRxBuffer[SPI_BUFFER_SIZE] = { 0, 0, 0, 0, 0, 0, 0, 0 };

Sending and Receiving a data stream:

int i = 0;
// wait until transfer of previous data stream is finished
while( IfxQspi_SpiSlave_getStatus(&spi) == SpiIf_Status_busy );
// send/receive new stream
IfxQspi_SpiSlave_exchange(&spi, &spiTxBuffer[i], &spiRxBuffer[i], SPI_BUFFER_SIZE);

Send only, discard received data:

// wait until transfer of previous data stream is finished
while( IfxQspi_SpiSlave_getStatus(&spi) == SpiIf_Status_busy );
// send new stream
IfxQspi_SpiSlave_exchange(&spi, &spiTxBuffer[i], NULL_PTR, SPI_BUFFER_SIZE);

Receive only, send all-1

// wait until transfer of previous data stream is finished
while( IfxQspi_SpiSlave_getStatus(&spi) == SpiIf_Status_busy );
// receive new stream
IfxQspi_SpiSlave_exchange(&spi, NULL_PTR, &spiRxBuffer[i], SPI_BUFFER_SIZE);


iLLD_TC38A: SPI Slave Driver

Modules
SPI Slave Driver
iLLD » QSPI
Collaboration diagram for SPI Slave Driver:

Modules

Data Structures
Module Functions
Support Functions
Communication
Interrupt Functions
Direct FIFO Access

Detailed Description


iLLD_TC38A: Data Structures

Data Structures | Variables
Data Structures
iLLD » QSPI » SPI Slave Driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxQspi_SpiSlave_Dma
Dma handle. More...
struct | IfxQspi_SpiSlave_DmaConfig
Dma configuration. More...
struct | IfxQspi_SpiSlave_ErrorFlags
Qspi Slave Mode Error Flags. More...
struct | IfxQspi_SpiSlave_Pins
Slave pin IO configuration structure. More...
struct | IfxQspi_SpiSlave_Protocol
Configures the SPI Protocol. More...
struct | IfxQspi_SpiSlave
Module handle data structure. More...
struct | IfxQspi_SpiSlave_Config
Module configuration structure. More...

Variables

IFX_STATIC uint32 | IfxQspi_SpiSlave_dummyRxValue = 0
dummy variable where recived data is placed More...
IFX_STATIC IFX_CONST uint32 | IfxQspi_SpiSlave_dummyTxValue = ~0
dummy value to be transmitted More...

Detailed Description

Data Structure Documentation

◆ IfxQspi_SpiSlave_Dma

struct IfxQspi_SpiSlave_Dma

Dma handle.

Definition at line 319 of file IfxQspi_SpiSlave.h.

Collaboration diagram for IfxQspi_SpiSlave_Dma:
[legend]
Data Fields
IfxDma_Dma_Channel | rxDmaChannel | receive DMA channel handle
IfxDma_ChannelId | rxDmaChannelId | DMA channel no for the Spi recieve.
IfxDma_Dma_Channel | txDmaChannel | transmit DMA channel handle
IfxDma_ChannelId | txDmaChannelId | DMA channel no for the Spi transmit.
boolean | useDma | use Dma for Data transfers

◆ IfxQspi_SpiSlave_DmaConfig

struct IfxQspi_SpiSlave_DmaConfig

Dma configuration.

Definition at line 330 of file IfxQspi_SpiSlave.h.

Data Fields
IfxDma_ChannelId | rxDmaChannelId | DMA channel no for the Spi receive.
IfxDma_ChannelId | txDmaChannelId | DMA channel no for the Spi transmit.
boolean | useDma | use Dma for Data transfers

◆ IfxQspi_SpiSlave_ErrorFlags

struct IfxQspi_SpiSlave_ErrorFlags

Qspi Slave Mode Error Flags.

Definition at line 339 of file IfxQspi_SpiSlave.h.

Data Fields
uint16 | baudrateError: 1 | [2:2] baudrate Error
uint16 | configurationError: 1 | [1:1] Configuration Error
uint16 | expectTimeoutError: 1 | [7:7] Expect Timeout Error
uint16 | parityError: 1 | [0:0] Parity Error
uint16 | rxFifoOverflowError: 1 | [5:5] RxFifo Overflow Error
uint16 | rxFifoUnderflowError: 1 | [6:6] RxFifo underflow Error
uint16 | slsiMisplacedInactivation: 1 | [8:8] SLSI misplaced inactivation (slave mode)
uint16 | txFifoOverflowError: 1 | [3:3] TxFifo Overflow Error
uint16 | txFifoUnderflowError: 1 | [4:4] TxFifo underflow Error

◆ IfxQspi_SpiSlave_Pins

struct IfxQspi_SpiSlave_Pins

Slave pin IO configuration structure.

Definition at line 354 of file IfxQspi_SpiSlave.h.

Collaboration diagram for IfxQspi_SpiSlave_Pins:
[legend]
Data Fields
IFX_CONST IfxQspi_Mrst_Out * | mrst | Pointer to MRST out pin.
IfxPort_OutputMode | mrstMode | The MRST pin output mode.
IFX_CONST IfxQspi_Mtsr_In * | mtsr | Pointer to MTSR in pin.
IfxPort_InputMode | mtsrMode | The MTSR pin input mode.
IfxPort_PadDriver | pinDriver | The pad driver mode which should be configured.
IFX_CONST IfxQspi_Sclk_In * | sclk | Pointer to SLCK in pin.
IfxPort_InputMode | sclkMode | The SCLK pin input mode.
IFX_CONST IfxQspi_Slsi_In * | slsi | Pointer to SLSI in pin.
IfxPort_InputMode | slsiMode | The SLSI pin input mode.

◆ IfxQspi_SpiSlave_Protocol

struct IfxQspi_SpiSlave_Protocol

Configures the SPI Protocol.

Definition at line 369 of file IfxQspi_SpiSlave.h.

Data Fields
SpiIf_ClockPolarity | clockPolarity | Specifies the clock polarity.
SpiIf_DataHeading | dataHeading | Specifies MSB or LSB first.
uint8 | dataWidth | range 2 .. 32 bits (note 2 = 2-bits, 3 = 3-bits ...
Ifx_ParityMode | parityMode | Specifies the parity mode.
SpiIf_ShiftClock | shiftClock | Specifies the clock phase.

◆ IfxQspi_SpiSlave

struct IfxQspi_SpiSlave

Module handle data structure.

Definition at line 384 of file IfxQspi_SpiSlave.h.

Collaboration diagram for IfxQspi_SpiSlave:
[legend]
Data Fields
SpiIf | base | Module SPI interface handle.
uint8 | dataWidth | Number of bits which will be written into the FIFO.
IfxQspi_SpiSlave_Dma | dma | Dma handle.
IfxQspi_SpiSlave_ErrorFlags | errorFlags | Spi Slave Error Flags.
boolean | onTransfer | set to TRUE during ongoing transfer
Ifx_QSPI * | qspi | Pointer to QSPI module registers.
SpiIf_Job | rxJob | Rx Stream which has been received.
SpiIf_Job | txJob | Tx Stream which should be sent.

◆ IfxQspi_SpiSlave_Config

struct IfxQspi_SpiSlave_Config

Module configuration structure.

Definition at line 398 of file IfxQspi_SpiSlave.h.

Collaboration diagram for IfxQspi_SpiSlave_Config:
[legend]
Data Fields
boolean | allowSleepMode | Specifies module sleep mode.
SpiIf_Config | base | SPI interface configuration structure.
IfxQspi_SpiSlave_DmaConfig | dma | Dma configuration.
boolean | pauseOnBaudrateSpikeErrors | Specifies module pause on baudrate or spike errors.
IfxQspi_PauseRunTransition | pauseRunTransition | Specifies module run or pause mode.
IFX_CONST IfxQspi_SpiSlave_Pins * | pins | structure for QSPI Slave pins
IfxQspi_SpiSlave_Protocol | protocol |
Ifx_QSPI * | qspi | Pointer to QSPI module registers.
IfxQspi_FifoMode | rxFifoMode | Specifies the receive FIFO mode.
IfxQspi_RxFifoInt | rxFifoThreshold | Specifies the RXFIFO interrupt threshold.
IfxQspi_FifoMode | txFifoMode | Specifies the transfer FIFO mode.
IfxQspi_TxFifoInt | txFifoThreshold | Specifies the TXFIFO interrupt threshold.

Variable Documentation

◆ IfxQspi_SpiSlave_dummyRxValue

IFX_STATIC uint32 IfxQspi_SpiSlave_dummyRxValue = 0

dummy variable where recived data is placed

Definition at line 80 of file IfxQspi_SpiSlave.c.

Referenced by IfxQspi_SpiSlave_write().

◆ IfxQspi_SpiSlave_dummyTxValue

IFX_STATIC IFX_CONST uint32 IfxQspi_SpiSlave_dummyTxValue = ~0

dummy value to be transmitted

Definition at line 84 of file IfxQspi_SpiSlave.c.

Referenced by IfxQspi_SpiSlave_write().


iLLD_TC38A: Module Functions

Functions
Module Functions
iLLD » QSPI » SPI Slave Driver
Collaboration diagram for Module Functions:

Functions

IFX_EXTERN void | IfxQspi_SpiSlave_initModule (IfxQspi_SpiSlave *handle, const IfxQspi_SpiSlave_Config *config)
Initialises the module. More...
IFX_EXTERN void | IfxQspi_SpiSlave_initModuleConfig (IfxQspi_SpiSlave_Config *config, Ifx_QSPI *qspi)
Fills the config structure with default values. More...

Detailed Description

Function Documentation

◆ IfxQspi_SpiSlave_initModule()

IFX_EXTERN void IfxQspi_SpiSlave_initModule | ( | IfxQspi_SpiSlave * | handle,
 |  | const IfxQspi_SpiSlave_Config * | config
 | ) |  |

Initialises the module.

Parameters
handle | Module handle
config | Predefined configuration structure of the module
Returns
None

Usage example: see How to use the SPI Slave Interface driver?

Definition at line 126 of file IfxQspi_SpiSlave.c.

◆ IfxQspi_SpiSlave_initModuleConfig()

IFX_EXTERN void IfxQspi_SpiSlave_initModuleConfig | ( | IfxQspi_SpiSlave_Config * | config,
 |  | Ifx_QSPI * | qspi
 | ) |  |

Fills the config structure with default values.

Parameters
config | Configuration structure which should be initialized.
qspi | pointer to QSPI registers
Returns
None

Usage example: see How to use the SPI Slave Interface driver?

Definition at line 353 of file IfxQspi_SpiSlave.c.


iLLD_TC38A: Support Functions

Functions
Support Functions
iLLD » QSPI » SPI Slave Driver
Collaboration diagram for Support Functions:

Functions

IFX_STATIC void | IfxQspi_SpiSlave_read (IfxQspi_SpiSlave *handle)
Reads data from the Rx FIFO. More...
IFX_STATIC void | IfxQspi_SpiSlave_write (IfxQspi_SpiSlave *handle)
Writes data into the Tx FIFO. More...

Detailed Description

Function Documentation

◆ IfxQspi_SpiSlave_read()

IFX_STATIC void IfxQspi_SpiSlave_read ( IfxQspi_SpiSlave * handle )

Reads data from the Rx FIFO.

Parameters
handle Module handle
Returns
None

Definition at line 485 of file IfxQspi_SpiSlave.c.

Referenced by IfxQspi_SpiSlave_isrReceive().

◆ IfxQspi_SpiSlave_write()

IFX_STATIC void IfxQspi_SpiSlave_write ( IfxQspi_SpiSlave * handle )

Writes data into the Tx FIFO.

Parameters
handle Module handle
Returns
None

Definition at line 530 of file IfxQspi_SpiSlave.c.

Referenced by IfxQspi_SpiSlave_exchange(), and IfxQspi_SpiSlave_isrTransmit().


iLLD_TC38A: Communication

Functions
Communication
iLLD » QSPI » SPI Slave Driver
Collaboration diagram for Communication:

Functions

IFX_EXTERN SpiIf_Status | IfxQspi_SpiSlave_exchange (IfxQspi_SpiSlave *handle, const void *src, void *dest, Ifx_SizeT count)
Exchanges data between source and data. More...
IFX_EXTERN SpiIf_Status | IfxQspi_SpiSlave_getStatus (IfxQspi_SpiSlave *handle)
Gets the transmission status. More...

Detailed Description

Function Documentation

◆ IfxQspi_SpiSlave_exchange()

IFX_EXTERN SpiIf_Status IfxQspi_SpiSlave_exchange | ( | IfxQspi_SpiSlave * | handle,
 |  | const void * | src,
 |  | void * | dest,
 |  | Ifx_SizeT | count
 | ) |  |

Exchanges data between source and data.

Parameters
handle | Module handle
src | Source of data. Can be set to NULL_PTR if nothing to receive (transmit only)
dest | Destination to which to be sent. Can be set to NULL_PTR if nothing to transmit (receive only) - in this case, all-1 will be sent.
count | Number of data in pending
Returns
Status of exchange of data

Usage example: see How to use the SPI Slave Interface driver?

Definition at line 92 of file IfxQspi_SpiSlave.c.

◆ IfxQspi_SpiSlave_getStatus()

IFX_EXTERN SpiIf_Status IfxQspi_SpiSlave_getStatus ( IfxQspi_SpiSlave * handle )

Gets the transmission status.

Parameters
handle Module handle
Returns
Transmission status

Usage example: see How to use the SPI Slave Interface driver?

Definition at line 113 of file IfxQspi_SpiSlave.c.


iLLD_TC38A: Interrupt Functions

Functions
Interrupt Functions
iLLD » QSPI » SPI Slave Driver
Collaboration diagram for Interrupt Functions:

Functions

IFX_EXTERN void | IfxQspi_SpiSlave_isrDmaReceive (IfxQspi_SpiSlave *qspiHandle)
Dma receive interrupt handler. More...
IFX_EXTERN void | IfxQspi_SpiSlave_isrDmaTransmit (IfxQspi_SpiSlave *qspiHandle)
Transmit interrupt handler. More...
IFX_EXTERN void | IfxQspi_SpiSlave_isrError (IfxQspi_SpiSlave *handle)
Error Interrupt handler. More...
IFX_EXTERN void | IfxQspi_SpiSlave_isrReceive (IfxQspi_SpiSlave *handle)
Receive Interrupt handler. More...
IFX_EXTERN void | IfxQspi_SpiSlave_isrTransmit (IfxQspi_SpiSlave *handle)
Transmit interrupt handler. More...

Detailed Description

Function Documentation

◆ IfxQspi_SpiSlave_isrDmaReceive()

IFX_EXTERN void IfxQspi_SpiSlave_isrDmaReceive ( IfxQspi_SpiSlave * qspiHandle )

Dma receive interrupt handler.

Parameters
qspiHandle Module handle
Returns
None

Definition at line 382 of file IfxQspi_SpiSlave.c.

◆ IfxQspi_SpiSlave_isrDmaTransmit()

IFX_EXTERN void IfxQspi_SpiSlave_isrDmaTransmit ( IfxQspi_SpiSlave * qspiHandle )

Transmit interrupt handler.

Parameters
qspiHandle Module handle
Returns
None

Definition at line 396 of file IfxQspi_SpiSlave.c.

◆ IfxQspi_SpiSlave_isrError()

IFX_EXTERN void IfxQspi_SpiSlave_isrError ( IfxQspi_SpiSlave * handle )

Error Interrupt handler.

Parameters
handle Module handle
Returns
None

Definition at line 406 of file IfxQspi_SpiSlave.c.

◆ IfxQspi_SpiSlave_isrReceive()

IFX_EXTERN void IfxQspi_SpiSlave_isrReceive ( IfxQspi_SpiSlave * handle )

Receive Interrupt handler.

Parameters
handle Module handle
Returns
None

Definition at line 473 of file IfxQspi_SpiSlave.c.

◆ IfxQspi_SpiSlave_isrTransmit()

IFX_EXTERN void IfxQspi_SpiSlave_isrTransmit ( IfxQspi_SpiSlave * handle )

Transmit interrupt handler.

Parameters
handle Module handle
Returns
None

Definition at line 479 of file IfxQspi_SpiSlave.c.


iLLD_TC38A: Direct FIFO Access

Functions
Direct FIFO Access
iLLD » QSPI » SPI Slave Driver
Collaboration diagram for Direct FIFO Access:

Functions

IFX_INLINE uint32 | IfxQspi_SpiSlave_readReceiveFifo (IfxQspi_SpiSlave *handle)
Reads data or status in RxFIFO. More...
IFX_INLINE void | IfxQspi_SpiSlave_writeTransmitFifo (IfxQspi_SpiSlave *handle, uint32 data)
Writes the data to TxFIFO. More...

Detailed Description

Function Documentation

◆ IfxQspi_SpiSlave_readReceiveFifo()

IFX_INLINE uint32 IfxQspi_SpiSlave_readReceiveFifo ( IfxQspi_SpiSlave * handle )

Reads data or status in RxFIFO.

Parameters
handle QSpi Slave handle
Returns
Data or Status in RxFIFO

Definition at line 540 of file IfxQspi_SpiSlave.h.

◆ IfxQspi_SpiSlave_writeTransmitFifo()

IFX_INLINE void IfxQspi_SpiSlave_writeTransmitFifo | ( | IfxQspi_SpiSlave * | handle,
 |  | uint32 | data
 | ) |  |

Writes the data to TxFIFO.

Parameters
handle | QSpi slave handle
data | Data to be entered in Tx FIFO
Returns
None

Definition at line 548 of file IfxQspi_SpiSlave.h.


iLLD_TC38A: IfxQspi_cfg.h File Reference

  • _Impl
Macros | Enumerations | Variables
IfxQspi_cfg.h File Reference
iLLD » QSPI

QSPI on-chip implementation data. More...

#include "Cpu/Std/Ifx_Types.h"
#include "IfxQspi_reg.h"
Include dependency graph for IfxQspi_cfg.h:

Go to the source code of this file.

Macros

#define | IFXQSPI_HWFIFO_DEPTH (4)
#define | IFXQSPI_NUM_MODULES (5)
#define | IFXQSPI_NUM_CHANNELS (16)

Enumerations

enum IfxQspi_Index {
IfxQspi_Index_none = -1,
IfxQspi_Index_0 = 0,
IfxQspi_Index_1,
IfxQspi_Index_2,
IfxQspi_Index_3,
IfxQspi_Index_4
}
List of the available QSPI resources. More...

Variables

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxQspi_cfg_indexMap [IFXQSPI_NUM_MODULES]

Detailed Description

QSPI on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxQspi_cfg.h.

Macro Definition Documentation

◆ IFXQSPI_HWFIFO_DEPTH

#define IFXQSPI_HWFIFO_DEPTH (4)

Definition at line 67 of file IfxQspi_cfg.h.

Referenced by IfxQspi_SpiMaster_write(), and IfxQspi_SpiSlave_write().

◆ IFXQSPI_NUM_CHANNELS

#define IFXQSPI_NUM_CHANNELS (16)

Definition at line 71 of file IfxQspi_cfg.h.

◆ IFXQSPI_NUM_MODULES

#define IFXQSPI_NUM_MODULES (5)

Definition at line 69 of file IfxQspi_cfg.h.

Referenced by IfxQspi_getAddress(), and IfxQspi_getIndex().

Enumeration Type Documentation

◆ IfxQspi_Index

enum IfxQspi_Index

List of the available QSPI resources.

Enumerator
IfxQspi_Index_none | Not Selected.
IfxQspi_Index_0 | QSPI index 0.
IfxQspi_Index_1 | QSPI index 1.
IfxQspi_Index_2 | QSPI index 2.
IfxQspi_Index_3 | QSPI index 3.
IfxQspi_Index_4 | QSPI index 4.

Definition at line 79 of file IfxQspi_cfg.h.

Variable Documentation

◆ IfxQspi_cfg_indexMap

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxQspi_cfg_indexMap[IFXQSPI_NUM_MODULES]

Definition at line 92 of file IfxQspi_cfg.h.


iLLD_TC38A: IfxQspi_PinMap.c File Reference

  • _PinMap
Variables
IfxQspi_PinMap.c File Reference
iLLD » QSPI

QSPI I/O map. More...

#include "IfxQspi_PinMap.h"
Include dependency graph for IfxQspi_PinMap.c:

Go to the source code of this file.

Variables

IfxQspi_Mrst_In | IfxQspi0_MRSTA_P20_12_IN = {&MODULE_QSPI0, {&MODULE_P20,12}, Ifx_RxSel_a}
IfxQspi_Mrst_In | IfxQspi0_MRSTB_P22_9_IN = {&MODULE_QSPI0, {&MODULE_P22, 9}, Ifx_RxSel_b}
IfxQspi_Mrst_In | IfxQspi0_MRSTC_P22_6_IN = {&MODULE_QSPI0, {&MODULE_P22, 6}, Ifx_RxSel_c}
IfxQspi_Mrst_In | IfxQspi1_MRSTA_P10_1_IN = {&MODULE_QSPI1, {&MODULE_P10, 1}, Ifx_RxSel_a}
IfxQspi_Mrst_In | IfxQspi1_MRSTB_P11_3_IN = {&MODULE_QSPI1, {&MODULE_P11, 3}, Ifx_RxSel_b}
IfxQspi_Mrst_In | IfxQspi2_MRSTA_P15_4_IN = {&MODULE_QSPI2, {&MODULE_P15, 4}, Ifx_RxSel_a}
IfxQspi_Mrst_In | IfxQspi2_MRSTB_P15_7_IN = {&MODULE_QSPI2, {&MODULE_P15, 7}, Ifx_RxSel_b}
IfxQspi_Mrst_In | IfxQspi2_MRSTCN_P21_2_IN = {&MODULE_QSPI2, {&MODULE_P21, 2}, Ifx_RxSel_c}
IfxQspi_Mrst_In | IfxQspi2_MRSTCP_P21_3_IN = {&MODULE_QSPI2, {&MODULE_P21, 3}, Ifx_RxSel_c}
IfxQspi_Mrst_In | IfxQspi2_MRSTD_P34_4_IN = {&MODULE_QSPI2, {&MODULE_P34, 4}, Ifx_RxSel_d}
IfxQspi_Mrst_In | IfxQspi2_MRSTE_P15_2_IN = {&MODULE_QSPI2, {&MODULE_P15, 2}, Ifx_RxSel_e}
IfxQspi_Mrst_In | IfxQspi2_MRSTFN_P14_9_IN = {&MODULE_QSPI2, {&MODULE_P14, 9}, Ifx_RxSel_f}
IfxQspi_Mrst_In | IfxQspi2_MRSTFP_P14_10_IN = {&MODULE_QSPI2, {&MODULE_P14,10}, Ifx_RxSel_f}
IfxQspi_Mrst_In | IfxQspi3_MRSTA_P02_5_IN = {&MODULE_QSPI3, {&MODULE_P02, 5}, Ifx_RxSel_a}
IfxQspi_Mrst_In | IfxQspi3_MRSTB_P10_7_IN = {&MODULE_QSPI3, {&MODULE_P10, 7}, Ifx_RxSel_b}
IfxQspi_Mrst_In | IfxQspi3_MRSTC_P01_5_IN = {&MODULE_QSPI3, {&MODULE_P01, 5}, Ifx_RxSel_c}
IfxQspi_Mrst_In | IfxQspi4_MRSTA_P33_13_IN = {&MODULE_QSPI4, {&MODULE_P33,13}, Ifx_RxSel_a}
IfxQspi_Mrst_In | IfxQspi4_MRSTB_P22_1_IN = {&MODULE_QSPI4, {&MODULE_P22, 1}, Ifx_RxSel_b}
IfxQspi_Mrst_In | IfxQspi4_MRSTCN_P21_2_IN = {&MODULE_QSPI4, {&MODULE_P21, 2}, Ifx_RxSel_c}
IfxQspi_Mrst_In | IfxQspi4_MRSTCP_P21_3_IN = {&MODULE_QSPI4, {&MODULE_P21, 3}, Ifx_RxSel_c}
IfxQspi_Mrst_In | IfxQspi4_MRSTDN_P21_0_IN = {&MODULE_QSPI4, {&MODULE_P21, 0}, Ifx_RxSel_d}
IfxQspi_Mrst_In | IfxQspi4_MRSTDP_P21_1_IN = {&MODULE_QSPI4, {&MODULE_P21, 1}, Ifx_RxSel_d}
IfxQspi_Mrst_Out | IfxQspi0_MRST_P20_12_OUT = {&MODULE_QSPI0, {&MODULE_P20,12}, IfxPort_OutputIdx_alt3}
IfxQspi_Mrst_Out | IfxQspi0_MRST_P22_6_OUT = {&MODULE_QSPI0, {&MODULE_P22, 6}, IfxPort_OutputIdx_alt4}
IfxQspi_Mrst_Out | IfxQspi0_MRST_P22_9_OUT = {&MODULE_QSPI0, {&MODULE_P22, 9}, IfxPort_OutputIdx_alt4}
IfxQspi_Mrst_Out | IfxQspi1_MRST_P10_1_OUT = {&MODULE_QSPI1, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt3}
IfxQspi_Mrst_Out | IfxQspi1_MRST_P10_6_OUT = {&MODULE_QSPI1, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt6}
IfxQspi_Mrst_Out | IfxQspi1_MRST_P11_3_OUT = {&MODULE_QSPI1, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt3}
IfxQspi_Mrst_Out | IfxQspi2_MRST_P15_4_OUT = {&MODULE_QSPI2, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt3}
IfxQspi_Mrst_Out | IfxQspi2_MRST_P15_7_OUT = {&MODULE_QSPI2, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt3}
IfxQspi_Mrst_Out | IfxQspi2_MRST_P34_4_OUT = {&MODULE_QSPI2, {&MODULE_P34, 4}, IfxPort_OutputIdx_alt4}
IfxQspi_Mrst_Out | IfxQspi3_MRST_P01_5_OUT = {&MODULE_QSPI3, {&MODULE_P01, 5}, IfxPort_OutputIdx_alt4}
IfxQspi_Mrst_Out | IfxQspi3_MRST_P02_5_OUT = {&MODULE_QSPI3, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt3}
IfxQspi_Mrst_Out | IfxQspi3_MRST_P10_7_OUT = {&MODULE_QSPI3, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt3}
IfxQspi_Mrst_Out | IfxQspi4_MRST_P22_1_OUT = {&MODULE_QSPI4, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt3}
IfxQspi_Mrst_Out | IfxQspi4_MRST_P33_13_OUT = {&MODULE_QSPI4, {&MODULE_P33,13}, IfxPort_OutputIdx_alt3}
IfxQspi_Mtsr_In | IfxQspi0_MTSRA_P20_14_IN = {&MODULE_QSPI0, {&MODULE_P20,14}, Ifx_RxSel_a}
IfxQspi_Mtsr_In | IfxQspi0_MTSRB_P22_10_IN = {&MODULE_QSPI0, {&MODULE_P22,10}, Ifx_RxSel_b}
IfxQspi_Mtsr_In | IfxQspi0_MTSRC_P22_5_IN = {&MODULE_QSPI0, {&MODULE_P22, 5}, Ifx_RxSel_c}
IfxQspi_Mtsr_In | IfxQspi1_MTSRA_P10_3_IN = {&MODULE_QSPI1, {&MODULE_P10, 3}, Ifx_RxSel_a}
IfxQspi_Mtsr_In | IfxQspi1_MTSRB_P11_9_IN = {&MODULE_QSPI1, {&MODULE_P11, 9}, Ifx_RxSel_b}
IfxQspi_Mtsr_In | IfxQspi1_MTSRC_P10_4_IN = {&MODULE_QSPI1, {&MODULE_P10, 4}, Ifx_RxSel_c}
IfxQspi_Mtsr_In | IfxQspi2_MTSRA_P15_5_IN = {&MODULE_QSPI2, {&MODULE_P15, 5}, Ifx_RxSel_a}
IfxQspi_Mtsr_In | IfxQspi2_MTSRB_P15_6_IN = {&MODULE_QSPI2, {&MODULE_P15, 6}, Ifx_RxSel_b}
IfxQspi_Mtsr_In | IfxQspi2_MTSRD_P34_5_IN = {&MODULE_QSPI2, {&MODULE_P34, 5}, Ifx_RxSel_d}
IfxQspi_Mtsr_In | IfxQspi3_MTSRA_P02_6_IN = {&MODULE_QSPI3, {&MODULE_P02, 6}, Ifx_RxSel_a}
IfxQspi_Mtsr_In | IfxQspi3_MTSRB_P10_6_IN = {&MODULE_QSPI3, {&MODULE_P10, 6}, Ifx_RxSel_b}
IfxQspi_Mtsr_In | IfxQspi3_MTSRC_P01_6_IN = {&MODULE_QSPI3, {&MODULE_P01, 6}, Ifx_RxSel_c}
IfxQspi_Mtsr_In | IfxQspi4_MTSRA_P33_12_IN = {&MODULE_QSPI4, {&MODULE_P33,12}, Ifx_RxSel_a}
IfxQspi_Mtsr_In | IfxQspi4_MTSRB_P22_0_IN = {&MODULE_QSPI4, {&MODULE_P22, 0}, Ifx_RxSel_b}
IfxQspi_Mtsr_Out | IfxQspi0_MTSR_P20_12_OUT = {&MODULE_QSPI0, {&MODULE_P20,12}, IfxPort_OutputIdx_alt4}
IfxQspi_Mtsr_Out | IfxQspi0_MTSR_P20_14_OUT = {&MODULE_QSPI0, {&MODULE_P20,14}, IfxPort_OutputIdx_alt3}
IfxQspi_Mtsr_Out | IfxQspi0_MTSR_P22_10_OUT = {&MODULE_QSPI0, {&MODULE_P22,10}, IfxPort_OutputIdx_alt4}
IfxQspi_Mtsr_Out | IfxQspi0_MTSR_P22_5_OUT = {&MODULE_QSPI0, {&MODULE_P22, 5}, IfxPort_OutputIdx_alt4}
IfxQspi_Mtsr_Out | IfxQspi1_MTSR_P10_1_OUT = {&MODULE_QSPI1, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt2}
IfxQspi_Mtsr_Out | IfxQspi1_MTSR_P10_3_OUT = {&MODULE_QSPI1, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt3}
IfxQspi_Mtsr_Out | IfxQspi1_MTSR_P10_4_OUT = {&MODULE_QSPI1, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt4}
IfxQspi_Mtsr_Out | IfxQspi1_MTSR_P11_9_OUT = {&MODULE_QSPI1, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt3}
IfxQspi_Mtsr_Out | IfxQspi2_MTSRN_P13_2_OUT = {&MODULE_QSPI2, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt3}
IfxQspi_Mtsr_Out | IfxQspi2_MTSRP_P13_3_OUT = {&MODULE_QSPI2, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt3}
IfxQspi_Mtsr_Out | IfxQspi2_MTSR_P15_5_OUT = {&MODULE_QSPI2, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt3}
IfxQspi_Mtsr_Out | IfxQspi2_MTSR_P15_6_OUT = {&MODULE_QSPI2, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt3}
IfxQspi_Mtsr_Out | IfxQspi2_MTSR_P34_5_OUT = {&MODULE_QSPI2, {&MODULE_P34, 5}, IfxPort_OutputIdx_alt4}
IfxQspi_Mtsr_Out | IfxQspi3_MTSR_P01_6_OUT = {&MODULE_QSPI3, {&MODULE_P01, 6}, IfxPort_OutputIdx_alt4}
IfxQspi_Mtsr_Out | IfxQspi3_MTSR_P02_6_OUT = {&MODULE_QSPI3, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt3}
IfxQspi_Mtsr_Out | IfxQspi3_MTSR_P10_6_OUT = {&MODULE_QSPI3, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt3}
IfxQspi_Mtsr_Out | IfxQspi4_MTSRN_P22_2_OUT = {&MODULE_QSPI4, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt4}
IfxQspi_Mtsr_Out | IfxQspi4_MTSRP_P22_3_OUT = {&MODULE_QSPI4, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt4}
IfxQspi_Mtsr_Out | IfxQspi4_MTSR_P22_0_OUT = {&MODULE_QSPI4, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt3}
IfxQspi_Mtsr_Out | IfxQspi4_MTSR_P33_12_OUT = {&MODULE_QSPI4, {&MODULE_P33,12}, IfxPort_OutputIdx_alt3}
IfxQspi_Sclk_In | IfxQspi0_SCLKA_P20_11_IN = {&MODULE_QSPI0, {&MODULE_P20,11}, Ifx_RxSel_a}
IfxQspi_Sclk_In | IfxQspi0_SCLKB_P22_8_IN = {&MODULE_QSPI0, {&MODULE_P22, 8}, Ifx_RxSel_b}
IfxQspi_Sclk_In | IfxQspi0_SCLKC_P22_7_IN = {&MODULE_QSPI0, {&MODULE_P22, 7}, Ifx_RxSel_c}
IfxQspi_Sclk_In | IfxQspi1_SCLKA_P10_2_IN = {&MODULE_QSPI1, {&MODULE_P10, 2}, Ifx_RxSel_a}
IfxQspi_Sclk_In | IfxQspi1_SCLKB_P11_6_IN = {&MODULE_QSPI1, {&MODULE_P11, 6}, Ifx_RxSel_b}
IfxQspi_Sclk_In | IfxQspi2_SCLKA_P15_3_IN = {&MODULE_QSPI2, {&MODULE_P15, 3}, Ifx_RxSel_a}
IfxQspi_Sclk_In | IfxQspi2_SCLKB_P15_8_IN = {&MODULE_QSPI2, {&MODULE_P15, 8}, Ifx_RxSel_b}
IfxQspi_Sclk_In | IfxQspi2_SCLKD_P33_14_IN = {&MODULE_QSPI2, {&MODULE_P33,14}, Ifx_RxSel_d}
IfxQspi_Sclk_In | IfxQspi3_SCLKA_P02_7_IN = {&MODULE_QSPI3, {&MODULE_P02, 7}, Ifx_RxSel_a}
IfxQspi_Sclk_In | IfxQspi3_SCLKB_P10_8_IN = {&MODULE_QSPI3, {&MODULE_P10, 8}, Ifx_RxSel_b}
IfxQspi_Sclk_In | IfxQspi3_SCLKC_P01_7_IN = {&MODULE_QSPI3, {&MODULE_P01, 7}, Ifx_RxSel_c}
IfxQspi_Sclk_In | IfxQspi4_SCLKA_P33_11_IN = {&MODULE_QSPI4, {&MODULE_P33,11}, Ifx_RxSel_a}
IfxQspi_Sclk_In | IfxQspi4_SCLKB_P22_3_IN = {&MODULE_QSPI4, {&MODULE_P22, 3}, Ifx_RxSel_b}
IfxQspi_Sclk_Out | IfxQspi0_SCLK_P20_11_OUT = {&MODULE_QSPI0, {&MODULE_P20,11}, IfxPort_OutputIdx_alt3}
IfxQspi_Sclk_Out | IfxQspi0_SCLK_P20_13_OUT = {&MODULE_QSPI0, {&MODULE_P20,13}, IfxPort_OutputIdx_alt5}
IfxQspi_Sclk_Out | IfxQspi0_SCLK_P22_7_OUT = {&MODULE_QSPI0, {&MODULE_P22, 7}, IfxPort_OutputIdx_alt4}
IfxQspi_Sclk_Out | IfxQspi0_SCLK_P22_8_OUT = {&MODULE_QSPI0, {&MODULE_P22, 8}, IfxPort_OutputIdx_alt4}
IfxQspi_Sclk_Out | IfxQspi1_SCLK_P10_2_OUT = {&MODULE_QSPI1, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt3}
IfxQspi_Sclk_Out | IfxQspi1_SCLK_P11_6_OUT = {&MODULE_QSPI1, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt3}
IfxQspi_Sclk_Out | IfxQspi2_SCLKN_P13_0_OUT = {&MODULE_QSPI2, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt3}
IfxQspi_Sclk_Out | IfxQspi2_SCLKP_P13_1_OUT = {&MODULE_QSPI2, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt3}
IfxQspi_Sclk_Out | IfxQspi2_SCLK_P15_3_OUT = {&MODULE_QSPI2, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt3}
IfxQspi_Sclk_Out | IfxQspi2_SCLK_P15_6_OUT = {&MODULE_QSPI2, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt5}
IfxQspi_Sclk_Out | IfxQspi2_SCLK_P15_8_OUT = {&MODULE_QSPI2, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt3}
IfxQspi_Sclk_Out | IfxQspi2_SCLK_P33_14_OUT = {&MODULE_QSPI2, {&MODULE_P33,14}, IfxPort_OutputIdx_alt3}
IfxQspi_Sclk_Out | IfxQspi2_SCLK_P33_1_OUT = {&MODULE_QSPI2, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt3}
IfxQspi_Sclk_Out | IfxQspi3_SCLK_P01_7_OUT = {&MODULE_QSPI3, {&MODULE_P01, 7}, IfxPort_OutputIdx_alt4}
IfxQspi_Sclk_Out | IfxQspi3_SCLK_P02_7_OUT = {&MODULE_QSPI3, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt3}
IfxQspi_Sclk_Out | IfxQspi3_SCLK_P10_8_OUT = {&MODULE_QSPI3, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt3}
IfxQspi_Sclk_Out | IfxQspi4_SCLKN_P22_0_OUT = {&MODULE_QSPI4, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt4}
IfxQspi_Sclk_Out | IfxQspi4_SCLKP_P22_1_OUT = {&MODULE_QSPI4, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt4}
IfxQspi_Sclk_Out | IfxQspi4_SCLK_P22_3_OUT = {&MODULE_QSPI4, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt3}
IfxQspi_Sclk_Out | IfxQspi4_SCLK_P33_11_OUT = {&MODULE_QSPI4, {&MODULE_P33,11}, IfxPort_OutputIdx_alt3}
IfxQspi_Slsi_In | IfxQspi0_SLSIA_P20_13_IN = {&MODULE_QSPI0, {&MODULE_P20,13}, Ifx_RxSel_a}
IfxQspi_Slsi_In | IfxQspi0_SLSIB_P20_9_IN = {&MODULE_QSPI0, {&MODULE_P20, 9}, Ifx_RxSel_b}
IfxQspi_Slsi_In | IfxQspi1_SLSIA_P11_10_IN = {&MODULE_QSPI1, {&MODULE_P11,10}, Ifx_RxSel_a}
IfxQspi_Slsi_In | IfxQspi2_SLSIA_P15_2_IN = {&MODULE_QSPI2, {&MODULE_P15, 2}, Ifx_RxSel_a}
IfxQspi_Slsi_In | IfxQspi2_SLSIB_P15_1_IN = {&MODULE_QSPI2, {&MODULE_P15, 1}, Ifx_RxSel_b}
IfxQspi_Slsi_In | IfxQspi3_SLSIA_P02_4_IN = {&MODULE_QSPI3, {&MODULE_P02, 4}, Ifx_RxSel_a}
IfxQspi_Slsi_In | IfxQspi3_SLSIB_P01_3_IN = {&MODULE_QSPI3, {&MODULE_P01, 3}, Ifx_RxSel_b}
IfxQspi_Slsi_In | IfxQspi4_SLSIA_P33_10_IN = {&MODULE_QSPI4, {&MODULE_P33,10}, Ifx_RxSel_a}
IfxQspi_Slsi_In | IfxQspi4_SLSIB_P22_2_IN = {&MODULE_QSPI4, {&MODULE_P22, 2}, Ifx_RxSel_b}
IfxQspi_Slso_Out | IfxQspi0_SLSO0_P20_8_OUT = {&MODULE_QSPI0, 0, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi0_SLSO10_P22_11_OUT = {&MODULE_QSPI0, 10, {&MODULE_P22,11}, IfxPort_OutputIdx_alt4}
IfxQspi_Slso_Out | IfxQspi0_SLSO11_P23_6_OUT = {&MODULE_QSPI0, 11, {&MODULE_P23, 6}, IfxPort_OutputIdx_alt4}
IfxQspi_Slso_Out | IfxQspi0_SLSO12_P22_4_OUT = {&MODULE_QSPI0, 12, {&MODULE_P22, 4}, IfxPort_OutputIdx_alt4}
IfxQspi_Slso_Out | IfxQspi0_SLSO13_P15_0_OUT = {&MODULE_QSPI0, 13, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi0_SLSO1_P20_9_OUT = {&MODULE_QSPI0, 1, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi0_SLSO2_P20_13_OUT = {&MODULE_QSPI0, 2, {&MODULE_P20,13}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi0_SLSO3_P11_10_OUT = {&MODULE_QSPI0, 3, {&MODULE_P11,10}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi0_SLSO4_P11_11_OUT = {&MODULE_QSPI0, 4, {&MODULE_P11,11}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi0_SLSO5_P11_2_OUT = {&MODULE_QSPI0, 5, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi0_SLSO6_P20_10_OUT = {&MODULE_QSPI0, 6, {&MODULE_P20,10}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi0_SLSO7_P33_5_OUT = {&MODULE_QSPI0, 7, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt2}
IfxQspi_Slso_Out | IfxQspi0_SLSO8_P20_6_OUT = {&MODULE_QSPI0, 8, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi0_SLSO9_P20_3_OUT = {&MODULE_QSPI0, 9, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi1_SLSO0_P20_8_OUT = {&MODULE_QSPI1, 0, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt4}
IfxQspi_Slso_Out | IfxQspi1_SLSO10_P10_0_OUT = {&MODULE_QSPI1, 10, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi1_SLSO1_P20_9_OUT = {&MODULE_QSPI1, 1, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt4}
IfxQspi_Slso_Out | IfxQspi1_SLSO2_P20_13_OUT = {&MODULE_QSPI1, 2, {&MODULE_P20,13}, IfxPort_OutputIdx_alt4}
IfxQspi_Slso_Out | IfxQspi1_SLSO3_P11_10_OUT = {&MODULE_QSPI1, 3, {&MODULE_P11,10}, IfxPort_OutputIdx_alt4}
IfxQspi_Slso_Out | IfxQspi1_SLSO4_P11_11_OUT = {&MODULE_QSPI1, 4, {&MODULE_P11,11}, IfxPort_OutputIdx_alt4}
IfxQspi_Slso_Out | IfxQspi1_SLSO5_P11_2_OUT = {&MODULE_QSPI1, 5, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt4}
IfxQspi_Slso_Out | IfxQspi1_SLSO6_P33_10_OUT = {&MODULE_QSPI1, 6, {&MODULE_P33,10}, IfxPort_OutputIdx_alt2}
IfxQspi_Slso_Out | IfxQspi1_SLSO7_P33_5_OUT = {&MODULE_QSPI1, 7, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi1_SLSO8_P10_4_OUT = {&MODULE_QSPI1, 8, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi1_SLSO9_P10_5_OUT = {&MODULE_QSPI1, 9, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt4}
IfxQspi_Slso_Out | IfxQspi2_SLSO0_P15_2_OUT = {&MODULE_QSPI2, 0, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi2_SLSO10_P33_2_OUT = {&MODULE_QSPI2, 10, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi2_SLSO10_P34_3_OUT = {&MODULE_QSPI2, 10, {&MODULE_P34, 3}, IfxPort_OutputIdx_alt4}
IfxQspi_Slso_Out | IfxQspi2_SLSO11_P33_15_OUT = {&MODULE_QSPI2, 11, {&MODULE_P33,15}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi2_SLSO11_P33_6_OUT = {&MODULE_QSPI2, 11, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi2_SLSO12_P32_6_OUT = {&MODULE_QSPI2, 12, {&MODULE_P32, 6}, IfxPort_OutputIdx_alt4}
IfxQspi_Slso_Out | IfxQspi2_SLSO12_P33_4_OUT = {&MODULE_QSPI2, 12, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi2_SLSO1_P14_2_OUT = {&MODULE_QSPI2, 1, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi2_SLSO2_P14_6_OUT = {&MODULE_QSPI2, 2, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi2_SLSO3_P14_3_OUT = {&MODULE_QSPI2, 3, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi2_SLSO4_P14_7_OUT = {&MODULE_QSPI2, 4, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi2_SLSO5_P15_1_OUT = {&MODULE_QSPI2, 5, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi2_SLSO6_P33_13_OUT = {&MODULE_QSPI2, 6, {&MODULE_P33,13}, IfxPort_OutputIdx_alt4}
IfxQspi_Slso_Out | IfxQspi2_SLSO7_P20_10_OUT = {&MODULE_QSPI2, 7, {&MODULE_P20,10}, IfxPort_OutputIdx_alt4}
IfxQspi_Slso_Out | IfxQspi2_SLSO8_P20_6_OUT = {&MODULE_QSPI2, 8, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt4}
IfxQspi_Slso_Out | IfxQspi2_SLSO9_P20_3_OUT = {&MODULE_QSPI2, 9, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt4}
IfxQspi_Slso_Out | IfxQspi3_SLSO0_P02_4_OUT = {&MODULE_QSPI3, 0, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi3_SLSO10_P01_4_OUT = {&MODULE_QSPI3, 10, {&MODULE_P01, 4}, IfxPort_OutputIdx_alt4}
IfxQspi_Slso_Out | IfxQspi3_SLSO1_P02_0_OUT = {&MODULE_QSPI3, 1, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi3_SLSO2_P02_1_OUT = {&MODULE_QSPI3, 2, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi3_SLSO3_P00_5_OUT = {&MODULE_QSPI3, 3, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi3_SLSO3_P02_2_OUT = {&MODULE_QSPI3, 3, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi3_SLSO4_P00_2_OUT = {&MODULE_QSPI3, 4, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt6}
IfxQspi_Slso_Out | IfxQspi3_SLSO4_P02_3_OUT = {&MODULE_QSPI3, 4, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi3_SLSO5_P02_12_OUT = {&MODULE_QSPI3, 5, {&MODULE_P02,12}, IfxPort_OutputIdx_alt2}
IfxQspi_Slso_Out | IfxQspi3_SLSO5_P02_8_OUT = {&MODULE_QSPI3, 5, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt2}
IfxQspi_Slso_Out | IfxQspi3_SLSO6_P00_8_OUT = {&MODULE_QSPI3, 6, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt2}
IfxQspi_Slso_Out | IfxQspi3_SLSO6_P02_15_OUT = {&MODULE_QSPI3, 6, {&MODULE_P02,15}, IfxPort_OutputIdx_alt2}
IfxQspi_Slso_Out | IfxQspi3_SLSO7_P00_9_OUT = {&MODULE_QSPI3, 7, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt2}
IfxQspi_Slso_Out | IfxQspi3_SLSO7_P02_13_OUT = {&MODULE_QSPI3, 7, {&MODULE_P02,13}, IfxPort_OutputIdx_alt2}
IfxQspi_Slso_Out | IfxQspi3_SLSO8_P10_5_OUT = {&MODULE_QSPI3, 8, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi3_SLSO9_P01_3_OUT = {&MODULE_QSPI3, 9, {&MODULE_P01, 3}, IfxPort_OutputIdx_alt4}
IfxQspi_Slso_Out | IfxQspi4_SLSO0_P33_10_OUT = {&MODULE_QSPI4, 0, {&MODULE_P33,10}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi4_SLSO1_P33_9_OUT = {&MODULE_QSPI4, 1, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi4_SLSO2_P33_3_OUT = {&MODULE_QSPI4, 2, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi4_SLSO2_P33_8_OUT = {&MODULE_QSPI4, 2, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi4_SLSO3_P22_2_OUT = {&MODULE_QSPI4, 3, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi4_SLSO4_P02_12_OUT = {&MODULE_QSPI4, 4, {&MODULE_P02,12}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi4_SLSO4_P23_5_OUT = {&MODULE_QSPI4, 4, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi4_SLSO5_P02_15_OUT = {&MODULE_QSPI4, 5, {&MODULE_P02,15}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi4_SLSO5_P23_4_OUT = {&MODULE_QSPI4, 5, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi4_SLSO6_P02_13_OUT = {&MODULE_QSPI4, 6, {&MODULE_P02,13}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi4_SLSO6_P23_1_OUT = {&MODULE_QSPI4, 6, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi4_SLSO7_P02_1_OUT = {&MODULE_QSPI4, 7, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt2}
IfxQspi_Slso_Out | IfxQspi4_SLSO7_P33_7_OUT = {&MODULE_QSPI4, 7, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt3}
const IfxQspi_Mrst_In * | IfxQspi_Mrst_In_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS]
const IfxQspi_Mrst_Out * | IfxQspi_Mrst_Out_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS]
const IfxQspi_Mtsr_In * | IfxQspi_Mtsr_In_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS]
const IfxQspi_Mtsr_Out * | IfxQspi_Mtsr_Out_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS]
const IfxQspi_Sclk_In * | IfxQspi_Sclk_In_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS]
const IfxQspi_Sclk_Out * | IfxQspi_Sclk_Out_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS]
const IfxQspi_Slsi_In * | IfxQspi_Slsi_In_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS]
const IfxQspi_Slso_Out * | IfxQspi_Slso_Out_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_NUM_SLAVESELECTS][IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS]

Detailed Description

QSPI I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxQspi_PinMap.c.

Variable Documentation

◆ IfxQspi0_MRST_P20_12_OUT

IfxQspi_Mrst_Out IfxQspi0_MRST_P20_12_OUT = {&MODULE_QSPI0, {&MODULE_P20,12}, IfxPort_OutputIdx_alt3}

Definition at line 67 of file IfxQspi_PinMap.c.

◆ IfxQspi0_MRST_P22_6_OUT

IfxQspi_Mrst_Out IfxQspi0_MRST_P22_6_OUT = {&MODULE_QSPI0, {&MODULE_P22, 6}, IfxPort_OutputIdx_alt4}

Definition at line 68 of file IfxQspi_PinMap.c.

◆ IfxQspi0_MRST_P22_9_OUT

IfxQspi_Mrst_Out IfxQspi0_MRST_P22_9_OUT = {&MODULE_QSPI0, {&MODULE_P22, 9}, IfxPort_OutputIdx_alt4}

Definition at line 69 of file IfxQspi_PinMap.c.

◆ IfxQspi0_MRSTA_P20_12_IN

IfxQspi_Mrst_In IfxQspi0_MRSTA_P20_12_IN = {&MODULE_QSPI0, {&MODULE_P20,12}, Ifx_RxSel_a}

Definition at line 45 of file IfxQspi_PinMap.c.

◆ IfxQspi0_MRSTB_P22_9_IN

IfxQspi_Mrst_In IfxQspi0_MRSTB_P22_9_IN = {&MODULE_QSPI0, {&MODULE_P22, 9}, Ifx_RxSel_b}

Definition at line 46 of file IfxQspi_PinMap.c.

◆ IfxQspi0_MRSTC_P22_6_IN

IfxQspi_Mrst_In IfxQspi0_MRSTC_P22_6_IN = {&MODULE_QSPI0, {&MODULE_P22, 6}, Ifx_RxSel_c}

Definition at line 47 of file IfxQspi_PinMap.c.

◆ IfxQspi0_MTSR_P20_12_OUT

IfxQspi_Mtsr_Out IfxQspi0_MTSR_P20_12_OUT = {&MODULE_QSPI0, {&MODULE_P20,12}, IfxPort_OutputIdx_alt4}

Definition at line 95 of file IfxQspi_PinMap.c.

◆ IfxQspi0_MTSR_P20_14_OUT

IfxQspi_Mtsr_Out IfxQspi0_MTSR_P20_14_OUT = {&MODULE_QSPI0, {&MODULE_P20,14}, IfxPort_OutputIdx_alt3}

Definition at line 96 of file IfxQspi_PinMap.c.

◆ IfxQspi0_MTSR_P22_10_OUT

IfxQspi_Mtsr_Out IfxQspi0_MTSR_P22_10_OUT = {&MODULE_QSPI0, {&MODULE_P22,10}, IfxPort_OutputIdx_alt4}

Definition at line 97 of file IfxQspi_PinMap.c.

◆ IfxQspi0_MTSR_P22_5_OUT

IfxQspi_Mtsr_Out IfxQspi0_MTSR_P22_5_OUT = {&MODULE_QSPI0, {&MODULE_P22, 5}, IfxPort_OutputIdx_alt4}

Definition at line 98 of file IfxQspi_PinMap.c.

◆ IfxQspi0_MTSRA_P20_14_IN

IfxQspi_Mtsr_In IfxQspi0_MTSRA_P20_14_IN = {&MODULE_QSPI0, {&MODULE_P20,14}, Ifx_RxSel_a}

Definition at line 81 of file IfxQspi_PinMap.c.

◆ IfxQspi0_MTSRB_P22_10_IN

IfxQspi_Mtsr_In IfxQspi0_MTSRB_P22_10_IN = {&MODULE_QSPI0, {&MODULE_P22,10}, Ifx_RxSel_b}

Definition at line 82 of file IfxQspi_PinMap.c.

◆ IfxQspi0_MTSRC_P22_5_IN

IfxQspi_Mtsr_In IfxQspi0_MTSRC_P22_5_IN = {&MODULE_QSPI0, {&MODULE_P22, 5}, Ifx_RxSel_c}

Definition at line 83 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SCLK_P20_11_OUT

IfxQspi_Sclk_Out IfxQspi0_SCLK_P20_11_OUT = {&MODULE_QSPI0, {&MODULE_P20,11}, IfxPort_OutputIdx_alt3}

Definition at line 128 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SCLK_P20_13_OUT

IfxQspi_Sclk_Out IfxQspi0_SCLK_P20_13_OUT = {&MODULE_QSPI0, {&MODULE_P20,13}, IfxPort_OutputIdx_alt5}

Definition at line 129 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SCLK_P22_7_OUT

IfxQspi_Sclk_Out IfxQspi0_SCLK_P22_7_OUT = {&MODULE_QSPI0, {&MODULE_P22, 7}, IfxPort_OutputIdx_alt4}

Definition at line 130 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SCLK_P22_8_OUT

IfxQspi_Sclk_Out IfxQspi0_SCLK_P22_8_OUT = {&MODULE_QSPI0, {&MODULE_P22, 8}, IfxPort_OutputIdx_alt4}

Definition at line 131 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SCLKA_P20_11_IN

IfxQspi_Sclk_In IfxQspi0_SCLKA_P20_11_IN = {&MODULE_QSPI0, {&MODULE_P20,11}, Ifx_RxSel_a}

Definition at line 115 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SCLKB_P22_8_IN

IfxQspi_Sclk_In IfxQspi0_SCLKB_P22_8_IN = {&MODULE_QSPI0, {&MODULE_P22, 8}, Ifx_RxSel_b}

Definition at line 116 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SCLKC_P22_7_IN

IfxQspi_Sclk_In IfxQspi0_SCLKC_P22_7_IN = {&MODULE_QSPI0, {&MODULE_P22, 7}, Ifx_RxSel_c}

Definition at line 117 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SLSIA_P20_13_IN

IfxQspi_Slsi_In IfxQspi0_SLSIA_P20_13_IN = {&MODULE_QSPI0, {&MODULE_P20,13}, Ifx_RxSel_a}

Definition at line 148 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SLSIB_P20_9_IN

IfxQspi_Slsi_In IfxQspi0_SLSIB_P20_9_IN = {&MODULE_QSPI0, {&MODULE_P20, 9}, Ifx_RxSel_b}

Definition at line 149 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SLSO0_P20_8_OUT

IfxQspi_Slso_Out IfxQspi0_SLSO0_P20_8_OUT = {&MODULE_QSPI0, 0, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt3}

Definition at line 157 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SLSO10_P22_11_OUT

IfxQspi_Slso_Out IfxQspi0_SLSO10_P22_11_OUT = {&MODULE_QSPI0, 10, {&MODULE_P22,11}, IfxPort_OutputIdx_alt4}

Definition at line 158 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SLSO11_P23_6_OUT

IfxQspi_Slso_Out IfxQspi0_SLSO11_P23_6_OUT = {&MODULE_QSPI0, 11, {&MODULE_P23, 6}, IfxPort_OutputIdx_alt4}

Definition at line 159 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SLSO12_P22_4_OUT

IfxQspi_Slso_Out IfxQspi0_SLSO12_P22_4_OUT = {&MODULE_QSPI0, 12, {&MODULE_P22, 4}, IfxPort_OutputIdx_alt4}

Definition at line 160 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SLSO13_P15_0_OUT

IfxQspi_Slso_Out IfxQspi0_SLSO13_P15_0_OUT = {&MODULE_QSPI0, 13, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt3}

Definition at line 161 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SLSO1_P20_9_OUT

IfxQspi_Slso_Out IfxQspi0_SLSO1_P20_9_OUT = {&MODULE_QSPI0, 1, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt3}

Definition at line 162 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SLSO2_P20_13_OUT

IfxQspi_Slso_Out IfxQspi0_SLSO2_P20_13_OUT = {&MODULE_QSPI0, 2, {&MODULE_P20,13}, IfxPort_OutputIdx_alt3}

Definition at line 163 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SLSO3_P11_10_OUT

IfxQspi_Slso_Out IfxQspi0_SLSO3_P11_10_OUT = {&MODULE_QSPI0, 3, {&MODULE_P11,10}, IfxPort_OutputIdx_alt3}

Definition at line 164 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SLSO4_P11_11_OUT

IfxQspi_Slso_Out IfxQspi0_SLSO4_P11_11_OUT = {&MODULE_QSPI0, 4, {&MODULE_P11,11}, IfxPort_OutputIdx_alt3}

Definition at line 165 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SLSO5_P11_2_OUT

IfxQspi_Slso_Out IfxQspi0_SLSO5_P11_2_OUT = {&MODULE_QSPI0, 5, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt3}

Definition at line 166 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SLSO6_P20_10_OUT

IfxQspi_Slso_Out IfxQspi0_SLSO6_P20_10_OUT = {&MODULE_QSPI0, 6, {&MODULE_P20,10}, IfxPort_OutputIdx_alt3}

Definition at line 167 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SLSO7_P33_5_OUT

IfxQspi_Slso_Out IfxQspi0_SLSO7_P33_5_OUT = {&MODULE_QSPI0, 7, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt2}

Definition at line 168 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SLSO8_P20_6_OUT

IfxQspi_Slso_Out IfxQspi0_SLSO8_P20_6_OUT = {&MODULE_QSPI0, 8, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt3}

Definition at line 169 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SLSO9_P20_3_OUT

IfxQspi_Slso_Out IfxQspi0_SLSO9_P20_3_OUT = {&MODULE_QSPI0, 9, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt3}

Definition at line 170 of file IfxQspi_PinMap.c.

◆ IfxQspi1_MRST_P10_1_OUT

IfxQspi_Mrst_Out IfxQspi1_MRST_P10_1_OUT = {&MODULE_QSPI1, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt3}

Definition at line 70 of file IfxQspi_PinMap.c.

◆ IfxQspi1_MRST_P10_6_OUT

IfxQspi_Mrst_Out IfxQspi1_MRST_P10_6_OUT = {&MODULE_QSPI1, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt6}

Definition at line 71 of file IfxQspi_PinMap.c.

◆ IfxQspi1_MRST_P11_3_OUT

IfxQspi_Mrst_Out IfxQspi1_MRST_P11_3_OUT = {&MODULE_QSPI1, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt3}

Definition at line 72 of file IfxQspi_PinMap.c.

◆ IfxQspi1_MRSTA_P10_1_IN

IfxQspi_Mrst_In IfxQspi1_MRSTA_P10_1_IN = {&MODULE_QSPI1, {&MODULE_P10, 1}, Ifx_RxSel_a}

Definition at line 48 of file IfxQspi_PinMap.c.

◆ IfxQspi1_MRSTB_P11_3_IN

IfxQspi_Mrst_In IfxQspi1_MRSTB_P11_3_IN = {&MODULE_QSPI1, {&MODULE_P11, 3}, Ifx_RxSel_b}

Definition at line 49 of file IfxQspi_PinMap.c.

◆ IfxQspi1_MTSR_P10_1_OUT

IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_1_OUT = {&MODULE_QSPI1, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt2}

Definition at line 99 of file IfxQspi_PinMap.c.

◆ IfxQspi1_MTSR_P10_3_OUT

IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_3_OUT = {&MODULE_QSPI1, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt3}

Definition at line 100 of file IfxQspi_PinMap.c.

◆ IfxQspi1_MTSR_P10_4_OUT

IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_4_OUT = {&MODULE_QSPI1, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt4}

Definition at line 101 of file IfxQspi_PinMap.c.

◆ IfxQspi1_MTSR_P11_9_OUT

IfxQspi_Mtsr_Out IfxQspi1_MTSR_P11_9_OUT = {&MODULE_QSPI1, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt3}

Definition at line 102 of file IfxQspi_PinMap.c.

◆ IfxQspi1_MTSRA_P10_3_IN

IfxQspi_Mtsr_In IfxQspi1_MTSRA_P10_3_IN = {&MODULE_QSPI1, {&MODULE_P10, 3}, Ifx_RxSel_a}

Definition at line 84 of file IfxQspi_PinMap.c.

◆ IfxQspi1_MTSRB_P11_9_IN

IfxQspi_Mtsr_In IfxQspi1_MTSRB_P11_9_IN = {&MODULE_QSPI1, {&MODULE_P11, 9}, Ifx_RxSel_b}

Definition at line 85 of file IfxQspi_PinMap.c.

◆ IfxQspi1_MTSRC_P10_4_IN

IfxQspi_Mtsr_In IfxQspi1_MTSRC_P10_4_IN = {&MODULE_QSPI1, {&MODULE_P10, 4}, Ifx_RxSel_c}

Definition at line 86 of file IfxQspi_PinMap.c.

◆ IfxQspi1_SCLK_P10_2_OUT

IfxQspi_Sclk_Out IfxQspi1_SCLK_P10_2_OUT = {&MODULE_QSPI1, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt3}

Definition at line 132 of file IfxQspi_PinMap.c.

◆ IfxQspi1_SCLK_P11_6_OUT

IfxQspi_Sclk_Out IfxQspi1_SCLK_P11_6_OUT = {&MODULE_QSPI1, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt3}

Definition at line 133 of file IfxQspi_PinMap.c.

◆ IfxQspi1_SCLKA_P10_2_IN

IfxQspi_Sclk_In IfxQspi1_SCLKA_P10_2_IN = {&MODULE_QSPI1, {&MODULE_P10, 2}, Ifx_RxSel_a}

Definition at line 118 of file IfxQspi_PinMap.c.

◆ IfxQspi1_SCLKB_P11_6_IN

IfxQspi_Sclk_In IfxQspi1_SCLKB_P11_6_IN = {&MODULE_QSPI1, {&MODULE_P11, 6}, Ifx_RxSel_b}

Definition at line 119 of file IfxQspi_PinMap.c.

◆ IfxQspi1_SLSIA_P11_10_IN

IfxQspi_Slsi_In IfxQspi1_SLSIA_P11_10_IN = {&MODULE_QSPI1, {&MODULE_P11,10}, Ifx_RxSel_a}

Definition at line 150 of file IfxQspi_PinMap.c.

◆ IfxQspi1_SLSO0_P20_8_OUT

IfxQspi_Slso_Out IfxQspi1_SLSO0_P20_8_OUT = {&MODULE_QSPI1, 0, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt4}

Definition at line 171 of file IfxQspi_PinMap.c.

◆ IfxQspi1_SLSO10_P10_0_OUT

IfxQspi_Slso_Out IfxQspi1_SLSO10_P10_0_OUT = {&MODULE_QSPI1, 10, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt3}

Definition at line 172 of file IfxQspi_PinMap.c.

◆ IfxQspi1_SLSO1_P20_9_OUT

IfxQspi_Slso_Out IfxQspi1_SLSO1_P20_9_OUT = {&MODULE_QSPI1, 1, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt4}

Definition at line 173 of file IfxQspi_PinMap.c.

◆ IfxQspi1_SLSO2_P20_13_OUT

IfxQspi_Slso_Out IfxQspi1_SLSO2_P20_13_OUT = {&MODULE_QSPI1, 2, {&MODULE_P20,13}, IfxPort_OutputIdx_alt4}

Definition at line 174 of file IfxQspi_PinMap.c.

◆ IfxQspi1_SLSO3_P11_10_OUT

IfxQspi_Slso_Out IfxQspi1_SLSO3_P11_10_OUT = {&MODULE_QSPI1, 3, {&MODULE_P11,10}, IfxPort_OutputIdx_alt4}

Definition at line 175 of file IfxQspi_PinMap.c.

◆ IfxQspi1_SLSO4_P11_11_OUT

IfxQspi_Slso_Out IfxQspi1_SLSO4_P11_11_OUT = {&MODULE_QSPI1, 4, {&MODULE_P11,11}, IfxPort_OutputIdx_alt4}

Definition at line 176 of file IfxQspi_PinMap.c.

◆ IfxQspi1_SLSO5_P11_2_OUT

IfxQspi_Slso_Out IfxQspi1_SLSO5_P11_2_OUT = {&MODULE_QSPI1, 5, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt4}

Definition at line 177 of file IfxQspi_PinMap.c.

◆ IfxQspi1_SLSO6_P33_10_OUT

IfxQspi_Slso_Out IfxQspi1_SLSO6_P33_10_OUT = {&MODULE_QSPI1, 6, {&MODULE_P33,10}, IfxPort_OutputIdx_alt2}

Definition at line 178 of file IfxQspi_PinMap.c.

◆ IfxQspi1_SLSO7_P33_5_OUT

IfxQspi_Slso_Out IfxQspi1_SLSO7_P33_5_OUT = {&MODULE_QSPI1, 7, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt3}

Definition at line 179 of file IfxQspi_PinMap.c.

◆ IfxQspi1_SLSO8_P10_4_OUT

IfxQspi_Slso_Out IfxQspi1_SLSO8_P10_4_OUT = {&MODULE_QSPI1, 8, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt3}

Definition at line 180 of file IfxQspi_PinMap.c.

◆ IfxQspi1_SLSO9_P10_5_OUT

IfxQspi_Slso_Out IfxQspi1_SLSO9_P10_5_OUT = {&MODULE_QSPI1, 9, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt4}

Definition at line 181 of file IfxQspi_PinMap.c.

◆ IfxQspi2_MRST_P15_4_OUT

IfxQspi_Mrst_Out IfxQspi2_MRST_P15_4_OUT = {&MODULE_QSPI2, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt3}

Definition at line 73 of file IfxQspi_PinMap.c.

◆ IfxQspi2_MRST_P15_7_OUT

IfxQspi_Mrst_Out IfxQspi2_MRST_P15_7_OUT = {&MODULE_QSPI2, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt3}

Definition at line 74 of file IfxQspi_PinMap.c.

◆ IfxQspi2_MRST_P34_4_OUT

IfxQspi_Mrst_Out IfxQspi2_MRST_P34_4_OUT = {&MODULE_QSPI2, {&MODULE_P34, 4}, IfxPort_OutputIdx_alt4}

Definition at line 75 of file IfxQspi_PinMap.c.

◆ IfxQspi2_MRSTA_P15_4_IN

IfxQspi_Mrst_In IfxQspi2_MRSTA_P15_4_IN = {&MODULE_QSPI2, {&MODULE_P15, 4}, Ifx_RxSel_a}

Definition at line 50 of file IfxQspi_PinMap.c.

◆ IfxQspi2_MRSTB_P15_7_IN

IfxQspi_Mrst_In IfxQspi2_MRSTB_P15_7_IN = {&MODULE_QSPI2, {&MODULE_P15, 7}, Ifx_RxSel_b}

Definition at line 51 of file IfxQspi_PinMap.c.

◆ IfxQspi2_MRSTCN_P21_2_IN

IfxQspi_Mrst_In IfxQspi2_MRSTCN_P21_2_IN = {&MODULE_QSPI2, {&MODULE_P21, 2}, Ifx_RxSel_c}

Definition at line 52 of file IfxQspi_PinMap.c.

◆ IfxQspi2_MRSTCP_P21_3_IN

IfxQspi_Mrst_In IfxQspi2_MRSTCP_P21_3_IN = {&MODULE_QSPI2, {&MODULE_P21, 3}, Ifx_RxSel_c}

Definition at line 53 of file IfxQspi_PinMap.c.

◆ IfxQspi2_MRSTD_P34_4_IN

IfxQspi_Mrst_In IfxQspi2_MRSTD_P34_4_IN = {&MODULE_QSPI2, {&MODULE_P34, 4}, Ifx_RxSel_d}

Definition at line 54 of file IfxQspi_PinMap.c.

◆ IfxQspi2_MRSTE_P15_2_IN

IfxQspi_Mrst_In IfxQspi2_MRSTE_P15_2_IN = {&MODULE_QSPI2, {&MODULE_P15, 2}, Ifx_RxSel_e}

Definition at line 55 of file IfxQspi_PinMap.c.

◆ IfxQspi2_MRSTFN_P14_9_IN

IfxQspi_Mrst_In IfxQspi2_MRSTFN_P14_9_IN = {&MODULE_QSPI2, {&MODULE_P14, 9}, Ifx_RxSel_f}

Definition at line 56 of file IfxQspi_PinMap.c.

◆ IfxQspi2_MRSTFP_P14_10_IN

IfxQspi_Mrst_In IfxQspi2_MRSTFP_P14_10_IN = {&MODULE_QSPI2, {&MODULE_P14,10}, Ifx_RxSel_f}

Definition at line 57 of file IfxQspi_PinMap.c.

◆ IfxQspi2_MTSR_P15_5_OUT

IfxQspi_Mtsr_Out IfxQspi2_MTSR_P15_5_OUT = {&MODULE_QSPI2, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt3}

Definition at line 105 of file IfxQspi_PinMap.c.

◆ IfxQspi2_MTSR_P15_6_OUT

IfxQspi_Mtsr_Out IfxQspi2_MTSR_P15_6_OUT = {&MODULE_QSPI2, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt3}

Definition at line 106 of file IfxQspi_PinMap.c.

◆ IfxQspi2_MTSR_P34_5_OUT

IfxQspi_Mtsr_Out IfxQspi2_MTSR_P34_5_OUT = {&MODULE_QSPI2, {&MODULE_P34, 5}, IfxPort_OutputIdx_alt4}

Definition at line 107 of file IfxQspi_PinMap.c.

◆ IfxQspi2_MTSRA_P15_5_IN

IfxQspi_Mtsr_In IfxQspi2_MTSRA_P15_5_IN = {&MODULE_QSPI2, {&MODULE_P15, 5}, Ifx_RxSel_a}

Definition at line 87 of file IfxQspi_PinMap.c.

◆ IfxQspi2_MTSRB_P15_6_IN

IfxQspi_Mtsr_In IfxQspi2_MTSRB_P15_6_IN = {&MODULE_QSPI2, {&MODULE_P15, 6}, Ifx_RxSel_b}

Definition at line 88 of file IfxQspi_PinMap.c.

◆ IfxQspi2_MTSRD_P34_5_IN

IfxQspi_Mtsr_In IfxQspi2_MTSRD_P34_5_IN = {&MODULE_QSPI2, {&MODULE_P34, 5}, Ifx_RxSel_d}

Definition at line 89 of file IfxQspi_PinMap.c.

◆ IfxQspi2_MTSRN_P13_2_OUT

IfxQspi_Mtsr_Out IfxQspi2_MTSRN_P13_2_OUT = {&MODULE_QSPI2, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt3}

Definition at line 103 of file IfxQspi_PinMap.c.

◆ IfxQspi2_MTSRP_P13_3_OUT

IfxQspi_Mtsr_Out IfxQspi2_MTSRP_P13_3_OUT = {&MODULE_QSPI2, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt3}

Definition at line 104 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SCLK_P15_3_OUT

IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_3_OUT = {&MODULE_QSPI2, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt3}

Definition at line 136 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SCLK_P15_6_OUT

IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_6_OUT = {&MODULE_QSPI2, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt5}

Definition at line 137 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SCLK_P15_8_OUT

IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_8_OUT = {&MODULE_QSPI2, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt3}

Definition at line 138 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SCLK_P33_14_OUT

IfxQspi_Sclk_Out IfxQspi2_SCLK_P33_14_OUT = {&MODULE_QSPI2, {&MODULE_P33,14}, IfxPort_OutputIdx_alt3}

Definition at line 139 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SCLK_P33_1_OUT

IfxQspi_Sclk_Out IfxQspi2_SCLK_P33_1_OUT = {&MODULE_QSPI2, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt3}

Definition at line 140 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SCLKA_P15_3_IN

IfxQspi_Sclk_In IfxQspi2_SCLKA_P15_3_IN = {&MODULE_QSPI2, {&MODULE_P15, 3}, Ifx_RxSel_a}

Definition at line 120 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SCLKB_P15_8_IN

IfxQspi_Sclk_In IfxQspi2_SCLKB_P15_8_IN = {&MODULE_QSPI2, {&MODULE_P15, 8}, Ifx_RxSel_b}

Definition at line 121 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SCLKD_P33_14_IN

IfxQspi_Sclk_In IfxQspi2_SCLKD_P33_14_IN = {&MODULE_QSPI2, {&MODULE_P33,14}, Ifx_RxSel_d}

Definition at line 122 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SCLKN_P13_0_OUT

IfxQspi_Sclk_Out IfxQspi2_SCLKN_P13_0_OUT = {&MODULE_QSPI2, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt3}

Definition at line 134 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SCLKP_P13_1_OUT

IfxQspi_Sclk_Out IfxQspi2_SCLKP_P13_1_OUT = {&MODULE_QSPI2, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt3}

Definition at line 135 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SLSIA_P15_2_IN

IfxQspi_Slsi_In IfxQspi2_SLSIA_P15_2_IN = {&MODULE_QSPI2, {&MODULE_P15, 2}, Ifx_RxSel_a}

Definition at line 151 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SLSIB_P15_1_IN

IfxQspi_Slsi_In IfxQspi2_SLSIB_P15_1_IN = {&MODULE_QSPI2, {&MODULE_P15, 1}, Ifx_RxSel_b}

Definition at line 152 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SLSO0_P15_2_OUT

IfxQspi_Slso_Out IfxQspi2_SLSO0_P15_2_OUT = {&MODULE_QSPI2, 0, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt3}

Definition at line 182 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SLSO10_P33_2_OUT

IfxQspi_Slso_Out IfxQspi2_SLSO10_P33_2_OUT = {&MODULE_QSPI2, 10, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt3}

Definition at line 183 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SLSO10_P34_3_OUT

IfxQspi_Slso_Out IfxQspi2_SLSO10_P34_3_OUT = {&MODULE_QSPI2, 10, {&MODULE_P34, 3}, IfxPort_OutputIdx_alt4}

Definition at line 184 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SLSO11_P33_15_OUT

IfxQspi_Slso_Out IfxQspi2_SLSO11_P33_15_OUT = {&MODULE_QSPI2, 11, {&MODULE_P33,15}, IfxPort_OutputIdx_alt3}

Definition at line 185 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SLSO11_P33_6_OUT

IfxQspi_Slso_Out IfxQspi2_SLSO11_P33_6_OUT = {&MODULE_QSPI2, 11, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt3}

Definition at line 186 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SLSO12_P32_6_OUT

IfxQspi_Slso_Out IfxQspi2_SLSO12_P32_6_OUT = {&MODULE_QSPI2, 12, {&MODULE_P32, 6}, IfxPort_OutputIdx_alt4}

Definition at line 187 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SLSO12_P33_4_OUT

IfxQspi_Slso_Out IfxQspi2_SLSO12_P33_4_OUT = {&MODULE_QSPI2, 12, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt3}

Definition at line 188 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SLSO1_P14_2_OUT

IfxQspi_Slso_Out IfxQspi2_SLSO1_P14_2_OUT = {&MODULE_QSPI2, 1, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt3}

Definition at line 189 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SLSO2_P14_6_OUT

IfxQspi_Slso_Out IfxQspi2_SLSO2_P14_6_OUT = {&MODULE_QSPI2, 2, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt3}

Definition at line 190 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SLSO3_P14_3_OUT

IfxQspi_Slso_Out IfxQspi2_SLSO3_P14_3_OUT = {&MODULE_QSPI2, 3, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt3}

Definition at line 191 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SLSO4_P14_7_OUT

IfxQspi_Slso_Out IfxQspi2_SLSO4_P14_7_OUT = {&MODULE_QSPI2, 4, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt3}

Definition at line 192 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SLSO5_P15_1_OUT

IfxQspi_Slso_Out IfxQspi2_SLSO5_P15_1_OUT = {&MODULE_QSPI2, 5, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt3}

Definition at line 193 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SLSO6_P33_13_OUT

IfxQspi_Slso_Out IfxQspi2_SLSO6_P33_13_OUT = {&MODULE_QSPI2, 6, {&MODULE_P33,13}, IfxPort_OutputIdx_alt4}

Definition at line 194 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SLSO7_P20_10_OUT

IfxQspi_Slso_Out IfxQspi2_SLSO7_P20_10_OUT = {&MODULE_QSPI2, 7, {&MODULE_P20,10}, IfxPort_OutputIdx_alt4}

Definition at line 195 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SLSO8_P20_6_OUT

IfxQspi_Slso_Out IfxQspi2_SLSO8_P20_6_OUT = {&MODULE_QSPI2, 8, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt4}

Definition at line 196 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SLSO9_P20_3_OUT

IfxQspi_Slso_Out IfxQspi2_SLSO9_P20_3_OUT = {&MODULE_QSPI2, 9, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt4}

Definition at line 197 of file IfxQspi_PinMap.c.

◆ IfxQspi3_MRST_P01_5_OUT

IfxQspi_Mrst_Out IfxQspi3_MRST_P01_5_OUT = {&MODULE_QSPI3, {&MODULE_P01, 5}, IfxPort_OutputIdx_alt4}

Definition at line 76 of file IfxQspi_PinMap.c.

◆ IfxQspi3_MRST_P02_5_OUT

IfxQspi_Mrst_Out IfxQspi3_MRST_P02_5_OUT = {&MODULE_QSPI3, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt3}

Definition at line 77 of file IfxQspi_PinMap.c.

◆ IfxQspi3_MRST_P10_7_OUT

IfxQspi_Mrst_Out IfxQspi3_MRST_P10_7_OUT = {&MODULE_QSPI3, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt3}

Definition at line 78 of file IfxQspi_PinMap.c.

◆ IfxQspi3_MRSTA_P02_5_IN

IfxQspi_Mrst_In IfxQspi3_MRSTA_P02_5_IN = {&MODULE_QSPI3, {&MODULE_P02, 5}, Ifx_RxSel_a}

Definition at line 58 of file IfxQspi_PinMap.c.

◆ IfxQspi3_MRSTB_P10_7_IN

IfxQspi_Mrst_In IfxQspi3_MRSTB_P10_7_IN = {&MODULE_QSPI3, {&MODULE_P10, 7}, Ifx_RxSel_b}

Definition at line 59 of file IfxQspi_PinMap.c.

◆ IfxQspi3_MRSTC_P01_5_IN

IfxQspi_Mrst_In IfxQspi3_MRSTC_P01_5_IN = {&MODULE_QSPI3, {&MODULE_P01, 5}, Ifx_RxSel_c}

Definition at line 60 of file IfxQspi_PinMap.c.

◆ IfxQspi3_MTSR_P01_6_OUT

IfxQspi_Mtsr_Out IfxQspi3_MTSR_P01_6_OUT = {&MODULE_QSPI3, {&MODULE_P01, 6}, IfxPort_OutputIdx_alt4}

Definition at line 108 of file IfxQspi_PinMap.c.

◆ IfxQspi3_MTSR_P02_6_OUT

IfxQspi_Mtsr_Out IfxQspi3_MTSR_P02_6_OUT = {&MODULE_QSPI3, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt3}

Definition at line 109 of file IfxQspi_PinMap.c.

◆ IfxQspi3_MTSR_P10_6_OUT

IfxQspi_Mtsr_Out IfxQspi3_MTSR_P10_6_OUT = {&MODULE_QSPI3, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt3}

Definition at line 110 of file IfxQspi_PinMap.c.

◆ IfxQspi3_MTSRA_P02_6_IN

IfxQspi_Mtsr_In IfxQspi3_MTSRA_P02_6_IN = {&MODULE_QSPI3, {&MODULE_P02, 6}, Ifx_RxSel_a}

Definition at line 90 of file IfxQspi_PinMap.c.

◆ IfxQspi3_MTSRB_P10_6_IN

IfxQspi_Mtsr_In IfxQspi3_MTSRB_P10_6_IN = {&MODULE_QSPI3, {&MODULE_P10, 6}, Ifx_RxSel_b}

Definition at line 91 of file IfxQspi_PinMap.c.

◆ IfxQspi3_MTSRC_P01_6_IN

IfxQspi_Mtsr_In IfxQspi3_MTSRC_P01_6_IN = {&MODULE_QSPI3, {&MODULE_P01, 6}, Ifx_RxSel_c}

Definition at line 92 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SCLK_P01_7_OUT

IfxQspi_Sclk_Out IfxQspi3_SCLK_P01_7_OUT = {&MODULE_QSPI3, {&MODULE_P01, 7}, IfxPort_OutputIdx_alt4}

Definition at line 141 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SCLK_P02_7_OUT

IfxQspi_Sclk_Out IfxQspi3_SCLK_P02_7_OUT = {&MODULE_QSPI3, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt3}

Definition at line 142 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SCLK_P10_8_OUT

IfxQspi_Sclk_Out IfxQspi3_SCLK_P10_8_OUT = {&MODULE_QSPI3, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt3}

Definition at line 143 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SCLKA_P02_7_IN

IfxQspi_Sclk_In IfxQspi3_SCLKA_P02_7_IN = {&MODULE_QSPI3, {&MODULE_P02, 7}, Ifx_RxSel_a}

Definition at line 123 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SCLKB_P10_8_IN

IfxQspi_Sclk_In IfxQspi3_SCLKB_P10_8_IN = {&MODULE_QSPI3, {&MODULE_P10, 8}, Ifx_RxSel_b}

Definition at line 124 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SCLKC_P01_7_IN

IfxQspi_Sclk_In IfxQspi3_SCLKC_P01_7_IN = {&MODULE_QSPI3, {&MODULE_P01, 7}, Ifx_RxSel_c}

Definition at line 125 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSIA_P02_4_IN

IfxQspi_Slsi_In IfxQspi3_SLSIA_P02_4_IN = {&MODULE_QSPI3, {&MODULE_P02, 4}, Ifx_RxSel_a}

Definition at line 153 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSIB_P01_3_IN

IfxQspi_Slsi_In IfxQspi3_SLSIB_P01_3_IN = {&MODULE_QSPI3, {&MODULE_P01, 3}, Ifx_RxSel_b}

Definition at line 154 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSO0_P02_4_OUT

IfxQspi_Slso_Out IfxQspi3_SLSO0_P02_4_OUT = {&MODULE_QSPI3, 0, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt3}

Definition at line 198 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSO10_P01_4_OUT

IfxQspi_Slso_Out IfxQspi3_SLSO10_P01_4_OUT = {&MODULE_QSPI3, 10, {&MODULE_P01, 4}, IfxPort_OutputIdx_alt4}

Definition at line 199 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSO1_P02_0_OUT

IfxQspi_Slso_Out IfxQspi3_SLSO1_P02_0_OUT = {&MODULE_QSPI3, 1, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt3}

Definition at line 200 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSO2_P02_1_OUT

IfxQspi_Slso_Out IfxQspi3_SLSO2_P02_1_OUT = {&MODULE_QSPI3, 2, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt3}

Definition at line 201 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSO3_P00_5_OUT

IfxQspi_Slso_Out IfxQspi3_SLSO3_P00_5_OUT = {&MODULE_QSPI3, 3, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt3}

Definition at line 202 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSO3_P02_2_OUT

IfxQspi_Slso_Out IfxQspi3_SLSO3_P02_2_OUT = {&MODULE_QSPI3, 3, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt3}

Definition at line 203 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSO4_P00_2_OUT

IfxQspi_Slso_Out IfxQspi3_SLSO4_P00_2_OUT = {&MODULE_QSPI3, 4, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt6}

Definition at line 204 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSO4_P02_3_OUT

IfxQspi_Slso_Out IfxQspi3_SLSO4_P02_3_OUT = {&MODULE_QSPI3, 4, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt3}

Definition at line 205 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSO5_P02_12_OUT

IfxQspi_Slso_Out IfxQspi3_SLSO5_P02_12_OUT = {&MODULE_QSPI3, 5, {&MODULE_P02,12}, IfxPort_OutputIdx_alt2}

Definition at line 206 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSO5_P02_8_OUT

IfxQspi_Slso_Out IfxQspi3_SLSO5_P02_8_OUT = {&MODULE_QSPI3, 5, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt2}

Definition at line 207 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSO6_P00_8_OUT

IfxQspi_Slso_Out IfxQspi3_SLSO6_P00_8_OUT = {&MODULE_QSPI3, 6, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt2}

Definition at line 208 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSO6_P02_15_OUT

IfxQspi_Slso_Out IfxQspi3_SLSO6_P02_15_OUT = {&MODULE_QSPI3, 6, {&MODULE_P02,15}, IfxPort_OutputIdx_alt2}

Definition at line 209 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSO7_P00_9_OUT

IfxQspi_Slso_Out IfxQspi3_SLSO7_P00_9_OUT = {&MODULE_QSPI3, 7, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt2}

Definition at line 210 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSO7_P02_13_OUT

IfxQspi_Slso_Out IfxQspi3_SLSO7_P02_13_OUT = {&MODULE_QSPI3, 7, {&MODULE_P02,13}, IfxPort_OutputIdx_alt2}

Definition at line 211 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSO8_P10_5_OUT

IfxQspi_Slso_Out IfxQspi3_SLSO8_P10_5_OUT = {&MODULE_QSPI3, 8, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt3}

Definition at line 212 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSO9_P01_3_OUT

IfxQspi_Slso_Out IfxQspi3_SLSO9_P01_3_OUT = {&MODULE_QSPI3, 9, {&MODULE_P01, 3}, IfxPort_OutputIdx_alt4}

Definition at line 213 of file IfxQspi_PinMap.c.

◆ IfxQspi4_MRST_P22_1_OUT

IfxQspi_Mrst_Out IfxQspi4_MRST_P22_1_OUT = {&MODULE_QSPI4, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt3}

Definition at line 79 of file IfxQspi_PinMap.c.

◆ IfxQspi4_MRST_P33_13_OUT

IfxQspi_Mrst_Out IfxQspi4_MRST_P33_13_OUT = {&MODULE_QSPI4, {&MODULE_P33,13}, IfxPort_OutputIdx_alt3}

Definition at line 80 of file IfxQspi_PinMap.c.

◆ IfxQspi4_MRSTA_P33_13_IN

IfxQspi_Mrst_In IfxQspi4_MRSTA_P33_13_IN = {&MODULE_QSPI4, {&MODULE_P33,13}, Ifx_RxSel_a}

Definition at line 61 of file IfxQspi_PinMap.c.

◆ IfxQspi4_MRSTB_P22_1_IN

IfxQspi_Mrst_In IfxQspi4_MRSTB_P22_1_IN = {&MODULE_QSPI4, {&MODULE_P22, 1}, Ifx_RxSel_b}

Definition at line 62 of file IfxQspi_PinMap.c.

◆ IfxQspi4_MRSTCN_P21_2_IN

IfxQspi_Mrst_In IfxQspi4_MRSTCN_P21_2_IN = {&MODULE_QSPI4, {&MODULE_P21, 2}, Ifx_RxSel_c}

Definition at line 63 of file IfxQspi_PinMap.c.

◆ IfxQspi4_MRSTCP_P21_3_IN

IfxQspi_Mrst_In IfxQspi4_MRSTCP_P21_3_IN = {&MODULE_QSPI4, {&MODULE_P21, 3}, Ifx_RxSel_c}

Definition at line 64 of file IfxQspi_PinMap.c.

◆ IfxQspi4_MRSTDN_P21_0_IN

IfxQspi_Mrst_In IfxQspi4_MRSTDN_P21_0_IN = {&MODULE_QSPI4, {&MODULE_P21, 0}, Ifx_RxSel_d}

Definition at line 65 of file IfxQspi_PinMap.c.

◆ IfxQspi4_MRSTDP_P21_1_IN

IfxQspi_Mrst_In IfxQspi4_MRSTDP_P21_1_IN = {&MODULE_QSPI4, {&MODULE_P21, 1}, Ifx_RxSel_d}

Definition at line 66 of file IfxQspi_PinMap.c.

◆ IfxQspi4_MTSR_P22_0_OUT

IfxQspi_Mtsr_Out IfxQspi4_MTSR_P22_0_OUT = {&MODULE_QSPI4, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt3}

Definition at line 113 of file IfxQspi_PinMap.c.

◆ IfxQspi4_MTSR_P33_12_OUT

IfxQspi_Mtsr_Out IfxQspi4_MTSR_P33_12_OUT = {&MODULE_QSPI4, {&MODULE_P33,12}, IfxPort_OutputIdx_alt3}

Definition at line 114 of file IfxQspi_PinMap.c.

◆ IfxQspi4_MTSRA_P33_12_IN

IfxQspi_Mtsr_In IfxQspi4_MTSRA_P33_12_IN = {&MODULE_QSPI4, {&MODULE_P33,12}, Ifx_RxSel_a}

Definition at line 93 of file IfxQspi_PinMap.c.

◆ IfxQspi4_MTSRB_P22_0_IN

IfxQspi_Mtsr_In IfxQspi4_MTSRB_P22_0_IN = {&MODULE_QSPI4, {&MODULE_P22, 0}, Ifx_RxSel_b}

Definition at line 94 of file IfxQspi_PinMap.c.

◆ IfxQspi4_MTSRN_P22_2_OUT

IfxQspi_Mtsr_Out IfxQspi4_MTSRN_P22_2_OUT = {&MODULE_QSPI4, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt4}

Definition at line 111 of file IfxQspi_PinMap.c.

◆ IfxQspi4_MTSRP_P22_3_OUT

IfxQspi_Mtsr_Out IfxQspi4_MTSRP_P22_3_OUT = {&MODULE_QSPI4, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt4}

Definition at line 112 of file IfxQspi_PinMap.c.

◆ IfxQspi4_SCLK_P22_3_OUT

IfxQspi_Sclk_Out IfxQspi4_SCLK_P22_3_OUT = {&MODULE_QSPI4, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt3}

Definition at line 146 of file IfxQspi_PinMap.c.

◆ IfxQspi4_SCLK_P33_11_OUT

IfxQspi_Sclk_Out IfxQspi4_SCLK_P33_11_OUT = {&MODULE_QSPI4, {&MODULE_P33,11}, IfxPort_OutputIdx_alt3}

Definition at line 147 of file IfxQspi_PinMap.c.

◆ IfxQspi4_SCLKA_P33_11_IN

IfxQspi_Sclk_In IfxQspi4_SCLKA_P33_11_IN = {&MODULE_QSPI4, {&MODULE_P33,11}, Ifx_RxSel_a}

Definition at line 126 of file IfxQspi_PinMap.c.

◆ IfxQspi4_SCLKB_P22_3_IN

IfxQspi_Sclk_In IfxQspi4_SCLKB_P22_3_IN = {&MODULE_QSPI4, {&MODULE_P22, 3}, Ifx_RxSel_b}

Definition at line 127 of file IfxQspi_PinMap.c.

◆ IfxQspi4_SCLKN_P22_0_OUT

IfxQspi_Sclk_Out IfxQspi4_SCLKN_P22_0_OUT = {&MODULE_QSPI4, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt4}

Definition at line 144 of file IfxQspi_PinMap.c.

◆ IfxQspi4_SCLKP_P22_1_OUT

IfxQspi_Sclk_Out IfxQspi4_SCLKP_P22_1_OUT = {&MODULE_QSPI4, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt4}

Definition at line 145 of file IfxQspi_PinMap.c.

◆ IfxQspi4_SLSIA_P33_10_IN

IfxQspi_Slsi_In IfxQspi4_SLSIA_P33_10_IN = {&MODULE_QSPI4, {&MODULE_P33,10}, Ifx_RxSel_a}

Definition at line 155 of file IfxQspi_PinMap.c.

◆ IfxQspi4_SLSIB_P22_2_IN

IfxQspi_Slsi_In IfxQspi4_SLSIB_P22_2_IN = {&MODULE_QSPI4, {&MODULE_P22, 2}, Ifx_RxSel_b}

Definition at line 156 of file IfxQspi_PinMap.c.

◆ IfxQspi4_SLSO0_P33_10_OUT

IfxQspi_Slso_Out IfxQspi4_SLSO0_P33_10_OUT = {&MODULE_QSPI4, 0, {&MODULE_P33,10}, IfxPort_OutputIdx_alt3}

Definition at line 214 of file IfxQspi_PinMap.c.

◆ IfxQspi4_SLSO1_P33_9_OUT

IfxQspi_Slso_Out IfxQspi4_SLSO1_P33_9_OUT = {&MODULE_QSPI4, 1, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt3}

Definition at line 215 of file IfxQspi_PinMap.c.

◆ IfxQspi4_SLSO2_P33_3_OUT

IfxQspi_Slso_Out IfxQspi4_SLSO2_P33_3_OUT = {&MODULE_QSPI4, 2, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt3}

Definition at line 216 of file IfxQspi_PinMap.c.

◆ IfxQspi4_SLSO2_P33_8_OUT

IfxQspi_Slso_Out IfxQspi4_SLSO2_P33_8_OUT = {&MODULE_QSPI4, 2, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt3}

Definition at line 217 of file IfxQspi_PinMap.c.

◆ IfxQspi4_SLSO3_P22_2_OUT

IfxQspi_Slso_Out IfxQspi4_SLSO3_P22_2_OUT = {&MODULE_QSPI4, 3, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt3}

Definition at line 218 of file IfxQspi_PinMap.c.

◆ IfxQspi4_SLSO4_P02_12_OUT

IfxQspi_Slso_Out IfxQspi4_SLSO4_P02_12_OUT = {&MODULE_QSPI4, 4, {&MODULE_P02,12}, IfxPort_OutputIdx_alt3}

Definition at line 219 of file IfxQspi_PinMap.c.

◆ IfxQspi4_SLSO4_P23_5_OUT

IfxQspi_Slso_Out IfxQspi4_SLSO4_P23_5_OUT = {&MODULE_QSPI4, 4, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt3}

Definition at line 220 of file IfxQspi_PinMap.c.

◆ IfxQspi4_SLSO5_P02_15_OUT

IfxQspi_Slso_Out IfxQspi4_SLSO5_P02_15_OUT = {&MODULE_QSPI4, 5, {&MODULE_P02,15}, IfxPort_OutputIdx_alt3}

Definition at line 221 of file IfxQspi_PinMap.c.

◆ IfxQspi4_SLSO5_P23_4_OUT

IfxQspi_Slso_Out IfxQspi4_SLSO5_P23_4_OUT = {&MODULE_QSPI4, 5, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt3}

Definition at line 222 of file IfxQspi_PinMap.c.

◆ IfxQspi4_SLSO6_P02_13_OUT

IfxQspi_Slso_Out IfxQspi4_SLSO6_P02_13_OUT = {&MODULE_QSPI4, 6, {&MODULE_P02,13}, IfxPort_OutputIdx_alt3}

Definition at line 223 of file IfxQspi_PinMap.c.

◆ IfxQspi4_SLSO6_P23_1_OUT

IfxQspi_Slso_Out IfxQspi4_SLSO6_P23_1_OUT = {&MODULE_QSPI4, 6, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt3}

Definition at line 224 of file IfxQspi_PinMap.c.

◆ IfxQspi4_SLSO7_P02_1_OUT

IfxQspi_Slso_Out IfxQspi4_SLSO7_P02_1_OUT = {&MODULE_QSPI4, 7, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt2}

Definition at line 225 of file IfxQspi_PinMap.c.

◆ IfxQspi4_SLSO7_P33_7_OUT

IfxQspi_Slso_Out IfxQspi4_SLSO7_P33_7_OUT = {&MODULE_QSPI4, 7, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt3}

Definition at line 226 of file IfxQspi_PinMap.c.

◆ IfxQspi_Mrst_In_pinTable

const IfxQspi_Mrst_In* IfxQspi_Mrst_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS]

Definition at line 229 of file IfxQspi_PinMap.c.

◆ IfxQspi_Mrst_Out_pinTable

const IfxQspi_Mrst_Out* IfxQspi_Mrst_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxQspi0_MRST_P20_12_OUT,
&IfxQspi0_MRST_P22_6_OUT,
&IfxQspi0_MRST_P22_9_OUT
},
{
&IfxQspi1_MRST_P10_1_OUT,
&IfxQspi1_MRST_P10_6_OUT,
&IfxQspi1_MRST_P11_3_OUT
},
{
&IfxQspi2_MRST_P15_4_OUT,
&IfxQspi2_MRST_P15_7_OUT,
&IfxQspi2_MRST_P34_4_OUT
},
{
&IfxQspi3_MRST_P01_5_OUT,
&IfxQspi3_MRST_P02_5_OUT,
&IfxQspi3_MRST_P10_7_OUT
},
{
&IfxQspi4_MRST_P22_1_OUT,
&IfxQspi4_MRST_P33_13_OUT,
NULL_PTR
}
}
IfxQspi2_MRST_P34_4_OUT
IfxQspi_Mrst_Out IfxQspi2_MRST_P34_4_OUT
Definition: IfxQspi_PinMap.c:75
IfxQspi2_MRST_P15_7_OUT
IfxQspi_Mrst_Out IfxQspi2_MRST_P15_7_OUT
Definition: IfxQspi_PinMap.c:74
IfxQspi1_MRST_P10_6_OUT
IfxQspi_Mrst_Out IfxQspi1_MRST_P10_6_OUT
Definition: IfxQspi_PinMap.c:71
IfxQspi3_MRST_P02_5_OUT
IfxQspi_Mrst_Out IfxQspi3_MRST_P02_5_OUT
Definition: IfxQspi_PinMap.c:77
IfxQspi4_MRST_P22_1_OUT
IfxQspi_Mrst_Out IfxQspi4_MRST_P22_1_OUT
Definition: IfxQspi_PinMap.c:79
IfxQspi3_MRST_P01_5_OUT
IfxQspi_Mrst_Out IfxQspi3_MRST_P01_5_OUT
Definition: IfxQspi_PinMap.c:76
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxQspi1_MRST_P11_3_OUT
IfxQspi_Mrst_Out IfxQspi1_MRST_P11_3_OUT
Definition: IfxQspi_PinMap.c:72
IfxQspi3_MRST_P10_7_OUT
IfxQspi_Mrst_Out IfxQspi3_MRST_P10_7_OUT
Definition: IfxQspi_PinMap.c:78
IfxQspi0_MRST_P22_6_OUT
IfxQspi_Mrst_Out IfxQspi0_MRST_P22_6_OUT
Definition: IfxQspi_PinMap.c:68
IfxQspi1_MRST_P10_1_OUT
IfxQspi_Mrst_Out IfxQspi1_MRST_P10_1_OUT
Definition: IfxQspi_PinMap.c:70
IfxQspi4_MRST_P33_13_OUT
IfxQspi_Mrst_Out IfxQspi4_MRST_P33_13_OUT
Definition: IfxQspi_PinMap.c:80
IfxQspi0_MRST_P20_12_OUT
IfxQspi_Mrst_Out IfxQspi0_MRST_P20_12_OUT
Definition: IfxQspi_PinMap.c:67
IfxQspi0_MRST_P22_9_OUT
IfxQspi_Mrst_Out IfxQspi0_MRST_P22_9_OUT
Definition: IfxQspi_PinMap.c:69
IfxQspi2_MRST_P15_4_OUT
IfxQspi_Mrst_Out IfxQspi2_MRST_P15_4_OUT
Definition: IfxQspi_PinMap.c:73

Definition at line 272 of file IfxQspi_PinMap.c.

◆ IfxQspi_Mtsr_In_pinTable

const IfxQspi_Mtsr_In* IfxQspi_Mtsr_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS]

Definition at line 300 of file IfxQspi_PinMap.c.

◆ IfxQspi_Mtsr_Out_pinTable

const IfxQspi_Mtsr_Out* IfxQspi_Mtsr_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS]

Definition at line 333 of file IfxQspi_PinMap.c.

◆ IfxQspi_Sclk_In_pinTable

const IfxQspi_Sclk_In* IfxQspi_Sclk_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS]

Definition at line 371 of file IfxQspi_PinMap.c.

◆ IfxQspi_Sclk_Out_pinTable

const IfxQspi_Sclk_Out* IfxQspi_Sclk_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS]

Definition at line 404 of file IfxQspi_PinMap.c.

◆ IfxQspi_Slsi_In_pinTable

const IfxQspi_Slsi_In* IfxQspi_Slsi_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxQspi0_SLSIA_P20_13_IN,
&IfxQspi0_SLSIB_P20_9_IN
},
{
&IfxQspi1_SLSIA_P11_10_IN,
NULL_PTR
},
{
&IfxQspi2_SLSIA_P15_2_IN,
&IfxQspi2_SLSIB_P15_1_IN
},
{
&IfxQspi3_SLSIA_P02_4_IN,
&IfxQspi3_SLSIB_P01_3_IN
},
{
&IfxQspi4_SLSIA_P33_10_IN,
&IfxQspi4_SLSIB_P22_2_IN
}
}
IfxQspi3_SLSIA_P02_4_IN
IfxQspi_Slsi_In IfxQspi3_SLSIA_P02_4_IN
Definition: IfxQspi_PinMap.c:153
IfxQspi2_SLSIA_P15_2_IN
IfxQspi_Slsi_In IfxQspi2_SLSIA_P15_2_IN
Definition: IfxQspi_PinMap.c:151
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxQspi0_SLSIB_P20_9_IN
IfxQspi_Slsi_In IfxQspi0_SLSIB_P20_9_IN
Definition: IfxQspi_PinMap.c:149
IfxQspi3_SLSIB_P01_3_IN
IfxQspi_Slsi_In IfxQspi3_SLSIB_P01_3_IN
Definition: IfxQspi_PinMap.c:154
IfxQspi4_SLSIA_P33_10_IN
IfxQspi_Slsi_In IfxQspi4_SLSIA_P33_10_IN
Definition: IfxQspi_PinMap.c:155
IfxQspi0_SLSIA_P20_13_IN
IfxQspi_Slsi_In IfxQspi0_SLSIA_P20_13_IN
Definition: IfxQspi_PinMap.c:148
IfxQspi2_SLSIB_P15_1_IN
IfxQspi_Slsi_In IfxQspi2_SLSIB_P15_1_IN
Definition: IfxQspi_PinMap.c:152
IfxQspi4_SLSIB_P22_2_IN
IfxQspi_Slsi_In IfxQspi4_SLSIB_P22_2_IN
Definition: IfxQspi_PinMap.c:156
IfxQspi1_SLSIA_P11_10_IN
IfxQspi_Slsi_In IfxQspi1_SLSIA_P11_10_IN
Definition: IfxQspi_PinMap.c:150

Definition at line 452 of file IfxQspi_PinMap.c.

◆ IfxQspi_Slso_Out_pinTable

const IfxQspi_Slso_Out* IfxQspi_Slso_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_NUM_SLAVESELECTS][IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS]

Definition at line 475 of file IfxQspi_PinMap.c.


iLLD_TC38A: IfxQspi_PinMap.h File Reference

  • _PinMap
Data Structures | Macros | Variables
IfxQspi_PinMap.h File Reference
iLLD » QSPI

QSPI I/O map. More...

#include <IfxQspi_reg.h>
#include <_Impl/IfxQspi_cfg.h>
#include <Port/Std/IfxPort.h>
Include dependency graph for IfxQspi_PinMap.h:

Go to the source code of this file.

Data Structures

struct | IfxQspi_Mrst_In
MRST pin mapping structure. More...
struct | IfxQspi_Mtsr_In
MTSR pin mapping structure. More...
struct | IfxQspi_Sclk_In
SCLK pin mapping structure. More...
struct | IfxQspi_Slsi_In
SLSI pin mapping structure. More...
struct | IfxQspi_Hsicin_In
HSICIN pin mapping structure. More...
struct | IfxQspi_Mrst_Out
MRST pin mapping structure. More...
struct | IfxQspi_Mtsr_Out
MTSR pin mapping structure. More...
struct | IfxQspi_Sclk_Out
SCLK pin mapping structure. More...
struct | IfxQspi_Slso_Out
SLSO pin mapping structure. More...

Macros

#define | IFXQSPI_PINMAP_NUM_MODULES 5
Table dimensions. More...
#define | IFXQSPI_PINMAP_NUM_SLAVESELECTS 14
#define | IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS 6
#define | IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS 3
#define | IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS 4
#define | IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS 5
#define | IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS 4
#define | IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS 7
#define | IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS 2
#define | IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS 2

Variables

IFX_EXTERN IfxQspi_Mrst_In IfxQspi0_MRSTA_P20_12_IN
Master SPI data input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi0_MRSTB_P22_9_IN
Master SPI data input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi0_MRSTC_P22_6_IN
Master SPI data input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi1_MRSTA_P10_1_IN
Master SPI data input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi1_MRSTB_P11_3_IN
Master SPI data input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTA_P15_4_IN
Master SPI data input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTB_P15_7_IN
Master SPI data input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTCN_P21_2_IN
Master SPI data input (LVDS N line) More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTCP_P21_3_IN
Master SPI data input (LVDS P line) More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTD_P34_4_IN
Master SPI data input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTE_P15_2_IN
Master SPI data input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTFN_P14_9_IN
Master SPI data input (LVDS N line) More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTFP_P14_10_IN
Master SPI data input (LVDS P line) More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTA_P02_5_IN
Master SPI data input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTB_P10_7_IN
Master SPI data input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTC_P01_5_IN
Master SPI data input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi4_MRSTA_P33_13_IN
Master SPI data input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi4_MRSTB_P22_1_IN
Master SPI data input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi4_MRSTCN_P21_2_IN
Master SPI data input (LVDS N line) More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi4_MRSTCP_P21_3_IN
Master SPI data input (LVDS P line) More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi4_MRSTDN_P21_0_IN
Master SPI data input (LVDS N line) More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi4_MRSTDP_P21_1_IN
Master SPI data input (LVDS P line) More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi0_MRST_P20_12_OUT
Slave SPI data output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi0_MRST_P22_6_OUT
Slave SPI data output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi0_MRST_P22_9_OUT
Slave SPI data output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi1_MRST_P10_1_OUT
Slave SPI data output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi1_MRST_P10_6_OUT
Slave SPI data output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi1_MRST_P11_3_OUT
Slave SPI data output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi2_MRST_P15_4_OUT
Slave SPI data output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi2_MRST_P15_7_OUT
Slave SPI data output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi2_MRST_P34_4_OUT
Slave SPI data output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P01_5_OUT
Slave SPI data output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P02_5_OUT
Slave SPI data output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P10_7_OUT
Slave SPI data output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi4_MRST_P22_1_OUT
Slave SPI data output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi4_MRST_P33_13_OUT
Slave SPI data output. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi0_MTSRA_P20_14_IN
Slave SPI data input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi0_MTSRB_P22_10_IN
Slave SPI data input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi0_MTSRC_P22_5_IN
Slave SPI data input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi1_MTSRA_P10_3_IN
Slave SPI data input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi1_MTSRB_P11_9_IN
Slave SPI data input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi1_MTSRC_P10_4_IN
Slave SPI data input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi2_MTSRA_P15_5_IN
Slave SPI data input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi2_MTSRB_P15_6_IN
Slave SPI data input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi2_MTSRD_P34_5_IN
Slave SPI data input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRA_P02_6_IN
Slave SPI data input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRB_P10_6_IN
Slave SPI data input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRC_P01_6_IN
Slave SPI data input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi4_MTSRA_P33_12_IN
Slave SPI data input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi4_MTSRB_P22_0_IN
Slave SPI data input. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi0_MTSR_P20_12_OUT
Master SPI data output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi0_MTSR_P20_14_OUT
Master SPI data output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi0_MTSR_P22_10_OUT
Master SPI data output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi0_MTSR_P22_5_OUT
Master SPI data output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_1_OUT
Master SPI data output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_3_OUT
Master SPI data output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_4_OUT
Master SPI data output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P11_9_OUT
Master SPI data output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSRN_P13_2_OUT
Master SPI data output (LVDS N line) More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSRP_P13_3_OUT
Master SPI data output (LVDS P line) More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSR_P15_5_OUT
Master SPI data output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSR_P15_6_OUT
Master SPI data output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSR_P34_5_OUT
Master SPI data output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P01_6_OUT
Master SPI data output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P02_6_OUT
Master SPI data output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P10_6_OUT
Master SPI data output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi4_MTSRN_P22_2_OUT
Master SPI data output (LVDS N line) More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi4_MTSRP_P22_3_OUT
Master SPI data output (LVDS P line) More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi4_MTSR_P22_0_OUT
Master SPI data output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi4_MTSR_P33_12_OUT
Master SPI data output. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi0_SCLKA_P20_11_IN
Slave SPI clock inputs. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi0_SCLKB_P22_8_IN
Slave SPI clock inputs. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi0_SCLKC_P22_7_IN
Slave SPI clock inputs. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi1_SCLKA_P10_2_IN
Slave SPI clock inputs. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi1_SCLKB_P11_6_IN
Slave SPI clock inputs. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi2_SCLKA_P15_3_IN
Slave SPI clock inputs. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi2_SCLKB_P15_8_IN
Slave SPI clock inputs. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi2_SCLKD_P33_14_IN
Slave SPI clock inputs. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKA_P02_7_IN
Slave SPI clock inputs. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKB_P10_8_IN
Slave SPI clock inputs. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKC_P01_7_IN
Slave SPI clock inputs. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi4_SCLKA_P33_11_IN
Slave SPI clock inputs. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi4_SCLKB_P22_3_IN
Slave SPI clock inputs. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi0_SCLK_P20_11_OUT
Master SPI clock output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi0_SCLK_P20_13_OUT
Master SPI clock output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi0_SCLK_P22_7_OUT
Master SPI clock output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi0_SCLK_P22_8_OUT
Master SPI clock output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi1_SCLK_P10_2_OUT
Master SPI clock output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi1_SCLK_P11_6_OUT
Master SPI clock output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLKN_P13_0_OUT
Master SPI clock output (LVDS N line) More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLKP_P13_1_OUT
Master SPI clock output (LVDS P line) More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_3_OUT
Master SPI clock output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_6_OUT
Master SPI clock output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_8_OUT
Master SPI clock output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P33_14_OUT
Master SPI clock output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P33_1_OUT
Master SPI clock output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P01_7_OUT
Master SPI clock output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P02_7_OUT
Master SPI clock output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P10_8_OUT
Master SPI clock output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi4_SCLKN_P22_0_OUT
Master SPI clock output (LVDS N line) More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi4_SCLKP_P22_1_OUT
Master SPI clock output (LVDS P line) More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi4_SCLK_P22_3_OUT
Master SPI clock output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi4_SCLK_P33_11_OUT
Master SPI clock output. More...
IFX_EXTERN IfxQspi_Slsi_In IfxQspi0_SLSIA_P20_13_IN
Slave select input. More...
IFX_EXTERN IfxQspi_Slsi_In IfxQspi0_SLSIB_P20_9_IN
Slave select input. More...
IFX_EXTERN IfxQspi_Slsi_In IfxQspi1_SLSIA_P11_10_IN
Slave select input. More...
IFX_EXTERN IfxQspi_Slsi_In IfxQspi2_SLSIA_P15_2_IN
Slave select input. More...
IFX_EXTERN IfxQspi_Slsi_In IfxQspi2_SLSIB_P15_1_IN
Slave select input. More...
IFX_EXTERN IfxQspi_Slsi_In IfxQspi3_SLSIA_P02_4_IN
Slave select input. More...
IFX_EXTERN IfxQspi_Slsi_In IfxQspi3_SLSIB_P01_3_IN
Slave select input. More...
IFX_EXTERN IfxQspi_Slsi_In IfxQspi4_SLSIA_P33_10_IN
Slave select input. More...
IFX_EXTERN IfxQspi_Slsi_In IfxQspi4_SLSIB_P22_2_IN
Slave select input. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO0_P20_8_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO10_P22_11_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO11_P23_6_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO12_P22_4_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO13_P15_0_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO1_P20_9_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO2_P20_13_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO3_P11_10_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO4_P11_11_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO5_P11_2_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO6_P20_10_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO7_P33_5_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO8_P20_6_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO9_P20_3_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO0_P20_8_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO10_P10_0_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO1_P20_9_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO2_P20_13_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO3_P11_10_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO4_P11_11_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO5_P11_2_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO6_P33_10_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO7_P33_5_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO8_P10_4_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO9_P10_5_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO0_P15_2_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO10_P33_2_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO10_P34_3_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO11_P33_15_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO11_P33_6_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO12_P32_6_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO12_P33_4_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO1_P14_2_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO2_P14_6_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO3_P14_3_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO4_P14_7_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO5_P15_1_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO6_P33_13_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO7_P20_10_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO8_P20_6_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO9_P20_3_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO0_P02_4_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO10_P01_4_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO1_P02_0_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO2_P02_1_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO3_P00_5_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO3_P02_2_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO4_P00_2_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO4_P02_3_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO5_P02_12_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO5_P02_8_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO6_P00_8_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO6_P02_15_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO7_P00_9_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO7_P02_13_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO8_P10_5_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO9_P01_3_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO0_P33_10_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO1_P33_9_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO2_P33_3_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO2_P33_8_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO3_P22_2_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO4_P02_12_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO4_P23_5_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO5_P02_15_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO5_P23_4_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO6_P02_13_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO6_P23_1_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO7_P02_1_OUT
Master slave select output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO7_P33_7_OUT
Master slave select output. More...
IFX_EXTERN const IfxQspi_Mrst_In * | IfxQspi_Mrst_In_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS]
IfxQspi_Mrst_In table. More...
IFX_EXTERN const IfxQspi_Mrst_Out * | IfxQspi_Mrst_Out_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS]
IfxQspi_Mrst_Out table. More...
IFX_EXTERN const IfxQspi_Mtsr_In * | IfxQspi_Mtsr_In_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS]
IfxQspi_Mtsr_In table. More...
IFX_EXTERN const IfxQspi_Mtsr_Out * | IfxQspi_Mtsr_Out_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS]
IfxQspi_Mtsr_Out table. More...
IFX_EXTERN const IfxQspi_Sclk_In * | IfxQspi_Sclk_In_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS]
IfxQspi_Sclk_In table. More...
IFX_EXTERN const IfxQspi_Sclk_Out * | IfxQspi_Sclk_Out_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS]
IfxQspi_Sclk_Out table. More...
IFX_EXTERN const IfxQspi_Slsi_In * | IfxQspi_Slsi_In_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS]
IfxQspi_Slsi_In table. More...
IFX_EXTERN const IfxQspi_Slso_Out * | IfxQspi_Slso_Out_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_NUM_SLAVESELECTS][IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS]
IfxQspi_Slso_Out table. More...

Detailed Description

QSPI I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxQspi_PinMap.h.


iLLD_TC38A: IfxQspi_SpiMaster.h File Reference

  • Qspi
  • SpiMaster
Data Structures | Typedefs | Enumerations | Functions
IfxQspi_SpiMaster.h File Reference
iLLD » QSPI

QSPI SPIMASTER details. More...

#include "Cpu/Irq/IfxCpu_Irq.h"
#include "Dma/Dma/IfxDma_Dma.h"
#include "Qspi/Std/IfxQspi.h"
#include "Scu/Std/IfxScuWdt.h"
Include dependency graph for IfxQspi_SpiMaster.h:

Go to the source code of this file.

Data Structures

struct | IfxQspi_SpiMaster_Input
SLSI pin configuration structure. More...
struct | IfxQspi_SpiMaster_Output
SLSO pin configuration structure. More...
struct | IfxQspi_SpiMaster_Dma
Dma handle. More...
struct | IfxQspi_SpiMaster_DmaConfig
Dma configuration. More...
struct | IfxQspi_SpiMaster_ErrorFlags
Qspi Master Mode Error Flags. More...
union | IfxQspi_SpiMaster_InputOutput
Union of Slave Select pins. More...
struct | IfxQspi_SpiMaster_MoveCounterControl
struct | IfxQspi_SpiMaster_Pins
Master pin IO configuration structure. More...
struct | IfxQspi_SpiMaster
Module handle data structure. More...
struct | IfxQspi_SpiMaster_ChannelConfig
Module Channel configuration structure. More...
struct | IfxQspi_SpiMaster_Channel_s
Module Channel handle structure. More...
struct | IfxQspi_SpiMaster_Config
Module configuration structure. More...

Typedefs

typedef struct IfxQspi_SpiMaster_Channel_s | IfxQspi_SpiMaster_Channel
typedef void(* | IfxQspi_SpiMaster_AutoSlso) (IfxQspi_SpiMaster_Channel *chHandle)

Enumerations

enum IfxQspi_SpiMaster_ChannelBasedCs {
IfxQspi_SpiMaster_ChannelBasedCs_disabled = 0,
IfxQspi_SpiMaster_ChannelBasedCs_enabled = 1
}
enum IfxQspi_SpiMaster_Mode {
IfxQspi_SpiMaster_Mode_short = 0,
IfxQspi_SpiMaster_Mode_long = 1,
IfxQspi_SpiMaster_Mode_shortContinuous = 2,
IfxQspi_SpiMaster_Mode_longContinuous = 3,
IfxQspi_SpiMaster_Mode_xxl = 4
}

Functions

IFX_EXTERN void | IfxQspi_SpiMaster_initModule (IfxQspi_SpiMaster *handle, const IfxQspi_SpiMaster_Config *config)
Initialises the module. More...
IFX_EXTERN void | IfxQspi_SpiMaster_initModuleConfig (IfxQspi_SpiMaster_Config *config, Ifx_QSPI *qspi)
Fills the config structure with default values. More...
IFX_EXTERN SpiIf_Status | IfxQspi_SpiMaster_initChannel (IfxQspi_SpiMaster_Channel *chHandle, const IfxQspi_SpiMaster_ChannelConfig *chConfig)
Initializes the channel. More...
IFX_EXTERN void | IfxQspi_SpiMaster_initChannelConfig (IfxQspi_SpiMaster_ChannelConfig *chConfig, IfxQspi_SpiMaster *handle)
Fills the config structure with default values. More...
IFX_EXTERN SpiIf_Status | IfxQspi_SpiMaster_exchange (IfxQspi_SpiMaster_Channel *chHandle, const void *src, void *dest, Ifx_SizeT count)
Exchanges data between source and data. More...
IFX_EXTERN SpiIf_Status | IfxQspi_SpiMaster_getStatus (IfxQspi_SpiMaster_Channel *chHandle)
Gets the transmission status. More...
IFX_EXTERN void | IfxQspi_SpiMaster_isrDmaReceive (IfxQspi_SpiMaster *qspiHandle)
Transmit interrupt handler. More...
IFX_EXTERN void | IfxQspi_SpiMaster_isrDmaTransmit (IfxQspi_SpiMaster *qspiHandle)
Transmit interrupt handler. More...
IFX_EXTERN void | IfxQspi_SpiMaster_isrError (IfxQspi_SpiMaster *handle)
Error Interrupt handler. More...
IFX_EXTERN IfxQspi_PhaseTransitionEvent | IfxQspi_SpiMaster_isrPhaseTransition (IfxQspi_SpiMaster *handle)
Phase Transition interrupt handler. More...
IFX_EXTERN void | IfxQspi_SpiMaster_isrReceive (IfxQspi_SpiMaster *handle)
Receive Interrupt handler. More...
IFX_EXTERN void | IfxQspi_SpiMaster_isrTransmit (IfxQspi_SpiMaster *handle)
Transmit interrupt handler. More...
IFX_EXTERN IfxQspi_PhaseTransitionEvent | IfxQspi_SpiMaster_isrUserDefined (IfxQspi_SpiMaster *handle)
User defined interrupt handler. More...
IFX_INLINE uint32 | IfxQspi_SpiMaster_readReceiveFifo (IfxQspi_SpiMaster *handle)
Reads data or status in RxFIFO. More...
IFX_INLINE void | IfxQspi_SpiMaster_writeBasicConfiguration (IfxQspi_SpiMaster *handle, uint32 baconVal)
Writes Basic configuration value to Tx FIFO. More...
IFX_INLINE void | IfxQspi_SpiMaster_writeExtendedConfiguration (IfxQspi_SpiMaster_Channel *chHandle, uint32 econVal)
Writes extended configuration of the channel. More...
IFX_INLINE void | IfxQspi_SpiMaster_writeMixedDataConfiguration (IfxQspi_SpiMaster *handle, uint32 mixEntryVal)
Writes data and configuration mixed value to Tx FIFO. More...
IFX_INLINE void | IfxQspi_SpiMaster_writeTransmitFifo (IfxQspi_SpiMaster_Channel *chHandle, uint32 data)
Writes the data to TxFIFO. More...
IFX_EXTERN void | IfxQspi_SpiMaster_packLongModeBuffer (IfxQspi_SpiMaster_Channel *chHandle, void *data, uint32 *longFifoBuffer, Ifx_SizeT dataLength)
pack data to Long mode buffer More...
IFX_EXTERN SpiIf_ChConfig | IfxQspi_SpiMaster_getChannelConfig (IfxQspi_SpiMaster_Channel *chHandle)
Gets the channel configuration. More...
IFX_EXTERN void | IfxQspi_SpiMaster_moveCounterControlConfiguration (Ifx_QSPI *qspi, IfxQspi_SpiMaster_MoveCounterControl *moveCounter)
IFX_EXTERN SpiIf_Status | IfxQspi_SpiMaster_setChannelBaudrate (IfxQspi_SpiMaster_Channel *chHandle, float32 baudrate)
Set the channel baudrate. More...

Detailed Description

QSPI SPIMASTER details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxQspi_SpiMaster.h.

Typedef Documentation

◆ IfxQspi_SpiMaster_AutoSlso

typedef void(* IfxQspi_SpiMaster_AutoSlso) (IfxQspi_SpiMaster_Channel *chHandle)

Definition at line 521 of file IfxQspi_SpiMaster.h.

◆ IfxQspi_SpiMaster_Channel

typedef struct IfxQspi_SpiMaster_Channel_s IfxQspi_SpiMaster_Channel

Definition at line 519 of file IfxQspi_SpiMaster.h.

Function Documentation

◆ IfxQspi_SpiMaster_getChannelConfig()

IFX_EXTERN SpiIf_ChConfig IfxQspi_SpiMaster_getChannelConfig ( IfxQspi_SpiMaster_Channel * chHandle )

Gets the channel configuration.

Parameters
chHandle Module Channel handle
Returns
Channel configuration

Definition at line 182 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_setChannelBaudrate().

◆ IfxQspi_SpiMaster_moveCounterControlConfiguration()

IFX_EXTERN void IfxQspi_SpiMaster_moveCounterControlConfiguration | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_SpiMaster_MoveCounterControl * | moveCounter
 | ) |  |
Parameters
qspi | module register handler
moveCounter | Pointer to move counter structure
Returns
None

Definition at line 775 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_initChannel().

◆ IfxQspi_SpiMaster_setChannelBaudrate()

IFX_EXTERN SpiIf_Status IfxQspi_SpiMaster_setChannelBaudrate | ( | IfxQspi_SpiMaster_Channel * | chHandle,
 |  | float32 | baudrate
 | ) |  |

Set the channel baudrate.

Parameters
chHandle | Module Channel handle
baudrate | Baudrate to be configured (in Baud)
Returns
Status of Channel (busy or ok or failure)

Definition at line 909 of file IfxQspi_SpiMaster.c.


iLLD_TC38A: IfxQspi_SpiSlave.h File Reference

  • Qspi
  • SpiSlave
Data Structures | Functions
IfxQspi_SpiSlave.h File Reference
iLLD » QSPI

QSPI SPISLAVE details. More...

#include "Cpu/Irq/IfxCpu_Irq.h"
#include "Dma/Dma/IfxDma_Dma.h"
#include "Qspi/Std/IfxQspi.h"
#include "Scu/Std/IfxScuWdt.h"
Include dependency graph for IfxQspi_SpiSlave.h:

Go to the source code of this file.

Data Structures

struct | IfxQspi_SpiSlave_Dma
Dma handle. More...
struct | IfxQspi_SpiSlave_DmaConfig
Dma configuration. More...
struct | IfxQspi_SpiSlave_ErrorFlags
Qspi Slave Mode Error Flags. More...
struct | IfxQspi_SpiSlave_Pins
Slave pin IO configuration structure. More...
struct | IfxQspi_SpiSlave_Protocol
Configures the SPI Protocol. More...
struct | IfxQspi_SpiSlave
Module handle data structure. More...
struct | IfxQspi_SpiSlave_Config
Module configuration structure. More...

Functions

IFX_EXTERN void | IfxQspi_SpiSlave_initModule (IfxQspi_SpiSlave *handle, const IfxQspi_SpiSlave_Config *config)
Initialises the module. More...
IFX_EXTERN void | IfxQspi_SpiSlave_initModuleConfig (IfxQspi_SpiSlave_Config *config, Ifx_QSPI *qspi)
Fills the config structure with default values. More...
IFX_EXTERN SpiIf_Status | IfxQspi_SpiSlave_exchange (IfxQspi_SpiSlave *handle, const void *src, void *dest, Ifx_SizeT count)
Exchanges data between source and data. More...
IFX_EXTERN SpiIf_Status | IfxQspi_SpiSlave_getStatus (IfxQspi_SpiSlave *handle)
Gets the transmission status. More...
IFX_EXTERN void | IfxQspi_SpiSlave_isrDmaReceive (IfxQspi_SpiSlave *qspiHandle)
Dma receive interrupt handler. More...
IFX_EXTERN void | IfxQspi_SpiSlave_isrDmaTransmit (IfxQspi_SpiSlave *qspiHandle)
Transmit interrupt handler. More...
IFX_EXTERN void | IfxQspi_SpiSlave_isrError (IfxQspi_SpiSlave *handle)
Error Interrupt handler. More...
IFX_EXTERN void | IfxQspi_SpiSlave_isrReceive (IfxQspi_SpiSlave *handle)
Receive Interrupt handler. More...
IFX_EXTERN void | IfxQspi_SpiSlave_isrTransmit (IfxQspi_SpiSlave *handle)
Transmit interrupt handler. More...
IFX_INLINE uint32 | IfxQspi_SpiSlave_readReceiveFifo (IfxQspi_SpiSlave *handle)
Reads data or status in RxFIFO. More...
IFX_INLINE void | IfxQspi_SpiSlave_writeTransmitFifo (IfxQspi_SpiSlave *handle, uint32 data)
Writes the data to TxFIFO. More...

Detailed Description

QSPI SPISLAVE details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxQspi_SpiSlave.h.


iLLD_TC38A: IfxQspi.h File Reference

  • Qspi
  • Std
Data Structures | Macros | Enumerations | Functions
IfxQspi.h File Reference
iLLD » QSPI

QSPI basic functionality. More...

#include "_Impl/IfxQspi_cfg.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "If/SpiIf.h"
#include "Scu/Std/IfxScuCcu.h"
#include "Src/Std/IfxSrc.h"
#include "_PinMap/IfxQspi_PinMap.h"
Include dependency graph for IfxQspi.h:

Go to the source code of this file.

Data Structures

struct IfxQspi_DelayConst
Structure holding the "pre" and "delay" values. To be populated into BACON register after delay calculation. More...

Macros

#define | IFXQSPI_BACONSIZE(Datasize) (((((Datasize) % 16) == 0) ? ((uint8)((Datasize) / 16)) : ((uint8)((Datasize) / 16) + 1)))
Get Fifo size required for Long / Long continous mode interms 32-bit LONG MODE FIFO size (data size in bytes) = (size for Bacon) + (Datasize converted to 32-bit) More...
#define | IFXQSPI_FIFO32BITSIZE(Datasize) ((((Datasize) % 4) == 0) ? ((uint8)((Datasize) / 4)) : ((uint8)((Datasize) / 4) + 1))
#define | IFXQSPI_GETLONGMODEFIFOSIZE(Datasize) (IFXQSPI_BACONSIZE(Datasize) + IFXQSPI_FIFO32BITSIZE(Datasize))
#define | IFXQSPI_ERRORENABLEMASK ((uint32)0x1FF)
Errors enable mask for ERRORENS. More...

Enumerations

enum IfxQspi_ChannelId {
IfxQspi_ChannelId_0,
IfxQspi_ChannelId_1,
IfxQspi_ChannelId_2,
IfxQspi_ChannelId_3,
IfxQspi_ChannelId_4,
IfxQspi_ChannelId_5,
IfxQspi_ChannelId_6,
IfxQspi_ChannelId_7,
IfxQspi_ChannelId_8,
IfxQspi_ChannelId_9,
IfxQspi_ChannelId_10,
IfxQspi_ChannelId_11,
IfxQspi_ChannelId_12,
IfxQspi_ChannelId_13,
IfxQspi_ChannelId_14
}
QSPI channel Number (BACON.CS) More...
enum IfxQspi_DataLengthUnit {
IfxQspi_DataLengthUnit_bit = 0,
IfxQspi_DataLengthUnit_byte = 1
}
Data length unit of a frame (BACON.BYTE) More...
enum IfxQspi_Error {
IfxQspi_Error_none = 0,
IfxQspi_Error_parity = 1,
IfxQspi_Error_configuration = 2,
IfxQspi_Error_baudrate = 4,
IfxQspi_Error_txfifoOverflow = 8,
IfxQspi_Error_txfifoUnderflow = 16,
IfxQspi_Error_rxfifoOverflow = 32,
IfxQspi_Error_rxfifoUnderflow = 64,
IfxQspi_Error_expectTimeout = 128,
IfxQspi_Error_slsiMisplacedInactivation = 256
}
QSPI Error Flags (STATUS.ERRORFLAGS) More...
enum IfxQspi_ExpectTimeout {
IfxQspi_ExpectTimeout_64 = 0,
IfxQspi_ExpectTimeout_128 = 1,
IfxQspi_ExpectTimeout_256 = 2,
IfxQspi_ExpectTimeout_512 = 3,
IfxQspi_ExpectTimeout_1024 = 4,
IfxQspi_ExpectTimeout_2048 = 5,
IfxQspi_ExpectTimeout_4096 = 6,
IfxQspi_ExpectTimeout_8192 = 7,
IfxQspi_ExpectTimeout_16384 = 8,
IfxQspi_ExpectTimeout_32768 = 9,
IfxQspi_ExpectTimeout_65536 = 10,
IfxQspi_ExpectTimeout_131072 = 11,
IfxQspi_ExpectTimeout_262144 = 12,
IfxQspi_ExpectTimeout_524288 = 13,
IfxQspi_ExpectTimeout_1048576 = 14,
IfxQspi_ExpectTimeout_2097152 = 15
}
Frame Expect phase time out value. More...
enum IfxQspi_Mode {
IfxQspi_Mode_master = 0,
IfxQspi_Mode_pwmOverQspi = 1,
IfxQspi_Mode_slave = 2
}
QSPI controller mode (GLOBALCON.MODE) More...
enum IfxQspi_PauseRunTransition {
IfxQspi_PauseRunTransition_pause = 0,
IfxQspi_PauseRunTransition_run = 1
}
Request between pause and Run transition. More...
enum IfxQspi_Phase {
IfxQspi_Phase_wait = 0,
IfxQspi_Phase_idleA = 1,
IfxQspi_Phase_idleB = 2,
IfxQspi_Phase_lead = 3,
IfxQspi_Phase_data = 4,
IfxQspi_Phase_trail = 5,
IfxQspi_Phase_expect = 6,
IfxQspi_Phase_leadStrobe = 7,
IfxQspi_Phase_trailStrobe = 8
}
QSPI frame phase (STATUS.PHASE) More...
enum IfxQspi_PhaseTransitionEvent {
IfxQspi_PhaseTransitionEvent_endOfWait = 0,
IfxQspi_PhaseTransitionEvent_serialClockPolarityChange = 1,
IfxQspi_PhaseTransitionEvent_startOfFrame = 2,
IfxQspi_PhaseTransitionEvent_transmitBufferEmptied = 3,
IfxQspi_PhaseTransitionEvent_receiveBufferFilled = 4,
IfxQspi_PhaseTransitionEvent_endOfFrame = 5,
IfxQspi_PhaseTransitionEvent_dataNotAvailable = 6,
IfxQspi_PhaseTransitionEvent_endOfExpect = 7
}
Phase Transition Event. More...
enum IfxQspi_Reset {
IfxQspi_Reset_none = 0,
IfxQspi_Reset_stateMachineAndFifo = 1,
IfxQspi_Reset_registers = 2,
IfxQspi_Reset_kernel = 3
}
Reset Request (GLOBALCON.RESETS) More...
enum IfxQspi_RxFifoInt {
IfxQspi_RxFifoInt_0,
IfxQspi_RxFifoInt_1,
IfxQspi_RxFifoInt_2,
IfxQspi_RxFifoInt_3
}
Receive Fifo Interrupt Threshold. More...
enum IfxQspi_SleepMode {
IfxQspi_SleepMode_enable = 0,
IfxQspi_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_QSPI.CLC.B.EDIS. More...
enum IfxQspi_StrobeDelay {
IfxQspi_StrobeDelay_1,
IfxQspi_StrobeDelay_2,
IfxQspi_StrobeDelay_3,
IfxQspi_StrobeDelay_4,
IfxQspi_StrobeDelay_5,
IfxQspi_StrobeDelay_6,
IfxQspi_StrobeDelay_7,
IfxQspi_StrobeDelay_8,
IfxQspi_StrobeDelay_9,
IfxQspi_StrobeDelay_10,
IfxQspi_StrobeDelay_11,
IfxQspi_StrobeDelay_12,
IfxQspi_StrobeDelay_13,
IfxQspi_StrobeDelay_14,
IfxQspi_StrobeDelay_15,
IfxQspi_StrobeDelay_16,
IfxQspi_StrobeDelay_17,
IfxQspi_StrobeDelay_18,
IfxQspi_StrobeDelay_19,
IfxQspi_StrobeDelay_20,
IfxQspi_StrobeDelay_21,
IfxQspi_StrobeDelay_22,
IfxQspi_StrobeDelay_23,
IfxQspi_StrobeDelay_24,
IfxQspi_StrobeDelay_25,
IfxQspi_StrobeDelay_26,
IfxQspi_StrobeDelay_27,
IfxQspi_StrobeDelay_28,
IfxQspi_StrobeDelay_29,
IfxQspi_StrobeDelay_30,
IfxQspi_StrobeDelay_31,
IfxQspi_StrobeDelay_32
}
STROBE delay for SLSO in delayed mode (GLOBALCON.STROBE) More...
enum IfxQspi_TxFifoInt {
IfxQspi_TxFifoInt_1,
IfxQspi_TxFifoInt_2,
IfxQspi_TxFifoInt_3,
IfxQspi_TxFifoInt_4
}
Transmit Fifo Interrupt Threshold. More...
enum IfxQspi_FifoMode {
IfxQspi_FifoMode_combinedMove = 0,
IfxQspi_FifoMode_singleMove = 1,
IfxQspi_FifoMode_batchMove = 2
}
Transmit FIFO mode. More...
enum IfxQspi_SuspendMode {
IfxQspi_SuspendMode_none = 0,
IfxQspi_SuspendMode_hard = 1,
IfxQspi_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...

Functions

IFX_INLINE void | IfxQspi_clearAllEventFlags (Ifx_QSPI *qspi)
Clear ALL service requests. More...
IFX_INLINE void | IfxQspi_clearMoveCounterInterruptAfterLastFlag (Ifx_QSPI *qspi, boolean clearInterrupt)
clear the interrupt after last flag More...
IFX_INLINE void | IfxQspi_clearMoveCounterInterruptBeforeLastFlag (Ifx_QSPI *qspi, boolean clearInterrupt)
Clear the Interrupt before last flag. More...
IFX_INLINE void | IfxQspi_clearRxReq (Ifx_QSPI *qspi)
Clear RX service requests. More...
IFX_INLINE void | IfxQspi_clearTxReq (Ifx_QSPI *qspi)
Clear TX service requests. More...
IFX_INLINE void | IfxQspi_configPT1Event (Ifx_QSPI *qspi, IfxQspi_PhaseTransitionEvent pt1Config)
Configure PT1 event (also USR event depending if USREN=1 ) More...
IFX_INLINE void | IfxQspi_configPT2Event (Ifx_QSPI *qspi, IfxQspi_PhaseTransitionEvent pt2Config)
Configure PT2 event. More...
IFX_INLINE void | IfxQspi_enableLoopbackMode (Ifx_QSPI *qspi, boolean enable)
Enable/Disable Loopback mode. More...
IFX_INLINE void | IfxQspi_enablePT1Event (Ifx_QSPI *qspi, boolean enable)
enable Phase Transition1 Event More...
IFX_INLINE void | IfxQspi_enablePT2Event (Ifx_QSPI *qspi, boolean enable)
enable Phase Transition2 Event More...
IFX_INLINE void | IfxQspi_enableUsrEvent (Ifx_QSPI *qspi, boolean enable)
enable User Event (Event selected by PT1) More...
IFX_INLINE uint16 | IfxQspi_getErrorFlags (Ifx_QSPI *qspi)
IFX_INLINE void | IfxQspi_pause (Ifx_QSPI *qspi)
Request for Module in Pause state no interrupts no communication. More...
IFX_INLINE uint32 | IfxQspi_readReceiveFifo (Ifx_QSPI *qspi)
Read the oldest data from RXFIFO. More...
IFX_INLINE void | IfxQspi_requestReset (Ifx_QSPI *qspi, IfxQspi_Reset reset)
Request reset (State Machine & FIFO / Register / Module) More...
IFX_INLINE void | IfxQspi_run (Ifx_QSPI *qspi)
Request for QSPI in Run state. More...
IFX_INLINE void | IfxQspi_setMoveCounterInterruptAfterLastEnabled (Ifx_QSPI *qspi, boolean interruptEnabled)
Enable/Disable the Interrupt After last Byte. More...
IFX_INLINE void | IfxQspi_setMoveCounterInterruptAfterLastFlag (Ifx_QSPI *qspi, boolean setInterrupt)
Set the Interrupt after last flag. More...
IFX_INLINE void | IfxQspi_setMoveCounterInterruptBeforeLastEnabled (Ifx_QSPI *qspi, boolean interruptEnabled)
Enable the interrupt before last byte. More...
IFX_INLINE void | IfxQspi_setMoveCounterInterruptBeforeLastFlag (Ifx_QSPI *qspi, boolean setInterrupt)
set the interrupt before last flag More...
IFX_INLINE void | IfxQspi_setMoveCounterPrescalerTrailingDelay (Ifx_QSPI *qspi, const float baudrate)
Set the Trailing delay. More...
IFX_INLINE void | IfxQspi_setReceiveFifoInterrruptThreshold (Ifx_QSPI *qspi, IfxQspi_RxFifoInt rxFifoInt)
Set the threshold of RXFIFO for service request generation. More...
IFX_INLINE void | IfxQspi_trail2InjectionEnabled (Ifx_QSPI *qspi, boolean trail2Enabled)
specifies whether to inject the trail2 from bacon configuration or mccon configuration registers More...
IFX_INLINE void | IfxQspi_writeTransmitFifo (Ifx_QSPI *qspi, uint32 data)
Write Data into DATAENTRY register. More...
IFX_INLINE boolean | IfxQspi_isModuleSuspended (Ifx_QSPI *qspi)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxQspi_setSuspendMode (Ifx_QSPI *qspi, IfxQspi_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN void | IfxQspi_read16 (Ifx_QSPI *qspi, uint16 *data, Ifx_SizeT count)
Reads 16bit data from the Rx FIFO. More...
IFX_EXTERN void | IfxQspi_read32 (Ifx_QSPI *qspi, uint32 *data, Ifx_SizeT count)
Reads 32bit data from the Rx FIFO. More...
IFX_EXTERN void | IfxQspi_read8 (Ifx_QSPI *qspi, uint8 *data, Ifx_SizeT count)
Reads 8bit data from the Rx FIFO. More...
IFX_EXTERN void | IfxQspi_resetModule (Ifx_QSPI *qspi)
resets QSPI kernel More...
IFX_EXTERN void | IfxQspi_write16 (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint16 *data, Ifx_SizeT count)
Writes 16bit data into the Tx FIFO. More...
IFX_EXTERN void | IfxQspi_write32 (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 *data, Ifx_SizeT count)
Writes 32bit data into the Tx FIFO. More...
IFX_EXTERN void | IfxQspi_write8 (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 *data, Ifx_SizeT count)
Writes 8bit data into the Tx FIFO. More...
IFX_INLINE IfxQspi_Mode | IfxQspi_getMode (Ifx_QSPI *qspi)
Gets the current mode of QSPI. More...
IFX_INLINE float | IfxQspi_getModuleFrequency (Ifx_QSPI *qspi)
Specifies function to get module frequency. More...
IFX_INLINE IfxQspi_Phase | IfxQspi_getPhase (Ifx_QSPI *qspi)
Gets actual transmission phase. More...
IFX_INLINE uint8 | IfxQspi_getReceiveFifoLevel (Ifx_QSPI *qspi)
Gets the filling level of RXFIFO. More...
IFX_INLINE float | IfxQspi_getTimeQuantaFrequency (Ifx_QSPI *qspi)
Gets Time Quanta frequency. More...
IFX_INLINE uint8 | IfxQspi_getTransmitFifoLevel (Ifx_QSPI *qspi)
Gets the filling level of TXFIFO. More...
IFX_INLINE boolean | IfxQspi_isModuleEnabled (Ifx_QSPI *qspi)
Specifies the Module enable or disable status. More...
IFX_INLINE void | IfxQspi_setDisableModuleRequest (Ifx_QSPI *qspi)
Sets the disable module request. More...
IFX_INLINE void | IfxQspi_setEnableModuleRequest (Ifx_QSPI *qspi)
Sets the enable module request. More...
IFX_INLINE void | IfxQspi_setSleepMode (Ifx_QSPI *qspi, IfxQspi_SleepMode mode)
Sets the disable module request. More...
IFX_INLINE void | IfxQspi_setTransmitFifoInterrruptThreshold (Ifx_QSPI *qspi, IfxQspi_TxFifoInt txFifoInt)
Set the threshold of TXFIFO for service request generation. More...
IFX_INLINE void | IfxQspi_writeBasicConfiguration (Ifx_QSPI *qspi, uint32 baconVal)
Write configuration into BACON register. More...
IFX_INLINE void | IfxQspi_writeBasicConfigurationBeginStream (Ifx_QSPI *qspi, uint32 baconVal)
Write configuration into BACON register with .LAST flag set to 0. More...
IFX_INLINE void | IfxQspi_writeBasicConfigurationEndStream (Ifx_QSPI *qspi, uint32 baconVal)
Write configuration into BACON register with .LAST flag set to 1. More...
IFX_INLINE void | IfxQspi_writeExtendedConfiguration (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 econVal)
Writes channel timing configuration into ECON register. More...
IFX_INLINE void | IfxQspi_writeMixedDataTransmitFifo (Ifx_QSPI *qspi, uint32 mixEntryVal)
Writes Data and Configuration into MIXEDENTRY register. More...
IFX_EXTERN float | IfxQspi_calcRealBaudrate (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId)
Function to calculate baudrate of specified channel. More...
IFX_EXTERN uint32 | IfxQspi_calculateBasicConfigurationValue (Ifx_QSPI *qspi, const IfxQspi_ChannelId channelId, const SpiIf_ChMode *chMode, const float baudrate)
Function to calculate BACON register values. More...
IFX_EXTERN uint32 | IfxQspi_calculateExtendedConfigurationValue (Ifx_QSPI *qspi, const uint8 cs, const SpiIf_ChConfig *chConfig)
Function to calculate ECON register values. More...
IFX_EXTERN uint32 | IfxQspi_calculatePrescaler (Ifx_QSPI *qspi, float baudrate)
Function to calculate prescaler. More...
IFX_EXTERN uint32 | IfxQspi_calculateTimeQuantumLength (Ifx_QSPI *qspi, float maxBaudrate)
Specifies the function to calculate Time quantum length. More...
IFX_EXTERN Ifx_QSPI * | IfxQspi_getAddress (IfxQspi_Index qspi)
IFX_EXTERN IfxQspi_Index | IfxQspi_getIndex (Ifx_QSPI *qspi)
Specifies the function to get Index. More...
IFX_EXTERN uint32 | IfxQspi_recalcBasicConfiguration (uint32 oldBACON, Ifx_SizeT numOfData, boolean shortData, boolean lastData)
Re-calculated BACON from the oldBACON. More...
IFX_EXTERN void | IfxQspi_setSlaveSelectOutputControl (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, boolean outputEnable, boolean activeLevel)
Configures a Slave Select Output. More...
IFX_EXTERN void | IfxQspi_calculateDelayConstants (const Ifx_QSPI *qspi, const IfxQspi_ChannelId channelId, const SpiIf_ChMode *chMode, IfxQspi_DelayConst *delayConst)
Calculates the Delay constants (pre and delay) from the user specified CS delays. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxQspi_getErrorSrc (Ifx_QSPI *qspi)
Gets the Error request value. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxQspi_getReceiveSrc (Ifx_QSPI *qspi)
Gets the RXFIFO service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxQspi_getTransmitSrc (Ifx_QSPI *qspi)
Gets the TXFIFO service request. More...
IFX_INLINE void | IfxQspi_initMrstInPin (const IfxQspi_Mrst_In *mrstIn, IfxPort_InputMode mrstInMode)
Initializes a MRST input. More...
IFX_INLINE void | IfxQspi_initMrstOutPin (const IfxQspi_Mrst_Out *mrstOut, IfxPort_OutputMode mrstOutMode, IfxPort_PadDriver padDriver)
Initializes a MRST output. More...
IFX_INLINE void | IfxQspi_initMtsrInPin (const IfxQspi_Mtsr_In *mtsrIn, IfxPort_InputMode mtsrInMode)
Initializes a MTSR input. More...
IFX_INLINE void | IfxQspi_initMtsrOutPin (const IfxQspi_Mtsr_Out *mtsrOut, IfxPort_OutputMode mtsrOutMode, IfxPort_PadDriver padDriver)
Initializes a MTSR output. More...
IFX_INLINE void | IfxQspi_initSclkInPin (const IfxQspi_Sclk_In *sclkIn, IfxPort_InputMode sclkInMode)
Initializes a SCLK input. More...
IFX_INLINE void | IfxQspi_initSclkOutPin (const IfxQspi_Sclk_Out *sclkOut, IfxPort_OutputMode sclkOutMode, IfxPort_PadDriver padDriver)
Initializes a SCLK output. More...
IFX_INLINE void | IfxQspi_initSlsi (const IfxQspi_Slsi_In *slsi, IfxPort_InputMode slsiMode)
Initializes a SLSI input. More...
IFX_INLINE void | IfxQspi_initSlso (const IfxQspi_Slso_Out *slso, IfxPort_OutputMode slsoMode, IfxPort_PadDriver padDriver, IfxPort_OutputIdx outIndex)
Initializes a SLSO output. More...
IFX_INLINE IfxQspi_FifoMode | IfxQspi_getRxFifoMode (Ifx_QSPI *qspi)
Get the Receive FIFO mode. More...
IFX_INLINE IfxQspi_FifoMode | IfxQspi_getTxFifoMode (Ifx_QSPI *qspi)
Get the Transfer FIFO mode. More...
IFX_INLINE void | IfxQspi_permutateBigEndian (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bigEndian)
Permutate bytes to / from Big Endian. More...
IFX_INLINE void | IfxQspi_setBitsegment1 (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bitSegment1)
Set the value of bit segment1 (A). More...
IFX_INLINE void | IfxQspi_setBitsegment2 (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bitSegment2)
Set the value of bit segment2 (B). More...
IFX_INLINE void | IfxQspi_setBitsegment3 (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bitSegment3)
Set the value of bit segment3 (C). More...
IFX_INLINE void | IfxQspi_setRxFifoMode (Ifx_QSPI *qspi, IfxQspi_FifoMode mode)
IFX_INLINE void | IfxQspi_setTimeQuantum (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 timeQuantum)
Set the value of Time Quantum. More...
IFX_INLINE void | IfxQspi_setTxFifoMode (Ifx_QSPI *qspi, IfxQspi_FifoMode mode)
Set the transfer FIFO mode. More...
IFX_INLINE void | IfxQspi_initMrstInPinWithPadLevel (const IfxQspi_Mrst_In *mrstIn, IfxPort_InputMode mrstInMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of MRSTIN pin direction as input and configuring pad driver. More...
IFX_INLINE void | IfxQspi_initMtsrInPinWithPadLevel (const IfxQspi_Mtsr_In *mtsrIn, IfxPort_InputMode mtsrInMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of MTSRIN pin direction as input and configuring pad driver. More...
IFX_INLINE void | IfxQspi_initSclkInPinWithPadLevel (const IfxQspi_Sclk_In *sclkIn, IfxPort_InputMode sclkInMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of SCLKIN pin direction as input and configuring pad driver. More...
IFX_INLINE void | IfxQspi_initSlsiWithPadLevel (const IfxQspi_Slsi_In *slsi, IfxPort_InputMode slsiMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of SLSI pin direction as input and configuring pad driver. More...

Detailed Description

QSPI basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxQspi.h.

Data Structure Documentation

◆ IfxQspi_DelayConst

struct IfxQspi_DelayConst

Structure holding the "pre" and "delay" values. To be populated into BACON register after delay calculation.

Definition at line 309 of file IfxQspi.h.

Data Fields
uint8 | delay | delay multiplier
uint8 | pre | specifies the prescalar value

Macro Definition Documentation

◆ IFXQSPI_BACONSIZE

#define IFXQSPI_BACONSIZE ( Datasize ) (((((Datasize) % 16) == 0) ? ((uint8)((Datasize) / 16)) : ((uint8)((Datasize) / 16) + 1)))

Get Fifo size required for Long / Long continous mode interms 32-bit LONG MODE FIFO size (data size in bytes) = (size for Bacon) + (Datasize converted to 32-bit)

Definition at line 76 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_writeLong().

◆ IFXQSPI_ERRORENABLEMASK

#define IFXQSPI_ERRORENABLEMASK ((uint32)0x1FF)

Errors enable mask for ERRORENS.

Definition at line 84 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_initModule(), and IfxQspi_SpiSlave_initModule().

◆ IFXQSPI_FIFO32BITSIZE

#define IFXQSPI_FIFO32BITSIZE ( Datasize ) ((((Datasize) % 4) == 0) ? ((uint8)((Datasize) / 4)) : ((uint8)((Datasize) / 4) + 1))

Definition at line 78 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_writeLong().

◆ IFXQSPI_GETLONGMODEFIFOSIZE

#define IFXQSPI_GETLONGMODEFIFOSIZE ( Datasize ) (IFXQSPI_BACONSIZE(Datasize) + IFXQSPI_FIFO32BITSIZE(Datasize))

Definition at line 80 of file IfxQspi.h.

Enumeration Type Documentation

◆ IfxQspi_FifoMode

enum IfxQspi_FifoMode

Transmit FIFO mode.

Enumerator
IfxQspi_FifoMode_combinedMove | Combined Move Mode.
IfxQspi_FifoMode_singleMove | Single Move Mode.
IfxQspi_FifoMode_batchMove | Batch Move Mode.

Definition at line 286 of file IfxQspi.h.

◆ IfxQspi_SuspendMode

enum IfxQspi_SuspendMode

OCDS Suspend Control (OCDS.SUS)

Enumerator
IfxQspi_SuspendMode_none | No suspend.
IfxQspi_SuspendMode_hard | Hard Suspend.
IfxQspi_SuspendMode_soft | Soft Suspend.

Definition at line 295 of file IfxQspi.h.

Function Documentation

◆ IfxQspi_getRxFifoMode()

IFX_INLINE IfxQspi_FifoMode IfxQspi_getRxFifoMode ( Ifx_QSPI * qspi )

Get the Receive FIFO mode.

Parameters
qspi Pointer to QSPI module registers
Returns
Receive FIFO mode

Definition at line 1074 of file IfxQspi.h.

◆ IfxQspi_getTxFifoMode()

IFX_INLINE IfxQspi_FifoMode IfxQspi_getTxFifoMode ( Ifx_QSPI * qspi )

Get the Transfer FIFO mode.

Parameters
qspi Pointer to QSPI module registers
Returns
Transfer FIFO mode

Definition at line 1099 of file IfxQspi.h.

◆ IfxQspi_initMrstInPinWithPadLevel()

IFX_INLINE void IfxQspi_initMrstInPinWithPadLevel | ( | const IfxQspi_Mrst_In * | mrstIn,
 |  | IfxPort_InputMode | mrstInMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of MRSTIN pin direction as input and configuring pad driver.

Parameters
mrstIn | the MRST Pin which should be configured
mrstInMode | the pin input mode which should be configured
padDriver | Pad Driver
Returns
None

Definition at line 1376 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_initModule().

◆ IfxQspi_initMtsrInPinWithPadLevel()

IFX_INLINE void IfxQspi_initMtsrInPinWithPadLevel | ( | const IfxQspi_Mtsr_In * | mtsrIn,
 |  | IfxPort_InputMode | mtsrInMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of MTSRIN pin direction as input and configuring pad driver.

Parameters
mtsrIn | the MTSR Pin which should be configured
mtsrInMode | the pin input mode which should be configured
padDriver | Pad Driver
Returns
None

Definition at line 1384 of file IfxQspi.h.

Referenced by IfxQspi_SpiSlave_initModule().

◆ IfxQspi_initSclkInPinWithPadLevel()

IFX_INLINE void IfxQspi_initSclkInPinWithPadLevel | ( | const IfxQspi_Sclk_In * | sclkIn,
 |  | IfxPort_InputMode | sclkInMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of SCLKIN pin direction as input and configuring pad driver.

Parameters
sclkIn | the SCLK Pin which should be configured
sclkInMode | the pin input mode which should be configured
padDriver | Pad Driver
Returns
None

Definition at line 1392 of file IfxQspi.h.

Referenced by IfxQspi_SpiSlave_initModule().

◆ IfxQspi_initSlsiWithPadLevel()

IFX_INLINE void IfxQspi_initSlsiWithPadLevel | ( | const IfxQspi_Slsi_In * | slsi,
 |  | IfxPort_InputMode | slsiMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of SLSI pin direction as input and configuring pad driver.

Parameters
slsi | the SLSI Pin which should be configured
slsiMode | the pin input mode which should be configured
padDriver | Pad Driver
Returns
None

Definition at line 1400 of file IfxQspi.h.

Referenced by IfxQspi_SpiSlave_initModule().

◆ IfxQspi_permutateBigEndian()

IFX_INLINE void IfxQspi_permutateBigEndian | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_ChannelId | channelId,
 |  | uint8 | bigEndian
 | ) |  |

Permutate bytes to / from Big Endian.

Parameters
qspi | Pointer to QSPI module registers
channelId | Channel number to which econ val belongs
bigEndian | specifies to Permutate bytes to / from Big Endian
Returns
None

Definition at line 1177 of file IfxQspi.h.

◆ IfxQspi_setBitsegment1()

IFX_INLINE void IfxQspi_setBitsegment1 | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_ChannelId | channelId,
 |  | uint8 | bitSegment1
 | ) |  |

Set the value of bit segment1 (A).

Parameters
qspi | Pointer to QSPI module registers
channelId | Channel number to which econ val belongs
bitSegment1 | Length expressed in time quantums of ECONz.Q.
Returns
None

Definition at line 1202 of file IfxQspi.h.

◆ IfxQspi_setBitsegment2()

IFX_INLINE void IfxQspi_setBitsegment2 | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_ChannelId | channelId,
 |  | uint8 | bitSegment2
 | ) |  |

Set the value of bit segment2 (B).

Parameters
qspi | Pointer to QSPI module registers
channelId | Channel number to which econ val belongs
bitSegment2 | Length expressed in time quantums of ECONz.Q.
Returns
None

Definition at line 1209 of file IfxQspi.h.

◆ IfxQspi_setBitsegment3()

IFX_INLINE void IfxQspi_setBitsegment3 | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_ChannelId | channelId,
 |  | uint8 | bitSegment3
 | ) |  |

Set the value of bit segment3 (C).

Parameters
qspi | Pointer to QSPI module registers
channelId | Channel number to which econ val belongs
bitSegment3 | Length expressed in time quantums of ECONz.Q.
Returns
None

Definition at line 1216 of file IfxQspi.h.

◆ IfxQspi_setRxFifoMode()

IFX_INLINE void IfxQspi_setRxFifoMode | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_FifoMode | mode
 | ) |  |
Parameters
qspi | Pointer to QSPI module registers
mode | select the transfer fifo mode
Returns
None

Definition at line 1271 of file IfxQspi.h.

◆ IfxQspi_setTimeQuantum()

IFX_INLINE void IfxQspi_setTimeQuantum | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_ChannelId | channelId,
 |  | uint32 | timeQuantum
 | ) |  |

Set the value of Time Quantum.

Parameters
qspi | Pointer to QSPI module registers
channelId | Channel number to which econ val belongs
timeQuantum | specifies the value of Time Quantum.
Returns
None

Definition at line 1283 of file IfxQspi.h.

◆ IfxQspi_setTxFifoMode()

IFX_INLINE void IfxQspi_setTxFifoMode | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_FifoMode | mode
 | ) |  |

Set the transfer FIFO mode.

Parameters
qspi | Pointer to QSPI module registers
mode | select the transfer fifo mode
Returns
None

Definition at line 1296 of file IfxQspi.h.


iLLD_TC38A: SCU

Modules | Files
SCU
iLLD
Collaboration diagram for SCU:

Modules

Implementation
Standard Driver
SCU Pin Mapping
How to use the Scu Clock driver?

Files

file | IfxScu_cfg.h
SCU on-chip implementation data.
file | IfxScu_PinMap.c
SCU I/O map.
file | IfxScu_PinMap.h
SCU I/O map.
file | IfxScuCcu.h
SCU basic functionality.
file | IfxScuEru.h
SCU basic functionality.
file | IfxScuLbist.h
SCU basic functionality.
file | IfxScuRcu.h
SCU basic functionality.
file | IfxScuWdt.asm.h
SCU basic functionality.
file | IfxScuWdt.h
SCU basic functionality.

Detailed Description


iLLD_TC38A: Implementation

Implementation
iLLD » SCU
Collaboration diagram for Implementation:


iLLD_TC38A: Standard Driver

Modules
Standard Driver
iLLD » SCU
Collaboration diagram for Standard Driver:

Modules

Ccu Basic Functionality
Eru Basic Functionality
Lbist Basic Functionality
Rcu Basic Functionality
Wdt Basic Functionality

Detailed Description


iLLD_TC38A: Ccu Basic Functionality

Modules
Ccu Basic Functionality
iLLD » SCU » Standard Driver
Collaboration diagram for Ccu Basic Functionality:

Modules

Clock Control Functions
Clock Control Operative Functions
Clock Control Configuration Functions
Enumerations

Detailed Description


iLLD_TC38A: Clock Control Functions

Data Structures | Functions
Clock Control Functions
iLLD » SCU » Standard Driver » Ccu Basic Functionality
Collaboration diagram for Clock Control Functions:

Data Structures

struct IfxScuCcu_FlashWaitstateConfig
Configuration structure type for the Flash waitstate configuration. More...

Functions

IFX_INLINE void | IfxScuCcu_wait (float32 timeSec)
API to wait for requested duration. Note: IfxScuCcu_wait shall not use STM in future, because we can guarantee that STM is enabled after reset but If PLL init is called for changing the frequency during runtime, there is no guarantee that STM is enabled. More...
IFX_INLINE void | IfxScuCcu_waitWithWdtService (float32 timeSec)
API to wait for requested duration along with watchdog service to avoid any reset case during startup of the chip. Note: IfxScuCcu_wait shall not use STM in future, because we can guarantee that STM is enabled after reset but If PLL init is called for changing the frequency during runtime, there is no guarantee that STM is enabled. More...
IFX_INLINE void | IfxScuCcu_switchToLowPowerMode (IfxScuCcu_LowPowerDivRatio lpDiv)
API to configure the LPDIV value to enter into Low Power mode. More...
IFX_INLINE void | IfxScuCcu_switchToNormalMode (const uint32 ccucon0)
API to switch back to normal mode from low power mode. More...

Detailed Description

Data Structure Documentation

◆ IfxScuCcu_FlashWaitstateConfig

struct IfxScuCcu_FlashWaitstateConfig

Configuration structure type for the Flash waitstate configuration.

Definition at line 603 of file IfxScuCcu.h.

Data Fields
uint32 | mask | FLASH.FCON Mask to select the bit fields to be updated.
uint32 | value | FLASH.FCON Register value to be updated.

Function Documentation

◆ IfxScuCcu_switchToLowPowerMode()

IFX_INLINE void IfxScuCcu_switchToLowPowerMode ( IfxScuCcu_LowPowerDivRatio lpDiv )

API to configure the LPDIV value to enter into Low Power mode.

Caution: write to LPDIV with non-zero division ratio will cause system to enter low power mode. Low power mode will affect different SPBDIV and SRIDIV ratios.

The original CCUCON0 ratios should be preserved by user prior to calling this function. The "normal" CCUCON0 ratios have to be passed to API: "IfxScuCcu_switchToNormalMode" to go back to the original division ratios.

Parameters
lpDiv Low Power Division Ratio
Returns
None

Definition at line 1788 of file IfxScuCcu.h.

◆ IfxScuCcu_switchToNormalMode()

IFX_INLINE void IfxScuCcu_switchToNormalMode ( const uint32 ccucon0 )

API to switch back to normal mode from low power mode.

Caution: The original CCUCON0 setting has to be saved by user prior to entering Low Power mode. Pass the original CCUCON0 register as a whole word to this function to restore the normal settings.

Ramp back to normal mode is done in steps to avoid sudden jump in frequency and power usage.

Parameters
ccucon0 CCUCON0 values at normal mode
Returns
None

Switch to low power mode and back using iLLD functions as below

uint32 ccucon0 = SCU_CCUCON0.U;
IfxScuCcu_LowPowerDivRatio lpDiv = IfxScuCcu_LowPowerDivRatio_divBy30;
IfxScuCcu_switchToLowPowerMode(lpDiv);

Switch back to normal mode with the saved ccucon0 value

IfxScuCcu_switchToNormalMode(ccucon0);

Definition at line 1811 of file IfxScuCcu.h.

◆ IfxScuCcu_wait()

IFX_INLINE void IfxScuCcu_wait ( float32 timeSec )

API to wait for requested duration. Note: IfxScuCcu_wait shall not use STM in future, because we can guarantee that STM is enabled after reset but If PLL init is called for changing the frequency during runtime, there is no guarantee that STM is enabled.

Returns
None

Definition at line 1750 of file IfxScuCcu.h.

Referenced by IfxScuCcu_switchToNormalMode(), and IfxScuCcu_throttleSysPllClockInline().

◆ IfxScuCcu_waitWithWdtService()

IFX_INLINE void IfxScuCcu_waitWithWdtService ( float32 timeSec )

API to wait for requested duration along with watchdog service to avoid any reset case during startup of the chip. Note: IfxScuCcu_wait shall not use STM in future, because we can guarantee that STM is enabled after reset but If PLL init is called for changing the frequency during runtime, there is no guarantee that STM is enabled.

Returns
None

Definition at line 1767 of file IfxScuCcu.h.


iLLD_TC38A: Clock Control Operative Functions

Functions
Clock Control Operative Functions
iLLD » SCU » Standard Driver » Ccu Basic Functionality
Collaboration diagram for Clock Control Operative Functions:

Functions

IFX_INLINE float32 | IfxScuCcu_getAdcFrequency (void)
API to get Adc (EVADC, EDSADC) frequency. This API returns the based on the divider value in CCUCON register and fSOURCE. More...
IFX_INLINE float32 | IfxScuCcu_getAsclinFFrequency (void)
API to get ASCLINF divider frequency. This API returns the based on the divider value in CCUCON register and fSOURCE. More...
IFX_INLINE float32 | IfxScuCcu_getEvrFrequency (void)
API to get EVR Oscillator frequency. This API returns the constant which is specific to the ScuCcu of the controller. More...
IFX_INLINE float32 | IfxScuCcu_getGethFrequency (void)
API to get GETH divider frequency. This API returns the based on the divider value in CCUCON register and fSOURCE. More...
IFX_INLINE float32 | IfxScuCcu_getGtmFrequency (void)
API to get GTMdivider frequency This API returns the based on the divider value in CCUCON register and fSOURCE. return GTM frequency (fGTM) in Hz. More...
IFX_INLINE float32 | IfxScuCcu_getI2cFrequency (void)
API to get I2C frequency. This API returns the based on the divider value in CCUCON register and fSOURCE. More...
IFX_INLINE float32 | IfxScuCcu_getMcanhFrequency (void)
API to get MCANH divider frequency. This API returns the based on the divider value in CCUCON register and fSOURCE. More...
IFX_INLINE float32 | IfxScuCcu_getOsc0Frequency (void)
API to get Oscillator 0 frequency. This API returns the fOsc0 frequency based on the divider value in CCUCON register and the input oscillator. More...
IFX_INLINE float32 | IfxScuCcu_getOscFrequency (void)
API to get Oscillator 0 frequency. This API returns the fOsc0 frequency based on the divider value in CCUCON register and the input oscillator. More...
IFX_INLINE IfxScuCcu_PllInputClockSelection | IfxScuCcu_getSourceSelection (void)
Returns the clock source selection. More...
IFX_INLINE float32 | IfxScuCcu_getStmFrequency (void)
API to get STM divider frequency. This API returns the based on the divider value in CCUCON register and fSOURCE. More...
IFX_EXTERN float32 | IfxScuCcu_getAsclinSFrequency (void)
API to get ASCLINS divider frequency. This API returns the ASCLINS frequency based on the divider value in CCUCON register and fSOURCE. More...
IFX_EXTERN float32 | IfxScuCcu_getBbbFrequency (void)
API to get BBB divider frequency. This API returns the BBBDivider frequency based on the divider value in CCUCON register and the input oscillator. More...
IFX_EXTERN float32 | IfxScuCcu_getCpuFrequency (const IfxCpu_ResourceCpu cpu)
This API returns the Cpu frequency based on the divider value in CCUCON register and fSource frequency. More...
IFX_EXTERN float32 | IfxScuCcu_getFsi2Frequency (void)
API to get FSI2 divider frequency in Hz. This API returns the fFSI2 frequency based on the divider value in CCUCON register and the input oscillator. More...
IFX_EXTERN float32 | IfxScuCcu_getFsiFrequency (void)
API to get FSI divider frequency in Hz. This API returns the fFSI based on the divider value in CCUCON register and the input oscillator. More...
IFX_EXTERN float32 | IfxScuCcu_getMcanFrequency (void)
API to get MCAN divider frequency. This API returns the based on the divider value in CCUCON register and fSOURCE. More...
IFX_EXTERN float32 | IfxScuCcu_getModuleFrequency (void)
get source frequency fSOURCE. This API returns the source frequency based on the configurations with CCUCON register configuration. More...
IFX_EXTERN float32 | IfxScuCcu_getMscFrequency (void)
API to get MSC divider frequency. This API returns the based on the divider value in CCUCON register and fSOURCE. More...
IFX_EXTERN float32 | IfxScuCcu_getPerPllFrequency1 (void)
API to get actual PER PLL1 frequency This API returns the PER PLL1 frequency based on the K2 divider value in PLLCON and the VCO frequency. Fpll1= (Fosc*N)/(P*K2) More...
IFX_EXTERN float32 | IfxScuCcu_getPerPllFrequency2 (void)
API to get actual PER PLL2 (K3 Divider) frequency This API returns the PER PLL2 frequency based on the K3 divider value in PLLCON and the VCO frequency. Fpll2= (Fosc*N)/(P*K3*1.6) // DIVBY = 0, Fpll2= (Fosc*N)/(P*K3*2) // DIVBY = 1. More...
IFX_EXTERN float32 | IfxScuCcu_getPllFrequency (void)
API to get actual Sys PLL output frequency. This API returns the based on the divider values in CCUCON, PLLCON registers and the input oscillator. More...
IFX_EXTERN float32 | IfxScuCcu_getQspiFrequency (void)
API to get Qspi divider frequency. This API returns the based on the divider value in CCUCON register and fSOURCE. More...
IFX_EXTERN float32 | IfxScuCcu_getSourceFrequency (IfxScuCcu_Fsource fsource)
get source frequency fSOURCE. This API returns the source frequency based on the configurations with CCUCON register configuration. More...
IFX_EXTERN float32 | IfxScuCcu_getSpbFrequency (void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider mode and/or SPBDIV divider value in CCUCON registers. More...
IFX_EXTERN float32 | IfxScuCcu_getSriFrequency (void)
API to get SRI divider frequency. This API returns the Sri frequency based on the divider values in CCUCON registers and fSOURCE. More...
IFX_EXTERN float32 | IfxScuCcu_setAsclinFFrequency (float32 asclinFFreq)
API to set ASCLINF frequency (with ASCLINF divider) This API configure ASCLINF divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
IFX_EXTERN float32 | IfxScuCcu_setAsclinSFrequency (float32 asclinSFreq)
API to set ASCLINS frequency (with ASCLINS divider) This API configure ASCLINS divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
IFX_EXTERN float32 | IfxScuCcu_setBbbFrequency (float32 bbbFreq)
API to set BBB frequency (with Bbb divider) This API configure Bbb divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
IFX_EXTERN float32 | IfxScuCcu_setCpuFrequency (IfxCpu_ResourceCpu cpu, float32 cpuFreq)
API to set CPU frequency (with CPU divider) This API configure CPU divider values in CCUCON registers. The actual frequency is always depends on the feasibility with the divider value. More...
IFX_EXTERN float32 | IfxScuCcu_setFsi2Frequency (float32 fsi2Freq)
API to set FSI2 frequency (with FSI2 divider) This API configure Fsi2 divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
IFX_EXTERN float32 | IfxScuCcu_setFsiFrequency (float32 fsiFreq)
API to set FSI frequency (with FSI divider) This API configure Fsi divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
IFX_EXTERN float32 | IfxScuCcu_setGethFrequency (float32 gethFreq)
API to set GETH frequency (with GETH divider) This API configure geth divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
IFX_EXTERN float32 | IfxScuCcu_setGtmFrequency (float32 gtmFreq)
API to set GTM frequency (with GTM divider) This API configure GTM divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
IFX_EXTERN float32 | IfxScuCcu_setI2cFrequency (float32 i2cFreq)
API to set I2C frequency (with I2C divider) This API configure adas divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
IFX_EXTERN float32 | IfxScuCcu_setMcanFrequency (float32 mcanFreq)
API to set MCAN frequency (with MCAN divider) This API configure MCAN divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
IFX_EXTERN float32 | IfxScuCcu_setMcanhFrequency (float32 mcanhFreq)
API to set MCANH frequency (with MCANH divider) This API configure mcanh divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
IFX_EXTERN float32 | IfxScuCcu_setMscFrequency (float32 mscFreq)
API to set MSC frequency (with MSC divider) This API configure MSC divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
IFX_EXTERN float32 | IfxScuCcu_setQspiFrequency (float32 qspiFreq)
API to set QSPI frequency (with QSPI divider) This API configure Qspi divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
IFX_EXTERN float32 | IfxScuCcu_setSpbFrequency (float32 spbFreq)
API to set SPB frequency (with SPB divider) This API configure SPB divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
IFX_EXTERN float32 | IfxScuCcu_setSriFrequency (float32 sriFreq)
API to set SRI frequency (with SRI divider) This API configure Sri divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
IFX_EXTERN float32 | IfxScuCcu_setStmFrequency (float32 stmFreq)
API to set STM frequency (with STM divider) This API configure Stm divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...

Detailed Description

Function Documentation

◆ IfxScuCcu_getAdcFrequency()

IFX_INLINE float32 IfxScuCcu_getAdcFrequency ( void )

API to get Adc (EVADC, EDSADC) frequency. This API returns the based on the divider value in CCUCON register and fSOURCE.

Returns
Adc frequency (fADC) in Hz

Definition at line 1564 of file IfxScuCcu.h.

Referenced by IfxEdsadc_getModulatorInputClockFreq(), IfxEvadc_getAdcAnalogFrequency(), IfxEvadc_getAdcDigitalFrequency(), IfxEvadc_getAdcModuleFrequency(), and IfxEvadc_initializeFAdcI().

◆ IfxScuCcu_getAsclinFFrequency()

IFX_INLINE float32 IfxScuCcu_getAsclinFFrequency ( void )

API to get ASCLINF divider frequency. This API returns the based on the divider value in CCUCON register and fSOURCE.

Returns
AsclinF frequency (fASCLINF) in Hz

Definition at line 1570 of file IfxScuCcu.h.

Referenced by IfxAsclin_getFaFrequency(), and IfxScuCcu_setAsclinFFrequency().

◆ IfxScuCcu_getAsclinSFrequency()

IFX_EXTERN float32 IfxScuCcu_getAsclinSFrequency ( void )

API to get ASCLINS divider frequency. This API returns the ASCLINS frequency based on the divider value in CCUCON register and fSOURCE.

Returns
AsclinS frequency (fASCLINS) in Hz

Definition at line 121 of file IfxScuCcu.c.

Referenced by IfxAsclin_getFaFrequency(), and IfxScuCcu_setAsclinSFrequency().

◆ IfxScuCcu_getBbbFrequency()

IFX_EXTERN float32 IfxScuCcu_getBbbFrequency ( void )

API to get BBB divider frequency. This API returns the BBBDivider frequency based on the divider value in CCUCON register and the input oscillator.

Returns
BBB frequency (fBBB) in Hz

Definition at line 153 of file IfxScuCcu.c.

Referenced by IfxScuCcu_setBbbFrequency().

◆ IfxScuCcu_getCpuFrequency()

IFX_EXTERN float32 IfxScuCcu_getCpuFrequency ( const IfxCpu_ResourceCpu cpu )

This API returns the Cpu frequency based on the divider value in CCUCON register and fSource frequency.

Parameters
cpu CPU number for which effective fCPU is sought
Returns
Cpu[x] frequency in Hz, where x is cpu number passed as parameter

Definition at line 196 of file IfxScuCcu.c.

◆ IfxScuCcu_getEvrFrequency()

IFX_INLINE float32 IfxScuCcu_getEvrFrequency ( void )

API to get EVR Oscillator frequency. This API returns the constant which is specific to the ScuCcu of the controller.

Returns
EVR Oscillator frequency (fBACK or fEVR) in Hz.

Definition at line 1585 of file IfxScuCcu.h.

Referenced by IfxScuCcu_getSourceFrequency().

◆ IfxScuCcu_getFsi2Frequency()

IFX_EXTERN float32 IfxScuCcu_getFsi2Frequency ( void )

API to get FSI2 divider frequency in Hz. This API returns the fFSI2 frequency based on the divider value in CCUCON register and the input oscillator.

Returns
FSI2 frequency (fFSI2) in Hz.

Definition at line 230 of file IfxScuCcu.c.

Referenced by IfxScuCcu_setFsi2Frequency().

◆ IfxScuCcu_getFsiFrequency()

IFX_EXTERN float32 IfxScuCcu_getFsiFrequency ( void )

API to get FSI divider frequency in Hz. This API returns the fFSI based on the divider value in CCUCON register and the input oscillator.

Returns
FSI frequency (fFSI) in Hz.

Definition at line 253 of file IfxScuCcu.c.

Referenced by IfxScuCcu_setFsiFrequency().

◆ IfxScuCcu_getGethFrequency()

IFX_INLINE float32 IfxScuCcu_getGethFrequency ( void )

API to get GETH divider frequency. This API returns the based on the divider value in CCUCON register and fSOURCE.

Returns
GETH frequency (fGETH) in Hz

Definition at line 1591 of file IfxScuCcu.h.

Referenced by IfxScuCcu_setGethFrequency().

◆ IfxScuCcu_getGtmFrequency()

IFX_INLINE float32 IfxScuCcu_getGtmFrequency ( void )

API to get GTMdivider frequency This API returns the based on the divider value in CCUCON register and fSOURCE. return GTM frequency (fGTM) in Hz.

Returns
Gtm Frequency

Definition at line 1597 of file IfxScuCcu.h.

Referenced by IfxGtm_Dtm_getClockFrequency(), IfxGtm_getSysClkFrequency(), IfxIom_getFrequency(), and IfxScuCcu_setGtmFrequency().

◆ IfxScuCcu_getI2cFrequency()

IFX_INLINE float32 IfxScuCcu_getI2cFrequency ( void )

API to get I2C frequency. This API returns the based on the divider value in CCUCON register and fSOURCE.

Returns
I2C frequency (fI2C) in Hz

Definition at line 1623 of file IfxScuCcu.h.

Referenced by IfxI2c_getBaudrate(), IfxI2c_setBaudrate(), and IfxScuCcu_setI2cFrequency().

◆ IfxScuCcu_getMcanFrequency()

IFX_EXTERN float32 IfxScuCcu_getMcanFrequency ( void )

API to get MCAN divider frequency. This API returns the based on the divider value in CCUCON register and fSOURCE.

Returns
Mcan frequency (fMCAN) in Hz

Definition at line 276 of file IfxScuCcu.c.

Referenced by IfxCan_getModuleFrequency(), and IfxScuCcu_setMcanFrequency().

◆ IfxScuCcu_getMcanhFrequency()

IFX_INLINE float32 IfxScuCcu_getMcanhFrequency ( void )

API to get MCANH divider frequency. This API returns the based on the divider value in CCUCON register and fSOURCE.

Returns
MCANH frequency (fMCANH) in Hz

Definition at line 1629 of file IfxScuCcu.h.

Referenced by IfxScuCcu_setMcanhFrequency().

◆ IfxScuCcu_getModuleFrequency()

IFX_EXTERN float32 IfxScuCcu_getModuleFrequency ( void )

get source frequency fSOURCE. This API returns the source frequency based on the configurations with CCUCON register configuration.

Returns
Module frequency in Hz

Definition at line 306 of file IfxScuCcu.c.

◆ IfxScuCcu_getMscFrequency()

IFX_EXTERN float32 IfxScuCcu_getMscFrequency ( void )

API to get MSC divider frequency. This API returns the based on the divider value in CCUCON register and fSOURCE.

Returns
Msc frequency (fMSC) in Hz

Definition at line 331 of file IfxScuCcu.c.

Referenced by IfxMsc_getDownstreamAbraBaudrate(), and IfxScuCcu_setMscFrequency().

◆ IfxScuCcu_getOsc0Frequency()

IFX_INLINE float32 IfxScuCcu_getOsc0Frequency ( void )

API to get Oscillator 0 frequency. This API returns the fOsc0 frequency based on the divider value in CCUCON register and the input oscillator.

Returns
Osc0 frequency (fOSC0) in Hz.

Definition at line 1635 of file IfxScuCcu.h.

Referenced by IfxScuCcu_getAsclinSFrequency(), IfxScuCcu_getMcanFrequency(), IfxScuCcu_setAsclinSFrequency(), and IfxScuCcu_setMcanFrequency().

◆ IfxScuCcu_getOscFrequency()

IFX_INLINE float32 IfxScuCcu_getOscFrequency ( void )

API to get Oscillator 0 frequency. This API returns the fOsc0 frequency based on the divider value in CCUCON register and the input oscillator.

Returns
Osc frequency (fOSC) in Hz.

Definition at line 1641 of file IfxScuCcu.h.

Referenced by IfxScuCcu_calRGainParameters(), IfxScuCcu_getPerPllFrequency1(), IfxScuCcu_getPerPllFrequency2(), and IfxScuCcu_getPllFrequency().

◆ IfxScuCcu_getPerPllFrequency1()

IFX_EXTERN float32 IfxScuCcu_getPerPllFrequency1 ( void )

API to get actual PER PLL1 frequency This API returns the PER PLL1 frequency based on the K2 divider value in PLLCON and the VCO frequency. Fpll1= (Fosc*N)/(P*K2)

Returns
PER PLL1 (K2 Divider) frequency in Hz

Definition at line 361 of file IfxScuCcu.c.

Referenced by IfxScuCcu_getSourceFrequency().

◆ IfxScuCcu_getPerPllFrequency2()

IFX_EXTERN float32 IfxScuCcu_getPerPllFrequency2 ( void )

API to get actual PER PLL2 (K3 Divider) frequency This API returns the PER PLL2 frequency based on the K3 divider value in PLLCON and the VCO frequency. Fpll2= (Fosc*N)/(P*K3*1.6) // DIVBY = 0, Fpll2= (Fosc*N)/(P*K3*2) // DIVBY = 1.

Returns
PER PLL2 (K3 Divider ) frequency in Hz

Definition at line 374 of file IfxScuCcu.c.

Referenced by IfxScuCcu_getSourceFrequency().

◆ IfxScuCcu_getPllFrequency()

IFX_EXTERN float32 IfxScuCcu_getPllFrequency ( void )

API to get actual Sys PLL output frequency. This API returns the based on the divider values in CCUCON, PLLCON registers and the input oscillator.

Returns
System Pll (fSysPLL) frequency in Hz

Definition at line 394 of file IfxScuCcu.c.

Referenced by IfxScuCcu_getSourceFrequency().

◆ IfxScuCcu_getQspiFrequency()

IFX_EXTERN float32 IfxScuCcu_getQspiFrequency ( void )

API to get Qspi divider frequency. This API returns the based on the divider value in CCUCON register and fSOURCE.

Returns
Qspi frequency (fQspi) in Hz

Definition at line 406 of file IfxScuCcu.c.

Referenced by IfxQspi_calcRealBaudrate(), IfxQspi_calculateTimeQuantumLength(), IfxQspi_getModuleFrequency(), and IfxScuCcu_setQspiFrequency().

◆ IfxScuCcu_getSourceFrequency()

IFX_EXTERN float32 IfxScuCcu_getSourceFrequency ( IfxScuCcu_Fsource fsource )

get source frequency fSOURCE. This API returns the source frequency based on the configurations with CCUCON register configuration.

Parameters
fsource fsource selection
Returns
Effective fSOURCE in Hz

Definition at line 436 of file IfxScuCcu.c.

Referenced by IfxScuCcu_getAdcFrequency(), IfxScuCcu_getAsclinFFrequency(), IfxScuCcu_getAsclinSFrequency(), IfxScuCcu_getBbbFrequency(), IfxScuCcu_getGethFrequency(), IfxScuCcu_getGtmFrequency(), IfxScuCcu_getI2cFrequency(), IfxScuCcu_getMcanFrequency(), IfxScuCcu_getMcanhFrequency(), IfxScuCcu_getMscFrequency(), IfxScuCcu_getQspiFrequency(), IfxScuCcu_getSpbFrequency(), IfxScuCcu_getSriFrequency(), IfxScuCcu_getStmFrequency(), IfxScuCcu_setAsclinFFrequency(), IfxScuCcu_setAsclinSFrequency(), IfxScuCcu_setBbbFrequency(), IfxScuCcu_setGethFrequency(), IfxScuCcu_setGtmFrequency(), IfxScuCcu_setI2cFrequency(), IfxScuCcu_setMcanFrequency(), IfxScuCcu_setMcanhFrequency(), IfxScuCcu_setMscFrequency(), IfxScuCcu_setQspiFrequency(), IfxScuCcu_setSpbFrequency(), IfxScuCcu_setSriFrequency(), and IfxScuCcu_setStmFrequency().

◆ IfxScuCcu_getSourceSelection()

IFX_INLINE IfxScuCcu_PllInputClockSelection IfxScuCcu_getSourceSelection ( void )

Returns the clock source selection.

Returns
Clock source selection

Definition at line 1667 of file IfxScuCcu.h.

◆ IfxScuCcu_getSpbFrequency()

IFX_EXTERN float32 IfxScuCcu_getSpbFrequency ( void )

API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider mode and/or SPBDIV divider value in CCUCON registers.

Returns
SPB frequency (fSPB) in Hz

Definition at line 479 of file IfxScuCcu.c.

Referenced by IfxCcu6_setT12Frequency(), IfxCcu6_setT13Frequency(), IfxCcu6_TimerWithTrigger_init(), IfxCcu6_TimerWithTrigger_updateInputFrequency(), IfxEdsadc_getModulatorInputClockFreq(), IfxEvadc_getAdcAnalogFrequency(), IfxEvadc_getAdcDigitalFrequency(), IfxEvadc_getAdcModuleFrequency(), IfxEvadc_initializeFAdcI(), IfxGpt12_getModuleFrequency(), IfxIom_getFrequency(), IfxMsc_downstreamAbraBaudCalculator(), IfxMsc_downstreamFractionalBaudCalculator(), IfxMsc_downstreamNormalBaudCalculator(), IfxMsc_getDownstreamAbraDisabledBaudrate(), IfxMsc_upstreamFractionalBaudCalculator(), IfxMsc_upstreamNormalBaudCalculator(), IfxPsi5_Psi5_getFracDivClock(), IfxPsi5_Psi5_initializeClock(), IfxPsi5_Psi5_initModuleConfig(), IfxPsi5s_getBaudrate(), IfxPsi5s_Psi5s_getFracDivClock(), IfxPsi5s_Psi5s_initializeClock(), IfxPsi5s_Psi5s_initModuleConfig(), IfxPsi5s_Psi5s_setBaudrate(), IfxScuCcu_getGtmFrequency(), IfxScuCcu_getModuleFrequency(), IfxScuCcu_setGtmFrequency(), IfxScuCcu_setSpbFrequency(), and IfxSent_getModuleClock().

◆ IfxScuCcu_getSriFrequency()

IFX_EXTERN float32 IfxScuCcu_getSriFrequency ( void )

API to get SRI divider frequency. This API returns the Sri frequency based on the divider values in CCUCON registers and fSOURCE.

Returns
Sri frequency (fSRI) in Hz

Definition at line 522 of file IfxScuCcu.c.

Referenced by IfxScuCcu_getCpuFrequency(), IfxScuCcu_getFsi2Frequency(), IfxScuCcu_getFsiFrequency(), IfxScuCcu_setCpuFrequency(), IfxScuCcu_setFsi2Frequency(), IfxScuCcu_setFsiFrequency(), and IfxScuCcu_setSriFrequency().

◆ IfxScuCcu_getStmFrequency()

IFX_INLINE float32 IfxScuCcu_getStmFrequency ( void )

API to get STM divider frequency. This API returns the based on the divider value in CCUCON register and fSOURCE.

Returns
STM frequency (fSTM) in Hz

Definition at line 1673 of file IfxScuCcu.h.

Referenced by IfxCpu_waitEvent(), IfxScuCcu_setStmFrequency(), IfxScuCcu_wait(), IfxScuCcu_waitWithWdtService(), and IfxStm_getFrequency().

◆ IfxScuCcu_setAsclinFFrequency()

IFX_EXTERN float32 IfxScuCcu_setAsclinFFrequency ( float32 asclinFFreq )

API to set ASCLINF frequency (with ASCLINF divider) This API configure ASCLINF divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value.

Parameters
asclinFFreq AsclinF frequency (fASCLINF) in Hz
Returns
Actual AsclinF frequency (fASCLINF) in Hz

Definition at line 637 of file IfxScuCcu.c.

◆ IfxScuCcu_setAsclinSFrequency()

IFX_EXTERN float32 IfxScuCcu_setAsclinSFrequency ( float32 asclinSFreq )

API to set ASCLINS frequency (with ASCLINS divider) This API configure ASCLINS divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value.

Parameters
asclinSFreq Desired AscLinS frequency in Hz
Returns
Actual AsclinS frequency (fASCLINS) in Hz

Definition at line 673 of file IfxScuCcu.c.

◆ IfxScuCcu_setBbbFrequency()

IFX_EXTERN float32 IfxScuCcu_setBbbFrequency ( float32 bbbFreq )

API to set BBB frequency (with Bbb divider) This API configure Bbb divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value.

Parameters
bbbFreq Bbb frequency (fBBB) in Hz
Returns
Actual Bbb frequency (fBBB) in Hz

Definition at line 725 of file IfxScuCcu.c.

◆ IfxScuCcu_setCpuFrequency()

IFX_EXTERN float32 IfxScuCcu_setCpuFrequency | ( | IfxCpu_ResourceCpu | cpu,
 |  | float32 | cpuFreq
 | ) |  |

API to set CPU frequency (with CPU divider) This API configure CPU divider values in CCUCON registers. The actual frequency is always depends on the feasibility with the divider value.

Parameters
cpu | CPU number for which fCPU to be configured
cpuFreq | Desired CPU frequency in Hz
Returns
Actual CPU[x] frequency in Hz, where x is the cpu number passed as parameter

Definition at line 766 of file IfxScuCcu.c.

◆ IfxScuCcu_setFsi2Frequency()

IFX_EXTERN float32 IfxScuCcu_setFsi2Frequency ( float32 fsi2Freq )

API to set FSI2 frequency (with FSI2 divider) This API configure Fsi2 divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value.

Parameters
fsi2Freq FSI2 frequency (fFSI) in Hz
Returns
Actual Fsi2 frequency (fFSI2) in Hz

Definition at line 819 of file IfxScuCcu.c.

◆ IfxScuCcu_setFsiFrequency()

IFX_EXTERN float32 IfxScuCcu_setFsiFrequency ( float32 fsiFreq )

API to set FSI frequency (with FSI divider) This API configure Fsi divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value.

Parameters
fsiFreq FSI frequency (fFSI) in Hz
Returns
Actual Fsi frequency (fFSI) in Hz

Definition at line 855 of file IfxScuCcu.c.

◆ IfxScuCcu_setGethFrequency()

IFX_EXTERN float32 IfxScuCcu_setGethFrequency ( float32 gethFreq )

API to set GETH frequency (with GETH divider) This API configure geth divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value.

Parameters
gethFreq GETH frequency (fGETH) in Hz
Returns
Actual Geth frequency (fGETH) in Hz

Definition at line 891 of file IfxScuCcu.c.

◆ IfxScuCcu_setGtmFrequency()

IFX_EXTERN float32 IfxScuCcu_setGtmFrequency ( float32 gtmFreq )

API to set GTM frequency (with GTM divider) This API configure GTM divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value.

Parameters
gtmFreq Desired GTM frequency in Hz
Returns
Actual GTM frequency in HZ

Definition at line 932 of file IfxScuCcu.c.

◆ IfxScuCcu_setI2cFrequency()

IFX_EXTERN float32 IfxScuCcu_setI2cFrequency ( float32 i2cFreq )

API to set I2C frequency (with I2C divider) This API configure adas divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value.

Parameters
i2cFreq I2C frequency (fI2C) in Hz
Returns
Actual I2C frequency (fI2C) in Hz

Definition at line 978 of file IfxScuCcu.c.

◆ IfxScuCcu_setMcanFrequency()

IFX_EXTERN float32 IfxScuCcu_setMcanFrequency ( float32 mcanFreq )

API to set MCAN frequency (with MCAN divider) This API configure MCAN divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value.

Parameters
mcanFreq Desired MSC frequency in Hz
Returns
Actual Mcan frequency (fMCAN) in Hz

Definition at line 1018 of file IfxScuCcu.c.

◆ IfxScuCcu_setMcanhFrequency()

IFX_EXTERN float32 IfxScuCcu_setMcanhFrequency ( float32 mcanhFreq )

API to set MCANH frequency (with MCANH divider) This API configure mcanh divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value.

Parameters
mcanhFreq MCANH frequency (fMCANH) in Hz
Returns
Actual MCanh frequency (fMCANH) in Hz

Definition at line 1072 of file IfxScuCcu.c.

◆ IfxScuCcu_setMscFrequency()

IFX_EXTERN float32 IfxScuCcu_setMscFrequency ( float32 mscFreq )

API to set MSC frequency (with MSC divider) This API configure MSC divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value.

Parameters
mscFreq Desired MSC frequency in Hz
Returns
Actual Msc frequency (fMSC) in Hz

Definition at line 1113 of file IfxScuCcu.c.

◆ IfxScuCcu_setQspiFrequency()

IFX_EXTERN float32 IfxScuCcu_setQspiFrequency ( float32 qspiFreq )

API to set QSPI frequency (with QSPI divider) This API configure Qspi divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value.

Parameters
qspiFreq Desired QSPI frequency in Hz
Returns
Actual Qspi frequency (fQspi) in Hz

Definition at line 1167 of file IfxScuCcu.c.

◆ IfxScuCcu_setSpbFrequency()

IFX_EXTERN float32 IfxScuCcu_setSpbFrequency ( float32 spbFreq )

API to set SPB frequency (with SPB divider) This API configure SPB divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value.

Parameters
spbFreq Desired SPB frequency in Hz
Returns
Actual SPB frequency in Hz

Definition at line 1221 of file IfxScuCcu.c.

◆ IfxScuCcu_setSriFrequency()

IFX_EXTERN float32 IfxScuCcu_setSriFrequency ( float32 sriFreq )

API to set SRI frequency (with SRI divider) This API configure Sri divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value.

Parameters
sriFreq Sri frequency (fSRI) in Hz
Returns
Actual Sri frequency (fSRI) in Hz

Definition at line 1272 of file IfxScuCcu.c.

◆ IfxScuCcu_setStmFrequency()

IFX_EXTERN float32 IfxScuCcu_setStmFrequency ( float32 stmFreq )

API to set STM frequency (with STM divider) This API configure Stm divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value.

Parameters
stmFreq Stm frequency (fASCLINF) in Hz
Returns
Actual Stm frequency (fSTM) in Hz

Definition at line 1313 of file IfxScuCcu.c.


iLLD_TC38A: Clock Control Configuration Functions

Data Structures | Functions
Clock Control Configuration Functions
iLLD » SCU » Standard Driver » Ccu Basic Functionality
Collaboration diagram for Clock Control Configuration Functions:

Data Structures

struct | IfxScuCcu_PerPllConfig
Configuration structure type for the Per Pll step. This structure must be used to configure the P, N and K2, K3 dividers . More...
struct | IfxScuCcu_SysPllConfig
Configuration structure type for the Pll initial step. This structure must be used to configure the P, N and K2 dividers for initial step. More...
struct | IfxScuCcu_CcuconRegConfig
Configuration structure type for CCUCON registers. More...
struct | IfxScuCcu_PllStepConfig
Configuration structure type for the Pll Steps for current jump control. More...
struct | IfxScuCcu_pllsParameterConfig
Configuration structure type for the Pll Parameters. More...
struct | IfxScuCcu_ClockDistributionConfig
Configuration structure type for all the CCUCON registers to configure clock distribution. More...
struct | IfxScuCcu_InitialStepConfig
Configuration structure type for the Pll Initial Step Configuration. More...
struct | IfxScuCcu_PllThrottleConfig
struct | IfxScuCcu_Config
Configuration structure SCU module. More...

Functions

IFX_INLINE boolean | IfxScuCcu_configureCcuInitialStep (const IfxScuCcu_InitialStepConfig *pllInitStepCfg)
This inline function configures the Ccu SYS PLLs initial step and PER PLL. More...
IFX_INLINE boolean | IfxScuCcu_distributeClockInline (const IfxScuCcu_ClockDistributionConfig *clockDistributionConfig)
Inlined API for clock distribution For each CCUCON register update the configured value with the mask. More...
IFX_EXTERN void | IfxScuCcu_distributeClock (IfxScuCcu_ClockDistributionConfig *clockDistributionConfig)
API for clock distribution. More...
IFX_EXTERN boolean | IfxScuCcu_init (const IfxScuCcu_Config *config)
API to initialize the SCU Clock Control Unit. This API initialize the Sys PLL with ramp steps, BUS dividers and Per PLL for the configuration provided by the configuration structure. FSyspll = (Fosc * Nsys)/(Psys * K2sys); Fpll1= (Fosc * Nper)/(Pper * K2per); Fpll2= (Fosc * Nper)/(Pper * K3per * 1.6); // if DIVBY = 0, else Fpll2= (Fosc * Nper)/(Pper * K3per * 2) // if DIVBY = 1. More...
IFX_EXTERN void | IfxScuCcu_initConfig (IfxScuCcu_Config *cfg)
Initializes the clock configuration with default values. More...
IFX_EXTERN void | IfxScuCcu_switchToBackupClock (const IfxScuCcu_Config *cfg)
API to switch to Backup clock from the current PLL frequency. More...

Detailed Description

Data Structure Documentation

◆ IfxScuCcu_PerPllConfig

struct IfxScuCcu_PerPllConfig

Configuration structure type for the Per Pll step. This structure must be used to configure the P, N and K2, K3 dividers .

Definition at line 546 of file IfxScuCcu.h.

Data Fields
uint8 | k2Divider | K2 divider value.
uint8 | k3Divider | K3 divider value.
uint8 | k3DividerBypass | Divider Bypass 0 - The divide by block in front of the K3-Divider is not bypassed. 1- The divide by block in front of the K3-Divider is bypassed.
uint8 | nDivider | N divider value for basic (initial) step.
uint8 | pDivider | P divider value for basic (initial) step.

◆ IfxScuCcu_SysPllConfig

struct IfxScuCcu_SysPllConfig

Configuration structure type for the Pll initial step. This structure must be used to configure the P, N and K2 dividers for initial step.

Definition at line 560 of file IfxScuCcu.h.

Data Fields
uint8 | k2Divider | K2 divider value.
uint8 | nDivider | N divider value.
uint8 | pDivider | P divider value.

◆ IfxScuCcu_CcuconRegConfig

struct IfxScuCcu_CcuconRegConfig

Configuration structure type for CCUCON registers.

Definition at line 573 of file IfxScuCcu.h.

Data Fields
uint32 | mask | CCUCON Mask to select the bit fields to be updated.
uint32 | value | CCUCON Register value to be updated.

◆ IfxScuCcu_PllStepConfig

struct IfxScuCcu_PllStepConfig

Configuration structure type for the Pll Steps for current jump control.

Definition at line 581 of file IfxScuCcu.h.

Data Fields
uint8 | k2Step | K2 divider value for this step.
float32 | waitTime | Wait time for for this step.

◆ IfxScuCcu_pllsParameterConfig

struct IfxScuCcu_pllsParameterConfig

Configuration structure type for the Pll Parameters.

Definition at line 589 of file IfxScuCcu.h.

Collaboration diagram for IfxScuCcu_pllsParameterConfig:
[legend]
Data Fields
IfxScuCcu_PerPllConfig | perPllConfig | Peripheral PLL Configurations.
IfxScuCcu_PllInputClockSelection | pllInputClockSelection | Pll input clock selection.
IfxScuCcu_SysPllConfig | sysPllConfig | System PLL Configurations.
uint32 | xtalFrequency | Xtal frequency.

◆ IfxScuCcu_ClockDistributionConfig

struct IfxScuCcu_ClockDistributionConfig

Configuration structure type for all the CCUCON registers to configure clock distribution.

Definition at line 615 of file IfxScuCcu.h.

Collaboration diagram for IfxScuCcu_ClockDistributionConfig:
[legend]
Data Fields
IfxScuCcu_CcuconRegConfig | ccucon0 | CCUCON0 Register configuration.
IfxScuCcu_CcuconRegConfig | ccucon1 | CCUCON1 Register configuration.
IfxScuCcu_CcuconRegConfig | ccucon2 | CCUCON2 Register configuration.
IfxScuCcu_CcuconRegConfig | ccucon5 | CCUCON5 Register configuration.
IfxScuCcu_CcuconRegConfig | ccucon6 | CCUCON6 Register configuration.
IfxScuCcu_CcuconRegConfig | ccucon7 | CCUCON7 Register configuration.
IfxScuCcu_CcuconRegConfig | ccucon8 | CCUCON8 Register configuration.
IfxScuCcu_CcuconRegConfig | ccucon9 | CCUCON9 Register configuration.

◆ IfxScuCcu_InitialStepConfig

struct IfxScuCcu_InitialStepConfig

Configuration structure type for the Pll Initial Step Configuration.

Definition at line 629 of file IfxScuCcu.h.

Collaboration diagram for IfxScuCcu_InitialStepConfig:
[legend]
Data Fields
IfxScuCcu_pllsParameterConfig | pllsParameters | Configuration Parameters for both PLLs.
float32 | waitTime | Wait time for for basic (initial) step.

◆ IfxScuCcu_PllThrottleConfig

struct IfxScuCcu_PllThrottleConfig

Definition at line 637 of file IfxScuCcu.h.

Collaboration diagram for IfxScuCcu_PllThrottleConfig:
[legend]
Data Fields
uint8 | numOfSteps | Number of PLL divider steps during clock throttling.
IFX_CONST IfxScuCcu_PllStepConfig * | pllSteps | Pointer to the array of Pll divider step configuration.

◆ IfxScuCcu_Config

struct IfxScuCcu_Config

Configuration structure SCU module.

Definition at line 657 of file IfxScuCcu.h.

Collaboration diagram for IfxScuCcu_Config:
[legend]
Data Fields
IfxScuCcu_ClockDistributionConfig | clockDistribution | Configuration of of bus clocks and other module clock distribution.
IFX_CONST IfxScuCcu_FlashWaitstateConfig * | flashFconWaitStateConfig | Configuration of flash waitstate.
IFX_CONST IfxScuCcu_Mod_Config * | modulationConfig | modulation configuration
IfxScuCcu_InitialStepConfig | pllInitialStepConfig | Configuration of first step which is same as internal osc frequency.
IfxScuCcu_PllThrottleConfig | sysPllThrottleConfig | Configuration of PLL throttling.

Function Documentation

◆ IfxScuCcu_configureCcuInitialStep()

IFX_INLINE boolean IfxScuCcu_configureCcuInitialStep ( const IfxScuCcu_InitialStepConfig * pllInitStepCfg )

This inline function configures the Ccu SYS PLLs initial step and PER PLL.

Definition at line 1172 of file IfxScuCcu.h.

Referenced by IfxScuCcu_init().

◆ IfxScuCcu_distributeClock()

IFX_EXTERN void IfxScuCcu_distributeClock ( IfxScuCcu_ClockDistributionConfig * clockDistributionConfig )

API for clock distribution.

Returns
None

Definition at line 115 of file IfxScuCcu.c.

◆ IfxScuCcu_distributeClockInline()

IFX_INLINE boolean IfxScuCcu_distributeClockInline ( const IfxScuCcu_ClockDistributionConfig * clockDistributionConfig )

Inlined API for clock distribution For each CCUCON register update the configured value with the mask.

Parameters
clockDistributionConfig pointer to clock distribution structure
Returns
TRUE: Operation successful, FALSE: Operation Failure

Definition at line 1360 of file IfxScuCcu.h.

Referenced by IfxScuCcu_distributeClock(), and IfxScuCcu_init().

◆ IfxScuCcu_init()

IFX_EXTERN boolean IfxScuCcu_init ( const IfxScuCcu_Config * config )

API to initialize the SCU Clock Control Unit. This API initialize the Sys PLL with ramp steps, BUS dividers and Per PLL for the configuration provided by the configuration structure. FSyspll = (Fosc * Nsys)/(Psys * K2sys); Fpll1= (Fosc * Nper)/(Pper * K2per); Fpll2= (Fosc * Nper)/(Pper * K3per * 1.6); // if DIVBY = 0, else Fpll2= (Fosc * Nper)/(Pper * K3per * 2) // if DIVBY = 1.

Note: Following SMU alarms are disabled before the PLL configuration and Enabled at the end of PLL lock in the function. PLL0,1,2 clock out of range frequency PLL0,1 VCO loss of lock event System PLL Oscillator Watchdog, input clock out of range The application should store/restore these alarm configurations if required.

Parameters
config Pointer to the configuration structure of the ScuCcu
Returns
Error status of the ScuCcu initialization process.
Return values
TRUE | If an error occurred during initialization.
FALSE | If initialization was successful.

Definition at line 563 of file IfxScuCcu.c.

Referenced by IfxPmsPm_initiateWakeup().

◆ IfxScuCcu_initConfig()

IFX_EXTERN void IfxScuCcu_initConfig ( IfxScuCcu_Config * cfg )

Initializes the clock configuration with default values.

Parameters
cfg Pointer to the configuration structure of the ScuCcu
Returns
None

Definition at line 594 of file IfxScuCcu.c.

◆ IfxScuCcu_switchToBackupClock()

IFX_EXTERN void IfxScuCcu_switchToBackupClock ( const IfxScuCcu_Config * cfg )

API to switch to Backup clock from the current PLL frequency.

Parameters
cfg Pointer to the configuration structure of the ScuCcu
Returns
None

Definition at line 1354 of file IfxScuCcu.c.

Referenced by IfxPmsPm_startSleepSequenceinFlash().


iLLD_TC38A: Enumerations

Enumerations
Enumerations
iLLD » SCU » Standard Driver » Ccu Basic Functionality
Collaboration diagram for Enumerations:

Enumerations

enum IfxScuCcu_Fsource {
IfxScuCcu_Fsource_0 = 0,
IfxScuCcu_Fsource_1,
IfxScuCcu_Fsource_2
}
clock source selection More...
enum IfxScuCcu_K2divider {
IfxScuCcu_K2divider_1 = 0,
IfxScuCcu_K2divider_2,
IfxScuCcu_K2divider_3,
IfxScuCcu_K2divider_4,
IfxScuCcu_K2divider_5,
IfxScuCcu_K2divider_6,
IfxScuCcu_K2divider_7,
IfxScuCcu_K2divider_8
}
MODULE_SCU.PLLCON1.B.K2DIV, specifies the K2-Divider. More...
enum IfxScuCcu_K3divider {
IfxScuCcu_K3divider_1 = 0,
IfxScuCcu_K3divider_2,
IfxScuCcu_K3divider_3,
IfxScuCcu_K3divider_4,
IfxScuCcu_K3divider_5,
IfxScuCcu_K3divider_6,
IfxScuCcu_K3divider_7,
IfxScuCcu_K3divider_8
}
MODULE_SCU.PLLCON1.B.K3DIV, specifies the K3-Divider. More...
enum IfxScuCcu_LowPowerDivRatio {
IfxScuCcu_LowPowerDivRatio_divBy30 = 1,
IfxScuCcu_LowPowerDivRatio_divBy60,
IfxScuCcu_LowPowerDivRatio_divBy120,
IfxScuCcu_LowPowerDivRatio_divBy240
}
Low Power Division Ratios. Corresponds to values of LPDIV in CCUCON0. More...
enum IfxScuCcu_ModulationAmplitude {
IfxScuCcu_ModulationAmplitude_0p5 = 0,
IfxScuCcu_ModulationAmplitude_1p0,
IfxScuCcu_ModulationAmplitude_1p25,
IfxScuCcu_ModulationAmplitude_1p5,
IfxScuCcu_ModulationAmplitude_2p0,
IfxScuCcu_ModulationAmplitude_2p5,
IfxScuCcu_ModulationAmplitude_count
}
ENUM for MA (%) values. More...
enum IfxScuCcu_Ndivider {
IfxScuCcu_Ndivider_1 = 0,
IfxScuCcu_Ndivider_2,
IfxScuCcu_Ndivider_3,
IfxScuCcu_Ndivider_4,
IfxScuCcu_Ndivider_5,
IfxScuCcu_Ndivider_6,
IfxScuCcu_Ndivider_7,
IfxScuCcu_Ndivider_8,
IfxScuCcu_Ndivider_9,
IfxScuCcu_Ndivider_10,
IfxScuCcu_Ndivider_11,
IfxScuCcu_Ndivider_12,
IfxScuCcu_Ndivider_13,
IfxScuCcu_Ndivider_14,
IfxScuCcu_Ndivider_15,
IfxScuCcu_Ndivider_16,
IfxScuCcu_Ndivider_17,
IfxScuCcu_Ndivider_18,
IfxScuCcu_Ndivider_19,
IfxScuCcu_Ndivider_20,
IfxScuCcu_Ndivider_21,
IfxScuCcu_Ndivider_22,
IfxScuCcu_Ndivider_23,
IfxScuCcu_Ndivider_24,
IfxScuCcu_Ndivider_25,
IfxScuCcu_Ndivider_26,
IfxScuCcu_Ndivider_27,
IfxScuCcu_Ndivider_28,
IfxScuCcu_Ndivider_29,
IfxScuCcu_Ndivider_30,
IfxScuCcu_Ndivider_31,
IfxScuCcu_Ndivider_32,
IfxScuCcu_Ndivider_33,
IfxScuCcu_Ndivider_34,
IfxScuCcu_Ndivider_35,
IfxScuCcu_Ndivider_36,
IfxScuCcu_Ndivider_37,
IfxScuCcu_Ndivider_38,
IfxScuCcu_Ndivider_39,
IfxScuCcu_Ndivider_40,
IfxScuCcu_Ndivider_41,
IfxScuCcu_Ndivider_42,
IfxScuCcu_Ndivider_43,
IfxScuCcu_Ndivider_44,
IfxScuCcu_Ndivider_45,
IfxScuCcu_Ndivider_46,
IfxScuCcu_Ndivider_47,
IfxScuCcu_Ndivider_48,
IfxScuCcu_Ndivider_49,
IfxScuCcu_Ndivider_50,
IfxScuCcu_Ndivider_51,
IfxScuCcu_Ndivider_52,
IfxScuCcu_Ndivider_53,
IfxScuCcu_Ndivider_54,
IfxScuCcu_Ndivider_55,
IfxScuCcu_Ndivider_56,
IfxScuCcu_Ndivider_57,
IfxScuCcu_Ndivider_58,
IfxScuCcu_Ndivider_59,
IfxScuCcu_Ndivider_60,
IfxScuCcu_Ndivider_61,
IfxScuCcu_Ndivider_62,
IfxScuCcu_Ndivider_63,
IfxScuCcu_Ndivider_64,
IfxScuCcu_Ndivider_65,
IfxScuCcu_Ndivider_66,
IfxScuCcu_Ndivider_67,
IfxScuCcu_Ndivider_68,
IfxScuCcu_Ndivider_69,
IfxScuCcu_Ndivider_70,
IfxScuCcu_Ndivider_71,
IfxScuCcu_Ndivider_72,
IfxScuCcu_Ndivider_73,
IfxScuCcu_Ndivider_74,
IfxScuCcu_Ndivider_75,
IfxScuCcu_Ndivider_76,
IfxScuCcu_Ndivider_77,
IfxScuCcu_Ndivider_78,
IfxScuCcu_Ndivider_79,
IfxScuCcu_Ndivider_80,
IfxScuCcu_Ndivider_81,
IfxScuCcu_Ndivider_82,
IfxScuCcu_Ndivider_83,
IfxScuCcu_Ndivider_84,
IfxScuCcu_Ndivider_85,
IfxScuCcu_Ndivider_86,
IfxScuCcu_Ndivider_87,
IfxScuCcu_Ndivider_88,
IfxScuCcu_Ndivider_89,
IfxScuCcu_Ndivider_90,
IfxScuCcu_Ndivider_91,
IfxScuCcu_Ndivider_92,
IfxScuCcu_Ndivider_93,
IfxScuCcu_Ndivider_94,
IfxScuCcu_Ndivider_95,
IfxScuCcu_Ndivider_96,
IfxScuCcu_Ndivider_97,
IfxScuCcu_Ndivider_98,
IfxScuCcu_Ndivider_99,
IfxScuCcu_Ndivider_100,
IfxScuCcu_Ndivider_101,
IfxScuCcu_Ndivider_102,
IfxScuCcu_Ndivider_103,
IfxScuCcu_Ndivider_104,
IfxScuCcu_Ndivider_105,
IfxScuCcu_Ndivider_106,
IfxScuCcu_Ndivider_107,
IfxScuCcu_Ndivider_108,
IfxScuCcu_Ndivider_109,
IfxScuCcu_Ndivider_110,
IfxScuCcu_Ndivider_111,
IfxScuCcu_Ndivider_112,
IfxScuCcu_Ndivider_113,
IfxScuCcu_Ndivider_114,
IfxScuCcu_Ndivider_115,
IfxScuCcu_Ndivider_116,
IfxScuCcu_Ndivider_117,
IfxScuCcu_Ndivider_118,
IfxScuCcu_Ndivider_119,
IfxScuCcu_Ndivider_120,
IfxScuCcu_Ndivider_121,
IfxScuCcu_Ndivider_122,
IfxScuCcu_Ndivider_123,
IfxScuCcu_Ndivider_124,
IfxScuCcu_Ndivider_125,
IfxScuCcu_Ndivider_126,
IfxScuCcu_Ndivider_127,
IfxScuCcu_Ndivider_128
}
MODULE_SCU.PLLCON0.B.NDIV, specifies the N-Divider. More...
enum IfxScuCcu_Pdivider {
IfxScuCcu_Pdivider_1 = 0,
IfxScuCcu_Pdivider_2,
IfxScuCcu_Pdivider_3,
IfxScuCcu_Pdivider_4,
IfxScuCcu_Pdivider_5,
IfxScuCcu_Pdivider_6,
IfxScuCcu_Pdivider_7,
IfxScuCcu_Pdivider_8
}
MODULE_SCU.PLLCON0.B.PDIV, specifies the P-Divider. More...
enum IfxScuCcu_PllInputClockSelection {
IfxScuCcu_PllInputClockSelection_fOsc1 = 0,
IfxScuCcu_PllInputClockSelection_fOsc0 = 1,
IfxScuCcu_PllInputClockSelection_fSysclk = 2
}
SysPll & Per Pll input clock selection. SYSPLLCON0.B.INSEL. More...
enum IfxScuCcu_Traprequest {
IfxScuCcu_Traprequest_esr0 = 0,
IfxScuCcu_Traprequest_esr1,
IfxScuCcu_Traprequest_trap2,
IfxScuCcu_Traprequest_smu
}
trap request type More...

Detailed Description

Enumeration Type Documentation

◆ IfxScuCcu_Fsource

enum IfxScuCcu_Fsource

clock source selection

Enumerator
IfxScuCcu_Fsource_0 | fSource0
IfxScuCcu_Fsource_1 | fSource1
IfxScuCcu_Fsource_2 | fSource2

Definition at line 300 of file IfxScuCcu.h.

◆ IfxScuCcu_K2divider

enum IfxScuCcu_K2divider

MODULE_SCU.PLLCON1.B.K2DIV, specifies the K2-Divider.

Enumerator
IfxScuCcu_K2divider_1 | K2-Divider 1.
IfxScuCcu_K2divider_2 | K2-Divider 2.
IfxScuCcu_K2divider_3 | K2-Divider 3.
IfxScuCcu_K2divider_4 | K2-Divider 4.
IfxScuCcu_K2divider_5 | K2-Divider 5.
IfxScuCcu_K2divider_6 | K2-Divider 6.
IfxScuCcu_K2divider_7 | K2-Divider 7.
IfxScuCcu_K2divider_8 | K2-Divider 8.

Definition at line 309 of file IfxScuCcu.h.

◆ IfxScuCcu_K3divider

enum IfxScuCcu_K3divider

MODULE_SCU.PLLCON1.B.K3DIV, specifies the K3-Divider.

Enumerator
IfxScuCcu_K3divider_1 | K3-Divider 1.
IfxScuCcu_K3divider_2 | K3-Divider 2.
IfxScuCcu_K3divider_3 | K3-Divider 3.
IfxScuCcu_K3divider_4 | K3-Divider 4.
IfxScuCcu_K3divider_5 | K3-Divider 5.
IfxScuCcu_K3divider_6 | K3-Divider 6.
IfxScuCcu_K3divider_7 | K3-Divider 7.
IfxScuCcu_K3divider_8 | K3-Divider 8.

Definition at line 323 of file IfxScuCcu.h.

◆ IfxScuCcu_LowPowerDivRatio

enum IfxScuCcu_LowPowerDivRatio

Low Power Division Ratios. Corresponds to values of LPDIV in CCUCON0.

Enumerator
IfxScuCcu_LowPowerDivRatio_divBy30 | Divide by 30.
IfxScuCcu_LowPowerDivRatio_divBy60 | Divide by 60.
IfxScuCcu_LowPowerDivRatio_divBy120 | Divide by 120.
IfxScuCcu_LowPowerDivRatio_divBy240 | Divide by 240.

Definition at line 338 of file IfxScuCcu.h.

◆ IfxScuCcu_ModulationAmplitude

enum IfxScuCcu_ModulationAmplitude

ENUM for MA (%) values.

Enumerator
IfxScuCcu_ModulationAmplitude_0p5 | 0.5%
IfxScuCcu_ModulationAmplitude_1p0 | 1.0%
IfxScuCcu_ModulationAmplitude_1p25 | 1.25%
IfxScuCcu_ModulationAmplitude_1p5 | 1.5%
IfxScuCcu_ModulationAmplitude_2p0 | 2%
IfxScuCcu_ModulationAmplitude_2p5 | 2.5%
IfxScuCcu_ModulationAmplitude_count | range

Definition at line 348 of file IfxScuCcu.h.

◆ IfxScuCcu_Ndivider

enum IfxScuCcu_Ndivider

MODULE_SCU.PLLCON0.B.NDIV, specifies the N-Divider.

Enumerator
IfxScuCcu_Ndivider_1 | N-divider 1.
IfxScuCcu_Ndivider_2 | N-divider 2.
IfxScuCcu_Ndivider_3 | N-divider 3.
IfxScuCcu_Ndivider_4 | N-divider 4.
IfxScuCcu_Ndivider_5 | N-divider 5.
IfxScuCcu_Ndivider_6 | N-divider 6.
IfxScuCcu_Ndivider_7 | N-divider 7.
IfxScuCcu_Ndivider_8 | N-divider 8.
IfxScuCcu_Ndivider_9 | N-divider 9.
IfxScuCcu_Ndivider_10 | N-divider 10.
IfxScuCcu_Ndivider_11 | N-divider 11.
IfxScuCcu_Ndivider_12 | N-divider 12.
IfxScuCcu_Ndivider_13 | N-divider 13.
IfxScuCcu_Ndivider_14 | N-divider 14.
IfxScuCcu_Ndivider_15 | N-divider 15.
IfxScuCcu_Ndivider_16 | N-divider 16.
IfxScuCcu_Ndivider_17 | N-divider 17.
IfxScuCcu_Ndivider_18 | N-divider 18.
IfxScuCcu_Ndivider_19 | N-divider 19.
IfxScuCcu_Ndivider_20 | N-divider 20.
IfxScuCcu_Ndivider_21 | N-divider 21.
IfxScuCcu_Ndivider_22 | N-divider 22.
IfxScuCcu_Ndivider_23 | N-divider 23.
IfxScuCcu_Ndivider_24 | N-divider 24.
IfxScuCcu_Ndivider_25 | N-divider 25.
IfxScuCcu_Ndivider_26 | N-divider 26.
IfxScuCcu_Ndivider_27 | N-divider 27.
IfxScuCcu_Ndivider_28 | N-divider 28.
IfxScuCcu_Ndivider_29 | N-divider 29.
IfxScuCcu_Ndivider_30 | N-divider 30.
IfxScuCcu_Ndivider_31 | N-divider 31.
IfxScuCcu_Ndivider_32 | N-divider 32.
IfxScuCcu_Ndivider_33 | N-divider 33.
IfxScuCcu_Ndivider_34 | N-divider 34.
IfxScuCcu_Ndivider_35 | N-divider 35.
IfxScuCcu_Ndivider_36 | N-divider 36.
IfxScuCcu_Ndivider_37 | N-divider 37.
IfxScuCcu_Ndivider_38 | N-divider 38.
IfxScuCcu_Ndivider_39 | N-divider 39.
IfxScuCcu_Ndivider_40 | N-divider 40.
IfxScuCcu_Ndivider_41 | N-divider 41.
IfxScuCcu_Ndivider_42 | N-divider 42.
IfxScuCcu_Ndivider_43 | N-divider 43.
IfxScuCcu_Ndivider_44 | N-divider 44.
IfxScuCcu_Ndivider_45 | N-divider 45.
IfxScuCcu_Ndivider_46 | N-divider 46.
IfxScuCcu_Ndivider_47 | N-divider 47.
IfxScuCcu_Ndivider_48 | N-divider 48.
IfxScuCcu_Ndivider_49 | N-divider 49.
IfxScuCcu_Ndivider_50 | N-divider 50.
IfxScuCcu_Ndivider_51 | N-divider 51.
IfxScuCcu_Ndivider_52 | N-divider 52.
IfxScuCcu_Ndivider_53 | N-divider 53.
IfxScuCcu_Ndivider_54 | N-divider 54.
IfxScuCcu_Ndivider_55 | N-divider 55.
IfxScuCcu_Ndivider_56 | N-divider 56.
IfxScuCcu_Ndivider_57 | N-divider 57.
IfxScuCcu_Ndivider_58 | N-divider 58.
IfxScuCcu_Ndivider_59 | N-divider 59.
IfxScuCcu_Ndivider_60 | N-divider 60.
IfxScuCcu_Ndivider_61 | N-divider 61.
IfxScuCcu_Ndivider_62 | N-divider 62.
IfxScuCcu_Ndivider_63 | N-divider 63.
IfxScuCcu_Ndivider_64 | N-divider 64.
IfxScuCcu_Ndivider_65 | N-divider 65.
IfxScuCcu_Ndivider_66 | N-divider 66.
IfxScuCcu_Ndivider_67 | N-divider 67.
IfxScuCcu_Ndivider_68 | N-divider 68.
IfxScuCcu_Ndivider_69 | N-divider 69.
IfxScuCcu_Ndivider_70 | N-divider 70.
IfxScuCcu_Ndivider_71 | N-divider 71.
IfxScuCcu_Ndivider_72 | N-divider 72.
IfxScuCcu_Ndivider_73 | N-divider 73.
IfxScuCcu_Ndivider_74 | N-divider 74.
IfxScuCcu_Ndivider_75 | N-divider 75.
IfxScuCcu_Ndivider_76 | N-divider 76.
IfxScuCcu_Ndivider_77 | N-divider 77.
IfxScuCcu_Ndivider_78 | N-divider 78.
IfxScuCcu_Ndivider_79 | N-divider 79.
IfxScuCcu_Ndivider_80 | N-divider 80.
IfxScuCcu_Ndivider_81 | N-divider 81.
IfxScuCcu_Ndivider_82 | N-divider 82.
IfxScuCcu_Ndivider_83 | N-divider 83.
IfxScuCcu_Ndivider_84 | N-divider 84.
IfxScuCcu_Ndivider_85 | N-divider 85.
IfxScuCcu_Ndivider_86 | N-divider 86.
IfxScuCcu_Ndivider_87 | N-divider 87.
IfxScuCcu_Ndivider_88 | N-divider 88.
IfxScuCcu_Ndivider_89 | N-divider 89.
IfxScuCcu_Ndivider_90 | N-divider 90.
IfxScuCcu_Ndivider_91 | N-divider 91.
IfxScuCcu_Ndivider_92 | N-divider 92.
IfxScuCcu_Ndivider_93 | N-divider 93.
IfxScuCcu_Ndivider_94 | N-divider 94.
IfxScuCcu_Ndivider_95 | N-divider 95.
IfxScuCcu_Ndivider_96 | N-divider 96.
IfxScuCcu_Ndivider_97 | N-divider 97.
IfxScuCcu_Ndivider_98 | N-divider 98.
IfxScuCcu_Ndivider_99 | N-divider 99.
IfxScuCcu_Ndivider_100 | N-divider 100.
IfxScuCcu_Ndivider_101 | N-divider 101.
IfxScuCcu_Ndivider_102 | N-divider 102.
IfxScuCcu_Ndivider_103 | N-divider 103.
IfxScuCcu_Ndivider_104 | N-divider 104.
IfxScuCcu_Ndivider_105 | N-divider 105.
IfxScuCcu_Ndivider_106 | N-divider 106.
IfxScuCcu_Ndivider_107 | N-divider 107.
IfxScuCcu_Ndivider_108 | N-divider 108.
IfxScuCcu_Ndivider_109 | N-divider 109.
IfxScuCcu_Ndivider_110 | N-divider 110.
IfxScuCcu_Ndivider_111 | N-divider 111.
IfxScuCcu_Ndivider_112 | N-divider 112.
IfxScuCcu_Ndivider_113 | N-divider 113.
IfxScuCcu_Ndivider_114 | N-divider 114.
IfxScuCcu_Ndivider_115 | N-divider 115.
IfxScuCcu_Ndivider_116 | N-divider 116.
IfxScuCcu_Ndivider_117 | N-divider 117.
IfxScuCcu_Ndivider_118 | N-divider 118.
IfxScuCcu_Ndivider_119 | N-divider 119.
IfxScuCcu_Ndivider_120 | N-divider 120.
IfxScuCcu_Ndivider_121 | N-divider 121.
IfxScuCcu_Ndivider_122 | N-divider 122.
IfxScuCcu_Ndivider_123 | N-divider 123.
IfxScuCcu_Ndivider_124 | N-divider 124.
IfxScuCcu_Ndivider_125 | N-divider 125.
IfxScuCcu_Ndivider_126 | N-divider 126.
IfxScuCcu_Ndivider_127 | N-divider 127.
IfxScuCcu_Ndivider_128 | N-divider 128.

Definition at line 361 of file IfxScuCcu.h.

◆ IfxScuCcu_Pdivider

enum IfxScuCcu_Pdivider

MODULE_SCU.PLLCON0.B.PDIV, specifies the P-Divider.

Enumerator
IfxScuCcu_Pdivider_1 | P-divider 1.
IfxScuCcu_Pdivider_2 | P-divider 2.
IfxScuCcu_Pdivider_3 | P-divider 3.
IfxScuCcu_Pdivider_4 | P-divider 4.
IfxScuCcu_Pdivider_5 | P-divider 5.
IfxScuCcu_Pdivider_6 | P-divider 6.
IfxScuCcu_Pdivider_7 | P-divider 7.
IfxScuCcu_Pdivider_8 | P-divider 8.

Definition at line 495 of file IfxScuCcu.h.

◆ IfxScuCcu_PllInputClockSelection

enum IfxScuCcu_PllInputClockSelection

SysPll & Per Pll input clock selection. SYSPLLCON0.B.INSEL.

Enumerator
IfxScuCcu_PllInputClockSelection_fOsc1 | Backup clock select.
IfxScuCcu_PllInputClockSelection_fOsc0 | fOsc0 or XTAL clock select
IfxScuCcu_PllInputClockSelection_fSysclk | fOsc1

Definition at line 510 of file IfxScuCcu.h.

◆ IfxScuCcu_Traprequest

enum IfxScuCcu_Traprequest

trap request type

Enumerator
IfxScuCcu_Traprequest_esr0 | external service request 0
IfxScuCcu_Traprequest_esr1 | external service request 1
IfxScuCcu_Traprequest_trap2 | trap2
IfxScuCcu_Traprequest_smu | safety management unit

Definition at line 519 of file IfxScuCcu.h.


iLLD_TC38A: Eru Basic Functionality

Modules
Eru Basic Functionality
iLLD » SCU » Standard Driver
Collaboration diagram for Eru Basic Functionality:

Modules

ERU: Enumerations
ERU: External Request Selection
ERU: Event Trigger Logic
ERU: Connecting Matrix
ERU: Output Gating Unit
ERU: Data Structures
ERU: Input Filtering

Detailed Description


iLLD_TC38A: ERU: Enumerations

Enumerations
ERU: Enumerations
iLLD » SCU » Standard Driver » Eru Basic Functionality
Collaboration diagram for ERU: Enumerations:

Enumerations

enum IfxScuEru_ExternalInputSelection {
IfxScuEru_ExternalInputSelection_0 = 0,
IfxScuEru_ExternalInputSelection_1,
IfxScuEru_ExternalInputSelection_2,
IfxScuEru_ExternalInputSelection_3,
IfxScuEru_ExternalInputSelection_4,
IfxScuEru_ExternalInputSelection_5
}
Input line selection for input channel
Definition in Ifx_SCU.EICR[i].B.EXIS(j) (i = 0,1,2,3 and j = 0,1) More...
enum IfxScuEru_InputChannel {
IfxScuEru_InputChannel_0 = 0,
IfxScuEru_InputChannel_1,
IfxScuEru_InputChannel_2,
IfxScuEru_InputChannel_3,
IfxScuEru_InputChannel_4,
IfxScuEru_InputChannel_5,
IfxScuEru_InputChannel_6,
IfxScuEru_InputChannel_7
}
Input channel for input selection and conditioning of trigger or gating functions. More...
enum IfxScuEru_InputFilterDepth {
IfxScuEru_InputFilterDepth_disable = 0,
IfxScuEru_InputFilterDepth_1,
IfxScuEru_InputFilterDepth_2,
IfxScuEru_InputFilterDepth_3,
IfxScuEru_InputFilterDepth_4,
IfxScuEru_InputFilterDepth_5,
IfxScuEru_InputFilterDepth_6,
IfxScuEru_InputFilterDepth_7,
IfxScuEru_InputFilterDepth_8,
IfxScuEru_InputFilterDepth_9,
IfxScuEru_InputFilterDepth_10,
IfxScuEru_InputFilterDepth_11,
IfxScuEru_InputFilterDepth_12,
IfxScuEru_InputFilterDepth_13,
IfxScuEru_InputFilterDepth_14,
IfxScuEru_InputFilterDepth_15
}
Digital Glitch Filter Clock Depth determines the number of port input samples considered
in the calculation of the floating average digital filter output for all enabled FLRQ filters.
Definition in Ifx_SCU.EIFILT.B.DEPTH. More...
enum IfxScuEru_InputFilterPredivider {
IfxScuEru_InputFilterPredivider_disable = 0,
IfxScuEru_InputFilterPredivider_1,
IfxScuEru_InputFilterPredivider_2,
IfxScuEru_InputFilterPredivider_3,
IfxScuEru_InputFilterPredivider_4,
IfxScuEru_InputFilterPredivider_5,
IfxScuEru_InputFilterPredivider_6,
IfxScuEru_InputFilterPredivider_7,
IfxScuEru_InputFilterPredivider_8,
IfxScuEru_InputFilterPredivider_9,
IfxScuEru_InputFilterPredivider_10,
IfxScuEru_InputFilterPredivider_11,
IfxScuEru_InputFilterPredivider_12,
IfxScuEru_InputFilterPredivider_13,
IfxScuEru_InputFilterPredivider_14,
IfxScuEru_InputFilterPredivider_15
}
Digital Glitch Filter Clock Predivider to generate the digital filter sample clock
Definition in Ifx_SCU.EIFILT.B.FILTDIV. More...
enum IfxScuEru_InputFilterRequestSelection {
IfxScuEru_InputFilterRequestSelection_0A,
IfxScuEru_InputFilterRequestSelection_5A,
IfxScuEru_InputFilterRequestSelection_2A,
IfxScuEru_InputFilterRequestSelection_3A,
IfxScuEru_InputFilterRequestSelection_0C,
IfxScuEru_InputFilterRequestSelection_1C,
IfxScuEru_InputFilterRequestSelection_3C,
IfxScuEru_InputFilterRequestSelection_2C,
IfxScuEru_InputFilterRequestSelection_4A,
IfxScuEru_InputFilterRequestSelection_6A,
IfxScuEru_InputFilterRequestSelection_1A,
IfxScuEru_InputFilterRequestSelection_7A,
IfxScuEru_InputFilterRequestSelection_6D,
IfxScuEru_InputFilterRequestSelection_4D,
IfxScuEru_InputFilterRequestSelection_2D,
IfxScuEru_InputFilterRequestSelection_3D,
IfxScuEru_InputFilterRequestSelection_7C
}
Digital port pin selection for input filter
Definition in Ifx_SCU.EIFILT.B.FILRQ(i)(j) (i = 0 to7 and j = A, B, C, D) More...
enum IfxScuEru_InputNodePointer {
IfxScuEru_InputNodePointer_0 = 0,
IfxScuEru_InputNodePointer_1,
IfxScuEru_InputNodePointer_2,
IfxScuEru_InputNodePointer_3,
IfxScuEru_InputNodePointer_4,
IfxScuEru_InputNodePointer_5,
IfxScuEru_InputNodePointer_6,
IfxScuEru_InputNodePointer_7
}
Determines the destination (output channel) for trigger event (if enabled by Ifx_SCU.EICR[i].B.EIEN(j)).
Definition in Ifx_SCU.EICR[i].B.INP(j) (i = 0,1,2,3 and j = 0,1) More...
enum IfxScuEru_InterruptGatingPattern {
IfxScuEru_InterruptGatingPattern_none = 0,
IfxScuEru_InterruptGatingPattern_alwaysActive = 1,
IfxScuEru_InterruptGatingPattern_patternMatch = 2,
IfxScuEru_InterruptGatingPattern_patternMiss = 3
}
Determines the pattern detection influence on the ouput lines ERU_GOUTy and ERU_IOUTy
Definition in Ifx_SCU.IGCR[i].B.IGP(j) (i = 0,1,2,3 and j = 0,1) More...
enum IfxScuEru_OutputChannel {
IfxScuEru_OutputChannel_0 = 0,
IfxScuEru_OutputChannel_1,
IfxScuEru_OutputChannel_2,
IfxScuEru_OutputChannel_3,
IfxScuEru_OutputChannel_4,
IfxScuEru_OutputChannel_5,
IfxScuEru_OutputChannel_6,
IfxScuEru_OutputChannel_7
}
Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...) More...

Detailed Description

Enumeration Type Documentation

◆ IfxScuEru_ExternalInputSelection

enum IfxScuEru_ExternalInputSelection

Input line selection for input channel
Definition in Ifx_SCU.EICR[i].B.EXIS(j) (i = 0,1,2,3 and j = 0,1)

Enumerator
IfxScuEru_ExternalInputSelection_0 | External input 0 is selected.
IfxScuEru_ExternalInputSelection_1 | External input 1 is selected.
IfxScuEru_ExternalInputSelection_2 | External input 2 is selected.
IfxScuEru_ExternalInputSelection_3 | External input 3 is selected.
IfxScuEru_ExternalInputSelection_4 | External input 4 is selected.
IfxScuEru_ExternalInputSelection_5 | External input 5 is selected.

Definition at line 82 of file IfxScuEru.h.

◆ IfxScuEru_InputChannel

enum IfxScuEru_InputChannel

Input channel for input selection and conditioning of trigger or gating functions.

Enumerator
IfxScuEru_InputChannel_0 | External Input channel 0.
IfxScuEru_InputChannel_1 | External Input channel 1.
IfxScuEru_InputChannel_2 | External Input channel 2.
IfxScuEru_InputChannel_3 | External Input channel 3.
IfxScuEru_InputChannel_4 | External Input channel 4.
IfxScuEru_InputChannel_5 | External Input channel 5.
IfxScuEru_InputChannel_6 | External Input channel 6.
IfxScuEru_InputChannel_7 | External Input channel 7.

Definition at line 94 of file IfxScuEru.h.

◆ IfxScuEru_InputFilterDepth

enum IfxScuEru_InputFilterDepth

Digital Glitch Filter Clock Depth determines the number of port input samples considered
in the calculation of the floating average digital filter output for all enabled FLRQ filters.
Definition in Ifx_SCU.EIFILT.B.DEPTH.

Enumerator
IfxScuEru_InputFilterDepth_disable | Disable all glitch filtering.
IfxScuEru_InputFilterDepth_1 | glitch filter depth 1
IfxScuEru_InputFilterDepth_2 | glitch filter depth 2
IfxScuEru_InputFilterDepth_3 | glitch filter depth 3
IfxScuEru_InputFilterDepth_4 | glitch filter depth 4
IfxScuEru_InputFilterDepth_5 | glitch filter depth 5
IfxScuEru_InputFilterDepth_6 | glitch filter depth 6
IfxScuEru_InputFilterDepth_7 | glitch filter depth 7
IfxScuEru_InputFilterDepth_8 | glitch filter depth 8
IfxScuEru_InputFilterDepth_9 | glitch filter depth 9
IfxScuEru_InputFilterDepth_10 | glitch filter depth 10
IfxScuEru_InputFilterDepth_11 | glitch filter depth 11
IfxScuEru_InputFilterDepth_12 | glitch filter depth 12
IfxScuEru_InputFilterDepth_13 | glitch filter depth 13
IfxScuEru_InputFilterDepth_14 | glitch filter depth 14
IfxScuEru_InputFilterDepth_15 | glitch filter depth 15

Definition at line 110 of file IfxScuEru.h.

◆ IfxScuEru_InputFilterPredivider

enum IfxScuEru_InputFilterPredivider

Digital Glitch Filter Clock Predivider to generate the digital filter sample clock
Definition in Ifx_SCU.EIFILT.B.FILTDIV.

Enumerator
IfxScuEru_InputFilterPredivider_disable | Disable all glitch filtering.
IfxScuEru_InputFilterPredivider_1 | glitch filter predivider 1
IfxScuEru_InputFilterPredivider_2 | glitch filter predivider 2
IfxScuEru_InputFilterPredivider_3 | glitch filter predivider 3
IfxScuEru_InputFilterPredivider_4 | glitch filter predivider 4
IfxScuEru_InputFilterPredivider_5 | glitch filter predivider 5
IfxScuEru_InputFilterPredivider_6 | glitch filter predivider 6
IfxScuEru_InputFilterPredivider_7 | glitch filter predivider 7
IfxScuEru_InputFilterPredivider_8 | glitch filter predivider 8
IfxScuEru_InputFilterPredivider_9 | glitch filter predivider 9
IfxScuEru_InputFilterPredivider_10 | glitch filter predivider 10
IfxScuEru_InputFilterPredivider_11 | glitch filter predivider 11
IfxScuEru_InputFilterPredivider_12 | glitch filter predivider 12
IfxScuEru_InputFilterPredivider_13 | glitch filter predivider 13
IfxScuEru_InputFilterPredivider_14 | glitch filter predivider 14
IfxScuEru_InputFilterPredivider_15 | glitch filter predivider 15

Definition at line 133 of file IfxScuEru.h.

◆ IfxScuEru_InputFilterRequestSelection

enum IfxScuEru_InputFilterRequestSelection

Digital port pin selection for input filter
Definition in Ifx_SCU.EIFILT.B.FILRQ(i)(j) (i = 0 to7 and j = A, B, C, D)

Enumerator
IfxScuEru_InputFilterRequestSelection_0A | REQ0A.
IfxScuEru_InputFilterRequestSelection_5A | REQ5A.
IfxScuEru_InputFilterRequestSelection_2A | REQ2A.
IfxScuEru_InputFilterRequestSelection_3A | REQ3A.
IfxScuEru_InputFilterRequestSelection_0C | REQ0C.
IfxScuEru_InputFilterRequestSelection_1C | REQ1C.
IfxScuEru_InputFilterRequestSelection_3C | REQ3C.
IfxScuEru_InputFilterRequestSelection_2C | REQ2C.
IfxScuEru_InputFilterRequestSelection_4A | REQ4A.
IfxScuEru_InputFilterRequestSelection_6A | REQ6A.
IfxScuEru_InputFilterRequestSelection_1A | REQ1A.
IfxScuEru_InputFilterRequestSelection_7A | REQ7A.
IfxScuEru_InputFilterRequestSelection_6D | REQ6D.
IfxScuEru_InputFilterRequestSelection_4D | REQ4D.
IfxScuEru_InputFilterRequestSelection_2D | REQ2D.
IfxScuEru_InputFilterRequestSelection_3D | REQ3D.
IfxScuEru_InputFilterRequestSelection_7C | REQ7C.

Definition at line 156 of file IfxScuEru.h.

◆ IfxScuEru_InputNodePointer

enum IfxScuEru_InputNodePointer

Determines the destination (output channel) for trigger event (if enabled by Ifx_SCU.EICR[i].B.EIEN(j)).
Definition in Ifx_SCU.EICR[i].B.INP(j) (i = 0,1,2,3 and j = 0,1)

Enumerator
IfxScuEru_InputNodePointer_0 | Event from input ETLx triggers output OGU0 (signal TRx0)
IfxScuEru_InputNodePointer_1 | Event from input ETLx triggers output OGU1 (signal TRx1)
IfxScuEru_InputNodePointer_2 | Event from input ETLx triggers output OGU2 (signal TRx2)
IfxScuEru_InputNodePointer_3 | Event from input ETLx triggers output OGU3 (signal TRx3)
IfxScuEru_InputNodePointer_4 | Event from input ETLx triggers output OGU4 (signal TRx4)
IfxScuEru_InputNodePointer_5 | Event from input ETLx triggers output OGU5 (signal TRx5)
IfxScuEru_InputNodePointer_6 | Event from input ETLx triggers output OGU6 (signal TRx6)
IfxScuEru_InputNodePointer_7 | Event from input ETLx triggers output OGU7 (signal TRx7)

Definition at line 180 of file IfxScuEru.h.

◆ IfxScuEru_InterruptGatingPattern

enum IfxScuEru_InterruptGatingPattern

Determines the pattern detection influence on the ouput lines ERU_GOUTy and ERU_IOUTy
Definition in Ifx_SCU.IGCR[i].B.IGP(j) (i = 0,1,2,3 and j = 0,1)

Enumerator
IfxScuEru_InterruptGatingPattern_none | IOUTy is inactive, (the pattern is not considered)
IfxScuEru_InterruptGatingPattern_alwaysActive | IOUTy is activated in response to a trigger event, (the pattern is not considered)
IfxScuEru_InterruptGatingPattern_patternMatch | IOUTy is activated if a trigger event occures while the pattern is present, (the pattern is considered)
IfxScuEru_InterruptGatingPattern_patternMiss | IOUTy is activated if a trigger event occures while the pattern is not present, (the pattern is not considered)

Definition at line 195 of file IfxScuEru.h.

◆ IfxScuEru_OutputChannel

enum IfxScuEru_OutputChannel

Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)

Enumerator
IfxScuEru_OutputChannel_0 | Output channel 0.
IfxScuEru_OutputChannel_1 | Output channel 1.
IfxScuEru_OutputChannel_2 | Output channel 2.
IfxScuEru_OutputChannel_3 | Output channel 3.
IfxScuEru_OutputChannel_4 | Output channel 4.
IfxScuEru_OutputChannel_5 | Output channel 5.
IfxScuEru_OutputChannel_6 | Output channel 6.
IfxScuEru_OutputChannel_7 | Output channel 7.

Definition at line 205 of file IfxScuEru.h.


iLLD_TC38A: ERU: External Request Selection

Functions
ERU: External Request Selection
iLLD » SCU » Standard Driver » Eru Basic Functionality
Collaboration diagram for ERU: External Request Selection:

Functions

IFX_INLINE void | IfxScuEru_initReqPin (IfxScu_Req_In *req, IfxPort_InputMode inputMode)
Initialises the External request Pin. More...
IFX_EXTERN void | IfxScuEru_selectExternalInput (IfxScuEru_InputChannel inputChannel, IfxScuEru_ExternalInputSelection inputSignal)
Determines which input line is selcted for input channel x. More...

Detailed Description

Function Documentation

◆ IfxScuEru_initReqPin()

IFX_INLINE void IfxScuEru_initReqPin | ( | IfxScu_Req_In * | req,
 |  | IfxPort_InputMode | inputMode
 | ) |  |

Initialises the External request Pin.

Parameters
req | External request pin
inputMode | Port Input mode
Returns
None

Definition at line 478 of file IfxScuEru.h.

◆ IfxScuEru_selectExternalInput()

IFX_EXTERN void IfxScuEru_selectExternalInput | ( | IfxScuEru_InputChannel | inputChannel,
 |  | IfxScuEru_ExternalInputSelection | inputSignal
 | ) |  |

Determines which input line is selcted for input channel x.

Parameters
inputChannel | Input channel for input selection and conditioning of trigger or gating functions
inputSignal | Input line selection for input channel
Returns
None

Definition at line 405 of file IfxScuEru.c.

Referenced by IfxScuEru_initReqPin().


iLLD_TC38A: ERU: Event Trigger Logic

Functions
ERU: Event Trigger Logic
iLLD » SCU » Standard Driver » Eru Basic Functionality
Collaboration diagram for ERU: Event Trigger Logic:

Functions

IFX_EXTERN void | IfxScuEru_clearAllEventFlags (void)
Clears the external event flag of input channel x (INTFx) More...
IFX_EXTERN void | IfxScuEru_clearEventFlag (IfxScuEru_InputChannel inputChannel)
Clears the external event flag of input channel x (INTFx) More...
IFX_EXTERN void | IfxScuEru_clearInputChannelConfiguration (IfxScuEru_InputChannel inputChannel)
Clears all the configuration for the given input channel x. More...
IFX_EXTERN void | IfxScuEru_disableAutoClear (IfxScuEru_InputChannel inputChannel)
Disables the automatic clearing of INTFx when the edge of input channel which has not been selected, is detected. More...
IFX_EXTERN void | IfxScuEru_disableFallingEdgeDetection (IfxScuEru_InputChannel inputChannel)
Disables the falling edge of input channel to set the bit INTF x. More...
IFX_EXTERN void | IfxScuEru_disableRisingEdgeDetection (IfxScuEru_InputChannel inputChannel)
Disables the rising edge of input channel to set the bit INTF x. More...
IFX_EXTERN void | IfxScuEru_enableAutoClear (IfxScuEru_InputChannel inputChannel)
Enables the automatic clearing of INTFx when the edge of input channel which has not been selected, is detected. More...
IFX_EXTERN void | IfxScuEru_enableFallingEdgeDetection (IfxScuEru_InputChannel inputChannel)
Enables the falling edge of input channel to set the bit INTF x. More...
IFX_EXTERN void | IfxScuEru_enableRisingEdgeDetection (IfxScuEru_InputChannel inputChannel)
Enables the rising edge of input channel to set the bit INTF x. More...
IFX_EXTERN uint32 | IfxScuEru_getAllEventFlagsStatus (void)
Returns the status of the flags of all input channels. More...
IFX_EXTERN boolean | IfxScuEru_getEventFlagStatus (IfxScuEru_InputChannel inputChannel)
Returns the status of the external event flag of input channel x (INTFx) More...
IFX_EXTERN uint32 | IfxScuEru_getInputChannelConfiguration (IfxScuEru_InputChannel inputChannel)
Returns all the configuration for the given input channel x. More...
IFX_EXTERN void | IfxScuEru_setEventFlag (IfxScuEru_InputChannel inputChannel)
Sets the external event flag of input channel x (INTFx) More...

Detailed Description

Function Documentation

◆ IfxScuEru_clearAllEventFlags()

IFX_EXTERN void IfxScuEru_clearAllEventFlags ( void )

Clears the external event flag of input channel x (INTFx)

Returns
None

Definition at line 61 of file IfxScuEru.c.

◆ IfxScuEru_clearEventFlag()

IFX_EXTERN void IfxScuEru_clearEventFlag ( IfxScuEru_InputChannel inputChannel )

Clears the external event flag of input channel x (INTFx)

Parameters
inputChannel Input channel for input selection and conditioning of trigger or gating functions
Returns
None

Definition at line 68 of file IfxScuEru.c.

◆ IfxScuEru_clearInputChannelConfiguration()

IFX_EXTERN void IfxScuEru_clearInputChannelConfiguration ( IfxScuEru_InputChannel inputChannel )

Clears all the configuration for the given input channel x.

Parameters
inputChannel Input channel for input selection and conditioning of trigger or gating functions
Returns
None

Definition at line 75 of file IfxScuEru.c.

◆ IfxScuEru_disableAutoClear()

IFX_EXTERN void IfxScuEru_disableAutoClear ( IfxScuEru_InputChannel inputChannel )

Disables the automatic clearing of INTFx when the edge of input channel which has not been selected, is detected.

Parameters
inputChannel Input channel for input selection and conditioning of trigger or gating functions
Returns
None

Definition at line 139 of file IfxScuEru.c.

◆ IfxScuEru_disableFallingEdgeDetection()

IFX_EXTERN void IfxScuEru_disableFallingEdgeDetection ( IfxScuEru_InputChannel inputChannel )

Disables the falling edge of input channel to set the bit INTF x.

Parameters
inputChannel Input channel for input selection and conditioning of trigger or gating functions
Returns
None

Definition at line 159 of file IfxScuEru.c.

◆ IfxScuEru_disableRisingEdgeDetection()

IFX_EXTERN void IfxScuEru_disableRisingEdgeDetection ( IfxScuEru_InputChannel inputChannel )

Disables the rising edge of input channel to set the bit INTF x.

Parameters
inputChannel Input channel for input selection and conditioning of trigger or gating functions
Returns
None

Definition at line 199 of file IfxScuEru.c.

◆ IfxScuEru_enableAutoClear()

IFX_EXTERN void IfxScuEru_enableAutoClear ( IfxScuEru_InputChannel inputChannel )

Enables the automatic clearing of INTFx when the edge of input channel which has not been selected, is detected.

Parameters
inputChannel Input channel for input selection and conditioning of trigger or gating functions
Returns
None

Definition at line 239 of file IfxScuEru.c.

◆ IfxScuEru_enableFallingEdgeDetection()

IFX_EXTERN void IfxScuEru_enableFallingEdgeDetection ( IfxScuEru_InputChannel inputChannel )

Enables the falling edge of input channel to set the bit INTF x.

Parameters
inputChannel Input channel for input selection and conditioning of trigger or gating functions
Returns
None

Definition at line 259 of file IfxScuEru.c.

◆ IfxScuEru_enableRisingEdgeDetection()

IFX_EXTERN void IfxScuEru_enableRisingEdgeDetection ( IfxScuEru_InputChannel inputChannel )

Enables the rising edge of input channel to set the bit INTF x.

Parameters
inputChannel Input channel for input selection and conditioning of trigger or gating functions
Returns
None

Definition at line 299 of file IfxScuEru.c.

◆ IfxScuEru_getAllEventFlagsStatus()

IFX_EXTERN uint32 IfxScuEru_getAllEventFlagsStatus ( void )

Returns the status of the flags of all input channels.

Returns
All flags Status

Definition at line 339 of file IfxScuEru.c.

◆ IfxScuEru_getEventFlagStatus()

IFX_EXTERN boolean IfxScuEru_getEventFlagStatus ( IfxScuEru_InputChannel inputChannel )

Returns the status of the external event flag of input channel x (INTFx)

Parameters
inputChannel Input channel for input selection and conditioning of trigger or gating functions
Returns
Status (TRUE / FALSE)

Definition at line 345 of file IfxScuEru.c.

◆ IfxScuEru_getInputChannelConfiguration()

IFX_EXTERN uint32 IfxScuEru_getInputChannelConfiguration ( IfxScuEru_InputChannel inputChannel )

Returns all the configuration for the given input channel x.

Parameters
inputChannel Input channel for input selection and conditioning of trigger or gating functions
Returns
Input channel configuration

Definition at line 352 of file IfxScuEru.c.

◆ IfxScuEru_setEventFlag()

IFX_EXTERN void IfxScuEru_setEventFlag ( IfxScuEru_InputChannel inputChannel )

Sets the external event flag of input channel x (INTFx)

Parameters
inputChannel Input channel for input selection and conditioning of trigger or gating functions
Returns
None

Definition at line 425 of file IfxScuEru.c.


iLLD_TC38A: ERU: Connecting Matrix

Functions
ERU: Connecting Matrix
iLLD » SCU » Standard Driver » Eru Basic Functionality
Collaboration diagram for ERU: Connecting Matrix:

Functions

IFX_EXTERN void | IfxScuEru_connectTrigger (IfxScuEru_InputChannel inputChannel, IfxScuEru_InputNodePointer triggerSelect)
Determines the destination (output channel) for trigger event (if enabled by Ifx_SCU.EICR[i].B.EIEN(j), i = 0,1,2,3 and j = 0,1). More...
IFX_EXTERN void | IfxScuEru_disableTriggerPulse (IfxScuEru_InputChannel inputChannel)
Disables the generation of a trigger event for input channel x when the selected edge is detected. More...
IFX_EXTERN void | IfxScuEru_enableTriggerPulse (IfxScuEru_InputChannel inputChannel)
Enables the generation of a trigger event for input channel x when the selected edge is detected. More...
IFX_EXTERN void | IfxScuEru_setFlagPatternDetection (IfxScuEru_OutputChannel outputChannel, IfxScuEru_InputChannel inputChannel, boolean state)
Enables the flag INTFx to take part in the pattern detection for output gating. More...

Detailed Description

Function Documentation

◆ IfxScuEru_connectTrigger()

IFX_EXTERN void IfxScuEru_connectTrigger | ( | IfxScuEru_InputChannel | inputChannel,
 |  | IfxScuEru_InputNodePointer | triggerSelect
 | ) |  |

Determines the destination (output channel) for trigger event (if enabled by Ifx_SCU.EICR[i].B.EIEN(j), i = 0,1,2,3 and j = 0,1).

Parameters
inputChannel | Input channel for input selection and conditioning of trigger or gating functions
triggerSelect | Trigger event selection
Returns
None

Definition at line 119 of file IfxScuEru.c.

◆ IfxScuEru_disableTriggerPulse()

IFX_EXTERN void IfxScuEru_disableTriggerPulse ( IfxScuEru_InputChannel inputChannel )

Disables the generation of a trigger event for input channel x when the selected edge is detected.

Parameters
inputChannel Input channel for input selection and conditioning of trigger or gating functions
Returns
None

Definition at line 219 of file IfxScuEru.c.

◆ IfxScuEru_enableTriggerPulse()

IFX_EXTERN void IfxScuEru_enableTriggerPulse ( IfxScuEru_InputChannel inputChannel )

Enables the generation of a trigger event for input channel x when the selected edge is detected.

Parameters
inputChannel Input channel for input selection and conditioning of trigger or gating functions
Returns
None

Definition at line 319 of file IfxScuEru.c.

◆ IfxScuEru_setFlagPatternDetection()

IFX_EXTERN void IfxScuEru_setFlagPatternDetection | ( | IfxScuEru_OutputChannel | outputChannel,
 |  | IfxScuEru_InputChannel | inputChannel,
 |  | boolean | state
 | ) |  |

Enables the flag INTFx to take part in the pattern detection for output gating.

Parameters
outputChannel | Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
inputChannel | Input channel for input selection and conditioning of trigger or gating functions
state FALSE: the bit INTFx does not take part in the pattern detection IPENjy = 0
TRUE : the bit INTFx is taken into consideration for the pattern detection IPENjy = 1
Returns
None

Definition at line 432 of file IfxScuEru.c.


iLLD_TC38A: ERU: Output Gating Unit

Functions
ERU: Output Gating Unit
iLLD » SCU » Standard Driver » Eru Basic Functionality
Collaboration diagram for ERU: Output Gating Unit:

Functions

IFX_EXTERN void | IfxScuEru_clearOutputChannelConfiguration (IfxScuEru_OutputChannel outputChannel)
Clears all the configuration for the given input channel y. More...
IFX_EXTERN void | IfxScuEru_disablePatternDetectionTrigger (IfxScuEru_OutputChannel outputChannel)
Disables the generation of a trigger event for output channel y when the result of the pattern detection changes. More...
IFX_EXTERN void | IfxScuEru_enablePatternDetectionTrigger (IfxScuEru_OutputChannel outputChannel)
Enables the generation of a trigger event for output channel y when the result of the pattern detection changes. More...
IFX_EXTERN uint32 | IfxScuEru_getOutputChannelConfiguration (IfxScuEru_OutputChannel outputChannel)
Clears all the configuration for the given input channel y. More...
IFX_EXTERN boolean | IfxScuEru_getPatternDetectionResult (IfxScuEru_OutputChannel outputChannel)
Returns the status of the pattern detection result of output channel y (PDRy) More...
IFX_EXTERN uint32 | IfxScuEru_getWholePatternDetectionResult (void)
Returns the whole pattern detection result of all the selcted output channels. More...
IFX_EXTERN void | IfxScuEru_setInterruptGatingPattern (IfxScuEru_OutputChannel outputChannel, IfxScuEru_InterruptGatingPattern gatingPattern)
Sets the gating pattern of a ouput channel y to determine how the pattern detection influences the output lines GOUT and IOUT. More...

Detailed Description

Function Documentation

◆ IfxScuEru_clearOutputChannelConfiguration()

IFX_EXTERN void IfxScuEru_clearOutputChannelConfiguration ( IfxScuEru_OutputChannel outputChannel )

Clears all the configuration for the given input channel y.

Parameters
outputChannel Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
Returns
None

Definition at line 97 of file IfxScuEru.c.

◆ IfxScuEru_disablePatternDetectionTrigger()

IFX_EXTERN void IfxScuEru_disablePatternDetectionTrigger ( IfxScuEru_OutputChannel outputChannel )

Disables the generation of a trigger event for output channel y when the result of the pattern detection changes.

Parameters
outputChannel Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
Returns
None

Definition at line 179 of file IfxScuEru.c.

◆ IfxScuEru_enablePatternDetectionTrigger()

IFX_EXTERN void IfxScuEru_enablePatternDetectionTrigger ( IfxScuEru_OutputChannel outputChannel )

Enables the generation of a trigger event for output channel y when the result of the pattern detection changes.

Parameters
outputChannel Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
Returns
None

Definition at line 279 of file IfxScuEru.c.

◆ IfxScuEru_getOutputChannelConfiguration()

IFX_EXTERN uint32 IfxScuEru_getOutputChannelConfiguration ( IfxScuEru_OutputChannel outputChannel )

Clears all the configuration for the given input channel y.

Parameters
outputChannel Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
Returns
Output channel configuration

Definition at line 372 of file IfxScuEru.c.

◆ IfxScuEru_getPatternDetectionResult()

IFX_EXTERN boolean IfxScuEru_getPatternDetectionResult ( IfxScuEru_OutputChannel outputChannel )

Returns the status of the pattern detection result of output channel y (PDRy)

Parameters
outputChannel Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
Returns
Status (TRUE / FALSE)

Definition at line 392 of file IfxScuEru.c.

◆ IfxScuEru_getWholePatternDetectionResult()

IFX_EXTERN uint32 IfxScuEru_getWholePatternDetectionResult ( void )

Returns the whole pattern detection result of all the selcted output channels.

Returns
Detected pattern

Definition at line 399 of file IfxScuEru.c.

◆ IfxScuEru_setInterruptGatingPattern()

IFX_EXTERN void IfxScuEru_setInterruptGatingPattern | ( | IfxScuEru_OutputChannel | outputChannel,
 |  | IfxScuEru_InterruptGatingPattern | gatingPattern
 | ) |  |

Sets the gating pattern of a ouput channel y to determine how the pattern detection influences the output lines GOUT and IOUT.

Parameters
outputChannel | Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
gatingPattern | Interrupt gating pattern to determine how the pattern detection influences the ouput lines GOUT and IOUT
Returns
None

Definition at line 459 of file IfxScuEru.c.


iLLD_TC38A: ERU: Data Structures

ERU: Data Structures
iLLD » SCU » Standard Driver » Eru Basic Functionality
Collaboration diagram for ERU: Data Structures:


iLLD_TC38A: ERU: Input Filtering

Functions
ERU: Input Filtering
iLLD » SCU » Standard Driver » Eru Basic Functionality
Collaboration diagram for ERU: Input Filtering:

Functions

IFX_INLINE void | IfxScuEru_disableInputFilter (IfxScuEru_InputFilterRequestSelection requestSelection)
Enables the input filter for the selected digital pin (REQxy) More...
IFX_INLINE void | IfxScuEru_enableInputFilter (IfxScuEru_InputFilterRequestSelection requestSelection)
Enables the input filter for the selected digital pin (REQxy) More...
IFX_INLINE void | IfxScuEru_setInputFilterDepth (IfxScuEru_InputFilterDepth depth)
Sets the digital glitch filter depth. More...
IFX_INLINE void | IfxScuEru_setInputFilterPredivider (IfxScuEru_InputFilterPredivider predivider)
Sets the digital glitch filter predivider. More...

Detailed Description

Function Documentation

◆ IfxScuEru_disableInputFilter()

IFX_INLINE void IfxScuEru_disableInputFilter ( IfxScuEru_InputFilterRequestSelection requestSelection )

Enables the input filter for the selected digital pin (REQxy)

Parameters
requestSelection Digital port pin selection for input filter
Returns
None

Definition at line 456 of file IfxScuEru.h.

◆ IfxScuEru_enableInputFilter()

IFX_INLINE void IfxScuEru_enableInputFilter ( IfxScuEru_InputFilterRequestSelection requestSelection )

Enables the input filter for the selected digital pin (REQxy)

Parameters
requestSelection Digital port pin selection for input filter
Returns
None

Definition at line 467 of file IfxScuEru.h.

◆ IfxScuEru_setInputFilterDepth()

IFX_INLINE void IfxScuEru_setInputFilterDepth ( IfxScuEru_InputFilterDepth depth )

Sets the digital glitch filter depth.

Parameters
depth Digital Glitch Filter depth
Returns
None

Definition at line 485 of file IfxScuEru.h.

◆ IfxScuEru_setInputFilterPredivider()

IFX_INLINE void IfxScuEru_setInputFilterPredivider ( IfxScuEru_InputFilterPredivider predivider )

Sets the digital glitch filter predivider.

Parameters
predivider Digital Glitch Filter Predivider
Returns
None

Definition at line 495 of file IfxScuEru.h.


iLLD_TC38A: Lbist Basic Functionality

Lbist Basic Functionality
iLLD » SCU » Standard Driver
Collaboration diagram for Lbist Basic Functionality:


iLLD_TC38A: Rcu Basic Functionality

Rcu Basic Functionality
iLLD » SCU » Standard Driver
Collaboration diagram for Rcu Basic Functionality:


iLLD_TC38A: Wdt Basic Functionality

Modules
Wdt Basic Functionality
iLLD » SCU » Standard Driver
Collaboration diagram for Wdt Basic Functionality:

Modules

Wdt Operative Functionality
Watchdog Configuration functions
Watchdog Endinit functions
Watchdog Operative functions
How to use Endinit APIs?

Detailed Description


iLLD_TC38A: Wdt Operative Functionality

Macros | Functions
Wdt Operative Functionality
iLLD » SCU » Standard Driver » Wdt Basic Functionality
Collaboration diagram for Wdt Operative Functionality:

Macros

#define IFXSCUWDT_CALCULATELFSR(pwd) ((((((pwd) >> 13) ^ ((pwd) >> 12) ^ ((pwd) >> 11) ^ ((pwd) >> 1 )) & 1)) | (((pwd)<<1) & 0x3FFF))

Functions

IFX_INLINE uint16 IfxScuWdt_calculateLfsr (uint16 password)
SCUWDT Inline API utility to Calculte new 14-bit LFSR. More...

Detailed Description

Macro Definition Documentation

◆ IFXSCUWDT_CALCULATELFSR

#define IFXSCUWDT_CALCULATELFSR ( pwd ) ((((((pwd) >> 13) ^ ((pwd) >> 12) ^ ((pwd) >> 11) ^ ((pwd) >> 1 )) & 1)) | (((pwd)<<1) & 0x3FFF))

Definition at line 52 of file IfxScuWdt.asm.h.

Function Documentation

◆ IfxScuWdt_calculateLfsr()

IFX_INLINE uint16 IfxScuWdt_calculateLfsr ( uint16 password )

SCUWDT Inline API utility to Calculte new 14-bit LFSR.

This API will Calculte new 14-bit LFSR (Linear Feedback Shift Register) with characteristic polynomial x14+x13+x12+x2+1.

Parameters
password Password for which LFSR value to be calculated.
Returns
New LFSR.


iLLD_TC38A: Watchdog Configuration functions

Functions
Watchdog Configuration functions
iLLD » SCU » Standard Driver » Wdt Basic Functionality
Collaboration diagram for Watchdog Configuration functions:

Functions

IFX_EXTERN void | IfxScuWdt_initConfig (IfxScuWdt_Config *config)
SCUWDT API to initialize WDT configuration structure - Constructor This API initialize the ScuWdt configuration structure to default values, these default values are for software specific, not necessarily hardware reset values. User must use this API call before IfxScuWdt_Init API call. More...
IFX_EXTERN void | IfxScuWdt_initCpuWatchdog (Ifx_SCU_WDTCPU *wdt, const IfxScuWdt_Config *config)
SCUWDT API to initialize an instance of WDT Driver which corresponds to CPU WDT Hardware module. More...
IFX_EXTERN void | IfxScuWdt_initSafetyWatchdog (Ifx_SCU_WDTS *wdt, const IfxScuWdt_Config *config)
SCUWDT API to initialize an instance of WDT Driver which corresponds to Safety WDT Hardware module. More...

Detailed Description

Function Documentation

◆ IfxScuWdt_initConfig()

IFX_EXTERN void IfxScuWdt_initConfig ( IfxScuWdt_Config * config )

SCUWDT API to initialize WDT configuration structure - Constructor This API initialize the ScuWdt configuration structure to default values, these default values are for software specific, not necessarily hardware reset values. User must use this API call before IfxScuWdt_Init API call.

Parameters
config ScuWdt configuration structure to be initialized
Returns
None

Definition at line 399 of file IfxScuWdt.c.

◆ IfxScuWdt_initCpuWatchdog()

IFX_EXTERN void IfxScuWdt_initCpuWatchdog | ( | Ifx_SCU_WDTCPU * | wdt,
 |  | const IfxScuWdt_Config * | config
 | ) |  |

SCUWDT API to initialize an instance of WDT Driver which corresponds to CPU WDT Hardware module.

This API initialize the ScuWdt software driver and corresponding CPU WDT hardware module. User can configure project specific Watchdog password, Watchdog timer period and other settings with this interface. API corresponds to one instance of the hardware module. User must use this API call for each instance of the WDT hardware module used.

Parameters
wdt | reference to register map of CPU WDT hardware instance
config | ScuWdt configuration structure
Returns
None

Definition at line 414 of file IfxScuWdt.c.

◆ IfxScuWdt_initSafetyWatchdog()

IFX_EXTERN void IfxScuWdt_initSafetyWatchdog | ( | Ifx_SCU_WDTS * | wdt,
 |  | const IfxScuWdt_Config * | config
 | ) |  |

SCUWDT API to initialize an instance of WDT Driver which corresponds to Safety WDT Hardware module.

This API initialize the ScuWdt software driver and corresponding safety WDT hardware module. User can configure project specific Watchdog password, Watchdog timer period and other settings with this interface. API corresponds to one instance of the hardware module. User must use this API call for each instance of the WDT hardware module used.

Parameters
wdt | reference to register map of Safety WDT hardware instance
config | ScuWdt configuration structure
Returns
None

Definition at line 507 of file IfxScuWdt.c.


iLLD_TC38A: Watchdog Endinit functions

Functions
Watchdog Endinit functions
iLLD » SCU » Standard Driver » Wdt Basic Functionality
Collaboration diagram for Watchdog Endinit functions:

Functions

IFX_INLINE void | IfxScuWdt_clearCpuEndinitInline (Ifx_SCU_WDTCPU *watchdog, uint16 password)
SCUWDT Inline API to Clear ENDINIT bit provided by CPU WDT Hardware module. More...
IFX_INLINE void | IfxScuWdt_clearGlobalSafetyEndinitInline (uint16 password)
Clear the Global safety Endinit password (Inline) More...
IFX_INLINE void | IfxScuWdt_clearSafetyEndinitInline (uint16 password)
SCUWDT Inline API to Clear ENDINIT bit provided by Safety WDT Hardware module. More...
IFX_INLINE uint16 | IfxScuWdt_getGlobalSafetyEndinitPasswordInline (void)
API to fetch current password of global safety endinit Watchdog module. More...
IFX_INLINE void | IfxScuWdt_setCpuEndinitInline (Ifx_SCU_WDTCPU *watchdog, uint16 password)
SCUWDT Inline API to Set ENDINIT bit provided by CPU WDT Hardware module. More...
IFX_INLINE void | IfxScuWdt_setGlobalSafetyEndinitInline (uint16 password)
Set the Global safety Endinit password (Inline) More...
IFX_INLINE void | IfxScuWdt_setSafetyEndinitInline (uint16 password)
SCUWDT Inline API to Set ENDINIT bit provided by Safety WDT Hardware module. More...
IFX_EXTERN void | IfxScuWdt_clearCpuEndinit (uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module. More...
IFX_EXTERN void | IfxScuWdt_clearGlobalEndinit (uint16 password)
API to Clear global ENDINIT bit provided by CPU WDT Hardware module. More...
IFX_EXTERN void | IfxScuWdt_clearGlobalSafetyEndinit (uint16 password)
API to Clear global safety ENDINIT bit provided by safety WDT Hardware module. More...
IFX_EXTERN void | IfxScuWdt_clearSafetyEndinit (uint16 password)
SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module. More...
IFX_EXTERN void | IfxScuWdt_setCpuEndinit (uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module. More...
IFX_EXTERN void | IfxScuWdt_setGlobalEndinit (uint16 password)
API to set global ENDINIT bit provided by CPU WDT Hardware module. More...
IFX_EXTERN void | IfxScuWdt_setGlobalSafetyEndinit (uint16 password)
API to set global safety ENDINIT bit provided by safety WDT Hardware module. More...
IFX_EXTERN void | IfxScuWdt_setSafetyEndinit (uint16 password)
SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module. More...

Detailed Description

Function Documentation

◆ IfxScuWdt_clearCpuEndinit()

IFX_EXTERN void IfxScuWdt_clearCpuEndinit ( uint16 password )

SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.

This API will disable ENDINIT functionality provided by CPU WDT Hardware module. User need to use this API call before modifying any ENDINIT protected register. User must always set the ENDINIT bit using other API IfxScuWdt_setCpuEndinit. The sequence clear and set ENDINIT shall not be interrupted by another interrupt/call. User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword)

Parameters
password Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 249 of file IfxScuWdt.c.

Referenced by IfxAsclin_Asc_disableModule(), IfxAsclin_disableModule(), IfxAsclin_enableModule(), IfxAsclin_Lin_disableModule(), IfxAsclin_resetModule(), IfxAsclin_setSleepMode(), IfxAsclin_Spi_disableModule(), IfxCan_disableModule(), IfxCan_enableModule(), IfxCan_resetModule(), IfxCan_setSleepMode(), IfxCcu6_disableModule(), IfxCcu6_enableModule(), IfxCcu6_resetModule(), IfxCcu6_setSleepMode(), IfxConvctrl_enableConfigurationAccess(), IfxConvctrl_enableModule(), IfxConvctrl_lockConfigurationAccess(), IfxConvctrl_resetModule(), IfxCpu_invalidateProgramCache(), IfxDma_setSleepMode(), IfxEdsadc_disableModule(), IfxEdsadc_Edsadc_initModule(), IfxEdsadc_enableModule(), IfxEdsadc_resetModule(), IfxEdsadc_setSleepMode(), IfxEray_disableModule(), IfxEray_enableModule(), IfxEray_Eray_initModule(), IfxEray_resetModule(), IfxEray_setSleepMode(), IfxEvadc_disableModule(), IfxEvadc_enableModule(), IfxEvadc_resetModule(), IfxEvadc_setSleepMode(), IfxFce_Crc_initCrc(), IfxFce_disableModule(), IfxFce_enableModule(), IfxFce_resetModule(), IfxGeth_disableModule(), IfxGeth_enableModule(), IfxGeth_resetModule(), IfxGpt12_disableModule(), IfxGpt12_enableModule(), IfxGpt12_resetModule(), IfxGpt12_setSleepMode(), IfxGtm_Cmu_setClkFrequency(), IfxGtm_Cmu_setEclkFrequency(), IfxGtm_Cmu_setGclkFrequency(), IfxGtm_disable(), IfxGtm_enable(), IfxHssl_disableHsctModule(), IfxHssl_disableHsslModule(), IfxHssl_enableHsctModule(), IfxHssl_enableHsslModule(), IfxHssl_Hssl_initHsctModule(), IfxHssl_resetHsctKernel(), IfxHssl_resetHsslKernel(), IfxHssl_setHsctSleepMode(), IfxHssl_setHsslSleepMode(), IfxI2c_disableModule(), IfxI2c_enableModule(), IfxI2c_resetModule(), IfxI2c_setBaudrate(), IfxIom_disableModule(), IfxIom_enableModule(), IfxIom_Iom_initModule(), IfxIom_resetModule(), IfxIom_setSleepMode(), IfxMsc_clearReset(), IfxMsc_disableModule(), IfxMsc_Msc_initModule(), IfxMsc_resetModule(), IfxMsc_setFractionalDividerStep(), IfxMsc_setSleepMode(), IfxMtu_enableModule(), IfxMtu_runMbist(), IfxPmsPm_setCoreMode(), IfxPmsPm_setSleepMode(), IfxPmsPm_setStandbyMode(), IfxPort_resetESR(), IfxPort_setESR(), IfxPort_setGroupPadDriver(), IfxPort_setPinFunctionMode(), IfxPort_setPinMode(), IfxPort_setPinModeLVDS(), IfxPort_setPinPadDriver(), IfxPsi5_disableModule(), IfxPsi5_enableAllChannels(), IfxPsi5_enableInterrupt(), IfxPsi5_enableModule(), IfxPsi5_Psi5_initChannel(), IfxPsi5_Psi5_initModule(), IfxPsi5_resetModule(), IfxPsi5_setFractionalDivider(), IfxPsi5_setInterruptNodePointer(), IfxPsi5_setReceiverControl(), IfxPsi5_setRxInput(), IfxPsi5_setSleepMode(), IfxPsi5s_disableModule(), IfxPsi5s_Psi5s_initChannel(), IfxPsi5s_Psi5s_initModule(), IfxPsi5s_resetModule(), IfxPsi5s_setSleepMode(), IfxQspi_resetModule(), IfxQspi_SpiMaster_initModule(), IfxQspi_SpiSlave_initModule(), IfxScuCcu_setSpbFrequency(), IfxSent_disableModule(), IfxSent_enableModule(), IfxSent_resetModule(), IfxSent_Sent_deInitModule(), IfxSent_Sent_initModule(), IfxSent_setSleepMode(), IfxStm_disableModule(), IfxStm_resetModule(), and IfxStm_setSleepMode().

◆ IfxScuWdt_clearCpuEndinitInline()

IFX_INLINE void IfxScuWdt_clearCpuEndinitInline | ( | Ifx_SCU_WDTCPU * | watchdog,
 |  | uint16 | password
 | ) |  |

SCUWDT Inline API to Clear ENDINIT bit provided by CPU WDT Hardware module.

This Inline API will disable ENDINIT functionality provided by CPU WDT Hardware module. This API is only meant to be used with startup routines where function call is not possible. User need to use this API call before modifying any ENDINIT protected register. User must always set the ENDINIT bit using other API IfxScuWdt_setCpuEndinit. The sequence clear and set ENDINIT shall not be interrupted by another interrupt/call. User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword).

Parameters
watchdog | pointer to the watchdog register map of CPU WDT hardware instance
password | Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 548 of file IfxScuWdt.h.

Referenced by IfxCpu_enableSegmentSpecificDataAccessCacheability(), IfxCpu_enableSegmentSpecificInstructionAccessCacheability(), IfxCpu_setDataCache(), IfxCpu_setProgramCache(), IfxPmsPm_continueSleepSequenceInRAM(), IfxPmsPm_continueStandbySequenceInRAM(), IfxScuLbist_multiTriggersInline(), IfxScuRcu_clearColdResetStatus(), IfxScuRcu_performReset(), IfxScuWdt_clearCpuEndinit(), IfxScuWdt_disableCpuWatchdog(), and IfxScuWdt_enableCpuWatchdog().

◆ IfxScuWdt_clearGlobalEndinit()

IFX_EXTERN void IfxScuWdt_clearGlobalEndinit ( uint16 password )

API to Clear global ENDINIT bit provided by CPU WDT Hardware module.

This API will disable ENDINIT functionality provided by CPU WDT Hardware module. This API is only meant to be used with startup routines where function call is not possible. User need to use this API call before modifying any ENDINIT protected register. User must always set the ENDINIT bit using other API IfxScuWdt_setGlobalEndinit. The sequence clear and set ENDINIT shall not be interrupted by another interrupt/call. User need to have the password stored locally in the caller function, (use IfxScuWdt_getGlobalEndinitPassword).

Parameters
password Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 255 of file IfxScuWdt.c.

Referenced by IfxCpu_disableInterruptsAllExceptMaster(), and IfxCpu_triggerCpuReset().

◆ IfxScuWdt_clearGlobalSafetyEndinit()

IFX_EXTERN void IfxScuWdt_clearGlobalSafetyEndinit ( uint16 password )

API to Clear global safety ENDINIT bit provided by safety WDT Hardware module.

This API will disable ENDINIT functionality provided by Safety WDT Hardware module. This API is only meant to be used with startup routines where function call is not possible. User need to use this API call before modifying any ENDINIT protected register. User must always set the ENDINIT bit using other API IfxScuWdt_setGlobalSafetyEndinit. The sequence clear and set ENDINIT shall not be interrupted by another interrupt/call. User need to have the password stored locally in the caller function, (use IfxScuWdt_getGlobalSafetyEndinitPassword).

Parameters
password Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 280 of file IfxScuWdt.c.

◆ IfxScuWdt_clearGlobalSafetyEndinitInline()

IFX_INLINE void IfxScuWdt_clearGlobalSafetyEndinitInline ( uint16 password )

Clear the Global safety Endinit password (Inline)

Parameters
password Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 571 of file IfxScuWdt.h.

Referenced by IfxPmsEvr_runInitSequence(), and IfxScuLbist_triggerInline().

◆ IfxScuWdt_clearSafetyEndinit()

IFX_EXTERN void IfxScuWdt_clearSafetyEndinit ( uint16 password )

SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module.

This API will disable ENDINIT functionality provided by Safety WDT Hardware module. User need to use this API call before modifying any ENDINIT protected register. User must always set the ENDINIT bit using other API IfxScuWdt_setCpuEndinit. The sequence clear and set ENDINIT shall not be interrupted by another interrupt/call. User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).

Parameters
password Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 305 of file IfxScuWdt.c.

Referenced by IfxCpu_disableOverlayBlock(), IfxCpu_enableOverlayBlock(), IfxEray_Eray_initModule(), IfxEvadc_disableAccess(), IfxEvadc_enableAccess(), IfxMtu_clearSram(), IfxMtu_disableMbistShell(), IfxMtu_runCheckerBoardTest(), IfxMtu_runMarchUTest(), IfxMtu_runNonDestructiveInversionTest(), IfxMtu_writeSramAddress(), IfxPmsEvr_configureBlankingFilterDelay(), IfxPmsEvr_disableInterrupt(), IfxPmsEvr_enableDcdcSynchronisation(), IfxPmsEvr_enableInterrupts(), IfxPmsEvr_enableWakeupOnVextSupplyRampUp(), IfxPmsEvr_evr33ResetTriggerSignalConfig(), IfxPmsEvr_evrcResetTriggerSignalConfig(), IfxPmsEvr_filterSecondaryConversionResult(), IfxPmsEvr_fineTrimEvrClock(), IfxPmsEvr_setEvr33PrimaryAdcTrimValue(), IfxPmsEvr_setEvr33VoltageOutputlevel(), IfxPmsEvr_setFrequencySpreadThreshold(), IfxPmsEvr_setNmosLevel(), IfxPmsEvr_setOverVoltageMonitoringMode(), IfxPmsEvr_setPmosLevel(), IfxPmsEvr_setRegulatorSwitchingFrequency(), IfxPmsEvr_setResetTrimValueMv(), IfxPmsEvr_setSdRegulatorOutputLevel(), IfxPmsEvr_setSdRegulatorPrimaryAdcTrimValue(), IfxPmsEvr_setSecondaryOverVoltageThresholdMv(), IfxPmsEvr_setSecondaryUnderVoltageThresholdMv(), IfxPmsEvr_setStandbyRamSupply(), IfxPmsEvr_setSwitchingFreqDivFactorForExternalsync(), IfxPmsEvr_setUnderVoltageMonitoringMode(), IfxPmsEvr_signedFineTrimEvrClock(), IfxPmsEvr_swdResetTriggerSignalConfig(), IfxPmsPm_clearLoadJumpTimer(), IfxPmsPm_clearLoadJumpTimerOverflowFlag(), IfxPmsPm_clearVoltageDroopTimer(), IfxPmsPm_clearVoltageDroopTimerOverflowFlag(), IfxPmsPm_configureSupplyMonitoring(), IfxPmsPm_disableLoadJumpTimer(), IfxPmsPm_disableLoadJumpTimerOverflowFlag(), IfxPmsPm_disableLoadJumpTimerOverflowInterrupt(), IfxPmsPm_disableVoltageDroopTimer(), IfxPmsPm_disableVoltageDroopTimerOverflowFlag(), IfxPmsPm_disableVoltageDroopTimerOverflowInterrupt(), IfxPmsPm_enableLoadJumpTimer(), IfxPmsPm_enableLoadJumpTimerOverflowFlag(), IfxPmsPm_enableLoadJumpTimerOverflowInterrupt(), IfxPmsPm_enableVoltageDroopTimer(), IfxPmsPm_enableVoltageDroopTimerOverflowFlag(), IfxPmsPm_enableVoltageDroopTimerOverflowInterrupt(), IfxPmsPm_initAndRequestLoadJump(), IfxPmsPm_initAndRequestVoltageDroop(), IfxPmsPm_requestLoadJump(), IfxPmsPm_requestVoltageDroop(), IfxPmsPm_setCoreMode(), IfxPmsPm_setLoadJumpTimerCompareValue(), IfxPmsPm_setStandbyMode(), IfxPmsPm_setVoltageDroopStep(), IfxPmsPm_setVoltageDroopTimerCompareValue(), IfxPmsPm_startLoadJumpTimer(), IfxPmsPm_startVoltageDroopTimer(), IfxPmsPm_stopLoadJumpTimer(), IfxPmsPm_stopVoltageDroopTimer(), IfxPort_modifyPinControllerSelection(), IfxPort_resetPinControllerSelection(), IfxPort_setPinControllerSelection(), IfxPsi5_Psi5_resetModule(), IfxPsi5s_Psi5s_resetModule(), IfxScuCcu_modulation_init(), IfxScuCcu_setAsclinFFrequency(), IfxScuCcu_setAsclinSFrequency(), IfxScuCcu_setBbbFrequency(), IfxScuCcu_setCpuFrequency(), IfxScuCcu_setFsi2Frequency(), IfxScuCcu_setFsiFrequency(), IfxScuCcu_setGethFrequency(), IfxScuCcu_setGtmFrequency(), IfxScuCcu_setI2cFrequency(), IfxScuCcu_setMcanFrequency(), IfxScuCcu_setMcanhFrequency(), IfxScuCcu_setMscFrequency(), IfxScuCcu_setQspiFrequency(), IfxScuCcu_setSpbFrequency(), IfxScuCcu_setSriFrequency(), IfxScuCcu_setStmFrequency(), IfxScuCcu_switchToBackupClock(), IfxScuCcu_switchToLowPowerMode(), IfxScuCcu_switchToNormalMode(), IfxSmu_clearAlarmExecutedStatus(), IfxSmu_clearAlarmStatus(), IfxSmu_clearRegisterMonitorErrorFlag(), IfxSmu_clearRegisterMonitorStatus(), IfxSmu_clearRegMonTestModeEnable(), IfxSmu_configAlarmActionPES(), IfxSmu_ConfigureInterruptGeneration(), IfxSmu_enableFaultToRunState(), IfxSmu_enablePortEmergencyStop(), IfxSmu_lockConfigRegisters(), IfxSmu_setAlarmAction(), IfxSmu_setAlarmStatus(), IfxSmu_setFspMode(), IfxSmu_setPortControlHwEnableAndDir(), IfxSmu_setRegMonTestModeEnable(), IfxSmu_Smu_initModule(), IfxSmu_temporaryLockConfigRegisters(), IfxSmu_unlockConfigRegisters(), IfxSmuStdby_clearSmuStdbyMonBistFlags(), IfxSmuStdby_enableAlarmStatusClear(), IfxSmuStdby_enableSmuStdby(), IfxSmuStdby_enableSmuStdbyMonBist(), IfxSmuStdby_setFaultSignalAGConfigEventFlags(), IfxSmuStdby_setFaultSignalAlarmConfigEventFlag(), IfxSmuStdby_setFsp0ErrorPinActive(), IfxSmuStdby_setFsp1ErrorPinActive(), IfxSmuStdby_setSmuStdbyAlarmStatusFlag(), and IfxSmuStdby_startSmuStdbyMonBist().

◆ IfxScuWdt_clearSafetyEndinitInline()

IFX_INLINE void IfxScuWdt_clearSafetyEndinitInline ( uint16 password )

SCUWDT Inline API to Clear ENDINIT bit provided by Safety WDT Hardware module.

This API will disable ENDINIT functionality provided by Safety WDT Hardware module. This API is only meant to be used with startup routines where function call is not possible. User need to use this API call before modifying any ENDINIT protected register. User must always set the ENDINIT bit using other API IfxScuWdt_setCpuEndinit. The sequence clear and set ENDINIT shall not be interrupted by another interrupt/call. User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).

Parameters
password Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 581 of file IfxScuWdt.h.

Referenced by IfxCpu_setAllIdleExceptMasterCpu(), IfxDma_setChannelHardwareResourcePartition(), IfxPmsPm_configureWakeup(), IfxPmsPm_continueStandbySequenceInRAM(), IfxPmsPm_setMasterCpu(), IfxPmsPm_startSleepSequenceinFlash(), IfxPmsPm_startStandbySequenceInFlash(), IfxScuCcu_configureCcuInitialStep(), IfxScuCcu_distributeClockInline(), IfxScuCcu_switchToBackupClock(), IfxScuCcu_throttleSysPllClockInline(), IfxScuEru_clearInputChannelConfiguration(), IfxScuEru_clearOutputChannelConfiguration(), IfxScuEru_connectTrigger(), IfxScuEru_disableAutoClear(), IfxScuEru_disableFallingEdgeDetection(), IfxScuEru_disableInputFilter(), IfxScuEru_disablePatternDetectionTrigger(), IfxScuEru_disableRisingEdgeDetection(), IfxScuEru_disableTriggerPulse(), IfxScuEru_enableAutoClear(), IfxScuEru_enableFallingEdgeDetection(), IfxScuEru_enableInputFilter(), IfxScuEru_enablePatternDetectionTrigger(), IfxScuEru_enableRisingEdgeDetection(), IfxScuEru_enableTriggerPulse(), IfxScuEru_selectExternalInput(), IfxScuEru_setFlagPatternDetection(), IfxScuEru_setInputFilterDepth(), IfxScuEru_setInputFilterPredivider(), IfxScuEru_setInterruptGatingPattern(), IfxScuLbist_retriggerInline(), IfxScuRcu_configureResetRequestTrigger(), IfxScuRcu_performReset(), IfxScuWdt_clearSafetyEndinit(), IfxScuWdt_disableSafetyWatchdog(), and IfxScuWdt_enableSafetyWatchdog().

◆ IfxScuWdt_getGlobalSafetyEndinitPasswordInline()

IFX_INLINE uint16 IfxScuWdt_getGlobalSafetyEndinitPasswordInline ( void )

API to fetch current password of global safety endinit Watchdog module.

This API will fetch current global endinit password for Safety WDT Hardware module. password is needed to be passed with most of the WDT APIs. Normally this API can be used to store the password locally in the caller function or store the password globally in a global variable at the application memory. This API is only meant to be used with startup routines where function call is not possible.

Returns
password Existing (Application specific) password for the Watchdog module.

Definition at line 624 of file IfxScuWdt.h.

Referenced by IfxPmsEvr_runInitSequence(), and IfxScuLbist_triggerInline().

◆ IfxScuWdt_setCpuEndinit()

IFX_EXTERN void IfxScuWdt_setCpuEndinit ( uint16 password )

SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.

This API will enable ENDINIT functionality provided by CPU WDT Hardware module. User need to use this API call after modifying any ENDINIT protected register. User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword)

Parameters
password Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 613 of file IfxScuWdt.c.

Referenced by IfxAsclin_Asc_disableModule(), IfxAsclin_disableModule(), IfxAsclin_enableModule(), IfxAsclin_Lin_disableModule(), IfxAsclin_resetModule(), IfxAsclin_setSleepMode(), IfxAsclin_Spi_disableModule(), IfxCan_disableModule(), IfxCan_enableModule(), IfxCan_resetModule(), IfxCan_setSleepMode(), IfxCcu6_disableModule(), IfxCcu6_enableModule(), IfxCcu6_resetModule(), IfxCcu6_setSleepMode(), IfxConvctrl_enableConfigurationAccess(), IfxConvctrl_enableModule(), IfxConvctrl_lockConfigurationAccess(), IfxConvctrl_resetModule(), IfxCpu_invalidateProgramCache(), IfxDma_setSleepMode(), IfxEdsadc_disableModule(), IfxEdsadc_Edsadc_initModule(), IfxEdsadc_enableModule(), IfxEdsadc_resetModule(), IfxEdsadc_setSleepMode(), IfxEray_disableModule(), IfxEray_enableModule(), IfxEray_Eray_initModule(), IfxEray_resetModule(), IfxEray_setSleepMode(), IfxEvadc_disableModule(), IfxEvadc_enableModule(), IfxEvadc_resetModule(), IfxEvadc_setSleepMode(), IfxFce_Crc_initCrc(), IfxFce_disableModule(), IfxFce_enableModule(), IfxFce_resetModule(), IfxGeth_disableModule(), IfxGeth_enableModule(), IfxGeth_resetModule(), IfxGpt12_disableModule(), IfxGpt12_enableModule(), IfxGpt12_resetModule(), IfxGpt12_setSleepMode(), IfxGtm_Cmu_setClkFrequency(), IfxGtm_Cmu_setEclkFrequency(), IfxGtm_Cmu_setGclkFrequency(), IfxGtm_disable(), IfxGtm_enable(), IfxHssl_disableHsctModule(), IfxHssl_disableHsslModule(), IfxHssl_enableHsctModule(), IfxHssl_enableHsslModule(), IfxHssl_Hssl_initHsctModule(), IfxHssl_resetHsctKernel(), IfxHssl_resetHsslKernel(), IfxHssl_setHsctSleepMode(), IfxHssl_setHsslSleepMode(), IfxI2c_disableModule(), IfxI2c_enableModule(), IfxI2c_resetModule(), IfxI2c_setBaudrate(), IfxIom_disableModule(), IfxIom_enableModule(), IfxIom_Iom_initModule(), IfxIom_resetModule(), IfxIom_setSleepMode(), IfxMsc_clearReset(), IfxMsc_disableModule(), IfxMsc_Msc_initModule(), IfxMsc_resetModule(), IfxMsc_setFractionalDividerStep(), IfxMsc_setSleepMode(), IfxMtu_enableModule(), IfxMtu_runMbist(), IfxPmsPm_setCoreMode(), IfxPmsPm_setSleepMode(), IfxPmsPm_setStandbyMode(), IfxPort_resetESR(), IfxPort_setESR(), IfxPort_setGroupPadDriver(), IfxPort_setPinFunctionMode(), IfxPort_setPinMode(), IfxPort_setPinModeLVDS(), IfxPort_setPinPadDriver(), IfxPsi5_disableModule(), IfxPsi5_enableAllChannels(), IfxPsi5_enableInterrupt(), IfxPsi5_enableModule(), IfxPsi5_Psi5_initChannel(), IfxPsi5_Psi5_initModule(), IfxPsi5_resetModule(), IfxPsi5_setFractionalDivider(), IfxPsi5_setInterruptNodePointer(), IfxPsi5_setReceiverControl(), IfxPsi5_setRxInput(), IfxPsi5_setSleepMode(), IfxPsi5s_disableModule(), IfxPsi5s_Psi5s_initChannel(), IfxPsi5s_Psi5s_initModule(), IfxPsi5s_resetModule(), IfxPsi5s_setSleepMode(), IfxQspi_resetModule(), IfxQspi_SpiMaster_initModule(), IfxQspi_SpiSlave_initModule(), IfxScuCcu_setSpbFrequency(), IfxScuWdt_initCpuWatchdog(), IfxScuWdt_serviceCpuWatchdog(), IfxSent_disableModule(), IfxSent_enableModule(), IfxSent_resetModule(), IfxSent_Sent_deInitModule(), IfxSent_Sent_initModule(), IfxSent_setSleepMode(), IfxStm_disableModule(), IfxStm_resetModule(), and IfxStm_setSleepMode().

◆ IfxScuWdt_setCpuEndinitInline()

IFX_INLINE void IfxScuWdt_setCpuEndinitInline | ( | Ifx_SCU_WDTCPU * | watchdog,
 |  | uint16 | password
 | ) |  |

SCUWDT Inline API to Set ENDINIT bit provided by CPU WDT Hardware module.

This API will enable ENDINIT functionality provided by CPU WDT Hardware module. This API is only meant to be used with startup routines where function call is not possible. User need to use this API call after modifying any ENDINIT protected register. User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword).

Parameters
watchdog | pointer to the watchdog register map of CPU WDT hardware instance
password | Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 656 of file IfxScuWdt.h.

Referenced by IfxCpu_enableSegmentSpecificDataAccessCacheability(), IfxCpu_enableSegmentSpecificInstructionAccessCacheability(), IfxCpu_setDataCache(), IfxCpu_setProgramCache(), IfxPmsPm_continueSleepSequenceInRAM(), IfxPmsPm_continueStandbySequenceInRAM(), IfxScuLbist_multiTriggersInline(), IfxScuRcu_clearColdResetStatus(), IfxScuWdt_disableCpuWatchdog(), IfxScuWdt_enableCpuWatchdog(), and IfxScuWdt_setCpuEndinit().

◆ IfxScuWdt_setGlobalEndinit()

IFX_EXTERN void IfxScuWdt_setGlobalEndinit ( uint16 password )

API to set global ENDINIT bit provided by CPU WDT Hardware module.

This API will enable ENDINIT functionality provided by CPU WDT Hardware module. User need to use this API call after modifying any ENDINIT protected register. User need to have the password stored locally in the caller function, (use IfxScuWdt_getGlobalEndinitPassword)

Parameters
password Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 619 of file IfxScuWdt.c.

Referenced by IfxCpu_disableInterruptsAllExceptMaster(), and IfxCpu_triggerCpuReset().

◆ IfxScuWdt_setGlobalSafetyEndinit()

IFX_EXTERN void IfxScuWdt_setGlobalSafetyEndinit ( uint16 password )

API to set global safety ENDINIT bit provided by safety WDT Hardware module.

This API will enable ENDINIT functionality provided by Safety WDT Hardware module. User need to use this API call after modifying any ENDINIT protected register. User need to have the password stored locally in the caller function, (use IfxScuWdt_getGlobalSafetyEndinitPassword)

Parameters
password Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 643 of file IfxScuWdt.c.

◆ IfxScuWdt_setGlobalSafetyEndinitInline()

IFX_INLINE void IfxScuWdt_setGlobalSafetyEndinitInline ( uint16 password )

Set the Global safety Endinit password (Inline)

Parameters
password Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 679 of file IfxScuWdt.h.

Referenced by IfxPmsEvr_runInitSequence().

◆ IfxScuWdt_setSafetyEndinit()

IFX_EXTERN void IfxScuWdt_setSafetyEndinit ( uint16 password )

SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module.

This API will enable ENDINIT functionality provided by Safety WDT Hardware module. User need to use this API call after modifying any ENDINIT protected register. User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).

Parameters
password Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 668 of file IfxScuWdt.c.

Referenced by IfxCpu_disableOverlayBlock(), IfxCpu_enableOverlayBlock(), IfxEray_Eray_initModule(), IfxEvadc_disableAccess(), IfxEvadc_enableAccess(), IfxMtu_clearSram(), IfxMtu_disableMbistShell(), IfxMtu_runCheckerBoardTest(), IfxMtu_runMarchUTest(), IfxMtu_runNonDestructiveInversionTest(), IfxMtu_writeSramAddress(), IfxPmsEvr_configureBlankingFilterDelay(), IfxPmsEvr_disableInterrupt(), IfxPmsEvr_enableDcdcSynchronisation(), IfxPmsEvr_enableInterrupts(), IfxPmsEvr_enableWakeupOnVextSupplyRampUp(), IfxPmsEvr_evr33ResetTriggerSignalConfig(), IfxPmsEvr_evrcResetTriggerSignalConfig(), IfxPmsEvr_filterSecondaryConversionResult(), IfxPmsEvr_fineTrimEvrClock(), IfxPmsEvr_setEvr33PrimaryAdcTrimValue(), IfxPmsEvr_setEvr33VoltageOutputlevel(), IfxPmsEvr_setFrequencySpreadThreshold(), IfxPmsEvr_setNmosLevel(), IfxPmsEvr_setOverVoltageMonitoringMode(), IfxPmsEvr_setPmosLevel(), IfxPmsEvr_setRegulatorSwitchingFrequency(), IfxPmsEvr_setResetTrimValueMv(), IfxPmsEvr_setSdRegulatorOutputLevel(), IfxPmsEvr_setSdRegulatorPrimaryAdcTrimValue(), IfxPmsEvr_setSecondaryOverVoltageThresholdMv(), IfxPmsEvr_setSecondaryUnderVoltageThresholdMv(), IfxPmsEvr_setStandbyRamSupply(), IfxPmsEvr_setSwitchingFreqDivFactorForExternalsync(), IfxPmsEvr_setUnderVoltageMonitoringMode(), IfxPmsEvr_signedFineTrimEvrClock(), IfxPmsEvr_swdResetTriggerSignalConfig(), IfxPmsPm_clearLoadJumpTimer(), IfxPmsPm_clearLoadJumpTimerOverflowFlag(), IfxPmsPm_clearVoltageDroopTimer(), IfxPmsPm_clearVoltageDroopTimerOverflowFlag(), IfxPmsPm_configureSupplyMonitoring(), IfxPmsPm_disableLoadJumpTimer(), IfxPmsPm_disableLoadJumpTimerOverflowFlag(), IfxPmsPm_disableLoadJumpTimerOverflowInterrupt(), IfxPmsPm_disableVoltageDroopTimer(), IfxPmsPm_disableVoltageDroopTimerOverflowFlag(), IfxPmsPm_disableVoltageDroopTimerOverflowInterrupt(), IfxPmsPm_enableLoadJumpTimer(), IfxPmsPm_enableLoadJumpTimerOverflowFlag(), IfxPmsPm_enableLoadJumpTimerOverflowInterrupt(), IfxPmsPm_enableVoltageDroopTimer(), IfxPmsPm_enableVoltageDroopTimerOverflowFlag(), IfxPmsPm_enableVoltageDroopTimerOverflowInterrupt(), IfxPmsPm_initAndRequestLoadJump(), IfxPmsPm_initAndRequestVoltageDroop(), IfxPmsPm_requestLoadJump(), IfxPmsPm_requestVoltageDroop(), IfxPmsPm_setCoreMode(), IfxPmsPm_setLoadJumpTimerCompareValue(), IfxPmsPm_setStandbyMode(), IfxPmsPm_setVoltageDroopStep(), IfxPmsPm_setVoltageDroopTimerCompareValue(), IfxPmsPm_startLoadJumpTimer(), IfxPmsPm_startVoltageDroopTimer(), IfxPmsPm_stopLoadJumpTimer(), IfxPmsPm_stopVoltageDroopTimer(), IfxPort_modifyPinControllerSelection(), IfxPort_resetPinControllerSelection(), IfxPort_setPinControllerSelection(), IfxPsi5_Psi5_resetModule(), IfxPsi5s_Psi5s_resetModule(), IfxScuCcu_modulation_init(), IfxScuCcu_setAsclinFFrequency(), IfxScuCcu_setAsclinSFrequency(), IfxScuCcu_setBbbFrequency(), IfxScuCcu_setCpuFrequency(), IfxScuCcu_setFsi2Frequency(), IfxScuCcu_setFsiFrequency(), IfxScuCcu_setGethFrequency(), IfxScuCcu_setGtmFrequency(), IfxScuCcu_setI2cFrequency(), IfxScuCcu_setMcanFrequency(), IfxScuCcu_setMcanhFrequency(), IfxScuCcu_setMscFrequency(), IfxScuCcu_setQspiFrequency(), IfxScuCcu_setSpbFrequency(), IfxScuCcu_setSriFrequency(), IfxScuCcu_setStmFrequency(), IfxScuCcu_switchToBackupClock(), IfxScuCcu_switchToLowPowerMode(), IfxScuCcu_switchToNormalMode(), IfxScuRcu_configureResetRequestTrigger(), IfxScuWdt_initSafetyWatchdog(), IfxScuWdt_serviceSafetyWatchdog(), IfxSmu_clearAlarmExecutedStatus(), IfxSmu_clearAlarmStatus(), IfxSmu_clearRegisterMonitorErrorFlag(), IfxSmu_clearRegisterMonitorStatus(), IfxSmu_clearRegMonTestModeEnable(), IfxSmu_configAlarmActionPES(), IfxSmu_ConfigureInterruptGeneration(), IfxSmu_enableFaultToRunState(), IfxSmu_enablePortEmergencyStop(), IfxSmu_lockConfigRegisters(), IfxSmu_setAlarmAction(), IfxSmu_setAlarmStatus(), IfxSmu_setFspMode(), IfxSmu_setPortControlHwEnableAndDir(), IfxSmu_setRegMonTestModeEnable(), IfxSmu_Smu_initModule(), IfxSmu_temporaryLockConfigRegisters(), IfxSmu_unlockConfigRegisters(), IfxSmuStdby_clearSmuStdbyMonBistFlags(), IfxSmuStdby_enableAlarmStatusClear(), IfxSmuStdby_enableSmuStdby(), IfxSmuStdby_enableSmuStdbyMonBist(), IfxSmuStdby_setFaultSignalAGConfigEventFlags(), IfxSmuStdby_setFaultSignalAlarmConfigEventFlag(), IfxSmuStdby_setFsp0ErrorPinActive(), IfxSmuStdby_setFsp1ErrorPinActive(), IfxSmuStdby_setSmuStdbyAlarmStatusFlag(), and IfxSmuStdby_startSmuStdbyMonBist().

◆ IfxScuWdt_setSafetyEndinitInline()

IFX_INLINE void IfxScuWdt_setSafetyEndinitInline ( uint16 password )

SCUWDT Inline API to Set ENDINIT bit provided by Safety WDT Hardware module.

This API will enable ENDINIT functionality provided by Safety WDT Hardware module. This API is only meant to be used with startup routines where function call is not possible. User need to use this API call after modifying any ENDINIT protected register. User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).

Parameters
password Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 689 of file IfxScuWdt.h.

Referenced by IfxCpu_setAllIdleExceptMasterCpu(), IfxDma_setChannelHardwareResourcePartition(), IfxPmsPm_configureWakeup(), IfxPmsPm_continueStandbySequenceInRAM(), IfxPmsPm_setMasterCpu(), IfxPmsPm_startSleepSequenceinFlash(), IfxPmsPm_startStandbySequenceInFlash(), IfxScuCcu_configureCcuInitialStep(), IfxScuCcu_distributeClockInline(), IfxScuCcu_throttleSysPllClockInline(), IfxScuEru_clearInputChannelConfiguration(), IfxScuEru_clearOutputChannelConfiguration(), IfxScuEru_connectTrigger(), IfxScuEru_disableAutoClear(), IfxScuEru_disableFallingEdgeDetection(), IfxScuEru_disableInputFilter(), IfxScuEru_disablePatternDetectionTrigger(), IfxScuEru_disableRisingEdgeDetection(), IfxScuEru_disableTriggerPulse(), IfxScuEru_enableAutoClear(), IfxScuEru_enableFallingEdgeDetection(), IfxScuEru_enableInputFilter(), IfxScuEru_enablePatternDetectionTrigger(), IfxScuEru_enableRisingEdgeDetection(), IfxScuEru_enableTriggerPulse(), IfxScuEru_selectExternalInput(), IfxScuEru_setFlagPatternDetection(), IfxScuEru_setInputFilterDepth(), IfxScuEru_setInputFilterPredivider(), IfxScuEru_setInterruptGatingPattern(), IfxScuLbist_retriggerInline(), IfxScuWdt_disableSafetyWatchdog(), IfxScuWdt_enableSafetyWatchdog(), and IfxScuWdt_setSafetyEndinit().


iLLD_TC38A: Watchdog Operative functions

Functions
Watchdog Operative functions
iLLD » SCU » Standard Driver » Wdt Basic Functionality
Collaboration diagram for Watchdog Operative functions:

Functions

IFX_INLINE uint16 | IfxScuWdt_getCpuWatchdogPasswordInline (Ifx_SCU_WDTCPU *watchdog)
SCUWDT Inline API to fetch current password of CPU Watchdog module. More...
IFX_INLINE boolean | IfxScuWdt_getCpuWatchdogEndInitInline (Ifx_SCU_WDTCPU *watchdog)
SCUWDT API to fetch current endinit of CPU Watchdog module. More...
IFX_INLINE boolean | IfxScuWdt_getSafetyWatchdogEndInit (void)
SCUWDT API to fetch current endinit of Safety/System Watchdog module. More...
IFX_INLINE uint16 | IfxScuWdt_getSafetyWatchdogPasswordInline (void)
SCUWDT Inline API to fetch current password of Safety Watchdog module. More...
IFX_EXTERN void | IfxScuWdt_changeCpuWatchdogPassword (uint16 password, uint16 newPassword)
SCUWDT API to change CPU Watchdog password. More...
IFX_EXTERN void | IfxScuWdt_changeCpuWatchdogReload (uint16 password, uint16 reload)
SCUWDT API to change CPU Watchdog timer reload value. More...
IFX_EXTERN void | IfxScuWdt_changeGlobalEndinitPassword (uint16 password, uint16 newPassword)
API to change global endinit password. More...
IFX_EXTERN void | IfxScuWdt_changeGlobalSafetyEndinitPassword (uint16 password, uint16 newPassword)
API to change global safety endinit password. More...
IFX_EXTERN void | IfxScuWdt_changeSafetyWatchdogPassword (uint16 password, uint16 newPassword)
SCUWDT API to change Safety Watchdog password. More...
IFX_EXTERN void | IfxScuWdt_changeSafetyWatchdogReload (uint16 password, uint16 reload)
SCUWDT API to change Safety Watchdog timer reload value. More...
IFX_EXTERN void | IfxScuWdt_disableCpuWatchdog (uint16 password)
SCUWDT API to disable CPU Watchdog functionality. More...
IFX_EXTERN void | IfxScuWdt_disableSafetyWatchdog (uint16 password)
SCUWDT API to disable Safety Watchdog functionality. More...
IFX_EXTERN void | IfxScuWdt_enableCpuWatchdog (uint16 password)
SCUWDT API to enable CPU Watchdog functionality. More...
IFX_EXTERN void | IfxScuWdt_enableSafetyWatchdog (uint16 password)
SCUWDT API to enable Safety Watchdog functionality. More...
IFX_EXTERN uint16 | IfxScuWdt_getCpuWatchdogPassword (void)
SCUWDT API to fetch current password of CPU Watchdog module. More...
IFX_EXTERN boolean | IfxScuWdt_getCpuWatchdogEndInit (void)
SCUWDT API to fetch current endinit of CPU Watchdog module. More...
IFX_EXTERN uint16 | IfxScuWdt_getGlobalEndinitPassword (void)
API to fetch current password of global endinit Watchdog module. More...
IFX_EXTERN uint16 | IfxScuWdt_getGlobalSafetyEndinitPassword (void)
API to fetch current password of global safety endinit Watchdog module. More...
IFX_EXTERN uint16 | IfxScuWdt_getSafetyWatchdogPassword (void)
SCUWDT API to fetch current password of Safety Watchdog module. More...
IFX_EXTERN void | IfxScuWdt_serviceCpuWatchdog (uint16 password)
SCUWDT API to service CPU Watchdog functionality. More...
IFX_EXTERN void | IfxScuWdt_serviceSafetyWatchdog (uint16 password)
SCUWDT API to service Safety Watchdog functionality. More...
IFX_EXTERN uint8 | IfxScuWdt_getCpuWatchdogStatus (void)
SCUWDT API to fetch current status of CPU Watchdog module. More...

Detailed Description

Function Documentation

◆ IfxScuWdt_changeCpuWatchdogPassword()

IFX_EXTERN void IfxScuWdt_changeCpuWatchdogPassword | ( | uint16 | password,
 |  | uint16 | newPassword
 | ) |  |

SCUWDT API to change CPU Watchdog password.

This API will change password to new one for the corresponding to CPU WDT Hardware module. User need to have the old password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword).

Parameters
password | Existing (Application specific) password for the Watchdog module.
newPassword | Application specific new password to be changed for the Watchdog module.
Returns
None

Definition at line 62 of file IfxScuWdt.c.

◆ IfxScuWdt_changeCpuWatchdogReload()

IFX_EXTERN void IfxScuWdt_changeCpuWatchdogReload | ( | uint16 | password,
 |  | uint16 | reload
 | ) |  |

SCUWDT API to change CPU Watchdog timer reload value.

This API will change Watchdog timer reload value to new one for CPU WDT Hardware module. The Watchdog timers will be reloaded with this value after every serice of Watchdog. User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword).

Parameters
password | Existing (Application specific) password for the Watchdog module.
reload | Reload value for the timer.
Returns
None

Definition at line 93 of file IfxScuWdt.c.

◆ IfxScuWdt_changeGlobalEndinitPassword()

IFX_EXTERN void IfxScuWdt_changeGlobalEndinitPassword | ( | uint16 | password,
 |  | uint16 | newPassword
 | ) |  |

API to change global endinit password.

This API will change password to new one for the corresponding to CPU WDT Hardware module. User need to have the old password stored locally in the caller function, (use IfxScuWdt_getGlobalEndinitPassword).

Parameters
password | Existing (Application specific) password for the Watchdog module.
newPassword | Application specific new password to be changed for the Watchdog module.
Returns
None

Definition at line 126 of file IfxScuWdt.c.

◆ IfxScuWdt_changeGlobalSafetyEndinitPassword()

IFX_EXTERN void IfxScuWdt_changeGlobalSafetyEndinitPassword | ( | uint16 | password,
 |  | uint16 | newPassword
 | ) |  |

API to change global safety endinit password.

This API will change password to new one for the corresponding to Safety WDT Hardware module. User need to have the old password stored locally in the caller function, (use IfxScuWdt_getGlobalSafetyEndinitPassword).

Parameters
password | Existing (Application specific) password for the Watchdog module.
newPassword | Application specific new password to be changed for the Watchdog module.
Returns
None

Definition at line 156 of file IfxScuWdt.c.

◆ IfxScuWdt_changeSafetyWatchdogPassword()

IFX_EXTERN void IfxScuWdt_changeSafetyWatchdogPassword | ( | uint16 | password,
 |  | uint16 | newPassword
 | ) |  |

SCUWDT API to change Safety Watchdog password.

This API will change password to new one for the corresponding to Safety WDT Hardware module. User need to have the old password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).

Parameters
password | Existing (Application specific) password for the Watchdog module.
newPassword | Application specific new password to be changed for the Watchdog module.
Returns
None

Definition at line 186 of file IfxScuWdt.c.

◆ IfxScuWdt_changeSafetyWatchdogReload()

IFX_EXTERN void IfxScuWdt_changeSafetyWatchdogReload | ( | uint16 | password,
 |  | uint16 | reload
 | ) |  |

SCUWDT API to change Safety Watchdog timer reload value.

This API will change Watchdog timer reload value to new one for Safety WDT Hardware module. The Watchdog timers will be reloaded with this value after every serice of Watchdog. User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).

Parameters
password | Existing (Application specific) password for the Watchdog module.
reload | Reload value for the timer.
Returns
None

Definition at line 217 of file IfxScuWdt.c.

◆ IfxScuWdt_disableCpuWatchdog()

IFX_EXTERN void IfxScuWdt_disableCpuWatchdog ( uint16 password )

SCUWDT API to disable CPU Watchdog functionality.

This API will disable Watchdog functionality of CPU WDT Hardware module. The Watchdog timers will stop counting after this API call. User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword).

Parameters
password Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 311 of file IfxScuWdt.c.

◆ IfxScuWdt_disableSafetyWatchdog()

IFX_EXTERN void IfxScuWdt_disableSafetyWatchdog ( uint16 password )

SCUWDT API to disable Safety Watchdog functionality.

This API will disable Watchdog functionality of Safety WDT Hardware module. The Watchdog timers will stop counting after this API call. User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).

Parameters
password Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 323 of file IfxScuWdt.c.

◆ IfxScuWdt_enableCpuWatchdog()

IFX_EXTERN void IfxScuWdt_enableCpuWatchdog ( uint16 password )

SCUWDT API to enable CPU Watchdog functionality.

This API will enable Watchdog functionality of CPU WDT Hardware module. The Watchdog timers need to be serviced periodically after this API call. User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword).

Parameters
password Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 331 of file IfxScuWdt.c.

◆ IfxScuWdt_enableSafetyWatchdog()

IFX_EXTERN void IfxScuWdt_enableSafetyWatchdog ( uint16 password )

SCUWDT API to enable Safety Watchdog functionality.

This API will enable Watchdog functionality of Safety WDT Hardware module. The Watchdog timers need to be serviced periodically after this API call. User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).

Parameters
password Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 343 of file IfxScuWdt.c.

◆ IfxScuWdt_getCpuWatchdogEndInit()

IFX_EXTERN boolean IfxScuWdt_getCpuWatchdogEndInit ( void )

SCUWDT API to fetch current endinit of CPU Watchdog module.

Returns
Endinit status for the CPU Watchdog module.

Definition at line 357 of file IfxScuWdt.c.

Referenced by IfxMtu_enableModule().

◆ IfxScuWdt_getCpuWatchdogEndInitInline()

IFX_INLINE boolean IfxScuWdt_getCpuWatchdogEndInitInline ( Ifx_SCU_WDTCPU * watchdog )

SCUWDT API to fetch current endinit of CPU Watchdog module.

Parameters
watchdog pointer to the watchdog register map of CPU WDT hardware instance
Returns
Endinit status for the CPU Watchdog module.

Definition at line 618 of file IfxScuWdt.h.

Referenced by IfxScuWdt_getCpuWatchdogEndInit().

◆ IfxScuWdt_getCpuWatchdogPassword()

IFX_EXTERN uint16 IfxScuWdt_getCpuWatchdogPassword ( void )

SCUWDT API to fetch current password of CPU Watchdog module.

This API will fetch current Watchdog password for CPU WDT Hardware module. password is needed to be passed with most of the WDT APIs. Normally this API can be used to store the password locally in the caller function or store the password globally in a global variable at the application memory.

Returns
password Existing (Application specific) password for the Watchdog module.

Definition at line 351 of file IfxScuWdt.c.

Referenced by IfxAsclin_Asc_disableModule(), IfxAsclin_disableModule(), IfxAsclin_enableModule(), IfxAsclin_Lin_disableModule(), IfxAsclin_resetModule(), IfxAsclin_setSleepMode(), IfxAsclin_Spi_disableModule(), IfxCan_disableModule(), IfxCan_enableModule(), IfxCan_resetModule(), IfxCan_setSleepMode(), IfxCcu6_disableModule(), IfxCcu6_enableModule(), IfxCcu6_resetModule(), IfxCcu6_setSleepMode(), IfxConvctrl_enableConfigurationAccess(), IfxConvctrl_enableModule(), IfxConvctrl_lockConfigurationAccess(), IfxConvctrl_resetModule(), IfxCpu_invalidateProgramCache(), IfxDma_setSleepMode(), IfxEdsadc_disableModule(), IfxEdsadc_Edsadc_initModule(), IfxEdsadc_enableModule(), IfxEdsadc_resetModule(), IfxEdsadc_setSleepMode(), IfxEray_disableModule(), IfxEray_enableModule(), IfxEray_Eray_initModule(), IfxEray_resetModule(), IfxEray_setSleepMode(), IfxEvadc_disableModule(), IfxEvadc_enableModule(), IfxEvadc_resetModule(), IfxEvadc_setSleepMode(), IfxFce_Crc_initCrc(), IfxFce_disableModule(), IfxFce_enableModule(), IfxFce_resetModule(), IfxGeth_disableModule(), IfxGeth_enableModule(), IfxGeth_resetModule(), IfxGpt12_disableModule(), IfxGpt12_enableModule(), IfxGpt12_resetModule(), IfxGpt12_setSleepMode(), IfxGtm_Cmu_setClkFrequency(), IfxGtm_Cmu_setEclkFrequency(), IfxGtm_Cmu_setGclkFrequency(), IfxGtm_disable(), IfxGtm_enable(), IfxHssl_disableHsctModule(), IfxHssl_disableHsslModule(), IfxHssl_enableHsctModule(), IfxHssl_enableHsslModule(), IfxHssl_Hssl_initHsctModule(), IfxHssl_resetHsctKernel(), IfxHssl_resetHsslKernel(), IfxHssl_setHsctSleepMode(), IfxHssl_setHsslSleepMode(), IfxI2c_disableModule(), IfxI2c_enableModule(), IfxI2c_resetModule(), IfxI2c_setBaudrate(), IfxIom_disableModule(), IfxIom_enableModule(), IfxIom_Iom_initModule(), IfxIom_resetModule(), IfxIom_setSleepMode(), IfxMsc_clearReset(), IfxMsc_disableModule(), IfxMsc_Msc_initModule(), IfxMsc_resetModule(), IfxMsc_setFractionalDividerStep(), IfxMsc_setSleepMode(), IfxMtu_enableModule(), IfxMtu_runMbist(), IfxMtu_runMbistAll(), IfxPmsPm_setCoreMode(), IfxPmsPm_setSleepMode(), IfxPmsPm_setStandbyMode(), IfxPort_resetESR(), IfxPort_setESR(), IfxPort_setGroupPadDriver(), IfxPort_setPinFunctionMode(), IfxPort_setPinMode(), IfxPort_setPinModeLVDS(), IfxPort_setPinPadDriver(), IfxPsi5_disableModule(), IfxPsi5_enableAllChannels(), IfxPsi5_enableInterrupt(), IfxPsi5_enableModule(), IfxPsi5_Psi5_initChannel(), IfxPsi5_Psi5_initModule(), IfxPsi5_Psi5_resetModule(), IfxPsi5_resetModule(), IfxPsi5_setFractionalDivider(), IfxPsi5_setInterruptNodePointer(), IfxPsi5_setReceiverControl(), IfxPsi5_setRxInput(), IfxPsi5_setSleepMode(), IfxPsi5s_disableModule(), IfxPsi5s_Psi5s_initChannel(), IfxPsi5s_Psi5s_initModule(), IfxPsi5s_Psi5s_resetModule(), IfxPsi5s_resetModule(), IfxPsi5s_setSleepMode(), IfxQspi_resetModule(), IfxQspi_SpiMaster_initModule(), IfxQspi_SpiSlave_initModule(), IfxScuCcu_setSpbFrequency(), IfxScuCcu_waitWithWdtService(), IfxSent_disableModule(), IfxSent_enableModule(), IfxSent_resetModule(), IfxSent_Sent_deInitModule(), IfxSent_Sent_initModule(), IfxSent_setSleepMode(), IfxStm_disableModule(), IfxStm_resetModule(), and IfxStm_setSleepMode().

◆ IfxScuWdt_getCpuWatchdogPasswordInline()

IFX_INLINE uint16 IfxScuWdt_getCpuWatchdogPasswordInline ( Ifx_SCU_WDTCPU * watchdog )

SCUWDT Inline API to fetch current password of CPU Watchdog module.

This API will fetch current Watchdog password for CPU WDT Hardware module. password is needed to be passed with most of the WDT APIs. Normally this API can be used to store the password locally in the caller function or store the password globally in a global variable at the application memory. This API is only meant to be used with startup routines where function call is not possible.

Parameters
watchdog pointer to the watchdog register map of CPU WDT hardware instance
Returns
password Existing (Application specific) password for the Watchdog module.

Definition at line 604 of file IfxScuWdt.h.

Referenced by IfxCpu_enableSegmentSpecificDataAccessCacheability(), IfxCpu_enableSegmentSpecificInstructionAccessCacheability(), IfxCpu_setDataCache(), IfxCpu_setProgramCache(), IfxPmsPm_continueSleepSequenceInRAM(), IfxPmsPm_continueStandbySequenceInRAM(), IfxScuLbist_multiTriggersInline(), IfxScuRcu_clearColdResetStatus(), IfxScuRcu_performReset(), and IfxScuWdt_getCpuWatchdogPassword().

◆ IfxScuWdt_getCpuWatchdogStatus()

IFX_EXTERN uint8 IfxScuWdt_getCpuWatchdogStatus ( void )

SCUWDT API to fetch current status of CPU Watchdog module.

Returns
status

Definition at line 728 of file IfxScuWdt.c.

◆ IfxScuWdt_getGlobalEndinitPassword()

IFX_EXTERN uint16 IfxScuWdt_getGlobalEndinitPassword ( void )

API to fetch current password of global endinit Watchdog module.

This API will fetch current global endinit password for CPU WDT Hardware module. password is needed to be passed with most of the WDT APIs. Normally this API can be used to store the password locally in the caller function or store the password globally in a global variable at the application memory. This API is only meant to be used with startup routines where function call is not possible.

Returns
password Existing (Application specific) password for the Watchdog module.

Definition at line 363 of file IfxScuWdt.c.

Referenced by IfxCpu_disableInterruptsAllExceptMaster(), and IfxCpu_triggerCpuReset().

◆ IfxScuWdt_getGlobalSafetyEndinitPassword()

IFX_EXTERN uint16 IfxScuWdt_getGlobalSafetyEndinitPassword ( void )

API to fetch current password of global safety endinit Watchdog module.

This API will fetch current global endinit password for Safety WDT Hardware module. password is needed to be passed with most of the WDT APIs. Normally this API can be used to store the password locally in the caller function or store the password globally in a global variable at the application memory. This API is only meant to be used with startup routines where function call is not possible.

Returns
password Existing (Application specific) password for the Watchdog module.

Definition at line 378 of file IfxScuWdt.c.

◆ IfxScuWdt_getSafetyWatchdogEndInit()

IFX_INLINE boolean IfxScuWdt_getSafetyWatchdogEndInit ( void )

SCUWDT API to fetch current endinit of Safety/System Watchdog module.

Returns
Endinit status for the Safety Watchdog module.

Definition at line 635 of file IfxScuWdt.h.

Referenced by IfxMtu_clearSram(), IfxMtu_runCheckerBoardTest(), IfxMtu_runMarchUTest(), IfxMtu_runNonDestructiveInversionTest(), and IfxMtu_writeSramAddress().

◆ IfxScuWdt_getSafetyWatchdogPassword()

IFX_EXTERN uint16 IfxScuWdt_getSafetyWatchdogPassword ( void )

SCUWDT API to fetch current password of Safety Watchdog module.

This API will fetch current Watchdog password for Safety WDT Hardware module. password is needed to be passed with most of the WDT APIs. Normally this API can be used to store the password locally in the caller function or store the password globally in a global variable at the application memory.

Returns
password Existing (Application specific) password for the Watchdog module.

Definition at line 393 of file IfxScuWdt.c.

Referenced by IfxCpu_disableOverlayBlock(), IfxCpu_enableOverlayBlock(), IfxEray_Eray_initModule(), IfxEvadc_disableAccess(), IfxEvadc_enableAccess(), IfxMtu_clearSram(), IfxMtu_disableMbistShell(), IfxMtu_runCheckerBoardTest(), IfxMtu_runMarchUTest(), IfxMtu_runMbistAll(), IfxMtu_runNonDestructiveInversionTest(), IfxMtu_writeSramAddress(), IfxPmsEvr_configureBlankingFilterDelay(), IfxPmsEvr_disableInterrupt(), IfxPmsEvr_enableDcdcSynchronisation(), IfxPmsEvr_enableInterrupts(), IfxPmsEvr_enableWakeupOnVextSupplyRampUp(), IfxPmsEvr_evr33ResetTriggerSignalConfig(), IfxPmsEvr_evrcResetTriggerSignalConfig(), IfxPmsEvr_filterSecondaryConversionResult(), IfxPmsEvr_fineTrimEvrClock(), IfxPmsEvr_setEvr33PrimaryAdcTrimValue(), IfxPmsEvr_setEvr33VoltageOutputlevel(), IfxPmsEvr_setFrequencySpreadThreshold(), IfxPmsEvr_setNmosLevel(), IfxPmsEvr_setOverVoltageMonitoringMode(), IfxPmsEvr_setPmosLevel(), IfxPmsEvr_setRegulatorSwitchingFrequency(), IfxPmsEvr_setResetTrimValueMv(), IfxPmsEvr_setSdRegulatorOutputLevel(), IfxPmsEvr_setSdRegulatorPrimaryAdcTrimValue(), IfxPmsEvr_setSecondaryOverVoltageThresholdMv(), IfxPmsEvr_setSecondaryUnderVoltageThresholdMv(), IfxPmsEvr_setStandbyRamSupply(), IfxPmsEvr_setSwitchingFreqDivFactorForExternalsync(), IfxPmsEvr_setUnderVoltageMonitoringMode(), IfxPmsEvr_signedFineTrimEvrClock(), IfxPmsEvr_swdResetTriggerSignalConfig(), IfxPmsPm_clearLoadJumpTimer(), IfxPmsPm_clearLoadJumpTimerOverflowFlag(), IfxPmsPm_clearVoltageDroopTimer(), IfxPmsPm_clearVoltageDroopTimerOverflowFlag(), IfxPmsPm_configureSupplyMonitoring(), IfxPmsPm_disableLoadJumpTimer(), IfxPmsPm_disableLoadJumpTimerOverflowFlag(), IfxPmsPm_disableLoadJumpTimerOverflowInterrupt(), IfxPmsPm_disableVoltageDroopTimer(), IfxPmsPm_disableVoltageDroopTimerOverflowFlag(), IfxPmsPm_disableVoltageDroopTimerOverflowInterrupt(), IfxPmsPm_enableLoadJumpTimer(), IfxPmsPm_enableLoadJumpTimerOverflowFlag(), IfxPmsPm_enableLoadJumpTimerOverflowInterrupt(), IfxPmsPm_enableVoltageDroopTimer(), IfxPmsPm_enableVoltageDroopTimerOverflowFlag(), IfxPmsPm_enableVoltageDroopTimerOverflowInterrupt(), IfxPmsPm_initAndRequestLoadJump(), IfxPmsPm_initAndRequestVoltageDroop(), IfxPmsPm_requestLoadJump(), IfxPmsPm_requestVoltageDroop(), IfxPmsPm_setCoreMode(), IfxPmsPm_setLoadJumpTimerCompareValue(), IfxPmsPm_setStandbyMode(), IfxPmsPm_setVoltageDroopStep(), IfxPmsPm_setVoltageDroopTimerCompareValue(), IfxPmsPm_startLoadJumpTimer(), IfxPmsPm_startVoltageDroopTimer(), IfxPmsPm_stopLoadJumpTimer(), IfxPmsPm_stopVoltageDroopTimer(), IfxPort_modifyPinControllerSelection(), IfxPort_resetPinControllerSelection(), IfxPort_setPinControllerSelection(), IfxScuCcu_modulation_init(), IfxScuCcu_setAsclinFFrequency(), IfxScuCcu_setAsclinSFrequency(), IfxScuCcu_setBbbFrequency(), IfxScuCcu_setCpuFrequency(), IfxScuCcu_setFsi2Frequency(), IfxScuCcu_setFsiFrequency(), IfxScuCcu_setGethFrequency(), IfxScuCcu_setGtmFrequency(), IfxScuCcu_setI2cFrequency(), IfxScuCcu_setMcanFrequency(), IfxScuCcu_setMcanhFrequency(), IfxScuCcu_setMscFrequency(), IfxScuCcu_setQspiFrequency(), IfxScuCcu_setSpbFrequency(), IfxScuCcu_setSriFrequency(), IfxScuCcu_setStmFrequency(), IfxScuCcu_switchToBackupClock(), IfxScuCcu_switchToLowPowerMode(), IfxScuCcu_switchToNormalMode(), IfxScuCcu_waitWithWdtService(), IfxScuRcu_configureResetRequestTrigger(), IfxScuRcu_performReset(), IfxSmu_clearAlarmExecutedStatus(), IfxSmu_clearAlarmStatus(), IfxSmu_clearRegisterMonitorErrorFlag(), IfxSmu_clearRegisterMonitorStatus(), IfxSmu_clearRegMonTestModeEnable(), IfxSmu_configAlarmActionPES(), IfxSmu_ConfigureInterruptGeneration(), IfxSmu_enableFaultToRunState(), IfxSmu_enablePortEmergencyStop(), IfxSmu_lockConfigRegisters(), IfxSmu_setAlarmAction(), IfxSmu_setAlarmStatus(), IfxSmu_setFspMode(), IfxSmu_setPortControlHwEnableAndDir(), IfxSmu_setRegMonTestModeEnable(), IfxSmu_Smu_initModule(), IfxSmu_temporaryLockConfigRegisters(), IfxSmu_unlockConfigRegisters(), IfxSmuStdby_clearSmuStdbyMonBistFlags(), IfxSmuStdby_enableAlarmStatusClear(), IfxSmuStdby_enableSmuStdby(), IfxSmuStdby_enableSmuStdbyMonBist(), IfxSmuStdby_setFaultSignalAGConfigEventFlags(), IfxSmuStdby_setFaultSignalAlarmConfigEventFlag(), IfxSmuStdby_setFsp0ErrorPinActive(), IfxSmuStdby_setFsp1ErrorPinActive(), IfxSmuStdby_setSmuStdbyAlarmStatusFlag(), and IfxSmuStdby_startSmuStdbyMonBist().

◆ IfxScuWdt_getSafetyWatchdogPasswordInline()

IFX_INLINE uint16 IfxScuWdt_getSafetyWatchdogPasswordInline ( void )

SCUWDT Inline API to fetch current password of Safety Watchdog module.

This API will fetch current Watchdog password for Safety WDT Hardware module. password is needed to be passed with most of the WDT APIs. Normally this API can be used to store the password locally in the caller function or store the password globally in a global variable at the application memory. This API is only meant to be used with startup routines where function call is not possible.

Returns
password Existing (Application specific) password for the Watchdog module.

Definition at line 641 of file IfxScuWdt.h.

Referenced by IfxCpu_setAllIdleExceptMasterCpu(), IfxDma_setChannelHardwareResourcePartition(), IfxPmsPm_configureWakeup(), IfxPmsPm_continueStandbySequenceInRAM(), IfxPmsPm_setMasterCpu(), IfxPmsPm_startSleepSequenceinFlash(), IfxPmsPm_startStandbySequenceInFlash(), IfxScuCcu_configureCcuInitialStep(), IfxScuCcu_distributeClockInline(), IfxScuCcu_throttleSysPllClockInline(), IfxScuEru_clearInputChannelConfiguration(), IfxScuEru_clearOutputChannelConfiguration(), IfxScuEru_connectTrigger(), IfxScuEru_disableAutoClear(), IfxScuEru_disableFallingEdgeDetection(), IfxScuEru_disableInputFilter(), IfxScuEru_disablePatternDetectionTrigger(), IfxScuEru_disableRisingEdgeDetection(), IfxScuEru_disableTriggerPulse(), IfxScuEru_enableAutoClear(), IfxScuEru_enableFallingEdgeDetection(), IfxScuEru_enableInputFilter(), IfxScuEru_enablePatternDetectionTrigger(), IfxScuEru_enableRisingEdgeDetection(), IfxScuEru_enableTriggerPulse(), IfxScuEru_selectExternalInput(), IfxScuEru_setFlagPatternDetection(), IfxScuEru_setInputFilterDepth(), IfxScuEru_setInputFilterPredivider(), IfxScuEru_setInterruptGatingPattern(), IfxScuLbist_retriggerInline(), and IfxScuWdt_getSafetyWatchdogPassword().

◆ IfxScuWdt_serviceCpuWatchdog()

IFX_EXTERN void IfxScuWdt_serviceCpuWatchdog ( uint16 password )

SCUWDT API to service CPU Watchdog functionality.

This API will service Watchdog functionality corresponding to CPU WDT Hardware module. User need to use this API call periodically. This API results in reloading of the Watchdog Timer. User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword).

Parameters
password Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 601 of file IfxScuWdt.c.

Referenced by IfxMtu_runMbistAll(), and IfxScuCcu_waitWithWdtService().

◆ IfxScuWdt_serviceSafetyWatchdog()

IFX_EXTERN void IfxScuWdt_serviceSafetyWatchdog ( uint16 password )

SCUWDT API to service Safety Watchdog functionality.

This API will service Watchdog functionality corresponding to Safety WDT Hardware module. User need to use this API call periodically. This API results in reloading of the Watchdog Timer. User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).

Parameters
password Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 607 of file IfxScuWdt.c.

Referenced by IfxMtu_runMbistAll(), and IfxScuCcu_waitWithWdtService().


iLLD_TC38A: How to use Endinit APIs?

How to use Endinit APIs?
iLLD » SCU » Standard Driver » Wdt Basic Functionality
Collaboration diagram for How to use Endinit APIs?:


iLLD_TC38A: SCU Pin Mapping

Data Structures | Macros | Variables
SCU Pin Mapping
iLLD » SCU
Collaboration diagram for SCU Pin Mapping:

Data Structures

struct | IfxScu_Evrwup_In
EVR Wakeup pin mapping structure. More...
struct | IfxScu_Req_In
External Request pin mapping structure. More...
struct | IfxScu_Dcdcsync_Out
DCDC Sync pin mapping structure. More...
struct | IfxScu_Emgstop_In
Emergency Stop pin mapping structure. More...
struct | IfxScu_Wdtlck_Out
Watchdog Timer Lock pin mapping structure. More...
struct | IfxScu_Extclk_Out
External Clock pin mapping structure. More...

Macros

#define | IFXSCU_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXSCU_PINMAP_NUM_REQUESTS 8
#define | IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS 2
#define | IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS 5
#define | IFXSCU_PINMAP_REQ_IN_NUM_ITEMS 4

Variables

IFX_EXTERN IfxScu_Emgstop_In IfxScu_EMGSTOPA_P33_8_IN
Emergency stop Port Pin A input request. More...
IFX_EXTERN IfxScu_Emgstop_In IfxScu_EMGSTOPB_P21_2_IN
Emergency stop Port Pin B input request. More...
IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK0_P00_15_OUT
External Clock 0. More...
IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK0_P23_1_OUT
External Clock 0. More...
IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK1_P00_13_OUT
External Clock 1. More...
IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK1_P11_12_OUT
External Clock 1. More...
IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK1_P32_4_OUT
External Clock 1. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ0A_P15_4_IN
ERU Channel 0 inputs 0 to 5 (0 is the LSB and 5 is the MSB) More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ0C_P10_7_IN
ERU Channel 0 inputs 0 to 5 (0 is the LSB and 5 is the MSB) More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ1A_P14_3_IN
ERU Channel 1 inputs 0 to 5 (0 is the LSB and 5 is the MSB) More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ1C_P10_8_IN
ERU Channel 1 inputs 0 to 5 (0 is the LSB and 5 is the MSB) More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ2A_P10_2_IN
ERU Channel 2 inputs 0 to 5 (0 is the LSB and 5 is the MSB) More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ2B_P02_1_IN
ERU Channel 2 inputs 0 to 5 (0 is the LSB and 5 is the MSB) More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ2C_P00_4_IN
ERU Channel 2 inputs 0 to 5 (0 is the LSB and 5 is the MSB) More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ3A_P10_3_IN
ERU Channel 3 inputs 0 to 5 (0 is the LSB and 5 is the MSB) More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ3B_P14_1_IN
ERU Channel 3 inputs 0 to 5 (0 is the LSB and 5 is the MSB) More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ3C_P02_0_IN
ERU Channel 3 inputs 0 to 5 (0 is the LSB and 5 is the MSB) More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ4A_P33_7_IN
ERU Channel 4 inputs 0 to 5 (0 is the LSB and 5 is the MSB) More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ4D_P15_5_IN
ERU Channel 4 inputs 0 to 5 (0 is the LSB and 5 is the MSB) More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ5A_P15_8_IN
ERU Channel 5 inputs 0 to 5 (0 is the LSB and 5 is the MSB) More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ6A_P20_0_IN
ERU Channel 6 inputs 0 to 5 (0 is the LSB and 5 is the MSB) More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ6D_P11_10_IN
ERU Channel 6 inputs 0 to 5 (0 is the LSB and 5 is the MSB) More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ7A_P20_9_IN
ERU Channel 7 inputs 0 to 5 (0 is the LSB and 5 is the MSB) More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ7C_P15_1_IN
ERU Channel 7 inputs 0 to 5 (0 is the LSB and 5 is the MSB) More...
IFX_EXTERN const IfxScu_Emgstop_In * | IfxScu_Emgstop_In_pinTable [IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS]
IfxScu_Emgstop_In table. More...
IFX_EXTERN const IfxScu_Extclk_Out * | IfxScu_Extclk_Out_pinTable [IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS]
IfxScu_Extclk_Out table. More...
IFX_EXTERN const IfxScu_Req_In * | IfxScu_Req_In_pinTable [IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_NUM_REQUESTS][IFXSCU_PINMAP_REQ_IN_NUM_ITEMS]
IfxScu_Req_In table. More...

Detailed Description

Data Structure Documentation

◆ IfxScu_Evrwup_In

struct IfxScu_Evrwup_In

EVR Wakeup pin mapping structure.

Definition at line 56 of file IfxScu_PinMap.h.

Collaboration diagram for IfxScu_Evrwup_In:
[legend]
Data Fields
Ifx_SCU * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxScu_Req_In

struct IfxScu_Req_In

External Request pin mapping structure.

Definition at line 64 of file IfxScu_PinMap.h.

Collaboration diagram for IfxScu_Req_In:
[legend]
Data Fields
uint8 | channelId | ERU Channel ID.
Ifx_SCU * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxScu_Dcdcsync_Out

struct IfxScu_Dcdcsync_Out

DCDC Sync pin mapping structure.

Definition at line 73 of file IfxScu_PinMap.h.

Collaboration diagram for IfxScu_Dcdcsync_Out:
[legend]
Data Fields
Ifx_SCU * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxScu_Emgstop_In

struct IfxScu_Emgstop_In

Emergency Stop pin mapping structure.

Definition at line 81 of file IfxScu_PinMap.h.

Collaboration diagram for IfxScu_Emgstop_In:
[legend]
Data Fields
Ifx_SCU * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxScu_Wdtlck_Out

struct IfxScu_Wdtlck_Out

Watchdog Timer Lock pin mapping structure.

Definition at line 89 of file IfxScu_PinMap.h.

Collaboration diagram for IfxScu_Wdtlck_Out:
[legend]
Data Fields
Ifx_SCU * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxScu_Extclk_Out

struct IfxScu_Extclk_Out

External Clock pin mapping structure.

Definition at line 97 of file IfxScu_PinMap.h.

Collaboration diagram for IfxScu_Extclk_Out:
[legend]
Data Fields
Ifx_SCU * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

Macro Definition Documentation

◆ IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS

#define IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS 2

Definition at line 132 of file IfxScu_PinMap.h.

◆ IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS

#define IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS 5

Definition at line 133 of file IfxScu_PinMap.h.

◆ IFXSCU_PINMAP_NUM_MODULES

#define IFXSCU_PINMAP_NUM_MODULES 1

Table dimensions.

Definition at line 130 of file IfxScu_PinMap.h.

◆ IFXSCU_PINMAP_NUM_REQUESTS

#define IFXSCU_PINMAP_NUM_REQUESTS 8

Definition at line 131 of file IfxScu_PinMap.h.

◆ IFXSCU_PINMAP_REQ_IN_NUM_ITEMS

#define IFXSCU_PINMAP_REQ_IN_NUM_ITEMS 4

Definition at line 134 of file IfxScu_PinMap.h.

Variable Documentation

◆ IfxScu_Emgstop_In_pinTable

IFX_EXTERN const IfxScu_Emgstop_In* IfxScu_Emgstop_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS]

IfxScu_Emgstop_In table.

Definition at line 138 of file IfxScu_PinMap.h.

◆ IfxScu_EMGSTOPA_P33_8_IN

IFX_EXTERN IfxScu_Emgstop_In IfxScu_EMGSTOPA_P33_8_IN

Emergency stop Port Pin A input request.

Definition at line 104 of file IfxScu_PinMap.h.

◆ IfxScu_EMGSTOPB_P21_2_IN

IFX_EXTERN IfxScu_Emgstop_In IfxScu_EMGSTOPB_P21_2_IN

Emergency stop Port Pin B input request.

Definition at line 105 of file IfxScu_PinMap.h.

◆ IfxScu_EXTCLK0_P00_15_OUT

IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK0_P00_15_OUT

External Clock 0.

Definition at line 106 of file IfxScu_PinMap.h.

◆ IfxScu_EXTCLK0_P23_1_OUT

IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK0_P23_1_OUT

External Clock 0.

Definition at line 107 of file IfxScu_PinMap.h.

◆ IfxScu_EXTCLK1_P00_13_OUT

IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK1_P00_13_OUT

External Clock 1.

Definition at line 108 of file IfxScu_PinMap.h.

◆ IfxScu_EXTCLK1_P11_12_OUT

IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK1_P11_12_OUT

External Clock 1.

Definition at line 109 of file IfxScu_PinMap.h.

◆ IfxScu_EXTCLK1_P32_4_OUT

IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK1_P32_4_OUT

External Clock 1.

Definition at line 110 of file IfxScu_PinMap.h.

◆ IfxScu_Extclk_Out_pinTable

IFX_EXTERN const IfxScu_Extclk_Out* IfxScu_Extclk_Out_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS]

IfxScu_Extclk_Out table.

Definition at line 141 of file IfxScu_PinMap.h.

◆ IfxScu_REQ0A_P15_4_IN

IFX_EXTERN IfxScu_Req_In IfxScu_REQ0A_P15_4_IN

ERU Channel 0 inputs 0 to 5 (0 is the LSB and 5 is the MSB)

Definition at line 111 of file IfxScu_PinMap.h.

◆ IfxScu_REQ0C_P10_7_IN

IFX_EXTERN IfxScu_Req_In IfxScu_REQ0C_P10_7_IN

ERU Channel 0 inputs 0 to 5 (0 is the LSB and 5 is the MSB)

Definition at line 112 of file IfxScu_PinMap.h.

◆ IfxScu_REQ1A_P14_3_IN

IFX_EXTERN IfxScu_Req_In IfxScu_REQ1A_P14_3_IN

ERU Channel 1 inputs 0 to 5 (0 is the LSB and 5 is the MSB)

Definition at line 113 of file IfxScu_PinMap.h.

◆ IfxScu_REQ1C_P10_8_IN

IFX_EXTERN IfxScu_Req_In IfxScu_REQ1C_P10_8_IN

ERU Channel 1 inputs 0 to 5 (0 is the LSB and 5 is the MSB)

Definition at line 114 of file IfxScu_PinMap.h.

◆ IfxScu_REQ2A_P10_2_IN

IFX_EXTERN IfxScu_Req_In IfxScu_REQ2A_P10_2_IN

ERU Channel 2 inputs 0 to 5 (0 is the LSB and 5 is the MSB)

Definition at line 115 of file IfxScu_PinMap.h.

◆ IfxScu_REQ2B_P02_1_IN

IFX_EXTERN IfxScu_Req_In IfxScu_REQ2B_P02_1_IN

ERU Channel 2 inputs 0 to 5 (0 is the LSB and 5 is the MSB)

Definition at line 116 of file IfxScu_PinMap.h.

◆ IfxScu_REQ2C_P00_4_IN

IFX_EXTERN IfxScu_Req_In IfxScu_REQ2C_P00_4_IN

ERU Channel 2 inputs 0 to 5 (0 is the LSB and 5 is the MSB)

Definition at line 117 of file IfxScu_PinMap.h.

◆ IfxScu_REQ3A_P10_3_IN

IFX_EXTERN IfxScu_Req_In IfxScu_REQ3A_P10_3_IN

ERU Channel 3 inputs 0 to 5 (0 is the LSB and 5 is the MSB)

Definition at line 118 of file IfxScu_PinMap.h.

◆ IfxScu_REQ3B_P14_1_IN

IFX_EXTERN IfxScu_Req_In IfxScu_REQ3B_P14_1_IN

ERU Channel 3 inputs 0 to 5 (0 is the LSB and 5 is the MSB)

Definition at line 119 of file IfxScu_PinMap.h.

◆ IfxScu_REQ3C_P02_0_IN

IFX_EXTERN IfxScu_Req_In IfxScu_REQ3C_P02_0_IN

ERU Channel 3 inputs 0 to 5 (0 is the LSB and 5 is the MSB)

Definition at line 120 of file IfxScu_PinMap.h.

◆ IfxScu_REQ4A_P33_7_IN

IFX_EXTERN IfxScu_Req_In IfxScu_REQ4A_P33_7_IN

ERU Channel 4 inputs 0 to 5 (0 is the LSB and 5 is the MSB)

Definition at line 121 of file IfxScu_PinMap.h.

◆ IfxScu_REQ4D_P15_5_IN

IFX_EXTERN IfxScu_Req_In IfxScu_REQ4D_P15_5_IN

ERU Channel 4 inputs 0 to 5 (0 is the LSB and 5 is the MSB)

Definition at line 122 of file IfxScu_PinMap.h.

◆ IfxScu_REQ5A_P15_8_IN

IFX_EXTERN IfxScu_Req_In IfxScu_REQ5A_P15_8_IN

ERU Channel 5 inputs 0 to 5 (0 is the LSB and 5 is the MSB)

Definition at line 123 of file IfxScu_PinMap.h.

◆ IfxScu_REQ6A_P20_0_IN

IFX_EXTERN IfxScu_Req_In IfxScu_REQ6A_P20_0_IN

ERU Channel 6 inputs 0 to 5 (0 is the LSB and 5 is the MSB)

Definition at line 124 of file IfxScu_PinMap.h.

◆ IfxScu_REQ6D_P11_10_IN

IFX_EXTERN IfxScu_Req_In IfxScu_REQ6D_P11_10_IN

ERU Channel 6 inputs 0 to 5 (0 is the LSB and 5 is the MSB)

Definition at line 125 of file IfxScu_PinMap.h.

◆ IfxScu_REQ7A_P20_9_IN

IFX_EXTERN IfxScu_Req_In IfxScu_REQ7A_P20_9_IN

ERU Channel 7 inputs 0 to 5 (0 is the LSB and 5 is the MSB)

Definition at line 126 of file IfxScu_PinMap.h.

◆ IfxScu_REQ7C_P15_1_IN

IFX_EXTERN IfxScu_Req_In IfxScu_REQ7C_P15_1_IN

ERU Channel 7 inputs 0 to 5 (0 is the LSB and 5 is the MSB)

Definition at line 127 of file IfxScu_PinMap.h.

◆ IfxScu_Req_In_pinTable

IFX_EXTERN const IfxScu_Req_In* IfxScu_Req_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_NUM_REQUESTS][IFXSCU_PINMAP_REQ_IN_NUM_ITEMS]

IfxScu_Req_In table.

Definition at line 144 of file IfxScu_PinMap.h.


iLLD_TC38A: How to use the Scu Clock driver?

How to use the Scu Clock driver?
iLLD » SCU
Collaboration diagram for How to use the Scu Clock driver?:

The Scu Clock control unit driver provides a default configuration for pll and Clock initialisation and set of peripheral clock configuration functions.

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Scu/Std/IfxScuCcu.h>

Variables

Declare the Clock Configuration variables in your C code:

// used globally
// configuration for the PLL steps
static IfxScuCcu_PllStepsConfig IfxScuCcu_testPllConfigSteps[] = {
IFXSCU_CFG_PLL_STEPS
};
static const IfxScuCcu_FlashWaitstateConfig IfxScuCcu_defaultFlashWaitstateConfig = IFXSCU_CFG_FLASH_WAITSTATE;
// Default configuration for the Clock Configuration
IfxScuCcu_Config IfxScuCcu_testClockConfig = {
// IfxScuCcu_InitialStepConfig: Configuration of first step which is same as internal osc frequency.
IFXSCU_CFG_PLL_INITIAL_STEP,
//IfxScuCcu_PllThrottleConfig: Configuration of PLL throttling.
{
sizeof(IfxScuCcu_defaultPllConfigSteps) / sizeof(IfxScuCcu_PllStepConfig),
IfxScuCcu_defaultPllConfigSteps
},
IFXSCU_CFG_CLK_DISTRIBUTION,
&IfxScuCcu_defaultFlashWaitstateConfig,
&IfxScuCcu_defaultModConfig
};

Module Initialisation

The module initialisation can be done in the same function. Here an example:

// standard PLL & clock initialisation
IfxScuCcu_init(&IfxScuCcu_testClockConfig);

The SYS PLL, PER PLL1 , PLL2 and clocks are now initialised based on the XTAL and PLL values configured in Ifx_Cfg.h and are ready for use now!

Alternately the PLL and clocks can be initialised using below method which provides greater control on the configuration.

static const IfxScuCcu_PllStepConfig IfxScuCcu_defaultPllConfigSteps[] = {
{ //Step 0 Config: 150MHz
(4 - 1), //uint8 k2Step;
0.000100, //float32 waitTime;
},
{ //Step 1 Config: 200MHz
(3 - 1), //uint8 k2Step;
0.000100, //float32 waitTime;
},
{ //Step 2 Config: 300MHz
(2 - 1), //uint8 k2Step;
0.000100, //float32 waitTime;
}
};
IfxScuCcu_Config IfxScuCcu_sampleClockConfig;
IfxScuCcu_initConfig(&IfxScuCcu_sampleClockConfig);
IfxScuCcu_sampleClockConfig.pllInitialStepConfig.pllsParameters.pllInputClockSelection = IfxScuCcu_PllInputClockSelection_fOsc0;
//SYS PLL = 300Mhz, XTAL = 20Mhz
IfxScuCcu_sampleClockConfig.pllInitialStepConfig.pllsParameters.sysPllConfig.k2Divider = IfxScuCcu_K2divider_2;
IfxScuCcu_sampleClockConfig.pllInitialStepConfig.pllsParameters.sysPllConfig.nDivider = IfxScuCcu_Ndivider_60;
IfxScuCcu_sampleClockConfig.pllInitialStepConfig.pllsParameters.sysPllConfig.pDivider = IfxScuCcu_Pdivider_2;
IfxScuCcu_sampleClockConfig.pllInitialStepConfig.waitTime = 0.000200F; // wait time
IfxScuCcu_sampleClockConfig.sysPllThrottleConfig.numOfSteps = sizeof(IfxScuCcu_defaultPllConfigSteps) / sizeof(IfxScuCcu_PllStepConfig); // step clock incr
IfxScuCcu_sampleClockConfig.sysPllThrottleConfig.pllSteps = IfxScuCcu_defaultPllConfigSteps;
// PER PLL1 = 240Mhz, PERPLL2 = 50Mhz
IfxScuCcu_sampleClockConfig.pllInitialStepConfig.pllsParameters.perPllConfig.k2Divider = IfxScuCcu_K2divider_2;
IfxScuCcu_sampleClockConfig.pllInitialStepConfig.pllsParameters.perPllConfig.k3Divider = IfxScuCcu_K3divider_6;
IfxScuCcu_sampleClockConfig.pllInitialStepConfig.pllsParameters.perPllConfig.k3DividerBypass = 0;
IfxScuCcu_sampleClockConfig.pllInitialStepConfig.pllsParameters.perPllConfig.nDivider = IfxScuCcu_Ndivider_24;
IfxScuCcu_sampleClockConfig.pllInitialStepConfig.pllsParameters.perPllConfig.pDivider = IfxScuCcu_Pdivider_1;
// update CCUCON Config use mask and value as below
IfxScuCcu_sampleClockConfig.clockDistribution.ccucon0.mask =IFXSCU_CFG_CCUCON0_MASK;
IfxScuCcu_sampleClockConfig.clockDistribution.ccucon0.value = IFXSCU_CFG_CCUCON0;
// standard PLL & clock initialisation
IfxScuCcu_init(&IfxScuCcu_sampleClockConfig);

** Modulation Configuration ** The SCU CCU module also provides an option to Frequency Modulate the clock. The Modulation configuration can be done as follows:

//define your modulation configuration structure:
IFX_CONST IfxScuCcu_Mod_Config IfxScuCcu_SampleModConfig = {
IfxScuCcu_ModEn_disabled, // disable is default //enable / disable modulation
IfxScuCcu_ModulationAmplitude_0p5, // default 0 value // specify the modulation amplitude %
}
// put this as part of the CCU configuration:
IfxScuCcu_sampleClockConfig.modulationConfig = &IfxScuCcu_SampleModConfig;
// now initalize the CCU PLL and clock with the init function
IfxScuCcu_init(&IfxScuCcu_sampleClockConfig)


iLLD_TC38A: IfxScu_cfg.h File Reference

  • _Impl
Macros | Enumerations
IfxScu_cfg.h File Reference
iLLD » SCU

SCU on-chip implementation data. More...

#include "Ifx_Cfg.h"
#include "IfxScu_bf.h"
Include dependency graph for IfxScu_cfg.h:

Go to the source code of this file.

Macros

#define | IFX_CFG_SCU_XTAL_FREQUENCY 20000000
Default External oscillator frequency. More...
#define | IFX_CFG_SCU_SYSCLK_FREQUENCY 20000000
Default External SysClk pin frequency. More...
#define | IFX_CFG_SCU_PLL_FREQUENCY 300000000
Default PLL frequency. More...
#define | IFX_CFG_SCU_PLL1_FREQUENCY 320000000
Default PER PLL1 frequency. More...
#define | IFX_CFG_SCU_PLL2_FREQUENCY 200000000
Default PER PLL2 frequency. More...
#define | IFXSCU_VCO_BASE_FREQUENCY (100000000.0)
#define | IFXSCU_EVR_OSC_FREQUENCY (100000000.0)
#define | IFXSCU_PLL_FREERUNNING_FREQUENCY (100000000.0)
#define | IFX_CFG_SCU_EXT_CLOCK 0
Default External Crystal input. More...
#define | IFXSCU_CFG_XTAL_FREQ 20MHZ
#define | IFXSCU_CFG_PLL_FREQ 300MHZ
#define | IFXSCU_CFG_PLL1_FREQ 320MHZ
#define | IFXSCU_CFG_PLL2_FREQ 200MHZ
#define | IFXSCU_CFG_PLL_STEPS_FDCO_640MHZ_TO_TARGET_80MHZ
#define | IFXSCU_CFG_PLL_STEPS_FDCO_800MHZ_TO_TARGET_133MHZ
#define | IFXSCU_CFG_PLL_STEPS_FDCO_720MHZ_TO_TARGET_240MHZ
#define | IFXSCU_CFG_PLL_STEPS_FDCO_600MHZ_TO_TARGET_300MHZ
#define | IFXSCU_CFG_PLL_STEPS_FDCO_600MHZ_TO_TARGET_200MHZ
#define | IFXSCU_CFG_SYS_PLL_16MHZ_80MHZ
#define | IFXSCU_CFG_WAIT_INITIAL_STEP_16MHZ_80MHZ 0.000200F
#define | IFXSCU_CFG_PLL_STEPS_16MHZ_80MHZ IFXSCU_CFG_PLL_STEPS_FDCO_640MHZ_TO_TARGET_80MHZ
#define | IFXSCU_CFG_SYS_PLL_16MHZ_133MHZ
#define | IFXSCU_CFG_WAIT_INITIAL_STEP_16MHZ_133MHZ 0.000200F
#define | IFXSCU_CFG_PLL_STEPS_16MHZ_133MHZ IFXSCU_CFG_PLL_STEPS_FDCO_800MHZ_TO_TARGET_133MHZ
#define | IFXSCU_CFG_SYS_PLL_16MHZ_240MHZ
#define | IFXSCU_CFG_WAIT_INITIAL_STEP_16MHZ_240MHZ 0.000200F
#define | IFXSCU_CFG_PLL_STEPS_16MHZ_240MHZ IFXSCU_CFG_PLL_STEPS_FDCO_720MHZ_TO_TARGET_240MHZ
#define | IFXSCU_CFG_SYS_PLL_16MHZ_300MHZ
#define | IFXSCU_CFG_WAIT_INITIAL_STEP_16MHZ_300MHZ 0.000200F
#define | IFXSCU_CFG_PLL_STEPS_16MHZ_300MHZ IFXSCU_CFG_PLL_STEPS_FDCO_600MHZ_TO_TARGET_300MHZ
#define | IFXSCU_CFG_SYS_PLL_20MHZ_200MHZ
#define | IFXSCU_CFG_WAIT_INITIAL_STEP_20MHZ_200MHZ 0.000200F
#define | IFXSCU_CFG_PLL_STEPS_20MHZ_200MHZ IFXSCU_CFG_PLL_STEPS_FDCO_600MHZ_TO_TARGET_200MHZ
#define | IFXSCU_CFG_SYS_PLL_20MHZ_240MHZ
#define | IFXSCU_CFG_WAIT_INITIAL_STEP_20MHZ_240MHZ 0.000200F
#define | IFXSCU_CFG_PLL_STEPS_20MHZ_240MHZ IFXSCU_CFG_PLL_STEPS_FDCO_720MHZ_TO_TARGET_240MHZ
#define | IFXSCU_CFG_SYS_PLL_20MHZ_300MHZ
#define | IFXSCU_CFG_WAIT_INITIAL_STEP_20MHZ_300MHZ 0.000200F
#define | IFXSCU_CFG_PLL_STEPS_20MHZ_300MHZ IFXSCU_CFG_PLL_STEPS_FDCO_600MHZ_TO_TARGET_300MHZ
#define | IFXSCU_CFG_SYS_PLL_25MHZ_200MHZ
#define | IFXSCU_CFG_WAIT_INITIAL_STEP_25MHZ_200MHZ 0.000200F
#define | IFXSCU_CFG_PLL_STEPS_25MHZ_200MHZ IFXSCU_CFG_PLL_STEPS_FDCO_600MHZ_TO_TARGET_200MHZ
#define | IFXSCU_CFG_SYS_PLL_25MHZ_300MHZ
#define | IFXSCU_CFG_WAIT_INITIAL_STEP_25MHZ_300MHZ 0.000200F
#define | IFXSCU_CFG_PLL_STEPS_25MHZ_300MHZ IFXSCU_CFG_PLL_STEPS_FDCO_600MHZ_TO_TARGET_300MHZ
#define | IFXSCU_CFG_SYS_PLL_40MHZ_200MHZ
#define | IFXSCU_CFG_WAIT_INITIAL_STEP_40MHZ_200MHZ 0.000200F
#define | IFXSCU_CFG_PLL_STEPS_40MHZ_200MHZ IFXSCU_CFG_PLL_STEPS_FDCO_600MHZ_TO_TARGET_200MHZ
#define | IFXSCU_CFG_SYS_PLL_40MHZ_240MHZ
#define | IFXSCU_CFG_WAIT_INITIAL_STEP_40MHZ_240MHZ 0.000200F
#define | IFXSCU_CFG_PLL_STEPS_40MHZ_240MHZ IFXSCU_CFG_PLL_STEPS_FDCO_720MHZ_TO_TARGET_240MHZ
#define | IFXSCU_CFG_SYS_PLL_40MHZ_300MHZ
#define | IFXSCU_CFG_WAIT_INITIAL_STEP_40MHZ_300MHZ 0.000200F
#define | IFXSCU_CFG_PLL_STEPS_40MHZ_300MHZ IFXSCU_CFG_PLL_STEPS_FDCO_600MHZ_TO_TARGET_300MHZ
#define | IFXSCU_CFG_PER_PLL_16MHZ_320MHZ_200MHZ
Macro for Initial Pll step, for profile with 16MHz Crystal and 320/200MHz target (fDCO= 640) More...
#define | IFXSCU_CFG_PER_PLL_16MHZ_160MHZ_200MHZ
Macro for Initial Pll step, for profile with 16MHz Crystal and 160/200MHz target (fDCO= 640) More...
#define | IFXSCU_CFG_PER_PLL_20MHZ_320MHZ_200MHZ
Macro for Initial Pll step, for profile with 20MHz Crystal and 320/200MHz target (fDCO= 640) More...
#define | IFXSCU_CFG_PER_PLL_20MHZ_160MHZ_200MHZ
Macro for Initial Pll step, for profile with 20MHz Crystal and 160/200MHz target (fDCO= 640) More...
#define | IFXSCU_CFG_PER_PLL_25MHZ_160MHZ_200MHZ
Macro for Initial Pll step, for profile with 25MHz Crystal and 160/200MHz target (fDCO= 800) More...
#define | IFXSCU_CFG_PER_PLL_40MHZ_320MHZ_200MHZ
Macro for Initial Pll step, for profile with 40MHz Crystal and 320/200MHz target (fDCO= 640) More...
#define | IFXSCU_CFG_PER_PLL_40MHZ_160MHZ_200MHZ
Macro for Initial Pll step, for profile with 40MHz Crystal and 160/200MHz target (fDCO= 640) More...
#define | IFXSCU_CFG_PLL_STEPS_BASIC_(xtalFreq, pll0Freq) IFXSCU_CFG_PLL_STEPS_##xtalFreq##_##pll0Freq
#define | IFXSCU_CFG_PLL_STEPS_BASIC(xtalFreq, pll0Freq) IFXSCU_CFG_PLL_STEPS_BASIC_(xtalFreq, pll0Freq)
#define | IFXSCU_CFG_PLL_STEPS IFXSCU_CFG_PLL_STEPS_BASIC(IFXSCU_CFG_XTAL_FREQ, IFXSCU_CFG_PLL_FREQ)
#define | IFXSCU_CFG_SYS_PLL_INITIAL_STEP_BASIC_(xtalFreq, pll0Freq) IFXSCU_CFG_SYS_PLL_##xtalFreq##_##pll0Freq
#define | IFXSCU_CFG_SYS_PLL_INITIAL_STEP_BASIC(xtalFreq, pll0Freq) IFXSCU_CFG_SYS_PLL_INITIAL_STEP_BASIC_(xtalFreq, pll0Freq)
#define | IFXSCU_CFG_SYS_PLL_INITIAL_STEP IFXSCU_CFG_SYS_PLL_INITIAL_STEP_BASIC(IFXSCU_CFG_XTAL_FREQ, IFXSCU_CFG_PLL_FREQ)
#define | IFXSCU_CFG_PER_PLL_INITIAL_STEP_BASIC_(xtalFreq, pll1Freq, pll2Freq) IFXSCU_CFG_PER_PLL_##xtalFreq##_##pll1Freq##_##pll2Freq
#define | IFXSCU_CFG_PER_PLL_INITIAL_STEP_BASIC(xtalFreq, pll1Freq, pll2Freq) IFXSCU_CFG_PER_PLL_INITIAL_STEP_BASIC_(xtalFreq, pll1Freq, pll2Freq)
#define | IFXSCU_CFG_PER_PLL_INITIAL_STEP IFXSCU_CFG_PER_PLL_INITIAL_STEP_BASIC(IFXSCU_CFG_XTAL_FREQ, IFXSCU_CFG_PLL1_FREQ, IFXSCU_CFG_PLL2_FREQ)
#define | IFXSCU_CFG_WAIT_INITIAL_STEP_BASIC_(xtalFreq, pll0Freq) IFXSCU_CFG_WAIT_INITIAL_STEP_##xtalFreq##_##pll0Freq
#define | IFXSCU_CFG_WAIT_INITIAL_STEP_BASIC(xtalFreq, pll0Freq) IFXSCU_CFG_WAIT_INITIAL_STEP_BASIC_(xtalFreq, pll0Freq)
#define | IFXSCU_CFG_WAIT_INITIAL_STEP IFXSCU_CFG_WAIT_INITIAL_STEP_BASIC(IFXSCU_CFG_XTAL_FREQ, IFXSCU_CFG_PLL_FREQ)
#define | IFXSCU_CFG_PLL_INITIAL_STEP
#define | IFXSCU_CFG_STMDIV_80MHZ (1)
#define | IFXSCU_CFG_GTMDIV_80MHZ (1)
#define | IFXSCU_CFG_SRIDIV_80MHZ (1)
#define | IFXSCU_CFG_SPBDIV_80MHZ (2)
#define | IFXSCU_CFG_BBBDIV_80MHZ (2)
#define | IFXSCU_CFG_FSIDIV_80MHZ (IFXSCU_CFG_SRIDIV_80MHZ * 1)
#define | IFXSCU_CFG_FSI2DIV_80MHZ (IFXSCU_CFG_SRIDIV_80MHZ * 1)
#define | IFXSCU_CFG_GETHDIV_80MHZ (1)
#define | IFXSCU_CFG_MCANHDIV_80MHZ (2)
#define | IFXSCU_CFG_CPU0DIV_80MHZ (0)
#define | IFXSCU_CFG_CPU1DIV_80MHZ (0)
#define | IFXSCU_CFG_CPU2DIV_80MHZ (0)
#define | IFXSCU_CFG_CPU3DIV_80MHZ (0)
#define | IFXSCU_CFG_STMDIV_133MHZ (2)
#define | IFXSCU_CFG_GTMDIV_133MHZ (1)
#define | IFXSCU_CFG_SRIDIV_133MHZ (1)
#define | IFXSCU_CFG_SPBDIV_133MHZ (2)
#define | IFXSCU_CFG_BBBDIV_133MHZ (2)
#define | IFXSCU_CFG_FSIDIV_133MHZ (IFXSCU_CFG_SRIDIV_133MHZ * 2)
#define | IFXSCU_CFG_FSI2DIV_133MHZ (IFXSCU_CFG_SRIDIV_133MHZ * 1)
#define | IFXSCU_CFG_GETHDIV_133MHZ (1)
#define | IFXSCU_CFG_MCANHDIV_133MHZ (2)
#define | IFXSCU_CFG_CPU0DIV_133MHZ (0)
#define | IFXSCU_CFG_CPU1DIV_133MHZ (0)
#define | IFXSCU_CFG_CPU2DIV_133MHZ (0)
#define | IFXSCU_CFG_CPU3DIV_133MHZ (0)
#define | IFXSCU_CFG_STMDIV_200MHZ (2)
#define | IFXSCU_CFG_GTMDIV_200MHZ (1)
#define | IFXSCU_CFG_SRIDIV_200MHZ (1)
#define | IFXSCU_CFG_SPBDIV_200MHZ (2)
#define | IFXSCU_CFG_BBBDIV_200MHZ (2)
#define | IFXSCU_CFG_FSIDIV_200MHZ (IFXSCU_CFG_SRIDIV_200MHZ * 2)
#define | IFXSCU_CFG_FSI2DIV_200MHZ (IFXSCU_CFG_SRIDIV_200MHZ * 1)
#define | IFXSCU_CFG_GETHDIV_200MHZ (1)
#define | IFXSCU_CFG_MCANHDIV_200MHZ (2)
#define | IFXSCU_CFG_CPU0DIV_200MHZ (0)
#define | IFXSCU_CFG_CPU1DIV_200MHZ (0)
#define | IFXSCU_CFG_CPU2DIV_200MHZ (0)
#define | IFXSCU_CFG_CPU3DIV_200MHZ (0)
#define | IFXSCU_CFG_STMDIV_240MHZ (3)
#define | IFXSCU_CFG_GTMDIV_240MHZ (1)
#define | IFXSCU_CFG_SRIDIV_240MHZ (1)
#define | IFXSCU_CFG_SPBDIV_240MHZ (3)
#define | IFXSCU_CFG_BBBDIV_240MHZ (2)
#define | IFXSCU_CFG_FSIDIV_240MHZ (IFXSCU_CFG_SRIDIV_240MHZ * 3)
#define | IFXSCU_CFG_FSI2DIV_240MHZ (IFXSCU_CFG_SRIDIV_240MHZ * 1)
#define | IFXSCU_CFG_GETHDIV_240MHZ (2)
#define | IFXSCU_CFG_MCANHDIV_240MHZ (3)
#define | IFXSCU_CFG_CPU0DIV_240MHZ (0)
#define | IFXSCU_CFG_CPU1DIV_240MHZ (0)
#define | IFXSCU_CFG_CPU2DIV_240MHZ (0)
#define | IFXSCU_CFG_CPU3DIV_240MHZ (0)
#define | IFXSCU_CFG_STMDIV_300MHZ (3)
#define | IFXSCU_CFG_GTMDIV_300MHZ (1)
#define | IFXSCU_CFG_SRIDIV_300MHZ (1)
#define | IFXSCU_CFG_SPBDIV_300MHZ (3)
#define | IFXSCU_CFG_BBBDIV_300MHZ (2)
#define | IFXSCU_CFG_FSIDIV_300MHZ (IFXSCU_CFG_SRIDIV_300MHZ * 3)
#define | IFXSCU_CFG_FSI2DIV_300MHZ (IFXSCU_CFG_SRIDIV_300MHZ * 1)
#define | IFXSCU_CFG_GETHDIV_300MHZ (2)
#define | IFXSCU_CFG_MCANHDIV_300MHZ (3)
#define | IFXSCU_CFG_CPU0DIV_300MHZ (0)
#define | IFXSCU_CFG_CPU1DIV_300MHZ (0)
#define | IFXSCU_CFG_CPU2DIV_300MHZ (0)
#define | IFXSCU_CFG_CPU3DIV_300MHZ (0)
#define | IFXSCU_CFG_MCANDIV_320MHZ_200MHZ (2)
#define | IFXSCU_CFG_CLKSELMCAN_320MHZ_200MHZ (1)
#define | IFXSCU_CFG_PLL1DIVDIS_320MHZ_200MHZ (0)
#define | IFXSCU_CFG_I2CDIV_320MHZ_200MHZ (2)
#define | IFXSCU_CFG_MSCDIV_320MHZ_200MHZ (1)
#define | IFXSCU_CFG_CLKSELMSC_320MHZ_200MHZ (1)
#define | IFXSCU_CFG_QSPIDIV_320MHZ_200MHZ (1)
#define | IFXSCU_CFG_CLKSELQSPI_320MHZ_200MHZ (2)
#define | IFXSCU_CFG_ASCLINFDIV_320MHZ_200MHZ (1)
#define | IFXSCU_CFG_ASCLINSDIV_320MHZ_200MHZ (2)
#define | IFXSCU_CFG_CLKSELASCLINS_320MHZ_200MHZ (1)
#define | IFXSCU_CFG_MCANDIV_160MHZ_200MHZ (1)
#define | IFXSCU_CFG_CLKSELMCAN_160MHZ_200MHZ (1)
#define | IFXSCU_CFG_PLL1DIVDIS_160MHZ_200MHZ (0)
#define | IFXSCU_CFG_I2CDIV_160MHZ_200MHZ (2)
#define | IFXSCU_CFG_MSCDIV_160MHZ_200MHZ (1)
#define | IFXSCU_CFG_CLKSELMSC_160MHZ_200MHZ (1)
#define | IFXSCU_CFG_QSPIDIV_160MHZ_200MHZ (1)
#define | IFXSCU_CFG_CLKSELQSPI_160MHZ_200MHZ (2)
#define | IFXSCU_CFG_ASCLINFDIV_160MHZ_200MHZ (1)
#define | IFXSCU_CFG_ASCLINSDIV_160MHZ_200MHZ (1)
#define | IFXSCU_CFG_CLKSELASCLINS_160MHZ_200MHZ (1)
#define | IFXSCU_CFG_CCUCON0_MASK
#define | IFXSCU_CFG_CCUCON0_BASIC_(pll0Freq, pll1Freq, pll2Freq)
#define | IFXSCU_CFG_CCUCON0_BASIC(pll0Freq, pll1Freq, pll2Freq) IFXSCU_CFG_CCUCON0_BASIC_(pll0Freq, pll1Freq, pll2Freq)
#define | IFXSCU_CFG_CCUCON0 IFXSCU_CFG_CCUCON0_BASIC(IFXSCU_CFG_PLL_FREQ, IFXSCU_CFG_PLL1_FREQ, IFXSCU_CFG_PLL2_FREQ)
#define | IFXSCU_CFG_CCUCON1_MASK
#define | IFXSCU_CFG_CCUCON1_BASIC_(pll0Freq, pll1Freq, pll2Freq)
#define | IFXSCU_CFG_CCUCON1_BASIC(pll0Freq, pll1Freq, pll2Freq) IFXSCU_CFG_CCUCON1_BASIC_(pll0Freq, pll1Freq, pll2Freq)
#define | IFXSCU_CFG_CCUCON1 IFXSCU_CFG_CCUCON1_BASIC(IFXSCU_CFG_PLL_FREQ, IFXSCU_CFG_PLL1_FREQ, IFXSCU_CFG_PLL2_FREQ)
#define | IFXSCU_CFG_CCUCON2_MASK
#define | IFXSCU_CFG_CCUCON2_BASIC_(pll0Freq, pll1Freq, pll2Freq)
#define | IFXSCU_CFG_CCUCON2_BASIC(pll0Freq, pll1Freq, pll2Freq) IFXSCU_CFG_CCUCON2_BASIC_(pll0Freq, pll1Freq, pll2Freq)
#define | IFXSCU_CFG_CCUCON2 IFXSCU_CFG_CCUCON2_BASIC(IFXSCU_CFG_PLL_FREQ, IFXSCU_CFG_PLL1_FREQ, IFXSCU_CFG_PLL2_FREQ)
#define | IFXSCU_CFG_CCUCON5_MASK
#define | IFXSCU_CFG_CCUCON5_BASIC_(pll0Freq, pll1Freq, pll2Freq)
#define | IFXSCU_CFG_CCUCON5_BASIC(pll0Freq, pll1Freq, pll2Freq) IFXSCU_CFG_CCUCON5_BASIC_(pll0Freq, pll1Freq, pll2Freq)
#define | IFXSCU_CFG_CCUCON5 IFXSCU_CFG_CCUCON5_BASIC(IFXSCU_CFG_PLL_FREQ, IFXSCU_CFG_PLL1_FREQ, IFXSCU_CFG_PLL2_FREQ)
#define | IFXSCU_CFG_CCUCON6_MASK
#define | IFXSCU_CFG_CCUCON6_BASIC_(pll0Freq, pll1Freq, pll2Freq)
#define | IFXSCU_CFG_CCUCON6_BASIC(pll0Freq, pll1Freq, pll2Freq) IFXSCU_CFG_CCUCON6_BASIC_(pll0Freq, pll1Freq, pll2Freq)
#define | IFXSCU_CFG_CCUCON6 IFXSCU_CFG_CCUCON6_BASIC(IFXSCU_CFG_PLL_FREQ, IFXSCU_CFG_PLL1_FREQ, IFXSCU_CFG_PLL2_FREQ)
#define | IFXSCU_CFG_CCUCON7_MASK
#define | IFXSCU_CFG_CCUCON7_BASIC_(pll0Freq, pll1Freq, pll2Freq)
#define | IFXSCU_CFG_CCUCON7_BASIC(pll0Freq, pll1Freq, pll2Freq) IFXSCU_CFG_CCUCON7_BASIC_(pll0Freq, pll1Freq, pll2Freq)
#define | IFXSCU_CFG_CCUCON7 IFXSCU_CFG_CCUCON7_BASIC(IFXSCU_CFG_PLL_FREQ, IFXSCU_CFG_PLL1_FREQ, IFXSCU_CFG_PLL2_FREQ)
#define | IFXSCU_CFG_CCUCON8_MASK
#define | IFXSCU_CFG_CCUCON8_BASIC_(pll0Freq, pll1Freq, pll2Freq)
#define | IFXSCU_CFG_CCUCON8_BASIC(pll0Freq, pll1Freq, pll2Freq) IFXSCU_CFG_CCUCON8_BASIC_(pll0Freq, pll1Freq, pll2Freq)
#define | IFXSCU_CFG_CCUCON8 IFXSCU_CFG_CCUCON8_BASIC(IFXSCU_CFG_PLL_FREQ, IFXSCU_CFG_PLL1_FREQ, IFXSCU_CFG_PLL2_FREQ)
#define | IFXSCU_CFG_CCUCON9_MASK
#define | IFXSCU_CFG_CCUCON9_BASIC_(pll0Freq, pll1Freq, pll2Freq)
#define | IFXSCU_CFG_CCUCON9_BASIC(pll0Freq, pll1Freq, pll2Freq) IFXSCU_CFG_CCUCON9_BASIC_(pll0Freq, pll1Freq, pll2Freq)
#define | IFXSCU_CFG_CCUCON9 IFXSCU_CFG_CCUCON9_BASIC(IFXSCU_CFG_PLL_FREQ, IFXSCU_CFG_PLL1_FREQ, IFXSCU_CFG_PLL2_FREQ)
#define | IFXSCU_CFG_CLK_DISTRIBUTION
#define | IFXSCU_CFG_FLASH_WAITSTATE_MSK 0
Macros to configure FLASH.FCON registers. More...
#define | IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC_(pll0Freq) 0
#define | IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC(pll0Freq) IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC_(pll0Freq)
#define | IFXSCU_CFG_FLASH_WAITSTATE_VAL IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC(IFXSCU_CFG_PLL_FREQ)
#define | IFXSCU_CFG_FLASH_WAITSTATE
#define | IFXSCULBIST_CFG_SIGNATURE_A (0xF936A7A8U)
#define | IFXSCULBIST_CFG_SIGNATURE_B (0xCB6D495EU)
#define | IFXSCULBIST_CFG_PATTERN_A (0xC0U)
#define | IFXSCULBIST_CFG_PATTERN_B (0x780U)
#define | IFXSCULBIST_CFG_SCANCHAINLENGTH (0x4FU)
#define | IFXSCULBIST_CFG_SEED (0x07U)

Enumerations

enum IfxScu_CCUCON0_CLKSEL {
IfxScu_CCUCON0_CLKSEL_fBack = 0,
IfxScu_CCUCON0_CLKSEL_fPll = 1
}
enum IfxScu_WDTCON1_IR {
IfxScu_WDTCON1_IR_divBy16384 = 0,
IfxScu_WDTCON1_IR_divBy256 = 1,
IfxScu_WDTCON1_IR_divBy64 = 2
}
enum IfxScu_PMCSR_REQSLP {
IfxScu_PMCSR_REQSLP_Run = 0U,
IfxScu_PMCSR_REQSLP_Idle = 1U,
IfxScu_PMCSR_REQSLP_Sleep = 2U,
IfxScu_PMCSR_REQSLP_Stby = 3U
}

Detailed Description

SCU on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxScu_cfg.h.

Macro Definition Documentation

◆ IFX_CFG_SCU_EXT_CLOCK

#define IFX_CFG_SCU_EXT_CLOCK 0

Default External Crystal input.

Definition at line 91 of file IfxScu_cfg.h.

◆ IFX_CFG_SCU_PLL1_FREQUENCY

#define IFX_CFG_SCU_PLL1_FREQUENCY 320000000

Default PER PLL1 frequency.

Definition at line 73 of file IfxScu_cfg.h.

◆ IFX_CFG_SCU_PLL2_FREQUENCY

#define IFX_CFG_SCU_PLL2_FREQUENCY 200000000

Default PER PLL2 frequency.

Definition at line 77 of file IfxScu_cfg.h.

◆ IFX_CFG_SCU_PLL_FREQUENCY

#define IFX_CFG_SCU_PLL_FREQUENCY 300000000

Default PLL frequency.

Definition at line 69 of file IfxScu_cfg.h.

◆ IFX_CFG_SCU_SYSCLK_FREQUENCY

#define IFX_CFG_SCU_SYSCLK_FREQUENCY 20000000

Default External SysClk pin frequency.

Definition at line 65 of file IfxScu_cfg.h.

Referenced by IfxScuCcu_getOscFrequency().

◆ IFX_CFG_SCU_XTAL_FREQUENCY

#define IFX_CFG_SCU_XTAL_FREQUENCY 20000000

Default External oscillator frequency.

Definition at line 59 of file IfxScu_cfg.h.

Referenced by IfxScuCcu_getOsc0Frequency(), and IfxScuCcu_getOscFrequency().

◆ IFXSCU_CFG_ASCLINFDIV_160MHZ_200MHZ

#define IFXSCU_CFG_ASCLINFDIV_160MHZ_200MHZ (1)

Definition at line 1093 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_ASCLINFDIV_320MHZ_200MHZ

#define IFXSCU_CFG_ASCLINFDIV_320MHZ_200MHZ (1)

Definition at line 1025 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_ASCLINSDIV_160MHZ_200MHZ

#define IFXSCU_CFG_ASCLINSDIV_160MHZ_200MHZ (1)

Definition at line 1099 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_ASCLINSDIV_320MHZ_200MHZ

#define IFXSCU_CFG_ASCLINSDIV_320MHZ_200MHZ (2)

Definition at line 1031 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_BBBDIV_133MHZ

#define IFXSCU_CFG_BBBDIV_133MHZ (2)

Definition at line 679 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_BBBDIV_200MHZ

#define IFXSCU_CFG_BBBDIV_200MHZ (2)

Definition at line 759 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_BBBDIV_240MHZ

#define IFXSCU_CFG_BBBDIV_240MHZ (2)

Definition at line 839 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_BBBDIV_300MHZ

#define IFXSCU_CFG_BBBDIV_300MHZ (2)

Definition at line 919 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_BBBDIV_80MHZ

#define IFXSCU_CFG_BBBDIV_80MHZ (2)

Definition at line 599 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON0

#define IFXSCU_CFG_CCUCON0 IFXSCU_CFG_CCUCON0_BASIC(IFXSCU_CFG_PLL_FREQ, IFXSCU_CFG_PLL1_FREQ, IFXSCU_CFG_PLL2_FREQ)

Definition at line 1135 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON0_BASIC

#define IFXSCU_CFG_CCUCON0_BASIC | ( | pll0Freq,
 |  | pll1Freq,
 |  | pll2Freq
 | ) | IFXSCU_CFG_CCUCON0_BASIC_(pll0Freq, pll1Freq, pll2Freq)

Definition at line 1133 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON0_BASIC_

#define IFXSCU_CFG_CCUCON0_BASIC_ | ( | pll0Freq,
 |  | pll1Freq,
 |  | pll2Freq
 | ) |
Value:
(uint32)( \
(IFXSCU_CFG_STMDIV_##pll0Freq << IFX_SCU_CCUCON0_STMDIV_OFF) | \
(IFXSCU_CFG_GTMDIV_##pll0Freq << IFX_SCU_CCUCON0_GTMDIV_OFF) | \
(IFXSCU_CFG_SRIDIV_##pll0Freq << IFX_SCU_CCUCON0_SRIDIV_OFF) | \
(IFXSCU_CFG_SPBDIV_##pll0Freq << IFX_SCU_CCUCON0_SPBDIV_OFF) | \
(IFXSCU_CFG_BBBDIV_##pll0Freq << IFX_SCU_CCUCON0_BBBDIV_OFF) | \
(IFXSCU_CFG_FSIDIV_##pll0Freq << IFX_SCU_CCUCON0_FSIDIV_OFF) | \
(IFXSCU_CFG_FSI2DIV_##pll0Freq << IFX_SCU_CCUCON0_FSI2DIV_OFF))
uint32
unsigned long uint32
Definition: Platform_Types.h:116

Definition at line 1123 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON0_MASK

#define IFXSCU_CFG_CCUCON0_MASK
Value:
(uint32)( \
(IFX_SCU_CCUCON0_STMDIV_MSK << IFX_SCU_CCUCON0_STMDIV_OFF) | \
(IFX_SCU_CCUCON0_GTMDIV_MSK << IFX_SCU_CCUCON0_GTMDIV_OFF) | \
(IFX_SCU_CCUCON0_SRIDIV_MSK << IFX_SCU_CCUCON0_SRIDIV_OFF) | \
(IFX_SCU_CCUCON0_SPBDIV_MSK << IFX_SCU_CCUCON0_SPBDIV_OFF) | \
(IFX_SCU_CCUCON0_BBBDIV_MSK << IFX_SCU_CCUCON0_BBBDIV_OFF) | \
(IFX_SCU_CCUCON0_FSIDIV_MSK << IFX_SCU_CCUCON0_FSIDIV_OFF) | \
(IFX_SCU_CCUCON0_FSI2DIV_MSK << IFX_SCU_CCUCON0_FSI2DIV_OFF))
uint32
unsigned long uint32
Definition: Platform_Types.h:116

Definition at line 1113 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON1

#define IFXSCU_CFG_CCUCON1 IFXSCU_CFG_CCUCON1_BASIC(IFXSCU_CFG_PLL_FREQ, IFXSCU_CFG_PLL1_FREQ, IFXSCU_CFG_PLL2_FREQ)

Definition at line 1162 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON1_BASIC

#define IFXSCU_CFG_CCUCON1_BASIC | ( | pll0Freq,
 |  | pll1Freq,
 |  | pll2Freq
 | ) | IFXSCU_CFG_CCUCON1_BASIC_(pll0Freq, pll1Freq, pll2Freq)

Definition at line 1160 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON1_BASIC_

#define IFXSCU_CFG_CCUCON1_BASIC_ | ( | pll0Freq,
 |  | pll1Freq,
 |  | pll2Freq
 | ) |
Value:
(uint32)( \
(IFXSCU_CFG_MCANDIV_##pll1Freq##_##pll2Freq << IFX_SCU_CCUCON1_MCANDIV_OFF) | \
(IFXSCU_CFG_CLKSELMCAN_##pll1Freq##_##pll2Freq << IFX_SCU_CCUCON1_CLKSELMCAN_OFF) | \
(IFXSCU_CFG_PLL1DIVDIS_##pll1Freq##_##pll2Freq << IFX_SCU_CCUCON1_PLL1DIVDIS_OFF) | \
(IFXSCU_CFG_I2CDIV_##pll1Freq##_##pll2Freq << IFX_SCU_CCUCON1_I2CDIV_OFF) | \
(IFXSCU_CFG_MSCDIV_##pll1Freq##_##pll2Freq << IFX_SCU_CCUCON1_MSCDIV_OFF) | \
(IFXSCU_CFG_CLKSELMSC_##pll1Freq##_##pll2Freq << IFX_SCU_CCUCON1_CLKSELMSC_OFF) | \
(IFXSCU_CFG_QSPIDIV_##pll1Freq##_##pll2Freq << IFX_SCU_CCUCON1_QSPIDIV_OFF) | \
(IFXSCU_CFG_CLKSELQSPI_##pll1Freq##_##pll2Freq << IFX_SCU_CCUCON1_CLKSELQSPI_OFF))
uint32
unsigned long uint32
Definition: Platform_Types.h:116

Definition at line 1149 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON1_MASK

#define IFXSCU_CFG_CCUCON1_MASK
Value:
(uint32)( \
(IFX_SCU_CCUCON1_MCANDIV_MSK << IFX_SCU_CCUCON1_MCANDIV_OFF) | \
(IFX_SCU_CCUCON1_CLKSELMCAN_MSK << IFX_SCU_CCUCON1_CLKSELMCAN_OFF) | \
(IFX_SCU_CCUCON1_PLL1DIVDIS_MSK << IFX_SCU_CCUCON1_PLL1DIVDIS_OFF) | \
(IFX_SCU_CCUCON1_I2CDIV_MSK << IFX_SCU_CCUCON1_I2CDIV_OFF) | \
(IFX_SCU_CCUCON1_MSCDIV_MSK << IFX_SCU_CCUCON1_MSCDIV_OFF) | \
(IFX_SCU_CCUCON1_CLKSELMSC_MSK << IFX_SCU_CCUCON1_CLKSELMSC_OFF) | \
(IFX_SCU_CCUCON1_QSPIDIV_MSK << IFX_SCU_CCUCON1_QSPIDIV_OFF) | \
(IFX_SCU_CCUCON1_CLKSELQSPI_MSK << IFX_SCU_CCUCON1_CLKSELQSPI_OFF))
uint32
unsigned long uint32
Definition: Platform_Types.h:116

Definition at line 1138 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON2

#define IFXSCU_CFG_CCUCON2 IFXSCU_CFG_CCUCON2_BASIC(IFXSCU_CFG_PLL_FREQ, IFXSCU_CFG_PLL1_FREQ, IFXSCU_CFG_PLL2_FREQ)

Definition at line 1179 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON2_BASIC

#define IFXSCU_CFG_CCUCON2_BASIC | ( | pll0Freq,
 |  | pll1Freq,
 |  | pll2Freq
 | ) | IFXSCU_CFG_CCUCON2_BASIC_(pll0Freq, pll1Freq, pll2Freq)

Definition at line 1177 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON2_BASIC_

#define IFXSCU_CFG_CCUCON2_BASIC_ | ( | pll0Freq,
 |  | pll1Freq,
 |  | pll2Freq
 | ) |
Value:
(uint32)( \
(IFXSCU_CFG_ASCLINFDIV_##pll1Freq##_##pll2Freq << IFX_SCU_CCUCON2_ASCLINFDIV_OFF) | \
(IFXSCU_CFG_ASCLINSDIV_##pll1Freq##_##pll2Freq << IFX_SCU_CCUCON2_ASCLINSDIV_OFF) | \
(IFXSCU_CFG_CLKSELASCLINS_##pll1Freq##_##pll2Freq << IFX_SCU_CCUCON2_CLKSELASCLINS_OFF))
uint32
unsigned long uint32
Definition: Platform_Types.h:116

Definition at line 1171 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON2_MASK

#define IFXSCU_CFG_CCUCON2_MASK
Value:
(uint32)( \
(IFX_SCU_CCUCON2_ASCLINFDIV_MSK << IFX_SCU_CCUCON2_ASCLINFDIV_OFF) | \
(IFX_SCU_CCUCON2_ASCLINSDIV_MSK << IFX_SCU_CCUCON2_ASCLINSDIV_OFF) | \
(IFX_SCU_CCUCON2_CLKSELASCLINS_MSK << IFX_SCU_CCUCON2_CLKSELASCLINS_OFF))
uint32
unsigned long uint32
Definition: Platform_Types.h:116

Definition at line 1165 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON5

#define IFXSCU_CFG_CCUCON5 IFXSCU_CFG_CCUCON5_BASIC(IFXSCU_CFG_PLL_FREQ, IFXSCU_CFG_PLL1_FREQ, IFXSCU_CFG_PLL2_FREQ)

Definition at line 1194 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON5_BASIC

#define IFXSCU_CFG_CCUCON5_BASIC | ( | pll0Freq,
 |  | pll1Freq,
 |  | pll2Freq
 | ) | IFXSCU_CFG_CCUCON5_BASIC_(pll0Freq, pll1Freq, pll2Freq)

Definition at line 1192 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON5_BASIC_

#define IFXSCU_CFG_CCUCON5_BASIC_ | ( | pll0Freq,
 |  | pll1Freq,
 |  | pll2Freq
 | ) |
Value:
(uint32)( \
(IFXSCU_CFG_GETHDIV_##pll0Freq << IFX_SCU_CCUCON5_GETHDIV_OFF) | \
(IFXSCU_CFG_MCANHDIV_##pll0Freq << IFX_SCU_CCUCON5_MCANHDIV_OFF))
uint32
unsigned long uint32
Definition: Platform_Types.h:116

Definition at line 1187 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON5_MASK

#define IFXSCU_CFG_CCUCON5_MASK
Value:
(uint32)( \
(IFX_SCU_CCUCON5_GETHDIV_MSK << IFX_SCU_CCUCON5_GETHDIV_OFF) | \
(IFX_SCU_CCUCON5_MCANHDIV_MSK << IFX_SCU_CCUCON5_MCANHDIV_OFF))
uint32
unsigned long uint32
Definition: Platform_Types.h:116

Definition at line 1182 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON6

#define IFXSCU_CFG_CCUCON6 IFXSCU_CFG_CCUCON6_BASIC(IFXSCU_CFG_PLL_FREQ, IFXSCU_CFG_PLL1_FREQ, IFXSCU_CFG_PLL2_FREQ)

Definition at line 1207 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON6_BASIC

#define IFXSCU_CFG_CCUCON6_BASIC | ( | pll0Freq,
 |  | pll1Freq,
 |  | pll2Freq
 | ) | IFXSCU_CFG_CCUCON6_BASIC_(pll0Freq, pll1Freq, pll2Freq)

Definition at line 1205 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON6_BASIC_

#define IFXSCU_CFG_CCUCON6_BASIC_ | ( | pll0Freq,
 |  | pll1Freq,
 |  | pll2Freq
 | ) |
Value:
(uint32)( \
(IFXSCU_CFG_CPU0DIV_##pll0Freq << IFX_SCU_CCUCON6_CPU0DIV_OFF))
uint32
unsigned long uint32
Definition: Platform_Types.h:116

Definition at line 1201 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON6_MASK

#define IFXSCU_CFG_CCUCON6_MASK
Value:
(uint32)( \
(IFX_SCU_CCUCON6_CPU0DIV_MSK << IFX_SCU_CCUCON6_CPU0DIV_OFF))
uint32
unsigned long uint32
Definition: Platform_Types.h:116

Definition at line 1197 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON7

#define IFXSCU_CFG_CCUCON7 IFXSCU_CFG_CCUCON7_BASIC(IFXSCU_CFG_PLL_FREQ, IFXSCU_CFG_PLL1_FREQ, IFXSCU_CFG_PLL2_FREQ)

Definition at line 1220 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON7_BASIC

#define IFXSCU_CFG_CCUCON7_BASIC | ( | pll0Freq,
 |  | pll1Freq,
 |  | pll2Freq
 | ) | IFXSCU_CFG_CCUCON7_BASIC_(pll0Freq, pll1Freq, pll2Freq)

Definition at line 1218 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON7_BASIC_

#define IFXSCU_CFG_CCUCON7_BASIC_ | ( | pll0Freq,
 |  | pll1Freq,
 |  | pll2Freq
 | ) |
Value:
(uint32)( \
(IFXSCU_CFG_CPU1DIV_##pll0Freq << IFX_SCU_CCUCON7_CPU1DIV_OFF))
uint32
unsigned long uint32
Definition: Platform_Types.h:116

Definition at line 1214 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON7_MASK

#define IFXSCU_CFG_CCUCON7_MASK
Value:
(uint32)( \
(IFX_SCU_CCUCON7_CPU1DIV_MSK << IFX_SCU_CCUCON7_CPU1DIV_OFF))
uint32
unsigned long uint32
Definition: Platform_Types.h:116

Definition at line 1210 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON8

#define IFXSCU_CFG_CCUCON8 IFXSCU_CFG_CCUCON8_BASIC(IFXSCU_CFG_PLL_FREQ, IFXSCU_CFG_PLL1_FREQ, IFXSCU_CFG_PLL2_FREQ)

Definition at line 1233 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON8_BASIC

#define IFXSCU_CFG_CCUCON8_BASIC | ( | pll0Freq,
 |  | pll1Freq,
 |  | pll2Freq
 | ) | IFXSCU_CFG_CCUCON8_BASIC_(pll0Freq, pll1Freq, pll2Freq)

Definition at line 1231 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON8_BASIC_

#define IFXSCU_CFG_CCUCON8_BASIC_ | ( | pll0Freq,
 |  | pll1Freq,
 |  | pll2Freq
 | ) |
Value:
(uint32)( \
(IFXSCU_CFG_CPU2DIV_##pll0Freq << IFX_SCU_CCUCON8_CPU2DIV_OFF))
uint32
unsigned long uint32
Definition: Platform_Types.h:116

Definition at line 1227 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON8_MASK

#define IFXSCU_CFG_CCUCON8_MASK
Value:
(uint32)( \
(IFX_SCU_CCUCON8_CPU2DIV_MSK << IFX_SCU_CCUCON8_CPU2DIV_OFF))
uint32
unsigned long uint32
Definition: Platform_Types.h:116

Definition at line 1223 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON9

#define IFXSCU_CFG_CCUCON9 IFXSCU_CFG_CCUCON9_BASIC(IFXSCU_CFG_PLL_FREQ, IFXSCU_CFG_PLL1_FREQ, IFXSCU_CFG_PLL2_FREQ)

Definition at line 1246 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON9_BASIC

#define IFXSCU_CFG_CCUCON9_BASIC | ( | pll0Freq,
 |  | pll1Freq,
 |  | pll2Freq
 | ) | IFXSCU_CFG_CCUCON9_BASIC_(pll0Freq, pll1Freq, pll2Freq)

Definition at line 1244 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON9_BASIC_

#define IFXSCU_CFG_CCUCON9_BASIC_ | ( | pll0Freq,
 |  | pll1Freq,
 |  | pll2Freq
 | ) |
Value:
(uint32)( \
(IFXSCU_CFG_CPU3DIV_##pll0Freq << IFX_SCU_CCUCON9_CPU3DIV_OFF))
uint32
unsigned long uint32
Definition: Platform_Types.h:116

Definition at line 1240 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON9_MASK

#define IFXSCU_CFG_CCUCON9_MASK
Value:
(uint32)( \
(IFX_SCU_CCUCON9_CPU3DIV_MSK << IFX_SCU_CCUCON9_CPU3DIV_OFF))
uint32
unsigned long uint32
Definition: Platform_Types.h:116

Definition at line 1236 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CLK_DISTRIBUTION

#define IFXSCU_CFG_CLK_DISTRIBUTION
Value:
{ \
/* { uint32 value, uint32 mask }*/ \
{IFXSCU_CFG_CCUCON0, IFXSCU_CFG_CCUCON0_MASK}, /*IfxScuCcu_CcuconRegConfig CCUCON0;*/ \
{IFXSCU_CFG_CCUCON1, IFXSCU_CFG_CCUCON1_MASK}, /*IfxScuCcu_CcuconRegConfig CCUCON1;*/ \
{IFXSCU_CFG_CCUCON2, IFXSCU_CFG_CCUCON2_MASK}, /*IfxScuCcu_CcuconRegConfig CCUCON2;*/ \
{IFXSCU_CFG_CCUCON5, IFXSCU_CFG_CCUCON5_MASK}, /*IfxScuCcu_CcuconRegConfig CCUCON5;*/ \
{IFXSCU_CFG_CCUCON6, IFXSCU_CFG_CCUCON6_MASK}, /*IfxScuCcu_CcuconRegConfig CCUCON6;*/ \
{IFXSCU_CFG_CCUCON7, IFXSCU_CFG_CCUCON7_MASK}, /*IfxScuCcu_CcuconRegConfig CCUCON7;*/ \
{IFXSCU_CFG_CCUCON8, IFXSCU_CFG_CCUCON8_MASK}, /*IfxScuCcu_CcuconRegConfig CCUCON8;*/ \
{IFXSCU_CFG_CCUCON9, IFXSCU_CFG_CCUCON9_MASK}, /*IfxScuCcu_CcuconRegConfig CCUCON9;*/ \
}
IFXSCU_CFG_CCUCON0_MASK
#define IFXSCU_CFG_CCUCON0_MASK
Definition: IfxScu_cfg.h:1113
IFXSCU_CFG_CCUCON6_MASK
#define IFXSCU_CFG_CCUCON6_MASK
Definition: IfxScu_cfg.h:1197
IFXSCU_CFG_CCUCON2_MASK
#define IFXSCU_CFG_CCUCON2_MASK
Definition: IfxScu_cfg.h:1165
IFXSCU_CFG_CCUCON5
#define IFXSCU_CFG_CCUCON5
Definition: IfxScu_cfg.h:1194
IFXSCU_CFG_CCUCON1
#define IFXSCU_CFG_CCUCON1
Definition: IfxScu_cfg.h:1162
IFXSCU_CFG_CCUCON7_MASK
#define IFXSCU_CFG_CCUCON7_MASK
Definition: IfxScu_cfg.h:1210
IFXSCU_CFG_CCUCON5_MASK
#define IFXSCU_CFG_CCUCON5_MASK
Definition: IfxScu_cfg.h:1182
IFXSCU_CFG_CCUCON9_MASK
#define IFXSCU_CFG_CCUCON9_MASK
Definition: IfxScu_cfg.h:1236
IFXSCU_CFG_CCUCON8_MASK
#define IFXSCU_CFG_CCUCON8_MASK
Definition: IfxScu_cfg.h:1223
IFXSCU_CFG_CCUCON6
#define IFXSCU_CFG_CCUCON6
Definition: IfxScu_cfg.h:1207
IFXSCU_CFG_CCUCON8
#define IFXSCU_CFG_CCUCON8
Definition: IfxScu_cfg.h:1233
IFXSCU_CFG_CCUCON2
#define IFXSCU_CFG_CCUCON2
Definition: IfxScu_cfg.h:1179
IFXSCU_CFG_CCUCON7
#define IFXSCU_CFG_CCUCON7
Definition: IfxScu_cfg.h:1220
IFXSCU_CFG_CCUCON9
#define IFXSCU_CFG_CCUCON9
Definition: IfxScu_cfg.h:1246
IFXSCU_CFG_CCUCON0
#define IFXSCU_CFG_CCUCON0
Definition: IfxScu_cfg.h:1135
IFXSCU_CFG_CCUCON1_MASK
#define IFXSCU_CFG_CCUCON1_MASK
Definition: IfxScu_cfg.h:1138

Definition at line 1250 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CLKSELASCLINS_160MHZ_200MHZ

#define IFXSCU_CFG_CLKSELASCLINS_160MHZ_200MHZ (1)

Definition at line 1105 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CLKSELASCLINS_320MHZ_200MHZ

#define IFXSCU_CFG_CLKSELASCLINS_320MHZ_200MHZ (1)

Definition at line 1037 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CLKSELMCAN_160MHZ_200MHZ

#define IFXSCU_CFG_CLKSELMCAN_160MHZ_200MHZ (1)

Definition at line 1051 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CLKSELMCAN_320MHZ_200MHZ

#define IFXSCU_CFG_CLKSELMCAN_320MHZ_200MHZ (1)

Definition at line 983 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CLKSELMSC_160MHZ_200MHZ

#define IFXSCU_CFG_CLKSELMSC_160MHZ_200MHZ (1)

Definition at line 1075 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CLKSELMSC_320MHZ_200MHZ

#define IFXSCU_CFG_CLKSELMSC_320MHZ_200MHZ (1)

Definition at line 1007 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CLKSELQSPI_160MHZ_200MHZ

#define IFXSCU_CFG_CLKSELQSPI_160MHZ_200MHZ (2)

Definition at line 1087 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CLKSELQSPI_320MHZ_200MHZ

#define IFXSCU_CFG_CLKSELQSPI_320MHZ_200MHZ (2)

Definition at line 1019 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CPU0DIV_133MHZ

#define IFXSCU_CFG_CPU0DIV_133MHZ (0)

Definition at line 709 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CPU0DIV_200MHZ

#define IFXSCU_CFG_CPU0DIV_200MHZ (0)

Definition at line 789 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CPU0DIV_240MHZ

#define IFXSCU_CFG_CPU0DIV_240MHZ (0)

Definition at line 869 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CPU0DIV_300MHZ

#define IFXSCU_CFG_CPU0DIV_300MHZ (0)

Definition at line 949 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CPU0DIV_80MHZ

#define IFXSCU_CFG_CPU0DIV_80MHZ (0)

Definition at line 629 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CPU1DIV_133MHZ

#define IFXSCU_CFG_CPU1DIV_133MHZ (0)

Definition at line 715 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CPU1DIV_200MHZ

#define IFXSCU_CFG_CPU1DIV_200MHZ (0)

Definition at line 795 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CPU1DIV_240MHZ

#define IFXSCU_CFG_CPU1DIV_240MHZ (0)

Definition at line 875 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CPU1DIV_300MHZ

#define IFXSCU_CFG_CPU1DIV_300MHZ (0)

Definition at line 955 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CPU1DIV_80MHZ

#define IFXSCU_CFG_CPU1DIV_80MHZ (0)

Definition at line 635 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CPU2DIV_133MHZ

#define IFXSCU_CFG_CPU2DIV_133MHZ (0)

Definition at line 721 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CPU2DIV_200MHZ

#define IFXSCU_CFG_CPU2DIV_200MHZ (0)

Definition at line 801 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CPU2DIV_240MHZ

#define IFXSCU_CFG_CPU2DIV_240MHZ (0)

Definition at line 881 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CPU2DIV_300MHZ

#define IFXSCU_CFG_CPU2DIV_300MHZ (0)

Definition at line 961 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CPU2DIV_80MHZ

#define IFXSCU_CFG_CPU2DIV_80MHZ (0)

Definition at line 641 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CPU3DIV_133MHZ

#define IFXSCU_CFG_CPU3DIV_133MHZ (0)

Definition at line 727 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CPU3DIV_200MHZ

#define IFXSCU_CFG_CPU3DIV_200MHZ (0)

Definition at line 807 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CPU3DIV_240MHZ

#define IFXSCU_CFG_CPU3DIV_240MHZ (0)

Definition at line 887 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CPU3DIV_300MHZ

#define IFXSCU_CFG_CPU3DIV_300MHZ (0)

Definition at line 967 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CPU3DIV_80MHZ

#define IFXSCU_CFG_CPU3DIV_80MHZ (0)

Definition at line 647 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_WAITSTATE

#define IFXSCU_CFG_FLASH_WAITSTATE
Value:
/* { uint32 value, uint32 mask }*/\
{IFXSCU_CFG_FLASH_WAITSTATE_VAL, IFXSCU_CFG_FLASH_WAITSTATE_MSK}
IFXSCU_CFG_FLASH_WAITSTATE_VAL
#define IFXSCU_CFG_FLASH_WAITSTATE_VAL
Definition: IfxScu_cfg.h:1270
IFXSCU_CFG_FLASH_WAITSTATE_MSK
#define IFXSCU_CFG_FLASH_WAITSTATE_MSK
Macros to configure FLASH.FCON registers.
Definition: IfxScu_cfg.h:1264

Definition at line 1273 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_WAITSTATE_MSK

#define IFXSCU_CFG_FLASH_WAITSTATE_MSK 0

Macros to configure FLASH.FCON registers.

Definition at line 1264 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_WAITSTATE_VAL

#define IFXSCU_CFG_FLASH_WAITSTATE_VAL IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC(IFXSCU_CFG_PLL_FREQ)

Definition at line 1270 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC

#define IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC ( pll0Freq ) IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC_(pll0Freq)

Definition at line 1268 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC_

#define IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC_ ( pll0Freq ) 0

Definition at line 1266 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FSI2DIV_133MHZ

#define IFXSCU_CFG_FSI2DIV_133MHZ (IFXSCU_CFG_SRIDIV_133MHZ * 1)

Definition at line 691 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FSI2DIV_200MHZ

#define IFXSCU_CFG_FSI2DIV_200MHZ (IFXSCU_CFG_SRIDIV_200MHZ * 1)

Definition at line 771 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FSI2DIV_240MHZ

#define IFXSCU_CFG_FSI2DIV_240MHZ (IFXSCU_CFG_SRIDIV_240MHZ * 1)

Definition at line 851 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FSI2DIV_300MHZ

#define IFXSCU_CFG_FSI2DIV_300MHZ (IFXSCU_CFG_SRIDIV_300MHZ * 1)

Definition at line 931 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FSI2DIV_80MHZ

#define IFXSCU_CFG_FSI2DIV_80MHZ (IFXSCU_CFG_SRIDIV_80MHZ * 1)

Definition at line 611 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FSIDIV_133MHZ

#define IFXSCU_CFG_FSIDIV_133MHZ (IFXSCU_CFG_SRIDIV_133MHZ * 2)

Definition at line 685 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FSIDIV_200MHZ

#define IFXSCU_CFG_FSIDIV_200MHZ (IFXSCU_CFG_SRIDIV_200MHZ * 2)

Definition at line 765 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FSIDIV_240MHZ

#define IFXSCU_CFG_FSIDIV_240MHZ (IFXSCU_CFG_SRIDIV_240MHZ * 3)

Definition at line 845 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FSIDIV_300MHZ

#define IFXSCU_CFG_FSIDIV_300MHZ (IFXSCU_CFG_SRIDIV_300MHZ * 3)

Definition at line 925 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FSIDIV_80MHZ

#define IFXSCU_CFG_FSIDIV_80MHZ (IFXSCU_CFG_SRIDIV_80MHZ * 1)

Definition at line 605 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_GETHDIV_133MHZ

#define IFXSCU_CFG_GETHDIV_133MHZ (1)

Definition at line 697 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_GETHDIV_200MHZ

#define IFXSCU_CFG_GETHDIV_200MHZ (1)

Definition at line 777 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_GETHDIV_240MHZ

#define IFXSCU_CFG_GETHDIV_240MHZ (2)

Definition at line 857 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_GETHDIV_300MHZ

#define IFXSCU_CFG_GETHDIV_300MHZ (2)

Definition at line 937 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_GETHDIV_80MHZ

#define IFXSCU_CFG_GETHDIV_80MHZ (1)

Definition at line 617 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_GTMDIV_133MHZ

#define IFXSCU_CFG_GTMDIV_133MHZ (1)

Definition at line 661 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_GTMDIV_200MHZ

#define IFXSCU_CFG_GTMDIV_200MHZ (1)

Definition at line 741 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_GTMDIV_240MHZ

#define IFXSCU_CFG_GTMDIV_240MHZ (1)

Definition at line 821 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_GTMDIV_300MHZ

#define IFXSCU_CFG_GTMDIV_300MHZ (1)

Definition at line 901 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_GTMDIV_80MHZ

#define IFXSCU_CFG_GTMDIV_80MHZ (1)

Definition at line 581 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_I2CDIV_160MHZ_200MHZ

#define IFXSCU_CFG_I2CDIV_160MHZ_200MHZ (2)

Definition at line 1063 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_I2CDIV_320MHZ_200MHZ

#define IFXSCU_CFG_I2CDIV_320MHZ_200MHZ (2)

Definition at line 995 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_MCANDIV_160MHZ_200MHZ

#define IFXSCU_CFG_MCANDIV_160MHZ_200MHZ (1)

Definition at line 1045 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_MCANDIV_320MHZ_200MHZ

#define IFXSCU_CFG_MCANDIV_320MHZ_200MHZ (2)

Definition at line 977 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_MCANHDIV_133MHZ

#define IFXSCU_CFG_MCANHDIV_133MHZ (2)

Definition at line 703 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_MCANHDIV_200MHZ

#define IFXSCU_CFG_MCANHDIV_200MHZ (2)

Definition at line 783 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_MCANHDIV_240MHZ

#define IFXSCU_CFG_MCANHDIV_240MHZ (3)

Definition at line 863 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_MCANHDIV_300MHZ

#define IFXSCU_CFG_MCANHDIV_300MHZ (3)

Definition at line 943 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_MCANHDIV_80MHZ

#define IFXSCU_CFG_MCANHDIV_80MHZ (2)

Definition at line 623 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_MSCDIV_160MHZ_200MHZ

#define IFXSCU_CFG_MSCDIV_160MHZ_200MHZ (1)

Definition at line 1069 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_MSCDIV_320MHZ_200MHZ

#define IFXSCU_CFG_MSCDIV_320MHZ_200MHZ (1)

Definition at line 1001 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PER_PLL_16MHZ_160MHZ_200MHZ

#define IFXSCU_CFG_PER_PLL_16MHZ_160MHZ_200MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, uint8 k3Initial, uint8 k3DividerBypass }*/\
{(1 - 1), (40 - 1), (4 - 1), (2 - 1), 0}

Macro for Initial Pll step, for profile with 16MHz Crystal and 160/200MHz target (fDCO= 640)

Definition at line 472 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PER_PLL_16MHZ_320MHZ_200MHZ

#define IFXSCU_CFG_PER_PLL_16MHZ_320MHZ_200MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, uint8 k3Initial, uint8 k3DividerBypass }*/\
{(1 - 1), (40 - 1), (2 - 1), (2 - 1), 0}

Macro for Initial Pll step, for profile with 16MHz Crystal and 320/200MHz target (fDCO= 640)

Definition at line 463 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PER_PLL_20MHZ_160MHZ_200MHZ

#define IFXSCU_CFG_PER_PLL_20MHZ_160MHZ_200MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, uint8 k3Initial, uint8 k3DividerBypass }*/\
{(1 - 1), (32 - 1), (4 - 1), (2 - 1), 0}

Macro for Initial Pll step, for profile with 20MHz Crystal and 160/200MHz target (fDCO= 640)

Definition at line 493 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PER_PLL_20MHZ_320MHZ_200MHZ

#define IFXSCU_CFG_PER_PLL_20MHZ_320MHZ_200MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, uint8 k3Initial, uint8 k3DividerBypass }*/\
{(1 - 1), (32 - 1), (2 - 1), (2 - 1), 0}

Macro for Initial Pll step, for profile with 20MHz Crystal and 320/200MHz target (fDCO= 640)

Definition at line 484 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PER_PLL_25MHZ_160MHZ_200MHZ

#define IFXSCU_CFG_PER_PLL_25MHZ_160MHZ_200MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, uint8 k3Initial, uint8 k3DividerBypass }*/\
{(1 - 1), (32 - 1), (5 - 1), (2 - 1), 1}

Macro for Initial Pll step, for profile with 25MHz Crystal and 160/200MHz target (fDCO= 800)

Definition at line 505 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PER_PLL_40MHZ_160MHZ_200MHZ

#define IFXSCU_CFG_PER_PLL_40MHZ_160MHZ_200MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, uint8 k3Initial, uint8 k3DividerBypass }*/\
{(1 - 1), (16 - 1), (4 - 1), (2 - 1), 0}

Macro for Initial Pll step, for profile with 40MHz Crystal and 160/200MHz target (fDCO= 640)

Definition at line 526 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PER_PLL_40MHZ_320MHZ_200MHZ

#define IFXSCU_CFG_PER_PLL_40MHZ_320MHZ_200MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, uint8 k3Initial, uint8 k3DividerBypass }*/\
{(1 - 1), (16 - 1), (2 - 1), (2 - 1), 0}

Macro for Initial Pll step, for profile with 40MHz Crystal and 320/200MHz target (fDCO= 640)

Definition at line 517 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PER_PLL_INITIAL_STEP

#define IFXSCU_CFG_PER_PLL_INITIAL_STEP IFXSCU_CFG_PER_PLL_INITIAL_STEP_BASIC(IFXSCU_CFG_XTAL_FREQ, IFXSCU_CFG_PLL1_FREQ, IFXSCU_CFG_PLL2_FREQ)

Definition at line 545 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PER_PLL_INITIAL_STEP_BASIC

#define IFXSCU_CFG_PER_PLL_INITIAL_STEP_BASIC | ( | xtalFreq,
 |  | pll1Freq,
 |  | pll2Freq
 | ) | IFXSCU_CFG_PER_PLL_INITIAL_STEP_BASIC_(xtalFreq, pll1Freq, pll2Freq)

Definition at line 544 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PER_PLL_INITIAL_STEP_BASIC_

#define IFXSCU_CFG_PER_PLL_INITIAL_STEP_BASIC_ | ( | xtalFreq,
 |  | pll1Freq,
 |  | pll2Freq
 | ) | IFXSCU_CFG_PER_PLL_##xtalFreq##_##pll1Freq##_##pll2Freq

Definition at line 543 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL1_FREQ

#define IFXSCU_CFG_PLL1_FREQ 320MHZ

Definition at line 131 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL1DIVDIS_160MHZ_200MHZ

#define IFXSCU_CFG_PLL1DIVDIS_160MHZ_200MHZ (0)

Definition at line 1057 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL1DIVDIS_320MHZ_200MHZ

#define IFXSCU_CFG_PLL1DIVDIS_320MHZ_200MHZ (0)

Definition at line 989 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL2_FREQ

#define IFXSCU_CFG_PLL2_FREQ 200MHZ

Definition at line 140 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_FREQ

#define IFXSCU_CFG_PLL_FREQ 300MHZ

Definition at line 121 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_INITIAL_STEP

#define IFXSCU_CFG_PLL_INITIAL_STEP
Value:
{\
{\
IFX_CFG_SCU_XTAL_FREQUENCY,\
IfxScuCcu_PllInputClockSelection_fOsc0,\
IFXSCU_CFG_SYS_PLL_INITIAL_STEP, \
IFXSCU_CFG_PER_PLL_INITIAL_STEP, \
},\
IFXSCU_CFG_WAIT_INITIAL_STEP \
}

Definition at line 553 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS

#define IFXSCU_CFG_PLL_STEPS IFXSCU_CFG_PLL_STEPS_BASIC(IFXSCU_CFG_XTAL_FREQ, IFXSCU_CFG_PLL_FREQ)

Definition at line 534 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_16MHZ_133MHZ

#define IFXSCU_CFG_PLL_STEPS_16MHZ_133MHZ IFXSCU_CFG_PLL_STEPS_FDCO_800MHZ_TO_TARGET_133MHZ

Definition at line 260 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_16MHZ_240MHZ

#define IFXSCU_CFG_PLL_STEPS_16MHZ_240MHZ IFXSCU_CFG_PLL_STEPS_FDCO_720MHZ_TO_TARGET_240MHZ

Definition at line 278 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_16MHZ_300MHZ

#define IFXSCU_CFG_PLL_STEPS_16MHZ_300MHZ IFXSCU_CFG_PLL_STEPS_FDCO_600MHZ_TO_TARGET_300MHZ

Definition at line 296 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_16MHZ_80MHZ

#define IFXSCU_CFG_PLL_STEPS_16MHZ_80MHZ IFXSCU_CFG_PLL_STEPS_FDCO_640MHZ_TO_TARGET_80MHZ

Definition at line 242 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_20MHZ_200MHZ

#define IFXSCU_CFG_PLL_STEPS_20MHZ_200MHZ IFXSCU_CFG_PLL_STEPS_FDCO_600MHZ_TO_TARGET_200MHZ

Definition at line 317 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_20MHZ_240MHZ

#define IFXSCU_CFG_PLL_STEPS_20MHZ_240MHZ IFXSCU_CFG_PLL_STEPS_FDCO_720MHZ_TO_TARGET_240MHZ

Definition at line 335 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_20MHZ_300MHZ

#define IFXSCU_CFG_PLL_STEPS_20MHZ_300MHZ IFXSCU_CFG_PLL_STEPS_FDCO_600MHZ_TO_TARGET_300MHZ

Definition at line 353 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_25MHZ_200MHZ

#define IFXSCU_CFG_PLL_STEPS_25MHZ_200MHZ IFXSCU_CFG_PLL_STEPS_FDCO_600MHZ_TO_TARGET_200MHZ

Definition at line 374 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_25MHZ_300MHZ

#define IFXSCU_CFG_PLL_STEPS_25MHZ_300MHZ IFXSCU_CFG_PLL_STEPS_FDCO_600MHZ_TO_TARGET_300MHZ

Definition at line 392 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_40MHZ_200MHZ

#define IFXSCU_CFG_PLL_STEPS_40MHZ_200MHZ IFXSCU_CFG_PLL_STEPS_FDCO_600MHZ_TO_TARGET_200MHZ

Definition at line 413 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_40MHZ_240MHZ

#define IFXSCU_CFG_PLL_STEPS_40MHZ_240MHZ IFXSCU_CFG_PLL_STEPS_FDCO_720MHZ_TO_TARGET_240MHZ

Definition at line 431 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_40MHZ_300MHZ

#define IFXSCU_CFG_PLL_STEPS_40MHZ_300MHZ IFXSCU_CFG_PLL_STEPS_FDCO_600MHZ_TO_TARGET_300MHZ

Definition at line 449 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_BASIC

#define IFXSCU_CFG_PLL_STEPS_BASIC | ( | xtalFreq,
 |  | pll0Freq
 | ) | IFXSCU_CFG_PLL_STEPS_BASIC_(xtalFreq, pll0Freq)

Definition at line 533 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_BASIC_

#define IFXSCU_CFG_PLL_STEPS_BASIC_ | ( | xtalFreq,
 |  | pll0Freq
 | ) | IFXSCU_CFG_PLL_STEPS_##xtalFreq##_##pll0Freq

Definition at line 532 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_FDCO_600MHZ_TO_TARGET_200MHZ

#define IFXSCU_CFG_PLL_STEPS_FDCO_600MHZ_TO_TARGET_200MHZ
Value:
{ /*Step 1 Config: 150MHz*/ \
(4 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
}, \
{ /*Step 2 Config: 200MHz*/ \
(3 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
}

Definition at line 207 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_FDCO_600MHZ_TO_TARGET_300MHZ

#define IFXSCU_CFG_PLL_STEPS_FDCO_600MHZ_TO_TARGET_300MHZ
Value:
{ /*Step 1 Config: 150MHz*/ \
(4 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
}, \
{ /*Step 2 Config: 200MHz*/ \
(3 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
}, \
{ /*Step 3 Config: 300MHz*/ \
(2 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
}

Definition at line 190 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_FDCO_640MHZ_TO_TARGET_80MHZ

#define IFXSCU_CFG_PLL_STEPS_FDCO_640MHZ_TO_TARGET_80MHZ
Value:
{ /*Step 1 Config: 80MHz*/ \
(8 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
}

Definition at line 155 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_FDCO_720MHZ_TO_TARGET_240MHZ

#define IFXSCU_CFG_PLL_STEPS_FDCO_720MHZ_TO_TARGET_240MHZ
Value:
{ /*Step 1 Config: 120MHz*/ \
(6 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
}, \
{ /*Step 2 Config: 180MHz*/ \
(4 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
}, \
{ /*Step 3 Config: 240MHz*/ \
(3 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
}

Definition at line 173 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_FDCO_800MHZ_TO_TARGET_133MHZ

#define IFXSCU_CFG_PLL_STEPS_FDCO_800MHZ_TO_TARGET_133MHZ
Value:
{ /*Step 1 Config: 133.333333333333MHz*/ \
(6 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
}

Definition at line 164 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_QSPIDIV_160MHZ_200MHZ

#define IFXSCU_CFG_QSPIDIV_160MHZ_200MHZ (1)

Definition at line 1081 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_QSPIDIV_320MHZ_200MHZ

#define IFXSCU_CFG_QSPIDIV_320MHZ_200MHZ (1)

Definition at line 1013 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_SPBDIV_133MHZ

#define IFXSCU_CFG_SPBDIV_133MHZ (2)

Definition at line 673 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_SPBDIV_200MHZ

#define IFXSCU_CFG_SPBDIV_200MHZ (2)

Definition at line 753 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_SPBDIV_240MHZ

#define IFXSCU_CFG_SPBDIV_240MHZ (3)

Definition at line 833 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_SPBDIV_300MHZ

#define IFXSCU_CFG_SPBDIV_300MHZ (3)

Definition at line 913 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_SPBDIV_80MHZ

#define IFXSCU_CFG_SPBDIV_80MHZ (2)

Definition at line 593 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_SRIDIV_133MHZ

#define IFXSCU_CFG_SRIDIV_133MHZ (1)

Definition at line 667 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_SRIDIV_200MHZ

#define IFXSCU_CFG_SRIDIV_200MHZ (1)

Definition at line 747 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_SRIDIV_240MHZ

#define IFXSCU_CFG_SRIDIV_240MHZ (1)

Definition at line 827 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_SRIDIV_300MHZ

#define IFXSCU_CFG_SRIDIV_300MHZ (1)

Definition at line 907 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_SRIDIV_80MHZ

#define IFXSCU_CFG_SRIDIV_80MHZ (1)

Definition at line 587 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_STMDIV_133MHZ

#define IFXSCU_CFG_STMDIV_133MHZ (2)

Definition at line 655 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_STMDIV_200MHZ

#define IFXSCU_CFG_STMDIV_200MHZ (2)

Definition at line 735 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_STMDIV_240MHZ

#define IFXSCU_CFG_STMDIV_240MHZ (3)

Definition at line 815 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_STMDIV_300MHZ

#define IFXSCU_CFG_STMDIV_300MHZ (3)

Definition at line 895 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_STMDIV_80MHZ

#define IFXSCU_CFG_STMDIV_80MHZ (1)

Definition at line 575 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_SYS_PLL_16MHZ_133MHZ

#define IFXSCU_CFG_SYS_PLL_16MHZ_133MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial }*/ \
{(1 - 1), (50 - 1), (8 - 1)}

Definition at line 249 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_SYS_PLL_16MHZ_240MHZ

#define IFXSCU_CFG_SYS_PLL_16MHZ_240MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial }*/ \
{(1 - 1), (45 - 1), (8 - 1)}

Definition at line 267 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_SYS_PLL_16MHZ_300MHZ

#define IFXSCU_CFG_SYS_PLL_16MHZ_300MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial }*/ \
{(2 - 1), (75 - 1), (6 - 1)}

Definition at line 285 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_SYS_PLL_16MHZ_80MHZ

#define IFXSCU_CFG_SYS_PLL_16MHZ_80MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial }*/ \
{(1 - 1), (40 - 1), (6 - 1)}

Definition at line 231 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_SYS_PLL_20MHZ_200MHZ

#define IFXSCU_CFG_SYS_PLL_20MHZ_200MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial }*/ \
{(1 - 1), (30 - 1), (6 - 1)}

Definition at line 306 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_SYS_PLL_20MHZ_240MHZ

#define IFXSCU_CFG_SYS_PLL_20MHZ_240MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial }*/ \
{(1 - 1), (36 - 1), (8 - 1)}

Definition at line 324 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_SYS_PLL_20MHZ_300MHZ

#define IFXSCU_CFG_SYS_PLL_20MHZ_300MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial }*/ \
{(1 - 1), (30 - 1), (6 - 1)}

Definition at line 342 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_SYS_PLL_25MHZ_200MHZ

#define IFXSCU_CFG_SYS_PLL_25MHZ_200MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial }*/ \
{(1 - 1), (24 - 1), (6 - 1)}

Definition at line 363 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_SYS_PLL_25MHZ_300MHZ

#define IFXSCU_CFG_SYS_PLL_25MHZ_300MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial }*/ \
{(1 - 1), (24 - 1), (6 - 1)}

Definition at line 381 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_SYS_PLL_40MHZ_200MHZ

#define IFXSCU_CFG_SYS_PLL_40MHZ_200MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial }*/ \
{(1 - 1), (15 - 1), (6 - 1)}

Definition at line 402 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_SYS_PLL_40MHZ_240MHZ

#define IFXSCU_CFG_SYS_PLL_40MHZ_240MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial }*/ \
{(2 - 1), (36 - 1), (8 - 1)}

Definition at line 420 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_SYS_PLL_40MHZ_300MHZ

#define IFXSCU_CFG_SYS_PLL_40MHZ_300MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial }*/ \
{(1 - 1), (15 - 1), (6 - 1)}

Definition at line 438 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_SYS_PLL_INITIAL_STEP

#define IFXSCU_CFG_SYS_PLL_INITIAL_STEP IFXSCU_CFG_SYS_PLL_INITIAL_STEP_BASIC(IFXSCU_CFG_XTAL_FREQ, IFXSCU_CFG_PLL_FREQ)

Definition at line 540 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_SYS_PLL_INITIAL_STEP_BASIC

#define IFXSCU_CFG_SYS_PLL_INITIAL_STEP_BASIC | ( | xtalFreq,
 |  | pll0Freq
 | ) | IFXSCU_CFG_SYS_PLL_INITIAL_STEP_BASIC_(xtalFreq, pll0Freq)

Definition at line 539 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_SYS_PLL_INITIAL_STEP_BASIC_

#define IFXSCU_CFG_SYS_PLL_INITIAL_STEP_BASIC_ | ( | xtalFreq,
 |  | pll0Freq
 | ) | IFXSCU_CFG_SYS_PLL_##xtalFreq##_##pll0Freq

Definition at line 538 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_WAIT_INITIAL_STEP

#define IFXSCU_CFG_WAIT_INITIAL_STEP IFXSCU_CFG_WAIT_INITIAL_STEP_BASIC(IFXSCU_CFG_XTAL_FREQ, IFXSCU_CFG_PLL_FREQ)

Definition at line 550 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_WAIT_INITIAL_STEP_16MHZ_133MHZ

#define IFXSCU_CFG_WAIT_INITIAL_STEP_16MHZ_133MHZ 0.000200F

Definition at line 255 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_WAIT_INITIAL_STEP_16MHZ_240MHZ

#define IFXSCU_CFG_WAIT_INITIAL_STEP_16MHZ_240MHZ 0.000200F

Definition at line 273 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_WAIT_INITIAL_STEP_16MHZ_300MHZ

#define IFXSCU_CFG_WAIT_INITIAL_STEP_16MHZ_300MHZ 0.000200F

Definition at line 291 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_WAIT_INITIAL_STEP_16MHZ_80MHZ

#define IFXSCU_CFG_WAIT_INITIAL_STEP_16MHZ_80MHZ 0.000200F

Definition at line 237 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_WAIT_INITIAL_STEP_20MHZ_200MHZ

#define IFXSCU_CFG_WAIT_INITIAL_STEP_20MHZ_200MHZ 0.000200F

Definition at line 312 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_WAIT_INITIAL_STEP_20MHZ_240MHZ

#define IFXSCU_CFG_WAIT_INITIAL_STEP_20MHZ_240MHZ 0.000200F

Definition at line 330 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_WAIT_INITIAL_STEP_20MHZ_300MHZ

#define IFXSCU_CFG_WAIT_INITIAL_STEP_20MHZ_300MHZ 0.000200F

Definition at line 348 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_WAIT_INITIAL_STEP_25MHZ_200MHZ

#define IFXSCU_CFG_WAIT_INITIAL_STEP_25MHZ_200MHZ 0.000200F

Definition at line 369 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_WAIT_INITIAL_STEP_25MHZ_300MHZ

#define IFXSCU_CFG_WAIT_INITIAL_STEP_25MHZ_300MHZ 0.000200F

Definition at line 387 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_WAIT_INITIAL_STEP_40MHZ_200MHZ

#define IFXSCU_CFG_WAIT_INITIAL_STEP_40MHZ_200MHZ 0.000200F

Definition at line 408 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_WAIT_INITIAL_STEP_40MHZ_240MHZ

#define IFXSCU_CFG_WAIT_INITIAL_STEP_40MHZ_240MHZ 0.000200F

Definition at line 426 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_WAIT_INITIAL_STEP_40MHZ_300MHZ

#define IFXSCU_CFG_WAIT_INITIAL_STEP_40MHZ_300MHZ 0.000200F

Definition at line 444 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_WAIT_INITIAL_STEP_BASIC

#define IFXSCU_CFG_WAIT_INITIAL_STEP_BASIC | ( | xtalFreq,
 |  | pll0Freq
 | ) | IFXSCU_CFG_WAIT_INITIAL_STEP_BASIC_(xtalFreq, pll0Freq)

Definition at line 549 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_WAIT_INITIAL_STEP_BASIC_

#define IFXSCU_CFG_WAIT_INITIAL_STEP_BASIC_ | ( | xtalFreq,
 |  | pll0Freq
 | ) | IFXSCU_CFG_WAIT_INITIAL_STEP_##xtalFreq##_##pll0Freq

Definition at line 548 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_XTAL_FREQ

#define IFXSCU_CFG_XTAL_FREQ 20MHZ

Definition at line 98 of file IfxScu_cfg.h.

◆ IFXSCU_EVR_OSC_FREQUENCY

#define IFXSCU_EVR_OSC_FREQUENCY (100000000.0)

Definition at line 81 of file IfxScu_cfg.h.

Referenced by IfxScuCcu_getEvrFrequency(), and IfxScuCcu_getOscFrequency().

◆ IFXSCU_PLL_FREERUNNING_FREQUENCY

#define IFXSCU_PLL_FREERUNNING_FREQUENCY (100000000.0)

Definition at line 86 of file IfxScu_cfg.h.

◆ IFXSCU_VCO_BASE_FREQUENCY

#define IFXSCU_VCO_BASE_FREQUENCY (100000000.0)

Definition at line 80 of file IfxScu_cfg.h.

◆ IFXSCULBIST_CFG_PATTERN_A

#define IFXSCULBIST_CFG_PATTERN_A (0xC0U)

Definition at line 1296 of file IfxScu_cfg.h.

◆ IFXSCULBIST_CFG_PATTERN_B

#define IFXSCULBIST_CFG_PATTERN_B (0x780U)

Definition at line 1300 of file IfxScu_cfg.h.

◆ IFXSCULBIST_CFG_SCANCHAINLENGTH

#define IFXSCULBIST_CFG_SCANCHAINLENGTH (0x4FU)

Definition at line 1304 of file IfxScu_cfg.h.

◆ IFXSCULBIST_CFG_SEED

#define IFXSCULBIST_CFG_SEED (0x07U)

Definition at line 1308 of file IfxScu_cfg.h.

◆ IFXSCULBIST_CFG_SIGNATURE_A

#define IFXSCULBIST_CFG_SIGNATURE_A (0xF936A7A8U)

Definition at line 1281 of file IfxScu_cfg.h.

◆ IFXSCULBIST_CFG_SIGNATURE_B

#define IFXSCULBIST_CFG_SIGNATURE_B (0xCB6D495EU)

Definition at line 1289 of file IfxScu_cfg.h.

Enumeration Type Documentation

◆ IfxScu_CCUCON0_CLKSEL

enum IfxScu_CCUCON0_CLKSEL

Clock selection

Enumerator
IfxScu_CCUCON0_CLKSEL_fBack
IfxScu_CCUCON0_CLKSEL_fPll

Definition at line 1315 of file IfxScu_cfg.h.

◆ IfxScu_PMCSR_REQSLP

enum IfxScu_PMCSR_REQSLP
Enumerator
IfxScu_PMCSR_REQSLP_Run
IfxScu_PMCSR_REQSLP_Idle
IfxScu_PMCSR_REQSLP_Sleep
IfxScu_PMCSR_REQSLP_Stby

Definition at line 1329 of file IfxScu_cfg.h.

◆ IfxScu_WDTCON1_IR

enum IfxScu_WDTCON1_IR

Input frequency request control

Enumerator
IfxScu_WDTCON1_IR_divBy16384
IfxScu_WDTCON1_IR_divBy256
IfxScu_WDTCON1_IR_divBy64

Definition at line 1322 of file IfxScu_cfg.h.


iLLD_TC38A: IfxScu_PinMap.c File Reference

  • _PinMap
Variables
IfxScu_PinMap.c File Reference
iLLD » SCU

SCU I/O map. More...

#include "IfxScu_PinMap.h"
Include dependency graph for IfxScu_PinMap.c:

Go to the source code of this file.

Variables

IfxScu_Emgstop_In | IfxScu_EMGSTOPA_P33_8_IN = {&MODULE_SCU, {&MODULE_P33, 8}, Ifx_RxSel_a}
IfxScu_Emgstop_In | IfxScu_EMGSTOPB_P21_2_IN = {&MODULE_SCU, {&MODULE_P21, 2}, Ifx_RxSel_b}
IfxScu_Extclk_Out | IfxScu_EXTCLK0_P00_15_OUT = {&MODULE_SCU, {&MODULE_P00,15}, IfxPort_OutputIdx_alt4}
IfxScu_Extclk_Out | IfxScu_EXTCLK0_P23_1_OUT = {&MODULE_SCU, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt6}
IfxScu_Extclk_Out | IfxScu_EXTCLK1_P00_13_OUT = {&MODULE_SCU, {&MODULE_P00,13}, IfxPort_OutputIdx_alt4}
IfxScu_Extclk_Out | IfxScu_EXTCLK1_P11_12_OUT = {&MODULE_SCU, {&MODULE_P11,12}, IfxPort_OutputIdx_alt6}
IfxScu_Extclk_Out | IfxScu_EXTCLK1_P32_4_OUT = {&MODULE_SCU, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt6}
IfxScu_Req_In | IfxScu_REQ0A_P15_4_IN = {&MODULE_SCU, 0, {&MODULE_P15, 4}, Ifx_RxSel_a}
IfxScu_Req_In | IfxScu_REQ0C_P10_7_IN = {&MODULE_SCU, 0, {&MODULE_P10, 7}, Ifx_RxSel_c}
IfxScu_Req_In | IfxScu_REQ1A_P14_3_IN = {&MODULE_SCU, 1, {&MODULE_P14, 3}, Ifx_RxSel_a}
IfxScu_Req_In | IfxScu_REQ1C_P10_8_IN = {&MODULE_SCU, 1, {&MODULE_P10, 8}, Ifx_RxSel_c}
IfxScu_Req_In | IfxScu_REQ2A_P10_2_IN = {&MODULE_SCU, 2, {&MODULE_P10, 2}, Ifx_RxSel_a}
IfxScu_Req_In | IfxScu_REQ2B_P02_1_IN = {&MODULE_SCU, 2, {&MODULE_P02, 1}, Ifx_RxSel_b}
IfxScu_Req_In | IfxScu_REQ2C_P00_4_IN = {&MODULE_SCU, 2, {&MODULE_P00, 4}, Ifx_RxSel_c}
IfxScu_Req_In | IfxScu_REQ3A_P10_3_IN = {&MODULE_SCU, 3, {&MODULE_P10, 3}, Ifx_RxSel_a}
IfxScu_Req_In | IfxScu_REQ3B_P14_1_IN = {&MODULE_SCU, 3, {&MODULE_P14, 1}, Ifx_RxSel_b}
IfxScu_Req_In | IfxScu_REQ3C_P02_0_IN = {&MODULE_SCU, 3, {&MODULE_P02, 0}, Ifx_RxSel_c}
IfxScu_Req_In | IfxScu_REQ4A_P33_7_IN = {&MODULE_SCU, 4, {&MODULE_P33, 7}, Ifx_RxSel_a}
IfxScu_Req_In | IfxScu_REQ4D_P15_5_IN = {&MODULE_SCU, 4, {&MODULE_P15, 5}, Ifx_RxSel_d}
IfxScu_Req_In | IfxScu_REQ5A_P15_8_IN = {&MODULE_SCU, 5, {&MODULE_P15, 8}, Ifx_RxSel_a}
IfxScu_Req_In | IfxScu_REQ6A_P20_0_IN = {&MODULE_SCU, 6, {&MODULE_P20, 0}, Ifx_RxSel_a}
IfxScu_Req_In | IfxScu_REQ6D_P11_10_IN = {&MODULE_SCU, 6, {&MODULE_P11,10}, Ifx_RxSel_d}
IfxScu_Req_In | IfxScu_REQ7A_P20_9_IN = {&MODULE_SCU, 7, {&MODULE_P20, 9}, Ifx_RxSel_a}
IfxScu_Req_In | IfxScu_REQ7C_P15_1_IN = {&MODULE_SCU, 7, {&MODULE_P15, 1}, Ifx_RxSel_c}
const IfxScu_Emgstop_In * | IfxScu_Emgstop_In_pinTable [IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS]
const IfxScu_Extclk_Out * | IfxScu_Extclk_Out_pinTable [IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS]
const IfxScu_Req_In * | IfxScu_Req_In_pinTable [IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_NUM_REQUESTS][IFXSCU_PINMAP_REQ_IN_NUM_ITEMS]

Detailed Description

SCU I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxScu_PinMap.c.

Variable Documentation

◆ IfxScu_Emgstop_In_pinTable

const IfxScu_Emgstop_In* IfxScu_Emgstop_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxScu_EMGSTOPA_P33_8_IN,
&IfxScu_EMGSTOPB_P21_2_IN
}
}
IfxScu_EMGSTOPA_P33_8_IN
IfxScu_Emgstop_In IfxScu_EMGSTOPA_P33_8_IN
Definition: IfxScu_PinMap.c:45
IfxScu_EMGSTOPB_P21_2_IN
IfxScu_Emgstop_In IfxScu_EMGSTOPB_P21_2_IN
Definition: IfxScu_PinMap.c:46

Definition at line 71 of file IfxScu_PinMap.c.

◆ IfxScu_EMGSTOPA_P33_8_IN

IfxScu_Emgstop_In IfxScu_EMGSTOPA_P33_8_IN = {&MODULE_SCU, {&MODULE_P33, 8}, Ifx_RxSel_a}

Definition at line 45 of file IfxScu_PinMap.c.

◆ IfxScu_EMGSTOPB_P21_2_IN

IfxScu_Emgstop_In IfxScu_EMGSTOPB_P21_2_IN = {&MODULE_SCU, {&MODULE_P21, 2}, Ifx_RxSel_b}

Definition at line 46 of file IfxScu_PinMap.c.

◆ IfxScu_EXTCLK0_P00_15_OUT

IfxScu_Extclk_Out IfxScu_EXTCLK0_P00_15_OUT = {&MODULE_SCU, {&MODULE_P00,15}, IfxPort_OutputIdx_alt4}

Definition at line 47 of file IfxScu_PinMap.c.

◆ IfxScu_EXTCLK0_P23_1_OUT

IfxScu_Extclk_Out IfxScu_EXTCLK0_P23_1_OUT = {&MODULE_SCU, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt6}

Definition at line 48 of file IfxScu_PinMap.c.

◆ IfxScu_EXTCLK1_P00_13_OUT

IfxScu_Extclk_Out IfxScu_EXTCLK1_P00_13_OUT = {&MODULE_SCU, {&MODULE_P00,13}, IfxPort_OutputIdx_alt4}

Definition at line 49 of file IfxScu_PinMap.c.

◆ IfxScu_EXTCLK1_P11_12_OUT

IfxScu_Extclk_Out IfxScu_EXTCLK1_P11_12_OUT = {&MODULE_SCU, {&MODULE_P11,12}, IfxPort_OutputIdx_alt6}

Definition at line 50 of file IfxScu_PinMap.c.

◆ IfxScu_EXTCLK1_P32_4_OUT

IfxScu_Extclk_Out IfxScu_EXTCLK1_P32_4_OUT = {&MODULE_SCU, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt6}

Definition at line 51 of file IfxScu_PinMap.c.

◆ IfxScu_Extclk_Out_pinTable

const IfxScu_Extclk_Out* IfxScu_Extclk_Out_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxScu_EXTCLK1_P00_13_OUT,
&IfxScu_EXTCLK0_P00_15_OUT,
&IfxScu_EXTCLK1_P11_12_OUT,
&IfxScu_EXTCLK0_P23_1_OUT,
&IfxScu_EXTCLK1_P32_4_OUT
}
}
IfxScu_EXTCLK1_P32_4_OUT
IfxScu_Extclk_Out IfxScu_EXTCLK1_P32_4_OUT
Definition: IfxScu_PinMap.c:51
IfxScu_EXTCLK0_P00_15_OUT
IfxScu_Extclk_Out IfxScu_EXTCLK0_P00_15_OUT
Definition: IfxScu_PinMap.c:47
IfxScu_EXTCLK1_P00_13_OUT
IfxScu_Extclk_Out IfxScu_EXTCLK1_P00_13_OUT
Definition: IfxScu_PinMap.c:49
IfxScu_EXTCLK1_P11_12_OUT
IfxScu_Extclk_Out IfxScu_EXTCLK1_P11_12_OUT
Definition: IfxScu_PinMap.c:50
IfxScu_EXTCLK0_P23_1_OUT
IfxScu_Extclk_Out IfxScu_EXTCLK0_P23_1_OUT
Definition: IfxScu_PinMap.c:48

Definition at line 78 of file IfxScu_PinMap.c.

◆ IfxScu_REQ0A_P15_4_IN

IfxScu_Req_In IfxScu_REQ0A_P15_4_IN = {&MODULE_SCU, 0, {&MODULE_P15, 4}, Ifx_RxSel_a}

Definition at line 52 of file IfxScu_PinMap.c.

◆ IfxScu_REQ0C_P10_7_IN

IfxScu_Req_In IfxScu_REQ0C_P10_7_IN = {&MODULE_SCU, 0, {&MODULE_P10, 7}, Ifx_RxSel_c}

Definition at line 53 of file IfxScu_PinMap.c.

◆ IfxScu_REQ1A_P14_3_IN

IfxScu_Req_In IfxScu_REQ1A_P14_3_IN = {&MODULE_SCU, 1, {&MODULE_P14, 3}, Ifx_RxSel_a}

Definition at line 54 of file IfxScu_PinMap.c.

◆ IfxScu_REQ1C_P10_8_IN

IfxScu_Req_In IfxScu_REQ1C_P10_8_IN = {&MODULE_SCU, 1, {&MODULE_P10, 8}, Ifx_RxSel_c}

Definition at line 55 of file IfxScu_PinMap.c.

◆ IfxScu_REQ2A_P10_2_IN

IfxScu_Req_In IfxScu_REQ2A_P10_2_IN = {&MODULE_SCU, 2, {&MODULE_P10, 2}, Ifx_RxSel_a}

Definition at line 56 of file IfxScu_PinMap.c.

◆ IfxScu_REQ2B_P02_1_IN

IfxScu_Req_In IfxScu_REQ2B_P02_1_IN = {&MODULE_SCU, 2, {&MODULE_P02, 1}, Ifx_RxSel_b}

Definition at line 57 of file IfxScu_PinMap.c.

◆ IfxScu_REQ2C_P00_4_IN

IfxScu_Req_In IfxScu_REQ2C_P00_4_IN = {&MODULE_SCU, 2, {&MODULE_P00, 4}, Ifx_RxSel_c}

Definition at line 58 of file IfxScu_PinMap.c.

◆ IfxScu_REQ3A_P10_3_IN

IfxScu_Req_In IfxScu_REQ3A_P10_3_IN = {&MODULE_SCU, 3, {&MODULE_P10, 3}, Ifx_RxSel_a}

Definition at line 59 of file IfxScu_PinMap.c.

◆ IfxScu_REQ3B_P14_1_IN

IfxScu_Req_In IfxScu_REQ3B_P14_1_IN = {&MODULE_SCU, 3, {&MODULE_P14, 1}, Ifx_RxSel_b}

Definition at line 60 of file IfxScu_PinMap.c.

◆ IfxScu_REQ3C_P02_0_IN

IfxScu_Req_In IfxScu_REQ3C_P02_0_IN = {&MODULE_SCU, 3, {&MODULE_P02, 0}, Ifx_RxSel_c}

Definition at line 61 of file IfxScu_PinMap.c.

◆ IfxScu_REQ4A_P33_7_IN

IfxScu_Req_In IfxScu_REQ4A_P33_7_IN = {&MODULE_SCU, 4, {&MODULE_P33, 7}, Ifx_RxSel_a}

Definition at line 62 of file IfxScu_PinMap.c.

◆ IfxScu_REQ4D_P15_5_IN

IfxScu_Req_In IfxScu_REQ4D_P15_5_IN = {&MODULE_SCU, 4, {&MODULE_P15, 5}, Ifx_RxSel_d}

Definition at line 63 of file IfxScu_PinMap.c.

◆ IfxScu_REQ5A_P15_8_IN

IfxScu_Req_In IfxScu_REQ5A_P15_8_IN = {&MODULE_SCU, 5, {&MODULE_P15, 8}, Ifx_RxSel_a}

Definition at line 64 of file IfxScu_PinMap.c.

◆ IfxScu_REQ6A_P20_0_IN

IfxScu_Req_In IfxScu_REQ6A_P20_0_IN = {&MODULE_SCU, 6, {&MODULE_P20, 0}, Ifx_RxSel_a}

Definition at line 65 of file IfxScu_PinMap.c.

◆ IfxScu_REQ6D_P11_10_IN

IfxScu_Req_In IfxScu_REQ6D_P11_10_IN = {&MODULE_SCU, 6, {&MODULE_P11,10}, Ifx_RxSel_d}

Definition at line 66 of file IfxScu_PinMap.c.

◆ IfxScu_REQ7A_P20_9_IN

IfxScu_Req_In IfxScu_REQ7A_P20_9_IN = {&MODULE_SCU, 7, {&MODULE_P20, 9}, Ifx_RxSel_a}

Definition at line 67 of file IfxScu_PinMap.c.

◆ IfxScu_REQ7C_P15_1_IN

IfxScu_Req_In IfxScu_REQ7C_P15_1_IN = {&MODULE_SCU, 7, {&MODULE_P15, 1}, Ifx_RxSel_c}

Definition at line 68 of file IfxScu_PinMap.c.

◆ IfxScu_Req_In_pinTable

const IfxScu_Req_In* IfxScu_Req_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_NUM_REQUESTS][IFXSCU_PINMAP_REQ_IN_NUM_ITEMS]

Definition at line 88 of file IfxScu_PinMap.c.


iLLD_TC38A: IfxScu_PinMap.h File Reference

  • _PinMap
Data Structures | Macros | Variables
IfxScu_PinMap.h File Reference
iLLD » SCU

SCU I/O map. More...

#include <IfxScu_reg.h>
#include <_Impl/IfxScu_cfg.h>
#include <Port/Std/IfxPort.h>
Include dependency graph for IfxScu_PinMap.h:

Go to the source code of this file.

Data Structures

struct | IfxScu_Evrwup_In
EVR Wakeup pin mapping structure. More...
struct | IfxScu_Req_In
External Request pin mapping structure. More...
struct | IfxScu_Dcdcsync_Out
DCDC Sync pin mapping structure. More...
struct | IfxScu_Emgstop_In
Emergency Stop pin mapping structure. More...
struct | IfxScu_Wdtlck_Out
Watchdog Timer Lock pin mapping structure. More...
struct | IfxScu_Extclk_Out
External Clock pin mapping structure. More...

Macros

#define | IFXSCU_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXSCU_PINMAP_NUM_REQUESTS 8
#define | IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS 2
#define | IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS 5
#define | IFXSCU_PINMAP_REQ_IN_NUM_ITEMS 4

Variables

IFX_EXTERN IfxScu_Emgstop_In IfxScu_EMGSTOPA_P33_8_IN
Emergency stop Port Pin A input request. More...
IFX_EXTERN IfxScu_Emgstop_In IfxScu_EMGSTOPB_P21_2_IN
Emergency stop Port Pin B input request. More...
IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK0_P00_15_OUT
External Clock 0. More...
IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK0_P23_1_OUT
External Clock 0. More...
IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK1_P00_13_OUT
External Clock 1. More...
IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK1_P11_12_OUT
External Clock 1. More...
IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK1_P32_4_OUT
External Clock 1. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ0A_P15_4_IN
ERU Channel 0 inputs 0 to 5 (0 is the LSB and 5 is the MSB) More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ0C_P10_7_IN
ERU Channel 0 inputs 0 to 5 (0 is the LSB and 5 is the MSB) More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ1A_P14_3_IN
ERU Channel 1 inputs 0 to 5 (0 is the LSB and 5 is the MSB) More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ1C_P10_8_IN
ERU Channel 1 inputs 0 to 5 (0 is the LSB and 5 is the MSB) More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ2A_P10_2_IN
ERU Channel 2 inputs 0 to 5 (0 is the LSB and 5 is the MSB) More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ2B_P02_1_IN
ERU Channel 2 inputs 0 to 5 (0 is the LSB and 5 is the MSB) More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ2C_P00_4_IN
ERU Channel 2 inputs 0 to 5 (0 is the LSB and 5 is the MSB) More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ3A_P10_3_IN
ERU Channel 3 inputs 0 to 5 (0 is the LSB and 5 is the MSB) More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ3B_P14_1_IN
ERU Channel 3 inputs 0 to 5 (0 is the LSB and 5 is the MSB) More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ3C_P02_0_IN
ERU Channel 3 inputs 0 to 5 (0 is the LSB and 5 is the MSB) More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ4A_P33_7_IN
ERU Channel 4 inputs 0 to 5 (0 is the LSB and 5 is the MSB) More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ4D_P15_5_IN
ERU Channel 4 inputs 0 to 5 (0 is the LSB and 5 is the MSB) More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ5A_P15_8_IN
ERU Channel 5 inputs 0 to 5 (0 is the LSB and 5 is the MSB) More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ6A_P20_0_IN
ERU Channel 6 inputs 0 to 5 (0 is the LSB and 5 is the MSB) More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ6D_P11_10_IN
ERU Channel 6 inputs 0 to 5 (0 is the LSB and 5 is the MSB) More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ7A_P20_9_IN
ERU Channel 7 inputs 0 to 5 (0 is the LSB and 5 is the MSB) More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ7C_P15_1_IN
ERU Channel 7 inputs 0 to 5 (0 is the LSB and 5 is the MSB) More...
IFX_EXTERN const IfxScu_Emgstop_In * | IfxScu_Emgstop_In_pinTable [IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS]
IfxScu_Emgstop_In table. More...
IFX_EXTERN const IfxScu_Extclk_Out * | IfxScu_Extclk_Out_pinTable [IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS]
IfxScu_Extclk_Out table. More...
IFX_EXTERN const IfxScu_Req_In * | IfxScu_Req_In_pinTable [IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_NUM_REQUESTS][IFXSCU_PINMAP_REQ_IN_NUM_ITEMS]
IfxScu_Req_In table. More...

Detailed Description

SCU I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxScu_PinMap.h.


iLLD_TC38A: IfxScuCcu.h File Reference

  • Scu
  • Std
Data Structures | Macros | Typedefs | Enumerations | Functions | Variables
IfxScuCcu.h File Reference
iLLD » SCU

SCU basic functionality. More...

#include "_Impl/IfxScu_cfg.h"
#include "Scu/Std/IfxScuWdt.h"
#include "Cpu/Std/IfxCpu.h"
#include "IfxStm_reg.h"
#include "IfxScu_reg.h"
#include "_PinMap/IfxScu_PinMap.h"
#include "IfxSmu_reg.h"
Include dependency graph for IfxScuCcu.h:

Go to the source code of this file.

Data Structures

struct | IfxScuCcu_PerPllConfig
Configuration structure type for the Per Pll step. This structure must be used to configure the P, N and K2, K3 dividers . More...
struct | IfxScuCcu_SysPllConfig
Configuration structure type for the Pll initial step. This structure must be used to configure the P, N and K2 dividers for initial step. More...
struct | IfxScuCcu_CcuconRegConfig
Configuration structure type for CCUCON registers. More...
struct | IfxScuCcu_PllStepConfig
Configuration structure type for the Pll Steps for current jump control. More...
struct | IfxScuCcu_pllsParameterConfig
Configuration structure type for the Pll Parameters. More...
struct | IfxScuCcu_FlashWaitstateConfig
Configuration structure type for the Flash waitstate configuration. More...
struct | IfxScuCcu_ClockDistributionConfig
Configuration structure type for all the CCUCON registers to configure clock distribution. More...
struct | IfxScuCcu_InitialStepConfig
Configuration structure type for the Pll Initial Step Configuration. More...
struct | IfxScuCcu_PllThrottleConfig
struct | IfxScuCcu_Mod_Config
modulation config More...
struct | IfxScuCcu_Config
Configuration structure SCU module. More...
struct | IfxScuCcu_RGain_Values
structure holding the RGain parameters for modulation More...

Macros

#define | IFXSCUCCU_OSC_STABLECHK_TIME (640)
Oscillator stability check timeout count. More...
#define | IFXSCUCCU_SMUALARM_MASK (0x1DU)
#define | IFXSCUCCU_CCUCON_LCK_BIT_TIMEOUT_COUNT (0x1000U)
~40uS max wait time More...
#define | IFXSCUCCU_PLL_LOCK_TIMEOUT_COUNT (0x3000U)
~122uS max wait time for PLL locking More...
#define | IFXSCUCCU_SYSPLLSTAT_PWDSTAT_TIMEOUT_COUNT (0x3000U)
~122uS max wait time for PLL power down/up state update More...
#define | IFXSCUCCU_PLL_KRDY_TIMEOUT_COUNT (0x6000U)
~244uS max wait time More...
#define | IFXSCUCCU_OSCCON_PLLLV_OR_HV_TIMEOUT_COUNT (0x493E0U)
3mS max wait time for PLL power down/up state update More...
#define | IFXSCUCCU_LOOP_TIMEOUT_CHECK(tVar, tErr)
#define | IFXSCUCCU_MODULATION_FREQ_HZ (3600000)
Modulation frequency. More...
#define | IFXSCUCCU_MODCFG_DEFAULT_SHIFT (10)
MODCFG shift value for SYSPLLCON2. More...
#define | IFXSCUCCU_MODCFG_DEFAULT_VAL ((uint32)0x3D)
MODCFG default value - for SYSPLLCON2[15:10]. More...
#define | IFXSCUCCU_GET_RGAIN_NOM(MA, FDco) ((2 * (MA / 100) * (FDco / IFXSCUCCU_MODULATION_FREQ_HZ)))
get Rgain from MA and FDco More...
#define | IFXSCUCCU_GET_RGAIN_HEX(RGain_Nom) ((uint16)((RGain_Nom * 32) + 0.5))
Get RGAin HEX from RGain Nominal value. More...
#define | IFXSCUCCU_GET_MODCFG(RGain_Hex) ((uint16)(IFXSCUCCU_MODCFG_DEFAULT_VAL << IFXSCUCCU_MODCFG_DEFAULT_SHIFT) | (uint16)(RGain_Hex))
Get MODCFG from RGAIN_HEX. More...
#define | IFXSCUCCU_FLASHWAITSTATECHECK (0)
Define to include the flash wait state check in ScuCcu_init() More...
#define | IFXSCUCCU_LPTONORMAL_WAITTIME (0.00001f)
10 microsecond wait time between steps to jump back to normal mode. More...

Typedefs

typedef void(* IfxScuCcu_PllStepsFunctionHook) (void)
Function pointer type for the hooks. More...

Enumerations

enum IfxScuCcu_Fsource {
IfxScuCcu_Fsource_0 = 0,
IfxScuCcu_Fsource_1,
IfxScuCcu_Fsource_2
}
clock source selection More...
enum IfxScuCcu_K2divider {
IfxScuCcu_K2divider_1 = 0,
IfxScuCcu_K2divider_2,
IfxScuCcu_K2divider_3,
IfxScuCcu_K2divider_4,
IfxScuCcu_K2divider_5,
IfxScuCcu_K2divider_6,
IfxScuCcu_K2divider_7,
IfxScuCcu_K2divider_8
}
MODULE_SCU.PLLCON1.B.K2DIV, specifies the K2-Divider. More...
enum IfxScuCcu_K3divider {
IfxScuCcu_K3divider_1 = 0,
IfxScuCcu_K3divider_2,
IfxScuCcu_K3divider_3,
IfxScuCcu_K3divider_4,
IfxScuCcu_K3divider_5,
IfxScuCcu_K3divider_6,
IfxScuCcu_K3divider_7,
IfxScuCcu_K3divider_8
}
MODULE_SCU.PLLCON1.B.K3DIV, specifies the K3-Divider. More...
enum IfxScuCcu_LowPowerDivRatio {
IfxScuCcu_LowPowerDivRatio_divBy30 = 1,
IfxScuCcu_LowPowerDivRatio_divBy60,
IfxScuCcu_LowPowerDivRatio_divBy120,
IfxScuCcu_LowPowerDivRatio_divBy240
}
Low Power Division Ratios. Corresponds to values of LPDIV in CCUCON0. More...
enum IfxScuCcu_ModulationAmplitude {
IfxScuCcu_ModulationAmplitude_0p5 = 0,
IfxScuCcu_ModulationAmplitude_1p0,
IfxScuCcu_ModulationAmplitude_1p25,
IfxScuCcu_ModulationAmplitude_1p5,
IfxScuCcu_ModulationAmplitude_2p0,
IfxScuCcu_ModulationAmplitude_2p5,
IfxScuCcu_ModulationAmplitude_count
}
ENUM for MA (%) values. More...
enum IfxScuCcu_Ndivider {
IfxScuCcu_Ndivider_1 = 0,
IfxScuCcu_Ndivider_2,
IfxScuCcu_Ndivider_3,
IfxScuCcu_Ndivider_4,
IfxScuCcu_Ndivider_5,
IfxScuCcu_Ndivider_6,
IfxScuCcu_Ndivider_7,
IfxScuCcu_Ndivider_8,
IfxScuCcu_Ndivider_9,
IfxScuCcu_Ndivider_10,
IfxScuCcu_Ndivider_11,
IfxScuCcu_Ndivider_12,
IfxScuCcu_Ndivider_13,
IfxScuCcu_Ndivider_14,
IfxScuCcu_Ndivider_15,
IfxScuCcu_Ndivider_16,
IfxScuCcu_Ndivider_17,
IfxScuCcu_Ndivider_18,
IfxScuCcu_Ndivider_19,
IfxScuCcu_Ndivider_20,
IfxScuCcu_Ndivider_21,
IfxScuCcu_Ndivider_22,
IfxScuCcu_Ndivider_23,
IfxScuCcu_Ndivider_24,
IfxScuCcu_Ndivider_25,
IfxScuCcu_Ndivider_26,
IfxScuCcu_Ndivider_27,
IfxScuCcu_Ndivider_28,
IfxScuCcu_Ndivider_29,
IfxScuCcu_Ndivider_30,
IfxScuCcu_Ndivider_31,
IfxScuCcu_Ndivider_32,
IfxScuCcu_Ndivider_33,
IfxScuCcu_Ndivider_34,
IfxScuCcu_Ndivider_35,
IfxScuCcu_Ndivider_36,
IfxScuCcu_Ndivider_37,
IfxScuCcu_Ndivider_38,
IfxScuCcu_Ndivider_39,
IfxScuCcu_Ndivider_40,
IfxScuCcu_Ndivider_41,
IfxScuCcu_Ndivider_42,
IfxScuCcu_Ndivider_43,
IfxScuCcu_Ndivider_44,
IfxScuCcu_Ndivider_45,
IfxScuCcu_Ndivider_46,
IfxScuCcu_Ndivider_47,
IfxScuCcu_Ndivider_48,
IfxScuCcu_Ndivider_49,
IfxScuCcu_Ndivider_50,
IfxScuCcu_Ndivider_51,
IfxScuCcu_Ndivider_52,
IfxScuCcu_Ndivider_53,
IfxScuCcu_Ndivider_54,
IfxScuCcu_Ndivider_55,
IfxScuCcu_Ndivider_56,
IfxScuCcu_Ndivider_57,
IfxScuCcu_Ndivider_58,
IfxScuCcu_Ndivider_59,
IfxScuCcu_Ndivider_60,
IfxScuCcu_Ndivider_61,
IfxScuCcu_Ndivider_62,
IfxScuCcu_Ndivider_63,
IfxScuCcu_Ndivider_64,
IfxScuCcu_Ndivider_65,
IfxScuCcu_Ndivider_66,
IfxScuCcu_Ndivider_67,
IfxScuCcu_Ndivider_68,
IfxScuCcu_Ndivider_69,
IfxScuCcu_Ndivider_70,
IfxScuCcu_Ndivider_71,
IfxScuCcu_Ndivider_72,
IfxScuCcu_Ndivider_73,
IfxScuCcu_Ndivider_74,
IfxScuCcu_Ndivider_75,
IfxScuCcu_Ndivider_76,
IfxScuCcu_Ndivider_77,
IfxScuCcu_Ndivider_78,
IfxScuCcu_Ndivider_79,
IfxScuCcu_Ndivider_80,
IfxScuCcu_Ndivider_81,
IfxScuCcu_Ndivider_82,
IfxScuCcu_Ndivider_83,
IfxScuCcu_Ndivider_84,
IfxScuCcu_Ndivider_85,
IfxScuCcu_Ndivider_86,
IfxScuCcu_Ndivider_87,
IfxScuCcu_Ndivider_88,
IfxScuCcu_Ndivider_89,
IfxScuCcu_Ndivider_90,
IfxScuCcu_Ndivider_91,
IfxScuCcu_Ndivider_92,
IfxScuCcu_Ndivider_93,
IfxScuCcu_Ndivider_94,
IfxScuCcu_Ndivider_95,
IfxScuCcu_Ndivider_96,
IfxScuCcu_Ndivider_97,
IfxScuCcu_Ndivider_98,
IfxScuCcu_Ndivider_99,
IfxScuCcu_Ndivider_100,
IfxScuCcu_Ndivider_101,
IfxScuCcu_Ndivider_102,
IfxScuCcu_Ndivider_103,
IfxScuCcu_Ndivider_104,
IfxScuCcu_Ndivider_105,
IfxScuCcu_Ndivider_106,
IfxScuCcu_Ndivider_107,
IfxScuCcu_Ndivider_108,
IfxScuCcu_Ndivider_109,
IfxScuCcu_Ndivider_110,
IfxScuCcu_Ndivider_111,
IfxScuCcu_Ndivider_112,
IfxScuCcu_Ndivider_113,
IfxScuCcu_Ndivider_114,
IfxScuCcu_Ndivider_115,
IfxScuCcu_Ndivider_116,
IfxScuCcu_Ndivider_117,
IfxScuCcu_Ndivider_118,
IfxScuCcu_Ndivider_119,
IfxScuCcu_Ndivider_120,
IfxScuCcu_Ndivider_121,
IfxScuCcu_Ndivider_122,
IfxScuCcu_Ndivider_123,
IfxScuCcu_Ndivider_124,
IfxScuCcu_Ndivider_125,
IfxScuCcu_Ndivider_126,
IfxScuCcu_Ndivider_127,
IfxScuCcu_Ndivider_128
}
MODULE_SCU.PLLCON0.B.NDIV, specifies the N-Divider. More...
enum IfxScuCcu_Pdivider {
IfxScuCcu_Pdivider_1 = 0,
IfxScuCcu_Pdivider_2,
IfxScuCcu_Pdivider_3,
IfxScuCcu_Pdivider_4,
IfxScuCcu_Pdivider_5,
IfxScuCcu_Pdivider_6,
IfxScuCcu_Pdivider_7,
IfxScuCcu_Pdivider_8
}
MODULE_SCU.PLLCON0.B.PDIV, specifies the P-Divider. More...
enum IfxScuCcu_PllInputClockSelection {
IfxScuCcu_PllInputClockSelection_fOsc1 = 0,
IfxScuCcu_PllInputClockSelection_fOsc0 = 1,
IfxScuCcu_PllInputClockSelection_fSysclk = 2
}
SysPll & Per Pll input clock selection. SYSPLLCON0.B.INSEL. More...
enum IfxScuCcu_Traprequest {
IfxScuCcu_Traprequest_esr0 = 0,
IfxScuCcu_Traprequest_esr1,
IfxScuCcu_Traprequest_trap2,
IfxScuCcu_Traprequest_smu
}
trap request type More...
enum IfxScuCcu_ModEn {
IfxScuCcu_ModEn_disabled = 0,
IfxScuCcu_ModEn_enabled = 1
}
modulation enable More...

Functions

IFX_INLINE void | IfxScuCcu_wait (float32 timeSec)
API to wait for requested duration. Note: IfxScuCcu_wait shall not use STM in future, because we can guarantee that STM is enabled after reset but If PLL init is called for changing the frequency during runtime, there is no guarantee that STM is enabled. More...
IFX_INLINE void | IfxScuCcu_waitWithWdtService (float32 timeSec)
API to wait for requested duration along with watchdog service to avoid any reset case during startup of the chip. Note: IfxScuCcu_wait shall not use STM in future, because we can guarantee that STM is enabled after reset but If PLL init is called for changing the frequency during runtime, there is no guarantee that STM is enabled. More...
IFX_INLINE void | IfxScuCcu_switchToLowPowerMode (IfxScuCcu_LowPowerDivRatio lpDiv)
API to configure the LPDIV value to enter into Low Power mode. More...
IFX_INLINE void | IfxScuCcu_switchToNormalMode (const uint32 ccucon0)
API to switch back to normal mode from low power mode. More...
IFX_INLINE float32 | IfxScuCcu_getAdcFrequency (void)
API to get Adc (EVADC, EDSADC) frequency. This API returns the based on the divider value in CCUCON register and fSOURCE. More...
IFX_INLINE float32 | IfxScuCcu_getAsclinFFrequency (void)
API to get ASCLINF divider frequency. This API returns the based on the divider value in CCUCON register and fSOURCE. More...
IFX_INLINE float32 | IfxScuCcu_getEvrFrequency (void)
API to get EVR Oscillator frequency. This API returns the constant which is specific to the ScuCcu of the controller. More...
IFX_INLINE float32 | IfxScuCcu_getGethFrequency (void)
API to get GETH divider frequency. This API returns the based on the divider value in CCUCON register and fSOURCE. More...
IFX_INLINE float32 | IfxScuCcu_getGtmFrequency (void)
API to get GTMdivider frequency This API returns the based on the divider value in CCUCON register and fSOURCE. return GTM frequency (fGTM) in Hz. More...
IFX_INLINE float32 | IfxScuCcu_getI2cFrequency (void)
API to get I2C frequency. This API returns the based on the divider value in CCUCON register and fSOURCE. More...
IFX_INLINE float32 | IfxScuCcu_getMcanhFrequency (void)
API to get MCANH divider frequency. This API returns the based on the divider value in CCUCON register and fSOURCE. More...
IFX_INLINE float32 | IfxScuCcu_getOsc0Frequency (void)
API to get Oscillator 0 frequency. This API returns the fOsc0 frequency based on the divider value in CCUCON register and the input oscillator. More...
IFX_INLINE float32 | IfxScuCcu_getOscFrequency (void)
API to get Oscillator 0 frequency. This API returns the fOsc0 frequency based on the divider value in CCUCON register and the input oscillator. More...
IFX_INLINE IfxScuCcu_PllInputClockSelection | IfxScuCcu_getSourceSelection (void)
Returns the clock source selection. More...
IFX_INLINE float32 | IfxScuCcu_getStmFrequency (void)
API to get STM divider frequency. This API returns the based on the divider value in CCUCON register and fSOURCE. More...
IFX_EXTERN float32 | IfxScuCcu_getAsclinSFrequency (void)
API to get ASCLINS divider frequency. This API returns the ASCLINS frequency based on the divider value in CCUCON register and fSOURCE. More...
IFX_EXTERN float32 | IfxScuCcu_getBbbFrequency (void)
API to get BBB divider frequency. This API returns the BBBDivider frequency based on the divider value in CCUCON register and the input oscillator. More...
IFX_EXTERN float32 | IfxScuCcu_getCpuFrequency (const IfxCpu_ResourceCpu cpu)
This API returns the Cpu frequency based on the divider value in CCUCON register and fSource frequency. More...
IFX_EXTERN float32 | IfxScuCcu_getFsi2Frequency (void)
API to get FSI2 divider frequency in Hz. This API returns the fFSI2 frequency based on the divider value in CCUCON register and the input oscillator. More...
IFX_EXTERN float32 | IfxScuCcu_getFsiFrequency (void)
API to get FSI divider frequency in Hz. This API returns the fFSI based on the divider value in CCUCON register and the input oscillator. More...
IFX_EXTERN float32 | IfxScuCcu_getMcanFrequency (void)
API to get MCAN divider frequency. This API returns the based on the divider value in CCUCON register and fSOURCE. More...
IFX_EXTERN float32 | IfxScuCcu_getModuleFrequency (void)
get source frequency fSOURCE. This API returns the source frequency based on the configurations with CCUCON register configuration. More...
IFX_EXTERN float32 | IfxScuCcu_getMscFrequency (void)
API to get MSC divider frequency. This API returns the based on the divider value in CCUCON register and fSOURCE. More...
IFX_EXTERN float32 | IfxScuCcu_getPerPllFrequency1 (void)
API to get actual PER PLL1 frequency This API returns the PER PLL1 frequency based on the K2 divider value in PLLCON and the VCO frequency. Fpll1= (Fosc*N)/(P*K2) More...
IFX_EXTERN float32 | IfxScuCcu_getPerPllFrequency2 (void)
API to get actual PER PLL2 (K3 Divider) frequency This API returns the PER PLL2 frequency based on the K3 divider value in PLLCON and the VCO frequency. Fpll2= (Fosc*N)/(P*K3*1.6) // DIVBY = 0, Fpll2= (Fosc*N)/(P*K3*2) // DIVBY = 1. More...
IFX_EXTERN float32 | IfxScuCcu_getPllFrequency (void)
API to get actual Sys PLL output frequency. This API returns the based on the divider values in CCUCON, PLLCON registers and the input oscillator. More...
IFX_EXTERN float32 | IfxScuCcu_getQspiFrequency (void)
API to get Qspi divider frequency. This API returns the based on the divider value in CCUCON register and fSOURCE. More...
IFX_EXTERN float32 | IfxScuCcu_getSourceFrequency (IfxScuCcu_Fsource fsource)
get source frequency fSOURCE. This API returns the source frequency based on the configurations with CCUCON register configuration. More...
IFX_EXTERN float32 | IfxScuCcu_getSpbFrequency (void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider mode and/or SPBDIV divider value in CCUCON registers. More...
IFX_EXTERN float32 | IfxScuCcu_getSriFrequency (void)
API to get SRI divider frequency. This API returns the Sri frequency based on the divider values in CCUCON registers and fSOURCE. More...
IFX_EXTERN float32 | IfxScuCcu_setAsclinFFrequency (float32 asclinFFreq)
API to set ASCLINF frequency (with ASCLINF divider) This API configure ASCLINF divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
IFX_EXTERN float32 | IfxScuCcu_setAsclinSFrequency (float32 asclinSFreq)
API to set ASCLINS frequency (with ASCLINS divider) This API configure ASCLINS divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
IFX_EXTERN float32 | IfxScuCcu_setBbbFrequency (float32 bbbFreq)
API to set BBB frequency (with Bbb divider) This API configure Bbb divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
IFX_EXTERN float32 | IfxScuCcu_setCpuFrequency (IfxCpu_ResourceCpu cpu, float32 cpuFreq)
API to set CPU frequency (with CPU divider) This API configure CPU divider values in CCUCON registers. The actual frequency is always depends on the feasibility with the divider value. More...
IFX_EXTERN float32 | IfxScuCcu_setFsi2Frequency (float32 fsi2Freq)
API to set FSI2 frequency (with FSI2 divider) This API configure Fsi2 divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
IFX_EXTERN float32 | IfxScuCcu_setFsiFrequency (float32 fsiFreq)
API to set FSI frequency (with FSI divider) This API configure Fsi divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
IFX_EXTERN float32 | IfxScuCcu_setGethFrequency (float32 gethFreq)
API to set GETH frequency (with GETH divider) This API configure geth divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
IFX_EXTERN float32 | IfxScuCcu_setGtmFrequency (float32 gtmFreq)
API to set GTM frequency (with GTM divider) This API configure GTM divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
IFX_EXTERN float32 | IfxScuCcu_setI2cFrequency (float32 i2cFreq)
API to set I2C frequency (with I2C divider) This API configure adas divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
IFX_EXTERN float32 | IfxScuCcu_setMcanFrequency (float32 mcanFreq)
API to set MCAN frequency (with MCAN divider) This API configure MCAN divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
IFX_EXTERN float32 | IfxScuCcu_setMcanhFrequency (float32 mcanhFreq)
API to set MCANH frequency (with MCANH divider) This API configure mcanh divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
IFX_EXTERN float32 | IfxScuCcu_setMscFrequency (float32 mscFreq)
API to set MSC frequency (with MSC divider) This API configure MSC divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
IFX_EXTERN float32 | IfxScuCcu_setQspiFrequency (float32 qspiFreq)
API to set QSPI frequency (with QSPI divider) This API configure Qspi divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
IFX_EXTERN float32 | IfxScuCcu_setSpbFrequency (float32 spbFreq)
API to set SPB frequency (with SPB divider) This API configure SPB divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
IFX_EXTERN float32 | IfxScuCcu_setSriFrequency (float32 sriFreq)
API to set SRI frequency (with SRI divider) This API configure Sri divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
IFX_EXTERN float32 | IfxScuCcu_setStmFrequency (float32 stmFreq)
API to set STM frequency (with STM divider) This API configure Stm divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
IFX_INLINE boolean | IfxScuCcu_configureCcuInitialStep (const IfxScuCcu_InitialStepConfig *pllInitStepCfg)
This inline function configures the Ccu SYS PLLs initial step and PER PLL. More...
IFX_INLINE boolean | IfxScuCcu_distributeClockInline (const IfxScuCcu_ClockDistributionConfig *clockDistributionConfig)
Inlined API for clock distribution For each CCUCON register update the configured value with the mask. More...
IFX_EXTERN void | IfxScuCcu_distributeClock (IfxScuCcu_ClockDistributionConfig *clockDistributionConfig)
API for clock distribution. More...
IFX_EXTERN boolean | IfxScuCcu_init (const IfxScuCcu_Config *config)
API to initialize the SCU Clock Control Unit. This API initialize the Sys PLL with ramp steps, BUS dividers and Per PLL for the configuration provided by the configuration structure. FSyspll = (Fosc * Nsys)/(Psys * K2sys); Fpll1= (Fosc * Nper)/(Pper * K2per); Fpll2= (Fosc * Nper)/(Pper * K3per * 1.6); // if DIVBY = 0, else Fpll2= (Fosc * Nper)/(Pper * K3per * 2) // if DIVBY = 1. More...
IFX_EXTERN void | IfxScuCcu_initConfig (IfxScuCcu_Config *cfg)
Initializes the clock configuration with default values. More...
IFX_EXTERN void | IfxScuCcu_switchToBackupClock (const IfxScuCcu_Config *cfg)
API to switch to Backup clock from the current PLL frequency. More...
IFX_INLINE void | IfxScuCcu_clearTrapStatusFlag (IfxScuCcu_Traprequest request)
Clear the trap status flag. More...
IFX_INLINE boolean | IfxScuCcu_getTrapDisableFlag (IfxCpu_ResourceCpu cpuIndex, IfxScuCcu_Traprequest request)
Get trap disable flag. More...
IFX_INLINE boolean | IfxScuCcu_getTrapStatusFlag (IfxScuCcu_Traprequest request)
Get the trap status. More...
IFX_INLINE void | IfxScuCcu_setTrapDisableFlag (IfxCpu_ResourceCpu cpuIndex, IfxScuCcu_Traprequest request)
Set the trap disable flag. More...
IFX_INLINE void | IfxScuCcu_setTrapStatusFlag (IfxScuCcu_Traprequest request)
Set the trap status flag. More...
IFX_INLINE boolean | IfxScuCcu_throttleSysPllClockInline (const IfxScuCcu_PllThrottleConfig *pllThrottleConfig)
IFX_EXTERN void | IfxScuCcu_calRGainParameters (IfxScuCcu_ModulationAmplitude modamp, IfxScuCcu_RGain_Values *RGain_P)
IFX_EXTERN void | IfxScuCcu_modulation_init (const IfxScuCcu_Mod_Config *Mod_Cfg)
initialize modulation parameters More...
IFX_EXTERN void | IfxScuCcu_throttleSysPllClock (IfxScuCcu_PllThrottleConfig *pllThrottleConfig)

Variables

IFX_EXTERN IFX_CONST float32 IfxScuCcu_MA_percent [IfxScuCcu_ModulationAmplitude_count]
maps to the IfxScuCcu_ModulationAmplitude enum More...
IFX_EXTERN IFX_CONST IfxScuCcu_Config IfxScuCcu_defaultClockConfig
Configuration structure for SCU CCU driver. The values of this structure are defined as # defined macros in the implementation of Scu. More...
IFX_EXTERN IFX_CONST IfxScuCcu_Mod_Config IfxScuCcu_defaultModConfig
default modulation config More...
IFX_EXTERN uint32 IfxScuCcu_xtalFrequency

Detailed Description

SCU basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxScuCcu.h.

Data Structure Documentation

◆ IfxScuCcu_Mod_Config

struct IfxScuCcu_Mod_Config

modulation config

Definition at line 647 of file IfxScuCcu.h.

Data Fields
IfxScuCcu_ModulationAmplitude | Mod_Amp | modulation amplitude
IfxScuCcu_ModEn | Mod_Enable | modulation enable

◆ IfxScuCcu_RGain_Values

struct IfxScuCcu_RGain_Values

structure holding the RGain parameters for modulation

Definition at line 670 of file IfxScuCcu.h.

Data Fields
uint16 | RGainHex | RGain Hex value.
float32 | RGainNom | RGain Nominal value.

Macro Definition Documentation

◆ IFXSCUCCU_CCUCON_LCK_BIT_TIMEOUT_COUNT

#define IFXSCUCCU_CCUCON_LCK_BIT_TIMEOUT_COUNT (0x1000U)

~40uS max wait time

Definition at line 218 of file IfxScuCcu.h.

Referenced by IfxScuCcu_configureCcuInitialStep(), and IfxScuCcu_distributeClockInline().

◆ IFXSCUCCU_FLASHWAITSTATECHECK

#define IFXSCUCCU_FLASHWAITSTATECHECK (0)

Define to include the flash wait state check in ScuCcu_init()

Definition at line 275 of file IfxScuCcu.h.

◆ IFXSCUCCU_GET_MODCFG

#define IFXSCUCCU_GET_MODCFG ( RGain_Hex ) ((uint16)(IFXSCUCCU_MODCFG_DEFAULT_VAL << IFXSCUCCU_MODCFG_DEFAULT_SHIFT) | (uint16)(RGain_Hex))

Get MODCFG from RGAIN_HEX.

Definition at line 271 of file IfxScuCcu.h.

Referenced by IfxScuCcu_modulation_init().

◆ IFXSCUCCU_GET_RGAIN_HEX

#define IFXSCUCCU_GET_RGAIN_HEX ( RGain_Nom ) ((uint16)((RGain_Nom * 32) + 0.5))

Get RGAin HEX from RGain Nominal value.

Definition at line 267 of file IfxScuCcu.h.

Referenced by IfxScuCcu_calRGainParameters().

◆ IFXSCUCCU_GET_RGAIN_NOM

#define IFXSCUCCU_GET_RGAIN_NOM | ( | MA,
 |  | FDco
 | ) | ((2 * (MA / 100) * (FDco / IFXSCUCCU_MODULATION_FREQ_HZ)))

get Rgain from MA and FDco

Definition at line 263 of file IfxScuCcu.h.

Referenced by IfxScuCcu_calRGainParameters().

◆ IFXSCUCCU_LOOP_TIMEOUT_CHECK

#define IFXSCUCCU_LOOP_TIMEOUT_CHECK | ( | tVar,
 |  | tErr
 | ) |
Value:
{ \
if (((sint32)--tVar) <= 0) \
{ \
tErr = (uint8)1; \
break; \
} \
else \
{ \
} \
}
sint32
long sint32
Definition: Platform_Types.h:134
uint8
unsigned char uint8
Definition: Platform_Types.h:108

Definition at line 237 of file IfxScuCcu.h.

Referenced by IfxScuCcu_configureCcuInitialStep(), IfxScuCcu_distributeClockInline(), and IfxScuCcu_throttleSysPllClockInline().

◆ IFXSCUCCU_LPTONORMAL_WAITTIME

#define IFXSCUCCU_LPTONORMAL_WAITTIME (0.00001f)

10 microsecond wait time between steps to jump back to normal mode.

Definition at line 280 of file IfxScuCcu.h.

Referenced by IfxScuCcu_switchToNormalMode().

◆ IFXSCUCCU_MODCFG_DEFAULT_SHIFT

#define IFXSCUCCU_MODCFG_DEFAULT_SHIFT (10)

MODCFG shift value for SYSPLLCON2.

Definition at line 255 of file IfxScuCcu.h.

◆ IFXSCUCCU_MODCFG_DEFAULT_VAL

#define IFXSCUCCU_MODCFG_DEFAULT_VAL ((uint32)0x3D)

MODCFG default value - for SYSPLLCON2[15:10].

Definition at line 259 of file IfxScuCcu.h.

◆ IFXSCUCCU_MODULATION_FREQ_HZ

#define IFXSCUCCU_MODULATION_FREQ_HZ (3600000)

Modulation frequency.

Definition at line 251 of file IfxScuCcu.h.

◆ IFXSCUCCU_OSC_STABLECHK_TIME

#define IFXSCUCCU_OSC_STABLECHK_TIME (640)

Oscillator stability check timeout count.

Definition at line 208 of file IfxScuCcu.h.

◆ IFXSCUCCU_OSCCON_PLLLV_OR_HV_TIMEOUT_COUNT

#define IFXSCUCCU_OSCCON_PLLLV_OR_HV_TIMEOUT_COUNT (0x493E0U)

3mS max wait time for PLL power down/up state update

Definition at line 235 of file IfxScuCcu.h.

Referenced by IfxScuCcu_configureCcuInitialStep().

◆ IFXSCUCCU_PLL_KRDY_TIMEOUT_COUNT

#define IFXSCUCCU_PLL_KRDY_TIMEOUT_COUNT (0x6000U)

~244uS max wait time

Definition at line 231 of file IfxScuCcu.h.

Referenced by IfxScuCcu_configureCcuInitialStep(), and IfxScuCcu_throttleSysPllClockInline().

◆ IFXSCUCCU_PLL_LOCK_TIMEOUT_COUNT

#define IFXSCUCCU_PLL_LOCK_TIMEOUT_COUNT (0x3000U)

~122uS max wait time for PLL locking

Definition at line 223 of file IfxScuCcu.h.

Referenced by IfxScuCcu_configureCcuInitialStep().

◆ IFXSCUCCU_SMUALARM_MASK

#define IFXSCUCCU_SMUALARM_MASK (0x1DU)

Definition at line 213 of file IfxScuCcu.h.

Referenced by IfxScuCcu_configureCcuInitialStep().

◆ IFXSCUCCU_SYSPLLSTAT_PWDSTAT_TIMEOUT_COUNT

#define IFXSCUCCU_SYSPLLSTAT_PWDSTAT_TIMEOUT_COUNT (0x3000U)

~122uS max wait time for PLL power down/up state update

Definition at line 227 of file IfxScuCcu.h.

Referenced by IfxScuCcu_configureCcuInitialStep().

Typedef Documentation

◆ IfxScuCcu_PllStepsFunctionHook

typedef void(* IfxScuCcu_PllStepsFunctionHook) (void)

Function pointer type for the hooks.

Returns
None

Definition at line 290 of file IfxScuCcu.h.

Enumeration Type Documentation

◆ IfxScuCcu_ModEn

enum IfxScuCcu_ModEn

modulation enable

Enumerator
IfxScuCcu_ModEn_disabled | disable modulation
IfxScuCcu_ModEn_enabled | enable modulation

Definition at line 531 of file IfxScuCcu.h.

Function Documentation

◆ IfxScuCcu_calRGainParameters()

IFX_EXTERN void IfxScuCcu_calRGainParameters | ( | IfxScuCcu_ModulationAmplitude | modamp,
 |  | IfxScuCcu_RGain_Values * | RGain_P
 | ) |  |
Parameters
modamp | modulation amplitude
RGain_P | RGain values
Returns
None

Definition at line 100 of file IfxScuCcu.c.

Referenced by IfxScuCcu_modulation_init().

◆ IfxScuCcu_clearTrapStatusFlag()

IFX_INLINE void IfxScuCcu_clearTrapStatusFlag ( IfxScuCcu_Traprequest request )

Clear the trap status flag.

Parameters
request Trap request type.
Returns
None

Definition at line 1165 of file IfxScuCcu.h.

◆ IfxScuCcu_getTrapDisableFlag()

IFX_INLINE boolean IfxScuCcu_getTrapDisableFlag | ( | IfxCpu_ResourceCpu | cpuIndex,
 |  | IfxScuCcu_Traprequest | request
 | ) |  |

Get trap disable flag.

Parameters
cpuIndex | Cpu index
request | Trap request type.
Returns
Trap request can be generated or not.

Definition at line 1679 of file IfxScuCcu.h.

◆ IfxScuCcu_getTrapStatusFlag()

IFX_INLINE boolean IfxScuCcu_getTrapStatusFlag ( IfxScuCcu_Traprequest request )

Get the trap status.

Parameters
request Trap request type.
Returns
Trap was requested or not.

Definition at line 1688 of file IfxScuCcu.h.

◆ IfxScuCcu_modulation_init()

IFX_EXTERN void IfxScuCcu_modulation_init ( const IfxScuCcu_Mod_Config * Mod_Cfg )

initialize modulation parameters

Parameters
Mod_Cfg modulation configuration
Returns
None

Definition at line 600 of file IfxScuCcu.c.

Referenced by IfxScuCcu_init().

◆ IfxScuCcu_setTrapDisableFlag()

IFX_INLINE void IfxScuCcu_setTrapDisableFlag | ( | IfxCpu_ResourceCpu | cpuIndex,
 |  | IfxScuCcu_Traprequest | request
 | ) |  |

Set the trap disable flag.

Parameters
cpuIndex | Cpu index.
request | Trap request type.
Returns
None

Definition at line 1698 of file IfxScuCcu.h.

◆ IfxScuCcu_setTrapStatusFlag()

IFX_INLINE void IfxScuCcu_setTrapStatusFlag ( IfxScuCcu_Traprequest request )

Set the trap status flag.

Parameters
request Trap request type.
Returns
None

Definition at line 1706 of file IfxScuCcu.h.

◆ IfxScuCcu_throttleSysPllClock()

IFX_EXTERN void IfxScuCcu_throttleSysPllClock ( IfxScuCcu_PllThrottleConfig * pllThrottleConfig )
Returns
None

Definition at line 1405 of file IfxScuCcu.c.

◆ IfxScuCcu_throttleSysPllClockInline()

IFX_INLINE boolean IfxScuCcu_throttleSysPllClockInline ( const IfxScuCcu_PllThrottleConfig * pllThrottleConfig )

Definition at line 1713 of file IfxScuCcu.h.

Referenced by IfxScuCcu_init(), and IfxScuCcu_throttleSysPllClock().

Variable Documentation

◆ IfxScuCcu_defaultClockConfig

IFX_EXTERN IFX_CONST IfxScuCcu_Config IfxScuCcu_defaultClockConfig

Configuration structure for SCU CCU driver. The values of this structure are defined as # defined macros in the implementation of Scu.

Definition at line 1153 of file IfxScuCcu.h.

◆ IfxScuCcu_defaultModConfig

IFX_EXTERN IFX_CONST IfxScuCcu_Mod_Config IfxScuCcu_defaultModConfig

default modulation config

Definition at line 1157 of file IfxScuCcu.h.

◆ IfxScuCcu_MA_percent

IFX_EXTERN IFX_CONST float32 IfxScuCcu_MA_percent[IfxScuCcu_ModulationAmplitude_count]

maps to the IfxScuCcu_ModulationAmplitude enum

Definition at line 1148 of file IfxScuCcu.h.

◆ IfxScuCcu_xtalFrequency

IFX_EXTERN uint32 IfxScuCcu_xtalFrequency

Definition at line 1159 of file IfxScuCcu.h.


iLLD_TC38A: IfxScuEru.h File Reference

  • Scu
  • Std
Enumerations | Functions
IfxScuEru.h File Reference
iLLD » SCU

SCU basic functionality. More...

#include "_Impl/IfxScu_cfg.h"
#include "IfxScu_reg.h"
#include "Cpu/Std/IfxCpu.h"
#include "_PinMap/IfxScu_PinMap.h"
#include "Scu/Std/IfxScuWdt.h"
Include dependency graph for IfxScuEru.h:

Go to the source code of this file.

Enumerations

enum IfxScuEru_ExternalInputSelection {
IfxScuEru_ExternalInputSelection_0 = 0,
IfxScuEru_ExternalInputSelection_1,
IfxScuEru_ExternalInputSelection_2,
IfxScuEru_ExternalInputSelection_3,
IfxScuEru_ExternalInputSelection_4,
IfxScuEru_ExternalInputSelection_5
}
Input line selection for input channel
Definition in Ifx_SCU.EICR[i].B.EXIS(j) (i = 0,1,2,3 and j = 0,1) More...
enum IfxScuEru_InputChannel {
IfxScuEru_InputChannel_0 = 0,
IfxScuEru_InputChannel_1,
IfxScuEru_InputChannel_2,
IfxScuEru_InputChannel_3,
IfxScuEru_InputChannel_4,
IfxScuEru_InputChannel_5,
IfxScuEru_InputChannel_6,
IfxScuEru_InputChannel_7
}
Input channel for input selection and conditioning of trigger or gating functions. More...
enum IfxScuEru_InputFilterDepth {
IfxScuEru_InputFilterDepth_disable = 0,
IfxScuEru_InputFilterDepth_1,
IfxScuEru_InputFilterDepth_2,
IfxScuEru_InputFilterDepth_3,
IfxScuEru_InputFilterDepth_4,
IfxScuEru_InputFilterDepth_5,
IfxScuEru_InputFilterDepth_6,
IfxScuEru_InputFilterDepth_7,
IfxScuEru_InputFilterDepth_8,
IfxScuEru_InputFilterDepth_9,
IfxScuEru_InputFilterDepth_10,
IfxScuEru_InputFilterDepth_11,
IfxScuEru_InputFilterDepth_12,
IfxScuEru_InputFilterDepth_13,
IfxScuEru_InputFilterDepth_14,
IfxScuEru_InputFilterDepth_15
}
Digital Glitch Filter Clock Depth determines the number of port input samples considered
in the calculation of the floating average digital filter output for all enabled FLRQ filters.
Definition in Ifx_SCU.EIFILT.B.DEPTH. More...
enum IfxScuEru_InputFilterPredivider {
IfxScuEru_InputFilterPredivider_disable = 0,
IfxScuEru_InputFilterPredivider_1,
IfxScuEru_InputFilterPredivider_2,
IfxScuEru_InputFilterPredivider_3,
IfxScuEru_InputFilterPredivider_4,
IfxScuEru_InputFilterPredivider_5,
IfxScuEru_InputFilterPredivider_6,
IfxScuEru_InputFilterPredivider_7,
IfxScuEru_InputFilterPredivider_8,
IfxScuEru_InputFilterPredivider_9,
IfxScuEru_InputFilterPredivider_10,
IfxScuEru_InputFilterPredivider_11,
IfxScuEru_InputFilterPredivider_12,
IfxScuEru_InputFilterPredivider_13,
IfxScuEru_InputFilterPredivider_14,
IfxScuEru_InputFilterPredivider_15
}
Digital Glitch Filter Clock Predivider to generate the digital filter sample clock
Definition in Ifx_SCU.EIFILT.B.FILTDIV. More...
enum IfxScuEru_InputFilterRequestSelection {
IfxScuEru_InputFilterRequestSelection_0A,
IfxScuEru_InputFilterRequestSelection_5A,
IfxScuEru_InputFilterRequestSelection_2A,
IfxScuEru_InputFilterRequestSelection_3A,
IfxScuEru_InputFilterRequestSelection_0C,
IfxScuEru_InputFilterRequestSelection_1C,
IfxScuEru_InputFilterRequestSelection_3C,
IfxScuEru_InputFilterRequestSelection_2C,
IfxScuEru_InputFilterRequestSelection_4A,
IfxScuEru_InputFilterRequestSelection_6A,
IfxScuEru_InputFilterRequestSelection_1A,
IfxScuEru_InputFilterRequestSelection_7A,
IfxScuEru_InputFilterRequestSelection_6D,
IfxScuEru_InputFilterRequestSelection_4D,
IfxScuEru_InputFilterRequestSelection_2D,
IfxScuEru_InputFilterRequestSelection_3D,
IfxScuEru_InputFilterRequestSelection_7C
}
Digital port pin selection for input filter
Definition in Ifx_SCU.EIFILT.B.FILRQ(i)(j) (i = 0 to7 and j = A, B, C, D) More...
enum IfxScuEru_InputNodePointer {
IfxScuEru_InputNodePointer_0 = 0,
IfxScuEru_InputNodePointer_1,
IfxScuEru_InputNodePointer_2,
IfxScuEru_InputNodePointer_3,
IfxScuEru_InputNodePointer_4,
IfxScuEru_InputNodePointer_5,
IfxScuEru_InputNodePointer_6,
IfxScuEru_InputNodePointer_7
}
Determines the destination (output channel) for trigger event (if enabled by Ifx_SCU.EICR[i].B.EIEN(j)).
Definition in Ifx_SCU.EICR[i].B.INP(j) (i = 0,1,2,3 and j = 0,1) More...
enum IfxScuEru_InterruptGatingPattern {
IfxScuEru_InterruptGatingPattern_none = 0,
IfxScuEru_InterruptGatingPattern_alwaysActive = 1,
IfxScuEru_InterruptGatingPattern_patternMatch = 2,
IfxScuEru_InterruptGatingPattern_patternMiss = 3
}
Determines the pattern detection influence on the ouput lines ERU_GOUTy and ERU_IOUTy
Definition in Ifx_SCU.IGCR[i].B.IGP(j) (i = 0,1,2,3 and j = 0,1) More...
enum IfxScuEru_OutputChannel {
IfxScuEru_OutputChannel_0 = 0,
IfxScuEru_OutputChannel_1,
IfxScuEru_OutputChannel_2,
IfxScuEru_OutputChannel_3,
IfxScuEru_OutputChannel_4,
IfxScuEru_OutputChannel_5,
IfxScuEru_OutputChannel_6,
IfxScuEru_OutputChannel_7
}
Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...) More...

Functions

IFX_INLINE void | IfxScuEru_initReqPin (IfxScu_Req_In *req, IfxPort_InputMode inputMode)
Initialises the External request Pin. More...
IFX_EXTERN void | IfxScuEru_selectExternalInput (IfxScuEru_InputChannel inputChannel, IfxScuEru_ExternalInputSelection inputSignal)
Determines which input line is selcted for input channel x. More...
IFX_EXTERN void | IfxScuEru_clearAllEventFlags (void)
Clears the external event flag of input channel x (INTFx) More...
IFX_EXTERN void | IfxScuEru_clearEventFlag (IfxScuEru_InputChannel inputChannel)
Clears the external event flag of input channel x (INTFx) More...
IFX_EXTERN void | IfxScuEru_clearInputChannelConfiguration (IfxScuEru_InputChannel inputChannel)
Clears all the configuration for the given input channel x. More...
IFX_EXTERN void | IfxScuEru_disableAutoClear (IfxScuEru_InputChannel inputChannel)
Disables the automatic clearing of INTFx when the edge of input channel which has not been selected, is detected. More...
IFX_EXTERN void | IfxScuEru_disableFallingEdgeDetection (IfxScuEru_InputChannel inputChannel)
Disables the falling edge of input channel to set the bit INTF x. More...
IFX_EXTERN void | IfxScuEru_disableRisingEdgeDetection (IfxScuEru_InputChannel inputChannel)
Disables the rising edge of input channel to set the bit INTF x. More...
IFX_EXTERN void | IfxScuEru_enableAutoClear (IfxScuEru_InputChannel inputChannel)
Enables the automatic clearing of INTFx when the edge of input channel which has not been selected, is detected. More...
IFX_EXTERN void | IfxScuEru_enableFallingEdgeDetection (IfxScuEru_InputChannel inputChannel)
Enables the falling edge of input channel to set the bit INTF x. More...
IFX_EXTERN void | IfxScuEru_enableRisingEdgeDetection (IfxScuEru_InputChannel inputChannel)
Enables the rising edge of input channel to set the bit INTF x. More...
IFX_EXTERN uint32 | IfxScuEru_getAllEventFlagsStatus (void)
Returns the status of the flags of all input channels. More...
IFX_EXTERN boolean | IfxScuEru_getEventFlagStatus (IfxScuEru_InputChannel inputChannel)
Returns the status of the external event flag of input channel x (INTFx) More...
IFX_EXTERN uint32 | IfxScuEru_getInputChannelConfiguration (IfxScuEru_InputChannel inputChannel)
Returns all the configuration for the given input channel x. More...
IFX_EXTERN void | IfxScuEru_setEventFlag (IfxScuEru_InputChannel inputChannel)
Sets the external event flag of input channel x (INTFx) More...
IFX_EXTERN void | IfxScuEru_connectTrigger (IfxScuEru_InputChannel inputChannel, IfxScuEru_InputNodePointer triggerSelect)
Determines the destination (output channel) for trigger event (if enabled by Ifx_SCU.EICR[i].B.EIEN(j), i = 0,1,2,3 and j = 0,1). More...
IFX_EXTERN void | IfxScuEru_disableTriggerPulse (IfxScuEru_InputChannel inputChannel)
Disables the generation of a trigger event for input channel x when the selected edge is detected. More...
IFX_EXTERN void | IfxScuEru_enableTriggerPulse (IfxScuEru_InputChannel inputChannel)
Enables the generation of a trigger event for input channel x when the selected edge is detected. More...
IFX_EXTERN void | IfxScuEru_setFlagPatternDetection (IfxScuEru_OutputChannel outputChannel, IfxScuEru_InputChannel inputChannel, boolean state)
Enables the flag INTFx to take part in the pattern detection for output gating. More...
IFX_EXTERN void | IfxScuEru_clearOutputChannelConfiguration (IfxScuEru_OutputChannel outputChannel)
Clears all the configuration for the given input channel y. More...
IFX_EXTERN void | IfxScuEru_disablePatternDetectionTrigger (IfxScuEru_OutputChannel outputChannel)
Disables the generation of a trigger event for output channel y when the result of the pattern detection changes. More...
IFX_EXTERN void | IfxScuEru_enablePatternDetectionTrigger (IfxScuEru_OutputChannel outputChannel)
Enables the generation of a trigger event for output channel y when the result of the pattern detection changes. More...
IFX_EXTERN uint32 | IfxScuEru_getOutputChannelConfiguration (IfxScuEru_OutputChannel outputChannel)
Clears all the configuration for the given input channel y. More...
IFX_EXTERN boolean | IfxScuEru_getPatternDetectionResult (IfxScuEru_OutputChannel outputChannel)
Returns the status of the pattern detection result of output channel y (PDRy) More...
IFX_EXTERN uint32 | IfxScuEru_getWholePatternDetectionResult (void)
Returns the whole pattern detection result of all the selcted output channels. More...
IFX_EXTERN void | IfxScuEru_setInterruptGatingPattern (IfxScuEru_OutputChannel outputChannel, IfxScuEru_InterruptGatingPattern gatingPattern)
Sets the gating pattern of a ouput channel y to determine how the pattern detection influences the output lines GOUT and IOUT. More...
IFX_INLINE void | IfxScuEru_disableInputFilter (IfxScuEru_InputFilterRequestSelection requestSelection)
Enables the input filter for the selected digital pin (REQxy) More...
IFX_INLINE void | IfxScuEru_enableInputFilter (IfxScuEru_InputFilterRequestSelection requestSelection)
Enables the input filter for the selected digital pin (REQxy) More...
IFX_INLINE void | IfxScuEru_setInputFilterDepth (IfxScuEru_InputFilterDepth depth)
Sets the digital glitch filter depth. More...
IFX_INLINE void | IfxScuEru_setInputFilterPredivider (IfxScuEru_InputFilterPredivider predivider)
Sets the digital glitch filter predivider. More...

Detailed Description

SCU basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxScuEru.h.


iLLD_TC38A: IfxScuLbist.h File Reference

  • Scu
  • Std
Data Structures | Enumerations | Functions | Variables
IfxScuLbist.h File Reference
iLLD » SCU

SCU basic functionality. More...

#include "_Impl/IfxScu_cfg.h"
#include "Cpu/Std/Ifx_Types.h"
#include "IfxScu_reg.h"
#include "Scu/Std/IfxScuWdt.h"
#include "Cpu/Std/IfxCpu.h"
#include "IfxScu_bf.h"
Include dependency graph for IfxScuLbist.h:

Go to the source code of this file.

Data Structures

struct | IfxScuLbist_ParameterSet
configuration data structure for the LBIST parameters More...
struct | IfxScuLbist_MultiTriggerConfig

Enumerations

enum IfxScuLbist_Application {
IfxScuLbist_Application_pt = 0,
IfxScuLbist_Application_body = 1
}
Application selection bit for LBIST. More...
enum IfxScuLbist_Freq {
IfxScuLbist_Freq_div1 = 0,
IfxScuLbist_Freq_div2 = 1,
IfxScuLbist_Freq_div3 = 2,
IfxScuLbist_Freq_div4 = 3,
IfxScuLbist_Freq_div5 = 4,
IfxScuLbist_Freq_div6 = 5,
IfxScuLbist_Freq_div7 = 6,
IfxScuLbist_Freq_div8 = 7,
IfxScuLbist_Freq_div9 = 8,
IfxScuLbist_Freq_div10 = 9,
IfxScuLbist_Freq_div11 = 10,
IfxScuLbist_Freq_div12 = 11,
IfxScuLbist_Freq_div13 = 12,
IfxScuLbist_Freq_div14 = 13,
IfxScuLbist_Freq_div15 = 14,
IfxScuLbist_Freq_div16 = 15
}
prescaler values to divide the EVR frequency for the LBIST operational clock More...
enum IfxScuLbist_SplitShiftSel {
IfxScuLbist_SplitShiftSel_allScanPartitions = 0,
IfxScuLbist_SplitShiftSel_fourScanPartitions = 4,
IfxScuLbist_SplitShiftSel_twoScanPartitions = 5
}
Split Shift Selection. More...

Functions

IFX_INLINE boolean | IfxScuLbist_evaluateResult (const uint32 signature)
Evaluate Previous LBIST result. Note: LBIST trigger normally resets the controller to have warm power on reset. More...
IFX_INLINE void | IfxScuLbist_initParameterSetInline (IfxScuLbist_ParameterSet *parameterSet)
Init the default config parameter set. More...
IFX_INLINE boolean | IfxScuLbist_isDone (void)
the api returns Lbist done status More...
IFX_INLINE boolean | IfxScuLbist_multiTriggersInline (const IfxScuLbist_MultiTriggerConfig *multiTriggerConfig)
API is to trigger an LBIST test multiple times for all the configured parameters sets. This API could be triggered only if the firmware LBIST is disabled. More...
IFX_INLINE void | IfxScuLbist_retriggerInline (const IfxScuLbist_ParameterSet *parameterSet)
API to re trigger an LBIST test with new parameters configured to the LBIST controller. More...
IFX_INLINE void | IfxScuLbist_triggerInline (const IfxScuLbist_ParameterSet *parameterSet)
trigger a fresh LBIST irrespective of previous LBIST More...

Variables

IFX_EXTERN IFX_CONST IfxScuLbist_ParameterSet IfxScuLbist_defaultConfig

Detailed Description

SCU basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

LBIST module scans and tests the digital circutary within the microcontroller. This driver provides LBIST APIs which are used to trigger the Logic BIST module. Caution: Draft implementation, APIs may change.

Definition in file IfxScuLbist.h.

Data Structure Documentation

◆ IfxScuLbist_ParameterSet

struct IfxScuLbist_ParameterSet

configuration data structure for the LBIST parameters

Definition at line 113 of file IfxScuLbist.h.

Data Fields
IfxScuLbist_Application | application | LBIST application selection.
IfxScuLbist_Freq | freq | LBIST Frequency Selection. Pre-scaler value to derive LBIST operation clock from EVR oscillator.
uint32 | pattern | LBIST Pattern Number for the scan loads.
uint32 | scanChainLength | LBIST maximum scan chain length.
uint32 | seed | LBIST Seed value (start value for the random pattern generator)
uint32 | signature | LBIST Signature Value to compare with MISR signature from the last LBIST.
IfxScuLbist_SplitShiftSel | splitShiftSel | LBIST Split-Shift Selection.

◆ IfxScuLbist_MultiTriggerConfig

struct IfxScuLbist_MultiTriggerConfig

Definition at line 124 of file IfxScuLbist.h.

Collaboration diagram for IfxScuLbist_MultiTriggerConfig:
[legend]
Data Fields
uint8 | numOfConfigSets | Number of LBIST configuration sets.
IfxScuLbist_ParameterSet * | parameterSets | Pointer to LBIST configuration set array.

Enumeration Type Documentation

◆ IfxScuLbist_Application

enum IfxScuLbist_Application

Application selection bit for LBIST.

Enumerator
IfxScuLbist_Application_pt | LBIST Power-train Application.
IfxScuLbist_Application_body | LBIST Body Application.

Definition at line 70 of file IfxScuLbist.h.

◆ IfxScuLbist_Freq

enum IfxScuLbist_Freq

prescaler values to divide the EVR frequency for the LBIST operational clock

Enumerator
IfxScuLbist_Freq_div1 | LBIST Frequency, EVR Clock Divided by 1.
IfxScuLbist_Freq_div2 | LBIST Frequency, EVR Clock Divided by 2.
IfxScuLbist_Freq_div3 | LBIST Frequency, EVR Clock Divided by 3.
IfxScuLbist_Freq_div4 | LBIST Frequency, EVR Clock Divided by 4.
IfxScuLbist_Freq_div5 | LBIST Frequency, EVR Clock Divided by 5.
IfxScuLbist_Freq_div6 | LBIST Frequency, EVR Clock Divided by 6.
IfxScuLbist_Freq_div7 | LBIST Frequency, EVR Clock Divided by 7.
IfxScuLbist_Freq_div8 | LBIST Frequency, EVR Clock Divided by 8.
IfxScuLbist_Freq_div9 | LBIST Frequency, EVR Clock Divided by 9.
IfxScuLbist_Freq_div10 | LBIST Frequency, EVR Clock Divided by 10.
IfxScuLbist_Freq_div11 | LBIST Frequency, EVR Clock Divided by 11.
IfxScuLbist_Freq_div12 | LBIST Frequency, EVR Clock Divided by 12.
IfxScuLbist_Freq_div13 | LBIST Frequency, EVR Clock Divided by 13.
IfxScuLbist_Freq_div14 | LBIST Frequency, EVR Clock Divided by 14.
IfxScuLbist_Freq_div15 | LBIST Frequency, EVR Clock Divided by 15.
IfxScuLbist_Freq_div16 | LBIST Frequency, EVR Clock Divided by 16.

Definition at line 78 of file IfxScuLbist.h.

◆ IfxScuLbist_SplitShiftSel

enum IfxScuLbist_SplitShiftSel

Split Shift Selection.

Enumerator
IfxScuLbist_SplitShiftSel_allScanPartitions | LBIST Split-Shift Concurrent Scan-Shift Selection.
IfxScuLbist_SplitShiftSel_fourScanPartitions | LBIST Split-Shift Four Scan-Shift Selection.
IfxScuLbist_SplitShiftSel_twoScanPartitions | LBIST Split-Shift Two Scan-Shift Selection.

Definition at line 100 of file IfxScuLbist.h.

Function Documentation

◆ IfxScuLbist_evaluateResult()

IFX_INLINE boolean IfxScuLbist_evaluateResult ( const uint32 signature )

Evaluate Previous LBIST result. Note: LBIST trigger normally resets the controller to have warm power on reset.

Parameters
signature result signature to be evaulated
Returns
False :If the previous LBIST is not done or if the previous LBIST signature did not match with configured value. True : If the previous LBIST is done and signature did match with the configured value

Definition at line 182 of file IfxScuLbist.h.

◆ IfxScuLbist_initParameterSetInline()

IFX_INLINE void IfxScuLbist_initParameterSetInline ( IfxScuLbist_ParameterSet * parameterSet )

Init the default config parameter set.

Parameters
parameterSet pointer to the datastructure which is used for triggering the latest LBIST activity.
Returns
None

Definition at line 188 of file IfxScuLbist.h.

◆ IfxScuLbist_isDone()

IFX_INLINE boolean IfxScuLbist_isDone ( void )

the api returns Lbist done status

Returns
True: Lbist done. False: Lbist not done

Definition at line 194 of file IfxScuLbist.h.

◆ IfxScuLbist_multiTriggersInline()

IFX_INLINE boolean IfxScuLbist_multiTriggersInline ( const IfxScuLbist_MultiTriggerConfig * multiTriggerConfig )

API is to trigger an LBIST test multiple times for all the configured parameters sets. This API could be triggered only if the firmware LBIST is disabled.

Parameters
multiTriggerConfig pointer to the datastructure which is used for triggering the latest LBIST activity.
Returns
True - All the LBIST signatures are matching to the corresponding parameterSets False - If one of the the signatures from multiple LBIST triggers did not match with configured signature within corresponding parameterSet

Definition at line 200 of file IfxScuLbist.h.

◆ IfxScuLbist_retriggerInline()

IFX_INLINE void IfxScuLbist_retriggerInline ( const IfxScuLbist_ParameterSet * parameterSet )

API to re trigger an LBIST test with new parameters configured to the LBIST controller.

Parameters
parameterSet pointer to the datastructure which is used for triggering the latest LBIST activity.
Returns
None

Definition at line 255 of file IfxScuLbist.h.

Referenced by IfxScuLbist_multiTriggersInline().

◆ IfxScuLbist_triggerInline()

IFX_INLINE void IfxScuLbist_triggerInline ( const IfxScuLbist_ParameterSet * parameterSet )

trigger a fresh LBIST irrespective of previous LBIST

Parameters
parameterSet pointer to the datastructure which is used for triggering the latest LBIST activity.
Returns
None

Definition at line 287 of file IfxScuLbist.h.

Referenced by IfxScuLbist_multiTriggersInline().

Variable Documentation

◆ IfxScuLbist_defaultConfig

IFX_EXTERN IFX_CONST IfxScuLbist_ParameterSet IfxScuLbist_defaultConfig

Definition at line 176 of file IfxScuLbist.h.

Referenced by IfxScuLbist_initParameterSetInline().


iLLD_TC38A: IfxScuRcu.h File Reference

  • Scu
  • Std
Data Structures | Macros | Enumerations | Functions
IfxScuRcu.h File Reference
iLLD » SCU

SCU basic functionality. More...

#include "_Impl/IfxScu_cfg.h"
#include "Cpu/Std/Ifx_Types.h"
#include "IfxScu_reg.h"
#include "Scu/Std/IfxScuWdt.h"
#include "Cpu/Std/IfxCpu.h"
Include dependency graph for IfxScuRcu.h:

Go to the source code of this file.

Data Structures

struct IfxScuRcu_ResetCode

Macros

#define | IFXSCURCU_POWERONRESET_MASK
PowerOn Reset Mask. More...
#define | IFXSCURCU_APPLICATIONRESET_MASK
Application Reset Mask. More...

Enumerations

enum IfxScuRcu_ResetType {
IfxScuRcu_ResetType_coldpoweron = 0,
IfxScuRcu_ResetType_system = 1,
IfxScuRcu_ResetType_application = 2,
IfxScuRcu_ResetType_warmpoweron = 3,
IfxScuRcu_ResetType_debug = 4,
IfxScuRcu_ResetType_undefined = 5
}
Reset type. More...
enum IfxScuRcu_Trigger {
IfxScuRcu_Trigger_esr0 = 0,
IfxScuRcu_Trigger_esr1 = 1,
IfxScuRcu_Trigger_smu = 3,
IfxScuRcu_Trigger_sw = 4,
IfxScuRcu_Trigger_stm0 = 5,
IfxScuRcu_Trigger_stm1 = 6,
IfxScuRcu_Trigger_stm2 = 7,
IfxScuRcu_Trigger_stm3 = 8,
IfxScuRcu_Trigger_portst = 16,
IfxScuRcu_Trigger_cb0 = 18,
IfxScuRcu_Trigger_cb1 = 19,
IfxScuRcu_Trigger_cb3 = 20,
IfxScuRcu_Trigger_tp = 21,
IfxScuRcu_Trigger_tcu = 22,
IfxScuRcu_Trigger_evrc = 23,
IfxScuRcu_Trigger_evr33 = 24,
IfxScuRcu_Trigger_swd = 25,
IfxScuRcu_Trigger_hsms = 26,
IfxScuRcu_Trigger_hsma = 27,
IfxScuRcu_Trigger_stbyr = 28,
IfxScuRcu_Trigger_undefined = 255
}
Reset Trigger. More...

Functions

IFX_INLINE void | IfxScuRcu_clearColdResetStatus (void)
API to clear the Cold Reset Status. More...
IFX_INLINE void | IfxScuRcu_configureResetRequestTrigger (IfxScuRcu_Trigger trigger, IfxScuRcu_ResetType resetType)
This function configures the request trigger in the Reset Configuration Register. More...
IFX_INLINE boolean | IfxScuRcu_isApplicationReset (uint32 rawResetStatus)
API to check if the previous reset is application reset or not. More...
IFX_INLINE uint32 | IfxScuRcu_readRawResetStatus (void)
API reads and returns the raw reset value from the hardware register. More...
IFX_EXTERN IfxScuRcu_ResetCode | IfxScuRcu_evaluateReset (void)
This function Evaluate the Reset and returns the reset cause/details. More...
IFX_EXTERN void | IfxScuRcu_performReset (IfxScuRcu_ResetType resetType, uint16 userResetInfo)
This function triggers system/application reset via software. More...

Detailed Description

SCU basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

This file contains the APIs for Reset related functions. Caution: Draft implementation, APIs may change.

Definition in file IfxScuRcu.h.

Data Structure Documentation

◆ IfxScuRcu_ResetCode

struct IfxScuRcu_ResetCode

Definition at line 136 of file IfxScuRcu.h.

Data Fields
boolean | cpuSafeState | CPU Safe state ( 1- Safe, 0 - Non-Safe)
uint16 | resetReason | Reset Reason.
IfxScuRcu_Trigger | resetTrigger | reset Trigger
IfxScuRcu_ResetType | resetType | Reset Type.

Macro Definition Documentation

◆ IFXSCURCU_APPLICATIONRESET_MASK

#define IFXSCURCU_APPLICATIONRESET_MASK
Value:
((IFX_SCU_RSTSTAT_SW_MSK << IFX_SCU_RSTSTAT_SW_OFF) | \
(IFX_SCU_RSTSTAT_STM3_MSK << IFX_SCU_RSTSTAT_STM3_OFF) | \
(IFX_SCU_RSTSTAT_STM2_MSK << IFX_SCU_RSTSTAT_STM2_OFF) | \
(IFX_SCU_RSTSTAT_STM1_MSK << IFX_SCU_RSTSTAT_STM1_OFF) | \
(IFX_SCU_RSTSTAT_STM0_MSK << IFX_SCU_RSTSTAT_STM0_OFF) | \
(IFX_SCU_RSTSTAT_SMU_MSK << IFX_SCU_RSTSTAT_SMU_OFF) | \
(IFX_SCU_RSTSTAT_ESR1_MSK << IFX_SCU_RSTSTAT_ESR1_OFF) | \
(IFX_SCU_RSTSTAT_ESR0_MSK << IFX_SCU_RSTSTAT_ESR0_OFF))

Application Reset Mask.

Definition at line 79 of file IfxScuRcu.h.

Referenced by IfxScuRcu_isApplicationReset().

◆ IFXSCURCU_POWERONRESET_MASK

#define IFXSCURCU_POWERONRESET_MASK
Value:
((IFX_SCU_RSTSTAT_STBYR_MSK << IFX_SCU_RSTSTAT_STBYR_OFF) | \
(IFX_SCU_RSTSTAT_SWD_MSK << IFX_SCU_RSTSTAT_SWD_OFF) | \
(IFX_SCU_RSTSTAT_EVR33_MSK << IFX_SCU_RSTSTAT_EVR33_OFF) | \
(IFX_SCU_RSTSTAT_EVRC_MSK << IFX_SCU_RSTSTAT_EVRC_OFF) | \
(IFX_SCU_RSTSTAT_CB1_MSK << IFX_SCU_RSTSTAT_CB1_OFF) | \
(IFX_SCU_RSTSTAT_CB0_MSK << IFX_SCU_RSTSTAT_CB0_OFF) | \
(IFX_SCU_RSTSTAT_PORST_MSK << IFX_SCU_RSTSTAT_PORST_OFF))

PowerOn Reset Mask.

Definition at line 68 of file IfxScuRcu.h.

Referenced by IfxScuRcu_isApplicationReset().

Enumeration Type Documentation

◆ IfxScuRcu_ResetType

enum IfxScuRcu_ResetType

Reset type.

Enumerator
IfxScuRcu_ResetType_coldpoweron | Cold Power On Reset.
IfxScuRcu_ResetType_system | system Reset
IfxScuRcu_ResetType_application | application reset
IfxScuRcu_ResetType_warmpoweron | Warm Power On Reset.
IfxScuRcu_ResetType_debug | debug reset
IfxScuRcu_ResetType_undefined | Undefined Reset.

Definition at line 95 of file IfxScuRcu.h.

◆ IfxScuRcu_Trigger

enum IfxScuRcu_Trigger

Reset Trigger.

Enumerator
IfxScuRcu_Trigger_esr0 | ESR0.
IfxScuRcu_Trigger_esr1 | ESR1.
IfxScuRcu_Trigger_smu | SMU.
IfxScuRcu_Trigger_sw | SW.
IfxScuRcu_Trigger_stm0 | STM0 Compare Match.
IfxScuRcu_Trigger_stm1 | STM1 Compare Match.
IfxScuRcu_Trigger_stm2 | STM2 Compare Match.
IfxScuRcu_Trigger_stm3 | STM3 Compare Match.
IfxScuRcu_Trigger_portst | PORTST.
IfxScuRcu_Trigger_cb0 | Cerberus System Reset.
IfxScuRcu_Trigger_cb1 | Cerberus Debug Reset.
IfxScuRcu_Trigger_cb3 | Cerberus Application Reset.
IfxScuRcu_Trigger_tp | Tuning protection.
IfxScuRcu_Trigger_tcu | TCU.
IfxScuRcu_Trigger_evrc | EVRC.
IfxScuRcu_Trigger_evr33 | EVR33.
IfxScuRcu_Trigger_swd | Supply Watchdog.
IfxScuRcu_Trigger_hsms | HSM System Reset.
IfxScuRcu_Trigger_hsma | HSM Application Reset.
IfxScuRcu_Trigger_stbyr | Standby Regulator Watchdog.
IfxScuRcu_Trigger_undefined | Undefined Value.

Definition at line 107 of file IfxScuRcu.h.

Function Documentation

◆ IfxScuRcu_clearColdResetStatus()

IFX_INLINE void IfxScuRcu_clearColdResetStatus ( void )

API to clear the Cold Reset Status.

Returns
None

Definition at line 188 of file IfxScuRcu.h.

◆ IfxScuRcu_configureResetRequestTrigger()

IFX_INLINE void IfxScuRcu_configureResetRequestTrigger | ( | IfxScuRcu_Trigger | trigger,
 |  | IfxScuRcu_ResetType | resetType
 | ) |  |

This function configures the request trigger in the Reset Configuration Register.

Returns
None

Definition at line 200 of file IfxScuRcu.h.

◆ IfxScuRcu_evaluateReset()

IFX_EXTERN IfxScuRcu_ResetCode IfxScuRcu_evaluateReset ( void )

This function Evaluate the Reset and returns the reset cause/details.

Returns
Reset code which contains Reset type, trigger and reason details.

Definition at line 59 of file IfxScuRcu.c.

◆ IfxScuRcu_isApplicationReset()

IFX_INLINE boolean IfxScuRcu_isApplicationReset ( uint32 rawResetStatus )

API to check if the previous reset is application reset or not.

Returns
returns application reset (1) or not (0)

Definition at line 250 of file IfxScuRcu.h.

◆ IfxScuRcu_performReset()

IFX_EXTERN void IfxScuRcu_performReset | ( | IfxScuRcu_ResetType | resetType,
 |  | uint16 | userResetInfo
 | ) |  |

This function triggers system/application reset via software.

Parameters
resetType | reset type (only application and system reset are valid)
userResetInfo | user Reset Information
Returns
None

Definition at line 185 of file IfxScuRcu.c.

◆ IfxScuRcu_readRawResetStatus()

IFX_INLINE uint32 IfxScuRcu_readRawResetStatus ( void )

API reads and returns the raw reset value from the hardware register.

Returns
Raw reset status

Definition at line 292 of file IfxScuRcu.h.


iLLD_TC38A: IfxScuWdt.asm.h File Reference

  • Scu
  • Std
Macros | Functions
IfxScuWdt.asm.h File Reference
iLLD » SCU

SCU basic functionality. More...

#include "Cpu/Std/Ifx_Types.h"
#include "IfxScu_reg.h"
Include dependency graph for IfxScuWdt.asm.h:

Go to the source code of this file.

Macros

#define IFXSCUWDT_CALCULATELFSR(pwd) ((((((pwd) >> 13) ^ ((pwd) >> 12) ^ ((pwd) >> 11) ^ ((pwd) >> 1 )) & 1)) | (((pwd)<<1) & 0x3FFF))

Functions

IFX_INLINE uint16 IfxScuWdt_calculateLfsr (uint16 password)
SCUWDT Inline API utility to Calculte new 14-bit LFSR. More...

Detailed Description

SCU basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxScuWdt.asm.h.


iLLD_TC38A: IfxScuWdt.h File Reference

  • Scu
  • Std
Data Structures | Macros | Functions
IfxScuWdt.h File Reference
iLLD » SCU

SCU basic functionality. More...

#include "_Impl/IfxScu_cfg.h"
#include "Cpu/Std/Ifx_Types.h"
#include "IfxScu_reg.h"
#include "IfxScu_bf.h"
#include "IfxScuWdt.asm.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
Include dependency graph for IfxScuWdt.h:

Go to the source code of this file.

Data Structures

struct IfxScuWdt_Config
Configuration structure for Scu Watchdog. IfxScuWdt_Config is a type describing configuration structure of CPU and Safety WDT registers defined in IfxScuWdt.h file. More...

Macros

#define IFXSCUWDT_ENDINIT_WAIT_TIMEOUTCOUNT (0x100)
Endinit operation Timeout counter. More...

Functions

IFX_EXTERN void | IfxScuWdt_initConfig (IfxScuWdt_Config *config)
SCUWDT API to initialize WDT configuration structure - Constructor This API initialize the ScuWdt configuration structure to default values, these default values are for software specific, not necessarily hardware reset values. User must use this API call before IfxScuWdt_Init API call. More...
IFX_EXTERN void | IfxScuWdt_initCpuWatchdog (Ifx_SCU_WDTCPU *wdt, const IfxScuWdt_Config *config)
SCUWDT API to initialize an instance of WDT Driver which corresponds to CPU WDT Hardware module. More...
IFX_EXTERN void | IfxScuWdt_initSafetyWatchdog (Ifx_SCU_WDTS *wdt, const IfxScuWdt_Config *config)
SCUWDT API to initialize an instance of WDT Driver which corresponds to Safety WDT Hardware module. More...
IFX_INLINE void | IfxScuWdt_clearCpuEndinitInline (Ifx_SCU_WDTCPU *watchdog, uint16 password)
SCUWDT Inline API to Clear ENDINIT bit provided by CPU WDT Hardware module. More...
IFX_INLINE void | IfxScuWdt_clearGlobalSafetyEndinitInline (uint16 password)
Clear the Global safety Endinit password (Inline) More...
IFX_INLINE void | IfxScuWdt_clearSafetyEndinitInline (uint16 password)
SCUWDT Inline API to Clear ENDINIT bit provided by Safety WDT Hardware module. More...
IFX_INLINE uint16 | IfxScuWdt_getGlobalSafetyEndinitPasswordInline (void)
API to fetch current password of global safety endinit Watchdog module. More...
IFX_INLINE void | IfxScuWdt_setCpuEndinitInline (Ifx_SCU_WDTCPU *watchdog, uint16 password)
SCUWDT Inline API to Set ENDINIT bit provided by CPU WDT Hardware module. More...
IFX_INLINE void | IfxScuWdt_setGlobalSafetyEndinitInline (uint16 password)
Set the Global safety Endinit password (Inline) More...
IFX_INLINE void | IfxScuWdt_setSafetyEndinitInline (uint16 password)
SCUWDT Inline API to Set ENDINIT bit provided by Safety WDT Hardware module. More...
IFX_EXTERN void | IfxScuWdt_clearCpuEndinit (uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module. More...
IFX_EXTERN void | IfxScuWdt_clearGlobalEndinit (uint16 password)
API to Clear global ENDINIT bit provided by CPU WDT Hardware module. More...
IFX_EXTERN void | IfxScuWdt_clearGlobalSafetyEndinit (uint16 password)
API to Clear global safety ENDINIT bit provided by safety WDT Hardware module. More...
IFX_EXTERN void | IfxScuWdt_clearSafetyEndinit (uint16 password)
SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module. More...
IFX_EXTERN void | IfxScuWdt_setCpuEndinit (uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module. More...
IFX_EXTERN void | IfxScuWdt_setGlobalEndinit (uint16 password)
API to set global ENDINIT bit provided by CPU WDT Hardware module. More...
IFX_EXTERN void | IfxScuWdt_setGlobalSafetyEndinit (uint16 password)
API to set global safety ENDINIT bit provided by safety WDT Hardware module. More...
IFX_EXTERN void | IfxScuWdt_setSafetyEndinit (uint16 password)
SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module. More...
IFX_INLINE uint16 | IfxScuWdt_getCpuWatchdogPasswordInline (Ifx_SCU_WDTCPU *watchdog)
SCUWDT Inline API to fetch current password of CPU Watchdog module. More...
IFX_INLINE boolean | IfxScuWdt_getCpuWatchdogEndInitInline (Ifx_SCU_WDTCPU *watchdog)
SCUWDT API to fetch current endinit of CPU Watchdog module. More...
IFX_INLINE boolean | IfxScuWdt_getSafetyWatchdogEndInit (void)
SCUWDT API to fetch current endinit of Safety/System Watchdog module. More...
IFX_INLINE uint16 | IfxScuWdt_getSafetyWatchdogPasswordInline (void)
SCUWDT Inline API to fetch current password of Safety Watchdog module. More...
IFX_EXTERN void | IfxScuWdt_changeCpuWatchdogPassword (uint16 password, uint16 newPassword)
SCUWDT API to change CPU Watchdog password. More...
IFX_EXTERN void | IfxScuWdt_changeCpuWatchdogReload (uint16 password, uint16 reload)
SCUWDT API to change CPU Watchdog timer reload value. More...
IFX_EXTERN void | IfxScuWdt_changeGlobalEndinitPassword (uint16 password, uint16 newPassword)
API to change global endinit password. More...
IFX_EXTERN void | IfxScuWdt_changeGlobalSafetyEndinitPassword (uint16 password, uint16 newPassword)
API to change global safety endinit password. More...
IFX_EXTERN void | IfxScuWdt_changeSafetyWatchdogPassword (uint16 password, uint16 newPassword)
SCUWDT API to change Safety Watchdog password. More...
IFX_EXTERN void | IfxScuWdt_changeSafetyWatchdogReload (uint16 password, uint16 reload)
SCUWDT API to change Safety Watchdog timer reload value. More...
IFX_EXTERN void | IfxScuWdt_disableCpuWatchdog (uint16 password)
SCUWDT API to disable CPU Watchdog functionality. More...
IFX_EXTERN void | IfxScuWdt_disableSafetyWatchdog (uint16 password)
SCUWDT API to disable Safety Watchdog functionality. More...
IFX_EXTERN void | IfxScuWdt_enableCpuWatchdog (uint16 password)
SCUWDT API to enable CPU Watchdog functionality. More...
IFX_EXTERN void | IfxScuWdt_enableSafetyWatchdog (uint16 password)
SCUWDT API to enable Safety Watchdog functionality. More...
IFX_EXTERN uint16 | IfxScuWdt_getCpuWatchdogPassword (void)
SCUWDT API to fetch current password of CPU Watchdog module. More...
IFX_EXTERN boolean | IfxScuWdt_getCpuWatchdogEndInit (void)
SCUWDT API to fetch current endinit of CPU Watchdog module. More...
IFX_EXTERN uint16 | IfxScuWdt_getGlobalEndinitPassword (void)
API to fetch current password of global endinit Watchdog module. More...
IFX_EXTERN uint16 | IfxScuWdt_getGlobalSafetyEndinitPassword (void)
API to fetch current password of global safety endinit Watchdog module. More...
IFX_EXTERN uint16 | IfxScuWdt_getSafetyWatchdogPassword (void)
SCUWDT API to fetch current password of Safety Watchdog module. More...
IFX_EXTERN void | IfxScuWdt_serviceCpuWatchdog (uint16 password)
SCUWDT API to service CPU Watchdog functionality. More...
IFX_EXTERN void | IfxScuWdt_serviceSafetyWatchdog (uint16 password)
SCUWDT API to service Safety Watchdog functionality. More...
IFX_EXTERN uint8 | IfxScuWdt_getCpuWatchdogStatus (void)
SCUWDT API to fetch current status of CPU Watchdog module. More...
IFX_EXTERN boolean | IfxScuWdt_enableWatchdogWithDebugger (void)
Enables the watchdog functionality with debugger connected,
debug interface will also be enabled, if not enabled already. More...

Detailed Description

SCU basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

This file contains the APIs for SCU Watchdog and Endinit related functions.

Definition in file IfxScuWdt.h.

Data Structure Documentation

◆ IfxScuWdt_Config

struct IfxScuWdt_Config

Configuration structure for Scu Watchdog. IfxScuWdt_Config is a type describing configuration structure of CPU and Safety WDT registers defined in IfxScuWdt.h file.

Definition at line 86 of file IfxScuWdt.h.

Data Fields
boolean | clrInternalResetFlag | Clear Internal Reset Flag.
boolean | disableWatchdog | Disable Request Control Bit.
boolean | enableAutomaticPasswordChange | Password Auto-sequence Request Bit.
boolean | enableSmuRestriction | Unlock Restriction Request Control Bit.
boolean | enableTimerCheck | Counter Check Request Bit.
boolean | enableTimerCheckTolerance | Timer Check Tolerance Request.
IfxScu_WDTCON1_IR | globalEndInitInputFrequency | input frequency of the global End init WDT
IfxScu_WDTCON1_IR | inputFrequency | input frequency of the WDT
uint16 | password | password for access to WDTxCON0 reg
uint16 | reload | WDT reload value.

Macro Definition Documentation

◆ IFXSCUWDT_ENDINIT_WAIT_TIMEOUTCOUNT

#define IFXSCUWDT_ENDINIT_WAIT_TIMEOUTCOUNT (0x100)

Endinit operation Timeout counter.

Definition at line 76 of file IfxScuWdt.h.

Function Documentation

◆ IfxScuWdt_enableWatchdogWithDebugger()

IFX_EXTERN boolean IfxScuWdt_enableWatchdogWithDebugger ( void )

Enables the watchdog functionality with debugger connected,
debug interface will also be enabled, if not enabled already.

Returns
Status, Success = 0, Failure = 1.

Definition at line 674 of file IfxScuWdt.c.


iLLD_TC38A: SENT

Modules | Files
SENT
iLLD
Collaboration diagram for SENT:

Modules

Implementation
Standard Driver
SENT Pin Mapping
How to use the SENT Interface driver?
Interface Driver

Files

file | IfxSent_cfg.h
SENT on-chip implementation data.
file | IfxSent_PinMap.c
SENT I/O map.
file | IfxSent_PinMap.h
SENT I/O map.
file | IfxSent_Sent.h
SENT SENT details.
file | IfxSent.h
SENT basic functionality.

Detailed Description


iLLD_TC38A: Implementation

Implementation
iLLD » SENT
Collaboration diagram for Implementation:


iLLD_TC38A: Standard Driver

Modules
Standard Driver
iLLD » SENT
Collaboration diagram for Standard Driver:

Modules

Enumerations
Configuration Functions
Interrupts
Operative Functions
Baudrate Configuration
IO Pin Configuration Functions

Detailed Description


iLLD_TC38A: Enumerations

Enumerations
Enumerations
iLLD » SENT » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxSent_AlternateInput {
IfxSent_AlternateInput_0 = 0,
IfxSent_AlternateInput_1,
IfxSent_AlternateInput_2,
IfxSent_AlternateInput_3
}
SENT.CH[channelId].IOCR.ALTI , Specifies alternate input for channel. More...
enum IfxSent_ChannelStatus {
IfxSent_ChannelStatus_stop = 0,
IfxSent_ChannelStatus_initialize = 1,
IfxSent_ChannelStatus_running = 2,
IfxSent_ChannelStatus_synchronize = 3
}
SENT.CH[channelId].RSR.CST, Specifies the current channel status. More...
enum IfxSent_ClockDividerMode {
IfxSent_ClockDividerMode_off = 0,
IfxSent_ClockDividerMode_normal = 1,
IfxSent_ClockDividerMode_fractional = 2
}
SENT.FDR.DM , Specifies clock divider mode. More...
enum IfxSent_ConfigBit {
IfxSent_ConfigBit_0 = 0,
IfxSent_ConfigBit_1
}
SENT.CH[channelId].SDS.CON , Specifies received configuration bit value. More...
enum IfxSent_DigitalGlitchesLength {
IfxSent_DigitalGlitchesLength_off = 0,
IfxSent_DigitalGlitchesLength_1 = 1,
IfxSent_DigitalGlitchesLength_2,
IfxSent_DigitalGlitchesLength_3,
IfxSent_DigitalGlitchesLength_4,
IfxSent_DigitalGlitchesLength_5,
IfxSent_DigitalGlitchesLength_6,
IfxSent_DigitalGlitchesLength_7,
IfxSent_DigitalGlitchesLength_8,
IfxSent_DigitalGlitchesLength_9,
IfxSent_DigitalGlitchesLength_10,
IfxSent_DigitalGlitchesLength_11,
IfxSent_DigitalGlitchesLength_12,
IfxSent_DigitalGlitchesLength_13,
IfxSent_DigitalGlitchesLength_14,
IfxSent_DigitalGlitchesLength_15
}
SENT.CH[channelId].IOCR.DEPTH , Specifies number of port input samples. More...
enum IfxSent_ExtendedSerialFrameMode {
IfxSent_ExtendedSerialFrameMode_standard = 0,
IfxSent_ExtendedSerialFrameMode_extended = 1
}
SENT.CH[channelId].RCR.ESF , Specifies the serial frame structure. More...
enum IfxSent_ExternalTrigger {
IfxSent_ExternalTrigger_0 = 0,
IfxSent_ExternalTrigger_1,
IfxSent_ExternalTrigger_2,
IfxSent_ExternalTrigger_3,
IfxSent_ExternalTrigger_4,
IfxSent_ExternalTrigger_5,
IfxSent_ExternalTrigger_6,
IfxSent_ExternalTrigger_7,
IfxSent_ExternalTrigger_8,
IfxSent_ExternalTrigger_9,
IfxSent_ExternalTrigger_10,
IfxSent_ExternalTrigger_11,
IfxSent_ExternalTrigger_12,
IfxSent_ExternalTrigger_13,
IfxSent_ExternalTrigger_14,
IfxSent_ExternalTrigger_15
}
SENT.CH[channelId].IOCR.ETS , Specifies the external trigger line. More...
enum IfxSent_FrameCheckMode {
IfxSent_FrameCheckMode_pastSyncPulse = 0,
IfxSent_FrameCheckMode_futureSuncPulse = 1
}
SENT.CH[channelId].RCR.CFC, Specifies received frame check mode. More...
enum IfxSent_InterruptNodePointer {
IfxSent_InterruptNodePointer_trigo0 = 0,
IfxSent_InterruptNodePointer_trigo1,
IfxSent_InterruptNodePointer_trigo2,
IfxSent_InterruptNodePointer_trigo3,
IfxSent_InterruptNodePointer_trigo4,
IfxSent_InterruptNodePointer_trigo5,
IfxSent_InterruptNodePointer_trigo6,
IfxSent_InterruptNodePointer_trigo7,
IfxSent_InterruptNodePointer_trigo8,
IfxSent_InterruptNodePointer_trigo9
}
SENT.CH[channelId].INP.X(X= RSI,RDI,RBI,TDI,TBI,ERRI,SDI,WDI),Specifies interrupt requested node for respective interrupt. More...
enum IfxSent_Nibble {
IfxSent_Nibble_0 = 0,
IfxSent_Nibble_1,
IfxSent_Nibble_2,
IfxSent_Nibble_3,
IfxSent_Nibble_4,
IfxSent_Nibble_5,
IfxSent_Nibble_6,
IfxSent_Nibble_7
}
SENT.CH[channelId].VIEW.RDNPy( y=0,1,..7 ).Specifies receive data target nibble pointer. More...
enum IfxSent_SleepMode {
IfxSent_SleepMode_enable = 0,
IfxSent_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_SENT.CLC.B.EDIS. More...
enum IfxSent_SpcMode {
IfxSent_SpcMode_sync = 0,
IfxSent_SpcMode_range = 1,
IfxSent_SpcMode_bidirectional = 2
}
Specifies the SENT SPC operational mode. More...
enum IfxSent_SuspendMode {
IfxSent_SuspendMode_none = 0,
IfxSent_SuspendMode_hard = 1,
IfxSent_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxSent_TimeBase {
IfxSent_TimeBase_measuredFrequency = 0,
IfxSent_TimeBase_nominalFrequency = 1
}
SENT.CH[channelId].SCR.BASE, Specifies selection of pulse based on time. More...
enum IfxSent_TriggerSource {
IfxSent_TriggerSource_off = 0,
IfxSent_TriggerSource_immediate = 1,
IfxSent_TriggerSource_fallingEdge = 2,
IfxSent_TriggerSource_externalTrigger = 3
}
SENT.CH[channelId].SCR.TRIG, Specifies trigger source for pulse generation. More...

Detailed Description

Enumeration Type Documentation

◆ IfxSent_AlternateInput

enum IfxSent_AlternateInput

SENT.CH[channelId].IOCR.ALTI , Specifies alternate input for channel.

Enumerator
IfxSent_AlternateInput_0 | Specifies alternate input 0.
IfxSent_AlternateInput_1 | Specifies alternate input 1.
IfxSent_AlternateInput_2 | Specifies alternate input 2.
IfxSent_AlternateInput_3 | Specifies alternate input 3.

Definition at line 87 of file IfxSent.h.

◆ IfxSent_ChannelStatus

enum IfxSent_ChannelStatus

SENT.CH[channelId].RSR.CST, Specifies the current channel status.

Enumerator
IfxSent_ChannelStatus_stop | Specifies the channel is stopped.
IfxSent_ChannelStatus_initialize | Specifies the channel is initialized.
IfxSent_ChannelStatus_running | Specifies the channel is running.
IfxSent_ChannelStatus_synchronize | Specifies the channel is synchronized.

Definition at line 97 of file IfxSent.h.

◆ IfxSent_ClockDividerMode

enum IfxSent_ClockDividerMode

SENT.FDR.DM , Specifies clock divider mode.

Enumerator
IfxSent_ClockDividerMode_off | Specifies clock divider mode off.
IfxSent_ClockDividerMode_normal | Specifies clock normal divider mode.
IfxSent_ClockDividerMode_fractional | Specifies clock fractional divider mode.

Definition at line 107 of file IfxSent.h.

◆ IfxSent_ConfigBit

enum IfxSent_ConfigBit

SENT.CH[channelId].SDS.CON , Specifies received configuration bit value.

Enumerator
IfxSent_ConfigBit_0 | Specifies received configuration bit value 0.
IfxSent_ConfigBit_1 | Specifies received configuration bit value 1.

Definition at line 116 of file IfxSent.h.

◆ IfxSent_DigitalGlitchesLength

enum IfxSent_DigitalGlitchesLength

SENT.CH[channelId].IOCR.DEPTH , Specifies number of port input samples.

Enumerator
IfxSent_DigitalGlitchesLength_off | Specifies port input samples off.
IfxSent_DigitalGlitchesLength_1 | Specifies 1 port input samples.
IfxSent_DigitalGlitchesLength_2 | Specifies 2 port input samples.
IfxSent_DigitalGlitchesLength_3 | Specifies 3 port input samples.
IfxSent_DigitalGlitchesLength_4 | Specifies 4 port input samples.
IfxSent_DigitalGlitchesLength_5 | Specifies 5 port input samples.
IfxSent_DigitalGlitchesLength_6 | Specifies 6 port input samples.
IfxSent_DigitalGlitchesLength_7 | Specifies 7 port input samples.
IfxSent_DigitalGlitchesLength_8 | Specifies 8 port input samples.
IfxSent_DigitalGlitchesLength_9 | Specifies 9 port input samples.
IfxSent_DigitalGlitchesLength_10 | Specifies 10 port input samples.
IfxSent_DigitalGlitchesLength_11 | Specifies 11 port input samples.
IfxSent_DigitalGlitchesLength_12 | Specifies 12 port input samples.
IfxSent_DigitalGlitchesLength_13 | Specifies 13 port input samples.
IfxSent_DigitalGlitchesLength_14 | Specifies 14 port input samples.
IfxSent_DigitalGlitchesLength_15 | Specifies 15 port input samples.

Definition at line 124 of file IfxSent.h.

◆ IfxSent_ExtendedSerialFrameMode

enum IfxSent_ExtendedSerialFrameMode

SENT.CH[channelId].RCR.ESF , Specifies the serial frame structure.

Enumerator
IfxSent_ExtendedSerialFrameMode_standard | Specifies the standard serial frame structure.
IfxSent_ExtendedSerialFrameMode_extended | Specifies the extended serial frame structure.

Definition at line 146 of file IfxSent.h.

◆ IfxSent_ExternalTrigger

enum IfxSent_ExternalTrigger

SENT.CH[channelId].IOCR.ETS , Specifies the external trigger line.

Enumerator
IfxSent_ExternalTrigger_0 | Specifies the external trigger line 0.
IfxSent_ExternalTrigger_1 | Specifies the external trigger line 1.
IfxSent_ExternalTrigger_2 | Specifies the external trigger line 2.
IfxSent_ExternalTrigger_3 | Specifies the external trigger line 3.
IfxSent_ExternalTrigger_4 | Specifies the external trigger line 4.
IfxSent_ExternalTrigger_5 | Specifies the external trigger line 5.
IfxSent_ExternalTrigger_6 | Specifies the external trigger line 6.
IfxSent_ExternalTrigger_7 | Specifies the external trigger line 7.
IfxSent_ExternalTrigger_8 | Specifies the external trigger line 8.
IfxSent_ExternalTrigger_9 | Specifies the external trigger line 9.
IfxSent_ExternalTrigger_10 | Specifies the external trigger line 10.
IfxSent_ExternalTrigger_11 | Specifies the external trigger line 11.
IfxSent_ExternalTrigger_12 | Specifies the external trigger line 12.
IfxSent_ExternalTrigger_13 | Specifies the external trigger line 13.
IfxSent_ExternalTrigger_14 | Specifies the external trigger line 14.
IfxSent_ExternalTrigger_15 | Specifies the external trigger line 15.

Definition at line 154 of file IfxSent.h.

◆ IfxSent_FrameCheckMode

enum IfxSent_FrameCheckMode

SENT.CH[channelId].RCR.CFC, Specifies received frame check mode.

Enumerator
IfxSent_FrameCheckMode_pastSyncPulse | Specifies frame check mode against past sync pulse.
IfxSent_FrameCheckMode_futureSuncPulse | Specifies frame check mode against future sync pulse.

Definition at line 176 of file IfxSent.h.

◆ IfxSent_InterruptNodePointer

enum IfxSent_InterruptNodePointer

SENT.CH[channelId].INP.X(X= RSI,RDI,RBI,TDI,TBI,ERRI,SDI,WDI),Specifies interrupt requested node for respective interrupt.

Enumerator
IfxSent_InterruptNodePointer_trigo0 | Specifies interrupt requested node TRIGO 0.
IfxSent_InterruptNodePointer_trigo1 | Specifies interrupt requested node TRIGO 1.
IfxSent_InterruptNodePointer_trigo2 | Specifies interrupt requested node TRIGO 2.
IfxSent_InterruptNodePointer_trigo3 | Specifies interrupt requested node TRIGO 3.
IfxSent_InterruptNodePointer_trigo4 | Specifies interrupt requested node TRIGO 4.
IfxSent_InterruptNodePointer_trigo5 | Specifies interrupt requested node TRIGO 5.
IfxSent_InterruptNodePointer_trigo6 | Specifies interrupt requested node TRIGO 6.
IfxSent_InterruptNodePointer_trigo7 | Specifies interrupt requested node TRIGO 7.
IfxSent_InterruptNodePointer_trigo8 | Specifies interrupt requested node TRIGO 8.
IfxSent_InterruptNodePointer_trigo9 | Specifies interrupt requested node TRIGO 9.

Definition at line 184 of file IfxSent.h.

◆ IfxSent_Nibble

enum IfxSent_Nibble

SENT.CH[channelId].VIEW.RDNPy( y=0,1,..7 ).Specifies receive data target nibble pointer.

Enumerator
IfxSent_Nibble_0 | Specifies receive data target nibble pointer to nibble 0.
IfxSent_Nibble_1 | Specifies receive data target nibble pointer to nibble 1.
IfxSent_Nibble_2 | Specifies receive data target nibble pointer to nibble 2.
IfxSent_Nibble_3 | Specifies receive data target nibble pointer to nibble 3.
IfxSent_Nibble_4 | Specifies receive data target nibble pointer to nibble 4.
IfxSent_Nibble_5 | Specifies receive data target nibble pointer to nibble 5.
IfxSent_Nibble_6 | Specifies receive data target nibble pointer to nibble 6.
IfxSent_Nibble_7 | Specifies receive data target nibble pointer to nibble 7.

Definition at line 200 of file IfxSent.h.

◆ IfxSent_SleepMode

enum IfxSent_SleepMode

Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_SENT.CLC.B.EDIS.

Enumerator
IfxSent_SleepMode_enable | enables sleep mode
IfxSent_SleepMode_disable | disables sleep mode

Definition at line 215 of file IfxSent.h.

◆ IfxSent_SpcMode

enum IfxSent_SpcMode

Specifies the SENT SPC operational mode.

Enumerator
IfxSent_SpcMode_sync | Specifies synchronous SPC mode.
IfxSent_SpcMode_range | Specifies range selection SPC mode.
IfxSent_SpcMode_bidirectional | Specifies bidirectional transmit SPC mode.

Definition at line 223 of file IfxSent.h.

◆ IfxSent_SuspendMode

enum IfxSent_SuspendMode

OCDS Suspend Control (OCDS.SUS)

Enumerator
IfxSent_SuspendMode_none | No suspend.
IfxSent_SuspendMode_hard | Hard Suspend.
IfxSent_SuspendMode_soft | Soft Suspend.

Definition at line 232 of file IfxSent.h.

◆ IfxSent_TimeBase

enum IfxSent_TimeBase

SENT.CH[channelId].SCR.BASE, Specifies selection of pulse based on time.

Enumerator
IfxSent_TimeBase_measuredFrequency | Specifies selection of pulse based on measured frequency.
IfxSent_TimeBase_nominalFrequency | Specifies selection of pulse based on nomianl frequency.

Definition at line 241 of file IfxSent.h.

◆ IfxSent_TriggerSource

enum IfxSent_TriggerSource

SENT.CH[channelId].SCR.TRIG, Specifies trigger source for pulse generation.

Enumerator
IfxSent_TriggerSource_off | Specifies no pulse generation.
IfxSent_TriggerSource_immediate | Specifies immediate pulse generation.
IfxSent_TriggerSource_fallingEdge | Specifies pulse generation at fallingEdge.
IfxSent_TriggerSource_externalTrigger | Specifies pulse generation after each external trigger.

Definition at line 249 of file IfxSent.h.


iLLD_TC38A: Configuration Functions

Functions
Configuration Functions
iLLD » SENT » Standard Driver
Collaboration diagram for Configuration Functions:

Functions

IFX_INLINE void | IfxSent_setAltiInput (Ifx_SENT *sent, IfxSent_ChannelId channelId, IfxSent_AlternateInput alternateInput)
Sets the operation mode of SENT kernel. More...
IFX_INLINE void | IfxSent_setTimeStampPredivider (Ifx_SENT *sent, uint32 timeStampPreDivider)
Set the module time stamp pre-divider. More...

Detailed Description

Function Documentation

◆ IfxSent_setAltiInput()

IFX_INLINE void IfxSent_setAltiInput | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId,
 |  | IfxSent_AlternateInput | alternateInput
 | ) |  |

Sets the operation mode of SENT kernel.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
alternateInput | alternate input/output pin for SENT operation
Returns
None

Definition at line 688 of file IfxSent.h.

Referenced by IfxSent_initSentPin().

◆ IfxSent_setTimeStampPredivider()

IFX_INLINE void IfxSent_setTimeStampPredivider | ( | Ifx_SENT * | sent,
 |  | uint32 | timeStampPreDivider
 | ) |  |

Set the module time stamp pre-divider.

Parameters
sent | base address of the SENT register space
timeStampPreDivider | time stamp pre-divider value
Returns
None

Definition at line 726 of file IfxSent.h.

Referenced by IfxSent_Sent_initModule().


iLLD_TC38A: Interrupts

Functions
Interrupts
iLLD » SENT » Standard Driver
Collaboration diagram for Interrupts:

Functions

IFX_INLINE Ifx_SENT_CH_INTSTAT | IfxSent_getAndClearInterruptStatus (Ifx_SENT *sent, IfxSent_ChannelId channelId)
Copies the current interrupt flags into the Ifx_SENT_CH_INTSTAT structure, and clears the flags in hardware. More...
IFX_INLINE Ifx_SENT_CH_INTSTAT | IfxSent_getChannelInterruptStatus (Ifx_SENT *sent, IfxSent_ChannelId channelId)
Gets the current channel status. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxSent_getChannelSrc (IfxSent_ChannelId channelId)
gets the source for channel interrupt handler More...

Detailed Description

Function Documentation

◆ IfxSent_getAndClearInterruptStatus()

IFX_INLINE Ifx_SENT_CH_INTSTAT IfxSent_getAndClearInterruptStatus | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId
 | ) |  |

Copies the current interrupt flags into the Ifx_SENT_CH_INTSTAT structure, and clears the flags in hardware.

This function should be used in an ISR to retrieve the events which triggered the interrupt.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
Returns
Interrupt flags which have been cleared.

Definition at line 622 of file IfxSent.h.

Referenced by IfxSent_Sent_getAndClearInterruptStatus().

◆ IfxSent_getChannelInterruptStatus()

IFX_INLINE Ifx_SENT_CH_INTSTAT IfxSent_getChannelInterruptStatus | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId
 | ) |  |

Gets the current channel status.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
Returns
current channel interrupt status

Definition at line 631 of file IfxSent.h.

◆ IfxSent_getChannelSrc()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxSent_getChannelSrc ( IfxSent_ChannelId channelId )

gets the source for channel interrupt handler

Parameters
channelId SENT channel number
Returns
interrupt source

Definition at line 639 of file IfxSent.h.

Referenced by IfxSent_Sent_initChannel().


iLLD_TC38A: Operative Functions

Functions
Operative Functions
iLLD » SENT » Standard Driver
Collaboration diagram for Operative Functions:

Functions

IFX_INLINE void | IfxSent_disableChannel (Ifx_SENT *sent, IfxSent_ChannelId channelId)
Disable the channel with the channel number. More...
IFX_INLINE void | IfxSent_disableModule (Ifx_SENT *sent)
Disable the SENT module. More...
IFX_INLINE void | IfxSent_enableChannel (Ifx_SENT *sent, IfxSent_ChannelId channelId)
Enable the channel with the channel number. More...
IFX_INLINE void | IfxSent_enableModule (Ifx_SENT *sent)
Enable the SENT module. More...
IFX_INLINE boolean | IfxSent_isModuleSuspended (Ifx_SENT *sent)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxSent_setSleepMode (Ifx_SENT *sent, IfxSent_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxSent_setSuspendMode (Ifx_SENT *sent, IfxSent_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN void | IfxSent_resetModule (Ifx_SENT *sent)
Resets the SENT module. More...

Detailed Description

Function Documentation

◆ IfxSent_disableChannel()

IFX_INLINE void IfxSent_disableChannel | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId
 | ) |  |

Disable the channel with the channel number.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
Returns
None

Definition at line 589 of file IfxSent.h.

Referenced by IfxSent_Sent_initChannel().

◆ IfxSent_disableModule()

IFX_INLINE void IfxSent_disableModule ( Ifx_SENT * sent )

Disable the SENT module.

Parameters
sent base address of the SENT register space
Returns
None

Definition at line 595 of file IfxSent.h.

◆ IfxSent_enableChannel()

IFX_INLINE void IfxSent_enableChannel | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId
 | ) |  |

Enable the channel with the channel number.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
Returns
None

Definition at line 604 of file IfxSent.h.

Referenced by IfxSent_Sent_initChannel().

◆ IfxSent_enableModule()

IFX_INLINE void IfxSent_enableModule ( Ifx_SENT * sent )

Enable the SENT module.

Parameters
sent base address of the SENT register space
Returns
None

Definition at line 610 of file IfxSent.h.

Referenced by IfxSent_Sent_initModule().

◆ IfxSent_isModuleSuspended()

IFX_INLINE boolean IfxSent_isModuleSuspended ( Ifx_SENT * sent )

Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended.

Parameters
sent Pointer to SENT module registers
Returns
Suspend status (TRUE / FALSE)

Definition at line 676 of file IfxSent.h.

◆ IfxSent_resetModule()

IFX_EXTERN void IfxSent_resetModule ( Ifx_SENT * sent )

Resets the SENT module.

Parameters
sent base address of the SENT register space
Returns
None

Definition at line 138 of file IfxSent.c.

Referenced by IfxSent_Sent_deInitModule().

◆ IfxSent_setSleepMode()

IFX_INLINE void IfxSent_setSleepMode | ( | Ifx_SENT * | sent,
 |  | IfxSent_SleepMode | mode
 | ) |  |

Sets the sensitivity of the module to sleep signal.

Parameters
sent | pointer to SENT registers
mode | mode selection (enable / disable)
Returns
None

Definition at line 706 of file IfxSent.h.

◆ IfxSent_setSuspendMode()

IFX_INLINE void IfxSent_setSuspendMode | ( | Ifx_SENT * | sent,
 |  | IfxSent_SuspendMode | mode
 | ) |  |

Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.

Parameters
sent | Pointer to SENT module registers
mode | Module suspend mode
Returns
None

Definition at line 715 of file IfxSent.h.


iLLD_TC38A: Baudrate Configuration

Functions
Baudrate Configuration
iLLD » SENT » Standard Driver
Collaboration diagram for Baudrate Configuration:

Functions

IFX_INLINE void | IfxSent_setChannelFractionalDivider (Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 divider)
Sets the channel fractional baudrate divider. More...
IFX_INLINE void | IfxSent_setChannelPreDivider (Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 preDivider)
Sets the channel baudrate pre-divider. More...
IFX_EXTERN float32 | IfxSent_getModuleClock (Ifx_SENT *sent)
Returns the current module frequency in Hertz. More...
IFX_EXTERN void | IfxSent_initializeChannelUnitTime (Ifx_SENT *sent, IfxSent_ChannelId channelId, float32 tUnit)
Initializes the desired unit time (f_tick) for the external SENT device connected to the given channel. More...
IFX_EXTERN void | IfxSent_initializeModuleClock (Ifx_SENT *sent, IfxSent_ClockDividerMode dividerMode, uint16 stepValue)
Initialize and get the clock for SENT kernel. More...

Detailed Description

Function Documentation

◆ IfxSent_getModuleClock()

IFX_EXTERN float32 IfxSent_getModuleClock ( Ifx_SENT * sent )

Returns the current module frequency in Hertz.

Parameters
sent base address of the SENT register space
Returns
The current module frequency in Hertz

Definition at line 74 of file IfxSent.c.

Referenced by IfxSent_getChannelUnitTime(), and IfxSent_initializeChannelUnitTime().

◆ IfxSent_initializeChannelUnitTime()

IFX_EXTERN void IfxSent_initializeChannelUnitTime | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId,
 |  | float32 | tUnit
 | ) |  |

Initializes the desired unit time (f_tick) for the external SENT device connected to the given channel.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
tUnit | desired unit time (f_tick), e.g. 3E-6 for 3 uS
Returns
None

Definition at line 96 of file IfxSent.c.

Referenced by IfxSent_Sent_initChannel().

◆ IfxSent_initializeModuleClock()

IFX_EXTERN void IfxSent_initializeModuleClock | ( | Ifx_SENT * | sent,
 |  | IfxSent_ClockDividerMode | dividerMode,
 |  | uint16 | stepValue
 | ) |  |

Initialize and get the clock for SENT kernel.

Parameters
sent | base address of the SENT register space
dividerMode | Divider mode for clock output
stepValue | clock frequency for for module fractional divider
Returns
None

Definition at line 128 of file IfxSent.c.

Referenced by IfxSent_Sent_initModule().

◆ IfxSent_setChannelFractionalDivider()

IFX_INLINE void IfxSent_setChannelFractionalDivider | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId,
 |  | uint16 | divider
 | ) |  |

Sets the channel fractional baudrate divider.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
divider | channel baudrate fractional divider
Returns
None

Definition at line 694 of file IfxSent.h.

Referenced by IfxSent_initializeChannelUnitTime().

◆ IfxSent_setChannelPreDivider()

IFX_INLINE void IfxSent_setChannelPreDivider | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId,
 |  | uint16 | preDivider
 | ) |  |

Sets the channel baudrate pre-divider.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
preDivider | channel baudrate pre-divider
Returns
None

Definition at line 700 of file IfxSent.h.

Referenced by IfxSent_initializeChannelUnitTime().


iLLD_TC38A: IO Pin Configuration Functions

Functions
IO Pin Configuration Functions
iLLD » SENT » Standard Driver
Collaboration diagram for IO Pin Configuration Functions:

Functions

IFX_INLINE void | IfxSent_initSentPin (const IfxSent_Sent_In *sentIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a SENT input. More...
IFX_INLINE void | IfxSent_initSpcPin (const IfxSent_Spc_Out *spcOut, IfxPort_OutputMode spcOutMode, IfxPort_PadDriver padDriver)
Initializes a SPC output. More...

Detailed Description

Function Documentation

◆ IfxSent_initSentPin()

IFX_INLINE void IfxSent_initSentPin | ( | const IfxSent_Sent_In * | sentIn,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a SENT input.

Parameters
sentIn | the SENT Pin which should be configured
inputMode | the pin input mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 655 of file IfxSent.h.

Referenced by IfxSent_Sent_initChannel().

◆ IfxSent_initSpcPin()

IFX_INLINE void IfxSent_initSpcPin | ( | const IfxSent_Spc_Out * | spcOut,
 |  | IfxPort_OutputMode | spcOutMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a SPC output.

Parameters
spcOut | the SPC Pin which should be configured
spcOutMode | Port Output Mode
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 666 of file IfxSent.h.

Referenced by IfxSent_Sent_initChannel().


iLLD_TC38A: SENT Pin Mapping

Data Structures | Macros | Variables
SENT Pin Mapping
iLLD » SENT
Collaboration diagram for SENT Pin Mapping:

Data Structures

struct | IfxSent_Sent_In
SENT pin mapping structure. More...
struct | IfxSent_Spc_Out
SPC pin mapping structure. More...

Macros

#define | IFXSENT_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXSENT_PINMAP_NUM_CHANNELS 25
#define | IFXSENT_PINMAP_SENT_IN_NUM_ITEMS 4
#define | IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS 1

Variables

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0A_P40_0_IN
Receive input channel 0. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0B_P00_1_IN
Receive input channel 0. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0C_P02_8_IN
Receive input channel 0. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT10A_P40_10_IN
Receive input channel 10. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT10B_P00_11_IN
Receive input channel 10. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT10C_P32_5_IN
Receive input channel 10. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT10D_P15_2_IN
Receive input channel 10. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT11A_P40_11_IN
Receive input channel 11. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT11B_P00_12_IN
Receive input channel 11. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT11C_P32_6_IN
Receive input channel 11. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT11D_P15_4_IN
Receive input channel 11. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT12A_P40_12_IN
Receive input channel 12. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT12B_P02_4_IN
Receive input channel 12. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT12C_P32_7_IN
Receive input channel 12. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT13A_P40_13_IN
Receive input channel 13. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT13B_P02_3_IN
Receive input channel 13. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT13C_P33_0_IN
Receive input channel 13. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT14A_P40_14_IN
Receive input channel 14. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT14B_P02_2_IN
Receive input channel 14. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT14C_P33_7_IN
Receive input channel 14. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT15A_P40_15_IN
Receive input channel 15. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT15B_P01_1_IN
Receive input channel 15. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT15C_P10_9_IN
Receive input channel 15. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT16A_P41_0_IN
Receive input channel 16. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT16B_P01_9_IN
Receive input channel 16. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT16C_P10_10_IN
Receive input channel 16. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT17A_P41_1_IN
Receive input channel 17. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT17B_P01_8_IN
Receive input channel 17. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT17C_P10_14_IN
Receive input channel 17. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT17D_P14_0_IN
Receive input channel 17. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT18A_P41_2_IN
Receive input channel 18. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT18B_P01_10_IN
Receive input channel 18. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT18C_P10_13_IN
Receive input channel 18. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT18D_P14_1_IN
Receive input channel 18. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT19A_P41_3_IN
Receive input channel 19. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT19B_P01_11_IN
Receive input channel 19. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT19C_P10_11_IN
Receive input channel 19. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1A_P40_1_IN
Receive input channel 1. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1B_P00_2_IN
Receive input channel 1. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1C_P02_7_IN
Receive input channel 1. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT20A_P41_4_IN
Receive input channel 20. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT20B_P02_9_IN
Receive input channel 20. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT20C_P31_8_IN
Receive input channel 20. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT21A_P41_5_IN
Receive input channel 21. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT21B_P02_10_IN
Receive input channel 21. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT21C_P31_9_IN
Receive input channel 21. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT22A_P41_6_IN
Receive input channel 22. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT22B_P02_11_IN
Receive input channel 22. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT22C_P31_10_IN
Receive input channel 22. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT23A_P41_7_IN
Receive input channel 23. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT23B_P02_12_IN
Receive input channel 23. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT23C_P31_11_IN
Receive input channel 23. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT24A_P41_8_IN
Receive input channel 24. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT24B_P02_13_IN
Receive input channel 24. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT24C_P31_12_IN
Receive input channel 24. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2A_P40_2_IN
Receive input channel 2. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2B_P00_3_IN
Receive input channel 2. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2C_P02_6_IN
Receive input channel 2. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3A_P40_3_IN
Receive input channel 3. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3B_P00_4_IN
Receive input channel 3. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3C_P02_5_IN
Receive input channel 3. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4A_P40_4_IN
Receive input channel 4. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4B_P00_5_IN
Receive input channel 4. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4C_P33_6_IN
Receive input channel 4. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5A_P40_5_IN
Receive input channel 5. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5B_P00_6_IN
Receive input channel 5. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5C_P33_5_IN
Receive input channel 5. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT6A_P40_6_IN
Receive input channel 6. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT6B_P00_7_IN
Receive input channel 6. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT6C_P33_4_IN
Receive input channel 6. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT7A_P40_7_IN
Receive input channel 7. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT7B_P00_8_IN
Receive input channel 7. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT7C_P33_3_IN
Receive input channel 7. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT8A_P40_8_IN
Receive input channel 8. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT8B_P00_9_IN
Receive input channel 8. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT8C_P33_2_IN
Receive input channel 8. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT9A_P40_9_IN
Receive input channel 9. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT9B_P00_10_IN
Receive input channel 9. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT9C_P33_1_IN
Receive input channel 9. More...
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC0_P00_1_OUT
Transmit output. More...
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC1_P02_7_OUT
Transmit output. More...
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC2_P00_3_OUT
Transmit output. More...
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC3_P00_4_OUT
Transmit output. More...
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC4_P00_5_OUT
Transmit output. More...
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC5_P00_6_OUT
Transmit output. More...
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC6_P00_7_OUT
Transmit output. More...
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC7_P00_8_OUT
Transmit output. More...
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC8_P00_9_OUT
Transmit output. More...
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC9_P00_10_OUT
Transmit output. More...
IFX_EXTERN const IfxSent_Sent_In * | IfxSent_Sent_In_pinTable [IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SENT_IN_NUM_ITEMS]
IfxSent_Sent_In table. More...
IFX_EXTERN const IfxSent_Spc_Out * | IfxSent_Spc_Out_pinTable [IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS]
IfxSent_Spc_Out table. More...

Detailed Description

Data Structure Documentation

◆ IfxSent_Sent_In

struct IfxSent_Sent_In

SENT pin mapping structure.

Definition at line 56 of file IfxSent_PinMap.h.

Collaboration diagram for IfxSent_Sent_In:
[legend]
Data Fields
IfxSent_ChannelId | channelId | Channel ID.
Ifx_SENT * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxSent_Spc_Out

struct IfxSent_Spc_Out

SPC pin mapping structure.

Definition at line 65 of file IfxSent_PinMap.h.

Collaboration diagram for IfxSent_Spc_Out:
[legend]
Data Fields
IfxSent_ChannelId | channelId | Channel ID.
Ifx_SENT * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

Macro Definition Documentation

◆ IFXSENT_PINMAP_NUM_CHANNELS

#define IFXSENT_PINMAP_NUM_CHANNELS 25

Definition at line 165 of file IfxSent_PinMap.h.

◆ IFXSENT_PINMAP_NUM_MODULES

#define IFXSENT_PINMAP_NUM_MODULES 1

Table dimensions.

Definition at line 164 of file IfxSent_PinMap.h.

◆ IFXSENT_PINMAP_SENT_IN_NUM_ITEMS

#define IFXSENT_PINMAP_SENT_IN_NUM_ITEMS 4

Definition at line 166 of file IfxSent_PinMap.h.

◆ IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS

#define IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS 1

Definition at line 167 of file IfxSent_PinMap.h.

Variable Documentation

◆ IfxSent_SENT0A_P40_0_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0A_P40_0_IN

Receive input channel 0.

Definition at line 73 of file IfxSent_PinMap.h.

◆ IfxSent_SENT0B_P00_1_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0B_P00_1_IN

Receive input channel 0.

Definition at line 74 of file IfxSent_PinMap.h.

◆ IfxSent_SENT0C_P02_8_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0C_P02_8_IN

Receive input channel 0.

Definition at line 75 of file IfxSent_PinMap.h.

◆ IfxSent_SENT10A_P40_10_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT10A_P40_10_IN

Receive input channel 10.

Definition at line 76 of file IfxSent_PinMap.h.

◆ IfxSent_SENT10B_P00_11_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT10B_P00_11_IN

Receive input channel 10.

Definition at line 77 of file IfxSent_PinMap.h.

◆ IfxSent_SENT10C_P32_5_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT10C_P32_5_IN

Receive input channel 10.

Definition at line 78 of file IfxSent_PinMap.h.

◆ IfxSent_SENT10D_P15_2_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT10D_P15_2_IN

Receive input channel 10.

Definition at line 79 of file IfxSent_PinMap.h.

◆ IfxSent_SENT11A_P40_11_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT11A_P40_11_IN

Receive input channel 11.

Definition at line 80 of file IfxSent_PinMap.h.

◆ IfxSent_SENT11B_P00_12_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT11B_P00_12_IN

Receive input channel 11.

Definition at line 81 of file IfxSent_PinMap.h.

◆ IfxSent_SENT11C_P32_6_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT11C_P32_6_IN

Receive input channel 11.

Definition at line 82 of file IfxSent_PinMap.h.

◆ IfxSent_SENT11D_P15_4_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT11D_P15_4_IN

Receive input channel 11.

Definition at line 83 of file IfxSent_PinMap.h.

◆ IfxSent_SENT12A_P40_12_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT12A_P40_12_IN

Receive input channel 12.

Definition at line 84 of file IfxSent_PinMap.h.

◆ IfxSent_SENT12B_P02_4_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT12B_P02_4_IN

Receive input channel 12.

Definition at line 85 of file IfxSent_PinMap.h.

◆ IfxSent_SENT12C_P32_7_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT12C_P32_7_IN

Receive input channel 12.

Definition at line 86 of file IfxSent_PinMap.h.

◆ IfxSent_SENT13A_P40_13_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT13A_P40_13_IN

Receive input channel 13.

Definition at line 87 of file IfxSent_PinMap.h.

◆ IfxSent_SENT13B_P02_3_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT13B_P02_3_IN

Receive input channel 13.

Definition at line 88 of file IfxSent_PinMap.h.

◆ IfxSent_SENT13C_P33_0_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT13C_P33_0_IN

Receive input channel 13.

Definition at line 89 of file IfxSent_PinMap.h.

◆ IfxSent_SENT14A_P40_14_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT14A_P40_14_IN

Receive input channel 14.

Definition at line 90 of file IfxSent_PinMap.h.

◆ IfxSent_SENT14B_P02_2_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT14B_P02_2_IN

Receive input channel 14.

Definition at line 91 of file IfxSent_PinMap.h.

◆ IfxSent_SENT14C_P33_7_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT14C_P33_7_IN

Receive input channel 14.

Definition at line 92 of file IfxSent_PinMap.h.

◆ IfxSent_SENT15A_P40_15_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT15A_P40_15_IN

Receive input channel 15.

Definition at line 93 of file IfxSent_PinMap.h.

◆ IfxSent_SENT15B_P01_1_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT15B_P01_1_IN

Receive input channel 15.

Definition at line 94 of file IfxSent_PinMap.h.

◆ IfxSent_SENT15C_P10_9_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT15C_P10_9_IN

Receive input channel 15.

Definition at line 95 of file IfxSent_PinMap.h.

◆ IfxSent_SENT16A_P41_0_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT16A_P41_0_IN

Receive input channel 16.

Definition at line 96 of file IfxSent_PinMap.h.

◆ IfxSent_SENT16B_P01_9_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT16B_P01_9_IN

Receive input channel 16.

Definition at line 97 of file IfxSent_PinMap.h.

◆ IfxSent_SENT16C_P10_10_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT16C_P10_10_IN

Receive input channel 16.

Definition at line 98 of file IfxSent_PinMap.h.

◆ IfxSent_SENT17A_P41_1_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT17A_P41_1_IN

Receive input channel 17.

Definition at line 99 of file IfxSent_PinMap.h.

◆ IfxSent_SENT17B_P01_8_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT17B_P01_8_IN

Receive input channel 17.

Definition at line 100 of file IfxSent_PinMap.h.

◆ IfxSent_SENT17C_P10_14_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT17C_P10_14_IN

Receive input channel 17.

Definition at line 101 of file IfxSent_PinMap.h.

◆ IfxSent_SENT17D_P14_0_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT17D_P14_0_IN

Receive input channel 17.

Definition at line 102 of file IfxSent_PinMap.h.

◆ IfxSent_SENT18A_P41_2_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT18A_P41_2_IN

Receive input channel 18.

Definition at line 103 of file IfxSent_PinMap.h.

◆ IfxSent_SENT18B_P01_10_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT18B_P01_10_IN

Receive input channel 18.

Definition at line 104 of file IfxSent_PinMap.h.

◆ IfxSent_SENT18C_P10_13_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT18C_P10_13_IN

Receive input channel 18.

Definition at line 105 of file IfxSent_PinMap.h.

◆ IfxSent_SENT18D_P14_1_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT18D_P14_1_IN

Receive input channel 18.

Definition at line 106 of file IfxSent_PinMap.h.

◆ IfxSent_SENT19A_P41_3_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT19A_P41_3_IN

Receive input channel 19.

Definition at line 107 of file IfxSent_PinMap.h.

◆ IfxSent_SENT19B_P01_11_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT19B_P01_11_IN

Receive input channel 19.

Definition at line 108 of file IfxSent_PinMap.h.

◆ IfxSent_SENT19C_P10_11_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT19C_P10_11_IN

Receive input channel 19.

Definition at line 109 of file IfxSent_PinMap.h.

◆ IfxSent_SENT1A_P40_1_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1A_P40_1_IN

Receive input channel 1.

Definition at line 110 of file IfxSent_PinMap.h.

◆ IfxSent_SENT1B_P00_2_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1B_P00_2_IN

Receive input channel 1.

Definition at line 111 of file IfxSent_PinMap.h.

◆ IfxSent_SENT1C_P02_7_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1C_P02_7_IN

Receive input channel 1.

Definition at line 112 of file IfxSent_PinMap.h.

◆ IfxSent_SENT20A_P41_4_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT20A_P41_4_IN

Receive input channel 20.

Definition at line 113 of file IfxSent_PinMap.h.

◆ IfxSent_SENT20B_P02_9_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT20B_P02_9_IN

Receive input channel 20.

Definition at line 114 of file IfxSent_PinMap.h.

◆ IfxSent_SENT20C_P31_8_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT20C_P31_8_IN

Receive input channel 20.

Definition at line 115 of file IfxSent_PinMap.h.

◆ IfxSent_SENT21A_P41_5_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT21A_P41_5_IN

Receive input channel 21.

Definition at line 116 of file IfxSent_PinMap.h.

◆ IfxSent_SENT21B_P02_10_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT21B_P02_10_IN

Receive input channel 21.

Definition at line 117 of file IfxSent_PinMap.h.

◆ IfxSent_SENT21C_P31_9_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT21C_P31_9_IN

Receive input channel 21.

Definition at line 118 of file IfxSent_PinMap.h.

◆ IfxSent_SENT22A_P41_6_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT22A_P41_6_IN

Receive input channel 22.

Definition at line 119 of file IfxSent_PinMap.h.

◆ IfxSent_SENT22B_P02_11_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT22B_P02_11_IN

Receive input channel 22.

Definition at line 120 of file IfxSent_PinMap.h.

◆ IfxSent_SENT22C_P31_10_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT22C_P31_10_IN

Receive input channel 22.

Definition at line 121 of file IfxSent_PinMap.h.

◆ IfxSent_SENT23A_P41_7_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT23A_P41_7_IN

Receive input channel 23.

Definition at line 122 of file IfxSent_PinMap.h.

◆ IfxSent_SENT23B_P02_12_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT23B_P02_12_IN

Receive input channel 23.

Definition at line 123 of file IfxSent_PinMap.h.

◆ IfxSent_SENT23C_P31_11_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT23C_P31_11_IN

Receive input channel 23.

Definition at line 124 of file IfxSent_PinMap.h.

◆ IfxSent_SENT24A_P41_8_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT24A_P41_8_IN

Receive input channel 24.

Definition at line 125 of file IfxSent_PinMap.h.

◆ IfxSent_SENT24B_P02_13_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT24B_P02_13_IN

Receive input channel 24.

Definition at line 126 of file IfxSent_PinMap.h.

◆ IfxSent_SENT24C_P31_12_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT24C_P31_12_IN

Receive input channel 24.

Definition at line 127 of file IfxSent_PinMap.h.

◆ IfxSent_SENT2A_P40_2_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2A_P40_2_IN

Receive input channel 2.

Definition at line 128 of file IfxSent_PinMap.h.

◆ IfxSent_SENT2B_P00_3_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2B_P00_3_IN

Receive input channel 2.

Definition at line 129 of file IfxSent_PinMap.h.

◆ IfxSent_SENT2C_P02_6_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2C_P02_6_IN

Receive input channel 2.

Definition at line 130 of file IfxSent_PinMap.h.

◆ IfxSent_SENT3A_P40_3_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3A_P40_3_IN

Receive input channel 3.

Definition at line 131 of file IfxSent_PinMap.h.

◆ IfxSent_SENT3B_P00_4_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3B_P00_4_IN

Receive input channel 3.

Definition at line 132 of file IfxSent_PinMap.h.

◆ IfxSent_SENT3C_P02_5_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3C_P02_5_IN

Receive input channel 3.

Definition at line 133 of file IfxSent_PinMap.h.

◆ IfxSent_SENT4A_P40_4_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4A_P40_4_IN

Receive input channel 4.

Definition at line 134 of file IfxSent_PinMap.h.

◆ IfxSent_SENT4B_P00_5_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4B_P00_5_IN

Receive input channel 4.

Definition at line 135 of file IfxSent_PinMap.h.

◆ IfxSent_SENT4C_P33_6_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4C_P33_6_IN

Receive input channel 4.

Definition at line 136 of file IfxSent_PinMap.h.

◆ IfxSent_SENT5A_P40_5_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5A_P40_5_IN

Receive input channel 5.

Definition at line 137 of file IfxSent_PinMap.h.

◆ IfxSent_SENT5B_P00_6_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5B_P00_6_IN

Receive input channel 5.

Definition at line 138 of file IfxSent_PinMap.h.

◆ IfxSent_SENT5C_P33_5_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5C_P33_5_IN

Receive input channel 5.

Definition at line 139 of file IfxSent_PinMap.h.

◆ IfxSent_SENT6A_P40_6_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT6A_P40_6_IN

Receive input channel 6.

Definition at line 140 of file IfxSent_PinMap.h.

◆ IfxSent_SENT6B_P00_7_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT6B_P00_7_IN

Receive input channel 6.

Definition at line 141 of file IfxSent_PinMap.h.

◆ IfxSent_SENT6C_P33_4_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT6C_P33_4_IN

Receive input channel 6.

Definition at line 142 of file IfxSent_PinMap.h.

◆ IfxSent_SENT7A_P40_7_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT7A_P40_7_IN

Receive input channel 7.

Definition at line 143 of file IfxSent_PinMap.h.

◆ IfxSent_SENT7B_P00_8_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT7B_P00_8_IN

Receive input channel 7.

Definition at line 144 of file IfxSent_PinMap.h.

◆ IfxSent_SENT7C_P33_3_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT7C_P33_3_IN

Receive input channel 7.

Definition at line 145 of file IfxSent_PinMap.h.

◆ IfxSent_SENT8A_P40_8_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT8A_P40_8_IN

Receive input channel 8.

Definition at line 146 of file IfxSent_PinMap.h.

◆ IfxSent_SENT8B_P00_9_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT8B_P00_9_IN

Receive input channel 8.

Definition at line 147 of file IfxSent_PinMap.h.

◆ IfxSent_SENT8C_P33_2_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT8C_P33_2_IN

Receive input channel 8.

Definition at line 148 of file IfxSent_PinMap.h.

◆ IfxSent_SENT9A_P40_9_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT9A_P40_9_IN

Receive input channel 9.

Definition at line 149 of file IfxSent_PinMap.h.

◆ IfxSent_SENT9B_P00_10_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT9B_P00_10_IN

Receive input channel 9.

Definition at line 150 of file IfxSent_PinMap.h.

◆ IfxSent_SENT9C_P33_1_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT9C_P33_1_IN

Receive input channel 9.

Definition at line 151 of file IfxSent_PinMap.h.

◆ IfxSent_Sent_In_pinTable

IFX_EXTERN const IfxSent_Sent_In* IfxSent_Sent_In_pinTable[IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SENT_IN_NUM_ITEMS]

IfxSent_Sent_In table.

Definition at line 171 of file IfxSent_PinMap.h.

◆ IfxSent_SPC0_P00_1_OUT

IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC0_P00_1_OUT

Transmit output.

Definition at line 152 of file IfxSent_PinMap.h.

◆ IfxSent_SPC1_P02_7_OUT

IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC1_P02_7_OUT

Transmit output.

Definition at line 153 of file IfxSent_PinMap.h.

◆ IfxSent_SPC2_P00_3_OUT

IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC2_P00_3_OUT

Transmit output.

Definition at line 154 of file IfxSent_PinMap.h.

◆ IfxSent_SPC3_P00_4_OUT

IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC3_P00_4_OUT

Transmit output.

Definition at line 155 of file IfxSent_PinMap.h.

◆ IfxSent_SPC4_P00_5_OUT

IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC4_P00_5_OUT

Transmit output.

Definition at line 156 of file IfxSent_PinMap.h.

◆ IfxSent_SPC5_P00_6_OUT

IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC5_P00_6_OUT

Transmit output.

Definition at line 157 of file IfxSent_PinMap.h.

◆ IfxSent_SPC6_P00_7_OUT

IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC6_P00_7_OUT

Transmit output.

Definition at line 158 of file IfxSent_PinMap.h.

◆ IfxSent_SPC7_P00_8_OUT

IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC7_P00_8_OUT

Transmit output.

Definition at line 159 of file IfxSent_PinMap.h.

◆ IfxSent_SPC8_P00_9_OUT

IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC8_P00_9_OUT

Transmit output.

Definition at line 160 of file IfxSent_PinMap.h.

◆ IfxSent_SPC9_P00_10_OUT

IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC9_P00_10_OUT

Transmit output.

Definition at line 161 of file IfxSent_PinMap.h.

◆ IfxSent_Spc_Out_pinTable

IFX_EXTERN const IfxSent_Spc_Out* IfxSent_Spc_Out_pinTable[IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS]

IfxSent_Spc_Out table.

Definition at line 174 of file IfxSent_PinMap.h.


iLLD_TC38A: How to use the SENT Interface driver?

How to use the SENT Interface driver?
iLLD » SENT
Collaboration diagram for How to use the SENT Interface driver?:

This SENT interface driver provides functions to communicate with external sensors.

Preparation

Include Files

Include following header file into your C code:

#include <Sent/Sent/IfxSent_Sent.h>

Variables

Declare SENT module and channel handles as global variables in your C code. If multiple SENT channels should be serviced, it makes sense to declare the SENT channel handle as an array:

#define TESTED_SENT_CHANNELS 3
static IfxSent_Sent sent;
static IfxSent_Sent_Channel sentChannel[TESTED_SENT_CHANNELS];

Interrupt Handler Installation

See also How to define Interrupts?

Define priorities for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:

#define IFX_INTPRIO_SENT_CHANNEL 1

Add the interrupt service routine to your C code. It has to call the SENT interrupt handler by passing the SENT channel handle:

void SentInterruptHandler(IfxSent_Sent_Channel *channel);
IFX_INTERRUPT(sentChannelISR, 0, IFX_INTPRIO_SENT_CHANNEL)
{
int i;
for(i=0; i<TESTED_SENT_CHANNELS; ++i)
{
SentInterruptHandler(&sentChannel[i]);
}
}

Note: the SentInterruptHandler function is not part of the interface driver, but has to be implemented in the application. A template can be found below under Interrupt Service Handler

Finally install the interrupt handlers in your initialisation function:

// install interrupt handler
IfxCpu_Irq_installInterruptHandler(&sentChannelISR, IFX_INTPRIO_SENT_CHANNEL);
IfxCpu_enableInterrupts();

Module Initialisation

The module initialisation can be done in the same function. Here an example for SENT and SPC mode:

// create module config
IfxSent_Sent_Config sentConfig;
IfxSent_Sent_initModuleConfig(&sentConfig, &MODULE_SENT);
// initialize module
//IfxSent_Sent sent; // defined globally
IfxSent_Sent_initModule(&sent, &sentConfig);

Channel Initialisation

After the module has been initialized, one or more SENT channels can be configured.

Here an example for three SENT channels in SENT and SPC mode:

// create channel config
IfxSent_Sent_ChannelConfig sentChannelConfig;
IfxSent_Sent_initChannelConfig(&sentChannelConfig, &sent);
// define tUnit of the external sensor
sentChannelConfig.tUnit = 3.0E-6;
// ISR priorities and interrupt target
sentChannelConfig.interrupt.priority = IFX_INTPRIO_SENT_CHANNEL;
sentChannelConfig.interrupt.isrProvider = IfxCpu_Irq_getTos(IfxCpu_getCoreIndex());
int i;
for(i=0; i<TESTED_SENT_CHANNELS; ++i)
{
// pin configuration
const IfxSent_Sent_Pins sentPins[TESTED_SENT_CHANNELS] =
{
{ // Channel 0
&IfxSent_SENT0C_P02_8_IN, IfxPort_InputMode_noPullDevice, // SENT input
&IfxSent_SPC0_P00_1_OUT, IfxPort_OutputMode_openDrain, // SENT output
IfxPort_PadDriver_cmosAutomotiveSpeed1
},
{ // Channel 1
&IfxSent_SENT1C_P02_7_IN, IfxPort_InputMode_noPullDevice, // SENT input
&IfxSent_SPC1_P02_7_OUT, IfxPort_OutputMode_openDrain, // SENT output
IfxPort_PadDriver_cmosAutomotiveSpeed1
},
{ // Channel 2
&IfxSent_SENT2C_P02_6_IN, IfxPort_InputMode_noPullDevice, // SENT input
&IfxSent_SPC2_P00_3_OUT, IfxPort_OutputMode_openDrain, // SENT output
IfxPort_PadDriver_cmosAutomotiveSpeed1
},
};
sentChannelConfig.pins = &sentPins[i];
// set channel
sentChannelConfig.channelId = (IfxSent_ChannelId)i;
// initialize channel
IfxSent_Sent_initChannel(&sentChannel[i], &sentChannelConfig);
}

Interrupt Service Handler

The ISR has to be implemented in the application. Following template can be used to react on the events:

void SentInterruptHandler(IfxSent_Sent_Channel *channel)
{
Ifx_SENT_CH_INTSTAT interruptStatus = IfxSent_Sent_getAndClearInterruptStatus(channel);
if( interruptStatus.U )
{
// check for error conditions
if (interruptStatus.U & IFXSENT_INTERRUPT_STATUS_ERROR_FLAGS)
{
// * Receive Buffer Overflow
// * This bit is set after a frame has been received while the old one was
// * not read from RDRx. I.e. the kernel wants to set any of the two
// * interrupts RSI and RDI and finds any of these two interrupts already
// * set. The old data is overwritten by the new data.
// *
if (interruptStatus.B.RBI)
{
// insert your error handling code here
__debug();
}
// * Transmit Buffer Underflow
// * This bit is set after data has been completely transferred (PLEN
// * exceeded) and no new data was written to SCRx.
// *
if (interruptStatus.B.TBI)
{
// insert your error handling code here
__debug();
}
// * Frequency Range Error
// * This bit is set after a Synchronization / Calibration pulse was
// * received that deviates more than +- 25% from the nominal value.
// * The referring data is ignored.
// *
if (interruptStatus.B.FRI)
{
// insert your error handling code here
__debug();
}
// * Frequency Drift Error
// * This bit is set after a subsequent Synchronization / Calibration
// * pulse was received that deviates more than 1.5625% (1/64) from its
// * predecessor.
// *
if (interruptStatus.B.FDI)
{
// insert your error handling code here
__debug();
}
// * Wrong Number of Nibbles
// * This bit is set after a more nibbles have been received than expected
// * or a Synchronization / Calibration Pulse is received too early thus
// * too few nibbles have been received
// *
if (interruptStatus.B.NNI)
{
// insert your error handling code here
__debug();
}
// * Nibbles Value out of Range
// * This bit is set after a too long or too short nibble pulse has been
// * received. I.e. value < 0 or value > 15.
// *
if (interruptStatus.B.NVI)
{
// insert your error handling code here
__debug();
}
// * CRC Error
// * This bit is set if the CRC check fails.
// *
if (interruptStatus.B.CRCI)
{
// insert your error handling code here
__debug();
}
// * Wrong Status and Communication Nibble Error
// * In standard Serial Frame Mode (RCR.ESF is cleared), this bit is set
// * if the Status and Communication nibble shows a start bit in a frame
// * other than frame number n x 16.
// * In Extended Serial Frame Mode this bit is without function.
// *
if (interruptStatus.B.WSI)
{
// insert your error handling code here
__debug();
}
// * Serial Data CRC Error
// * This bit is set if the CRC of the serial message fails.
// * In Extended Serial Message Format, this includes a check of the Serial
// * Communication Nibble for correct 0 values of bit 3 in frames 7, 13 and 18.
// *
if (interruptStatus.B.SCRI)
{
// insert your error handling code here
__debug();
}
// * Watch Dog Error
// * This bit is set if the Watch Dog Timer of the channel expires.
// *
if (interruptStatus.B.WDI)
{
// insert your error handling code here
__debug();
}
}
// transaction events
// * Receive Data
// * RDI is activated when a received frame is moved to a Receive Data
// * Register RDR. Both RDI and RSI will be issued together in normal use
// * cases where the frame size is not bigger than 8 nibbles and CRC is
// * correct or not checked (if RCRx.CDIS is cleared).
// *
if (interruptStatus.B.RDI)
{
// * Ignore RDI bit, useful only when Frame Length is greater than
// * 8 nibbles since it can indicate that end of frame
// *
}
// * Receive Success
// * This bit is set at the successfully received end of a frame.
// * Depending on bit RCRx.CDIS this indicates a successful check of the CRC.
// *
if (interruptStatus.B.RSI)
{
// here you could handle the incoming frame:
IfxSent_Sent_Frame frame;
IfxSent_Sent_readChannelSerialDataFrame(channel, &frame);
// do something with the incoming data
}
// * Transfer Data
// * This bit is set after the trigger condition was detected. Data to be
// * transferred has been moved internally. Thus a new value can be written
// * to SCRx. This can be used for back to back transfers.
// *
if (interruptStatus.B.TDI)
{
}
// * Serial Data Received
// * This bit is set after all serial data bits have been received via the
// * Status and Communication nibble. Depending on bit RCRx.SCDIS this
// * indicates a successful check of the CRC.
// *
if (interruptStatus.B.SDI)
{
// here you could handle the incoming message:
// decode incoming message
IfxSent_Sent_SerialMessageFrame message;
IfxSent_Sent_readChannelSerialMessageFrame(channel, &message);
// do something with the incoming message
}
}
}

Frame Decoding

Following code snippet shows, how incoming data of a TLE4998S device can be decoded:

static void parseSensorData(IfxSent_Sent_Frame *frame)
{
uint32 data = frame->data;
uint8 statusNibble = frame->statusNibble;
// select B range [mT]
const uint8 rangeValTable[4] = { 200, 100, 50, 0 };
uint8 rangeVal = rangeValTable[statusNibble & 3];
uint16 hallVal = (short)((((data & 0xFFFF) * rangeVal) / 0x7FFF) - rangeVal);
uint16 temperature = ((short)((data >> 16) & 0x00FF) - 55);
// do something with the values here...
}


iLLD_TC38A: Interface Driver

Modules
Interface Driver
iLLD » SENT
Collaboration diagram for Interface Driver:

Modules

Data Structures
Module Functions
Channel Functions

Detailed Description


iLLD_TC38A: Data Structures

Data Structures
Data Structures
iLLD » SENT » Interface Driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxSent_Sent_Enable
Specifies the Interrupt type enables structure. More...
struct | IfxSent_Sent
Specifies SENT handle structure. More...
union | IfxSent_Sent_EnabledInterrupts
Specifies interrupt flags union . In addition it allows to write and read to/from all flags as once via the ALL member. More...
struct | IfxSent_Sent_InputOutputControl
Specifies the input output control properties. More...
struct | IfxSent_Sent_Interrupt
Specifies the interrupt control properties. More...
struct | IfxSent_Sent_InterruptNodeControl
Specifies the interrupt control properties structure. More...
struct | IfxSent_Sent_NibbleControl
Specifies the received nibbles control properties. More...
struct | IfxSent_Sent_Pins
Specifies the pins configuration for SENT channel. More...
struct | IfxSent_Sent_ReceiveControl
Specifies the receive control properties. More...
struct | IfxSent_Sent_TransmitControl
Specifies the SPC channel properties structure. More...
struct | IfxSent_Sent_Channel
Specifies the SENT Channel handle structure. More...
struct | IfxSent_Sent_ChannelConfig
Specifies the SENT Channel configuration structure. More...
struct | IfxSent_Sent_Config
Specifies the SENT module configuration structure. More...
struct | IfxSent_Sent_Frame
Specifies the frame configuration structure for a channel. More...
struct | IfxSent_Sent_SerialMessageFrame
Specifies received message frame. More...

Detailed Description

Data Structure Documentation

◆ IfxSent_Sent_Enable

struct IfxSent_Sent_Enable

Specifies the Interrupt type enables structure.

Definition at line 396 of file IfxSent_Sent.h.

Data Fields
uint8 | crcErrorInterrupt | Specifies CRC error interrupt enable.
uint8 | frequencyDriftErrorInterrupt | Specifies frequency drift error interrupt enable.
uint8 | frequencyRangeErrorInterrupt | Specifies frequency not in the range error interrupt enable.
uint8 | nibblesValueOutOfRangeErrorInterrupt | Specifies nibble value out of range error interrupt enable.
uint8 | nibblesWrongErrorInterrupt | Specifies nibbles wrong error interrupt enable.
uint8 | receiveBufferOverflowInterrupt | Specifies receive buffer overflow interrupt enable.
uint8 | receiveDataInterrupt | Specifies receive data interrupt enable.
uint8 | receiveSuccessInterrupt | Specifies receive success interrupt enable.
uint8 | serialDataCrcErrorInterrupt | Specifies serial data CRC error interrupt enable.
uint8 | serialDataReceiveInterrupt | Specifies serial data interrupt enable.
uint8 | transferBufferUnderflowInterrupt | Specifies transfer buffer underflow interrupt enable.
uint8 | transferDataInterrupt | Specifies transfer data interrupt enable.
uint8 | watchdogErrorInterrupt | Specifies watchdog error interrupt enable.
uint8 | wrongStatusNibbleErrorInterrupt | Specifies wrong status nibble error interrupt enable.

◆ IfxSent_Sent

struct IfxSent_Sent

Specifies SENT handle structure.

Definition at line 420 of file IfxSent_Sent.h.

Data Fields
Ifx_SENT * sent Specifies pointer to SENT registers.

◆ IfxSent_Sent_EnabledInterrupts

union IfxSent_Sent_EnabledInterrupts

Specifies interrupt flags union . In addition it allows to write and read to/from all flags as once via the ALL member.

Definition at line 427 of file IfxSent_Sent.h.

Collaboration diagram for IfxSent_Sent_EnabledInterrupts:
[legend]
Data Fields
uint32 | ALL | Specifies to write and read to/from all flags as once via the ALL member.
IfxSent_Sent_Enable | enable | Structure contains the interrupt flags.

◆ IfxSent_Sent_InputOutputControl

struct IfxSent_Sent_InputOutputControl

Specifies the input output control properties.

Definition at line 435 of file IfxSent_Sent.h.

Data Fields
IfxSent_DigitalGlitchesLength | digitalGlitchFilterDepth | Specifies the Digital Glitch Filter depth for input signal delay.
boolean | edgeCounterCleared | Specifies the edge counter reset.
IfxSent_ExternalTrigger | externalTrigger | Specifies the external trigger line source.
boolean | glitchFallingCleared | Specifies the glitch falling edge clear.
boolean | glitchRisingCleared | Specifies the glitch rising edge clear.
boolean | inputPulsePolarityHigh | Specifies the polarity of input of each channel.
boolean | outputPulsePolarityHigh | Specifies the polarity of input of each channel.
boolean | triggerMonitorCleared | Specifies the trigger monitor reset.

◆ IfxSent_Sent_Interrupt

struct IfxSent_Sent_Interrupt

Specifies the interrupt control properties.

Definition at line 449 of file IfxSent_Sent.h.

Data Fields
IfxSrc_Tos | isrProvider | Specifies the interrupt service provider. CPU or DMA.
uint16 | priority | Specifies the interrupt priority. Always 1 since all interrupts are handled at a time.

◆ IfxSent_Sent_InterruptNodeControl

struct IfxSent_Sent_InterruptNodeControl

Specifies the interrupt control properties structure.

Definition at line 457 of file IfxSent_Sent.h.

Data Fields
IfxSent_InterruptNodePointer | errorInterruptNode | Specifies the interrupt node for erri request.
IfxSent_InterruptNodePointer | receiveBufferOverflowInterruptNode | Specifies the interrupt node for rbi request.
IfxSent_InterruptNodePointer | receiveDataInterruptNode | Specifies the interrupt node for rdi request.
IfxSent_InterruptNodePointer | receiveSuccessInterruptNode | Specifies the interrupt node for rsi request.
IfxSent_InterruptNodePointer | serialDataReceiveInterruptNode | Specifies the interrupt node for sdi request.
IfxSent_InterruptNodePointer | transferBufferUnderflowInterruptNode | Specifies the interrupt node for tbi request.
IfxSent_InterruptNodePointer | transferDataInterruptNode | Specifies the interrupt node for tdi request.
IfxSent_InterruptNodePointer | watchdogErrorInterruptNode | Specifies the interrupt node for wdi request.

◆ IfxSent_Sent_NibbleControl

struct IfxSent_Sent_NibbleControl

Specifies the received nibbles control properties.

Definition at line 471 of file IfxSent_Sent.h.

Data Fields
IfxSent_Nibble | nibblePointer0 | Specifies the received nibble0 control.
IfxSent_Nibble | nibblePointer1 | Specifies the received nibble1 control.
IfxSent_Nibble | nibblePointer2 | Specifies the received nibble2 control.
IfxSent_Nibble | nibblePointer3 | Specifies the received nibble3 control.
IfxSent_Nibble | nibblePointer4 | Specifies the received nibble4 control.
IfxSent_Nibble | nibblePointer5 | Specifies the received nibble5 control.
IfxSent_Nibble | nibblePointer6 | Specifies the received nibble6 control.
IfxSent_Nibble | nibblePointer7 | Specifies the received nibble7 control.

◆ IfxSent_Sent_Pins

struct IfxSent_Sent_Pins

Specifies the pins configuration for SENT channel.

Definition at line 485 of file IfxSent_Sent.h.

Collaboration diagram for IfxSent_Sent_Pins:
[legend]
Data Fields
IFX_CONST IfxSent_Sent_In * | in | Specifies input pin configuration.
IfxPort_InputMode | inMode | Specifies input pin mode.
IFX_CONST IfxSent_Spc_Out * | out | Specifies output pin configuration.
IfxPort_OutputMode | outMode | Specifies output pin mode.
IfxPort_PadDriver | pinDriver | Pad driver mode definition.

◆ IfxSent_Sent_ReceiveControl

struct IfxSent_Sent_ReceiveControl

Specifies the receive control properties.

Definition at line 496 of file IfxSent_Sent.h.

Data Fields
boolean | alternateCrcSelected | Specifies the CRC is calculated for both fast and serial messages.
boolean | crcMethodDisabled | Specifies the CRC with zero nibbles disabled or enabled.
boolean | crcModeDisabled | Specifies the CRC mode disabled mode.
boolean | driftErrorsDisabled | Specifies the drift errors enabled or disabled.
boolean | endPulseIgnored | Specifies the pause pulse during synchronization.
IfxSent_ExtendedSerialFrameMode | extendedSerialFrameMode | Specifies the extended serial frame mode.
IfxSent_FrameCheckMode | frameCheckMode | Specifies the frame check mode for valid frame.
uint8 | frameLength | Specifies frame length in nibbles.
boolean | frequencyDriftCheckEnabled | Specifies the frequency drift check based on frame length is enable or disable.
boolean | serialDataDisabledCrcDisabled | Specifies the CRC disable for serial data disabled mode.
boolean | serialDataProcessingEnabled | Specifies the serial data processing mode.
boolean | statusNibbleEnabled | Specifies the status nibble to include in CRC.
boolean | suspendTriggered | Specifies the suspend trigger disables the channel or not.

◆ IfxSent_Sent_TransmitControl

struct IfxSent_Sent_TransmitControl

Specifies the SPC channel properties structure.

Definition at line 515 of file IfxSent_Sent.h.

Data Fields
uint8 | pulseDelayLength | Specifies the pulse delay length.
uint8 | pulseLength | Specifies the pulse length in ticktimes.
IfxSent_SpcMode | spcMode | Specifies the SENT SPC operational mode.
IfxSent_TimeBase | timeBase | Specifies the pulse time base.
IfxSent_TriggerSource | triggerSource | Specifies the trigger source and mode.

◆ IfxSent_Sent_Channel

struct IfxSent_Sent_Channel

Specifies the SENT Channel handle structure.

Definition at line 530 of file IfxSent_Sent.h.

Collaboration diagram for IfxSent_Sent_Channel:
[legend]
Data Fields
Ifx_SENT_CH * | channel | Specifies the pointer SENT channel registers.
IfxSent_ChannelId | channelId | Specifies the SENT channel number.
IfxSent_Sent * | driver | Specifies the pointer to SENT module handler.

◆ IfxSent_Sent_ChannelConfig

struct IfxSent_Sent_ChannelConfig

Specifies the SENT Channel configuration structure.

Definition at line 539 of file IfxSent_Sent.h.

Collaboration diagram for IfxSent_Sent_ChannelConfig:
[legend]
Data Fields
IfxSent_ChannelId | channelId | Specifies the SENT channel number.
IfxSent_Sent * | driver | Specifies the pointer to SENT module handler.
IfxSent_Sent_EnabledInterrupts | enabledInterrupts |
IfxSent_Sent_InputOutputControl | inputOutputControl | Specifies the input output controllable properties.
IfxSent_Sent_Interrupt | interrupt | Specifies the interrupt control properties structure.
IfxSent_Sent_InterruptNodeControl | interuptNodeControl | Specifies the interrupt control properties structure.
IfxSent_Sent_NibbleControl | nibbleControl | Specifies the received nibbles control properties.
IFX_CONST IfxSent_Sent_Pins * | pins | Specifies the pins configuration for SENT channel.
IfxSent_Sent_ReceiveControl | receiveControl | Specifies the receive control properties.
boolean | spcModeOn | Specifies the SENT SPC mode enable/disable.
IfxSent_Sent_TransmitControl | transmitControl | Specifies the transmit control properties.
float32 | tUnit | desired unit time (f_tick), e.g. 3E-6 for 3 uS
uint16 | watchDogTimerLimit | Speciifes the enabled interrupts for each Channel.

◆ IfxSent_Sent_Config

struct IfxSent_Sent_Config

Specifies the SENT module configuration structure.

Definition at line 558 of file IfxSent_Sent.h.

Data Fields
Ifx_SENT * | module | Specifies pointer to SENT registers.
boolean | sleepModeEnabled | Specifies SENT enable/disable.
uint32 | timeStampPreDivider | Specifies the pre-divider to get clock in time stamp.

◆ IfxSent_Sent_Frame

struct IfxSent_Sent_Frame

Specifies the frame configuration structure for a channel.

Definition at line 567 of file IfxSent_Sent.h.

Data Fields
uint32 | data | Contains the data from last received frame.
uint8 | statusNibble | Contains the status and communication Nibble of last received frame.
uint32 | timeStamp | Contains the timestamp of last received frame.

◆ IfxSent_Sent_SerialMessageFrame

struct IfxSent_Sent_SerialMessageFrame

Specifies received message frame.

Definition at line 576 of file IfxSent_Sent.h.

Data Fields
IfxSent_ConfigBit | configBit | Contains the received configuration bit value.
uint8 | crc | Contains the received CRC value.
uint8 | messageId | Contains the received message ID value.
uint16 | serialData | Contains the received serial data value.


iLLD_TC38A: Module Functions

Functions
Module Functions
iLLD » SENT » Interface Driver
Collaboration diagram for Module Functions:

Functions

IFX_EXTERN void | IfxSent_Sent_deInitModule (IfxSent_Sent *driver)
Reset the SENT module. More...
IFX_EXTERN boolean | IfxSent_Sent_initModule (IfxSent_Sent *driver, const IfxSent_Sent_Config *config)
Initialise the SENT with the supplied configureation. More...
IFX_EXTERN void | IfxSent_Sent_initModuleConfig (IfxSent_Sent_Config *config, Ifx_SENT *sent)
Initialise buffer with default SENT configuration. More...

Detailed Description

Function Documentation

◆ IfxSent_Sent_deInitModule()

IFX_EXTERN void IfxSent_Sent_deInitModule ( IfxSent_Sent * driver )

Reset the SENT module.

Parameters
driver pointer to the SENT module handler
Returns
None

Definition at line 55 of file IfxSent_Sent.c.

◆ IfxSent_Sent_initModule()

IFX_EXTERN boolean IfxSent_Sent_initModule | ( | IfxSent_Sent * | driver,
 |  | const IfxSent_Sent_Config * | config
 | ) |  |

Initialise the SENT with the supplied configureation.

Parameters
driver | pointer to the SENT module handler
config | pointer to the SENT module configuration
Returns
TRUE if valid configuration otherwise FALSE

Usage example: see How to use the SENT Interface driver?

Definition at line 285 of file IfxSent_Sent.c.

◆ IfxSent_Sent_initModuleConfig()

IFX_EXTERN void IfxSent_Sent_initModuleConfig | ( | IfxSent_Sent_Config * | config,
 |  | Ifx_SENT * | sent
 | ) |  |

Initialise buffer with default SENT configuration.

Parameters
config | pointer to the SENT module configuration
sent | base address of the SENT register space
Returns
None

Usage example: see How to use the SENT Interface driver?

Definition at line 310 of file IfxSent_Sent.c.


iLLD_TC38A: Channel Functions

Functions
Channel Functions
iLLD » SENT » Interface Driver
Collaboration diagram for Channel Functions:

Functions

IFX_INLINE Ifx_SENT_CH_INTSTAT | IfxSent_Sent_getAndClearInterruptStatus (IfxSent_Sent_Channel *channel)
Copies the current interrupt flags into the Ifx_SENT_CH_INTSTAT structure, and clears the flags in hardware. More...
IFX_EXTERN boolean | IfxSent_Sent_initChannel (IfxSent_Sent_Channel *channel, const IfxSent_Sent_ChannelConfig *config)
Initialize the channel with the supplied configuration. More...
IFX_EXTERN void | IfxSent_Sent_initChannelConfig (IfxSent_Sent_ChannelConfig *config, IfxSent_Sent *driver)
Initialise channel buffer with default SENT channel configuration. More...
IFX_EXTERN boolean | IfxSent_Sent_readChannelSerialDataFrame (IfxSent_Sent_Channel *channel, IfxSent_Sent_Frame *frame)
Reads the nibbles recieved in the Data register. More...
IFX_EXTERN boolean | IfxSent_Sent_readChannelSerialMessageFrame (IfxSent_Sent_Channel *channel, IfxSent_Sent_SerialMessageFrame *message)
reads the Serial data recieved and collected over several SENT frames More...

Detailed Description

Function Documentation

◆ IfxSent_Sent_getAndClearInterruptStatus()

IFX_INLINE Ifx_SENT_CH_INTSTAT IfxSent_Sent_getAndClearInterruptStatus ( IfxSent_Sent_Channel * channel )

Copies the current interrupt flags into the Ifx_SENT_CH_INTSTAT structure, and clears the flags in hardware.

This function should be used in an ISR to retrieve the events which triggered the interrupt.

Parameters
channel Specifies the SENT Channel handle structure
Returns
Interrupt flags which have been cleared.

Usage example: see How to use the SENT Interface driver?

Definition at line 689 of file IfxSent_Sent.h.

◆ IfxSent_Sent_initChannel()

IFX_EXTERN boolean IfxSent_Sent_initChannel | ( | IfxSent_Sent_Channel * | channel,
 |  | const IfxSent_Sent_ChannelConfig * | config
 | ) |  |

Initialize the channel with the supplied configuration.

Parameters
channel | pointer to the SENT channel
config | pointer to the SENT channel configuration
Returns
TRUE if valid configuration otherwise FALSE

Usage example: see How to use the SENT Interface driver?

Definition at line 65 of file IfxSent_Sent.c.

◆ IfxSent_Sent_initChannelConfig()

IFX_EXTERN void IfxSent_Sent_initChannelConfig | ( | IfxSent_Sent_ChannelConfig * | config,
 |  | IfxSent_Sent * | driver
 | ) |  |

Initialise channel buffer with default SENT channel configuration.

Parameters
config | pointer to the SENT channel configuration
driver | pointer to the SENT module handler
Returns
None

Usage example: see How to use the SENT Interface driver?

Definition at line 216 of file IfxSent_Sent.c.

◆ IfxSent_Sent_readChannelSerialDataFrame()

IFX_EXTERN boolean IfxSent_Sent_readChannelSerialDataFrame | ( | IfxSent_Sent_Channel * | channel,
 |  | IfxSent_Sent_Frame * | frame
 | ) |  |

Reads the nibbles recieved in the Data register.

Parameters
channel | SENT Channel whose data has to be read
frame | Data read from the SENT Channel
Returns
TRUE if data received otherwise false

Usage example: see How to use the SENT Interface driver?

Definition at line 323 of file IfxSent_Sent.c.

◆ IfxSent_Sent_readChannelSerialMessageFrame()

IFX_EXTERN boolean IfxSent_Sent_readChannelSerialMessageFrame | ( | IfxSent_Sent_Channel * | channel,
 |  | IfxSent_Sent_SerialMessageFrame * | message
 | ) |  |

reads the Serial data recieved and collected over several SENT frames

Parameters
channel | reads the Serial data recieved and collected over several SENT frames
message | Data pointer pointing to the serial data read from the SENT Channel
Returns
TRUE if serial message received otherwise false

Usage example: see How to use the SENT Interface driver?

Definition at line 337 of file IfxSent_Sent.c.


iLLD_TC38A: IfxSent_cfg.h File Reference

  • _Impl
Macros | Enumerations
IfxSent_cfg.h File Reference
iLLD » SENT

SENT on-chip implementation data. More...

Go to the source code of this file.

Macros

#define | IFXSENT_CFG_CHANNEL_INTEN (0x1FEDU)
Specifies all interrupt events. More...
#define | IFXSENT_CFG_STEP_RANGE (1024)
Specifies the step range for calculating module clock. More...
#define | IFXSENT_CFG_TIMEOUT_VALUE ((uint16)0xFFFFU)
Specifies timeout value in transmission. More...
#define | IFXSENT_NUM_CHANNELS (25)
#define | IFXSENT_NUM_MODULES (1)

Enumerations

enum IfxSent_ChannelId {
IfxSent_ChannelId_0 = 0,
IfxSent_ChannelId_1 = 1,
IfxSent_ChannelId_2 = 2,
IfxSent_ChannelId_3 = 3,
IfxSent_ChannelId_4 = 4,
IfxSent_ChannelId_5 = 5,
IfxSent_ChannelId_6 = 6,
IfxSent_ChannelId_7 = 7,
IfxSent_ChannelId_8 = 8,
IfxSent_ChannelId_9 = 9,
IfxSent_ChannelId_10 = 10,
IfxSent_ChannelId_11 = 11,
IfxSent_ChannelId_12 = 12,
IfxSent_ChannelId_13 = 13,
IfxSent_ChannelId_14 = 14,
IfxSent_ChannelId_15 = 15,
IfxSent_ChannelId_16 = 16,
IfxSent_ChannelId_17 = 17,
IfxSent_ChannelId_18 = 18,
IfxSent_ChannelId_19 = 19,
IfxSent_ChannelId_20 = 20,
IfxSent_ChannelId_21 = 21,
IfxSent_ChannelId_22 = 22,
IfxSent_ChannelId_23 = 23,
IfxSent_ChannelId_24 = 24,
IfxSent_ChannelId_none = -1
}
Specifies the channel Id. More...

Detailed Description

SENT on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxSent_cfg.h.

Macro Definition Documentation

◆ IFXSENT_CFG_CHANNEL_INTEN

#define IFXSENT_CFG_CHANNEL_INTEN (0x1FEDU)

Specifies all interrupt events.

Definition at line 65 of file IfxSent_cfg.h.

Referenced by IfxSent_Sent_initChannelConfig().

◆ IFXSENT_CFG_STEP_RANGE

#define IFXSENT_CFG_STEP_RANGE (1024)

Specifies the step range for calculating module clock.

Definition at line 69 of file IfxSent_cfg.h.

◆ IFXSENT_CFG_TIMEOUT_VALUE

#define IFXSENT_CFG_TIMEOUT_VALUE ((uint16)0xFFFFU)

Specifies timeout value in transmission.

Definition at line 73 of file IfxSent_cfg.h.

Referenced by IfxSent_Sent_initChannel().

◆ IFXSENT_NUM_CHANNELS

#define IFXSENT_NUM_CHANNELS (25)

Definition at line 75 of file IfxSent_cfg.h.

◆ IFXSENT_NUM_MODULES

#define IFXSENT_NUM_MODULES (1)

Definition at line 77 of file IfxSent_cfg.h.

Enumeration Type Documentation

◆ IfxSent_ChannelId

enum IfxSent_ChannelId

Specifies the channel Id.

Enumerator
IfxSent_ChannelId_0 | Specifies the channel Id 0.
IfxSent_ChannelId_1 | Specifies the channel Id 1.
IfxSent_ChannelId_2 | Specifies the channel Id 2.
IfxSent_ChannelId_3 | Specifies the channel Id 3.
IfxSent_ChannelId_4 | Specifies the channel Id 4.
IfxSent_ChannelId_5 | Specifies the channel Id 5.
IfxSent_ChannelId_6 | Specifies the channel Id 6.
IfxSent_ChannelId_7 | Specifies the channel Id 7.
IfxSent_ChannelId_8 | Specifies the channel Id 8.
IfxSent_ChannelId_9 | Specifies the channel Id 9.
IfxSent_ChannelId_10 | Specifies the channel Id 10.
IfxSent_ChannelId_11 | Specifies the channel Id 11.
IfxSent_ChannelId_12 | Specifies the channel Id 12.
IfxSent_ChannelId_13 | Specifies the channel Id 13.
IfxSent_ChannelId_14 | Specifies the channel Id 14.
IfxSent_ChannelId_15 | Specifies the channel Id 15.
IfxSent_ChannelId_16 | Specifies the channel Id 16.
IfxSent_ChannelId_17 | Specifies the channel Id 17.
IfxSent_ChannelId_18 | Specifies the channel ID 18.
IfxSent_ChannelId_19 | Specifies the Channel ID 19.
IfxSent_ChannelId_20 | Specifies the Channel ID 20.
IfxSent_ChannelId_21 | Specifies the Channel ID 21.
IfxSent_ChannelId_22 | Specifies the Channel ID 22.
IfxSent_ChannelId_23 | Specifies the Channel ID 23.
IfxSent_ChannelId_24 | Specifies the Channel ID 24.
IfxSent_ChannelId_none | None Sent channels.

Definition at line 85 of file IfxSent_cfg.h.


iLLD_TC38A: IfxSent_PinMap.c File Reference

  • _PinMap
Variables
IfxSent_PinMap.c File Reference
iLLD » SENT

SENT I/O map. More...

#include "IfxSent_PinMap.h"
Include dependency graph for IfxSent_PinMap.c:

Go to the source code of this file.

Variables

IfxSent_Sent_In | IfxSent_SENT0A_P40_0_IN = {&MODULE_SENT, IfxSent_ChannelId_0, {&MODULE_P40, 0}, Ifx_RxSel_a}
IfxSent_Sent_In | IfxSent_SENT0B_P00_1_IN = {&MODULE_SENT, IfxSent_ChannelId_0, {&MODULE_P00, 1}, Ifx_RxSel_b}
IfxSent_Sent_In | IfxSent_SENT0C_P02_8_IN = {&MODULE_SENT, IfxSent_ChannelId_0, {&MODULE_P02, 8}, Ifx_RxSel_c}
IfxSent_Sent_In | IfxSent_SENT10A_P40_10_IN = {&MODULE_SENT, IfxSent_ChannelId_10, {&MODULE_P40,10}, Ifx_RxSel_a}
IfxSent_Sent_In | IfxSent_SENT10B_P00_11_IN = {&MODULE_SENT, IfxSent_ChannelId_10, {&MODULE_P00,11}, Ifx_RxSel_b}
IfxSent_Sent_In | IfxSent_SENT10C_P32_5_IN = {&MODULE_SENT, IfxSent_ChannelId_10, {&MODULE_P32, 5}, Ifx_RxSel_c}
IfxSent_Sent_In | IfxSent_SENT10D_P15_2_IN = {&MODULE_SENT, IfxSent_ChannelId_10, {&MODULE_P15, 2}, Ifx_RxSel_d}
IfxSent_Sent_In | IfxSent_SENT11A_P40_11_IN = {&MODULE_SENT, IfxSent_ChannelId_11, {&MODULE_P40,11}, Ifx_RxSel_a}
IfxSent_Sent_In | IfxSent_SENT11B_P00_12_IN = {&MODULE_SENT, IfxSent_ChannelId_11, {&MODULE_P00,12}, Ifx_RxSel_b}
IfxSent_Sent_In | IfxSent_SENT11C_P32_6_IN = {&MODULE_SENT, IfxSent_ChannelId_11, {&MODULE_P32, 6}, Ifx_RxSel_c}
IfxSent_Sent_In | IfxSent_SENT11D_P15_4_IN = {&MODULE_SENT, IfxSent_ChannelId_11, {&MODULE_P15, 4}, Ifx_RxSel_d}
IfxSent_Sent_In | IfxSent_SENT12A_P40_12_IN = {&MODULE_SENT, IfxSent_ChannelId_12, {&MODULE_P40,12}, Ifx_RxSel_a}
IfxSent_Sent_In | IfxSent_SENT12B_P02_4_IN = {&MODULE_SENT, IfxSent_ChannelId_12, {&MODULE_P02, 4}, Ifx_RxSel_b}
IfxSent_Sent_In | IfxSent_SENT12C_P32_7_IN = {&MODULE_SENT, IfxSent_ChannelId_12, {&MODULE_P32, 7}, Ifx_RxSel_c}
IfxSent_Sent_In | IfxSent_SENT13A_P40_13_IN = {&MODULE_SENT, IfxSent_ChannelId_13, {&MODULE_P40,13}, Ifx_RxSel_a}
IfxSent_Sent_In | IfxSent_SENT13B_P02_3_IN = {&MODULE_SENT, IfxSent_ChannelId_13, {&MODULE_P02, 3}, Ifx_RxSel_b}
IfxSent_Sent_In | IfxSent_SENT13C_P33_0_IN = {&MODULE_SENT, IfxSent_ChannelId_13, {&MODULE_P33, 0}, Ifx_RxSel_c}
IfxSent_Sent_In | IfxSent_SENT14A_P40_14_IN = {&MODULE_SENT, IfxSent_ChannelId_14, {&MODULE_P40,14}, Ifx_RxSel_a}
IfxSent_Sent_In | IfxSent_SENT14B_P02_2_IN = {&MODULE_SENT, IfxSent_ChannelId_14, {&MODULE_P02, 2}, Ifx_RxSel_b}
IfxSent_Sent_In | IfxSent_SENT14C_P33_7_IN = {&MODULE_SENT, IfxSent_ChannelId_14, {&MODULE_P33, 7}, Ifx_RxSel_c}
IfxSent_Sent_In | IfxSent_SENT15A_P40_15_IN = {&MODULE_SENT, IfxSent_ChannelId_15, {&MODULE_P40,15}, Ifx_RxSel_a}
IfxSent_Sent_In | IfxSent_SENT15B_P01_1_IN = {&MODULE_SENT, IfxSent_ChannelId_15, {&MODULE_P01, 1}, Ifx_RxSel_b}
IfxSent_Sent_In | IfxSent_SENT15C_P10_9_IN = {&MODULE_SENT, IfxSent_ChannelId_15, {&MODULE_P10, 9}, Ifx_RxSel_c}
IfxSent_Sent_In | IfxSent_SENT16A_P41_0_IN = {&MODULE_SENT, IfxSent_ChannelId_16, {&MODULE_P41, 0}, Ifx_RxSel_a}
IfxSent_Sent_In | IfxSent_SENT16B_P01_9_IN = {&MODULE_SENT, IfxSent_ChannelId_16, {&MODULE_P01, 9}, Ifx_RxSel_b}
IfxSent_Sent_In | IfxSent_SENT16C_P10_10_IN = {&MODULE_SENT, IfxSent_ChannelId_16, {&MODULE_P10,10}, Ifx_RxSel_c}
IfxSent_Sent_In | IfxSent_SENT17A_P41_1_IN = {&MODULE_SENT, IfxSent_ChannelId_17, {&MODULE_P41, 1}, Ifx_RxSel_a}
IfxSent_Sent_In | IfxSent_SENT17B_P01_8_IN = {&MODULE_SENT, IfxSent_ChannelId_17, {&MODULE_P01, 8}, Ifx_RxSel_b}
IfxSent_Sent_In | IfxSent_SENT17C_P10_14_IN = {&MODULE_SENT, IfxSent_ChannelId_17, {&MODULE_P10,14}, Ifx_RxSel_c}
IfxSent_Sent_In | IfxSent_SENT17D_P14_0_IN = {&MODULE_SENT, IfxSent_ChannelId_17, {&MODULE_P14, 0}, Ifx_RxSel_d}
IfxSent_Sent_In | IfxSent_SENT18A_P41_2_IN = {&MODULE_SENT, IfxSent_ChannelId_18, {&MODULE_P41, 2}, Ifx_RxSel_a}
IfxSent_Sent_In | IfxSent_SENT18B_P01_10_IN = {&MODULE_SENT, IfxSent_ChannelId_18, {&MODULE_P01,10}, Ifx_RxSel_b}
IfxSent_Sent_In | IfxSent_SENT18C_P10_13_IN = {&MODULE_SENT, IfxSent_ChannelId_18, {&MODULE_P10,13}, Ifx_RxSel_c}
IfxSent_Sent_In | IfxSent_SENT18D_P14_1_IN = {&MODULE_SENT, IfxSent_ChannelId_18, {&MODULE_P14, 1}, Ifx_RxSel_d}
IfxSent_Sent_In | IfxSent_SENT19A_P41_3_IN = {&MODULE_SENT, IfxSent_ChannelId_19, {&MODULE_P41, 3}, Ifx_RxSel_a}
IfxSent_Sent_In | IfxSent_SENT19B_P01_11_IN = {&MODULE_SENT, IfxSent_ChannelId_19, {&MODULE_P01,11}, Ifx_RxSel_b}
IfxSent_Sent_In | IfxSent_SENT19C_P10_11_IN = {&MODULE_SENT, IfxSent_ChannelId_19, {&MODULE_P10,11}, Ifx_RxSel_c}
IfxSent_Sent_In | IfxSent_SENT1A_P40_1_IN = {&MODULE_SENT, IfxSent_ChannelId_1, {&MODULE_P40, 1}, Ifx_RxSel_a}
IfxSent_Sent_In | IfxSent_SENT1B_P00_2_IN = {&MODULE_SENT, IfxSent_ChannelId_1, {&MODULE_P00, 2}, Ifx_RxSel_b}
IfxSent_Sent_In | IfxSent_SENT1C_P02_7_IN = {&MODULE_SENT, IfxSent_ChannelId_1, {&MODULE_P02, 7}, Ifx_RxSel_c}
IfxSent_Sent_In | IfxSent_SENT20A_P41_4_IN = {&MODULE_SENT, IfxSent_ChannelId_20, {&MODULE_P41, 4}, Ifx_RxSel_a}
IfxSent_Sent_In | IfxSent_SENT20B_P02_9_IN = {&MODULE_SENT, IfxSent_ChannelId_20, {&MODULE_P02, 9}, Ifx_RxSel_b}
IfxSent_Sent_In | IfxSent_SENT20C_P31_8_IN = {&MODULE_SENT, IfxSent_ChannelId_20, {&MODULE_P31, 8}, Ifx_RxSel_c}
IfxSent_Sent_In | IfxSent_SENT21A_P41_5_IN = {&MODULE_SENT, IfxSent_ChannelId_21, {&MODULE_P41, 5}, Ifx_RxSel_a}
IfxSent_Sent_In | IfxSent_SENT21B_P02_10_IN = {&MODULE_SENT, IfxSent_ChannelId_21, {&MODULE_P02,10}, Ifx_RxSel_b}
IfxSent_Sent_In | IfxSent_SENT21C_P31_9_IN = {&MODULE_SENT, IfxSent_ChannelId_21, {&MODULE_P31, 9}, Ifx_RxSel_c}
IfxSent_Sent_In | IfxSent_SENT22A_P41_6_IN = {&MODULE_SENT, IfxSent_ChannelId_22, {&MODULE_P41, 6}, Ifx_RxSel_a}
IfxSent_Sent_In | IfxSent_SENT22B_P02_11_IN = {&MODULE_SENT, IfxSent_ChannelId_22, {&MODULE_P02,11}, Ifx_RxSel_b}
IfxSent_Sent_In | IfxSent_SENT22C_P31_10_IN = {&MODULE_SENT, IfxSent_ChannelId_22, {&MODULE_P31,10}, Ifx_RxSel_c}
IfxSent_Sent_In | IfxSent_SENT23A_P41_7_IN = {&MODULE_SENT, IfxSent_ChannelId_23, {&MODULE_P41, 7}, Ifx_RxSel_a}
IfxSent_Sent_In | IfxSent_SENT23B_P02_12_IN = {&MODULE_SENT, IfxSent_ChannelId_23, {&MODULE_P02,12}, Ifx_RxSel_b}
IfxSent_Sent_In | IfxSent_SENT23C_P31_11_IN = {&MODULE_SENT, IfxSent_ChannelId_23, {&MODULE_P31,11}, Ifx_RxSel_c}
IfxSent_Sent_In | IfxSent_SENT24A_P41_8_IN = {&MODULE_SENT, IfxSent_ChannelId_24, {&MODULE_P41, 8}, Ifx_RxSel_a}
IfxSent_Sent_In | IfxSent_SENT24B_P02_13_IN = {&MODULE_SENT, IfxSent_ChannelId_24, {&MODULE_P02,13}, Ifx_RxSel_b}
IfxSent_Sent_In | IfxSent_SENT24C_P31_12_IN = {&MODULE_SENT, IfxSent_ChannelId_24, {&MODULE_P31,12}, Ifx_RxSel_c}
IfxSent_Sent_In | IfxSent_SENT2A_P40_2_IN = {&MODULE_SENT, IfxSent_ChannelId_2, {&MODULE_P40, 2}, Ifx_RxSel_a}
IfxSent_Sent_In | IfxSent_SENT2B_P00_3_IN = {&MODULE_SENT, IfxSent_ChannelId_2, {&MODULE_P00, 3}, Ifx_RxSel_b}
IfxSent_Sent_In | IfxSent_SENT2C_P02_6_IN = {&MODULE_SENT, IfxSent_ChannelId_2, {&MODULE_P02, 6}, Ifx_RxSel_c}
IfxSent_Sent_In | IfxSent_SENT3A_P40_3_IN = {&MODULE_SENT, IfxSent_ChannelId_3, {&MODULE_P40, 3}, Ifx_RxSel_a}
IfxSent_Sent_In | IfxSent_SENT3B_P00_4_IN = {&MODULE_SENT, IfxSent_ChannelId_3, {&MODULE_P00, 4}, Ifx_RxSel_b}
IfxSent_Sent_In | IfxSent_SENT3C_P02_5_IN = {&MODULE_SENT, IfxSent_ChannelId_3, {&MODULE_P02, 5}, Ifx_RxSel_c}
IfxSent_Sent_In | IfxSent_SENT4A_P40_4_IN = {&MODULE_SENT, IfxSent_ChannelId_4, {&MODULE_P40, 4}, Ifx_RxSel_a}
IfxSent_Sent_In | IfxSent_SENT4B_P00_5_IN = {&MODULE_SENT, IfxSent_ChannelId_4, {&MODULE_P00, 5}, Ifx_RxSel_b}
IfxSent_Sent_In | IfxSent_SENT4C_P33_6_IN = {&MODULE_SENT, IfxSent_ChannelId_4, {&MODULE_P33, 6}, Ifx_RxSel_c}
IfxSent_Sent_In | IfxSent_SENT5A_P40_5_IN = {&MODULE_SENT, IfxSent_ChannelId_5, {&MODULE_P40, 5}, Ifx_RxSel_a}
IfxSent_Sent_In | IfxSent_SENT5B_P00_6_IN = {&MODULE_SENT, IfxSent_ChannelId_5, {&MODULE_P00, 6}, Ifx_RxSel_b}
IfxSent_Sent_In | IfxSent_SENT5C_P33_5_IN = {&MODULE_SENT, IfxSent_ChannelId_5, {&MODULE_P33, 5}, Ifx_RxSel_c}
IfxSent_Sent_In | IfxSent_SENT6A_P40_6_IN = {&MODULE_SENT, IfxSent_ChannelId_6, {&MODULE_P40, 6}, Ifx_RxSel_a}
IfxSent_Sent_In | IfxSent_SENT6B_P00_7_IN = {&MODULE_SENT, IfxSent_ChannelId_6, {&MODULE_P00, 7}, Ifx_RxSel_b}
IfxSent_Sent_In | IfxSent_SENT6C_P33_4_IN = {&MODULE_SENT, IfxSent_ChannelId_6, {&MODULE_P33, 4}, Ifx_RxSel_c}
IfxSent_Sent_In | IfxSent_SENT7A_P40_7_IN = {&MODULE_SENT, IfxSent_ChannelId_7, {&MODULE_P40, 7}, Ifx_RxSel_a}
IfxSent_Sent_In | IfxSent_SENT7B_P00_8_IN = {&MODULE_SENT, IfxSent_ChannelId_7, {&MODULE_P00, 8}, Ifx_RxSel_b}
IfxSent_Sent_In | IfxSent_SENT7C_P33_3_IN = {&MODULE_SENT, IfxSent_ChannelId_7, {&MODULE_P33, 3}, Ifx_RxSel_c}
IfxSent_Sent_In | IfxSent_SENT8A_P40_8_IN = {&MODULE_SENT, IfxSent_ChannelId_8, {&MODULE_P40, 8}, Ifx_RxSel_a}
IfxSent_Sent_In | IfxSent_SENT8B_P00_9_IN = {&MODULE_SENT, IfxSent_ChannelId_8, {&MODULE_P00, 9}, Ifx_RxSel_b}
IfxSent_Sent_In | IfxSent_SENT8C_P33_2_IN = {&MODULE_SENT, IfxSent_ChannelId_8, {&MODULE_P33, 2}, Ifx_RxSel_c}
IfxSent_Sent_In | IfxSent_SENT9A_P40_9_IN = {&MODULE_SENT, IfxSent_ChannelId_9, {&MODULE_P40, 9}, Ifx_RxSel_a}
IfxSent_Sent_In | IfxSent_SENT9B_P00_10_IN = {&MODULE_SENT, IfxSent_ChannelId_9, {&MODULE_P00,10}, Ifx_RxSel_b}
IfxSent_Sent_In | IfxSent_SENT9C_P33_1_IN = {&MODULE_SENT, IfxSent_ChannelId_9, {&MODULE_P33, 1}, Ifx_RxSel_c}
IfxSent_Spc_Out | IfxSent_SPC0_P00_1_OUT = {&MODULE_SENT, IfxSent_ChannelId_0, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt6}
IfxSent_Spc_Out | IfxSent_SPC1_P02_7_OUT = {&MODULE_SENT, IfxSent_ChannelId_1, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt6}
IfxSent_Spc_Out | IfxSent_SPC2_P00_3_OUT = {&MODULE_SENT, IfxSent_ChannelId_2, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt6}
IfxSent_Spc_Out | IfxSent_SPC3_P00_4_OUT = {&MODULE_SENT, IfxSent_ChannelId_3, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt6}
IfxSent_Spc_Out | IfxSent_SPC4_P00_5_OUT = {&MODULE_SENT, IfxSent_ChannelId_4, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt6}
IfxSent_Spc_Out | IfxSent_SPC5_P00_6_OUT = {&MODULE_SENT, IfxSent_ChannelId_5, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt6}
IfxSent_Spc_Out | IfxSent_SPC6_P00_7_OUT = {&MODULE_SENT, IfxSent_ChannelId_6, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt6}
IfxSent_Spc_Out | IfxSent_SPC7_P00_8_OUT = {&MODULE_SENT, IfxSent_ChannelId_7, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt6}
IfxSent_Spc_Out | IfxSent_SPC8_P00_9_OUT = {&MODULE_SENT, IfxSent_ChannelId_8, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt6}
IfxSent_Spc_Out | IfxSent_SPC9_P00_10_OUT = {&MODULE_SENT, IfxSent_ChannelId_9, {&MODULE_P00,10}, IfxPort_OutputIdx_alt6}
const IfxSent_Sent_In * | IfxSent_Sent_In_pinTable [IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SENT_IN_NUM_ITEMS]
const IfxSent_Spc_Out * | IfxSent_Spc_Out_pinTable [IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS]

Detailed Description

SENT I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxSent_PinMap.c.

Variable Documentation

◆ IfxSent_SENT0A_P40_0_IN

IfxSent_Sent_In IfxSent_SENT0A_P40_0_IN = {&MODULE_SENT, IfxSent_ChannelId_0, {&MODULE_P40, 0}, Ifx_RxSel_a}

Definition at line 45 of file IfxSent_PinMap.c.

◆ IfxSent_SENT0B_P00_1_IN

IfxSent_Sent_In IfxSent_SENT0B_P00_1_IN = {&MODULE_SENT, IfxSent_ChannelId_0, {&MODULE_P00, 1}, Ifx_RxSel_b}

Definition at line 46 of file IfxSent_PinMap.c.

◆ IfxSent_SENT0C_P02_8_IN

IfxSent_Sent_In IfxSent_SENT0C_P02_8_IN = {&MODULE_SENT, IfxSent_ChannelId_0, {&MODULE_P02, 8}, Ifx_RxSel_c}

Definition at line 47 of file IfxSent_PinMap.c.

◆ IfxSent_SENT10A_P40_10_IN

IfxSent_Sent_In IfxSent_SENT10A_P40_10_IN = {&MODULE_SENT, IfxSent_ChannelId_10, {&MODULE_P40,10}, Ifx_RxSel_a}

Definition at line 48 of file IfxSent_PinMap.c.

◆ IfxSent_SENT10B_P00_11_IN

IfxSent_Sent_In IfxSent_SENT10B_P00_11_IN = {&MODULE_SENT, IfxSent_ChannelId_10, {&MODULE_P00,11}, Ifx_RxSel_b}

Definition at line 49 of file IfxSent_PinMap.c.

◆ IfxSent_SENT10C_P32_5_IN

IfxSent_Sent_In IfxSent_SENT10C_P32_5_IN = {&MODULE_SENT, IfxSent_ChannelId_10, {&MODULE_P32, 5}, Ifx_RxSel_c}

Definition at line 50 of file IfxSent_PinMap.c.

◆ IfxSent_SENT10D_P15_2_IN

IfxSent_Sent_In IfxSent_SENT10D_P15_2_IN = {&MODULE_SENT, IfxSent_ChannelId_10, {&MODULE_P15, 2}, Ifx_RxSel_d}

Definition at line 51 of file IfxSent_PinMap.c.

◆ IfxSent_SENT11A_P40_11_IN

IfxSent_Sent_In IfxSent_SENT11A_P40_11_IN = {&MODULE_SENT, IfxSent_ChannelId_11, {&MODULE_P40,11}, Ifx_RxSel_a}

Definition at line 52 of file IfxSent_PinMap.c.

◆ IfxSent_SENT11B_P00_12_IN

IfxSent_Sent_In IfxSent_SENT11B_P00_12_IN = {&MODULE_SENT, IfxSent_ChannelId_11, {&MODULE_P00,12}, Ifx_RxSel_b}

Definition at line 53 of file IfxSent_PinMap.c.

◆ IfxSent_SENT11C_P32_6_IN

IfxSent_Sent_In IfxSent_SENT11C_P32_6_IN = {&MODULE_SENT, IfxSent_ChannelId_11, {&MODULE_P32, 6}, Ifx_RxSel_c}

Definition at line 54 of file IfxSent_PinMap.c.

◆ IfxSent_SENT11D_P15_4_IN

IfxSent_Sent_In IfxSent_SENT11D_P15_4_IN = {&MODULE_SENT, IfxSent_ChannelId_11, {&MODULE_P15, 4}, Ifx_RxSel_d}

Definition at line 55 of file IfxSent_PinMap.c.

◆ IfxSent_SENT12A_P40_12_IN

IfxSent_Sent_In IfxSent_SENT12A_P40_12_IN = {&MODULE_SENT, IfxSent_ChannelId_12, {&MODULE_P40,12}, Ifx_RxSel_a}

Definition at line 56 of file IfxSent_PinMap.c.

◆ IfxSent_SENT12B_P02_4_IN

IfxSent_Sent_In IfxSent_SENT12B_P02_4_IN = {&MODULE_SENT, IfxSent_ChannelId_12, {&MODULE_P02, 4}, Ifx_RxSel_b}

Definition at line 57 of file IfxSent_PinMap.c.

◆ IfxSent_SENT12C_P32_7_IN

IfxSent_Sent_In IfxSent_SENT12C_P32_7_IN = {&MODULE_SENT, IfxSent_ChannelId_12, {&MODULE_P32, 7}, Ifx_RxSel_c}

Definition at line 58 of file IfxSent_PinMap.c.

◆ IfxSent_SENT13A_P40_13_IN

IfxSent_Sent_In IfxSent_SENT13A_P40_13_IN = {&MODULE_SENT, IfxSent_ChannelId_13, {&MODULE_P40,13}, Ifx_RxSel_a}

Definition at line 59 of file IfxSent_PinMap.c.

◆ IfxSent_SENT13B_P02_3_IN

IfxSent_Sent_In IfxSent_SENT13B_P02_3_IN = {&MODULE_SENT, IfxSent_ChannelId_13, {&MODULE_P02, 3}, Ifx_RxSel_b}

Definition at line 60 of file IfxSent_PinMap.c.

◆ IfxSent_SENT13C_P33_0_IN

IfxSent_Sent_In IfxSent_SENT13C_P33_0_IN = {&MODULE_SENT, IfxSent_ChannelId_13, {&MODULE_P33, 0}, Ifx_RxSel_c}

Definition at line 61 of file IfxSent_PinMap.c.

◆ IfxSent_SENT14A_P40_14_IN

IfxSent_Sent_In IfxSent_SENT14A_P40_14_IN = {&MODULE_SENT, IfxSent_ChannelId_14, {&MODULE_P40,14}, Ifx_RxSel_a}

Definition at line 62 of file IfxSent_PinMap.c.

◆ IfxSent_SENT14B_P02_2_IN

IfxSent_Sent_In IfxSent_SENT14B_P02_2_IN = {&MODULE_SENT, IfxSent_ChannelId_14, {&MODULE_P02, 2}, Ifx_RxSel_b}

Definition at line 63 of file IfxSent_PinMap.c.

◆ IfxSent_SENT14C_P33_7_IN

IfxSent_Sent_In IfxSent_SENT14C_P33_7_IN = {&MODULE_SENT, IfxSent_ChannelId_14, {&MODULE_P33, 7}, Ifx_RxSel_c}

Definition at line 64 of file IfxSent_PinMap.c.

◆ IfxSent_SENT15A_P40_15_IN

IfxSent_Sent_In IfxSent_SENT15A_P40_15_IN = {&MODULE_SENT, IfxSent_ChannelId_15, {&MODULE_P40,15}, Ifx_RxSel_a}

Definition at line 65 of file IfxSent_PinMap.c.

◆ IfxSent_SENT15B_P01_1_IN

IfxSent_Sent_In IfxSent_SENT15B_P01_1_IN = {&MODULE_SENT, IfxSent_ChannelId_15, {&MODULE_P01, 1}, Ifx_RxSel_b}

Definition at line 66 of file IfxSent_PinMap.c.

◆ IfxSent_SENT15C_P10_9_IN

IfxSent_Sent_In IfxSent_SENT15C_P10_9_IN = {&MODULE_SENT, IfxSent_ChannelId_15, {&MODULE_P10, 9}, Ifx_RxSel_c}

Definition at line 67 of file IfxSent_PinMap.c.

◆ IfxSent_SENT16A_P41_0_IN

IfxSent_Sent_In IfxSent_SENT16A_P41_0_IN = {&MODULE_SENT, IfxSent_ChannelId_16, {&MODULE_P41, 0}, Ifx_RxSel_a}

Definition at line 68 of file IfxSent_PinMap.c.

◆ IfxSent_SENT16B_P01_9_IN

IfxSent_Sent_In IfxSent_SENT16B_P01_9_IN = {&MODULE_SENT, IfxSent_ChannelId_16, {&MODULE_P01, 9}, Ifx_RxSel_b}

Definition at line 69 of file IfxSent_PinMap.c.

◆ IfxSent_SENT16C_P10_10_IN

IfxSent_Sent_In IfxSent_SENT16C_P10_10_IN = {&MODULE_SENT, IfxSent_ChannelId_16, {&MODULE_P10,10}, Ifx_RxSel_c}

Definition at line 70 of file IfxSent_PinMap.c.

◆ IfxSent_SENT17A_P41_1_IN

IfxSent_Sent_In IfxSent_SENT17A_P41_1_IN = {&MODULE_SENT, IfxSent_ChannelId_17, {&MODULE_P41, 1}, Ifx_RxSel_a}

Definition at line 71 of file IfxSent_PinMap.c.

◆ IfxSent_SENT17B_P01_8_IN

IfxSent_Sent_In IfxSent_SENT17B_P01_8_IN = {&MODULE_SENT, IfxSent_ChannelId_17, {&MODULE_P01, 8}, Ifx_RxSel_b}

Definition at line 72 of file IfxSent_PinMap.c.

◆ IfxSent_SENT17C_P10_14_IN

IfxSent_Sent_In IfxSent_SENT17C_P10_14_IN = {&MODULE_SENT, IfxSent_ChannelId_17, {&MODULE_P10,14}, Ifx_RxSel_c}

Definition at line 73 of file IfxSent_PinMap.c.

◆ IfxSent_SENT17D_P14_0_IN

IfxSent_Sent_In IfxSent_SENT17D_P14_0_IN = {&MODULE_SENT, IfxSent_ChannelId_17, {&MODULE_P14, 0}, Ifx_RxSel_d}

Definition at line 74 of file IfxSent_PinMap.c.

◆ IfxSent_SENT18A_P41_2_IN

IfxSent_Sent_In IfxSent_SENT18A_P41_2_IN = {&MODULE_SENT, IfxSent_ChannelId_18, {&MODULE_P41, 2}, Ifx_RxSel_a}

Definition at line 75 of file IfxSent_PinMap.c.

◆ IfxSent_SENT18B_P01_10_IN

IfxSent_Sent_In IfxSent_SENT18B_P01_10_IN = {&MODULE_SENT, IfxSent_ChannelId_18, {&MODULE_P01,10}, Ifx_RxSel_b}

Definition at line 76 of file IfxSent_PinMap.c.

◆ IfxSent_SENT18C_P10_13_IN

IfxSent_Sent_In IfxSent_SENT18C_P10_13_IN = {&MODULE_SENT, IfxSent_ChannelId_18, {&MODULE_P10,13}, Ifx_RxSel_c}

Definition at line 77 of file IfxSent_PinMap.c.

◆ IfxSent_SENT18D_P14_1_IN

IfxSent_Sent_In IfxSent_SENT18D_P14_1_IN = {&MODULE_SENT, IfxSent_ChannelId_18, {&MODULE_P14, 1}, Ifx_RxSel_d}

Definition at line 78 of file IfxSent_PinMap.c.

◆ IfxSent_SENT19A_P41_3_IN

IfxSent_Sent_In IfxSent_SENT19A_P41_3_IN = {&MODULE_SENT, IfxSent_ChannelId_19, {&MODULE_P41, 3}, Ifx_RxSel_a}

Definition at line 79 of file IfxSent_PinMap.c.

◆ IfxSent_SENT19B_P01_11_IN

IfxSent_Sent_In IfxSent_SENT19B_P01_11_IN = {&MODULE_SENT, IfxSent_ChannelId_19, {&MODULE_P01,11}, Ifx_RxSel_b}

Definition at line 80 of file IfxSent_PinMap.c.

◆ IfxSent_SENT19C_P10_11_IN

IfxSent_Sent_In IfxSent_SENT19C_P10_11_IN = {&MODULE_SENT, IfxSent_ChannelId_19, {&MODULE_P10,11}, Ifx_RxSel_c}

Definition at line 81 of file IfxSent_PinMap.c.

◆ IfxSent_SENT1A_P40_1_IN

IfxSent_Sent_In IfxSent_SENT1A_P40_1_IN = {&MODULE_SENT, IfxSent_ChannelId_1, {&MODULE_P40, 1}, Ifx_RxSel_a}

Definition at line 82 of file IfxSent_PinMap.c.

◆ IfxSent_SENT1B_P00_2_IN

IfxSent_Sent_In IfxSent_SENT1B_P00_2_IN = {&MODULE_SENT, IfxSent_ChannelId_1, {&MODULE_P00, 2}, Ifx_RxSel_b}

Definition at line 83 of file IfxSent_PinMap.c.

◆ IfxSent_SENT1C_P02_7_IN

IfxSent_Sent_In IfxSent_SENT1C_P02_7_IN = {&MODULE_SENT, IfxSent_ChannelId_1, {&MODULE_P02, 7}, Ifx_RxSel_c}

Definition at line 84 of file IfxSent_PinMap.c.

◆ IfxSent_SENT20A_P41_4_IN

IfxSent_Sent_In IfxSent_SENT20A_P41_4_IN = {&MODULE_SENT, IfxSent_ChannelId_20, {&MODULE_P41, 4}, Ifx_RxSel_a}

Definition at line 85 of file IfxSent_PinMap.c.

◆ IfxSent_SENT20B_P02_9_IN

IfxSent_Sent_In IfxSent_SENT20B_P02_9_IN = {&MODULE_SENT, IfxSent_ChannelId_20, {&MODULE_P02, 9}, Ifx_RxSel_b}

Definition at line 86 of file IfxSent_PinMap.c.

◆ IfxSent_SENT20C_P31_8_IN

IfxSent_Sent_In IfxSent_SENT20C_P31_8_IN = {&MODULE_SENT, IfxSent_ChannelId_20, {&MODULE_P31, 8}, Ifx_RxSel_c}

Definition at line 87 of file IfxSent_PinMap.c.

◆ IfxSent_SENT21A_P41_5_IN

IfxSent_Sent_In IfxSent_SENT21A_P41_5_IN = {&MODULE_SENT, IfxSent_ChannelId_21, {&MODULE_P41, 5}, Ifx_RxSel_a}

Definition at line 88 of file IfxSent_PinMap.c.

◆ IfxSent_SENT21B_P02_10_IN

IfxSent_Sent_In IfxSent_SENT21B_P02_10_IN = {&MODULE_SENT, IfxSent_ChannelId_21, {&MODULE_P02,10}, Ifx_RxSel_b}

Definition at line 89 of file IfxSent_PinMap.c.

◆ IfxSent_SENT21C_P31_9_IN

IfxSent_Sent_In IfxSent_SENT21C_P31_9_IN = {&MODULE_SENT, IfxSent_ChannelId_21, {&MODULE_P31, 9}, Ifx_RxSel_c}

Definition at line 90 of file IfxSent_PinMap.c.

◆ IfxSent_SENT22A_P41_6_IN

IfxSent_Sent_In IfxSent_SENT22A_P41_6_IN = {&MODULE_SENT, IfxSent_ChannelId_22, {&MODULE_P41, 6}, Ifx_RxSel_a}

Definition at line 91 of file IfxSent_PinMap.c.

◆ IfxSent_SENT22B_P02_11_IN

IfxSent_Sent_In IfxSent_SENT22B_P02_11_IN = {&MODULE_SENT, IfxSent_ChannelId_22, {&MODULE_P02,11}, Ifx_RxSel_b}

Definition at line 92 of file IfxSent_PinMap.c.

◆ IfxSent_SENT22C_P31_10_IN

IfxSent_Sent_In IfxSent_SENT22C_P31_10_IN = {&MODULE_SENT, IfxSent_ChannelId_22, {&MODULE_P31,10}, Ifx_RxSel_c}

Definition at line 93 of file IfxSent_PinMap.c.

◆ IfxSent_SENT23A_P41_7_IN

IfxSent_Sent_In IfxSent_SENT23A_P41_7_IN = {&MODULE_SENT, IfxSent_ChannelId_23, {&MODULE_P41, 7}, Ifx_RxSel_a}

Definition at line 94 of file IfxSent_PinMap.c.

◆ IfxSent_SENT23B_P02_12_IN

IfxSent_Sent_In IfxSent_SENT23B_P02_12_IN = {&MODULE_SENT, IfxSent_ChannelId_23, {&MODULE_P02,12}, Ifx_RxSel_b}

Definition at line 95 of file IfxSent_PinMap.c.

◆ IfxSent_SENT23C_P31_11_IN

IfxSent_Sent_In IfxSent_SENT23C_P31_11_IN = {&MODULE_SENT, IfxSent_ChannelId_23, {&MODULE_P31,11}, Ifx_RxSel_c}

Definition at line 96 of file IfxSent_PinMap.c.

◆ IfxSent_SENT24A_P41_8_IN

IfxSent_Sent_In IfxSent_SENT24A_P41_8_IN = {&MODULE_SENT, IfxSent_ChannelId_24, {&MODULE_P41, 8}, Ifx_RxSel_a}

Definition at line 97 of file IfxSent_PinMap.c.

◆ IfxSent_SENT24B_P02_13_IN

IfxSent_Sent_In IfxSent_SENT24B_P02_13_IN = {&MODULE_SENT, IfxSent_ChannelId_24, {&MODULE_P02,13}, Ifx_RxSel_b}

Definition at line 98 of file IfxSent_PinMap.c.

◆ IfxSent_SENT24C_P31_12_IN

IfxSent_Sent_In IfxSent_SENT24C_P31_12_IN = {&MODULE_SENT, IfxSent_ChannelId_24, {&MODULE_P31,12}, Ifx_RxSel_c}

Definition at line 99 of file IfxSent_PinMap.c.

◆ IfxSent_SENT2A_P40_2_IN

IfxSent_Sent_In IfxSent_SENT2A_P40_2_IN = {&MODULE_SENT, IfxSent_ChannelId_2, {&MODULE_P40, 2}, Ifx_RxSel_a}

Definition at line 100 of file IfxSent_PinMap.c.

◆ IfxSent_SENT2B_P00_3_IN

IfxSent_Sent_In IfxSent_SENT2B_P00_3_IN = {&MODULE_SENT, IfxSent_ChannelId_2, {&MODULE_P00, 3}, Ifx_RxSel_b}

Definition at line 101 of file IfxSent_PinMap.c.

◆ IfxSent_SENT2C_P02_6_IN

IfxSent_Sent_In IfxSent_SENT2C_P02_6_IN = {&MODULE_SENT, IfxSent_ChannelId_2, {&MODULE_P02, 6}, Ifx_RxSel_c}

Definition at line 102 of file IfxSent_PinMap.c.

◆ IfxSent_SENT3A_P40_3_IN

IfxSent_Sent_In IfxSent_SENT3A_P40_3_IN = {&MODULE_SENT, IfxSent_ChannelId_3, {&MODULE_P40, 3}, Ifx_RxSel_a}

Definition at line 103 of file IfxSent_PinMap.c.

◆ IfxSent_SENT3B_P00_4_IN

IfxSent_Sent_In IfxSent_SENT3B_P00_4_IN = {&MODULE_SENT, IfxSent_ChannelId_3, {&MODULE_P00, 4}, Ifx_RxSel_b}

Definition at line 104 of file IfxSent_PinMap.c.

◆ IfxSent_SENT3C_P02_5_IN

IfxSent_Sent_In IfxSent_SENT3C_P02_5_IN = {&MODULE_SENT, IfxSent_ChannelId_3, {&MODULE_P02, 5}, Ifx_RxSel_c}

Definition at line 105 of file IfxSent_PinMap.c.

◆ IfxSent_SENT4A_P40_4_IN

IfxSent_Sent_In IfxSent_SENT4A_P40_4_IN = {&MODULE_SENT, IfxSent_ChannelId_4, {&MODULE_P40, 4}, Ifx_RxSel_a}

Definition at line 106 of file IfxSent_PinMap.c.

◆ IfxSent_SENT4B_P00_5_IN

IfxSent_Sent_In IfxSent_SENT4B_P00_5_IN = {&MODULE_SENT, IfxSent_ChannelId_4, {&MODULE_P00, 5}, Ifx_RxSel_b}

Definition at line 107 of file IfxSent_PinMap.c.

◆ IfxSent_SENT4C_P33_6_IN

IfxSent_Sent_In IfxSent_SENT4C_P33_6_IN = {&MODULE_SENT, IfxSent_ChannelId_4, {&MODULE_P33, 6}, Ifx_RxSel_c}

Definition at line 108 of file IfxSent_PinMap.c.

◆ IfxSent_SENT5A_P40_5_IN

IfxSent_Sent_In IfxSent_SENT5A_P40_5_IN = {&MODULE_SENT, IfxSent_ChannelId_5, {&MODULE_P40, 5}, Ifx_RxSel_a}

Definition at line 109 of file IfxSent_PinMap.c.

◆ IfxSent_SENT5B_P00_6_IN

IfxSent_Sent_In IfxSent_SENT5B_P00_6_IN = {&MODULE_SENT, IfxSent_ChannelId_5, {&MODULE_P00, 6}, Ifx_RxSel_b}

Definition at line 110 of file IfxSent_PinMap.c.

◆ IfxSent_SENT5C_P33_5_IN

IfxSent_Sent_In IfxSent_SENT5C_P33_5_IN = {&MODULE_SENT, IfxSent_ChannelId_5, {&MODULE_P33, 5}, Ifx_RxSel_c}

Definition at line 111 of file IfxSent_PinMap.c.

◆ IfxSent_SENT6A_P40_6_IN

IfxSent_Sent_In IfxSent_SENT6A_P40_6_IN = {&MODULE_SENT, IfxSent_ChannelId_6, {&MODULE_P40, 6}, Ifx_RxSel_a}

Definition at line 112 of file IfxSent_PinMap.c.

◆ IfxSent_SENT6B_P00_7_IN

IfxSent_Sent_In IfxSent_SENT6B_P00_7_IN = {&MODULE_SENT, IfxSent_ChannelId_6, {&MODULE_P00, 7}, Ifx_RxSel_b}

Definition at line 113 of file IfxSent_PinMap.c.

◆ IfxSent_SENT6C_P33_4_IN

IfxSent_Sent_In IfxSent_SENT6C_P33_4_IN = {&MODULE_SENT, IfxSent_ChannelId_6, {&MODULE_P33, 4}, Ifx_RxSel_c}

Definition at line 114 of file IfxSent_PinMap.c.

◆ IfxSent_SENT7A_P40_7_IN

IfxSent_Sent_In IfxSent_SENT7A_P40_7_IN = {&MODULE_SENT, IfxSent_ChannelId_7, {&MODULE_P40, 7}, Ifx_RxSel_a}

Definition at line 115 of file IfxSent_PinMap.c.

◆ IfxSent_SENT7B_P00_8_IN

IfxSent_Sent_In IfxSent_SENT7B_P00_8_IN = {&MODULE_SENT, IfxSent_ChannelId_7, {&MODULE_P00, 8}, Ifx_RxSel_b}

Definition at line 116 of file IfxSent_PinMap.c.

◆ IfxSent_SENT7C_P33_3_IN

IfxSent_Sent_In IfxSent_SENT7C_P33_3_IN = {&MODULE_SENT, IfxSent_ChannelId_7, {&MODULE_P33, 3}, Ifx_RxSel_c}

Definition at line 117 of file IfxSent_PinMap.c.

◆ IfxSent_SENT8A_P40_8_IN

IfxSent_Sent_In IfxSent_SENT8A_P40_8_IN = {&MODULE_SENT, IfxSent_ChannelId_8, {&MODULE_P40, 8}, Ifx_RxSel_a}

Definition at line 118 of file IfxSent_PinMap.c.

◆ IfxSent_SENT8B_P00_9_IN

IfxSent_Sent_In IfxSent_SENT8B_P00_9_IN = {&MODULE_SENT, IfxSent_ChannelId_8, {&MODULE_P00, 9}, Ifx_RxSel_b}

Definition at line 119 of file IfxSent_PinMap.c.

◆ IfxSent_SENT8C_P33_2_IN

IfxSent_Sent_In IfxSent_SENT8C_P33_2_IN = {&MODULE_SENT, IfxSent_ChannelId_8, {&MODULE_P33, 2}, Ifx_RxSel_c}

Definition at line 120 of file IfxSent_PinMap.c.

◆ IfxSent_SENT9A_P40_9_IN

IfxSent_Sent_In IfxSent_SENT9A_P40_9_IN = {&MODULE_SENT, IfxSent_ChannelId_9, {&MODULE_P40, 9}, Ifx_RxSel_a}

Definition at line 121 of file IfxSent_PinMap.c.

◆ IfxSent_SENT9B_P00_10_IN

IfxSent_Sent_In IfxSent_SENT9B_P00_10_IN = {&MODULE_SENT, IfxSent_ChannelId_9, {&MODULE_P00,10}, Ifx_RxSel_b}

Definition at line 122 of file IfxSent_PinMap.c.

◆ IfxSent_SENT9C_P33_1_IN

IfxSent_Sent_In IfxSent_SENT9C_P33_1_IN = {&MODULE_SENT, IfxSent_ChannelId_9, {&MODULE_P33, 1}, Ifx_RxSel_c}

Definition at line 123 of file IfxSent_PinMap.c.

◆ IfxSent_Sent_In_pinTable

const IfxSent_Sent_In* IfxSent_Sent_In_pinTable[IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SENT_IN_NUM_ITEMS]

Definition at line 136 of file IfxSent_PinMap.c.

◆ IfxSent_SPC0_P00_1_OUT

IfxSent_Spc_Out IfxSent_SPC0_P00_1_OUT = {&MODULE_SENT, IfxSent_ChannelId_0, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt6}

Definition at line 124 of file IfxSent_PinMap.c.

◆ IfxSent_SPC1_P02_7_OUT

IfxSent_Spc_Out IfxSent_SPC1_P02_7_OUT = {&MODULE_SENT, IfxSent_ChannelId_1, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt6}

Definition at line 125 of file IfxSent_PinMap.c.

◆ IfxSent_SPC2_P00_3_OUT

IfxSent_Spc_Out IfxSent_SPC2_P00_3_OUT = {&MODULE_SENT, IfxSent_ChannelId_2, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt6}

Definition at line 126 of file IfxSent_PinMap.c.

◆ IfxSent_SPC3_P00_4_OUT

IfxSent_Spc_Out IfxSent_SPC3_P00_4_OUT = {&MODULE_SENT, IfxSent_ChannelId_3, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt6}

Definition at line 127 of file IfxSent_PinMap.c.

◆ IfxSent_SPC4_P00_5_OUT

IfxSent_Spc_Out IfxSent_SPC4_P00_5_OUT = {&MODULE_SENT, IfxSent_ChannelId_4, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt6}

Definition at line 128 of file IfxSent_PinMap.c.

◆ IfxSent_SPC5_P00_6_OUT

IfxSent_Spc_Out IfxSent_SPC5_P00_6_OUT = {&MODULE_SENT, IfxSent_ChannelId_5, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt6}

Definition at line 129 of file IfxSent_PinMap.c.

◆ IfxSent_SPC6_P00_7_OUT

IfxSent_Spc_Out IfxSent_SPC6_P00_7_OUT = {&MODULE_SENT, IfxSent_ChannelId_6, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt6}

Definition at line 130 of file IfxSent_PinMap.c.

◆ IfxSent_SPC7_P00_8_OUT

IfxSent_Spc_Out IfxSent_SPC7_P00_8_OUT = {&MODULE_SENT, IfxSent_ChannelId_7, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt6}

Definition at line 131 of file IfxSent_PinMap.c.

◆ IfxSent_SPC8_P00_9_OUT

IfxSent_Spc_Out IfxSent_SPC8_P00_9_OUT = {&MODULE_SENT, IfxSent_ChannelId_8, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt6}

Definition at line 132 of file IfxSent_PinMap.c.

◆ IfxSent_SPC9_P00_10_OUT

IfxSent_Spc_Out IfxSent_SPC9_P00_10_OUT = {&MODULE_SENT, IfxSent_ChannelId_9, {&MODULE_P00,10}, IfxPort_OutputIdx_alt6}

Definition at line 133 of file IfxSent_PinMap.c.

◆ IfxSent_Spc_Out_pinTable

const IfxSent_Spc_Out* IfxSent_Spc_Out_pinTable[IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS]

Definition at line 291 of file IfxSent_PinMap.c.


iLLD_TC38A: IfxSent_PinMap.h File Reference

  • _PinMap
Data Structures | Macros | Variables
IfxSent_PinMap.h File Reference
iLLD » SENT

SENT I/O map. More...

#include <IfxSent_reg.h>
#include <_Impl/IfxSent_cfg.h>
#include <Port/Std/IfxPort.h>
Include dependency graph for IfxSent_PinMap.h:

Go to the source code of this file.

Data Structures

struct | IfxSent_Sent_In
SENT pin mapping structure. More...
struct | IfxSent_Spc_Out
SPC pin mapping structure. More...

Macros

#define | IFXSENT_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXSENT_PINMAP_NUM_CHANNELS 25
#define | IFXSENT_PINMAP_SENT_IN_NUM_ITEMS 4
#define | IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS 1

Variables

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0A_P40_0_IN
Receive input channel 0. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0B_P00_1_IN
Receive input channel 0. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0C_P02_8_IN
Receive input channel 0. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT10A_P40_10_IN
Receive input channel 10. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT10B_P00_11_IN
Receive input channel 10. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT10C_P32_5_IN
Receive input channel 10. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT10D_P15_2_IN
Receive input channel 10. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT11A_P40_11_IN
Receive input channel 11. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT11B_P00_12_IN
Receive input channel 11. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT11C_P32_6_IN
Receive input channel 11. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT11D_P15_4_IN
Receive input channel 11. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT12A_P40_12_IN
Receive input channel 12. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT12B_P02_4_IN
Receive input channel 12. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT12C_P32_7_IN
Receive input channel 12. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT13A_P40_13_IN
Receive input channel 13. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT13B_P02_3_IN
Receive input channel 13. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT13C_P33_0_IN
Receive input channel 13. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT14A_P40_14_IN
Receive input channel 14. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT14B_P02_2_IN
Receive input channel 14. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT14C_P33_7_IN
Receive input channel 14. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT15A_P40_15_IN
Receive input channel 15. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT15B_P01_1_IN
Receive input channel 15. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT15C_P10_9_IN
Receive input channel 15. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT16A_P41_0_IN
Receive input channel 16. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT16B_P01_9_IN
Receive input channel 16. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT16C_P10_10_IN
Receive input channel 16. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT17A_P41_1_IN
Receive input channel 17. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT17B_P01_8_IN
Receive input channel 17. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT17C_P10_14_IN
Receive input channel 17. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT17D_P14_0_IN
Receive input channel 17. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT18A_P41_2_IN
Receive input channel 18. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT18B_P01_10_IN
Receive input channel 18. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT18C_P10_13_IN
Receive input channel 18. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT18D_P14_1_IN
Receive input channel 18. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT19A_P41_3_IN
Receive input channel 19. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT19B_P01_11_IN
Receive input channel 19. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT19C_P10_11_IN
Receive input channel 19. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1A_P40_1_IN
Receive input channel 1. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1B_P00_2_IN
Receive input channel 1. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1C_P02_7_IN
Receive input channel 1. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT20A_P41_4_IN
Receive input channel 20. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT20B_P02_9_IN
Receive input channel 20. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT20C_P31_8_IN
Receive input channel 20. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT21A_P41_5_IN
Receive input channel 21. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT21B_P02_10_IN
Receive input channel 21. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT21C_P31_9_IN
Receive input channel 21. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT22A_P41_6_IN
Receive input channel 22. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT22B_P02_11_IN
Receive input channel 22. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT22C_P31_10_IN
Receive input channel 22. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT23A_P41_7_IN
Receive input channel 23. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT23B_P02_12_IN
Receive input channel 23. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT23C_P31_11_IN
Receive input channel 23. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT24A_P41_8_IN
Receive input channel 24. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT24B_P02_13_IN
Receive input channel 24. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT24C_P31_12_IN
Receive input channel 24. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2A_P40_2_IN
Receive input channel 2. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2B_P00_3_IN
Receive input channel 2. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2C_P02_6_IN
Receive input channel 2. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3A_P40_3_IN
Receive input channel 3. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3B_P00_4_IN
Receive input channel 3. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3C_P02_5_IN
Receive input channel 3. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4A_P40_4_IN
Receive input channel 4. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4B_P00_5_IN
Receive input channel 4. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4C_P33_6_IN
Receive input channel 4. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5A_P40_5_IN
Receive input channel 5. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5B_P00_6_IN
Receive input channel 5. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5C_P33_5_IN
Receive input channel 5. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT6A_P40_6_IN
Receive input channel 6. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT6B_P00_7_IN
Receive input channel 6. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT6C_P33_4_IN
Receive input channel 6. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT7A_P40_7_IN
Receive input channel 7. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT7B_P00_8_IN
Receive input channel 7. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT7C_P33_3_IN
Receive input channel 7. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT8A_P40_8_IN
Receive input channel 8. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT8B_P00_9_IN
Receive input channel 8. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT8C_P33_2_IN
Receive input channel 8. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT9A_P40_9_IN
Receive input channel 9. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT9B_P00_10_IN
Receive input channel 9. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT9C_P33_1_IN
Receive input channel 9. More...
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC0_P00_1_OUT
Transmit output. More...
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC1_P02_7_OUT
Transmit output. More...
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC2_P00_3_OUT
Transmit output. More...
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC3_P00_4_OUT
Transmit output. More...
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC4_P00_5_OUT
Transmit output. More...
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC5_P00_6_OUT
Transmit output. More...
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC6_P00_7_OUT
Transmit output. More...
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC7_P00_8_OUT
Transmit output. More...
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC8_P00_9_OUT
Transmit output. More...
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC9_P00_10_OUT
Transmit output. More...
IFX_EXTERN const IfxSent_Sent_In * | IfxSent_Sent_In_pinTable [IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SENT_IN_NUM_ITEMS]
IfxSent_Sent_In table. More...
IFX_EXTERN const IfxSent_Spc_Out * | IfxSent_Spc_Out_pinTable [IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS]
IfxSent_Spc_Out table. More...

Detailed Description

SENT I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxSent_PinMap.h.


iLLD_TC38A: IfxSent_Sent.h File Reference

  • Sent
  • Sent
Data Structures | Functions
IfxSent_Sent.h File Reference
iLLD » SENT

SENT SENT details. More...

#include "Scu/Std/IfxScuWdt.h"
#include "Sent/Std/IfxSent.h"
#include "Cpu/Irq/IfxCpu_Irq.h"
Include dependency graph for IfxSent_Sent.h:

Go to the source code of this file.

Data Structures

struct | IfxSent_Sent_Enable
Specifies the Interrupt type enables structure. More...
struct | IfxSent_Sent
Specifies SENT handle structure. More...
union | IfxSent_Sent_EnabledInterrupts
Specifies interrupt flags union . In addition it allows to write and read to/from all flags as once via the ALL member. More...
struct | IfxSent_Sent_InputOutputControl
Specifies the input output control properties. More...
struct | IfxSent_Sent_Interrupt
Specifies the interrupt control properties. More...
struct | IfxSent_Sent_InterruptNodeControl
Specifies the interrupt control properties structure. More...
struct | IfxSent_Sent_NibbleControl
Specifies the received nibbles control properties. More...
struct | IfxSent_Sent_Pins
Specifies the pins configuration for SENT channel. More...
struct | IfxSent_Sent_ReceiveControl
Specifies the receive control properties. More...
struct | IfxSent_Sent_TransmitControl
Specifies the SPC channel properties structure. More...
struct | IfxSent_Sent_Channel
Specifies the SENT Channel handle structure. More...
struct | IfxSent_Sent_ChannelConfig
Specifies the SENT Channel configuration structure. More...
struct | IfxSent_Sent_Config
Specifies the SENT module configuration structure. More...
struct | IfxSent_Sent_Frame
Specifies the frame configuration structure for a channel. More...
struct | IfxSent_Sent_SerialMessageFrame
Specifies received message frame. More...

Functions

IFX_EXTERN void | IfxSent_Sent_deInitModule (IfxSent_Sent *driver)
Reset the SENT module. More...
IFX_EXTERN boolean | IfxSent_Sent_initModule (IfxSent_Sent *driver, const IfxSent_Sent_Config *config)
Initialise the SENT with the supplied configureation. More...
IFX_EXTERN void | IfxSent_Sent_initModuleConfig (IfxSent_Sent_Config *config, Ifx_SENT *sent)
Initialise buffer with default SENT configuration. More...
IFX_INLINE Ifx_SENT_CH_INTSTAT | IfxSent_Sent_getAndClearInterruptStatus (IfxSent_Sent_Channel *channel)
Copies the current interrupt flags into the Ifx_SENT_CH_INTSTAT structure, and clears the flags in hardware. More...
IFX_EXTERN boolean | IfxSent_Sent_initChannel (IfxSent_Sent_Channel *channel, const IfxSent_Sent_ChannelConfig *config)
Initialize the channel with the supplied configuration. More...
IFX_EXTERN void | IfxSent_Sent_initChannelConfig (IfxSent_Sent_ChannelConfig *config, IfxSent_Sent *driver)
Initialise channel buffer with default SENT channel configuration. More...
IFX_EXTERN boolean | IfxSent_Sent_readChannelSerialDataFrame (IfxSent_Sent_Channel *channel, IfxSent_Sent_Frame *frame)
Reads the nibbles recieved in the Data register. More...
IFX_EXTERN boolean | IfxSent_Sent_readChannelSerialMessageFrame (IfxSent_Sent_Channel *channel, IfxSent_Sent_SerialMessageFrame *message)
reads the Serial data recieved and collected over several SENT frames More...

Detailed Description

SENT SENT details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxSent_Sent.h.


iLLD_TC38A: IfxSent.h File Reference

  • Sent
  • Std
Macros | Enumerations | Functions
IfxSent.h File Reference
iLLD » SENT

SENT basic functionality. More...

#include "_Impl/IfxSent_cfg.h"
#include "Src/Std/IfxSrc.h"
#include "Scu/Std/IfxScuCcu.h"
#include "_PinMap/IfxSent_PinMap.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "IfxSent_bf.h"
#include "IfxSent_reg.h"
Include dependency graph for IfxSent.h:

Go to the source code of this file.

Macros

#define IFXSENT_INTERRUPT_STATUS_ERROR_FLAGS (0x000037f4)

Enumerations

enum IfxSent_AlternateInput {
IfxSent_AlternateInput_0 = 0,
IfxSent_AlternateInput_1,
IfxSent_AlternateInput_2,
IfxSent_AlternateInput_3
}
SENT.CH[channelId].IOCR.ALTI , Specifies alternate input for channel. More...
enum IfxSent_ChannelStatus {
IfxSent_ChannelStatus_stop = 0,
IfxSent_ChannelStatus_initialize = 1,
IfxSent_ChannelStatus_running = 2,
IfxSent_ChannelStatus_synchronize = 3
}
SENT.CH[channelId].RSR.CST, Specifies the current channel status. More...
enum IfxSent_ClockDividerMode {
IfxSent_ClockDividerMode_off = 0,
IfxSent_ClockDividerMode_normal = 1,
IfxSent_ClockDividerMode_fractional = 2
}
SENT.FDR.DM , Specifies clock divider mode. More...
enum IfxSent_ConfigBit {
IfxSent_ConfigBit_0 = 0,
IfxSent_ConfigBit_1
}
SENT.CH[channelId].SDS.CON , Specifies received configuration bit value. More...
enum IfxSent_DigitalGlitchesLength {
IfxSent_DigitalGlitchesLength_off = 0,
IfxSent_DigitalGlitchesLength_1 = 1,
IfxSent_DigitalGlitchesLength_2,
IfxSent_DigitalGlitchesLength_3,
IfxSent_DigitalGlitchesLength_4,
IfxSent_DigitalGlitchesLength_5,
IfxSent_DigitalGlitchesLength_6,
IfxSent_DigitalGlitchesLength_7,
IfxSent_DigitalGlitchesLength_8,
IfxSent_DigitalGlitchesLength_9,
IfxSent_DigitalGlitchesLength_10,
IfxSent_DigitalGlitchesLength_11,
IfxSent_DigitalGlitchesLength_12,
IfxSent_DigitalGlitchesLength_13,
IfxSent_DigitalGlitchesLength_14,
IfxSent_DigitalGlitchesLength_15
}
SENT.CH[channelId].IOCR.DEPTH , Specifies number of port input samples. More...
enum IfxSent_ExtendedSerialFrameMode {
IfxSent_ExtendedSerialFrameMode_standard = 0,
IfxSent_ExtendedSerialFrameMode_extended = 1
}
SENT.CH[channelId].RCR.ESF , Specifies the serial frame structure. More...
enum IfxSent_ExternalTrigger {
IfxSent_ExternalTrigger_0 = 0,
IfxSent_ExternalTrigger_1,
IfxSent_ExternalTrigger_2,
IfxSent_ExternalTrigger_3,
IfxSent_ExternalTrigger_4,
IfxSent_ExternalTrigger_5,
IfxSent_ExternalTrigger_6,
IfxSent_ExternalTrigger_7,
IfxSent_ExternalTrigger_8,
IfxSent_ExternalTrigger_9,
IfxSent_ExternalTrigger_10,
IfxSent_ExternalTrigger_11,
IfxSent_ExternalTrigger_12,
IfxSent_ExternalTrigger_13,
IfxSent_ExternalTrigger_14,
IfxSent_ExternalTrigger_15
}
SENT.CH[channelId].IOCR.ETS , Specifies the external trigger line. More...
enum IfxSent_FrameCheckMode {
IfxSent_FrameCheckMode_pastSyncPulse = 0,
IfxSent_FrameCheckMode_futureSuncPulse = 1
}
SENT.CH[channelId].RCR.CFC, Specifies received frame check mode. More...
enum IfxSent_InterruptNodePointer {
IfxSent_InterruptNodePointer_trigo0 = 0,
IfxSent_InterruptNodePointer_trigo1,
IfxSent_InterruptNodePointer_trigo2,
IfxSent_InterruptNodePointer_trigo3,
IfxSent_InterruptNodePointer_trigo4,
IfxSent_InterruptNodePointer_trigo5,
IfxSent_InterruptNodePointer_trigo6,
IfxSent_InterruptNodePointer_trigo7,
IfxSent_InterruptNodePointer_trigo8,
IfxSent_InterruptNodePointer_trigo9
}
SENT.CH[channelId].INP.X(X= RSI,RDI,RBI,TDI,TBI,ERRI,SDI,WDI),Specifies interrupt requested node for respective interrupt. More...
enum IfxSent_Nibble {
IfxSent_Nibble_0 = 0,
IfxSent_Nibble_1,
IfxSent_Nibble_2,
IfxSent_Nibble_3,
IfxSent_Nibble_4,
IfxSent_Nibble_5,
IfxSent_Nibble_6,
IfxSent_Nibble_7
}
SENT.CH[channelId].VIEW.RDNPy( y=0,1,..7 ).Specifies receive data target nibble pointer. More...
enum IfxSent_SleepMode {
IfxSent_SleepMode_enable = 0,
IfxSent_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_SENT.CLC.B.EDIS. More...
enum IfxSent_SpcMode {
IfxSent_SpcMode_sync = 0,
IfxSent_SpcMode_range = 1,
IfxSent_SpcMode_bidirectional = 2
}
Specifies the SENT SPC operational mode. More...
enum IfxSent_SuspendMode {
IfxSent_SuspendMode_none = 0,
IfxSent_SuspendMode_hard = 1,
IfxSent_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxSent_TimeBase {
IfxSent_TimeBase_measuredFrequency = 0,
IfxSent_TimeBase_nominalFrequency = 1
}
SENT.CH[channelId].SCR.BASE, Specifies selection of pulse based on time. More...
enum IfxSent_TriggerSource {
IfxSent_TriggerSource_off = 0,
IfxSent_TriggerSource_immediate = 1,
IfxSent_TriggerSource_fallingEdge = 2,
IfxSent_TriggerSource_externalTrigger = 3
}
SENT.CH[channelId].SCR.TRIG, Specifies trigger source for pulse generation. More...
enum IfxSent_InterruptSource {
IfxSent_InterruptSource_rsi = 0,
IfxSent_InterruptSource_rdi = 1,
IfxSent_InterruptSource_rbi = 2,
IfxSent_InterruptSource_tdi = 3,
IfxSent_InterruptSource_tbi = 4,
IfxSent_InterruptSource_fri = 5,
IfxSent_InterruptSource_fdi = 6,
IfxSent_InterruptSource_nni = 7,
IfxSent_InterruptSource_nvi = 8,
IfxSent_InterruptSource_crci = 9,
IfxSent_InterruptSource_wsi = 10,
IfxSent_InterruptSource_sdi = 11,
IfxSent_InterruptSource_scri = 12,
IfxSent_InterruptSource_wdi = 13
}
Sent Interrupt Source. More...

Functions

IFX_INLINE void | IfxSent_setAltiInput (Ifx_SENT *sent, IfxSent_ChannelId channelId, IfxSent_AlternateInput alternateInput)
Sets the operation mode of SENT kernel. More...
IFX_INLINE void | IfxSent_setTimeStampPredivider (Ifx_SENT *sent, uint32 timeStampPreDivider)
Set the module time stamp pre-divider. More...
IFX_INLINE Ifx_SENT_CH_INTSTAT | IfxSent_getAndClearInterruptStatus (Ifx_SENT *sent, IfxSent_ChannelId channelId)
Copies the current interrupt flags into the Ifx_SENT_CH_INTSTAT structure, and clears the flags in hardware. More...
IFX_INLINE Ifx_SENT_CH_INTSTAT | IfxSent_getChannelInterruptStatus (Ifx_SENT *sent, IfxSent_ChannelId channelId)
Gets the current channel status. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxSent_getChannelSrc (IfxSent_ChannelId channelId)
gets the source for channel interrupt handler More...
IFX_INLINE void | IfxSent_disableChannel (Ifx_SENT *sent, IfxSent_ChannelId channelId)
Disable the channel with the channel number. More...
IFX_INLINE void | IfxSent_disableModule (Ifx_SENT *sent)
Disable the SENT module. More...
IFX_INLINE void | IfxSent_enableChannel (Ifx_SENT *sent, IfxSent_ChannelId channelId)
Enable the channel with the channel number. More...
IFX_INLINE void | IfxSent_enableModule (Ifx_SENT *sent)
Enable the SENT module. More...
IFX_INLINE boolean | IfxSent_isModuleSuspended (Ifx_SENT *sent)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxSent_setSleepMode (Ifx_SENT *sent, IfxSent_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxSent_setSuspendMode (Ifx_SENT *sent, IfxSent_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN void | IfxSent_resetModule (Ifx_SENT *sent)
Resets the SENT module. More...
IFX_INLINE void | IfxSent_setChannelFractionalDivider (Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 divider)
Sets the channel fractional baudrate divider. More...
IFX_INLINE void | IfxSent_setChannelPreDivider (Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 preDivider)
Sets the channel baudrate pre-divider. More...
IFX_EXTERN float32 | IfxSent_getModuleClock (Ifx_SENT *sent)
Returns the current module frequency in Hertz. More...
IFX_EXTERN void | IfxSent_initializeChannelUnitTime (Ifx_SENT *sent, IfxSent_ChannelId channelId, float32 tUnit)
Initializes the desired unit time (f_tick) for the external SENT device connected to the given channel. More...
IFX_EXTERN void | IfxSent_initializeModuleClock (Ifx_SENT *sent, IfxSent_ClockDividerMode dividerMode, uint16 stepValue)
Initialize and get the clock for SENT kernel. More...
IFX_INLINE void | IfxSent_initSentPin (const IfxSent_Sent_In *sentIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a SENT input. More...
IFX_INLINE void | IfxSent_initSpcPin (const IfxSent_Spc_Out *spcOut, IfxPort_OutputMode spcOutMode, IfxPort_PadDriver padDriver)
Initializes a SPC output. More...
IFX_INLINE uint16 | IfxSent_getFrameLengthWithPausePulse (Ifx_SENT *sent, IfxSent_ChannelId channelId)
Returns the Frame length with pause pulse. More...
IFX_INLINE void | IfxSent_setWatchDogTimerLimit (Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 watchDogTimerLimit)
Set the watch dog timer limit value for sent channel. More...
IFX_INLINE boolean | IfxSent_isModuleEnabled (Ifx_SENT *sent)
Return TRUE if SENT module is enabled. More...
IFX_INLINE boolean | IfxSent_getInterruptStatus (Ifx_SENT *sent, IfxSent_ChannelId channelId, IfxSent_InterruptSource source)
Return the Interrupt Status of the SENT channel. More...
IFX_INLINE void | IfxSent_clearInterruptStatus (Ifx_SENT *sent, IfxSent_ChannelId channelId, IfxSent_InterruptSource source)
IFX_INLINE uint32 | IfxSent_readReceivedData (Ifx_SENT *sent, IfxSent_ChannelId channelId)
IFX_INLINE uint32 | IfxSent_readReceivedStatus (Ifx_SENT *sent, IfxSent_ChannelId channelId)
Reads and returns value in RSR (Received Status Register). More...
IFX_INLINE uint8 | IfxSent_readReceivedCrc (Ifx_SENT *sent, IfxSent_ChannelId channelId)
Returns 4 bit CRC value in Receive Status Register. More...
IFX_INLINE uint8 | IfxSent_readReceivedChannelStatus (Ifx_SENT *sent, IfxSent_ChannelId channelId)
Returns 2 bit CST value in Receive Status Register. More...
IFX_INLINE uint8 | IfxSent_readReceivedStatusAndCommunicationNibble (Ifx_SENT *sent, IfxSent_ChannelId channelId)
Returns 4 bit SCN value in Receive Status Register. More...
IFX_INLINE uint32 | IfxSent_readReceivedTimeStamp (Ifx_SENT *sent, IfxSent_ChannelId channelId)
Returns 32 bit Received Time Stamp Value. More...
IFX_INLINE uint8 | IfxSent_readSpcPulseLength (Ifx_SENT *sent, IfxSent_ChannelId channelId)
Returns 6 bit PLEN value in SCR Register. More...
IFX_INLINE uint8 | IfxSent_readSpcDelayLength (Ifx_SENT *sent, IfxSent_ChannelId channelId)
Returns 6 bit Delay length value in SCR Register. More...
IFX_EXTERN float32 | IfxSent_getChannelUnitTime (Ifx_SENT *sent, IfxSent_ChannelId channelId)
Returns the current unit time (f_tick) of the given channel. More...

Detailed Description

SENT basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxSent.h.

Macro Definition Documentation

◆ IFXSENT_INTERRUPT_STATUS_ERROR_FLAGS

#define IFXSENT_INTERRUPT_STATUS_ERROR_FLAGS (0x000037f4)

Definition at line 77 of file IfxSent.h.

Enumeration Type Documentation

◆ IfxSent_InterruptSource

enum IfxSent_InterruptSource

Sent Interrupt Source.

Enumerator
IfxSent_InterruptSource_rsi | Enable Interrupt Request RSI.
IfxSent_InterruptSource_rdi | Enable Interrupt Request RDI.
IfxSent_InterruptSource_rbi | Enable Interrupt Request RBI.
IfxSent_InterruptSource_tdi | Enable Interrupt Request TDI.
IfxSent_InterruptSource_tbi | Enable Interrupt Request TBI.
IfxSent_InterruptSource_fri | Enable Interrupt Request FRI.
IfxSent_InterruptSource_fdi | Enable Interrupt Request FDI.
IfxSent_InterruptSource_nni | Enable Interrupt Request NNI.
IfxSent_InterruptSource_nvi | Enable Interrupt Request NVI.
IfxSent_InterruptSource_crci | Enable Interrupt Request crci.
IfxSent_InterruptSource_wsi | Enable Interrupt Request wsi.
IfxSent_InterruptSource_sdi | Enable Interrupt Request sdi.
IfxSent_InterruptSource_scri | Enable Interrupt Request scri.
IfxSent_InterruptSource_wdi | Enable Interrupt Request wdi.

Definition at line 261 of file IfxSent.h.

Function Documentation

◆ IfxSent_clearInterruptStatus()

IFX_INLINE void IfxSent_clearInterruptStatus | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId,
 |  | IfxSent_InterruptSource | source
 | ) |  |
Parameters
sent | base address of the SENT register space
channelId | SENT channel number
source | enable the interrupt source of any interrupt of SENT Channel
Returns
None

Definition at line 750 of file IfxSent.h.

◆ IfxSent_getChannelUnitTime()

IFX_EXTERN float32 IfxSent_getChannelUnitTime | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId
 | ) |  |

Returns the current unit time (f_tick) of the given channel.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
Returns
The current unit time in seconds

Definition at line 55 of file IfxSent.c.

◆ IfxSent_getFrameLengthWithPausePulse()

IFX_INLINE uint16 IfxSent_getFrameLengthWithPausePulse | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId
 | ) |  |

Returns the Frame length with pause pulse.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number

Definition at line 647 of file IfxSent.h.

◆ IfxSent_getInterruptStatus()

IFX_INLINE boolean IfxSent_getInterruptStatus | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId,
 |  | IfxSent_InterruptSource | source
 | ) |  |

Return the Interrupt Status of the SENT channel.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
source | enable the interrupt source of any interrupt of SENT Channel
Returns
The Interrupt Status of SENT channel

Definition at line 744 of file IfxSent.h.

◆ IfxSent_isModuleEnabled()

IFX_INLINE boolean IfxSent_isModuleEnabled ( Ifx_SENT * sent )

Return TRUE if SENT module is enabled.

Parameters
sent base address of the SENT register space
Returns
The status of whether clock for sent is enabled or disabled

Definition at line 738 of file IfxSent.h.

Referenced by IfxSent_Sent_initModule().

◆ IfxSent_readReceivedChannelStatus()

IFX_INLINE uint8 IfxSent_readReceivedChannelStatus | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId
 | ) |  |

Returns 2 bit CST value in Receive Status Register.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
Returns
2 bit CST

Definition at line 774 of file IfxSent.h.

◆ IfxSent_readReceivedCrc()

IFX_INLINE uint8 IfxSent_readReceivedCrc | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId
 | ) |  |

Returns 4 bit CRC value in Receive Status Register.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
Returns
4 bit CRC

Definition at line 768 of file IfxSent.h.

◆ IfxSent_readReceivedData()

IFX_INLINE uint32 IfxSent_readReceivedData | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId
 | ) |  |
Parameters
sent | base address of the SENT register space
channelId | SENT channel number
Returns
The Data content of a recieved Data Frame

Definition at line 756 of file IfxSent.h.

◆ IfxSent_readReceivedStatus()

IFX_INLINE uint32 IfxSent_readReceivedStatus | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId
 | ) |  |

Reads and returns value in RSR (Received Status Register).

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
Returns
Returns 32 bit RSR

Definition at line 762 of file IfxSent.h.

◆ IfxSent_readReceivedStatusAndCommunicationNibble()

IFX_INLINE uint8 IfxSent_readReceivedStatusAndCommunicationNibble | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId
 | ) |  |

Returns 4 bit SCN value in Receive Status Register.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
Returns
4 bit SCN

Definition at line 780 of file IfxSent.h.

◆ IfxSent_readReceivedTimeStamp()

IFX_INLINE uint32 IfxSent_readReceivedTimeStamp | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId
 | ) |  |

Returns 32 bit Received Time Stamp Value.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
Returns
32 bit Time Stamp

Definition at line 786 of file IfxSent.h.

◆ IfxSent_readSpcDelayLength()

IFX_INLINE uint8 IfxSent_readSpcDelayLength | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId
 | ) |  |

Returns 6 bit Delay length value in SCR Register.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
Returns
6 bit DEL

Definition at line 798 of file IfxSent.h.

◆ IfxSent_readSpcPulseLength()

IFX_INLINE uint8 IfxSent_readSpcPulseLength | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId
 | ) |  |

Returns 6 bit PLEN value in SCR Register.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
Returns
6 bit PLEN

Definition at line 792 of file IfxSent.h.

◆ IfxSent_setWatchDogTimerLimit()

IFX_INLINE void IfxSent_setWatchDogTimerLimit | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId,
 |  | uint16 | watchDogTimerLimit
 | ) |  |

Set the watch dog timer limit value for sent channel.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
watchDogTimerLimit | Specifies the watch dog timer limit value.
Returns
None

Definition at line 732 of file IfxSent.h.


iLLD_TC38A: SMU

Modules | Files
SMU
iLLD
Collaboration diagram for SMU:

Modules

Implementation
Standard Driver
SMU Pin Mapping
SMU

Files

file | IfxSmu_cfg.h
Smu on-chip implementation data.
file | IfxSmu_PinMap.c
SMU I/O map.
file | IfxSmu_PinMap.h
SMU I/O map.
file | IfxSmu_Smu.h
SMU SMU details.
file | IfxSmu.h
SMU basic functionality.
file | IfxSmuStdby.h
SMU basic functionality.

Detailed Description


iLLD_TC38A: Implementation

Modules
Implementation
iLLD » SMU
Collaboration diagram for Implementation:

Modules

Alarm Group Enumeration
List of Alarms Enumeration

Detailed Description


iLLD_TC38A: Alarm Group Enumeration

Alarm Group Enumeration
iLLD » SMU » Implementation
Collaboration diagram for Alarm Group Enumeration:


iLLD_TC38A: List of Alarms Enumeration

List of Alarms Enumeration
iLLD » SMU » Implementation
Collaboration diagram for List of Alarms Enumeration:


iLLD_TC38A: Standard Driver

Modules
Standard Driver
iLLD » SMU
Collaboration diagram for Standard Driver:

Modules

Enumerations
Module Functions
STDBY

Detailed Description


iLLD_TC38A: Enumerations

Enumerations
Enumerations
iLLD » SMU » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxSmu_Command {
IfxSmu_Command_start = 0,
IfxSmu_Command_activateFSP = 1,
IfxSmu_Command_releaseFSP = 2,
IfxSmu_Command_activatePES = 3,
IfxSmu_Command_stopRT = 4,
IfxSmu_Command_alarmStatusClear = 5,
IfxSmu_Command_triggerAlarm = 6,
IfxSmu_Command_aliveTest = 7
}
Command interface. More...
enum IfxSmu_FspMode {
IfxSmu_FspMode_BiStableProtocol = 0,
IfxSmu_FspMode_dualRailProtocol = 1,
IfxSmu_FspMode_TimeSwitchingProtocol = 2
}
Fault Signaling Protocol configuration. More...
enum IfxSmu_FspPrescalar1 {
IfxSmu_FspPrescalar1_referenceClockDiv2 = 0,
IfxSmu_FspPrescalar1_referenceClockDiv4 = 1,
IfxSmu_FspPrescalar1_referenceClockDiv8 = 2,
IfxSmu_FspPrescalar1_referenceClockDiv16 = 3,
IfxSmu_FspPrescalar1_referenceClockDiv32 = 4,
IfxSmu_FspPrescalar1_referenceClockDiv64 = 5,
IfxSmu_FspPrescalar1_referenceClockDiv128 = 6,
IfxSmu_FspPrescalar1_referenceClockDiv256 = 7
}
Dividing factor to apply to the reference clock fBACK. The divided clock is used as reference to generate the timing of the fault signaling protocol fault state. More...
enum IfxSmu_FspPrescalar2 {
IfxSmu_FspPrescalar2_referenceClockDiv512 = 0,
IfxSmu_FspPrescalar2_referenceClockDiv1024 = 1,
IfxSmu_FspPrescalar2_referenceClockDiv2048 = 2,
IfxSmu_FspPrescalar2_referenceClockDiv4096 = 3
}
Dividing factor to apply to the reference clock fBACK in order to generate the timing of the fault free state for the time switching modes of the fault signaling protocol. More...
enum IfxSmu_InternalAlarmAction {
IfxSmu_InternalAlarmAction_disabled = 0,
IfxSmu_InternalAlarmAction_igcs0 = 2,
IfxSmu_InternalAlarmAction_igcs1 = 3,
IfxSmu_InternalAlarmAction_igcs2 = 4,
IfxSmu_InternalAlarmAction_nmi = 5,
IfxSmu_InternalAlarmAction_reset = 6,
IfxSmu_InternalAlarmAction_cpureset = 7
}
enum IfxSmu_InterruptGenerationConfiguration {
IfxSmu_InterruptGenerationConfiguration_0 = 0,
IfxSmu_InterruptGenerationConfiguration_1,
IfxSmu_InterruptGenerationConfiguration_2
}
Interrupt Generation Configuration. More...
enum IfxSmu_InterruptRequest {
IfxSmu_InterruptRequest_0 = 0,
IfxSmu_InterruptRequest_1,
IfxSmu_InterruptRequest_2
}
Interrupt Request. More...
enum IfxSmu_PortControlHwDir {
IfxSmu_PortControlHwDir_fsp0AndFsp1Input = 0,
IfxSmu_PortControlHwDir_fsp0OutputAndFsp1Input = 1,
IfxSmu_PortControlHwDir_fsp0AndFsp1Output = 3
}
Enum for the FSP_DIR output port control direction. More...
enum IfxSmu_PortControlHwEnable {
IfxSmu_PortControlHwEnable_fsp0AndFsp1Disabled = 0,
IfxSmu_PortControlHwEnable_fsp0EnabledAndFsp1Disabled = 1,
IfxSmu_PortControlHwEnable_fsp0AndFsp1Enabled = 3
}
Enum for the FSP_DIR output port control enable. More...
enum IfxSmu_SmuState {
IfxSmu_SmuState_start = 0,
IfxSmu_SmuState_run = 1,
IfxSmu_SmuState_fault = 2,
IfxSmu_SmuState_unspecified = 3
}
Running state of the SMU State Machine. More...
enum IfxSmu_SuspendMode {
IfxSmu_SuspendMode_none = 0,
IfxSmu_SuspendMode_hard = 1,
IfxSmu_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...

Detailed Description

Enumeration Type Documentation

◆ IfxSmu_Command

enum IfxSmu_Command

Command interface.

Enumerator
IfxSmu_Command_start | Forces the SSM to go to the RUN state from the START state.
IfxSmu_Command_activateFSP | Activates the Fault Signaling Protocol.
IfxSmu_Command_releaseFSP | Turns the FSP into the inactive fault free state.
IfxSmu_Command_activatePES | Triggers the activation of the Port Emergency Stop (PES).
IfxSmu_Command_stopRT | Stop the recovery Timer.
IfxSmu_Command_alarmStatusClear | Alarm Status Clear Enable Command.
IfxSmu_Command_triggerAlarm | Triggers a software based alarm.
IfxSmu_Command_aliveTest | Triggers a SMU alive alarm.

Definition at line 80 of file IfxSmu.h.

◆ IfxSmu_FspMode

enum IfxSmu_FspMode

Fault Signaling Protocol configuration.

Enumerator
IfxSmu_FspMode_BiStableProtocol | Bi-stable protocol.
IfxSmu_FspMode_dualRailProtocol | dualRailProtocol
IfxSmu_FspMode_TimeSwitchingProtocol | Time switching protocol.

Definition at line 94 of file IfxSmu.h.

◆ IfxSmu_FspPrescalar1

enum IfxSmu_FspPrescalar1

Dividing factor to apply to the reference clock fBACK. The divided clock is used as reference to generate the timing of the fault signaling protocol fault state.

Enumerator
IfxSmu_FspPrescalar1_referenceClockDiv2 | FSMU_FS = reference clock frequency divided by 2.
IfxSmu_FspPrescalar1_referenceClockDiv4 | FSMU_FS = reference clock frequency divided by 4.
IfxSmu_FspPrescalar1_referenceClockDiv8 | FSMU_FS = reference clock frequency divided by 8.
IfxSmu_FspPrescalar1_referenceClockDiv16 | FSMU_FS = reference clock frequency divided by 16.
IfxSmu_FspPrescalar1_referenceClockDiv32 | FSMU_FS = reference clock frequency divided by 32.
IfxSmu_FspPrescalar1_referenceClockDiv64 | FSMU_FS = reference clock frequency divided by 64.
IfxSmu_FspPrescalar1_referenceClockDiv128 | FSMU_FS = reference clock frequency divided by 128.
IfxSmu_FspPrescalar1_referenceClockDiv256 | FSMU_FS = reference clock frequency divided by 256.

Definition at line 103 of file IfxSmu.h.

◆ IfxSmu_FspPrescalar2

enum IfxSmu_FspPrescalar2

Dividing factor to apply to the reference clock fBACK in order to generate the timing of the fault free state for the time switching modes of the fault signaling protocol.

Enumerator
IfxSmu_FspPrescalar2_referenceClockDiv512 | FSMU_FS = reference clock frequency divided by 512.
IfxSmu_FspPrescalar2_referenceClockDiv1024 | FSMU_FS = reference clock frequency divided by 1024.
IfxSmu_FspPrescalar2_referenceClockDiv2048 | FSMU_FS = reference clock frequency divided by 2048.
IfxSmu_FspPrescalar2_referenceClockDiv4096 | FSMU_FS = reference clock frequency divided by 4096.

Definition at line 117 of file IfxSmu.h.

◆ IfxSmu_InternalAlarmAction

enum IfxSmu_InternalAlarmAction
Enumerator
IfxSmu_InternalAlarmAction_disabled | Alarm disabled.
IfxSmu_InternalAlarmAction_igcs0 | Sends an interrupt request to the interrupt system according to the IGCS0.
IfxSmu_InternalAlarmAction_igcs1 | Sends an interrupt request to the interrupt system according to the IGCS1.
IfxSmu_InternalAlarmAction_igcs2 | Sends an interrupt request to the interrupt system according to the IGCS2.
IfxSmu_InternalAlarmAction_nmi | Sends an NMI request to the SCU.
IfxSmu_InternalAlarmAction_reset | Sends a reset request to the SCU.
IfxSmu_InternalAlarmAction_cpureset | Triggers a CPU reset request using CPU Reset Configuration Set.

Definition at line 125 of file IfxSmu.h.

◆ IfxSmu_InterruptGenerationConfiguration

enum IfxSmu_InterruptGenerationConfiguration

Interrupt Generation Configuration.

Enumerator
IfxSmu_InterruptGenerationConfiguration_0 | Interrupt Generation Configuration 0.
IfxSmu_InterruptGenerationConfiguration_1 | Interrupt Generation Configuration 1.
IfxSmu_InterruptGenerationConfiguration_2 | Interrupt Generation Configuration 2.

Definition at line 138 of file IfxSmu.h.

◆ IfxSmu_InterruptRequest

enum IfxSmu_InterruptRequest

Interrupt Request.

Enumerator
IfxSmu_InterruptRequest_0 | Interrupt Request 0.
IfxSmu_InterruptRequest_1 | Interrupt Request 1.
IfxSmu_InterruptRequest_2 | Interrupt Request 2.

Definition at line 147 of file IfxSmu.h.

◆ IfxSmu_PortControlHwDir

enum IfxSmu_PortControlHwDir

Enum for the FSP_DIR output port control direction.

Enumerator
IfxSmu_PortControlHwDir_fsp0AndFsp1Input | fsp0InputAndFsp1Input
IfxSmu_PortControlHwDir_fsp0OutputAndFsp1Input | fsp0OutputAndFsp1Input
IfxSmu_PortControlHwDir_fsp0AndFsp1Output | fsp0OutputAndFsp1Input

Definition at line 156 of file IfxSmu.h.

◆ IfxSmu_PortControlHwEnable

enum IfxSmu_PortControlHwEnable

Enum for the FSP_DIR output port control enable.

Enumerator
IfxSmu_PortControlHwEnable_fsp0AndFsp1Disabled | fsp0AndFsp1Disabled
IfxSmu_PortControlHwEnable_fsp0EnabledAndFsp1Disabled | fsp0EnabledAndFsp1Disabled
IfxSmu_PortControlHwEnable_fsp0AndFsp1Enabled | fsp0AndFsp1Enabled

Definition at line 165 of file IfxSmu.h.

◆ IfxSmu_SmuState

enum IfxSmu_SmuState

Running state of the SMU State Machine.

Enumerator
IfxSmu_SmuState_start | START state.
IfxSmu_SmuState_run | RUN State.
IfxSmu_SmuState_fault | FAULT State.
IfxSmu_SmuState_unspecified | unspecified State

Definition at line 174 of file IfxSmu.h.

◆ IfxSmu_SuspendMode

enum IfxSmu_SuspendMode

OCDS Suspend Control (OCDS.SUS)

Enumerator
IfxSmu_SuspendMode_none | No suspend.
IfxSmu_SuspendMode_hard | Hard Suspend.
IfxSmu_SuspendMode_soft | Soft Suspend.

Definition at line 184 of file IfxSmu.h.


iLLD_TC38A: Module Functions

Functions
Module Functions
iLLD » SMU » Standard Driver
Collaboration diagram for Module Functions:

Functions

IFX_INLINE void | IfxSmu_clearAlarmExecutedStatus (IfxSmu_AlarmExecutionStatus alarmEx)
This function clears SMU alarm exected status of the requested alarm mechanism. More...
IFX_INLINE void | IfxSmu_clearRegMonTestModeEnable (uint8 testModeEnable)
Function clears the Register monitor test mode enable Flag. More...
IFX_INLINE void | IfxSmu_clearRegisterMonitorErrorFlag (uint8 errorFlag)
Function clears the Register Monitor Error Flag (RMEF.EFz). More...
IFX_INLINE void | IfxSmu_clearRegisterMonitorStatus (uint8 statusFlag)
Function clears the Register Monitor status register. More...
IFX_INLINE boolean | IfxSmu_getAlarmExecutedStatus (IfxSmu_AlarmExecutionStatus alarmEx)
The function returns the alarm Executed status of requested alarm mechanism. More...
IFX_INLINE IfxSmu_PortControlHwDir | IfxSmu_getPortControlHwDir (void)
Function returns the Port control hardware direction. More...
IFX_INLINE IfxSmu_PortControlHwEnable | IfxSmu_getPortControlHwEnable (void)
Function returns the Port control hardware enable. More...
IFX_INLINE uint32 | IfxSmu_getRegisterMonitorErrorFlag (void)
Function returns the value ofRegister Monitor Error Flags register. More...
IFX_INLINE uint32 | IfxSmu_getRegisterMonitorStatus (void)
Function returns the value of Register Monitor Self Test Status register. More...
IFX_INLINE boolean | IfxSmu_isModuleSuspended (Ifx_SMU *smu)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxSmu_setPortControlHwEnableAndDir (IfxSmu_PortControlHwEnable portEnable, IfxSmu_PortControlHwDir hwDir)
Function sets the Port control hardware Enable and direction. More...
IFX_INLINE void | IfxSmu_setRegMonTestModeEnable (uint8 testModeEnable)
Function sets the Register monitor test mode enable Flag. More...
IFX_INLINE void | IfxSmu_setSuspendMode (Ifx_SMU *smu, IfxSmu_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_INLINE void | IfxSmu_startAliveTest (void)
This function starts the SMU alive test. More...
IFX_INLINE void | IfxSmu_stopAliveTest (void)
This function Stops the SMU alive test. More...
IFX_INLINE void | IfxSmu_waitForAlarm (IfxSmu_Alarm alarm)
This function waits for SMU alarm to be set and then clears it.. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxSmu_getSrcPointer (IfxSmu_InterruptRequest intRequest)
Returns The SRCR pointer for the selected Interrupt. More...
IFX_EXTERN boolean | IfxSmu_activateFSP (void)
This function activates the FSP to indicate a FAULT state on the error pin to the safe state switching device. More...
IFX_EXTERN boolean | IfxSmu_activateRunState (void)
The function allows to switch the SMU peripheral into the RUN fault-free state as requested by the caller. More...
IFX_EXTERN boolean | IfxSmu_clearAlarmStatus (IfxSmu_Alarm alarm)
This function clears SMU alarm status of the requested alarm. It needs to be called after alarm status is read. More...
IFX_EXTERN void | IfxSmu_configAlarmActionPES (uint8 pesAction)
This function configures the PES feature for internal action. Bit0/1/2/3 - SMU_IGCS0/SMU_IGCS1/SMU_IGCS2/SMU_NMI/SMU_CPU_RESET activates PES correspondingly. More...
IFX_EXTERN void | IfxSmu_enableFaultToRunState (boolean enable)
Enable FAULT to RUN State Transition. More...
IFX_EXTERN void | IfxSmu_enablePortEmergencyStop (boolean enable)
Configure FSP (fault Signalling Protocol) Port Emergency Stop. More...
IFX_EXTERN boolean | IfxSmu_getAlarmAction (IfxSmu_Alarm alarm, IfxSmu_InternalAlarmAction *intAlarmAction)
The function provides the FSP action currently configured for the requested alarm. More...
IFX_EXTERN uint32 | IfxSmu_getAlarmGroupDebugStatus (uint8 alarmGroup)
The function provides the alarm group status from the stored debug registers. More...
IFX_EXTERN boolean | IfxSmu_getAlarmStatus (IfxSmu_Alarm alarm)
The function returns the alarm status of requested alarm. More...
IFX_EXTERN boolean | IfxSmu_getRTMissedEvent (uint8 timerNum)
The function returns if any alarms requiring the requested recovery timer was SET while the recovery timer was running. More...
IFX_EXTERN IfxSmu_SmuState | IfxSmu_getSmuState (void)
The function provides the current state of the SMU. More...
IFX_EXTERN void | IfxSmu_lockConfigRegisters (void)
The function locks the SMU configuration registers to prevent any modification to configuration register content. More...
IFX_EXTERN boolean | IfxSmu_releaseFSP (void)
The function switches the SMU peripheral from the FAULT state to the RUN state. More...
IFX_EXTERN void | IfxSmu_setAlarmAction (IfxSmu_Alarm alarm, IfxSmu_InternalAlarmAction intAlarmAction)
The function sets the alarm action for the desired alarm. More...
IFX_EXTERN boolean | IfxSmu_setAlarmStatus (IfxSmu_Alarm alarm)
The API sets the requested alarm. This function can be used by the user software to trigger SW SMU alarm. During the START state of the SMU, it shall be possible to set any of the alarms. However, during the RUN state, only the SW alarms shall be set. More...
IFX_EXTERN void | IfxSmu_setFspMode (IfxSmu_FspMode mode)
Configure FSP (fault Signalling Protocol) mode. More...
IFX_EXTERN boolean | IfxSmu_stopRT (uint8 timerNum)
The API stops the requested recovery timer unit. More...
IFX_EXTERN boolean | IfxSmu_unlockConfigRegisters (void)
The function unlocks the SMU configuration registers for modification. More...
IFX_EXTERN void | IfxSmu_ConfigureInterruptGeneration (IfxSmu_InterruptGenerationConfiguration config, IfxSmu_InterruptRequest intRequest)
Configures The Interrupt Generation. More...
IFX_EXTERN void | IfxSmu_temporaryLockConfigRegisters (void)
The function temporarily locks the SMU configuration registers for modification. More...

Detailed Description

Function Documentation

◆ IfxSmu_activateFSP()

IFX_EXTERN boolean IfxSmu_activateFSP ( void )

This function activates the FSP to indicate a FAULT state on the error pin to the safe state switching device.

Returns
Return 0 if successfull and 1 if failed.

Definition at line 52 of file IfxSmu.c.

◆ IfxSmu_activateRunState()

IFX_EXTERN boolean IfxSmu_activateRunState ( void )

The function allows to switch the SMU peripheral into the RUN fault-free state as requested by the caller.

Returns
Return 0 if successfull and 1 if failed.

Definition at line 64 of file IfxSmu.c.

◆ IfxSmu_clearAlarmExecutedStatus()

IFX_INLINE void IfxSmu_clearAlarmExecutedStatus ( IfxSmu_AlarmExecutionStatus alarmEx )

This function clears SMU alarm exected status of the requested alarm mechanism.

Parameters
alarmEx alarm mechanism
Returns
None

Definition at line 473 of file IfxSmu.h.

◆ IfxSmu_clearAlarmStatus()

IFX_EXTERN boolean IfxSmu_clearAlarmStatus ( IfxSmu_Alarm alarm )

This function clears SMU alarm status of the requested alarm. It needs to be called after alarm status is read.

Parameters
alarm smu alarm group and position
Returns
Return 0 if successfull and 1 if failed.

Definition at line 75 of file IfxSmu.c.

Referenced by IfxSmu_waitForAlarm().

◆ IfxSmu_clearRegisterMonitorErrorFlag()

IFX_INLINE void IfxSmu_clearRegisterMonitorErrorFlag ( uint8 errorFlag )

Function clears the Register Monitor Error Flag (RMEF.EFz).

Parameters
errorFlag Error Flag
Returns
None

Definition at line 501 of file IfxSmu.h.

◆ IfxSmu_clearRegisterMonitorStatus()

IFX_INLINE void IfxSmu_clearRegisterMonitorStatus ( uint8 statusFlag )

Function clears the Register Monitor status register.

Parameters
statusFlag status Flag
Returns
None

Definition at line 515 of file IfxSmu.h.

◆ IfxSmu_clearRegMonTestModeEnable()

IFX_INLINE void IfxSmu_clearRegMonTestModeEnable ( uint8 testModeEnable )

Function clears the Register monitor test mode enable Flag.

The RMCTL register needs to be unlocked by using IfxSmu_unlockConfigRegisters() before calling this function.

Parameters
testModeEnable Test Mode Flag
Returns
None

Definition at line 488 of file IfxSmu.h.

◆ IfxSmu_configAlarmActionPES()

IFX_EXTERN void IfxSmu_configAlarmActionPES ( uint8 pesAction )

This function configures the PES feature for internal action. Bit0/1/2/3 - SMU_IGCS0/SMU_IGCS1/SMU_IGCS2/SMU_NMI/SMU_CPU_RESET activates PES correspondingly.

The AGC register needs to be unlocked by using IfxSmu_unlockConfigRegisters() before calling this function.

Parameters
pesAction PES action bit0/1/2/3 - SMU_IGCS0/SMU_IGCS1/SMU_IGCS2/SMU_NMI/SMU_CPU_RESET activates PES correspondingly.
Returns
None

Definition at line 98 of file IfxSmu.c.

◆ IfxSmu_ConfigureInterruptGeneration()

IFX_EXTERN void IfxSmu_ConfigureInterruptGeneration | ( | IfxSmu_InterruptGenerationConfiguration | config,
 |  | IfxSmu_InterruptRequest | intRequest
 | ) |  |

Configures The Interrupt Generation.

Parameters
config | Configuration Selection
intRequest | Interrupt Request
Returns
None

Definition at line 411 of file IfxSmu.c.

◆ IfxSmu_enableFaultToRunState()

IFX_EXTERN void IfxSmu_enableFaultToRunState ( boolean enable )

Enable FAULT to RUN State Transition.

The AGC register needs to be unlocked by using IfxSmu_unlockConfigRegisters() before calling this function.

Parameters
enable Enable / Disable Fault to Run Transition ( True - Enable, False - Disable)
Returns
None

Definition at line 127 of file IfxSmu.c.

◆ IfxSmu_enablePortEmergencyStop()

IFX_EXTERN void IfxSmu_enablePortEmergencyStop ( boolean enable )

Configure FSP (fault Signalling Protocol) Port Emergency Stop.

The FSP register needs to be unlocked by using IfxSmu_unlockConfigRegisters() before calling this function.

Parameters
enable Enable / Disable PES ( True - Enable, False - Disable)
Returns
None

Definition at line 145 of file IfxSmu.c.

◆ IfxSmu_getAlarmAction()

IFX_EXTERN boolean IfxSmu_getAlarmAction | ( | IfxSmu_Alarm | alarm,
 |  | IfxSmu_InternalAlarmAction * | intAlarmAction
 | ) |  |

The function provides the FSP action currently configured for the requested alarm.

Parameters
alarm | smu alarm group and position
intAlarmAction | internal alarm action
Returns
FSP enabled/disabled for the particular alarm

Definition at line 163 of file IfxSmu.c.

◆ IfxSmu_getAlarmExecutedStatus()

IFX_INLINE boolean IfxSmu_getAlarmExecutedStatus ( IfxSmu_AlarmExecutionStatus alarmEx )

The function returns the alarm Executed status of requested alarm mechanism.

Parameters
alarmEx alarm mechanism
Returns
alarm executed status of requested alarm mechanism

Definition at line 529 of file IfxSmu.h.

◆ IfxSmu_getAlarmGroupDebugStatus()

IFX_EXTERN uint32 IfxSmu_getAlarmGroupDebugStatus ( uint8 alarmGroup )

The function provides the alarm group status from the stored debug registers.

Parameters
alarmGroup smu alarm group
Returns
alarm group status from the stored debug registers

Definition at line 181 of file IfxSmu.c.

◆ IfxSmu_getAlarmStatus()

IFX_EXTERN boolean IfxSmu_getAlarmStatus ( IfxSmu_Alarm alarm )

The function returns the alarm status of requested alarm.

Parameters
alarm smu alarm group and position
Returns
alarm status of requested alarm.

Definition at line 192 of file IfxSmu.c.

Referenced by IfxSmu_waitForAlarm().

◆ IfxSmu_getPortControlHwDir()

IFX_INLINE IfxSmu_PortControlHwDir IfxSmu_getPortControlHwDir ( void )

Function returns the Port control hardware direction.

Returns
port Conrol HW direction

Definition at line 536 of file IfxSmu.h.

◆ IfxSmu_getPortControlHwEnable()

IFX_INLINE IfxSmu_PortControlHwEnable IfxSmu_getPortControlHwEnable ( void )

Function returns the Port control hardware enable.

Returns
port Control HW enable

Definition at line 542 of file IfxSmu.h.

◆ IfxSmu_getRegisterMonitorErrorFlag()

IFX_INLINE uint32 IfxSmu_getRegisterMonitorErrorFlag ( void )

Function returns the value ofRegister Monitor Error Flags register.

Returns
Returns the Register Monitor Error Flags register value.

Definition at line 548 of file IfxSmu.h.

◆ IfxSmu_getRegisterMonitorStatus()

IFX_INLINE uint32 IfxSmu_getRegisterMonitorStatus ( void )

Function returns the value of Register Monitor Self Test Status register.

Returns
Returns the Register monitor self Test Status register value.

Definition at line 556 of file IfxSmu.h.

◆ IfxSmu_getRTMissedEvent()

IFX_EXTERN boolean IfxSmu_getRTMissedEvent ( uint8 timerNum )

The function returns if any alarms requiring the requested recovery timer was SET while the recovery timer was running.

Parameters
timerNum Recovery Timer unit
Returns
returns status of missed event (0 - no missed event, 1 - missed event)

Definition at line 203 of file IfxSmu.c.

◆ IfxSmu_getSmuState()

IFX_EXTERN IfxSmu_SmuState IfxSmu_getSmuState ( void )

The function provides the current state of the SMU.

Returns
return the current state of SMU

Definition at line 224 of file IfxSmu.c.

Referenced by IfxSmu_releaseFSP().

◆ IfxSmu_getSrcPointer()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxSmu_getSrcPointer ( IfxSmu_InterruptRequest intRequest )

Returns The SRCR pointer for the selected Interrupt.

Parameters
intRequest Interrupt Request
Returns
Pointer to SRCR register

Definition at line 647 of file IfxSmu.h.

◆ IfxSmu_isModuleSuspended()

IFX_INLINE boolean IfxSmu_isModuleSuspended ( Ifx_SMU * smu )

Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended.

Parameters
smu Pointer to SMU module registers
Returns
Suspend status (TRUE / FALSE)

Definition at line 564 of file IfxSmu.h.

◆ IfxSmu_lockConfigRegisters()

IFX_EXTERN void IfxSmu_lockConfigRegisters ( void )

The function locks the SMU configuration registers to prevent any modification to configuration register content.

Returns
None

Definition at line 231 of file IfxSmu.c.

◆ IfxSmu_releaseFSP()

IFX_EXTERN boolean IfxSmu_releaseFSP ( void )

The function switches the SMU peripheral from the FAULT state to the RUN state.

Returns
Return 0 if successfull and 1 if failed.

Definition at line 251 of file IfxSmu.c.

◆ IfxSmu_setAlarmAction()

IFX_EXTERN void IfxSmu_setAlarmAction | ( | IfxSmu_Alarm | alarm,
 |  | IfxSmu_InternalAlarmAction | intAlarmAction
 | ) |  |

The function sets the alarm action for the desired alarm.

Parameters
alarm | smu alarm group and position
intAlarmAction | internal alarm action
Returns
None

Definition at line 268 of file IfxSmu.c.

◆ IfxSmu_setAlarmStatus()

IFX_EXTERN boolean IfxSmu_setAlarmStatus ( IfxSmu_Alarm alarm )

The API sets the requested alarm. This function can be used by the user software to trigger SW SMU alarm. During the START state of the SMU, it shall be possible to set any of the alarms. However, during the RUN state, only the SW alarms shall be set.

Parameters
alarm smu alarm group and position
Returns
Return 0 if successfull and 1 if failed.

Definition at line 312 of file IfxSmu.c.

◆ IfxSmu_setFspMode()

IFX_EXTERN void IfxSmu_setFspMode ( IfxSmu_FspMode mode )

Configure FSP (fault Signalling Protocol) mode.

The FSP register needs to be unlocked by using IfxSmu_unlockConfigRegisters() before calling this function.

Parameters
mode FSP mode
Returns
None

Definition at line 353 of file IfxSmu.c.

◆ IfxSmu_setPortControlHwEnableAndDir()

IFX_INLINE void IfxSmu_setPortControlHwEnableAndDir | ( | IfxSmu_PortControlHwEnable | portEnable,
 |  | IfxSmu_PortControlHwDir | hwDir
 | ) |  |

Function sets the Port control hardware Enable and direction.

The PCTL register needs to be unlocked by using IfxSmu_unlockConfigRegisters() before calling this function.

Parameters
portEnable | port enable
hwDir | Hardware direction
Returns
None

Definition at line 576 of file IfxSmu.h.

◆ IfxSmu_setRegMonTestModeEnable()

IFX_INLINE void IfxSmu_setRegMonTestModeEnable ( uint8 testModeEnable )

Function sets the Register monitor test mode enable Flag.

The RMCTL register needs to be unlocked by using IfxSmu_unlockConfigRegisters() before calling this function.

Parameters
testModeEnable Test Mode Flag
Returns
None

Definition at line 594 of file IfxSmu.h.

◆ IfxSmu_setSuspendMode()

IFX_INLINE void IfxSmu_setSuspendMode | ( | Ifx_SMU * | smu,
 |  | IfxSmu_SuspendMode | mode
 | ) |  |

Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.

Parameters
smu | Pointer to SMU module registers
mode | Module suspend mode
Returns
None

Definition at line 607 of file IfxSmu.h.

◆ IfxSmu_startAliveTest()

IFX_INLINE void IfxSmu_startAliveTest ( void )

This function starts the SMU alive test.

Returns
None

Definition at line 618 of file IfxSmu.h.

◆ IfxSmu_stopAliveTest()

IFX_INLINE void IfxSmu_stopAliveTest ( void )

This function Stops the SMU alive test.

Returns
None

Definition at line 628 of file IfxSmu.h.

◆ IfxSmu_stopRT()

IFX_EXTERN boolean IfxSmu_stopRT ( uint8 timerNum )

The API stops the requested recovery timer unit.

Parameters
timerNum Recovery Timer unit to be stopped
Returns
Return 0 if successfull and 1 if failed.

Definition at line 370 of file IfxSmu.c.

◆ IfxSmu_temporaryLockConfigRegisters()

IFX_EXTERN void IfxSmu_temporaryLockConfigRegisters ( void )

The function temporarily locks the SMU configuration registers for modification.

Returns
None

Definition at line 446 of file IfxSmu.c.

◆ IfxSmu_unlockConfigRegisters()

IFX_EXTERN boolean IfxSmu_unlockConfigRegisters ( void )

The function unlocks the SMU configuration registers for modification.

Returns
Return 0 if SMU configurations is locked permanently and unlock not possible, 1 if unlocked successfully.

Definition at line 383 of file IfxSmu.c.

◆ IfxSmu_waitForAlarm()

IFX_INLINE void IfxSmu_waitForAlarm ( IfxSmu_Alarm alarm )

This function waits for SMU alarm to be set and then clears it..

Parameters
alarm smu alarm group and position
Returns
None

Definition at line 638 of file IfxSmu.h.


iLLD_TC38A: STDBY

Modules
STDBY
iLLD » SMU » Standard Driver
Collaboration diagram for STDBY:

Modules

Enumerations
StdBy Functions

Detailed Description


iLLD_TC38A: Enumerations

Enumerations
Enumerations
iLLD » SMU » Standard Driver » STDBY
Collaboration diagram for Enumerations:

Enumerations

enum IfxSmuStdby_AlarmStatusClear {
IfxSmuStdby_AlarmStatusClear_disable = 0,
IfxSmuStdby_AlarmStatusClear_enable = 1
}
This bit (CMD_STDBY.B.ASCE) controls if a status flag set in an AGx register upon detection of the alarm event can be cleared by software or not. When ASCE is enabled, software shall write a 1 to bit position in AGx to clear the bit (W1C). When a W1C action takes place the ASCE bit is automatically cleared to 0 by hardware and software shall set the ASCE bit again. 0B SMU_stdby alarm status bits in AGi cannot be cleared. 1B SMU_stdby alarm status bits in AGi can be cleared. More...
enum IfxSmuStdby_AlarmStatusFlag {
IfxSmuStdby_AlarmStatusFlag_noFaultExist = 0,
IfxSmuStdby_AlarmStatusFlag_faultExist = 1
}
Status flag for alarm (AG2i_STDBY.B.SFz) 0B Status flag does not report a fault condition 1B Status flag reports a fault condition. More...
enum IfxSmuStdby_FaultSignalAlarmConfigFlagEvent {
IfxSmuStdby_FaultSignalAlarmConfigFlagEvent_disable = 0,
IfxSmuStdby_FaultSignalAlarmConfigFlagEvent_enable = 1
}
Fault signaling configuration flag (AG2iFSP_STDBY.B.FEz) More...
enum IfxSmuStdby_FspErrorPinFaultState {
IfxSmuStdby_FspErrorPinFaultState_noFault = 0,
IfxSmuStdby_FspErrorPinFaultState_fault = 1
}
Error Pin Fault State Status (AG2i_STDBY.B.FSPERR) More...
enum IfxSmuStdby_FspErrorPinState {
IfxSmuStdby_FspErrorPinState_inactive = 0,
IfxSmuStdby_FspErrorPinState_active = 1
}
SMU_stdby Error pin function to be able set Pin to fault state. (CMD_STDBY.B.FSP0EN or CMD_STDBY.B.FSP1EN) More...
enum IfxSmuStdby_SmuStdbyModuleState {
IfxSmuStdby_SmuStdbyModuleState_disable = 0,
IfxSmuStdby_SmuStdbyModuleState_enable = 1
}
SMU_stdby Module Enable(CMD_STDBY.B.SMUEN) More...

Detailed Description

Enumeration Type Documentation

◆ IfxSmuStdby_AlarmStatusClear

enum IfxSmuStdby_AlarmStatusClear

This bit (CMD_STDBY.B.ASCE) controls if a status flag set in an AGx register upon detection of the alarm event can be cleared by software or not. When ASCE is enabled, software shall write a 1 to bit position in AGx to clear the bit (W1C). When a W1C action takes place the ASCE bit is automatically cleared to 0 by hardware and software shall set the ASCE bit again. 0B SMU_stdby alarm status bits in AGi cannot be cleared. 1B SMU_stdby alarm status bits in AGi can be cleared.

Enumerator
IfxSmuStdby_AlarmStatusClear_disable | SMU_stdby alarm status bits in AGi cannot be cleared.
IfxSmuStdby_AlarmStatusClear_enable | SMU_stdby alarm status bits in AGi can be cleared.

Definition at line 73 of file IfxSmuStdby.h.

◆ IfxSmuStdby_AlarmStatusFlag

enum IfxSmuStdby_AlarmStatusFlag

Status flag for alarm (AG2i_STDBY.B.SFz) 0B Status flag does not report a fault condition 1B Status flag reports a fault condition.

Enumerator
IfxSmuStdby_AlarmStatusFlag_noFaultExist | Status flag does not report a fault condition.
IfxSmuStdby_AlarmStatusFlag_faultExist | Status flag reports a fault condition.

Definition at line 83 of file IfxSmuStdby.h.

◆ IfxSmuStdby_FaultSignalAlarmConfigFlagEvent

enum IfxSmuStdby_FaultSignalAlarmConfigFlagEvent

Fault signaling configuration flag (AG2iFSP_STDBY.B.FEz)

Enumerator
IfxSmuStdby_FaultSignalAlarmConfigFlagEvent_disable | FSP disabled for this alarm event.
IfxSmuStdby_FaultSignalAlarmConfigFlagEvent_enable | FSP enabled for this alarm event.

Definition at line 91 of file IfxSmuStdby.h.

◆ IfxSmuStdby_FspErrorPinFaultState

enum IfxSmuStdby_FspErrorPinFaultState

Error Pin Fault State Status (AG2i_STDBY.B.FSPERR)

Enumerator
IfxSmuStdby_FspErrorPinFaultState_noFault | Error pin was not set into fault state.
IfxSmuStdby_FspErrorPinFaultState_fault | The Error pin was set into fault state.

Definition at line 99 of file IfxSmuStdby.h.

◆ IfxSmuStdby_FspErrorPinState

enum IfxSmuStdby_FspErrorPinState

SMU_stdby Error pin function to be able set Pin to fault state. (CMD_STDBY.B.FSP0EN or CMD_STDBY.B.FSP1EN)

Enumerator
IfxSmuStdby_FspErrorPinState_inactive | SMU_stdby Error Pin fault indication function on pin inactive.
IfxSmuStdby_FspErrorPinState_active | SMU_stdby Error Pin fault indication function on pin inactive.

Definition at line 107 of file IfxSmuStdby.h.

◆ IfxSmuStdby_SmuStdbyModuleState

enum IfxSmuStdby_SmuStdbyModuleState

SMU_stdby Module Enable(CMD_STDBY.B.SMUEN)

Enumerator
IfxSmuStdby_SmuStdbyModuleState_disable | SMU_stdby disabled.
IfxSmuStdby_SmuStdbyModuleState_enable | SMU_stdby enabled.

Definition at line 115 of file IfxSmuStdby.h.


iLLD_TC38A: StdBy Functions

Functions
StdBy Functions
iLLD » SMU » Standard Driver » STDBY
Collaboration diagram for StdBy Functions:

Functions

IFX_INLINE void | IfxSmuStdby_clearSmuStdbyMonBistFlags (void)
This function clears the TSTEN, TSTRUN, TSTDONE, TSTOK, SMUERR and PMSERR flags. More...
IFX_INLINE void | IfxSmuStdby_enableAlarmStatusClear (void)
This function enable / disables he Alarm status clear in the Smu Standby command register . This controls if a status flag set in an AGx register upon detection of the alarm event can be cleared by software or not. When ASCE is enabled, software shall write a 1 to bit position in AGx to clear the bit (W1C). When a W1C action takes place the ASCE bit is automatically cleared to 0 by hardware and software shall set the ASCE bit again. More...
IFX_INLINE void | IfxSmuStdby_enableSmuStdby (IfxSmuStdby_SmuStdbyModuleState enable)
This function enables the Smu Standby module. More...
IFX_INLINE void | IfxSmuStdby_enableSmuStdbyMonBist (void)
This function enables the Smu standby Built-in Self test. More...
IFX_INLINE uint32 | IfxSmuStdby_getSmuStdbyAlarmGroupStatus (uint8 alarmGroup)
Funtion returns Smu Standby Alarm Group status. More...
IFX_INLINE uint32 | IfxSmuStdby_getSmuStdbyAlarmStatus (uint8 alarmGroup, uint8 alarmNum)
Funtion returns Smu Standby Alarm status. More...
IFX_INLINE IfxSmuStdby_SmuStdbyModuleState | IfxSmuStdby_getSmuStdbyModuleStatus (void)
This function returns the SMU standby module status (enabled/disabled). More...
IFX_INLINE boolean | IfxSmuStdby_getSmuStdbyMonBistPmsErrorFlag (void)
This function returns the Smu Stdby BIST PMSERR flag. More...
IFX_INLINE boolean | IfxSmuStdby_getSmuStdbyMonBistSmuErrorFlag (void)
This function returns the Smu Stdby BIST SMUERR flag. More...
IFX_INLINE boolean | IfxSmuStdby_getSmuStdbyMonBistTestDoneFlag (void)
This function returns the Smu Stdby BIST TSTDONE flag. More...
IFX_INLINE boolean | IfxSmuStdby_getSmuStdbyMonBistTestOkFlag (void)
This function returns the Smu Stdby BIST TSTOK flag. More...
IFX_INLINE boolean | IfxSmuStdby_getSmuStdbyMonBistTestRunFlag (void)
This function returns the Smu Stdby BIST TSTRUN flag. More...
IFX_INLINE void | IfxSmuStdby_setFsp0ErrorPinActive (IfxSmuStdby_FspErrorPinState active)
This function sets FSP0 Error pin fault indication function . More...
IFX_INLINE void | IfxSmuStdby_setFsp1ErrorPinActive (IfxSmuStdby_FspErrorPinState active)
This function sets FSP1 Error pin fault indication function. More...
IFX_EXTERN void | IfxSmuStdby_setFaultSignalAGConfigEventFlags (uint8 alarmGroup, uint32 flags)
Function to configure FSP Alarm group functionality. More...
IFX_EXTERN void | IfxSmuStdby_setFaultSignalAlarmConfigEventFlag (uint8 alarmGroup, uint8 alarmNum, IfxSmuStdby_FaultSignalAlarmConfigFlagEvent enable)
Function to configure FSP functionality , FaultSignalAlarmConfigEventFlag (AG2iFSP_STDBY.B.FEz) More...
IFX_EXTERN void | IfxSmuStdby_setSmuStdbyAlarmStatusFlag (uint8 alarmGroup, uint8 alarmNum, IfxSmuStdby_AlarmStatusFlag status)
Function to configure alarm status. (AG2i_STDBY.B.SFz) More...
IFX_EXTERN void | IfxSmuStdby_startSmuStdbyMonBist (void)
This function enables the Smu standby Built-in Self test. More...

Detailed Description

Function Documentation

◆ IfxSmuStdby_clearSmuStdbyMonBistFlags()

IFX_INLINE void IfxSmuStdby_clearSmuStdbyMonBistFlags ( void )

This function clears the TSTEN, TSTRUN, TSTDONE, TSTOK, SMUERR and PMSERR flags.

Returns
None

Definition at line 246 of file IfxSmuStdby.h.

Referenced by IfxSmuStdby_startSmuStdbyMonBist().

◆ IfxSmuStdby_enableAlarmStatusClear()

IFX_INLINE void IfxSmuStdby_enableAlarmStatusClear ( void )

This function enable / disables he Alarm status clear in the Smu Standby command register . This controls if a status flag set in an AGx register upon detection of the alarm event can be cleared by software or not. When ASCE is enabled, software shall write a 1 to bit position in AGx to clear the bit (W1C). When a W1C action takes place the ASCE bit is automatically cleared to 0 by hardware and software shall set the ASCE bit again.

Returns
None

Definition at line 264 of file IfxSmuStdby.h.

Referenced by IfxSmuStdby_startSmuStdbyMonBist().

◆ IfxSmuStdby_enableSmuStdby()

IFX_INLINE void IfxSmuStdby_enableSmuStdby ( IfxSmuStdby_SmuStdbyModuleState enable )

This function enables the Smu Standby module.

Parameters
enable SMU standby enable/disable Module
Returns
None

Definition at line 279 of file IfxSmuStdby.h.

◆ IfxSmuStdby_enableSmuStdbyMonBist()

IFX_INLINE void IfxSmuStdby_enableSmuStdbyMonBist ( void )

This function enables the Smu standby Built-in Self test.

Returns
None

Definition at line 296 of file IfxSmuStdby.h.

Referenced by IfxSmuStdby_startSmuStdbyMonBist().

◆ IfxSmuStdby_getSmuStdbyAlarmGroupStatus()

IFX_INLINE uint32 IfxSmuStdby_getSmuStdbyAlarmGroupStatus ( uint8 alarmGroup )

Funtion returns Smu Standby Alarm Group status.

Parameters
alarmGroup Smu standby Alarm group
Returns
Smu standby status

Definition at line 313 of file IfxSmuStdby.h.

◆ IfxSmuStdby_getSmuStdbyAlarmStatus()

IFX_INLINE uint32 IfxSmuStdby_getSmuStdbyAlarmStatus | ( | uint8 | alarmGroup,
 |  | uint8 | alarmNum
 | ) |  |

Funtion returns Smu Standby Alarm status.

Parameters
alarmGroup | Smu standby Alarm group
alarmNum | alarm number
Returns
Smu standby status

Definition at line 334 of file IfxSmuStdby.h.

◆ IfxSmuStdby_getSmuStdbyModuleStatus()

IFX_INLINE IfxSmuStdby_SmuStdbyModuleState IfxSmuStdby_getSmuStdbyModuleStatus ( void )

This function returns the SMU standby module status (enabled/disabled).

Returns
Smu standby status

Definition at line 355 of file IfxSmuStdby.h.

◆ IfxSmuStdby_getSmuStdbyMonBistPmsErrorFlag()

IFX_INLINE boolean IfxSmuStdby_getSmuStdbyMonBistPmsErrorFlag ( void )

This function returns the Smu Stdby BIST PMSERR flag.

Returns
Smu Stdby BIST PMSERR flag

Definition at line 361 of file IfxSmuStdby.h.

◆ IfxSmuStdby_getSmuStdbyMonBistSmuErrorFlag()

IFX_INLINE boolean IfxSmuStdby_getSmuStdbyMonBistSmuErrorFlag ( void )

This function returns the Smu Stdby BIST SMUERR flag.

Returns
Smu Stdby BIST SMUERR flag

Definition at line 367 of file IfxSmuStdby.h.

◆ IfxSmuStdby_getSmuStdbyMonBistTestDoneFlag()

IFX_INLINE boolean IfxSmuStdby_getSmuStdbyMonBistTestDoneFlag ( void )

This function returns the Smu Stdby BIST TSTDONE flag.

Returns
Smu Stdby BIST TSTDONE flag

Definition at line 373 of file IfxSmuStdby.h.

◆ IfxSmuStdby_getSmuStdbyMonBistTestOkFlag()

IFX_INLINE boolean IfxSmuStdby_getSmuStdbyMonBistTestOkFlag ( void )

This function returns the Smu Stdby BIST TSTOK flag.

Returns
Smu Stdby BIST TSTOK flag

Definition at line 379 of file IfxSmuStdby.h.

◆ IfxSmuStdby_getSmuStdbyMonBistTestRunFlag()

IFX_INLINE boolean IfxSmuStdby_getSmuStdbyMonBistTestRunFlag ( void )

This function returns the Smu Stdby BIST TSTRUN flag.

Returns
Smu Stdby BIST TSTRUN flag

Definition at line 385 of file IfxSmuStdby.h.

◆ IfxSmuStdby_setFaultSignalAGConfigEventFlags()

IFX_EXTERN void IfxSmuStdby_setFaultSignalAGConfigEventFlags | ( | uint8 | alarmGroup,
 |  | uint32 | flags
 | ) |  |

Function to configure FSP Alarm group functionality.

Parameters
alarmGroup | alarm group
flags | Fault Signal Alarm Group config event flags
Returns
None

Definition at line 52 of file IfxSmuStdby.c.

Referenced by IfxSmuStdby_startSmuStdbyMonBist().

◆ IfxSmuStdby_setFaultSignalAlarmConfigEventFlag()

IFX_EXTERN void IfxSmuStdby_setFaultSignalAlarmConfigEventFlag | ( | uint8 | alarmGroup,
 |  | uint8 | alarmNum,
 |  | IfxSmuStdby_FaultSignalAlarmConfigFlagEvent | enable
 | ) |  |

Function to configure FSP functionality , FaultSignalAlarmConfigEventFlag (AG2iFSP_STDBY.B.FEz)

Parameters
alarmGroup | alarm group
alarmNum | alarm number
enable | enable/disable Fault Signal Alarm config event flag
Returns
None

Definition at line 84 of file IfxSmuStdby.c.

◆ IfxSmuStdby_setFsp0ErrorPinActive()

IFX_INLINE void IfxSmuStdby_setFsp0ErrorPinActive ( IfxSmuStdby_FspErrorPinState active )

This function sets FSP0 Error pin fault indication function .

Parameters
active Set FSP0 Error pin fault indication function to active / inactive
Returns
None

Definition at line 391 of file IfxSmuStdby.h.

Referenced by IfxSmuStdby_startSmuStdbyMonBist().

◆ IfxSmuStdby_setFsp1ErrorPinActive()

IFX_INLINE void IfxSmuStdby_setFsp1ErrorPinActive ( IfxSmuStdby_FspErrorPinState active )

This function sets FSP1 Error pin fault indication function.

Parameters
active Set FSP1 Error pin fault indication function to active / inactive
Returns
None

Definition at line 407 of file IfxSmuStdby.h.

Referenced by IfxSmuStdby_startSmuStdbyMonBist().

◆ IfxSmuStdby_setSmuStdbyAlarmStatusFlag()

IFX_EXTERN void IfxSmuStdby_setSmuStdbyAlarmStatusFlag | ( | uint8 | alarmGroup,
 |  | uint8 | alarmNum,
 |  | IfxSmuStdby_AlarmStatusFlag | status
 | ) |  |

Function to configure alarm status. (AG2i_STDBY.B.SFz)

Parameters
alarmGroup | alarm group
alarmNum | alarm number
status | enable/disable Alarm status flag
Returns
None

Definition at line 134 of file IfxSmuStdby.c.

◆ IfxSmuStdby_startSmuStdbyMonBist()

IFX_EXTERN void IfxSmuStdby_startSmuStdbyMonBist ( void )

This function enables the Smu standby Built-in Self test.

Returns
None

Definition at line 189 of file IfxSmuStdby.c.


iLLD_TC38A: SMU Pin Mapping

Data Structures | Macros | Variables
SMU Pin Mapping
iLLD » SMU
Collaboration diagram for SMU Pin Mapping:

Data Structures

struct IfxSmu_Fsp_Out
Fault Signal Protocol Pin. More...

Macros

#define | IFXSMU_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS 2

Variables

IFX_EXTERN IfxSmu_Fsp_Out IfxSmu_FSP0_P33_8_OUT
FSP[1..0] Output Signals - Generated by SMU_core. More...
IFX_EXTERN IfxSmu_Fsp_Out IfxSmu_FSP1_P33_10_OUT
FSP[1..0] Output Signals - Generated by SMU_core. More...
IFX_EXTERN const IfxSmu_Fsp_Out * IfxSmu_Fsp_Out_pinTable [IFXSMU_PINMAP_NUM_MODULES][IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS]
IfxSmu_Fsp_Out table. More...

Detailed Description

Data Structure Documentation

◆ IfxSmu_Fsp_Out

struct IfxSmu_Fsp_Out

Fault Signal Protocol Pin.

Definition at line 55 of file IfxSmu_PinMap.h.

Collaboration diagram for IfxSmu_Fsp_Out:
[legend]
Data Fields
Ifx_SMU * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

Macro Definition Documentation

◆ IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS

#define IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS 2

Definition at line 67 of file IfxSmu_PinMap.h.

◆ IFXSMU_PINMAP_NUM_MODULES

#define IFXSMU_PINMAP_NUM_MODULES 1

Table dimensions.

Definition at line 66 of file IfxSmu_PinMap.h.

Variable Documentation

◆ IfxSmu_FSP0_P33_8_OUT

IFX_EXTERN IfxSmu_Fsp_Out IfxSmu_FSP0_P33_8_OUT

FSP[1..0] Output Signals - Generated by SMU_core.

Definition at line 62 of file IfxSmu_PinMap.h.

◆ IfxSmu_FSP1_P33_10_OUT

IFX_EXTERN IfxSmu_Fsp_Out IfxSmu_FSP1_P33_10_OUT

FSP[1..0] Output Signals - Generated by SMU_core.

Definition at line 63 of file IfxSmu_PinMap.h.

◆ IfxSmu_Fsp_Out_pinTable

IFX_EXTERN const IfxSmu_Fsp_Out* IfxSmu_Fsp_Out_pinTable[IFXSMU_PINMAP_NUM_MODULES][IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS]

IfxSmu_Fsp_Out table.

Definition at line 71 of file IfxSmu_PinMap.h.


iLLD_TC38A: SMU

Modules
SMU
iLLD » SMU
Collaboration diagram for SMU:

Modules

Data Structures
Smu Functions

Detailed Description


iLLD_TC38A: Data Structures

Data Structures
Data Structures
iLLD » SMU » SMU
Collaboration diagram for Data Structures:

Data Structures

struct | IfxSmu_Smu_AlarmGlobalConfiguration
Alarm Global Configuration. More...
struct | IfxSmu_Smu_FaultSignalingProtocol
FSP configuration. More...
struct | IfxSmu_Smu_RecoveryTimerAlarmConfiguration
Recovery Timer/s Alarm Configuration. More...
struct | IfxSmu_Smu_RecoveryTimerConfig
Recovery Timer Configuration. More...
struct | IfxSmu_Smu_Config

Detailed Description

Data Structure Documentation

◆ IfxSmu_Smu_AlarmGlobalConfiguration

struct IfxSmu_Smu_AlarmGlobalConfiguration

Alarm Global Configuration.

Definition at line 67 of file IfxSmu_Smu.h.

Data Fields
boolean | enableFaultToRunTransition | AGC.B.EFRST.
uint8 | igcs0 | AGC.B.IGCS0.
uint8 | igcs1 | AGC.B.IGCS1.
uint8 | igcs2 | AGC.B.IGCS2.
uint8 | portEmergencyStop | AGC.B.PES.
uint8 | resetConfigSet | AGC.B.RCS.

◆ IfxSmu_Smu_FaultSignalingProtocol

struct IfxSmu_Smu_FaultSignalingProtocol

FSP configuration.

Definition at line 79 of file IfxSmu_Smu.h.

Data Fields
uint16 | faultStateDurationHigh | FSP.B.TFSP_HIGH.
uint16 | faultStateDurationLow | FSP.B.TFSP_LOW.
IfxSmu_FspMode | mode |
boolean | portEmergencyStop | FSP.B.PES.
IfxSmu_FspPrescalar1 | prescalar1 | FSP.B.PRE1.
IfxSmu_FspPrescalar2 | prescalar2 | FSP.B.PRE2.

◆ IfxSmu_Smu_RecoveryTimerAlarmConfiguration

struct IfxSmu_Smu_RecoveryTimerAlarmConfiguration

Recovery Timer/s Alarm Configuration.

Definition at line 91 of file IfxSmu_Smu.h.

Data Fields
uint8 | alarmId0
uint8 | alarmId1
uint8 | alarmId2
uint8 | alarmId3
uint8 | groupIndex0
uint8 | groupIndex1
uint8 | groupIndex2
uint8 | groupIndex3

◆ IfxSmu_Smu_RecoveryTimerConfig

struct IfxSmu_Smu_RecoveryTimerConfig

Recovery Timer Configuration.

Definition at line 105 of file IfxSmu_Smu.h.

Data Fields
boolean | enableRecoveryTimer0 | RTC.B.RT0E.
boolean | enableRecoveryTimer1 | RTC.B.RT1E.
uint32 | recoveryTimerDuration | RTC.B.RTD.

◆ IfxSmu_Smu_Config

struct IfxSmu_Smu_Config

Definition at line 116 of file IfxSmu_Smu.h.

Collaboration diagram for IfxSmu_Smu_Config:
[legend]
Data Fields
uint32 | alarmConfigRegister[IFXSMU_NUM_ALARM_GROUPS][3] | AGCF.
IfxSmu_Smu_AlarmGlobalConfiguration | alarmGlobalConfig |
IfxSmu_Smu_FaultSignalingProtocol | fsp |
uint32 | fspConfigRegister[IFXSMU_NUM_ALARM_GROUPS] | AGFSP.
IfxSmu_Smu_RecoveryTimerAlarmConfiguration | recoveryTimerAlarmConfig[2] | recovery Timer Alarm 0/1 configuration
IfxSmu_Smu_RecoveryTimerConfig | recoveryTimerConfig |


iLLD_TC38A: Smu Functions

Functions
Smu Functions
iLLD » SMU » SMU
Collaboration diagram for Smu Functions:

Functions

IFX_EXTERN void | IfxSmu_Smu_initModuleConfig (IfxSmu_Smu_Config *config)
Fills the configuration stucture of the SMU Module with default values. More...
IFX_EXTERN void | IfxSmu_Smu_initModule (IfxSmu_Smu_Config *config)
Initialises the SMU Module. More...
IFX_EXTERN boolean | IfxSmu_Smu_isAlarmTriggered (void)
Check if any alarm is Triggered. More...

Detailed Description

Function Documentation

◆ IfxSmu_Smu_initModule()

IFX_EXTERN void IfxSmu_Smu_initModule ( IfxSmu_Smu_Config * config )

Initialises the SMU Module.

Parameters
config configuration structure of the module
Returns
None

Definition at line 152 of file IfxSmu_Smu.c.

◆ IfxSmu_Smu_initModuleConfig()

IFX_EXTERN void IfxSmu_Smu_initModuleConfig ( IfxSmu_Smu_Config * config )

Fills the configuration stucture of the SMU Module with default values.

Parameters
config configuration structure of the module
Returns
None

Definition at line 52 of file IfxSmu_Smu.c.

◆ IfxSmu_Smu_isAlarmTriggered()

IFX_EXTERN boolean IfxSmu_Smu_isAlarmTriggered ( void )

Check if any alarm is Triggered.

Returns
Returns True if any alarm is set

Definition at line 275 of file IfxSmu_Smu.c.


iLLD_TC38A: IfxSmu_cfg.h File Reference

  • _Impl
Macros | Enumerations
IfxSmu_cfg.h File Reference
iLLD » SMU

Smu on-chip implementation data. More...

#include "Cpu/Std/Ifx_Types.h"
Include dependency graph for IfxSmu_cfg.h:

Go to the source code of this file.

Macros

#define IFXSMU_NUM_ALARM_GROUPS (12)
Number of SMU Alarm Groups. More...

Enumerations

enum IfxSmu_Alarm {
IfxSmu_Alarm_CPU0_Lockstep_ComparatorError = 0,
IfxSmu_Alarm_CPU0_Buslevel_MpuViolation = 1,
IfxSmu_Alarm_CPU0_PFI0_PFLASH0_ReadPathError = 2,
IfxSmu_Alarm_CPU0_PCACHETAG_UncorrectableErrorDetection = 4,
IfxSmu_Alarm_CPU0_PCACHETAG_MiscellaneousErrorDetection = 5,
IfxSmu_Alarm_CPU0_PSPRPCACHE_SingleBitErrorCorrection = 6,
IfxSmu_Alarm_CPU0_PSPRPCACHE_UncorrectableErrorDetection = 7,
IfxSmu_Alarm_CPU0_PSPRPCACHE_MiscellaneousErrorDetection = 8,
IfxSmu_Alarm_CPU0_DSPRDCACHEDLMU_SingleBitErrorCorrection = 9,
IfxSmu_Alarm_CPU0_DSPRDCACHEDLMU_UncorrectableErrorDetection = 10,
IfxSmu_Alarm_CPU0_DSPRDCACHEDLMU_MiscelleniousErrorDetection = 11,
IfxSmu_Alarm_CPU0_DCACHETAG_SingleBitErrorCorrection = 12,
IfxSmu_Alarm_CPU0_DCACHETAG_UncorrectableErrorDetection = 13,
IfxSmu_Alarm_CPU0_DCACHETAG_MiscellaneousErrorDetection = 14,
IfxSmu_Alarm_CPU0_CPU_InstructionFetchSriInterfaceEdcError = 22,
IfxSmu_Alarm_CPU0_CPU_DataSriInterfaceLoadStoreEdcError = 23,
IfxSmu_Alarm_CPU0_CPU_ExceptionInterruptTrap = 24,
IfxSmu_Alarm_CPU1_Lockstep_ComparatorError = 32,
IfxSmu_Alarm_CPU1_Buslevel_MpuViolation = 33,
IfxSmu_Alarm_CPU1_PFI1_PFLASH1_ReadPathError = 34,
IfxSmu_Alarm_CPU1_PCACHETAG_UncorrectableErrorDetection = 36,
IfxSmu_Alarm_CPU1_PCACHETAG_MiscellaneousErrorDetection = 37,
IfxSmu_Alarm_CPU1_PSPRPCACHE_SingleBitErrorCorrection = 38,
IfxSmu_Alarm_CPU1_PSPRPCACHE_UncorrectableErrorDetection = 39,
IfxSmu_Alarm_CPU1_PSPRPCACHE_MiscellaneousErrorDetection = 40,
IfxSmu_Alarm_CPU1_DSPRDCACHEDLMU_SingleBitErrorCorrection = 41,
IfxSmu_Alarm_CPU1_DSPRDCACHEDLMU_UncorrectableErrorDetection = 42,
IfxSmu_Alarm_CPU1_DSPRDCACHEDLMU_MiscellaneousErrorDetection = 43,
IfxSmu_Alarm_CPU1_DCACHETAG_SingleBitErrorCorrection = 44,
IfxSmu_Alarm_CPU1_DCACHETAG_UncorrectableErrorDetection = 45,
IfxSmu_Alarm_CPU1_DCACHETAG_MiscellaneousErrorDetection = 46,
IfxSmu_Alarm_CPU1_CPU_InstructionFetchSriInterfaceEdcError = 54,
IfxSmu_Alarm_CPU1_CPU_DataSriInterfaceLoadStoreEdcError = 55,
IfxSmu_Alarm_CPU1_CPU_ExceptionInterruptTrap = 56,
IfxSmu_Alarm_CPU2_Lockstep_ComparatorError = 64,
IfxSmu_Alarm_CPU2_Buslevel_MpuViolation = 65,
IfxSmu_Alarm_CPU2_PFI2_PFLASH2_ReadPathError = 66,
IfxSmu_Alarm_CPU2_PCACHETAG_UncorrectableErrorDetection = 68,
IfxSmu_Alarm_CPU2_PCACHETAG_MiscellaneousErrorDetection = 69,
IfxSmu_Alarm_CPU2_PSPRPCACHE_SingleBitErrorCorrection = 70,
IfxSmu_Alarm_CPU2_PSPRPCACHE_UncorrectableErrorDetection = 71,
IfxSmu_Alarm_CPU2_PSPRPCACHE_MiscellaneousErrorDetection = 72,
IfxSmu_Alarm_CPU2_DSPRDCACHEDLMU_SingleBitErrorCorrection = 73,
IfxSmu_Alarm_CPU2_DSPRDCACHEDLMU_UncorrectableErrorDetection = 74,
IfxSmu_Alarm_CPU2_DSPRDCACHEDLMU_MiscellaneousErrorDetection = 75,
IfxSmu_Alarm_CPU2_DCACHETAG_SingleBitErrorCorrection = 76,
IfxSmu_Alarm_CPU2_DCACHETAG_UncorrectableErrorDetection = 77,
IfxSmu_Alarm_CPU2_DCACHETAG_MiscellaneousErrorDetection = 78,
IfxSmu_Alarm_CPU2_CPU_InstructionFetchSriInterfaceEdcError = 86,
IfxSmu_Alarm_CPU2_CPU_DataSriInterfaceLoadStoreEdcError = 87,
IfxSmu_Alarm_CPU2_CPU_ExceptionInterruptTrap = 88,
IfxSmu_Alarm_CPU3_Lockstep_ComparatorError = 96,
IfxSmu_Alarm_CPU3_Buslevel_MpuViolation = 97,
IfxSmu_Alarm_CPU3_PFI3_PFLASH3_ReadPathError = 98,
IfxSmu_Alarm_CPU3_PCACHETAG_UncorrectableErrorDetection = 100,
IfxSmu_Alarm_CPU3_PCACHETAG_MiscellaneousErrorDetection = 101,
IfxSmu_Alarm_CPU3_PSPRPCACHE_SingleBitErrorCorrection = 102,
IfxSmu_Alarm_CPU3_PSPRPCACHE_UncorrectableErrorDetection = 103,
IfxSmu_Alarm_CPU3_PSPRPCACHE_MiscellaneousErrorDetection = 104,
IfxSmu_Alarm_CPU3_DSPRDCACHEDLMU_SingleBitErrorCorrection = 105,
IfxSmu_Alarm_CPU3_DSPRDCACHEDLMU_UncorrectableErrorDetection = 106,
IfxSmu_Alarm_CPU3_DSPRDCACHEDLMU_MiscellaneousErrorDetection = 107,
IfxSmu_Alarm_CPU3_DCACHETAG_SingleBitErrorCorrection = 108,
IfxSmu_Alarm_CPU3_DCACHETAG_UncorrectableErrorDetection = 109,
IfxSmu_Alarm_CPU3_DCACHETAG_MiscellaneousErrorDetection = 110,
IfxSmu_Alarm_CPU3_CPU_InstructionFetchSriInterfaceEdcError = 118,
IfxSmu_Alarm_CPU3_CPU_DataSriInterfaceLoadStoreEdcError = 119,
IfxSmu_Alarm_CPU3_CPU_ExceptionInterruptTrap = 120,
IfxSmu_Alarm_MTU_Safety_FfUncorrectableErrorDetected = 192,
IfxSmu_Alarm_IOM_Safety_FfUncorrectableErrorDetected = 193,
IfxSmu_Alarm_IR_Safety_FfUncorrectableErrorDetected = 194,
IfxSmu_Alarm_EMEM_Safety_FfUncorrectableErrorDetected = 195,
IfxSmu_Alarm_SCU_Safety_FfUncorrectableErrorDetected = 196,
IfxSmu_Alarm_PMS_Safety_FfUncorrectableErrorDetected = 197,
IfxSmu_Alarm_DMA_Safety_FfUncorrectableErrorDetected = 198,
IfxSmu_Alarm_SMU_core_Safety_FfUncorrectableErrorDetected = 199,
IfxSmu_Alarm_SYS_PLL_PER_PLL_Safety_FfUncorrectableErrorDetected = 200,
IfxSmu_Alarm_GTM_GTM_SingleBitErrorCorrection = 202,
IfxSmu_Alarm_GTM_GTM_UncorrectableErrorDetection = 203,
IfxSmu_Alarm_GTM_GTM_MiscellaneousErrorDetection = 204,
IfxSmu_Alarm_ERAY_ERAY_SingleBitErrorCorrection = 205,
IfxSmu_Alarm_ERAY_ERAY_UncorrectableErrorDetection = 206,
IfxSmu_Alarm_ERAY_ERAY_MiscellaneousErrorDetection = 207,
IfxSmu_Alarm_CAN_CAN_SingleBitErrorCorrection = 208,
IfxSmu_Alarm_CAN_CAN_UncorrectableErrorDetection = 209,
IfxSmu_Alarm_CAN_CAN_MiscellaneousErrorDetection = 210,
IfxSmu_Alarm_Misc_MISC_SingleBitErrorCorrection = 211,
IfxSmu_Alarm_Misc_MISC_UncorrectableErrorDetection = 212,
IfxSmu_Alarm_Misc_MISC_MiscellaneousErrorDetection = 213,
IfxSmu_Alarm_CERBERUS_Safety_FfUncorrectableErrorDetected = 215,
IfxSmu_Alarm_CCU_Safety_FfCorrectableErrorDetected = 216,
IfxSmu_Alarm_CCU_Safety_FfUncorrectableErrorDetected = 217,
IfxSmu_Alarm_LMU_FSI_RAM_LMUDMU_SingleBitErrorCorrection = 224,
IfxSmu_Alarm_LMU_FSI_RAM_LMUDMU_UncorrectableErrorDetection = 225,
IfxSmu_Alarm_LMU_FSI_RAM_LMUDMU_MiscellaneousErrorDetection = 226,
IfxSmu_Alarm_LMU_Lockstep_ComparatorError = 236,
IfxSmu_Alarm_LMU_Lockstep_ControlError = 237,
IfxSmu_Alarm_LMU_ECC_Error = 238,
IfxSmu_Alarm_LMU_Buslevel_MpuError = 239,
IfxSmu_Alarm_LMU_EDC_ReadPhaseError = 240,
IfxSmu_Alarm_XBAR0_SRI_BusErrorEvent = 241,
IfxSmu_Alarm_XBAR1_SRI_BusErrorEvent = 242,
IfxSmu_Alarm_XBAR2_SRI_BusErrorEvent = 243,
IfxSmu_Alarm_SPB_BusErrorEvent = 244,
IfxSmu_Alarm_BBB_BusErrorEvent = 245,
IfxSmu_Alarm_FSI_PFlash_SingleBitError = 246,
IfxSmu_Alarm_FSI_PFlash_DoubleBitError = 247,
IfxSmu_Alarm_FSI_Single_BitCorrectionTrackingBufferFull = 248,
IfxSmu_Alarm_FSI_Double_BitCorrectionTrackingBufferFull = 249,
IfxSmu_Alarm_FSI_Multiple_BitErrorDetectionTrackingBufferFull = 250,
IfxSmu_Alarm_FSI_Zero_BitErrorTrackingBufferFull = 251,
IfxSmu_Alarm_FSI_PFlash_EccError = 252,
IfxSmu_Alarm_FSI_PFlash_EdcError = 253,
IfxSmu_Alarm_FSI_CPUFLASHCON_ConfigurationError = 254,
IfxSmu_Alarm_FSI_Flash_StoredConfigurationError = 255,
IfxSmu_Alarm_SCU_OS_CClockFrequencyOutOfRange = 256,
IfxSmu_Alarm_CCU_Backup_ClockOutOfRangeAlarm = 257,
IfxSmu_Alarm_CCU_Backup_ClockAliveAlarm = 258,
IfxSmu_Alarm_SCU_System_PllDcoLossOfLockEvent = 259,
IfxSmu_Alarm_SCU_Peripheral_PllDcoLossOfLockEvent = 260,
IfxSmu_Alarm_SCU_LBIST_Alarm = 261,
IfxSmu_Alarm_SCU_External_RequestUnitAlarm0 = 262,
IfxSmu_Alarm_SCU_External_RequestUnitAlarm1 = 263,
IfxSmu_Alarm_SCU_External_RequestUnitAlarm2 = 264,
IfxSmu_Alarm_SCU_External_RequestUnitAlarm3 = 265,
IfxSmu_Alarm_SCU_CPU0_WatchdogTimeOut = 266,
IfxSmu_Alarm_SCU_CPU1_WatchdogTimeOut = 267,
IfxSmu_Alarm_SCU_CPU2_WatchdogTimeOut = 268,
IfxSmu_Alarm_SCU_CPU3_WatchdogTimeOut = 269,
IfxSmu_Alarm_SCU_Safety_WatchdogTimeOut = 272,
IfxSmu_Alarm_SCU_Watchdog_TimeOut = 273,
IfxSmu_Alarm_SCU_Lockstep_DualRailError = 274,
IfxSmu_Alarm_SCU_External_EmergencyStopSignalEvent = 275,
IfxSmu_Alarm_SCU_Pad_HeatingAlarm = 276,
IfxSmu_Alarm_SCU_LBIST_TestModeAlarm = 277,
IfxSmu_Alarm_IR_EDC_ConfigurationDataPathError = 278,
IfxSmu_Alarm_DMA_DMASRI_EccError = 279,
IfxSmu_Alarm_IOM_Pin_MismatchIndication = 281,
IfxSmu_Alarm_SCU_External_RequestUnitAlarm4 = 282,
IfxSmu_Alarm_SCU_External_RequestUnitAlarm5 = 283,
IfxSmu_Alarm_SCU_External_RequestUnitAlarm6 = 284,
IfxSmu_Alarm_SCU_External_RequestUnitAlarm7 = 285,
IfxSmu_Alarm_DTS_core_Under_TemperatureAlarm = 286,
IfxSmu_Alarm_DTS_core_Over_TemperatureAlarm = 287,
IfxSmu_Alarm_DTS_Temperature_Overflow = 288,
IfxSmu_Alarm_DTS_Temperature_Underflow = 289,
IfxSmu_Alarm_EVR_Overvoltage_Alarm = 291,
IfxSmu_Alarm_EVR_Undervoltage_Alarm = 293,
IfxSmu_Alarm_EVR_Short_ToLowHightAlarm = 303,
IfxSmu_Alarm_HSM_Overvoltage_Alarm = 304,
IfxSmu_Alarm_HSM_Undervoltage_Alarm = 305,
IfxSmu_Alarm_EMEM_Unexpected_WriteToEmemAlarm = 308,
IfxSmu_Alarm_EMEM_SEP_ControlLogicAlarm = 309,
IfxSmu_Alarm_EMEM_Lockstep_ControlLogicInputAlarm = 310,
IfxSmu_Alarm_Software_Alarm0 = 320,
IfxSmu_Alarm_Software_Alarm1 = 321,
IfxSmu_Alarm_Software_Alarm2 = 322,
IfxSmu_Alarm_Software_Alarm3 = 323,
IfxSmu_Alarm_Software_Alarm4 = 324,
IfxSmu_Alarm_Software_Alarm5 = 325,
IfxSmu_Alarm_Software_Alarm6 = 326,
IfxSmu_Alarm_Software_Alarm7 = 327,
IfxSmu_Alarm_Software_Alarm8 = 328,
IfxSmu_Alarm_Software_Alarm9 = 329,
IfxSmu_Alarm_Software_Alarm10 = 330,
IfxSmu_Alarm_Software_Alarm11 = 331,
IfxSmu_Alarm_Software_Alarm12 = 332,
IfxSmu_Alarm_Software_Alarm13 = 333,
IfxSmu_Alarm_Software_Alarm14 = 334,
IfxSmu_Alarm_Software_Alarm15 = 335,
IfxSmu_Alarm_SMU_Timer0_TimeOut = 336,
IfxSmu_Alarm_SMU_Timer1_TimeOut = 337,
IfxSmu_Alarm_SMU_Error_PinFaultStateActivation = 338,
IfxSmu_Alarm_SMU_Safety_FfCorrectableErrorDetected = 340,
IfxSmu_Alarm_SMU_Safety_FfUncorrectableErrorDetected = 341,
IfxSmu_Alarm_SMU_Access_EnableErrorDetected = 342,
IfxSmu_Alarm_LMU_EDC_AddressPhaseError = 352,
IfxSmu_Alarm_LMU_EDC_WritePhaseError = 353,
IfxSmu_Alarm_XBAR_EDC_AddressPhaseError = 354,
IfxSmu_Alarm_XBAR_EDC_WritePhaseError = 355,
IfxSmu_Alarm_DMU_EDC_AddressPhaseError = 356,
IfxSmu_Alarm_DMU_EDC_WritePhaseError = 357,
IfxSmu_Alarm_SFI_BBB_EDC_AddressPhaseError = 358,
IfxSmu_Alarm_SFI_BBB_EDC_WritePhaseError = 359,
IfxSmu_Alarm_SRI_EDC_ReadPhaseError = 360,
IfxSmu_Alarm_SFI_SPB_EDC_ReadPhaseError = 361,
IfxSmu_Alarm_HSSL_HSSL0EDC_ReadPhaseError = 362,
IfxSmu_Alarm_CONVERTER_Phase_SyncronizerError = 364,
IfxSmu_Alarm_XBAR_SOTA_SwapError = 365
}
SMU Alarms. More...

Detailed Description

Smu on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxSmu_cfg.h.

Macro Definition Documentation

◆ IFXSMU_NUM_ALARM_GROUPS

#define IFXSMU_NUM_ALARM_GROUPS (12)

Number of SMU Alarm Groups.

Definition at line 68 of file IfxSmu_cfg.h.

Referenced by IfxSmu_Smu_initModule(), and IfxSmu_Smu_isAlarmTriggered().

Enumeration Type Documentation

◆ IfxSmu_Alarm

enum IfxSmu_Alarm

SMU Alarms.

Enumerator
IfxSmu_Alarm_CPU0_Lockstep_ComparatorError | ALM0[0] : Safety Mechanism: Lockstep CPU Alarm: Lockstep Comparator Error.
IfxSmu_Alarm_CPU0_Buslevel_MpuViolation | ALM0[1] : Safety Mechanism: Bus-level Memory Protection Unit Alarm: Bus-level MPU violation.
IfxSmu_Alarm_CPU0_PFI0_PFLASH0_ReadPathError | ALM0[2] : Safety Mechanism: PFLASH Read Path Monitor Alarm: PFLASH0 Read Path Error.
IfxSmu_Alarm_CPU0_PCACHETAG_UncorrectableErrorDetection | ALM0[4] : Safety Mechanism: SRAM Monitor Alarm: PCACHE TAG Uncorrectable error detection.
IfxSmu_Alarm_CPU0_PCACHETAG_MiscellaneousErrorDetection | ALM0[5] : Safety Mechanism: SRAM Monitor Alarm: PCACHE TAG Miscellaneous error detection.
IfxSmu_Alarm_CPU0_PSPRPCACHE_SingleBitErrorCorrection | ALM0[6] : Safety Mechanism: SRAM Monitor Alarm: PSPR/PCACHE Single bit error correction.
IfxSmu_Alarm_CPU0_PSPRPCACHE_UncorrectableErrorDetection | ALM0[7] : Safety Mechanism: SRAM Monitor Alarm: PSPR/PCACHE Uncorrectable error detection.
IfxSmu_Alarm_CPU0_PSPRPCACHE_MiscellaneousErrorDetection | ALM0[8] : Safety Mechanism: SRAM Monitor Alarm: PSPR/PCACHE Miscellaneous error detection.
IfxSmu_Alarm_CPU0_DSPRDCACHEDLMU_SingleBitErrorCorrection | ALM0[9] : Safety Mechanism: SRAM Monitor Alarm: DSPR/DCACHE/DLMU Single bit error correction.
IfxSmu_Alarm_CPU0_DSPRDCACHEDLMU_UncorrectableErrorDetection | ALM0[10] : Safety Mechanism(s): SRAM Monitor Alarm: DSPR/DCACHE/DLMU Uncorrectable error detection.
IfxSmu_Alarm_CPU0_DSPRDCACHEDLMU_MiscelleniousErrorDetection | ALM0[11] : Safety Mechanism(s): SRAM Monitor Alarm: DSPR/DCACHE/DLMU Miscellenious error detection.
IfxSmu_Alarm_CPU0_DCACHETAG_SingleBitErrorCorrection | ALM0[12] : Safety Mechanism: SRAM Monitor Alarm: DCACHE TAG Single bit error correction.
IfxSmu_Alarm_CPU0_DCACHETAG_UncorrectableErrorDetection | ALM0[13] : Safety Mechanism: SRAM Monitor Alarm: DCACHE TAG Uncorrectable error detection.
IfxSmu_Alarm_CPU0_DCACHETAG_MiscellaneousErrorDetection | ALM0[14] : Safety Mechanism: SRAM Monitor Alarm: DCACHE TAG Miscellaneous error detection.
IfxSmu_Alarm_CPU0_CPU_InstructionFetchSriInterfaceEdcError | ALM0[22] : Safety Mechanism: SRI End-to-End EDC Alarm: CPU Instruction Fetch SRI Interface EDC Error.
IfxSmu_Alarm_CPU0_CPU_DataSriInterfaceLoadStoreEdcError | ALM0[23] : Safety Mechanism: SRI End-to-End EDC Alarm: CPU Data SRI Interface (Load/Store) EDC Error.
IfxSmu_Alarm_CPU0_CPU_ExceptionInterruptTrap | ALM0[24] : Safety Mechanism: Exception Monitor Alarm: CPU exception (interrupt/trap)
IfxSmu_Alarm_CPU1_Lockstep_ComparatorError | ALM1[0] : Safety Mechanism: Lockstep CPU Alarm: Lockstep Comparator Error.
IfxSmu_Alarm_CPU1_Buslevel_MpuViolation | ALM1[1] : Safety Mechanism: Bus-level Memory Protection Unit Alarm: Bus-level MPU violation.
IfxSmu_Alarm_CPU1_PFI1_PFLASH1_ReadPathError | ALM1[2] : Safety Mechanism: PFLASH Read Path Monitor Alarm: PFLASH1 Read Path Error.
IfxSmu_Alarm_CPU1_PCACHETAG_UncorrectableErrorDetection | ALM1[4] : Safety Mechanism: SRAM Monitor Alarm: PCACHE TAG Uncorrectable error detection.
IfxSmu_Alarm_CPU1_PCACHETAG_MiscellaneousErrorDetection | ALM1[5] : Safety Mechanism: SRAM Monitor Alarm: PCACHE TAG Miscellaneous error detection.
IfxSmu_Alarm_CPU1_PSPRPCACHE_SingleBitErrorCorrection | ALM1[6] : Safety Mechanism: SRAM Monitor Alarm: PSPR/PCACHE Single bit error correction.
IfxSmu_Alarm_CPU1_PSPRPCACHE_UncorrectableErrorDetection | ALM1[7] : Safety Mechanism: SRAM Monitor Alarm: PSPR/PCACHE Uncorrectable error detection.
IfxSmu_Alarm_CPU1_PSPRPCACHE_MiscellaneousErrorDetection | ALM1[8] : Safety Mechanism: SRAM Monitor Alarm: PSPR/PCACHE Miscellaneous error detection.
IfxSmu_Alarm_CPU1_DSPRDCACHEDLMU_SingleBitErrorCorrection | ALM1[9] : Safety Mechanism: SRAM Monitor Alarm: DSPR/DCACHE/DLMU Single bit error correction.
IfxSmu_Alarm_CPU1_DSPRDCACHEDLMU_UncorrectableErrorDetection | ALM1[10] : Safety Mechanism(s): SRAM Monitor Alarm: DSPR/DCACHE/DLMU Uncorrectable error detection.
IfxSmu_Alarm_CPU1_DSPRDCACHEDLMU_MiscellaneousErrorDetection | ALM1[11] : Safety Mechanism(s): SRAM Monitor Alarm: DSPR/DCACHE/DLMU Miscellaneous error detection.
IfxSmu_Alarm_CPU1_DCACHETAG_SingleBitErrorCorrection | ALM1[12] : Safety Mechanism: SRAM Monitor Alarm: DCACHE TAG Single bit error correction.
IfxSmu_Alarm_CPU1_DCACHETAG_UncorrectableErrorDetection | ALM1[13] : Safety Mechanism: SRAM Monitor Alarm: DCACHE TAG Uncorrectable error detection.
IfxSmu_Alarm_CPU1_DCACHETAG_MiscellaneousErrorDetection | ALM1[14] : Safety Mechanism: SRAM Monitor Alarm: DCACHE TAG Miscellaneous error detection.
IfxSmu_Alarm_CPU1_CPU_InstructionFetchSriInterfaceEdcError | ALM1[22] : Safety Mechanism: SRI End-to-End EDC Alarm: CPU Instruction Fetch SRI Interface EDC Error.
IfxSmu_Alarm_CPU1_CPU_DataSriInterfaceLoadStoreEdcError | ALM1[23] : Safety Mechanism: SRI End-to-End EDC Alarm: CPU Data SRI Interface (Load/Store) EDC Error.
IfxSmu_Alarm_CPU1_CPU_ExceptionInterruptTrap | ALM1[24] : Safety Mechanism: Exception Monitor Alarm: CPU exception (interrupt/trap)
IfxSmu_Alarm_CPU2_Lockstep_ComparatorError | ALM2[0] : Safety Mechanism: Lockstep CPU Alarm: Lockstep Comparator Error.
IfxSmu_Alarm_CPU2_Buslevel_MpuViolation | ALM2[1] : Safety Mechanism: Bus-level Memory Protection Unit Alarm: Bus-level MPU violation.
IfxSmu_Alarm_CPU2_PFI2_PFLASH2_ReadPathError | ALM2[2] : Safety Mechanism: PFLASH Read Path Monitor Alarm: PFLASH2 Read Path Error.
IfxSmu_Alarm_CPU2_PCACHETAG_UncorrectableErrorDetection | ALM2[4] : Safety Mechanism: SRAM Monitor Alarm: PCACHE TAG Uncorrectable error detection.
IfxSmu_Alarm_CPU2_PCACHETAG_MiscellaneousErrorDetection | ALM2[5] : Safety Mechanism: SRAM Monitor Alarm: PCACHE TAG Miscellaneous error detection.
IfxSmu_Alarm_CPU2_PSPRPCACHE_SingleBitErrorCorrection | ALM2[6] : Safety Mechanism: SRAM Monitor Alarm: PSPR/PCACHE Single bit error correction.
IfxSmu_Alarm_CPU2_PSPRPCACHE_UncorrectableErrorDetection | ALM2[7] : Safety Mechanism: SRAM Monitor Alarm: PSPR/PCACHE Uncorrectable error detection.
IfxSmu_Alarm_CPU2_PSPRPCACHE_MiscellaneousErrorDetection | ALM2[8] : Safety Mechanism: SRAM Monitor Alarm: PSPR/PCACHE Miscellaneous error detection.
IfxSmu_Alarm_CPU2_DSPRDCACHEDLMU_SingleBitErrorCorrection | ALM2[9] : Safety Mechanism: SRAM Monitor Alarm: DSPR/DCACHE/DLMU Single bit error correction.
IfxSmu_Alarm_CPU2_DSPRDCACHEDLMU_UncorrectableErrorDetection | ALM2[10] : Safety Mechanism(s): SRAM Monitor Alarm: DSPR/DCACHE/DLMU Uncorrectable error detection.
IfxSmu_Alarm_CPU2_DSPRDCACHEDLMU_MiscellaneousErrorDetection | ALM2[11] : Safety Mechanism(s): SRAM Monitor Alarm: DSPR/DCACHE/DLMU Miscellaneous error detection.
IfxSmu_Alarm_CPU2_DCACHETAG_SingleBitErrorCorrection | ALM2[12] : Safety Mechanism: SRAM Monitor Alarm: DCACHE TAG Single bit error correction.
IfxSmu_Alarm_CPU2_DCACHETAG_UncorrectableErrorDetection | ALM2[13] : Safety Mechanism: SRAM Monitor Alarm: DCACHE TAG Uncorrectable error detection.
IfxSmu_Alarm_CPU2_DCACHETAG_MiscellaneousErrorDetection | ALM2[14] : Safety Mechanism: SRAM Monitor Alarm: DCACHE TAG Miscellaneous error detection.
IfxSmu_Alarm_CPU2_CPU_InstructionFetchSriInterfaceEdcError | ALM2[22] : Safety Mechanism: SRI End-to-End EDC Alarm: CPU Instruction Fetch SRI Interface EDC Error.
IfxSmu_Alarm_CPU2_CPU_DataSriInterfaceLoadStoreEdcError | ALM2[23] : Safety Mechanism: SRI End-to-End EDC Alarm: CPU Data SRI Interface (Load/Store) EDC Error.
IfxSmu_Alarm_CPU2_CPU_ExceptionInterruptTrap | ALM2[24] : Safety Mechanism: Exception Monitor Alarm: CPU exception (interrupt/trap)
IfxSmu_Alarm_CPU3_Lockstep_ComparatorError | ALM3[0] : Safety Mechanism: Lockstep CPU Alarm: Lockstep Comparator Error.
IfxSmu_Alarm_CPU3_Buslevel_MpuViolation | ALM3[1] : Safety Mechanism: Bus-level Memory Protection Unit Alarm: Bus-level MPU violation.
IfxSmu_Alarm_CPU3_PFI3_PFLASH3_ReadPathError | ALM3[2] : Safety Mechanism: PFLASH Read Path Monitor Alarm: PFLASH3 Read Path Error.
IfxSmu_Alarm_CPU3_PCACHETAG_UncorrectableErrorDetection | ALM3[4] : Safety Mechanism: SRAM Monitor Alarm: PCACHE TAG Uncorrectable error detection.
IfxSmu_Alarm_CPU3_PCACHETAG_MiscellaneousErrorDetection | ALM3[5] : Safety Mechanism: SRAM Monitor Alarm: PCACHE TAG Miscellaneous error detection.
IfxSmu_Alarm_CPU3_PSPRPCACHE_SingleBitErrorCorrection | ALM3[6] : Safety Mechanism: SRAM Monitor Alarm: PSPR/PCACHE Single bit error correction.
IfxSmu_Alarm_CPU3_PSPRPCACHE_UncorrectableErrorDetection | ALM3[7] : Safety Mechanism: SRAM Monitor Alarm: PSPR/PCACHE Uncorrectable error detection.
IfxSmu_Alarm_CPU3_PSPRPCACHE_MiscellaneousErrorDetection | ALM3[8] : Safety Mechanism: SRAM Monitor Alarm: PSPR/PCACHE Miscellaneous error detection.
IfxSmu_Alarm_CPU3_DSPRDCACHEDLMU_SingleBitErrorCorrection | ALM3[9] : Safety Mechanism: SRAM Monitor Alarm: DSPR/DCACHE/DLMU Single bit error correction.
IfxSmu_Alarm_CPU3_DSPRDCACHEDLMU_UncorrectableErrorDetection | ALM3[10] : Safety Mechanism(s): SRAM Monitor Alarm: DSPR/DCACHE/DLMU Uncorrectable error detection.
IfxSmu_Alarm_CPU3_DSPRDCACHEDLMU_MiscellaneousErrorDetection | ALM3[11] : Safety Mechanism(s): SRAM Monitor Alarm: DSPR/DCACHE/DLMU Miscellaneous error detection.
IfxSmu_Alarm_CPU3_DCACHETAG_SingleBitErrorCorrection | ALM3[12] : Safety Mechanism: SRAM Monitor Alarm: DCACHE TAG Single bit error correction.
IfxSmu_Alarm_CPU3_DCACHETAG_UncorrectableErrorDetection | ALM3[13] : Safety Mechanism: SRAM Monitor Alarm: DCACHE TAG Uncorrectable error detection.
IfxSmu_Alarm_CPU3_DCACHETAG_MiscellaneousErrorDetection | ALM3[14] : Safety Mechanism: SRAM Monitor Alarm: DCACHE TAG Miscellaneous error detection.
IfxSmu_Alarm_CPU3_CPU_InstructionFetchSriInterfaceEdcError | ALM3[22] : Safety Mechanism: SRI End-to-End EDC Alarm: CPU Instruction Fetch SRI Interface EDC Error.
IfxSmu_Alarm_CPU3_CPU_DataSriInterfaceLoadStoreEdcError | ALM3[23] : Safety Mechanism: SRI End-to-End EDC Alarm: CPU Data SRI Interface (Load/Store) EDC Error.
IfxSmu_Alarm_CPU3_CPU_ExceptionInterruptTrap | ALM3[24] : Safety Mechanism: Exception Monitor Alarm: CPU exception (interrupt/trap)
IfxSmu_Alarm_MTU_Safety_FfUncorrectableErrorDetected | ALM6[0] : Safety Mechanism: Safety FlipFlop Alarm: Safety FF uncorrectable error detected.
IfxSmu_Alarm_IOM_Safety_FfUncorrectableErrorDetected | ALM6[1] : Safety Mechanism: Safety FlipFlop Alarm: Safety FF uncorrectable error detected.
IfxSmu_Alarm_IR_Safety_FfUncorrectableErrorDetected | ALM6[2] : Safety Mechanism: Safety FlipFlop Alarm: Safety FF uncorrectable error detected.
IfxSmu_Alarm_EMEM_Safety_FfUncorrectableErrorDetected | ALM6[3] : Safety Mechanism: Safety FlipFlop Alarm: Safety FF uncorrectable error detected.
IfxSmu_Alarm_SCU_Safety_FfUncorrectableErrorDetected | ALM6[4] : Safety Mechanism: Safety FlipFlop Alarm: Safety FF uncorrectable error detected.
IfxSmu_Alarm_PMS_Safety_FfUncorrectableErrorDetected | ALM6[5] : Safety Mechanism: Safety FlipFlop Alarm: Safety FF uncorrectable error detected.
IfxSmu_Alarm_DMA_Safety_FfUncorrectableErrorDetected | ALM6[6] : Safety Mechanism: Safety FlipFlop Alarm: Safety FF uncorrectable error detected.
IfxSmu_Alarm_SMU_core_Safety_FfUncorrectableErrorDetected | ALM6[7] : Safety Mechanism: Safety FlipFlop Alarm: Safety FF uncorrectable error detected.
IfxSmu_Alarm_SYS_PLL_PER_PLL_Safety_FfUncorrectableErrorDetected | ALM6[8] : Safety Mechanism: Safety FlipFlop Alarm: Safety FF uncorrectable error detected.
IfxSmu_Alarm_GTM_GTM_SingleBitErrorCorrection | ALM6[10] : Safety Mechanism: SRAM Monitor Alarm: GTM Single bit error correction.
IfxSmu_Alarm_GTM_GTM_UncorrectableErrorDetection | ALM6[11] : Safety Mechanism: SRAM Monitor Alarm: GTM Uncorrectable error detection.
IfxSmu_Alarm_GTM_GTM_MiscellaneousErrorDetection | ALM6[12] : Safety Mechanism: SRAM Monitor Alarm: GTM Miscellaneous error detection.
IfxSmu_Alarm_ERAY_ERAY_SingleBitErrorCorrection | ALM6[13] : Safety Mechanism: SRAM Monitor Alarm: ERAY Single bit error correction.
IfxSmu_Alarm_ERAY_ERAY_UncorrectableErrorDetection | ALM6[14] : Safety Mechanism: SRAM Monitor Alarm: ERAY Uncorrectable error detection.
IfxSmu_Alarm_ERAY_ERAY_MiscellaneousErrorDetection | ALM6[15] : Safety Mechanism: SRAM Monitor Alarm: ERAY Miscellaneous error detection.
IfxSmu_Alarm_CAN_CAN_SingleBitErrorCorrection | ALM6[16] : Safety Mechanism: SRAM Monitor Alarm: CAN Single bit error correction.
IfxSmu_Alarm_CAN_CAN_UncorrectableErrorDetection | ALM6[17] : Safety Mechanism: SRAM Monitor Alarm: CAN Uncorrectable error detection.
IfxSmu_Alarm_CAN_CAN_MiscellaneousErrorDetection | ALM6[18] : Safety Mechanism: SRAM Monitor Alarm: CAN Miscellaneous error detection.
IfxSmu_Alarm_Misc_MISC_SingleBitErrorCorrection | ALM6[19] : Safety Mechanism: SRAM Monitor Alarm: MISC Single bit error correction.
IfxSmu_Alarm_Misc_MISC_UncorrectableErrorDetection | ALM6[20] : Safety Mechanism: SRAM Monitor Alarm: MISC Uncorrectable error detection.
IfxSmu_Alarm_Misc_MISC_MiscellaneousErrorDetection | ALM6[21] : Safety Mechanism: SRAM Monitor Alarm: MISC Miscellaneous error detection.
IfxSmu_Alarm_CERBERUS_Safety_FfUncorrectableErrorDetected | ALM6[23] : Safety Mechanism: Safety FlipFlop Alarm: Safety FF uncorrectable error detected.
IfxSmu_Alarm_CCU_Safety_FfCorrectableErrorDetected | ALM6[24] : Safety Mechanism: Safety FlipFlop Alarm: Safety FF correctable error detected.
IfxSmu_Alarm_CCU_Safety_FfUncorrectableErrorDetected | ALM6[25] : Safety Mechanism: Safety FlipFlop Alarm: Safety FF uncorrectable error detected.
IfxSmu_Alarm_LMU_FSI_RAM_LMUDMU_SingleBitErrorCorrection | ALM7[0] : Safety Mechanism: SRAM Monitor Alarm: LMU/DMU Single bit error correction.
IfxSmu_Alarm_LMU_FSI_RAM_LMUDMU_UncorrectableErrorDetection | ALM7[1] : Safety Mechanism: SRAM Monitor Alarm: LMU/DMU Uncorrectable error detection.
IfxSmu_Alarm_LMU_FSI_RAM_LMUDMU_MiscellaneousErrorDetection | ALM7[2] : Safety Mechanism: SRAM Monitor Alarm: LMU/DMU Miscellaneous error detection.
IfxSmu_Alarm_LMU_Lockstep_ComparatorError | ALM7[12] : Safety Mechanism: LMU Lockstep Alarm: Lockstep Comparator Error.
IfxSmu_Alarm_LMU_Lockstep_ControlError | ALM7[13] : Safety Mechanism: LMU Lockstep Alarm: Lockstep Control Error.
IfxSmu_Alarm_LMU_ECC_Error | ALM7[14] : Safety Mechanism: SRAM ECC Monitor Alarm: ECC Error.
IfxSmu_Alarm_LMU_Buslevel_MpuError | ALM7[15] : Safety Mechanism: Bus-level MPU Alarm: Bus-level MPU error.
IfxSmu_Alarm_LMU_EDC_ReadPhaseError | ALM7[16] : Safety Mechanism: LMU Error Detection Code (EDC) Alarm: EDC Read Phase Error.
IfxSmu_Alarm_XBAR0_SRI_BusErrorEvent | ALM7[17] : Safety Mechanism: Built-in SRI Error Detection Alarm: SRI Bus Error Event.
IfxSmu_Alarm_XBAR1_SRI_BusErrorEvent | ALM7[18] : Safety Mechanism: Built-in SRI Error Detection Alarm: SRI Bus Error Event.
IfxSmu_Alarm_XBAR2_SRI_BusErrorEvent | ALM7[19] : Safety Mechanism: Built-in SRI Error Detection Alarm: SRI Bus Error Event.
IfxSmu_Alarm_SPB_BusErrorEvent | ALM7[20] : Safety Mechanism: Built-in SPB Error Detection Alarm: SPB Bus Error Event.
IfxSmu_Alarm_BBB_BusErrorEvent | ALM7[21] : Safety Mechanism: Built-in BBB Error Detection Alarm: BBB Bus Error Event.
IfxSmu_Alarm_FSI_PFlash_SingleBitError | ALM7[22] : Safety Mechanism: PFlash ECC Alarm: PFlash Single Bit Error.
IfxSmu_Alarm_FSI_PFlash_DoubleBitError | ALM7[23] : Safety Mechanism: PFlash ECC Alarm: PFlash Double Bit Error.
IfxSmu_Alarm_FSI_Single_BitCorrectionTrackingBufferFull | ALM7[24] : Safety Mechanism: PFlash ECC Alarm: Single Bit Correction Tracking Buffer Full.
IfxSmu_Alarm_FSI_Double_BitCorrectionTrackingBufferFull | ALM7[25] : Safety Mechanism: PFlash ECC Alarm: Double Bit Correction Tracking Buffer Full.
IfxSmu_Alarm_FSI_Multiple_BitErrorDetectionTrackingBufferFull | ALM7[26] : Safety Mechanism: PFlash ECC Alarm: Multiple Bit Error Detection Tracking Buffer Full.
IfxSmu_Alarm_FSI_Zero_BitErrorTrackingBufferFull | ALM7[27] : Safety Mechanism: PFlash ECC Alarm: Zero Bit Error Tracking Buffer Full.
IfxSmu_Alarm_FSI_PFlash_EccError | ALM7[28] : Safety Mechanism: PFlash ECC Monitor Alarm: PFlash ECC Error.
IfxSmu_Alarm_FSI_PFlash_EdcError | ALM7[29] : Safety Mechanism: PFlash EDC Monitor Alarm: PFlash EDC Error.
IfxSmu_Alarm_FSI_CPUFLASHCON_ConfigurationError | ALM7[30] : Safety Mechanism: PFlash Configuration Monitor Alarm: CPU FLASHCON Configuration Error.
IfxSmu_Alarm_FSI_Flash_StoredConfigurationError | ALM7[31] : Safety Mechanism: PFlash Configuration Monitor Alarm: Flash Stored Configuration Error.
IfxSmu_Alarm_SCU_OS_CClockFrequencyOutOfRange | ALM8[0] : Safety Mechanism: Clock Monitor Alarm: OSC clock frequency out of range.
IfxSmu_Alarm_CCU_Backup_ClockOutOfRangeAlarm | ALM8[1] : Safety Mechanism: Clock Monitor Alarm: Back-up clock out-of-range alarm.
IfxSmu_Alarm_CCU_Backup_ClockAliveAlarm | ALM8[2] : Safety Mechanism: Clock Alive Monitor Alarm: Back-up clock alive alarm.
IfxSmu_Alarm_SCU_System_PllDcoLossOfLockEvent | ALM8[3] : Safety Mechanism: PLL loss of lock detection Alarm: System PLL DCO loss of lock event.
IfxSmu_Alarm_SCU_Peripheral_PllDcoLossOfLockEvent | ALM8[4] : Safety Mechanism: PLL loss of lock detection Alarm: Peripheral PLL DCO loss of lock event.
IfxSmu_Alarm_SCU_LBIST_Alarm | ALM8[5] : Safety Mechanism: LBIST Safe Reset State Alarm: LBIST Alarm.
IfxSmu_Alarm_SCU_External_RequestUnitAlarm0 | ALM8[6] : Safety Mechanism: External Alarm Alarm: External Request Unit Alarm 0.
IfxSmu_Alarm_SCU_External_RequestUnitAlarm1 | ALM8[7] : Safety Mechanism: External Alarm Alarm: External Request Unit Alarm 1.
IfxSmu_Alarm_SCU_External_RequestUnitAlarm2 | ALM8[8] : Safety Mechanism: External Alarm Alarm: External Request Unit Alarm 2.
IfxSmu_Alarm_SCU_External_RequestUnitAlarm3 | ALM8[9] : Safety Mechanism: External Alarm Alarm: External Request Unit Alarm 3.
IfxSmu_Alarm_SCU_CPU0_WatchdogTimeOut | ALM8[10] : Safety Mechanism: Watchdog Alarm: CPU0 Watchdog time-out.
IfxSmu_Alarm_SCU_CPU1_WatchdogTimeOut | ALM8[11] : Safety Mechanism: Watchdog Alarm: CPU1 Watchdog time-out.
IfxSmu_Alarm_SCU_CPU2_WatchdogTimeOut | ALM8[12] : Safety Mechanism: Watchdog Alarm: CPU2 Watchdog time-out.
IfxSmu_Alarm_SCU_CPU3_WatchdogTimeOut | ALM8[13] : Safety Mechanism: Watchdog Alarm: CPU3 Watchdog time-out.
IfxSmu_Alarm_SCU_Safety_WatchdogTimeOut | ALM8[16] : Safety Mechanism: Watchdog Alarm: Safety Watchdog time-out.
IfxSmu_Alarm_SCU_Watchdog_TimeOut | ALM8[17] : Safety Mechanism: All Watchdogs Alarm: watchdog time-out.
IfxSmu_Alarm_SCU_Lockstep_DualRailError | ALM8[18] : Safety Mechanism: Lockstep Dual Rail Monitor Alarm: dual rail error.
IfxSmu_Alarm_SCU_External_EmergencyStopSignalEvent | ALM8[19] : Safety Mechanism: Emergency Stop Alarm: External Emergency Stop Signal Event.
IfxSmu_Alarm_SCU_Pad_HeatingAlarm | ALM8[20] : Safety Mechanism: Pad Monitor Alarm: Pad heating alarm.
IfxSmu_Alarm_SCU_LBIST_TestModeAlarm | ALM8[21] : Safety Mechanism: LBIST Test Mode Alarm: LBIST Test Mode Alarm.
IfxSmu_Alarm_IR_EDC_ConfigurationDataPathError | ALM8[22] : Safety Mechanism: Interrupt Monitor Alarm: EDC Configuration Data Path Error.
IfxSmu_Alarm_DMA_DMASRI_EccError | ALM8[23] : Safety Mechanism: DMA SRI ECC Alarm: DMA SRI ECC Error.
IfxSmu_Alarm_IOM_Pin_MismatchIndication | ALM8[25] : Safety Mechanism: External Alarm Alarm: Pin Mismatch Indication.
IfxSmu_Alarm_SCU_External_RequestUnitAlarm4 | ALM8[26] : Safety Mechanism: External Alarm Alarm: External Request Unit Alarm 4.
IfxSmu_Alarm_SCU_External_RequestUnitAlarm5 | ALM8[27] : Safety Mechanism: External Alarm Alarm: External Request Unit Alarm 5.
IfxSmu_Alarm_SCU_External_RequestUnitAlarm6 | ALM8[28] : Safety Mechanism: External Alarm Alarm: External Request Unit Alarm 6.
IfxSmu_Alarm_SCU_External_RequestUnitAlarm7 | ALM8[29] : Safety Mechanism: External Alarm Alarm: External Request Unit Alarm 7.
IfxSmu_Alarm_DTS_core_Under_TemperatureAlarm | ALM8[30] : Safety Mechanism: Core Domain Die Temperature Sensor Alarm: Under Temperature Alarm.
IfxSmu_Alarm_DTS_core_Over_TemperatureAlarm | ALM8[31] : Safety Mechanism: Core Domain Die Temperature Sensor Alarm: Over Temperature Alarm.
IfxSmu_Alarm_DTS_Temperature_Overflow | ALM9[0] : Safety Mechanism: Die Temperature Sensor Alarm: Temperature overflow.
IfxSmu_Alarm_DTS_Temperature_Underflow | ALM9[1] : Safety Mechanism: Die Temperature Sensor Alarm: Temperature underflow.
IfxSmu_Alarm_EVR_Overvoltage_Alarm | ALM9[3] : Safety Mechanism: Voltage Monitor Alarm: Over-voltage Alarm.
IfxSmu_Alarm_EVR_Undervoltage_Alarm | ALM9[5] : Safety Mechanism: Voltage Monitor Alarm: Under-voltage Alarm.
IfxSmu_Alarm_EVR_Short_ToLowHightAlarm | ALM9[15] : Safety Mechanism: Voltage Monitor Alarm: Short to low/hight Alarm.
IfxSmu_Alarm_HSM_Overvoltage_Alarm | ALM9[16] : Safety Mechanism: Voltage Monitor Alarm: Over-voltage Alarm.
IfxSmu_Alarm_HSM_Undervoltage_Alarm | ALM9[17] : Safety Mechanism: Voltage Monitor Alarm: Under-voltage Alarm.
IfxSmu_Alarm_EMEM_Unexpected_WriteToEmemAlarm | ALM9[20] : Safety Mechanism: EMEM Monitor Alarm: Unexpected Write to EMEM Alarm.
IfxSmu_Alarm_EMEM_SEP_ControlLogicAlarm | ALM9[21] : Safety Mechanism: SEP Control Logic Monitor Alarm: SEP Control Logic Alarm.
IfxSmu_Alarm_EMEM_Lockstep_ControlLogicInputAlarm | ALM9[22] : Safety Mechanism: Lockstep Control Logic Input Monitor Alarm: Lockstep Control Logic Input Alarm.
IfxSmu_Alarm_Software_Alarm0 | ALM10[0] : Safety Mechanism: Software Monitor Alarm: Software Alarm 0.
IfxSmu_Alarm_Software_Alarm1 | ALM10[1] : Safety Mechanism: Software Monitor Alarm: Software Alarm 1.
IfxSmu_Alarm_Software_Alarm2 | ALM10[2] : Safety Mechanism: Software Monitor Alarm: Software Alarm 2.
IfxSmu_Alarm_Software_Alarm3 | ALM10[3] : Safety Mechanism: Software Monitor Alarm: Software Alarm 3.
IfxSmu_Alarm_Software_Alarm4 | ALM10[4] : Safety Mechanism: Software Monitor Alarm: Software Alarm 4.
IfxSmu_Alarm_Software_Alarm5 | ALM10[5] : Safety Mechanism: Software Monitor Alarm: Software Alarm 5.
IfxSmu_Alarm_Software_Alarm6 | ALM10[6] : Safety Mechanism: Software Monitor Alarm: Software Alarm 6.
IfxSmu_Alarm_Software_Alarm7 | ALM10[7] : Safety Mechanism: Software Monitor Alarm: Software Alarm 7.
IfxSmu_Alarm_Software_Alarm8 | ALM10[8] : Safety Mechanism: Software Monitor Alarm: Software Alarm 8.
IfxSmu_Alarm_Software_Alarm9 | ALM10[9] : Safety Mechanism: Software Monitor Alarm: Software Alarm 9.
IfxSmu_Alarm_Software_Alarm10 | ALM10[10] : Safety Mechanism: Software Monitor Alarm: Software Alarm 10.
IfxSmu_Alarm_Software_Alarm11 | ALM10[11] : Safety Mechanism: Software Monitor Alarm: Software Alarm 11.
IfxSmu_Alarm_Software_Alarm12 | ALM10[12] : Safety Mechanism: Software Monitor Alarm: Software Alarm 12.
IfxSmu_Alarm_Software_Alarm13 | ALM10[13] : Safety Mechanism: Software Monitor Alarm: Software Alarm 13.
IfxSmu_Alarm_Software_Alarm14 | ALM10[14] : Safety Mechanism: Software Monitor Alarm: Software Alarm 14.
IfxSmu_Alarm_Software_Alarm15 | ALM10[15] : Safety Mechanism: Software Monitor Alarm: Software Alarm 15.
IfxSmu_Alarm_SMU_Timer0_TimeOut | ALM10[16] : Safety Mechanism: Recovery Timer 0 Alarm: Timer time-out.
IfxSmu_Alarm_SMU_Timer1_TimeOut | ALM10[17] : Safety Mechanism: Recovery Timer 1 Alarm: Timer time-out.
IfxSmu_Alarm_SMU_Error_PinFaultStateActivation | ALM10[18] : Safety Mechanism: ErrorPin Alarm: Error Pin fault state activation.
IfxSmu_Alarm_SMU_Safety_FfCorrectableErrorDetected | ALM10[20] : Safety Mechanism: Safety FlipFlop Alarm: Safety FF correctable error detected.
IfxSmu_Alarm_SMU_Safety_FfUncorrectableErrorDetected | ALM10[21] : Safety Mechanism: Safety FlipFlop Alarm: Safety FF uncorrectable error detected.
IfxSmu_Alarm_SMU_Access_EnableErrorDetected | ALM10[22] : Safety Mechanism: Access Enable Protection Alarm: Access Enable error detected.
IfxSmu_Alarm_LMU_EDC_AddressPhaseError | ALM11[0] : Safety Mechanism: SRI Error Detection Code (EDC) Alarm: EDC Address Phase Error.
IfxSmu_Alarm_LMU_EDC_WritePhaseError | ALM11[1] : Safety Mechanism: SRI Error Detection Code (EDC) Alarm: EDC Write Phase Error.
IfxSmu_Alarm_XBAR_EDC_AddressPhaseError | ALM11[2] : Safety Mechanism: SRI Error Detection Code (EDC) Alarm: EDC Address Phase Error.
IfxSmu_Alarm_XBAR_EDC_WritePhaseError | ALM11[3] : Safety Mechanism: SRI Error Detection Code (EDC) Alarm: EDC Write Phase Error.
IfxSmu_Alarm_DMU_EDC_AddressPhaseError | ALM11[4] : Safety Mechanism: SRI Error Detection Code (EDC) Alarm: EDC Address Phase Error.
IfxSmu_Alarm_DMU_EDC_WritePhaseError | ALM11[5] : Safety Mechanism: SRI Error Detection Code (EDC) Alarm: EDC Write Phase Error.
IfxSmu_Alarm_SFI_BBB_EDC_AddressPhaseError | ALM11[6] : Safety Mechanism: SRI Error Detection Code (EDC) Alarm: EDC Address Phase Error.
IfxSmu_Alarm_SFI_BBB_EDC_WritePhaseError | ALM11[7] : Safety Mechanism: SRI Error Detection Code (EDC) Alarm: EDC Write Phase Error.
IfxSmu_Alarm_SRI_EDC_ReadPhaseError | ALM11[8] : Safety Mechanism: SRI Error Detection Code (EDC) Alarm: EDC Read Phase Error.
IfxSmu_Alarm_SFI_SPB_EDC_ReadPhaseError | ALM11[9] : Safety Mechanism: SRI Error Detection Code (EDC) Alarm: EDC Read Phase Error.
IfxSmu_Alarm_HSSL_HSSL0EDC_ReadPhaseError | ALM11[10] : Safety Mechanism: SRI Error Detection Code (EDC) Alarm: HSSL0 EDC Read Phase Error.
IfxSmu_Alarm_CONVERTER_Phase_SyncronizerError | ALM11[12] : Safety Mechanism: Converter Alarm: Phase Syncronizer Error.
IfxSmu_Alarm_XBAR_SOTA_SwapError | ALM11[13] : Safety Mechanism: SRI SOTA Monitor Alarm: SOTA Swap Error.

Definition at line 76 of file IfxSmu_cfg.h.


iLLD_TC38A: IfxSmu_PinMap.c File Reference

  • _PinMap
Variables
IfxSmu_PinMap.c File Reference
iLLD » SMU

SMU I/O map. More...

#include "IfxSmu_PinMap.h"
Include dependency graph for IfxSmu_PinMap.c:

Go to the source code of this file.

Variables

IfxSmu_Fsp_Out | IfxSmu_FSP0_P33_8_OUT = {&MODULE_SMU, {&MODULE_P33, 8}, IfxPort_OutputIdx_general}
IfxSmu_Fsp_Out | IfxSmu_FSP1_P33_10_OUT = {&MODULE_SMU, {&MODULE_P33,10}, IfxPort_OutputIdx_general}
const IfxSmu_Fsp_Out * | IfxSmu_Fsp_Out_pinTable [IFXSMU_PINMAP_NUM_MODULES][IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS]

Detailed Description

SMU I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxSmu_PinMap.c.

Variable Documentation

◆ IfxSmu_FSP0_P33_8_OUT

IfxSmu_Fsp_Out IfxSmu_FSP0_P33_8_OUT = {&MODULE_SMU, {&MODULE_P33, 8}, IfxPort_OutputIdx_general}

Definition at line 45 of file IfxSmu_PinMap.c.

◆ IfxSmu_FSP1_P33_10_OUT

IfxSmu_Fsp_Out IfxSmu_FSP1_P33_10_OUT = {&MODULE_SMU, {&MODULE_P33,10}, IfxPort_OutputIdx_general}

Definition at line 46 of file IfxSmu_PinMap.c.

◆ IfxSmu_Fsp_Out_pinTable

const IfxSmu_Fsp_Out* IfxSmu_Fsp_Out_pinTable[IFXSMU_PINMAP_NUM_MODULES][IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxSmu_FSP0_P33_8_OUT,
&IfxSmu_FSP1_P33_10_OUT
}
}
IfxSmu_FSP1_P33_10_OUT
IfxSmu_Fsp_Out IfxSmu_FSP1_P33_10_OUT
Definition: IfxSmu_PinMap.c:46
IfxSmu_FSP0_P33_8_OUT
IfxSmu_Fsp_Out IfxSmu_FSP0_P33_8_OUT
Definition: IfxSmu_PinMap.c:45

Definition at line 49 of file IfxSmu_PinMap.c.


iLLD_TC38A: IfxSmu_PinMap.h File Reference

  • _PinMap
Data Structures | Macros | Variables
IfxSmu_PinMap.h File Reference
iLLD » SMU

SMU I/O map. More...

#include <IfxSmu_reg.h>
#include <Port/Std/IfxPort.h>
Include dependency graph for IfxSmu_PinMap.h:

Go to the source code of this file.

Data Structures

struct IfxSmu_Fsp_Out
Fault Signal Protocol Pin. More...

Macros

#define | IFXSMU_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS 2

Variables

IFX_EXTERN IfxSmu_Fsp_Out IfxSmu_FSP0_P33_8_OUT
FSP[1..0] Output Signals - Generated by SMU_core. More...
IFX_EXTERN IfxSmu_Fsp_Out IfxSmu_FSP1_P33_10_OUT
FSP[1..0] Output Signals - Generated by SMU_core. More...
IFX_EXTERN const IfxSmu_Fsp_Out * IfxSmu_Fsp_Out_pinTable [IFXSMU_PINMAP_NUM_MODULES][IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS]
IfxSmu_Fsp_Out table. More...

Detailed Description

SMU I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxSmu_PinMap.h.


iLLD_TC38A: IfxSmu_Smu.h File Reference

  • Smu
  • Smu
Data Structures | Functions
IfxSmu_Smu.h File Reference
iLLD » SMU

SMU SMU details. More...

#include "Smu/Std/IfxSmu.h"
#include "_Impl/IfxSmu_cfg.h"
Include dependency graph for IfxSmu_Smu.h:

Go to the source code of this file.

Data Structures

struct | IfxSmu_Smu_AlarmGlobalConfiguration
Alarm Global Configuration. More...
struct | IfxSmu_Smu_FaultSignalingProtocol
FSP configuration. More...
struct | IfxSmu_Smu_RecoveryTimerAlarmConfiguration
Recovery Timer/s Alarm Configuration. More...
struct | IfxSmu_Smu_RecoveryTimerConfig
Recovery Timer Configuration. More...
struct | IfxSmu_Smu_Config

Functions

IFX_EXTERN void | IfxSmu_Smu_initModuleConfig (IfxSmu_Smu_Config *config)
Fills the configuration stucture of the SMU Module with default values. More...
IFX_EXTERN void | IfxSmu_Smu_initModule (IfxSmu_Smu_Config *config)
Initialises the SMU Module. More...
IFX_EXTERN boolean | IfxSmu_Smu_isAlarmTriggered (void)
Check if any alarm is Triggered. More...

Detailed Description

SMU SMU details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxSmu_Smu.h.


iLLD_TC38A: IfxSmu.h File Reference

  • Smu
  • Std
Macros | Enumerations | Functions
IfxSmu.h File Reference
iLLD » SMU

SMU basic functionality. More...

#include "_Impl/IfxSmu_cfg.h"
#include "IfxSmu_reg.h"
#include "Scu/Std/IfxScuWdt.h"
#include "_Utilities/Ifx_Assert.h"
#include "IfxSrc_reg.h"
Include dependency graph for IfxSmu.h:

Go to the source code of this file.

Macros

#define | IFXSMU_START_ALIVE_TEST_ARG (5)
Argument to start Alive test. More...
#define | IFXSMU_STOP_ALIVE_TEST_ARG (0xA)
Argument to stop Alive test. More...

Enumerations

enum IfxSmu_Command {
IfxSmu_Command_start = 0,
IfxSmu_Command_activateFSP = 1,
IfxSmu_Command_releaseFSP = 2,
IfxSmu_Command_activatePES = 3,
IfxSmu_Command_stopRT = 4,
IfxSmu_Command_alarmStatusClear = 5,
IfxSmu_Command_triggerAlarm = 6,
IfxSmu_Command_aliveTest = 7
}
Command interface. More...
enum IfxSmu_FspMode {
IfxSmu_FspMode_BiStableProtocol = 0,
IfxSmu_FspMode_dualRailProtocol = 1,
IfxSmu_FspMode_TimeSwitchingProtocol = 2
}
Fault Signaling Protocol configuration. More...
enum IfxSmu_FspPrescalar1 {
IfxSmu_FspPrescalar1_referenceClockDiv2 = 0,
IfxSmu_FspPrescalar1_referenceClockDiv4 = 1,
IfxSmu_FspPrescalar1_referenceClockDiv8 = 2,
IfxSmu_FspPrescalar1_referenceClockDiv16 = 3,
IfxSmu_FspPrescalar1_referenceClockDiv32 = 4,
IfxSmu_FspPrescalar1_referenceClockDiv64 = 5,
IfxSmu_FspPrescalar1_referenceClockDiv128 = 6,
IfxSmu_FspPrescalar1_referenceClockDiv256 = 7
}
Dividing factor to apply to the reference clock fBACK. The divided clock is used as reference to generate the timing of the fault signaling protocol fault state. More...
enum IfxSmu_FspPrescalar2 {
IfxSmu_FspPrescalar2_referenceClockDiv512 = 0,
IfxSmu_FspPrescalar2_referenceClockDiv1024 = 1,
IfxSmu_FspPrescalar2_referenceClockDiv2048 = 2,
IfxSmu_FspPrescalar2_referenceClockDiv4096 = 3
}
Dividing factor to apply to the reference clock fBACK in order to generate the timing of the fault free state for the time switching modes of the fault signaling protocol. More...
enum IfxSmu_InternalAlarmAction {
IfxSmu_InternalAlarmAction_disabled = 0,
IfxSmu_InternalAlarmAction_igcs0 = 2,
IfxSmu_InternalAlarmAction_igcs1 = 3,
IfxSmu_InternalAlarmAction_igcs2 = 4,
IfxSmu_InternalAlarmAction_nmi = 5,
IfxSmu_InternalAlarmAction_reset = 6,
IfxSmu_InternalAlarmAction_cpureset = 7
}
enum IfxSmu_InterruptGenerationConfiguration {
IfxSmu_InterruptGenerationConfiguration_0 = 0,
IfxSmu_InterruptGenerationConfiguration_1,
IfxSmu_InterruptGenerationConfiguration_2
}
Interrupt Generation Configuration. More...
enum IfxSmu_InterruptRequest {
IfxSmu_InterruptRequest_0 = 0,
IfxSmu_InterruptRequest_1,
IfxSmu_InterruptRequest_2
}
Interrupt Request. More...
enum IfxSmu_PortControlHwDir {
IfxSmu_PortControlHwDir_fsp0AndFsp1Input = 0,
IfxSmu_PortControlHwDir_fsp0OutputAndFsp1Input = 1,
IfxSmu_PortControlHwDir_fsp0AndFsp1Output = 3
}
Enum for the FSP_DIR output port control direction. More...
enum IfxSmu_PortControlHwEnable {
IfxSmu_PortControlHwEnable_fsp0AndFsp1Disabled = 0,
IfxSmu_PortControlHwEnable_fsp0EnabledAndFsp1Disabled = 1,
IfxSmu_PortControlHwEnable_fsp0AndFsp1Enabled = 3
}
Enum for the FSP_DIR output port control enable. More...
enum IfxSmu_SmuState {
IfxSmu_SmuState_start = 0,
IfxSmu_SmuState_run = 1,
IfxSmu_SmuState_fault = 2,
IfxSmu_SmuState_unspecified = 3
}
Running state of the SMU State Machine. More...
enum IfxSmu_SuspendMode {
IfxSmu_SuspendMode_none = 0,
IfxSmu_SuspendMode_hard = 1,
IfxSmu_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxSmu_AlarmExecutionStatus {
IfxSmu_AlarmExecutionStatus_irq0 = 0,
IfxSmu_AlarmExecutionStatus_irq1 = 1,
IfxSmu_AlarmExecutionStatus_irq2 = 2,
IfxSmu_AlarmExecutionStatus_rst0 = 3,
IfxSmu_AlarmExecutionStatus_rst1 = 4,
IfxSmu_AlarmExecutionStatus_rst2 = 5,
IfxSmu_AlarmExecutionStatus_rst3 = 6,
IfxSmu_AlarmExecutionStatus_rst4 = 7,
IfxSmu_AlarmExecutionStatus_rst5 = 8,
IfxSmu_AlarmExecutionStatus_nmi = 9,
IfxSmu_AlarmExecutionStatus_rst = 10,
IfxSmu_AlarmExecutionStatus_ems = 11,
IfxSmu_AlarmExecutionStatus_irq0aem = 16,
IfxSmu_AlarmExecutionStatus_irq1aem = 17,
IfxSmu_AlarmExecutionStatus_irq2aem = 18,
IfxSmu_AlarmExecutionStatus_rst0aem = 19,
IfxSmu_AlarmExecutionStatus_rst1aem = 20,
IfxSmu_AlarmExecutionStatus_rst2aem = 21,
IfxSmu_AlarmExecutionStatus_rst3aem = 22,
IfxSmu_AlarmExecutionStatus_rst4aem = 23,
IfxSmu_AlarmExecutionStatus_rst5aem = 24,
IfxSmu_AlarmExecutionStatus_nmiaem = 25,
IfxSmu_AlarmExecutionStatus_rstaem = 26,
IfxSmu_AlarmExecutionStatus_emsaem = 27
}
Alarm Executed Status. More...

Functions

IFX_INLINE void | IfxSmu_clearAlarmExecutedStatus (IfxSmu_AlarmExecutionStatus alarmEx)
This function clears SMU alarm exected status of the requested alarm mechanism. More...
IFX_INLINE void | IfxSmu_clearRegMonTestModeEnable (uint8 testModeEnable)
Function clears the Register monitor test mode enable Flag. More...
IFX_INLINE void | IfxSmu_clearRegisterMonitorErrorFlag (uint8 errorFlag)
Function clears the Register Monitor Error Flag (RMEF.EFz). More...
IFX_INLINE void | IfxSmu_clearRegisterMonitorStatus (uint8 statusFlag)
Function clears the Register Monitor status register. More...
IFX_INLINE boolean | IfxSmu_getAlarmExecutedStatus (IfxSmu_AlarmExecutionStatus alarmEx)
The function returns the alarm Executed status of requested alarm mechanism. More...
IFX_INLINE IfxSmu_PortControlHwDir | IfxSmu_getPortControlHwDir (void)
Function returns the Port control hardware direction. More...
IFX_INLINE IfxSmu_PortControlHwEnable | IfxSmu_getPortControlHwEnable (void)
Function returns the Port control hardware enable. More...
IFX_INLINE uint32 | IfxSmu_getRegisterMonitorErrorFlag (void)
Function returns the value ofRegister Monitor Error Flags register. More...
IFX_INLINE uint32 | IfxSmu_getRegisterMonitorStatus (void)
Function returns the value of Register Monitor Self Test Status register. More...
IFX_INLINE boolean | IfxSmu_isModuleSuspended (Ifx_SMU *smu)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxSmu_setPortControlHwEnableAndDir (IfxSmu_PortControlHwEnable portEnable, IfxSmu_PortControlHwDir hwDir)
Function sets the Port control hardware Enable and direction. More...
IFX_INLINE void | IfxSmu_setRegMonTestModeEnable (uint8 testModeEnable)
Function sets the Register monitor test mode enable Flag. More...
IFX_INLINE void | IfxSmu_setSuspendMode (Ifx_SMU *smu, IfxSmu_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_INLINE void | IfxSmu_startAliveTest (void)
This function starts the SMU alive test. More...
IFX_INLINE void | IfxSmu_stopAliveTest (void)
This function Stops the SMU alive test. More...
IFX_INLINE void | IfxSmu_waitForAlarm (IfxSmu_Alarm alarm)
This function waits for SMU alarm to be set and then clears it.. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxSmu_getSrcPointer (IfxSmu_InterruptRequest intRequest)
Returns The SRCR pointer for the selected Interrupt. More...
IFX_EXTERN boolean | IfxSmu_activateFSP (void)
This function activates the FSP to indicate a FAULT state on the error pin to the safe state switching device. More...
IFX_EXTERN boolean | IfxSmu_activateRunState (void)
The function allows to switch the SMU peripheral into the RUN fault-free state as requested by the caller. More...
IFX_EXTERN boolean | IfxSmu_clearAlarmStatus (IfxSmu_Alarm alarm)
This function clears SMU alarm status of the requested alarm. It needs to be called after alarm status is read. More...
IFX_EXTERN void | IfxSmu_configAlarmActionPES (uint8 pesAction)
This function configures the PES feature for internal action. Bit0/1/2/3 - SMU_IGCS0/SMU_IGCS1/SMU_IGCS2/SMU_NMI/SMU_CPU_RESET activates PES correspondingly. More...
IFX_EXTERN void | IfxSmu_enableFaultToRunState (boolean enable)
Enable FAULT to RUN State Transition. More...
IFX_EXTERN void | IfxSmu_enablePortEmergencyStop (boolean enable)
Configure FSP (fault Signalling Protocol) Port Emergency Stop. More...
IFX_EXTERN boolean | IfxSmu_getAlarmAction (IfxSmu_Alarm alarm, IfxSmu_InternalAlarmAction *intAlarmAction)
The function provides the FSP action currently configured for the requested alarm. More...
IFX_EXTERN uint32 | IfxSmu_getAlarmGroupDebugStatus (uint8 alarmGroup)
The function provides the alarm group status from the stored debug registers. More...
IFX_EXTERN boolean | IfxSmu_getAlarmStatus (IfxSmu_Alarm alarm)
The function returns the alarm status of requested alarm. More...
IFX_EXTERN boolean | IfxSmu_getRTMissedEvent (uint8 timerNum)
The function returns if any alarms requiring the requested recovery timer was SET while the recovery timer was running. More...
IFX_EXTERN IfxSmu_SmuState | IfxSmu_getSmuState (void)
The function provides the current state of the SMU. More...
IFX_EXTERN void | IfxSmu_lockConfigRegisters (void)
The function locks the SMU configuration registers to prevent any modification to configuration register content. More...
IFX_EXTERN boolean | IfxSmu_releaseFSP (void)
The function switches the SMU peripheral from the FAULT state to the RUN state. More...
IFX_EXTERN void | IfxSmu_setAlarmAction (IfxSmu_Alarm alarm, IfxSmu_InternalAlarmAction intAlarmAction)
The function sets the alarm action for the desired alarm. More...
IFX_EXTERN boolean | IfxSmu_setAlarmStatus (IfxSmu_Alarm alarm)
The API sets the requested alarm. This function can be used by the user software to trigger SW SMU alarm. During the START state of the SMU, it shall be possible to set any of the alarms. However, during the RUN state, only the SW alarms shall be set. More...
IFX_EXTERN void | IfxSmu_setFspMode (IfxSmu_FspMode mode)
Configure FSP (fault Signalling Protocol) mode. More...
IFX_EXTERN boolean | IfxSmu_stopRT (uint8 timerNum)
The API stops the requested recovery timer unit. More...
IFX_EXTERN boolean | IfxSmu_unlockConfigRegisters (void)
The function unlocks the SMU configuration registers for modification. More...
IFX_EXTERN void | IfxSmu_ConfigureInterruptGeneration (IfxSmu_InterruptGenerationConfiguration config, IfxSmu_InterruptRequest intRequest)
Configures The Interrupt Generation. More...
IFX_EXTERN void | IfxSmu_temporaryLockConfigRegisters (void)
The function temporarily locks the SMU configuration registers for modification. More...

Detailed Description

SMU basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxSmu.h.

Macro Definition Documentation

◆ IFXSMU_START_ALIVE_TEST_ARG

#define IFXSMU_START_ALIVE_TEST_ARG (5)

Argument to start Alive test.

Definition at line 66 of file IfxSmu.h.

Referenced by IfxSmu_startAliveTest().

◆ IFXSMU_STOP_ALIVE_TEST_ARG

#define IFXSMU_STOP_ALIVE_TEST_ARG (0xA)

Argument to stop Alive test.

Definition at line 70 of file IfxSmu.h.

Referenced by IfxSmu_stopAliveTest().

Enumeration Type Documentation

◆ IfxSmu_AlarmExecutionStatus

enum IfxSmu_AlarmExecutionStatus

Alarm Executed Status.

Enumerator
IfxSmu_AlarmExecutionStatus_irq0 | IRQ0 Request Status.
IfxSmu_AlarmExecutionStatus_irq1 | IRQ1 Request Status.
IfxSmu_AlarmExecutionStatus_irq2 | IRQ2 Request Status.
IfxSmu_AlarmExecutionStatus_rst0 | RST0 Request Status.
IfxSmu_AlarmExecutionStatus_rst1 | RST1 Request Status.
IfxSmu_AlarmExecutionStatus_rst2 | RST2 Request Status.
IfxSmu_AlarmExecutionStatus_rst3 | RST3 Request Status.
IfxSmu_AlarmExecutionStatus_rst4 | RST4 Request Status.
IfxSmu_AlarmExecutionStatus_rst5 | RST5 Request Status.
IfxSmu_AlarmExecutionStatus_nmi | NMI Request Status.
IfxSmu_AlarmExecutionStatus_rst | RST Request Status.
IfxSmu_AlarmExecutionStatus_ems | EMS Request Status.
IfxSmu_AlarmExecutionStatus_irq0aem | IRQ0 AEM Request Status.
IfxSmu_AlarmExecutionStatus_irq1aem | IRQ1 AEM Request Status.
IfxSmu_AlarmExecutionStatus_irq2aem | IRQ2 AEM Request Status.
IfxSmu_AlarmExecutionStatus_rst0aem | RST0 AEM Request Status.
IfxSmu_AlarmExecutionStatus_rst1aem | RST1 AEM Request Status.
IfxSmu_AlarmExecutionStatus_rst2aem | RST2 AEM Request Status.
IfxSmu_AlarmExecutionStatus_rst3aem | RST3 AEM Request Status.
IfxSmu_AlarmExecutionStatus_rst4aem | RST4 AEM Request Status.
IfxSmu_AlarmExecutionStatus_rst5aem | RST5 AEM Request Status.
IfxSmu_AlarmExecutionStatus_nmiaem | NMI AEM Request Status.
IfxSmu_AlarmExecutionStatus_rstaem | RST AEM Request Status.
IfxSmu_AlarmExecutionStatus_emsaem | EMS AEM Request Status.

Definition at line 195 of file IfxSmu.h.


iLLD_TC38A: IfxSmuStdby.h File Reference

  • Smu
  • Std
Enumerations | Functions
IfxSmuStdby.h File Reference
iLLD » SMU

SMU basic functionality. More...

#include "_Impl/IfxSmu_cfg.h"
#include "IfxSmu_reg.h"
#include "Scu/Std/IfxScuWdt.h"
#include "_Utilities/Ifx_Assert.h"
#include "IfxPms_reg.h"
Include dependency graph for IfxSmuStdby.h:

Go to the source code of this file.

Enumerations

enum IfxSmuStdby_AlarmStatusClear {
IfxSmuStdby_AlarmStatusClear_disable = 0,
IfxSmuStdby_AlarmStatusClear_enable = 1
}
This bit (CMD_STDBY.B.ASCE) controls if a status flag set in an AGx register upon detection of the alarm event can be cleared by software or not. When ASCE is enabled, software shall write a 1 to bit position in AGx to clear the bit (W1C). When a W1C action takes place the ASCE bit is automatically cleared to 0 by hardware and software shall set the ASCE bit again. 0B SMU_stdby alarm status bits in AGi cannot be cleared. 1B SMU_stdby alarm status bits in AGi can be cleared. More...
enum IfxSmuStdby_AlarmStatusFlag {
IfxSmuStdby_AlarmStatusFlag_noFaultExist = 0,
IfxSmuStdby_AlarmStatusFlag_faultExist = 1
}
Status flag for alarm (AG2i_STDBY.B.SFz) 0B Status flag does not report a fault condition 1B Status flag reports a fault condition. More...
enum IfxSmuStdby_FaultSignalAlarmConfigFlagEvent {
IfxSmuStdby_FaultSignalAlarmConfigFlagEvent_disable = 0,
IfxSmuStdby_FaultSignalAlarmConfigFlagEvent_enable = 1
}
Fault signaling configuration flag (AG2iFSP_STDBY.B.FEz) More...
enum IfxSmuStdby_FspErrorPinFaultState {
IfxSmuStdby_FspErrorPinFaultState_noFault = 0,
IfxSmuStdby_FspErrorPinFaultState_fault = 1
}
Error Pin Fault State Status (AG2i_STDBY.B.FSPERR) More...
enum IfxSmuStdby_FspErrorPinState {
IfxSmuStdby_FspErrorPinState_inactive = 0,
IfxSmuStdby_FspErrorPinState_active = 1
}
SMU_stdby Error pin function to be able set Pin to fault state. (CMD_STDBY.B.FSP0EN or CMD_STDBY.B.FSP1EN) More...
enum IfxSmuStdby_SmuStdbyModuleState {
IfxSmuStdby_SmuStdbyModuleState_disable = 0,
IfxSmuStdby_SmuStdbyModuleState_enable = 1
}
SMU_stdby Module Enable(CMD_STDBY.B.SMUEN) More...

Functions

IFX_INLINE void | IfxSmuStdby_clearSmuStdbyMonBistFlags (void)
This function clears the TSTEN, TSTRUN, TSTDONE, TSTOK, SMUERR and PMSERR flags. More...
IFX_INLINE void | IfxSmuStdby_enableAlarmStatusClear (void)
This function enable / disables he Alarm status clear in the Smu Standby command register . This controls if a status flag set in an AGx register upon detection of the alarm event can be cleared by software or not. When ASCE is enabled, software shall write a 1 to bit position in AGx to clear the bit (W1C). When a W1C action takes place the ASCE bit is automatically cleared to 0 by hardware and software shall set the ASCE bit again. More...
IFX_INLINE void | IfxSmuStdby_enableSmuStdby (IfxSmuStdby_SmuStdbyModuleState enable)
This function enables the Smu Standby module. More...
IFX_INLINE void | IfxSmuStdby_enableSmuStdbyMonBist (void)
This function enables the Smu standby Built-in Self test. More...
IFX_INLINE uint32 | IfxSmuStdby_getSmuStdbyAlarmGroupStatus (uint8 alarmGroup)
Funtion returns Smu Standby Alarm Group status. More...
IFX_INLINE uint32 | IfxSmuStdby_getSmuStdbyAlarmStatus (uint8 alarmGroup, uint8 alarmNum)
Funtion returns Smu Standby Alarm status. More...
IFX_INLINE IfxSmuStdby_SmuStdbyModuleState | IfxSmuStdby_getSmuStdbyModuleStatus (void)
This function returns the SMU standby module status (enabled/disabled). More...
IFX_INLINE boolean | IfxSmuStdby_getSmuStdbyMonBistPmsErrorFlag (void)
This function returns the Smu Stdby BIST PMSERR flag. More...
IFX_INLINE boolean | IfxSmuStdby_getSmuStdbyMonBistSmuErrorFlag (void)
This function returns the Smu Stdby BIST SMUERR flag. More...
IFX_INLINE boolean | IfxSmuStdby_getSmuStdbyMonBistTestDoneFlag (void)
This function returns the Smu Stdby BIST TSTDONE flag. More...
IFX_INLINE boolean | IfxSmuStdby_getSmuStdbyMonBistTestOkFlag (void)
This function returns the Smu Stdby BIST TSTOK flag. More...
IFX_INLINE boolean | IfxSmuStdby_getSmuStdbyMonBistTestRunFlag (void)
This function returns the Smu Stdby BIST TSTRUN flag. More...
IFX_INLINE void | IfxSmuStdby_setFsp0ErrorPinActive (IfxSmuStdby_FspErrorPinState active)
This function sets FSP0 Error pin fault indication function . More...
IFX_INLINE void | IfxSmuStdby_setFsp1ErrorPinActive (IfxSmuStdby_FspErrorPinState active)
This function sets FSP1 Error pin fault indication function. More...
IFX_EXTERN void | IfxSmuStdby_setFaultSignalAGConfigEventFlags (uint8 alarmGroup, uint32 flags)
Function to configure FSP Alarm group functionality. More...
IFX_EXTERN void | IfxSmuStdby_setFaultSignalAlarmConfigEventFlag (uint8 alarmGroup, uint8 alarmNum, IfxSmuStdby_FaultSignalAlarmConfigFlagEvent enable)
Function to configure FSP functionality , FaultSignalAlarmConfigEventFlag (AG2iFSP_STDBY.B.FEz) More...
IFX_EXTERN void | IfxSmuStdby_setSmuStdbyAlarmStatusFlag (uint8 alarmGroup, uint8 alarmNum, IfxSmuStdby_AlarmStatusFlag status)
Function to configure alarm status. (AG2i_STDBY.B.SFz) More...
IFX_EXTERN void | IfxSmuStdby_startSmuStdbyMonBist (void)
This function enables the Smu standby Built-in Self test. More...

Detailed Description

SMU basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxSmuStdby.h.


iLLD_TC38A: SRC

Modules | Files
SRC
iLLD
Collaboration diagram for SRC:

Modules

Implementation
Standard Driver
How to use Service Request Mechanism?

Files

file | IfxSrc_cfg.h
SRC on-chip implementation data.
file | IfxSrc.h
SRC basic functionality.

Detailed Description


iLLD_TC38A: Implementation

Modules
Implementation
iLLD » SRC
Collaboration diagram for Implementation:

Modules

Enumerations

Detailed Description


iLLD_TC38A: Enumerations

Enumerations
Enumerations
iLLD » SRC » Implementation
Collaboration diagram for Enumerations:

Enumerations

enum IfxSrc_Tos {
IfxSrc_Tos_cpu0 = 0,
IfxSrc_Tos_dma = 1,
IfxSrc_Tos_cpu1 = 2,
IfxSrc_Tos_cpu2 = 3,
IfxSrc_Tos_cpu3 = 4
}
Identifier of interrupt service provider, which handles the interrupt service request. More...

Detailed Description

Enumeration Type Documentation

◆ IfxSrc_Tos

enum IfxSrc_Tos

Identifier of interrupt service provider, which handles the interrupt service request.

Enumerator
IfxSrc_Tos_cpu0 | CPU0 interrupt service provider, which handles the interrupt service request.
IfxSrc_Tos_dma | DMA interrupt service provider, which handles the interrupt service request.
IfxSrc_Tos_cpu1 | CPU1 interrupt service provider, which handles the interrupt service request.
IfxSrc_Tos_cpu2 | CPU2 interrupt service provider, which handles the interrupt service request.
IfxSrc_Tos_cpu3 | CPU3 interrupt service provider, which handles the interrupt service request.

Definition at line 66 of file IfxSrc_cfg.h.


iLLD_TC38A: Standard Driver

Modules
Standard Driver
iLLD » SRC
Collaboration diagram for Standard Driver:

Modules

Service Request Functions
Module Functions

Detailed Description


iLLD_TC38A: Service Request Functions

Functions
Service Request Functions
iLLD » SRC » Standard Driver
Collaboration diagram for Service Request Functions:

Functions

IFX_INLINE void | IfxSrc_clearOverrun (volatile Ifx_SRC_SRCR *src)
Resets the overrun flag of the Service Request. More...
IFX_INLINE void | IfxSrc_clearRequest (volatile Ifx_SRC_SRCR *src)
Resets a specific interrupt service by software. More...
IFX_INLINE boolean | IfxSrc_isOverrun (volatile Ifx_SRC_SRCR *src)
Gets the current overrun status. More...
IFX_INLINE boolean | IfxSrc_isRequested (volatile Ifx_SRC_SRCR *src)
Gets the current request status. More...
IFX_INLINE void | IfxSrc_setRequest (volatile Ifx_SRC_SRCR *src)
Requests a specific interrupt service by software. More...

Detailed Description

Function Documentation

◆ IfxSrc_clearOverrun()

IFX_INLINE void IfxSrc_clearOverrun ( volatile Ifx_SRC_SRCR * src )

Resets the overrun flag of the Service Request.

Parameters
src pointer to the Service Request Control register which the overrun flag should be cleared.
Returns
None

Usage example: see IfxSrc_init

Definition at line 241 of file IfxSrc.h.

◆ IfxSrc_clearRequest()

IFX_INLINE void IfxSrc_clearRequest ( volatile Ifx_SRC_SRCR * src )

Resets a specific interrupt service by software.

Parameters
src pointer to the Service Request Control register which the request should be cleared.
Returns
None

Usage example: see IfxSrc_init

Definition at line 247 of file IfxSrc.h.

Referenced by IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), IfxQspi_SpiSlave_write(), and IfxSrc_init().

◆ IfxSrc_isOverrun()

IFX_INLINE boolean IfxSrc_isOverrun ( volatile Ifx_SRC_SRCR * src )

Gets the current overrun status.

Parameters
src pointer to the Service Request Control register for which the overrun status should be returned.
Returns
current service request control overrun status.

Usage example: see IfxSrc_init

Definition at line 279 of file IfxSrc.h.

◆ IfxSrc_isRequested()

IFX_INLINE boolean IfxSrc_isRequested ( volatile Ifx_SRC_SRCR * src )

Gets the current request status.

Parameters
src pointer to the Service Request Control register for which the request status should be returned.
Returns
current service request control request status.

Usage example: see IfxSrc_init

Definition at line 285 of file IfxSrc.h.

◆ IfxSrc_setRequest()

IFX_INLINE void IfxSrc_setRequest ( volatile Ifx_SRC_SRCR * src )

Requests a specific interrupt service by software.

Parameters
src pointer to the Service Request Control register which the interrupt has to be requested.
Returns
None

Usage example: see IfxSrc_init

Definition at line 291 of file IfxSrc.h.


iLLD_TC38A: Module Functions

Functions
Module Functions
iLLD » SRC » Standard Driver
Collaboration diagram for Module Functions:

Functions

IFX_INLINE void | IfxSrc_deinit (volatile Ifx_SRC_SRCR *src)
DeInitializes the service request control register. More...
IFX_INLINE void | IfxSrc_disable (volatile Ifx_SRC_SRCR *src)
Disables a specific interrupt service request. More...
IFX_INLINE void | IfxSrc_enable (volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request. More...
IFX_INLINE void | IfxSrc_init (volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register. More...

Detailed Description

Function Documentation

◆ IfxSrc_deinit()

IFX_INLINE void IfxSrc_deinit ( volatile Ifx_SRC_SRCR * src )

DeInitializes the service request control register.

Parameters
src pointer to the Service Request Control register which should be deinitialised.
Returns
None

Usage example: see IfxSrc_init

Definition at line 253 of file IfxSrc.h.

◆ IfxSrc_disable()

IFX_INLINE void IfxSrc_disable ( volatile Ifx_SRC_SRCR * src )

Disables a specific interrupt service request.

Parameters
src pointer to the Service Request Control register for which the interrupt has to be disabled.
Returns
None

Usage example: see IfxSrc_init

Definition at line 259 of file IfxSrc.h.

◆ IfxSrc_enable()

IFX_INLINE void IfxSrc_enable ( volatile Ifx_SRC_SRCR * src )

Enables a specific interrupt service request.

Parameters
src pointer to the Service Request Control register for which the interrupt has to be enabled.
Returns
None

Usage example: see IfxSrc_init

Definition at line 265 of file IfxSrc.h.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), IfxAsclin_Spi_initModule(), IfxCan_Can_initNode(), IfxCcu6_Icu_initChannel(), IfxCcu6_PwmBc_initModule(), IfxCcu6_Timer_initModule(), IfxCcu6_TimerWithTrigger_init(), IfxCcu6_TPwm_initModule(), IfxDma_Dma_initChannel(), IfxDts_Dts_initModule(), IfxEray_Eray_initModule(), IfxEvadc_Adc_initChannel(), IfxFce_Crc_initModule(), IfxGeth_Eth_configureDMA(), IfxGeth_Eth_configureMTL(), IfxGpt12_IncrEnc_init(), IfxGtm_Atom_Pwm_init(), IfxGtm_Atom_Timer_init(), IfxGtm_Tim_In_init(), IfxGtm_Tom_Pwm_init(), IfxGtm_Tom_Timer_init(), IfxHssl_enableHsctInterrupt(), IfxHssl_enableHsslCOKInterrupt(), IfxHssl_enableHsslERRInterrupt(), IfxHssl_enableHsslEXIInterrupt(), IfxHssl_enableHsslRDIInterrupt(), IfxHssl_enableHsslTRGInterrupt(), IfxI2c_enableDtrInterrupt(), IfxI2c_enableErrorInterrupt(), IfxI2c_enableProtocolInterrupt(), IfxQspi_SpiMaster_initModule(), IfxQspi_SpiSlave_initModule(), IfxSent_Sent_initChannel(), IfxStm_initCompare(), and IfxStm_Timer_init().

◆ IfxSrc_init()

IFX_INLINE void IfxSrc_init | ( | volatile Ifx_SRC_SRCR * | src,
 |  | IfxSrc_Tos | typOfService,
 |  | Ifx_Priority | priority
 | ) |  |

Initializes the service request control register.

Parameters
src | pointer to the Service Request Control register which should be initialised.
typOfService | type of interrupt service provider.
priority | Interrupt priority.
Returns
None

Get the peripheral service control register which request need to be serviced and assign this service to any of service providers.

//define the interrupt priority
#define IFXASCLIN0_TX_INTPRIO 2
//get the service request
volatile Ifx_SRC_SRCR *src = IfxAsclin_getSrcPointerRx( &MODULE_ASCLIN0 );
//initlaise the service request
IfxSrc_init( src, IfxSrc_Tos_cpu0, IFXASCLIN0_TX_INTPRIO );
// enable the service
IfxSrc_enable( src );
//check for service request flags and clear if they occur
if ( IfxSrc_isRequested( src ) == TRUE )
{
IfxSrc_clearRequest( src );
}
if ( IfxSrc_isOverrun( src ) == TRUE )
{
IfxSrc_clearOverrun( src );
}
// Atlast deinitialise the service control
IfxSrc_deinit( src );

Definition at line 271 of file IfxSrc.h.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), IfxAsclin_Spi_initModule(), IfxCan_Can_initNode(), IfxCcu6_Icu_initChannel(), IfxCcu6_PwmBc_initModule(), IfxCcu6_Timer_initModule(), IfxCcu6_TimerWithTrigger_init(), IfxCcu6_TPwm_initModule(), IfxDma_Dma_initChannel(), IfxDts_Dts_initModule(), IfxEray_Eray_initModule(), IfxEvadc_Adc_initChannel(), IfxFce_Crc_initModule(), IfxGeth_Eth_configureDMA(), IfxGeth_Eth_configureMTL(), IfxGpt12_IncrEnc_init(), IfxGtm_Atom_Pwm_init(), IfxGtm_Atom_Timer_init(), IfxGtm_Tim_In_init(), IfxGtm_Tom_Pwm_init(), IfxGtm_Tom_Timer_init(), IfxHssl_enableHsctInterrupt(), IfxHssl_enableHsslCOKInterrupt(), IfxHssl_enableHsslERRInterrupt(), IfxHssl_enableHsslEXIInterrupt(), IfxHssl_enableHsslRDIInterrupt(), IfxHssl_enableHsslTRGInterrupt(), IfxI2c_enableDtrInterrupt(), IfxI2c_enableErrorInterrupt(), IfxI2c_enableProtocolInterrupt(), IfxQspi_SpiMaster_initModule(), IfxQspi_SpiSlave_initModule(), IfxSent_Sent_initChannel(), IfxStm_initCompare(), and IfxStm_Timer_init().


iLLD_TC38A: How to use Service Request Mechanism?

How to use Service Request Mechanism?
iLLD » SRC
Collaboration diagram for How to use Service Request Mechanism?:

For Aurix controller peripherals that can generate service requests is connected to one or more Service Request Nodes (SRNs) in the central Interrupt Router(IR) module. Refer to Controller User Manual for more details
IfxSrc driver provides the APIs to configure and control service requests. Refer How to use Service Request Mechanism? for details of these APIs.

Initialize the Service Request Node

Service request node is initialized to configure the following,
1) Route the interrupt trigger to service provider, which are:
__a. One of the available CPUs or
__b. DMA controller
2) Priority of CPU Interrupt or DMA Trigger.

For Interrupt or DMA to be correctly triggered, following steps are to be done in the user code:

Step1: Configure the Node

User must configure the service request node in the application / driver files.

Step2: Enable the Trigger

Enable the service request node to connect the trigger event from the hardware to service provider.

Example: Following example show the configuration for STM0 Service request 0 trigger configured to trigger CPU1 with the priority specified by IFX_INTPRIO_STM0 (from the example at IfxCpu_Irq)

//file: myApplication.c
#include "Ifx_IntPrioDef.h" // to get the priority numbers
void myDriverInitFunction(void)
{
// driver init code
// Step1: Call the function to route the trigger from for SRC_STM0_SR0 to CPU1
// and priority specified at Ifx_IntPrioDef.h globally
IfxSrc_init(&MODULE_SRC.STM.STM[0].SR[0], IfxSrc_Tos_cpu1, IFX_INTPRIO_STM0);
// Step2: Enable the service request node
IfxSrc_enable(&MODULE_SRC.STM.STM[0].SR[0]);
}


iLLD_TC38A: IfxSrc_cfg.h File Reference

  • _Impl
Enumerations
IfxSrc_cfg.h File Reference
iLLD » SRC

SRC on-chip implementation data. More...

Go to the source code of this file.

Enumerations

enum IfxSrc_Tos {
IfxSrc_Tos_cpu0 = 0,
IfxSrc_Tos_dma = 1,
IfxSrc_Tos_cpu1 = 2,
IfxSrc_Tos_cpu2 = 3,
IfxSrc_Tos_cpu3 = 4
}
Identifier of interrupt service provider, which handles the interrupt service request. More...

Detailed Description

SRC on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxSrc_cfg.h.


iLLD_TC38A: IfxSrc.h File Reference

  • Src
  • Std
Functions
IfxSrc.h File Reference
iLLD » SRC

SRC basic functionality. More...

#include "_Impl/IfxSrc_cfg.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "IfxSrc_reg.h"
Include dependency graph for IfxSrc.h:

Go to the source code of this file.

Functions

IFX_INLINE void | IfxSrc_clearOverrun (volatile Ifx_SRC_SRCR *src)
Resets the overrun flag of the Service Request. More...
IFX_INLINE void | IfxSrc_clearRequest (volatile Ifx_SRC_SRCR *src)
Resets a specific interrupt service by software. More...
IFX_INLINE boolean | IfxSrc_isOverrun (volatile Ifx_SRC_SRCR *src)
Gets the current overrun status. More...
IFX_INLINE boolean | IfxSrc_isRequested (volatile Ifx_SRC_SRCR *src)
Gets the current request status. More...
IFX_INLINE void | IfxSrc_setRequest (volatile Ifx_SRC_SRCR *src)
Requests a specific interrupt service by software. More...
IFX_INLINE void | IfxSrc_deinit (volatile Ifx_SRC_SRCR *src)
DeInitializes the service request control register. More...
IFX_INLINE void | IfxSrc_disable (volatile Ifx_SRC_SRCR *src)
Disables a specific interrupt service request. More...
IFX_INLINE void | IfxSrc_enable (volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request. More...
IFX_INLINE void | IfxSrc_init (volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register. More...

Detailed Description

SRC basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxSrc.h.


iLLD_TC38A: STM

Modules | Files
STM
iLLD
Collaboration diagram for STM:

Modules

Implementation
Standard Driver
How to use the Stm driver?
STM Timer Interface

Files

file | IfxStm_cfg.h
STM on-chip implementation data.
file | IfxStm.h
STM basic functionality.
file | IfxStm_Timer.h
STM TIMER details.

Detailed Description


iLLD_TC38A: Implementation

Modules
Implementation
iLLD » STM
Collaboration diagram for Implementation:

Modules

Enumerations
Global Variables

Detailed Description


iLLD_TC38A: Enumerations

Enumerations
Enumerations
iLLD » STM » Implementation
Collaboration diagram for Enumerations:

Enumerations

enum IfxStm_Index {
IfxStm_Index_none = -1,
IfxStm_Index_0 = 0,
IfxStm_Index_1,
IfxStm_Index_2,
IfxStm_Index_3
}
List of the available STM resources. More...

Detailed Description

Enumeration Type Documentation

◆ IfxStm_Index

enum IfxStm_Index

List of the available STM resources.

Enumerator
IfxStm_Index_none | Not Selected.
IfxStm_Index_0 | STM index 0.
IfxStm_Index_1 | STM index 1.
IfxStm_Index_2 | STM index 2.
IfxStm_Index_3 | STM index 3.

Definition at line 84 of file IfxStm_cfg.h.


iLLD_TC38A: Global Variables

Variables
Global Variables
iLLD » STM » Implementation
Collaboration diagram for Global Variables:

Variables

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxStm_cfg_indexMap [IFXSTM_NUM_MODULES]

Detailed Description

Variable Documentation

◆ IfxStm_cfg_indexMap

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxStm_cfg_indexMap[IFXSTM_NUM_MODULES]

Definition at line 102 of file IfxStm_cfg.h.


iLLD_TC38A: Standard Driver

Modules
Standard Driver
iLLD » STM
Collaboration diagram for Standard Driver:

Modules

Enumerations
Data Structures
Module Functions
Timer Functions
Comparator Functions

Detailed Description


iLLD_TC38A: Enumerations

Enumerations
Enumerations
iLLD » STM » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxStm_Comparator {
IfxStm_Comparator_0 = 0,
IfxStm_Comparator_1
}
Comparator Id defined in MODULE_STMx.ISCR.B.CMP0IRR(x = 0, 1, 2) More...
enum IfxStm_ComparatorInterrupt {
IfxStm_ComparatorInterrupt_ir0 = 0,
IfxStm_ComparatorInterrupt_ir1 = 1
}
Comparator Interrupt request source defined in MODULE_SRC.STM.STM[index].SRx (x =0, 1) More...
enum IfxStm_ComparatorOffset {
IfxStm_ComparatorOffset_0 = 0,
IfxStm_ComparatorOffset_1,
IfxStm_ComparatorOffset_2,
IfxStm_ComparatorOffset_3,
IfxStm_ComparatorOffset_4,
IfxStm_ComparatorOffset_5,
IfxStm_ComparatorOffset_6,
IfxStm_ComparatorOffset_7,
IfxStm_ComparatorOffset_8,
IfxStm_ComparatorOffset_9,
IfxStm_ComparatorOffset_10,
IfxStm_ComparatorOffset_11,
IfxStm_ComparatorOffset_12,
IfxStm_ComparatorOffset_13,
IfxStm_ComparatorOffset_14,
IfxStm_ComparatorOffset_15,
IfxStm_ComparatorOffset_16,
IfxStm_ComparatorOffset_17,
IfxStm_ComparatorOffset_18,
IfxStm_ComparatorOffset_19,
IfxStm_ComparatorOffset_20,
IfxStm_ComparatorOffset_21,
IfxStm_ComparatorOffset_22,
IfxStm_ComparatorOffset_23,
IfxStm_ComparatorOffset_24,
IfxStm_ComparatorOffset_25,
IfxStm_ComparatorOffset_26,
IfxStm_ComparatorOffset_27,
IfxStm_ComparatorOffset_28,
IfxStm_ComparatorOffset_29,
IfxStm_ComparatorOffset_30,
IfxStm_ComparatorOffset_31
}
Comparator start bit position defined in MODULE_STMx.CMCON.B.MSTART0(x = 0,1,2) More...
enum IfxStm_ComparatorSize {
IfxStm_ComparatorSize_1Bit = 0,
IfxStm_ComparatorSize_2Bits = 1,
IfxStm_ComparatorSize_3Bits = 2,
IfxStm_ComparatorSize_4Bits = 3,
IfxStm_ComparatorSize_5Bits = 4,
IfxStm_ComparatorSize_6Bits = 5,
IfxStm_ComparatorSize_7Bits = 6,
IfxStm_ComparatorSize_8Bits = 7,
IfxStm_ComparatorSize_9Bits = 8,
IfxStm_ComparatorSize_10Bits = 9,
IfxStm_ComparatorSize_11Bits = 10,
IfxStm_ComparatorSize_12Bits = 11,
IfxStm_ComparatorSize_13Bits = 12,
IfxStm_ComparatorSize_14Bits = 13,
IfxStm_ComparatorSize_15Bits = 14,
IfxStm_ComparatorSize_16Bits = 15,
IfxStm_ComparatorSize_17Bits = 16,
IfxStm_ComparatorSize_18Bits = 17,
IfxStm_ComparatorSize_19Bits = 18,
IfxStm_ComparatorSize_20Bits = 19,
IfxStm_ComparatorSize_21Bits = 20,
IfxStm_ComparatorSize_22Bits = 21,
IfxStm_ComparatorSize_23Bits = 22,
IfxStm_ComparatorSize_24Bits = 23,
IfxStm_ComparatorSize_25Bits = 24,
IfxStm_ComparatorSize_26Bits = 25,
IfxStm_ComparatorSize_27Bits = 26,
IfxStm_ComparatorSize_28Bits = 27,
IfxStm_ComparatorSize_29Bits = 28,
IfxStm_ComparatorSize_30Bits = 29,
IfxStm_ComparatorSize_31Bits = 30,
IfxStm_ComparatorSize_32Bits = 31
}
Size of compare value to compare with timer defined in MODULE_STMx.CMCON.B.MSIZE0(x = 0,1,2) More...
enum IfxStm_SleepMode {
IfxStm_SleepMode_enable = 0,
IfxStm_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_STM.CLC.B.EDIS. More...
enum IfxStm_SuspendMode {
IfxStm_SuspendMode_none = 0,
IfxStm_SuspendMode_hard = 1,
IfxStm_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...

Detailed Description

Enumeration Type Documentation

◆ IfxStm_Comparator

enum IfxStm_Comparator

Comparator Id defined in MODULE_STMx.ISCR.B.CMP0IRR(x = 0, 1, 2)

Enumerator
IfxStm_Comparator_0 | Comparator Id 0.
IfxStm_Comparator_1 | Comparator Id 1.

Definition at line 157 of file IfxStm.h.

◆ IfxStm_ComparatorInterrupt

enum IfxStm_ComparatorInterrupt

Comparator Interrupt request source defined in MODULE_SRC.STM.STM[index].SRx (x =0, 1)

Enumerator
IfxStm_ComparatorInterrupt_ir0 | Select STMIR0.
IfxStm_ComparatorInterrupt_ir1 | Select STMIR1.

Definition at line 165 of file IfxStm.h.

◆ IfxStm_ComparatorOffset

enum IfxStm_ComparatorOffset

Comparator start bit position defined in MODULE_STMx.CMCON.B.MSTART0(x = 0,1,2)

Enumerator
IfxStm_ComparatorOffset_0 | Comparator start bit position 0 with 64 bit timer.
IfxStm_ComparatorOffset_1 | Comparator start bit position 1 with 64 bit timer.
IfxStm_ComparatorOffset_2 | Comparator start bit position 2 with 64 bit timer.
IfxStm_ComparatorOffset_3 | Comparator start bit position 3 with 64 bit timer.
IfxStm_ComparatorOffset_4 | Comparator start bit position 4 with 64 bit timer.
IfxStm_ComparatorOffset_5 | Comparator start bit position 5 with 64 bit timer.
IfxStm_ComparatorOffset_6 | Comparator start bit position 6 with 64 bit timer.
IfxStm_ComparatorOffset_7 | Comparator start bit position 7 with 64 bit timer.
IfxStm_ComparatorOffset_8 | Comparator start bit position 8 with 64 bit timer.
IfxStm_ComparatorOffset_9 | Comparator start bit position 9 with 64 bit timer.
IfxStm_ComparatorOffset_10 | Comparator start bit position 10 with 64 bit timer.
IfxStm_ComparatorOffset_11 | Comparator start bit position 11 with 64 bit timer.
IfxStm_ComparatorOffset_12 | Comparator start bit position 12 with 64 bit timer.
IfxStm_ComparatorOffset_13 | Comparator start bit position 13 with 64 bit timer.
IfxStm_ComparatorOffset_14 | Comparator start bit position 14 with 64 bit timer.
IfxStm_ComparatorOffset_15 | Comparator start bit position 15 with 64 bit timer.
IfxStm_ComparatorOffset_16 | Comparator start bit position 16 with 64 bit timer.
IfxStm_ComparatorOffset_17 | Comparator start bit position 17 with 64 bit timer.
IfxStm_ComparatorOffset_18 | Comparator start bit position 18 with 64 bit timer.
IfxStm_ComparatorOffset_19 | Comparator start bit position 19 with 64 bit timer.
IfxStm_ComparatorOffset_20 | Comparator start bit position 20 with 64 bit timer.
IfxStm_ComparatorOffset_21 | Comparator start bit position 21 with 64 bit timer.
IfxStm_ComparatorOffset_22 | Comparator start bit position 22 with 64 bit timer.
IfxStm_ComparatorOffset_23 | Comparator start bit position 23 with 64 bit timer.
IfxStm_ComparatorOffset_24 | Comparator start bit position 24 with 64 bit timer.
IfxStm_ComparatorOffset_25 | Comparator start bit position 25 with 64 bit timer.
IfxStm_ComparatorOffset_26 | Comparator start bit position 26 with 64 bit timer.
IfxStm_ComparatorOffset_27 | Comparator start bit position 27 with 64 bit timer.
IfxStm_ComparatorOffset_28 | Comparator start bit position 28 with 64 bit timer.
IfxStm_ComparatorOffset_29 | Comparator start bit position 29 with 64 bit timer.
IfxStm_ComparatorOffset_30 | Comparator start bit position 30 with 64 bit timer.
IfxStm_ComparatorOffset_31 | Comparator start bit position 31 with 64 bit timer.

Definition at line 173 of file IfxStm.h.

◆ IfxStm_ComparatorSize

enum IfxStm_ComparatorSize

Size of compare value to compare with timer defined in MODULE_STMx.CMCON.B.MSIZE0(x = 0,1,2)

Enumerator
IfxStm_ComparatorSize_1Bit | Size of compare value to compare with timer: 1 bit.
IfxStm_ComparatorSize_2Bits | Size of compare value to compare with timer: 2 bits.
IfxStm_ComparatorSize_3Bits | Size of compare value to compare with timer: 3 bits.
IfxStm_ComparatorSize_4Bits | Size of compare value to compare with timer: 4 bits.
IfxStm_ComparatorSize_5Bits | Size of compare value to compare with timer: 5 bits.
IfxStm_ComparatorSize_6Bits | Size of compare value to compare with timer: 6 bits.
IfxStm_ComparatorSize_7Bits | Size of compare value to compare with timer: 7 bits.
IfxStm_ComparatorSize_8Bits | Size of compare value to compare with timer: 8 bits.
IfxStm_ComparatorSize_9Bits | Size of compare value to compare with timer: 9 bits.
IfxStm_ComparatorSize_10Bits | Size of compare value to compare with timer: 10 bits.
IfxStm_ComparatorSize_11Bits | Size of compare value to compare with timer: 11 bits.
IfxStm_ComparatorSize_12Bits | Size of compare value to compare with timer: 12 bits.
IfxStm_ComparatorSize_13Bits | Size of compare value to compare with timer: 13 bits.
IfxStm_ComparatorSize_14Bits | Size of compare value to compare with timer: 14 bits.
IfxStm_ComparatorSize_15Bits | Size of compare value to compare with timer: 15 bits.
IfxStm_ComparatorSize_16Bits | Size of compare value to compare with timer: 16 bits.
IfxStm_ComparatorSize_17Bits | Size of compare value to compare with timer: 17 bits.
IfxStm_ComparatorSize_18Bits | Size of compare value to compare with timer: 18 bits.
IfxStm_ComparatorSize_19Bits | Size of compare value to compare with timer: 19 bits.
IfxStm_ComparatorSize_20Bits | Size of compare value to compare with timer: 20 bits.
IfxStm_ComparatorSize_21Bits | Size of compare value to compare with timer: 21 bits.
IfxStm_ComparatorSize_22Bits | Size of compare value to compare with timer: 22 bits.
IfxStm_ComparatorSize_23Bits | Size of compare value to compare with timer: 23 bits.
IfxStm_ComparatorSize_24Bits | Size of compare value to compare with timer: 24 bits.
IfxStm_ComparatorSize_25Bits | Size of compare value to compare with timer: 25 bits.
IfxStm_ComparatorSize_26Bits | Size of compare value to compare with timer: 26 bits.
IfxStm_ComparatorSize_27Bits | Size of compare value to compare with timer: 27 bits.
IfxStm_ComparatorSize_28Bits | Size of compare value to compare with timer: 28 bits.
IfxStm_ComparatorSize_29Bits | Size of compare value to compare with timer: 29 bits.
IfxStm_ComparatorSize_30Bits | Size of compare value to compare with timer: 30 bits.
IfxStm_ComparatorSize_31Bits | Size of compare value to compare with timer: 31 bits.
IfxStm_ComparatorSize_32Bits | Size of compare value to compare with timer: 32 bits.

Definition at line 211 of file IfxStm.h.

◆ IfxStm_SleepMode

enum IfxStm_SleepMode

Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_STM.CLC.B.EDIS.

Enumerator
IfxStm_SleepMode_enable | enables sleep mode
IfxStm_SleepMode_disable | disables sleep mode

Definition at line 250 of file IfxStm.h.

◆ IfxStm_SuspendMode

enum IfxStm_SuspendMode

OCDS Suspend Control (OCDS.SUS)

Enumerator
IfxStm_SuspendMode_none | No suspend.
IfxStm_SuspendMode_hard | Hard Suspend.
IfxStm_SuspendMode_soft | Soft Suspend.

Definition at line 258 of file IfxStm.h.


iLLD_TC38A: Data Structures

Data Structures
Data Structures
iLLD » STM » Standard Driver
Collaboration diagram for Data Structures:

Data Structures

struct IfxStm_CompareConfig
Comparator Configuration Structure. More...

Detailed Description

Data Structure Documentation

◆ IfxStm_CompareConfig

struct IfxStm_CompareConfig

Comparator Configuration Structure.

Definition at line 275 of file IfxStm.h.

Data Fields
IfxStm_Comparator | comparator | Comparator Id defined in MODULE_STMx.ISCR.B.CMP0IRR(x = 0, 1, 2).
IfxStm_ComparatorInterrupt | comparatorInterrupt | Comparator Interrupt request source defined in MODULE_SRC.STM.STM[index].SRx (x =0, 1).
IfxStm_ComparatorOffset | compareOffset | Comparator start bit position defined in MODULE_STMx.CMCON.B.MSTART0(x = 0,1,2).
IfxStm_ComparatorSize | compareSize | Size of compare value to compare with timer defined in MODULE_STMx.CMCON.B.MSIZE0(x = 0,1,2).
uint32 | ticks | count for next comparison from current timer count.
Ifx_Priority | triggerPriority | Interrupt priority. Range = 0 .. 255. 0 = interrupt is disabled.
IfxSrc_Tos | typeOfService | Type of service.


iLLD_TC38A: Module Functions

Functions
Module Functions
iLLD » STM » Standard Driver
Collaboration diagram for Module Functions:

Functions

IFX_INLINE uint64 | IfxStm_get (Ifx_STM *stm)
Returns system timer value. More...
IFX_INLINE float32 | IfxStm_getFrequency (Ifx_STM *stm)
Returns the system timer frequency. More...
IFX_INLINE boolean | IfxStm_isModuleSuspended (Ifx_STM *stm)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxStm_setSuspendMode (Ifx_STM *stm, IfxStm_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN void | IfxStm_disableModule (Ifx_STM *stm)
Disables the Stm module. More...
IFX_EXTERN void | IfxStm_enableOcdsSuspend (Ifx_STM *stm)
enable suspend by debugger. Note: The API will write into the OCS register only if OCDS is enabled More...
IFX_EXTERN Ifx_STM * | IfxStm_getAddress (IfxStm_Index stm)
Returns the module index of the selected STM module. More...
IFX_EXTERN IfxStm_Index | IfxStm_getIndex (Ifx_STM *stm)
API to get the resource index of the STM specified. More...

Detailed Description

Function Documentation

◆ IfxStm_disableModule()

IFX_EXTERN void IfxStm_disableModule ( Ifx_STM * stm )

Disables the Stm module.

Parameters
stm pointer to STM registers
Returns
None

Definition at line 78 of file IfxStm.c.

◆ IfxStm_enableOcdsSuspend()

IFX_EXTERN void IfxStm_enableOcdsSuspend ( Ifx_STM * stm )

enable suspend by debugger. Note: The API will write into the OCS register only if OCDS is enabled

Parameters
stm pointer to System timer module registers.
Returns
None

Definition at line 101 of file IfxStm.c.

◆ IfxStm_get()

IFX_INLINE uint64 IfxStm_get ( Ifx_STM * stm )

Returns system timer value.

Parameters
stm pointer to System timer module registers.
Returns
system timer value.

Definition at line 576 of file IfxStm.h.

Referenced by IfxStm_getOffsetTimer(), IfxStm_now(), IfxStm_Timer_run(), now(), and nowWithoutCriticalSection().

◆ IfxStm_getAddress()

IFX_EXTERN Ifx_STM* IfxStm_getAddress ( IfxStm_Index stm )

Returns the module index of the selected STM module.

Parameters
stm Pointer to STM module registers
Returns
STM module register address

Definition at line 116 of file IfxStm.c.

◆ IfxStm_getFrequency()

IFX_INLINE float32 IfxStm_getFrequency ( Ifx_STM * stm )

Returns the system timer frequency.

Parameters
stm pointer to System timer module registers.
Returns
the system timer frequency in Hz.

Definition at line 593 of file IfxStm.h.

Referenced by IfxStm_getTicksFromMicroseconds(), IfxStm_getTicksFromMilliseconds(), IfxStm_Timer_init(), and IfxStm_Timer_updateInputFrequency().

◆ IfxStm_getIndex()

IFX_EXTERN IfxStm_Index IfxStm_getIndex ( Ifx_STM * stm )

API to get the resource index of the STM specified.

Parameters
stm pointer to System timer module registers.
Returns
system timer module index.

Definition at line 133 of file IfxStm.c.

Referenced by IfxStm_getSrcPointer(), and IfxStm_initCompare().

◆ IfxStm_isModuleSuspended()

IFX_INLINE boolean IfxStm_isModuleSuspended ( Ifx_STM * stm )

Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended.

Parameters
stm Pointer to STM module registers
Returns
Suspend status (TRUE / FALSE)

Definition at line 676 of file IfxStm.h.

◆ IfxStm_setSuspendMode()

IFX_INLINE void IfxStm_setSuspendMode | ( | Ifx_STM * | stm,
 |  | IfxStm_SuspendMode | mode
 | ) |  |

Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.

Parameters
stm | Pointer to STM module registers
mode | Module suspend mode
Returns
None

Definition at line 697 of file IfxStm.h.


iLLD_TC38A: Timer Functions

Functions
Timer Functions
iLLD » STM » Standard Driver
Collaboration diagram for Timer Functions:

Functions

IFX_INLINE uint32 | IfxStm_getLower (Ifx_STM *stm)
Returns the lower system timer value. More...
IFX_INLINE uint32 | IfxStm_getOffset12Timer (Ifx_STM *stm)
Gets the TIM3 couter value. More...
IFX_INLINE uint32 | IfxStm_getOffset16Timer (Ifx_STM *stm)
Gets the TIM4 couter value. More...
IFX_INLINE uint32 | IfxStm_getOffset20Timer (Ifx_STM *stm)
Gets the TIM5 couter value. More...
IFX_INLINE uint32 | IfxStm_getOffset32Timer (Ifx_STM *stm)
Gets the TIM6 couter value. More...
IFX_INLINE uint32 | IfxStm_getOffset4Timer (Ifx_STM *stm)
Gets the TIM1 couter value. More...
IFX_INLINE uint32 | IfxStm_getOffset8Timer (Ifx_STM *stm)
Gets the TIM2 couter value. More...
IFX_INLINE uint32 | IfxStm_getOffsetTimer (Ifx_STM *stm, uint8 offset)
Returns the timer value shifted right by offset. More...
IFX_INLINE void | IfxStm_waitTicks (Ifx_STM *stm, uint32 ticks)
Wait for requested time. The macro waits in while loop for the specified time in system timer ticks. More...

Detailed Description

Function Documentation

◆ IfxStm_getLower()

IFX_INLINE uint32 IfxStm_getLower ( Ifx_STM * stm )

Returns the lower system timer value.

Parameters
stm pointer to System timer module registers.
Returns
the lower system timer value.

Definition at line 604 of file IfxStm.h.

Referenced by IfxStm_waitTicks().

◆ IfxStm_getOffset12Timer()

IFX_INLINE uint32 IfxStm_getOffset12Timer ( Ifx_STM * stm )

Gets the TIM3 couter value.

Parameters
stm pointer to System timer module registers.
Returns
TIM3 counter value.

Definition at line 610 of file IfxStm.h.

◆ IfxStm_getOffset16Timer()

IFX_INLINE uint32 IfxStm_getOffset16Timer ( Ifx_STM * stm )

Gets the TIM4 couter value.

Parameters
stm pointer to System timer module registers.
Returns
TIM4 counter value.

Definition at line 616 of file IfxStm.h.

◆ IfxStm_getOffset20Timer()

IFX_INLINE uint32 IfxStm_getOffset20Timer ( Ifx_STM * stm )

Gets the TIM5 couter value.

Parameters
stm pointer to System timer module registers.
Returns
TIM5 counter value.

Definition at line 622 of file IfxStm.h.

◆ IfxStm_getOffset32Timer()

IFX_INLINE uint32 IfxStm_getOffset32Timer ( Ifx_STM * stm )

Gets the TIM6 couter value.

Parameters
stm pointer to System timer module registers.
Returns
TIM6 counter value.

Definition at line 628 of file IfxStm.h.

◆ IfxStm_getOffset4Timer()

IFX_INLINE uint32 IfxStm_getOffset4Timer ( Ifx_STM * stm )

Gets the TIM1 couter value.

Parameters
stm pointer to System timer module registers.
Returns
TIM1 counter value.

Definition at line 634 of file IfxStm.h.

◆ IfxStm_getOffset8Timer()

IFX_INLINE uint32 IfxStm_getOffset8Timer ( Ifx_STM * stm )

Gets the TIM2 couter value.

Parameters
stm pointer to System timer module registers.
Returns
TIM2 counter value.

Definition at line 640 of file IfxStm.h.

◆ IfxStm_getOffsetTimer()

IFX_INLINE uint32 IfxStm_getOffsetTimer | ( | Ifx_STM * | stm,
 |  | uint8 | offset
 | ) |  |

Returns the timer value shifted right by offset.

Parameters
stm | pointer to System timer module registers.
offset | offset value.
Returns
the lower system timer value shifted by offset.

Definition at line 646 of file IfxStm.h.

Referenced by IfxStm_initCompare().

◆ IfxStm_waitTicks()

IFX_INLINE void IfxStm_waitTicks | ( | Ifx_STM * | stm,
 |  | uint32 | ticks
 | ) |  |

Wait for requested time. The macro waits in while loop for the specified time in system timer ticks.

Parameters
stm | pointer to System timer module registers.
ticks | ticks Wait time in system timer ticks.
Returns
None

Definition at line 719 of file IfxStm.h.


iLLD_TC38A: Comparator Functions

Functions
Comparator Functions
iLLD » STM » Standard Driver
Collaboration diagram for Comparator Functions:

Functions

IFX_INLINE uint32 | IfxStm_getCompare (Ifx_STM *stm, IfxStm_Comparator comparator)
Returns the updated compare register value. More...
IFX_INLINE sint32 | IfxStm_getTicksFromMicroseconds (Ifx_STM *stm, uint32 microSeconds)
Returns the number of ticks for the selected micro seconds based on the STM frequency. More...
IFX_INLINE sint32 | IfxStm_getTicksFromMilliseconds (Ifx_STM *stm, uint32 milliSeconds)
Returns the number of ticks for the selected milli seconds based on the STM frequency. More...
IFX_INLINE void | IfxStm_increaseCompare (Ifx_STM *stm, IfxStm_Comparator comparator, uint32 ticks)
Update the compare register value increased with given ticks. More...
IFX_INLINE void | IfxStm_updateCompare (Ifx_STM *stm, IfxStm_Comparator comparator, uint32 ticks)
Update the compare register value. More...
IFX_EXTERN void | IfxStm_clearCompareFlag (Ifx_STM *stm, IfxStm_Comparator comparator)
Clear the compare interrupt flag. More...
IFX_EXTERN void | IfxStm_disableComparatorInterrupt (Ifx_STM *stm, IfxStm_Comparator comparator)
Disables the compare interrupt. More...
IFX_EXTERN void | IfxStm_enableComparatorInterrupt (Ifx_STM *stm, IfxStm_Comparator comparator)
Enables the compare interrupt . More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxStm_getSrcPointer (Ifx_STM *stm, IfxStm_Comparator comparator)
get the interrupt source pointer for the comparator. More...
IFX_EXTERN boolean | IfxStm_initCompare (Ifx_STM *stm, const IfxStm_CompareConfig *config)
Initialise stm compare register. More...
IFX_EXTERN void | IfxStm_initCompareConfig (IfxStm_CompareConfig *config)
Initialise compare configuration with default values. More...
IFX_EXTERN boolean | IfxStm_isCompareFlagSet (Ifx_STM *stm, IfxStm_Comparator comparator)
Indicates if the compare interrupt flag is set. More...
IFX_EXTERN void | IfxStm_setCompareControl (Ifx_STM *stm, IfxStm_Comparator comparator, IfxStm_ComparatorOffset offset, IfxStm_ComparatorSize size, IfxStm_ComparatorInterrupt interrupt)
Set the compare behavior. More...

Detailed Description

Function Documentation

◆ IfxStm_clearCompareFlag()

IFX_EXTERN void IfxStm_clearCompareFlag | ( | Ifx_STM * | stm,
 |  | IfxStm_Comparator | comparator
 | ) |  |

Clear the compare interrupt flag.

Parameters
stm | pointer to System timer module registers.
comparator | comparator selection comparator.
Returns
None

Definition at line 52 of file IfxStm.c.

Referenced by IfxStm_initCompare(), IfxStm_Timer_acknowledgeTimerIrq(), and IfxStm_Timer_init().

◆ IfxStm_disableComparatorInterrupt()

IFX_EXTERN void IfxStm_disableComparatorInterrupt | ( | Ifx_STM * | stm,
 |  | IfxStm_Comparator | comparator
 | ) |  |

Disables the compare interrupt.

Parameters
stm | pointer to System timer module registers.
comparator | comparator selection comparator.
Returns
None

Definition at line 65 of file IfxStm.c.

Referenced by IfxStm_Timer_acknowledgeTimerIrq(), and IfxStm_Timer_stop().

◆ IfxStm_enableComparatorInterrupt()

IFX_EXTERN void IfxStm_enableComparatorInterrupt | ( | Ifx_STM * | stm,
 |  | IfxStm_Comparator | comparator
 | ) |  |

Enables the compare interrupt .

Parameters
stm | pointer to System timer module registers.
comparator | comparator selection comparator.
Returns
None

Definition at line 88 of file IfxStm.c.

Referenced by IfxStm_initCompare(), and IfxStm_Timer_run().

◆ IfxStm_getCompare()

IFX_INLINE uint32 IfxStm_getCompare | ( | Ifx_STM * | stm,
 |  | IfxStm_Comparator | comparator
 | ) |  |

Returns the updated compare register value.

Parameters
stm | pointer to System timer module registers.
comparator | comparator selection comparator.
Returns
The compare value

Definition at line 587 of file IfxStm.h.

◆ IfxStm_getSrcPointer()

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxStm_getSrcPointer | ( | Ifx_STM * | stm,
 |  | IfxStm_Comparator | comparator
 | ) |  |

get the interrupt source pointer for the comparator.

Parameters
stm | pointer to the STM registers
comparator | comparator selection comparator
Returns
pointer to the interrupt source

Definition at line 153 of file IfxStm.c.

Referenced by IfxStm_Timer_init().

◆ IfxStm_getTicksFromMicroseconds()

IFX_INLINE sint32 IfxStm_getTicksFromMicroseconds | ( | Ifx_STM * | stm,
 |  | uint32 | microSeconds
 | ) |  |

Returns the number of ticks for the selected micro seconds based on the STM frequency.

Parameters
stm | pointer to System timer module registers.
microSeconds | Number of micro seconds that need to be converted to ticks
Returns
ticks

Definition at line 656 of file IfxStm.h.

◆ IfxStm_getTicksFromMilliseconds()

IFX_INLINE sint32 IfxStm_getTicksFromMilliseconds | ( | Ifx_STM * | stm,
 |  | uint32 | milliSeconds
 | ) |  |

Returns the number of ticks for the selected milli seconds based on the STM frequency.

Parameters
stm | pointer to System timer module registers.
milliSeconds | Number of micro seconds that need to be converted to ticks
Returns
ticks

Definition at line 663 of file IfxStm.h.

◆ IfxStm_increaseCompare()

IFX_INLINE void IfxStm_increaseCompare | ( | Ifx_STM * | stm,
 |  | IfxStm_Comparator | comparator,
 |  | uint32 | ticks
 | ) |  |

Update the compare register value increased with given ticks.

Parameters
stm | pointer to System timer module registers.
comparator | comparator selection comparator.
ticks | count for next comparison from current timer count.
Returns
None

Definition at line 670 of file IfxStm.h.

◆ IfxStm_initCompare()

IFX_EXTERN boolean IfxStm_initCompare | ( | Ifx_STM * | stm,
 |  | const IfxStm_CompareConfig * | config
 | ) |  |

Initialise stm compare register.

Parameters
stm | pointer to System timer module registers.
config | pointer to configuration structure.
Returns
TRUE if Comparator successful otherwise FLASE.

Definition at line 161 of file IfxStm.c.

◆ IfxStm_initCompareConfig()

IFX_EXTERN void IfxStm_initCompareConfig ( IfxStm_CompareConfig * config )

Initialise compare configuration with default values.

Parameters
config pointer to configuration structure.
Returns
None

Definition at line 227 of file IfxStm.c.

◆ IfxStm_isCompareFlagSet()

IFX_EXTERN boolean IfxStm_isCompareFlagSet | ( | Ifx_STM * | stm,
 |  | IfxStm_Comparator | comparator
 | ) |  |

Indicates if the compare interrupt flag is set.

Parameters
stm | pointer to System timer module registers.
comparator | comparator selection comparator.
Returns
TRUE if the comparator flag is set

Definition at line 239 of file IfxStm.c.

Referenced by IfxStm_Timer_acknowledgeTimerIrq().

◆ IfxStm_setCompareControl()

IFX_EXTERN void IfxStm_setCompareControl | ( | Ifx_STM * | stm,
 |  | IfxStm_Comparator | comparator,
 |  | IfxStm_ComparatorOffset | offset,
 |  | IfxStm_ComparatorSize | size,
 |  | IfxStm_ComparatorInterrupt | interrupt
 | ) |  |

Set the compare behavior.

Parameters
stm | pointer to System timer module registers
comparator | comparator selection comparator
offset | Comparator start bit position
size | Size of compare value to compare with timer
interrupt | Comparator Interrupt request source defined
Returns
None

Definition at line 272 of file IfxStm.c.

Referenced by IfxStm_Timer_init().

◆ IfxStm_updateCompare()

IFX_INLINE void IfxStm_updateCompare | ( | Ifx_STM * | stm,
 |  | IfxStm_Comparator | comparator,
 |  | uint32 | ticks
 | ) |  |

Update the compare register value.

Parameters
stm | pointer to System timer module registers.
comparator | comparator selection comparator.
ticks | count for next comparison.
Returns
None

Definition at line 713 of file IfxStm.h.

Referenced by IfxStm_Timer_acknowledgeTimerIrq(), and IfxStm_Timer_run().


iLLD_TC38A: How to use the Stm driver?

How to use the Stm driver?
iLLD » STM
Collaboration diagram for How to use the Stm driver?:

The Stm Standard driver provides APIs to initialize, configure and control the Stm.

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Stm/Std/IfxStm.h>

Variables

Declare STM variables :

Ifx_STM *stmSfr;
IfxStm_CompareConfig stmConfig;

Interrupt Handler Installation

See also How to define Interrupts?

Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:

// priorities are normally defined in Ifx_IntPrioDef.h
#define IFX_INTPRIO_STM0_SR0 10

Add the interrupt service routines to your C code. They have to call the Stm interrupt handlers: please take care in choosing number of ticks, the below example code will raise an interrupt evry time the specified number of ticks have been elapsed.

IFX_INTERRUPT(stm0Sr0ISR, 0, IFX_INTPRIO_STM0_SR0)
{
IfxStm_clearCompareFlag(stmSfr, stmConfig.comparator);
IfxStm_increaseCompare(stmSfr, stmConfig.comparator, stmConfig.ticks);
}

Finally install the interrupt handlers in your initialisation function:

// install interrupt handlers
IfxCpu_Irq_installInterruptHandler(&stm0Sr0ISR, IFX_INTPRIO_STM0_SR0);
IfxCpu_enableInterrupts();

Module Initialisation

The STM module can be configured to generate an interrupt at every compare match of the selected comaparator with the desired compare value, the interrupt can further be routed to other comparator.

The module initialisation can be done as followed.

stmSfr = &MODULE_STM0;
IfxStm_initCompareConfig(&stmConfig);
// configure to generate interrupt every 10 us
sint32 ticks = IfxStm_getTicksFromMicroseconds(10);
stmConfig.ticks = ticks;
stmConfig.triggerPriority = IFX_INTPRIO_STM0_SR0;
stmConfig.typeOfService = IfxSrc_Tos_cpu0;
IfxStm_initCompare(stmSfr, &stmConfig);

Now the Stm shall generate interrupts regularly based on the configured time !


iLLD_TC38A: STM Timer Interface

Modules
STM Timer Interface
iLLD » STM
Collaboration diagram for STM Timer Interface:

Modules

STM Timer Data Structures
global function

Detailed Description


iLLD_TC38A: STM Timer Data Structures

Data Structures
STM Timer Data Structures
iLLD » STM » STM Timer Interface
Collaboration diagram for STM Timer Data Structures:

Data Structures

struct | IfxStm_Timer_Base
Structure for the timer base. More...
struct | IfxStm_Timer
Timer interface. More...
struct | IfxStm_Timer_Config
configuration structure for Timer More...

Detailed Description

Data Structure Documentation

◆ IfxStm_Timer_Base

struct IfxStm_Timer_Base

Structure for the timer base.

Definition at line 126 of file IfxStm_Timer.h.

Data Fields
float32 | clockFreq | Timer input clock frequency (cached value)
IfxStdIf_Timer_CountDir | countDir | Timer counting mode.
Ifx_TimerValue | period | Timer period in ticks (cached value)
boolean | singleShot | If TRUE, the timer will stop after 1st event.
boolean | triggerEnabled | If TRUE, the trigger functionality is Initialized.

◆ IfxStm_Timer

struct IfxStm_Timer

Timer interface.

Definition at line 141 of file IfxStm_Timer.h.

Collaboration diagram for IfxStm_Timer:
[legend]
Data Fields
IfxStm_Timer_Base | base | Timer interface.
IfxStm_Comparator | comparator | Comparator used for the timer functionality.
uint8 | comparatorShift | Comparator shift.
uint32 | comparatorValue | Value of the comparator for the next event.
Ifx_STM * | stm | STM module used for the timer functionality.

◆ IfxStm_Timer_Config

struct IfxStm_Timer_Config

configuration structure for Timer

Definition at line 152 of file IfxStm_Timer.h.

Collaboration diagram for IfxStm_Timer_Config:
[legend]
Data Fields
IfxStdIf_Timer_Config | base | Standard interface timer configuration.
IfxStm_Comparator | comparator | Comparator used for the timer functionality.
Ifx_STM * | stm | STM module used for the timer functionality.


iLLD_TC38A: global function

Functions
global function
iLLD » STM » STM Timer Interface
Collaboration diagram for global function:

Functions

IFX_EXTERN boolean | IfxStm_Timer_acknowledgeTimerIrq (IfxStm_Timer *driver)
Returns the timer event see IfxStdIf_Timer_AckTimerIrq. More...
IFX_EXTERN float32 | IfxStm_Timer_getFrequency (IfxStm_Timer *driver)
Returns the frequency see IfxStdIf_Timer_GetFrequency. More...
IFX_EXTERN float32 | IfxStm_Timer_getInputFrequency (IfxStm_Timer *driver)
Returns the input frequency see IfxStdIf_Timer_GetInputFrequency. More...
IFX_EXTERN Ifx_TimerValue | IfxStm_Timer_getPeriod (IfxStm_Timer *driver)
Returns the period of the timer see IfxStdIf_Timer_GetPeriod. More...
IFX_EXTERN float32 | IfxStm_Timer_getResolution (IfxStm_Timer *driver)
Return the resolution of the Timer counters see IfxStdIf_Timer_GetResolution. More...
IFX_EXTERN void | IfxStm_Timer_run (IfxStm_Timer *driver)
Runs the timer see IfxStdIf_Timer_Run. More...
IFX_EXTERN boolean | IfxStm_Timer_setFrequency (IfxStm_Timer *driver, float32 frequency)
Sets the Frequency see IfxStdIf_Timer_SetFrequency. More...
IFX_EXTERN boolean | IfxStm_Timer_setPeriod (IfxStm_Timer *driver, Ifx_TimerValue period)
Sets the period for the timer see IfxStdIf_Timer_SetPeriod. More...
IFX_EXTERN void | IfxStm_Timer_setSingleMode (IfxStm_Timer *driver, boolean enabled)
Sets the single shot mode of the timer see IfxStdIf_Timer_SetSingleMode. More...
IFX_EXTERN boolean | IfxStm_Timer_stdIfTimerInit (IfxStdIf_Timer *stdif, IfxStm_Timer *driver)
Initializes the standard interface timer. More...
IFX_EXTERN void | IfxStm_Timer_stop (IfxStm_Timer *driver)
Stops the timer see IfxStdIf_Timer_Stop. More...
IFX_EXTERN void | IfxStm_Timer_updateInputFrequency (IfxStm_Timer *driver)
Updates the input frequency see IfxStdIf_Timer_UpdateInputFrequency. More...
IFX_EXTERN boolean | IfxStm_Timer_init (IfxStm_Timer *driver, const IfxStm_Timer_Config *config)
Initialises the timer object. More...
IFX_EXTERN void | IfxStm_Timer_initConfig (IfxStm_Timer_Config *config, Ifx_STM *stm)
Initializes the configuration structure to default. More...

Detailed Description

Function Documentation

◆ IfxStm_Timer_acknowledgeTimerIrq()

IFX_EXTERN boolean IfxStm_Timer_acknowledgeTimerIrq ( IfxStm_Timer * driver )

Returns the timer event see IfxStdIf_Timer_AckTimerIrq.

Parameters
driver STM Timer interface Handle
Returns
Timer interrupt event

Definition at line 53 of file IfxStm_Timer.c.

Referenced by IfxStm_Timer_stdIfTimerInit().

◆ IfxStm_Timer_getFrequency()

IFX_EXTERN float32 IfxStm_Timer_getFrequency ( IfxStm_Timer * driver )

Returns the frequency see IfxStdIf_Timer_GetFrequency.

Parameters
driver STM Timer interface Handle
Returns
Frequency

Definition at line 79 of file IfxStm_Timer.c.

Referenced by IfxStm_Timer_stdIfTimerInit().

◆ IfxStm_Timer_getInputFrequency()

IFX_EXTERN float32 IfxStm_Timer_getInputFrequency ( IfxStm_Timer * driver )

Returns the input frequency see IfxStdIf_Timer_GetInputFrequency.

Parameters
driver STM Timer interface Handle
Returns
Frequency

Definition at line 85 of file IfxStm_Timer.c.

Referenced by IfxStm_Timer_stdIfTimerInit().

◆ IfxStm_Timer_getPeriod()

IFX_EXTERN Ifx_TimerValue IfxStm_Timer_getPeriod ( IfxStm_Timer * driver )

Returns the period of the timer see IfxStdIf_Timer_GetPeriod.

Parameters
driver STM Timer interface Handle
Returns
Period

Definition at line 91 of file IfxStm_Timer.c.

Referenced by IfxStm_Timer_stdIfTimerInit().

◆ IfxStm_Timer_getResolution()

IFX_EXTERN float32 IfxStm_Timer_getResolution ( IfxStm_Timer * driver )

Return the resolution of the Timer counters see IfxStdIf_Timer_GetResolution.

Parameters
driver STM Timer interface handle
Returns
Resolution

Definition at line 97 of file IfxStm_Timer.c.

Referenced by IfxStm_Timer_stdIfTimerInit().

◆ IfxStm_Timer_init()

IFX_EXTERN boolean IfxStm_Timer_init | ( | IfxStm_Timer * | driver,
 |  | const IfxStm_Timer_Config * | config
 | ) |  |

Initialises the timer object.

Parameters
driver | STM Timer interface Handle
config | Configuration structure for STM Timer
Returns
TRUE on success else FALSE

Definition at line 180 of file IfxStm_Timer.c.

◆ IfxStm_Timer_initConfig()

IFX_EXTERN void IfxStm_Timer_initConfig | ( | IfxStm_Timer_Config * | config,
 |  | Ifx_STM * | stm
 | ) |  |

Initializes the configuration structure to default.

Parameters
config | Configuration structure for STM Timer
stm | Pointer to STM module
Returns
None

Definition at line 240 of file IfxStm_Timer.c.

◆ IfxStm_Timer_run()

IFX_EXTERN void IfxStm_Timer_run ( IfxStm_Timer * driver )

Runs the timer see IfxStdIf_Timer_Run.

Parameters
driver STM Timer interface Handle
Returns
None

Definition at line 103 of file IfxStm_Timer.c.

Referenced by IfxStm_Timer_stdIfTimerInit().

◆ IfxStm_Timer_setFrequency()

IFX_EXTERN boolean IfxStm_Timer_setFrequency | ( | IfxStm_Timer * | driver,
 |  | float32 | frequency
 | ) |  |

Sets the Frequency see IfxStdIf_Timer_SetFrequency.

Parameters
driver | STM Timer interface Handle
frequency | frequency
Returns
TRUE on success else FALSE

Definition at line 119 of file IfxStm_Timer.c.

Referenced by IfxStm_Timer_init(), and IfxStm_Timer_stdIfTimerInit().

◆ IfxStm_Timer_setPeriod()

IFX_EXTERN boolean IfxStm_Timer_setPeriod | ( | IfxStm_Timer * | driver,
 |  | Ifx_TimerValue | period
 | ) |  |

Sets the period for the timer see IfxStdIf_Timer_SetPeriod.

Parameters
driver | STM Timer interface handle
period | Period value
Returns
TRUE on success else FALSE

Definition at line 127 of file IfxStm_Timer.c.

Referenced by IfxStm_Timer_setFrequency(), and IfxStm_Timer_stdIfTimerInit().

◆ IfxStm_Timer_setSingleMode()

IFX_EXTERN void IfxStm_Timer_setSingleMode | ( | IfxStm_Timer * | driver,
 |  | boolean | enabled
 | ) |  |

Sets the single shot mode of the timer see IfxStdIf_Timer_SetSingleMode.

Parameters
driver | STM Timer interface Handle
enabled | If TRUE, sets the single shot mode
Returns
None

Definition at line 135 of file IfxStm_Timer.c.

Referenced by IfxStm_Timer_stdIfTimerInit().

◆ IfxStm_Timer_stdIfTimerInit()

IFX_EXTERN boolean IfxStm_Timer_stdIfTimerInit | ( | IfxStdIf_Timer * | stdif,
 |  | IfxStm_Timer * | driver
 | ) |  |

Initializes the standard interface timer.

Parameters
stdif | Standard interface object, will be initialized by the function
driver | driver Interface driver to be used by the standard interface. must be initialised separately
Returns
TRUE on success else FALSE

Definition at line 141 of file IfxStm_Timer.c.

◆ IfxStm_Timer_stop()

IFX_EXTERN void IfxStm_Timer_stop ( IfxStm_Timer * driver )

Stops the timer see IfxStdIf_Timer_Stop.

Parameters
driver STM Timer interface Handle
Returns
None

Definition at line 166 of file IfxStm_Timer.c.

Referenced by IfxStm_Timer_stdIfTimerInit().

◆ IfxStm_Timer_updateInputFrequency()

IFX_EXTERN void IfxStm_Timer_updateInputFrequency ( IfxStm_Timer * driver )

Updates the input frequency see IfxStdIf_Timer_UpdateInputFrequency.

Parameters
driver STM Timer interface Handle
Returns
None

Definition at line 172 of file IfxStm_Timer.c.

Referenced by IfxStm_Timer_init(), and IfxStm_Timer_stdIfTimerInit().


iLLD_TC38A: IfxStm_cfg.h File Reference

  • _Impl
Macros | Enumerations | Variables
IfxStm_cfg.h File Reference
iLLD » STM

STM on-chip implementation data. More...

#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "IfxStm_reg.h"
#include "Cpu/Std/Ifx_Types.h"
Include dependency graph for IfxStm_cfg.h:

Go to the source code of this file.

Macros

#define | IFXSTM_NUM_MODULES 4
STM count. More...
#define | IFXSTM_NUM_COMPARATORS (2)
No Of Comparators per Stm. More...

Enumerations

enum IfxStm_Index {
IfxStm_Index_none = -1,
IfxStm_Index_0 = 0,
IfxStm_Index_1,
IfxStm_Index_2,
IfxStm_Index_3
}
List of the available STM resources. More...

Variables

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxStm_cfg_indexMap [IFXSTM_NUM_MODULES]

Detailed Description

STM on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxStm_cfg.h.

Macro Definition Documentation

◆ IFXSTM_NUM_COMPARATORS

#define IFXSTM_NUM_COMPARATORS (2)

No Of Comparators per Stm.

Definition at line 74 of file IfxStm_cfg.h.

◆ IFXSTM_NUM_MODULES

#define IFXSTM_NUM_MODULES 4

STM count.

Definition at line 70 of file IfxStm_cfg.h.

Referenced by IfxStm_getAddress(), and IfxStm_getIndex().


iLLD_TC38A: IfxStm.h File Reference

  • Stm
  • Std
Data Structures | Macros | Enumerations | Functions
IfxStm.h File Reference
iLLD » STM

STM basic functionality. More...

#include "_Impl/IfxStm_cfg.h"
#include "Scu/Std/IfxScuCcu.h"
#include "Src/Std/IfxSrc.h"
#include "IfxCbs_reg.h"
Include dependency graph for IfxStm.h:

Go to the source code of this file.

Data Structures

struct IfxStm_CompareConfig
Comparator Configuration Structure. More...

Macros

#define IFXSTM_DEFAULT_TIMER (&MODULE_STM0)

Enumerations

enum IfxStm_Comparator {
IfxStm_Comparator_0 = 0,
IfxStm_Comparator_1
}
Comparator Id defined in MODULE_STMx.ISCR.B.CMP0IRR(x = 0, 1, 2) More...
enum IfxStm_ComparatorInterrupt {
IfxStm_ComparatorInterrupt_ir0 = 0,
IfxStm_ComparatorInterrupt_ir1 = 1
}
Comparator Interrupt request source defined in MODULE_SRC.STM.STM[index].SRx (x =0, 1) More...
enum IfxStm_ComparatorOffset {
IfxStm_ComparatorOffset_0 = 0,
IfxStm_ComparatorOffset_1,
IfxStm_ComparatorOffset_2,
IfxStm_ComparatorOffset_3,
IfxStm_ComparatorOffset_4,
IfxStm_ComparatorOffset_5,
IfxStm_ComparatorOffset_6,
IfxStm_ComparatorOffset_7,
IfxStm_ComparatorOffset_8,
IfxStm_ComparatorOffset_9,
IfxStm_ComparatorOffset_10,
IfxStm_ComparatorOffset_11,
IfxStm_ComparatorOffset_12,
IfxStm_ComparatorOffset_13,
IfxStm_ComparatorOffset_14,
IfxStm_ComparatorOffset_15,
IfxStm_ComparatorOffset_16,
IfxStm_ComparatorOffset_17,
IfxStm_ComparatorOffset_18,
IfxStm_ComparatorOffset_19,
IfxStm_ComparatorOffset_20,
IfxStm_ComparatorOffset_21,
IfxStm_ComparatorOffset_22,
IfxStm_ComparatorOffset_23,
IfxStm_ComparatorOffset_24,
IfxStm_ComparatorOffset_25,
IfxStm_ComparatorOffset_26,
IfxStm_ComparatorOffset_27,
IfxStm_ComparatorOffset_28,
IfxStm_ComparatorOffset_29,
IfxStm_ComparatorOffset_30,
IfxStm_ComparatorOffset_31
}
Comparator start bit position defined in MODULE_STMx.CMCON.B.MSTART0(x = 0,1,2) More...
enum IfxStm_ComparatorSize {
IfxStm_ComparatorSize_1Bit = 0,
IfxStm_ComparatorSize_2Bits = 1,
IfxStm_ComparatorSize_3Bits = 2,
IfxStm_ComparatorSize_4Bits = 3,
IfxStm_ComparatorSize_5Bits = 4,
IfxStm_ComparatorSize_6Bits = 5,
IfxStm_ComparatorSize_7Bits = 6,
IfxStm_ComparatorSize_8Bits = 7,
IfxStm_ComparatorSize_9Bits = 8,
IfxStm_ComparatorSize_10Bits = 9,
IfxStm_ComparatorSize_11Bits = 10,
IfxStm_ComparatorSize_12Bits = 11,
IfxStm_ComparatorSize_13Bits = 12,
IfxStm_ComparatorSize_14Bits = 13,
IfxStm_ComparatorSize_15Bits = 14,
IfxStm_ComparatorSize_16Bits = 15,
IfxStm_ComparatorSize_17Bits = 16,
IfxStm_ComparatorSize_18Bits = 17,
IfxStm_ComparatorSize_19Bits = 18,
IfxStm_ComparatorSize_20Bits = 19,
IfxStm_ComparatorSize_21Bits = 20,
IfxStm_ComparatorSize_22Bits = 21,
IfxStm_ComparatorSize_23Bits = 22,
IfxStm_ComparatorSize_24Bits = 23,
IfxStm_ComparatorSize_25Bits = 24,
IfxStm_ComparatorSize_26Bits = 25,
IfxStm_ComparatorSize_27Bits = 26,
IfxStm_ComparatorSize_28Bits = 27,
IfxStm_ComparatorSize_29Bits = 28,
IfxStm_ComparatorSize_30Bits = 29,
IfxStm_ComparatorSize_31Bits = 30,
IfxStm_ComparatorSize_32Bits = 31
}
Size of compare value to compare with timer defined in MODULE_STMx.CMCON.B.MSIZE0(x = 0,1,2) More...
enum IfxStm_SleepMode {
IfxStm_SleepMode_enable = 0,
IfxStm_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_STM.CLC.B.EDIS. More...
enum IfxStm_SuspendMode {
IfxStm_SuspendMode_none = 0,
IfxStm_SuspendMode_hard = 1,
IfxStm_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...

Functions

IFX_INLINE uint64 | IfxStm_get (Ifx_STM *stm)
Returns system timer value. More...
IFX_INLINE float32 | IfxStm_getFrequency (Ifx_STM *stm)
Returns the system timer frequency. More...
IFX_INLINE boolean | IfxStm_isModuleSuspended (Ifx_STM *stm)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxStm_setSuspendMode (Ifx_STM *stm, IfxStm_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN void | IfxStm_disableModule (Ifx_STM *stm)
Disables the Stm module. More...
IFX_EXTERN void | IfxStm_enableOcdsSuspend (Ifx_STM *stm)
enable suspend by debugger. Note: The API will write into the OCS register only if OCDS is enabled More...
IFX_EXTERN Ifx_STM * | IfxStm_getAddress (IfxStm_Index stm)
Returns the module index of the selected STM module. More...
IFX_EXTERN IfxStm_Index | IfxStm_getIndex (Ifx_STM *stm)
API to get the resource index of the STM specified. More...
IFX_INLINE uint32 | IfxStm_getLower (Ifx_STM *stm)
Returns the lower system timer value. More...
IFX_INLINE uint32 | IfxStm_getOffset12Timer (Ifx_STM *stm)
Gets the TIM3 couter value. More...
IFX_INLINE uint32 | IfxStm_getOffset16Timer (Ifx_STM *stm)
Gets the TIM4 couter value. More...
IFX_INLINE uint32 | IfxStm_getOffset20Timer (Ifx_STM *stm)
Gets the TIM5 couter value. More...
IFX_INLINE uint32 | IfxStm_getOffset32Timer (Ifx_STM *stm)
Gets the TIM6 couter value. More...
IFX_INLINE uint32 | IfxStm_getOffset4Timer (Ifx_STM *stm)
Gets the TIM1 couter value. More...
IFX_INLINE uint32 | IfxStm_getOffset8Timer (Ifx_STM *stm)
Gets the TIM2 couter value. More...
IFX_INLINE uint32 | IfxStm_getOffsetTimer (Ifx_STM *stm, uint8 offset)
Returns the timer value shifted right by offset. More...
IFX_INLINE void | IfxStm_waitTicks (Ifx_STM *stm, uint32 ticks)
Wait for requested time. The macro waits in while loop for the specified time in system timer ticks. More...
IFX_INLINE uint32 | IfxStm_getCompare (Ifx_STM *stm, IfxStm_Comparator comparator)
Returns the updated compare register value. More...
IFX_INLINE sint32 | IfxStm_getTicksFromMicroseconds (Ifx_STM *stm, uint32 microSeconds)
Returns the number of ticks for the selected micro seconds based on the STM frequency. More...
IFX_INLINE sint32 | IfxStm_getTicksFromMilliseconds (Ifx_STM *stm, uint32 milliSeconds)
Returns the number of ticks for the selected milli seconds based on the STM frequency. More...
IFX_INLINE void | IfxStm_increaseCompare (Ifx_STM *stm, IfxStm_Comparator comparator, uint32 ticks)
Update the compare register value increased with given ticks. More...
IFX_INLINE void | IfxStm_updateCompare (Ifx_STM *stm, IfxStm_Comparator comparator, uint32 ticks)
Update the compare register value. More...
IFX_EXTERN void | IfxStm_clearCompareFlag (Ifx_STM *stm, IfxStm_Comparator comparator)
Clear the compare interrupt flag. More...
IFX_EXTERN void | IfxStm_disableComparatorInterrupt (Ifx_STM *stm, IfxStm_Comparator comparator)
Disables the compare interrupt. More...
IFX_EXTERN void | IfxStm_enableComparatorInterrupt (Ifx_STM *stm, IfxStm_Comparator comparator)
Enables the compare interrupt . More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxStm_getSrcPointer (Ifx_STM *stm, IfxStm_Comparator comparator)
get the interrupt source pointer for the comparator. More...
IFX_EXTERN boolean | IfxStm_initCompare (Ifx_STM *stm, const IfxStm_CompareConfig *config)
Initialise stm compare register. More...
IFX_EXTERN void | IfxStm_initCompareConfig (IfxStm_CompareConfig *config)
Initialise compare configuration with default values. More...
IFX_EXTERN boolean | IfxStm_isCompareFlagSet (Ifx_STM *stm, IfxStm_Comparator comparator)
Indicates if the compare interrupt flag is set. More...
IFX_EXTERN void | IfxStm_setCompareControl (Ifx_STM *stm, IfxStm_Comparator comparator, IfxStm_ComparatorOffset offset, IfxStm_ComparatorSize size, IfxStm_ComparatorInterrupt interrupt)
Set the compare behavior. More...
IFX_INLINE void | IfxStm_setSleepMode (Ifx_STM *stm, IfxStm_SleepMode mode)
IFX_INLINE sint64 | IfxStm_now (void)
Returns the STM counter value. More...
IFX_INLINE sint64 | IfxStm_getDeadLine (sint64 timeout)
Get the deadline value. More...
IFX_INLINE boolean | IfxStm_isDeadLine (sint64 deadLine)
Checked if deadline has occured. More...
IFX_INLINE void | IfxStm_wait (sint64 timeout)
Waits for a specific time. More...
IFX_EXTERN void | IfxStm_resetModule (Ifx_STM *stm)

Detailed Description

STM basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxStm.h.

Macro Definition Documentation

◆ IFXSTM_DEFAULT_TIMER

#define IFXSTM_DEFAULT_TIMER (&MODULE_STM0)

Definition at line 146 of file IfxStm.h.

Referenced by IfxStm_now().

Function Documentation

◆ IfxStm_getDeadLine()

IFX_INLINE sint64 IfxStm_getDeadLine ( sint64 timeout )

Get the deadline value.

Parameters
timeout timeout value
Returns
Return the deadline

Definition at line 746 of file IfxStm.h.

Referenced by Ifx_Fifo_canReadCount(), Ifx_Fifo_canWriteCount(), Ifx_Fifo_read(), Ifx_Fifo_write(), IfxAsclin_Asc_flushTx(), and IfxStm_wait().

◆ IfxStm_isDeadLine()

IFX_INLINE boolean IfxStm_isDeadLine ( sint64 deadLine )

Checked if deadline has occured.

Parameters
deadLine Deadline value
Returns
Return if deadline occured or not

Definition at line 763 of file IfxStm.h.

Referenced by Ifx_Fifo_canReadCount(), Ifx_Fifo_canWriteCount(), IfxAsclin_Asc_flushTx(), and IfxStm_wait().

◆ IfxStm_now()

IFX_INLINE sint64 IfxStm_now ( void )

Returns the STM counter value.

Returns
Returns the STM counter value

Definition at line 733 of file IfxStm.h.

Referenced by IfxAsclin_Asc_isrReceive(), IfxAsclin_Asc_isrTransmit(), IfxStm_getDeadLine(), and IfxStm_isDeadLine().

◆ IfxStm_resetModule()

IFX_EXTERN void IfxStm_resetModule ( Ifx_STM * stm )
Parameters
stm pointer to STM registers
Returns
None

Definition at line 252 of file IfxStm.c.

◆ IfxStm_setSleepMode()

IFX_INLINE void IfxStm_setSleepMode | ( | Ifx_STM * | stm,
 |  | IfxStm_SleepMode | mode
 | ) |  |
Parameters
stm | pointer STM registers
mode | mode selection (enable/ disable)
Returns
None

Definition at line 688 of file IfxStm.h.

◆ IfxStm_wait()

IFX_INLINE void IfxStm_wait ( sint64 timeout )

Waits for a specific time.

Parameters
timeout timeout value
Returns
None

Definition at line 780 of file IfxStm.h.


iLLD_TC38A: IfxStm_Timer.h File Reference

  • Stm
  • Timer
Data Structures | Functions
IfxStm_Timer.h File Reference
iLLD » STM

STM TIMER details. More...

#include "Stm/Std/IfxStm.h"
#include "StdIf/IfxStdIf_Timer.h"
Include dependency graph for IfxStm_Timer.h:

Go to the source code of this file.

Data Structures

struct | IfxStm_Timer_Base
Structure for the timer base. More...
struct | IfxStm_Timer
Timer interface. More...
struct | IfxStm_Timer_Config
configuration structure for Timer More...

Functions

IFX_EXTERN boolean | IfxStm_Timer_acknowledgeTimerIrq (IfxStm_Timer *driver)
Returns the timer event see IfxStdIf_Timer_AckTimerIrq. More...
IFX_EXTERN float32 | IfxStm_Timer_getFrequency (IfxStm_Timer *driver)
Returns the frequency see IfxStdIf_Timer_GetFrequency. More...
IFX_EXTERN float32 | IfxStm_Timer_getInputFrequency (IfxStm_Timer *driver)
Returns the input frequency see IfxStdIf_Timer_GetInputFrequency. More...
IFX_EXTERN Ifx_TimerValue | IfxStm_Timer_getPeriod (IfxStm_Timer *driver)
Returns the period of the timer see IfxStdIf_Timer_GetPeriod. More...
IFX_EXTERN float32 | IfxStm_Timer_getResolution (IfxStm_Timer *driver)
Return the resolution of the Timer counters see IfxStdIf_Timer_GetResolution. More...
IFX_EXTERN void | IfxStm_Timer_run (IfxStm_Timer *driver)
Runs the timer see IfxStdIf_Timer_Run. More...
IFX_EXTERN boolean | IfxStm_Timer_setFrequency (IfxStm_Timer *driver, float32 frequency)
Sets the Frequency see IfxStdIf_Timer_SetFrequency. More...
IFX_EXTERN boolean | IfxStm_Timer_setPeriod (IfxStm_Timer *driver, Ifx_TimerValue period)
Sets the period for the timer see IfxStdIf_Timer_SetPeriod. More...
IFX_EXTERN void | IfxStm_Timer_setSingleMode (IfxStm_Timer *driver, boolean enabled)
Sets the single shot mode of the timer see IfxStdIf_Timer_SetSingleMode. More...
IFX_EXTERN boolean | IfxStm_Timer_stdIfTimerInit (IfxStdIf_Timer *stdif, IfxStm_Timer *driver)
Initializes the standard interface timer. More...
IFX_EXTERN void | IfxStm_Timer_stop (IfxStm_Timer *driver)
Stops the timer see IfxStdIf_Timer_Stop. More...
IFX_EXTERN void | IfxStm_Timer_updateInputFrequency (IfxStm_Timer *driver)
Updates the input frequency see IfxStdIf_Timer_UpdateInputFrequency. More...
IFX_EXTERN boolean | IfxStm_Timer_init (IfxStm_Timer *driver, const IfxStm_Timer_Config *config)
Initialises the timer object. More...
IFX_EXTERN void | IfxStm_Timer_initConfig (IfxStm_Timer_Config *config, Ifx_STM *stm)
Initializes the configuration structure to default. More...

Detailed Description

STM TIMER details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

The timer driver enabled the generation of periodical interrupt based on the STM module.

The driver is initialized with IfxStm_Timer_init(). After initialization, the timer is started with IfxStm_Timer_run() and stopped with IfxStm_Timer_stop(). Single shot can be set with IfxStm_Timer_setSingleMode(), in case the timer is already running it will stop after the next event, else the timer event will occur only once.

The timer interrupt must call the IfxStm_Timer_acknowledgeTimerIrq() function which clears the interrupt flag and set the next compare value.

Changing the period with IfxStm_Timer_setPeriod() or IfxStm_Timer_setFrequency() will take effect only after the next timer event.

This driver implements a subset of the functionalities defined by Standard interface: Timer. If does supports the timer with interrupt but not the trigger signal.

The user is free to use either the driver specific APIs below or to used the standard interface APIs.

Specific implementation

For a detailed configuration of the microcontroller, see IfxStm_Timer_init().

Usage example

Initialization and interrupt:

#define ISR_PRIORITY_TIMER_1MS (2)
#define ISR_PROVIDER_TIMER_1MS IfxSrc_Tos_cpu0
#define INTERRUPT_TIMER_1MS ISR_ASSIGN(ISR_PRIORITY_TIMER_1MS, ISR_PROVIDER_TIMER_1MS)
IfxStm_Timer myTimer;
boolean AppInit_1ms(void)
{
boolean result = TRUE;
IfxStm_Timer_Config timerConfig;
IfxStm_Timer_initConfig(&timerConfig, &MODULE_STM0);
timerConfig.base.frequency = 1000;
timerConfig.base.isrPriority = ISR_PRIORITY(INTERRUPT_TIMER_1MS);
timerConfig.base.isrProvider = ISR_PROVIDER(INTERRUPT_TIMER_1MS);
timerConfig.base.minResolution = (1.0 / timerConfig.base.frequency) / 1000;
timerConfig.comparator = IfxStm_Comparator_0;
result = IfxStm_Timer_init(&myTimer, &timerConfig);
return result;
}
IFX_INTERRUPT(ISR_TIMER_1ms, 0, ISR_PRIORITY_TIMER_1MS)
{
__enable();
IfxStm_Timer_acknowledgeTimerIrq(&myTimer);
}

During run-time, the timer can be started / stopped as follow:

IfxStm_Timer_run(&myTimer);
IfxStm_Timer_stop(&myTimer);

Definition in file IfxStm_Timer.h.


iLLD_TC38A: General functionalities

Modules
General functionalities
iLLD
Collaboration diagram for General functionalities:

Modules

Data handling
Internal Mux

Detailed Description


iLLD_TC38A: Data handling

Modules
Data handling
iLLD » General functionalities
Collaboration diagram for Data handling:

Modules

Circular buffer
FIFO

Detailed Description


iLLD_TC38A: Circular buffer

Functions
Circular buffer
iLLD » General functionalities » Data handling
Collaboration diagram for Circular buffer:

Functions

uint16 | Ifx_CircularBuffer_get16 (Ifx_CircularBuffer *buffer)
Return the circular buffer 16 bit value, and post-increment the circular buffer pointer. More...
uint32 | Ifx_CircularBuffer_get32 (Ifx_CircularBuffer *buffer)
Return the circular buffer 32 bit value, and post-increment the circular buffer pointer. More...
void * | Ifx_CircularBuffer_read8 (Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
Copy count bytes from the circular buffer to the data array. More...
void * | Ifx_CircularBuffer_read32 (Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
Copy count 32 bit words from the circular buffer to the data array. More...
const void * | Ifx_CircularBuffer_write8 (Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
Copy count bytes from the data array to the circular buffer. More...
const void * | Ifx_CircularBuffer_write32 (Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
Copy count 32 bit words from the data array to the circular buffer. More...

Detailed Description

This module implements circular buffer functions.

Function Documentation

◆ Ifx_CircularBuffer_get16()

uint16 Ifx_CircularBuffer_get16 ( Ifx_CircularBuffer * buffer )

Return the circular buffer 16 bit value, and post-increment the circular buffer pointer.

Parameters
buffer Specifies circular buffer.
Returns
Return the next circular buffer value.

Definition at line 61 of file Ifx_CircularBuffer.c.

◆ Ifx_CircularBuffer_get32()

uint32 Ifx_CircularBuffer_get32 ( Ifx_CircularBuffer * buffer )

Return the circular buffer 32 bit value, and post-increment the circular buffer pointer.

Parameters
buffer Specifies circular buffer.
Returns
Return the next circular buffer value.

Definition at line 46 of file Ifx_CircularBuffer.c.

◆ Ifx_CircularBuffer_read32()

void* Ifx_CircularBuffer_read32 | ( | Ifx_CircularBuffer * | buffer,
 |  | void * | data,
 |  | Ifx_SizeT | count
 | ) |  |

Copy count 32 bit words from the circular buffer to the data array.

Parameters
buffer | Specifies circular buffer.
data | Specifies destination pointer.
count | Specifies number of 32 bit words to be copied. count MUST be >= 1.
Returns
Returns the updated data pointer data = ((uint32*)data) + count

Definition at line 116 of file Ifx_CircularBuffer.c.

◆ Ifx_CircularBuffer_read8()

void* Ifx_CircularBuffer_read8 | ( | Ifx_CircularBuffer * | buffer,
 |  | void * | data,
 |  | Ifx_SizeT | count
 | ) |  |

Copy count bytes from the circular buffer to the data array.

Parameters
buffer | Specifies circular buffer.
data | Specifies destination pointer.
count | Specifies number of bytes to be copied. count MUST be >= 1.
Returns
Returns the updated data pointer data = ((uint8*)data) + count

Definition at line 95 of file Ifx_CircularBuffer.c.

◆ Ifx_CircularBuffer_write32()

const void* Ifx_CircularBuffer_write32 | ( | Ifx_CircularBuffer * | buffer,
 |  | const void * | data,
 |  | Ifx_SizeT | count
 | ) |  |

Copy count 32 bit words from the data array to the circular buffer.

Parameters
buffer | Specifies circular buffer.
data | Specifies source pointer.
count | Specifies number of 32 bit words to be copied. count MUST be >= 1.
Returns
Returns the updated data pointer data = ((uint32*)data) + count

Definition at line 160 of file Ifx_CircularBuffer.c.

◆ Ifx_CircularBuffer_write8()

const void* Ifx_CircularBuffer_write8 | ( | Ifx_CircularBuffer * | buffer,
 |  | const void * | data,
 |  | Ifx_SizeT | count
 | ) |  |

Copy count bytes from the data array to the circular buffer.

Parameters
buffer | Specifies circular buffer.
data | Specifies source pointer.
count | Specifies number of bytes to be copied. count MUST be >= 1.
Returns
Returns the updated data pointer data = ((uint8*)data) + count

Definition at line 139 of file Ifx_CircularBuffer.c.


iLLD_TC38A: FIFO

Files | Data Structures | Typedefs | Functions
FIFO
iLLD » General functionalities » Data handling
Collaboration diagram for FIFO:

Files

file Ifx_Fifo.h
FIFO buffer functions.

Data Structures

struct _Fifo

Typedefs

typedef struct _Fifo Ifx_Fifo

Functions

IFX_EXTERN boolean | Ifx_Fifo_canReadCount (Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if the required number of bytes are available in the buffer. More...
IFX_EXTERN boolean | Ifx_Fifo_canWriteCount (Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if there is enough free space to write the data in the buffer. More...
IFX_EXTERN void | Ifx_Fifo_clear (Ifx_Fifo *fifo)
Clear fifo contents. More...
IFX_EXTERN Ifx_Fifo * | Ifx_Fifo_create (Ifx_SizeT size, Ifx_SizeT elementSize)
Create a Fifo object. More...
IFX_EXTERN void | Ifx_Fifo_destroy (Ifx_Fifo *fifo)
Destroy the FIFO object. More...
IFX_EXTERN Ifx_Fifo * | Ifx_Fifo_init (void *buffer, Ifx_SizeT size, Ifx_SizeT elementSize)
Initialize the FIFO buffer object. More...
IFX_EXTERN Ifx_SizeT | Ifx_Fifo_read (Ifx_Fifo *fifo, void *data, Ifx_SizeT count, Ifx_TickTime timeout)
Read data from a fifo and remove them from the buffer. More...
IFX_EXTERN Ifx_SizeT | Ifx_Fifo_write (Ifx_Fifo *fifo, const void *data, Ifx_SizeT count, Ifx_TickTime timeout)
Write data into a fifo. More...
IFX_INLINE boolean | Ifx_Fifo_flush (Ifx_Fifo *fifo, Ifx_TickTime timeout)
Empty the fifo. More...
IFX_INLINE Ifx_SizeT | Ifx_Fifo_readCount (Ifx_Fifo *fifo)
Returns the size of the data in the buffer in bytes. More...
IFX_INLINE Ifx_SizeT | Ifx_Fifo_writeCount (Ifx_Fifo *fifo)
Returns the free size in bytes. More...
IFX_INLINE boolean | Ifx_Fifo_isEmpty (Ifx_Fifo *fifo)
Indicates if the fifo is empty. More...

Detailed Description

This module implements the FIFO buffer functionality.

Data Structure Documentation

◆ _Fifo

struct _Fifo

Fifo object

Definition at line 70 of file Ifx_Fifo.h.

Collaboration diagram for _Fifo:
[legend]
Data Fields
void * | buffer | aligned on 64 bit boundary
Ifx_SizeT | elementSize | minimum number of bytes (block) added / removed to / from the buffer
Ifx_SizeT | endIndex | buffer valid data end index
volatile boolean | eventReader | event set by the writer to signal the reader that the required data are available in the buffer
volatile boolean | eventWriter | event set by the reader to signal the writer that the required free space are available in the buffer
Ifx_Fifo_Shared | shared | data shared between reader / writer
Ifx_SizeT | size | multiple of 8 bit, max 0xFFF8
Ifx_SizeT | startIndex | buffer valid data start index

Typedef Documentation

◆ Ifx_Fifo

typedef struct _Fifo Ifx_Fifo

Fifo object

Function Documentation

◆ Ifx_Fifo_canReadCount()

IFX_EXTERN boolean Ifx_Fifo_canReadCount | ( | Ifx_Fifo * | fifo,
 |  | Ifx_SizeT | count,
 |  | Ifx_TickTime | timeout
 | ) |  |

Indicates if the required number of bytes are available in the buffer.

Should not be called from an interrupt as this function may wait forever

Parameters
fifo | Pointer on the Fifo object
count | in bytes
timeout | in system timer ticks
Returns
TRUE if at least count bytes can be read from the buffer, else the Event is armed to be set when the buffer count is bigger or equal to the requested count

Definition at line 136 of file Ifx_Fifo.c.

Referenced by IfxAsclin_Asc_canReadCount().

◆ Ifx_Fifo_canWriteCount()

IFX_EXTERN boolean Ifx_Fifo_canWriteCount | ( | Ifx_Fifo * | fifo,
 |  | Ifx_SizeT | count,
 |  | Ifx_TickTime | timeout
 | ) |  |

Indicates if there is enough free space to write the data in the buffer.

Should not be called from an interrupt as this function may wait forever

Parameters
fifo | Pointer on the Fifo object
count | in bytes
timeout | in system timer ticks
Returns
TRUE if at least count bytes can be written to the buffer, if not the Event is armed to be set when the buffer free count is bigger or equal to the requested count

Definition at line 296 of file Ifx_Fifo.c.

Referenced by Ifx_Fifo_flush(), and IfxAsclin_Asc_canWriteCount().

◆ Ifx_Fifo_clear()

IFX_EXTERN void Ifx_Fifo_clear ( Ifx_Fifo * fifo )

Clear fifo contents.

Parameters
fifo Pointer on the Fifo object
Returns
void

Definition at line 259 of file Ifx_Fifo.c.

Referenced by IfxAsclin_Asc_clearRx(), and IfxAsclin_Asc_clearTx().

◆ Ifx_Fifo_create()

IFX_EXTERN Ifx_Fifo* Ifx_Fifo_create | ( | Ifx_SizeT | size,
 |  | Ifx_SizeT | elementSize
 | ) |  |

Create a Fifo object.

The memory required for the object is allocated dynamically.

Parameters
size | Specifies the FIFO buffer size in bytes
elementSize | Specifies data element size in bytes. size must be bigger or equal to elemenntSize.
Returns
returns a pointer to the FIFO object
See also
Ifx_Fifo_destroy()

Definition at line 68 of file Ifx_Fifo.c.

Referenced by IfxAsclin_Asc_initModule().

◆ Ifx_Fifo_destroy()

IFX_EXTERN void Ifx_Fifo_destroy ( Ifx_Fifo * fifo )

Destroy the FIFO object.

This function must be called to destroy the fifo object when created with Ifx_Fifo_create()

Parameters
fifo Pointer on the Fifo object
Returns
void
See also
Ifx_Fifo_create()

Definition at line 85 of file Ifx_Fifo.c.

◆ Ifx_Fifo_flush()

IFX_INLINE boolean Ifx_Fifo_flush | ( | Ifx_Fifo * | fifo,
 |  | Ifx_TickTime | timeout
 | ) |  |

Empty the fifo.

Parameters
fifo | Pointer on the Fifo object
timeout | in system timer ticks
Returns
TRUE if the buffer is emptied.

Definition at line 186 of file Ifx_Fifo.h.

Referenced by IfxAsclin_Asc_flushTx().

◆ Ifx_Fifo_init()

IFX_EXTERN Ifx_Fifo* Ifx_Fifo_init | ( | void * | buffer,
 |  | Ifx_SizeT | size,
 |  | Ifx_SizeT | elementSize
 | ) |  |

Initialize the FIFO buffer object.

Parameters
buffer | Specifies the FIFO object address.
size | Specifies the FIFO buffer size in bytes
elementSize | Specifies data element size in bytes. size must be bigger or equal to elemenntSize.
Returns
Returns a pointer on the FIFO object
Note
: The buffer parameter must point on a free memory location where the buffer object will be initialised. The size of this area must be at least equals to "size + sizeof(Ifx_Fifo) + 8". Not taking this in account may result in unpredictable behavior.

Definition at line 91 of file Ifx_Fifo.c.

Referenced by Ifx_Fifo_create(), and IfxAsclin_Asc_initModule().

◆ Ifx_Fifo_isEmpty()

IFX_INLINE boolean Ifx_Fifo_isEmpty ( Ifx_Fifo * fifo )

Indicates if the fifo is empty.

Parameters
fifo Pointer on the Ifx_Fifo object
Return values
TRUE | is the buffer is empty
FALSE | is the buffer is not empty

Definition at line 232 of file Ifx_Fifo.h.

Referenced by IfxAsclin_Asc_initiateTransmission(), and IfxAsclin_Asc_isrTransmit().

◆ Ifx_Fifo_read()

IFX_EXTERN Ifx_SizeT Ifx_Fifo_read | ( | Ifx_Fifo * | fifo,
 |  | void * | data,
 |  | Ifx_SizeT | count,
 |  | Ifx_TickTime | timeout
 | ) |  |

Read data from a fifo and remove them from the buffer.

Only complete elements are returned, if count is not a multiple of elementSize then the incomplete element is not read/removed from the buffer.

Parameters
fifo | Pointer on the Fifo object
data | Pointer to the data buffer for storing values
count | in bytes
timeout | in system timer ticks
Returns
return the number of byte that could not be read

Definition at line 208 of file Ifx_Fifo.c.

Referenced by IfxAsclin_Asc_initiateTransmission(), IfxAsclin_Asc_isrTransmit(), and IfxAsclin_Asc_read().

◆ Ifx_Fifo_readCount()

IFX_INLINE Ifx_SizeT Ifx_Fifo_readCount ( Ifx_Fifo * fifo )

Returns the size of the data in the buffer in bytes.

Parameters
fifo Pointer on the Fifo object

Note as the Ifx_Fifo_write / Ifx_Fifo_read function does only write blocks which are a multiple of fifo->elementSize, the Ifx_Fifo_readCount / Ifx_Fifo_writeCount return a multiple of fifo->elementSize

Returns
Returns the size of the data in the buffer in bytes

Definition at line 203 of file Ifx_Fifo.h.

Referenced by Ifx_Fifo_canReadCount(), Ifx_Fifo_canWriteCount(), Ifx_Fifo_isEmpty(), Ifx_Fifo_writeCount(), IfxAsclin_Asc_getReadCount(), and IfxAsclin_Asc_isrTransmit().

◆ Ifx_Fifo_write()

IFX_EXTERN Ifx_SizeT Ifx_Fifo_write | ( | Ifx_Fifo * | fifo,
 |  | const void * | data,
 |  | Ifx_SizeT | count,
 |  | Ifx_TickTime | timeout
 | ) |  |

Write data into a fifo.

Only complete elements are written to the buffer, if count is not a multiple of elementSize then the incomplete element are not written to the buffer.

Parameters
fifo | Pointer on the Fifo object
data | Pointer to the data buffer to write into the Fifo
count | in bytes
timeout | in system timer ticks

Definition at line 366 of file Ifx_Fifo.c.

Referenced by IfxAsclin_Asc_isrReceive(), and IfxAsclin_Asc_write().

◆ Ifx_Fifo_writeCount()

IFX_INLINE Ifx_SizeT Ifx_Fifo_writeCount ( Ifx_Fifo * fifo )

Returns the free size in bytes.

Parameters
fifo Pointer on the Fifo object

Note as the Ifx_Fifo_write / Ifx_Fifo_read function does only write blocks which are a multiple of fifo->elementSize, the Ifx_Fifo_readCount / Ifx_Fifo_writeCount return a multiple of fifo->elementSize

Returns
Returns the free size in bytes

Definition at line 219 of file Ifx_Fifo.h.

Referenced by IfxAsclin_Asc_getWriteCount().


iLLD_TC38A: Ifx_Fifo.h File Reference

  • _Lib
  • DataHandling
Data Structures | Typedefs | Functions
Ifx_Fifo.h File Reference
iLLD » General functionalities » Data handling » FIFO

FIFO buffer functions. More...

#include "Ifx_Cfg.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
Include dependency graph for Ifx_Fifo.h:

Go to the source code of this file.

Data Structures

struct | Ifx_Fifo_Shared
struct | _Fifo

Typedefs

typedef struct _Fifo Ifx_Fifo

Functions

IFX_EXTERN boolean | Ifx_Fifo_canReadCount (Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if the required number of bytes are available in the buffer. More...
IFX_EXTERN boolean | Ifx_Fifo_canWriteCount (Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if there is enough free space to write the data in the buffer. More...
IFX_EXTERN void | Ifx_Fifo_clear (Ifx_Fifo *fifo)
Clear fifo contents. More...
IFX_EXTERN Ifx_Fifo * | Ifx_Fifo_create (Ifx_SizeT size, Ifx_SizeT elementSize)
Create a Fifo object. More...
IFX_EXTERN void | Ifx_Fifo_destroy (Ifx_Fifo *fifo)
Destroy the FIFO object. More...
IFX_EXTERN Ifx_Fifo * | Ifx_Fifo_init (void *buffer, Ifx_SizeT size, Ifx_SizeT elementSize)
Initialize the FIFO buffer object. More...
IFX_EXTERN Ifx_SizeT | Ifx_Fifo_read (Ifx_Fifo *fifo, void *data, Ifx_SizeT count, Ifx_TickTime timeout)
Read data from a fifo and remove them from the buffer. More...
IFX_EXTERN Ifx_SizeT | Ifx_Fifo_write (Ifx_Fifo *fifo, const void *data, Ifx_SizeT count, Ifx_TickTime timeout)
Write data into a fifo. More...
IFX_INLINE boolean | Ifx_Fifo_flush (Ifx_Fifo *fifo, Ifx_TickTime timeout)
Empty the fifo. More...
IFX_INLINE Ifx_SizeT | Ifx_Fifo_readCount (Ifx_Fifo *fifo)
Returns the size of the data in the buffer in bytes. More...
IFX_INLINE Ifx_SizeT | Ifx_Fifo_writeCount (Ifx_Fifo *fifo)
Returns the free size in bytes. More...
IFX_INLINE boolean | Ifx_Fifo_isEmpty (Ifx_Fifo *fifo)
Indicates if the fifo is empty. More...

Detailed Description

FIFO buffer functions.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_Fifo.h.

Data Structure Documentation

◆ Ifx_Fifo_Shared

struct Ifx_Fifo_Shared

Shared data of the FIFO

Definition at line 57 of file Ifx_Fifo.h.

Data Fields
Ifx_SizeT | count | number of bytes contained in the buffer
Ifx_SizeT | maxcount | Highest value seen in the count.
sint32 | readerWaitx | Number of bytes that the reader is waiting for. When the writer modify it to 0 the reader get signaled.
sint32 | writerWaitx | Number of byte that the writer expect to be free. When the reader modify it to 0 the reader get signaled.


iLLD_TC38A: Internal Mux

Modules
Internal Mux
iLLD » General functionalities
Collaboration diagram for Internal Mux:

Modules

FIFO

Detailed Description


iLLD_TC38A: FIFO

Data Structures | Functions
FIFO
iLLD » General functionalities » Internal Mux
Collaboration diagram for FIFO:

Data Structures

struct | Ifx_InternalMux_MuxConfig
struct | Ifx_InternalMux_Config

Functions

IFX_EXTERN void Ifx_InternalMux_init (const Ifx_InternalMux_Config *cfg)
Initialises the internal mux configuration. More...

Detailed Description

This module implements the Internal Mux functionality.

Data Structure Documentation

◆ Ifx_InternalMux_MuxConfig

struct Ifx_InternalMux_MuxConfig

Individual Mux configuration structure

Definition at line 62 of file Ifx_InternalMux.h.

Data Fields
uint32 | mask | Bit field position for the Mux/Demux selection.
volatile void * | regAddr | pointer to the register for Mux/Demux configuration
uint32 | value | Mux/Demux configuration value.

◆ Ifx_InternalMux_Config

struct Ifx_InternalMux_Config

Global/Combined Mux configuration object

Definition at line 72 of file Ifx_InternalMux.h.

Collaboration diagram for Ifx_InternalMux_Config:
[legend]
Data Fields
Ifx_InternalMux_MuxConfig * | muxConfig | pointer to the internal mux config array
uint32 | size | size of the internal mux configuration array

Function Documentation

◆ Ifx_InternalMux_init()

IFX_EXTERN void Ifx_InternalMux_init ( const Ifx_InternalMux_Config * cfg )

Initialises the internal mux configuration.

Parameters
cfg Pointer on the Global Mux Configuration object
Returns
None

Definition at line 53 of file Ifx_InternalMux.c.


iLLD_TC38A: IfxStdIf.h File Reference

  • Service
  • CpuGeneric
  • StdIf
Typedefs
IfxStdIf.h File Reference
iLLD

Standard interface types. More...

#include "Cpu/Std/Ifx_Types.h"
Include dependency graph for IfxStdIf.h:

Go to the source code of this file.

Typedefs

typedef void * IfxStdIf_InterfaceDriver
Pointer to the specific interface driver. More...

Detailed Description

Standard interface types.

Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
Date
2014-02-27 20:08:23 GMT
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxStdIf.h.

Typedef Documentation

◆ IfxStdIf_InterfaceDriver

typedef void* IfxStdIf_InterfaceDriver

Pointer to the specific interface driver.

Definition at line 115 of file IfxStdIf.h.


iLLD_TC38A: Service software

Modules
Service software
Collaboration diagram for Service software:

Modules

Utilities
Standard interface (Obsolete)
Standard interface
System Engineering

Detailed Description


iLLD_TC38A: Utilities

Modules
Utilities
Service software
Collaboration diagram for Utilities:

Modules

Assertion

Detailed Description


iLLD_TC38A: Assertion

Files | Macros
Assertion
Service software » Utilities
Collaboration diagram for Assertion:

Files

file Ifx_Assert.h
Assert functions.

Macros

#define | IFX_VERBOSE_LEVEL_OFF (0)
Assertion level off, assertion is disabled. More...
#define | IFX_VERBOSE_LEVEL_FAILURE (1)
Assertion level failure, a debug instruction is inserted if enabled. More...
#define | IFX_VERBOSE_LEVEL_ERROR (2)
Assertion level error, a debug instruction is inserted if enabled. More...
#define | IFX_VERBOSE_LEVEL_WARNING (3)
Assertion level warning. More...
#define | IFX_VERBOSE_LEVEL_INFO (4)
Assertion level info. More...
#define | IFX_VERBOSE_LEVEL_DEBUG (5)
Assertion level debug. More...
#define | IFX_ASSERT_FEATURE_NOT_IMPLEMENTED (FALSE)
Constant to be used to indicate not implemented feature. More...
#define | IFX_ASSERT_FEATURE_NOT_AVAILABLE (FALSE)
Feature is not available on the selected hardware. More...
#define | IFX_ASSERT(level, expr) ((void)0)
#define | IFX_VALIDATE(level, expr) (expr)

Detailed Description

This module implements assertion functions.

Macro Definition Documentation

◆ IFX_ASSERT

#define IFX_ASSERT | ( | level,
 |  | expr
 | ) | ((void)0)

Definition at line 69 of file Ifx_Assert.h.

Referenced by Ifx_Console_print(), Ifx_Console_printAlign(), Ifx_Fifo_canReadCount(), Ifx_Fifo_canWriteCount(), Ifx_Fifo_init(), Ifx_Fifo_read(), Ifx_Fifo_write(), Ifx_Shell_cmdEscapeProcess(), Ifx_Shell_process(), IfxAsclin_Asc_initModule(), IfxAsclin_Lin_receiveHeader(), IfxAsclin_Lin_receiveResponse(), IfxAsclin_Lin_sendHeader(), IfxAsclin_Lin_sendResponse(), IfxAsclin_setBitTiming(), IfxCan_Can_initNode(), IfxCan_Node_setBitTiming(), IfxCan_Node_setFastBitTiming(), IfxCan_Node_setTransmitFifoQueueMode(), IfxCcu6_Icu_initChannel(), IfxCcu6_PwmBc_initModule(), IfxCcu6_PwmHl_init(), IfxCcu6_PwmHl_setMode(), IfxCcu6_setT12InputSignal(), IfxCcu6_setT13InputSignal(), IfxCcu6_Timer_initModule(), IfxCcu6_TimerWithTrigger_init(), IfxCcu6_TPwm_initModule(), IfxCpu_setSafetyTaskIdentifier(), IfxDma_Dma_configureTransactionSet(), IfxEvadc_getSrcAddress(), IfxEvadc_setFastCompareReferenceValue(), IfxEvadc_setFastCompareSampleTimeControl(), IfxGeth_Eth_initReceiveDescriptors(), IfxGeth_Eth_initTransmitDescriptors(), IfxGeth_Eth_sendTransmitBuffer(), IfxGpt12_T2_setEudInput(), IfxGpt12_T2_setInput(), IfxGpt12_T3_setCounterInputMode(), IfxGpt12_T3_setMode(), IfxGpt12_T5_setEudInput(), IfxGpt12_T5_setInput(), IfxGpt12_T5_setMode(), IfxGpt12_T6_setCounterInputMode(), IfxGpt12_T6_setEudInput(), IfxGpt12_T6_setInput(), IfxGpt12_T6_setMode(), IfxGtm_Atom_Dtm_PwmHl_init(), IfxGtm_Atom_Dtm_PwmHl_setMode(), IfxGtm_Atom_PwmHl_init(), IfxGtm_Atom_PwmHl_setMode(), IfxGtm_Atom_Timer_init(), IfxGtm_Psm_Fifo_setChannelEndAddress(), IfxGtm_Psm_Fifo_setChannelLowerWatermark(), IfxGtm_Psm_Fifo_setChannelSize(), IfxGtm_Psm_Fifo_setChannelStartAddress(), IfxGtm_Psm_Fifo_setChannelUpperWatermark(), IfxGtm_Tim_In_init(), IfxGtm_Tom_Dtm_PwmHl_init(), IfxGtm_Tom_Dtm_PwmHl_setMode(), IfxGtm_Tom_PwmHl_init(), IfxGtm_Tom_PwmHl_setMode(), IfxGtm_Tom_Timer_init(), IfxGtm_Trig_toCan(), IfxGtm_Trig_toEVadc(), IfxGtm_Trig_toMsc(), IfxGtm_Trig_toSent(), IfxIom_Driver_initLam(), IfxPort_modifyPinControllerSelection(), IfxPort_setPinControllerSelection(), IfxQspi_calculateExtendedConfigurationValue(), IfxQspi_calculateTimeQuantumLength(), IfxQspi_SpiMaster_initChannel(), IfxQspi_SpiMaster_packLongModeBuffer(), IfxQspi_SpiMaster_writeLong(), IfxScuCcu_setFsi2Frequency(), IfxScuCcu_setFsiFrequency(), IfxScuWdt_enableWatchdogWithDebugger(), IfxSmu_activateFSP(), IfxSmu_activateRunState(), IfxSmu_getRTMissedEvent(), IfxSmu_releaseFSP(), IfxSmu_setAlarmAction(), IfxSmuStdby_getSmuStdbyAlarmGroupStatus(), IfxSmuStdby_getSmuStdbyAlarmStatus(), IfxSmuStdby_setFaultSignalAGConfigEventFlags(), IfxSmuStdby_setFaultSignalAlarmConfigEventFlag(), IfxSmuStdby_setSmuStdbyAlarmStatusFlag(), IfxStdIf_DPipe_print(), and IfxStm_Timer_init().

◆ IFX_ASSERT_FEATURE_NOT_AVAILABLE

#define IFX_ASSERT_FEATURE_NOT_AVAILABLE (FALSE)

Feature is not available on the selected hardware.

Definition at line 66 of file Ifx_Assert.h.

◆ IFX_ASSERT_FEATURE_NOT_IMPLEMENTED

#define IFX_ASSERT_FEATURE_NOT_IMPLEMENTED (FALSE)

Constant to be used to indicate not implemented feature.

Definition at line 64 of file Ifx_Assert.h.

Referenced by IfxQspi_SpiMaster_packLongModeBuffer(), and IfxQspi_SpiMaster_writeLong().

◆ IFX_VALIDATE

#define IFX_VALIDATE | ( | level,
 |  | expr
 | ) | (expr)

Definition at line 73 of file Ifx_Assert.h.

Referenced by Ifx_Fifo_create().

◆ IFX_VERBOSE_LEVEL_DEBUG

#define IFX_VERBOSE_LEVEL_DEBUG (5)

Assertion level debug.

Definition at line 61 of file Ifx_Assert.h.

◆ IFX_VERBOSE_LEVEL_ERROR

#define IFX_VERBOSE_LEVEL_ERROR (2)

Assertion level error, a debug instruction is inserted if enabled.

Definition at line 58 of file Ifx_Assert.h.

Referenced by Ifx_Assert_doLevel(), Ifx_Assert_doValidate(), Ifx_Console_print(), Ifx_Console_printAlign(), Ifx_Fifo_canReadCount(), Ifx_Fifo_canWriteCount(), Ifx_Fifo_create(), Ifx_Fifo_init(), Ifx_Fifo_read(), Ifx_Fifo_write(), Ifx_Shell_cmdEscapeProcess(), Ifx_Shell_process(), IfxAsclin_Asc_initModule(), IfxAsclin_Lin_receiveHeader(), IfxAsclin_Lin_receiveResponse(), IfxAsclin_Lin_sendHeader(), IfxAsclin_Lin_sendResponse(), IfxCan_Can_initNode(), IfxCan_Node_setBitTiming(), IfxCan_Node_setFastBitTiming(), IfxCan_Node_setTransmitFifoQueueMode(), IfxCcu6_Icu_initChannel(), IfxCcu6_PwmBc_initModule(), IfxCcu6_PwmHl_init(), IfxCcu6_PwmHl_setMode(), IfxCcu6_setT12InputSignal(), IfxCcu6_setT13InputSignal(), IfxCcu6_Timer_initModule(), IfxCcu6_TimerWithTrigger_init(), IfxCcu6_TPwm_initModule(), IfxCpu_setSafetyTaskIdentifier(), IfxDma_Dma_configureTransactionSet(), IfxGeth_Eth_initReceiveDescriptors(), IfxGeth_Eth_initTransmitDescriptors(), IfxGeth_Eth_sendTransmitBuffer(), IfxGpt12_T2_setEudInput(), IfxGpt12_T2_setInput(), IfxGpt12_T3_setCounterInputMode(), IfxGpt12_T3_setMode(), IfxGpt12_T5_setEudInput(), IfxGpt12_T5_setInput(), IfxGpt12_T5_setMode(), IfxGpt12_T6_setCounterInputMode(), IfxGpt12_T6_setEudInput(), IfxGpt12_T6_setInput(), IfxGpt12_T6_setMode(), IfxGtm_Atom_Dtm_PwmHl_init(), IfxGtm_Atom_Dtm_PwmHl_setMode(), IfxGtm_Atom_PwmHl_init(), IfxGtm_Atom_PwmHl_setMode(), IfxGtm_Atom_Timer_init(), IfxGtm_Psm_Fifo_setChannelEndAddress(), IfxGtm_Psm_Fifo_setChannelLowerWatermark(), IfxGtm_Psm_Fifo_setChannelSize(), IfxGtm_Psm_Fifo_setChannelStartAddress(), IfxGtm_Psm_Fifo_setChannelUpperWatermark(), IfxGtm_Tim_In_init(), IfxGtm_Tom_Dtm_PwmHl_init(), IfxGtm_Tom_Dtm_PwmHl_setMode(), IfxGtm_Tom_PwmHl_init(), IfxGtm_Tom_PwmHl_setMode(), IfxGtm_Tom_Timer_init(), IfxGtm_Trig_toCan(), IfxGtm_Trig_toEVadc(), IfxGtm_Trig_toMsc(), IfxGtm_Trig_toSent(), IfxIom_Driver_initLam(), IfxQspi_calculateTimeQuantumLength(), IfxQspi_SpiMaster_packLongModeBuffer(), IfxQspi_SpiMaster_writeLong(), IfxScuCcu_setFsi2Frequency(), IfxScuCcu_setFsiFrequency(), IfxScuWdt_enableWatchdogWithDebugger(), IfxSmu_activateFSP(), IfxSmu_activateRunState(), IfxSmu_getRTMissedEvent(), IfxSmu_releaseFSP(), IfxSmu_setAlarmAction(), IfxSmuStdby_getSmuStdbyAlarmGroupStatus(), IfxSmuStdby_getSmuStdbyAlarmStatus(), IfxSmuStdby_setFaultSignalAGConfigEventFlags(), IfxSmuStdby_setFaultSignalAlarmConfigEventFlag(), IfxSmuStdby_setSmuStdbyAlarmStatusFlag(), IfxStdIf_DPipe_print(), and IfxStm_Timer_init().

◆ IFX_VERBOSE_LEVEL_FAILURE

#define IFX_VERBOSE_LEVEL_FAILURE (1)

Assertion level failure, a debug instruction is inserted if enabled.

Definition at line 57 of file Ifx_Assert.h.

◆ IFX_VERBOSE_LEVEL_INFO

#define IFX_VERBOSE_LEVEL_INFO (4)

Assertion level info.

Definition at line 60 of file Ifx_Assert.h.

◆ IFX_VERBOSE_LEVEL_OFF

#define IFX_VERBOSE_LEVEL_OFF (0)

Assertion level off, assertion is disabled.

Definition at line 56 of file Ifx_Assert.h.

◆ IFX_VERBOSE_LEVEL_WARNING

#define IFX_VERBOSE_LEVEL_WARNING (3)

Assertion level warning.

Definition at line 59 of file Ifx_Assert.h.

Referenced by IfxAsclin_setBitTiming(), IfxEvadc_getSrcAddress(), IfxEvadc_setFastCompareReferenceValue(), IfxEvadc_setFastCompareSampleTimeControl(), IfxPort_modifyPinControllerSelection(), IfxPort_setPinControllerSelection(), IfxQspi_calculateExtendedConfigurationValue(), and IfxQspi_SpiMaster_initChannel().


iLLD_TC38A: Ifx_Assert.h File Reference

  • Service
  • CpuGeneric
  • _Utilities
Macros
Ifx_Assert.h File Reference
Service software » Utilities » Assertion

Assert functions. More...

#include "Ifx_Cfg.h"
#include "Cpu/Std/Ifx_Types.h"
Include dependency graph for Ifx_Assert.h:

Go to the source code of this file.

Macros

#define | IFX_VERBOSE_LEVEL_OFF (0)
Assertion level off, assertion is disabled. More...
#define | IFX_VERBOSE_LEVEL_FAILURE (1)
Assertion level failure, a debug instruction is inserted if enabled. More...
#define | IFX_VERBOSE_LEVEL_ERROR (2)
Assertion level error, a debug instruction is inserted if enabled. More...
#define | IFX_VERBOSE_LEVEL_WARNING (3)
Assertion level warning. More...
#define | IFX_VERBOSE_LEVEL_INFO (4)
Assertion level info. More...
#define | IFX_VERBOSE_LEVEL_DEBUG (5)
Assertion level debug. More...
#define | IFX_ASSERT_FEATURE_NOT_IMPLEMENTED (FALSE)
Constant to be used to indicate not implemented feature. More...
#define | IFX_ASSERT_FEATURE_NOT_AVAILABLE (FALSE)
Feature is not available on the selected hardware. More...
#define | IFX_ASSERT(level, expr) ((void)0)
#define | IFX_VALIDATE(level, expr) (expr)

Detailed Description

Assert functions.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-28 14:15:42 GMT
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_Assert.h.


iLLD_TC38A: Standard interface (Obsolete)

Modules
Standard interface (Obsolete)
Service software
Collaboration diagram for Standard interface (Obsolete):

Modules

ICU interface
PWM HL interface
Timer interface
TPWM interface
SPI interface

Detailed Description

Use Standard interface instead


iLLD_TC38A: ICU interface

ICU interface
Service software » Standard interface (Obsolete)
Collaboration diagram for ICU interface:


iLLD_TC38A: PWM HL interface

PWM HL interface
Service software » Standard interface (Obsolete)
Collaboration diagram for PWM HL interface:


iLLD_TC38A: Timer interface

Timer interface
Service software » Standard interface (Obsolete)
Collaboration diagram for Timer interface:


iLLD_TC38A: TPWM interface

TPWM interface
Service software » Standard interface (Obsolete)
Collaboration diagram for TPWM interface:


iLLD_TC38A: SPI interface

Data Structures | Typedefs | Enumerations | Functions
SPI interface
Service software » Standard interface (Obsolete)
Collaboration diagram for SPI interface:

Data Structures

struct | SpiIf_Flags
struct | SpiIf_Job
struct | SpiIf_funcs
struct | SpiIf_
struct | SpiIf_Config
struct | Spi_ErrorChecks
struct | SpiIf_ChMode
struct | SpiIf_Ch_
struct | SpiIf_ChConfig_

Typedefs

typedef struct SpiIf_Ch_ | SpiIf_Ch
Alias to the channel structure. More...
typedef struct SpiIf_ChConfig_ | SpiIf_ChConfig
typedef struct SpiIf_ | SpiIf
typedef SpiIf_Status(* | SpiIf_Exchange) (SpiIf_Ch *handle, const void *src, void *dest, Ifx_SizeT numOfData)
typedef SpiIf_Status(* | SpiIf_GetStatus) (SpiIf_Ch *handle)
typedef void(* | SpiIf_OnEvent) (SpiIf *handle)
typedef uint32 | SpiIf_SlsoTiming_HalfTsclk
typedef void(* | SpiIf_Cbk) (void *data)
SPI channel callback prototype. More...
typedef void(* | TxRxHandler) (SpiIf_Ch *handle)

Enumerations

enum SpiIf_Status {
SpiIf_Status_ok,
SpiIf_Status_busy,
SpiIf_Status_unknown
}
SPI Interface Status. More...
enum SpiIf_SlsoTiming {
SpiIf_SlsoTiming_0 = 0,
SpiIf_SlsoTiming_1,
SpiIf_SlsoTiming_2,
SpiIf_SlsoTiming_3,
SpiIf_SlsoTiming_4,
SpiIf_SlsoTiming_5,
SpiIf_SlsoTiming_6,
SpiIf_SlsoTiming_7
}
Slave select output timing. More...
enum SpiIf_DataHeading {
SpiIf_DataHeading_lsbFirst = 0,
SpiIf_DataHeading_msbFirst
}
Heading. More...
enum SpiIf_ShiftClock {
SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge = 0,
SpiIf_ShiftClock_shiftTransmitDataOnTrailingEdge
}
Clock phase. More...
enum SpiIf_ClockPolarity {
SpiIf_ClockPolarity_idleLow = 0,
SpiIf_ClockPolarity_idleHigh
}
Clock polarity. More...
enum SpiIf_Mode {
SpiIf_Mode_master,
SpiIf_Mode_slave,
SpiIf_Mode_undefined
}

Functions

IFX_INLINE void | SpiIf_wait (SpiIf_Ch *handle)
IFX_EXTERN void | SpiIf_initConfig (SpiIf_Config *config)
IFX_EXTERN void | SpiIf_initChannelConfig (SpiIf_ChConfig *config, SpiIf *driver)

Virtual functions

These functions are implemented by a driver.

IFX_INLINE SpiIf_Status | SpiIf_exchange (SpiIf_Ch *handle, const void *src, void *dest, Ifx_SizeT numOfData)
IFX_INLINE SpiIf_Status | SpiIf_getStatus (SpiIf_Ch *handle)

Detailed Description

Data Structure Documentation

◆ SpiIf_Flags

struct SpiIf_Flags

Definition at line 115 of file SpiIf.h.

Data Fields
uint32 | byteAccess: 1 | Channel status: 8bit / 16 bit access.
uint32 | onTransfer: 1 | Channel status: On transfer.

◆ SpiIf_Job

struct SpiIf_Job

Definition at line 121 of file SpiIf.h.

Data Fields
void * | data
Ifx_SizeT | remaining

◆ SpiIf_funcs

struct SpiIf_funcs

Definition at line 141 of file SpiIf.h.

Collaboration diagram for SpiIf_funcs:
[legend]
Data Fields
SpiIf_Exchange | exchange
SpiIf_GetStatus | getStatus
SpiIf_OnEvent | onError
SpiIf_OnEvent | onRx
SpiIf_OnEvent | onTx

◆ SpiIf_

struct SpiIf_

Definition at line 150 of file SpiIf.h.

Collaboration diagram for SpiIf_:
[legend]
Data Fields
SpiIf_Ch * | activeChannel | Channel actually transmitting / receiving.
pvoid | driver | Spi specific driver.
SpiIf_funcs | functions |
uint32 | rxCount |
uint32 | sending |
uint32 | txCount |

◆ SpiIf_Config

struct SpiIf_Config

Definition at line 160 of file SpiIf.h.

Data Fields
void * | buffer | Specifies the buffer location.The buffer parameter must point on a free memory location where the buffer object will be initialised. The Size of this area must be at least equals to "Size + sizeof(Ifx_Fifo) + 8", with "Size=config->bufferSize * Ifx_AlignOn32(sizeof(Spi_Ch*))". Not tacking this in account may result in unpredictable behaviour.
Ifx_SizeT | bufferSize | Specifies the number of channels that can be buffered. If 0, buffering is disabled.
Ifx_Priority | erPriority | Specifies the priority of the error interrupt.
IfxSrc_Tos | isrProvider | Specifies the handler of the interrupts.
float32 | maximumBaudrate | Maximum baudrate used by the channels, this value is used to optimise the SPI internal clock.
SpiIf_Mode | mode | Specifies the interface operation mode.
Ifx_Priority | rxPriority | Specifies the priority of the receive interrupt.
Ifx_Priority | txPriority | Specifies the priority of the transmit interrupt.

◆ Spi_ErrorChecks

struct Spi_ErrorChecks

Definition at line 176 of file SpiIf.h.

Data Fields
uint32 | baudrate: 1 | TRUE = checked, FALSE = ignored.
uint32 | phase: 1 | TRUE = checked, FALSE = ignored.
uint32 | receive: 1 | TRUE = checked, FALSE = ignored.
uint32 | reserved: 28 |
uint32 | transmit: 1 | TRUE = checked, FALSE = ignored.

◆ SpiIf_ChMode

struct SpiIf_ChMode

Channel operation mode

Definition at line 186 of file SpiIf.h.

Data Fields
uint32 | autoCS: 1 | 1 = chip select is controlled by the hardware module or, 0 = by software.
uint32 | clockPolarity: 1 | SpiIf_ClockPolarity
uint32 | csActiveLevel: 1 | Ifx_ActiveState
SpiIf_SlsoTiming_HalfTsclk | csInactiveDelay | CS Inactive Delay in Tsclk/2 units.
SpiIf_SlsoTiming_HalfTsclk | csLeadDelay | CS Lead Delay in Tsclk/2 units.
SpiIf_SlsoTiming_HalfTsclk | csTrailDelay | CS Trail Delay in Tsclk/2 units.
uint32 | dataHeading: 1 | SpiIf_DataHeading
uint32 | dataWidth: 6 | range 2 .. 32 bits (note 2 = 2-bits, 3 = 3-bits ...
uint32 | enabled: 1 | 1 = channel enabled, 0 = channel disabled
uint32 | loopback: 1 | 0 = normal mode, 1 = loopback mode
uint32 | parityCheck: 1 | 0 = disabled, 1 = enabled
uint32 | parityMode: 1 | Ifx_ParityMode
uint32 | shiftClock: 1 | SpiIf_ShiftClock

◆ SpiIf_Ch_

struct SpiIf_Ch_

Definition at line 211 of file SpiIf.h.

Collaboration diagram for SpiIf_Ch_:
[legend]
Data Fields
sint32 | baudrate | Real baudrate.
void * | callbackData | Specifies pointer to the user specific data on transmit end.
SpiIf * | driver | Pointer to the SPI interface driver.
Spi_ErrorChecks | errorChecks | Error checks.
SpiIf_Flags | flags |
SpiIf_Cbk | onExchangeEnd | Specifies the callback function on end of exchange.
SpiIf_Job | rx |
TxRxHandler | rxHandler |
SpiIf_Job | tx |
TxRxHandler | txHandler |

◆ SpiIf_ChConfig_

struct SpiIf_ChConfig_

Definition at line 225 of file SpiIf.h.

Collaboration diagram for SpiIf_ChConfig_:
[legend]
Data Fields
float32 | baudrate | Specifies the SPI baudrate.
SpiIf * | driver | Pointer to an implementation of SPI interface driver, e.g. IfxQspi_SpiMaster_ChannelConfig.
Spi_ErrorChecks | errorChecks |
SpiIf_ChMode | mode |

Typedef Documentation

◆ SpiIf

typedef struct SpiIf_ SpiIf

Definition at line 113 of file SpiIf.h.

◆ SpiIf_Cbk

typedef void(* SpiIf_Cbk) (void *data)

SPI channel callback prototype.

Definition at line 208 of file SpiIf.h.

◆ SpiIf_Ch

typedef struct SpiIf_Ch_ SpiIf_Ch

Alias to the channel structure.

Definition at line 111 of file SpiIf.h.

◆ SpiIf_ChConfig

typedef struct SpiIf_ChConfig_ SpiIf_ChConfig

Definition at line 112 of file SpiIf.h.

◆ SpiIf_Exchange

typedef SpiIf_Status(* SpiIf_Exchange) (SpiIf_Ch *handle, const void *src, void *dest, Ifx_SizeT numOfData)

Definition at line 135 of file SpiIf.h.

◆ SpiIf_GetStatus

typedef SpiIf_Status(* SpiIf_GetStatus) (SpiIf_Ch *handle)

Definition at line 136 of file SpiIf.h.

◆ SpiIf_OnEvent

typedef void(* SpiIf_OnEvent) (SpiIf *handle)

Definition at line 137 of file SpiIf.h.

◆ SpiIf_SlsoTiming_HalfTsclk

typedef uint32 SpiIf_SlsoTiming_HalfTsclk

Definition at line 138 of file SpiIf.h.

◆ TxRxHandler

typedef void(* TxRxHandler) (SpiIf_Ch *handle)

Definition at line 209 of file SpiIf.h.

Enumeration Type Documentation

◆ SpiIf_ClockPolarity

enum SpiIf_ClockPolarity

Clock polarity.

Enumerator
SpiIf_ClockPolarity_idleLow | Idle clock line is low
SpiIf_ClockPolarity_idleHigh | Idle clock line is high

Definition at line 101 of file SpiIf.h.

◆ SpiIf_DataHeading

enum SpiIf_DataHeading

Heading.

Enumerator
SpiIf_DataHeading_lsbFirst | LSB first
SpiIf_DataHeading_msbFirst | MSB first

Definition at line 87 of file SpiIf.h.

◆ SpiIf_Mode

enum SpiIf_Mode

SPI operation modes

Enumerator
SpiIf_Mode_master | Master mode.
SpiIf_Mode_slave | Slave mode.
SpiIf_Mode_undefined | Undefined mode.

Definition at line 128 of file SpiIf.h.

◆ SpiIf_ShiftClock

enum SpiIf_ShiftClock

Clock phase.

Enumerator
SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge | Shift Tx data on leading edge
SpiIf_ShiftClock_shiftTransmitDataOnTrailingEdge | Shift Tx data on training edge

Definition at line 94 of file SpiIf.h.

◆ SpiIf_SlsoTiming

enum SpiIf_SlsoTiming

Slave select output timing.

Enumerator
SpiIf_SlsoTiming_0 | zero delay clock
SpiIf_SlsoTiming_1 | 1 half-clock delay
SpiIf_SlsoTiming_2 | 2 half-clock delay
SpiIf_SlsoTiming_3 | 3 half-clock delay
SpiIf_SlsoTiming_4 | 4 half-clock delay
SpiIf_SlsoTiming_5 | 5 half-clock delay
SpiIf_SlsoTiming_6 | 6 half-clock delay
SpiIf_SlsoTiming_7 | 7 half-clock delay

Definition at line 74 of file SpiIf.h.

◆ SpiIf_Status

enum SpiIf_Status

SPI Interface Status.

Enumerator
SpiIf_Status_ok
SpiIf_Status_busy
SpiIf_Status_unknown

Definition at line 66 of file SpiIf.h.

Function Documentation

◆ SpiIf_exchange()

IFX_INLINE SpiIf_Status SpiIf_exchange | ( | SpiIf_Ch * | handle,
 |  | const void * | src,
 |  | void * | dest,
 |  | Ifx_SizeT | numOfData
 | ) |  |

Perform the SPI exchange operation.

Parameters
handle | Pointer to an implementation of SPI interface driver
src | Pointer to the start of data buffer for data to transmit
dest | Pointer to the start of data buffer for received data
numOfData | specifies number of byte/bit to transfer
Returns
STATUS of SPI
Note
the src and dest may be the same data location.

Definition at line 271 of file SpiIf.h.

◆ SpiIf_getStatus()

IFX_INLINE SpiIf_Status SpiIf_getStatus ( SpiIf_Ch * handle )

get the SPI status

  • Parameters
    handle Pointer to an implementation of SPI interface driver
    Returns
    STATUS of SPI

Definition at line 281 of file SpiIf.h.

◆ SpiIf_initChannelConfig()

IFX_EXTERN void SpiIf_initChannelConfig | ( | SpiIf_ChConfig * | config,
 |  | SpiIf * | driver
 | ) |  |

Definition at line 57 of file SpiIf.c.

Referenced by IfxQspi_SpiMaster_initChannelConfig(), and IfxQspi_SpiSlave_initModule().

◆ SpiIf_initConfig()

IFX_EXTERN void SpiIf_initConfig ( SpiIf_Config * config )

Definition at line 44 of file SpiIf.c.

Referenced by IfxQspi_SpiMaster_initModuleConfig(), and IfxQspi_SpiSlave_initModuleConfig().

◆ SpiIf_wait()

IFX_INLINE void SpiIf_wait ( SpiIf_Ch * handle )

Wait as long as the transmission is on-going

Note
This function blocks CPU for some-time

Definition at line 256 of file SpiIf.h.


iLLD_TC38A: Standard interface

Modules
Standard interface
Service software
Collaboration diagram for Standard interface:

Modules

Standard interface: Data Pipe
Standard interface: Position interface
Standard interface: Multi-channels, dual-complementary PWM interface
Standard interface: Timer

Detailed Description

Terms
Term | Descri
Standard Interface | Interface defined in this document
Interface Driver | Specific device driver as defined by the iLLD
Standard Interface Driver | Specific interface driver which implements the Standard Interface
API used at runtime | API that are used after initialization
Module | Hardware functional block / IP
Overview
The Standard Interface provides generic runtime API written in C for common use case application. It abstracts the underlaying Interface Driver, i.e. the runtime API is completely device independent. It provides generic API for common use case application.

Example of Standard Interface:

  • Serial communication interface
  • PWM interface
  • Position sensor interface
  • Timer interface
  • EEPROM interface

The target is to be able to exchange the microcontroller or external connected devices on which the application is based with a minimal impact on the application code, to reduce the application software development and maintenance effort. This is archived by the Standard Interface, for which, changing the hardware only requires the update of the device configuration settings and the device initialization code. The API used at runtime, which represents the majority and the complexitity of the related code keep unchanged.

Motivation: because the current software developed for the automotive applications mainly don’t use C++, the Standard Interface provides a common definition for the device driver and an alternative layer for different hardware instead of using C++ interface wrapper class.

The below figure shows the layers used and an example of APIs used by the application.

Standard interface layers
Standard interface example: Serial interface as data pipe
Standard interface example: Timer

The Standard Interface is implemented by Standard Interface wrapper by providing the function pointer to the custom functions. This gives the possibility to the programmer to use it or not. When used, it increases the code portability but slightly decreases the performance in term of run time execution and code size. When not used, the performance is not affected.

Definition
The standard interface requires the definition of at least two components: the standard interface component and the standard interface wrapper component. The standard interface component defines for each standard interface a standard interface object and a set of standard APIs used at runtime by the application. The standard interface wrapper component initializes the standard interface component by linking it to the interface driver.
Attention
: The application shall explicitly use the API provided by the standard interface component at runtime to access driver’s parameters (setter/ getter) or action (methods). Trying to access members of the standard interface component directly though the object may not guaranty future code compatibility. The same applies to the interface driver (reminder).
Convention

The Standard interface defines the following files:

Path/File | Description --—
1_SrvSw/StdIf/IfxStdIf.h | Global standard interface definitions
1_SrvSw/StdIf/IfxStdIf_<standard interface>.h | Specific standard interface definitions
TCxxx/<Module>/Ifx<Module>_<interface>.h/c | Specific standard interface wrapper initialization API are reconized by the name Ifx<Module>_<interface>_StdIf<std interface>Init()
TCxxx/<Module>/Ifx<Module>_<interface>.h/c | Specific standard interface wrapper function API are named according to the interface driver naming rules


iLLD_TC38A: Standard interface: Data Pipe

Functions
Standard interface: Data Pipe
Service software » Standard interface
Collaboration diagram for Standard interface: Data Pipe:

Functions

IFX_INLINE boolean | IfxStdIf_DPipe_write (IfxStdIf_DPipe *stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Write binary data into the IfxStdIf_DPipe. More...
IFX_INLINE boolean | IfxStdIf_DPipe_read (IfxStdIf_DPipe *stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Read data from the IfxStdIf_DPipe object. More...
IFX_INLINE sint32 | IfxStdIf_DPipe_getReadCount (IfxStdIf_DPipe *stdIf)
Returns the number of bytes in the rx buffer. More...
IFX_INLINE sint32 | IfxStdIf_DPipe_getWriteCount (IfxStdIf_DPipe *stdIf)
Returns the number of free bytes (free space) in the tx buffer. More...
IFX_INLINE boolean | IfxStdIf_DPipe_canReadCount (IfxStdIf_DPipe *stdIf, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if the required number of bytes are available for read in the buffer. More...
IFX_INLINE boolean | IfxStdIf_DPipe_canWriteCount (IfxStdIf_DPipe *stdIf, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if there is enough free space to write the data in the buffer. More...
IFX_INLINE IfxStdIf_DPipe_ReadEvent | IfxStdIf_DPipe_getReadEvent (IfxStdIf_DPipe *stdIf)
Returns read event object. More...
IFX_INLINE IfxStdIf_DPipe_WriteEvent | IfxStdIf_DPipe_getWriteEvent (IfxStdIf_DPipe *stdIf)
Returns write event object. More...
IFX_INLINE boolean | IfxStdIf_DPipe_flushTx (IfxStdIf_DPipe *stdIf, Ifx_TickTime timeout)
Flush the transmit buffer by transmitting all data. More...
IFX_INLINE void | IfxStdIf_DPipe_clearTx (IfxStdIf_DPipe *stdIf)
Clears the TX buffer by removing all data. More...
IFX_INLINE void | IfxStdIf_DPipe_clearRx (IfxStdIf_DPipe *stdIf)
Clears the RX buffer by removing all data. More...
IFX_INLINE void | IfxStdIf_DPipe_onReceive (IfxStdIf_DPipe *stdIf)
handler called on reveive event More...
IFX_INLINE void | IfxStdIf_DPipe_onTransmit (IfxStdIf_DPipe *stdIf)
handler called on transmit event More...
IFX_INLINE void | IfxStdIf_DPipe_onError (IfxStdIf_DPipe *stdIf)
handler called on error event More...
IFX_INLINE uint32 | IfxStdIf_DPipe_getSendCount (IfxStdIf_DPipe *stdIf)
Returns number of bytes send. More...
IFX_INLINE Ifx_TickTime | IfxStdIf_DPipe_getTxTimeStamp (IfxStdIf_DPipe *stdIf)
Returns the time stamp of the last transmit data. More...
IFX_INLINE void | IfxStdIf_DPipe_resetSendCount (IfxStdIf_DPipe *stdIf)
Reset the sendCount counter. More...
IFX_EXTERN void | IfxStdIf_DPipe_print (IfxStdIf_DPipe *stdIf, pchar format,...)

Detailed Description

The standard interafce data pipe (DPipe) abstract the hardware used for data transfer. It provide, after proper initialization an hardware independant way to write and read data to/from as communciation channel.

Porting StandardIo to DPipe
replace all
  • StandardIo type with IfxStdIf_DPipe
  • StandardIo_print with IfxStdIf_DPipe_print delete StandardIo.c and StandardIo.h Include "StdIf/IfxStdIf_DPipe.h" instead of "SysSe/Bsp/StandardIo.h"

The following files are already ported: Ifx_Console, Ifx_Shell

Function Documentation

◆ IfxStdIf_DPipe_canReadCount()

IFX_INLINE boolean IfxStdIf_DPipe_canReadCount | ( | IfxStdIf_DPipe * | stdIf,
 |  | Ifx_SizeT | count,
 |  | Ifx_TickTime | timeout
 | ) |  |

Indicates if the required number of bytes are available for read in the buffer.

Parameters
stdif | Pointer to the interface driver object
count | Pointer to the count of data (in bytes).
timeout | in system timer ticks
Returns
Returns TRUE if at least count bytes are available for read in the rx buffer, if not the Event is armed to be set when the buffer count is bigger or equal to the requested count

Definition at line 291 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_canWriteCount()

IFX_INLINE boolean IfxStdIf_DPipe_canWriteCount | ( | IfxStdIf_DPipe * | stdIf,
 |  | Ifx_SizeT | count,
 |  | Ifx_TickTime | timeout
 | ) |  |

Indicates if there is enough free space to write the data in the buffer.

Parameters
stdif | Pointer to the interface driver object
count | Pointer to the count of data (in bytes).
timeout | in system timer ticks
Returns
Returns TRUE if at least count bytes can be written to the tx buffer, if not the Event is armed to be set when the buffer free count is bigger or equal to the requested count

Definition at line 299 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_clearRx()

IFX_INLINE void IfxStdIf_DPipe_clearRx ( IfxStdIf_DPipe * stdIf )

Clears the RX buffer by removing all data.

Parameters
stdif Pointer to the interface driver object
Returns
void

Definition at line 339 of file IfxStdIf_DPipe.h.

Referenced by Ifx_Shell_enable().

◆ IfxStdIf_DPipe_clearTx()

IFX_INLINE void IfxStdIf_DPipe_clearTx ( IfxStdIf_DPipe * stdIf )

Clears the TX buffer by removing all data.

Parameters
stdif Pointer to the interface driver object
Returns
void

Definition at line 331 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_flushTx()

IFX_INLINE boolean IfxStdIf_DPipe_flushTx | ( | IfxStdIf_DPipe * | stdIf,
 |  | Ifx_TickTime | timeout
 | ) |  |

Flush the transmit buffer by transmitting all data.

Parameters
stdif | Pointer to the interface driver object
timeout | timeout for the flush operation
Returns
Returns TRUE if the FIFO is empty

Definition at line 323 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_getReadCount()

IFX_INLINE sint32 IfxStdIf_DPipe_getReadCount ( IfxStdIf_DPipe * stdIf )

Returns the number of bytes in the rx buffer.

Parameters
stdif Pointer to the interface driver object
Returns
Returns the number of bytes in the rx buffer

Definition at line 275 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_getReadEvent()

IFX_INLINE IfxStdIf_DPipe_ReadEvent IfxStdIf_DPipe_getReadEvent ( IfxStdIf_DPipe * stdIf )

Returns read event object.

Parameters
stdif Pointer to the interface driver object
Returns
Returns read event object

Definition at line 307 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_getSendCount()

IFX_INLINE uint32 IfxStdIf_DPipe_getSendCount ( IfxStdIf_DPipe * stdIf )

Returns number of bytes send.

Parameters
stdif Pointer to the interface driver object
Returns
Returns number of bytes send

Definition at line 371 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_getTxTimeStamp()

IFX_INLINE Ifx_TickTime IfxStdIf_DPipe_getTxTimeStamp ( IfxStdIf_DPipe * stdIf )

Returns the time stamp of the last transmit data.

Parameters
stdif Pointer to the interface driver object
Returns
Returns the time stamp of the last transmit data

Definition at line 379 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_getWriteCount()

IFX_INLINE sint32 IfxStdIf_DPipe_getWriteCount ( IfxStdIf_DPipe * stdIf )

Returns the number of free bytes (free space) in the tx buffer.

Parameters
stdif Pointer to the interface driver object
Returns
Returns the number of free bytes in the tx buffer

Definition at line 283 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_getWriteEvent()

IFX_INLINE IfxStdIf_DPipe_WriteEvent IfxStdIf_DPipe_getWriteEvent ( IfxStdIf_DPipe * stdIf )

Returns write event object.

Parameters
stdif Pointer to the interface driver object
Returns
Returns write event object

Definition at line 315 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_onError()

IFX_INLINE void IfxStdIf_DPipe_onError ( IfxStdIf_DPipe * stdIf )

handler called on error event

Parameters
stdif Pointer to the interface driver object
Returns
none

Definition at line 363 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_onReceive()

IFX_INLINE void IfxStdIf_DPipe_onReceive ( IfxStdIf_DPipe * stdIf )

handler called on reveive event

Parameters
stdif Pointer to the interface driver object
Returns
none

Definition at line 347 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_onTransmit()

IFX_INLINE void IfxStdIf_DPipe_onTransmit ( IfxStdIf_DPipe * stdIf )

handler called on transmit event

Parameters
stdif Pointer to the interface driver object
Returns
none

Definition at line 355 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_print()

IFX_EXTERN void IfxStdIf_DPipe_print | ( | IfxStdIf_DPipe * | stdIf,
 |  | pchar | format,
 |  |  | ...
 | ) |  |

Definition at line 50 of file IfxStdIf_DPipe.c.

Referenced by Ifx_Assert_doLevel(), Ifx_Assert_doValidate(), Ifx_Shell_bbProtocolStart(), Ifx_Shell_cmdEscapeProcess(), Ifx_Shell_init(), Ifx_Shell_printSyntax(), Ifx_Shell_process(), Ifx_Shell_protocolStart(), Ifx_Shell_showHelpSingle(), Ifx_Shell_showHelpSingleCommand(), and IfxStdIf_Pos_printStatus().

◆ IfxStdIf_DPipe_read()

IFX_INLINE boolean IfxStdIf_DPipe_read | ( | IfxStdIf_DPipe * | stdIf,
 |  | void * | data,
 |  | Ifx_SizeT * | count,
 |  | Ifx_TickTime | timeout
 | ) |  |

Read data from the IfxStdIf_DPipe object.

Initially the parameter 'count' specifies count of data to read. After execution the data pointed by 'count' specifies the data actually read.

Parameters
stdif | Pointer to the interface driver object
data | Pointer to the start of data
count | Pointer to the count of data (in bytes).
timeout | in system timer ticks
Return values
TRUE | Returns TRUE if all items could be read
FALSE | Returns FALSE if not all the items could be read

Definition at line 267 of file IfxStdIf_DPipe.h.

Referenced by Ifx_Shell_process().

◆ IfxStdIf_DPipe_resetSendCount()

IFX_INLINE void IfxStdIf_DPipe_resetSendCount ( IfxStdIf_DPipe * stdIf )

Reset the sendCount counter.

Parameters
stdif Pointer to the interface driver object
Returns
none

Definition at line 387 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_write()

IFX_INLINE boolean IfxStdIf_DPipe_write | ( | IfxStdIf_DPipe * | stdIf,
 |  | void * | data,
 |  | Ifx_SizeT * | count,
 |  | Ifx_TickTime | timeout
 | ) |  |

Write binary data into the IfxStdIf_DPipe.

Initially the parameter 'count' specifies count of data to write. After execution the data pointed by 'count' specifies the data actually written

Parameters
stdif | Pointer to the interface driver object
data | Pointer to the start of data
count | Pointer to the count of data (in bytes).
timeout | in system timer ticks
Return values
TRUE | Returns TRUE if all items could be written
FALSE | Returns FALSE if not all the items could be written

Definition at line 259 of file IfxStdIf_DPipe.h.

Referenced by Ifx_Console_print(), Ifx_Console_printAlign(), and IfxStdIf_DPipe_print().


iLLD_TC38A: Standard interface: Position interface

Functions
Standard interface: Position interface
Service software » Standard interface
Collaboration diagram for Standard interface: Position interface:

Functions

IFX_INLINE void | IfxStdIf_Pos_onZeroIrq (IfxStdIf_Pos *stdIf)
Handles the zero interrupt. More...
IFX_INLINE float32 | IfxStdIf_Pos_getAbsolutePosition (IfxStdIf_Pos *stdIf)
Return the position, inclusive turns. More...
IFX_INLINE IfxStdIf_Pos_Status | IfxStdIf_Pos_getFault (IfxStdIf_Pos *stdIf)
Return the sensor status. MCMETILLD-521 More...
IFX_INLINE sint32 | IfxStdIf_Pos_getOffset (IfxStdIf_Pos *stdIf)
Return the raw position sensor offset. More...
IFX_INLINE float32 | IfxStdIf_Pos_getPosition (IfxStdIf_Pos *stdIf)
Return the position. More...
IFX_INLINE IfxStdIf_Pos_Dir | IfxStdIf_Pos_getDirection (IfxStdIf_Pos *stdIf)
Return the direction. More...
IFX_INLINE uint16 | IfxStdIf_Pos_getPeriodPerRotation (IfxStdIf_Pos *stdIf)
Return the period per rotation setting. More...
IFX_INLINE sint32 | IfxStdIf_Pos_getRawPosition (IfxStdIf_Pos *stdIf)
Return the raw position in ticks. More...
IFX_INLINE float32 | IfxStdIf_Pos_getRefreshPeriod (IfxStdIf_Pos *stdIf)
Get the update period. More...
IFX_INLINE sint32 | IfxStdIf_Pos_getResolution (IfxStdIf_Pos *stdIf)
Get the resolution. More...
IFX_INLINE sint32 | IfxStdIf_Pos_getTurn (IfxStdIf_Pos *stdIf)
Return position in turn. More...
IFX_INLINE IfxStdIf_Pos_SensorType | IfxStdIf_Pos_getSensorType (IfxStdIf_Pos *stdIf)
Get the sensor type. More...
IFX_INLINE float32 | IfxStdIf_Pos_getSpeed (IfxStdIf_Pos *stdIf)
Return the speed. More...
IFX_INLINE boolean | IfxStdIf_Pos_isFault (IfxStdIf_Pos *stdIf)
IFX_INLINE void | IfxStdIf_Pos_onEventA (IfxStdIf_Pos *stdIf)
Handles the A sensor event Event A is a sensor defined event. it is optional. More...
IFX_INLINE void | IfxStdIf_Pos_update (IfxStdIf_Pos *stdIf)
Refresh the status. More...
IFX_INLINE void | IfxStdIf_Pos_reset (IfxStdIf_Pos *stdIf)
Reset the driver. More...
IFX_INLINE void | IfxStdIf_Pos_resetFaults (IfxStdIf_Pos *stdIf)
Reset the driver fault. More...
IFX_INLINE void | IfxStdIf_Pos_setOffset (IfxStdIf_Pos *stdIf, sint32 offset)
Set the sensor offset. More...
IFX_INLINE void | IfxStdIf_Pos_setPosition (IfxStdIf_Pos *stdIf, float32 position)
Set the sensor position (virtual sensor) More...
IFX_INLINE void | IfxStdIf_Pos_setRawPosition (IfxStdIf_Pos *stdIf, sint32 position)
Set the sensor position (virtual sensor) More...
IFX_INLINE void | IfxStdIf_Pos_setSpeed (IfxStdIf_Pos *stdIf, float32 speed)
Set the sensor speed (virtual sensor) More...
IFX_INLINE void | IfxStdIf_Pos_setRefreshPeriod (IfxStdIf_Pos *stdIf, float32 updatePeriod)
Set the update period. More...

Detailed Description

The standard interface position interface (IfxStdIf_Pos) abstract the hardware used for position interface feature like encoder, hall, resolver, ... It provide, after proper initialization an hardware Independent way to interact with the position sensor like getting position, speed, direction, ...

The figure below shows the standard position interface.

Standard position interface

This interface defines the following features:

Function Documentation

◆ IfxStdIf_Pos_getAbsolutePosition()

IFX_INLINE float32 IfxStdIf_Pos_getAbsolutePosition ( IfxStdIf_Pos * stdIf )

Return the position, inclusive turns.

Return the sensor position in rad for rotating sensor inclusive turns, or in m for linear sensors. For linear sensor the effect is the same as IfxStdIf_Pos_GetPosition.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the position inclusive turns in rad
Parameters
stdIf Standard interface pointer

Definition at line 341 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_getDirection()

IFX_INLINE IfxStdIf_Pos_Dir IfxStdIf_Pos_getDirection ( IfxStdIf_Pos * stdIf )

Return the direction.

Return the sensor direction.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the direction
Parameters
stdIf Standard interface pointer

Definition at line 377 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_getFault()

IFX_INLINE IfxStdIf_Pos_Status IfxStdIf_Pos_getFault ( IfxStdIf_Pos * stdIf )

Return the sensor status. MCMETILLD-521

Parameters
stdIf Pointer to the interface driver object
Returns
Return the sensor status MCMETILLD-521
Parameters
stdIf Standard interface pointer

Definition at line 350 of file IfxStdIf_Pos.h.

Referenced by IfxStdIf_Pos_isFault(), and IfxStdIf_Pos_printStatus().

◆ IfxStdIf_Pos_getOffset()

IFX_INLINE sint32 IfxStdIf_Pos_getOffset ( IfxStdIf_Pos * stdIf )

Return the raw position sensor offset.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the raw position sensor offset sensor in ticks
Parameters
stdIf Standard interface pointer

Definition at line 359 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_getPeriodPerRotation()

IFX_INLINE uint16 IfxStdIf_Pos_getPeriodPerRotation ( IfxStdIf_Pos * stdIf )

Return the period per rotation setting.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the period per rotation setting
Parameters
stdIf Standard interface pointer

Definition at line 386 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_getPosition()

IFX_INLINE float32 IfxStdIf_Pos_getPosition ( IfxStdIf_Pos * stdIf )

Return the position.

Return the sensor position in rad for rotating sensor or in m for linear sensors. For rotating sensor, the position is always between 0 and 2*IFX_PI.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the position in rad or m
Parameters
stdIf Standard interface pointer

Definition at line 368 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_getRawPosition()

IFX_INLINE sint32 IfxStdIf_Pos_getRawPosition ( IfxStdIf_Pos * stdIf )

Return the raw position in ticks.

Return the sensor raw position in ticks.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the raw position in ticks
Parameters
stdIf Standard interface pointer

Definition at line 395 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_getRefreshPeriod()

IFX_INLINE float32 IfxStdIf_Pos_getRefreshPeriod ( IfxStdIf_Pos * stdIf )

Get the update period.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the update period in s
Parameters
stdIf Standard interface pointer

Definition at line 404 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_getResolution()

IFX_INLINE sint32 IfxStdIf_Pos_getResolution ( IfxStdIf_Pos * stdIf )

Get the resolution.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the resolution
Parameters
stdIf Standard interface pointer

Definition at line 413 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_getSensorType()

IFX_INLINE IfxStdIf_Pos_SensorType IfxStdIf_Pos_getSensorType ( IfxStdIf_Pos * stdIf )

Get the sensor type.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the sensor type
Parameters
stdIf Standard interface pointer

Definition at line 431 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_getSpeed()

IFX_INLINE float32 IfxStdIf_Pos_getSpeed ( IfxStdIf_Pos * stdIf )

Return the speed.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the speed in rad/s or m/s
Parameters
stdIf Standard interface pointer

Definition at line 440 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_getTurn()

IFX_INLINE sint32 IfxStdIf_Pos_getTurn ( IfxStdIf_Pos * stdIf )

Return position in turn.

Parameters
stdIf Pointer to the interface driver object
Returns
Return position in turn
Parameters
stdIf Standard interface pointer

Definition at line 422 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_isFault()

IFX_INLINE boolean IfxStdIf_Pos_isFault ( IfxStdIf_Pos * stdIf )

Check whether the sensor is faulty

Parameters
stdIf Standard interface pointer

Definition at line 449 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_onEventA()

IFX_INLINE void IfxStdIf_Pos_onEventA ( IfxStdIf_Pos * stdIf )

Handles the A sensor event Event A is a sensor defined event. it is optional.

Parameters
stdIf Pointer to the interface driver object
Returns
none
Parameters
stdIf Standard interface pointer

Definition at line 458 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_onZeroIrq()

IFX_INLINE void IfxStdIf_Pos_onZeroIrq ( IfxStdIf_Pos * stdIf )

Handles the zero interrupt.

Parameters
stdIf Pointer to the interface driver object
Returns
none

Definition at line 332 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_reset()

IFX_INLINE void IfxStdIf_Pos_reset ( IfxStdIf_Pos * stdIf )

Reset the driver.

Clear faults, reset speed and position to 0

Parameters
stdIf Pointer to the interface driver object
Returns
None
Parameters
stdIf Standard interface pointer

Definition at line 476 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_resetFaults()

IFX_INLINE void IfxStdIf_Pos_resetFaults ( IfxStdIf_Pos * stdIf )

Reset the driver fault.

Clear faults

Parameters
stdIf Pointer to the interface driver object
Returns
None
Parameters
stdIf Standard interface pointer

Definition at line 485 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_setOffset()

IFX_INLINE void IfxStdIf_Pos_setOffset | ( | IfxStdIf_Pos * | stdIf,
 |  | sint32 | offset
 | ) |  |

Set the sensor offset.

Parameters
stdIf | Pointer to the interface driver object
offset | Offset in sensor ticks
Returns
None
Parameters
stdIf Standard interface pointer

Definition at line 494 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_setPosition()

IFX_INLINE void IfxStdIf_Pos_setPosition | ( | IfxStdIf_Pos * | stdIf,
 |  | float32 | position
 | ) |  |

Set the sensor position (virtual sensor)

Parameters
stdIf | Pointer to the interface driver object
position | Position sensor rad
Returns
None
Parameters
stdIf Standard interface pointer

Definition at line 503 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_setRawPosition()

IFX_INLINE void IfxStdIf_Pos_setRawPosition | ( | IfxStdIf_Pos * | stdIf,
 |  | sint32 | position
 | ) |  |

Set the sensor position (virtual sensor)

Parameters
stdIf | Pointer to the interface driver object
position | Position sensor ticks
Returns
None
Parameters
stdIf Standard interface pointer

Definition at line 512 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_setRefreshPeriod()

IFX_INLINE void IfxStdIf_Pos_setRefreshPeriod | ( | IfxStdIf_Pos * | stdIf,
 |  | float32 | updatePeriod
 | ) |  |

Set the update period.

Parameters
stdIf | Pointer to the interface driver object
updatePeriod | Refresh period in s
Returns
None
Parameters
stdIf Standard interface pointer

Definition at line 530 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_setSpeed()

IFX_INLINE void IfxStdIf_Pos_setSpeed | ( | IfxStdIf_Pos * | stdIf,
 |  | float32 | speed
 | ) |  |

Set the sensor speed (virtual sensor)

Parameters
stdIf | Pointer to the interface driver object
speed | speed in rad/s
Returns
None
Parameters
stdIf Standard interface pointer

Definition at line 521 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_update()

IFX_INLINE void IfxStdIf_Pos_update ( IfxStdIf_Pos * stdIf )

Refresh the status.

Update the stdIf state like speed, position, status, taking into account the updatePeriod

Parameters
stdIf Pointer to the interface driver object
Returns
None
Parameters
stdIf Standard interface pointer

Definition at line 467 of file IfxStdIf_Pos.h.


iLLD_TC38A: Standard interface: Multi-channels, dual-complementary PWM interface

Functions | Variables
Standard interface: Multi-channels, dual-complementary PWM interface
Service software » Standard interface
Collaboration diagram for Standard interface: Multi-channels, dual-complementary PWM interface:

Functions

IFX_INLINE boolean | IfxStdIf_PwmHl_setDeadtime (IfxStdIf_PwmHl *stdIf, float32 deadtime)
Set the dead time in s. More...
IFX_INLINE float32 | IfxStdIf_PwmHl_getDeadtimetick (IfxStdIf_PwmHl *stdIf)
Set the dead time in s. More...
IFX_INLINE float32 | IfxStdIf_PwmHl_getDeadtime (IfxStdIf_PwmHl *stdIf)
Return the dead time in s. More...
IFX_INLINE boolean | IfxStdIf_PwmHl_setMinPulse (IfxStdIf_PwmHl *stdIf, float32 minPulse)
Set the minimum pulse time in s. More...
IFX_INLINE float32 | IfxStdIf_PwmHl_getMinPulse (IfxStdIf_PwmHl *stdIf)
Return the minimum pulse time in s. More...
IFX_INLINE Ifx_Pwm_Mode | IfxStdIf_PwmHl_getMode (IfxStdIf_PwmHl *stdIf)
Return the PWM mode. More...
IFX_INLINE boolean | IfxStdIf_PwmHl_setMode (IfxStdIf_PwmHl *stdIf, Ifx_Pwm_Mode mode)
Set the pwm mode. More...
IFX_INLINE void | IfxStdIf_PwmHl_setOnTime (IfxStdIf_PwmHl *stdIf, Ifx_TimerValue *tOn)
Set the pwm ON time. More...
IFX_INLINE void | IfxStdIf_PwmHl_setOnTimeAndShift (IfxStdIf_PwmHl *stdIf, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Set the pwm ON time and shift value. More...
IFX_INLINE void | IfxStdIf_PwmHl_setPulse (IfxStdIf_PwmHl *stdIf, float32 *tOn, float32 *offset)
Set the pwm pulse of all switched independently. More...
IFX_INLINE void | IfxStdIf_PwmHl_setupChannels (IfxStdIf_PwmHl *stdIf, boolean *activeCh, boolean *stuckSt)
Set channels which are generating PWM or in "stuck-at" state. More...
IFX_INLINE IfxStdIf_Timer * | IfxStdIf_PwmHl_getTimer (IfxStdIf_PwmHl *stdIf)
Return the timer standard interface used by the IfxStdIf_PwmHl standard interface. More...
IFX_EXTERN void | IfxStdIf_PwmHl_initConfig (IfxStdIf_PwmHl_Config *config)

Variables

IfxStdIf_InterfaceDriver driver
Interface driver object. More...
IfxStdIf_PwmHl_SetDeadtime setDeadtime
IfxStdIf_PwmHl_SetDeadtime. More...
IfxStdIf_PwmHl_GetDeadtime getDeadtime
IfxStdIf_PwmHl_GetDeadtime. More...
IfxStdIf_PwmHl_GetDeadtimeTick getDeadtimeTick
IfxStdIf_PwmHl_SetMinPulse setMinPulse
IfxStdIf_PwmHl_SetMinPulse. More...
IfxStdIf_PwmHl_GetMinPulse getMinPulse
IfxStdIf_PwmHl_GetMinPulse. More...
IfxStdIf_PwmHl_GetMode getMode
IfxStdIf_PwmHl_GetMode. More...
IfxStdIf_PwmHl_SetMode setMode
IfxStdIf_PwmHl_SetMode. More...
IfxStdIf_PwmHl_SetOnTime setOnTime
IfxStdIf_PwmHl_SetOnTime. More...
IfxStdIf_PwmHl_SetOnTimeAndShift setOnTimeAndShift
IfxStdIf_PwmHl_SetOnTime. More...
IfxStdIf_PwmHl_SetPulse setPulse
IfxStdIf_PwmHl_Pulse. More...
IfxStdIf_PwmHl_SetupChannels setupChannels
IfxStdIf_PwmHl_SetupChannels. More...
IfxStdIf_Timer timer
Timer related standard interface. More...
float32 deadtime
Dead time between the top and bottom channels in seconds. More...
float32 minPulse
Min pulse allowed as active state for the top and bottom PWM in seconds. More...
uint8 channelCount
Number of PWM channels, one channel is made of a top and bottom channel. More...
boolean emergencyEnabled
Specifies if the emergency stop should be enabled or not. More...
IfxPort_OutputMode outputMode
Output mode of ccx and coutx pins. More...
IfxPort_PadDriver outputDriver
Output pad driver of ccx and coutx pins. More...
Ifx_ActiveState ccxOutputEnabled
Ifx_ActiveState coutxOutputEnabled
Ifx_ActiveState ccxActiveState
Top PWM active state. More...
Ifx_ActiveState coutxActiveState
Bottom PWM active state. More...

Detailed Description

The standard interface pwm high/low (PwmHl) abstract the hardware used for pwm feature. It provide, after proper initialization an hardware independant way to interact with the PWM functionallity like setting duty cycles, dead time,timer functionalities, ...

The figure below shows the standard Multi-channels, dual-complementary PWM interface.

Standard Multi-channels, dual-complementary PWM interface

This PWM interface provides multiple dual-complementary PWM channels. Each dual-complementary PWM channel is made of two PWM channels, a top channel CCx and a bottom channel COUTx. The interface implements the Standard interface: Timer.

This interface defines the following features:

  • Configurable duty cycle from 0% to 100%
  • Adjustable dead-time between top and bottom channels
  • Center aligned, left aligned, right aligned PWM
  • Optional minimal pulse cancellation
  • Optional emergency stop
  • Configurable signal active state for top and bottom PWM
  • Configurable output ports
  • Inherit the features from library_srvsw_stdif_timer

Example of signal generation in center aligned mode:

Standard Multi-channels, dual-complementary PWM interface - Center aligned mode

Function Documentation

◆ IfxStdIf_PwmHl_getDeadtime()

IFX_INLINE float32 IfxStdIf_PwmHl_getDeadtime ( IfxStdIf_PwmHl * stdIf )

Return the dead time in s.

It returns the last dead time values set by IfxStdIf_PwmHl_SetDeadtime() or during initialisation

Parameters
stdIf Pointer to the interface driver object
Returns
Returns the deadtime in second
Parameters
stdIf Standard interface pointer

Definition at line 242 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_getDeadtimetick()

IFX_INLINE float32 IfxStdIf_PwmHl_getDeadtimetick ( IfxStdIf_PwmHl * stdIf )

Set the dead time in s.

Parameters
stdIf | Pointer to the interface driver object
deadtime | deadtime in second
Return values
TRUE | In case of success
FALSE | In case of failure
Parameters
stdIf Standard interface pointer

Definition at line 234 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_getMinPulse()

IFX_INLINE float32 IfxStdIf_PwmHl_getMinPulse ( IfxStdIf_PwmHl * stdIf )

Return the minimum pulse time in s.

It returns the last minimum pulse time values set by IfxStdIf_PwmHl_SetMinPulse() or during initialisation

Parameters
stdIf Pointer to the interface driver object
Returns
Returns the minimum pulse time in second
Parameters
stdIf Standard interface pointer

Definition at line 260 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_getMode()

IFX_INLINE Ifx_Pwm_Mode IfxStdIf_PwmHl_getMode ( IfxStdIf_PwmHl * stdIf )

Return the PWM mode.

It returns the last pwm mode set by IfxStdIf_PwmHl_SetMode() or during initialisation

Parameters
stdIf Pointer to the interface driver object
Returns
Returns the pwm mode
Parameters
stdIf Standard interface pointer

Definition at line 269 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_getTimer()

IFX_INLINE IfxStdIf_Timer* IfxStdIf_PwmHl_getTimer ( IfxStdIf_PwmHl * stdIf )

Return the timer standard interface used by the IfxStdIf_PwmHl standard interface.

Parameters
stdIf Standard interface pointer
Returns
Returns the pointer to the IfxStdIf_Timer object

Definition at line 324 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_initConfig()

IFX_EXTERN void IfxStdIf_PwmHl_initConfig ( IfxStdIf_PwmHl_Config * config )

Initialize the configuration structure to default

Parameters
config Timer configuration. This parameter is initialised by the function

Definition at line 45 of file IfxStdIf_PwmHl.c.

Referenced by IfxCcu6_PwmHl_initConfig(), IfxGtm_Atom_Dtm_PwmHl_initConfig(), IfxGtm_Atom_PwmHl_initConfig(), IfxGtm_Tom_Dtm_PwmHl_initConfig(), and IfxGtm_Tom_PwmHl_initConfig().

◆ IfxStdIf_PwmHl_setDeadtime()

IFX_INLINE boolean IfxStdIf_PwmHl_setDeadtime | ( | IfxStdIf_PwmHl * | stdIf,
 |  | float32 | deadtime
 | ) |  |

Set the dead time in s.

Parameters
stdIf | Pointer to the interface driver object
deadtime | deadtime in second
Return values
TRUE | In case of success
FALSE | In case of failure
Parameters
stdIf Standard interface pointer

Definition at line 222 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_setMinPulse()

IFX_INLINE boolean IfxStdIf_PwmHl_setMinPulse | ( | IfxStdIf_PwmHl * | stdIf,
 |  | float32 | minPulse
 | ) |  |

Set the minimum pulse time in s.

Parameters
stdIf | Pointer to the interface driver object
minPulse | minimal pulse in second
Return values
TRUE | In case of success
FALSE | In case of failure
Parameters
stdIf Standard interface pointer

Definition at line 251 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_setMode()

IFX_INLINE boolean IfxStdIf_PwmHl_setMode | ( | IfxStdIf_PwmHl * | stdIf,
 |  | Ifx_Pwm_Mode | mode
 | ) |  |

Set the pwm mode.

Parameters
stdIf | Pointer to the interface driver object
mode | PWM mode
Return values
TRUE | In case of success
FALSE | In case of failure (feature not supported)
Parameters
stdIf Standard interface pointer

Definition at line 278 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_setOnTime()

IFX_INLINE void IfxStdIf_PwmHl_setOnTime | ( | IfxStdIf_PwmHl * | stdIf,
 |  | Ifx_TimerValue * | tOn
 | ) |  |

Set the pwm ON time.

Parameters
stdIf | Pointer to the interface driver object
tOn | Pointer to an array of ON times in ticks. The array size must be equal to the number of PWM channels
Returns
none
Parameters
stdIf Standard interface pointer

Definition at line 287 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_setOnTimeAndShift()

IFX_INLINE void IfxStdIf_PwmHl_setOnTimeAndShift | ( | IfxStdIf_PwmHl * | stdIf,
 |  | Ifx_TimerValue * | tOn,
 |  | Ifx_TimerValue * | shift
 | ) |  |

Set the pwm ON time and shift value.

Parameters
stdIf | Pointer to the interface driver object
tOn | Pointer to an array of ON times in ticks. The array size must be equal to the number of PWM channels
shift | Pointer to an array of shift values in ticks. The array size must be equal to the number of PWM channels
Returns
none
Parameters
stdIf Standard interface pointer

Definition at line 296 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_setPulse()

IFX_INLINE void IfxStdIf_PwmHl_setPulse | ( | IfxStdIf_PwmHl * | stdIf,
 |  | float32 * | tOn,
 |  | float32 * | offset
 | ) |  |

Set the pwm pulse of all switched independently.

Parameters
stdIf | Pointer to the interface driver object
tOn | Pointer to an array of ON times in s. The array size must be equal to the number of PWM channels times 2. Parameters order is Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
offset | Pointer to an array of offset values in s. The array size must be equal to the number of PWM channels times 2. Parameters order is Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
Returns
none
Parameters
stdIf Standard interface pointer

Definition at line 305 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_setupChannels()

IFX_INLINE void IfxStdIf_PwmHl_setupChannels | ( | IfxStdIf_PwmHl * | stdIf,
 |  | boolean * | activeCh,
 |  | boolean * | stuckSt
 | ) |  |

Set channels which are generating PWM or in "stuck-at" state.

Parameters
stdIf | Pointer to the interface driver object
activeCh | Pointer to boolean array containing values for PWM channels. If FALSE, the channel will be in stuck-at state, else the channel will generate PWM.
stuckSt | Pointer to boolean array containing values for active channels. If FALSE, the stuck-at state is passive level, else the stuck-at state is active level.
Note
The values for the parameters are arranged as follows: index = 0 –> phase 0 top index = 1 –> phase 0 bottom index = 2 –> phase 1 top index = 3 –> phase 1 bottom index = 4 –> phase 2 top index = 5 –> phase 2 bottom

Definition at line 313 of file IfxStdIf_PwmHl.h.

Variable Documentation

◆ ccxActiveState

Ifx_ActiveState ccxActiveState

Top PWM active state.

Definition at line 211 of file IfxStdIf_PwmHl.h.

Referenced by IfxCcu6_PwmHl_init(), IfxGtm_Atom_Dtm_PwmHl_init(), IfxGtm_Atom_PwmHl_init(), IfxGtm_Tom_Dtm_PwmHl_init(), IfxGtm_Tom_PwmHl_init(), and IfxStdIf_PwmHl_initConfig().

◆ ccxOutputEnabled

Ifx_ActiveState ccxOutputEnabled

Definition at line 209 of file IfxStdIf_PwmHl.h.

Referenced by IfxGtm_Atom_Dtm_PwmHl_init(), and IfxGtm_Tom_Dtm_PwmHl_init().

◆ channelCount

uint8 channelCount

Number of PWM channels, one channel is made of a top and bottom channel.

Definition at line 204 of file IfxStdIf_PwmHl.h.

Referenced by IfxCcu6_PwmHl_init(), IfxGtm_Atom_Dtm_PwmHl_init(), IfxGtm_Atom_PwmHl_init(), IfxGtm_Tom_Dtm_PwmHl_init(), IfxGtm_Tom_PwmHl_init(), and IfxStdIf_PwmHl_initConfig().

◆ coutxActiveState

Ifx_ActiveState coutxActiveState

Bottom PWM active state.

Definition at line 212 of file IfxStdIf_PwmHl.h.

Referenced by IfxCcu6_PwmHl_init(), IfxGtm_Atom_Dtm_PwmHl_init(), IfxGtm_Atom_PwmHl_init(), IfxGtm_Tom_Dtm_PwmHl_init(), IfxGtm_Tom_PwmHl_init(), and IfxStdIf_PwmHl_initConfig().

◆ coutxOutputEnabled

Ifx_ActiveState coutxOutputEnabled

Definition at line 210 of file IfxStdIf_PwmHl.h.

Referenced by IfxGtm_Atom_Dtm_PwmHl_init(), and IfxGtm_Tom_Dtm_PwmHl_init().

◆ deadtime

float32 deadtime

Dead time between the top and bottom channels in seconds.

Definition at line 202 of file IfxStdIf_PwmHl.h.

Referenced by IfxCcu6_PwmHl_init(), IfxGtm_Atom_Dtm_PwmHl_init(), IfxGtm_Atom_PwmHl_init(), IfxGtm_Tom_Dtm_PwmHl_init(), IfxGtm_Tom_PwmHl_init(), and IfxStdIf_PwmHl_initConfig().

◆ driver

IfxStdIf_InterfaceDriver driver

Interface driver object.

Definition at line 181 of file IfxStdIf_PwmHl.h.

Referenced by IfxCcu6_PwmHl_stdIfPwmHlInit(), IfxGtm_Atom_Dtm_PwmHl_stdIfPwmHlInit(), IfxGtm_Atom_PwmHl_stdIfPwmHlInit(), IfxGtm_Tom_Dtm_PwmHl_stdIfPwmHlInit(), IfxGtm_Tom_PwmHl_stdIfPwmHlInit(), IfxStdIf_PwmHl_getDeadtime(), IfxStdIf_PwmHl_getDeadtimetick(), IfxStdIf_PwmHl_getMinPulse(), IfxStdIf_PwmHl_getMode(), IfxStdIf_PwmHl_setDeadtime(), IfxStdIf_PwmHl_setMinPulse(), IfxStdIf_PwmHl_setMode(), IfxStdIf_PwmHl_setOnTime(), IfxStdIf_PwmHl_setOnTimeAndShift(), and IfxStdIf_PwmHl_setPulse().

◆ emergencyEnabled

boolean emergencyEnabled

Specifies if the emergency stop should be enabled or not.

Definition at line 205 of file IfxStdIf_PwmHl.h.

Referenced by IfxStdIf_PwmHl_initConfig().

◆ getDeadtime

IfxStdIf_PwmHl_GetDeadtime getDeadtime

IfxStdIf_PwmHl_GetDeadtime.

Definition at line 185 of file IfxStdIf_PwmHl.h.

Referenced by IfxCcu6_PwmHl_stdIfPwmHlInit(), IfxGtm_Atom_Dtm_PwmHl_stdIfPwmHlInit(), IfxGtm_Atom_PwmHl_stdIfPwmHlInit(), IfxGtm_Tom_Dtm_PwmHl_stdIfPwmHlInit(), IfxGtm_Tom_PwmHl_stdIfPwmHlInit(), and IfxStdIf_PwmHl_getDeadtime().

◆ getDeadtimeTick

IfxStdIf_PwmHl_GetDeadtimeTick getDeadtimeTick

IfxStdIf_PwmHl_GetDeadtimetick

Definition at line 186 of file IfxStdIf_PwmHl.h.

Referenced by IfxGtm_Atom_Dtm_PwmHl_stdIfPwmHlInit(), IfxGtm_Tom_Dtm_PwmHl_stdIfPwmHlInit(), and IfxStdIf_PwmHl_getDeadtimetick().

◆ getMinPulse

IfxStdIf_PwmHl_GetMinPulse getMinPulse

IfxStdIf_PwmHl_GetMinPulse.

Definition at line 188 of file IfxStdIf_PwmHl.h.

Referenced by IfxCcu6_PwmHl_stdIfPwmHlInit(), IfxGtm_Atom_Dtm_PwmHl_stdIfPwmHlInit(), IfxGtm_Atom_PwmHl_stdIfPwmHlInit(), IfxGtm_Tom_Dtm_PwmHl_stdIfPwmHlInit(), IfxGtm_Tom_PwmHl_stdIfPwmHlInit(), and IfxStdIf_PwmHl_getMinPulse().

◆ getMode

IfxStdIf_PwmHl_GetMode getMode

IfxStdIf_PwmHl_GetMode.

Definition at line 189 of file IfxStdIf_PwmHl.h.

Referenced by IfxCcu6_PwmHl_stdIfPwmHlInit(), IfxGtm_Atom_Dtm_PwmHl_stdIfPwmHlInit(), IfxGtm_Atom_PwmHl_stdIfPwmHlInit(), IfxGtm_Tom_Dtm_PwmHl_stdIfPwmHlInit(), IfxGtm_Tom_PwmHl_stdIfPwmHlInit(), and IfxStdIf_PwmHl_getMode().

◆ minPulse

float32 minPulse

Min pulse allowed as active state for the top and bottom PWM in seconds.

Definition at line 203 of file IfxStdIf_PwmHl.h.

Referenced by IfxCcu6_PwmHl_init(), IfxGtm_Atom_Dtm_PwmHl_init(), IfxGtm_Atom_PwmHl_init(), IfxGtm_Tom_Dtm_PwmHl_init(), IfxGtm_Tom_PwmHl_init(), and IfxStdIf_PwmHl_initConfig().

◆ outputDriver

IfxPort_PadDriver outputDriver

Output pad driver of ccx and coutx pins.

Definition at line 208 of file IfxStdIf_PwmHl.h.

Referenced by IfxCcu6_PwmHl_setOutputPins(), IfxGtm_Atom_Dtm_PwmHl_init(), IfxGtm_Atom_PwmHl_init(), IfxGtm_Tom_Dtm_PwmHl_init(), IfxGtm_Tom_PwmHl_init(), and IfxStdIf_PwmHl_initConfig().

◆ outputMode

IfxPort_OutputMode outputMode

Output mode of ccx and coutx pins.

Definition at line 207 of file IfxStdIf_PwmHl.h.

Referenced by IfxCcu6_PwmHl_setOutputPins(), IfxGtm_Atom_Dtm_PwmHl_init(), IfxGtm_Atom_PwmHl_init(), IfxGtm_Tom_Dtm_PwmHl_init(), IfxGtm_Tom_PwmHl_init(), and IfxStdIf_PwmHl_initConfig().

◆ setDeadtime

IfxStdIf_PwmHl_SetDeadtime setDeadtime

IfxStdIf_PwmHl_SetDeadtime.

Definition at line 184 of file IfxStdIf_PwmHl.h.

Referenced by IfxCcu6_PwmHl_stdIfPwmHlInit(), IfxGtm_Atom_Dtm_PwmHl_stdIfPwmHlInit(), IfxGtm_Atom_PwmHl_stdIfPwmHlInit(), IfxGtm_Tom_Dtm_PwmHl_stdIfPwmHlInit(), IfxGtm_Tom_PwmHl_stdIfPwmHlInit(), and IfxStdIf_PwmHl_setDeadtime().

◆ setMinPulse

IfxStdIf_PwmHl_SetMinPulse setMinPulse

IfxStdIf_PwmHl_SetMinPulse.

Definition at line 187 of file IfxStdIf_PwmHl.h.

Referenced by IfxCcu6_PwmHl_stdIfPwmHlInit(), IfxGtm_Atom_Dtm_PwmHl_stdIfPwmHlInit(), IfxGtm_Atom_PwmHl_stdIfPwmHlInit(), IfxGtm_Tom_Dtm_PwmHl_stdIfPwmHlInit(), IfxGtm_Tom_PwmHl_stdIfPwmHlInit(), and IfxStdIf_PwmHl_setMinPulse().

◆ setMode

IfxStdIf_PwmHl_SetMode setMode

IfxStdIf_PwmHl_SetMode.

Definition at line 190 of file IfxStdIf_PwmHl.h.

Referenced by IfxCcu6_PwmHl_stdIfPwmHlInit(), IfxGtm_Atom_Dtm_PwmHl_stdIfPwmHlInit(), IfxGtm_Atom_PwmHl_stdIfPwmHlInit(), IfxGtm_Tom_Dtm_PwmHl_stdIfPwmHlInit(), IfxGtm_Tom_PwmHl_stdIfPwmHlInit(), and IfxStdIf_PwmHl_setMode().

◆ setOnTime

IfxStdIf_PwmHl_SetOnTime setOnTime

IfxStdIf_PwmHl_SetOnTime.

Definition at line 191 of file IfxStdIf_PwmHl.h.

Referenced by IfxCcu6_PwmHl_stdIfPwmHlInit(), IfxGtm_Atom_Dtm_PwmHl_stdIfPwmHlInit(), IfxGtm_Atom_PwmHl_stdIfPwmHlInit(), IfxGtm_Tom_Dtm_PwmHl_stdIfPwmHlInit(), IfxGtm_Tom_PwmHl_stdIfPwmHlInit(), and IfxStdIf_PwmHl_setOnTime().

◆ setOnTimeAndShift

IfxStdIf_PwmHl_SetOnTimeAndShift setOnTimeAndShift

IfxStdIf_PwmHl_SetOnTime.

Definition at line 192 of file IfxStdIf_PwmHl.h.

Referenced by IfxGtm_Atom_Dtm_PwmHl_stdIfPwmHlInit(), IfxGtm_Atom_PwmHl_stdIfPwmHlInit(), IfxGtm_Tom_Dtm_PwmHl_stdIfPwmHlInit(), IfxGtm_Tom_PwmHl_stdIfPwmHlInit(), and IfxStdIf_PwmHl_setOnTimeAndShift().

◆ setPulse

IfxStdIf_PwmHl_SetPulse setPulse

IfxStdIf_PwmHl_Pulse.

Definition at line 193 of file IfxStdIf_PwmHl.h.

Referenced by IfxGtm_Atom_Dtm_PwmHl_stdIfPwmHlInit(), IfxGtm_Atom_PwmHl_stdIfPwmHlInit(), IfxGtm_Tom_Dtm_PwmHl_stdIfPwmHlInit(), IfxGtm_Tom_PwmHl_stdIfPwmHlInit(), and IfxStdIf_PwmHl_setPulse().

◆ setupChannels

IfxStdIf_PwmHl_SetupChannels setupChannels

IfxStdIf_PwmHl_SetupChannels.

Definition at line 194 of file IfxStdIf_PwmHl.h.

Referenced by IfxCcu6_PwmHl_stdIfPwmHlInit(), IfxGtm_Atom_Dtm_PwmHl_stdIfPwmHlInit(), IfxGtm_Atom_PwmHl_stdIfPwmHlInit(), IfxGtm_Tom_Dtm_PwmHl_stdIfPwmHlInit(), and IfxGtm_Tom_PwmHl_stdIfPwmHlInit().

◆ timer

IfxStdIf_Timer timer

Timer related standard interface.

Definition at line 196 of file IfxStdIf_PwmHl.h.

Referenced by IfxCcu6_PwmHl_stdIfPwmHlInit(), IfxGtm_Atom_Dtm_PwmHl_stdIfPwmHlInit(), IfxGtm_Atom_PwmHl_stdIfPwmHlInit(), IfxGtm_Tom_Dtm_PwmHl_stdIfPwmHlInit(), IfxGtm_Tom_PwmHl_stdIfPwmHlInit(), and IfxStdIf_PwmHl_getTimer().


iLLD_TC38A: Standard interface: Timer

Functions
Standard interface: Timer
Service software » Standard interface
Collaboration diagram for Standard interface: Timer:

Functions

IFX_INLINE float32 | IfxStdIf_Timer_getFrequency (IfxStdIf_Timer *stdIf)
Return the timer frequency in Hz. More...
IFX_INLINE Ifx_TimerValue | IfxStdIf_Timer_getPeriod (IfxStdIf_Timer *stdIf)
Return the timer period in ticks. More...
IFX_INLINE Ifx_TimerValue | IfxStdIf_Timer_getTrigger (IfxStdIf_Timer *stdIf)
Return the timer trigger point. More...
IFX_INLINE float32 | IfxStdIf_Timer_getResolution (IfxStdIf_Timer *stdIf)
Return the timer resolution in seconds. More...
IFX_INLINE boolean | IfxStdIf_Timer_setFrequency (IfxStdIf_Timer *stdIf, float32 frequency)
Set the timer frequency in Hz. More...
IFX_INLINE void | IfxStdIf_Timer_updateInputFrequency (IfxStdIf_Timer *stdIf)
Indicates the stdIf that the imput frequency has changed and that it should be taken in account. More...
IFX_INLINE void | IfxStdIf_Timer_applyUpdate (IfxStdIf_Timer *stdIf)
Apply requested updates. More...
IFX_INLINE void | IfxStdIf_Timer_disableUpdate (IfxStdIf_Timer *stdIf)
Disable updates. More...
IFX_INLINE float32 | IfxStdIf_Timer_getInputFrequency (IfxStdIf_Timer *stdIf)
Return the timer input frequency in Hz. More...
IFX_INLINE void | IfxStdIf_Timer_run (IfxStdIf_Timer *stdIf)
Immediately start the timer. More...
IFX_INLINE boolean | IfxStdIf_Timer_setPeriod (IfxStdIf_Timer *stdIf, Ifx_TimerValue period)
Set the timer period. More...
IFX_INLINE void | IfxStdIf_Timer_setSingleMode (IfxStdIf_Timer *stdIf, boolean enabled)
Stop timer at the end of the period. More...
IFX_INLINE void | IfxStdIf_Timer_setTrigger (IfxStdIf_Timer *stdIf, Ifx_TimerValue triggerPoint)
Set trigger point. More...
IFX_INLINE void | IfxStdIf_Timer_stop (IfxStdIf_Timer *stdIf)
Immediately stops the timer. More...
IFX_INLINE boolean | IfxStdIf_Timer_ackTimerIrq (IfxStdIf_Timer *stdIf)
Return the timer interrupt flag and reset it. More...
IFX_INLINE boolean | IfxStdIf_Timer_ackTriggerIrq (IfxStdIf_Timer *stdIf)
Return the trigger interrupt flag and reset it. More...
IFX_INLINE float32 | IfxStdIf_Timer_tickToS (float32 clockFreq, Ifx_TimerValue ticks)
Convert timer ticks to seconds. More...
IFX_INLINE Ifx_TimerValue | IfxStdIf_Timer_sToTick (float32 clockFreq, float32 seconds)
Convert seconds to timer ticks. More...
IFX_INLINE float32 | IfxStdIf_Timer_getPeriodSecond (IfxStdIf_Timer *stdIf)
Return the timer period in second. More...

Detailed Description

The standard interface timer (Timer) abstract the hardware used for timer feature. It provide, after proper initialization an hardware independant way to interact with the timer functionallity like setting period, trigger points, ...

The figure below shows the standard timer interface.

Standard timer interface

This interface defines the following features:

  • Timer with configurable frequency
  • Configurable counting direction
  • Optional interrupt on timer event with configurable service request provider and priority
  • Optional trigger signal with:
    • Optional interrupt on trigger event with configurable service request provider and priority
    • Configurable trigger point
    • Configurable trigger edge
    • trigger signal can be internal only or forwarded to a port pin

Function Documentation

◆ IfxStdIf_Timer_ackTimerIrq()

IFX_INLINE boolean IfxStdIf_Timer_ackTimerIrq ( IfxStdIf_Timer * stdIf )

Return the timer interrupt flag and reset it.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the timer interrupt flag
Parameters
stdIf Standard interface pointer

Definition at line 415 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_ackTriggerIrq()

IFX_INLINE boolean IfxStdIf_Timer_ackTriggerIrq ( IfxStdIf_Timer * stdIf )

Return the trigger interrupt flag and reset it.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the trigger interrupt flag
Parameters
stdIf Standard interface pointer

Definition at line 424 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_applyUpdate()

IFX_INLINE void IfxStdIf_Timer_applyUpdate ( IfxStdIf_Timer * stdIf )

Apply requested updates.

Such requested update are calls to:

  • IfxStdIf_Timer_setSingleMode()
  • IfxStdIf_Timer_setTrigger()
  • IfxStdIf_Timer_setPeriod() or IfxStdIf_Timer_setFrequency() as well as PWM generation related calls such as:
  • IfxStdIf_PwmHl_setDeadtime()
  • IfxStdIf_PwmHl_setMode()
  • IfxStdIf_PwmHl_setOnTime()
  • IfxStdIf_PwmHl_setupChannels()

It is important to note, that only one call to Timer_applyUpdate() is allowed within one timer period!!! In order to ensure correct update synchronisation, disableUpdate() should have been called previously.

Parameters
stdIf Pointer to the interface driver object
Returns
None
Parameters
stdIf Standard interface pointer

Definition at line 343 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_disableUpdate()

IFX_INLINE void IfxStdIf_Timer_disableUpdate ( IfxStdIf_Timer * stdIf )

Disable updates.

The following API action will not be taken in account before applyUpdate is called:

  • IfxStdIf_Timer_setSingleMode()
  • IfxStdIf_Timer_setTrigger()
  • IfxStdIf_Timer_setPeriod() or IfxStdIf_Timer_setFrequency() as well as PWM generation related calls such as:
  • IfxStdIf_PwmHl_setDeadtime()
  • IfxStdIf_PwmHl_setMode()
  • IfxStdIf_PwmHl_setOnTime()
  • IfxStdIf_PwmHl_setupChannels()
Parameters
stdIf Pointer to the interface driver object
Returns
None
Parameters
stdIf Standard interface pointer

Definition at line 352 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_getFrequency()

IFX_INLINE float32 IfxStdIf_Timer_getFrequency ( IfxStdIf_Timer * stdIf )

Return the timer frequency in Hz.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the timer frequency in Hz
Parameters
stdIf Standard interface pointer

Definition at line 289 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_getInputFrequency()

IFX_INLINE float32 IfxStdIf_Timer_getInputFrequency ( IfxStdIf_Timer * stdIf )

Return the timer input frequency in Hz.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the timer input frequency in Hz
Parameters
stdIf Standard interface pointer

Definition at line 361 of file IfxStdIf_Timer.h.

Referenced by IfxStdIf_Timer_getPeriodSecond().

◆ IfxStdIf_Timer_getPeriod()

IFX_INLINE Ifx_TimerValue IfxStdIf_Timer_getPeriod ( IfxStdIf_Timer * stdIf )

Return the timer period in ticks.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the timer period in ticks
Parameters
stdIf Standard interface pointer

Definition at line 298 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_getPeriodSecond()

IFX_INLINE float32 IfxStdIf_Timer_getPeriodSecond ( IfxStdIf_Timer * stdIf )

Return the timer period in second.

Parameters
stdIf Pointer to the interface driver object

Definition at line 455 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_getResolution()

IFX_INLINE float32 IfxStdIf_Timer_getResolution ( IfxStdIf_Timer * stdIf )

Return the timer resolution in seconds.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the timer resolution in seconds
Parameters
stdIf Standard interface pointer

Definition at line 316 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_getTrigger()

IFX_INLINE Ifx_TimerValue IfxStdIf_Timer_getTrigger ( IfxStdIf_Timer * stdIf )

Return the timer trigger point.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the timer timer point
Parameters
stdIf Standard interface pointer

Definition at line 307 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_run()

IFX_INLINE void IfxStdIf_Timer_run ( IfxStdIf_Timer * stdIf )

Immediately start the timer.

Please note that other mechanism may avoid the timer to tick, such as when the global (input) clock to the timer block is inactive.

Parameters
stdIf Pointer to the interface driver object
Returns
none
Parameters
stdIf Standard interface pointer

Definition at line 370 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_setFrequency()

IFX_INLINE boolean IfxStdIf_Timer_setFrequency | ( | IfxStdIf_Timer * | stdIf,
 |  | float32 | frequency
 | ) |  |

Set the timer frequency in Hz.

Parameters
stdIf | Pointer to the interface driver object
frequency | Requested timer frequency in Hz
Return values
TRUE | The requested frequency could be set
FALSE | The requested frequency is out of range
Parameters
stdIf Standard interface pointer

Definition at line 325 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_setPeriod()

IFX_INLINE boolean IfxStdIf_Timer_setPeriod | ( | IfxStdIf_Timer * | stdIf,
 |  | Ifx_TimerValue | period
 | ) |  |

Set the timer period.

Timer_applyUpdate() shall be invoked in order this to take effect.

Parameters
stdIf | Pointer to the interface driver object
period | Period value in ticks
Return values
TRUE | The requested period could be set
FALSE | The requested period is out of range
Parameters
stdIf Standard interface pointer

Definition at line 379 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_setSingleMode()

IFX_INLINE void IfxStdIf_Timer_setSingleMode | ( | IfxStdIf_Timer * | stdIf,
 |  | boolean | enabled
 | ) |  |

Stop timer at the end of the period.

Timer_applyUpdate() shall be invoked in order this to take effect.

Parameters
stdIf | Pointer to the interface driver object
enabled | If TRUE, enable the single mode, else disable the single mode (continuous mode)
Returns
none
Parameters
stdIf Standard interface pointer

Definition at line 388 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_setTrigger()

IFX_INLINE void IfxStdIf_Timer_setTrigger | ( | IfxStdIf_Timer * | stdIf,
 |  | Ifx_TimerValue | triggerPoint
 | ) |  |

Set trigger point.

See also
Timer_OutputEvent for the definition of the output level. Active state is defined by Timer_Config::outputActiveState.

Timer_applyUpdate() shall be invoked in order this to take effect.

Parameters
stdIf | Pointer to the interface driver object
triggerPoint | Trigger point in ticks from the period start.
Returns
none
Parameters
stdIf Standard interface pointer

Definition at line 397 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_stop()

IFX_INLINE void IfxStdIf_Timer_stop ( IfxStdIf_Timer * stdIf )

Immediately stops the timer.

Parameters
stdIf Pointer to the interface driver object
Returns
none
Parameters
stdIf Standard interface pointer

Definition at line 406 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_sToTick()

IFX_INLINE Ifx_TimerValue IfxStdIf_Timer_sToTick | ( | float32 | clockFreq,
 |  | float32 | seconds
 | ) |  |

Convert seconds to timer ticks.

Parameters
clockFreq | Timer clock frequency
seconds | time value in seconds to be converted
Returns
Return the converted time in timer ticks

Definition at line 446 of file IfxStdIf_Timer.h.

Referenced by IfxCcu6_PwmHl_setDeadtime(), IfxCcu6_PwmHl_setMinPulse(), IfxCcu6_TimerWithTrigger_setFrequency(), IfxGtm_Atom_Dtm_PwmHl_getDeadtimeInTimerClockTicks(), IfxGtm_Atom_Dtm_PwmHl_setDeadtime(), IfxGtm_Atom_Dtm_PwmHl_setMinPulse(), IfxGtm_Atom_Dtm_PwmHl_updatePulse(), IfxGtm_Atom_PwmHl_setDeadtime(), IfxGtm_Atom_PwmHl_setMinPulse(), IfxGtm_Atom_PwmHl_updatePulse(), IfxGtm_Atom_Timer_init(), IfxGtm_Atom_Timer_setFrequency(), IfxGtm_Tom_Dtm_PwmHl_getDeadtimeInTimerClockTicks(), IfxGtm_Tom_Dtm_PwmHl_setDeadtime(), IfxGtm_Tom_Dtm_PwmHl_setMinPulse(), IfxGtm_Tom_Dtm_PwmHl_updatePulse(), IfxGtm_Tom_PwmHl_setDeadtime(), IfxGtm_Tom_PwmHl_setMinPulse(), IfxGtm_Tom_PwmHl_updatePulse(), IfxGtm_Tom_Timer_init(), IfxGtm_Tom_Timer_setFrequency(), and IfxStm_Timer_setFrequency().

◆ IfxStdIf_Timer_tickToS()

IFX_INLINE float32 IfxStdIf_Timer_tickToS | ( | float32 | clockFreq,
 |  | Ifx_TimerValue | ticks
 | ) |  |

Convert timer ticks to seconds.

Parameters
clockFreq | Timer clock frequency
ticks | time value in ticks to be converted
Returns
Return the converted time in s

Definition at line 435 of file IfxStdIf_Timer.h.

Referenced by IfxCcu6_PwmHl_getDeadtime(), IfxCcu6_PwmHl_getMinPulse(), IfxCcu6_TimerWithTrigger_getFrequency(), IfxGtm_Atom_Dtm_PwmHl_getDeadtime(), IfxGtm_Atom_Dtm_PwmHl_getDeadtimeInTimerClockTicks(), IfxGtm_Atom_Dtm_PwmHl_getMinPulse(), IfxGtm_Atom_PwmHl_getDeadtime(), IfxGtm_Atom_PwmHl_getMinPulse(), IfxGtm_Atom_Timer_getFrequency(), IfxGtm_Tom_Dtm_PwmHl_getDeadtime(), IfxGtm_Tom_Dtm_PwmHl_getDeadtimeInTimerClockTicks(), IfxGtm_Tom_Dtm_PwmHl_getMinPulse(), IfxGtm_Tom_PwmHl_getDeadtime(), IfxGtm_Tom_PwmHl_getMinPulse(), IfxGtm_Tom_Timer_getFrequency(), IfxStdIf_Timer_getPeriodSecond(), and IfxStm_Timer_getFrequency().

◆ IfxStdIf_Timer_updateInputFrequency()

IFX_INLINE void IfxStdIf_Timer_updateInputFrequency ( IfxStdIf_Timer * stdIf )

Indicates the stdIf that the imput frequency has changed and that it should be taken in account.

Parameters
stdIf Pointer to the interface driver object
Returns
None
Parameters
stdIf Standard interface pointer

Definition at line 334 of file IfxStdIf_Timer.h.


iLLD_TC38A: System Engineering

Modules
System Engineering
Service software
Collaboration diagram for System Engineering:

Modules

Board support package
Communication
General
Math
Time

Detailed Description


iLLD_TC38A: Board support package

Modules
Board support package
Service software » System Engineering
Collaboration diagram for Board support package:

Modules

Assertion
Board support package

Detailed Description


iLLD_TC38A: Assertion

Files | Macros | Functions
Assertion
Service software » System Engineering » Board support package
Collaboration diagram for Assertion:

Files

file Assert.h
Assert functions.

Macros

#define | IFX_CFG_ASSERT_STDIO (0)
If set to 1, the assert message is send to the Assert_io interface. More...
#define | IFX_CFG_ASSERT_STDIO (0)
If set to 1, the assert message is send to the Assert_io interface. More...
#define | IFX_CFG_ASSERT_USE_BREAKPOINT (0)
If set to 1, the assert function will break the execution (breakpoint) More...
#define | IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT (IFX_VERBOSE_LEVEL_INFO)
defines the assertion default level More...
#define | Ifx_Assert_setStandardIo(standardIo) ((void)0)
Set the standard output used for IFX_ASSERT and IFX_VALIDATE. More...
#define | IFX_ASSERT(level, expr) ((void)0)
Assertion function (assert) More...
#define | IFX_VALIDATE(level, expr) (expr)
Assertion function (validate) More...

Functions

IFX_EXTERN void | Ifx_Assert_doLevel (uint8 level, pchar __assertion, pchar __file, unsigned int __line, pchar __function)
IFX_EXTERN boolean | Ifx_Assert_doValidate (boolean expr, uint8 level, pchar __assertion, pchar __file, unsigned int __line, pchar __function)

Detailed Description

This module implements assertion functions.

Global configuration settings (Ifx_Cfg.h) :

  • IFX_CFG_ASSERT_STDIO: if IFX_CFG_ASSERT_STDIO=1, the assertion is output to the io defined by Ifx_Assert_setStandardIo (). if IFX_CFG_ASSERT_STDIO=0, no text output is done. Default is IFX_CFG_ASSERT_STDIO=0
  • IFX_CFG_ASSERT_USE_BREAKPOINT: if IFX_CFG_ASSERT_USE_BREAKPOINT=1, a debug instruction is inserted in case an assertion occurs with a level of IFX_VERBOSE_LEVEL_FAILURE or IFX_VERBOSE_LEVEL_ERROR. If IFX_CFG_ASSERT_USE_BREAKPOINT=0 then no debug instruction is inserted. Default is IFX_CFG_ASSERT_USE_BREAKPOINT=0.
  • IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT: Set the assertion limit, assertion with a level below or equal to the limit are taken in account, other are ignored. range=[IFX_VERBOSE_LEVEL_OFF, IFX_VERBOSE_LEVEL_FAILURE, IFX_VERBOSE_LEVEL_ERROR, IFX_VERBOSE_LEVEL_WARNING, IFX_VERBOSE_LEVEL_INFO, IFX_VERBOSE_LEVEL_DEBUG] Default is IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT=IFX_VERBOSE_LEVEL_INFO.

Do not include this file but use # include "_Utilities/Ifx_Assert.h" instead

Macro Definition Documentation

◆ IFX_ASSERT

#define IFX_ASSERT | ( | level,
 |  | expr
 | ) | ((void)0)

Assertion function (assert)

If expr is FALSE, then an assertion message is displayed. The message indicates the assertion level, the file, line and function where the assertion occurred, and also display expr as text. In case the debug break point is enabled then a debug instruction will also be inserted so that the debugger stops

If expr is true, nothing is additional done.

The expr expression is ignored (code disabled) in case the assertion level set by IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT is IFX_VERBOSE_LEVEL_OFF.

The output needs to the be set with the function Ifx_Assert_setStandardIo() in order for the message to be displayed.

Parameters
level | level of the assertion, range=[IFX_VERBOSE_LEVEL_OFF, IFX_VERBOSE_LEVEL_FAILURE, IFX_VERBOSE_LEVEL_ERROR, IFX_VERBOSE_LEVEL_WARNING, IFX_VERBOSE_LEVEL_INFO, IFX_VERBOSE_LEVEL_DEBUG]
expr | expression to be tested. If FALSE the assertion is executed else nothing is done
Returns
void

Definition at line 173 of file Assert.h.

◆ Ifx_Assert_setStandardIo

#define Ifx_Assert_setStandardIo ( standardIo ) ((void)0)

Set the standard output used for IFX_ASSERT and IFX_VALIDATE.

For example the standard IO could redirect the output to a serial interface, CAN interface, ...

Parameters
standardIo Specifies the standard output used

Enable only if (IFX_CFG_ASSERT_STDIO!=0)

Returns
None.

Definition at line 105 of file Assert.h.

◆ IFX_CFG_ASSERT_STDIO [1/2]

#define IFX_CFG_ASSERT_STDIO (0)

If set to 1, the assert message is send to the Assert_io interface.

Definition at line 143 of file Assert.h.

◆ IFX_CFG_ASSERT_STDIO [2/2]

#define IFX_CFG_ASSERT_STDIO (0)

If set to 1, the assert message is send to the Assert_io interface.

Definition at line 143 of file Assert.h.

◆ IFX_CFG_ASSERT_USE_BREAKPOINT

#define IFX_CFG_ASSERT_USE_BREAKPOINT (0)

If set to 1, the assert function will break the execution (breakpoint)

Definition at line 81 of file Assert.h.

◆ IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT

#define IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT (IFX_VERBOSE_LEVEL_INFO)

defines the assertion default level

If not defined, the default assert level is set to IFX_VERBOSE_LEVEL_INFO

Definition at line 89 of file Assert.h.

◆ IFX_VALIDATE

#define IFX_VALIDATE | ( | level,
 |  | expr
 | ) | (expr)

Assertion function (validate)

If expr is FALSE, then an assertion message is displayed. The message indicates the assertion level, the file, line and function where the assertion occurred, and also display expr as text. In case the debug break point is enabled then a debug instruction will also be inserted so that the debugger stops.

IFX_VALIDATE differs from IFX_ASSERT in the way that the expr expression is evaluated whatever the assertion level set by IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT.

The output needs to the be set with the function Ifx_Assert_setStandardIo() in order for the message to be displayed.

Parameters
level | level of the assertion, range=[IFX_VERBOSE_LEVEL_OFF, IFX_VERBOSE_LEVEL_FAILURE, IFX_VERBOSE_LEVEL_ERROR, IFX_VERBOSE_LEVEL_WARNING, IFX_VERBOSE_LEVEL_INFO, IFX_VERBOSE_LEVEL_DEBUG]
expr | expression to be tested. If FALSE the assertion is executed else nothing is done
Returns
void

Definition at line 199 of file Assert.h.

Function Documentation

◆ Ifx_Assert_doLevel()

IFX_EXTERN void Ifx_Assert_doLevel | ( | uint8 | level,
 |  | pchar | __assertion,
 |  | pchar | __file,
 |  | unsigned int | __line,
 |  | pchar | __function
 | ) |  |

Definition at line 74 of file Assert.c.

◆ Ifx_Assert_doValidate()

IFX_EXTERN boolean Ifx_Assert_doValidate | ( | boolean | expr,
 |  | uint8 | level,
 |  | pchar | __assertion,
 |  | pchar | __file,
 |  | unsigned int | __line,
 |  | pchar | __function
 | ) |  |

Definition at line 97 of file Assert.c.


iLLD_TC38A: Assert.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Bsp
Macros | Functions
Assert.h File Reference
Service software » System Engineering » Board support package » Assertion

Assert functions. More...

#include "_Utilities/Ifx_Assert.h"
Include dependency graph for Assert.h:

Go to the source code of this file.

Macros

#define | IFX_CFG_ASSERT_STDIO (0)
If set to 1, the assert message is send to the Assert_io interface. More...
#define | IFX_CFG_ASSERT_USE_BREAKPOINT (0)
If set to 1, the assert function will break the execution (breakpoint) More...
#define | IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT (IFX_VERBOSE_LEVEL_INFO)
defines the assertion default level More...
#define | Ifx_Assert_setStandardIo(standardIo) ((void)0)
Set the standard output used for IFX_ASSERT and IFX_VALIDATE. More...
#define | IFX_CFG_ASSERT_STDIO (0)
If set to 1, the assert message is send to the Assert_io interface. More...
#define | IFX_ASSERT(level, expr) ((void)0)
Assertion function (assert) More...
#define | IFX_VALIDATE(level, expr) (expr)
Assertion function (validate) More...

Functions

IFX_EXTERN void | Ifx_Assert_doLevel (uint8 level, pchar __assertion, pchar __file, unsigned int __line, pchar __function)
IFX_EXTERN boolean | Ifx_Assert_doValidate (boolean expr, uint8 level, pchar __assertion, pchar __file, unsigned int __line, pchar __function)

Detailed Description

Assert functions.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-28 14:15:34 GMT
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Assert.h.


iLLD_TC38A: Board support package

Files
Board support package
Service software » System Engineering » Board support package
Collaboration diagram for Board support package:

Files

file | Bsp.c
Board support package.
file | Bsp.h
Board support package.

Interrupt APIs

IFX_INLINE boolean | areInterruptsEnabled (void)
Return the status of the global interrupts. More...
IFX_INLINE boolean | disableInterrupts (void)
Disable the global interrupts. More...
IFX_INLINE void | enableInterrupts (void)
enable the global interrupts More...
IFX_INLINE void | restoreInterrupts (boolean enabled)
Restore the state of the global interrupts. More...
IFX_INLINE void | forceDisableInterrupts (void)
Disable the global interrupts forcefully. More...

Time APIs

typedef void(* | WaitTimeFunction) (Ifx_TickTime timeout)
IFX_INLINE Ifx_TickTime | addTTime (Ifx_TickTime a, Ifx_TickTime b)
Add 2 Ifx_TickTime values and return the result. More...
IFX_INLINE Ifx_TickTime | elapsed (Ifx_TickTime since)
Return the elapsed time in ticks. More...
IFX_INLINE Ifx_TickTime | getDeadLine (Ifx_TickTime timeout)
Return the time dead line. More...
IFX_INLINE Ifx_TickTime | getTimeout (Ifx_TickTime deadline)
Return the time until the dead line. More...
IFX_EXTERN void | initTime (void)
time constant equal to 1s More...
IFX_INLINE boolean | isDeadLine (Ifx_TickTime deadLine)
Return TRUE if the dead line is over. More...
IFX_INLINE Ifx_TickTime | now (void)
Return system timer value (critical section). More...
IFX_INLINE Ifx_TickTime | nowWithoutCriticalSection (void)
Return system timer value (without critical section). More...
IFX_INLINE boolean | poll (volatile boolean *test, Ifx_TickTime timeout)
Poll a variable for a time. More...
IFX_INLINE Ifx_TickTime | timingNoInterruptEnd (Ifx_TickTime since, boolean interruptEnabled)
Return the elapsed time in system timer ticks, and enable the interrupts. More...
IFX_INLINE Ifx_TickTime | timingNoInterruptStart (boolean *interruptEnabled)
Disable the interrupt and return system timer value. More...
IFX_INLINE void | wait (Ifx_TickTime timeout)
Wait for a while. More...
IFX_EXTERN void | waitPoll (void)
Wait function. More...
IFX_EXTERN void | waitTime (Ifx_TickTime timeout)
Wait time function. More...
#define | TimeConst_0s ((Ifx_TickTime)0)
time constant equal to 1s More...
#define | TimeConst_10ns (TimeConst[TIMER_INDEX_10NS])
time constant equal to 10ns More...
#define | TimeConst_100ns (TimeConst[TIMER_INDEX_100NS])
time constant equal to 100ns More...
#define | TimeConst_1us (TimeConst[TIMER_INDEX_1US])
time constant equal to 1us More...
#define | TimeConst_10us (TimeConst[TIMER_INDEX_10US])
time constant equal to 10us More...
#define | TimeConst_100us (TimeConst[TIMER_INDEX_100US])
time constant equal to 100us More...
#define | TimeConst_1ms (TimeConst[TIMER_INDEX_1MS])
time constant equal to 1ms More...
#define | TimeConst_10ms (TimeConst[TIMER_INDEX_10MS])
time constant equal to 10ms More...
#define | TimeConst_100ms (TimeConst[TIMER_INDEX_100MS])
time constant equal to 100ms More...
#define | TimeConst_1s (TimeConst[TIMER_INDEX_1S])
time constant equal to 1s More...
#define | TimeConst_10s (TimeConst[TIMER_INDEX_10S])
time constant equal to 10s More...
#define | TimeConst_100s (TimeConst[TIMER_INDEX_100S])
time constant equal to 100s More...

Detailed Description

This module implements the board support package

Macro Definition Documentation

◆ TimeConst_0s

#define TimeConst_0s ((Ifx_TickTime)0)

time constant equal to 1s

Definition at line 192 of file Bsp.h.

◆ TimeConst_100ms

#define TimeConst_100ms (TimeConst[TIMER_INDEX_100MS])

time constant equal to 100ms

Definition at line 200 of file Bsp.h.

◆ TimeConst_100ns

#define TimeConst_100ns (TimeConst[TIMER_INDEX_100NS])

time constant equal to 100ns

Definition at line 194 of file Bsp.h.

◆ TimeConst_100s

#define TimeConst_100s (TimeConst[TIMER_INDEX_100S])

time constant equal to 100s

Definition at line 203 of file Bsp.h.

◆ TimeConst_100us

#define TimeConst_100us (TimeConst[TIMER_INDEX_100US])

time constant equal to 100us

Definition at line 197 of file Bsp.h.

◆ TimeConst_10ms

#define TimeConst_10ms (TimeConst[TIMER_INDEX_10MS])

time constant equal to 10ms

Definition at line 199 of file Bsp.h.

◆ TimeConst_10ns

#define TimeConst_10ns (TimeConst[TIMER_INDEX_10NS])

time constant equal to 10ns

Definition at line 193 of file Bsp.h.

◆ TimeConst_10s

#define TimeConst_10s (TimeConst[TIMER_INDEX_10S])

time constant equal to 10s

Definition at line 202 of file Bsp.h.

◆ TimeConst_10us

#define TimeConst_10us (TimeConst[TIMER_INDEX_10US])

time constant equal to 10us

Definition at line 196 of file Bsp.h.

◆ TimeConst_1ms

#define TimeConst_1ms (TimeConst[TIMER_INDEX_1MS])

time constant equal to 1ms

Definition at line 198 of file Bsp.h.

◆ TimeConst_1s

#define TimeConst_1s (TimeConst[TIMER_INDEX_1S])

time constant equal to 1s

Definition at line 201 of file Bsp.h.

Referenced by DateTime_get(), and DateTime_set().

◆ TimeConst_1us

#define TimeConst_1us (TimeConst[TIMER_INDEX_1US])

time constant equal to 1us

Definition at line 195 of file Bsp.h.

Typedef Documentation

◆ WaitTimeFunction

typedef void(* WaitTimeFunction) (Ifx_TickTime timeout)

Prototype for wait() functions

Definition at line 190 of file Bsp.h.

Function Documentation

◆ addTTime()

IFX_INLINE Ifx_TickTime addTTime | ( | Ifx_TickTime | a,
 |  | Ifx_TickTime | b
 | ) |  |

Add 2 Ifx_TickTime values and return the result.

Parameters
a | parameter a
b | parameter b
Returns
a + b. If either a or b is TIME_INFINITE, the result is TIME_INFINITE

Definition at line 254 of file Bsp.h.

◆ areInterruptsEnabled()

IFX_INLINE boolean areInterruptsEnabled ( void )

Return the status of the global interrupts.

Return values
TRUE | if the global interrupts are enabled.
FALSE | if the global interrupts are disabled.
See also
restoreInterrupts(), disableInterrupts()

Definition at line 92 of file Bsp.h.

◆ disableInterrupts()

IFX_INLINE boolean disableInterrupts ( void )

Disable the global interrupts.

Return values
TRUE | if the global interrupts were enabled before the call to the function.
FALSE | if the global interrupts are disabled before the call to the function.
See also
areInterruptsEnabled(), restoreInterrupts()

Definition at line 105 of file Bsp.h.

Referenced by now(), and timingNoInterruptStart().

◆ elapsed()

IFX_INLINE Ifx_TickTime elapsed ( Ifx_TickTime since )

Return the elapsed time in ticks.

Return the elapsed time between the current time and the time passed as parameter

Returns
Returns the elapsed time.

Definition at line 277 of file Bsp.h.

◆ enableInterrupts()

IFX_INLINE void enableInterrupts ( void )

enable the global interrupts

Definition at line 125 of file Bsp.h.

◆ forceDisableInterrupts()

IFX_INLINE void forceDisableInterrupts ( void )

Disable the global interrupts forcefully.

See also
areInterruptsEnabled(), restoreInterrupts()

Definition at line 116 of file Bsp.h.

◆ getDeadLine()

IFX_INLINE Ifx_TickTime getDeadLine ( Ifx_TickTime timeout )

Return the time dead line.

Parameters
timeout Specifies the dead line from now: Deadline = Now + Timeout
Returns
Return the time dead line.

Definition at line 289 of file Bsp.h.

Referenced by poll(), and wait().

◆ getTimeout()

IFX_INLINE Ifx_TickTime getTimeout ( Ifx_TickTime deadline )

Return the time until the dead line.

Parameters
deadline Specifies the dead line from now: Deadline = Now + Timeout
Returns
Return the time until the dead line.

Definition at line 312 of file Bsp.h.

◆ initTime()

IFX_EXTERN void initTime ( void )

time constant equal to 1s

◆ isDeadLine()

IFX_INLINE boolean isDeadLine ( Ifx_TickTime deadLine )

Return TRUE if the dead line is over.

Parameters
deadLine Specifies the dead line.
Return values
TRUE | Returns TRUE if the dead line is over
FALSE | Returns FALSE if the dead line is not yet over

Definition at line 336 of file Bsp.h.

Referenced by poll(), and wait().

◆ now()

IFX_INLINE Ifx_TickTime now ( void )

Return system timer value (critical section).

The function IfxStm_get() is called in a critical section, disabling the interrupts. The system timer value is limited to TIME_INFINITE.

Returns
Returns system timer value.

Definition at line 218 of file Bsp.h.

Referenced by DateTime_get(), DateTime_set(), elapsed(), getDeadLine(), getTimeout(), IfxStm_getOffsetTimer(), and isDeadLine().

◆ nowWithoutCriticalSection()

IFX_INLINE Ifx_TickTime nowWithoutCriticalSection ( void )

Return system timer value (without critical section).

The function IfxStm_get() is called. The system timer value is limited to TIME_INFINITE.

Returns
Returns system timer value.

Definition at line 237 of file Bsp.h.

Referenced by timingNoInterruptEnd(), and timingNoInterruptStart().

◆ poll()

IFX_INLINE boolean poll | ( | volatile boolean * | test,
 |  | Ifx_TickTime | timeout
 | ) |  |

Poll a variable for a time.

Parameters
test | Specifies the variable to test.
timeout | Specifies the maximal time the variable will be tested
Return values
TRUE | Returns TRUE if the variable gets TRUE before the timeout elapse
FALSE | Returns FALSE if the variable is FALSE as the timeout elapse

Definition at line 361 of file Bsp.h.

◆ restoreInterrupts()

IFX_INLINE void restoreInterrupts ( boolean enabled )

Restore the state of the global interrupts.

Parameters
enabled if TRUE, re-enable the global interrupts, else do nothing.
Returns
None.
See also
areInterruptsEnabled(), disableInterrupts()

Definition at line 139 of file Bsp.h.

Referenced by now(), and timingNoInterruptEnd().

◆ timingNoInterruptEnd()

IFX_INLINE Ifx_TickTime timingNoInterruptEnd | ( | Ifx_TickTime | since,
 |  | boolean | interruptEnabled
 | ) |  |

Return the elapsed time in system timer ticks, and enable the interrupts.

The interrupts are enable by the function

Parameters
since | time returned by timingNoInterruptStart()
interruptEnabled | If TRUE, the interrupts will be enabled before the function exit. This parameter should be set to the value returned by timingNoInterruptStart()
Returns
Returns the elapsed time.
See also
timingNoInterruptStart()

Definition at line 383 of file Bsp.h.

◆ timingNoInterruptStart()

IFX_INLINE Ifx_TickTime timingNoInterruptStart ( boolean * interruptEnabled )

Disable the interrupt and return system timer value.

The interrupt remains disabled after the function call

Returns
Returns system timer value.
See also
timingNoInterruptEnd()

Definition at line 402 of file Bsp.h.

◆ wait()

IFX_INLINE void wait ( Ifx_TickTime timeout )

Wait for a while.

Parameters
timeout Specifies the waiting time
Returns
None.

Definition at line 416 of file Bsp.h.

Referenced by waitTime().

◆ waitPoll()

IFX_EXTERN void waitPoll ( void )

Wait function.

This is an empty function that just spend some time waiting.

Returns
None.

Definition at line 52 of file Bsp.c.

◆ waitTime()

IFX_EXTERN void waitTime ( Ifx_TickTime timeout )

Wait time function.

This is an empty function that that returns after the timeout elapsed. The minimal time spend in the function is guaranteed, but not the max time.

Parameters
timeout Specifies the time the function waits for before returning
Returns
None.

Definition at line 64 of file Bsp.c.


iLLD_TC38A: Bsp.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Bsp
Functions
Bsp.c File Reference
Service software » System Engineering » Board support package » Board support package

Board support package. More...

#include "Bsp.h"
Include dependency graph for Bsp.c:

Go to the source code of this file.

Functions

void | waitPoll (void)
Wait function. More...
void | waitTime (Ifx_TickTime timeout)
Wait time function. More...

Detailed Description

Board support package.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-28 14:15:34 GMT
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Bsp.c.


iLLD_TC38A: Bsp.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Bsp
Macros | Variables
Bsp.h File Reference
Service software » System Engineering » Board support package » Board support package

Board support package. More...

#include "Ifx_Cfg.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "_Utilities/Ifx_Assert.h"
#include "Cpu/Std/IfxCpu.h"
#include "Port/Std/IfxPort.h"
#include "Src/Std/IfxSrc.h"
#include "Stm/Std/IfxStm.h"
#include "Scu/Std/IfxScuCcu.h"
Include dependency graph for Bsp.h:

Go to the source code of this file.

Macros

#define | BSP_DEFAULT_TIMER (&MODULE_STM0)
#define | TIMER_COUNT (11)
#define | TIMER_INDEX_10NS (0)
#define | TIMER_INDEX_100NS (1)
#define | TIMER_INDEX_1US (2)
#define | TIMER_INDEX_10US (3)
#define | TIMER_INDEX_100US (4)
#define | TIMER_INDEX_1MS (5)
#define | TIMER_INDEX_10MS (6)
#define | TIMER_INDEX_100MS (7)
#define | TIMER_INDEX_1S (8)
#define | TIMER_INDEX_10S (9)
#define | TIMER_INDEX_100S (10)
#define | PIN_DRIVER_STRONG_SHARP IfxPort_PadDriver_cmosAutomotiveSpeed1
#define | Pin_setState(pin, mode) IfxPort_setPinState((pin)->port, (pin)->pinIndex, (mode))
#define | Pin_setGroupState(pin, mask, data) IfxPort_setGroupState((pin)->port, (pin)->pinIndex, (mask), (data))
#define | Pin_setMode(pin, mode) IfxPort_setPinMode((pin)->port, (pin)->pinIndex, (mode))
#define | Pin_setDriver(pin, mode) IfxPort_setPinPadDriver((pin)->port, (pin)->pinIndex, (mode))
#define | Pin_setStateHigh(pin) IfxPort_setPinHigh((pin)->port, (pin)->pinIndex)
#define | Pin_setStateLow(pin) IfxPort_setPinLow((pin)->port, (pin)->pinIndex)
#define | Pin_getState(pin) IfxPort_getPinState((pin)->port, (pin)->pinIndex)
#define | Pin_setGroupModeOutput(pin, mask, mode, outputIdx) IfxPort_setGroupModeOutput((pin)->port, (pin)->pinIndex, (mask), (mode), (outputIdx))
#define | Pin_setGroupModeInput(pin, mask, mode) IfxPort_setGroupModeInput((pin)->port, (pin)->pinIndex, (mask), (mode))
#define | Pin_setGroupState(pin, mask, data) IfxPort_setGroupState((pin)->port, (pin)->pinIndex, (mask), (data))
#define | Pin_getGroupState(pin, mask) IfxPort_getGroupState((pin)->port, (pin)->pinIndex, (mask))
#define | Pin_enableEmgStop(pin) IfxPort_enableEmergencyStop((pin)->port, (pin)->pinIndex)

Functions

Interrupt APIs
IFX_INLINE boolean | areInterruptsEnabled (void)
Return the status of the global interrupts. More...
IFX_INLINE boolean | disableInterrupts (void)
Disable the global interrupts. More...
IFX_INLINE void | enableInterrupts (void)
enable the global interrupts More...
IFX_INLINE void | restoreInterrupts (boolean enabled)
Restore the state of the global interrupts. More...
IFX_INLINE void | forceDisableInterrupts (void)
Disable the global interrupts forcefully. More...

Variables

IFX_EXTERN Ifx_TickTime TimeConst [TIMER_COUNT]

Time APIs

#define | TimeConst_0s ((Ifx_TickTime)0)
time constant equal to 1s More...
#define | TimeConst_10ns (TimeConst[TIMER_INDEX_10NS])
time constant equal to 10ns More...
#define | TimeConst_100ns (TimeConst[TIMER_INDEX_100NS])
time constant equal to 100ns More...
#define | TimeConst_1us (TimeConst[TIMER_INDEX_1US])
time constant equal to 1us More...
#define | TimeConst_10us (TimeConst[TIMER_INDEX_10US])
time constant equal to 10us More...
#define | TimeConst_100us (TimeConst[TIMER_INDEX_100US])
time constant equal to 100us More...
#define | TimeConst_1ms (TimeConst[TIMER_INDEX_1MS])
time constant equal to 1ms More...
#define | TimeConst_10ms (TimeConst[TIMER_INDEX_10MS])
time constant equal to 10ms More...
#define | TimeConst_100ms (TimeConst[TIMER_INDEX_100MS])
time constant equal to 100ms More...
#define | TimeConst_1s (TimeConst[TIMER_INDEX_1S])
time constant equal to 1s More...
#define | TimeConst_10s (TimeConst[TIMER_INDEX_10S])
time constant equal to 10s More...
#define | TimeConst_100s (TimeConst[TIMER_INDEX_100S])
time constant equal to 100s More...
typedef void(* | WaitTimeFunction) (Ifx_TickTime timeout)
IFX_INLINE Ifx_TickTime | addTTime (Ifx_TickTime a, Ifx_TickTime b)
Add 2 Ifx_TickTime values and return the result. More...
IFX_INLINE Ifx_TickTime | elapsed (Ifx_TickTime since)
Return the elapsed time in ticks. More...
IFX_INLINE Ifx_TickTime | getDeadLine (Ifx_TickTime timeout)
Return the time dead line. More...
IFX_INLINE Ifx_TickTime | getTimeout (Ifx_TickTime deadline)
Return the time until the dead line. More...
IFX_EXTERN void | initTime (void)
time constant equal to 1s More...
IFX_INLINE boolean | isDeadLine (Ifx_TickTime deadLine)
Return TRUE if the dead line is over. More...
IFX_INLINE Ifx_TickTime | now (void)
Return system timer value (critical section). More...
IFX_INLINE Ifx_TickTime | nowWithoutCriticalSection (void)
Return system timer value (without critical section). More...
IFX_INLINE boolean | poll (volatile boolean *test, Ifx_TickTime timeout)
Poll a variable for a time. More...
IFX_INLINE Ifx_TickTime | timingNoInterruptEnd (Ifx_TickTime since, boolean interruptEnabled)
Return the elapsed time in system timer ticks, and enable the interrupts. More...
IFX_INLINE Ifx_TickTime | timingNoInterruptStart (boolean *interruptEnabled)
Disable the interrupt and return system timer value. More...
IFX_INLINE void | wait (Ifx_TickTime timeout)
Wait for a while. More...
IFX_EXTERN void | waitPoll (void)
Wait function. More...
IFX_EXTERN void | waitTime (Ifx_TickTime timeout)
Wait time function. More...

Detailed Description

Board support package.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-28 14:15:35 GMT
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Bsp.h.

Macro Definition Documentation

◆ BSP_DEFAULT_TIMER

#define BSP_DEFAULT_TIMER (&MODULE_STM0)

Defined the default timer used

Definition at line 62 of file Bsp.h.

Referenced by now(), and nowWithoutCriticalSection().

◆ PIN_DRIVER_STRONG_SHARP

#define PIN_DRIVER_STRONG_SHARP IfxPort_PadDriver_cmosAutomotiveSpeed1

Definition at line 425 of file Bsp.h.

◆ Pin_enableEmgStop

#define Pin_enableEmgStop ( pin ) IfxPort_enableEmergencyStop((pin)->port, (pin)->pinIndex)

Definition at line 437 of file Bsp.h.

◆ Pin_getGroupState

#define Pin_getGroupState | ( | pin,
 |  | mask
 | ) | IfxPort_getGroupState((pin)->port, (pin)->pinIndex, (mask))

Definition at line 436 of file Bsp.h.

◆ Pin_getState

#define Pin_getState ( pin ) IfxPort_getPinState((pin)->port, (pin)->pinIndex)

Definition at line 432 of file Bsp.h.

◆ Pin_setDriver

#define Pin_setDriver | ( | pin,
 |  | mode
 | ) | IfxPort_setPinPadDriver((pin)->port, (pin)->pinIndex, (mode))

Definition at line 429 of file Bsp.h.

◆ Pin_setGroupModeInput

#define Pin_setGroupModeInput | ( | pin,
 |  | mask,
 |  | mode
 | ) | IfxPort_setGroupModeInput((pin)->port, (pin)->pinIndex, (mask), (mode))

Definition at line 434 of file Bsp.h.

◆ Pin_setGroupModeOutput

#define Pin_setGroupModeOutput | ( | pin,
 |  | mask,
 |  | mode,
 |  | outputIdx
 | ) | IfxPort_setGroupModeOutput((pin)->port, (pin)->pinIndex, (mask), (mode), (outputIdx))

Definition at line 433 of file Bsp.h.

◆ Pin_setGroupState [1/2]

#define Pin_setGroupState | ( | pin,
 |  | mask,
 |  | data
 | ) | IfxPort_setGroupState((pin)->port, (pin)->pinIndex, (mask), (data))

Definition at line 435 of file Bsp.h.

◆ Pin_setGroupState [2/2]

#define Pin_setGroupState | ( | pin,
 |  | mask,
 |  | data
 | ) | IfxPort_setGroupState((pin)->port, (pin)->pinIndex, (mask), (data))

Definition at line 435 of file Bsp.h.

◆ Pin_setMode

#define Pin_setMode | ( | pin,
 |  | mode
 | ) | IfxPort_setPinMode((pin)->port, (pin)->pinIndex, (mode))

Definition at line 428 of file Bsp.h.

◆ Pin_setState

#define Pin_setState | ( | pin,
 |  | mode
 | ) | IfxPort_setPinState((pin)->port, (pin)->pinIndex, (mode))

Definition at line 426 of file Bsp.h.

◆ Pin_setStateHigh

#define Pin_setStateHigh ( pin ) IfxPort_setPinHigh((pin)->port, (pin)->pinIndex)

Definition at line 430 of file Bsp.h.

◆ Pin_setStateLow

#define Pin_setStateLow ( pin ) IfxPort_setPinLow((pin)->port, (pin)->pinIndex)

Definition at line 431 of file Bsp.h.

◆ TIMER_COUNT

#define TIMER_COUNT (11)

Definition at line 148 of file Bsp.h.

◆ TIMER_INDEX_100MS

#define TIMER_INDEX_100MS (7)

Definition at line 156 of file Bsp.h.

◆ TIMER_INDEX_100NS

#define TIMER_INDEX_100NS (1)

Definition at line 150 of file Bsp.h.

◆ TIMER_INDEX_100S

#define TIMER_INDEX_100S (10)

Definition at line 159 of file Bsp.h.

◆ TIMER_INDEX_100US

#define TIMER_INDEX_100US (4)

Definition at line 153 of file Bsp.h.

◆ TIMER_INDEX_10MS

#define TIMER_INDEX_10MS (6)

Definition at line 155 of file Bsp.h.

◆ TIMER_INDEX_10NS

#define TIMER_INDEX_10NS (0)

Definition at line 149 of file Bsp.h.

◆ TIMER_INDEX_10S

#define TIMER_INDEX_10S (9)

Definition at line 158 of file Bsp.h.

◆ TIMER_INDEX_10US

#define TIMER_INDEX_10US (3)

Definition at line 152 of file Bsp.h.

◆ TIMER_INDEX_1MS

#define TIMER_INDEX_1MS (5)

Definition at line 154 of file Bsp.h.

◆ TIMER_INDEX_1S

#define TIMER_INDEX_1S (8)

Definition at line 157 of file Bsp.h.

◆ TIMER_INDEX_1US

#define TIMER_INDEX_1US (2)

Definition at line 151 of file Bsp.h.

Variable Documentation

◆ TimeConst

IFX_EXTERN Ifx_TickTime TimeConst[TIMER_COUNT]

Definition at line 165 of file Bsp.h.


iLLD_TC38A: Communication

Modules
Communication
Service software » System Engineering
Collaboration diagram for Communication:

Modules

Console
Shell

Detailed Description


iLLD_TC38A: Console

Macros | Functions
Console
Service software » System Engineering » Communication
Collaboration diagram for Console:

Macros

#define CONSOLE Ifx_g_console
Alias Ifx_g_console object (by value) More...

Functions

IFX_INLINE IfxStdIf_DPipe * | Ifx_Console_getIo (void)
Return pointer to the default console object. More...
IFX_EXTERN void | Ifx_Console_init (IfxStdIf_DPipe *standardIo)
Initialize the Ifx_g_console object. More...
IFX_EXTERN boolean | Ifx_Console_print (pchar format,...)
Print formatted string into Ifx_g_console. More...
IFX_EXTERN boolean | Ifx_Console_printAlign (pchar format,...)
Print formatted string into Ifx_g_console. Indented with a number of spaces. More...
IFX_INLINE void | Ifx_Console_decrAlign (sint16 value)
Decrement the alignment/indentation using the given value. More...
IFX_INLINE void | Ifx_Console_incrAlign (sint16 value)
Increment the alignment/indentation using the given value. More...

Detailed Description

This module implements "Main Console" functions

Macro Definition Documentation

◆ CONSOLE

#define CONSOLE Ifx_g_console

Alias Ifx_g_console object (by value)

Definition at line 71 of file Ifx_Console.h.

Function Documentation

◆ Ifx_Console_decrAlign()

IFX_INLINE void Ifx_Console_decrAlign ( sint16 value )

Decrement the alignment/indentation using the given value.

Parameters
value the increment. If value == 0, IFX_CFG_CONSOLE_INDENT_SIZE will be used.

Definition at line 93 of file Ifx_Console.h.

◆ Ifx_Console_getIo()

IFX_INLINE IfxStdIf_DPipe* Ifx_Console_getIo ( void )

Return pointer to the default console object.

User can override this function by defining new CONSOLE macro and this function externally, e.g. inside Ifx_Cfg.h file.

Definition at line 77 of file Ifx_Console.h.

◆ Ifx_Console_incrAlign()

IFX_INLINE void Ifx_Console_incrAlign ( sint16 value )

Increment the alignment/indentation using the given value.

Parameters
value the increment. If value == 0, IFX_CFG_CONSOLE_INDENT_SIZE will be used.

Definition at line 104 of file Ifx_Console.h.

◆ Ifx_Console_init()

IFX_EXTERN void Ifx_Console_init ( IfxStdIf_DPipe * standardIo )

Initialize the Ifx_g_console object.

Parameters
standardIo Pointer to the IfxStdIf_DPipe object used by the Ifx_g_console.

Definition at line 56 of file Ifx_Console.c.

◆ Ifx_Console_print()

IFX_EXTERN boolean Ifx_Console_print | ( | pchar | format,
 |  |  | ...
 | ) |  |

Print formatted string into Ifx_g_console.

Parameters
format printf-compatible formatted string.
Return values
TRUE | if the string is printed successfully
FALSE | if the function failed.

Definition at line 69 of file Ifx_Console.c.

◆ Ifx_Console_printAlign()

IFX_EXTERN boolean Ifx_Console_printAlign | ( | pchar | format,
 |  |  | ...
 | ) |  |

Print formatted string into Ifx_g_console. Indented with a number of spaces.

Parameters
format printf-compatible formatted string.
Return values
TRUE | if the string is printed successfully
FALSE | if the function failed.

Definition at line 98 of file Ifx_Console.c.


iLLD_TC38A: Shell

Files
Shell
Service software » System Engineering » Communication
Collaboration diagram for Shell:

Files

file Ifx_Shell.h
Shell functions.

Basic functionality

void | Ifx_Shell_initConfig (Ifx_Shell_Config *config)
IFX_EXTERN boolean | Ifx_Shell_init (Ifx_Shell *shell, const Ifx_Shell_Config *config)
Initialize the shell. More...
IFX_EXTERN void | Ifx_Shell_deinit (Ifx_Shell *shell)
Deinitialise the shell. More...
IFX_EXTERN void | Ifx_Shell_enable (Ifx_Shell *shell)
Clear the receive buffer and enable the shell. More...
IFX_EXTERN void | Ifx_Shell_disable (Ifx_Shell *shell)
Disable the shell. More...
IFX_EXTERN void | Ifx_Shell_process (Ifx_Shell *shell)
Process the shell. More...

Parsing functions

IFX_EXTERN pchar | Ifx_Shell_skipWhitespace (pchar args)
Within the context of Shell.call, skip the whitespaces of the args string. More...
IFX_EXTERN boolean | Ifx_Shell_matchToken (pchar *argsPtr, pchar token)
Match string pointed by the *argsPtr with a given token. More...
IFX_EXTERN boolean | Ifx_Shell_parseToken (pchar *argsPtr, char *tokenBuffer, int bufferLength)
Parse a token Return the next token in tokenBuffer and move the argsPtr pointer after this token. More...
IFX_EXTERN boolean | Ifx_Shell_parseAddress (pchar *argsPtr, void **address)
Parse an address. More...
IFX_EXTERN boolean | Ifx_Shell_parseSInt32 (pchar *argsPtr, sint32 *value)
Parse a signed 32-bit integer value. More...
IFX_EXTERN boolean | Ifx_Shell_parseUInt32 (pchar *argsPtr, uint32 *value, boolean hex)
Parse an unsigned 32-bit integer value. More...
IFX_EXTERN boolean | Ifx_Shell_parseSInt64 (pchar *argsPtr, sint64 *value)
Parse a signed 64-bit integer value. More...
IFX_EXTERN boolean | Ifx_Shell_parseUInt64 (pchar *argsPtr, uint64 *value, boolean hex)
Parse an unsigned 64-bit integer value. More...
IFX_EXTERN boolean | Ifx_Shell_parseFloat64 (pchar *argsPtr, float64 *value)
Parse a 64-bit (double precision) floating-point value. More...
IFX_EXTERN boolean | Ifx_Shell_parseFloat32 (pchar *argsPtr, float32 *value)
Parse a 32-bit (single precision) floating-point value. More...

Command list functions

IFX_EXTERN const Ifx_Shell_Command * | Ifx_Shell_commandFind (Ifx_Shell_CommandListConst commandList, pchar commandLine, pchar *args, uint32 *match)
Find command in command List. More...
IFX_EXTERN boolean | Ifx_Shell_showHelpSingle (Ifx_Shell_CommandListConst commandList, IfxStdIf_DPipe *io, boolean briefOnly, boolean singleCommand)
Implementation of Ifx_Shell_Call. Show the help menu from single command list. More...
IFX_EXTERN boolean | Ifx_Shell_showHelp (pchar args, void *shellPtr, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. Show the help menu and list of commands. More...
IFX_EXTERN void | Ifx_Shell_printSyntax (const Ifx_Shell_Syntax *syntaxList, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. print the syntax. More...

Sub protocol functions

IFX_EXTERN boolean | Ifx_Shell_protocolStart (pchar args, void *data, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. Start the Shell protocol. More...
IFX_EXTERN boolean | Ifx_Shell_bbProtocolStart (pchar args, void *data, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. Start the ShellBb protocol. More...

Detailed Description

This module implements the Shell functions. It parses a command line and call the corresponding command execution. Multiple command list can be used in parallel.

Only full command match is accepted.

New feature / change:

  • Prefix can be defined for each command list
  • Help for a single command is displayed with "help <command>"
  • help for a command list is displayed with "help <listPrefix>"
  • command short cut is not allowed
  • command with identical start option "opt1 opt2" and "opt1 opt3" are accepted, and root to different handlers
  • Enhanced help info print

Help text xyntax:

  • /p indicates a parameter description, can be multi-line, lines must be separated with ENDL
  • /s Indicates a syntax help

Example of help list:

Ifx_Shell_Command Ifx_g_OsciShell_commands[] =
{
{IFX_OSCI_SHELL_PREFIX, " : Oscilloscope functions"
, NULL_PTR, NULL_PTR },
{"run", " : run the oscilloscope" ENDL
"/s run [single|auto|normal]"
, NULL_PTR, &Ifx_OsciShell_run },
{"stop", " : stop oscilloscope"
, NULL_PTR, &Ifx_OsciShell_stop },
{"trigger", " : trigger settings" ENDL
"/s trigger [force|single|level <value>|raising|falling|source <chNum>|interval <value>]" ENDL
"/p force: Force the trigger" ENDL
"/p single: Single the trigger" ENDL
"/p level <value>: Set trigger level to value" ENDL
"/p [raising|falling]: Set trigger to raising or falling edges" ENDL
"/p source <chNum>: Set trigger channel number" ENDL
"<chNum> can be obtained with 'channel' command" ENDL
"/p interval <value>: Set sampling interval to value"
, NULL_PTR, &Ifx_OsciShell_trigger },
{"status", " : display status"
, NULL_PTR, &Ifx_OsciShell_status },
{"channel", " : channel information" ENDL
"/s channel: Show the channels information" ENDL
"/s channel <ch> <sig>: Assign a signal to a channel"
, NULL_PTR, &Ifx_OsciShell_channel },
{"analyze", " : signal analysis of a ch" ENDL
"/s analyze <ch>: analyze the input channel <ch>"
, NULL_PTR, &Ifx_OsciShell_analyze },
{"simulate", " : simulate a signal" ENDL
"/s simulate <ch> <op> <wave> <freq> <ampl> <offs> <phase> : Simulate a signal generation" ENDL
"/p <ch> : {0 .. Channel count}" ENDL
"/p <op> : {add,sub,mul,clr}" ENDL
"/p <wave> : {sine,square}" ENDL
"/p <freq> : -INF .. INF" ENDL
"/p <offs> : -INF .. INF" ENDL
"/p <ampl> : -INF .. INF" ENDL
"/p <phase>: 0 .. 360 [degree]" ENDL
"/s simulate <ch> atan <ych> <xch>: Compute atan(ych/xch) and store in channel <ch>"
, NULL_PTR, &Ifx_OsciShell_simulate},
{"dump", " : dump values (all channels)" ENDL
"/s dump <ch> [hex]" ENDL
"/p <ch>: Dump the values of the channel <ch>" ENDL
"/p hex: If hex is specified, values will be in hexadecimal"
, NULL_PTR, &Ifx_OsciShell_dump },
IFX_SHELL_COMMAND_LIST_END,
};

To enable help command, include the below command in the main command list {"help", SHELL_HELP_DESCRIPTION_TEXT , &<Ifx_Shell>, &Ifx_Shell_showHelp, },

Function Documentation

◆ Ifx_Shell_bbProtocolStart()

IFX_EXTERN boolean Ifx_Shell_bbProtocolStart | ( | pchar | args,
 |  | void * | data,
 |  | IfxStdIf_DPipe * | io
 | ) |  |

Implementation of Ifx_Shell_Call. Start the ShellBb protocol.

Parameters
args | The argument null-terminated string
data | Pointer to Ifx_Shell object
io | Pointer to IfxStdIf_DPipe object

Definition at line 287 of file Ifx_Shell.c.

◆ Ifx_Shell_commandFind()

IFX_EXTERN const Ifx_Shell_Command* Ifx_Shell_commandFind | ( | Ifx_Shell_CommandListConst | commandList,
 |  | pchar | commandLine,
 |  | pchar * | args,
 |  | uint32 * | match
 | ) |  |

Find command in command List.

Parameters
commandList | Pointer to the first entry of an array of Ifx_Shell_Command
commandLine | Pointer to null-terminated string containings the command to search.
args | Pointer to the argument null-terminated string
match | Return the number of arguments that matches

Definition at line 945 of file Ifx_Shell.c.

Referenced by Ifx_Shell_commandListFind().

◆ Ifx_Shell_deinit()

IFX_EXTERN void Ifx_Shell_deinit ( Ifx_Shell * shell )

Deinitialise the shell.

Parameters
shell Pointer to the Ifx_Shell object

Definition at line 648 of file Ifx_Shell.c.

◆ Ifx_Shell_disable()

IFX_EXTERN void Ifx_Shell_disable ( Ifx_Shell * shell )

Disable the shell.

Parameters
shell Pointer to the Ifx_Shell object

Definition at line 1316 of file Ifx_Shell.c.

◆ Ifx_Shell_enable()

IFX_EXTERN void Ifx_Shell_enable ( Ifx_Shell * shell )

Clear the receive buffer and enable the shell.

Parameters
shell Pointer to the Ifx_Shell object

Definition at line 1307 of file Ifx_Shell.c.

◆ Ifx_Shell_init()

IFX_EXTERN boolean Ifx_Shell_init | ( | Ifx_Shell * | shell,
 |  | const Ifx_Shell_Config * | config
 | ) |  |

Initialize the shell.

Parameters
shell | Pointer to the Ifx_Shell object
config | Pointer to the configuration structure

Definition at line 331 of file Ifx_Shell.c.

◆ Ifx_Shell_initConfig()

void Ifx_Shell_initConfig ( Ifx_Shell_Config * config )

Set the config default parameter

Parameters
config Pointer to the configuration structure to be initialized

Definition at line 308 of file Ifx_Shell.c.

◆ Ifx_Shell_matchToken()

IFX_EXTERN boolean Ifx_Shell_matchToken | ( | pchar * | argsPtr,
 |  | pchar | token
 | ) |  |

Match string pointed by the *argsPtr with a given token.

Parameters
argsPtr | Pointer to the argument null-terminated string
token | Pointer to the token string to match
Return values
TRUE if the given token match with the string pointed by argsPtr

Definition at line 669 of file Ifx_Shell.c.

Referenced by Ifx_Shell_bbProtocolStart(), and Ifx_Shell_protocolStart().

◆ Ifx_Shell_parseAddress()

IFX_EXTERN boolean Ifx_Shell_parseAddress | ( | pchar * | argsPtr,
 |  | void ** | address
 | ) |  |

Parse an address.

Parameters
argsPtr | Pointer to the argument null-terminated string
address | Pointer to the value storage

Definition at line 788 of file Ifx_Shell.c.

◆ Ifx_Shell_parseFloat32()

IFX_EXTERN boolean Ifx_Shell_parseFloat32 | ( | pchar * | argsPtr,
 |  | float32 * | value
 | ) |  |

Parse a 32-bit (single precision) floating-point value.

Parameters
argsPtr | Pointer to the argument null-terminated string
value | Pointer to the value storage

Definition at line 925 of file Ifx_Shell.c.

◆ Ifx_Shell_parseFloat64()

IFX_EXTERN boolean Ifx_Shell_parseFloat64 | ( | pchar * | argsPtr,
 |  | float64 * | value
 | ) |  |

Parse a 64-bit (double precision) floating-point value.

Parameters
argsPtr | Pointer to the argument null-terminated string
value | Pointer to the value storage

Definition at line 905 of file Ifx_Shell.c.

◆ Ifx_Shell_parseSInt32()

IFX_EXTERN boolean Ifx_Shell_parseSInt32 | ( | pchar * | argsPtr,
 |  | sint32 * | value
 | ) |  |

Parse a signed 32-bit integer value.

Parameters
argsPtr | Pointer to the argument null-terminated string
value | Pointer to the value storage

Definition at line 808 of file Ifx_Shell.c.

◆ Ifx_Shell_parseSInt64()

IFX_EXTERN boolean Ifx_Shell_parseSInt64 | ( | pchar * | argsPtr,
 |  | sint64 * | value
 | ) |  |

Parse a signed 64-bit integer value.

Parameters
argsPtr | Pointer to the argument null-terminated string
value | Pointer to the value storage

Definition at line 850 of file Ifx_Shell.c.

Referenced by Ifx_Shell_parseSInt32().

◆ Ifx_Shell_parseToken()

IFX_EXTERN boolean Ifx_Shell_parseToken | ( | pchar * | argsPtr,
 |  | char * | tokenBuffer,
 |  | int | bufferLength
 | ) |  |

Parse a token Return the next token in tokenBuffer and move the argsPtr pointer after this token.

Parameters
argsPtr | Pointer to the argument null-terminated string
tokenBuffer | Pointer to the value storage
bufferLength | Maximum parsing length

Definition at line 721 of file Ifx_Shell.c.

Referenced by Ifx_Shell_matchToken(), Ifx_Shell_parseAddress(), Ifx_Shell_parseFloat32(), Ifx_Shell_parseFloat64(), Ifx_Shell_parseSInt64(), and Ifx_Shell_parseUInt64().

◆ Ifx_Shell_parseUInt32()

IFX_EXTERN boolean Ifx_Shell_parseUInt32 | ( | pchar * | argsPtr,
 |  | uint32 * | value,
 |  | boolean | hex
 | ) |  |

Parse an unsigned 32-bit integer value.

Parameters
argsPtr | Pointer to the argument null-terminated string
value | Pointer to the value storage
hex | if TRUE, hex parsing will be done, else decimal parsing

Definition at line 829 of file Ifx_Shell.c.

◆ Ifx_Shell_parseUInt64()

IFX_EXTERN boolean Ifx_Shell_parseUInt64 | ( | pchar * | argsPtr,
 |  | uint64 * | value,
 |  | boolean | hex
 | ) |  |

Parse an unsigned 64-bit integer value.

Parameters
argsPtr | Pointer to the argument null-terminated string
value | Pointer to the value storage
hex | if TRUE, hex parsing will be done, else decimal parsing

Definition at line 870 of file Ifx_Shell.c.

Referenced by Ifx_Shell_parseUInt32().

◆ Ifx_Shell_printSyntax()

IFX_EXTERN void Ifx_Shell_printSyntax | ( | const Ifx_Shell_Syntax * | syntaxList,
 |  | IfxStdIf_DPipe * | io
 | ) |  |

Implementation of Ifx_Shell_Call. print the syntax.

Parameters
syntaxList | Pointer to syntax list
io | Pointer to IfxStdIf_DPipe object

Definition at line 1322 of file Ifx_Shell.c.

◆ Ifx_Shell_process()

IFX_EXTERN void Ifx_Shell_process ( Ifx_Shell * shell )

Process the shell.

This function shall be called within a loop or periodic timer to guarantee the correct processing of the incoming/received data.

Parameters
shell Pointer to the Ifx_Shell object

Definition at line 388 of file Ifx_Shell.c.

◆ Ifx_Shell_protocolStart()

IFX_EXTERN boolean Ifx_Shell_protocolStart | ( | pchar | args,
 |  | void * | data,
 |  | IfxStdIf_DPipe * | io
 | ) |  |

Implementation of Ifx_Shell_Call. Start the Shell protocol.

Parameters
args | The argument null-terminated string
data | Pointer to Ifx_Shell object
io | Pointer to IfxStdIf_DPipe object

Definition at line 253 of file Ifx_Shell.c.

Referenced by Ifx_Shell_bbProtocolStart().

◆ Ifx_Shell_showHelp()

IFX_EXTERN boolean Ifx_Shell_showHelp | ( | pchar | args,
 |  | void * | shellPtr,
 |  | IfxStdIf_DPipe * | io
 | ) |  |

Implementation of Ifx_Shell_Call. Show the help menu and list of commands.

Parameters
args | The argument null-terminated string
shellPtr | Pointer to a Shell object
io | Pointer to IfxStdIf_DPipe object

Definition at line 228 of file Ifx_Shell.c.

Referenced by Ifx_Shell_execute().

◆ Ifx_Shell_showHelpSingle()

IFX_EXTERN boolean Ifx_Shell_showHelpSingle | ( | Ifx_Shell_CommandListConst | commandList,
 |  | IfxStdIf_DPipe * | io,
 |  | boolean | briefOnly,
 |  | boolean | singleCommand
 | ) |  |

Implementation of Ifx_Shell_Call. Show the help menu from single command list.

Parameters
commandList | Pointer to an array of Ifx_Shell_Command
io | Pointer to the IfxStdIf_DPipe object
briefOnly | if TRUE, show only the brief description, else show the full description
singleCommand | If TRUE, only show the 1st command pointed by commandList, else show the full list

Definition at line 104 of file Ifx_Shell.c.

Referenced by Ifx_Shell_showHelp(), and Ifx_Shell_showHelpSingleCommand().

◆ Ifx_Shell_skipWhitespace()

IFX_EXTERN pchar Ifx_Shell_skipWhitespace ( pchar args )

Within the context of Shell.call, skip the whitespaces of the args string.

Parameters
args Pointer to the original string
Returns
Pointer to the string after skipping the whitespaces

Definition at line 655 of file Ifx_Shell.c.

Referenced by Ifx_Shell_parseToken().


iLLD_TC38A: Ifx_Shell.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Comm
Data Structures | Macros | Typedefs | Enumerations
Ifx_Shell.h File Reference
Service software » System Engineering » Communication » Shell

Shell functions. More...

#include "StdIf/IfxStdIf_DPipe.h"
#include "Ifx_Cfg.h"
Include dependency graph for Ifx_Shell.h:

Go to the source code of this file.

Data Structures

struct | Ifx_Shell_Command
Shell command object. More...
struct | Ifx_Shell_CmdLine
Command line editing state. More...
struct | Ifx_Shell_Protocol
Shell protocol configuration. More...
struct | Ifx_Shell_Flags
Shell control flags. More...
struct | Ifx_Shell_Runtime
internal Shell run-time data More...
struct | Ifx_Shell
Shell object definition. More...
struct | Ifx_Shell_Config
Shell configuration. More...
struct | Ifx_Shell_Syntax
Shell Syntax Description. More...

Macros

#define | IFX_SHELL_NULL_CHAR '\0'
#define | IFX_CFG_SHELL_CMD_HISTORY_SIZE (10)
Number of commands to store in history. More...
#define | IFX_CFG_SHELL_CMD_LINE_SIZE (128)
max command line IFX_CFG_SHELL_CMD_LINE_SIZE - 1 More...
#define | IFX_CFG_SHELL_COMMAND_LISTS (1)
Number of command lists. More...
#define | IFX_CFG_SHELL_PROMPT "Shell>"
Shell prompt. More...
#define | SHELL_HELP_DESCRIPTION_TEXT
#define | IFX_SHELL_COMMAND_LIST_END {0, 0, 0, 0}
Marker for end of command list, the end of list is detected by commandLine=NULL. More...
#define | IFX_SHELL_SYNTAX_LIST_END {0, 0}
Marker for end of syntax list. More...
#define | IFX_SHELL_CMD_HISTORY_NO_ITEM (-1)
Signifies no item in use in command history list. More...

Typedefs

typedef boolean(* | Ifx_Shell_Call) (pchar args, void *data, IfxStdIf_DPipe *io)
Definition of a callback function which handles a Shell command. More...
typedef Ifx_Shell_Command * | Ifx_Shell_CommandList
typedef const Ifx_Shell_Command * | Ifx_Shell_CommandListConst

Enumerations

enum Ifx_Shell_ResultCode {
Ifx_Shell_ResultCode_unknown = (128),
Ifx_Shell_ResultCode_nok = (129),
Ifx_Shell_ResultCode_undefined = (130),
Ifx_Shell_ResultCode_ok = (255)
}
Result code definition used after each executed Shell command. More...
enum Ifx_Shell_CmdState {
IFX_SHELL_CMD_STATE_NORMAL,
IFX_SHELL_CMD_STATE_ESCAPE,
IFX_SHELL_CMD_STATE_ESCAPE_BRACKET,
IFX_SHELL_CMD_STATE_ESCAPE_BRACKET_NUMBER
}
Shell command processing state. More...

Functions

Basic functionality
void | Ifx_Shell_initConfig (Ifx_Shell_Config *config)
IFX_EXTERN boolean | Ifx_Shell_init (Ifx_Shell *shell, const Ifx_Shell_Config *config)
Initialize the shell. More...
IFX_EXTERN void | Ifx_Shell_deinit (Ifx_Shell *shell)
Deinitialise the shell. More...
IFX_EXTERN void | Ifx_Shell_enable (Ifx_Shell *shell)
Clear the receive buffer and enable the shell. More...
IFX_EXTERN void | Ifx_Shell_disable (Ifx_Shell *shell)
Disable the shell. More...
IFX_EXTERN void | Ifx_Shell_process (Ifx_Shell *shell)
Process the shell. More...
Parsing functions
IFX_EXTERN pchar | Ifx_Shell_skipWhitespace (pchar args)
Within the context of Shell.call, skip the whitespaces of the args string. More...
IFX_EXTERN boolean | Ifx_Shell_matchToken (pchar *argsPtr, pchar token)
Match string pointed by the *argsPtr with a given token. More...
IFX_EXTERN boolean | Ifx_Shell_parseToken (pchar *argsPtr, char *tokenBuffer, int bufferLength)
Parse a token Return the next token in tokenBuffer and move the argsPtr pointer after this token. More...
IFX_EXTERN boolean | Ifx_Shell_parseAddress (pchar *argsPtr, void **address)
Parse an address. More...
IFX_EXTERN boolean | Ifx_Shell_parseSInt32 (pchar *argsPtr, sint32 *value)
Parse a signed 32-bit integer value. More...
IFX_EXTERN boolean | Ifx_Shell_parseUInt32 (pchar *argsPtr, uint32 *value, boolean hex)
Parse an unsigned 32-bit integer value. More...
IFX_EXTERN boolean | Ifx_Shell_parseSInt64 (pchar *argsPtr, sint64 *value)
Parse a signed 64-bit integer value. More...
IFX_EXTERN boolean | Ifx_Shell_parseUInt64 (pchar *argsPtr, uint64 *value, boolean hex)
Parse an unsigned 64-bit integer value. More...
IFX_EXTERN boolean | Ifx_Shell_parseFloat64 (pchar *argsPtr, float64 *value)
Parse a 64-bit (double precision) floating-point value. More...
IFX_EXTERN boolean | Ifx_Shell_parseFloat32 (pchar *argsPtr, float32 *value)
Parse a 32-bit (single precision) floating-point value. More...
Command list functions
IFX_EXTERN const Ifx_Shell_Command * | Ifx_Shell_commandFind (Ifx_Shell_CommandListConst commandList, pchar commandLine, pchar *args, uint32 *match)
Find command in command List. More...
IFX_EXTERN boolean | Ifx_Shell_showHelpSingle (Ifx_Shell_CommandListConst commandList, IfxStdIf_DPipe *io, boolean briefOnly, boolean singleCommand)
Implementation of Ifx_Shell_Call. Show the help menu from single command list. More...
IFX_EXTERN boolean | Ifx_Shell_showHelp (pchar args, void *shellPtr, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. Show the help menu and list of commands. More...
IFX_EXTERN void | Ifx_Shell_printSyntax (const Ifx_Shell_Syntax *syntaxList, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. print the syntax. More...
Sub protocol functions
IFX_EXTERN boolean | Ifx_Shell_protocolStart (pchar args, void *data, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. Start the Shell protocol. More...
IFX_EXTERN boolean | Ifx_Shell_bbProtocolStart (pchar args, void *data, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. Start the ShellBb protocol. More...

Detailed Description

Shell functions.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_Shell.h.

Data Structure Documentation

◆ Ifx_Shell_Command

struct Ifx_Shell_Command

Shell command object.

Definition at line 169 of file Ifx_Shell.h.

Data Fields
Ifx_Shell_Call | call
pchar | commandLine
void * | data
pchar | help

◆ Ifx_Shell_CmdLine

struct Ifx_Shell_CmdLine

Command line editing state.

Definition at line 178 of file Ifx_Shell.h.

Data Fields
char * | cmdStr | Pointer to current string containing command line as so far processed.
Ifx_SizeT | cursor | Pointer to variable containing position of cursor in so-far-processed command line.
boolean | historyAdd | If TRUE, when Enter is pressed, the current cmdLine should be added to the command history (in parent)
Ifx_SizeT | historyItem | Item ID in command history list, or IFX_SHELL_CMD_HISTORY_NO_ITEM if not using list (e.g. new command)
Ifx_SizeT | length | Pointer to variable containing total length of command line.

◆ Ifx_Shell_Flags

struct Ifx_Shell_Flags

Shell control flags.

Definition at line 208 of file Ifx_Shell.h.

Data Fields
uint16 | echo: 1
uint16 | echoError: 1
uint16 | enabled: 1
uint16 | sendResultCode: 1
uint16 | showPrompt: 1

◆ Ifx_Shell_Runtime

struct Ifx_Shell_Runtime

internal Shell run-time data

Definition at line 218 of file Ifx_Shell.h.

Data Fields
Ifx_Shell_CmdState | cmdState
char | cmdStr[IFX_CFG_SHELL_CMD_LINE_SIZE]
char | echo[2]
char | escBracketNum
char | inputbuffer[IFX_CFG_SHELL_CMD_LINE_SIZE+1]

◆ Ifx_Shell

struct Ifx_Shell

Shell object definition.

Definition at line 232 of file Ifx_Shell.h.

Collaboration diagram for Ifx_Shell:
[legend]
Data Fields
Ifx_Shell_CmdLine | cmd | Current status of command line editing (saves passing many parameters around)
char * | cmdHistory[IFX_CFG_SHELL_CMD_HISTORY_SIZE] | Array of pointers to the history entries.
Ifx_Shell_CommandListConst | commandList[IFX_CFG_SHELL_COMMAND_LISTS] | Array of pointers to command list. The pointed location shall be constant during Shell lifetime, e.g. stored in non-volatile memory or as global variable. The 1st item in the list is use as a group command prefix if its "call" parameter is NULL pointer, else it is use as other entries. In case "call" is NULL, the corresponding 'data' is ignored, and the 'help' is displayed.
Ifx_Shell_Flags | control | control flags
IfxStdIf_DPipe * | io | Pointer to IfxStdIf_DPipe object used by the Shell.
Ifx_Shell_Runtime | locals | Runtime data.
Ifx_Shell_Protocol | protocol | Protocol handler data.

◆ Ifx_Shell_Config

struct Ifx_Shell_Config

Shell configuration.

Definition at line 261 of file Ifx_Shell.h.

Collaboration diagram for Ifx_Shell_Config:
[legend]
Data Fields
Ifx_Shell_CommandListConst | commandList[IFX_CFG_SHELL_COMMAND_LISTS] | Specifies pointer to the command list.
boolean | echo | Specifies whether each command shall be echoed back to user.
Ifx_Shell_Protocol | protocol | Configuration for the Ifx_Shell_Protocol.
boolean | sendResultCode | Specifies whether the Ifx_Shell_ResultCode shall be sent to user.
boolean | showPrompt | Specifies whether the IFX_CFG_SHELL_PROMPT shall be displayed after each command.
IfxStdIf_DPipe * | standardIo | Pointer to a IfxStdIf_DPipe object used by the Shell.

◆ Ifx_Shell_Syntax

struct Ifx_Shell_Syntax

Shell Syntax Description.

Definition at line 274 of file Ifx_Shell.h.

Data Fields
pchar | description | description
pchar | syntax | syntax

Macro Definition Documentation

◆ IFX_CFG_SHELL_CMD_HISTORY_SIZE

#define IFX_CFG_SHELL_CMD_HISTORY_SIZE (10)

Number of commands to store in history.

Definition at line 127 of file Ifx_Shell.h.

Referenced by Ifx_Shell_cmdEscapeProcess(), Ifx_Shell_init(), and Ifx_Shell_process().

◆ IFX_CFG_SHELL_CMD_LINE_SIZE

#define IFX_CFG_SHELL_CMD_LINE_SIZE (128)

max command line IFX_CFG_SHELL_CMD_LINE_SIZE - 1

Definition at line 131 of file Ifx_Shell.h.

Referenced by Ifx_Shell_cmdEscapeProcess(), Ifx_Shell_init(), and Ifx_Shell_process().

◆ IFX_CFG_SHELL_COMMAND_LISTS

#define IFX_CFG_SHELL_COMMAND_LISTS (1)

Number of command lists.

Definition at line 135 of file Ifx_Shell.h.

Referenced by Ifx_Shell_commandListFind(), Ifx_Shell_init(), Ifx_Shell_initConfig(), and Ifx_Shell_showHelp().

◆ IFX_CFG_SHELL_PROMPT

#define IFX_CFG_SHELL_PROMPT "Shell>"

Shell prompt.

Definition at line 139 of file Ifx_Shell.h.

Referenced by Ifx_Shell_init(), and Ifx_Shell_process().

◆ IFX_SHELL_CMD_HISTORY_NO_ITEM

#define IFX_SHELL_CMD_HISTORY_NO_ITEM (-1)

Signifies no item in use in command history list.

Definition at line 154 of file Ifx_Shell.h.

Referenced by Ifx_Shell_cmdEscapeProcess(), Ifx_Shell_init(), and Ifx_Shell_process().

◆ IFX_SHELL_COMMAND_LIST_END

#define IFX_SHELL_COMMAND_LIST_END {0, 0, 0, 0}

Marker for end of command list, the end of list is detected by commandLine=NULL.

Definition at line 148 of file Ifx_Shell.h.

◆ IFX_SHELL_NULL_CHAR

#define IFX_SHELL_NULL_CHAR '\0'

Definition at line 124 of file Ifx_Shell.h.

Referenced by Ifx_Shell_cmdEscapeProcess(), Ifx_Shell_init(), Ifx_Shell_isEndOfLine(), Ifx_Shell_parseAddress(), Ifx_Shell_parseFloat32(), Ifx_Shell_parseFloat64(), Ifx_Shell_parseSInt64(), Ifx_Shell_parseToken(), Ifx_Shell_parseUInt64(), Ifx_Shell_process(), Ifx_Shell_showHelp(), Ifx_Shell_showHelpSingle(), and Ifx_Shell_skipWhitespace().

◆ IFX_SHELL_SYNTAX_LIST_END

#define IFX_SHELL_SYNTAX_LIST_END {0, 0}

Marker for end of syntax list.

Definition at line 151 of file Ifx_Shell.h.

◆ SHELL_HELP_DESCRIPTION_TEXT

#define SHELL_HELP_DESCRIPTION_TEXT
Value:
" : Display command list, and command help." ENDL \
"/s help: show all commands" ENDL \
"/s help <command>: show the command details"
ENDL
#define ENDL
Definition: IfxStdIf_DPipe.h:64

Definition at line 142 of file Ifx_Shell.h.

Typedef Documentation

◆ Ifx_Shell_Call

typedef boolean(* Ifx_Shell_Call) (pchar args, void *data, IfxStdIf_DPipe *io)

Definition of a callback function which handles a Shell command.

Definition at line 166 of file Ifx_Shell.h.

◆ Ifx_Shell_CommandList

typedef Ifx_Shell_Command* Ifx_Shell_CommandList

Definition at line 227 of file Ifx_Shell.h.

◆ Ifx_Shell_CommandListConst

typedef const Ifx_Shell_Command* Ifx_Shell_CommandListConst

Definition at line 228 of file Ifx_Shell.h.

Enumeration Type Documentation

◆ Ifx_Shell_CmdState

enum Ifx_Shell_CmdState

Shell command processing state.

Enumerator
IFX_SHELL_CMD_STATE_NORMAL | Normal - no special sequences being processed.
IFX_SHELL_CMD_STATE_ESCAPE | Escape character has been pressed.
IFX_SHELL_CMD_STATE_ESCAPE_BRACKET | ESC [ pressed.
IFX_SHELL_CMD_STATE_ESCAPE_BRACKET_NUMBER | ESC [ (number) pressed.

Definition at line 188 of file Ifx_Shell.h.

◆ Ifx_Shell_ResultCode

enum Ifx_Shell_ResultCode

Result code definition used after each executed Shell command.

Enumerator
Ifx_Shell_ResultCode_unknown
Ifx_Shell_ResultCode_nok
Ifx_Shell_ResultCode_undefined
Ifx_Shell_ResultCode_ok

Definition at line 157 of file Ifx_Shell.h.


iLLD_TC38A: General

Modules
General
Service software » System Engineering
Collaboration diagram for General:

Modules

Global resources

Detailed Description


iLLD_TC38A: Global resources

Functions
Global resources
Service software » System Engineering » General
Collaboration diagram for Global resources:

Functions

IFX_EXTERN void * | Ifx_GlobalResources_get (sint32 id)
IFX_EXTERN sint32 | Ifx_GlobalResources_getIndex (void *resource)
Returns the global resource index. More...
IFX_EXTERN const Ifx_GlobalResources_Item * | Ifx_GlobalResources_getItem (sint32 id)
IFX_EXTERN pchar | Ifx_GlobalResources_getName (sint32 id)
IFX_EXTERN boolean | Ifx_GlobalResources_init (const Ifx_GlobalResources_Item *table, uint32 size)

Detailed Description

This module implements the global resources handling

Function Documentation

◆ Ifx_GlobalResources_get()

IFX_EXTERN void* Ifx_GlobalResources_get ( sint32 id )

Return a pointer to the global resource

Parameters
id index of the Ifx_GlobalResources_Item in the table, the index starts with 0
Returns
return Ifx_GlobalResources_Item.resource

Definition at line 55 of file Ifx_GlobalResources.c.

◆ Ifx_GlobalResources_getIndex()

IFX_EXTERN sint32 Ifx_GlobalResources_getIndex ( void * resource )

Returns the global resource index.

Returns
Returns the global resource index, -1 if not found

Definition at line 79 of file Ifx_GlobalResources.c.

◆ Ifx_GlobalResources_getItem()

IFX_EXTERN const Ifx_GlobalResources_Item* Ifx_GlobalResources_getItem ( sint32 id )

Return a pointer to the global resource item

Parameters
id index of the Ifx_GlobalResources_Item in the table, the index starts with 0
Returns
return the Ifx_GlobalResources_Item

Definition at line 103 of file Ifx_GlobalResources.c.

◆ Ifx_GlobalResources_getName()

IFX_EXTERN pchar Ifx_GlobalResources_getName ( sint32 id )

Return a the resource name as an NULL terminated string

Parameters
id index of the Ifx_GlobalResources_Item in the table, the index starts with 0
Returns
return Ifx_GlobalResources_Item.name

Definition at line 127 of file Ifx_GlobalResources.c.

◆ Ifx_GlobalResources_init()

IFX_EXTERN boolean Ifx_GlobalResources_init | ( | const Ifx_GlobalResources_Item * | table,
 |  | uint32 | size
 | ) |  |

Initialize the global resource handler

Parameters
table | pointer to an array of Ifx_GlobalResources_Item
size | number of item in the table corresponds to sizeof(table)

return returns TRUE in case of success else FALSE

Definition at line 151 of file Ifx_GlobalResources.c.


iLLD_TC38A: Math

Modules
Math
Service software » System Engineering
Collaboration diagram for Math:

Modules

CRC
Look-ups
Math 32bit floating point

Detailed Description


iLLD_TC38A: CRC

Functions
CRC
Service software » System Engineering » Math
Collaboration diagram for CRC:

Functions

boolean | Ifx_Crc_init (Ifc_Crc *driver, const Ifc_Crc_Table *table, sint32 direct, sint32 refout, uint32 crcinit, uint32 crcxor)
boolean | Ifx_Crc_createTable (Ifc_Crc_Table *table, sint32 order, uint32 polynom, sint32 refin)
uint32 | Ifx_Crc_tableFast (Ifc_Crc *driver, uint8 *p, uint32 len)
uint32 | Ifx_Crc_table (Ifc_Crc *driver, uint8 *p, uint32 len)
uint32 | Ifx_Crc_bitByBit (Ifc_Crc *driver, uint8 *p, uint32 len)
uint32 | Ifx_Crc_bitByBitFast (Ifc_Crc *driver, uint8 *p, uint32 len)

Detailed Description

This module implements CRC algorithm

Function Documentation

◆ Ifx_Crc_bitByBit()

uint32 Ifx_Crc_bitByBit | ( | Ifc_Crc * | driver,
 |  | uint8 * | p,
 |  | uint32 | len
 | ) |  |

Definition at line 432 of file Ifx_Crc.c.

◆ Ifx_Crc_bitByBitFast()

uint32 Ifx_Crc_bitByBitFast | ( | Ifc_Crc * | driver,
 |  | uint8 * | p,
 |  | uint32 | len
 | ) |  |

Definition at line 489 of file Ifx_Crc.c.

◆ Ifx_Crc_createTable()

boolean Ifx_Crc_createTable | ( | Ifc_Crc_Table * | table,
 |  | sint32 | order,
 |  | uint32 | polynom,
 |  | sint32 | refin
 | ) |  |
Parameters
table | pointer to the crc table
order | [1..32] is the CRC polynom order, counted without the leading '1' bit
polynom | is the CRC polynom without leading '1' bit
refin | [0,1] specifies if a data byte is reflected before processing (UART) or not

Definition at line 117 of file Ifx_Crc.c.

◆ Ifx_Crc_init()

boolean Ifx_Crc_init | ( | Ifc_Crc * | driver,
 |  | const Ifc_Crc_Table * | table,
 |  | sint32 | direct,
 |  | sint32 | refout,
 |  | uint32 | crcinit,
 |  | uint32 | crcxor
 | ) |  |
Parameters
direct | [0,1] specifies the kind of algorithm: 1=direct, no augmented zero bits
driver | pointer to the crc driver
table | pointer to crc table
direct | direct
crcinit | is the initial CRC value belonging to that algorithm
crcxor | is the final XOR value
refout | [0,1] specifies if the CRC will be reflected before XOR
table | pointer to the table: Ifc_Crc_Table8, Ifc_Crc_Table16, Ifc_Crc_Table32

Definition at line 45 of file Ifx_Crc.c.

◆ Ifx_Crc_table()

uint32 Ifx_Crc_table | ( | Ifc_Crc * | driver,
 |  | uint8 * | p,
 |  | uint32 | len
 | ) |  |

Definition at line 304 of file Ifx_Crc.c.

◆ Ifx_Crc_tableFast()

uint32 Ifx_Crc_tableFast | ( | Ifc_Crc * | driver,
 |  | uint8 * | p,
 |  | uint32 | len
 | ) |  |

Definition at line 221 of file Ifx_Crc.c.


iLLD_TC38A: Look-ups

Modules | Macros
Look-ups
Service software » System Engineering » Math
Collaboration diagram for Look-ups:

Modules

Look-ups float32

Macros

#define | IFX_LUT_ANGLE_BITS (12)
Define the resolution (in bits) of cosinus and sinus table. More...
#define | IFX_LUT_ANGLE_RESOLUTION (1 << IFX_LUT_ANGLE_BITS)
Define the cosinus and sinus table size. More...

Detailed Description

Macro Definition Documentation

◆ IFX_LUT_ANGLE_BITS

#define IFX_LUT_ANGLE_BITS (12)

Define the resolution (in bits) of cosinus and sinus table.

Definition at line 69 of file Ifx_Lut.h.

◆ IFX_LUT_ANGLE_RESOLUTION

#define IFX_LUT_ANGLE_RESOLUTION (1 << IFX_LUT_ANGLE_BITS)

Define the cosinus and sinus table size.

Definition at line 72 of file Ifx_Lut.h.

Referenced by Ifx_LutAtan2F32_fxpAngle(), Ifx_LutLSincosF32_sin(), Ifx_LutSincosF32_init(), and Ifx_LutSincosF32_sin().


iLLD_TC38A: Look-ups float32

Modules
Look-ups float32
Service software » System Engineering » Math » Look-ups
Collaboration diagram for Look-ups float32:

Modules

ATAN lookup table
Indexes look-up table (with linear interpolation)
Look-up table (with linear interpolation)
Linear trigonometric Look-ups
Sinus and cosinus Look-ups

Detailed Description


iLLD_TC38A: ATAN lookup table

Functions
ATAN lookup table
Service software » System Engineering » Math » Look-ups » Look-ups float32
Collaboration diagram for ATAN lookup table:

Functions

IFX_EXTERN void | Ifx_LutAtan2F32_init (void)
Initialise the lookup tables. More...
IFX_EXTERN Ifx_Lut_FxpAngle | Ifx_LutAtan2F32_fxpAngle (float32 x, float32 y)
Look-up arcus tangent value of y/x. More...

Detailed Description

Function Documentation

◆ Ifx_LutAtan2F32_fxpAngle()

IFX_EXTERN Ifx_Lut_FxpAngle Ifx_LutAtan2F32_fxpAngle | ( | float32 | x,
 |  | float32 | y
 | ) |  |

Look-up arcus tangent value of y/x.

Returns
fxpAngle 0 .. (IFX_LUT_ANGLE_RESOLUTION - 1), which represents 0 .. 2*IFX_PI

Definition at line 84 of file Ifx_LutAtan2F32.c.

◆ Ifx_LutAtan2F32_init()

IFX_EXTERN void Ifx_LutAtan2F32_init ( void )

Initialise the lookup tables.

Definition at line 46 of file Ifx_LutAtan2F32.c.


iLLD_TC38A: Indexes look-up table (with linear interpolation)

Functions
Indexes look-up table (with linear interpolation)
Service software » System Engineering » Math » Look-ups » Look-ups float32
Collaboration diagram for Indexes look-up table (with linear interpolation):

Functions

IFX_INLINE float32 Ifx_LutIndexedLinearF32_search (const Ifx_LutIndexedLinearF32 *ml, uint32 index)
Look-up table search. More...

Detailed Description

Function Documentation

◆ Ifx_LutIndexedLinearF32_search()

IFX_INLINE float32 Ifx_LutIndexedLinearF32_search | ( | const Ifx_LutIndexedLinearF32 * | ml,
 |  | uint32 | index
 | ) |  |

Look-up table search.

Parameters
ml pointer to the multi-segment object
index
Returns
interpolated value

Definition at line 84 of file Ifx_LutIndexedLinearF32.h.

Referenced by Ifx_LutLSincosF32_sin().


iLLD_TC38A: Look-up table (with linear interpolation)

Functions
Look-up table (with linear interpolation)
Service software » System Engineering » Math » Look-ups » Look-ups float32
Collaboration diagram for Look-up table (with linear interpolation):

Functions

IFX_EXTERN float32 | Ifx_LutLinearF32_searchBin (const Ifx_LutLinearF32 *ml, float32 index)
Look-up table with binary search implementation. More...
IFX_INLINE float32 | Ifx_LutLinearF32_searchNegSeq (const Ifx_LutLinearF32 *ml, float32 index)
Look-up table with negative sequential search implementation. More...
IFX_INLINE float32 | Ifx_LutLinearF32_searchPosSeq (const Ifx_LutLinearF32 *ml, float32 index)
Look-up table with positive sequential search implementation. More...

Detailed Description

Function Documentation

◆ Ifx_LutLinearF32_searchBin()

IFX_EXTERN float32 Ifx_LutLinearF32_searchBin | ( | const Ifx_LutLinearF32 * | ml,
 |  | float32 | index
 | ) |  |

Look-up table with binary search implementation.

Value inside table will be linearly interpolated. Value outside table will be linearly extrapolated.

Parameters
ml pointer to the multi-segment object
index
Returns
linear interpolated value

Definition at line 53 of file Ifx_LutLinearF32.c.

◆ Ifx_LutLinearF32_searchNegSeq()

IFX_INLINE float32 Ifx_LutLinearF32_searchNegSeq | ( | const Ifx_LutLinearF32 * | ml,
 |  | float32 | index
 | ) |  |

Look-up table with negative sequential search implementation.

Value inside table will be linearly interpolated Value outside table will be linearly extrapolated

Parameters
ml pointer to the multi-segment object
index
Returns
interpolated value

Definition at line 109 of file Ifx_LutLinearF32.h.

◆ Ifx_LutLinearF32_searchPosSeq()

IFX_INLINE float32 Ifx_LutLinearF32_searchPosSeq | ( | const Ifx_LutLinearF32 * | ml,
 |  | float32 | index
 | ) |  |

Look-up table with positive sequential search implementation.

Value inside table will be linearly interpolated Value outside table will be linearly extrapolated

Parameters
ml pointer to the multi-segment object
index
Returns
interpolated value

Definition at line 88 of file Ifx_LutLinearF32.h.


iLLD_TC38A: Linear trigonometric Look-ups

Files | Functions
Linear trigonometric Look-ups
Service software » System Engineering » Math » Look-ups » Look-ups float32
Collaboration diagram for Linear trigonometric Look-ups:

Files

file Ifx_LutLSincosF32.h
Sin/Cos linear approximated lookup functions with fixed-point angle data type.

Functions

IFX_INLINE float32 | Ifx_LutLSincosF32_sin (Ifx_Lut_FxpAngle fxpAngle)
Sine lookup function. More...
IFX_INLINE float32 | Ifx_LutLSincosF32_cos (Ifx_Lut_FxpAngle fxpAngle)
Cosine lookup function. More...
IFX_INLINE cfloat32 | Ifx_LutLSincosF32_cossin (Ifx_Lut_FxpAngle fxpAngle)
Sine and Cosine lookup function. More...

Detailed Description

Function Documentation

◆ Ifx_LutLSincosF32_cos()

IFX_INLINE float32 Ifx_LutLSincosF32_cos ( Ifx_Lut_FxpAngle fxpAngle )

Cosine lookup function.

Parameters
fxpAngle 0 .. (IFX_LUT_ANGLE_RESOLUTION - 1), which represents 0 .. 2*IFX_PI
Returns
cos(2*IFX_PI*fxpAngle/IFX_LUT_ANGLE_RESOLUTION)

Definition at line 81 of file Ifx_LutLSincosF32.h.

◆ Ifx_LutLSincosF32_cossin()

IFX_INLINE cfloat32 Ifx_LutLSincosF32_cossin ( Ifx_Lut_FxpAngle fxpAngle )

Sine and Cosine lookup function.

Parameters
fxpAngle 0 .. (IFX_LUT_ANGLE_RESOLUTION - 1), which represents 0 .. 2*IFX_PI
Return values
real | = cos(2*IFX_PI*fxpAngle/IFX_LUT_ANGLE_RESOLUTION)
imag | = sin(2*IFX_PI*fxpAngle/IFX_LUT_ANGLE_RESOLUTION)

Definition at line 94 of file Ifx_LutLSincosF32.h.

◆ Ifx_LutLSincosF32_sin()

IFX_INLINE float32 Ifx_LutLSincosF32_sin ( Ifx_Lut_FxpAngle fxpAngle )

Sine lookup function.

Parameters
fxpAngle 0 .. (IFX_LUT_ANGLE_RESOLUTION - 1)
Returns
sin(2*IFX_PI*fxpAngle/IFX_LUT_ANGLE_RESOLUTION)

Definition at line 67 of file Ifx_LutLSincosF32.h.

Referenced by Ifx_LutLSincosF32_cos(), and Ifx_LutLSincosF32_cossin().


iLLD_TC38A: Ifx_LutLSincosF32.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Functions | Variables
Ifx_LutLSincosF32.h File Reference
Service software » System Engineering » Math » Look-ups » Look-ups float32 » Linear trigonometric Look-ups

Sin/Cos linear approximated lookup functions with fixed-point angle data type. More...

#include "SysSe/Math/IFX_Cf32.h"
#include "Ifx_Lut.h"
#include "Ifx_LutIndexedLinearF32.h"
Include dependency graph for Ifx_LutLSincosF32.h:

Go to the source code of this file.

Functions

IFX_INLINE float32 | Ifx_LutLSincosF32_sin (Ifx_Lut_FxpAngle fxpAngle)
Sine lookup function. More...
IFX_INLINE float32 | Ifx_LutLSincosF32_cos (Ifx_Lut_FxpAngle fxpAngle)
Cosine lookup function. More...
IFX_INLINE cfloat32 | Ifx_LutLSincosF32_cossin (Ifx_Lut_FxpAngle fxpAngle)
Sine and Cosine lookup function. More...

Variables

IFX_EXTERN const Ifx_LutIndexedLinearF32 Ifx_g_LutLSincosF32
Look-up table for sin. More...

Detailed Description

Sin/Cos linear approximated lookup functions with fixed-point angle data type.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_LutLSincosF32.h.

Variable Documentation

◆ Ifx_g_LutLSincosF32

IFX_EXTERN const Ifx_LutIndexedLinearF32 Ifx_g_LutLSincosF32

Look-up table for sin.

Definition at line 59 of file Ifx_LutLSincosF32.h.

Referenced by Ifx_LutLSincosF32_sin().


iLLD_TC38A: Sinus and cosinus Look-ups

Files | Functions
Sinus and cosinus Look-ups
Service software » System Engineering » Math » Look-ups » Look-ups float32
Collaboration diagram for Sinus and cosinus Look-ups:

Files

file Ifx_LutSincosF32.h
Sin/Cos lookup functions with fixed-point angle data type.

Functions

IFX_EXTERN void | Ifx_LutSincosF32_init (void)
Initialise the lookup tables. More...
IFX_EXTERN float32 | Ifx_LutSincosF32_sin (Ifx_Lut_FxpAngle fxpAngle)
Sine lookup function. More...
IFX_INLINE float32 | Ifx_LutSincosF32_cos (Ifx_Lut_FxpAngle fxpAngle)
Cosine lookup function. More...
IFX_INLINE cfloat32 | Ifx_LutSincosF32_cossin (Ifx_Lut_FxpAngle fxpAngle)
Sine and Cosine lookup function. More...

Detailed Description

Function Documentation

◆ Ifx_LutSincosF32_cos()

IFX_INLINE float32 Ifx_LutSincosF32_cos ( Ifx_Lut_FxpAngle fxpAngle )

Cosine lookup function.

Parameters
fxpAngle 0 .. (IFX_LUT_ANGLE_RESOLUTION - 1), which represents 0 .. 2*IFX_PI
Returns
cos(2*IFX_PI*fxpAngle/IFX_LUT_ANGLE_RESOLUTION)

Definition at line 81 of file Ifx_LutSincosF32.h.

◆ Ifx_LutSincosF32_cossin()

IFX_INLINE cfloat32 Ifx_LutSincosF32_cossin ( Ifx_Lut_FxpAngle fxpAngle )

Sine and Cosine lookup function.

Parameters
fxpAngle 0 .. (IFX_LUT_ANGLE_RESOLUTION - 1), which represents 0 .. 2*IFX_PI
Return values
real | = cos(2*IFX_PI*fxpAngle/IFX_LUT_ANGLE_RESOLUTION)
imag | = sin(2*IFX_PI*fxpAngle/IFX_LUT_ANGLE_RESOLUTION)

Definition at line 94 of file Ifx_LutSincosF32.h.

◆ Ifx_LutSincosF32_init()

IFX_EXTERN void Ifx_LutSincosF32_init ( void )

Initialise the lookup tables.

Note
This is not required if (IFX_LUT_TABLE_CONST == 1)

Definition at line 46 of file Ifx_LutSincosF32.c.

◆ Ifx_LutSincosF32_sin()

IFX_EXTERN float32 Ifx_LutSincosF32_sin ( Ifx_Lut_FxpAngle fxpAngle )

Sine lookup function.

Parameters
fxpAngle 0 .. (IFX_LUT_ANGLE_RESOLUTION - 1)
Returns
sin(2*IFX_PI*fxpAngle/IFX_LUT_ANGLE_RESOLUTION)

Definition at line 61 of file Ifx_LutSincosF32.c.

Referenced by Ifx_LutSincosF32_cos(), and Ifx_LutSincosF32_cossin().


iLLD_TC38A: Ifx_LutSincosF32.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Functions | Variables
Ifx_LutSincosF32.h File Reference
Service software » System Engineering » Math » Look-ups » Look-ups float32 » Sinus and cosinus Look-ups

Sin/Cos lookup functions with fixed-point angle data type. More...

#include "SysSe/Math/Ifx_Cf32.h"
#include "Ifx_Lut.h"
Include dependency graph for Ifx_LutSincosF32.h:

Go to the source code of this file.

Functions

IFX_EXTERN void | Ifx_LutSincosF32_init (void)
Initialise the lookup tables. More...
IFX_EXTERN float32 | Ifx_LutSincosF32_sin (Ifx_Lut_FxpAngle fxpAngle)
Sine lookup function. More...
IFX_INLINE float32 | Ifx_LutSincosF32_cos (Ifx_Lut_FxpAngle fxpAngle)
Cosine lookup function. More...
IFX_INLINE cfloat32 | Ifx_LutSincosF32_cossin (Ifx_Lut_FxpAngle fxpAngle)
Sine and Cosine lookup function. More...

Variables

IFX_EXTERN IFX_LUT_TABLE float32 Ifx_g_LutSincosF32_table [(IFX_LUT_ANGLE_PI/2)+1]
Look-up table for sin(IFX_PI*2*k/IFX_LUT_ANGLE_RESOLUTION), where k = 0..IFX_LUT_ANGLE_RESOLUTION. More...

Detailed Description

Sin/Cos lookup functions with fixed-point angle data type.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_LutSincosF32.h.

Variable Documentation

◆ Ifx_g_LutSincosF32_table

IFX_EXTERN IFX_LUT_TABLE float32 Ifx_g_LutSincosF32_table[(IFX_LUT_ANGLE_PI/2)+1]

Look-up table for sin(IFX_PI*2*k/IFX_LUT_ANGLE_RESOLUTION), where k = 0..IFX_LUT_ANGLE_RESOLUTION.

Definition at line 59 of file Ifx_LutSincosF32.h.

Referenced by Ifx_LutSincosF32_init(), and Ifx_LutSincosF32_sin().


iLLD_TC38A: Math 32bit floating point

Modules
Math 32bit floating point
Service software » System Engineering » Math
Collaboration diagram for Math 32bit floating point:

Modules

Angle-Tracking Observer
Floating point signal, vector, and matrix library
Floating-point FFT
Discrete Integral Approximation
Low-pass Filter: Type PT1
Ramp
Window functions

Detailed Description


iLLD_TC38A: Angle-Tracking Observer

Functions
Angle-Tracking Observer
Service software » System Engineering » Math » Math 32bit floating point
Collaboration diagram for Angle-Tracking Observer:

Functions

IFX_EXTERN float32 | Ifx_AngleTrkF32_getAbsolutePosition (Ifx_AngleTrkF32 *driver)
IFX_EXTERN IfxStdIf_Pos_Dir | Ifx_AngleTrkF32_getDirection (Ifx_AngleTrkF32 *driver)
IFX_EXTERN IfxStdIf_Pos_Status | Ifx_AngleTrkF32_getFault (Ifx_AngleTrkF32 *driver)
IFX_EXTERN sint32 | Ifx_AngleTrkF32_getOffset (Ifx_AngleTrkF32 *driver)
IFX_EXTERN uint16 | Ifx_AngleTrkF32_getPeriodPerRotation (Ifx_AngleTrkF32 *driver)
IFX_EXTERN float32 | Ifx_AngleTrkF32_getPosition (Ifx_AngleTrkF32 *driver)
IFX_EXTERN IfxStdIf_Pos_RawAngle | Ifx_AngleTrkF32_getRawPosition (Ifx_AngleTrkF32 *aObsv)
Returns the actual position. More...
IFX_EXTERN float32 | Ifx_AngleTrkF32_getRefreshPeriod (Ifx_AngleTrkF32 *driver)
IFX_EXTERN sint32 | Ifx_AngleTrkF32_getResolution (Ifx_AngleTrkF32 *driver)
IFX_EXTERN sint32 | Ifx_AngleTrkF32_getTurn (Ifx_AngleTrkF32 *driver)
IFX_EXTERN IfxStdIf_Pos_SensorType | Ifx_AngleTrkF32_getSensorType (Ifx_AngleTrkF32 *driver)
IFX_EXTERN float32 | Ifx_AngleTrkF32_getSpeed (Ifx_AngleTrkF32 *aObsv)
Returns the Speed. More...
IFX_EXTERN void | Ifx_AngleTrkF32_reset (Ifx_AngleTrkF32 *driver)
IFX_EXTERN void | Ifx_AngleTrkF32_resetFaults (Ifx_AngleTrkF32 *driver)
IFX_EXTERN void | Ifx_AngleTrkF32_setOffset (Ifx_AngleTrkF32 *aObsv, IfxStdIf_Pos_RawAngle offset)
Set the position offset (in ticks) More...
IFX_EXTERN void | Ifx_AngleTrkF32_setRefreshPeriod (Ifx_AngleTrkF32 *driver, float32 updatePeriod)
IFX_EXTERN void | Ifx_AngleTrkF32_update (Ifx_AngleTrkF32 *aObsv)
Update the object directly from its analog input. More...

Initialisation functions

Example use:

extern sint16 g_SinInput, g_CosInput;
Ifx_AngleTrkF32_Config driverConfig;
Ifx_AngleTrkF32 driverData;
Ifx_AngleTrkF32_initConfig(&driverConfig, &g_SinInput, g_CosInput);
driverConfig.errorThreshold = 5.0 / 180 * IFX_PI; // 5 degree error
driverConfig.sqrAmplMax = 1.01 * 1.01;
driverConfig.sqrAmplMin = 0.99 * 0.99;
driverConfig.speedLpfFc = 100;
driverConfig.periodPerRotation = 1;
driverConfig.reversed = FALSE;
driverConfig.offset = 0;
Ifx_AngleTrkF32_init(&driverData, &driverConfig);

Prototypes:

IFX_EXTERN void | Ifx_AngleTrkF32_init (Ifx_AngleTrkF32 *aObsv, const Ifx_AngleTrkF32_Config *config, float32 Ts)
Initialize the Angle Tracking object. More...
IFX_EXTERN void | Ifx_AngleTrkF32_initConfig (Ifx_AngleTrkF32_Config *config, sint16 *sinIn, sint16 *cosIn)
Fill config with default values. More...

Protected functions

These functions are not for end-user but may be used by another driver which extends the functionality of library_srvsw_sysse_math_f32_angletrk

IFX_EXTERN float32 | Ifx_AngleTrkF32_step (Ifx_AngleTrkF32 *aObsv, sint16 sinIn, sint16 cosIn, float32 phase)
Step function of Ifx_AngleTrkF32 should be called at every sampling period provided during initialisation (call to Ifx_AngleTrkF32_init()). More...
IFX_EXTERN void | Ifx_AngleTrkF32_updateStatus (Ifx_AngleTrkF32 *aObsv, sint16 sinIn, sint16 cosIn)
Update the status flags. More...
IFX_INLINE float32 | Ifx_AngleTrkF32_getLoopSpeed (Ifx_AngleTrkF32 *aObsv)
get the speed. More...

Detailed Description

This driver implements Standard interface: Position interface using 3rd order Angle-Tracking Observer algorithm.

Function Documentation

◆ Ifx_AngleTrkF32_getAbsolutePosition()

IFX_EXTERN float32 Ifx_AngleTrkF32_getAbsolutePosition ( Ifx_AngleTrkF32 * driver )
See also
IfxStdIf_Pos_GetAbsolutePosition
Parameters
driver driver handle
Returns
absolute position

Definition at line 335 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_stdIfPosInit().

◆ Ifx_AngleTrkF32_getDirection()

IFX_EXTERN IfxStdIf_Pos_Dir Ifx_AngleTrkF32_getDirection ( Ifx_AngleTrkF32 * driver )
See also
IfxStdIf_Pos_GetDirection
Parameters
driver driver handle
Returns
direction

Definition at line 341 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_stdIfPosInit().

◆ Ifx_AngleTrkF32_getFault()

IFX_EXTERN IfxStdIf_Pos_Status Ifx_AngleTrkF32_getFault ( Ifx_AngleTrkF32 * driver )
See also
IfxStdIf_Pos_GetFault
Parameters
driver driver handle
Returns
Fault

Definition at line 347 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_stdIfPosInit().

◆ Ifx_AngleTrkF32_getLoopSpeed()

IFX_INLINE float32 Ifx_AngleTrkF32_getLoopSpeed ( Ifx_AngleTrkF32 * aObsv )

get the speed.

Parameters
aObsv Pointer to the Ifx_AngleTrkF32 object

Definition at line 175 of file Ifx_AngleTrkF32.h.

◆ Ifx_AngleTrkF32_getOffset()

IFX_EXTERN sint32 Ifx_AngleTrkF32_getOffset ( Ifx_AngleTrkF32 * driver )
See also
IfxStdIf_Pos_GetOffset
Parameters
driver driver handle
Returns
offset address

Definition at line 353 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_stdIfPosInit().

◆ Ifx_AngleTrkF32_getPeriodPerRotation()

IFX_EXTERN uint16 Ifx_AngleTrkF32_getPeriodPerRotation ( Ifx_AngleTrkF32 * driver )
See also
IfxStdIf_Pos_GetPeriodPerRotation
Parameters
driver driver handle
Returns
Period per rotation

Definition at line 359 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_stdIfPosInit().

◆ Ifx_AngleTrkF32_getPosition()

IFX_EXTERN float32 Ifx_AngleTrkF32_getPosition ( Ifx_AngleTrkF32 * driver )
See also
IfxStdIf_Pos_GetPosition
Parameters
driver driver handle
Returns
position

Definition at line 365 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_stdIfPosInit().

◆ Ifx_AngleTrkF32_getRawPosition()

IFX_EXTERN IfxStdIf_Pos_RawAngle Ifx_AngleTrkF32_getRawPosition ( Ifx_AngleTrkF32 * aObsv )

Returns the actual position.

See also
IfxStdIf_Pos_GetRawPosition
Parameters
aObsv Pointer to the Ifx_AngleTrkF32 object
Returns
position in ticks
Parameters
aObsv Pointer to the Ifx_AngleTrkF32 object
Note
This function returns the angular position in ticks 0 .. Ifx_AngleTrkF32.base.resolution-1

Definition at line 314 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_stdIfPosInit().

◆ Ifx_AngleTrkF32_getRefreshPeriod()

IFX_EXTERN float32 Ifx_AngleTrkF32_getRefreshPeriod ( Ifx_AngleTrkF32 * driver )
See also
IfxStdIf_Pos_GetRefreshPeriod
Parameters
driver driver handle
Returns
update period

Definition at line 371 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_stdIfPosInit().

◆ Ifx_AngleTrkF32_getResolution()

IFX_EXTERN sint32 Ifx_AngleTrkF32_getResolution ( Ifx_AngleTrkF32 * driver )
See also
IfxStdIf_Pos_GetResolution
Parameters
driver driver handle
Returns
resolution

Definition at line 377 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_stdIfPosInit().

◆ Ifx_AngleTrkF32_getSensorType()

IFX_EXTERN IfxStdIf_Pos_SensorType Ifx_AngleTrkF32_getSensorType ( Ifx_AngleTrkF32 * driver )
See also
IfxStdIf_Pos_GetSensorType
Parameters
driver driver handle
Returns
sensor type

Definition at line 383 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_stdIfPosInit().

◆ Ifx_AngleTrkF32_getSpeed()

IFX_EXTERN float32 Ifx_AngleTrkF32_getSpeed ( Ifx_AngleTrkF32 * aObsv )

Returns the Speed.

See also
IfxStdIf_Pos_GetSpeed
Parameters
aObsv Pointer to the Ifx_AngleTrkF32 object
Returns
speed
Parameters
aObsv Pointer to the Ifx_AngleTrkF32 object

Definition at line 324 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_stdIfPosInit().

◆ Ifx_AngleTrkF32_getTurn()

IFX_EXTERN sint32 Ifx_AngleTrkF32_getTurn ( Ifx_AngleTrkF32 * driver )
See also
IfxStdIf_Pos_GetTurn
Parameters
driver driver handle
Returns
Returns the number of turns

Definition at line 390 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_stdIfPosInit().

◆ Ifx_AngleTrkF32_init()

IFX_EXTERN void Ifx_AngleTrkF32_init | ( | Ifx_AngleTrkF32 * | aObsv,
 |  | const Ifx_AngleTrkF32_Config * | config,
 |  | float32 | Ts
 | ) |  |

Initialize the Angle Tracking object.

Parameters
aObsv | Pointer to the Ifx_AngleTrkF32 object
config | Pointer to the configuration data
Ts | sampling period in seconds

Definition at line 162 of file Ifx_AngleTrkF32.c.

◆ Ifx_AngleTrkF32_initConfig()

IFX_EXTERN void Ifx_AngleTrkF32_initConfig | ( | Ifx_AngleTrkF32_Config * | config,
 |  | sint16 * | sinIn,
 |  | sint16 * | cosIn
 | ) |  |

Fill config with default values.

12-bit default resolution

Definition at line 130 of file Ifx_AngleTrkF32.c.

◆ Ifx_AngleTrkF32_reset()

IFX_EXTERN void Ifx_AngleTrkF32_reset ( Ifx_AngleTrkF32 * driver )
See also
IfxStdIf_Pos_Reset
Parameters
driver driver handle
Returns
None

Definition at line 408 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_stdIfPosInit().

◆ Ifx_AngleTrkF32_resetFaults()

IFX_EXTERN void Ifx_AngleTrkF32_resetFaults ( Ifx_AngleTrkF32 * driver )
See also
IfxStdIf_Pos_ResetFaults
Parameters
driver driver handle
Returns
None

Definition at line 396 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_stdIfPosInit().

◆ Ifx_AngleTrkF32_setOffset()

IFX_EXTERN void Ifx_AngleTrkF32_setOffset | ( | Ifx_AngleTrkF32 * | aObsv,
 |  | IfxStdIf_Pos_RawAngle | offset
 | ) |  |

Set the position offset (in ticks)

See also
IfxStdIf_Pos_SetOffset
Parameters
aObsv | driver handle
offset | offset
Returns
None
Parameters
aObsv | Pointer to the Ifx_AngleTrkF32 object
offset | Position offset in ticks

Definition at line 271 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_stdIfPosInit().

◆ Ifx_AngleTrkF32_setRefreshPeriod()

IFX_EXTERN void Ifx_AngleTrkF32_setRefreshPeriod | ( | Ifx_AngleTrkF32 * | driver,
 |  | float32 | updatePeriod
 | ) |  |
See also
IfxStdIf_Pos_SetRefreshPeriod
Parameters
driver | driver handle
updatePeriod | update period
Returns
None

Definition at line 402 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_stdIfPosInit().

◆ Ifx_AngleTrkF32_step()

IFX_EXTERN float32 Ifx_AngleTrkF32_step | ( | Ifx_AngleTrkF32 * | aObsv,
 |  | sint16 | sinIn,
 |  | sint16 | cosIn,
 |  | float32 | phase
 | ) |  |

Step function of Ifx_AngleTrkF32 should be called at every sampling period provided during initialisation (call to Ifx_AngleTrkF32_init()).

Note
This function is automatically called by Ifx_AngleTrkF32_update()
Parameters
aObsv | Pointer to the Ifx_AngleTrkF32 object
sinIn | sine input signal. The offset shall be zero.
cosIn | cosine input signal. The offset shall be zero.
phase | phase of input signal.
Note
This function returns the angular position in radians
The amplitude of both sinIn and cosIn signal shall be the same.

Definition at line 220 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_update().

◆ Ifx_AngleTrkF32_update()

IFX_EXTERN void Ifx_AngleTrkF32_update ( Ifx_AngleTrkF32 * aObsv )

Update the object directly from its analog input.

See also
IfxStdIf_Pos_Update
Parameters
aObsv driver handle
Returns
None
Parameters
aObsv Pointer to the Ifx_AngleTrkF32 object

Definition at line 297 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_stdIfPosInit().

◆ Ifx_AngleTrkF32_updateStatus()

IFX_EXTERN void Ifx_AngleTrkF32_updateStatus | ( | Ifx_AngleTrkF32 * | aObsv,
 |  | sint16 | sinIn,
 |  | sint16 | cosIn
 | ) |  |

Update the status flags.

Parameters
aObsv | Pointer to the Ifx_AngleTrkF32 object
sinIn | Sinus value
cosIn | Cosinus value
Note
This function is automatically called by Ifx_AngleTrkF32_update()

Definition at line 284 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_update().


iLLD_TC38A: Floating point signal, vector, and matrix library

Floating point signal, vector, and matrix library
Service software » System Engineering » Math » Math 32bit floating point
Collaboration diagram for Floating point signal, vector, and matrix library:


iLLD_TC38A: Floating-point FFT

Files
Floating-point FFT
Service software » System Engineering » Math » Math 32bit floating point
Collaboration diagram for Floating-point FFT:

Files

file Ifx_FftF32.h
Floating-point Fast Fourier Transform.

Transform functions

IFX_EXTERN cfloat32 * | Ifx_FftF32_generateTwiddleFactor (cfloat32 *TF, sint16 nX)
Twiddle factor generator. More...
IFX_EXTERN cfloat32 * | Ifx_FftF32_radix2 (cfloat32 *R, const cfloat32 *X, uint16 nX)
Radix-2 Fast-Fourier Transform. More...
IFX_EXTERN cfloat32 * | Ifx_FftF32_radix2I (cfloat32 *R, const cfloat32 *X, uint16 nX)
Radix-2 Inverse Fast-Fourier Transform. More...

Utility functions

IFX_INLINE uint16 | Ifx_FftF32_lookUpReversedBits (uint16 n, unsigned bits)
Lookup from Ifx_g_FftF32_bitReverseTable the bit-reversed <n> with <bits> as number of bits. More...
IFX_INLINE cfloat32 | Ifx_FftF32_lookUpTwiddleFactor (sint32 N, sint32 k)
Lookup from Ifx_g_FftF32_twiddleTable the twiddle factor for N, k. More...
IFX_EXTERN uint16 | Ifx_FftF32_reverseBits (uint16 n, unsigned bits)
Calculate the bit-reversed <n> with <bits> as number of bits. More...

Detailed Description

This module implements the Fast Fourier Transform in single precision floating-point

Function Documentation

◆ Ifx_FftF32_generateTwiddleFactor()

IFX_EXTERN cfloat32* Ifx_FftF32_generateTwiddleFactor | ( | cfloat32 * | TF,
 |  | sint16 | nX
 | ) |  |

Twiddle factor generator.

Definition at line 48 of file Ifx_FftF32.c.

◆ Ifx_FftF32_lookUpReversedBits()

IFX_INLINE uint16 Ifx_FftF32_lookUpReversedBits | ( | uint16 | n,
 |  | unsigned | bits
 | ) |  |

Lookup from Ifx_g_FftF32_bitReverseTable the bit-reversed <n> with <bits> as number of bits.

Definition at line 90 of file Ifx_FftF32.h.

Referenced by Ifx_FftF32_radix2(), and Ifx_FftF32_radix2I().

◆ Ifx_FftF32_lookUpTwiddleFactor()

IFX_INLINE cfloat32 Ifx_FftF32_lookUpTwiddleFactor | ( | sint32 | N,
 |  | sint32 | k
 | ) |  |

Lookup from Ifx_g_FftF32_twiddleTable the twiddle factor for N, k.

Definition at line 99 of file Ifx_FftF32.h.

Referenced by Ifx_FftF32_radix2DecimationInTime().

◆ Ifx_FftF32_radix2()

IFX_EXTERN cfloat32* Ifx_FftF32_radix2 | ( | cfloat32 * | R,
 |  | const cfloat32 * | X,
 |  | uint16 | nX
 | ) |  |

Radix-2 Fast-Fourier Transform.

Definition at line 140 of file Ifx_FftF32.c.

◆ Ifx_FftF32_radix2I()

IFX_EXTERN cfloat32* Ifx_FftF32_radix2I | ( | cfloat32 * | R,
 |  | const cfloat32 * | X,
 |  | uint16 | nX
 | ) |  |

Radix-2 Inverse Fast-Fourier Transform.

Definition at line 159 of file Ifx_FftF32.c.

◆ Ifx_FftF32_reverseBits()

IFX_EXTERN uint16 Ifx_FftF32_reverseBits | ( | uint16 | n,
 |  | unsigned | bits
 | ) |  |

Calculate the bit-reversed <n> with <bits> as number of bits.

Definition at line 67 of file Ifx_FftF32.c.


iLLD_TC38A: Ifx_FftF32.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Macros | Variables
Ifx_FftF32.h File Reference
Service software » System Engineering » Math » Math 32bit floating point » Floating-point FFT

Floating-point Fast Fourier Transform. More...

#include "Ifx_Cf32.h"
Include dependency graph for Ifx_FftF32.h:

Go to the source code of this file.

Macros

#define | IFX_FFTF32_MAX_RESOLUTION (14)
Maximum FFT resolution (bits). If redefined, then Ifx_g_FftF32_bitReverseTable and Ifx_g_FftF32_twiddleTable shall be regenerated. More...
#define | IFX_FFTF32_MAX_LENGTH (1U << IFX_FFTF32_MAX_RESOLUTION)
Maximum FFT length. If redefined, then Ifx_g_FftF32_bitReverseTable and Ifx_g_FftF32_twiddleTable shall be regenerated. More...

Functions

Transform functions
IFX_EXTERN cfloat32 * | Ifx_FftF32_generateTwiddleFactor (cfloat32 *TF, sint16 nX)
Twiddle factor generator. More...
IFX_EXTERN cfloat32 * | Ifx_FftF32_radix2 (cfloat32 *R, const cfloat32 *X, uint16 nX)
Radix-2 Fast-Fourier Transform. More...
IFX_EXTERN cfloat32 * | Ifx_FftF32_radix2I (cfloat32 *R, const cfloat32 *X, uint16 nX)
Radix-2 Inverse Fast-Fourier Transform. More...
Utility functions
IFX_INLINE uint16 | Ifx_FftF32_lookUpReversedBits (uint16 n, unsigned bits)
Lookup from Ifx_g_FftF32_bitReverseTable the bit-reversed <n> with <bits> as number of bits. More...
IFX_INLINE cfloat32 | Ifx_FftF32_lookUpTwiddleFactor (sint32 N, sint32 k)
Lookup from Ifx_g_FftF32_twiddleTable the twiddle factor for N, k. More...
IFX_EXTERN uint16 | Ifx_FftF32_reverseBits (uint16 n, unsigned bits)
Calculate the bit-reversed <n> with <bits> as number of bits. More...

Variables

IFX_EXTERN IFX_CONST uint16 Ifx_g_FftF32_bitReverseTable [IFX_FFTF32_MAX_LENGTH]
Bit reversal table. More...
IFX_EXTERN IFX_CONST cfloat32 Ifx_g_FftF32_twiddleTable [IFX_FFTF32_MAX_LENGTH/2]
Twiddle factor table. More...

Detailed Description

Floating-point Fast Fourier Transform.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_FftF32.h.

Macro Definition Documentation

◆ IFX_FFTF32_MAX_LENGTH

#define IFX_FFTF32_MAX_LENGTH (1U << IFX_FFTF32_MAX_RESOLUTION)

Maximum FFT length. If redefined, then Ifx_g_FftF32_bitReverseTable and Ifx_g_FftF32_twiddleTable shall be regenerated.

Definition at line 60 of file Ifx_FftF32.h.

Referenced by Ifx_FftF32_lookUpTwiddleFactor().

◆ IFX_FFTF32_MAX_RESOLUTION

#define IFX_FFTF32_MAX_RESOLUTION (14)

Maximum FFT resolution (bits). If redefined, then Ifx_g_FftF32_bitReverseTable and Ifx_g_FftF32_twiddleTable shall be regenerated.

Definition at line 56 of file Ifx_FftF32.h.

Referenced by Ifx_FftF32_lookUpReversedBits().

Variable Documentation

◆ Ifx_g_FftF32_bitReverseTable

IFX_EXTERN IFX_CONST uint16 Ifx_g_FftF32_bitReverseTable[IFX_FFTF32_MAX_LENGTH]

Bit reversal table.

Definition at line 63 of file Ifx_FftF32.h.

Referenced by Ifx_FftF32_lookUpReversedBits().

◆ Ifx_g_FftF32_twiddleTable

IFX_EXTERN IFX_CONST cfloat32 Ifx_g_FftF32_twiddleTable[IFX_FFTF32_MAX_LENGTH/2]

Twiddle factor table.

Definition at line 66 of file Ifx_FftF32.h.

Referenced by Ifx_FftF32_lookUpTwiddleFactor().


iLLD_TC38A: Discrete Integral Approximation

Files | Functions
Discrete Integral Approximation
Service software » System Engineering » Math » Math 32bit floating point
Collaboration diagram for Discrete Integral Approximation:

Files

file Ifx_IntegralF32.h
Discrete integral approximation.

Functions

void | Ifx_IntegralF32_init (Ifx_IntegralF32 *ci, float32 gain, float32 Ts)
Initialize the integrator object. More...
float32 | Ifx_IntegralF32_step (Ifx_IntegralF32 *ci, float32 ik)
Step function of the integrator object. More...
void | Ifx_IntegralF32_reset (Ifx_IntegralF32 *ci)
Reset the integrator object. More...
void | Ifx_ClpxFloat32_Integral_init (Ifx_ClpxFloat32_Integral *ci, float32 gain, float32 Ts)
Initialize the integrator object. More...
cfloat32 | Ifx_ClpxFloat32_Integral_step (Ifx_ClpxFloat32_Integral *ci, cfloat32 ik)
Step function of the integrator object. More...
void | Ifx_ClpxFloat32_Integral_reset (Ifx_ClpxFloat32_Integral *ci)
Reset the integrator object. More...

Detailed Description

Function Documentation

◆ Ifx_ClpxFloat32_Integral_init()

void Ifx_ClpxFloat32_Integral_init | ( | Ifx_ClpxFloat32_Integral * | ci,
 |  | float32 | gain,
 |  | float32 | Ts
 | ) |  |

Initialize the integrator object.

Parameters
ci | Pointer to the integrator object
gain | Integrator gain
Ts | Sampling period

Definition at line 75 of file Ifx_IntegralF32.c.

◆ Ifx_ClpxFloat32_Integral_reset()

void Ifx_ClpxFloat32_Integral_reset ( Ifx_ClpxFloat32_Integral * ci )

Reset the integrator object.

Parameters
ci Pointer to the integrator object

Definition at line 66 of file Ifx_IntegralF32.c.

Referenced by Ifx_ClpxFloat32_Integral_init().

◆ Ifx_ClpxFloat32_Integral_step()

cfloat32 Ifx_ClpxFloat32_Integral_step | ( | Ifx_ClpxFloat32_Integral * | ci,
 |  | cfloat32 | ik
 | ) |  |

Step function of the integrator object.

Parameters
ci | Pointer to the integrator object
ik | input value
Returns
most actual integrator value

Definition at line 82 of file Ifx_IntegralF32.c.

◆ Ifx_IntegralF32_init()

void Ifx_IntegralF32_init | ( | Ifx_IntegralF32 * | ci,
 |  | float32 | gain,
 |  | float32 | Ts
 | ) |  |

Initialize the integrator object.

Parameters
ci | Pointer to the integrator object
gain | Integrator gain
Ts | Sampling period

Definition at line 51 of file Ifx_IntegralF32.c.

◆ Ifx_IntegralF32_reset()

void Ifx_IntegralF32_reset ( Ifx_IntegralF32 * ci )

Reset the integrator object.

Parameters
ci Pointer to the integrator object

Definition at line 44 of file Ifx_IntegralF32.c.

◆ Ifx_IntegralF32_step()

float32 Ifx_IntegralF32_step | ( | Ifx_IntegralF32 * | ci,
 |  | float32 | ik
 | ) |  |

Step function of the integrator object.

Parameters
ci | Pointer to the integrator object
ik | input value
Returns
most actual integrator value

Definition at line 57 of file Ifx_IntegralF32.c.


iLLD_TC38A: Ifx_IntegralF32.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Data Structures | Functions
Ifx_IntegralF32.h File Reference
Service software » System Engineering » Math » Math 32bit floating point » Discrete Integral Approximation

Discrete integral approximation. More...

#include "Ifx_Cf32.h"
Include dependency graph for Ifx_IntegralF32.h:

Go to the source code of this file.

Data Structures

struct | Ifx_IntegralF32
Integrator object for float32 data type. More...
struct | Ifx_ClpxFloat32_Integral
Integrator object for cfloat32 data type. More...

Functions

void | Ifx_IntegralF32_init (Ifx_IntegralF32 *ci, float32 gain, float32 Ts)
Initialize the integrator object. More...
float32 | Ifx_IntegralF32_step (Ifx_IntegralF32 *ci, float32 ik)
Step function of the integrator object. More...
void | Ifx_IntegralF32_reset (Ifx_IntegralF32 *ci)
Reset the integrator object. More...
void | Ifx_ClpxFloat32_Integral_init (Ifx_ClpxFloat32_Integral *ci, float32 gain, float32 Ts)
Initialize the integrator object. More...
cfloat32 | Ifx_ClpxFloat32_Integral_step (Ifx_ClpxFloat32_Integral *ci, cfloat32 ik)
Step function of the integrator object. More...
void | Ifx_ClpxFloat32_Integral_reset (Ifx_ClpxFloat32_Integral *ci)
Reset the integrator object. More...

Detailed Description

Discrete integral approximation.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_IntegralF32.h.

Data Structure Documentation

◆ Ifx_IntegralF32

struct Ifx_IntegralF32

Integrator object for float32 data type.

Definition at line 54 of file Ifx_IntegralF32.h.

Data Fields
float32 | delta
float32 | ik
float32 | uk

◆ Ifx_ClpxFloat32_Integral

struct Ifx_ClpxFloat32_Integral

Integrator object for cfloat32 data type.

Definition at line 62 of file Ifx_IntegralF32.h.

Collaboration diagram for Ifx_ClpxFloat32_Integral:
[legend]
Data Fields
float32 | delta
cfloat32 | ik
cfloat32 | uk


iLLD_TC38A: Low-pass Filter: Type PT1

Functions
Low-pass Filter: Type PT1
Service software » System Engineering » Math » Math 32bit floating point
Collaboration diagram for Low-pass Filter: Type PT1:

Functions

IFX_EXTERN void | Ifx_LowPassPt1F32_init (Ifx_LowPassPt1F32 *filter, const Ifx_LowPassPt1F32_Config *config)
Set the low pass filter configuration. More...
IFX_INLINE void | Ifx_LowPassPt1F32_reset (Ifx_LowPassPt1F32 *filter)
Reset the internal filter variable. More...
IFX_EXTERN float32 | Ifx_LowPassPt1F32_do (Ifx_LowPassPt1F32 *filter, float32 input)
Execute the low pass filter. More...

Detailed Description

This module implements a PT1 low pass filter. http://de.wikipedia.org/wiki/PT1-Glied

Formula:
$ y_k = y_{k-1} + a * x_k - b * y_{k-1} $
with [image], $(a = K*T^*)$, $(b = T^*)$ with $(T_s: Sample time)$, $(K: Gain)$,

Function Documentation

◆ Ifx_LowPassPt1F32_do()

IFX_EXTERN float32 Ifx_LowPassPt1F32_do | ( | Ifx_LowPassPt1F32 * | filter,
 |  | float32 | input
 | ) |  |

Execute the low pass filter.

Parameters
filter | Specifies PT1 filter.
input | Specifies the filter input.
Returns
Returns the filter output

Definition at line 73 of file Ifx_LowPassPt1F32.c.

Referenced by Ifx_AngleTrkF32_step().

◆ Ifx_LowPassPt1F32_init()

IFX_EXTERN void Ifx_LowPassPt1F32_init | ( | Ifx_LowPassPt1F32 * | filter,
 |  | const Ifx_LowPassPt1F32_Config * | config
 | ) |  |

Set the low pass filter configuration.

This function sets the low pass filter configuration and reset the filter output.

Parameters
filter | Specifies PT1 filter.
config | Specifies the PT1 filter configuration.
Returns
None

Definition at line 55 of file Ifx_LowPassPt1F32.c.

Referenced by Ifx_AngleTrkF32_init().

◆ Ifx_LowPassPt1F32_reset()

IFX_INLINE void Ifx_LowPassPt1F32_reset ( Ifx_LowPassPt1F32 * filter )

Reset the internal filter variable.

Parameters
filter Specifies PT1 filter.

Definition at line 90 of file Ifx_LowPassPt1F32.h.

Referenced by Ifx_AngleTrkF32_reset().


iLLD_TC38A: Ramp

Functions
Ramp
Service software » System Engineering » Math » Math 32bit floating point
Collaboration diagram for Ramp:

Functions

IFX_INLINE void | Ifx_RampF32_init (Ifx_RampF32 *ramp, float32 slewRate, float32 period)
Initialize the Ifx_RampF32 object. More...
IFX_INLINE void | Ifx_RampF32_reset (Ifx_RampF32 *ramp)
Reset internal values. More...
IFX_INLINE void | Ifx_RampF32_setSlewRate (Ifx_RampF32 *ramp, float32 slewRate, float32 period)
Set the maximum slew rate. More...
IFX_INLINE void | Ifx_RampF32_setRef (Ifx_RampF32 *ramp, float32 ref)
Set the reference value. More...
IFX_INLINE float32 | Ifx_RampF32_getValue (Ifx_RampF32 *ramp)
Get the actual output value. More...
IFX_EXTERN float32 | Ifx_RampF32_step (Ifx_RampF32 *ramp)
Execute the Ramp function. More...

Detailed Description

Function Documentation

◆ Ifx_RampF32_getValue()

IFX_INLINE float32 Ifx_RampF32_getValue ( Ifx_RampF32 * ramp )

Get the actual output value.

Parameters
ramp Pointer to the Ifx_RampF32 object
Returns
Actual value

Definition at line 141 of file Ifx_RampF32.h.

◆ Ifx_RampF32_init()

IFX_INLINE void Ifx_RampF32_init | ( | Ifx_RampF32 * | ramp,
 |  | float32 | slewRate,
 |  | float32 | period
 | ) |  |

Initialize the Ifx_RampF32 object.

Parameters
ramp | Pointer to the Ifx_RampF32 object
slewRate | Maximum slew rate, value per second
period | Sampling period of the Ifx_RampF32_step() function

Definition at line 118 of file Ifx_RampF32.h.

◆ Ifx_RampF32_reset()

IFX_INLINE void Ifx_RampF32_reset ( Ifx_RampF32 * ramp )

Reset internal values.

Parameters
ramp Pointer to the Ifx_RampF32 object

Definition at line 82 of file Ifx_RampF32.h.

Referenced by Ifx_RampF32_init().

◆ Ifx_RampF32_setRef()

IFX_INLINE void Ifx_RampF32_setRef | ( | Ifx_RampF32 * | ramp,
 |  | float32 | ref
 | ) |  |

Set the reference value.

Parameters
ramp | Pointer to the Ifx_RampF32 object
ref | Reference value

Definition at line 130 of file Ifx_RampF32.h.

◆ Ifx_RampF32_setSlewRate()

IFX_INLINE void Ifx_RampF32_setSlewRate | ( | Ifx_RampF32 * | ramp,
 |  | float32 | slewRate,
 |  | float32 | period
 | ) |  |

Set the maximum slew rate.

Parameters
ramp | Pointer to the Ifx_RampF32 object
slewRate | Maximum slew rate, value per second
period | Sampling period of the Ifx_RampF32_step() function

Definition at line 106 of file Ifx_RampF32.h.

Referenced by Ifx_RampF32_init().

◆ Ifx_RampF32_step()

IFX_EXTERN float32 Ifx_RampF32_step ( Ifx_RampF32 * ramp )

Execute the Ramp function.

NOTE: shall be called every 'period'. The period was defined by Ifx_RampF32_init() or Ifx_RampF32_setSlewRate()

Parameters
ramp Pointer to the Ifx_RampF32 object
Returns
Actual value

Definition at line 54 of file Ifx_RampF32.c.


iLLD_TC38A: Window functions

Files | Functions | Variables
Window functions
Service software » System Engineering » Math » Math 32bit floating point
Collaboration diagram for Window functions:

Files

file Ifx_WndF32.h
Windowing function.

Functions

IFX_INLINE void Ifx_WndF32_apply (cfloat32 *x, CONST_CFG float32 *window, short nX)
Apply a window to complex array x which has nX length. More...

Variables

IFX_EXTERN CONST_CFG float32 | Ifx_g_WndF32_hannTable [IFX_WNDF32_TABLE_LENGTH/2]
IFX_EXTERN CONST_CFG float32 | Ifx_g_WndF32_blackmanHarrisTable [IFX_WNDF32_TABLE_LENGTH/2]

Detailed Description

Function Documentation

◆ Ifx_WndF32_apply()

IFX_INLINE void Ifx_WndF32_apply | ( | cfloat32 * | x,
 |  | CONST_CFG float32 * | window,
 |  | short | nX
 | ) |  |

Apply a window to complex array x which has nX length.

Example: Ifx_WndF32_apply(x, Ifx_g_WndF32_hannTable, 1024);

Definition at line 63 of file Ifx_WndF32.h.

Variable Documentation

◆ Ifx_g_WndF32_blackmanHarrisTable

IFX_EXTERN CONST_CFG float32 Ifx_g_WndF32_blackmanHarrisTable[IFX_WNDF32_TABLE_LENGTH/2]

Definition at line 58 of file Ifx_WndF32.h.

◆ Ifx_g_WndF32_hannTable

IFX_EXTERN CONST_CFG float32 Ifx_g_WndF32_hannTable[IFX_WNDF32_TABLE_LENGTH/2]

Definition at line 57 of file Ifx_WndF32.h.


iLLD_TC38A: Ifx_WndF32.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Macros | Functions | Variables
Ifx_WndF32.h File Reference
Service software » System Engineering » Math » Math 32bit floating point » Window functions

Windowing function. More...

#include "Ifx_Cf32.h"
Include dependency graph for Ifx_WndF32.h:

Go to the source code of this file.

Macros

#define IFX_WNDF32_TABLE_LENGTH (1024)

Functions

IFX_INLINE void Ifx_WndF32_apply (cfloat32 *x, CONST_CFG float32 *window, short nX)
Apply a window to complex array x which has nX length. More...

Variables

IFX_EXTERN CONST_CFG float32 | Ifx_g_WndF32_hannTable [IFX_WNDF32_TABLE_LENGTH/2]
IFX_EXTERN CONST_CFG float32 | Ifx_g_WndF32_blackmanHarrisTable [IFX_WNDF32_TABLE_LENGTH/2]

Detailed Description

Windowing function.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_WndF32.h.

Macro Definition Documentation

◆ IFX_WNDF32_TABLE_LENGTH

#define IFX_WNDF32_TABLE_LENGTH (1024)

Definition at line 52 of file Ifx_WndF32.h.

Referenced by Ifx_WndF32_apply().


iLLD_TC38A: Time

Modules
Time
Service software » System Engineering
Collaboration diagram for Time:

Modules

DateTime

Detailed Description


iLLD_TC38A: DateTime

Functions
DateTime
Service software » System Engineering » Time
Collaboration diagram for DateTime:

Functions

IFX_EXTERN void | DateTime_set (Ifx_DateTime *time)
Set the real time. More...
IFX_EXTERN void | DateTime_get (Ifx_DateTime *time)
Get the real time Note that this function is valid only if DateTime_set() has been called. More...

Detailed Description

This module implements the Date-Time functions.

Function Documentation

◆ DateTime_get()

IFX_EXTERN void DateTime_get ( Ifx_DateTime * time )

Get the real time Note that this function is valid only if DateTime_set() has been called.

Definition at line 50 of file Ifx_DateTime.c.

◆ DateTime_set()

IFX_EXTERN void DateTime_set ( Ifx_DateTime * time )

Set the real time.

Definition at line 63 of file Ifx_DateTime.c.


iLLD_TC38A: DMU Pin Mapping

Data Structures | Macros | Variables
DMU Pin Mapping

Data Structures

struct IfxDmu_Fdest_In
DMU FDEST pin mapping structure. More...

Macros

#define | IFXDMU_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXDMU_PINMAP_NUM_0S 1
#define | IFXDMU_PINMAP_FDEST_IN_NUM_ITEMS 1

Variables

IFX_EXTERN IfxDmu_Fdest_In IfxDmu_FDEST_P21_0_IN
Enter destructive debug mode. More...
IFX_EXTERN const IfxDmu_Fdest_In * IfxDmu_Fdest_In_pinTable [IFXDMU_PINMAP_NUM_MODULES][IFXDMU_PINMAP_NUM_0S][IFXDMU_PINMAP_FDEST_IN_NUM_ITEMS]
IfxDmu_Fdest_In table. More...

Detailed Description

Data Structure Documentation

◆ IfxDmu_Fdest_In

struct IfxDmu_Fdest_In

DMU FDEST pin mapping structure.

Definition at line 55 of file IfxDmu_PinMap.h.

Collaboration diagram for IfxDmu_Fdest_In:
[legend]
Data Fields
Ifx_DMU * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

Macro Definition Documentation

◆ IFXDMU_PINMAP_FDEST_IN_NUM_ITEMS

#define IFXDMU_PINMAP_FDEST_IN_NUM_ITEMS 1

Definition at line 68 of file IfxDmu_PinMap.h.

◆ IFXDMU_PINMAP_NUM_0S

#define IFXDMU_PINMAP_NUM_0S 1

Definition at line 67 of file IfxDmu_PinMap.h.

◆ IFXDMU_PINMAP_NUM_MODULES

#define IFXDMU_PINMAP_NUM_MODULES 1

Table dimensions.

Definition at line 66 of file IfxDmu_PinMap.h.

Variable Documentation

◆ IfxDmu_Fdest_In_pinTable

IFX_EXTERN const IfxDmu_Fdest_In* IfxDmu_Fdest_In_pinTable[IFXDMU_PINMAP_NUM_MODULES][IFXDMU_PINMAP_NUM_0S][IFXDMU_PINMAP_FDEST_IN_NUM_ITEMS]

IfxDmu_Fdest_In table.

Definition at line 72 of file IfxDmu_PinMap.h.

◆ IfxDmu_FDEST_P21_0_IN

IFX_EXTERN IfxDmu_Fdest_In IfxDmu_FDEST_P21_0_IN

Enter destructive debug mode.

Definition at line 63 of file IfxDmu_PinMap.h.


iLLD_TC38A: Data Structures

Data Structures
Here are the data structures with brief descriptions:
C _Fifo |
C cfloat32 |
C cfract |
C csfract |
C csint16 |
C csint32 |
C Icu_Config | Configuration structure of the Icu interface
C Icu_Functions |
C Icu_s | Structure of the Icu interface
C Ifc_Crc |
C Ifc_Crc_Table |
C Ifc_Crc_Table16 |
C Ifc_Crc_Table32 |
C Ifc_Crc_Table8 |
C Ifx_AngleTrkF32 | Angle Tracking Observer object
C Ifx_AngleTrkF32_CfgData |
C Ifx_AngleTrkF32_Config | Angle Tracking Observer configuration
C Ifx_AngleTrkF32_PosIf |
C Ifx_CircularBuffer | Circular buffer definition
C Ifx_ClpxFloat32_Integral | Integrator object for cfloat32 data type
C Ifx_Console |
C Ifx_DataBufferMode_TimeStampSingle |
C Ifx_DateTime |
C Ifx_Fifo_Shared |
C Ifx_GlobalResources | Global resource object
C Ifx_GlobalResources_Item |
C Ifx_IntegralF32 | Integrator object for float32 data type
C Ifx_InternalMux_Config |
C Ifx_InternalMux_MuxConfig |
C Ifx_IsrSetting |
C Ifx_LowPassPt1F32 | PT1 object definition
C Ifx_LowPassPt1F32_Config | PT1 configuration
C Ifx_LutIndexedLinearF32 |
C Ifx_LutIndexedLinearF32_Item |
C Ifx_LutLinearF32 |
C Ifx_LutLinearF32_Item |
C Ifx_RampF32 | Ifx_RampF32 object definition
C Ifx_Shell | Shell object definition
C Ifx_Shell_CmdLine | Command line editing state
C Ifx_Shell_Command | Shell command object
C Ifx_Shell_Config | Shell configuration
C Ifx_Shell_Flags | Shell control flags
C Ifx_Shell_Protocol | Shell protocol configuration
C Ifx_Shell_Runtime | Internal Shell run-time data
C Ifx_Shell_Syntax | Shell Syntax Description
C Ifx_Ssw_Bmhd | Structure definition for the BMHD Based on BMI and start address respective CRC and Inverted CRC values has to be calculated and updated. CRC-32 polynomial as defined in the IEEE 802.3 standard is used to generate the CRC value. The CRC algorithm treats input data as a stream of bits
C Ifx_Ssw_CTablePtr |
C IfxAsclin_Asc | Module Handle
C IfxAsclin_Asc_BaudRate | Structure for baudrate
C IfxAsclin_Asc_BitTimingControl | Structure for bit timings
C IfxAsclin_Asc_Config | Configuration structure of the module
C IfxAsclin_Asc_ErrorFlags | Structure for Error Flags
C IfxAsclin_Asc_ErrorFlagsUnion | This union contains the error flags. In addition it allows to write and read to/from all flags as once via the ALL member
C IfxAsclin_Asc_FifoControl | Structure for FIFO control
C IfxAsclin_Asc_FrameControl | Structure for frame control
C IfxAsclin_Asc_InterruptConfig | Structure for interrupt configuration
C IfxAsclin_Asc_Pins | Structure for ASC pin configuration
C IfxAsclin_Cts_In | CTS pin mapping structure
C IfxAsclin_Lin |
C IfxAsclin_Lin_AcknowledgementFlags | Structure for Acknowledgement Flags
C IfxAsclin_Lin_BaudrateDetection | Structure for Baudrate Detection
C IfxAsclin_Lin_BaudrateGeneration | Structure for Baudrate Generation
C IfxAsclin_Lin_BitSamplingControl | Structure for Bit Sampling
C IfxAsclin_Lin_BitTimingControl | Structure for Bit Timing
C IfxAsclin_Lin_Config | Configuration structure of the module
C IfxAsclin_Lin_DataControl | Structure for Data Control
C IfxAsclin_Lin_EnabledInterrupts | Structure to store interrupts which are enabled during initialisation
C IfxAsclin_Lin_ErrorFlags | Structure for Error Flags
C IfxAsclin_Lin_FifoControl | Structure for FIFO Control
C IfxAsclin_Lin_FrameControl | Structure for Frame Control
C IfxAsclin_Lin_FrameControlFlags | Structure for Lin Frame Control flags
C IfxAsclin_Lin_FrameDataControl | Structure for Frame Data and Control flags
C IfxAsclin_Lin_InterruptConfig | Structure for LIN Interrupt Configuration
C IfxAsclin_Lin_LinControl | Structure for lin Control
C IfxAsclin_Lin_PduType | Structure to hold Lin Pdu data
C IfxAsclin_Lin_Pins | Structure for LIN pin configuration
C IfxAsclin_Rts_Out | RTS pin mapping structure
C IfxAsclin_Rx_In | RX pin mapping structure
C IfxAsclin_Sclk_Out | SCLK pin mapping structure
C IfxAsclin_Slso_Out | SLSO pin mapping structure
C IfxAsclin_Spi | Module handle
C IfxAsclin_Spi_Baudrate | Structure for Baudrate Generation
C IfxAsclin_Spi_BitSamplingControl | Structure for Bit Sampling
C IfxAsclin_Spi_Config | Configuration structure of the module
C IfxAsclin_Spi_ErrorFlags | Structure for Error Flags
C IfxAsclin_Spi_FifoControl | Structure for FIFO Control
C IfxAsclin_Spi_FrameControl | Structure for Frame Control
C IfxAsclin_Spi_InputOutputControl | Structure for input output control
C IfxAsclin_Spi_InterruptConfig | Structure for interrupt configuration
C IfxAsclin_Spi_Job | Structure for data transfer jobs
C IfxAsclin_Spi_Pins | Structure for SPI pin configuration
C IfxAsclin_Tx_Out | TX pin mapping structure
C IfxCan_Can | Module handle
C IfxCan_Can_BaudRate | Structure for nominal baudrate
C IfxCan_Can_Config | Configuration Structure of the Module
C IfxCan_Can_FastBaudRate | Structure for fast baudrate
C IfxCan_Can_FilterConfig | Structure for Acceptance filter configuration
C IfxCan_Can_Frame | Structure for Frame Configuration
C IfxCan_Can_InterruptConfig | Structure for Interrupt configuration
C IfxCan_Can_Node | Node handle
C IfxCan_Can_NodeConfig | Configuration Structure of the Node
C IfxCan_Can_Pins | Structure for CAN pin configuration
C IfxCan_Can_RxConfig | Structure for Rx handle Configuration
C IfxCan_Can_TxConfig | Structure for Tx handle Configuration
C IfxCan_Filter | Tructure for Filter configuration
C IfxCan_GroupInterruptConfig | Configuration for Interrupt groups
C IfxCan_Message | Structure for CAN Message configuration (transmit/receive)
C IfxCan_MessageRAM | Structure for Message RAM configuration
C IfxCan_Rxd_In | RXD pin mapping structure
C IfxCan_Txd_Out | TXD pin mapping structure
C IfxCcu6_Cc60_Out | CC60 pin mapping structure
C IfxCcu6_Cc60in_In | CC60IN pin mapping structure
C IfxCcu6_Cc61_Out | CC61 pin mapping structure
C IfxCcu6_Cc61in_In | CC61IN pin mapping structure
C IfxCcu6_Cc62_Out | CC62 pin mapping structure
C IfxCcu6_Cc62in_In | CC62IN pin mapping structure
C IfxCcu6_Ccpos0_In | CCPOS0 pin mapping structure
C IfxCcu6_Ccpos1_In | CCPOS1 pin mapping structure
C IfxCcu6_Ccpos2_In | CCPOS2 pin mapping structure
C IfxCcu6_Cout60_Out | COUT60 pin mapping structure
C IfxCcu6_Cout61_Out | COUT61 pin mapping structure
C IfxCcu6_Cout62_Out | COUT62 pin mapping structure
C IfxCcu6_Cout63_Out | COUT63 pin mapping structure
C IfxCcu6_Ctrap_In | CTRAP pin mapping structure
C IfxCcu6_Icu | Module handle
C IfxCcu6_Icu_Channel | Channel handle
C IfxCcu6_Icu_ChannelConfig | Configuration structure of the channel
C IfxCcu6_Icu_Clock | Structure for clock configuration
C IfxCcu6_Icu_Config | Configuration structure of the module
C IfxCcu6_Icu_InterruptConfig | Structure for interrupt configuration
C IfxCcu6_Icu_Pins | Structure for capture input pins
C IfxCcu6_Icu_TriggerConfig | Configuration structure for external triggers
C IfxCcu6_PwmBc | Module handle
C IfxCcu6_PwmBc_Config | Configuration structure of the module
C IfxCcu6_PwmBc_InterruptConfig | Structure for interrupt configuration
C IfxCcu6_PwmBc_MultiChannelControl | Structure for multichannel mode control
C IfxCcu6_PwmBc_Pins | Structure for CCU6 output pin configuration
C IfxCcu6_PwmBc_Timer12 | Structure for Timer 12
C IfxCcu6_PwmBc_Timer13 | Structure for Timer 13
C IfxCcu6_PwmBc_TriggerConfig | Configuration structure for external triggers
C IfxCcu6_PwmHl_Base | Multi-channels PWM object definition (channels only)
C IfxCcu6_PwmHl_Config | CCU6: PWM HL configuration
C IfxCcu6_PwmHl_Mode | Structure for PWM configuration
C IfxCcu6_PwmHl_s | CCU6 PWM driver
C IfxCcu6_T12hr_In | T12HR pin mapping structure
C IfxCcu6_T13hr_In | T13HR pin mapping structure
C IfxCcu6_Timer | Module handle
C IfxCcu6_Timer_Clock | Structure for clock configuration
C IfxCcu6_Timer_Config | Configuration structure of the module
C IfxCcu6_Timer_InterruptConfig | Structure for interrupt configuration
C IfxCcu6_Timer_Pins | Structure for CCU6 output pin configuration
C IfxCcu6_Timer_Timer12 | Structure for Timer 12
C IfxCcu6_Timer_Timer13 | Structure for Timer 13
C IfxCcu6_Timer_TriggerConfig | Configuration structure for external triggers
C IfxCcu6_TimerWithTrigger | CCU6 Timer interface
C IfxCcu6_TimerWithTrigger_Base | Structure for the timer base
C IfxCcu6_TimerWithTrigger_Config | Configuration structure for T12 and T13 Timer
C IfxCcu6_TPwm | Module handle
C IfxCcu6_TPwm_Clock | Structure for clock configuration
C IfxCcu6_TPwm_Config | Configuration structure of the module
C IfxCcu6_TPwm_InterruptConfig | Structure for interrupt configuration
C IfxCcu6_TPwm_Pins | Structure for CCU6 output pin configuration
C IfxCcu6_TPwm_Timer12 | Structure for Timer 12
C IfxCcu6_TPwm_Timer13 | Structure for Timer 13
C IfxCcu6_TPwm_TriggerConfig | Configuration structure for external triggers
C IfxCpu_Counter | Counter
C IfxCpu_Perf | Performance counter result
C IfxCpu_Trap | Structure to contain the trap information
C IfxCpu_Trap_Id | Union to abstract Identification numbers under Traps
C IfxDma_Dma | DMA base address data structure (Module handle)
C IfxDma_Dma_Channel | Channel handle
C IfxDma_Dma_ChannelConfig | Configuration data structure of the channel
C IfxDma_Dma_Config | Configuration data structure of the Module
C IfxDmu_Fdest_In | DMU FDEST pin mapping structure
C IfxDts_Dts_Config | DTS module configuration structure
C IfxEdsadc_Cgpwm_Out | CGPWM pin mapping structure
C IfxEdsadc_Cin_In | CIN pin mapping structure
C IfxEdsadc_Cout_Out | COUT pin mapping structure
C IfxEdsadc_Din_In | DIN pin mapping structure
C IfxEdsadc_Dscin_In | DIN pin mapping structure
C IfxEdsadc_Dscout_Out | COUT pin mapping structure
C IfxEdsadc_Dsdin_In | DIN pin mapping structure
C IfxEdsadc_Dsn_In | DS negative pin mapping structure
C IfxEdsadc_Dsp_In | DS positive pin mapping structure
C IfxEdsadc_Edsadc | EDSADC handle data structure
C IfxEdsadc_Edsadc_CarrierGenConfig | Carrier generation configuration structure
C IfxEdsadc_Edsadc_Channel | Channel handle structure
C IfxEdsadc_Edsadc_ChannelConfig | Single channel configuration structure
C IfxEdsadc_Edsadc_ChannelPins | Channel Pins Configuration structure
C IfxEdsadc_Edsadc_CombFilterConfig | Comb filter configuration structure
C IfxEdsadc_Edsadc_CommonModeVoltageConfig | Enable the voltage generators and select which input pins are connected to the common mode hold voltage
C IfxEdsadc_Edsadc_Config | Clock configuration data structure
C IfxEdsadc_Edsadc_DemodulatorConfig | Demodulator configuration structure
C IfxEdsadc_Edsadc_FirFilterConfig | FIR filters configuration structure
C IfxEdsadc_Edsadc_GainCalibrationConfig | Contains configurations for Gain Calibaration
C IfxEdsadc_Edsadc_IntegratorConfig | Integrator configuration structure
C IfxEdsadc_Edsadc_ModulatorConfig | Modulator configuration structure
C IfxEdsadc_Edsadc_RectifierConfig | Rectifier configuration structure
C IfxEdsadc_Edsadc_TimeStampCounter | TimeStamp Counter Configuration
C IfxEdsadc_Itr_In | ITR pin mapping structure
C IfxEdsadc_ModulatorConfig | Modulator Configuration
C IfxEdsadc_Sg_In | SG pin mapping structure
C IfxEray_Eray | ERAY Module handle
C IfxEray_Eray_BufferReconfig | Reconfigurable buffer structure
C IfxEray_Eray_Config | Module configuration structure
C IfxEray_Eray_ControllerConfig | Communication Controller configuration structure
C IfxEray_Eray_Gtu01Config | GTU01 configuration
C IfxEray_Eray_Gtu02Config | GTU02 configuration
C IfxEray_Eray_Gtu03Config | GTU03 configuration
C IfxEray_Eray_Gtu04Config | GTU04 configuration
C IfxEray_Eray_Gtu05Config | GTU05 configuration
C IfxEray_Eray_Gtu06Config | GTU06 configuration
C IfxEray_Eray_Gtu07Config | GTU07 configuration
C IfxEray_Eray_Gtu08Config | GTU08 configuration
C IfxEray_Eray_Gtu09Config | GTU09 configuration
C IfxEray_Eray_Gtu10Config | GTU10 configuration
C IfxEray_Eray_Gtu11Config | GTU11 configuration
C IfxEray_Eray_GTUConfig | Gloabl Timing Unit configuration structure
C IfxEray_Eray_Interrupt | Interrupt control properties
C IfxEray_Eray_MessageRAMConfig | Message RAM configuration structure
C IfxEray_Eray_NodeA | Pins configuration structure for Node A
C IfxEray_Eray_NodeB | Pins configuration structure for Node B
C IfxEray_Eray_NodeConfig | Node configuration structure
C IfxEray_Eray_Pins | Pins configuration structure
C IfxEray_Eray_Prtc1Control | Protocol operation control properties
C IfxEray_Eray_Prtc2Control | Wakeup symbol control properties
C IfxEray_Eray_ReceiveControl | Receive control properties structure
C IfxEray_Eray_ReceivedFrame | Received Frame
C IfxEray_Eray_Succ1Config | Communication controller control properties
C IfxEray_Eray_Succ2Config | Communication listen timeout properties
C IfxEray_Eray_Succ3Config | Clock correction fail properties
C IfxEray_Eray_TransmitControl | Transfer control in a slot
C IfxEray_Header | Header section in a frame
C IfxEray_ReceivedHeader | Received header in a frame
C IfxEray_Rxd_In | RXD pin mapping structure
C IfxEray_SlotConfig | Transmit control structure
C IfxEray_Txd_Out | TXD pin mapping structure
C IfxEray_Txen_Out | TXEN pin mapping structure
C IfxEvadc_Adc | EVADC handle data structure
C IfxEvadc_Adc_ArbiterConfig | Arbiter configuration structure
C IfxEvadc_Adc_Channel | Channel handle data structure
C IfxEvadc_Adc_ChannelConfig | Channel configuration structure
C IfxEvadc_Adc_ClassConfig | Input class configuration structure
C IfxEvadc_Adc_Config | EVADC module configuration structure
C IfxEvadc_Adc_EmuxControl | Emux Control Structure
C IfxEvadc_Adc_EmuxPinConfig |
C IfxEvadc_Adc_FastCompareChannel |
C IfxEvadc_Adc_FastCompareChannelConfig | Configuring Fast Compare channel operations
C IfxEvadc_Adc_GatingTriggerConfig | Gating/Trigger configuration structure
C IfxEvadc_Adc_Group | Group handle data structure
C IfxEvadc_Adc_GroupConfig | Group configuration structure
C IfxEvadc_Adc_QueueConfig | Queue configuration structure
C IfxEvadc_Emux_Out | EVADC External Mux pin mapping structure
C IfxEvadc_GxBfl_Out | EVADC Boundary Flag pin mapping structure
C IfxEvadc_Vadcg_In | EVADC Analog Input
C IfxFce_Crc | FCE Module Handle;
C IfxFce_Crc_Config | Configuration structure of the module
C IfxFce_Crc_Crc | Specifies the pointer to FCE module handler
C IfxFce_Crc_CrcConfig | Specifies the module configuration structure
C IfxFce_Crc_EnabledInterrupts | Specifies the interrupt enable structure
C IfxFlash_flashSector | Start and end address of sectors
C IfxGeth_Col_In | COL pin mapping structure
C IfxGeth_Crs_In | CRS pin mapping structure
C IfxGeth_Crsdv_In | CRSDV pin mapping structure
C IfxGeth_Eth | GETH driver Handle
C IfxGeth_Eth_Config | Configuration Structure for the Module initialisation
C IfxGeth_Eth_DmaConfig | Configuration Structure for the DMA initialisation
C IfxGeth_Eth_DmaInterruptConfig | Interrupt configuration structure for DMA Channel
C IfxGeth_Eth_FrameConfig | Configuration Structure for TX Frame
C IfxGeth_Eth_MacConfig | Configuration Structure for the MAC initialisation
C IfxGeth_Eth_MiiPins | Port pins for MII mode configuration
C IfxGeth_Eth_MtlConfig | Configuration Structure for the MTL initialisation
C IfxGeth_Eth_MtlInterruptConfig | Interrupt configuration structure for MTL block
C IfxGeth_Eth_PinConfig | Configuration structure for pins
C IfxGeth_Eth_RgmiiPins | Port pins for RGMII mode configuration
C IfxGeth_Eth_RmiiPins | Port pins for RMII mode configuration
C IfxGeth_Eth_RxChannel | Handle sturcture for DMA rx channel
C IfxGeth_Eth_RxChannelConfig | Configuration sturcture for DMA rx channel
C IfxGeth_Eth_RxQueueConfig | Rx Queue Configuration
C IfxGeth_Eth_TxChannel | Handle sturcture for DMA tx channel
C IfxGeth_Eth_TxChannelConfig | Configuration sturcture for DMA tx channel
C IfxGeth_Eth_TxQueueConfig | Tx Queue Configuration
C IfxGeth_Grefclk_In | GREFCLK pin mapping structure
C IfxGeth_Mdc_Out | MDC pin mapping structure
C IfxGeth_Mdio_InOut | MDIO pin mapping structure
C IfxGeth_Pps_Out | PPS pin mapping structure
C IfxGeth_Refclk_In | REFCLK pin mapping structure
C IfxGeth_Rxclk_In | RXCLK pin mapping structure
C IfxGeth_RxContextDescr0_Bits | Bit Fields of RDES0 Context Descriptor
C IfxGeth_RxContextDescr1_Bits | Bit Fields of RDES1 Context Descriptor
C IfxGeth_RxContextDescr2_Bits | Bit Fields of RDES2 Context Descriptor
C IfxGeth_RxContextDescr3_Bits | Bit Fields of RDES3 Context Descriptor
C IfxGeth_Rxctl_In | RXCTL pin mapping structure
C IfxGeth_Rxd_In | RXD pin mapping structure
C IfxGeth_RxDescr | Rx Descriptor
C IfxGeth_RxDescr0 | RDES0
C IfxGeth_RxDescr0_RF_Bits | Bit Fields of RDES0 in Read Format
C IfxGeth_RxDescr0_WF_Bits | Bit Fields of RDES0 in Write back Format
C IfxGeth_RxDescr1 | RDES1
C IfxGeth_RxDescr1_RF_Bits | Bit Fields of RDES1 in Read Format
C IfxGeth_RxDescr1_WF_Bits | Bit Fields of RDES1 in Write back Format
C IfxGeth_RxDescr2 | RDES2
C IfxGeth_RxDescr2_RF_Bits | Bit Fields of RDES2 in Read Format
C IfxGeth_RxDescr2_WF_Bits | Bit Fields of RDES2 in Write back Format
C IfxGeth_RxDescr3 | RDES3
C IfxGeth_RxDescr3_RF_Bits | Bit Fields of RDES3 in Read Format
C IfxGeth_RxDescr3_WF_Bits | Bit Fields of RDES3 in Write back Format
C IfxGeth_RxDescrList | Rx Descriptor List
C IfxGeth_Rxdv_In | RXDV pin mapping structure
C IfxGeth_Rxer_In | RXER pin mapping structure
C IfxGeth_Txclk_In | TXCLK pin mapping structure
C IfxGeth_Txclk_Out | TXCLK pin mapping structure
C IfxGeth_TxContextDescr0_Bits | Bit Fields of TDES0 Context Descriptor
C IfxGeth_TxContextDescr1_Bits | Bit Fields of TDES1 Context Descriptor
C IfxGeth_TxContextDescr2_Bits | Bit Fields of TDES2 Context Descriptor
C IfxGeth_TxContextDescr3_Bits | Bit Fields of TDES3 Context Descriptor
C IfxGeth_Txctl_Out | TXCTL pin mapping structure
C IfxGeth_Txd_Out | TXD pin mapping structure
C IfxGeth_TxDescr | Tx Descriptor
C IfxGeth_TxDescr0 | TDES0
C IfxGeth_TxDescr0_RF_Bits | Bit Fields of TDES0 in Read Format
C IfxGeth_TxDescr0_WF_Bits | Bit Fields of TDES0 in Write-back Format
C IfxGeth_TxDescr1 | TDES1
C IfxGeth_TxDescr1_RF_Bits | Bit Fields of TDES1 in Read Format
C IfxGeth_TxDescr1_WF_Bits | Bit Fields of TDES1 in Write-back Format
C IfxGeth_TxDescr2 | TDES2
C IfxGeth_TxDescr2_RF_Bits | Bit Fields of TDES2 in Read Format
C IfxGeth_TxDescr2_WF_Bits | Bit Fields of TDES2 in Write-back Format
C IfxGeth_TxDescr3 | TDES3
C IfxGeth_TxDescr3_RF_Bits | Bit Fields of TDES3 in Read Format
C IfxGeth_TxDescr3_WF_Bits | Bit Fields of TDES3 in Write-back Format
C IfxGeth_TxDescrList | Tx Descriptor List
C IfxGeth_Txen_Out | TXEN pin mapping structure
C IfxGeth_Txer_Out | TXER pin mapping structure
C IfxGpt12_Capin_In | CAPIN pin mapping structure
C IfxGpt12_IncrEnc | Incremental encoder object
C IfxGpt12_IncrEnc_Config | Configuration structure for GPT12
C IfxGpt12_TxEud_In | TxEUD pin mapping structure
C IfxGpt12_TxIn_In | TxIN pin mapping structure
C IfxGpt12_TxOut_Out | TxOUT pin mapping structure
C IfxGtm_Atom_Dtm_PwmHl_Base | Multi-channels PWM object definition (channels only)
C IfxGtm_Atom_Dtm_PwmHl_Config | GTM ATOM: PWM HL configuration
C IfxGtm_Atom_Dtm_PwmHl_Mode | Structure for PWM configuration
C IfxGtm_Atom_Dtm_PwmHl_s | GTM ATOM PWM driver
C IfxGtm_Atom_Pwm_Config | Configuration structure
C IfxGtm_Atom_Pwm_Driver | Driver Handle
C IfxGtm_Atom_Pwm_Interrupt | Configuration structure for interrupts
C IfxGtm_Atom_Pwm_pin | Configuration structure for output pin
C IfxGtm_Atom_PwmHl_Base | Multi-channels PWM object definition (channels only)
C IfxGtm_Atom_PwmHl_Config | GTM ATOM: PWM HL configuration
C IfxGtm_Atom_PwmHl_Mode | Structure for PWM configuration
C IfxGtm_Atom_PwmHl_s | GTM ATOM PWM driver
C IfxGtm_Atom_Timer | TOM Timer interface
C IfxGtm_Atom_Timer_Base | Structure for the timer base
C IfxGtm_Atom_Timer_Config | Configuration structure for TOM Timer
C IfxGtm_Atom_ToutMap | ATOM TOUT pin mapping structure
C IfxGtm_Clk_Out | GTM Clock Output
C IfxGtm_Spe_ChannelOutputs | Output pattern structure
C IfxGtm_Spe_InputPattern | Struct describing the pattern of Input signal to the SPE submodule
C IfxGtm_Spe_OutputPattern | Output pattern to be given to the TOM output from given SPE. Union implementation can be read in word or individual channel output units
C IfxGtm_Spe_PatternSignal | Struct describing the individual input signals in the pattern
C IfxGtm_Tim_ChannelControl | Channel control
C IfxGtm_Tim_In | Driver Handle
C IfxGtm_Tim_In_Config | Configuration structure for TIM input capture
C IfxGtm_Tim_In_ConfigCapture | Configuration structure for TIM capture
C IfxGtm_Tim_In_ConfigFilter | Configuration structure for TIM filter
C IfxGtm_Tim_In_ConfigTimeout | Configuration structure for TIM timeout
C IfxGtm_Tim_InputSourceSelect |
C IfxGtm_Tim_Timer | Tim handle data structure
C IfxGtm_Tim_Timer_Config | Tim configuration data structure
C IfxGtm_Tim_TinMap | TIN pin mapping structure
C IfxGtm_Tom_Dtm_PwmHl_Base | Multi-channels PWM object definition (channels only)
C IfxGtm_Tom_Dtm_PwmHl_Config | GTM TOM: PWM HL configuration
C IfxGtm_Tom_Dtm_PwmHl_Mode | Structure for PWM configuration
C IfxGtm_Tom_Dtm_PwmHl_s | GTM TOM PWM driver
C IfxGtm_Tom_Pwm_Config | Configuration structure
C IfxGtm_Tom_Pwm_Driver | Driver Handle
C IfxGtm_Tom_Pwm_Interrupt | Configuration structure for interrupts
C IfxGtm_Tom_Pwm_pin | Configuration structure for output pin
C IfxGtm_Tom_PwmHl_Base | Multi-channels PWM object definition (channels only)
C IfxGtm_Tom_PwmHl_Config | GTM TOM: PWM HL configuration
C IfxGtm_Tom_PwmHl_Mode | Structure for PWM configuration
C IfxGtm_Tom_PwmHl_s | GTM TOM PWM driver
C IfxGtm_Tom_TGC | TOM TGC objects
C IfxGtm_Tom_Timer | TOM Timer interface Handle
C IfxGtm_Tom_Timer_Base | Structure for the timer base
C IfxGtm_Tom_Timer_Config | Configuration structure for TOM Timer
C IfxGtm_Tom_ToutMap | TOM TOUT pin mapping structure
C IfxGtm_Trig_AdcTrig_Channel |
C IfxGtm_Trig_AdcTrig_Source |
C IfxGtm_Trig_AdcTrig_Table |
C IfxGtm_Trig_AdcTrig_Trigger |
C IfxGtm_Trig_CanTrig_Channel |
C IfxGtm_Trig_CanTrig_Source |
C IfxGtm_Trig_CanTrig_Table |
C IfxGtm_Trig_CanTrig_Trigger |
C IfxGtm_Trig_MscTrig_Channel |
C IfxGtm_Trig_MscTrig_Set |
C IfxGtm_Trig_MscTrig_Source |
C IfxGtm_Trig_MscTrig_Table |
C IfxHssl_Hsct | HSCT module handle
C IfxHssl_Hsct_Config | Configuration structure of the HSCT module
C IfxHssl_Hssl | HSSL Handle
C IfxHssl_Hssl_AccessWindow | Structure for access windows
C IfxHssl_Hssl_Channel | Channel handle
C IfxHssl_Hssl_ChannelConfig | Configuration structure for channel
C IfxHssl_Hssl_Config | Configuration structure of the HSSL module
C IfxHssl_Hssl_errorFlags | Structure for error flags
C IfxI2c_I2c | Handler
C IfxI2c_I2c_Config | Structure to configure the Module
C IfxI2c_I2c_Device | Structure with slave device data
C IfxI2c_I2c_deviceConfig | Structure to configure the device's data structure
C IfxI2c_Pins | Pin Structure
C IfxI2c_Scl_InOut | SCL input mapping structure
C IfxI2c_Sda_InOut | SDA input mapping structure
C IfxIom_Driver | IOM driver
C IfxIom_Driver_Config | IOM Driver Configuration
C IfxIom_Driver_Lam | IOM LAM object
C IfxIom_Driver_LamConfig | IOM LAM configuration
C IfxIom_Driver_LamEventConfig | IOM LAM event configuration
C IfxIom_Driver_LamEventWindowConfig | IOM LAM event window configuration
C IfxIom_Driver_LamFilterConfig | IOM LAM filter configuration
C IfxIom_Driver_LamMonConfig | IOM LAM monitor input configuration
C IfxIom_Driver_LamRefConfig | IOM LAM reference input configuration
C IfxIom_Iom | Specifies handle to IOM module
C IfxIom_Iom_EcmConfig | Specifies the ECM block configuration structure
C IfxIom_Iom_EcmConfigCounter |
C IfxIom_Iom_EcmGlobalEventSelection | Event Combiner Module Global Event Selection
C IfxIom_Iom_EcmGlobalEventSelectionBits | Event Combiner Module Global Event Selection Bit Field
C IfxIom_Iom_FpcConfig | Specifies Filter and Prescaler Cell configuration
C IfxIom_Iom_LamConfig | Specifies Logic Analyser Module configuration
C IfxModule_IndexMap | Module address and index map
C IfxMsc_CxModeCommand | 64 bit commnd to be loaded first to DCE & then to DC for transmission
C IfxMsc_En_Out | EN pin mapping structure
C IfxMsc_Fcln_Out | FCLN pin mapping structure
C IfxMsc_Fclp_Out | FCLP pin mapping structure
C IfxMsc_Inj_In | INJ pin mapping structure
C IfxMsc_Msc | MSC base address data Structure
C IfxMsc_Msc_Abra | ABRA block Configuration Structure
C IfxMsc_Msc_Clock | Clock configuration data Structure
C IfxMsc_Msc_CommandExtensionConfig | Configuration Settings for CX mode
C IfxMsc_Msc_Config | MSC Module Configuration Structure
C IfxMsc_Msc_DownstreamControlConfig | Downstream Control Configuration Structure
C IfxMsc_Msc_DownstreamControlExtensionConfig | Downstream Control Extension Configuration Structure
C IfxMsc_Msc_en |
C IfxMsc_Msc_fcln |
C IfxMsc_Msc_fclp |
C IfxMsc_Msc_inj0 |
C IfxMsc_Msc_inj1 |
C IfxMsc_Msc_InterruptConfig | Interrupt Configuration Structure
C IfxMsc_Msc_Io | MSC Pin Configuration Structure
C IfxMsc_Msc_OutputControlConfig | Output Control Configuration Structure
C IfxMsc_Msc_sdi |
C IfxMsc_Msc_son |
C IfxMsc_Msc_sop |
C IfxMsc_Msc_UpstreamStatusConfig | Upstream Control Configuration Structure
C IfxMsc_Sdi_In | SDI pin mapping structure
C IfxMsc_Son_Out | SON pin mapping structure
C IfxMsc_Sop_Out | SOP pin mapping structure
C IfxMtu_MbistConfig |
C IfxMtu_MbistConfigPattern |
C IfxMtu_MbistSshConfig |
C IfxMtu_SramItem | Describes physical parameters of a SRAM memory
C IfxPms_Dcdcsync_Out | DCDC Sync pin mapping structure
C IfxPms_Hwcfg_In | Hardware Configuration pin mapping structure
C IfxPms_Wkp_In | Wakeup pin mapping structure
C IfxPmsEvr_checkRegConfig |
C IfxPmsEvr_initSequence |
C IfxPmsEvr_initSequencePhase |
C IfxPmsEvr_StepDownRegulatorRegConfig |
C IfxPmsPm_LoadJumpConfig | Options for Load Jump
C IfxPmsPm_SleepConfig | Configurable options for sleep mode
C IfxPmsPm_StandbyConfig | Configurable Standby options
C IfxPmsPm_VoltageDroopConfig | Volatge Droop Configuration
C IfxPmsPm_WakeupConfig | Configure Wakeup in standby mode
C IfxPort_Esr_Masks | Used by IfxPort_Esr_Masks table
C IfxPort_Io_Config |
C IfxPort_Io_ConfigPin |
C IfxPort_LvdsConfig | To Configure LVDS mode
C IfxPort_Pin | Defines a pin
C IfxPort_Pin_Config | To configure pins
C IfxPsi5_Psi5 | PSI5 handle data structure
C IfxPsi5_Psi5_Channel | Channel handle data structure
C IfxPsi5_Psi5_ChannelConfig | Channel configuration structure
C IfxPsi5_Psi5_ChannelTrigger | Channel trigger configuration structure
C IfxPsi5_Psi5_Clock | Clock configuration data structure
C IfxPsi5_Psi5_Config | PSI5 module configuration structure
C IfxPsi5_Psi5_Frame | Psi5 frame data union
C IfxPsi5_Psi5_FrameData | Psi5 frame data structure with individual members
C IfxPsi5_Psi5_InputOutputControl | Input output configuration structure
C IfxPsi5_Psi5_Message | Psi5 serial message with individual members
C IfxPsi5_Psi5_PinsConfig | Pin Configuration structure
C IfxPsi5_Psi5_PulseGeneration | Sync pulse generation configuration structure
C IfxPsi5_Psi5_Rdm | Psi5 frame in double word format
C IfxPsi5_Psi5_Rds | Psi5 serial message as unsigned 32 bit value
C IfxPsi5_Psi5_ReceiveControl | Receive control configuration structure
C IfxPsi5_Psi5_SerialMessage | Psi5 serial message data structure
C IfxPsi5_Psi5_StartupOptions | Startup related options TBD
C IfxPsi5_Psi5_TimeStampConfig | Timestamp configuration data structure
C IfxPsi5_Psi5_TransmitControl | Transmit control configuration structure
C IfxPsi5_Rx_In | RX pin mapping structure
C IfxPsi5_Tx_Out | TX pin mapping structure
C IfxPsi5s_Clk_Out | CLK pin mapping structure
C IfxPsi5s_Psi5s | PSI5S handle data structure
C IfxPsi5s_Psi5s_AscConfig | PSI5S module configuration structure
C IfxPsi5s_Psi5s_Channel | Channel handle data structure
C IfxPsi5s_Psi5s_ChannelConfig | Channel configuration structure
C IfxPsi5s_Psi5s_ChannelTrigger | Channel trigger configuration structure
C IfxPsi5s_Psi5s_Clock | Clock configuration data structure
C IfxPsi5s_Psi5s_Config | PSI5S module configuration structure
C IfxPsi5s_Psi5s_Frame | Psi5s frame data structure
C IfxPsi5s_Psi5s_GlobalControlConfig | PSI5S global control configuration structure
C IfxPsi5s_Psi5s_Pins | Structure for PSI5S pin configuration
C IfxPsi5s_Psi5s_PulseGeneration | Sync pulse generation configuration structure
C IfxPsi5s_Psi5s_ReceiveControl | Receive control configuration structure - covers control fields from RCRA, RCRB and NFC registers
C IfxPsi5s_Psi5s_ReceiveData | "Received data" data structure
C IfxPsi5s_Psi5s_ReceivedBits | Received individual bits
C IfxPsi5s_Psi5s_ReceivedData | Receive data structure with different segments of data
C IfxPsi5s_Psi5s_ReceiveStatus | Receiver status data structure
C IfxPsi5s_Psi5s_ReceiveTimestamp | Receiver timestamp data structure
C IfxPsi5s_Psi5s_Timestamp | Received timestamp contents structure
C IfxPsi5s_Psi5s_TimeStampConfig | Timestamp configuration data structure
C IfxPsi5s_Psi5s_TransmitControl | Transmit control configuration structure
C IfxPsi5s_Rx_In | RX pin mapping structure
C IfxPsi5s_Tx_Out | TX pin mapping structure
C IfxQspi_DelayConst | Structure holding the "pre" and "delay" values. To be populated into BACON register after delay calculation
C IfxQspi_Hsicin_In | HSICIN pin mapping structure
C IfxQspi_Mrst_In | MRST pin mapping structure
C IfxQspi_Mrst_Out | MRST pin mapping structure
C IfxQspi_Mtsr_In | MTSR pin mapping structure
C IfxQspi_Mtsr_Out | MTSR pin mapping structure
C IfxQspi_Sclk_In | SCLK pin mapping structure
C IfxQspi_Sclk_Out | SCLK pin mapping structure
C IfxQspi_Slsi_In | SLSI pin mapping structure
C IfxQspi_Slso_Out | SLSO pin mapping structure
C IfxQspi_SpiMaster | Module handle data structure
C IfxQspi_SpiMaster_Channel_s | Module Channel handle structure
C IfxQspi_SpiMaster_ChannelConfig | Module Channel configuration structure
C IfxQspi_SpiMaster_Config | Module configuration structure
C IfxQspi_SpiMaster_Dma | Dma handle
C IfxQspi_SpiMaster_DmaConfig | Dma configuration
C IfxQspi_SpiMaster_ErrorFlags | Qspi Master Mode Error Flags
C IfxQspi_SpiMaster_Input | SLSI pin configuration structure
C IfxQspi_SpiMaster_InputOutput | Union of Slave Select pins
C IfxQspi_SpiMaster_MoveCounterControl |
C IfxQspi_SpiMaster_Output | SLSO pin configuration structure
C IfxQspi_SpiMaster_Pins | Master pin IO configuration structure
C IfxQspi_SpiSlave | Module handle data structure
C IfxQspi_SpiSlave_Config | Module configuration structure
C IfxQspi_SpiSlave_Dma | Dma handle
C IfxQspi_SpiSlave_DmaConfig | Dma configuration
C IfxQspi_SpiSlave_ErrorFlags | Qspi Slave Mode Error Flags
C IfxQspi_SpiSlave_Pins | Slave pin IO configuration structure
C IfxQspi_SpiSlave_Protocol | Configures the SPI Protocol
C IfxScu_Dcdcsync_Out | DCDC Sync pin mapping structure
C IfxScu_Emgstop_In | Emergency Stop pin mapping structure
C IfxScu_Evrwup_In | EVR Wakeup pin mapping structure
C IfxScu_Extclk_Out | External Clock pin mapping structure
C IfxScu_Req_In | External Request pin mapping structure
C IfxScu_Wdtlck_Out | Watchdog Timer Lock pin mapping structure
C IfxScuCcu_CcuconRegConfig | Configuration structure type for CCUCON registers
C IfxScuCcu_ClockDistributionConfig | Configuration structure type for all the CCUCON registers to configure clock distribution
C IfxScuCcu_Config | Configuration structure SCU module
C IfxScuCcu_FlashWaitstateConfig | Configuration structure type for the Flash waitstate configuration
C IfxScuCcu_InitialStepConfig | Configuration structure type for the Pll Initial Step Configuration
C IfxScuCcu_Mod_Config | Modulation config
C IfxScuCcu_PerPllConfig | Configuration structure type for the Per Pll step. This structure must be used to configure the P, N and K2, K3 dividers
C IfxScuCcu_pllsParameterConfig | Configuration structure type for the Pll Parameters
C IfxScuCcu_PllStepConfig | Configuration structure type for the Pll Steps for current jump control
C IfxScuCcu_PllThrottleConfig |
C IfxScuCcu_RGain_Values | Structure holding the RGain parameters for modulation
C IfxScuCcu_SysPllConfig | Configuration structure type for the Pll initial step. This structure must be used to configure the P, N and K2 dividers for initial step
C IfxScuLbist_MultiTriggerConfig |
C IfxScuLbist_ParameterSet | Configuration data structure for the LBIST parameters
C IfxScuRcu_ResetCode |
C IfxScuWdt_Config | Configuration structure for Scu Watchdog. IfxScuWdt_Config is a type describing configuration structure of CPU and Safety WDT registers defined in IfxScuWdt.h file
C IfxSent_Sent | Specifies SENT handle structure
C IfxSent_Sent_Channel | Specifies the SENT Channel handle structure
C IfxSent_Sent_ChannelConfig | Specifies the SENT Channel configuration structure
C IfxSent_Sent_Config | Specifies the SENT module configuration structure
C IfxSent_Sent_Enable | Specifies the Interrupt type enables structure
C IfxSent_Sent_EnabledInterrupts | Specifies interrupt flags union . In addition it allows to write and read to/from all flags as once via the ALL member
C IfxSent_Sent_Frame | Specifies the frame configuration structure for a channel
C IfxSent_Sent_In | SENT pin mapping structure
C IfxSent_Sent_InputOutputControl | Specifies the input output control properties
C IfxSent_Sent_Interrupt | Specifies the interrupt control properties
C IfxSent_Sent_InterruptNodeControl | Specifies the interrupt control properties structure
C IfxSent_Sent_NibbleControl | Specifies the received nibbles control properties
C IfxSent_Sent_Pins | Specifies the pins configuration for SENT channel
C IfxSent_Sent_ReceiveControl | Specifies the receive control properties
C IfxSent_Sent_SerialMessageFrame | Specifies received message frame
C IfxSent_Sent_TransmitControl | Specifies the SPC channel properties structure
C IfxSent_Spc_Out | SPC pin mapping structure
C IfxSmu_Fsp_Out | Fault Signal Protocol Pin
C IfxSmu_Smu_AlarmGlobalConfiguration | Alarm Global Configuration
C IfxSmu_Smu_Config |
C IfxSmu_Smu_FaultSignalingProtocol | FSP configuration
C IfxSmu_Smu_RecoveryTimerAlarmConfiguration | Recovery Timer/s Alarm Configuration
C IfxSmu_Smu_RecoveryTimerConfig | Recovery Timer Configuration
C IfxStdIf_DPipe_ | Standard interface object
C IfxStdIf_Pos_ | Standard interface object
C IfxStdIf_Pos_Config | Position interface configuration
C IfxStdIf_Pos_Status | Position sensor status definition
C IfxStdIf_Pos_Status.B |
C IfxStdIf_PwmHl_ | Standard interface object
C IfxStdIf_PwmHl_Config | Multi-channels PWM object configuration
C IfxStdIf_Timer_ | Standard interface object
C IfxStdIf_Timer_Config | Timer configuration
C IfxStdIf_Timer_TrigConfig | Trigger configuration
C IfxStm_CompareConfig | Comparator Configuration Structure
C IfxStm_Timer | Timer interface
C IfxStm_Timer_Base | Structure for the timer base
C IfxStm_Timer_Config | Configuration structure for Timer
C PwmHl_Config | Configuration structure of the TPwm interface
C PwmHl_Functions |
C PwmHl_s | Structure of the TPwm interface
C Spi_ErrorChecks |
C SpiIf_ |
C SpiIf_Ch_ |
C SpiIf_ChConfig_ |
C SpiIf_ChMode |
C SpiIf_Config |
C SpiIf_Flags |
C SpiIf_funcs |
C SpiIf_Job |
C Timer_Config | Configuration structure of the Timer interface
C Timer_Functions |
C Timer_s | Structure of the Timer interface
C TPwm_Config | Configuration structure of the TPwm interface
C TPwm_Functions |
C TPwm_s | Structure of the TPwm interface


iLLD_TC38A: Ifx_Types.h File Reference

  • Cpu
  • Std
Data Structures | Macros | Typedefs | Enumerations
Ifx_Types.h File Reference

This files defines all types used by the IFX HAL and libraries. More...

#include "Tricore/Compilers/Compilers.h"
#include "Platform_Types.h"
Include dependency graph for Ifx_Types.h:

Go to the source code of this file.

Data Structures

struct | cfloat32
struct | csint32
struct | csint16
struct | Ifx_CircularBuffer
Circular buffer definition. More...
struct | Ifx_IsrSetting
struct | IfxModule_IndexMap
Module address and index map. More...
struct | Ifx_DataBufferMode_TimeStampSingle
struct | cfract
struct | csfract

Macros

#define | TIME_INFINITE ((Ifx_TickTime)0x7FFFFFFFFFFFFFFFLL)
#define | TIME_NULL ((Ifx_TickTime)0x0000000000000000LL)
#define | IFX_ONES (0xFFFFFFFFFFFFFFFFU)
#define | IFX_ZEROS (0x0000000000000000U)
#define | IFX_SIZET_MAX (0x7FFF)
#define | IFX_PI (3.1415926535897932384626433832795f)
#define | IFX_TWO_OVER_PI (2.0 / IFX_PI)
#define | IFX_ONE_OVER_SQRT_THREE (0.57735026918962576450914878050196f)
#define | IFX_SQRT_TWO (1.4142135623730950488016887242097f)
#define | IFX_SQRT_THREE (1.7320508075688772935274463415059f)
#define | IFX_UNUSED_PARAMETER(x) if(x){}
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(but function signature maintained for legacy purposes). Another use case being usage of intrinsics wherein the compiler ignores it and copy pastes the statements using intrinsics directly to the object file and hence usage of arguments isn't visible to it.(eg: __mfcr() etc) More...

Typedefs

typedef const char * | pchar
const char pointer More...
typedef void * | pvoid
void pointer More...
typedef volatile void * | vvoid
volatile void pointer More...
typedef void(* | voidfuncvoid) (void)
void pointer which takes void argument More...
typedef sint64 | Ifx_TickTime
Time in ticks. More...
typedef sint16 | Ifx_SizeT
Type used for data stream size. More...
typedef uint16 | Ifx_Priority
Used in interrupt service priorities. More...
typedef uint32 | Ifx_TimerValue
Used in timer values. More...
typedef sint32 | Ifx_SignedTimerVal
Used in signed timer values. More...
typedef pvoid | Ifx_AddressValue
Used in address values. More...

Enumerations

enum Ifx_ActiveState {
Ifx_ActiveState_low = 0,
Ifx_ActiveState_high = 1
}
Signal active state definition. More...
enum Ifx_ParityMode {
Ifx_ParityMode_even = 0,
Ifx_ParityMode_odd = 1
}
enum Ifx_RxSel {
Ifx_RxSel_a,
Ifx_RxSel_b,
Ifx_RxSel_c,
Ifx_RxSel_d,
Ifx_RxSel_e,
Ifx_RxSel_f,
Ifx_RxSel_g,
Ifx_RxSel_h
}
input multiplexer definition used in PinMaps More...
enum Ifx_DataBufferMode {
Ifx_DataBufferMode_normal = 0,
Ifx_DataBufferMode_timeStampSingle
}
enum Ifx_Pwm_Mode {
Ifx_Pwm_Mode_centerAligned = 0,
Ifx_Pwm_Mode_centerAlignedInverted = 1,
Ifx_Pwm_Mode_leftAligned = 2,
Ifx_Pwm_Mode_rightAligned = 3,
Ifx_Pwm_Mode_off = 4,
Ifx_Pwm_Mode_init = 5,
Ifx_Pwm_Mode_count
}

Detailed Description

This files defines all types used by the IFX HAL and libraries.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_Types.h.

Data Structure Documentation

◆ cfloat32

struct cfloat32

Definition at line 58 of file Ifx_Types.h.

Data Fields
float32 | imag | Imaginary part.
float32 | real | Real part.

◆ csint32

struct csint32

Definition at line 64 of file Ifx_Types.h.

Data Fields
sint32 | imag | Imaginary part.
sint32 | real | Real part.

◆ csint16

struct csint16

Definition at line 70 of file Ifx_Types.h.

Data Fields
sint16 | imag | Imaginary part.
sint16 | real | Real part.

◆ Ifx_CircularBuffer

struct Ifx_CircularBuffer

Circular buffer definition.

Definition at line 93 of file Ifx_Types.h.

Data Fields
void * | base | buffer base address
uint16 | index | buffer current index
uint16 | length | buffer length

◆ Ifx_IsrSetting

struct Ifx_IsrSetting

Definition at line 106 of file Ifx_Types.h.

Data Fields
uint16 | priority
uint16 | provider

◆ IfxModule_IndexMap

struct IfxModule_IndexMap

Module address and index map.

Definition at line 140 of file Ifx_Types.h.

Data Fields
sint32 | index | Module index.
volatile void * | module | Module address.

◆ Ifx_DataBufferMode_TimeStampSingle

struct Ifx_DataBufferMode_TimeStampSingle

Definition at line 146 of file Ifx_Types.h.

Data Fields
uint8 | data
Ifx_TickTime | timestamp

◆ cfract

struct cfract

Definition at line 205 of file Ifx_Types.h.

Data Fields
fract | imag | Imaginary part.
fract | real | Real part.

◆ csfract

struct csfract

Definition at line 211 of file Ifx_Types.h.

Data Fields
sfract | imag | Imaginary part.
sfract | real | Real part.

Macro Definition Documentation

◆ IFX_ONE_OVER_SQRT_THREE

#define IFX_ONE_OVER_SQRT_THREE (0.57735026918962576450914878050196f)

Definition at line 219 of file Ifx_Types.h.

◆ IFX_ONES

#define IFX_ONES (0xFFFFFFFFFFFFFFFFU)

Definition at line 80 of file Ifx_Types.h.

◆ IFX_PI

#define IFX_PI (3.1415926535897932384626433832795f)

Definition at line 217 of file Ifx_Types.h.

Referenced by Ifx_AngleTrkF32_bound(), Ifx_AngleTrkF32_getAbsolutePosition(), Ifx_AngleTrkF32_init(), Ifx_AngleTrkF32_initConfig(), Ifx_AngleTrkF32_update(), Ifx_FftF32_generateTwiddleFactor(), Ifx_LutAtan2F32_float32(), Ifx_LutSincosF32_init(), IfxGpt12_IncrEnc_getAbsolutePosition(), IfxGpt12_IncrEnc_init(), IfxGpt12_IncrEnc_initConfig(), IfxGpt12_IncrEnc_setRefreshPeriod(), IfxStdIf_Pos_initConfig(), IfxStdIf_Pos_radsToRpm(), and IfxStdIf_Pos_rpmToRads().

◆ IFX_SIZET_MAX

#define IFX_SIZET_MAX (0x7FFF)

Definition at line 88 of file Ifx_Types.h.

Referenced by Ifx_Fifo_init().

◆ IFX_SQRT_THREE

#define IFX_SQRT_THREE (1.7320508075688772935274463415059f)

Definition at line 221 of file Ifx_Types.h.

◆ IFX_SQRT_TWO

#define IFX_SQRT_TWO (1.4142135623730950488016887242097f)

Definition at line 220 of file Ifx_Types.h.

◆ IFX_TWO_OVER_PI

#define IFX_TWO_OVER_PI (2.0 / IFX_PI)

Definition at line 218 of file Ifx_Types.h.

◆ IFX_UNUSED_PARAMETER

#define IFX_UNUSED_PARAMETER ( x ) if(x){}

Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(but function signature maintained for legacy purposes). Another use case being usage of intrinsics wherein the compiler ignores it and copy pastes the statements using intrinsics directly to the object file and hence usage of arguments isn't visible to it.(eg: __mfcr() etc)

Definition at line 222 of file Ifx_Types.h.

Referenced by Ifx_AngleTrkF32_bound(), Ifx_AngleTrkF32_getSensorType(), IfxCan_Node_getDataLengthFromCode(), IfxCan_Node_setDataLengthCode(), IfxCan_Node_setErrorStateIndicator(), IfxCan_Node_setFrameModeRequest(), IfxCan_Node_setMesssageId(), IfxCan_Node_setRemoteTransmitRequest(), IfxCan_Node_setTxEventFifoControl(), IfxCan_Node_writeData(), IfxCcu6_PwmHl_setOutputPins(), IfxCcu6_PwmHl_updateOff(), IfxCcu6_TimerWithTrigger_disableUpdate(), IfxCpu_updatePerformanceCounter(), IfxDma_getErrPointer(), IfxDma_getSrcPointer(), IfxEdsadc_getAuxSrc(), IfxEdsadc_getMainSrc(), IfxEdsadc_getModulatorInputClockFreq(), IfxEdsadc_setCommonModeVoltage(), IfxEray_setNewDataInterruptDestination(), IfxEvadc_Adc_getModuleConfig(), IfxEvadc_disableInputBuffer(), IfxEvadc_disablePostCalibration(), IfxEvadc_disableReferencePrecharge(), IfxEvadc_enableInputBuffer(), IfxEvadc_enableReferencePrecharge(), IfxEvadc_getAdcDigitalFrequency(), IfxEvadc_getAdcModuleFrequency(), IfxEvadc_initialiseAdcConverterClock(), IfxEvadc_selectDoubleClockForMSBConversion(), IfxEvadc_selectIdlePrechargeLevel(), IfxEvadc_setAnalogClockSynchronizationDelay(), IfxEvadc_setCalibrationSampleTime(), IfxEvadc_setReferencePrechargeDuration(), IfxEvadc_setSampleSynchronizationMode(), IfxFce_getSrcPointer(), IfxFlash_clearStatus(), IfxFlash_disableWriteProtection(), IfxFlash_loadPage(), IfxFlash_loadPage2X32(), IfxFlash_resetToRead(), IfxFlash_resumeProtection(), IfxGeth_Eth_setupMiiOutputPins(), IfxGeth_Eth_setupRgmiiOutputPins(), IfxGeth_Eth_setupRmiiOutputPins(), IfxGeth_Eth_writeHeader(), IfxGeth_getSrcPointer(), IfxGpt12_getCaptureSrc(), IfxGpt12_getModuleFrequency(), IfxGpt12_IncrEnc_getPeriodPerRotation(), IfxGpt12_IncrEnc_getSensorType(), IfxGpt12_T2_getSrc(), IfxGpt12_T3_getSrc(), IfxGpt12_T4_getSrc(), IfxGpt12_T5_getSrc(), IfxGpt12_T6_getSrc(), IfxGtm_Atom_Ch_getSrcPointer(), IfxGtm_Atom_Dtm_PwmHl_setupChannels(), IfxGtm_Atom_Dtm_PwmHl_updateAndShiftOff(), IfxGtm_Atom_Dtm_PwmHl_updateOff(), IfxGtm_Atom_Dtm_PwmHl_updatePulseOff(), IfxGtm_Atom_PwmHl_setupChannels(), IfxGtm_Atom_PwmHl_updateAndShiftOff(), IfxGtm_Atom_PwmHl_updateOff(), IfxGtm_Atom_PwmHl_updatePulseOff(), IfxGtm_Dpll_getSubIncFrequency(), IfxGtm_Tim_Ch_getSrcPointer(), IfxGtm_Tim_Timer_initChannelConfig(), IfxGtm_Tom_Ch_getSrcPointer(), IfxGtm_Tom_Dtm_PwmHl_setupChannels(), IfxGtm_Tom_Dtm_PwmHl_updateAndShiftOff(), IfxGtm_Tom_Dtm_PwmHl_updateOff(), IfxGtm_Tom_Dtm_PwmHl_updatePulseOff(), IfxGtm_Tom_PwmHl_setupChannels(), IfxGtm_Tom_PwmHl_updateAndShiftOff(), IfxGtm_Tom_PwmHl_updateOff(), IfxGtm_Tom_PwmHl_updatePulseOff(), IfxHssl_getHsctSrcPointer(), IfxHssl_getHsslCOKSrcPointer(), IfxHssl_getHsslERRSrcPointer(), IfxHssl_getHsslEXISrcPointer(), IfxHssl_getHsslRDISrcPointer(), IfxHssl_getHsslTRGSrcPointer(), IfxHssl_Hssl_delay(), IfxIom_getFrequency(), IfxMsc_downstreamFractionalBaudCalculator(), IfxMsc_downstreamNormalBaudCalculator(), IfxPmsPm_continueStandbySequenceInRAM(), IfxPort_setGroupModeOutput(), IfxPsi5_getSrcPointer(), IfxPsi5_Psi5_startupChannel(), IfxPsi5s_getSrcAddress(), IfxQspi_calculateBasicConfigurationValue(), IfxQspi_calculateExtendedConfigurationValue(), IfxQspi_calculateTimeQuantumLength(), IfxQspi_enableLoopbackMode(), IfxQspi_getModuleFrequency(), IfxStdIf_PwmHl_setupChannels(), and IfxStm_getFrequency().

◆ IFX_ZEROS

#define IFX_ZEROS (0x0000000000000000U)

Definition at line 81 of file Ifx_Types.h.

Referenced by IfxGtm_Atom_Ch_setNotification(), and IfxGtm_Tom_Ch_setNotification().

◆ TIME_INFINITE

#define TIME_INFINITE ((Ifx_TickTime)0x7FFFFFFFFFFFFFFFLL)

Definition at line 77 of file Ifx_Types.h.

Referenced by addTTime(), getDeadLine(), getTimeout(), Ifx_Console_print(), Ifx_Console_printAlign(), IfxAsclin_Asc_blockingRead(), IfxAsclin_Asc_blockingWrite(), IfxStdIf_DPipe_print(), IfxStm_getDeadLine(), IfxStm_isDeadLine(), IfxStm_now(), isDeadLine(), now(), and nowWithoutCriticalSection().

◆ TIME_NULL

#define TIME_NULL ((Ifx_TickTime)0x0000000000000000LL)

Definition at line 78 of file Ifx_Types.h.

Referenced by Ifx_Shell_process(), IfxAsclin_Asc_initiateTransmission(), IfxAsclin_Asc_isrReceive(), and IfxAsclin_Asc_isrTransmit().

Typedef Documentation

◆ Ifx_AddressValue

typedef pvoid Ifx_AddressValue

Used in address values.

Definition at line 104 of file Ifx_Types.h.

◆ Ifx_Priority

typedef uint16 Ifx_Priority

Used in interrupt service priorities.

Definition at line 100 of file Ifx_Types.h.

◆ Ifx_SignedTimerVal

typedef sint32 Ifx_SignedTimerVal

Used in signed timer values.

Definition at line 102 of file Ifx_Types.h.

◆ Ifx_SizeT

typedef sint16 Ifx_SizeT

Type used for data stream size.

Definition at line 89 of file Ifx_Types.h.

◆ Ifx_TickTime

typedef sint64 Ifx_TickTime

Time in ticks.

Definition at line 76 of file Ifx_Types.h.

◆ Ifx_TimerValue

typedef uint32 Ifx_TimerValue

Used in timer values.

Definition at line 101 of file Ifx_Types.h.

◆ pchar

typedef const char* pchar

const char pointer

Definition at line 53 of file Ifx_Types.h.

◆ pvoid

typedef void* pvoid

void pointer

Definition at line 54 of file Ifx_Types.h.

◆ voidfuncvoid

typedef void(* voidfuncvoid) (void)

void pointer which takes void argument

Definition at line 56 of file Ifx_Types.h.

◆ vvoid

typedef volatile void* vvoid

volatile void pointer

Definition at line 55 of file Ifx_Types.h.

Enumeration Type Documentation

◆ Ifx_ActiveState

enum Ifx_ActiveState

Signal active state definition.

Enumerator
Ifx_ActiveState_low | The signal is low active.
Ifx_ActiveState_high | The signal is high active.

Definition at line 113 of file Ifx_Types.h.

◆ Ifx_DataBufferMode

enum Ifx_DataBufferMode
Enumerator
Ifx_DataBufferMode_normal | normal mode, each received byte is moved to the rx fifo
Ifx_DataBufferMode_timeStampSingle | Single byte type stamp mode. The rx fifo is filled in with Ifx_DataBufferMode_TimeStampSingle items.

Definition at line 161 of file Ifx_Types.h.

◆ Ifx_ParityMode

enum Ifx_ParityMode
Enumerator
Ifx_ParityMode_even
Ifx_ParityMode_odd

Definition at line 119 of file Ifx_Types.h.

◆ Ifx_Pwm_Mode

enum Ifx_Pwm_Mode

Defines the PWM modes

The 1st member shall start with value 0, and the next members value shall be the previous member +1 pwmMode_off shall be the member with the higher index

Note
enum order and values should not be modified, except Ifx_Pwm_Mode_init and Ifx_Pwm_Mode_count
Enumerator
Ifx_Pwm_Mode_centerAligned | Center aligned mode.
Ifx_Pwm_Mode_centerAlignedInverted | Center aligned inverted aligned mode.
Ifx_Pwm_Mode_leftAligned | Left aligned mode. The PWM period starts with a rising edge.
Ifx_Pwm_Mode_rightAligned | Right aligned mode. The PWM period starts with a falling edge.
Ifx_Pwm_Mode_off | All switch open.
Ifx_Pwm_Mode_init | Initialisation mode, do not use at run time.
Ifx_Pwm_Mode_count | Number of defined modes.

Definition at line 175 of file Ifx_Types.h.

◆ Ifx_RxSel

enum Ifx_RxSel

input multiplexer definition used in PinMaps

Enumerator
Ifx_RxSel_a
Ifx_RxSel_b
Ifx_RxSel_c
Ifx_RxSel_d
Ifx_RxSel_e
Ifx_RxSel_f
Ifx_RxSel_g
Ifx_RxSel_h

Definition at line 127 of file Ifx_Types.h.


iLLD_TC38A: Icu.h File Reference

  • Service
  • CpuGeneric
  • If
  • Ccu6If
Data Structures | Typedefs
Icu.h File Reference

ICU interface. More...

#include "Cpu/Std/Ifx_Types.h"
Include dependency graph for Icu.h:

Go to the source code of this file.

Data Structures

struct | Icu_Functions
struct | Icu_s
Structure of the Icu interface. More...
struct | Icu_Config
Configuration structure of the Icu interface. More...

Typedefs

typedef struct Icu_s | Icu
typedef void(* | Icu_StartCapture) (Icu *handle)
typedef void(* | Icu_StopCapture) (Icu *handle)
typedef void(* | Icu_GetTimeStamp) (Icu *handle)

Detailed Description

ICU interface.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-27 20:08:18 GMT
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Icu.h.

Data Structure Documentation

◆ Icu_Functions

struct Icu_Functions

Definition at line 55 of file Icu.h.

Collaboration diagram for Icu_Functions:
[legend]
Data Fields
Icu_GetTimeStamp | getTimeStamp
Icu_StartCapture | startCapture
Icu_StopCapture | stopCapture

◆ Icu_s

struct Icu_s

Structure of the Icu interface.

Definition at line 63 of file Icu.h.

Data Fields
float32 frequency dummy member to avoid error

◆ Icu_Config

struct Icu_Config

Configuration structure of the Icu interface.

Definition at line 72 of file Icu.h.

Data Fields
float32 frequency dummy member to avoid error

Typedef Documentation

◆ Icu

typedef struct Icu_s Icu

Definition at line 50 of file Icu.h.

◆ Icu_GetTimeStamp

typedef void(* Icu_GetTimeStamp) (Icu *handle)

Definition at line 53 of file Icu.h.

◆ Icu_StartCapture

typedef void(* Icu_StartCapture) (Icu *handle)

Definition at line 51 of file Icu.h.

◆ Icu_StopCapture

typedef void(* Icu_StopCapture) (Icu *handle)

Definition at line 52 of file Icu.h.


iLLD_TC38A: Ifx_Crc.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Data Structures | Macros | Functions
Ifx_Crc.h File Reference

CRC algorithm. More...

#include "Cpu/Std/Ifx_Types.h"
Include dependency graph for Ifx_Crc.h:

Go to the source code of this file.

Data Structures

struct | Ifc_Crc_Table
struct | Ifc_Crc_Table8
struct | Ifc_Crc_Table16
struct | Ifc_Crc_Table32
struct | Ifc_Crc

Macros

#define CRC_ENABLE_DPIPE 0

Functions

boolean | Ifx_Crc_init (Ifc_Crc *driver, const Ifc_Crc_Table *table, sint32 direct, sint32 refout, uint32 crcinit, uint32 crcxor)
boolean | Ifx_Crc_createTable (Ifc_Crc_Table *table, sint32 order, uint32 polynom, sint32 refin)
uint32 | Ifx_Crc_tableFast (Ifc_Crc *driver, uint8 *p, uint32 len)
uint32 | Ifx_Crc_table (Ifc_Crc *driver, uint8 *p, uint32 len)
uint32 | Ifx_Crc_bitByBit (Ifc_Crc *driver, uint8 *p, uint32 len)
uint32 | Ifx_Crc_bitByBitFast (Ifc_Crc *driver, uint8 *p, uint32 len)

Detailed Description

CRC algorithm.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_Crc.h.

Data Structure Documentation

◆ Ifc_Crc_Table

struct Ifc_Crc_Table

Definition at line 59 of file Ifx_Crc.h.

Data Fields
uint32 | crchighbit
uint32 | crcmask
sint32 | order
uint32 | polynom
sint32 | refin

◆ Ifc_Crc_Table8

struct Ifc_Crc_Table8

Definition at line 67 of file Ifx_Crc.h.

Collaboration diagram for Ifc_Crc_Table8:
[legend]
Data Fields
uint8 | crctab[256] | CRC Table, must be 2st member of the struct.
Ifc_Crc_Table | data | CRC data, must be 1st member of the struct.

◆ Ifc_Crc_Table16

struct Ifc_Crc_Table16

Definition at line 73 of file Ifx_Crc.h.

Collaboration diagram for Ifc_Crc_Table16:
[legend]
Data Fields
uint16 | crctab[256] | CRC Table, must be 2st member of the struct.
Ifc_Crc_Table | data | CRC data, must be 1st member of the struct.

◆ Ifc_Crc_Table32

struct Ifc_Crc_Table32

Definition at line 79 of file Ifx_Crc.h.

Collaboration diagram for Ifc_Crc_Table32:
[legend]
Data Fields
uint32 | crctab[256] | CRC Table, must be 2st member of the struct.
Ifc_Crc_Table | data | CRC data, must be 1st member of the struct.

◆ Ifc_Crc

struct Ifc_Crc

Definition at line 85 of file Ifx_Crc.h.

Collaboration diagram for Ifc_Crc:
[legend]
Data Fields
uint32 | crcinit_direct
uint32 | crcinit_nondirect
uint32 | crcxor
sint32 | refout
const Ifc_Crc_Table * | table

Macro Definition Documentation

◆ CRC_ENABLE_DPIPE

#define CRC_ENABLE_DPIPE 0

Definition at line 52 of file Ifx_Crc.h.


iLLD_TC38A: Ifx_AngleTrkF32.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Data Structures | Macros | Functions
Ifx_AngleTrkF32.h File Reference

Angle-tracking observer for sin/cos analog position sensor. More...

#include "StdIf/IfxStdIf_Pos.h"
#include "SysSe/Math/Ifx_LowPassPt1F32.h"
Include dependency graph for Ifx_AngleTrkF32.h:

Go to the source code of this file.

Data Structures

struct | Ifx_AngleTrkF32_Config
Angle Tracking Observer configuration. More...
struct | Ifx_AngleTrkF32_CfgData
struct | Ifx_AngleTrkF32_PosIf
struct | Ifx_AngleTrkF32
Angle Tracking Observer object. More...

Macros

#define | IFX_CFG_ANGLETRKF32_SPEED_FILTER (1)
#define | IFX_CFG_ANGLETRKF32_FILTERED_SPEED (1)
Specify whether the speed reading is filtered by low-pass filter or not. More...

Functions

IFX_EXTERN float32 | Ifx_AngleTrkF32_getAbsolutePosition (Ifx_AngleTrkF32 *driver)
IFX_EXTERN IfxStdIf_Pos_Dir | Ifx_AngleTrkF32_getDirection (Ifx_AngleTrkF32 *driver)
IFX_EXTERN IfxStdIf_Pos_Status | Ifx_AngleTrkF32_getFault (Ifx_AngleTrkF32 *driver)
IFX_EXTERN sint32 | Ifx_AngleTrkF32_getOffset (Ifx_AngleTrkF32 *driver)
IFX_EXTERN uint16 | Ifx_AngleTrkF32_getPeriodPerRotation (Ifx_AngleTrkF32 *driver)
IFX_EXTERN float32 | Ifx_AngleTrkF32_getPosition (Ifx_AngleTrkF32 *driver)
IFX_EXTERN IfxStdIf_Pos_RawAngle | Ifx_AngleTrkF32_getRawPosition (Ifx_AngleTrkF32 *aObsv)
Returns the actual position. More...
IFX_EXTERN float32 | Ifx_AngleTrkF32_getRefreshPeriod (Ifx_AngleTrkF32 *driver)
IFX_EXTERN sint32 | Ifx_AngleTrkF32_getResolution (Ifx_AngleTrkF32 *driver)
IFX_EXTERN sint32 | Ifx_AngleTrkF32_getTurn (Ifx_AngleTrkF32 *driver)
IFX_EXTERN IfxStdIf_Pos_SensorType | Ifx_AngleTrkF32_getSensorType (Ifx_AngleTrkF32 *driver)
IFX_EXTERN float32 | Ifx_AngleTrkF32_getSpeed (Ifx_AngleTrkF32 *aObsv)
Returns the Speed. More...
IFX_EXTERN void | Ifx_AngleTrkF32_reset (Ifx_AngleTrkF32 *driver)
IFX_EXTERN void | Ifx_AngleTrkF32_resetFaults (Ifx_AngleTrkF32 *driver)
IFX_EXTERN void | Ifx_AngleTrkF32_setOffset (Ifx_AngleTrkF32 *aObsv, IfxStdIf_Pos_RawAngle offset)
Set the position offset (in ticks) More...
IFX_EXTERN void | Ifx_AngleTrkF32_setRefreshPeriod (Ifx_AngleTrkF32 *driver, float32 updatePeriod)
IFX_EXTERN void | Ifx_AngleTrkF32_update (Ifx_AngleTrkF32 *aObsv)
Update the object directly from its analog input. More...
IFX_EXTERN boolean | Ifx_AngleTrkF32_stdIfPosInit (IfxStdIf_Pos *stdif, Ifx_AngleTrkF32 *driver)
Initializes the standard interface "Pos". More...
Initialisation functions

Example use:

extern sint16 g_SinInput, g_CosInput;
Ifx_AngleTrkF32_Config driverConfig;
Ifx_AngleTrkF32 driverData;
Ifx_AngleTrkF32_initConfig(&driverConfig, &g_SinInput, g_CosInput);
driverConfig.errorThreshold = 5.0 / 180 * IFX_PI; // 5 degree error
driverConfig.sqrAmplMax = 1.01 * 1.01;
driverConfig.sqrAmplMin = 0.99 * 0.99;
driverConfig.speedLpfFc = 100;
driverConfig.periodPerRotation = 1;
driverConfig.reversed = FALSE;
driverConfig.offset = 0;
Ifx_AngleTrkF32_init(&driverData, &driverConfig);

Prototypes:

IFX_EXTERN void | Ifx_AngleTrkF32_init (Ifx_AngleTrkF32 *aObsv, const Ifx_AngleTrkF32_Config *config, float32 Ts)
Initialize the Angle Tracking object. More...
IFX_EXTERN void | Ifx_AngleTrkF32_initConfig (Ifx_AngleTrkF32_Config *config, sint16 *sinIn, sint16 *cosIn)
Fill config with default values. More...
Protected functions

These functions are not for end-user but may be used by another driver which extends the functionality of library_srvsw_sysse_math_f32_angletrk

IFX_EXTERN float32 | Ifx_AngleTrkF32_step (Ifx_AngleTrkF32 *aObsv, sint16 sinIn, sint16 cosIn, float32 phase)
Step function of Ifx_AngleTrkF32 should be called at every sampling period provided during initialisation (call to Ifx_AngleTrkF32_init()). More...
IFX_EXTERN void | Ifx_AngleTrkF32_updateStatus (Ifx_AngleTrkF32 *aObsv, sint16 sinIn, sint16 cosIn)
Update the status flags. More...
IFX_INLINE float32 | Ifx_AngleTrkF32_getLoopSpeed (Ifx_AngleTrkF32 *aObsv)
get the speed. More...

Detailed Description

Angle-tracking observer for sin/cos analog position sensor.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_AngleTrkF32.h.

Data Structure Documentation

◆ Ifx_AngleTrkF32_Config

struct Ifx_AngleTrkF32_Config

Angle Tracking Observer configuration.

Definition at line 73 of file Ifx_AngleTrkF32.h.

Data Fields
sint16 * | cosIn | Pointer to COS input variable.
float32 | errorThreshold | Threshold of error value in the tracking loop.
float32 | kd | Derivative gain.
float32 | ki | Integrator gain.
float32 | kp | Proportional gain.
IfxStdIf_Pos_RawAngle | offset | Offset in ticks. [0 .. (Ifx_AngleTrkF32_Config::resolution - 1)].
uint16 | periodPerRotation | Number of electrical periods per mechanical rotation.
sint32 | resolution | Sensor resolution.
boolean | reversed | TRUE: reversed direction, FALSE: straight direction.
sint16 * | sinIn | Pointer to SIN input variable.
float32 | speedLpfFc | Cut-off frequency of speed low-pass filter.
sint32 | sqrAmplMax | Maximum value for square of signal amplitudes.
sint32 | sqrAmplMin | Minimum value for square of signal amplitudes.

◆ Ifx_AngleTrkF32_CfgData

struct Ifx_AngleTrkF32_CfgData

Definition at line 90 of file Ifx_AngleTrkF32.h.

Data Fields
float32 | errorThreshold | Threshold of error value in the tracking loop.
float32 | kd | Derivative gain.
float32 | ki | Integrator gain.
float32 | kp | Proportional gain.
sint32 | sqrAmplMax | Maximum value for square of signal amplitudes.
sint32 | sqrAmplMin | Minimum value for square of signal amplitudes.

◆ Ifx_AngleTrkF32_PosIf

struct Ifx_AngleTrkF32_PosIf

Definition at line 100 of file Ifx_AngleTrkF32.h.

Collaboration diagram for Ifx_AngleTrkF32_PosIf:
[legend]
Data Fields
IfxStdIf_Pos_Dir | direction | rotation direction
IfxStdIf_Pos_RawAngle | offset | raw position offset
uint16 | periodPerRotation | sensor 'electrical' periods per mechanical rotation
float32 | positionConst | constant for calculating mechanical position (in rad) from raw position
IfxStdIf_Pos_RawAngle rawPosition raw position in ticks.
Note
: the value already contains the offset
IfxStdIf_Pos_RawAngle | resolution | resolution of this position sensor interface
boolean | reversed | reverse direction
IfxStdIf_Pos_Status | status | error code (0 = no error)
float32 | Ts | update period in seconds
sint32 | turn | number of mechanical turns. FIXME to be implemented

◆ Ifx_AngleTrkF32

struct Ifx_AngleTrkF32

Angle Tracking Observer object.

Definition at line 116 of file Ifx_AngleTrkF32.h.

Collaboration diagram for Ifx_AngleTrkF32:
[legend]
Data Fields
float32 | accelEst |
float32 | angleAtan |
float32 | angleErr |
float32 | angleEst |
float32 | angleRef |
Ifx_AngleTrkF32_PosIf | base |
Ifx_AngleTrkF32_CfgData | cfgData |
sint16 * | cosIn | Pointer to COS input variable.
float32 | halfTs |
sint16 * | sinIn | Pointer to SIN input variable.
float32 | speedEstA |
float32 | speedEstB |
Ifx_LowPassPt1F32 | speedLpf | Only used if IFX_CFG_ANGLETRKF32_SPEED_FILTER is set

Macro Definition Documentation

◆ IFX_CFG_ANGLETRKF32_FILTERED_SPEED

#define IFX_CFG_ANGLETRKF32_FILTERED_SPEED (1)

Specify whether the speed reading is filtered by low-pass filter or not.

Definition at line 66 of file Ifx_AngleTrkF32.h.

◆ IFX_CFG_ANGLETRKF32_SPEED_FILTER

#define IFX_CFG_ANGLETRKF32_SPEED_FILTER (1)

Definition at line 61 of file Ifx_AngleTrkF32.h.

Function Documentation

◆ Ifx_AngleTrkF32_stdIfPosInit()

IFX_EXTERN boolean Ifx_AngleTrkF32_stdIfPosInit | ( | IfxStdIf_Pos * | stdif,
 |  | Ifx_AngleTrkF32 * | driver
 | ) |  |

Initializes the standard interface "Pos".

Parameters
stdif | Standard interface position object
driver | Virtual position sensor
Returns
TRUE on success else FALSE

Definition at line 427 of file Ifx_AngleTrkF32.c.


iLLD_TC38A: Ifx_Console.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Comm
Data Structures | Macros | Functions | Variables
Ifx_Console.h File Reference

Main Console module header file. More...

#include "StdIf/IfxStdIf_DPipe.h"
Include dependency graph for Ifx_Console.h:

Go to the source code of this file.

Data Structures

struct Ifx_Console

Macros

#define | IFX_CFG_CONSOLE_INDENT_SIZE (4)
Default indentation/alignment size. More...
#define | CONSOLE Ifx_g_console
Alias Ifx_g_console object (by value) More...

Functions

IFX_INLINE IfxStdIf_DPipe * | Ifx_Console_getIo (void)
Return pointer to the default console object. More...
IFX_EXTERN void | Ifx_Console_init (IfxStdIf_DPipe *standardIo)
Initialize the Ifx_g_console object. More...
IFX_EXTERN boolean | Ifx_Console_print (pchar format,...)
Print formatted string into Ifx_g_console. More...
IFX_EXTERN boolean | Ifx_Console_printAlign (pchar format,...)
Print formatted string into Ifx_g_console. Indented with a number of spaces. More...
IFX_INLINE void | Ifx_Console_decrAlign (sint16 value)
Decrement the alignment/indentation using the given value. More...
IFX_INLINE void | Ifx_Console_incrAlign (sint16 value)
Increment the alignment/indentation using the given value. More...

Variables

IFX_EXTERN Ifx_Console Ifx_g_console
Default main console global variable. More...

Detailed Description

Main Console module header file.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-28 14:15:36 GMT
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_Console.h.

Data Structure Documentation

◆ Ifx_Console

struct Ifx_Console

Definition at line 55 of file Ifx_Console.h.

Collaboration diagram for Ifx_Console:
[legend]
Data Fields
sint16 | align | Variable for storing the actual (left)indentation level of the Ifx_g_console.
IfxStdIf_DPipe * | standardIo | Pointer to the IfxStdIf_DPipe object used as general console.

Macro Definition Documentation

◆ IFX_CFG_CONSOLE_INDENT_SIZE

#define IFX_CFG_CONSOLE_INDENT_SIZE (4)

Default indentation/alignment size.

Definition at line 52 of file Ifx_Console.h.

Referenced by Ifx_Console_decrAlign(), and Ifx_Console_incrAlign().

Variable Documentation

◆ Ifx_g_console

IFX_EXTERN Ifx_Console Ifx_g_console

Default main console global variable.

Definition at line 61 of file Ifx_Console.h.

Referenced by Ifx_Console_decrAlign(), Ifx_Console_getIo(), and Ifx_Console_incrAlign().


iLLD_TC38A: Ifx_DateTime.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Time
Data Structures | Functions
Ifx_DateTime.h File Reference

Date and time functions. More...

#include "Cpu/Std/Ifx_Types.h"
Include dependency graph for Ifx_DateTime.h:

Go to the source code of this file.

Data Structures

struct Ifx_DateTime

Functions

IFX_EXTERN void | DateTime_set (Ifx_DateTime *time)
Set the real time. More...
IFX_EXTERN void | DateTime_get (Ifx_DateTime *time)
Get the real time Note that this function is valid only if DateTime_set() has been called. More...

Detailed Description

Date and time functions.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-28 14:15:40 GMT
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_DateTime.h.

Data Structure Documentation

◆ Ifx_DateTime

struct Ifx_DateTime

Definition at line 48 of file Ifx_DateTime.h.

Data Fields
sint32 | hours
sint32 | minutes
sint32 | seconds


iLLD_TC38A: Ifx_GlobalResources.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • General
Data Structures | Functions
Ifx_GlobalResources.c File Reference
#include "Ifx_GlobalResources.h"
Include dependency graph for Ifx_GlobalResources.c:

Go to the source code of this file.

Data Structures

struct Ifx_GlobalResources
Global resource object. More...

Functions

void * | Ifx_GlobalResources_get (sint32 id)
sint32 | Ifx_GlobalResources_getIndex (void *resource)
Returns the global resource index. More...
const Ifx_GlobalResources_Item * | Ifx_GlobalResources_getItem (sint32 id)
pchar | Ifx_GlobalResources_getName (sint32 id)
boolean | Ifx_GlobalResources_init (const Ifx_GlobalResources_Item *table, uint32 size)

Data Structure Documentation

◆ Ifx_GlobalResources

struct Ifx_GlobalResources

Global resource object.

Definition at line 44 of file Ifx_GlobalResources.c.

Collaboration diagram for Ifx_GlobalResources:
[legend]
Data Fields
sint32 | size | Size of the global resource table.
const Ifx_GlobalResources_Item * | table | Pointer to the global resource table.


iLLD_TC38A: Ifx_GlobalResources.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • General
Data Structures | Macros | Functions
Ifx_GlobalResources.h File Reference

Handling of global resources. More...

#include "Ifx_Cfg.h"
#include "Cpu/Std/Ifx_Types.h"
Include dependency graph for Ifx_GlobalResources.h:

Go to the source code of this file.

Data Structures

struct Ifx_GlobalResources_Item

Macros

#define IFX_CFG_GLOBAL_RESOURCES_ENABLED (0)

Functions

IFX_EXTERN void * | Ifx_GlobalResources_get (sint32 id)
IFX_EXTERN sint32 | Ifx_GlobalResources_getIndex (void *resource)
Returns the global resource index. More...
IFX_EXTERN const Ifx_GlobalResources_Item * | Ifx_GlobalResources_getItem (sint32 id)
IFX_EXTERN pchar | Ifx_GlobalResources_getName (sint32 id)
IFX_EXTERN boolean | Ifx_GlobalResources_init (const Ifx_GlobalResources_Item *table, uint32 size)

Detailed Description

Handling of global resources.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-27 20:08:36 GMT
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-28 14:15:39 GMT
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_GlobalResources.h.

Data Structure Documentation

◆ Ifx_GlobalResources_Item

struct Ifx_GlobalResources_Item

Definition at line 55 of file Ifx_GlobalResources.h.

Data Fields
pchar | name
void * | resource

Macro Definition Documentation

◆ IFX_CFG_GLOBAL_RESOURCES_ENABLED

#define IFX_CFG_GLOBAL_RESOURCES_ENABLED (0)

Definition at line 52 of file Ifx_GlobalResources.h.


iLLD_TC38A: Ifx_LowPassPt1F32.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Data Structures | Functions
Ifx_LowPassPt1F32.h File Reference

Low pass filter PT1. More...

#include "Cpu/Std/Ifx_Types.h"
Include dependency graph for Ifx_LowPassPt1F32.h:

Go to the source code of this file.

Data Structures

struct | Ifx_LowPassPt1F32
PT1 object definition. More...
struct | Ifx_LowPassPt1F32_Config
PT1 configuration. More...

Functions

IFX_EXTERN void | Ifx_LowPassPt1F32_init (Ifx_LowPassPt1F32 *filter, const Ifx_LowPassPt1F32_Config *config)
Set the low pass filter configuration. More...
IFX_INLINE void | Ifx_LowPassPt1F32_reset (Ifx_LowPassPt1F32 *filter)
Reset the internal filter variable. More...
IFX_EXTERN float32 | Ifx_LowPassPt1F32_do (Ifx_LowPassPt1F32 *filter, float32 input)
Execute the low pass filter. More...

Detailed Description

Low pass filter PT1.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_LowPassPt1F32.h.

Data Structure Documentation

◆ Ifx_LowPassPt1F32

struct Ifx_LowPassPt1F32

PT1 object definition.

Definition at line 61 of file Ifx_LowPassPt1F32.h.

Data Fields
float32 | a | a parameter
float32 | b | b parameter
float32 | out | last output

◆ Ifx_LowPassPt1F32_Config

struct Ifx_LowPassPt1F32_Config

PT1 configuration.

Definition at line 69 of file Ifx_LowPassPt1F32.h.

Data Fields
float32 | cutOffFrequency | Cut off frequency.
float32 | gain | Gain.
float32 | samplingTime | Sampling time.


iLLD_TC38A: Ifx_LutIndexedLinearF32.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Data Structures | Functions
Ifx_LutIndexedLinearF32.h File Reference

Look-up functionality. More...

#include "Cpu/Std/Ifx_Types.h"
Include dependency graph for Ifx_LutIndexedLinearF32.h:

Go to the source code of this file.

Data Structures

struct | Ifx_LutIndexedLinearF32_Item
struct | Ifx_LutIndexedLinearF32

Functions

IFX_INLINE float32 Ifx_LutIndexedLinearF32_search (const Ifx_LutIndexedLinearF32 *ml, uint32 index)
Look-up table search. More...

Detailed Description

Look-up functionality.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_LutIndexedLinearF32.h.

Data Structure Documentation

◆ Ifx_LutIndexedLinearF32_Item

struct Ifx_LutIndexedLinearF32_Item

Definition at line 54 of file Ifx_LutIndexedLinearF32.h.

Data Fields
float32 | gain | channel gain
float32 | offset | channel offset

◆ Ifx_LutIndexedLinearF32

struct Ifx_LutIndexedLinearF32

Definition at line 60 of file Ifx_LutIndexedLinearF32.h.

Collaboration diagram for Ifx_LutIndexedLinearF32:
[legend]
Data Fields
uint16 | segmentCount
const Ifx_LutIndexedLinearF32_Item * | segments
sint8 | shift


iLLD_TC38A: Ifx_LutLinearF32.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Data Structures | Functions
Ifx_LutLinearF32.h File Reference

Look-up functionality. More...

#include "Cpu/Std/Ifx_Types.h"
Include dependency graph for Ifx_LutLinearF32.h:

Go to the source code of this file.

Data Structures

struct | Ifx_LutLinearF32_Item
struct | Ifx_LutLinearF32

Functions

IFX_EXTERN float32 | Ifx_LutLinearF32_searchBin (const Ifx_LutLinearF32 *ml, float32 index)
Look-up table with binary search implementation. More...
IFX_INLINE float32 | Ifx_LutLinearF32_searchNegSeq (const Ifx_LutLinearF32 *ml, float32 index)
Look-up table with negative sequential search implementation. More...
IFX_INLINE float32 | Ifx_LutLinearF32_searchPosSeq (const Ifx_LutLinearF32 *ml, float32 index)
Look-up table with positive sequential search implementation. More...

Detailed Description

Look-up functionality.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_LutLinearF32.h.

Data Structure Documentation

◆ Ifx_LutLinearF32_Item

struct Ifx_LutLinearF32_Item

Definition at line 54 of file Ifx_LutLinearF32.h.

Data Fields
float32 | boundary | segment input upper limit
float32 | gain | channel gain
float32 | offset | channel offset

◆ Ifx_LutLinearF32

struct Ifx_LutLinearF32

Definition at line 61 of file Ifx_LutLinearF32.h.

Collaboration diagram for Ifx_LutLinearF32:
[legend]
Data Fields
sint8 | segmentCount
const Ifx_LutLinearF32_Item * | segments


iLLD_TC38A: Ifx_RampF32.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Data Structures | Functions
Ifx_RampF32.h File Reference

Ramp function. More...

#include "Cpu/Std/IfxCpu_Intrinsics.h"
Include dependency graph for Ifx_RampF32.h:

Go to the source code of this file.

Data Structures

struct Ifx_RampF32
Ifx_RampF32 object definition. More...

Functions

IFX_INLINE void | Ifx_RampF32_init (Ifx_RampF32 *ramp, float32 slewRate, float32 period)
Initialize the Ifx_RampF32 object. More...
IFX_INLINE void | Ifx_RampF32_reset (Ifx_RampF32 *ramp)
Reset internal values. More...
IFX_INLINE void | Ifx_RampF32_setSlewRate (Ifx_RampF32 *ramp, float32 slewRate, float32 period)
Set the maximum slew rate. More...
IFX_INLINE void | Ifx_RampF32_setRef (Ifx_RampF32 *ramp, float32 ref)
Set the reference value. More...
IFX_INLINE float32 | Ifx_RampF32_getValue (Ifx_RampF32 *ramp)
Get the actual output value. More...
IFX_EXTERN float32 | Ifx_RampF32_step (Ifx_RampF32 *ramp)
Execute the Ramp function. More...
IFX_INLINE float32 | Ifx_RampF32_getRef (Ifx_RampF32 *ramp)
Get the reference value. More...

Detailed Description

Ramp function.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_RampF32.h.

Data Structure Documentation

◆ Ifx_RampF32

struct Ifx_RampF32

Ifx_RampF32 object definition.

Definition at line 55 of file Ifx_RampF32.h.

Data Fields
float32 | delta
float32 | ik
float32 | uk

Function Documentation

◆ Ifx_RampF32_getRef()

IFX_INLINE float32 Ifx_RampF32_getRef ( Ifx_RampF32 * ramp )

Get the reference value.

Parameters
ramp Pointer to the Ifx_RampF32 object
Returns
Returns the ref value

Definition at line 94 of file Ifx_RampF32.h.


iLLD_TC38A: Ifx_Shell_Protocol Struct Reference

Data Fields
Ifx_Shell_Protocol Struct Reference

Shell protocol configuration. More...

#include </home/illd.work/release/iLLD_1_0_1_12_0/External/Src/BaseSw/Service/CpuGeneric/SysSe/Comm/Ifx_Shell.h>

Data Fields

boolean(* | start )(void *protocol, IfxStdIf_DPipe *io)
void(* | execute )(void *protocol)
void(* | onStart )(void *protocol, void *data)
void * | onStartData
void * | object
boolean started

Detailed Description

Shell protocol configuration.

Definition at line 197 of file Ifx_Shell.h.

Field Documentation

◆ execute

void(* execute) (void *protocol)

Definition at line 200 of file Ifx_Shell.h.

Referenced by Ifx_Shell_initConfig(), and Ifx_Shell_process().

◆ object

void* object

Definition at line 203 of file Ifx_Shell.h.

Referenced by Ifx_Shell_initConfig(), Ifx_Shell_process(), and Ifx_Shell_protocolStart().

◆ onStart

void(* onStart) (void *protocol, void *data)

Definition at line 201 of file Ifx_Shell.h.

Referenced by Ifx_Shell_initConfig(), and Ifx_Shell_protocolStart().

◆ onStartData

void* onStartData

Definition at line 202 of file Ifx_Shell.h.

Referenced by Ifx_Shell_initConfig(), and Ifx_Shell_protocolStart().

◆ start

boolean(* start) (void *protocol, IfxStdIf_DPipe *io)

Definition at line 199 of file Ifx_Shell.h.

Referenced by Ifx_Shell_initConfig(), and Ifx_Shell_protocolStart().

◆ started

boolean started

Definition at line 204 of file Ifx_Shell.h.

Referenced by Ifx_Shell_init(), Ifx_Shell_initConfig(), Ifx_Shell_process(), and Ifx_Shell_protocolStart().

The documentation for this struct was generated from the following file:
  • Ifx_Shell.h


iLLD_TC38A: Ifx_Ssw.h File Reference

  • Infra
  • Ssw
  • TC38A
  • Tricore
Data Structures | Macros | Functions
Ifx_Ssw.h File Reference

Startup Software configuration. Can configure which core to be enabled. More...

#include "Ifx_Ssw_Compilers.h"
#include "Ifx_Ssw_LegacySwCfg.h"
Include dependency graph for Ifx_Ssw.h:

Go to the source code of this file.

Data Structures

struct Ifx_Ssw_Bmhd
Structure definition for the BMHD Based on BMI and start address respective CRC and Inverted CRC values has to be calculated and updated. CRC-32 polynomial as defined in the IEEE 802.3 standard is used to generate the CRC value. The CRC algorithm treats input data as a stream of bits. More...

Macros

#define | IFX_CFG_SSW_ENABLE_TRICORE0 (1U)
#define | IFX_CFG_SSW_ENABLE_TRICORE1 (1U)
#define | IFX_CFG_SSW_ENABLE_TRICORE2 (1U)
#define | IFX_CFG_SSW_ENABLE_TRICORE3 (1U)
#define | IFX_CFG_SSW_PSW_DEFAULT (0x00000980u)
#define | IFX_CFG_SSW_ENABLE_INDIVIDUAL_C_INIT (0U)

Functions

void | __Core1_start (void)
void | __Core2_start (void)
void | __Core3_start (void)

Detailed Description

Startup Software configuration. Can configure which core to be enabled.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_Ssw.h.

Data Structure Documentation

◆ Ifx_Ssw_Bmhd

struct Ifx_Ssw_Bmhd

Structure definition for the BMHD Based on BMI and start address respective CRC and Inverted CRC values has to be calculated and updated. CRC-32 polynomial as defined in the IEEE 802.3 standard is used to generate the CRC value. The CRC algorithm treats input data as a stream of bits.

Eg. To calculate the CRC data has to given in big-endian order. for the below values: bmi = 0x00FE bmhdid = 0xB359 stad = 0xA00A0000 CRC calculation: Input = 0xB35900FEA00A0000 CRC value = 0x3CEED0A6 CRC Inverted = 0xC3112F59

Definition at line 97 of file Ifx_Ssw.h.

Data Fields
unsigned short | bmhdid | 0x002: Boot Mode Header ID (CODE) = B359H
unsigned short | bmi | 0x000: Boot Mode Index (BMI)
unsigned int | confirmation | 0x1F0: 32-bit CODE, (always same)
unsigned int | crc | 0x008: Check Result for the BMI Header (offset 000H - 007H)
unsigned int | crcInv | 0x00C: Inverted Check Result for the BMI Header (offset 000H - 007H)
unsigned int | pw[8] | 0x100: Password protection (8 words) till the offset 0x120
unsigned int | reserved0[60] | 0x010: Reserved area (60 words) till the offset 0x100
unsigned int | reserved1[52] | 0x120: Reserved area (52 words) till the offset 0x1F0
unsigned int | stad | 0x004: User Code start address

Macro Definition Documentation

◆ IFX_CFG_SSW_ENABLE_INDIVIDUAL_C_INIT

#define IFX_CFG_SSW_ENABLE_INDIVIDUAL_C_INIT (0U)

Definition at line 76 of file Ifx_Ssw.h.

◆ IFX_CFG_SSW_ENABLE_TRICORE0

#define IFX_CFG_SSW_ENABLE_TRICORE0 (1U)

Definition at line 56 of file Ifx_Ssw.h.

◆ IFX_CFG_SSW_ENABLE_TRICORE1

#define IFX_CFG_SSW_ENABLE_TRICORE1 (1U)

Definition at line 60 of file Ifx_Ssw.h.

◆ IFX_CFG_SSW_ENABLE_TRICORE2

#define IFX_CFG_SSW_ENABLE_TRICORE2 (1U)

Definition at line 64 of file Ifx_Ssw.h.

◆ IFX_CFG_SSW_ENABLE_TRICORE3

#define IFX_CFG_SSW_ENABLE_TRICORE3 (1U)

Definition at line 68 of file Ifx_Ssw.h.

◆ IFX_CFG_SSW_PSW_DEFAULT

#define IFX_CFG_SSW_PSW_DEFAULT (0x00000980u)

Definition at line 72 of file Ifx_Ssw.h.

Referenced by __Core1_start(), __Core2_start(), and __Core3_start().

Function Documentation

◆ __Core1_start()

void __Core1_start ( void )

Definition at line 87 of file Ifx_Ssw_Tc1.c.

Referenced by _START1().

◆ __Core2_start()

void __Core2_start ( void )

Definition at line 87 of file Ifx_Ssw_Tc2.c.

Referenced by _START2().

◆ __Core3_start()

void __Core3_start ( void )

Definition at line 87 of file Ifx_Ssw_Tc3.c.

Referenced by _START3().


iLLD_TC38A: Ifx_Ssw_CompilersGnuc.h File Reference

  • Infra
  • Ssw
  • TC38A
  • Tricore
Data Structures | Macros | Functions | Variables
Ifx_Ssw_CompilersGnuc.h File Reference

Startup Software for GNU compiler options. More...

#include "machine/intrinsics.h"
Include dependency graph for Ifx_Ssw_CompilersGnuc.h:

Go to the source code of this file.

Data Structures

union Ifx_Ssw_CTablePtr

Macros

#define | IFX_SSW_COMMON_LINKER_SYMBOLS()
#define | IFX_SSW_CORE_LINKER_SYMBOLS(cpu)
#define | __USTACK(cpu) __USTACK##cpu
#define | __ISTACK(cpu) __ISTACK##cpu
#define | __INTTAB_CPU(cpu) __INTTAB_CPU##cpu
#define | __TRAPTAB_CPU(cpu) __TRAPTAB_CPU##cpu
#define | __CSA(cpu) __CSA##cpu
#define | __CSA_END(cpu) __CSA##cpu##_END
#define | __START(cpu) __START##cpu
#define | __INTTAB(cpu) __INTTAB_CPU##cpu
#define | __TRAPTAB(cpu) __TRAPTAB_CPU##cpu
#define | __SDATA1(cpu) __A0_MEM
#define | __SDATA2(cpu) __A1_MEM
#define | __SDATA3(cpu) __A8_MEM
#define | __SDATA4(cpu) __A9_MEM
#define | IFX_SSW_INLINE static inline __attribute__ ((always_inline))
#define | IFX_SSW_NULL_PTR ((void *)0x0U)
#define | Ifx_Ssw_MTCR(reg, val) __mtcr(reg, val);
#define | Ifx_Ssw_MFCR(reg) __mfcr(reg);
#define | Ifx_Ssw_CLZ(a) __builtin_clz(a)
#define | Ifx_Ssw___setAddressReg(aReg, val) {__asm__ volatile ("movh.a\t %"#aReg ", hi:("#val ")\n\tlea\t %"#aReg ",[%"#aReg "] lo:("#val ")"); }
#define | Ifx_Ssw_setAddressReg(regNum, val) Ifx_Ssw___setAddressReg(regNum, val)

Functions

IFX_SSW_INLINE void | Ifx_Ssw_NOP (void)
IFX_SSW_INLINE void | Ifx_Ssw_DSYNC (void)
IFX_SSW_INLINE void | Ifx_Ssw_ISYNC (void)
IFX_SSW_INLINE unsigned int | Ifx_Ssw_MINU (unsigned int a, unsigned int b)
IFX_SSW_INLINE void | Ifx_Ssw_moveToDataParam0 (unsigned int var)
IFX_SSW_INLINE unsigned int | Ifx_Ssw_getDataParam0 (void)
IFX_SSW_INLINE void | Ifx_Ssw_jumpToFunction (void(*fun)(void))
IFX_SSW_INLINE void | Ifx_Ssw_jumpToFunctionWithLink (void *fun)
IFX_SSW_INLINE void | Ifx_Ssw_jumpBackToLink (void)
IFX_SSW_INLINE void | Ifx_Ssw_C_InitInline (void)

Variables

unsigned int | __clear_table []
unsigned int | __copy_table []

Detailed Description

Startup Software for GNU compiler options.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_Ssw_CompilersGnuc.h.

Data Structure Documentation

◆ Ifx_Ssw_CTablePtr

union Ifx_Ssw_CTablePtr

Definition at line 121 of file Ifx_Ssw_CompilersDcc.h.

Data Fields
unsigned int * | ucPtr
unsigned char * | ucPtr
unsigned int * | uiPtr
unsigned long long * | ullPtr
unsigned int * | usPtr
unsigned short * | usPtr

Macro Definition Documentation

◆ __CSA

#define __CSA ( cpu ) __CSA##cpu

Definition at line 105 of file Ifx_Ssw_CompilersGnuc.h.

◆ __CSA_END

#define __CSA_END ( cpu ) __CSA##cpu##_END

Definition at line 106 of file Ifx_Ssw_CompilersGnuc.h.

◆ __INTTAB

#define __INTTAB ( cpu ) __INTTAB_CPU##cpu

Definition at line 113 of file Ifx_Ssw_CompilersGnuc.h.

◆ __INTTAB_CPU

#define __INTTAB_CPU ( cpu ) __INTTAB_CPU##cpu

Definition at line 103 of file Ifx_Ssw_CompilersGnuc.h.

◆ __ISTACK

#define __ISTACK ( cpu ) __ISTACK##cpu

Definition at line 102 of file Ifx_Ssw_CompilersGnuc.h.

◆ __SDATA1

#define __SDATA1 ( cpu ) __A0_MEM

Definition at line 118 of file Ifx_Ssw_CompilersGnuc.h.

◆ __SDATA2

#define __SDATA2 ( cpu ) __A1_MEM

Definition at line 119 of file Ifx_Ssw_CompilersGnuc.h.

◆ __SDATA3

#define __SDATA3 ( cpu ) __A8_MEM

Definition at line 120 of file Ifx_Ssw_CompilersGnuc.h.

◆ __SDATA4

#define __SDATA4 ( cpu ) __A9_MEM

Definition at line 121 of file Ifx_Ssw_CompilersGnuc.h.

◆ __START

#define __START ( cpu ) __START##cpu

Definition at line 107 of file Ifx_Ssw_CompilersGnuc.h.

◆ __TRAPTAB

#define __TRAPTAB ( cpu ) __TRAPTAB_CPU##cpu

Definition at line 116 of file Ifx_Ssw_CompilersGnuc.h.

◆ __TRAPTAB_CPU

#define __TRAPTAB_CPU ( cpu ) __TRAPTAB_CPU##cpu

Definition at line 104 of file Ifx_Ssw_CompilersGnuc.h.

◆ __USTACK

#define __USTACK ( cpu ) __USTACK##cpu

Definition at line 101 of file Ifx_Ssw_CompilersGnuc.h.

◆ Ifx_Ssw___setAddressReg

#define Ifx_Ssw___setAddressReg | ( | aReg,
 |  | val
 | ) | {__asm__ volatile ("movh.a\t %"#aReg ", hi:("#val ")\n\tlea\t %"#aReg ",[%"#aReg "] lo:("#val ")"); }

Definition at line 176 of file Ifx_Ssw_CompilersGnuc.h.

◆ Ifx_Ssw_CLZ

#define Ifx_Ssw_CLZ ( a ) __builtin_clz(a)

Definition at line 174 of file Ifx_Ssw_CompilersGnuc.h.

◆ IFX_SSW_COMMON_LINKER_SYMBOLS

#define IFX_SSW_COMMON_LINKER_SYMBOLS ( )
Value:
extern unsigned int __A0_MEM[]; /**< center of A0 addressable area */ \
extern unsigned int __A1_MEM[]; /**< center of A1 addressable area */ \
extern unsigned int __A8_MEM[]; /**< center of A8 addressable area */ \
extern unsigned int __A9_MEM[]; /**< center of A9 addressable area */ \
extern unsigned int __START0[]; /**< Pointer to the startup code */ \
extern unsigned int __START1[]; /**< Pointer to the startup code */ \
extern unsigned int __START2[]; /**< Pointer to the startup code */ \
extern unsigned int __START3[]; /**< Pointer to the startup code */ \
extern unsigned int __START4[]; /**< Pointer to the startup code */ \
extern unsigned int __START5[];

Pointer to the startup code

Definition at line 60 of file Ifx_Ssw_CompilersGnuc.h.

◆ IFX_SSW_CORE_LINKER_SYMBOLS

#define IFX_SSW_CORE_LINKER_SYMBOLS ( cpu )
Value:
extern unsigned int __USTACK##cpu[]; /**< user stack end */ \
extern unsigned int __ISTACK##cpu[]; /**< interrupt stack end */ \
extern unsigned int __INTTAB_CPU##cpu[]; /**< Interrupt vector table */ \
extern unsigned int __TRAPTAB_CPU##cpu[]; /**< trap table */ \
extern unsigned int __CSA##cpu[]; /**< context save area 1 begin */ \
extern unsigned int __CSA##cpu##_END[];
__USTACK
#define __USTACK(cpu)
Definition: Ifx_Ssw_CompilersGnuc.h:101
__INTTAB_CPU
#define __INTTAB_CPU(cpu)
Definition: Ifx_Ssw_CompilersGnuc.h:103
__ISTACK
#define __ISTACK(cpu)
Definition: Ifx_Ssw_CompilersGnuc.h:102
__CSA
#define __CSA(cpu)
Definition: Ifx_Ssw_CompilersGnuc.h:105
__TRAPTAB_CPU
#define __TRAPTAB_CPU(cpu)
Definition: Ifx_Ssw_CompilersGnuc.h:104

context save area 1 begin

Definition at line 87 of file Ifx_Ssw_CompilersGnuc.h.

◆ IFX_SSW_INLINE

#define IFX_SSW_INLINE static inline __attribute__ ((always_inline))

Definition at line 125 of file Ifx_Ssw_CompilersGnuc.h.

◆ Ifx_Ssw_MFCR

#define Ifx_Ssw_MFCR ( reg ) __mfcr(reg);

Definition at line 146 of file Ifx_Ssw_CompilersGnuc.h.

◆ Ifx_Ssw_MTCR

#define Ifx_Ssw_MTCR | ( | reg,
 |  | val
 | ) | __mtcr(reg, val);

Definition at line 144 of file Ifx_Ssw_CompilersGnuc.h.

◆ IFX_SSW_NULL_PTR

#define IFX_SSW_NULL_PTR ((void *)0x0U)

Definition at line 127 of file Ifx_Ssw_CompilersGnuc.h.

◆ Ifx_Ssw_setAddressReg

#define Ifx_Ssw_setAddressReg | ( | regNum,
 |  | val
 | ) | Ifx_Ssw___setAddressReg(regNum, val)

Definition at line 179 of file Ifx_Ssw_CompilersGnuc.h.

Function Documentation

◆ Ifx_Ssw_C_InitInline()

IFX_SSW_INLINE void Ifx_Ssw_C_InitInline ( void )

Definition at line 216 of file Ifx_Ssw_CompilersGnuc.h.

◆ Ifx_Ssw_DSYNC()

IFX_SSW_INLINE void Ifx_Ssw_DSYNC ( void )

Definition at line 154 of file Ifx_Ssw_CompilersGnuc.h.

◆ Ifx_Ssw_getDataParam0()

IFX_SSW_INLINE unsigned int Ifx_Ssw_getDataParam0 ( void )

Definition at line 187 of file Ifx_Ssw_CompilersGnuc.h.

◆ Ifx_Ssw_ISYNC()

IFX_SSW_INLINE void Ifx_Ssw_ISYNC ( void )

Definition at line 160 of file Ifx_Ssw_CompilersGnuc.h.

◆ Ifx_Ssw_jumpBackToLink()

IFX_SSW_INLINE void Ifx_Ssw_jumpBackToLink ( void )

Definition at line 207 of file Ifx_Ssw_CompilersGnuc.h.

◆ Ifx_Ssw_jumpToFunction()

IFX_SSW_INLINE void Ifx_Ssw_jumpToFunction ( void(*)(void) fun )

Definition at line 195 of file Ifx_Ssw_CompilersGnuc.h.

◆ Ifx_Ssw_jumpToFunctionWithLink()

IFX_SSW_INLINE void Ifx_Ssw_jumpToFunctionWithLink ( void * fun )

Definition at line 201 of file Ifx_Ssw_CompilersGnuc.h.

◆ Ifx_Ssw_MINU()

IFX_SSW_INLINE unsigned int Ifx_Ssw_MINU | ( | unsigned int | a,
 |  | unsigned int | b
 | ) |  |

Definition at line 166 of file Ifx_Ssw_CompilersGnuc.h.

◆ Ifx_Ssw_moveToDataParam0()

IFX_SSW_INLINE void Ifx_Ssw_moveToDataParam0 ( unsigned int var )

Definition at line 181 of file Ifx_Ssw_CompilersGnuc.h.

◆ Ifx_Ssw_NOP()

IFX_SSW_INLINE void Ifx_Ssw_NOP ( void )

Definition at line 148 of file Ifx_Ssw_CompilersGnuc.h.

Variable Documentation

◆ __clear_table

unsigned int __clear_table[]

clear table entry

Referenced by Ifx_Ssw_jumpToFunctionWithLink().

◆ __copy_table

unsigned int __copy_table[]

copy table entry


iLLD_TC38A: IfxStdIf_DPipe.h File Reference

  • Service
  • CpuGeneric
  • StdIf
Data Structures | Macros | Typedefs | Functions
IfxStdIf_DPipe.h File Reference

Standard interface: Data Pipe. More...

#include "IfxStdIf.h"
Include dependency graph for IfxStdIf_DPipe.h:

Go to the source code of this file.

Data Structures

struct IfxStdIf_DPipe_
Standard interface object. More...

Macros

#define | ENDL "\r\n"
#define | STDIF_DPIPE_MAX_PRINT_SIZE (255)
Size of the buffer allocated on the stack for the print function. More...

Typedefs

typedef struct IfxStdIf_DPipe_ | IfxStdIf_DPipe
Forward declaration. More...
typedef volatile boolean * | IfxStdIf_DPipe_WriteEvent
typedef volatile boolean * | IfxStdIf_DPipe_ReadEvent
typedef boolean(* | IfxStdIf_DPipe_Write) (IfxStdIf_InterfaceDriver stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Write binary data into the IfxStdIf_DPipe. More...
typedef boolean(* | IfxStdIf_DPipe_Read) (IfxStdIf_InterfaceDriver stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Read data from the IfxStdIf_DPipe object. More...
typedef sint32(* | IfxStdIf_DPipe_GetReadCount) (IfxStdIf_InterfaceDriver stdIf)
Returns the number of bytes in the rx buffer. More...
typedef IfxStdIf_DPipe_ReadEvent(* | IfxStdIf_DPipe_GetReadEvent) (IfxStdIf_InterfaceDriver stdIf)
Returns read event object. More...
typedef uint32(* | IfxStdIf_DPipe_GetSendCount) (IfxStdIf_InterfaceDriver stdIf)
Returns number of bytes send. More...
typedef Ifx_TickTime(* | IfxStdIf_DPipe_GetTxTimeStamp) (IfxStdIf_InterfaceDriver stdIf)
Returns the time stamp of the last transmit data. More...
typedef sint32(* | IfxStdIf_DPipe_GetWriteCount) (IfxStdIf_InterfaceDriver stdIf)
Returns the number of free bytes (free space) in the tx buffer. More...
typedef IfxStdIf_DPipe_WriteEvent(* | IfxStdIf_DPipe_GetWriteEvent) (IfxStdIf_InterfaceDriver stdIf)
Returns write event object. More...
typedef boolean(* | IfxStdIf_DPipe_CanReadCount) (IfxStdIf_InterfaceDriver stdIf, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if the required number of bytes are available for read in the buffer. More...
typedef boolean(* | IfxStdIf_DPipe_CanWriteCount) (IfxStdIf_InterfaceDriver stdIf, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if there is enough free space to write the data in the buffer. More...
typedef boolean(* | IfxStdIf_DPipe_FlushTx) (IfxStdIf_InterfaceDriver stdIf, Ifx_TickTime timeout)
Flush the transmit buffer by transmitting all data. More...
typedef void(* | IfxStdIf_DPipe_ClearRx) (IfxStdIf_InterfaceDriver stdIf)
Clears the RX buffer by removing all data. More...
typedef void(* | IfxStdIf_DPipe_ClearTx) (IfxStdIf_InterfaceDriver stdIf)
Clears the TX buffer by removing all data. More...
typedef void(* | IfxStdIf_DPipe_OnReceive) (IfxStdIf_InterfaceDriver stdIf)
handler called on reveive event More...
typedef void(* | IfxStdIf_DPipe_OnTransmit) (IfxStdIf_InterfaceDriver stdIf)
handler called on transmit event More...
typedef void(* | IfxStdIf_DPipe_OnError) (IfxStdIf_InterfaceDriver stdIf)
handler called on error event More...
typedef void(* | IfxStdIf_DPipe_ResetSendCount) (IfxStdIf_InterfaceDriver stdIf)
Reset the sendCount counter. More...

Functions

IFX_INLINE boolean | IfxStdIf_DPipe_write (IfxStdIf_DPipe *stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Write binary data into the IfxStdIf_DPipe. More...
IFX_INLINE boolean | IfxStdIf_DPipe_read (IfxStdIf_DPipe *stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Read data from the IfxStdIf_DPipe object. More...
IFX_INLINE sint32 | IfxStdIf_DPipe_getReadCount (IfxStdIf_DPipe *stdIf)
Returns the number of bytes in the rx buffer. More...
IFX_INLINE sint32 | IfxStdIf_DPipe_getWriteCount (IfxStdIf_DPipe *stdIf)
Returns the number of free bytes (free space) in the tx buffer. More...
IFX_INLINE boolean | IfxStdIf_DPipe_canReadCount (IfxStdIf_DPipe *stdIf, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if the required number of bytes are available for read in the buffer. More...
IFX_INLINE boolean | IfxStdIf_DPipe_canWriteCount (IfxStdIf_DPipe *stdIf, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if there is enough free space to write the data in the buffer. More...
IFX_INLINE IfxStdIf_DPipe_ReadEvent | IfxStdIf_DPipe_getReadEvent (IfxStdIf_DPipe *stdIf)
Returns read event object. More...
IFX_INLINE IfxStdIf_DPipe_WriteEvent | IfxStdIf_DPipe_getWriteEvent (IfxStdIf_DPipe *stdIf)
Returns write event object. More...
IFX_INLINE boolean | IfxStdIf_DPipe_flushTx (IfxStdIf_DPipe *stdIf, Ifx_TickTime timeout)
Flush the transmit buffer by transmitting all data. More...
IFX_INLINE void | IfxStdIf_DPipe_clearTx (IfxStdIf_DPipe *stdIf)
Clears the TX buffer by removing all data. More...
IFX_INLINE void | IfxStdIf_DPipe_clearRx (IfxStdIf_DPipe *stdIf)
Clears the RX buffer by removing all data. More...
IFX_INLINE void | IfxStdIf_DPipe_onReceive (IfxStdIf_DPipe *stdIf)
handler called on reveive event More...
IFX_INLINE void | IfxStdIf_DPipe_onTransmit (IfxStdIf_DPipe *stdIf)
handler called on transmit event More...
IFX_INLINE void | IfxStdIf_DPipe_onError (IfxStdIf_DPipe *stdIf)
handler called on error event More...
IFX_INLINE uint32 | IfxStdIf_DPipe_getSendCount (IfxStdIf_DPipe *stdIf)
Returns number of bytes send. More...
IFX_INLINE Ifx_TickTime | IfxStdIf_DPipe_getTxTimeStamp (IfxStdIf_DPipe *stdIf)
Returns the time stamp of the last transmit data. More...
IFX_INLINE void | IfxStdIf_DPipe_resetSendCount (IfxStdIf_DPipe *stdIf)
Reset the sendCount counter. More...
IFX_EXTERN void | IfxStdIf_DPipe_print (IfxStdIf_DPipe *stdIf, pchar format,...)

Detailed Description

Standard interface: Data Pipe.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-27 20:08:24 GMT
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxStdIf_DPipe.h.

Data Structure Documentation

◆ IfxStdIf_DPipe_

struct IfxStdIf_DPipe_

Standard interface object.

Definition at line 230 of file IfxStdIf_DPipe.h.

Data Fields
IfxStdIf_DPipe_CanReadCount canReadCount
See also
IfxStdIf_DPipe_CanReadCount
IfxStdIf_DPipe_CanWriteCount canWriteCount
See also
IfxStdIf_DPipe_CanWriteCount
IfxStdIf_DPipe_ClearRx clearRx
See also
IfxStdIf_DPipe_ClearRx
IfxStdIf_DPipe_ClearTx clearTx
See also
IfxStdIf_DPipe_ClearTx
IfxStdIf_InterfaceDriver | driver | Pointer to the specific driver object.
IfxStdIf_DPipe_FlushTx flushTx
See also
IfxStdIf_DPipe_FlushTx
IfxStdIf_DPipe_GetReadCount getReadCount
See also
IfxStdIf_DPipe_GetReadCount
IfxStdIf_DPipe_GetReadEvent getReadEvent
See also
IfxStdIf_DPipe_GetReadEvent
IfxStdIf_DPipe_GetSendCount getSendCount
See also
IfxStdIf_DPipe_GetSendCount
IfxStdIf_DPipe_GetTxTimeStamp getTxTimeStamp
See also
IfxStdIf_DPipe_GetTxTimeStamp
IfxStdIf_DPipe_GetWriteCount getWriteCount
See also
IfxStdIf_DPipe_GetWriteCount
IfxStdIf_DPipe_GetWriteEvent getWriteEvent
See also
IfxStdIf_DPipe_GetWriteEvent
IfxStdIf_DPipe_OnError onError
See also
IfxStdIf_DPipe_OnError
IfxStdIf_DPipe_OnReceive onReceive
See also
IfxStdIf_DPipe_OnReceive
IfxStdIf_DPipe_OnTransmit onTransmit
See also
IfxStdIf_DPipe_OnTransmit
IfxStdIf_DPipe_Read read
See also
IfxStdIf_DPipe_Read
IfxStdIf_DPipe_ResetSendCount resetSendCount
See also
IfxStdIf_DPipe_ResetSendCount
boolean | txDisabled | If disabled is set to TRUE, the output is disabled, else enabled.
IfxStdIf_DPipe_Write write
See also
IfxStdIf_DPipe_Write

Macro Definition Documentation

◆ ENDL

#define ENDL "\r\n"

Definition at line 64 of file IfxStdIf_DPipe.h.

Referenced by Ifx_Assert_doLevel(), Ifx_Assert_doValidate(), Ifx_Shell_bbProtocolStart(), Ifx_Shell_init(), Ifx_Shell_printSyntax(), Ifx_Shell_process(), Ifx_Shell_protocolStart(), and IfxStdIf_Pos_printStatus().

◆ STDIF_DPIPE_MAX_PRINT_SIZE

#define STDIF_DPIPE_MAX_PRINT_SIZE (255)

Size of the buffer allocated on the stack for the print function.

Definition at line 74 of file IfxStdIf_DPipe.h.

Referenced by Ifx_Console_print(), Ifx_Console_printAlign(), and IfxStdIf_DPipe_print().

Typedef Documentation

◆ IfxStdIf_DPipe

typedef struct IfxStdIf_DPipe_ IfxStdIf_DPipe

Forward declaration.

Definition at line 68 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_CanReadCount

typedef boolean(* IfxStdIf_DPipe_CanReadCount) (IfxStdIf_InterfaceDriver stdIf, Ifx_SizeT count, Ifx_TickTime timeout)

Indicates if the required number of bytes are available for read in the buffer.

Parameters
stdif | Pointer to the interface driver object
count | Pointer to the count of data (in bytes).
timeout | in system timer ticks
Returns
Returns TRUE if at least count bytes are available for read in the rx buffer, if not the Event is armed to be set when the buffer count is bigger or equal to the requested count

Definition at line 163 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_CanWriteCount

typedef boolean(* IfxStdIf_DPipe_CanWriteCount) (IfxStdIf_InterfaceDriver stdIf, Ifx_SizeT count, Ifx_TickTime timeout)

Indicates if there is enough free space to write the data in the buffer.

Parameters
stdif | Pointer to the interface driver object
count | Pointer to the count of data (in bytes).
timeout | in system timer ticks
Returns
Returns TRUE if at least count bytes can be written to the tx buffer, if not the Event is armed to be set when the buffer free count is bigger or equal to the requested count

Definition at line 174 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_ClearRx

typedef void(* IfxStdIf_DPipe_ClearRx) (IfxStdIf_InterfaceDriver stdIf)

Clears the RX buffer by removing all data.

Parameters
stdif Pointer to the interface driver object
Returns
void

Definition at line 190 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_ClearTx

typedef void(* IfxStdIf_DPipe_ClearTx) (IfxStdIf_InterfaceDriver stdIf)

Clears the TX buffer by removing all data.

Parameters
stdif Pointer to the interface driver object
Returns
void

Definition at line 197 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_FlushTx

typedef boolean(* IfxStdIf_DPipe_FlushTx) (IfxStdIf_InterfaceDriver stdIf, Ifx_TickTime timeout)

Flush the transmit buffer by transmitting all data.

Parameters
stdif | Pointer to the interface driver object
timeout | timeout for the flush operation
Returns
Returns TRUE if the FIFO is empty

Definition at line 183 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_GetReadCount

typedef sint32(* IfxStdIf_DPipe_GetReadCount) (IfxStdIf_InterfaceDriver stdIf)

Returns the number of bytes in the rx buffer.

Parameters
stdif Pointer to the interface driver object
Returns
Returns the number of bytes in the rx buffer

Definition at line 112 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_GetReadEvent

typedef IfxStdIf_DPipe_ReadEvent(* IfxStdIf_DPipe_GetReadEvent) (IfxStdIf_InterfaceDriver stdIf)

Returns read event object.

Parameters
stdif Pointer to the interface driver object
Returns
Returns read event object

Definition at line 120 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_GetSendCount

typedef uint32(* IfxStdIf_DPipe_GetSendCount) (IfxStdIf_InterfaceDriver stdIf)

Returns number of bytes send.

Parameters
stdif Pointer to the interface driver object
Returns
Returns number of bytes send

Definition at line 128 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_GetTxTimeStamp

typedef Ifx_TickTime(* IfxStdIf_DPipe_GetTxTimeStamp) (IfxStdIf_InterfaceDriver stdIf)

Returns the time stamp of the last transmit data.

Parameters
stdif Pointer to the interface driver object
Returns
Returns the time stamp of the last transmit data

Definition at line 136 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_GetWriteCount

typedef sint32(* IfxStdIf_DPipe_GetWriteCount) (IfxStdIf_InterfaceDriver stdIf)

Returns the number of free bytes (free space) in the tx buffer.

Parameters
stdif Pointer to the interface driver object
Returns
Returns the number of free bytes in the tx buffer

Definition at line 144 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_GetWriteEvent

typedef IfxStdIf_DPipe_WriteEvent(* IfxStdIf_DPipe_GetWriteEvent) (IfxStdIf_InterfaceDriver stdIf)

Returns write event object.

Parameters
stdif Pointer to the interface driver object
Returns
Returns write event object

Definition at line 152 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_OnError

typedef void(* IfxStdIf_DPipe_OnError) (IfxStdIf_InterfaceDriver stdIf)

handler called on error event

Parameters
stdif Pointer to the interface driver object
Returns
none

Definition at line 219 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_OnReceive

typedef void(* IfxStdIf_DPipe_OnReceive) (IfxStdIf_InterfaceDriver stdIf)

handler called on reveive event

Parameters
stdif Pointer to the interface driver object
Returns
none

Definition at line 205 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_OnTransmit

typedef void(* IfxStdIf_DPipe_OnTransmit) (IfxStdIf_InterfaceDriver stdIf)

handler called on transmit event

Parameters
stdif Pointer to the interface driver object
Returns
none

Definition at line 212 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_Read

typedef boolean(* IfxStdIf_DPipe_Read) (IfxStdIf_InterfaceDriver stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)

Read data from the IfxStdIf_DPipe object.

Initially the parameter 'count' specifies count of data to read. After execution the data pointed by 'count' specifies the data actually read.

Parameters
stdif | Pointer to the interface driver object
data | Pointer to the start of data
count | Pointer to the count of data (in bytes).
timeout | in system timer ticks
Return values
TRUE | Returns TRUE if all items could be read
FALSE | Returns FALSE if not all the items could be read

Definition at line 104 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_ReadEvent

typedef volatile boolean* IfxStdIf_DPipe_ReadEvent

Definition at line 71 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_ResetSendCount

typedef void(* IfxStdIf_DPipe_ResetSendCount) (IfxStdIf_InterfaceDriver stdIf)

Reset the sendCount counter.

Parameters
stdif Pointer to the interface driver object
Returns
none

Definition at line 226 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_Write

typedef boolean(* IfxStdIf_DPipe_Write) (IfxStdIf_InterfaceDriver stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)

Write binary data into the IfxStdIf_DPipe.

Initially the parameter 'count' specifies count of data to write. After execution the data pointed by 'count' specifies the data actually written

Parameters
stdif | Pointer to the interface driver object
data | Pointer to the start of data
count | Pointer to the count of data (in bytes).
timeout | in system timer ticks
Return values
TRUE | Returns TRUE if all items could be written
FALSE | Returns FALSE if not all the items could be written

Definition at line 89 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_WriteEvent

typedef volatile boolean* IfxStdIf_DPipe_WriteEvent

Definition at line 70 of file IfxStdIf_DPipe.h.


iLLD_TC38A: IfxStdIf_Pos.h File Reference

  • Service
  • CpuGeneric
  • StdIf
Data Structures | Typedefs | Enumerations | Functions
IfxStdIf_Pos.h File Reference

Standard interface: Position interface. More...

#include "Cpu/Std/Ifx_Types.h"
#include "IfxStdIf.h"
#include "IfxStdIf_DPipe.h"
Include dependency graph for IfxStdIf_Pos.h:

Go to the source code of this file.

Data Structures

union | IfxStdIf_Pos_Status
Position sensor status definition. More...
struct | IfxStdIf_Pos_
Standard interface object. More...
struct | IfxStdIf_Pos_Config
Position interface configuration. More...
struct | IfxStdIf_Pos_Status.B

Typedefs

typedef sint32 | IfxStdIf_Pos_RawAngle
typedef struct IfxStdIf_Pos_ | IfxStdIf_Pos
Forward declaration. More...
typedef float32(* | IfxStdIf_Pos_GetAbsolutePosition) (IfxStdIf_InterfaceDriver stdIf)
Return the position, inclusive turns. More...
typedef void(* | IfxStdIf_Pos_OnZeroIrq) (IfxStdIf_InterfaceDriver stdIf)
Handles the zero interrupt. More...
typedef sint32(* | IfxStdIf_Pos_GetOffset) (IfxStdIf_InterfaceDriver stdIf)
Return the raw position sensor offset. More...
typedef float32(* | IfxStdIf_Pos_GetPosition) (IfxStdIf_InterfaceDriver stdIf)
Return the position. More...
typedef IfxStdIf_Pos_Dir(* | IfxStdIf_Pos_GetDirection) (IfxStdIf_InterfaceDriver stdIf)
Return the direction. More...
typedef IfxStdIf_Pos_Status(* | IfxStdIf_Pos_GetFault) (IfxStdIf_InterfaceDriver stdIf)
Return the sensor status. More...
typedef uint16(* | IfxStdIf_Pos_GetPeriodPerRotation) (IfxStdIf_InterfaceDriver stdIf)
Return the period per rotation setting. More...
typedef sint32(* | IfxStdIf_Pos_GetRawPosition) (IfxStdIf_InterfaceDriver stdIf)
Return the raw position in ticks. More...
typedef float32(* | IfxStdIf_Pos_GetRefreshPeriod) (IfxStdIf_InterfaceDriver stdIf)
Get the update period. More...
typedef sint32(* | IfxStdIf_Pos_GetResolution) (IfxStdIf_InterfaceDriver stdIf)
Get the resolution. More...
typedef IfxStdIf_Pos_SensorType(* | IfxStdIf_Pos_GetSensorType) (IfxStdIf_InterfaceDriver stdIf)
Get the sensor type. More...
typedef float32(* | IfxStdIf_Pos_GetSpeed) (IfxStdIf_InterfaceDriver stdIf)
Return the speed. More...
typedef sint32(* | IfxStdIf_Pos_GetTurn) (IfxStdIf_InterfaceDriver stdIf)
Return position in turn. More...
typedef void(* | IfxStdIf_Pos_OnEventA) (IfxStdIf_InterfaceDriver stdIf)
Handles the A sensor event Event A is a sensor defined event. it is optional. More...
typedef void(* | IfxStdIf_Pos_Update) (IfxStdIf_InterfaceDriver stdIf)
Refresh the status. More...
typedef void(* | IfxStdIf_Pos_Reset) (IfxStdIf_InterfaceDriver stdIf)
Reset the driver. More...
typedef void(* | IfxStdIf_Pos_ResetFaults) (IfxStdIf_InterfaceDriver stdIf)
Reset the driver fault. More...
typedef void(* | IfxStdIf_Pos_SetOffset) (IfxStdIf_InterfaceDriver stdIf, sint32 offset)
Set the sensor offset. More...
typedef void(* | IfxStdIf_Pos_SetPosition) (IfxStdIf_InterfaceDriver stdIf, float32 position)
Set the sensor position (virtual sensor) More...
typedef void(* | IfxStdIf_Pos_SetRawPosition) (IfxStdIf_InterfaceDriver stdIf, sint32 position)
Set the sensor position (virtual sensor) More...
typedef void(* | IfxStdIf_Pos_SetSpeed) (IfxStdIf_InterfaceDriver stdIf, float32 speed)
Set the sensor speed (virtual sensor) More...
typedef void(* | IfxStdIf_Pos_SetRefreshPeriod) (IfxStdIf_InterfaceDriver stdIf, float32 updatePeriod)
Set the update period. More...

Enumerations

enum IfxStdIf_Pos_MotionType {
IfxStdIf_Pos_MotionType_rotating,
IfxStdIf_Pos_MotionType_linear
}
Output event enable / disable. More...
enum IfxStdIf_Pos_ResolutionFactor {
IfxStdIf_Pos_ResolutionFactor_oneFold = 1,
IfxStdIf_Pos_ResolutionFactor_twoFold = 2,
IfxStdIf_Pos_ResolutionFactor_fourFold = 4
}
Output event enable / disable. More...
enum IfxStdIf_Pos_SensorType {
IfxStdIf_Pos_SensorType_encoder,
IfxStdIf_Pos_SensorType_hall,
IfxStdIf_Pos_SensorType_resolver,
IfxStdIf_Pos_SensorType_angletrk,
IfxStdIf_Pos_SensorType_igmr,
IfxStdIf_Pos_SensorType_virtual
}
Position sensor Types. More...
enum IfxStdIf_Pos_Dir {
IfxStdIf_Pos_Dir_forward,
IfxStdIf_Pos_Dir_backward,
IfxStdIf_Pos_Dir_unknown
}
Position sensor direction definition. More...

Functions

IFX_INLINE void | IfxStdIf_Pos_onZeroIrq (IfxStdIf_Pos *stdIf)
Handles the zero interrupt. More...
IFX_INLINE float32 | IfxStdIf_Pos_getAbsolutePosition (IfxStdIf_Pos *stdIf)
Return the position, inclusive turns. More...
IFX_INLINE IfxStdIf_Pos_Status | IfxStdIf_Pos_getFault (IfxStdIf_Pos *stdIf)
Return the sensor status. MCMETILLD-521 More...
IFX_INLINE sint32 | IfxStdIf_Pos_getOffset (IfxStdIf_Pos *stdIf)
Return the raw position sensor offset. More...
IFX_INLINE float32 | IfxStdIf_Pos_getPosition (IfxStdIf_Pos *stdIf)
Return the position. More...
IFX_INLINE IfxStdIf_Pos_Dir | IfxStdIf_Pos_getDirection (IfxStdIf_Pos *stdIf)
Return the direction. More...
IFX_INLINE uint16 | IfxStdIf_Pos_getPeriodPerRotation (IfxStdIf_Pos *stdIf)
Return the period per rotation setting. More...
IFX_INLINE sint32 | IfxStdIf_Pos_getRawPosition (IfxStdIf_Pos *stdIf)
Return the raw position in ticks. More...
IFX_INLINE float32 | IfxStdIf_Pos_getRefreshPeriod (IfxStdIf_Pos *stdIf)
Get the update period. More...
IFX_INLINE sint32 | IfxStdIf_Pos_getResolution (IfxStdIf_Pos *stdIf)
Get the resolution. More...
IFX_INLINE sint32 | IfxStdIf_Pos_getTurn (IfxStdIf_Pos *stdIf)
Return position in turn. More...
IFX_INLINE IfxStdIf_Pos_SensorType | IfxStdIf_Pos_getSensorType (IfxStdIf_Pos *stdIf)
Get the sensor type. More...
IFX_INLINE float32 | IfxStdIf_Pos_getSpeed (IfxStdIf_Pos *stdIf)
Return the speed. More...
IFX_INLINE boolean | IfxStdIf_Pos_isFault (IfxStdIf_Pos *stdIf)
IFX_INLINE void | IfxStdIf_Pos_onEventA (IfxStdIf_Pos *stdIf)
Handles the A sensor event Event A is a sensor defined event. it is optional. More...
IFX_INLINE void | IfxStdIf_Pos_update (IfxStdIf_Pos *stdIf)
Refresh the status. More...
IFX_INLINE void | IfxStdIf_Pos_reset (IfxStdIf_Pos *stdIf)
Reset the driver. More...
IFX_INLINE void | IfxStdIf_Pos_resetFaults (IfxStdIf_Pos *stdIf)
Reset the driver fault. More...
IFX_INLINE void | IfxStdIf_Pos_setOffset (IfxStdIf_Pos *stdIf, sint32 offset)
Set the sensor offset. More...
IFX_INLINE void | IfxStdIf_Pos_setPosition (IfxStdIf_Pos *stdIf, float32 position)
Set the sensor position (virtual sensor) More...
IFX_INLINE void | IfxStdIf_Pos_setRawPosition (IfxStdIf_Pos *stdIf, sint32 position)
Set the sensor position (virtual sensor) More...
IFX_INLINE void | IfxStdIf_Pos_setSpeed (IfxStdIf_Pos *stdIf, float32 speed)
Set the sensor speed (virtual sensor) More...
IFX_INLINE void | IfxStdIf_Pos_setRefreshPeriod (IfxStdIf_Pos *stdIf, float32 updatePeriod)
Set the update period. More...
IFX_INLINE float32 | IfxStdIf_Pos_radsToRpm (float32 speed)
Converts from rad/s to rpm. More...
IFX_INLINE float32 | IfxStdIf_Pos_rpmToRads (float32 speed)
Converts from rpm to rad/s. More...
IFX_EXTERN void | IfxStdIf_Pos_initConfig (IfxStdIf_Pos_Config *config)
IFX_EXTERN void | IfxStdIf_Pos_printStatus (IfxStdIf_Pos *driver, IfxStdIf_DPipe *io)
Print the device status. More...

Detailed Description

Standard interface: Position interface.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxStdIf_Pos.h.

Data Structure Documentation

◆ IfxStdIf_Pos_Status

union IfxStdIf_Pos_Status

Position sensor status definition.

Definition at line 100 of file IfxStdIf_Pos.h.

Data Fields
struct IfxStdIf_Pos_Status | B | Bitfielf status access.
uint32 | status | Global status access.

◆ IfxStdIf_Pos_

struct IfxStdIf_Pos_

Standard interface object.

Definition at line 283 of file IfxStdIf_Pos.h.

Collaboration diagram for IfxStdIf_Pos_:
[legend]
Data Fields
IfxStdIf_InterfaceDriver | driver | Interface driver object.
IfxStdIf_Pos_GetAbsolutePosition | getAbsolutePosition | Return the absolute position.
IfxStdIf_Pos_GetDirection getDirection
See also
IfxStdIf_Pos_GetDirection
IfxStdIf_Pos_GetFault getFault
See also
IfxStdIf_Pos_GetFault
IfxStdIf_Pos_GetOffset getOffset
See also
IfxStdIf_Pos_GetOffset
IfxStdIf_Pos_GetPeriodPerRotation getPeriodPerRotation
See also
IfxStdIf_Pos_GetPeriodPerRotation
IfxStdIf_Pos_GetPosition getPosition
See also
IfxStdIf_Pos_GetPosition
IfxStdIf_Pos_GetRawPosition getRawPosition
See also
IfxStdIf_Pos_GetRawPosition
IfxStdIf_Pos_GetRefreshPeriod getRefreshPeriod
See also
IfxStdIf_Pos_GetRefreshPeriod
IfxStdIf_Pos_GetResolution getResolution
See also
IfxStdIf_Pos_GetResolution
IfxStdIf_Pos_GetSensorType getSensorType
See also
IfxStdIf_Pos_GetSensorType
IfxStdIf_Pos_GetSpeed getSpeed
See also
IfxStdIf_Pos_GetSpeed
IfxStdIf_Pos_GetTurn getTurn
See also
IfxStdIf_Pos_GetTurn
IfxStdIf_Pos_OnEventA onEventA
See also
IfxStdIf_Pos_OnEventA
IfxStdIf_Pos_OnZeroIrq onZeroIrq
See also
IfxStdIf_Pos_OnZeroIrq
IfxStdIf_Pos_Reset reset
See also
IfxStdIf_Pos_Reset
IfxStdIf_Pos_ResetFaults resetFaults
See also
IfxStdIf_Pos_ResetFaults
IfxStdIf_Pos_SetOffset setOffset
See also
IfxStdIf_Pos_SetOffset
IfxStdIf_Pos_SetPosition setPosition
See also
IfxStdIf_Pos_SetPosition
IfxStdIf_Pos_SetRawPosition setRawPosition
See also
IfxStdIf_Pos_SetRawPosition
IfxStdIf_Pos_SetRefreshPeriod setRefreshPeriod
See also
IfxStdIf_Pos_SetRefreshPeriod
IfxStdIf_Pos_SetSpeed setSpeed
See also
IfxStdIf_Pos_SetSpeed
IfxStdIf_Pos_Update update
See also
IfxStdIf_Pos_Update

◆ IfxStdIf_Pos_Config

struct IfxStdIf_Pos_Config

Position interface configuration.

Definition at line 311 of file IfxStdIf_Pos.h.

Data Fields
float32 | maxSpeed | Absolute maximal allowed speed. Above speed is recognized as error.
float32 | minSpeed | Absolute minimal allowed speed. below speed is recognized as 0rad/s.
sint32 | offset | Position sensor offset.
uint16 | periodPerRotation | Number of period per rotation. Is usually 1 for encoder.
sint32 | resolution | Sensor resolution. For encoder with 1024 pulse per revolution, the value should be 1024.
IfxStdIf_Pos_ResolutionFactor | resolutionFactor | Resolution multiplier for encoder interface, valid is 2, 4.
boolean | reversed | If true, the sensor direction is reversed.
float32 | speedFilerCutOffFrequency | Speed low pass filter cut off frequency.
boolean | speedFilterEnabled | Enable / disable the speed low pass filter.
float32 | speedModeThreshold | Speed threshold used for the speed calculation mode. For encoder, above the threshold the pulse count mode is used, below the threshold, the time delta is used.
float32 | updatePeriod | period in seconds, at which the application calls IfxStdIf_Pos_update()

◆ IfxStdIf_Pos_Status.B

struct IfxStdIf_Pos_Status.B

Definition at line 103 of file IfxStdIf_Pos.h.

Data Fields
uint32 | commError: 1 | Communication error.
uint32 | notSynchronised: 1 | Sensor is not synchronized.
uint32 | signalDegradation: 1 | Signal degradation warning.
uint32 | signalLoss: 1 | Loss of signal error.
uint32 | trackingLoss: 1 | Tracking loss error.

Typedef Documentation

◆ IfxStdIf_Pos

typedef struct IfxStdIf_Pos_ IfxStdIf_Pos

Forward declaration.

Definition at line 116 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_GetAbsolutePosition

typedef float32(* IfxStdIf_Pos_GetAbsolutePosition) (IfxStdIf_InterfaceDriver stdIf)

Return the position, inclusive turns.

Return the sensor position in rad for rotating sensor inclusive turns, or in m for linear sensors. For linear sensor the effect is the same as IfxStdIf_Pos_GetPosition.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the position inclusive turns in rad

Definition at line 126 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_GetDirection

typedef IfxStdIf_Pos_Dir(* IfxStdIf_Pos_GetDirection) (IfxStdIf_InterfaceDriver stdIf)

Return the direction.

Return the sensor direction.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the direction

Definition at line 158 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_GetFault

typedef IfxStdIf_Pos_Status(* IfxStdIf_Pos_GetFault) (IfxStdIf_InterfaceDriver stdIf)

Return the sensor status.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the sensor status

Definition at line 165 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_GetOffset

typedef sint32(* IfxStdIf_Pos_GetOffset) (IfxStdIf_InterfaceDriver stdIf)

Return the raw position sensor offset.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the raw position sensor offset sensor in ticks

Definition at line 139 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_GetPeriodPerRotation

typedef uint16(* IfxStdIf_Pos_GetPeriodPerRotation) (IfxStdIf_InterfaceDriver stdIf)

Return the period per rotation setting.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the period per rotation setting

Definition at line 172 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_GetPosition

typedef float32(* IfxStdIf_Pos_GetPosition) (IfxStdIf_InterfaceDriver stdIf)

Return the position.

Return the sensor position in rad for rotating sensor or in m for linear sensors. For rotating sensor, the position is always between 0 and 2*IFX_PI.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the position in rad or m

Definition at line 149 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_GetRawPosition

typedef sint32(* IfxStdIf_Pos_GetRawPosition) (IfxStdIf_InterfaceDriver stdIf)

Return the raw position in ticks.

Return the sensor raw position in ticks.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the raw position in ticks

Definition at line 181 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_GetRefreshPeriod

typedef float32(* IfxStdIf_Pos_GetRefreshPeriod) (IfxStdIf_InterfaceDriver stdIf)

Get the update period.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the update period in s

Definition at line 187 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_GetResolution

typedef sint32(* IfxStdIf_Pos_GetResolution) (IfxStdIf_InterfaceDriver stdIf)

Get the resolution.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the resolution

Definition at line 193 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_GetSensorType

typedef IfxStdIf_Pos_SensorType(* IfxStdIf_Pos_GetSensorType) (IfxStdIf_InterfaceDriver stdIf)

Get the sensor type.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the sensor type

Definition at line 199 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_GetSpeed

typedef float32(* IfxStdIf_Pos_GetSpeed) (IfxStdIf_InterfaceDriver stdIf)

Return the speed.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the speed in rad/s or m/s

Definition at line 205 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_GetTurn

typedef sint32(* IfxStdIf_Pos_GetTurn) (IfxStdIf_InterfaceDriver stdIf)

Return position in turn.

Parameters
stdIf Pointer to the interface driver object
Returns
Return position in turn

Definition at line 211 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_OnEventA

typedef void(* IfxStdIf_Pos_OnEventA) (IfxStdIf_InterfaceDriver stdIf)

Handles the A sensor event Event A is a sensor defined event. it is optional.

Parameters
stdIf Pointer to the interface driver object
Returns
none

Definition at line 218 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_OnZeroIrq

typedef void(* IfxStdIf_Pos_OnZeroIrq) (IfxStdIf_InterfaceDriver stdIf)

Handles the zero interrupt.

Parameters
stdIf Pointer to the interface driver object
Returns
none

Definition at line 132 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_RawAngle

typedef sint32 IfxStdIf_Pos_RawAngle

Definition at line 113 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_Reset

typedef void(* IfxStdIf_Pos_Reset) (IfxStdIf_InterfaceDriver stdIf)

Reset the driver.

Clear faults, reset speed and position to 0

Parameters
stdIf Pointer to the interface driver object
Returns
None

Definition at line 236 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_ResetFaults

typedef void(* IfxStdIf_Pos_ResetFaults) (IfxStdIf_InterfaceDriver stdIf)

Reset the driver fault.

Clear faults

Parameters
stdIf Pointer to the interface driver object
Returns
None

Definition at line 245 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_SetOffset

typedef void(* IfxStdIf_Pos_SetOffset) (IfxStdIf_InterfaceDriver stdIf, sint32 offset)

Set the sensor offset.

Parameters
stdIf | Pointer to the interface driver object
offset | Offset in sensor ticks
Returns
None

Definition at line 252 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_SetPosition

typedef void(* IfxStdIf_Pos_SetPosition) (IfxStdIf_InterfaceDriver stdIf, float32 position)

Set the sensor position (virtual sensor)

Parameters
stdIf | Pointer to the interface driver object
position | Position sensor rad
Returns
None

Definition at line 259 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_SetRawPosition

typedef void(* IfxStdIf_Pos_SetRawPosition) (IfxStdIf_InterfaceDriver stdIf, sint32 position)

Set the sensor position (virtual sensor)

Parameters
stdIf | Pointer to the interface driver object
position | Position sensor ticks
Returns
None

Definition at line 265 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_SetRefreshPeriod

typedef void(* IfxStdIf_Pos_SetRefreshPeriod) (IfxStdIf_InterfaceDriver stdIf, float32 updatePeriod)

Set the update period.

Parameters
stdIf | Pointer to the interface driver object
updatePeriod | Refresh period in s
Returns
None

Definition at line 279 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_SetSpeed

typedef void(* IfxStdIf_Pos_SetSpeed) (IfxStdIf_InterfaceDriver stdIf, float32 speed)

Set the sensor speed (virtual sensor)

Parameters
stdIf | Pointer to the interface driver object
speed | speed in rad/s
Returns
None

Definition at line 272 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_Update

typedef void(* IfxStdIf_Pos_Update) (IfxStdIf_InterfaceDriver stdIf)

Refresh the status.

Update the stdIf state like speed, position, status, taking into account the updatePeriod

Parameters
stdIf Pointer to the interface driver object
Returns
None

Definition at line 227 of file IfxStdIf_Pos.h.

Enumeration Type Documentation

◆ IfxStdIf_Pos_Dir

enum IfxStdIf_Pos_Dir

Position sensor direction definition.

Enumerator
IfxStdIf_Pos_Dir_forward | Forward direction. For rotating position sensor, forward is clockwise rotation.
IfxStdIf_Pos_Dir_backward | Backward direction. For rotating position sensor, fackward is counter-clockwise rotation.
IfxStdIf_Pos_Dir_unknown | Unknown direction.

Definition at line 92 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_MotionType

enum IfxStdIf_Pos_MotionType

Output event enable / disable.

Enumerator
IfxStdIf_Pos_MotionType_rotating | Rotating sensor.
IfxStdIf_Pos_MotionType_linear | Linear sensor.

Definition at line 66 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_ResolutionFactor

enum IfxStdIf_Pos_ResolutionFactor

Output event enable / disable.

Enumerator
IfxStdIf_Pos_ResolutionFactor_oneFold | Default, no multipluication factor.
IfxStdIf_Pos_ResolutionFactor_twoFold | 2-fold resolution. Valid for encoder
IfxStdIf_Pos_ResolutionFactor_fourFold | 4-fold resolution. Valid for encoder

Definition at line 73 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_SensorType

enum IfxStdIf_Pos_SensorType

Position sensor Types.

Enumerator
IfxStdIf_Pos_SensorType_encoder
IfxStdIf_Pos_SensorType_hall
IfxStdIf_Pos_SensorType_resolver
IfxStdIf_Pos_SensorType_angletrk
IfxStdIf_Pos_SensorType_igmr
IfxStdIf_Pos_SensorType_virtual

Definition at line 81 of file IfxStdIf_Pos.h.

Function Documentation

◆ IfxStdIf_Pos_initConfig()

IFX_EXTERN void IfxStdIf_Pos_initConfig ( IfxStdIf_Pos_Config * config )

Initialize the configuration structure to default

Parameters
config Position interface configuration. This parameter is initialized by the function

Definition at line 45 of file IfxStdIf_Pos.c.

Referenced by IfxGpt12_IncrEnc_initConfig().

◆ IfxStdIf_Pos_printStatus()

IFX_EXTERN void IfxStdIf_Pos_printStatus | ( | IfxStdIf_Pos * | driver,
 |  | IfxStdIf_DPipe * | io
 | ) |  |

Print the device status.

Parameters
driver | driver handle
io | Interface to which the status is output
Returns
none

Definition at line 61 of file IfxStdIf_Pos.c.

◆ IfxStdIf_Pos_radsToRpm()

IFX_INLINE float32 IfxStdIf_Pos_radsToRpm ( float32 speed )

Converts from rad/s to rpm.

Parameters
speed Specifies the speed in rad/s.
Returns
returns the converted speed in rpm.
See also
IfxStdIf_Pos_rpmToRads()

Definition at line 545 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_rpmToRads()

IFX_INLINE float32 IfxStdIf_Pos_rpmToRads ( float32 speed )

Converts from rpm to rad/s.

Parameters
speed Specifies the speed in rpm.
Returns
returns the converted speed in rad/s.
See also
IfxStdIf_Pos_radsToRpm()

Definition at line 558 of file IfxStdIf_Pos.h.


iLLD_TC38A: IfxStdIf_PwmHl.h File Reference

  • Service
  • CpuGeneric
  • StdIf
Data Structures | Typedefs | Functions
IfxStdIf_PwmHl.h File Reference

Standard interface: Multi-channels, dual-complementary PWM interface. More...

#include "IfxStdIf.h"
#include "IfxStdIf_Timer.h"
Include dependency graph for IfxStdIf_PwmHl.h:

Go to the source code of this file.

Data Structures

struct | IfxStdIf_PwmHl_
Standard interface object. More...
struct | IfxStdIf_PwmHl_Config
Multi-channels PWM object configuration. More...

Typedefs

typedef struct IfxStdIf_PwmHl_ | IfxStdIf_PwmHl
Forward declaration. More...
typedef boolean(* | IfxStdIf_PwmHl_SetDeadtime) (IfxStdIf_InterfaceDriver stdIf, float32 deadtime)
Set the dead time in s. More...
typedef float32(* | IfxStdIf_PwmHl_GetDeadtime) (IfxStdIf_InterfaceDriver stdIf)
Return the dead time in s. More...
typedef float32(* | IfxStdIf_PwmHl_GetDeadtimeTick) (IfxStdIf_InterfaceDriver stdIf)
Return the dead time ticks in s. More...
typedef boolean(* | IfxStdIf_PwmHl_SetMinPulse) (IfxStdIf_InterfaceDriver stdIf, float32 minPulse)
Set the minimum pulse time in s. More...
typedef float32(* | IfxStdIf_PwmHl_GetMinPulse) (IfxStdIf_InterfaceDriver stdIf)
Return the minimum pulse time in s. More...
typedef Ifx_Pwm_Mode(* | IfxStdIf_PwmHl_GetMode) (IfxStdIf_InterfaceDriver stdIf)
Return the PWM mode. More...
typedef boolean(* | IfxStdIf_PwmHl_SetMode) (IfxStdIf_InterfaceDriver stdIf, Ifx_Pwm_Mode mode)
Set the pwm mode. More...
typedef void(* | IfxStdIf_PwmHl_SetOnTime) (IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue *tOn)
Set the pwm ON time. More...
typedef void(* | IfxStdIf_PwmHl_SetOnTimeAndShift) (IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Set the pwm ON time and shift value. More...
typedef void(* | IfxStdIf_PwmHl_SetPulse) (IfxStdIf_InterfaceDriver stdIf, float32 *tOn, float32 *offset)
Set the pwm pulse of all switched independently. More...
typedef void(* | IfxStdIf_PwmHl_SetupChannels) (IfxStdIf_InterfaceDriver stdIf, boolean *activeCh, boolean *stuckSt)
Set channels which are generating PWM or in "stuck-at" state. More...

Functions

IFX_INLINE boolean | IfxStdIf_PwmHl_setDeadtime (IfxStdIf_PwmHl *stdIf, float32 deadtime)
Set the dead time in s. More...
IFX_INLINE float32 | IfxStdIf_PwmHl_getDeadtimetick (IfxStdIf_PwmHl *stdIf)
Set the dead time in s. More...
IFX_INLINE float32 | IfxStdIf_PwmHl_getDeadtime (IfxStdIf_PwmHl *stdIf)
Return the dead time in s. More...
IFX_INLINE boolean | IfxStdIf_PwmHl_setMinPulse (IfxStdIf_PwmHl *stdIf, float32 minPulse)
Set the minimum pulse time in s. More...
IFX_INLINE float32 | IfxStdIf_PwmHl_getMinPulse (IfxStdIf_PwmHl *stdIf)
Return the minimum pulse time in s. More...
IFX_INLINE Ifx_Pwm_Mode | IfxStdIf_PwmHl_getMode (IfxStdIf_PwmHl *stdIf)
Return the PWM mode. More...
IFX_INLINE boolean | IfxStdIf_PwmHl_setMode (IfxStdIf_PwmHl *stdIf, Ifx_Pwm_Mode mode)
Set the pwm mode. More...
IFX_INLINE void | IfxStdIf_PwmHl_setOnTime (IfxStdIf_PwmHl *stdIf, Ifx_TimerValue *tOn)
Set the pwm ON time. More...
IFX_INLINE void | IfxStdIf_PwmHl_setOnTimeAndShift (IfxStdIf_PwmHl *stdIf, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Set the pwm ON time and shift value. More...
IFX_INLINE void | IfxStdIf_PwmHl_setPulse (IfxStdIf_PwmHl *stdIf, float32 *tOn, float32 *offset)
Set the pwm pulse of all switched independently. More...
IFX_INLINE void | IfxStdIf_PwmHl_setupChannels (IfxStdIf_PwmHl *stdIf, boolean *activeCh, boolean *stuckSt)
Set channels which are generating PWM or in "stuck-at" state. More...
IFX_INLINE IfxStdIf_Timer * | IfxStdIf_PwmHl_getTimer (IfxStdIf_PwmHl *stdIf)
Return the timer standard interface used by the IfxStdIf_PwmHl standard interface. More...
IFX_EXTERN void | IfxStdIf_PwmHl_initConfig (IfxStdIf_PwmHl_Config *config)

Detailed Description

Standard interface: Multi-channels, dual-complementary PWM interface.

Version
disabled
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxStdIf_PwmHl.h.

Data Structure Documentation

◆ IfxStdIf_PwmHl_

struct IfxStdIf_PwmHl_

Standard interface object.

Definition at line 179 of file IfxStdIf_PwmHl.h.

Collaboration diagram for IfxStdIf_PwmHl_:
[legend]
Data Fields
IfxStdIf_InterfaceDriver | driver | Interface driver object.
IfxStdIf_PwmHl_GetDeadtime | getDeadtime | IfxStdIf_PwmHl_GetDeadtime.
IfxStdIf_PwmHl_GetDeadtimeTick | getDeadtimeTick | IfxStdIf_PwmHl_GetDeadtimetick
IfxStdIf_PwmHl_GetMinPulse | getMinPulse | IfxStdIf_PwmHl_GetMinPulse.
IfxStdIf_PwmHl_GetMode | getMode | IfxStdIf_PwmHl_GetMode.
IfxStdIf_PwmHl_SetDeadtime | setDeadtime | IfxStdIf_PwmHl_SetDeadtime.
IfxStdIf_PwmHl_SetMinPulse | setMinPulse | IfxStdIf_PwmHl_SetMinPulse.
IfxStdIf_PwmHl_SetMode | setMode | IfxStdIf_PwmHl_SetMode.
IfxStdIf_PwmHl_SetOnTime | setOnTime | IfxStdIf_PwmHl_SetOnTime.
IfxStdIf_PwmHl_SetOnTimeAndShift | setOnTimeAndShift | IfxStdIf_PwmHl_SetOnTime.
IfxStdIf_PwmHl_SetPulse | setPulse | IfxStdIf_PwmHl_Pulse.
IfxStdIf_PwmHl_SetupChannels | setupChannels | IfxStdIf_PwmHl_SetupChannels.
IfxStdIf_Timer | timer | Timer related standard interface.

◆ IfxStdIf_PwmHl_Config

struct IfxStdIf_PwmHl_Config

Multi-channels PWM object configuration.

Definition at line 200 of file IfxStdIf_PwmHl.h.

Data Fields
Ifx_ActiveState | ccxActiveState | Top PWM active state.
Ifx_ActiveState | ccxOutputEnabled |
uint8 | channelCount | Number of PWM channels, one channel is made of a top and bottom channel.
Ifx_ActiveState | coutxActiveState | Bottom PWM active state.
Ifx_ActiveState | coutxOutputEnabled |
float32 | deadtime | Dead time between the top and bottom channels in seconds.
boolean | emergencyEnabled | Specifies if the emergency stop should be enabled or not.
float32 | minPulse | Min pulse allowed as active state for the top and bottom PWM in seconds.
IfxPort_PadDriver | outputDriver | Output pad driver of ccx and coutx pins.
IfxPort_OutputMode | outputMode | Output mode of ccx and coutx pins.

Typedef Documentation

◆ IfxStdIf_PwmHl

typedef struct IfxStdIf_PwmHl_ IfxStdIf_PwmHl

Forward declaration.

Definition at line 78 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_GetDeadtime

typedef float32(* IfxStdIf_PwmHl_GetDeadtime) (IfxStdIf_InterfaceDriver stdIf)

Return the dead time in s.

It returns the last dead time values set by IfxStdIf_PwmHl_SetDeadtime() or during initialisation

Parameters
stdIf Pointer to the interface driver object
Returns
Returns the deadtime in second

Definition at line 94 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_GetDeadtimeTick

typedef float32(* IfxStdIf_PwmHl_GetDeadtimeTick) (IfxStdIf_InterfaceDriver stdIf)

Return the dead time ticks in s.

It returns the last dead time tick values set by IfxStdIf_PwmHl_SetDeadtime() or during initialisation

Parameters
stdIf Pointer to the interface driver object
Returns
Returns the deadtime in second

Definition at line 102 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_GetMinPulse

typedef float32(* IfxStdIf_PwmHl_GetMinPulse) (IfxStdIf_InterfaceDriver stdIf)

Return the minimum pulse time in s.

It returns the last minimum pulse time values set by IfxStdIf_PwmHl_SetMinPulse() or during initialisation

Parameters
stdIf Pointer to the interface driver object
Returns
Returns the minimum pulse time in second

Definition at line 117 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_GetMode

typedef Ifx_Pwm_Mode(* IfxStdIf_PwmHl_GetMode) (IfxStdIf_InterfaceDriver stdIf)

Return the PWM mode.

It returns the last pwm mode set by IfxStdIf_PwmHl_SetMode() or during initialisation

Parameters
stdIf Pointer to the interface driver object
Returns
Returns the pwm mode

Definition at line 125 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_SetDeadtime

typedef boolean(* IfxStdIf_PwmHl_SetDeadtime) (IfxStdIf_InterfaceDriver stdIf, float32 deadtime)

Set the dead time in s.

Parameters
stdIf | Pointer to the interface driver object
deadtime | deadtime in second
Return values
TRUE | In case of success
FALSE | In case of failure

Definition at line 86 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_SetMinPulse

typedef boolean(* IfxStdIf_PwmHl_SetMinPulse) (IfxStdIf_InterfaceDriver stdIf, float32 minPulse)

Set the minimum pulse time in s.

Parameters
stdIf | Pointer to the interface driver object
minPulse | minimal pulse in second
Return values
TRUE | In case of success
FALSE | In case of failure

Definition at line 109 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_SetMode

typedef boolean(* IfxStdIf_PwmHl_SetMode) (IfxStdIf_InterfaceDriver stdIf, Ifx_Pwm_Mode mode)

Set the pwm mode.

Parameters
stdIf | Pointer to the interface driver object
mode | PWM mode
Return values
TRUE | In case of success
FALSE | In case of failure (feature not supported)

Definition at line 133 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_SetOnTime

typedef void(* IfxStdIf_PwmHl_SetOnTime) (IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue *tOn)

Set the pwm ON time.

Parameters
stdIf | Pointer to the interface driver object
tOn | Pointer to an array of ON times in ticks. The array size must be equal to the number of PWM channels
Returns
none

Definition at line 140 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_SetOnTimeAndShift

typedef void(* IfxStdIf_PwmHl_SetOnTimeAndShift) (IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)

Set the pwm ON time and shift value.

Parameters
stdIf | Pointer to the interface driver object
tOn | Pointer to an array of ON times in ticks. The array size must be equal to the number of PWM channels
shift | Pointer to an array of shift values in ticks. The array size must be equal to the number of PWM channels
Returns
none

Definition at line 148 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_SetPulse

typedef void(* IfxStdIf_PwmHl_SetPulse) (IfxStdIf_InterfaceDriver stdIf, float32 *tOn, float32 *offset)

Set the pwm pulse of all switched independently.

Parameters
stdIf | Pointer to the interface driver object
tOn | Pointer to an array of ON times in s. The array size must be equal to the number of PWM channels times 2. Parameters order is Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
offset | Pointer to an array of offset values in s. The array size must be equal to the number of PWM channels times 2. Parameters order is Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
Returns
none

Definition at line 156 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_SetupChannels

typedef void(* IfxStdIf_PwmHl_SetupChannels) (IfxStdIf_InterfaceDriver stdIf, boolean *activeCh, boolean *stuckSt)

Set channels which are generating PWM or in "stuck-at" state.

Parameters
stdIf | Pointer to the interface driver object
activeCh | Pointer to boolean array containing values for PWM channels. If FALSE, the channel will be in stuck-at state, else the channel will generate PWM.
stuckSt | Pointer to boolean array containing values for active channels. If FALSE, the stuck-at state is passive level, else the stuck-at state is active level.
Note
The values for the parameters are arranged as follows: index = 0 –> phase 0 top index = 1 –> phase 0 bottom index = 2 –> phase 1 top index = 3 –> phase 1 bottom index = 4 –> phase 2 top index = 5 –> phase 2 bottom

Definition at line 175 of file IfxStdIf_PwmHl.h.


iLLD_TC38A: IfxStdIf_Timer.h File Reference

  • Service
  • CpuGeneric
  • StdIf
Data Structures | Typedefs | Enumerations | Functions
IfxStdIf_Timer.h File Reference

Standard interface: Timer. More...

#include "Cpu/Std/Ifx_Types.h"
#include "Src/Std/IfxSrc.h"
#include "Port/Std/IfxPort.h"
#include "IfxStdIf.h"
Include dependency graph for IfxStdIf_Timer.h:

Go to the source code of this file.

Data Structures

struct | IfxStdIf_Timer_
Standard interface object. More...
struct | IfxStdIf_Timer_TrigConfig
Trigger configuration. More...
struct | IfxStdIf_Timer_Config
Timer configuration. More...

Typedefs

typedef struct IfxStdIf_Timer_ | IfxStdIf_Timer
Forward declaration. More...
typedef float32(* | IfxStdIf_Timer_GetFrequency) (IfxStdIf_InterfaceDriver stdIf)
Return the timer frequency in Hz. More...
typedef Ifx_TimerValue(* | IfxStdIf_Timer_GetPeriod) (IfxStdIf_InterfaceDriver stdIf)
Return the timer period in ticks. More...
typedef float32(* | IfxStdIf_Timer_GetResolution) (IfxStdIf_InterfaceDriver stdIf)
Return the timer resolution in seconds. More...
typedef Ifx_TimerValue(* | IfxStdIf_Timer_GetTrigger) (IfxStdIf_InterfaceDriver stdIf)
Return the timer trigger point. More...
typedef boolean(* | IfxStdIf_Timer_SetFrequency) (IfxStdIf_InterfaceDriver stdIf, float32 frequency)
Set the timer frequency in Hz. More...
typedef void(* | IfxStdIf_Timer_UpdateInputFrequency) (IfxStdIf_InterfaceDriver stdIf)
Indicates the stdIf that the imput frequency has changed and that it should be taken in account. More...
typedef void(* | IfxStdIf_Timer_ApplyUpdate) (IfxStdIf_InterfaceDriver stdIf)
Apply requested updates. More...
typedef void(* | IfxStdIf_Timer_DisableUpdate) (IfxStdIf_InterfaceDriver stdIf)
Disable updates. More...
typedef float32(* | IfxStdIf_Timer_GetInputFrequency) (IfxStdIf_InterfaceDriver stdIf)
Return the timer input frequency in Hz. More...
typedef void(* | IfxStdIf_Timer_Run) (IfxStdIf_InterfaceDriver stdIf)
Immediately start the timer. More...
typedef boolean(* | IfxStdIf_Timer_SetPeriod) (IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue period)
Set the timer period. More...
typedef void(* | IfxStdIf_Timer_SetSingleMode) (IfxStdIf_InterfaceDriver stdIf, boolean enabled)
Stop timer at the end of the period. More...
typedef void(* | IfxStdIf_Timer_SetTrigger) (IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue triggerPoint)
Set trigger point. More...
typedef void(* | IfxStdIf_Timer_Stop) (IfxStdIf_InterfaceDriver stdIf)
Immediately stops the timer. More...
typedef boolean(* | IfxStdIf_Timer_AckTimerIrq) (IfxStdIf_InterfaceDriver stdIf)
Return the timer interrupt flag and reset it. More...
typedef boolean(* | IfxStdIf_Timer_AckTriggerIrq) (IfxStdIf_InterfaceDriver stdIf)
Return the trigger interrupt flag and reset it. More...

Enumerations

enum IfxStdIf_Timer_OutputEvent {
IfxStdIf_Timer_Output_disabled,
IfxStdIf_Timer_Output_enabled
}
Output event enable / disable. More...
enum IfxStdIf_Timer_CountDir {
IfxStdIf_Timer_CountDir_up,
IfxStdIf_Timer_CountDir_upAndDown,
IfxStdIf_Timer_CountDir_down
}
Timer increment direction. More...

Functions

IFX_INLINE float32 | IfxStdIf_Timer_getFrequency (IfxStdIf_Timer *stdIf)
Return the timer frequency in Hz. More...
IFX_INLINE Ifx_TimerValue | IfxStdIf_Timer_getPeriod (IfxStdIf_Timer *stdIf)
Return the timer period in ticks. More...
IFX_INLINE Ifx_TimerValue | IfxStdIf_Timer_getTrigger (IfxStdIf_Timer *stdIf)
Return the timer trigger point. More...
IFX_INLINE float32 | IfxStdIf_Timer_getResolution (IfxStdIf_Timer *stdIf)
Return the timer resolution in seconds. More...
IFX_INLINE boolean | IfxStdIf_Timer_setFrequency (IfxStdIf_Timer *stdIf, float32 frequency)
Set the timer frequency in Hz. More...
IFX_INLINE void | IfxStdIf_Timer_updateInputFrequency (IfxStdIf_Timer *stdIf)
Indicates the stdIf that the imput frequency has changed and that it should be taken in account. More...
IFX_INLINE void | IfxStdIf_Timer_applyUpdate (IfxStdIf_Timer *stdIf)
Apply requested updates. More...
IFX_INLINE void | IfxStdIf_Timer_disableUpdate (IfxStdIf_Timer *stdIf)
Disable updates. More...
IFX_INLINE float32 | IfxStdIf_Timer_getInputFrequency (IfxStdIf_Timer *stdIf)
Return the timer input frequency in Hz. More...
IFX_INLINE void | IfxStdIf_Timer_run (IfxStdIf_Timer *stdIf)
Immediately start the timer. More...
IFX_INLINE boolean | IfxStdIf_Timer_setPeriod (IfxStdIf_Timer *stdIf, Ifx_TimerValue period)
Set the timer period. More...
IFX_INLINE void | IfxStdIf_Timer_setSingleMode (IfxStdIf_Timer *stdIf, boolean enabled)
Stop timer at the end of the period. More...
IFX_INLINE void | IfxStdIf_Timer_setTrigger (IfxStdIf_Timer *stdIf, Ifx_TimerValue triggerPoint)
Set trigger point. More...
IFX_INLINE void | IfxStdIf_Timer_stop (IfxStdIf_Timer *stdIf)
Immediately stops the timer. More...
IFX_INLINE boolean | IfxStdIf_Timer_ackTimerIrq (IfxStdIf_Timer *stdIf)
Return the timer interrupt flag and reset it. More...
IFX_INLINE boolean | IfxStdIf_Timer_ackTriggerIrq (IfxStdIf_Timer *stdIf)
Return the trigger interrupt flag and reset it. More...
IFX_INLINE float32 | IfxStdIf_Timer_tickToS (float32 clockFreq, Ifx_TimerValue ticks)
Convert timer ticks to seconds. More...
IFX_INLINE Ifx_TimerValue | IfxStdIf_Timer_sToTick (float32 clockFreq, float32 seconds)
Convert seconds to timer ticks. More...
IFX_INLINE float32 | IfxStdIf_Timer_getPeriodSecond (IfxStdIf_Timer *stdIf)
Return the timer period in second. More...
IFX_EXTERN void | IfxStdIf_Timer_initConfig (IfxStdIf_Timer_Config *config)
IFX_EXTERN void | IfxStdIf_Timer_initStdIf (IfxStdIf_Timer *stdIf, IfxStdIf_InterfaceDriver driver)

Detailed Description

Standard interface: Timer.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxStdIf_Timer.h.

Data Structure Documentation

◆ IfxStdIf_Timer_

struct IfxStdIf_Timer_

Standard interface object.

Definition at line 237 of file IfxStdIf_Timer.h.

Data Fields
IfxStdIf_Timer_AckTimerIrq ackTimerIrq
See also
IfxStdIf_Timer_AckTimerIrq
IfxStdIf_Timer_AckTriggerIrq ackTriggerIrq
See also
IfxStdIf_Timer_AckTriggerIrq
IfxStdIf_Timer_ApplyUpdate applyUpdate
See also
IfxStdIf_Timer_ApplyUpdate
IfxStdIf_Timer_DisableUpdate disableUpdate
See also
IfxStdIf_Timer_DisableUpdate
IfxStdIf_InterfaceDriver driver Interface driver object.
IfxStdIf_Timer_GetFrequency getFrequency
See also
IfxStdIf_Timer_GetFrequency
IfxStdIf_Timer_GetInputFrequency getInputFrequency
See also
IfxStdIf_Timer_GetInputFrequency
IfxStdIf_Timer_GetPeriod getPeriod
See also
IfxStdIf_Timer_GetPeriod
IfxStdIf_Timer_GetResolution getResolution
See also
IfxStdIf_Timer_GetResolution
IfxStdIf_Timer_GetTrigger getTrigger
See also
IfxStdIf_Timer_GetTrigger
IfxStdIf_Timer_Run run
See also
IfxStdIf_Timer_Run
IfxStdIf_Timer_SetFrequency setFrequency
See also
IfxStdIf_Timer_SetFrequency
IfxStdIf_Timer_SetPeriod setPeriod
See also
IfxStdIf_Timer_SetPeriod
IfxStdIf_Timer_SetSingleMode setSingleMode
See also
IfxStdIf_Timer_SetSingleMode
IfxStdIf_Timer_SetTrigger setTrigger
See also
IfxStdIf_Timer_SetTrigger
IfxStdIf_Timer_Stop stop
See also
IfxStdIf_Timer_Stop
IfxStdIf_Timer_UpdateInputFrequency updateInputFrequency
See also
IfxStdIf_Timer_UpdateInputFrequency

◆ IfxStdIf_Timer_TrigConfig

struct IfxStdIf_Timer_TrigConfig

Trigger configuration.

Definition at line 259 of file IfxStdIf_Timer.h.

Data Fields
boolean | enabled | If true, the trigger functionality is Initialised, else ignored.
Ifx_Priority | isrPriority | Interrupt isrPriority of the trigger interrupt, if 0 the interrupt is disable.
IfxSrc_Tos | isrProvider | Interrupt service provider for the trigger interrupt.
IfxPort_PadDriver | outputDriver | Output pad driver.
boolean | outputEnabled | If TRUE, the output pin is enabled, else disabled. In case the output is disabled, the output pin is not initialized.
IfxPort_OutputMode | outputMode | Output mode.
boolean | risingEdgeAtPeriod | Set the clock signal polarity, if TRUE, the rising edge is at the period, else at the trigger offset. When the timer is stopped, the output is set to high.
Ifx_TimerValue | triggerPoint | Trigger point in timer ticks.

◆ IfxStdIf_Timer_Config

struct IfxStdIf_Timer_Config

Timer configuration.

Definition at line 272 of file IfxStdIf_Timer.h.

Collaboration diagram for IfxStdIf_Timer_Config:
[legend]
Data Fields
IfxStdIf_Timer_CountDir | countDir | Timer counting mode.
float32 | frequency | PWM frequency in Hz. This parameter is only used to initialise the timer structure. An additional cell is required to build the timer.
Ifx_Priority | isrPriority | Interrupt isrPriority of the timer interrupt, if 0 the interrupt is disable.
IfxSrc_Tos | isrProvider | Interrupt service provider for the timer interrupt.
float32 | minResolution | Minimum resolution of the timer in seconds. if 0, this parameter is ignored. If the configuration does not enable this setting a warning is given.
float32 | startOffset | FIXME make startOffset as Ifx_TimerValue. Timer initial offset in % of the period.
IfxStdIf_Timer_TrigConfig | trigger | Trigger configuration.

Typedef Documentation

◆ IfxStdIf_Timer

typedef struct IfxStdIf_Timer_ IfxStdIf_Timer

Forward declaration.

Definition at line 93 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_AckTimerIrq

typedef boolean(* IfxStdIf_Timer_AckTimerIrq) (IfxStdIf_InterfaceDriver stdIf)

Return the timer interrupt flag and reset it.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the timer interrupt flag

Definition at line 227 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_AckTriggerIrq

typedef boolean(* IfxStdIf_Timer_AckTriggerIrq) (IfxStdIf_InterfaceDriver stdIf)

Return the trigger interrupt flag and reset it.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the trigger interrupt flag

Definition at line 233 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_ApplyUpdate

typedef void(* IfxStdIf_Timer_ApplyUpdate) (IfxStdIf_InterfaceDriver stdIf)

Apply requested updates.

Such requested update are calls to:

  • IfxStdIf_Timer_setSingleMode()
  • IfxStdIf_Timer_setTrigger()
  • IfxStdIf_Timer_setPeriod() or IfxStdIf_Timer_setFrequency() as well as PWM generation related calls such as:
  • IfxStdIf_PwmHl_setDeadtime()
  • IfxStdIf_PwmHl_setMode()
  • IfxStdIf_PwmHl_setOnTime()
  • IfxStdIf_PwmHl_setupChannels()

It is important to note, that only one call to Timer_applyUpdate() is allowed within one timer period!!! In order to ensure correct update synchronisation, disableUpdate() should have been called previously.

Parameters
stdIf Pointer to the interface driver object
Returns
None

Definition at line 152 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_DisableUpdate

typedef void(* IfxStdIf_Timer_DisableUpdate) (IfxStdIf_InterfaceDriver stdIf)

Disable updates.

The following API action will not be taken in account before applyUpdate is called:

  • IfxStdIf_Timer_setSingleMode()
  • IfxStdIf_Timer_setTrigger()
  • IfxStdIf_Timer_setPeriod() or IfxStdIf_Timer_setFrequency() as well as PWM generation related calls such as:
  • IfxStdIf_PwmHl_setDeadtime()
  • IfxStdIf_PwmHl_setMode()
  • IfxStdIf_PwmHl_setOnTime()
  • IfxStdIf_PwmHl_setupChannels()
Parameters
stdIf Pointer to the interface driver object
Returns
None

Definition at line 169 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_GetFrequency

typedef float32(* IfxStdIf_Timer_GetFrequency) (IfxStdIf_InterfaceDriver stdIf)

Return the timer frequency in Hz.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the timer frequency in Hz

Definition at line 99 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_GetInputFrequency

typedef float32(* IfxStdIf_Timer_GetInputFrequency) (IfxStdIf_InterfaceDriver stdIf)

Return the timer input frequency in Hz.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the timer input frequency in Hz

Definition at line 175 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_GetPeriod

typedef Ifx_TimerValue(* IfxStdIf_Timer_GetPeriod) (IfxStdIf_InterfaceDriver stdIf)

Return the timer period in ticks.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the timer period in ticks

Definition at line 105 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_GetResolution

typedef float32(* IfxStdIf_Timer_GetResolution) (IfxStdIf_InterfaceDriver stdIf)

Return the timer resolution in seconds.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the timer resolution in seconds

Definition at line 111 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_GetTrigger

typedef Ifx_TimerValue(* IfxStdIf_Timer_GetTrigger) (IfxStdIf_InterfaceDriver stdIf)

Return the timer trigger point.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the timer timer point

Definition at line 117 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_Run

typedef void(* IfxStdIf_Timer_Run) (IfxStdIf_InterfaceDriver stdIf)

Immediately start the timer.

Please note that other mechanism may avoid the timer to tick, such as when the global (input) clock to the timer block is inactive.

Parameters
stdIf Pointer to the interface driver object
Returns
none

Definition at line 184 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_SetFrequency

typedef boolean(* IfxStdIf_Timer_SetFrequency) (IfxStdIf_InterfaceDriver stdIf, float32 frequency)

Set the timer frequency in Hz.

Parameters
stdIf | Pointer to the interface driver object
frequency | Requested timer frequency in Hz
Return values
TRUE | The requested frequency could be set
FALSE | The requested frequency is out of range

Definition at line 125 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_SetPeriod

typedef boolean(* IfxStdIf_Timer_SetPeriod) (IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue period)

Set the timer period.

Timer_applyUpdate() shall be invoked in order this to take effect.

Parameters
stdIf | Pointer to the interface driver object
period | Period value in ticks
Return values
TRUE | The requested period could be set
FALSE | The requested period is out of range

Definition at line 194 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_SetSingleMode

typedef void(* IfxStdIf_Timer_SetSingleMode) (IfxStdIf_InterfaceDriver stdIf, boolean enabled)

Stop timer at the end of the period.

Timer_applyUpdate() shall be invoked in order this to take effect.

Parameters
stdIf | Pointer to the interface driver object
enabled | If TRUE, enable the single mode, else disable the single mode (continuous mode)
Returns
none

Definition at line 203 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_SetTrigger

typedef void(* IfxStdIf_Timer_SetTrigger) (IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue triggerPoint)

Set trigger point.

See also
Timer_OutputEvent for the definition of the output level. Active state is defined by Timer_Config::outputActiveState.

Timer_applyUpdate() shall be invoked in order this to take effect.

Parameters
stdIf | Pointer to the interface driver object
triggerPoint | Trigger point in ticks from the period start.
Returns
none

Definition at line 215 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_Stop

typedef void(* IfxStdIf_Timer_Stop) (IfxStdIf_InterfaceDriver stdIf)

Immediately stops the timer.

Parameters
stdIf Pointer to the interface driver object
Returns
none

Definition at line 221 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_UpdateInputFrequency

typedef void(* IfxStdIf_Timer_UpdateInputFrequency) (IfxStdIf_InterfaceDriver stdIf)

Indicates the stdIf that the imput frequency has changed and that it should be taken in account.

Parameters
stdIf Pointer to the interface driver object
Returns
None

Definition at line 131 of file IfxStdIf_Timer.h.

Enumeration Type Documentation

◆ IfxStdIf_Timer_CountDir

enum IfxStdIf_Timer_CountDir

Timer increment direction.

Enumerator
IfxStdIf_Timer_CountDir_up | Timer is counting up.
IfxStdIf_Timer_CountDir_upAndDown | Timer is counting up and down.
IfxStdIf_Timer_CountDir_down | Timer is counting down.

Definition at line 85 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_OutputEvent

enum IfxStdIf_Timer_OutputEvent

Output event enable / disable.

Enumerator
IfxStdIf_Timer_Output_disabled | Timer output is set to the inactive, no change in the output.
IfxStdIf_Timer_Output_enabled | In case the trigger is enabled, the output is set to active between time 0 to the trigger point, and is set to inactive between the trigger point and the period. In case the trigger is disabled and counting direction if IfxStdIf_Timer_CountDir_up, the output is toggled when the timer is reset In case the trigger is disabled and counting direction if IfxStdIf_Timer_CountDir_down, the output is toggled when the timer is reloaded In case the trigger is disabled and counting direction if IfxStdIf_Timer_CountDir_upAndDown, the output is toggled when the timer reach 0 In case the trigger is enabled the trigger is active before the trigger point and inactive after the trigger point.

Definition at line 71 of file IfxStdIf_Timer.h.

Function Documentation

◆ IfxStdIf_Timer_initConfig()

IFX_EXTERN void IfxStdIf_Timer_initConfig ( IfxStdIf_Timer_Config * config )

Initialize the configuration structure to default

Parameters
config Timer configuration. This parameter is initialised by the function

Definition at line 45 of file IfxStdIf_Timer.c.

Referenced by IfxCcu6_TimerWithTrigger_initConfig(), IfxGtm_Atom_Timer_initConfig(), IfxGtm_Tom_Timer_initConfig(), and IfxStm_Timer_initConfig().

◆ IfxStdIf_Timer_initStdIf()

IFX_EXTERN void IfxStdIf_Timer_initStdIf | ( | IfxStdIf_Timer * | stdIf,
 |  | IfxStdIf_InterfaceDriver | driver
 | ) |  |

Initialize the stdIf so that all call back function default to no operation

Parameters
stdIf | Pointer to the interface driver object
driver | Interface driver object

Definition at line 143 of file IfxStdIf_Timer.c.

Referenced by IfxStm_Timer_stdIfTimerInit().


iLLD_TC38A: PwmHl.h File Reference

  • Service
  • CpuGeneric
  • If
  • Ccu6If
Data Structures | Typedefs
PwmHl.h File Reference

Multi-channels, dual-complementary PWM interface. More...

#include "Cpu/Std/Ifx_Types.h"
Include dependency graph for PwmHl.h:

Go to the source code of this file.

Data Structures

struct | PwmHl_Functions
struct | PwmHl_s
Structure of the TPwm interface. More...
struct | PwmHl_Config
Configuration structure of the TPwm interface. More...

Typedefs

typedef struct PwmHl_s | PwmHl
typedef void(* | PwmHl_Start) (PwmHl *handle)
typedef void(* | PwmHl_Pause) (PwmHl *handle)
typedef void(* | PwmHl_Resume) (PwmHl *handle)
typedef void(* | PwmHl_Stop) (PwmHl *handle)

Detailed Description

Multi-channels, dual-complementary PWM interface.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-27 20:08:18 GMT
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file PwmHl.h.

Data Structure Documentation

◆ PwmHl_Functions

struct PwmHl_Functions

Definition at line 56 of file PwmHl.h.

Collaboration diagram for PwmHl_Functions:
[legend]
Data Fields
PwmHl_Start | start
PwmHl_Stop | stop

◆ PwmHl_s

struct PwmHl_s

Structure of the TPwm interface.

Definition at line 63 of file PwmHl.h.

Data Fields
float32 | t12Frequency | Actual timer12 frequency.
Ifx_TimerValue | t12Period | Actual timer 12 period.
float32 | t13Frequency | Actual timer13 frequency.
Ifx_TimerValue | t13Period | Actual timer 13 period.

◆ PwmHl_Config

struct PwmHl_Config

Configuration structure of the TPwm interface.

Definition at line 75 of file PwmHl.h.

Data Fields
Ifx_ActiveState | activeState | Active state select for PWM output. Active high means that the PWM edge is rising at the elapsed of waitingTicks.
Ifx_TimerValue | noiseFilter | Specify hall sensor noise filter.
Ifx_TimerValue | phaseDelay | Specify the ticks before before updating each ouput hall pattern.
float32 | t12Frequency | Specify expected T12 PWM frequency in Hertz.
Ifx_TimerValue | t12Period | Specify expected T12 PWM period in ticks.
float32 | t13Frequency | Specify expected T13 PWM frequency in Hertz.
Ifx_TimerValue | t13Period | Specify expected T13 PWM period in ticks.

Typedef Documentation

◆ PwmHl

typedef struct PwmHl_s PwmHl

Definition at line 50 of file PwmHl.h.

◆ PwmHl_Pause

typedef void(* PwmHl_Pause) (PwmHl *handle)

Definition at line 52 of file PwmHl.h.

◆ PwmHl_Resume

typedef void(* PwmHl_Resume) (PwmHl *handle)

Definition at line 53 of file PwmHl.h.

◆ PwmHl_Start

typedef void(* PwmHl_Start) (PwmHl *handle)

Definition at line 51 of file PwmHl.h.

◆ PwmHl_Stop

typedef void(* PwmHl_Stop) (PwmHl *handle)

Definition at line 54 of file PwmHl.h.


iLLD_TC38A: Timer.h File Reference

  • Service
  • CpuGeneric
  • If
  • Ccu6If
Data Structures | Typedefs
Timer.h File Reference

Timer interface. More...

#include "Cpu/Std/Ifx_Types.h"
Include dependency graph for Timer.h:

Go to the source code of this file.

Data Structures

struct | Timer_Functions
struct | Timer_s
Structure of the Timer interface. More...
struct | Timer_Config
Configuration structure of the Timer interface. More...

Typedefs

typedef struct Timer_s | Timer
typedef void(* | Timer_Start) (Timer *handle)
typedef void(* | Timer_Stop) (Timer *handle)
typedef void(* | Timer_SynchronousStart) (Timer *handle)
typedef void(* | Timer_SynchronousStop) (Timer *handle)
typedef void(* | Timer_CountOneStep) (Timer *handle)
typedef void(* | Timer_StartSingleShotMode) (Timer *handle)

Detailed Description

Timer interface.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-27 20:08:19 GMT
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Timer.h.

Data Structure Documentation

◆ Timer_Functions

struct Timer_Functions

Definition at line 58 of file Timer.h.

Collaboration diagram for Timer_Functions:
[legend]
Data Fields
Timer_CountOneStep | countOneStep
Timer_Start | start
Timer_StartSingleShotMode | startSingleShotMode
Timer_Stop | stop
Timer_SynchronousStart | synchronousStart
Timer_SynchronousStop | synchronousStop

◆ Timer_s

struct Timer_s

Structure of the Timer interface.

Definition at line 69 of file Timer.h.

Data Fields
float32 | t12Frequency | Actual timer12 frequency.
Ifx_TimerValue | t12Period | Actual timer 12 period.
float32 | t13Frequency | Actual timer13 frequency.
Ifx_TimerValue | t13Period | Actual timer 13 period.

◆ Timer_Config

struct Timer_Config

Configuration structure of the Timer interface.

Definition at line 81 of file Timer.h.

Data Fields
Ifx_TimerValue | activeCount | Specify active PWM period (TCOUNT)
float32 | t12Frequency | Specify expected T12 PWM frequency in Hertz.
Ifx_TimerValue | t12Period | Specify expected T12 PWM period in ticks.
float32 | t13Frequency | Specify expected T13 PWM frequency in Hertz.
Ifx_TimerValue | t13Period | Specify expected T13 PWM period in ticks.
Ifx_TimerValue | waitingTime | Specify the expected ticks before timer starts (TWAIT)

Typedef Documentation

◆ Timer

typedef struct Timer_s Timer

Definition at line 50 of file Timer.h.

◆ Timer_CountOneStep

typedef void(* Timer_CountOneStep) (Timer *handle)

Definition at line 55 of file Timer.h.

◆ Timer_Start

typedef void(* Timer_Start) (Timer *handle)

Definition at line 51 of file Timer.h.

◆ Timer_StartSingleShotMode

typedef void(* Timer_StartSingleShotMode) (Timer *handle)

Definition at line 56 of file Timer.h.

◆ Timer_Stop

typedef void(* Timer_Stop) (Timer *handle)

Definition at line 52 of file Timer.h.

◆ Timer_SynchronousStart

typedef void(* Timer_SynchronousStart) (Timer *handle)

Definition at line 53 of file Timer.h.

◆ Timer_SynchronousStop

typedef void(* Timer_SynchronousStop) (Timer *handle)

Definition at line 54 of file Timer.h.


iLLD_TC38A: TPwm.h File Reference

  • Service
  • CpuGeneric
  • If
  • Ccu6If
Data Structures | Typedefs
TPwm.h File Reference

TPWM interface. More...

#include "Cpu/Std/Ifx_Types.h"
Include dependency graph for TPwm.h:

Go to the source code of this file.

Data Structures

struct | TPwm_Functions
struct | TPwm_s
Structure of the TPwm interface. More...
struct | TPwm_Config
Configuration structure of the TPwm interface. More...

Typedefs

typedef struct TPwm_s | TPwm
typedef void(* | TPwm_Start) (TPwm *handle)
typedef void(* | TPwm_Pause) (TPwm *handle)
typedef void(* | TPwm_Resume) (TPwm *handle)
typedef void(* | TPwm_Stop) (TPwm *handle)

Detailed Description

TPWM interface.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-27 20:08:18 GMT
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file TPwm.h.

Data Structure Documentation

◆ TPwm_Functions

struct TPwm_Functions

Definition at line 56 of file TPwm.h.

Collaboration diagram for TPwm_Functions:
[legend]
Data Fields
TPwm_Pause | pause
TPwm_Resume | resume
TPwm_Start | start
TPwm_Stop | stop

◆ TPwm_s

struct TPwm_s

Structure of the TPwm interface.

Definition at line 65 of file TPwm.h.

Data Fields
float32 | frequency | Actual frequency.
Ifx_TimerValue | period | Actual timer period.

◆ TPwm_Config

struct TPwm_Config

Configuration structure of the TPwm interface.

Definition at line 75 of file TPwm.h.

Data Fields
Ifx_TimerValue | activeCount | Specify active PWM period (TCOUNT)
Ifx_ActiveState | activeState | Active state select for PWM output. Active high means that the PWM edge is rising at the elapsed of waitingTicks.
float32 | frequency | Specify expected PWM frequency in Hertz.
Ifx_TimerValue | period | Specify expected PWM period in ticks.
Ifx_TimerValue | waitingTime | Specify the expected ticks before timer starts (TWAIT)

Typedef Documentation

◆ TPwm

typedef struct TPwm_s TPwm

Definition at line 50 of file TPwm.h.

◆ TPwm_Pause

typedef void(* TPwm_Pause) (TPwm *handle)

Definition at line 52 of file TPwm.h.

◆ TPwm_Resume

typedef void(* TPwm_Resume) (TPwm *handle)

Definition at line 53 of file TPwm.h.

◆ TPwm_Start

typedef void(* TPwm_Start) (TPwm *handle)

Definition at line 51 of file TPwm.h.

◆ TPwm_Stop

typedef void(* TPwm_Stop) (TPwm *handle)

Definition at line 54 of file TPwm.h.


iLLD_TC38A: Data Structure Index

Data Structure Index
_ | c | i | p | s | t
_
IfxCcu6_Ctrap_In IfxEvadc_Emux_Out IfxGtm_Tom_PwmHl_Mode IfxPsi5s_Psi5s_Frame
IfxCcu6_Icu IfxEvadc_GxBfl_Out IfxGtm_Tom_PwmHl_s IfxPsi5s_Psi5s_GlobalControlConfig
_Fifo IfxCcu6_Icu_Channel IfxEvadc_Vadcg_In IfxGtm_Tom_TGC IfxPsi5s_Psi5s_Pins
c
IfxCcu6_Icu_ChannelConfig IfxFce_Crc IfxGtm_Tom_Timer IfxPsi5s_Psi5s_PulseGeneration
IfxCcu6_Icu_Clock IfxFce_Crc_Config IfxGtm_Tom_Timer_Base IfxPsi5s_Psi5s_ReceiveControl
cfloat32 IfxCcu6_Icu_Config IfxFce_Crc_Crc IfxGtm_Tom_Timer_Config IfxPsi5s_Psi5s_ReceiveData
cfract IfxCcu6_Icu_InterruptConfig IfxFce_Crc_CrcConfig IfxGtm_Tom_ToutMap IfxPsi5s_Psi5s_ReceivedBits
csfract IfxCcu6_Icu_Pins IfxFce_Crc_EnabledInterrupts IfxGtm_Trig_AdcTrig_Channel IfxPsi5s_Psi5s_ReceivedData
csint16 IfxCcu6_Icu_TriggerConfig IfxFlash_flashSector IfxGtm_Trig_AdcTrig_Source IfxPsi5s_Psi5s_ReceiveStatus
csint32 IfxCcu6_PwmBc IfxGeth_Col_In IfxGtm_Trig_AdcTrig_Table IfxPsi5s_Psi5s_ReceiveTimestamp
i
IfxCcu6_PwmBc_Config IfxGeth_Crs_In IfxGtm_Trig_AdcTrig_Trigger IfxPsi5s_Psi5s_Timestamp
IfxCcu6_PwmBc_InterruptConfig IfxGeth_Crsdv_In IfxGtm_Trig_CanTrig_Channel IfxPsi5s_Psi5s_TimeStampConfig
Icu_Config IfxCcu6_PwmBc_MultiChannelControl IfxGeth_Eth IfxGtm_Trig_CanTrig_Source IfxPsi5s_Psi5s_TransmitControl
Icu_Functions IfxCcu6_PwmBc_Pins IfxGeth_Eth_Config IfxGtm_Trig_CanTrig_Table IfxPsi5s_Rx_In
Icu_s IfxCcu6_PwmBc_Timer12 IfxGeth_Eth_DmaConfig IfxGtm_Trig_CanTrig_Trigger IfxPsi5s_Tx_Out
Ifc_Crc IfxCcu6_PwmBc_Timer13 IfxGeth_Eth_DmaInterruptConfig IfxGtm_Trig_MscTrig_Channel IfxQspi_DelayConst
Ifc_Crc_Table IfxCcu6_PwmBc_TriggerConfig IfxGeth_Eth_FrameConfig IfxGtm_Trig_MscTrig_Set IfxQspi_Hsicin_In
Ifc_Crc_Table16 IfxCcu6_PwmHl_Base IfxGeth_Eth_MacConfig IfxGtm_Trig_MscTrig_Source IfxQspi_Mrst_In
Ifc_Crc_Table32 IfxCcu6_PwmHl_Config IfxGeth_Eth_MiiPins IfxGtm_Trig_MscTrig_Table IfxQspi_Mrst_Out
Ifc_Crc_Table8 IfxCcu6_PwmHl_Mode IfxGeth_Eth_MtlConfig IfxHssl_Hsct IfxQspi_Mtsr_In
Ifx_AngleTrkF32 IfxCcu6_PwmHl_s IfxGeth_Eth_MtlInterruptConfig IfxHssl_Hsct_Config IfxQspi_Mtsr_Out
Ifx_AngleTrkF32_CfgData IfxCcu6_T12hr_In IfxGeth_Eth_PinConfig IfxHssl_Hssl IfxQspi_Sclk_In
Ifx_AngleTrkF32_Config IfxCcu6_T13hr_In IfxGeth_Eth_RgmiiPins IfxHssl_Hssl_AccessWindow IfxQspi_Sclk_Out
Ifx_AngleTrkF32_PosIf IfxCcu6_Timer IfxGeth_Eth_RmiiPins IfxHssl_Hssl_Channel IfxQspi_Slsi_In
Ifx_CircularBuffer IfxCcu6_Timer_Clock IfxGeth_Eth_RxChannel IfxHssl_Hssl_ChannelConfig IfxQspi_Slso_Out
Ifx_ClpxFloat32_Integral IfxCcu6_Timer_Config IfxGeth_Eth_RxChannelConfig IfxHssl_Hssl_Config IfxQspi_SpiMaster
Ifx_Console IfxCcu6_Timer_InterruptConfig IfxGeth_Eth_RxQueueConfig IfxHssl_Hssl_errorFlags IfxQspi_SpiMaster_Channel_s
Ifx_DataBufferMode_TimeStampSingle IfxCcu6_Timer_Pins IfxGeth_Eth_TxChannel IfxI2c_I2c IfxQspi_SpiMaster_ChannelConfig
Ifx_DateTime IfxCcu6_Timer_Timer12 IfxGeth_Eth_TxChannelConfig IfxI2c_I2c_Config IfxQspi_SpiMaster_Config
Ifx_Fifo_Shared IfxCcu6_Timer_Timer13 IfxGeth_Eth_TxQueueConfig IfxI2c_I2c_Device IfxQspi_SpiMaster_Dma
Ifx_GlobalResources IfxCcu6_Timer_TriggerConfig IfxGeth_Grefclk_In IfxI2c_I2c_deviceConfig IfxQspi_SpiMaster_DmaConfig
Ifx_GlobalResources_Item IfxCcu6_TimerWithTrigger IfxGeth_Mdc_Out IfxI2c_Pins IfxQspi_SpiMaster_ErrorFlags
Ifx_IntegralF32 IfxCcu6_TimerWithTrigger_Base IfxGeth_Mdio_InOut IfxI2c_Scl_InOut IfxQspi_SpiMaster_Input
Ifx_InternalMux_Config IfxCcu6_TimerWithTrigger_Config IfxGeth_Pps_Out IfxI2c_Sda_InOut IfxQspi_SpiMaster_InputOutput
Ifx_InternalMux_MuxConfig IfxCcu6_TPwm IfxGeth_Refclk_In IfxIom_Driver IfxQspi_SpiMaster_MoveCounterControl
Ifx_IsrSetting IfxCcu6_TPwm_Clock IfxGeth_Rxclk_In IfxIom_Driver_Config IfxQspi_SpiMaster_Output
Ifx_LowPassPt1F32 IfxCcu6_TPwm_Config IfxGeth_RxContextDescr0_Bits IfxIom_Driver_Lam IfxQspi_SpiMaster_Pins
Ifx_LowPassPt1F32_Config IfxCcu6_TPwm_InterruptConfig IfxGeth_RxContextDescr1_Bits IfxIom_Driver_LamConfig IfxQspi_SpiSlave
Ifx_LutIndexedLinearF32 IfxCcu6_TPwm_Pins IfxGeth_RxContextDescr2_Bits IfxIom_Driver_LamEventConfig IfxQspi_SpiSlave_Config
Ifx_LutIndexedLinearF32_Item IfxCcu6_TPwm_Timer12 IfxGeth_RxContextDescr3_Bits IfxIom_Driver_LamEventWindowConfig IfxQspi_SpiSlave_Dma
Ifx_LutLinearF32 IfxCcu6_TPwm_Timer13 IfxGeth_Rxctl_In IfxIom_Driver_LamFilterConfig IfxQspi_SpiSlave_DmaConfig
Ifx_LutLinearF32_Item IfxCcu6_TPwm_TriggerConfig IfxGeth_Rxd_In IfxIom_Driver_LamMonConfig IfxQspi_SpiSlave_ErrorFlags
Ifx_RampF32 IfxCpu_Counter IfxGeth_RxDescr IfxIom_Driver_LamRefConfig IfxQspi_SpiSlave_Pins
Ifx_Shell IfxCpu_Perf IfxGeth_RxDescr0 IfxIom_Iom IfxQspi_SpiSlave_Protocol
Ifx_Shell_CmdLine IfxCpu_Trap IfxGeth_RxDescr0_RF_Bits IfxIom_Iom_EcmConfig IfxScu_Dcdcsync_Out
Ifx_Shell_Command IfxCpu_Trap_Id IfxGeth_RxDescr0_WF_Bits IfxIom_Iom_EcmConfigCounter IfxScu_Emgstop_In
Ifx_Shell_Config IfxDma_Dma IfxGeth_RxDescr1 IfxIom_Iom_EcmGlobalEventSelection IfxScu_Evrwup_In
Ifx_Shell_Flags IfxDma_Dma_Channel IfxGeth_RxDescr1_RF_Bits IfxIom_Iom_EcmGlobalEventSelectionBits IfxScu_Extclk_Out
Ifx_Shell_Protocol IfxDma_Dma_ChannelConfig IfxGeth_RxDescr1_WF_Bits IfxIom_Iom_FpcConfig IfxScu_Req_In
Ifx_Shell_Runtime IfxDma_Dma_Config IfxGeth_RxDescr2 IfxIom_Iom_LamConfig IfxScu_Wdtlck_Out
Ifx_Shell_Syntax IfxDmu_Fdest_In IfxGeth_RxDescr2_RF_Bits IfxModule_IndexMap IfxScuCcu_CcuconRegConfig
Ifx_Ssw_Bmhd IfxDts_Dts_Config IfxGeth_RxDescr2_WF_Bits IfxMsc_CxModeCommand IfxScuCcu_ClockDistributionConfig
Ifx_Ssw_CTablePtr IfxEdsadc_Cgpwm_Out IfxGeth_RxDescr3 IfxMsc_En_Out IfxScuCcu_Config
IfxAsclin_Asc IfxEdsadc_Cin_In IfxGeth_RxDescr3_RF_Bits IfxMsc_Fcln_Out IfxScuCcu_FlashWaitstateConfig
IfxAsclin_Asc_BaudRate IfxEdsadc_Cout_Out IfxGeth_RxDescr3_WF_Bits IfxMsc_Fclp_Out IfxScuCcu_InitialStepConfig
IfxAsclin_Asc_BitTimingControl IfxEdsadc_Din_In IfxGeth_RxDescrList IfxMsc_Inj_In IfxScuCcu_Mod_Config
IfxAsclin_Asc_Config IfxEdsadc_Dscin_In IfxGeth_Rxdv_In IfxMsc_Msc IfxScuCcu_PerPllConfig
IfxAsclin_Asc_ErrorFlags IfxEdsadc_Dscout_Out IfxGeth_Rxer_In IfxMsc_Msc_Abra IfxScuCcu_pllsParameterConfig
IfxAsclin_Asc_ErrorFlagsUnion IfxEdsadc_Dsdin_In IfxGeth_Txclk_In IfxMsc_Msc_Clock IfxScuCcu_PllStepConfig
IfxAsclin_Asc_FifoControl IfxEdsadc_Dsn_In IfxGeth_Txclk_Out IfxMsc_Msc_CommandExtensionConfig IfxScuCcu_PllThrottleConfig
IfxAsclin_Asc_FrameControl IfxEdsadc_Dsp_In IfxGeth_TxContextDescr0_Bits IfxMsc_Msc_Config IfxScuCcu_RGain_Values
IfxAsclin_Asc_InterruptConfig IfxEdsadc_Edsadc IfxGeth_TxContextDescr1_Bits IfxMsc_Msc_DownstreamControlConfig IfxScuCcu_SysPllConfig
IfxAsclin_Asc_Pins IfxEdsadc_Edsadc_CarrierGenConfig IfxGeth_TxContextDescr2_Bits IfxMsc_Msc_DownstreamControlExtensionConfig IfxScuLbist_MultiTriggerConfig
IfxAsclin_Cts_In IfxEdsadc_Edsadc_Channel IfxGeth_TxContextDescr3_Bits IfxMsc_Msc_en IfxScuLbist_ParameterSet
IfxAsclin_Lin IfxEdsadc_Edsadc_ChannelConfig IfxGeth_Txctl_Out IfxMsc_Msc_fcln IfxScuRcu_ResetCode
IfxAsclin_Lin_AcknowledgementFlags IfxEdsadc_Edsadc_ChannelPins IfxGeth_Txd_Out IfxMsc_Msc_fclp IfxScuWdt_Config
IfxAsclin_Lin_BaudrateDetection IfxEdsadc_Edsadc_CombFilterConfig IfxGeth_TxDescr IfxMsc_Msc_inj0 IfxSent_Sent
IfxAsclin_Lin_BaudrateGeneration IfxEdsadc_Edsadc_CommonModeVoltageConfig IfxGeth_TxDescr0 IfxMsc_Msc_inj1 IfxSent_Sent_Channel
IfxAsclin_Lin_BitSamplingControl IfxEdsadc_Edsadc_Config IfxGeth_TxDescr0_RF_Bits IfxMsc_Msc_InterruptConfig IfxSent_Sent_ChannelConfig
IfxAsclin_Lin_BitTimingControl IfxEdsadc_Edsadc_DemodulatorConfig IfxGeth_TxDescr0_WF_Bits IfxMsc_Msc_Io IfxSent_Sent_Config
IfxAsclin_Lin_Config IfxEdsadc_Edsadc_FirFilterConfig IfxGeth_TxDescr1 IfxMsc_Msc_OutputControlConfig IfxSent_Sent_Enable
IfxAsclin_Lin_DataControl IfxEdsadc_Edsadc_GainCalibrationConfig IfxGeth_TxDescr1_RF_Bits IfxMsc_Msc_sdi IfxSent_Sent_EnabledInterrupts
IfxAsclin_Lin_EnabledInterrupts IfxEdsadc_Edsadc_IntegratorConfig IfxGeth_TxDescr1_WF_Bits IfxMsc_Msc_son IfxSent_Sent_Frame
IfxAsclin_Lin_ErrorFlags IfxEdsadc_Edsadc_ModulatorConfig IfxGeth_TxDescr2 IfxMsc_Msc_sop IfxSent_Sent_In
IfxAsclin_Lin_FifoControl IfxEdsadc_Edsadc_RectifierConfig IfxGeth_TxDescr2_RF_Bits IfxMsc_Msc_UpstreamStatusConfig IfxSent_Sent_InputOutputControl
IfxAsclin_Lin_FrameControl IfxEdsadc_Edsadc_TimeStampCounter IfxGeth_TxDescr2_WF_Bits IfxMsc_Sdi_In IfxSent_Sent_Interrupt
IfxAsclin_Lin_FrameControlFlags IfxEdsadc_Itr_In IfxGeth_TxDescr3 IfxMsc_Son_Out IfxSent_Sent_InterruptNodeControl
IfxAsclin_Lin_FrameDataControl IfxEdsadc_ModulatorConfig IfxGeth_TxDescr3_RF_Bits IfxMsc_Sop_Out IfxSent_Sent_NibbleControl
IfxAsclin_Lin_InterruptConfig IfxEdsadc_Sg_In IfxGeth_TxDescr3_WF_Bits IfxMtu_MbistConfig IfxSent_Sent_Pins
IfxAsclin_Lin_LinControl IfxEray_Eray IfxGeth_TxDescrList IfxMtu_MbistConfigPattern IfxSent_Sent_ReceiveControl
IfxAsclin_Lin_PduType IfxEray_Eray_BufferReconfig IfxGeth_Txen_Out IfxMtu_MbistSshConfig IfxSent_Sent_SerialMessageFrame
IfxAsclin_Lin_Pins IfxEray_Eray_Config IfxGeth_Txer_Out IfxMtu_SramItem IfxSent_Sent_TransmitControl
IfxAsclin_Rts_Out IfxEray_Eray_ControllerConfig IfxGpt12_Capin_In IfxPms_Dcdcsync_Out IfxSent_Spc_Out
IfxAsclin_Rx_In IfxEray_Eray_Gtu01Config IfxGpt12_IncrEnc IfxPms_Hwcfg_In IfxSmu_Fsp_Out
IfxAsclin_Sclk_Out IfxEray_Eray_Gtu02Config IfxGpt12_IncrEnc_Config IfxPms_Wkp_In IfxSmu_Smu_AlarmGlobalConfiguration
IfxAsclin_Slso_Out IfxEray_Eray_Gtu03Config IfxGpt12_TxEud_In IfxPmsEvr_checkRegConfig IfxSmu_Smu_Config
IfxAsclin_Spi IfxEray_Eray_Gtu04Config IfxGpt12_TxIn_In IfxPmsEvr_initSequence IfxSmu_Smu_FaultSignalingProtocol
IfxAsclin_Spi_Baudrate IfxEray_Eray_Gtu05Config IfxGpt12_TxOut_Out IfxPmsEvr_initSequencePhase IfxSmu_Smu_RecoveryTimerAlarmConfiguration
IfxAsclin_Spi_BitSamplingControl IfxEray_Eray_Gtu06Config IfxGtm_Atom_Dtm_PwmHl_Base IfxPmsEvr_StepDownRegulatorRegConfig IfxSmu_Smu_RecoveryTimerConfig
IfxAsclin_Spi_Config IfxEray_Eray_Gtu07Config IfxGtm_Atom_Dtm_PwmHl_Config IfxPmsPm_LoadJumpConfig IfxStdIf_DPipe_
IfxAsclin_Spi_ErrorFlags IfxEray_Eray_Gtu08Config IfxGtm_Atom_Dtm_PwmHl_Mode IfxPmsPm_SleepConfig IfxStdIf_Pos_
IfxAsclin_Spi_FifoControl IfxEray_Eray_Gtu09Config IfxGtm_Atom_Dtm_PwmHl_s IfxPmsPm_StandbyConfig IfxStdIf_Pos_Config
IfxAsclin_Spi_FrameControl IfxEray_Eray_Gtu10Config IfxGtm_Atom_Pwm_Config IfxPmsPm_VoltageDroopConfig IfxStdIf_Pos_Status
IfxAsclin_Spi_InputOutputControl IfxEray_Eray_Gtu11Config IfxGtm_Atom_Pwm_Driver IfxPmsPm_WakeupConfig IfxStdIf_Pos_Status.B
IfxAsclin_Spi_InterruptConfig IfxEray_Eray_GTUConfig IfxGtm_Atom_Pwm_Interrupt IfxPort_Esr_Masks IfxStdIf_PwmHl_
IfxAsclin_Spi_Job IfxEray_Eray_Interrupt IfxGtm_Atom_Pwm_pin IfxPort_Io_Config IfxStdIf_PwmHl_Config
IfxAsclin_Spi_Pins IfxEray_Eray_MessageRAMConfig IfxGtm_Atom_PwmHl_Base IfxPort_Io_ConfigPin IfxStdIf_Timer_
IfxAsclin_Tx_Out IfxEray_Eray_NodeA IfxGtm_Atom_PwmHl_Config IfxPort_LvdsConfig IfxStdIf_Timer_Config
IfxCan_Can IfxEray_Eray_NodeB IfxGtm_Atom_PwmHl_Mode IfxPort_Pin IfxStdIf_Timer_TrigConfig
IfxCan_Can_BaudRate IfxEray_Eray_NodeConfig IfxGtm_Atom_PwmHl_s IfxPort_Pin_Config IfxStm_CompareConfig
IfxCan_Can_Config IfxEray_Eray_Pins IfxGtm_Atom_Timer IfxPsi5_Psi5 IfxStm_Timer
IfxCan_Can_FastBaudRate IfxEray_Eray_Prtc1Control IfxGtm_Atom_Timer_Base IfxPsi5_Psi5_Channel IfxStm_Timer_Base
IfxCan_Can_FilterConfig IfxEray_Eray_Prtc2Control IfxGtm_Atom_Timer_Config IfxPsi5_Psi5_ChannelConfig IfxStm_Timer_Config
IfxCan_Can_Frame IfxEray_Eray_ReceiveControl IfxGtm_Atom_ToutMap IfxPsi5_Psi5_ChannelTrigger
p
IfxCan_Can_InterruptConfig IfxEray_Eray_ReceivedFrame IfxGtm_Clk_Out IfxPsi5_Psi5_Clock
IfxCan_Can_Node IfxEray_Eray_Succ1Config IfxGtm_Spe_ChannelOutputs IfxPsi5_Psi5_Config PwmHl_Config
IfxCan_Can_NodeConfig IfxEray_Eray_Succ2Config IfxGtm_Spe_InputPattern IfxPsi5_Psi5_Frame PwmHl_Functions
IfxCan_Can_Pins IfxEray_Eray_Succ3Config IfxGtm_Spe_OutputPattern IfxPsi5_Psi5_FrameData PwmHl_s
IfxCan_Can_RxConfig IfxEray_Eray_TransmitControl IfxGtm_Spe_PatternSignal IfxPsi5_Psi5_InputOutputControl
s
IfxCan_Can_TxConfig IfxEray_Header IfxGtm_Tim_ChannelControl IfxPsi5_Psi5_Message
IfxCan_Filter IfxEray_ReceivedHeader IfxGtm_Tim_In IfxPsi5_Psi5_PinsConfig Spi_ErrorChecks
IfxCan_GroupInterruptConfig IfxEray_Rxd_In IfxGtm_Tim_In_Config IfxPsi5_Psi5_PulseGeneration SpiIf_
IfxCan_Message IfxEray_SlotConfig IfxGtm_Tim_In_ConfigCapture IfxPsi5_Psi5_Rdm SpiIf_Ch_
IfxCan_MessageRAM IfxEray_Txd_Out IfxGtm_Tim_In_ConfigFilter IfxPsi5_Psi5_Rds SpiIf_ChConfig_
IfxCan_Rxd_In IfxEray_Txen_Out IfxGtm_Tim_In_ConfigTimeout IfxPsi5_Psi5_ReceiveControl SpiIf_ChMode
IfxCan_Txd_Out IfxEvadc_Adc IfxGtm_Tim_InputSourceSelect IfxPsi5_Psi5_SerialMessage SpiIf_Config
IfxCcu6_Cc60_Out IfxEvadc_Adc_ArbiterConfig IfxGtm_Tim_Timer IfxPsi5_Psi5_StartupOptions SpiIf_Flags
IfxCcu6_Cc60in_In IfxEvadc_Adc_Channel IfxGtm_Tim_Timer_Config IfxPsi5_Psi5_TimeStampConfig SpiIf_funcs
IfxCcu6_Cc61_Out IfxEvadc_Adc_ChannelConfig IfxGtm_Tim_TinMap IfxPsi5_Psi5_TransmitControl SpiIf_Job
IfxCcu6_Cc61in_In IfxEvadc_Adc_ClassConfig IfxGtm_Tom_Dtm_PwmHl_Base IfxPsi5_Rx_In
t
IfxCcu6_Cc62_Out IfxEvadc_Adc_Config IfxGtm_Tom_Dtm_PwmHl_Config IfxPsi5_Tx_Out
IfxCcu6_Cc62in_In IfxEvadc_Adc_EmuxControl IfxGtm_Tom_Dtm_PwmHl_Mode IfxPsi5s_Clk_Out Timer_Config
IfxCcu6_Ccpos0_In IfxEvadc_Adc_EmuxPinConfig IfxGtm_Tom_Dtm_PwmHl_s IfxPsi5s_Psi5s Timer_Functions
IfxCcu6_Ccpos1_In IfxEvadc_Adc_FastCompareChannel IfxGtm_Tom_Pwm_Config IfxPsi5s_Psi5s_AscConfig Timer_s
IfxCcu6_Ccpos2_In IfxEvadc_Adc_FastCompareChannelConfig IfxGtm_Tom_Pwm_Driver IfxPsi5s_Psi5s_Channel TPwm_Config
IfxCcu6_Cout60_Out IfxEvadc_Adc_GatingTriggerConfig IfxGtm_Tom_Pwm_Interrupt IfxPsi5s_Psi5s_ChannelConfig TPwm_Functions
IfxCcu6_Cout61_Out IfxEvadc_Adc_Group IfxGtm_Tom_Pwm_pin IfxPsi5s_Psi5s_ChannelTrigger TPwm_s
IfxCcu6_Cout62_Out IfxEvadc_Adc_GroupConfig IfxGtm_Tom_PwmHl_Base IfxPsi5s_Psi5s_Clock
IfxCcu6_Cout63_Out IfxEvadc_Adc_QueueConfig IfxGtm_Tom_PwmHl_Config IfxPsi5s_Psi5s_Config
_ | c | i | p | s | t


iLLD_TC38A: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- a -

  • a : Ifx_LowPassPt1F32 , IfxPsi5_Psi5_StartupOptions
  • abd : IfxAsclin_Lin_BaudrateDetection
  • abraBlockBypass : IfxMsc_Msc_Abra
  • abraConfig : IfxMsc_Msc_Config
  • abraDownstreamBlockBaudrate : IfxMsc_Msc_Abra
  • accelEst : Ifx_AngleTrkF32
  • acceptedStartupDeviation : IfxEray_Eray_Gtu06Config
  • accessWindow0 : IfxHssl_Hssl_Config
  • accessWindow1 : IfxHssl_Hssl_Config
  • accessWindow2 : IfxHssl_Hssl_Config
  • accessWindow3 : IfxHssl_Hssl_Config
  • accumulatedCounterIndex : IfxIom_Driver_Lam
  • accumulatedEventUsedMask : IfxIom_Driver
  • acknowledgmentFlags : IfxAsclin_Lin
  • ackTimerIrq : IfxStdIf_Timer_
  • ackTriggerIrq : IfxStdIf_Timer_
  • ACT_TB : IfxGtm_Tom_TGC
  • activateSlso : IfxQspi_SpiMaster_Channel_s
  • activeChannel : SpiIf_
  • activeCount : Timer_Config , TPwm_Config
  • activeState : PwmHl_Config , TPwm_Config
  • actualUartFrameCount : IfxPsi5s_Psi5s_ReceivedBits
  • additionalClockCycles : IfxEvadc_Adc_FastCompareChannelConfig
  • addressAlignedBeatsEnabled : IfxGeth_Eth_DmaConfig
  • addressMode : IfxI2c_I2c_Device , IfxI2c_I2c_deviceConfig
  • agc : IfxGtm_Atom_Dtm_PwmHl_s , IfxGtm_Atom_Pwm_Driver , IfxGtm_Atom_PwmHl_s , IfxGtm_Atom_Timer
  • agcApplyUpdate : IfxGtm_Atom_Timer
  • agcDisableUpdate : IfxGtm_Atom_Timer
  • alarmConfigRegister : IfxSmu_Smu_Config
  • alarmGlobalConfig : IfxSmu_Smu_Config
  • alarmId0 : IfxSmu_Smu_RecoveryTimerAlarmConfiguration
  • alarmId1 : IfxSmu_Smu_RecoveryTimerAlarmConfiguration
  • alarmId2 : IfxSmu_Smu_RecoveryTimerAlarmConfiguration
  • alarmId3 : IfxSmu_Smu_RecoveryTimerAlarmConfiguration
  • align : Ifx_Console
  • ALL : IfxAsclin_Asc_ErrorFlagsUnion , IfxSent_Sent_EnabledInterrupts
  • allowSleepMode : IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave_Config
  • alrt : IfxCan_Can_InterruptConfig
  • alternateCrcSelected : IfxSent_Sent_ReceiveControl
  • alti : IfxAsclin_Lin_Config , IfxAsclin_Spi_InputOutputControl
  • analogClockGenerationMode : IfxEvadc_Adc_Config
  • analogClockSyncDelay : IfxEdsadc_Edsadc_ModulatorConfig , IfxEdsadc_ModulatorConfig
  • analogClockSynchronizationDelay : IfxEvadc_Adc_GroupConfig
  • analogConverterControllerMode : IfxEvadc_Adc_FastCompareChannelConfig
  • analogConverterMode : IfxEvadc_Adc_GroupConfig
  • analogFrequency : IfxEvadc_Adc_GroupConfig
  • analogInputPrechargeControlEMUX : IfxEvadc_Adc_ClassConfig
  • analogInputPrechargeControlStandard : IfxEvadc_Adc_ClassConfig
  • analogInputPrechargeDuration : IfxEvadc_Adc_FastCompareChannelConfig
  • analogMuxCopy : IfxEdsadc_Edsadc_TimeStampCounter
  • angleAtan : Ifx_AngleTrkF32
  • angleErr : Ifx_AngleTrkF32
  • angleEst : Ifx_AngleTrkF32
  • angleRef : Ifx_AngleTrkF32
  • application : IfxScuLbist_ParameterSet
  • applyUpdate : IfxStdIf_Timer_
  • arbiter : IfxEvadc_Adc_GroupConfig
  • arbiterRoundLength : IfxEvadc_Adc_ArbiterConfig
  • ARPNR : IfxGeth_RxDescr2_WF_Bits
  • ascConfig : IfxPsi5s_Psi5s_Config
  • ascFramingErrorFlag : IfxPsi5s_Psi5s_ReceivedBits
  • asclin : IfxAsclin_Asc , IfxAsclin_Asc_Config , IfxAsclin_Lin , IfxAsclin_Lin_Config , IfxAsclin_Spi , IfxAsclin_Spi_Config
  • asclinClockSource : IfxPmsPm_SleepConfig
  • asclinEnabled : IfxPmsPm_SleepConfig
  • ascOnlyMode : IfxPsi5s_Psi5s_GlobalControlConfig
  • ascOverrunErrorFlag : IfxPsi5s_Psi5s_ReceivedBits
  • ascParityErrorFlag : IfxPsi5s_Psi5s_ReceivedBits
  • assertion : IfxCpu_Trap_Id
  • asynchronousModeSelected : IfxPsi5_Psi5_ReceiveControl
  • atom : IfxGtm_Atom_Dtm_PwmHl_Config , IfxGtm_Atom_Dtm_PwmHl_s , IfxGtm_Atom_Pwm_Config , IfxGtm_Atom_Pwm_Driver , IfxGtm_Atom_PwmHl_Config , IfxGtm_Atom_PwmHl_s , IfxGtm_Atom_Timer , IfxGtm_Atom_Timer_Config , IfxGtm_Atom_ToutMap
  • atomChannel : IfxGtm_Atom_Pwm_Config , IfxGtm_Atom_Pwm_Driver
  • atomIndex : IfxGtm_Atom_Pwm_Driver , IfxGtm_Atom_Timer
  • autoCS : SpiIf_ChMode
  • automaticLengthReload : IfxFce_Crc_CrcConfig
  • automaticUpdateMode : IfxEvadc_Adc_FastCompareChannelConfig
  • auxServiceRequest : IfxEdsadc_Edsadc_FirFilterConfig


iLLD_TC38A: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- b -

  • b : Ifx_LowPassPt1F32
  • B : IfxIom_Iom_EcmGlobalEventSelection
  • b : IfxPsi5_Psi5_StartupOptions
  • B : IfxStdIf_Pos_Status
  • B1L : IfxGeth_TxDescr2_RF_Bits
  • B2L : IfxGeth_TxDescr2_RF_Bits
  • bacon : IfxQspi_SpiMaster_Channel_s
  • base : Ifx_AngleTrkF32 , Ifx_CircularBuffer , IfxCcu6_Icu_Channel , IfxCcu6_Icu_ChannelConfig , IfxCcu6_PwmBc , IfxCcu6_PwmBc_Config , IfxCcu6_PwmHl_Config , IfxCcu6_PwmHl_s , IfxCcu6_Timer , IfxCcu6_Timer_Config , IfxCcu6_TimerWithTrigger , IfxCcu6_TimerWithTrigger_Config , IfxCcu6_TPwm , IfxCcu6_TPwm_Config , IfxGpt12_IncrEnc_Config , IfxGtm_Atom_Dtm_PwmHl_Config , IfxGtm_Atom_Dtm_PwmHl_s , IfxGtm_Atom_PwmHl_Config , IfxGtm_Atom_PwmHl_s , IfxGtm_Atom_Timer , IfxGtm_Atom_Timer_Config , IfxGtm_Tom_Dtm_PwmHl_Config , IfxGtm_Tom_Dtm_PwmHl_s , IfxGtm_Tom_PwmHl_Config , IfxGtm_Tom_PwmHl_s , IfxGtm_Tom_Timer , IfxGtm_Tom_Timer_Config , IfxQspi_SpiMaster , IfxQspi_SpiMaster_Channel_s , IfxQspi_SpiMaster_ChannelConfig , IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave , IfxQspi_SpiSlave_Config , IfxStm_Timer , IfxStm_Timer_Config
  • baseAddress : IfxCan_MessageRAM
  • baudrate : IfxAsclin_Asc_BaudRate , IfxAsclin_Asc_Config , IfxAsclin_Lin_BaudrateGeneration , IfxAsclin_Spi_Baudrate , IfxAsclin_Spi_Config , IfxCan_Can_BaudRate , IfxCan_Can_FastBaudRate
  • baudRate : IfxCan_Can_NodeConfig
  • baudrate : IfxEray_Eray_Prtc1Control , IfxI2c_I2c , IfxI2c_I2c_Config , IfxMsc_Msc_Clock , Spi_ErrorChecks , SpiIf_Ch_ , SpiIf_ChConfig_
  • baudrateError : IfxQspi_SpiMaster_ErrorFlags , IfxQspi_SpiSlave_ErrorFlags
  • baudrateFrequency : IfxPsi5s_Psi5s_AscConfig
  • baudrateSelect : IfxPsi5_Psi5_ReceiveControl
  • baudrateSelection : IfxPsi5s_Psi5s_AscConfig
  • bitReversed : IfxEdsadc_Edsadc_CarrierGenConfig
  • bitSampling : IfxAsclin_Spi_Config
  • bitStuffControl : IfxPsi5s_Psi5s_TransmitControl
  • bitStuffingEnabled : IfxPsi5_Psi5_TransmitControl
  • bitTiming : IfxAsclin_Asc_Config
  • blankoutTime : IfxPsi5_Psi5_PulseGeneration
  • blockMode : IfxDma_Dma_ChannelConfig
  • bmhdid : Ifx_Ssw_Bmhd
  • bmi : Ifx_Ssw_Bmhd
  • boff : IfxCan_Can_InterruptConfig
  • boundary : Ifx_LutLinearF32_Item
  • boundaryFlagAction : IfxEvadc_Adc_FastCompareChannelConfig
  • boundaryFlagActivation : IfxEvadc_Adc_FastCompareChannelConfig
  • boundaryFlagInversion : IfxEvadc_Adc_FastCompareChannelConfig
  • boundaryFlagNodePointer : IfxEvadc_Adc_FastCompareChannelConfig
  • boundaryFlagValue : IfxEvadc_Adc_FastCompareChannelConfig
  • boundaryMode : IfxEvadc_Adc_ChannelConfig
  • brd : IfxAsclin_Lin_Config
  • breakDetected : IfxAsclin_Lin_ErrorFlags
  • breakLength : IfxAsclin_Lin_LinControl
  • brg : IfxAsclin_Lin_Config
  • bsc : IfxAsclin_Lin_Config
  • btc : IfxAsclin_Lin_Config
  • BUF1AP : IfxGeth_RxDescr0_RF_Bits , IfxGeth_TxDescr0_RF_Bits
  • BUF1V : IfxGeth_RxDescr3_RF_Bits
  • BUF2AP : IfxGeth_RxDescr2_RF_Bits , IfxGeth_TxDescr1_RF_Bits
  • BUF2V : IfxGeth_RxDescr3_RF_Bits
  • buffer : _Fifo , SpiIf_Config
  • bufferDirection : IfxEray_Header
  • bufferIndex : IfxEray_Eray_ReceiveControl , IfxEray_Eray_TransmitControl , IfxEray_SlotConfig
  • bufferNumber : IfxCan_Message
  • bufferReconfigEnabled : IfxEray_Eray_MessageRAMConfig
  • bufferServiceEnabled : IfxEray_Header
  • bufferSize : SpiIf_Config
  • buffMode : IfxAsclin_Asc_FifoControl , IfxAsclin_Lin_FifoControl , IfxAsclin_Spi_FifoControl
  • bus : IfxCpu_Trap_Id
  • busAccessError : IfxHssl_Hssl_errorFlags
  • busError : IfxFce_Crc_EnabledInterrupts
  • busLoopbackEnabled : IfxCan_Can_NodeConfig
  • busOffStatusEnabled : IfxCan_Can_InterruptConfig
  • busPriority : IfxDma_Dma_ChannelConfig
  • busStatus : IfxI2c_I2c
  • byteAccess : SpiIf_Flags


iLLD_TC38A: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- c -

  • C : IfxGeth_RxDescr0 , IfxGeth_RxDescr1 , IfxGeth_RxDescr2 , IfxGeth_RxDescr3 , IfxGeth_TxDescr0 , IfxGeth_TxDescr1 , IfxGeth_TxDescr2 , IfxGeth_TxDescr3
  • calculateBitTimingValues : IfxCan_Can_NodeConfig
  • calFactor : IfxEdsadc_Edsadc_GainCalibrationConfig
  • calibrationControl : IfxEdsadc_Edsadc_FirFilterConfig
  • calibrationSampleTimeControlMode : IfxEvadc_Adc_GroupConfig
  • calibrationTrigger : IfxEdsadc_Edsadc_FirFilterConfig
  • call : Ifx_Shell_Command
  • callbackData : SpiIf_Ch_
  • calTarget : IfxEdsadc_Edsadc_GainCalibrationConfig
  • can : IfxCan_Can , IfxCan_Can_Config , IfxCan_Can_Node , IfxCan_Can_NodeConfig
  • canReadCount : IfxStdIf_DPipe_
  • canWriteCount : IfxStdIf_DPipe_
  • capture : IfxGtm_Tim_In_Config
  • captureClockFrequency : IfxGtm_Tim_In
  • captureFrequency : IfxCcu6_Icu
  • carrierWaveformMode : IfxEdsadc_Edsadc_CarrierGenConfig
  • CC : IfxGeth_TxDescr3_WF_Bits
  • cc0 : IfxCcu6_PwmHl_Config
  • cc1 : IfxCcu6_PwmHl_Config
  • cc2 : IfxCcu6_PwmHl_Config
  • cc60In : IfxCcu6_Icu_Pins
  • cc60Out : IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins
  • cc61In : IfxCcu6_Icu_Pins
  • cc61Out : IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins
  • cc62In : IfxCcu6_Icu_Pins
  • cc62Out : IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins
  • cc6xInputMode : IfxCcu6_Icu_Pins
  • ccpos0 : IfxCcu6_Icu_Pins , IfxCcu6_PwmBc_Pins
  • ccpos1 : IfxCcu6_Icu_Pins , IfxCcu6_PwmBc_Pins
  • ccpos2 : IfxCcu6_Icu_Pins , IfxCcu6_PwmBc_Pins
  • ccposxInputMode : IfxCcu6_Icu_Pins
  • ccu0Enabled : IfxGtm_Atom_Pwm_Interrupt , IfxGtm_Tom_Pwm_Interrupt
  • ccu1Enabled : IfxGtm_Atom_Pwm_Interrupt , IfxGtm_Tom_Pwm_Interrupt
  • ccu6 : IfxCcu6_Icu , IfxCcu6_Icu_Channel , IfxCcu6_Icu_ChannelConfig , IfxCcu6_Icu_Config , IfxCcu6_PwmBc , IfxCcu6_PwmBc_Config , IfxCcu6_Timer , IfxCcu6_Timer_Config , IfxCcu6_TimerWithTrigger , IfxCcu6_TimerWithTrigger_Config , IfxCcu6_TPwm , IfxCcu6_TPwm_Config
  • ccu6Enabled : IfxPmsPm_SleepConfig
  • ccucon0 : IfxScuCcu_ClockDistributionConfig
  • ccucon1 : IfxScuCcu_ClockDistributionConfig
  • ccucon2 : IfxScuCcu_ClockDistributionConfig
  • ccucon5 : IfxScuCcu_ClockDistributionConfig
  • ccucon6 : IfxScuCcu_ClockDistributionConfig
  • ccucon7 : IfxScuCcu_ClockDistributionConfig
  • ccucon8 : IfxScuCcu_ClockDistributionConfig
  • ccucon9 : IfxScuCcu_ClockDistributionConfig
  • ccx : IfxGtm_Atom_Dtm_PwmHl_Config , IfxGtm_Atom_Dtm_PwmHl_s , IfxGtm_Atom_PwmHl_Config , IfxGtm_Atom_PwmHl_s , IfxGtm_Tom_Dtm_PwmHl_Config , IfxGtm_Tom_Dtm_PwmHl_s , IfxGtm_Tom_PwmHl_Config , IfxGtm_Tom_PwmHl_s
  • ccxActiveState : IfxCcu6_PwmHl_Base , IfxGtm_Atom_Dtm_PwmHl_Base , IfxGtm_Atom_PwmHl_Base , IfxGtm_Tom_Dtm_PwmHl_Base , IfxGtm_Tom_PwmHl_Base , IfxStdIf_PwmHl_Config
  • ccxOutputEnabled : IfxStdIf_PwmHl_Config
  • ccxTemp : IfxGtm_Atom_PwmHl_s , IfxGtm_Tom_PwmHl_s
  • CDE : IfxGeth_TxContextDescr3_Bits
  • CE : IfxGeth_RxDescr3_WF_Bits
  • cfgData : Ifx_AngleTrkF32
  • CH0 : IfxGtm_Spe_ChannelOutputs
  • CH1 : IfxGtm_Spe_ChannelOutputs
  • CH2 : IfxGtm_Spe_ChannelOutputs
  • CH3 : IfxGtm_Spe_ChannelOutputs
  • CH4 : IfxGtm_Spe_ChannelOutputs
  • CH5 : IfxGtm_Spe_ChannelOutputs
  • CH6 : IfxGtm_Spe_ChannelOutputs
  • CH7 : IfxGtm_Spe_ChannelOutputs
  • channel : IfxDma_Dma_Channel , IfxEdsadc_Cin_In , IfxEdsadc_Cout_Out , IfxEdsadc_Din_In , IfxEdsadc_Dscin_In , IfxEdsadc_Dscout_Out , IfxEdsadc_Dsdin_In , IfxEdsadc_Dsn_In , IfxEdsadc_Dsp_In , IfxEdsadc_Edsadc_Channel , IfxEdsadc_Itr_In , IfxEvadc_Adc_Channel , IfxGtm_Atom_ToutMap , IfxGtm_Tim_In , IfxGtm_Tim_Timer , IfxGtm_Tim_Timer_Config , IfxGtm_Tim_TinMap , IfxGtm_Tom_ToutMap , IfxGtm_Trig_AdcTrig_Source , IfxGtm_Trig_CanTrig_Source , IfxGtm_Trig_MscTrig_Source , IfxIom_Driver_Lam , IfxIom_Driver_LamConfig , IfxPsi5_Psi5_Channel , IfxSent_Sent_Channel
  • channelAConnectedNode : IfxEray_Eray_Succ1Config
  • channelAFiltered : IfxEray_Header
  • channelAMacrotickInitialOffset : IfxEray_Eray_Gtu03Config
  • channelAMicrotickInitialOffset : IfxEray_Eray_Gtu03Config
  • channelAReceptionDelay : IfxEray_Eray_Gtu05Config
  • channelASymbolTransmitted : IfxEray_Eray_Succ1Config
  • channelBasedCs : IfxQspi_SpiMaster_Channel_s , IfxQspi_SpiMaster_ChannelConfig
  • channelBConnectedNode : IfxEray_Eray_Succ1Config
  • channelBFiltered : IfxEray_Header
  • channelBMacrotickInitialOffset : IfxEray_Eray_Gtu03Config
  • channelBMicrotickInitialOffset : IfxEray_Eray_Gtu03Config
  • channelBReceptionDelay : IfxEray_Eray_Gtu05Config
  • channelBSymbolTransmitted : IfxEray_Eray_Succ1Config
  • channelControl : IfxGtm_Tim_Timer_Config
  • channelCount : IfxCcu6_PwmHl_Base , IfxGtm_Atom_Dtm_PwmHl_Base , IfxGtm_Atom_PwmHl_Base , IfxGtm_Tom_Dtm_PwmHl_Base , IfxGtm_Tom_PwmHl_Base , IfxStdIf_PwmHl_Config
  • channelEventMode : IfxEvadc_Adc_FastCompareChannelConfig
  • channelId : IfxCcu6_Icu_Channel , IfxCcu6_Icu_ChannelConfig , IfxCcu6_TPwm_Timer12 , IfxDma_Dma_Channel , IfxDma_Dma_ChannelConfig , IfxEdsadc_Edsadc_Channel , IfxEdsadc_Edsadc_ChannelConfig , IfxEvadc_Adc_ChannelConfig , IfxEvadc_Vadcg_In , IfxGeth_Eth_DmaInterruptConfig , IfxGeth_Eth_FrameConfig , IfxGeth_Eth_RxChannel , IfxGeth_Eth_RxChannelConfig , IfxGeth_Eth_TxChannel , IfxGeth_Eth_TxChannelConfig , IfxHssl_Hssl_Channel , IfxHssl_Hssl_ChannelConfig , IfxIom_Iom_FpcConfig , IfxPsi5_Psi5_Channel , IfxPsi5_Psi5_ChannelConfig , IfxPsi5_Rx_In , IfxPsi5_Tx_Out , IfxPsi5s_Psi5s_Channel , IfxPsi5s_Psi5s_ChannelConfig , IfxPsi5s_Psi5s_ReceivedBits , IfxQspi_SpiMaster_Channel_s , IfxScu_Req_In , IfxSent_Sent_Channel , IfxSent_Sent_ChannelConfig , IfxSent_Sent_In , IfxSent_Spc_Out
  • channelIndex : IfxGtm_Tim_In , IfxGtm_Tim_In_Config
  • channelInputControl : IfxGtm_Tim_ChannelControl
  • channelInterruptControl : IfxDma_Dma_ChannelConfig
  • channelInterruptEnabled : IfxDma_Dma_ChannelConfig
  • channelInterruptPriority : IfxDma_Dma_ChannelConfig
  • channelInterruptTypeOfService : IfxDma_Dma_ChannelConfig
  • channelMode : IfxCcu6_Icu_Channel , IfxCcu6_Icu_ChannelConfig , IfxCcu6_TPwm_Timer12
  • channelNumberCodeError : IfxHssl_Hssl_errorFlags
  • channelOut : IfxCcu6_TPwm , IfxCcu6_TPwm_Config
  • channelPins : IfxEdsadc_Edsadc_ChannelConfig
  • channelPriority : IfxEvadc_Adc_ChannelConfig
  • channels : IfxEvadc_Adc_EmuxControl
  • channelSelectionStyle : IfxEvadc_Adc_EmuxControl
  • channelServProvider : IfxEvadc_Adc_ChannelConfig
  • channelsMask : IfxGtm_Atom_Timer , IfxGtm_Tom_Timer
  • channelSrcNr : IfxEvadc_Adc_ChannelConfig
  • channelTrigger : IfxPsi5_Psi5_ChannelConfig , IfxPsi5s_Psi5s_ChannelConfig
  • channelTriggerCounter : IfxPsi5_Psi5_ChannelTrigger , IfxPsi5s_Psi5s_ChannelTrigger
  • channelTriggerValue : IfxPsi5_Psi5_ChannelTrigger , IfxPsi5s_Psi5s_ChannelTrigger
  • checksum : IfxAsclin_Lin_DataControl
  • checksumMode : IfxAsclin_Lin_PduType
  • CIC_TPL : IfxGeth_TxDescr3_RF_Bits
  • cicDecimationRate : IfxEdsadc_Edsadc_GainCalibrationConfig
  • cicMode : IfxEdsadc_Edsadc_FirFilterConfig
  • cicShift : IfxEdsadc_Edsadc_ChannelConfig , IfxEdsadc_Edsadc_GainCalibrationConfig
  • cin : IfxEdsadc_Edsadc_ChannelPins
  • cinMode : IfxEdsadc_Edsadc_ChannelPins
  • clearEvent : IfxIom_Driver_LamEventWindowConfig
  • clearInterruptAfterLastFlag : IfxQspi_SpiMaster_MoveCounterControl
  • clearInterruptBeforeLastFlag : IfxQspi_SpiMaster_MoveCounterControl
  • clearRx : IfxStdIf_DPipe_
  • clearTimerOnGlitch : IfxIom_Driver_LamFilterConfig
  • clearTx : IfxStdIf_DPipe_
  • clk : IfxPsi5s_Psi5s_Pins
  • clkMode : IfxPsi5s_Psi5s_Pins
  • clkSel : IfxGtm_Tim_ChannelControl
  • clock : IfxCcu6_Icu_Config , IfxCcu6_Timer_Config , IfxCcu6_TPwm_Config , IfxCpu_Perf , IfxGtm_Atom_Timer_Config , IfxGtm_Tim_In_ConfigCapture , IfxGtm_Tim_In_ConfigFilter , IfxGtm_Tim_In_ConfigTimeout , IfxGtm_Tom_Pwm_Config , IfxGtm_Tom_Timer_Config
  • clockConfig : IfxMsc_Msc_Config
  • clockCorrectionCyclesHalt : IfxEray_Eray_Succ3Config
  • clockCorrectionCyclesPassive : IfxEray_Eray_Succ3Config
  • clockDistribution : IfxScuCcu_Config
  • clockDivider : IfxEvadc_Adc_FastCompareChannelConfig
  • clockFreq : IfxCcu6_TimerWithTrigger_Base , IfxGtm_Atom_Timer_Base , IfxGtm_Tom_Timer_Base , IfxStm_Timer_Base
  • clockInput : IfxCcu6_TPwm_Timer12 , IfxCcu6_TPwm_Timer13
  • clockOutput : IfxPsi5s_Psi5s_AscConfig
  • clockPolarity : IfxQspi_SpiSlave_Protocol , SpiIf_ChMode
  • clockSelectAbra : IfxMsc_Msc_Abra
  • clockSource : IfxAsclin_Asc_Config , IfxAsclin_Lin_Config , IfxAsclin_Spi_Config , IfxCan_Can_NodeConfig
  • clockSyncErrorHalt : IfxEray_Eray_Succ1Config
  • clrInternalResetFlag : IfxScuWdt_Config
  • clusterDrift : IfxEray_Eray_Gtu05Config
  • cmd : Ifx_Shell
  • cmdHistory : Ifx_Shell
  • cmdState : Ifx_Shell_Runtime
  • cmdStr : Ifx_Shell_CmdLine , Ifx_Shell_Runtime
  • cntsSel : IfxGtm_Tim_ChannelControl
  • code : IfxEvadc_Adc_EmuxControl
  • codeforOne : IfxPsi5s_Psi5s_PulseGeneration
  • codeforZero : IfxPsi5s_Psi5s_PulseGeneration
  • col : IfxGeth_Eth_MiiPins
  • collisionAvoidanceDuration : IfxEray_Eray_Prtc1Control
  • collisionDetectionEnable : IfxAsclin_Lin_FrameControl
  • collisionDetectionError : IfxAsclin_Lin_ErrorFlags
  • combFilter : IfxEdsadc_Edsadc_ChannelConfig
  • commandDataCommandReceptionMode : IfxMsc_Msc_DownstreamControlConfig
  • commandExtensionConfig : IfxMsc_Msc_Config
  • commandFrameInterrupt : IfxMsc_Msc_InterruptConfig
  • commandFrameInterruptNode : IfxMsc_Msc_InterruptConfig
  • commandFrameLength : IfxMsc_Msc_CommandExtensionConfig , IfxMsc_Msc_DownstreamControlConfig
  • commandFramePassivePhaseLength : IfxMsc_Msc_CommandExtensionConfig
  • commandLine : Ifx_Shell_Command
  • commandList : Ifx_Shell , Ifx_Shell_Config
  • commonMode : IfxEdsadc_Edsadc_ChannelConfig
  • commonModeHoldVoltage : IfxEdsadc_Edsadc_CommonModeVoltageConfig
  • comparator : IfxStm_CompareConfig , IfxStm_Timer , IfxStm_Timer_Config
  • comparatorInterrupt : IfxStm_CompareConfig
  • comparatorShift : IfxStm_Timer
  • comparatorThreshold : IfxIom_Iom_FpcConfig
  • comparatorValue : IfxStm_Timer
  • compareOffset : IfxStm_CompareConfig
  • compareSize : IfxStm_CompareConfig
  • compareValue : IfxCcu6_PwmBc_Timer13 , IfxCcu6_TPwm_Timer12 , IfxCcu6_TPwm_Timer13
  • config : IfxGtm_Trig_AdcTrig_Channel , IfxGtm_Trig_CanTrig_Channel , IfxGtm_Trig_MscTrig_Channel
  • config0 : IfxMtu_MbistConfigPattern
  • config1 : IfxMtu_MbistConfigPattern
  • configBit : IfxSent_Sent_SerialMessageFrame
  • configError : IfxFce_Crc_EnabledInterrupts
  • configPatterns : IfxMtu_MbistConfig
  • configuration : IfxPsi5_Psi5_Message
  • configurationError : IfxQspi_SpiMaster_ErrorFlags , IfxQspi_SpiSlave_ErrorFlags
  • confirmation : Ifx_Ssw_Bmhd
  • contextManagement : IfxCpu_Trap_Id
  • control : Ifx_Shell
  • controlFrameExtensionPassivePhaseLength : IfxMsc_Msc_DownstreamControlExtensionConfig
  • controllerConfig : IfxEray_Eray_NodeConfig
  • controlSource : IfxIom_Driver_LamEventWindowConfig
  • conversionMode : IfxEvadc_Adc_ClassConfig
  • conversionModeEMUX : IfxEvadc_Adc_ClassConfig
  • correctionOffset : IfxEray_Eray_Gtu04Config
  • cosIn : Ifx_AngleTrkF32 , Ifx_AngleTrkF32_Config
  • count : Ifx_Fifo_Shared
  • countDir : IfxCcu6_TimerWithTrigger_Base , IfxGtm_Atom_Timer_Base , IfxGtm_Tom_Timer_Base , IfxStdIf_Timer_Config , IfxStm_Timer_Base
  • countedEventCombinerSelection0 : IfxIom_Iom_EcmGlobalEventSelectionBits
  • countedEventCombinerSelection1 : IfxIom_Iom_EcmGlobalEventSelectionBits
  • countedEventCombinerSelection2 : IfxIom_Iom_EcmGlobalEventSelectionBits
  • countedEventCombinerSelection3 : IfxIom_Iom_EcmGlobalEventSelectionBits
  • counter : IfxCpu_Counter
  • counter1 : IfxCpu_Perf
  • counter2 : IfxCpu_Perf
  • counter3 : IfxCpu_Perf
  • counterValue : IfxCcu6_Icu_Config , IfxCcu6_PwmBc_Timer12 , IfxCcu6_PwmBc_Timer13 , IfxCcu6_Timer_Timer12 , IfxCcu6_Timer_Timer13 , IfxCcu6_TPwm_Timer12 , IfxCcu6_TPwm_Timer13
  • countingInputMode : IfxCcu6_Icu_Clock
  • countMode : IfxCcu6_Icu_Config , IfxCcu6_PwmBc_Timer12 , IfxCcu6_Timer_Timer12 , IfxCcu6_TPwm_Timer12
  • countOneStep : Timer_Functions
  • cout0 : IfxCcu6_PwmHl_Config
  • cout1 : IfxCcu6_PwmHl_Config
  • cout2 : IfxCcu6_PwmHl_Config
  • cout60 : IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins
  • cout61 : IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins
  • cout62 : IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins
  • cout63 : IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins
  • coutx : IfxGtm_Atom_Dtm_PwmHl_Config , IfxGtm_Atom_Dtm_PwmHl_s , IfxGtm_Atom_PwmHl_Config , IfxGtm_Atom_PwmHl_s , IfxGtm_Tom_Dtm_PwmHl_Config , IfxGtm_Tom_Dtm_PwmHl_s , IfxGtm_Tom_PwmHl_Config , IfxGtm_Tom_PwmHl_s
  • coutxActiveState : IfxCcu6_PwmHl_Base , IfxGtm_Atom_Dtm_PwmHl_Base , IfxGtm_Atom_PwmHl_Base , IfxGtm_Tom_Dtm_PwmHl_Base , IfxGtm_Tom_PwmHl_Base , IfxStdIf_PwmHl_Config
  • coutxOutputEnabled : IfxStdIf_PwmHl_Config
  • coutxTemp : IfxGtm_Atom_PwmHl_s , IfxGtm_Tom_PwmHl_s
  • CPC : IfxGeth_TxDescr3_RF_Bits
  • cpol : IfxAsclin_Spi_InputOutputControl
  • cpuSafeState : IfxScuRcu_ResetCode
  • crc : Ifx_Ssw_Bmhd , IfxPsi5_Psi5_FrameData , IfxPsi5_Psi5_Message , IfxPsi5s_Psi5s_ReceivedBits , IfxSent_Sent_SerialMessageFrame
  • crc32BitReflectionEnabled : IfxFce_Crc_CrcConfig
  • crcChannel : IfxFce_Crc_Crc , IfxFce_Crc_CrcConfig
  • crcCheckCompared : IfxFce_Crc_CrcConfig
  • crcError : IfxHssl_Hssl_errorFlags , IfxPsi5_Psi5_FrameData , IfxPsi5s_Psi5s_ReceivedBits
  • crcErrorConsideredForRSI : IfxPsi5s_Psi5s_GlobalControlConfig
  • crcErrorInterrupt : IfxSent_Sent_Enable
  • crcGenerationControl : IfxPsi5s_Psi5s_TransmitControl
  • crcGenerationEnabled : IfxPsi5_Psi5_TransmitControl
  • crchighbit : Ifc_Crc_Table
  • crcinit_direct : Ifc_Crc
  • crcinit_nondirect : Ifc_Crc
  • crcInv : Ifx_Ssw_Bmhd
  • crcKernel : IfxFce_Crc_Crc , IfxFce_Crc_CrcConfig
  • crcmask : Ifc_Crc_Table
  • crcMethodDisabled : IfxSent_Sent_ReceiveControl
  • crcMismatch : IfxFce_Crc_EnabledInterrupts
  • crcModeDisabled : IfxSent_Sent_ReceiveControl
  • crcOrParity : IfxPsi5_Psi5_ReceiveControl , IfxPsi5s_Psi5s_ReceiveControl
  • crcResultInverted : IfxFce_Crc_CrcConfig
  • crctab : Ifc_Crc_Table16 , Ifc_Crc_Table32 , Ifc_Crc_Table8
  • crcxor : Ifc_Crc
  • crs : IfxGeth_Eth_MiiPins
  • crsDiv : IfxGeth_Eth_RmiiPins
  • csActiveLevel : SpiIf_ChMode
  • csEnable : IfxAsclin_Lin_LinControl
  • csi : IfxAsclin_Lin_LinControl
  • csInactiveDelay : SpiIf_ChMode
  • csLeadDelay : SpiIf_ChMode
  • cslpPolarity : IfxMsc_Msc_OutputControlConfig
  • csTrailDelay : SpiIf_ChMode
  • cts : IfxAsclin_Asc_Pins
  • ctsMode : IfxAsclin_Asc_Pins
  • CTXT : IfxGeth_RxContextDescr3_Bits , IfxGeth_RxDescr3_WF_Bits , IfxGeth_TxContextDescr3_Bits , IfxGeth_TxDescr3_RF_Bits , IfxGeth_TxDescr3_WF_Bits
  • currentFrameRequest : IfxHssl_Hssl_Channel
  • cursor : Ifx_Shell_CmdLine
  • cutOffFrequency : Ifx_LowPassPt1F32_Config
  • cycleCode : IfxEray_Header
  • cycleNumber : IfxEray_ReceivedHeader


iLLD_TC38A: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- d -

  • daBasedDmaChannelEnabled : IfxGeth_Eth_RxQueueConfig
  • DAF : IfxGeth_RxDescr2_WF_Bits
  • data : Ifc_Crc_Table16 , Ifc_Crc_Table32 , Ifc_Crc_Table8 , Ifx_DataBufferMode_TimeStampSingle , Ifx_Shell_Command , IfxAsclin_Lin_Config , IfxAsclin_Spi_Job , IfxEray_Eray_BufferReconfig , IfxEray_Eray_MessageRAMConfig , IfxEray_Eray_ReceivedFrame , IfxPsi5s_Psi5s_Frame , IfxSent_Sent_Frame , SpiIf_Job
  • dataBufferMode : IfxAsclin_Asc , IfxAsclin_Asc_Config
  • dataByteReflectionEnabled : IfxFce_Crc_CrcConfig
  • dataCoherent : IfxGtm_Tim_In
  • dataFrameExtensionPassivePhaseLength : IfxMsc_Msc_DownstreamControlExtensionConfig
  • dataFrameInterrupt : IfxMsc_Msc_InterruptConfig
  • dataFrameInterruptNode : IfxMsc_Msc_InterruptConfig
  • dataFramePassivePhaseLength : IfxMsc_Msc_DownstreamControlConfig
  • dataHeading : IfxQspi_SpiSlave_Protocol , SpiIf_ChMode
  • dataLength : IfxAsclin_Asc_FrameControl , IfxAsclin_Lin_DataControl , IfxAsclin_Lin_PduType , IfxAsclin_Spi_Config
  • dataLengthCode : IfxCan_Message
  • dataLengthError : IfxHssl_Hssl_errorFlags
  • dataLost : IfxGtm_Tim_In
  • dataModificationMode : IfxEvadc_Adc_ChannelConfig
  • dataPointer : IfxEray_Header
  • dataPtr : IfxAsclin_Lin_PduType
  • dataReadMode : IfxEdsadc_Edsadc_DemodulatorConfig
  • dataReceived : IfxEray_Eray_ReceiveControl
  • dataReductionControlMode : IfxEvadc_Adc_ChannelConfig
  • dataSize : IfxMtu_SramItem
  • dataStream : IfxEdsadc_Edsadc_DemodulatorConfig
  • dataTransfered : IfxEray_Eray_TransmitControl , IfxEray_SlotConfig
  • dataWidth : IfxAsclin_Spi , IfxQspi_SpiMaster_Channel_s , IfxQspi_SpiSlave , IfxQspi_SpiSlave_Protocol , SpiIf_ChMode
  • DB : IfxGeth_TxDescr3_WF_Bits
  • dc : IfxMsc_CxModeCommand
  • dce : IfxMsc_CxModeCommand
  • DE : IfxGeth_RxContextDescr3_Bits , IfxGeth_RxDescr3_WF_Bits
  • deactivateSlso : IfxQspi_SpiMaster_Channel_s
  • deadtime : IfxCcu6_PwmHl_Base , IfxGtm_Atom_Dtm_PwmHl_Base , IfxGtm_Atom_PwmHl_Base , IfxGtm_Tom_Dtm_PwmHl_Base , IfxGtm_Tom_PwmHl_Base , IfxStdIf_PwmHl_Config
  • deadTimeClock : IfxGtm_Atom_Dtm_PwmHl_Config , IfxGtm_Tom_Dtm_PwmHl_Config
  • deadTimeValue : IfxCcu6_TPwm_Timer12
  • decimationFactor : IfxEdsadc_Edsadc_CombFilterConfig
  • decodingCorrection : IfxEray_Eray_Gtu05Config
  • dedicatedTxBuffersNumber : IfxCan_Can_TxConfig
  • delay : IfxEvadc_Adc_FastCompareChannelConfig , IfxQspi_DelayConst
  • delayLength : IfxPsi5_Psi5_PulseGeneration
  • delta : Ifx_ClpxFloat32_Integral , Ifx_IntegralF32 , Ifx_RampF32
  • demodulator : IfxEdsadc_Edsadc_ChannelConfig
  • denominator : IfxAsclin_Lin_BaudrateGeneration
  • descr : IfxGeth_RxDescrList , IfxGeth_TxDescrList
  • description : Ifx_Shell_Syntax
  • destinationAddress : IfxDma_Dma_ChannelConfig
  • destinationAddressCircularRange : IfxDma_Dma_ChannelConfig
  • destinationAddressIncrementDirection : IfxDma_Dma_ChannelConfig
  • destinationAddressIncrementStep : IfxDma_Dma_ChannelConfig
  • destinationCircularBufferEnabled : IfxDma_Dma_ChannelConfig
  • deviceAddress : IfxI2c_I2c_Device , IfxI2c_I2c_deviceConfig
  • digitalGlitchFilterDepth : IfxSent_Sent_InputOutputControl
  • digitalInputFilterDepth : IfxPsi5_Psi5_InputOutputControl
  • din : IfxEdsadc_Edsadc_ChannelPins
  • dinMode : IfxEdsadc_Edsadc_ChannelPins
  • direction : Ifx_AngleTrkF32_PosIf , IfxAsclin_Lin_PduType , IfxGpt12_IncrEnc
  • disablePostCalibration : IfxEvadc_Adc_GroupConfig
  • disableUpdate : IfxStdIf_Timer_
  • disableWatchdog : IfxScuWdt_Config
  • discardCount : IfxEdsadc_Edsadc_IntegratorConfig
  • ditheringEnabled : IfxEdsadc_Edsadc_ModulatorConfig , IfxEdsadc_ModulatorConfig
  • ditheringIntensity : IfxEdsadc_Edsadc_Config
  • dividerMode : IfxMsc_Msc_Clock
  • dma : IfxDma_Dma , IfxDma_Dma_Channel , IfxDma_Dma_Config , IfxGeth_Eth_Config , IfxQspi_SpiMaster , IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave , IfxQspi_SpiSlave_Config
  • doubleClockForMSBConversionSelection : IfxEvadc_Adc_GroupConfig
  • downstreamConfig : IfxMsc_Msc_Config
  • downstreamDataSourcesHigh : IfxMsc_Msc_DownstreamControlConfig
  • downstreamDataSourcesLow : IfxMsc_Msc_DownstreamControlConfig
  • downstreamExtensionConfig : IfxMsc_Msc_Config
  • downstreamExtensionDataSourcesHigh : IfxMsc_Msc_DownstreamControlExtensionConfig
  • downstreamExtensionDataSourcesLow : IfxMsc_Msc_DownstreamControlExtensionConfig
  • driftErrorsDisabled : IfxSent_Sent_ReceiveControl
  • driver : IfxQspi_SpiMaster_Output , IfxSent_Sent_Channel , IfxSent_Sent_ChannelConfig , IfxStdIf_DPipe_ , IfxStdIf_Pos_ , IfxStdIf_PwmHl_ , IfxStdIf_Timer_ , SpiIf_ , SpiIf_Ch_ , SpiIf_ChConfig_
  • droopRequestType : IfxPmsPm_VoltageDroopConfig
  • droopStep : IfxPmsPm_VoltageDroopConfig
  • dsn : IfxEdsadc_Edsadc_ChannelPins
  • dsnMode : IfxEdsadc_Edsadc_ChannelPins
  • dsp : IfxEdsadc_Edsadc_ChannelPins
  • dspMode : IfxEdsadc_Edsadc_ChannelPins
  • dtm : IfxGtm_Atom_Dtm_PwmHl_s , IfxGtm_Atom_Timer , IfxGtm_Tom_Dtm_PwmHl_s , IfxGtm_Tom_Timer
  • dtmChannel : IfxGtm_Atom_Dtm_PwmHl_s , IfxGtm_Atom_Timer , IfxGtm_Tom_Dtm_PwmHl_s , IfxGtm_Tom_Timer
  • dtmClockFreq : IfxGtm_Atom_Dtm_PwmHl_s , IfxGtm_Tom_Dtm_PwmHl_s
  • dtmClockSource : IfxGtm_Atom_Pwm_Config , IfxGtm_Atom_Timer_Config , IfxGtm_Tom_Pwm_Config , IfxGtm_Tom_Timer_Config
  • dummyRxValue : IfxQspi_SpiMaster_Channel_s , IfxQspi_SpiMaster_ChannelConfig
  • dummyTxValue : IfxQspi_SpiMaster_Channel_s , IfxQspi_SpiMaster_ChannelConfig
  • duplexMode : IfxGeth_Eth_MacConfig
  • dutyCycle : IfxGtm_Atom_Pwm_Config , IfxGtm_Tom_Pwm_Config
  • dynamicActionPoint : IfxEray_Eray_Gtu09Config
  • dynamicSlotCount : IfxEray_Eray_Gtu08Config
  • dynamicSlotLength : IfxEray_Eray_Gtu08Config


iLLD_TC38A: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- e -

  • EC : IfxGeth_TxDescr3_WF_Bits
  • eccInvPos0 : IfxMtu_SramItem
  • eccInvPos1 : IfxMtu_SramItem
  • eccSize : IfxMtu_SramItem
  • echo : Ifx_Shell_Config , Ifx_Shell_Flags , Ifx_Shell_Runtime
  • echoError : Ifx_Shell_Flags
  • ED : IfxGeth_TxDescr3_WF_Bits
  • edgeCount : IfxGtm_Tim_In
  • edgeCounterCleared : IfxSent_Sent_InputOutputControl
  • edgeCounterUpper : IfxGtm_Tim_In
  • edgeType : IfxIom_Iom_FpcConfig
  • edsadc : IfxEdsadc_Edsadc , IfxEdsadc_Edsadc_Config
  • egpr0Sel : IfxGtm_Tim_ChannelControl
  • egpr1Sel : IfxGtm_Tim_ChannelControl
  • elementConfiguration : IfxCan_Filter
  • elementSize : _Fifo
  • emergencyEnabled : IfxStdIf_PwmHl_Config
  • emergencyStopEnableBits : IfxMsc_Msc_DownstreamControlConfig
  • emergencyStopExtensionEnableBits : IfxMsc_Msc_DownstreamControlExtensionConfig
  • emuxInterface : IfxEvadc_Adc_EmuxControl
  • emuxOutPinConfig : IfxEvadc_Adc_EmuxControl
  • en0 : IfxMsc_Msc_Io
  • en1 : IfxMsc_Msc_Io
  • en2 : IfxMsc_Msc_Io
  • en3 : IfxMsc_Msc_Io
  • enable : IfxGtm_Tim_ChannelControl , IfxSent_Sent_EnabledInterrupts
  • enableAruRouting : IfxGtm_Tim_ChannelControl
  • enableAutomaticPasswordChange : IfxScuWdt_Config
  • enableAuxInputSourceSelect : IfxGtm_Tim_Timer_Config
  • enableCounterReset : IfxGtm_Tim_ChannelControl
  • enabled : Ifx_Shell_Flags , IfxEdsadc_Edsadc_RectifierConfig , IfxStdIf_Timer_TrigConfig , SpiIf_ChMode
  • enabledInterrupt : IfxAsclin_Lin_InterruptConfig
  • enabledInterrupts : IfxFce_Crc_CrcConfig , IfxSent_Sent_ChannelConfig
  • enableExternalCaptureMode : IfxGtm_Tim_ChannelControl
  • enableFaultToRunTransition : IfxSmu_Smu_AlarmGlobalConfiguration
  • enableFilter : IfxGtm_Tim_ChannelControl
  • enableLoadJumpTimer : IfxPmsPm_LoadJumpConfig
  • enableLoadJumpTimerOverflowFlag : IfxPmsPm_LoadJumpConfig
  • enableLoadJumpTimerOverflowInterrupt : IfxPmsPm_LoadJumpConfig
  • enableOneShotMode : IfxGtm_Tim_ChannelControl
  • enablePortControlled : IfxPort_LvdsConfig
  • enableRecoveryTimer0 : IfxSmu_Smu_RecoveryTimerConfig
  • enableRecoveryTimer1 : IfxSmu_Smu_RecoveryTimerConfig
  • enableScr : IfxPmsPm_StandbyConfig
  • enableSmuRestriction : IfxScuWdt_Config
  • enableStandbyOnVddRampDown : IfxPmsPm_StandbyConfig
  • enableStandbyOnVextRampDown : IfxPmsPm_StandbyConfig
  • enableTimerCheck : IfxScuWdt_Config
  • enableTimerCheckTolerance : IfxScuWdt_Config
  • enableVoltageDroopTimer : IfxPmsPm_VoltageDroopConfig
  • enableVoltageDroopTimerOverflowFlag : IfxPmsPm_VoltageDroopConfig
  • enableVoltageDroopTimerOverflowInterrupt : IfxPmsPm_VoltageDroopConfig
  • enableWakeupOnEsr0 : IfxPmsPm_StandbyConfig
  • enableWakeupOnEsr1 : IfxPmsPm_StandbyConfig
  • enableWakeupOnPinA : IfxPmsPm_StandbyConfig
  • enableWakeupOnPinB : IfxPmsPm_StandbyConfig
  • enableWakeupOnPorst : IfxPmsPm_StandbyConfig
  • enableWakeupOnPower : IfxPmsPm_StandbyConfig
  • enableWakeupOnScr : IfxPmsPm_StandbyConfig
  • enableWakeupOnTimer : IfxPmsPm_StandbyConfig
  • end : IfxFlash_flashSector , IfxHssl_Hssl_AccessWindow
  • endIndex : _Fifo
  • ENDIS_CTRL : IfxGtm_Tom_TGC
  • ENDIS_STAT : IfxGtm_Tom_TGC
  • endPulseIgnored : IfxSent_Sent_ReceiveControl
  • enhancedProtocolSelected : IfxPsi5_Psi5_TransmitControl
  • enhancedProtocolSelection : IfxPsi5s_Psi5s_TransmitControl
  • eray : IfxEray_Eray
  • erPriority : IfxAsclin_Asc_InterruptConfig , IfxAsclin_Spi_InterruptConfig , SpiIf_Config
  • errorChecks : SpiIf_Ch_ , SpiIf_ChConfig_
  • errorFlag0 : IfxPsi5s_Psi5s_ReceivedBits
  • errorFlag1 : IfxPsi5s_Psi5s_ReceivedBits
  • errorFlags : IfxAsclin_Asc , IfxAsclin_Asc_Config , IfxAsclin_Spi , IfxHssl_Hssl , IfxQspi_SpiMaster_Channel_s , IfxQspi_SpiSlave
  • errorFlagsStatus : IfxAsclin_Lin
  • errorInterruptNode : IfxSent_Sent_InterruptNodeControl
  • errorLoggingOverflowEnabled : IfxCan_Can_InterruptConfig
  • errorPassiveEnabled : IfxCan_Can_InterruptConfig
  • errorStateIndicator : IfxCan_Message
  • errorThreshold : Ifx_AngleTrkF32_CfgData , Ifx_AngleTrkF32_Config
  • ES : IfxGeth_RxDescr3_WF_Bits , IfxGeth_TxDescr3_WF_Bits
  • escBracketNum : Ifx_Shell_Runtime
  • esr0DigitalFilterUsage : IfxPmsPm_StandbyConfig
  • esr0PinStateRequest : IfxPmsPm_StandbyConfig
  • esr0TriggerEvent : IfxPmsPm_StandbyConfig
  • esr1DigitalFilterUsage : IfxPmsPm_StandbyConfig
  • esr1TriggerEvent : IfxPmsPm_StandbyConfig
  • evadc : IfxEvadc_Adc , IfxEvadc_Adc_Config , IfxEvadc_Adc_EmuxControl
  • event : IfxIom_Driver_LamConfig
  • eventActiveEdgeSelection : IfxIom_Iom_LamConfig
  • eventCombinerSelection0 : IfxIom_Iom_EcmGlobalEventSelectionBits
  • eventCombinerSelection1 : IfxIom_Iom_EcmGlobalEventSelectionBits
  • eventCombinerSelection10 : IfxIom_Iom_EcmGlobalEventSelectionBits
  • eventCombinerSelection11 : IfxIom_Iom_EcmGlobalEventSelectionBits
  • eventCombinerSelection12 : IfxIom_Iom_EcmGlobalEventSelectionBits
  • eventCombinerSelection13 : IfxIom_Iom_EcmGlobalEventSelectionBits
  • eventCombinerSelection14 : IfxIom_Iom_EcmGlobalEventSelectionBits
  • eventCombinerSelection15 : IfxIom_Iom_EcmGlobalEventSelectionBits
  • eventCombinerSelection2 : IfxIom_Iom_EcmGlobalEventSelectionBits
  • eventCombinerSelection3 : IfxIom_Iom_EcmGlobalEventSelectionBits
  • eventCombinerSelection4 : IfxIom_Iom_EcmGlobalEventSelectionBits
  • eventCombinerSelection5 : IfxIom_Iom_EcmGlobalEventSelectionBits
  • eventCombinerSelection6 : IfxIom_Iom_EcmGlobalEventSelectionBits
  • eventCombinerSelection7 : IfxIom_Iom_EcmGlobalEventSelectionBits
  • eventCombinerSelection8 : IfxIom_Iom_EcmGlobalEventSelectionBits
  • eventCombinerSelection9 : IfxIom_Iom_EcmGlobalEventSelectionBits
  • eventCounter : IfxIom_Iom_EcmConfig
  • eventReader : _Fifo
  • eventSelect : IfxEdsadc_Edsadc_FirFilterConfig
  • eventSource : IfxIom_Iom_LamConfig
  • eventWindow : IfxIom_Driver_LamConfig
  • eventWindowInverted : IfxIom_Iom_LamConfig
  • eventWindowThreshold : IfxIom_Iom_LamConfig
  • eventWriter : _Fifo
  • exBreakDetected : IfxAsclin_Lin_EnabledInterrupts
  • exchange : SpiIf_funcs
  • exCollisionDetectionError : IfxAsclin_Lin_EnabledInterrupts
  • execute : Ifx_Shell_Protocol
  • exFramingError : IfxAsclin_Lin_EnabledInterrupts
  • exHeaderTimeout : IfxAsclin_Lin_EnabledInterrupts
  • exLinAutobaudDetectionError : IfxAsclin_Lin_EnabledInterrupts
  • exLinChecksumError : IfxAsclin_Lin_EnabledInterrupts
  • exLinParityError : IfxAsclin_Lin_EnabledInterrupts
  • exorInputEnable : IfxIom_Iom_FpcConfig
  • expectedCrc : IfxFce_Crc_Crc , IfxFce_Crc_CrcConfig
  • expectTimeoutError : IfxQspi_SpiMaster_ErrorFlags , IfxQspi_SpiSlave_ErrorFlags
  • exPriority : IfxAsclin_Lin_InterruptConfig
  • exReceiveFIFOOverflow : IfxAsclin_Lin_EnabledInterrupts
  • exResponseTimeout : IfxAsclin_Lin_EnabledInterrupts
  • extClockEnabled : IfxCcu6_Icu_Clock
  • extClockInput : IfxCcu6_Icu_Clock
  • extendedFilterForNonMatchingFrames : IfxCan_Can_FilterConfig
  • extendedFilterListStartAddress : IfxCan_MessageRAM
  • extendEdgeCounterOverflow : IfxGtm_Tim_ChannelControl
  • extendedListSize : IfxCan_Can_FilterConfig
  • extendedSerialFrameMode : IfxSent_Sent_ReceiveControl
  • extension : IfxMsc_Msc_CommandExtensionConfig , IfxMsc_Msc_DownstreamControlExtensionConfig
  • externalOffset : IfxEray_Eray_Gtu11Config
  • externalOffsetCorrection : IfxEray_Eray_Gtu11Config
  • externalRate : IfxEray_Eray_Gtu11Config
  • externalRateCorrection : IfxEray_Eray_Gtu11Config
  • externalSignalInjectionPin0 : IfxMsc_Msc_DownstreamControlConfig
  • externalSignalInjectionPin1 : IfxMsc_Msc_DownstreamControlConfig
  • externalTimeBaseSelect : IfxPsi5_Psi5_PulseGeneration , IfxPsi5_Psi5_TimeStampConfig , IfxPsi5s_Psi5s_PulseGeneration , IfxPsi5s_Psi5s_TimeStampConfig
  • externalTrigger : IfxSent_Sent_InputOutputControl
  • externalTriggerOperatingMode : IfxEvadc_Adc_FastCompareChannelConfig
  • externalTriggerPolarity : IfxEvadc_Adc_FastCompareChannelConfig
  • externalTriggerSelect : IfxPsi5_Psi5_PulseGeneration , IfxPsi5s_Psi5s_PulseGeneration
  • extInputTrigger : IfxCcu6_Icu_TriggerConfig
  • extInputTriggerMode : IfxCcu6_Icu_TriggerConfig , IfxCcu6_Timer_TriggerConfig , IfxCcu6_TPwm_TriggerConfig
  • exTransmissionCompleted : IfxAsclin_Lin_EnabledInterrupts
  • exTransmitFIFOOverflow : IfxAsclin_Lin_EnabledInterrupts


iLLD_TC38A: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- f -

  • fallingEdgeFilterTime : IfxGtm_Tim_In_ConfigFilter , IfxGtm_Tim_Timer_Config , IfxIom_Driver_LamFilterConfig
  • fallingEdgeMode : IfxGtm_Tim_In_ConfigFilter
  • fastBaudRate : IfxCan_Can_NodeConfig
  • fastClock : IfxPsi5_Psi5_Config
  • fastCompareChannel : IfxEvadc_Adc_FastCompareChannel
  • fastCompareChannelId : IfxEvadc_Adc_FastCompareChannel , IfxEvadc_Adc_FastCompareChannelConfig
  • fastMode : IfxMsc_Msc_CommandExtensionConfig
  • faultStateDurationHigh : IfxSmu_Smu_FaultSignalingProtocol
  • faultStateDurationLow : IfxSmu_Smu_FaultSignalingProtocol
  • fce : IfxFce_Crc , IfxFce_Crc_Config , IfxFce_Crc_Crc , IfxFce_Crc_CrcConfig
  • fceChannelId : IfxFce_Crc_CrcConfig
  • fceDmaChannel : IfxFce_Crc_Crc
  • fclClockControl : IfxMsc_Msc_OutputControlConfig
  • fcln : IfxMsc_Msc_Io
  • fclp : IfxMsc_Msc_Io
  • fclpPolarity : IfxMsc_Msc_OutputControlConfig
  • fcRestartControl : IfxEdsadc_Edsadc_IntegratorConfig
  • FD : IfxGeth_RxDescr3_WF_Bits , IfxGeth_TxDescr3_RF_Bits , IfxGeth_TxDescr3_WF_Bits
  • FF : IfxGeth_TxDescr3_WF_Bits
  • fifo : IfxAsclin_Asc_Config , IfxAsclin_Lin_Config , IfxAsclin_Spi_Config
  • fifoBufferStartIndex : IfxEray_Eray_MessageRAMConfig
  • fifoConfigured : IfxEray_Eray_MessageRAMConfig
  • fifoDepth : IfxEray_Eray_MessageRAMConfig
  • fifoMode : IfxEvadc_Adc_ChannelConfig
  • fifoNullFramesRejected : IfxEray_Eray_MessageRAMConfig
  • fifoWarningLevel : IfxPsi5_Psi5_ReceiveControl
  • filter : IfxGtm_Tim_In_Config , IfxIom_Driver_LamMonConfig , IfxIom_Driver_LamRefConfig , IfxPmsPm_WakeupConfig
  • filterConfig : IfxCan_Can_NodeConfig
  • filterCounterFrequency : IfxGtm_Tim_ChannelControl
  • filterCounterModeFallingEdge : IfxGtm_Tim_ChannelControl
  • filterCounterModeRisingEdge : IfxGtm_Tim_ChannelControl
  • filterDepth : IfxAsclin_Lin_BitSamplingControl
  • filteredCycleNumber : IfxEray_Eray_MessageRAMConfig
  • filterMode : IfxIom_Iom_FpcConfig
  • filterModeFallingEdge : IfxGtm_Tim_ChannelControl
  • filterModeRisingEdge : IfxGtm_Tim_ChannelControl
  • fir0Enabled : IfxEdsadc_Edsadc_FirFilterConfig
  • fir1DecimateRate : IfxEdsadc_Edsadc_FirFilterConfig
  • fir1Enabled : IfxEdsadc_Edsadc_FirFilterConfig
  • firFilter : IfxEdsadc_Edsadc_ChannelConfig
  • firstDynamicBuffer : IfxEray_Eray_MessageRAMConfig
  • firstWrite : IfxQspi_SpiMaster_Channel_s
  • fixedBurstEnabled : IfxGeth_Eth_DmaConfig
  • FL_TPL : IfxGeth_TxDescr3_RF_Bits
  • flags : IfxAsclin_Asc_ErrorFlagsUnion , IfxAsclin_Lin_FrameDataControl , SpiIf_Ch_
  • flashFconWaitStateConfig : IfxScuCcu_Config
  • flushQueueAfterInit : IfxEvadc_Adc_QueueConfig
  • flushTx : IfxStdIf_DPipe_
  • forwardErrorPacket : IfxGeth_Eth_RxQueueConfig
  • forwardUndersizedGoodPacket : IfxGeth_Eth_RxQueueConfig
  • fracDiv : IfxPsi5_Psi5_Config , IfxPsi5s_Psi5s_Config
  • fractionalDividerEnabled : IfxPsi5s_Psi5s_AscConfig
  • fractionalRefVoltage : IfxEdsadc_Edsadc_CommonModeVoltageConfig
  • frame : IfxAsclin_Asc_Config , IfxAsclin_Lin_Config , IfxAsclin_Spi_Config , IfxCan_Can_NodeConfig , IfxPsi5_Psi5_Frame
  • frameCheckMode : IfxSent_Sent_ReceiveControl
  • frameError : IfxAsclin_Asc_ErrorFlags , IfxAsclin_Lin_ErrorFlags , IfxAsclin_Spi_ErrorFlags
  • frameExpectation : IfxPsi5_Psi5_ReceiveControl
  • frameId : IfxEray_Header , IfxEray_ReceivedHeader , IfxPsi5s_Psi5s_ReceivedBits
  • frameIdFilter : IfxEray_Eray_MessageRAMConfig
  • frameIdSelect : IfxPsi5s_Psi5s_ReceiveControl
  • frameLength : IfxSent_Sent_ReceiveControl
  • frameMode : IfxAsclin_Asc_FrameControl , IfxAsclin_Lin_Config , IfxAsclin_Spi_Config , IfxCan_Can_Node , IfxCan_Message
  • frameTimestampSelect : IfxPsi5_Psi5_ReceiveControl
  • framingCheckEnabled : IfxPsi5s_Psi5s_AscConfig
  • framingErrorConsideredForRSI : IfxPsi5s_Psi5s_GlobalControlConfig
  • freq : IfxScuLbist_ParameterSet
  • frequency : Icu_Config , Icu_s , IfxCcu6_Icu_Config , IfxEdsadc_Edsadc_CarrierGenConfig , IfxPsi5_Psi5_Clock , IfxPsi5s_Psi5s_Clock , IfxStdIf_Timer_Config , TPwm_Config , TPwm_s
  • frequencyDriftCheckEnabled : IfxSent_Sent_ReceiveControl
  • frequencyDriftErrorInterrupt : IfxSent_Sent_Enable
  • frequencyRangeErrorInterrupt : IfxSent_Sent_Enable
  • fsp : IfxSmu_Smu_Config
  • fspConfigRegister : IfxSmu_Smu_Config
  • functions : SpiIf_
  • FUPD_CTRL : IfxGtm_Tom_TGC


iLLD_TC38A: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- g -

  • gain : Ifx_LowPassPt1F32_Config , Ifx_LutIndexedLinearF32_Item , Ifx_LutLinearF32_Item
  • gainCalibrationConfig : IfxEdsadc_Edsadc_ChannelConfig
  • gainFactor : IfxEdsadc_Edsadc_ChannelConfig , IfxEdsadc_Edsadc_GainCalibrationConfig
  • gateOperatingMode : IfxEvadc_Adc_FastCompareChannelConfig
  • gatingMode : IfxEvadc_Adc_GatingTriggerConfig
  • gatingSource : IfxEvadc_Adc_GatingTriggerConfig
  • getAbsolutePosition : IfxStdIf_Pos_
  • getDeadtime : IfxStdIf_PwmHl_
  • getDeadtimeTick : IfxStdIf_PwmHl_
  • getDirection : IfxStdIf_Pos_
  • getFault : IfxStdIf_Pos_
  • getFrequency : IfxStdIf_Timer_
  • gethEnabled : IfxPmsPm_SleepConfig
  • gethSFR : IfxGeth_Eth , IfxGeth_Eth_Config
  • getInputFrequency : IfxStdIf_Timer_
  • getMinPulse : IfxStdIf_PwmHl_
  • getMode : IfxStdIf_PwmHl_
  • getOffset : IfxStdIf_Pos_
  • getPeriod : IfxStdIf_Timer_
  • getPeriodPerRotation : IfxStdIf_Pos_
  • getPosition : IfxStdIf_Pos_
  • getRawPosition : IfxStdIf_Pos_
  • getReadCount : IfxStdIf_DPipe_
  • getReadEvent : IfxStdIf_DPipe_
  • getRefreshPeriod : IfxStdIf_Pos_
  • getResolution : IfxStdIf_Pos_ , IfxStdIf_Timer_
  • getSendCount : IfxStdIf_DPipe_
  • getSensorType : IfxStdIf_Pos_
  • getSpeed : IfxStdIf_Pos_
  • getStatus : SpiIf_funcs
  • getTimeStamp : Icu_Functions
  • getTrigger : IfxStdIf_Timer_
  • getTurn : IfxStdIf_Pos_
  • getTxTimeStamp : IfxStdIf_DPipe_
  • getWriteCount : IfxStdIf_DPipe_
  • getWriteEvent : IfxStdIf_DPipe_
  • GLB_CTRL : IfxGtm_Tom_TGC
  • glitch : IfxGtm_Tim_In
  • glitchFallingCleared : IfxSent_Sent_InputOutputControl
  • glitchRisingCleared : IfxSent_Sent_InputOutputControl
  • globalControlConfig : IfxPsi5s_Psi5s_Config
  • globalEndInitInputFrequency : IfxScuWdt_Config
  • globalEventSelection : IfxIom_Iom_EcmConfig
  • globalInputClass : IfxEvadc_Adc_Config
  • globalResultUsage : IfxEvadc_Adc_ChannelConfig
  • GP : IfxGeth_RxDescr3_WF_Bits
  • gpr0Sel : IfxGtm_Tim_ChannelControl
  • gpr1Sel : IfxGtm_Tim_ChannelControl
  • gpt12Enabled : IfxPmsPm_SleepConfig
  • grefClk : IfxGeth_Eth_RgmiiPins
  • group : IfxEvadc_Adc_Channel , IfxEvadc_Adc_ChannelConfig , IfxEvadc_Adc_Group
  • groupId : IfxEvadc_Adc_EmuxControl , IfxEvadc_Adc_Group , IfxEvadc_Adc_GroupConfig , IfxEvadc_GxBfl_Out , IfxEvadc_Vadcg_In
  • groupIndex0 : IfxSmu_Smu_RecoveryTimerAlarmConfiguration
  • groupIndex1 : IfxSmu_Smu_RecoveryTimerAlarmConfiguration
  • groupIndex2 : IfxSmu_Smu_RecoveryTimerAlarmConfiguration
  • groupIndex3 : IfxSmu_Smu_RecoveryTimerAlarmConfiguration
  • gtm : IfxGtm_Atom_Pwm_Config , IfxGtm_Atom_Pwm_Driver , IfxGtm_Atom_Timer , IfxGtm_Atom_Timer_Config , IfxGtm_Tim_In_Config , IfxGtm_Tim_Timer , IfxGtm_Tom_Pwm_Config , IfxGtm_Tom_Pwm_Driver , IfxGtm_Tom_Timer , IfxGtm_Tom_Timer_Config
  • gtmEnabled : IfxPmsPm_SleepConfig
  • gtu01Config : IfxEray_Eray_GTUConfig
  • gtu02Config : IfxEray_Eray_GTUConfig
  • gtu03Config : IfxEray_Eray_GTUConfig
  • gtu04Config : IfxEray_Eray_GTUConfig
  • gtu05Config : IfxEray_Eray_GTUConfig
  • gtu06Config : IfxEray_Eray_GTUConfig
  • gtu07Config : IfxEray_Eray_GTUConfig
  • gtu08Config : IfxEray_Eray_GTUConfig
  • gtu09Config : IfxEray_Eray_GTUConfig
  • gtu10Config : IfxEray_Eray_GTUConfig
  • gtu11Config : IfxEray_Eray_GTUConfig
  • gtuConfig : IfxEray_Eray_ControllerConfig


iLLD_TC38A: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- h -

  • halfSupplyVoltge : IfxEdsadc_Edsadc_CommonModeVoltageConfig
  • halfTs : Ifx_AngleTrkF32
  • hallPatternIndex : IfxCcu6_PwmBc , IfxCcu6_PwmBc_Config
  • hallSyncEvent : IfxCcu6_PwmBc_Config
  • hardwareRequestEnabled : IfxDma_Dma_ChannelConfig
  • header : IfxEray_Eray_BufferReconfig , IfxEray_Eray_MessageRAMConfig , IfxEray_Eray_ReceivedFrame
  • headerCrc : IfxEray_ReceivedHeader
  • headerErrorConsideredForRSI : IfxPsi5s_Psi5s_GlobalControlConfig
  • headerErrorFlag : IfxPsi5s_Psi5s_ReceivedBits
  • headerID : IfxAsclin_Lin_FrameDataControl
  • headerOnly : IfxAsclin_Lin_DataControl
  • headerReceived : IfxEray_Eray_ReceiveControl
  • headerTimeout : IfxAsclin_Lin_ErrorFlags , IfxAsclin_Lin_LinControl
  • headerTransfered : IfxEray_Eray_TransmitControl , IfxEray_SlotConfig
  • help : Ifx_Shell_Command
  • HF : IfxGeth_RxDescr2_WF_Bits
  • highAddress : IfxMtu_MbistSshConfig
  • highPhaseOfShiftClock : IfxMsc_Msc_Abra
  • highPriorityMessageEnabled : IfxCan_Can_InterruptConfig
  • highSpeedMode : IfxHssl_Hsct_Config
  • highWord : IfxPsi5_Psi5_Rdm
  • historyAdd : Ifx_Shell_CmdLine
  • historyItem : Ifx_Shell_CmdLine
  • HL : IfxGeth_RxDescr2_WF_Bits
  • hours : Ifx_DateTime
  • hpe : IfxCan_Can_InterruptConfig
  • hsct : IfxHssl_Hsct , IfxHssl_Hsct_Config , IfxHssl_Hssl_Channel , IfxHssl_Hssl_ChannelConfig
  • hssl : IfxHssl_Hssl , IfxHssl_Hssl_Channel , IfxHssl_Hssl_ChannelConfig , IfxHssl_Hssl_Config


iLLD_TC38A: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- i -

  • i2c : IfxI2c_I2c , IfxI2c_I2c_Config , IfxI2c_I2c_Device , IfxI2c_I2c_deviceConfig
  • i2cEnabled : IfxPmsPm_SleepConfig
  • ibusyIsrProvider : IfxEray_Eray_Interrupt
  • ibusyPriority : IfxEray_Eray_Interrupt
  • id1 : IfxCan_Filter
  • id2 : IfxCan_Filter
  • idleDelay : IfxAsclin_Asc_FrameControl , IfxAsclin_Lin_FrameControl , IfxAsclin_Spi_FrameControl
  • idleDynamicSlots : IfxEray_Eray_Gtu09Config
  • idlePrechargeLevel : IfxEvadc_Adc_GroupConfig
  • idleTime : IfxPsi5s_Psi5s_GlobalControlConfig
  • igcs0 : IfxSmu_Smu_AlarmGlobalConfiguration
  • igcs1 : IfxSmu_Smu_AlarmGlobalConfiguration
  • igcs2 : IfxSmu_Smu_AlarmGlobalConfiguration
  • ignoreSignalLevel : IfxGtm_Tim_ChannelControl
  • IHE : IfxGeth_TxDescr3_WF_Bits
  • ik : Ifx_ClpxFloat32_Integral , Ifx_IntegralF32 , Ifx_RampF32
  • imag : cfloat32 , cfract , csfract , csint16 , csint32
  • immediateStartEnabled : IfxGtm_Atom_Pwm_Config , IfxGtm_Tom_Pwm_Config
  • in : IfxPsi5_Psi5_PinsConfig , IfxSent_Sent_Pins
  • index : Ifx_CircularBuffer , IfxModule_IndexMap
  • inhibitingAutomaticTransferEnabled : IfxPsi5_Psi5_TransmitControl
  • initPins : IfxGpt12_IncrEnc_Config , IfxGtm_Atom_Dtm_PwmHl_Config , IfxGtm_Atom_PwmHl_Config , IfxGtm_Atom_Timer_Config , IfxGtm_Tom_Dtm_PwmHl_Config , IfxGtm_Tom_PwmHl_Config , IfxGtm_Tom_Timer_Config
  • inj0 : IfxMsc_Msc_Io
  • inj1 : IfxMsc_Msc_Io
  • injectionPositionPin0 : IfxMsc_Msc_DownstreamControlConfig
  • injectionPositionPin1 : IfxMsc_Msc_DownstreamControlConfig
  • inMode : IfxPsi5_Psi5_PinsConfig , IfxSent_Sent_Pins
  • input : IfxGtm_Tim_In_ConfigFilter , IfxIom_Driver_LamMonConfig , IfxIom_Driver_LamRefConfig , IfxIom_Iom_EcmConfigCounter , IfxQspi_SpiMaster_InputOutput
  • inputbuffer : Ifx_Shell_Runtime
  • inputBufferEnabled : IfxEvadc_Adc_GroupConfig
  • inputClass : IfxEvadc_Adc_ChannelConfig , IfxEvadc_Adc_GroupConfig
  • inputClasses : IfxEvadc_Adc_GroupConfig
  • inputDataSource : IfxEdsadc_Edsadc_DemodulatorConfig
  • inputFrequency : IfxScuWdt_Config
  • inputGain : IfxEdsadc_Edsadc_ModulatorConfig , IfxEdsadc_ModulatorConfig
  • inputInverterEnabled : IfxPsi5_Psi5_InputOutputControl
  • inputMode : IfxCcu6_PwmBc_Pins
  • inputMuxActionControl : IfxEdsadc_Edsadc_ModulatorConfig , IfxEdsadc_ModulatorConfig
  • inputOutput : IfxAsclin_Spi_Config
  • inputOutputControl : IfxPsi5_Psi5_ChannelConfig , IfxSent_Sent_ChannelConfig
  • inputPin : IfxEdsadc_Edsadc_ModulatorConfig , IfxEdsadc_ModulatorConfig , IfxGtm_Tim_In_ConfigFilter
  • inputPinMode : IfxGtm_Tim_In_ConfigFilter
  • inputPulsePolarityHigh : IfxSent_Sent_InputOutputControl
  • inputSourceSelect : IfxGtm_Tim_Timer_Config
  • inSelect : IfxGeth_Mdio_InOut , IfxI2c_Scl_InOut , IfxI2c_Sda_InOut
  • instruction : IfxCpu_Perf
  • instructionErrors : IfxCpu_Trap_Id
  • int0IsrProvider : IfxEray_Eray_Interrupt
  • int0Priority : IfxEray_Eray_Interrupt
  • int1IsrProvider : IfxEray_Eray_Interrupt
  • int1Priority : IfxEray_Eray_Interrupt
  • INT_TRIG : IfxGtm_Tom_TGC
  • integrationCount : IfxEdsadc_Edsadc_IntegratorConfig
  • integrationCycles : IfxEdsadc_Edsadc_IntegratorConfig
  • integrationTrigger : IfxEdsadc_Edsadc_DemodulatorConfig
  • integrator : IfxEdsadc_Edsadc_ChannelConfig
  • integratorResetEnabled : IfxEdsadc_Edsadc_ModulatorConfig , IfxEdsadc_ModulatorConfig
  • interfaceMode : IfxHssl_Hsct_Config
  • internalProtection : IfxCpu_Trap_Id
  • interrupt : IfxAsclin_Asc_Config , IfxAsclin_Lin_Config , IfxAsclin_Spi_Config , IfxEray_Eray_Config , IfxGeth_Eth_MtlConfig , IfxGtm_Atom_Pwm_Config , IfxGtm_Tom_Pwm_Config , IfxSent_Sent_ChannelConfig
  • interrupt1 : IfxCcu6_Icu_ChannelConfig , IfxCcu6_PwmBc_Config , IfxCcu6_Timer_Config , IfxCcu6_TPwm_Config
  • interrupt2 : IfxCcu6_Icu_ChannelConfig , IfxCcu6_PwmBc_Config , IfxCcu6_Timer_Config , IfxCcu6_TPwm_Config
  • interrupt3 : IfxCcu6_Icu_ChannelConfig , IfxCcu6_PwmBc_Config , IfxCcu6_Timer_Config , IfxCcu6_TPwm_Config
  • interrupt4 : IfxCcu6_Icu_ChannelConfig , IfxCcu6_PwmBc_Config , IfxCcu6_Timer_Config , IfxCcu6_TPwm_Config
  • interruptAfterLastEnabled : IfxQspi_SpiMaster_MoveCounterControl
  • interruptBeforeLastEnabled : IfxQspi_SpiMaster_MoveCounterControl
  • interruptConfig : IfxCan_Can_NodeConfig , IfxMsc_Msc_Config
  • interruptLine : IfxCan_GroupInterruptConfig
  • interruptRaiseThreshold : IfxDma_Dma_ChannelConfig
  • interuptNodeControl : IfxSent_Sent_ChannelConfig
  • inverted : IfxCcu6_PwmHl_Base , IfxCcu6_PwmHl_Mode , IfxEdsadc_Edsadc_CarrierGenConfig , IfxGtm_Atom_Dtm_PwmHl_Base , IfxGtm_Atom_Dtm_PwmHl_Mode , IfxGtm_Atom_PwmHl_Base , IfxGtm_Atom_PwmHl_Mode , IfxGtm_Tom_Dtm_PwmHl_Base , IfxGtm_Tom_Dtm_PwmHl_Mode , IfxGtm_Tom_PwmHl_Base , IfxGtm_Tom_PwmHl_Mode , IfxIom_Driver_LamEventWindowConfig , IfxIom_Driver_LamMonConfig , IfxIom_Driver_LamRefConfig
  • inWidth : IfxAsclin_Asc_FifoControl , IfxAsclin_Lin_FifoControl , IfxAsclin_Spi_FifoControl
  • io : Ifx_Shell , IfxMsc_Msc_Config
  • IOC : IfxGeth_RxDescr3_RF_Bits , IfxGeth_TxDescr2_RF_Bits
  • iom : IfxIom_Iom
  • iomDriver : IfxIom_Driver_Lam , IfxIom_Driver_LamConfig
  • IP4 : IfxGeth_RxDescr1_WF_Bits
  • IP6 : IfxGeth_RxDescr1_WF_Bits
  • IPCB : IfxGeth_RxDescr1_WF_Bits
  • IPCE : IfxGeth_RxDescr1_WF_Bits
  • IPHE : IfxGeth_RxDescr1_WF_Bits
  • irqEnable : IfxGtm_Tim_Timer_Config
  • irqMode : IfxGtm_Tim_In_Config , IfxGtm_Tim_Timer_Config
  • irqModeTimer : IfxGtm_Atom_Timer_Config , IfxGtm_Tom_Timer_Config
  • irqModeTrigger : IfxGtm_Atom_Timer_Config , IfxGtm_Tom_Timer_Config
  • irqOnCntOverflow : IfxGtm_Tim_In_ConfigCapture
  • irqOnDatalost : IfxGtm_Tim_In_ConfigCapture
  • irqOnEcntOverflow : IfxGtm_Tim_In_ConfigCapture
  • irqOnGlitch : IfxGtm_Tim_In_ConfigFilter
  • irqOnNewVal : IfxGtm_Tim_In_ConfigCapture
  • irqOnTimeout : IfxGtm_Tim_In_ConfigTimeout
  • irqType : IfxGtm_Tim_Timer_Config
  • isInterruptMode : IfxAsclin_Lin , IfxAsclin_Lin_Config
  • isrPriority : IfxDts_Dts_Config , IfxFce_Crc_Config , IfxGtm_Atom_Pwm_Interrupt , IfxGtm_Tim_In_Config , IfxGtm_Tom_Pwm_Interrupt , IfxStdIf_Timer_Config , IfxStdIf_Timer_TrigConfig
  • isrProvider : IfxGtm_Atom_Pwm_Interrupt , IfxGtm_Tim_In_Config , IfxGtm_Tom_Pwm_Interrupt , IfxSent_Sent_Interrupt , IfxStdIf_Timer_Config , IfxStdIf_Timer_TrigConfig , SpiIf_Config
  • isrTypeOfService : IfxDts_Dts_Config , IfxFce_Crc_Config
  • itr : IfxEdsadc_Edsadc_ChannelPins
  • itrMode : IfxEdsadc_Edsadc_ChannelPins
  • ITS : IfxGeth_RxDescr2_WF_Bits
  • IVLTV : IfxGeth_TxContextDescr3_Bits
  • IVT : IfxGeth_RxDescr0_WF_Bits , IfxGeth_TxContextDescr2_Bits
  • IVTIR : IfxGeth_TxContextDescr3_Bits


iLLD_TC38A: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- j -

  • JT : IfxGeth_TxDescr3_WF_Bits


iLLD_TC38A: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- k -

  • k2Divider : IfxScuCcu_PerPllConfig , IfxScuCcu_SysPllConfig
  • k2Step : IfxScuCcu_PllStepConfig
  • k3Divider : IfxScuCcu_PerPllConfig
  • k3DividerBypass : IfxScuCcu_PerPllConfig
  • kd : Ifx_AngleTrkF32_CfgData , Ifx_AngleTrkF32_Config
  • ki : Ifx_AngleTrkF32_CfgData , Ifx_AngleTrkF32_Config
  • kp : Ifx_AngleTrkF32_CfgData , Ifx_AngleTrkF32_Config


iLLD_TC38A: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- l -

  • L3FM : IfxGeth_RxDescr2_WF_Bits
  • L3L4FM : IfxGeth_RxDescr2_WF_Bits
  • L4FM : IfxGeth_RxDescr2_WF_Bits
  • lamId : IfxIom_Iom_LamConfig
  • lamMode : IfxIom_Iom_LamConfig
  • lamMonitorInputChannel : IfxIom_Iom_LamConfig
  • lamMonitorSource : IfxIom_Iom_LamConfig
  • lamReferenceInputChannel : IfxIom_Iom_LamConfig
  • lamUsedMask : IfxIom_Driver
  • lastTrailingDelay : IfxQspi_SpiMaster_MoveCounterControl
  • latestTransmissionStart : IfxEray_Eray_ControllerConfig
  • LC : IfxGeth_TxDescr3_WF_Bits
  • LD : IfxGeth_RxDescr3_WF_Bits , IfxGeth_TxDescr3_RF_Bits , IfxGeth_TxDescr3_WF_Bits
  • leadDelay : IfxAsclin_Lin_FrameControl , IfxAsclin_Spi_FrameControl
  • length : Ifx_CircularBuffer , Ifx_Shell_CmdLine
  • lengthError : IfxFce_Crc_EnabledInterrupts
  • limitCheck : IfxEvadc_Adc_ChannelConfig
  • lin : IfxAsclin_Lin_Config
  • linAutobaudDetectionError : IfxAsclin_Lin_ErrorFlags
  • linChecksumError : IfxAsclin_Lin_ErrorFlags
  • lineSpeed : IfxGeth_Eth_MacConfig
  • linFrameData : IfxAsclin_Lin
  • linMode : IfxAsclin_Lin , IfxAsclin_Lin_Config
  • linParityError : IfxAsclin_Lin_ErrorFlags
  • listenTimeOut : IfxEray_Eray_Succ2Config
  • listenTimeOutNoise : IfxEray_Eray_Succ2Config
  • LOC : IfxGeth_TxDescr3_WF_Bits
  • locals : Ifx_Shell
  • loi : IfxCan_Can_InterruptConfig
  • loopBack : IfxAsclin_Asc_Config , IfxAsclin_Spi_InputOutputControl , IfxHssl_Hsct , IfxHssl_Hsct_Config , IfxHssl_Hssl , IfxHssl_Hssl_Channel , IfxHssl_Hssl_ChannelConfig
  • loopback : SpiIf_ChMode
  • loopbackEnabled : IfxPsi5s_Psi5s_AscConfig
  • loopbackMode : IfxGeth_Eth_MacConfig
  • lowAddress : IfxMtu_MbistSshConfig
  • lowerBoundary : IfxEvadc_Adc_ChannelConfig
  • lowerLimit : IfxAsclin_Lin_BaudrateDetection
  • lowerTemperatureLimit : IfxDts_Dts_Config
  • lowPhaseOfShiftClock : IfxMsc_Msc_Abra
  • lowWord : IfxPsi5_Psi5_Rdm
  • LT : IfxGeth_RxDescr3_WF_Bits
  • lvdsMode : IfxPort_LvdsConfig


iLLD_TC38A: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- m -

  • mac : IfxGeth_Eth_Config
  • macAddress : IfxGeth_Eth_MacConfig
  • macroticksPerCycle : IfxEray_Eray_Gtu02Config
  • MADRM : IfxGeth_RxDescr2_WF_Bits
  • mask : Ifx_InternalMux_MuxConfig , IfxPmsEvr_StepDownRegulatorRegConfig , IfxScuCcu_CcuconRegConfig , IfxScuCcu_FlashWaitstateConfig
  • masks : IfxPort_Esr_Masks
  • master : IfxEvadc_Adc_GroupConfig
  • masterCpu : IfxPmsPm_SleepConfig , IfxPmsPm_StandbyConfig
  • maxBurstLength : IfxGeth_Eth_RxChannelConfig , IfxGeth_Eth_TxChannelConfig
  • maxColdStartAttempts : IfxEray_Eray_Succ1Config
  • maxcount : Ifx_Fifo_Shared
  • maxDriftOffset : IfxEray_Eray_Gtu06Config
  • maximumBaudrate : IfxQspi_SpiMaster , SpiIf_Config
  • maxOffsetCorrection : IfxEray_Eray_Gtu10Config
  • maxPacketSize : IfxGeth_Eth_MacConfig
  • maxPulse : IfxCcu6_PwmHl_Base , IfxGtm_Atom_Dtm_PwmHl_Base , IfxGtm_Atom_PwmHl_Base , IfxGtm_Tom_Dtm_PwmHl_Base , IfxGtm_Tom_PwmHl_Base
  • maxRateCorrection : IfxEray_Eray_Gtu10Config
  • maxSpeed : IfxGpt12_IncrEnc , IfxStdIf_Pos_Config
  • maxSyncFrames : IfxEray_Eray_Gtu02Config
  • mbsc0IsrProvider : IfxEray_Eray_Interrupt
  • mbsc0Priority : IfxEray_Eray_Interrupt
  • mbsc1IsrProvider : IfxEray_Eray_Interrupt
  • mbsc1Priority : IfxEray_Eray_Interrupt
  • mcanClockSource : IfxPmsPm_SleepConfig
  • mcanEnabled : IfxPmsPm_SleepConfig
  • mcontrol : IfxMtu_MbistConfig
  • mdc : IfxGeth_Eth_MiiPins , IfxGeth_Eth_RgmiiPins , IfxGeth_Eth_RmiiPins
  • mdio : IfxGeth_Eth_MiiPins , IfxGeth_Eth_RgmiiPins , IfxGeth_Eth_RmiiPins
  • measured : IfxAsclin_Lin_BaudrateDetection
  • medianFilter : IfxAsclin_Asc_BitTimingControl , IfxAsclin_Lin_BitSamplingControl , IfxAsclin_Spi_BitSamplingControl
  • memoryAccessViolation : IfxHssl_Hssl_errorFlags
  • memoryManagement : IfxCpu_Trap_Id
  • message : IfxPsi5_Psi5_SerialMessage
  • messageId : IfxCan_Message , IfxPsi5_Psi5_Message , IfxSent_Sent_SerialMessageFrame
  • messageIdLength : IfxCan_Can_FilterConfig , IfxCan_Message
  • messageRAM : IfxCan_Can_Node , IfxCan_Can_NodeConfig
  • messageRAMAccessFailureEnabled : IfxCan_Can_InterruptConfig
  • messageRAMConfig : IfxEray_Eray_NodeConfig
  • messageStoredToDedicatedRxBufferEnabled : IfxCan_Can_InterruptConfig
  • messagingBitsError : IfxPsi5_Psi5_FrameData
  • messagingBitsPresence : IfxPsi5_Psi5_ReceiveControl
  • microticksPerCycle : IfxEray_Eray_Gtu01Config
  • miiPins : IfxGeth_Eth_PinConfig
  • minDelayBeforeWakeUp : IfxPmsPm_StandbyConfig
  • minPulse : IfxCcu6_PwmHl_Base , IfxGtm_Atom_Dtm_PwmHl_Base , IfxGtm_Atom_PwmHl_Base , IfxGtm_Tom_Dtm_PwmHl_Base , IfxGtm_Tom_PwmHl_Base , IfxStdIf_PwmHl_Config
  • minResolution : IfxStdIf_Timer_Config
  • minSpeed : IfxGpt12_IncrEnc , IfxStdIf_Pos_Config
  • minutes : Ifx_DateTime
  • mixedBurstEnabled : IfxGeth_Eth_DmaConfig
  • Mod_Amp : IfxScuCcu_Mod_Config
  • Mod_Enable : IfxScuCcu_Mod_Config
  • mode : IfxCan_Can_Frame , IfxCcu6_PwmHl_Base , IfxCcu6_PwmHl_Mode , IfxEvadc_Adc_EmuxControl , IfxGtm_Atom_Dtm_PwmHl_Base , IfxGtm_Atom_Dtm_PwmHl_Mode , IfxGtm_Atom_Pwm_Config , IfxGtm_Atom_Pwm_Driver , IfxGtm_Atom_Pwm_Interrupt , IfxGtm_Atom_PwmHl_Base , IfxGtm_Atom_PwmHl_Mode , IfxGtm_Tim_ChannelControl , IfxGtm_Tim_In_ConfigCapture , IfxGtm_Tim_InputSourceSelect , IfxGtm_Tom_Dtm_PwmHl_Base , IfxGtm_Tom_Dtm_PwmHl_Mode , IfxGtm_Tom_Pwm_Interrupt , IfxGtm_Tom_PwmHl_Base , IfxGtm_Tom_PwmHl_Mode , IfxI2c_I2c_Config , IfxIom_Driver_LamFilterConfig , IfxMsc_Msc_en , IfxMsc_Msc_fcln , IfxMsc_Msc_fclp , IfxMsc_Msc_inj0 , IfxMsc_Msc_inj1 , IfxMsc_Msc_sdi , IfxMsc_Msc_son , IfxMsc_Msc_sop , IfxPmsPm_WakeupConfig , IfxPort_Io_ConfigPin , IfxPort_Pin_Config , IfxPsi5_Psi5_Clock , IfxPsi5s_Psi5s_Clock , IfxQspi_SpiMaster_Channel_s , IfxQspi_SpiMaster_ChannelConfig , IfxQspi_SpiMaster_Input , IfxQspi_SpiMaster_Output , IfxSmu_Smu_FaultSignalingProtocol , SpiIf_ChConfig_ , SpiIf_Config
  • modulationConfig : IfxScuCcu_Config
  • modulator : IfxEdsadc_Edsadc_ChannelConfig
  • modulatorClockFreq : IfxEdsadc_Edsadc_ModulatorConfig
  • modulatorClockMode : IfxEdsadc_Edsadc_Config
  • modulatorClockPeriod : IfxEdsadc_ModulatorConfig
  • module : IfxAsclin_Cts_In , IfxAsclin_Rts_Out , IfxAsclin_Rx_In , IfxAsclin_Sclk_Out , IfxAsclin_Slso_Out , IfxAsclin_Tx_Out , IfxCan_Rxd_In , IfxCan_Txd_Out , IfxCcu6_Cc60_Out , IfxCcu6_Cc60in_In , IfxCcu6_Cc61_Out , IfxCcu6_Cc61in_In , IfxCcu6_Cc62_Out , IfxCcu6_Cc62in_In , IfxCcu6_Ccpos0_In , IfxCcu6_Ccpos1_In , IfxCcu6_Ccpos2_In , IfxCcu6_Cout60_Out , IfxCcu6_Cout61_Out , IfxCcu6_Cout62_Out , IfxCcu6_Cout63_Out , IfxCcu6_Ctrap_In , IfxCcu6_T12hr_In , IfxCcu6_T13hr_In , IfxDma_Dma_ChannelConfig , IfxDmu_Fdest_In , IfxEdsadc_Cgpwm_Out , IfxEdsadc_Cin_In , IfxEdsadc_Cout_Out , IfxEdsadc_Din_In , IfxEdsadc_Dscin_In , IfxEdsadc_Dscout_Out , IfxEdsadc_Dsdin_In , IfxEdsadc_Dsn_In , IfxEdsadc_Dsp_In , IfxEdsadc_Edsadc_Channel , IfxEdsadc_Edsadc_ChannelConfig , IfxEdsadc_Itr_In , IfxEdsadc_Sg_In , IfxEray_Eray_Config , IfxEray_Rxd_In , IfxEray_Txd_Out , IfxEray_Txen_Out , IfxEvadc_Adc_FastCompareChannel , IfxEvadc_Adc_FastCompareChannelConfig , IfxEvadc_Adc_Group , IfxEvadc_Adc_GroupConfig , IfxEvadc_Emux_Out , IfxEvadc_GxBfl_Out , IfxEvadc_Vadcg_In , IfxGeth_Col_In , IfxGeth_Crs_In , IfxGeth_Crsdv_In , IfxGeth_Grefclk_In , IfxGeth_Mdc_Out , IfxGeth_Mdio_InOut , IfxGeth_Pps_Out , IfxGeth_Refclk_In , IfxGeth_Rxclk_In , IfxGeth_Rxctl_In , IfxGeth_Rxd_In , IfxGeth_Rxdv_In , IfxGeth_Rxer_In , IfxGeth_Txclk_In , IfxGeth_Txclk_Out , IfxGeth_Txctl_Out , IfxGeth_Txd_Out , IfxGeth_Txen_Out , IfxGeth_Txer_Out , IfxGpt12_Capin_In , IfxGpt12_IncrEnc , IfxGpt12_IncrEnc_Config , IfxGpt12_TxEud_In , IfxGpt12_TxIn_In , IfxGpt12_TxOut_Out , IfxGtm_Clk_Out , IfxI2c_Scl_InOut , IfxI2c_Sda_InOut , IfxIom_Driver , IfxIom_Driver_Config , IfxModule_IndexMap , IfxMsc_En_Out , IfxMsc_Fcln_Out , IfxMsc_Fclp_Out , IfxMsc_Inj_In , IfxMsc_Sdi_In , IfxMsc_Son_Out , IfxMsc_Sop_Out , IfxPms_Dcdcsync_Out , IfxPms_Hwcfg_In , IfxPms_Wkp_In , IfxPsi5_Psi5_Channel , IfxPsi5_Psi5_ChannelConfig , IfxPsi5_Rx_In , IfxPsi5_Tx_Out , IfxPsi5s_Clk_Out , IfxPsi5s_Psi5s_Channel , IfxPsi5s_Psi5s_ChannelConfig , IfxPsi5s_Psi5s_Config , IfxPsi5s_Rx_In , IfxPsi5s_Tx_Out , IfxQspi_Hsicin_In , IfxQspi_Mrst_In , IfxQspi_Mrst_Out , IfxQspi_Mtsr_In , IfxQspi_Mtsr_Out , IfxQspi_Sclk_In , IfxQspi_Sclk_Out , IfxQspi_Slsi_In , IfxQspi_Slso_Out , IfxScu_Dcdcsync_Out , IfxScu_Emgstop_In , IfxScu_Evrwup_In , IfxScu_Extclk_Out , IfxScu_Req_In , IfxScu_Wdtlck_Out , IfxSent_Sent_Config , IfxSent_Sent_In , IfxSent_Spc_Out , IfxSmu_Fsp_Out
  • moer : IfxCan_Can_InterruptConfig
  • mon : IfxIom_Driver_LamConfig
  • monIndex : IfxIom_Driver_Lam
  • monInput : IfxIom_Driver_Lam
  • monitorSignal : IfxIom_Iom_FpcConfig
  • monitorSignalInverted : IfxIom_Iom_LamConfig
  • moveCounterControl : IfxQspi_SpiMaster_Channel_s
  • moveCounterEnabled : IfxQspi_SpiMaster_MoveCounterControl
  • moveSize : IfxDma_Dma_ChannelConfig
  • mrst : IfxQspi_SpiMaster_Pins , IfxQspi_SpiSlave_Pins
  • mrstMode : IfxQspi_SpiMaster_Pins , IfxQspi_SpiSlave_Pins
  • msc : IfxMsc_Msc , IfxMsc_Msc_Config
  • MSS : IfxGeth_TxContextDescr2_Bits
  • mtl : IfxGeth_Eth_Config
  • mtsr : IfxQspi_SpiMaster_Pins , IfxQspi_SpiSlave_Pins
  • mtsrMode : IfxQspi_SpiMaster_Pins , IfxQspi_SpiSlave_Pins
  • multiChannelControl : IfxCcu6_PwmBc_Config
  • multiInputCaptureEnabled : IfxCcu6_Icu_ChannelConfig
  • muxConfig : Ifx_InternalMux_Config


iLLD_TC38A: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- n -

  • name : Ifx_GlobalResources_Item
  • NC : IfxGeth_TxDescr3_WF_Bits
  • ndat0IsrProvider : IfxEray_Eray_Interrupt
  • ndat0Priority : IfxEray_Eray_Interrupt
  • ndat1IsrProvider : IfxEray_Eray_Interrupt
  • ndat1Priority : IfxEray_Eray_Interrupt
  • nDivider : IfxScuCcu_PerPllConfig , IfxScuCcu_SysPllConfig
  • nDividerAbra : IfxMsc_Msc_Abra
  • nDividerDownstream : IfxMsc_Msc_CommandExtensionConfig , IfxMsc_Msc_DownstreamControlExtensionConfig
  • negativeInput : IfxEdsadc_Edsadc_CommonModeVoltageConfig , IfxEdsadc_Edsadc_ModulatorConfig , IfxEdsadc_ModulatorConfig
  • networkStartIdleTime : IfxEray_Eray_Gtu04Config
  • networkVectorLength : IfxEray_Eray_ControllerConfig
  • newData : IfxGtm_Tim_In
  • nibbleControl : IfxSent_Sent_ChannelConfig
  • nibblePointer0 : IfxSent_Sent_NibbleControl
  • nibblePointer1 : IfxSent_Sent_NibbleControl
  • nibblePointer2 : IfxSent_Sent_NibbleControl
  • nibblePointer3 : IfxSent_Sent_NibbleControl
  • nibblePointer4 : IfxSent_Sent_NibbleControl
  • nibblePointer5 : IfxSent_Sent_NibbleControl
  • nibblePointer6 : IfxSent_Sent_NibbleControl
  • nibblePointer7 : IfxSent_Sent_NibbleControl
  • nibblesValueOutOfRangeErrorInterrupt : IfxSent_Sent_Enable
  • nibblesWrongErrorInterrupt : IfxSent_Sent_Enable
  • node : IfxCan_Can_Node
  • nodeAPins : IfxEray_Eray_Pins
  • nodeBPins : IfxEray_Eray_Pins
  • nodeId : IfxCan_Can_NodeConfig , IfxCan_Rxd_In , IfxCan_Txd_Out , IfxEray_Rxd_In , IfxEray_Txd_Out , IfxEray_Txen_Out
  • noFrameReceivedError : IfxPsi5_Psi5_FrameData
  • noiseFilter : PwmHl_Config
  • nonMaskableInterrupt : IfxCpu_Trap_Id
  • notAcknowledgeError : IfxHssl_Hssl_errorFlags
  • nullFrameIndicator : IfxEray_ReceivedHeader
  • number : IfxCan_Filter
  • numberOfBitsError : IfxPsi5_Psi5_FrameData
  • numberOfCyclePairsForActive : IfxEray_Eray_Succ1Config
  • numberOfFramesExpected : IfxPsi5s_Psi5s_ReceiveControl
  • numberOfMessageBuffers : IfxEray_Eray_MessageRAMConfig
  • numBlocks : IfxMtu_SramItem
  • numerator : IfxAsclin_Lin_BaudrateGeneration
  • numOfConfigPatterns : IfxMtu_MbistConfig
  • numOfConfigSets : IfxScuLbist_MultiTriggerConfig
  • numOfPhases : IfxPmsEvr_initSequence
  • numOfRegisters : IfxPmsEvr_checkRegConfig , IfxPmsEvr_initSequencePhase
  • numOfRxChannels : IfxGeth_Eth , IfxGeth_Eth_DmaConfig
  • numOfRxQueues : IfxGeth_Eth_MtlConfig
  • numOfSshConfigurations : IfxMtu_MbistConfig
  • numOfSteps : IfxScuCcu_PllThrottleConfig
  • numOfTxChannels : IfxGeth_Eth , IfxGeth_Eth_DmaConfig
  • numOfTxQueues : IfxGeth_Eth_MtlConfig


iLLD_TC38A: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- o -

  • object : Ifx_Shell_Protocol
  • obusyIsrProvider : IfxEray_Eray_Interrupt
  • obusyPriority : IfxEray_Eray_Interrupt
  • OE : IfxGeth_RxDescr3_WF_Bits
  • offset : Ifx_AngleTrkF32_Config , Ifx_AngleTrkF32_PosIf , Ifx_LutIndexedLinearF32_Item , Ifx_LutLinearF32_Item , IfxGpt12_IncrEnc , IfxGtm_Atom_Timer , IfxGtm_Tom_Timer , IfxStdIf_Pos_Config
  • offsetCompensation : IfxEdsadc_Edsadc_FirFilterConfig
  • onError : IfxStdIf_DPipe_ , SpiIf_funcs
  • oneShotModeEnabled : IfxGtm_Atom_Pwm_Config , IfxGtm_Tom_Pwm_Config
  • onEventA : IfxStdIf_Pos_
  • onExchangeEnd : SpiIf_Ch_
  • onReceive : IfxStdIf_DPipe_
  • onRx : SpiIf_funcs
  • onStart : Ifx_Shell_Protocol
  • onStartData : Ifx_Shell_Protocol
  • onTransfer : IfxQspi_SpiSlave , SpiIf_Flags
  • onTransmit : IfxStdIf_DPipe_
  • onTx : SpiIf_funcs
  • onZeroIrq : IfxStdIf_Pos_
  • OPC : IfxGeth_RxDescr1_WF_Bits
  • operationMode : IfxDma_Dma_ChannelConfig
  • order : Ifc_Crc_Table
  • OSTC : IfxGeth_TxContextDescr3_Bits
  • OTS : IfxGeth_RxDescr2_WF_Bits
  • out : Ifx_LowPassPt1F32 , IfxPsi5_Psi5_PinsConfig , IfxSent_Sent_Pins
  • OUTEN_CTRL : IfxGtm_Tom_TGC
  • OUTEN_STAT : IfxGtm_Tom_TGC
  • outMode : IfxPsi5_Psi5_PinsConfig , IfxSent_Sent_Pins
  • output : IfxQspi_SpiMaster_InputOutput
  • outputControlConfig : IfxMsc_Msc_Config
  • outputDriver : IfxStdIf_PwmHl_Config , IfxStdIf_Timer_TrigConfig
  • outputEnabled : IfxStdIf_Timer_TrigConfig
  • outputInverterEnabled : IfxPsi5_Psi5_InputOutputControl
  • outputLine : IfxCcu6_PwmBc_TriggerConfig , IfxCcu6_TPwm_TriggerConfig
  • outputMode : IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins , IfxEvadc_Adc_EmuxPinConfig , IfxGtm_Atom_Pwm_pin , IfxGtm_Tom_Pwm_pin , IfxStdIf_PwmHl_Config , IfxStdIf_Timer_TrigConfig
  • outputPin : IfxGtm_Atom_Pwm_pin , IfxGtm_Tom_Pwm_pin
  • outputPulsePolarityHigh : IfxSent_Sent_InputOutputControl
  • Outputs : IfxGtm_Spe_OutputPattern
  • outputTrigger : IfxCcu6_PwmBc_TriggerConfig , IfxCcu6_TPwm_TriggerConfig
  • outputTriggerEnabled : IfxCcu6_PwmBc_TriggerConfig , IfxCcu6_TPwm_TriggerConfig
  • outSelect : IfxGeth_Mdio_InOut , IfxI2c_Scl_InOut , IfxI2c_Sda_InOut
  • outWidth : IfxAsclin_Asc_FifoControl , IfxAsclin_Lin_FifoControl , IfxAsclin_Spi_FifoControl
  • overflowCnt : IfxGtm_Tim_In
  • overflowInterrupt : IfxMsc_Msc_InterruptConfig
  • overflowInterruptNode : IfxMsc_Msc_InterruptConfig
  • overlfow : IfxCpu_Counter
  • overrunCheckEnabled : IfxPsi5s_Psi5s_AscConfig
  • overrunErrorConsideredForRSI : IfxPsi5s_Psi5s_GlobalControlConfig
  • oversampling : IfxAsclin_Asc_BaudRate , IfxAsclin_Lin_BitTimingControl , IfxAsclin_Spi_Baudrate
  • overshootCompensation : IfxEdsadc_Edsadc_FirFilterConfig
  • OVT : IfxGeth_RxDescr0_WF_Bits
  • OWN : IfxGeth_RxContextDescr3_Bits , IfxGeth_RxDescr3_RF_Bits , IfxGeth_RxDescr3_WF_Bits , IfxGeth_TxContextDescr3_Bits , IfxGeth_TxDescr3_RF_Bits , IfxGeth_TxDescr3_WF_Bits


iLLD_TC38A: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- p -

  • packetFrameCount : IfxPsi5s_Psi5s_ReceivedBits , IfxPsi5s_Psi5s_ReceivedData , IfxPsi5s_Psi5s_Timestamp
  • packetLength : IfxGeth_Eth_FrameConfig
  • padDriver : IfxCan_Can_Pins , IfxEvadc_Adc_EmuxPinConfig , IfxGtm_Atom_Pwm_pin , IfxGtm_Tom_Pwm_pin , IfxI2c_Pins , IfxPort_Io_ConfigPin , IfxPort_Pin_Config
  • padStateRequest : IfxPmsPm_StandbyConfig
  • padSupply : IfxPort_LvdsConfig
  • parameterSets : IfxScuLbist_MultiTriggerConfig
  • parity : IfxMsc_Msc_UpstreamStatusConfig
  • parityBit : IfxAsclin_Asc_FrameControl
  • parityCheck : SpiIf_ChMode
  • parityCheckEnabled : IfxPsi5s_Psi5s_AscConfig
  • parityEnable : IfxAsclin_Lin_FrameControl
  • parityError : IfxAsclin_Asc_ErrorFlags , IfxQspi_SpiMaster_ErrorFlags , IfxQspi_SpiSlave_ErrorFlags
  • parityErrorConsideredForRSI : IfxPsi5s_Psi5s_GlobalControlConfig
  • parityMode : IfxQspi_SpiSlave_Protocol , SpiIf_ChMode
  • parityType : IfxAsclin_Asc_FrameControl , IfxAsclin_Lin_FrameControl
  • passiveTimeFrameCount : IfxMsc_Msc_DownstreamControlConfig
  • password : IfxScuWdt_Config
  • pattern : IfxDma_Dma_ChannelConfig , IfxScuLbist_ParameterSet
  • pause : TPwm_Functions
  • pauseOnBaudrateSpikeErrors : IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave_Config
  • pauseRunTransition : IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave_Config
  • payloadLength : IfxEray_Header , IfxEray_ReceivedHeader , IfxPsi5_Psi5_ReceiveControl , IfxPsi5_Psi5_TransmitControl , IfxPsi5s_Psi5s_ReceiveControl , IfxPsi5s_Psi5s_TransmitControl
  • payloadPreambleIndicator : IfxEray_ReceivedHeader
  • PCE : IfxGeth_TxDescr3_WF_Bits
  • pDivider : IfxScuCcu_PerPllConfig , IfxScuCcu_SysPllConfig
  • pending : IfxAsclin_Spi_Job
  • period : IfxCcu6_Icu_Config , IfxCcu6_TimerWithTrigger_Base , IfxGtm_Atom_Pwm_Config , IfxGtm_Atom_Timer_Base , IfxGtm_Tom_Pwm_Config , IfxGtm_Tom_Timer_Base , IfxStm_Timer_Base , TPwm_Config , TPwm_s
  • periodicOrExternal : IfxPsi5s_Psi5s_PulseGeneration
  • periodicOrExternalOrBypass : IfxPsi5_Psi5_PulseGeneration
  • periodPerRotation : Ifx_AngleTrkF32_Config , Ifx_AngleTrkF32_PosIf , IfxStdIf_Pos_Config
  • periodTick : IfxGtm_Tim_In
  • perPllConfig : IfxScuCcu_pllsParameterConfig
  • PFT : IfxGeth_RxDescr1_WF_Bits
  • phase : Spi_ErrorChecks
  • phaseConfig : IfxPmsEvr_initSequence
  • phaseDelay : PwmHl_Config
  • phyInterfaceMode : IfxGeth_Eth_Config
  • pid : IfxAsclin_Lin_PduType
  • pin : IfxAsclin_Cts_In , IfxAsclin_Rts_Out , IfxAsclin_Rx_In , IfxAsclin_Sclk_Out , IfxAsclin_Slso_Out , IfxAsclin_Tx_Out , IfxCan_Rxd_In , IfxCan_Txd_Out , IfxCcu6_Cc60_Out , IfxCcu6_Cc60in_In , IfxCcu6_Cc61_Out , IfxCcu6_Cc61in_In , IfxCcu6_Cc62_Out , IfxCcu6_Cc62in_In , IfxCcu6_Ccpos0_In , IfxCcu6_Ccpos1_In , IfxCcu6_Ccpos2_In , IfxCcu6_Cout60_Out , IfxCcu6_Cout61_Out , IfxCcu6_Cout62_Out , IfxCcu6_Cout63_Out , IfxCcu6_Ctrap_In , IfxCcu6_T12hr_In , IfxCcu6_T13hr_In , IfxDmu_Fdest_In , IfxEdsadc_Cgpwm_Out , IfxEdsadc_Cin_In , IfxEdsadc_Cout_Out , IfxEdsadc_Din_In , IfxEdsadc_Dscin_In , IfxEdsadc_Dscout_Out , IfxEdsadc_Dsdin_In , IfxEdsadc_Dsn_In , IfxEdsadc_Dsp_In , IfxEdsadc_Itr_In , IfxEdsadc_Sg_In , IfxEray_Rxd_In , IfxEray_Txd_Out , IfxEray_Txen_Out , IfxEvadc_Emux_Out , IfxEvadc_GxBfl_Out , IfxEvadc_Vadcg_In , IfxGeth_Col_In , IfxGeth_Crs_In , IfxGeth_Crsdv_In , IfxGeth_Grefclk_In , IfxGeth_Mdc_Out , IfxGeth_Mdio_InOut , IfxGeth_Pps_Out , IfxGeth_Refclk_In , IfxGeth_Rxclk_In , IfxGeth_Rxctl_In , IfxGeth_Rxd_In , IfxGeth_Rxdv_In , IfxGeth_Rxer_In , IfxGeth_Txclk_In , IfxGeth_Txclk_Out , IfxGeth_Txctl_Out , IfxGeth_Txd_Out , IfxGeth_Txen_Out , IfxGeth_Txer_Out , IfxGpt12_Capin_In , IfxGpt12_TxEud_In , IfxGpt12_TxIn_In , IfxGpt12_TxOut_Out , IfxGtm_Atom_Pwm_Config , IfxGtm_Atom_ToutMap , IfxGtm_Clk_Out , IfxGtm_Tim_TinMap , IfxGtm_Tom_Pwm_Config , IfxGtm_Tom_ToutMap , IfxI2c_Scl_InOut , IfxI2c_Sda_InOut , IfxMsc_En_Out , IfxMsc_Fcln_Out , IfxMsc_Fclp_Out , IfxMsc_Inj_In , IfxMsc_Msc_en , IfxMsc_Msc_fcln , IfxMsc_Msc_fclp , IfxMsc_Msc_inj0 , IfxMsc_Msc_inj1 , IfxMsc_Msc_sdi , IfxMsc_Msc_son , IfxMsc_Msc_sop , IfxMsc_Sdi_In , IfxMsc_Son_Out , IfxMsc_Sop_Out , IfxPms_Dcdcsync_Out , IfxPms_Hwcfg_In , IfxPms_Wkp_In , IfxPort_Io_ConfigPin , IfxPsi5_Rx_In , IfxPsi5_Tx_Out , IfxPsi5s_Clk_Out , IfxPsi5s_Rx_In , IfxPsi5s_Tx_Out , IfxQspi_Hsicin_In , IfxQspi_Mrst_In , IfxQspi_Mrst_Out , IfxQspi_Mtsr_In , IfxQspi_Mtsr_Out , IfxQspi_Sclk_In , IfxQspi_Sclk_Out , IfxQspi_Slsi_In , IfxQspi_Slso_Out , IfxQspi_SpiMaster_Input , IfxQspi_SpiMaster_Output , IfxScu_Dcdcsync_Out , IfxScu_Emgstop_In , IfxScu_Evrwup_In , IfxScu_Extclk_Out , IfxScu_Req_In , IfxScu_Wdtlck_Out , IfxSent_Sent_In , IfxSent_Spc_Out , IfxSmu_Fsp_Out
  • pinA : IfxGpt12_IncrEnc_Config
  • pinADigitalFilterUsage : IfxPmsPm_StandbyConfig
  • pinATriggerEvent : IfxPmsPm_StandbyConfig
  • pinB : IfxGpt12_IncrEnc_Config
  • pinBDigitalFilterUsage : IfxPmsPm_StandbyConfig
  • pinBTriggerEvent : IfxPmsPm_StandbyConfig
  • pinDriver : IfxAsclin_Asc_Pins , IfxAsclin_Lin_Pins , IfxAsclin_Spi_Pins , IfxCcu6_Icu_Pins , IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins , IfxEdsadc_Edsadc_CarrierGenConfig , IfxEdsadc_Edsadc_ChannelPins , IfxEray_Eray_NodeA , IfxEray_Eray_NodeB , IfxGpt12_IncrEnc_Config , IfxMsc_Msc_Io , IfxPsi5_Psi5_PinsConfig , IfxPsi5s_Psi5s_Pins , IfxQspi_SpiMaster_Pins , IfxQspi_SpiSlave_Pins , IfxSent_Sent_Pins
  • pinIndex : IfxPort_Pin , IfxPort_Pin_Config
  • pinMode : IfxEdsadc_Edsadc_CarrierGenConfig , IfxGpt12_IncrEnc_Config
  • pinNeg : IfxEdsadc_Edsadc_CarrierGenConfig
  • pinPos : IfxEdsadc_Edsadc_CarrierGenConfig
  • pins : IfxAsclin_Asc_Config , IfxAsclin_Lin_Config , IfxAsclin_Spi_Config , IfxCan_Can_NodeConfig , IfxCcu6_Icu_ChannelConfig , IfxCcu6_PwmBc_Config , IfxCcu6_Timer_Config , IfxCcu6_TPwm_Config , IfxEray_Eray_NodeConfig , IfxEvadc_Adc_EmuxPinConfig , IfxGeth_Eth_Config , IfxI2c_I2c_Config , IfxPsi5s_Psi5s_Config , IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave_Config , IfxSent_Sent_ChannelConfig
  • pinsConfig : IfxPsi5_Psi5_ChannelConfig
  • pinTable : IfxPort_Io_Config
  • pinZ : IfxGpt12_IncrEnc_Config
  • PL : IfxGeth_RxDescr3_WF_Bits
  • pllInitialStepConfig : IfxScuCcu_Config
  • pllInputClockSelection : IfxScuCcu_pllsParameterConfig
  • pllsParameters : IfxScuCcu_InitialStepConfig
  • pllSteps : IfxScuCcu_PllThrottleConfig
  • PMT : IfxGeth_RxDescr1_WF_Bits
  • polynom : Ifc_Crc_Table
  • port : IfxPort_Esr_Masks , IfxPort_Pin , IfxPort_Pin_Config
  • portEmergencyStop : IfxSmu_Smu_AlarmGlobalConfiguration , IfxSmu_Smu_FaultSignalingProtocol
  • positionConst : Ifx_AngleTrkF32_PosIf , IfxGpt12_IncrEnc
  • positiveInput : IfxEdsadc_Edsadc_CommonModeVoltageConfig , IfxEdsadc_Edsadc_ModulatorConfig , IfxEdsadc_ModulatorConfig
  • pre : IfxQspi_DelayConst
  • preClearEnable : IfxMtu_MbistSshConfig
  • preDivider : IfxHssl_Hssl_Config
  • prefilterEnabled : IfxEdsadc_Edsadc_FirFilterConfig
  • prescalar1 : IfxSmu_Smu_FaultSignalingProtocol
  • prescalar2 : IfxSmu_Smu_FaultSignalingProtocol
  • prescaler : IfxAsclin_Asc_BaudRate , IfxAsclin_Lin_BitTimingControl , IfxAsclin_Spi_Baudrate , IfxCan_Can_BaudRate , IfxCan_Can_FastBaudRate
  • prescalerFactor : IfxIom_Driver_LamFilterConfig
  • priority : Ifx_IsrSetting , IfxCan_GroupInterruptConfig , IfxCcu6_Icu_InterruptConfig , IfxCcu6_PwmBc_InterruptConfig , IfxCcu6_Timer_InterruptConfig , IfxCcu6_TPwm_InterruptConfig , IfxGeth_Eth_DmaInterruptConfig , IfxGeth_Eth_MtlInterruptConfig , IfxSent_Sent_Interrupt
  • protocol : Ifx_Shell , Ifx_Shell_Config , IfxQspi_SpiSlave_Config
  • protocolErrorArbitrationEnabled : IfxCan_Can_InterruptConfig
  • protocolErrorDataEnabled : IfxCan_Can_InterruptConfig
  • provider : Ifx_IsrSetting , IfxGeth_Eth_DmaInterruptConfig , IfxGeth_Eth_MtlInterruptConfig
  • prtc1Control : IfxEray_Eray_ControllerConfig
  • prtc2Control : IfxEray_Eray_ControllerConfig
  • psi5 : IfxPsi5_Psi5 , IfxPsi5_Psi5_Config
  • psi5s : IfxPsi5s_Psi5s
  • PT : IfxGeth_RxDescr1_WF_Bits
  • pulseDelayLength : IfxSent_Sent_TransmitControl
  • pulseGeneration : IfxPsi5_Psi5_ChannelConfig , IfxPsi5s_Psi5s_ChannelConfig
  • pulseLength : IfxPsi5_Psi5_PulseGeneration , IfxSent_Sent_TransmitControl
  • pulseLengthTick : IfxGtm_Tim_In
  • pulseTimestampSelect : IfxPsi5_Psi5_ReceiveControl
  • PV : IfxGeth_RxDescr1_WF_Bits
  • pw : Ifx_Ssw_Bmhd


iLLD_TC38A: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- q -

  • qspi : IfxQspi_SpiMaster , IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave , IfxQspi_SpiSlave_Config
  • qspiClockSource : IfxPmsPm_SleepConfig
  • qspiEnabled : IfxPmsPm_SleepConfig
  • queueRequest : IfxEvadc_Adc_GroupConfig


iLLD_TC38A: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- r -

  • R : IfxGeth_RxDescr0 , IfxGeth_RxDescr1 , IfxGeth_RxDescr2 , IfxGeth_RxDescr3 , IfxGeth_TxDescr0 , IfxGeth_TxDescr1 , IfxGeth_TxDescr2 , IfxGeth_TxDescr3
  • raisingEdgeFilterTime : IfxGtm_Tim_Timer_Config
  • rampDirection : IfxEvadc_Adc_FastCompareChannelConfig
  • rampGenerationMode : IfxEvadc_Adc_FastCompareChannelConfig
  • rawPosition : Ifx_AngleTrkF32_PosIf , IfxGpt12_IncrEnc
  • RDES0 : IfxGeth_RxDescr
  • RDES1 : IfxGeth_RxDescr
  • RDES2 : IfxGeth_RxDescr
  • RDES3 : IfxGeth_RxDescr
  • rdm : IfxPsi5_Psi5_Frame
  • rdr : IfxPsi5s_Psi5s_ReceiveData
  • rds : IfxPsi5_Psi5_SerialMessage , IfxPsi5s_Psi5s_ReceiveStatus
  • RE : IfxGeth_RxDescr3_WF_Bits
  • read : IfxStdIf_DPipe_
  • readData : IfxPsi5_Psi5_FrameData , IfxPsi5s_Psi5s_ReceivedData
  • readDataCrc : IfxDma_Dma_ChannelConfig
  • readerWaitx : Ifx_Fifo_Shared
  • readFromRxFifo0 : IfxCan_Message
  • readFromRxFifo1 : IfxCan_Message
  • real : cfloat32 , cfract , csfract , csint16 , csint32
  • receive : Spi_ErrorChecks
  • receiveBufferErrorConsideredForRSI : IfxPsi5s_Psi5s_GlobalControlConfig
  • receiveBufferOverflowFlag : IfxPsi5s_Psi5s_ReceivedBits
  • receiveBufferOverflowInterrupt : IfxSent_Sent_Enable
  • receiveBufferOverflowInterruptNode : IfxSent_Sent_InterruptNodeControl
  • receiveChannel : IfxEray_Eray_MessageRAMConfig
  • receiveControl : IfxPsi5_Psi5_ChannelConfig , IfxPsi5s_Psi5s_ChannelConfig , IfxSent_Sent_ChannelConfig
  • receiveDataInterrupt : IfxMsc_Msc_InterruptConfig , IfxSent_Sent_Enable
  • receiveDataInterruptNode : IfxMsc_Msc_InterruptConfig , IfxSent_Sent_InterruptNodeControl
  • receiveDataRegisterTimestamp : IfxPsi5_Psi5_ReceiveControl
  • receivedBits : IfxPsi5s_Psi5s_ReceiveStatus
  • receivedData : IfxPsi5s_Psi5s_ReceiveData
  • receiveIdEnable : IfxAsclin_Lin , IfxAsclin_Lin_Config
  • receiveMemoryOverflowError : IfxPsi5_Psi5_FrameData
  • receiveMode : IfxPsi5s_Psi5s_AscConfig
  • receiveRequested : IfxEray_Eray_ReceiveControl
  • receiverOddParityEnabled : IfxPsi5s_Psi5s_AscConfig
  • receiveSuccessInterrupt : IfxSent_Sent_Enable
  • receiveSuccessInterruptNode : IfxSent_Sent_InterruptNodeControl
  • receiveWakeupIdleTime : IfxEray_Eray_Prtc2Control
  • receiveWakeupLowTime : IfxEray_Eray_Prtc2Control
  • receiveWakeupTestDuration : IfxEray_Eray_Prtc1Control
  • recoveryTimerAlarmConfig : IfxSmu_Smu_Config
  • recoveryTimerConfig : IfxSmu_Smu_Config
  • recoveryTimerDuration : IfxSmu_Smu_RecoveryTimerConfig
  • rectifier : IfxEdsadc_Edsadc_ChannelConfig
  • ref : IfxIom_Driver_LamConfig
  • refClk : IfxGeth_Eth_RmiiPins
  • reference : IfxEvadc_Adc_ChannelConfig
  • referenceInputPrechargeDuration : IfxEvadc_Adc_FastCompareChannelConfig
  • referencePrechargeControlMode : IfxEvadc_Adc_GroupConfig
  • referencePrechargeEnabled : IfxEvadc_Adc_GroupConfig
  • referenceSignal : IfxIom_Iom_FpcConfig
  • referenceSignalInverted : IfxIom_Iom_LamConfig
  • referenceValue : IfxEvadc_Adc_FastCompareChannelConfig
  • refin : Ifc_Crc_Table
  • refIndex : IfxIom_Driver_Lam
  • refInput : IfxIom_Driver_Lam
  • refout : Ifc_Crc
  • refVoltageEnable : IfxEdsadc_Edsadc_CommonModeVoltageConfig
  • regAddr : Ifx_InternalMux_MuxConfig , IfxPmsEvr_StepDownRegulatorRegConfig
  • regConfig : IfxPmsEvr_checkRegConfig , IfxPmsEvr_initSequencePhase
  • reint : IfxCan_Can_InterruptConfig
  • rejectedFrameId : IfxEray_Eray_MessageRAMConfig
  • rejectRemoteFramesWithExtendedId : IfxCan_Can_FilterConfig
  • rejectRemoteFramesWithStandardId : IfxCan_Can_FilterConfig
  • reload : IfxScuWdt_Config
  • reloadCounter : IfxPmsPm_WakeupConfig
  • remaining : SpiIf_Job
  • remoteTransmitRequest : IfxCan_Message
  • requestMode : IfxDma_Dma_ChannelConfig
  • requestSlotPrio : IfxEvadc_Adc_QueueConfig
  • requestSlotQueue0Enabled : IfxEvadc_Adc_ArbiterConfig
  • requestSlotQueue1Enabled : IfxEvadc_Adc_ArbiterConfig
  • requestSlotQueue2Enabled : IfxEvadc_Adc_ArbiterConfig
  • requestSlotStartMode : IfxEvadc_Adc_QueueConfig
  • requestSource : IfxDma_Dma_ChannelConfig
  • reserved : IfxGtm_Tom_TGC , IfxIom_Iom_EcmGlobalEventSelectionBits , Spi_ErrorChecks
  • reserved0 : Ifx_Ssw_Bmhd
  • reserved1 : Ifx_Ssw_Bmhd
  • reserved_0 : IfxGeth_RxContextDescr2_Bits , IfxGeth_RxContextDescr3_Bits , IfxGeth_RxDescr1_RF_Bits , IfxGeth_RxDescr3_RF_Bits , IfxGeth_TxDescr2_WF_Bits
  • reserved_11 : IfxGeth_RxDescr2_WF_Bits
  • reserved_14 : IfxGeth_TxContextDescr2_Bits
  • reserved_16 : IfxGeth_TxDescr3_WF_Bits
  • reserved_18 : IfxGeth_TxDescr3_WF_Bits
  • reserved_20 : IfxGeth_TxContextDescr3_Bits
  • reserved_24 : IfxGeth_TxContextDescr3_Bits
  • reserved_27 : IfxGeth_RxDescr3_RF_Bits
  • reserved_28 : IfxGeth_TxContextDescr3_Bits
  • reset : IfxStdIf_Pos_
  • resetConfigSet : IfxSmu_Smu_AlarmGlobalConfiguration
  • resetFaults : IfxStdIf_Pos_
  • resetReason : IfxScuRcu_ResetCode
  • resetSendCount : IfxStdIf_DPipe_
  • resetTrigger : IfxScuRcu_ResetCode
  • resetType : IfxScuRcu_ResetCode
  • resolution : Ifx_AngleTrkF32_Config , Ifx_AngleTrkF32_PosIf , IfxGpt12_IncrEnc , IfxStdIf_Pos_Config
  • resolutionFactor : IfxStdIf_Pos_Config
  • resource : Ifx_GlobalResources_Item
  • responseTimeout : IfxAsclin_Lin_DataControl , IfxAsclin_Lin_ErrorFlags
  • responseTimeoutMode : IfxAsclin_Lin_DataControl
  • resultDisplay : IfxEdsadc_Edsadc_DemodulatorConfig
  • resultPriority : IfxEvadc_Adc_ChannelConfig
  • resultreg : IfxEvadc_Adc_Channel
  • resultRegister : IfxEvadc_Adc_ChannelConfig
  • resultServProvider : IfxEvadc_Adc_ChannelConfig
  • resultSrcNr : IfxEvadc_Adc_ChannelConfig
  • resume : TPwm_Functions
  • reti : IfxCan_Can_InterruptConfig
  • reversed : Ifx_AngleTrkF32_Config , Ifx_AngleTrkF32_PosIf , IfxStdIf_Pos_Config
  • RGainHex : IfxScuCcu_RGain_Values
  • RGainNom : IfxScuCcu_RGain_Values
  • rgmiiPins : IfxGeth_Eth_PinConfig
  • rightAlignedStorage : IfxEvadc_Adc_ChannelConfig
  • rippleCompensationEnabled : IfxEdsadc_Edsadc_FirFilterConfig
  • risingEdgeAtPeriod : IfxStdIf_Timer_TrigConfig
  • risingEdgeFilterTime : IfxGtm_Tim_In_ConfigFilter , IfxIom_Driver_LamFilterConfig
  • risingEdgeMode : IfxGtm_Tim_In_ConfigFilter
  • rmiiPins : IfxGeth_Eth_PinConfig
  • RS0V : IfxGeth_RxDescr3_WF_Bits
  • RS1V : IfxGeth_RxDescr3_WF_Bits
  • RS2V : IfxGeth_RxDescr3_WF_Bits
  • rts : IfxAsclin_Asc_Pins
  • RTSH : IfxGeth_RxContextDescr1_Bits
  • RTSL : IfxGeth_RxContextDescr0_Bits
  • rtsMode : IfxAsclin_Asc_Pins
  • run : IfxIom_Driver_LamEventWindowConfig , IfxStdIf_Timer_
  • runMode : IfxEvadc_Adc_FastCompareChannelConfig
  • RWT : IfxGeth_RxDescr3_WF_Bits
  • rx : IfxAsclin_Asc , IfxAsclin_Asc_Pins , IfxAsclin_Lin_Pins , IfxAsclin_Spi_Pins , IfxPsi5s_Psi5s_Pins , SpiIf_Ch_
  • rxArbitrationAlgorithm : IfxGeth_Eth_MtlConfig
  • rxBuffer : IfxAsclin_Asc_Config
  • rxBuffer1Size : IfxGeth_Eth_RxChannelConfig
  • rxBuffer1StartAddress : IfxGeth_Eth_RxChannelConfig
  • rxBufferDataFieldSize : IfxCan_Can_RxConfig
  • rxBufferOffset : IfxCan_Filter
  • rxBufferSize : IfxAsclin_Asc_Config
  • rxBuffersStartAddress : IfxCan_MessageRAM
  • rxChannel : IfxGeth_Eth , IfxGeth_Eth_DmaConfig
  • rxClk : IfxGeth_Eth_MiiPins , IfxGeth_Eth_RgmiiPins
  • rxConfig : IfxCan_Can_NodeConfig
  • rxCount : IfxGeth_Eth_RxChannel , SpiIf_
  • rxCtl : IfxGeth_Eth_RgmiiPins
  • rxd0 : IfxGeth_Eth_MiiPins , IfxGeth_Eth_RgmiiPins , IfxGeth_Eth_RmiiPins
  • rxd1 : IfxGeth_Eth_MiiPins , IfxGeth_Eth_RgmiiPins , IfxGeth_Eth_RmiiPins
  • rxd2 : IfxGeth_Eth_MiiPins , IfxGeth_Eth_RgmiiPins
  • rxd3 : IfxGeth_Eth_MiiPins , IfxGeth_Eth_RgmiiPins
  • rxDescrList : IfxGeth_Eth_RxChannel , IfxGeth_Eth_RxChannelConfig
  • rxDescrPtr : IfxGeth_Eth_RxChannel
  • rxDmaChannel : IfxQspi_SpiMaster_Dma , IfxQspi_SpiSlave_Dma
  • rxDmaChannelId : IfxQspi_SpiMaster_Dma , IfxQspi_SpiMaster_DmaConfig , IfxQspi_SpiSlave_Dma , IfxQspi_SpiSlave_DmaConfig
  • rxDmaChannelMap : IfxGeth_Eth_RxQueueConfig
  • rxDv : IfxGeth_Eth_MiiPins
  • rxEr : IfxGeth_Eth_MiiPins
  • rxf0f : IfxCan_Can_InterruptConfig
  • rxf0n : IfxCan_Can_InterruptConfig
  • rxf1f : IfxCan_Can_InterruptConfig
  • rxf1n : IfxCan_Can_InterruptConfig
  • rxFifo0DataFieldSize : IfxCan_Can_RxConfig
  • rxFifo0FullEnabled : IfxCan_Can_InterruptConfig
  • rxFifo0MessageLostEnabled : IfxCan_Can_InterruptConfig
  • rxFifo0NewMessageEnabled : IfxCan_Can_InterruptConfig
  • rxFifo0OperatingMode : IfxCan_Can_RxConfig
  • rxFifo0Size : IfxCan_Can_RxConfig
  • rxFifo0StartAddress : IfxCan_MessageRAM
  • rxFifo0WatermarkEnabled : IfxCan_Can_InterruptConfig
  • rxFifo0WatermarkLevel : IfxCan_Can_RxConfig
  • rxFifo1DataFieldSize : IfxCan_Can_RxConfig
  • rxFifo1FullEnabled : IfxCan_Can_InterruptConfig
  • rxFifo1MessageLostEnabled : IfxCan_Can_InterruptConfig
  • rxFifo1NewMessageEnabled : IfxCan_Can_InterruptConfig
  • rxFifo1OperatingMode : IfxCan_Can_RxConfig
  • rxFifo1Size : IfxCan_Can_RxConfig
  • rxFifo1StartAddress : IfxCan_MessageRAM
  • rxFifo1WatermarkEnabled : IfxCan_Can_InterruptConfig
  • rxFifo1WatermarkLevel : IfxCan_Can_RxConfig
  • rxFifoInterruptLevel : IfxAsclin_Asc_FifoControl , IfxAsclin_Spi_FifoControl
  • rxFifoInterruptMode : IfxAsclin_Asc_FifoControl , IfxAsclin_Spi_FifoControl
  • rxFifoMode : IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave_Config
  • rxFifoOverflow : IfxAsclin_Asc_ErrorFlags , IfxAsclin_Lin_ErrorFlags , IfxAsclin_Spi_ErrorFlags
  • rxFifoOverflowError : IfxQspi_SpiMaster_ErrorFlags , IfxQspi_SpiSlave_ErrorFlags
  • rxFifoThreshold : IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave_Config
  • rxFifoUnderflow : IfxAsclin_Asc_ErrorFlags , IfxAsclin_Spi_ErrorFlags
  • rxFifoUnderflowError : IfxQspi_SpiMaster_ErrorFlags , IfxQspi_SpiSlave_ErrorFlags
  • rxHandler : SpiIf_Ch_
  • rxHeaderEnd : IfxAsclin_Lin_AcknowledgementFlags
  • rxHeaderErrorOccurred : IfxAsclin_Lin_FrameControlFlags
  • rxHeaderInProgress : IfxAsclin_Lin_FrameControlFlags
  • rxIn : IfxEray_Eray_NodeA , IfxEray_Eray_NodeB
  • rxInMode : IfxEray_Eray_NodeA , IfxEray_Eray_NodeB
  • rxInterrupt : IfxGeth_Eth_DmaConfig
  • rxJob : IfxAsclin_Spi , IfxQspi_SpiSlave
  • rxMode : IfxAsclin_Asc_Pins , IfxAsclin_Lin_Pins , IfxAsclin_Spi_Pins , IfxCan_Can_RxConfig , IfxPsi5s_Psi5s_Pins
  • rxPin : IfxCan_Can_Pins
  • rxPinMode : IfxCan_Can_Pins
  • rxPriority : IfxAsclin_Asc_InterruptConfig , IfxAsclin_Lin_InterruptConfig , IfxAsclin_Spi_InterruptConfig , SpiIf_Config
  • rxQueue : IfxGeth_Eth_MtlConfig
  • rxQueueOverflowInterruptEnabled : IfxGeth_Eth_RxQueueConfig
  • rxQueueSize : IfxGeth_Eth_RxQueueConfig
  • rxReceivedHeader : IfxAsclin_Lin_EnabledInterrupts
  • rxReceivedResponse : IfxAsclin_Lin_EnabledInterrupts
  • rxResponseData : IfxAsclin_Lin_FrameDataControl
  • rxResponseEnd : IfxAsclin_Lin_AcknowledgementFlags
  • rxResponseErrorOccurred : IfxAsclin_Lin_FrameControlFlags
  • rxResponseInProgress : IfxAsclin_Lin_FrameControlFlags
  • rxResponseLength : IfxAsclin_Lin_FrameDataControl
  • rxSwFifoOverflow : IfxAsclin_Asc


iLLD_TC38A: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- s -

  • SAF : IfxGeth_RxDescr2_WF_Bits
  • safe : IfxCan_Can_InterruptConfig
  • SAIC : IfxGeth_TxDescr3_RF_Bits
  • sampleClockSource : IfxEdsadc_Edsadc_DemodulatorConfig
  • samplePoint : IfxCan_Can_BaudRate , IfxCan_Can_FastBaudRate
  • samplePointEMUX : IfxEvadc_Adc_ClassConfig
  • samplePointPosition : IfxAsclin_Asc_BitTimingControl , IfxAsclin_Lin_BitSamplingControl
  • samplePointStandard : IfxEvadc_Adc_ClassConfig
  • sampleSynchronizationEnabled : IfxEvadc_Adc_GroupConfig
  • sampleTime : IfxEvadc_Adc_ClassConfig
  • sampleTimeControl : IfxEvadc_Adc_EmuxControl
  • sampleTimeEMUX : IfxEvadc_Adc_ClassConfig
  • sampleTimingSynchronization : IfxEvadc_Adc_FastCompareChannelConfig
  • samplingTime : Ifx_LowPassPt1F32_Config
  • scanChainLength : IfxScuLbist_ParameterSet
  • scl : IfxI2c_Pins
  • sclk : IfxAsclin_Spi_Pins , IfxQspi_SpiMaster_Pins , IfxQspi_SpiSlave_Pins
  • sclkMode : IfxAsclin_Spi_Pins , IfxQspi_SpiMaster_Pins , IfxQspi_SpiSlave_Pins
  • scrClockSupply : IfxPmsPm_StandbyConfig
  • sda : IfxI2c_Pins
  • sdi : IfxMsc_Msc_Io
  • sdiLinePolarity : IfxMsc_Msc_OutputControlConfig
  • seconds : Ifx_DateTime
  • seed : IfxScuLbist_ParameterSet
  • segmentCount : Ifx_LutIndexedLinearF32 , Ifx_LutLinearF32
  • segments : Ifx_LutIndexedLinearF32 , Ifx_LutLinearF32
  • select : IfxAsclin_Cts_In , IfxAsclin_Rts_Out , IfxAsclin_Rx_In , IfxAsclin_Sclk_Out , IfxAsclin_Slso_Out , IfxAsclin_Tx_Out , IfxCan_Rxd_In , IfxCan_Txd_Out , IfxCcu6_Cc60_Out , IfxCcu6_Cc60in_In , IfxCcu6_Cc61_Out , IfxCcu6_Cc61in_In , IfxCcu6_Cc62_Out , IfxCcu6_Cc62in_In , IfxCcu6_Ccpos0_In , IfxCcu6_Ccpos1_In , IfxCcu6_Ccpos2_In , IfxCcu6_Cout60_Out , IfxCcu6_Cout61_Out , IfxCcu6_Cout62_Out , IfxCcu6_Cout63_Out , IfxCcu6_Ctrap_In , IfxCcu6_T12hr_In , IfxCcu6_T13hr_In , IfxDmu_Fdest_In , IfxEdsadc_Cgpwm_Out , IfxEdsadc_Cin_In , IfxEdsadc_Cout_Out , IfxEdsadc_Din_In , IfxEdsadc_Dscin_In , IfxEdsadc_Dscout_Out , IfxEdsadc_Dsdin_In , IfxEdsadc_Dsn_In , IfxEdsadc_Dsp_In , IfxEdsadc_Itr_In , IfxEdsadc_Sg_In , IfxEray_Rxd_In , IfxEray_Txd_Out , IfxEray_Txen_Out , IfxEvadc_Emux_Out , IfxEvadc_GxBfl_Out , IfxGeth_Col_In , IfxGeth_Crs_In , IfxGeth_Crsdv_In , IfxGeth_Grefclk_In , IfxGeth_Mdc_Out , IfxGeth_Pps_Out , IfxGeth_Refclk_In , IfxGeth_Rxclk_In , IfxGeth_Rxctl_In , IfxGeth_Rxd_In , IfxGeth_Rxdv_In , IfxGeth_Rxer_In , IfxGeth_Txclk_In , IfxGeth_Txclk_Out , IfxGeth_Txctl_Out , IfxGeth_Txd_Out , IfxGeth_Txen_Out , IfxGeth_Txer_Out , IfxGpt12_Capin_In , IfxGpt12_TxEud_In , IfxGpt12_TxIn_In , IfxGpt12_TxOut_Out , IfxGtm_Atom_ToutMap , IfxGtm_Clk_Out , IfxGtm_Tim_TinMap , IfxGtm_Tom_ToutMap , IfxMsc_En_Out , IfxMsc_Fcln_Out , IfxMsc_Fclp_Out , IfxMsc_Inj_In , IfxMsc_Sdi_In , IfxMsc_Son_Out , IfxMsc_Sop_Out , IfxPms_Dcdcsync_Out , IfxPms_Wkp_In , IfxPsi5_Rx_In , IfxPsi5_Tx_Out , IfxPsi5s_Clk_Out , IfxPsi5s_Rx_In , IfxPsi5s_Tx_Out , IfxQspi_Hsicin_In , IfxQspi_Mrst_In , IfxQspi_Mrst_Out , IfxQspi_Mtsr_In , IfxQspi_Mtsr_Out , IfxQspi_Sclk_In , IfxQspi_Sclk_Out , IfxQspi_Slsi_In , IfxQspi_Slso_Out , IfxScu_Dcdcsync_Out , IfxScu_Emgstop_In , IfxScu_Evrwup_In , IfxScu_Extclk_Out , IfxScu_Req_In , IfxScu_Wdtlck_Out , IfxSent_Sent_In , IfxSent_Spc_Out , IfxSmu_Fsp_Out
  • sendControl : IfxPsi5_Psi5_ChannelConfig , IfxPsi5s_Psi5s_ChannelConfig
  • sendCount : IfxAsclin_Asc
  • sending : IfxAsclin_Spi , SpiIf_
  • sendResultCode : Ifx_Shell_Config , Ifx_Shell_Flags
  • sensorControlDisabled : IfxDts_Dts_Config
  • sent : IfxSent_Sent
  • serialData : IfxPsi5_Psi5_Message , IfxSent_Sent_SerialMessageFrame
  • serialDataCrcErrorInterrupt : IfxSent_Sent_Enable
  • serialDataDisabledCrcDisabled : IfxSent_Sent_ReceiveControl
  • serialDataProcessingEnabled : IfxSent_Sent_ReceiveControl
  • serialDataReceiveInterrupt : IfxSent_Sent_Enable
  • serialDataReceiveInterruptNode : IfxSent_Sent_InterruptNodeControl
  • serialMessageCRCFailedError : IfxPsi5_Psi5_Message
  • serviceReqNrPeriod : IfxCcu6_TimerWithTrigger_Config
  • serviceReqNrTrigger : IfxCcu6_TimerWithTrigger_Config
  • serviceRequest : IfxCcu6_Icu_InterruptConfig , IfxCcu6_PwmBc_InterruptConfig , IfxCcu6_Timer_InterruptConfig , IfxCcu6_TPwm_InterruptConfig , IfxEdsadc_Edsadc_FirFilterConfig , IfxGeth_Eth_MtlInterruptConfig
  • serviceRequestDelay : IfxMsc_Msc_UpstreamStatusConfig
  • serviceRequestGenerationEvent : IfxEvadc_Adc_FastCompareChannelConfig
  • serviceRequestLevel : IfxEdsadc_Edsadc_FirFilterConfig
  • set : IfxGtm_Trig_MscTrig_Table
  • setDeadtime : IfxStdIf_PwmHl_
  • setFrequency : IfxStdIf_Timer_
  • setInterruptAfterLastFlag : IfxQspi_SpiMaster_MoveCounterControl
  • setInterruptBeforeLastFlag : IfxQspi_SpiMaster_MoveCounterControl
  • setMinPulse : IfxStdIf_PwmHl_
  • setMode : IfxCcu6_PwmHl_Base , IfxGtm_Atom_Dtm_PwmHl_Base , IfxGtm_Atom_PwmHl_Base , IfxGtm_Tom_Dtm_PwmHl_Base , IfxGtm_Tom_PwmHl_Base , IfxStdIf_PwmHl_
  • setOffset : IfxStdIf_Pos_
  • setOnTime : IfxStdIf_PwmHl_
  • setOnTimeAndShift : IfxStdIf_PwmHl_
  • setPeriod : IfxStdIf_Timer_
  • setPosition : IfxStdIf_Pos_
  • setPulse : IfxStdIf_PwmHl_
  • setRawPosition : IfxStdIf_Pos_
  • setRefreshPeriod : IfxStdIf_Pos_
  • setSingleMode : IfxStdIf_Timer_
  • setSpeed : IfxStdIf_Pos_
  • setTrigger : IfxStdIf_Timer_
  • setupChannels : IfxStdIf_PwmHl_
  • shadowAddress : IfxDma_Dma_ChannelConfig
  • shadowControl : IfxDma_Dma_ChannelConfig
  • shadowCounter : IfxGtm_Tim_Timer_Config
  • shared : _Fifo
  • shift : Ifx_LutIndexedLinearF32
  • shiftClock : IfxQspi_SpiSlave_Protocol , SpiIf_ChMode
  • shiftControl : IfxEdsadc_Edsadc_IntegratorConfig
  • shiftDir : IfxAsclin_Asc_FrameControl , IfxAsclin_Lin_FrameControl , IfxAsclin_Spi_FrameControl
  • showPrompt : Ifx_Shell_Config , Ifx_Shell_Flags
  • Signal : IfxGtm_Spe_InputPattern
  • signalLevel : IfxGtm_Atom_Pwm_Config , IfxGtm_Tom_Pwm_Config
  • signalLevelControl : IfxGtm_Tim_ChannelControl
  • signature : IfxScuLbist_ParameterSet
  • signDelay : IfxEdsadc_Edsadc_RectifierConfig
  • signPeriod : IfxEdsadc_Edsadc_RectifierConfig
  • signSource : IfxEdsadc_Edsadc_RectifierConfig
  • singleShot : IfxStm_Timer_Base
  • sinIn : Ifx_AngleTrkF32 , Ifx_AngleTrkF32_Config
  • size : _Fifo , Ifx_GlobalResources , Ifx_InternalMux_Config , IfxPort_Io_Config
  • sleepModeEnabled : IfxSent_Sent_Config
  • slotControl : IfxEray_Eray_BufferReconfig , IfxEray_Eray_MessageRAMConfig
  • slotCounter : IfxPsi5_Psi5_FrameData
  • SLOTNUM_THL : IfxGeth_TxDescr3_RF_Bits
  • slowClock : IfxPsi5_Psi5_Config
  • sls : IfxQspi_SpiMaster_ChannelConfig
  • slsi : IfxQspi_SpiSlave_Pins
  • slsiMisplacedInactivation : IfxQspi_SpiSlave_ErrorFlags
  • slsiMode : IfxQspi_SpiSlave_Pins
  • slso : IfxAsclin_Spi_Pins , IfxQspi_SpiMaster_Channel_s
  • slsoActiveState : IfxQspi_SpiMaster_Channel_s
  • slsoMode : IfxAsclin_Spi_Pins
  • slsoNr : IfxQspi_Slso_Out
  • son : IfxMsc_Msc_Io
  • sop : IfxMsc_Msc_Io
  • sopPolarity : IfxMsc_Msc_OutputControlConfig
  • sorPayloadLength : IfxPsi5_Psi5_TransmitControl
  • source : IfxCcu6_Icu_InterruptConfig , IfxCcu6_PwmBc_InterruptConfig , IfxCcu6_Timer_InterruptConfig , IfxCcu6_TPwm_InterruptConfig , IfxGtm_Trig_AdcTrig_Trigger , IfxGtm_Trig_CanTrig_Trigger , IfxGtm_Trig_MscTrig_Set , IfxIom_Driver_LamEventConfig
  • sourceAddress : IfxDma_Dma_ChannelConfig
  • sourceAddressCircularRange : IfxDma_Dma_ChannelConfig
  • sourceAddressIncrementDirection : IfxDma_Dma_ChannelConfig
  • sourceAddressIncrementStep : IfxDma_Dma_ChannelConfig
  • sourceCircularBufferEnabled : IfxDma_Dma_ChannelConfig
  • sourceDestinationAddressCrc : IfxDma_Dma_ChannelConfig
  • spcMode : IfxSent_Sent_TransmitControl
  • spcModeOn : IfxSent_Sent_ChannelConfig
  • speed : IfxGpt12_IncrEnc
  • speedConstPulseCount : IfxGpt12_IncrEnc
  • speedConstTimeDiff : IfxGpt12_IncrEnc
  • speedEstA : Ifx_AngleTrkF32
  • speedEstB : Ifx_AngleTrkF32
  • speedFilerCutOffFrequency : IfxStdIf_Pos_Config
  • speedFilterEnabled : IfxStdIf_Pos_Config
  • speedLpf : Ifx_AngleTrkF32
  • speedLpfFc : Ifx_AngleTrkF32_Config
  • speedMode : IfxI2c_I2c_Device , IfxI2c_I2c_deviceConfig
  • speedModeThreshold : IfxGpt12_IncrEnc , IfxStdIf_Pos_Config
  • speedModeThresholdTick : IfxGpt12_IncrEnc
  • splitShiftSel : IfxScuLbist_ParameterSet
  • spol : IfxAsclin_Spi_InputOutputControl
  • sqrAmplMax : Ifx_AngleTrkF32_CfgData , Ifx_AngleTrkF32_Config
  • sqrAmplMin : Ifx_AngleTrkF32_CfgData , Ifx_AngleTrkF32_Config
  • srhActivePhaseSelection : IfxMsc_Msc_CommandExtensionConfig , IfxMsc_Msc_DownstreamControlConfig
  • srhBitsShiftedAtDataFramesExtension : IfxMsc_Msc_CommandExtensionConfig , IfxMsc_Msc_DownstreamControlExtensionConfig
  • srhDataFrameLength : IfxMsc_Msc_CommandExtensionConfig , IfxMsc_Msc_DownstreamControlConfig
  • srlActivePhaseSelection : IfxMsc_Msc_CommandExtensionConfig , IfxMsc_Msc_DownstreamControlConfig
  • srlBitsShiftedAtDataFramesExtension : IfxMsc_Msc_CommandExtensionConfig , IfxMsc_Msc_DownstreamControlExtensionConfig
  • srlDataFrameLength : IfxMsc_Msc_CommandExtensionConfig , IfxMsc_Msc_DownstreamControlConfig
  • sshConfigurations : IfxMtu_MbistConfig
  • sshSel : IfxMtu_MbistSshConfig
  • ssrPayloadLength : IfxPsi5_Psi5_TransmitControl
  • stad : Ifx_Ssw_Bmhd
  • standardFilterForNonMatchingFrames : IfxCan_Can_FilterConfig
  • standardFilterListStartAddress : IfxCan_MessageRAM
  • standardIo : Ifx_Console , Ifx_Shell_Config
  • standardListSize : IfxCan_Can_FilterConfig
  • standbyRam : IfxPmsPm_WakeupConfig
  • standbyRamBlock : IfxPmsPm_StandbyConfig
  • start : Ifx_Shell_Protocol , IfxFlash_flashSector , IfxHssl_Hssl_AccessWindow , PwmHl_Functions , Timer_Functions , TPwm_Functions
  • startCapture : Icu_Functions
  • startChannel : IfxEvadc_Adc_EmuxControl
  • started : Ifx_Shell_Protocol
  • startIndex : _Fifo
  • startOffset : IfxStdIf_Timer_Config
  • startSequenceGenerationControl : IfxPsi5s_Psi5s_TransmitControl
  • startSequenceGenerationEnabled : IfxPsi5_Psi5_TransmitControl
  • startSingleShotMode : Timer_Functions
  • startupCalibration : IfxEvadc_Adc_GroupConfig
  • startupCalibrationControl : IfxEvadc_Adc_Config
  • startupFrame : IfxEray_ReceivedHeader
  • startupFrameIndicator : IfxEray_Header
  • startupFrameTransmitted : IfxEray_Eray_Succ1Config
  • startValue : IfxEdsadc_Edsadc_CombFilterConfig
  • staticActionPoint : IfxEray_Eray_Gtu09Config
  • staticFifoDisabled : IfxEray_Eray_MessageRAMConfig
  • staticFramepayload : IfxEray_Eray_ControllerConfig
  • staticSlotLength : IfxEray_Eray_Gtu07Config
  • staticSlotsCount : IfxEray_Eray_Gtu07Config
  • status : Ifx_AngleTrkF32_PosIf , IfxGpt12_IncrEnc , IfxI2c_I2c , IfxPsi5s_Psi5s_Frame , IfxStdIf_Pos_Status
  • statusNibble : IfxSent_Sent_Frame
  • statusNibbleEnabled : IfxSent_Sent_ReceiveControl
  • step : IfxMsc_Msc_Clock
  • stm : IfxStm_Timer , IfxStm_Timer_Config
  • stmEnabled : IfxPmsPm_SleepConfig
  • stop : IfxStdIf_Timer_ , PwmHl_Functions , Timer_Functions , TPwm_Functions
  • stopBit : IfxAsclin_Asc_FrameControl , IfxAsclin_Lin_FrameControl , IfxAsclin_Spi_FrameControl
  • stopBits : IfxPsi5s_Psi5s_AscConfig
  • stopCapture : Icu_Functions
  • storeAndForward : IfxGeth_Eth_RxQueueConfig , IfxGeth_Eth_TxQueueConfig
  • storeInTxFifoQueue : IfxCan_Message
  • streamingMode : IfxHssl_Hssl_Channel , IfxHssl_Hssl_ChannelConfig
  • streamingModeOn : IfxHssl_Hssl_Channel
  • strobePosition : IfxEray_Eray_Prtc1Control
  • succ1Config : IfxEray_Eray_ControllerConfig
  • succ2Config : IfxEray_Eray_ControllerConfig
  • succ3Config : IfxEray_Eray_ControllerConfig
  • supplyVoltage : IfxEvadc_Adc_Config
  • supplyVoltageLevel : IfxEdsadc_Edsadc_Config
  • suspendTriggered : IfxSent_Sent_ReceiveControl
  • swapOrderOfBytes : IfxFce_Crc_CrcConfig
  • swapRequested : IfxEray_Eray_ReceiveControl
  • switchingSelect : IfxCcu6_PwmBc_MultiChannelControl
  • switchingSync : IfxCcu6_PwmBc_MultiChannelControl
  • syncFrame : IfxEray_ReceivedHeader
  • syncFrameIndicator : IfxEray_Header
  • syncFrameTransmitted : IfxEray_Eray_Succ1Config
  • synchonize : IfxEvadc_Adc_ChannelConfig
  • synchronousOperation : IfxCcu6_Timer_Config
  • synchronousStart : Timer_Functions
  • synchronousStop : Timer_Functions
  • synchronousUpdateEnabled : IfxGtm_Atom_Pwm_Config , IfxGtm_Tom_Pwm_Config
  • syncJumpWidth : IfxCan_Can_BaudRate , IfxCan_Can_FastBaudRate
  • syntax : Ifx_Shell_Syntax
  • sysPllConfig : IfxScuCcu_pllsParameterConfig
  • sysPllThrottleConfig : IfxScuCcu_Config
  • systemCall : IfxCpu_Trap_Id
  • systemEventTriggerThreshold : IfxIom_Driver_Lam , IfxIom_Driver_LamConfig


iLLD_TC38A: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- t -

  • t12countingInputMode : IfxCcu6_Timer_Clock , IfxCcu6_TPwm_Clock
  • t12ExtClockEnabled : IfxCcu6_Timer_Clock , IfxCcu6_TPwm_Clock
  • t12ExtClockInput : IfxCcu6_Timer_Clock , IfxCcu6_TPwm_Clock
  • t12ExtInputTrigger : IfxCcu6_PwmBc_TriggerConfig , IfxCcu6_Timer_TriggerConfig , IfxCcu6_TPwm_TriggerConfig
  • t12ExtInputTriggerMode : IfxCcu6_PwmBc_TriggerConfig
  • t12Frequency : PwmHl_Config , PwmHl_s , Timer_Config , Timer_s
  • t12hr : IfxCcu6_Icu_Pins , IfxCcu6_PwmBc_Pins , IfxCcu6_Timer_Pins , IfxCcu6_TPwm_Pins
  • t12Period : PwmHl_Config , PwmHl_s , Timer_Config , Timer_s
  • t12SyncDirection : IfxCcu6_PwmBc_Timer13 , IfxCcu6_Timer_Timer13 , IfxCcu6_TPwm_Timer13
  • t12SyncEvent : IfxCcu6_PwmBc_Timer13 , IfxCcu6_Timer_Timer13 , IfxCcu6_TPwm_Timer13
  • t13countingInputMode : IfxCcu6_Timer_Clock , IfxCcu6_TPwm_Clock
  • t13ExtClockEnabled : IfxCcu6_Timer_Clock , IfxCcu6_TPwm_Clock
  • t13ExtClockInput : IfxCcu6_Timer_Clock , IfxCcu6_TPwm_Clock
  • t13ExtInputTrigger : IfxCcu6_PwmBc_TriggerConfig , IfxCcu6_Timer_TriggerConfig , IfxCcu6_TPwm_TriggerConfig
  • t13ExtInputTriggerMode : IfxCcu6_PwmBc_TriggerConfig
  • t13Frequency : PwmHl_Config , PwmHl_s , Timer_Config , Timer_s
  • t13hr : IfxCcu6_Icu_Pins , IfxCcu6_PwmBc_Pins , IfxCcu6_Timer_Pins , IfxCcu6_TPwm_Pins
  • t13InSyncWithT12 : IfxCcu6_PwmBc_TriggerConfig , IfxCcu6_Timer_TriggerConfig , IfxCcu6_TPwm_TriggerConfig
  • t13Period : PwmHl_Config , PwmHl_s , Timer_Config , Timer_s
  • t1xhrInputMode : IfxCcu6_Icu_Pins , IfxCcu6_PwmBc_Pins , IfxCcu6_Timer_Pins , IfxCcu6_TPwm_Pins
  • table : Ifc_Crc , Ifx_GlobalResources
  • tAddr : IfxCpu_Trap
  • target : IfxMsc_En_Out , IfxMsc_Msc_Config
  • tClass : IfxCpu_Trap
  • TCMSSV : IfxGeth_TxContextDescr3_Bits
  • tCpu : IfxCpu_Trap
  • TD : IfxGeth_RxDescr1_WF_Bits
  • TDES0 : IfxGeth_TxDescr
  • TDES1 : IfxGeth_TxDescr
  • TDES2 : IfxGeth_TxDescr
  • TDES3 : IfxGeth_TxDescr
  • tefifo : IfxCan_Can_InterruptConfig
  • tgc : IfxGtm_Tom_Dtm_PwmHl_s , IfxGtm_Tom_Pwm_Driver , IfxGtm_Tom_PwmHl_s , IfxGtm_Tom_Timer
  • tgcGlobalControlApplyUpdate : IfxGtm_Tom_Timer
  • tgcGlobalControlDisableUpdate : IfxGtm_Tom_Timer
  • threshold : IfxIom_Driver_LamEventWindowConfig , IfxIom_Iom_EcmConfigCounter
  • ticks : IfxStm_CompareConfig
  • tId : IfxCpu_Trap
  • tim : IfxGtm_Tim_Timer , IfxGtm_Tim_TinMap
  • timeBase : IfxSent_Sent_TransmitControl
  • timeBaseSelect : IfxPsi5_Psi5_PulseGeneration , IfxPsi5_Psi5_TimeStampConfig , IfxPsi5s_Psi5s_PulseGeneration , IfxPsi5s_Psi5s_TimeStampConfig
  • timeFrameInterrupt : IfxMsc_Msc_InterruptConfig
  • timeFrameInterruptNode : IfxMsc_Msc_InterruptConfig
  • timeout : IfxGtm_Tim_In_Config , IfxGtm_Tim_In_ConfigTimeout
  • timeoutControl : IfxGtm_Tim_ChannelControl
  • timeoutError : IfxHssl_Hssl_errorFlags
  • timeoutOccurredEnabled : IfxCan_Can_InterruptConfig
  • timer : IfxCcu6_Icu_ChannelConfig , IfxCcu6_PwmHl_Config , IfxCcu6_PwmHl_s , IfxCcu6_Timer , IfxCcu6_Timer_Config , IfxCcu6_TPwm , IfxCcu6_TPwm_Config , IfxGpt12_TxEud_In , IfxGpt12_TxIn_In , IfxGpt12_TxOut_Out , IfxGtm_Atom_Dtm_PwmHl_Config , IfxGtm_Atom_Dtm_PwmHl_s , IfxGtm_Atom_PwmHl_Config , IfxGtm_Atom_PwmHl_s , IfxGtm_Tom_Dtm_PwmHl_Config , IfxGtm_Tom_Dtm_PwmHl_s , IfxGtm_Tom_PwmHl_Config , IfxGtm_Tom_PwmHl_s , IfxStdIf_PwmHl_
  • timer12 : IfxCcu6_PwmBc_Config , IfxCcu6_Timer_Config , IfxCcu6_TPwm_Config
  • timer13 : IfxCcu6_PwmBc_Config , IfxCcu6_Timer_Config , IfxCcu6_TPwm_Config
  • timerChannel : IfxGtm_Atom_Timer , IfxGtm_Atom_Timer_Config , IfxGtm_Tom_Timer , IfxGtm_Tom_Timer_Config
  • timerReset : IfxIom_Iom_FpcConfig
  • timeSegment1 : IfxCan_Can_BaudRate , IfxCan_Can_FastBaudRate
  • timeSegment2 : IfxCan_Can_BaudRate , IfxCan_Can_FastBaudRate
  • timeslotError : IfxPsi5_Psi5_FrameData
  • timestamp : Ifx_DataBufferMode_TimeStampSingle
  • timeStamp : IfxEdsadc_Edsadc_ChannelConfig
  • timestamp : IfxPsi5_Psi5_FrameData , IfxPsi5s_Psi5s_Frame
  • timeStamp : IfxPsi5s_Psi5s_ReceiveTimestamp
  • timestamp : IfxPsi5s_Psi5s_Timestamp
  • timeStamp : IfxSent_Sent_Frame
  • timestampClock : IfxPsi5_Psi5_Config , IfxPsi5s_Psi5s_Config
  • timestampCounterA : IfxPsi5_Psi5_Config , IfxPsi5s_Psi5s_Config
  • timestampCounterB : IfxPsi5_Psi5_Config , IfxPsi5s_Psi5s_Config
  • timestampCounterC : IfxPsi5_Psi5_Config
  • timeStampCounterClock : IfxEdsadc_Edsadc_TimeStampCounter
  • timeStampCounterRunControl : IfxEdsadc_Edsadc_TimeStampCounter
  • timestampEnabled : IfxDma_Dma_ChannelConfig , IfxPsi5s_Psi5s_ReceiveControl
  • timeStampMode : IfxEdsadc_Edsadc_DemodulatorConfig
  • timeStampPreDivider : IfxSent_Sent_Config
  • timestampSelect : IfxPsi5s_Psi5s_ReceiveControl
  • timestampTrigger : IfxEdsadc_Edsadc_DemodulatorConfig
  • timestampTriggerSelect : IfxPsi5s_Psi5s_ReceiveControl
  • timestampWraparoundEnabled : IfxCan_Can_InterruptConfig
  • timIndex : IfxGtm_Tim_In , IfxGtm_Tim_In_Config , IfxGtm_Tim_Timer , IfxGtm_Tim_Timer_Config
  • tint0IsrProvider : IfxEray_Eray_Interrupt
  • tint0Priority : IfxEray_Eray_Interrupt
  • tint1IsrProvider : IfxEray_Eray_Interrupt
  • tint1Priority : IfxEray_Eray_Interrupt
  • tom : IfxGtm_Tom_Dtm_PwmHl_Config , IfxGtm_Tom_Dtm_PwmHl_s , IfxGtm_Tom_Pwm_Config , IfxGtm_Tom_Pwm_Driver , IfxGtm_Tom_PwmHl_Config , IfxGtm_Tom_PwmHl_s , IfxGtm_Tom_Timer , IfxGtm_Tom_Timer_Config , IfxGtm_Tom_ToutMap
  • tomChannel : IfxGtm_Tom_Pwm_Config , IfxGtm_Tom_Pwm_Driver
  • tomIndex : IfxGtm_Tom_Pwm_Driver , IfxGtm_Tom_Timer
  • toutn : IfxGtm_Atom_ToutMap , IfxGtm_Tom_ToutMap
  • toutSel : IfxGtm_Atom_ToutMap , IfxGtm_Tom_ToutMap
  • TPL : IfxGeth_TxDescr3_RF_Bits
  • traco : IfxCan_Can_InterruptConfig
  • trail2InjectionEnabled : IfxQspi_SpiMaster_MoveCounterControl
  • trailingDelay2Prescaler : IfxQspi_SpiMaster_MoveCounterControl
  • tranceiverDelayOffset : IfxCan_Can_FastBaudRate
  • transactionRequestLostInterruptEnabled : IfxDma_Dma_ChannelConfig
  • transactionTagError : IfxHssl_Hssl_errorFlags
  • transferBufferUnderflowInterrupt : IfxSent_Sent_Enable
  • transferBufferUnderflowInterruptNode : IfxSent_Sent_InterruptNodeControl
  • transferCount : IfxDma_Dma_ChannelConfig
  • transferDataInterrupt : IfxSent_Sent_Enable
  • transferDataInterruptNode : IfxSent_Sent_InterruptNodeControl
  • transferInProgress : IfxAsclin_Spi
  • transferRequested : IfxEray_Eray_TransmitControl , IfxEray_SlotConfig
  • transmissionCancellationFinishedEnabled : IfxCan_Can_InterruptConfig
  • transmissionCompletedEnabled : IfxCan_Can_InterruptConfig
  • transmissionMode : IfxEray_Header , IfxMsc_Msc_DownstreamControlConfig
  • transmissionSlotMode : IfxEray_Eray_Succ1Config
  • transmissionStartTime : IfxEray_Eray_Prtc1Control
  • transmit : Spi_ErrorChecks
  • transmitControl : IfxSent_Sent_ChannelConfig
  • transmitErrorConsideredForRSI : IfxPsi5s_Psi5s_GlobalControlConfig
  • transmitMode : IfxPsi5s_Psi5s_AscConfig
  • transmitPayloadIndicatior : IfxEray_Header
  • transmitterOddParityEnabled : IfxPsi5s_Psi5s_AscConfig
  • transmitWakeupIdleTime : IfxEray_Eray_Prtc2Control
  • transmitWakeupLowTime : IfxEray_Eray_Prtc2Control
  • transmitWakeupRepetitions : IfxEray_Eray_Prtc1Control
  • traq : IfxCan_Can_InterruptConfig
  • trigger : IfxCcu6_Icu_Channel , IfxCcu6_Icu_ChannelConfig , IfxCcu6_PwmBc , IfxCcu6_PwmBc_Config , IfxCcu6_Timer , IfxCcu6_Timer_Config , IfxCcu6_TPwm , IfxCcu6_TPwm_Config , IfxGtm_Trig_AdcTrig_Table , IfxGtm_Trig_CanTrig_Table , IfxIom_Driver_LamEventConfig , IfxPmsPm_StandbyConfig , IfxPmsPm_WakeupConfig , IfxStdIf_Timer_Config
  • triggerChannel : IfxGtm_Atom_Timer , IfxGtm_Tom_Timer
  • triggerConfig : IfxEvadc_Adc_QueueConfig
  • triggerEnabled : IfxCcu6_TimerWithTrigger_Base , IfxGtm_Atom_Timer_Base , IfxGtm_Tom_Timer_Base , IfxStm_Timer_Base
  • triggerEvent : IfxEdsadc_Edsadc_ModulatorConfig , IfxEdsadc_ModulatorConfig
  • triggerInput : IfxEdsadc_Edsadc_DemodulatorConfig
  • triggerInterval : IfxEvadc_Adc_FastCompareChannelConfig
  • triggerMode : IfxEvadc_Adc_GatingTriggerConfig
  • triggerMonitorCleared : IfxSent_Sent_InputOutputControl
  • triggerOut : IfxCcu6_TimerWithTrigger_Config , IfxGtm_Atom_Timer_Config , IfxGtm_Tom_Timer_Config
  • triggerPoint : IfxStdIf_Timer_TrigConfig
  • triggerPriority : IfxStm_CompareConfig
  • triggerSource : IfxEvadc_Adc_GatingTriggerConfig , IfxSent_Sent_TransmitControl
  • Ts : Ifx_AngleTrkF32_PosIf
  • TSA : IfxGeth_RxDescr1_WF_Bits
  • TSE : IfxGeth_TxDescr3_RF_Bits
  • tsm : IfxPsi5s_Psi5s_ReceiveTimestamp
  • TTSE_TMWD : IfxGeth_TxDescr2_RF_Bits
  • TTSH : IfxGeth_TxContextDescr1_Bits , IfxGeth_TxDescr1_WF_Bits
  • TTSL : IfxGeth_TxContextDescr0_Bits , IfxGeth_TxDescr0_WF_Bits
  • TTSS : IfxGeth_TxDescr3_WF_Bits
  • tUnit : IfxSent_Sent_ChannelConfig
  • turn : Ifx_AngleTrkF32_PosIf , IfxGpt12_IncrEnc
  • tx : IfxAsclin_Asc , IfxAsclin_Asc_Pins , IfxAsclin_Lin_Pins , IfxAsclin_Spi_Pins , IfxPsi5s_Psi5s_Pins , SpiIf_Ch_
  • txBuf1Size : IfxGeth_Eth_TxChannel
  • txBuffer : IfxAsclin_Asc_Config
  • txBuffer1Size : IfxGeth_Eth_TxChannelConfig
  • txBuffer1StartAddress : IfxGeth_Eth_TxChannelConfig
  • txBufferDataFieldSize : IfxCan_Can_TxConfig
  • txBufferSize : IfxAsclin_Asc_Config
  • txBuffersStartAddress : IfxCan_MessageRAM
  • txChannel : IfxGeth_Eth , IfxGeth_Eth_DmaConfig
  • txClk : IfxGeth_Eth_MiiPins , IfxGeth_Eth_RgmiiPins
  • txCompleted : IfxAsclin_Lin_AcknowledgementFlags
  • txConfig : IfxCan_Can_NodeConfig
  • txCount : IfxGeth_Eth_TxChannel , SpiIf_
  • txCtl : IfxGeth_Eth_RgmiiPins
  • txd0 : IfxGeth_Eth_MiiPins , IfxGeth_Eth_RgmiiPins , IfxGeth_Eth_RmiiPins
  • txd1 : IfxGeth_Eth_MiiPins , IfxGeth_Eth_RgmiiPins , IfxGeth_Eth_RmiiPins
  • txd2 : IfxGeth_Eth_MiiPins , IfxGeth_Eth_RgmiiPins
  • txd3 : IfxGeth_Eth_MiiPins , IfxGeth_Eth_RgmiiPins
  • txDescrList : IfxGeth_Eth_TxChannel , IfxGeth_Eth_TxChannelConfig
  • txDescrPtr : IfxGeth_Eth_TxChannel
  • txDisabled : IfxStdIf_DPipe_
  • txDmaChannel : IfxQspi_SpiMaster_Dma , IfxQspi_SpiSlave_Dma
  • txDmaChannelId : IfxQspi_SpiMaster_Dma , IfxQspi_SpiMaster_DmaConfig , IfxQspi_SpiSlave_Dma , IfxQspi_SpiSlave_DmaConfig
  • txEn : IfxGeth_Eth_MiiPins , IfxGeth_Eth_RmiiPins
  • txEnOut : IfxEray_Eray_NodeA , IfxEray_Eray_NodeB
  • txEnOutMode : IfxEray_Eray_NodeA , IfxEray_Eray_NodeB
  • txEr : IfxGeth_Eth_MiiPins
  • txEventFifoControl : IfxCan_Message
  • txEventFifoEventLostEnabled : IfxCan_Can_InterruptConfig
  • txEventFifoFullEnabled : IfxCan_Can_InterruptConfig
  • txEventFifoNewEntryEnabled : IfxCan_Can_InterruptConfig
  • txEventFifoSize : IfxCan_Can_TxConfig
  • txEventFifoStartAddress : IfxCan_MessageRAM
  • txEventFifoWatermarkEnabled : IfxCan_Can_InterruptConfig
  • txFifoEmptyEnabled : IfxCan_Can_InterruptConfig
  • txFifoInterruptLevel : IfxAsclin_Asc_FifoControl , IfxAsclin_Spi_FifoControl
  • txFifoInterruptMode : IfxAsclin_Asc_FifoControl , IfxAsclin_Spi_FifoControl
  • txFifoMode : IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave_Config
  • txFifoOverflow : IfxAsclin_Asc_ErrorFlags , IfxAsclin_Lin_ErrorFlags , IfxAsclin_Spi_ErrorFlags
  • txFifoOverflowError : IfxQspi_SpiMaster_ErrorFlags , IfxQspi_SpiSlave_ErrorFlags
  • txFifoQueueSize : IfxCan_Can_TxConfig
  • txFifoThreshold : IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave_Config
  • txFifoUnderflowError : IfxQspi_SpiMaster_ErrorFlags , IfxQspi_SpiSlave_ErrorFlags
  • txHandler : SpiIf_Ch_
  • txHeaderEnd : IfxAsclin_Lin_AcknowledgementFlags
  • txHeaderErrorOccurred : IfxAsclin_Lin_FrameControlFlags
  • txHeaderInProgress : IfxAsclin_Lin_FrameControlFlags
  • txInProgress : IfxAsclin_Asc
  • txInterrupt : IfxGeth_Eth_DmaConfig
  • txJob : IfxAsclin_Spi , IfxQspi_SpiSlave
  • txMode : IfxAsclin_Asc_Pins , IfxAsclin_Lin_Pins , IfxAsclin_Spi_Pins , IfxCan_Can_TxConfig , IfxPsi5s_Psi5s_Pins
  • txOut : IfxEray_Eray_NodeA , IfxEray_Eray_NodeB
  • txOutMode : IfxEray_Eray_NodeA , IfxEray_Eray_NodeB
  • txPin : IfxCan_Can_Pins
  • txPinMode : IfxCan_Can_Pins
  • txPriority : IfxAsclin_Asc_InterruptConfig , IfxAsclin_Lin_InterruptConfig , IfxAsclin_Spi_InterruptConfig , SpiIf_Config
  • txQueue : IfxGeth_Eth_MtlConfig
  • txQueueSize : IfxGeth_Eth_TxQueueConfig
  • txQueueUnderflowInterruptEnabled : IfxGeth_Eth_TxQueueConfig
  • txResponseEnd : IfxAsclin_Lin_AcknowledgementFlags
  • txResponseErrorOccurred : IfxAsclin_Lin_FrameControlFlags
  • txResponseInProgress : IfxAsclin_Lin_FrameControlFlags
  • txResponseLength : IfxAsclin_Lin_FrameDataControl
  • txSchedulingAlgorithm : IfxGeth_Eth_MtlConfig
  • txSendHeaderOnly : IfxAsclin_Lin_FrameControlFlags
  • txSendResponse : IfxAsclin_Lin_FrameControlFlags
  • txTimestamp : IfxAsclin_Asc
  • txTransmittedHeader : IfxAsclin_Lin_EnabledInterrupts
  • txTransmittedResponse : IfxAsclin_Lin_EnabledInterrupts
  • type : IfxCan_Can_Frame , IfxCan_Filter , IfxPsi5_Psi5_Clock , IfxPsi5s_Psi5s_Clock
  • typeOfService : IfxAsclin_Asc_InterruptConfig , IfxAsclin_Lin_InterruptConfig , IfxAsclin_Spi_InterruptConfig , IfxCan_GroupInterruptConfig , IfxCcu6_Icu_InterruptConfig , IfxCcu6_PwmBc_InterruptConfig , IfxCcu6_Timer_InterruptConfig , IfxCcu6_TPwm_InterruptConfig , IfxStm_CompareConfig


iLLD_TC38A: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- u -

  • U : IfxGeth_RxDescr0 , IfxGeth_RxDescr1 , IfxGeth_RxDescr2 , IfxGeth_RxDescr3 , IfxGeth_TxDescr0 , IfxGeth_TxDescr1 , IfxGeth_TxDescr2 , IfxGeth_TxDescr3 , IfxGtm_Spe_InputPattern , IfxGtm_Spe_OutputPattern , IfxIom_Iom_EcmGlobalEventSelection
  • uartFrameCount : IfxPsi5s_Psi5s_ReceiveControl
  • ucPtr : Ifx_Ssw_CTablePtr
  • UF : IfxGeth_TxDescr3_WF_Bits
  • uiPtr : Ifx_Ssw_CTablePtr
  • uk : Ifx_ClpxFloat32_Integral , Ifx_IntegralF32 , Ifx_RampF32
  • ullPtr : Ifx_Ssw_CTablePtr
  • uncorrectableErrorThreshold : IfxMtu_MbistSshConfig
  • underflowInterrupt : IfxMsc_Msc_InterruptConfig
  • underflowInterruptNode : IfxMsc_Msc_InterruptConfig
  • unexpectedError : IfxHssl_Hssl_errorFlags
  • update : IfxCcu6_PwmHl_Mode , IfxCcu6_PwmHl_s , IfxGpt12_IncrEnc , IfxGtm_Atom_Dtm_PwmHl_Mode , IfxGtm_Atom_Dtm_PwmHl_s , IfxGtm_Atom_PwmHl_Mode , IfxGtm_Atom_PwmHl_s , IfxGtm_Tom_Dtm_PwmHl_Mode , IfxGtm_Tom_Dtm_PwmHl_s , IfxGtm_Tom_PwmHl_Mode , IfxGtm_Tom_PwmHl_s , IfxStdIf_Pos_
  • updateAndShift : IfxGtm_Atom_Dtm_PwmHl_Mode , IfxGtm_Atom_Dtm_PwmHl_s , IfxGtm_Atom_PwmHl_Mode , IfxGtm_Atom_PwmHl_s , IfxGtm_Tom_Dtm_PwmHl_Mode , IfxGtm_Tom_Dtm_PwmHl_s , IfxGtm_Tom_PwmHl_Mode , IfxGtm_Tom_PwmHl_s
  • updateInputFrequency : IfxStdIf_Timer_
  • updatePeriod : IfxGpt12_IncrEnc , IfxStdIf_Pos_Config
  • updatePulse : IfxGtm_Atom_Dtm_PwmHl_Mode , IfxGtm_Atom_Dtm_PwmHl_s , IfxGtm_Atom_PwmHl_Mode , IfxGtm_Atom_PwmHl_s , IfxGtm_Tom_Dtm_PwmHl_Mode , IfxGtm_Tom_Dtm_PwmHl_s , IfxGtm_Tom_PwmHl_Mode , IfxGtm_Tom_PwmHl_s
  • upperBoundary : IfxEvadc_Adc_ChannelConfig
  • upperLimit : IfxAsclin_Lin_BaudrateDetection
  • upperTemperatureLimit : IfxDts_Dts_Config
  • upstreamChannelFrameType : IfxMsc_Msc_UpstreamStatusConfig
  • upstreamChannelReceivingRate : IfxMsc_Msc_UpstreamStatusConfig
  • upstreamConfig : IfxMsc_Msc_Config
  • upstreamTimeoutInterrupt : IfxMsc_Msc_InterruptConfig
  • upstreamTimeoutInterruptNode : IfxMsc_Msc_InterruptConfig
  • upstreamTimeoutPrescaler : IfxMsc_Msc_UpstreamStatusConfig
  • upstreamTimeoutValue : IfxMsc_Msc_UpstreamStatusConfig
  • useDma : IfxFce_Crc_Crc , IfxFce_Crc_CrcConfig , IfxQspi_SpiMaster_Dma , IfxQspi_SpiMaster_DmaConfig , IfxQspi_SpiSlave_Dma , IfxQspi_SpiSlave_DmaConfig
  • useWutStandbyAutoStopMode : IfxPmsPm_StandbyConfig
  • usPtr : Ifx_Ssw_CTablePtr


iLLD_TC38A: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- v -

  • valid : IfxGtm_Spe_PatternSignal
  • value : Ifx_InternalMux_MuxConfig , IfxGtm_Tim_InputSourceSelect , IfxPmsEvr_StepDownRegulatorRegConfig , IfxPsi5_Psi5_Rds , IfxScuCcu_CcuconRegConfig , IfxScuCcu_FlashWaitstateConfig
  • vddUnderVoltageThresholdLevel : IfxPmsPm_StandbyConfig
  • verbose : IfxPsi5_Psi5_ReceiveControl
  • verboseForAsynchronousMode : IfxPsi5_Psi5_ReceiveControl
  • vextUnderVoltageThresholdLevel : IfxPmsPm_StandbyConfig
  • VLTV : IfxGeth_TxContextDescr3_Bits
  • VT : IfxGeth_TxContextDescr3_Bits
  • VTIR : IfxGeth_TxDescr2_RF_Bits


iLLD_TC38A: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- w -

  • W : IfxGeth_RxDescr0 , IfxGeth_RxDescr1 , IfxGeth_RxDescr2 , IfxGeth_RxDescr3 , IfxGeth_TxDescr0 , IfxGeth_TxDescr1 , IfxGeth_TxDescr2 , IfxGeth_TxDescr3
  • waitForReadMode : IfxEvadc_Adc_ChannelConfig
  • waitingTime : Timer_Config , TPwm_Config
  • waitInSecs : IfxPmsEvr_initSequencePhase
  • waitTime : IfxScuCcu_InitialStepConfig , IfxScuCcu_PllStepConfig
  • wakeup : IfxPmsPm_WakeupConfig
  • wakeupPatternChannel : IfxEray_Eray_Succ1Config
  • warningStatusEnabled : IfxCan_Can_InterruptConfig
  • watchdogEnabled : IfxCan_Can_InterruptConfig
  • watchdogErrorInterrupt : IfxSent_Sent_Enable
  • watchdogErrorInterruptNode : IfxSent_Sent_InterruptNodeControl
  • watchdogTimeoutErrorFlag : IfxPsi5s_Psi5s_ReceivedBits
  • watchdogTimerLimit : IfxPsi5_Psi5_ChannelConfig , IfxPsi5s_Psi5s_ChannelConfig
  • watchDogTimerLimit : IfxSent_Sent_ChannelConfig
  • watchdogTimerModeSelect : IfxPsi5s_Psi5s_ReceiveControl
  • wati : IfxCan_Can_InterruptConfig
  • windowSize : IfxEdsadc_Edsadc_IntegratorConfig
  • wrapDestinationInterruptEnabled : IfxDma_Dma_ChannelConfig
  • wrapSourceInterruptEnabled : IfxDma_Dma_ChannelConfig
  • write : IfxStdIf_DPipe_
  • writerWaitx : Ifx_Fifo_Shared
  • wrongStatusNibbleErrorInterrupt : IfxSent_Sent_Enable
  • wutClock : IfxPmsPm_StandbyConfig
  • wutReloadValue : IfxPmsPm_StandbyConfig


iLLD_TC38A: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- x -

  • x : IfxGtm_Spe_PatternSignal
  • xcrc : IfxPsi5s_Psi5s_ReceivedBits
  • xcrcError : IfxPsi5s_Psi5s_ReceivedBits
  • xcrcErrorConsideredForRSI : IfxPsi5s_Psi5s_GlobalControlConfig
  • xtalFrequency : IfxScuCcu_pllsParameterConfig
  • xxxCH1 : IfxGtm_Tom_TGC


iLLD_TC38A: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- y -

  • y : IfxGtm_Spe_PatternSignal


iLLD_TC38A: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- z -

  • z : IfxGtm_Spe_PatternSignal
  • zeroIsrPriority : IfxGpt12_IncrEnc_Config
  • zeroIsrProvider : IfxGpt12_IncrEnc_Config


iLLD_TC38A: Data Fields - Variables

- a -

  • a : Ifx_LowPassPt1F32 , IfxPsi5_Psi5_StartupOptions
  • abd : IfxAsclin_Lin_BaudrateDetection
  • abraBlockBypass : IfxMsc_Msc_Abra
  • abraConfig : IfxMsc_Msc_Config
  • abraDownstreamBlockBaudrate : IfxMsc_Msc_Abra
  • accelEst : Ifx_AngleTrkF32
  • acceptedStartupDeviation : IfxEray_Eray_Gtu06Config
  • accessWindow0 : IfxHssl_Hssl_Config
  • accessWindow1 : IfxHssl_Hssl_Config
  • accessWindow2 : IfxHssl_Hssl_Config
  • accessWindow3 : IfxHssl_Hssl_Config
  • accumulatedCounterIndex : IfxIom_Driver_Lam
  • accumulatedEventUsedMask : IfxIom_Driver
  • acknowledgmentFlags : IfxAsclin_Lin
  • ackTimerIrq : IfxStdIf_Timer_
  • ackTriggerIrq : IfxStdIf_Timer_
  • ACT_TB : IfxGtm_Tom_TGC
  • activateSlso : IfxQspi_SpiMaster_Channel_s
  • activeChannel : SpiIf_
  • activeCount : Timer_Config , TPwm_Config
  • activeState : PwmHl_Config , TPwm_Config
  • actualUartFrameCount : IfxPsi5s_Psi5s_ReceivedBits
  • additionalClockCycles : IfxEvadc_Adc_FastCompareChannelConfig
  • addressAlignedBeatsEnabled : IfxGeth_Eth_DmaConfig
  • addressMode : IfxI2c_I2c_Device , IfxI2c_I2c_deviceConfig
  • agc : IfxGtm_Atom_Dtm_PwmHl_s , IfxGtm_Atom_Pwm_Driver , IfxGtm_Atom_PwmHl_s , IfxGtm_Atom_Timer
  • agcApplyUpdate : IfxGtm_Atom_Timer
  • agcDisableUpdate : IfxGtm_Atom_Timer
  • alarmConfigRegister : IfxSmu_Smu_Config
  • alarmGlobalConfig : IfxSmu_Smu_Config
  • alarmId0 : IfxSmu_Smu_RecoveryTimerAlarmConfiguration
  • alarmId1 : IfxSmu_Smu_RecoveryTimerAlarmConfiguration
  • alarmId2 : IfxSmu_Smu_RecoveryTimerAlarmConfiguration
  • alarmId3 : IfxSmu_Smu_RecoveryTimerAlarmConfiguration
  • align : Ifx_Console
  • ALL : IfxAsclin_Asc_ErrorFlagsUnion , IfxSent_Sent_EnabledInterrupts
  • allowSleepMode : IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave_Config
  • alrt : IfxCan_Can_InterruptConfig
  • alternateCrcSelected : IfxSent_Sent_ReceiveControl
  • alti : IfxAsclin_Lin_Config , IfxAsclin_Spi_InputOutputControl
  • analogClockGenerationMode : IfxEvadc_Adc_Config
  • analogClockSyncDelay : IfxEdsadc_Edsadc_ModulatorConfig , IfxEdsadc_ModulatorConfig
  • analogClockSynchronizationDelay : IfxEvadc_Adc_GroupConfig
  • analogConverterControllerMode : IfxEvadc_Adc_FastCompareChannelConfig
  • analogConverterMode : IfxEvadc_Adc_GroupConfig
  • analogFrequency : IfxEvadc_Adc_GroupConfig
  • analogInputPrechargeControlEMUX : IfxEvadc_Adc_ClassConfig
  • analogInputPrechargeControlStandard : IfxEvadc_Adc_ClassConfig
  • analogInputPrechargeDuration : IfxEvadc_Adc_FastCompareChannelConfig
  • analogMuxCopy : IfxEdsadc_Edsadc_TimeStampCounter
  • angleAtan : Ifx_AngleTrkF32
  • angleErr : Ifx_AngleTrkF32
  • angleEst : Ifx_AngleTrkF32
  • angleRef : Ifx_AngleTrkF32
  • application : IfxScuLbist_ParameterSet
  • applyUpdate : IfxStdIf_Timer_
  • arbiter : IfxEvadc_Adc_GroupConfig
  • arbiterRoundLength : IfxEvadc_Adc_ArbiterConfig
  • ARPNR : IfxGeth_RxDescr2_WF_Bits
  • ascConfig : IfxPsi5s_Psi5s_Config
  • ascFramingErrorFlag : IfxPsi5s_Psi5s_ReceivedBits
  • asclin : IfxAsclin_Asc , IfxAsclin_Asc_Config , IfxAsclin_Lin , IfxAsclin_Lin_Config , IfxAsclin_Spi , IfxAsclin_Spi_Config
  • asclinClockSource : IfxPmsPm_SleepConfig
  • asclinEnabled : IfxPmsPm_SleepConfig
  • ascOnlyMode : IfxPsi5s_Psi5s_GlobalControlConfig
  • ascOverrunErrorFlag : IfxPsi5s_Psi5s_ReceivedBits
  • ascParityErrorFlag : IfxPsi5s_Psi5s_ReceivedBits
  • assertion : IfxCpu_Trap_Id
  • asynchronousModeSelected : IfxPsi5_Psi5_ReceiveControl
  • atom : IfxGtm_Atom_Dtm_PwmHl_Config , IfxGtm_Atom_Dtm_PwmHl_s , IfxGtm_Atom_Pwm_Config , IfxGtm_Atom_Pwm_Driver , IfxGtm_Atom_PwmHl_Config , IfxGtm_Atom_PwmHl_s , IfxGtm_Atom_Timer , IfxGtm_Atom_Timer_Config , IfxGtm_Atom_ToutMap
  • atomChannel : IfxGtm_Atom_Pwm_Config , IfxGtm_Atom_Pwm_Driver
  • atomIndex : IfxGtm_Atom_Pwm_Driver , IfxGtm_Atom_Timer
  • autoCS : SpiIf_ChMode
  • automaticLengthReload : IfxFce_Crc_CrcConfig
  • automaticUpdateMode : IfxEvadc_Adc_FastCompareChannelConfig
  • auxServiceRequest : IfxEdsadc_Edsadc_FirFilterConfig


iLLD_TC38A: Data Fields - Variables

- b -

  • b : Ifx_LowPassPt1F32
  • B : IfxIom_Iom_EcmGlobalEventSelection
  • b : IfxPsi5_Psi5_StartupOptions
  • B : IfxStdIf_Pos_Status
  • B1L : IfxGeth_TxDescr2_RF_Bits
  • B2L : IfxGeth_TxDescr2_RF_Bits
  • bacon : IfxQspi_SpiMaster_Channel_s
  • base : Ifx_AngleTrkF32 , Ifx_CircularBuffer , IfxCcu6_Icu_Channel , IfxCcu6_Icu_ChannelConfig , IfxCcu6_PwmBc , IfxCcu6_PwmBc_Config , IfxCcu6_PwmHl_Config , IfxCcu6_PwmHl_s , IfxCcu6_Timer , IfxCcu6_Timer_Config , IfxCcu6_TimerWithTrigger , IfxCcu6_TimerWithTrigger_Config , IfxCcu6_TPwm , IfxCcu6_TPwm_Config , IfxGpt12_IncrEnc_Config , IfxGtm_Atom_Dtm_PwmHl_Config , IfxGtm_Atom_Dtm_PwmHl_s , IfxGtm_Atom_PwmHl_Config , IfxGtm_Atom_PwmHl_s , IfxGtm_Atom_Timer , IfxGtm_Atom_Timer_Config , IfxGtm_Tom_Dtm_PwmHl_Config , IfxGtm_Tom_Dtm_PwmHl_s , IfxGtm_Tom_PwmHl_Config , IfxGtm_Tom_PwmHl_s , IfxGtm_Tom_Timer , IfxGtm_Tom_Timer_Config , IfxQspi_SpiMaster , IfxQspi_SpiMaster_Channel_s , IfxQspi_SpiMaster_ChannelConfig , IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave , IfxQspi_SpiSlave_Config , IfxStm_Timer , IfxStm_Timer_Config
  • baseAddress : IfxCan_MessageRAM
  • baudrate : IfxAsclin_Asc_BaudRate , IfxAsclin_Asc_Config , IfxAsclin_Lin_BaudrateGeneration , IfxAsclin_Spi_Baudrate , IfxAsclin_Spi_Config , IfxCan_Can_BaudRate , IfxCan_Can_FastBaudRate
  • baudRate : IfxCan_Can_NodeConfig
  • baudrate : IfxEray_Eray_Prtc1Control , IfxI2c_I2c , IfxI2c_I2c_Config , IfxMsc_Msc_Clock , Spi_ErrorChecks , SpiIf_Ch_ , SpiIf_ChConfig_
  • baudrateError : IfxQspi_SpiMaster_ErrorFlags , IfxQspi_SpiSlave_ErrorFlags
  • baudrateFrequency : IfxPsi5s_Psi5s_AscConfig
  • baudrateSelect : IfxPsi5_Psi5_ReceiveControl
  • baudrateSelection : IfxPsi5s_Psi5s_AscConfig
  • bitReversed : IfxEdsadc_Edsadc_CarrierGenConfig
  • bitSampling : IfxAsclin_Spi_Config
  • bitStuffControl : IfxPsi5s_Psi5s_TransmitControl
  • bitStuffingEnabled : IfxPsi5_Psi5_TransmitControl
  • bitTiming : IfxAsclin_Asc_Config
  • blankoutTime : IfxPsi5_Psi5_PulseGeneration
  • blockMode : IfxDma_Dma_ChannelConfig
  • bmhdid : Ifx_Ssw_Bmhd
  • bmi : Ifx_Ssw_Bmhd
  • boff : IfxCan_Can_InterruptConfig
  • boundary : Ifx_LutLinearF32_Item
  • boundaryFlagAction : IfxEvadc_Adc_FastCompareChannelConfig
  • boundaryFlagActivation : IfxEvadc_Adc_FastCompareChannelConfig
  • boundaryFlagInversion : IfxEvadc_Adc_FastCompareChannelConfig
  • boundaryFlagNodePointer : IfxEvadc_Adc_FastCompareChannelConfig
  • boundaryFlagValue : IfxEvadc_Adc_FastCompareChannelConfig
  • boundaryMode : IfxEvadc_Adc_ChannelConfig
  • brd : IfxAsclin_Lin_Config
  • breakDetected : IfxAsclin_Lin_ErrorFlags
  • breakLength : IfxAsclin_Lin_LinControl
  • brg : IfxAsclin_Lin_Config
  • bsc : IfxAsclin_Lin_Config
  • btc : IfxAsclin_Lin_Config
  • BUF1AP : IfxGeth_RxDescr0_RF_Bits , IfxGeth_TxDescr0_RF_Bits
  • BUF1V : IfxGeth_RxDescr3_RF_Bits
  • BUF2AP : IfxGeth_RxDescr2_RF_Bits , IfxGeth_TxDescr1_RF_Bits
  • BUF2V : IfxGeth_RxDescr3_RF_Bits
  • buffer : _Fifo , SpiIf_Config
  • bufferDirection : IfxEray_Header
  • bufferIndex : IfxEray_Eray_ReceiveControl , IfxEray_Eray_TransmitControl , IfxEray_SlotConfig
  • bufferNumber : IfxCan_Message
  • bufferReconfigEnabled : IfxEray_Eray_MessageRAMConfig
  • bufferServiceEnabled : IfxEray_Header
  • bufferSize : SpiIf_Config
  • buffMode : IfxAsclin_Asc_FifoControl , IfxAsclin_Lin_FifoControl , IfxAsclin_Spi_FifoControl
  • bus : IfxCpu_Trap_Id
  • busAccessError : IfxHssl_Hssl_errorFlags
  • busError : IfxFce_Crc_EnabledInterrupts
  • busLoopbackEnabled : IfxCan_Can_NodeConfig
  • busOffStatusEnabled : IfxCan_Can_InterruptConfig
  • busPriority : IfxDma_Dma_ChannelConfig
  • busStatus : IfxI2c_I2c
  • byteAccess : SpiIf_Flags


iLLD_TC38A: Data Fields - Variables

- c -

  • C : IfxGeth_RxDescr0 , IfxGeth_RxDescr1 , IfxGeth_RxDescr2 , IfxGeth_RxDescr3 , IfxGeth_TxDescr0 , IfxGeth_TxDescr1 , IfxGeth_TxDescr2 , IfxGeth_TxDescr3
  • calculateBitTimingValues : IfxCan_Can_NodeConfig
  • calFactor : IfxEdsadc_Edsadc_GainCalibrationConfig
  • calibrationControl : IfxEdsadc_Edsadc_FirFilterConfig
  • calibrationSampleTimeControlMode : IfxEvadc_Adc_GroupConfig
  • calibrationTrigger : IfxEdsadc_Edsadc_FirFilterConfig
  • call : Ifx_Shell_Command
  • callbackData : SpiIf_Ch_
  • calTarget : IfxEdsadc_Edsadc_GainCalibrationConfig
  • can : IfxCan_Can , IfxCan_Can_Config , IfxCan_Can_Node , IfxCan_Can_NodeConfig
  • canReadCount : IfxStdIf_DPipe_
  • canWriteCount : IfxStdIf_DPipe_
  • capture : IfxGtm_Tim_In_Config
  • captureClockFrequency : IfxGtm_Tim_In
  • captureFrequency : IfxCcu6_Icu
  • carrierWaveformMode : IfxEdsadc_Edsadc_CarrierGenConfig
  • CC : IfxGeth_TxDescr3_WF_Bits
  • cc0 : IfxCcu6_PwmHl_Config
  • cc1 : IfxCcu6_PwmHl_Config
  • cc2 : IfxCcu6_PwmHl_Config
  • cc60In : IfxCcu6_Icu_Pins
  • cc60Out : IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins
  • cc61In : IfxCcu6_Icu_Pins
  • cc61Out : IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins
  • cc62In : IfxCcu6_Icu_Pins
  • cc62Out : IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins
  • cc6xInputMode : IfxCcu6_Icu_Pins
  • ccpos0 : IfxCcu6_Icu_Pins , IfxCcu6_PwmBc_Pins
  • ccpos1 : IfxCcu6_Icu_Pins , IfxCcu6_PwmBc_Pins
  • ccpos2 : IfxCcu6_Icu_Pins , IfxCcu6_PwmBc_Pins
  • ccposxInputMode : IfxCcu6_Icu_Pins
  • ccu0Enabled : IfxGtm_Atom_Pwm_Interrupt , IfxGtm_Tom_Pwm_Interrupt
  • ccu1Enabled : IfxGtm_Atom_Pwm_Interrupt , IfxGtm_Tom_Pwm_Interrupt
  • ccu6 : IfxCcu6_Icu , IfxCcu6_Icu_Channel , IfxCcu6_Icu_ChannelConfig , IfxCcu6_Icu_Config , IfxCcu6_PwmBc , IfxCcu6_PwmBc_Config , IfxCcu6_Timer , IfxCcu6_Timer_Config , IfxCcu6_TimerWithTrigger , IfxCcu6_TimerWithTrigger_Config , IfxCcu6_TPwm , IfxCcu6_TPwm_Config
  • ccu6Enabled : IfxPmsPm_SleepConfig
  • ccucon0 : IfxScuCcu_ClockDistributionConfig
  • ccucon1 : IfxScuCcu_ClockDistributionConfig
  • ccucon2 : IfxScuCcu_ClockDistributionConfig
  • ccucon5 : IfxScuCcu_ClockDistributionConfig
  • ccucon6 : IfxScuCcu_ClockDistributionConfig
  • ccucon7 : IfxScuCcu_ClockDistributionConfig
  • ccucon8 : IfxScuCcu_ClockDistributionConfig
  • ccucon9 : IfxScuCcu_ClockDistributionConfig
  • ccx : IfxGtm_Atom_Dtm_PwmHl_Config , IfxGtm_Atom_Dtm_PwmHl_s , IfxGtm_Atom_PwmHl_Config , IfxGtm_Atom_PwmHl_s , IfxGtm_Tom_Dtm_PwmHl_Config , IfxGtm_Tom_Dtm_PwmHl_s , IfxGtm_Tom_PwmHl_Config , IfxGtm_Tom_PwmHl_s
  • ccxActiveState : IfxCcu6_PwmHl_Base , IfxGtm_Atom_Dtm_PwmHl_Base , IfxGtm_Atom_PwmHl_Base , IfxGtm_Tom_Dtm_PwmHl_Base , IfxGtm_Tom_PwmHl_Base , IfxStdIf_PwmHl_Config
  • ccxOutputEnabled : IfxStdIf_PwmHl_Config
  • ccxTemp : IfxGtm_Atom_PwmHl_s , IfxGtm_Tom_PwmHl_s
  • CDE : IfxGeth_TxContextDescr3_Bits
  • CE : IfxGeth_RxDescr3_WF_Bits
  • cfgData : Ifx_AngleTrkF32
  • CH0 : IfxGtm_Spe_ChannelOutputs
  • CH1 : IfxGtm_Spe_ChannelOutputs
  • CH2 : IfxGtm_Spe_ChannelOutputs
  • CH3 : IfxGtm_Spe_ChannelOutputs
  • CH4 : IfxGtm_Spe_ChannelOutputs
  • CH5 : IfxGtm_Spe_ChannelOutputs
  • CH6 : IfxGtm_Spe_ChannelOutputs
  • CH7 : IfxGtm_Spe_ChannelOutputs
  • channel : IfxDma_Dma_Channel , IfxEdsadc_Cin_In , IfxEdsadc_Cout_Out , IfxEdsadc_Din_In , IfxEdsadc_Dscin_In , IfxEdsadc_Dscout_Out , IfxEdsadc_Dsdin_In , IfxEdsadc_Dsn_In , IfxEdsadc_Dsp_In , IfxEdsadc_Edsadc_Channel , IfxEdsadc_Itr_In , IfxEvadc_Adc_Channel , IfxGtm_Atom_ToutMap , IfxGtm_Tim_In , IfxGtm_Tim_Timer , IfxGtm_Tim_Timer_Config , IfxGtm_Tim_TinMap , IfxGtm_Tom_ToutMap , IfxGtm_Trig_AdcTrig_Source , IfxGtm_Trig_CanTrig_Source , IfxGtm_Trig_MscTrig_Source , IfxIom_Driver_Lam , IfxIom_Driver_LamConfig , IfxPsi5_Psi5_Channel , IfxSent_Sent_Channel
  • channelAConnectedNode : IfxEray_Eray_Succ1Config
  • channelAFiltered : IfxEray_Header
  • channelAMacrotickInitialOffset : IfxEray_Eray_Gtu03Config
  • channelAMicrotickInitialOffset : IfxEray_Eray_Gtu03Config
  • channelAReceptionDelay : IfxEray_Eray_Gtu05Config
  • channelASymbolTransmitted : IfxEray_Eray_Succ1Config
  • channelBasedCs : IfxQspi_SpiMaster_Channel_s , IfxQspi_SpiMaster_ChannelConfig
  • channelBConnectedNode : IfxEray_Eray_Succ1Config
  • channelBFiltered : IfxEray_Header
  • channelBMacrotickInitialOffset : IfxEray_Eray_Gtu03Config
  • channelBMicrotickInitialOffset : IfxEray_Eray_Gtu03Config
  • channelBReceptionDelay : IfxEray_Eray_Gtu05Config
  • channelBSymbolTransmitted : IfxEray_Eray_Succ1Config
  • channelControl : IfxGtm_Tim_Timer_Config
  • channelCount : IfxCcu6_PwmHl_Base , IfxGtm_Atom_Dtm_PwmHl_Base , IfxGtm_Atom_PwmHl_Base , IfxGtm_Tom_Dtm_PwmHl_Base , IfxGtm_Tom_PwmHl_Base , IfxStdIf_PwmHl_Config
  • channelEventMode : IfxEvadc_Adc_FastCompareChannelConfig
  • channelId : IfxCcu6_Icu_Channel , IfxCcu6_Icu_ChannelConfig , IfxCcu6_TPwm_Timer12 , IfxDma_Dma_Channel , IfxDma_Dma_ChannelConfig , IfxEdsadc_Edsadc_Channel , IfxEdsadc_Edsadc_ChannelConfig , IfxEvadc_Adc_ChannelConfig , IfxEvadc_Vadcg_In , IfxGeth_Eth_DmaInterruptConfig , IfxGeth_Eth_FrameConfig , IfxGeth_Eth_RxChannel , IfxGeth_Eth_RxChannelConfig , IfxGeth_Eth_TxChannel , IfxGeth_Eth_TxChannelConfig , IfxHssl_Hssl_Channel , IfxHssl_Hssl_ChannelConfig , IfxIom_Iom_FpcConfig , IfxPsi5_Psi5_Channel , IfxPsi5_Psi5_ChannelConfig , IfxPsi5_Rx_In , IfxPsi5_Tx_Out , IfxPsi5s_Psi5s_Channel , IfxPsi5s_Psi5s_ChannelConfig , IfxPsi5s_Psi5s_ReceivedBits , IfxQspi_SpiMaster_Channel_s , IfxScu_Req_In , IfxSent_Sent_Channel , IfxSent_Sent_ChannelConfig , IfxSent_Sent_In , IfxSent_Spc_Out
  • channelIndex : IfxGtm_Tim_In , IfxGtm_Tim_In_Config
  • channelInputControl : IfxGtm_Tim_ChannelControl
  • channelInterruptControl : IfxDma_Dma_ChannelConfig
  • channelInterruptEnabled : IfxDma_Dma_ChannelConfig
  • channelInterruptPriority : IfxDma_Dma_ChannelConfig
  • channelInterruptTypeOfService : IfxDma_Dma_ChannelConfig
  • channelMode : IfxCcu6_Icu_Channel , IfxCcu6_Icu_ChannelConfig , IfxCcu6_TPwm_Timer12
  • channelNumberCodeError : IfxHssl_Hssl_errorFlags
  • channelOut : IfxCcu6_TPwm , IfxCcu6_TPwm_Config
  • channelPins : IfxEdsadc_Edsadc_ChannelConfig
  • channelPriority : IfxEvadc_Adc_ChannelConfig
  • channels : IfxEvadc_Adc_EmuxControl
  • channelSelectionStyle : IfxEvadc_Adc_EmuxControl
  • channelServProvider : IfxEvadc_Adc_ChannelConfig
  • channelsMask : IfxGtm_Atom_Timer , IfxGtm_Tom_Timer
  • channelSrcNr : IfxEvadc_Adc_ChannelConfig
  • channelTrigger : IfxPsi5_Psi5_ChannelConfig , IfxPsi5s_Psi5s_ChannelConfig
  • channelTriggerCounter : IfxPsi5_Psi5_ChannelTrigger , IfxPsi5s_Psi5s_ChannelTrigger
  • channelTriggerValue : IfxPsi5_Psi5_ChannelTrigger , IfxPsi5s_Psi5s_ChannelTrigger
  • checksum : IfxAsclin_Lin_DataControl
  • checksumMode : IfxAsclin_Lin_PduType
  • CIC_TPL : IfxGeth_TxDescr3_RF_Bits
  • cicDecimationRate : IfxEdsadc_Edsadc_GainCalibrationConfig
  • cicMode : IfxEdsadc_Edsadc_FirFilterConfig
  • cicShift : IfxEdsadc_Edsadc_ChannelConfig , IfxEdsadc_Edsadc_GainCalibrationConfig
  • cin : IfxEdsadc_Edsadc_ChannelPins
  • cinMode : IfxEdsadc_Edsadc_ChannelPins
  • clearEvent : IfxIom_Driver_LamEventWindowConfig
  • clearInterruptAfterLastFlag : IfxQspi_SpiMaster_MoveCounterControl
  • clearInterruptBeforeLastFlag : IfxQspi_SpiMaster_MoveCounterControl
  • clearRx : IfxStdIf_DPipe_
  • clearTimerOnGlitch : IfxIom_Driver_LamFilterConfig
  • clearTx : IfxStdIf_DPipe_
  • clk : IfxPsi5s_Psi5s_Pins
  • clkMode : IfxPsi5s_Psi5s_Pins
  • clkSel : IfxGtm_Tim_ChannelControl
  • clock : IfxCcu6_Icu_Config , IfxCcu6_Timer_Config , IfxCcu6_TPwm_Config , IfxCpu_Perf , IfxGtm_Atom_Timer_Config , IfxGtm_Tim_In_ConfigCapture , IfxGtm_Tim_In_ConfigFilter , IfxGtm_Tim_In_ConfigTimeout , IfxGtm_Tom_Pwm_Config , IfxGtm_Tom_Timer_Config
  • clockConfig : IfxMsc_Msc_Config
  • clockCorrectionCyclesHalt : IfxEray_Eray_Succ3Config
  • clockCorrectionCyclesPassive : IfxEray_Eray_Succ3Config
  • clockDistribution : IfxScuCcu_Config
  • clockDivider : IfxEvadc_Adc_FastCompareChannelConfig
  • clockFreq : IfxCcu6_TimerWithTrigger_Base , IfxGtm_Atom_Timer_Base , IfxGtm_Tom_Timer_Base , IfxStm_Timer_Base
  • clockInput : IfxCcu6_TPwm_Timer12 , IfxCcu6_TPwm_Timer13
  • clockOutput : IfxPsi5s_Psi5s_AscConfig
  • clockPolarity : IfxQspi_SpiSlave_Protocol , SpiIf_ChMode
  • clockSelectAbra : IfxMsc_Msc_Abra
  • clockSource : IfxAsclin_Asc_Config , IfxAsclin_Lin_Config , IfxAsclin_Spi_Config , IfxCan_Can_NodeConfig
  • clockSyncErrorHalt : IfxEray_Eray_Succ1Config
  • clrInternalResetFlag : IfxScuWdt_Config
  • clusterDrift : IfxEray_Eray_Gtu05Config
  • cmd : Ifx_Shell
  • cmdHistory : Ifx_Shell
  • cmdState : Ifx_Shell_Runtime
  • cmdStr : Ifx_Shell_CmdLine , Ifx_Shell_Runtime
  • cntsSel : IfxGtm_Tim_ChannelControl
  • code : IfxEvadc_Adc_EmuxControl
  • codeforOne : IfxPsi5s_Psi5s_PulseGeneration
  • codeforZero : IfxPsi5s_Psi5s_PulseGeneration
  • col : IfxGeth_Eth_MiiPins
  • collisionAvoidanceDuration : IfxEray_Eray_Prtc1Control
  • collisionDetectionEnable : IfxAsclin_Lin_FrameControl
  • collisionDetectionError : IfxAsclin_Lin_ErrorFlags
  • combFilter : IfxEdsadc_Edsadc_ChannelConfig
  • commandDataCommandReceptionMode : IfxMsc_Msc_DownstreamControlConfig
  • commandExtensionConfig : IfxMsc_Msc_Config
  • commandFrameInterrupt : IfxMsc_Msc_InterruptConfig
  • commandFrameInterruptNode : IfxMsc_Msc_InterruptConfig
  • commandFrameLength : IfxMsc_Msc_CommandExtensionConfig , IfxMsc_Msc_DownstreamControlConfig
  • commandFramePassivePhaseLength : IfxMsc_Msc_CommandExtensionConfig
  • commandLine : Ifx_Shell_Command
  • commandList : Ifx_Shell , Ifx_Shell_Config
  • commonMode : IfxEdsadc_Edsadc_ChannelConfig
  • commonModeHoldVoltage : IfxEdsadc_Edsadc_CommonModeVoltageConfig
  • comparator : IfxStm_CompareConfig , IfxStm_Timer , IfxStm_Timer_Config
  • comparatorInterrupt : IfxStm_CompareConfig
  • comparatorShift : IfxStm_Timer
  • comparatorThreshold : IfxIom_Iom_FpcConfig
  • comparatorValue : IfxStm_Timer
  • compareOffset : IfxStm_CompareConfig
  • compareSize : IfxStm_CompareConfig
  • compareValue : IfxCcu6_PwmBc_Timer13 , IfxCcu6_TPwm_Timer12 , IfxCcu6_TPwm_Timer13
  • config : IfxGtm_Trig_AdcTrig_Channel , IfxGtm_Trig_CanTrig_Channel , IfxGtm_Trig_MscTrig_Channel
  • config0 : IfxMtu_MbistConfigPattern
  • config1 : IfxMtu_MbistConfigPattern
  • configBit : IfxSent_Sent_SerialMessageFrame
  • configError : IfxFce_Crc_EnabledInterrupts
  • configPatterns : IfxMtu_MbistConfig
  • configuration : IfxPsi5_Psi5_Message
  • configurationError : IfxQspi_SpiMaster_ErrorFlags , IfxQspi_SpiSlave_ErrorFlags
  • confirmation : Ifx_Ssw_Bmhd
  • contextManagement : IfxCpu_Trap_Id
  • control : Ifx_Shell
  • controlFrameExtensionPassivePhaseLength : IfxMsc_Msc_DownstreamControlExtensionConfig
  • controllerConfig : IfxEray_Eray_NodeConfig
  • controlSource : IfxIom_Driver_LamEventWindowConfig
  • conversionMode : IfxEvadc_Adc_ClassConfig
  • conversionModeEMUX : IfxEvadc_Adc_ClassConfig
  • correctionOffset : IfxEray_Eray_Gtu04Config
  • cosIn : Ifx_AngleTrkF32 , Ifx_AngleTrkF32_Config
  • count : Ifx_Fifo_Shared
  • countDir : IfxCcu6_TimerWithTrigger_Base , IfxGtm_Atom_Timer_Base , IfxGtm_Tom_Timer_Base , IfxStdIf_Timer_Config , IfxStm_Timer_Base
  • countedEventCombinerSelection0 : IfxIom_Iom_EcmGlobalEventSelectionBits
  • countedEventCombinerSelection1 : IfxIom_Iom_EcmGlobalEventSelectionBits
  • countedEventCombinerSelection2 : IfxIom_Iom_EcmGlobalEventSelectionBits
  • countedEventCombinerSelection3 : IfxIom_Iom_EcmGlobalEventSelectionBits
  • counter : IfxCpu_Counter
  • counter1 : IfxCpu_Perf
  • counter2 : IfxCpu_Perf
  • counter3 : IfxCpu_Perf
  • counterValue : IfxCcu6_Icu_Config , IfxCcu6_PwmBc_Timer12 , IfxCcu6_PwmBc_Timer13 , IfxCcu6_Timer_Timer12 , IfxCcu6_Timer_Timer13 , IfxCcu6_TPwm_Timer12 , IfxCcu6_TPwm_Timer13
  • countingInputMode : IfxCcu6_Icu_Clock
  • countMode : IfxCcu6_Icu_Config , IfxCcu6_PwmBc_Timer12 , IfxCcu6_Timer_Timer12 , IfxCcu6_TPwm_Timer12
  • countOneStep : Timer_Functions
  • cout0 : IfxCcu6_PwmHl_Config
  • cout1 : IfxCcu6_PwmHl_Config
  • cout2 : IfxCcu6_PwmHl_Config
  • cout60 : IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins
  • cout61 : IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins
  • cout62 : IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins
  • cout63 : IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins
  • coutx : IfxGtm_Atom_Dtm_PwmHl_Config , IfxGtm_Atom_Dtm_PwmHl_s , IfxGtm_Atom_PwmHl_Config , IfxGtm_Atom_PwmHl_s , IfxGtm_Tom_Dtm_PwmHl_Config , IfxGtm_Tom_Dtm_PwmHl_s , IfxGtm_Tom_PwmHl_Config , IfxGtm_Tom_PwmHl_s
  • coutxActiveState : IfxCcu6_PwmHl_Base , IfxGtm_Atom_Dtm_PwmHl_Base , IfxGtm_Atom_PwmHl_Base , IfxGtm_Tom_Dtm_PwmHl_Base , IfxGtm_Tom_PwmHl_Base , IfxStdIf_PwmHl_Config
  • coutxOutputEnabled : IfxStdIf_PwmHl_Config
  • coutxTemp : IfxGtm_Atom_PwmHl_s , IfxGtm_Tom_PwmHl_s
  • CPC : IfxGeth_TxDescr3_RF_Bits
  • cpol : IfxAsclin_Spi_InputOutputControl
  • cpuSafeState : IfxScuRcu_ResetCode
  • crc : Ifx_Ssw_Bmhd , IfxPsi5_Psi5_FrameData , IfxPsi5_Psi5_Message , IfxPsi5s_Psi5s_ReceivedBits , IfxSent_Sent_SerialMessageFrame
  • crc32BitReflectionEnabled : IfxFce_Crc_CrcConfig
  • crcChannel : IfxFce_Crc_Crc , IfxFce_Crc_CrcConfig
  • crcCheckCompared : IfxFce_Crc_CrcConfig
  • crcError : IfxHssl_Hssl_errorFlags , IfxPsi5_Psi5_FrameData , IfxPsi5s_Psi5s_ReceivedBits
  • crcErrorConsideredForRSI : IfxPsi5s_Psi5s_GlobalControlConfig
  • crcErrorInterrupt : IfxSent_Sent_Enable
  • crcGenerationControl : IfxPsi5s_Psi5s_TransmitControl
  • crcGenerationEnabled : IfxPsi5_Psi5_TransmitControl
  • crchighbit : Ifc_Crc_Table
  • crcinit_direct : Ifc_Crc
  • crcinit_nondirect : Ifc_Crc
  • crcInv : Ifx_Ssw_Bmhd
  • crcKernel : IfxFce_Crc_Crc , IfxFce_Crc_CrcConfig
  • crcmask : Ifc_Crc_Table
  • crcMethodDisabled : IfxSent_Sent_ReceiveControl
  • crcMismatch : IfxFce_Crc_EnabledInterrupts
  • crcModeDisabled : IfxSent_Sent_ReceiveControl
  • crcOrParity : IfxPsi5_Psi5_ReceiveControl , IfxPsi5s_Psi5s_ReceiveControl
  • crcResultInverted : IfxFce_Crc_CrcConfig
  • crctab : Ifc_Crc_Table16 , Ifc_Crc_Table32 , Ifc_Crc_Table8
  • crcxor : Ifc_Crc
  • crs : IfxGeth_Eth_MiiPins
  • crsDiv : IfxGeth_Eth_RmiiPins
  • csActiveLevel : SpiIf_ChMode
  • csEnable : IfxAsclin_Lin_LinControl
  • csi : IfxAsclin_Lin_LinControl
  • csInactiveDelay : SpiIf_ChMode
  • csLeadDelay : SpiIf_ChMode
  • cslpPolarity : IfxMsc_Msc_OutputControlConfig
  • csTrailDelay : SpiIf_ChMode
  • cts : IfxAsclin_Asc_Pins
  • ctsMode : IfxAsclin_Asc_Pins
  • CTXT : IfxGeth_RxContextDescr3_Bits , IfxGeth_RxDescr3_WF_Bits , IfxGeth_TxContextDescr3_Bits , IfxGeth_TxDescr3_RF_Bits , IfxGeth_TxDescr3_WF_Bits
  • currentFrameRequest : IfxHssl_Hssl_Channel
  • cursor : Ifx_Shell_CmdLine
  • cutOffFrequency : Ifx_LowPassPt1F32_Config
  • cycleCode : IfxEray_Header
  • cycleNumber : IfxEray_ReceivedHeader


iLLD_TC38A: Data Fields - Variables

- d -

  • daBasedDmaChannelEnabled : IfxGeth_Eth_RxQueueConfig
  • DAF : IfxGeth_RxDescr2_WF_Bits
  • data : Ifc_Crc_Table16 , Ifc_Crc_Table32 , Ifc_Crc_Table8 , Ifx_DataBufferMode_TimeStampSingle , Ifx_Shell_Command , IfxAsclin_Lin_Config , IfxAsclin_Spi_Job , IfxEray_Eray_BufferReconfig , IfxEray_Eray_MessageRAMConfig , IfxEray_Eray_ReceivedFrame , IfxPsi5s_Psi5s_Frame , IfxSent_Sent_Frame , SpiIf_Job
  • dataBufferMode : IfxAsclin_Asc , IfxAsclin_Asc_Config
  • dataByteReflectionEnabled : IfxFce_Crc_CrcConfig
  • dataCoherent : IfxGtm_Tim_In
  • dataFrameExtensionPassivePhaseLength : IfxMsc_Msc_DownstreamControlExtensionConfig
  • dataFrameInterrupt : IfxMsc_Msc_InterruptConfig
  • dataFrameInterruptNode : IfxMsc_Msc_InterruptConfig
  • dataFramePassivePhaseLength : IfxMsc_Msc_DownstreamControlConfig
  • dataHeading : IfxQspi_SpiSlave_Protocol , SpiIf_ChMode
  • dataLength : IfxAsclin_Asc_FrameControl , IfxAsclin_Lin_DataControl , IfxAsclin_Lin_PduType , IfxAsclin_Spi_Config
  • dataLengthCode : IfxCan_Message
  • dataLengthError : IfxHssl_Hssl_errorFlags
  • dataLost : IfxGtm_Tim_In
  • dataModificationMode : IfxEvadc_Adc_ChannelConfig
  • dataPointer : IfxEray_Header
  • dataPtr : IfxAsclin_Lin_PduType
  • dataReadMode : IfxEdsadc_Edsadc_DemodulatorConfig
  • dataReceived : IfxEray_Eray_ReceiveControl
  • dataReductionControlMode : IfxEvadc_Adc_ChannelConfig
  • dataSize : IfxMtu_SramItem
  • dataStream : IfxEdsadc_Edsadc_DemodulatorConfig
  • dataTransfered : IfxEray_Eray_TransmitControl , IfxEray_SlotConfig
  • dataWidth : IfxAsclin_Spi , IfxQspi_SpiMaster_Channel_s , IfxQspi_SpiSlave , IfxQspi_SpiSlave_Protocol , SpiIf_ChMode
  • DB : IfxGeth_TxDescr3_WF_Bits
  • dc : IfxMsc_CxModeCommand
  • dce : IfxMsc_CxModeCommand
  • DE : IfxGeth_RxContextDescr3_Bits , IfxGeth_RxDescr3_WF_Bits
  • deactivateSlso : IfxQspi_SpiMaster_Channel_s
  • deadtime : IfxCcu6_PwmHl_Base , IfxGtm_Atom_Dtm_PwmHl_Base , IfxGtm_Atom_PwmHl_Base , IfxGtm_Tom_Dtm_PwmHl_Base , IfxGtm_Tom_PwmHl_Base , IfxStdIf_PwmHl_Config
  • deadTimeClock : IfxGtm_Atom_Dtm_PwmHl_Config , IfxGtm_Tom_Dtm_PwmHl_Config
  • deadTimeValue : IfxCcu6_TPwm_Timer12
  • decimationFactor : IfxEdsadc_Edsadc_CombFilterConfig
  • decodingCorrection : IfxEray_Eray_Gtu05Config
  • dedicatedTxBuffersNumber : IfxCan_Can_TxConfig
  • delay : IfxEvadc_Adc_FastCompareChannelConfig , IfxQspi_DelayConst
  • delayLength : IfxPsi5_Psi5_PulseGeneration
  • delta : Ifx_ClpxFloat32_Integral , Ifx_IntegralF32 , Ifx_RampF32
  • demodulator : IfxEdsadc_Edsadc_ChannelConfig
  • denominator : IfxAsclin_Lin_BaudrateGeneration
  • descr : IfxGeth_RxDescrList , IfxGeth_TxDescrList
  • description : Ifx_Shell_Syntax
  • destinationAddress : IfxDma_Dma_ChannelConfig
  • destinationAddressCircularRange : IfxDma_Dma_ChannelConfig
  • destinationAddressIncrementDirection : IfxDma_Dma_ChannelConfig
  • destinationAddressIncrementStep : IfxDma_Dma_ChannelConfig
  • destinationCircularBufferEnabled : IfxDma_Dma_ChannelConfig
  • deviceAddress : IfxI2c_I2c_Device , IfxI2c_I2c_deviceConfig
  • digitalGlitchFilterDepth : IfxSent_Sent_InputOutputControl
  • digitalInputFilterDepth : IfxPsi5_Psi5_InputOutputControl
  • din : IfxEdsadc_Edsadc_ChannelPins
  • dinMode : IfxEdsadc_Edsadc_ChannelPins
  • direction : Ifx_AngleTrkF32_PosIf , IfxAsclin_Lin_PduType , IfxGpt12_IncrEnc
  • disablePostCalibration : IfxEvadc_Adc_GroupConfig
  • disableUpdate : IfxStdIf_Timer_
  • disableWatchdog : IfxScuWdt_Config
  • discardCount : IfxEdsadc_Edsadc_IntegratorConfig
  • ditheringEnabled : IfxEdsadc_Edsadc_ModulatorConfig , IfxEdsadc_ModulatorConfig
  • ditheringIntensity : IfxEdsadc_Edsadc_Config
  • dividerMode : IfxMsc_Msc_Clock
  • dma : IfxDma_Dma , IfxDma_Dma_Channel , IfxDma_Dma_Config , IfxGeth_Eth_Config , IfxQspi_SpiMaster , IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave , IfxQspi_SpiSlave_Config
  • doubleClockForMSBConversionSelection : IfxEvadc_Adc_GroupConfig
  • downstreamConfig : IfxMsc_Msc_Config
  • downstreamDataSourcesHigh : IfxMsc_Msc_DownstreamControlConfig
  • downstreamDataSourcesLow : IfxMsc_Msc_DownstreamControlConfig
  • downstreamExtensionConfig : IfxMsc_Msc_Config
  • downstreamExtensionDataSourcesHigh : IfxMsc_Msc_DownstreamControlExtensionConfig
  • downstreamExtensionDataSourcesLow : IfxMsc_Msc_DownstreamControlExtensionConfig
  • driftErrorsDisabled : IfxSent_Sent_ReceiveControl
  • driver : IfxQspi_SpiMaster_Output , IfxSent_Sent_Channel , IfxSent_Sent_ChannelConfig , IfxStdIf_DPipe_ , IfxStdIf_Pos_ , IfxStdIf_PwmHl_ , IfxStdIf_Timer_ , SpiIf_ , SpiIf_Ch_ , SpiIf_ChConfig_
  • droopRequestType : IfxPmsPm_VoltageDroopConfig
  • droopStep : IfxPmsPm_VoltageDroopConfig
  • dsn : IfxEdsadc_Edsadc_ChannelPins
  • dsnMode : IfxEdsadc_Edsadc_ChannelPins
  • dsp : IfxEdsadc_Edsadc_ChannelPins
  • dspMode : IfxEdsadc_Edsadc_ChannelPins
  • dtm : IfxGtm_Atom_Dtm_PwmHl_s , IfxGtm_Atom_Timer , IfxGtm_Tom_Dtm_PwmHl_s , IfxGtm_Tom_Timer
  • dtmChannel : IfxGtm_Atom_Dtm_PwmHl_s , IfxGtm_Atom_Timer , IfxGtm_Tom_Dtm_PwmHl_s , IfxGtm_Tom_Timer
  • dtmClockFreq : IfxGtm_Atom_Dtm_PwmHl_s , IfxGtm_Tom_Dtm_PwmHl_s
  • dtmClockSource : IfxGtm_Atom_Pwm_Config , IfxGtm_Atom_Timer_Config , IfxGtm_Tom_Pwm_Config , IfxGtm_Tom_Timer_Config
  • dummyRxValue : IfxQspi_SpiMaster_Channel_s , IfxQspi_SpiMaster_ChannelConfig
  • dummyTxValue : IfxQspi_SpiMaster_Channel_s , IfxQspi_SpiMaster_ChannelConfig
  • duplexMode : IfxGeth_Eth_MacConfig
  • dutyCycle : IfxGtm_Atom_Pwm_Config , IfxGtm_Tom_Pwm_Config
  • dynamicActionPoint : IfxEray_Eray_Gtu09Config
  • dynamicSlotCount : IfxEray_Eray_Gtu08Config
  • dynamicSlotLength : IfxEray_Eray_Gtu08Config


iLLD_TC38A: Data Fields - Variables

- e -

  • EC : IfxGeth_TxDescr3_WF_Bits
  • eccInvPos0 : IfxMtu_SramItem
  • eccInvPos1 : IfxMtu_SramItem
  • eccSize : IfxMtu_SramItem
  • echo : Ifx_Shell_Config , Ifx_Shell_Flags , Ifx_Shell_Runtime
  • echoError : Ifx_Shell_Flags
  • ED : IfxGeth_TxDescr3_WF_Bits
  • edgeCount : IfxGtm_Tim_In
  • edgeCounterCleared : IfxSent_Sent_InputOutputControl
  • edgeCounterUpper : IfxGtm_Tim_In
  • edgeType : IfxIom_Iom_FpcConfig
  • edsadc : IfxEdsadc_Edsadc , IfxEdsadc_Edsadc_Config
  • egpr0Sel : IfxGtm_Tim_ChannelControl
  • egpr1Sel : IfxGtm_Tim_ChannelControl
  • elementConfiguration : IfxCan_Filter
  • elementSize : _Fifo
  • emergencyEnabled : IfxStdIf_PwmHl_Config
  • emergencyStopEnableBits : IfxMsc_Msc_DownstreamControlConfig
  • emergencyStopExtensionEnableBits : IfxMsc_Msc_DownstreamControlExtensionConfig
  • emuxInterface : IfxEvadc_Adc_EmuxControl
  • emuxOutPinConfig : IfxEvadc_Adc_EmuxControl
  • en0 : IfxMsc_Msc_Io
  • en1 : IfxMsc_Msc_Io
  • en2 : IfxMsc_Msc_Io
  • en3 : IfxMsc_Msc_Io
  • enable : IfxGtm_Tim_ChannelControl , IfxSent_Sent_EnabledInterrupts
  • enableAruRouting : IfxGtm_Tim_ChannelControl
  • enableAutomaticPasswordChange : IfxScuWdt_Config
  • enableAuxInputSourceSelect : IfxGtm_Tim_Timer_Config
  • enableCounterReset : IfxGtm_Tim_ChannelControl
  • enabled : Ifx_Shell_Flags , IfxEdsadc_Edsadc_RectifierConfig , IfxStdIf_Timer_TrigConfig , SpiIf_ChMode
  • enabledInterrupt : IfxAsclin_Lin_InterruptConfig
  • enabledInterrupts : IfxFce_Crc_CrcConfig , IfxSent_Sent_ChannelConfig
  • enableExternalCaptureMode : IfxGtm_Tim_ChannelControl
  • enableFaultToRunTransition : IfxSmu_Smu_AlarmGlobalConfiguration
  • enableFilter : IfxGtm_Tim_ChannelControl
  • enableLoadJumpTimer : IfxPmsPm_LoadJumpConfig
  • enableLoadJumpTimerOverflowFlag : IfxPmsPm_LoadJumpConfig
  • enableLoadJumpTimerOverflowInterrupt : IfxPmsPm_LoadJumpConfig
  • enableOneShotMode : IfxGtm_Tim_ChannelControl
  • enablePortControlled : IfxPort_LvdsConfig
  • enableRecoveryTimer0 : IfxSmu_Smu_RecoveryTimerConfig
  • enableRecoveryTimer1 : IfxSmu_Smu_RecoveryTimerConfig
  • enableScr : IfxPmsPm_StandbyConfig
  • enableSmuRestriction : IfxScuWdt_Config
  • enableStandbyOnVddRampDown : IfxPmsPm_StandbyConfig
  • enableStandbyOnVextRampDown : IfxPmsPm_StandbyConfig
  • enableTimerCheck : IfxScuWdt_Config
  • enableTimerCheckTolerance : IfxScuWdt_Config
  • enableVoltageDroopTimer : IfxPmsPm_VoltageDroopConfig
  • enableVoltageDroopTimerOverflowFlag : IfxPmsPm_VoltageDroopConfig
  • enableVoltageDroopTimerOverflowInterrupt : IfxPmsPm_VoltageDroopConfig
  • enableWakeupOnEsr0 : IfxPmsPm_StandbyConfig
  • enableWakeupOnEsr1 : IfxPmsPm_StandbyConfig
  • enableWakeupOnPinA : IfxPmsPm_StandbyConfig
  • enableWakeupOnPinB : IfxPmsPm_StandbyConfig
  • enableWakeupOnPorst : IfxPmsPm_StandbyConfig
  • enableWakeupOnPower : IfxPmsPm_StandbyConfig
  • enableWakeupOnScr : IfxPmsPm_StandbyConfig
  • enableWakeupOnTimer : IfxPmsPm_StandbyConfig
  • end : IfxFlash_flashSector , IfxHssl_Hssl_AccessWindow
  • endIndex : _Fifo
  • ENDIS_CTRL : IfxGtm_Tom_TGC
  • ENDIS_STAT : IfxGtm_Tom_TGC
  • endPulseIgnored : IfxSent_Sent_ReceiveControl
  • enhancedProtocolSelected : IfxPsi5_Psi5_TransmitControl
  • enhancedProtocolSelection : IfxPsi5s_Psi5s_TransmitControl
  • eray : IfxEray_Eray
  • erPriority : IfxAsclin_Asc_InterruptConfig , IfxAsclin_Spi_InterruptConfig , SpiIf_Config
  • errorChecks : SpiIf_Ch_ , SpiIf_ChConfig_
  • errorFlag0 : IfxPsi5s_Psi5s_ReceivedBits
  • errorFlag1 : IfxPsi5s_Psi5s_ReceivedBits
  • errorFlags : IfxAsclin_Asc , IfxAsclin_Asc_Config , IfxAsclin_Spi , IfxHssl_Hssl , IfxQspi_SpiMaster_Channel_s , IfxQspi_SpiSlave
  • errorFlagsStatus : IfxAsclin_Lin
  • errorInterruptNode : IfxSent_Sent_InterruptNodeControl
  • errorLoggingOverflowEnabled : IfxCan_Can_InterruptConfig
  • errorPassiveEnabled : IfxCan_Can_InterruptConfig
  • errorStateIndicator : IfxCan_Message
  • errorThreshold : Ifx_AngleTrkF32_CfgData , Ifx_AngleTrkF32_Config
  • ES : IfxGeth_RxDescr3_WF_Bits , IfxGeth_TxDescr3_WF_Bits
  • escBracketNum : Ifx_Shell_Runtime
  • esr0DigitalFilterUsage : IfxPmsPm_StandbyConfig
  • esr0PinStateRequest : IfxPmsPm_StandbyConfig
  • esr0TriggerEvent : IfxPmsPm_StandbyConfig
  • esr1DigitalFilterUsage : IfxPmsPm_StandbyConfig
  • esr1TriggerEvent : IfxPmsPm_StandbyConfig
  • evadc : IfxEvadc_Adc , IfxEvadc_Adc_Config , IfxEvadc_Adc_EmuxControl
  • event : IfxIom_Driver_LamConfig
  • eventActiveEdgeSelection : IfxIom_Iom_LamConfig
  • eventCombinerSelection0 : IfxIom_Iom_EcmGlobalEventSelectionBits
  • eventCombinerSelection1 : IfxIom_Iom_EcmGlobalEventSelectionBits
  • eventCombinerSelection10 : IfxIom_Iom_EcmGlobalEventSelectionBits
  • eventCombinerSelection11 : IfxIom_Iom_EcmGlobalEventSelectionBits
  • eventCombinerSelection12 : IfxIom_Iom_EcmGlobalEventSelectionBits
  • eventCombinerSelection13 : IfxIom_Iom_EcmGlobalEventSelectionBits
  • eventCombinerSelection14 : IfxIom_Iom_EcmGlobalEventSelectionBits
  • eventCombinerSelection15 : IfxIom_Iom_EcmGlobalEventSelectionBits
  • eventCombinerSelection2 : IfxIom_Iom_EcmGlobalEventSelectionBits
  • eventCombinerSelection3 : IfxIom_Iom_EcmGlobalEventSelectionBits
  • eventCombinerSelection4 : IfxIom_Iom_EcmGlobalEventSelectionBits
  • eventCombinerSelection5 : IfxIom_Iom_EcmGlobalEventSelectionBits
  • eventCombinerSelection6 : IfxIom_Iom_EcmGlobalEventSelectionBits
  • eventCombinerSelection7 : IfxIom_Iom_EcmGlobalEventSelectionBits
  • eventCombinerSelection8 : IfxIom_Iom_EcmGlobalEventSelectionBits
  • eventCombinerSelection9 : IfxIom_Iom_EcmGlobalEventSelectionBits
  • eventCounter : IfxIom_Iom_EcmConfig
  • eventReader : _Fifo
  • eventSelect : IfxEdsadc_Edsadc_FirFilterConfig
  • eventSource : IfxIom_Iom_LamConfig
  • eventWindow : IfxIom_Driver_LamConfig
  • eventWindowInverted : IfxIom_Iom_LamConfig
  • eventWindowThreshold : IfxIom_Iom_LamConfig
  • eventWriter : _Fifo
  • exBreakDetected : IfxAsclin_Lin_EnabledInterrupts
  • exchange : SpiIf_funcs
  • exCollisionDetectionError : IfxAsclin_Lin_EnabledInterrupts
  • execute : Ifx_Shell_Protocol
  • exFramingError : IfxAsclin_Lin_EnabledInterrupts
  • exHeaderTimeout : IfxAsclin_Lin_EnabledInterrupts
  • exLinAutobaudDetectionError : IfxAsclin_Lin_EnabledInterrupts
  • exLinChecksumError : IfxAsclin_Lin_EnabledInterrupts
  • exLinParityError : IfxAsclin_Lin_EnabledInterrupts
  • exorInputEnable : IfxIom_Iom_FpcConfig
  • expectedCrc : IfxFce_Crc_Crc , IfxFce_Crc_CrcConfig
  • expectTimeoutError : IfxQspi_SpiMaster_ErrorFlags , IfxQspi_SpiSlave_ErrorFlags
  • exPriority : IfxAsclin_Lin_InterruptConfig
  • exReceiveFIFOOverflow : IfxAsclin_Lin_EnabledInterrupts
  • exResponseTimeout : IfxAsclin_Lin_EnabledInterrupts
  • extClockEnabled : IfxCcu6_Icu_Clock
  • extClockInput : IfxCcu6_Icu_Clock
  • extendedFilterForNonMatchingFrames : IfxCan_Can_FilterConfig
  • extendedFilterListStartAddress : IfxCan_MessageRAM
  • extendEdgeCounterOverflow : IfxGtm_Tim_ChannelControl
  • extendedListSize : IfxCan_Can_FilterConfig
  • extendedSerialFrameMode : IfxSent_Sent_ReceiveControl
  • extension : IfxMsc_Msc_CommandExtensionConfig , IfxMsc_Msc_DownstreamControlExtensionConfig
  • externalOffset : IfxEray_Eray_Gtu11Config
  • externalOffsetCorrection : IfxEray_Eray_Gtu11Config
  • externalRate : IfxEray_Eray_Gtu11Config
  • externalRateCorrection : IfxEray_Eray_Gtu11Config
  • externalSignalInjectionPin0 : IfxMsc_Msc_DownstreamControlConfig
  • externalSignalInjectionPin1 : IfxMsc_Msc_DownstreamControlConfig
  • externalTimeBaseSelect : IfxPsi5_Psi5_PulseGeneration , IfxPsi5_Psi5_TimeStampConfig , IfxPsi5s_Psi5s_PulseGeneration , IfxPsi5s_Psi5s_TimeStampConfig
  • externalTrigger : IfxSent_Sent_InputOutputControl
  • externalTriggerOperatingMode : IfxEvadc_Adc_FastCompareChannelConfig
  • externalTriggerPolarity : IfxEvadc_Adc_FastCompareChannelConfig
  • externalTriggerSelect : IfxPsi5_Psi5_PulseGeneration , IfxPsi5s_Psi5s_PulseGeneration
  • extInputTrigger : IfxCcu6_Icu_TriggerConfig
  • extInputTriggerMode : IfxCcu6_Icu_TriggerConfig , IfxCcu6_Timer_TriggerConfig , IfxCcu6_TPwm_TriggerConfig
  • exTransmissionCompleted : IfxAsclin_Lin_EnabledInterrupts
  • exTransmitFIFOOverflow : IfxAsclin_Lin_EnabledInterrupts


iLLD_TC38A: Data Fields - Variables

- f -

  • fallingEdgeFilterTime : IfxGtm_Tim_In_ConfigFilter , IfxGtm_Tim_Timer_Config , IfxIom_Driver_LamFilterConfig
  • fallingEdgeMode : IfxGtm_Tim_In_ConfigFilter
  • fastBaudRate : IfxCan_Can_NodeConfig
  • fastClock : IfxPsi5_Psi5_Config
  • fastCompareChannel : IfxEvadc_Adc_FastCompareChannel
  • fastCompareChannelId : IfxEvadc_Adc_FastCompareChannel , IfxEvadc_Adc_FastCompareChannelConfig
  • fastMode : IfxMsc_Msc_CommandExtensionConfig
  • faultStateDurationHigh : IfxSmu_Smu_FaultSignalingProtocol
  • faultStateDurationLow : IfxSmu_Smu_FaultSignalingProtocol
  • fce : IfxFce_Crc , IfxFce_Crc_Config , IfxFce_Crc_Crc , IfxFce_Crc_CrcConfig
  • fceChannelId : IfxFce_Crc_CrcConfig
  • fceDmaChannel : IfxFce_Crc_Crc
  • fclClockControl : IfxMsc_Msc_OutputControlConfig
  • fcln : IfxMsc_Msc_Io
  • fclp : IfxMsc_Msc_Io
  • fclpPolarity : IfxMsc_Msc_OutputControlConfig
  • fcRestartControl : IfxEdsadc_Edsadc_IntegratorConfig
  • FD : IfxGeth_RxDescr3_WF_Bits , IfxGeth_TxDescr3_RF_Bits , IfxGeth_TxDescr3_WF_Bits
  • FF : IfxGeth_TxDescr3_WF_Bits
  • fifo : IfxAsclin_Asc_Config , IfxAsclin_Lin_Config , IfxAsclin_Spi_Config
  • fifoBufferStartIndex : IfxEray_Eray_MessageRAMConfig
  • fifoConfigured : IfxEray_Eray_MessageRAMConfig
  • fifoDepth : IfxEray_Eray_MessageRAMConfig
  • fifoMode : IfxEvadc_Adc_ChannelConfig
  • fifoNullFramesRejected : IfxEray_Eray_MessageRAMConfig
  • fifoWarningLevel : IfxPsi5_Psi5_ReceiveControl
  • filter : IfxGtm_Tim_In_Config , IfxIom_Driver_LamMonConfig , IfxIom_Driver_LamRefConfig , IfxPmsPm_WakeupConfig
  • filterConfig : IfxCan_Can_NodeConfig
  • filterCounterFrequency : IfxGtm_Tim_ChannelControl
  • filterCounterModeFallingEdge : IfxGtm_Tim_ChannelControl
  • filterCounterModeRisingEdge : IfxGtm_Tim_ChannelControl
  • filterDepth : IfxAsclin_Lin_BitSamplingControl
  • filteredCycleNumber : IfxEray_Eray_MessageRAMConfig
  • filterMode : IfxIom_Iom_FpcConfig
  • filterModeFallingEdge : IfxGtm_Tim_ChannelControl
  • filterModeRisingEdge : IfxGtm_Tim_ChannelControl
  • fir0Enabled : IfxEdsadc_Edsadc_FirFilterConfig
  • fir1DecimateRate : IfxEdsadc_Edsadc_FirFilterConfig
  • fir1Enabled : IfxEdsadc_Edsadc_FirFilterConfig
  • firFilter : IfxEdsadc_Edsadc_ChannelConfig
  • firstDynamicBuffer : IfxEray_Eray_MessageRAMConfig
  • firstWrite : IfxQspi_SpiMaster_Channel_s
  • fixedBurstEnabled : IfxGeth_Eth_DmaConfig
  • FL_TPL : IfxGeth_TxDescr3_RF_Bits
  • flags : IfxAsclin_Asc_ErrorFlagsUnion , IfxAsclin_Lin_FrameDataControl , SpiIf_Ch_
  • flashFconWaitStateConfig : IfxScuCcu_Config
  • flushQueueAfterInit : IfxEvadc_Adc_QueueConfig
  • flushTx : IfxStdIf_DPipe_
  • forwardErrorPacket : IfxGeth_Eth_RxQueueConfig
  • forwardUndersizedGoodPacket : IfxGeth_Eth_RxQueueConfig
  • fracDiv : IfxPsi5_Psi5_Config , IfxPsi5s_Psi5s_Config
  • fractionalDividerEnabled : IfxPsi5s_Psi5s_AscConfig
  • fractionalRefVoltage : IfxEdsadc_Edsadc_CommonModeVoltageConfig
  • frame : IfxAsclin_Asc_Config , IfxAsclin_Lin_Config , IfxAsclin_Spi_Config , IfxCan_Can_NodeConfig , IfxPsi5_Psi5_Frame
  • frameCheckMode : IfxSent_Sent_ReceiveControl
  • frameError : IfxAsclin_Asc_ErrorFlags , IfxAsclin_Lin_ErrorFlags , IfxAsclin_Spi_ErrorFlags
  • frameExpectation : IfxPsi5_Psi5_ReceiveControl
  • frameId : IfxEray_Header , IfxEray_ReceivedHeader , IfxPsi5s_Psi5s_ReceivedBits
  • frameIdFilter : IfxEray_Eray_MessageRAMConfig
  • frameIdSelect : IfxPsi5s_Psi5s_ReceiveControl
  • frameLength : IfxSent_Sent_ReceiveControl
  • frameMode : IfxAsclin_Asc_FrameControl , IfxAsclin_Lin_Config , IfxAsclin_Spi_Config , IfxCan_Can_Node , IfxCan_Message
  • frameTimestampSelect : IfxPsi5_Psi5_ReceiveControl
  • framingCheckEnabled : IfxPsi5s_Psi5s_AscConfig
  • framingErrorConsideredForRSI : IfxPsi5s_Psi5s_GlobalControlConfig
  • freq : IfxScuLbist_ParameterSet
  • frequency : Icu_Config , Icu_s , IfxCcu6_Icu_Config , IfxEdsadc_Edsadc_CarrierGenConfig , IfxPsi5_Psi5_Clock , IfxPsi5s_Psi5s_Clock , IfxStdIf_Timer_Config , TPwm_Config , TPwm_s
  • frequencyDriftCheckEnabled : IfxSent_Sent_ReceiveControl
  • frequencyDriftErrorInterrupt : IfxSent_Sent_Enable
  • frequencyRangeErrorInterrupt : IfxSent_Sent_Enable
  • fsp : IfxSmu_Smu_Config
  • fspConfigRegister : IfxSmu_Smu_Config
  • functions : SpiIf_
  • FUPD_CTRL : IfxGtm_Tom_TGC


iLLD_TC38A: Data Fields - Variables

- g -

  • gain : Ifx_LowPassPt1F32_Config , Ifx_LutIndexedLinearF32_Item , Ifx_LutLinearF32_Item
  • gainCalibrationConfig : IfxEdsadc_Edsadc_ChannelConfig
  • gainFactor : IfxEdsadc_Edsadc_ChannelConfig , IfxEdsadc_Edsadc_GainCalibrationConfig
  • gateOperatingMode : IfxEvadc_Adc_FastCompareChannelConfig
  • gatingMode : IfxEvadc_Adc_GatingTriggerConfig
  • gatingSource : IfxEvadc_Adc_GatingTriggerConfig
  • getAbsolutePosition : IfxStdIf_Pos_
  • getDeadtime : IfxStdIf_PwmHl_
  • getDeadtimeTick : IfxStdIf_PwmHl_
  • getDirection : IfxStdIf_Pos_
  • getFault : IfxStdIf_Pos_
  • getFrequency : IfxStdIf_Timer_
  • gethEnabled : IfxPmsPm_SleepConfig
  • gethSFR : IfxGeth_Eth , IfxGeth_Eth_Config
  • getInputFrequency : IfxStdIf_Timer_
  • getMinPulse : IfxStdIf_PwmHl_
  • getMode : IfxStdIf_PwmHl_
  • getOffset : IfxStdIf_Pos_
  • getPeriod : IfxStdIf_Timer_
  • getPeriodPerRotation : IfxStdIf_Pos_
  • getPosition : IfxStdIf_Pos_
  • getRawPosition : IfxStdIf_Pos_
  • getReadCount : IfxStdIf_DPipe_
  • getReadEvent : IfxStdIf_DPipe_
  • getRefreshPeriod : IfxStdIf_Pos_
  • getResolution : IfxStdIf_Pos_ , IfxStdIf_Timer_
  • getSendCount : IfxStdIf_DPipe_
  • getSensorType : IfxStdIf_Pos_
  • getSpeed : IfxStdIf_Pos_
  • getStatus : SpiIf_funcs
  • getTimeStamp : Icu_Functions
  • getTrigger : IfxStdIf_Timer_
  • getTurn : IfxStdIf_Pos_
  • getTxTimeStamp : IfxStdIf_DPipe_
  • getWriteCount : IfxStdIf_DPipe_
  • getWriteEvent : IfxStdIf_DPipe_
  • GLB_CTRL : IfxGtm_Tom_TGC
  • glitch : IfxGtm_Tim_In
  • glitchFallingCleared : IfxSent_Sent_InputOutputControl
  • glitchRisingCleared : IfxSent_Sent_InputOutputControl
  • globalControlConfig : IfxPsi5s_Psi5s_Config
  • globalEndInitInputFrequency : IfxScuWdt_Config
  • globalEventSelection : IfxIom_Iom_EcmConfig
  • globalInputClass : IfxEvadc_Adc_Config
  • globalResultUsage : IfxEvadc_Adc_ChannelConfig
  • GP : IfxGeth_RxDescr3_WF_Bits
  • gpr0Sel : IfxGtm_Tim_ChannelControl
  • gpr1Sel : IfxGtm_Tim_ChannelControl
  • gpt12Enabled : IfxPmsPm_SleepConfig
  • grefClk : IfxGeth_Eth_RgmiiPins
  • group : IfxEvadc_Adc_Channel , IfxEvadc_Adc_ChannelConfig , IfxEvadc_Adc_Group
  • groupId : IfxEvadc_Adc_EmuxControl , IfxEvadc_Adc_Group , IfxEvadc_Adc_GroupConfig , IfxEvadc_GxBfl_Out , IfxEvadc_Vadcg_In
  • groupIndex0 : IfxSmu_Smu_RecoveryTimerAlarmConfiguration
  • groupIndex1 : IfxSmu_Smu_RecoveryTimerAlarmConfiguration
  • groupIndex2 : IfxSmu_Smu_RecoveryTimerAlarmConfiguration
  • groupIndex3 : IfxSmu_Smu_RecoveryTimerAlarmConfiguration
  • gtm : IfxGtm_Atom_Pwm_Config , IfxGtm_Atom_Pwm_Driver , IfxGtm_Atom_Timer , IfxGtm_Atom_Timer_Config , IfxGtm_Tim_In_Config , IfxGtm_Tim_Timer , IfxGtm_Tom_Pwm_Config , IfxGtm_Tom_Pwm_Driver , IfxGtm_Tom_Timer , IfxGtm_Tom_Timer_Config
  • gtmEnabled : IfxPmsPm_SleepConfig
  • gtu01Config : IfxEray_Eray_GTUConfig
  • gtu02Config : IfxEray_Eray_GTUConfig
  • gtu03Config : IfxEray_Eray_GTUConfig
  • gtu04Config : IfxEray_Eray_GTUConfig
  • gtu05Config : IfxEray_Eray_GTUConfig
  • gtu06Config : IfxEray_Eray_GTUConfig
  • gtu07Config : IfxEray_Eray_GTUConfig
  • gtu08Config : IfxEray_Eray_GTUConfig
  • gtu09Config : IfxEray_Eray_GTUConfig
  • gtu10Config : IfxEray_Eray_GTUConfig
  • gtu11Config : IfxEray_Eray_GTUConfig
  • gtuConfig : IfxEray_Eray_ControllerConfig


iLLD_TC38A: Data Fields - Variables

- h -

  • halfSupplyVoltge : IfxEdsadc_Edsadc_CommonModeVoltageConfig
  • halfTs : Ifx_AngleTrkF32
  • hallPatternIndex : IfxCcu6_PwmBc , IfxCcu6_PwmBc_Config
  • hallSyncEvent : IfxCcu6_PwmBc_Config
  • hardwareRequestEnabled : IfxDma_Dma_ChannelConfig
  • header : IfxEray_Eray_BufferReconfig , IfxEray_Eray_MessageRAMConfig , IfxEray_Eray_ReceivedFrame
  • headerCrc : IfxEray_ReceivedHeader
  • headerErrorConsideredForRSI : IfxPsi5s_Psi5s_GlobalControlConfig
  • headerErrorFlag : IfxPsi5s_Psi5s_ReceivedBits
  • headerID : IfxAsclin_Lin_FrameDataControl
  • headerOnly : IfxAsclin_Lin_DataControl
  • headerReceived : IfxEray_Eray_ReceiveControl
  • headerTimeout : IfxAsclin_Lin_ErrorFlags , IfxAsclin_Lin_LinControl
  • headerTransfered : IfxEray_Eray_TransmitControl , IfxEray_SlotConfig
  • help : Ifx_Shell_Command
  • HF : IfxGeth_RxDescr2_WF_Bits
  • highAddress : IfxMtu_MbistSshConfig
  • highPhaseOfShiftClock : IfxMsc_Msc_Abra
  • highPriorityMessageEnabled : IfxCan_Can_InterruptConfig
  • highSpeedMode : IfxHssl_Hsct_Config
  • highWord : IfxPsi5_Psi5_Rdm
  • historyAdd : Ifx_Shell_CmdLine
  • historyItem : Ifx_Shell_CmdLine
  • HL : IfxGeth_RxDescr2_WF_Bits
  • hours : Ifx_DateTime
  • hpe : IfxCan_Can_InterruptConfig
  • hsct : IfxHssl_Hsct , IfxHssl_Hsct_Config , IfxHssl_Hssl_Channel , IfxHssl_Hssl_ChannelConfig
  • hssl : IfxHssl_Hssl , IfxHssl_Hssl_Channel , IfxHssl_Hssl_ChannelConfig , IfxHssl_Hssl_Config


iLLD_TC38A: Data Fields - Variables

- i -

  • i2c : IfxI2c_I2c , IfxI2c_I2c_Config , IfxI2c_I2c_Device , IfxI2c_I2c_deviceConfig
  • i2cEnabled : IfxPmsPm_SleepConfig
  • ibusyIsrProvider : IfxEray_Eray_Interrupt
  • ibusyPriority : IfxEray_Eray_Interrupt
  • id1 : IfxCan_Filter
  • id2 : IfxCan_Filter
  • idleDelay : IfxAsclin_Asc_FrameControl , IfxAsclin_Lin_FrameControl , IfxAsclin_Spi_FrameControl
  • idleDynamicSlots : IfxEray_Eray_Gtu09Config
  • idlePrechargeLevel : IfxEvadc_Adc_GroupConfig
  • idleTime : IfxPsi5s_Psi5s_GlobalControlConfig
  • igcs0 : IfxSmu_Smu_AlarmGlobalConfiguration
  • igcs1 : IfxSmu_Smu_AlarmGlobalConfiguration
  • igcs2 : IfxSmu_Smu_AlarmGlobalConfiguration
  • ignoreSignalLevel : IfxGtm_Tim_ChannelControl
  • IHE : IfxGeth_TxDescr3_WF_Bits
  • ik : Ifx_ClpxFloat32_Integral , Ifx_IntegralF32 , Ifx_RampF32
  • imag : cfloat32 , cfract , csfract , csint16 , csint32
  • immediateStartEnabled : IfxGtm_Atom_Pwm_Config , IfxGtm_Tom_Pwm_Config
  • in : IfxPsi5_Psi5_PinsConfig , IfxSent_Sent_Pins
  • index : Ifx_CircularBuffer , IfxModule_IndexMap
  • inhibitingAutomaticTransferEnabled : IfxPsi5_Psi5_TransmitControl
  • initPins : IfxGpt12_IncrEnc_Config , IfxGtm_Atom_Dtm_PwmHl_Config , IfxGtm_Atom_PwmHl_Config , IfxGtm_Atom_Timer_Config , IfxGtm_Tom_Dtm_PwmHl_Config , IfxGtm_Tom_PwmHl_Config , IfxGtm_Tom_Timer_Config
  • inj0 : IfxMsc_Msc_Io
  • inj1 : IfxMsc_Msc_Io
  • injectionPositionPin0 : IfxMsc_Msc_DownstreamControlConfig
  • injectionPositionPin1 : IfxMsc_Msc_DownstreamControlConfig
  • inMode : IfxPsi5_Psi5_PinsConfig , IfxSent_Sent_Pins
  • input : IfxGtm_Tim_In_ConfigFilter , IfxIom_Driver_LamMonConfig , IfxIom_Driver_LamRefConfig , IfxIom_Iom_EcmConfigCounter , IfxQspi_SpiMaster_InputOutput
  • inputbuffer : Ifx_Shell_Runtime
  • inputBufferEnabled : IfxEvadc_Adc_GroupConfig
  • inputClass : IfxEvadc_Adc_ChannelConfig , IfxEvadc_Adc_GroupConfig
  • inputClasses : IfxEvadc_Adc_GroupConfig
  • inputDataSource : IfxEdsadc_Edsadc_DemodulatorConfig
  • inputFrequency : IfxScuWdt_Config
  • inputGain : IfxEdsadc_Edsadc_ModulatorConfig , IfxEdsadc_ModulatorConfig
  • inputInverterEnabled : IfxPsi5_Psi5_InputOutputControl
  • inputMode : IfxCcu6_PwmBc_Pins
  • inputMuxActionControl : IfxEdsadc_Edsadc_ModulatorConfig , IfxEdsadc_ModulatorConfig
  • inputOutput : IfxAsclin_Spi_Config
  • inputOutputControl : IfxPsi5_Psi5_ChannelConfig , IfxSent_Sent_ChannelConfig
  • inputPin : IfxEdsadc_Edsadc_ModulatorConfig , IfxEdsadc_ModulatorConfig , IfxGtm_Tim_In_ConfigFilter
  • inputPinMode : IfxGtm_Tim_In_ConfigFilter
  • inputPulsePolarityHigh : IfxSent_Sent_InputOutputControl
  • inputSourceSelect : IfxGtm_Tim_Timer_Config
  • inSelect : IfxGeth_Mdio_InOut , IfxI2c_Scl_InOut , IfxI2c_Sda_InOut
  • instruction : IfxCpu_Perf
  • instructionErrors : IfxCpu_Trap_Id
  • int0IsrProvider : IfxEray_Eray_Interrupt
  • int0Priority : IfxEray_Eray_Interrupt
  • int1IsrProvider : IfxEray_Eray_Interrupt
  • int1Priority : IfxEray_Eray_Interrupt
  • INT_TRIG : IfxGtm_Tom_TGC
  • integrationCount : IfxEdsadc_Edsadc_IntegratorConfig
  • integrationCycles : IfxEdsadc_Edsadc_IntegratorConfig
  • integrationTrigger : IfxEdsadc_Edsadc_DemodulatorConfig
  • integrator : IfxEdsadc_Edsadc_ChannelConfig
  • integratorResetEnabled : IfxEdsadc_Edsadc_ModulatorConfig , IfxEdsadc_ModulatorConfig
  • interfaceMode : IfxHssl_Hsct_Config
  • internalProtection : IfxCpu_Trap_Id
  • interrupt : IfxAsclin_Asc_Config , IfxAsclin_Lin_Config , IfxAsclin_Spi_Config , IfxEray_Eray_Config , IfxGeth_Eth_MtlConfig , IfxGtm_Atom_Pwm_Config , IfxGtm_Tom_Pwm_Config , IfxSent_Sent_ChannelConfig
  • interrupt1 : IfxCcu6_Icu_ChannelConfig , IfxCcu6_PwmBc_Config , IfxCcu6_Timer_Config , IfxCcu6_TPwm_Config
  • interrupt2 : IfxCcu6_Icu_ChannelConfig , IfxCcu6_PwmBc_Config , IfxCcu6_Timer_Config , IfxCcu6_TPwm_Config
  • interrupt3 : IfxCcu6_Icu_ChannelConfig , IfxCcu6_PwmBc_Config , IfxCcu6_Timer_Config , IfxCcu6_TPwm_Config
  • interrupt4 : IfxCcu6_Icu_ChannelConfig , IfxCcu6_PwmBc_Config , IfxCcu6_Timer_Config , IfxCcu6_TPwm_Config
  • interruptAfterLastEnabled : IfxQspi_SpiMaster_MoveCounterControl
  • interruptBeforeLastEnabled : IfxQspi_SpiMaster_MoveCounterControl
  • interruptConfig : IfxCan_Can_NodeConfig , IfxMsc_Msc_Config
  • interruptLine : IfxCan_GroupInterruptConfig
  • interruptRaiseThreshold : IfxDma_Dma_ChannelConfig
  • interuptNodeControl : IfxSent_Sent_ChannelConfig
  • inverted : IfxCcu6_PwmHl_Base , IfxCcu6_PwmHl_Mode , IfxEdsadc_Edsadc_CarrierGenConfig , IfxGtm_Atom_Dtm_PwmHl_Base , IfxGtm_Atom_Dtm_PwmHl_Mode , IfxGtm_Atom_PwmHl_Base , IfxGtm_Atom_PwmHl_Mode , IfxGtm_Tom_Dtm_PwmHl_Base , IfxGtm_Tom_Dtm_PwmHl_Mode , IfxGtm_Tom_PwmHl_Base , IfxGtm_Tom_PwmHl_Mode , IfxIom_Driver_LamEventWindowConfig , IfxIom_Driver_LamMonConfig , IfxIom_Driver_LamRefConfig
  • inWidth : IfxAsclin_Asc_FifoControl , IfxAsclin_Lin_FifoControl , IfxAsclin_Spi_FifoControl
  • io : Ifx_Shell , IfxMsc_Msc_Config
  • IOC : IfxGeth_RxDescr3_RF_Bits , IfxGeth_TxDescr2_RF_Bits
  • iom : IfxIom_Iom
  • iomDriver : IfxIom_Driver_Lam , IfxIom_Driver_LamConfig
  • IP4 : IfxGeth_RxDescr1_WF_Bits
  • IP6 : IfxGeth_RxDescr1_WF_Bits
  • IPCB : IfxGeth_RxDescr1_WF_Bits
  • IPCE : IfxGeth_RxDescr1_WF_Bits
  • IPHE : IfxGeth_RxDescr1_WF_Bits
  • irqEnable : IfxGtm_Tim_Timer_Config
  • irqMode : IfxGtm_Tim_In_Config , IfxGtm_Tim_Timer_Config
  • irqModeTimer : IfxGtm_Atom_Timer_Config , IfxGtm_Tom_Timer_Config
  • irqModeTrigger : IfxGtm_Atom_Timer_Config , IfxGtm_Tom_Timer_Config
  • irqOnCntOverflow : IfxGtm_Tim_In_ConfigCapture
  • irqOnDatalost : IfxGtm_Tim_In_ConfigCapture
  • irqOnEcntOverflow : IfxGtm_Tim_In_ConfigCapture
  • irqOnGlitch : IfxGtm_Tim_In_ConfigFilter
  • irqOnNewVal : IfxGtm_Tim_In_ConfigCapture
  • irqOnTimeout : IfxGtm_Tim_In_ConfigTimeout
  • irqType : IfxGtm_Tim_Timer_Config
  • isInterruptMode : IfxAsclin_Lin , IfxAsclin_Lin_Config
  • isrPriority : IfxDts_Dts_Config , IfxFce_Crc_Config , IfxGtm_Atom_Pwm_Interrupt , IfxGtm_Tim_In_Config , IfxGtm_Tom_Pwm_Interrupt , IfxStdIf_Timer_Config , IfxStdIf_Timer_TrigConfig
  • isrProvider : IfxGtm_Atom_Pwm_Interrupt , IfxGtm_Tim_In_Config , IfxGtm_Tom_Pwm_Interrupt , IfxSent_Sent_Interrupt , IfxStdIf_Timer_Config , IfxStdIf_Timer_TrigConfig , SpiIf_Config
  • isrTypeOfService : IfxDts_Dts_Config , IfxFce_Crc_Config
  • itr : IfxEdsadc_Edsadc_ChannelPins
  • itrMode : IfxEdsadc_Edsadc_ChannelPins
  • ITS : IfxGeth_RxDescr2_WF_Bits
  • IVLTV : IfxGeth_TxContextDescr3_Bits
  • IVT : IfxGeth_RxDescr0_WF_Bits , IfxGeth_TxContextDescr2_Bits
  • IVTIR : IfxGeth_TxContextDescr3_Bits


iLLD_TC38A: Data Fields - Variables

- j -

  • JT : IfxGeth_TxDescr3_WF_Bits


iLLD_TC38A: Data Fields - Variables

- k -

  • k2Divider : IfxScuCcu_PerPllConfig , IfxScuCcu_SysPllConfig
  • k2Step : IfxScuCcu_PllStepConfig
  • k3Divider : IfxScuCcu_PerPllConfig
  • k3DividerBypass : IfxScuCcu_PerPllConfig
  • kd : Ifx_AngleTrkF32_CfgData , Ifx_AngleTrkF32_Config
  • ki : Ifx_AngleTrkF32_CfgData , Ifx_AngleTrkF32_Config
  • kp : Ifx_AngleTrkF32_CfgData , Ifx_AngleTrkF32_Config


iLLD_TC38A: Data Fields - Variables

- l -

  • L3FM : IfxGeth_RxDescr2_WF_Bits
  • L3L4FM : IfxGeth_RxDescr2_WF_Bits
  • L4FM : IfxGeth_RxDescr2_WF_Bits
  • lamId : IfxIom_Iom_LamConfig
  • lamMode : IfxIom_Iom_LamConfig
  • lamMonitorInputChannel : IfxIom_Iom_LamConfig
  • lamMonitorSource : IfxIom_Iom_LamConfig
  • lamReferenceInputChannel : IfxIom_Iom_LamConfig
  • lamUsedMask : IfxIom_Driver
  • lastTrailingDelay : IfxQspi_SpiMaster_MoveCounterControl
  • latestTransmissionStart : IfxEray_Eray_ControllerConfig
  • LC : IfxGeth_TxDescr3_WF_Bits
  • LD : IfxGeth_RxDescr3_WF_Bits , IfxGeth_TxDescr3_RF_Bits , IfxGeth_TxDescr3_WF_Bits
  • leadDelay : IfxAsclin_Lin_FrameControl , IfxAsclin_Spi_FrameControl
  • length : Ifx_CircularBuffer , Ifx_Shell_CmdLine
  • lengthError : IfxFce_Crc_EnabledInterrupts
  • limitCheck : IfxEvadc_Adc_ChannelConfig
  • lin : IfxAsclin_Lin_Config
  • linAutobaudDetectionError : IfxAsclin_Lin_ErrorFlags
  • linChecksumError : IfxAsclin_Lin_ErrorFlags
  • lineSpeed : IfxGeth_Eth_MacConfig
  • linFrameData : IfxAsclin_Lin
  • linMode : IfxAsclin_Lin , IfxAsclin_Lin_Config
  • linParityError : IfxAsclin_Lin_ErrorFlags
  • listenTimeOut : IfxEray_Eray_Succ2Config
  • listenTimeOutNoise : IfxEray_Eray_Succ2Config
  • LOC : IfxGeth_TxDescr3_WF_Bits
  • locals : Ifx_Shell
  • loi : IfxCan_Can_InterruptConfig
  • loopBack : IfxAsclin_Asc_Config , IfxAsclin_Spi_InputOutputControl , IfxHssl_Hsct , IfxHssl_Hsct_Config , IfxHssl_Hssl , IfxHssl_Hssl_Channel , IfxHssl_Hssl_ChannelConfig
  • loopback : SpiIf_ChMode
  • loopbackEnabled : IfxPsi5s_Psi5s_AscConfig
  • loopbackMode : IfxGeth_Eth_MacConfig
  • lowAddress : IfxMtu_MbistSshConfig
  • lowerBoundary : IfxEvadc_Adc_ChannelConfig
  • lowerLimit : IfxAsclin_Lin_BaudrateDetection
  • lowerTemperatureLimit : IfxDts_Dts_Config
  • lowPhaseOfShiftClock : IfxMsc_Msc_Abra
  • lowWord : IfxPsi5_Psi5_Rdm
  • LT : IfxGeth_RxDescr3_WF_Bits
  • lvdsMode : IfxPort_LvdsConfig


iLLD_TC38A: Data Fields - Variables

- m -

  • mac : IfxGeth_Eth_Config
  • macAddress : IfxGeth_Eth_MacConfig
  • macroticksPerCycle : IfxEray_Eray_Gtu02Config
  • MADRM : IfxGeth_RxDescr2_WF_Bits
  • mask : Ifx_InternalMux_MuxConfig , IfxPmsEvr_StepDownRegulatorRegConfig , IfxScuCcu_CcuconRegConfig , IfxScuCcu_FlashWaitstateConfig
  • masks : IfxPort_Esr_Masks
  • master : IfxEvadc_Adc_GroupConfig
  • masterCpu : IfxPmsPm_SleepConfig , IfxPmsPm_StandbyConfig
  • maxBurstLength : IfxGeth_Eth_RxChannelConfig , IfxGeth_Eth_TxChannelConfig
  • maxColdStartAttempts : IfxEray_Eray_Succ1Config
  • maxcount : Ifx_Fifo_Shared
  • maxDriftOffset : IfxEray_Eray_Gtu06Config
  • maximumBaudrate : IfxQspi_SpiMaster , SpiIf_Config
  • maxOffsetCorrection : IfxEray_Eray_Gtu10Config
  • maxPacketSize : IfxGeth_Eth_MacConfig
  • maxPulse : IfxCcu6_PwmHl_Base , IfxGtm_Atom_Dtm_PwmHl_Base , IfxGtm_Atom_PwmHl_Base , IfxGtm_Tom_Dtm_PwmHl_Base , IfxGtm_Tom_PwmHl_Base
  • maxRateCorrection : IfxEray_Eray_Gtu10Config
  • maxSpeed : IfxGpt12_IncrEnc , IfxStdIf_Pos_Config
  • maxSyncFrames : IfxEray_Eray_Gtu02Config
  • mbsc0IsrProvider : IfxEray_Eray_Interrupt
  • mbsc0Priority : IfxEray_Eray_Interrupt
  • mbsc1IsrProvider : IfxEray_Eray_Interrupt
  • mbsc1Priority : IfxEray_Eray_Interrupt
  • mcanClockSource : IfxPmsPm_SleepConfig
  • mcanEnabled : IfxPmsPm_SleepConfig
  • mcontrol : IfxMtu_MbistConfig
  • mdc : IfxGeth_Eth_MiiPins , IfxGeth_Eth_RgmiiPins , IfxGeth_Eth_RmiiPins
  • mdio : IfxGeth_Eth_MiiPins , IfxGeth_Eth_RgmiiPins , IfxGeth_Eth_RmiiPins
  • measured : IfxAsclin_Lin_BaudrateDetection
  • medianFilter : IfxAsclin_Asc_BitTimingControl , IfxAsclin_Lin_BitSamplingControl , IfxAsclin_Spi_BitSamplingControl
  • memoryAccessViolation : IfxHssl_Hssl_errorFlags
  • memoryManagement : IfxCpu_Trap_Id
  • message : IfxPsi5_Psi5_SerialMessage
  • messageId : IfxCan_Message , IfxPsi5_Psi5_Message , IfxSent_Sent_SerialMessageFrame
  • messageIdLength : IfxCan_Can_FilterConfig , IfxCan_Message
  • messageRAM : IfxCan_Can_Node , IfxCan_Can_NodeConfig
  • messageRAMAccessFailureEnabled : IfxCan_Can_InterruptConfig
  • messageRAMConfig : IfxEray_Eray_NodeConfig
  • messageStoredToDedicatedRxBufferEnabled : IfxCan_Can_InterruptConfig
  • messagingBitsError : IfxPsi5_Psi5_FrameData
  • messagingBitsPresence : IfxPsi5_Psi5_ReceiveControl
  • microticksPerCycle : IfxEray_Eray_Gtu01Config
  • miiPins : IfxGeth_Eth_PinConfig
  • minDelayBeforeWakeUp : IfxPmsPm_StandbyConfig
  • minPulse : IfxCcu6_PwmHl_Base , IfxGtm_Atom_Dtm_PwmHl_Base , IfxGtm_Atom_PwmHl_Base , IfxGtm_Tom_Dtm_PwmHl_Base , IfxGtm_Tom_PwmHl_Base , IfxStdIf_PwmHl_Config
  • minResolution : IfxStdIf_Timer_Config
  • minSpeed : IfxGpt12_IncrEnc , IfxStdIf_Pos_Config
  • minutes : Ifx_DateTime
  • mixedBurstEnabled : IfxGeth_Eth_DmaConfig
  • Mod_Amp : IfxScuCcu_Mod_Config
  • Mod_Enable : IfxScuCcu_Mod_Config
  • mode : IfxCan_Can_Frame , IfxCcu6_PwmHl_Base , IfxCcu6_PwmHl_Mode , IfxEvadc_Adc_EmuxControl , IfxGtm_Atom_Dtm_PwmHl_Base , IfxGtm_Atom_Dtm_PwmHl_Mode , IfxGtm_Atom_Pwm_Config , IfxGtm_Atom_Pwm_Driver , IfxGtm_Atom_Pwm_Interrupt , IfxGtm_Atom_PwmHl_Base , IfxGtm_Atom_PwmHl_Mode , IfxGtm_Tim_ChannelControl , IfxGtm_Tim_In_ConfigCapture , IfxGtm_Tim_InputSourceSelect , IfxGtm_Tom_Dtm_PwmHl_Base , IfxGtm_Tom_Dtm_PwmHl_Mode , IfxGtm_Tom_Pwm_Interrupt , IfxGtm_Tom_PwmHl_Base , IfxGtm_Tom_PwmHl_Mode , IfxI2c_I2c_Config , IfxIom_Driver_LamFilterConfig , IfxMsc_Msc_en , IfxMsc_Msc_fcln , IfxMsc_Msc_fclp , IfxMsc_Msc_inj0 , IfxMsc_Msc_inj1 , IfxMsc_Msc_sdi , IfxMsc_Msc_son , IfxMsc_Msc_sop , IfxPmsPm_WakeupConfig , IfxPort_Io_ConfigPin , IfxPort_Pin_Config , IfxPsi5_Psi5_Clock , IfxPsi5s_Psi5s_Clock , IfxQspi_SpiMaster_Channel_s , IfxQspi_SpiMaster_ChannelConfig , IfxQspi_SpiMaster_Input , IfxQspi_SpiMaster_Output , IfxSmu_Smu_FaultSignalingProtocol , SpiIf_ChConfig_ , SpiIf_Config
  • modulationConfig : IfxScuCcu_Config
  • modulator : IfxEdsadc_Edsadc_ChannelConfig
  • modulatorClockFreq : IfxEdsadc_Edsadc_ModulatorConfig
  • modulatorClockMode : IfxEdsadc_Edsadc_Config
  • modulatorClockPeriod : IfxEdsadc_ModulatorConfig
  • module : IfxAsclin_Cts_In , IfxAsclin_Rts_Out , IfxAsclin_Rx_In , IfxAsclin_Sclk_Out , IfxAsclin_Slso_Out , IfxAsclin_Tx_Out , IfxCan_Rxd_In , IfxCan_Txd_Out , IfxCcu6_Cc60_Out , IfxCcu6_Cc60in_In , IfxCcu6_Cc61_Out , IfxCcu6_Cc61in_In , IfxCcu6_Cc62_Out , IfxCcu6_Cc62in_In , IfxCcu6_Ccpos0_In , IfxCcu6_Ccpos1_In , IfxCcu6_Ccpos2_In , IfxCcu6_Cout60_Out , IfxCcu6_Cout61_Out , IfxCcu6_Cout62_Out , IfxCcu6_Cout63_Out , IfxCcu6_Ctrap_In , IfxCcu6_T12hr_In , IfxCcu6_T13hr_In , IfxDma_Dma_ChannelConfig , IfxDmu_Fdest_In , IfxEdsadc_Cgpwm_Out , IfxEdsadc_Cin_In , IfxEdsadc_Cout_Out , IfxEdsadc_Din_In , IfxEdsadc_Dscin_In , IfxEdsadc_Dscout_Out , IfxEdsadc_Dsdin_In , IfxEdsadc_Dsn_In , IfxEdsadc_Dsp_In , IfxEdsadc_Edsadc_Channel , IfxEdsadc_Edsadc_ChannelConfig , IfxEdsadc_Itr_In , IfxEdsadc_Sg_In , IfxEray_Eray_Config , IfxEray_Rxd_In , IfxEray_Txd_Out , IfxEray_Txen_Out , IfxEvadc_Adc_FastCompareChannel , IfxEvadc_Adc_FastCompareChannelConfig , IfxEvadc_Adc_Group , IfxEvadc_Adc_GroupConfig , IfxEvadc_Emux_Out , IfxEvadc_GxBfl_Out , IfxEvadc_Vadcg_In , IfxGeth_Col_In , IfxGeth_Crs_In , IfxGeth_Crsdv_In , IfxGeth_Grefclk_In , IfxGeth_Mdc_Out , IfxGeth_Mdio_InOut , IfxGeth_Pps_Out , IfxGeth_Refclk_In , IfxGeth_Rxclk_In , IfxGeth_Rxctl_In , IfxGeth_Rxd_In , IfxGeth_Rxdv_In , IfxGeth_Rxer_In , IfxGeth_Txclk_In , IfxGeth_Txclk_Out , IfxGeth_Txctl_Out , IfxGeth_Txd_Out , IfxGeth_Txen_Out , IfxGeth_Txer_Out , IfxGpt12_Capin_In , IfxGpt12_IncrEnc , IfxGpt12_IncrEnc_Config , IfxGpt12_TxEud_In , IfxGpt12_TxIn_In , IfxGpt12_TxOut_Out , IfxGtm_Clk_Out , IfxI2c_Scl_InOut , IfxI2c_Sda_InOut , IfxIom_Driver , IfxIom_Driver_Config , IfxModule_IndexMap , IfxMsc_En_Out , IfxMsc_Fcln_Out , IfxMsc_Fclp_Out , IfxMsc_Inj_In , IfxMsc_Sdi_In , IfxMsc_Son_Out , IfxMsc_Sop_Out , IfxPms_Dcdcsync_Out , IfxPms_Hwcfg_In , IfxPms_Wkp_In , IfxPsi5_Psi5_Channel , IfxPsi5_Psi5_ChannelConfig , IfxPsi5_Rx_In , IfxPsi5_Tx_Out , IfxPsi5s_Clk_Out , IfxPsi5s_Psi5s_Channel , IfxPsi5s_Psi5s_ChannelConfig , IfxPsi5s_Psi5s_Config , IfxPsi5s_Rx_In , IfxPsi5s_Tx_Out , IfxQspi_Hsicin_In , IfxQspi_Mrst_In , IfxQspi_Mrst_Out , IfxQspi_Mtsr_In , IfxQspi_Mtsr_Out , IfxQspi_Sclk_In , IfxQspi_Sclk_Out , IfxQspi_Slsi_In , IfxQspi_Slso_Out , IfxScu_Dcdcsync_Out , IfxScu_Emgstop_In , IfxScu_Evrwup_In , IfxScu_Extclk_Out , IfxScu_Req_In , IfxScu_Wdtlck_Out , IfxSent_Sent_Config , IfxSent_Sent_In , IfxSent_Spc_Out , IfxSmu_Fsp_Out
  • moer : IfxCan_Can_InterruptConfig
  • mon : IfxIom_Driver_LamConfig
  • monIndex : IfxIom_Driver_Lam
  • monInput : IfxIom_Driver_Lam
  • monitorSignal : IfxIom_Iom_FpcConfig
  • monitorSignalInverted : IfxIom_Iom_LamConfig
  • moveCounterControl : IfxQspi_SpiMaster_Channel_s
  • moveCounterEnabled : IfxQspi_SpiMaster_MoveCounterControl
  • moveSize : IfxDma_Dma_ChannelConfig
  • mrst : IfxQspi_SpiMaster_Pins , IfxQspi_SpiSlave_Pins
  • mrstMode : IfxQspi_SpiMaster_Pins , IfxQspi_SpiSlave_Pins
  • msc : IfxMsc_Msc , IfxMsc_Msc_Config
  • MSS : IfxGeth_TxContextDescr2_Bits
  • mtl : IfxGeth_Eth_Config
  • mtsr : IfxQspi_SpiMaster_Pins , IfxQspi_SpiSlave_Pins
  • mtsrMode : IfxQspi_SpiMaster_Pins , IfxQspi_SpiSlave_Pins
  • multiChannelControl : IfxCcu6_PwmBc_Config
  • multiInputCaptureEnabled : IfxCcu6_Icu_ChannelConfig
  • muxConfig : Ifx_InternalMux_Config


iLLD_TC38A: Data Fields - Variables

- n -

  • name : Ifx_GlobalResources_Item
  • NC : IfxGeth_TxDescr3_WF_Bits
  • ndat0IsrProvider : IfxEray_Eray_Interrupt
  • ndat0Priority : IfxEray_Eray_Interrupt
  • ndat1IsrProvider : IfxEray_Eray_Interrupt
  • ndat1Priority : IfxEray_Eray_Interrupt
  • nDivider : IfxScuCcu_PerPllConfig , IfxScuCcu_SysPllConfig
  • nDividerAbra : IfxMsc_Msc_Abra
  • nDividerDownstream : IfxMsc_Msc_CommandExtensionConfig , IfxMsc_Msc_DownstreamControlExtensionConfig
  • negativeInput : IfxEdsadc_Edsadc_CommonModeVoltageConfig , IfxEdsadc_Edsadc_ModulatorConfig , IfxEdsadc_ModulatorConfig
  • networkStartIdleTime : IfxEray_Eray_Gtu04Config
  • networkVectorLength : IfxEray_Eray_ControllerConfig
  • newData : IfxGtm_Tim_In
  • nibbleControl : IfxSent_Sent_ChannelConfig
  • nibblePointer0 : IfxSent_Sent_NibbleControl
  • nibblePointer1 : IfxSent_Sent_NibbleControl
  • nibblePointer2 : IfxSent_Sent_NibbleControl
  • nibblePointer3 : IfxSent_Sent_NibbleControl
  • nibblePointer4 : IfxSent_Sent_NibbleControl
  • nibblePointer5 : IfxSent_Sent_NibbleControl
  • nibblePointer6 : IfxSent_Sent_NibbleControl
  • nibblePointer7 : IfxSent_Sent_NibbleControl
  • nibblesValueOutOfRangeErrorInterrupt : IfxSent_Sent_Enable
  • nibblesWrongErrorInterrupt : IfxSent_Sent_Enable
  • node : IfxCan_Can_Node
  • nodeAPins : IfxEray_Eray_Pins
  • nodeBPins : IfxEray_Eray_Pins
  • nodeId : IfxCan_Can_NodeConfig , IfxCan_Rxd_In , IfxCan_Txd_Out , IfxEray_Rxd_In , IfxEray_Txd_Out , IfxEray_Txen_Out
  • noFrameReceivedError : IfxPsi5_Psi5_FrameData
  • noiseFilter : PwmHl_Config
  • nonMaskableInterrupt : IfxCpu_Trap_Id
  • notAcknowledgeError : IfxHssl_Hssl_errorFlags
  • nullFrameIndicator : IfxEray_ReceivedHeader
  • number : IfxCan_Filter
  • numberOfBitsError : IfxPsi5_Psi5_FrameData
  • numberOfCyclePairsForActive : IfxEray_Eray_Succ1Config
  • numberOfFramesExpected : IfxPsi5s_Psi5s_ReceiveControl
  • numberOfMessageBuffers : IfxEray_Eray_MessageRAMConfig
  • numBlocks : IfxMtu_SramItem
  • numerator : IfxAsclin_Lin_BaudrateGeneration
  • numOfConfigPatterns : IfxMtu_MbistConfig
  • numOfConfigSets : IfxScuLbist_MultiTriggerConfig
  • numOfPhases : IfxPmsEvr_initSequence
  • numOfRegisters : IfxPmsEvr_checkRegConfig , IfxPmsEvr_initSequencePhase
  • numOfRxChannels : IfxGeth_Eth , IfxGeth_Eth_DmaConfig
  • numOfRxQueues : IfxGeth_Eth_MtlConfig
  • numOfSshConfigurations : IfxMtu_MbistConfig
  • numOfSteps : IfxScuCcu_PllThrottleConfig
  • numOfTxChannels : IfxGeth_Eth , IfxGeth_Eth_DmaConfig
  • numOfTxQueues : IfxGeth_Eth_MtlConfig


iLLD_TC38A: Data Fields - Variables

- o -

  • object : Ifx_Shell_Protocol
  • obusyIsrProvider : IfxEray_Eray_Interrupt
  • obusyPriority : IfxEray_Eray_Interrupt
  • OE : IfxGeth_RxDescr3_WF_Bits
  • offset : Ifx_AngleTrkF32_Config , Ifx_AngleTrkF32_PosIf , Ifx_LutIndexedLinearF32_Item , Ifx_LutLinearF32_Item , IfxGpt12_IncrEnc , IfxGtm_Atom_Timer , IfxGtm_Tom_Timer , IfxStdIf_Pos_Config
  • offsetCompensation : IfxEdsadc_Edsadc_FirFilterConfig
  • onError : IfxStdIf_DPipe_ , SpiIf_funcs
  • oneShotModeEnabled : IfxGtm_Atom_Pwm_Config , IfxGtm_Tom_Pwm_Config
  • onEventA : IfxStdIf_Pos_
  • onExchangeEnd : SpiIf_Ch_
  • onReceive : IfxStdIf_DPipe_
  • onRx : SpiIf_funcs
  • onStart : Ifx_Shell_Protocol
  • onStartData : Ifx_Shell_Protocol
  • onTransfer : IfxQspi_SpiSlave , SpiIf_Flags
  • onTransmit : IfxStdIf_DPipe_
  • onTx : SpiIf_funcs
  • onZeroIrq : IfxStdIf_Pos_
  • OPC : IfxGeth_RxDescr1_WF_Bits
  • operationMode : IfxDma_Dma_ChannelConfig
  • order : Ifc_Crc_Table
  • OSTC : IfxGeth_TxContextDescr3_Bits
  • OTS : IfxGeth_RxDescr2_WF_Bits
  • out : Ifx_LowPassPt1F32 , IfxPsi5_Psi5_PinsConfig , IfxSent_Sent_Pins
  • OUTEN_CTRL : IfxGtm_Tom_TGC
  • OUTEN_STAT : IfxGtm_Tom_TGC
  • outMode : IfxPsi5_Psi5_PinsConfig , IfxSent_Sent_Pins
  • output : IfxQspi_SpiMaster_InputOutput
  • outputControlConfig : IfxMsc_Msc_Config
  • outputDriver : IfxStdIf_PwmHl_Config , IfxStdIf_Timer_TrigConfig
  • outputEnabled : IfxStdIf_Timer_TrigConfig
  • outputInverterEnabled : IfxPsi5_Psi5_InputOutputControl
  • outputLine : IfxCcu6_PwmBc_TriggerConfig , IfxCcu6_TPwm_TriggerConfig
  • outputMode : IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins , IfxEvadc_Adc_EmuxPinConfig , IfxGtm_Atom_Pwm_pin , IfxGtm_Tom_Pwm_pin , IfxStdIf_PwmHl_Config , IfxStdIf_Timer_TrigConfig
  • outputPin : IfxGtm_Atom_Pwm_pin , IfxGtm_Tom_Pwm_pin
  • outputPulsePolarityHigh : IfxSent_Sent_InputOutputControl
  • Outputs : IfxGtm_Spe_OutputPattern
  • outputTrigger : IfxCcu6_PwmBc_TriggerConfig , IfxCcu6_TPwm_TriggerConfig
  • outputTriggerEnabled : IfxCcu6_PwmBc_TriggerConfig , IfxCcu6_TPwm_TriggerConfig
  • outSelect : IfxGeth_Mdio_InOut , IfxI2c_Scl_InOut , IfxI2c_Sda_InOut
  • outWidth : IfxAsclin_Asc_FifoControl , IfxAsclin_Lin_FifoControl , IfxAsclin_Spi_FifoControl
  • overflowCnt : IfxGtm_Tim_In
  • overflowInterrupt : IfxMsc_Msc_InterruptConfig
  • overflowInterruptNode : IfxMsc_Msc_InterruptConfig
  • overlfow : IfxCpu_Counter
  • overrunCheckEnabled : IfxPsi5s_Psi5s_AscConfig
  • overrunErrorConsideredForRSI : IfxPsi5s_Psi5s_GlobalControlConfig
  • oversampling : IfxAsclin_Asc_BaudRate , IfxAsclin_Lin_BitTimingControl , IfxAsclin_Spi_Baudrate
  • overshootCompensation : IfxEdsadc_Edsadc_FirFilterConfig
  • OVT : IfxGeth_RxDescr0_WF_Bits
  • OWN : IfxGeth_RxContextDescr3_Bits , IfxGeth_RxDescr3_RF_Bits , IfxGeth_RxDescr3_WF_Bits , IfxGeth_TxContextDescr3_Bits , IfxGeth_TxDescr3_RF_Bits , IfxGeth_TxDescr3_WF_Bits


iLLD_TC38A: Data Fields - Variables

- p -

  • packetFrameCount : IfxPsi5s_Psi5s_ReceivedBits , IfxPsi5s_Psi5s_ReceivedData , IfxPsi5s_Psi5s_Timestamp
  • packetLength : IfxGeth_Eth_FrameConfig
  • padDriver : IfxCan_Can_Pins , IfxEvadc_Adc_EmuxPinConfig , IfxGtm_Atom_Pwm_pin , IfxGtm_Tom_Pwm_pin , IfxI2c_Pins , IfxPort_Io_ConfigPin , IfxPort_Pin_Config
  • padStateRequest : IfxPmsPm_StandbyConfig
  • padSupply : IfxPort_LvdsConfig
  • parameterSets : IfxScuLbist_MultiTriggerConfig
  • parity : IfxMsc_Msc_UpstreamStatusConfig
  • parityBit : IfxAsclin_Asc_FrameControl
  • parityCheck : SpiIf_ChMode
  • parityCheckEnabled : IfxPsi5s_Psi5s_AscConfig
  • parityEnable : IfxAsclin_Lin_FrameControl
  • parityError : IfxAsclin_Asc_ErrorFlags , IfxQspi_SpiMaster_ErrorFlags , IfxQspi_SpiSlave_ErrorFlags
  • parityErrorConsideredForRSI : IfxPsi5s_Psi5s_GlobalControlConfig
  • parityMode : IfxQspi_SpiSlave_Protocol , SpiIf_ChMode
  • parityType : IfxAsclin_Asc_FrameControl , IfxAsclin_Lin_FrameControl
  • passiveTimeFrameCount : IfxMsc_Msc_DownstreamControlConfig
  • password : IfxScuWdt_Config
  • pattern : IfxDma_Dma_ChannelConfig , IfxScuLbist_ParameterSet
  • pause : TPwm_Functions
  • pauseOnBaudrateSpikeErrors : IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave_Config
  • pauseRunTransition : IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave_Config
  • payloadLength : IfxEray_Header , IfxEray_ReceivedHeader , IfxPsi5_Psi5_ReceiveControl , IfxPsi5_Psi5_TransmitControl , IfxPsi5s_Psi5s_ReceiveControl , IfxPsi5s_Psi5s_TransmitControl
  • payloadPreambleIndicator : IfxEray_ReceivedHeader
  • PCE : IfxGeth_TxDescr3_WF_Bits
  • pDivider : IfxScuCcu_PerPllConfig , IfxScuCcu_SysPllConfig
  • pending : IfxAsclin_Spi_Job
  • period : IfxCcu6_Icu_Config , IfxCcu6_TimerWithTrigger_Base , IfxGtm_Atom_Pwm_Config , IfxGtm_Atom_Timer_Base , IfxGtm_Tom_Pwm_Config , IfxGtm_Tom_Timer_Base , IfxStm_Timer_Base , TPwm_Config , TPwm_s
  • periodicOrExternal : IfxPsi5s_Psi5s_PulseGeneration
  • periodicOrExternalOrBypass : IfxPsi5_Psi5_PulseGeneration
  • periodPerRotation : Ifx_AngleTrkF32_Config , Ifx_AngleTrkF32_PosIf , IfxStdIf_Pos_Config
  • periodTick : IfxGtm_Tim_In
  • perPllConfig : IfxScuCcu_pllsParameterConfig
  • PFT : IfxGeth_RxDescr1_WF_Bits
  • phase : Spi_ErrorChecks
  • phaseConfig : IfxPmsEvr_initSequence
  • phaseDelay : PwmHl_Config
  • phyInterfaceMode : IfxGeth_Eth_Config
  • pid : IfxAsclin_Lin_PduType
  • pin : IfxAsclin_Cts_In , IfxAsclin_Rts_Out , IfxAsclin_Rx_In , IfxAsclin_Sclk_Out , IfxAsclin_Slso_Out , IfxAsclin_Tx_Out , IfxCan_Rxd_In , IfxCan_Txd_Out , IfxCcu6_Cc60_Out , IfxCcu6_Cc60in_In , IfxCcu6_Cc61_Out , IfxCcu6_Cc61in_In , IfxCcu6_Cc62_Out , IfxCcu6_Cc62in_In , IfxCcu6_Ccpos0_In , IfxCcu6_Ccpos1_In , IfxCcu6_Ccpos2_In , IfxCcu6_Cout60_Out , IfxCcu6_Cout61_Out , IfxCcu6_Cout62_Out , IfxCcu6_Cout63_Out , IfxCcu6_Ctrap_In , IfxCcu6_T12hr_In , IfxCcu6_T13hr_In , IfxDmu_Fdest_In , IfxEdsadc_Cgpwm_Out , IfxEdsadc_Cin_In , IfxEdsadc_Cout_Out , IfxEdsadc_Din_In , IfxEdsadc_Dscin_In , IfxEdsadc_Dscout_Out , IfxEdsadc_Dsdin_In , IfxEdsadc_Dsn_In , IfxEdsadc_Dsp_In , IfxEdsadc_Itr_In , IfxEdsadc_Sg_In , IfxEray_Rxd_In , IfxEray_Txd_Out , IfxEray_Txen_Out , IfxEvadc_Emux_Out , IfxEvadc_GxBfl_Out , IfxEvadc_Vadcg_In , IfxGeth_Col_In , IfxGeth_Crs_In , IfxGeth_Crsdv_In , IfxGeth_Grefclk_In , IfxGeth_Mdc_Out , IfxGeth_Mdio_InOut , IfxGeth_Pps_Out , IfxGeth_Refclk_In , IfxGeth_Rxclk_In , IfxGeth_Rxctl_In , IfxGeth_Rxd_In , IfxGeth_Rxdv_In , IfxGeth_Rxer_In , IfxGeth_Txclk_In , IfxGeth_Txclk_Out , IfxGeth_Txctl_Out , IfxGeth_Txd_Out , IfxGeth_Txen_Out , IfxGeth_Txer_Out , IfxGpt12_Capin_In , IfxGpt12_TxEud_In , IfxGpt12_TxIn_In , IfxGpt12_TxOut_Out , IfxGtm_Atom_Pwm_Config , IfxGtm_Atom_ToutMap , IfxGtm_Clk_Out , IfxGtm_Tim_TinMap , IfxGtm_Tom_Pwm_Config , IfxGtm_Tom_ToutMap , IfxI2c_Scl_InOut , IfxI2c_Sda_InOut , IfxMsc_En_Out , IfxMsc_Fcln_Out , IfxMsc_Fclp_Out , IfxMsc_Inj_In , IfxMsc_Msc_en , IfxMsc_Msc_fcln , IfxMsc_Msc_fclp , IfxMsc_Msc_inj0 , IfxMsc_Msc_inj1 , IfxMsc_Msc_sdi , IfxMsc_Msc_son , IfxMsc_Msc_sop , IfxMsc_Sdi_In , IfxMsc_Son_Out , IfxMsc_Sop_Out , IfxPms_Dcdcsync_Out , IfxPms_Hwcfg_In , IfxPms_Wkp_In , IfxPort_Io_ConfigPin , IfxPsi5_Rx_In , IfxPsi5_Tx_Out , IfxPsi5s_Clk_Out , IfxPsi5s_Rx_In , IfxPsi5s_Tx_Out , IfxQspi_Hsicin_In , IfxQspi_Mrst_In , IfxQspi_Mrst_Out , IfxQspi_Mtsr_In , IfxQspi_Mtsr_Out , IfxQspi_Sclk_In , IfxQspi_Sclk_Out , IfxQspi_Slsi_In , IfxQspi_Slso_Out , IfxQspi_SpiMaster_Input , IfxQspi_SpiMaster_Output , IfxScu_Dcdcsync_Out , IfxScu_Emgstop_In , IfxScu_Evrwup_In , IfxScu_Extclk_Out , IfxScu_Req_In , IfxScu_Wdtlck_Out , IfxSent_Sent_In , IfxSent_Spc_Out , IfxSmu_Fsp_Out
  • pinA : IfxGpt12_IncrEnc_Config
  • pinADigitalFilterUsage : IfxPmsPm_StandbyConfig
  • pinATriggerEvent : IfxPmsPm_StandbyConfig
  • pinB : IfxGpt12_IncrEnc_Config
  • pinBDigitalFilterUsage : IfxPmsPm_StandbyConfig
  • pinBTriggerEvent : IfxPmsPm_StandbyConfig
  • pinDriver : IfxAsclin_Asc_Pins , IfxAsclin_Lin_Pins , IfxAsclin_Spi_Pins , IfxCcu6_Icu_Pins , IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins , IfxEdsadc_Edsadc_CarrierGenConfig , IfxEdsadc_Edsadc_ChannelPins , IfxEray_Eray_NodeA , IfxEray_Eray_NodeB , IfxGpt12_IncrEnc_Config , IfxMsc_Msc_Io , IfxPsi5_Psi5_PinsConfig , IfxPsi5s_Psi5s_Pins , IfxQspi_SpiMaster_Pins , IfxQspi_SpiSlave_Pins , IfxSent_Sent_Pins
  • pinIndex : IfxPort_Pin , IfxPort_Pin_Config
  • pinMode : IfxEdsadc_Edsadc_CarrierGenConfig , IfxGpt12_IncrEnc_Config
  • pinNeg : IfxEdsadc_Edsadc_CarrierGenConfig
  • pinPos : IfxEdsadc_Edsadc_CarrierGenConfig
  • pins : IfxAsclin_Asc_Config , IfxAsclin_Lin_Config , IfxAsclin_Spi_Config , IfxCan_Can_NodeConfig , IfxCcu6_Icu_ChannelConfig , IfxCcu6_PwmBc_Config , IfxCcu6_Timer_Config , IfxCcu6_TPwm_Config , IfxEray_Eray_NodeConfig , IfxEvadc_Adc_EmuxPinConfig , IfxGeth_Eth_Config , IfxI2c_I2c_Config , IfxPsi5s_Psi5s_Config , IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave_Config , IfxSent_Sent_ChannelConfig
  • pinsConfig : IfxPsi5_Psi5_ChannelConfig
  • pinTable : IfxPort_Io_Config
  • pinZ : IfxGpt12_IncrEnc_Config
  • PL : IfxGeth_RxDescr3_WF_Bits
  • pllInitialStepConfig : IfxScuCcu_Config
  • pllInputClockSelection : IfxScuCcu_pllsParameterConfig
  • pllsParameters : IfxScuCcu_InitialStepConfig
  • pllSteps : IfxScuCcu_PllThrottleConfig
  • PMT : IfxGeth_RxDescr1_WF_Bits
  • polynom : Ifc_Crc_Table
  • port : IfxPort_Esr_Masks , IfxPort_Pin , IfxPort_Pin_Config
  • portEmergencyStop : IfxSmu_Smu_AlarmGlobalConfiguration , IfxSmu_Smu_FaultSignalingProtocol
  • positionConst : Ifx_AngleTrkF32_PosIf , IfxGpt12_IncrEnc
  • positiveInput : IfxEdsadc_Edsadc_CommonModeVoltageConfig , IfxEdsadc_Edsadc_ModulatorConfig , IfxEdsadc_ModulatorConfig
  • pre : IfxQspi_DelayConst
  • preClearEnable : IfxMtu_MbistSshConfig
  • preDivider : IfxHssl_Hssl_Config
  • prefilterEnabled : IfxEdsadc_Edsadc_FirFilterConfig
  • prescalar1 : IfxSmu_Smu_FaultSignalingProtocol
  • prescalar2 : IfxSmu_Smu_FaultSignalingProtocol
  • prescaler : IfxAsclin_Asc_BaudRate , IfxAsclin_Lin_BitTimingControl , IfxAsclin_Spi_Baudrate , IfxCan_Can_BaudRate , IfxCan_Can_FastBaudRate
  • prescalerFactor : IfxIom_Driver_LamFilterConfig
  • priority : Ifx_IsrSetting , IfxCan_GroupInterruptConfig , IfxCcu6_Icu_InterruptConfig , IfxCcu6_PwmBc_InterruptConfig , IfxCcu6_Timer_InterruptConfig , IfxCcu6_TPwm_InterruptConfig , IfxGeth_Eth_DmaInterruptConfig , IfxGeth_Eth_MtlInterruptConfig , IfxSent_Sent_Interrupt
  • protocol : Ifx_Shell , Ifx_Shell_Config , IfxQspi_SpiSlave_Config
  • protocolErrorArbitrationEnabled : IfxCan_Can_InterruptConfig
  • protocolErrorDataEnabled : IfxCan_Can_InterruptConfig
  • provider : Ifx_IsrSetting , IfxGeth_Eth_DmaInterruptConfig , IfxGeth_Eth_MtlInterruptConfig
  • prtc1Control : IfxEray_Eray_ControllerConfig
  • prtc2Control : IfxEray_Eray_ControllerConfig
  • psi5 : IfxPsi5_Psi5 , IfxPsi5_Psi5_Config
  • psi5s : IfxPsi5s_Psi5s
  • PT : IfxGeth_RxDescr1_WF_Bits
  • pulseDelayLength : IfxSent_Sent_TransmitControl
  • pulseGeneration : IfxPsi5_Psi5_ChannelConfig , IfxPsi5s_Psi5s_ChannelConfig
  • pulseLength : IfxPsi5_Psi5_PulseGeneration , IfxSent_Sent_TransmitControl
  • pulseLengthTick : IfxGtm_Tim_In
  • pulseTimestampSelect : IfxPsi5_Psi5_ReceiveControl
  • PV : IfxGeth_RxDescr1_WF_Bits
  • pw : Ifx_Ssw_Bmhd


iLLD_TC38A: Data Fields - Variables

- q -

  • qspi : IfxQspi_SpiMaster , IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave , IfxQspi_SpiSlave_Config
  • qspiClockSource : IfxPmsPm_SleepConfig
  • qspiEnabled : IfxPmsPm_SleepConfig
  • queueRequest : IfxEvadc_Adc_GroupConfig


iLLD_TC38A: Data Fields - Variables

- r -

  • R : IfxGeth_RxDescr0 , IfxGeth_RxDescr1 , IfxGeth_RxDescr2 , IfxGeth_RxDescr3 , IfxGeth_TxDescr0 , IfxGeth_TxDescr1 , IfxGeth_TxDescr2 , IfxGeth_TxDescr3
  • raisingEdgeFilterTime : IfxGtm_Tim_Timer_Config
  • rampDirection : IfxEvadc_Adc_FastCompareChannelConfig
  • rampGenerationMode : IfxEvadc_Adc_FastCompareChannelConfig
  • rawPosition : Ifx_AngleTrkF32_PosIf , IfxGpt12_IncrEnc
  • RDES0 : IfxGeth_RxDescr
  • RDES1 : IfxGeth_RxDescr
  • RDES2 : IfxGeth_RxDescr
  • RDES3 : IfxGeth_RxDescr
  • rdm : IfxPsi5_Psi5_Frame
  • rdr : IfxPsi5s_Psi5s_ReceiveData
  • rds : IfxPsi5_Psi5_SerialMessage , IfxPsi5s_Psi5s_ReceiveStatus
  • RE : IfxGeth_RxDescr3_WF_Bits
  • read : IfxStdIf_DPipe_
  • readData : IfxPsi5_Psi5_FrameData , IfxPsi5s_Psi5s_ReceivedData
  • readDataCrc : IfxDma_Dma_ChannelConfig
  • readerWaitx : Ifx_Fifo_Shared
  • readFromRxFifo0 : IfxCan_Message
  • readFromRxFifo1 : IfxCan_Message
  • real : cfloat32 , cfract , csfract , csint16 , csint32
  • receive : Spi_ErrorChecks
  • receiveBufferErrorConsideredForRSI : IfxPsi5s_Psi5s_GlobalControlConfig
  • receiveBufferOverflowFlag : IfxPsi5s_Psi5s_ReceivedBits
  • receiveBufferOverflowInterrupt : IfxSent_Sent_Enable
  • receiveBufferOverflowInterruptNode : IfxSent_Sent_InterruptNodeControl
  • receiveChannel : IfxEray_Eray_MessageRAMConfig
  • receiveControl : IfxPsi5_Psi5_ChannelConfig , IfxPsi5s_Psi5s_ChannelConfig , IfxSent_Sent_ChannelConfig
  • receiveDataInterrupt : IfxMsc_Msc_InterruptConfig , IfxSent_Sent_Enable
  • receiveDataInterruptNode : IfxMsc_Msc_InterruptConfig , IfxSent_Sent_InterruptNodeControl
  • receiveDataRegisterTimestamp : IfxPsi5_Psi5_ReceiveControl
  • receivedBits : IfxPsi5s_Psi5s_ReceiveStatus
  • receivedData : IfxPsi5s_Psi5s_ReceiveData
  • receiveIdEnable : IfxAsclin_Lin , IfxAsclin_Lin_Config
  • receiveMemoryOverflowError : IfxPsi5_Psi5_FrameData
  • receiveMode : IfxPsi5s_Psi5s_AscConfig
  • receiveRequested : IfxEray_Eray_ReceiveControl
  • receiverOddParityEnabled : IfxPsi5s_Psi5s_AscConfig
  • receiveSuccessInterrupt : IfxSent_Sent_Enable
  • receiveSuccessInterruptNode : IfxSent_Sent_InterruptNodeControl
  • receiveWakeupIdleTime : IfxEray_Eray_Prtc2Control
  • receiveWakeupLowTime : IfxEray_Eray_Prtc2Control
  • receiveWakeupTestDuration : IfxEray_Eray_Prtc1Control
  • recoveryTimerAlarmConfig : IfxSmu_Smu_Config
  • recoveryTimerConfig : IfxSmu_Smu_Config
  • recoveryTimerDuration : IfxSmu_Smu_RecoveryTimerConfig
  • rectifier : IfxEdsadc_Edsadc_ChannelConfig
  • ref : IfxIom_Driver_LamConfig
  • refClk : IfxGeth_Eth_RmiiPins
  • reference : IfxEvadc_Adc_ChannelConfig
  • referenceInputPrechargeDuration : IfxEvadc_Adc_FastCompareChannelConfig
  • referencePrechargeControlMode : IfxEvadc_Adc_GroupConfig
  • referencePrechargeEnabled : IfxEvadc_Adc_GroupConfig
  • referenceSignal : IfxIom_Iom_FpcConfig
  • referenceSignalInverted : IfxIom_Iom_LamConfig
  • referenceValue : IfxEvadc_Adc_FastCompareChannelConfig
  • refin : Ifc_Crc_Table
  • refIndex : IfxIom_Driver_Lam
  • refInput : IfxIom_Driver_Lam
  • refout : Ifc_Crc
  • refVoltageEnable : IfxEdsadc_Edsadc_CommonModeVoltageConfig
  • regAddr : Ifx_InternalMux_MuxConfig , IfxPmsEvr_StepDownRegulatorRegConfig
  • regConfig : IfxPmsEvr_checkRegConfig , IfxPmsEvr_initSequencePhase
  • reint : IfxCan_Can_InterruptConfig
  • rejectedFrameId : IfxEray_Eray_MessageRAMConfig
  • rejectRemoteFramesWithExtendedId : IfxCan_Can_FilterConfig
  • rejectRemoteFramesWithStandardId : IfxCan_Can_FilterConfig
  • reload : IfxScuWdt_Config
  • reloadCounter : IfxPmsPm_WakeupConfig
  • remaining : SpiIf_Job
  • remoteTransmitRequest : IfxCan_Message
  • requestMode : IfxDma_Dma_ChannelConfig
  • requestSlotPrio : IfxEvadc_Adc_QueueConfig
  • requestSlotQueue0Enabled : IfxEvadc_Adc_ArbiterConfig
  • requestSlotQueue1Enabled : IfxEvadc_Adc_ArbiterConfig
  • requestSlotQueue2Enabled : IfxEvadc_Adc_ArbiterConfig
  • requestSlotStartMode : IfxEvadc_Adc_QueueConfig
  • requestSource : IfxDma_Dma_ChannelConfig
  • reserved : IfxGtm_Tom_TGC , IfxIom_Iom_EcmGlobalEventSelectionBits , Spi_ErrorChecks
  • reserved0 : Ifx_Ssw_Bmhd
  • reserved1 : Ifx_Ssw_Bmhd
  • reserved_0 : IfxGeth_RxContextDescr2_Bits , IfxGeth_RxContextDescr3_Bits , IfxGeth_RxDescr1_RF_Bits , IfxGeth_RxDescr3_RF_Bits , IfxGeth_TxDescr2_WF_Bits
  • reserved_11 : IfxGeth_RxDescr2_WF_Bits
  • reserved_14 : IfxGeth_TxContextDescr2_Bits
  • reserved_16 : IfxGeth_TxDescr3_WF_Bits
  • reserved_18 : IfxGeth_TxDescr3_WF_Bits
  • reserved_20 : IfxGeth_TxContextDescr3_Bits
  • reserved_24 : IfxGeth_TxContextDescr3_Bits
  • reserved_27 : IfxGeth_RxDescr3_RF_Bits
  • reserved_28 : IfxGeth_TxContextDescr3_Bits
  • reset : IfxStdIf_Pos_
  • resetConfigSet : IfxSmu_Smu_AlarmGlobalConfiguration
  • resetFaults : IfxStdIf_Pos_
  • resetReason : IfxScuRcu_ResetCode
  • resetSendCount : IfxStdIf_DPipe_
  • resetTrigger : IfxScuRcu_ResetCode
  • resetType : IfxScuRcu_ResetCode
  • resolution : Ifx_AngleTrkF32_Config , Ifx_AngleTrkF32_PosIf , IfxGpt12_IncrEnc , IfxStdIf_Pos_Config
  • resolutionFactor : IfxStdIf_Pos_Config
  • resource : Ifx_GlobalResources_Item
  • responseTimeout : IfxAsclin_Lin_DataControl , IfxAsclin_Lin_ErrorFlags
  • responseTimeoutMode : IfxAsclin_Lin_DataControl
  • resultDisplay : IfxEdsadc_Edsadc_DemodulatorConfig
  • resultPriority : IfxEvadc_Adc_ChannelConfig
  • resultreg : IfxEvadc_Adc_Channel
  • resultRegister : IfxEvadc_Adc_ChannelConfig
  • resultServProvider : IfxEvadc_Adc_ChannelConfig
  • resultSrcNr : IfxEvadc_Adc_ChannelConfig
  • resume : TPwm_Functions
  • reti : IfxCan_Can_InterruptConfig
  • reversed : Ifx_AngleTrkF32_Config , Ifx_AngleTrkF32_PosIf , IfxStdIf_Pos_Config
  • RGainHex : IfxScuCcu_RGain_Values
  • RGainNom : IfxScuCcu_RGain_Values
  • rgmiiPins : IfxGeth_Eth_PinConfig
  • rightAlignedStorage : IfxEvadc_Adc_ChannelConfig
  • rippleCompensationEnabled : IfxEdsadc_Edsadc_FirFilterConfig
  • risingEdgeAtPeriod : IfxStdIf_Timer_TrigConfig
  • risingEdgeFilterTime : IfxGtm_Tim_In_ConfigFilter , IfxIom_Driver_LamFilterConfig
  • risingEdgeMode : IfxGtm_Tim_In_ConfigFilter
  • rmiiPins : IfxGeth_Eth_PinConfig
  • RS0V : IfxGeth_RxDescr3_WF_Bits
  • RS1V : IfxGeth_RxDescr3_WF_Bits
  • RS2V : IfxGeth_RxDescr3_WF_Bits
  • rts : IfxAsclin_Asc_Pins
  • RTSH : IfxGeth_RxContextDescr1_Bits
  • RTSL : IfxGeth_RxContextDescr0_Bits
  • rtsMode : IfxAsclin_Asc_Pins
  • run : IfxIom_Driver_LamEventWindowConfig , IfxStdIf_Timer_
  • runMode : IfxEvadc_Adc_FastCompareChannelConfig
  • RWT : IfxGeth_RxDescr3_WF_Bits
  • rx : IfxAsclin_Asc , IfxAsclin_Asc_Pins , IfxAsclin_Lin_Pins , IfxAsclin_Spi_Pins , IfxPsi5s_Psi5s_Pins , SpiIf_Ch_
  • rxArbitrationAlgorithm : IfxGeth_Eth_MtlConfig
  • rxBuffer : IfxAsclin_Asc_Config
  • rxBuffer1Size : IfxGeth_Eth_RxChannelConfig
  • rxBuffer1StartAddress : IfxGeth_Eth_RxChannelConfig
  • rxBufferDataFieldSize : IfxCan_Can_RxConfig
  • rxBufferOffset : IfxCan_Filter
  • rxBufferSize : IfxAsclin_Asc_Config
  • rxBuffersStartAddress : IfxCan_MessageRAM
  • rxChannel : IfxGeth_Eth , IfxGeth_Eth_DmaConfig
  • rxClk : IfxGeth_Eth_MiiPins , IfxGeth_Eth_RgmiiPins
  • rxConfig : IfxCan_Can_NodeConfig
  • rxCount : IfxGeth_Eth_RxChannel , SpiIf_
  • rxCtl : IfxGeth_Eth_RgmiiPins
  • rxd0 : IfxGeth_Eth_MiiPins , IfxGeth_Eth_RgmiiPins , IfxGeth_Eth_RmiiPins
  • rxd1 : IfxGeth_Eth_MiiPins , IfxGeth_Eth_RgmiiPins , IfxGeth_Eth_RmiiPins
  • rxd2 : IfxGeth_Eth_MiiPins , IfxGeth_Eth_RgmiiPins
  • rxd3 : IfxGeth_Eth_MiiPins , IfxGeth_Eth_RgmiiPins
  • rxDescrList : IfxGeth_Eth_RxChannel , IfxGeth_Eth_RxChannelConfig
  • rxDescrPtr : IfxGeth_Eth_RxChannel
  • rxDmaChannel : IfxQspi_SpiMaster_Dma , IfxQspi_SpiSlave_Dma
  • rxDmaChannelId : IfxQspi_SpiMaster_Dma , IfxQspi_SpiMaster_DmaConfig , IfxQspi_SpiSlave_Dma , IfxQspi_SpiSlave_DmaConfig
  • rxDmaChannelMap : IfxGeth_Eth_RxQueueConfig
  • rxDv : IfxGeth_Eth_MiiPins
  • rxEr : IfxGeth_Eth_MiiPins
  • rxf0f : IfxCan_Can_InterruptConfig
  • rxf0n : IfxCan_Can_InterruptConfig
  • rxf1f : IfxCan_Can_InterruptConfig
  • rxf1n : IfxCan_Can_InterruptConfig
  • rxFifo0DataFieldSize : IfxCan_Can_RxConfig
  • rxFifo0FullEnabled : IfxCan_Can_InterruptConfig
  • rxFifo0MessageLostEnabled : IfxCan_Can_InterruptConfig
  • rxFifo0NewMessageEnabled : IfxCan_Can_InterruptConfig
  • rxFifo0OperatingMode : IfxCan_Can_RxConfig
  • rxFifo0Size : IfxCan_Can_RxConfig
  • rxFifo0StartAddress : IfxCan_MessageRAM
  • rxFifo0WatermarkEnabled : IfxCan_Can_InterruptConfig
  • rxFifo0WatermarkLevel : IfxCan_Can_RxConfig
  • rxFifo1DataFieldSize : IfxCan_Can_RxConfig
  • rxFifo1FullEnabled : IfxCan_Can_InterruptConfig
  • rxFifo1MessageLostEnabled : IfxCan_Can_InterruptConfig
  • rxFifo1NewMessageEnabled : IfxCan_Can_InterruptConfig
  • rxFifo1OperatingMode : IfxCan_Can_RxConfig
  • rxFifo1Size : IfxCan_Can_RxConfig
  • rxFifo1StartAddress : IfxCan_MessageRAM
  • rxFifo1WatermarkEnabled : IfxCan_Can_InterruptConfig
  • rxFifo1WatermarkLevel : IfxCan_Can_RxConfig
  • rxFifoInterruptLevel : IfxAsclin_Asc_FifoControl , IfxAsclin_Spi_FifoControl
  • rxFifoInterruptMode : IfxAsclin_Asc_FifoControl , IfxAsclin_Spi_FifoControl
  • rxFifoMode : IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave_Config
  • rxFifoOverflow : IfxAsclin_Asc_ErrorFlags , IfxAsclin_Lin_ErrorFlags , IfxAsclin_Spi_ErrorFlags
  • rxFifoOverflowError : IfxQspi_SpiMaster_ErrorFlags , IfxQspi_SpiSlave_ErrorFlags
  • rxFifoThreshold : IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave_Config
  • rxFifoUnderflow : IfxAsclin_Asc_ErrorFlags , IfxAsclin_Spi_ErrorFlags
  • rxFifoUnderflowError : IfxQspi_SpiMaster_ErrorFlags , IfxQspi_SpiSlave_ErrorFlags
  • rxHandler : SpiIf_Ch_
  • rxHeaderEnd : IfxAsclin_Lin_AcknowledgementFlags
  • rxHeaderErrorOccurred : IfxAsclin_Lin_FrameControlFlags
  • rxHeaderInProgress : IfxAsclin_Lin_FrameControlFlags
  • rxIn : IfxEray_Eray_NodeA , IfxEray_Eray_NodeB
  • rxInMode : IfxEray_Eray_NodeA , IfxEray_Eray_NodeB
  • rxInterrupt : IfxGeth_Eth_DmaConfig
  • rxJob : IfxAsclin_Spi , IfxQspi_SpiSlave
  • rxMode : IfxAsclin_Asc_Pins , IfxAsclin_Lin_Pins , IfxAsclin_Spi_Pins , IfxCan_Can_RxConfig , IfxPsi5s_Psi5s_Pins
  • rxPin : IfxCan_Can_Pins
  • rxPinMode : IfxCan_Can_Pins
  • rxPriority : IfxAsclin_Asc_InterruptConfig , IfxAsclin_Lin_InterruptConfig , IfxAsclin_Spi_InterruptConfig , SpiIf_Config
  • rxQueue : IfxGeth_Eth_MtlConfig
  • rxQueueOverflowInterruptEnabled : IfxGeth_Eth_RxQueueConfig
  • rxQueueSize : IfxGeth_Eth_RxQueueConfig
  • rxReceivedHeader : IfxAsclin_Lin_EnabledInterrupts
  • rxReceivedResponse : IfxAsclin_Lin_EnabledInterrupts
  • rxResponseData : IfxAsclin_Lin_FrameDataControl
  • rxResponseEnd : IfxAsclin_Lin_AcknowledgementFlags
  • rxResponseErrorOccurred : IfxAsclin_Lin_FrameControlFlags
  • rxResponseInProgress : IfxAsclin_Lin_FrameControlFlags
  • rxResponseLength : IfxAsclin_Lin_FrameDataControl
  • rxSwFifoOverflow : IfxAsclin_Asc


iLLD_TC38A: Data Fields - Variables

- s -

  • SAF : IfxGeth_RxDescr2_WF_Bits
  • safe : IfxCan_Can_InterruptConfig
  • SAIC : IfxGeth_TxDescr3_RF_Bits
  • sampleClockSource : IfxEdsadc_Edsadc_DemodulatorConfig
  • samplePoint : IfxCan_Can_BaudRate , IfxCan_Can_FastBaudRate
  • samplePointEMUX : IfxEvadc_Adc_ClassConfig
  • samplePointPosition : IfxAsclin_Asc_BitTimingControl , IfxAsclin_Lin_BitSamplingControl
  • samplePointStandard : IfxEvadc_Adc_ClassConfig
  • sampleSynchronizationEnabled : IfxEvadc_Adc_GroupConfig
  • sampleTime : IfxEvadc_Adc_ClassConfig
  • sampleTimeControl : IfxEvadc_Adc_EmuxControl
  • sampleTimeEMUX : IfxEvadc_Adc_ClassConfig
  • sampleTimingSynchronization : IfxEvadc_Adc_FastCompareChannelConfig
  • samplingTime : Ifx_LowPassPt1F32_Config
  • scanChainLength : IfxScuLbist_ParameterSet
  • scl : IfxI2c_Pins
  • sclk : IfxAsclin_Spi_Pins , IfxQspi_SpiMaster_Pins , IfxQspi_SpiSlave_Pins
  • sclkMode : IfxAsclin_Spi_Pins , IfxQspi_SpiMaster_Pins , IfxQspi_SpiSlave_Pins
  • scrClockSupply : IfxPmsPm_StandbyConfig
  • sda : IfxI2c_Pins
  • sdi : IfxMsc_Msc_Io
  • sdiLinePolarity : IfxMsc_Msc_OutputControlConfig
  • seconds : Ifx_DateTime
  • seed : IfxScuLbist_ParameterSet
  • segmentCount : Ifx_LutIndexedLinearF32 , Ifx_LutLinearF32
  • segments : Ifx_LutIndexedLinearF32 , Ifx_LutLinearF32
  • select : IfxAsclin_Cts_In , IfxAsclin_Rts_Out , IfxAsclin_Rx_In , IfxAsclin_Sclk_Out , IfxAsclin_Slso_Out , IfxAsclin_Tx_Out , IfxCan_Rxd_In , IfxCan_Txd_Out , IfxCcu6_Cc60_Out , IfxCcu6_Cc60in_In , IfxCcu6_Cc61_Out , IfxCcu6_Cc61in_In , IfxCcu6_Cc62_Out , IfxCcu6_Cc62in_In , IfxCcu6_Ccpos0_In , IfxCcu6_Ccpos1_In , IfxCcu6_Ccpos2_In , IfxCcu6_Cout60_Out , IfxCcu6_Cout61_Out , IfxCcu6_Cout62_Out , IfxCcu6_Cout63_Out , IfxCcu6_Ctrap_In , IfxCcu6_T12hr_In , IfxCcu6_T13hr_In , IfxDmu_Fdest_In , IfxEdsadc_Cgpwm_Out , IfxEdsadc_Cin_In , IfxEdsadc_Cout_Out , IfxEdsadc_Din_In , IfxEdsadc_Dscin_In , IfxEdsadc_Dscout_Out , IfxEdsadc_Dsdin_In , IfxEdsadc_Dsn_In , IfxEdsadc_Dsp_In , IfxEdsadc_Itr_In , IfxEdsadc_Sg_In , IfxEray_Rxd_In , IfxEray_Txd_Out , IfxEray_Txen_Out , IfxEvadc_Emux_Out , IfxEvadc_GxBfl_Out , IfxGeth_Col_In , IfxGeth_Crs_In , IfxGeth_Crsdv_In , IfxGeth_Grefclk_In , IfxGeth_Mdc_Out , IfxGeth_Pps_Out , IfxGeth_Refclk_In , IfxGeth_Rxclk_In , IfxGeth_Rxctl_In , IfxGeth_Rxd_In , IfxGeth_Rxdv_In , IfxGeth_Rxer_In , IfxGeth_Txclk_In , IfxGeth_Txclk_Out , IfxGeth_Txctl_Out , IfxGeth_Txd_Out , IfxGeth_Txen_Out , IfxGeth_Txer_Out , IfxGpt12_Capin_In , IfxGpt12_TxEud_In , IfxGpt12_TxIn_In , IfxGpt12_TxOut_Out , IfxGtm_Atom_ToutMap , IfxGtm_Clk_Out , IfxGtm_Tim_TinMap , IfxGtm_Tom_ToutMap , IfxMsc_En_Out , IfxMsc_Fcln_Out , IfxMsc_Fclp_Out , IfxMsc_Inj_In , IfxMsc_Sdi_In , IfxMsc_Son_Out , IfxMsc_Sop_Out , IfxPms_Dcdcsync_Out , IfxPms_Wkp_In , IfxPsi5_Rx_In , IfxPsi5_Tx_Out , IfxPsi5s_Clk_Out , IfxPsi5s_Rx_In , IfxPsi5s_Tx_Out , IfxQspi_Hsicin_In , IfxQspi_Mrst_In , IfxQspi_Mrst_Out , IfxQspi_Mtsr_In , IfxQspi_Mtsr_Out , IfxQspi_Sclk_In , IfxQspi_Sclk_Out , IfxQspi_Slsi_In , IfxQspi_Slso_Out , IfxScu_Dcdcsync_Out , IfxScu_Emgstop_In , IfxScu_Evrwup_In , IfxScu_Extclk_Out , IfxScu_Req_In , IfxScu_Wdtlck_Out , IfxSent_Sent_In , IfxSent_Spc_Out , IfxSmu_Fsp_Out
  • sendControl : IfxPsi5_Psi5_ChannelConfig , IfxPsi5s_Psi5s_ChannelConfig
  • sendCount : IfxAsclin_Asc
  • sending : IfxAsclin_Spi , SpiIf_
  • sendResultCode : Ifx_Shell_Config , Ifx_Shell_Flags
  • sensorControlDisabled : IfxDts_Dts_Config
  • sent : IfxSent_Sent
  • serialData : IfxPsi5_Psi5_Message , IfxSent_Sent_SerialMessageFrame
  • serialDataCrcErrorInterrupt : IfxSent_Sent_Enable
  • serialDataDisabledCrcDisabled : IfxSent_Sent_ReceiveControl
  • serialDataProcessingEnabled : IfxSent_Sent_ReceiveControl
  • serialDataReceiveInterrupt : IfxSent_Sent_Enable
  • serialDataReceiveInterruptNode : IfxSent_Sent_InterruptNodeControl
  • serialMessageCRCFailedError : IfxPsi5_Psi5_Message
  • serviceReqNrPeriod : IfxCcu6_TimerWithTrigger_Config
  • serviceReqNrTrigger : IfxCcu6_TimerWithTrigger_Config
  • serviceRequest : IfxCcu6_Icu_InterruptConfig , IfxCcu6_PwmBc_InterruptConfig , IfxCcu6_Timer_InterruptConfig , IfxCcu6_TPwm_InterruptConfig , IfxEdsadc_Edsadc_FirFilterConfig , IfxGeth_Eth_MtlInterruptConfig
  • serviceRequestDelay : IfxMsc_Msc_UpstreamStatusConfig
  • serviceRequestGenerationEvent : IfxEvadc_Adc_FastCompareChannelConfig
  • serviceRequestLevel : IfxEdsadc_Edsadc_FirFilterConfig
  • set : IfxGtm_Trig_MscTrig_Table
  • setDeadtime : IfxStdIf_PwmHl_
  • setFrequency : IfxStdIf_Timer_
  • setInterruptAfterLastFlag : IfxQspi_SpiMaster_MoveCounterControl
  • setInterruptBeforeLastFlag : IfxQspi_SpiMaster_MoveCounterControl
  • setMinPulse : IfxStdIf_PwmHl_
  • setMode : IfxCcu6_PwmHl_Base , IfxGtm_Atom_Dtm_PwmHl_Base , IfxGtm_Atom_PwmHl_Base , IfxGtm_Tom_Dtm_PwmHl_Base , IfxGtm_Tom_PwmHl_Base , IfxStdIf_PwmHl_
  • setOffset : IfxStdIf_Pos_
  • setOnTime : IfxStdIf_PwmHl_
  • setOnTimeAndShift : IfxStdIf_PwmHl_
  • setPeriod : IfxStdIf_Timer_
  • setPosition : IfxStdIf_Pos_
  • setPulse : IfxStdIf_PwmHl_
  • setRawPosition : IfxStdIf_Pos_
  • setRefreshPeriod : IfxStdIf_Pos_
  • setSingleMode : IfxStdIf_Timer_
  • setSpeed : IfxStdIf_Pos_
  • setTrigger : IfxStdIf_Timer_
  • setupChannels : IfxStdIf_PwmHl_
  • shadowAddress : IfxDma_Dma_ChannelConfig
  • shadowControl : IfxDma_Dma_ChannelConfig
  • shadowCounter : IfxGtm_Tim_Timer_Config
  • shared : _Fifo
  • shift : Ifx_LutIndexedLinearF32
  • shiftClock : IfxQspi_SpiSlave_Protocol , SpiIf_ChMode
  • shiftControl : IfxEdsadc_Edsadc_IntegratorConfig
  • shiftDir : IfxAsclin_Asc_FrameControl , IfxAsclin_Lin_FrameControl , IfxAsclin_Spi_FrameControl
  • showPrompt : Ifx_Shell_Config , Ifx_Shell_Flags
  • Signal : IfxGtm_Spe_InputPattern
  • signalLevel : IfxGtm_Atom_Pwm_Config , IfxGtm_Tom_Pwm_Config
  • signalLevelControl : IfxGtm_Tim_ChannelControl
  • signature : IfxScuLbist_ParameterSet
  • signDelay : IfxEdsadc_Edsadc_RectifierConfig
  • signPeriod : IfxEdsadc_Edsadc_RectifierConfig
  • signSource : IfxEdsadc_Edsadc_RectifierConfig
  • singleShot : IfxStm_Timer_Base
  • sinIn : Ifx_AngleTrkF32 , Ifx_AngleTrkF32_Config
  • size : _Fifo , Ifx_GlobalResources , Ifx_InternalMux_Config , IfxPort_Io_Config
  • sleepModeEnabled : IfxSent_Sent_Config
  • slotControl : IfxEray_Eray_BufferReconfig , IfxEray_Eray_MessageRAMConfig
  • slotCounter : IfxPsi5_Psi5_FrameData
  • SLOTNUM_THL : IfxGeth_TxDescr3_RF_Bits
  • slowClock : IfxPsi5_Psi5_Config
  • sls : IfxQspi_SpiMaster_ChannelConfig
  • slsi : IfxQspi_SpiSlave_Pins
  • slsiMisplacedInactivation : IfxQspi_SpiSlave_ErrorFlags
  • slsiMode : IfxQspi_SpiSlave_Pins
  • slso : IfxAsclin_Spi_Pins , IfxQspi_SpiMaster_Channel_s
  • slsoActiveState : IfxQspi_SpiMaster_Channel_s
  • slsoMode : IfxAsclin_Spi_Pins
  • slsoNr : IfxQspi_Slso_Out
  • son : IfxMsc_Msc_Io
  • sop : IfxMsc_Msc_Io
  • sopPolarity : IfxMsc_Msc_OutputControlConfig
  • sorPayloadLength : IfxPsi5_Psi5_TransmitControl
  • source : IfxCcu6_Icu_InterruptConfig , IfxCcu6_PwmBc_InterruptConfig , IfxCcu6_Timer_InterruptConfig , IfxCcu6_TPwm_InterruptConfig , IfxGtm_Trig_AdcTrig_Trigger , IfxGtm_Trig_CanTrig_Trigger , IfxGtm_Trig_MscTrig_Set , IfxIom_Driver_LamEventConfig
  • sourceAddress : IfxDma_Dma_ChannelConfig
  • sourceAddressCircularRange : IfxDma_Dma_ChannelConfig
  • sourceAddressIncrementDirection : IfxDma_Dma_ChannelConfig
  • sourceAddressIncrementStep : IfxDma_Dma_ChannelConfig
  • sourceCircularBufferEnabled : IfxDma_Dma_ChannelConfig
  • sourceDestinationAddressCrc : IfxDma_Dma_ChannelConfig
  • spcMode : IfxSent_Sent_TransmitControl
  • spcModeOn : IfxSent_Sent_ChannelConfig
  • speed : IfxGpt12_IncrEnc
  • speedConstPulseCount : IfxGpt12_IncrEnc
  • speedConstTimeDiff : IfxGpt12_IncrEnc
  • speedEstA : Ifx_AngleTrkF32
  • speedEstB : Ifx_AngleTrkF32
  • speedFilerCutOffFrequency : IfxStdIf_Pos_Config
  • speedFilterEnabled : IfxStdIf_Pos_Config
  • speedLpf : Ifx_AngleTrkF32
  • speedLpfFc : Ifx_AngleTrkF32_Config
  • speedMode : IfxI2c_I2c_Device , IfxI2c_I2c_deviceConfig
  • speedModeThreshold : IfxGpt12_IncrEnc , IfxStdIf_Pos_Config
  • speedModeThresholdTick : IfxGpt12_IncrEnc
  • splitShiftSel : IfxScuLbist_ParameterSet
  • spol : IfxAsclin_Spi_InputOutputControl
  • sqrAmplMax : Ifx_AngleTrkF32_CfgData , Ifx_AngleTrkF32_Config
  • sqrAmplMin : Ifx_AngleTrkF32_CfgData , Ifx_AngleTrkF32_Config
  • srhActivePhaseSelection : IfxMsc_Msc_CommandExtensionConfig , IfxMsc_Msc_DownstreamControlConfig
  • srhBitsShiftedAtDataFramesExtension : IfxMsc_Msc_CommandExtensionConfig , IfxMsc_Msc_DownstreamControlExtensionConfig
  • srhDataFrameLength : IfxMsc_Msc_CommandExtensionConfig , IfxMsc_Msc_DownstreamControlConfig
  • srlActivePhaseSelection : IfxMsc_Msc_CommandExtensionConfig , IfxMsc_Msc_DownstreamControlConfig
  • srlBitsShiftedAtDataFramesExtension : IfxMsc_Msc_CommandExtensionConfig , IfxMsc_Msc_DownstreamControlExtensionConfig
  • srlDataFrameLength : IfxMsc_Msc_CommandExtensionConfig , IfxMsc_Msc_DownstreamControlConfig
  • sshConfigurations : IfxMtu_MbistConfig
  • sshSel : IfxMtu_MbistSshConfig
  • ssrPayloadLength : IfxPsi5_Psi5_TransmitControl
  • stad : Ifx_Ssw_Bmhd
  • standardFilterForNonMatchingFrames : IfxCan_Can_FilterConfig
  • standardFilterListStartAddress : IfxCan_MessageRAM
  • standardIo : Ifx_Console , Ifx_Shell_Config
  • standardListSize : IfxCan_Can_FilterConfig
  • standbyRam : IfxPmsPm_WakeupConfig
  • standbyRamBlock : IfxPmsPm_StandbyConfig
  • start : Ifx_Shell_Protocol , IfxFlash_flashSector , IfxHssl_Hssl_AccessWindow , PwmHl_Functions , Timer_Functions , TPwm_Functions
  • startCapture : Icu_Functions
  • startChannel : IfxEvadc_Adc_EmuxControl
  • started : Ifx_Shell_Protocol
  • startIndex : _Fifo
  • startOffset : IfxStdIf_Timer_Config
  • startSequenceGenerationControl : IfxPsi5s_Psi5s_TransmitControl
  • startSequenceGenerationEnabled : IfxPsi5_Psi5_TransmitControl
  • startSingleShotMode : Timer_Functions
  • startupCalibration : IfxEvadc_Adc_GroupConfig
  • startupCalibrationControl : IfxEvadc_Adc_Config
  • startupFrame : IfxEray_ReceivedHeader
  • startupFrameIndicator : IfxEray_Header
  • startupFrameTransmitted : IfxEray_Eray_Succ1Config
  • startValue : IfxEdsadc_Edsadc_CombFilterConfig
  • staticActionPoint : IfxEray_Eray_Gtu09Config
  • staticFifoDisabled : IfxEray_Eray_MessageRAMConfig
  • staticFramepayload : IfxEray_Eray_ControllerConfig
  • staticSlotLength : IfxEray_Eray_Gtu07Config
  • staticSlotsCount : IfxEray_Eray_Gtu07Config
  • status : Ifx_AngleTrkF32_PosIf , IfxGpt12_IncrEnc , IfxI2c_I2c , IfxPsi5s_Psi5s_Frame , IfxStdIf_Pos_Status
  • statusNibble : IfxSent_Sent_Frame
  • statusNibbleEnabled : IfxSent_Sent_ReceiveControl
  • step : IfxMsc_Msc_Clock
  • stm : IfxStm_Timer , IfxStm_Timer_Config
  • stmEnabled : IfxPmsPm_SleepConfig
  • stop : IfxStdIf_Timer_ , PwmHl_Functions , Timer_Functions , TPwm_Functions
  • stopBit : IfxAsclin_Asc_FrameControl , IfxAsclin_Lin_FrameControl , IfxAsclin_Spi_FrameControl
  • stopBits : IfxPsi5s_Psi5s_AscConfig
  • stopCapture : Icu_Functions
  • storeAndForward : IfxGeth_Eth_RxQueueConfig , IfxGeth_Eth_TxQueueConfig
  • storeInTxFifoQueue : IfxCan_Message
  • streamingMode : IfxHssl_Hssl_Channel , IfxHssl_Hssl_ChannelConfig
  • streamingModeOn : IfxHssl_Hssl_Channel
  • strobePosition : IfxEray_Eray_Prtc1Control
  • succ1Config : IfxEray_Eray_ControllerConfig
  • succ2Config : IfxEray_Eray_ControllerConfig
  • succ3Config : IfxEray_Eray_ControllerConfig
  • supplyVoltage : IfxEvadc_Adc_Config
  • supplyVoltageLevel : IfxEdsadc_Edsadc_Config
  • suspendTriggered : IfxSent_Sent_ReceiveControl
  • swapOrderOfBytes : IfxFce_Crc_CrcConfig
  • swapRequested : IfxEray_Eray_ReceiveControl
  • switchingSelect : IfxCcu6_PwmBc_MultiChannelControl
  • switchingSync : IfxCcu6_PwmBc_MultiChannelControl
  • syncFrame : IfxEray_ReceivedHeader
  • syncFrameIndicator : IfxEray_Header
  • syncFrameTransmitted : IfxEray_Eray_Succ1Config
  • synchonize : IfxEvadc_Adc_ChannelConfig
  • synchronousOperation : IfxCcu6_Timer_Config
  • synchronousStart : Timer_Functions
  • synchronousStop : Timer_Functions
  • synchronousUpdateEnabled : IfxGtm_Atom_Pwm_Config , IfxGtm_Tom_Pwm_Config
  • syncJumpWidth : IfxCan_Can_BaudRate , IfxCan_Can_FastBaudRate
  • syntax : Ifx_Shell_Syntax
  • sysPllConfig : IfxScuCcu_pllsParameterConfig
  • sysPllThrottleConfig : IfxScuCcu_Config
  • systemCall : IfxCpu_Trap_Id
  • systemEventTriggerThreshold : IfxIom_Driver_Lam , IfxIom_Driver_LamConfig


iLLD_TC38A: Data Fields - Variables

- t -

  • t12countingInputMode : IfxCcu6_Timer_Clock , IfxCcu6_TPwm_Clock
  • t12ExtClockEnabled : IfxCcu6_Timer_Clock , IfxCcu6_TPwm_Clock
  • t12ExtClockInput : IfxCcu6_Timer_Clock , IfxCcu6_TPwm_Clock
  • t12ExtInputTrigger : IfxCcu6_PwmBc_TriggerConfig , IfxCcu6_Timer_TriggerConfig , IfxCcu6_TPwm_TriggerConfig
  • t12ExtInputTriggerMode : IfxCcu6_PwmBc_TriggerConfig
  • t12Frequency : PwmHl_Config , PwmHl_s , Timer_Config , Timer_s
  • t12hr : IfxCcu6_Icu_Pins , IfxCcu6_PwmBc_Pins , IfxCcu6_Timer_Pins , IfxCcu6_TPwm_Pins
  • t12Period : PwmHl_Config , PwmHl_s , Timer_Config , Timer_s
  • t12SyncDirection : IfxCcu6_PwmBc_Timer13 , IfxCcu6_Timer_Timer13 , IfxCcu6_TPwm_Timer13
  • t12SyncEvent : IfxCcu6_PwmBc_Timer13 , IfxCcu6_Timer_Timer13 , IfxCcu6_TPwm_Timer13
  • t13countingInputMode : IfxCcu6_Timer_Clock , IfxCcu6_TPwm_Clock
  • t13ExtClockEnabled : IfxCcu6_Timer_Clock , IfxCcu6_TPwm_Clock
  • t13ExtClockInput : IfxCcu6_Timer_Clock , IfxCcu6_TPwm_Clock
  • t13ExtInputTrigger : IfxCcu6_PwmBc_TriggerConfig , IfxCcu6_Timer_TriggerConfig , IfxCcu6_TPwm_TriggerConfig
  • t13ExtInputTriggerMode : IfxCcu6_PwmBc_TriggerConfig
  • t13Frequency : PwmHl_Config , PwmHl_s , Timer_Config , Timer_s
  • t13hr : IfxCcu6_Icu_Pins , IfxCcu6_PwmBc_Pins , IfxCcu6_Timer_Pins , IfxCcu6_TPwm_Pins
  • t13InSyncWithT12 : IfxCcu6_PwmBc_TriggerConfig , IfxCcu6_Timer_TriggerConfig , IfxCcu6_TPwm_TriggerConfig
  • t13Period : PwmHl_Config , PwmHl_s , Timer_Config , Timer_s
  • t1xhrInputMode : IfxCcu6_Icu_Pins , IfxCcu6_PwmBc_Pins , IfxCcu6_Timer_Pins , IfxCcu6_TPwm_Pins
  • table : Ifc_Crc , Ifx_GlobalResources
  • tAddr : IfxCpu_Trap
  • target : IfxMsc_En_Out , IfxMsc_Msc_Config
  • tClass : IfxCpu_Trap
  • TCMSSV : IfxGeth_TxContextDescr3_Bits
  • tCpu : IfxCpu_Trap
  • TD : IfxGeth_RxDescr1_WF_Bits
  • TDES0 : IfxGeth_TxDescr
  • TDES1 : IfxGeth_TxDescr
  • TDES2 : IfxGeth_TxDescr
  • TDES3 : IfxGeth_TxDescr
  • tefifo : IfxCan_Can_InterruptConfig
  • tgc : IfxGtm_Tom_Dtm_PwmHl_s , IfxGtm_Tom_Pwm_Driver , IfxGtm_Tom_PwmHl_s , IfxGtm_Tom_Timer
  • tgcGlobalControlApplyUpdate : IfxGtm_Tom_Timer
  • tgcGlobalControlDisableUpdate : IfxGtm_Tom_Timer
  • threshold : IfxIom_Driver_LamEventWindowConfig , IfxIom_Iom_EcmConfigCounter
  • ticks : IfxStm_CompareConfig
  • tId : IfxCpu_Trap
  • tim : IfxGtm_Tim_Timer , IfxGtm_Tim_TinMap
  • timeBase : IfxSent_Sent_TransmitControl
  • timeBaseSelect : IfxPsi5_Psi5_PulseGeneration , IfxPsi5_Psi5_TimeStampConfig , IfxPsi5s_Psi5s_PulseGeneration , IfxPsi5s_Psi5s_TimeStampConfig
  • timeFrameInterrupt : IfxMsc_Msc_InterruptConfig
  • timeFrameInterruptNode : IfxMsc_Msc_InterruptConfig
  • timeout : IfxGtm_Tim_In_Config , IfxGtm_Tim_In_ConfigTimeout
  • timeoutControl : IfxGtm_Tim_ChannelControl
  • timeoutError : IfxHssl_Hssl_errorFlags
  • timeoutOccurredEnabled : IfxCan_Can_InterruptConfig
  • timer : IfxCcu6_Icu_ChannelConfig , IfxCcu6_PwmHl_Config , IfxCcu6_PwmHl_s , IfxCcu6_Timer , IfxCcu6_Timer_Config , IfxCcu6_TPwm , IfxCcu6_TPwm_Config , IfxGpt12_TxEud_In , IfxGpt12_TxIn_In , IfxGpt12_TxOut_Out , IfxGtm_Atom_Dtm_PwmHl_Config , IfxGtm_Atom_Dtm_PwmHl_s , IfxGtm_Atom_PwmHl_Config , IfxGtm_Atom_PwmHl_s , IfxGtm_Tom_Dtm_PwmHl_Config , IfxGtm_Tom_Dtm_PwmHl_s , IfxGtm_Tom_PwmHl_Config , IfxGtm_Tom_PwmHl_s , IfxStdIf_PwmHl_
  • timer12 : IfxCcu6_PwmBc_Config , IfxCcu6_Timer_Config , IfxCcu6_TPwm_Config
  • timer13 : IfxCcu6_PwmBc_Config , IfxCcu6_Timer_Config , IfxCcu6_TPwm_Config
  • timerChannel : IfxGtm_Atom_Timer , IfxGtm_Atom_Timer_Config , IfxGtm_Tom_Timer , IfxGtm_Tom_Timer_Config
  • timerReset : IfxIom_Iom_FpcConfig
  • timeSegment1 : IfxCan_Can_BaudRate , IfxCan_Can_FastBaudRate
  • timeSegment2 : IfxCan_Can_BaudRate , IfxCan_Can_FastBaudRate
  • timeslotError : IfxPsi5_Psi5_FrameData
  • timestamp : Ifx_DataBufferMode_TimeStampSingle
  • timeStamp : IfxEdsadc_Edsadc_ChannelConfig
  • timestamp : IfxPsi5_Psi5_FrameData , IfxPsi5s_Psi5s_Frame
  • timeStamp : IfxPsi5s_Psi5s_ReceiveTimestamp
  • timestamp : IfxPsi5s_Psi5s_Timestamp
  • timeStamp : IfxSent_Sent_Frame
  • timestampClock : IfxPsi5_Psi5_Config , IfxPsi5s_Psi5s_Config
  • timestampCounterA : IfxPsi5_Psi5_Config , IfxPsi5s_Psi5s_Config
  • timestampCounterB : IfxPsi5_Psi5_Config , IfxPsi5s_Psi5s_Config
  • timestampCounterC : IfxPsi5_Psi5_Config
  • timeStampCounterClock : IfxEdsadc_Edsadc_TimeStampCounter
  • timeStampCounterRunControl : IfxEdsadc_Edsadc_TimeStampCounter
  • timestampEnabled : IfxDma_Dma_ChannelConfig , IfxPsi5s_Psi5s_ReceiveControl
  • timeStampMode : IfxEdsadc_Edsadc_DemodulatorConfig
  • timeStampPreDivider : IfxSent_Sent_Config
  • timestampSelect : IfxPsi5s_Psi5s_ReceiveControl
  • timestampTrigger : IfxEdsadc_Edsadc_DemodulatorConfig
  • timestampTriggerSelect : IfxPsi5s_Psi5s_ReceiveControl
  • timestampWraparoundEnabled : IfxCan_Can_InterruptConfig
  • timIndex : IfxGtm_Tim_In , IfxGtm_Tim_In_Config , IfxGtm_Tim_Timer , IfxGtm_Tim_Timer_Config
  • tint0IsrProvider : IfxEray_Eray_Interrupt
  • tint0Priority : IfxEray_Eray_Interrupt
  • tint1IsrProvider : IfxEray_Eray_Interrupt
  • tint1Priority : IfxEray_Eray_Interrupt
  • tom : IfxGtm_Tom_Dtm_PwmHl_Config , IfxGtm_Tom_Dtm_PwmHl_s , IfxGtm_Tom_Pwm_Config , IfxGtm_Tom_Pwm_Driver , IfxGtm_Tom_PwmHl_Config , IfxGtm_Tom_PwmHl_s , IfxGtm_Tom_Timer , IfxGtm_Tom_Timer_Config , IfxGtm_Tom_ToutMap
  • tomChannel : IfxGtm_Tom_Pwm_Config , IfxGtm_Tom_Pwm_Driver
  • tomIndex : IfxGtm_Tom_Pwm_Driver , IfxGtm_Tom_Timer
  • toutn : IfxGtm_Atom_ToutMap , IfxGtm_Tom_ToutMap
  • toutSel : IfxGtm_Atom_ToutMap , IfxGtm_Tom_ToutMap
  • TPL : IfxGeth_TxDescr3_RF_Bits
  • traco : IfxCan_Can_InterruptConfig
  • trail2InjectionEnabled : IfxQspi_SpiMaster_MoveCounterControl
  • trailingDelay2Prescaler : IfxQspi_SpiMaster_MoveCounterControl
  • tranceiverDelayOffset : IfxCan_Can_FastBaudRate
  • transactionRequestLostInterruptEnabled : IfxDma_Dma_ChannelConfig
  • transactionTagError : IfxHssl_Hssl_errorFlags
  • transferBufferUnderflowInterrupt : IfxSent_Sent_Enable
  • transferBufferUnderflowInterruptNode : IfxSent_Sent_InterruptNodeControl
  • transferCount : IfxDma_Dma_ChannelConfig
  • transferDataInterrupt : IfxSent_Sent_Enable
  • transferDataInterruptNode : IfxSent_Sent_InterruptNodeControl
  • transferInProgress : IfxAsclin_Spi
  • transferRequested : IfxEray_Eray_TransmitControl , IfxEray_SlotConfig
  • transmissionCancellationFinishedEnabled : IfxCan_Can_InterruptConfig
  • transmissionCompletedEnabled : IfxCan_Can_InterruptConfig
  • transmissionMode : IfxEray_Header , IfxMsc_Msc_DownstreamControlConfig
  • transmissionSlotMode : IfxEray_Eray_Succ1Config
  • transmissionStartTime : IfxEray_Eray_Prtc1Control
  • transmit : Spi_ErrorChecks
  • transmitControl : IfxSent_Sent_ChannelConfig
  • transmitErrorConsideredForRSI : IfxPsi5s_Psi5s_GlobalControlConfig
  • transmitMode : IfxPsi5s_Psi5s_AscConfig
  • transmitPayloadIndicatior : IfxEray_Header
  • transmitterOddParityEnabled : IfxPsi5s_Psi5s_AscConfig
  • transmitWakeupIdleTime : IfxEray_Eray_Prtc2Control
  • transmitWakeupLowTime : IfxEray_Eray_Prtc2Control
  • transmitWakeupRepetitions : IfxEray_Eray_Prtc1Control
  • traq : IfxCan_Can_InterruptConfig
  • trigger : IfxCcu6_Icu_Channel , IfxCcu6_Icu_ChannelConfig , IfxCcu6_PwmBc , IfxCcu6_PwmBc_Config , IfxCcu6_Timer , IfxCcu6_Timer_Config , IfxCcu6_TPwm , IfxCcu6_TPwm_Config , IfxGtm_Trig_AdcTrig_Table , IfxGtm_Trig_CanTrig_Table , IfxIom_Driver_LamEventConfig , IfxPmsPm_StandbyConfig , IfxPmsPm_WakeupConfig , IfxStdIf_Timer_Config
  • triggerChannel : IfxGtm_Atom_Timer , IfxGtm_Tom_Timer
  • triggerConfig : IfxEvadc_Adc_QueueConfig
  • triggerEnabled : IfxCcu6_TimerWithTrigger_Base , IfxGtm_Atom_Timer_Base , IfxGtm_Tom_Timer_Base , IfxStm_Timer_Base
  • triggerEvent : IfxEdsadc_Edsadc_ModulatorConfig , IfxEdsadc_ModulatorConfig
  • triggerInput : IfxEdsadc_Edsadc_DemodulatorConfig
  • triggerInterval : IfxEvadc_Adc_FastCompareChannelConfig
  • triggerMode : IfxEvadc_Adc_GatingTriggerConfig
  • triggerMonitorCleared : IfxSent_Sent_InputOutputControl
  • triggerOut : IfxCcu6_TimerWithTrigger_Config , IfxGtm_Atom_Timer_Config , IfxGtm_Tom_Timer_Config
  • triggerPoint : IfxStdIf_Timer_TrigConfig
  • triggerPriority : IfxStm_CompareConfig
  • triggerSource : IfxEvadc_Adc_GatingTriggerConfig , IfxSent_Sent_TransmitControl
  • Ts : Ifx_AngleTrkF32_PosIf
  • TSA : IfxGeth_RxDescr1_WF_Bits
  • TSE : IfxGeth_TxDescr3_RF_Bits
  • tsm : IfxPsi5s_Psi5s_ReceiveTimestamp
  • TTSE_TMWD : IfxGeth_TxDescr2_RF_Bits
  • TTSH : IfxGeth_TxContextDescr1_Bits , IfxGeth_TxDescr1_WF_Bits
  • TTSL : IfxGeth_TxContextDescr0_Bits , IfxGeth_TxDescr0_WF_Bits
  • TTSS : IfxGeth_TxDescr3_WF_Bits
  • tUnit : IfxSent_Sent_ChannelConfig
  • turn : Ifx_AngleTrkF32_PosIf , IfxGpt12_IncrEnc
  • tx : IfxAsclin_Asc , IfxAsclin_Asc_Pins , IfxAsclin_Lin_Pins , IfxAsclin_Spi_Pins , IfxPsi5s_Psi5s_Pins , SpiIf_Ch_
  • txBuf1Size : IfxGeth_Eth_TxChannel
  • txBuffer : IfxAsclin_Asc_Config
  • txBuffer1Size : IfxGeth_Eth_TxChannelConfig
  • txBuffer1StartAddress : IfxGeth_Eth_TxChannelConfig
  • txBufferDataFieldSize : IfxCan_Can_TxConfig
  • txBufferSize : IfxAsclin_Asc_Config
  • txBuffersStartAddress : IfxCan_MessageRAM
  • txChannel : IfxGeth_Eth , IfxGeth_Eth_DmaConfig
  • txClk : IfxGeth_Eth_MiiPins , IfxGeth_Eth_RgmiiPins
  • txCompleted : IfxAsclin_Lin_AcknowledgementFlags
  • txConfig : IfxCan_Can_NodeConfig
  • txCount : IfxGeth_Eth_TxChannel , SpiIf_
  • txCtl : IfxGeth_Eth_RgmiiPins
  • txd0 : IfxGeth_Eth_MiiPins , IfxGeth_Eth_RgmiiPins , IfxGeth_Eth_RmiiPins
  • txd1 : IfxGeth_Eth_MiiPins , IfxGeth_Eth_RgmiiPins , IfxGeth_Eth_RmiiPins
  • txd2 : IfxGeth_Eth_MiiPins , IfxGeth_Eth_RgmiiPins
  • txd3 : IfxGeth_Eth_MiiPins , IfxGeth_Eth_RgmiiPins
  • txDescrList : IfxGeth_Eth_TxChannel , IfxGeth_Eth_TxChannelConfig
  • txDescrPtr : IfxGeth_Eth_TxChannel
  • txDisabled : IfxStdIf_DPipe_
  • txDmaChannel : IfxQspi_SpiMaster_Dma , IfxQspi_SpiSlave_Dma
  • txDmaChannelId : IfxQspi_SpiMaster_Dma , IfxQspi_SpiMaster_DmaConfig , IfxQspi_SpiSlave_Dma , IfxQspi_SpiSlave_DmaConfig
  • txEn : IfxGeth_Eth_MiiPins , IfxGeth_Eth_RmiiPins
  • txEnOut : IfxEray_Eray_NodeA , IfxEray_Eray_NodeB
  • txEnOutMode : IfxEray_Eray_NodeA , IfxEray_Eray_NodeB
  • txEr : IfxGeth_Eth_MiiPins
  • txEventFifoControl : IfxCan_Message
  • txEventFifoEventLostEnabled : IfxCan_Can_InterruptConfig
  • txEventFifoFullEnabled : IfxCan_Can_InterruptConfig
  • txEventFifoNewEntryEnabled : IfxCan_Can_InterruptConfig
  • txEventFifoSize : IfxCan_Can_TxConfig
  • txEventFifoStartAddress : IfxCan_MessageRAM
  • txEventFifoWatermarkEnabled : IfxCan_Can_InterruptConfig
  • txFifoEmptyEnabled : IfxCan_Can_InterruptConfig
  • txFifoInterruptLevel : IfxAsclin_Asc_FifoControl , IfxAsclin_Spi_FifoControl
  • txFifoInterruptMode : IfxAsclin_Asc_FifoControl , IfxAsclin_Spi_FifoControl
  • txFifoMode : IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave_Config
  • txFifoOverflow : IfxAsclin_Asc_ErrorFlags , IfxAsclin_Lin_ErrorFlags , IfxAsclin_Spi_ErrorFlags
  • txFifoOverflowError : IfxQspi_SpiMaster_ErrorFlags , IfxQspi_SpiSlave_ErrorFlags
  • txFifoQueueSize : IfxCan_Can_TxConfig
  • txFifoThreshold : IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave_Config
  • txFifoUnderflowError : IfxQspi_SpiMaster_ErrorFlags , IfxQspi_SpiSlave_ErrorFlags
  • txHandler : SpiIf_Ch_
  • txHeaderEnd : IfxAsclin_Lin_AcknowledgementFlags
  • txHeaderErrorOccurred : IfxAsclin_Lin_FrameControlFlags
  • txHeaderInProgress : IfxAsclin_Lin_FrameControlFlags
  • txInProgress : IfxAsclin_Asc
  • txInterrupt : IfxGeth_Eth_DmaConfig
  • txJob : IfxAsclin_Spi , IfxQspi_SpiSlave
  • txMode : IfxAsclin_Asc_Pins , IfxAsclin_Lin_Pins , IfxAsclin_Spi_Pins , IfxCan_Can_TxConfig , IfxPsi5s_Psi5s_Pins
  • txOut : IfxEray_Eray_NodeA , IfxEray_Eray_NodeB
  • txOutMode : IfxEray_Eray_NodeA , IfxEray_Eray_NodeB
  • txPin : IfxCan_Can_Pins
  • txPinMode : IfxCan_Can_Pins
  • txPriority : IfxAsclin_Asc_InterruptConfig , IfxAsclin_Lin_InterruptConfig , IfxAsclin_Spi_InterruptConfig , SpiIf_Config
  • txQueue : IfxGeth_Eth_MtlConfig
  • txQueueSize : IfxGeth_Eth_TxQueueConfig
  • txQueueUnderflowInterruptEnabled : IfxGeth_Eth_TxQueueConfig
  • txResponseEnd : IfxAsclin_Lin_AcknowledgementFlags
  • txResponseErrorOccurred : IfxAsclin_Lin_FrameControlFlags
  • txResponseInProgress : IfxAsclin_Lin_FrameControlFlags
  • txResponseLength : IfxAsclin_Lin_FrameDataControl
  • txSchedulingAlgorithm : IfxGeth_Eth_MtlConfig
  • txSendHeaderOnly : IfxAsclin_Lin_FrameControlFlags
  • txSendResponse : IfxAsclin_Lin_FrameControlFlags
  • txTimestamp : IfxAsclin_Asc
  • txTransmittedHeader : IfxAsclin_Lin_EnabledInterrupts
  • txTransmittedResponse : IfxAsclin_Lin_EnabledInterrupts
  • type : IfxCan_Can_Frame , IfxCan_Filter , IfxPsi5_Psi5_Clock , IfxPsi5s_Psi5s_Clock
  • typeOfService : IfxAsclin_Asc_InterruptConfig , IfxAsclin_Lin_InterruptConfig , IfxAsclin_Spi_InterruptConfig , IfxCan_GroupInterruptConfig , IfxCcu6_Icu_InterruptConfig , IfxCcu6_PwmBc_InterruptConfig , IfxCcu6_Timer_InterruptConfig , IfxCcu6_TPwm_InterruptConfig , IfxStm_CompareConfig


iLLD_TC38A: Data Fields - Variables

- u -

  • U : IfxGeth_RxDescr0 , IfxGeth_RxDescr1 , IfxGeth_RxDescr2 , IfxGeth_RxDescr3 , IfxGeth_TxDescr0 , IfxGeth_TxDescr1 , IfxGeth_TxDescr2 , IfxGeth_TxDescr3 , IfxGtm_Spe_InputPattern , IfxGtm_Spe_OutputPattern , IfxIom_Iom_EcmGlobalEventSelection
  • uartFrameCount : IfxPsi5s_Psi5s_ReceiveControl
  • ucPtr : Ifx_Ssw_CTablePtr
  • UF : IfxGeth_TxDescr3_WF_Bits
  • uiPtr : Ifx_Ssw_CTablePtr
  • uk : Ifx_ClpxFloat32_Integral , Ifx_IntegralF32 , Ifx_RampF32
  • ullPtr : Ifx_Ssw_CTablePtr
  • uncorrectableErrorThreshold : IfxMtu_MbistSshConfig
  • underflowInterrupt : IfxMsc_Msc_InterruptConfig
  • underflowInterruptNode : IfxMsc_Msc_InterruptConfig
  • unexpectedError : IfxHssl_Hssl_errorFlags
  • update : IfxCcu6_PwmHl_Mode , IfxCcu6_PwmHl_s , IfxGpt12_IncrEnc , IfxGtm_Atom_Dtm_PwmHl_Mode , IfxGtm_Atom_Dtm_PwmHl_s , IfxGtm_Atom_PwmHl_Mode , IfxGtm_Atom_PwmHl_s , IfxGtm_Tom_Dtm_PwmHl_Mode , IfxGtm_Tom_Dtm_PwmHl_s , IfxGtm_Tom_PwmHl_Mode , IfxGtm_Tom_PwmHl_s , IfxStdIf_Pos_
  • updateAndShift : IfxGtm_Atom_Dtm_PwmHl_Mode , IfxGtm_Atom_Dtm_PwmHl_s , IfxGtm_Atom_PwmHl_Mode , IfxGtm_Atom_PwmHl_s , IfxGtm_Tom_Dtm_PwmHl_Mode , IfxGtm_Tom_Dtm_PwmHl_s , IfxGtm_Tom_PwmHl_Mode , IfxGtm_Tom_PwmHl_s
  • updateInputFrequency : IfxStdIf_Timer_
  • updatePeriod : IfxGpt12_IncrEnc , IfxStdIf_Pos_Config
  • updatePulse : IfxGtm_Atom_Dtm_PwmHl_Mode , IfxGtm_Atom_Dtm_PwmHl_s , IfxGtm_Atom_PwmHl_Mode , IfxGtm_Atom_PwmHl_s , IfxGtm_Tom_Dtm_PwmHl_Mode , IfxGtm_Tom_Dtm_PwmHl_s , IfxGtm_Tom_PwmHl_Mode , IfxGtm_Tom_PwmHl_s
  • upperBoundary : IfxEvadc_Adc_ChannelConfig
  • upperLimit : IfxAsclin_Lin_BaudrateDetection
  • upperTemperatureLimit : IfxDts_Dts_Config
  • upstreamChannelFrameType : IfxMsc_Msc_UpstreamStatusConfig
  • upstreamChannelReceivingRate : IfxMsc_Msc_UpstreamStatusConfig
  • upstreamConfig : IfxMsc_Msc_Config
  • upstreamTimeoutInterrupt : IfxMsc_Msc_InterruptConfig
  • upstreamTimeoutInterruptNode : IfxMsc_Msc_InterruptConfig
  • upstreamTimeoutPrescaler : IfxMsc_Msc_UpstreamStatusConfig
  • upstreamTimeoutValue : IfxMsc_Msc_UpstreamStatusConfig
  • useDma : IfxFce_Crc_Crc , IfxFce_Crc_CrcConfig , IfxQspi_SpiMaster_Dma , IfxQspi_SpiMaster_DmaConfig , IfxQspi_SpiSlave_Dma , IfxQspi_SpiSlave_DmaConfig
  • useWutStandbyAutoStopMode : IfxPmsPm_StandbyConfig
  • usPtr : Ifx_Ssw_CTablePtr


iLLD_TC38A: Data Fields - Variables

- v -

  • valid : IfxGtm_Spe_PatternSignal
  • value : Ifx_InternalMux_MuxConfig , IfxGtm_Tim_InputSourceSelect , IfxPmsEvr_StepDownRegulatorRegConfig , IfxPsi5_Psi5_Rds , IfxScuCcu_CcuconRegConfig , IfxScuCcu_FlashWaitstateConfig
  • vddUnderVoltageThresholdLevel : IfxPmsPm_StandbyConfig
  • verbose : IfxPsi5_Psi5_ReceiveControl
  • verboseForAsynchronousMode : IfxPsi5_Psi5_ReceiveControl
  • vextUnderVoltageThresholdLevel : IfxPmsPm_StandbyConfig
  • VLTV : IfxGeth_TxContextDescr3_Bits
  • VT : IfxGeth_TxContextDescr3_Bits
  • VTIR : IfxGeth_TxDescr2_RF_Bits


iLLD_TC38A: Data Fields - Variables

- w -

  • W : IfxGeth_RxDescr0 , IfxGeth_RxDescr1 , IfxGeth_RxDescr2 , IfxGeth_RxDescr3 , IfxGeth_TxDescr0 , IfxGeth_TxDescr1 , IfxGeth_TxDescr2 , IfxGeth_TxDescr3
  • waitForReadMode : IfxEvadc_Adc_ChannelConfig
  • waitingTime : Timer_Config , TPwm_Config
  • waitInSecs : IfxPmsEvr_initSequencePhase
  • waitTime : IfxScuCcu_InitialStepConfig , IfxScuCcu_PllStepConfig
  • wakeup : IfxPmsPm_WakeupConfig
  • wakeupPatternChannel : IfxEray_Eray_Succ1Config
  • warningStatusEnabled : IfxCan_Can_InterruptConfig
  • watchdogEnabled : IfxCan_Can_InterruptConfig
  • watchdogErrorInterrupt : IfxSent_Sent_Enable
  • watchdogErrorInterruptNode : IfxSent_Sent_InterruptNodeControl
  • watchdogTimeoutErrorFlag : IfxPsi5s_Psi5s_ReceivedBits
  • watchdogTimerLimit : IfxPsi5_Psi5_ChannelConfig , IfxPsi5s_Psi5s_ChannelConfig
  • watchDogTimerLimit : IfxSent_Sent_ChannelConfig
  • watchdogTimerModeSelect : IfxPsi5s_Psi5s_ReceiveControl
  • wati : IfxCan_Can_InterruptConfig
  • windowSize : IfxEdsadc_Edsadc_IntegratorConfig
  • wrapDestinationInterruptEnabled : IfxDma_Dma_ChannelConfig
  • wrapSourceInterruptEnabled : IfxDma_Dma_ChannelConfig
  • write : IfxStdIf_DPipe_
  • writerWaitx : Ifx_Fifo_Shared
  • wrongStatusNibbleErrorInterrupt : IfxSent_Sent_Enable
  • wutClock : IfxPmsPm_StandbyConfig
  • wutReloadValue : IfxPmsPm_StandbyConfig


iLLD_TC38A: Data Fields - Variables

- x -

  • x : IfxGtm_Spe_PatternSignal
  • xcrc : IfxPsi5s_Psi5s_ReceivedBits
  • xcrcError : IfxPsi5s_Psi5s_ReceivedBits
  • xcrcErrorConsideredForRSI : IfxPsi5s_Psi5s_GlobalControlConfig
  • xtalFrequency : IfxScuCcu_pllsParameterConfig
  • xxxCH1 : IfxGtm_Tom_TGC


iLLD_TC38A: Data Fields - Variables

- y -

  • y : IfxGtm_Spe_PatternSignal


iLLD_TC38A: Data Fields - Variables

- z -

  • z : IfxGtm_Spe_PatternSignal
  • zeroIsrPriority : IfxGpt12_IncrEnc_Config
  • zeroIsrProvider : IfxGpt12_IncrEnc_Config


iLLD_TC38A: File List

File List
Here is a list of all files with brief descriptions:
Assert.c | Assert functions
Assert.h | Assert functions
Bsp.c | Board support package
Bsp.h | Board support package
CompilerDcc.c |
CompilerDcc.h |
CompilerGhs.c |
CompilerGhs.h |
CompilerGnuc.c |
CompilerGnuc.h |
Compilers.h |
CompilerTasking.c |
CompilerTasking.h |
Icu.h | ICU interface
Ifx_AngleTrkF32.c | Angle-tracking observer for sin/cos analog position sensor
Ifx_AngleTrkF32.h | Angle-tracking observer for sin/cos analog position sensor
Ifx_Assert.h | Assert functions
Ifx_Cf32.c | Floating point signal, vector, and matrix library
Ifx_Cf32.h | Floating point signal, vector, and matrix library
Ifx_CircularBuffer.asm.c | Circular buffer functions (assembler implementation)
Ifx_CircularBuffer.c | Circular buffer functions in C language
Ifx_CircularBuffer.h | Circular buffer functions
Ifx_Console.c | Main Ifx_Console module implementation file
Ifx_Console.h | Main Console module header file
Ifx_Crc.c | CRC algorithm
Ifx_Crc.h | CRC algorithm
Ifx_DateTime.c | Date and time functions
Ifx_DateTime.h | Date and time functions
Ifx_FftF32.c | Floating-point Fast Fourier Transform
Ifx_FftF32.h | Floating-point Fast Fourier Transform
Ifx_FftF32_BitReverseTable.c | Bit-reversal lookup for Floating-point Fast Fourier Transform
Ifx_FftF32_TwiddleTable.c | Floating-point Fast Fourier Transform Twiddle-Factors
Ifx_Fifo.c | FIFO functions
Ifx_Fifo.h | FIFO buffer functions
Ifx_GlobalResources.c |
Ifx_GlobalResources.h | Handling of global resources
Ifx_IntegralF32.c | Discrete integral approximation
Ifx_IntegralF32.h | Discrete integral approximation
Ifx_InternalMux.c | Mux configuration functions
Ifx_InternalMux.h | Mux configuration functions
Ifx_LowPassPt1F32.c | Low pass filter PT1
Ifx_LowPassPt1F32.h | Low pass filter PT1
Ifx_Lut.h | Lookup defintion with fixed-point angle data type
Ifx_LutAtan2F32.c | ATAN2 lookup functions with fixed-point angle data type
Ifx_LutAtan2F32.h | Floating point signal, vector, and matrix library
Ifx_LutAtan2F32_Table.c | Table data for ATAN2 lookup functions
Ifx_LutIndexedLinearF32.h | Look-up functionality
Ifx_LutLinearF32.c | Linear look-up function
Ifx_LutLinearF32.h | Look-up functionality
Ifx_LutLSincosF32.c | Table data for linear interpolation Sin/Cos lookup functions
Ifx_LutLSincosF32.h | Sin/Cos linear approximated lookup functions with fixed-point angle data type
Ifx_LutSincosF32.c | Sin/Cos lookup functions with fixed-point angle data type
Ifx_LutSincosF32.h | Sin/Cos lookup functions with fixed-point angle data type
Ifx_LutSincosF32_Table.c | Table data for Sin/Cos lookup functions
Ifx_RampF32.c | Ramp function
Ifx_RampF32.h | Ramp function
Ifx_Shell.c | Shell functions
Ifx_Shell.h | Shell functions
Ifx_Ssw.h | Startup Software configuration. Can configure which core to be enabled
Ifx_Ssw_Compilers.h | Startup Software for compiler options
Ifx_Ssw_CompilersDcc.h | Startup Software for DCC compiler options
Ifx_Ssw_CompilersGhs.h | Startup Software for GHS compiler options
Ifx_Ssw_CompilersGnuc.h | Startup Software for GNU compiler options
Ifx_Ssw_CompilersTasking.h | Startup Software for Tasking compiler options
Ifx_Ssw_Infra.c | Startup Software support functions
Ifx_Ssw_Infra.h | Startup Software support functions
Ifx_Ssw_LegacySwCfg.h | Startup Software to support legacy controller options
Ifx_Ssw_Tc0.c | Startup Software for Core0
Ifx_Ssw_Tc1.c | Startup Software for Core1
Ifx_Ssw_Tc2.c | Startup Software for Core2
Ifx_Ssw_Tc3.c | Startup Software for Core3
Ifx_Types.h | This files defines all types used by the IFX HAL and libraries
Ifx_TypesDcc.h |
Ifx_TypesGhs.h |
Ifx_TypesGnuc.h |
Ifx_TypesTasking.h |
Ifx_WndF32.h | Windowing function
Ifx_WndF32_BlackmanHarrisTable.c | Lookup table for Blackman-Harris window function
Ifx_WndF32_HannTable.c | Lookup table for Hann window function
IfxAsclin.c | ASCLIN basic functionality
IfxAsclin.h | ASCLIN basic functionality
IfxAsclin_Asc.c | ASCLIN ASC details
IfxAsclin_Asc.h | ASCLIN ASC details
IfxAsclin_cfg.c | ASCLIN on-chip implementation data
IfxAsclin_cfg.h | ASCLIN on-chip implementation data
IfxAsclin_Lin.c | ASCLIN LIN details
IfxAsclin_Lin.h | ASCLIN LIN details
IfxAsclin_PinMap.c | ASCLIN I/O map
IfxAsclin_PinMap.h | ASCLIN I/O map
IfxAsclin_Spi.c | ASCLIN SPI details
IfxAsclin_Spi.h | ASCLIN SPI details
IfxCan.c | CAN basic functionality
IfxCan.h | CAN basic functionality
IfxCan_Can.c | CAN CAN details
IfxCan_Can.h | CAN CAN details
IfxCan_cfg.c | CAN on-chip implementation data
IfxCan_cfg.h | CAN on-chip implementation data
IfxCan_PinMap.c | CAN I/O map
IfxCan_PinMap.h | CAN I/O map
IfxCcu6.c | CCU6 basic functionality
IfxCcu6.h | CCU6 basic functionality
IfxCcu6_cfg.c | CCU6 on-chip implementation data
IfxCcu6_cfg.h | CCU6 on-chip implementation data
IfxCcu6_Icu.c | CCU6 ICU details
IfxCcu6_Icu.h | CCU6 ICU details
IfxCcu6_PinMap.c | CCU6 I/O map
IfxCcu6_PinMap.h | CCU6 I/O map
IfxCcu6_PwmBc.c | CCU6 PWMBC details
IfxCcu6_PwmBc.h | CCU6 PWMBC details
IfxCcu6_PwmHl.c | CCU6 PWMHL details
IfxCcu6_PwmHl.h | CCU6 PWMHL details
IfxCcu6_Timer.c | CCU6 TIMER details
IfxCcu6_Timer.h | CCU6 TIMER details
IfxCcu6_TimerWithTrigger.c | CCU6 TIMERWITHTRIGGER details
IfxCcu6_TimerWithTrigger.h | CCU6 TIMERWITHTRIGGER details
IfxCcu6_TPwm.c | CCU6 TPWM details
IfxCcu6_TPwm.h | CCU6 TPWM details
IfxConvctrl.c | CONVCTRL basic functionality
IfxConvctrl.h | CONVCTRL basic functionality
IfxConvctrl_cfg.h | CONVCTRL on-chip implementation data
IfxCpu.c | CPU basic functionality
IfxCpu.h | CPU basic functionality
IfxCpu_cfg.c | CPU on-chip implementation data
IfxCpu_cfg.h | CPU on-chip implementation data
IfxCpu_Intrinsics.h |
IfxCpu_IntrinsicsDcc.h |
IfxCpu_IntrinsicsGhs.h |
IfxCpu_IntrinsicsGnuc.h |
IfxCpu_IntrinsicsTasking.h |
IfxCpu_Irq.c | This file contains the APIs for Interrupt related functions
IfxCpu_Irq.h | This file contains the APIs for Interrupt related functions
IfxCpu_Trap.c | This file contains the APIs for Trap related functions
IfxCpu_Trap.h |
IfxDma.c | DMA basic functionality
IfxDma.h | DMA basic functionality
IfxDma_cfg.c | DMA on-chip implementation data
IfxDma_cfg.h | DMA on-chip implementation data
IfxDma_Dma.c | DMA DMA details
IfxDma_Dma.h | DMA DMA details
IfxDmu_PinMap.c | DMU I/O map
IfxDmu_PinMap.h | DMU I/O map
IfxDts.c | DTS basic functionality
IfxDts.h | DTS basic functionality
IfxDts_cfg.h | DTS on-chip implementation data
IfxDts_Dts.c | DTS DTS details
IfxDts_Dts.h | DTS DTS details
IfxEdsadc.c | EDSADC basic functionality
IfxEdsadc.h | EDSADC basic functionality
IfxEdsadc_cfg.h | EDSADC on-chip implementation data
IfxEdsadc_Edsadc.c | EDSADC EDSADC details
IfxEdsadc_Edsadc.h | EDSADC EDSADC details
IfxEdsadc_PinMap.c | EDSADC I/O map
IfxEdsadc_PinMap.h | EDSADC I/O map
IfxEray.c | ERAY basic functionality
IfxEray.h | ERAY basic functionality
IfxEray_cfg.c | ERAY on-chip implementation data
IfxEray_cfg.h | ERAY on-chip implementation data
IfxEray_Eray.c | ERAY ERAY details
IfxEray_Eray.h | ERAY ERAY details
IfxEray_PinMap.c | ERAY I/O map
IfxEray_PinMap.h | ERAY I/O map
IfxEvadc.c | EVADC basic functionality
IfxEvadc.h | EVADC basic functionality
IfxEvadc_Adc.c | EVADC ADC details
IfxEvadc_Adc.h | EVADC ADC details
IfxEvadc_cfg.c | EVADC on-chip implementation data
IfxEvadc_cfg.h | EVADC on-chip implementation data
IfxEvadc_PinMap.c | EVADC I/O map
IfxEvadc_PinMap.h | EVADC I/O map
IfxFce.c | FCE basic functionality
IfxFce.h | FCE basic functionality
IfxFce_cfg.h | FCE on-chip implementation data
IfxFce_Crc.c | FCE CRC details
IfxFce_Crc.h | FCE CRC details
IfxFlash.c | FLASH basic functionality
IfxFlash.h | FLASH basic functionality
IfxFlash_cfg.c | FLASH on-chip implementation data
IfxFlash_cfg.h | FLASH on-chip implementation data
IfxGeth.c | GETH basic functionality
IfxGeth.h | GETH basic functionality
IfxGeth_cfg.c | GETH on-chip implementation data
IfxGeth_cfg.h | GETH on-chip implementation data
IfxGeth_Eth.c | GETH ETH details
IfxGeth_Eth.h | GETH ETH details
IfxGeth_PinMap.c | GETH I/O map
IfxGeth_PinMap.h | GETH I/O map
IfxGlobal_cfg.h | Global definitions
IfxGpt12.c | GPT12 basic functionality
IfxGpt12.h | GPT12 basic functionality
IfxGpt12_cfg.h | GPT12 on-chip implementation data
IfxGpt12_IncrEnc.c | GPT12 INCRENC details
IfxGpt12_IncrEnc.h | GPT12 INCRENC details
IfxGpt12_PinMap.c | GPT12 I/O map
IfxGpt12_PinMap.h | GPT12 I/O map
IfxGtm.c | GTM basic functionality
IfxGtm.h | GTM basic functionality
IfxGtm_Atom.c | GTM basic functionality
IfxGtm_Atom.h | GTM basic functionality
IfxGtm_Atom_Dtm_PwmHl.c | GTM DTM_PWMHL details
IfxGtm_Atom_Dtm_PwmHl.h | GTM DTM_PWMHL details
IfxGtm_Atom_Pwm.c | GTM PWM details
IfxGtm_Atom_Pwm.h | GTM PWM details
IfxGtm_Atom_PwmHl.c | GTM PWMHL details
IfxGtm_Atom_PwmHl.h | GTM PWMHL details
IfxGtm_Atom_Timer.c | GTM TIMER details
IfxGtm_Atom_Timer.h | GTM TIMER details
IfxGtm_cfg.c | GTM on-chip implementation data
IfxGtm_cfg.h | GTM on-chip implementation data
IfxGtm_Cmu.c | GTM basic functionality
IfxGtm_Cmu.h | GTM basic functionality
IfxGtm_Dpll.c | GTM basic functionality
IfxGtm_Dpll.h | GTM basic functionality
IfxGtm_Dtm.c | GTM basic functionality
IfxGtm_Dtm.h | GTM basic functionality
IfxGtm_PinMap.c | GTM I/O map
IfxGtm_PinMap.h | GTM I/O map
IfxGtm_Psm.c | GTM basic functionality
IfxGtm_Psm.h | GTM basic functionality
IfxGtm_Spe.c | GTM basic functionality
IfxGtm_Spe.h | GTM basic functionality
IfxGtm_Tbu.c | GTM basic functionality
IfxGtm_Tbu.h | GTM basic functionality
IfxGtm_Tim.c | GTM basic functionality
IfxGtm_Tim.h | GTM basic functionality
IfxGtm_Tim_In.c | GTM IN details
IfxGtm_Tim_In.h | GTM IN details
IfxGtm_Tim_Timer.c | GTM TIMER details
IfxGtm_Tim_Timer.h | GTM TIMER details
IfxGtm_Tom.c | GTM basic functionality
IfxGtm_Tom.h | GTM basic functionality
IfxGtm_Tom_Dtm_PwmHl.c | GTM DTM_PWMHL details
IfxGtm_Tom_Dtm_PwmHl.h | GTM DTM_PWMHL details
IfxGtm_Tom_Pwm.c | GTM PWM details
IfxGtm_Tom_Pwm.h | GTM PWM details
IfxGtm_Tom_PwmHl.c | GTM PWMHL details
IfxGtm_Tom_PwmHl.h | GTM PWMHL details
IfxGtm_Tom_Timer.c | GTM TIMER details
IfxGtm_Tom_Timer.h | GTM TIMER details
IfxGtm_Trig.c | GTM TRIG details
IfxGtm_Trig.h | GTM TRIG details
IfxHssl.c | HSSL basic functionality
IfxHssl.h | HSSL basic functionality
IfxHssl_cfg.c | HSSL on-chip implementation data
IfxHssl_cfg.h | HSSL on-chip implementation data
IfxHssl_Hssl.c | HSSL HSSL details
IfxHssl_Hssl.h | HSSL HSSL details
IfxI2c.c | I2C basic functionality
IfxI2c.h | I2C basic functionality
IfxI2c_cfg.c | I2C on-chip implementation data
IfxI2c_cfg.h | I2C on-chip implementation data
IfxI2c_I2c.c | I2C I2C details
IfxI2c_I2c.h | I2C I2C details
IfxI2c_PinMap.c | I2C I/O map
IfxI2c_PinMap.h | I2C I/O map
IfxIom.c | IOM basic functionality
IfxIom.h | IOM basic functionality
IfxIom_cfg.h | IOM on-chip implementation data
IfxIom_Driver.c | IOM DRIVER details
IfxIom_Driver.h | IOM DRIVER details
IfxIom_Iom.c | IOM IOM details
IfxIom_Iom.h | IOM IOM details
IfxLldVersion.h |
IfxLmu_cfg.h | Lmu on-chip implementation data
IfxMsc.c | MSC basic functionality
IfxMsc.h | MSC basic functionality
IfxMsc_cfg.c | MSC on-chip implementation data
IfxMsc_cfg.h | MSC on-chip implementation data
IfxMsc_Msc.c | MSC MSC details
IfxMsc_Msc.h | MSC MSC details
IfxMsc_PinMap.c | MSC I/O map
IfxMsc_PinMap.h | MSC I/O map
IfxMtu.c | MTU basic functionality
IfxMtu.h | MTU basic functionality
IfxMtu_cfg.c | Mtu on-chip implementation data
IfxMtu_cfg.h | Mtu on-chip implementation data
IfxPms_cfg.h | PMS on-chip implementation data
IfxPms_PinMap.c | PMS I/O map
IfxPms_PinMap.h | PMS I/O map
IfxPmsEvr.c | PMS basic functionality
IfxPmsEvr.h | PMS basic functionality
IfxPmsPm.c | PMS basic functionality
IfxPmsPm.h | PMS basic functionality
IfxPort.c | PORT basic functionality
IfxPort.h | PORT basic functionality
IfxPort_cfg.c | PORT on-chip implementation data
IfxPort_cfg.h | PORT on-chip implementation data
IfxPort_Io.c | PORT IO details
IfxPort_Io.h | PORT IO details
IfxPort_PinMap.c | PORT I/O map
IfxPort_PinMap.h | PORT I/O map
IfxPsi5.c | PSI5 basic functionality
IfxPsi5.h | PSI5 basic functionality
IfxPsi5_cfg.c | PSI5 on-chip implementation data
IfxPsi5_cfg.h | PSI5 on-chip implementation data
IfxPsi5_PinMap.c | PSI5 I/O map
IfxPsi5_PinMap.h | PSI5 I/O map
IfxPsi5_Psi5.c | PSI5 PSI5 details
IfxPsi5_Psi5.h | PSI5 PSI5 details
IfxPsi5s.c | PSI5S basic functionality
IfxPsi5s.h | PSI5S basic functionality
IfxPsi5s_cfg.h | PSI5S on-chip implementation data
IfxPsi5s_PinMap.c | PSI5S I/O map
IfxPsi5s_PinMap.h | PSI5S I/O map
IfxPsi5s_Psi5s.c | PSI5S PSI5S details
IfxPsi5s_Psi5s.h | PSI5S PSI5S details
IfxQspi.c | QSPI basic functionality
IfxQspi.h | QSPI basic functionality
IfxQspi_cfg.c | QSPI on-chip implementation data
IfxQspi_cfg.h | QSPI on-chip implementation data
IfxQspi_PinMap.c | QSPI I/O map
IfxQspi_PinMap.h | QSPI I/O map
IfxQspi_SpiMaster.c | QSPI SPIMASTER details
IfxQspi_SpiMaster.h | QSPI SPIMASTER details
IfxQspi_SpiSlave.c | QSPI SPISLAVE details
IfxQspi_SpiSlave.h | QSPI SPISLAVE details
IfxScu_cfg.c | SCU on-chip implementation data
IfxScu_cfg.h | SCU on-chip implementation data
IfxScu_PinMap.c | SCU I/O map
IfxScu_PinMap.h | SCU I/O map
IfxScuCcu.c | SCU basic functionality
IfxScuCcu.h | SCU basic functionality
IfxScuEru.c | SCU basic functionality
IfxScuEru.h | SCU basic functionality
IfxScuLbist.c | SCU basic functionality
IfxScuLbist.h | SCU basic functionality
IfxScuRcu.c | SCU basic functionality
IfxScuRcu.h | SCU basic functionality
IfxScuWdt.asm.h | SCU basic functionality
IfxScuWdt.c | SCU basic functionality
IfxScuWdt.h | SCU basic functionality
IfxSent.c | SENT basic functionality
IfxSent.h | SENT basic functionality
IfxSent_cfg.c | SENT on-chip implementation data
IfxSent_cfg.h | SENT on-chip implementation data
IfxSent_PinMap.c | SENT I/O map
IfxSent_PinMap.h | SENT I/O map
IfxSent_Sent.c | SENT SENT details
IfxSent_Sent.h | SENT SENT details
IfxSmu.c | SMU basic functionality
IfxSmu.h | SMU basic functionality
IfxSmu_cfg.c | Smu on-chip implementation data
IfxSmu_cfg.h | Smu on-chip implementation data
IfxSmu_PinMap.c | SMU I/O map
IfxSmu_PinMap.h | SMU I/O map
IfxSmu_Smu.c | SMU SMU details
IfxSmu_Smu.h | SMU SMU details
IfxSmuStdby.c | SMU basic functionality
IfxSmuStdby.h | SMU basic functionality
IfxSrc.c | SRC basic functionality
IfxSrc.h | SRC basic functionality
IfxSrc_cfg.c | SRC on-chip implementation data
IfxSrc_cfg.h | SRC on-chip implementation data
IfxStdIf.h | Standard interface types
IfxStdIf_DPipe.c | Standard interface: Data Pipe
IfxStdIf_DPipe.h | Standard interface: Data Pipe
IfxStdIf_Pos.c | Standard interface: Position interface
IfxStdIf_Pos.h | Standard interface: Position interface
IfxStdIf_PwmHl.c | Standard interface: Multi-channels, dual-complementary PWM interface
IfxStdIf_PwmHl.h | Standard interface: Multi-channels, dual-complementary PWM interface
IfxStdIf_Timer.c | Standard interface: Timer
IfxStdIf_Timer.h | Standard interface: Timer
IfxStm.c | STM basic functionality
IfxStm.h | STM basic functionality
IfxStm_cfg.c | STM on-chip implementation data
IfxStm_cfg.h | STM on-chip implementation data
IfxStm_Timer.c | STM TIMER details
IfxStm_Timer.h | STM TIMER details
lld_api.c |
lld_codingRules.c |
lld_codingRules_codeFormating.c |
lld_codingRules_commonApis.c |
lld_conventions.c |
lld_conventionsDoxygen.c |
lld_dosanddont.c |
lld_dosanddont_enumUsage.c |
lld_dosanddont_namingConvention.c |
lld_dosanddont_optimisation.c |
lld_filesAndConfig.c |
lld_structure.c |
lld_versioning.c |
mainpage.c |
Platform_Types.h |
PwmHl.h | Multi-channels, dual-complementary PWM interface
SpiIf.c | SPI interface
SpiIf.h | SPI interface types
Timer.h | Timer interface
TPwm.h | TPWM interface


iLLD_TC38A: Assert.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Bsp
Functions | Variables
Assert.c File Reference

Assert functions. More...

#include "Assert.h"
Include dependency graph for Assert.c:

Go to the source code of this file.

Functions

void | Ifx_Assert_doLevel (uint8 level, pchar __assertion, pchar __file, unsigned int __line, pchar __function)
boolean | Ifx_Assert_doValidate (boolean expr, uint8 level, pchar __assertion, pchar __file, unsigned int __line, pchar __function)

Variables

const pchar Assert_level [6]

Detailed Description

Assert functions.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-27 20:08:29 GMT
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Assert.c.

Variable Documentation

◆ Assert_level

const pchar Assert_level[6]
Initial value:
= {
"OFF",
"FAILURE",
"ERROR",
"WARNING",
"INFO",
"DEBUG"
}

Definition at line 65 of file Assert.c.

Referenced by Ifx_Assert_doLevel(), and Ifx_Assert_doValidate().


iLLD_TC38A: CompilerDcc.c File Reference

  • Infra
  • Platform
  • Tricore
  • Compilers
CompilerDcc.c File Reference
#include "Cpu/Std/Ifx_Types.h"
#include "Compilers.h"
Include dependency graph for CompilerDcc.c:

Go to the source code of this file.

Detailed Description

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-27 20:08:39 GMT
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file CompilerDcc.c.


iLLD_TC38A: CompilerDcc.h File Reference

  • Infra
  • Platform
  • Tricore
  • Compilers
Macros
CompilerDcc.h File Reference
#include <stddef.h>
Include dependency graph for CompilerDcc.h:

Go to the source code of this file.

Macros

#define | IFXCOMPILER_CORE_LINKER_SYMBOLS(cpu)
#define | __USTACK(cpu) __USTACK##cpu
#define | __ISTACK(cpu) __ISTACK##cpu
#define | __INTTAB_CPU(cpu) __INTTAB_CPU##cpu
#define | __TRAPTAB_CPU(cpu) __TRAPTAB_CPU##cpu
#define | __CSA(cpu) __CSA##cpu
#define | __CSA_END(cpu) __CSA##cpu##_END
#define | IFXCOMPILER_COMMON_LINKER_SYMBOLS() __asm("\t .weak __A8_MEM, __A9_MEM");
#define | __INTTAB(cpu) __INTTAB_CPU##cpu
#define | __TRAPTAB(cpu) __TRAPTAB_CPU##cpu
#define | __SDATA1(cpu) _SMALL_DATA_
#define | __SDATA2(cpu) _LITERAL_DATA_
#define | __SDATA3(cpu) __A8_MEM
#define | __SDATA4(cpu) __A9_MEM
#define | IFX_INLINE static __inline__
#define | IFX_PACKED
#define | COMPILER_NAME "DCC"
#define | COMPILER_VERSION __VERSION__
#define | COMPILER_REVISION 0
#define | IFX_INTERRUPT_FAST IFX_INTERRUPT
#define | IFX_INTERRUPT(isr, vectabNum, prio) IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio)
#define | IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio) void __interrupt(prio) __vector_table(vectabNum) isr(void)
#define | IFX_INTERRUPT_LEGACY(isr, vectabNum, prio)
#define | IFX_ALIGN(n) __attribute__ ((aligned(n)))
#define | IFX_FAR_ABS
#define | IFX_NEAR_ABS
#define | IFX_REL_A0
#define | IFX_REL_A1
#define | IFX_REL_A8
#define | IFX_REL_A9

Detailed Description

Version
iLLD_New
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file CompilerDcc.h.

Macro Definition Documentation

◆ __CSA

#define __CSA ( cpu ) __CSA##cpu

Definition at line 74 of file CompilerDcc.h.

Referenced by __Core1_start(), __Core2_start(), and __Core3_start().

◆ __CSA_END

#define __CSA_END ( cpu ) __CSA##cpu##_END

Definition at line 75 of file CompilerDcc.h.

Referenced by __Core1_start(), __Core2_start(), and __Core3_start().

◆ __INTTAB

#define __INTTAB ( cpu ) __INTTAB_CPU##cpu

Definition at line 85 of file CompilerDcc.h.

Referenced by __Core1_start(), __Core2_start(), and __Core3_start().

◆ __INTTAB_CPU

#define __INTTAB_CPU ( cpu ) __INTTAB_CPU##cpu

Definition at line 72 of file CompilerDcc.h.

◆ __ISTACK

#define __ISTACK ( cpu ) __ISTACK##cpu

Definition at line 71 of file CompilerDcc.h.

Referenced by __Core1_start(), __Core2_start(), and __Core3_start().

◆ __SDATA1

#define __SDATA1 ( cpu ) _SMALL_DATA_

Definition at line 90 of file CompilerDcc.h.

Referenced by __Core1_start(), __Core2_start(), and __Core3_start().

◆ __SDATA2

#define __SDATA2 ( cpu ) _LITERAL_DATA_

Definition at line 91 of file CompilerDcc.h.

Referenced by __Core1_start(), __Core2_start(), and __Core3_start().

◆ __SDATA3

#define __SDATA3 ( cpu ) __A8_MEM

Definition at line 92 of file CompilerDcc.h.

Referenced by __Core1_start(), __Core2_start(), and __Core3_start().

◆ __SDATA4

#define __SDATA4 ( cpu ) __A9_MEM

Definition at line 93 of file CompilerDcc.h.

Referenced by __Core1_start(), __Core2_start(), and __Core3_start().

◆ __TRAPTAB

#define __TRAPTAB ( cpu ) __TRAPTAB_CPU##cpu

Definition at line 88 of file CompilerDcc.h.

Referenced by __Core1_start(), __Core2_start(), and __Core3_start().

◆ __TRAPTAB_CPU

#define __TRAPTAB_CPU ( cpu ) __TRAPTAB_CPU##cpu

Definition at line 73 of file CompilerDcc.h.

◆ __USTACK

#define __USTACK ( cpu ) __USTACK##cpu

Definition at line 70 of file CompilerDcc.h.

Referenced by __Core1_start(), __Core2_start(), and __Core3_start().

◆ COMPILER_NAME

#define COMPILER_NAME "DCC"

Definition at line 103 of file CompilerDcc.h.

◆ COMPILER_REVISION

#define COMPILER_REVISION 0

Definition at line 106 of file CompilerDcc.h.

◆ COMPILER_VERSION

#define COMPILER_VERSION __VERSION__

Definition at line 104 of file CompilerDcc.h.

◆ IFX_ALIGN

#define IFX_ALIGN ( n ) __attribute__ ((aligned(n)))

Definition at line 145 of file CompilerDcc.h.

◆ IFX_FAR_ABS

#define IFX_FAR_ABS

Definition at line 150 of file CompilerDcc.h.

◆ IFX_INLINE

#define IFX_INLINE static __inline__

Definition at line 98 of file CompilerDcc.h.

◆ IFX_INTERRUPT

#define IFX_INTERRUPT | ( | isr,
 |  | vectabNum,
 |  | prio
 | ) | IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio)

Definition at line 119 of file CompilerDcc.h.

◆ IFX_INTERRUPT_FAST

#define IFX_INTERRUPT_FAST IFX_INTERRUPT

Definition at line 107 of file CompilerDcc.h.

◆ IFX_INTERRUPT_INTERNAL

#define IFX_INTERRUPT_INTERNAL | ( | isr,
 |  | vectabNum,
 |  | prio
 | ) | void __interrupt(prio) __vector_table(vectabNum) isr(void)

Definition at line 124 of file CompilerDcc.h.

◆ IFX_INTERRUPT_LEGACY

#define IFX_INTERRUPT_LEGACY | ( | isr,
 |  | vectabNum,
 |  | prio
 | ) |
Value:
__asm ("\t.align\t 5\n\t\.section .int."#prio"\n \t.sectionlink .inttab"#vectabNum".intvec."#prio"\n\#$$bf\n\__intvec_tc"#vectabNum"_"#prio":\n\ movh.a\t %a14,"#isr"@ha\n\ lea\t %a14,[%a14]"#isr"@l\n\ ji\t %a14\n\#$$ef\n\t\.section .intend."#prio"\n \t.sectionlink .text");\
__interrupt__ void isr (void)

Definition at line 129 of file CompilerDcc.h.

◆ IFX_NEAR_ABS

#define IFX_NEAR_ABS

Definition at line 154 of file CompilerDcc.h.

◆ IFX_PACKED

#define IFX_PACKED

Definition at line 101 of file CompilerDcc.h.

◆ IFX_REL_A0

#define IFX_REL_A0

Definition at line 158 of file CompilerDcc.h.

◆ IFX_REL_A1

#define IFX_REL_A1

Definition at line 162 of file CompilerDcc.h.

◆ IFX_REL_A8

#define IFX_REL_A8

Definition at line 166 of file CompilerDcc.h.

◆ IFX_REL_A9

#define IFX_REL_A9

Definition at line 170 of file CompilerDcc.h.

◆ IFXCOMPILER_COMMON_LINKER_SYMBOLS

#define IFXCOMPILER_COMMON_LINKER_SYMBOLS ( ) __asm("\t .weak __A8_MEM, __A9_MEM");

ASM extern definitions

Definition at line 77 of file CompilerDcc.h.

◆ IFXCOMPILER_CORE_LINKER_SYMBOLS

#define IFXCOMPILER_CORE_LINKER_SYMBOLS ( cpu )
Value:
extern unsigned int __USTACK##cpu[]; /**< user stack end */ \
extern unsigned int __ISTACK##cpu[]; /**< interrupt stack end */ \
extern unsigned int __INTTAB_CPU##cpu[]; /**< interrupt vector table */ \
extern unsigned int __TRAPTAB_CPU##cpu[]; /**< trap vector table */ \
extern unsigned int __CSA##cpu[]; /**< context save area begin */ \
extern unsigned int __CSA##cpu##_END[];
__ISTACK
#define __ISTACK(cpu)
Definition: CompilerDcc.h:71
__INTTAB_CPU
#define __INTTAB_CPU(cpu)
Definition: CompilerDcc.h:72
__CSA
#define __CSA(cpu)
Definition: CompilerDcc.h:74
__USTACK
#define __USTACK(cpu)
Definition: CompilerDcc.h:70
__TRAPTAB_CPU
#define __TRAPTAB_CPU(cpu)
Definition: CompilerDcc.h:73

context save area end

Definition at line 56 of file CompilerDcc.h.


iLLD_TC38A: CompilerGhs.c File Reference

  • Infra
  • Platform
  • Tricore
  • Compilers
CompilerGhs.c File Reference
#include "Cpu/Std/Ifx_Types.h"
#include "Compilers.h"
Include dependency graph for CompilerGhs.c:

Go to the source code of this file.

Detailed Description

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-27 20:08:40 GMT
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file CompilerGhs.c.


iLLD_TC38A: CompilerGhs.h File Reference

  • Infra
  • Platform
  • Tricore
  • Compilers
Macros
CompilerGhs.h File Reference

Go to the source code of this file.

Macros

#define | IFXCOMPILER_COMMON_LINKER_SYMBOLS()
#define | IFXCOMPILER_CORE_LINKER_SYMBOLS(cpu)
#define | __USTACK(cpu) __USTACK##cpu
#define | __ISTACK(cpu) __ISTACK##cpu
#define | __INTTAB_CPU(cpu) __INTTAB_CPU##cpu
#define | __TRAPTAB_CPU(cpu) __TRAPTAB_CPU##cpu
#define | __CSA(cpu) __CSA##cpu
#define | __CSA_END(cpu) __CSA##cpu##_END
#define | __INTTAB(cpu) __INTTAB_CPU##cpu
#define | __TRAPTAB(cpu) __TRAPTAB_CPU##cpu
#define | __SDATA1(cpu) __A0_MEM
#define | __SDATA2(cpu) __A1_MEM
#define | __SDATA3(cpu) __A8_MEM
#define | __SDATA4(cpu) __A9_MEM
#define | IFX_INLINE static inline __attribute__ ((always_inline)) /*Makes the function always inlined */
#define | IFX_PACKED __packed
#define | COMPILER_NAME "GHS"
#define | COMPILER_VERSION __GHS_VERSION_NUMBER
#define | COMPILER_REVISION __GHS_REVISION_VALUE
#define | IFX_INTERRUPT(isr, vectabNum, prio) IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio)
#define | IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio)
#define | IFX_ALIGN(n) __attribute__ ((aligned(n)))
#define | IFX_FAR_ABS __attribute__((fardata))
#define | IFX_NEAR_ABS
#define | IFX_REL_A0
#define | IFX_REL_A1
#define | IFX_REL_A8
#define | IFX_REL_A9

Detailed Description

Version
iLLD_New
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file CompilerGhs.h.

Macro Definition Documentation

◆ __CSA

#define __CSA ( cpu ) __CSA##cpu

Definition at line 87 of file CompilerGhs.h.

◆ __CSA_END

#define __CSA_END ( cpu ) __CSA##cpu##_END

Definition at line 88 of file CompilerGhs.h.

◆ __INTTAB

#define __INTTAB ( cpu ) __INTTAB_CPU##cpu

Definition at line 94 of file CompilerGhs.h.

◆ __INTTAB_CPU

#define __INTTAB_CPU ( cpu ) __INTTAB_CPU##cpu

Definition at line 85 of file CompilerGhs.h.

◆ __ISTACK

#define __ISTACK ( cpu ) __ISTACK##cpu

Definition at line 84 of file CompilerGhs.h.

◆ __SDATA1

#define __SDATA1 ( cpu ) __A0_MEM

Definition at line 99 of file CompilerGhs.h.

◆ __SDATA2

#define __SDATA2 ( cpu ) __A1_MEM

Definition at line 100 of file CompilerGhs.h.

◆ __SDATA3

#define __SDATA3 ( cpu ) __A8_MEM

Definition at line 101 of file CompilerGhs.h.

◆ __SDATA4

#define __SDATA4 ( cpu ) __A9_MEM

Definition at line 102 of file CompilerGhs.h.

◆ __TRAPTAB

#define __TRAPTAB ( cpu ) __TRAPTAB_CPU##cpu

Definition at line 97 of file CompilerGhs.h.

◆ __TRAPTAB_CPU

#define __TRAPTAB_CPU ( cpu ) __TRAPTAB_CPU##cpu

Definition at line 86 of file CompilerGhs.h.

◆ __USTACK

#define __USTACK ( cpu ) __USTACK##cpu

Definition at line 83 of file CompilerGhs.h.

◆ COMPILER_NAME

#define COMPILER_NAME "GHS"

Definition at line 119 of file CompilerGhs.h.

◆ COMPILER_REVISION

#define COMPILER_REVISION __GHS_REVISION_VALUE

Definition at line 122 of file CompilerGhs.h.

◆ COMPILER_VERSION

#define COMPILER_VERSION __GHS_VERSION_NUMBER

Definition at line 120 of file CompilerGhs.h.

◆ IFX_ALIGN

#define IFX_ALIGN ( n ) __attribute__ ((aligned(n)))

Definition at line 151 of file CompilerGhs.h.

◆ IFX_FAR_ABS

#define IFX_FAR_ABS __attribute__((fardata))

Definition at line 156 of file CompilerGhs.h.

◆ IFX_INLINE

#define IFX_INLINE static inline __attribute__ ((always_inline)) /*Makes the function always inlined */

Definition at line 114 of file CompilerGhs.h.

◆ IFX_INTERRUPT

#define IFX_INTERRUPT | ( | isr,
 |  | vectabNum,
 |  | prio
 | ) | IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio)

Definition at line 134 of file CompilerGhs.h.

◆ IFX_INTERRUPT_INTERNAL

#define IFX_INTERRUPT_INTERNAL | ( | isr,
 |  | vectabNum,
 |  | prio
 | ) |
Value:
__attribute__((section(".intvec_tc"#vectabNum"_"#prio))) void iVecEntry##vectabNum##_##prio(void) \
{ \
__asm__("movh.a a14, %hi("#isr") \n" \
"lea a14, [a14]%lo("#isr")\n" \
"ji a14"); \
} \
__interrupt void isr(void)

Definition at line 138 of file CompilerGhs.h.

◆ IFX_NEAR_ABS

#define IFX_NEAR_ABS

Definition at line 160 of file CompilerGhs.h.

◆ IFX_PACKED

#define IFX_PACKED __packed

Definition at line 117 of file CompilerGhs.h.

◆ IFX_REL_A0

#define IFX_REL_A0

Definition at line 164 of file CompilerGhs.h.

◆ IFX_REL_A1

#define IFX_REL_A1

Definition at line 168 of file CompilerGhs.h.

◆ IFX_REL_A8

#define IFX_REL_A8

Definition at line 172 of file CompilerGhs.h.

◆ IFX_REL_A9

#define IFX_REL_A9

Definition at line 176 of file CompilerGhs.h.

◆ IFXCOMPILER_COMMON_LINKER_SYMBOLS

#define IFXCOMPILER_COMMON_LINKER_SYMBOLS ( )
Value:
extern unsigned int __A0_MEM[]; /**< center of A0 addressable area */ \
extern unsigned int __A1_MEM[]; /**< center of A1 addressable area */ \
extern unsigned int __A8_MEM[]; /**< center of A8 addressable area */ \
extern unsigned int __A9_MEM[];

center of A9 addressable area

Definition at line 54 of file CompilerGhs.h.

◆ IFXCOMPILER_CORE_LINKER_SYMBOLS

#define IFXCOMPILER_CORE_LINKER_SYMBOLS ( cpu )
Value:
extern unsigned int __USTACK##cpu[]; /**< user stack end */ \
extern unsigned int __ISTACK##cpu[]; /**< interrupt stack end */ \
extern unsigned int __INTTAB_CPU##cpu[]; /**< Interrupt vector table */ \
extern unsigned int __TRAPTAB_CPU##cpu[]; /**< trap table */ \
extern unsigned int __CSA##cpu[]; /**< context save area 1 begin */ \
extern unsigned int __CSA##cpu##_END[];
__INTTAB_CPU
#define __INTTAB_CPU(cpu)
Definition: CompilerGhs.h:85
__ISTACK
#define __ISTACK(cpu)
Definition: CompilerGhs.h:84
__CSA
#define __CSA(cpu)
Definition: CompilerGhs.h:87
__USTACK
#define __USTACK(cpu)
Definition: CompilerGhs.h:83
__TRAPTAB_CPU
#define __TRAPTAB_CPU(cpu)
Definition: CompilerGhs.h:86

context save area 1 begin

Definition at line 69 of file CompilerGhs.h.


iLLD_TC38A: CompilerGnuc.c File Reference

  • Infra
  • Platform
  • Tricore
  • Compilers
CompilerGnuc.c File Reference
#include "Cpu/Std/Ifx_Types.h"
#include "Compilers.h"
Include dependency graph for CompilerGnuc.c:

Go to the source code of this file.

Detailed Description

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-27 20:08:40 GMT
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file CompilerGnuc.c.


iLLD_TC38A: CompilerGnuc.h File Reference

  • Infra
  • Platform
  • Tricore
  • Compilers
Macros
CompilerGnuc.h File Reference
#include <stddef.h>
Include dependency graph for CompilerGnuc.h:

Go to the source code of this file.

Macros

#define | IFXCOMPILER_COMMON_LINKER_SYMBOLS()
#define | IFXCOMPILER_CORE_LINKER_SYMBOLS(cpu)
#define | __USTACK(cpu) __USTACK##cpu
#define | __ISTACK(cpu) __ISTACK##cpu
#define | __INTTAB_CPU(cpu) __INTTAB_CPU##cpu
#define | __TRAPTAB_CPU(cpu) __TRAPTAB_CPU##cpu
#define | __CSA(cpu) __CSA##cpu
#define | __CSA_END(cpu) __CSA##cpu##_END
#define | __INTTAB(cpu) __INTTAB_CPU##cpu
#define | __TRAPTAB(cpu) __TRAPTAB_CPU##cpu
#define | __SDATA1(cpu) __A0_MEM
#define | __SDATA2(cpu) __A1_MEM
#define | __SDATA3(cpu) __A8_MEM
#define | __SDATA4(cpu) __A9_MEM
#define | IFX_INLINE static inline __attribute__ ((always_inline)) /*Makes the function always inlined */
#define | IFX_PACKED __attribute__ ((packed))
#define | COMPILER_NAME "GNUC"
#define | COMPILER_VERSION __VERSION__
#define | COMPILER_REVISION 0
#define | IFX_INTERRUPT_FAST IFX_INTERRUPT
#define | IFX_INTERRUPT(isr, vectabNum, prio) IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio)
#define | IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio)
#define | IFX_ALIGN(n) __attribute__ ((aligned(n)))
#define | IFX_FAR_ABS __attribute__((fardata))
#define | IFX_NEAR_ABS
#define | IFX_REL_A0
#define | IFX_REL_A1
#define | IFX_REL_A8
#define | IFX_REL_A9

Detailed Description

Version
iLLD_New
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file CompilerGnuc.h.

Macro Definition Documentation

◆ __CSA

#define __CSA ( cpu ) __CSA##cpu

Definition at line 87 of file CompilerGnuc.h.

◆ __CSA_END

#define __CSA_END ( cpu ) __CSA##cpu##_END

Definition at line 88 of file CompilerGnuc.h.

◆ __INTTAB

#define __INTTAB ( cpu ) __INTTAB_CPU##cpu

Definition at line 94 of file CompilerGnuc.h.

◆ __INTTAB_CPU

#define __INTTAB_CPU ( cpu ) __INTTAB_CPU##cpu

Definition at line 85 of file CompilerGnuc.h.

◆ __ISTACK

#define __ISTACK ( cpu ) __ISTACK##cpu

Definition at line 84 of file CompilerGnuc.h.

◆ __SDATA1

#define __SDATA1 ( cpu ) __A0_MEM

Definition at line 99 of file CompilerGnuc.h.

◆ __SDATA2

#define __SDATA2 ( cpu ) __A1_MEM

Definition at line 100 of file CompilerGnuc.h.

◆ __SDATA3

#define __SDATA3 ( cpu ) __A8_MEM

Definition at line 101 of file CompilerGnuc.h.

◆ __SDATA4

#define __SDATA4 ( cpu ) __A9_MEM

Definition at line 102 of file CompilerGnuc.h.

◆ __TRAPTAB

#define __TRAPTAB ( cpu ) __TRAPTAB_CPU##cpu

Definition at line 97 of file CompilerGnuc.h.

◆ __TRAPTAB_CPU

#define __TRAPTAB_CPU ( cpu ) __TRAPTAB_CPU##cpu

Definition at line 86 of file CompilerGnuc.h.

◆ __USTACK

#define __USTACK ( cpu ) __USTACK##cpu

Definition at line 83 of file CompilerGnuc.h.

◆ COMPILER_NAME

#define COMPILER_NAME "GNUC"

Definition at line 113 of file CompilerGnuc.h.

◆ COMPILER_REVISION

#define COMPILER_REVISION 0

Definition at line 116 of file CompilerGnuc.h.

◆ COMPILER_VERSION

#define COMPILER_VERSION __VERSION__

Definition at line 114 of file CompilerGnuc.h.

◆ IFX_ALIGN

#define IFX_ALIGN ( n ) __attribute__ ((aligned(n)))

Definition at line 164 of file CompilerGnuc.h.

◆ IFX_FAR_ABS

#define IFX_FAR_ABS __attribute__((fardata))

Definition at line 169 of file CompilerGnuc.h.

◆ IFX_INLINE

#define IFX_INLINE static inline __attribute__ ((always_inline)) /*Makes the function always inlined */

Definition at line 108 of file CompilerGnuc.h.

◆ IFX_INTERRUPT

#define IFX_INTERRUPT | ( | isr,
 |  | vectabNum,
 |  | prio
 | ) | IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio)

Definition at line 129 of file CompilerGnuc.h.

◆ IFX_INTERRUPT_FAST

#define IFX_INTERRUPT_FAST IFX_INTERRUPT

Definition at line 118 of file CompilerGnuc.h.

◆ IFX_INTERRUPT_INTERNAL

#define IFX_INTERRUPT_INTERNAL | ( | isr,
 |  | vectabNum,
 |  | prio
 | ) |
Value:
__asm__ (".ifndef .intr.entry.include \n"\
".altmacro \n"\
".macro .int_entry.2 intEntryLabel, name # define the section and inttab entry code \n"\
" .pushsection .\\intEntryLabel,\"ax\",@progbits \n"\
" __\\intEntryLabel : \n"\
" svlcx \n"\
" movh.a %a14, hi:\\name \n"\
" lea %a14, [%a14]lo:\\name \n"\
" ji %a14 \n"\
" .popsection \n"\
".endm \n"\
".macro .int_entry.1 prio,vectabNum,u,name \n"\
".int_entry.2 intvec_tc\\vectabNum\\u\\prio,(name) # build the unique name \n"\
".endm \n"\
" \n"\
".macro .intr.entry name,vectabNum,prio \n"\
".int_entry.1 %(prio),%(vectabNum),_,name # evaluate the priority and the cpu number \n"\
".endm \n"\
".intr.entry.include: \n"\
".endif \n"\
".intr.entry "#isr","#vectabNum","#prio );\
IFX_EXTERN void __attribute__ ((interrupt_handler)) isr(); \
void isr (void)
__asm__
#define __asm__
Definition: Ifx_TypesTasking.h:45

Definition at line 134 of file CompilerGnuc.h.

◆ IFX_NEAR_ABS

#define IFX_NEAR_ABS

Definition at line 173 of file CompilerGnuc.h.

◆ IFX_PACKED

#define IFX_PACKED __attribute__ ((packed))

Definition at line 111 of file CompilerGnuc.h.

◆ IFX_REL_A0

#define IFX_REL_A0

Definition at line 177 of file CompilerGnuc.h.

◆ IFX_REL_A1

#define IFX_REL_A1

Definition at line 181 of file CompilerGnuc.h.

◆ IFX_REL_A8

#define IFX_REL_A8

Definition at line 185 of file CompilerGnuc.h.

◆ IFX_REL_A9

#define IFX_REL_A9

Definition at line 189 of file CompilerGnuc.h.

◆ IFXCOMPILER_COMMON_LINKER_SYMBOLS

#define IFXCOMPILER_COMMON_LINKER_SYMBOLS ( )
Value:
extern unsigned int __A0_MEM[]; /**< center of A0 addressable area */ \
extern unsigned int __A1_MEM[]; /**< center of A1 addressable area */ \
extern unsigned int __A8_MEM[]; /**< center of A8 addressable area */ \
extern unsigned int __A9_MEM[];

center of A9 addressable area

Definition at line 54 of file CompilerGnuc.h.

◆ IFXCOMPILER_CORE_LINKER_SYMBOLS

#define IFXCOMPILER_CORE_LINKER_SYMBOLS ( cpu )
Value:
extern unsigned int __USTACK##cpu[]; /**< user stack end */ \
extern unsigned int __ISTACK##cpu[]; /**< interrupt stack end */ \
extern unsigned int __INTTAB_CPU##cpu[]; /**< Interrupt vector table */ \
extern unsigned int __TRAPTAB_CPU##cpu[]; /**< trap table */ \
extern unsigned int __CSA##cpu[]; /**< context save area 1 begin */ \
extern unsigned int __CSA##cpu##_END[];
__USTACK
#define __USTACK(cpu)
Definition: CompilerGnuc.h:83
__TRAPTAB_CPU
#define __TRAPTAB_CPU(cpu)
Definition: CompilerGnuc.h:86
__INTTAB_CPU
#define __INTTAB_CPU(cpu)
Definition: CompilerGnuc.h:85
__ISTACK
#define __ISTACK(cpu)
Definition: CompilerGnuc.h:84
__CSA
#define __CSA(cpu)
Definition: CompilerGnuc.h:87

context save area 1 begin

Definition at line 69 of file CompilerGnuc.h.


iLLD_TC38A: Compilers.h File Reference

  • Infra
  • Platform
  • Tricore
  • Compilers
Macros | Functions
Compilers.h File Reference
#include "Ifx_Cfg.h"
Include dependency graph for Compilers.h:

Go to the source code of this file.

Macros

#define | IFX_STATIC static
#define | IFX_CONST const
#define | CONST_CFG const /* configuration constants are stored in ROM */
#define | IFX_EXTERN extern
#define | NULL_PTR ((void *)0)
#define | CFG_LONG_SIZE_T (0)
#define | IFX_INTERRUPT(isr, vectabNum, prio)
Macro to define Interrupt Service Routine. This macro makes following definitions:
1) Define linker section as .intvec_tc<vector number>_<interrupt priority>.
2) define compiler specific attribute for the interrupt functions.
3) define the Interrupt service routine as Isr function.
To get details about usage of this macro, refer How to define Interrupts?. More...

Functions

void Ifx_C_Init (void)

Detailed Description

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-04-07 12:13:19 GMT
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Compilers.h.

Macro Definition Documentation

◆ CFG_LONG_SIZE_T

#define CFG_LONG_SIZE_T (0)

Definition at line 75 of file Compilers.h.

◆ CONST_CFG

#define CONST_CFG const /* configuration constants are stored in ROM */

Definition at line 57 of file Compilers.h.

◆ IFX_CONST

#define IFX_CONST const

Definition at line 54 of file Compilers.h.

Referenced by IfxGtm_Trig_toCan(), IfxGtm_Trig_toEVadc(), IfxGtm_Trig_toMsc(), and IfxGtm_Trig_toSent().

◆ IFX_EXTERN

#define IFX_EXTERN extern

Definition at line 63 of file Compilers.h.

◆ IFX_STATIC

#define IFX_STATIC static

Definition at line 50 of file Compilers.h.

◆ NULL_PTR

#define NULL_PTR ((void *)0)

Definition at line 70 of file Compilers.h.

Referenced by Ifx_AngleTrkF32_stdIfPosInit(), Ifx_Assert_doLevel(), Ifx_Assert_doValidate(), Ifx_Fifo_canReadCount(), Ifx_Fifo_canWriteCount(), Ifx_Fifo_create(), Ifx_Fifo_init(), Ifx_Fifo_read(), Ifx_Fifo_write(), Ifx_GlobalResources_get(), Ifx_GlobalResources_getItem(), Ifx_Shell_cmdEscapeProcess(), Ifx_Shell_commandFind(), Ifx_Shell_commandListFind(), Ifx_Shell_execute(), Ifx_Shell_init(), Ifx_Shell_initConfig(), Ifx_Shell_isEndOfLine(), Ifx_Shell_parseToken(), Ifx_Shell_printSyntax(), Ifx_Shell_process(), Ifx_Shell_protocolStart(), Ifx_Shell_showHelp(), Ifx_Shell_showHelpSingle(), Ifx_Shell_showHelpSingleCommand(), Ifx_Shell_skipWhitespace(), IfxAsclin_Asc_initModule(), IfxAsclin_Asc_initModuleConfig(), IfxAsclin_getAddress(), IfxAsclin_initCtsPin(), IfxAsclin_initRxPin(), IfxAsclin_Lin_initModule(), IfxAsclin_Lin_initModuleConfig(), IfxAsclin_Spi_initModule(), IfxAsclin_Spi_initModuleConfig(), IfxAsclin_Spi_read(), IfxAsclin_Spi_write(), IfxCan_Can_initModuleConfig(), IfxCan_Can_initNode(), IfxCan_Can_initNodeConfig(), IfxCan_getAddress(), IfxCcu6_getAddress(), IfxCcu6_Icu_initChannel(), IfxCcu6_Icu_initChannelConfig(), IfxCcu6_Icu_initModule(), IfxCcu6_Icu_initModuleConfig(), IfxCcu6_Icu_startCapture(), IfxCcu6_PwmBc_initModule(), IfxCcu6_PwmBc_initModuleConfig(), IfxCcu6_PwmBc_start(), IfxCcu6_PwmBc_stop(), IfxCcu6_PwmHl_initConfig(), IfxCcu6_PwmHl_setMode(), IfxCcu6_PwmHl_setOutputPins(), IfxCcu6_Timer_initModule(), IfxCcu6_Timer_initModuleConfig(), IfxCcu6_Timer_start(), IfxCcu6_Timer_startSingleShotMode(), IfxCcu6_Timer_stop(), IfxCcu6_TimerWithTrigger_init(), IfxCcu6_TimerWithTrigger_initConfig(), IfxCcu6_TPwm_initModule(), IfxCcu6_TPwm_initModuleConfig(), IfxCcu6_TPwm_start(), IfxCcu6_TPwm_stop(), IfxCpu_disableOverlayBlock(), IfxCpu_enableOverlayBlock(), IfxCpu_getAddress(), IfxDma_Dma_initChannelConfig(), IfxEdsadc_Edsadc_initCarrierGen(), IfxEdsadc_Edsadc_initCarrierGenConfig(), IfxEdsadc_Edsadc_initChannel(), IfxEdsadc_Edsadc_initChannelConfig(), IfxEdsadc_initCgPwmPin(), IfxEdsadc_initCinPin(), IfxEdsadc_initCoutPin(), IfxEdsadc_initDinPin(), IfxEdsadc_initDsnPin(), IfxEdsadc_initDspPin(), IfxEdsadc_initItrPin(), IfxEdsadc_initSgPin(), IfxEray_Eray_Node_init(), IfxEray_Eray_Node_initConfig(), IfxEray_getAddress(), IfxEray_readData(), IfxEray_setSlot(), IfxEray_writeData(), IfxEvadc_Adc_initChannelConfig(), IfxEvadc_Adc_initExternalMultiplexerMode(), IfxEvadc_Adc_initExternalMultiplexerModeConfig(), IfxGeth_Eth_getTransmitBuffer(), IfxGeth_Eth_initModule(), IfxGeth_Eth_initModuleConfig(), IfxGeth_Eth_setupMiiInputPins(), IfxGeth_Eth_setupMiiOutputPins(), IfxGeth_Eth_waitTransmitBuffer(), IfxGeth_getAddress(), IfxGpt12_IncrEnc_init(), IfxGpt12_IncrEnc_initConfig(), IfxGtm_Atom_Dtm_PwmHl_init(), IfxGtm_Atom_Dtm_PwmHl_initConfig(), IfxGtm_Atom_Dtm_PwmHl_setMode(), IfxGtm_Atom_Dtm_PwmHl_updateAndShiftOff(), IfxGtm_Atom_Dtm_PwmHl_updatePulseOff(), IfxGtm_Atom_Pwm_init(), IfxGtm_Atom_Pwm_initConfig(), IfxGtm_Atom_PwmHl_initConfig(), IfxGtm_Atom_PwmHl_setMode(), IfxGtm_Atom_PwmHl_updateAndShiftOff(), IfxGtm_Atom_PwmHl_updatePulseOff(), IfxGtm_Atom_Timer_init(), IfxGtm_Atom_Timer_initConfig(), IfxGtm_Dtm_getClockFrequency(), IfxGtm_Dtm_getDtmPointer(), IfxGtm_Tim_In_init(), IfxGtm_Tim_In_initConfig(), IfxGtm_Tom_Dtm_PwmHl_init(), IfxGtm_Tom_Dtm_PwmHl_initConfig(), IfxGtm_Tom_Dtm_PwmHl_setMode(), IfxGtm_Tom_Dtm_PwmHl_updateAndShiftOff(), IfxGtm_Tom_Dtm_PwmHl_updatePulseOff(), IfxGtm_Tom_Pwm_init(), IfxGtm_Tom_Pwm_initConfig(), IfxGtm_Tom_PwmHl_initConfig(), IfxGtm_Tom_PwmHl_setMode(), IfxGtm_Tom_PwmHl_updateAndShiftOff(), IfxGtm_Tom_PwmHl_updatePulseOff(), IfxGtm_Tom_Timer_init(), IfxGtm_Tom_Timer_initConfig(), IfxGtm_Trig_toCan(), IfxGtm_Trig_toEVadc(), IfxGtm_Trig_toMsc(), IfxGtm_Trig_toSent(), IfxHssl_getHsctAddress(), IfxHssl_getHsslAddress(), IfxI2c_getAddress(), IfxI2c_I2c_initConfig(), IfxI2c_I2c_initModule(), IfxMsc_getAddress(), IfxMsc_initEnPin(), IfxMsc_initFclnPin(), IfxMsc_initFclpPin(), IfxMsc_initInjPin(), IfxMsc_initSdiPin(), IfxMsc_initSonPin(), IfxMsc_initSopPin(), IfxMsc_Msc_initModule(), IfxMsc_Msc_initModuleConfig(), IfxPort_getAddress(), IfxPsi5_initRxPin(), IfxPsi5_initTxPin(), IfxPsi5_Psi5_initChannel(), IfxPsi5_Psi5_initChannelConfig(), IfxPsi5s_initClkPin(), IfxPsi5s_initRxPin(), IfxPsi5s_initTxPin(), IfxPsi5s_Psi5s_initChannelConfig(), IfxPsi5s_Psi5s_initModule(), IfxPsi5s_Psi5s_initModuleConfig(), IfxQspi_getAddress(), IfxQspi_SpiMaster_exchange(), IfxQspi_SpiMaster_getChannelConfig(), IfxQspi_SpiMaster_initChannel(), IfxQspi_SpiMaster_initChannelConfig(), IfxQspi_SpiMaster_initModule(), IfxQspi_SpiMaster_initModuleConfig(), IfxQspi_SpiMaster_isrDmaReceive(), IfxQspi_SpiMaster_isrDmaTransmit(), IfxQspi_SpiMaster_isrError(), IfxQspi_SpiMaster_read(), IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), IfxQspi_SpiSlave_initModule(), IfxQspi_SpiSlave_initModuleConfig(), IfxQspi_SpiSlave_read(), IfxQspi_SpiSlave_write(), IfxSent_initSentPin(), IfxSent_initSpcPin(), IfxSent_Sent_initChannel(), IfxSent_Sent_initChannelConfig(), IfxSent_Sent_initModuleConfig(), IfxStm_getAddress(), and SpiIf_initConfig().

Function Documentation

◆ Ifx_C_Init()

void Ifx_C_Init ( void )


iLLD_TC38A: CompilerTasking.c File Reference

  • Infra
  • Platform
  • Tricore
  • Compilers
CompilerTasking.c File Reference
#include "Cpu/Std/Ifx_Types.h"
#include "Compilers.h"
Include dependency graph for CompilerTasking.c:

Go to the source code of this file.

Detailed Description

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-27 20:08:41 GMT
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file CompilerTasking.c.


iLLD_TC38A: CompilerTasking.h File Reference

  • Infra
  • Platform
  • Tricore
  • Compilers
Macros
CompilerTasking.h File Reference
#include <stddef.h>
Include dependency graph for CompilerTasking.h:

Go to the source code of this file.

Macros

#define | IFXCOMPILER_COMMON_LINKER_SYMBOLS() __asm("\t .extern _SMALL_DATA_, _LITERAL_DATA_, _A8_DATA_, _A9_DATA_");
#define | IFXCOMPILER_CORE_LINKER_SYMBOLS(cpu)
#define | __USTACK(cpu) __USTACK##cpu
#define | __ISTACK(cpu) __ISTACK##cpu
#define | __INTTAB_CPU(cpu) __INTTAB_CPU##cpu
#define | __TRAPTAB_CPU(cpu) __TRAPTAB_CPU##cpu
#define | __CSA(cpu) __CSA##cpu
#define | __CSA_END(cpu) __CSA##cpu##_END
#define | __INTTAB(cpu) __INTTAB_CPU##cpu
#define | __TRAPTAB(cpu) __TRAPTAB_CPU##cpu
#define | __SDATA1(cpu) _SMALL_DATA_
#define | __SDATA2(cpu) _LITERAL_DATA_
#define | __SDATA3(cpu) _A8_DATA_
#define | __SDATA4(cpu) _A9_DATA_
#define | IFX_INLINE static inline
#define | IFX_PACKED
#define | COMPILER_NAME "TASKING"
#define | COMPILER_VERSION __VERSION__
#define | COMPILER_REVISION __REVISION__
#define | IFX_INTERRUPT(isr, vectabNum, prio) IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio)
#define | IFX_INTERRUPT_FAST(isr, vectabNum, prio) void __interrupt_fast(prio) __vector_table(vectabNum) isr(void)
#define | IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio) void __interrupt(prio) __vector_table(vectabNum) isr(void)
#define | IFX_ALIGN(n) __attribute__ ((__align(n)))
#define | IFX_FAR_ABS __far
#define | IFX_NEAR_ABS __near
#define | IFX_REL_A0 __a0
#define | IFX_REL_A1 __a1
#define | IFX_REL_A8 __a8
#define | IFX_REL_A9 __a9

Detailed Description

Version
iLLD_New
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file CompilerTasking.h.

Macro Definition Documentation

◆ __CSA

#define __CSA ( cpu ) __CSA##cpu

Definition at line 81 of file CompilerTasking.h.

◆ __CSA_END

#define __CSA_END ( cpu ) __CSA##cpu##_END

Definition at line 82 of file CompilerTasking.h.

◆ __INTTAB

#define __INTTAB ( cpu ) __INTTAB_CPU##cpu

Definition at line 88 of file CompilerTasking.h.

◆ __INTTAB_CPU

#define __INTTAB_CPU ( cpu ) __INTTAB_CPU##cpu

Definition at line 79 of file CompilerTasking.h.

◆ __ISTACK

#define __ISTACK ( cpu ) __ISTACK##cpu

Definition at line 78 of file CompilerTasking.h.

◆ __SDATA1

#define __SDATA1 ( cpu ) _SMALL_DATA_

Definition at line 93 of file CompilerTasking.h.

◆ __SDATA2

#define __SDATA2 ( cpu ) _LITERAL_DATA_

Definition at line 94 of file CompilerTasking.h.

◆ __SDATA3

#define __SDATA3 ( cpu ) _A8_DATA_

Definition at line 95 of file CompilerTasking.h.

◆ __SDATA4

#define __SDATA4 ( cpu ) _A9_DATA_

Definition at line 96 of file CompilerTasking.h.

◆ __TRAPTAB

#define __TRAPTAB ( cpu ) __TRAPTAB_CPU##cpu

Definition at line 91 of file CompilerTasking.h.

◆ __TRAPTAB_CPU

#define __TRAPTAB_CPU ( cpu ) __TRAPTAB_CPU##cpu

Definition at line 80 of file CompilerTasking.h.

◆ __USTACK

#define __USTACK ( cpu ) __USTACK##cpu

Definition at line 77 of file CompilerTasking.h.

◆ COMPILER_NAME

#define COMPILER_NAME "TASKING"

Definition at line 110 of file CompilerTasking.h.

◆ COMPILER_REVISION

#define COMPILER_REVISION __REVISION__

Definition at line 114 of file CompilerTasking.h.

◆ COMPILER_VERSION

#define COMPILER_VERSION __VERSION__

Definition at line 111 of file CompilerTasking.h.

◆ IFX_ALIGN

#define IFX_ALIGN ( n ) __attribute__ ((__align(n)))

Definition at line 139 of file CompilerTasking.h.

◆ IFX_FAR_ABS

#define IFX_FAR_ABS __far

Definition at line 144 of file CompilerTasking.h.

◆ IFX_INLINE

#define IFX_INLINE static inline

Definition at line 104 of file CompilerTasking.h.

◆ IFX_INTERRUPT

#define IFX_INTERRUPT | ( | isr,
 |  | vectabNum,
 |  | prio
 | ) | IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio)

Definition at line 127 of file CompilerTasking.h.

◆ IFX_INTERRUPT_FAST

#define IFX_INTERRUPT_FAST | ( | isr,
 |  | vectabNum,
 |  | prio
 | ) | void __interrupt_fast(prio) __vector_table(vectabNum) isr(void)

Definition at line 129 of file CompilerTasking.h.

◆ IFX_INTERRUPT_INTERNAL

#define IFX_INTERRUPT_INTERNAL | ( | isr,
 |  | vectabNum,
 |  | prio
 | ) | void __interrupt(prio) __vector_table(vectabNum) isr(void)

Definition at line 133 of file CompilerTasking.h.

◆ IFX_NEAR_ABS

#define IFX_NEAR_ABS __near

Definition at line 148 of file CompilerTasking.h.

◆ IFX_PACKED

#define IFX_PACKED

Definition at line 108 of file CompilerTasking.h.

◆ IFX_REL_A0

#define IFX_REL_A0 __a0

Definition at line 152 of file CompilerTasking.h.

◆ IFX_REL_A1

#define IFX_REL_A1 __a1

Definition at line 156 of file CompilerTasking.h.

◆ IFX_REL_A8

#define IFX_REL_A8 __a8

Definition at line 160 of file CompilerTasking.h.

◆ IFX_REL_A9

#define IFX_REL_A9 __a9

Definition at line 164 of file CompilerTasking.h.

◆ IFXCOMPILER_COMMON_LINKER_SYMBOLS

#define IFXCOMPILER_COMMON_LINKER_SYMBOLS ( ) __asm("\t .extern _SMALL_DATA_, _LITERAL_DATA_, _A8_DATA_, _A9_DATA_");

Definition at line 55 of file CompilerTasking.h.

◆ IFXCOMPILER_CORE_LINKER_SYMBOLS

#define IFXCOMPILER_CORE_LINKER_SYMBOLS ( cpu )
Value:
__asm("\t .extern __USTACK"#cpu); /**< user stack end is required as asm to be used with setreg macro */ \
extern unsigned int __ISTACK##cpu[]; /**< interrupt stack end */ \
extern unsigned int __INTTAB_CPU##cpu[]; /**< interrupt vector table */ \
extern unsigned int __TRAPTAB_CPU##cpu[]; /**< trap vector table */ \
extern unsigned int __CSA##cpu[]; /**< context save area begin */ \
extern unsigned int __CSA##cpu##_END[];
__CSA
#define __CSA(cpu)
Definition: CompilerTasking.h:81
__ISTACK
#define __ISTACK(cpu)
Definition: CompilerTasking.h:78
__TRAPTAB_CPU
#define __TRAPTAB_CPU(cpu)
Definition: CompilerTasking.h:80
__INTTAB_CPU
#define __INTTAB_CPU(cpu)
Definition: CompilerTasking.h:79

context save area end

Definition at line 62 of file CompilerTasking.h.


iLLD_TC38A: Ifx_AngleTrkF32.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Macros | Functions
Ifx_AngleTrkF32.c File Reference

Angle-tracking observer for sin/cos analog position sensor. More...

#include "Ifx_AngleTrkF32.h"
#include <math.h>
#include "string.h"
#include "Ifx_LutAtan2F32.h"
Include dependency graph for Ifx_AngleTrkF32.c:

Go to the source code of this file.

Macros

#define | IFX_ANGLETRKF32_ATAN2F Ifx_LutAtan2F32_float32
#define | ATO_T (15e-3f)
#define | ATO_K (39.05f)
#define | ATO_PSI (1.5f * IFX_PI)

Functions

void | Ifx_AngleTrkF32_setUserSampling (Ifx_AngleTrkF32 *aObsv, float32 Ts)
IFX_INLINE float32 | Ifx_AngleTrkF32_bound (float32 angle, float32 periodPerRotation)
IFX_INLINE float32 | Ifx_AngleTrkF32_boundInput (float32 input)
float32 | round_f (float32 val)
void | Ifx_AngleTrkF32_setControlGains (Ifx_AngleTrkF32_CfgData *cfgData, float32 K, float32 T, float32 psi)
void | Ifx_AngleTrkF32_initConfig (Ifx_AngleTrkF32_Config *config, sint16 *sinIn, sint16 *cosIn)
Fill config with default values. More...
void | Ifx_AngleTrkF32_init (Ifx_AngleTrkF32 *aObsv, const Ifx_AngleTrkF32_Config *config, float32 Ts)
Initialize the Angle Tracking object. More...
float32 | Ifx_AngleTrkF32_step (Ifx_AngleTrkF32 *aObsv, sint16 sinIn, sint16 cosIn, float32 phase)
Step function of Ifx_AngleTrkF32 should be called at every sampling period provided during initialisation (call to Ifx_AngleTrkF32_init()). More...
void | Ifx_AngleTrkF32_setOffset (Ifx_AngleTrkF32 *aObsv, IfxStdIf_Pos_RawAngle offset)
Set the position offset (in ticks) More...
void | Ifx_AngleTrkF32_updateStatus (Ifx_AngleTrkF32 *aObsv, sint16 sinIn, sint16 cosIn)
Update the status flags. More...
void | Ifx_AngleTrkF32_update (Ifx_AngleTrkF32 *aObsv)
Update the object directly from its analog input. More...
IfxStdIf_Pos_RawAngle | Ifx_AngleTrkF32_getRawPosition (Ifx_AngleTrkF32 *aObsv)
Returns the actual position. More...
float32 | Ifx_AngleTrkF32_getSpeed (Ifx_AngleTrkF32 *aObsv)
Returns the Speed. More...
float32 | Ifx_AngleTrkF32_getAbsolutePosition (Ifx_AngleTrkF32 *driver)
IfxStdIf_Pos_Dir | Ifx_AngleTrkF32_getDirection (Ifx_AngleTrkF32 *driver)
IfxStdIf_Pos_Status | Ifx_AngleTrkF32_getFault (Ifx_AngleTrkF32 *driver)
sint32 | Ifx_AngleTrkF32_getOffset (Ifx_AngleTrkF32 *driver)
uint16 | Ifx_AngleTrkF32_getPeriodPerRotation (Ifx_AngleTrkF32 *driver)
float32 | Ifx_AngleTrkF32_getPosition (Ifx_AngleTrkF32 *driver)
float32 | Ifx_AngleTrkF32_getRefreshPeriod (Ifx_AngleTrkF32 *driver)
sint32 | Ifx_AngleTrkF32_getResolution (Ifx_AngleTrkF32 *driver)
IfxStdIf_Pos_SensorType | Ifx_AngleTrkF32_getSensorType (Ifx_AngleTrkF32 *driver)
sint32 | Ifx_AngleTrkF32_getTurn (Ifx_AngleTrkF32 *driver)
void | Ifx_AngleTrkF32_resetFaults (Ifx_AngleTrkF32 *driver)
void | Ifx_AngleTrkF32_setRefreshPeriod (Ifx_AngleTrkF32 *driver, float32 updatePeriod)
void | Ifx_AngleTrkF32_reset (Ifx_AngleTrkF32 *driver)
boolean | Ifx_AngleTrkF32_stdIfPosInit (IfxStdIf_Pos *stdif, Ifx_AngleTrkF32 *driver)
Initializes the standard interface "Pos". More...

Detailed Description

Angle-tracking observer for sin/cos analog position sensor.

Version
disabled
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_AngleTrkF32.c.

Macro Definition Documentation

◆ ATO_K

#define ATO_K (39.05f)

Definition at line 118 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_init(), and Ifx_AngleTrkF32_initConfig().

◆ ATO_PSI

#define ATO_PSI (1.5f * IFX_PI)

Definition at line 119 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_init(), and Ifx_AngleTrkF32_initConfig().

◆ ATO_T

#define ATO_T (15e-3f)

Definition at line 117 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_init(), and Ifx_AngleTrkF32_initConfig().

◆ IFX_ANGLETRKF32_ATAN2F

#define IFX_ANGLETRKF32_ATAN2F Ifx_LutAtan2F32_float32

Definition at line 54 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_step().

Function Documentation

◆ Ifx_AngleTrkF32_bound()

IFX_INLINE float32 Ifx_AngleTrkF32_bound | ( | float32 | angle,
 |  | float32 | periodPerRotation
 | ) |  |

Definition at line 70 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_boundInput().

◆ Ifx_AngleTrkF32_boundInput()

IFX_INLINE float32 Ifx_AngleTrkF32_boundInput ( float32 input )

Definition at line 90 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_step().

◆ Ifx_AngleTrkF32_setControlGains()

void Ifx_AngleTrkF32_setControlGains | ( | Ifx_AngleTrkF32_CfgData * | cfgData,
 |  | float32 | K,
 |  | float32 | T,
 |  | float32 | psi
 | ) |  |

Definition at line 121 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_init(), and Ifx_AngleTrkF32_initConfig().

◆ Ifx_AngleTrkF32_setUserSampling()

void Ifx_AngleTrkF32_setUserSampling | ( | Ifx_AngleTrkF32 * | aObsv,
 |  | float32 | Ts
 | ) |  |

Definition at line 150 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_init().

◆ Ifx_AngleTrkF32_stdIfPosInit()

boolean Ifx_AngleTrkF32_stdIfPosInit | ( | IfxStdIf_Pos * | stdif,
 |  | Ifx_AngleTrkF32 * | driver
 | ) |  |

Initializes the standard interface "Pos".

Parameters
stdif | Standard interface position object
driver | Virtual position sensor
Returns
TRUE on success else FALSE

Definition at line 427 of file Ifx_AngleTrkF32.c.

◆ round_f()

float32 round_f ( float32 val )

Definition at line 96 of file Ifx_AngleTrkF32.c.


iLLD_TC38A: Ifx_Cf32.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Functions
Ifx_Cf32.c File Reference

Floating point signal, vector, and matrix library. More...

#include "Ifx_Cf32.h"
#include <float.h>
#include <stdio.h>
Include dependency graph for Ifx_Cf32.c:

Go to the source code of this file.

Functions

void | CplxVecRst_f32 (cfloat32 *X, short nX)
void | CplxVecCpy_f32S (cfloat32 *X, short *S, short nS, short incrS)
void | CplxVecCpy_f32 (cfloat32 *X, cfloat32 *S, short nS)
float32 * | CplxVecPwr_f32 (cfloat32 *X, short nX)
float32 * | CplxVecMag_f32 (cfloat32 *X, short nX)
void | CplxVecMul_f32 (cfloat32 *X, const cfloat32 *mul, short nX)
void | VecPwrdB_f32 (float32 *X, short nX)
void | VecPwrdB_SF (sint16 *R, float32 *X, short nX)
float32 | VecMaxIdx_f32 (float32 *X, short nX, sint16 *minIdx, sint16 *maxIdx)
float32 | VecMinIdx_f32 (float32 *X, short nX, sint16 *minIdx, sint16 *maxIdx)
void | VecOfs_f32 (float32 *X, float32 offset, short nX)
void | VecGain_f32 (float32 *X, float32 gain, short nX)
float32 | VecSum_f32 (float32 *X, short nX)
float32 | VecAvg_f32 (float32 *X, short nX)
float32 | VecMax_f32 (float32 *X, short nX)
float32 | VecMin_f32 (float32 *X, short nX)
void | VecHalfSwap_f32 (float32 *X, short nX)
void | VecWin_f32 (float32 *X, const float32 *W, short nX, short nW, short incrX, short symW)

Detailed Description

Floating point signal, vector, and matrix library.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_Cf32.c.

Function Documentation

◆ CplxVecCpy_f32()

void CplxVecCpy_f32 | ( | cfloat32 * | X,
 |  | cfloat32 * | S,
 |  | short | nS
 | ) |  |

Definition at line 67 of file Ifx_Cf32.c.

◆ CplxVecCpy_f32S()

void CplxVecCpy_f32S | ( | cfloat32 * | X,
 |  | short * | S,
 |  | short | nS,
 |  | short | incrS
 | ) |  |

Definition at line 56 of file Ifx_Cf32.c.

◆ CplxVecMag_f32()

float32* CplxVecMag_f32 | ( | cfloat32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 92 of file Ifx_Cf32.c.

◆ CplxVecMul_f32()

void CplxVecMul_f32 | ( | cfloat32 * | X,
 |  | const cfloat32 * | mul,
 |  | short | nX
 | ) |  |

Definition at line 107 of file Ifx_Cf32.c.

◆ CplxVecPwr_f32()

float32* CplxVecPwr_f32 | ( | cfloat32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 77 of file Ifx_Cf32.c.

◆ CplxVecRst_f32()

void CplxVecRst_f32 | ( | cfloat32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 46 of file Ifx_Cf32.c.

◆ VecAvg_f32()

float32 VecAvg_f32 | ( | float32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 230 of file Ifx_Cf32.c.

◆ VecGain_f32()

void VecGain_f32 | ( | float32 * | X,
 |  | float32 | gain,
 |  | short | nX
 | ) |  |

Definition at line 203 of file Ifx_Cf32.c.

◆ VecHalfSwap_f32()

void VecHalfSwap_f32 | ( | float32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 266 of file Ifx_Cf32.c.

◆ VecMax_f32()

float32 VecMax_f32 | ( | float32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 236 of file Ifx_Cf32.c.

◆ VecMaxIdx_f32()

float32 VecMaxIdx_f32 | ( | float32 * | X,
 |  | short | nX,
 |  | sint16 * | minIdx,
 |  | sint16 * | maxIdx
 | ) |  |

Definition at line 141 of file Ifx_Cf32.c.

◆ VecMin_f32()

float32 VecMin_f32 | ( | float32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 251 of file Ifx_Cf32.c.

◆ VecMinIdx_f32()

float32 VecMinIdx_f32 | ( | float32 * | X,
 |  | short | nX,
 |  | sint16 * | minIdx,
 |  | sint16 * | maxIdx
 | ) |  |

Definition at line 166 of file Ifx_Cf32.c.

◆ VecOfs_f32()

void VecOfs_f32 | ( | float32 * | X,
 |  | float32 | offset,
 |  | short | nX
 | ) |  |

Definition at line 191 of file Ifx_Cf32.c.

◆ VecPwrdB_f32()

void VecPwrdB_f32 | ( | float32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 117 of file Ifx_Cf32.c.

◆ VecPwrdB_SF()

void VecPwrdB_SF | ( | sint16 * | R,
 |  | float32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 129 of file Ifx_Cf32.c.

◆ VecSum_f32()

float32 VecSum_f32 | ( | float32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 215 of file Ifx_Cf32.c.

Referenced by VecAvg_f32().

◆ VecWin_f32()

void VecWin_f32 | ( | float32 * | X,
 |  | const float32 * | W,
 |  | short | nX,
 |  | short | nW,
 |  | short | incrX,
 |  | short | symW
 | ) |  |

Definition at line 285 of file Ifx_Cf32.c.

Referenced by Ifx_WndF32_apply().


iLLD_TC38A: Ifx_Cf32.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Macros | Functions
Ifx_Cf32.h File Reference

Floating point signal, vector, and matrix library. More...

#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include <math.h>
Include dependency graph for Ifx_Cf32.h:

Go to the source code of this file.

Macros

#define | _DATAF(val) ((float32)(val))
#define | Cplx_f32_printf(...)

Functions

IFX_INLINE cfloat32 | IFX_Cf32_exp (const cfloat32 *c)
IFX_INLINE cfloat32 | IFX_Cf32_mul (const cfloat32 *a, const cfloat32 *b)
IFX_INLINE cfloat32 | IFX_Cf32_amp (const cfloat32 *a, float32 gain)
IFX_INLINE float32 | IFX_Cf32_dot (const cfloat32 *b)
IFX_INLINE float32 | IFX_Cf32_mag (const cfloat32 *c)
IFX_INLINE cfloat32 | IFX_Cf32_div (const cfloat32 *a, const cfloat32 *b)
IFX_INLINE cfloat32 | IFX_Cf32_add (const cfloat32 *a, const cfloat32 *b)
IFX_INLINE cfloat32 | IFX_Cf32_sub (const cfloat32 *a, const cfloat32 *b)
IFX_INLINE void | IFX_Cf32_set (cfloat32 *a, float32 re, float32 im)
IFX_INLINE void | IFX_Cf32_reset (cfloat32 *a)
IFX_INLINE cfloat32 | IFX_Cf32_saturate (cfloat32 *a, float32 *ampl, float32 limit)
IFX_EXTERN void | CplxVecCpy_f32S (cfloat32 *X, short *S, short nS, short incrS)
IFX_EXTERN void | CplxVecRst_f32 (cfloat32 *X, short nX)
IFX_EXTERN void | CplxVecCpy_f32 (cfloat32 *X, cfloat32 *S, short nS)
IFX_EXTERN float32 * | CplxVecPwr_f32 (cfloat32 *X, short nX)
IFX_EXTERN float32 * | CplxVecMag_f32 (cfloat32 *X, short nX)
IFX_EXTERN void | CplxVecMul_f32 (cfloat32 *X, const cfloat32 *mul, short nX)
IFX_EXTERN void | VecWin_f32 (float32 *X, const float32 *W, short nX, short nW, short incrX, short symW)
IFX_EXTERN void | VecPwrdB_f32 (float32 *X, short nX)
IFX_EXTERN void | VecPwrdB_SF (sint16 *R, float32 *X, short nX)
IFX_EXTERN void | VecGain_f32 (float32 *X, float32 gain, short nX)
IFX_EXTERN void | VecOfs_f32 (float32 *X, float32 offset, short nX)
IFX_EXTERN float32 | VecSum_f32 (float32 *X, short nX)
IFX_EXTERN float32 | VecAvg_f32 (float32 *X, short nX)
IFX_EXTERN float32 | VecMax_f32 (float32 *X, short nX)
IFX_EXTERN float32 | VecMin_f32 (float32 *X, short nX)
IFX_EXTERN float32 | VecMinIdx_f32 (float32 *X, short nX, sint16 *minIdx, sint16 *maxIdx)
IFX_EXTERN float32 | VecMaxIdx_f32 (float32 *X, short nX, sint16 *minIdx, sint16 *maxIdx)
IFX_EXTERN void | VecHalfSwap_f32 (float32 *X, short nX)

Detailed Description

Floating point signal, vector, and matrix library.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_Cf32.h.

Macro Definition Documentation

◆ _DATAF

#define _DATAF ( val ) ((float32)(val))

Definition at line 51 of file Ifx_Cf32.h.

◆ Cplx_f32_printf

#define Cplx_f32_printf ( ... )

Definition at line 178 of file Ifx_Cf32.h.

Function Documentation

◆ CplxVecCpy_f32()

IFX_EXTERN void CplxVecCpy_f32 | ( | cfloat32 * | X,
 |  | cfloat32 * | S,
 |  | short | nS
 | ) |  |

Definition at line 67 of file Ifx_Cf32.c.

◆ CplxVecCpy_f32S()

IFX_EXTERN void CplxVecCpy_f32S | ( | cfloat32 * | X,
 |  | short * | S,
 |  | short | nS,
 |  | short | incrS
 | ) |  |

Definition at line 56 of file Ifx_Cf32.c.

◆ CplxVecMag_f32()

IFX_EXTERN float32* CplxVecMag_f32 | ( | cfloat32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 92 of file Ifx_Cf32.c.

◆ CplxVecMul_f32()

IFX_EXTERN void CplxVecMul_f32 | ( | cfloat32 * | X,
 |  | const cfloat32 * | mul,
 |  | short | nX
 | ) |  |

Definition at line 107 of file Ifx_Cf32.c.

◆ CplxVecPwr_f32()

IFX_EXTERN float32* CplxVecPwr_f32 | ( | cfloat32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 77 of file Ifx_Cf32.c.

◆ CplxVecRst_f32()

IFX_EXTERN void CplxVecRst_f32 | ( | cfloat32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 46 of file Ifx_Cf32.c.

◆ IFX_Cf32_add()

IFX_INLINE cfloat32 IFX_Cf32_add | ( | const cfloat32 * | a,
 |  | const cfloat32 * | b
 | ) |  |

Definition at line 104 of file Ifx_Cf32.h.

Referenced by Ifx_FftF32_radix2DecimationInTime().

◆ IFX_Cf32_amp()

IFX_INLINE cfloat32 IFX_Cf32_amp | ( | const cfloat32 * | a,
 |  | float32 | gain
 | ) |  |

Definition at line 73 of file Ifx_Cf32.h.

◆ IFX_Cf32_div()

IFX_INLINE cfloat32 IFX_Cf32_div | ( | const cfloat32 * | a,
 |  | const cfloat32 * | b
 | ) |  |

Definition at line 94 of file Ifx_Cf32.h.

◆ IFX_Cf32_dot()

IFX_INLINE float32 IFX_Cf32_dot ( const cfloat32 * b )

Definition at line 82 of file Ifx_Cf32.h.

Referenced by CplxVecPwr_f32(), IFX_Cf32_div(), and IFX_Cf32_mag().

◆ IFX_Cf32_exp()

IFX_INLINE cfloat32 IFX_Cf32_exp ( const cfloat32 * c )

Definition at line 54 of file Ifx_Cf32.h.

◆ IFX_Cf32_mag()

IFX_INLINE float32 IFX_Cf32_mag ( const cfloat32 * c )

Definition at line 88 of file Ifx_Cf32.h.

Referenced by CplxVecMag_f32(), and IFX_Cf32_saturate().

◆ IFX_Cf32_mul()

IFX_INLINE cfloat32 IFX_Cf32_mul | ( | const cfloat32 * | a,
 |  | const cfloat32 * | b
 | ) |  |

Definition at line 64 of file Ifx_Cf32.h.

Referenced by CplxVecMul_f32(), and Ifx_FftF32_radix2DecimationInTime().

◆ IFX_Cf32_reset()

IFX_INLINE void IFX_Cf32_reset ( cfloat32 * a )

Definition at line 129 of file Ifx_Cf32.h.

◆ IFX_Cf32_saturate()

IFX_INLINE cfloat32 IFX_Cf32_saturate | ( | cfloat32 * | a,
 |  | float32 * | ampl,
 |  | float32 | limit
 | ) |  |

Definition at line 135 of file Ifx_Cf32.h.

◆ IFX_Cf32_set()

IFX_INLINE void IFX_Cf32_set | ( | cfloat32 * | a,
 |  | float32 | re,
 |  | float32 | im
 | ) |  |

Definition at line 122 of file Ifx_Cf32.h.

Referenced by IFX_Cf32_reset().

◆ IFX_Cf32_sub()

IFX_INLINE cfloat32 IFX_Cf32_sub | ( | const cfloat32 * | a,
 |  | const cfloat32 * | b
 | ) |  |

Definition at line 113 of file Ifx_Cf32.h.

Referenced by Ifx_FftF32_radix2DecimationInTime().

◆ VecAvg_f32()

IFX_EXTERN float32 VecAvg_f32 | ( | float32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 230 of file Ifx_Cf32.c.

◆ VecGain_f32()

IFX_EXTERN void VecGain_f32 | ( | float32 * | X,
 |  | float32 | gain,
 |  | short | nX
 | ) |  |

Definition at line 203 of file Ifx_Cf32.c.

◆ VecHalfSwap_f32()

IFX_EXTERN void VecHalfSwap_f32 | ( | float32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 266 of file Ifx_Cf32.c.

◆ VecMax_f32()

IFX_EXTERN float32 VecMax_f32 | ( | float32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 236 of file Ifx_Cf32.c.

◆ VecMaxIdx_f32()

IFX_EXTERN float32 VecMaxIdx_f32 | ( | float32 * | X,
 |  | short | nX,
 |  | sint16 * | minIdx,
 |  | sint16 * | maxIdx
 | ) |  |

Definition at line 141 of file Ifx_Cf32.c.

◆ VecMin_f32()

IFX_EXTERN float32 VecMin_f32 | ( | float32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 251 of file Ifx_Cf32.c.

◆ VecMinIdx_f32()

IFX_EXTERN float32 VecMinIdx_f32 | ( | float32 * | X,
 |  | short | nX,
 |  | sint16 * | minIdx,
 |  | sint16 * | maxIdx
 | ) |  |

Definition at line 166 of file Ifx_Cf32.c.

◆ VecOfs_f32()

IFX_EXTERN void VecOfs_f32 | ( | float32 * | X,
 |  | float32 | offset,
 |  | short | nX
 | ) |  |

Definition at line 191 of file Ifx_Cf32.c.

◆ VecPwrdB_f32()

IFX_EXTERN void VecPwrdB_f32 | ( | float32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 117 of file Ifx_Cf32.c.

◆ VecPwrdB_SF()

IFX_EXTERN void VecPwrdB_SF | ( | sint16 * | R,
 |  | float32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 129 of file Ifx_Cf32.c.

◆ VecSum_f32()

IFX_EXTERN float32 VecSum_f32 | ( | float32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 215 of file Ifx_Cf32.c.

Referenced by VecAvg_f32().

◆ VecWin_f32()

IFX_EXTERN void VecWin_f32 | ( | float32 * | X,
 |  | const float32 * | W,
 |  | short | nX,
 |  | short | nW,
 |  | short | incrX,
 |  | short | symW
 | ) |  |

Definition at line 285 of file Ifx_Cf32.c.

Referenced by Ifx_WndF32_apply().


iLLD_TC38A: Ifx_CircularBuffer.asm.c File Reference

  • _Lib
  • DataHandling
Ifx_CircularBuffer.asm.c File Reference

Circular buffer functions (assembler implementation). More...

#include "Ifx_CircularBuffer.h"
Include dependency graph for Ifx_CircularBuffer.asm.c:

Go to the source code of this file.

Detailed Description

Circular buffer functions (assembler implementation).

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_CircularBuffer.asm.c.


iLLD_TC38A: Ifx_CircularBuffer.c File Reference

  • _Lib
  • DataHandling
Functions
Ifx_CircularBuffer.c File Reference

Circular buffer functions in C language. More...

#include "Ifx_CircularBuffer.h"
Include dependency graph for Ifx_CircularBuffer.c:

Go to the source code of this file.

Functions

uint32 | Ifx_CircularBuffer_get32 (Ifx_CircularBuffer *buffer)
Return the circular buffer 32 bit value, and post-increment the circular buffer pointer. More...
uint16 | Ifx_CircularBuffer_get16 (Ifx_CircularBuffer *buffer)
Return the circular buffer 16 bit value, and post-increment the circular buffer pointer. More...
void | Ifx_CircularBuffer_addDataIncr (Ifx_CircularBuffer *buffer, uint32 data)
Add a 32 bit value to the circular buffer, and post-increment the circular buffer pointer. More...
void * | Ifx_CircularBuffer_read8 (Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
Copy count bytes from the circular buffer to the data array. More...
void * | Ifx_CircularBuffer_read32 (Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
Copy count 32 bit words from the circular buffer to the data array. More...
const void * | Ifx_CircularBuffer_write8 (Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
Copy count bytes from the data array to the circular buffer. More...
const void * | Ifx_CircularBuffer_write32 (Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
Copy count 32 bit words from the data array to the circular buffer. More...

Detailed Description

Circular buffer functions in C language.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_CircularBuffer.c.

Function Documentation

◆ Ifx_CircularBuffer_addDataIncr()

void Ifx_CircularBuffer_addDataIncr | ( | Ifx_CircularBuffer * | buffer,
 |  | uint32 | data
 | ) |  |

Add a 32 bit value to the circular buffer, and post-increment the circular buffer pointer.

Parameters
buffer | Specifies circular buffer.
data | Specifies value to be added to the buffer.
Returns
None.

Definition at line 83 of file Ifx_CircularBuffer.c.


iLLD_TC38A: Ifx_CircularBuffer.h File Reference

  • _Lib
  • DataHandling
Macros | Functions
Ifx_CircularBuffer.h File Reference

Circular buffer functions. More...

#include "Cpu/Std/IfxCpu_Intrinsics.h"
Include dependency graph for Ifx_CircularBuffer.h:

Go to the source code of this file.

Macros

#define IFX_CFG_CIRCULARBUFFER_C (1)

Functions

uint16 | Ifx_CircularBuffer_get16 (Ifx_CircularBuffer *buffer)
Return the circular buffer 16 bit value, and post-increment the circular buffer pointer. More...
uint32 | Ifx_CircularBuffer_get32 (Ifx_CircularBuffer *buffer)
Return the circular buffer 32 bit value, and post-increment the circular buffer pointer. More...
void * | Ifx_CircularBuffer_read8 (Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
Copy count bytes from the circular buffer to the data array. More...
void * | Ifx_CircularBuffer_read32 (Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
Copy count 32 bit words from the circular buffer to the data array. More...
const void * | Ifx_CircularBuffer_write8 (Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
Copy count bytes from the data array to the circular buffer. More...
const void * | Ifx_CircularBuffer_write32 (Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
Copy count 32 bit words from the data array to the circular buffer. More...

Detailed Description

Circular buffer functions.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_CircularBuffer.h.

Macro Definition Documentation

◆ IFX_CFG_CIRCULARBUFFER_C

#define IFX_CFG_CIRCULARBUFFER_C (1)

Definition at line 54 of file Ifx_CircularBuffer.h.


iLLD_TC38A: Ifx_Console.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Comm
Functions | Variables
Ifx_Console.c File Reference

Main Ifx_Console module implementation file. More...

#include <string.h>
#include <stdio.h>
#include <stdarg.h>
#include "Ifx_Console.h"
#include "_Utilities/Ifx_Assert.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
Include dependency graph for Ifx_Console.c:

Go to the source code of this file.

Functions

void | Ifx_Console_init (IfxStdIf_DPipe *standardIo)
Initialize the Ifx_g_console object. More...
boolean | Ifx_Console_print (pchar format,...)
Print formatted string into Ifx_g_console. More...
boolean | Ifx_Console_printAlign (pchar format,...)
Print formatted string into Ifx_g_console. Indented with a number of spaces. More...

Variables

Ifx_Console Ifx_g_console

Detailed Description

Main Ifx_Console module implementation file.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-03-13 15:49:47 GMT
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_Console.c.

Variable Documentation

◆ Ifx_g_console

Ifx_Console Ifx_g_console

Definition at line 50 of file Ifx_Console.c.

Referenced by Ifx_Console_init(), Ifx_Console_print(), and Ifx_Console_printAlign().


iLLD_TC38A: Ifx_Crc.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Functions
Ifx_Crc.c File Reference

CRC algorithm. More...

#include "Ifx_Crc.h"
Include dependency graph for Ifx_Crc.c:

Go to the source code of this file.

Functions

uint32 | Ifx_Crc_reflect (uint32 crc, sint32 bitnum)
boolean | Ifx_Crc_init (Ifc_Crc *driver, const Ifc_Crc_Table *table, sint32 direct, sint32 refout, uint32 crcinit, uint32 crcxor)
boolean | Ifx_Crc_createTable (Ifc_Crc_Table *table, sint32 order, uint32 polynom, sint32 refin)
uint32 | Ifx_Crc_tableFast (Ifc_Crc *driver, uint8 *p, uint32 len)
uint32 | Ifx_Crc_table (Ifc_Crc *driver, uint8 *p, uint32 len)
uint32 | Ifx_Crc_bitByBit (Ifc_Crc *driver, uint8 *p, uint32 len)
uint32 | Ifx_Crc_bitByBitFast (Ifc_Crc *driver, uint8 *p, uint32 len)

Detailed Description

CRC algorithm.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_Crc.c.

Function Documentation

◆ Ifx_Crc_reflect()

uint32 Ifx_Crc_reflect | ( | uint32 | crc,
 |  | sint32 | bitnum
 | ) |  |

Definition at line 201 of file Ifx_Crc.c.

Referenced by Ifx_Crc_bitByBit(), Ifx_Crc_bitByBitFast(), Ifx_Crc_createTable(), Ifx_Crc_table(), and Ifx_Crc_tableFast().


iLLD_TC38A: Ifx_DateTime.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Time
Functions | Variables
Ifx_DateTime.c File Reference

Date and time functions. More...

#include "Ifx_DateTime.h"
#include "SysSe/Bsp/Bsp.h"
Include dependency graph for Ifx_DateTime.c:

Go to the source code of this file.

Functions

void | DateTime_get (Ifx_DateTime *dt)
Get the real time Note that this function is valid only if DateTime_set() has been called. More...
void | DateTime_set (Ifx_DateTime *dt)
Set the real time. More...

Variables

sint32 g_DateTimeOffset

Detailed Description

Date and time functions.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-27 20:08:37 GMT
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_DateTime.c.

Variable Documentation

◆ g_DateTimeOffset

sint32 g_DateTimeOffset

Definition at line 46 of file Ifx_DateTime.c.

Referenced by DateTime_get(), and DateTime_set().


iLLD_TC38A: Ifx_FftF32.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Functions
Ifx_FftF32.c File Reference

Floating-point Fast Fourier Transform. More...

#include "Ifx_FftF32.h"
#include <math.h>
Include dependency graph for Ifx_FftF32.c:

Go to the source code of this file.

Functions

cfloat32 * | Ifx_FftF32_generateTwiddleFactor (cfloat32 *TF, short nX)
Twiddle factor generator. More...
unsigned short | Ifx_FftF32_reverseBits (unsigned short n, unsigned bits)
Calculate the bit-reversed <n> with <bits> as number of bits. More...
void | Ifx_FftF32_radix2DecimationInTime (cfloat32 *R, unsigned long p)
cfloat32 * | Ifx_FftF32_radix2 (cfloat32 *R, const cfloat32 *X, unsigned short nX)
Radix-2 Fast-Fourier Transform. More...
cfloat32 * | Ifx_FftF32_radix2I (cfloat32 *R, const cfloat32 *X, unsigned short nX)
Radix-2 Inverse Fast-Fourier Transform. More...

Detailed Description

Floating-point Fast Fourier Transform.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_FftF32.c.

Function Documentation

◆ Ifx_FftF32_radix2DecimationInTime()

void Ifx_FftF32_radix2DecimationInTime | ( | cfloat32 * | R,
 |  | unsigned long | p
 | ) |  |

Definition at line 91 of file Ifx_FftF32.c.

Referenced by Ifx_FftF32_radix2(), and Ifx_FftF32_radix2I().


iLLD_TC38A: Ifx_FftF32_BitReverseTable.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Variables
Ifx_FftF32_BitReverseTable.c File Reference

Bit-reversal lookup for Floating-point Fast Fourier Transform. More...

#include "Ifx_FftF32.h"
Include dependency graph for Ifx_FftF32_BitReverseTable.c:

Go to the source code of this file.

Variables

CONST_CFG unsigned short Ifx_g_FftF32_bitReverseTable [IFX_FFTF32_MAX_LENGTH]

Detailed Description

Bit-reversal lookup for Floating-point Fast Fourier Transform.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_FftF32_BitReverseTable.c.

Variable Documentation

◆ Ifx_g_FftF32_bitReverseTable

CONST_CFG unsigned short Ifx_g_FftF32_bitReverseTable[IFX_FFTF32_MAX_LENGTH]

Definition at line 46 of file Ifx_FftF32_BitReverseTable.c.


iLLD_TC38A: Ifx_FftF32_TwiddleTable.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Variables
Ifx_FftF32_TwiddleTable.c File Reference

Floating-point Fast Fourier Transform Twiddle-Factors. More...

#include "Ifx_FftF32.h"
Include dependency graph for Ifx_FftF32_TwiddleTable.c:

Go to the source code of this file.

Variables

IFX_CONST cfloat32 Ifx_g_FftF32_twiddleTable [IFX_FFTF32_MAX_LENGTH/2]

Detailed Description

Floating-point Fast Fourier Transform Twiddle-Factors.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_FftF32_TwiddleTable.c.

Variable Documentation

◆ Ifx_g_FftF32_twiddleTable

IFX_CONST cfloat32 Ifx_g_FftF32_twiddleTable[IFX_FFTF32_MAX_LENGTH/2]

Definition at line 46 of file Ifx_FftF32_TwiddleTable.c.


iLLD_TC38A: Ifx_Fifo.c File Reference

  • _Lib
  • DataHandling
Functions
Ifx_Fifo.c File Reference

FIFO functions. More...

#include "Ifx_Fifo.h"
#include <stdlib.h>
#include "Ifx_CircularBuffer.h"
#include "_Utilities/Ifx_Assert.h"
#include "Cpu/Std/IfxCpu.h"
#include "Stm/Std/IfxStm.h"
Include dependency graph for Ifx_Fifo.c:

Go to the source code of this file.

Functions

Ifx_Fifo * | Ifx_Fifo_create (Ifx_SizeT size, Ifx_SizeT elementSize)
Create a Fifo object. More...
void | Ifx_Fifo_destroy (Ifx_Fifo *fifo)
Destroy the FIFO object. More...
Ifx_Fifo * | Ifx_Fifo_init (void *buffer, Ifx_SizeT size, Ifx_SizeT elementSize)
Initialize the FIFO buffer object. More...
boolean | Ifx_Fifo_canReadCount (Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if the required number of bytes are available in the buffer. More...
Ifx_SizeT | Ifx_Fifo_read (Ifx_Fifo *fifo, void *data, Ifx_SizeT count, Ifx_TickTime timeout)
Read data from a fifo and remove them from the buffer. More...
void | Ifx_Fifo_clear (Ifx_Fifo *fifo)
Clear fifo contents. More...
boolean | Ifx_Fifo_canWriteCount (Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if there is enough free space to write the data in the buffer. More...
Ifx_SizeT | Ifx_Fifo_write (Ifx_Fifo *fifo, const void *data, Ifx_SizeT count, Ifx_TickTime timeout)
Write data into a fifo. More...

Detailed Description

FIFO functions.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_Fifo.c.


iLLD_TC38A: Ifx_IntegralF32.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Functions
Ifx_IntegralF32.c File Reference

Discrete integral approximation. More...

#include "Ifx_IntegralF32.h"
Include dependency graph for Ifx_IntegralF32.c:

Go to the source code of this file.

Functions

void | Ifx_IntegralF32_reset (Ifx_IntegralF32 *ci)
Reset the integrator object. More...
void | Ifx_IntegralF32_init (Ifx_IntegralF32 *ci, float32 gain, float32 Ts)
Initialize the integrator object. More...
float32 | Ifx_IntegralF32_step (Ifx_IntegralF32 *ci, float32 ik)
Step function of the integrator object. More...
void | Ifx_ClpxFloat32_Integral_reset (Ifx_ClpxFloat32_Integral *ci)
Reset the integrator object. More...
void | Ifx_ClpxFloat32_Integral_init (Ifx_ClpxFloat32_Integral *ci, float32 gain, float32 Ts)
Initialize the integrator object. More...
cfloat32 | Ifx_ClpxFloat32_Integral_step (Ifx_ClpxFloat32_Integral *ci, cfloat32 ik)
Step function of the integrator object. More...

Detailed Description

Discrete integral approximation.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_IntegralF32.c.


iLLD_TC38A: Ifx_InternalMux.c File Reference

  • _Lib
  • InternalMux
Functions
Ifx_InternalMux.c File Reference

Mux configuration functions. More...

#include "Ifx_InternalMux.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
Include dependency graph for Ifx_InternalMux.c:

Go to the source code of this file.

Functions

void Ifx_InternalMux_init (const Ifx_InternalMux_Config *cfg)
Initialises the internal mux configuration. More...

Detailed Description

Mux configuration functions.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_InternalMux.c.


iLLD_TC38A: Ifx_InternalMux.h File Reference

  • _Lib
  • InternalMux
Data Structures | Functions
Ifx_InternalMux.h File Reference

Mux configuration functions. More...

#include "Cpu/Std/Ifx_Types.h"
Include dependency graph for Ifx_InternalMux.h:

Go to the source code of this file.

Data Structures

struct | Ifx_InternalMux_MuxConfig
struct | Ifx_InternalMux_Config

Functions

IFX_EXTERN void Ifx_InternalMux_init (const Ifx_InternalMux_Config *cfg)
Initialises the internal mux configuration. More...

Detailed Description

Mux configuration functions.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2015 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_InternalMux.h.


iLLD_TC38A: Ifx_LowPassPt1F32.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Functions
Ifx_LowPassPt1F32.c File Reference

Low pass filter PT1. More...

#include "SysSe/Math/Ifx_LowPassPt1F32.h"
Include dependency graph for Ifx_LowPassPt1F32.c:

Go to the source code of this file.

Functions

void | Ifx_LowPassPt1F32_init (Ifx_LowPassPt1F32 *filter, const Ifx_LowPassPt1F32_Config *config)
Set the low pass filter configuration. More...
float32 | Ifx_LowPassPt1F32_do (Ifx_LowPassPt1F32 *filter, float32 input)
Execute the low pass filter. More...

Detailed Description

Low pass filter PT1.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_LowPassPt1F32.c.


iLLD_TC38A: Ifx_Lut.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Macros | Typedefs
Ifx_Lut.h File Reference

Lookup defintion with fixed-point angle data type. More...

#include "Cpu/Std/IfxCpu_Intrinsics.h"
Include dependency graph for Ifx_Lut.h:

Go to the source code of this file.

Macros

#define | IFX_LUT_TABLE_CONST (1)
0 = Lookup tables are generated and stored in RAM, 1 = Lookup tables are precompiled and stored in FLASH More...
#define | IFX_LUT_TABLE const
Lookup table type modifier (stored in ROM) More...
#define | IFX_LUT_ANGLE_BITS (12)
Define the resolution (in bits) of cosinus and sinus table. More...
#define | IFX_LUT_ANGLE_RESOLUTION (1 << IFX_LUT_ANGLE_BITS)
Define the cosinus and sinus table size. More...
#define | IFX_LUT_ANGLE_PI (IFX_LUT_ANGLE_RESOLUTION / 2)
Value used as 180 degree angle. More...
#define | IFX_LUT_F32_TO_FXPANGLE(f) ((Ifx_Lut_FxpAngle)(f / IFX_PI * IFX_LUT_ANGLE_PI))
Convert from float32 angle in radian into fixed-point angle type. More...
#define | IFX_LUT_FXPANGLE_TO_F32(fx) ((float32)fx * IFX_PI / IFX_LUT_ANGLE_PI)
Convert from fixed-point angle type to float32 angle in radian. More...

Typedefs

typedef sint32 Ifx_Lut_FxpAngle
Fixed-point angle type. More...

Detailed Description

Lookup defintion with fixed-point angle data type.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_Lut.h.

Macro Definition Documentation

◆ IFX_LUT_ANGLE_PI

#define IFX_LUT_ANGLE_PI (IFX_LUT_ANGLE_RESOLUTION / 2)

Value used as 180 degree angle.

Definition at line 75 of file Ifx_Lut.h.

Referenced by Ifx_LutAtan2F32_fxpAngle(), Ifx_LutLSincosF32_cos(), Ifx_LutLSincosF32_cossin(), Ifx_LutSincosF32_cos(), Ifx_LutSincosF32_cossin(), Ifx_LutSincosF32_init(), and Ifx_LutSincosF32_sin().

◆ IFX_LUT_F32_TO_FXPANGLE

#define IFX_LUT_F32_TO_FXPANGLE ( f ) ((Ifx_Lut_FxpAngle)(f / IFX_PI * IFX_LUT_ANGLE_PI))

Convert from float32 angle in radian into fixed-point angle type.

Definition at line 84 of file Ifx_Lut.h.

Referenced by Ifx_LutAtan2F32_init().

◆ IFX_LUT_FXPANGLE_TO_F32

#define IFX_LUT_FXPANGLE_TO_F32 ( fx ) ((float32)fx * IFX_PI / IFX_LUT_ANGLE_PI)

Convert from fixed-point angle type to float32 angle in radian.

Definition at line 87 of file Ifx_Lut.h.

◆ IFX_LUT_TABLE

#define IFX_LUT_TABLE const

Lookup table type modifier (stored in ROM)

Definition at line 62 of file Ifx_Lut.h.

◆ IFX_LUT_TABLE_CONST

#define IFX_LUT_TABLE_CONST (1)

0 = Lookup tables are generated and stored in RAM, 1 = Lookup tables are precompiled and stored in FLASH

Definition at line 57 of file Ifx_Lut.h.

Typedef Documentation

◆ Ifx_Lut_FxpAngle

typedef sint32 Ifx_Lut_FxpAngle

Fixed-point angle type.

Resolution is defined by IFX_LUT_ANGLE_RESOLUTION

Definition at line 81 of file Ifx_Lut.h.


iLLD_TC38A: Ifx_LutAtan2F32.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Functions
Ifx_LutAtan2F32.c File Reference

ATAN2 lookup functions with fixed-point angle data type. More...

#include "Ifx_LutAtan2F32.h"
#include <math.h>
Include dependency graph for Ifx_LutAtan2F32.c:

Go to the source code of this file.

Functions

void | Ifx_LutAtan2F32_init (void)
Initialise the lookup tables. More...
IFX_INLINE Ifx_Lut_FxpAngle | Ifx_LutAtan2F32_fxpAnglePrivate (float32 valf)
IFX_INLINE float32 | Ifx_LutAtan2F32_float32Private (float32 val)
Ifx_Lut_FxpAngle | Ifx_LutAtan2F32_fxpAngle (float32 x, float32 y)
Look-up arcus tangent value of y/x. More...
float32 | Ifx_LutAtan2F32_float32 (float32 y, float32 x)

Detailed Description

ATAN2 lookup functions with fixed-point angle data type.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_LutAtan2F32.c.

Function Documentation

◆ Ifx_LutAtan2F32_float32()

float32 Ifx_LutAtan2F32_float32 | ( | float32 | y,
 |  | float32 | x
 | ) |  |

Definition at line 145 of file Ifx_LutAtan2F32.c.

◆ Ifx_LutAtan2F32_float32Private()

IFX_INLINE float32 Ifx_LutAtan2F32_float32Private ( float32 val )

Definition at line 78 of file Ifx_LutAtan2F32.c.

Referenced by Ifx_LutAtan2F32_float32().

◆ Ifx_LutAtan2F32_fxpAnglePrivate()

IFX_INLINE Ifx_Lut_FxpAngle Ifx_LutAtan2F32_fxpAnglePrivate ( float32 valf )

Definition at line 63 of file Ifx_LutAtan2F32.c.

Referenced by Ifx_LutAtan2F32_fxpAngle().


iLLD_TC38A: Ifx_LutAtan2F32.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Macros | Functions | Variables
Ifx_LutAtan2F32.h File Reference

Floating point signal, vector, and matrix library. More...

#include "Ifx_Lut.h"
Include dependency graph for Ifx_LutAtan2F32.h:

Go to the source code of this file.

Macros

#define IFX_LUTATAN2F32_SIZE (1024)
size of Ifx_LutAtan2F32 table More...

Functions

IFX_EXTERN void | Ifx_LutAtan2F32_init (void)
Initialise the lookup tables. More...
IFX_EXTERN Ifx_Lut_FxpAngle | Ifx_LutAtan2F32_fxpAngle (float32 x, float32 y)
Look-up arcus tangent value of y/x. More...
IFX_EXTERN float32 | Ifx_LutAtan2F32_float32 (float32 y, float32 x)

Variables

IFX_EXTERN IFX_LUT_TABLE Ifx_Lut_FxpAngle | Ifx_g_LutAtan2F32_FxpAngle_table [IFX_LUTATAN2F32_SIZE+1]
Table I for Ifx_LutAtan2F32_fxpAngle() More...
IFX_EXTERN IFX_LUT_TABLE float32 | Ifx_g_LutAtan2F32_table [IFX_LUTATAN2F32_SIZE+1]

Detailed Description

Floating point signal, vector, and matrix library.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_LutAtan2F32.h.

Macro Definition Documentation

◆ IFX_LUTATAN2F32_SIZE

#define IFX_LUTATAN2F32_SIZE (1024)

size of Ifx_LutAtan2F32 table

Definition at line 52 of file Ifx_LutAtan2F32.h.

Referenced by Ifx_LutAtan2F32_float32Private(), Ifx_LutAtan2F32_fxpAnglePrivate(), and Ifx_LutAtan2F32_init().

Function Documentation

◆ Ifx_LutAtan2F32_float32()

IFX_EXTERN float32 Ifx_LutAtan2F32_float32 | ( | float32 | y,
 |  | float32 | x
 | ) |  |

Definition at line 145 of file Ifx_LutAtan2F32.c.

Variable Documentation

◆ Ifx_g_LutAtan2F32_FxpAngle_table

IFX_EXTERN IFX_LUT_TABLE Ifx_Lut_FxpAngle Ifx_g_LutAtan2F32_FxpAngle_table[IFX_LUTATAN2F32_SIZE+1]

Table I for Ifx_LutAtan2F32_fxpAngle()

Definition at line 57 of file Ifx_LutAtan2F32.h.

Referenced by Ifx_LutAtan2F32_fxpAnglePrivate(), and Ifx_LutAtan2F32_init().

◆ Ifx_g_LutAtan2F32_table

IFX_EXTERN IFX_LUT_TABLE float32 Ifx_g_LutAtan2F32_table[IFX_LUTATAN2F32_SIZE+1]

Definition at line 58 of file Ifx_LutAtan2F32.h.

Referenced by Ifx_LutAtan2F32_float32Private().


iLLD_TC38A: Ifx_LutAtan2F32_Table.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Variables
Ifx_LutAtan2F32_Table.c File Reference

Table data for ATAN2 lookup functions. More...

#include "Ifx_LutAtan2F32.h"
Include dependency graph for Ifx_LutAtan2F32_Table.c:

Go to the source code of this file.

Variables

const Ifx_Lut_FxpAngle | Ifx_g_LutAtan2F32_FxpAngle_table [1024+1]
const float32 | Ifx_g_LutAtan2F32_table [IFX_LUTATAN2F32_SIZE+1]

Detailed Description

Table data for ATAN2 lookup functions.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_LutAtan2F32_Table.c.

Variable Documentation

◆ Ifx_g_LutAtan2F32_FxpAngle_table

const Ifx_Lut_FxpAngle Ifx_g_LutAtan2F32_FxpAngle_table[1024+1]

Definition at line 54 of file Ifx_LutAtan2F32_Table.c.

◆ Ifx_g_LutAtan2F32_table

const float32 Ifx_g_LutAtan2F32_table[IFX_LUTATAN2F32_SIZE+1]

Definition at line 1083 of file Ifx_LutAtan2F32_Table.c.


iLLD_TC38A: Ifx_LutLinearF32.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Functions
Ifx_LutLinearF32.c File Reference

Linear look-up function. More...

#include "Ifx_LutLinearF32.h"
Include dependency graph for Ifx_LutLinearF32.c:

Go to the source code of this file.

Functions

float32 Ifx_LutLinearF32_searchBin (const Ifx_LutLinearF32 *ml, float32 index)
Look-up table with binary search implementation. More...

Detailed Description

Linear look-up function.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_LutLinearF32.c.


iLLD_TC38A: Ifx_LutLSincosF32.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Macros | Variables
Ifx_LutLSincosF32.c File Reference

Table data for linear interpolation Sin/Cos lookup functions. More...

#include "Ifx_Lut.h"
#include "Ifx_LutIndexedLinearF32.h"
Include dependency graph for Ifx_LutLSincosF32.c:

Go to the source code of this file.

Macros

#define IFX_F32_LUTL_SINCOS_ELEMENT_COUNT (128)

Variables

const Ifx_LutIndexedLinearF32_Item | Ifx_g_LutLSincosF32_table [128]
const Ifx_LutIndexedLinearF32 | Ifx_g_LutLSincosF32

Detailed Description

Table data for linear interpolation Sin/Cos lookup functions.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Revision
614
Date
2013-03-04 14:09:48 +0100 (Mon, 04 Mar 2013)

Definition in file Ifx_LutLSincosF32.c.

Macro Definition Documentation

◆ IFX_F32_LUTL_SINCOS_ELEMENT_COUNT

#define IFX_F32_LUTL_SINCOS_ELEMENT_COUNT (128)

Definition at line 60 of file Ifx_LutLSincosF32.c.

Variable Documentation

◆ Ifx_g_LutLSincosF32

const Ifx_LutIndexedLinearF32 Ifx_g_LutLSincosF32
Initial value:
= {
.segmentCount = IFX_F32_LUTL_SINCOS_ELEMENT_COUNT,
.shift = 5,
.segments = Ifx_g_LutLSincosF32_table
}
Ifx_g_LutLSincosF32_table
const Ifx_LutIndexedLinearF32_Item Ifx_g_LutLSincosF32_table[128]
Definition: Ifx_LutLSincosF32.c:62
IFX_F32_LUTL_SINCOS_ELEMENT_COUNT
#define IFX_F32_LUTL_SINCOS_ELEMENT_COUNT
Definition: Ifx_LutLSincosF32.c:60

Definition at line 193 of file Ifx_LutLSincosF32.c.

◆ Ifx_g_LutLSincosF32_table

const Ifx_LutIndexedLinearF32_Item Ifx_g_LutLSincosF32_table[128]

Definition at line 62 of file Ifx_LutLSincosF32.c.


iLLD_TC38A: Ifx_LutSincosF32.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Functions
Ifx_LutSincosF32.c File Reference

Sin/Cos lookup functions with fixed-point angle data type. More...

#include "Ifx_LutSincosF32.h"
#include <math.h>
Include dependency graph for Ifx_LutSincosF32.c:

Go to the source code of this file.

Functions

void | Ifx_LutSincosF32_init (void)
Initialise the lookup tables. More...
float32 | Ifx_LutSincosF32_sin (Ifx_Lut_FxpAngle fxpAngle)
Sine lookup function. More...

Detailed Description

Sin/Cos lookup functions with fixed-point angle data type.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_LutSincosF32.c.


iLLD_TC38A: Ifx_LutSincosF32_Table.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Variables
Ifx_LutSincosF32_Table.c File Reference

Table data for Sin/Cos lookup functions. More...

#include "Ifx_Lut.h"
Include dependency graph for Ifx_LutSincosF32_Table.c:

Go to the source code of this file.

Variables

const float32 Ifx_g_LutSincosF32_table [1025]

Detailed Description

Table data for Sin/Cos lookup functions.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Revision
614
Date
2013-03-04 14:09:48 +0100 (Mon, 04 Mar 2013)

Definition in file Ifx_LutSincosF32_Table.c.

Variable Documentation

◆ Ifx_g_LutSincosF32_table

const float32 Ifx_g_LutSincosF32_table[1025]

Definition at line 58 of file Ifx_LutSincosF32_Table.c.


iLLD_TC38A: Ifx_RampF32.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Functions
Ifx_RampF32.c File Reference

Ramp function. More...

#include "SysSe/Math/Ifx_RampF32.h"
Include dependency graph for Ifx_RampF32.c:

Go to the source code of this file.

Functions

float32 Ifx_RampF32_step (Ifx_RampF32 *ramp)
Execute the Ramp function. More...

Detailed Description

Ramp function.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_RampF32.c.


iLLD_TC38A: Ifx_Shell.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Comm
Macros | Functions | Variables
Ifx_Shell.c File Reference

shell functions. More...

#include "Ifx_Shell.h"
#include "_Utilities/Ifx_Assert.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include <string.h>
#include <stdlib.h>
#include <stdio.h>
Include dependency graph for Ifx_Shell.c:

Go to the source code of this file.

Macros

#define | IFX_SHELL_LLD "%lld "
#define | IFX_SHELL_LLX "%llx "
#define | IFX_SHELL_LLU "%llu "
#define | IFX_SHELL_MAX_MESSAGE_SIZE 255
#define | ISSPACE(c) (((c) == ' ') || ((c) == '\t'))
#define | IFX_SHELL_IF_ECHO(X) {if (shell->control.echo) {X; }}
#define | IFX_SHELL_WRITE_SPACES(X) {int ii; for (ii = 0; ii < (X); ii++) {IfxStdIf_DPipe_print(shell->io, " "); }}
#define | IFX_SHELL_WRITE_BACKSPACES(X) {int ii; for (ii = 0; ii < (X); ii++) {IfxStdIf_DPipe_print(shell->io, "\b"); }}

Functions

void | Ifx_Shell_execute (Ifx_Shell *shell, pchar commandLine)
void | Ifx_Shell_cmdEscapeProcess (Ifx_Shell *shell, char EscapeChar1, char EscapeChar2)
const Ifx_Shell_Command * | Ifx_Shell_commandListFind (Ifx_Shell *shell, pchar commandLine, pchar *args, Ifx_Shell_CommandListConst *commandList)
boolean | Ifx_Shell_isEndOfLine (pchar args)
Check whether the args is already at the end. More...
boolean | Ifx_Shell_showHelpSingle (Ifx_Shell_CommandListConst commandList, IfxStdIf_DPipe *io, boolean briefOnly, boolean singleCommand)
Implementation of Ifx_Shell_Call. Show the help menu from single command list. More...
boolean | Ifx_Shell_showHelpSingleCommand (pchar args, void *shellPtr, IfxStdIf_DPipe *io)
boolean | Ifx_Shell_showHelp (pchar args, void *shellPtr, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. Show the help menu and list of commands. More...
boolean | Ifx_Shell_protocolStart (pchar args, void *data, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. Start the Shell protocol. More...
boolean | Ifx_Shell_bbProtocolStart (pchar args, void *data, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. Start the ShellBb protocol. More...
void | Ifx_Shell_initConfig (Ifx_Shell_Config *config)
boolean | Ifx_Shell_init (Ifx_Shell *shell, const Ifx_Shell_Config *config)
Initialize the shell. More...
void | Ifx_Shell_process (Ifx_Shell *shell)
Process the shell. More...
void | Ifx_Shell_deinit (Ifx_Shell *shell)
Deinitialise the shell. More...
pchar | Ifx_Shell_skipWhitespace (pchar args)
Within the context of Shell.call, skip the whitespaces of the args string. More...
boolean | Ifx_Shell_matchToken (pchar *argsPtr, pchar token)
Match string pointed by the *argsPtr with a given token. More...
boolean | Ifx_Shell_parseToken (pchar *argsPtr, char *tokenBuffer, int bufferLength)
Parse a token Return the next token in tokenBuffer and move the argsPtr pointer after this token. More...
boolean | Ifx_Shell_parseAddress (pchar *argsPtr, void **address)
Parse an address. More...
boolean | Ifx_Shell_parseSInt32 (pchar *argsPtr, sint32 *value)
Parse a signed 32-bit integer value. More...
boolean | Ifx_Shell_parseUInt32 (pchar *argsPtr, uint32 *value, boolean hex)
Parse an unsigned 32-bit integer value. More...
boolean | Ifx_Shell_parseSInt64 (pchar *argsPtr, sint64 *value)
Parse a signed 64-bit integer value. More...
boolean | Ifx_Shell_parseUInt64 (pchar *argsPtr, uint64 *value, boolean hex)
Parse an unsigned 64-bit integer value. More...
boolean | Ifx_Shell_parseFloat64 (pchar *argsPtr, float64 *value)
Parse a 64-bit (double precision) floating-point value. More...
boolean | Ifx_Shell_parseFloat32 (pchar *argsPtr, float32 *value)
Parse a 32-bit (single precision) floating-point value. More...
const Ifx_Shell_Command * | Ifx_Shell_commandFind (Ifx_Shell_CommandListConst commandList, pchar commandLine, pchar *args, uint32 *match)
Find command in command List. More...
void | Ifx_Shell_enable (Ifx_Shell *shell)
Clear the receive buffer and enable the shell. More...
void | Ifx_Shell_disable (Ifx_Shell *shell)
Disable the shell. More...
void | Ifx_Shell_printSyntax (const Ifx_Shell_Syntax *syntaxList, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. print the syntax. More...

Variables

char Ifx_Shell_cmdBuffer [IFX_CFG_SHELL_CMD_LINE_SIZE *IFX_CFG_SHELL_CMD_HISTORY_SIZE]

Detailed Description

shell functions.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_Shell.c.

Macro Definition Documentation

◆ IFX_SHELL_IF_ECHO

#define IFX_SHELL_IF_ECHO ( X ) {if (shell->control.echo) {X; }}

Definition at line 63 of file Ifx_Shell.c.

Referenced by Ifx_Shell_cmdEscapeProcess(), and Ifx_Shell_process().

◆ IFX_SHELL_LLD

#define IFX_SHELL_LLD "%lld "

Definition at line 51 of file Ifx_Shell.c.

Referenced by Ifx_Shell_parseSInt64().

◆ IFX_SHELL_LLU

#define IFX_SHELL_LLU "%llu "

Definition at line 53 of file Ifx_Shell.c.

Referenced by Ifx_Shell_parseUInt64().

◆ IFX_SHELL_LLX

#define IFX_SHELL_LLX "%llx "

Definition at line 52 of file Ifx_Shell.c.

Referenced by Ifx_Shell_parseUInt64().

◆ IFX_SHELL_MAX_MESSAGE_SIZE

#define IFX_SHELL_MAX_MESSAGE_SIZE 255

Definition at line 56 of file Ifx_Shell.c.

◆ IFX_SHELL_WRITE_BACKSPACES

#define IFX_SHELL_WRITE_BACKSPACES ( X ) {int ii; for (ii = 0; ii < (X); ii++) {IfxStdIf_DPipe_print(shell->io, "\b"); }}

Definition at line 70 of file Ifx_Shell.c.

Referenced by Ifx_Shell_cmdEscapeProcess(), and Ifx_Shell_process().

◆ IFX_SHELL_WRITE_SPACES

#define IFX_SHELL_WRITE_SPACES ( X ) {int ii; for (ii = 0; ii < (X); ii++) {IfxStdIf_DPipe_print(shell->io, " "); }}

Definition at line 66 of file Ifx_Shell.c.

Referenced by Ifx_Shell_cmdEscapeProcess().

◆ ISSPACE

#define ISSPACE ( c ) (((c) == ' ') || ((c) == '\t'))

Definition at line 60 of file Ifx_Shell.c.

Referenced by Ifx_Shell_parseToken(), and Ifx_Shell_skipWhitespace().

Function Documentation

◆ Ifx_Shell_cmdEscapeProcess()

void Ifx_Shell_cmdEscapeProcess | ( | Ifx_Shell * | shell,
 |  | char | EscapeChar1,
 |  | char | EscapeChar2
 | ) |  |

Definition at line 1090 of file Ifx_Shell.c.

Referenced by Ifx_Shell_process().

◆ Ifx_Shell_commandListFind()

const Ifx_Shell_Command * Ifx_Shell_commandListFind | ( | Ifx_Shell * | shell,
 |  | pchar | commandLine,
 |  | pchar * | args,
 |  | Ifx_Shell_CommandListConst * | commandList
 | ) |  |

Definition at line 1000 of file Ifx_Shell.c.

Referenced by Ifx_Shell_execute(), and Ifx_Shell_showHelpSingleCommand().

◆ Ifx_Shell_execute()

void Ifx_Shell_execute | ( | Ifx_Shell * | shell,
 |  | pchar | commandLine
 | ) |  |

Definition at line 1027 of file Ifx_Shell.c.

Referenced by Ifx_Shell_process().

◆ Ifx_Shell_isEndOfLine()

boolean Ifx_Shell_isEndOfLine ( pchar args )

Check whether the args is already at the end.

Parameters
args The argument null-terminated string

Definition at line 86 of file Ifx_Shell.c.

◆ Ifx_Shell_showHelpSingleCommand()

boolean Ifx_Shell_showHelpSingleCommand | ( | pchar | args,
 |  | void * | shellPtr,
 |  | IfxStdIf_DPipe * | io
 | ) |  |

Definition at line 197 of file Ifx_Shell.c.

Referenced by Ifx_Shell_showHelp().

Variable Documentation

◆ Ifx_Shell_cmdBuffer

char Ifx_Shell_cmdBuffer[IFX_CFG_SHELL_CMD_LINE_SIZE *IFX_CFG_SHELL_CMD_HISTORY_SIZE]

Definition at line 74 of file Ifx_Shell.c.

Referenced by Ifx_Shell_init().


iLLD_TC38A: Ifx_Ssw_Compilers.h File Reference

  • Infra
  • Ssw
  • TC38A
  • Tricore
Macros
Ifx_Ssw_Compilers.h File Reference

Startup Software for compiler options. More...

#include "Ifx_Ssw_CompilersGnuc.h"
Include dependency graph for Ifx_Ssw_Compilers.h:

Go to the source code of this file.

Macros

#define __HIGHTEC__

Detailed Description

Startup Software for compiler options.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_Ssw_Compilers.h.

Macro Definition Documentation

◆ __HIGHTEC__

#define __HIGHTEC__

Definition at line 47 of file Ifx_Ssw_Compilers.h.


iLLD_TC38A: Ifx_Ssw_CompilersDcc.h File Reference

  • Infra
  • Ssw
  • TC38A
  • Tricore
Data Structures | Macros | Functions | Variables
Ifx_Ssw_CompilersDcc.h File Reference

Startup Software for DCC compiler options. More...

Go to the source code of this file.

Data Structures

union Ifx_Ssw_CTablePtr

Macros

#define | IFX_SSW_CORE_LINKER_SYMBOLS(cpu)
#define | __USTACK(cpu) __USTACK##cpu
#define | __ISTACK(cpu) __ISTACK##cpu
#define | __INTTAB_CPU(cpu) __INTTAB_CPU##cpu
#define | __TRAPTAB_CPU(cpu) __TRAPTAB_CPU##cpu
#define | __CSA(cpu) __CSA##cpu
#define | __CSA_END(cpu) __CSA##cpu##_END
#define | __START(cpu) __START##cpu
#define | IFX_SSW_COMMON_LINKER_SYMBOLS()
#define | __INTTAB(cpu) __INTTAB_CPU##cpu
#define | __TRAPTAB(cpu) __TRAPTAB_CPU##cpu
#define | __SDATA1(cpu) _SMALL_DATA_
#define | __SDATA2(cpu) _LITERAL_DATA_
#define | __SDATA3(cpu) __A8_MEM
#define | __SDATA4(cpu) __A9_MEM
#define | IFX_SSW_INLINE __inline__
#define | IFX_SSW_NULL_PTR ((void *)0x0U)
#define | Ifx_Ssw___setAddressReg(aReg, val)
#define | Ifx_Ssw_setAddressReg(regNum, val) Ifx_Ssw___setAddressReg(regNum, val)

Functions

void | Ifx_Ssw_MTCR (const unsigned int, unsigned int) __attribute__((intrinsic_function(0x102
int | Ifx_Ssw_MFCR (const unsigned int) __attribute__((intrinsic_function(0x101
void | Ifx_Ssw_NOP (void) __attribute__((intrinsic_function(0x103
void | Ifx_Ssw_DSYNC (void) __attribute__((intrinsic_function(0x103
void | Ifx_Ssw_ISYNC (void) __attribute__((intrinsic_function(0x103
unsigned int | Ifx_Ssw_MINU (unsigned int, unsigned int) __attribute__((intrinsic_pseudo(3
int | Ifx_Ssw_CLZ (int) __attribute__((intrinsic_pseudo(1
asm volatile void | Ifx_Ssw_moveToDataParam0 (unsigned int var)
asm volatile unsigned int | Ifx_Ssw_getDataParam0 (void)
asm volatile void | Ifx_Ssw_jumpToFunction (void *fun)
asm volatile void | Ifx_Ssw_jumpToFunctionWithLink (void *fun)
asm void | Ifx_Ssw_jumpBackToLink (void)
IFX_SSW_INLINE void | Ifx_Ssw_C_InitInline (void)

Variables

void | mtcr
int | mfcr
void | nop
void | dsync
void | isync
unsigned int min | u
int | clz

Detailed Description

Startup Software for DCC compiler options.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_Ssw_CompilersDcc.h.

Data Structure Documentation

◆ Ifx_Ssw_CTablePtr

union Ifx_Ssw_CTablePtr

Definition at line 121 of file Ifx_Ssw_CompilersDcc.h.

Data Fields
unsigned int * | ucPtr
unsigned char * | ucPtr
unsigned int * | uiPtr
unsigned long long * | ullPtr
unsigned int * | usPtr
unsigned short * | usPtr

Macro Definition Documentation

◆ __CSA

#define __CSA ( cpu ) __CSA##cpu

Definition at line 78 of file Ifx_Ssw_CompilersDcc.h.

◆ __CSA_END

#define __CSA_END ( cpu ) __CSA##cpu##_END

Definition at line 79 of file Ifx_Ssw_CompilersDcc.h.

◆ __INTTAB

#define __INTTAB ( cpu ) __INTTAB_CPU##cpu

Definition at line 102 of file Ifx_Ssw_CompilersDcc.h.

◆ __INTTAB_CPU

#define __INTTAB_CPU ( cpu ) __INTTAB_CPU##cpu

Definition at line 76 of file Ifx_Ssw_CompilersDcc.h.

◆ __ISTACK

#define __ISTACK ( cpu ) __ISTACK##cpu

Definition at line 75 of file Ifx_Ssw_CompilersDcc.h.

◆ __SDATA1

#define __SDATA1 ( cpu ) _SMALL_DATA_

Definition at line 107 of file Ifx_Ssw_CompilersDcc.h.

◆ __SDATA2

#define __SDATA2 ( cpu ) _LITERAL_DATA_

Definition at line 108 of file Ifx_Ssw_CompilersDcc.h.

◆ __SDATA3

#define __SDATA3 ( cpu ) __A8_MEM

Definition at line 109 of file Ifx_Ssw_CompilersDcc.h.

◆ __SDATA4

#define __SDATA4 ( cpu ) __A9_MEM

Definition at line 110 of file Ifx_Ssw_CompilersDcc.h.

◆ __START

#define __START ( cpu ) __START##cpu

Definition at line 80 of file Ifx_Ssw_CompilersDcc.h.

Referenced by __Core1_start(), and __Core2_start().

◆ __TRAPTAB

#define __TRAPTAB ( cpu ) __TRAPTAB_CPU##cpu

Definition at line 105 of file Ifx_Ssw_CompilersDcc.h.

◆ __TRAPTAB_CPU

#define __TRAPTAB_CPU ( cpu ) __TRAPTAB_CPU##cpu

Definition at line 77 of file Ifx_Ssw_CompilersDcc.h.

◆ __USTACK

#define __USTACK ( cpu ) __USTACK##cpu

Definition at line 74 of file Ifx_Ssw_CompilersDcc.h.

◆ Ifx_Ssw___setAddressReg

#define Ifx_Ssw___setAddressReg | ( | aReg,
 |  | val
 | ) |
Value:
{__asm("#$$bp"); \
__asm(" movh.a\t %a15,"#val "@ha\n"); \
__asm(" lea\t %a15,[%a15]"#val "@l\n"); \
__asm(" mov.aa %"#aReg ", %a15\n"); \
__asm("#$$noadjust"); \
__asm("#$$ep"); }

Definition at line 147 of file Ifx_Ssw_CompilersDcc.h.

◆ IFX_SSW_COMMON_LINKER_SYMBOLS

#define IFX_SSW_COMMON_LINKER_SYMBOLS ( )
Value:
__asm("\t .weak __A8_MEM, __A9_MEM"); /**< ASM extern definitions */ \
extern unsigned int __START0[]; /**< Pointer to the startup code */ \
extern unsigned int __START1[]; /**< Pointer to the startup code */ \
extern unsigned int __START2[]; /**< Pointer to the startup code */ \
extern unsigned int __START3[]; /**< Pointer to the startup code */ \
extern unsigned int __START4[]; /**< Pointer to the startup code */ \
extern unsigned int __START5[];

Pointer to the startup code

Definition at line 82 of file Ifx_Ssw_CompilersDcc.h.

◆ IFX_SSW_CORE_LINKER_SYMBOLS

#define IFX_SSW_CORE_LINKER_SYMBOLS ( cpu )
Value:
extern unsigned int __USTACK##cpu[]; /**< user stack end */ \
extern unsigned int __ISTACK##cpu[]; /**< interrupt stack end */ \
extern unsigned int __INTTAB_CPU##cpu[]; /**< interrupt vector table */ \
extern unsigned int __TRAPTAB_CPU##cpu[]; /**< trap vector table */ \
extern unsigned int __CSA##cpu[]; /**< context save area begin */ \
extern unsigned int __CSA##cpu##_END[];
__INTTAB_CPU
#define __INTTAB_CPU(cpu)
Definition: Ifx_Ssw_CompilersDcc.h:76
__USTACK
#define __USTACK(cpu)
Definition: Ifx_Ssw_CompilersDcc.h:74
__TRAPTAB_CPU
#define __TRAPTAB_CPU(cpu)
Definition: Ifx_Ssw_CompilersDcc.h:77
__CSA
#define __CSA(cpu)
Definition: Ifx_Ssw_CompilersDcc.h:78
__ISTACK
#define __ISTACK(cpu)
Definition: Ifx_Ssw_CompilersDcc.h:75

context save area end

Definition at line 60 of file Ifx_Ssw_CompilersDcc.h.

◆ IFX_SSW_INLINE

#define IFX_SSW_INLINE __inline__

Definition at line 114 of file Ifx_Ssw_CompilersDcc.h.

◆ IFX_SSW_NULL_PTR

#define IFX_SSW_NULL_PTR ((void *)0x0U)

Definition at line 116 of file Ifx_Ssw_CompilersDcc.h.

◆ Ifx_Ssw_setAddressReg

#define Ifx_Ssw_setAddressReg | ( | regNum,
 |  | val
 | ) | Ifx_Ssw___setAddressReg(regNum, val)

Definition at line 155 of file Ifx_Ssw_CompilersDcc.h.

Referenced by __Core1_start(), __Core2_start(), and __Core3_start().

Function Documentation

◆ Ifx_Ssw_C_InitInline()

IFX_SSW_INLINE void Ifx_Ssw_C_InitInline ( void )

Definition at line 188 of file Ifx_Ssw_CompilersDcc.h.

Referenced by Ifx_Ssw_C_Init().

◆ Ifx_Ssw_CLZ()

int Ifx_Ssw_CLZ ( int )

Referenced by Ifx_Ssw_isApplicationReset().

◆ Ifx_Ssw_DSYNC()

void Ifx_Ssw_DSYNC ( void )

Referenced by __Core1_start(), __Core2_start(), __Core3_start(), and Ifx_Ssw_initCSA().

◆ Ifx_Ssw_getDataParam0()

asm volatile unsigned int Ifx_Ssw_getDataParam0 ( void )

Definition at line 164 of file Ifx_Ssw_CompilersDcc.h.

◆ Ifx_Ssw_ISYNC()

void Ifx_Ssw_ISYNC ( void )

Referenced by __Core1_start(), __Core2_start(), and __Core3_start().

◆ Ifx_Ssw_jumpBackToLink()

asm void Ifx_Ssw_jumpBackToLink ( void )

Definition at line 182 of file Ifx_Ssw_CompilersDcc.h.

◆ Ifx_Ssw_jumpToFunction()

asm volatile void Ifx_Ssw_jumpToFunction ( void * fun )

Definition at line 170 of file Ifx_Ssw_CompilersDcc.h.

Referenced by __Core1_start(), __Core2_start(), __Core3_start(), _START(), _START1(), _START2(), and _START3().

◆ Ifx_Ssw_jumpToFunctionWithLink()

asm volatile void Ifx_Ssw_jumpToFunctionWithLink ( void * fun )

Definition at line 176 of file Ifx_Ssw_CompilersDcc.h.

◆ Ifx_Ssw_MFCR()

int Ifx_Ssw_MFCR ( const unsigned int )

Referenced by Ifx_Ssw_disableCpuWatchdog(), and Ifx_Ssw_enableCpuWatchdog().

◆ Ifx_Ssw_MINU()

unsigned int Ifx_Ssw_MINU | ( | unsigned int | ,
 |  | unsigned int |
 | ) |  |

Referenced by Ifx_Ssw_disableCpuWatchdog(), and Ifx_Ssw_enableCpuWatchdog().

◆ Ifx_Ssw_moveToDataParam0()

asm volatile void Ifx_Ssw_moveToDataParam0 ( unsigned int var )

Definition at line 157 of file Ifx_Ssw_CompilersDcc.h.

◆ Ifx_Ssw_MTCR()

void Ifx_Ssw_MTCR | ( | const unsigned | int,
 |  | unsigned | int
 | ) |  |

Referenced by __Core1_start(), __Core2_start(), __Core3_start(), and Ifx_Ssw_initCSA().

◆ Ifx_Ssw_NOP()

void Ifx_Ssw_NOP ( void )

Variable Documentation

◆ clz

int clz

Definition at line 145 of file Ifx_Ssw_CompilersDcc.h.

◆ dsync

void dsync

Definition at line 139 of file Ifx_Ssw_CompilersDcc.h.

◆ isync

void isync

Definition at line 141 of file Ifx_Ssw_CompilersDcc.h.

◆ mfcr

int mfcr

Definition at line 135 of file Ifx_Ssw_CompilersDcc.h.

◆ mtcr

void mtcr

Definition at line 133 of file Ifx_Ssw_CompilersDcc.h.

◆ nop

void nop

Definition at line 137 of file Ifx_Ssw_CompilersDcc.h.

◆ u

unsigned int min u

Definition at line 143 of file Ifx_Ssw_CompilersDcc.h.


iLLD_TC38A: Ifx_Ssw_CompilersGhs.h File Reference

  • Infra
  • Ssw
  • TC38A
  • Tricore
Data Structures | Macros | Typedefs | Functions
Ifx_Ssw_CompilersGhs.h File Reference

Startup Software for GHS compiler options. More...

#include <intrinsics.h>
Include dependency graph for Ifx_Ssw_CompilersGhs.h:

Go to the source code of this file.

Data Structures

union Ifx_Ssw_CTablePtr

Macros

#define | IFX_SSW_COMMON_LINKER_SYMBOLS()
#define | IFX_SSW_CORE_LINKER_SYMBOLS(cpu)
#define | __USTACK(cpu) __USTACK##cpu
#define | __ISTACK(cpu) __ISTACK##cpu
#define | __INTTAB_CPU(cpu) __INTTAB_CPU##cpu
#define | __TRAPTAB_CPU(cpu) __TRAPTAB_CPU##cpu
#define | __CSA(cpu) __CSA##cpu
#define | __CSA_END(cpu) __CSA##cpu##_END
#define | __START(cpu) __START##cpu
#define | __INTTAB(cpu) __INTTAB_CPU##cpu
#define | __TRAPTAB(cpu) __TRAPTAB_CPU##cpu
#define | __SDATA1(cpu) __A0_MEM
#define | __SDATA2(cpu) __A1_MEM
#define | __SDATA3(cpu) __A8_MEM
#define | __SDATA4(cpu) __A9_MEM
#define | IFX_SSW_INLINE static inline __attribute__ ((always_inline))
#define | IFX_SSW_NULL_PTR ((void *)0x0U)
#define | Ifx_Ssw_MTCR(reg, val) __mtcr(reg, val);
#define | Ifx_Ssw_MFCR(reg) __mfcr(reg);
#define | Ifx_Ssw_CLZ(a) __CLZ32(a)
#define | Ifx_Ssw___setAddressReg(aReg, val) {__asm__ volatile ("movh.a\t "#aReg ", %hi("#val ")\n\tlea\t "#aReg ",["#aReg "]%lo("#val ")"); }
#define | Ifx_Ssw_setAddressReg(regNum, val) Ifx_Ssw___setAddressReg(regNum, val)
#define | size_t syze_t
#define | PICBASE 0
#define | PIDBASE 0
#define | PIRBASE 0
#define | CONST_FUNCP *const

Typedefs

typedef int | ptrdiff_t
typedef unsigned int | syze_t
typedef signed int | signed_size_t
typedef const char | rodata_ptr[]

Functions

IFX_SSW_INLINE void | Ifx_Ssw_NOP (void)
IFX_SSW_INLINE void | Ifx_Ssw_DSYNC (void)
IFX_SSW_INLINE void | Ifx_Ssw_ISYNC (void)
IFX_SSW_INLINE unsigned int | Ifx_Ssw_MINU (unsigned int a, unsigned int b)
IFX_SSW_INLINE void | Ifx_Ssw_moveToDataParam0 (unsigned int var)
IFX_SSW_INLINE unsigned int | Ifx_Ssw_getDataParam0 (void)
IFX_SSW_INLINE void | Ifx_Ssw_jumpToFunction (void(*fun)(void))
IFX_SSW_INLINE void | Ifx_Ssw_jumpToFunctionWithLink (void *fun)
IFX_SSW_INLINE void | Ifx_Ssw_jumpBackToLink (void)
void * | memcpy (void *s1, const void *s2, syze_t n)
void * | memset (void *s, int c, syze_t n)
IFX_SSW_INLINE void | Ifx_Ssw_C_InitInline (void)

Detailed Description

Startup Software for GHS compiler options.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_Ssw_CompilersGhs.h.

Data Structure Documentation

◆ Ifx_Ssw_CTablePtr

union Ifx_Ssw_CTablePtr

Definition at line 121 of file Ifx_Ssw_CompilersDcc.h.

Data Fields
unsigned int * | ucPtr
unsigned char * | ucPtr
unsigned int * | uiPtr
unsigned long long * | ullPtr
unsigned int * | usPtr
unsigned short * | usPtr

Macro Definition Documentation

◆ __CSA

#define __CSA ( cpu ) __CSA##cpu

Definition at line 99 of file Ifx_Ssw_CompilersGhs.h.

◆ __CSA_END

#define __CSA_END ( cpu ) __CSA##cpu##_END

Definition at line 100 of file Ifx_Ssw_CompilersGhs.h.

◆ __INTTAB

#define __INTTAB ( cpu ) __INTTAB_CPU##cpu

Definition at line 107 of file Ifx_Ssw_CompilersGhs.h.

◆ __INTTAB_CPU

#define __INTTAB_CPU ( cpu ) __INTTAB_CPU##cpu

Definition at line 97 of file Ifx_Ssw_CompilersGhs.h.

◆ __ISTACK

#define __ISTACK ( cpu ) __ISTACK##cpu

Definition at line 96 of file Ifx_Ssw_CompilersGhs.h.

◆ __SDATA1

#define __SDATA1 ( cpu ) __A0_MEM

Definition at line 112 of file Ifx_Ssw_CompilersGhs.h.

◆ __SDATA2

#define __SDATA2 ( cpu ) __A1_MEM

Definition at line 113 of file Ifx_Ssw_CompilersGhs.h.

◆ __SDATA3

#define __SDATA3 ( cpu ) __A8_MEM

Definition at line 114 of file Ifx_Ssw_CompilersGhs.h.

◆ __SDATA4

#define __SDATA4 ( cpu ) __A9_MEM

Definition at line 115 of file Ifx_Ssw_CompilersGhs.h.

◆ __START

#define __START ( cpu ) __START##cpu

Definition at line 101 of file Ifx_Ssw_CompilersGhs.h.

◆ __TRAPTAB

#define __TRAPTAB ( cpu ) __TRAPTAB_CPU##cpu

Definition at line 110 of file Ifx_Ssw_CompilersGhs.h.

◆ __TRAPTAB_CPU

#define __TRAPTAB_CPU ( cpu ) __TRAPTAB_CPU##cpu

Definition at line 98 of file Ifx_Ssw_CompilersGhs.h.

◆ __USTACK

#define __USTACK ( cpu ) __USTACK##cpu

Definition at line 95 of file Ifx_Ssw_CompilersGhs.h.

◆ CONST_FUNCP

#define CONST_FUNCP *const

Definition at line 219 of file Ifx_Ssw_CompilersGhs.h.

◆ Ifx_Ssw___setAddressReg

#define Ifx_Ssw___setAddressReg | ( | aReg,
 |  | val
 | ) | {__asm__ volatile ("movh.a\t "#aReg ", %hi("#val ")\n\tlea\t "#aReg ",["#aReg "]%lo("#val ")"); }

Definition at line 168 of file Ifx_Ssw_CompilersGhs.h.

◆ Ifx_Ssw_CLZ

#define Ifx_Ssw_CLZ ( a ) __CLZ32(a)

Definition at line 166 of file Ifx_Ssw_CompilersGhs.h.

◆ IFX_SSW_COMMON_LINKER_SYMBOLS

#define IFX_SSW_COMMON_LINKER_SYMBOLS ( )
Value:
__asm__("\t .extern _SMALL_DATA_, _LITERAL_DATA_, _SMALL_DATA_A8_, _SMALL_DATA_A9_"); \
extern unsigned int __START0[]; /**< Pointer to the startup code */ \
extern unsigned int __START1[]; /**< Pointer to the startup code */ \
extern unsigned int __START2[]; /**< Pointer to the startup code */ \
extern unsigned int __START3[]; /**< Pointer to the startup code */ \
extern unsigned int __START4[]; /**< Pointer to the startup code */ \
extern unsigned int __START5[]
__asm__
#define __asm__
Definition: Ifx_TypesTasking.h:45

Pointer to the startup code

Definition at line 60 of file Ifx_Ssw_CompilersGhs.h.

◆ IFX_SSW_CORE_LINKER_SYMBOLS

#define IFX_SSW_CORE_LINKER_SYMBOLS ( cpu )
Value:
extern unsigned int __USTACK##cpu[]; /**< user stack end */ \
extern unsigned int __ISTACK##cpu[]; /**< interrupt stack end */ \
extern unsigned int __INTTAB_CPU##cpu[]; /**< Interrupt vector table */ \
extern unsigned int __TRAPTAB_CPU##cpu[]; /**< trap table */ \
extern unsigned int __CSA##cpu[]; /**< context save area 1 begin */ \
extern unsigned int __CSA##cpu##_END[]
__INTTAB_CPU
#define __INTTAB_CPU(cpu)
Definition: Ifx_Ssw_CompilersGhs.h:97
__USTACK
#define __USTACK(cpu)
Definition: Ifx_Ssw_CompilersGhs.h:95
__TRAPTAB_CPU
#define __TRAPTAB_CPU(cpu)
Definition: Ifx_Ssw_CompilersGhs.h:98
__ISTACK
#define __ISTACK(cpu)
Definition: Ifx_Ssw_CompilersGhs.h:96
__CSA
#define __CSA(cpu)
Definition: Ifx_Ssw_CompilersGhs.h:99

context save area 1 begin

Definition at line 81 of file Ifx_Ssw_CompilersGhs.h.

◆ IFX_SSW_INLINE

#define IFX_SSW_INLINE static inline __attribute__ ((always_inline))

Definition at line 119 of file Ifx_Ssw_CompilersGhs.h.

◆ Ifx_Ssw_MFCR

#define Ifx_Ssw_MFCR ( reg ) __mfcr(reg);

Definition at line 140 of file Ifx_Ssw_CompilersGhs.h.

◆ Ifx_Ssw_MTCR

#define Ifx_Ssw_MTCR | ( | reg,
 |  | val
 | ) | __mtcr(reg, val);

Definition at line 138 of file Ifx_Ssw_CompilersGhs.h.

◆ IFX_SSW_NULL_PTR

#define IFX_SSW_NULL_PTR ((void *)0x0U)

Definition at line 121 of file Ifx_Ssw_CompilersGhs.h.

◆ Ifx_Ssw_setAddressReg

#define Ifx_Ssw_setAddressReg | ( | regNum,
 |  | val
 | ) | Ifx_Ssw___setAddressReg(regNum, val)

Definition at line 171 of file Ifx_Ssw_CompilersGhs.h.

◆ PICBASE

#define PICBASE 0

Definition at line 215 of file Ifx_Ssw_CompilersGhs.h.

◆ PIDBASE

#define PIDBASE 0

Definition at line 216 of file Ifx_Ssw_CompilersGhs.h.

◆ PIRBASE

#define PIRBASE 0

Definition at line 217 of file Ifx_Ssw_CompilersGhs.h.

◆ size_t

#define size_t syze_t

Definition at line 208 of file Ifx_Ssw_CompilersGhs.h.

Typedef Documentation

◆ ptrdiff_t

typedef int ptrdiff_t

Definition at line 205 of file Ifx_Ssw_CompilersGhs.h.

◆ rodata_ptr

typedef const char rodata_ptr[]

Definition at line 214 of file Ifx_Ssw_CompilersGhs.h.

◆ signed_size_t

typedef signed int signed_size_t

Definition at line 207 of file Ifx_Ssw_CompilersGhs.h.

◆ syze_t

typedef unsigned int syze_t

Definition at line 206 of file Ifx_Ssw_CompilersGhs.h.

Function Documentation

◆ Ifx_Ssw_C_InitInline()

IFX_SSW_INLINE void Ifx_Ssw_C_InitInline ( void )

Definition at line 221 of file Ifx_Ssw_CompilersGhs.h.

◆ Ifx_Ssw_DSYNC()

IFX_SSW_INLINE void Ifx_Ssw_DSYNC ( void )

Definition at line 148 of file Ifx_Ssw_CompilersGhs.h.

◆ Ifx_Ssw_getDataParam0()

IFX_SSW_INLINE unsigned int Ifx_Ssw_getDataParam0 ( void )

Definition at line 179 of file Ifx_Ssw_CompilersGhs.h.

◆ Ifx_Ssw_ISYNC()

IFX_SSW_INLINE void Ifx_Ssw_ISYNC ( void )

Definition at line 154 of file Ifx_Ssw_CompilersGhs.h.

◆ Ifx_Ssw_jumpBackToLink()

IFX_SSW_INLINE void Ifx_Ssw_jumpBackToLink ( void )

Definition at line 199 of file Ifx_Ssw_CompilersGhs.h.

◆ Ifx_Ssw_jumpToFunction()

IFX_SSW_INLINE void Ifx_Ssw_jumpToFunction ( void(*)(void) fun )

Definition at line 187 of file Ifx_Ssw_CompilersGhs.h.

◆ Ifx_Ssw_jumpToFunctionWithLink()

IFX_SSW_INLINE void Ifx_Ssw_jumpToFunctionWithLink ( void * fun )

Definition at line 193 of file Ifx_Ssw_CompilersGhs.h.

◆ Ifx_Ssw_MINU()

IFX_SSW_INLINE unsigned int Ifx_Ssw_MINU | ( | unsigned int | a,
 |  | unsigned int | b
 | ) |  |

Definition at line 160 of file Ifx_Ssw_CompilersGhs.h.

◆ Ifx_Ssw_moveToDataParam0()

IFX_SSW_INLINE void Ifx_Ssw_moveToDataParam0 ( unsigned int var )

Definition at line 173 of file Ifx_Ssw_CompilersGhs.h.

◆ Ifx_Ssw_NOP()

IFX_SSW_INLINE void Ifx_Ssw_NOP ( void )

Definition at line 142 of file Ifx_Ssw_CompilersGhs.h.

◆ memcpy()

void* memcpy | ( | void * | s1,
 |  | const void * | s2,
 |  | syze_t | n
 | ) |  |

◆ memset()

void* memset | ( | void * | s,
 |  | int | c,
 |  | syze_t | n
 | ) |  |

Referenced by Ifx_AngleTrkF32_stdIfPosInit(), Ifx_Shell_init(), Ifx_Ssw_C_InitInline(), IfxAsclin_Asc_stdIfDPipeInit(), IfxCcu6_PwmHl_stdIfPwmHlInit(), IfxCcu6_TimerWithTrigger_stdIfTimerInit(), IfxGpt12_IncrEnc_stdIfPosInit(), IfxGtm_Atom_Dtm_PwmHl_stdIfPwmHlInit(), IfxGtm_Atom_PwmHl_stdIfPwmHlInit(), IfxGtm_Atom_Timer_stdIfTimerInit(), IfxGtm_Tim_In_initConfig(), IfxGtm_Tom_Dtm_PwmHl_stdIfPwmHlInit(), IfxGtm_Tom_PwmHl_stdIfPwmHlInit(), and IfxGtm_Tom_Timer_stdIfTimerInit().


iLLD_TC38A: Ifx_Ssw_CompilersTasking.h File Reference

  • Infra
  • Ssw
  • TC38A
  • Tricore
Macros | Functions
Ifx_Ssw_CompilersTasking.h File Reference

Startup Software for Tasking compiler options. More...

Go to the source code of this file.

Macros

#define | IFX_SSW_COMMON_LINKER_SYMBOLS()
#define | IFX_SSW_CORE_LINKER_SYMBOLS(cpu)
#define | __USTACK(cpu) __USTACK##cpu
#define | __ISTACK(cpu) __ISTACK##cpu
#define | __INTTAB_CPU(cpu) __INTTAB_CPU##cpu
#define | __TRAPTAB_CPU(cpu) __TRAPTAB_CPU##cpu
#define | __CSA(cpu) __CSA##cpu
#define | __CSA_END(cpu) __CSA##cpu##_END
#define | __START(cpu) __START##cpu
#define | __INTTAB(cpu) __INTTAB_CPU##cpu
#define | __TRAPTAB(cpu) __TRAPTAB_CPU##cpu
#define | __SDATA1(cpu) _SMALL_DATA_
#define | __SDATA2(cpu) _LITERAL_DATA_
#define | __SDATA3(cpu) _A8_DATA_
#define | __SDATA4(cpu) _A9_DATA_
#define | IFX_SSW_INLINE inline
#define | IFX_SSW_NULL_PTR ((void *)0x0U)
#define | Ifx_Ssw_MTCR(reg, val) __mtcr(reg, val);
#define | Ifx_Ssw_MFCR(reg) __mfcr(reg);
#define | Ifx_Ssw_CLZ(a) __clz(a)
#define | Ifx_Ssw___setAddressReg(aReg, val) {__asm(" movh.a\t "#aReg ",#@his("#val ")\n lea\t "#aReg ",["#aReg "]@los("#val ")"); }
#define | Ifx_Ssw_setAddressReg(regNum, val) Ifx_Ssw___setAddressReg(regNum, val)

Functions

IFX_SSW_INLINE void | Ifx_Ssw_NOP (void)
IFX_SSW_INLINE void | Ifx_Ssw_DSYNC (void)
IFX_SSW_INLINE void | Ifx_Ssw_ISYNC (void)
IFX_SSW_INLINE unsigned int | Ifx_Ssw_MINU (unsigned int a, unsigned int b)
IFX_SSW_INLINE void | Ifx_Ssw_moveToDataParam0 (unsigned int var)
IFX_SSW_INLINE unsigned int | Ifx_Ssw_getDataParam0 (void)
IFX_SSW_INLINE void | Ifx_Ssw_jumpToFunction (void *fun)
IFX_SSW_INLINE void | Ifx_Ssw_jumpToFunctionWithLink (void *fun)
IFX_SSW_INLINE void | Ifx_Ssw_jumpBackToLink (void)
IFX_SSW_INLINE void | Ifx_Ssw_C_InitInline (void)

Detailed Description

Startup Software for Tasking compiler options.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_Ssw_CompilersTasking.h.

Macro Definition Documentation

◆ __CSA

#define __CSA ( cpu ) __CSA##cpu

Definition at line 96 of file Ifx_Ssw_CompilersTasking.h.

◆ __CSA_END

#define __CSA_END ( cpu ) __CSA##cpu##_END

Definition at line 97 of file Ifx_Ssw_CompilersTasking.h.

◆ __INTTAB

#define __INTTAB ( cpu ) __INTTAB_CPU##cpu

Definition at line 104 of file Ifx_Ssw_CompilersTasking.h.

◆ __INTTAB_CPU

#define __INTTAB_CPU ( cpu ) __INTTAB_CPU##cpu

Definition at line 94 of file Ifx_Ssw_CompilersTasking.h.

◆ __ISTACK

#define __ISTACK ( cpu ) __ISTACK##cpu

Definition at line 93 of file Ifx_Ssw_CompilersTasking.h.

◆ __SDATA1

#define __SDATA1 ( cpu ) _SMALL_DATA_

Definition at line 109 of file Ifx_Ssw_CompilersTasking.h.

◆ __SDATA2

#define __SDATA2 ( cpu ) _LITERAL_DATA_

Definition at line 110 of file Ifx_Ssw_CompilersTasking.h.

◆ __SDATA3

#define __SDATA3 ( cpu ) _A8_DATA_

Definition at line 111 of file Ifx_Ssw_CompilersTasking.h.

◆ __SDATA4

#define __SDATA4 ( cpu ) _A9_DATA_

Definition at line 112 of file Ifx_Ssw_CompilersTasking.h.

◆ __START

#define __START ( cpu ) __START##cpu

Definition at line 98 of file Ifx_Ssw_CompilersTasking.h.

◆ __TRAPTAB

#define __TRAPTAB ( cpu ) __TRAPTAB_CPU##cpu

Definition at line 107 of file Ifx_Ssw_CompilersTasking.h.

◆ __TRAPTAB_CPU

#define __TRAPTAB_CPU ( cpu ) __TRAPTAB_CPU##cpu

Definition at line 95 of file Ifx_Ssw_CompilersTasking.h.

◆ __USTACK

#define __USTACK ( cpu ) __USTACK##cpu

Definition at line 92 of file Ifx_Ssw_CompilersTasking.h.

◆ Ifx_Ssw___setAddressReg

#define Ifx_Ssw___setAddressReg | ( | aReg,
 |  | val
 | ) | {__asm(" movh.a\t "#aReg ",#@his("#val ")\n lea\t "#aReg ",["#aReg "]@los("#val ")"); }

Definition at line 158 of file Ifx_Ssw_CompilersTasking.h.

◆ Ifx_Ssw_CLZ

#define Ifx_Ssw_CLZ ( a ) __clz(a)

Definition at line 156 of file Ifx_Ssw_CompilersTasking.h.

◆ IFX_SSW_COMMON_LINKER_SYMBOLS

#define IFX_SSW_COMMON_LINKER_SYMBOLS ( )
Value:
__asm("\t .extern _SMALL_DATA_, _LITERAL_DATA_, _A8_DATA_, _A9_DATA_"); \
extern unsigned int __START0[]; /**< Pointer to the startup code */ \
extern unsigned int __START1[]; /**< Pointer to the startup code */ \
extern unsigned int __START2[]; /**< Pointer to the startup code */ \
extern unsigned int __START3[]; /**< Pointer to the startup code */ \
extern unsigned int __START4[]; /**< Pointer to the startup code */ \
extern unsigned int __START5[];

Pointer to the startup code

Definition at line 57 of file Ifx_Ssw_CompilersTasking.h.

◆ IFX_SSW_CORE_LINKER_SYMBOLS

#define IFX_SSW_CORE_LINKER_SYMBOLS ( cpu )
Value:
__asm("\t .extern __USTACK"#cpu); /**< user stack end is required as asm to be used with setreg macro */ \
extern unsigned int __ISTACK##cpu[]; /**< interrupt stack end */ \
extern unsigned int __INTTAB_CPU##cpu[]; /**< interrupt vector table */ \
extern unsigned int __TRAPTAB_CPU##cpu[]; /**< trap vector table */ \
extern unsigned int __CSA##cpu[]; /**< context save area begin */ \
extern unsigned int __CSA##cpu##_END[];
__CSA
#define __CSA(cpu)
Definition: Ifx_Ssw_CompilersTasking.h:96
__INTTAB_CPU
#define __INTTAB_CPU(cpu)
Definition: Ifx_Ssw_CompilersTasking.h:94
__ISTACK
#define __ISTACK(cpu)
Definition: Ifx_Ssw_CompilersTasking.h:93
__TRAPTAB_CPU
#define __TRAPTAB_CPU(cpu)
Definition: Ifx_Ssw_CompilersTasking.h:95

context save area end

Definition at line 78 of file Ifx_Ssw_CompilersTasking.h.

◆ IFX_SSW_INLINE

#define IFX_SSW_INLINE inline

Definition at line 119 of file Ifx_Ssw_CompilersTasking.h.

◆ Ifx_Ssw_MFCR

#define Ifx_Ssw_MFCR ( reg ) __mfcr(reg);

Definition at line 130 of file Ifx_Ssw_CompilersTasking.h.

◆ Ifx_Ssw_MTCR

#define Ifx_Ssw_MTCR | ( | reg,
 |  | val
 | ) | __mtcr(reg, val);

Definition at line 128 of file Ifx_Ssw_CompilersTasking.h.

◆ IFX_SSW_NULL_PTR

#define IFX_SSW_NULL_PTR ((void *)0x0U)

Definition at line 122 of file Ifx_Ssw_CompilersTasking.h.

◆ Ifx_Ssw_setAddressReg

#define Ifx_Ssw_setAddressReg | ( | regNum,
 |  | val
 | ) | Ifx_Ssw___setAddressReg(regNum, val)

Definition at line 161 of file Ifx_Ssw_CompilersTasking.h.

Function Documentation

◆ Ifx_Ssw_C_InitInline()

IFX_SSW_INLINE void Ifx_Ssw_C_InitInline ( void )

Definition at line 195 of file Ifx_Ssw_CompilersTasking.h.

◆ Ifx_Ssw_DSYNC()

IFX_SSW_INLINE void Ifx_Ssw_DSYNC ( void )

Definition at line 138 of file Ifx_Ssw_CompilersTasking.h.

◆ Ifx_Ssw_getDataParam0()

IFX_SSW_INLINE unsigned int Ifx_Ssw_getDataParam0 ( void )

Definition at line 169 of file Ifx_Ssw_CompilersTasking.h.

◆ Ifx_Ssw_ISYNC()

IFX_SSW_INLINE void Ifx_Ssw_ISYNC ( void )

Definition at line 144 of file Ifx_Ssw_CompilersTasking.h.

◆ Ifx_Ssw_jumpBackToLink()

IFX_SSW_INLINE void Ifx_Ssw_jumpBackToLink ( void )

Definition at line 189 of file Ifx_Ssw_CompilersTasking.h.

◆ Ifx_Ssw_jumpToFunction()

IFX_SSW_INLINE void Ifx_Ssw_jumpToFunction ( void * fun )

Definition at line 177 of file Ifx_Ssw_CompilersTasking.h.

◆ Ifx_Ssw_jumpToFunctionWithLink()

IFX_SSW_INLINE void Ifx_Ssw_jumpToFunctionWithLink ( void * fun )

Definition at line 183 of file Ifx_Ssw_CompilersTasking.h.

◆ Ifx_Ssw_MINU()

IFX_SSW_INLINE unsigned int Ifx_Ssw_MINU | ( | unsigned int | a,
 |  | unsigned int | b
 | ) |  |

Definition at line 150 of file Ifx_Ssw_CompilersTasking.h.

◆ Ifx_Ssw_moveToDataParam0()

IFX_SSW_INLINE void Ifx_Ssw_moveToDataParam0 ( unsigned int var )

Definition at line 163 of file Ifx_Ssw_CompilersTasking.h.

◆ Ifx_Ssw_NOP()

IFX_SSW_INLINE void Ifx_Ssw_NOP ( void )

Definition at line 132 of file Ifx_Ssw_CompilersTasking.h.


iLLD_TC38A: Ifx_Ssw_Infra.c File Reference

  • Infra
  • Ssw
  • TC38A
  • Tricore
Functions
Ifx_Ssw_Infra.c File Reference

Startup Software support functions. More...

#include "Ifx_Cfg.h"
#include "Ifx_Ssw_Infra.h"
Include dependency graph for Ifx_Ssw_Infra.c:

Go to the source code of this file.

Functions

unsigned short | Ifx_Ssw_getCpuWatchdogPassword (Ifx_SCU_WDTCPU *watchdog)
Fetch current password of CPU Watchdog module. More...
unsigned short | Ifx_Ssw_getSafetyWatchdogPassword (void)
Fetch current password of Safety Watchdog module. More...
void | Ifx_Ssw_clearCpuEndinit (Ifx_SCU_WDTCPU *watchdog, unsigned short password)
Clear ENDINIT bit provided by CPU WDT Hardware module. More...
void | Ifx_Ssw_setCpuEndinit (Ifx_SCU_WDTCPU *watchdog, unsigned short password)
Set ENDINIT bit provided by CPU WDT Hardware module. More...
void | Ifx_Ssw_clearSafetyEndinit (unsigned short password)
Clear ENDINIT bit provided by Safety WDT Hardware module. More...
void | Ifx_Ssw_setSafetyEndinit (unsigned short password)
Set ENDINIT bit provided by Safety WDT Hardware module. More...
void | Ifx_Ssw_serviceCpuWatchdog (Ifx_SCU_WDTCPU *watchdog, unsigned short password)
SCUWDT API to service CPU Watchdog functionality. More...
void | Ifx_Ssw_serviceSafetyWatchdog (unsigned short password)
SCUWDT API to service Safety Watchdog functionality. More...
void | Ifx_Ssw_disableCpuWatchdog (Ifx_SCU_WDTCPU *watchdog, unsigned short password)
Disable CPU Watchdog functionality. More...
void | Ifx_Ssw_enableCpuWatchdog (Ifx_SCU_WDTCPU *watchdog, unsigned short password)
SCUWDT API to enable CPU Watchdog functionality. More...
void | Ifx_Ssw_disableSafetyWatchdog (unsigned short password)
Disable Safety Watchdog functionality. More...
void | Ifx_Ssw_enableSafetyWatchdog (unsigned short password)
Enable Safety Watchdog functionality. More...
void | Ifx_Ssw_startCore (Ifx_CPU *cpu, unsigned int programCounter)
Set the program counter for the CPU specified and start the CPU. More...
void | Ifx_Ssw_setCpu0Idle (void)
Set CPU0 to idle state. More...
float | Ifx_Ssw_getStmFrequency (void)
Returns the system timer frequency. More...
void | Ifx_Ssw_C_Init (void)
Initialise the C runtime environment. More...

Detailed Description

Startup Software support functions.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_Ssw_Infra.c.

Function Documentation

◆ Ifx_Ssw_C_Init()

void Ifx_Ssw_C_Init ( void )

Initialise the C runtime environment.

Definition at line 198 of file Ifx_Ssw_Infra.c.

Referenced by __Core1_start(), __Core2_start(), and __Core3_start().

◆ Ifx_Ssw_clearCpuEndinit()

void Ifx_Ssw_clearCpuEndinit | ( | Ifx_SCU_WDTCPU * | watchdog,
 |  | unsigned short | password
 | ) |  |

Clear ENDINIT bit provided by CPU WDT Hardware module.

This API will disable ENDINIT functionality provided by CPU WDT Hardware module. User need to use this API call before modifying any ENDINIT protected register. User must always set the ENDINIT bit using other API Ifx_Ssw_setCpuEndinit. The sequence clear and set ENDINIT shall not be interrupted by another interrupt/call.

Parameters
watchdog | pointer to the watchdog register map of CPU WDT hardware instance
password | Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 60 of file Ifx_Ssw_Infra.c.

Referenced by Ifx_Ssw_disableCpuWatchdog(), Ifx_Ssw_enableCpuWatchdog(), and Ifx_Ssw_setCpu0Idle().

◆ Ifx_Ssw_clearSafetyEndinit()

void Ifx_Ssw_clearSafetyEndinit ( unsigned short password )

Clear ENDINIT bit provided by Safety WDT Hardware module.

This API will disable ENDINIT functionality provided by Safety WDT Hardware module. User need to use this API call before modifying any ENDINIT protected register. User must always set the ENDINIT bit using other API Ifx_Ssw_setCpuEndinit. The sequence clear and set ENDINIT shall not be interrupted by another interrupt/call.

Parameters
password Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 72 of file Ifx_Ssw_Infra.c.

Referenced by Ifx_Ssw_disableSafetyWatchdog(), and Ifx_Ssw_enableSafetyWatchdog().

◆ Ifx_Ssw_disableCpuWatchdog()

void Ifx_Ssw_disableCpuWatchdog | ( | Ifx_SCU_WDTCPU * | watchdog,
 |  | unsigned short | password
 | ) |  |

Disable CPU Watchdog functionality.

This API will disable Watchdog functionality of CPU WDT Hardware module. The Watchdog timers will stop counting after this API call.

Parameters
watchdog | pointer to the watchdog register map of CPU WDT hardware instance
password | Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 96 of file Ifx_Ssw_Infra.c.

◆ Ifx_Ssw_disableSafetyWatchdog()

void Ifx_Ssw_disableSafetyWatchdog ( unsigned short password )

Disable Safety Watchdog functionality.

This API will disable Watchdog functionality of Safety WDT Hardware module. The Watchdog timers will stop counting after this API call.

Parameters
password Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 126 of file Ifx_Ssw_Infra.c.

◆ Ifx_Ssw_enableCpuWatchdog()

void Ifx_Ssw_enableCpuWatchdog | ( | Ifx_SCU_WDTCPU * | watchdog,
 |  | unsigned short | password
 | ) |  |

SCUWDT API to enable CPU Watchdog functionality.

This API will enable Watchdog functionality of CPU WDT Hardware module. The Watchdog timers need to be serviced periodically after this API call.

Parameters
watchdog | pointer to the watchdog register map of CPU WDT hardware instance
password | Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 111 of file Ifx_Ssw_Infra.c.

◆ Ifx_Ssw_enableSafetyWatchdog()

void Ifx_Ssw_enableSafetyWatchdog ( unsigned short password )

Enable Safety Watchdog functionality.

This API will enable Watchdog functionality of Safety WDT Hardware module. The Watchdog timers need to be serviced periodically after this API call.

Parameters
password Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 134 of file Ifx_Ssw_Infra.c.

◆ Ifx_Ssw_getCpuWatchdogPassword()

unsigned short Ifx_Ssw_getCpuWatchdogPassword ( Ifx_SCU_WDTCPU * watchdog )

Fetch current password of CPU Watchdog module.

This API will fetch current Watchdog password for CPU WDT Hardware module. password is needed to be passed with most of the WDT APIs.

Parameters
watchdog pointer to the watchdog register map of CPU WDT hardware instance
Returns
password Existing (Application specific) password for the Watchdog module.

Definition at line 48 of file Ifx_Ssw_Infra.c.

Referenced by Ifx_Ssw_setCpu0Idle().

◆ Ifx_Ssw_getSafetyWatchdogPassword()

unsigned short Ifx_Ssw_getSafetyWatchdogPassword ( void )

Fetch current password of Safety Watchdog module.

This API will fetch current Watchdog password for Safety WDT Hardware module. password is needed to be passed with most of the WDT APIs.

Returns
password Existing (Application specific) password for the Watchdog module.

Definition at line 54 of file Ifx_Ssw_Infra.c.

◆ Ifx_Ssw_getStmFrequency()

float Ifx_Ssw_getStmFrequency ( void )

Returns the system timer frequency.

Returns
the system timer frequency in Hz.

Definition at line 170 of file Ifx_Ssw_Infra.c.

Referenced by __Core1_start(), __Core2_start(), and __Core3_start().

◆ Ifx_Ssw_serviceCpuWatchdog()

void Ifx_Ssw_serviceCpuWatchdog | ( | Ifx_SCU_WDTCPU * | watchdog,
 |  | unsigned short | password
 | ) |  |

SCUWDT API to service CPU Watchdog functionality.

This API will service Watchdog functionality corresponding to CPU WDT Hardware module. User need to use this API call periodically. This API results in reloading of the Watchdog Timer. User need to have the password stored locally in the caller function, (use Ifx_Ssw_getCpuWatchdogPassword).

Parameters
password | Existing (Application specific) password for the Watchdog module.
watchdog | pointer to the watchdog register map of CPU WDT hardware instance.
Returns
None

Definition at line 84 of file Ifx_Ssw_Infra.c.

◆ Ifx_Ssw_serviceSafetyWatchdog()

void Ifx_Ssw_serviceSafetyWatchdog ( unsigned short password )

SCUWDT API to service Safety Watchdog functionality.

This API will service Watchdog functionality corresponding to Safety WDT Hardware module. User need to use this API call periodically. This API results in reloading of the Watchdog Timer. User need to have the password stored locally in the caller function, (use Ifx_Ssw_getSafetyWatchdogPassword).

Parameters
password Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 90 of file Ifx_Ssw_Infra.c.

◆ Ifx_Ssw_setCpu0Idle()

void Ifx_Ssw_setCpu0Idle ( void )

Set CPU0 to idle state.

Definition at line 160 of file Ifx_Ssw_Infra.c.

◆ Ifx_Ssw_setCpuEndinit()

void Ifx_Ssw_setCpuEndinit | ( | Ifx_SCU_WDTCPU * | watchdog,
 |  | unsigned short | password
 | ) |  |

Set ENDINIT bit provided by CPU WDT Hardware module.

This API will enable ENDINIT functionality provided by CPU WDT Hardware module. User need to use this API call after modifying any ENDINIT protected register.

Parameters
watchdog | pointer to the watchdog register map of CPU WDT hardware instance
password | Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 66 of file Ifx_Ssw_Infra.c.

Referenced by Ifx_Ssw_disableCpuWatchdog(), Ifx_Ssw_enableCpuWatchdog(), and Ifx_Ssw_setCpu0Idle().

◆ Ifx_Ssw_setSafetyEndinit()

void Ifx_Ssw_setSafetyEndinit ( unsigned short password )

Set ENDINIT bit provided by Safety WDT Hardware module.

This API will enable ENDINIT functionality provided by Safety WDT Hardware module. User need to use this API call after modifying any ENDINIT protected register.

Parameters
password Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 78 of file Ifx_Ssw_Infra.c.

Referenced by Ifx_Ssw_disableSafetyWatchdog(), and Ifx_Ssw_enableSafetyWatchdog().

◆ Ifx_Ssw_startCore()

void Ifx_Ssw_startCore | ( | Ifx_CPU * | cpu,
 |  | unsigned int | programCounter
 | ) |  |

Set the program counter for the CPU specified and start the CPU.

Parameters
cpu | Pointer to the CPU HW module (register memory map)
programCounter | Program counter value to start the CPU

Definition at line 142 of file Ifx_Ssw_Infra.c.

Referenced by __Core1_start(), and __Core2_start().


iLLD_TC38A: Ifx_Ssw_Infra.h File Reference

  • Infra
  • Ssw
  • TC38A
  • Tricore
Macros | Functions
Ifx_Ssw_Infra.h File Reference

Startup Software support functions. More...

#include "Ifx_Ssw_Compilers.h"
#include "Ifx_Cfg_Ssw.h"
#include "IfxScu_reg.h"
#include "IfxCpu_reg.h"
#include "IfxScu_bf.h"
#include "IfxCpu_bf.h"
Include dependency graph for Ifx_Ssw_Infra.h:

Go to the source code of this file.

Macros

#define | IFX_SSW_POWERONRESET_MASK
PowerOn Reset Mask. More...
#define | IFX_SSW_APPLICATIONRESET_MASK
Application Reset Mask. More...
#define | IFX_SSW_COLD_POWERONRESET_MASK
Cold PowerOn Reset Mask. More...
#define | IFX_SSW_APPLICATIONRESET (2U)
Application reset enabled In SCU_RSTCON register, value 2 represents the Application reset. More...
#define | IFX_SSW_SEICON_REL_VAL_MSK (unsigned short)(0xFFFCU << IFX_SCU_SEICON0_REL_OFF)
Reload value mask. More...
#define | IFX_SSW_WDT_PASSWORD_INVERT_MSK (0x003FU)
Mask values is used to invert the password value bits. More...
#define | IFX_SSW_CSA_SIZE 16U
CSA size. More...
#define | IFX_CFG_SSW_STARTCPU_WAIT_TIME_IN_SECONDS (0.0001)
#define | IFX_CFG_SSW_EVR_OSC_FREQUENCY (100000000.0)
#define | IFX_CFG_SSW_SYSCLK_PIN_FREQUENCY (20000000.0)
#define | IFX_CFG_SSW_XTAL_FREQUENCY (IFX_CFG_SCU_XTAL_FREQUENCY)
#define | IFX_CFG_SSW_CLEAR_SAFETY_ENDINIT()
clear safety endinit.
Note: IFX_CFG_SSW_CLEAR_SAFETY_ENDINIT() function macro is added to avoid issues higher optimization is enabled. More...
#define | IFX_CFG_SSW_SET_SAFETY_ENDINIT()
set safety endinit.
Note: IFX_CFG_SSW_SET_SAFETY_ENDINIT() function macro is added to avoid issues higher optimization is enabled. More...

Functions

unsigned short | Ifx_Ssw_getCpuWatchdogPassword (Ifx_SCU_WDTCPU *watchdog)
Fetch current password of CPU Watchdog module. More...
unsigned short | Ifx_Ssw_getSafetyWatchdogPassword (void)
Fetch current password of Safety Watchdog module. More...
void | Ifx_Ssw_clearCpuEndinit (Ifx_SCU_WDTCPU *watchdog, unsigned short password)
Clear ENDINIT bit provided by CPU WDT Hardware module. More...
void | Ifx_Ssw_setCpuEndinit (Ifx_SCU_WDTCPU *watchdog, unsigned short password)
Set ENDINIT bit provided by CPU WDT Hardware module. More...
void | Ifx_Ssw_clearSafetyEndinit (unsigned short password)
Clear ENDINIT bit provided by Safety WDT Hardware module. More...
void | Ifx_Ssw_setSafetyEndinit (unsigned short password)
Set ENDINIT bit provided by Safety WDT Hardware module. More...
void | Ifx_Ssw_disableCpuWatchdog (Ifx_SCU_WDTCPU *watchdog, unsigned short password)
Disable CPU Watchdog functionality. More...
void | Ifx_Ssw_enableCpuWatchdog (Ifx_SCU_WDTCPU *watchdog, unsigned short password)
SCUWDT API to enable CPU Watchdog functionality. More...
void | Ifx_Ssw_disableSafetyWatchdog (unsigned short password)
Disable Safety Watchdog functionality. More...
void | Ifx_Ssw_enableSafetyWatchdog (unsigned short password)
Enable Safety Watchdog functionality. More...
void | Ifx_Ssw_startCore (Ifx_CPU *cpu, unsigned int programCounter)
Set the program counter for the CPU specified and start the CPU. More...
void | Ifx_Ssw_setCpu0Idle (void)
Set CPU0 to idle state. More...
void | Ifx_Ssw_C_Init (void)
Initialise the C runtime environment. More...
float | Ifx_Ssw_getStmFrequency (void)
Returns the system timer frequency. More...
void | Ifx_Ssw_serviceCpuWatchdog (Ifx_SCU_WDTCPU *watchdog, unsigned short password)
SCUWDT API to service CPU Watchdog functionality. More...
void | Ifx_Ssw_serviceSafetyWatchdog (unsigned short password)
SCUWDT API to service Safety Watchdog functionality. More...
IFX_SSW_INLINE unsigned short | Ifx_Ssw_getGlobalSafetyEndinitPasswordInline (void)
IFX_SSW_INLINE void | Ifx_Ssw_clearGlobalSafetyEndinitInline (unsigned short password)
IFX_SSW_INLINE void | Ifx_Ssw_setGlobalSafetyEndinitInline (unsigned short password)
IFX_SSW_INLINE unsigned short | Ifx_Ssw_getCpuWatchdogPasswordInline (Ifx_SCU_WDTCPU *watchdog)
IFX_SSW_INLINE unsigned short | Ifx_Ssw_getSafetyWatchdogPasswordInline (void)
IFX_SSW_INLINE void | Ifx_Ssw_clearCpuEndinitInline (Ifx_SCU_WDTCPU *watchdog, unsigned short password)
IFX_SSW_INLINE void | Ifx_Ssw_clearSafetyEndinitInline (unsigned short password)
IFX_SSW_INLINE void | Ifx_Ssw_setCpuEndinitInline (Ifx_SCU_WDTCPU *watchdog, unsigned short password)
IFX_SSW_INLINE void | Ifx_Ssw_setSafetyEndinitInline (unsigned short password)
IFX_SSW_INLINE char | Ifx_Ssw_isColdPoweronReset (void)
IFX_SSW_INLINE unsigned char | Ifx_Ssw_isApplicationReset (void)
IFX_SSW_INLINE void | Ifx_Ssw_initCSA (unsigned int *csaBegin, unsigned int *csaEnd)

Detailed Description

Startup Software support functions.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_Ssw_Infra.h.

Macro Definition Documentation

◆ IFX_CFG_SSW_CLEAR_SAFETY_ENDINIT

#define IFX_CFG_SSW_CLEAR_SAFETY_ENDINIT ( )
Value:
{ \
/* see Table 1 (Password Access Bit Pattern Requirements) */ \
SCU_WDTS_CON0.U = ((unsigned int)1 << IFX_SCU_WDTS_CON0_ENDINIT_OFF) | \
((unsigned int)0 << IFX_SCU_WDTS_CON0_LCK_OFF) | \
((unsigned int)(MODULE_SCU.WDTS.CON0.B.PW ^ 0x003F) << IFX_SCU_WDTS_CON0_PW_OFF) |\
((unsigned int)SCU_WDTS_CON0.B.REL << IFX_SCU_WDTS_CON0_REL_OFF); \
/* Clear ENDINT and set LCK bit in Config_0 register */ \
SCU_WDTS_CON0.U = ((unsigned int)0 << IFX_SCU_WDTS_CON0_ENDINIT_OFF) | \
((unsigned int)1 << IFX_SCU_WDTS_CON0_LCK_OFF) | \
((unsigned int)(MODULE_SCU.WDTS.CON0.B.PW ^ 0x003F) << IFX_SCU_WDTS_CON0_PW_OFF) |\
((unsigned int)SCU_WDTS_CON0.B.REL << IFX_SCU_WDTS_CON0_REL_OFF); \
/* Read back of the register is mandatory to ensure the register update */ \
SCU_WDTS_CON0.U; \
}

clear safety endinit.
Note: IFX_CFG_SSW_CLEAR_SAFETY_ENDINIT() function macro is added to avoid issues higher optimization is enabled.

Definition at line 123 of file Ifx_Ssw_Infra.h.

◆ IFX_CFG_SSW_EVR_OSC_FREQUENCY

#define IFX_CFG_SSW_EVR_OSC_FREQUENCY (100000000.0)

Definition at line 106 of file Ifx_Ssw_Infra.h.

Referenced by Ifx_Ssw_getStmFrequency().

◆ IFX_CFG_SSW_SET_SAFETY_ENDINIT

#define IFX_CFG_SSW_SET_SAFETY_ENDINIT ( )
Value:
{ \
/* see Table 1 (Password Access Bit Pattern Requirements) */ \
SCU_WDTS_CON0.U = ((unsigned int)1 << IFX_SCU_WDTS_CON0_ENDINIT_OFF) | \
((unsigned int)0 << IFX_SCU_WDTS_CON0_LCK_OFF) | \
((unsigned int)(MODULE_SCU.WDTS.CON0.B.PW ^ 0x003F) << IFX_SCU_WDTS_CON0_PW_OFF) |\
((unsigned int)SCU_WDTS_CON0.B.REL << IFX_SCU_WDTS_CON0_REL_OFF); \
/* Set ENDINT and set LCK bit in Config_0 register */ \
SCU_WDTS_CON0.U = ((unsigned int)1 << IFX_SCU_WDTS_CON0_ENDINIT_OFF) | \
((unsigned int)1 << IFX_SCU_WDTS_CON0_LCK_OFF) | \
((unsigned int)(MODULE_SCU.WDTS.CON0.B.PW ^ 0x003F) << IFX_SCU_WDTS_CON0_PW_OFF) |\
((unsigned int)SCU_WDTS_CON0.B.REL << IFX_SCU_WDTS_CON0_REL_OFF); \
/* Read back of the register is mandatory to ensure the register update */ \
SCU_WDTS_CON0.U; \
}

set safety endinit.
Note: IFX_CFG_SSW_SET_SAFETY_ENDINIT() function macro is added to avoid issues higher optimization is enabled.

Definition at line 142 of file Ifx_Ssw_Infra.h.

◆ IFX_CFG_SSW_STARTCPU_WAIT_TIME_IN_SECONDS

#define IFX_CFG_SSW_STARTCPU_WAIT_TIME_IN_SECONDS (0.0001)

Definition at line 102 of file Ifx_Ssw_Infra.h.

Referenced by __Core1_start(), __Core2_start(), and __Core3_start().

◆ IFX_CFG_SSW_SYSCLK_PIN_FREQUENCY

#define IFX_CFG_SSW_SYSCLK_PIN_FREQUENCY (20000000.0)

Definition at line 110 of file Ifx_Ssw_Infra.h.

Referenced by Ifx_Ssw_getStmFrequency().

◆ IFX_CFG_SSW_XTAL_FREQUENCY

#define IFX_CFG_SSW_XTAL_FREQUENCY (IFX_CFG_SCU_XTAL_FREQUENCY)

Definition at line 114 of file Ifx_Ssw_Infra.h.

Referenced by Ifx_Ssw_getStmFrequency().

◆ IFX_SSW_APPLICATIONRESET

#define IFX_SSW_APPLICATIONRESET (2U)

Application reset enabled In SCU_RSTCON register, value 2 represents the Application reset.

Definition at line 90 of file Ifx_Ssw_Infra.h.

Referenced by Ifx_Ssw_isApplicationReset().

◆ IFX_SSW_APPLICATIONRESET_MASK

#define IFX_SSW_APPLICATIONRESET_MASK
Value:
(((unsigned int)IFX_SCU_RSTSTAT_SW_MSK << IFX_SCU_RSTSTAT_SW_OFF) | \
((unsigned int)IFX_SCU_RSTSTAT_STM3_MSK << IFX_SCU_RSTSTAT_STM3_OFF) | \
((unsigned int)IFX_SCU_RSTSTAT_STM2_MSK << IFX_SCU_RSTSTAT_STM2_OFF) | \
((unsigned int)IFX_SCU_RSTSTAT_STM1_MSK << IFX_SCU_RSTSTAT_STM1_OFF) | \
((unsigned int)IFX_SCU_RSTSTAT_STM0_MSK << IFX_SCU_RSTSTAT_STM0_OFF) | \
((unsigned int)IFX_SCU_RSTSTAT_SMU_MSK << IFX_SCU_RSTSTAT_SMU_OFF) | \
((unsigned int)IFX_SCU_RSTSTAT_ESR1_MSK << IFX_SCU_RSTSTAT_ESR1_OFF) | \
((unsigned int)IFX_SCU_RSTSTAT_ESR0_MSK << IFX_SCU_RSTSTAT_ESR0_OFF))

Application Reset Mask.

Definition at line 69 of file Ifx_Ssw_Infra.h.

Referenced by Ifx_Ssw_isApplicationReset().

◆ IFX_SSW_COLD_POWERONRESET_MASK

#define IFX_SSW_COLD_POWERONRESET_MASK
Value:
(((unsigned int)IFX_SCU_RSTSTAT_STBYR_MSK << IFX_SCU_RSTSTAT_STBYR_OFF) | \
((unsigned int)IFX_SCU_RSTSTAT_SWD_MSK << IFX_SCU_RSTSTAT_SWD_OFF) | \
((unsigned int)IFX_SCU_RSTSTAT_EVR33_MSK << IFX_SCU_RSTSTAT_EVR33_OFF) | \
((unsigned int)IFX_SCU_RSTSTAT_EVRC_MSK << IFX_SCU_RSTSTAT_EVRC_OFF))

Cold PowerOn Reset Mask.

Definition at line 81 of file Ifx_Ssw_Infra.h.

Referenced by Ifx_Ssw_isColdPoweronReset().

◆ IFX_SSW_CSA_SIZE

#define IFX_SSW_CSA_SIZE 16U

CSA size.

Definition at line 99 of file Ifx_Ssw_Infra.h.

Referenced by Ifx_Ssw_initCSA().

◆ IFX_SSW_POWERONRESET_MASK

#define IFX_SSW_POWERONRESET_MASK
Value:
(((unsigned int)IFX_SCU_RSTSTAT_STBYR_MSK << IFX_SCU_RSTSTAT_STBYR_OFF) | \
((unsigned int)IFX_SCU_RSTSTAT_SWD_MSK << IFX_SCU_RSTSTAT_SWD_OFF) | \
((unsigned int)IFX_SCU_RSTSTAT_EVR33_MSK << IFX_SCU_RSTSTAT_EVR33_OFF) | \
((unsigned int)IFX_SCU_RSTSTAT_EVRC_MSK << IFX_SCU_RSTSTAT_EVRC_OFF) | \
((unsigned int)IFX_SCU_RSTSTAT_CB1_MSK << IFX_SCU_RSTSTAT_CB1_OFF) | \
((unsigned int)IFX_SCU_RSTSTAT_CB0_MSK << IFX_SCU_RSTSTAT_CB0_OFF) | \
((unsigned int)IFX_SCU_RSTSTAT_PORST_MSK << IFX_SCU_RSTSTAT_PORST_OFF))

PowerOn Reset Mask.

Definition at line 58 of file Ifx_Ssw_Infra.h.

Referenced by Ifx_Ssw_isApplicationReset().

◆ IFX_SSW_SEICON_REL_VAL_MSK

#define IFX_SSW_SEICON_REL_VAL_MSK (unsigned short)(0xFFFCU << IFX_SCU_SEICON0_REL_OFF)

Reload value mask.

Definition at line 93 of file Ifx_Ssw_Infra.h.

Referenced by Ifx_Ssw_clearGlobalSafetyEndinitInline(), and Ifx_Ssw_setGlobalSafetyEndinitInline().

◆ IFX_SSW_WDT_PASSWORD_INVERT_MSK

#define IFX_SSW_WDT_PASSWORD_INVERT_MSK (0x003FU)

Mask values is used to invert the password value bits.

Definition at line 96 of file Ifx_Ssw_Infra.h.

Referenced by Ifx_Ssw_getCpuWatchdogPasswordInline(), Ifx_Ssw_getGlobalSafetyEndinitPasswordInline(), and Ifx_Ssw_getSafetyWatchdogPasswordInline().

Function Documentation

◆ Ifx_Ssw_C_Init()

void Ifx_Ssw_C_Init ( void )

Initialise the C runtime environment.

Definition at line 198 of file Ifx_Ssw_Infra.c.

Referenced by __Core1_start(), __Core2_start(), and __Core3_start().

◆ Ifx_Ssw_clearCpuEndinit()

void Ifx_Ssw_clearCpuEndinit | ( | Ifx_SCU_WDTCPU * | watchdog,
 |  | unsigned short | password
 | ) |  |

Clear ENDINIT bit provided by CPU WDT Hardware module.

This API will disable ENDINIT functionality provided by CPU WDT Hardware module. User need to use this API call before modifying any ENDINIT protected register. User must always set the ENDINIT bit using other API Ifx_Ssw_setCpuEndinit. The sequence clear and set ENDINIT shall not be interrupted by another interrupt/call.

Parameters
watchdog | pointer to the watchdog register map of CPU WDT hardware instance
password | Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 60 of file Ifx_Ssw_Infra.c.

Referenced by Ifx_Ssw_disableCpuWatchdog(), Ifx_Ssw_enableCpuWatchdog(), and Ifx_Ssw_setCpu0Idle().

◆ Ifx_Ssw_clearCpuEndinitInline()

IFX_SSW_INLINE void Ifx_Ssw_clearCpuEndinitInline | ( | Ifx_SCU_WDTCPU * | watchdog,
 |  | unsigned short | password
 | ) |  |

Definition at line 356 of file Ifx_Ssw_Infra.h.

Referenced by __Core1_start(), __Core2_start(), __Core3_start(), and Ifx_Ssw_clearCpuEndinit().

◆ Ifx_Ssw_clearGlobalSafetyEndinitInline()

IFX_SSW_INLINE void Ifx_Ssw_clearGlobalSafetyEndinitInline ( unsigned short password )

Definition at line 305 of file Ifx_Ssw_Infra.h.

◆ Ifx_Ssw_clearSafetyEndinit()

void Ifx_Ssw_clearSafetyEndinit ( unsigned short password )

Clear ENDINIT bit provided by Safety WDT Hardware module.

This API will disable ENDINIT functionality provided by Safety WDT Hardware module. User need to use this API call before modifying any ENDINIT protected register. User must always set the ENDINIT bit using other API Ifx_Ssw_setCpuEndinit. The sequence clear and set ENDINIT shall not be interrupted by another interrupt/call.

Parameters
password Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 72 of file Ifx_Ssw_Infra.c.

Referenced by Ifx_Ssw_disableSafetyWatchdog(), and Ifx_Ssw_enableSafetyWatchdog().

◆ Ifx_Ssw_clearSafetyEndinitInline()

IFX_SSW_INLINE void Ifx_Ssw_clearSafetyEndinitInline ( unsigned short password )

Definition at line 378 of file Ifx_Ssw_Infra.h.

Referenced by Ifx_Ssw_clearSafetyEndinit().

◆ Ifx_Ssw_disableCpuWatchdog()

void Ifx_Ssw_disableCpuWatchdog | ( | Ifx_SCU_WDTCPU * | watchdog,
 |  | unsigned short | password
 | ) |  |

Disable CPU Watchdog functionality.

This API will disable Watchdog functionality of CPU WDT Hardware module. The Watchdog timers will stop counting after this API call.

Parameters
watchdog | pointer to the watchdog register map of CPU WDT hardware instance
password | Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 96 of file Ifx_Ssw_Infra.c.

◆ Ifx_Ssw_disableSafetyWatchdog()

void Ifx_Ssw_disableSafetyWatchdog ( unsigned short password )

Disable Safety Watchdog functionality.

This API will disable Watchdog functionality of Safety WDT Hardware module. The Watchdog timers will stop counting after this API call.

Parameters
password Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 126 of file Ifx_Ssw_Infra.c.

◆ Ifx_Ssw_enableCpuWatchdog()

void Ifx_Ssw_enableCpuWatchdog | ( | Ifx_SCU_WDTCPU * | watchdog,
 |  | unsigned short | password
 | ) |  |

SCUWDT API to enable CPU Watchdog functionality.

This API will enable Watchdog functionality of CPU WDT Hardware module. The Watchdog timers need to be serviced periodically after this API call.

Parameters
watchdog | pointer to the watchdog register map of CPU WDT hardware instance
password | Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 111 of file Ifx_Ssw_Infra.c.

◆ Ifx_Ssw_enableSafetyWatchdog()

void Ifx_Ssw_enableSafetyWatchdog ( unsigned short password )

Enable Safety Watchdog functionality.

This API will enable Watchdog functionality of Safety WDT Hardware module. The Watchdog timers need to be serviced periodically after this API call.

Parameters
password Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 134 of file Ifx_Ssw_Infra.c.

◆ Ifx_Ssw_getCpuWatchdogPassword()

unsigned short Ifx_Ssw_getCpuWatchdogPassword ( Ifx_SCU_WDTCPU * watchdog )

Fetch current password of CPU Watchdog module.

This API will fetch current Watchdog password for CPU WDT Hardware module. password is needed to be passed with most of the WDT APIs.

Parameters
watchdog pointer to the watchdog register map of CPU WDT hardware instance
Returns
password Existing (Application specific) password for the Watchdog module.

Definition at line 48 of file Ifx_Ssw_Infra.c.

Referenced by Ifx_Ssw_setCpu0Idle().

◆ Ifx_Ssw_getCpuWatchdogPasswordInline()

IFX_SSW_INLINE unsigned short Ifx_Ssw_getCpuWatchdogPasswordInline ( Ifx_SCU_WDTCPU * watchdog )

Definition at line 327 of file Ifx_Ssw_Infra.h.

Referenced by __Core1_start(), __Core2_start(), __Core3_start(), and Ifx_Ssw_getCpuWatchdogPassword().

◆ Ifx_Ssw_getGlobalSafetyEndinitPasswordInline()

IFX_SSW_INLINE unsigned short Ifx_Ssw_getGlobalSafetyEndinitPasswordInline ( void )

Definition at line 294 of file Ifx_Ssw_Infra.h.

◆ Ifx_Ssw_getSafetyWatchdogPassword()

unsigned short Ifx_Ssw_getSafetyWatchdogPassword ( void )

Fetch current password of Safety Watchdog module.

This API will fetch current Watchdog password for Safety WDT Hardware module. password is needed to be passed with most of the WDT APIs.

Returns
password Existing (Application specific) password for the Watchdog module.

Definition at line 54 of file Ifx_Ssw_Infra.c.

◆ Ifx_Ssw_getSafetyWatchdogPasswordInline()

IFX_SSW_INLINE unsigned short Ifx_Ssw_getSafetyWatchdogPasswordInline ( void )

Definition at line 341 of file Ifx_Ssw_Infra.h.

Referenced by Ifx_Ssw_getSafetyWatchdogPassword().

◆ Ifx_Ssw_getStmFrequency()

float Ifx_Ssw_getStmFrequency ( void )

Returns the system timer frequency.

Returns
the system timer frequency in Hz.

Definition at line 170 of file Ifx_Ssw_Infra.c.

Referenced by __Core1_start(), __Core2_start(), and __Core3_start().

◆ Ifx_Ssw_initCSA()

IFX_SSW_INLINE void Ifx_Ssw_initCSA | ( | unsigned int * | csaBegin,
 |  | unsigned int * | csaEnd
 | ) |  |

Definition at line 502 of file Ifx_Ssw_Infra.h.

Referenced by __Core1_start(), __Core2_start(), and __Core3_start().

◆ Ifx_Ssw_isApplicationReset()

IFX_SSW_INLINE unsigned char Ifx_Ssw_isApplicationReset ( void )

Definition at line 455 of file Ifx_Ssw_Infra.h.

◆ Ifx_Ssw_isColdPoweronReset()

IFX_SSW_INLINE char Ifx_Ssw_isColdPoweronReset ( void )

Definition at line 445 of file Ifx_Ssw_Infra.h.

◆ Ifx_Ssw_serviceCpuWatchdog()

void Ifx_Ssw_serviceCpuWatchdog | ( | Ifx_SCU_WDTCPU * | watchdog,
 |  | unsigned short | password
 | ) |  |

SCUWDT API to service CPU Watchdog functionality.

This API will service Watchdog functionality corresponding to CPU WDT Hardware module. User need to use this API call periodically. This API results in reloading of the Watchdog Timer. User need to have the password stored locally in the caller function, (use Ifx_Ssw_getCpuWatchdogPassword).

Parameters
password | Existing (Application specific) password for the Watchdog module.
watchdog | pointer to the watchdog register map of CPU WDT hardware instance.
Returns
None

Definition at line 84 of file Ifx_Ssw_Infra.c.

◆ Ifx_Ssw_serviceSafetyWatchdog()

void Ifx_Ssw_serviceSafetyWatchdog ( unsigned short password )

SCUWDT API to service Safety Watchdog functionality.

This API will service Watchdog functionality corresponding to Safety WDT Hardware module. User need to use this API call periodically. This API results in reloading of the Watchdog Timer. User need to have the password stored locally in the caller function, (use Ifx_Ssw_getSafetyWatchdogPassword).

Parameters
password Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 90 of file Ifx_Ssw_Infra.c.

◆ Ifx_Ssw_setCpu0Idle()

void Ifx_Ssw_setCpu0Idle ( void )

Set CPU0 to idle state.

Definition at line 160 of file Ifx_Ssw_Infra.c.

◆ Ifx_Ssw_setCpuEndinit()

void Ifx_Ssw_setCpuEndinit | ( | Ifx_SCU_WDTCPU * | watchdog,
 |  | unsigned short | password
 | ) |  |

Set ENDINIT bit provided by CPU WDT Hardware module.

This API will enable ENDINIT functionality provided by CPU WDT Hardware module. User need to use this API call after modifying any ENDINIT protected register.

Parameters
watchdog | pointer to the watchdog register map of CPU WDT hardware instance
password | Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 66 of file Ifx_Ssw_Infra.c.

Referenced by Ifx_Ssw_disableCpuWatchdog(), Ifx_Ssw_enableCpuWatchdog(), and Ifx_Ssw_setCpu0Idle().

◆ Ifx_Ssw_setCpuEndinitInline()

IFX_SSW_INLINE void Ifx_Ssw_setCpuEndinitInline | ( | Ifx_SCU_WDTCPU * | watchdog,
 |  | unsigned short | password
 | ) |  |

Definition at line 400 of file Ifx_Ssw_Infra.h.

Referenced by __Core1_start(), __Core2_start(), __Core3_start(), Ifx_Ssw_serviceCpuWatchdog(), and Ifx_Ssw_setCpuEndinit().

◆ Ifx_Ssw_setGlobalSafetyEndinitInline()

IFX_SSW_INLINE void Ifx_Ssw_setGlobalSafetyEndinitInline ( unsigned short password )

Definition at line 315 of file Ifx_Ssw_Infra.h.

◆ Ifx_Ssw_setSafetyEndinit()

void Ifx_Ssw_setSafetyEndinit ( unsigned short password )

Set ENDINIT bit provided by Safety WDT Hardware module.

This API will enable ENDINIT functionality provided by Safety WDT Hardware module. User need to use this API call after modifying any ENDINIT protected register.

Parameters
password Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 78 of file Ifx_Ssw_Infra.c.

Referenced by Ifx_Ssw_disableSafetyWatchdog(), and Ifx_Ssw_enableSafetyWatchdog().

◆ Ifx_Ssw_setSafetyEndinitInline()

IFX_SSW_INLINE void Ifx_Ssw_setSafetyEndinitInline ( unsigned short password )

Definition at line 422 of file Ifx_Ssw_Infra.h.

Referenced by Ifx_Ssw_serviceSafetyWatchdog(), and Ifx_Ssw_setSafetyEndinit().

◆ Ifx_Ssw_startCore()

void Ifx_Ssw_startCore | ( | Ifx_CPU * | cpu,
 |  | unsigned int | programCounter
 | ) |  |

Set the program counter for the CPU specified and start the CPU.

Parameters
cpu | Pointer to the CPU HW module (register memory map)
programCounter | Program counter value to start the CPU

Definition at line 142 of file Ifx_Ssw_Infra.c.

Referenced by __Core1_start(), and __Core2_start().


iLLD_TC38A: Ifx_Ssw_LegacySwCfg.h File Reference

  • Infra
  • Ssw
  • TC38A
  • Tricore
Ifx_Ssw_LegacySwCfg.h File Reference

Startup Software to support legacy controller options. More...

#include "Ifx_Cfg.h"
Include dependency graph for Ifx_Ssw_LegacySwCfg.h:

Go to the source code of this file.

Detailed Description

Startup Software to support legacy controller options.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_Ssw_LegacySwCfg.h.


iLLD_TC38A: Ifx_Ssw_Tc0.c File Reference

  • Infra
  • Ssw
  • TC38A
  • Tricore
Macros | Functions
Ifx_Ssw_Tc0.c File Reference

Startup Software for Core0. More...

#include "Ifx_Cfg.h"
#include "Ifx_Ssw.h"
#include "Ifx_Ssw_Infra.h"
#include "Ifx_Cfg_Ssw.h"
Include dependency graph for Ifx_Ssw_Tc0.c:

Go to the source code of this file.

Macros

#define | IFX_CFG_SSW_ENABLE_TRICORE0_PCACHE (1U)
#define | IFX_CFG_SSW_ENABLE_TRICORE0_DCACHE (1U)
#define | IFX_CFG_SSW_CALLOUT_PMS_INIT()
#define | IFX_CFG_SSW_CALLOUT_LBIST()
#define | IFX_CFG_SSW_CALLOUT_MONBIST()
#define | IFX_CFG_SSW_CALLOUT_MMIC_CHECK()
#define | IFX_CFG_SSW_CALLOUT_PLL_INIT()
#define | IFX_CFG_SSW_CALLOUT_MBIST()
#define | IFX_CFG_SSW_CALLOUT_SMU()
#define | IFX_SSW_INIT_CONTEXT()

Functions

IFX_SSW_COMMON_LINKER_SYMBOLS ()
IFX_SSW_CORE_LINKER_SYMBOLS (0)
void | core0_main (void)
void | _START (void)

Detailed Description

Startup Software for Core0.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_Ssw_Tc0.c.

Macro Definition Documentation

◆ IFX_CFG_SSW_CALLOUT_LBIST

#define IFX_CFG_SSW_CALLOUT_LBIST ( )

Definition at line 65 of file Ifx_Ssw_Tc0.c.

◆ IFX_CFG_SSW_CALLOUT_MBIST

#define IFX_CFG_SSW_CALLOUT_MBIST ( )

Definition at line 81 of file Ifx_Ssw_Tc0.c.

◆ IFX_CFG_SSW_CALLOUT_MMIC_CHECK

#define IFX_CFG_SSW_CALLOUT_MMIC_CHECK ( )

Definition at line 73 of file Ifx_Ssw_Tc0.c.

◆ IFX_CFG_SSW_CALLOUT_MONBIST

#define IFX_CFG_SSW_CALLOUT_MONBIST ( )

Definition at line 69 of file Ifx_Ssw_Tc0.c.

◆ IFX_CFG_SSW_CALLOUT_PLL_INIT

#define IFX_CFG_SSW_CALLOUT_PLL_INIT ( )

Definition at line 77 of file Ifx_Ssw_Tc0.c.

◆ IFX_CFG_SSW_CALLOUT_PMS_INIT

#define IFX_CFG_SSW_CALLOUT_PMS_INIT ( )

Definition at line 61 of file Ifx_Ssw_Tc0.c.

◆ IFX_CFG_SSW_CALLOUT_SMU

#define IFX_CFG_SSW_CALLOUT_SMU ( )

Definition at line 85 of file Ifx_Ssw_Tc0.c.

◆ IFX_CFG_SSW_ENABLE_TRICORE0_DCACHE

#define IFX_CFG_SSW_ENABLE_TRICORE0_DCACHE (1U)

Definition at line 57 of file Ifx_Ssw_Tc0.c.

◆ IFX_CFG_SSW_ENABLE_TRICORE0_PCACHE

#define IFX_CFG_SSW_ENABLE_TRICORE0_PCACHE (1U)

Definition at line 53 of file Ifx_Ssw_Tc0.c.

◆ IFX_SSW_INIT_CONTEXT

#define IFX_SSW_INIT_CONTEXT ( )
Value:
{ \
/* Load user stack pointer */ \
Ifx_Ssw_setAddressReg(a10, __USTACK(0)); \
Ifx_Ssw_DSYNC(); \
\
/*Initialize the context save area for CPU0. Function Calls Possible */ \
/* Setup the context save area linked list */ \
Ifx_Ssw_initCSA((unsigned int *)__CSA(0), (unsigned int *)__CSA_END(0)); \
/* Clears any instruction buffer */ \
Ifx_Ssw_ISYNC(); \
}
__CSA
#define __CSA(cpu)
Definition: CompilerDcc.h:74
__CSA_END
#define __CSA_END(cpu)
Definition: CompilerDcc.h:75
__USTACK
#define __USTACK(cpu)
Definition: CompilerDcc.h:70

Definition at line 88 of file Ifx_Ssw_Tc0.c.

Function Documentation

◆ _START()

void _START ( void )

Definition at line 324 of file Ifx_Ssw_Tc0.c.

◆ core0_main()

void core0_main ( void )

◆ IFX_SSW_COMMON_LINKER_SYMBOLS()

IFX_SSW_COMMON_LINKER_SYMBOLS ( )

◆ IFX_SSW_CORE_LINKER_SYMBOLS()

IFX_SSW_CORE_LINKER_SYMBOLS ( 0 )


iLLD_TC38A: Ifx_Ssw_Tc1.c File Reference

  • Infra
  • Ssw
  • TC38A
  • Tricore
Macros | Functions
Ifx_Ssw_Tc1.c File Reference

Startup Software for Core1. More...

#include "Ifx_Cfg.h"
#include "Ifx_Ssw.h"
#include "Ifx_Ssw_Infra.h"
#include "IfxScu_reg.h"
#include "IfxStm_reg.h"
Include dependency graph for Ifx_Ssw_Tc1.c:

Go to the source code of this file.

Macros

#define | IFX_CFG_SSW_ENABLE_TRICORE1_PCACHE (1U)
Configuration for cache enable. More...
#define | IFX_CFG_SSW_ENABLE_TRICORE1_DCACHE (1U)

Functions

IFX_SSW_COMMON_LINKER_SYMBOLS ()
IFX_SSW_CORE_LINKER_SYMBOLS (1)
void | core1_main (void)
void | __Core1_start (void)
void | _START1 (void)

Detailed Description

Startup Software for Core1.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_Ssw_Tc1.c.

Macro Definition Documentation

◆ IFX_CFG_SSW_ENABLE_TRICORE1_DCACHE

#define IFX_CFG_SSW_ENABLE_TRICORE1_DCACHE (1U)

Data Cache enabled by default

Definition at line 62 of file Ifx_Ssw_Tc1.c.

Referenced by __Core1_start().

◆ IFX_CFG_SSW_ENABLE_TRICORE1_PCACHE

#define IFX_CFG_SSW_ENABLE_TRICORE1_PCACHE (1U)

Configuration for cache enable.

Program Cache enabled by default

Definition at line 59 of file Ifx_Ssw_Tc1.c.

Referenced by __Core1_start().

Function Documentation

◆ __Core1_start()

void __Core1_start ( void )

Definition at line 87 of file Ifx_Ssw_Tc1.c.

Referenced by _START1().

◆ _START1()

void _START1 ( void )

Definition at line 191 of file Ifx_Ssw_Tc1.c.

◆ core1_main()

void core1_main ( void )

Referenced by __Core1_start().

◆ IFX_SSW_COMMON_LINKER_SYMBOLS()

IFX_SSW_COMMON_LINKER_SYMBOLS ( )

◆ IFX_SSW_CORE_LINKER_SYMBOLS()

IFX_SSW_CORE_LINKER_SYMBOLS ( 1 )


iLLD_TC38A: Ifx_Ssw_Tc2.c File Reference

  • Infra
  • Ssw
  • TC38A
  • Tricore
Macros | Functions
Ifx_Ssw_Tc2.c File Reference

Startup Software for Core2. More...

#include "Ifx_Cfg.h"
#include "Ifx_Ssw.h"
#include "Ifx_Ssw_Infra.h"
#include "IfxScu_reg.h"
#include "IfxStm_reg.h"
Include dependency graph for Ifx_Ssw_Tc2.c:

Go to the source code of this file.

Macros

#define | IFX_CFG_SSW_ENABLE_TRICORE2_PCACHE (1U)
Configuration for cache enable. More...
#define | IFX_CFG_SSW_ENABLE_TRICORE2_DCACHE (1U)

Functions

IFX_SSW_COMMON_LINKER_SYMBOLS ()
IFX_SSW_CORE_LINKER_SYMBOLS (2)
void | core2_main (void)
void | __Core2_start (void)
void | _START2 (void)

Detailed Description

Startup Software for Core2.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_Ssw_Tc2.c.

Macro Definition Documentation

◆ IFX_CFG_SSW_ENABLE_TRICORE2_DCACHE

#define IFX_CFG_SSW_ENABLE_TRICORE2_DCACHE (1U)

Data Cache enabled by default

Definition at line 62 of file Ifx_Ssw_Tc2.c.

Referenced by __Core2_start().

◆ IFX_CFG_SSW_ENABLE_TRICORE2_PCACHE

#define IFX_CFG_SSW_ENABLE_TRICORE2_PCACHE (1U)

Configuration for cache enable.

Program Cache enabled by default

Definition at line 59 of file Ifx_Ssw_Tc2.c.

Referenced by __Core2_start().

Function Documentation

◆ __Core2_start()

void __Core2_start ( void )

Definition at line 87 of file Ifx_Ssw_Tc2.c.

Referenced by _START2().

◆ _START2()

void _START2 ( void )

Definition at line 186 of file Ifx_Ssw_Tc2.c.

◆ core2_main()

void core2_main ( void )

Referenced by __Core2_start().

◆ IFX_SSW_COMMON_LINKER_SYMBOLS()

IFX_SSW_COMMON_LINKER_SYMBOLS ( )

◆ IFX_SSW_CORE_LINKER_SYMBOLS()

IFX_SSW_CORE_LINKER_SYMBOLS ( 2 )


iLLD_TC38A: Ifx_Ssw_Tc3.c File Reference

  • Infra
  • Ssw
  • TC38A
  • Tricore
Macros | Functions
Ifx_Ssw_Tc3.c File Reference

Startup Software for Core3. More...

#include "Ifx_Cfg.h"
#include "Ifx_Ssw.h"
#include "Ifx_Ssw_Infra.h"
#include "IfxScu_reg.h"
#include "IfxStm_reg.h"
Include dependency graph for Ifx_Ssw_Tc3.c:

Go to the source code of this file.

Macros

#define | IFX_CFG_SSW_ENABLE_TRICORE3_PCACHE (1U)
Configuration for cache enable. More...
#define | IFX_CFG_SSW_ENABLE_TRICORE3_DCACHE (1U)

Functions

IFX_SSW_COMMON_LINKER_SYMBOLS ()
IFX_SSW_CORE_LINKER_SYMBOLS (3)
void | core3_main (void)
void | __Core3_start (void)
void | _START3 (void)

Detailed Description

Startup Software for Core3.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_Ssw_Tc3.c.

Macro Definition Documentation

◆ IFX_CFG_SSW_ENABLE_TRICORE3_DCACHE

#define IFX_CFG_SSW_ENABLE_TRICORE3_DCACHE (1U)

Data Cache enabled by default

Definition at line 62 of file Ifx_Ssw_Tc3.c.

Referenced by __Core3_start().

◆ IFX_CFG_SSW_ENABLE_TRICORE3_PCACHE

#define IFX_CFG_SSW_ENABLE_TRICORE3_PCACHE (1U)

Configuration for cache enable.

Program Cache enabled by default

Definition at line 59 of file Ifx_Ssw_Tc3.c.

Referenced by __Core3_start().

Function Documentation

◆ __Core3_start()

void __Core3_start ( void )

Definition at line 87 of file Ifx_Ssw_Tc3.c.

Referenced by _START3().

◆ _START3()

void _START3 ( void )

Definition at line 181 of file Ifx_Ssw_Tc3.c.

◆ core3_main()

void core3_main ( void )

Referenced by __Core3_start().

◆ IFX_SSW_COMMON_LINKER_SYMBOLS()

IFX_SSW_COMMON_LINKER_SYMBOLS ( )

◆ IFX_SSW_CORE_LINKER_SYMBOLS()

IFX_SSW_CORE_LINKER_SYMBOLS ( 3 )


iLLD_TC38A: Ifx_TypesDcc.h File Reference

  • Cpu
  • Std
Macros | Typedefs
Ifx_TypesDcc.h File Reference

Go to the source code of this file.

Macros

#define FRACT_MAX 0x7fffffff

Typedefs

typedef long | fract
typedef short | sfract
typedef long long | laccum
typedef long | __packb
typedef unsigned long | __upackb
typedef long | __packhw
typedef unsigned long | __upackhw
typedef unsigned long long | circ_t

Detailed Description

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_TypesDcc.h.

Macro Definition Documentation

◆ FRACT_MAX

#define FRACT_MAX 0x7fffffff

Definition at line 42 of file Ifx_TypesDcc.h.

Typedef Documentation

◆ __packb

typedef long __packb

Definition at line 47 of file Ifx_TypesDcc.h.

◆ __packhw

typedef long __packhw

Definition at line 49 of file Ifx_TypesDcc.h.

◆ __upackb

typedef unsigned long __upackb

Definition at line 48 of file Ifx_TypesDcc.h.

◆ __upackhw

typedef unsigned long __upackhw

Definition at line 50 of file Ifx_TypesDcc.h.

◆ circ_t

typedef unsigned long long circ_t

Definition at line 52 of file Ifx_TypesDcc.h.

◆ fract

typedef long fract

Definition at line 44 of file Ifx_TypesDcc.h.

◆ laccum

typedef long long laccum

Definition at line 46 of file Ifx_TypesDcc.h.

◆ sfract

typedef short sfract

Definition at line 45 of file Ifx_TypesDcc.h.


iLLD_TC38A: Ifx_TypesGhs.h File Reference

  • Cpu
  • Std
Macros | Typedefs
Ifx_TypesGhs.h File Reference

Go to the source code of this file.

Macros

#define | FRACT_MAX 0x7fffffff
#define | __interrupt(intno)

Typedefs

typedef long | fract
typedef short | sfract
typedef long long | laccum
typedef long | __packb
typedef unsigned long | __upackb
typedef long | __packhw
typedef unsigned long | __upackhw

Detailed Description

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_TypesGhs.h.

Macro Definition Documentation

◆ __interrupt

#define __interrupt ( intno )

Definition at line 44 of file Ifx_TypesGhs.h.

◆ FRACT_MAX

#define FRACT_MAX 0x7fffffff

Definition at line 42 of file Ifx_TypesGhs.h.

Typedef Documentation

◆ __packb

typedef long __packb

Definition at line 49 of file Ifx_TypesGhs.h.

◆ __packhw

typedef long __packhw

Definition at line 51 of file Ifx_TypesGhs.h.

◆ __upackb

typedef unsigned long __upackb

Definition at line 50 of file Ifx_TypesGhs.h.

◆ __upackhw

typedef unsigned long __upackhw

Definition at line 52 of file Ifx_TypesGhs.h.

◆ fract

typedef long fract

Definition at line 46 of file Ifx_TypesGhs.h.

◆ laccum

typedef long long laccum

Definition at line 48 of file Ifx_TypesGhs.h.

◆ sfract

typedef short sfract

Definition at line 47 of file Ifx_TypesGhs.h.


iLLD_TC38A: Ifx_TypesGnuc.h File Reference

  • Cpu
  • Std
Macros | Typedefs
Ifx_TypesGnuc.h File Reference
#include <machine/cint.h>
Include dependency graph for Ifx_TypesGnuc.h:

Go to the source code of this file.

Macros

#define | FRACT_MAX 0x7fffffff
#define | __interrupt(intno)

Typedefs

typedef long | fract
typedef short | sfract
typedef long long | laccum
typedef long | __packb
typedef unsigned long | __upackb
typedef long | __packhw
typedef unsigned long | __upackhw

Detailed Description

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_TypesGnuc.h.

Macro Definition Documentation

◆ __interrupt

#define __interrupt ( intno )

Definition at line 45 of file Ifx_TypesGnuc.h.

◆ FRACT_MAX

#define FRACT_MAX 0x7fffffff

Definition at line 42 of file Ifx_TypesGnuc.h.

Typedef Documentation

◆ __packb

typedef long __packb

Definition at line 50 of file Ifx_TypesGnuc.h.

◆ __packhw

typedef long __packhw

Definition at line 52 of file Ifx_TypesGnuc.h.

◆ __upackb

typedef unsigned long __upackb

Definition at line 51 of file Ifx_TypesGnuc.h.

◆ __upackhw

typedef unsigned long __upackhw

Definition at line 53 of file Ifx_TypesGnuc.h.

◆ fract

typedef long fract

Definition at line 47 of file Ifx_TypesGnuc.h.

◆ laccum

typedef long long laccum

Definition at line 49 of file Ifx_TypesGnuc.h.

◆ sfract

typedef short sfract

Definition at line 48 of file Ifx_TypesGnuc.h.


iLLD_TC38A: Ifx_TypesTasking.h File Reference

  • Cpu
  • Std
Macros
Ifx_TypesTasking.h File Reference

Go to the source code of this file.

Macros

#define | fract __fract
#define | sfract __sfract
#define | laccum __laccum
#define | __asm__ __asm

Detailed Description

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_TypesTasking.h.

Macro Definition Documentation

◆ __asm__

#define __asm__ __asm

Definition at line 45 of file Ifx_TypesTasking.h.

Referenced by Ifx__absb(), Ifx__absdif(), Ifx__absh(), Ifx__abss(), Ifx__abssh(), Ifx__adds(), Ifx__addsu(), Ifx__cacheai(), Ifx__cacheawi(), Ifx__cacheawi_bo_post_inc(), Ifx__cacheiwi(), Ifx__clo(), Ifx__cls(), Ifx__clssf(), Ifx__cmpAndSwap(), Ifx__crc32(), Ifx__debug(), Ifx__disable_and_save(), Ifx__dsync(), Ifx__extr(), Ifx__extractbyte1(), Ifx__extractbyte2(), Ifx__extractbyte3(), Ifx__extractbyte4(), Ifx__extracthw1(), Ifx__extracthw2(), Ifx__extractubyte1(), Ifx__extractubyte2(), Ifx__extractubyte3(), Ifx__extractubyte4(), Ifx__extractuhw1(), Ifx__extractuhw2(), Ifx__extru(), Ifx__fabs(), Ifx__fabsf(), Ifx__fixpoint_to_float32(), Ifx__float_to_fract(), Ifx__fract_to_float(), Ifx__fract_to_sfract(), Ifx__getA11(), Ifx__getbyte1(), Ifx__getbyte2(), Ifx__getbyte3(), Ifx__getbyte4(), Ifx__getDataParamRet(), Ifx__getfract(), Ifx__gethw1(), Ifx__gethw2(), Ifx__getubyte1(), Ifx__getubyte2(), Ifx__getubyte3(), Ifx__getubyte4(), Ifx__getuhw1(), Ifx__getuhw2(), Ifx__initpackb(), Ifx__initpackhw(), Ifx__initupackb(), Ifx__initupackhw(), Ifx__ins(), Ifx__insert(), Ifx__insertbyte1(), Ifx__insertbyte2(), Ifx__insertbyte3(), Ifx__insertbyte4(), Ifx__inserthw1(), Ifx__inserthw2(), Ifx__insertubyte1(), Ifx__insertubyte2(), Ifx__insertubyte3(), Ifx__insertubyte4(), Ifx__insertuhw1(), Ifx__insertuhw2(), Ifx__insn(), Ifx__isync(), Ifx__jump_and_link(), Ifx__jumpBackToLink(), Ifx__ldmst(), Ifx__mac_r_sf(), Ifx__mac_sf(), Ifx__max(), Ifx__maxs(), Ifx__maxu(), Ifx__min(), Ifx__minb(), Ifx__minbu(), Ifx__minh(), Ifx__minhu(), Ifx__mins(), Ifx__minu(), Ifx__moveToAddrParam0(), Ifx__moveToDataParam0(), Ifx__moveToDataParamRet(), Ifx__mulfractfract(), Ifx__mulfractlong(), Ifx__mulsc(), Ifx__nop(), Ifx__nops(), Ifx__parity(), Ifx__popcnt(), Ifx__restore(), Ifx__rol(), Ifx__ror(), Ifx__round16(), Ifx__rslcx(), Ifx__s16_to_sfract(), Ifx__satb(), Ifx__satbu(), Ifx__sath(), Ifx__sathu(), Ifx__setbyte1(), Ifx__setbyte2(), Ifx__setbyte3(), Ifx__setbyte4(), Ifx__sethw1(), Ifx__sethw2(), Ifx__setStackPointer(), Ifx__setubyte1(), Ifx__setubyte2(), Ifx__setubyte3(), Ifx__setubyte4(), Ifx__setuhw1(), Ifx__setuhw2(), Ifx__sfract_to_s16(), Ifx__sfract_to_u16(), Ifx__shaaccum(), Ifx__shafracts(), Ifx__shasfracts(), Ifx__stopPerfCounters(), Ifx__subs(), Ifx__subsu(), Ifx__svlcx(), Ifx__swap(), Ifx__u16_to_sfract(), Ifx_Ssw_getDataParam0(), Ifx_Ssw_jumpToFunction(), Ifx_Ssw_MINU(), Ifx_Ssw_moveToDataParam0(), Ifx_Ssw_NOP(), and IfxCpu_calculateCrc32().

◆ fract

#define fract __fract

Definition at line 42 of file Ifx_TypesTasking.h.

◆ laccum

#define laccum __laccum

Definition at line 44 of file Ifx_TypesTasking.h.

◆ sfract

#define sfract __sfract

Definition at line 43 of file Ifx_TypesTasking.h.


iLLD_TC38A: Ifx_WndF32_BlackmanHarrisTable.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Variables
Ifx_WndF32_BlackmanHarrisTable.c File Reference

Lookup table for Blackman-Harris window function. More...

#include "Ifx_WndF32.h"
Include dependency graph for Ifx_WndF32_BlackmanHarrisTable.c:

Go to the source code of this file.

Variables

CONST_CFG float32 Ifx_g_WndF32_blackmanHarrisTable [(IFX_WNDF32_TABLE_LENGTH/2)]

Detailed Description

Lookup table for Blackman-Harris window function.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_WndF32_BlackmanHarrisTable.c.

Variable Documentation

◆ Ifx_g_WndF32_blackmanHarrisTable

CONST_CFG float32 Ifx_g_WndF32_blackmanHarrisTable[(IFX_WNDF32_TABLE_LENGTH/2)]

Definition at line 49 of file Ifx_WndF32_BlackmanHarrisTable.c.


iLLD_TC38A: Ifx_WndF32_HannTable.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Variables
Ifx_WndF32_HannTable.c File Reference

Lookup table for Hann window function. More...

#include "Ifx_WndF32.h"
Include dependency graph for Ifx_WndF32_HannTable.c:

Go to the source code of this file.

Variables

CONST_CFG float32 Ifx_g_WndF32_hannTable [(IFX_WNDF32_TABLE_LENGTH/2)]

Detailed Description

Lookup table for Hann window function.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_WndF32_HannTable.c.

Variable Documentation

◆ Ifx_g_WndF32_hannTable

CONST_CFG float32 Ifx_g_WndF32_hannTable[(IFX_WNDF32_TABLE_LENGTH/2)]

Definition at line 49 of file Ifx_WndF32_HannTable.c.


iLLD_TC38A: IfxAsclin.c File Reference

  • Asclin
  • Std
Functions
IfxAsclin.c File Reference

ASCLIN basic functionality. More...

#include "IfxAsclin.h"
Include dependency graph for IfxAsclin.c:

Go to the source code of this file.

Functions

void | IfxAsclin_disableModule (Ifx_ASCLIN *asclin)
Disables the module. More...
void | IfxAsclin_enableAscErrorFlags (Ifx_ASCLIN *asclin, boolean parEnable, boolean rfoEnable)
Enables the ASC error interrupt Flags. More...
void | IfxAsclin_enableModule (Ifx_ASCLIN *asclin)
Enables the module. More...
Ifx_ASCLIN * | IfxAsclin_getAddress (IfxAsclin_Index asclin)
API to get the address for ASCLIN HW module register memory map. More...
float32 | IfxAsclin_getFaFrequency (Ifx_ASCLIN *asclin)
Returns the ASCLIN module FA frequency in Hz. More...
IfxAsclin_Index | IfxAsclin_getIndex (Ifx_ASCLIN *asclin)
API to get the resource index of the ASCLIN specified. More...
float32 | IfxAsclin_getOvsFrequency (Ifx_ASCLIN *asclin)
Returns the OVS frequency. More...
float32 | IfxAsclin_getPdFrequency (Ifx_ASCLIN *asclin)
Returns the PD frequency. More...
float32 | IfxAsclin_getShiftFrequency (Ifx_ASCLIN *asclin)
Returns the SHIFT frequency. More...
volatile Ifx_SRC_SRCR * | IfxAsclin_getSrcPointerEr (Ifx_ASCLIN *asclin)
Returns the SRC pointer for ERR. More...
volatile Ifx_SRC_SRCR * | IfxAsclin_getSrcPointerRx (Ifx_ASCLIN *asclin)
Returns the SRC pointer for Rx. More...
volatile Ifx_SRC_SRCR * | IfxAsclin_getSrcPointerTx (Ifx_ASCLIN *asclin)
Returns the SRC pointer for Tx. More...
uint32 | IfxAsclin_read16 (Ifx_ASCLIN *asclin, uint16 *data, uint32 count)
Reads data up to 16 bits. More...
uint32 | IfxAsclin_read32 (Ifx_ASCLIN *asclin, uint32 *data, uint32 count)
Reads data up to 32 bits. More...
uint32 | IfxAsclin_read8 (Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
Reads data up to 8 bits. More...
void | IfxAsclin_resetModule (Ifx_ASCLIN *asclin)
resets Asclin kernel More...
void | IfxAsclin_setBaudrateBitFields (Ifx_ASCLIN *asclin, uint16 prescaler, uint16 numerator, uint16 denominator, IfxAsclin_OversamplingFactor oversampling)
Sets the baudrate bit fields. More...
boolean | IfxAsclin_setBitTiming (Ifx_ASCLIN *asclin, float32 baudrate, IfxAsclin_OversamplingFactor oversampling, IfxAsclin_SamplePointPosition samplepoint, IfxAsclin_SamplesPerBit medianFilter)
Set the bit timing. More...
void | IfxAsclin_setClockSource (Ifx_ASCLIN *asclin, IfxAsclin_ClockSource clockSource)
Sets the clock source. More...
uint32 | IfxAsclin_write16 (Ifx_ASCLIN *asclin, uint16 *data, uint32 count)
Writes data up to 16 bits. More...
uint32 | IfxAsclin_write32 (Ifx_ASCLIN *asclin, uint32 *data, uint32 count)
Writes data up to 32 bits. More...
uint32 | IfxAsclin_write8 (Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
Writes data up to 8 bits. More...

Detailed Description

ASCLIN basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxAsclin.c.


iLLD_TC38A: IfxAsclin_Asc.c File Reference

  • Asclin
  • Asc
Functions
IfxAsclin_Asc.c File Reference

ASCLIN ASC details. More...

#include "IfxAsclin_Asc.h"
#include "string.h"
Include dependency graph for IfxAsclin_Asc.c:

Go to the source code of this file.

Functions

uint8 | IfxAsclin_Asc_blockingRead (IfxAsclin_Asc *asclin)
Reads data from the Rx FIFO. More...
boolean | IfxAsclin_Asc_blockingWrite (IfxAsclin_Asc *asclin, uint8 data)
Writes data into the Tx FIFO. More...
boolean | IfxAsclin_Asc_canReadCount (IfxAsclin_Asc *asclin, Ifx_SizeT count, Ifx_TickTime timeout)
boolean | IfxAsclin_Asc_canWriteCount (IfxAsclin_Asc *asclin, Ifx_SizeT count, Ifx_TickTime timeout)
void | IfxAsclin_Asc_clearRx (IfxAsclin_Asc *asclin)
void | IfxAsclin_Asc_clearTx (IfxAsclin_Asc *asclin)
void | IfxAsclin_Asc_disableModule (IfxAsclin_Asc *asclin)
Disables the module. More...
boolean | IfxAsclin_Asc_flushTx (IfxAsclin_Asc *asclin, Ifx_TickTime timeout)
sint32 | IfxAsclin_Asc_getReadCount (IfxAsclin_Asc *asclin)
IfxStdIf_DPipe_ReadEvent | IfxAsclin_Asc_getReadEvent (IfxAsclin_Asc *asclin)
uint32 | IfxAsclin_Asc_getSendCount (IfxAsclin_Asc *asclin)
Ifx_TickTime | IfxAsclin_Asc_getTxTimeStamp (IfxAsclin_Asc *asclin)
sint32 | IfxAsclin_Asc_getWriteCount (IfxAsclin_Asc *asclin)
IfxStdIf_DPipe_WriteEvent | IfxAsclin_Asc_getWriteEvent (IfxAsclin_Asc *asclin)
IfxAsclin_Status | IfxAsclin_Asc_initModule (IfxAsclin_Asc *asclin, const IfxAsclin_Asc_Config *config)
Initialises the module. More...
void | IfxAsclin_Asc_initModuleConfig (IfxAsclin_Asc_Config *config, Ifx_ASCLIN *asclin)
Fills the config structure with default values. More...
void | IfxAsclin_Asc_initiateTransmission (IfxAsclin_Asc *asclin)
Initiate the data transmission. More...
void | IfxAsclin_Asc_isrError (IfxAsclin_Asc *asclin)
ISR error routine. More...
void | IfxAsclin_Asc_isrReceive (IfxAsclin_Asc *asclin)
ISR receive routine. More...
void | IfxAsclin_Asc_isrTransmit (IfxAsclin_Asc *asclin)
ISR transmit routine. More...
boolean | IfxAsclin_Asc_read (IfxAsclin_Asc *asclin, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
void | IfxAsclin_Asc_resetSendCount (IfxAsclin_Asc *asclin)
boolean | IfxAsclin_Asc_stdIfDPipeInit (IfxStdIf_DPipe *stdif, IfxAsclin_Asc *asclin)
Initialize the standard interface to the device driver. More...
boolean | IfxAsclin_Asc_write (IfxAsclin_Asc *asclin, const void *data, Ifx_SizeT *count, Ifx_TickTime timeout)

Detailed Description

ASCLIN ASC details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxAsclin_Asc.c.

Function Documentation

◆ IfxAsclin_Asc_initiateTransmission()

void IfxAsclin_Asc_initiateTransmission ( IfxAsclin_Asc * asclin )

Initiate the data transmission.

Parameters
asclin module handle
Returns
None

A coding example can be found in How to use the ASCLIN ASC Interface driver?

Definition at line 406 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_write().

◆ IfxAsclin_Asc_stdIfDPipeInit()

boolean IfxAsclin_Asc_stdIfDPipeInit | ( | IfxStdIf_DPipe * | stdif,
 |  | IfxAsclin_Asc * | asclin
 | ) |  |

Initialize the standard interface to the device driver.

Parameters
stdif | standard interface object, will be initialized by the function
asclin | device driver object used by the standard interface. must be initialised separately
Returns
TRUE on success, else FALSE

Definition at line 584 of file IfxAsclin_Asc.c.


iLLD_TC38A: IfxAsclin_cfg.c File Reference

  • _Impl
Variables
IfxAsclin_cfg.c File Reference

ASCLIN on-chip implementation data. More...

#include "IfxAsclin_cfg.h"
Include dependency graph for IfxAsclin_cfg.c:

Go to the source code of this file.

Variables

IFX_CONST IfxModule_IndexMap IfxAsclin_cfg_indexMap [IFXASCLIN_NUM_MODULES]

Detailed Description

ASCLIN on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxAsclin_cfg.c.

Variable Documentation

◆ IfxAsclin_cfg_indexMap

IFX_CONST IfxModule_IndexMap IfxAsclin_cfg_indexMap[IFXASCLIN_NUM_MODULES]
Initial value:
= {
{&MODULE_ASCLIN0, (uint32)IfxAsclin_Index_0 },
{&MODULE_ASCLIN1, (uint32)IfxAsclin_Index_1 },
{&MODULE_ASCLIN2, (uint32)IfxAsclin_Index_2 },
{&MODULE_ASCLIN3, (uint32)IfxAsclin_Index_3 },
{&MODULE_ASCLIN4, (uint32)IfxAsclin_Index_4 },
{&MODULE_ASCLIN5, (uint32)IfxAsclin_Index_5 },
{&MODULE_ASCLIN6, (uint32)IfxAsclin_Index_6 },
{&MODULE_ASCLIN7, (uint32)IfxAsclin_Index_7 },
{&MODULE_ASCLIN8, (uint32)IfxAsclin_Index_8 },
{&MODULE_ASCLIN9, (uint32)IfxAsclin_Index_9 },
{&MODULE_ASCLIN10, (uint32)IfxAsclin_Index_10},
{&MODULE_ASCLIN11, (uint32)IfxAsclin_Index_11},
{&MODULE_ASCLIN12, (uint32)IfxAsclin_Index_12},
{&MODULE_ASCLIN13, (uint32)IfxAsclin_Index_13},
{&MODULE_ASCLIN14, (uint32)IfxAsclin_Index_14},
{&MODULE_ASCLIN15, (uint32)IfxAsclin_Index_15},
{&MODULE_ASCLIN16, (uint32)IfxAsclin_Index_16},
{&MODULE_ASCLIN17, (uint32)IfxAsclin_Index_17},
{&MODULE_ASCLIN18, (uint32)IfxAsclin_Index_18},
{&MODULE_ASCLIN19, (uint32)IfxAsclin_Index_19},
{&MODULE_ASCLIN20, (uint32)IfxAsclin_Index_20},
{&MODULE_ASCLIN21, (uint32)IfxAsclin_Index_21},
{&MODULE_ASCLIN22, (uint32)IfxAsclin_Index_22},
{&MODULE_ASCLIN23, (uint32)IfxAsclin_Index_23}
}
IfxAsclin_Index_0
ASCLIN Index 0.
Definition: IfxAsclin_cfg.h:80
IfxAsclin_Index_20
ASCLIN Index 20.
Definition: IfxAsclin_cfg.h:100
IfxAsclin_Index_18
ASCLIN Index 18.
Definition: IfxAsclin_cfg.h:98
IfxAsclin_Index_13
ASCLIN Index 13.
Definition: IfxAsclin_cfg.h:93
IfxAsclin_Index_2
ASCLIN Index 2.
Definition: IfxAsclin_cfg.h:82
IfxAsclin_Index_21
ASCLIN Index 21.
Definition: IfxAsclin_cfg.h:101
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxAsclin_Index_19
ASCLIN Index 19.
Definition: IfxAsclin_cfg.h:99
IfxAsclin_Index_17
ASCLIN Index 17.
Definition: IfxAsclin_cfg.h:97
IfxAsclin_Index_14
ASCLIN Index 14.
Definition: IfxAsclin_cfg.h:94
IfxAsclin_Index_15
ASCLIN Index 15.
Definition: IfxAsclin_cfg.h:95
IfxAsclin_Index_3
ASCLIN Index 3.
Definition: IfxAsclin_cfg.h:83
IfxAsclin_Index_22
ASCLIN Index 22.
Definition: IfxAsclin_cfg.h:102
IfxAsclin_Index_10
ASCLIN Index 10.
Definition: IfxAsclin_cfg.h:90
IfxAsclin_Index_12
ASCLIN Index 12.
Definition: IfxAsclin_cfg.h:92
IfxAsclin_Index_4
ASCLIN Index 4.
Definition: IfxAsclin_cfg.h:84
IfxAsclin_Index_9
ASCLIN Index 9.
Definition: IfxAsclin_cfg.h:89
IfxAsclin_Index_11
ASCLIN Index 11.
Definition: IfxAsclin_cfg.h:91
IfxAsclin_Index_6
ASCLIN Index 6.
Definition: IfxAsclin_cfg.h:86
IfxAsclin_Index_5
ASCLIN Index 5.
Definition: IfxAsclin_cfg.h:85
IfxAsclin_Index_1
ASCLIN Index 1.
Definition: IfxAsclin_cfg.h:81
IfxAsclin_Index_23
ASCLIN Index 23.
Definition: IfxAsclin_cfg.h:103
IfxAsclin_Index_8
ASCLIN Index 8.
Definition: IfxAsclin_cfg.h:88
IfxAsclin_Index_16
ASCLIN Index 16.
Definition: IfxAsclin_cfg.h:96
IfxAsclin_Index_7
ASCLIN Index 7.
Definition: IfxAsclin_cfg.h:87

Definition at line 54 of file IfxAsclin_cfg.c.

Referenced by IfxAsclin_getAddress(), and IfxAsclin_getIndex().


iLLD_TC38A: IfxAsclin_Lin.c File Reference

  • Asclin
  • Lin
Functions
IfxAsclin_Lin.c File Reference

ASCLIN LIN details. More...

#include "IfxAsclin_Lin.h"
Include dependency graph for IfxAsclin_Lin.c:

Go to the source code of this file.

Functions

void | IfxAsclin_Lin_checkForReceivedHeaderFlags (IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for received header More...
void | IfxAsclin_Lin_checkForReceivedResponseFlags (IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for received response More...
void | IfxAsclin_Lin_checkForTransmittedHeaderFlags (IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for transmitted header More...
void | IfxAsclin_Lin_checkForTransmittedResponseFlags (IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for transmitted response More...
void | IfxAsclin_Lin_clearFlagsStatus (IfxAsclin_Lin *asclin)
clears the flags status structures More...
void | IfxAsclin_Lin_disableModule (IfxAsclin_Lin *asclin)
Disables the module. More...
void | IfxAsclin_Lin_ignoreHeader (IfxAsclin_Lin *asclin)
Ignores the latest header. More...
IfxAsclin_Status | IfxAsclin_Lin_initModule (IfxAsclin_Lin *asclin, const IfxAsclin_Lin_Config *config)
Initialises the module. More...
void | IfxAsclin_Lin_initModuleConfig (IfxAsclin_Lin_Config *config, Ifx_ASCLIN *asclin)
Fills the config structure with default values. More...
void | IfxAsclin_Lin_receiveHeader (IfxAsclin_Lin *asclin, uint8 *id)
Receives the header. More...
void | IfxAsclin_Lin_receiveResponse (IfxAsclin_Lin *asclin, uint8 *data, uint32 length)
Receives the response. More...
void | IfxAsclin_Lin_sendHeader (IfxAsclin_Lin *asclin, uint8 *id)
Sends the header. More...
void | IfxAsclin_Lin_sendResponse (IfxAsclin_Lin *asclin, uint8 *data, uint32 length)
sends the response More...
boolean | IfxAsclin_Lin_waitForReceivedHeader (IfxAsclin_Lin *asclin)
waits until receive header end acknowledgemnet or an error has been detected More...
boolean | IfxAsclin_Lin_waitForReceivedResponse (IfxAsclin_Lin *asclin)
waits until receive response end acknowledgemnet or an error has been detected More...
boolean | IfxAsclin_Lin_waitForTransmittedHeader (IfxAsclin_Lin *asclin)
waits until transmit header end acknowledgemnet or an error has been detected More...
boolean | IfxAsclin_Lin_waitForTransmittedResponse (IfxAsclin_Lin *asclin)
waits until transmit response end acknowledgemnet or an error has been detected More...
void | IfxAsclin_Lin_isrError (IfxAsclin_Lin *asclin)
ISR error routine. More...
void | IfxAsclin_Lin_isrReceive (IfxAsclin_Lin *asclin)
ISR receive routine. More...
void | IfxAsclin_Lin_isrTransmit (IfxAsclin_Lin *asclin)
ISR transmit routine. More...
void | IfxAsclin_Lin_sendFrame (IfxAsclin_Lin *asclin, IfxAsclin_Lin_PduType *pduptr)
This API must be used in interrupt mode. It can be used to 1.Send Header 2.Send both Header and Response 3.Send Header and Receive Response. More...

Detailed Description

ASCLIN LIN details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxAsclin_Lin.c.


iLLD_TC38A: IfxAsclin_Spi.c File Reference

  • Asclin
  • Spi
Functions
IfxAsclin_Spi.c File Reference

ASCLIN SPI details. More...

#include "IfxAsclin_Spi.h"
Include dependency graph for IfxAsclin_Spi.c:

Go to the source code of this file.

Functions

IFX_STATIC IfxAsclin_Spi_Status | IfxAsclin_Spi_lock (IfxAsclin_Spi *asclin)
IFX_STATIC void | IfxAsclin_Spi_unlock (IfxAsclin_Spi *asclin)
void | IfxAsclin_Spi_disableModule (IfxAsclin_Spi *asclin)
Disables the module. More...
IfxAsclin_Spi_Status | IfxAsclin_Spi_exchange (IfxAsclin_Spi *asclin, void *src, void *dest, uint32 count)
starts the data exchange More...
IfxAsclin_Spi_Status | IfxAsclin_Spi_getStatus (IfxAsclin_Spi *asclin)
IfxAsclin_Status | IfxAsclin_Spi_initModule (IfxAsclin_Spi *asclin, const IfxAsclin_Spi_Config *config)
Initialises the module. More...
void | IfxAsclin_Spi_initModuleConfig (IfxAsclin_Spi_Config *config, Ifx_ASCLIN *asclin)
Fills the configuration structure with default values. More...
void | IfxAsclin_Spi_isrError (IfxAsclin_Spi *asclin)
ISR error routine. More...
void | IfxAsclin_Spi_isrReceive (IfxAsclin_Spi *asclin)
ISR receive routine. More...
void | IfxAsclin_Spi_isrTransmit (IfxAsclin_Spi *asclin)
ISR transmit routine. More...
void | IfxAsclin_Spi_read (IfxAsclin_Spi *asclin)
Reads data from the Rx FIFO based on the outlet width. More...
void | IfxAsclin_Spi_write (IfxAsclin_Spi *asclin)
Writes data into the Tx FIFO based on the inlet width. More...

Detailed Description

ASCLIN SPI details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxAsclin_Spi.c.

Function Documentation

◆ IfxAsclin_Spi_getStatus()

IfxAsclin_Spi_Status IfxAsclin_Spi_getStatus ( IfxAsclin_Spi * asclin )
Parameters
asclin module handle
Returns
status of the on going job

Definition at line 99 of file IfxAsclin_Spi.c.

◆ IfxAsclin_Spi_lock()

IFX_STATIC IfxAsclin_Spi_Status IfxAsclin_Spi_lock ( IfxAsclin_Spi * asclin )
Parameters
asclin module handle
Returns
status of the on going job

Definition at line 374 of file IfxAsclin_Spi.c.

Referenced by IfxAsclin_Spi_exchange().

◆ IfxAsclin_Spi_unlock()

IFX_STATIC void IfxAsclin_Spi_unlock ( IfxAsclin_Spi * asclin )
Parameters
asclin module handle
Returns
None

Definition at line 426 of file IfxAsclin_Spi.c.

Referenced by IfxAsclin_Spi_read().


iLLD_TC38A: IfxCan.c File Reference

  • Can
  • Std
Functions
IfxCan.c File Reference

CAN basic functionality. More...

#include "IfxCan.h"
#include "IfxCan_bf.h"
Include dependency graph for IfxCan.c:

Go to the source code of this file.

Functions

void | IfxCan_Node_clearRxBufferNewDataFlag (Ifx_CAN_N *node, IfxCan_RxBufferId rxBufferId)
Clears the New Data flag of the selected Rx buffer. More...
uint32 | IfxCan_Node_getDataLength (IfxCan_DataLengthCode dataLengthCode)
Converts data length code (DLC) into number of words. More...
uint32 | IfxCan_Node_getDataLengthFromCode (Ifx_CAN_N *node, IfxCan_DataLengthCode dataLengthCode)
Converts data length code (DLC) into number of data words. This function is deprecated. Use new function IfxCan_Node_getDataLength. More...
Ifx_CAN_EXTMSG * | IfxCan_Node_getExtendedFilterElementAddress (uint32 ramBaseAddress, uint16 extendedFilterListStartAddress, uint8 filterNumber)
Returns the address of selected extended filter element. More...
IfxCan_FrameMode | IfxCan_Node_getFrameMode (Ifx_CAN_RXMSG *rxBufferElement)
Returns CAN frame mode of operation for a received frame. More...
IfxCan_FrameMode | IfxCan_Node_getFrameModeFromTxEventFifo (Ifx_CAN_TXEVENT *txEventFifoElement)
Returns CAN frame mode of operation for a Tx Event Fifo Element. More...
uint8 | IfxCan_Node_getRxBufferDataFieldSize (Ifx_CAN_N *node)
Returns Rx Buffer Data Field Size in bytes. More...
Ifx_CAN_RXMSG * | IfxCan_Node_getRxBufferElementAddress (Ifx_CAN_N *node, uint32 ramBaseAddress, uint16 rxBuffersStartAddress, IfxCan_RxBufferId rxBufferNumber)
Returns the address of selected Rx buffer element. More...
uint8 | IfxCan_Node_getRxFifo0DataFieldSize (Ifx_CAN_N *node)
Returns Rx FIFO 0 Data Field Size in bytes. More...
Ifx_CAN_RXMSG * | IfxCan_Node_getRxFifo0ElementAddress (Ifx_CAN_N *node, uint32 ramBaseAddress, uint16 rxFifo0StartAddress, IfxCan_RxBufferId rxBufferNumber)
Returns the address of selected Rx FIFO 0 element. More...
uint8 | IfxCan_Node_getRxFifo1DataFieldSize (Ifx_CAN_N *node)
Returns Rx FIFO 1 Data Field Size in bytes. More...
Ifx_CAN_RXMSG * | IfxCan_Node_getRxFifo1ElementAddress (Ifx_CAN_N *node, uint32 ramBaseAddress, uint16 rxFifo1StartAddress, IfxCan_RxBufferId rxBufferNumber)
Returns the address of selected Rx FIFO 1 element. More...
Ifx_CAN_STDMSG * | IfxCan_Node_getStandardFilterElementAddress (uint32 ramBaseAddress, uint16 standardFilterListStartAddress, uint8 filterNumber)
Returns the address of selected standard filter element. More...
uint8 | IfxCan_Node_getTxBufferDataFieldSize (Ifx_CAN_N *node)
Returns Tx Buffer Data Field Size in bytes. More...
Ifx_CAN_TXMSG * | IfxCan_Node_getTxBufferElementAddress (Ifx_CAN_N *node, uint32 ramBaseAddress, uint16 txBuffersStartAddress, IfxCan_TxBufferId txBufferNumber)
Returns the address of selected Tx buffer element. More...
Ifx_CAN_TXEVENT * | IfxCan_Node_getTxEventFifoElementAddress (uint32 ramBaseAddress, uint16 txEventFifoStartAddress, uint8 txEventFifoNumber)
Returns the address of selected Tx Event Fifo element. More...
boolean | IfxCan_Node_initRxPin (Ifx_CAN_N *node, IfxCan_Rxd_In *rxd, IfxPort_InputMode mode, IfxPort_PadDriver padDriver)
Select and initialise the CAN node receive pin. More...
boolean | IfxCan_Node_initTxPin (IfxCan_Txd_Out *txd, IfxPort_OutputMode mode, IfxPort_PadDriver padDriver)
Select and initialise the CAN node transmit pin. More...
boolean | IfxCan_Node_isRxBufferNewDataUpdated (Ifx_CAN_N *node, IfxCan_RxBufferId rxBufferId)
Returns the status of whether the selcted Rx buffer has been updated from new data. More...
void | IfxCan_Node_readData (Ifx_CAN_RXMSG *rxBufferElement, IfxCan_DataLengthCode dataLengthCode, uint32 *data)
Reads data from Rx buffer element. More...
void | IfxCan_Node_setBitTiming (Ifx_CAN_N *node, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 syncJumpWidth)
Calculates and Sets the CAN baudrate for standard frames and arbitration phase of CAND FD frames. More...
void | IfxCan_Node_setBitTimingValues (Ifx_CAN_N *node, uint16 syncJumpWidth, uint8 timeSegment2, uint8 timeSegment1, uint16 prescaler)
Sets the values of CAN baudrate for standard frames. More...
void | IfxCan_Node_setFastBitTiming (Ifx_CAN_N *node, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 syncJumpWidth)
Calulates and Sets the CAN fast baudrate for CAN FD frames data phase. More...
void | IfxCan_Node_setFastBitTimingValues (Ifx_CAN_N *node, uint16 syncJumpWidth, uint8 timeSegment2, uint8 timeSegment1, uint16 prescaler)
Sets the values of CAN fast baudrate for CAN FD frames data phase. More...
void | IfxCan_Node_setFrameMode (Ifx_CAN_N *node, IfxCan_FrameMode frameMode)
Enables the CAN frame mode for transmission. More...
void | IfxCan_Node_setFrameModeReq (Ifx_CAN_TXMSG *txBufferElement, IfxCan_FrameMode frameMode)
Sets CAN frame mode request for transmission. More...
void | IfxCan_Node_setFrameModeRequest (Ifx_CAN_N *node, Ifx_CAN_TXMSG *txBufferElement, IfxCan_FrameMode frameMode)
Sets CAN frame mode request for transmission. This function is deprecated. Use new function IfxCan_Node_setFrameModeReq. More...
void | IfxCan_Node_setGroupInterruptLine (Ifx_CAN_N *node, IfxCan_InterruptGroup interruptGroup, IfxCan_InterruptLine interruptLine)
Sets the slected interrupt to the selcted interrupt line. More...
void | IfxCan_Node_setInterruptLine (Ifx_CAN_N *node, IfxCan_Interrupt interrupt, IfxCan_InterruptLine interruptLine)
Sets the slected interrupt to the selcted interrupt line. More...
void | IfxCan_Node_writeTxBufData (Ifx_CAN_TXMSG *txBufferElement, IfxCan_DataLengthCode dataLengthCode, uint32 *data)
Writes Data into Tx buffer element Node_writeTxBufData. More...
void | IfxCan_Node_writeData (Ifx_CAN_N *node, Ifx_CAN_TXMSG *txBufferElement, IfxCan_DataLengthCode dataLengthCode, uint32 *data)
Writes Data into Tx buffer element. This function is deprecated. Use new function IfxCan_Node_writeTxBufData. More...
void | IfxCan_disableModule (Ifx_CAN *can)
Disables the module (sets the disable request) More...
void | IfxCan_enableModule (Ifx_CAN *can)
Enables the module (clears the disable request) More...
Ifx_CAN * | IfxCan_getAddress (IfxCan_Index can)
IfxCan_Index | IfxCan_getIndex (Ifx_CAN *can)
API to get the resource index of the CAN specified. More...
float32 | IfxCan_getModuleFrequency (void)
Returns the operatinf frequency of the CAN module. More...
volatile Ifx_SRC_SRCR * | IfxCan_getSrcPointer (Ifx_CAN *can, IfxCan_InterruptLine interruptLine)
Returns the address of interrupt node source register. More...
void | IfxCan_resetModule (Ifx_CAN *can)
resets CAN kernel More...
void | IfxCan_setClockSource (Ifx_CAN *can, IfxCan_ClockSelect clockSelect, IfxCan_ClockSource clockSource)
sets the clocksource selection More...
uint32 | IfxCan_Node_getDataLengthInBytes (IfxCan_DataLengthCode dataLengthCode)
Converts data length code (DLC) into number of bytes. More...

Detailed Description

CAN basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCan.c.

Function Documentation

◆ IfxCan_getSrcPointer()

volatile Ifx_SRC_SRCR* IfxCan_getSrcPointer | ( | Ifx_CAN * | can,
 |  | IfxCan_InterruptLine | interruptLine
 | ) |  |

Returns the address of interrupt node source register.

Parameters
can | Specifies the pointer to the CAN registers
interruptLine | Interrupt line number
Returns
Address of interrupt node source register

Definition at line 969 of file IfxCan.c.

Referenced by IfxCan_Can_initNode().


iLLD_TC38A: IfxCan_Can.c File Reference

  • Can
  • Can
Functions
IfxCan_Can.c File Reference

CAN CAN details. More...

#include "IfxCan_Can.h"
Include dependency graph for IfxCan_Can.c:

Go to the source code of this file.

Functions

void | IfxCan_Can_initMessage (IfxCan_Message *message)
Initialises the message frame with defualt values. More...
void | IfxCan_Can_initModule (IfxCan_Can *can, IfxCan_Can_Config *config)
Initialises the CAN Module. More...
void | IfxCan_Can_initModuleConfig (IfxCan_Can_Config *config, Ifx_CAN *can)
Fills the configuration stucture of the CAN Module with default values. More...
boolean | IfxCan_Can_initNode (IfxCan_Can_Node *node, const IfxCan_Can_NodeConfig *config)
Initialises the CAN Node. More...
void | IfxCan_Can_initNodeConfig (IfxCan_Can_NodeConfig *config, IfxCan_Can *can)
Fills the configuration stucture of the Node with default values. More...
void | IfxCan_Can_readMessage (IfxCan_Can_Node *node, IfxCan_Message *message, uint32 *data)
Reads the CAN received message. More...
IfxCan_Status | IfxCan_Can_sendMessage (IfxCan_Can_Node *node, IfxCan_Message *message, uint32 *data)
Transmits the CAN message. More...
void | IfxCan_Can_setExtendedFilter (IfxCan_Can_Node *node, IfxCan_Filter *filter)
Sets the Extended Filter element configuration. More...
void | IfxCan_Can_setStandardFilter (IfxCan_Can_Node *node, IfxCan_Filter *filter)
Sets the Standard Filter element configuration. More...

Detailed Description

CAN CAN details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCan_Can.c.


iLLD_TC38A: IfxCan_cfg.c File Reference

  • _Impl
Variables
IfxCan_cfg.c File Reference

CAN on-chip implementation data. More...

#include "IfxCan_cfg.h"
Include dependency graph for IfxCan_cfg.c:

Go to the source code of this file.

Variables

IFX_CONST IfxModule_IndexMap IfxCan_cfg_indexMap [IFXCAN_NUM_MODULES]

Detailed Description

CAN on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCan_cfg.c.

Variable Documentation

◆ IfxCan_cfg_indexMap

IFX_CONST IfxModule_IndexMap IfxCan_cfg_indexMap[IFXCAN_NUM_MODULES]
Initial value:
= {
{&MODULE_CAN0, (uint32)IfxCan_Index_0},
{&MODULE_CAN1, (uint32)IfxCan_Index_1},
{&MODULE_CAN2, (uint32)IfxCan_Index_2}
}
IfxCan_Index_2
CAN index 2.
Definition: IfxCan_cfg.h:88
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxCan_Index_0
CAN index 0.
Definition: IfxCan_cfg.h:86
IfxCan_Index_1
CAN index 1.
Definition: IfxCan_cfg.h:87

Definition at line 52 of file IfxCan_cfg.c.

Referenced by IfxCan_getAddress(), and IfxCan_getIndex().


iLLD_TC38A: IfxCcu6.c File Reference

  • Ccu6
  • Std
Functions
IfxCcu6.c File Reference

CCU6 basic functionality. More...

#include "IfxCcu6.h"
Include dependency graph for IfxCcu6.c:

Go to the source code of this file.

Functions

void | IfxCcu6_connectTrigger (Ifx_CCU6 *ccu6, IfxCcu6_TrigOut outputLine, IfxCcu6_TrigSel selectedTrigger)
void | IfxCcu6_disableModulationOutput (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut)
Disables the modulation of the corresponding output signal by PWM pattern generated by the timers T12 and T13. More...
void | IfxCcu6_disableModule (Ifx_CCU6 *ccu6)
Disables the selected CCU6 kernel. More...
void | IfxCcu6_enableModulationOutput (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut)
Enables the modulation of the corresponding output signal by PWM pattern generated by the timers T12 and T13. More...
void | IfxCcu6_enableModule (Ifx_CCU6 *ccu6)
Enables the selected CCU6 kernel. More...
Ifx_CCU6 * | IfxCcu6_getAddress (IfxCcu6_Index ccu6)
Returns the module index of the selected CCU6 module. More...
uint32 | IfxCcu6_getCaptureRegisterValue (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the capture register value of the selected channel. More...
uint32 | IfxCcu6_getCaptureShadowRegisterValue (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the capture shadow register value of the selected channel. More...
IfxCcu6_Index | IfxCcu6_getIndex (Ifx_CCU6 *ccu6)
Returns CCU6 index. More...
volatile Ifx_SRC_SRCR * | IfxCcu6_getSrcAddress (Ifx_CCU6 *ccu6, IfxCcu6_ServiceRequest serviceRequest)
Returns the service request register. More...
uint32 | IfxCcu6_readTimer (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Returns the current value of the timer register. More...
void | IfxCcu6_resetModule (Ifx_CCU6 *ccu6)
void | IfxCcu6_routeInterruptNode (Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source, IfxCcu6_ServiceRequest serviceRequest)
Routes the interrupt node pointer to the selected service requests. More...
void | IfxCcu6_setOutputPassiveLevel (Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut, boolean state)
Sets the passive state level of the PWM outputs of the module. More...
void | IfxCcu6_setT12CaptureCompareState (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, IfxCcu6_CaptureCompareState state)
Sets software-control (independent set and clear conditions) for the Timer12 channel state bits CC6xST (x=0,1,2) More...
void | IfxCcu6_setT12CompareValue (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, uint16 value)
Sets the 16-bit compare value of Timer12 (writes into shadow registers) More...
float32 | IfxCcu6_setT12Frequency (Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period, IfxCcu6_T12CountMode countMode)
Sets the frequency and clock input of the Timer 12. Caution: If desired frequency cannot achieved (by successive divisions by 2) : Then the nearest frequency value is set ( >= desired value) The resulting frequency is captured in the handler element : CaptureFrequency. More...
void | IfxCcu6_setT12InputSignal (Ifx_CCU6 *ccu6, IfxCcu6_T12hr_In *extInput)
selects the actual input signal for the timer inputs. More...
void | IfxCcu6_setT13CaptureCompareState (Ifx_CCU6 *ccu6, IfxCcu6_CaptureCompareState state)
Sets software-control (independent set and clear conditions) for the Timer13 channel state bits CC63ST. More...
float32 | IfxCcu6_setT13Frequency (Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period)
Sets the frequency and clock input of the Timer 13 Caution: If desired frequency cannot achieved (by successive divisions by 2) : Then the nearest frequency value is set ( >= desired value) The resulting frequency is captured in the handler element : captureFrequency. More...
void | IfxCcu6_setT13InputSignal (Ifx_CCU6 *ccu6, IfxCcu6_T13hr_In *extInput)
selects the actual input signal for the timer inputs. More...

Detailed Description

CCU6 basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCcu6.c.

Function Documentation

◆ IfxCcu6_resetModule()

void IfxCcu6_resetModule ( Ifx_CCU6 * ccu6 )
Parameters
ccu6 pointer to ccu6 registers
Returns
None

Definition at line 235 of file IfxCcu6.c.


iLLD_TC38A: IfxCcu6_cfg.c File Reference

  • _Impl
Macros | Variables
IfxCcu6_cfg.c File Reference

CCU6 on-chip implementation data. More...

#include "IfxCcu6_cfg.h"
Include dependency graph for IfxCcu6_cfg.c:

Go to the source code of this file.

Macros

#define IFXCCU6_EMPTY_OUTPUT_SLOT (0, 0, IfxPort_OutputIdx_alt7)

Variables

IFX_CONST IfxModule_IndexMap IfxCcu6_cfg_indexMap [IFXCCU6_NUM_MODULES]

Detailed Description

CCU6 on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCcu6_cfg.c.

Macro Definition Documentation

◆ IFXCCU6_EMPTY_OUTPUT_SLOT

#define IFXCCU6_EMPTY_OUTPUT_SLOT (0, 0, IfxPort_OutputIdx_alt7)

Definition at line 52 of file IfxCcu6_cfg.c.

Variable Documentation

◆ IfxCcu6_cfg_indexMap

IFX_CONST IfxModule_IndexMap IfxCcu6_cfg_indexMap[IFXCCU6_NUM_MODULES]
Initial value:
= {
{&MODULE_CCU60, IfxCcu6_Index_0},
{&MODULE_CCU61, IfxCcu6_Index_1}
}
IfxCcu6_Index_1
CCU6 index 1.
Definition: IfxCcu6_cfg.h:84
IfxCcu6_Index_0
CCU6 index 0.
Definition: IfxCcu6_cfg.h:83

Definition at line 58 of file IfxCcu6_cfg.c.

Referenced by IfxCcu6_getAddress(), and IfxCcu6_getIndex().


iLLD_TC38A: IfxCcu6_Icu.c File Reference

  • Ccu6
  • Icu
Functions
IfxCcu6_Icu.c File Reference

CCU6 ICU details. More...

#include "IfxCcu6_Icu.h"
Include dependency graph for IfxCcu6_Icu.c:

Go to the source code of this file.

Functions

uint32 | IfxCcu6_Icu_getTimeStamp (IfxCcu6_Icu_Channel *channel)
Returns the cuurent value stored in the Compare Shadow register (current time stamp) More...
void | IfxCcu6_Icu_initChannel (IfxCcu6_Icu_Channel *channel, const IfxCcu6_Icu_ChannelConfig *channelConfig)
Initialises the channel. More...
void | IfxCcu6_Icu_initChannelConfig (IfxCcu6_Icu_ChannelConfig *channelConfig, Ifx_CCU6 *ccu6)
Fills the channel config structure with default values. More...
void | IfxCcu6_Icu_initModule (IfxCcu6_Icu *icu, const IfxCcu6_Icu_Config *config)
Initialises the module with default configuration. More...
void | IfxCcu6_Icu_initModuleConfig (IfxCcu6_Icu_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values. More...
void | IfxCcu6_Icu_startCapture (IfxCcu6_Icu_Channel *channel)
Starts the input capture. More...
void | IfxCcu6_Icu_stopCapture (IfxCcu6_Icu_Channel *channel)
Stops the input capture. More...

Detailed Description

CCU6 ICU details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCcu6_Icu.c.


iLLD_TC38A: IfxCcu6_PwmBc.c File Reference

  • Ccu6
  • PwmBc
Functions
IfxCcu6_PwmBc.c File Reference

CCU6 PWMBC details. More...

#include "IfxCcu6_PwmBc.h"
Include dependency graph for IfxCcu6_PwmBc.c:

Go to the source code of this file.

Functions

uint32 | IfxCcu6_PwmBc_getMotorSpeed (IfxCcu6_PwmBc *pwmBc)
returns the current motor speed More...
void | IfxCcu6_PwmBc_initModule (IfxCcu6_PwmBc *pwmBc, const IfxCcu6_PwmBc_Config *config)
Initialises the module with default configuration. More...
void | IfxCcu6_PwmBc_initModuleConfig (IfxCcu6_PwmBc_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values. More...
void | IfxCcu6_PwmBc_start (IfxCcu6_PwmBc *pwmBc)
Starts the Hall sensored based PWM. More...
void | IfxCcu6_PwmBc_stop (IfxCcu6_PwmBc *pwmBc)
Stops the Hall sensored based PWM. More...
void | IfxCcu6_PwmBc_updateHallPattern (IfxCcu6_PwmBc *pwmBc, uint8 controlTable[6][3])
Updates the Hall pattern. More...

Detailed Description

CCU6 PWMBC details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCcu6_PwmBc.c.


iLLD_TC38A: IfxCcu6_PwmHl.c File Reference

  • Ccu6
  • PwmHl
Functions | Variables
IfxCcu6_PwmHl.c File Reference

CCU6 PWMHL details. More...

#include "IfxCcu6_PwmHl.h"
#include "_Utilities/Ifx_Assert.h"
#include "stddef.h"
#include "string.h"
Include dependency graph for IfxCcu6_PwmHl.c:

Go to the source code of this file.

Functions

IFX_STATIC void | IfxCcu6_PwmHl_disable (IfxCcu6_PwmHl *driver)
Turn-off the complementary PWM generation mode. More...
IFX_STATIC void | IfxCcu6_PwmHl_enable (IfxCcu6_PwmHl *driver)
Turn-on the complementary PWM generation mode. More...
IFX_STATIC void | IfxCcu6_PwmHl_setOutputPins (Ifx_CCU6 *module, const IfxCcu6_PwmHl_Config *config)
Sets up the output pins. More...
IFX_STATIC void | IfxCcu6_PwmHl_updateCenterAligned (IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in center aligned and center aligned inverted modes. More...
IFX_STATIC void | IfxCcu6_PwmHl_updateEdgeAligned (IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in edge aligned modes (left and right aligned) More...
IFX_STATIC void | IfxCcu6_PwmHl_updateOff (IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Set the outputs to inactive. More...
float32 | IfxCcu6_PwmHl_getDeadtime (IfxCcu6_PwmHl *driver)
Returns the dead time. More...
float32 | IfxCcu6_PwmHl_getMinPulse (IfxCcu6_PwmHl *driver)
Returns the minimum pulse. More...
Ifx_Pwm_Mode | IfxCcu6_PwmHl_getMode (IfxCcu6_PwmHl *driver)
Returns Pwm mode. More...
boolean | IfxCcu6_PwmHl_init (IfxCcu6_PwmHl *driver, const IfxCcu6_PwmHl_Config *config)
Initializes the timer object. More...
void | IfxCcu6_PwmHl_initConfig (IfxCcu6_PwmHl_Config *config)
Initialize the configuration structure to default. More...
boolean | IfxCcu6_PwmHl_setDeadtime (IfxCcu6_PwmHl *driver, float32 deadtime)
Sets the dead time. More...
boolean | IfxCcu6_PwmHl_setMinPulse (IfxCcu6_PwmHl *driver, float32 minPulse)
Sets the minimum pulse. More...
boolean | IfxCcu6_PwmHl_setMode (IfxCcu6_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate() More...
void | IfxCcu6_PwmHl_setOnTime (IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Sets the ON time Assign the ON time to the TOP channels. The ON time of the BOTTOM channels are complementary. More...
void | IfxCcu6_PwmHl_setupChannels (IfxCcu6_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set channels which are generating PWM or in "stuck-at" state. More...
boolean | IfxCcu6_PwmHl_stdIfPwmHlInit (IfxStdIf_PwmHl *stdif, IfxCcu6_PwmHl *driver)
Initialises the statndard interface Pwm. More...

Variables

IFX_STATIC IFX_CONST IfxCcu6_PwmHl_Mode IfxCcu6_PwmHl_modes [Ifx_Pwm_Mode_off+1]

Detailed Description

CCU6 PWMHL details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCcu6_PwmHl.c.

Variable Documentation

◆ IfxCcu6_PwmHl_modes

IFX_STATIC IFX_CONST IfxCcu6_PwmHl_Mode IfxCcu6_PwmHl_modes[Ifx_Pwm_Mode_off+1]
Initial value:
= {
{Ifx_Pwm_Mode_centerAligned, FALSE, &IfxCcu6_PwmHl_updateCenterAligned},
{Ifx_Pwm_Mode_centerAlignedInverted, TRUE, &IfxCcu6_PwmHl_updateCenterAligned},
{Ifx_Pwm_Mode_leftAligned, FALSE, &IfxCcu6_PwmHl_updateEdgeAligned },
{Ifx_Pwm_Mode_rightAligned, TRUE, &IfxCcu6_PwmHl_updateEdgeAligned },
{Ifx_Pwm_Mode_off, FALSE, &IfxCcu6_PwmHl_updateOff }
}
IfxCcu6_PwmHl_updateOff
IFX_STATIC void IfxCcu6_PwmHl_updateOff(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Set the outputs to inactive.
Definition: IfxCcu6_PwmHl.c:512
Ifx_Pwm_Mode_centerAligned
Center aligned mode.
Definition: Ifx_Types.h:177
IfxCcu6_PwmHl_updateEdgeAligned
IFX_STATIC void IfxCcu6_PwmHl_updateEdgeAligned(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in edge aligned modes (left and right aligned)
Definition: IfxCcu6_PwmHl.c:506
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxCcu6_PwmHl_updateCenterAligned
IFX_STATIC void IfxCcu6_PwmHl_updateCenterAligned(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in center aligned and center aligned inverted modes.
Definition: IfxCcu6_PwmHl.c:500
Ifx_Pwm_Mode_leftAligned
Left aligned mode. The PWM period starts with a rising edge.
Definition: Ifx_Types.h:179
Ifx_Pwm_Mode_off
All switch open.
Definition: Ifx_Types.h:181
Ifx_Pwm_Mode_centerAlignedInverted
Center aligned inverted aligned mode.
Definition: Ifx_Types.h:178
Ifx_Pwm_Mode_rightAligned
Right aligned mode. The PWM period starts with a falling edge.
Definition: Ifx_Types.h:180
TRUE
#define TRUE
Definition: Platform_Types.h:90

Definition at line 114 of file IfxCcu6_PwmHl.c.

Referenced by IfxCcu6_PwmHl_setMode().


iLLD_TC38A: IfxCcu6_Timer.c File Reference

  • Ccu6
  • Timer
Functions
IfxCcu6_Timer.c File Reference

CCU6 TIMER details. More...

#include "IfxCcu6_Timer.h"
Include dependency graph for IfxCcu6_Timer.c:

Go to the source code of this file.

Functions

void | IfxCcu6_Timer_countOneStep (IfxCcu6_Timer *timer)
Counts the timer one step. More...
void | IfxCcu6_Timer_initModule (IfxCcu6_Timer *timer, const IfxCcu6_Timer_Config *config)
Initialises the module with default configuration. More...
void | IfxCcu6_Timer_initModuleConfig (IfxCcu6_Timer_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values. More...
void | IfxCcu6_Timer_start (IfxCcu6_Timer *timer)
Starts the timer. More...
void | IfxCcu6_Timer_startSingleShotMode (IfxCcu6_Timer *timer)
Starts the single shot mode of the timer. More...
void | IfxCcu6_Timer_stop (IfxCcu6_Timer *timer)
Stops the timer. More...
void | IfxCcu6_Timer_synchronousStart (IfxCcu6_Timer *timer)
Starts both the timers together. More...
void | IfxCcu6_Timer_synchronousStop (IfxCcu6_Timer *timer)
Starts both the timers together. More...

Detailed Description

CCU6 TIMER details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCcu6_Timer.c.


iLLD_TC38A: IfxCcu6_TimerWithTrigger.c File Reference

  • Ccu6
  • TimerWithTrigger
Functions
IfxCcu6_TimerWithTrigger.c File Reference

CCU6 TIMERWITHTRIGGER details. More...

#include "IfxCcu6_TimerWithTrigger.h"
#include "_Utilities/Ifx_Assert.h"
#include "stddef.h"
#include "string.h"
Include dependency graph for IfxCcu6_TimerWithTrigger.c:

Go to the source code of this file.

Functions

boolean | IfxCcu6_TimerWithTrigger_acknowledgeTimerIrq (IfxCcu6_TimerWithTrigger *driver)
Returns the timer event. More...
boolean | IfxCcu6_TimerWithTrigger_acknowledgeTriggerIrq (IfxCcu6_TimerWithTrigger *driver)
Returns the trigger event. More...
void | IfxCcu6_TimerWithTrigger_applyUpdate (IfxCcu6_TimerWithTrigger *driver)
Enable the transfer of the shadow registers. More...
void | IfxCcu6_TimerWithTrigger_disableUpdate (IfxCcu6_TimerWithTrigger *driver)
Disables the upadte
This function is has an empty body as the updated is disabled automatically after the shadow transfer. More...
float32 | IfxCcu6_TimerWithTrigger_getFrequency (IfxCcu6_TimerWithTrigger *driver)
Returns the frequency. More...
float32 | IfxCcu6_TimerWithTrigger_getInputFrequency (IfxCcu6_TimerWithTrigger *driver)
Returns the Input frequncy. More...
Ifx_TimerValue | IfxCcu6_TimerWithTrigger_getPeriod (IfxCcu6_TimerWithTrigger *driver)
Returns the period of the timer. More...
volatile uint32 * | IfxCcu6_TimerWithTrigger_getPointer (IfxCcu6_TimerWithTrigger *driver)
Returns the pointer to timer channel. More...
float32 | IfxCcu6_TimerWithTrigger_getResolution (IfxCcu6_TimerWithTrigger *driver)
Returns the resolution. More...
boolean | IfxCcu6_TimerWithTrigger_init (IfxCcu6_TimerWithTrigger *driver, IfxCcu6_TimerWithTrigger_Config *config)
Initialises the timer object
T12 is configured as timer, T13 is optionally configured as trigger
T12CLK, T12PRE and T12PR are chosen to achieve maximum PWM resolution
Note: To achieve maximum PWM resolution, the requested T12 frequency should be the
lowest PWM frequency.
. More...
void | IfxCcu6_TimerWithTrigger_initConfig (IfxCcu6_TimerWithTrigger_Config *config, Ifx_CCU6 *ccu6)
Initializes the configuration structure to default. More...
void | IfxCcu6_TimerWithTrigger_run (IfxCcu6_TimerWithTrigger *driver)
Runs the timer. More...
boolean | IfxCcu6_TimerWithTrigger_setFrequency (IfxCcu6_TimerWithTrigger *driver, float32 frequency)
Sets the frequency. More...
boolean | IfxCcu6_TimerWithTrigger_setPeriod (IfxCcu6_TimerWithTrigger *driver, Ifx_TimerValue period)
Sets the period for the timer. More...
void | IfxCcu6_TimerWithTrigger_setSingleMode (IfxCcu6_TimerWithTrigger *driver, boolean enabled)
Sets the single shot mode of the timer. More...
void | IfxCcu6_TimerWithTrigger_setTrigger (IfxCcu6_TimerWithTrigger *driver, Ifx_TimerValue triggerPoint)
Sets the trigger. More...
boolean | IfxCcu6_TimerWithTrigger_stdIfTimerInit (IfxStdIf_Timer *stdif, IfxCcu6_TimerWithTrigger *driver)
Initializes the standard interface timer. More...
void | IfxCcu6_TimerWithTrigger_stop (IfxCcu6_TimerWithTrigger *driver)
Stops the timer. More...
void | IfxCcu6_TimerWithTrigger_updateInputFrequency (IfxCcu6_TimerWithTrigger *driver)
Updates the input frequency. More...

Detailed Description

CCU6 TIMERWITHTRIGGER details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCcu6_TimerWithTrigger.c.


iLLD_TC38A: IfxCcu6_TPwm.c File Reference

  • Ccu6
  • TPwm
Functions
IfxCcu6_TPwm.c File Reference

CCU6 TPWM details. More...

#include "IfxCcu6_TPwm.h"
Include dependency graph for IfxCcu6_TPwm.c:

Go to the source code of this file.

Functions

void | IfxCcu6_TPwm_initModule (IfxCcu6_TPwm *tPwm, const IfxCcu6_TPwm_Config *config)
Initialises the module with default configuration. More...
void | IfxCcu6_TPwm_initModuleConfig (IfxCcu6_TPwm_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values. More...
void | IfxCcu6_TPwm_pause (IfxCcu6_TPwm *tPwm)
Pauses the triggered PWM. More...
void | IfxCcu6_TPwm_resume (IfxCcu6_TPwm *tPwm)
Resumes the triggered PWM. More...
void | IfxCcu6_TPwm_start (IfxCcu6_TPwm *tPwm)
Starts the triggered PWM. More...
void | IfxCcu6_TPwm_stop (IfxCcu6_TPwm *tPwm)
Stops the triggered PWM. More...

Detailed Description

CCU6 TPWM details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCcu6_TPwm.c.


iLLD_TC38A: IfxConvctrl.c File Reference

  • Convctrl
  • Std
Functions
IfxConvctrl.c File Reference

CONVCTRL basic functionality. More...

#include "IfxConvctrl.h"
Include dependency graph for IfxConvctrl.c:

Go to the source code of this file.

Functions

void IfxConvctrl_resetModule (Ifx_CONVERTER *convctrl)

Detailed Description

CONVCTRL basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxConvctrl.c.


iLLD_TC38A: IfxCpu.c File Reference

  • Cpu
  • Std
Functions
IfxCpu.c File Reference

CPU basic functionality. More...

#include "IfxCpu.h"
#include "Pms/Std/IfxPmsPm.h"
Include dependency graph for IfxCpu.c:

Go to the source code of this file.

Functions

boolean | IfxCpu_acquireMutex (IfxCpu_mutexLock *lock)
API to acquire the mutex (binary semaphore). More...
void | IfxCpu_disableOverlayBlock (IfxCpu_ResourceCpu cpu, uint16 overlayBlock)
This function disables the overlay memory. More...
void | IfxCpu_enableOverlayBlock (IfxCpu_ResourceCpu cpu, uint16 overlayBlock, IfxCpu_OverlayMemorySelect overlayMemorySelect, IfxCpu_OverlayAddressMask overlayAddressMask, uint32 targetBaseAddress, uint32 overlayBaseAddress)
This function configures and enables the overlay memory. Note: The data overlay provides the capability to redirect selected data accesses to the Overlay memory. Data accesses made by the TriCore to Program Flash, Online Data Acquisition space, or EBU space can be redirected. Overlay memory may be located in the Local Memory (if present), in the Emulation Memory (Emulation Device only), or in the EBU space,or in the DPSR/PSPR memory. More...
IfxCpu_CoreMode | IfxCpu_getCoreMode (Ifx_CPU *cpu)
API to get current mode of CPU. More...
IfxCpu_ResourceCpu | IfxCpu_getIndex (Ifx_CPU *cpu)
API to get current mode of CPU. More...
uint32 | IfxCpu_getRandomValue (uint32 *seed)
API to get random value. More...
uint32 | IfxCpu_getRandomValueWithinRange (uint32 *seed, uint32 min, uint32 max)
API to get random value with in the range. More...
void | IfxCpu_releaseMutex (IfxCpu_mutexLock *lock)
API to unlock the mutex . More...
void | IfxCpu_resetSpinLock (IfxCpu_spinLock *lock)
API to unlock the resource . More...
boolean | IfxCpu_setCoreMode (Ifx_CPU *cpu, IfxCpu_CoreMode mode)
API to set mode of the CPU. More...
boolean | IfxCpu_setProgramCounter (Ifx_CPU *cpu, uint32 programCounter)
API to set the program counter for the CPU specified. More...
boolean | IfxCpu_setSpinLock (IfxCpu_spinLock *lock, uint32 timeoutCount)
API to lock the resource in spin mode with the given timeout. More...
boolean | IfxCpu_startCore (Ifx_CPU *cpu, uint32 programCounter)
API to set the program counter for the CPU specified and start the CPU. More...
boolean | IfxCpu_waitEvent (IfxCpu_syncEvent *event, uint32 timeoutMilliSec)
This function waits till all the cores have set their corresponding bits in the event. This function along with IfxCpu_emitEvent() are used to achieve the synchronisation between the configured cores. By default "IFXCPU_CFG_ALLCORE_DONE" macro defined for all the cores. In case the user wants to check for synchronisation among the required cores, the macro can be redefined with the value accroing to the CORE_ID register. The IfxCpu_emitEvent() is to be used in the Main functions of the Cores where the user wants to check for synchronisation. More...
void | IfxCpu_emitEvent (IfxCpu_syncEvent *event)
This function sets a bit corresponding to the core in the event. More...
void | IfxCpu_triggerCpuReset (IfxCpu_ResourceCpu coreIndex)
To request reset of a particular core, given by coreId. More...
IfxCpu_ResetStatus | IfxCpu_getCpuResetStatus (IfxCpu_ResourceCpu coreIndex)
Retrieve the cause of reset(no reset, hardware(SMU) or software) since last clear by reading KRST0.RSTSTAT and clear it. More...
void | IfxCpu_setAllIdleExceptMasterCpu (IfxCpu_ResourceCpu masterCpu)
Sets all CPUs to Idle mode except the Master CPU,index of which is given as the parameter. More...
void | IfxCpu_disableInterruptsAllExceptMaster (IfxCpu_ResourceCpu masterCpu)
Disables interrupts for all CPUs except the Master CPU,index of which is given as the parameter. More...

Detailed Description

CPU basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCpu.c.

Function Documentation

◆ IfxCpu_disableInterruptsAllExceptMaster()

void IfxCpu_disableInterruptsAllExceptMaster ( IfxCpu_ResourceCpu masterCpu )

Disables interrupts for all CPUs except the Master CPU,index of which is given as the parameter.

Parameters
masterCpu Master CPU Index- All except this will have their interrupts disabled
Returns
None

Definition at line 632 of file IfxCpu.c.

Referenced by IfxPmsPm_startStandbySequenceInFlash().

◆ IfxCpu_setAllIdleExceptMasterCpu()

void IfxCpu_setAllIdleExceptMasterCpu ( IfxCpu_ResourceCpu masterCpu )

Sets all CPUs to Idle mode except the Master CPU,index of which is given as the parameter.

Parameters
masterCpu Master CPU Index- All except this will be set to Idle Mode
Returns
None

Definition at line 544 of file IfxCpu.c.

Referenced by IfxPmsPm_startSleepSequenceinFlash(), and IfxPmsPm_startStandbySequenceInFlash().


iLLD_TC38A: IfxCpu_cfg.c File Reference

  • _Impl
Variables
IfxCpu_cfg.c File Reference

CPU on-chip implementation data. More...

#include "IfxCpu_cfg.h"
Include dependency graph for IfxCpu_cfg.c:

Go to the source code of this file.

Variables

IFX_CONST IfxModule_IndexMap IfxCpu_cfg_indexMap [IFXCPU_NUM_MODULES]

Detailed Description

CPU on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCpu_cfg.c.

Variable Documentation

◆ IfxCpu_cfg_indexMap

IFX_CONST IfxModule_IndexMap IfxCpu_cfg_indexMap[IFXCPU_NUM_MODULES]
Initial value:
= {
{&MODULE_CPU0, (uint32)IfxCpu_ResourceCpu_0},
{&MODULE_CPU1, (uint32)IfxCpu_ResourceCpu_1},
{&MODULE_CPU2, (uint32)IfxCpu_ResourceCpu_2},
{&MODULE_CPU3, (uint32)IfxCpu_ResourceCpu_3}
}
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxCpu_ResourceCpu_2
CPU 2.
Definition: IfxCpu_cfg.h:161
IfxCpu_ResourceCpu_3
CPU 3.
Definition: IfxCpu_cfg.h:162
IfxCpu_ResourceCpu_0
CPU 0.
Definition: IfxCpu_cfg.h:159
IfxCpu_ResourceCpu_1
CPU 1.
Definition: IfxCpu_cfg.h:160

Definition at line 52 of file IfxCpu_cfg.c.

Referenced by IfxCpu_getAddress(), and IfxCpu_getIndex().


iLLD_TC38A: IfxCpu_IntrinsicsDcc.h File Reference

  • Cpu
  • Std
Macros | Functions | Variables
IfxCpu_IntrinsicsDcc.h File Reference
#include "Ifx_Types.h"
Include dependency graph for IfxCpu_IntrinsicsDcc.h:

Go to the source code of this file.

Macros

#define | Ifx__minX(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxX(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturateX(X, Min, Max) ( Ifx__minX(Ifx__maxX(X, Min), Max) )
#define | Ifx__checkrangeX(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__min __min
#define | Ifx__mins __mins
#define | Ifx__minu __minu
#define | Ifx__max __max
#define | Ifx__maxs __maxs
#define | Ifx__maxu __maxu
#define | Ifx__saturate(X, Min, Max) ( __minf(__maxf(X, Min), Max) )
#define | Ifx__sqrf(X) ((X) * (X))
#define | Ifx__sqrtf(X) sqrtf(X)
#define | Ifx__checkrange(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__roundf(X) ((((X) - (sint32)(X)) > 0.5) ? (1 + (sint32)(X)) : ((sint32)(X)))
#define | Ifx__absf(X) ( ((X) < 0.0) ? -(X) : (X) )
#define | Ifx__minf(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxf(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturatef(X, Min, Max) ( __minf(__maxf(X, Min), Max) )
#define | Ifx__checkrangef(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__abs_stdreal(X) ( ((X) > 0.0) ? (X) : -(X) )
#define | Ifx__min_stdreal(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__max_stdreal(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturate_stdreal(X, Min, Max) ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )
#define | Ifx__neqf(X, Y) ( ((X) > (Y)) || ((X) < (Y)) )
#define | Ifx__leqf(X, Y) ( !((X) > (Y)) )
#define | Ifx__geqf(X, Y) ( !((X) < (Y)) )
#define | Ifx__fract_to_sfract Ifx__round16
#define | Ifx__extr __extr
#define | Ifx__extru __extru
#define | Ifx__getbit(address, bitoffset) __extru( *(address), bitoffset, 1 )
#define | Ifx__ins __ins
#define | Ifx__insert __insert
#define | Ifx__insn __insn
#define | Ifx__putbit(value, address, bitoffset) Ifx__imaskldmst(address,value,bitoffset,1)
#define | Ifx__bisr __bisr
#define | Ifx__disable __disable
#define | Ifx__enable __enable
#define | Ifx__restore __restore
#define | Ifx__syscall __syscall
#define | Ifx__cacheawi __cacheawi
#define | Ifx__abs __abs
#define | Ifx__absdif __absdif
#define | Ifx__abss __abss
#define | Ifx__clo __clo
#define | Ifx__cls __cls
#define | Ifx__clz __clz
#define | Ifx__mfcr __mfcr
#define | Ifx__mtcr __mtcr
#define | Ifx__adds __adds
#define | Ifx__debug __debug
#define | Ifx__dsync __dsync
#define | Ifx__isync __isync
#define | Ifx__mem_barrier __scheduling_barrier
#define | Ifx__nop __nop
#define | Ifx__NOP __nops
#define | Ifx__rslcx
#define | Ifx__svlcx
#define | Ifx__setareg(areg, val) ___setareg(areg,val)
#define | ___setareg(areg, val)
#define | __non_return_call Ifx__non_return_call
#define | __jump_and_link Ifx__jump_and_link
#define | __moveToDataParam0 Ifx__moveToDataParam0
#define | __moveToDataParamRet Ifx__moveToDataParamRet
#define | __getDataParamRet Ifx__getDataParamRet
#define | __moveToAddrParam0 Ifx__moveToAddrParam0
#define | __jumpToFunction Ifx__jumpToFunction
#define | __jumpToFunctionWithLink Ifx__jumpToFunctionWithLink
#define | __jumpBackToLink Ifx__jumpBackToLink
#define | __minX Ifx__minX
#define | __maxX Ifx__maxX
#define | __saturateX Ifx__saturateX
#define | __checkrangeX Ifx__checkrangeX
#define | __saturate Ifx__saturate
#define | __sqrf Ifx__sqrf
#define | __sqrtf Ifx__sqrtf
#define | __checkrange Ifx__checkrange
#define | __roundf Ifx__roundf
#define | __absf Ifx__absf
#define | __minf Ifx__minf
#define | __maxf Ifx__maxf
#define | __saturatef Ifx__saturatef
#define | __checkrangef Ifx__checkrangef
#define | __abs_stdreal Ifx__abs_stdreal
#define | __min_stdreal Ifx__min_stdreal
#define | __max_stdreal Ifx__max_stdreal
#define | __saturate_stdreal Ifx__saturate_stdreal
#define | __neqf Ifx__neqf
#define | __leqf Ifx__leqf
#define | __geqf Ifx__geqf
#define | __clssf Ifx__clssf
#define | __float_to_fract Ifx__float_to_fract
#define | __fract_to_float Ifx__fract_to_float
#define | __getfract Ifx__getfract
#define | __mac_r_sf Ifx__mac_r_sf
#define | __mac_sf Ifx__mac_sf
#define | __mulfractfract Ifx__mulfractfract
#define | __mulfractlong Ifx__mulfractlong
#define | __round16 Ifx__round16
#define | __fract_to_sfract Ifx__fract_to_sfract
#define | __s16_to_sfract Ifx__s16_to_sfract
#define | __sfract_to_s16 Ifx__sfract_to_s16
#define | __sfract_to_u16 Ifx__sfract_to_u16
#define | __shaaccum Ifx__shaaccum
#define | __shafracts Ifx__shafracts
#define | __shasfracts Ifx__shasfracts
#define | __u16_to_sfract Ifx__u16_to_sfract
#define | __getbit Ifx__getbit
#define | __imaskldmst Ifx__imaskldmst
#define | __putbit Ifx__putbit
#define | __cacheawi_bo_post_inc Ifx__cacheawi_bo_post_inc
#define | __cacheiwi Ifx__cacheiwi
#define | __mulsc Ifx__mulsc
#define | __rol Ifx__rol
#define | __ror Ifx__ror
#define | __absb Ifx__absb
#define | __absh Ifx__absh
#define | __abssh Ifx__abssh
#define | __extractbyte1 Ifx__extractbyte1
#define | __extractbyte2 Ifx__extractbyte2
#define | __extractbyte3 Ifx__extractbyte3
#define | __extractbyte4 Ifx__extractbyte4
#define | __extracthw1 Ifx__extracthw1
#define | __extracthw2 Ifx__extracthw2
#define | __extractubyte1 Ifx__extractubyte1
#define | __extractubyte2 Ifx__extractubyte2
#define | __extractubyte3 Ifx__extractubyte3
#define | __extractubyte4 Ifx__extractubyte4
#define | __extractuhw1 Ifx__extractuhw1
#define | __extractuhw2 Ifx__extractuhw2
#define | __getbyte1 Ifx__getbyte1
#define | __getbyte2 Ifx__getbyte2
#define | __getbyte3 Ifx__getbyte3
#define | __getbyte4 Ifx__getbyte4
#define | __gethw1 Ifx__gethw1
#define | __gethw2 Ifx__gethw2
#define | __getubyte1 Ifx__getubyte1
#define | __getubyte2 Ifx__getubyte2
#define | __getubyte3 Ifx__getubyte3
#define | __getubyte4 Ifx__getubyte4
#define | __getuhw1 Ifx__getuhw1
#define | __getuhw2 Ifx__getuhw2
#define | __initpackb Ifx__initpackb
#define | __initpackbl Ifx__initpackbl
#define | __initpackhw Ifx__initpackhw
#define | __initpackhwl Ifx__initpackhwl
#define | __initupackb Ifx__initupackb
#define | __initupackhw Ifx__initupackhw
#define | __insertbyte1 Ifx__insertbyte1
#define | __insertbyte2 Ifx__insertbyte2
#define | __insertbyte3 Ifx__insertbyte3
#define | __insertbyte4 Ifx__insertbyte4
#define | __inserthw1 Ifx__inserthw1
#define | __inserthw2 Ifx__inserthw2
#define | __insertubyte1 Ifx__insertubyte1
#define | __insertubyte2 Ifx__insertubyte2
#define | __insertubyte3 Ifx__insertubyte3
#define | __insertubyte4 Ifx__insertubyte4
#define | __insertuhw1 Ifx__insertuhw1
#define | __insertuhw2 Ifx__insertuhw2
#define | __minb Ifx__minb
#define | __minbu Ifx__minbu
#define | __minh Ifx__minh
#define | __minhu Ifx__minhu
#define | __setbyte1 Ifx__setbyte1
#define | __setbyte2 Ifx__setbyte2
#define | __setbyte3 Ifx__setbyte3
#define | __setbyte4 Ifx__setbyte4
#define | __sethw1 Ifx__sethw1
#define | __sethw2 Ifx__sethw2
#define | __setubyte1 Ifx__setubyte1
#define | __setubyte2 Ifx__setubyte2
#define | __setubyte3 Ifx__setubyte3
#define | __setubyte4 Ifx__setubyte4
#define | __setuhw1 Ifx__setuhw1
#define | __setuhw2 Ifx__setuhw2
#define | __fabs Ifx__fabs
#define | __fabsf Ifx__fabsf
#define | __parity Ifx__parity
#define | __satb Ifx__satb
#define | __satbu Ifx__satbu
#define | __sath Ifx__sath
#define | __sathu Ifx__sathu
#define | __addsu Ifx__addsu
#define | __subs Ifx__subs
#define | __subsu Ifx__subsu
#define | __ldmst Ifx__ldmst
#define | __mem_barrier Ifx__mem_barrier
#define | NOP Ifx__NOP
#define | __nops Ifx__nops
#define | __nops1000 Ifx__nops1000
#define | __swap Ifx__swap
#define | __cmpAndSwap Ifx__cmpAndSwap
#define | __setareg Ifx__setareg
#define | __stopPerfCounters Ifx__stopPerfCounters
#define | __fixpoint_to_float32 Ifx__fixpoint_to_float32
#define | __getA11 Ifx__getA11
#define | __setStackPointer Ifx__setStackPointer
#define | __crc32 Ifx__crc32

Functions

asm volatile void | Ifx__non_return_call (void(*fun)(void))
asm volatile void | Ifx__jump_and_link (void(*fun)(void))
asm volatile void | Ifx__moveToDataParam0 (unsigned int var)
asm volatile void | Ifx__moveToDataParamRet (unsigned int var)
asm volatile unsigned int | Ifx__getDataParamRet (void)
asm volatile void | Ifx__moveToAddrParam0 (const void *var)
IFX_INLINE void | Ifx__jumpToFunction (const void *fun)
IFX_INLINE void | Ifx__jumpToFunctionWithLink (const void *fun)
asm volatile void | Ifx__jumpBackToLink (void)
sint32 | __min (sint32, sint32) __attribute__((intrinsic_pseudo(3
sint32 | __mins (sint32, sint32) __attribute__((intrinsic_function(0x10b
uint32 | __minu (uint32, uint32) __attribute__((intrinsic_pseudo(3
sint32 | __max (sint32, sint32) __attribute__((intrinsic_pseudo(3
uint32 | __maxs (uint32, uint32) __attribute__((intrinsic_function(0x10b
uint32 | __maxu (uint32, uint32) __attribute__((intrinsic_pseudo(3
asm short | Ifx__clssf (sfract a)
asm fract | Ifx__float_to_fract (float a)
asm float | Ifx__fract_to_float (fract a)
Convert fract to float. More...
asm fract | Ifx__getfract (laccum a)
asm sfract | Ifx__mac_r_sf (sfract a, sfract b, sfract c)
asm sfract | Ifx__mac_sf (sfract a, sfract b, sfract c)
asm long | Ifx__mulfractfract (fract a, fract b)
asm long | Ifx__mulfractlong (fract a, long b)
asm sfract | Ifx__round16 (fract a)
IFX_INLINE sfract | __float_to_sfract (float a)
asm sfract | Ifx__s16_to_sfract (short a)
asm short | Ifx__sfract_to_s16 (sfract a)
asm volatile uint16 | Ifx__sfract_to_u16 (sfract a)
asm laccum | Ifx__shaaccum (laccum a, sint32 b)
asm fract | Ifx__shafracts (fract a, sint32 b)
asm sfract | Ifx__shasfracts (sfract a, sint32 b)
asm sfract | Ifx__u16_to_sfract (uint16 a)
sint32 | __extr (sint32, uint32, const uint32) __attribute__((intrinsic_function(0x108
uint32 | __extru (uint32, uint32, const uint32) __attribute__((intrinsic_function(0x108
uint32 | __ins (uint32, const uint32, uint32, const uint32) __attribute__((intrinsic_function(0x121
uint32 | __insert (uint32, uint32, uint32, const uint32) __attribute__((intrinsic_function(0x109
uint32 | __insn (uint32, const uint32, uint32, const uint32) __attribute__((intrinsic_function(0x121
asm volatile void | Ifx__imaskldmst (void *a, sint32 b, sint32 p, const sint32 w)
void | __bisr (const uint32) __attribute__((intrinsic_function(0x100
void | __disable (void) __attribute__((intrinsic_function(0x103
void | __enable (void) __attribute__((intrinsic_function(0x103
void | __restore (sint32) __attribute__((intrinsic_function(0x104
void | __syscall (const uint32) __attribute__((intrinsic_function(0x100
void | __cacheawi (void *) __attribute__((intrinsic_function(0x110
asm volatile uint8 * | Ifx__cacheawi_bo_post_inc (uint8 *p)
asm volatile void | Ifx__cacheiwi (uint8 *p)
asm circ_t | __initcirc (void *buf, uint16 bufsize, uint16 byteindex)
asm volatile sint32 | Ifx__mulsc (sint32 a, sint32 b, sint32 offset)
asm volatile uint32 | Ifx__rol (uint32 operand, uint32 count)
asm volatile uint32 | Ifx__ror (uint32 operand, uint32 count)
asm __packb | Ifx__absb (__packb a)
asm __packhw | Ifx__absh (__packhw a)
asm __packhw | Ifx__abssh (__packhw a)
asm sint8 | Ifx__extractbyte1 (__packb a)
Extract first byte from a __packb. More...
asm sint8 | Ifx__extractbyte2 (__packb a)
Extract second byte from a __packb. More...
asm sint8 | Ifx__extractbyte3 (__packb a)
Extract third byte from a __packb. More...
asm sint8 | Ifx__extractbyte4 (__packb a)
Extract fourth byte from a __packb. More...
asm short | Ifx__extracthw1 (__packhw a)
Extract first short from a __packhw. More...
asm short | Ifx__extracthw2 (__packhw a)
Extract second short from a __packhw. More...
asm volatile uint8 | Ifx__extractubyte1 (__upackb a)
asm volatile uint8 | Ifx__extractubyte2 (__upackb a)
asm volatile uint8 | Ifx__extractubyte3 (__upackb a)
asm volatile uint8 | Ifx__extractubyte4 (__upackb a)
asm volatile uint16 | Ifx__extractuhw1 (__upackhw a)
asm volatile uint16 | Ifx__extractuhw2 (__upackhw a)
asm sint8 | Ifx__getbyte1 (__packb *a)
asm sint8 | Ifx__getbyte2 (__packb *a)
asm sint8 | Ifx__getbyte3 (__packb *a)
asm sint8 | Ifx__getbyte4 (__packb *a)
asm short | Ifx__gethw1 (__packhw *a)
asm short | Ifx__gethw2 (__packhw *a)
asm volatile uint8 | Ifx__getubyte1 (__upackb *a)
asm volatile uint8 | Ifx__getubyte2 (__upackb *a)
asm volatile uint8 | Ifx__getubyte3 (__upackb *a)
asm volatile uint8 | Ifx__getubyte4 (__upackb *a)
asm volatile uint16 | Ifx__getuhw1 (__upackhw *a)
asm volatile uint16 | Ifx__getuhw2 (__upackhw *a)
asm __packb | Ifx__initpackb (sint32 a, sint32 b, sint32 c, sint32 d)
asm __packb | Ifx__initpackbl (long a)
asm __packhw | Ifx__initpackhw (short a, short b)
Initialize __packhw with two integers. More...
asm __packhw | Ifx__initpackhwl (long a)
asm __upackb | Ifx__initupackb (uint32 a, uint32 b, uint32 c, uint32 d)
asm __upackhw | Ifx__initupackhw (uint16 a, uint16 b)
asm __packb | Ifx__insertbyte1 (__packb a, sint8 b)
Insert sint8 into first byte of a __packb. More...
asm __packb | Ifx__insertbyte2 (__packb a, sint8 b)
Insert sint8 into second byte of a __packb. More...
asm __packb | Ifx__insertbyte3 (__packb a, sint8 b)
Insert sint8 into third byte of a __packb. More...
asm __packb | Ifx__insertbyte4 (__packb a, sint8 b)
Insert sint8 into fourth byte of a __packb. More...
asm __packhw | Ifx__inserthw1 (__packhw a, short b)
asm __packhw | Ifx__inserthw2 (__packhw a, short b)
asm __upackb | Ifx__insertubyte1 (__upackb a, uint8 b)
Insert uint8 into first unsigned byte of a __packb. More...
asm __upackb | Ifx__insertubyte2 (__upackb a, uint8 b)
Insert uint8 into second unsigned byte of a __packb. More...
asm __upackb | Ifx__insertubyte3 (__upackb a, uint8 b)
Insert uint8 into third unsigned byte of a __packb. More...
asm __upackb | Ifx__insertubyte4 (__upackb a, uint8 b)
Insert uint8 into fourth unsigned byte of a __packb. More...
asm __upackhw | Ifx__insertuhw1 (__upackhw a, uint16 b)
asm __upackhw | Ifx__insertuhw2 (__upackhw a, uint16 b)
asm __packb | Ifx__minb (__packb a, __packb b)
asm __upackb | Ifx__minbu (__upackb a, __upackb b)
asm __packhw | Ifx__minh (__packhw a, __packhw b)
asm __upackhw | Ifx__minhu (__upackhw a, __upackhw b)
asm volatile void | Ifx__setbyte1 (__packb *a, sint8 b)
asm volatile void | Ifx__setbyte2 (__packb *a, sint8 b)
asm volatile void | Ifx__setbyte3 (__packb *a, sint8 b)
asm volatile void | Ifx__setbyte4 (__packb *a, sint8 b)
asm volatile void | Ifx__sethw1 (__packhw *a, short b)
asm volatile void | Ifx__sethw2 (__packhw *a, short b)
asm volatile void | Ifx__setubyte1 (__upackb *a, uint8 b)
asm volatile void | Ifx__setubyte2 (__upackb *a, uint8 b)
asm volatile void | Ifx__setubyte3 (__upackb *a, uint8 b)
asm volatile void | Ifx__setubyte4 (__upackb *a, uint8 b)
asm volatile void | Ifx__setuhw1 (__upackhw *a, uint16 b)
asm volatile void | Ifx__setuhw2 (__upackhw *a, uint16 b)
sint32 | __abs (sint32) __attribute__((intrinsic_pseudo(1
sint32 | __absdif (sint32, sint32) __attribute__((intrinsic_pseudo(1
sint32 | __abss (sint32) __attribute__((intrinsic_pseudo(1
sint32 | __clo (sint32) __attribute__((intrinsic_pseudo(1
sint32 | __cls (sint32) __attribute__((intrinsic_pseudo(1
sint32 | __clz (sint32) __attribute__((intrinsic_pseudo(1
asm double | Ifx__fabs (double d)
asm float | Ifx__fabsf (float f)
sint32 | __mfcr (const uint32) __attribute__((intrinsic_function(0x101
void | __mtcr (const uint32, sint32) __attribute__((intrinsic_function(0x102
asm volatile sint32 | Ifx__parity (sint32 a)
asm sint8 | Ifx__satb (sint32 a)
asm volatile uint8 | Ifx__satbu (sint32 a)
asm short | Ifx__sath (sint32 a)
asm volatile uint16 | Ifx__sathu (sint32 a)
sint32 | __adds (sint32, sint32) __attribute__((intrinsic_pseudo(1
asm volatile uint32 | Ifx__addsu (uint32 a, uint32 b)
asm volatile sint32 | Ifx__subs (sint32 a, sint32 b)
asm volatile uint32 | Ifx__subsu (uint32 a, uint32 b)
void | __debug (void) __attribute__((intrinsic_function(0x103
void | __dsync (void) __attribute__((intrinsic_function(0x103
void | __isync (void) __attribute__((intrinsic_function(0x103
asm volatile void | Ifx__ldmst (volatile void *address, uint32 mask, uint32 value)
void | __scheduling_barrier (void) __attribute__((intrinsic_function(9
void | __nop (void) __attribute__((intrinsic_function(0x103
asm volatile void | Ifx__nops (uint32 cnt)
asm volatile void | Ifx__nops1000 (uint32 x)
void | __rslcx (void) __attribute__((intrinsic_function(0x103
void | __svlcx (void) __attribute__((intrinsic_function(0x103
asm volatile uint32 | Ifx__swap (void *place, uint32 value)
asm volatile unsigned int | Ifx__cmpAndSwap (unsigned int *address, unsigned long value, unsigned long CmpVal)
asm volatile void | Ifx__stopPerfCounters (void)
asm float | Ifx__fixpoint_to_float32 (fract value, sint32 shift)
Convert a fixpoint value to float32. More...
asm volatile void * | Ifx__getA11 (void)
asm void | Ifx__setStackPointer (void *stackAddr)
asm volatile unsigned int | Ifx__crc32 (uint32 b, uint32 a)
IFX_INLINE unsigned int | IfxCpu_calculateCrc32 (uint32 *startaddress, uint8 length)
asm volatile uint32 | IfxCpu_getRandomVal (uint32 a, uint32 x, uint32 m)
Generate the Random value. More...

Variables

sint32 min
sint32 min h
uint32 min u
sint32 max
sint32 extr
uint32 ins | t
uint32 insert
void | bisr
void | disable
void | enable
void | restore
void | syscall
void cachea | wi
sint32 abs
sint32 absdif
sint32 abss
sint32 clo
sint32 cls
sint32 clz
sint32 mfcr
void | mtcr
sint32 adds
void | debug
void | dsync
void | isync
void | $ $sb
void | nop
void | rslcx
void | svlcx

Detailed Description

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCpu_IntrinsicsDcc.h.

Macro Definition Documentation

◆ ___setareg

#define ___setareg | ( | areg,
 |  | val
 | ) |
Value:
{ __asm ("#$$bp"); \
__asm (" movh.a\t %a15,"#val"@ha\n"); \
__asm (" lea\t %a15,[%a15]"#val"@l\n"); \
__asm (" mov.aa %"#areg", %a15\n"); \
__asm ("#$$ep"); }

Definition at line 1457 of file IfxCpu_IntrinsicsDcc.h.

◆ __abs_stdreal

#define __abs_stdreal Ifx__abs_stdreal

Definition at line 1649 of file IfxCpu_IntrinsicsDcc.h.

◆ __absb

#define __absb Ifx__absb

Definition at line 1781 of file IfxCpu_IntrinsicsDcc.h.

◆ __absf

#define __absf Ifx__absf

Definition at line 1629 of file IfxCpu_IntrinsicsDcc.h.

Referenced by Ifx_AngleTrkF32_updateStatus(), IfxAsclin_setBitTiming(), IfxCan_Node_setBitTiming(), IfxCan_Node_setFastBitTiming(), IfxEdsadc_Edsadc_calcDIVCG(), IfxEdsadc_Edsadc_calcDIVM(), IfxQspi_calculateExtendedConfigurationValue(), IfxQspi_calculatePrescaler(), and IfxQspi_calculateTimeQuantumLength().

◆ __absh

#define __absh Ifx__absh

Definition at line 1785 of file IfxCpu_IntrinsicsDcc.h.

◆ __abssh

#define __abssh Ifx__abssh

Definition at line 1789 of file IfxCpu_IntrinsicsDcc.h.

◆ __addsu

#define __addsu Ifx__addsu

Definition at line 2053 of file IfxCpu_IntrinsicsDcc.h.

◆ __cacheawi_bo_post_inc

#define __cacheawi_bo_post_inc Ifx__cacheawi_bo_post_inc

Definition at line 1761 of file IfxCpu_IntrinsicsDcc.h.

◆ __cacheiwi

#define __cacheiwi Ifx__cacheiwi

Definition at line 1765 of file IfxCpu_IntrinsicsDcc.h.

◆ __checkrange

#define __checkrange Ifx__checkrange

Definition at line 1621 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxGtm_Trig_fromEdsadc().

◆ __checkrangef

#define __checkrangef Ifx__checkrangef

Definition at line 1645 of file IfxCpu_IntrinsicsDcc.h.

◆ __checkrangeX

#define __checkrangeX Ifx__checkrangeX

Definition at line 1605 of file IfxCpu_IntrinsicsDcc.h.

◆ __clssf

#define __clssf Ifx__clssf

Definition at line 1677 of file IfxCpu_IntrinsicsDcc.h.

◆ __cmpAndSwap

#define __cmpAndSwap Ifx__cmpAndSwap

Definition at line 2089 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxCpu_acquireMutex(), and IfxCpu_setSpinLock().

◆ __crc32

#define __crc32 Ifx__crc32

Definition at line 2113 of file IfxCpu_IntrinsicsDcc.h.

◆ __extractbyte1

#define __extractbyte1 Ifx__extractbyte1

Definition at line 1793 of file IfxCpu_IntrinsicsDcc.h.

◆ __extractbyte2

#define __extractbyte2 Ifx__extractbyte2

Definition at line 1797 of file IfxCpu_IntrinsicsDcc.h.

◆ __extractbyte3

#define __extractbyte3 Ifx__extractbyte3

Definition at line 1801 of file IfxCpu_IntrinsicsDcc.h.

◆ __extractbyte4

#define __extractbyte4 Ifx__extractbyte4

Definition at line 1805 of file IfxCpu_IntrinsicsDcc.h.

◆ __extracthw1

#define __extracthw1 Ifx__extracthw1

Definition at line 1809 of file IfxCpu_IntrinsicsDcc.h.

◆ __extracthw2

#define __extracthw2 Ifx__extracthw2

Definition at line 1813 of file IfxCpu_IntrinsicsDcc.h.

◆ __extractubyte1

#define __extractubyte1 Ifx__extractubyte1

Definition at line 1817 of file IfxCpu_IntrinsicsDcc.h.

◆ __extractubyte2

#define __extractubyte2 Ifx__extractubyte2

Definition at line 1821 of file IfxCpu_IntrinsicsDcc.h.

◆ __extractubyte3

#define __extractubyte3 Ifx__extractubyte3

Definition at line 1825 of file IfxCpu_IntrinsicsDcc.h.

◆ __extractubyte4

#define __extractubyte4 Ifx__extractubyte4

Definition at line 1829 of file IfxCpu_IntrinsicsDcc.h.

◆ __extractuhw1

#define __extractuhw1 Ifx__extractuhw1

Definition at line 1833 of file IfxCpu_IntrinsicsDcc.h.

◆ __extractuhw2

#define __extractuhw2 Ifx__extractuhw2

Definition at line 1837 of file IfxCpu_IntrinsicsDcc.h.

◆ __fabs

#define __fabs Ifx__fabs

Definition at line 2025 of file IfxCpu_IntrinsicsDcc.h.

◆ __fabsf

#define __fabsf Ifx__fabsf

Definition at line 2029 of file IfxCpu_IntrinsicsDcc.h.

◆ __fixpoint_to_float32

#define __fixpoint_to_float32 Ifx__fixpoint_to_float32

Definition at line 2101 of file IfxCpu_IntrinsicsDcc.h.

◆ __float_to_fract

#define __float_to_fract Ifx__float_to_fract

Definition at line 1681 of file IfxCpu_IntrinsicsDcc.h.

◆ __fract_to_float

#define __fract_to_float Ifx__fract_to_float

Definition at line 1685 of file IfxCpu_IntrinsicsDcc.h.

◆ __fract_to_sfract

#define __fract_to_sfract Ifx__fract_to_sfract

Definition at line 1713 of file IfxCpu_IntrinsicsDcc.h.

◆ __geqf

#define __geqf Ifx__geqf

Definition at line 1673 of file IfxCpu_IntrinsicsDcc.h.

◆ __getA11

#define __getA11 Ifx__getA11

Definition at line 2105 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxCpu_Trap_extractTrapInfo().

◆ __getbit

#define __getbit Ifx__getbit

Definition at line 1749 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxPort_getPinState().

◆ __getbyte1

#define __getbyte1 Ifx__getbyte1

Definition at line 1841 of file IfxCpu_IntrinsicsDcc.h.

◆ __getbyte2

#define __getbyte2 Ifx__getbyte2

Definition at line 1845 of file IfxCpu_IntrinsicsDcc.h.

◆ __getbyte3

#define __getbyte3 Ifx__getbyte3

Definition at line 1849 of file IfxCpu_IntrinsicsDcc.h.

◆ __getbyte4

#define __getbyte4 Ifx__getbyte4

Definition at line 1853 of file IfxCpu_IntrinsicsDcc.h.

◆ __getDataParamRet

#define __getDataParamRet Ifx__getDataParamRet

Definition at line 1573 of file IfxCpu_IntrinsicsDcc.h.

◆ __getfract

#define __getfract Ifx__getfract

Definition at line 1689 of file IfxCpu_IntrinsicsDcc.h.

◆ __gethw1

#define __gethw1 Ifx__gethw1

Definition at line 1857 of file IfxCpu_IntrinsicsDcc.h.

◆ __gethw2

#define __gethw2 Ifx__gethw2

Definition at line 1861 of file IfxCpu_IntrinsicsDcc.h.

◆ __getubyte1

#define __getubyte1 Ifx__getubyte1

Definition at line 1865 of file IfxCpu_IntrinsicsDcc.h.

◆ __getubyte2

#define __getubyte2 Ifx__getubyte2

Definition at line 1869 of file IfxCpu_IntrinsicsDcc.h.

◆ __getubyte3

#define __getubyte3 Ifx__getubyte3

Definition at line 1873 of file IfxCpu_IntrinsicsDcc.h.

◆ __getubyte4

#define __getubyte4 Ifx__getubyte4

Definition at line 1877 of file IfxCpu_IntrinsicsDcc.h.

◆ __getuhw1

#define __getuhw1 Ifx__getuhw1

Definition at line 1881 of file IfxCpu_IntrinsicsDcc.h.

◆ __getuhw2

#define __getuhw2 Ifx__getuhw2

Definition at line 1885 of file IfxCpu_IntrinsicsDcc.h.

◆ __imaskldmst

#define __imaskldmst Ifx__imaskldmst

Definition at line 1753 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxGtm_Tim_Ch_setInputSourceSelection().

◆ __initpackb

#define __initpackb Ifx__initpackb

Definition at line 1889 of file IfxCpu_IntrinsicsDcc.h.

◆ __initpackbl

#define __initpackbl Ifx__initpackbl

Definition at line 1893 of file IfxCpu_IntrinsicsDcc.h.

◆ __initpackhw

#define __initpackhw Ifx__initpackhw

Definition at line 1897 of file IfxCpu_IntrinsicsDcc.h.

◆ __initpackhwl

#define __initpackhwl Ifx__initpackhwl

Definition at line 1901 of file IfxCpu_IntrinsicsDcc.h.

◆ __initupackb

#define __initupackb Ifx__initupackb

Definition at line 1905 of file IfxCpu_IntrinsicsDcc.h.

◆ __initupackhw

#define __initupackhw Ifx__initupackhw

Definition at line 1909 of file IfxCpu_IntrinsicsDcc.h.

◆ __insertbyte1

#define __insertbyte1 Ifx__insertbyte1

Definition at line 1913 of file IfxCpu_IntrinsicsDcc.h.

◆ __insertbyte2

#define __insertbyte2 Ifx__insertbyte2

Definition at line 1917 of file IfxCpu_IntrinsicsDcc.h.

◆ __insertbyte3

#define __insertbyte3 Ifx__insertbyte3

Definition at line 1921 of file IfxCpu_IntrinsicsDcc.h.

◆ __insertbyte4

#define __insertbyte4 Ifx__insertbyte4

Definition at line 1925 of file IfxCpu_IntrinsicsDcc.h.

◆ __inserthw1

#define __inserthw1 Ifx__inserthw1

Definition at line 1929 of file IfxCpu_IntrinsicsDcc.h.

◆ __inserthw2

#define __inserthw2 Ifx__inserthw2

Definition at line 1933 of file IfxCpu_IntrinsicsDcc.h.

◆ __insertubyte1

#define __insertubyte1 Ifx__insertubyte1

Definition at line 1937 of file IfxCpu_IntrinsicsDcc.h.

◆ __insertubyte2

#define __insertubyte2 Ifx__insertubyte2

Definition at line 1941 of file IfxCpu_IntrinsicsDcc.h.

◆ __insertubyte3

#define __insertubyte3 Ifx__insertubyte3

Definition at line 1945 of file IfxCpu_IntrinsicsDcc.h.

◆ __insertubyte4

#define __insertubyte4 Ifx__insertubyte4

Definition at line 1949 of file IfxCpu_IntrinsicsDcc.h.

◆ __insertuhw1

#define __insertuhw1 Ifx__insertuhw1

Definition at line 1953 of file IfxCpu_IntrinsicsDcc.h.

◆ __insertuhw2

#define __insertuhw2 Ifx__insertuhw2

Definition at line 1957 of file IfxCpu_IntrinsicsDcc.h.

◆ __jump_and_link

#define __jump_and_link Ifx__jump_and_link

Definition at line 1561 of file IfxCpu_IntrinsicsDcc.h.

◆ __jumpBackToLink

#define __jumpBackToLink Ifx__jumpBackToLink

Definition at line 1589 of file IfxCpu_IntrinsicsDcc.h.

◆ __jumpToFunction

#define __jumpToFunction Ifx__jumpToFunction

Definition at line 1581 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxMtu_runMbist(), IfxMtu_runMbistClearRam(), IfxMtu_runMbistConfigMtest(), IfxMtu_runMbistConfigPatterns(), and IfxMtu_runMbistConfigRange().

◆ __jumpToFunctionWithLink

#define __jumpToFunctionWithLink Ifx__jumpToFunctionWithLink

Definition at line 1585 of file IfxCpu_IntrinsicsDcc.h.

◆ __ldmst

#define __ldmst Ifx__ldmst

Definition at line 2065 of file IfxCpu_IntrinsicsDcc.h.

Referenced by Ifx_InternalMux_init(), IfxPort_modifyPinControllerSelection(), IfxPort_resetESR(), IfxPort_resetPinControllerSelection(), IfxPort_setESR(), IfxPort_setGroupModeInput(), IfxPort_setGroupModeOutput(), IfxPort_setGroupPadDriver(), IfxPort_setPinControllerSelection(), IfxPort_setPinMode(), IfxPort_setPinPadDriver(), and IfxQspi_SpiMaster_initChannel().

◆ __leqf

#define __leqf Ifx__leqf

Definition at line 1669 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxEdsadc_Edsadc_calcDIVCG(), IfxEdsadc_Edsadc_calcDIVM(), IfxQspi_calculateExtendedConfigurationValue(), IfxQspi_calculatePrescaler(), and IfxQspi_calculateTimeQuantumLength().

◆ __mac_r_sf

#define __mac_r_sf Ifx__mac_r_sf

Definition at line 1693 of file IfxCpu_IntrinsicsDcc.h.

◆ __mac_sf

#define __mac_sf Ifx__mac_sf

Definition at line 1697 of file IfxCpu_IntrinsicsDcc.h.

◆ __max_stdreal

#define __max_stdreal Ifx__max_stdreal

Definition at line 1657 of file IfxCpu_IntrinsicsDcc.h.

◆ __maxf

#define __maxf Ifx__maxf

Definition at line 1637 of file IfxCpu_IntrinsicsDcc.h.

Referenced by Ifx_RampF32_step(), and VecMax_f32().

◆ __maxX

#define __maxX Ifx__maxX

Definition at line 1597 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxGtm_Atom_Dtm_PwmHl_updateShiftCenterAligned(), IfxGtm_Atom_PwmHl_updateShiftCenterAligned(), IfxGtm_Tom_Dtm_PwmHl_updateShiftCenterAligned(), and IfxGtm_Tom_PwmHl_updateShiftCenterAligned().

◆ __mem_barrier

#define __mem_barrier Ifx__mem_barrier

Definition at line 2069 of file IfxCpu_IntrinsicsDcc.h.

◆ __min_stdreal

#define __min_stdreal Ifx__min_stdreal

Definition at line 1653 of file IfxCpu_IntrinsicsDcc.h.

◆ __minb

#define __minb Ifx__minb

Definition at line 1961 of file IfxCpu_IntrinsicsDcc.h.

◆ __minbu

#define __minbu Ifx__minbu

Definition at line 1965 of file IfxCpu_IntrinsicsDcc.h.

◆ __minf

#define __minf Ifx__minf

Definition at line 1633 of file IfxCpu_IntrinsicsDcc.h.

Referenced by Ifx_RampF32_step(), and VecMin_f32().

◆ __minh

#define __minh Ifx__minh

Definition at line 1969 of file IfxCpu_IntrinsicsDcc.h.

◆ __minhu

#define __minhu Ifx__minhu

Definition at line 1973 of file IfxCpu_IntrinsicsDcc.h.

◆ __minX

#define __minX Ifx__minX

Definition at line 1593 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxGtm_Atom_Dtm_PwmHl_updateShiftCenterAligned(), IfxGtm_Atom_PwmHl_updateShiftCenterAligned(), IfxGtm_Tom_Dtm_PwmHl_updateShiftCenterAligned(), and IfxGtm_Tom_PwmHl_updateShiftCenterAligned().

◆ __moveToAddrParam0

#define __moveToAddrParam0 Ifx__moveToAddrParam0

Definition at line 1577 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxMtu_runMbist(), IfxMtu_runMbistClearRam(), IfxMtu_runMbistConfigMtest(), and IfxMtu_runMbistConfigRange().

◆ __moveToDataParam0

#define __moveToDataParam0 Ifx__moveToDataParam0

Definition at line 1565 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxMtu_runMbistClearRam(), IfxMtu_runMbistConfigMtest(), and IfxMtu_runMbistConfigPatterns().

◆ __moveToDataParamRet

#define __moveToDataParamRet Ifx__moveToDataParamRet

Definition at line 1569 of file IfxCpu_IntrinsicsDcc.h.

◆ __mulfractfract

#define __mulfractfract Ifx__mulfractfract

Definition at line 1701 of file IfxCpu_IntrinsicsDcc.h.

◆ __mulfractlong

#define __mulfractlong Ifx__mulfractlong

Definition at line 1705 of file IfxCpu_IntrinsicsDcc.h.

◆ __mulsc

#define __mulsc Ifx__mulsc

Definition at line 1769 of file IfxCpu_IntrinsicsDcc.h.

◆ __neqf

#define __neqf Ifx__neqf

Definition at line 1665 of file IfxCpu_IntrinsicsDcc.h.

Referenced by Ifx_AngleTrkF32_init(), IfxEdsadc_Edsadc_calcDIVCG(), IfxEdsadc_Edsadc_calcDIVM(), and IfxQspi_calculateExtendedConfigurationValue().

◆ __non_return_call

#define __non_return_call Ifx__non_return_call

Definition at line 1557 of file IfxCpu_IntrinsicsDcc.h.

◆ __nops

#define __nops Ifx__nops

Definition at line 2077 of file IfxCpu_IntrinsicsDcc.h.

◆ __nops1000

#define __nops1000 Ifx__nops1000

Definition at line 2081 of file IfxCpu_IntrinsicsDcc.h.

◆ __parity

#define __parity Ifx__parity

Definition at line 2033 of file IfxCpu_IntrinsicsDcc.h.

◆ __putbit

#define __putbit Ifx__putbit

Definition at line 1757 of file IfxCpu_IntrinsicsDcc.h.

◆ __rol

#define __rol Ifx__rol

Definition at line 1773 of file IfxCpu_IntrinsicsDcc.h.

◆ __ror

#define __ror Ifx__ror

Definition at line 1777 of file IfxCpu_IntrinsicsDcc.h.

◆ __round16

#define __round16 Ifx__round16

Definition at line 1709 of file IfxCpu_IntrinsicsDcc.h.

◆ __roundf

#define __roundf Ifx__roundf

Definition at line 1625 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxQspi_calculateTimeQuantumLength(), IfxScuCcu_setAsclinFFrequency(), IfxScuCcu_setAsclinSFrequency(), IfxScuCcu_setBbbFrequency(), IfxScuCcu_setFsi2Frequency(), IfxScuCcu_setFsiFrequency(), IfxScuCcu_setGethFrequency(), IfxScuCcu_setGtmFrequency(), IfxScuCcu_setI2cFrequency(), IfxScuCcu_setMcanFrequency(), IfxScuCcu_setMcanhFrequency(), IfxScuCcu_setMscFrequency(), IfxScuCcu_setQspiFrequency(), IfxScuCcu_setSriFrequency(), and IfxScuCcu_setStmFrequency().

◆ __s16_to_sfract

#define __s16_to_sfract Ifx__s16_to_sfract

Definition at line 1721 of file IfxCpu_IntrinsicsDcc.h.

◆ __satb

#define __satb Ifx__satb

Definition at line 2037 of file IfxCpu_IntrinsicsDcc.h.

◆ __satbu

#define __satbu Ifx__satbu

Definition at line 2041 of file IfxCpu_IntrinsicsDcc.h.

◆ __sath

#define __sath Ifx__sath

Definition at line 2045 of file IfxCpu_IntrinsicsDcc.h.

◆ __sathu

#define __sathu Ifx__sathu

Definition at line 2049 of file IfxCpu_IntrinsicsDcc.h.

◆ __saturate

#define __saturate Ifx__saturate

Definition at line 1609 of file IfxCpu_IntrinsicsDcc.h.

◆ __saturate_stdreal

#define __saturate_stdreal Ifx__saturate_stdreal

Definition at line 1661 of file IfxCpu_IntrinsicsDcc.h.

◆ __saturatef

#define __saturatef Ifx__saturatef

Definition at line 1641 of file IfxCpu_IntrinsicsDcc.h.

◆ __saturateX

#define __saturateX Ifx__saturateX

Definition at line 1601 of file IfxCpu_IntrinsicsDcc.h.

◆ __setareg

#define __setareg Ifx__setareg

Definition at line 2093 of file IfxCpu_IntrinsicsDcc.h.

◆ __setbyte1

#define __setbyte1 Ifx__setbyte1

Definition at line 1977 of file IfxCpu_IntrinsicsDcc.h.

◆ __setbyte2

#define __setbyte2 Ifx__setbyte2

Definition at line 1981 of file IfxCpu_IntrinsicsDcc.h.

◆ __setbyte3

#define __setbyte3 Ifx__setbyte3

Definition at line 1985 of file IfxCpu_IntrinsicsDcc.h.

◆ __setbyte4

#define __setbyte4 Ifx__setbyte4

Definition at line 1989 of file IfxCpu_IntrinsicsDcc.h.

◆ __sethw1

#define __sethw1 Ifx__sethw1

Definition at line 1993 of file IfxCpu_IntrinsicsDcc.h.

◆ __sethw2

#define __sethw2 Ifx__sethw2

Definition at line 1997 of file IfxCpu_IntrinsicsDcc.h.

◆ __setStackPointer

#define __setStackPointer Ifx__setStackPointer

Definition at line 2109 of file IfxCpu_IntrinsicsDcc.h.

◆ __setubyte1

#define __setubyte1 Ifx__setubyte1

Definition at line 2001 of file IfxCpu_IntrinsicsDcc.h.

◆ __setubyte2

#define __setubyte2 Ifx__setubyte2

Definition at line 2005 of file IfxCpu_IntrinsicsDcc.h.

◆ __setubyte3

#define __setubyte3 Ifx__setubyte3

Definition at line 2009 of file IfxCpu_IntrinsicsDcc.h.

◆ __setubyte4

#define __setubyte4 Ifx__setubyte4

Definition at line 2013 of file IfxCpu_IntrinsicsDcc.h.

◆ __setuhw1

#define __setuhw1 Ifx__setuhw1

Definition at line 2017 of file IfxCpu_IntrinsicsDcc.h.

◆ __setuhw2

#define __setuhw2 Ifx__setuhw2

Definition at line 2021 of file IfxCpu_IntrinsicsDcc.h.

◆ __sfract_to_s16

#define __sfract_to_s16 Ifx__sfract_to_s16

Definition at line 1725 of file IfxCpu_IntrinsicsDcc.h.

◆ __sfract_to_u16

#define __sfract_to_u16 Ifx__sfract_to_u16

Definition at line 1729 of file IfxCpu_IntrinsicsDcc.h.

◆ __shaaccum

#define __shaaccum Ifx__shaaccum

Definition at line 1733 of file IfxCpu_IntrinsicsDcc.h.

◆ __shafracts

#define __shafracts Ifx__shafracts

Definition at line 1737 of file IfxCpu_IntrinsicsDcc.h.

◆ __shasfracts

#define __shasfracts Ifx__shasfracts

Definition at line 1741 of file IfxCpu_IntrinsicsDcc.h.

◆ __sqrf

#define __sqrf Ifx__sqrf

Definition at line 1613 of file IfxCpu_IntrinsicsDcc.h.

◆ __sqrtf

#define __sqrtf Ifx__sqrtf

Definition at line 1617 of file IfxCpu_IntrinsicsDcc.h.

◆ __stopPerfCounters

#define __stopPerfCounters Ifx__stopPerfCounters

Definition at line 2097 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxCpu_stopCounters().

◆ __subs

#define __subs Ifx__subs

Definition at line 2057 of file IfxCpu_IntrinsicsDcc.h.

◆ __subsu

#define __subsu Ifx__subsu

Definition at line 2061 of file IfxCpu_IntrinsicsDcc.h.

◆ __swap

#define __swap Ifx__swap

Definition at line 2085 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxAsclin_Spi_lock(), and IfxQspi_SpiMaster_lock().

◆ __u16_to_sfract

#define __u16_to_sfract Ifx__u16_to_sfract

Definition at line 1745 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__setareg

#define Ifx__setareg | ( | areg,
 |  | val
 | ) | ___setareg(areg,val)

Insert n NOP instruction

Definition at line 1455 of file IfxCpu_IntrinsicsDcc.h.

◆ NOP

#define NOP Ifx__NOP

Definition at line 2073 of file IfxCpu_IntrinsicsDcc.h.

Function Documentation

◆ Ifx__crc32()

asm volatile unsigned int Ifx__crc32 | ( | uint32 | b,
 |  | uint32 | a
 | ) |  |

Definition at line 1504 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxCpu_calculateCrc32().

◆ Ifx__fixpoint_to_float32()

asm float Ifx__fixpoint_to_float32 | ( | fract | value,
 |  | sint32 | shift
 | ) |  |

Convert a fixpoint value to float32.

This function converts a value from a fixpoint format to a float32 format.

Parameters
value | value to be converted.
shift | position of the fix point. Range = [-256, 255] => (Qx.y format where x = shift+1).
Returns
Returns the converted value in the float32 format.

Definition at line 1484 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__getA11()

asm volatile void* Ifx__getA11 ( void )

Definition at line 1491 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__getDataParamRet()

asm volatile unsigned int Ifx__getDataParamRet ( void )

Definition at line 88 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__jumpBackToLink()

asm volatile void Ifx__jumpBackToLink ( void )

Definition at line 111 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__jumpToFunction()

IFX_INLINE void Ifx__jumpToFunction ( const void * fun )

Definition at line 101 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__jumpToFunctionWithLink()

IFX_INLINE void Ifx__jumpToFunctionWithLink ( const void * fun )

Definition at line 106 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__moveToAddrParam0()

asm volatile void Ifx__moveToAddrParam0 ( const void * var )

Definition at line 94 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__moveToDataParam0()

asm volatile void Ifx__moveToDataParam0 ( unsigned int var )

Definition at line 74 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__moveToDataParamRet()

asm volatile void Ifx__moveToDataParamRet ( unsigned int var )

Definition at line 81 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__setStackPointer()

asm void Ifx__setStackPointer ( void * stackAddr )

Definition at line 1497 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__stopPerfCounters()

asm volatile void Ifx__stopPerfCounters ( void )

Definition at line 1465 of file IfxCpu_IntrinsicsDcc.h.

◆ IfxCpu_calculateCrc32()

IFX_INLINE unsigned int IfxCpu_calculateCrc32 | ( | uint32 * | startaddress,
 |  | uint8 | length
 | ) |  |

Definition at line 1511 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxPmsPm_handleStandbyRam().

◆ IfxCpu_getRandomVal()

asm volatile uint32 IfxCpu_getRandomVal | ( | uint32 | a,
 |  | uint32 | x,
 |  | uint32 | m
 | ) |  |

Generate the Random value.

This function generates the random value by taking a valid seed and limits.

Parameters
a | lower limit.
x | valid seed value.
m | upper limit.
Returns
Returns the random value.

Definition at line 1534 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxCpu_getRandomValue().


iLLD_TC38A: IfxCpu_IntrinsicsGhs.h File Reference

  • Cpu
  • Std
Macros | Typedefs | Functions
IfxCpu_IntrinsicsGhs.h File Reference
#include "Ifx_Types.h"
#include <intrinsics.h>
Include dependency graph for IfxCpu_IntrinsicsGhs.h:

Go to the source code of this file.

Macros

#define | STRINGIFY(x) #x
#define | Ifx__non_return_call(fun) __asm__ volatile ("ji %0"::"a"(fun))
#define | Ifx__mem_barrier __asm__ volatile("":::"memory");
#define | Ifx__minX(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxX(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturateX(X, Min, Max) ( Ifx__minX(Ifx__maxX(X, Min), Max) )
#define | Ifx__checkrangeX(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__saturate(X, Min, Max) ( __min(__max(X, Min), Max) )
#define | Ifx__saturateu(X, Min, Max) ( __minu(__maxu(X, Min), Max) )
#define | Ifx__sqrf(X) ((X) * (X))
#define | Ifx__sqrtf(X) sqrtf(X)
#define | Ifx__checkrange(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__roundf(X) ((((X) - (sint32)(X)) > 0.5) ? (1 + (sint32)(X)) : ((sint32)(X)))
#define | Ifx__absf(X) ( ((X) < 0.0) ? -(X) : (X) )
#define | Ifx__minf(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxf(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturatef(X, Min, Max) ( Ifx__minf(Ifx__maxf(X, Min), Max) )
#define | Ifx__checkrangef(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__abs_stdreal(X) ( ((X) > 0.0) ? (X) : -(X) )
#define | Ifx__min_stdreal(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__max_stdreal(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturate_stdreal(X, Min, Max) ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )
#define | Ifx__neqf(X, Y) ( ((X) > (Y)) || ((X) < (Y)) )
#define | Ifx__leqf(X, Y) ( !((X) > (Y)) )
#define | Ifx__geqf(X, Y) ( !((X) < (Y)) )
#define | Ifx__fract_to_sfract Ifx__round16
#define | Ifx__getbit(address, bitoffset) ((*(address) & (1U << (bitoffset))) != 0)
#define | Ifx__imaskldmst(address, value, bitoffset, bits) __imaskldmst((int *)address, value, bitoffset, bits)
#define | Ifx__putbit(value, address, bitoffset) Ifx__imaskldmst(address, value, bitoffset,1)
#define | Ifx__NOP(n) __asm(".rept " #n "\n\tnop\n\t.endr\n")
#define | Ifx__setareg(areg, val)
#define | __non_return_call Ifx__non_return_call
#define | __jump_and_link Ifx__jump_and_link
#define | __moveToDataParam0 Ifx__moveToDataParam0
#define | __moveToDataParamRet Ifx__moveToDataParamRet
#define | __getDataParamRet Ifx__getDataParamRet
#define | __moveToAddrParam0 Ifx__moveToAddrParam0
#define | __jumpToFunction Ifx__jumpToFunction
#define | __jumpToFunctionWithLink Ifx__jumpToFunctionWithLink
#define | __jumpBackToLink Ifx__jumpBackToLink
#define | __mem_barrier Ifx__mem_barrier
#define | __minX Ifx__minX
#define | __maxX Ifx__maxX
#define | __saturateX Ifx__saturateX
#define | __checkrangeX Ifx__checkrangeX
#define | __saturate Ifx__saturate
#define | __saturateu Ifx__saturateu
#define | __sqrf Ifx__sqrf
#define | __sqrtf Ifx__sqrtf
#define | __checkrange Ifx__checkrange
#define | __roundf Ifx__roundf
#define | __absf Ifx__absf
#define | __minf Ifx__minf
#define | __maxf Ifx__maxf
#define | __saturatef Ifx__saturatef
#define | __checkrangef Ifx__checkrangef
#define | __abs_stdreal Ifx__abs_stdreal
#define | __min_stdreal Ifx__min_stdreal
#define | __max_stdreal Ifx__max_stdreal
#define | __saturate_stdreal Ifx__saturate_stdreal
#define | __neqf Ifx__neqf
#define | __leqf Ifx__leqf
#define | __geqf Ifx__geqf
#define | __clssf Ifx__clssf
#define | __fract_to_float Ifx__fract_to_float
#define | __float_to_fract Ifx__float_to_fract
#define | __getfract Ifx__getfract
#define | __mac_r_sf Ifx__mac_r_sf
#define | __mac_sf Ifx__mac_sf
#define | __mulfractfract Ifx__mulfractfract
#define | __mulfractlong Ifx__mulfractlong
#define | __round16 Ifx__round16
#define | __fract_to_sfract Ifx__fract_to_sfract
#define | __float_to_sfract Ifx__float_to_sfract
#define | __s16_to_sfract Ifx__s16_to_sfract
#define | __sfract_to_s16 Ifx__sfract_to_s16
#define | __sfract_to_u16 Ifx__sfract_to_u16
#define | __shaaccum Ifx__shaaccum
#define | __shafracts Ifx__shafracts
#define | __shasfracts Ifx__shasfracts
#define | __u16_to_sfract Ifx__u16_to_sfract
#define | __extr Ifx__extr
#define | __extru Ifx__extru
#define | __getbit Ifx__getbit
#define | __insert Ifx__insert
#define | __putbit Ifx__putbit
#define | __cacheawi Ifx__cacheawi
#define | __cacheiwi Ifx__cacheiwi
#define | __cacheawi_bo_post_inc Ifx__cacheawi_bo_post_inc
#define | __mulsc Ifx__mulsc
#define | __rol Ifx__rol
#define | __ror Ifx__ror
#define | __extractbyte1 Ifx__extractbyte1
#define | __extractbyte2 Ifx__extractbyte2
#define | __extractbyte3 Ifx__extractbyte3
#define | __extractbyte4 Ifx__extractbyte4
#define | __extracthw1 Ifx__extracthw1
#define | __extracthw2 Ifx__extracthw2
#define | __extractubyte1 Ifx__extractubyte1
#define | __extractubyte2 Ifx__extractubyte2
#define | __extractubyte3 Ifx__extractubyte3
#define | __extractubyte4 Ifx__extractubyte4
#define | __extractuhw1 Ifx__extractuhw1
#define | __extractuhw2 Ifx__extractuhw2
#define | __getbyte1 Ifx__getbyte1
#define | __getbyte2 Ifx__getbyte2
#define | __getbyte3 Ifx__getbyte3
#define | __getbyte4 Ifx__getbyte4
#define | __gethw1 Ifx__gethw1
#define | __gethw2 Ifx__gethw2
#define | __getubyte1 Ifx__getubyte1
#define | __getubyte2 Ifx__getubyte2
#define | __getubyte3 Ifx__getubyte3
#define | __getubyte4 Ifx__getubyte4
#define | __getuhw1 Ifx__getuhw1
#define | __getuhw2 Ifx__getuhw2
#define | __initpackb Ifx__initpackb
#define | __initpackbl Ifx__initpackbl
#define | __initpackhw Ifx__initpackhw
#define | __initpackhwl Ifx__initpackhwl
#define | __initupackb Ifx__initupackb
#define | __initupackhw Ifx__initupackhw
#define | __insertbyte1 Ifx__insertbyte1
#define | __insertbyte2 Ifx__insertbyte2
#define | __insertbyte3 Ifx__insertbyte3
#define | __insertbyte4 Ifx__insertbyte4
#define | __insertubyte1 Ifx__insertubyte1
#define | __insertubyte2 Ifx__insertubyte2
#define | __insertubyte3 Ifx__insertubyte3
#define | __insertubyte4 Ifx__insertubyte4
#define | __inserthw1 Ifx__inserthw1
#define | __inserthw2 Ifx__inserthw2
#define | __insertuhw1 Ifx__insertuhw1
#define | __insertuhw2 Ifx__insertuhw2
#define | __setbyte1 Ifx__setbyte1
#define | __setbyte2 Ifx__setbyte2
#define | __setbyte3 Ifx__setbyte3
#define | __setbyte4 Ifx__setbyte4
#define | __sethw1 Ifx__sethw1
#define | __sethw2 Ifx__sethw2
#define | __setubyte1 Ifx__setubyte1
#define | __setubyte2 Ifx__setubyte2
#define | __setubyte3 Ifx__setubyte3
#define | __setubyte4 Ifx__setubyte4
#define | __setuhw1 Ifx__setuhw1
#define | __setuhw2 Ifx__setuhw2
#define | __ldmst Ifx__ldmst
#define | __nops Ifx__nops
#define | __swap Ifx__swap
#define | NOP Ifx__NOP
#define | __setareg Ifx__setareg
#define | __stopPerfCounters Ifx__stopPerfCounters
#define | __cmpAndSwap Ifx__cmpAndSwap
#define | __fixpoint_to_float32 Ifx__fixpoint_to_float32
#define | __getA11 Ifx__getA11
#define | __setStackPointer Ifx__setStackPointer
#define | __popcnt Ifx__popcnt
#define | __cacheai Ifx__cacheai

Typedefs

typedef void(* voidfunc) ()

Functions

IFX_INLINE void | Ifx__jump_and_link (void(*fun)(void))
IFX_INLINE void | Ifx__moveToDataParam0 (unsigned int var)
IFX_INLINE void | Ifx__moveToDataParamRet (unsigned int var)
IFX_INLINE unsigned int | Ifx__getDataParamRet (void)
IFX_INLINE void | Ifx__moveToAddrParam0 (const void *var)
IFX_INLINE void | Ifx__jumpToFunction (void(*fun)(void))
IFX_INLINE void | Ifx__jumpToFunctionWithLink (void(*fun)(void))
IFX_INLINE void | Ifx__jumpBackToLink (void)
IFX_INLINE sint16 | Ifx__clssf (sfract a)
IFX_INLINE float | Ifx__fract_to_float (fract a)
IFX_INLINE fract | Ifx__float_to_fract (float a)
IFX_INLINE fract | Ifx__getfract (laccum a)
IFX_INLINE sfract | Ifx__mac_r_sf (sfract a, sfract b, sfract c)
IFX_INLINE sfract | Ifx__mac_sf (sfract a, sfract b, sfract c)
IFX_INLINE long | Ifx__mulfractfract (fract a, fract b)
IFX_INLINE long | Ifx__mulfractlong (fract a, long b)
IFX_INLINE sfract | Ifx__round16 (fract a)
IFX_INLINE sfract | Ifx__float_to_sfract (float a)
IFX_INLINE sfract | Ifx__s16_to_sfract (sint16 a)
IFX_INLINE sint16 | Ifx__sfract_to_s16 (sfract a)
IFX_INLINE uint16 | Ifx__sfract_to_u16 (sfract a)
__asm__ laccum | Ifx__shaaccum (laccum a, sint32 b)
IFX_INLINE fract | Ifx__shafracts (fract a, sint32 b)
IFX_INLINE sfract | Ifx__shasfracts (sfract a, sint32 b)
IFX_INLINE sfract | Ifx__u16_to_sfract (uint16 a)
IFX_INLINE sint32 | Ifx__extr (sint32 a, uint32 p, uint32 w)
IFX_INLINE uint32 | Ifx__extru (uint32 a, uint32 p, uint32 w)
IFX_INLINE sint32 | Ifx__insert (sint32 a, sint32 b, sint32 p, const sint32 w)
IFX_INLINE void | Ifx__cacheawi (uint8 *p)
IFX_INLINE void | Ifx__cacheiwi (uint8 *p)
IFX_INLINE uint8 * | Ifx__cacheawi_bo_post_inc (uint8 *p)
IFX_INLINE sint32 | Ifx__mulsc (sint32 a, sint32 b, sint32 offset)
IFX_INLINE uint32 | Ifx__rol (uint32 operand, uint32 count)
IFX_INLINE uint32 | Ifx__ror (uint32 operand, uint32 count)
IFX_INLINE sint8 | Ifx__extractbyte1 (__packb a)
IFX_INLINE sint8 | Ifx__extractbyte2 (__packb a)
IFX_INLINE sint8 | Ifx__extractbyte3 (__packb a)
IFX_INLINE sint8 | Ifx__extractbyte4 (__packb a)
IFX_INLINE sint16 | Ifx__extracthw1 (__packhw a)
IFX_INLINE sint16 | Ifx__extracthw2 (__packhw a)
IFX_INLINE uint8 | Ifx__extractubyte1 (__upackb a)
IFX_INLINE uint8 | Ifx__extractubyte2 (__upackb a)
IFX_INLINE uint8 | Ifx__extractubyte3 (__upackb a)
IFX_INLINE uint8 | Ifx__extractubyte4 (__upackb a)
IFX_INLINE uint16 | Ifx__extractuhw1 (__upackhw a)
IFX_INLINE uint16 | Ifx__extractuhw2 (__upackhw a)
IFX_INLINE sint8 | Ifx__getbyte1 (__packb *a)
IFX_INLINE sint8 | Ifx__getbyte2 (__packb *a)
IFX_INLINE sint8 | Ifx__getbyte3 (__packb *a)
IFX_INLINE sint8 | Ifx__getbyte4 (__packb *a)
IFX_INLINE sint16 | Ifx__gethw1 (__packhw *a)
IFX_INLINE sint16 | Ifx__gethw2 (__packhw *a)
IFX_INLINE uint8 | Ifx__getubyte1 (__upackb *a)
IFX_INLINE uint8 | Ifx__getubyte2 (__upackb *a)
IFX_INLINE uint8 | Ifx__getubyte3 (__upackb *a)
IFX_INLINE uint8 | Ifx__getubyte4 (__upackb *a)
IFX_INLINE uint16 | Ifx__getuhw1 (__upackhw *a)
IFX_INLINE uint16 | Ifx__getuhw2 (__upackhw *a)
IFX_INLINE __packb | Ifx__initpackb (sint32 a, sint32 b, sint32 c, sint32 d)
IFX_INLINE __packb | Ifx__initpackbl (long a)
IFX_INLINE __packhw | Ifx__initpackhw (sint16 a, sint16 b)
IFX_INLINE __packhw | Ifx__initpackhwl (long a)
IFX_INLINE __upackb | Ifx__initupackb (uint32 a, uint32 b, uint32 c, uint32 d)
IFX_INLINE __upackhw | Ifx__initupackhw (uint16 a, uint16 b)
IFX_INLINE __packb | Ifx__insertbyte1 (__packb a, sint8 b)
IFX_INLINE __packb | Ifx__insertbyte2 (__packb a, sint8 b)
IFX_INLINE __packb | Ifx__insertbyte3 (__packb a, sint8 b)
IFX_INLINE __packb | Ifx__insertbyte4 (__packb a, sint8 b)
IFX_INLINE __upackb | Ifx__insertubyte1 (__upackb a, uint8 b)
IFX_INLINE __upackb | Ifx__insertubyte2 (__upackb a, uint8 b)
IFX_INLINE __upackb | Ifx__insertubyte3 (__upackb a, uint8 b)
IFX_INLINE __upackb | Ifx__insertubyte4 (__upackb a, uint8 b)
IFX_INLINE __packhw | Ifx__inserthw1 (__packhw a, sint16 b)
IFX_INLINE __packhw | Ifx__inserthw2 (__packhw a, sint16 b)
IFX_INLINE __upackhw | Ifx__insertuhw1 (__upackhw a, uint16 b)
IFX_INLINE __upackhw | Ifx__insertuhw2 (__upackhw a, uint16 b)
IFX_INLINE void | Ifx__setbyte1 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__setbyte2 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__setbyte3 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__setbyte4 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__sethw1 (__packhw *a, sint16 b)
IFX_INLINE void | Ifx__sethw2 (__packhw *a, sint16 b)
IFX_INLINE void | Ifx__setubyte1 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setubyte2 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setubyte3 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setubyte4 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setuhw1 (__upackhw *a, uint16 b)
IFX_INLINE void | Ifx__setuhw2 (__upackhw *a, uint16 b)
IFX_INLINE void | Ifx__ldmst (volatile void *address, uint32 mask, uint32 value)
IFX_INLINE void | Ifx__nops (void *cnt)
IFX_INLINE uint32 | Ifx__swap (void *place, uint32 value)
IFX_INLINE void | Ifx__stopPerfCounters (void)
IFX_INLINE unsigned int | Ifx__cmpAndSwap (unsigned int volatile *address, unsigned int value, unsigned int condition)
This function is a implementation of a binary semaphore using compare and swap instruction. More...
IFX_INLINE float32 | Ifx__fixpoint_to_float32 (fract value, sint32 shift)
Convert a fixpoint value to float32. More...
IFX_INLINE void * | Ifx__getA11 (void)
IFX_INLINE void | Ifx__setStackPointer (void *stackAddr)
IFX_INLINE uint32 | IfxCpu_calculateCrc32 (uint32 *startaddress, uint8 length)
IFX_INLINE uint32 | IfxCpu_getRandomVal (uint32 a, uint32 x, uint32 m)
IFX_INLINE void | Ifx__cacheai (uint8 *p)

Detailed Description

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCpu_IntrinsicsGhs.h.

Macro Definition Documentation

◆ __abs_stdreal

#define __abs_stdreal Ifx__abs_stdreal

Definition at line 1294 of file IfxCpu_IntrinsicsGhs.h.

◆ __absf

#define __absf Ifx__absf

Definition at line 1274 of file IfxCpu_IntrinsicsGhs.h.

◆ __cacheai

#define __cacheai Ifx__cacheai

Definition at line 1698 of file IfxCpu_IntrinsicsGhs.h.

◆ __cacheawi

#define __cacheawi Ifx__cacheawi

Definition at line 1414 of file IfxCpu_IntrinsicsGhs.h.

◆ __cacheawi_bo_post_inc

#define __cacheawi_bo_post_inc Ifx__cacheawi_bo_post_inc

Definition at line 1422 of file IfxCpu_IntrinsicsGhs.h.

◆ __cacheiwi

#define __cacheiwi Ifx__cacheiwi

Definition at line 1418 of file IfxCpu_IntrinsicsGhs.h.

◆ __checkrange

#define __checkrange Ifx__checkrange

Definition at line 1266 of file IfxCpu_IntrinsicsGhs.h.

◆ __checkrangef

#define __checkrangef Ifx__checkrangef

Definition at line 1290 of file IfxCpu_IntrinsicsGhs.h.

◆ __checkrangeX

#define __checkrangeX Ifx__checkrangeX

Definition at line 1246 of file IfxCpu_IntrinsicsGhs.h.

◆ __clssf

#define __clssf Ifx__clssf

Definition at line 1322 of file IfxCpu_IntrinsicsGhs.h.

◆ __cmpAndSwap

#define __cmpAndSwap Ifx__cmpAndSwap

Definition at line 1678 of file IfxCpu_IntrinsicsGhs.h.

◆ __extr

#define __extr Ifx__extr

Definition at line 1394 of file IfxCpu_IntrinsicsGhs.h.

◆ __extractbyte1

#define __extractbyte1 Ifx__extractbyte1

Definition at line 1438 of file IfxCpu_IntrinsicsGhs.h.

◆ __extractbyte2

#define __extractbyte2 Ifx__extractbyte2

Definition at line 1442 of file IfxCpu_IntrinsicsGhs.h.

◆ __extractbyte3

#define __extractbyte3 Ifx__extractbyte3

Definition at line 1446 of file IfxCpu_IntrinsicsGhs.h.

◆ __extractbyte4

#define __extractbyte4 Ifx__extractbyte4

Definition at line 1450 of file IfxCpu_IntrinsicsGhs.h.

◆ __extracthw1

#define __extracthw1 Ifx__extracthw1

Definition at line 1454 of file IfxCpu_IntrinsicsGhs.h.

◆ __extracthw2

#define __extracthw2 Ifx__extracthw2

Definition at line 1458 of file IfxCpu_IntrinsicsGhs.h.

◆ __extractubyte1

#define __extractubyte1 Ifx__extractubyte1

Definition at line 1462 of file IfxCpu_IntrinsicsGhs.h.

◆ __extractubyte2

#define __extractubyte2 Ifx__extractubyte2

Definition at line 1466 of file IfxCpu_IntrinsicsGhs.h.

◆ __extractubyte3

#define __extractubyte3 Ifx__extractubyte3

Definition at line 1470 of file IfxCpu_IntrinsicsGhs.h.

◆ __extractubyte4

#define __extractubyte4 Ifx__extractubyte4

Definition at line 1474 of file IfxCpu_IntrinsicsGhs.h.

◆ __extractuhw1

#define __extractuhw1 Ifx__extractuhw1

Definition at line 1478 of file IfxCpu_IntrinsicsGhs.h.

◆ __extractuhw2

#define __extractuhw2 Ifx__extractuhw2

Definition at line 1482 of file IfxCpu_IntrinsicsGhs.h.

◆ __extru

#define __extru Ifx__extru

Definition at line 1398 of file IfxCpu_IntrinsicsGhs.h.

◆ __fixpoint_to_float32

#define __fixpoint_to_float32 Ifx__fixpoint_to_float32

Definition at line 1682 of file IfxCpu_IntrinsicsGhs.h.

◆ __float_to_fract

#define __float_to_fract Ifx__float_to_fract

Definition at line 1330 of file IfxCpu_IntrinsicsGhs.h.

◆ __float_to_sfract

#define __float_to_sfract Ifx__float_to_sfract

Definition at line 1362 of file IfxCpu_IntrinsicsGhs.h.

◆ __fract_to_float

#define __fract_to_float Ifx__fract_to_float

Definition at line 1326 of file IfxCpu_IntrinsicsGhs.h.

◆ __fract_to_sfract

#define __fract_to_sfract Ifx__fract_to_sfract

Definition at line 1358 of file IfxCpu_IntrinsicsGhs.h.

◆ __geqf

#define __geqf Ifx__geqf

Definition at line 1318 of file IfxCpu_IntrinsicsGhs.h.

◆ __getA11

#define __getA11 Ifx__getA11

Definition at line 1686 of file IfxCpu_IntrinsicsGhs.h.

◆ __getbit

#define __getbit Ifx__getbit

Definition at line 1402 of file IfxCpu_IntrinsicsGhs.h.

◆ __getbyte1

#define __getbyte1 Ifx__getbyte1

Definition at line 1486 of file IfxCpu_IntrinsicsGhs.h.

◆ __getbyte2

#define __getbyte2 Ifx__getbyte2

Definition at line 1490 of file IfxCpu_IntrinsicsGhs.h.

◆ __getbyte3

#define __getbyte3 Ifx__getbyte3

Definition at line 1494 of file IfxCpu_IntrinsicsGhs.h.

◆ __getbyte4

#define __getbyte4 Ifx__getbyte4

Definition at line 1498 of file IfxCpu_IntrinsicsGhs.h.

◆ __getDataParamRet

#define __getDataParamRet Ifx__getDataParamRet

Definition at line 1210 of file IfxCpu_IntrinsicsGhs.h.

◆ __getfract

#define __getfract Ifx__getfract

Definition at line 1334 of file IfxCpu_IntrinsicsGhs.h.

◆ __gethw1

#define __gethw1 Ifx__gethw1

Definition at line 1502 of file IfxCpu_IntrinsicsGhs.h.

◆ __gethw2

#define __gethw2 Ifx__gethw2

Definition at line 1506 of file IfxCpu_IntrinsicsGhs.h.

◆ __getubyte1

#define __getubyte1 Ifx__getubyte1

Definition at line 1510 of file IfxCpu_IntrinsicsGhs.h.

◆ __getubyte2

#define __getubyte2 Ifx__getubyte2

Definition at line 1514 of file IfxCpu_IntrinsicsGhs.h.

◆ __getubyte3

#define __getubyte3 Ifx__getubyte3

Definition at line 1518 of file IfxCpu_IntrinsicsGhs.h.

◆ __getubyte4

#define __getubyte4 Ifx__getubyte4

Definition at line 1522 of file IfxCpu_IntrinsicsGhs.h.

◆ __getuhw1

#define __getuhw1 Ifx__getuhw1

Definition at line 1526 of file IfxCpu_IntrinsicsGhs.h.

◆ __getuhw2

#define __getuhw2 Ifx__getuhw2

Definition at line 1530 of file IfxCpu_IntrinsicsGhs.h.

◆ __initpackb

#define __initpackb Ifx__initpackb

Definition at line 1534 of file IfxCpu_IntrinsicsGhs.h.

◆ __initpackbl

#define __initpackbl Ifx__initpackbl

Definition at line 1538 of file IfxCpu_IntrinsicsGhs.h.

◆ __initpackhw

#define __initpackhw Ifx__initpackhw

Definition at line 1542 of file IfxCpu_IntrinsicsGhs.h.

◆ __initpackhwl

#define __initpackhwl Ifx__initpackhwl

Definition at line 1546 of file IfxCpu_IntrinsicsGhs.h.

◆ __initupackb

#define __initupackb Ifx__initupackb

Definition at line 1550 of file IfxCpu_IntrinsicsGhs.h.

◆ __initupackhw

#define __initupackhw Ifx__initupackhw

Definition at line 1554 of file IfxCpu_IntrinsicsGhs.h.

◆ __insert

#define __insert Ifx__insert

Definition at line 1406 of file IfxCpu_IntrinsicsGhs.h.

◆ __insertbyte1

#define __insertbyte1 Ifx__insertbyte1

Definition at line 1558 of file IfxCpu_IntrinsicsGhs.h.

◆ __insertbyte2

#define __insertbyte2 Ifx__insertbyte2

Definition at line 1562 of file IfxCpu_IntrinsicsGhs.h.

◆ __insertbyte3

#define __insertbyte3 Ifx__insertbyte3

Definition at line 1566 of file IfxCpu_IntrinsicsGhs.h.

◆ __insertbyte4

#define __insertbyte4 Ifx__insertbyte4

Definition at line 1570 of file IfxCpu_IntrinsicsGhs.h.

◆ __inserthw1

#define __inserthw1 Ifx__inserthw1

Definition at line 1590 of file IfxCpu_IntrinsicsGhs.h.

◆ __inserthw2

#define __inserthw2 Ifx__inserthw2

Definition at line 1594 of file IfxCpu_IntrinsicsGhs.h.

◆ __insertubyte1

#define __insertubyte1 Ifx__insertubyte1

Definition at line 1574 of file IfxCpu_IntrinsicsGhs.h.

◆ __insertubyte2

#define __insertubyte2 Ifx__insertubyte2

Definition at line 1578 of file IfxCpu_IntrinsicsGhs.h.

◆ __insertubyte3

#define __insertubyte3 Ifx__insertubyte3

Definition at line 1582 of file IfxCpu_IntrinsicsGhs.h.

◆ __insertubyte4

#define __insertubyte4 Ifx__insertubyte4

Definition at line 1586 of file IfxCpu_IntrinsicsGhs.h.

◆ __insertuhw1

#define __insertuhw1 Ifx__insertuhw1

Definition at line 1598 of file IfxCpu_IntrinsicsGhs.h.

◆ __insertuhw2

#define __insertuhw2 Ifx__insertuhw2

Definition at line 1602 of file IfxCpu_IntrinsicsGhs.h.

◆ __jump_and_link

#define __jump_and_link Ifx__jump_and_link

Definition at line 1198 of file IfxCpu_IntrinsicsGhs.h.

◆ __jumpBackToLink

#define __jumpBackToLink Ifx__jumpBackToLink

Definition at line 1226 of file IfxCpu_IntrinsicsGhs.h.

◆ __jumpToFunction

#define __jumpToFunction Ifx__jumpToFunction

Definition at line 1218 of file IfxCpu_IntrinsicsGhs.h.

◆ __jumpToFunctionWithLink

#define __jumpToFunctionWithLink Ifx__jumpToFunctionWithLink

Definition at line 1222 of file IfxCpu_IntrinsicsGhs.h.

◆ __ldmst

#define __ldmst Ifx__ldmst

Definition at line 1654 of file IfxCpu_IntrinsicsGhs.h.

◆ __leqf

#define __leqf Ifx__leqf

Definition at line 1314 of file IfxCpu_IntrinsicsGhs.h.

◆ __mac_r_sf

#define __mac_r_sf Ifx__mac_r_sf

Definition at line 1338 of file IfxCpu_IntrinsicsGhs.h.

◆ __mac_sf

#define __mac_sf Ifx__mac_sf

Definition at line 1342 of file IfxCpu_IntrinsicsGhs.h.

◆ __max_stdreal

#define __max_stdreal Ifx__max_stdreal

Definition at line 1302 of file IfxCpu_IntrinsicsGhs.h.

◆ __maxf

#define __maxf Ifx__maxf

Definition at line 1282 of file IfxCpu_IntrinsicsGhs.h.

◆ __maxX

#define __maxX Ifx__maxX

Definition at line 1238 of file IfxCpu_IntrinsicsGhs.h.

◆ __mem_barrier

#define __mem_barrier Ifx__mem_barrier

Definition at line 1230 of file IfxCpu_IntrinsicsGhs.h.

◆ __min_stdreal

#define __min_stdreal Ifx__min_stdreal

Definition at line 1298 of file IfxCpu_IntrinsicsGhs.h.

◆ __minf

#define __minf Ifx__minf

Definition at line 1278 of file IfxCpu_IntrinsicsGhs.h.

◆ __minX

#define __minX Ifx__minX

Definition at line 1234 of file IfxCpu_IntrinsicsGhs.h.

◆ __moveToAddrParam0

#define __moveToAddrParam0 Ifx__moveToAddrParam0

Definition at line 1214 of file IfxCpu_IntrinsicsGhs.h.

◆ __moveToDataParam0

#define __moveToDataParam0 Ifx__moveToDataParam0

Definition at line 1202 of file IfxCpu_IntrinsicsGhs.h.

◆ __moveToDataParamRet

#define __moveToDataParamRet Ifx__moveToDataParamRet

Definition at line 1206 of file IfxCpu_IntrinsicsGhs.h.

◆ __mulfractfract

#define __mulfractfract Ifx__mulfractfract

Definition at line 1346 of file IfxCpu_IntrinsicsGhs.h.

◆ __mulfractlong

#define __mulfractlong Ifx__mulfractlong

Definition at line 1350 of file IfxCpu_IntrinsicsGhs.h.

◆ __mulsc

#define __mulsc Ifx__mulsc

Definition at line 1426 of file IfxCpu_IntrinsicsGhs.h.

◆ __neqf

#define __neqf Ifx__neqf

Definition at line 1310 of file IfxCpu_IntrinsicsGhs.h.

◆ __non_return_call

#define __non_return_call Ifx__non_return_call

Definition at line 1194 of file IfxCpu_IntrinsicsGhs.h.

◆ __nops

#define __nops Ifx__nops

Definition at line 1658 of file IfxCpu_IntrinsicsGhs.h.

◆ __popcnt

#define __popcnt Ifx__popcnt

Definition at line 1694 of file IfxCpu_IntrinsicsGhs.h.

◆ __putbit

#define __putbit Ifx__putbit

Definition at line 1410 of file IfxCpu_IntrinsicsGhs.h.

◆ __rol

#define __rol Ifx__rol

Definition at line 1430 of file IfxCpu_IntrinsicsGhs.h.

◆ __ror

#define __ror Ifx__ror

Definition at line 1434 of file IfxCpu_IntrinsicsGhs.h.

◆ __round16

#define __round16 Ifx__round16

Definition at line 1354 of file IfxCpu_IntrinsicsGhs.h.

◆ __roundf

#define __roundf Ifx__roundf

Definition at line 1270 of file IfxCpu_IntrinsicsGhs.h.

◆ __s16_to_sfract

#define __s16_to_sfract Ifx__s16_to_sfract

Definition at line 1366 of file IfxCpu_IntrinsicsGhs.h.

◆ __saturate

#define __saturate Ifx__saturate

Definition at line 1250 of file IfxCpu_IntrinsicsGhs.h.

◆ __saturate_stdreal

#define __saturate_stdreal Ifx__saturate_stdreal

Definition at line 1306 of file IfxCpu_IntrinsicsGhs.h.

◆ __saturatef

#define __saturatef Ifx__saturatef

Definition at line 1286 of file IfxCpu_IntrinsicsGhs.h.

◆ __saturateu

#define __saturateu Ifx__saturateu

Definition at line 1254 of file IfxCpu_IntrinsicsGhs.h.

◆ __saturateX

#define __saturateX Ifx__saturateX

Definition at line 1242 of file IfxCpu_IntrinsicsGhs.h.

◆ __setareg

#define __setareg Ifx__setareg

Definition at line 1670 of file IfxCpu_IntrinsicsGhs.h.

◆ __setbyte1

#define __setbyte1 Ifx__setbyte1

Definition at line 1606 of file IfxCpu_IntrinsicsGhs.h.

◆ __setbyte2

#define __setbyte2 Ifx__setbyte2

Definition at line 1610 of file IfxCpu_IntrinsicsGhs.h.

◆ __setbyte3

#define __setbyte3 Ifx__setbyte3

Definition at line 1614 of file IfxCpu_IntrinsicsGhs.h.

◆ __setbyte4

#define __setbyte4 Ifx__setbyte4

Definition at line 1618 of file IfxCpu_IntrinsicsGhs.h.

◆ __sethw1

#define __sethw1 Ifx__sethw1

Definition at line 1622 of file IfxCpu_IntrinsicsGhs.h.

◆ __sethw2

#define __sethw2 Ifx__sethw2

Definition at line 1626 of file IfxCpu_IntrinsicsGhs.h.

◆ __setStackPointer

#define __setStackPointer Ifx__setStackPointer

Definition at line 1690 of file IfxCpu_IntrinsicsGhs.h.

◆ __setubyte1

#define __setubyte1 Ifx__setubyte1

Definition at line 1630 of file IfxCpu_IntrinsicsGhs.h.

◆ __setubyte2

#define __setubyte2 Ifx__setubyte2

Definition at line 1634 of file IfxCpu_IntrinsicsGhs.h.

◆ __setubyte3

#define __setubyte3 Ifx__setubyte3

Definition at line 1638 of file IfxCpu_IntrinsicsGhs.h.

◆ __setubyte4

#define __setubyte4 Ifx__setubyte4

Definition at line 1642 of file IfxCpu_IntrinsicsGhs.h.

◆ __setuhw1

#define __setuhw1 Ifx__setuhw1

Definition at line 1646 of file IfxCpu_IntrinsicsGhs.h.

◆ __setuhw2

#define __setuhw2 Ifx__setuhw2

Definition at line 1650 of file IfxCpu_IntrinsicsGhs.h.

◆ __sfract_to_s16

#define __sfract_to_s16 Ifx__sfract_to_s16

Definition at line 1370 of file IfxCpu_IntrinsicsGhs.h.

◆ __sfract_to_u16

#define __sfract_to_u16 Ifx__sfract_to_u16

Definition at line 1374 of file IfxCpu_IntrinsicsGhs.h.

◆ __shaaccum

#define __shaaccum Ifx__shaaccum

Definition at line 1378 of file IfxCpu_IntrinsicsGhs.h.

◆ __shafracts

#define __shafracts Ifx__shafracts

Definition at line 1382 of file IfxCpu_IntrinsicsGhs.h.

◆ __shasfracts

#define __shasfracts Ifx__shasfracts

Definition at line 1386 of file IfxCpu_IntrinsicsGhs.h.

◆ __sqrf

#define __sqrf Ifx__sqrf

Definition at line 1258 of file IfxCpu_IntrinsicsGhs.h.

◆ __sqrtf

#define __sqrtf Ifx__sqrtf

Definition at line 1262 of file IfxCpu_IntrinsicsGhs.h.

◆ __stopPerfCounters

#define __stopPerfCounters Ifx__stopPerfCounters

Definition at line 1674 of file IfxCpu_IntrinsicsGhs.h.

◆ __swap

#define __swap Ifx__swap

Definition at line 1662 of file IfxCpu_IntrinsicsGhs.h.

◆ __u16_to_sfract

#define __u16_to_sfract Ifx__u16_to_sfract

Definition at line 1390 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__mem_barrier

#define Ifx__mem_barrier __asm__ volatile("":::"memory");

Insert a memory barrier

Definition at line 108 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__non_return_call

#define Ifx__non_return_call ( fun ) __asm__ volatile ("ji %0"::"a"(fun))

Function call without return

Definition at line 60 of file IfxCpu_IntrinsicsGhs.h.

Referenced by Ifx__jumpToFunction().

◆ Ifx__setareg

#define Ifx__setareg | ( | areg,
 |  | val
 | ) |
Value:
{ uint32 reg_val= (uint32)val; \
asm volatile (" mov.a\t %"#areg",%0"::"d"(reg_val)); }
uint32
unsigned long uint32
Definition: Platform_Types.h:116

Definition at line 1082 of file IfxCpu_IntrinsicsGhs.h.

◆ NOP

#define NOP Ifx__NOP

Definition at line 1666 of file IfxCpu_IntrinsicsGhs.h.

◆ STRINGIFY

#define STRINGIFY ( x ) #x

Definition at line 54 of file IfxCpu_IntrinsicsGhs.h.

Typedef Documentation

◆ voidfunc

typedef void(* voidfunc) ()

Definition at line 56 of file IfxCpu_IntrinsicsGhs.h.

Function Documentation

◆ Ifx__cacheai()

IFX_INLINE void Ifx__cacheai ( uint8 * p )

Invalidate cache address "p". Generates CACHEA.I [Ab].

Definition at line 1185 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__cmpAndSwap()

IFX_INLINE unsigned int Ifx__cmpAndSwap | ( | unsigned int volatile * | address,
 |  | unsigned int | value,
 |  | unsigned int | condition
 | ) |  |

This function is a implementation of a binary semaphore using compare and swap instruction.

Parameters
address | address of resource.
value | This variable is updated with status of address
condition | if the value of address matches with the value of condition, then swap of value & address occurs.

Definition at line 1102 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__fixpoint_to_float32()

IFX_INLINE float32 Ifx__fixpoint_to_float32 | ( | fract | value,
 |  | sint32 | shift
 | ) |  |

Convert a fixpoint value to float32.

This function converts a value from a fixpoint format to a float32 format.

Parameters
value | value to be converted.
shift | position of the fix point. Range = [-256, 255] => (Qx.y format where x = shift+1).
Returns
Returns the converted value in the float32 format.

Definition at line 1126 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__getA11()

IFX_INLINE void* Ifx__getA11 ( void )

Definition at line 1134 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__getDataParamRet()

IFX_INLINE unsigned int Ifx__getDataParamRet ( void )

Definition at line 79 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__jump_and_link()

IFX_INLINE void Ifx__jump_and_link ( void(*)(void) fun )

Jump and link

Definition at line 64 of file IfxCpu_IntrinsicsGhs.h.

Referenced by Ifx__jumpToFunctionWithLink().

◆ Ifx__jumpBackToLink()

IFX_INLINE void Ifx__jumpBackToLink ( void )

Definition at line 101 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__jumpToFunction()

IFX_INLINE void Ifx__jumpToFunction ( void(*)(void) fun )

Definition at line 91 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__jumpToFunctionWithLink()

IFX_INLINE void Ifx__jumpToFunctionWithLink ( void(*)(void) fun )

Definition at line 96 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__moveToAddrParam0()

IFX_INLINE void Ifx__moveToAddrParam0 ( const void * var )

Definition at line 86 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__moveToDataParam0()

IFX_INLINE void Ifx__moveToDataParam0 ( unsigned int var )

Definition at line 69 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__moveToDataParamRet()

IFX_INLINE void Ifx__moveToDataParamRet ( unsigned int var )

Definition at line 74 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__setStackPointer()

IFX_INLINE void Ifx__setStackPointer ( void * stackAddr )

Definition at line 1141 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__stopPerfCounters()

IFX_INLINE void Ifx__stopPerfCounters ( void )

__mtcr (CPU_CCTRL, 0);

Definition at line 1088 of file IfxCpu_IntrinsicsGhs.h.

◆ IfxCpu_calculateCrc32()

IFX_INLINE uint32 IfxCpu_calculateCrc32 | ( | uint32 * | startaddress,
 |  | uint8 | length
 | ) |  |

Definition at line 1146 of file IfxCpu_IntrinsicsGhs.h.

◆ IfxCpu_getRandomVal()

IFX_INLINE uint32 IfxCpu_getRandomVal | ( | uint32 | a,
 |  | uint32 | x,
 |  | uint32 | m
 | ) |  |

Definition at line 1158 of file IfxCpu_IntrinsicsGhs.h.


iLLD_TC38A: IfxCpu_IntrinsicsGnuc.h File Reference

  • Cpu
  • Std
Macros | Functions
IfxCpu_IntrinsicsGnuc.h File Reference
#include "Ifx_Types.h"
#include "machine/intrinsics.h"
Include dependency graph for IfxCpu_IntrinsicsGnuc.h:

Go to the source code of this file.

Macros

#define | IFXCPU_INTRINSICSGNUC_USE_MACHINE_INTRINSICS 1
#define | STRINGIFY(x) #x
#define | Ifx__non_return_call(fun) __asm__ volatile ("ji %0"::"a"(fun))
#define | Ifx__minX(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxX(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturateX(X, Min, Max) ( Ifx__minX(Ifx__maxX(X, Min), Max) )
#define | Ifx__checkrangeX(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__saturate(X, Min, Max) ( Ifx__min(Ifx__max(X, Min), Max) )
#define | Ifx__saturateu(X, Min, Max) ( Ifx__minu(Ifx__maxu(X, Min), Max) )
#define | Ifx__sqrf(X) ((X) * (X))
#define | Ifx__sqrtf(X) sqrtf(X)
#define | Ifx__checkrange(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__roundf(X) ((((X) - (sint32)(X)) > 0.5) ? (1 + (sint32)(X)) : ((sint32)(X)))
#define | Ifx__absf(X) ( ((X) < 0.0) ? -(X) : (X) )
#define | Ifx__minf(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxf(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturatef(X, Min, Max) ( Ifx__minf(Ifx__maxf(X, Min), Max) )
#define | Ifx__checkrangef(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__abs_stdreal(X) ( ((X) > 0.0) ? (X) : -(X) )
#define | Ifx__min_stdreal(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__max_stdreal(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturate_stdreal(X, Min, Max) ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )
#define | Ifx__neqf(X, Y) ( ((X) > (Y)) || ((X) < (Y)) )
#define | Ifx__leqf(X, Y) ( !((X) > (Y)) )
#define | Ifx__geqf(X, Y) ( !((X) < (Y)) )
#define | Ifx__getbit(address, bitoffset) ((*(address) & (1U << (bitoffset))) != 0)
#define | Ifx__imaskldmst(address, value, bitoffset, bits)
#define | Ifx__putbit(value, address, bitoffset) Ifx__imaskldmst(address, value, bitoffset,1)
#define | Ifx__disable() __asm__ volatile ("disable" : : : "memory")
#define | Ifx__enable() __asm__ volatile ("enable" : : : "memory")
#define | Ifx__abs(a) __builtin_abs(a)
#define | Ifx__clz(a) __builtin_clz(a)
#define | Ifx__mem_barrier __asm__ volatile("":::"memory");
#define | Ifx__NOP(n) __asm(".rept " #n "\n\tnop\n\t.endr\n")
#define | Ifx__setareg(areg, val)
#define | __non_return_call Ifx__non_return_call
#define | __jump_and_link Ifx__jump_and_link
#define | __moveToDataParam0 Ifx__moveToDataParam0
#define | __moveToDataParamRet Ifx__moveToDataParamRet
#define | __getDataParamRet Ifx__getDataParamRet
#define | __moveToAddrParam0 Ifx__moveToAddrParam0
#define | __jumpToFunction Ifx__jumpToFunction
#define | __jumpToFunctionWithLink Ifx__jumpToFunctionWithLink
#define | __jumpBackToLink Ifx__jumpBackToLink
#define | __minX Ifx__minX
#define | __maxX Ifx__maxX
#define | __saturateX Ifx__saturateX
#define | __checkrangeX Ifx__checkrangeX
#define | __saturate Ifx__saturate
#define | __saturateu Ifx__saturateu
#define | __max Ifx__max
#define | __maxs Ifx__maxs
#define | __maxu Ifx__maxu
#define | __min Ifx__min
#define | __mins Ifx__mins
#define | __minu Ifx__minu
#define | __sqrtf Ifx__sqrtf
#define | __sqrf Ifx__sqrf
#define | __checkrange Ifx__checkrange
#define | __roundf Ifx__roundf
#define | __absf Ifx__absf
#define | __saturatef Ifx__saturatef
#define | __minf Ifx__minf
#define | __maxf Ifx__maxf
#define | __checkrangef Ifx__checkrangef
#define | __abs_stdreal Ifx__abs_stdreal
#define | __saturate_stdreal Ifx__saturate_stdreal
#define | __min_stdreal Ifx__min_stdreal
#define | __max_stdreal Ifx__max_stdreal
#define | __neqf Ifx__neqf
#define | __leqf Ifx__leqf
#define | __geqf Ifx__geqf
#define | __clssf Ifx__clssf
#define | __fract_to_float Ifx__fract_to_float
#define | __fract_to_sfract Ifx__fract_to_sfract
#define | __float_to_sfract Ifx__float_to_sfract
#define | __float_to_fract Ifx__float_to_fract
#define | __getfract Ifx__getfract
#define | __mac_r_sf Ifx__mac_r_sf
#define | __mac_sf Ifx__mac_sf
#define | __mulfractfract Ifx__mulfractfract
#define | __mulfractlong Ifx__mulfractlong
#define | __round16 Ifx__round16
#define | __s16_to_sfract Ifx__s16_to_sfract
#define | __sfract_to_s16 Ifx__sfract_to_s16
#define | __sfract_to_u16 Ifx__sfract_to_u16
#define | __shaaccum Ifx__shaaccum
#define | __shafracts Ifx__shafracts
#define | __shasfracts Ifx__shasfracts
#define | __u16_to_sfract Ifx__u16_to_sfract
#define | __extr Ifx__extr
#define | __extru Ifx__extru
#define | __getbit Ifx__getbit
#define | __ins Ifx__ins
#define | __insert Ifx__insert
#define | __insn Ifx__insn
#define | __putbit Ifx__putbit
#define | __imaskldmst Ifx__imaskldmst
#define | __bisr Ifx__bisr
#define | __disable Ifx__disable
#define | __disable_and_save Ifx__disable_and_save
#define | __enable Ifx__enable
#define | __restore Ifx__restore
#define | __syscall Ifx__syscall
#define | __tric_syscall Ifx__tric_syscall
#define | __cacheawi Ifx__cacheawi
#define | __cacheiwi Ifx__cacheiwi
#define | __cacheawi_bo_post_inc Ifx__cacheawi_bo_post_inc
#define | __mulsc Ifx__mulsc
#define | __rol Ifx__rol
#define | __ror Ifx__ror
#define | __extractbyte1 Ifx__extractbyte1
#define | __extractbyte2 Ifx__extractbyte2
#define | __extractbyte3 Ifx__extractbyte3
#define | __extractbyte4 Ifx__extractbyte4
#define | __extracthw1 Ifx__extracthw1
#define | __extracthw2 Ifx__extracthw2
#define | __extractubyte1 Ifx__extractubyte1
#define | __extractubyte2 Ifx__extractubyte2
#define | __extractubyte3 Ifx__extractubyte3
#define | __extractubyte4 Ifx__extractubyte4
#define | __extractuhw1 Ifx__extractuhw1
#define | __extractuhw2 Ifx__extractuhw2
#define | __getbyte1 Ifx__getbyte1
#define | __getbyte2 Ifx__getbyte2
#define | __getbyte3 Ifx__getbyte3
#define | __getbyte4 Ifx__getbyte4
#define | __gethw1 Ifx__gethw1
#define | __gethw2 Ifx__gethw2
#define | __getubyte1 Ifx__getubyte1
#define | __getubyte2 Ifx__getubyte2
#define | __getubyte3 Ifx__getubyte3
#define | __getubyte4 Ifx__getubyte4
#define | __getuhw1 Ifx__getuhw1
#define | __getuhw2 Ifx__getuhw2
#define | __setbyte1 Ifx__setbyte1
#define | __setbyte2 Ifx__setbyte2
#define | __setbyte3 Ifx__setbyte3
#define | __setbyte4 Ifx__setbyte4
#define | __sethw1 Ifx__sethw1
#define | __sethw2 Ifx__sethw2
#define | __setubyte1 Ifx__setubyte1
#define | __setubyte2 Ifx__setubyte2
#define | __setubyte3 Ifx__setubyte3
#define | __setubyte4 Ifx__setubyte4
#define | __setuhw1 Ifx__setuhw1
#define | __setuhw2 Ifx__setuhw2
#define | __minhu Ifx__minhu
#define | __minh Ifx__minh
#define | __minbu Ifx__minbu
#define | __minb Ifx__minb
#define | __insertuhw2 Ifx__insertuhw2
#define | __insertuhw1 Ifx__insertuhw1
#define | __inserthw2 Ifx__inserthw2
#define | __inserthw1 Ifx__inserthw1
#define | __insertubyte4 Ifx__insertubyte4
#define | __insertubyte3 Ifx__insertubyte3
#define | __insertubyte2 Ifx__insertubyte2
#define | __insertubyte1 Ifx__insertubyte1
#define | __insertbyte4 Ifx__insertbyte4
#define | __insertbyte3 Ifx__insertbyte3
#define | __insertbyte2 Ifx__insertbyte2
#define | __insertbyte1 Ifx__insertbyte1
#define | __initupackhw Ifx__initupackhw
#define | __initupackb Ifx__initupackb
#define | __initpackhwl Ifx__initpackhwl
#define | __initpackhw Ifx__initpackhw
#define | __initpackbl Ifx__initpackbl
#define | __initpackb Ifx__initpackb
#define | __absb Ifx__absb
#define | __absh Ifx__absh
#define | __abssh Ifx__abssh
#define | __abs Ifx__abs
#define | __absdif Ifx__absdif
#define | __abss Ifx__abss
#define | __clo Ifx__clo
#define | __cls Ifx__cls
#define | __clz Ifx__clz
#define | __fabs Ifx__fabs
#define | __fabsf Ifx__fabsf
#define | __mfcr Ifx__mfcr
#define | __mtcr Ifx__mtcr
#define | __parity Ifx__parity
#define | __satb Ifx__satb
#define | __satbu Ifx__satbu
#define | __sath Ifx__sath
#define | __sathu Ifx__sathu
#define | __adds Ifx__adds
#define | __addsu Ifx__addsu
#define | __subs Ifx__subs
#define | __subsu Ifx__subsu
#define | __debug Ifx__debug
#define | __mem_barrier Ifx__mem_barrier
#define | __dsync Ifx__dsync
#define | __isync Ifx__isync
#define | __ldmst Ifx__ldmst
#define | __nop Ifx__nop
#define | __nops Ifx__nops
#define | __rslcx Ifx__rslcx
#define | __svlcx Ifx__svlcx
#define | __swap Ifx__swap
#define | NOP Ifx__NOP
#define | __setareg Ifx__setareg
#define | __stopPerfCounters Ifx__stopPerfCounters
#define | __cmpAndSwap Ifx__cmpAndSwap
#define | __fixpoint_to_float32 Ifx__fixpoint_to_float32
#define | __getA11 Ifx__getA11
#define | __setStackPointer Ifx__setStackPointer
#define | __crc32 Ifx__crc32
#define | __popcnt Ifx__popcnt
#define | __cacheai Ifx__cacheai

Functions

IFX_INLINE void | Ifx__jump_and_link (void(*fun)(void))
IFX_INLINE void | Ifx__moveToDataParam0 (unsigned int var)
IFX_INLINE void | Ifx__moveToDataParamRet (unsigned int var)
IFX_INLINE unsigned int | Ifx__getDataParamRet (void)
IFX_INLINE void | Ifx__moveToAddrParam0 (const void *var)
IFX_INLINE void | Ifx__jumpToFunction (const void *fun)
IFX_INLINE void | Ifx__jumpToFunctionWithLink (const void *fun)
IFX_INLINE void | Ifx__jumpBackToLink (void)
IFX_INLINE sint32 | Ifx__max (sint32 a, sint32 b)
IFX_INLINE sint32 | Ifx__maxs (sint16 a, sint16 b)
IFX_INLINE uint32 | Ifx__maxu (uint32 a, uint32 b)
IFX_INLINE sint32 | Ifx__min (sint32 a, sint32 b)
IFX_INLINE sint16 | Ifx__mins (sint16 a, sint16 b)
IFX_INLINE uint32 | Ifx__minu (uint32 a, uint32 b)
IFX_INLINE sint16 | Ifx__clssf (sfract a)
IFX_INLINE float | Ifx__fract_to_float (fract a)
IFX_INLINE fract | Ifx__float_to_fract (float a)
IFX_INLINE sfract | Ifx__fract_to_sfract (fract a)
IFX_INLINE sfract | Ifx__float_to_sfract (float a)
IFX_INLINE fract | Ifx__getfract (laccum a)
IFX_INLINE sfract | Ifx__mac_r_sf (sfract a, sfract b, sfract c)
IFX_INLINE sfract | Ifx__mac_sf (sfract a, sfract b, sfract c)
IFX_INLINE long | Ifx__mulfractfract (fract a, fract b)
IFX_INLINE long | Ifx__mulfractlong (fract a, long b)
IFX_INLINE sfract | Ifx__round16 (fract a)
IFX_INLINE sfract | Ifx__s16_to_sfract (sint16 a)
IFX_INLINE sint16 | Ifx__sfract_to_s16 (sfract a)
IFX_INLINE uint16 | Ifx__sfract_to_u16 (sfract a)
IFX_INLINE laccum | Ifx__shaaccum (laccum a, sint32 b)
IFX_INLINE fract | Ifx__shafracts (fract a, sint32 b)
IFX_INLINE sfract | Ifx__shasfracts (sfract a, sint32 b)
IFX_INLINE sfract | Ifx__u16_to_sfract (uint16 a)
IFX_INLINE sint32 | Ifx__extr (sint32 a, uint32 p, uint32 w)
IFX_INLINE uint32 | Ifx__extru (uint32 a, uint32 p, uint32 w)
IFX_INLINE sint32 | Ifx__ins (sint32 trg, const sint32 trgbit, sint32 src, const sint32 srcbit)
IFX_INLINE sint32 | Ifx__insert (sint32 a, sint32 b, sint32 p, const sint32 w)
IFX_INLINE sint32 | Ifx__insn (sint32 trg, const sint32 trgbit, sint32 src, const sint32 srcbit)
IFX_INLINE sint32 | Ifx__disable_and_save (void)
IFX_INLINE void | Ifx__restore (sint32 ie)
IFX_INLINE void | Ifx__cacheawi (uint8 *p)
IFX_INLINE void | Ifx__cacheiwi (uint8 *p)
IFX_INLINE uint8 * | Ifx__cacheawi_bo_post_inc (uint8 *p)
IFX_INLINE sint32 | Ifx__mulsc (sint32 a, sint32 b, sint32 offset)
IFX_INLINE uint32 | Ifx__rol (uint32 operand, uint32 count)
IFX_INLINE uint32 | Ifx__ror (uint32 operand, uint32 count)
IFX_INLINE __packb | Ifx__absb (__packb a)
IFX_INLINE __packhw | Ifx__absh (__packhw a)
IFX_INLINE __packhw | Ifx__abssh (__packhw a)
IFX_INLINE sint8 | Ifx__extractbyte1 (__packb a)
IFX_INLINE sint8 | Ifx__extractbyte2 (__packb a)
IFX_INLINE sint8 | Ifx__extractbyte3 (__packb a)
IFX_INLINE sint8 | Ifx__extractbyte4 (__packb a)
IFX_INLINE sint16 | Ifx__extracthw1 (__packhw a)
IFX_INLINE sint16 | Ifx__extracthw2 (__packhw a)
IFX_INLINE uint8 | Ifx__extractubyte1 (__upackb a)
IFX_INLINE uint8 | Ifx__extractubyte2 (__upackb a)
IFX_INLINE uint8 | Ifx__extractubyte3 (__upackb a)
IFX_INLINE uint8 | Ifx__extractubyte4 (__upackb a)
IFX_INLINE uint16 | Ifx__extractuhw1 (__upackhw a)
IFX_INLINE uint16 | Ifx__extractuhw2 (__upackhw a)
IFX_INLINE sint8 | Ifx__getbyte1 (__packb *a)
IFX_INLINE sint8 | Ifx__getbyte2 (__packb *a)
IFX_INLINE sint8 | Ifx__getbyte3 (__packb *a)
IFX_INLINE sint8 | Ifx__getbyte4 (__packb *a)
IFX_INLINE sint16 | Ifx__gethw1 (__packhw *a)
IFX_INLINE sint16 | Ifx__gethw2 (__packhw *a)
IFX_INLINE uint8 | Ifx__getubyte1 (__upackb *a)
IFX_INLINE uint8 | Ifx__getubyte2 (__upackb *a)
IFX_INLINE uint8 | Ifx__getubyte3 (__upackb *a)
IFX_INLINE uint8 | Ifx__getubyte4 (__upackb *a)
IFX_INLINE uint16 | Ifx__getuhw1 (__upackhw *a)
IFX_INLINE uint16 | Ifx__getuhw2 (__upackhw *a)
IFX_INLINE __packb | Ifx__initpackb (sint32 a, sint32 b, sint32 c, sint32 d)
IFX_INLINE __packb | Ifx__initpackbl (long a)
IFX_INLINE __packhw | Ifx__initpackhw (sint16 a, sint16 b)
IFX_INLINE __packhw | Ifx__initpackhwl (long a)
IFX_INLINE __upackb | Ifx__initupackb (uint32 a, uint32 b, uint32 c, uint32 d)
IFX_INLINE __upackhw | Ifx__initupackhw (uint16 a, uint16 b)
IFX_INLINE __packb | Ifx__insertbyte1 (__packb a, sint8 b)
IFX_INLINE __packb | Ifx__insertbyte2 (__packb a, sint8 b)
IFX_INLINE __packb | Ifx__insertbyte3 (__packb a, sint8 b)
IFX_INLINE __packb | Ifx__insertbyte4 (__packb a, sint8 b)
IFX_INLINE __upackb | Ifx__insertubyte1 (__upackb a, uint8 b)
IFX_INLINE __upackb | Ifx__insertubyte2 (__upackb a, uint8 b)
IFX_INLINE __upackb | Ifx__insertubyte3 (__upackb a, uint8 b)
IFX_INLINE __upackb | Ifx__insertubyte4 (__upackb a, uint8 b)
IFX_INLINE __packhw | Ifx__inserthw1 (__packhw a, sint16 b)
IFX_INLINE __packhw | Ifx__inserthw2 (__packhw a, sint16 b)
IFX_INLINE __upackhw | Ifx__insertuhw1 (__upackhw a, uint16 b)
IFX_INLINE __upackhw | Ifx__insertuhw2 (__upackhw a, uint16 b)
IFX_INLINE __packb | Ifx__minb (__packb a, __packb b)
IFX_INLINE __upackb | Ifx__minbu (__upackb a, __upackb b)
IFX_INLINE __packhw | Ifx__minh (__packhw a, __packhw b)
IFX_INLINE __upackhw | Ifx__minhu (__upackhw a, __upackhw b)
IFX_INLINE void | Ifx__setbyte1 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__setbyte2 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__setbyte3 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__setbyte4 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__sethw1 (__packhw *a, sint16 b)
IFX_INLINE void | Ifx__sethw2 (__packhw *a, sint16 b)
IFX_INLINE void | Ifx__setubyte1 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setubyte2 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setubyte3 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setubyte4 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setuhw1 (__upackhw *a, uint16 b)
IFX_INLINE void | Ifx__setuhw2 (__upackhw *a, uint16 b)
IFX_INLINE sint32 | Ifx__absdif (sint32 a, sint32 b)
IFX_INLINE sint32 | Ifx__abss (sint32 a)
IFX_INLINE sint32 | Ifx__clo (sint32 a)
IFX_INLINE sint32 | Ifx__cls (sint32 a)
IFX_INLINE double | Ifx__fabs (double d)
IFX_INLINE float | Ifx__fabsf (float f)
IFX_INLINE sint32 | Ifx__parity (sint32 a)
IFX_INLINE sint8 | Ifx__satb (sint32 a)
IFX_INLINE uint8 | Ifx__satbu (sint32 a)
IFX_INLINE sint16 | Ifx__sath (sint32 a)
IFX_INLINE uint16 | Ifx__sathu (sint32 a)
IFX_INLINE sint32 | Ifx__adds (sint32 a, sint32 b)
IFX_INLINE uint32 | Ifx__addsu (uint32 a, uint32 b)
IFX_INLINE sint32 | Ifx__subs (sint32 a, sint32 b)
IFX_INLINE uint32 | Ifx__subsu (uint32 a, uint32 b)
IFX_INLINE void | Ifx__debug (void)
IFX_INLINE void | Ifx__dsync (void)
IFX_INLINE void | Ifx__isync (void)
IFX_INLINE void | Ifx__ldmst (volatile void *address, uint32 mask, uint32 value)
IFX_INLINE void | Ifx__nop (void)
IFX_INLINE void | Ifx__nops (void *cnt)
IFX_INLINE void | Ifx__rslcx (void)
IFX_INLINE void | Ifx__svlcx (void)
IFX_INLINE uint32 | Ifx__swap (void *place, uint32 value)
IFX_INLINE void | Ifx__stopPerfCounters (void)
IFX_INLINE unsigned int | Ifx__cmpAndSwap (unsigned int volatile *address, unsigned int value, unsigned int condition)
This function is a implementation of a binary semaphore using compare and swap instruction. More...
IFX_INLINE float32 | Ifx__fixpoint_to_float32 (fract value, sint32 shift)
Convert a fixpoint value to float32. More...
IFX_INLINE void * | Ifx__getA11 (void)
IFX_INLINE void | Ifx__setStackPointer (void *stackAddr)
IFX_INLINE uint32 | Ifx__crc32 (uint32 b, uint32 a)
IFX_INLINE uint32 | IfxCpu_calculateCrc32 (uint32 *startaddress, uint8 length)
IFX_INLINE uint32 | IfxCpu_getRandomVal (uint32 a, uint32 x, uint32 m)
IFX_INLINE sint32 | Ifx__popcnt (sint32 a)
IFX_INLINE void | Ifx__cacheai (uint8 *p)

Detailed Description

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCpu_IntrinsicsGnuc.h.

Macro Definition Documentation

◆ __abs

#define __abs Ifx__abs

Definition at line 2169 of file IfxCpu_IntrinsicsGnuc.h.

◆ __abs_stdreal

#define __abs_stdreal Ifx__abs_stdreal

Definition at line 1740 of file IfxCpu_IntrinsicsGnuc.h.

◆ __absb

#define __absb Ifx__absb

Definition at line 2156 of file IfxCpu_IntrinsicsGnuc.h.

◆ __absdif

#define __absdif Ifx__absdif

Definition at line 2173 of file IfxCpu_IntrinsicsGnuc.h.

◆ __absf

#define __absf Ifx__absf

Definition at line 1720 of file IfxCpu_IntrinsicsGnuc.h.

◆ __absh

#define __absh Ifx__absh

Definition at line 2160 of file IfxCpu_IntrinsicsGnuc.h.

◆ __abss

#define __abss Ifx__abss

Definition at line 2177 of file IfxCpu_IntrinsicsGnuc.h.

◆ __abssh

#define __abssh Ifx__abssh

Definition at line 2164 of file IfxCpu_IntrinsicsGnuc.h.

◆ __adds

#define __adds Ifx__adds

Definition at line 2229 of file IfxCpu_IntrinsicsGnuc.h.

◆ __addsu

#define __addsu Ifx__addsu

Definition at line 2233 of file IfxCpu_IntrinsicsGnuc.h.

◆ __bisr

#define __bisr Ifx__bisr

Definition at line 1872 of file IfxCpu_IntrinsicsGnuc.h.

◆ __cacheai

#define __cacheai Ifx__cacheai

Definition at line 2321 of file IfxCpu_IntrinsicsGnuc.h.

◆ __cacheawi

#define __cacheawi Ifx__cacheawi

Definition at line 1900 of file IfxCpu_IntrinsicsGnuc.h.

◆ __cacheawi_bo_post_inc

#define __cacheawi_bo_post_inc Ifx__cacheawi_bo_post_inc

Definition at line 1908 of file IfxCpu_IntrinsicsGnuc.h.

◆ __cacheiwi

#define __cacheiwi Ifx__cacheiwi

Definition at line 1904 of file IfxCpu_IntrinsicsGnuc.h.

◆ __checkrange

#define __checkrange Ifx__checkrange

Definition at line 1712 of file IfxCpu_IntrinsicsGnuc.h.

◆ __checkrangef

#define __checkrangef Ifx__checkrangef

Definition at line 1736 of file IfxCpu_IntrinsicsGnuc.h.

◆ __checkrangeX

#define __checkrangeX Ifx__checkrangeX

Definition at line 1668 of file IfxCpu_IntrinsicsGnuc.h.

◆ __clo

#define __clo Ifx__clo

Definition at line 2181 of file IfxCpu_IntrinsicsGnuc.h.

◆ __cls

#define __cls Ifx__cls

Definition at line 2185 of file IfxCpu_IntrinsicsGnuc.h.

◆ __clssf

#define __clssf Ifx__clssf

Definition at line 1768 of file IfxCpu_IntrinsicsGnuc.h.

◆ __clz

#define __clz Ifx__clz

Definition at line 2189 of file IfxCpu_IntrinsicsGnuc.h.

◆ __cmpAndSwap

#define __cmpAndSwap Ifx__cmpAndSwap

Definition at line 2297 of file IfxCpu_IntrinsicsGnuc.h.

◆ __crc32

#define __crc32 Ifx__crc32

Definition at line 2313 of file IfxCpu_IntrinsicsGnuc.h.

◆ __debug

#define __debug Ifx__debug

Definition at line 2245 of file IfxCpu_IntrinsicsGnuc.h.

◆ __disable

#define __disable Ifx__disable

Definition at line 1876 of file IfxCpu_IntrinsicsGnuc.h.

◆ __disable_and_save

#define __disable_and_save Ifx__disable_and_save

Definition at line 1880 of file IfxCpu_IntrinsicsGnuc.h.

◆ __dsync

#define __dsync Ifx__dsync

Definition at line 2253 of file IfxCpu_IntrinsicsGnuc.h.

◆ __enable

#define __enable Ifx__enable

Definition at line 1884 of file IfxCpu_IntrinsicsGnuc.h.

◆ __extr

#define __extr Ifx__extr

Definition at line 1840 of file IfxCpu_IntrinsicsGnuc.h.

◆ __extractbyte1

#define __extractbyte1 Ifx__extractbyte1

Definition at line 1924 of file IfxCpu_IntrinsicsGnuc.h.

◆ __extractbyte2

#define __extractbyte2 Ifx__extractbyte2

Definition at line 1928 of file IfxCpu_IntrinsicsGnuc.h.

◆ __extractbyte3

#define __extractbyte3 Ifx__extractbyte3

Definition at line 1932 of file IfxCpu_IntrinsicsGnuc.h.

◆ __extractbyte4

#define __extractbyte4 Ifx__extractbyte4

Definition at line 1936 of file IfxCpu_IntrinsicsGnuc.h.

◆ __extracthw1

#define __extracthw1 Ifx__extracthw1

Definition at line 1940 of file IfxCpu_IntrinsicsGnuc.h.

◆ __extracthw2

#define __extracthw2 Ifx__extracthw2

Definition at line 1944 of file IfxCpu_IntrinsicsGnuc.h.

◆ __extractubyte1

#define __extractubyte1 Ifx__extractubyte1

Definition at line 1948 of file IfxCpu_IntrinsicsGnuc.h.

◆ __extractubyte2

#define __extractubyte2 Ifx__extractubyte2

Definition at line 1952 of file IfxCpu_IntrinsicsGnuc.h.

◆ __extractubyte3

#define __extractubyte3 Ifx__extractubyte3

Definition at line 1956 of file IfxCpu_IntrinsicsGnuc.h.

◆ __extractubyte4

#define __extractubyte4 Ifx__extractubyte4

Definition at line 1960 of file IfxCpu_IntrinsicsGnuc.h.

◆ __extractuhw1

#define __extractuhw1 Ifx__extractuhw1

Definition at line 1964 of file IfxCpu_IntrinsicsGnuc.h.

◆ __extractuhw2

#define __extractuhw2 Ifx__extractuhw2

Definition at line 1968 of file IfxCpu_IntrinsicsGnuc.h.

◆ __extru

#define __extru Ifx__extru

Definition at line 1844 of file IfxCpu_IntrinsicsGnuc.h.

◆ __fabs

#define __fabs Ifx__fabs

Definition at line 2193 of file IfxCpu_IntrinsicsGnuc.h.

◆ __fabsf

#define __fabsf Ifx__fabsf

Definition at line 2197 of file IfxCpu_IntrinsicsGnuc.h.

◆ __fixpoint_to_float32

#define __fixpoint_to_float32 Ifx__fixpoint_to_float32

Definition at line 2301 of file IfxCpu_IntrinsicsGnuc.h.

◆ __float_to_fract

#define __float_to_fract Ifx__float_to_fract

Definition at line 1784 of file IfxCpu_IntrinsicsGnuc.h.

◆ __float_to_sfract

#define __float_to_sfract Ifx__float_to_sfract

Definition at line 1780 of file IfxCpu_IntrinsicsGnuc.h.

◆ __fract_to_float

#define __fract_to_float Ifx__fract_to_float

Definition at line 1772 of file IfxCpu_IntrinsicsGnuc.h.

◆ __fract_to_sfract

#define __fract_to_sfract Ifx__fract_to_sfract

Definition at line 1776 of file IfxCpu_IntrinsicsGnuc.h.

◆ __geqf

#define __geqf Ifx__geqf

Definition at line 1764 of file IfxCpu_IntrinsicsGnuc.h.

◆ __getA11

#define __getA11 Ifx__getA11

Definition at line 2305 of file IfxCpu_IntrinsicsGnuc.h.

◆ __getbit

#define __getbit Ifx__getbit

Definition at line 1848 of file IfxCpu_IntrinsicsGnuc.h.

◆ __getbyte1

#define __getbyte1 Ifx__getbyte1

Definition at line 1972 of file IfxCpu_IntrinsicsGnuc.h.

◆ __getbyte2

#define __getbyte2 Ifx__getbyte2

Definition at line 1976 of file IfxCpu_IntrinsicsGnuc.h.

◆ __getbyte3

#define __getbyte3 Ifx__getbyte3

Definition at line 1980 of file IfxCpu_IntrinsicsGnuc.h.

◆ __getbyte4

#define __getbyte4 Ifx__getbyte4

Definition at line 1984 of file IfxCpu_IntrinsicsGnuc.h.

◆ __getDataParamRet

#define __getDataParamRet Ifx__getDataParamRet

Definition at line 1636 of file IfxCpu_IntrinsicsGnuc.h.

◆ __getfract

#define __getfract Ifx__getfract

Definition at line 1788 of file IfxCpu_IntrinsicsGnuc.h.

◆ __gethw1

#define __gethw1 Ifx__gethw1

Definition at line 1988 of file IfxCpu_IntrinsicsGnuc.h.

◆ __gethw2

#define __gethw2 Ifx__gethw2

Definition at line 1992 of file IfxCpu_IntrinsicsGnuc.h.

◆ __getubyte1

#define __getubyte1 Ifx__getubyte1

Definition at line 1996 of file IfxCpu_IntrinsicsGnuc.h.

◆ __getubyte2

#define __getubyte2 Ifx__getubyte2

Definition at line 2000 of file IfxCpu_IntrinsicsGnuc.h.

◆ __getubyte3

#define __getubyte3 Ifx__getubyte3

Definition at line 2004 of file IfxCpu_IntrinsicsGnuc.h.

◆ __getubyte4

#define __getubyte4 Ifx__getubyte4

Definition at line 2008 of file IfxCpu_IntrinsicsGnuc.h.

◆ __getuhw1

#define __getuhw1 Ifx__getuhw1

Definition at line 2012 of file IfxCpu_IntrinsicsGnuc.h.

◆ __getuhw2

#define __getuhw2 Ifx__getuhw2

Definition at line 2016 of file IfxCpu_IntrinsicsGnuc.h.

◆ __imaskldmst

#define __imaskldmst Ifx__imaskldmst

Definition at line 1868 of file IfxCpu_IntrinsicsGnuc.h.

◆ __initpackb

#define __initpackb Ifx__initpackb

Definition at line 2152 of file IfxCpu_IntrinsicsGnuc.h.

◆ __initpackbl

#define __initpackbl Ifx__initpackbl

Definition at line 2148 of file IfxCpu_IntrinsicsGnuc.h.

◆ __initpackhw

#define __initpackhw Ifx__initpackhw

Definition at line 2144 of file IfxCpu_IntrinsicsGnuc.h.

◆ __initpackhwl

#define __initpackhwl Ifx__initpackhwl

Definition at line 2140 of file IfxCpu_IntrinsicsGnuc.h.

◆ __initupackb

#define __initupackb Ifx__initupackb

Definition at line 2136 of file IfxCpu_IntrinsicsGnuc.h.

◆ __initupackhw

#define __initupackhw Ifx__initupackhw

Definition at line 2132 of file IfxCpu_IntrinsicsGnuc.h.

◆ __ins

#define __ins Ifx__ins

Definition at line 1852 of file IfxCpu_IntrinsicsGnuc.h.

◆ __insert

#define __insert Ifx__insert

Definition at line 1856 of file IfxCpu_IntrinsicsGnuc.h.

◆ __insertbyte1

#define __insertbyte1 Ifx__insertbyte1

Definition at line 2128 of file IfxCpu_IntrinsicsGnuc.h.

◆ __insertbyte2

#define __insertbyte2 Ifx__insertbyte2

Definition at line 2124 of file IfxCpu_IntrinsicsGnuc.h.

◆ __insertbyte3

#define __insertbyte3 Ifx__insertbyte3

Definition at line 2120 of file IfxCpu_IntrinsicsGnuc.h.

◆ __insertbyte4

#define __insertbyte4 Ifx__insertbyte4

Definition at line 2116 of file IfxCpu_IntrinsicsGnuc.h.

◆ __inserthw1

#define __inserthw1 Ifx__inserthw1

Definition at line 2096 of file IfxCpu_IntrinsicsGnuc.h.

◆ __inserthw2

#define __inserthw2 Ifx__inserthw2

Definition at line 2092 of file IfxCpu_IntrinsicsGnuc.h.

◆ __insertubyte1

#define __insertubyte1 Ifx__insertubyte1

Definition at line 2112 of file IfxCpu_IntrinsicsGnuc.h.

◆ __insertubyte2

#define __insertubyte2 Ifx__insertubyte2

Definition at line 2108 of file IfxCpu_IntrinsicsGnuc.h.

◆ __insertubyte3

#define __insertubyte3 Ifx__insertubyte3

Definition at line 2104 of file IfxCpu_IntrinsicsGnuc.h.

◆ __insertubyte4

#define __insertubyte4 Ifx__insertubyte4

Definition at line 2100 of file IfxCpu_IntrinsicsGnuc.h.

◆ __insertuhw1

#define __insertuhw1 Ifx__insertuhw1

Definition at line 2088 of file IfxCpu_IntrinsicsGnuc.h.

◆ __insertuhw2

#define __insertuhw2 Ifx__insertuhw2

Definition at line 2084 of file IfxCpu_IntrinsicsGnuc.h.

◆ __insn

#define __insn Ifx__insn

Definition at line 1860 of file IfxCpu_IntrinsicsGnuc.h.

◆ __isync

#define __isync Ifx__isync

Definition at line 2257 of file IfxCpu_IntrinsicsGnuc.h.

◆ __jump_and_link

#define __jump_and_link Ifx__jump_and_link

Definition at line 1624 of file IfxCpu_IntrinsicsGnuc.h.

◆ __jumpBackToLink

#define __jumpBackToLink Ifx__jumpBackToLink

Definition at line 1652 of file IfxCpu_IntrinsicsGnuc.h.

◆ __jumpToFunction

#define __jumpToFunction Ifx__jumpToFunction

Definition at line 1644 of file IfxCpu_IntrinsicsGnuc.h.

◆ __jumpToFunctionWithLink

#define __jumpToFunctionWithLink Ifx__jumpToFunctionWithLink

Definition at line 1648 of file IfxCpu_IntrinsicsGnuc.h.

◆ __ldmst

#define __ldmst Ifx__ldmst

Definition at line 2261 of file IfxCpu_IntrinsicsGnuc.h.

◆ __leqf

#define __leqf Ifx__leqf

Definition at line 1760 of file IfxCpu_IntrinsicsGnuc.h.

◆ __mac_r_sf

#define __mac_r_sf Ifx__mac_r_sf

Definition at line 1792 of file IfxCpu_IntrinsicsGnuc.h.

◆ __mac_sf

#define __mac_sf Ifx__mac_sf

Definition at line 1796 of file IfxCpu_IntrinsicsGnuc.h.

◆ __max

#define __max Ifx__max

Definition at line 1680 of file IfxCpu_IntrinsicsGnuc.h.

◆ __max_stdreal

#define __max_stdreal Ifx__max_stdreal

Definition at line 1752 of file IfxCpu_IntrinsicsGnuc.h.

◆ __maxf

#define __maxf Ifx__maxf

Definition at line 1732 of file IfxCpu_IntrinsicsGnuc.h.

◆ __maxs

#define __maxs Ifx__maxs

Definition at line 1684 of file IfxCpu_IntrinsicsGnuc.h.

◆ __maxu

#define __maxu Ifx__maxu

Definition at line 1688 of file IfxCpu_IntrinsicsGnuc.h.

◆ __maxX

#define __maxX Ifx__maxX

Definition at line 1660 of file IfxCpu_IntrinsicsGnuc.h.

◆ __mem_barrier

#define __mem_barrier Ifx__mem_barrier

Definition at line 2249 of file IfxCpu_IntrinsicsGnuc.h.

◆ __mfcr

#define __mfcr Ifx__mfcr

Definition at line 2201 of file IfxCpu_IntrinsicsGnuc.h.

◆ __min

#define __min Ifx__min

Definition at line 1692 of file IfxCpu_IntrinsicsGnuc.h.

◆ __min_stdreal

#define __min_stdreal Ifx__min_stdreal

Definition at line 1748 of file IfxCpu_IntrinsicsGnuc.h.

◆ __minb

#define __minb Ifx__minb

Definition at line 2080 of file IfxCpu_IntrinsicsGnuc.h.

◆ __minbu

#define __minbu Ifx__minbu

Definition at line 2076 of file IfxCpu_IntrinsicsGnuc.h.

◆ __minf

#define __minf Ifx__minf

Definition at line 1728 of file IfxCpu_IntrinsicsGnuc.h.

◆ __minh

#define __minh Ifx__minh

Definition at line 2072 of file IfxCpu_IntrinsicsGnuc.h.

◆ __minhu

#define __minhu Ifx__minhu

Definition at line 2068 of file IfxCpu_IntrinsicsGnuc.h.

◆ __mins

#define __mins Ifx__mins

Definition at line 1696 of file IfxCpu_IntrinsicsGnuc.h.

◆ __minu

#define __minu Ifx__minu

Definition at line 1700 of file IfxCpu_IntrinsicsGnuc.h.

◆ __minX

#define __minX Ifx__minX

Definition at line 1656 of file IfxCpu_IntrinsicsGnuc.h.

◆ __moveToAddrParam0

#define __moveToAddrParam0 Ifx__moveToAddrParam0

Definition at line 1640 of file IfxCpu_IntrinsicsGnuc.h.

◆ __moveToDataParam0

#define __moveToDataParam0 Ifx__moveToDataParam0

Definition at line 1628 of file IfxCpu_IntrinsicsGnuc.h.

◆ __moveToDataParamRet

#define __moveToDataParamRet Ifx__moveToDataParamRet

Definition at line 1632 of file IfxCpu_IntrinsicsGnuc.h.

◆ __mtcr

#define __mtcr Ifx__mtcr

Definition at line 2205 of file IfxCpu_IntrinsicsGnuc.h.

◆ __mulfractfract

#define __mulfractfract Ifx__mulfractfract

Definition at line 1800 of file IfxCpu_IntrinsicsGnuc.h.

◆ __mulfractlong

#define __mulfractlong Ifx__mulfractlong

Definition at line 1804 of file IfxCpu_IntrinsicsGnuc.h.

◆ __mulsc

#define __mulsc Ifx__mulsc

Definition at line 1912 of file IfxCpu_IntrinsicsGnuc.h.

◆ __neqf

#define __neqf Ifx__neqf

Definition at line 1756 of file IfxCpu_IntrinsicsGnuc.h.

◆ __non_return_call

#define __non_return_call Ifx__non_return_call

Definition at line 1620 of file IfxCpu_IntrinsicsGnuc.h.

◆ __nop

#define __nop Ifx__nop

Definition at line 2265 of file IfxCpu_IntrinsicsGnuc.h.

◆ __nops

#define __nops Ifx__nops

Definition at line 2269 of file IfxCpu_IntrinsicsGnuc.h.

◆ __parity

#define __parity Ifx__parity

Definition at line 2209 of file IfxCpu_IntrinsicsGnuc.h.

◆ __popcnt

#define __popcnt Ifx__popcnt

Definition at line 2317 of file IfxCpu_IntrinsicsGnuc.h.

◆ __putbit

#define __putbit Ifx__putbit

Definition at line 1864 of file IfxCpu_IntrinsicsGnuc.h.

◆ __restore

#define __restore Ifx__restore

Definition at line 1888 of file IfxCpu_IntrinsicsGnuc.h.

◆ __rol

#define __rol Ifx__rol

Definition at line 1916 of file IfxCpu_IntrinsicsGnuc.h.

◆ __ror

#define __ror Ifx__ror

Definition at line 1920 of file IfxCpu_IntrinsicsGnuc.h.

◆ __round16

#define __round16 Ifx__round16

Definition at line 1808 of file IfxCpu_IntrinsicsGnuc.h.

◆ __roundf

#define __roundf Ifx__roundf

Definition at line 1716 of file IfxCpu_IntrinsicsGnuc.h.

◆ __rslcx

#define __rslcx Ifx__rslcx

Definition at line 2273 of file IfxCpu_IntrinsicsGnuc.h.

◆ __s16_to_sfract

#define __s16_to_sfract Ifx__s16_to_sfract

Definition at line 1812 of file IfxCpu_IntrinsicsGnuc.h.

◆ __satb

#define __satb Ifx__satb

Definition at line 2213 of file IfxCpu_IntrinsicsGnuc.h.

◆ __satbu

#define __satbu Ifx__satbu

Definition at line 2217 of file IfxCpu_IntrinsicsGnuc.h.

◆ __sath

#define __sath Ifx__sath

Definition at line 2221 of file IfxCpu_IntrinsicsGnuc.h.

◆ __sathu

#define __sathu Ifx__sathu

Definition at line 2225 of file IfxCpu_IntrinsicsGnuc.h.

◆ __saturate

#define __saturate Ifx__saturate

Definition at line 1672 of file IfxCpu_IntrinsicsGnuc.h.

◆ __saturate_stdreal

#define __saturate_stdreal Ifx__saturate_stdreal

Definition at line 1744 of file IfxCpu_IntrinsicsGnuc.h.

◆ __saturatef

#define __saturatef Ifx__saturatef

Definition at line 1724 of file IfxCpu_IntrinsicsGnuc.h.

◆ __saturateu

#define __saturateu Ifx__saturateu

Definition at line 1676 of file IfxCpu_IntrinsicsGnuc.h.

◆ __saturateX

#define __saturateX Ifx__saturateX

Definition at line 1664 of file IfxCpu_IntrinsicsGnuc.h.

◆ __setareg

#define __setareg Ifx__setareg

Definition at line 2289 of file IfxCpu_IntrinsicsGnuc.h.

◆ __setbyte1

#define __setbyte1 Ifx__setbyte1

Definition at line 2020 of file IfxCpu_IntrinsicsGnuc.h.

◆ __setbyte2

#define __setbyte2 Ifx__setbyte2

Definition at line 2024 of file IfxCpu_IntrinsicsGnuc.h.

◆ __setbyte3

#define __setbyte3 Ifx__setbyte3

Definition at line 2028 of file IfxCpu_IntrinsicsGnuc.h.

◆ __setbyte4

#define __setbyte4 Ifx__setbyte4

Definition at line 2032 of file IfxCpu_IntrinsicsGnuc.h.

◆ __sethw1

#define __sethw1 Ifx__sethw1

Definition at line 2036 of file IfxCpu_IntrinsicsGnuc.h.

◆ __sethw2

#define __sethw2 Ifx__sethw2

Definition at line 2040 of file IfxCpu_IntrinsicsGnuc.h.

◆ __setStackPointer

#define __setStackPointer Ifx__setStackPointer

Definition at line 2309 of file IfxCpu_IntrinsicsGnuc.h.

◆ __setubyte1

#define __setubyte1 Ifx__setubyte1

Definition at line 2044 of file IfxCpu_IntrinsicsGnuc.h.

◆ __setubyte2

#define __setubyte2 Ifx__setubyte2

Definition at line 2048 of file IfxCpu_IntrinsicsGnuc.h.

◆ __setubyte3

#define __setubyte3 Ifx__setubyte3

Definition at line 2052 of file IfxCpu_IntrinsicsGnuc.h.

◆ __setubyte4

#define __setubyte4 Ifx__setubyte4

Definition at line 2056 of file IfxCpu_IntrinsicsGnuc.h.

◆ __setuhw1

#define __setuhw1 Ifx__setuhw1

Definition at line 2060 of file IfxCpu_IntrinsicsGnuc.h.

◆ __setuhw2

#define __setuhw2 Ifx__setuhw2

Definition at line 2064 of file IfxCpu_IntrinsicsGnuc.h.

◆ __sfract_to_s16

#define __sfract_to_s16 Ifx__sfract_to_s16

Definition at line 1816 of file IfxCpu_IntrinsicsGnuc.h.

◆ __sfract_to_u16

#define __sfract_to_u16 Ifx__sfract_to_u16

Definition at line 1820 of file IfxCpu_IntrinsicsGnuc.h.

◆ __shaaccum

#define __shaaccum Ifx__shaaccum

Definition at line 1824 of file IfxCpu_IntrinsicsGnuc.h.

◆ __shafracts

#define __shafracts Ifx__shafracts

Definition at line 1828 of file IfxCpu_IntrinsicsGnuc.h.

◆ __shasfracts

#define __shasfracts Ifx__shasfracts

Definition at line 1832 of file IfxCpu_IntrinsicsGnuc.h.

◆ __sqrf

#define __sqrf Ifx__sqrf

Definition at line 1708 of file IfxCpu_IntrinsicsGnuc.h.

◆ __sqrtf

#define __sqrtf Ifx__sqrtf

Definition at line 1704 of file IfxCpu_IntrinsicsGnuc.h.

◆ __stopPerfCounters

#define __stopPerfCounters Ifx__stopPerfCounters

Definition at line 2293 of file IfxCpu_IntrinsicsGnuc.h.

◆ __subs

#define __subs Ifx__subs

Definition at line 2237 of file IfxCpu_IntrinsicsGnuc.h.

◆ __subsu

#define __subsu Ifx__subsu

Definition at line 2241 of file IfxCpu_IntrinsicsGnuc.h.

◆ __svlcx

#define __svlcx Ifx__svlcx

Definition at line 2277 of file IfxCpu_IntrinsicsGnuc.h.

◆ __swap

#define __swap Ifx__swap

Definition at line 2281 of file IfxCpu_IntrinsicsGnuc.h.

◆ __syscall

#define __syscall Ifx__syscall

Definition at line 1892 of file IfxCpu_IntrinsicsGnuc.h.

◆ __tric_syscall

#define __tric_syscall Ifx__tric_syscall

Definition at line 1896 of file IfxCpu_IntrinsicsGnuc.h.

◆ __u16_to_sfract

#define __u16_to_sfract Ifx__u16_to_sfract

Definition at line 1836 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__non_return_call

#define Ifx__non_return_call ( fun ) __asm__ volatile ("ji %0"::"a"(fun))

Function call without return

Definition at line 68 of file IfxCpu_IntrinsicsGnuc.h.

Referenced by Ifx__jumpToFunction().

◆ Ifx__setareg

#define Ifx__setareg | ( | areg,
 |  | val
 | ) |
Value:
{ uint32 reg_val= (uint32)val; \
__asm__ volatile (" mov.a\t %%"#areg",%0"::"d"(reg_val)); }
uint32
unsigned long uint32
Definition: Platform_Types.h:116

Definition at line 1499 of file IfxCpu_IntrinsicsGnuc.h.

◆ IFXCPU_INTRINSICSGNUC_USE_MACHINE_INTRINSICS

#define IFXCPU_INTRINSICSGNUC_USE_MACHINE_INTRINSICS 1

Definition at line 52 of file IfxCpu_IntrinsicsGnuc.h.

◆ NOP

#define NOP Ifx__NOP

Definition at line 2285 of file IfxCpu_IntrinsicsGnuc.h.

◆ STRINGIFY

#define STRINGIFY ( x ) #x

Definition at line 64 of file IfxCpu_IntrinsicsGnuc.h.

Function Documentation

◆ Ifx__cacheai()

IFX_INLINE void Ifx__cacheai ( uint8 * p )

Invalidate cache address "p". Generates CACHEA.I [Ab].

Definition at line 1611 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__cmpAndSwap()

IFX_INLINE unsigned int Ifx__cmpAndSwap | ( | unsigned int volatile * | address,
 |  | unsigned int | value,
 |  | unsigned int | condition
 | ) |  |

This function is a implementation of a binary semaphore using compare and swap instruction.

Parameters
address | address of resource.
value | This variable is updated with status of address
condition | if the value of address matches with the value of condition, then swap of value & address occurs.

Definition at line 1519 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__crc32()

IFX_INLINE uint32 Ifx__crc32 | ( | uint32 | b,
 |  | uint32 | a
 | ) |  |

Definition at line 1564 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__fixpoint_to_float32()

IFX_INLINE float32 Ifx__fixpoint_to_float32 | ( | fract | value,
 |  | sint32 | shift
 | ) |  |

Convert a fixpoint value to float32.

This function converts a value from a fixpoint format to a float32 format.

Parameters
value | value to be converted.
shift | position of the fix point. Range = [-256, 255] => (Qx.y format where x = shift+1).
Returns
Returns the converted value in the float32 format.

Definition at line 1544 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__getA11()

IFX_INLINE void* Ifx__getA11 ( void )

Definition at line 1552 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__getDataParamRet()

IFX_INLINE unsigned int Ifx__getDataParamRet ( void )

Definition at line 87 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__jump_and_link()

IFX_INLINE void Ifx__jump_and_link ( void(*)(void) fun )

Jump and link

Definition at line 72 of file IfxCpu_IntrinsicsGnuc.h.

Referenced by Ifx__jumpToFunctionWithLink().

◆ Ifx__jumpBackToLink()

IFX_INLINE void Ifx__jumpBackToLink ( void )

Definition at line 109 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__jumpToFunction()

IFX_INLINE void Ifx__jumpToFunction ( const void * fun )

Definition at line 99 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__jumpToFunctionWithLink()

IFX_INLINE void Ifx__jumpToFunctionWithLink ( const void * fun )

Definition at line 104 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__moveToAddrParam0()

IFX_INLINE void Ifx__moveToAddrParam0 ( const void * var )

Definition at line 94 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__moveToDataParam0()

IFX_INLINE void Ifx__moveToDataParam0 ( unsigned int var )

Definition at line 77 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__moveToDataParamRet()

IFX_INLINE void Ifx__moveToDataParamRet ( unsigned int var )

Definition at line 82 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__popcnt()

IFX_INLINE sint32 Ifx__popcnt ( sint32 a )

Definition at line 1602 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__setStackPointer()

IFX_INLINE void Ifx__setStackPointer ( void * stackAddr )

Definition at line 1559 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__stopPerfCounters()

IFX_INLINE void Ifx__stopPerfCounters ( void )

__mtcr (CPU_CCTRL, 0);

Definition at line 1505 of file IfxCpu_IntrinsicsGnuc.h.

◆ IfxCpu_calculateCrc32()

IFX_INLINE uint32 IfxCpu_calculateCrc32 | ( | uint32 * | startaddress,
 |  | uint8 | length
 | ) |  |

Definition at line 1573 of file IfxCpu_IntrinsicsGnuc.h.

◆ IfxCpu_getRandomVal()

IFX_INLINE uint32 IfxCpu_getRandomVal | ( | uint32 | a,
 |  | uint32 | x,
 |  | uint32 | m
 | ) |  |

Definition at line 1585 of file IfxCpu_IntrinsicsGnuc.h.


iLLD_TC38A: IfxCpu_IntrinsicsTasking.h File Reference

  • Cpu
  • Std
Macros | Functions
IfxCpu_IntrinsicsTasking.h File Reference
#include "Ifx_Types.h"
Include dependency graph for IfxCpu_IntrinsicsTasking.h:

Go to the source code of this file.

Macros

#define | Ifx__non_return_call(fun) __asm("\tji %0"::"a"(fun))
#define | Ifx__minX(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxX(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturateX(X, Min, Max) ( Ifx__minX(Ifx__maxX(X, Min), Max) )
#define | Ifx__checkrangeX(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__saturate(X, Min, Max) ( __min(__max(X, Min), Max) )
#define | Ifx__saturateu(X, Min, Max) ( __minu(__maxu(X, Min), Max) )
#define | Ifx__checkrange(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__sqrf(X) ((X) * (X))
#define | Ifx__sqrtf(X) sqrtf(X)
#define | Ifx__roundf(X) ((((X) - (int)(X)) > 0.5) ? (1 + (int)(X)) : ((int)(X)))
#define | Ifx__absf(X) ( ((X) < 0.0) ? -(X) : (X) )
#define | Ifx__minf(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxf(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturatef(X, Min, Max) ( Ifx__minf(_Ifx_maxf(X, Min), Max) )
#define | Ifx__checkrangef(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__abs_stdreal(X) ( ((X) > 0.0) ? (X) : -(X) )
#define | Ifx__min_stdreal(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__max_stdreal(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturate_stdreal(X, Min, Max) ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )
#define | Ifx__neqf(X, Y) ( ((X) > (Y)) || ((X) < (Y)) )
#define | Ifx__leqf(X, Y) ( !((X) > (Y)) )
#define | Ifx__geqf(X, Y) ( !((X) < (Y)) )
#define | Ifx__fract_to_float(value) ((float)(value))
#define | Ifx__mulfractlong __mulfractlong
#define | Ifx__mulfractfract(fractvalue1, fractvalue2) ((fractvalue1)*(fractvalue2))
#define | Ifx__extru(a, p, w) __extru(a,p,w)
#define | Ifx__extr(a, p, w) __extr(a,p,w)
#define | Ifx__imaskldmst(a, v, b, p) __imaskldmst((int*)a, v, b, p)
#define | Ifx__insert(a, b, p, w) __insert(a,b,p,w)
#define | Ifx__disable_and_save __disable_and_save
#define | Ifx__restore __restore
#define | Ifx__mtcr_no_isync(reg, val) __asm("mtcr %0,%1"::"i"(reg),"d"(val));
#define | Ifx__adds(a, b) ((__sat int)(a)+(__sat int)(b))
#define | Ifx__addsu(a, b) ((__sat unsigned int)(a)+(__sat unsigned int)(b))
#define | Ifx__subs(a, b) ((__sat int)(a)-(__sat int)(b))
#define | Ifx__subsu(a, b) ((__sat unsigned int )(a)-(__sat unsigned int )(b))
#define | Ifx__NOP(n) __asm(".DUP " #n "\n\tnop16\n\t.ENDM\n")
#define | Ifx__mem_barrier __asm("":::"memory");
#define | Ifx__fract_to_sfract __round16
#define | Ifx__ldmst(addr, mask, data) Ifx__ldmstAsm(addr, mask, data)
#define | Ifx___setareg(areg, val) { __asm (" movh.a\t "#areg",#@his("#val")\n lea\t "#areg",["#areg"]@los("#val")"); }
#define | Ifx__setareg(areg, val) Ifx___setareg(areg,val)
#define | Ifx__cmpAndSwap(address, value, condition) __cmpswapw((address), ((unsigned long)value), (condition) )
This function is a implementation of a binary semaphore using compare and swap instruction. More...
#define | __non_return_call Ifx__non_return_call
#define | __jump_and_link Ifx__jump_and_link
#define | __moveToDataParam0 Ifx__moveToDataParam0
#define | __moveToAddrParam0 Ifx__moveToAddrParam0
#define | __getDataParamRet Ifx__getDataParamRet
#define | __moveToDataParamRet Ifx__moveToDataParamRet
#define | __jumpToFunction Ifx__jumpToFunction
#define | __jumpToFunctionWithLink Ifx__jumpToFunctionWithLink
#define | __jumpBackToLink Ifx__jumpBackToLink
#define | __minX Ifx__minX
#define | __maxX Ifx__maxX
#define | __saturateX Ifx__saturateX
#define | __checkrangeX Ifx__checkrangeX
#define | __saturate Ifx__saturate
#define | __saturateu Ifx__saturateu
#define | __checkrange Ifx__checkrange
#define | __sqrtf Ifx__sqrtf
#define | __sqrf Ifx__sqrf
#define | __roundf Ifx__roundf
#define | __absf Ifx__absf
#define | __maxf Ifx__maxf
#define | __saturatef Ifx__saturatef
#define | __minf Ifx__minf
#define | __checkrangef Ifx__checkrangef
#define | __abs_stdreal Ifx__abs_stdreal
#define | __saturate_stdreal Ifx__saturate_stdreal
#define | __min_stdreal Ifx__min_stdreal
#define | __max_stdreal Ifx__max_stdreal
#define | __neqf Ifx__neqf
#define | __leqf Ifx__leqf
#define | __geqf Ifx__geqf
#define | __fract_to_float Ifx__fract_to_float
#define | __mulfractlong Ifx__mulfractlong
#define | __mulfractfract Ifx__mulfractfract
#define | __disable_and_save Ifx__disable_and_save
#define | __restore Ifx__restore
#define | __mtcr_no_isync Ifx__mtcr_no_isync
#define | __adds Ifx__adds
#define | __addsu Ifx__addsu
#define | __subs Ifx__subs
#define | __subsu Ifx__subsu
#define | __nops Ifx__nops
#define | NOP Ifx__NOP
#define | __mem_barrier Ifx__mem_barrier
#define | __ldmst Ifx__ldmst
#define | __ldmstC Ifx__ldmstC
#define | __float_to_sfract Ifx__float_to_sfract
#define | __float_to_fract Ifx__float_to_fract
#define | __fract_to_sfract Ifx__fract_to_sfract
#define | __ldmstAsm Ifx__ldmstAsm
#define | __stopPerfCounters Ifx__stopPerfCounters
#define | __setareg Ifx__setareg
#define | ___setareg Ifx___setareg
#define | __cmpAndSwap Ifx__cmpAndSwap
#define | __fixpoint_to_float32 Ifx__fixpoint_to_float32
#define | __getA11 Ifx__getA11
#define | __setStackPointer Ifx__setStackPointer
#define | __popcnt Ifx__popcnt

Functions

IFX_INLINE void | Ifx__jump_and_link (void(*fun)(void))
IFX_INLINE void | Ifx__moveToDataParam0 (unsigned int var)
IFX_INLINE void | Ifx__moveToAddrParam0 (const void *var)
IFX_INLINE unsigned int | Ifx__getDataParamRet (void)
IFX_INLINE void | Ifx__moveToDataParamRet (unsigned int var)
IFX_INLINE void | Ifx__jumpToFunction (const void *fun)
IFX_INLINE void | Ifx__jumpToFunctionWithLink (const void *fun)
IFX_INLINE void | Ifx__jumpBackToLink (void)
IFX_INLINE void | Ifx__nops (void *cnt)
IFX_INLINE void | Ifx__ldmstAsm (volatile void *addr, uint32 mask, uint32 data)
IFX_INLINE fract | Ifx__float_to_fract (float a)
IFX_INLINE sfract | Ifx__float_to_sfract (float a)
IFX_INLINE void | Ifx__stopPerfCounters (void)
IFX_INLINE float32 | Ifx__fixpoint_to_float32 (fract value, sint32 shift)
Convert a fixpoint value to float32. More...
IFX_INLINE void * | Ifx__getA11 (void)
IFX_INLINE void | Ifx__setStackPointer (void *stackAddr)
IFX_INLINE uint32 | IfxCpu_calculateCrc32 (uint32 *startaddress, uint8 length)
IFX_INLINE uint32 | IfxCpu_getRandomVal (uint32 a, uint32 x, uint32 m)
IFX_INLINE sint32 | Ifx__popcnt (sint32 a)

Detailed Description

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCpu_IntrinsicsTasking.h.

Macro Definition Documentation

◆ ___setareg

#define ___setareg Ifx___setareg

Definition at line 609 of file IfxCpu_IntrinsicsTasking.h.

◆ __abs_stdreal

#define __abs_stdreal Ifx__abs_stdreal

Definition at line 497 of file IfxCpu_IntrinsicsTasking.h.

◆ __absf

#define __absf Ifx__absf

Definition at line 477 of file IfxCpu_IntrinsicsTasking.h.

◆ __adds

#define __adds Ifx__adds

Definition at line 549 of file IfxCpu_IntrinsicsTasking.h.

◆ __addsu

#define __addsu Ifx__addsu

Definition at line 553 of file IfxCpu_IntrinsicsTasking.h.

◆ __checkrange

#define __checkrange Ifx__checkrange

Definition at line 461 of file IfxCpu_IntrinsicsTasking.h.

◆ __checkrangef

#define __checkrangef Ifx__checkrangef

Definition at line 493 of file IfxCpu_IntrinsicsTasking.h.

◆ __checkrangeX

#define __checkrangeX Ifx__checkrangeX

Definition at line 449 of file IfxCpu_IntrinsicsTasking.h.

◆ __cmpAndSwap

#define __cmpAndSwap Ifx__cmpAndSwap

Definition at line 613 of file IfxCpu_IntrinsicsTasking.h.

◆ __disable_and_save

#define __disable_and_save Ifx__disable_and_save

Definition at line 537 of file IfxCpu_IntrinsicsTasking.h.

◆ __fixpoint_to_float32

#define __fixpoint_to_float32 Ifx__fixpoint_to_float32

Definition at line 617 of file IfxCpu_IntrinsicsTasking.h.

◆ __float_to_fract

#define __float_to_fract Ifx__float_to_fract

Definition at line 589 of file IfxCpu_IntrinsicsTasking.h.

◆ __float_to_sfract

#define __float_to_sfract Ifx__float_to_sfract

Definition at line 585 of file IfxCpu_IntrinsicsTasking.h.

◆ __fract_to_float

#define __fract_to_float Ifx__fract_to_float

Definition at line 525 of file IfxCpu_IntrinsicsTasking.h.

◆ __fract_to_sfract

#define __fract_to_sfract Ifx__fract_to_sfract

Definition at line 593 of file IfxCpu_IntrinsicsTasking.h.

◆ __geqf

#define __geqf Ifx__geqf

Definition at line 521 of file IfxCpu_IntrinsicsTasking.h.

◆ __getA11

#define __getA11 Ifx__getA11

Definition at line 621 of file IfxCpu_IntrinsicsTasking.h.

◆ __getDataParamRet

#define __getDataParamRet Ifx__getDataParamRet

Definition at line 417 of file IfxCpu_IntrinsicsTasking.h.

◆ __jump_and_link

#define __jump_and_link Ifx__jump_and_link

Definition at line 405 of file IfxCpu_IntrinsicsTasking.h.

◆ __jumpBackToLink

#define __jumpBackToLink Ifx__jumpBackToLink

Definition at line 433 of file IfxCpu_IntrinsicsTasking.h.

◆ __jumpToFunction

#define __jumpToFunction Ifx__jumpToFunction

Definition at line 425 of file IfxCpu_IntrinsicsTasking.h.

◆ __jumpToFunctionWithLink

#define __jumpToFunctionWithLink Ifx__jumpToFunctionWithLink

Definition at line 429 of file IfxCpu_IntrinsicsTasking.h.

◆ __ldmst

#define __ldmst Ifx__ldmst

Definition at line 577 of file IfxCpu_IntrinsicsTasking.h.

◆ __ldmstAsm

#define __ldmstAsm Ifx__ldmstAsm

Definition at line 597 of file IfxCpu_IntrinsicsTasking.h.

◆ __ldmstC

#define __ldmstC Ifx__ldmstC

Definition at line 581 of file IfxCpu_IntrinsicsTasking.h.

◆ __leqf

#define __leqf Ifx__leqf

Definition at line 517 of file IfxCpu_IntrinsicsTasking.h.

◆ __max_stdreal

#define __max_stdreal Ifx__max_stdreal

Definition at line 509 of file IfxCpu_IntrinsicsTasking.h.

◆ __maxf

#define __maxf Ifx__maxf

Definition at line 481 of file IfxCpu_IntrinsicsTasking.h.

◆ __maxX

#define __maxX Ifx__maxX

Definition at line 441 of file IfxCpu_IntrinsicsTasking.h.

◆ __mem_barrier

#define __mem_barrier Ifx__mem_barrier

Definition at line 573 of file IfxCpu_IntrinsicsTasking.h.

◆ __min_stdreal

#define __min_stdreal Ifx__min_stdreal

Definition at line 505 of file IfxCpu_IntrinsicsTasking.h.

◆ __minf

#define __minf Ifx__minf

Definition at line 489 of file IfxCpu_IntrinsicsTasking.h.

◆ __minX

#define __minX Ifx__minX

Definition at line 437 of file IfxCpu_IntrinsicsTasking.h.

◆ __moveToAddrParam0

#define __moveToAddrParam0 Ifx__moveToAddrParam0

Definition at line 413 of file IfxCpu_IntrinsicsTasking.h.

◆ __moveToDataParam0

#define __moveToDataParam0 Ifx__moveToDataParam0

Definition at line 409 of file IfxCpu_IntrinsicsTasking.h.

◆ __moveToDataParamRet

#define __moveToDataParamRet Ifx__moveToDataParamRet

Definition at line 421 of file IfxCpu_IntrinsicsTasking.h.

◆ __mtcr_no_isync

#define __mtcr_no_isync Ifx__mtcr_no_isync

Definition at line 545 of file IfxCpu_IntrinsicsTasking.h.

◆ __mulfractfract

#define __mulfractfract Ifx__mulfractfract

Definition at line 533 of file IfxCpu_IntrinsicsTasking.h.

◆ __mulfractlong

#define __mulfractlong Ifx__mulfractlong

Definition at line 529 of file IfxCpu_IntrinsicsTasking.h.

◆ __neqf

#define __neqf Ifx__neqf

Definition at line 513 of file IfxCpu_IntrinsicsTasking.h.

◆ __non_return_call

#define __non_return_call Ifx__non_return_call

Definition at line 401 of file IfxCpu_IntrinsicsTasking.h.

◆ __nops

#define __nops Ifx__nops

Definition at line 565 of file IfxCpu_IntrinsicsTasking.h.

◆ __popcnt

#define __popcnt Ifx__popcnt

Definition at line 629 of file IfxCpu_IntrinsicsTasking.h.

◆ __restore

#define __restore Ifx__restore

Definition at line 541 of file IfxCpu_IntrinsicsTasking.h.

◆ __roundf

#define __roundf Ifx__roundf

Definition at line 473 of file IfxCpu_IntrinsicsTasking.h.

◆ __saturate

#define __saturate Ifx__saturate

Definition at line 453 of file IfxCpu_IntrinsicsTasking.h.

◆ __saturate_stdreal

#define __saturate_stdreal Ifx__saturate_stdreal

Definition at line 501 of file IfxCpu_IntrinsicsTasking.h.

◆ __saturatef

#define __saturatef Ifx__saturatef

Definition at line 485 of file IfxCpu_IntrinsicsTasking.h.

◆ __saturateu

#define __saturateu Ifx__saturateu

Definition at line 457 of file IfxCpu_IntrinsicsTasking.h.

◆ __saturateX

#define __saturateX Ifx__saturateX

Definition at line 445 of file IfxCpu_IntrinsicsTasking.h.

◆ __setareg

#define __setareg Ifx__setareg

Definition at line 605 of file IfxCpu_IntrinsicsTasking.h.

◆ __setStackPointer

#define __setStackPointer Ifx__setStackPointer

Definition at line 625 of file IfxCpu_IntrinsicsTasking.h.

◆ __sqrf

#define __sqrf Ifx__sqrf

Definition at line 469 of file IfxCpu_IntrinsicsTasking.h.

◆ __sqrtf

#define __sqrtf Ifx__sqrtf

Definition at line 465 of file IfxCpu_IntrinsicsTasking.h.

◆ __stopPerfCounters

#define __stopPerfCounters Ifx__stopPerfCounters

Definition at line 601 of file IfxCpu_IntrinsicsTasking.h.

◆ __subs

#define __subs Ifx__subs

Definition at line 557 of file IfxCpu_IntrinsicsTasking.h.

◆ __subsu

#define __subsu Ifx__subsu

Definition at line 561 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx___setareg

#define Ifx___setareg | ( | areg,
 |  | val
 | ) | { __asm (" movh.a\t "#areg",#@his("#val")\n lea\t "#areg",["#areg"]@los("#val")"); }

Definition at line 310 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__cmpAndSwap

#define Ifx__cmpAndSwap | ( | address,
 |  | value,
 |  | condition
 | ) | __cmpswapw((address), ((unsigned long)value), (condition) )

This function is a implementation of a binary semaphore using compare and swap instruction.

Parameters
address | address of resource.
value | This variable is updated with status of address
condition | if the value of address matches with the value of condition, then swap of value & address occurs.

Definition at line 320 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__non_return_call

#define Ifx__non_return_call ( fun ) __asm("\tji %0"::"a"(fun))

Function call without return

Definition at line 54 of file IfxCpu_IntrinsicsTasking.h.

Referenced by Ifx__jumpToFunction().

◆ Ifx__setareg

#define Ifx__setareg | ( | areg,
 |  | val
 | ) | Ifx___setareg(areg,val)

Definition at line 312 of file IfxCpu_IntrinsicsTasking.h.

◆ NOP

#define NOP Ifx__NOP

Definition at line 569 of file IfxCpu_IntrinsicsTasking.h.

Function Documentation

◆ Ifx__fixpoint_to_float32()

IFX_INLINE float32 Ifx__fixpoint_to_float32 | ( | fract | value,
 |  | sint32 | shift
 | ) |  |

Convert a fixpoint value to float32.

This function converts a value from a fixpoint format to a float32 format.

Parameters
value | value to be converted.
shift | position of the fix point. Range = [-256, 255] => (Qx.y format where x = shift+1).
Returns
Returns the converted value in the float32 format.

Definition at line 334 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__getA11()

IFX_INLINE void* Ifx__getA11 ( void )

Definition at line 345 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__getDataParamRet()

IFX_INLINE unsigned int Ifx__getDataParamRet ( void )

Definition at line 73 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__jump_and_link()

IFX_INLINE void Ifx__jump_and_link ( void(*)(void) fun )

Jump and link

Definition at line 58 of file IfxCpu_IntrinsicsTasking.h.

Referenced by Ifx__jumpToFunctionWithLink().

◆ Ifx__jumpBackToLink()

IFX_INLINE void Ifx__jumpBackToLink ( void )

Definition at line 95 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__jumpToFunction()

IFX_INLINE void Ifx__jumpToFunction ( const void * fun )

Definition at line 85 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__jumpToFunctionWithLink()

IFX_INLINE void Ifx__jumpToFunctionWithLink ( const void * fun )

Definition at line 90 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__moveToAddrParam0()

IFX_INLINE void Ifx__moveToAddrParam0 ( const void * var )

Definition at line 68 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__moveToDataParam0()

IFX_INLINE void Ifx__moveToDataParam0 ( unsigned int var )

Definition at line 63 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__moveToDataParamRet()

IFX_INLINE void Ifx__moveToDataParamRet ( unsigned int var )

Definition at line 80 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__popcnt()

IFX_INLINE sint32 Ifx__popcnt ( sint32 a )

Definition at line 389 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__setStackPointer()

IFX_INLINE void Ifx__setStackPointer ( void * stackAddr )

Definition at line 352 of file IfxCpu_IntrinsicsTasking.h.

◆ IfxCpu_calculateCrc32()

IFX_INLINE uint32 IfxCpu_calculateCrc32 | ( | uint32 * | startaddress,
 |  | uint8 | length
 | ) |  |

Definition at line 357 of file IfxCpu_IntrinsicsTasking.h.

◆ IfxCpu_getRandomVal()

IFX_INLINE uint32 IfxCpu_getRandomVal | ( | uint32 | a,
 |  | uint32 | x,
 |  | uint32 | m
 | ) |  |

Definition at line 372 of file IfxCpu_IntrinsicsTasking.h.


iLLD_TC38A: IfxCpu_Irq.c File Reference

  • Cpu
  • Irq
Functions
IfxCpu_Irq.c File Reference

This file contains the APIs for Interrupt related functions. More...

#include "Cpu/Irq/IfxCpu_Irq.h"
#include "Tricore/Compilers/Compilers.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "IfxCpu_reg.h"
Include dependency graph for IfxCpu_Irq.c:

Go to the source code of this file.

Functions

IfxSrc_Tos IfxCpu_Irq_getTos (IfxCpu_ResourceCpu coreId)
API to get type of service of the caller CPU. More...

Detailed Description

This file contains the APIs for Interrupt related functions.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCpu_Irq.c.


iLLD_TC38A: IfxCpu_Irq.h File Reference

  • Cpu
  • Irq
Functions
IfxCpu_Irq.h File Reference

This file contains the APIs for Interrupt related functions. More...

#include "Ifx_Cfg.h"
#include "Cpu/Std/Ifx_Types.h"
#include "Cpu/Std/IfxCpu.h"
#include "Src/Std/IfxSrc.h"
Include dependency graph for IfxCpu_Irq.h:

Go to the source code of this file.

Functions

IFX_EXTERN IfxSrc_Tos IfxCpu_Irq_getTos (IfxCpu_ResourceCpu coreId)
API to get type of service of the caller CPU. More...

Detailed Description

This file contains the APIs for Interrupt related functions.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCpu_Irq.h.


iLLD_TC38A: IfxCpu_Trap.c File Reference

  • Cpu
  • Trap
Macros | Functions
IfxCpu_Trap.c File Reference

This file contains the APIs for Trap related functions. More...

#include "IfxCpu_Trap.h"
#include "Cpu/Std/IfxCpu.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "IfxCpu_reg.h"
#include "Ifx_Cfg.h"
Include dependency graph for IfxCpu_Trap.c:

Go to the source code of this file.

Macros

#define | IFX_CFG_CPU_TRAP_TSR_HOOK(trapWatch)
Configuration for CpuX enable. More...
#define | IFX_CFG_CPU_TRAP_SYSCALL_CPU0_HOOK(trapWatch) ((void)trapWatch)
#define | IFX_CFG_CPU_TRAP_SYSCALL_CPU1_HOOK(trapWatch) ((void)trapWatch)
#define | IFX_CFG_CPU_TRAP_SYSCALL_CPU2_HOOK(trapWatch) ((void)trapWatch)
#define | IFX_CFG_CPU_TRAP_SYSCALL_CPU3_HOOK(trapWatch) ((void)trapWatch)
#define | IFX_CFG_CPU_TRAP_SYSCALL_CPU4_HOOK(trapWatch) ((void)trapWatch)
#define | IFX_CFG_CPU_TRAP_SYSCALL_CPU5_HOOK(trapWatch) ((void)trapWatch)
#define | IFX_CFG_CPU_TRAP_NMI_HOOK(trapWatch) ((void)trapWatch)
#define | IFX_CFG_CPU_TRAP_MME_HOOK(trapWatch) ((void)trapWatch)
#define | IFX_CFG_CPU_TRAP_IPE_HOOK(trapWatch) ((void)trapWatch)
#define | IFX_CFG_CPU_TRAP_IE_HOOK(trapWatch) ((void)trapWatch)
#define | IFX_CFG_CPU_TRAP_CME_HOOK(trapWatch) ((void)trapWatch)
#define | IFX_CFG_CPU_TRAP_BE_HOOK(trapWatch) ((void)trapWatch)
#define | IFX_CFG_CPU_TRAP_ASSERT_HOOK(trapWatch) ((void)trapWatch)
#define | IFX_CFG_CPU_TRAP_DEBUG __debug()

Functions

IFX_INLINE IfxCpu_Trap | IfxCpu_Trap_extractTrapInfo (uint8 trapClass, uint32 tin)
void | IfxCpu_Trap_memoryManagementError (uint32 tin)
void | IfxCpu_Trap_internalProtectionError (uint32 tin)
void | IfxCpu_Trap_instructionError (uint32 tin)
void | IfxCpu_Trap_contextManagementError (uint32 tin)
void | IfxCpu_Trap_busError (uint32 tin)
void | IfxCpu_Trap_assertion (uint32 tin)
void | IfxCpu_Trap_systemCall_Cpu0 (uint32 tin)
void | IfxCpu_Trap_nonMaskableInterrupt (uint32 tin)
void | IfxCpu_Trap_vectorTable0 (void)

Detailed Description

This file contains the APIs for Trap related functions.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCpu_Trap.c.

Macro Definition Documentation

◆ IFX_CFG_CPU_TRAP_ASSERT_HOOK

#define IFX_CFG_CPU_TRAP_ASSERT_HOOK ( trapWatch ) ((void)trapWatch)

By default assertion is empty

Definition at line 102 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_assertion().

◆ IFX_CFG_CPU_TRAP_BE_HOOK

#define IFX_CFG_CPU_TRAP_BE_HOOK ( trapWatch ) ((void)trapWatch)

By default bus Error macro is empty

Definition at line 99 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_busError().

◆ IFX_CFG_CPU_TRAP_CME_HOOK

#define IFX_CFG_CPU_TRAP_CME_HOOK ( trapWatch ) ((void)trapWatch)

By default context Management Error macro is empty

Definition at line 96 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_contextManagementError().

◆ IFX_CFG_CPU_TRAP_DEBUG

#define IFX_CFG_CPU_TRAP_DEBUG __debug()

Definition at line 106 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_assertion(), IfxCpu_Trap_busError(), IfxCpu_Trap_contextManagementError(), IfxCpu_Trap_instructionError(), IfxCpu_Trap_internalProtectionError(), and IfxCpu_Trap_memoryManagementError().

◆ IFX_CFG_CPU_TRAP_IE_HOOK

#define IFX_CFG_CPU_TRAP_IE_HOOK ( trapWatch ) ((void)trapWatch)

By default instruction Error macro is empty

Definition at line 93 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_instructionError().

◆ IFX_CFG_CPU_TRAP_IPE_HOOK

#define IFX_CFG_CPU_TRAP_IPE_HOOK ( trapWatch ) ((void)trapWatch)

By default internal Protection Error macro is empty

Definition at line 90 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_internalProtectionError().

◆ IFX_CFG_CPU_TRAP_MME_HOOK

#define IFX_CFG_CPU_TRAP_MME_HOOK ( trapWatch ) ((void)trapWatch)

By default memory Management Error macro is empty

Definition at line 87 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_memoryManagementError().

◆ IFX_CFG_CPU_TRAP_NMI_HOOK

#define IFX_CFG_CPU_TRAP_NMI_HOOK ( trapWatch ) ((void)trapWatch)

By default NMI macro is empty

Definition at line 84 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_nonMaskableInterrupt().

◆ IFX_CFG_CPU_TRAP_SYSCALL_CPU0_HOOK

#define IFX_CFG_CPU_TRAP_SYSCALL_CPU0_HOOK ( trapWatch ) ((void)trapWatch)

By default macro is empty

Definition at line 66 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_systemCall_Cpu0().

◆ IFX_CFG_CPU_TRAP_SYSCALL_CPU1_HOOK

#define IFX_CFG_CPU_TRAP_SYSCALL_CPU1_HOOK ( trapWatch ) ((void)trapWatch)

By default macro is empty

Definition at line 69 of file IfxCpu_Trap.c.

◆ IFX_CFG_CPU_TRAP_SYSCALL_CPU2_HOOK

#define IFX_CFG_CPU_TRAP_SYSCALL_CPU2_HOOK ( trapWatch ) ((void)trapWatch)

By default macro is empty

Definition at line 72 of file IfxCpu_Trap.c.

◆ IFX_CFG_CPU_TRAP_SYSCALL_CPU3_HOOK

#define IFX_CFG_CPU_TRAP_SYSCALL_CPU3_HOOK ( trapWatch ) ((void)trapWatch)

By default macro is empty

Definition at line 75 of file IfxCpu_Trap.c.

◆ IFX_CFG_CPU_TRAP_SYSCALL_CPU4_HOOK

#define IFX_CFG_CPU_TRAP_SYSCALL_CPU4_HOOK ( trapWatch ) ((void)trapWatch)

By default macro is empty

Definition at line 78 of file IfxCpu_Trap.c.

◆ IFX_CFG_CPU_TRAP_SYSCALL_CPU5_HOOK

#define IFX_CFG_CPU_TRAP_SYSCALL_CPU5_HOOK ( trapWatch ) ((void)trapWatch)

By default macro is empty

Definition at line 81 of file IfxCpu_Trap.c.

◆ IFX_CFG_CPU_TRAP_TSR_HOOK

#define IFX_CFG_CPU_TRAP_TSR_HOOK ( trapWatch )

Configuration for CpuX enable.

By default macro is empty

Definition at line 63 of file IfxCpu_Trap.c.

Function Documentation

◆ IfxCpu_Trap_assertion()

void IfxCpu_Trap_assertion ( uint32 tin )

Definition at line 181 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_vectorTable0().

◆ IfxCpu_Trap_busError()

void IfxCpu_Trap_busError ( uint32 tin )

Definition at line 170 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_vectorTable0().

◆ IfxCpu_Trap_contextManagementError()

void IfxCpu_Trap_contextManagementError ( uint32 tin )

Definition at line 159 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_vectorTable0().

◆ IfxCpu_Trap_extractTrapInfo()

IFX_INLINE IfxCpu_Trap IfxCpu_Trap_extractTrapInfo | ( | uint8 | trapClass,
 |  | uint32 | tin
 | ) |  |

Definition at line 115 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_assertion(), IfxCpu_Trap_busError(), IfxCpu_Trap_contextManagementError(), IfxCpu_Trap_instructionError(), IfxCpu_Trap_internalProtectionError(), IfxCpu_Trap_memoryManagementError(), IfxCpu_Trap_nonMaskableInterrupt(), and IfxCpu_Trap_systemCall_Cpu0().

◆ IfxCpu_Trap_instructionError()

void IfxCpu_Trap_instructionError ( uint32 tin )

Definition at line 148 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_vectorTable0().

◆ IfxCpu_Trap_internalProtectionError()

void IfxCpu_Trap_internalProtectionError ( uint32 tin )

Definition at line 137 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_vectorTable0().

◆ IfxCpu_Trap_memoryManagementError()

void IfxCpu_Trap_memoryManagementError ( uint32 tin )

Definition at line 126 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_vectorTable0().

◆ IfxCpu_Trap_nonMaskableInterrupt()

void IfxCpu_Trap_nonMaskableInterrupt ( uint32 tin )

Definition at line 256 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_vectorTable0().

◆ IfxCpu_Trap_systemCall_Cpu0()

void IfxCpu_Trap_systemCall_Cpu0 ( uint32 tin )

Definition at line 192 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_vectorTable0().

◆ IfxCpu_Trap_vectorTable0()

void IfxCpu_Trap_vectorTable0 ( void )

Definition at line 283 of file IfxCpu_Trap.c.


iLLD_TC38A: IfxCpu_Trap.h File Reference

  • Cpu
  • Trap
Data Structures | Typedefs | Enumerations
IfxCpu_Trap.h File Reference
#include "Cpu/Std/Ifx_Types.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "Ifx_Cfg.h"
Include dependency graph for IfxCpu_Trap.h:

Go to the source code of this file.

Data Structures

union | IfxCpu_Trap_Id
Union to abstract Identification numbers under Traps. More...
struct | IfxCpu_Trap
Structure to contain the trap information. More...

Typedefs

typedef sint32 | IfxCpu_Trap_SystemCall_Id
Type for Identification numbers under SystemCall Trap. More...
typedef sint32 | IfxCpu_Trap_NonMaskableInterrupt_Id
Type for Identification number for Non Maskable Interrupt Trap. More...

Enumerations

enum IfxCpu_Trap_Class {
IfxCpu_Trap_Class_memoryManagement = 0U,
IfxCpu_Trap_Class_internalProtection = 1U,
IfxCpu_Trap_Class_instructionErrors = 2U,
IfxCpu_Trap_Class_contextManagement = 3U,
IfxCpu_Trap_Class_bus = 4U,
IfxCpu_Trap_Class_assertion = 5U,
IfxCpu_Trap_Class_systemCall = 6U,
IfxCpu_Trap_Class_nonMaskableInterrupt = 7U
}
Enum for available Trap classes. More...
enum IfxCpu_Trap_MemoryManagement_Id {
IfxCpu_Trap_MemoryManagement_Id_virtualAddressFill = 0U,
IfxCpu_Trap_MemoryManagement_Id_virtualAddressProtection = 1U
}
Enum for available Identification numbers under Memory Management Trap. More...
enum IfxCpu_Trap_InternalProtection_Id {
IfxCpu_Trap_InternalProtection_Id_privilegeViolation = 1U,
IfxCpu_Trap_InternalProtection_Id_memoryProtectionRead = 2U,
IfxCpu_Trap_InternalProtection_Id_memoryProtectionWrite = 3U,
IfxCpu_Trap_InternalProtection_Id_memoryProtectionExecute = 4U,
IfxCpu_Trap_InternalProtection_Id_memoryProtectionPeripheralAccess = 5U,
IfxCpu_Trap_InternalProtection_Id_memoryProtectionNullAddress = 6U,
IfxCpu_Trap_InternalProtection_Id_globalRegisterWriteProtection = 7U
}
Enum for available Identification numbers under Internal Protection Trap. More...
enum IfxCpu_Trap_InstructionErrors_Id {
IfxCpu_Trap_InstructionErrors_Id_illegalOpcode = 1U,
IfxCpu_Trap_InstructionErrors_Id_unimplementedOpcode = 2U,
IfxCpu_Trap_InstructionErrors_Id_invalidOperand = 3U,
IfxCpu_Trap_InstructionErrors_Id_dataAddressAlignment = 4U,
IfxCpu_Trap_InstructionErrors_Id_invalidMemoryAddress = 5U
}
Enum for available Identification numbers under Instruction Errors Trap. More...
enum IfxCpu_Trap_ContextManagement_Id {
IfxCpu_Trap_ContextManagement_Id_freeContextListDepletion = 1U,
IfxCpu_Trap_ContextManagement_Id_callDepthOverflow = 2U,
IfxCpu_Trap_ContextManagement_Id_callDepthUnderflow = 3U,
IfxCpu_Trap_ContextManagement_Id_freeContextListUnderflow = 4U,
IfxCpu_Trap_ContextManagement_Id_callStackUnderflow = 5U,
IfxCpu_Trap_ContextManagement_Id_contextType = 6U,
IfxCpu_Trap_ContextManagement_Id_nestingError = 7U
}
Enum for available Identification numbers under Context Management Trap. More...
enum IfxCpu_Trap_Bus_Id {
IfxCpu_Trap_Bus_Id_programFetchSynchronousError = 1U,
IfxCpu_Trap_Bus_Id_dataAccessSynchronousError = 2U,
IfxCpu_Trap_Bus_Id_dataAccessAsynchronousError = 3U,
IfxCpu_Trap_Bus_Id_CoprocessorTrapAsynchronousError = 4U,
IfxCpu_Trap_Bus_Id_programMemoryIntegrityError = 5U,
IfxCpu_Trap_Bus_Id_dataMemoryIntegrityError = 6U,
IfxCpu_Trap_Bus_Id_temporalAsynchronousError = 7U
}
Enum for available Identification numbers under Bus Trap. More...
enum IfxCpu_Trap_Assertion_Id {
IfxCpu_Trap_Assertion_Id_arithmeticOverflow = 1U,
IfxCpu_Trap_Assertion_Id_stickyArithmeticOverflow = 2U
}
Enum for available Identification numbers under Assertion Trap. More...


iLLD_TC38A: IfxDma.c File Reference

  • Dma
  • Std
IfxDma.c File Reference

DMA basic functionality. More...

#include "IfxDma.h"
Include dependency graph for IfxDma.c:

Go to the source code of this file.

Detailed Description

DMA basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxDma.c.


iLLD_TC38A: IfxDma_cfg.c File Reference

  • _Impl
IfxDma_cfg.c File Reference

DMA on-chip implementation data. More...

#include "IfxDma_cfg.h"
Include dependency graph for IfxDma_cfg.c:

Go to the source code of this file.

Detailed Description

DMA on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxDma_cfg.c.


iLLD_TC38A: IfxDma_Dma.c File Reference

  • Dma
  • Dma
Functions
IfxDma_Dma.c File Reference

DMA DMA details. More...

#include "IfxDma_Dma.h"
Include dependency graph for IfxDma_Dma.c:

Go to the source code of this file.

Functions

IFX_STATIC void | IfxDma_Dma_configureTransactionSet (Ifx_DMA_CH *channel, const IfxDma_Dma_ChannelConfig *config)
local function to copy a transaction set into DMA channel SFRs or memory location (for linked lists) More...
void | IfxDma_Dma_createModuleHandle (IfxDma_Dma *dmaHandle, Ifx_DMA *dma)
initializes a DMA module handle based on the current configuration. Can be used in code where it's ensure that the DMA module is already initialized, and a DMA handle isn't globally available. More...
void | IfxDma_Dma_deInitChannel (IfxDma_Dma *dma, IfxDma_ChannelId channel)
de-initialize the DMA channel More...
void | IfxDma_Dma_initChannel (IfxDma_Dma_Channel *channel, const IfxDma_Dma_ChannelConfig *config)
initialize the DMA channel More...
void | IfxDma_Dma_initChannelConfig (IfxDma_Dma_ChannelConfig *config, IfxDma_Dma *dma)
initialize the DMA module channel configuration More...
void | IfxDma_Dma_initLinkedListEntry (void *ptrToAddress, const IfxDma_Dma_ChannelConfig *config)
linked list functionality within the DMA module More...
void | IfxDma_Dma_initModule (IfxDma_Dma *dma, const IfxDma_Dma_Config *config)
Initialize the DMA module. More...
void | IfxDma_Dma_initModuleConfig (IfxDma_Dma_Config *config, Ifx_DMA *dma)
initialize the DMA module configuration More...

Detailed Description

DMA DMA details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxDma_Dma.c.

Function Documentation

◆ IfxDma_Dma_configureTransactionSet()

IFX_STATIC void IfxDma_Dma_configureTransactionSet | ( | Ifx_DMA_CH * | channel,
 |  | const IfxDma_Dma_ChannelConfig * | config
 | ) |  |

local function to copy a transaction set into DMA channel SFRs or memory location (for linked lists)

Parameters
channel | Specifies the pointer to DMA channel registers
config | pointer to the DMA default channel configuration structure
Returns
None

Definition at line 63 of file IfxDma_Dma.c.

Referenced by IfxDma_Dma_initChannel(), and IfxDma_Dma_initLinkedListEntry().


iLLD_TC38A: IfxDmu_PinMap.c File Reference

  • _PinMap
Variables
IfxDmu_PinMap.c File Reference

DMU I/O map. More...

#include "IfxDmu_PinMap.h"
Include dependency graph for IfxDmu_PinMap.c:

Go to the source code of this file.

Variables

IfxDmu_Fdest_In | IfxDmu_FDEST_P21_0_IN = {&MODULE_DMU, {&MODULE_P21, 0}, Ifx_RxSel_a}
const IfxDmu_Fdest_In * | IfxDmu_Fdest_In_pinTable [IFXDMU_PINMAP_NUM_MODULES][IFXDMU_PINMAP_NUM_0S][IFXDMU_PINMAP_FDEST_IN_NUM_ITEMS]

Detailed Description

DMU I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxDmu_PinMap.c.

Variable Documentation

◆ IfxDmu_Fdest_In_pinTable

const IfxDmu_Fdest_In* IfxDmu_Fdest_In_pinTable[IFXDMU_PINMAP_NUM_MODULES][IFXDMU_PINMAP_NUM_0S][IFXDMU_PINMAP_FDEST_IN_NUM_ITEMS]
Initial value:
= {
{
{
&IfxDmu_FDEST_P21_0_IN
}
}
}
IfxDmu_FDEST_P21_0_IN
IfxDmu_Fdest_In IfxDmu_FDEST_P21_0_IN
Definition: IfxDmu_PinMap.c:45

Definition at line 48 of file IfxDmu_PinMap.c.

◆ IfxDmu_FDEST_P21_0_IN

IfxDmu_Fdest_In IfxDmu_FDEST_P21_0_IN = {&MODULE_DMU, {&MODULE_P21, 0}, Ifx_RxSel_a}

Definition at line 45 of file IfxDmu_PinMap.c.


iLLD_TC38A: IfxDmu_PinMap.h File Reference

  • _PinMap
Data Structures | Macros | Variables
IfxDmu_PinMap.h File Reference

DMU I/O map. More...

#include <IfxDmu_reg.h>
#include <Port/Std/IfxPort.h>
Include dependency graph for IfxDmu_PinMap.h:

Go to the source code of this file.

Data Structures

struct IfxDmu_Fdest_In
DMU FDEST pin mapping structure. More...

Macros

#define | IFXDMU_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXDMU_PINMAP_NUM_0S 1
#define | IFXDMU_PINMAP_FDEST_IN_NUM_ITEMS 1

Variables

IFX_EXTERN IfxDmu_Fdest_In IfxDmu_FDEST_P21_0_IN
Enter destructive debug mode. More...
IFX_EXTERN const IfxDmu_Fdest_In * IfxDmu_Fdest_In_pinTable [IFXDMU_PINMAP_NUM_MODULES][IFXDMU_PINMAP_NUM_0S][IFXDMU_PINMAP_FDEST_IN_NUM_ITEMS]
IfxDmu_Fdest_In table. More...

Detailed Description

DMU I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxDmu_PinMap.h.


iLLD_TC38A: IfxDts.c File Reference

  • Dts
  • Std
IfxDts.c File Reference

DTS basic functionality. More...

#include "IfxDts.h"
Include dependency graph for IfxDts.c:

Go to the source code of this file.

Detailed Description

DTS basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxDts.c.


iLLD_TC38A: IfxDts_Dts.c File Reference

  • Dts
  • Dts
Functions
IfxDts_Dts.c File Reference

DTS DTS details. More...

#include "IfxDts_Dts.h"
Include dependency graph for IfxDts_Dts.c:

Go to the source code of this file.

Functions

uint16 | IfxDts_Dts_convertFromCelsius (float32 temperatureValue)
Converts a temperature value in Celsius to DTS value. More...
float32 | IfxDts_Dts_convertToCelsius (uint16 dtsValue)
Converts the measurement value returned from DTS to Celsius. More...
void | IfxDts_Dts_initModule (const IfxDts_Dts_Config *config)
Initialise the DTS with supplied configuration. More...
void | IfxDts_Dts_initModuleConfig (IfxDts_Dts_Config *config)
Intialises the module configuration buffer with default configuration. More...

Detailed Description

DTS DTS details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxDts_Dts.c.


iLLD_TC38A: IfxEdsadc.c File Reference

  • Edsadc
  • Std
Functions
IfxEdsadc.c File Reference

EDSADC basic functionality. More...

#include "IfxEdsadc.h"
Include dependency graph for IfxEdsadc.c:

Go to the source code of this file.

Functions

void | IfxEdsadc_disableModule (Ifx_EDSADC *edsadc)
Disables the module. More...
void | IfxEdsadc_enableModule (Ifx_EDSADC *edsadc)
Enables the module. More...
volatile Ifx_SRC_SRCR * | IfxEdsadc_getAuxSrc (Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
Address/pointer to the interrupt source register. More...
float32 | IfxEdsadc_getIntegratorOutFreq (Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
Get the sample frequency of the integrator output in Hz. More...
float32 | IfxEdsadc_getMainCombOutFreq (Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
Get the sample frequency of the main COMB filter output in Hz. More...
float32 | IfxEdsadc_getMainGroupDelay (Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
Estimate the group delay of main-chain filters in seconds. More...
volatile Ifx_SRC_SRCR * | IfxEdsadc_getMainSrc (Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
Get the interrupt source register for a Main event. More...
float32 | IfxEdsadc_getModulatorClockFreq (Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
Get the modulator clock frequency in Hz. More...
float32 | IfxEdsadc_getModulatorInputClockFreq (Ifx_EDSADC *edsadc)
Get the input frequency of EDSADC in Hz. More...
void | IfxEdsadc_resetModule (Ifx_EDSADC *edsadc)
resets EDSADC kernel More...
void | IfxEdsadc_setCommonModeVoltage (Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, IfxEdsadc_FractionalRefVoltageSelection voltage, IfxEdsadc_FractionalRefVoltage refMode, IfxEdsadc_HalfSupplyVoltage hsvMode, IfxEdsadc_CommonModeHoldVoltage cmhvMode, uint8 positiveInput, uint8 negativeInput)
set common mode voltage Parameters More...
void | IfxEdsadc_setGainCorrectionFactor (Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, uint16 gainFactor, uint8 cicShift)
configure gain correction More...
void | IfxEdsadc_setTimeStampCounter (Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, IfxEdsadc_TimeStampCounterClockSelection timeStampCounterClock, IfxEdsadc_TimeStampCounterControl runControl, IfxEdsadc_AnalogMux analogMuxCopy)
void | IfxEdsadc_setGainControl (Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, uint16 gainFactor, uint8 cicShift, uint8 cicDecimationRate)
void | IfxEdsadc_setGainCalibration (Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, uint16 calFactor, uint16 calTarget)
void | IfxEdsadc_configureModulator (Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, IfxEdsadc_ModulatorConfig *config)
Set the Modulator configuration. More...

Detailed Description

EDSADC basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxEdsadc.c.

Function Documentation

◆ IfxEdsadc_configureModulator()

void IfxEdsadc_configureModulator | ( | Ifx_EDSADC * | edsadc,
 |  | IfxEdsadc_ChannelId | channel,
 |  | IfxEdsadc_ModulatorConfig * | config
 | ) |  |

Set the Modulator configuration.

Parameters
edsadc | Pointer to EDSADC module SFRs
channel | Channel Number to be configured
config | Modulator Configuration
Returns
None

Definition at line 270 of file IfxEdsadc.c.

◆ IfxEdsadc_setCommonModeVoltage()

void IfxEdsadc_setCommonModeVoltage | ( | Ifx_EDSADC * | edsadc,
 |  | IfxEdsadc_ChannelId | channel,
 |  | IfxEdsadc_FractionalRefVoltageSelection | voltage,
 |  | IfxEdsadc_FractionalRefVoltage | refMode,
 |  | IfxEdsadc_HalfSupplyVoltage | hsvMode,
 |  | IfxEdsadc_CommonModeHoldVoltage | cmhvMode,
 |  | uint8 | positiveInput,
 |  | uint8 | negativeInput
 | ) |  |

set common mode voltage Parameters

Parameters
edsadc | Pointer to Module space
channel | specifies channel Id
voltage | select Fractional reference Voltage
refMode | Fractional Reference Voltage Enable/ Disable
hsvMode | Enable / Disable Half Supply Voltage
cmhvMode | Enable / Disable Common Mode Hold Voltage
positiveInput | Defines the connection of the respective positive input y to the common mode hold voltage
negativeInput | Defines the connection of the respective negative input y to the common mode hold voltage.
Returns
None

Definition at line 211 of file IfxEdsadc.c.

Referenced by IfxEdsadc_Edsadc_initCommonModeVoltage().

◆ IfxEdsadc_setGainCalibration()

void IfxEdsadc_setGainCalibration | ( | Ifx_EDSADC * | edsadc,
 |  | IfxEdsadc_ChannelId | channel,
 |  | uint16 | calFactor,
 |  | uint16 | calTarget
 | ) |  |
Parameters
edsadc | Pointer to EDSADC module SFRs
channel | Channel Number to be configured
calFactor | Multiplication Factor for Gain Calibration
calTarget | Target Value for Calibrated Fullscale
Returns
None

Definition at line 260 of file IfxEdsadc.c.

Referenced by IfxEdsadc_Edsadc_initChannel().

◆ IfxEdsadc_setGainControl()

void IfxEdsadc_setGainControl | ( | Ifx_EDSADC * | edsadc,
 |  | IfxEdsadc_ChannelId | channel,
 |  | uint16 | gainFactor,
 |  | uint8 | cicShift,
 |  | uint8 | cicDecimationRate
 | ) |  |
Parameters
edsadc | Pointer to EDSADC SFRs
channel | chanel no
gainFactor | Multiplication Factor for Gain Correction During Calibration
cicShift | Position of the CIC Filter Output Shifter During Calibration
cicDecimationRate | Decimation Rate of the CIC Filter During Calibration
Returns
None

Definition at line 248 of file IfxEdsadc.c.

Referenced by IfxEdsadc_Edsadc_initChannel().

◆ IfxEdsadc_setGainCorrectionFactor()

void IfxEdsadc_setGainCorrectionFactor | ( | Ifx_EDSADC * | edsadc,
 |  | IfxEdsadc_ChannelId | channel,
 |  | uint16 | gainFactor,
 |  | uint8 | cicShift
 | ) |  |

configure gain correction

Parameters
edsadc | Pointer to the EDSADC register space
channel | Specifies channel ID
gainFactor | Multiplication Factor for gain correction
cicShift | Position of CIC filter output shifter
Returns
None

Definition at line 226 of file IfxEdsadc.c.

Referenced by IfxEdsadc_Edsadc_setGainCorrectionFactor().

◆ IfxEdsadc_setTimeStampCounter()

void IfxEdsadc_setTimeStampCounter | ( | Ifx_EDSADC * | edsadc,
 |  | IfxEdsadc_ChannelId | channel,
 |  | IfxEdsadc_TimeStampCounterClockSelection | timeStampCounterClock,
 |  | IfxEdsadc_TimeStampCounterControl | runControl,
 |  | IfxEdsadc_AnalogMux | analogMuxCopy
 | ) |  |
Parameters
edsadc | Pointer to module space
channel | specifies channel ID
timeStampCounterClock | Time Stamp Counter Clock selection
runControl | TimeStamp Counter Run Control
analogMuxCopy | Analog MUX Setting Copy Enable
Returns
None

Definition at line 237 of file IfxEdsadc.c.

Referenced by IfxEdsadc_Edsadc_initTimeStampCounter().


iLLD_TC38A: IfxEdsadc_Edsadc.c File Reference

  • Edsadc
  • Edsadc
Functions
IfxEdsadc_Edsadc.c File Reference

EDSADC EDSADC details. More...

#include "IfxEdsadc_Edsadc.h"
Include dependency graph for IfxEdsadc_Edsadc.c:

Go to the source code of this file.

Functions

IFX_STATIC sint32 | IfxEdsadc_Edsadc_calcDIVM (float32 sourceFreq, float32 *targetFreq)
calculate division factor for modulator clock period More...
IFX_STATIC sint32 | IfxEdsadc_Edsadc_calcDIVCG (float32 sourceFreq, float32 *targetFreq)
calculate division factor for pwm patteren mode More...
void | IfxEdsadc_Edsadc_initCarrierGen (IfxEdsadc_Edsadc *edsadc, IfxEdsadc_Edsadc_CarrierGenConfig *config)
Initialise the EDSADC carrier generator. More...
void | IfxEdsadc_Edsadc_initChannel (IfxEdsadc_Edsadc_Channel *channel, const IfxEdsadc_Edsadc_ChannelConfig *config)
Initialise a EDSADC channel with the supplied configuration. More...
void | IfxEdsadc_Edsadc_initChannelConfig (IfxEdsadc_Edsadc_ChannelConfig *config, IfxEdsadc_Edsadc *edsadc)
Initialise the config struct with default EDSADC channel configuration. More...
void | IfxEdsadc_Edsadc_initCombFilter (IfxEdsadc_Edsadc_Channel *channel, const IfxEdsadc_Edsadc_CombFilterConfig *config)
Initialises the comb filter. More...
void | IfxEdsadc_Edsadc_initDemodulator (IfxEdsadc_Edsadc_Channel *channel, const IfxEdsadc_Edsadc_DemodulatorConfig *config)
Initialises the demodulator. More...
void | IfxEdsadc_Edsadc_initFirFilter (IfxEdsadc_Edsadc_Channel *channel, const IfxEdsadc_Edsadc_FirFilterConfig *config)
Initialises the fir filter. More...
void | IfxEdsadc_Edsadc_initIntegrator (IfxEdsadc_Edsadc_Channel *channel, const IfxEdsadc_Edsadc_IntegratorConfig *config)
Initialises the integrator. More...
void | IfxEdsadc_Edsadc_initModulator (IfxEdsadc_Edsadc_Channel *channel, const IfxEdsadc_Edsadc_ModulatorConfig *config)
Initialises the modulator. More...
void | IfxEdsadc_Edsadc_initModule (IfxEdsadc_Edsadc *edsadc, IfxEdsadc_Edsadc_Config *config)
Initialise the EDSADC with the supplied configuration. More...
void | IfxEdsadc_Edsadc_initModuleConfig (IfxEdsadc_Edsadc_Config *config, Ifx_EDSADC *edsadc)
Initialise the config struct with default EDSADC configuration. More...
void | IfxEdsadc_Edsadc_initRectifier (IfxEdsadc_Edsadc_Channel *channel, const IfxEdsadc_Edsadc_RectifierConfig *config)
Initialises the rectifier. More...
void | IfxEdsadc_Edsadc_initCarrierGenConfig (IfxEdsadc_Edsadc_CarrierGenConfig *config)

Detailed Description

EDSADC EDSADC details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxEdsadc_Edsadc.c.

Function Documentation

◆ IfxEdsadc_Edsadc_calcDIVCG()

IFX_STATIC sint32 IfxEdsadc_Edsadc_calcDIVCG | ( | float32 | sourceFreq,
 |  | float32 * | targetFreq
 | ) |  |

calculate division factor for pwm patteren mode

Parameters
sourceFreq | Source Frequency
targetFreq | Target Frequency
Returns
Division Factor

Definition at line 468 of file IfxEdsadc_Edsadc.c.

Referenced by IfxEdsadc_Edsadc_initCarrierGen().

◆ IfxEdsadc_Edsadc_initCarrierGenConfig()

void IfxEdsadc_Edsadc_initCarrierGenConfig ( IfxEdsadc_Edsadc_CarrierGenConfig * config )
Parameters
config Pointer to DSADC Carrier Configuration
Returns
None

Definition at line 496 of file IfxEdsadc_Edsadc.c.


iLLD_TC38A: IfxEray.c File Reference

  • Eray
  • Std
Functions
IfxEray.c File Reference

ERAY basic functionality. More...

#include "IfxEray.h"
Include dependency graph for IfxEray.c:

Go to the source code of this file.

Functions

uint16 | IfxEray_calcHeaderCrc (uint8 payloadLength, uint16 frameId, boolean startupFrameIndicator, boolean syncFrameIndicator)
Calculate and returns the CRC for frame. More...
boolean | IfxEray_changePocState (Ifx_ERAY *eray, IfxEray_PocCommand pocCommand)
Changes the Commmunication Controller state. More...
void | IfxEray_clearAllFlags (Ifx_ERAY *eray)
Clears all the error flags. More...
void | IfxEray_enableInterruptLines (Ifx_ERAY *eray)
Enables all the Interrupt lines. More...
Ifx_ERAY * | IfxEray_getAddress (IfxEray_Index eray)
IfxEray_Index | IfxEray_getIndex (Ifx_ERAY *eray)
API to get the resource index of the ERAY specified. More...
void | IfxEray_readData (Ifx_ERAY *eray, uint32 *data, uint8 payloadLength)
Reads the received data from output registers. More...
void | IfxEray_readFrame (Ifx_ERAY *eray, IfxEray_ReceivedHeader *header, uint32 *data, Ifx_SizeT maxPayloadLength)
Reads header and data from output buffers. More...
void | IfxEray_resetModule (Ifx_ERAY *eray)
Resets the ERAY kernel. More...
void | IfxEray_setMessageBufferInterruptDestination (Ifx_ERAY *eray, uint8 messageBuffer, uint8 messageBufferDestination)
Selects between MBSC0 and MBSC1 interrupt destination. More...
void | IfxEray_setNewDataInterruptDestination (Ifx_ERAY *eray, uint8 ndat, uint8 ndatDestination)
Selects between NDAT0 and NDAT1 interrupt destination. More...
void | IfxEray_setPocReady (Ifx_ERAY *eray)
Sets the POC state to Ready state. More...
void | IfxEray_setSlot (Ifx_ERAY *eray, const IfxEray_Header *header, const uint32 *data, const IfxEray_SlotConfig *slotConfig)
Writes header and data to Input buffers and set the slots. More...
void | IfxEray_writeData (Ifx_ERAY *eray, const uint32 *data, uint8 payloadLength)
Writes data section of a frame to input data registers. More...

Detailed Description

ERAY basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxEray.c.


iLLD_TC38A: IfxEray_cfg.c File Reference

  • _Impl
Variables
IfxEray_cfg.c File Reference

ERAY on-chip implementation data. More...

#include "IfxEray_cfg.h"
Include dependency graph for IfxEray_cfg.c:

Go to the source code of this file.

Variables

IFX_CONST IfxModule_IndexMap IfxEray_cfg_indexMap [IFXERAY_NUM_MODULES]

Detailed Description

ERAY on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxEray_cfg.c.

Variable Documentation

◆ IfxEray_cfg_indexMap

IFX_CONST IfxModule_IndexMap IfxEray_cfg_indexMap[IFXERAY_NUM_MODULES]
Initial value:
= {
{&MODULE_ERAY0, (uint32)IfxEray_Index_0},
{&MODULE_ERAY1, (uint32)IfxEray_Index_1}
}
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxEray_Index_1
ERAY index 1.
Definition: IfxEray_cfg.h:83
IfxEray_Index_0
ERAY index 0.
Definition: IfxEray_cfg.h:82

Definition at line 52 of file IfxEray_cfg.c.

Referenced by IfxEray_getAddress(), and IfxEray_getIndex().


iLLD_TC38A: IfxEray_Eray.c File Reference

  • Eray
  • Eray
Functions
IfxEray_Eray.c File Reference

ERAY ERAY details. More...

#include "IfxEray_Eray.h"
#include "Mtu/Std/IfxMtu.h"
Include dependency graph for IfxEray_Eray.c:

Go to the source code of this file.

Functions

IFX_STATIC void | IfxEray_Eray_Node_initCommunicationController (IfxEray_Eray *eray, const IfxEray_Eray_ControllerConfig *config)
Inialises the communication controller. More...
IFX_STATIC void | IfxEray_Eray_Node_initGTU (IfxEray_Eray *eray, const IfxEray_Eray_GTUConfig *config)
Initialises the Global Timing Unit. More...
IFX_STATIC void | IfxEray_Eray_Node_initMessageRAM (IfxEray_Eray *eray, const IfxEray_Eray_MessageRAMConfig *config)
Inialises the message RAM. More...
void | IfxEray_Eray_Node_init (IfxEray_Eray *eray, const IfxEray_Eray_NodeConfig *config)
Initialises the Node with supplied configuration. More...
void | IfxEray_Eray_Node_initConfig (IfxEray_Eray_NodeConfig *config)
Initialises the default node configuration buffer. More...
void | IfxEray_Eray_initModule (IfxEray_Eray *eray, const IfxEray_Eray_Config *config)
Initialises the ERAY module with supplied configuration. More...
void | IfxEray_Eray_initModuleConfig (IfxEray_Eray_Config *config, Ifx_ERAY *eray)
Inialises the default module configuration buffer. More...
void | IfxEray_Eray_receiveFifoFrame (IfxEray_Eray *eray, IfxEray_Eray_ReceiveControl *config)
Transfers frame from fifo in message RAM to Output buffer. More...
void | IfxEray_Eray_receiveFrame (IfxEray_Eray *eray, IfxEray_Eray_ReceiveControl *config)
Transfers header and data from message buffer to output buffer. More...
void | IfxEray_Eray_transmitFrame (IfxEray_Eray *eray, IfxEray_Eray_TransmitControl *transmitControl)
Transfers the frame in given slot. More...

Detailed Description

ERAY ERAY details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxEray_Eray.c.


iLLD_TC38A: IfxEvadc.c File Reference

  • Evadc
  • Std
Functions
IfxEvadc.c File Reference

EVADC basic functionality. More...

#include "IfxEvadc.h"
Include dependency graph for IfxEvadc.c:

Go to the source code of this file.

Functions

void | IfxEvadc_addToQueue (Ifx_EVADC_G *group, IfxEvadc_ChannelId channel, IfxEvadc_RequestSource sourceType, uint32 options)
Add an entry to the queue of a group for the specified channel with the following options set: refill incase of aborted conversion source interrupt enable/disable external trigger control of the aborted conversion. More...
void | IfxEvadc_configExternalMultiplexerMode (Ifx_EVADC *evadc, Ifx_EVADC_G *evadcG, IfxEvadc_ExternalMultiplexerMode mode, uint8 channels, IfxEvadc_EmuxSelectValue startChannel, IfxEvadc_EmuxCodingScheme code, IfxEvadc_EmuxSampleTimeControl sampleTimeControl, IfxEvadc_ChannelSelectionStyle channelSelectionStyle)
Configure external multiplexer mode. More...
void | IfxEvadc_disableAccess (Ifx_EVADC *evadc, IfxEvadc_Protection protectionSet)
Disable write access to the EVADC config/control registers. More...
void | IfxEvadc_disableQueueSlotExternalTrigger (Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Disables the external trigger. More...
void | IfxEvadc_enableAccess (Ifx_EVADC *evadc, IfxEvadc_Protection protectionSet)
Enable write access to the EVADC config/control registers. More...
void | IfxEvadc_enableQueueSlotExternalTrigger (Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Enables the external trigger. More...
float32 | IfxEvadc_getAdcDigitalFrequency (Ifx_EVADC *evadc)
configured Fadcd EVADC digital clock frequency in Hz. More...
float32 | IfxEvadc_getAdcModuleFrequency (Ifx_EVADC *evadc)
ADC Module Frequency in Hz. More...
IfxEvadc_GatingMode | IfxEvadc_getQueueSlotGatingMode (Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Gets the requested queue slot gating mode. More...
IfxEvadc_GatingSource | IfxEvadc_getQueueSlotGatingSource (Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Gets the requested queue slot gating input. More...
IfxEvadc_RequestSlotPriority | IfxEvadc_getQueueSlotPriority (Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Gets the request queue slot priority. More...
IfxEvadc_RequestSlotStartMode | IfxEvadc_getQueueSlotStartMode (Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Gets the requested queue slot start mode. More...
IfxEvadc_TriggerSource | IfxEvadc_getQueueSlotTriggerInput (Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Gets the requested queue slot trigger input. More...
IfxEvadc_TriggerMode | IfxEvadc_getQueueSlotTriggerMode (Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Gets the requested queue slot trigger mode. More...
IfxEvadc_Status | IfxEvadc_getQueueStatus (Ifx_EVADC_G *group, IfxEvadc_RequestSource sourceType)
Gives the status of the Queue of a group by returning non zero value if the Queue is full. More...
Ifx_EVADC_G_RES | IfxEvadc_getResultBasedOnRequestSource (Ifx_EVADC *evadc, Ifx_EVADC_G *group, IfxEvadc_ChannelId channel, IfxEvadc_RequestSource sourceType)
Get conversion result (Function does not care about the alignment) value = raw * gain + offset. More...
uint32 | IfxEvadc_initializeFAdcI (Ifx_EVADC *evadc, uint32 fAdcI, Ifx_EVADC_G *group)
Configure the ADC analog clock. More...
boolean | IfxEvadc_isRequestQueueSlotEnabled (Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Returns the queue slot requested status. More...
void | IfxEvadc_resetModule (Ifx_EVADC *evadc)
Resets the kernel. More...
void | IfxEvadc_setArbiterPriority (Ifx_EVADC_G *evadcG, boolean slotEnable, IfxEvadc_RequestSlotPriority prio, IfxEvadc_RequestSlotStartMode mode, IfxEvadc_RequestSource slot)
Sets the Arbiter slot configurations. More...
void | IfxEvadc_setQueueSlotGatingConfig (Ifx_EVADC_G *evadcG, IfxEvadc_GatingSource gatingSource, IfxEvadc_GatingMode gatingMode, IfxEvadc_RequestSource sourceType)
Sets the gating configurations. More...
void | IfxEvadc_setQueueSlotTriggerOperatingConfig (Ifx_EVADC_G *evadcG, IfxEvadc_TriggerMode triggerMode, IfxEvadc_TriggerSource triggerSource, IfxEvadc_RequestSource sourceType)
Sets the trigger operating configurations. More...
void | IfxEvadc_startupCalibration (Ifx_EVADC *evadc)
Starts ADC calibration and wait for the end of the calibration process. More...
boolean | IfxEvadc_syncConvWorkAround (Ifx_EVADC *evadc)
SW workaround of EVADC Master/Slave conversion jitter issue(MCMETILLD-910) More...

Detailed Description

EVADC basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxEvadc.c.


iLLD_TC38A: IfxEvadc_Adc.c File Reference

  • Evadc
  • Adc
Functions | Variables
IfxEvadc_Adc.c File Reference

EVADC ADC details. More...

#include "IfxEvadc_Adc.h"
Include dependency graph for IfxEvadc_Adc.c:

Go to the source code of this file.

Functions

IFX_INLINE IfxEvadc_GroupId | IfxEvadc_Adc_getMasterId (IfxEvadc_GroupId slave, IfxEvadc_Adc_SYNCTR_STSEL masterIndex)
Gets the master id. More...
IFX_INLINE IfxEvadc_Adc_SYNCTR_STSEL | IfxEvadc_Adc_getMasterKernelIndex (IfxEvadc_GroupId slave, IfxEvadc_GroupId master)
Gets the current master kernel index. More...
void | IfxEvadc_Adc_deInitGroup (IfxEvadc_Adc_Group *group)
Reset the EVADC group. More...
void | IfxEvadc_Adc_getChannelConfig (IfxEvadc_Adc_Channel *channel, IfxEvadc_Adc_ChannelConfig *config)
Get the current channel configuration (e.g. sample settings) More...
void | IfxEvadc_Adc_getGroupConfig (IfxEvadc_Adc_Group *group, IfxEvadc_Adc_GroupConfig *config)
Get the current group configuration (e.g. evadc frequency) More...
IfxEvadc_Status | IfxEvadc_Adc_initChannel (IfxEvadc_Adc_Channel *channel, const IfxEvadc_Adc_ChannelConfig *config)
Initialise one channel with given configuration. More...
void | IfxEvadc_Adc_initChannelConfig (IfxEvadc_Adc_ChannelConfig *config, const IfxEvadc_Adc_Group *group)
Initialise buffer with default channel configuration. More...
void | IfxEvadc_Adc_initExternalMultiplexerMode (Ifx_EVADC *evadc, const IfxEvadc_Adc_EmuxControl *emuxControl)
initalise external multiplexer. More...
void | IfxEvadc_Adc_initExternalMultiplexerModeConfig (IfxEvadc_Adc_EmuxControl *emuxConfig, Ifx_EVADC *evadc)
initialise default configuration for external multiplexer More...
void | IfxEvadc_Adc_initFastCompareChannel (IfxEvadc_Adc_FastCompareChannel *fastCompareChannel, IfxEvadc_Adc_FastCompareChannelConfig *config)
Initializing the Fast Compare channel. More...
void | IfxEvadc_Adc_initFastCompareChannelConfig (IfxEvadc_Adc_FastCompareChannelConfig *config, IfxEvadc_Adc *evadc)
Initializing Fast Compare Channel config structure with default configurations. More...
IfxEvadc_Status | IfxEvadc_Adc_initGroup (IfxEvadc_Adc_Group *group, const IfxEvadc_Adc_GroupConfig *config)
Initialise the EVADC group (also queue modes) Slave Groups must initialize first. More...
void | IfxEvadc_Adc_initGroupConfig (IfxEvadc_Adc_GroupConfig *config, IfxEvadc_Adc *evadc)
Initialise buffer with default EVADC configuration. More...
IfxEvadc_Status | IfxEvadc_Adc_initModule (IfxEvadc_Adc *evadc, const IfxEvadc_Adc_Config *config)
Initialise the EVADC to run with the expected frequency and calibration. More...
void | IfxEvadc_Adc_initModuleConfig (IfxEvadc_Adc_Config *config, Ifx_EVADC *evadc)
Initialise buffer with default EVADC configuration. More...
void | IfxEvadc_Adc_setAnalogConvertControl (Ifx_EVADC *evadc, IfxEvadc_Adc_Group *group, IfxEvadc_AnalogConverterMode analogConverterMode)
set analog converter mode More...
void | IfxEvadc_Adc_setGlobalConfigurations (Ifx_EVADC *evadc, const IfxEvadc_Adc_Config *config)
Configure global settings in the GLOBCFG register. More...

Variables

IFX_STATIC IFX_CONST IfxEvadc_Adc_SYNCTR_STSEL IfxEvadc_Adc_masterIndex [IFXEVADC_NUM_ADC_CAL_GROUPS][IFXEVADC_NUM_ADC_CAL_GROUPS]

Detailed Description

EVADC ADC details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxEvadc_Adc.c.

Function Documentation

◆ IfxEvadc_Adc_setAnalogConvertControl()

void IfxEvadc_Adc_setAnalogConvertControl | ( | Ifx_EVADC * | evadc,
 |  | IfxEvadc_Adc_Group * | group,
 |  | IfxEvadc_AnalogConverterMode | analogConverterMode
 | ) |  |

set analog converter mode

Parameters
evadc | Pointer to module space
group | Pointer to evadc group
analogConverterMode | specifies analog convert mode
Returns
None

Definition at line 974 of file IfxEvadc_Adc.c.


iLLD_TC38A: IfxEvadc_cfg.c File Reference

  • _Impl
Variables
IfxEvadc_cfg.c File Reference

EVADC on-chip implementation data. More...

#include "IfxEvadc_cfg.h"
Include dependency graph for IfxEvadc_cfg.c:

Go to the source code of this file.

Variables

volatile Ifx_SRC_SRCR * IfxEvadc_cfg_srcAddresses [(IFXEVADC_NUM_ADC_PRIMARY_GROUPS *4)+(IFXEVADC_NUM_ADC_SECONDARY_GROUPS *4)+(IFXEVADC_NUM_FAST_COMPARE_CHANNELS *4)+(IFXEVADC_NUM_ADC_COMMON_GROUPS *4)]

Detailed Description

EVADC on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxEvadc_cfg.c.

Variable Documentation

◆ IfxEvadc_cfg_srcAddresses

volatile Ifx_SRC_SRCR* IfxEvadc_cfg_srcAddresses[(IFXEVADC_NUM_ADC_PRIMARY_GROUPS *4)+(IFXEVADC_NUM_ADC_SECONDARY_GROUPS *4)+(IFXEVADC_NUM_FAST_COMPARE_CHANNELS *4)+(IFXEVADC_NUM_ADC_COMMON_GROUPS *4)]

Definition at line 52 of file IfxEvadc_cfg.c.

Referenced by IfxEvadc_getSrcAddress().


iLLD_TC38A: IfxFce.c File Reference

  • Fce
  • Std
Functions
IfxFce.c File Reference

FCE basic functionality. More...

#include "IfxFce.h"
Include dependency graph for IfxFce.c:

Go to the source code of this file.

Functions

uint32 | IfxFce_reflectCrc32 (uint32 crcStartValue, uint8 crcLength)
Reflects the CRC data and returns it. More...
void | IfxFce_resetModule (Ifx_FCE *fce)
Reset the module by clearing the kernel. More...

Detailed Description

FCE basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxFce.c.


iLLD_TC38A: IfxFce_Crc.c File Reference

  • Fce
  • Crc
Functions
IfxFce_Crc.c File Reference

FCE CRC details. More...

#include "IfxFce_Crc.h"
Include dependency graph for IfxFce_Crc.c:

Go to the source code of this file.

Functions

uint32 | IfxFce_Crc_calculateCrc (IfxFce_Crc_Crc *fce, const uint32 *crcData, uint16 crcDataLength, uint32 crcStartValue)
Calculate the XORed CRC value and returns it. It takes the precomputed XORed and reversed. More...
void | IfxFce_Crc_clearErrorFlags (IfxFce_Crc_Crc *fce)
Clears the error flags. More...
void | IfxFce_Crc_deInitModule (IfxFce_Crc_Crc *fce)
Deinitialises the FCE module. More...
Ifx_FCE_IN_STS | IfxFce_Crc_getInterruptStatus (IfxFce_Crc_Crc *fce)
Gets the current CRC interrupt status. More...
void | IfxFce_Crc_initCrc (IfxFce_Crc_Crc *fceCrc, const IfxFce_Crc_CrcConfig *crcConfig)
Initialise the FCE module for CRC computation according to CRC mode. More...
void | IfxFce_Crc_initCrcConfig (IfxFce_Crc_CrcConfig *crcConfig, IfxFce_Crc *fce)
Initialises the default CRC configuration buffer. More...
void | IfxFce_Crc_initModule (IfxFce_Crc *fce, const IfxFce_Crc_Config *config)
Usage Example: see How to use the FCE CRC Interface driver?. More...
void | IfxFce_Crc_initModuleConfig (IfxFce_Crc_Config *config, Ifx_FCE *fce)
Fills the config structure with default values. More...

Detailed Description

FCE CRC details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxFce_Crc.c.

Function Documentation

◆ IfxFce_Crc_getInterruptStatus()

Ifx_FCE_IN_STS IfxFce_Crc_getInterruptStatus ( IfxFce_Crc_Crc * fce )

Gets the current CRC interrupt status.

Parameters
fce Specifies the pointer to FCE module handler
Returns
Current interrupt status

Definition at line 132 of file IfxFce_Crc.c.


iLLD_TC38A: IfxFlash.c File Reference

  • Flash
  • Std
Functions
IfxFlash.c File Reference

FLASH basic functionality. More...

#include "IfxFlash.h"
Include dependency graph for IfxFlash.c:

Go to the source code of this file.

Functions

void IfxFlash_disableWriteProtection (uint32 flash, IfxFlash_UcbType ucb, uint32 *password)
The password protection of the selected UCB (if this UCB offers this feature) is temporarily disabled. The command fails by setting PROER when any of the supplied PWs does not match. In this case until the next application reset all further calls of "Disable Protection" fail with PROER independent of the supplied password. More...

Detailed Description

FLASH basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxFlash.c.


iLLD_TC38A: IfxFlash_cfg.c File Reference

  • _Impl
Variables
IfxFlash_cfg.c File Reference

FLASH on-chip implementation data. More...

#include "IfxFlash_cfg.h"
Include dependency graph for IfxFlash_cfg.c:

Go to the source code of this file.

Variables

IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableCfsLog [IFXFLASH_DFLASH_NUM_CFS_LOG_SECTORS]
IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableEepLog [IFXFLASH_DFLASH_NUM_LOG_SECTORS]
IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableHsmLog [IFXFLASH_DFLASH_NUM_HSM_LOG_SECTORS]
IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTablePhys [IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS]
IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableUcbLog [IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS]
IFX_CONST IfxFlash_flashSector IfxFlash_pFlashTableLog [IFXFLASH_PFLASH_NUM_LOG_SECTORS]
IFX_CONST IfxFlash_flashSector IfxFlash_pFlashTablePhys [IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS]

Detailed Description

FLASH on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxFlash_cfg.c.

Variable Documentation

◆ IfxFlash_dFlashTableCfsLog

IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableCfsLog[IFXFLASH_DFLASH_NUM_CFS_LOG_SECTORS]
Initial value:
= {
{0xaf800000, 0xaf800fff},
{0xaf801000, 0xaf801fff},
{0xaf802000, 0xaf802fff},
{0xaf803000, 0xaf803fff},
{0xaf804000, 0xaf804fff},
{0xaf805000, 0xaf805fff},
{0xaf806000, 0xaf806fff},
{0xaf807000, 0xaf807fff},
{0xaf808000, 0xaf808fff},
{0xaf809000, 0xaf809fff},
{0xaf80a000, 0xaf80afff},
{0xaf80b000, 0xaf80bfff},
{0xaf80c000, 0xaf80cfff},
{0xaf80d000, 0xaf80dfff},
{0xaf80e000, 0xaf80efff},
{0xaf80f000, 0xaf80ffff},
}

Definition at line 52 of file IfxFlash_cfg.c.

◆ IfxFlash_dFlashTableEepLog

IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableEepLog[IFXFLASH_DFLASH_NUM_LOG_SECTORS]

Definition at line 74 of file IfxFlash_cfg.c.

◆ IfxFlash_dFlashTableHsmLog

IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableHsmLog[IFXFLASH_DFLASH_NUM_HSM_LOG_SECTORS]

Definition at line 205 of file IfxFlash_cfg.c.

◆ IfxFlash_dFlashTablePhys

IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTablePhys[IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS]
Initial value:
= {
{IFXFLASH_DFLASH_START, IFXFLASH_DFLASH_END},
}
IFXFLASH_DFLASH_START
#define IFXFLASH_DFLASH_START
Definition: IfxFlash_cfg.h:105
IFXFLASH_DFLASH_END
#define IFXFLASH_DFLASH_END
Definition: IfxFlash_cfg.h:81

Definition at line 240 of file IfxFlash_cfg.c.

◆ IfxFlash_dFlashTableUcbLog

IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableUcbLog[IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS]

Definition at line 244 of file IfxFlash_cfg.c.

◆ IfxFlash_pFlashTableLog

IFX_CONST IfxFlash_flashSector IfxFlash_pFlashTableLog[IFXFLASH_PFLASH_NUM_LOG_SECTORS]

Definition at line 295 of file IfxFlash_cfg.c.

◆ IfxFlash_pFlashTablePhys

IFX_CONST IfxFlash_flashSector IfxFlash_pFlashTablePhys[IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS]
Initial value:
= {
{0xA0000000, 0xA00FFFFF},
{0xA0100000, 0xA01FFFFF},
{0xA0200000, 0xA02FFFFF},
{0xA0300000, 0xA03FFFFF},
{0xA0400000, 0xA04FFFFF},
{0xA0500000, 0xA05FFFFF},
{0xA0600000, 0xA06FFFFF},
{0xA0700000, 0xA07FFFFF},
{0xA0800000, 0xA08FFFFF},
{0xA0900000, 0xA09FFFFF},
}

Definition at line 938 of file IfxFlash_cfg.c.


iLLD_TC38A: IfxGeth.c File Reference

  • Geth
  • Std
Functions
IfxGeth.c File Reference

GETH basic functionality. More...

#include "IfxGeth.h"
Include dependency graph for IfxGeth.c:

Go to the source code of this file.

Functions

void | IfxGeth_disableModule (Ifx_GETH *gethSFR)
Disables the clock for GETH module. More...
void | IfxGeth_enableModule (Ifx_GETH *gethSFR)
Enables the clock for GETH module. More...
volatile Ifx_SRC_SRCR * | IfxGeth_getSrcPointer (Ifx_GETH *gethSFR, IfxGeth_ServiceRequest serviceRequest)
Returns the Src Pointer of the selected GETH service request node. More...
void | IfxGeth_mac_setLineSpeed (Ifx_GETH *gethSFR, IfxGeth_LineSpeed speed)
Sets the Ethernet Line Speed. More...
void | IfxGeth_mac_setMacAddress (Ifx_GETH *gethSFR, uint8 *macAddress)
Sets the MAC Address. More...
void | IfxGeth_mtl_clearAllInterruptFlags (Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId)
Clears all the Mtl interrupt flags. More...
void | IfxGeth_mtl_clearInterruptFlag (Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId, IfxGeth_MtlInterruptFlag flag)
Clears the selected Mtl interrupt flag. More...
void | IfxGeth_mtl_disableInterrupt (Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId, IfxGeth_MtlInterruptFlag flag)
Disables the selected Mtl interrupt flag. More...
void | IfxGeth_mtl_enableInterrupt (Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId, IfxGeth_MtlInterruptFlag flag)
Enables the selected Mtl interrupt flag. More...
void | IfxGeth_mtl_enableTxQueue (Ifx_GETH *gethSFR, IfxGeth_TxMtlQueue queueId)
Enables the selected TX Queue. More...
boolean | IfxGeth_mtl_isInterruptFlagSet (Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId, IfxGeth_MtlInterruptFlag flag)
Returns the status of selected Mtl interrupt flag. More...
void | IfxGeth_mtl_setRxForwardErrorPacket (Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId, boolean enabled)
Sets the Receive Forward Error Packets for the selected RX Queue. More...
void | IfxGeth_mtl_setRxForwardUndersizedGoodPacket (Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId, boolean enabled)
Sets the Receive Forward Undersized Good Packets for the selected RX Queue. More...
void | IfxGeth_mtl_setRxQueueSize (Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId, IfxGeth_QueueSize queueSize)
Sets the size of the selected RX Queue. More...
void | IfxGeth_mtl_setRxStoreAndForward (Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId, boolean enabled)
Sets the Receive Store And Forward for the selected RX Queue. More...
void | IfxGeth_mtl_setTxQueueSize (Ifx_GETH *gethSFR, IfxGeth_TxMtlQueue queueId, IfxGeth_QueueSize queueSize)
Sets the size of the selected TX Queue. More...
void | IfxGeth_mtl_setTxStoreAndForward (Ifx_GETH *gethSFR, IfxGeth_TxMtlQueue queueId, boolean enabled)
Sets the Transmit Store And Forward for teh selected TX Queue. More...
void | IfxGeth_resetModule (Ifx_GETH *gethSFR)
resets Ethernet kernel More...
void | IfxGeth_phy_Clause22_readMDIORegister (uint32 layerAddr, uint32 regAddr, uint32 *pData)
Reads a MDIO register of Clause 22 PHY. More...
void | IfxGeth_Phy_Clause22_writeMDIORegister (uint32 layerAddr, uint32 regAddr, uint32 data)
Writes to a MDIO register of Clause 22 PHY. More...
void | IfxGeth_phy_Clause45_readMDIORegister (uint32 layerAddr, uint32 deviceAddr, uint32 regAddr, uint32 *pData)
Reads a MDIO register of Clause 45 PHY. More...
void | IfxGeth_Phy_Clause45_writeMDIORegister (uint32 layerAddr, uint32 deviceAddr, uint32 regAddr, uint32 data)
Writes to a MDIO register for Clause 45 PHY. More...
void | IfxGeth_mac_setMaxPacketSize (Ifx_GETH *gethSFR, uint16 maxPacketSize)
Sets the maximum size of the packet. More...
IfxGeth_Index | IfxGeth_getIndex (Ifx_GETH *geth)
API to get the resource index of the GETH specified. More...
Ifx_GETH * | IfxGeth_getAddress (IfxGeth_Index geth)
Get the address of the specified GETH resource index. More...
boolean | IfxGeth_mac_writeQueueVlanTag (Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId, uint16 vLanTag)
Writes to Queue Vlan tag. More...
boolean | IfxGeth_mac_readQueueVlanTag (Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId, uint16 *const vLanTag)
Reads from Queue Vlan tag. More...

Detailed Description

GETH basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxGeth.c.

Function Documentation

◆ IfxGeth_mac_setMaxPacketSize()

void IfxGeth_mac_setMaxPacketSize | ( | Ifx_GETH * | gethSFR,
 |  | uint16 | maxPacketSize
 | ) |  |

Sets the maximum size of the packet.

Parameters
gethSFR | Pointer to GETH register base address
maxPacketSize | Minimum size of the frame beyond which giant packet status is set.
Returns
None

Definition at line 435 of file IfxGeth.c.

Referenced by IfxGeth_Eth_configureMacCore().

◆ IfxGeth_phy_Clause22_readMDIORegister()

void IfxGeth_phy_Clause22_readMDIORegister | ( | uint32 | layerAddr,
 |  | uint32 | regAddr,
 |  | uint32 * | pData
 | ) |  |

Reads a MDIO register of Clause 22 PHY.

Parameters
layerAddr | Layer Address
regAddr | Register Address
pData | Pointer to Data
Returns
None

Definition at line 384 of file IfxGeth.c.

◆ IfxGeth_Phy_Clause22_writeMDIORegister()

void IfxGeth_Phy_Clause22_writeMDIORegister | ( | uint32 | layerAddr,
 |  | uint32 | regAddr,
 |  | uint32 | data
 | ) |  |

Writes to a MDIO register of Clause 22 PHY.

Parameters
layerAddr | Layer Address
regAddr | Register Address
data | Data
Returns
None

Definition at line 396 of file IfxGeth.c.

◆ IfxGeth_phy_Clause45_readMDIORegister()

void IfxGeth_phy_Clause45_readMDIORegister | ( | uint32 | layerAddr,
 |  | uint32 | deviceAddr,
 |  | uint32 | regAddr,
 |  | uint32 * | pData
 | ) |  |

Reads a MDIO register of Clause 45 PHY.

Parameters
layerAddr | Layer Address
deviceAddr | Device Address
regAddr | Register Address
pData | Pointer to Data
Returns
None

Definition at line 408 of file IfxGeth.c.

◆ IfxGeth_Phy_Clause45_writeMDIORegister()

void IfxGeth_Phy_Clause45_writeMDIORegister | ( | uint32 | layerAddr,
 |  | uint32 | deviceAddr,
 |  | uint32 | regAddr,
 |  | uint32 | data
 | ) |  |

Writes to a MDIO register for Clause 45 PHY.

Parameters
layerAddr | Layer Address
deviceAddr | Device Address
regAddr | Register Address
data | Data
Returns
None

Definition at line 423 of file IfxGeth.c.


iLLD_TC38A: IfxGeth_cfg.c File Reference

  • _Impl
Variables
IfxGeth_cfg.c File Reference

GETH on-chip implementation data. More...

#include "IfxGeth_cfg.h"
Include dependency graph for IfxGeth_cfg.c:

Go to the source code of this file.

Variables

IFX_CONST IfxModule_IndexMap IfxGeth_cfg_indexMap [IFXGETH_NUM_MODULES]

Detailed Description

GETH on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGeth_cfg.c.

Variable Documentation

◆ IfxGeth_cfg_indexMap

IFX_CONST IfxModule_IndexMap IfxGeth_cfg_indexMap[IFXGETH_NUM_MODULES]
Initial value:
= {
{&MODULE_GETH, (uint32)IfxGeth_Index_0},
}
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxGeth_Index_0
GETH index 0.
Definition: IfxGeth_cfg.h:107

Definition at line 53 of file IfxGeth_cfg.c.

Referenced by IfxGeth_getAddress(), and IfxGeth_getIndex().


iLLD_TC38A: IfxGeth_Eth.c File Reference

  • Geth
  • Eth
Functions | Variables
IfxGeth_Eth.c File Reference

GETH ETH details. More...

#include "IfxGeth_Eth.h"
Include dependency graph for IfxGeth_Eth.c:

Go to the source code of this file.

Functions

void | IfxGeth_Eth_configureDMA (IfxGeth_Eth *geth, IfxGeth_Eth_DmaConfig *dmaConfig)
Configures the DMA. More...
void | IfxGeth_Eth_configureMTL (IfxGeth_Eth *geth, IfxGeth_Eth_MtlConfig *mtlConfig)
Configures the MTL. More...
void | IfxGeth_Eth_configureMacCore (IfxGeth_Eth *geth, IfxGeth_Eth_MacConfig *macConfig)
Configures the MAC core. More...
void | IfxGeth_Eth_freeReceiveBuffer (IfxGeth_Eth *geth, IfxGeth_RxDmaChannel channelId)
Free the receive buffer, enabling it for the further reception. More...
void * | IfxGeth_Eth_getReceiveBuffer (IfxGeth_Eth *geth, IfxGeth_RxDmaChannel channelId)
Gets receive buffer
note: IfxEth_freeReceiveBuffer() shall be called after the data from the RX buffer has been processed. More...
void * | IfxGeth_Eth_getTransmitBuffer (IfxGeth_Eth *geth, IfxGeth_TxDmaChannel channelId)
Get the transmit buffer pointer of current descriptor. More...
void | IfxGeth_Eth_initModule (IfxGeth_Eth *geth, IfxGeth_Eth_Config *config)
Initialises the Geth Module with given configuration. More...
void | IfxGeth_Eth_initModuleConfig (IfxGeth_Eth_Config *config, Ifx_GETH *gethSFR)
Initialises the config structure with default values. More...
void | IfxGeth_Eth_initReceiveDescriptors (IfxGeth_Eth *geth, IfxGeth_Eth_RxChannelConfig *config)
Initialises the Rx descriptors of a single channel. More...
void | IfxGeth_Eth_initTransmitDescriptors (IfxGeth_Eth *geth, IfxGeth_Eth_TxChannelConfig *config)
Initialises the Tx descriptors of a single channel. More...
void | IfxGeth_Eth_sendFrame (IfxGeth_Eth *geth, IfxGeth_Eth_FrameConfig *config)
Transmits a frame from a single channel. More...
void | IfxGeth_Eth_sendTransmitBuffer (IfxGeth_Eth *geth, uint32 packetLength, IfxGeth_TxDmaChannel channelId)
Transmits a frame from a single channel. More...
void | IfxGeth_Eth_setupMiiInputPins (IfxGeth_Eth *geth, const IfxGeth_Eth_MiiPins *miiPins)
Set up MII mode input pins. More...
void | IfxGeth_Eth_setupMiiOutputPins (IfxGeth_Eth *geth, const IfxGeth_Eth_MiiPins *miiPins)
setup MII mode output pins More...
void | IfxGeth_Eth_setupRgmiiInputPins (IfxGeth_Eth *geth, const IfxGeth_Eth_RgmiiPins *rgmiiPins)
Set up RGMII mode input pins. More...
void | IfxGeth_Eth_setupRgmiiOutputPins (IfxGeth_Eth *geth, const IfxGeth_Eth_RgmiiPins *rgmiiPins)
Set up RGMII mode output pins. More...
void | IfxGeth_Eth_setupRmiiInputPins (IfxGeth_Eth *geth, const IfxGeth_Eth_RmiiPins *rmiiPins)
setup RMII mode input pins More...
void | IfxGeth_Eth_setupRmiiOutputPins (IfxGeth_Eth *geth, const IfxGeth_Eth_RmiiPins *rmiiPins)
setup RMII mode output pins More...
void | IfxGeth_Eth_shuffleRxDescriptor (IfxGeth_Eth *geth, IfxGeth_RxDmaChannel channelId)
Updates the current Rx descriptor pointer in the handle to next Rx descriptor. More...
void | IfxGeth_Eth_shuffleTxDescriptor (IfxGeth_Eth *geth, IfxGeth_TxDmaChannel channelId)
Updates the current Tx descriptor pointer in the handle to next Tx descriptor. More...
void | IfxGeth_Eth_startReceiver (IfxGeth_Eth *geth, IfxGeth_RxDmaChannel channelId)
Start the Receiver functions of MAC and selected channel of DMA. More...
void | IfxGeth_Eth_startReceivers (IfxGeth_Eth *geth, uint32 numOfChannels)
Start the Receiver functions of MAC and all selected number of DMA channels. More...
void | IfxGeth_Eth_startTransmitter (IfxGeth_Eth *geth, IfxGeth_TxDmaChannel channelId)
Start the transmitter functions of MAC and selected channel of DMA. More...
void | IfxGeth_Eth_startTransmitters (IfxGeth_Eth *geth, uint32 numOfChannels)
Start the transmitter functions of MAC and all selected number of DMA channels. More...
void | IfxGeth_Eth_stopTransmitters (IfxGeth_Eth *geth, uint32 numOfChannels)
Stops the transmitter functions of MAC and all selected number of DMA channels. More...
void | IfxGeth_Eth_wakeupReceiver (IfxGeth_Eth *geth, IfxGeth_RxDmaChannel channelId)
Wakes up the Receiver functions of MAC and selected channel of DMA. More...
void | IfxGeth_Eth_wakeupTransmitter (IfxGeth_Eth *geth, IfxGeth_TxDmaChannel channelId)
Wakes up the transmitter functions of MAC and selected channel of DMA. More...
void | IfxGeth_Eth_writeHeader (IfxGeth_Eth *geth, uint8 *txBuffer, uint8 *destinationAddress, uint8 *sourceAddress, uint32 payloadLength)
writes the header format into buffrer More...

Variables

IfxGeth_RxDescrList IfxGeth_Eth_rxDescrList [IFXGETH_NUM_MODULES][IFXGETH_NUM_RX_CHANNELS]
IfxGeth_TxDescrList IfxGeth_Eth_txDescrList [IFXGETH_NUM_MODULES][IFXGETH_NUM_TX_CHANNELS]

Detailed Description

GETH ETH details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGeth_Eth.c.

Function Documentation

◆ IfxGeth_Eth_freeReceiveBuffer()

void IfxGeth_Eth_freeReceiveBuffer | ( | IfxGeth_Eth * | geth,
 |  | IfxGeth_RxDmaChannel | channelId
 | ) |  |

Free the receive buffer, enabling it for the further reception.

Parameters
geth | GETH driver Handle
channelId | Rx channel Id
Returns
None
// IfxGeth_Eth geth; // assumed to be defined globally
IfxGeth_Eth_freeReceiveBuffer(&geth, IfxGeth_RxDmaChannel_0);

Definition at line 209 of file IfxGeth_Eth.c.

Variable Documentation

◆ IfxGeth_Eth_rxDescrList

IfxGeth_RxDescrList IfxGeth_Eth_rxDescrList[IFXGETH_NUM_MODULES][IFXGETH_NUM_RX_CHANNELS]

Definition at line 53 of file IfxGeth_Eth.c.

Referenced by IfxGeth_Eth_initModuleConfig().

◆ IfxGeth_Eth_txDescrList

IfxGeth_TxDescrList IfxGeth_Eth_txDescrList[IFXGETH_NUM_MODULES][IFXGETH_NUM_TX_CHANNELS]

Definition at line 55 of file IfxGeth_Eth.c.

Referenced by IfxGeth_Eth_initModuleConfig().


iLLD_TC38A: IfxGpt12.c File Reference

  • Gpt12
  • Std
Functions
IfxGpt12.c File Reference

GPT12 basic functionality. More...

#include "IfxGpt12.h"
Include dependency graph for IfxGpt12.c:

Go to the source code of this file.

Functions

float32 | IfxGpt12_T2_getFrequency (Ifx_GPT12 *gpt12)
Returns the frequency of the T2 timer. More...
float32 | IfxGpt12_T3_getFrequency (Ifx_GPT12 *gpt12)
Returns the frequency of the T3 timer. More...
float32 | IfxGpt12_T4_getFrequency (Ifx_GPT12 *gpt12)
Returns the frequency of the T4 timer. More...
float32 | IfxGpt12_T5_getFrequency (Ifx_GPT12 *gpt12)
Returns the frequency of the T5 timer. More...
float32 | IfxGpt12_T6_getFrequency (Ifx_GPT12 *gpt12)
Returns the frequency of the T6 timer. More...
void | IfxGpt12_disableModule (Ifx_GPT12 *gpt12)
Disables the module. More...
void | IfxGpt12_enableModule (Ifx_GPT12 *gpt12)
Enables the module. More...
void | IfxGpt12_initTxEudInPin (const IfxGpt12_TxEud_In *txEudIn, IfxPort_InputMode inputMode)
Initializes a TxEUDIn_IN input. More...
void | IfxGpt12_initTxEudInPinWithPadLevel (const IfxGpt12_TxEud_In *txEudIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of TXEUD pin direction as input and configuring pad driver. More...
void | IfxGpt12_initTxInPin (const IfxGpt12_TxIn_In *txIn, IfxPort_InputMode inputMode)
Initializes a TxIn input. More...
void | IfxGpt12_initTxInPinWithPadLevel (const IfxGpt12_TxIn_In *txIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of TXIN pin direction as input and configuring pad driver. More...
void | IfxGpt12_resetModule (Ifx_GPT12 *gpt12)
resets GPT12 kernel More...

Detailed Description

GPT12 basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGpt12.c.

Function Documentation

◆ IfxGpt12_initTxEudInPinWithPadLevel()

void IfxGpt12_initTxEudInPinWithPadLevel | ( | const IfxGpt12_TxEud_In * | txEudIn,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of TXEUD pin direction as input and configuring pad driver.

Parameters
txEudIn | the TxEUD_IN Pin which should be configured
inputMode | the pin input mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 302 of file IfxGpt12.c.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_initTxInPinWithPadLevel()

void IfxGpt12_initTxInPinWithPadLevel | ( | const IfxGpt12_TxIn_In * | txIn,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of TXIN pin direction as input and configuring pad driver.

Parameters
txIn | the TxIn Pin which should be configured
inputMode | the pin input mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 357 of file IfxGpt12.c.

Referenced by IfxGpt12_IncrEnc_init().


iLLD_TC38A: IfxGpt12_IncrEnc.c File Reference

  • Gpt12
  • IncrEnc
Functions
IfxGpt12_IncrEnc.c File Reference

GPT12 INCRENC details. More...

#include "IfxGpt12_IncrEnc.h"
Include dependency graph for IfxGpt12_IncrEnc.c:

Go to the source code of this file.

Functions

IFX_STATIC void | IfxGpt12_IncrEnc_updateFromT2 (IfxGpt12_IncrEnc *driver)
Update internal data when incremental mode is using T2.
This function shall be periodically called. More...
IFX_STATIC void | IfxGpt12_IncrEnc_updateFromT3 (IfxGpt12_IncrEnc *driver)
Update internal data when incremental mode is using T3.
This function shall be periodically called. More...
IFX_STATIC void | IfxGpt12_IncrEnc_updateSpeedFromT2 (IfxGpt12_IncrEnc *driver, sint32 newPosition)
Updates the speed. More...
IFX_STATIC void | IfxGpt12_IncrEnc_updateSpeedFromT3 (IfxGpt12_IncrEnc *driver, sint32 newPosition)
Updates the speed. More...
float32 | IfxGpt12_IncrEnc_getAbsolutePosition (IfxGpt12_IncrEnc *driver)
IfxStdIf_Pos_Dir | IfxGpt12_IncrEnc_getDirection (IfxGpt12_IncrEnc *driver)
IfxStdIf_Pos_Status | IfxGpt12_IncrEnc_getFault (IfxGpt12_IncrEnc *driver)
sint32 | IfxGpt12_IncrEnc_getOffset (IfxGpt12_IncrEnc *driver)
uint16 | IfxGpt12_IncrEnc_getPeriodPerRotation (IfxGpt12_IncrEnc *driver)
float32 | IfxGpt12_IncrEnc_getPosition (IfxGpt12_IncrEnc *driver)
sint32 | IfxGpt12_IncrEnc_getRawPosition (IfxGpt12_IncrEnc *driver)
float32 | IfxGpt12_IncrEnc_getRefreshPeriod (IfxGpt12_IncrEnc *driver)
sint32 | IfxGpt12_IncrEnc_getResolution (IfxGpt12_IncrEnc *driver)
IfxStdIf_Pos_SensorType | IfxGpt12_IncrEnc_getSensorType (IfxGpt12_IncrEnc *driver)
float32 | IfxGpt12_IncrEnc_getSpeed (IfxGpt12_IncrEnc *driver)
sint32 | IfxGpt12_IncrEnc_getTurn (IfxGpt12_IncrEnc *driver)
boolean | IfxGpt12_IncrEnc_init (IfxGpt12_IncrEnc *driver, const IfxGpt12_IncrEnc_Config *config)
Initialises the Incremental interface. More...
void | IfxGpt12_IncrEnc_initConfig (IfxGpt12_IncrEnc_Config *config, Ifx_GPT12 *gpt12)
Initializes the configuration structure to default. More...
void | IfxGpt12_IncrEnc_onZeroIrq (IfxGpt12_IncrEnc *driver)
void | IfxGpt12_IncrEnc_reset (IfxGpt12_IncrEnc *driver)
void | IfxGpt12_IncrEnc_resetFaults (IfxGpt12_IncrEnc *driver)
void | IfxGpt12_IncrEnc_setOffset (IfxGpt12_IncrEnc *driver, sint32 offset)
void | IfxGpt12_IncrEnc_setRefreshPeriod (IfxGpt12_IncrEnc *driver, float32 updatePeriod)
boolean | IfxGpt12_IncrEnc_stdIfPosInit (IfxStdIf_Pos *stdif, IfxGpt12_IncrEnc *driver)
Initializes the standard interface "Pos". More...
void | IfxGpt12_IncrEnc_update (IfxGpt12_IncrEnc *driver)

Detailed Description

GPT12 INCRENC details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGpt12_IncrEnc.c.

Function Documentation

◆ IfxGpt12_IncrEnc_stdIfPosInit()

boolean IfxGpt12_IncrEnc_stdIfPosInit | ( | IfxStdIf_Pos * | stdif,
 |  | IfxGpt12_IncrEnc * | driver
 | ) |  |

Initializes the standard interface "Pos".

Parameters
stdif | Standard interface position object
driver | incremental encoder interface Handle
Returns
TRUE on success else FALSE

Definition at line 366 of file IfxGpt12_IncrEnc.c.

◆ IfxGpt12_IncrEnc_updateFromT2()

IFX_STATIC void IfxGpt12_IncrEnc_updateFromT2 ( IfxGpt12_IncrEnc * driver )

Update internal data when incremental mode is using T2.
This function shall be periodically called.

Parameters
driver driver handle
Returns
None

Definition at line 406 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_IncrEnc_updateFromT3()

IFX_STATIC void IfxGpt12_IncrEnc_updateFromT3 ( IfxGpt12_IncrEnc * driver )

Update internal data when incremental mode is using T3.
This function shall be periodically called.

Parameters
driver driver handle
Returns
None

Definition at line 430 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_IncrEnc_updateSpeedFromT2()

IFX_STATIC void IfxGpt12_IncrEnc_updateSpeedFromT2 | ( | IfxGpt12_IncrEnc * | driver,
 |  | sint32 | newPosition
 | ) |  |

Updates the speed.

Parameters
driver | driver handle
newPosition | new position
Returns
None

Definition at line 454 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_updateFromT2().

◆ IfxGpt12_IncrEnc_updateSpeedFromT3()

IFX_STATIC void IfxGpt12_IncrEnc_updateSpeedFromT3 | ( | IfxGpt12_IncrEnc * | driver,
 |  | sint32 | newPosition
 | ) |  |

Updates the speed.

Parameters
driver | driver handle
newPosition | new position
Returns
None

Definition at line 480 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_updateFromT3().


iLLD_TC38A: IfxGtm.c File Reference

  • Gtm
  • Std
Functions
IfxGtm.c File Reference

GTM basic functionality. More...

#include "IfxGtm.h"
#include "Scu/Std/IfxScuWdt.h"
#include "Scu/Std/IfxScuCcu.h"
Include dependency graph for IfxGtm.c:

Go to the source code of this file.

Functions

void | IfxGtm_disable (Ifx_GTM *gtm)
Disables the module. More...
void | IfxGtm_enable (Ifx_GTM *gtm)
Enables the module. More...
float32 | IfxGtm_getSysClkFrequency (void)
returns the GTM SYSCLK frequency. Refer to the Clock distribution for details on GTM SYS CLK. More...
float32 | IfxGtm_getClusterFrequency (Ifx_GTM *gtm, IfxGtm_Cluster cluster)
returns the cluster frequency of the GTM cluster. If the cluster is disabled, then it will return 0 as frequency. More...

Detailed Description

GTM basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm.c.

Function Documentation

◆ IfxGtm_getClusterFrequency()

float32 IfxGtm_getClusterFrequency | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Cluster | cluster
 | ) |  |

returns the cluster frequency of the GTM cluster. If the cluster is disabled, then it will return 0 as frequency.

Parameters
gtm | pointer to gtm device
cluster | index of cluster
Returns
cluster frequency

Definition at line 80 of file IfxGtm.c.

Referenced by IfxGtm_Cmu_getModuleFrequency().

◆ IfxGtm_getSysClkFrequency()

float32 IfxGtm_getSysClkFrequency ( void )

returns the GTM SYSCLK frequency. Refer to the Clock distribution for details on GTM SYS CLK.

Returns
sysFreq

Definition at line 74 of file IfxGtm.c.

Referenced by IfxGtm_getClusterFrequency().


iLLD_TC38A: IfxGtm_Atom.c File Reference

  • Gtm
  • Std
Macros | Functions
IfxGtm_Atom.c File Reference

GTM basic functionality. More...

#include "IfxGtm_Atom.h"
#include "IfxGtm_bf.h"
Include dependency graph for IfxGtm_Atom.c:

Go to the source code of this file.

Macros

#define IFXGTM_ATOM_NUM_AGC_CHANNELS (8)
Number of channels per ATOM AGC. More...

Functions

uint32 | IfxGtm_Atom_Agc_buildFeature (uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable. More...
uint32 | IfxGtm_Atom_Agc_buildFeatureForChannel (IfxGtm_Atom_Ch channel, boolean enabled, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable for a single channel. More...
void | IfxGtm_Atom_Agc_enableChannel (Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel (ENDIS) More...
void | IfxGtm_Atom_Agc_enableChannelOutput (Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel output (OUTEN) More...
void | IfxGtm_Atom_Agc_enableChannelUpdate (Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled)
Enable/disable one channel for update (UPEN) More...
void | IfxGtm_Atom_Agc_enableChannels (Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels (ENDIS) More...
void | IfxGtm_Atom_Agc_enableChannelsOutput (Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels output (OUTEN) More...
void | IfxGtm_Atom_Agc_enableChannelsTrigger (Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask)
Enable/disable the TGC channels trigger. More...
void | IfxGtm_Atom_Agc_enableChannelsUpdate (Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask)
Enable/disable one or more channels for update (UPEN) More...
void | IfxGtm_Atom_Agc_enableTimeTrigger (Ifx_GTM_ATOM_AGC *agc, boolean enabled)
Enable/disable the time base trigger. More...
void | IfxGtm_Atom_Agc_resetChannels (Ifx_GTM_ATOM_AGC *agc, uint32 resetMask)
Reset one or more channels. More...
void | IfxGtm_Atom_Agc_setChannelForceUpdate (Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean resetEnabled)
Enable/disable one channel for update (FUPD) More...
void | IfxGtm_Atom_Agc_setChannelsForceUpdate (Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
Enable/disable one or more channels for the force update feature (FUPD) More...
void | IfxGtm_Atom_Agc_setTimeTrigger (Ifx_GTM_ATOM_AGC *agc, IfxGtm_Tbu_Ts base, uint32 value)
Sets the trigger time base and time base value. More...
void | IfxGtm_Atom_Agc_trigger (Ifx_GTM_ATOM_AGC *agc)
Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG) More...
void | IfxGtm_Atom_Ch_clearOneNotification (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Clears the channel One notification. More...
void | IfxGtm_Atom_Ch_clearZeroNotification (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Clears the channel Zero notification. More...
void | IfxGtm_Atom_Ch_configurePwmMode (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock, Ifx_ActiveState activeState, IfxGtm_Atom_Ch_ResetEvent resetEvent, IfxGtm_Atom_Ch_OutputTrigger trigger)
float32 | IfxGtm_Atom_Ch_getClockFrequency (Ifx_GTM *gtm, Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the ATOM channel input clock frequency in Hz. More...
IfxGtm_Cmu_Clk | IfxGtm_Atom_Ch_getClockSource (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the channel clock source. More...
uint32 | IfxGtm_Atom_Ch_getCompareOne (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare one value. More...
volatile uint32 * | IfxGtm_Atom_Ch_getCompareOnePointer (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare one pointer. More...
uint32 | IfxGtm_Atom_Ch_getCompareZero (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare zero value. More...
volatile uint32 * | IfxGtm_Atom_Ch_getCompareZeroPointer (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare zero pointer. More...
boolean | IfxGtm_Atom_Ch_getOutputLevel (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Gets the ATOM output level. More...
volatile Ifx_SRC_SRCR * | IfxGtm_Atom_Ch_getSrcPointer (Ifx_GTM *gtm, IfxGtm_Atom atom, IfxGtm_Atom_Ch channel)
Returns a pointer to the ATOM channel SRC. More...
volatile uint32 * | IfxGtm_Atom_Ch_getTimerPointer (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the Timer pointer. More...
boolean | IfxGtm_Atom_Ch_isOneNotification (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the status of channel One notification. More...
boolean | IfxGtm_Atom_Ch_isZeroNotification (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the status of channel Zero notification. More...
void | IfxGtm_Atom_Ch_raiseInterruptOne (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Raises the interrupt for Compare 1. More...
void | IfxGtm_Atom_Ch_raiseInterruptZero (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Raises the interrupt for Compare 0. More...
void | IfxGtm_Atom_Ch_setClockSource (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock)
Sets the channel clock source. More...
void | IfxGtm_Atom_Ch_setCompare (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareZero, uint32 compareOne)
Sets the compare 0 and 1 values. More...
void | IfxGtm_Atom_Ch_setCompareOne (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareOne)
Sets the compare 1 value. More...
void | IfxGtm_Atom_Ch_setCompareOneShadow (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowOne)
Sets the compare 1 shadow value. More...
void | IfxGtm_Atom_Ch_setCompareZero (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareZero)
Sets the compare 0 value. More...
void | IfxGtm_Atom_Ch_setCompareZeroShadow (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowZero)
Sets the compare 0 shadow value. More...
void | IfxGtm_Atom_Ch_setCounterValue (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 value)
Sets the counter value. More...
void | IfxGtm_Atom_Ch_setMode (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Mode mode)
set the Atom operating mode More...
void | IfxGtm_Atom_Ch_setNotification (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne)
Sets the channel notification. More...
void | IfxGtm_Atom_Ch_setOneShotMode (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, boolean enabled)
Enable/disable the one shot mode. More...
void | IfxGtm_Atom_Ch_setResetSource (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Ch_ResetEvent event)
Sets the channel clock source either from local or from previous channel. More...
void | IfxGtm_Atom_Ch_setSignalLevel (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, Ifx_ActiveState activeState)
Sets the signal level. More...
void | IfxGtm_Atom_Ch_setTriggerOutput (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Ch_OutputTrigger trigger)
Sets the channel trigger output. More...
void | IfxGtm_Atom_Ch_setAruInput (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, boolean enabled)
enable/disable ARU input for the ATOM channel specified. More...
uint32 | IfxGtm_Atom_Ch_getCounterValue (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Get the counter value. More...
void | IfxGtm_Atom_Ch_setSomcControl (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_SomcControl control)
sets the SOMC control bits for the specified ATOM channel More...
void | IfxGtm_Atom_Ch_setSomcSignalLevelControl (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_SomcSignalLevelControl ctrl)
sets the SL control for SOMC mode. More...
void | IfxGtm_Atom_Ch_setAruReadAddress0 (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 address)
set the ARU read address 0 More...
void | IfxGtm_Atom_Ch_setAruReadAddress1 (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 address)
set the ARU read address 1 More...
uint32 | IfxGtm_Atom_getShadowZero (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the shadow zero value. More...
volatile uint32 * | IfxGtm_Atom_getShadowZeroPointer (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the shadow zero pointer. More...
uint32 | IfxGtm_Atom_getShadowOne (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the shadow one value. More...
volatile uint32 * | IfxGtm_Atom_getShadowOnePointer (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the shadow One pointer. More...

Detailed Description

GTM basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Atom.c.

Macro Definition Documentation

◆ IFXGTM_ATOM_NUM_AGC_CHANNELS

#define IFXGTM_ATOM_NUM_AGC_CHANNELS (8)

Number of channels per ATOM AGC.

Definition at line 55 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Agc_buildFeature(), and IfxGtm_Atom_Agc_resetChannels().

Function Documentation

◆ IfxGtm_Atom_Ch_setAruInput()

void IfxGtm_Atom_Ch_setAruInput | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | boolean | enabled
 | ) |  |

enable/disable ARU input for the ATOM channel specified.

Parameters
atom | pointer to the ATOM instance
channel | index of ATOM channel
enabled | ARU enable status
Returns
None

Definition at line 521 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Ch_setAruReadAddress0()

void IfxGtm_Atom_Ch_setAruReadAddress0 | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | uint32 | address
 | ) |  |

set the ARU read address 0

Parameters
atom | pointer to ATOM instance
channel | ATOM channel index
address | ARU read address 0
Returns
None

Definition at line 553 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Ch_setAruReadAddress1()

void IfxGtm_Atom_Ch_setAruReadAddress1 | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | uint32 | address
 | ) |  |

set the ARU read address 1

Parameters
atom | pointer to ATOM instance
channel | ATOM channel index
address | ARU read address 1
Returns
None

Definition at line 560 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Ch_setSomcControl()

void IfxGtm_Atom_Ch_setSomcControl | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | IfxGtm_Atom_SomcControl | control
 | ) |  |

sets the SOMC control bits for the specified ATOM channel

Parameters
atom | pointer to ATOM instance
channel | ATOM channel index
control | SOMC control mode enum
Returns
None

Definition at line 537 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Ch_setSomcSignalLevelControl()

void IfxGtm_Atom_Ch_setSomcSignalLevelControl | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | IfxGtm_Atom_SomcSignalLevelControl | ctrl
 | ) |  |

sets the SL control for SOMC mode.

Parameters
atom | pointer to the ATOM instance
channel | index of ATOM channel
ctrl | SIgnal level control
Returns
None

Definition at line 545 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_getShadowOne()

uint32 IfxGtm_Atom_getShadowOne | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Returns the shadow one value.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
shadow one value

Definition at line 583 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_getShadowOnePointer()

volatile uint32* IfxGtm_Atom_getShadowOnePointer | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Returns the shadow One pointer.

Parameters
atom | Pointer to the ATOM object
channel | channel index
Returns
shadow One pointer

Definition at line 591 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_getShadowZero()

uint32 IfxGtm_Atom_getShadowZero | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Returns the shadow zero value.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
shadow zero value

Definition at line 567 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_getShadowZeroPointer()

volatile uint32* IfxGtm_Atom_getShadowZeroPointer | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Returns the shadow zero pointer.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
shadow zero value

Definition at line 575 of file IfxGtm_Atom.c.


iLLD_TC38A: IfxGtm_Atom_Dtm_PwmHl.c File Reference

  • Gtm
  • Atom
  • Dtm_PwmHl
Functions | Variables
IfxGtm_Atom_Dtm_PwmHl.c File Reference

GTM DTM_PWMHL details. More...

#include "IfxGtm_Atom_Dtm_PwmHl.h"
#include "_Utilities/Ifx_Assert.h"
#include "stddef.h"
#include "string.h"
Include dependency graph for IfxGtm_Atom_Dtm_PwmHl.c:

Go to the source code of this file.

Functions

IFX_INLINE void | IfxGtm_Atom_Dtm_PwmHl_setOnTime (IfxGtm_AtomDtm_PwmHl *driver, Ifx_TimerValue *tOn)
Sets the ON time. More...
IFX_INLINE Ifx_ActiveState | IfxGtm_Atom_Dtm_PwmHl_invertActiveState (Ifx_ActiveState activeState)
Inverts the active state. More...
IFX_STATIC void | IfxGtm_Atom_Dtm_PwmHl_updateAndShiftOff (IfxGtm_AtomDtm_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets switched to OFF. More...
IFX_STATIC void | IfxGtm_Atom_Dtm_PwmHl_updateCenterAligned (IfxGtm_AtomDtm_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in center aligned and center aligned inverted modes. More...
IFX_STATIC void | IfxGtm_Atom_Dtm_PwmHl_updateEdgeAligned (IfxGtm_AtomDtm_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in edge aligned modes (left and right aligned) More...
IFX_STATIC void | IfxGtm_Atom_Dtm_PwmHl_updateOff (IfxGtm_AtomDtm_PwmHl *driver, Ifx_TimerValue *tOn)
Set the outputs to inactive. More...
IFX_STATIC void | IfxGtm_Atom_Dtm_PwmHl_updatePulse (IfxGtm_AtomDtm_PwmHl *driver, float32 *tOn, float32 *offset)
Update Pulse. More...
IFX_STATIC void | IfxGtm_Atom_Dtm_PwmHl_updatePulseOff (IfxGtm_AtomDtm_PwmHl *driver, float32 *tOn, float32 *offset)
Set Pulse to OFF. More...
IFX_STATIC void | IfxGtm_Atom_Dtm_PwmHl_updateShiftCenterAligned (IfxGtm_AtomDtm_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Update Shift Center Aligned. More...
IFX_STATIC Ifx_TimerValue | IfxGtm_Atom_Dtm_PwmHl_getDeadtimeInTimerClockTicks (IfxGtm_AtomDtm_PwmHl *driver)
boolean | IfxGtm_Atom_Dtm_PwmHl_init (IfxGtm_AtomDtm_PwmHl *driver, const IfxGtm_Atom_Dtm_PwmHl_Config *config)
Initializes the timer object note : To ensure that the channels counter are reset by the timer and do not overflow, leading to random signal on the output, the timer must be started before the call to this function. More...
void | IfxGtm_Atom_Dtm_PwmHl_initConfig (IfxGtm_Atom_Dtm_PwmHl_Config *config)
Initialize the configuration structure to default. More...
float32 | IfxGtm_Atom_Dtm_PwmHl_getDeadtime (IfxGtm_AtomDtm_PwmHl *driver)
Returns the dead time. More...
Ifx_TickTime | IfxGtm_Atom_Dtm_PwmHl_getDeadtimeTick (IfxGtm_AtomDtm_PwmHl *driver)
float32 | IfxGtm_Atom_Dtm_PwmHl_getMinPulse (IfxGtm_AtomDtm_PwmHl *driver)
Returns the minimum pulse. More...
Ifx_Pwm_Mode | IfxGtm_Atom_Dtm_PwmHl_getMode (IfxGtm_AtomDtm_PwmHl *driver)
Returns Pwm mode. More...
boolean | IfxGtm_Atom_Dtm_PwmHl_setDeadtime (IfxGtm_AtomDtm_PwmHl *driver, float32 deadtime)
Sets the dead time. More...
boolean | IfxGtm_Atom_Dtm_PwmHl_setMinPulse (IfxGtm_AtomDtm_PwmHl *driver, float32 minPulse)
Sets the minimum pulse. More...
boolean | IfxGtm_Atom_Dtm_PwmHl_setMode (IfxGtm_AtomDtm_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate() More...
void | IfxGtm_Atom_Dtm_PwmHl_setOnTimeAndShift (IfxGtm_AtomDtm_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets the ON time and Shift. More...
void | IfxGtm_Atom_Dtm_PwmHl_setPulse (IfxGtm_AtomDtm_PwmHl *driver, float32 *tOn, float32 *offset)
Sets the ON time and offset, all switched are independent. More...
void | IfxGtm_Atom_Dtm_PwmHl_setupChannels (IfxGtm_AtomDtm_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set up channels. More...
boolean | IfxGtm_Atom_Dtm_PwmHl_stdIfPwmHlInit (IfxStdIf_PwmHl *stdif, IfxGtm_AtomDtm_PwmHl *driver)
Initialises the statndard interface Pwm. More...

Variables

IFX_STATIC IFX_CONST IfxGtm_Atom_Dtm_PwmHl_Mode IfxGtm_Atom_Dtm_PwmHl_modes [Ifx_Pwm_Mode_off+1]

Detailed Description

GTM DTM_PWMHL details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Atom_Dtm_PwmHl.c.

Function Documentation

◆ IfxGtm_Atom_Dtm_PwmHl_getDeadtime()

float32 IfxGtm_Atom_Dtm_PwmHl_getDeadtime ( IfxGtm_AtomDtm_PwmHl * driver )

Returns the dead time.

Parameters
driver driver GTM ATOM PWM driver
Returns
Dead Time

Definition at line 284 of file IfxGtm_Atom_Dtm_PwmHl.c.

Referenced by IfxGtm_Atom_Dtm_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_Dtm_PwmHl_getDeadtimeInTimerClockTicks()

IFX_STATIC Ifx_TimerValue IfxGtm_Atom_Dtm_PwmHl_getDeadtimeInTimerClockTicks ( IfxGtm_AtomDtm_PwmHl * driver )

Definition at line 698 of file IfxGtm_Atom_Dtm_PwmHl.c.

Referenced by IfxGtm_Atom_Dtm_PwmHl_getMinPulse(), and IfxGtm_Atom_Dtm_PwmHl_setMinPulse().

◆ IfxGtm_Atom_Dtm_PwmHl_getDeadtimeTick()

Ifx_TickTime IfxGtm_Atom_Dtm_PwmHl_getDeadtimeTick ( IfxGtm_AtomDtm_PwmHl * driver )

Definition at line 290 of file IfxGtm_Atom_Dtm_PwmHl.c.

Referenced by IfxGtm_Atom_Dtm_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_Dtm_PwmHl_getMinPulse()

float32 IfxGtm_Atom_Dtm_PwmHl_getMinPulse ( IfxGtm_AtomDtm_PwmHl * driver )

Returns the minimum pulse.

Parameters
driver driver GTM ATOM PWM driver
Returns
Min Pulse

Definition at line 296 of file IfxGtm_Atom_Dtm_PwmHl.c.

Referenced by IfxGtm_Atom_Dtm_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_Dtm_PwmHl_getMode()

Ifx_Pwm_Mode IfxGtm_Atom_Dtm_PwmHl_getMode ( IfxGtm_AtomDtm_PwmHl * driver )

Returns Pwm mode.

Parameters
driver driver GTM ATOM PWM driver
Returns
Pwm mode

Definition at line 302 of file IfxGtm_Atom_Dtm_PwmHl.c.

Referenced by IfxGtm_Atom_Dtm_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_Dtm_PwmHl_init()

boolean IfxGtm_Atom_Dtm_PwmHl_init | ( | IfxGtm_AtomDtm_PwmHl * | driver,
 |  | const IfxGtm_Atom_Dtm_PwmHl_Config * | config
 | ) |  |

Initializes the timer object note : To ensure that the channels counter are reset by the timer and do not overflow, leading to random signal on the output, the timer must be started before the call to this function.

Parameters
driver | driver GTM ATOM PWM driver
config | config GTM ATOM: PWM HL configuration
Returns
TRUE on success else FALSE

Definition at line 159 of file IfxGtm_Atom_Dtm_PwmHl.c.

◆ IfxGtm_Atom_Dtm_PwmHl_initConfig()

void IfxGtm_Atom_Dtm_PwmHl_initConfig ( IfxGtm_Atom_Dtm_PwmHl_Config * config )

Initialize the configuration structure to default.

Parameters
config config Channel configuration. This parameter is Initialised by the function
Returns
None

Definition at line 272 of file IfxGtm_Atom_Dtm_PwmHl.c.

◆ IfxGtm_Atom_Dtm_PwmHl_invertActiveState()

IFX_INLINE Ifx_ActiveState IfxGtm_Atom_Dtm_PwmHl_invertActiveState ( Ifx_ActiveState activeState )

Inverts the active state.

Parameters
activeState Active state
Returns
State

Definition at line 149 of file IfxGtm_Atom_Dtm_PwmHl.c.

◆ IfxGtm_Atom_Dtm_PwmHl_setDeadtime()

boolean IfxGtm_Atom_Dtm_PwmHl_setDeadtime | ( | IfxGtm_AtomDtm_PwmHl * | driver,
 |  | float32 | deadtime
 | ) |  |

Sets the dead time.

Parameters
driver | driver GTM ATOM PWM driver
deadtime | deadtime Dead time value
Returns
TRUE on success else FALSE

Definition at line 308 of file IfxGtm_Atom_Dtm_PwmHl.c.

Referenced by IfxGtm_Atom_Dtm_PwmHl_init(), and IfxGtm_Atom_Dtm_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_Dtm_PwmHl_setMinPulse()

boolean IfxGtm_Atom_Dtm_PwmHl_setMinPulse | ( | IfxGtm_AtomDtm_PwmHl * | driver,
 |  | float32 | minPulse
 | ) |  |

Sets the minimum pulse.

Parameters
driver | driver GTM ATOM PWM driver
minPulse | minPulse Minimum pulse
Returns
TRUE on success else FALSE

Definition at line 331 of file IfxGtm_Atom_Dtm_PwmHl.c.

Referenced by IfxGtm_Atom_Dtm_PwmHl_init(), and IfxGtm_Atom_Dtm_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_Dtm_PwmHl_setMode()

boolean IfxGtm_Atom_Dtm_PwmHl_setMode | ( | IfxGtm_AtomDtm_PwmHl * | driver,
 |  | Ifx_Pwm_Mode | mode
 | ) |  |

Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate()

Parameters
driver | driver GTM ATOM PWM driver
mode | mode Pwm mode
Returns
TRUE on success else FALSE

Definition at line 342 of file IfxGtm_Atom_Dtm_PwmHl.c.

Referenced by IfxGtm_Atom_Dtm_PwmHl_init(), and IfxGtm_Atom_Dtm_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_Dtm_PwmHl_setOnTime()

IFX_INLINE void IfxGtm_Atom_Dtm_PwmHl_setOnTime | ( | IfxGtm_AtomDtm_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn
 | ) |  |

Sets the ON time.

Returns
None

Definition at line 143 of file IfxGtm_Atom_Dtm_PwmHl.c.

Referenced by IfxGtm_Atom_Dtm_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_Dtm_PwmHl_setOnTimeAndShift()

void IfxGtm_Atom_Dtm_PwmHl_setOnTimeAndShift | ( | IfxGtm_AtomDtm_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn,
 |  | Ifx_TimerValue * | shift
 | ) |  |

Sets the ON time and Shift.

Parameters
driver | driver GTM ATOM PWM driver
tOn | tOn ON time
shift | Shift value in ticks
Returns
None

Definition at line 384 of file IfxGtm_Atom_Dtm_PwmHl.c.

Referenced by IfxGtm_Atom_Dtm_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_Dtm_PwmHl_setPulse()

void IfxGtm_Atom_Dtm_PwmHl_setPulse | ( | IfxGtm_AtomDtm_PwmHl * | driver,
 |  | float32 * | tOn,
 |  | float32 * | offset
 | ) |  |

Sets the ON time and offset, all switched are independent.

Parameters
driver | driver GTM ATOM PWM driver
tOn | tOn ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
offset | offset Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
Returns
None

Definition at line 390 of file IfxGtm_Atom_Dtm_PwmHl.c.

Referenced by IfxGtm_Atom_Dtm_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_Dtm_PwmHl_setupChannels()

void IfxGtm_Atom_Dtm_PwmHl_setupChannels | ( | IfxGtm_AtomDtm_PwmHl * | driver,
 |  | boolean * | activeCh,
 |  | boolean * | stuckSt
 | ) |  |

Set up channels.

Parameters
driver | driver GTM ATOM PWM driver
activeCh | Active channel
stuckSt | Stuck state
Returns
None

Definition at line 396 of file IfxGtm_Atom_Dtm_PwmHl.c.

Referenced by IfxGtm_Atom_Dtm_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_Dtm_PwmHl_stdIfPwmHlInit()

boolean IfxGtm_Atom_Dtm_PwmHl_stdIfPwmHlInit | ( | IfxStdIf_PwmHl * | stdif,
 |  | IfxGtm_AtomDtm_PwmHl * | driver
 | ) |  |

Initialises the statndard interface Pwm.

Parameters
stdif | Standard interface object, will be initialized by the function
driver | Interface driver to be used by the standard interface. must be initialised separately
Returns
TRUE on success else FALSE

Definition at line 405 of file IfxGtm_Atom_Dtm_PwmHl.c.

◆ IfxGtm_Atom_Dtm_PwmHl_updateAndShiftOff()

IFX_STATIC void IfxGtm_Atom_Dtm_PwmHl_updateAndShiftOff | ( | IfxGtm_AtomDtm_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn,
 |  | Ifx_TimerValue * | shift
 | ) |  |

Sets switched to OFF.

Parameters
driver | driver GTM ATOM PWM driver
tOn | ON time
shift | Shift value in ticks
Returns
None

Definition at line 431 of file IfxGtm_Atom_Dtm_PwmHl.c.

◆ IfxGtm_Atom_Dtm_PwmHl_updateCenterAligned()

IFX_STATIC void IfxGtm_Atom_Dtm_PwmHl_updateCenterAligned | ( | IfxGtm_AtomDtm_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn
 | ) |  |

Updates the x output duty cycle in center aligned and center aligned inverted modes.

Parameters
driver | GTM ATOM PWM driver
tOn | T on
Returns
None

Definition at line 439 of file IfxGtm_Atom_Dtm_PwmHl.c.

◆ IfxGtm_Atom_Dtm_PwmHl_updateEdgeAligned()

IFX_STATIC void IfxGtm_Atom_Dtm_PwmHl_updateEdgeAligned | ( | IfxGtm_AtomDtm_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn
 | ) |  |

Updates the x output duty cycle in edge aligned modes (left and right aligned)

Parameters
driver | GTM ATOM PWM driver
tOn | T On
Returns
None

Definition at line 482 of file IfxGtm_Atom_Dtm_PwmHl.c.

◆ IfxGtm_Atom_Dtm_PwmHl_updateOff()

IFX_STATIC void IfxGtm_Atom_Dtm_PwmHl_updateOff | ( | IfxGtm_AtomDtm_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn
 | ) |  |

Set the outputs to inactive.

Parameters
driver | GTM ATOM PWM driver
tOn | T On
Returns
None

Definition at line 548 of file IfxGtm_Atom_Dtm_PwmHl.c.

Referenced by IfxGtm_Atom_Dtm_PwmHl_init(), IfxGtm_Atom_Dtm_PwmHl_updateAndShiftOff(), and IfxGtm_Atom_Dtm_PwmHl_updatePulseOff().

◆ IfxGtm_Atom_Dtm_PwmHl_updatePulse()

IFX_STATIC void IfxGtm_Atom_Dtm_PwmHl_updatePulse | ( | IfxGtm_AtomDtm_PwmHl * | driver,
 |  | float32 * | tOn,
 |  | float32 * | offset
 | ) |  |

Update Pulse.

Parameters
driver | GTM ATOM PWM driver
tOn | ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
offset | Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
Returns
None

Definition at line 563 of file IfxGtm_Atom_Dtm_PwmHl.c.

◆ IfxGtm_Atom_Dtm_PwmHl_updatePulseOff()

IFX_STATIC void IfxGtm_Atom_Dtm_PwmHl_updatePulseOff | ( | IfxGtm_AtomDtm_PwmHl * | driver,
 |  | float32 * | tOn,
 |  | float32 * | offset
 | ) |  |

Set Pulse to OFF.

Parameters
driver | GTM ATOM PWM driver
tOn | ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
offset | Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
Returns
None

Definition at line 623 of file IfxGtm_Atom_Dtm_PwmHl.c.

◆ IfxGtm_Atom_Dtm_PwmHl_updateShiftCenterAligned()

IFX_STATIC void IfxGtm_Atom_Dtm_PwmHl_updateShiftCenterAligned | ( | IfxGtm_AtomDtm_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn,
 |  | Ifx_TimerValue * | shift
 | ) |  |

Update Shift Center Aligned.

Parameters
driver | GTM ATOM PWM driver
tOn | ON time
shift | Shift value in ticks
Returns
None

Definition at line 632 of file IfxGtm_Atom_Dtm_PwmHl.c.

Variable Documentation

◆ IfxGtm_Atom_Dtm_PwmHl_modes

IFX_STATIC IFX_CONST IfxGtm_Atom_Dtm_PwmHl_Mode IfxGtm_Atom_Dtm_PwmHl_modes[Ifx_Pwm_Mode_off+1]
Initial value:
= {
{Ifx_Pwm_Mode_centerAligned, FALSE, &IfxGtm_Atom_Dtm_PwmHl_updateCenterAligned, &IfxGtm_Atom_Dtm_PwmHl_updateShiftCenterAligned, &IfxGtm_Atom_Dtm_PwmHl_updatePulse },
{Ifx_Pwm_Mode_centerAlignedInverted, TRUE, &IfxGtm_Atom_Dtm_PwmHl_updateCenterAligned, &IfxGtm_Atom_Dtm_PwmHl_updateShiftCenterAligned, &IfxGtm_Atom_Dtm_PwmHl_updatePulse },
{Ifx_Pwm_Mode_leftAligned, FALSE, &IfxGtm_Atom_Dtm_PwmHl_updateEdgeAligned, &IfxGtm_Atom_Dtm_PwmHl_updateAndShiftOff, &IfxGtm_Atom_Dtm_PwmHl_updatePulse },
{Ifx_Pwm_Mode_rightAligned, TRUE, &IfxGtm_Atom_Dtm_PwmHl_updateEdgeAligned, &IfxGtm_Atom_Dtm_PwmHl_updateAndShiftOff, &IfxGtm_Atom_Dtm_PwmHl_updatePulse },
{Ifx_Pwm_Mode_off, FALSE, &IfxGtm_Atom_Dtm_PwmHl_updateOff, &IfxGtm_Atom_Dtm_PwmHl_updateAndShiftOff, &IfxGtm_Atom_Dtm_PwmHl_updatePulseOff},
}
Ifx_Pwm_Mode_centerAligned
Center aligned mode.
Definition: Ifx_Types.h:177
IfxGtm_Atom_Dtm_PwmHl_updatePulse
IFX_STATIC void IfxGtm_Atom_Dtm_PwmHl_updatePulse(IfxGtm_AtomDtm_PwmHl *driver, float32 *tOn, float32 *offset)
Update Pulse.
Definition: IfxGtm_Atom_Dtm_PwmHl.c:563
IfxGtm_Atom_Dtm_PwmHl_updateEdgeAligned
IFX_STATIC void IfxGtm_Atom_Dtm_PwmHl_updateEdgeAligned(IfxGtm_AtomDtm_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in edge aligned modes (left and right aligned)
Definition: IfxGtm_Atom_Dtm_PwmHl.c:482
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxGtm_Atom_Dtm_PwmHl_updateAndShiftOff
IFX_STATIC void IfxGtm_Atom_Dtm_PwmHl_updateAndShiftOff(IfxGtm_AtomDtm_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets switched to OFF.
Definition: IfxGtm_Atom_Dtm_PwmHl.c:431
Ifx_Pwm_Mode_leftAligned
Left aligned mode. The PWM period starts with a rising edge.
Definition: Ifx_Types.h:179
Ifx_Pwm_Mode_off
All switch open.
Definition: Ifx_Types.h:181
IfxGtm_Atom_Dtm_PwmHl_updatePulseOff
IFX_STATIC void IfxGtm_Atom_Dtm_PwmHl_updatePulseOff(IfxGtm_AtomDtm_PwmHl *driver, float32 *tOn, float32 *offset)
Set Pulse to OFF.
Definition: IfxGtm_Atom_Dtm_PwmHl.c:623
Ifx_Pwm_Mode_centerAlignedInverted
Center aligned inverted aligned mode.
Definition: Ifx_Types.h:178
Ifx_Pwm_Mode_rightAligned
Right aligned mode. The PWM period starts with a falling edge.
Definition: Ifx_Types.h:180
IfxGtm_Atom_Dtm_PwmHl_updateOff
IFX_STATIC void IfxGtm_Atom_Dtm_PwmHl_updateOff(IfxGtm_AtomDtm_PwmHl *driver, Ifx_TimerValue *tOn)
Set the outputs to inactive.
Definition: IfxGtm_Atom_Dtm_PwmHl.c:548
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxGtm_Atom_Dtm_PwmHl_updateShiftCenterAligned
IFX_STATIC void IfxGtm_Atom_Dtm_PwmHl_updateShiftCenterAligned(IfxGtm_AtomDtm_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Update Shift Center Aligned.
Definition: IfxGtm_Atom_Dtm_PwmHl.c:632
IfxGtm_Atom_Dtm_PwmHl_updateCenterAligned
IFX_STATIC void IfxGtm_Atom_Dtm_PwmHl_updateCenterAligned(IfxGtm_AtomDtm_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in center aligned and center aligned inverted modes.
Definition: IfxGtm_Atom_Dtm_PwmHl.c:439

Definition at line 131 of file IfxGtm_Atom_Dtm_PwmHl.c.

Referenced by IfxGtm_Atom_Dtm_PwmHl_setMode().


iLLD_TC38A: IfxGtm_Atom_Pwm.c File Reference

  • Gtm
  • Atom
  • Pwm
Functions
IfxGtm_Atom_Pwm.c File Reference

GTM PWM details. More...

#include "IfxGtm_Atom_Pwm.h"
Include dependency graph for IfxGtm_Atom_Pwm.c:

Go to the source code of this file.

Functions

boolean | IfxGtm_Atom_Pwm_init (IfxGtm_Atom_Pwm_Driver *driver, const IfxGtm_Atom_Pwm_Config *config)
Initialises the Timer object. More...
void | IfxGtm_Atom_Pwm_initConfig (IfxGtm_Atom_Pwm_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default. More...
void | IfxGtm_Atom_Pwm_start (IfxGtm_Atom_Pwm_Driver *driver, boolean immediate)
Starts the PWM generation from the configured channel. More...
void | IfxGtm_Atom_Pwm_stop (IfxGtm_Atom_Pwm_Driver *driver, boolean immediate)
Stops the PWM generation from the configured channel. More...

Detailed Description

GTM PWM details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Atom_Pwm.c.


iLLD_TC38A: IfxGtm_Atom_PwmHl.c File Reference

  • Gtm
  • Atom
  • PwmHl
Functions | Variables
IfxGtm_Atom_PwmHl.c File Reference

GTM PWMHL details. More...

#include "IfxGtm_Atom_PwmHl.h"
#include "_Utilities/Ifx_Assert.h"
#include "stddef.h"
#include "string.h"
Include dependency graph for IfxGtm_Atom_PwmHl.c:

Go to the source code of this file.

Functions

IFX_INLINE Ifx_ActiveState | IfxGtm_Atom_PwmHl_invertActiveState (Ifx_ActiveState activeState)
Inverts the active state. More...
IFX_STATIC void | IfxGtm_Atom_PwmHl_updateAndShiftOff (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets switched to OFF. More...
IFX_STATIC void | IfxGtm_Atom_PwmHl_updateCenterAligned (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in center aligned and center aligned inverted modes. More...
IFX_STATIC void | IfxGtm_Atom_PwmHl_updateEdgeAligned (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in edge aligned modes (left and right aligned) More...
IFX_STATIC void | IfxGtm_Atom_PwmHl_updateOff (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Set the outputs to inactive. More...
IFX_STATIC void | IfxGtm_Atom_PwmHl_updatePulse (IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
Update Pulse. More...
IFX_STATIC void | IfxGtm_Atom_PwmHl_updatePulseOff (IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
Set Pulse to OFF. More...
IFX_STATIC void | IfxGtm_Atom_PwmHl_updateShiftCenterAligned (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Update Shift Center Aligned. More...
float32 | IfxGtm_Atom_PwmHl_getDeadtime (IfxGtm_Atom_PwmHl *driver)
Returns the dead time. More...
float32 | IfxGtm_Atom_PwmHl_getMinPulse (IfxGtm_Atom_PwmHl *driver)
Returns the minimum pulse. More...
Ifx_Pwm_Mode | IfxGtm_Atom_PwmHl_getMode (IfxGtm_Atom_PwmHl *driver)
Returns Pwm mode. More...
boolean | IfxGtm_Atom_PwmHl_init (IfxGtm_Atom_PwmHl *driver, const IfxGtm_Atom_PwmHl_Config *config)
Initializes the timer object note To ensure that the channels counter are reset by the timer and do not overflow, leading to random signal on the output, the timer must be started before the call to this function. More...
void | IfxGtm_Atom_PwmHl_initConfig (IfxGtm_Atom_PwmHl_Config *config)
Initialize the configuration structure to default. More...
boolean | IfxGtm_Atom_PwmHl_setDeadtime (IfxGtm_Atom_PwmHl *driver, float32 deadtime)
Sets the dead time. More...
boolean | IfxGtm_Atom_PwmHl_setMinPulse (IfxGtm_Atom_PwmHl *driver, float32 minPulse)
Sets the minimum pulse. More...
boolean | IfxGtm_Atom_PwmHl_setMode (IfxGtm_Atom_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate() More...
void | IfxGtm_Atom_PwmHl_setOnTime (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Sets the ON time. More...
void | IfxGtm_Atom_PwmHl_setOnTimeAndShift (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets the ON time and Shift. More...
void | IfxGtm_Atom_PwmHl_setPulse (IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
Sets the ON time and offset, all switched are independent. More...
void | IfxGtm_Atom_PwmHl_setupChannels (IfxGtm_Atom_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set up channels. More...
boolean | IfxGtm_Atom_PwmHl_stdIfPwmHlInit (IfxStdIf_PwmHl *stdif, IfxGtm_Atom_PwmHl *driver)
Initialises the statndard interface Pwm. More...

Variables

IFX_STATIC IFX_CONST IfxGtm_Atom_PwmHl_Mode IfxGtm_Atom_PwmHl_modes [Ifx_Pwm_Mode_off+1]

Detailed Description

GTM PWMHL details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Atom_PwmHl.c.

Variable Documentation

◆ IfxGtm_Atom_PwmHl_modes

IFX_STATIC IFX_CONST IfxGtm_Atom_PwmHl_Mode IfxGtm_Atom_PwmHl_modes[Ifx_Pwm_Mode_off+1]
Initial value:
= {
{Ifx_Pwm_Mode_centerAligned, FALSE, &IfxGtm_Atom_PwmHl_updateCenterAligned, &IfxGtm_Atom_PwmHl_updateShiftCenterAligned, &IfxGtm_Atom_PwmHl_updatePulse },
{Ifx_Pwm_Mode_centerAlignedInverted, TRUE, &IfxGtm_Atom_PwmHl_updateCenterAligned, &IfxGtm_Atom_PwmHl_updateShiftCenterAligned, &IfxGtm_Atom_PwmHl_updatePulse },
{Ifx_Pwm_Mode_leftAligned, FALSE, &IfxGtm_Atom_PwmHl_updateEdgeAligned, &IfxGtm_Atom_PwmHl_updateAndShiftOff, &IfxGtm_Atom_PwmHl_updatePulse },
{Ifx_Pwm_Mode_rightAligned, TRUE, &IfxGtm_Atom_PwmHl_updateEdgeAligned, &IfxGtm_Atom_PwmHl_updateAndShiftOff, &IfxGtm_Atom_PwmHl_updatePulse },
{Ifx_Pwm_Mode_off, FALSE, &IfxGtm_Atom_PwmHl_updateOff, &IfxGtm_Atom_PwmHl_updateAndShiftOff, &IfxGtm_Atom_PwmHl_updatePulseOff},
}
IfxGtm_Atom_PwmHl_updateAndShiftOff
IFX_STATIC void IfxGtm_Atom_PwmHl_updateAndShiftOff(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets switched to OFF.
Definition: IfxGtm_Atom_PwmHl.c:414
IfxGtm_Atom_PwmHl_updateShiftCenterAligned
IFX_STATIC void IfxGtm_Atom_PwmHl_updateShiftCenterAligned(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Update Shift Center Aligned.
Definition: IfxGtm_Atom_PwmHl.c:674
Ifx_Pwm_Mode_centerAligned
Center aligned mode.
Definition: Ifx_Types.h:177
IfxGtm_Atom_PwmHl_updateEdgeAligned
IFX_STATIC void IfxGtm_Atom_PwmHl_updateEdgeAligned(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in edge aligned modes (left and right aligned)
Definition: IfxGtm_Atom_PwmHl.c:482
FALSE
#define FALSE
Definition: Platform_Types.h:93
Ifx_Pwm_Mode_leftAligned
Left aligned mode. The PWM period starts with a rising edge.
Definition: Ifx_Types.h:179
Ifx_Pwm_Mode_off
All switch open.
Definition: Ifx_Types.h:181
Ifx_Pwm_Mode_centerAlignedInverted
Center aligned inverted aligned mode.
Definition: Ifx_Types.h:178
IfxGtm_Atom_PwmHl_updateCenterAligned
IFX_STATIC void IfxGtm_Atom_PwmHl_updateCenterAligned(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in center aligned and center aligned inverted modes.
Definition: IfxGtm_Atom_PwmHl.c:422
Ifx_Pwm_Mode_rightAligned
Right aligned mode. The PWM period starts with a falling edge.
Definition: Ifx_Types.h:180
IfxGtm_Atom_PwmHl_updatePulse
IFX_STATIC void IfxGtm_Atom_PwmHl_updatePulse(IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
Update Pulse.
Definition: IfxGtm_Atom_PwmHl.c:558
IfxGtm_Atom_PwmHl_updatePulseOff
IFX_STATIC void IfxGtm_Atom_PwmHl_updatePulseOff(IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
Set Pulse to OFF.
Definition: IfxGtm_Atom_PwmHl.c:665
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxGtm_Atom_PwmHl_updateOff
IFX_STATIC void IfxGtm_Atom_PwmHl_updateOff(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Set the outputs to inactive.
Definition: IfxGtm_Atom_PwmHl.c:542

Definition at line 126 of file IfxGtm_Atom_PwmHl.c.

Referenced by IfxGtm_Atom_PwmHl_setMode().


iLLD_TC38A: IfxGtm_Atom_Timer.c File Reference

  • Gtm
  • Atom
  • Timer
Functions
IfxGtm_Atom_Timer.c File Reference

GTM TIMER details. More...

#include "IfxGtm_Atom_Timer.h"
#include "_Utilities/Ifx_Assert.h"
#include "IfxGtm_bf.h"
#include "stddef.h"
#include "string.h"
Include dependency graph for IfxGtm_Atom_Timer.c:

Go to the source code of this file.

Functions

boolean | IfxGtm_Atom_Timer_acknowledgeTimerIrq (IfxGtm_Atom_Timer *driver)
Returns the timer event. More...
boolean | IfxGtm_Atom_Timer_acknowledgeTriggerIrq (IfxGtm_Atom_Timer *driver)
Returns the trigger event. More...
void | IfxGtm_Atom_Timer_addToChannelMask (IfxGtm_Atom_Timer *driver, IfxGtm_Atom_Ch channel)
Add a channel to the channel mask Channels present in the mask are started, stopped, updated at the same time as the timer: IfxGtm_Atom_Timer_applyUpdate, IfxGtm_Atom_Timer_disableUpdate, IfxGtm_Atom_Timer_stop, IfxGtm_Atom_Timer_run. More...
void | IfxGtm_Atom_Timer_applyUpdate (IfxGtm_Atom_Timer *driver)
Enables the transfer of the shadow registers. More...
void | IfxGtm_Atom_Timer_disableUpdate (IfxGtm_Atom_Timer *driver)
Disables the upadte. More...
float32 | IfxGtm_Atom_Timer_getFrequency (IfxGtm_Atom_Timer *driver)
Returns the frequency. More...
float32 | IfxGtm_Atom_Timer_getInputFrequency (IfxGtm_Atom_Timer *driver)
Returns the Input frequncy. More...
Ifx_TimerValue | IfxGtm_Atom_Timer_getOffset (IfxGtm_Atom_Timer *driver)
Returns the initial timer offset in ticks. More...
Ifx_TimerValue | IfxGtm_Atom_Timer_getPeriod (IfxGtm_Atom_Timer *driver)
Returns the period of the timer. More...
volatile uint32 * | IfxGtm_Atom_Timer_getPointer (IfxGtm_Atom_Timer *driver)
Returns the pointer to timer channel. More...
float32 | IfxGtm_Atom_Timer_getResolution (IfxGtm_Atom_Timer *driver)
Returns the resolution. More...
Ifx_TimerValue | IfxGtm_Atom_Timer_getTrigger (IfxGtm_Atom_Timer *driver)
Returns the trigger point. More...
volatile uint32 * | IfxGtm_Atom_Timer_getTriggerPointer (IfxGtm_Atom_Timer *driver)
Returns the pointer to trigger channel. More...
boolean | IfxGtm_Atom_Timer_init (IfxGtm_Atom_Timer *driver, const IfxGtm_Atom_Timer_Config *config)
Initialises the timer object. More...
void | IfxGtm_Atom_Timer_initConfig (IfxGtm_Atom_Timer_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default. More...
void | IfxGtm_Atom_Timer_run (IfxGtm_Atom_Timer *driver)
Runs the timer. More...
boolean | IfxGtm_Atom_Timer_setFrequency (IfxGtm_Atom_Timer *driver, float32 frequency)
Sets the frequency. More...
boolean | IfxGtm_Atom_Timer_setPeriod (IfxGtm_Atom_Timer *driver, Ifx_TimerValue period)
Sets the period for the timer. More...
void | IfxGtm_Atom_Timer_setSingleMode (IfxGtm_Atom_Timer *driver, boolean enabled)
Sets the single shot mode of the timer. More...
void | IfxGtm_Atom_Timer_setTrigger (IfxGtm_Atom_Timer *driver, Ifx_TimerValue triggerPoint)
Sets the trigger. More...
boolean | IfxGtm_Atom_Timer_stdIfTimerInit (IfxStdIf_Timer *stdif, IfxGtm_Atom_Timer *driver)
Initializes the standard interface timer. More...
void | IfxGtm_Atom_Timer_stop (IfxGtm_Atom_Timer *driver)
Stops the timer. More...
void | IfxGtm_Atom_Timer_updateInputFrequency (IfxGtm_Atom_Timer *driver)
Updates the input frequency. More...

Detailed Description

GTM TIMER details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Atom_Timer.c.


iLLD_TC38A: IfxGtm_cfg.c File Reference

  • _Impl
Variables
IfxGtm_cfg.c File Reference

GTM on-chip implementation data. More...

#include "IfxGtm_cfg.h"
Include dependency graph for IfxGtm_cfg.c:

Go to the source code of this file.

Variables

IFX_CONST IfxGtm_Cdtm IfxGtm_dtmAtom_map [IFXGTM_NUM_ATOM_OBJECTS]
IFX_CONST IfxGtm_Cdtm IfxGtm_dtmTom_map [IFXGTM_NUM_TOM_OBJECTS]
IFX_CONST IfxModule_IndexMap IfxGtm_spe_indexMap [IFXGTM_NUM_SPE_OBJECTS]

Detailed Description

GTM on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_cfg.c.

Variable Documentation

◆ IfxGtm_dtmAtom_map

IFX_CONST IfxGtm_Cdtm IfxGtm_dtmAtom_map[IFXGTM_NUM_ATOM_OBJECTS]
Initial value:
= {
IfxGtm_Cdtm_0,
IfxGtm_Cdtm_1,
IfxGtm_Cdtm_2,
IfxGtm_Cdtm_3,
IfxGtm_Cdtm_4,
IfxGtm_Cdtm_5,
IfxGtm_Cdtm_none,
IfxGtm_Cdtm_none,
IfxGtm_Cdtm_none,
}
IfxGtm_Cdtm_1
DTM object 1.
Definition: IfxGtm_cfg.h:277
IfxGtm_Cdtm_4
DTM object 4.
Definition: IfxGtm_cfg.h:280
IfxGtm_Cdtm_2
DTM object 2.
Definition: IfxGtm_cfg.h:278
IfxGtm_Cdtm_0
DTM object 0.
Definition: IfxGtm_cfg.h:276
IfxGtm_Cdtm_5
DTM object 5.
Definition: IfxGtm_cfg.h:281
IfxGtm_Cdtm_3
DTM object 3.
Definition: IfxGtm_cfg.h:279
IfxGtm_Cdtm_none
No DTM object.
Definition: IfxGtm_cfg.h:275

Definition at line 52 of file IfxGtm_cfg.c.

Referenced by IfxGtm_Dtm_getCdtmIndex(), and IfxGtm_Dtm_getDtmIndex().

◆ IfxGtm_dtmTom_map

IFX_CONST IfxGtm_Cdtm IfxGtm_dtmTom_map[IFXGTM_NUM_TOM_OBJECTS]
Initial value:
= {
IfxGtm_Cdtm_0,
IfxGtm_Cdtm_1,
IfxGtm_Cdtm_2,
IfxGtm_Cdtm_3,
IfxGtm_Cdtm_none,
}
IfxGtm_Cdtm_1
DTM object 1.
Definition: IfxGtm_cfg.h:277
IfxGtm_Cdtm_2
DTM object 2.
Definition: IfxGtm_cfg.h:278
IfxGtm_Cdtm_0
DTM object 0.
Definition: IfxGtm_cfg.h:276
IfxGtm_Cdtm_3
DTM object 3.
Definition: IfxGtm_cfg.h:279
IfxGtm_Cdtm_none
No DTM object.
Definition: IfxGtm_cfg.h:275

Definition at line 64 of file IfxGtm_cfg.c.

◆ IfxGtm_spe_indexMap

IFX_CONST IfxModule_IndexMap IfxGtm_spe_indexMap[IFXGTM_NUM_SPE_OBJECTS]
Initial value:
= {
{&(MODULE_GTM.SPE[0]), (uint32)IfxGtm_Spe_0},
{&(MODULE_GTM.SPE[1]), (uint32)IfxGtm_Spe_1},
{&(MODULE_GTM.SPE[2]), (uint32)IfxGtm_Spe_2},
{&(MODULE_GTM.SPE[3]), (uint32)IfxGtm_Spe_3},
}
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxGtm_Spe_0
SPE 0.
Definition: IfxGtm_cfg.h:346
IfxGtm_Spe_1
SPE 1.
Definition: IfxGtm_cfg.h:347
IfxGtm_Spe_2
SPE 2.
Definition: IfxGtm_cfg.h:348
IfxGtm_Spe_3
SPE 3.
Definition: IfxGtm_cfg.h:349

Definition at line 72 of file IfxGtm_cfg.c.


iLLD_TC38A: IfxGtm_Cmu.c File Reference

  • Gtm
  • Std
Functions
IfxGtm_Cmu.c File Reference

GTM basic functionality. More...

#include "IfxGtm_Cmu.h"
#include "IfxGtm_Dpll.h"
#include "Scu/Std/IfxScuCcu.h"
#include "Scu/Std/IfxScuWdt.h"
#include "math.h"
#include "IfxGtm_bf.h"
#include "IfxGtm.h"
Include dependency graph for IfxGtm_Cmu.c:

Go to the source code of this file.

Functions

void | IfxGtm_Cmu_enableClocks (Ifx_GTM *gtm, uint32 clkMask)
Enable / Disable the configurable, fixed, and external clocks. More...
float32 | IfxGtm_Cmu_getClkFrequency (Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean assumeEnabled)
Returns the GTM configurable clock frequency in Hz. More...
float32 | IfxGtm_Cmu_getEclkFrequency (Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex, boolean assumeEnabled)
Returns the GTM external clock frequency in Hz. More...
float32 | IfxGtm_Cmu_getFxClkFrequency (Ifx_GTM *gtm, IfxGtm_Cmu_Fxclk clkIndex, boolean assumeEnabled)
Returns the GTM fixed clock frequency in Hz. More...
float32 | IfxGtm_Cmu_getGclkFrequency (Ifx_GTM *gtm)
Returns the GTM global clock frequency in Hz. More...
float32 | IfxGtm_Cmu_getModuleFrequency (Ifx_GTM *gtm)
returns the CMU module frequency in Hz. This is only for CMU module frequency. For GTM SYS frequency: IfxGtm_getSysClkFrequency() is to be used. More...
boolean | IfxGtm_Cmu_isClkClockEnabled (Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex)
Returns the configurable clock enable status. More...
boolean | IfxGtm_Cmu_isEclkClockEnabled (Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex)
Returns the external clock enable status. More...
boolean | IfxGtm_Cmu_isFxClockEnabled (Ifx_GTM *gtm)
Returns the fixed clock enable status. More...
void | IfxGtm_Cmu_selectClkInput (Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean useGlobal)
Select the clock input for CLK6 and CLK7 note The frequency can only be modified when the corresponding clock is disabled using IfxGtm_Cmu_enableClocks() More...
void | IfxGtm_Cmu_setClkFrequency (Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, float32 frequency)
Set the GTM configurable clock frequency in Hz. More...
void | IfxGtm_Cmu_setEclkFrequency (Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex, float32 frequency)
Set the GTM external clock frequency in Hz. More...
void | IfxGtm_Cmu_setGclkFrequency (Ifx_GTM *gtm, float32 frequency)
Set the GTM global clock frequency in Hz. More...

Detailed Description

GTM basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Cmu.c.


iLLD_TC38A: IfxGtm_Dpll.c File Reference

  • Gtm
  • Std
Functions
IfxGtm_Dpll.c File Reference

GTM basic functionality. More...

#include "IfxGtm_Dpll.h"
Include dependency graph for IfxGtm_Dpll.c:

Go to the source code of this file.

Functions

float32 IfxGtm_Dpll_getSubIncFrequency (Ifx_GTM *gtm, IfxGtm_Dpll_SubInc index)
Dummy Function, returns 0.0F. More...

Detailed Description

GTM basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Dpll.c.


iLLD_TC38A: IfxGtm_Dtm.c File Reference

  • Gtm
  • Std
Functions
IfxGtm_Dtm.c File Reference

GTM basic functionality. More...

#include "IfxGtm_Dtm.h"
Include dependency graph for IfxGtm_Dtm.c:

Go to the source code of this file.

Functions

Ifx_GTM_CDTM_DTM * | IfxGtm_Dtm_getDtmPointer (Ifx_GTM *gtm, IfxGtm_Cdtm cdtmIndex, IfxGtm_Dtm dtmIndex)
returns the base address of selected DTM instance More...
float32 | IfxGtm_Dtm_getClockFrequency (Ifx_GTM *gtm, IfxGtm_Cdtm cdtmIndex, IfxGtm_Dtm dtmIndex)
Returns the clock frequency in Hz of the DTM. More...

Detailed Description

GTM basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Dtm.c.

Function Documentation

◆ IfxGtm_Dtm_getClockFrequency()

float32 IfxGtm_Dtm_getClockFrequency | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Cdtm | cdtmIndex,
 |  | IfxGtm_Dtm | dtmIndex
 | ) |  |

Returns the clock frequency in Hz of the DTM.

Parameters
gtm | pointer to GTM register base
cdtmIndex | CDTM index
dtmIndex | DTM index
Returns
DTM input clock frequency in Hz

Definition at line 69 of file IfxGtm_Dtm.c.

Referenced by IfxGtm_Atom_Dtm_PwmHl_init(), and IfxGtm_Tom_Dtm_PwmHl_init().

◆ IfxGtm_Dtm_getDtmPointer()

Ifx_GTM_CDTM_DTM* IfxGtm_Dtm_getDtmPointer | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Cdtm | cdtmIndex,
 |  | IfxGtm_Dtm | dtmIndex
 | ) |  |

returns the base address of selected DTM instance

Parameters
gtm | pointer to GTM register base
cdtmIndex | CDTM index
dtmIndex | DTM index
Returns
Base address of DTM

Definition at line 52 of file IfxGtm_Dtm.c.

Referenced by IfxGtm_Atom_Dtm_PwmHl_init(), IfxGtm_Dtm_getClockFrequency(), and IfxGtm_Tom_Dtm_PwmHl_init().


iLLD_TC38A: IfxGtm_Psm.c File Reference

  • Gtm
  • Std
Functions
IfxGtm_Psm.c File Reference

GTM basic functionality. More...

#include "IfxGtm_Psm.h"
Include dependency graph for IfxGtm_Psm.c:

Go to the source code of this file.

Functions

void | IfxGtm_Psm_Fifo_setChannelEndAddress (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, uint32 address)
Set the logical end address for the specified Fifo Channel. The address range is 0 - (IFXGTM_PSM_FIFORAMSIZE - 1). END address should be in range: START address<address<IFXGTM_PSM_FIFORAMSIZE. More...
void | IfxGtm_Psm_Fifo_setChannelStartAddress (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, uint32 address)
Set the logical start address for the specified Fifo Channel. The address range is 0 - (IFXGTM_PSM_FIFORAMSIZE - 1). START address should be in range: 0<address<IFXGTM_PSM_FIFORAMSIZE. More...
void | IfxGtm_Psm_Fifo_setChannelSize (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, uint32 size)
set the RAM size of the specified FIFO channel. The RAM size should be in range: 0 - ((IFXGTM_PSM_FIFORAMSIZE - START address) + 1) Caution: This will modify the END address of the Fifo Channel RAM. This will also flush the FIFO as the END address gets modified. More...
void | IfxGtm_Psm_Fifo_setChannelUpperWatermark (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, uint32 upperWm)
set the upper watermark of the specified Fifo Channel. Upper watermark must be in range: 0 < addr < (END_ADDRESS - START_ADDRESS) More...
void | IfxGtm_Psm_Fifo_setChannelLowerWatermark (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, uint32 lowerWm)
set the upper watermark of the specified Fifo Channel. Upper watermark must be in range: 0 < addr < (END_ADDRESS - START_ADDRESS) More...
IfxGtm_Psm_FifoChannelStatus | IfxGtm_Psm_Fifo_getChannelStatus (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
get the Status of the Fifo Channel. Returns either Full, Empty, Upper WM or Lower WM reached status. If none of the above, it will return "normal" status. More...
void | IfxGtm_Psm_Fifo_enableChannelInterrupt (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, IfxGtm_Psm_FifoChannelInterrupt interrupt)
enable the interrupt type More...
void | IfxGtm_Psm_Fifo_disableChannelInterrupt (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, IfxGtm_Psm_FifoChannelInterrupt interrupt)
disable the interrupt for Fifo Channel More...
void | IfxGtm_Psm_Fifo_setChannelInterrupt (IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, IfxGtm_Psm_FifoChannelInterrupt interrupt)
forces the Interrupt from Fifo Channel More...
void | IfxGtm_Psm_F2a_enableStream (IfxGtm_Psm_F2a f2a, IfxGtm_Psm_F2aStream f2aStream)
enable the selected stream of the F2A. More...
void | IfxGtm_Psm_F2a_disableStream (IfxGtm_Psm_F2a f2a, IfxGtm_Psm_F2aStream f2aStream)
disables the specified stream of the F2A More...
IfxGtm_Psm_F2aStreamState | IfxGtm_Psm_F2a_getStreamState (IfxGtm_Psm_F2a f2a, IfxGtm_Psm_F2aStream f2aStream)
get the state of the specified fifo stream. More...

Detailed Description

GTM basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Psm.c.


iLLD_TC38A: IfxGtm_Spe.c File Reference

  • Gtm
  • Std
Functions
IfxGtm_Spe.c File Reference

GTM basic functionality. More...

#include "IfxGtm_Spe.h"
Include dependency graph for IfxGtm_Spe.c:

Go to the source code of this file.

Functions

void | IfxGtm_Spe_disableInterrupt (Ifx_GTM_SPE *spe, IfxGtm_Spe_InterruptSignal interrupt)
disables the SPE interrupt of specified type. More...
void | IfxGtm_Spe_enableErrorInterrupt (Ifx_GTM_SPE *spe, IfxGtm_Spe_InterruptSignal interrupt, boolean enabled)
enables the error interrupt of the specified type. More...
void | IfxGtm_Spe_enableInput (Ifx_GTM_SPE *spe, IfxGtm_Spe_InputSignal inputSignal, boolean enabled)
enables/disables the input to sPE from the selected input signal source. More...
void | IfxGtm_Spe_enableInterrupt (Ifx_GTM_SPE *spe, IfxGtm_Spe_InterruptSignal interrupt)
enables the SPE interrupt of specified type. More...
uint32 | IfxGtm_Spe_getFastShutoffLevel (Ifx_GTM_SPE *spe, IfxGtm_Spe_OutChannel channel)
return fast shutoff level. More...
boolean | IfxGtm_Spe_getInterruptStatus (Ifx_GTM_SPE *spe, IfxGtm_Spe_InterruptSignal interrupt)
returns the interrupt status of specified interrupt signal More...
uint32 | IfxGtm_Spe_getRevCompare (Ifx_GTM_SPE *spe)
returns the step counter compare value as a 32 bit word. More...
void | IfxGtm_Spe_selectTrigger (Ifx_GTM_SPE *spe, IfxGtm_Spe_TriggerSource trigger)
selects the source which will trigger the spe control output.a More...
void | IfxGtm_Spe_setAllInputPatterns (Ifx_GTM_SPE *spe, IfxGtm_Spe_InputPattern *patPtr)
sets all the specified input patterns into the SPE_PAT register More...
void | IfxGtm_Spe_setInputPattern (Ifx_GTM_SPE *spe, IfxGtm_Spe_InputPattern *patPtr, IfxGtm_Spe_PatternIndex patIndex)
writes SPE[i]_PAT with the individual pattern specified according to the pattern index. More...
void | IfxGtm_Spe_setInterrupt (Ifx_GTM_SPE *spe, IfxGtm_Spe_InterruptSignal interrupt)
forces the interrupt of specified type by software More...
void | IfxGtm_Spe_setOutputPattern (Ifx_GTM_SPE *spe, IfxGtm_Spe_OutputPattern *patPtr, IfxGtm_Spe_PatternIndex patIndex)
sets the output pattern from pointer to the corresponding SPE_OUT_PAT register specified by the index. More...
void | IfxGtm_Spe_setRevCompare (Ifx_GTM_SPE *spe, uint32 count)
sets the step compare count to the specified value. More...

Detailed Description

GTM basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Spe.c.


iLLD_TC38A: IfxGtm_Tbu.c File Reference

  • Gtm
  • Std
Functions
IfxGtm_Tbu.c File Reference

GTM basic functionality. More...

#include "IfxGtm_Tbu.h"
#include "IfxGtm_Cmu.h"
Include dependency graph for IfxGtm_Tbu.c:

Go to the source code of this file.

Functions

float32 IfxGtm_Tbu_getClockFrequency (Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel)
Returns the clock frequency. More...

Detailed Description

GTM basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Tbu.c.


iLLD_TC38A: IfxGtm_Tim.c File Reference

  • Gtm
  • Std
Functions
IfxGtm_Tim.c File Reference

GTM basic functionality. More...

#include "IfxGtm_Tim.h"
Include dependency graph for IfxGtm_Tim.c:

Go to the source code of this file.

Functions

float32 | IfxGtm_Tim_Ch_getCaptureClockFrequency (Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Capture Clock Frequency. More...
IfxGtm_Cmu_Clk | IfxGtm_Tim_Ch_getCaptureClockSource (Ifx_GTM_TIM_CH *channel)
Returns the capture clock source selected. More...
float32 | IfxGtm_Tim_Ch_getFilterClockFrequency (Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Filter Clock Frequency. More...
IfxGtm_Cmu_Tim_Filter_Clk | IfxGtm_Tim_Ch_getFilterClockSource (Ifx_GTM_TIM_CH *channel)
Returns the Filter clock source selected. More...
float32 | IfxGtm_Tim_Ch_getTimeoutClockFrequency (Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Timeout Clock Frequency. More...
IfxGtm_Cmu_Clk | IfxGtm_Tim_Ch_getTimeoutClockSource (Ifx_GTM_TIM_CH *channel)
Returns the Timeout clock source selected. More...
void | IfxGtm_Tim_Ch_setChannelNotification (Ifx_GTM_TIM_CH *channel, boolean irqOnNewVal, boolean irqOnCntOverflow, boolean irqOnEcntOverflow, boolean irqOnDatalost)
Set the channel notification. More...
void | IfxGtm_Tim_Ch_setClockSource (Ifx_GTM_TIM_CH *channel, IfxGtm_Cmu_Clk clock)
Set the channel clock source. More...
void | IfxGtm_Tim_Ch_setControl (Ifx_GTM_TIM_CH *channel, IfxGtm_Tim_ChannelControl control)
This function configures the TIM channel Control register. More...
void | IfxGtm_Tim_Ch_setFilterNotification (Ifx_GTM_TIM_CH *channel, boolean irqOnGlitch)
Set the filter notification. More...
void | IfxGtm_Tim_Ch_setNotificationMode (Ifx_GTM_TIM_CH *channel, IfxGtm_IrqMode mode)
This function configures the TIM channel IRQ mode. More...
void | IfxGtm_Tim_Ch_setTimeoutNotification (Ifx_GTM_TIM_CH *channel, boolean irqOnTimeout)
Set the timeout notification. More...

Detailed Description

GTM basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Tim.c.


iLLD_TC38A: IfxGtm_Tim_In.c File Reference

  • Gtm
  • Tim
  • In
Functions
IfxGtm_Tim_In.c File Reference

GTM IN details. More...

#include "IfxGtm_Tim_In.h"
#include "IfxGtm_bf.h"
#include "string.h"
Include dependency graph for IfxGtm_Tim_In.c:

Go to the source code of this file.

Functions

boolean | IfxGtm_Tim_In_init (IfxGtm_Tim_In *driver, const IfxGtm_Tim_In_Config *config)
Initializes the input capture object. More...
void | IfxGtm_Tim_In_initConfig (IfxGtm_Tim_In_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default. More...
void | IfxGtm_Tim_In_onIsr (IfxGtm_Tim_In *driver)
will update the driver state
To be called in the interrupt generated by the IfxGtm_Tim_In driver More...
void | IfxGtm_Tim_In_update (IfxGtm_Tim_In *driver)
Updates the period and duty cycle. More...

Detailed Description

GTM IN details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Tim_In.c.


iLLD_TC38A: IfxGtm_Tim_Timer.c File Reference

  • Gtm
  • Tim
  • Timer
Functions
IfxGtm_Tim_Timer.c File Reference

GTM TIMER details. More...

#include "IfxGtm_Tim_Timer.h"
#include "_Utilities/Ifx_Assert.h"
Include dependency graph for IfxGtm_Tim_Timer.c:

Go to the source code of this file.

Functions

void | IfxGtm_Tim_Timer_initChannel (IfxGtm_Tim_Timer *driver, IfxGtm_Tim_Timer_Config *config)
Initialises the TIM channel object. More...
void | IfxGtm_Tim_Timer_initChannelConfig (IfxGtm_Tim_Timer_Config *config, Ifx_GTM *gtm)
Initialise the config struct with default TIM channel configuration. More...

Detailed Description

GTM TIMER details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Tim_Timer.c.

Function Documentation

◆ IfxGtm_Tim_Timer_initChannel()

void IfxGtm_Tim_Timer_initChannel | ( | IfxGtm_Tim_Timer * | driver,
 |  | IfxGtm_Tim_Timer_Config * | config
 | ) |  |

Initialises the TIM channel object.

Parameters
driver | TOM Timer interface Handle
config | Configuration structure for TIM
Returns
None

Definition at line 53 of file IfxGtm_Tim_Timer.c.

◆ IfxGtm_Tim_Timer_initChannelConfig()

void IfxGtm_Tim_Timer_initChannelConfig | ( | IfxGtm_Tim_Timer_Config * | config,
 |  | Ifx_GTM * | gtm
 | ) |  |

Initialise the config struct with default TIM channel configuration.

Parameters
config | pointer to the TIM Channel configuration (it will be initialized by this function)
gtm | Pointer to GTM module
Returns
None

Definition at line 87 of file IfxGtm_Tim_Timer.c.


iLLD_TC38A: IfxGtm_Tom.c File Reference

  • Gtm
  • Std
Functions
IfxGtm_Tom.c File Reference

GTM basic functionality. More...

#include "IfxGtm_Tom.h"
#include "IfxGtm_bf.h"
#include "IfxGtm_Cmu.h"
Include dependency graph for IfxGtm_Tom.c:

Go to the source code of this file.

Functions

void | IfxGtm_Tom_Ch_clearOneNotification (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Clears the channel One notification. More...
void | IfxGtm_Tom_Ch_clearZeroNotification (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Clears the channel Zero notification. More...
float32 | IfxGtm_Tom_Ch_getClockFrequency (Ifx_GTM *gtm, Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the TOM channel input clock frequency in Hz. More...
IfxGtm_Tom_Ch_ClkSrc | IfxGtm_Tom_Ch_getClockSource (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the channel clock source. More...
uint32 | IfxGtm_Tom_Ch_getCompareOne (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare one value. More...
volatile uint32 * | IfxGtm_Tom_Ch_getCompareOnePointer (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare one pointer. More...
uint32 | IfxGtm_Tom_Ch_getCompareZero (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare zero value. More...
volatile uint32 * | IfxGtm_Tom_Ch_getCompareZeroPointer (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare zero pointer. More...
boolean | IfxGtm_Tom_Ch_getOutputLevel (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Gets the TOM output level. More...
volatile Ifx_SRC_SRCR * | IfxGtm_Tom_Ch_getSrcPointer (Ifx_GTM *gtm, IfxGtm_Tom tom, IfxGtm_Tom_Ch channel)
Returns a pointer to the TOM channel SRC. More...
Ifx_GTM_TOM_TGC * | IfxGtm_Tom_Ch_getTgcPointer (Ifx_GTM_TOM *tom, uint32 tgcIndex)
Returns the TGC pointer. More...
volatile uint32 * | IfxGtm_Tom_Ch_getTimerPointer (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the Timer pointer. More...
boolean | IfxGtm_Tom_Ch_isOneNotification (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the status of channel One notification. More...
boolean | IfxGtm_Tom_Ch_isZeroNotification (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the status of channel Zero notification. More...
void | IfxGtm_Tom_Ch_raiseInterruptOne (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Raises the interrupt for Compare 1. More...
void | IfxGtm_Tom_Ch_raiseInterruptZero (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Raises the interrupt for Compare 0. More...
void | IfxGtm_Tom_Ch_setClockSource (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ClkSrc clock)
Sets the channel clock source. More...
void | IfxGtm_Tom_Ch_setCompare (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareZero, uint32 compareOne)
Sets the compare 0 and 1 values. More...
void | IfxGtm_Tom_Ch_setCompareOne (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareOne)
Sets the compare 1 value. More...
void | IfxGtm_Tom_Ch_setCompareOneShadow (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowOne)
Sets the compare 1 shadow value. More...
void | IfxGtm_Tom_Ch_setCompareShadow (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero, uint32 shadowOne)
Sets the compare 0 and 1 shadow values. More...
void | IfxGtm_Tom_Ch_setCompareZero (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareZero)
Sets the compare 0 value. More...
void | IfxGtm_Tom_Ch_setCompareZeroShadow (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero)
Sets the compare 0 shadow value. More...
void | IfxGtm_Tom_Ch_setCounterValue (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 value)
Sets the counter value. More...
void | IfxGtm_Tom_Ch_setGatedCounter (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the gated counter mode (channel 0 to 7 only) More...
void | IfxGtm_Tom_Ch_setNotification (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne)
Sets the channel notification. More...
void | IfxGtm_Tom_Ch_setOneShotMode (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the one shot mode. More...
void | IfxGtm_Tom_Ch_setPcm (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the PCM mode (channel 15 only) More...
void | IfxGtm_Tom_Ch_setResetSource (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ResetEvent event)
Sets the channel clock source either from local or from previous channel. More...
void | IfxGtm_Tom_Ch_setSignalLevel (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, Ifx_ActiveState activeState)
Sets the signal level. More...
void | IfxGtm_Tom_Ch_setSpe (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the SPE mode (channel 0 to 7 only) More...
void | IfxGtm_Tom_Ch_setTriggerOutput (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_OutputTrigger trigger)
Sets the channel trigger output. More...
uint32 | IfxGtm_Tom_Tgc_buildFeature (uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable. More...
uint32 | IfxGtm_Tom_Tgc_buildFeatureForChannel (IfxGtm_Tom_Ch channel, boolean enabled, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable for a single channel. More...
void | IfxGtm_Tom_Tgc_enableChannel (Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel (ENDIS) More...
void | IfxGtm_Tom_Tgc_enableChannelOutput (Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel output (OUTEN) More...
void | IfxGtm_Tom_Tgc_enableChannelUpdate (Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable one channel for update (UPEN) More...
void | IfxGtm_Tom_Tgc_enableChannels (Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels (ENDIS) More...
void | IfxGtm_Tom_Tgc_enableChannelsOutput (Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels output (OUTEN) More...
void | IfxGtm_Tom_Tgc_enableChannelsTrigger (Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask)
Enable/disable the TGC channels trigger. More...
void | IfxGtm_Tom_Tgc_enableChannelsUpdate (Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask)
Enable/disable one or more channels for update (UPEN) More...
void | IfxGtm_Tom_Tgc_enableTimeTrigger (Ifx_GTM_TOM_TGC *tgc, boolean enabled)
Enable/disable the time base trigger. More...
void | IfxGtm_Tom_Tgc_resetChannels (Ifx_GTM_TOM_TGC *tgc, uint32 resetMask)
Reset one or more channels. More...
void | IfxGtm_Tom_Tgc_setChannelForceUpdate (Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean resetEnabled)
Enable/disable one channel for update (FUPD) More...
void | IfxGtm_Tom_Tgc_setChannelsForceUpdate (Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
Enable/disable one or more channels for the force update feature (FUPD) More...
void | IfxGtm_Tom_Tgc_setTimeTrigger (Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tbu_Ts base, uint32 value)
Sets the trigger time base and time base value. More...
void | IfxGtm_Tom_Tgc_trigger (Ifx_GTM_TOM_TGC *tgc)
Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG) More...

Detailed Description

GTM basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Tom.c.


iLLD_TC38A: IfxGtm_Tom_Dtm_PwmHl.c File Reference

  • Gtm
  • Tom
  • Dtm_PwmHl
Functions | Variables
IfxGtm_Tom_Dtm_PwmHl.c File Reference

GTM DTM_PWMHL details. More...

#include "IfxGtm_Tom_Dtm_PwmHl.h"
#include "_Utilities/Ifx_Assert.h"
#include "stddef.h"
#include "string.h"
Include dependency graph for IfxGtm_Tom_Dtm_PwmHl.c:

Go to the source code of this file.

Functions

IFX_INLINE void | IfxGtm_Tom_Dtm_PwmHl_setOnTime (IfxGtm_TomDtm_PwmHl *driver, Ifx_TimerValue *tOn)
Sets the ON time. More...
IFX_INLINE Ifx_ActiveState | IfxGtm_Tom_Dtm_PwmHl_invertActiveState (Ifx_ActiveState activeState)
Inverts the active state. More...
IFX_STATIC void | IfxGtm_Tom_Dtm_PwmHl_updateAndShiftOff (IfxGtm_TomDtm_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets switched to OFF. More...
IFX_STATIC void | IfxGtm_Tom_Dtm_PwmHl_updateCenterAligned (IfxGtm_TomDtm_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in center aligned and center aligned inverted modes. More...
IFX_STATIC void | IfxGtm_Tom_Dtm_PwmHl_updateEdgeAligned (IfxGtm_TomDtm_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in edge aligned modes (left and right aligned) More...
IFX_STATIC void | IfxGtm_Tom_Dtm_PwmHl_updateOff (IfxGtm_TomDtm_PwmHl *driver, Ifx_TimerValue *tOn)
Set the outputs to inactive. More...
IFX_STATIC void | IfxGtm_Tom_Dtm_PwmHl_updatePulse (IfxGtm_TomDtm_PwmHl *driver, float32 *tOn, float32 *offset)
Update Pulse. More...
IFX_STATIC void | IfxGtm_Tom_Dtm_PwmHl_updatePulseOff (IfxGtm_TomDtm_PwmHl *driver, float32 *tOn, float32 *offset)
Set Pulse to OFF. More...
IFX_STATIC void | IfxGtm_Tom_Dtm_PwmHl_updateShiftCenterAligned (IfxGtm_TomDtm_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Update Shift Center Aligned. More...
IFX_STATIC Ifx_TimerValue | IfxGtm_Tom_Dtm_PwmHl_getDeadtimeInTimerClockTicks (IfxGtm_TomDtm_PwmHl *driver)
boolean | IfxGtm_Tom_Dtm_PwmHl_init (IfxGtm_TomDtm_PwmHl *driver, const IfxGtm_Tom_Dtm_PwmHl_Config *config)
Initializes the timer object note : To ensure that the channels counter are reset by the timer and do not overflow, leading to random signal on the output, the timer must be started before the call to this function. More...
void | IfxGtm_Tom_Dtm_PwmHl_initConfig (IfxGtm_Tom_Dtm_PwmHl_Config *config)
Initialize the configuration structure to default. More...
float32 | IfxGtm_Tom_Dtm_PwmHl_getDeadtime (IfxGtm_TomDtm_PwmHl *driver)
Returns the dead time. More...
Ifx_TickTime | IfxGtm_Tom_Dtm_PwmHl_getDeadtimeTick (IfxGtm_TomDtm_PwmHl *driver)
float32 | IfxGtm_Tom_Dtm_PwmHl_getMinPulse (IfxGtm_TomDtm_PwmHl *driver)
Returns the minimum pulse. More...
Ifx_Pwm_Mode | IfxGtm_Tom_Dtm_PwmHl_getMode (IfxGtm_TomDtm_PwmHl *driver)
Returns Pwm mode. More...
boolean | IfxGtm_Tom_Dtm_PwmHl_setDeadtime (IfxGtm_TomDtm_PwmHl *driver, float32 deadtime)
Sets the dead time. More...
boolean | IfxGtm_Tom_Dtm_PwmHl_setMinPulse (IfxGtm_TomDtm_PwmHl *driver, float32 minPulse)
Sets the minimum pulse. More...
boolean | IfxGtm_Tom_Dtm_PwmHl_setMode (IfxGtm_TomDtm_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate() More...
void | IfxGtm_Tom_Dtm_PwmHl_setOnTimeAndShift (IfxGtm_TomDtm_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets the ON time and Shift. More...
void | IfxGtm_Tom_Dtm_PwmHl_setPulse (IfxGtm_TomDtm_PwmHl *driver, float32 *tOn, float32 *offset)
Sets the ON time and offset, all switched are independent. More...
void | IfxGtm_Tom_Dtm_PwmHl_setupChannels (IfxGtm_TomDtm_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set up channels. More...
boolean | IfxGtm_Tom_Dtm_PwmHl_stdIfPwmHlInit (IfxStdIf_PwmHl *stdif, IfxGtm_TomDtm_PwmHl *driver)
Initialises the statndard interface Pwm. More...

Variables

IFX_STATIC IFX_CONST IfxGtm_Tom_Dtm_PwmHl_Mode IfxGtm_Tom_Dtm_PwmHl_modes [Ifx_Pwm_Mode_off+1]

Detailed Description

GTM DTM_PWMHL details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Tom_Dtm_PwmHl.c.

Function Documentation

◆ IfxGtm_Tom_Dtm_PwmHl_getDeadtime()

float32 IfxGtm_Tom_Dtm_PwmHl_getDeadtime ( IfxGtm_TomDtm_PwmHl * driver )

Returns the dead time.

Parameters
driver driver GTM TOM PWM driver
Returns
Dead Time

Definition at line 285 of file IfxGtm_Tom_Dtm_PwmHl.c.

Referenced by IfxGtm_Tom_Dtm_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_Dtm_PwmHl_getDeadtimeInTimerClockTicks()

IFX_STATIC Ifx_TimerValue IfxGtm_Tom_Dtm_PwmHl_getDeadtimeInTimerClockTicks ( IfxGtm_TomDtm_PwmHl * driver )

Definition at line 699 of file IfxGtm_Tom_Dtm_PwmHl.c.

Referenced by IfxGtm_Tom_Dtm_PwmHl_getMinPulse(), and IfxGtm_Tom_Dtm_PwmHl_setMinPulse().

◆ IfxGtm_Tom_Dtm_PwmHl_getDeadtimeTick()

Ifx_TickTime IfxGtm_Tom_Dtm_PwmHl_getDeadtimeTick ( IfxGtm_TomDtm_PwmHl * driver )

Definition at line 291 of file IfxGtm_Tom_Dtm_PwmHl.c.

Referenced by IfxGtm_Tom_Dtm_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_Dtm_PwmHl_getMinPulse()

float32 IfxGtm_Tom_Dtm_PwmHl_getMinPulse ( IfxGtm_TomDtm_PwmHl * driver )

Returns the minimum pulse.

Parameters
driver driver GTM TOM PWM driver
Returns
Min Pulse

Definition at line 297 of file IfxGtm_Tom_Dtm_PwmHl.c.

Referenced by IfxGtm_Tom_Dtm_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_Dtm_PwmHl_getMode()

Ifx_Pwm_Mode IfxGtm_Tom_Dtm_PwmHl_getMode ( IfxGtm_TomDtm_PwmHl * driver )

Returns Pwm mode.

Parameters
driver driver GTM TOM PWM driver
Returns
Pwm mode

Definition at line 303 of file IfxGtm_Tom_Dtm_PwmHl.c.

Referenced by IfxGtm_Tom_Dtm_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_Dtm_PwmHl_init()

boolean IfxGtm_Tom_Dtm_PwmHl_init | ( | IfxGtm_TomDtm_PwmHl * | driver,
 |  | const IfxGtm_Tom_Dtm_PwmHl_Config * | config
 | ) |  |

Initializes the timer object note : To ensure that the channels counter are reset by the timer and do not overflow, leading to random signal on the output, the timer must be started before the call to this function.

Parameters
driver | driver GTM TOM PWM driver
config | config GTM TOM: PWM HL configuration
Returns
TRUE on success else FALSE

Definition at line 159 of file IfxGtm_Tom_Dtm_PwmHl.c.

◆ IfxGtm_Tom_Dtm_PwmHl_initConfig()

void IfxGtm_Tom_Dtm_PwmHl_initConfig ( IfxGtm_Tom_Dtm_PwmHl_Config * config )

Initialize the configuration structure to default.

Parameters
config config Channel configuration. This parameter is Initialised by the function
Returns
None

Definition at line 273 of file IfxGtm_Tom_Dtm_PwmHl.c.

◆ IfxGtm_Tom_Dtm_PwmHl_invertActiveState()

IFX_INLINE Ifx_ActiveState IfxGtm_Tom_Dtm_PwmHl_invertActiveState ( Ifx_ActiveState activeState )

Inverts the active state.

Parameters
activeState Active state
Returns
State

Definition at line 149 of file IfxGtm_Tom_Dtm_PwmHl.c.

◆ IfxGtm_Tom_Dtm_PwmHl_setDeadtime()

boolean IfxGtm_Tom_Dtm_PwmHl_setDeadtime | ( | IfxGtm_TomDtm_PwmHl * | driver,
 |  | float32 | deadtime
 | ) |  |

Sets the dead time.

Parameters
driver | driver GTM TOM PWM driver
deadtime | deadtime Dead time value
Returns
TRUE on success else FALSE

Definition at line 309 of file IfxGtm_Tom_Dtm_PwmHl.c.

Referenced by IfxGtm_Tom_Dtm_PwmHl_init(), and IfxGtm_Tom_Dtm_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_Dtm_PwmHl_setMinPulse()

boolean IfxGtm_Tom_Dtm_PwmHl_setMinPulse | ( | IfxGtm_TomDtm_PwmHl * | driver,
 |  | float32 | minPulse
 | ) |  |

Sets the minimum pulse.

Parameters
driver | driver GTM TOM PWM driver
minPulse | minPulse Minimum pulse
Returns
TRUE on success else FALSE

Definition at line 332 of file IfxGtm_Tom_Dtm_PwmHl.c.

Referenced by IfxGtm_Tom_Dtm_PwmHl_init(), and IfxGtm_Tom_Dtm_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_Dtm_PwmHl_setMode()

boolean IfxGtm_Tom_Dtm_PwmHl_setMode | ( | IfxGtm_TomDtm_PwmHl * | driver,
 |  | Ifx_Pwm_Mode | mode
 | ) |  |

Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate()

Parameters
driver | driver GTM TOM PWM driver
mode | mode Pwm mode
Returns
TRUE on success else FALSE

Definition at line 343 of file IfxGtm_Tom_Dtm_PwmHl.c.

Referenced by IfxGtm_Tom_Dtm_PwmHl_init(), and IfxGtm_Tom_Dtm_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_Dtm_PwmHl_setOnTime()

IFX_INLINE void IfxGtm_Tom_Dtm_PwmHl_setOnTime | ( | IfxGtm_TomDtm_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn
 | ) |  |

Sets the ON time.

Returns
None

Definition at line 143 of file IfxGtm_Tom_Dtm_PwmHl.c.

Referenced by IfxGtm_Tom_Dtm_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_Dtm_PwmHl_setOnTimeAndShift()

void IfxGtm_Tom_Dtm_PwmHl_setOnTimeAndShift | ( | IfxGtm_TomDtm_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn,
 |  | Ifx_TimerValue * | shift
 | ) |  |

Sets the ON time and Shift.

Parameters
driver | driver GTM TOM PWM driver
tOn | tOn ON time
shift | Shift value in ticks
Returns
None

Definition at line 385 of file IfxGtm_Tom_Dtm_PwmHl.c.

Referenced by IfxGtm_Tom_Dtm_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_Dtm_PwmHl_setPulse()

void IfxGtm_Tom_Dtm_PwmHl_setPulse | ( | IfxGtm_TomDtm_PwmHl * | driver,
 |  | float32 * | tOn,
 |  | float32 * | offset
 | ) |  |

Sets the ON time and offset, all switched are independent.

Parameters
driver | driver GTM TOM PWM driver
tOn | tOn ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
offset | offset Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
Returns
None

Definition at line 391 of file IfxGtm_Tom_Dtm_PwmHl.c.

Referenced by IfxGtm_Tom_Dtm_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_Dtm_PwmHl_setupChannels()

void IfxGtm_Tom_Dtm_PwmHl_setupChannels | ( | IfxGtm_TomDtm_PwmHl * | driver,
 |  | boolean * | activeCh,
 |  | boolean * | stuckSt
 | ) |  |

Set up channels.

Parameters
driver | driver GTM TOM PWM driver
activeCh | Active channel
stuckSt | Stuck state
Returns
None

Definition at line 397 of file IfxGtm_Tom_Dtm_PwmHl.c.

Referenced by IfxGtm_Tom_Dtm_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_Dtm_PwmHl_stdIfPwmHlInit()

boolean IfxGtm_Tom_Dtm_PwmHl_stdIfPwmHlInit | ( | IfxStdIf_PwmHl * | stdif,
 |  | IfxGtm_TomDtm_PwmHl * | driver
 | ) |  |

Initialises the statndard interface Pwm.

Parameters
stdif | Standard interface object, will be initialized by the function
driver | Interface driver to be used by the standard interface. must be initialised separately
Returns
TRUE on success else FALSE

Definition at line 406 of file IfxGtm_Tom_Dtm_PwmHl.c.

◆ IfxGtm_Tom_Dtm_PwmHl_updateAndShiftOff()

IFX_STATIC void IfxGtm_Tom_Dtm_PwmHl_updateAndShiftOff | ( | IfxGtm_TomDtm_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn,
 |  | Ifx_TimerValue * | shift
 | ) |  |

Sets switched to OFF.

Parameters
driver | driver GTM TOM PWM driver
tOn | ON time
shift | Shift value in ticks
Returns
None

Definition at line 432 of file IfxGtm_Tom_Dtm_PwmHl.c.

◆ IfxGtm_Tom_Dtm_PwmHl_updateCenterAligned()

IFX_STATIC void IfxGtm_Tom_Dtm_PwmHl_updateCenterAligned | ( | IfxGtm_TomDtm_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn
 | ) |  |

Updates the x output duty cycle in center aligned and center aligned inverted modes.

Parameters
driver | GTM TOM PWM driver
tOn | T on
Returns
None

Definition at line 440 of file IfxGtm_Tom_Dtm_PwmHl.c.

◆ IfxGtm_Tom_Dtm_PwmHl_updateEdgeAligned()

IFX_STATIC void IfxGtm_Tom_Dtm_PwmHl_updateEdgeAligned | ( | IfxGtm_TomDtm_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn
 | ) |  |

Updates the x output duty cycle in edge aligned modes (left and right aligned)

Parameters
driver | GTM TOM PWM driver
tOn | T On
Returns
None

Definition at line 483 of file IfxGtm_Tom_Dtm_PwmHl.c.

◆ IfxGtm_Tom_Dtm_PwmHl_updateOff()

IFX_STATIC void IfxGtm_Tom_Dtm_PwmHl_updateOff | ( | IfxGtm_TomDtm_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn
 | ) |  |

Set the outputs to inactive.

Parameters
driver | GTM TOM PWM driver
tOn | T On
Returns
None

Definition at line 549 of file IfxGtm_Tom_Dtm_PwmHl.c.

Referenced by IfxGtm_Tom_Dtm_PwmHl_init(), IfxGtm_Tom_Dtm_PwmHl_updateAndShiftOff(), and IfxGtm_Tom_Dtm_PwmHl_updatePulseOff().

◆ IfxGtm_Tom_Dtm_PwmHl_updatePulse()

IFX_STATIC void IfxGtm_Tom_Dtm_PwmHl_updatePulse | ( | IfxGtm_TomDtm_PwmHl * | driver,
 |  | float32 * | tOn,
 |  | float32 * | offset
 | ) |  |

Update Pulse.

Parameters
driver | GTM TOM PWM driver
tOn | ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
offset | Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
Returns
None

Definition at line 564 of file IfxGtm_Tom_Dtm_PwmHl.c.

◆ IfxGtm_Tom_Dtm_PwmHl_updatePulseOff()

IFX_STATIC void IfxGtm_Tom_Dtm_PwmHl_updatePulseOff | ( | IfxGtm_TomDtm_PwmHl * | driver,
 |  | float32 * | tOn,
 |  | float32 * | offset
 | ) |  |

Set Pulse to OFF.

Parameters
driver | GTM TOM PWM driver
tOn | ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
offset | Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
Returns
None

Definition at line 624 of file IfxGtm_Tom_Dtm_PwmHl.c.

◆ IfxGtm_Tom_Dtm_PwmHl_updateShiftCenterAligned()

IFX_STATIC void IfxGtm_Tom_Dtm_PwmHl_updateShiftCenterAligned | ( | IfxGtm_TomDtm_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn,
 |  | Ifx_TimerValue * | shift
 | ) |  |

Update Shift Center Aligned.

Parameters
driver | GTM TOM PWM driver
tOn | ON time
shift | Shift value in ticks
Returns
None

Definition at line 633 of file IfxGtm_Tom_Dtm_PwmHl.c.

Variable Documentation

◆ IfxGtm_Tom_Dtm_PwmHl_modes

IFX_STATIC IFX_CONST IfxGtm_Tom_Dtm_PwmHl_Mode IfxGtm_Tom_Dtm_PwmHl_modes[Ifx_Pwm_Mode_off+1]
Initial value:
= {
{Ifx_Pwm_Mode_centerAligned, FALSE, &IfxGtm_Tom_Dtm_PwmHl_updateCenterAligned, &IfxGtm_Tom_Dtm_PwmHl_updateShiftCenterAligned, &IfxGtm_Tom_Dtm_PwmHl_updatePulse },
{Ifx_Pwm_Mode_centerAlignedInverted, TRUE, &IfxGtm_Tom_Dtm_PwmHl_updateCenterAligned, &IfxGtm_Tom_Dtm_PwmHl_updateShiftCenterAligned, &IfxGtm_Tom_Dtm_PwmHl_updatePulse },
{Ifx_Pwm_Mode_leftAligned, FALSE, &IfxGtm_Tom_Dtm_PwmHl_updateEdgeAligned, &IfxGtm_Tom_Dtm_PwmHl_updateAndShiftOff, &IfxGtm_Tom_Dtm_PwmHl_updatePulse },
{Ifx_Pwm_Mode_rightAligned, TRUE, &IfxGtm_Tom_Dtm_PwmHl_updateEdgeAligned, &IfxGtm_Tom_Dtm_PwmHl_updateAndShiftOff, &IfxGtm_Tom_Dtm_PwmHl_updatePulse },
{Ifx_Pwm_Mode_off, FALSE, &IfxGtm_Tom_Dtm_PwmHl_updateOff, &IfxGtm_Tom_Dtm_PwmHl_updateAndShiftOff, &IfxGtm_Tom_Dtm_PwmHl_updatePulseOff},
}
IfxGtm_Tom_Dtm_PwmHl_updateAndShiftOff
IFX_STATIC void IfxGtm_Tom_Dtm_PwmHl_updateAndShiftOff(IfxGtm_TomDtm_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets switched to OFF.
Definition: IfxGtm_Tom_Dtm_PwmHl.c:432
Ifx_Pwm_Mode_centerAligned
Center aligned mode.
Definition: Ifx_Types.h:177
IfxGtm_Tom_Dtm_PwmHl_updatePulseOff
IFX_STATIC void IfxGtm_Tom_Dtm_PwmHl_updatePulseOff(IfxGtm_TomDtm_PwmHl *driver, float32 *tOn, float32 *offset)
Set Pulse to OFF.
Definition: IfxGtm_Tom_Dtm_PwmHl.c:624
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxGtm_Tom_Dtm_PwmHl_updateOff
IFX_STATIC void IfxGtm_Tom_Dtm_PwmHl_updateOff(IfxGtm_TomDtm_PwmHl *driver, Ifx_TimerValue *tOn)
Set the outputs to inactive.
Definition: IfxGtm_Tom_Dtm_PwmHl.c:549
Ifx_Pwm_Mode_leftAligned
Left aligned mode. The PWM period starts with a rising edge.
Definition: Ifx_Types.h:179
IfxGtm_Tom_Dtm_PwmHl_updatePulse
IFX_STATIC void IfxGtm_Tom_Dtm_PwmHl_updatePulse(IfxGtm_TomDtm_PwmHl *driver, float32 *tOn, float32 *offset)
Update Pulse.
Definition: IfxGtm_Tom_Dtm_PwmHl.c:564
Ifx_Pwm_Mode_off
All switch open.
Definition: Ifx_Types.h:181
IfxGtm_Tom_Dtm_PwmHl_updateCenterAligned
IFX_STATIC void IfxGtm_Tom_Dtm_PwmHl_updateCenterAligned(IfxGtm_TomDtm_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in center aligned and center aligned inverted modes.
Definition: IfxGtm_Tom_Dtm_PwmHl.c:440
Ifx_Pwm_Mode_centerAlignedInverted
Center aligned inverted aligned mode.
Definition: Ifx_Types.h:178
Ifx_Pwm_Mode_rightAligned
Right aligned mode. The PWM period starts with a falling edge.
Definition: Ifx_Types.h:180
IfxGtm_Tom_Dtm_PwmHl_updateShiftCenterAligned
IFX_STATIC void IfxGtm_Tom_Dtm_PwmHl_updateShiftCenterAligned(IfxGtm_TomDtm_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Update Shift Center Aligned.
Definition: IfxGtm_Tom_Dtm_PwmHl.c:633
IfxGtm_Tom_Dtm_PwmHl_updateEdgeAligned
IFX_STATIC void IfxGtm_Tom_Dtm_PwmHl_updateEdgeAligned(IfxGtm_TomDtm_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in edge aligned modes (left and right aligned)
Definition: IfxGtm_Tom_Dtm_PwmHl.c:483
TRUE
#define TRUE
Definition: Platform_Types.h:90

Definition at line 131 of file IfxGtm_Tom_Dtm_PwmHl.c.

Referenced by IfxGtm_Tom_Dtm_PwmHl_setMode().


iLLD_TC38A: IfxGtm_Tom_Pwm.c File Reference

  • Gtm
  • Tom
  • Pwm
Functions
IfxGtm_Tom_Pwm.c File Reference

GTM PWM details. More...

#include "IfxGtm_Tom_Pwm.h"
Include dependency graph for IfxGtm_Tom_Pwm.c:

Go to the source code of this file.

Functions

boolean | IfxGtm_Tom_Pwm_init (IfxGtm_Tom_Pwm_Driver *driver, const IfxGtm_Tom_Pwm_Config *config)
Initialises the Timer object. More...
void | IfxGtm_Tom_Pwm_initConfig (IfxGtm_Tom_Pwm_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default. More...
void | IfxGtm_Tom_Pwm_start (IfxGtm_Tom_Pwm_Driver *driver, boolean immediate)
starts the PWM generation from the configured channel More...
void | IfxGtm_Tom_Pwm_stop (IfxGtm_Tom_Pwm_Driver *driver, boolean immediate)
Stops the PWM generation from the configured channel. More...

Detailed Description

GTM PWM details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Tom_Pwm.c.

Function Documentation

◆ IfxGtm_Tom_Pwm_start()

void IfxGtm_Tom_Pwm_start | ( | IfxGtm_Tom_Pwm_Driver * | driver,
 |  | boolean | immediate
 | ) |  |

starts the PWM generation from the configured channel

Parameters
driver | handle for the PWM device
immediate | immediate start or not
Returns
None

Definition at line 184 of file IfxGtm_Tom_Pwm.c.

◆ IfxGtm_Tom_Pwm_stop()

void IfxGtm_Tom_Pwm_stop | ( | IfxGtm_Tom_Pwm_Driver * | driver,
 |  | boolean | immediate
 | ) |  |

Stops the PWM generation from the configured channel.

Parameters
driver | handle for the PWM device
immediate | immediate start or not.
Returns
None

Definition at line 195 of file IfxGtm_Tom_Pwm.c.


iLLD_TC38A: IfxGtm_Tom_PwmHl.c File Reference

  • Gtm
  • Tom
  • PwmHl
Functions | Variables
IfxGtm_Tom_PwmHl.c File Reference

GTM PWMHL details. More...

#include "IfxGtm_Tom_PwmHl.h"
#include "_Utilities/Ifx_Assert.h"
#include "stddef.h"
#include "string.h"
Include dependency graph for IfxGtm_Tom_PwmHl.c:

Go to the source code of this file.

Functions

IFX_INLINE Ifx_ActiveState | IfxGtm_Tom_PwmHl_invertActiveState (Ifx_ActiveState activeState)
Inverts the active state. More...
IFX_STATIC void | IfxGtm_Tom_PwmHl_updateAndShiftOff (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets switched to OFF. More...
IFX_STATIC void | IfxGtm_Tom_PwmHl_updateCenterAligned (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in center aligned and center aligned inverted modes. More...
IFX_STATIC void | IfxGtm_Tom_PwmHl_updateEdgeAligned (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in edge aligned modes (left and right aligned) More...
IFX_STATIC void | IfxGtm_Tom_PwmHl_updateOff (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Set the outputs to inactive. More...
IFX_STATIC void | IfxGtm_Tom_PwmHl_updatePulse (IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
Update Pulse. More...
IFX_STATIC void | IfxGtm_Tom_PwmHl_updatePulseOff (IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
Set Pulse to OFF. More...
IFX_STATIC void | IfxGtm_Tom_PwmHl_updateShiftCenterAligned (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Update Shift Center Aligned. More...
float32 | IfxGtm_Tom_PwmHl_getDeadtime (IfxGtm_Tom_PwmHl *driver)
Returns the dead time. More...
float32 | IfxGtm_Tom_PwmHl_getMinPulse (IfxGtm_Tom_PwmHl *driver)
Returns the minimum pulse. More...
Ifx_Pwm_Mode | IfxGtm_Tom_PwmHl_getMode (IfxGtm_Tom_PwmHl *driver)
Returns Pwm mode. More...
boolean | IfxGtm_Tom_PwmHl_init (IfxGtm_Tom_PwmHl *driver, const IfxGtm_Tom_PwmHl_Config *config)
Initializes the timer object note To ensure that the channels counter are reset by the timer and do not overflow, leading to random signal on the output, the timer must be started before the call to this function. Note: all PWM channels must use the same TGC Note: the current implementation must use the same TGC for the timer and PWM channels. More...
void | IfxGtm_Tom_PwmHl_initConfig (IfxGtm_Tom_PwmHl_Config *config)
Initialize the configuration structure to default. More...
boolean | IfxGtm_Tom_PwmHl_setDeadtime (IfxGtm_Tom_PwmHl *driver, float32 deadtime)
Sets the dead time. More...
boolean | IfxGtm_Tom_PwmHl_setMinPulse (IfxGtm_Tom_PwmHl *driver, float32 minPulse)
Sets the minimum pulse. More...
boolean | IfxGtm_Tom_PwmHl_setMode (IfxGtm_Tom_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate() More...
void | IfxGtm_Tom_PwmHl_setOnTime (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Sets the ON time. More...
void | IfxGtm_Tom_PwmHl_setOnTimeAndShift (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets the ON time and Shift. More...
void | IfxGtm_Tom_PwmHl_setPulse (IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
Sets the ON time and offset, all switched are independent. More...
void | IfxGtm_Tom_PwmHl_setupChannels (IfxGtm_Tom_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set up channels. More...
boolean | IfxGtm_Tom_PwmHl_stdIfPwmHlInit (IfxStdIf_PwmHl *stdif, IfxGtm_Tom_PwmHl *driver)
Initialises the statndard interface Pwm. More...

Variables

IFX_STATIC IFX_CONST IfxGtm_Tom_PwmHl_Mode IfxGtm_Tom_PwmHl_modes [Ifx_Pwm_Mode_off+1]

Detailed Description

GTM PWMHL details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Tom_PwmHl.c.

Variable Documentation

◆ IfxGtm_Tom_PwmHl_modes

IFX_STATIC IFX_CONST IfxGtm_Tom_PwmHl_Mode IfxGtm_Tom_PwmHl_modes[Ifx_Pwm_Mode_off+1]
Initial value:
= {
{Ifx_Pwm_Mode_centerAligned, FALSE, &IfxGtm_Tom_PwmHl_updateCenterAligned, &IfxGtm_Tom_PwmHl_updateShiftCenterAligned, &IfxGtm_Tom_PwmHl_updatePulse },
{Ifx_Pwm_Mode_centerAlignedInverted, TRUE, &IfxGtm_Tom_PwmHl_updateCenterAligned, &IfxGtm_Tom_PwmHl_updateShiftCenterAligned, &IfxGtm_Tom_PwmHl_updatePulse },
{Ifx_Pwm_Mode_leftAligned, FALSE, &IfxGtm_Tom_PwmHl_updateEdgeAligned, &IfxGtm_Tom_PwmHl_updateAndShiftOff, &IfxGtm_Tom_PwmHl_updatePulse },
{Ifx_Pwm_Mode_rightAligned, TRUE, &IfxGtm_Tom_PwmHl_updateEdgeAligned, &IfxGtm_Tom_PwmHl_updateAndShiftOff, &IfxGtm_Tom_PwmHl_updatePulse },
{Ifx_Pwm_Mode_off, FALSE, &IfxGtm_Tom_PwmHl_updateOff, &IfxGtm_Tom_PwmHl_updateAndShiftOff, &IfxGtm_Tom_PwmHl_updatePulseOff}
}
IfxGtm_Tom_PwmHl_updatePulse
IFX_STATIC void IfxGtm_Tom_PwmHl_updatePulse(IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
Update Pulse.
Definition: IfxGtm_Tom_PwmHl.c:587
IfxGtm_Tom_PwmHl_updateCenterAligned
IFX_STATIC void IfxGtm_Tom_PwmHl_updateCenterAligned(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in center aligned and center aligned inverted modes.
Definition: IfxGtm_Tom_PwmHl.c:450
IfxGtm_Tom_PwmHl_updateAndShiftOff
IFX_STATIC void IfxGtm_Tom_PwmHl_updateAndShiftOff(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets switched to OFF.
Definition: IfxGtm_Tom_PwmHl.c:441
Ifx_Pwm_Mode_centerAligned
Center aligned mode.
Definition: Ifx_Types.h:177
FALSE
#define FALSE
Definition: Platform_Types.h:93
Ifx_Pwm_Mode_leftAligned
Left aligned mode. The PWM period starts with a rising edge.
Definition: Ifx_Types.h:179
Ifx_Pwm_Mode_off
All switch open.
Definition: Ifx_Types.h:181
IfxGtm_Tom_PwmHl_updatePulseOff
IFX_STATIC void IfxGtm_Tom_PwmHl_updatePulseOff(IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
Set Pulse to OFF.
Definition: IfxGtm_Tom_PwmHl.c:694
Ifx_Pwm_Mode_centerAlignedInverted
Center aligned inverted aligned mode.
Definition: Ifx_Types.h:178
Ifx_Pwm_Mode_rightAligned
Right aligned mode. The PWM period starts with a falling edge.
Definition: Ifx_Types.h:180
IfxGtm_Tom_PwmHl_updateShiftCenterAligned
IFX_STATIC void IfxGtm_Tom_PwmHl_updateShiftCenterAligned(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Update Shift Center Aligned.
Definition: IfxGtm_Tom_PwmHl.c:702
IfxGtm_Tom_PwmHl_updateEdgeAligned
IFX_STATIC void IfxGtm_Tom_PwmHl_updateEdgeAligned(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in edge aligned modes (left and right aligned)
Definition: IfxGtm_Tom_PwmHl.c:510
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxGtm_Tom_PwmHl_updateOff
IFX_STATIC void IfxGtm_Tom_PwmHl_updateOff(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Set the outputs to inactive.
Definition: IfxGtm_Tom_PwmHl.c:570

Definition at line 126 of file IfxGtm_Tom_PwmHl.c.

Referenced by IfxGtm_Tom_PwmHl_setMode().


iLLD_TC38A: IfxGtm_Tom_Timer.c File Reference

  • Gtm
  • Tom
  • Timer
Functions
IfxGtm_Tom_Timer.c File Reference

GTM TIMER details. More...

#include "IfxGtm_Tom_Timer.h"
#include "_Utilities/Ifx_Assert.h"
#include "IfxGtm_bf.h"
#include "stddef.h"
#include "string.h"
Include dependency graph for IfxGtm_Tom_Timer.c:

Go to the source code of this file.

Functions

boolean | IfxGtm_Tom_Timer_acknowledgeTimerIrq (IfxGtm_Tom_Timer *driver)
Returns the timer event. More...
boolean | IfxGtm_Tom_Timer_acknowledgeTriggerIrq (IfxGtm_Tom_Timer *driver)
Returns the trigger event. More...
void | IfxGtm_Tom_Timer_addToChannelMask (IfxGtm_Tom_Timer *driver, IfxGtm_Tom_Ch channel)
Add a channel to the channel mask Channels present in the mask are started, stopped, updated at the same time as the timer: IfxGtm_Tom_Timer_applyUpdate, IfxGtm_Tom_Timer_disableUpdate, IfxGtm_Tom_Timer_stop, IfxGtm_Tom_Timer_run. More...
void | IfxGtm_Tom_Timer_applyUpdate (IfxGtm_Tom_Timer *driver)
Enables the transfer of the shadow registers. More...
void | IfxGtm_Tom_Timer_disableUpdate (IfxGtm_Tom_Timer *driver)
Disables the upadte. More...
float32 | IfxGtm_Tom_Timer_getFrequency (IfxGtm_Tom_Timer *driver)
Returns the frequency. More...
float32 | IfxGtm_Tom_Timer_getInputFrequency (IfxGtm_Tom_Timer *driver)
Returns the Input frequncy. More...
Ifx_TimerValue | IfxGtm_Tom_Timer_getOffset (IfxGtm_Tom_Timer *driver)
Returns the initial timer offset in ticks. More...
Ifx_TimerValue | IfxGtm_Tom_Timer_getPeriod (IfxGtm_Tom_Timer *driver)
Returns the period of the timer. More...
volatile uint32 * | IfxGtm_Tom_Timer_getPointer (IfxGtm_Tom_Timer *driver)
Returns the pointer to timer channel. More...
float32 | IfxGtm_Tom_Timer_getResolution (IfxGtm_Tom_Timer *driver)
Returns the resolution. More...
Ifx_TimerValue | IfxGtm_Tom_Timer_getTrigger (IfxGtm_Tom_Timer *driver)
Returns the trigger point. More...
volatile uint32 * | IfxGtm_Tom_Timer_getTriggerPointer (IfxGtm_Tom_Timer *driver)
Returns the pointer to trigger channel. More...
boolean | IfxGtm_Tom_Timer_init (IfxGtm_Tom_Timer *driver, const IfxGtm_Tom_Timer_Config *config)
Initialises the timer object. More...
void | IfxGtm_Tom_Timer_initConfig (IfxGtm_Tom_Timer_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default. More...
void | IfxGtm_Tom_Timer_run (IfxGtm_Tom_Timer *driver)
Runs the timer. More...
boolean | IfxGtm_Tom_Timer_setFrequency (IfxGtm_Tom_Timer *driver, float32 frequency)
Sets the frequency. More...
boolean | IfxGtm_Tom_Timer_setPeriod (IfxGtm_Tom_Timer *driver, Ifx_TimerValue period)
Sets the period for the timer. More...
void | IfxGtm_Tom_Timer_setSingleMode (IfxGtm_Tom_Timer *driver, boolean enabled)
Sets the single shot mode of the timer. More...
void | IfxGtm_Tom_Timer_setTrigger (IfxGtm_Tom_Timer *driver, Ifx_TimerValue triggerPoint)
Sets the trigger. More...
boolean | IfxGtm_Tom_Timer_stdIfTimerInit (IfxStdIf_Timer *stdif, IfxGtm_Tom_Timer *driver)
Initializes the standard interface timer. More...
void | IfxGtm_Tom_Timer_stop (IfxGtm_Tom_Timer *driver)
Stops the timer. More...
void | IfxGtm_Tom_Timer_updateInputFrequency (IfxGtm_Tom_Timer *driver)
Updates the input frequency. More...

Detailed Description

GTM TIMER details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Tom_Timer.c.


iLLD_TC38A: IfxGtm_Trig.c File Reference

  • Gtm
  • Trig
Data Structures | Functions | Variables
IfxGtm_Trig.c File Reference

GTM TRIG details. More...

#include "IfxGtm_Trig.h"
#include "_Utilities/Ifx_Assert.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
Include dependency graph for IfxGtm_Trig.c:

Go to the source code of this file.

Data Structures

struct | IfxGtm_Trig_AdcTrig_Channel
struct | IfxGtm_Trig_CanTrig_Channel
struct | IfxGtm_Trig_MscTrig_Channel
struct | IfxGtm_Trig_AdcTrig_Source
struct | IfxGtm_Trig_CanTrig_Source
struct | IfxGtm_Trig_MscTrig_Source
struct | IfxGtm_Trig_AdcTrig_Trigger
struct | IfxGtm_Trig_CanTrig_Trigger
struct | IfxGtm_Trig_MscTrig_Set
struct | IfxGtm_Trig_AdcTrig_Table
struct | IfxGtm_Trig_CanTrig_Table
struct | IfxGtm_Trig_MscTrig_Table

Functions

boolean | IfxGtm_Trig_fromEdsadc (Ifx_GTM *gtm, uint32 edsadcChannel, IfxGtm_Tim tim, IfxGtm_Tim_Ch timChannel)
boolean | IfxGtm_Trig_fromMsc (Ifx_GTM *gtm, uint32 msc, IfxGtm_Trig_MscTrigInput input, IfxGtm_Trig_MscTrigOutput output, IfxGtm_Trig_MscTrigSignal signal)
boolean | IfxGtm_Trig_toCan (Ifx_GTM *gtm, IfxGtm_Trig_CanTrig canTrig, IfxGtm_Trig_CanDevice canDevice, IfxGtm_Trig_CanTrigSource source, IfxGtm_Trig_CanTrigChannel channel)
boolean | IfxGtm_Trig_toEVadc (Ifx_GTM *gtm, IfxGtm_Trig_AdcGroup adcGroup, IfxGtm_Trig_AdcTrig adcTrig, IfxGtm_Trig_AdcTrigSource source, IfxGtm_Trig_AdcTrigChannel channel)
void | IfxGtm_Trig_toEVadcClear (Ifx_GTM *gtm, IfxGtm_Trig_AdcGroup adcGroup, IfxGtm_Trig_AdcTrig adcTrig)
void | IfxGtm_Trig_toEdsadc (Ifx_GTM *gtm, uint32 edsadcChannel, IfxGtm_Trig_EdsadcTrig edsadcTrig, IfxGtm_Trig_EdsadcTrigSource sel)
boolean | IfxGtm_Trig_toMsc (Ifx_GTM *gtm, IfxGtm_Trig_MscTrigSignal signal, IfxGtm_Trig_MscTrigSet mscSet, IfxGtm_Trig_MscTrigSource source, IfxGtm_Trig_MscTrigChannel channel)
void | IfxGtm_Trig_toPsi5 (Ifx_GTM *gtm, uint32 psi5Channel, IfxGtm_Trig_Psi5TrigSource sel)
void | IfxGtm_Trig_toPsi5s (Ifx_GTM *gtm, uint32 psi5sChannel, IfxGtm_Trig_Psi5sTrigSource sel)
boolean | IfxGtm_Trig_toSent (Ifx_GTM *gtm, IfxGtm_Trig_SentGroup sentGroup, IfxGtm_Trig_SentTrig sentTrig, IfxGtm_Trig_SentTrigSource source, IfxGtm_Trig_SentTrigChannel channel)

Variables

IFX_STATIC IFX_CONST IfxGtm_Trig_CanTrig_Table IfxGtm_Trig_CanTrig_table0
IFX_STATIC IFX_CONST IfxGtm_Trig_CanTrig_Table IfxGtm_Trig_CanTrig_table1
IFX_STATIC IFX_CONST IfxGtm_Trig_CanTrig_Table IfxGtm_Trig_CanTrig_table2_3
IFX_STATIC IFX_CONST IfxGtm_Trig_AdcTrig_Table IfxGtm_Trig_EvadcTrig_tableAdc0_1_2
IFX_STATIC IFX_CONST IfxGtm_Trig_AdcTrig_Table IfxGtm_Trig_EvadcTrig_tableAdc3_4
IFX_STATIC IFX_CONST IfxGtm_Trig_AdcTrig_Table IfxGtm_Trig_EvadcTrig_tableAdc5_6_7
IFX_STATIC IFX_CONST IfxGtm_Trig_AdcTrig_Table IfxGtm_Trig_EvadcTrig_tableAdc8_9_10_11
IFX_STATIC IFX_CONST IfxGtm_Trig_MscTrig_Table IfxGtm_Trig_MscTrig_table
IFX_STATIC IFX_CONST IfxGtm_Trig_AdcTrig_Table IfxGtm_Trig_SentTrig_table12_13_14_15

Detailed Description

GTM TRIG details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Trig.c.

Variable Documentation

◆ IfxGtm_Trig_CanTrig_table0

IFX_STATIC IFX_CONST IfxGtm_Trig_CanTrig_Table IfxGtm_Trig_CanTrig_table0
Initial value:
= {
.trigger = {
.source = {
{.channel= { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x08}, {.config = 0x09}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x0A}, {.config = 0x0B}}},
{.channel= { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x00}, {.config = 0x01}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x02}, {.config = 0x03}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel= { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x0C}, {.config = 0x0D}, {.config = 0x0E}, {.config = 0x0F}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel= { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel= { {.config = 0x04}, {.config = 0x05}, {.config = 0x06}, {.config = 0x07}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
}
},
}

Definition at line 134 of file IfxGtm_Trig.c.

Referenced by IfxGtm_Trig_toCan().

◆ IfxGtm_Trig_CanTrig_table1

IFX_STATIC IFX_CONST IfxGtm_Trig_CanTrig_Table IfxGtm_Trig_CanTrig_table1
Initial value:
= {
.trigger = {
.source = {
{.channel= { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel= { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x00}, {.config = 0x01}, {.config = 0x08}, {.config = 0x09}, {.config = 0x02}, {.config = 0x03}, {.config = 0x0A}, {.config = 0x0B}}},
{.channel= { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel= { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x0C}, {.config = 0x0D}, {.config = 0x0E}, {.config = 0x0F}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel= { {.config = 0x04}, {.config = 0x05}, {.config = 0x06}, {.config = 0x07}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
}
},
}

Definition at line 148 of file IfxGtm_Trig.c.

Referenced by IfxGtm_Trig_toCan().

◆ IfxGtm_Trig_CanTrig_table2_3

IFX_STATIC IFX_CONST IfxGtm_Trig_CanTrig_Table IfxGtm_Trig_CanTrig_table2_3
Initial value:
= {
.trigger = {
.source = {
{.channel= { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel= { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x00}, {.config = 0x01}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x02}, {.config = 0x03}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel= { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel= { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel= { {.config = 0x04}, {.config = 0x05}, {.config = 0x06}, {.config = 0x07}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
}
},
}

Definition at line 162 of file IfxGtm_Trig.c.

Referenced by IfxGtm_Trig_toCan().

◆ IfxGtm_Trig_EvadcTrig_tableAdc0_1_2

IFX_STATIC IFX_CONST IfxGtm_Trig_AdcTrig_Table IfxGtm_Trig_EvadcTrig_tableAdc0_1_2

Definition at line 176 of file IfxGtm_Trig.c.

Referenced by IfxGtm_Trig_toEVadc(), and IfxGtm_Trig_toSent().

◆ IfxGtm_Trig_EvadcTrig_tableAdc3_4

IFX_STATIC IFX_CONST IfxGtm_Trig_AdcTrig_Table IfxGtm_Trig_EvadcTrig_tableAdc3_4

Definition at line 291 of file IfxGtm_Trig.c.

Referenced by IfxGtm_Trig_toEVadc(), and IfxGtm_Trig_toSent().

◆ IfxGtm_Trig_EvadcTrig_tableAdc5_6_7

IFX_STATIC IFX_CONST IfxGtm_Trig_AdcTrig_Table IfxGtm_Trig_EvadcTrig_tableAdc5_6_7

Definition at line 406 of file IfxGtm_Trig.c.

Referenced by IfxGtm_Trig_toEVadc(), and IfxGtm_Trig_toSent().

◆ IfxGtm_Trig_EvadcTrig_tableAdc8_9_10_11

IFX_STATIC IFX_CONST IfxGtm_Trig_AdcTrig_Table IfxGtm_Trig_EvadcTrig_tableAdc8_9_10_11

Definition at line 521 of file IfxGtm_Trig.c.

Referenced by IfxGtm_Trig_toEVadc(), and IfxGtm_Trig_toSent().

◆ IfxGtm_Trig_MscTrig_table

IFX_STATIC IFX_CONST IfxGtm_Trig_MscTrig_Table IfxGtm_Trig_MscTrig_table

Definition at line 636 of file IfxGtm_Trig.c.

Referenced by IfxGtm_Trig_toMsc().

◆ IfxGtm_Trig_SentTrig_table12_13_14_15

IFX_STATIC IFX_CONST IfxGtm_Trig_AdcTrig_Table IfxGtm_Trig_SentTrig_table12_13_14_15

Definition at line 1010 of file IfxGtm_Trig.c.

Referenced by IfxGtm_Trig_toSent().


iLLD_TC38A: IfxHssl.c File Reference

  • Hssl
  • Std
Functions
IfxHssl.c File Reference

HSSL basic functionality. More...

#include "IfxHssl.h"
Include dependency graph for IfxHssl.c:

Go to the source code of this file.

Functions

void | IfxHssl_disableHsctModule (Ifx_HSCT *hsct)
Disables hsct module. More...
void | IfxHssl_disableHsslModule (Ifx_HSSL *hssl)
DIsables the hssl module. More...
void | IfxHssl_enableHsctModule (Ifx_HSCT *hsct)
Enables hsct module. More...
void | IfxHssl_enableHsslModule (Ifx_HSSL *hssl)
Enables the hssl module. More...
Ifx_HSCT * | IfxHssl_getHsctAddress (IfxHssl_hsctIndex hsct)
IfxHssl_hsctIndex | IfxHssl_getHsctIndex (Ifx_HSCT *hsct)
API to get the resource index of the HSCT specified. More...
volatile Ifx_SRC_SRCR * | IfxHssl_getHsctSrcPointer (Ifx_HSCT *hsct)
Returns the SRC pointer for HSCT. More...
Ifx_HSSL * | IfxHssl_getHsslAddress (IfxHssl_hsslIndex hssl)
volatile Ifx_SRC_SRCR * | IfxHssl_getHsslCOKSrcPointer (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL COK of specified channel. More...
volatile Ifx_SRC_SRCR * | IfxHssl_getHsslERRSrcPointer (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL ERR of specified channel. More...
volatile Ifx_SRC_SRCR * | IfxHssl_getHsslEXISrcPointer (Ifx_HSSL *hssl)
Returns the SRC pointer for HSSL EXI interrupt. More...
IfxHssl_hsslIndex | IfxHssl_getHsslIndex (Ifx_HSSL *hssl)
API to get the resource index of the HSSL specified. More...
volatile Ifx_SRC_SRCR * | IfxHssl_getHsslRDISrcPointer (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL COK of specified channel. More...
volatile Ifx_SRC_SRCR * | IfxHssl_getHsslTRGSrcPointer (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL TRG of specified channel. More...
void | IfxHssl_resetHsctKernel (Ifx_HSCT *hsct)
resets HSCT kernel More...
void | IfxHssl_resetHsslKernel (Ifx_HSSL *hssl)
resets the HSSL kernel More...

Detailed Description

HSSL basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxHssl.c.


iLLD_TC38A: IfxHssl_cfg.c File Reference

  • _Impl
Variables
IfxHssl_cfg.c File Reference

HSSL on-chip implementation data. More...

#include "IfxHssl_cfg.h"
Include dependency graph for IfxHssl_cfg.c:

Go to the source code of this file.

Variables

IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsctIndexMap [IFXHSSL_NUM_MODULES]
IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsslIndexMap [IFXHSSL_NUM_MODULES]

Detailed Description

HSSL on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxHssl_cfg.c.

Variable Documentation

◆ IfxHssl_cfg_hsctIndexMap

IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsctIndexMap[IFXHSSL_NUM_MODULES]
Initial value:
= {
{&MODULE_HSCT0, (uint32)IfxHssl_hsctIndex_0}
}
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxHssl_hsctIndex_0
HSCT index 0.
Definition: IfxHssl_cfg.h:83

Definition at line 52 of file IfxHssl_cfg.c.

Referenced by IfxHssl_getHsctAddress(), and IfxHssl_getHsctIndex().

◆ IfxHssl_cfg_hsslIndexMap

IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsslIndexMap[IFXHSSL_NUM_MODULES]
Initial value:
= {
{&MODULE_HSSL0, (uint32)IfxHssl_hsslIndex_0}
}
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxHssl_hsslIndex_0
HSSL index 0.
Definition: IfxHssl_cfg.h:91

Definition at line 56 of file IfxHssl_cfg.c.

Referenced by IfxHssl_getHsslAddress(), and IfxHssl_getHsslIndex().


iLLD_TC38A: IfxHssl_Hssl.c File Reference

  • Hssl
  • Hssl
Functions
IfxHssl_Hssl.c File Reference

HSSL HSSL details. More...

#include "IfxHssl_Hssl.h"
Include dependency graph for IfxHssl_Hssl.c:

Go to the source code of this file.

Functions

void | IfxHssl_Hssl_checkErrors (IfxHssl_Hssl *hssl)
stores the status of errors in the respective members of the error flags structure More...
void | IfxHssl_Hssl_clearErrorFlags (IfxHssl_Hssl *hssl)
clears the status of members in the error flags structure More...
void | IfxHssl_Hssl_delay (IfxHssl_Hsct *hsct)
a simple software delay More...
void | IfxHssl_Hssl_initChannel (IfxHssl_Hssl_Channel *channel, const IfxHssl_Hssl_ChannelConfig *channelConfig)
Initialises the channel. More...
void | IfxHssl_Hssl_initChannelConfig (IfxHssl_Hssl_ChannelConfig *channelConfig, IfxHssl_Hssl *hssl, IfxHssl_Hsct *hsct)
Fills the channel config structure with default values. More...
void | IfxHssl_Hssl_initHsctModule (IfxHssl_Hsct *hsct, const IfxHssl_Hsct_Config *config)
Initialises the module. More...
void | IfxHssl_Hssl_initHsctModuleConfig (IfxHssl_Hsct_Config *config, Ifx_HSCT *hsct)
Fills the config structure with default values. More...
void | IfxHssl_Hssl_initHsslModule (IfxHssl_Hssl *hssl, const IfxHssl_Hssl_Config *config)
Initialises the Hssl module. More...
void | IfxHssl_Hssl_initHsslModuleConfig (IfxHssl_Hssl_Config *config, Ifx_HSSL *hssl)
Fills the config structure with default values. More...
IfxHssl_Hssl_Status | IfxHssl_Hssl_prepareStream (IfxHssl_Hssl_Channel *channel, uint32 slaveTargetAddress, Ifx_SizeT count)
Prepares the target device for streaming. More...
IfxHssl_Hssl_Status | IfxHssl_Hssl_read (IfxHssl_Hssl_Channel *channel, uint32 address, IfxHssl_DataLength dataLength)
Initiates read request. More...
void | IfxHssl_Hssl_sendControlCommand (IfxHssl_Hsct *hsct, uint8 command)
sends a predefined command from master to slave More...
IfxHssl_Hssl_Status | IfxHssl_Hssl_singleFrameRequest (IfxHssl_Hssl_Channel *channel, IfxHssl_Hssl_FrameRequest frameRequest, uint32 address, uint32 data, IfxHssl_DataLength dataLength)
serves the frame request (read, write, trigger frame and read id) More...
IfxHssl_Hssl_Status | IfxHssl_Hssl_waitAcknowledge (IfxHssl_Hssl_Channel *channel)
waits until the current transaction is done More...
IfxHssl_Hssl_Status | IfxHssl_Hssl_write (IfxHssl_Hssl_Channel *channel, uint32 address, uint32 data, IfxHssl_DataLength dataLength)
writes single frame of data into the specified address More...
IfxHssl_Hssl_Status | IfxHssl_Hssl_writeStream (IfxHssl_Hssl *hssl, uint32 *data, Ifx_SizeT count)
transfers one memory block of data useful for transfering huge data from one location to another and between devices. NOTE: This function should be called only for IfxHssl_ChannelId_2 More...

Detailed Description

HSSL HSSL details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxHssl_Hssl.c.


iLLD_TC38A: IfxI2c.c File Reference

  • I2c
  • Std
Functions
IfxI2c.c File Reference

I2C basic functionality. More...

#include "IfxI2c.h"
Include dependency graph for IfxI2c.c:

Go to the source code of this file.

Functions

void | IfxI2c_configureAsMaster (Ifx_I2C *i2c)
Configures the Module as Master. More...
void | IfxI2c_disableModule (Ifx_I2C *i2c)
Disables the I2c Module. More...
void | IfxI2c_enableDtrInterrupt (Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
enables the DTR interrupt More...
void | IfxI2c_enableErrorInterrupt (Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
Enables the Error interrupt. More...
void | IfxI2c_enableModule (Ifx_I2C *i2c)
Enables the I2c Module. More...
void | IfxI2c_enableProtocolInterrupt (void *i2c, IfxSrc_Tos typeOfService, uint16 priority)
Enables the protocol interrupt. More...
Ifx_I2C * | IfxI2c_getAddress (IfxI2c_Index i2c)
float32 | IfxI2c_getBaudrate (Ifx_I2C *i2c)
Returns the real Baudrate. More...
IfxI2c_Index | IfxI2c_getIndex (Ifx_I2C *i2c)
API to get the resource index of the I2C specified. More...
void | IfxI2c_initSclSdaPin (const IfxI2c_Scl_InOut *scl, const IfxI2c_Sda_InOut *sda, IfxPort_PadDriver padDriver)
void | IfxI2c_releaseBus (Ifx_I2C *i2c)
Releases the bus, i.e puts a stop condition on the bus. More...
void | IfxI2c_resetFifo (Ifx_I2C *i2c)
void | IfxI2c_resetModule (Ifx_I2C *i2c)
resets the I2c kernel More...
void | IfxI2c_setBaudrate (Ifx_I2C *i2c, float32 baudrate)
Calculates the desired baudrate. More...
void | IfxI2c_configureHighSpeedMode (Ifx_I2C *i2c)
Configure the i2c master to high speed mode baudrate > 400kbits/s. More...

Detailed Description

I2C basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxI2c.c.

Function Documentation

◆ IfxI2c_configureHighSpeedMode()

void IfxI2c_configureHighSpeedMode ( Ifx_I2C * i2c )

Configure the i2c master to high speed mode baudrate > 400kbits/s.

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 316 of file IfxI2c.c.

Referenced by IfxI2c_I2c_initModule().


iLLD_TC38A: IfxI2c_cfg.c File Reference

  • _Impl
Variables
IfxI2c_cfg.c File Reference

I2C on-chip implementation data. More...

#include "IfxI2c_cfg.h"
Include dependency graph for IfxI2c_cfg.c:

Go to the source code of this file.

Variables

IFX_CONST IfxModule_IndexMap IfxI2c_cfg_indexMap [IFXI2C_NUM_MODULES]

Detailed Description

I2C on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxI2c_cfg.c.

Variable Documentation

◆ IfxI2c_cfg_indexMap

IFX_CONST IfxModule_IndexMap IfxI2c_cfg_indexMap[IFXI2C_NUM_MODULES]
Initial value:
= {
{&MODULE_I2C0, (uint32)IfxI2c_Index_0},
{&MODULE_I2C1, (uint32)IfxI2c_Index_1}
}
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxI2c_Index_1
I2C Index 1.
Definition: IfxI2c_cfg.h:81
IfxI2c_Index_0
I2C Index 0.
Definition: IfxI2c_cfg.h:80

Definition at line 54 of file IfxI2c_cfg.c.

Referenced by IfxI2c_getAddress(), and IfxI2c_getIndex().


iLLD_TC38A: IfxI2c_I2c.c File Reference

  • I2c
  • I2c
Functions
IfxI2c_I2c.c File Reference

I2C I2C details. More...

#include "IfxI2c_I2c.h"
Include dependency graph for IfxI2c_I2c.c:

Go to the source code of this file.

Functions

float32 | IfxI2c_I2c_getBaudrate (IfxI2c_I2c *i2c)
returns the baudrate of SCL More...
void | IfxI2c_I2c_initConfig (IfxI2c_I2c_Config *config, Ifx_I2C *i2c)
Fills the config structure with default values. More...
void | IfxI2c_I2c_initDevice (IfxI2c_I2c_Device *i2cDevice, const IfxI2c_I2c_deviceConfig *i2cDeviceConfig)
Initializes the device Handler. More...
void | IfxI2c_I2c_initDeviceConfig (IfxI2c_I2c_deviceConfig *i2cDeviceConfig, IfxI2c_I2c *i2c)
Fills the config structure of the slave device with default values. More...
void | IfxI2c_I2c_initModule (IfxI2c_I2c *i2c, const IfxI2c_I2c_Config *config)
Initializes the Module. More...
IfxI2c_I2c_Status | IfxI2c_I2c_read (IfxI2c_I2c_Device *i2cDevice, volatile uint8 *data, Ifx_SizeT size)
reads the I2c device More...
IfxI2c_I2c_Status | IfxI2c_I2c_write (IfxI2c_I2c_Device *i2cDevice, volatile uint8 *data, Ifx_SizeT size)
writes to the I2c device More...

Detailed Description

I2C I2C details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxI2c_I2c.c.


iLLD_TC38A: IfxIom.c File Reference

  • Iom
  • Std
Functions
IfxIom.c File Reference

IOM basic functionality. More...

#include "IfxIom.h"
#include "Scu/Std/IfxScuCcu.h"
Include dependency graph for IfxIom.c:

Go to the source code of this file.

Functions

float32 | IfxIom_getFrequency (Ifx_IOM *iom)
Return the frequency used for the filter and timers clock. More...
void | IfxIom_resetModule (Ifx_IOM *iom)
Reset the IOM module. More...

Detailed Description

IOM basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxIom.c.


iLLD_TC38A: IfxIom_Driver.c File Reference

  • Iom
  • Driver
Macros | Functions
IfxIom_Driver.c File Reference

IOM DRIVER details. More...

#include "IfxIom_Driver.h"
#include "IfxIom_bf.h"
#include "_Utilities/Ifx_Assert.h"
Include dependency graph for IfxIom_Driver.c:

Go to the source code of this file.

Macros

#define | IFXIOM_DRIVER_LAM_GET_REF_INPUT_SIGNAL(refInput) ((IfxIom_RefInputSignal)((refInput >> 8) & 0xFF))
#define | IFXIOM_DRIVER_LAM_GET_MON_INPUT_SIGNAL(monInput) ((IfxIom_MonInputSignal)((monInput >> 8) & 0xFF))
#define | IFXIOM_DRIVER_LAM_GET_REF_INPUT_INDEX(refInput) ((refInput >> 0) & 0xFF)
#define | IFXIOM_DRIVER_LAM_GET_MON_INPUT_INDEX(monInput) ((monInput >> 0) & 0xFF)

Functions

void | IfxIom_Driver_clearAllGlitch (IfxIom_Driver *driver)
Clear all LAM monitor and reference glitch flags. More...
void | IfxIom_Driver_clearHistory (IfxIom_Driver *driver)
Clear the IOM event history. More...
void | IfxIom_Driver_clearLamMonGlitch (IfxIom_Driver_Lam *driver)
Clear the LAM monitor signal glitch flag. More...
void | IfxIom_Driver_clearLamRefGlitch (IfxIom_Driver_Lam *driver)
Clear the LAM reference signal glitch flag. More...
uint32 | IfxIom_Driver_disableEvents (IfxIom_Driver *driver)
Disable all event generation. More...
void | IfxIom_Driver_disableLamEvent (IfxIom_Driver_Lam *driver)
Disable the event generation for the LAM. More...
void | IfxIom_Driver_enableLamEvent (IfxIom_Driver_Lam *driver)
Enable the event genration for the LAM. More...
void | IfxIom_Driver_getHistory (IfxIom_Driver *driver, uint16 *a, uint16 *b, uint16 *c, uint16 *d)
Return the IOM event history. In returned mask value, bit0= LAM0, bit1=LAM1, ... More...
boolean | IfxIom_Driver_init (IfxIom_Driver *driver, IfxIom_Driver_Config *config)
Initialize the IOM Must be called before IfxIom_Driver_initLam() More...
void | IfxIom_Driver_initConfig (IfxIom_Driver_Config *config, Ifx_IOM *module)
Set the IOM default configuration. More...
boolean | IfxIom_Driver_initLam (IfxIom_Driver_Lam *driver, IfxIom_Driver_LamConfig *config)
Initialize the LAM channel. More...
void | IfxIom_Driver_initLamConfig (IfxIom_Driver_LamConfig *config, IfxIom_Driver *driver)
Set the LAM default configuration. More...
void | IfxIom_Driver_isLamMonGlitch (IfxIom_Driver_Lam *driver, boolean *risingEdgeGlitch, boolean *fallingEdgeGlitch)
Return the LAM monitor glitch flags. More...
void | IfxIom_Driver_isLamRefGlitch (IfxIom_Driver_Lam *driver, boolean *risingEdgeGlitch, boolean *fallingEdgeGlitch)
Return the LAM reference glitch flags. More...
void | IfxIom_Driver_restoreEvents (IfxIom_Driver *driver, uint32 mask)
Restore the IOM event mask. More...

Detailed Description

IOM DRIVER details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxIom_Driver.c.

Macro Definition Documentation

◆ IFXIOM_DRIVER_LAM_GET_MON_INPUT_INDEX

#define IFXIOM_DRIVER_LAM_GET_MON_INPUT_INDEX ( monInput ) ((monInput >> 0) & 0xFF)

Definition at line 60 of file IfxIom_Driver.c.

Referenced by IfxIom_Driver_initLam().

◆ IFXIOM_DRIVER_LAM_GET_MON_INPUT_SIGNAL

#define IFXIOM_DRIVER_LAM_GET_MON_INPUT_SIGNAL ( monInput ) ((IfxIom_MonInputSignal)((monInput >> 8) & 0xFF))

Definition at line 56 of file IfxIom_Driver.c.

Referenced by IfxIom_Driver_initLam().

◆ IFXIOM_DRIVER_LAM_GET_REF_INPUT_INDEX

#define IFXIOM_DRIVER_LAM_GET_REF_INPUT_INDEX ( refInput ) ((refInput >> 0) & 0xFF)

Definition at line 58 of file IfxIom_Driver.c.

Referenced by IfxIom_Driver_initLam().

◆ IFXIOM_DRIVER_LAM_GET_REF_INPUT_SIGNAL

#define IFXIOM_DRIVER_LAM_GET_REF_INPUT_SIGNAL ( refInput ) ((IfxIom_RefInputSignal)((refInput >> 8) & 0xFF))

Definition at line 54 of file IfxIom_Driver.c.

Referenced by IfxIom_Driver_initLam().


iLLD_TC38A: IfxIom_Iom.c File Reference

  • Iom
  • Iom
Functions
IfxIom_Iom.c File Reference

IOM IOM details. More...

#include "IfxIom_Iom.h"
Include dependency graph for IfxIom_Iom.c:

Go to the source code of this file.

Functions

void | IfxIom_Iom_clearFpcEdges (IfxIom_Iom_FpcConfig *fpcConfig, IfxIom_Iom *iom)
clear the falling and rising edges which are detected. More...
void | IfxIom_Iom_deInitModule (IfxIom_Iom *iom)
Reset the IOM module. More...
boolean | IfxIom_Iom_initAnalyser (IfxIom_Iom *iom, const IfxIom_Iom_LamConfig *lamConfig)
Initializes the Logic Analyser Module for internal event generation. More...
void | IfxIom_Iom_initAnalyserConfig (IfxIom_Iom_LamConfig *lamConfig)
Initializes the default Logic Analyser Module buffer. More...
boolean | IfxIom_Iom_initCombiner (IfxIom_Iom *iom, const IfxIom_Iom_EcmConfig *ecmConfig)
Initializes the Event Combiner Module for Global event. More...
void | IfxIom_Iom_initCombinerConfig (IfxIom_Iom_EcmConfig *ecmConfig)
Initializes the default Event Combiner Module buffer. More...
boolean | IfxIom_Iom_initFpcChannel (IfxIom_Iom *iom, const IfxIom_Iom_FpcConfig *fpcConfig)
Initializes the Filter & Prescaler Cell for filtering the signals. More...
void | IfxIom_Iom_initFpcChannelConfig (IfxIom_Iom_FpcConfig *fpcConfig)
Initializes the default Filter & Prescaler Cell buffer. More...
boolean | IfxIom_Iom_initModule (IfxIom_Iom *iom)
Initialize the IOM module with supplied configuration. More...
void | IfxIom_Iom_initModuleConfig (IfxIom_Iom *iom, Ifx_IOM *module)
Initializes the Module default configuration buffer. More...

Detailed Description

IOM IOM details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxIom_Iom.c.


iLLD_TC38A: IfxLldVersion.h File Reference

Macros
IfxLldVersion.h File Reference

Go to the source code of this file.

Macros

#define | IFX_LLD_VERSION_GENERATION 1
Indicates the driver generation. More...
#define | IFX_LLD_VERSION_MAJOR 0
Informs about changes which could lead to incompatibilities. More...
#define | IFX_LLD_VERSION_MAJOR_UPDATE 1
Informs about a release for a new derivative without further API changes. More...
#define | IFX_LLD_VERSION_MINOR 12
Informs about new additions to the library. More...
#define | IFX_LLD_VERSION_REVISION 0
Informs about patches and/or documentation changes. More...

Macro Definition Documentation

◆ IFX_LLD_VERSION_GENERATION

#define IFX_LLD_VERSION_GENERATION 1

Indicates the driver generation.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition at line 43 of file IfxLldVersion.h.

◆ IFX_LLD_VERSION_MAJOR

#define IFX_LLD_VERSION_MAJOR 0

Informs about changes which could lead to incompatibilities.

Definition at line 44 of file IfxLldVersion.h.

◆ IFX_LLD_VERSION_MAJOR_UPDATE

#define IFX_LLD_VERSION_MAJOR_UPDATE 1

Informs about a release for a new derivative without further API changes.

Definition at line 45 of file IfxLldVersion.h.

◆ IFX_LLD_VERSION_MINOR

#define IFX_LLD_VERSION_MINOR 12

Informs about new additions to the library.

Definition at line 46 of file IfxLldVersion.h.

◆ IFX_LLD_VERSION_REVISION

#define IFX_LLD_VERSION_REVISION 0

Informs about patches and/or documentation changes.

Definition at line 47 of file IfxLldVersion.h.


iLLD_TC38A: IfxMsc.c File Reference

  • Msc
  • Std
Functions
IfxMsc.c File Reference

MSC basic functionality. More...

#include "IfxMsc.h"
Include dependency graph for IfxMsc.c:

Go to the source code of this file.

Functions

void | IfxMsc_clearDataFrameInterruptFlag (Ifx_MSC *msc)
clear data frame interrupt flag More...
void | IfxMsc_clearReset (Ifx_MSC *msc)
Clear reset bit of MSC kernel. More...
void | IfxMsc_disableModule (Ifx_MSC *msc)
Disable MSC kernel. More...
uint32 | IfxMsc_downstreamAbraBaudCalculator (uint32 baud)
Get the NDD value for the supplied baud rate when when ABRA block is enabled. More...
uint64 | IfxMsc_downstreamFractionalBaudCalculator (Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is fractional for downstream. More...
uint32 | IfxMsc_downstreamNormalBaudCalculator (Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is normal for downstream. More...
void | IfxMsc_enableModule (Ifx_MSC *msc)
Enable MSC kernel. More...
boolean | IfxMsc_getActiveDataFrameStatus (Ifx_MSC *msc)
get the status of the active data frame More...
Ifx_MSC * | IfxMsc_getAddress (IfxMsc_Index msc)
boolean | IfxMsc_getDataFrameInterruptFlag (Ifx_MSC *msc)
get the status of the data frame interrupt flag More...
IfxMsc_Index | IfxMsc_getIndex (Ifx_MSC *msc)
API to get the resource index of the MSC specified. More...
void | IfxMsc_manualLoadCxModeCommand (Ifx_MSC *msc, IfxMsc_CxModeCommand *command64)
void | IfxMsc_resetModule (Ifx_MSC *msc)
Reset MSC kernel. More...
uint64 | IfxMsc_upstreamFractionalBaudCalculator (Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is fractional. More...
uint32 | IfxMsc_upstreamNormalBaudCalculator (Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is normal. More...
float32 | IfxMsc_getDownstreamAbraBaudrate (Ifx_MSC *msc)
Returns the downstream ABRA baudrate. More...
float32 | IfxMsc_getDownstreamAbraDisabledBaudrate (Ifx_MSC *msc)
Returns the downstream baudrate(with ABRA disabled) More...
float32 | IfxMsc_getDownstreamBaudrate (Ifx_MSC *msc)

Detailed Description

MSC basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxMsc.c.

Function Documentation

◆ IfxMsc_clearDataFrameInterruptFlag()

void IfxMsc_clearDataFrameInterruptFlag ( Ifx_MSC * msc )

clear data frame interrupt flag

Parameters
msc pointer to the base of MSC registers
Returns
None

Definition at line 54 of file IfxMsc.c.

Referenced by IfxMsc_Msc_clearDataFrameInterrupt().

◆ IfxMsc_downstreamFractionalBaudCalculator()

uint64 IfxMsc_downstreamFractionalBaudCalculator | ( | Ifx_MSC * | msc,
 |  | uint32 | baud
 | ) |  |

Get the step value for the supplied baud rate when divider mode is fractional for downstream.

Parameters
msc | pointer to the base of MSC registers
baud | Required baud rate
Returns
Step Value

Definition at line 99 of file IfxMsc.c.

◆ IfxMsc_downstreamNormalBaudCalculator()

uint32 IfxMsc_downstreamNormalBaudCalculator | ( | Ifx_MSC * | msc,
 |  | uint32 | baud
 | ) |  |

Get the step value for the supplied baud rate when divider mode is normal for downstream.

Parameters
msc | Select DataType Ref
baud | Required baud rate
Returns
Step value

Definition at line 112 of file IfxMsc.c.

◆ IfxMsc_getActiveDataFrameStatus()

boolean IfxMsc_getActiveDataFrameStatus ( Ifx_MSC * msc )

get the status of the active data frame

Parameters
msc pointer to the base of MSC registers
Returns
Status TRUE or FALSE

Definition at line 134 of file IfxMsc.c.

Referenced by IfxMsc_Msc_getActiveDataFrameStatus().

◆ IfxMsc_getDataFrameInterruptFlag()

boolean IfxMsc_getDataFrameInterruptFlag ( Ifx_MSC * msc )

get the status of the data frame interrupt flag

Parameters
msc pointer to the base of MSC registers
Returns
Status TRUE or FALSE

Definition at line 157 of file IfxMsc.c.

Referenced by IfxMsc_Msc_getDataFrameInterruptStatus().

◆ IfxMsc_getDownstreamAbraBaudrate()

float32 IfxMsc_getDownstreamAbraBaudrate ( Ifx_MSC * msc )

Returns the downstream ABRA baudrate.

Parameters
msc Pointer to MSC SFR base address
Returns
Downstream ABRA baudrate

Definition at line 261 of file IfxMsc.c.

Referenced by IfxMsc_getDownstreamBaudrate().

◆ IfxMsc_getDownstreamAbraDisabledBaudrate()

float32 IfxMsc_getDownstreamAbraDisabledBaudrate ( Ifx_MSC * msc )

Returns the downstream baudrate(with ABRA disabled)

Parameters
msc Pointer to MSC SFR base address
Returns
Returns the downstream baudrate(in case of ABRA disabled)

Definition at line 275 of file IfxMsc.c.

Referenced by IfxMsc_getDownstreamBaudrate().

◆ IfxMsc_getDownstreamBaudrate()

float32 IfxMsc_getDownstreamBaudrate ( Ifx_MSC * msc )
Parameters
msc Pointer to MSC SFR base address
Returns
Returns the downstream baudrate.

Definition at line 296 of file IfxMsc.c.

◆ IfxMsc_manualLoadCxModeCommand()

void IfxMsc_manualLoadCxModeCommand | ( | Ifx_MSC * | msc,
 |  | IfxMsc_CxModeCommand * | command64
 | ) |  |
Parameters
msc | Pointer to MSC module SFRs
command64 | Command struct to be loaded to DCE & DC
Returns
None

Definition at line 187 of file IfxMsc.c.


iLLD_TC38A: IfxMsc_cfg.c File Reference

  • _Impl
Variables
IfxMsc_cfg.c File Reference

MSC on-chip implementation data. More...

#include "IfxMsc_cfg.h"
Include dependency graph for IfxMsc_cfg.c:

Go to the source code of this file.

Variables

IFX_CONST IfxModule_IndexMap IfxMsc_cfg_indexMap [IFXMSC_NUM_MODULES]

Detailed Description

MSC on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxMsc_cfg.c.

Variable Documentation

◆ IfxMsc_cfg_indexMap

IFX_CONST IfxModule_IndexMap IfxMsc_cfg_indexMap[IFXMSC_NUM_MODULES]
Initial value:
= {
{&MODULE_MSC0, IfxMsc_Index_0},
{&MODULE_MSC1, IfxMsc_Index_1},
{&MODULE_MSC2, IfxMsc_Index_2}
}
IfxMsc_Index_2
"MSC index "+str(x)
Definition: IfxMsc_cfg.h:84
IfxMsc_Index_0
"MSC index "+str(x)
Definition: IfxMsc_cfg.h:82
IfxMsc_Index_1
"MSC index "+str(x)
Definition: IfxMsc_cfg.h:83

Definition at line 54 of file IfxMsc_cfg.c.

Referenced by IfxMsc_getAddress(), and IfxMsc_getIndex().


iLLD_TC38A: IfxMsc_Msc.c File Reference

  • Msc
  • Msc
Functions
IfxMsc_Msc.c File Reference

MSC MSC details. More...

#include "IfxMsc_Msc.h"
Include dependency graph for IfxMsc_Msc.c:

Go to the source code of this file.

Functions

void | IfxMsc_Msc_deInitModule (IfxMsc_Msc *msc)
de-initialize MSC module More...
IfxMsc_Target | IfxMsc_Msc_getTarget (IfxMsc_Msc *msc, IfxMsc_Msc_Target target)
get the target during high and low phase More...
void | IfxMsc_Msc_initModule (IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
initialize the MSC module More...
void | IfxMsc_Msc_initModuleConfig (IfxMsc_Msc_Config *config, Ifx_MSC *msc)
initialize the MSC module configuration More...
void | IfxMsc_Msc_initializeAbra (IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
initialize the ABRA block More...
void | IfxMsc_Msc_initializeDataExtension (IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
initialize the MSC data extension block for 64bit operation More...
uint32 | IfxMsc_Msc_receiveData (IfxMsc_Msc *msc, uint8 upstreamIdx)
receive upstream data More...
void | IfxMsc_Msc_sendCommand (IfxMsc_Msc *msc, uint32 command)
send downstream command More...
void | IfxMsc_Msc_sendData (IfxMsc_Msc *msc, uint16 dataLow, uint16 dataHigh)
send complete downstream data, both high and low More...
void | IfxMsc_Msc_sendDataExtension (IfxMsc_Msc *msc, uint32 data, uint32 dataExtension)
Send downstream data extension (64bit) More...
void | IfxMsc_Msc_sendDataHigh (IfxMsc_Msc *msc, uint16 data)
send high downstream data More...
void | IfxMsc_Msc_sendDataLow (IfxMsc_Msc *msc, uint16 data)
send high downstream data More...
void | IfxMsc_Msc_setCommandTarget (IfxMsc_Msc *msc, IfxMsc_Target enX)
set the command for target More...
void | IfxMsc_Msc_setDataTarget (IfxMsc_Msc *msc, IfxMsc_Target enXHigh, IfxMsc_Target enXLow)
set the target data to be transmitted during low and high phase More...
void | IfxMsc_Msc_initializeCommandExtension (IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)

Detailed Description

MSC MSC details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxMsc_Msc.c.


iLLD_TC38A: IfxMtu.c File Reference

  • Mtu
  • Std
Macros | Functions
IfxMtu.c File Reference

MTU basic functionality. More...

#include "IfxMtu.h"
Include dependency graph for IfxMtu.c:

Go to the source code of this file.

Macros

#define | IFXMTU_SET_GLOBAL_SAFETY_ENDINIT()
Set Global safety endinit.
Note: IFXMTU_SET_GLOBAL_SAFETY_ENDINIT() function macros is added to avoid issues with tasking compiler
when higher optimization is enabled. More...
#define | IFXMTU_CLEAR_GLOBAL_SAFETY_ENDINIT()
Clear Global safety endinit.
Note: IFXMTU_CLEAR_GLOBAL_SAFETY_ENDINIT() function macros is added to avoid issues with tasking compiler
when higher optimization is enabled. More...
#define | IFXMTU_CLEAR_SRAM_MCONTROL_CONFIG (0x4000 | (1U << IFX_MTU_MC_MCONTROL_SRAM_CLR_OFF))

Functions

IFX_STATIC void | IfxMtu_runMbistConfigMtest (const IfxMtu_MbistConfig *mbistConfig)
IFX_STATIC void | IfxMtu_runMbistConfigRange (const IfxMtu_MbistConfig *mbistConfig)
IFX_STATIC void | IfxMtu_runMbistClearRam (const IfxMtu_MbistConfig *mbistConfig)
IFX_STATIC void | IfxMtu_runMbistConfigPatterns (const IfxMtu_MbistConfig *mbistConfig)
IFX_STATIC boolean | IfxMtu_runMbistEnd (uint32 testsDone)
void | IfxMtu_clearErrorTracking (IfxMtu_MbistSel mbistSel)
Clears the error tracking registers (ETRR), valid and overflow bits. More...
void | IfxMtu_clearSram (IfxMtu_MbistSel mbistSel)
Function to Clear the MBIST SRAM (Synchronous mode). Note: The function clears & sets safety endinit bit while running the test to prevent watchdog TO and automatically restores the endinit state (same state at the time of entering the function) at the end. More...
void | IfxMtu_clearSramContinue (IfxMtu_MbistSel mbistSel)
This Function should be called after MBIST Clear SRAM operation is completed. Note: The function should be called with safety endinit bit cleared. More...
void | IfxMtu_clearSramStart (IfxMtu_MbistSel mbistSel)
This Function triggers the Clear the MBIST SRAM operation (Asynchronous operation). It doesn't wait till the end of operation. The application has to poll the Mbist status (IfxMtu_isMbistDone()) in a task and once the operation is done, the IfxMtu_clearSramContinue() function should be called to complete the operation. Alternately the application can enable the "memory test done" interrupt. And in the ISR, the IfxMtu_clearSramContinue() has to be called. If Synchronous usage is need, use IfxMtu_clearSram() function. Note: The function should be called with safety endinit bit cleared. More...
void | IfxMtu_enableErrorTracking (IfxMtu_MbistSel mbistSel, boolean enable)
Enables the tracking of SRAM errors. More...
uint32 | IfxMtu_getSystemAddress (IfxMtu_MbistSel mbistSel, Ifx_MTU_MC_ETRR trackedSramAddress)
Returns the descrambled system address based on a tracked SRAM error which consists of ADDR and MBI (SRAM address and block) More...
uint8 | IfxMtu_getTrackedSramAddresses (IfxMtu_MbistSel mbistSel, Ifx_MTU_MC_ETRR *trackedSramAddresses)
Returns the tracked SRAM error addresses and memory blocks which are stored in the MBIST ETRR registers. More...
boolean | IfxMtu_isTestPass (const IfxMtu_MbistConfig *mbistConfig)
Check if the last MBIST Passed This function shall check for all the configured SSH cells if the tests were passed. More...
void | IfxMtu_readSramAddress (IfxMtu_MbistSel mbistSel, uint16 sramAddress)
uint8 | IfxMtu_runCheckerBoardTest (IfxMtu_MbistSel mbistSel, uint8 rangeSel, uint8 rangeAddrUp, uint8 rangeAddrLow, uint16 *errorAddr, uint32 numberRedundancyLines)
Run CheckerBoard test. This test consists of writing the physical checkerboard pattern into the memory, then reading it back for verification Note: The function clears & sets safety endinit bit while running the test to prevent watchdog TO and automatically restores the endinit state (same state at the time of entering the function) at the end. More...
uint8 | IfxMtu_runMarchUTest (IfxMtu_MbistSel mbistSel, uint8 rangeSel, uint8 rangeAddrUp, uint8 rangeAddrLow, uint16 *errorAddr)
Run March U test. This test MARCHES 0 and 1 values through the memory array in an up and down direction. More precisely, 0 and 1 values are propagated through the memory in each direction; i.e. a single bit cell toggles into each direction with the neighboring cells having a given value and, in another run, the inverse given value. Note: The function clears & sets safety endinit bit while running the test to prevent watchdog TO and automatically restores the endinit state (same state at the time of entering the function) at the end. More...
uint8 | IfxMtu_runNonDestructiveInversionTest (IfxMtu_MbistSel mbistSel, uint8 rangeSel, uint8 rangeAddrUp, uint8 rangeAddrLow, uint16 *errorAddr)
This function runs the Non-Destructive Inversion test algorithm. Non-Destructive Inversion test can be considered as a simple linear test that is able to find all Stuck-At faults (the cell remains stuck at a value for any operation) without destroying any user data. The test accesses every Word in the address range defined by the RANGE register, four times. Test Steps: More...
void | IfxMtu_writeSramAddress (IfxMtu_MbistSel mbistSel, uint16 sramAddress)
boolean | IfxMtu_runMbistAll (const IfxMtu_MbistConfig *const mbistConfig[])
Run the MBIST on all configured Gang configurations Requirements: 1) This function shall run the tests on all SRAMs, which configured by the SSH structure array 1.1) Address range (already scrambled address info) is made available through configuration 1.2) Part of the test pattern is passed through MCONTROL 2) For each cell, the test shall execute all the configuration patterns as passed through pattern array 2.1) Test for each configuration pattern shall end either for the completion or for the failure 2.2) Test shall only end if the test is finished (with or without pass) or timeout 2.3) Failed test shall not be evaluated (this function only runs the tests) 3) Function shall return TRUE if the test execution for one of the configuration patterns is not finished 4) Function shall return FALSE if the test execution is finished Assumptions of usage: 1) This function is not interrupted. 2) DSPRAM of the CPU on which this function is running is being tested 2) For destructive tests, the tested ram shall be re initialized by user. More...
boolean | IfxMtu_runMbist (const IfxMtu_MbistConfig *mbistConfig)
Run the MBIST on configured Gang configuration Requirements: 1) This function shall run the tests on all SRAMs, which configured by the SSH structure array 1.1) Address range (already scrambled address info) is made available through configuration 1.2) Part of the test pattern is passed through MCONTROL 2) For each cell, the test shall execute all the configuration patterns as passed through pattern array 2.1) Test for each configuration pattern shall end either for the completion or for the failure 2.2) Test shall only end if the test is finished (with or without pass) or timeout 2.3) Failed test shall not be evaluated (this function only runs the tests) 3) Function shall return TRUE if the test execution for one of the configuration patterns is not finished 4) Function shall return FALSE if the test execution is finished Assumptions of usage: 1) This function is not interrupted. 2) DSPRAM of the CPU on which this function is running is being tested 2) For destructive tests, the tested ram shall be re initialized by user. More...

Detailed Description

MTU basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxMtu.c.

Macro Definition Documentation

◆ IFXMTU_CLEAR_GLOBAL_SAFETY_ENDINIT

#define IFXMTU_CLEAR_GLOBAL_SAFETY_ENDINIT ( )
Value:
{ \
MODULE_SCU.SEICON0.U = (0xFFFCU << 16U) | \
((MODULE_SCU.SEICON0.B.EPW ^ 0x003F) << IFX_SCU_SEICON0_EPW_OFF); \
MODULE_SCU.SEICON0.U; \
}

Clear Global safety endinit.
Note: IFXMTU_CLEAR_GLOBAL_SAFETY_ENDINIT() function macros is added to avoid issues with tasking compiler
when higher optimization is enabled.

Definition at line 67 of file IfxMtu.c.

Referenced by IfxMtu_runMbistClearRam(), IfxMtu_runMbistConfigMtest(), IfxMtu_runMbistConfigPatterns(), IfxMtu_runMbistConfigRange(), and IfxMtu_runMbistEnd().

◆ IFXMTU_CLEAR_SRAM_MCONTROL_CONFIG

#define IFXMTU_CLEAR_SRAM_MCONTROL_CONFIG (0x4000 | (1U << IFX_MTU_MC_MCONTROL_SRAM_CLR_OFF))

Definition at line 74 of file IfxMtu.c.

Referenced by IfxMtu_runMbistClearRam().

◆ IFXMTU_SET_GLOBAL_SAFETY_ENDINIT

#define IFXMTU_SET_GLOBAL_SAFETY_ENDINIT ( )
Value:
{ \
MODULE_SCU.SEICON0.U = (0xFFFCU << 16U) | \
((MODULE_SCU.SEICON0.B.EPW ^ 0x003F) << IFX_SCU_SEICON0_EPW_OFF) | \
(1 << IFX_SCU_SEICON0_ENDINIT_OFF); \
MODULE_SCU.SEICON0.U; \
}

Set Global safety endinit.
Note: IFXMTU_SET_GLOBAL_SAFETY_ENDINIT() function macros is added to avoid issues with tasking compiler
when higher optimization is enabled.

Definition at line 56 of file IfxMtu.c.

Referenced by IfxMtu_runMbistClearRam(), IfxMtu_runMbistConfigMtest(), IfxMtu_runMbistConfigPatterns(), IfxMtu_runMbistConfigRange(), and IfxMtu_runMbistEnd().


iLLD_TC38A: IfxMtu_cfg.c File Reference

  • _Impl
Variables
IfxMtu_cfg.c File Reference

Mtu on-chip implementation data. More...

#include "IfxMtu_cfg.h"
#include "Mtu/Std/IfxMtu.h"
Include dependency graph for IfxMtu_cfg.c:

Go to the source code of this file.

Variables

const IfxMtu_SramItem | IfxMtu_sramTable [IFXMTU_NUM_MBIST_TABLE_ITEMS]
const IfxMtu_MbistConfigPattern | nonDestructiveTestPattern []
const IfxMtu_MbistSshConfig | mbistSshConfigGang0 []
const IfxMtu_MbistSshConfig | mbistSshConfigGang1 []
const IfxMtu_MbistSshConfig | mbistSshConfigGang2 []
const IfxMtu_MbistSshConfig | mbistSshConfigGang3 []
const IfxMtu_MbistSshConfig | mbistSshConfigGang4 []
const IfxMtu_MbistSshConfig | mbistSshConfigGang5 []
const IfxMtu_MbistSshConfig | mbistSshConfigGang6 []
const IfxMtu_MbistSshConfig | mbistSshConfigGang7 []
const IfxMtu_MbistConfig | mbistGang0Config
const IfxMtu_MbistConfig | mbistGang1Config
const IfxMtu_MbistConfig | mbistGang2Config
const IfxMtu_MbistConfig | mbistGang3Config
const IfxMtu_MbistConfig | mbistGang4Config
const IfxMtu_MbistConfig | mbistGang5Config
const IfxMtu_MbistConfig | mbistGang6Config
const IfxMtu_MbistConfig | mbistGang7Config
const IfxMtu_MbistConfig *const | mbistGangConfig []

Detailed Description

Mtu on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxMtu_cfg.c.

Variable Documentation

◆ IfxMtu_sramTable

const IfxMtu_SramItem IfxMtu_sramTable[IFXMTU_NUM_MBIST_TABLE_ITEMS]

Definition at line 53 of file IfxMtu_cfg.c.

◆ mbistGang0Config

const IfxMtu_MbistConfig mbistGang0Config
Initial value:
= {
IFXMTU_MBIST_CONFIG_NONDISTTEST_MCONTROL,
sizeof(mbistSshConfigGang0) / sizeof(IfxMtu_MbistSshConfig),
sizeof(nonDestructiveTestPattern) / sizeof(IfxMtu_MbistConfigPattern),
mbistSshConfigGang0,
nonDestructiveTestPattern
}
IFXMTU_MBIST_CONFIG_NONDISTTEST_MCONTROL
#define IFXMTU_MBIST_CONFIG_NONDISTTEST_MCONTROL
Configuration patterns for the MBIST Array of configurations which are used by MCx_CONFIG0 register...
Definition: IfxMtu.h:338
IfxMtu_MbistSshConfig
Definition: IfxMtu.h:377
nonDestructiveTestPattern
const IfxMtu_MbistConfigPattern nonDestructiveTestPattern[]
Definition: IfxMtu_cfg.c:140
mbistSshConfigGang0
const IfxMtu_MbistSshConfig mbistSshConfigGang0[]
Definition: IfxMtu_cfg.c:147
IfxMtu_MbistConfigPattern
Definition: IfxMtu.h:371

Definition at line 465 of file IfxMtu_cfg.c.

◆ mbistGang1Config

const IfxMtu_MbistConfig mbistGang1Config
Initial value:
= {
IFXMTU_MBIST_CONFIG_NONDISTTEST_MCONTROL,
sizeof(mbistSshConfigGang1) / sizeof(IfxMtu_MbistSshConfig),
sizeof(nonDestructiveTestPattern) / sizeof(IfxMtu_MbistConfigPattern),
mbistSshConfigGang1,
nonDestructiveTestPattern
}
mbistSshConfigGang1
const IfxMtu_MbistSshConfig mbistSshConfigGang1[]
Definition: IfxMtu_cfg.c:192
IFXMTU_MBIST_CONFIG_NONDISTTEST_MCONTROL
#define IFXMTU_MBIST_CONFIG_NONDISTTEST_MCONTROL
Configuration patterns for the MBIST Array of configurations which are used by MCx_CONFIG0 register...
Definition: IfxMtu.h:338
IfxMtu_MbistSshConfig
Definition: IfxMtu.h:377
nonDestructiveTestPattern
const IfxMtu_MbistConfigPattern nonDestructiveTestPattern[]
Definition: IfxMtu_cfg.c:140
IfxMtu_MbistConfigPattern
Definition: IfxMtu.h:371

Definition at line 473 of file IfxMtu_cfg.c.

◆ mbistGang2Config

const IfxMtu_MbistConfig mbistGang2Config
Initial value:
= {
IFXMTU_MBIST_CONFIG_NONDISTTEST_MCONTROL,
sizeof(mbistSshConfigGang2) / sizeof(IfxMtu_MbistSshConfig),
sizeof(nonDestructiveTestPattern) / sizeof(IfxMtu_MbistConfigPattern),
mbistSshConfigGang2,
nonDestructiveTestPattern
}
mbistSshConfigGang2
const IfxMtu_MbistSshConfig mbistSshConfigGang2[]
Definition: IfxMtu_cfg.c:216
IFXMTU_MBIST_CONFIG_NONDISTTEST_MCONTROL
#define IFXMTU_MBIST_CONFIG_NONDISTTEST_MCONTROL
Configuration patterns for the MBIST Array of configurations which are used by MCx_CONFIG0 register...
Definition: IfxMtu.h:338
IfxMtu_MbistSshConfig
Definition: IfxMtu.h:377
nonDestructiveTestPattern
const IfxMtu_MbistConfigPattern nonDestructiveTestPattern[]
Definition: IfxMtu_cfg.c:140
IfxMtu_MbistConfigPattern
Definition: IfxMtu.h:371

Definition at line 481 of file IfxMtu_cfg.c.

◆ mbistGang3Config

const IfxMtu_MbistConfig mbistGang3Config
Initial value:
= {
IFXMTU_MBIST_CONFIG_NONDISTTEST_MCONTROL,
sizeof(mbistSshConfigGang3) / sizeof(IfxMtu_MbistSshConfig),
sizeof(nonDestructiveTestPattern) / sizeof(IfxMtu_MbistConfigPattern),
mbistSshConfigGang3,
nonDestructiveTestPattern
}
IFXMTU_MBIST_CONFIG_NONDISTTEST_MCONTROL
#define IFXMTU_MBIST_CONFIG_NONDISTTEST_MCONTROL
Configuration patterns for the MBIST Array of configurations which are used by MCx_CONFIG0 register...
Definition: IfxMtu.h:338
IfxMtu_MbistSshConfig
Definition: IfxMtu.h:377
nonDestructiveTestPattern
const IfxMtu_MbistConfigPattern nonDestructiveTestPattern[]
Definition: IfxMtu_cfg.c:140
mbistSshConfigGang3
const IfxMtu_MbistSshConfig mbistSshConfigGang3[]
Definition: IfxMtu_cfg.c:233
IfxMtu_MbistConfigPattern
Definition: IfxMtu.h:371

Definition at line 489 of file IfxMtu_cfg.c.

◆ mbistGang4Config

const IfxMtu_MbistConfig mbistGang4Config
Initial value:
= {
IFXMTU_MBIST_CONFIG_NONDISTTEST_MCONTROL,
sizeof(mbistSshConfigGang4) / sizeof(IfxMtu_MbistSshConfig),
sizeof(nonDestructiveTestPattern) / sizeof(IfxMtu_MbistConfigPattern),
mbistSshConfigGang4,
nonDestructiveTestPattern
}
IFXMTU_MBIST_CONFIG_NONDISTTEST_MCONTROL
#define IFXMTU_MBIST_CONFIG_NONDISTTEST_MCONTROL
Configuration patterns for the MBIST Array of configurations which are used by MCx_CONFIG0 register...
Definition: IfxMtu.h:338
IfxMtu_MbistSshConfig
Definition: IfxMtu.h:377
nonDestructiveTestPattern
const IfxMtu_MbistConfigPattern nonDestructiveTestPattern[]
Definition: IfxMtu_cfg.c:140
IfxMtu_MbistConfigPattern
Definition: IfxMtu.h:371
mbistSshConfigGang4
const IfxMtu_MbistSshConfig mbistSshConfigGang4[]
Definition: IfxMtu_cfg.c:257

Definition at line 497 of file IfxMtu_cfg.c.

◆ mbistGang5Config

const IfxMtu_MbistConfig mbistGang5Config
Initial value:
= {
IFXMTU_MBIST_CONFIG_NONDISTTEST_MCONTROL,
sizeof(mbistSshConfigGang5) / sizeof(IfxMtu_MbistSshConfig),
sizeof(nonDestructiveTestPattern) / sizeof(IfxMtu_MbistConfigPattern),
mbistSshConfigGang5,
nonDestructiveTestPattern
}
IFXMTU_MBIST_CONFIG_NONDISTTEST_MCONTROL
#define IFXMTU_MBIST_CONFIG_NONDISTTEST_MCONTROL
Configuration patterns for the MBIST Array of configurations which are used by MCx_CONFIG0 register...
Definition: IfxMtu.h:338
IfxMtu_MbistSshConfig
Definition: IfxMtu.h:377
nonDestructiveTestPattern
const IfxMtu_MbistConfigPattern nonDestructiveTestPattern[]
Definition: IfxMtu_cfg.c:140
mbistSshConfigGang5
const IfxMtu_MbistSshConfig mbistSshConfigGang5[]
Definition: IfxMtu_cfg.c:288
IfxMtu_MbistConfigPattern
Definition: IfxMtu.h:371

Definition at line 505 of file IfxMtu_cfg.c.

◆ mbistGang6Config

const IfxMtu_MbistConfig mbistGang6Config
Initial value:
= {
IFXMTU_MBIST_CONFIG_NONDISTTEST_MCONTROL,
sizeof(mbistSshConfigGang6) / sizeof(IfxMtu_MbistSshConfig),
sizeof(nonDestructiveTestPattern) / sizeof(IfxMtu_MbistConfigPattern),
mbistSshConfigGang6,
nonDestructiveTestPattern
}
IFXMTU_MBIST_CONFIG_NONDISTTEST_MCONTROL
#define IFXMTU_MBIST_CONFIG_NONDISTTEST_MCONTROL
Configuration patterns for the MBIST Array of configurations which are used by MCx_CONFIG0 register...
Definition: IfxMtu.h:338
mbistSshConfigGang6
const IfxMtu_MbistSshConfig mbistSshConfigGang6[]
Definition: IfxMtu_cfg.c:333
IfxMtu_MbistSshConfig
Definition: IfxMtu.h:377
nonDestructiveTestPattern
const IfxMtu_MbistConfigPattern nonDestructiveTestPattern[]
Definition: IfxMtu_cfg.c:140
IfxMtu_MbistConfigPattern
Definition: IfxMtu.h:371

Definition at line 513 of file IfxMtu_cfg.c.

◆ mbistGang7Config

const IfxMtu_MbistConfig mbistGang7Config
Initial value:
= {
IFXMTU_MBIST_CONFIG_NONDISTTEST_MCONTROL,
sizeof(mbistSshConfigGang7) / sizeof(IfxMtu_MbistSshConfig),
sizeof(nonDestructiveTestPattern) / sizeof(IfxMtu_MbistConfigPattern),
mbistSshConfigGang7,
nonDestructiveTestPattern
}
mbistSshConfigGang7
const IfxMtu_MbistSshConfig mbistSshConfigGang7[]
Definition: IfxMtu_cfg.c:448
IFXMTU_MBIST_CONFIG_NONDISTTEST_MCONTROL
#define IFXMTU_MBIST_CONFIG_NONDISTTEST_MCONTROL
Configuration patterns for the MBIST Array of configurations which are used by MCx_CONFIG0 register...
Definition: IfxMtu.h:338
IfxMtu_MbistSshConfig
Definition: IfxMtu.h:377
nonDestructiveTestPattern
const IfxMtu_MbistConfigPattern nonDestructiveTestPattern[]
Definition: IfxMtu_cfg.c:140
IfxMtu_MbistConfigPattern
Definition: IfxMtu.h:371

Definition at line 521 of file IfxMtu_cfg.c.

◆ mbistGangConfig

const IfxMtu_MbistConfig* const mbistGangConfig[]
Initial value:
= {
&mbistGang0Config,
&mbistGang1Config,
&mbistGang2Config,
&mbistGang3Config,
&mbistGang4Config,
&mbistGang5Config,
&mbistGang6Config,
&mbistGang7Config,
(void *)0
}
mbistGang3Config
const IfxMtu_MbistConfig mbistGang3Config
Definition: IfxMtu_cfg.c:489
mbistGang4Config
const IfxMtu_MbistConfig mbistGang4Config
Definition: IfxMtu_cfg.c:497
mbistGang5Config
const IfxMtu_MbistConfig mbistGang5Config
Definition: IfxMtu_cfg.c:505
mbistGang6Config
const IfxMtu_MbistConfig mbistGang6Config
Definition: IfxMtu_cfg.c:513
mbistGang7Config
const IfxMtu_MbistConfig mbistGang7Config
Definition: IfxMtu_cfg.c:521
mbistGang2Config
const IfxMtu_MbistConfig mbistGang2Config
Definition: IfxMtu_cfg.c:481
mbistGang1Config
const IfxMtu_MbistConfig mbistGang1Config
Definition: IfxMtu_cfg.c:473
mbistGang0Config
const IfxMtu_MbistConfig mbistGang0Config
Definition: IfxMtu_cfg.c:465

Definition at line 529 of file IfxMtu_cfg.c.

◆ mbistSshConfigGang0

const IfxMtu_MbistSshConfig mbistSshConfigGang0[]

Definition at line 147 of file IfxMtu_cfg.c.

◆ mbistSshConfigGang1

const IfxMtu_MbistSshConfig mbistSshConfigGang1[]
Initial value:
= {
{
IfxMtu_MbistSel_cpu1Dspr,
0x00,
0x7F,
5,
0
},
{
IfxMtu_MbistSel_gtmDpll2,
0x00,
0x3F,
5,
1
},
{
IfxMtu_MbistSel_eray0Mbf,
0x00,
0x1F,
5,
1
}
}
IfxMtu_MbistSel_eray0Mbf
Definition: IfxMtu_cfg.h:144
IfxMtu_MbistSel_gtmDpll2
Definition: IfxMtu_cfg.h:135
IfxMtu_MbistSel_cpu1Dspr
Definition: IfxMtu_cfg.h:107

Definition at line 192 of file IfxMtu_cfg.c.

◆ mbistSshConfigGang2

const IfxMtu_MbistSshConfig mbistSshConfigGang2[]
Initial value:
= {
{
IfxMtu_MbistSel_cpu2Dspr,
0x00,
0x6F,
5,
0
},
{
IfxMtu_MbistSel_eray1Mbf,
0x00,
0x1F,
5,
1
}
}
IfxMtu_MbistSel_eray1Mbf
Definition: IfxMtu_cfg.h:145
IfxMtu_MbistSel_cpu2Dspr
Definition: IfxMtu_cfg.h:112

Definition at line 216 of file IfxMtu_cfg.c.

◆ mbistSshConfigGang3

const IfxMtu_MbistSshConfig mbistSshConfigGang3[]
Initial value:
= {
{
IfxMtu_MbistSel_cpu3Dspr,
0x00,
0x6F,
5,
0
},
{
IfxMtu_MbistSel_cpu3Dlmu,
0x00,
0x3F,
5,
0
},
{
IfxMtu_MbistSel_gtmMcs0Fast,
0x00,
0x1F,
5,
1
}
}
IfxMtu_MbistSel_gtmMcs0Fast
Definition: IfxMtu_cfg.h:130
IfxMtu_MbistSel_cpu3Dlmu
Definition: IfxMtu_cfg.h:121
IfxMtu_MbistSel_cpu3Dspr
Definition: IfxMtu_cfg.h:117

Definition at line 233 of file IfxMtu_cfg.c.

◆ mbistSshConfigGang4

const IfxMtu_MbistSshConfig mbistSshConfigGang4[]
Initial value:
= {
{
IfxMtu_MbistSel_cpu2Dlmu,
0x00,
0x3F,
5,
0
},
{
IfxMtu_MbistSel_lmu0,
0x00,
0x3F,
5,
0
},
{
IfxMtu_MbistSel_cpu0Pspr,
0x00,
0x2F,
5,
0
},
{
IfxMtu_MbistSel_gtmMcs1Slow,
0x00,
0x0F,
5,
1
}
}
IfxMtu_MbistSel_cpu0Pspr
Definition: IfxMtu_cfg.h:104
IfxMtu_MbistSel_cpu2Dlmu
Definition: IfxMtu_cfg.h:116
IfxMtu_MbistSel_lmu0
Definition: IfxMtu_cfg.h:122
IfxMtu_MbistSel_gtmMcs1Slow
Definition: IfxMtu_cfg.h:131

Definition at line 257 of file IfxMtu_cfg.c.

◆ mbistSshConfigGang5

const IfxMtu_MbistSshConfig mbistSshConfigGang5[]

Definition at line 288 of file IfxMtu_cfg.c.

◆ mbistSshConfigGang6

const IfxMtu_MbistSshConfig mbistSshConfigGang6[]

Definition at line 333 of file IfxMtu_cfg.c.

◆ mbistSshConfigGang7

const IfxMtu_MbistSshConfig mbistSshConfigGang7[]
Initial value:
= {
{
IfxMtu_MbistSel_eray1Obf,
0x00,
0x00,
5,
1
},
}
IfxMtu_MbistSel_eray1Obf
Definition: IfxMtu_cfg.h:141

Definition at line 448 of file IfxMtu_cfg.c.

◆ nonDestructiveTestPattern

const IfxMtu_MbistConfigPattern nonDestructiveTestPattern[]
Initial value:
= {
{
IFXMTU_MBIST_CONFIG_NONDISTTEST_CONFIG0,
IFXMTU_MBIST_CONFIG_NONDISTTEST_CONFIG1
}
}
IFXMTU_MBIST_CONFIG_NONDISTTEST_CONFIG0
#define IFXMTU_MBIST_CONFIG_NONDISTTEST_CONFIG0
Definition: IfxMtu.h:340
IFXMTU_MBIST_CONFIG_NONDISTTEST_CONFIG1
#define IFXMTU_MBIST_CONFIG_NONDISTTEST_CONFIG1
Definition: IfxMtu.h:348

Definition at line 140 of file IfxMtu_cfg.c.


iLLD_TC38A: IfxPmsEvr.c File Reference

  • Pms
  • Std
Functions | Variables
IfxPmsEvr.c File Reference

PMS basic functionality. More...

#include "IfxPmsEvr.h"
Include dependency graph for IfxPmsEvr.c:

Go to the source code of this file.

Functions

void | IfxPmsEvr_filterSecondaryConversionResult (Ifx_PMS *pms, IfxPmsEvr_SupplyFilter adcFilterValue, IfxPmsEvr_SupplyMode supply)
filter the each conversion result or avarage of consecutive adc result to compare with threshold More...
uint8 | IfxPmsEvr_getSecondaryAdcResult (Ifx_PMS *pms, IfxPmsEvr_SupplyMode supply)
get secondray ADC result for respective Voltage supply More...
void | IfxPmsEvr_setSecondaryOverVoltageThresholdMv (Ifx_PMS *pms, float32 thresholdLevel, IfxPmsEvr_SupplyMode supply)
set Secondary Over Voltage Threshold level More...
void | IfxPmsEvr_setSecondaryUnderVoltageThresholdMv (Ifx_PMS *pms, float32 thresholdLevel, IfxPmsEvr_SupplyMode supply)
set Secondary under Voltage Threshold level More...

Variables

IFX_CONST IfxPmsEvr_StepDownRegulatorRegConfig IfxPmsEvr_cfgPhase1Default []
IFX_CONST IfxPmsEvr_StepDownRegulatorRegConfig IfxPmsEvr_cfgPhase2Default []
IFX_CONST IfxPmsEvr_StepDownRegulatorRegConfig IfxPmsEvr_cfgPhase3Default []
IFX_CONST IfxPmsEvr_initSequencePhase IfxPmsEvr_cfgPhasesDefault []
IFX_CONST IfxPmsEvr_initSequence IfxPmsEvr_cfgSequenceDefault
IFX_CONST IfxPmsEvr_StepDownRegulatorRegConfig IfxPmsEvr_checkRegValuesDefault []
IFX_CONST IfxPmsEvr_checkRegConfig IfxPmsEvr_checkRegCfgDefault

Detailed Description

PMS basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPmsEvr.c.

Variable Documentation

◆ IfxPmsEvr_cfgPhase1Default

IFX_CONST IfxPmsEvr_StepDownRegulatorRegConfig IfxPmsEvr_cfgPhase1Default[]
Initial value:
= {
{&PMS_EVRSDCOEFF6.U, (0x00873802U), (0xFFFFFFFFU)},
{&PMS_EVRSDCOEFF7.U, (0x0000D066U), (0xFFFFFFFFU)},
{&PMS_EVRSDCOEFF8.U, (0x00073802U), (0xFFFFFFFFU)},
{&PMS_EVRSDCOEFF9.U, (0x00009826U), (0xFFFFFFFFU)},
{&PMS_EVRSDCTRL7.U, (0x000000C9U), (0xFFFFFFFFU)},
{&PMS_EVRSDCTRL0.U, (0x30360001U), (0xFFFFFFFFU)},
{&PMS_EVRSDCTRL1.U, (0x0B690708U), (0xFFFFFFFFU)},
{&PMS_EVRSDCTRL8.U, (0x0121048EU), (0xFFFFFFFFU)},
}

Definition at line 52 of file IfxPmsEvr.c.

◆ IfxPmsEvr_cfgPhase2Default

IFX_CONST IfxPmsEvr_StepDownRegulatorRegConfig IfxPmsEvr_cfgPhase2Default[]
Initial value:
= {
{&PMS_EVRSDCOEFF0.U, (0x350873B6U), (0xFFFFFFFFU)},
{&PMS_EVRSDCOEFF1.U, (0x02946C46U), (0xFFFFFFFFU)},
}

Definition at line 63 of file IfxPmsEvr.c.

◆ IfxPmsEvr_cfgPhase3Default

IFX_CONST IfxPmsEvr_StepDownRegulatorRegConfig IfxPmsEvr_cfgPhase3Default[]
Initial value:
= {
{&PMS_EVRSDCTRL0.U, (0x30360002U), (0xFFFFFFFFU)},
{&PMS_EVRSDCTRL2.U, (0x0036033BU), (0xFFFFFFFFU)},
{&PMS_EVRSDCTRL3.U, (0x0B690810U), (0xFFFFFFFFU)},
{&PMS_EVRSDCOEFF2.U, (0x3408710EU), (0xFFFFFFFFU)},
{&PMS_EVRSDCOEFF3.U, (0x02946C44U), (0xFFFFFFFFU)},
{&PMS_EVRSDCTRL4.U, (0x00360009U), (0xFFFFFFFFU)},
{&PMS_EVRSDCTRL5.U, (0x0B690808U), (0xFFFFFFFFU)},
{&PMS_EVRSDCTRL6.U, (0x00231C94U), (0xFFFFFFFFU)},
{&PMS_EVRSDCOEFF4.U, (0x1B0822B6U), (0xFFFFFFFFU)},
{&PMS_EVRSDCOEFF5.U, (0x02946C46U), (0xFFFFFFFFU)},
{&PMS_EVRSDCTRL9.U, (0x00000434U), (0xFFFFFFFFU)},
{&PMS_EVRSDCTRL10.U, (0x00005A82U), (0xFFFFFFFFU)},
{&PMS_EVRSDCTRL11.U, (0x12070909U), (0xFFFFFFFFU)},
}

Definition at line 71 of file IfxPmsEvr.c.

◆ IfxPmsEvr_cfgPhasesDefault

IFX_CONST IfxPmsEvr_initSequencePhase IfxPmsEvr_cfgPhasesDefault[]
Initial value:
= {
{
sizeof(IfxPmsEvr_cfgPhase1Default) / sizeof(IfxPmsEvr_StepDownRegulatorRegConfig),
IfxPmsEvr_cfgPhase1Default,
(0.00002F)
},
{
sizeof(IfxPmsEvr_cfgPhase2Default) / sizeof(IfxPmsEvr_StepDownRegulatorRegConfig),
IfxPmsEvr_cfgPhase2Default,
(0.00002F)
},
{
sizeof(IfxPmsEvr_cfgPhase3Default) / sizeof(IfxPmsEvr_StepDownRegulatorRegConfig),
IfxPmsEvr_cfgPhase3Default,
(0.00002F)
}
}
IfxPmsEvr_cfgPhase2Default
IFX_CONST IfxPmsEvr_StepDownRegulatorRegConfig IfxPmsEvr_cfgPhase2Default[]
Definition: IfxPmsEvr.c:63
IfxPmsEvr_cfgPhase3Default
IFX_CONST IfxPmsEvr_StepDownRegulatorRegConfig IfxPmsEvr_cfgPhase3Default[]
Definition: IfxPmsEvr.c:71
IfxPmsEvr_StepDownRegulatorRegConfig
Definition: IfxPmsEvr.h:351
IfxPmsEvr_cfgPhase1Default
IFX_CONST IfxPmsEvr_StepDownRegulatorRegConfig IfxPmsEvr_cfgPhase1Default[]
Definition: IfxPmsEvr.c:52

Definition at line 87 of file IfxPmsEvr.c.

◆ IfxPmsEvr_cfgSequenceDefault

IFX_CONST IfxPmsEvr_initSequence IfxPmsEvr_cfgSequenceDefault
Initial value:
= {
sizeof(IfxPmsEvr_cfgPhasesDefault) / sizeof(IfxPmsEvr_initSequencePhase),
IfxPmsEvr_cfgPhasesDefault
}
IfxPmsEvr_initSequencePhase
Definition: IfxPmsEvr.h:358
IfxPmsEvr_cfgPhasesDefault
IFX_CONST IfxPmsEvr_initSequencePhase IfxPmsEvr_cfgPhasesDefault[]
Definition: IfxPmsEvr.c:87

Definition at line 105 of file IfxPmsEvr.c.

◆ IfxPmsEvr_checkRegCfgDefault

IFX_CONST IfxPmsEvr_checkRegConfig IfxPmsEvr_checkRegCfgDefault
Initial value:
= {
sizeof(IfxPmsEvr_checkRegValuesDefault) / sizeof(IfxPmsEvr_StepDownRegulatorRegConfig),
IfxPmsEvr_checkRegValuesDefault
}
IfxPmsEvr_checkRegValuesDefault
IFX_CONST IfxPmsEvr_StepDownRegulatorRegConfig IfxPmsEvr_checkRegValuesDefault[]
Definition: IfxPmsEvr.c:111
IfxPmsEvr_StepDownRegulatorRegConfig
Definition: IfxPmsEvr.h:351

Definition at line 136 of file IfxPmsEvr.c.

◆ IfxPmsEvr_checkRegValuesDefault

IFX_CONST IfxPmsEvr_StepDownRegulatorRegConfig IfxPmsEvr_checkRegValuesDefault[]
Initial value:
= {
{&PMS_EVRSDCOEFF6.U, (0x00873802U), (0xFFFFFFFFU)},
{&PMS_EVRSDCOEFF7.U, (0x0000D066U), (0xFFFFFFFFU)},
{&PMS_EVRSDCOEFF8.U, (0x00073802U), (0xFFFFFFFFU)},
{&PMS_EVRSDCOEFF9.U, (0x00009826U), (0xFFFFFFFFU)},
{&PMS_EVRSDCTRL7.U, (0x000000C9U), (0xFFFFFFFFU)},
{&PMS_EVRSDCTRL1.U, (0x0B690708U), (0xFFFFFFFFU)},
{&PMS_EVRSDCTRL8.U, (0x0121048EU), (0xFFFFFFFFU)},
{&PMS_EVRSDCOEFF0.U, (0x350873B6U), (0xFFFFFFFFU)},
{&PMS_EVRSDCOEFF1.U, (0x02946C46U), (0xFFFFFFFFU)},
{&PMS_EVRSDCTRL0.U, (0x30360002U), (0xFFFFFFFFU)},
{&PMS_EVRSDCTRL2.U, (0x0036033BU), (0xFFFFFFFFU)},
{&PMS_EVRSDCTRL3.U, (0x0B690810U), (0xFFFFFFFFU)},
{&PMS_EVRSDCOEFF2.U, (0x3408710EU), (0xFFFFFFFFU)},
{&PMS_EVRSDCOEFF3.U, (0x02946C44U), (0xFFFFFFFFU)},
{&PMS_EVRSDCTRL4.U, (0x00360009U), (0xFFFFFFFFU)},
{&PMS_EVRSDCTRL5.U, (0x0B690808U), (0xFFFFFFFFU)},
{&PMS_EVRSDCTRL6.U, (0x00231C94U), (0xFFFFFFFFU)},
{&PMS_EVRSDCOEFF4.U, (0x1B0822B6U), (0xFFFFFFFFU)},
{&PMS_EVRSDCOEFF5.U, (0x02946C46U), (0xFFFFFFFFU)},
{&PMS_EVRSDCTRL9.U, (0x00000434U), (0xFFFFFFFFU)},
{&PMS_EVRSDCTRL10.U, (0x00005A82U), (0xFFFFFFFFU)},
{&PMS_EVRSDCTRL11.U, (0x12070909U), (0xFFFFFFFFU)},
}

Definition at line 111 of file IfxPmsEvr.c.


iLLD_TC38A: IfxPmsPm.c File Reference

  • Pms
  • Std
Functions
IfxPmsPm.c File Reference

PMS basic functionality. More...

#include "IfxPmsPm.h"
Include dependency graph for IfxPmsPm.c:

Go to the source code of this file.

Functions

void | IfxPmsPm_setStandbyMode (Ifx_PMS *pms, IfxPmsPm_WakeupConfig *config, IfxPmsPm_RequestPowerMode powerMode)
set system into stand by mode Note: In this API Alarm has been disabled.Enable of SMU alarm has to be taken care seprately at application level More...
boolean | IfxPmsPm_setCoreMode (IfxCpu_ResourceCpu cpuIndex, IfxCpu_CoreMode mode)
Set core mode(Idle/Run) More...
void | IfxPmsPm_enableWakeup (Ifx_PMS *pms, IfxPmsPm_WakeupConfig *wakeup)
Enable Wakeup using PORST/ESR1/PINA/PINB/WUT/SCR/Power. More...
void | IfxPmsPm_configureSupplyMonitoring (Ifx_PMS *pms, IfxPmsPm_VoltageSource source, IfxPmsPm_ThresholdEvent event, IfxPmsPm_RampingMode mode)
void | IfxPmsPm_initStandbyConfig (IfxPmsPm_StandbyConfig *standbyConfig)
This function will initialize the configuration structure with default values. NOTE: More...
void | IfxPmsPm_startStandbySequenceInFlash (IfxPmsPm_StandbyConfig *standbyConfig, const IfxScuCcu_Config *clockConfig)
void | IfxPmsPm_continueStandbySequenceInRAM (IfxPmsPm_StandbyConfig *standbyConfig, const IfxScuCcu_Config *clockConfig)
void | IfxPmsPm_configureWakeup (IfxPmsPm_StandbyConfig *standbyConfig)
void | IfxPmsPm_initSleepConfig (IfxPmsPm_SleepConfig *sleepConfig)
void | IfxPmsPm_startSleepSequenceinFlash (IfxPmsPm_SleepConfig *sleepConfig, IfxScuCcu_Config *clockConfig)
void | IfxPmsPm_continueSleepSequenceInRAM (IfxPmsPm_SleepConfig *sleepConfig)
This is to be placed in PSPR of the Master CPU. More...
void | IfxPmsPm_initiateWakeup (IfxScuCcu_Config *clockConfig)
void | IfxPmsPm_initLoadJumpConfig (IfxPmsPm_LoadJumpConfig *loadJumpConfig)
void | IfxPmsPm_initAndRequestLoadJump (IfxPmsPm_LoadJumpConfig *loadJumpConfig)
void | IfxPmsPm_initVoltageDroopConfig (IfxPmsPm_VoltageDroopConfig *voltageDroopConfig)
void | IfxPmsPm_initAndRequestVoltageDroop (IfxPmsPm_VoltageDroopConfig *voltageDroopConfig)
void | IfxPmsPm_handleStandbyRam (uint32 *dataPointer, uint8 dataSize)
Copies dataSize bytes of data to standby RAM starting at dataPointer and appends the CRC over the copied data to it. More...

Detailed Description

PMS basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPmsPm.c.

Function Documentation

◆ IfxPmsPm_configureSupplyMonitoring()

void IfxPmsPm_configureSupplyMonitoring | ( | Ifx_PMS * | pms,
 |  | IfxPmsPm_VoltageSource | source,
 |  | IfxPmsPm_ThresholdEvent | event,
 |  | IfxPmsPm_RampingMode | mode
 | ) |  |
Parameters
pms | Pointer to PMS SFRs
source | Voltage source to be monitored
event | Type of event to be monitored.
mode | Ramping directions on which event needs to be detected.
Returns
None

Definition at line 306 of file IfxPmsPm.c.

◆ IfxPmsPm_handleStandbyRam()

void IfxPmsPm_handleStandbyRam | ( | uint32 * | dataPointer,
 |  | uint8 | dataSize
 | ) |  |

Copies dataSize bytes of data to standby RAM starting at dataPointer and appends the CRC over the copied data to it.

Parameters
dataPointer | Pointer to beginning of the region containing addresses of the data to be saved. This is in standby RAM
dataSize | Total size(in units of 32 bit word) of the data to be copied
Returns
None

Definition at line 820 of file IfxPmsPm.c.

◆ IfxPmsPm_initAndRequestLoadJump()

void IfxPmsPm_initAndRequestLoadJump ( IfxPmsPm_LoadJumpConfig * loadJumpConfig )
Returns
None

Definition at line 776 of file IfxPmsPm.c.

◆ IfxPmsPm_initAndRequestVoltageDroop()

void IfxPmsPm_initAndRequestVoltageDroop ( IfxPmsPm_VoltageDroopConfig * voltageDroopConfig )
Parameters
voltageDroopConfig Voltage Droop Configuration Structure
Returns
None

Definition at line 805 of file IfxPmsPm.c.

◆ IfxPmsPm_initLoadJumpConfig()

void IfxPmsPm_initLoadJumpConfig ( IfxPmsPm_LoadJumpConfig * loadJumpConfig )
Parameters
loadJumpConfig Initialize the Load Jump configuration
Returns
None

Definition at line 768 of file IfxPmsPm.c.

◆ IfxPmsPm_initVoltageDroopConfig()

void IfxPmsPm_initVoltageDroopConfig ( IfxPmsPm_VoltageDroopConfig * voltageDroopConfig )
Returns
None

Definition at line 790 of file IfxPmsPm.c.


iLLD_TC38A: IfxPort.c File Reference

  • Port
  • Std
Functions
IfxPort.c File Reference

PORT basic functionality. More...

#include "IfxPort.h"
Include dependency graph for IfxPort.c:

Go to the source code of this file.

Functions

boolean | IfxPort_disableEmergencyStop (Ifx_P *port, uint8 pinIndex)
Disable the emergency stop function. This function disables the emergency stop function. A check is done on port functionality. More...
boolean | IfxPort_enableEmergencyStop (Ifx_P *port, uint8 pinIndex)
Enable the emergency stop function. This function enables the emergency stop function. A check is done on port functionality. More...
Ifx_P * | IfxPort_getAddress (IfxPort_Index port)
Returns the module address of the selected Port module. More...
IfxPort_Index | IfxPort_getIndex (Ifx_P *port)
Return port index within IfxModule_IndexMap (defined in IfxPort_cfg.c) More...
void | IfxPort_resetESR (Ifx_P *port, uint8 pinIndex)
Disable the emergency stop function. This function disables the emergency stop function. No check is done on port functionality. More...
void | IfxPort_setESR (Ifx_P *port, uint8 pinIndex)
Enable the emergency stop function. This function enables the emergency stop function. No check is done on port functionality. More...
void | IfxPort_setGroupModeInput (Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_InputMode mode)
Set pin modes to input at the pin location specified by '1' by the mask. More...
void | IfxPort_setGroupModeOutput (Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Set pin modes to output at the pin location specified by '1' by the mask starting at pinIndex. More...
void | IfxPort_setGroupPadDriver (Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_PadDriver padDriver)
Set pad driver strength at the pin location specified by '1' by the mask. More...
void | IfxPort_setPinMode (Ifx_P *port, uint8 pinIndex, IfxPort_Mode mode)
Configure the port input / output mode. Also Configures the P40/P41 Port for digital functionality which bydefault support analog functionality. More...
void | IfxPort_setPinModeLVDS (Ifx_P *port, uint8 pinIndex, IfxPort_Mode pinMode, IfxPort_LvdsConfig *lvds)
set lvds mode More...
void | IfxPort_setPinPadDriver (Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode. More...
void | IfxPort_setPinControllerSelection (Ifx_P *port, uint8 pinIndex)
Enable the Pin Controller Selection. More...
void | IfxPort_resetPinControllerSelection (Ifx_P *port, uint8 pinIndex)
Disable the Pin Controller Selection. More...
void | IfxPort_modifyPinControllerSelection (Ifx_P *port, uint8 pinIndex, boolean mode)

Detailed Description

PORT basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPort.c.

Function Documentation

◆ IfxPort_modifyPinControllerSelection()

void IfxPort_modifyPinControllerSelection | ( | Ifx_P * | port,
 |  | uint8 | pinIndex,
 |  | boolean | mode
 | ) |  |
Parameters
port | Pointer to the port which should be accessed.
pinIndex | Specifies the pin for which the mode has to be set.
mode | Selects the controller for the port pin(Tricore,EVADC,GETH,SCR etc) 0-> normal function 1-> Alternate functionality(SCR pin,EVADC PDD,GETH RGMII/MII etc)
Returns
None

Definition at line 438 of file IfxPort.c.

◆ IfxPort_resetESR()

void IfxPort_resetESR | ( | Ifx_P * | port,
 |  | uint8 | pinIndex
 | ) |  |

Disable the emergency stop function. This function disables the emergency stop function. No check is done on port functionality.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | Specifies the pin for which the emergency stop function should be disabled.
Returns
None
See also
IfxPort_disableEmergencyStop()

Definition at line 135 of file IfxPort.c.

Referenced by IfxPort_disableEmergencyStop().

◆ IfxPort_setESR()

void IfxPort_setESR | ( | Ifx_P * | port,
 |  | uint8 | pinIndex
 | ) |  |

Enable the emergency stop function. This function enables the emergency stop function. No check is done on port functionality.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | Specifies the pin for which the emergency stop function should be enabled.
Returns
None
See also
IfxPort_enableEmergencyStop()

Definition at line 145 of file IfxPort.c.

Referenced by IfxPort_enableEmergencyStop().


iLLD_TC38A: IfxPort_cfg.c File Reference

  • _Impl
Variables
IfxPort_cfg.c File Reference

PORT on-chip implementation data. More...

#include "IfxPort_cfg.h"
Include dependency graph for IfxPort_cfg.c:

Go to the source code of this file.

Variables

IFX_CONST IfxPort_Esr_Masks IfxPort_cfg_esrMasks [IFXPORT_NUM_MODULES]
IFX_CONST IfxModule_IndexMap IfxPort_cfg_indexMap [IFXPORT_NUM_MODULES]

Detailed Description

PORT on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPort_cfg.c.

Variable Documentation

◆ IfxPort_cfg_esrMasks

IFX_CONST IfxPort_Esr_Masks IfxPort_cfg_esrMasks[IFXPORT_NUM_MODULES]
Initial value:
= {
{&MODULE_P00, 0x0000FFFFUL},
{&MODULE_P01, 0x0000FFFFUL},
{&MODULE_P02, 0x0000FFFFUL},
{&MODULE_P10, 0x0000FFFFUL},
{&MODULE_P11, 0x0000FFFFUL},
{&MODULE_P12, 0x0000FFFFUL},
{&MODULE_P13, 0x0000FFFFUL},
{&MODULE_P14, 0x0000FFFFUL},
{&MODULE_P15, 0x0000FFFFUL},
{&MODULE_P20, 0x0000FFFFUL},
{&MODULE_P21, 0x0000FFFFUL},
{&MODULE_P22, 0x0000FFFFUL},
{&MODULE_P23, 0x0000FFFFUL},
{&MODULE_P24, 0x0000FFFFUL},
{&MODULE_P25, 0x0000FFFFUL},
{&MODULE_P26, 0x0000FFFFUL},
{&MODULE_P30, 0x0000FFFFUL},
{&MODULE_P31, 0x0000FFFFUL},
{&MODULE_P32, 0x0000FFFFUL},
{&MODULE_P33, 0x0000FFFFUL},
{&MODULE_P34, 0x0000FFFFUL},
{&MODULE_P40, 0x0000FFFFUL},
{&MODULE_P41, 0x0000FFFFUL},
}

Definition at line 53 of file IfxPort_cfg.c.

Referenced by IfxPort_disableEmergencyStop(), and IfxPort_enableEmergencyStop().

◆ IfxPort_cfg_indexMap

IFX_CONST IfxModule_IndexMap IfxPort_cfg_indexMap[IFXPORT_NUM_MODULES]
Initial value:
= {
{&MODULE_P00, IfxPort_Index_00},
{&MODULE_P01, IfxPort_Index_01},
{&MODULE_P02, IfxPort_Index_02},
{&MODULE_P10, IfxPort_Index_10},
{&MODULE_P11, IfxPort_Index_11},
{&MODULE_P12, IfxPort_Index_12},
{&MODULE_P13, IfxPort_Index_13},
{&MODULE_P14, IfxPort_Index_14},
{&MODULE_P15, IfxPort_Index_15},
{&MODULE_P20, IfxPort_Index_20},
{&MODULE_P21, IfxPort_Index_21},
{&MODULE_P22, IfxPort_Index_22},
{&MODULE_P23, IfxPort_Index_23},
{&MODULE_P24, IfxPort_Index_24},
{&MODULE_P25, IfxPort_Index_25},
{&MODULE_P26, IfxPort_Index_26},
{&MODULE_P30, IfxPort_Index_30},
{&MODULE_P31, IfxPort_Index_31},
{&MODULE_P32, IfxPort_Index_32},
{&MODULE_P33, IfxPort_Index_33},
{&MODULE_P34, IfxPort_Index_34},
{&MODULE_P40, IfxPort_Index_40},
{&MODULE_P41, IfxPort_Index_41}
}
IfxPort_Index_31
PORT 31.
Definition: IfxPort_cfg.h:95
IfxPort_Index_13
PORT 13.
Definition: IfxPort_cfg.h:84
IfxPort_Index_10
PORT 10.
Definition: IfxPort_cfg.h:81
IfxPort_Index_00
PORT 00.
Definition: IfxPort_cfg.h:78
IfxPort_Index_01
PORT 01.
Definition: IfxPort_cfg.h:79
IfxPort_Index_24
PORT 24.
Definition: IfxPort_cfg.h:91
IfxPort_Index_23
PORT 23.
Definition: IfxPort_cfg.h:90
IfxPort_Index_33
PORT 33.
Definition: IfxPort_cfg.h:97
IfxPort_Index_21
PORT 21.
Definition: IfxPort_cfg.h:88
IfxPort_Index_15
PORT 15.
Definition: IfxPort_cfg.h:86
IfxPort_Index_14
PORT 14.
Definition: IfxPort_cfg.h:85
IfxPort_Index_12
PORT 12.
Definition: IfxPort_cfg.h:83
IfxPort_Index_41
PORT 41.
Definition: IfxPort_cfg.h:100
IfxPort_Index_20
PORT 20.
Definition: IfxPort_cfg.h:87
IfxPort_Index_25
PORT 25.
Definition: IfxPort_cfg.h:92
IfxPort_Index_32
PORT 32.
Definition: IfxPort_cfg.h:96
IfxPort_Index_22
PORT 22.
Definition: IfxPort_cfg.h:89
IfxPort_Index_02
PORT 02.
Definition: IfxPort_cfg.h:80
IfxPort_Index_30
PORT 30.
Definition: IfxPort_cfg.h:94
IfxPort_Index_34
PORT 34.
Definition: IfxPort_cfg.h:98
IfxPort_Index_40
PORT 40.
Definition: IfxPort_cfg.h:99
IfxPort_Index_11
PORT 11.
Definition: IfxPort_cfg.h:82
IfxPort_Index_26
PORT 26.
Definition: IfxPort_cfg.h:93

Definition at line 79 of file IfxPort_cfg.c.

Referenced by IfxPort_getAddress(), and IfxPort_getIndex().


iLLD_TC38A: IfxPort_Io.c File Reference

  • Port
  • Io
Functions
IfxPort_Io.c File Reference

PORT IO details. More...

#include "IfxPort_Io.h"
Include dependency graph for IfxPort_Io.c:

Go to the source code of this file.

Functions

void IfxPort_Io_initModule (const IfxPort_Io_Config *config)

Detailed Description

PORT IO details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPort_Io.c.


iLLD_TC38A: IfxPsi5.c File Reference

  • Psi5
  • Std
Functions
IfxPsi5.c File Reference

PSI5 basic functionality. More...

#include "IfxPsi5.h"
Include dependency graph for IfxPsi5.c:

Go to the source code of this file.

Functions

void | IfxPsi5_disableModule (Ifx_PSI5 *psi5)
Disable PSI5 kernel. More...
void | IfxPsi5_enableInterrupt (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel, IfxPsi5_InterruptSource interruptSource, IfxPsi5_InterruptRequest enabled)
enable/disable interrupt source More...
void | IfxPsi5_resetModule (Ifx_PSI5 *psi5)
resets PSI5 kernel More...
void | IfxPsi5_enableModule (Ifx_PSI5 *psi5)

Detailed Description

PSI5 basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPsi5.c.

Function Documentation

◆ IfxPsi5_enableModule()

void IfxPsi5_enableModule ( Ifx_PSI5 * psi5 )
Returns
None

Definition at line 99 of file IfxPsi5.c.


iLLD_TC38A: IfxPsi5_cfg.c File Reference

  • _Impl
IfxPsi5_cfg.c File Reference

PSI5 on-chip implementation data. More...

#include "IfxPsi5_cfg.h"
Include dependency graph for IfxPsi5_cfg.c:

Go to the source code of this file.

Detailed Description

PSI5 on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPsi5_cfg.c.


iLLD_TC38A: IfxPsi5_Psi5.c File Reference

  • Psi5
  • Psi5
Functions
IfxPsi5_Psi5.c File Reference

PSI5 PSI5 details. More...

#include "IfxPsi5_Psi5.h"
Include dependency graph for IfxPsi5_Psi5.c:

Go to the source code of this file.

Functions

void | IfxPsi5_Psi5_deInitModule (IfxPsi5_Psi5 *psi5)
Resets the PSI5 module. More...
void | IfxPsi5_Psi5_enableModule (Ifx_PSI5 *psi5)
Enable PSI5 kernel. More...
uint32 | IfxPsi5_Psi5_getFracDivClock (Ifx_PSI5 *psi5)
Returns the configured fracDiv psi5 clock frequency in Hz. More...
boolean | IfxPsi5_Psi5_initChannel (IfxPsi5_Psi5_Channel *channel, const IfxPsi5_Psi5_ChannelConfig *config)
Initialize the channel with the supplied configuration. More...
void | IfxPsi5_Psi5_initChannelConfig (IfxPsi5_Psi5_ChannelConfig *config, IfxPsi5_Psi5 *psi5)
Get the current channel configuration (e.g. sample settings) More...
boolean | IfxPsi5_Psi5_initModule (IfxPsi5_Psi5 *psi5, const IfxPsi5_Psi5_Config *config)
Initialise the PSI5 with the supplied configureation. More...
void | IfxPsi5_Psi5_initModuleConfig (IfxPsi5_Psi5_Config *config, Ifx_PSI5 *psi5)
Initialise buffer with default PSI5 configuration. More...
uint32 | IfxPsi5_Psi5_initializeClock (Ifx_PSI5 *psi5, const IfxPsi5_Psi5_Clock *clock)
Configure the fracDiv clock. More...
boolean | IfxPsi5_Psi5_readChannelFrame (IfxPsi5_Psi5_Channel *channel, IfxPsi5_Psi5_Frame *frame)
Gets the received psi5 frame for the channel. More...
boolean | IfxPsi5_Psi5_readChannelSerialMessage (IfxPsi5_Psi5_Channel *channel, IfxPsi5_Slot slot, IfxPsi5_Psi5_SerialMessage *message)
Get the received serial message for the channel. More...
void | IfxPsi5_Psi5_resetModule (Ifx_PSI5 *psi5)
Reset PSI5 kernel. More...
boolean | IfxPsi5_Psi5_sendChannelData (IfxPsi5_Psi5_Channel *channel, uint64 data)
Transmit the data through the channel. More...

Detailed Description

PSI5 PSI5 details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPsi5_Psi5.c.


iLLD_TC38A: IfxPsi5s.c File Reference

  • Psi5s
  • Std
Functions
IfxPsi5s.c File Reference

PSI5S basic functionality. More...

#include "IfxPsi5s.h"
Include dependency graph for IfxPsi5s.c:

Go to the source code of this file.

Functions

void | IfxPsi5s_disableAscReceiver (Ifx_PSI5S *psi5s)
Asc receiver is disabled. More...
void | IfxPsi5s_disableModule (Ifx_PSI5S *psi5s)
Disable PSI5S kernel. More...
void | IfxPsi5s_enableAscReceiver (Ifx_PSI5S *psi5s)
Enable ASC receiver. More...
void | IfxPsi5s_enableDisableChannelTriggerCounters (Ifx_PSI5S *psi5s, uint32 channels, uint32 mask)
Enable/disable any combination of channel trigger counters selected by mask parameter. More...
void | IfxPsi5s_enableDisableChannels (Ifx_PSI5S *psi5s, uint32 channels, uint32 mask)
Enable/disable any combination of channels selected by mask parameter. More...
float32 | IfxPsi5s_getBaudrate (Ifx_PSI5S *psi5s, boolean synchMode, boolean divMode, IfxPsi5s_AscBaudratePrescalar baudrateSelection)
Baudrate frequency in HZ. More...
boolean | IfxPsi5s_getReadFrameStatus (Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channelId)
Get the received psi5s frame for the channel. More...
boolean | IfxPsi5s_getSuccessfullyReceivedFrameStatus (Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channelId)
Indicates the successful reception of a frame. More...
void | IfxPsi5s_resetModule (Ifx_PSI5S *psi5s)
resets PSI5S kernel More...
void | IfxPsi5s_startAscTransactions (Ifx_PSI5S *psi5s)
Start ASC transactions. More...
void | IfxPsi5s_stopAscTransactions (Ifx_PSI5S *psi5s)
volatile Ifx_SRC_SRCR * | IfxPsi5s_getSrcAddress (Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channel)
Get address of the SRC register. More...

Detailed Description

PSI5S basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPsi5s.c.

Function Documentation

◆ IfxPsi5s_getSrcAddress()

volatile Ifx_SRC_SRCR* IfxPsi5s_getSrcAddress | ( | Ifx_PSI5S * | psi5s,
 |  | IfxPsi5s_ChannelId | channel
 | ) |  |

Get address of the SRC register.

Parameters
psi5s | Pointer to PSI5S SFR's base address
channel | Channel ID of the channel to get the corresponding SRC pointer

Definition at line 156 of file IfxPsi5s.c.


iLLD_TC38A: IfxPsi5s_Psi5s.c File Reference

  • Psi5s
  • Psi5s
Functions
IfxPsi5s_Psi5s.c File Reference

PSI5S PSI5S details. More...

#include "IfxPsi5s_Psi5s.h"
Include dependency graph for IfxPsi5s_Psi5s.c:

Go to the source code of this file.

Functions

IFX_STATIC uint32 | IfxPsi5s_Psi5s_getFracDivClock (Ifx_PSI5S *psi5s)
get the fracDiv clock frequency More...
IFX_STATIC uint32 | IfxPsi5s_Psi5s_initializeClock (Ifx_PSI5S *psi5s, const IfxPsi5s_Psi5s_Clock *clock)
Configure the fracDiv clock. More...
IFX_STATIC uint32 | IfxPsi5s_Psi5s_setBaudrate (Ifx_PSI5S *psi5s, uint32 baudrate, IfxPsi5s_Psi5s_AscConfig *ascConfig)
Configure the baudrate at the ASC interface. More...
void | IfxPsi5s_Psi5s_deInitModule (IfxPsi5s_Psi5s *psi5s)
De-initialise the PSI5S module. More...
void | IfxPsi5s_Psi5s_enableModule (Ifx_PSI5S *psi5s)
Enable PSI5S kernel. More...
void | IfxPsi5s_Psi5s_getBaudrate (Ifx_PSI5S *psi5s, IfxPsi5s_Psi5s_AscConfig *ascConfig)
get Baud Rate More...
boolean | IfxPsi5s_Psi5s_initChannel (IfxPsi5s_Psi5s_Channel *channel, const IfxPsi5s_Psi5s_ChannelConfig *config)
Initialize the channel with the supplied configuration. More...
void | IfxPsi5s_Psi5s_initChannelConfig (IfxPsi5s_Psi5s_ChannelConfig *config, IfxPsi5s_Psi5s *psi5s)
Initialise buffer with default channel configuration. More...
boolean | IfxPsi5s_Psi5s_initModule (IfxPsi5s_Psi5s *psi5s, const IfxPsi5s_Psi5s_Config *config)
Initialise the PSI5S with the supplied configureation. More...
void | IfxPsi5s_Psi5s_initModuleConfig (IfxPsi5s_Psi5s_Config *config, Ifx_PSI5S *psi5s)
Initialise buffer with default PSI5S configuration. More...
void | IfxPsi5s_Psi5s_readFrame (IfxPsi5s_Psi5s_Channel *channel, IfxPsi5s_Psi5s_Frame *frame)
Get the received psi5s frame for the channel. More...
void | IfxPsi5s_Psi5s_resetModule (Ifx_PSI5S *psi5s)
Reset PSI5S kernel. More...
boolean | IfxPsi5s_Psi5s_sendChannelData (IfxPsi5s_Psi5s_Channel *channel, uint32 data)
Transmit the data through the channel. More...

Detailed Description

PSI5S PSI5S details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPsi5s_Psi5s.c.


iLLD_TC38A: IfxQspi.c File Reference

  • Qspi
  • Std
Macros | Functions
IfxQspi.c File Reference

QSPI basic functionality. More...

#include "IfxQspi.h"
Include dependency graph for IfxQspi.c:

Go to the source code of this file.

Macros

#define | ABCQMIN (4)
#define | ABCQMAX (8 * 63)

Functions

float | IfxQspi_calcRealBaudrate (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId)
Function to calculate baudrate of specified channel. More...
uint32 | IfxQspi_calculateBasicConfigurationValue (Ifx_QSPI *qspi, const IfxQspi_ChannelId channelId, const SpiIf_ChMode *chMode, const float baudrate)
Function to calculate BACON register values. More...
uint32 | IfxQspi_calculateExtendedConfigurationValue (Ifx_QSPI *qspi, const uint8 cs, const SpiIf_ChConfig *chConfig)
Function to calculate ECON register values. More...
uint32 | IfxQspi_calculatePrescaler (Ifx_QSPI *qspi, float baudrate)
Function to calculate prescaler. More...
uint32 | IfxQspi_calculateTimeQuantumLength (Ifx_QSPI *qspi, float maxBaudrate)
Specifies the function to calculate Time quantum length. More...
Ifx_QSPI * | IfxQspi_getAddress (IfxQspi_Index qspi)
IfxQspi_Index | IfxQspi_getIndex (Ifx_QSPI *qspi)
Specifies the function to get Index. More...
void | IfxQspi_read16 (Ifx_QSPI *qspi, uint16 *data, Ifx_SizeT count)
Reads 16bit data from the Rx FIFO. More...
void | IfxQspi_read32 (Ifx_QSPI *qspi, uint32 *data, Ifx_SizeT count)
Reads 32bit data from the Rx FIFO. More...
void | IfxQspi_read8 (Ifx_QSPI *qspi, uint8 *data, Ifx_SizeT count)
Reads 8bit data from the Rx FIFO. More...
uint32 | IfxQspi_recalcBasicConfiguration (uint32 oldBACON, Ifx_SizeT numOfData, boolean shortData, boolean lastData)
Re-calculated BACON from the oldBACON. More...
void | IfxQspi_resetModule (Ifx_QSPI *qspi)
resets QSPI kernel More...
void | IfxQspi_setSlaveSelectOutputControl (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, boolean outputEnable, boolean activeLevel)
Configures a Slave Select Output. More...
void | IfxQspi_write16 (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint16 *data, Ifx_SizeT count)
Writes 16bit data into the Tx FIFO. More...
void | IfxQspi_write32 (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 *data, Ifx_SizeT count)
Writes 32bit data into the Tx FIFO. More...
void | IfxQspi_write8 (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 *data, Ifx_SizeT count)
Writes 8bit data into the Tx FIFO. More...
void | IfxQspi_calculateDelayConstants (const Ifx_QSPI *qspi, const IfxQspi_ChannelId channelId, const SpiIf_ChMode *chMode, IfxQspi_DelayConst *delayConst)
Calculates the Delay constants (pre and delay) from the user specified CS delays. More...

Detailed Description

QSPI basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxQspi.c.

Macro Definition Documentation

◆ ABCQMAX

#define ABCQMAX (8 * 63)

Referenced by IfxQspi_calculateTimeQuantumLength().

◆ ABCQMIN

#define ABCQMIN (4)

Referenced by IfxQspi_calculateTimeQuantumLength().


iLLD_TC38A: IfxQspi_cfg.c File Reference

  • _Impl
Variables
IfxQspi_cfg.c File Reference

QSPI on-chip implementation data. More...

#include "IfxQspi_cfg.h"
Include dependency graph for IfxQspi_cfg.c:

Go to the source code of this file.

Variables

IFX_CONST IfxModule_IndexMap IfxQspi_cfg_indexMap [IFXQSPI_NUM_MODULES]

Detailed Description

QSPI on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxQspi_cfg.c.

Variable Documentation

◆ IfxQspi_cfg_indexMap

IFX_CONST IfxModule_IndexMap IfxQspi_cfg_indexMap[IFXQSPI_NUM_MODULES]
Initial value:
= {
{&MODULE_QSPI0, IfxQspi_Index_0},
{&MODULE_QSPI1, IfxQspi_Index_1},
{&MODULE_QSPI2, IfxQspi_Index_2},
{&MODULE_QSPI3, IfxQspi_Index_3},
{&MODULE_QSPI4, IfxQspi_Index_4}
}
IfxQspi_Index_2
QSPI index 2.
Definition: IfxQspi_cfg.h:84
IfxQspi_Index_1
QSPI index 1.
Definition: IfxQspi_cfg.h:83
IfxQspi_Index_3
QSPI index 3.
Definition: IfxQspi_cfg.h:85
IfxQspi_Index_4
QSPI index 4.
Definition: IfxQspi_cfg.h:86
IfxQspi_Index_0
QSPI index 0.
Definition: IfxQspi_cfg.h:82

Definition at line 54 of file IfxQspi_cfg.c.

Referenced by IfxQspi_getAddress(), and IfxQspi_getIndex().


iLLD_TC38A: IfxQspi_SpiMaster.c File Reference

  • Qspi
  • SpiMaster
Functions
IfxQspi_SpiMaster.c File Reference

QSPI SPIMASTER details. More...

#include "IfxQspi_SpiMaster.h"
Include dependency graph for IfxQspi_SpiMaster.c:

Go to the source code of this file.

Functions

IFX_STATIC IfxQspi_SpiMaster_Channel * | IfxQspi_SpiMaster_activeChannel (IfxQspi_SpiMaster *handle)
Gets current active channel. More...
IFX_STATIC void | IfxQspi_SpiMaster_activateSlso (IfxQspi_SpiMaster_Channel *chHandle)
Active the SLSO pin. More...
IFX_STATIC void | IfxQspi_SpiMaster_deactivateSlso (IfxQspi_SpiMaster_Channel *chHandle)
Deactive the SLSO pin. More...
IFX_STATIC SpiIf_Status | IfxQspi_SpiMaster_lock (IfxQspi_SpiMaster *handle)
Locks the transfer and gets the current status of it. More...
IFX_STATIC void | IfxQspi_SpiMaster_read (IfxQspi_SpiMaster_Channel *chHandle)
Reads data from the Rx FIFO. More...
IFX_STATIC void | IfxQspi_SpiMaster_unlock (IfxQspi_SpiMaster *handle)
Unlocks the transfers. More...
IFX_STATIC void | IfxQspi_SpiMaster_write (IfxQspi_SpiMaster_Channel *chHandle)
Writes data into the Tx FIFO. More...
IFX_STATIC void | IfxQspi_SpiMaster_writeLong (IfxQspi_SpiMaster_Channel *chHandle)
Writes Long/xxl data into the Tx FIFO. More...
SpiIf_Status | IfxQspi_SpiMaster_exchange (IfxQspi_SpiMaster_Channel *chHandle, const void *src, void *dest, Ifx_SizeT count)
Exchanges data between source and data. More...
SpiIf_ChConfig | IfxQspi_SpiMaster_getChannelConfig (IfxQspi_SpiMaster_Channel *chHandle)
Gets the channel configuration. More...
SpiIf_Status | IfxQspi_SpiMaster_getStatus (IfxQspi_SpiMaster_Channel *chHandle)
Gets the transmission status. More...
SpiIf_Status | IfxQspi_SpiMaster_initChannel (IfxQspi_SpiMaster_Channel *chHandle, const IfxQspi_SpiMaster_ChannelConfig *chConfig)
Initializes the channel. More...
void | IfxQspi_SpiMaster_initChannelConfig (IfxQspi_SpiMaster_ChannelConfig *chConfig, IfxQspi_SpiMaster *handle)
Fills the config structure with default values. More...
void | IfxQspi_SpiMaster_initModule (IfxQspi_SpiMaster *handle, const IfxQspi_SpiMaster_Config *config)
Initialises the module. More...
void | IfxQspi_SpiMaster_initModuleConfig (IfxQspi_SpiMaster_Config *config, Ifx_QSPI *qspi)
Fills the config structure with default values. More...
void | IfxQspi_SpiMaster_isrDmaReceive (IfxQspi_SpiMaster *qspiHandle)
Transmit interrupt handler. More...
void | IfxQspi_SpiMaster_isrDmaTransmit (IfxQspi_SpiMaster *qspiHandle)
Transmit interrupt handler. More...
void | IfxQspi_SpiMaster_isrError (IfxQspi_SpiMaster *handle)
Error Interrupt handler. More...
IfxQspi_PhaseTransitionEvent | IfxQspi_SpiMaster_isrPhaseTransition (IfxQspi_SpiMaster *handle)
Phase Transition interrupt handler. More...
void | IfxQspi_SpiMaster_isrReceive (IfxQspi_SpiMaster *handle)
Receive Interrupt handler. More...
void | IfxQspi_SpiMaster_isrTransmit (IfxQspi_SpiMaster *handle)
Transmit interrupt handler. More...
IfxQspi_PhaseTransitionEvent | IfxQspi_SpiMaster_isrUserDefined (IfxQspi_SpiMaster *handle)
User defined interrupt handler. More...
void | IfxQspi_SpiMaster_moveCounterControlConfiguration (Ifx_QSPI *qspi, IfxQspi_SpiMaster_MoveCounterControl *moveCounter)
void | IfxQspi_SpiMaster_packLongModeBuffer (IfxQspi_SpiMaster_Channel *chHandle, void *data, uint32 *longFifoBuffer, Ifx_SizeT dataLength)
pack data to Long mode buffer More...
SpiIf_Status | IfxQspi_SpiMaster_setChannelBaudrate (IfxQspi_SpiMaster_Channel *chHandle, float32 baudrate)
Set the channel baudrate. More...

Detailed Description

QSPI SPIMASTER details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxQspi_SpiMaster.c.

Function Documentation

◆ IfxQspi_SpiMaster_getChannelConfig()

SpiIf_ChConfig IfxQspi_SpiMaster_getChannelConfig ( IfxQspi_SpiMaster_Channel * chHandle )

Gets the channel configuration.

Parameters
chHandle Module Channel handle
Returns
Channel configuration

Definition at line 182 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_setChannelBaudrate().

◆ IfxQspi_SpiMaster_moveCounterControlConfiguration()

void IfxQspi_SpiMaster_moveCounterControlConfiguration | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_SpiMaster_MoveCounterControl * | moveCounter
 | ) |  |
Parameters
qspi | module register handler
moveCounter | Pointer to move counter structure
Returns
None

Definition at line 775 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_initChannel().

◆ IfxQspi_SpiMaster_setChannelBaudrate()

SpiIf_Status IfxQspi_SpiMaster_setChannelBaudrate | ( | IfxQspi_SpiMaster_Channel * | chHandle,
 |  | float32 | baudrate
 | ) |  |

Set the channel baudrate.

Parameters
chHandle | Module Channel handle
baudrate | Baudrate to be configured (in Baud)
Returns
Status of Channel (busy or ok or failure)

Definition at line 909 of file IfxQspi_SpiMaster.c.


iLLD_TC38A: IfxQspi_SpiSlave.c File Reference

  • Qspi
  • SpiSlave
Functions | Variables
IfxQspi_SpiSlave.c File Reference

QSPI SPISLAVE details. More...

#include "IfxQspi_SpiSlave.h"
Include dependency graph for IfxQspi_SpiSlave.c:

Go to the source code of this file.

Functions

IFX_STATIC void | IfxQspi_SpiSlave_read (IfxQspi_SpiSlave *handle)
Reads data from the Rx FIFO. More...
IFX_STATIC void | IfxQspi_SpiSlave_write (IfxQspi_SpiSlave *handle)
Writes data into the Tx FIFO. More...
SpiIf_Status | IfxQspi_SpiSlave_exchange (IfxQspi_SpiSlave *handle, const void *src, void *dest, Ifx_SizeT count)
Exchanges data between source and data. More...
SpiIf_Status | IfxQspi_SpiSlave_getStatus (IfxQspi_SpiSlave *handle)
Gets the transmission status. More...
void | IfxQspi_SpiSlave_initModule (IfxQspi_SpiSlave *handle, const IfxQspi_SpiSlave_Config *config)
Initialises the module. More...
void | IfxQspi_SpiSlave_initModuleConfig (IfxQspi_SpiSlave_Config *config, Ifx_QSPI *qspi)
Fills the config structure with default values. More...
void | IfxQspi_SpiSlave_isrDmaReceive (IfxQspi_SpiSlave *qspiHandle)
Dma receive interrupt handler. More...
void | IfxQspi_SpiSlave_isrDmaTransmit (IfxQspi_SpiSlave *qspiHandle)
Transmit interrupt handler. More...
void | IfxQspi_SpiSlave_isrError (IfxQspi_SpiSlave *handle)
Error Interrupt handler. More...
void | IfxQspi_SpiSlave_isrReceive (IfxQspi_SpiSlave *handle)
Receive Interrupt handler. More...
void | IfxQspi_SpiSlave_isrTransmit (IfxQspi_SpiSlave *handle)
Transmit interrupt handler. More...

Variables

IFX_STATIC uint32 | IfxQspi_SpiSlave_dummyRxValue = 0
dummy variable where recived data is placed More...
IFX_STATIC IFX_CONST uint32 | IfxQspi_SpiSlave_dummyTxValue = ~0
dummy value to be transmitted More...

Detailed Description

QSPI SPISLAVE details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxQspi_SpiSlave.c.


iLLD_TC38A: IfxScu_cfg.c File Reference

  • _Impl
IfxScu_cfg.c File Reference

SCU on-chip implementation data. More...

#include "IfxScu_cfg.h"
Include dependency graph for IfxScu_cfg.c:

Go to the source code of this file.

Detailed Description

SCU on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxScu_cfg.c.


iLLD_TC38A: IfxScuCcu.c File Reference

  • Scu
  • Std
Functions | Variables
IfxScuCcu.c File Reference

SCU basic functionality. More...

#include "IfxScuCcu.h"
Include dependency graph for IfxScuCcu.c:

Go to the source code of this file.

Functions

void | IfxScuCcu_calRGainParameters (IfxScuCcu_ModulationAmplitude modamp, IfxScuCcu_RGain_Values *RGain_P)
void | IfxScuCcu_distributeClock (IfxScuCcu_ClockDistributionConfig *clockDistributionConfig)
API for clock distribution. More...
float32 | IfxScuCcu_getAsclinSFrequency (void)
API to get ASCLINS divider frequency. This API returns the ASCLINS frequency based on the divider value in CCUCON register and fSOURCE. More...
float32 | IfxScuCcu_getBbbFrequency (void)
API to get BBB divider frequency. This API returns the BBBDivider frequency based on the divider value in CCUCON register and the input oscillator. More...
float32 | IfxScuCcu_getCpuFrequency (const IfxCpu_ResourceCpu cpu)
This API returns the Cpu frequency based on the divider value in CCUCON register and fSource frequency. More...
float32 | IfxScuCcu_getFsi2Frequency (void)
API to get FSI2 divider frequency in Hz. This API returns the fFSI2 frequency based on the divider value in CCUCON register and the input oscillator. More...
float32 | IfxScuCcu_getFsiFrequency (void)
API to get FSI divider frequency in Hz. This API returns the fFSI based on the divider value in CCUCON register and the input oscillator. More...
float32 | IfxScuCcu_getMcanFrequency (void)
API to get MCAN divider frequency. This API returns the based on the divider value in CCUCON register and fSOURCE. More...
float32 | IfxScuCcu_getModuleFrequency (void)
get source frequency fSOURCE. This API returns the source frequency based on the configurations with CCUCON register configuration. More...
float32 | IfxScuCcu_getMscFrequency (void)
API to get MSC divider frequency. This API returns the based on the divider value in CCUCON register and fSOURCE. More...
float32 | IfxScuCcu_getPerPllFrequency1 (void)
API to get actual PER PLL1 frequency This API returns the PER PLL1 frequency based on the K2 divider value in PLLCON and the VCO frequency. Fpll1= (Fosc*N)/(P*K2) More...
float32 | IfxScuCcu_getPerPllFrequency2 (void)
API to get actual PER PLL2 (K3 Divider) frequency This API returns the PER PLL2 frequency based on the K3 divider value in PLLCON and the VCO frequency. Fpll2= (Fosc*N)/(P*K3*1.6) // DIVBY = 0, Fpll2= (Fosc*N)/(P*K3*2) // DIVBY = 1. More...
float32 | IfxScuCcu_getPllFrequency (void)
API to get actual Sys PLL output frequency. This API returns the based on the divider values in CCUCON, PLLCON registers and the input oscillator. More...
float32 | IfxScuCcu_getQspiFrequency (void)
API to get Qspi divider frequency. This API returns the based on the divider value in CCUCON register and fSOURCE. More...
float32 | IfxScuCcu_getSourceFrequency (IfxScuCcu_Fsource fsource)
get source frequency fSOURCE. This API returns the source frequency based on the configurations with CCUCON register configuration. More...
float32 | IfxScuCcu_getSpbFrequency (void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider mode and/or SPBDIV divider value in CCUCON registers. More...
float32 | IfxScuCcu_getSriFrequency (void)
API to get SRI divider frequency. This API returns the Sri frequency based on the divider values in CCUCON registers and fSOURCE. More...
boolean | IfxScuCcu_init (const IfxScuCcu_Config *config)
API to initialize the SCU Clock Control Unit. This API initialize the Sys PLL with ramp steps, BUS dividers and Per PLL for the configuration provided by the configuration structure. FSyspll = (Fosc * Nsys)/(Psys * K2sys); Fpll1= (Fosc * Nper)/(Pper * K2per); Fpll2= (Fosc * Nper)/(Pper * K3per * 1.6); // if DIVBY = 0, else Fpll2= (Fosc * Nper)/(Pper * K3per * 2) // if DIVBY = 1. More...
void | IfxScuCcu_initConfig (IfxScuCcu_Config *cfg)
Initializes the clock configuration with default values. More...
void | IfxScuCcu_modulation_init (const IfxScuCcu_Mod_Config *Mod_Cfg)
initialize modulation parameters More...
float32 | IfxScuCcu_setAsclinFFrequency (float32 asclinFFreq)
API to set ASCLINF frequency (with ASCLINF divider) This API configure ASCLINF divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
float32 | IfxScuCcu_setAsclinSFrequency (float32 asclinSFreq)
API to set ASCLINS frequency (with ASCLINS divider) This API configure ASCLINS divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
float32 | IfxScuCcu_setBbbFrequency (float32 bbbFreq)
API to set BBB frequency (with Bbb divider) This API configure Bbb divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
float32 | IfxScuCcu_setCpuFrequency (IfxCpu_ResourceCpu cpu, float32 cpuFreq)
API to set CPU frequency (with CPU divider) This API configure CPU divider values in CCUCON registers. The actual frequency is always depends on the feasibility with the divider value. More...
float32 | IfxScuCcu_setFsi2Frequency (float32 fsi2Freq)
API to set FSI2 frequency (with FSI2 divider) This API configure Fsi2 divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
float32 | IfxScuCcu_setFsiFrequency (float32 fsiFreq)
API to set FSI frequency (with FSI divider) This API configure Fsi divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
float32 | IfxScuCcu_setGethFrequency (float32 gethFreq)
API to set GETH frequency (with GETH divider) This API configure geth divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
float32 | IfxScuCcu_setGtmFrequency (float32 gtmFreq)
API to set GTM frequency (with GTM divider) This API configure GTM divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
float32 | IfxScuCcu_setI2cFrequency (float32 i2cFreq)
API to set I2C frequency (with I2C divider) This API configure adas divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
float32 | IfxScuCcu_setMcanFrequency (float32 mcanFreq)
API to set MCAN frequency (with MCAN divider) This API configure MCAN divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
float32 | IfxScuCcu_setMcanhFrequency (float32 mcanhFreq)
API to set MCANH frequency (with MCANH divider) This API configure mcanh divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
float32 | IfxScuCcu_setMscFrequency (float32 mscFreq)
API to set MSC frequency (with MSC divider) This API configure MSC divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
float32 | IfxScuCcu_setQspiFrequency (float32 qspiFreq)
API to set QSPI frequency (with QSPI divider) This API configure Qspi divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
float32 | IfxScuCcu_setSpbFrequency (float32 spbFreq)
API to set SPB frequency (with SPB divider) This API configure SPB divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
float32 | IfxScuCcu_setSriFrequency (float32 sriFreq)
API to set SRI frequency (with SRI divider) This API configure Sri divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
float32 | IfxScuCcu_setStmFrequency (float32 stmFreq)
API to set STM frequency (with STM divider) This API configure Stm divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
void | IfxScuCcu_switchToBackupClock (const IfxScuCcu_Config *cfg)
API to switch to Backup clock from the current PLL frequency. More...
void | IfxScuCcu_throttleSysPllClock (IfxScuCcu_PllThrottleConfig *pllThrottleConfig)

Variables

IFX_STATIC IFX_CONST IfxScuCcu_FlashWaitstateConfig IfxScuCcu_defaultFlashWaitstateConfig = IFXSCU_CFG_FLASH_WAITSTATE
Flash wait state config. More...
IFX_STATIC IFX_CONST IfxScuCcu_PllStepConfig IfxScuCcu_defaultPllConfigSteps []
This is a structure array and the values are defined at the Scu implementation as a macro. More...
IFX_CONST float32 IfxScuCcu_MA_percent [IfxScuCcu_ModulationAmplitude_count]
IFX_CONST IfxScuCcu_Config IfxScuCcu_defaultClockConfig
IFX_CONST IfxScuCcu_Mod_Config IfxScuCcu_defaultModConfig
uint32 IfxScuCcu_xtalFrequency = IFX_CFG_SCU_XTAL_FREQUENCY

Detailed Description

SCU basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxScuCcu.c.

Function Documentation

◆ IfxScuCcu_calRGainParameters()

void IfxScuCcu_calRGainParameters | ( | IfxScuCcu_ModulationAmplitude | modamp,
 |  | IfxScuCcu_RGain_Values * | RGain_P
 | ) |  |
Parameters
modamp | modulation amplitude
RGain_P | RGain values
Returns
None

Definition at line 100 of file IfxScuCcu.c.

Referenced by IfxScuCcu_modulation_init().

◆ IfxScuCcu_modulation_init()

void IfxScuCcu_modulation_init ( const IfxScuCcu_Mod_Config * Mod_Cfg )

initialize modulation parameters

Parameters
Mod_Cfg modulation configuration
Returns
None

Definition at line 600 of file IfxScuCcu.c.

Referenced by IfxScuCcu_init().

◆ IfxScuCcu_throttleSysPllClock()

void IfxScuCcu_throttleSysPllClock ( IfxScuCcu_PllThrottleConfig * pllThrottleConfig )
Returns
None

Definition at line 1405 of file IfxScuCcu.c.

Variable Documentation

◆ IfxScuCcu_defaultClockConfig

IFX_CONST IfxScuCcu_Config IfxScuCcu_defaultClockConfig
Initial value:
= {
IFXSCU_CFG_PLL_INITIAL_STEP,
{
sizeof(IfxScuCcu_defaultPllConfigSteps) / sizeof(IfxScuCcu_PllStepConfig),
IfxScuCcu_defaultPllConfigSteps
},
IFXSCU_CFG_CLK_DISTRIBUTION,
&IfxScuCcu_defaultFlashWaitstateConfig,
&IfxScuCcu_defaultModConfig
}
IfxScuCcu_defaultFlashWaitstateConfig
IFX_STATIC IFX_CONST IfxScuCcu_FlashWaitstateConfig IfxScuCcu_defaultFlashWaitstateConfig
Flash wait state config.
Definition: IfxScuCcu.c:55
IFXSCU_CFG_CLK_DISTRIBUTION
#define IFXSCU_CFG_CLK_DISTRIBUTION
Definition: IfxScu_cfg.h:1250
IFXSCU_CFG_PLL_INITIAL_STEP
#define IFXSCU_CFG_PLL_INITIAL_STEP
Definition: IfxScu_cfg.h:553
IfxScuCcu_defaultPllConfigSteps
IFX_STATIC IFX_CONST IfxScuCcu_PllStepConfig IfxScuCcu_defaultPllConfigSteps[]
This is a structure array and the values are defined at the Scu implementation as a macro...
Definition: IfxScuCcu.c:59
IfxScuCcu_defaultModConfig
IFX_CONST IfxScuCcu_Mod_Config IfxScuCcu_defaultModConfig
Definition: IfxScuCcu.c:89
IfxScuCcu_PllStepConfig
Configuration structure type for the Pll Steps for current jump control.
Definition: IfxScuCcu.h:581

Definition at line 76 of file IfxScuCcu.c.

Referenced by IfxScuCcu_initConfig().

◆ IfxScuCcu_defaultFlashWaitstateConfig

IFX_STATIC IFX_CONST IfxScuCcu_FlashWaitstateConfig IfxScuCcu_defaultFlashWaitstateConfig = IFXSCU_CFG_FLASH_WAITSTATE

Flash wait state config.

Definition at line 55 of file IfxScuCcu.c.

◆ IfxScuCcu_defaultModConfig

IFX_CONST IfxScuCcu_Mod_Config IfxScuCcu_defaultModConfig
Initial value:
= {
IfxScuCcu_ModEn_disabled,
IfxScuCcu_ModulationAmplitude_0p5,
}
IfxScuCcu_ModulationAmplitude_0p5
0.5%
Definition: IfxScuCcu.h:350
IfxScuCcu_ModEn_disabled
disable modulation
Definition: IfxScuCcu.h:533

Definition at line 89 of file IfxScuCcu.c.

◆ IfxScuCcu_defaultPllConfigSteps

IFX_STATIC IFX_CONST IfxScuCcu_PllStepConfig IfxScuCcu_defaultPllConfigSteps[]
Initial value:
= {
IFXSCU_CFG_PLL_STEPS
}
IFXSCU_CFG_PLL_STEPS
#define IFXSCU_CFG_PLL_STEPS
Definition: IfxScu_cfg.h:534

This is a structure array and the values are defined at the Scu implementation as a macro.

Definition at line 59 of file IfxScuCcu.c.

◆ IfxScuCcu_MA_percent

IFX_CONST float32 IfxScuCcu_MA_percent[IfxScuCcu_ModulationAmplitude_count]
Initial value:
= {
0.5,
1.0,
1.25,
1.5,
2.0,
2.5
}

Definition at line 67 of file IfxScuCcu.c.

Referenced by IfxScuCcu_calRGainParameters().

◆ IfxScuCcu_xtalFrequency

uint32 IfxScuCcu_xtalFrequency = IFX_CFG_SCU_XTAL_FREQUENCY

Definition at line 94 of file IfxScuCcu.c.


iLLD_TC38A: IfxScuEru.c File Reference

  • Scu
  • Std
Macros | Functions
IfxScuEru.c File Reference

SCU basic functionality. More...

#include "IfxScuEru.h"
Include dependency graph for IfxScuEru.c:

Go to the source code of this file.

Macros

#define | IFXSCUERU_CHANNEL_NUMBER_ODD 1
#define | IFXSCUERU_TO_REGISTER_BASE 1

Functions

void | IfxScuEru_clearAllEventFlags (void)
Clears the external event flag of input channel x (INTFx) More...
void | IfxScuEru_clearEventFlag (IfxScuEru_InputChannel inputChannel)
Clears the external event flag of input channel x (INTFx) More...
void | IfxScuEru_clearInputChannelConfiguration (IfxScuEru_InputChannel inputChannel)
Clears all the configuration for the given input channel x. More...
void | IfxScuEru_clearOutputChannelConfiguration (IfxScuEru_OutputChannel outputChannel)
Clears all the configuration for the given input channel y. More...
void | IfxScuEru_connectTrigger (IfxScuEru_InputChannel inputChannel, IfxScuEru_InputNodePointer triggerSelect)
Determines the destination (output channel) for trigger event (if enabled by Ifx_SCU.EICR[i].B.EIEN(j), i = 0,1,2,3 and j = 0,1). More...
void | IfxScuEru_disableAutoClear (IfxScuEru_InputChannel inputChannel)
Disables the automatic clearing of INTFx when the edge of input channel which has not been selected, is detected. More...
void | IfxScuEru_disableFallingEdgeDetection (IfxScuEru_InputChannel inputChannel)
Disables the falling edge of input channel to set the bit INTF x. More...
void | IfxScuEru_disablePatternDetectionTrigger (IfxScuEru_OutputChannel outputChannel)
Disables the generation of a trigger event for output channel y when the result of the pattern detection changes. More...
void | IfxScuEru_disableRisingEdgeDetection (IfxScuEru_InputChannel inputChannel)
Disables the rising edge of input channel to set the bit INTF x. More...
void | IfxScuEru_disableTriggerPulse (IfxScuEru_InputChannel inputChannel)
Disables the generation of a trigger event for input channel x when the selected edge is detected. More...
void | IfxScuEru_enableAutoClear (IfxScuEru_InputChannel inputChannel)
Enables the automatic clearing of INTFx when the edge of input channel which has not been selected, is detected. More...
void | IfxScuEru_enableFallingEdgeDetection (IfxScuEru_InputChannel inputChannel)
Enables the falling edge of input channel to set the bit INTF x. More...
void | IfxScuEru_enablePatternDetectionTrigger (IfxScuEru_OutputChannel outputChannel)
Enables the generation of a trigger event for output channel y when the result of the pattern detection changes. More...
void | IfxScuEru_enableRisingEdgeDetection (IfxScuEru_InputChannel inputChannel)
Enables the rising edge of input channel to set the bit INTF x. More...
void | IfxScuEru_enableTriggerPulse (IfxScuEru_InputChannel inputChannel)
Enables the generation of a trigger event for input channel x when the selected edge is detected. More...
uint32 | IfxScuEru_getAllEventFlagsStatus (void)
Returns the status of the flags of all input channels. More...
boolean | IfxScuEru_getEventFlagStatus (IfxScuEru_InputChannel inputChannel)
Returns the status of the external event flag of input channel x (INTFx) More...
uint32 | IfxScuEru_getInputChannelConfiguration (IfxScuEru_InputChannel inputChannel)
Returns all the configuration for the given input channel x. More...
uint32 | IfxScuEru_getOutputChannelConfiguration (IfxScuEru_OutputChannel outputChannel)
Clears all the configuration for the given input channel y. More...
boolean | IfxScuEru_getPatternDetectionResult (IfxScuEru_OutputChannel outputChannel)
Returns the status of the pattern detection result of output channel y (PDRy) More...
uint32 | IfxScuEru_getWholePatternDetectionResult (void)
Returns the whole pattern detection result of all the selcted output channels. More...
void | IfxScuEru_selectExternalInput (IfxScuEru_InputChannel inputChannel, IfxScuEru_ExternalInputSelection inputSignal)
Determines which input line is selcted for input channel x. More...
void | IfxScuEru_setEventFlag (IfxScuEru_InputChannel inputChannel)
Sets the external event flag of input channel x (INTFx) More...
void | IfxScuEru_setFlagPatternDetection (IfxScuEru_OutputChannel outputChannel, IfxScuEru_InputChannel inputChannel, boolean state)
Enables the flag INTFx to take part in the pattern detection for output gating. More...
void | IfxScuEru_setInterruptGatingPattern (IfxScuEru_OutputChannel outputChannel, IfxScuEru_InterruptGatingPattern gatingPattern)
Sets the gating pattern of a ouput channel y to determine how the pattern detection influences the output lines GOUT and IOUT. More...

Detailed Description

SCU basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxScuEru.c.

Macro Definition Documentation

◆ IFXSCUERU_CHANNEL_NUMBER_ODD

#define IFXSCUERU_CHANNEL_NUMBER_ODD 1

Definition at line 53 of file IfxScuEru.c.

Referenced by IfxScuEru_clearInputChannelConfiguration(), IfxScuEru_clearOutputChannelConfiguration(), IfxScuEru_connectTrigger(), IfxScuEru_disableAutoClear(), IfxScuEru_disableFallingEdgeDetection(), IfxScuEru_disablePatternDetectionTrigger(), IfxScuEru_disableRisingEdgeDetection(), IfxScuEru_disableTriggerPulse(), IfxScuEru_enableAutoClear(), IfxScuEru_enableFallingEdgeDetection(), IfxScuEru_enablePatternDetectionTrigger(), IfxScuEru_enableRisingEdgeDetection(), IfxScuEru_enableTriggerPulse(), IfxScuEru_getInputChannelConfiguration(), IfxScuEru_getOutputChannelConfiguration(), IfxScuEru_selectExternalInput(), IfxScuEru_setFlagPatternDetection(), and IfxScuEru_setInterruptGatingPattern().

◆ IFXSCUERU_TO_REGISTER_BASE

#define IFXSCUERU_TO_REGISTER_BASE 1

Definition at line 55 of file IfxScuEru.c.

Referenced by IfxScuEru_clearInputChannelConfiguration(), IfxScuEru_clearOutputChannelConfiguration(), IfxScuEru_connectTrigger(), IfxScuEru_disableAutoClear(), IfxScuEru_disableFallingEdgeDetection(), IfxScuEru_disablePatternDetectionTrigger(), IfxScuEru_disableRisingEdgeDetection(), IfxScuEru_disableTriggerPulse(), IfxScuEru_enableAutoClear(), IfxScuEru_enableFallingEdgeDetection(), IfxScuEru_enablePatternDetectionTrigger(), IfxScuEru_enableRisingEdgeDetection(), IfxScuEru_enableTriggerPulse(), IfxScuEru_getInputChannelConfiguration(), IfxScuEru_getOutputChannelConfiguration(), IfxScuEru_selectExternalInput(), IfxScuEru_setFlagPatternDetection(), and IfxScuEru_setInterruptGatingPattern().


iLLD_TC38A: IfxScuLbist.c File Reference

  • Scu
  • Std
Variables
IfxScuLbist.c File Reference

SCU basic functionality. More...

#include "IfxScuLbist.h"
Include dependency graph for IfxScuLbist.c:

Go to the source code of this file.

Variables

IFX_CONST IfxScuLbist_ParameterSet IfxScuLbist_defaultConfig

Detailed Description

SCU basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxScuLbist.c.

Variable Documentation

◆ IfxScuLbist_defaultConfig

IFX_CONST IfxScuLbist_ParameterSet IfxScuLbist_defaultConfig

Definition at line 53 of file IfxScuLbist.c.


iLLD_TC38A: IfxScuRcu.c File Reference

  • Scu
  • Std
Macros | Functions
IfxScuRcu.c File Reference

SCU basic functionality. More...

#include "IfxScuRcu.h"
Include dependency graph for IfxScuRcu.c:

Go to the source code of this file.

Macros

#define IFXSCURCU_PERFORM_RESET_DELAY (90000U)

Functions

IfxScuRcu_ResetCode | IfxScuRcu_evaluateReset (void)
This function Evaluate the Reset and returns the reset cause/details. More...
void | IfxScuRcu_performReset (IfxScuRcu_ResetType resetType, uint16 userResetInfo)
This function triggers system/application reset via software. More...

Detailed Description

SCU basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxScuRcu.c.

Macro Definition Documentation

◆ IFXSCURCU_PERFORM_RESET_DELAY

#define IFXSCURCU_PERFORM_RESET_DELAY (90000U)

Definition at line 53 of file IfxScuRcu.c.

Referenced by IfxScuRcu_performReset().

Function Documentation

◆ IfxScuRcu_evaluateReset()

IfxScuRcu_ResetCode IfxScuRcu_evaluateReset ( void )

This function Evaluate the Reset and returns the reset cause/details.

Returns
Reset code which contains Reset type, trigger and reason details.

Definition at line 59 of file IfxScuRcu.c.

◆ IfxScuRcu_performReset()

void IfxScuRcu_performReset | ( | IfxScuRcu_ResetType | resetType,
 |  | uint16 | userResetInfo
 | ) |  |

This function triggers system/application reset via software.

Parameters
resetType | reset type (only application and system reset are valid)
userResetInfo | user Reset Information
Returns
None

Definition at line 185 of file IfxScuRcu.c.


iLLD_TC38A: IfxScuWdt.c File Reference

  • Scu
  • Std
Macros | Functions
IfxScuWdt.c File Reference

SCU basic functionality. More...

#include "IfxScuWdt.h"
#include "Cpu/Std/IfxCpu.h"
Include dependency graph for IfxScuWdt.c:

Go to the source code of this file.

Macros

#define IFXSCUWDT_RESET_PASSWORD (0x3CU)
Reset password of watchdog module. More...

Functions

void | IfxScuWdt_changeCpuWatchdogPassword (uint16 password, uint16 newPassword)
SCUWDT API to change CPU Watchdog password. More...
void | IfxScuWdt_changeCpuWatchdogReload (uint16 password, uint16 reload)
SCUWDT API to change CPU Watchdog timer reload value. More...
void | IfxScuWdt_changeGlobalEndinitPassword (uint16 password, uint16 newPassword)
API to change global endinit password. More...
void | IfxScuWdt_changeGlobalSafetyEndinitPassword (uint16 password, uint16 newPassword)
API to change global safety endinit password. More...
void | IfxScuWdt_changeSafetyWatchdogPassword (uint16 password, uint16 newPassword)
SCUWDT API to change Safety Watchdog password. More...
void | IfxScuWdt_changeSafetyWatchdogReload (uint16 password, uint16 reload)
SCUWDT API to change Safety Watchdog timer reload value. More...
void | IfxScuWdt_clearCpuEndinit (uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module. More...
void | IfxScuWdt_clearGlobalEndinit (uint16 password)
API to Clear global ENDINIT bit provided by CPU WDT Hardware module. More...
void | IfxScuWdt_clearGlobalSafetyEndinit (uint16 password)
API to Clear global safety ENDINIT bit provided by safety WDT Hardware module. More...
void | IfxScuWdt_clearSafetyEndinit (uint16 password)
SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module. More...
void | IfxScuWdt_disableCpuWatchdog (uint16 password)
SCUWDT API to disable CPU Watchdog functionality. More...
void | IfxScuWdt_disableSafetyWatchdog (uint16 password)
SCUWDT API to disable Safety Watchdog functionality. More...
void | IfxScuWdt_enableCpuWatchdog (uint16 password)
SCUWDT API to enable CPU Watchdog functionality. More...
void | IfxScuWdt_enableSafetyWatchdog (uint16 password)
SCUWDT API to enable Safety Watchdog functionality. More...
uint16 | IfxScuWdt_getCpuWatchdogPassword (void)
SCUWDT API to fetch current password of CPU Watchdog module. More...
boolean | IfxScuWdt_getCpuWatchdogEndInit (void)
SCUWDT API to fetch current endinit of CPU Watchdog module. More...
uint16 | IfxScuWdt_getGlobalEndinitPassword (void)
API to fetch current password of global endinit Watchdog module. More...
uint16 | IfxScuWdt_getGlobalSafetyEndinitPassword (void)
API to fetch current password of global safety endinit Watchdog module. More...
uint16 | IfxScuWdt_getSafetyWatchdogPassword (void)
SCUWDT API to fetch current password of Safety Watchdog module. More...
void | IfxScuWdt_initConfig (IfxScuWdt_Config *config)
SCUWDT API to initialize WDT configuration structure - Constructor This API initialize the ScuWdt configuration structure to default values, these default values are for software specific, not necessarily hardware reset values. User must use this API call before IfxScuWdt_Init API call. More...
void | IfxScuWdt_initCpuWatchdog (Ifx_SCU_WDTCPU *wdt, const IfxScuWdt_Config *config)
SCUWDT API to initialize an instance of WDT Driver which corresponds to CPU WDT Hardware module. More...
void | IfxScuWdt_initSafetyWatchdog (Ifx_SCU_WDTS *wdt, const IfxScuWdt_Config *config)
SCUWDT API to initialize an instance of WDT Driver which corresponds to Safety WDT Hardware module. More...
void | IfxScuWdt_serviceCpuWatchdog (uint16 password)
SCUWDT API to service CPU Watchdog functionality. More...
void | IfxScuWdt_serviceSafetyWatchdog (uint16 password)
SCUWDT API to service Safety Watchdog functionality. More...
void | IfxScuWdt_setCpuEndinit (uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module. More...
void | IfxScuWdt_setGlobalEndinit (uint16 password)
API to set global ENDINIT bit provided by CPU WDT Hardware module. More...
void | IfxScuWdt_setGlobalSafetyEndinit (uint16 password)
API to set global safety ENDINIT bit provided by safety WDT Hardware module. More...
void | IfxScuWdt_setSafetyEndinit (uint16 password)
SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module. More...
boolean | IfxScuWdt_enableWatchdogWithDebugger (void)
Enables the watchdog functionality with debugger connected,
debug interface will also be enabled, if not enabled already. More...
uint8 | IfxScuWdt_getCpuWatchdogStatus (void)
SCUWDT API to fetch current status of CPU Watchdog module. More...

Detailed Description

SCU basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxScuWdt.c.

Macro Definition Documentation

◆ IFXSCUWDT_RESET_PASSWORD

#define IFXSCUWDT_RESET_PASSWORD (0x3CU)

Reset password of watchdog module.

Definition at line 56 of file IfxScuWdt.c.

Referenced by IfxScuWdt_initConfig().

Function Documentation

◆ IfxScuWdt_enableWatchdogWithDebugger()

boolean IfxScuWdt_enableWatchdogWithDebugger ( void )

Enables the watchdog functionality with debugger connected,
debug interface will also be enabled, if not enabled already.

Returns
Status, Success = 0, Failure = 1.

Definition at line 674 of file IfxScuWdt.c.


iLLD_TC38A: IfxSent.c File Reference

  • Sent
  • Std
Functions
IfxSent.c File Reference

SENT basic functionality. More...

#include "IfxSent.h"
Include dependency graph for IfxSent.c:

Go to the source code of this file.

Functions

float32 | IfxSent_getChannelUnitTime (Ifx_SENT *sent, IfxSent_ChannelId channelId)
Returns the current unit time (f_tick) of the given channel. More...
float32 | IfxSent_getModuleClock (Ifx_SENT *sent)
Returns the current module frequency in Hertz. More...
void | IfxSent_initializeChannelUnitTime (Ifx_SENT *sent, IfxSent_ChannelId channelId, float32 tUnit)
Initializes the desired unit time (f_tick) for the external SENT device connected to the given channel. More...
void | IfxSent_initializeModuleClock (Ifx_SENT *sent, IfxSent_ClockDividerMode dividerMode, uint16 stepValue)
Initialize and get the clock for SENT kernel. More...
void | IfxSent_resetModule (Ifx_SENT *sent)
Resets the SENT module. More...

Detailed Description

SENT basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxSent.c.

Function Documentation

◆ IfxSent_getChannelUnitTime()

float32 IfxSent_getChannelUnitTime | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId
 | ) |  |

Returns the current unit time (f_tick) of the given channel.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
Returns
The current unit time in seconds

Definition at line 55 of file IfxSent.c.


iLLD_TC38A: IfxSent_cfg.c File Reference

  • _Impl
IfxSent_cfg.c File Reference

SENT on-chip implementation data. More...

#include "IfxSent_cfg.h"
Include dependency graph for IfxSent_cfg.c:

Go to the source code of this file.

Detailed Description

SENT on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxSent_cfg.c.


iLLD_TC38A: IfxSent_Sent.c File Reference

  • Sent
  • Sent
Functions
IfxSent_Sent.c File Reference

SENT SENT details. More...

#include "IfxSent_Sent.h"
Include dependency graph for IfxSent_Sent.c:

Go to the source code of this file.

Functions

void | IfxSent_Sent_deInitModule (IfxSent_Sent *driver)
Reset the SENT module. More...
boolean | IfxSent_Sent_initChannel (IfxSent_Sent_Channel *channel, const IfxSent_Sent_ChannelConfig *config)
Initialize the channel with the supplied configuration. More...
void | IfxSent_Sent_initChannelConfig (IfxSent_Sent_ChannelConfig *config, IfxSent_Sent *driver)
Initialise channel buffer with default SENT channel configuration. More...
boolean | IfxSent_Sent_initModule (IfxSent_Sent *driver, const IfxSent_Sent_Config *config)
Initialise the SENT with the supplied configureation. More...
void | IfxSent_Sent_initModuleConfig (IfxSent_Sent_Config *config, Ifx_SENT *sent)
Initialise buffer with default SENT configuration. More...
boolean | IfxSent_Sent_readChannelSerialDataFrame (IfxSent_Sent_Channel *channel, IfxSent_Sent_Frame *frame)
Reads the nibbles recieved in the Data register. More...
boolean | IfxSent_Sent_readChannelSerialMessageFrame (IfxSent_Sent_Channel *channel, IfxSent_Sent_SerialMessageFrame *message)
reads the Serial data recieved and collected over several SENT frames More...

Detailed Description

SENT SENT details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxSent_Sent.c.


iLLD_TC38A: IfxSmu.c File Reference

  • Smu
  • Std
Functions
IfxSmu.c File Reference

SMU basic functionality. More...

#include "IfxSmu.h"
Include dependency graph for IfxSmu.c:

Go to the source code of this file.

Functions

boolean | IfxSmu_activateFSP (void)
This function activates the FSP to indicate a FAULT state on the error pin to the safe state switching device. More...
boolean | IfxSmu_activateRunState (void)
The function allows to switch the SMU peripheral into the RUN fault-free state as requested by the caller. More...
boolean | IfxSmu_clearAlarmStatus (IfxSmu_Alarm alarm)
This function clears SMU alarm status of the requested alarm. It needs to be called after alarm status is read. More...
void | IfxSmu_configAlarmActionPES (uint8 pesAction)
This function configures the PES feature for internal action. Bit0/1/2/3 - SMU_IGCS0/SMU_IGCS1/SMU_IGCS2/SMU_NMI/SMU_CPU_RESET activates PES correspondingly. More...
void | IfxSmu_enableFaultToRunState (boolean enable)
Enable FAULT to RUN State Transition. More...
void | IfxSmu_enablePortEmergencyStop (boolean enable)
Configure FSP (fault Signalling Protocol) Port Emergency Stop. More...
boolean | IfxSmu_getAlarmAction (IfxSmu_Alarm alarm, IfxSmu_InternalAlarmAction *intAlarmAction)
The function provides the FSP action currently configured for the requested alarm. More...
uint32 | IfxSmu_getAlarmGroupDebugStatus (uint8 alarmGroup)
The function provides the alarm group status from the stored debug registers. More...
boolean | IfxSmu_getAlarmStatus (IfxSmu_Alarm alarm)
The function returns the alarm status of requested alarm. More...
boolean | IfxSmu_getRTMissedEvent (uint8 timerNum)
The function returns if any alarms requiring the requested recovery timer was SET while the recovery timer was running. More...
IfxSmu_SmuState | IfxSmu_getSmuState (void)
The function provides the current state of the SMU. More...
void | IfxSmu_lockConfigRegisters (void)
The function locks the SMU configuration registers to prevent any modification to configuration register content. More...
boolean | IfxSmu_releaseFSP (void)
The function switches the SMU peripheral from the FAULT state to the RUN state. More...
void | IfxSmu_setAlarmAction (IfxSmu_Alarm alarm, IfxSmu_InternalAlarmAction intAlarmAction)
The function sets the alarm action for the desired alarm. More...
boolean | IfxSmu_setAlarmStatus (IfxSmu_Alarm alarm)
The API sets the requested alarm. This function can be used by the user software to trigger SW SMU alarm. During the START state of the SMU, it shall be possible to set any of the alarms. However, during the RUN state, only the SW alarms shall be set. More...
void | IfxSmu_setFspMode (IfxSmu_FspMode mode)
Configure FSP (fault Signalling Protocol) mode. More...
boolean | IfxSmu_stopRT (uint8 timerNum)
The API stops the requested recovery timer unit. More...
boolean | IfxSmu_unlockConfigRegisters (void)
The function unlocks the SMU configuration registers for modification. More...
void | IfxSmu_ConfigureInterruptGeneration (IfxSmu_InterruptGenerationConfiguration config, IfxSmu_InterruptRequest intRequest)
Configures The Interrupt Generation. More...
void | IfxSmu_temporaryLockConfigRegisters (void)
The function temporarily locks the SMU configuration registers for modification. More...

Detailed Description

SMU basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxSmu.c.


iLLD_TC38A: IfxSmu_cfg.c File Reference

  • _Impl
IfxSmu_cfg.c File Reference

Smu on-chip implementation data. More...

#include "_Impl/IfxSmu_cfg.h"
Include dependency graph for IfxSmu_cfg.c:

Go to the source code of this file.

Detailed Description

Smu on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2014 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxSmu_cfg.c.


iLLD_TC38A: IfxSmu_Smu.c File Reference

  • Smu
  • Smu
Functions
IfxSmu_Smu.c File Reference

SMU SMU details. More...

#include "IfxSmu_Smu.h"
Include dependency graph for IfxSmu_Smu.c:

Go to the source code of this file.

Functions

void | IfxSmu_Smu_initModuleConfig (IfxSmu_Smu_Config *config)
Fills the configuration stucture of the SMU Module with default values. More...
void | IfxSmu_Smu_initModule (IfxSmu_Smu_Config *config)
Initialises the SMU Module. More...
boolean | IfxSmu_Smu_isAlarmTriggered (void)
Check if any alarm is Triggered. More...

Detailed Description

SMU SMU details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxSmu_Smu.c.


iLLD_TC38A: IfxSmuStdby.c File Reference

  • Smu
  • Std
Functions
IfxSmuStdby.c File Reference

SMU basic functionality. More...

#include "IfxSmuStdby.h"
Include dependency graph for IfxSmuStdby.c:

Go to the source code of this file.

Functions

void | IfxSmuStdby_setFaultSignalAGConfigEventFlags (uint8 alarmGroup, uint32 flags)
Function to configure FSP Alarm group functionality. More...
void | IfxSmuStdby_setFaultSignalAlarmConfigEventFlag (uint8 alarmGroup, uint8 alarmNum, IfxSmuStdby_FaultSignalAlarmConfigFlagEvent enable)
Function to configure FSP functionality , FaultSignalAlarmConfigEventFlag (AG2iFSP_STDBY.B.FEz) More...
void | IfxSmuStdby_setSmuStdbyAlarmStatusFlag (uint8 alarmGroup, uint8 alarmNum, IfxSmuStdby_AlarmStatusFlag status)
Function to configure alarm status. (AG2i_STDBY.B.SFz) More...
void | IfxSmuStdby_startSmuStdbyMonBist (void)
This function enables the Smu standby Built-in Self test. More...

Detailed Description

SMU basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxSmuStdby.c.


iLLD_TC38A: IfxSrc.c File Reference

  • Src
  • Std
IfxSrc.c File Reference

SRC basic functionality. More...

#include "IfxSrc.h"
Include dependency graph for IfxSrc.c:

Go to the source code of this file.

Detailed Description

SRC basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxSrc.c.


iLLD_TC38A: IfxSrc_cfg.c File Reference

  • _Impl
IfxSrc_cfg.c File Reference

SRC on-chip implementation data. More...

#include "IfxSrc_cfg.h"
Include dependency graph for IfxSrc_cfg.c:

Go to the source code of this file.

Detailed Description

SRC on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxSrc_cfg.c.


iLLD_TC38A: IfxStdIf_DPipe.c File Reference

  • Service
  • CpuGeneric
  • StdIf
Functions
IfxStdIf_DPipe.c File Reference

Standard interface: Data Pipe. More...

#include "IfxStdIf_DPipe.h"
#include "_Utilities/Ifx_Assert.h"
#include <string.h>
#include <stdio.h>
#include <stdarg.h>
Include dependency graph for IfxStdIf_DPipe.c:

Go to the source code of this file.

Functions

void IfxStdIf_DPipe_print (IfxStdIf_DPipe *stdIf, pchar format,...)

Detailed Description

Standard interface: Data Pipe.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-27 20:08:23 GMT
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxStdIf_DPipe.c.


iLLD_TC38A: IfxStdIf_Pos.c File Reference

  • Service
  • CpuGeneric
  • StdIf
Functions
IfxStdIf_Pos.c File Reference

Standard interface: Position interface. More...

#include "IfxStdIf_Pos.h"
Include dependency graph for IfxStdIf_Pos.c:

Go to the source code of this file.

Functions

void | IfxStdIf_Pos_initConfig (IfxStdIf_Pos_Config *config)
void | IfxStdIf_Pos_printStatus (IfxStdIf_Pos *driver, IfxStdIf_DPipe *io)
Print the device status. More...

Detailed Description

Standard interface: Position interface.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxStdIf_Pos.c.

Function Documentation

◆ IfxStdIf_Pos_initConfig()

void IfxStdIf_Pos_initConfig ( IfxStdIf_Pos_Config * config )

Initialize the configuration structure to default

Parameters
config Position interface configuration. This parameter is initialized by the function

Definition at line 45 of file IfxStdIf_Pos.c.

Referenced by IfxGpt12_IncrEnc_initConfig().

◆ IfxStdIf_Pos_printStatus()

void IfxStdIf_Pos_printStatus | ( | IfxStdIf_Pos * | driver,
 |  | IfxStdIf_DPipe * | io
 | ) |  |

Print the device status.

Parameters
driver | driver handle
io | Interface to which the status is output
Returns
none

Definition at line 61 of file IfxStdIf_Pos.c.


iLLD_TC38A: IfxStdIf_PwmHl.c File Reference

  • Service
  • CpuGeneric
  • StdIf
Functions
IfxStdIf_PwmHl.c File Reference

Standard interface: Multi-channels, dual-complementary PWM interface. More...

#include "IfxStdIf_PwmHl.h"
Include dependency graph for IfxStdIf_PwmHl.c:

Go to the source code of this file.

Functions

void IfxStdIf_PwmHl_initConfig (IfxStdIf_PwmHl_Config *config)

Detailed Description

Standard interface: Multi-channels, dual-complementary PWM interface.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-27 20:08:24 GMT
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxStdIf_PwmHl.c.


iLLD_TC38A: IfxStdIf_Timer.c File Reference

  • Service
  • CpuGeneric
  • StdIf
Functions
IfxStdIf_Timer.c File Reference

Standard interface: Timer. More...

#include "IfxStdIf_Timer.h"
Include dependency graph for IfxStdIf_Timer.c:

Go to the source code of this file.

Functions

void | IfxStdIf_Timer_initConfig (IfxStdIf_Timer_Config *config)
void | IfxStdIf_Timer_initStdIf (IfxStdIf_Timer *stdIf, IfxStdIf_InterfaceDriver driver)

Detailed Description

Standard interface: Timer.

Version
disabled
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxStdIf_Timer.c.

Function Documentation

◆ IfxStdIf_Timer_initConfig()

void IfxStdIf_Timer_initConfig ( IfxStdIf_Timer_Config * config )

Initialize the configuration structure to default

Parameters
config Timer configuration. This parameter is initialised by the function

Definition at line 45 of file IfxStdIf_Timer.c.

Referenced by IfxCcu6_TimerWithTrigger_initConfig(), IfxGtm_Atom_Timer_initConfig(), IfxGtm_Tom_Timer_initConfig(), and IfxStm_Timer_initConfig().

◆ IfxStdIf_Timer_initStdIf()

void IfxStdIf_Timer_initStdIf | ( | IfxStdIf_Timer * | stdIf,
 |  | IfxStdIf_InterfaceDriver | driver
 | ) |  |

Initialize the stdIf so that all call back function default to no operation

Parameters
stdIf | Pointer to the interface driver object
driver | Interface driver object

Definition at line 143 of file IfxStdIf_Timer.c.

Referenced by IfxStm_Timer_stdIfTimerInit().


iLLD_TC38A: IfxStm.c File Reference

  • Stm
  • Std
Functions
IfxStm.c File Reference

STM basic functionality. More...

#include "IfxStm.h"
Include dependency graph for IfxStm.c:

Go to the source code of this file.

Functions

void | IfxStm_clearCompareFlag (Ifx_STM *stm, IfxStm_Comparator comparator)
Clear the compare interrupt flag. More...
void | IfxStm_disableComparatorInterrupt (Ifx_STM *stm, IfxStm_Comparator comparator)
Disables the compare interrupt. More...
void | IfxStm_disableModule (Ifx_STM *stm)
Disables the Stm module. More...
void | IfxStm_enableComparatorInterrupt (Ifx_STM *stm, IfxStm_Comparator comparator)
Enables the compare interrupt . More...
void | IfxStm_enableOcdsSuspend (Ifx_STM *stm)
enable suspend by debugger. Note: The API will write into the OCS register only if OCDS is enabled More...
Ifx_STM * | IfxStm_getAddress (IfxStm_Index stm)
Returns the module index of the selected STM module. More...
IfxStm_Index | IfxStm_getIndex (Ifx_STM *stm)
API to get the resource index of the STM specified. More...
volatile Ifx_SRC_SRCR * | IfxStm_getSrcPointer (Ifx_STM *stm, IfxStm_Comparator comparator)
get the interrupt source pointer for the comparator. More...
boolean | IfxStm_initCompare (Ifx_STM *stm, const IfxStm_CompareConfig *config)
Initialise stm compare register. More...
void | IfxStm_initCompareConfig (IfxStm_CompareConfig *config)
Initialise compare configuration with default values. More...
boolean | IfxStm_isCompareFlagSet (Ifx_STM *stm, IfxStm_Comparator comparator)
Indicates if the compare interrupt flag is set. More...
void | IfxStm_resetModule (Ifx_STM *stm)
void | IfxStm_setCompareControl (Ifx_STM *stm, IfxStm_Comparator comparator, IfxStm_ComparatorOffset offset, IfxStm_ComparatorSize size, IfxStm_ComparatorInterrupt interrupt)
Set the compare behavior. More...

Detailed Description

STM basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxStm.c.

Function Documentation

◆ IfxStm_resetModule()

void IfxStm_resetModule ( Ifx_STM * stm )
Parameters
stm pointer to STM registers
Returns
None

Definition at line 252 of file IfxStm.c.


iLLD_TC38A: IfxStm_cfg.c File Reference

  • _Impl
Variables
IfxStm_cfg.c File Reference

STM on-chip implementation data. More...

#include "IfxStm_cfg.h"
Include dependency graph for IfxStm_cfg.c:

Go to the source code of this file.

Variables

IFX_CONST IfxModule_IndexMap IfxStm_cfg_indexMap [IFXSTM_NUM_MODULES]

Detailed Description

STM on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxStm_cfg.c.

Variable Documentation

◆ IfxStm_cfg_indexMap

IFX_CONST IfxModule_IndexMap IfxStm_cfg_indexMap[IFXSTM_NUM_MODULES]
Initial value:
= {
{&MODULE_STM0, IfxStm_Index_0},
{&MODULE_STM1, IfxStm_Index_1},
{&MODULE_STM2, IfxStm_Index_2},
{&MODULE_STM3, IfxStm_Index_3}
}
IfxStm_Index_2
STM index 2.
Definition: IfxStm_cfg.h:89
IfxStm_Index_1
STM index 1.
Definition: IfxStm_cfg.h:88
IfxStm_Index_3
STM index 3.
Definition: IfxStm_cfg.h:90
IfxStm_Index_0
STM index 0.
Definition: IfxStm_cfg.h:87

Definition at line 52 of file IfxStm_cfg.c.

Referenced by IfxStm_getAddress(), and IfxStm_getIndex().


iLLD_TC38A: IfxStm_Timer.c File Reference

  • Stm
  • Timer
Functions
IfxStm_Timer.c File Reference

STM TIMER details. More...

#include "IfxStm_Timer.h"
#include "_Utilities/Ifx_Assert.h"
Include dependency graph for IfxStm_Timer.c:

Go to the source code of this file.

Functions

boolean | IfxStm_Timer_acknowledgeTimerIrq (IfxStm_Timer *driver)
Returns the timer event see IfxStdIf_Timer_AckTimerIrq. More...
float32 | IfxStm_Timer_getFrequency (IfxStm_Timer *driver)
Returns the frequency see IfxStdIf_Timer_GetFrequency. More...
float32 | IfxStm_Timer_getInputFrequency (IfxStm_Timer *driver)
Returns the input frequency see IfxStdIf_Timer_GetInputFrequency. More...
Ifx_TimerValue | IfxStm_Timer_getPeriod (IfxStm_Timer *driver)
Returns the period of the timer see IfxStdIf_Timer_GetPeriod. More...
float32 | IfxStm_Timer_getResolution (IfxStm_Timer *driver)
Return the resolution of the Timer counters see IfxStdIf_Timer_GetResolution. More...
void | IfxStm_Timer_run (IfxStm_Timer *driver)
Runs the timer see IfxStdIf_Timer_Run. More...
boolean | IfxStm_Timer_setFrequency (IfxStm_Timer *driver, float32 frequency)
Sets the Frequency see IfxStdIf_Timer_SetFrequency. More...
boolean | IfxStm_Timer_setPeriod (IfxStm_Timer *driver, Ifx_TimerValue period)
Sets the period for the timer see IfxStdIf_Timer_SetPeriod. More...
void | IfxStm_Timer_setSingleMode (IfxStm_Timer *driver, boolean enabled)
Sets the single shot mode of the timer see IfxStdIf_Timer_SetSingleMode. More...
boolean | IfxStm_Timer_stdIfTimerInit (IfxStdIf_Timer *stdif, IfxStm_Timer *driver)
Initializes the standard interface timer. More...
void | IfxStm_Timer_stop (IfxStm_Timer *driver)
Stops the timer see IfxStdIf_Timer_Stop. More...
void | IfxStm_Timer_updateInputFrequency (IfxStm_Timer *driver)
Updates the input frequency see IfxStdIf_Timer_UpdateInputFrequency. More...
boolean | IfxStm_Timer_init (IfxStm_Timer *driver, const IfxStm_Timer_Config *config)
Initialises the timer object. More...
void | IfxStm_Timer_initConfig (IfxStm_Timer_Config *config, Ifx_STM *stm)
Initializes the configuration structure to default. More...

Detailed Description

STM TIMER details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxStm_Timer.c.


iLLD_TC38A: lld_api.c File Reference

  • bollusai
  • illd_development
  • internal
  • tools
  • doc
  • doxygen
  • common
lld_api.c File Reference

Go to the source code of this file.


iLLD_TC38A: lld_codingRules.c File Reference

  • bollusai
  • illd_development
  • internal
  • tools
  • doc
  • doxygen
  • common
  • codingRules
lld_codingRules.c File Reference

Go to the source code of this file.


iLLD_TC38A: lld_codingRules_codeFormating.c File Reference

  • bollusai
  • illd_development
  • internal
  • tools
  • doc
  • doxygen
  • common
  • codingRules
lld_codingRules_codeFormating.c File Reference

Go to the source code of this file.


iLLD_TC38A: lld_codingRules_commonApis.c File Reference

  • bollusai
  • illd_development
  • internal
  • tools
  • doc
  • doxygen
  • common
  • codingRules
lld_codingRules_commonApis.c File Reference

Go to the source code of this file.


iLLD_TC38A: lld_conventions.c File Reference

  • bollusai
  • illd_development
  • internal
  • tools
  • doc
  • doxygen
  • common
lld_conventions.c File Reference

Go to the source code of this file.


iLLD_TC38A: lld_conventionsDoxygen.c File Reference

  • bollusai
  • illd_development
  • internal
  • tools
  • doc
  • doxygen
  • common
lld_conventionsDoxygen.c File Reference

Go to the source code of this file.


iLLD_TC38A: lld_dosanddont.c File Reference

  • bollusai
  • illd_development
  • internal
  • tools
  • doc
  • doxygen
  • common
  • dosAndDont
lld_dosanddont.c File Reference

Go to the source code of this file.


iLLD_TC38A: lld_dosanddont_enumUsage.c File Reference

  • bollusai
  • illd_development
  • internal
  • tools
  • doc
  • doxygen
  • common
  • dosAndDont
lld_dosanddont_enumUsage.c File Reference

Go to the source code of this file.


iLLD_TC38A: lld_dosanddont_namingConvention.c File Reference

  • bollusai
  • illd_development
  • internal
  • tools
  • doc
  • doxygen
  • common
  • dosAndDont
lld_dosanddont_namingConvention.c File Reference

Go to the source code of this file.


iLLD_TC38A: lld_dosanddont_optimisation.c File Reference

  • bollusai
  • illd_development
  • internal
  • tools
  • doc
  • doxygen
  • common
  • dosAndDont
lld_dosanddont_optimisation.c File Reference

Go to the source code of this file.


iLLD_TC38A: lld_filesAndConfig.c File Reference

  • bollusai
  • illd_development
  • internal
  • tools
  • doc
  • doxygen
  • common
lld_filesAndConfig.c File Reference

Go to the source code of this file.


iLLD_TC38A: lld_structure.c File Reference

  • bollusai
  • illd_development
  • internal
  • tools
  • doc
  • doxygen
  • common
lld_structure.c File Reference

Go to the source code of this file.


iLLD_TC38A: lld_versioning.c File Reference

  • bollusai
  • illd_development
  • internal
  • tools
  • doc
  • doxygen
  • common
lld_versioning.c File Reference

Go to the source code of this file.


iLLD_TC38A: mainpage.c File Reference

  • bollusai
  • illd_development
  • internal
  • tools
  • doc
  • doxygen
  • common
mainpage.c File Reference

Go to the source code of this file.


iLLD_TC38A: Platform_Types.h File Reference

  • Cpu
  • Std
Macros | Typedefs
Platform_Types.h File Reference

Go to the source code of this file.

Macros

#define | PLATFORM_VENDOR_ID (17u)
#define | PLATFORM_AR_RELEASE_MAJOR_VERSION (4u)
#define | PLATFORM_AR_RELEASE_MINOR_VERSION (2u)
#define | PLATFORM_AR_RELEASE_REVISION_VERSION (2u)
#define | PLATFORM_SW_MAJOR_VERSION (1u)
#define | PLATFORM_SW_MINOR_VERSION (0u)
#define | PLATFORM_SW_PATCH_VERSION (0u)
#define | CPU_TYPE_8 (8u)
#define | CPU_TYPE_16 (16u)
#define | CPU_TYPE_32 (32u)
#define | CPU_TYPE CPU_TYPE_32 /* 32 bit */
#define | MSB_FIRST (0u) /* Big Endian bit ordering */
#define | LSB_FIRST (1u) /* Little Endian bit ordering */
#define | CPU_BIT_ORDER LSB_FIRST /* Little Endian */
#define | HIGH_BYTE_FIRST (0u) /* Big Endian byte ordering */
#define | LOW_BYTE_FIRST (1u) /* Little Endian byte ordering */
#define | CPU_BYTE_ORDER LOW_BYTE_FIRST /* Little Endian */
#define | TRUE (1u)
#define | FALSE (0u)

Typedefs

typedef unsigned char | boolean
typedef unsigned char | uint8
typedef unsigned short | uint16
typedef unsigned long | uint32
typedef unsigned long long | uint64
typedef signed char | sint8
typedef short | sint16
typedef long | sint32
typedef long long | sint64
typedef unsigned long | uint8_least
typedef unsigned long | uint16_least
typedef unsigned long | uint32_least
typedef signed long | sint8_least
typedef signed long | sint16_least
typedef signed long | sint32_least
typedef float | float32
typedef double | float64

Detailed Description

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Platform_Types.h.

Macro Definition Documentation

◆ CPU_BIT_ORDER

#define CPU_BIT_ORDER LSB_FIRST /* Little Endian */

Definition at line 74 of file Platform_Types.h.

◆ CPU_BYTE_ORDER

#define CPU_BYTE_ORDER LOW_BYTE_FIRST /* Little Endian */

Definition at line 83 of file Platform_Types.h.

◆ CPU_TYPE

#define CPU_TYPE CPU_TYPE_32 /* 32 bit */

Definition at line 65 of file Platform_Types.h.

◆ CPU_TYPE_16

#define CPU_TYPE_16 (16u)

Definition at line 62 of file Platform_Types.h.

◆ CPU_TYPE_32

#define CPU_TYPE_32 (32u)

Definition at line 63 of file Platform_Types.h.

◆ CPU_TYPE_8

#define CPU_TYPE_8 (8u)

Definition at line 61 of file Platform_Types.h.

◆ FALSE

#define FALSE (0u)

Definition at line 93 of file Platform_Types.h.

Referenced by Ifx_AngleTrkF32_initConfig(), Ifx_AngleTrkF32_step(), Ifx_Crc_createTable(), Ifx_Crc_init(), Ifx_Fifo_canReadCount(), Ifx_Fifo_canWriteCount(), Ifx_Fifo_clear(), Ifx_Fifo_init(), Ifx_Fifo_isEmpty(), Ifx_Fifo_read(), Ifx_Fifo_write(), Ifx_GlobalResources_init(), Ifx_Shell_bbProtocolStart(), Ifx_Shell_cmdEscapeProcess(), Ifx_Shell_execute(), Ifx_Shell_init(), Ifx_Shell_initConfig(), Ifx_Shell_isEndOfLine(), Ifx_Shell_matchToken(), Ifx_Shell_parseAddress(), Ifx_Shell_parseFloat32(), Ifx_Shell_parseFloat64(), Ifx_Shell_parseSInt32(), Ifx_Shell_parseSInt64(), Ifx_Shell_parseToken(), Ifx_Shell_parseUInt32(), Ifx_Shell_parseUInt64(), Ifx_Shell_process(), Ifx_Shell_protocolStart(), Ifx_Shell_showHelp(), Ifx_Shell_showHelpSingle(), Ifx_Shell_showHelpSingleCommand(), IfxAsclin_Asc_initiateTransmission(), IfxAsclin_Asc_initModule(), IfxAsclin_Asc_initModuleConfig(), IfxAsclin_Asc_isrTransmit(), IfxAsclin_Asc_stdIfDPipeInit(), IfxAsclin_Lin_ignoreHeader(), IfxAsclin_Lin_initModule(), IfxAsclin_Lin_initModuleConfig(), IfxAsclin_Lin_isrError(), IfxAsclin_Lin_isrReceive(), IfxAsclin_Lin_isrTransmit(), IfxAsclin_Lin_prepareHeaderReception(), IfxAsclin_Lin_prepareResponseReception(), IfxAsclin_Lin_receiveHeader(), IfxAsclin_Lin_receiveResponse(), IfxAsclin_Lin_sendFrame(), IfxAsclin_Lin_sendHeader(), IfxAsclin_Lin_sendResponse(), IfxAsclin_setBitTiming(), IfxAsclin_Spi_initModule(), IfxAsclin_Spi_initModuleConfig(), IfxCan_Can_initMessage(), IfxCan_Can_initNodeConfig(), IfxCan_enableModule(), IfxCan_Node_setBitTiming(), IfxCan_Node_setFastBitTiming(), IfxCan_Node_setTransmitFifoQueueMode(), IfxCcu6_disableDelayBypass(), IfxCcu6_disableModulationOutput(), IfxCcu6_disableMultiChannelMode(), IfxCcu6_disableT13InvertedModulation(), IfxCcu6_disableTrapPin(), IfxCcu6_enableModule(), IfxCcu6_getDeadTimeStatus(), IfxCcu6_getHallPatternSampleState(), IfxCcu6_getInterruptStatusFlag(), IfxCcu6_getShadowTransferStatus(), IfxCcu6_getT12CaptureCompareState(), IfxCcu6_getT12CountDirection(), IfxCcu6_getTimerAvailabilityStatus(), IfxCcu6_getTimerRunStatus(), IfxCcu6_Icu_initChannelConfig(), IfxCcu6_Icu_initModule(), IfxCcu6_Icu_initModuleConfig(), IfxCcu6_Icu_startCapture(), IfxCcu6_Icu_stopCapture(), IfxCcu6_PwmBc_initModule(), IfxCcu6_PwmBc_initModuleConfig(), IfxCcu6_PwmBc_start(), IfxCcu6_PwmHl_disable(), IfxCcu6_PwmHl_init(), IfxCcu6_PwmHl_setMode(), IfxCcu6_PwmHl_setupChannels(), IfxCcu6_setT12Frequency(), IfxCcu6_setT13Frequency(), IfxCcu6_Timer_countOneStep(), IfxCcu6_Timer_initModule(), IfxCcu6_Timer_initModuleConfig(), IfxCcu6_Timer_start(), IfxCcu6_Timer_startSingleShotMode(), IfxCcu6_Timer_stop(), IfxCcu6_TimerWithTrigger_init(), IfxCcu6_TimerWithTrigger_run(), IfxCcu6_TPwm_initModule(), IfxCcu6_TPwm_initModuleConfig(), IfxCcu6_TPwm_start(), IfxCcu6_TPwm_stop(), IfxCpu_acquireMutex(), IfxCpu_isAddressCachable(), IfxCpu_restoreInterrupts(), IfxCpu_setProgramCounter(), IfxCpu_setSpinLock(), IfxDma_Dma_initChannelConfig(), IfxDma_getDoubleBufferRead(), IfxDts_Dts_initModuleConfig(), IfxEdsadc_Edsadc_initCarrierGen(), IfxEdsadc_Edsadc_initCarrierGenConfig(), IfxEdsadc_Edsadc_initChannelConfig(), IfxEdsadc_Edsadc_initFirFilter(), IfxEdsadc_isModuleSuspended(), IfxEray_changePocState(), IfxEray_Eray_Node_initConfig(), IfxEray_getInputBufferBusyHostStatus(), IfxEray_getInputBufferBusyShadowStatus(), IfxEray_getMessageBufferInterruptStatus(), IfxEray_getNewDataInterruptStatus(), IfxEray_getOutputBufferBusyShadowStatus(), IfxEray_setMessageBufferInterruptDestination(), IfxEray_setNewDataInterruptDestination(), IfxEvadc_Adc_getGroupConfig(), IfxEvadc_Adc_initChannelConfig(), IfxEvadc_Adc_initFastCompareChannelConfig(), IfxEvadc_Adc_initGroup(), IfxEvadc_Adc_initGroupConfig(), IfxEvadc_getFastCompareBoundaryFlagStatus(), IfxEvadc_getFastCompareExternalTriggerLevelStatus(), IfxEvadc_getFastCompareResultStatus(), IfxEvadc_isFastCompareNewResultAvailable(), IfxEvadc_setArbiterPriority(), IfxEvadc_startupCalibration(), IfxFce_Crc_initCrcConfig(), IfxGeth_dma_stopTransmitter(), IfxGeth_Eth_configureMacCore(), IfxGeth_Eth_initModuleConfig(), IfxGeth_mac_readQueueVlanTag(), IfxGeth_mac_writeQueueVlanTag(), IfxGeth_mtl_disableMulticastFilterFailQueuing(), IfxGeth_mtl_disableUnicastFilterFailQueuing(), IfxGeth_mtl_disableVlanFilterFailQueuing(), IfxGpt12_IncrEnc_init(), IfxGtm_Atom_Dtm_PwmHl_init(), IfxGtm_Atom_Dtm_PwmHl_setDeadtime(), IfxGtm_Atom_Dtm_PwmHl_setMode(), IfxGtm_Atom_Dtm_PwmHl_updateCenterAligned(), IfxGtm_Atom_Dtm_PwmHl_updateEdgeAligned(), IfxGtm_Atom_Dtm_PwmHl_updatePulse(), IfxGtm_Atom_Dtm_PwmHl_updateShiftCenterAligned(), IfxGtm_Atom_Pwm_init(), IfxGtm_Atom_Pwm_initConfig(), IfxGtm_Atom_Pwm_stop(), IfxGtm_Atom_PwmHl_init(), IfxGtm_Atom_PwmHl_setMode(), IfxGtm_Atom_PwmHl_updateCenterAligned(), IfxGtm_Atom_PwmHl_updateEdgeAligned(), IfxGtm_Atom_PwmHl_updatePulse(), IfxGtm_Atom_PwmHl_updateShiftCenterAligned(), IfxGtm_Atom_Timer_init(), IfxGtm_Cmu_getClkFrequency(), IfxGtm_Cmu_getEclkFrequency(), IfxGtm_Cmu_getFxClkFrequency(), IfxGtm_Cmu_setEclkFrequency(), IfxGtm_Cmu_setGclkFrequency(), IfxGtm_Psm_Fifo_setChannelEndAddress(), IfxGtm_Psm_Fifo_setChannelLowerWatermark(), IfxGtm_Psm_Fifo_setChannelSize(), IfxGtm_Psm_Fifo_setChannelStartAddress(), IfxGtm_Psm_Fifo_setChannelUpperWatermark(), IfxGtm_Spe_enableInput(), IfxGtm_Tim_In_clearNewData(), IfxGtm_Tim_In_init(), IfxGtm_Tim_In_initConfig(), IfxGtm_Tim_In_update(), IfxGtm_Tom_Dtm_PwmHl_init(), IfxGtm_Tom_Dtm_PwmHl_setDeadtime(), IfxGtm_Tom_Dtm_PwmHl_setMode(), IfxGtm_Tom_Dtm_PwmHl_updateCenterAligned(), IfxGtm_Tom_Dtm_PwmHl_updateEdgeAligned(), IfxGtm_Tom_Dtm_PwmHl_updatePulse(), IfxGtm_Tom_Dtm_PwmHl_updateShiftCenterAligned(), IfxGtm_Tom_Pwm_init(), IfxGtm_Tom_Pwm_initConfig(), IfxGtm_Tom_Pwm_stop(), IfxGtm_Tom_PwmHl_init(), IfxGtm_Tom_PwmHl_setMode(), IfxGtm_Tom_PwmHl_updateCenterAligned(), IfxGtm_Tom_PwmHl_updateEdgeAligned(), IfxGtm_Tom_PwmHl_updatePulse(), IfxGtm_Tom_PwmHl_updateShiftCenterAligned(), IfxGtm_Tom_Timer_init(), IfxGtm_Trig_fromEdsadc(), IfxGtm_Trig_fromMsc(), IfxGtm_Trig_toMsc(), IfxHssl_Hssl_initChannel(), IfxHssl_Hssl_initHsctModule(), IfxHssl_Hssl_initHsctModuleConfig(), IfxI2c_busIsFree(), IfxI2c_getDtrinterruptSourceStatus(), IfxI2c_getErrorInterruptSourceStatus(), IfxI2c_getProtocolInterruptSourceStatus(), IfxI2c_I2c_read(), IfxI2c_I2c_write(), IfxI2c_isFifoRequest(), IfxI2c_releaseBus(), IfxIom_Driver_initLam(), IfxIom_Driver_initLamConfig(), IfxIom_Driver_isLamMonGlitch(), IfxIom_Driver_isLamRefGlitch(), IfxIom_Iom_initFpcChannelConfig(), IfxMtu_enableErrorTracking(), IfxMtu_isErrorTrackingEnabled(), IfxMtu_isErrorTrackingOverflow(), IfxMtu_runMbist(), IfxPmsEvr_areInitValuesRight(), IfxPmsEvr_runInitSequence(), IfxPmsPm_initLoadJumpConfig(), IfxPmsPm_initSleepConfig(), IfxPmsPm_initStandbyConfig(), IfxPmsPm_initVoltageDroopConfig(), IfxPmsPm_setCoreMode(), IfxPort_disableEmergencyStop(), IfxPort_enableEmergencyStop(), IfxPort_getPinState(), IfxPort_modifyPinControllerSelection(), IfxPort_setPinControllerSelection(), IfxPsi5_Psi5_initChannel(), IfxPsi5_Psi5_initChannelConfig(), IfxPsi5_Psi5_initModule(), IfxPsi5_Psi5_readChannelFrame(), IfxPsi5_Psi5_sendChannelData(), IfxPsi5s_Psi5s_getBaudrate(), IfxPsi5s_Psi5s_initChannel(), IfxPsi5s_Psi5s_initChannelConfig(), IfxPsi5s_Psi5s_initModule(), IfxPsi5s_Psi5s_initModuleConfig(), IfxPsi5s_Psi5s_sendChannelData(), IfxPsi5s_Psi5s_setBaudrate(), IfxQspi_calculateDelayConstants(), IfxQspi_calculateExtendedConfigurationValue(), IfxQspi_calculateTimeQuantumLength(), IfxQspi_isModuleEnabled(), IfxQspi_recalcBasicConfiguration(), IfxQspi_SpiMaster_initChannel(), IfxQspi_SpiMaster_initModule(), IfxQspi_SpiMaster_initModuleConfig(), IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), IfxQspi_SpiSlave_exchange(), IfxQspi_SpiSlave_initModule(), IfxQspi_SpiSlave_initModuleConfig(), IfxQspi_SpiSlave_isrDmaReceive(), IfxQspi_SpiSlave_isrError(), IfxQspi_SpiSlave_read(), IfxScuEru_disableAutoClear(), IfxScuEru_disableFallingEdgeDetection(), IfxScuEru_disablePatternDetectionTrigger(), IfxScuEru_disableRisingEdgeDetection(), IfxScuEru_disableTriggerPulse(), IfxScuEru_getEventFlagStatus(), IfxScuEru_getPatternDetectionResult(), IfxScuWdt_initConfig(), IfxSent_Sent_initChannelConfig(), IfxSent_Sent_initModule(), IfxSmu_getRTMissedEvent(), IfxSmu_Smu_initModuleConfig(), IfxSmu_Smu_isAlarmTriggered(), IfxSmuStdby_getSmuStdbyAlarmGroupStatus(), IfxSmuStdby_getSmuStdbyAlarmStatus(), IfxSmuStdby_setFaultSignalAGConfigEventFlags(), IfxSmuStdby_setFaultSignalAlarmConfigEventFlag(), IfxSmuStdby_setSmuStdbyAlarmStatusFlag(), IfxSrc_isOverrun(), IfxSrc_isRequested(), IfxStdIf_Pos_initConfig(), IfxStdIf_PwmHl_initConfig(), IfxStdIf_Timer_initConfig(), IfxStm_initCompare(), IfxStm_isDeadLine(), IfxStm_Timer_init(), IfxStm_wait(), isDeadLine(), poll(), SpiIf_wait(), and wait().

◆ HIGH_BYTE_FIRST

#define HIGH_BYTE_FIRST (0u) /* Big Endian byte ordering */

Definition at line 80 of file Platform_Types.h.

◆ LOW_BYTE_FIRST

#define LOW_BYTE_FIRST (1u) /* Little Endian byte ordering */

Definition at line 81 of file Platform_Types.h.

◆ LSB_FIRST

#define LSB_FIRST (1u) /* Little Endian bit ordering */

Definition at line 72 of file Platform_Types.h.

◆ MSB_FIRST

#define MSB_FIRST (0u) /* Big Endian bit ordering */

Definition at line 71 of file Platform_Types.h.

◆ PLATFORM_AR_RELEASE_MAJOR_VERSION

#define PLATFORM_AR_RELEASE_MAJOR_VERSION (4u)

Definition at line 52 of file Platform_Types.h.

◆ PLATFORM_AR_RELEASE_MINOR_VERSION

#define PLATFORM_AR_RELEASE_MINOR_VERSION (2u)

Definition at line 53 of file Platform_Types.h.

◆ PLATFORM_AR_RELEASE_REVISION_VERSION

#define PLATFORM_AR_RELEASE_REVISION_VERSION (2u)

Definition at line 54 of file Platform_Types.h.

◆ PLATFORM_SW_MAJOR_VERSION

#define PLATFORM_SW_MAJOR_VERSION (1u)

Definition at line 55 of file Platform_Types.h.

◆ PLATFORM_SW_MINOR_VERSION

#define PLATFORM_SW_MINOR_VERSION (0u)

Definition at line 56 of file Platform_Types.h.

◆ PLATFORM_SW_PATCH_VERSION

#define PLATFORM_SW_PATCH_VERSION (0u)

Definition at line 57 of file Platform_Types.h.

◆ PLATFORM_VENDOR_ID

#define PLATFORM_VENDOR_ID (17u)

Definition at line 51 of file Platform_Types.h.

◆ TRUE

#define TRUE (1u)

Definition at line 90 of file Platform_Types.h.

Referenced by Ifx_AngleTrkF32_stdIfPosInit(), Ifx_Console_print(), Ifx_Console_printAlign(), Ifx_Crc_createTable(), Ifx_Crc_init(), Ifx_Fifo_canReadCount(), Ifx_Fifo_canWriteCount(), Ifx_Fifo_clear(), Ifx_Fifo_init(), Ifx_Fifo_isEmpty(), Ifx_GlobalResources_init(), Ifx_Shell_bbProtocolStart(), Ifx_Shell_init(), Ifx_Shell_initConfig(), Ifx_Shell_isEndOfLine(), Ifx_Shell_matchToken(), Ifx_Shell_parseSInt32(), Ifx_Shell_parseToken(), Ifx_Shell_parseUInt32(), Ifx_Shell_parseUInt64(), Ifx_Shell_process(), Ifx_Shell_protocolStart(), Ifx_Shell_showHelp(), Ifx_Shell_showHelpSingleCommand(), IfxAsclin_Asc_blockingRead(), IfxAsclin_Asc_initiateTransmission(), IfxAsclin_Asc_initModule(), IfxAsclin_Asc_isrReceive(), IfxAsclin_Asc_stdIfDPipeInit(), IfxAsclin_Asc_write(), IfxAsclin_initCtsPin(), IfxAsclin_Lin_initModuleConfig(), IfxAsclin_Lin_isrError(), IfxAsclin_Lin_prepareHeaderReception(), IfxAsclin_Lin_prepareResponseReception(), IfxAsclin_Lin_sendFrame(), IfxAsclin_Lin_sendHeader(), IfxAsclin_Lin_sendResponse(), IfxAsclin_setBitTiming(), IfxAsclin_Spi_initModule(), IfxCan_Can_initModule(), IfxCan_Can_initNodeConfig(), IfxCan_Can_sendMessage(), IfxCan_disableModule(), IfxCan_Node_initRxPin(), IfxCan_Node_initTxPin(), IfxCcu6_clearDeadTimeCounters(), IfxCcu6_disableModule(), IfxCcu6_enableDelayBypass(), IfxCcu6_enableHallPatternShadowTransfer(), IfxCcu6_enableModulationOutput(), IfxCcu6_enableMultiChannelMode(), IfxCcu6_enableMultiChannelPwmPatternShadowTransfer(), IfxCcu6_enableMultiChannelT12DowncountingShadowTransfer(), IfxCcu6_enableMultiChannelT12UpcountingShadowTransfer(), IfxCcu6_enableMultiChannelT13UpcountingShadowTransfer(), IfxCcu6_enableT13InvertedModulation(), IfxCcu6_enableTrapPin(), IfxCcu6_getDeadTimeStatus(), IfxCcu6_getHallPatternSampleState(), IfxCcu6_getInterruptStatusFlag(), IfxCcu6_getShadowTransferStatus(), IfxCcu6_getT12CaptureCompareState(), IfxCcu6_getT12CountDirection(), IfxCcu6_getTimerAvailabilityStatus(), IfxCcu6_getTimerRunStatus(), IfxCcu6_Icu_startCapture(), IfxCcu6_Icu_stopCapture(), IfxCcu6_PwmBc_initModuleConfig(), IfxCcu6_PwmBc_start(), IfxCcu6_PwmBc_stop(), IfxCcu6_PwmHl_enable(), IfxCcu6_PwmHl_init(), IfxCcu6_PwmHl_setDeadtime(), IfxCcu6_PwmHl_setMinPulse(), IfxCcu6_PwmHl_setMode(), IfxCcu6_PwmHl_stdIfPwmHlInit(), IfxCcu6_setT12Frequency(), IfxCcu6_setT13Frequency(), IfxCcu6_Timer_countOneStep(), IfxCcu6_Timer_initModuleConfig(), IfxCcu6_Timer_start(), IfxCcu6_Timer_startSingleShotMode(), IfxCcu6_Timer_stop(), IfxCcu6_Timer_synchronousStart(), IfxCcu6_Timer_synchronousStop(), IfxCcu6_TimerWithTrigger_applyUpdate(), IfxCcu6_TimerWithTrigger_init(), IfxCcu6_TimerWithTrigger_run(), IfxCcu6_TimerWithTrigger_setPeriod(), IfxCcu6_TimerWithTrigger_stdIfTimerInit(), IfxCcu6_TimerWithTrigger_stop(), IfxCcu6_TPwm_initModuleConfig(), IfxCcu6_TPwm_start(), IfxCcu6_TPwm_stop(), IfxCpu_acquireMutex(), IfxCpu_isAddressCachable(), IfxCpu_setProgramCounter(), IfxCpu_setSpinLock(), IfxCpu_startCore(), IfxDma_getAndClearChannelInterrupt(), IfxDma_getAndClearChannelPatternDetectionInterrupt(), IfxDma_getAndClearChannelWrapDestinationBufferInterrupt(), IfxDma_getAndClearChannelWrapSourceBufferInterrupt(), IfxEdsadc_Edsadc_initChannelConfig(), IfxEdsadc_isModuleSuspended(), IfxEray_changePocState(), IfxEray_Eray_Node_initConfig(), IfxEray_Eray_Node_initMessageRAM(), IfxEray_Eray_receiveFifoFrame(), IfxEray_Eray_receiveFrame(), IfxEray_Eray_transmitFrame(), IfxEray_Eray_wakeUpChannel(), IfxEray_getInputBufferBusyHostStatus(), IfxEray_getInputBufferBusyShadowStatus(), IfxEray_getMessageBufferInterruptStatus(), IfxEray_getNewDataInterruptStatus(), IfxEray_getOutputBufferBusyShadowStatus(), IfxEray_setSlot(), IfxEvadc_Adc_clearQueue(), IfxEvadc_Adc_getGroupConfig(), IfxEvadc_Adc_initGroup(), IfxEvadc_Adc_initGroupConfig(), IfxEvadc_getFastCompareBoundaryFlagStatus(), IfxEvadc_getFastCompareExternalTriggerLevelStatus(), IfxEvadc_getFastCompareResultStatus(), IfxEvadc_isFastCompareNewResultAvailable(), IfxEvadc_startupCalibration(), IfxFce_Crc_calculateCrc(), IfxFce_Crc_initCrc(), IfxFce_Crc_initCrcConfig(), IfxGeth_dma_startReceiver(), IfxGeth_dma_startTransmitter(), IfxGeth_Eth_configureMTL(), IfxGeth_mac_readQueueVlanTag(), IfxGeth_mac_writeQueueVlanTag(), IfxGeth_mtl_enableMulticastFilterFailQueuing(), IfxGeth_mtl_enableUnicastFilterFailQueuing(), IfxGeth_mtl_enableVlanFilterFailQueuing(), IfxGpt12_IncrEnc_init(), IfxGpt12_IncrEnc_initConfig(), IfxGpt12_IncrEnc_stdIfPosInit(), IfxGtm_Atom_Ch_getClockFrequency(), IfxGtm_Atom_Dtm_PwmHl_init(), IfxGtm_Atom_Dtm_PwmHl_initConfig(), IfxGtm_Atom_Dtm_PwmHl_setDeadtime(), IfxGtm_Atom_Dtm_PwmHl_setMinPulse(), IfxGtm_Atom_Dtm_PwmHl_setMode(), IfxGtm_Atom_Dtm_PwmHl_stdIfPwmHlInit(), IfxGtm_Atom_Pwm_init(), IfxGtm_Atom_Pwm_initConfig(), IfxGtm_Atom_Pwm_start(), IfxGtm_Atom_PwmHl_init(), IfxGtm_Atom_PwmHl_initConfig(), IfxGtm_Atom_PwmHl_setDeadtime(), IfxGtm_Atom_PwmHl_setMinPulse(), IfxGtm_Atom_PwmHl_setMode(), IfxGtm_Atom_PwmHl_stdIfPwmHlInit(), IfxGtm_Atom_Timer_init(), IfxGtm_Atom_Timer_initConfig(), IfxGtm_Atom_Timer_run(), IfxGtm_Atom_Timer_setPeriod(), IfxGtm_Atom_Timer_stdIfTimerInit(), IfxGtm_Atom_Timer_stop(), IfxGtm_Cmu_setEclkFrequency(), IfxGtm_Cmu_setGclkFrequency(), IfxGtm_Dtm_getClockFrequency(), IfxGtm_Spe_enableInput(), IfxGtm_Tbu_getClockFrequency(), IfxGtm_Tim_Ch_getCaptureClockFrequency(), IfxGtm_Tim_Ch_getFilterClockFrequency(), IfxGtm_Tim_Ch_getTimeoutClockFrequency(), IfxGtm_Tim_In_init(), IfxGtm_Tom_Ch_getClockFrequency(), IfxGtm_Tom_Dtm_PwmHl_init(), IfxGtm_Tom_Dtm_PwmHl_initConfig(), IfxGtm_Tom_Dtm_PwmHl_setDeadtime(), IfxGtm_Tom_Dtm_PwmHl_setMinPulse(), IfxGtm_Tom_Dtm_PwmHl_setMode(), IfxGtm_Tom_Dtm_PwmHl_stdIfPwmHlInit(), IfxGtm_Tom_Pwm_init(), IfxGtm_Tom_Pwm_initConfig(), IfxGtm_Tom_Pwm_start(), IfxGtm_Tom_PwmHl_init(), IfxGtm_Tom_PwmHl_initConfig(), IfxGtm_Tom_PwmHl_setDeadtime(), IfxGtm_Tom_PwmHl_setMinPulse(), IfxGtm_Tom_PwmHl_setMode(), IfxGtm_Tom_PwmHl_stdIfPwmHlInit(), IfxGtm_Tom_Timer_init(), IfxGtm_Tom_Timer_initConfig(), IfxGtm_Tom_Timer_run(), IfxGtm_Tom_Timer_setPeriod(), IfxGtm_Tom_Timer_stdIfTimerInit(), IfxGtm_Tom_Timer_stop(), IfxGtm_Trig_fromMsc(), IfxHssl_Hssl_prepareStream(), IfxI2c_busIsFree(), IfxI2c_getDtrinterruptSourceStatus(), IfxI2c_getErrorInterruptSourceStatus(), IfxI2c_getProtocolInterruptSourceStatus(), IfxI2c_isFifoRequest(), IfxIom_Driver_init(), IfxIom_Driver_initLam(), IfxIom_Iom_initAnalyser(), IfxIom_Iom_initAnalyserConfig(), IfxIom_Iom_initCombiner(), IfxIom_Iom_initFpcChannel(), IfxIom_Iom_initFpcChannelConfig(), IfxIom_Iom_initModule(), IfxMtu_isErrorTrackingEnabled(), IfxMtu_isErrorTrackingOverflow(), IfxPmsEvr_areInitValuesRight(), IfxPmsEvr_runInitSequence(), IfxPmsPm_configureWakeup(), IfxPmsPm_initLoadJumpConfig(), IfxPmsPm_initStandbyConfig(), IfxPmsPm_initVoltageDroopConfig(), IfxPmsPm_setCoreMode(), IfxPort_disableEmergencyStop(), IfxPort_enableEmergencyStop(), IfxPort_getPinState(), IfxPsi5_Psi5_initChannel(), IfxPsi5_Psi5_initModule(), IfxPsi5_Psi5_readChannelFrame(), IfxPsi5_Psi5_readChannelSerialMessage(), IfxPsi5_Psi5_sendChannelData(), IfxPsi5_Psi5_startupChannel(), IfxPsi5s_Psi5s_initChannel(), IfxPsi5s_Psi5s_initModule(), IfxPsi5s_Psi5s_initModuleConfig(), IfxPsi5s_Psi5s_sendChannelData(), IfxQspi_calculateDelayConstants(), IfxQspi_calculateExtendedConfigurationValue(), IfxQspi_isModuleEnabled(), IfxQspi_SpiMaster_exchange(), IfxQspi_SpiMaster_initChannel(), IfxQspi_SpiMaster_initModule(), IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), IfxQspi_SpiSlave_exchange(), IfxQspi_SpiSlave_initModule(), IfxScuEru_enableAutoClear(), IfxScuEru_enableFallingEdgeDetection(), IfxScuEru_enablePatternDetectionTrigger(), IfxScuEru_enableRisingEdgeDetection(), IfxScuEru_enableTriggerPulse(), IfxScuEru_getEventFlagStatus(), IfxScuEru_getPatternDetectionResult(), IfxSent_Sent_initChannel(), IfxSent_Sent_initChannelConfig(), IfxSent_Sent_initModule(), IfxSent_Sent_initModuleConfig(), IfxSent_Sent_readChannelSerialDataFrame(), IfxSent_Sent_readChannelSerialMessageFrame(), IfxSmu_Smu_isAlarmTriggered(), IfxSrc_isOverrun(), IfxSrc_isRequested(), IfxStm_initCompare(), IfxStm_Timer_init(), IfxStm_Timer_setPeriod(), and IfxStm_Timer_stdIfTimerInit().

Typedef Documentation

◆ boolean

typedef unsigned char boolean

Definition at line 104 of file Platform_Types.h.

◆ float32

typedef float float32

Definition at line 170 of file Platform_Types.h.

◆ float64

typedef double float64

Definition at line 175 of file Platform_Types.h.

◆ sint16

typedef short sint16

Definition at line 129 of file Platform_Types.h.

◆ sint16_least

typedef signed long sint16_least

Definition at line 161 of file Platform_Types.h.

◆ sint32

typedef long sint32

Definition at line 134 of file Platform_Types.h.

◆ sint32_least

typedef signed long sint32_least

Definition at line 165 of file Platform_Types.h.

◆ sint64

typedef long long sint64

Definition at line 141 of file Platform_Types.h.

◆ sint8

typedef signed char sint8

Definition at line 125 of file Platform_Types.h.

◆ sint8_least

typedef signed long sint8_least

Definition at line 157 of file Platform_Types.h.

◆ uint16

typedef unsigned short uint16

Definition at line 112 of file Platform_Types.h.

◆ uint16_least

typedef unsigned long uint16_least

Definition at line 149 of file Platform_Types.h.

◆ uint32

typedef unsigned long uint32

Definition at line 116 of file Platform_Types.h.

◆ uint32_least

typedef unsigned long uint32_least

Definition at line 153 of file Platform_Types.h.

◆ uint64

typedef unsigned long long uint64

Definition at line 121 of file Platform_Types.h.

◆ uint8

typedef unsigned char uint8

Definition at line 108 of file Platform_Types.h.

◆ uint8_least

typedef unsigned long uint8_least

Definition at line 145 of file Platform_Types.h.


iLLD_TC38A: SpiIf.c File Reference

  • Service
  • CpuGeneric
  • If
Functions
SpiIf.c File Reference

SPI interface. More...

#include "SpiIf.h"
Include dependency graph for SpiIf.c:

Go to the source code of this file.

Functions

void | SpiIf_initConfig (SpiIf_Config *config)
void | SpiIf_initChannelConfig (SpiIf_ChConfig *config, SpiIf *driver)

Detailed Description

SPI interface.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-27 20:08:21 GMT
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file SpiIf.c.


iLLD_TC38A: SpiIf.h File Reference

  • Service
  • CpuGeneric
  • If
Data Structures | Typedefs | Enumerations | Functions
SpiIf.h File Reference

SPI interface types. More...

#include "Src/Std/IfxSrc.h"
Include dependency graph for SpiIf.h:

Go to the source code of this file.

Data Structures

struct | SpiIf_Flags
struct | SpiIf_Job
struct | SpiIf_funcs
struct | SpiIf_
struct | SpiIf_Config
struct | Spi_ErrorChecks
struct | SpiIf_ChMode
struct | SpiIf_Ch_
struct | SpiIf_ChConfig_

Typedefs

typedef struct SpiIf_Ch_ | SpiIf_Ch
Alias to the channel structure. More...
typedef struct SpiIf_ChConfig_ | SpiIf_ChConfig
typedef struct SpiIf_ | SpiIf
typedef SpiIf_Status(* | SpiIf_Exchange) (SpiIf_Ch *handle, const void *src, void *dest, Ifx_SizeT numOfData)
typedef SpiIf_Status(* | SpiIf_GetStatus) (SpiIf_Ch *handle)
typedef void(* | SpiIf_OnEvent) (SpiIf *handle)
typedef uint32 | SpiIf_SlsoTiming_HalfTsclk
typedef void(* | SpiIf_Cbk) (void *data)
SPI channel callback prototype. More...
typedef void(* | TxRxHandler) (SpiIf_Ch *handle)

Enumerations

enum SpiIf_Status {
SpiIf_Status_ok,
SpiIf_Status_busy,
SpiIf_Status_unknown
}
SPI Interface Status. More...
enum SpiIf_SlsoTiming {
SpiIf_SlsoTiming_0 = 0,
SpiIf_SlsoTiming_1,
SpiIf_SlsoTiming_2,
SpiIf_SlsoTiming_3,
SpiIf_SlsoTiming_4,
SpiIf_SlsoTiming_5,
SpiIf_SlsoTiming_6,
SpiIf_SlsoTiming_7
}
Slave select output timing. More...
enum SpiIf_DataHeading {
SpiIf_DataHeading_lsbFirst = 0,
SpiIf_DataHeading_msbFirst
}
Heading. More...
enum SpiIf_ShiftClock {
SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge = 0,
SpiIf_ShiftClock_shiftTransmitDataOnTrailingEdge
}
Clock phase. More...
enum SpiIf_ClockPolarity {
SpiIf_ClockPolarity_idleLow = 0,
SpiIf_ClockPolarity_idleHigh
}
Clock polarity. More...
enum SpiIf_Mode {
SpiIf_Mode_master,
SpiIf_Mode_slave,
SpiIf_Mode_undefined
}

Functions

IFX_INLINE void | SpiIf_wait (SpiIf_Ch *handle)
IFX_EXTERN void | SpiIf_initConfig (SpiIf_Config *config)
IFX_EXTERN void | SpiIf_initChannelConfig (SpiIf_ChConfig *config, SpiIf *driver)
Virtual functions

These functions are implemented by a driver.

IFX_INLINE SpiIf_Status | SpiIf_exchange (SpiIf_Ch *handle, const void *src, void *dest, Ifx_SizeT numOfData)
IFX_INLINE SpiIf_Status | SpiIf_getStatus (SpiIf_Ch *handle)

Detailed Description

SPI interface types.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-27 20:08:22 GMT
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file SpiIf.h.


iLLD_TC38A: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- $ -

  • $ $sb : IfxCpu_IntrinsicsDcc.h


iLLD_TC38A: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- _ -

  • ___setareg : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsTasking.h
  • __abs() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __abs_stdreal : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __absb : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __absdif : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __absf : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __absh : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __abss : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __abssh : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __addr_to_cx() : IfxCpu_Intrinsics.h
  • __adds : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h
  • __addsu : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __asm__ : Ifx_TypesTasking.h
  • __bisr() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __cacheai : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __cacheawi : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __cacheawi_bo_post_inc : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __cacheiwi : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __checkrange : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __checkrangef : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __checkrangeX : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __clear_table : Ifx_Ssw_CompilersGnuc.h
  • __clo : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __cls : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __clssf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __clz : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __cmpAndSwap : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __copy_table : Ifx_Ssw_CompilersGnuc.h
  • __Core1_start() : Ifx_Ssw.h , Ifx_Ssw_Tc1.c
  • __Core2_start() : Ifx_Ssw.h , Ifx_Ssw_Tc2.c
  • __Core3_start() : Ifx_Ssw.h , Ifx_Ssw_Tc3.c
  • __crc32 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __CSA : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h , Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersTasking.h
  • __CSA_END : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h , Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersTasking.h
  • __cx_to_addr() : IfxCpu_Intrinsics.h
  • __debug : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __disable : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __disable_and_save : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __dsync : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __enable : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __extr : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __extractbyte1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __extractbyte2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __extractbyte3 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __extractbyte4 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __extracthw1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __extracthw2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __extractubyte1 : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __extractubyte2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __extractubyte3 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __extractubyte4 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __extractuhw1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __extractuhw2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __extru : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __fabs : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __fabsf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __fixpoint_to_float32 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __float_to_fract : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __float_to_sfract : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h
  • __fract_to_float : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __fract_to_sfract : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __geqf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __getA11 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __getbit : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __getbyte1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __getbyte2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __getbyte3 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __getbyte4 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __getDataParamRet : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __getfract : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __gethw1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __gethw2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __getubyte1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __getubyte2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __getubyte3 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __getubyte4 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __getuhw1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __getuhw2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __HIGHTEC__ : Ifx_Ssw_Compilers.h
  • __imaskldmst : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __initcirc() : IfxCpu_IntrinsicsDcc.h
  • __initpackb : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __initpackbl : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __initpackhw : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __initpackhwl : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __initupackb : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __initupackhw : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __ins : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __insert : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __insertbyte1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __insertbyte2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __insertbyte3 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __insertbyte4 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __inserthw1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __inserthw2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __insertubyte1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __insertubyte2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __insertubyte3 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __insertubyte4 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __insertuhw1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __insertuhw2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __insn : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __interrupt : Ifx_TypesGhs.h , Ifx_TypesGnuc.h
  • __INTTAB : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h , Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersTasking.h
  • __INTTAB_CPU : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h , Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersTasking.h
  • __ISTACK : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h , Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersTasking.h
  • __isync : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __jump_and_link : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __jumpBackToLink : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __jumpToFunction : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __jumpToFunctionWithLink : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __ld32() : IfxCpu_Intrinsics.h
  • __ld64() : IfxCpu_Intrinsics.h
  • __ld64_lu() : IfxCpu_Intrinsics.h
  • __ldmst : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __ldmst_c() : IfxCpu_Intrinsics.h
  • __ldmstAsm : IfxCpu_IntrinsicsTasking.h
  • __ldmstC : IfxCpu_IntrinsicsTasking.h
  • __leqf : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsTasking.h
  • __mac_r_sf : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h
  • __mac_sf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __max : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __max_stdreal : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsTasking.h
  • __maxf : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsTasking.h
  • __maxs : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __maxu : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __maxX : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __mem_barrier : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsTasking.h
  • __mfcr : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __min : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __min_stdreal : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsTasking.h
  • __minb : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __minbu : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __minf : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsTasking.h
  • __minh : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __minhu : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __mins : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __minu : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __minX : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __moveToAddrParam0 : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsTasking.h
  • __moveToDataParam0 : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsTasking.h
  • __moveToDataParamRet : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsTasking.h
  • __mtcr : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __mtcr_no_isync : IfxCpu_IntrinsicsTasking.h
  • __mulfractfract : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __mulfractlong : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __mulsc : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __neqf : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h
  • __non_return_call : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __nop() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __nops : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGnuc.h
  • __nops1000 : IfxCpu_IntrinsicsDcc.h
  • __packb : Ifx_TypesDcc.h , Ifx_TypesGnuc.h , Ifx_TypesGhs.h
  • __packhw : Ifx_TypesGnuc.h , Ifx_TypesDcc.h , Ifx_TypesGhs.h
  • __parity : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __popcnt : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGnuc.h
  • __putbit : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __restore : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __rol : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __ror : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __round16 : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __roundf : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __rslcx() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __s16_to_sfract : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __satb : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __satbu : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __sath : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __sathu : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __saturate : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsTasking.h
  • __saturate_stdreal : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsTasking.h
  • __saturatef : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsTasking.h
  • __saturateu : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGhs.h
  • __saturateX : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __scheduling_barrier() : IfxCpu_IntrinsicsDcc.h
  • __SDATA1 : CompilerTasking.h , Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersTasking.h , Ifx_Ssw_CompilersGnuc.h , CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h
  • __SDATA2 : CompilerGhs.h , CompilerTasking.h , Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersTasking.h , Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersGnuc.h , CompilerGnuc.h , CompilerDcc.h
  • __SDATA3 : CompilerTasking.h , Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersTasking.h , CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersGhs.h
  • __SDATA4 : CompilerTasking.h , Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersTasking.h , Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersGnuc.h , CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h
  • __setareg : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __setbyte1 : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h
  • __setbyte2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs.h
  • __setbyte3 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs.h
  • __setbyte4 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs.h
  • __sethw1 : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __sethw2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs.h
  • __setStackPointer : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __setubyte1 : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __setubyte2 : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __setubyte3 : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h
  • __setubyte4 : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h
  • __setuhw1 : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __setuhw2 : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h
  • __sfract_to_s16 : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h
  • __sfract_to_u16 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __shaaccum : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h
  • __shafracts : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __shasfracts : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h
  • __sqrf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGhs.h
  • __sqrtf : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h
  • __st32() : IfxCpu_Intrinsics.h
  • __st64() : IfxCpu_Intrinsics.h
  • __st64_lu() : IfxCpu_Intrinsics.h
  • __START : Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersTasking.h , Ifx_Ssw_CompilersGnuc.h
  • __stopPerfCounters : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __subs : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h
  • __subsu : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsTasking.h
  • __svlcx : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __swap : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs.h
  • __syscall : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __TRAPTAB : CompilerGhs.h , Ifx_Ssw_CompilersDcc.h , CompilerTasking.h , CompilerDcc.h , Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersTasking.h , CompilerGnuc.h , Ifx_Ssw_CompilersGnuc.h
  • __TRAPTAB_CPU : Ifx_Ssw_CompilersDcc.h , CompilerDcc.h , CompilerTasking.h , CompilerGhs.h , Ifx_Ssw_CompilersTasking.h , Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersGhs.h , CompilerGnuc.h
  • __tric_syscall : IfxCpu_IntrinsicsGnuc.h
  • __u16_to_sfract : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __upackb : Ifx_TypesGhs.h , Ifx_TypesGnuc.h , Ifx_TypesDcc.h
  • __upackhw : Ifx_TypesGhs.h , Ifx_TypesDcc.h , Ifx_TypesGnuc.h
  • __USTACK : Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersTasking.h , CompilerTasking.h , CompilerDcc.h , CompilerGhs.h , Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersGnuc.h , CompilerGnuc.h
  • _DATAF : Ifx_Cf32.h
  • _START() : Ifx_Ssw_Tc0.c
  • _START1() : Ifx_Ssw_Tc1.c
  • _START2() : Ifx_Ssw_Tc2.c
  • _START3() : Ifx_Ssw_Tc3.c


iLLD_TC38A: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- a -

  • ABCQMAX : IfxQspi.c
  • ABCQMIN : IfxQspi.c
  • abs : IfxCpu_IntrinsicsDcc.h
  • absdif : IfxCpu_IntrinsicsDcc.h
  • abss : IfxCpu_IntrinsicsDcc.h
  • adds : IfxCpu_IntrinsicsDcc.h
  • addTTime() : Bsp.h
  • areInterruptsEnabled() : Bsp.h
  • Assert_level : Assert.c
  • ATO_K : Ifx_AngleTrkF32.c
  • ATO_PSI : Ifx_AngleTrkF32.c
  • ATO_T : Ifx_AngleTrkF32.c


iLLD_TC38A: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- b -

  • bisr : IfxCpu_IntrinsicsDcc.h
  • boolean : Platform_Types.h
  • BSP_DEFAULT_TIMER : Bsp.h


iLLD_TC38A: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- c -

  • CFG_LONG_SIZE_T : Compilers.h
  • circ_t : Ifx_TypesDcc.h
  • clo : IfxCpu_IntrinsicsDcc.h
  • cls : IfxCpu_IntrinsicsDcc.h
  • clz : IfxCpu_IntrinsicsDcc.h , Ifx_Ssw_CompilersDcc.h
  • COMPILER_NAME : CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h , CompilerDcc.h
  • COMPILER_REVISION : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • COMPILER_VERSION : CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h , CompilerDcc.h
  • CONSOLE : Ifx_Console.h
  • CONST_CFG : Compilers.h
  • CONST_FUNCP : Ifx_Ssw_CompilersGhs.h
  • core0_main() : Ifx_Ssw_Tc0.c
  • core1_main() : Ifx_Ssw_Tc1.c
  • core2_main() : Ifx_Ssw_Tc2.c
  • core3_main() : Ifx_Ssw_Tc3.c
  • Cplx_f32_printf : Ifx_Cf32.h
  • CplxVecCpy_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • CplxVecCpy_f32S() : Ifx_Cf32.c , Ifx_Cf32.h
  • CplxVecMag_f32() : Ifx_Cf32.h , Ifx_Cf32.c
  • CplxVecMul_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • CplxVecPwr_f32() : Ifx_Cf32.h , Ifx_Cf32.c
  • CplxVecRst_f32() : Ifx_Cf32.h , Ifx_Cf32.c
  • CPU_BIT_ORDER : Platform_Types.h
  • CPU_BYTE_ORDER : Platform_Types.h
  • CPU_TYPE : Platform_Types.h
  • CPU_TYPE_16 : Platform_Types.h
  • CPU_TYPE_32 : Platform_Types.h
  • CPU_TYPE_8 : Platform_Types.h
  • CRC_ENABLE_DPIPE : Ifx_Crc.h


iLLD_TC38A: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- d -

  • DateTime_get() : Ifx_DateTime.c , Ifx_DateTime.h
  • DateTime_set() : Ifx_DateTime.h , Ifx_DateTime.c
  • debug : IfxCpu_IntrinsicsDcc.h
  • disable : IfxCpu_IntrinsicsDcc.h
  • disableInterrupts() : Bsp.h
  • dsync : IfxCpu_IntrinsicsDcc.h , Ifx_Ssw_CompilersDcc.h


iLLD_TC38A: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- e -

  • elapsed() : Bsp.h
  • enable : IfxCpu_IntrinsicsDcc.h
  • enableInterrupts() : Bsp.h
  • ENDL : IfxStdIf_DPipe.h
  • extr : IfxCpu_IntrinsicsDcc.h


iLLD_TC38A: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- f -

  • FALSE : Platform_Types.h
  • float32 : Platform_Types.h
  • float64 : Platform_Types.h
  • forceDisableInterrupts() : Bsp.h
  • fract : Ifx_TypesGnuc.h , Ifx_TypesGhs.h , Ifx_TypesTasking.h , Ifx_TypesDcc.h
  • FRACT_MAX : Ifx_TypesDcc.h , Ifx_TypesGnuc.h , Ifx_TypesGhs.h


iLLD_TC38A: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- g -

  • g_DateTimeOffset : Ifx_DateTime.c
  • getDeadLine() : Bsp.h
  • getTimeout() : Bsp.h


iLLD_TC38A: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- h -

  • h : IfxCpu_IntrinsicsDcc.h
  • HIGH_BYTE_FIRST : Platform_Types.h


iLLD_TC38A: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- i -

Icu : Icu.h

Icu_GetTimeStamp : Icu.h

Icu_StartCapture : Icu.h

Icu_StopCapture : Icu.h

Ifx___setareg : IfxCpu_IntrinsicsTasking.h

Ifx__abs : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__abs_stdreal : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h

Ifx__absb() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__absdif : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__absf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h

Ifx__absh() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__abss : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__abssh() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__adds : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGnuc.h

Ifx__addsu : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__bisr : IfxCpu_IntrinsicsDcc.h

Ifx__cacheai() : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__cacheawi : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__cacheawi_bo_post_inc() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__cacheiwi() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__checkrange : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h

Ifx__checkrangef : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h

Ifx__checkrangeX : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h

Ifx__clo : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__cls : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__clssf() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__clz : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h

Ifx__cmpAndSwap : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__crc32() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__debug : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__disable : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__disable_and_save : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGnuc.h

Ifx__dsync : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__enable : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__extr : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__extractbyte1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__extractbyte2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__extractbyte3() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__extractbyte4() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__extracthw1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__extracthw2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__extractubyte1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__extractubyte2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__extractubyte3() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__extractubyte4() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__extractuhw1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__extractuhw2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__extru : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__fabs() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__fabsf() : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h

Ifx__fixpoint_to_float32() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h

Ifx__float_to_fract() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h

Ifx__float_to_sfract() : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h

Ifx__fract_to_float : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__fract_to_sfract : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGnuc.h

Ifx__geqf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h

Ifx__getA11() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h

Ifx__getbit : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__getbyte1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__getbyte2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__getbyte3() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__getbyte4() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__getDataParamRet() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h

Ifx__getfract() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__gethw1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__gethw2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__getubyte1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__getubyte2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__getubyte3() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__getubyte4() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__getuhw1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__getuhw2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__imaskldmst : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h

Ifx__initpackb() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__initpackbl() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__initpackhw() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__initpackhwl() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__initupackb() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__initupackhw() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__ins : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__insert : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__insertbyte1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__insertbyte2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__insertbyte3() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__insertbyte4() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__inserthw1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__inserthw2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__insertubyte1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__insertubyte2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__insertubyte3() : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h

Ifx__insertubyte4() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__insertuhw1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__insertuhw2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__insn : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__isync : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__jump_and_link() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h

Ifx__jumpBackToLink() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h

Ifx__jumpToFunction() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h

Ifx__jumpToFunctionWithLink() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h

Ifx__ldmst : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__ldmstAsm() : IfxCpu_IntrinsicsTasking.h

Ifx__leqf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h

Ifx__mac_r_sf() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__mac_sf() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__max : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__max_stdreal : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h

Ifx__maxf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h

Ifx__maxs : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__maxu : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__maxX : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h

Ifx__mem_barrier : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h

Ifx__mfcr : IfxCpu_IntrinsicsDcc.h

Ifx__min : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__min_stdreal : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h

Ifx__minb() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__minbu() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__minf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h

Ifx__minh() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__minhu() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__mins : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__minu : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__minX : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h

Ifx__moveToAddrParam0() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h

Ifx__moveToDataParam0() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h

Ifx__moveToDataParamRet() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h

Ifx__mtcr : IfxCpu_IntrinsicsDcc.h

Ifx__mtcr_no_isync : IfxCpu_IntrinsicsTasking.h

Ifx__mulfractfract : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__mulfractlong : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__mulsc() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__neqf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h

Ifx__non_return_call : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h

Ifx__nop : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__NOP : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h

Ifx__nops() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h

Ifx__nops1000() : IfxCpu_IntrinsicsDcc.h

Ifx__parity() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__popcnt() : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h

Ifx__putbit : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__restore : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGnuc.h

Ifx__rol() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__ror() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__round16() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__roundf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h

Ifx__rslcx : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__s16_to_sfract() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__satb() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__satbu() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__sath() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__sathu() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__saturate : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h

Ifx__saturate_stdreal : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h

Ifx__saturatef : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h

Ifx__saturateu : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h

Ifx__saturateX : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h

Ifx__setareg : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h

Ifx__setbyte1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__setbyte2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__setbyte3() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__setbyte4() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__sethw1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__sethw2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__setStackPointer() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h

Ifx__setubyte1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__setubyte2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__setubyte3() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__setubyte4() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__setuhw1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__setuhw2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__sfract_to_s16() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__sfract_to_u16() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__shaaccum() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__shafracts() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__shasfracts() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__sqrf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h

Ifx__sqrtf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h

Ifx__stopPerfCounters() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h

Ifx__subs : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__subsu : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__svlcx : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__swap() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__syscall : IfxCpu_IntrinsicsDcc.h

Ifx__u16_to_sfract() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx_ActiveState : Ifx_Types.h

Ifx_ActiveState_high : Ifx_Types.h

Ifx_ActiveState_low : Ifx_Types.h

Ifx_AddressValue : Ifx_Types.h

IFX_ALIGN : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h

IFX_ALIGN_128 : IfxCpu_Intrinsics.h

IFX_ALIGN_16 : IfxCpu_Intrinsics.h

IFX_ALIGN_256 : IfxCpu_Intrinsics.h

IFX_ALIGN_32 : IfxCpu_Intrinsics.h

IFX_ALIGN_64 : IfxCpu_Intrinsics.h

IFX_ALIGN_8 : IfxCpu_Intrinsics.h

Ifx_AlignOn128 : IfxCpu_Intrinsics.h

Ifx_AlignOn16 : IfxCpu_Intrinsics.h

Ifx_AlignOn256 : IfxCpu_Intrinsics.h

Ifx_AlignOn32 : IfxCpu_Intrinsics.h

Ifx_AlignOn64 : IfxCpu_Intrinsics.h

Ifx_AlignOn8 : IfxCpu_Intrinsics.h

IFX_ANGLETRKF32_ATAN2F : Ifx_AngleTrkF32.c

Ifx_AngleTrkF32_bound() : Ifx_AngleTrkF32.c

Ifx_AngleTrkF32_boundInput() : Ifx_AngleTrkF32.c

Ifx_AngleTrkF32_getAbsolutePosition() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h

Ifx_AngleTrkF32_getDirection() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h

Ifx_AngleTrkF32_getFault() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h

Ifx_AngleTrkF32_getLoopSpeed() : Ifx_AngleTrkF32.h

Ifx_AngleTrkF32_getOffset() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h

Ifx_AngleTrkF32_getPeriodPerRotation() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h

Ifx_AngleTrkF32_getPosition() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h

Ifx_AngleTrkF32_getRawPosition() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h

Ifx_AngleTrkF32_getRefreshPeriod() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h

Ifx_AngleTrkF32_getResolution() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h

Ifx_AngleTrkF32_getSensorType() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h

Ifx_AngleTrkF32_getSpeed() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h

Ifx_AngleTrkF32_getTurn() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h

Ifx_AngleTrkF32_init() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h

Ifx_AngleTrkF32_initConfig() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h

Ifx_AngleTrkF32_reset() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h

Ifx_AngleTrkF32_resetFaults() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h

Ifx_AngleTrkF32_setControlGains() : Ifx_AngleTrkF32.c

Ifx_AngleTrkF32_setOffset() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h

Ifx_AngleTrkF32_setRefreshPeriod() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h

Ifx_AngleTrkF32_setUserSampling() : Ifx_AngleTrkF32.c

Ifx_AngleTrkF32_stdIfPosInit() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h

Ifx_AngleTrkF32_step() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h

Ifx_AngleTrkF32_update() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h

Ifx_AngleTrkF32_updateStatus() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h

IFX_ASSERT : Ifx_Assert.h , Assert.h

Ifx_Assert_doLevel() : Assert.c , Assert.h

Ifx_Assert_doValidate() : Assert.c , Assert.h

IFX_ASSERT_FEATURE_NOT_AVAILABLE : Ifx_Assert.h

IFX_ASSERT_FEATURE_NOT_IMPLEMENTED : Ifx_Assert.h

Ifx_Assert_setStandardIo : Assert.h

Ifx_C_Init() : Compilers.h

IFX_Cf32_add() : Ifx_Cf32.h

IFX_Cf32_amp() : Ifx_Cf32.h

IFX_Cf32_div() : Ifx_Cf32.h

IFX_Cf32_dot() : Ifx_Cf32.h

IFX_Cf32_exp() : Ifx_Cf32.h

IFX_Cf32_mag() : Ifx_Cf32.h

IFX_Cf32_mul() : Ifx_Cf32.h

IFX_Cf32_reset() : Ifx_Cf32.h

IFX_Cf32_saturate() : Ifx_Cf32.h

IFX_Cf32_set() : Ifx_Cf32.h

IFX_Cf32_sub() : Ifx_Cf32.h

IFX_CFG_ANGLETRKF32_FILTERED_SPEED : Ifx_AngleTrkF32.h

IFX_CFG_ANGLETRKF32_SPEED_FILTER : Ifx_AngleTrkF32.h

IFX_CFG_ASSERT_STDIO : Assert.h

IFX_CFG_ASSERT_USE_BREAKPOINT : Assert.h

IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT : Assert.h

IFX_CFG_CIRCULARBUFFER_C : Ifx_CircularBuffer.h

IFX_CFG_CONSOLE_INDENT_SIZE : Ifx_Console.h

IFX_CFG_CPU_TRAP_ASSERT_HOOK : IfxCpu_Trap.c

IFX_CFG_CPU_TRAP_BE_HOOK : IfxCpu_Trap.c

IFX_CFG_CPU_TRAP_CME_HOOK : IfxCpu_Trap.c

IFX_CFG_CPU_TRAP_DEBUG : IfxCpu_Trap.c

IFX_CFG_CPU_TRAP_IE_HOOK : IfxCpu_Trap.c

IFX_CFG_CPU_TRAP_IPE_HOOK : IfxCpu_Trap.c

IFX_CFG_CPU_TRAP_MME_HOOK : IfxCpu_Trap.c

IFX_CFG_CPU_TRAP_NMI_HOOK : IfxCpu_Trap.c

IFX_CFG_CPU_TRAP_SYSCALL_CPU0_HOOK : IfxCpu_Trap.c

IFX_CFG_CPU_TRAP_SYSCALL_CPU1_HOOK : IfxCpu_Trap.c

IFX_CFG_CPU_TRAP_SYSCALL_CPU2_HOOK : IfxCpu_Trap.c

IFX_CFG_CPU_TRAP_SYSCALL_CPU3_HOOK : IfxCpu_Trap.c

IFX_CFG_CPU_TRAP_SYSCALL_CPU4_HOOK : IfxCpu_Trap.c

IFX_CFG_CPU_TRAP_SYSCALL_CPU5_HOOK : IfxCpu_Trap.c

IFX_CFG_CPU_TRAP_TSR_HOOK : IfxCpu_Trap.c

IFX_CFG_GLOBAL_RESOURCES_ENABLED : Ifx_GlobalResources.h

IFX_CFG_SCU_EXT_CLOCK : IfxScu_cfg.h

IFX_CFG_SCU_PLL1_FREQUENCY : IfxScu_cfg.h

IFX_CFG_SCU_PLL2_FREQUENCY : IfxScu_cfg.h

IFX_CFG_SCU_PLL_FREQUENCY : IfxScu_cfg.h

IFX_CFG_SCU_SYSCLK_FREQUENCY : IfxScu_cfg.h

IFX_CFG_SCU_XTAL_FREQUENCY : IfxScu_cfg.h

IFX_CFG_SHELL_CMD_HISTORY_SIZE : Ifx_Shell.h

IFX_CFG_SHELL_CMD_LINE_SIZE : Ifx_Shell.h

IFX_CFG_SHELL_COMMAND_LISTS : Ifx_Shell.h

IFX_CFG_SHELL_PROMPT : Ifx_Shell.h

IFX_CFG_SSW_CALLOUT_LBIST : Ifx_Ssw_Tc0.c

IFX_CFG_SSW_CALLOUT_MBIST : Ifx_Ssw_Tc0.c

IFX_CFG_SSW_CALLOUT_MMIC_CHECK : Ifx_Ssw_Tc0.c

IFX_CFG_SSW_CALLOUT_MONBIST : Ifx_Ssw_Tc0.c

IFX_CFG_SSW_CALLOUT_PLL_INIT : Ifx_Ssw_Tc0.c

IFX_CFG_SSW_CALLOUT_PMS_INIT : Ifx_Ssw_Tc0.c

IFX_CFG_SSW_CALLOUT_SMU : Ifx_Ssw_Tc0.c

IFX_CFG_SSW_CLEAR_SAFETY_ENDINIT : Ifx_Ssw_Infra.h

IFX_CFG_SSW_ENABLE_INDIVIDUAL_C_INIT : Ifx_Ssw.h

IFX_CFG_SSW_ENABLE_TRICORE0 : Ifx_Ssw.h

IFX_CFG_SSW_ENABLE_TRICORE0_DCACHE : Ifx_Ssw_Tc0.c

IFX_CFG_SSW_ENABLE_TRICORE0_PCACHE : Ifx_Ssw_Tc0.c

IFX_CFG_SSW_ENABLE_TRICORE1 : Ifx_Ssw.h

IFX_CFG_SSW_ENABLE_TRICORE1_DCACHE : Ifx_Ssw_Tc1.c

IFX_CFG_SSW_ENABLE_TRICORE1_PCACHE : Ifx_Ssw_Tc1.c

IFX_CFG_SSW_ENABLE_TRICORE2 : Ifx_Ssw.h

IFX_CFG_SSW_ENABLE_TRICORE2_DCACHE : Ifx_Ssw_Tc2.c

IFX_CFG_SSW_ENABLE_TRICORE2_PCACHE : Ifx_Ssw_Tc2.c

IFX_CFG_SSW_ENABLE_TRICORE3 : Ifx_Ssw.h

IFX_CFG_SSW_ENABLE_TRICORE3_DCACHE : Ifx_Ssw_Tc3.c

IFX_CFG_SSW_ENABLE_TRICORE3_PCACHE : Ifx_Ssw_Tc3.c

IFX_CFG_SSW_EVR_OSC_FREQUENCY : Ifx_Ssw_Infra.h

IFX_CFG_SSW_PSW_DEFAULT : Ifx_Ssw.h

IFX_CFG_SSW_SET_SAFETY_ENDINIT : Ifx_Ssw_Infra.h

IFX_CFG_SSW_STARTCPU_WAIT_TIME_IN_SECONDS : Ifx_Ssw_Infra.h

IFX_CFG_SSW_SYSCLK_PIN_FREQUENCY : Ifx_Ssw_Infra.h

IFX_CFG_SSW_XTAL_FREQUENCY : Ifx_Ssw_Infra.h

Ifx_CircularBuffer_addDataIncr() : Ifx_CircularBuffer.c

Ifx_CircularBuffer_get16() : Ifx_CircularBuffer.c , Ifx_CircularBuffer.h

Ifx_CircularBuffer_get32() : Ifx_CircularBuffer.c , Ifx_CircularBuffer.h

Ifx_CircularBuffer_read32() : Ifx_CircularBuffer.c , Ifx_CircularBuffer.h

Ifx_CircularBuffer_read8() : Ifx_CircularBuffer.c , Ifx_CircularBuffer.h

Ifx_CircularBuffer_write32() : Ifx_CircularBuffer.c , Ifx_CircularBuffer.h

Ifx_CircularBuffer_write8() : Ifx_CircularBuffer.c , Ifx_CircularBuffer.h

Ifx_ClpxFloat32_Integral_init() : Ifx_IntegralF32.c , Ifx_IntegralF32.h

Ifx_ClpxFloat32_Integral_reset() : Ifx_IntegralF32.c , Ifx_IntegralF32.h

Ifx_ClpxFloat32_Integral_step() : Ifx_IntegralF32.c , Ifx_IntegralF32.h

Ifx_Console_decrAlign() : Ifx_Console.h

Ifx_Console_getIo() : Ifx_Console.h

Ifx_Console_incrAlign() : Ifx_Console.h

Ifx_Console_init() : Ifx_Console.c , Ifx_Console.h

Ifx_Console_print() : Ifx_Console.c , Ifx_Console.h

Ifx_Console_printAlign() : Ifx_Console.c , Ifx_Console.h

IFX_CONST : Compilers.h

Ifx_COUNTOF : IfxCpu_Intrinsics.h

Ifx_Crc_bitByBit() : Ifx_Crc.c , Ifx_Crc.h

Ifx_Crc_bitByBitFast() : Ifx_Crc.c , Ifx_Crc.h

Ifx_Crc_createTable() : Ifx_Crc.c , Ifx_Crc.h

Ifx_Crc_init() : Ifx_Crc.c , Ifx_Crc.h

Ifx_Crc_reflect() : Ifx_Crc.c

Ifx_Crc_table() : Ifx_Crc.c , Ifx_Crc.h

Ifx_Crc_tableFast() : Ifx_Crc.c , Ifx_Crc.h

Ifx_DataBufferMode : Ifx_Types.h

Ifx_DataBufferMode_normal : Ifx_Types.h

Ifx_DataBufferMode_timeStampSingle : Ifx_Types.h

IFX_EXTERN : Compilers.h

IFX_F32_LUTL_SINCOS_ELEMENT_COUNT : Ifx_LutLSincosF32.c

IFX_FAR_ABS : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h

Ifx_FftF32_generateTwiddleFactor() : Ifx_FftF32.c , Ifx_FftF32.h

Ifx_FftF32_lookUpReversedBits() : Ifx_FftF32.h

Ifx_FftF32_lookUpTwiddleFactor() : Ifx_FftF32.h

IFX_FFTF32_MAX_LENGTH : Ifx_FftF32.h

IFX_FFTF32_MAX_RESOLUTION : Ifx_FftF32.h

Ifx_FftF32_radix2() : Ifx_FftF32.c , Ifx_FftF32.h

Ifx_FftF32_radix2DecimationInTime() : Ifx_FftF32.c

Ifx_FftF32_radix2I() : Ifx_FftF32.c , Ifx_FftF32.h

Ifx_FftF32_reverseBits() : Ifx_FftF32.c , Ifx_FftF32.h

Ifx_Fifo : Ifx_Fifo.h

Ifx_Fifo_canReadCount() : Ifx_Fifo.c , Ifx_Fifo.h

Ifx_Fifo_canWriteCount() : Ifx_Fifo.c , Ifx_Fifo.h

Ifx_Fifo_clear() : Ifx_Fifo.c , Ifx_Fifo.h

Ifx_Fifo_create() : Ifx_Fifo.c , Ifx_Fifo.h

Ifx_Fifo_destroy() : Ifx_Fifo.c , Ifx_Fifo.h

Ifx_Fifo_flush() : Ifx_Fifo.h

Ifx_Fifo_init() : Ifx_Fifo.c , Ifx_Fifo.h

Ifx_Fifo_isEmpty() : Ifx_Fifo.h

Ifx_Fifo_read() : Ifx_Fifo.c , Ifx_Fifo.h

Ifx_Fifo_readCount() : Ifx_Fifo.h

Ifx_Fifo_write() : Ifx_Fifo.c , Ifx_Fifo.h

Ifx_Fifo_writeCount() : Ifx_Fifo.h

Ifx_g_console : Ifx_Console.c , Ifx_Console.h

Ifx_g_FftF32_bitReverseTable : Ifx_FftF32.h , Ifx_FftF32_BitReverseTable.c

Ifx_g_FftF32_twiddleTable : Ifx_FftF32.h , Ifx_FftF32_TwiddleTable.c

Ifx_g_LutAtan2F32_FxpAngle_table : Ifx_LutAtan2F32.h , Ifx_LutAtan2F32_Table.c

Ifx_g_LutAtan2F32_table : Ifx_LutAtan2F32.h , Ifx_LutAtan2F32_Table.c

Ifx_g_LutLSincosF32 : Ifx_LutLSincosF32.c , Ifx_LutLSincosF32.h

Ifx_g_LutLSincosF32_table : Ifx_LutLSincosF32.c

Ifx_g_LutSincosF32_table : Ifx_LutSincosF32.h , Ifx_LutSincosF32_Table.c

Ifx_g_WndF32_blackmanHarrisTable : Ifx_WndF32.h , Ifx_WndF32_BlackmanHarrisTable.c

Ifx_g_WndF32_hannTable : Ifx_WndF32.h , Ifx_WndF32_HannTable.c

Ifx_GlobalResources_get() : Ifx_GlobalResources.c , Ifx_GlobalResources.h

Ifx_GlobalResources_getIndex() : Ifx_GlobalResources.c , Ifx_GlobalResources.h

Ifx_GlobalResources_getItem() : Ifx_GlobalResources.c , Ifx_GlobalResources.h

Ifx_GlobalResources_getName() : Ifx_GlobalResources.c , Ifx_GlobalResources.h

Ifx_GlobalResources_init() : Ifx_GlobalResources.c , Ifx_GlobalResources.h

Ifx_GTM_TOM_TGC : IfxGtm_cfg.h

IFX_INLINE : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h

Ifx_IntegralF32_init() : Ifx_IntegralF32.c , Ifx_IntegralF32.h

Ifx_IntegralF32_reset() : Ifx_IntegralF32.c , Ifx_IntegralF32.h

Ifx_IntegralF32_step() : Ifx_IntegralF32.c , Ifx_IntegralF32.h

Ifx_InternalMux_init() : Ifx_InternalMux.c , Ifx_InternalMux.h

IFX_INTERRUPT : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , Compilers.h , CompilerTasking.h

IFX_INTERRUPT_FAST : CompilerDcc.h , CompilerGnuc.h , CompilerTasking.h

IFX_INTERRUPT_INTERNAL : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h

IFX_INTERRUPT_LEGACY : CompilerDcc.h

IFX_LLD_VERSION_GENERATION : IfxLldVersion.h

IFX_LLD_VERSION_MAJOR : IfxLldVersion.h

IFX_LLD_VERSION_MAJOR_UPDATE : IfxLldVersion.h

IFX_LLD_VERSION_MINOR : IfxLldVersion.h

IFX_LLD_VERSION_REVISION : IfxLldVersion.h

Ifx_LowPassPt1F32_do() : Ifx_LowPassPt1F32.c , Ifx_LowPassPt1F32.h

Ifx_LowPassPt1F32_init() : Ifx_LowPassPt1F32.c , Ifx_LowPassPt1F32.h

Ifx_LowPassPt1F32_reset() : Ifx_LowPassPt1F32.h

IFX_LUT_ANGLE_BITS : Ifx_Lut.h

IFX_LUT_ANGLE_PI : Ifx_Lut.h

IFX_LUT_ANGLE_RESOLUTION : Ifx_Lut.h

IFX_LUT_F32_TO_FXPANGLE : Ifx_Lut.h

Ifx_Lut_FxpAngle : Ifx_Lut.h

IFX_LUT_FXPANGLE_TO_F32 : Ifx_Lut.h

IFX_LUT_TABLE : Ifx_Lut.h

IFX_LUT_TABLE_CONST : Ifx_Lut.h

Ifx_LutAtan2F32_float32() : Ifx_LutAtan2F32.c , Ifx_LutAtan2F32.h

Ifx_LutAtan2F32_float32Private() : Ifx_LutAtan2F32.c

Ifx_LutAtan2F32_fxpAngle() : Ifx_LutAtan2F32.c , Ifx_LutAtan2F32.h

Ifx_LutAtan2F32_fxpAnglePrivate() : Ifx_LutAtan2F32.c

Ifx_LutAtan2F32_init() : Ifx_LutAtan2F32.c , Ifx_LutAtan2F32.h

IFX_LUTATAN2F32_SIZE : Ifx_LutAtan2F32.h

Ifx_LutIndexedLinearF32_search() : Ifx_LutIndexedLinearF32.h

Ifx_LutLinearF32_searchBin() : Ifx_LutLinearF32.c , Ifx_LutLinearF32.h

Ifx_LutLinearF32_searchNegSeq() : Ifx_LutLinearF32.h

Ifx_LutLinearF32_searchPosSeq() : Ifx_LutLinearF32.h

Ifx_LutLSincosF32_cos() : Ifx_LutLSincosF32.h

Ifx_LutLSincosF32_cossin() : Ifx_LutLSincosF32.h

Ifx_LutLSincosF32_sin() : Ifx_LutLSincosF32.h

Ifx_LutSincosF32_cos() : Ifx_LutSincosF32.h

Ifx_LutSincosF32_cossin() : Ifx_LutSincosF32.h

Ifx_LutSincosF32_init() : Ifx_LutSincosF32.c , Ifx_LutSincosF32.h

Ifx_LutSincosF32_sin() : Ifx_LutSincosF32.c , Ifx_LutSincosF32.h

IFX_NEAR_ABS : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h

IFX_ONE_OVER_SQRT_THREE : Ifx_Types.h

IFX_ONES : Ifx_Types.h

IFX_PACKED : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h

Ifx_ParityMode : Ifx_Types.h

Ifx_ParityMode_even : Ifx_Types.h

Ifx_ParityMode_odd : Ifx_Types.h

IFX_PI : Ifx_Types.h

Ifx_Priority : Ifx_Types.h

Ifx_Pwm_Mode : Ifx_Types.h

Ifx_Pwm_Mode_centerAligned : Ifx_Types.h

Ifx_Pwm_Mode_centerAlignedInverted : Ifx_Types.h

Ifx_Pwm_Mode_count : Ifx_Types.h

Ifx_Pwm_Mode_init : Ifx_Types.h

Ifx_Pwm_Mode_leftAligned : Ifx_Types.h

Ifx_Pwm_Mode_off : Ifx_Types.h

Ifx_Pwm_Mode_rightAligned : Ifx_Types.h

Ifx_RampF32_getRef() : Ifx_RampF32.h

Ifx_RampF32_getValue() : Ifx_RampF32.h

Ifx_RampF32_init() : Ifx_RampF32.h

Ifx_RampF32_reset() : Ifx_RampF32.h

Ifx_RampF32_setRef() : Ifx_RampF32.h

Ifx_RampF32_setSlewRate() : Ifx_RampF32.h

Ifx_RampF32_step() : Ifx_RampF32.c , Ifx_RampF32.h

IFX_REL_A0 : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h

IFX_REL_A1 : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h

IFX_REL_A8 : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h

IFX_REL_A9 : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h

Ifx_RxSel : Ifx_Types.h

Ifx_RxSel_a : Ifx_Types.h

Ifx_RxSel_b : Ifx_Types.h

Ifx_RxSel_c : Ifx_Types.h

Ifx_RxSel_d : Ifx_Types.h

Ifx_RxSel_e : Ifx_Types.h

Ifx_RxSel_f : Ifx_Types.h

Ifx_RxSel_g : Ifx_Types.h

Ifx_RxSel_h : Ifx_Types.h

Ifx_Shell_bbProtocolStart() : Ifx_Shell.c , Ifx_Shell.h

Ifx_Shell_Call : Ifx_Shell.h

IFX_SHELL_CMD_HISTORY_NO_ITEM : Ifx_Shell.h

IFX_SHELL_CMD_STATE_ESCAPE : Ifx_Shell.h

IFX_SHELL_CMD_STATE_ESCAPE_BRACKET : Ifx_Shell.h

IFX_SHELL_CMD_STATE_ESCAPE_BRACKET_NUMBER : Ifx_Shell.h

IFX_SHELL_CMD_STATE_NORMAL : Ifx_Shell.h

Ifx_Shell_cmdBuffer : Ifx_Shell.c

Ifx_Shell_cmdEscapeProcess() : Ifx_Shell.c

Ifx_Shell_CmdState : Ifx_Shell.h

IFX_SHELL_COMMAND_LIST_END : Ifx_Shell.h

Ifx_Shell_commandFind() : Ifx_Shell.c , Ifx_Shell.h

Ifx_Shell_CommandList : Ifx_Shell.h

Ifx_Shell_CommandListConst : Ifx_Shell.h

Ifx_Shell_commandListFind() : Ifx_Shell.c

Ifx_Shell_deinit() : Ifx_Shell.c , Ifx_Shell.h

Ifx_Shell_disable() : Ifx_Shell.c , Ifx_Shell.h

Ifx_Shell_enable() : Ifx_Shell.c , Ifx_Shell.h

Ifx_Shell_execute() : Ifx_Shell.c

IFX_SHELL_IF_ECHO : Ifx_Shell.c

Ifx_Shell_init() : Ifx_Shell.c , Ifx_Shell.h

Ifx_Shell_initConfig() : Ifx_Shell.c , Ifx_Shell.h

Ifx_Shell_isEndOfLine() : Ifx_Shell.c

IFX_SHELL_LLD : Ifx_Shell.c

IFX_SHELL_LLU : Ifx_Shell.c

IFX_SHELL_LLX : Ifx_Shell.c

Ifx_Shell_matchToken() : Ifx_Shell.c , Ifx_Shell.h

IFX_SHELL_MAX_MESSAGE_SIZE : Ifx_Shell.c

IFX_SHELL_NULL_CHAR : Ifx_Shell.h

Ifx_Shell_parseAddress() : Ifx_Shell.c , Ifx_Shell.h

Ifx_Shell_parseFloat32() : Ifx_Shell.c , Ifx_Shell.h

Ifx_Shell_parseFloat64() : Ifx_Shell.c , Ifx_Shell.h

Ifx_Shell_parseSInt32() : Ifx_Shell.c , Ifx_Shell.h

Ifx_Shell_parseSInt64() : Ifx_Shell.c , Ifx_Shell.h

Ifx_Shell_parseToken() : Ifx_Shell.c , Ifx_Shell.h

Ifx_Shell_parseUInt32() : Ifx_Shell.c , Ifx_Shell.h

Ifx_Shell_parseUInt64() : Ifx_Shell.c , Ifx_Shell.h

Ifx_Shell_printSyntax() : Ifx_Shell.c , Ifx_Shell.h

Ifx_Shell_process() : Ifx_Shell.c , Ifx_Shell.h

Ifx_Shell_protocolStart() : Ifx_Shell.c , Ifx_Shell.h

Ifx_Shell_ResultCode : Ifx_Shell.h

Ifx_Shell_ResultCode_nok : Ifx_Shell.h

Ifx_Shell_ResultCode_ok : Ifx_Shell.h

Ifx_Shell_ResultCode_undefined : Ifx_Shell.h

Ifx_Shell_ResultCode_unknown : Ifx_Shell.h

Ifx_Shell_showHelp() : Ifx_Shell.c , Ifx_Shell.h

Ifx_Shell_showHelpSingle() : Ifx_Shell.c , Ifx_Shell.h

Ifx_Shell_showHelpSingleCommand() : Ifx_Shell.c

Ifx_Shell_skipWhitespace() : Ifx_Shell.c , Ifx_Shell.h

IFX_SHELL_SYNTAX_LIST_END : Ifx_Shell.h

IFX_SHELL_WRITE_BACKSPACES : Ifx_Shell.c

IFX_SHELL_WRITE_SPACES : Ifx_Shell.c

Ifx_SignedTimerVal : Ifx_Types.h

Ifx_SizeT : Ifx_Types.h

IFX_SIZET_MAX : Ifx_Types.h

IFX_SQRT_THREE : Ifx_Types.h

IFX_SQRT_TWO : Ifx_Types.h

Ifx_Ssw___setAddressReg : Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersTasking.h

IFX_SSW_APPLICATIONRESET : Ifx_Ssw_Infra.h

IFX_SSW_APPLICATIONRESET_MASK : Ifx_Ssw_Infra.h

Ifx_Ssw_C_Init() : Ifx_Ssw_Infra.c , Ifx_Ssw_Infra.h

Ifx_Ssw_C_InitInline() : Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersTasking.h

Ifx_Ssw_clearCpuEndinit() : Ifx_Ssw_Infra.c , Ifx_Ssw_Infra.h

Ifx_Ssw_clearCpuEndinitInline() : Ifx_Ssw_Infra.h

Ifx_Ssw_clearGlobalSafetyEndinitInline() : Ifx_Ssw_Infra.h

Ifx_Ssw_clearSafetyEndinit() : Ifx_Ssw_Infra.c , Ifx_Ssw_Infra.h

Ifx_Ssw_clearSafetyEndinitInline() : Ifx_Ssw_Infra.h

Ifx_Ssw_CLZ : Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersTasking.h , Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersGhs.h

IFX_SSW_COLD_POWERONRESET_MASK : Ifx_Ssw_Infra.h

IFX_SSW_COMMON_LINKER_SYMBOLS : Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersTasking.h , Ifx_Ssw_Tc0.c , Ifx_Ssw_Tc1.c , Ifx_Ssw_Tc2.c , Ifx_Ssw_Tc3.c

IFX_SSW_CORE_LINKER_SYMBOLS : Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersTasking.h , Ifx_Ssw_Tc0.c , Ifx_Ssw_Tc1.c , Ifx_Ssw_Tc2.c , Ifx_Ssw_Tc3.c

IFX_SSW_CSA_SIZE : Ifx_Ssw_Infra.h

Ifx_Ssw_disableCpuWatchdog() : Ifx_Ssw_Infra.c , Ifx_Ssw_Infra.h

Ifx_Ssw_disableSafetyWatchdog() : Ifx_Ssw_Infra.c , Ifx_Ssw_Infra.h

Ifx_Ssw_DSYNC() : Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersTasking.h

Ifx_Ssw_enableCpuWatchdog() : Ifx_Ssw_Infra.c , Ifx_Ssw_Infra.h

Ifx_Ssw_enableSafetyWatchdog() : Ifx_Ssw_Infra.c , Ifx_Ssw_Infra.h

Ifx_Ssw_getCpuWatchdogPassword() : Ifx_Ssw_Infra.c , Ifx_Ssw_Infra.h

Ifx_Ssw_getCpuWatchdogPasswordInline() : Ifx_Ssw_Infra.h

Ifx_Ssw_getDataParam0() : Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersTasking.h

Ifx_Ssw_getGlobalSafetyEndinitPasswordInline() : Ifx_Ssw_Infra.h

Ifx_Ssw_getSafetyWatchdogPassword() : Ifx_Ssw_Infra.c , Ifx_Ssw_Infra.h

Ifx_Ssw_getSafetyWatchdogPasswordInline() : Ifx_Ssw_Infra.h

Ifx_Ssw_getStmFrequency() : Ifx_Ssw_Infra.c , Ifx_Ssw_Infra.h

IFX_SSW_INIT_CONTEXT : Ifx_Ssw_Tc0.c

Ifx_Ssw_initCSA() : Ifx_Ssw_Infra.h

IFX_SSW_INLINE : Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersTasking.h

Ifx_Ssw_isApplicationReset() : Ifx_Ssw_Infra.h

Ifx_Ssw_isColdPoweronReset() : Ifx_Ssw_Infra.h

Ifx_Ssw_ISYNC() : Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersTasking.h

Ifx_Ssw_jumpBackToLink() : Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersTasking.h

Ifx_Ssw_jumpToFunction() : Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersTasking.h

Ifx_Ssw_jumpToFunctionWithLink() : Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersTasking.h

Ifx_Ssw_MFCR : Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersTasking.h , Ifx_Ssw_CompilersDcc.h

Ifx_Ssw_MINU() : Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersTasking.h

Ifx_Ssw_moveToDataParam0() : Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersTasking.h

Ifx_Ssw_MTCR : Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersTasking.h , Ifx_Ssw_CompilersDcc.h

Ifx_Ssw_NOP() : Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersTasking.h

IFX_SSW_NULL_PTR : Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersTasking.h

IFX_SSW_POWERONRESET_MASK : Ifx_Ssw_Infra.h

IFX_SSW_SEICON_REL_VAL_MSK : Ifx_Ssw_Infra.h

Ifx_Ssw_serviceCpuWatchdog() : Ifx_Ssw_Infra.c , Ifx_Ssw_Infra.h

Ifx_Ssw_serviceSafetyWatchdog() : Ifx_Ssw_Infra.c , Ifx_Ssw_Infra.h

Ifx_Ssw_setAddressReg : Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersTasking.h

Ifx_Ssw_setCpu0Idle() : Ifx_Ssw_Infra.c , Ifx_Ssw_Infra.h

Ifx_Ssw_setCpuEndinit() : Ifx_Ssw_Infra.c , Ifx_Ssw_Infra.h

Ifx_Ssw_setCpuEndinitInline() : Ifx_Ssw_Infra.h

Ifx_Ssw_setGlobalSafetyEndinitInline() : Ifx_Ssw_Infra.h

Ifx_Ssw_setSafetyEndinit() : Ifx_Ssw_Infra.c , Ifx_Ssw_Infra.h

Ifx_Ssw_setSafetyEndinitInline() : Ifx_Ssw_Infra.h

Ifx_Ssw_startCore() : Ifx_Ssw_Infra.c , Ifx_Ssw_Infra.h

IFX_SSW_WDT_PASSWORD_INVERT_MSK : Ifx_Ssw_Infra.h

IFX_STATIC : Compilers.h

Ifx_TickTime : Ifx_Types.h

Ifx_TimerValue : Ifx_Types.h

IFX_TWO_OVER_PI : Ifx_Types.h

IFX_UNUSED_PARAMETER : Ifx_Types.h

IFX_VALIDATE : Ifx_Assert.h , Assert.h

IFX_VERBOSE_LEVEL_DEBUG : Ifx_Assert.h

IFX_VERBOSE_LEVEL_ERROR : Ifx_Assert.h

IFX_VERBOSE_LEVEL_FAILURE : Ifx_Assert.h

IFX_VERBOSE_LEVEL_INFO : Ifx_Assert.h

IFX_VERBOSE_LEVEL_OFF : Ifx_Assert.h

IFX_VERBOSE_LEVEL_WARNING : Ifx_Assert.h

Ifx_WndF32_apply() : Ifx_WndF32.h

IFX_WNDF32_TABLE_LENGTH : Ifx_WndF32.h

IFX_ZEROS : Ifx_Types.h

IfxAsclin0_CTSA_P14_9_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin0_RTS_P14_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin0_RXA_P14_1_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin0_RXB_P15_3_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin0_RXC_P01_8_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin0_RXD_P33_10_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin0_RXE_P13_11_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin0_SCLK_P14_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin0_SCLK_P15_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin0_TX_P01_13_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin0_TX_P13_10_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin0_TX_P14_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin0_TX_P14_1_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin0_TX_P15_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin0_TX_P15_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin0_TX_P33_9_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin10_RXA_P00_4_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin10_RXB_P00_8_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin10_RXC_P13_0_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin10_RXD_P13_1_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin10_SCLK_P13_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin10_SLSO_P13_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin10_TX_P00_8_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin10_TX_P13_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin11_RXA_P10_0_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin11_RXB_P10_4_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin11_RXC_P21_0_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin11_RXD_P21_1_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin11_RXE_P21_2_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin11_RXF_P21_5_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin11_SCLK_P21_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin11_SLSO_P21_4_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin11_TX_P10_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin11_TX_P21_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin11_TX_P21_5_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin12_RXA_P00_3_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin12_RXB_P00_5_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin12_TX_P00_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin12_TX_P01_6_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin13_RXA_P00_9_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin13_RXB_P00_11_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin13_TX_P00_10_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin13_TX_P00_11_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin14_RXA_P33_3_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin14_RXB_P33_4_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin14_TX_P33_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin14_TX_P33_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin15_RXA_P32_4_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin15_RXB_P32_7_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin15_TX_P32_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin15_TX_P33_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin16_RXA_P23_5_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin16_RXB_P23_7_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin16_TX_P23_6_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin16_TX_P23_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin17_RXA_P22_11_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin17_RXB_P21_0_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin17_TX_P22_11_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin17_TX_P22_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin18_RXA_P21_1_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin18_RXB_P21_4_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin18_TX_P21_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin18_TX_P21_4_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin19_RXA_P15_6_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin19_RXB_P15_7_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin19_TX_P15_4_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin19_TX_P15_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_CTSA_P20_7_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_CTSB_P32_4_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_RTS_P20_6_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_RTS_P23_1_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_RXA_P15_1_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_RXB_P15_5_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_RXC_P20_9_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_RXD_P14_8_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_RXE_P11_10_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_RXF_P33_13_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_RXG_P02_3_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_SCLK_P15_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_SCLK_P20_10_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_SCLK_P33_11_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_SCLK_P33_12_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_SLSO_P14_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_SLSO_P20_8_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_SLSO_P33_10_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_TX_P02_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_TX_P11_12_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_TX_P14_10_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_TX_P14_15_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_TX_P15_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_TX_P15_1_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_TX_P15_4_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_TX_P15_5_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_TX_P20_10_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_TX_P33_12_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_TX_P33_13_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin20_RXA_P14_7_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin20_RXB_P14_9_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin20_TX_P14_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin20_TX_P14_8_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin21_RXA_P13_0_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin21_RXB_P13_3_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin21_TX_P13_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin21_TX_P13_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin22_RXA_P10_4_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin22_RXB_P10_5_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin22_TX_P10_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin22_TX_P10_4_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin23_RXA_P10_6_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin23_RXB_P10_7_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin23_TX_P10_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin23_TX_P10_8_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin2_CTSA_P10_7_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin2_CTSB_P33_5_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin2_RTS_P10_8_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin2_RTS_P33_4_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin2_RXA_P14_3_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin2_RXB_P02_1_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin2_RXC_P02_10_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin2_RXD_P10_6_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin2_RXE_P33_8_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin2_RXF_P32_6_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin2_RXG_P02_0_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin2_SCLK_P02_4_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin2_SCLK_P10_6_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin2_SCLK_P14_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin2_SCLK_P33_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin2_SCLK_P33_9_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin2_SLSO_P02_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin2_SLSO_P10_5_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin2_SLSO_P33_6_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin2_TX_P02_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin2_TX_P02_9_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin2_TX_P10_5_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin2_TX_P14_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin2_TX_P14_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin2_TX_P32_5_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin2_TX_P33_8_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin2_TX_P33_9_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_CTSA_P00_12_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_RTS_P00_9_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_RXA_P15_7_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_RXB_P11_0_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_RXC_P20_3_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_RXD_P32_2_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_RXE_P00_1_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_RXF_P21_6_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_RXG_P21_2_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_RXG_P21_3_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_RXH_P13_12_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_SCLK_P00_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_SCLK_P00_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_SCLK_P11_1_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_SCLK_P11_4_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_SCLK_P15_6_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_SCLK_P15_8_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_SCLK_P20_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_SCLK_P21_5_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_SCLK_P21_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_SCLK_P32_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_SCLK_P33_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_SLSO_P00_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_SLSO_P12_1_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_SLSO_P14_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_SLSO_P21_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_SLSO_P21_6_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_SLSO_P33_1_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_TX_P00_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_TX_P00_1_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_TX_P11_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_TX_P11_1_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_TX_P13_9_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_TX_P15_6_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_TX_P15_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_TX_P20_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_TX_P20_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_TX_P21_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_TX_P22_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_TX_P22_1_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_TX_P32_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_TX_P32_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin4_RXA_P00_12_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin4_RXB_P34_2_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin4_RXC_P22_6_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin4_RXD_P22_9_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin4_SCLK_P00_10_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin4_SCLK_P22_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin4_SCLK_P34_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin4_SLSO_P00_11_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin4_SLSO_P22_11_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin4_SLSO_P22_4_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin4_SLSO_P34_4_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin4_TX_P00_9_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin4_TX_P22_10_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin4_TX_P22_5_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin4_TX_P34_1_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin5_RXA_P00_6_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin5_RXB_P33_4_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin5_RXC_P22_3_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin5_RXD_P14_15_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin5_SCLK_P14_12_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin5_SCLK_P22_8_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin5_SCLK_P33_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin5_SLSO_P14_8_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin5_SLSO_P33_5_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin5_TX_P00_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin5_TX_P14_14_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin5_TX_P22_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin5_TX_P33_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin6_RXA_P23_3_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin6_RXB_P01_0_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin6_RXC_P32_6_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin6_RXD_P10_9_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin6_RXE_P22_0_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin6_RXF_P23_1_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin6_SCLK_P02_14_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin6_SCLK_P10_11_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin6_SCLK_P23_1_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin6_SLSO_P02_12_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin6_SLSO_P10_13_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin6_SLSO_P23_4_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin6_TX_P01_1_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin6_TX_P02_15_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin6_TX_P10_10_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin6_TX_P22_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin6_TX_P23_5_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin6_TX_P32_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin7_RXA_P14_15_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin7_RXB_P01_8_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin7_RXC_P23_2_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin7_RXD_P13_11_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin7_RXE_P22_1_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin7_RXF_P22_4_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin7_SCLK_P01_10_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin7_SCLK_P13_13_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin7_SCLK_P14_12_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin7_SLSO_P01_11_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin7_SLSO_P13_15_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin7_SLSO_P14_8_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin7_TX_P01_12_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin7_TX_P01_9_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin7_TX_P13_12_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin7_TX_P14_14_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin7_TX_P22_1_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin7_TX_P23_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin8_RXA_P02_9_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin8_RXB_P02_10_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin8_RXC_P33_1_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin8_RXD_P33_6_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin8_RXE_P34_5_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin8_SCLK_P02_8_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin8_SLSO_P02_11_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin8_TX_P02_9_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin8_TX_P33_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin8_TX_P34_5_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin9_RXA_P01_5_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin9_RXB_P01_7_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin9_RXC_P14_7_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin9_RXD_P14_9_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin9_RXE_P20_6_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin9_RXF_P20_7_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin9_SCLK_P01_6_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin9_SLSO_P01_4_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin9_TX_P01_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin9_TX_P14_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin9_TX_P20_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin_Asc_blockingRead() : IfxAsclin_Asc.c , IfxAsclin_Asc.h

IfxAsclin_Asc_blockingWrite() : IfxAsclin_Asc.c , IfxAsclin_Asc.h

IfxAsclin_Asc_canReadCount() : IfxAsclin_Asc.c , IfxAsclin_Asc.h

IfxAsclin_Asc_canWriteCount() : IfxAsclin_Asc.c , IfxAsclin_Asc.h

IfxAsclin_Asc_clearRx() : IfxAsclin_Asc.c , IfxAsclin_Asc.h

IfxAsclin_Asc_clearTx() : IfxAsclin_Asc.c , IfxAsclin_Asc.h

IfxAsclin_Asc_disableModule() : IfxAsclin_Asc.c , IfxAsclin_Asc.h

IfxAsclin_Asc_flushTx() : IfxAsclin_Asc.c , IfxAsclin_Asc.h

IfxAsclin_Asc_getReadCount() : IfxAsclin_Asc.c , IfxAsclin_Asc.h

IfxAsclin_Asc_getReadEvent() : IfxAsclin_Asc.c , IfxAsclin_Asc.h

IfxAsclin_Asc_getSendCount() : IfxAsclin_Asc.c , IfxAsclin_Asc.h

IfxAsclin_Asc_getTxTimeStamp() : IfxAsclin_Asc.c , IfxAsclin_Asc.h

IfxAsclin_Asc_getWriteCount() : IfxAsclin_Asc.c , IfxAsclin_Asc.h

IfxAsclin_Asc_getWriteEvent() : IfxAsclin_Asc.c , IfxAsclin_Asc.h

IfxAsclin_Asc_initiateTransmission() : IfxAsclin_Asc.c , IfxAsclin_Asc.h

IfxAsclin_Asc_initModule() : IfxAsclin_Asc.c , IfxAsclin_Asc.h

IfxAsclin_Asc_initModuleConfig() : IfxAsclin_Asc.c , IfxAsclin_Asc.h

IfxAsclin_Asc_isrError() : IfxAsclin_Asc.c , IfxAsclin_Asc.h

IfxAsclin_Asc_isrReceive() : IfxAsclin_Asc.c , IfxAsclin_Asc.h

IfxAsclin_Asc_isrTransmit() : IfxAsclin_Asc.c , IfxAsclin_Asc.h

IfxAsclin_Asc_read() : IfxAsclin_Asc.c , IfxAsclin_Asc.h

IfxAsclin_Asc_resetSendCount() : IfxAsclin_Asc.c , IfxAsclin_Asc.h

IfxAsclin_Asc_stdIfDPipeInit() : IfxAsclin_Asc.c , IfxAsclin_Asc.h

IfxAsclin_Asc_write() : IfxAsclin_Asc.c , IfxAsclin_Asc.h

IfxAsclin_cfg_indexMap : IfxAsclin_cfg.c , IfxAsclin_cfg.h

IfxAsclin_Checksum : IfxAsclin.h

IfxAsclin_Checksum_classic : IfxAsclin.h

IfxAsclin_Checksum_enhanced : IfxAsclin.h

IfxAsclin_ChecksumInjection : IfxAsclin.h

IfxAsclin_ChecksumInjection_notWritten : IfxAsclin.h

IfxAsclin_ChecksumInjection_written : IfxAsclin.h

IfxAsclin_clearAllFlags() : IfxAsclin.h

IfxAsclin_clearBreakDetectedFlag() : IfxAsclin.h

IfxAsclin_clearCollisionDetectionErrorFlag() : IfxAsclin.h

IfxAsclin_clearFallingEdgeDetectedFlag() : IfxAsclin.h

IfxAsclin_clearFrameErrorFlag() : IfxAsclin.h

IfxAsclin_clearHeaderTimeoutFlag() : IfxAsclin.h

IfxAsclin_clearKernelResetStatus() : IfxAsclin.h

IfxAsclin_clearLinAutoBaudDetectionErrorFlag() : IfxAsclin.h

IfxAsclin_clearLinChecksumErrorFlag() : IfxAsclin.h

IfxAsclin_clearLinParityErrorFlag() : IfxAsclin.h

IfxAsclin_clearParityErrorFlag() : IfxAsclin.h

IfxAsclin_clearRaisingEdgeDetectedFlag() : IfxAsclin.h

IfxAsclin_clearResponseTimeoutFlag() : IfxAsclin.h

IfxAsclin_clearRxFifoFillLevelFlag() : IfxAsclin.h

IfxAsclin_clearRxFifoOverflowFlag() : IfxAsclin.h

IfxAsclin_clearRxFifoUnderflowFlag() : IfxAsclin.h

IfxAsclin_clearRxHeaderEndFlag() : IfxAsclin.h

IfxAsclin_clearRxResponseEndFlag() : IfxAsclin.h

IfxAsclin_clearTransmissionCompletedFlag() : IfxAsclin.h

IfxAsclin_clearTxFifoFillLevelFlag() : IfxAsclin.h

IfxAsclin_clearTxFifoOverflowFlag() : IfxAsclin.h

IfxAsclin_clearTxHeaderEndFlag() : IfxAsclin.h

IfxAsclin_clearTxResponseEndFlag() : IfxAsclin.h

IfxAsclin_ClockPolarity : IfxAsclin.h

IfxAsclin_ClockPolarity_idleHigh : IfxAsclin.h

IfxAsclin_ClockPolarity_idleLow : IfxAsclin.h

IfxAsclin_ClockSource : IfxAsclin.h

IfxAsclin_ClockSource_ascFastClock : IfxAsclin.h

IfxAsclin_ClockSource_ascSlowClock : IfxAsclin.h

IfxAsclin_ClockSource_noClock : IfxAsclin.h

IfxAsclin_Cts_In_pinTable : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin_CtsInputSelect : IfxAsclin.h

IfxAsclin_CtsInputSelect_0 : IfxAsclin.h

IfxAsclin_CtsInputSelect_1 : IfxAsclin.h

IfxAsclin_CtsInputSelect_2 : IfxAsclin.h

IfxAsclin_CtsInputSelect_3 : IfxAsclin.h

IfxAsclin_DataLength : IfxAsclin.h

IfxAsclin_DataLength_1 : IfxAsclin.h

IfxAsclin_DataLength_10 : IfxAsclin.h

IfxAsclin_DataLength_11 : IfxAsclin.h

IfxAsclin_DataLength_12 : IfxAsclin.h

IfxAsclin_DataLength_13 : IfxAsclin.h

IfxAsclin_DataLength_14 : IfxAsclin.h

IfxAsclin_DataLength_15 : IfxAsclin.h

IfxAsclin_DataLength_16 : IfxAsclin.h

IfxAsclin_DataLength_2 : IfxAsclin.h

IfxAsclin_DataLength_3 : IfxAsclin.h

IfxAsclin_DataLength_4 : IfxAsclin.h

IfxAsclin_DataLength_5 : IfxAsclin.h

IfxAsclin_DataLength_6 : IfxAsclin.h

IfxAsclin_DataLength_7 : IfxAsclin.h

IfxAsclin_DataLength_8 : IfxAsclin.h

IfxAsclin_DataLength_9 : IfxAsclin.h

IfxAsclin_disableAllFlags() : IfxAsclin.h

IfxAsclin_disableModule() : IfxAsclin.c , IfxAsclin.h

IfxAsclin_enableAscErrorFlags() : IfxAsclin.c , IfxAsclin.h

IfxAsclin_enableAutoBaudrateDetection() : IfxAsclin.h

IfxAsclin_enableBreakDetectedFlag() : IfxAsclin.h

IfxAsclin_enableCollisionDetection() : IfxAsclin.h

IfxAsclin_enableCollisionDetectionErrorFlag() : IfxAsclin.h

IfxAsclin_enableCts() : IfxAsclin.h

IfxAsclin_enableFallingEdgeDetectedFlag() : IfxAsclin.h

IfxAsclin_enableFrameErrorFlag() : IfxAsclin.h

IfxAsclin_enableHardwareChecksum() : IfxAsclin.h

IfxAsclin_enableHeaderTimeoutFlag() : IfxAsclin.h

IfxAsclin_enableLinAutoBaudDetectionErrorFlag() : IfxAsclin.h

IfxAsclin_enableLinChecksumErrorFlag() : IfxAsclin.h

IfxAsclin_enableLinParityErrorFlag() : IfxAsclin.h

IfxAsclin_enableLoopBackMode() : IfxAsclin.h

IfxAsclin_enableModule() : IfxAsclin.c , IfxAsclin.h

IfxAsclin_enableParity() : IfxAsclin.h

IfxAsclin_enableParityErrorFlag() : IfxAsclin.h

IfxAsclin_enableRaisingEdgeDetectedFlag() : IfxAsclin.h

IfxAsclin_enableResponseTimeoutFlag() : IfxAsclin.h

IfxAsclin_enableRxFifoFillLevelFlag() : IfxAsclin.h

IfxAsclin_enableRxFifoInlet() : IfxAsclin.h

IfxAsclin_enableRxFifoOverflowFlag() : IfxAsclin.h

IfxAsclin_enableRxFifoUnderflowFlag() : IfxAsclin.h

IfxAsclin_enableRxHeaderEndFlag() : IfxAsclin.h

IfxAsclin_enableRxResponseEndFlag() : IfxAsclin.h

IfxAsclin_enableTransmissionCompletedFlag() : IfxAsclin.h

IfxAsclin_enableTxFifoFillLevelFlag() : IfxAsclin.h

IfxAsclin_enableTxFifoOutlet() : IfxAsclin.h

IfxAsclin_enableTxFifoOverflowFlag() : IfxAsclin.h

IfxAsclin_enableTxHeaderEndFlag() : IfxAsclin.h

IfxAsclin_enableTxResponseEndFlag() : IfxAsclin.h

IfxAsclin_FifoInterruptMode : IfxAsclin.h

IfxAsclin_FifoInterruptMode_batch : IfxAsclin.h

IfxAsclin_FifoInterruptMode_combined : IfxAsclin.h

IfxAsclin_FifoInterruptMode_single : IfxAsclin.h

IfxAsclin_flushRxFifo() : IfxAsclin.h

IfxAsclin_flushTxFifo() : IfxAsclin.h

IfxAsclin_FrameMode : IfxAsclin.h

IfxAsclin_FrameMode_asc : IfxAsclin.h

IfxAsclin_FrameMode_initialise : IfxAsclin.h

IfxAsclin_FrameMode_lin : IfxAsclin.h

IfxAsclin_FrameMode_spi : IfxAsclin.h

IfxAsclin_getAddress() : IfxAsclin.c , IfxAsclin.h

IfxAsclin_getAllErrorFlagsStatus() : IfxAsclin.h

IfxAsclin_getBreakDetectedFlagStatus() : IfxAsclin.h

IfxAsclin_getClockSource() : IfxAsclin.h

IfxAsclin_getClockStatus() : IfxAsclin.h

IfxAsclin_getCollisionDetectionErrorFlagStatus() : IfxAsclin.h

IfxAsclin_getFaFrequency() : IfxAsclin.c , IfxAsclin.h

IfxAsclin_getFallingEdgeDetectedFlagStatus() : IfxAsclin.h

IfxAsclin_getFrameErrorFlagStatus() : IfxAsclin.h

IfxAsclin_getHeaderTimeoutFlagStatus() : IfxAsclin.h

IfxAsclin_getIndex() : IfxAsclin.c , IfxAsclin.h

IfxAsclin_getKernelResetStatus() : IfxAsclin.h

IfxAsclin_getLinAutoBaudDetectionErrorFlagStatus() : IfxAsclin.h

IfxAsclin_getLinChecksumErrorFlagStatus() : IfxAsclin.h

IfxAsclin_getLinParityErrorFlagStatus() : IfxAsclin.h

IfxAsclin_getModuleStatus() : IfxAsclin.h

IfxAsclin_getOvsFrequency() : IfxAsclin.c , IfxAsclin.h

IfxAsclin_getParityErrorFlagStatus() : IfxAsclin.h

IfxAsclin_getPdFrequency() : IfxAsclin.c , IfxAsclin.h

IfxAsclin_getPrescaler() : IfxAsclin.h

IfxAsclin_getRaisingEdgeDetectedFlagStatus() : IfxAsclin.h

IfxAsclin_getReceiveSignalStatus() : IfxAsclin.h

IfxAsclin_getResponseTimeoutFlagStatus() : IfxAsclin.h

IfxAsclin_getRxFifoFillLevel() : IfxAsclin.h

IfxAsclin_getRxFifoFillLevelFlagStatus() : IfxAsclin.h

IfxAsclin_getRxFifoOutletWidth() : IfxAsclin.h

IfxAsclin_getRxFifoOverflowFlagStatus() : IfxAsclin.h

IfxAsclin_getRxFifoUnderflowFlagStatus() : IfxAsclin.h

IfxAsclin_getRxHeaderEndFlagStatus() : IfxAsclin.h

IfxAsclin_getRxResponseEndFlagStatus() : IfxAsclin.h

IfxAsclin_getShiftFrequency() : IfxAsclin.c , IfxAsclin.h

IfxAsclin_getSrcPointerEr() : IfxAsclin.c , IfxAsclin.h

IfxAsclin_getSrcPointerRx() : IfxAsclin.c , IfxAsclin.h

IfxAsclin_getSrcPointerTx() : IfxAsclin.c , IfxAsclin.h

IfxAsclin_getTransmissionCompletedFlagStatus() : IfxAsclin.h

IfxAsclin_getTransmitSignalStatus() : IfxAsclin.h

IfxAsclin_getTxFifoFillLevel() : IfxAsclin.h

IfxAsclin_getTxFifoFillLevelFlagStatus() : IfxAsclin.h

IfxAsclin_getTxFifoInletWidth() : IfxAsclin.h

IfxAsclin_getTxFifoOverflowFlagStatus() : IfxAsclin.h

IfxAsclin_getTxHeaderEndFlagStatus() : IfxAsclin.h

IfxAsclin_getTxResponseEndFlagStatus() : IfxAsclin.h

IfxAsclin_HeaderResponseSelect : IfxAsclin.h

IfxAsclin_HeaderResponseSelect_headerAndResponse : IfxAsclin.h

IfxAsclin_HeaderResponseSelect_headerOnly : IfxAsclin.h

IfxAsclin_IdleDelay : IfxAsclin.h

IfxAsclin_IdleDelay_0 : IfxAsclin.h

IfxAsclin_IdleDelay_1 : IfxAsclin.h

IfxAsclin_IdleDelay_2 : IfxAsclin.h

IfxAsclin_IdleDelay_3 : IfxAsclin.h

IfxAsclin_IdleDelay_4 : IfxAsclin.h

IfxAsclin_IdleDelay_5 : IfxAsclin.h

IfxAsclin_IdleDelay_6 : IfxAsclin.h

IfxAsclin_IdleDelay_7 : IfxAsclin.h

IfxAsclin_Index : IfxAsclin_cfg.h

IfxAsclin_Index_0 : IfxAsclin_cfg.h

IfxAsclin_Index_1 : IfxAsclin_cfg.h

IfxAsclin_Index_10 : IfxAsclin_cfg.h

IfxAsclin_Index_11 : IfxAsclin_cfg.h

IfxAsclin_Index_12 : IfxAsclin_cfg.h

IfxAsclin_Index_13 : IfxAsclin_cfg.h

IfxAsclin_Index_14 : IfxAsclin_cfg.h

IfxAsclin_Index_15 : IfxAsclin_cfg.h

IfxAsclin_Index_16 : IfxAsclin_cfg.h

IfxAsclin_Index_17 : IfxAsclin_cfg.h

IfxAsclin_Index_18 : IfxAsclin_cfg.h

IfxAsclin_Index_19 : IfxAsclin_cfg.h

IfxAsclin_Index_2 : IfxAsclin_cfg.h

IfxAsclin_Index_20 : IfxAsclin_cfg.h

IfxAsclin_Index_21 : IfxAsclin_cfg.h

IfxAsclin_Index_22 : IfxAsclin_cfg.h

IfxAsclin_Index_23 : IfxAsclin_cfg.h

IfxAsclin_Index_3 : IfxAsclin_cfg.h

IfxAsclin_Index_4 : IfxAsclin_cfg.h

IfxAsclin_Index_5 : IfxAsclin_cfg.h

IfxAsclin_Index_6 : IfxAsclin_cfg.h

IfxAsclin_Index_7 : IfxAsclin_cfg.h

IfxAsclin_Index_8 : IfxAsclin_cfg.h

IfxAsclin_Index_9 : IfxAsclin_cfg.h

IfxAsclin_Index_none : IfxAsclin_cfg.h

IfxAsclin_initCtsPin() : IfxAsclin.h

IfxAsclin_initRtsPin() : IfxAsclin.h

IfxAsclin_initRxPin() : IfxAsclin.h

IfxAsclin_initSclkPin() : IfxAsclin.h

IfxAsclin_initSlsoPin() : IfxAsclin.h

IfxAsclin_initTxPin() : IfxAsclin.h

IfxAsclin_isModuleSuspended() : IfxAsclin.h

IfxAsclin_LeadDelay : IfxAsclin.h

IfxAsclin_LeadDelay_0 : IfxAsclin.h

IfxAsclin_LeadDelay_1 : IfxAsclin.h

IfxAsclin_LeadDelay_2 : IfxAsclin.h

IfxAsclin_LeadDelay_3 : IfxAsclin.h

IfxAsclin_LeadDelay_4 : IfxAsclin.h

IfxAsclin_LeadDelay_5 : IfxAsclin.h

IfxAsclin_LeadDelay_6 : IfxAsclin.h

IfxAsclin_LeadDelay_7 : IfxAsclin.h

IfxAsclin_Lin_checkForReceivedHeaderFlags() : IfxAsclin_Lin.c , IfxAsclin_Lin.h

IfxAsclin_Lin_checkForReceivedResponseFlags() : IfxAsclin_Lin.c , IfxAsclin_Lin.h

IfxAsclin_Lin_checkForTransmittedHeaderFlags() : IfxAsclin_Lin.c , IfxAsclin_Lin.h

IfxAsclin_Lin_checkForTransmittedResponseFlags() : IfxAsclin_Lin.c , IfxAsclin_Lin.h

IfxAsclin_Lin_clearFlagsStatus() : IfxAsclin_Lin.c , IfxAsclin_Lin.h

IfxAsclin_Lin_Direction : IfxAsclin_Lin.h

IfxAsclin_Lin_Direction_TransmitHeader : IfxAsclin_Lin.h

IfxAsclin_Lin_Direction_TransmitHeaderAndReceiveResponse : IfxAsclin_Lin.h

IfxAsclin_Lin_Direction_TransmitHeaderAndResponse : IfxAsclin_Lin.h

IfxAsclin_Lin_disableModule() : IfxAsclin_Lin.c , IfxAsclin_Lin.h

IfxAsclin_Lin_ignoreHeader() : IfxAsclin_Lin.c , IfxAsclin_Lin.h

IfxAsclin_Lin_initModule() : IfxAsclin_Lin.c , IfxAsclin_Lin.h

IfxAsclin_Lin_initModuleConfig() : IfxAsclin_Lin.c , IfxAsclin_Lin.h

IfxAsclin_Lin_isrError() : IfxAsclin_Lin.c , IfxAsclin_Lin.h

IfxAsclin_Lin_isrReceive() : IfxAsclin_Lin.c , IfxAsclin_Lin.h

IfxAsclin_Lin_isrTransmit() : IfxAsclin_Lin.c , IfxAsclin_Lin.h

IfxAsclin_Lin_prepareHeaderReception() : IfxAsclin_Lin.h

IfxAsclin_Lin_prepareResponseReception() : IfxAsclin_Lin.h

IfxAsclin_Lin_readHeader() : IfxAsclin_Lin.h

IfxAsclin_Lin_readResponse() : IfxAsclin_Lin.h

IFXASCLIN_LIN_RECEIVE_RESPONSE : IfxAsclin_Lin.h

IfxAsclin_Lin_receiveHeader() : IfxAsclin_Lin.c , IfxAsclin_Lin.h

IfxAsclin_Lin_receiveResponse() : IfxAsclin_Lin.c , IfxAsclin_Lin.h

IFXASCLIN_LIN_SEND_RESPONSE : IfxAsclin_Lin.h

IfxAsclin_Lin_sendFrame() : IfxAsclin_Lin.c , IfxAsclin_Lin.h

IfxAsclin_Lin_sendHeader() : IfxAsclin_Lin.c , IfxAsclin_Lin.h

IfxAsclin_Lin_sendResponse() : IfxAsclin_Lin.c , IfxAsclin_Lin.h

IfxAsclin_Lin_waitForReceivedHeader() : IfxAsclin_Lin.c , IfxAsclin_Lin.h

IfxAsclin_Lin_waitForReceivedResponse() : IfxAsclin_Lin.c , IfxAsclin_Lin.h

IfxAsclin_Lin_waitForTransmittedHeader() : IfxAsclin_Lin.c , IfxAsclin_Lin.h

IfxAsclin_Lin_waitForTransmittedResponse() : IfxAsclin_Lin.c , IfxAsclin_Lin.h

IfxAsclin_LinMode : IfxAsclin.h

IfxAsclin_LinMode_master : IfxAsclin.h

IfxAsclin_LinMode_slave : IfxAsclin.h

IfxAsclin_LinResponseTimeoutMode : IfxAsclin.h

IfxAsclin_LinResponseTimeoutMode_frameTimeout : IfxAsclin.h

IfxAsclin_LinResponseTimeoutMode_responseTimeout : IfxAsclin.h

IFXASCLIN_NUM_MODULES : IfxAsclin_cfg.h

IfxAsclin_OversamplingFactor : IfxAsclin.h

IfxAsclin_OversamplingFactor_10 : IfxAsclin.h

IfxAsclin_OversamplingFactor_11 : IfxAsclin.h

IfxAsclin_OversamplingFactor_12 : IfxAsclin.h

IfxAsclin_OversamplingFactor_13 : IfxAsclin.h

IfxAsclin_OversamplingFactor_14 : IfxAsclin.h

IfxAsclin_OversamplingFactor_15 : IfxAsclin.h

IfxAsclin_OversamplingFactor_16 : IfxAsclin.h

IfxAsclin_OversamplingFactor_4 : IfxAsclin.h

IfxAsclin_OversamplingFactor_5 : IfxAsclin.h

IfxAsclin_OversamplingFactor_6 : IfxAsclin.h

IfxAsclin_OversamplingFactor_7 : IfxAsclin.h

IfxAsclin_OversamplingFactor_8 : IfxAsclin.h

IfxAsclin_OversamplingFactor_9 : IfxAsclin.h

IfxAsclin_ParityType : IfxAsclin.h

IfxAsclin_ParityType_even : IfxAsclin.h

IfxAsclin_ParityType_odd : IfxAsclin.h

IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS : IfxAsclin_PinMap.h

IFXASCLIN_PINMAP_NUM_MODULES : IfxAsclin_PinMap.h

IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS : IfxAsclin_PinMap.h

IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS : IfxAsclin_PinMap.h

IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS : IfxAsclin_PinMap.h

IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS : IfxAsclin_PinMap.h

IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS : IfxAsclin_PinMap.h

IfxAsclin_read16() : IfxAsclin.c , IfxAsclin.h

IfxAsclin_read32() : IfxAsclin.c , IfxAsclin.h

IfxAsclin_read8() : IfxAsclin.c , IfxAsclin.h

IfxAsclin_readRxData() : IfxAsclin.h

IfxAsclin_ReceiveBufferMode : IfxAsclin.h

IfxAsclin_ReceiveBufferMode_rxBuffer : IfxAsclin.h

IfxAsclin_ReceiveBufferMode_rxFifo : IfxAsclin.h

IfxAsclin_resetModule() : IfxAsclin.c , IfxAsclin.h

IfxAsclin_Rts_Out_pinTable : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin_RtsCtsPolarity : IfxAsclin.h

IfxAsclin_RtsCtsPolarity_activeHigh : IfxAsclin.h

IfxAsclin_RtsCtsPolarity_activeLow : IfxAsclin.h

IfxAsclin_Rx_In_pinTable : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin_RxFifoInterruptLevel : IfxAsclin.h

IfxAsclin_RxFifoInterruptLevel_1 : IfxAsclin.h

IfxAsclin_RxFifoInterruptLevel_10 : IfxAsclin.h

IfxAsclin_RxFifoInterruptLevel_11 : IfxAsclin.h

IfxAsclin_RxFifoInterruptLevel_12 : IfxAsclin.h

IfxAsclin_RxFifoInterruptLevel_13 : IfxAsclin.h

IfxAsclin_RxFifoInterruptLevel_14 : IfxAsclin.h

IfxAsclin_RxFifoInterruptLevel_15 : IfxAsclin.h

IfxAsclin_RxFifoInterruptLevel_16 : IfxAsclin.h

IfxAsclin_RxFifoInterruptLevel_2 : IfxAsclin.h

IfxAsclin_RxFifoInterruptLevel_3 : IfxAsclin.h

IfxAsclin_RxFifoInterruptLevel_4 : IfxAsclin.h

IfxAsclin_RxFifoInterruptLevel_5 : IfxAsclin.h

IfxAsclin_RxFifoInterruptLevel_6 : IfxAsclin.h

IfxAsclin_RxFifoInterruptLevel_7 : IfxAsclin.h

IfxAsclin_RxFifoInterruptLevel_8 : IfxAsclin.h

IfxAsclin_RxFifoInterruptLevel_9 : IfxAsclin.h

IfxAsclin_RxFifoOutletWidth : IfxAsclin.h

IfxAsclin_RxFifoOutletWidth_0 : IfxAsclin.h

IfxAsclin_RxFifoOutletWidth_1 : IfxAsclin.h

IfxAsclin_RxFifoOutletWidth_2 : IfxAsclin.h

IfxAsclin_RxFifoOutletWidth_3 : IfxAsclin.h

IfxAsclin_RxInputSelect : IfxAsclin.h

IfxAsclin_RxInputSelect_0 : IfxAsclin.h

IfxAsclin_RxInputSelect_1 : IfxAsclin.h

IfxAsclin_RxInputSelect_2 : IfxAsclin.h

IfxAsclin_RxInputSelect_3 : IfxAsclin.h

IfxAsclin_RxInputSelect_4 : IfxAsclin.h

IfxAsclin_RxInputSelect_5 : IfxAsclin.h

IfxAsclin_RxInputSelect_6 : IfxAsclin.h

IfxAsclin_RxInputSelect_7 : IfxAsclin.h

IfxAsclin_SamplePointPosition : IfxAsclin.h

IfxAsclin_SamplePointPosition_1 : IfxAsclin.h

IfxAsclin_SamplePointPosition_10 : IfxAsclin.h

IfxAsclin_SamplePointPosition_11 : IfxAsclin.h

IfxAsclin_SamplePointPosition_12 : IfxAsclin.h

IfxAsclin_SamplePointPosition_13 : IfxAsclin.h

IfxAsclin_SamplePointPosition_14 : IfxAsclin.h

IfxAsclin_SamplePointPosition_15 : IfxAsclin.h

IfxAsclin_SamplePointPosition_2 : IfxAsclin.h

IfxAsclin_SamplePointPosition_3 : IfxAsclin.h

IfxAsclin_SamplePointPosition_4 : IfxAsclin.h

IfxAsclin_SamplePointPosition_5 : IfxAsclin.h

IfxAsclin_SamplePointPosition_6 : IfxAsclin.h

IfxAsclin_SamplePointPosition_7 : IfxAsclin.h

IfxAsclin_SamplePointPosition_8 : IfxAsclin.h

IfxAsclin_SamplePointPosition_9 : IfxAsclin.h

IfxAsclin_SamplesPerBit : IfxAsclin.h

IfxAsclin_SamplesPerBit_one : IfxAsclin.h

IfxAsclin_SamplesPerBit_three : IfxAsclin.h

IfxAsclin_Sclk_Out_pinTable : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin_setBaudrateBitFields() : IfxAsclin.c , IfxAsclin.h

IfxAsclin_setBitTiming() : IfxAsclin.c , IfxAsclin.h

IfxAsclin_setBrdLowerlimt() : IfxAsclin.h

IfxAsclin_setBrdUpperlimt() : IfxAsclin.h

IfxAsclin_setChecksumInjection() : IfxAsclin.h

IfxAsclin_setChecksumMode() : IfxAsclin.h

IfxAsclin_setClockPolarity() : IfxAsclin.h

IfxAsclin_setClockSource() : IfxAsclin.c , IfxAsclin.h

IfxAsclin_setCtsInput() : IfxAsclin.h

IfxAsclin_setDataLength() : IfxAsclin.h

IfxAsclin_setDenominator() : IfxAsclin.h

IfxAsclin_setDisableModuleRequest() : IfxAsclin.h

IfxAsclin_setEnableModuleRequest() : IfxAsclin.h

IfxAsclin_setFilterDepth() : IfxAsclin.h

IfxAsclin_setFrameMode() : IfxAsclin.h

IfxAsclin_setHeaderResponseSelect() : IfxAsclin.h

IfxAsclin_setIdleDelay() : IfxAsclin.h

IfxAsclin_setKernelResetOne() : IfxAsclin.h

IfxAsclin_setKernelResetZero() : IfxAsclin.h

IfxAsclin_setLeadDelay() : IfxAsclin.h

IfxAsclin_setLinBreakLength() : IfxAsclin.h

IfxAsclin_setLinHeaderTimeout() : IfxAsclin.h

IfxAsclin_setLinMode() : IfxAsclin.h

IfxAsclin_setLinResponseTimeoutMode() : IfxAsclin.h

IfxAsclin_setLinResponseTimeoutThreshold() : IfxAsclin.h

IfxAsclin_setNumerator() : IfxAsclin.h

IfxAsclin_setOversampling() : IfxAsclin.h

IfxAsclin_setParityType() : IfxAsclin.h

IfxAsclin_setPrescaler() : IfxAsclin.h

IfxAsclin_setRtsCtsPolarity() : IfxAsclin.h

IfxAsclin_setRxBufferMode() : IfxAsclin.h

IfxAsclin_setRxFifoInterruptLevel() : IfxAsclin.h

IfxAsclin_setRxFifoInterruptMode() : IfxAsclin.h

IfxAsclin_setRxFifoOutletWidth() : IfxAsclin.h

IfxAsclin_setRxInput() : IfxAsclin.h

IfxAsclin_setSampleMode() : IfxAsclin.h

IfxAsclin_setSamplePointPosition() : IfxAsclin.h

IfxAsclin_setShiftDirection() : IfxAsclin.h

IfxAsclin_setSlavePolarity() : IfxAsclin.h

IfxAsclin_setSleepMode() : IfxAsclin.h

IfxAsclin_setStopBit() : IfxAsclin.h

IfxAsclin_setSuspendMode() : IfxAsclin.h

IfxAsclin_setTransmitHeaderRequestFlag() : IfxAsclin.h

IfxAsclin_setTransmitResponseRequestFlag() : IfxAsclin.h

IfxAsclin_setTransmitWakeRequestFlag() : IfxAsclin.h

IfxAsclin_setTxFifoInletWidth() : IfxAsclin.h

IfxAsclin_setTxFifoInterruptLevel() : IfxAsclin.h

IfxAsclin_setTxFifoInterruptMode() : IfxAsclin.h

IfxAsclin_ShiftDirection : IfxAsclin.h

IfxAsclin_ShiftDirection_lsbFirst : IfxAsclin.h

IfxAsclin_ShiftDirection_msbFirst : IfxAsclin.h

IfxAsclin_SlavePolarity : IfxAsclin.h

IfxAsclin_SlavePolarity_idlehigh : IfxAsclin.h

IfxAsclin_SlavePolarity_idleLow : IfxAsclin.h

IfxAsclin_SleepMode : IfxAsclin.h

IfxAsclin_SleepMode_disable : IfxAsclin.h

IfxAsclin_SleepMode_enable : IfxAsclin.h

IfxAsclin_Slso_Out_pinTable : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin_Spi_disableModule() : IfxAsclin_Spi.c , IfxAsclin_Spi.h

IfxAsclin_Spi_exchange() : IfxAsclin_Spi.c , IfxAsclin_Spi.h

IfxAsclin_Spi_getStatus() : IfxAsclin_Spi.c , IfxAsclin_Spi.h

IfxAsclin_Spi_initModule() : IfxAsclin_Spi.c , IfxAsclin_Spi.h

IfxAsclin_Spi_initModuleConfig() : IfxAsclin_Spi.c , IfxAsclin_Spi.h

IfxAsclin_Spi_isrError() : IfxAsclin_Spi.c , IfxAsclin_Spi.h

IfxAsclin_Spi_isrReceive() : IfxAsclin_Spi.c , IfxAsclin_Spi.h

IfxAsclin_Spi_isrTransmit() : IfxAsclin_Spi.c , IfxAsclin_Spi.h

IfxAsclin_Spi_lock() : IfxAsclin_Spi.c

IfxAsclin_Spi_read() : IfxAsclin_Spi.c , IfxAsclin_Spi.h

IfxAsclin_Spi_Status : IfxAsclin_Spi.h

IfxAsclin_Spi_Status_busy : IfxAsclin_Spi.h

IfxAsclin_Spi_Status_ok : IfxAsclin_Spi.h

IfxAsclin_Spi_Status_unknown : IfxAsclin_Spi.h

IfxAsclin_Spi_unlock() : IfxAsclin_Spi.c

IfxAsclin_Spi_write() : IfxAsclin_Spi.c , IfxAsclin_Spi.h

IfxAsclin_Status : IfxAsclin.h

IfxAsclin_Status_configurationError : IfxAsclin.h

IfxAsclin_Status_noError : IfxAsclin.h

IfxAsclin_StopBit : IfxAsclin.h

IfxAsclin_StopBit_0 : IfxAsclin.h

IfxAsclin_StopBit_1 : IfxAsclin.h

IfxAsclin_StopBit_2 : IfxAsclin.h

IfxAsclin_StopBit_3 : IfxAsclin.h

IfxAsclin_StopBit_4 : IfxAsclin.h

IfxAsclin_StopBit_5 : IfxAsclin.h

IfxAsclin_StopBit_6 : IfxAsclin.h

IfxAsclin_StopBit_7 : IfxAsclin.h

IfxAsclin_SuspendMode : IfxAsclin.h

IfxAsclin_SuspendMode_hard : IfxAsclin.h

IfxAsclin_SuspendMode_none : IfxAsclin.h

IfxAsclin_SuspendMode_soft : IfxAsclin.h

IfxAsclin_Tx_Out_pinTable : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin_TxFifoInletWidth : IfxAsclin.h

IfxAsclin_TxFifoInletWidth_0 : IfxAsclin.h

IfxAsclin_TxFifoInletWidth_1 : IfxAsclin.h

IfxAsclin_TxFifoInletWidth_2 : IfxAsclin.h

IfxAsclin_TxFifoInletWidth_3 : IfxAsclin.h

IfxAsclin_TxFifoInterruptLevel : IfxAsclin.h

IfxAsclin_TxFifoInterruptLevel_0 : IfxAsclin.h

IfxAsclin_TxFifoInterruptLevel_1 : IfxAsclin.h

IfxAsclin_TxFifoInterruptLevel_10 : IfxAsclin.h

IfxAsclin_TxFifoInterruptLevel_11 : IfxAsclin.h

IfxAsclin_TxFifoInterruptLevel_12 : IfxAsclin.h

IfxAsclin_TxFifoInterruptLevel_13 : IfxAsclin.h

IfxAsclin_TxFifoInterruptLevel_14 : IfxAsclin.h

IfxAsclin_TxFifoInterruptLevel_15 : IfxAsclin.h

IfxAsclin_TxFifoInterruptLevel_2 : IfxAsclin.h

IfxAsclin_TxFifoInterruptLevel_3 : IfxAsclin.h

IfxAsclin_TxFifoInterruptLevel_4 : IfxAsclin.h

IfxAsclin_TxFifoInterruptLevel_5 : IfxAsclin.h

IfxAsclin_TxFifoInterruptLevel_6 : IfxAsclin.h

IfxAsclin_TxFifoInterruptLevel_7 : IfxAsclin.h

IfxAsclin_TxFifoInterruptLevel_8 : IfxAsclin.h

IfxAsclin_TxFifoInterruptLevel_9 : IfxAsclin.h

IfxAsclin_write16() : IfxAsclin.c , IfxAsclin.h

IfxAsclin_write32() : IfxAsclin.c , IfxAsclin.h

IfxAsclin_write8() : IfxAsclin.c , IfxAsclin.h

IfxAsclin_writeTxData() : IfxAsclin.h

IfxCan_Can_getRxFifo0FillLevel() : IfxCan_Can.h

IfxCan_Can_getRxFifo1FillLevel() : IfxCan_Can.h

IfxCan_Can_initMessage() : IfxCan_Can.c , IfxCan_Can.h

IfxCan_Can_initModule() : IfxCan_Can.c , IfxCan_Can.h

IfxCan_Can_initModuleConfig() : IfxCan_Can.c , IfxCan_Can.h

IfxCan_Can_initNode() : IfxCan_Can.c , IfxCan_Can.h

IfxCan_Can_initNodeConfig() : IfxCan_Can.c , IfxCan_Can.h

IfxCan_Can_isNewDataReceived() : IfxCan_Can.h

IfxCan_Can_isNodeSynchronized() : IfxCan_Can.h

IfxCan_Can_isTxBufferRequestPending() : IfxCan_Can.h

IfxCan_Can_isTxFifoQueueFull() : IfxCan_Can.h

IfxCan_Can_readMessage() : IfxCan_Can.c , IfxCan_Can.h

IfxCan_Can_sendMessage() : IfxCan_Can.c , IfxCan_Can.h

IfxCan_Can_setExtendedFilter() : IfxCan_Can.c , IfxCan_Can.h

IfxCan_Can_setStandardFilter() : IfxCan_Can.c , IfxCan_Can.h

IfxCan_CanNodeBusOffErrorStatus : IfxCan.h

IfxCan_CanNodeBusOffErrorStatus_BusOffErr : IfxCan.h

IfxCan_CanNodeBusOffErrorStatus_NoErr : IfxCan.h

IfxCan_CanNodeCommunicationState : IfxCan.h

IfxCan_CanNodeCommunicationState_idle : IfxCan.h

IfxCan_CanNodeCommunicationState_receive : IfxCan.h

IfxCan_CanNodeCommunicationState_synchronize : IfxCan.h

IfxCan_CanNodeCommunicationState_transmit : IfxCan.h

IfxCan_CanNodeErrorWarningLimitStatus : IfxCan.h

IfxCan_CanNodeErrorWarningLimitStatus_notReached : IfxCan.h

IfxCan_CanNodeErrorWarningLimitStatus_reached : IfxCan.h

IfxCan_cfg_indexMap : IfxCan_cfg.c , IfxCan_cfg.h

IfxCan_ClockSelect : IfxCan.h

IfxCan_ClockSelect_0 : IfxCan.h

IfxCan_ClockSelect_1 : IfxCan.h

IfxCan_ClockSelect_2 : IfxCan.h

IfxCan_ClockSelect_3 : IfxCan.h

IfxCan_ClockSource : IfxCan.h

IfxCan_ClockSource_asynchronous : IfxCan.h

IfxCan_ClockSource_both : IfxCan.h

IfxCan_ClockSource_noClock : IfxCan.h

IfxCan_ClockSource_synchronous : IfxCan.h

IfxCan_DataFieldSize : IfxCan.h

IfxCan_DataFieldSize_12 : IfxCan.h

IfxCan_DataFieldSize_16 : IfxCan.h

IfxCan_DataFieldSize_20 : IfxCan.h

IfxCan_DataFieldSize_24 : IfxCan.h

IfxCan_DataFieldSize_32 : IfxCan.h

IfxCan_DataFieldSize_48 : IfxCan.h

IfxCan_DataFieldSize_64 : IfxCan.h

IfxCan_DataFieldSize_8 : IfxCan.h

IfxCan_DataLengthCode : IfxCan.h

IfxCan_DataLengthCode_0 : IfxCan.h

IfxCan_DataLengthCode_1 : IfxCan.h

IfxCan_DataLengthCode_12 : IfxCan.h

IfxCan_DataLengthCode_16 : IfxCan.h

IfxCan_DataLengthCode_2 : IfxCan.h

IfxCan_DataLengthCode_20 : IfxCan.h

IfxCan_DataLengthCode_24 : IfxCan.h

IfxCan_DataLengthCode_3 : IfxCan.h

IfxCan_DataLengthCode_32 : IfxCan.h

IfxCan_DataLengthCode_4 : IfxCan.h

IfxCan_DataLengthCode_48 : IfxCan.h

IfxCan_DataLengthCode_5 : IfxCan.h

IfxCan_DataLengthCode_6 : IfxCan.h

IfxCan_DataLengthCode_64 : IfxCan.h

IfxCan_DataLengthCode_7 : IfxCan.h

IfxCan_DataLengthCode_8 : IfxCan.h

IfxCan_disableModule() : IfxCan.c , IfxCan.h

IfxCan_enableModule() : IfxCan.c , IfxCan.h

IfxCan_FilterElementConfiguration : IfxCan.h

IfxCan_FilterElementConfiguration_disable : IfxCan.h

IfxCan_FilterElementConfiguration_rejectId : IfxCan.h

IfxCan_FilterElementConfiguration_setPriority : IfxCan.h

IfxCan_FilterElementConfiguration_setPriorityAndStoreInFifo0 : IfxCan.h

IfxCan_FilterElementConfiguration_setPriorityAndStoreInFifo1 : IfxCan.h

IfxCan_FilterElementConfiguration_storeInRxBuffer : IfxCan.h

IfxCan_FilterElementConfiguration_storeInRxFifo0 : IfxCan.h

IfxCan_FilterElementConfiguration_storeInRxFifo1 : IfxCan.h

IfxCan_FilterType : IfxCan.h

IfxCan_FilterType_classic : IfxCan.h

IfxCan_FilterType_dualId : IfxCan.h

IfxCan_FilterType_none : IfxCan.h

IfxCan_FilterType_range : IfxCan.h

IfxCan_FrameMode : IfxCan.h

IfxCan_FrameMode_fdLong : IfxCan.h

IfxCan_FrameMode_fdLongAndFast : IfxCan.h

IfxCan_FrameMode_standard : IfxCan.h

IfxCan_FrameType : IfxCan.h

IfxCan_FrameType_receive : IfxCan.h

IfxCan_FrameType_remoteAnswer : IfxCan.h

IfxCan_FrameType_remoteRequest : IfxCan.h

IfxCan_FrameType_transmit : IfxCan.h

IfxCan_FrameType_transmitAndReceive : IfxCan.h

IfxCan_getAddress() : IfxCan.c , IfxCan.h

IfxCan_getIndex() : IfxCan.c , IfxCan.h

IfxCan_getModuleFrequency() : IfxCan.c , IfxCan.h

IfxCan_getNodePointer() : IfxCan.h

IfxCan_getSrcPointer() : IfxCan.c , IfxCan.h

IfxCan_Index : IfxCan_cfg.h

IfxCan_Index_0 : IfxCan_cfg.h

IfxCan_Index_1 : IfxCan_cfg.h

IfxCan_Index_2 : IfxCan_cfg.h

IfxCan_Index_none : IfxCan_cfg.h

IfxCan_Interrupt : IfxCan.h

IfxCan_Interrupt_AccessToReservedAddress : IfxCan.h

IfxCan_Interrupt_bitErrorCorrected : IfxCan.h

IfxCan_Interrupt_bitErrorUncorrected : IfxCan.h

IfxCan_Interrupt_busOffStatus : IfxCan.h

IfxCan_Interrupt_errorLoggingOverflow : IfxCan.h

IfxCan_Interrupt_errorPassive : IfxCan.h

IfxCan_Interrupt_highPriorityMessage : IfxCan.h

IfxCan_Interrupt_messageRAMAccessFailure : IfxCan.h

IfxCan_Interrupt_messageStoredToDedicatedRxBuffer : IfxCan.h

IfxCan_Interrupt_protocolErrorArbitration : IfxCan.h

IfxCan_Interrupt_protocolErrorData : IfxCan.h

IfxCan_Interrupt_rxFifo0Full : IfxCan.h

IfxCan_Interrupt_rxFifo0MessageLost : IfxCan.h

IfxCan_Interrupt_rxFifo0NewMessage : IfxCan.h

IfxCan_Interrupt_rxFifo0WatermarkReached : IfxCan.h

IfxCan_Interrupt_rxFifo1Full : IfxCan.h

IfxCan_Interrupt_rxFifo1MessageLost : IfxCan.h

IfxCan_Interrupt_rxFifo1NewMessage : IfxCan.h

IfxCan_Interrupt_rxFifo1WatermarkReached : IfxCan.h

IfxCan_Interrupt_timeoutOccurred : IfxCan.h

IfxCan_Interrupt_timestampWraparound : IfxCan.h

IfxCan_Interrupt_transmissionCancellationFinished : IfxCan.h

IfxCan_Interrupt_transmissionCompleted : IfxCan.h

IfxCan_Interrupt_txEventFifoEventLost : IfxCan.h

IfxCan_Interrupt_txEventFifoFull : IfxCan.h

IfxCan_Interrupt_txEventFifoNewEntry : IfxCan.h

IfxCan_Interrupt_txEventFifoWatermarkReached : IfxCan.h

IfxCan_Interrupt_txFifoEmpty : IfxCan.h

IfxCan_Interrupt_warningStatus : IfxCan.h

IfxCan_Interrupt_watchdog : IfxCan.h

IfxCan_InterruptGroup : IfxCan.h

IfxCan_InterruptGroup_alrt : IfxCan.h

IfxCan_InterruptGroup_boff : IfxCan.h

IfxCan_InterruptGroup_hpe : IfxCan.h

IfxCan_InterruptGroup_loi : IfxCan.h

IfxCan_InterruptGroup_moer : IfxCan.h

IfxCan_InterruptGroup_reint : IfxCan.h

IfxCan_InterruptGroup_reti : IfxCan.h

IfxCan_InterruptGroup_rxf0f : IfxCan.h

IfxCan_InterruptGroup_rxf0n : IfxCan.h

IfxCan_InterruptGroup_rxf1f : IfxCan.h

IfxCan_InterruptGroup_rxf1n : IfxCan.h

IfxCan_InterruptGroup_safe : IfxCan.h

IfxCan_InterruptGroup_tefifo : IfxCan.h

IfxCan_InterruptGroup_traco : IfxCan.h

IfxCan_InterruptGroup_traq : IfxCan.h

IfxCan_InterruptGroup_wati : IfxCan.h

IfxCan_InterruptLine : IfxCan.h

IfxCan_InterruptLine_0 : IfxCan.h

IfxCan_InterruptLine_1 : IfxCan.h

IfxCan_InterruptLine_10 : IfxCan.h

IfxCan_InterruptLine_11 : IfxCan.h

IfxCan_InterruptLine_12 : IfxCan.h

IfxCan_InterruptLine_13 : IfxCan.h

IfxCan_InterruptLine_14 : IfxCan.h

IfxCan_InterruptLine_15 : IfxCan.h

IfxCan_InterruptLine_2 : IfxCan.h

IfxCan_InterruptLine_3 : IfxCan.h

IfxCan_InterruptLine_4 : IfxCan.h

IfxCan_InterruptLine_5 : IfxCan.h

IfxCan_InterruptLine_6 : IfxCan.h

IfxCan_InterruptLine_7 : IfxCan.h

IfxCan_InterruptLine_8 : IfxCan.h

IfxCan_InterruptLine_9 : IfxCan.h

IfxCan_isModuleEnabled() : IfxCan.h

IfxCan_isModuleSuspended() : IfxCan.h

IfxCan_LastErrorCodeType : IfxCan.h

IfxCan_LastErrorCodeType_ackError : IfxCan.h

IfxCan_LastErrorCodeType_bit0Error : IfxCan.h

IfxCan_LastErrorCodeType_bit1Error : IfxCan.h

IfxCan_LastErrorCodeType_crcError : IfxCan.h

IfxCan_LastErrorCodeType_formError : IfxCan.h

IfxCan_LastErrorCodeType_noCANBusEvent : IfxCan.h

IfxCan_LastErrorCodeType_noError : IfxCan.h

IfxCan_LastErrorCodeType_stuffError : IfxCan.h

IfxCan_MessageIdLength : IfxCan.h

IfxCan_MessageIdLength_both : IfxCan.h

IfxCan_MessageIdLength_extended : IfxCan.h

IfxCan_MessageIdLength_standard : IfxCan.h

IfxCan_Node_acceptRemoteFrameswithExtendedId() : IfxCan.h

IfxCan_Node_acceptRemoteFramesWithStandardId() : IfxCan.h

IfxCan_Node_clearInterruptFlag() : IfxCan.h

IfxCan_Node_clearRxBufferNewDataFlag() : IfxCan.c , IfxCan.h

IfxCan_Node_configureExtendedFilterForNonMatchingFrames() : IfxCan.h

IfxCan_Node_configureStandardFilterForNonMatchingFrames() : IfxCan.h

IfxCan_Node_disableConfigurationChange() : IfxCan.h

IfxCan_Node_disableInterrupt() : IfxCan.h

IfxCan_Node_disableTxBufferCancellationFinishedInterrupt() : IfxCan.h

IfxCan_Node_disableTxBufferTransmissionInterrupt() : IfxCan.h

IfxCan_Node_enableConfigurationChange() : IfxCan.h

IfxCan_Node_enableInterrupt() : IfxCan.h

IfxCan_Node_enableLoopbackMode() : IfxCan.h

IfxCan_Node_enableTxBufferCancellationFinishedInterrupt() : IfxCan.h

IfxCan_Node_enableTxBufferTransmissionInterrupt() : IfxCan.h

IfxCan_Node_getActivityStatus() : IfxCan.h

IfxCan_Node_getBRSFromTxEventFifo() : IfxCan.h

IfxCan_Node_getBusOffStatus() : IfxCan.h

IfxCan_Node_getCodeFromDataLengthInBytes() : IfxCan.h

IfxCan_Node_getDataLength() : IfxCan.c , IfxCan.h

IfxCan_Node_getDataLengthCode() : IfxCan.h

IfxCan_Node_getDataLengthFromCode() : IfxCan.c , IfxCan.h

IfxCan_Node_getDataLengthInBytes() : IfxCan.c , IfxCan.h

IfxCan_Node_getDataPhaseLastErrorCode() : IfxCan.h

IfxCan_Node_getDLCFromTxEventFifo() : IfxCan.h

IfxCan_Node_getESIFromTxEventFifo() : IfxCan.h

IfxCan_Node_getExtendedFilterElementAddress() : IfxCan.c , IfxCan.h

IfxCan_Node_getFDFFromTxEventFifo() : IfxCan.h

IfxCan_Node_getFrameMode() : IfxCan.c , IfxCan.h

IfxCan_Node_getFrameModeFromTxEventFifo() : IfxCan.c , IfxCan.h

IfxCan_Node_getInterruptFlagStatus() : IfxCan.h

IfxCan_Node_getLastErroCodeStatus() : IfxCan.h

IfxCan_Node_getMesssageId() : IfxCan.h

IfxCan_Node_getMesssageIdFromTxEventFifo() : IfxCan.h

IfxCan_Node_getMMFromTxEventFifo() : IfxCan.h

IfxCan_Node_getRTRFromTxEventFifo() : IfxCan.h

IfxCan_Node_getRxBufferDataFieldSize() : IfxCan.c , IfxCan.h

IfxCan_Node_getRxBufferElementAddress() : IfxCan.c , IfxCan.h

IfxCan_Node_getRxFifo0DataFieldSize() : IfxCan.c , IfxCan.h

IfxCan_Node_getRxFifo0ElementAddress() : IfxCan.c , IfxCan.h

IfxCan_Node_getRxFifo0FillLevel() : IfxCan.h

IfxCan_Node_getRxFifo0GetIndex() : IfxCan.h

IfxCan_Node_getRxFifo1DataFieldSize() : IfxCan.c , IfxCan.h

IfxCan_Node_getRxFifo1ElementAddress() : IfxCan.c , IfxCan.h

IfxCan_Node_getRxFifo1FillLevel() : IfxCan.h

IfxCan_Node_getRxFifo1GetIndex() : IfxCan.h

IfxCan_Node_getStandardFilterElementAddress() : IfxCan.c , IfxCan.h

IfxCan_Node_getTxBufferDataFieldSize() : IfxCan.c , IfxCan.h

IfxCan_Node_getTxBufferElementAddress() : IfxCan.c , IfxCan.h

IfxCan_Node_getTxEventFifoAcknowledgeIndex() : IfxCan.h

IfxCan_Node_getTxEventFifoElementAddress() : IfxCan.c , IfxCan.h

IfxCan_Node_getTxEventFifoFillLevel() : IfxCan.h

IfxCan_Node_getTxEventFifoGetIndex() : IfxCan.h

IfxCan_Node_getTxEventFifoPutIndex() : IfxCan.h

IfxCan_Node_getTxEventFifoSize() : IfxCan.h

IfxCan_Node_getTxEventFifoStartAddress() : IfxCan.h

IfxCan_Node_getTxEventFifoWatermarkLevel() : IfxCan.h

IfxCan_Node_getTxFifoQueuePutIndex() : IfxCan.h

IfxCan_Node_getTXTSFromTxEventFifo() : IfxCan.h

IfxCan_Node_getWarningStatus() : IfxCan.h

IfxCan_Node_initRxPin() : IfxCan.c , IfxCan.h

IfxCan_Node_initTxPin() : IfxCan.c , IfxCan.h

IfxCan_Node_isBitRateSwitchFlagEnabled() : IfxCan.h

IfxCan_Node_isCanFDMsgReceived() : IfxCan.h

IfxCan_Node_isErrorPassive() : IfxCan.h

IfxCan_Node_isErrorStatusIndicatorEnabled() : IfxCan.h

IfxCan_Node_isNodeSynchronized() : IfxCan.h

IfxCan_Node_isProtocolExceptionEventOccured() : IfxCan.h

IfxCan_Node_isRxBufferNewDataUpdated() : IfxCan.c , IfxCan.h

IfxCan_Node_isTxBufferCancellationFinished() : IfxCan.h

IfxCan_Node_isTxBufferRequestPending() : IfxCan.h

IfxCan_Node_isTxBufferTransmissionOccured() : IfxCan.h

IfxCan_Node_isTxEventFifoElementLost() : IfxCan.h

IfxCan_Node_isTxEventFifoFull() : IfxCan.h

IfxCan_Node_isTxFifoQueueFull() : IfxCan.h

IfxCan_Node_pauseTransmission() : IfxCan.h

IfxCan_Node_readData() : IfxCan.c , IfxCan.h

IfxCan_Node_rejectRemoteFramesWithExtendedId() : IfxCan.h

IfxCan_Node_rejectRemoteFramesWithStandardId() : IfxCan.h

IfxCan_Node_setBitTiming() : IfxCan.c , IfxCan.h

IfxCan_Node_setBitTimingValues() : IfxCan.c , IfxCan.h

IfxCan_Node_setDataLength() : IfxCan.h

IfxCan_Node_setDataLengthCode() : IfxCan.h

IfxCan_Node_setDedicatedTxBuffersNumber() : IfxCan.h

IfxCan_Node_setErrorStateIndicator() : IfxCan.h

IfxCan_Node_setErrStateIndicator() : IfxCan.h

IfxCan_Node_setExtendedFilterConfiguration() : IfxCan.h

IfxCan_Node_setExtendedFilterId1() : IfxCan.h

IfxCan_Node_setExtendedFilterId2() : IfxCan.h

IfxCan_Node_setExtendedFilterListSize() : IfxCan.h

IfxCan_Node_setExtendedFilterListStartAddress() : IfxCan.h

IfxCan_Node_setExtendedFilterRxBufferOffset() : IfxCan.h

IfxCan_Node_setExtendedFilterType() : IfxCan.h

IfxCan_Node_setFastBitTiming() : IfxCan.c , IfxCan.h

IfxCan_Node_setFastBitTimingValues() : IfxCan.c , IfxCan.h

IfxCan_Node_setFrameMode() : IfxCan.c , IfxCan.h

IfxCan_Node_setFrameModeReq() : IfxCan.c , IfxCan.h

IfxCan_Node_setFrameModeRequest() : IfxCan.c , IfxCan.h

IfxCan_Node_setGroupInterruptLine() : IfxCan.c , IfxCan.h

IfxCan_Node_setInitialisation() : IfxCan.h

IfxCan_Node_setInterruptLine() : IfxCan.c , IfxCan.h

IfxCan_Node_setMessageMarker() : IfxCan.h

IfxCan_Node_setMesssageId() : IfxCan.h

IfxCan_Node_setMsgId() : IfxCan.h

IfxCan_Node_setRemoteTransmitReq() : IfxCan.h

IfxCan_Node_setRemoteTransmitRequest() : IfxCan.h

IfxCan_Node_setRxBufferDataFieldSize() : IfxCan.h

IfxCan_Node_setRxBuffersStartAddress() : IfxCan.h

IfxCan_Node_setRxFifo0AcknowledgeIndex() : IfxCan.h

IfxCan_Node_setRxFifo0DataFieldSize() : IfxCan.h

IfxCan_Node_setRxFifo0OperatingMode() : IfxCan.h

IfxCan_Node_setRxFifo0Size() : IfxCan.h

IfxCan_Node_setRxFifo0StartAddress() : IfxCan.h

IfxCan_Node_setRxFifo0WatermarkLevel() : IfxCan.h

IfxCan_Node_setRxFifo1AcknowledgeIndex() : IfxCan.h

IfxCan_Node_setRxFifo1DataFieldSize() : IfxCan.h

IfxCan_Node_setRxFifo1OperatingMode() : IfxCan.h

IfxCan_Node_setRxFifo1Size() : IfxCan.h

IfxCan_Node_setRxFifo1StartAddress() : IfxCan.h

IfxCan_Node_setRxFifo1WatermarkLevel() : IfxCan.h

IfxCan_Node_setStandardFilterConfiguration() : IfxCan.h

IfxCan_Node_setStandardFilterId1() : IfxCan.h

IfxCan_Node_setStandardFilterId2() : IfxCan.h

IfxCan_Node_setStandardFilterListSize() : IfxCan.h

IfxCan_Node_setStandardFilterListStartAddress() : IfxCan.h

IfxCan_Node_setStandardFilterRxBufferOffset() : IfxCan.h

IfxCan_Node_setStandardFilterType() : IfxCan.h

IfxCan_Node_setTransceiverDelayCompensationOffset() : IfxCan.h

IfxCan_Node_setTransmitFifoQueueMode() : IfxCan.h

IfxCan_Node_setTransmitFifoQueueSize() : IfxCan.h

IfxCan_Node_setTxBufferAddRequest() : IfxCan.h

IfxCan_Node_setTxBufferCancellationRequest() : IfxCan.h

IfxCan_Node_setTxBufferDataFieldSize() : IfxCan.h

IfxCan_Node_setTxBuffersStartAddress() : IfxCan.h

IfxCan_Node_setTxEventFifoControl() : IfxCan.h

IfxCan_Node_setTxEventFifoCtrl() : IfxCan.h

IfxCan_Node_setTxEventFifoSize() : IfxCan.h

IfxCan_Node_setTxEventFifoStartAddress() : IfxCan.h

IfxCan_Node_setTxEventFifoWatermarkLevel() : IfxCan.h

IfxCan_Node_writeData() : IfxCan.c , IfxCan.h

IfxCan_Node_writeTxBufData() : IfxCan.c , IfxCan.h

IfxCan_NodeId : IfxCan_cfg.h

IfxCan_NodeId_0 : IfxCan_cfg.h

IfxCan_NodeId_1 : IfxCan_cfg.h

IfxCan_NodeId_2 : IfxCan_cfg.h

IfxCan_NodeId_3 : IfxCan_cfg.h

IfxCan_NodeId_none : IfxCan_cfg.h

IfxCan_NonMatchingFrame : IfxCan.h

IfxCan_NonMatchingFrame_acceptToRxFifo0 : IfxCan.h

IfxCan_NonMatchingFrame_acceptToRxFifo1 : IfxCan.h

IfxCan_NonMatchingFrame_reject : IfxCan.h

IFXCAN_NUM_MODULES : IfxCan_cfg.h

IFXCAN_NUM_NODES : IfxCan_cfg.h

IFXCAN_PINMAP_NUM_MODULES : IfxCan_PinMap.h

IFXCAN_PINMAP_NUM_NODES : IfxCan_PinMap.h

IFXCAN_PINMAP_RXD_IN_NUM_ITEMS : IfxCan_PinMap.h

IFXCAN_PINMAP_TXD_OUT_NUM_ITEMS : IfxCan_PinMap.h

IfxCan_resetModule() : IfxCan.c , IfxCan.h

IfxCan_RxBufferId : IfxCan.h

IfxCan_RxBufferId_0 : IfxCan.h

IfxCan_RxBufferId_1 : IfxCan.h

IfxCan_RxBufferId_10 : IfxCan.h

IfxCan_RxBufferId_11 : IfxCan.h

IfxCan_RxBufferId_12 : IfxCan.h

IfxCan_RxBufferId_13 : IfxCan.h

IfxCan_RxBufferId_14 : IfxCan.h

IfxCan_RxBufferId_15 : IfxCan.h

IfxCan_RxBufferId_16 : IfxCan.h

IfxCan_RxBufferId_17 : IfxCan.h

IfxCan_RxBufferId_18 : IfxCan.h

IfxCan_RxBufferId_19 : IfxCan.h

IfxCan_RxBufferId_2 : IfxCan.h

IfxCan_RxBufferId_20 : IfxCan.h

IfxCan_RxBufferId_21 : IfxCan.h

IfxCan_RxBufferId_22 : IfxCan.h

IfxCan_RxBufferId_23 : IfxCan.h

IfxCan_RxBufferId_24 : IfxCan.h

IfxCan_RxBufferId_25 : IfxCan.h

IfxCan_RxBufferId_26 : IfxCan.h

IfxCan_RxBufferId_27 : IfxCan.h

IfxCan_RxBufferId_28 : IfxCan.h

IfxCan_RxBufferId_29 : IfxCan.h

IfxCan_RxBufferId_3 : IfxCan.h

IfxCan_RxBufferId_30 : IfxCan.h

IfxCan_RxBufferId_31 : IfxCan.h

IfxCan_RxBufferId_32 : IfxCan.h

IfxCan_RxBufferId_33 : IfxCan.h

IfxCan_RxBufferId_34 : IfxCan.h

IfxCan_RxBufferId_35 : IfxCan.h

IfxCan_RxBufferId_36 : IfxCan.h

IfxCan_RxBufferId_37 : IfxCan.h

IfxCan_RxBufferId_38 : IfxCan.h

IfxCan_RxBufferId_39 : IfxCan.h

IfxCan_RxBufferId_4 : IfxCan.h

IfxCan_RxBufferId_40 : IfxCan.h

IfxCan_RxBufferId_41 : IfxCan.h

IfxCan_RxBufferId_42 : IfxCan.h

IfxCan_RxBufferId_43 : IfxCan.h

IfxCan_RxBufferId_44 : IfxCan.h

IfxCan_RxBufferId_45 : IfxCan.h

IfxCan_RxBufferId_46 : IfxCan.h

IfxCan_RxBufferId_47 : IfxCan.h

IfxCan_RxBufferId_48 : IfxCan.h

IfxCan_RxBufferId_49 : IfxCan.h

IfxCan_RxBufferId_5 : IfxCan.h

IfxCan_RxBufferId_50 : IfxCan.h

IfxCan_RxBufferId_51 : IfxCan.h

IfxCan_RxBufferId_52 : IfxCan.h

IfxCan_RxBufferId_53 : IfxCan.h

IfxCan_RxBufferId_54 : IfxCan.h

IfxCan_RxBufferId_55 : IfxCan.h

IfxCan_RxBufferId_56 : IfxCan.h

IfxCan_RxBufferId_57 : IfxCan.h

IfxCan_RxBufferId_58 : IfxCan.h

IfxCan_RxBufferId_59 : IfxCan.h

IfxCan_RxBufferId_6 : IfxCan.h

IfxCan_RxBufferId_60 : IfxCan.h

IfxCan_RxBufferId_61 : IfxCan.h

IfxCan_RxBufferId_62 : IfxCan.h

IfxCan_RxBufferId_63 : IfxCan.h

IfxCan_RxBufferId_7 : IfxCan.h

IfxCan_RxBufferId_8 : IfxCan.h

IfxCan_RxBufferId_9 : IfxCan.h

IfxCan_RXD00A_P02_1_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD00B_P20_7_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD00C_P12_0_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD00D_P33_12_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD00E_P33_7_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD00F_P01_8_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD00G_P34_2_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD00H_P02_14_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD01A_P15_3_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD01B_P14_1_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD01C_P01_4_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD01D_P33_10_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD01E_P02_10_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD02A_P15_1_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD02B_P02_3_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD02C_P32_6_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD02D_P14_8_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD02E_P10_2_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD03A_P00_3_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD03B_P32_2_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD03C_P20_0_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD03D_P11_10_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD03E_P20_9_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD03F_P01_0_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD10A_P00_1_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD10B_P14_7_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD10C_P23_0_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD10D_P13_1_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD11A_P02_4_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD11B_P00_5_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD11C_P23_7_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD11D_P11_7_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD12A_P20_6_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD12B_P10_8_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD12C_P23_3_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD12D_P11_8_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD13A_P14_7_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD13B_P33_5_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD13C_P22_5_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD13D_P11_13_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD20A_P10_5_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD20B_P10_8_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD20C_P34_2_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD20D_P02_14_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD20E_P01_8_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD20F_P11_14_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD21A_P00_3_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD21B_P13_12_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD21C_P20_0_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD21D_P32_2_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD21E_P01_0_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD21F_P22_7_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD22A_P33_13_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD22B_P32_7_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD22C_P23_6_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD22D_P14_14_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD22E_P22_9_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD23A_P14_10_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD23B_P23_3_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD23C_P14_15_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD23D_P13_5_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RXD23E_P22_11_IN : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_Rxd_In_pinTable : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_RxFifoMode : IfxCan.h

IfxCan_RxFifoMode_blocking : IfxCan.h

IfxCan_RxFifoMode_overwrite : IfxCan.h

IfxCan_RxMode : IfxCan.h

IfxCan_RxMode_dedicatedBuffers : IfxCan.h

IfxCan_RxMode_fifo0 : IfxCan.h

IfxCan_RxMode_fifo1 : IfxCan.h

IfxCan_RxMode_sharedAll : IfxCan.h

IfxCan_RxMode_sharedFifo0 : IfxCan.h

IfxCan_RxMode_sharedFifo1 : IfxCan.h

IfxCan_setClockSource() : IfxCan.c , IfxCan.h

IfxCan_setSleepMode() : IfxCan.h

IfxCan_setSuspendMode() : IfxCan.h

IfxCan_SleepMode : IfxCan.h

IfxCan_SleepMode_disable : IfxCan.h

IfxCan_SleepMode_enable : IfxCan.h

IfxCan_Status : IfxCan.h

IfxCan_Status_busOff : IfxCan.h

IfxCan_Status_messageLost : IfxCan.h

IfxCan_Status_newData : IfxCan.h

IfxCan_Status_newDataButOneLost : IfxCan.h

IfxCan_Status_notInitialised : IfxCan.h

IfxCan_Status_notSentBusy : IfxCan.h

IfxCan_Status_ok : IfxCan.h

IfxCan_Status_receiveEmpty : IfxCan.h

IfxCan_SuspendMode : IfxCan.h

IfxCan_SuspendMode_hard : IfxCan.h

IfxCan_SuspendMode_none : IfxCan.h

IfxCan_SuspendMode_soft : IfxCan.h

IfxCan_TxBufferId : IfxCan.h

IfxCan_TxBufferId_0 : IfxCan.h

IfxCan_TxBufferId_1 : IfxCan.h

IfxCan_TxBufferId_10 : IfxCan.h

IfxCan_TxBufferId_11 : IfxCan.h

IfxCan_TxBufferId_12 : IfxCan.h

IfxCan_TxBufferId_13 : IfxCan.h

IfxCan_TxBufferId_14 : IfxCan.h

IfxCan_TxBufferId_15 : IfxCan.h

IfxCan_TxBufferId_16 : IfxCan.h

IfxCan_TxBufferId_17 : IfxCan.h

IfxCan_TxBufferId_18 : IfxCan.h

IfxCan_TxBufferId_19 : IfxCan.h

IfxCan_TxBufferId_2 : IfxCan.h

IfxCan_TxBufferId_20 : IfxCan.h

IfxCan_TxBufferId_21 : IfxCan.h

IfxCan_TxBufferId_22 : IfxCan.h

IfxCan_TxBufferId_23 : IfxCan.h

IfxCan_TxBufferId_24 : IfxCan.h

IfxCan_TxBufferId_25 : IfxCan.h

IfxCan_TxBufferId_26 : IfxCan.h

IfxCan_TxBufferId_27 : IfxCan.h

IfxCan_TxBufferId_28 : IfxCan.h

IfxCan_TxBufferId_29 : IfxCan.h

IfxCan_TxBufferId_3 : IfxCan.h

IfxCan_TxBufferId_30 : IfxCan.h

IfxCan_TxBufferId_31 : IfxCan.h

IfxCan_TxBufferId_4 : IfxCan.h

IfxCan_TxBufferId_5 : IfxCan.h

IfxCan_TxBufferId_6 : IfxCan.h

IfxCan_TxBufferId_7 : IfxCan.h

IfxCan_TxBufferId_8 : IfxCan.h

IfxCan_TxBufferId_9 : IfxCan.h

IfxCan_TXD00_P01_13_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD00_P02_0_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD00_P02_13_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD00_P12_1_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD00_P20_8_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD00_P33_13_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD00_P33_8_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD00_P34_1_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD01_P01_3_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD01_P02_9_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD01_P14_0_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD01_P15_2_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD01_P33_9_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD02_P02_2_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD02_P10_3_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD02_P14_10_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD02_P15_0_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD02_P32_5_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD03_P00_2_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD03_P01_2_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD03_P11_12_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD03_P20_10_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD03_P20_3_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD03_P32_3_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD10_P00_0_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD10_P13_0_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD10_P14_9_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD10_P23_1_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD11_P00_4_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD11_P02_5_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD11_P11_0_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD11_P23_6_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD12_P10_7_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD12_P11_1_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD12_P20_7_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD12_P23_2_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD13_P11_4_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD13_P14_6_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD13_P22_4_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD13_P33_4_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD20_P01_13_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD20_P02_13_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD20_P10_6_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD20_P10_7_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD20_P11_5_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD20_P34_1_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD21_P00_2_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD21_P01_2_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD21_P13_9_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD21_P20_3_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD21_P22_6_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD21_P32_3_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD22_P14_13_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD22_P22_8_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD22_P23_5_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD22_P32_6_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD22_P33_12_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD23_P13_4_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD23_P14_14_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD23_P14_9_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD23_P22_10_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TXD23_P23_2_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_Txd_Out_pinTable : IfxCan_PinMap.c , IfxCan_PinMap.h

IfxCan_TxMode : IfxCan.h

IfxCan_TxMode_dedicatedBuffers : IfxCan.h

IfxCan_TxMode_fifo : IfxCan.h

IfxCan_TxMode_queue : IfxCan.h

IfxCan_TxMode_sharedFifo : IfxCan.h

IfxCan_TxMode_sharedQueue : IfxCan.h

IfxCcu60_CC60_P02_0_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CC60_P02_6_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CC60_P11_12_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CC60_P15_6_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CC60_P34_2_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CC60INA_P02_0_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CC60INB_P00_1_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CC60INC_P02_6_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CC61_P02_2_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CC61_P02_7_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CC61_P11_11_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CC61_P15_5_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CC61_P34_4_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CC61INA_P02_2_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CC61INB_P00_3_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CC61INC_P02_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CC62_P02_4_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CC62_P02_8_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CC62_P11_10_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CC62_P15_4_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CC62_P33_14_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CC62INA_P02_4_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CC62INB_P00_5_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CC62INC_P02_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CCPOS0A_P02_6_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CCPOS0C_P10_4_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CCPOS0D_P40_0_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CCPOS1A_P02_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CCPOS1B_P40_1_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CCPOS1C_P10_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CCPOS1D_P40_2_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CCPOS2A_P02_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CCPOS2B_P40_3_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CCPOS2C_P10_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CCPOS2D_P40_4_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_COUT60_P02_1_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_COUT60_P11_9_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_COUT60_P15_7_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_COUT60_P34_3_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_COUT61_P02_3_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_COUT61_P11_6_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_COUT61_P15_8_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_COUT61_P34_5_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_COUT62_P02_5_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_COUT62_P11_3_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_COUT62_P14_0_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_COUT62_P33_15_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_COUT63_P00_0_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_COUT63_P11_2_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_COUT63_P14_1_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_COUT63_P32_4_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_COUT63_P34_1_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CTRAPA_P00_11_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_T12HRB_P00_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_T12HRC_P00_9_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_T12HRE_P00_0_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_T13HRB_P00_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_T13HRC_P00_9_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CC60_P00_1_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CC60_P00_7_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CC60_P20_8_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CC60_P33_13_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CC60INA_P00_1_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CC60INB_P02_0_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CC60INC_P00_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CC61_P00_3_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CC61_P00_8_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CC61_P20_9_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CC61_P33_11_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CC61INA_P00_3_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CC61INB_P02_2_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CC61INC_P00_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CC62_P00_5_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CC62_P00_9_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CC62_P20_10_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CC62_P33_9_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CC62INA_P00_5_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CC62INB_P02_4_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CC62INC_P00_9_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CCPOS0A_P00_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CCPOS0C_P33_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CCPOS0D_P40_5_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CCPOS1A_P00_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CCPOS1B_P40_6_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CCPOS1C_P33_6_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CCPOS1D_P40_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CCPOS2A_P00_9_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CCPOS2B_P40_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CCPOS2C_P33_5_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CCPOS2D_P40_9_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_COUT60_P00_2_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_COUT60_P20_11_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_COUT60_P33_12_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_COUT61_P00_4_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_COUT61_P20_12_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_COUT61_P33_10_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_COUT62_P00_6_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_COUT62_P20_13_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_COUT62_P33_8_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_COUT63_P00_10_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_COUT63_P00_12_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_COUT63_P20_7_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CTRAPA_P00_0_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CTRAPC_P33_4_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_T12HRB_P02_6_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_T12HRC_P02_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_T12HRE_P00_11_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_T13HRB_P02_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_T13HRC_P02_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu6_CaptureCompareInput : IfxCcu6.h

IfxCcu6_CaptureCompareInput_cC60 : IfxCcu6.h

IfxCcu6_CaptureCompareInput_cC61 : IfxCcu6.h

IfxCcu6_CaptureCompareInput_cC62 : IfxCcu6.h

IfxCcu6_CaptureCompareInput_cCPOS0 : IfxCcu6.h

IfxCcu6_CaptureCompareInput_cCPOS1 : IfxCcu6.h

IfxCcu6_CaptureCompareInput_cCPOS2 : IfxCcu6.h

IfxCcu6_CaptureCompareInput_cTRAP : IfxCcu6.h

IfxCcu6_CaptureCompareInputSignal : IfxCcu6.h

IfxCcu6_CaptureCompareInputSignal_a : IfxCcu6.h

IfxCcu6_CaptureCompareInputSignal_b : IfxCcu6.h

IfxCcu6_CaptureCompareInputSignal_c : IfxCcu6.h

IfxCcu6_CaptureCompareInputSignal_d : IfxCcu6.h

IfxCcu6_CaptureCompareState : IfxCcu6.h

IfxCcu6_CaptureCompareState_clear : IfxCcu6.h

IfxCcu6_CaptureCompareState_set : IfxCcu6.h

IfxCcu6_CaptureCompareState_toggle : IfxCcu6.h

IfxCcu6_Cc60_Out_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu6_Cc60in_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu6_Cc61_Out_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu6_Cc61in_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu6_Cc62_Out_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu6_Cc62in_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu6_Ccpos0_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu6_Ccpos1_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu6_Ccpos2_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu6_cfg_indexMap : IfxCcu6_cfg.c , IfxCcu6_cfg.h

IfxCcu6_ChannelOut : IfxCcu6.h

IfxCcu6_ChannelOut_cc0 : IfxCcu6.h

IfxCcu6_ChannelOut_cc1 : IfxCcu6.h

IfxCcu6_ChannelOut_cc2 : IfxCcu6.h

IfxCcu6_ChannelOut_cout0 : IfxCcu6.h

IfxCcu6_ChannelOut_cout1 : IfxCcu6.h

IfxCcu6_ChannelOut_cout2 : IfxCcu6.h

IfxCcu6_ChannelOut_cout3 : IfxCcu6.h

IfxCcu6_clearAllInterruptStatusFlags() : IfxCcu6.h

IfxCcu6_clearCounter() : IfxCcu6.h

IfxCcu6_clearDeadTimeCounters() : IfxCcu6.h

IfxCcu6_clearInterruptStatusFlag() : IfxCcu6.h

IfxCcu6_clearT12OneNotification() : IfxCcu6.h

IfxCcu6_clearT12PeriodNotification() : IfxCcu6.h

IfxCcu6_clearT13CompareNotification() : IfxCcu6.h

IfxCcu6_connectTrigger() : IfxCcu6.c , IfxCcu6.h

IfxCcu6_CountingInputMode : IfxCcu6.h

IfxCcu6_CountingInputMode_externalFalling : IfxCcu6.h

IfxCcu6_CountingInputMode_externalRising : IfxCcu6.h

IfxCcu6_CountingInputMode_internal : IfxCcu6.h

IfxCcu6_CountingInputMode_manual : IfxCcu6.h

IfxCcu6_Cout60_Out_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu6_Cout61_Out_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu6_Cout62_Out_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu6_Cout63_Out_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu6_Ctrap_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu6_DelayBypass : IfxCcu6.h

IfxCcu6_DelayBypass_active : IfxCcu6.h

IfxCcu6_DelayBypass_notActive : IfxCcu6.h

IfxCcu6_disableAdditionalPrescaler() : IfxCcu6.h

IfxCcu6_disableDeadTime() : IfxCcu6.h

IfxCcu6_disableDelayBypass() : IfxCcu6.h

IfxCcu6_disableInterrupt() : IfxCcu6.h

IfxCcu6_disableModulationOutput() : IfxCcu6.c , IfxCcu6.h

IfxCcu6_disableModule() : IfxCcu6.c , IfxCcu6.h

IfxCcu6_disableMultiChannelMode() : IfxCcu6.h

IfxCcu6_disableShadowTransfer() : IfxCcu6.h

IfxCcu6_disableSingleShotMode() : IfxCcu6.h

IfxCcu6_disableT13InvertedModulation() : IfxCcu6.h

IfxCcu6_disableTimer() : IfxCcu6.h

IfxCcu6_disableTrap() : IfxCcu6.h

IfxCcu6_disableTrapPin() : IfxCcu6.h

IFXCCU6_EMPTY_OUTPUT_SLOT : IfxCcu6_cfg.c

IfxCcu6_enableAdditionalPrescaler() : IfxCcu6.h

IfxCcu6_enableCountEvent() : IfxCcu6.h

IfxCcu6_enableDeadTime() : IfxCcu6.h

IfxCcu6_enableDelayBypass() : IfxCcu6.h

IfxCcu6_enableHallPatternShadowTransfer() : IfxCcu6.h

IfxCcu6_enableInterrupt() : IfxCcu6.h

IfxCcu6_enableModulationOutput() : IfxCcu6.c , IfxCcu6.h

IfxCcu6_enableModule() : IfxCcu6.c , IfxCcu6.h

IfxCcu6_enableMultiChannelMode() : IfxCcu6.h

IfxCcu6_enableMultiChannelModeAvailability() : IfxCcu6.h

IfxCcu6_enableMultiChannelPwmPatternShadowTransfer() : IfxCcu6.h

IfxCcu6_enableMultiChannelT12DowncountingShadowTransfer() : IfxCcu6.h

IfxCcu6_enableMultiChannelT12UpcountingShadowTransfer() : IfxCcu6.h

IfxCcu6_enableMultiChannelT13UpcountingShadowTransfer() : IfxCcu6.h

IfxCcu6_enableShadowTransfer() : IfxCcu6.h

IfxCcu6_enableSingleShotMode() : IfxCcu6.h

IfxCcu6_enableT13InvertedModulation() : IfxCcu6.h

IfxCcu6_enableTimer() : IfxCcu6.h

IfxCcu6_enableTrap() : IfxCcu6.h

IfxCcu6_enableTrapPin() : IfxCcu6.h

IfxCcu6_ExternalTriggerMode : IfxCcu6.h

IfxCcu6_ExternalTriggerMode_anyEdge : IfxCcu6.h

IfxCcu6_ExternalTriggerMode_disable : IfxCcu6.h

IfxCcu6_ExternalTriggerMode_fallingEdge : IfxCcu6.h

IfxCcu6_ExternalTriggerMode_risingEdge : IfxCcu6.h

IfxCcu6_getAddress() : IfxCcu6.c , IfxCcu6.h

IfxCcu6_getCaptureRegisterValue() : IfxCcu6.c , IfxCcu6.h

IfxCcu6_getCaptureShadowRegisterValue() : IfxCcu6.c , IfxCcu6.h

IfxCcu6_getDeadTimeStatus() : IfxCcu6.h

IfxCcu6_getHallPatternSampleState() : IfxCcu6.h

IfxCcu6_getIndex() : IfxCcu6.c , IfxCcu6.h

IfxCcu6_getInterruptStatusFlag() : IfxCcu6.h

IfxCcu6_getMultiChannelModeAvailabilityStatus() : IfxCcu6.h

IfxCcu6_getMultiChannelPWMPatternShadowTransferStatus() : IfxCcu6.h

IfxCcu6_getShadowTransferStatus() : IfxCcu6.h

IfxCcu6_getSrcAddress() : IfxCcu6.c , IfxCcu6.h

IfxCcu6_getT12CaptureCompareState() : IfxCcu6.h

IfxCcu6_getT12CountDirection() : IfxCcu6.h

IfxCcu6_getT12TimerPointer() : IfxCcu6.h

IfxCcu6_getT13CaptureCompareState() : IfxCcu6.h

IfxCcu6_getTimerAvailabilityStatus() : IfxCcu6.h

IfxCcu6_getTimerRunStatus() : IfxCcu6.h

IfxCcu6_HallSensorTriggerMode : IfxCcu6.h

IfxCcu6_HallSensorTriggerMode_cM61CountingDown : IfxCcu6.h

IfxCcu6_HallSensorTriggerMode_cM61CountingUp : IfxCcu6.h

IfxCcu6_HallSensorTriggerMode_cM63 : IfxCcu6.h

IfxCcu6_HallSensorTriggerMode_off : IfxCcu6.h

IfxCcu6_HallSensorTriggerMode_permanentCheck : IfxCcu6.h

IfxCcu6_HallSensorTriggerMode_t12OMCountingDown : IfxCcu6.h

IfxCcu6_HallSensorTriggerMode_t12PMCountingUp : IfxCcu6.h

IfxCcu6_HallSensorTriggerMode_t13PM : IfxCcu6.h

IfxCcu6_Icu_getTimeStamp() : IfxCcu6_Icu.c , IfxCcu6_Icu.h

IfxCcu6_Icu_initChannel() : IfxCcu6_Icu.c , IfxCcu6_Icu.h

IfxCcu6_Icu_initChannelConfig() : IfxCcu6_Icu.c , IfxCcu6_Icu.h

IfxCcu6_Icu_initModule() : IfxCcu6_Icu.c , IfxCcu6_Icu.h

IfxCcu6_Icu_initModuleConfig() : IfxCcu6_Icu.c , IfxCcu6_Icu.h

IfxCcu6_Icu_startCapture() : IfxCcu6_Icu.c , IfxCcu6_Icu.h

IfxCcu6_Icu_stopCapture() : IfxCcu6_Icu.c , IfxCcu6_Icu.h

IfxCcu6_Index : IfxCcu6_cfg.h

IfxCcu6_Index_0 : IfxCcu6_cfg.h

IfxCcu6_Index_1 : IfxCcu6_cfg.h

IfxCcu6_Index_none : IfxCcu6_cfg.h

IfxCcu6_initCc60InPin() : IfxCcu6.h

IfxCcu6_initCc60InPinWithPadLevel() : IfxCcu6.h

IfxCcu6_initCc60OutPin() : IfxCcu6.h

IfxCcu6_initCc61InPin() : IfxCcu6.h

IfxCcu6_initCc61InPinWithPadLevel() : IfxCcu6.h

IfxCcu6_initCc61OutPin() : IfxCcu6.h

IfxCcu6_initCc62InPin() : IfxCcu6.h

IfxCcu6_initCc62InPinWithPadLevel() : IfxCcu6.h

IfxCcu6_initCc62OutPin() : IfxCcu6.h

IfxCcu6_initCcpos0Pin() : IfxCcu6.h

IfxCcu6_initCcpos0PinWithPadLevel() : IfxCcu6.h

IfxCcu6_initCcpos1Pin() : IfxCcu6.h

IfxCcu6_initCcpos1PinWithPadLevel() : IfxCcu6.h

IfxCcu6_initCcpos2Pin() : IfxCcu6.h

IfxCcu6_initCcpos2PinWithPadLevel() : IfxCcu6.h

IfxCcu6_initCout60Pin() : IfxCcu6.h

IfxCcu6_initCout61Pin() : IfxCcu6.h

IfxCcu6_initCout62Pin() : IfxCcu6.h

IfxCcu6_initCout63Pin() : IfxCcu6.h

IfxCcu6_initCtrapPin() : IfxCcu6.h

IfxCcu6_initCtrapPinWithPadLevel() : IfxCcu6.h

IfxCcu6_initT12hrPin() : IfxCcu6.h

IfxCcu6_initT12hrPinWithPadLevel() : IfxCcu6.h

IfxCcu6_initT13hrPin() : IfxCcu6.h

IfxCcu6_initT13hrPinWithPadLevel() : IfxCcu6.h

IfxCcu6_InterruptSource : IfxCcu6.h

IfxCcu6_InterruptSource_cc60FallingEdge : IfxCcu6.h

IfxCcu6_InterruptSource_cc60RisingEdge : IfxCcu6.h

IfxCcu6_InterruptSource_cc61FallingEdge : IfxCcu6.h

IfxCcu6_InterruptSource_cc61RisingEdge : IfxCcu6.h

IfxCcu6_InterruptSource_cc62FallingEdge : IfxCcu6.h

IfxCcu6_InterruptSource_cc62RisingEdge : IfxCcu6.h

IfxCcu6_InterruptSource_correctHallEvent : IfxCcu6.h

IfxCcu6_InterruptSource_t12OneMatch : IfxCcu6.h

IfxCcu6_InterruptSource_t12PeriodMatch : IfxCcu6.h

IfxCcu6_InterruptSource_t13CompareMatch : IfxCcu6.h

IfxCcu6_InterruptSource_t13PeriodMatch : IfxCcu6.h

IfxCcu6_InterruptSource_trap : IfxCcu6.h

IfxCcu6_InterruptSource_wrongHallEvent : IfxCcu6.h

IfxCcu6_isModuleEnabled() : IfxCcu6.h

IfxCcu6_isModuleSuspended() : IfxCcu6.h

IfxCcu6_isT12OneNotification() : IfxCcu6.h

IfxCcu6_isT12PeriodNotification() : IfxCcu6.h

IfxCcu6_isT13CompareNotification() : IfxCcu6.h

IfxCcu6_MultiChannelSwitchingSelect : IfxCcu6.h

IfxCcu6_MultiChannelSwitchingSelect_correctHallEvent : IfxCcu6.h

IfxCcu6_MultiChannelSwitchingSelect_noEvent : IfxCcu6.h

IfxCcu6_MultiChannelSwitchingSelect_t12Channel1CompareMatch : IfxCcu6.h

IfxCcu6_MultiChannelSwitchingSelect_t12OneMatch : IfxCcu6.h

IfxCcu6_MultiChannelSwitchingSelect_t12PeriodMatch : IfxCcu6.h

IfxCcu6_MultiChannelSwitchingSelect_t13PeriodMatch : IfxCcu6.h

IfxCcu6_MultiChannelSwitchingSync : IfxCcu6.h

IfxCcu6_MultiChannelSwitchingSync_direct : IfxCcu6.h

IfxCcu6_MultiChannelSwitchingSync_t12ZeroMatch : IfxCcu6.h

IfxCcu6_MultiChannelSwitchingSync_t13ZeroMatch : IfxCcu6.h

IFXCCU6_NUM_MODULES : IfxCcu6_cfg.h

IFXCCU6_NUM_SERVICE_REQUESTS : IfxCcu6_cfg.h

IFXCCU6_NUM_T12_CHANNELS : IfxCcu6_cfg.h

IFXCCU6_NUM_T13_CHANNELS : IfxCcu6_cfg.h

IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS : IfxCcu6_PinMap.h

IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS : IfxCcu6_PinMap.h

IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS : IfxCcu6_PinMap.h

IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS : IfxCcu6_PinMap.h

IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS : IfxCcu6_PinMap.h

IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS : IfxCcu6_PinMap.h

IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS : IfxCcu6_PinMap.h

IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS : IfxCcu6_PinMap.h

IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS : IfxCcu6_PinMap.h

IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS : IfxCcu6_PinMap.h

IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS : IfxCcu6_PinMap.h

IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS : IfxCcu6_PinMap.h

IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS : IfxCcu6_PinMap.h

IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS : IfxCcu6_PinMap.h

IFXCCU6_PINMAP_NUM_MODULES : IfxCcu6_PinMap.h

IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS : IfxCcu6_PinMap.h

IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS : IfxCcu6_PinMap.h

IfxCcu6_PwmBc_getMotorSpeed() : IfxCcu6_PwmBc.c , IfxCcu6_PwmBc.h

IfxCcu6_PwmBc_initModule() : IfxCcu6_PwmBc.c , IfxCcu6_PwmBc.h

IfxCcu6_PwmBc_initModuleConfig() : IfxCcu6_PwmBc.c , IfxCcu6_PwmBc.h

IfxCcu6_PwmBc_start() : IfxCcu6_PwmBc.c , IfxCcu6_PwmBc.h

IfxCcu6_PwmBc_stop() : IfxCcu6_PwmBc.c , IfxCcu6_PwmBc.h

IfxCcu6_PwmBc_updateHallPattern() : IfxCcu6_PwmBc.c , IfxCcu6_PwmBc.h

IfxCcu6_PwmHl : IfxCcu6_PwmHl.h

IfxCcu6_PwmHl_disable() : IfxCcu6_PwmHl.c

IfxCcu6_PwmHl_enable() : IfxCcu6_PwmHl.c

IfxCcu6_PwmHl_getDeadtime() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h

IfxCcu6_PwmHl_getMinPulse() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h

IfxCcu6_PwmHl_getMode() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h

IfxCcu6_PwmHl_init() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h

IfxCcu6_PwmHl_initConfig() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h

IfxCcu6_PwmHl_invertActiveState() : IfxCcu6_PwmHl.h

IFXCCU6_PWMHL_MAX_CHANNELS : IfxCcu6_PwmHl.h

IfxCcu6_PwmHl_modes : IfxCcu6_PwmHl.c

IfxCcu6_PwmHl_setDeadtime() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h

IfxCcu6_PwmHl_setMinPulse() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h

IfxCcu6_PwmHl_setMode() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h

IfxCcu6_PwmHl_setOnTime() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h

IfxCcu6_PwmHl_setOutputPins() : IfxCcu6_PwmHl.c

IfxCcu6_PwmHl_setupChannels() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h

IfxCcu6_PwmHl_stdIfPwmHlInit() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h

IfxCcu6_PwmHl_Update : IfxCcu6_PwmHl.h

IfxCcu6_PwmHl_updateCenterAligned() : IfxCcu6_PwmHl.c

IfxCcu6_PwmHl_updateEdgeAligned() : IfxCcu6_PwmHl.c

IfxCcu6_PwmHl_updateOff() : IfxCcu6_PwmHl.c

IfxCcu6_readTimer() : IfxCcu6.c , IfxCcu6.h

IfxCcu6_resetModule() : IfxCcu6.c , IfxCcu6.h

IfxCcu6_routeInterruptNode() : IfxCcu6.c , IfxCcu6.h

IfxCcu6_ServiceRequest : IfxCcu6.h

IfxCcu6_ServiceRequest_0 : IfxCcu6.h

IfxCcu6_ServiceRequest_1 : IfxCcu6.h

IfxCcu6_ServiceRequest_2 : IfxCcu6.h

IfxCcu6_ServiceRequest_3 : IfxCcu6.h

IfxCcu6_setCaptureCompareInputSignal() : IfxCcu6.h

IfxCcu6_setCountingInputMode() : IfxCcu6.h

IfxCcu6_setCurrentHallPattern() : IfxCcu6.h

IfxCcu6_setDeadTimeValue() : IfxCcu6.h

IfxCcu6_setExpectedHallPattern() : IfxCcu6.h

IfxCcu6_setExternalRunMode() : IfxCcu6.h

IfxCcu6_setHallSensorTriggerMode() : IfxCcu6.h

IfxCcu6_setInputClockFrequency() : IfxCcu6.h

IfxCcu6_setInterruptStatusFlag() : IfxCcu6.h

IfxCcu6_setMultiChannelPwmPattern() : IfxCcu6.h

IfxCcu6_setMultiChannelSwitchingMode() : IfxCcu6.h

IfxCcu6_setMultiChannelSwitchingSync() : IfxCcu6.h

IfxCcu6_setOutputPassiveLevel() : IfxCcu6.c , IfxCcu6.h

IfxCcu6_setOutputPassiveState() : IfxCcu6.h

IfxCcu6_setSingleShotModeEnable() : IfxCcu6.h

IfxCcu6_setSleepMode() : IfxCcu6.h

IfxCcu6_setSuspendMode() : IfxCcu6.h

IfxCcu6_setT12CaptureCompareState() : IfxCcu6.c , IfxCcu6.h

IfxCcu6_setT12ChannelMode() : IfxCcu6.h

IfxCcu6_setT12CompareValue() : IfxCcu6.c , IfxCcu6.h

IfxCcu6_setT12CounterValue() : IfxCcu6.h

IfxCcu6_setT12CountMode() : IfxCcu6.h

IfxCcu6_setT12Frequency() : IfxCcu6.c , IfxCcu6.h

IfxCcu6_setT12InputSignal() : IfxCcu6.c , IfxCcu6.h

IfxCcu6_setT12PeriodValue() : IfxCcu6.h

IfxCcu6_setT13CaptureCompareState() : IfxCcu6.c , IfxCcu6.h

IfxCcu6_setT13CompareValue() : IfxCcu6.h

IfxCcu6_setT13CounterValue() : IfxCcu6.h

IfxCcu6_setT13Frequency() : IfxCcu6.c , IfxCcu6.h

IfxCcu6_setT13InputSignal() : IfxCcu6.c , IfxCcu6.h

IfxCcu6_setT13PeriodValue() : IfxCcu6.h

IfxCcu6_setT13TriggerEventDirection() : IfxCcu6.h

IfxCcu6_setT13TriggerEventMode() : IfxCcu6.h

IfxCcu6_setTrapMode() : IfxCcu6.h

IfxCcu6_setTrapState() : IfxCcu6.h

IfxCcu6_SleepMode : IfxCcu6.h

IfxCcu6_SleepMode_disable : IfxCcu6.h

IfxCcu6_SleepMode_enable : IfxCcu6.h

IfxCcu6_startTimer() : IfxCcu6.h

IfxCcu6_stopTimer() : IfxCcu6.h

IfxCcu6_SuspendMode : IfxCcu6.h

IfxCcu6_SuspendMode_hard : IfxCcu6.h

IfxCcu6_SuspendMode_none : IfxCcu6.h

IfxCcu6_SuspendMode_soft : IfxCcu6.h

IfxCcu6_T12Channel : IfxCcu6.h

IfxCcu6_T12Channel_0 : IfxCcu6.h

IfxCcu6_T12Channel_1 : IfxCcu6.h

IfxCcu6_T12Channel_2 : IfxCcu6.h

IfxCcu6_T12ChannelMode : IfxCcu6.h

IfxCcu6_T12ChannelMode_compareMode : IfxCcu6.h

IfxCcu6_T12ChannelMode_doubleRegisterCaptureAny : IfxCcu6.h

IfxCcu6_T12ChannelMode_doubleRegisterCaptureFalling : IfxCcu6.h

IfxCcu6_T12ChannelMode_doubleRegisterCaptureRising : IfxCcu6.h

IfxCcu6_T12ChannelMode_doubleRegisterCaptureRisingAndFalling : IfxCcu6.h

IfxCcu6_T12ChannelMode_hallSensor : IfxCcu6.h

IfxCcu6_T12ChannelMode_hysteresisLikecompare : IfxCcu6.h

IfxCcu6_T12ChannelMode_multiInputCaptureAny : IfxCcu6.h

IfxCcu6_T12ChannelMode_multiInputCaptureBothFalling : IfxCcu6.h

IfxCcu6_T12ChannelMode_multiInputCaptureBothRising : IfxCcu6.h

IfxCcu6_T12ChannelMode_multiInputCaptureFallingAndRising : IfxCcu6.h

IfxCcu6_T12ChannelMode_multiInputCaptureRisingAndFalling : IfxCcu6.h

IfxCcu6_T12ChannelMode_off : IfxCcu6.h

IfxCcu6_T12CountDirection : IfxCcu6.h

IfxCcu6_T12CountDirection_down : IfxCcu6.h

IfxCcu6_T12CountDirection_up : IfxCcu6.h

IfxCcu6_T12CountMode : IfxCcu6.h

IfxCcu6_T12CountMode_centerAligned : IfxCcu6.h

IfxCcu6_T12CountMode_edgeAligned : IfxCcu6.h

IfxCcu6_T12hr_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu6_T13hr_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu6_T13TriggerDirection : IfxCcu6.h

IfxCcu6_T13TriggerDirection_anyT12 : IfxCcu6.h

IfxCcu6_T13TriggerDirection_noAction : IfxCcu6.h

IfxCcu6_T13TriggerDirection_onT12CountingDown : IfxCcu6.h

IfxCcu6_T13TriggerDirection_onT12CountingUp : IfxCcu6.h

IfxCcu6_T13TriggerEvent : IfxCcu6.h

IfxCcu6_T13TriggerEvent_noAction : IfxCcu6.h

IfxCcu6_T13TriggerEvent_onAnyT12Compare : IfxCcu6.h

IfxCcu6_T13TriggerEvent_onCC60RCompare : IfxCcu6.h

IfxCcu6_T13TriggerEvent_onCC61RCompare : IfxCcu6.h

IfxCcu6_T13TriggerEvent_onCC62RCompare : IfxCcu6.h

IfxCcu6_T13TriggerEvent_onCCPOSxEdge : IfxCcu6.h

IfxCcu6_T13TriggerEvent_onT12Period : IfxCcu6.h

IfxCcu6_T13TriggerEvent_onT12Zero : IfxCcu6.h

IfxCcu6_Timer_countOneStep() : IfxCcu6_Timer.c , IfxCcu6_Timer.h

IfxCcu6_Timer_initModule() : IfxCcu6_Timer.c , IfxCcu6_Timer.h

IfxCcu6_Timer_initModuleConfig() : IfxCcu6_Timer.c , IfxCcu6_Timer.h

IfxCcu6_Timer_start() : IfxCcu6_Timer.c , IfxCcu6_Timer.h

IfxCcu6_Timer_startSingleShotMode() : IfxCcu6_Timer.c , IfxCcu6_Timer.h

IfxCcu6_Timer_stop() : IfxCcu6_Timer.c , IfxCcu6_Timer.h

IfxCcu6_Timer_synchronousStart() : IfxCcu6_Timer.c , IfxCcu6_Timer.h

IfxCcu6_Timer_synchronousStop() : IfxCcu6_Timer.c , IfxCcu6_Timer.h

IfxCcu6_TimerId : IfxCcu6.h

IfxCcu6_TimerId_t12 : IfxCcu6.h

IfxCcu6_TimerId_t13 : IfxCcu6.h

IfxCcu6_TimerInputClock : IfxCcu6.h

IfxCcu6_TimerInputClock_fcc6 : IfxCcu6.h

IfxCcu6_TimerInputClock_fcc6By128 : IfxCcu6.h

IfxCcu6_TimerInputClock_fcc6By16 : IfxCcu6.h

IfxCcu6_TimerInputClock_fcc6By2 : IfxCcu6.h

IfxCcu6_TimerInputClock_fcc6By32 : IfxCcu6.h

IfxCcu6_TimerInputClock_fcc6By4 : IfxCcu6.h

IfxCcu6_TimerInputClock_fcc6By64 : IfxCcu6.h

IfxCcu6_TimerInputClock_fcc6By8 : IfxCcu6.h

IfxCcu6_TimerInputSignal : IfxCcu6.h

IfxCcu6_TimerInputSignal_a : IfxCcu6.h

IfxCcu6_TimerInputSignal_b : IfxCcu6.h

IfxCcu6_TimerInputSignal_c : IfxCcu6.h

IfxCcu6_TimerInputSignal_d : IfxCcu6.h

IfxCcu6_TimerInputSignal_e : IfxCcu6.h

IfxCcu6_TimerInputSignal_f : IfxCcu6.h

IfxCcu6_TimerInputSignal_g : IfxCcu6.h

IfxCcu6_TimerInputSignal_h : IfxCcu6.h

IfxCcu6_TimerRunStatus : IfxCcu6.h

IfxCcu6_TimerRunStatus_running : IfxCcu6.h

IfxCcu6_TimerRunStatus_stopped : IfxCcu6.h

IfxCcu6_TimerWithTrigger_acknowledgeTimerIrq() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h

IfxCcu6_TimerWithTrigger_acknowledgeTriggerIrq() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h

IfxCcu6_TimerWithTrigger_applyUpdate() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h

IfxCcu6_TimerWithTrigger_disableUpdate() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h

IfxCcu6_TimerWithTrigger_getFrequency() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h

IfxCcu6_TimerWithTrigger_getInputFrequency() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h

IfxCcu6_TimerWithTrigger_getPeriod() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h

IfxCcu6_TimerWithTrigger_getPointer() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h

IfxCcu6_TimerWithTrigger_getResolution() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h

IfxCcu6_TimerWithTrigger_init() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h

IfxCcu6_TimerWithTrigger_initConfig() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h

IfxCcu6_TimerWithTrigger_run() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h

IfxCcu6_TimerWithTrigger_setFrequency() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h

IfxCcu6_TimerWithTrigger_setPeriod() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h

IfxCcu6_TimerWithTrigger_setSingleMode() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h

IfxCcu6_TimerWithTrigger_setTrigger() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h

IfxCcu6_TimerWithTrigger_stdIfTimerInit() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h

IfxCcu6_TimerWithTrigger_stop() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h

IfxCcu6_TimerWithTrigger_updateInputFrequency() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h

IfxCcu6_TPwm_initModule() : IfxCcu6_TPwm.c , IfxCcu6_TPwm.h

IfxCcu6_TPwm_initModuleConfig() : IfxCcu6_TPwm.c , IfxCcu6_TPwm.h

IfxCcu6_TPwm_pause() : IfxCcu6_TPwm.c , IfxCcu6_TPwm.h

IfxCcu6_TPwm_resume() : IfxCcu6_TPwm.c , IfxCcu6_TPwm.h

IfxCcu6_TPwm_start() : IfxCcu6_TPwm.c , IfxCcu6_TPwm.h

IfxCcu6_TPwm_stop() : IfxCcu6_TPwm.c , IfxCcu6_TPwm.h

IfxCcu6_TrapMode : IfxCcu6.h

IfxCcu6_TrapMode_automatic : IfxCcu6.h

IfxCcu6_TrapMode_manual : IfxCcu6.h

IfxCcu6_TrapState : IfxCcu6.h

IfxCcu6_TrapState_immediate : IfxCcu6.h

IfxCcu6_TrapState_t12Sync : IfxCcu6.h

IfxCcu6_TrapState_t13Sync : IfxCcu6.h

IfxCcu6_TrigOut : IfxCcu6_cfg.h

IfxCcu6_TrigOut_0 : IfxCcu6_cfg.h

IfxCcu6_TrigOut_1 : IfxCcu6_cfg.h

IfxCcu6_TrigOut_2 : IfxCcu6_cfg.h

IfxCcu6_TrigSel : IfxCcu6_cfg.h

IfxCcu6_TrigSel_cc60 : IfxCcu6_cfg.h

IfxCcu6_TrigSel_cc61 : IfxCcu6_cfg.h

IfxCcu6_TrigSel_cc62 : IfxCcu6_cfg.h

IfxCcu6_TrigSel_cout63 : IfxCcu6_cfg.h

IfxCcu6_TrigSel_sr1 : IfxCcu6_cfg.h

IfxCcu6_TrigSel_sr3 : IfxCcu6_cfg.h

IfxCcu6_updateHallPattern() : IfxCcu6.h

IFXCOMPILER_COMMON_LINKER_SYMBOLS : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h

IFXCOMPILER_CORE_LINKER_SYMBOLS : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h

IfxConvctrl_clearAlarmFlag() : IfxConvctrl.h

IfxConvctrl_enableConfigurationAccess() : IfxConvctrl.h

IfxConvctrl_enableModule() : IfxConvctrl.h

IfxConvctrl_initializeModule() : IfxConvctrl.h

IfxConvctrl_injectCounterFault() : IfxConvctrl.h

IfxConvctrl_injectPhaseSyncDividerFault() : IfxConvctrl.h

IfxConvctrl_isErrorDetected() : IfxConvctrl.h

IfxConvctrl_isModuleSuspended() : IfxConvctrl.h

IfxConvctrl_lockConfigurationAccess() : IfxConvctrl.h

IfxConvctrl_PhaseSynchronizerDivider : IfxConvctrl.h

IfxConvctrl_PhaseSynchronizerDivider_10 : IfxConvctrl.h

IfxConvctrl_PhaseSynchronizerDivider_11 : IfxConvctrl.h

IfxConvctrl_PhaseSynchronizerDivider_12 : IfxConvctrl.h

IfxConvctrl_PhaseSynchronizerDivider_13 : IfxConvctrl.h

IfxConvctrl_PhaseSynchronizerDivider_14 : IfxConvctrl.h

IfxConvctrl_PhaseSynchronizerDivider_15 : IfxConvctrl.h

IfxConvctrl_PhaseSynchronizerDivider_16 : IfxConvctrl.h

IfxConvctrl_PhaseSynchronizerDivider_2 : IfxConvctrl.h

IfxConvctrl_PhaseSynchronizerDivider_3 : IfxConvctrl.h

IfxConvctrl_PhaseSynchronizerDivider_4 : IfxConvctrl.h

IfxConvctrl_PhaseSynchronizerDivider_5 : IfxConvctrl.h

IfxConvctrl_PhaseSynchronizerDivider_6 : IfxConvctrl.h

IfxConvctrl_PhaseSynchronizerDivider_7 : IfxConvctrl.h

IfxConvctrl_PhaseSynchronizerDivider_8 : IfxConvctrl.h

IfxConvctrl_PhaseSynchronizerDivider_9 : IfxConvctrl.h

IfxConvctrl_PhaseSynchronizerDivider_off : IfxConvctrl.h

IfxConvctrl_resetModule() : IfxConvctrl.c , IfxConvctrl.h

IfxConvctrl_setDividerValue() : IfxConvctrl.h

IfxConvctrl_setSuspendMode() : IfxConvctrl.h

IfxConvctrl_SuspendMode : IfxConvctrl.h

IfxConvctrl_SuspendMode_1 : IfxConvctrl.h

IfxConvctrl_SuspendMode_2 : IfxConvctrl.h

IfxConvctrl_SuspendMode_noSuspend : IfxConvctrl.h

IfxCpu_acquireMutex() : IfxCpu.c , IfxCpu.h

IFXCPU_ALLCORE_DONE : IfxCpu_cfg.h

IfxCpu_areInterruptsEnabled() : IfxCpu.h

IFXCPU_CACHABLE_FLASH_SEGMENT : IfxCpu_cfg.h

IFXCPU_CACHABLE_LMU_SEGMENT : IfxCpu_cfg.h

IfxCpu_calculateCrc32() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h

IFXCPU_CFG_ALLCORE_DONE : IfxCpu_cfg.h

IfxCpu_cfg_indexMap : IfxCpu_cfg.c , IfxCpu_cfg.h

IfxCpu_CoreMode : IfxCpu.h

IfxCpu_CoreMode_halt : IfxCpu.h

IfxCpu_CoreMode_idle : IfxCpu.h

IfxCpu_CoreMode_run : IfxCpu.h

IfxCpu_CoreMode_sleep : IfxCpu.h

IfxCpu_CoreMode_stby : IfxCpu.h

IfxCpu_CoreMode_unknown : IfxCpu.h

IfxCpu_CounterMode : IfxCpu.h

IfxCpu_CounterMode_normal : IfxCpu.h

IfxCpu_CounterMode_task : IfxCpu.h

IfxCpu_DBGST_HALT : IfxCpu_cfg.h

IfxCpu_DBGST_HALT_halt : IfxCpu_cfg.h

IfxCpu_DBGST_HALT_run : IfxCpu_cfg.h

IfxCpu_disableInterrupts() : IfxCpu.h

IfxCpu_disableInterruptsAllExceptMaster() : IfxCpu.c , IfxCpu.h

IfxCpu_disableOverlayBlock() : IfxCpu.c , IfxCpu.h

IfxCpu_emitEvent() : IfxCpu.c , IfxCpu.h

IfxCpu_enableInterrupts() : IfxCpu.h

IfxCpu_enableOverlayBlock() : IfxCpu.c , IfxCpu.h

IfxCpu_enableSegmentSpecificDataAccessCacheability() : IfxCpu.h

IfxCpu_enableSegmentSpecificInstructionAccessCacheability() : IfxCpu.h

IfxCpu_forceDisableInterrupts() : IfxCpu.h

IfxCpu_getAddress() : IfxCpu.h

IfxCpu_getClockCounter() : IfxCpu.h

IfxCpu_getClockCounterStickyOverflow() : IfxCpu.h

IfxCpu_getCoreId() : IfxCpu.h

IfxCpu_getCoreIndex() : IfxCpu.h

IfxCpu_getCoreMode() : IfxCpu.c , IfxCpu.h

IfxCpu_getCpuResetStatus() : IfxCpu.c , IfxCpu.h

IfxCpu_getIndex() : IfxCpu.c , IfxCpu.h

IfxCpu_getInstructionCounter() : IfxCpu.h

IfxCpu_getInstructionCounterStickyOverflow() : IfxCpu.h

IfxCpu_getPerformanceCounter() : IfxCpu.h

IfxCpu_getPerformanceCounterStickyOverflow() : IfxCpu.h

IfxCpu_getRandomVal() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h

IfxCpu_getRandomValue() : IfxCpu.c , IfxCpu.h

IfxCpu_getRandomValueWithinRange() : IfxCpu.c , IfxCpu.h

IFXCPU_GLB_ADDR_DSPR : IfxCpu.h

IFXCPU_GLB_ADDR_PSPR : IfxCpu.h

IfxCpu_Id : IfxCpu_cfg.h

IfxCpu_Id_0 : IfxCpu_cfg.h

IfxCpu_Id_1 : IfxCpu_cfg.h

IfxCpu_Id_2 : IfxCpu_cfg.h

IfxCpu_Id_3 : IfxCpu_cfg.h

IfxCpu_Id_none : IfxCpu_cfg.h

IfxCpu_Index : IfxCpu_cfg.h

IfxCpu_Index_0 : IfxCpu_cfg.h

IfxCpu_Index_1 : IfxCpu_cfg.h

IfxCpu_Index_2 : IfxCpu_cfg.h

IfxCpu_Index_3 : IfxCpu_cfg.h

IfxCpu_Index_none : IfxCpu_cfg.h

IfxCpu_initCSA() : IfxCpu.h

IFXCPU_INTRINSICSGNUC_USE_MACHINE_INTRINSICS : IfxCpu_IntrinsicsGnuc.h

IfxCpu_invalidateProgramCache() : IfxCpu.h

IfxCpu_Irq_getTos() : IfxCpu_Irq.c , IfxCpu_Irq.h

IfxCpu_isAddressCachable() : IfxCpu.h

IfxCpu_mutexLock : IfxCpu.h

IFXCPU_NUM_MODULES : IfxCpu_cfg.h

IfxCpu_OverlayAddressMask : IfxCpu.h

IfxCpu_OverlayAddressMask_128byte : IfxCpu.h

IfxCpu_OverlayAddressMask_128KB : IfxCpu.h

IfxCpu_OverlayAddressMask_16KB : IfxCpu.h

IfxCpu_OverlayAddressMask_1KB : IfxCpu.h

IfxCpu_OverlayAddressMask_256byte : IfxCpu.h

IfxCpu_OverlayAddressMask_2KB : IfxCpu.h

IfxCpu_OverlayAddressMask_32byte : IfxCpu.h

IfxCpu_OverlayAddressMask_32KB : IfxCpu.h

IfxCpu_OverlayAddressMask_4KB : IfxCpu.h

IfxCpu_OverlayAddressMask_512byte : IfxCpu.h

IfxCpu_OverlayAddressMask_64byte : IfxCpu.h

IfxCpu_OverlayAddressMask_64KB : IfxCpu.h

IfxCpu_OverlayAddressMask_8KB : IfxCpu.h

IfxCpu_OverlayMemorySelect : IfxCpu.h

IfxCpu_OverlayMemorySelect_core0DsprPspr : IfxCpu.h

IfxCpu_OverlayMemorySelect_core1DsprPspr : IfxCpu.h

IfxCpu_OverlayMemorySelect_core2DsprPspr : IfxCpu.h

IfxCpu_OverlayMemorySelect_core3DsprPspr : IfxCpu.h

IfxCpu_OverlayMemorySelect_lmu : IfxCpu.h

IfxCpu_PMCSR_PMST : IfxCpu_cfg.h

IfxCpu_PMCSR_PMST_idleMode : IfxCpu_cfg.h

IfxCpu_PMCSR_PMST_idleModeRequest : IfxCpu_cfg.h

IfxCpu_PMCSR_PMST_normalMode : IfxCpu_cfg.h

IfxCpu_PMCSR_PMST_sleepModeRequest : IfxCpu_cfg.h

IfxCpu_PMCSR_PMST_standbyModeRequest : IfxCpu_cfg.h

IfxCpu_releaseMutex() : IfxCpu.c , IfxCpu.h

IfxCpu_resetAndStartCounters() : IfxCpu.h

IfxCpu_resetSpinLock() : IfxCpu.c , IfxCpu.h

IfxCpu_ResetStatus : IfxCpu.h

IfxCpu_ResetStatus_cpuResetBySmu : IfxCpu.h

IfxCpu_ResetStatus_cpuResetBySw : IfxCpu.h

IfxCpu_ResetStatus_notCpuReset : IfxCpu.h

IfxCpu_ResourceCpu : IfxCpu_cfg.h

IfxCpu_ResourceCpu_0 : IfxCpu_cfg.h

IfxCpu_ResourceCpu_1 : IfxCpu_cfg.h

IfxCpu_ResourceCpu_2 : IfxCpu_cfg.h

IfxCpu_ResourceCpu_3 : IfxCpu_cfg.h

IfxCpu_ResourceCpu_none : IfxCpu_cfg.h

IfxCpu_restoreInterrupts() : IfxCpu.h

IfxCpu_setAllIdleExceptMasterCpu() : IfxCpu.c , IfxCpu.h

IfxCpu_setCoreMode() : IfxCpu.c , IfxCpu.h

IfxCpu_setDataCache() : IfxCpu.h

IfxCpu_setPerformanceCountersEnableBit() : IfxCpu.h

IfxCpu_setProgramCache() : IfxCpu.h

IfxCpu_setProgramCounter() : IfxCpu.c , IfxCpu.h

IfxCpu_setSafetyTaskIdentifier() : IfxCpu.h

IfxCpu_setSpinLock() : IfxCpu.c , IfxCpu.h

IfxCpu_spinLock : IfxCpu.h

IfxCpu_startCore() : IfxCpu.c , IfxCpu.h

IfxCpu_stopCounters() : IfxCpu.h

IfxCpu_syncEvent : IfxCpu.h

IfxCpu_Trap_assertion() : IfxCpu_Trap.c

IfxCpu_Trap_Assertion_Id : IfxCpu_Trap.h

IfxCpu_Trap_Assertion_Id_arithmeticOverflow : IfxCpu_Trap.h

IfxCpu_Trap_Assertion_Id_stickyArithmeticOverflow : IfxCpu_Trap.h

IfxCpu_Trap_Bus_Id : IfxCpu_Trap.h

IfxCpu_Trap_Bus_Id_CoprocessorTrapAsynchronousError : IfxCpu_Trap.h

IfxCpu_Trap_Bus_Id_dataAccessAsynchronousError : IfxCpu_Trap.h

IfxCpu_Trap_Bus_Id_dataAccessSynchronousError : IfxCpu_Trap.h

IfxCpu_Trap_Bus_Id_dataMemoryIntegrityError : IfxCpu_Trap.h

IfxCpu_Trap_Bus_Id_programFetchSynchronousError : IfxCpu_Trap.h

IfxCpu_Trap_Bus_Id_programMemoryIntegrityError : IfxCpu_Trap.h

IfxCpu_Trap_Bus_Id_temporalAsynchronousError : IfxCpu_Trap.h

IfxCpu_Trap_busError() : IfxCpu_Trap.c

IfxCpu_Trap_Class : IfxCpu_Trap.h

IfxCpu_Trap_Class_assertion : IfxCpu_Trap.h

IfxCpu_Trap_Class_bus : IfxCpu_Trap.h

IfxCpu_Trap_Class_contextManagement : IfxCpu_Trap.h

IfxCpu_Trap_Class_instructionErrors : IfxCpu_Trap.h

IfxCpu_Trap_Class_internalProtection : IfxCpu_Trap.h

IfxCpu_Trap_Class_memoryManagement : IfxCpu_Trap.h

IfxCpu_Trap_Class_nonMaskableInterrupt : IfxCpu_Trap.h

IfxCpu_Trap_Class_systemCall : IfxCpu_Trap.h

IfxCpu_Trap_ContextManagement_Id : IfxCpu_Trap.h

IfxCpu_Trap_ContextManagement_Id_callDepthOverflow : IfxCpu_Trap.h

IfxCpu_Trap_ContextManagement_Id_callDepthUnderflow : IfxCpu_Trap.h

IfxCpu_Trap_ContextManagement_Id_callStackUnderflow : IfxCpu_Trap.h

IfxCpu_Trap_ContextManagement_Id_contextType : IfxCpu_Trap.h

IfxCpu_Trap_ContextManagement_Id_freeContextListDepletion : IfxCpu_Trap.h

IfxCpu_Trap_ContextManagement_Id_freeContextListUnderflow : IfxCpu_Trap.h

IfxCpu_Trap_ContextManagement_Id_nestingError : IfxCpu_Trap.h

IfxCpu_Trap_contextManagementError() : IfxCpu_Trap.c

IfxCpu_Trap_extractTrapInfo() : IfxCpu_Trap.c

IfxCpu_Trap_instructionError() : IfxCpu_Trap.c

IfxCpu_Trap_InstructionErrors_Id : IfxCpu_Trap.h

IfxCpu_Trap_InstructionErrors_Id_dataAddressAlignment : IfxCpu_Trap.h

IfxCpu_Trap_InstructionErrors_Id_illegalOpcode : IfxCpu_Trap.h

IfxCpu_Trap_InstructionErrors_Id_invalidMemoryAddress : IfxCpu_Trap.h

IfxCpu_Trap_InstructionErrors_Id_invalidOperand : IfxCpu_Trap.h

IfxCpu_Trap_InstructionErrors_Id_unimplementedOpcode : IfxCpu_Trap.h

IfxCpu_Trap_InternalProtection_Id : IfxCpu_Trap.h

IfxCpu_Trap_InternalProtection_Id_globalRegisterWriteProtection : IfxCpu_Trap.h

IfxCpu_Trap_InternalProtection_Id_memoryProtectionExecute : IfxCpu_Trap.h

IfxCpu_Trap_InternalProtection_Id_memoryProtectionNullAddress : IfxCpu_Trap.h

IfxCpu_Trap_InternalProtection_Id_memoryProtectionPeripheralAccess : IfxCpu_Trap.h

IfxCpu_Trap_InternalProtection_Id_memoryProtectionRead : IfxCpu_Trap.h

IfxCpu_Trap_InternalProtection_Id_memoryProtectionWrite : IfxCpu_Trap.h

IfxCpu_Trap_InternalProtection_Id_privilegeViolation : IfxCpu_Trap.h

IfxCpu_Trap_internalProtectionError() : IfxCpu_Trap.c

IfxCpu_Trap_MemoryManagement_Id : IfxCpu_Trap.h

IfxCpu_Trap_MemoryManagement_Id_virtualAddressFill : IfxCpu_Trap.h

IfxCpu_Trap_MemoryManagement_Id_virtualAddressProtection : IfxCpu_Trap.h

IfxCpu_Trap_memoryManagementError() : IfxCpu_Trap.c

IfxCpu_Trap_nonMaskableInterrupt() : IfxCpu_Trap.c

IfxCpu_Trap_NonMaskableInterrupt_Id : IfxCpu_Trap.h

IfxCpu_Trap_systemCall_Cpu0() : IfxCpu_Trap.c

IfxCpu_Trap_SystemCall_Id : IfxCpu_Trap.h

IfxCpu_Trap_vectorTable0() : IfxCpu_Trap.c

IfxCpu_triggerCpuReset() : IfxCpu.c , IfxCpu.h

IfxCpu_triggerSwReset() : IfxCpu.h

IfxCpu_updateClockCounter() : IfxCpu.h

IfxCpu_updateInstructionCounter() : IfxCpu.h

IfxCpu_updatePerformanceCounter() : IfxCpu.h

IfxCpu_waitEvent() : IfxCpu.c , IfxCpu.h

IfxDma_BusMasterMode : IfxDma.h

IfxDma_BusMasterMode_supervisor : IfxDma.h

IfxDma_BusMasterMode_user : IfxDma.h

IfxDma_ChannelBusPriority : IfxDma.h

IfxDma_ChannelBusPriority_high : IfxDma.h

IfxDma_ChannelBusPriority_low : IfxDma.h

IfxDma_ChannelBusPriority_medium : IfxDma.h

IfxDma_ChannelId : IfxDma_cfg.h

IfxDma_ChannelId_0 : IfxDma_cfg.h

IfxDma_ChannelId_1 : IfxDma_cfg.h

IfxDma_ChannelId_10 : IfxDma_cfg.h

IfxDma_ChannelId_100 : IfxDma_cfg.h

IfxDma_ChannelId_101 : IfxDma_cfg.h

IfxDma_ChannelId_102 : IfxDma_cfg.h

IfxDma_ChannelId_103 : IfxDma_cfg.h

IfxDma_ChannelId_104 : IfxDma_cfg.h

IfxDma_ChannelId_105 : IfxDma_cfg.h

IfxDma_ChannelId_106 : IfxDma_cfg.h

IfxDma_ChannelId_107 : IfxDma_cfg.h

IfxDma_ChannelId_108 : IfxDma_cfg.h

IfxDma_ChannelId_109 : IfxDma_cfg.h

IfxDma_ChannelId_11 : IfxDma_cfg.h

IfxDma_ChannelId_110 : IfxDma_cfg.h

IfxDma_ChannelId_111 : IfxDma_cfg.h

IfxDma_ChannelId_112 : IfxDma_cfg.h

IfxDma_ChannelId_113 : IfxDma_cfg.h

IfxDma_ChannelId_114 : IfxDma_cfg.h

IfxDma_ChannelId_115 : IfxDma_cfg.h

IfxDma_ChannelId_116 : IfxDma_cfg.h

IfxDma_ChannelId_117 : IfxDma_cfg.h

IfxDma_ChannelId_118 : IfxDma_cfg.h

IfxDma_ChannelId_119 : IfxDma_cfg.h

IfxDma_ChannelId_12 : IfxDma_cfg.h

IfxDma_ChannelId_120 : IfxDma_cfg.h

IfxDma_ChannelId_121 : IfxDma_cfg.h

IfxDma_ChannelId_122 : IfxDma_cfg.h

IfxDma_ChannelId_123 : IfxDma_cfg.h

IfxDma_ChannelId_124 : IfxDma_cfg.h

IfxDma_ChannelId_125 : IfxDma_cfg.h

IfxDma_ChannelId_126 : IfxDma_cfg.h

IfxDma_ChannelId_127 : IfxDma_cfg.h

IfxDma_ChannelId_13 : IfxDma_cfg.h

IfxDma_ChannelId_14 : IfxDma_cfg.h

IfxDma_ChannelId_15 : IfxDma_cfg.h

IfxDma_ChannelId_16 : IfxDma_cfg.h

IfxDma_ChannelId_17 : IfxDma_cfg.h

IfxDma_ChannelId_18 : IfxDma_cfg.h

IfxDma_ChannelId_19 : IfxDma_cfg.h

IfxDma_ChannelId_2 : IfxDma_cfg.h

IfxDma_ChannelId_20 : IfxDma_cfg.h

IfxDma_ChannelId_21 : IfxDma_cfg.h

IfxDma_ChannelId_22 : IfxDma_cfg.h

IfxDma_ChannelId_23 : IfxDma_cfg.h

IfxDma_ChannelId_24 : IfxDma_cfg.h

IfxDma_ChannelId_25 : IfxDma_cfg.h

IfxDma_ChannelId_26 : IfxDma_cfg.h

IfxDma_ChannelId_27 : IfxDma_cfg.h

IfxDma_ChannelId_28 : IfxDma_cfg.h

IfxDma_ChannelId_29 : IfxDma_cfg.h

IfxDma_ChannelId_3 : IfxDma_cfg.h

IfxDma_ChannelId_30 : IfxDma_cfg.h

IfxDma_ChannelId_31 : IfxDma_cfg.h

IfxDma_ChannelId_32 : IfxDma_cfg.h

IfxDma_ChannelId_33 : IfxDma_cfg.h

IfxDma_ChannelId_34 : IfxDma_cfg.h

IfxDma_ChannelId_35 : IfxDma_cfg.h

IfxDma_ChannelId_36 : IfxDma_cfg.h

IfxDma_ChannelId_37 : IfxDma_cfg.h

IfxDma_ChannelId_38 : IfxDma_cfg.h

IfxDma_ChannelId_39 : IfxDma_cfg.h

IfxDma_ChannelId_4 : IfxDma_cfg.h

IfxDma_ChannelId_40 : IfxDma_cfg.h

IfxDma_ChannelId_41 : IfxDma_cfg.h

IfxDma_ChannelId_42 : IfxDma_cfg.h

IfxDma_ChannelId_43 : IfxDma_cfg.h

IfxDma_ChannelId_44 : IfxDma_cfg.h

IfxDma_ChannelId_45 : IfxDma_cfg.h

IfxDma_ChannelId_46 : IfxDma_cfg.h

IfxDma_ChannelId_47 : IfxDma_cfg.h

IfxDma_ChannelId_48 : IfxDma_cfg.h

IfxDma_ChannelId_49 : IfxDma_cfg.h

IfxDma_ChannelId_5 : IfxDma_cfg.h

IfxDma_ChannelId_50 : IfxDma_cfg.h

IfxDma_ChannelId_51 : IfxDma_cfg.h

IfxDma_ChannelId_52 : IfxDma_cfg.h

IfxDma_ChannelId_53 : IfxDma_cfg.h

IfxDma_ChannelId_54 : IfxDma_cfg.h

IfxDma_ChannelId_55 : IfxDma_cfg.h

IfxDma_ChannelId_56 : IfxDma_cfg.h

IfxDma_ChannelId_57 : IfxDma_cfg.h

IfxDma_ChannelId_58 : IfxDma_cfg.h

IfxDma_ChannelId_59 : IfxDma_cfg.h

IfxDma_ChannelId_6 : IfxDma_cfg.h

IfxDma_ChannelId_60 : IfxDma_cfg.h

IfxDma_ChannelId_61 : IfxDma_cfg.h

IfxDma_ChannelId_62 : IfxDma_cfg.h

IfxDma_ChannelId_63 : IfxDma_cfg.h

IfxDma_ChannelId_64 : IfxDma_cfg.h

IfxDma_ChannelId_65 : IfxDma_cfg.h

IfxDma_ChannelId_66 : IfxDma_cfg.h

IfxDma_ChannelId_67 : IfxDma_cfg.h

IfxDma_ChannelId_68 : IfxDma_cfg.h

IfxDma_ChannelId_69 : IfxDma_cfg.h

IfxDma_ChannelId_7 : IfxDma_cfg.h

IfxDma_ChannelId_70 : IfxDma_cfg.h

IfxDma_ChannelId_71 : IfxDma_cfg.h

IfxDma_ChannelId_72 : IfxDma_cfg.h

IfxDma_ChannelId_73 : IfxDma_cfg.h

IfxDma_ChannelId_74 : IfxDma_cfg.h

IfxDma_ChannelId_75 : IfxDma_cfg.h

IfxDma_ChannelId_76 : IfxDma_cfg.h

IfxDma_ChannelId_77 : IfxDma_cfg.h

IfxDma_ChannelId_78 : IfxDma_cfg.h

IfxDma_ChannelId_79 : IfxDma_cfg.h

IfxDma_ChannelId_8 : IfxDma_cfg.h

IfxDma_ChannelId_80 : IfxDma_cfg.h

IfxDma_ChannelId_81 : IfxDma_cfg.h

IfxDma_ChannelId_82 : IfxDma_cfg.h

IfxDma_ChannelId_83 : IfxDma_cfg.h

IfxDma_ChannelId_84 : IfxDma_cfg.h

IfxDma_ChannelId_85 : IfxDma_cfg.h

IfxDma_ChannelId_86 : IfxDma_cfg.h

IfxDma_ChannelId_87 : IfxDma_cfg.h

IfxDma_ChannelId_88 : IfxDma_cfg.h

IfxDma_ChannelId_89 : IfxDma_cfg.h

IfxDma_ChannelId_9 : IfxDma_cfg.h

IfxDma_ChannelId_90 : IfxDma_cfg.h

IfxDma_ChannelId_91 : IfxDma_cfg.h

IfxDma_ChannelId_92 : IfxDma_cfg.h

IfxDma_ChannelId_93 : IfxDma_cfg.h

IfxDma_ChannelId_94 : IfxDma_cfg.h

IfxDma_ChannelId_95 : IfxDma_cfg.h

IfxDma_ChannelId_96 : IfxDma_cfg.h

IfxDma_ChannelId_97 : IfxDma_cfg.h

IfxDma_ChannelId_98 : IfxDma_cfg.h

IfxDma_ChannelId_99 : IfxDma_cfg.h

IfxDma_ChannelId_none : IfxDma_cfg.h

IfxDma_ChannelIncrementCircular : IfxDma.h

IfxDma_ChannelIncrementCircular_1024 : IfxDma.h

IfxDma_ChannelIncrementCircular_128 : IfxDma.h

IfxDma_ChannelIncrementCircular_16 : IfxDma.h

IfxDma_ChannelIncrementCircular_16384 : IfxDma.h

IfxDma_ChannelIncrementCircular_2 : IfxDma.h

IfxDma_ChannelIncrementCircular_2048 : IfxDma.h

IfxDma_ChannelIncrementCircular_256 : IfxDma.h

IfxDma_ChannelIncrementCircular_32 : IfxDma.h

IfxDma_ChannelIncrementCircular_32768 : IfxDma.h

IfxDma_ChannelIncrementCircular_4 : IfxDma.h

IfxDma_ChannelIncrementCircular_4096 : IfxDma.h

IfxDma_ChannelIncrementCircular_512 : IfxDma.h

IfxDma_ChannelIncrementCircular_64 : IfxDma.h

IfxDma_ChannelIncrementCircular_8 : IfxDma.h

IfxDma_ChannelIncrementCircular_8192 : IfxDma.h

IfxDma_ChannelIncrementCircular_none : IfxDma.h

IfxDma_ChannelIncrementDirection : IfxDma.h

IfxDma_ChannelIncrementDirection_negative : IfxDma.h

IfxDma_ChannelIncrementDirection_positive : IfxDma.h

IfxDma_ChannelIncrementStep : IfxDma.h

IfxDma_ChannelIncrementStep_1 : IfxDma.h

IfxDma_ChannelIncrementStep_128 : IfxDma.h

IfxDma_ChannelIncrementStep_16 : IfxDma.h

IfxDma_ChannelIncrementStep_2 : IfxDma.h

IfxDma_ChannelIncrementStep_32 : IfxDma.h

IfxDma_ChannelIncrementStep_4 : IfxDma.h

IfxDma_ChannelIncrementStep_64 : IfxDma.h

IfxDma_ChannelIncrementStep_8 : IfxDma.h

IfxDma_ChannelInterruptControl : IfxDma.h

IfxDma_ChannelInterruptControl_thresholdLimitMatch : IfxDma.h

IfxDma_ChannelInterruptControl_transferCountDecremented : IfxDma.h

IfxDma_ChannelMove : IfxDma.h

IfxDma_ChannelMove_1 : IfxDma.h

IfxDma_ChannelMove_16 : IfxDma.h

IfxDma_ChannelMove_2 : IfxDma.h

IfxDma_ChannelMove_3 : IfxDma.h

IfxDma_ChannelMove_4 : IfxDma.h

IfxDma_ChannelMove_5 : IfxDma.h

IfxDma_ChannelMove_8 : IfxDma.h

IfxDma_ChannelMove_9 : IfxDma.h

IfxDma_ChannelMoveSize : IfxDma.h

IfxDma_ChannelMoveSize_128bit : IfxDma.h

IfxDma_ChannelMoveSize_16bit : IfxDma.h

IfxDma_ChannelMoveSize_256bit : IfxDma.h

IfxDma_ChannelMoveSize_32bit : IfxDma.h

IfxDma_ChannelMoveSize_64bit : IfxDma.h

IfxDma_ChannelMoveSize_8bit : IfxDma.h

IfxDma_ChannelOperationMode : IfxDma.h

IfxDma_ChannelOperationMode_continuous : IfxDma.h

IfxDma_ChannelOperationMode_single : IfxDma.h

IfxDma_ChannelPattern : IfxDma.h

IfxDma_ChannelPattern_0_disable : IfxDma.h

IfxDma_ChannelPattern_0_mode1 : IfxDma.h

IfxDma_ChannelPattern_0_mode2 : IfxDma.h

IfxDma_ChannelPattern_0_mode3 : IfxDma.h

IfxDma_ChannelPattern_1_disable : IfxDma.h

IfxDma_ChannelPattern_1_mode1 : IfxDma.h

IfxDma_ChannelPattern_1_mode2 : IfxDma.h

IfxDma_ChannelPattern_1_mode3 : IfxDma.h

IfxDma_ChannelPriority : IfxDma.h

IfxDma_ChannelPriority_high : IfxDma.h

IfxDma_ChannelPriority_low : IfxDma.h

IfxDma_ChannelPriority_medium : IfxDma.h

IfxDma_ChannelRequestMode : IfxDma.h

IfxDma_ChannelRequestMode_completeTransactionPerRequest : IfxDma.h

IfxDma_ChannelRequestMode_oneTransferPerRequest : IfxDma.h

IfxDma_ChannelRequestSource : IfxDma.h

IfxDma_ChannelRequestSource_daisyChain : IfxDma.h

IfxDma_ChannelRequestSource_peripheral : IfxDma.h

IfxDma_ChannelShadow : IfxDma.h

IfxDma_ChannelShadow_accumulatedLinkedList : IfxDma.h

IfxDma_ChannelShadow_conditionalLinkedList : IfxDma.h

IfxDma_ChannelShadow_doubleDestinationBufferingHwSwSwitch : IfxDma.h

IfxDma_ChannelShadow_doubleDestinationBufferingSwSwitch : IfxDma.h

IfxDma_ChannelShadow_doubleSourceBufferingHwSwSwitch : IfxDma.h

IfxDma_ChannelShadow_doubleSourceBufferingSwSwitch : IfxDma.h

IfxDma_ChannelShadow_dst : IfxDma.h

IfxDma_ChannelShadow_dstDirectWrite : IfxDma.h

IfxDma_ChannelShadow_linkedList : IfxDma.h

IfxDma_ChannelShadow_none : IfxDma.h

IfxDma_ChannelShadow_safeLinkedList : IfxDma.h

IfxDma_ChannelShadow_src : IfxDma.h

IfxDma_ChannelShadow_srcDirectWrite : IfxDma.h

IfxDma_clearChannelHalt() : IfxDma.h

IfxDma_clearChannelInterrupt() : IfxDma.h

IfxDma_clearChannelTransactionRequestLost() : IfxDma.h

IfxDma_clearErrorFlags() : IfxDma.h

IfxDma_disableChannelInterrupt() : IfxDma.h

IfxDma_disableChannelTransaction() : IfxDma.h

IfxDma_disableChannelTransactionLostError() : IfxDma.h

IfxDma_disableMoveEngineDestinationError() : IfxDma.h

IfxDma_disableMoveEngineSourceError() : IfxDma.h

IfxDma_Dma_clearChannelInterrupt() : IfxDma_Dma.h

IfxDma_Dma_configureTransactionSet() : IfxDma_Dma.c

IfxDma_Dma_createModuleHandle() : IfxDma_Dma.c , IfxDma_Dma.h

IfxDma_Dma_deInitChannel() : IfxDma_Dma.c , IfxDma_Dma.h

IfxDma_Dma_getAndClearChannelInterrupt() : IfxDma_Dma.h

IfxDma_Dma_getChannelInterrupt() : IfxDma_Dma.h

IfxDma_Dma_getSrcPointer() : IfxDma_Dma.h

IfxDma_Dma_initChannel() : IfxDma_Dma.c , IfxDma_Dma.h

IfxDma_Dma_initChannelConfig() : IfxDma_Dma.c , IfxDma_Dma.h

IfxDma_Dma_initLinkedListEntry() : IfxDma_Dma.c , IfxDma_Dma.h

IfxDma_Dma_initModule() : IfxDma_Dma.c , IfxDma_Dma.h

IfxDma_Dma_initModuleConfig() : IfxDma_Dma.c , IfxDma_Dma.h

IfxDma_Dma_isChannelTransactionPending() : IfxDma_Dma.h

IfxDma_Dma_setChannelDestinationAddress() : IfxDma_Dma.h

IfxDma_Dma_setChannelSourceAddress() : IfxDma_Dma.h

IfxDma_Dma_setChannelTransferCount() : IfxDma_Dma.h

IfxDma_Dma_startChannelTransaction() : IfxDma_Dma.h

IfxDma_enableChannelInterrupt() : IfxDma.h

IfxDma_enableChannelTransaction() : IfxDma.h

IfxDma_enableChannelTransactionLostError() : IfxDma.h

IfxDma_enableDestinationCircularBuffer() : IfxDma.h

IfxDma_enableMoveEngineDestinationError() : IfxDma.h

IfxDma_enableMoveEngineSourceError() : IfxDma.h

IfxDma_enableSourceCircularBuffer() : IfxDma.h

IfxDma_enableSwapDataByte() : IfxDma.h

IFXDMA_ERROR_D : IfxDma_cfg.h

IFXDMA_ERROR_DLL : IfxDma_cfg.h

IFXDMA_ERROR_RAM : IfxDma_cfg.h

IFXDMA_ERROR_S : IfxDma_cfg.h

IFXDMA_ERROR_SLL : IfxDma_cfg.h

IFXDMA_ERROR_SPB : IfxDma_cfg.h

IFXDMA_ERROR_SRI : IfxDma_cfg.h

IfxDma_getAndClearChannelInterrupt() : IfxDma.h

IfxDma_getAndClearChannelPatternDetectionInterrupt() : IfxDma.h

IfxDma_getAndClearChannelWrapDestinationBufferInterrupt() : IfxDma.h

IfxDma_getAndClearChannelWrapSourceBufferInterrupt() : IfxDma.h

IfxDma_getChannelDestinationAddress() : IfxDma.h

IfxDma_getChannelHalt() : IfxDma.h

IfxDma_getChannelInterrupt() : IfxDma.h

IfxDma_getChannelPatternDetectionOldValue() : IfxDma.h

IfxDma_getChannelSourceAddress() : IfxDma.h

IfxDma_getChannelSuspendModeStatus() : IfxDma.h

IfxDma_getChannelTransactionRequestLost() : IfxDma.h

IfxDma_getChannelTransferCount() : IfxDma.h

IfxDma_getCircularRangeCode() : IfxDma.h

IfxDma_getDataCRC() : IfxDma.h

IfxDma_getDoubleBufferRead() : IfxDma.h

IfxDma_getDoubleBufferSelection() : IfxDma.h

IfxDma_getErrorFlags() : IfxDma.h

IfxDma_getErrPointer() : IfxDma.h

IfxDma_getSourceAndDestinationCRC() : IfxDma.h

IfxDma_getSrcPointer() : IfxDma.h

IfxDma_getTimestamp() : IfxDma.h

IfxDma_HardwareResourcePartition : IfxDma.h

IfxDma_HardwareResourcePartition_0 : IfxDma.h

IfxDma_HardwareResourcePartition_1 : IfxDma.h

IfxDma_HardwareResourcePartition_2 : IfxDma.h

IfxDma_HardwareResourcePartition_3 : IfxDma.h

IfxDma_isChannelReset() : IfxDma.h

IfxDma_isChannelTransactionEnabled() : IfxDma.h

IfxDma_isChannelTransactionPending() : IfxDma.h

IfxDma_keepDoubleBufferActive() : IfxDma.h

IfxDma_MoveEngine : IfxDma.h

IfxDma_MoveEngine_0 : IfxDma.h

IfxDma_MoveEngine_1 : IfxDma.h

IFXDMA_NUM_CHANNELS : IfxDma_cfg.h

IFXDMA_NUM_MODULES : IfxDma_cfg.h

IfxDma_resetChannel() : IfxDma.h

IfxDma_setChannelBlockMode() : IfxDma.h

IfxDma_setChannelContinuousMode() : IfxDma.h

IfxDma_setChannelDestinationAddress() : IfxDma.h

IfxDma_setChannelDestinationIncrementStep() : IfxDma.h

IfxDma_setChannelHalt() : IfxDma.h

IfxDma_setChannelHardwareResourcePartition() : IfxDma.h

IfxDma_setChannelInterruptServiceRequest() : IfxDma.h

IfxDma_setChannelMoveSize() : IfxDma.h

IfxDma_setChannelShadow() : IfxDma.h

IfxDma_setChannelSingleMode() : IfxDma.h

IfxDma_setChannelSingleTransaction() : IfxDma.h

IfxDma_setChannelSingleTransfer() : IfxDma.h

IfxDma_setChannelSourceAddress() : IfxDma.h

IfxDma_setChannelSourceIncrementStep() : IfxDma.h

IfxDma_setChannelSuspendEnable() : IfxDma.h

IfxDma_setChannelTransferCount() : IfxDma.h

IfxDma_setCircularBufferDestinationLength() : IfxDma.h

IfxDma_setCircularBufferSourceLength() : IfxDma.h

IfxDma_setInterruptControlValue() : IfxDma.h

IfxDma_setSleepMode() : IfxDma.h

IfxDma_SleepMode : IfxDma.h

IfxDma_SleepMode_disable : IfxDma.h

IfxDma_SleepMode_enable : IfxDma.h

IfxDma_startChannelTransaction() : IfxDma.h

IfxDma_switchDoubleBuffer() : IfxDma.h

IfxDma_writeChannelShadowDisable() : IfxDma.h

IfxDma_writeChannelShadowEnable() : IfxDma.h

IfxDmu_Fdest_In_pinTable : IfxDmu_PinMap.c , IfxDmu_PinMap.h

IfxDmu_FDEST_P21_0_IN : IfxDmu_PinMap.c , IfxDmu_PinMap.h

IFXDMU_PINMAP_FDEST_IN_NUM_ITEMS : IfxDmu_PinMap.h

IFXDMU_PINMAP_NUM_0S : IfxDmu_PinMap.h

IFXDMU_PINMAP_NUM_MODULES : IfxDmu_PinMap.h

IFXDTS_DEFAULT_TEMPERATURELIMIT_LOW : IfxDts_cfg.h

IFXDTS_DEFAULT_TEMPERATURELIMIT_UPPER : IfxDts_cfg.h

IfxDts_Dts_convertFromCelsius() : IfxDts_Dts.c , IfxDts_Dts.h

IfxDts_Dts_convertToCelsius() : IfxDts_Dts.c , IfxDts_Dts.h

IfxDts_Dts_getTemperatureCelsius() : IfxDts_Dts.h

IfxDts_Dts_getTemperatureValue() : IfxDts_Dts.h

IfxDts_Dts_initModule() : IfxDts_Dts.c , IfxDts_Dts.h

IfxDts_Dts_initModuleConfig() : IfxDts_Dts.c , IfxDts_Dts.h

IfxDts_getSrcPointer() : IfxDts.h

IfxDts_getTemperatureValue() : IfxDts.h

IFXDTS_NUM_MODULES : IfxDts_cfg.h

IfxEdsadc_AnalogClockSyncDelay : IfxEdsadc.h

IfxEdsadc_AnalogClockSyncDelay_cycleDelay1 : IfxEdsadc.h

IfxEdsadc_AnalogClockSyncDelay_cycleDelay2 : IfxEdsadc.h

IfxEdsadc_AnalogClockSyncDelay_cycleDelay3 : IfxEdsadc.h

IfxEdsadc_AnalogClockSyncDelay_cycleDelay4 : IfxEdsadc.h

IfxEdsadc_AnalogClockSyncDelay_cycleDelay5 : IfxEdsadc.h

IfxEdsadc_AnalogClockSyncDelay_cycleDelay6 : IfxEdsadc.h

IfxEdsadc_AnalogClockSyncDelay_cycleDelay7 : IfxEdsadc.h

IfxEdsadc_AnalogClockSyncDelay_noDelay : IfxEdsadc.h

IfxEdsadc_AnalogMux : IfxEdsadc.h

IfxEdsadc_AnalogMux_copyAmx : IfxEdsadc.h

IfxEdsadc_AnalogMux_doNotCopyAmx : IfxEdsadc.h

IfxEdsadc_AuxServiceRequest : IfxEdsadc.h

IfxEdsadc_AuxServiceRequest_altSource : IfxEdsadc.h

IfxEdsadc_AuxServiceRequest_compEvent : IfxEdsadc.h

IfxEdsadc_AuxServiceRequest_never : IfxEdsadc.h

IfxEdsadc_AuxServiceRequest_timestampEvent : IfxEdsadc.h

IfxEdsadc_CarrierWaveformMode : IfxEdsadc.h

IfxEdsadc_CarrierWaveformMode_sine : IfxEdsadc.h

IfxEdsadc_CarrierWaveformMode_square : IfxEdsadc.h

IfxEdsadc_CarrierWaveformMode_stopped : IfxEdsadc.h

IfxEdsadc_CarrierWaveformMode_triangle : IfxEdsadc.h

IfxEdsadc_Cgpwm_Out_pinTable : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_CGPWMN_P00_5_OUT : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_CGPWMN_P02_0_OUT : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_CGPWMN_P33_11_OUT : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_CGPWMP_P00_6_OUT : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_CGPWMP_P02_1_OUT : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_CGPWMP_P33_12_OUT : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_ChannelId : IfxEdsadc_cfg.h

IfxEdsadc_ChannelId_0 : IfxEdsadc_cfg.h

IfxEdsadc_ChannelId_1 : IfxEdsadc_cfg.h

IfxEdsadc_ChannelId_2 : IfxEdsadc_cfg.h

IfxEdsadc_ChannelId_3 : IfxEdsadc_cfg.h

IfxEdsadc_ChannelId_4 : IfxEdsadc_cfg.h

IfxEdsadc_ChannelId_5 : IfxEdsadc_cfg.h

IfxEdsadc_ChannelId_6 : IfxEdsadc_cfg.h

IfxEdsadc_ChannelId_7 : IfxEdsadc_cfg.h

IfxEdsadc_ChannelId_8 : IfxEdsadc_cfg.h

IfxEdsadc_ChannelId_9 : IfxEdsadc_cfg.h

IfxEdsadc_CommonModeHoldVoltage : IfxEdsadc.h

IfxEdsadc_CommonModeHoldVoltage_disable : IfxEdsadc.h

IfxEdsadc_CommonModeHoldVoltage_enable : IfxEdsadc.h

IfxEdsadc_configureModulator() : IfxEdsadc.c , IfxEdsadc.h

IfxEdsadc_DataRead : IfxEdsadc.h

IfxEdsadc_DataRead_double : IfxEdsadc.h

IfxEdsadc_DataRead_signOnHighbit : IfxEdsadc.h

IfxEdsadc_DataRead_timestampOnHighbit : IfxEdsadc.h

IfxEdsadc_DataStream : IfxEdsadc.h

IfxEdsadc_DataStream_directFallingClockEdge : IfxEdsadc.h

IfxEdsadc_DataStream_directRisingClockEdge : IfxEdsadc.h

IfxEdsadc_DataStream_doubleDataClockEdge : IfxEdsadc.h

IfxEdsadc_DataStream_onChipModulator : IfxEdsadc.h

IfxEdsadc_DataStream_secondFallingClockEdge : IfxEdsadc.h

IfxEdsadc_DataStream_secondRisingClockEdge : IfxEdsadc.h

IfxEdsadc_disableModule() : IfxEdsadc.c , IfxEdsadc.h

IfxEdsadc_dithering : IfxEdsadc.h

IfxEdsadc_dithering_disabled : IfxEdsadc.h

IfxEdsadc_dithering_enabled : IfxEdsadc.h

IfxEdsadc_DitheringIntensity : IfxEdsadc.h

IfxEdsadc_DitheringIntensity_high : IfxEdsadc.h

IfxEdsadc_DitheringIntensity_low : IfxEdsadc.h

IfxEdsadc_DitheringIntensity_medium : IfxEdsadc.h

IfxEdsadc_DitheringIntensity_minimum : IfxEdsadc.h

IfxEdsadc_DS0NA_AN3_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DS0NB_AN13_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DS0PA_AN2_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DS0PB_AN12_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DS1NA_P40_7_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DS1NB_P40_9_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DS1NC_AN45_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DS1ND_AN47_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DS1PA_P40_6_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DS1PB_P40_8_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DS1PC_AN44_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DS1PD_AN46_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DS2NA_AN21_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DS2NB_P40_1_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DS2PA_AN20_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DS2PB_P40_0_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DS3NA_AN1_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DS3NB_AN15_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DS3PA_AN0_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DS3PB_AN14_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DS4NA_P00_7_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DS4NB_P00_9_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DS4PA_P00_8_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DS4PB_P00_10_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DS5NA_P00_1_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DS5NB_P00_3_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DS5PA_P00_2_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DS5PB_P00_4_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DS6NA_AN53_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DS6NB_P41_5_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DS6PA_AN52_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DS6PB_P41_4_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DS7NA_AN61_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DS7NB_P41_7_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DS7PA_AN60_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DS7PB_P41_6_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DS8NA_P41_1_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DS8PA_P41_0_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DS9NA_AN51_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DS9NB_P41_3_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DS9PA_AN50_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DS9PB_P41_2_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DSCIN0A_P00_11_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DSCIN0B_P33_5_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DSCIN1A_P00_9_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DSCIN1B_P33_3_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DSCIN2A_P00_5_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DSCIN2B_P33_1_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DSCIN3A_P00_3_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DSCIN3B_P02_7_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DSCIN4A_P00_7_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DSCIN4B_P02_5_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DSCIN5A_P00_1_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DSCIN5B_P02_3_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DSCIN6A_P00_14_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DSCIN7A_P01_2_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DSCIN7B_P00_1_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DSCIN8A_P01_5_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DSCIN9A_P01_9_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_Dscin_In_pinTable : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DSCOUT0_P00_11_OUT : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DSCOUT0_P33_5_OUT : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DSCOUT1_P00_9_OUT : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DSCOUT1_P33_3_OUT : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DSCOUT2_P00_5_OUT : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DSCOUT2_P33_1_OUT : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DSCOUT3_P00_3_OUT : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DSCOUT3_P02_7_OUT : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DSCOUT4_P00_7_OUT : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DSCOUT4_P02_5_OUT : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DSCOUT5_P00_1_OUT : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DSCOUT5_P02_3_OUT : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DSCOUT6_P00_14_OUT : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DSCOUT7_P00_1_OUT : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DSCOUT7_P01_2_OUT : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DSCOUT8_P01_5_OUT : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DSCOUT9_P01_9_OUT : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_Dscout_Out_pinTable : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DSDIN0A_P00_12_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DSDIN0B_P33_6_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DSDIN1A_P00_10_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DSDIN1B_P33_4_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DSDIN2A_P00_6_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DSDIN2B_P33_2_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DSDIN3A_P00_4_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DSDIN3B_P02_8_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DSDIN4A_P00_8_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DSDIN4B_P02_6_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DSDIN5A_P00_2_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DSDIN5B_P02_4_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DSDIN6A_P00_13_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DSDIN7A_P01_15_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DSDIN7B_P00_2_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DSDIN8A_P01_6_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_DSDIN9A_P01_8_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_Dsdin_In_pinTable : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_Dsn_In_pinTable : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_Dsp_In_pinTable : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_Edsadc_calcDIVCG() : IfxEdsadc_Edsadc.c

IfxEdsadc_Edsadc_calcDIVM() : IfxEdsadc_Edsadc.c

IfxEdsadc_Edsadc_getAuxSrc() : IfxEdsadc_Edsadc.h

IfxEdsadc_Edsadc_getMainResult() : IfxEdsadc_Edsadc.h

IfxEdsadc_Edsadc_getMainSrc() : IfxEdsadc_Edsadc.h

IfxEdsadc_Edsadc_getSubsequentResult() : IfxEdsadc_Edsadc.h

IfxEdsadc_Edsadc_initCarrierGen() : IfxEdsadc_Edsadc.c , IfxEdsadc_Edsadc.h

IfxEdsadc_Edsadc_initCarrierGenConfig() : IfxEdsadc_Edsadc.c , IfxEdsadc_Edsadc.h

IfxEdsadc_Edsadc_initChannel() : IfxEdsadc_Edsadc.c , IfxEdsadc_Edsadc.h

IfxEdsadc_Edsadc_initChannelConfig() : IfxEdsadc_Edsadc.c , IfxEdsadc_Edsadc.h

IfxEdsadc_Edsadc_initCombFilter() : IfxEdsadc_Edsadc.c , IfxEdsadc_Edsadc.h

IfxEdsadc_Edsadc_initCommonModeVoltage() : IfxEdsadc_Edsadc.h

IfxEdsadc_Edsadc_initDemodulator() : IfxEdsadc_Edsadc.c , IfxEdsadc_Edsadc.h

IfxEdsadc_Edsadc_initFirFilter() : IfxEdsadc_Edsadc.c , IfxEdsadc_Edsadc.h

IfxEdsadc_Edsadc_initIntegrator() : IfxEdsadc_Edsadc.c , IfxEdsadc_Edsadc.h

IfxEdsadc_Edsadc_initModulator() : IfxEdsadc_Edsadc.c , IfxEdsadc_Edsadc.h

IfxEdsadc_Edsadc_initModule() : IfxEdsadc_Edsadc.c , IfxEdsadc_Edsadc.h

IfxEdsadc_Edsadc_initModuleConfig() : IfxEdsadc_Edsadc.c , IfxEdsadc_Edsadc.h

IfxEdsadc_Edsadc_initRectifier() : IfxEdsadc_Edsadc.c , IfxEdsadc_Edsadc.h

IfxEdsadc_Edsadc_initTimeStampCounter() : IfxEdsadc_Edsadc.h

IfxEdsadc_Edsadc_setGainCorrectionFactor() : IfxEdsadc_Edsadc.h

IfxEdsadc_Edsadc_startScan() : IfxEdsadc_Edsadc.h

IfxEdsadc_Edsadc_stopScan() : IfxEdsadc_Edsadc.h

IfxEdsadc_enableModule() : IfxEdsadc.c , IfxEdsadc.h

IfxEdsadc_EventSelect : IfxEdsadc.h

IfxEdsadc_EventSelect_everyNewResult : IfxEdsadc.h

IfxEdsadc_EventSelect_insideBoundry : IfxEdsadc.h

IfxEdsadc_EventSelect_outsideBoundry : IfxEdsadc.h

IfxEdsadc_FilterRunTimeInputCycle : IfxEdsadc.h

IfxEdsadc_FilterRunTimeInputCycle_16 : IfxEdsadc.h

IfxEdsadc_FilterRunTimeInputCycle_2 : IfxEdsadc.h

IfxEdsadc_FilterRunTimeInputCycle_4 : IfxEdsadc.h

IfxEdsadc_FilterRunTimeInputCycle_8 : IfxEdsadc.h

IfxEdsadc_FilterStrength : IfxEdsadc.h

IfxEdsadc_FilterStrength_maximum : IfxEdsadc.h

IfxEdsadc_FilterStrength_medium : IfxEdsadc.h

IfxEdsadc_FilterStrength_minimum : IfxEdsadc.h

IfxEdsadc_FilterStrength_weak : IfxEdsadc.h

IfxEdsadc_FractionalRefVoltage : IfxEdsadc.h

IfxEdsadc_FractionalRefVoltage_disable : IfxEdsadc.h

IfxEdsadc_FractionalRefVoltage_enable : IfxEdsadc.h

IfxEdsadc_FractionalRefVoltageSelection : IfxEdsadc.h

IfxEdsadc_FractionalRefVoltageSelection_div16 : IfxEdsadc.h

IfxEdsadc_FractionalRefVoltageSelection_div2 : IfxEdsadc.h

IfxEdsadc_FractionalRefVoltageSelection_div4 : IfxEdsadc.h

IfxEdsadc_FractionalRefVoltageSelection_div8 : IfxEdsadc.h

IfxEdsadc_getAuxSrc() : IfxEdsadc.c , IfxEdsadc.h

IfxEdsadc_getIntegratorOutFreq() : IfxEdsadc.c , IfxEdsadc.h

IfxEdsadc_getMainCombDecimation() : IfxEdsadc.h

IfxEdsadc_getMainCombOutFreq() : IfxEdsadc.c , IfxEdsadc.h

IfxEdsadc_getMainGroupDelay() : IfxEdsadc.c , IfxEdsadc.h

IfxEdsadc_getMainResult() : IfxEdsadc.h

IfxEdsadc_getMainSrc() : IfxEdsadc.c , IfxEdsadc.h

IfxEdsadc_getModulatorClockFreq() : IfxEdsadc.c , IfxEdsadc.h

IfxEdsadc_getModulatorInputClockFreq() : IfxEdsadc.c , IfxEdsadc.h

IfxEdsadc_getNegativeInputLineConfiguration() : IfxEdsadc.h

IfxEdsadc_getPositiveInputLineConfiguration() : IfxEdsadc.h

IfxEdsadc_getResultRegisterAddress() : IfxEdsadc.h

IfxEdsadc_getSubsequentResult() : IfxEdsadc.h

IfxEdsadc_HalfSupplyVoltage : IfxEdsadc.h

IfxEdsadc_HalfSupplyVoltage_disable : IfxEdsadc.h

IfxEdsadc_HalfSupplyVoltage_enable : IfxEdsadc.h

IfxEdsadc_initCgPwmPin() : IfxEdsadc.h

IfxEdsadc_initCinPin() : IfxEdsadc.h

IfxEdsadc_initCoutPin() : IfxEdsadc.h

IfxEdsadc_initDinPin() : IfxEdsadc.h

IfxEdsadc_initDsnPin() : IfxEdsadc.h

IfxEdsadc_initDspPin() : IfxEdsadc.h

IfxEdsadc_initItrPin() : IfxEdsadc.h

IfxEdsadc_initSgPin() : IfxEdsadc.h

IfxEdsadc_InputConfig : IfxEdsadc.h

IfxEdsadc_InputConfig_commonModeVoltage : IfxEdsadc.h

IfxEdsadc_InputConfig_inputPin : IfxEdsadc.h

IfxEdsadc_InputConfig_referenceGround : IfxEdsadc.h

IfxEdsadc_InputConfig_supplyVoltage : IfxEdsadc.h

IfxEdsadc_InputDataSource : IfxEdsadc.h

IfxEdsadc_InputDataSource_directInputA : IfxEdsadc.h

IfxEdsadc_InputDataSource_directInputB : IfxEdsadc.h

IfxEdsadc_InputDataSource_directInputC : IfxEdsadc.h

IfxEdsadc_InputDataSource_directInputD : IfxEdsadc.h

IfxEdsadc_InputDataSource_invertedInputA : IfxEdsadc.h

IfxEdsadc_InputDataSource_invertedInputB : IfxEdsadc.h

IfxEdsadc_InputDataSource_invertedInputC : IfxEdsadc.h

IfxEdsadc_InputDataSource_invertedInputD : IfxEdsadc.h

IfxEdsadc_InputGain : IfxEdsadc.h

IfxEdsadc_InputGain_factor1 : IfxEdsadc.h

IfxEdsadc_InputGain_factor16 : IfxEdsadc.h

IfxEdsadc_InputGain_factor2 : IfxEdsadc.h

IfxEdsadc_InputGain_factor4 : IfxEdsadc.h

IfxEdsadc_InputGain_factor8 : IfxEdsadc.h

IfxEdsadc_InputMuxControlMode : IfxEdsadc.h

IfxEdsadc_InputMuxControlMode_always : IfxEdsadc.h

IfxEdsadc_InputMuxControlMode_fallingEdge : IfxEdsadc.h

IfxEdsadc_InputMuxControlMode_risingEdge : IfxEdsadc.h

IfxEdsadc_InputMuxControlMode_softwareControl : IfxEdsadc.h

IfxEdsadc_InputPin : IfxEdsadc.h

IfxEdsadc_InputPin_a : IfxEdsadc.h

IfxEdsadc_InputPin_b : IfxEdsadc.h

IfxEdsadc_InputPin_c : IfxEdsadc.h

IfxEdsadc_InputPin_d : IfxEdsadc.h

IfxEdsadc_IntegrationShiftControl : IfxEdsadc.h

IfxEdsadc_IntegrationShiftControl_0 : IfxEdsadc.h

IfxEdsadc_IntegrationShiftControl_1 : IfxEdsadc.h

IfxEdsadc_IntegrationShiftControl_2 : IfxEdsadc.h

IfxEdsadc_IntegrationShiftControl_3 : IfxEdsadc.h

IfxEdsadc_IntegrationShiftControl_4 : IfxEdsadc.h

IfxEdsadc_IntegrationShiftControl_5 : IfxEdsadc.h

IfxEdsadc_IntegrationWindowSize : IfxEdsadc.h

IfxEdsadc_IntegrationWindowSize_externalControl : IfxEdsadc.h

IfxEdsadc_IntegrationWindowSize_internalControl : IfxEdsadc.h

IfxEdsadc_IntegratorTrigger : IfxEdsadc.h

IfxEdsadc_IntegratorTrigger_alwaysActive : IfxEdsadc.h

IfxEdsadc_IntegratorTrigger_bypassed : IfxEdsadc.h

IfxEdsadc_IntegratorTrigger_fallingEdge : IfxEdsadc.h

IfxEdsadc_IntegratorTrigger_risingEdge : IfxEdsadc.h

IfxEdsadc_isModuleEnabled() : IfxEdsadc.h

IfxEdsadc_isModuleSuspended() : IfxEdsadc.h

IfxEdsadc_ITR0E_P33_0_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_ITR0F_P33_4_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_ITR1E_P33_1_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_ITR1F_P33_5_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_ITR2E_P33_2_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_ITR2F_P33_6_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_ITR3E_P02_8_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_ITR3F_P00_9_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_ITR4E_P02_7_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_ITR4F_P00_6_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_ITR5E_P02_6_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_ITR5F_P00_3_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_ITR6E_P01_0_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_ITR6F_P00_15_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_ITR7E_P01_4_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_ITR7F_P01_3_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_ITR8E_P01_1_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_ITR8F_P01_7_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_ITR9E_P01_11_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_ITR9F_P01_10_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_Itr_In_pinTable : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_MainServiceRequest : IfxEdsadc.h

IfxEdsadc_MainServiceRequest_everyNewResult : IfxEdsadc.h

IfxEdsadc_MainServiceRequest_highGateSignal : IfxEdsadc.h

IfxEdsadc_MainServiceRequest_lowGateSignal : IfxEdsadc.h

IfxEdsadc_MainServiceRequest_never : IfxEdsadc.h

IfxEdsadc_ModulatorClockDivider : IfxEdsadc.h

IfxEdsadc_ModulatorClockDivider_div10 : IfxEdsadc.h

IfxEdsadc_ModulatorClockDivider_div12 : IfxEdsadc.h

IfxEdsadc_ModulatorClockDivider_div14 : IfxEdsadc.h

IfxEdsadc_ModulatorClockDivider_div16 : IfxEdsadc.h

IfxEdsadc_ModulatorClockDivider_div18 : IfxEdsadc.h

IfxEdsadc_ModulatorClockDivider_div4 : IfxEdsadc.h

IfxEdsadc_ModulatorClockDivider_div6 : IfxEdsadc.h

IfxEdsadc_ModulatorClockDivider_div8 : IfxEdsadc.h

IfxEdsadc_ModulatorClockGeneration : IfxEdsadc.h

IfxEdsadc_ModulatorClockGeneration_syncMode : IfxEdsadc.h

IfxEdsadc_ModulatorClockGeneration_unsyncMode : IfxEdsadc.h

IFXEDSADC_NUM_CHANNELS : IfxEdsadc_cfg.h

IFXEDSADC_NUM_MODULES : IfxEdsadc_cfg.h

IfxEdsadc_OffsetCompensationFilter : IfxEdsadc.h

IfxEdsadc_OffsetCompensationFilter_disabled : IfxEdsadc.h

IfxEdsadc_OffsetCompensationFilter_enablewithRateA : IfxEdsadc.h

IfxEdsadc_OffsetCompensationFilter_enablewithRateB : IfxEdsadc.h

IfxEdsadc_OffsetCompensationFilter_enablewithRateC : IfxEdsadc.h

IfxEdsadc_OffsetCompensationFilter_enablewithRateD : IfxEdsadc.h

IfxEdsadc_OffsetCompensationFilter_enablewithRateE : IfxEdsadc.h

IfxEdsadc_OffsetCompensationFilter_enablewithRateF : IfxEdsadc.h

IfxEdsadc_OffsetCompensationFilter_enablewithRateG : IfxEdsadc.h

IfxEdsadc_OvershootCompensation : IfxEdsadc.h

IfxEdsadc_OvershootCompensation_disabled : IfxEdsadc.h

IfxEdsadc_OvershootCompensation_enabled : IfxEdsadc.h

IFXEDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS : IfxEdsadc_PinMap.h

IFXEDSADC_PINMAP_DSCIN_IN_NUM_ITEMS : IfxEdsadc_PinMap.h

IFXEDSADC_PINMAP_DSCOUT_OUT_NUM_ITEMS : IfxEdsadc_PinMap.h

IFXEDSADC_PINMAP_DSDIN_IN_NUM_ITEMS : IfxEdsadc_PinMap.h

IFXEDSADC_PINMAP_DSN_IN_NUM_ITEMS : IfxEdsadc_PinMap.h

IFXEDSADC_PINMAP_DSP_IN_NUM_ITEMS : IfxEdsadc_PinMap.h

IFXEDSADC_PINMAP_ITR_IN_NUM_ITEMS : IfxEdsadc_PinMap.h

IFXEDSADC_PINMAP_NUM_CHANNELS : IfxEdsadc_PinMap.h

IFXEDSADC_PINMAP_NUM_MODULES : IfxEdsadc_PinMap.h

IFXEDSADC_PINMAP_SG_IN_NUM_ITEMS : IfxEdsadc_PinMap.h

IfxEdsadc_RectifierSignSource : IfxEdsadc.h

IfxEdsadc_RectifierSignSource_externalA : IfxEdsadc.h

IfxEdsadc_RectifierSignSource_externalB : IfxEdsadc.h

IfxEdsadc_RectifierSignSource_nextChannel : IfxEdsadc.h

IfxEdsadc_RectifierSignSource_onChipGenerator : IfxEdsadc.h

IfxEdsadc_resetModule() : IfxEdsadc.c , IfxEdsadc.h

IfxEdsadc_RestartFilterChain : IfxEdsadc.h

IfxEdsadc_RestartFilterChain_off : IfxEdsadc.h

IfxEdsadc_RestartFilterChain_on : IfxEdsadc.h

IfxEdsadc_ResultDisplayMode : IfxEdsadc.h

IfxEdsadc_ResultDisplayMode_signed : IfxEdsadc.h

IfxEdsadc_ResultDisplayMode_unsigned : IfxEdsadc.h

IfxEdsadc_SampleClockSource : IfxEdsadc.h

IfxEdsadc_SampleClockSource_inputA : IfxEdsadc.h

IfxEdsadc_SampleClockSource_inputB : IfxEdsadc.h

IfxEdsadc_SampleClockSource_inputC : IfxEdsadc.h

IfxEdsadc_SampleClockSource_internal : IfxEdsadc.h

IfxEdsadc_ServiceRequestFifolevel : IfxEdsadc.h

IfxEdsadc_ServiceRequestFifolevel_1 : IfxEdsadc.h

IfxEdsadc_ServiceRequestFifolevel_2 : IfxEdsadc.h

IfxEdsadc_ServiceRequestFifolevel_3 : IfxEdsadc.h

IfxEdsadc_ServiceRequestFifolevel_4 : IfxEdsadc.h

IfxEdsadc_setCarrierMode() : IfxEdsadc.h

IfxEdsadc_setCommonModeVoltage() : IfxEdsadc.c , IfxEdsadc.h

IfxEdsadc_setGainCalibration() : IfxEdsadc.c , IfxEdsadc.h

IfxEdsadc_setGainControl() : IfxEdsadc.c , IfxEdsadc.h

IfxEdsadc_setGainCorrectionFactor() : IfxEdsadc.c , IfxEdsadc.h

IfxEdsadc_setOffsetCompensationValue() : IfxEdsadc.h

IfxEdsadc_setSleepMode() : IfxEdsadc.h

IfxEdsadc_setSuspendMode() : IfxEdsadc.h

IfxEdsadc_setTimeStampCounter() : IfxEdsadc.c , IfxEdsadc.h

IfxEdsadc_Sg_In_pinTable : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_SGNA_P00_4_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_SGNB_P33_13_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h

IfxEdsadc_SleepMode : IfxEdsadc.h

IfxEdsadc_SleepMode_disable : IfxEdsadc.h

IfxEdsadc_SleepMode_enable : IfxEdsadc.h

IfxEdsadc_startScan() : IfxEdsadc.h

IfxEdsadc_StepDetectionMode : IfxEdsadc.h

IfxEdsadc_StepDetectionMode_lastInput : IfxEdsadc.h

IfxEdsadc_StepDetectionMode_secondlastInput : IfxEdsadc.h

IfxEdsadc_stopScan() : IfxEdsadc.h

IfxEdsadc_SupplyVoltageLevel : IfxEdsadc.h

IfxEdsadc_SupplyVoltageLevel_automaticControl : IfxEdsadc.h

IfxEdsadc_SupplyVoltageLevel_lowerVoltage : IfxEdsadc.h

IfxEdsadc_SupplyVoltageLevel_upperVoltage : IfxEdsadc.h

IfxEdsadc_SuspendMode : IfxEdsadc.h

IfxEdsadc_SuspendMode_hard : IfxEdsadc.h

IfxEdsadc_SuspendMode_none : IfxEdsadc.h

IfxEdsadc_SuspendMode_soft : IfxEdsadc.h

IfxEdsadc_TimeStampCounterClockSelection : IfxEdsadc.h

IfxEdsadc_TimeStampCounterClockSelection_div1 : IfxEdsadc.h

IfxEdsadc_TimeStampCounterClockSelection_div2 : IfxEdsadc.h

IfxEdsadc_TimeStampCounterClockSelection_div4 : IfxEdsadc.h

IfxEdsadc_TimeStampCounterClockSelection_div8 : IfxEdsadc.h

IfxEdsadc_TimeStampCounterControl : IfxEdsadc.h

IfxEdsadc_TimeStampCounterControl_off : IfxEdsadc.h

IfxEdsadc_TimeStampCounterControl_on : IfxEdsadc.h

IfxEdsadc_TimestampTrigger : IfxEdsadc.h

IfxEdsadc_TimestampTrigger_eachEdge : IfxEdsadc.h

IfxEdsadc_TimestampTrigger_fallingEdge : IfxEdsadc.h

IfxEdsadc_TimestampTrigger_noTrigger : IfxEdsadc.h

IfxEdsadc_TimestampTrigger_risingEdge : IfxEdsadc.h

IfxEdsadc_TriggerInput : IfxEdsadc.h

IfxEdsadc_TriggerInput_a : IfxEdsadc.h

IfxEdsadc_TriggerInput_b : IfxEdsadc.h

IfxEdsadc_TriggerInput_c : IfxEdsadc.h

IfxEdsadc_TriggerInput_d : IfxEdsadc.h

IfxEdsadc_TriggerInput_e : IfxEdsadc.h

IfxEdsadc_TriggerInput_f : IfxEdsadc.h

IfxEdsadc_TriggerInput_g : IfxEdsadc.h

IfxEdsadc_TriggerInput_h : IfxEdsadc.h

IfxEdsadc_TriggerInput_i : IfxEdsadc.h

IfxEdsadc_TriggerInput_j : IfxEdsadc.h

IfxEdsadc_TriggerInput_k : IfxEdsadc.h

IfxEdsadc_TriggerInput_l : IfxEdsadc.h

IfxEdsadc_TriggerInput_m : IfxEdsadc.h

IfxEdsadc_TriggerInput_n : IfxEdsadc.h

IfxEdsadc_TriggerInput_o : IfxEdsadc.h

IfxEdsadc_TriggerInput_p : IfxEdsadc.h

IfxEray0_RXDA0_P14_8_IN : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray0_RXDA1_P11_9_IN : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray0_RXDA2_P02_1_IN : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray0_RXDA3_P14_1_IN : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray0_RXDB0_P14_7_IN : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray0_RXDB1_P11_10_IN : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray0_RXDB2_P02_3_IN : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray0_RXDB3_P14_1_IN : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray0_TXDA_P02_0_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray0_TXDA_P11_3_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray0_TXDA_P14_0_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray0_TXDA_P14_10_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray0_TXDB_P02_2_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray0_TXDB_P11_12_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray0_TXDB_P14_0_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray0_TXDB_P14_5_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray0_TXENA_P02_4_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray0_TXENA_P11_6_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray0_TXENA_P14_9_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray0_TXENB_P02_5_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray0_TXENB_P11_11_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray0_TXENB_P11_6_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray0_TXENB_P14_6_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray0_TXENB_P14_9_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray1_RXDA0_P14_8_IN : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray1_RXDA1_P01_1_IN : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray1_RXDB0_P14_7_IN : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray1_RXDB1_P01_8_IN : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray1_TXDA_P01_12_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray1_TXDA_P14_10_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray1_TXDB_P01_13_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray1_TXDB_P14_5_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray1_TXENA_P01_14_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray1_TXENA_P14_9_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray1_TXENB_P02_15_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray1_TXENB_P14_6_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray_Baudrate : IfxEray.h

IfxEray_Baudrate_10 : IfxEray.h

IfxEray_Baudrate_2_5 : IfxEray.h

IfxEray_Baudrate_5 : IfxEray.h

IfxEray_BufferDirection : IfxEray.h

IfxEray_BufferDirection_receive : IfxEray.h

IfxEray_BufferDirection_transmit : IfxEray.h

IfxEray_calcHeaderCrc() : IfxEray.c , IfxEray.h

IfxEray_cfg_indexMap : IfxEray_cfg.c , IfxEray_cfg.h

IfxEray_changePocState() : IfxEray.c , IfxEray.h

IfxEray_Channel : IfxEray.h

IfxEray_Channel_a : IfxEray.h

IfxEray_Channel_b : IfxEray.h

IfxEray_clearAllFlags() : IfxEray.c , IfxEray.h

IfxEray_ClearErrorFlag : IfxEray.h

IfxEray_clearErrorFlag() : IfxEray.h

IfxEray_ClearErrorFlag_ccf : IfxEray.h

IfxEray_ClearErrorFlag_ccl : IfxEray.h

IfxEray_ClearErrorFlag_cna : IfxEray.h

IfxEray_ClearErrorFlag_eda : IfxEray.h

IfxEray_ClearErrorFlag_edb : IfxEray.h

IfxEray_ClearErrorFlag_eerr : IfxEray.h

IfxEray_ClearErrorFlag_efa : IfxEray.h

IfxEray_ClearErrorFlag_iiba : IfxEray.h

IfxEray_ClearErrorFlag_ioba : IfxEray.h

IfxEray_ClearErrorFlag_ltva : IfxEray.h

IfxEray_ClearErrorFlag_ltvb : IfxEray.h

IfxEray_ClearErrorFlag_mhf : IfxEray.h

IfxEray_ClearErrorFlag_pemc : IfxEray.h

IfxEray_ClearErrorFlag_rfo : IfxEray.h

IfxEray_ClearErrorFlag_sfbm : IfxEray.h

IfxEray_ClearErrorFlag_sfo : IfxEray.h

IfxEray_ClearErrorFlag_taba : IfxEray.h

IfxEray_ClearErrorFlag_tabb : IfxEray.h

IfxEray_ClearStatusFlag : IfxEray.h

IfxEray_clearStatusFlag() : IfxEray.h

IfxEray_ClearStatusFlag_cas : IfxEray.h

IfxEray_ClearStatusFlag_cycs : IfxEray.h

IfxEray_ClearStatusFlag_mbsi : IfxEray.h

IfxEray_ClearStatusFlag_mtsa : IfxEray.h

IfxEray_ClearStatusFlag_mtsb : IfxEray.h

IfxEray_ClearStatusFlag_nmvc : IfxEray.h

IfxEray_ClearStatusFlag_rfcl : IfxEray.h

IfxEray_ClearStatusFlag_rfne : IfxEray.h

IfxEray_ClearStatusFlag_rxi : IfxEray.h

IfxEray_ClearStatusFlag_sds : IfxEray.h

IfxEray_ClearStatusFlag_sucs : IfxEray.h

IfxEray_ClearStatusFlag_swe : IfxEray.h

IfxEray_ClearStatusFlag_ti0 : IfxEray.h

IfxEray_ClearStatusFlag_ti1 : IfxEray.h

IfxEray_ClearStatusFlag_tibc : IfxEray.h

IfxEray_ClearStatusFlag_tobc : IfxEray.h

IfxEray_ClearStatusFlag_txi : IfxEray.h

IfxEray_ClearStatusFlag_wst : IfxEray.h

IfxEray_ClearStatusFlag_wupa : IfxEray.h

IfxEray_ClearStatusFlag_wupb : IfxEray.h

IfxEray_ClockDivider : IfxEray.h

IfxEray_ClockDivider_1 : IfxEray.h

IfxEray_ClockDivider_2 : IfxEray.h

IfxEray_ClockDivider_3 : IfxEray.h

IfxEray_ClockDivider_4 : IfxEray.h

IfxEray_ClockDivider_5 : IfxEray.h

IfxEray_ClockDivider_6 : IfxEray.h

IfxEray_ClockDivider_7 : IfxEray.h

IfxEray_ClockDivider_none : IfxEray.h

IfxEray_configureSuc1Register() : IfxEray.h

IfxEray_disableModule() : IfxEray.h

IfxEray_enableAllErrorInterrupts() : IfxEray.h

IfxEray_enableExternalLoopback() : IfxEray.h

IfxEray_enableInterruptLine() : IfxEray.h

IfxEray_enableInterruptLines() : IfxEray.c , IfxEray.h

IfxEray_enableModule() : IfxEray.h

IfxEray_enableTransmitInterrupt() : IfxEray.h

IfxEray_enableWriteTestRegister() : IfxEray.h

IfxEray_Eray_allowColdStart() : IfxEray_Eray.h

IfxEray_Eray_bufferReconfig() : IfxEray_Eray.h

IfxEray_Eray_changePocState() : IfxEray_Eray.h

IfxEray_Eray_clearErrorFlag() : IfxEray_Eray.h

IfxEray_Eray_clearStatusFlag() : IfxEray_Eray.h

IfxEray_Eray_deInitModule() : IfxEray_Eray.h

IfxEray_Eray_getErrorInterrupts() : IfxEray_Eray.h

IfxEray_Eray_getMessageBufferInterruptStatus() : IfxEray_Eray.h

IfxEray_Eray_getNewDataInterruptStatus() : IfxEray_Eray.h

IfxEray_Eray_getPocState() : IfxEray_Eray.h

IfxEray_Eray_getStatusInterrupts() : IfxEray_Eray.h

IfxEray_Eray_getWakeupPatternReceivedChannel() : IfxEray_Eray.h

IfxEray_Eray_initModule() : IfxEray_Eray.c , IfxEray_Eray.h

IfxEray_Eray_initModuleConfig() : IfxEray_Eray.c , IfxEray_Eray.h

IfxEray_Eray_Node_init() : IfxEray_Eray.c , IfxEray_Eray.h

IfxEray_Eray_Node_initCommunicationController() : IfxEray_Eray.c

IfxEray_Eray_Node_initConfig() : IfxEray_Eray.c , IfxEray_Eray.h

IfxEray_Eray_Node_initGTU() : IfxEray_Eray.c

IfxEray_Eray_Node_initMessageRAM() : IfxEray_Eray.c

IfxEray_Eray_readData() : IfxEray_Eray.h

IfxEray_Eray_readFrame() : IfxEray_Eray.h

IfxEray_Eray_receiveFifoFrame() : IfxEray_Eray.c , IfxEray_Eray.h

IfxEray_Eray_receiveFrame() : IfxEray_Eray.c , IfxEray_Eray.h

IfxEray_Eray_setMessageBufferInterruptDestination() : IfxEray_Eray.h

IfxEray_Eray_setNewDataInterruptDestination() : IfxEray_Eray.h

IfxEray_Eray_setPocAllSlots() : IfxEray_Eray.h

IfxEray_Eray_startCommunication() : IfxEray_Eray.h

IfxEray_Eray_transmitFrame() : IfxEray_Eray.c , IfxEray_Eray.h

IfxEray_Eray_wakeUpChannel() : IfxEray_Eray.h

IfxEray_Eray_wakeUpCluster() : IfxEray_Eray.h

IfxEray_Eray_writeData() : IfxEray_Eray.h

IfxEray_ExternalOffset : IfxEray.h

IfxEray_ExternalOffset_correctionAdded : IfxEray.h

IfxEray_ExternalOffset_correctionSubtracted : IfxEray.h

IfxEray_ExternalOffset_noCorrection : IfxEray.h

IfxEray_ExternalOffsetCorrection : IfxEray.h

IfxEray_ExternalOffsetCorrection_0 : IfxEray.h

IfxEray_ExternalOffsetCorrection_1 : IfxEray.h

IfxEray_ExternalOffsetCorrection_2 : IfxEray.h

IfxEray_ExternalOffsetCorrection_3 : IfxEray.h

IfxEray_ExternalOffsetCorrection_4 : IfxEray.h

IfxEray_ExternalOffsetCorrection_5 : IfxEray.h

IfxEray_ExternalOffsetCorrection_6 : IfxEray.h

IfxEray_ExternalOffsetCorrection_7 : IfxEray.h

IfxEray_ExternalRate : IfxEray.h

IfxEray_ExternalRate_correctionAdded : IfxEray.h

IfxEray_ExternalRate_correctionSubtracted : IfxEray.h

IfxEray_ExternalRate_noCorrection : IfxEray.h

IfxEray_ExternalRateCorrection : IfxEray.h

IfxEray_ExternalRateCorrection_0 : IfxEray.h

IfxEray_ExternalRateCorrection_1 : IfxEray.h

IfxEray_ExternalRateCorrection_2 : IfxEray.h

IfxEray_ExternalRateCorrection_3 : IfxEray.h

IfxEray_ExternalRateCorrection_4 : IfxEray.h

IfxEray_ExternalRateCorrection_5 : IfxEray.h

IfxEray_ExternalRateCorrection_6 : IfxEray.h

IfxEray_ExternalRateCorrection_7 : IfxEray.h

IfxEray_getAddress() : IfxEray.c , IfxEray.h

IfxEray_getErrorInterrupts() : IfxEray.h

IfxEray_getFifoIndex() : IfxEray.h

IfxEray_getFifoStatus() : IfxEray.h

IfxEray_getIndex() : IfxEray.c , IfxEray.h

IfxEray_getInputBufferBusyHostStatus() : IfxEray.h

IfxEray_getInputBufferBusyShadowStatus() : IfxEray.h

IfxEray_getInputBufferBusySrcPtr() : IfxEray.h

IfxEray_getInterruptLine0SrcPtr() : IfxEray.h

IfxEray_getInterruptLine1SrcPtr() : IfxEray.h

IfxEray_getMessageBufferInterruptStatus() : IfxEray.h

IfxEray_getMessageBufferStatus0SrcPtr() : IfxEray.h

IfxEray_getMessageBufferStatus1SrcPtr() : IfxEray.h

IfxEray_getNewDataInterrupt0SrcPtr() : IfxEray.h

IfxEray_getNewDataInterrupt1SrcPtr() : IfxEray.h

IfxEray_getNewDataInterruptStatus() : IfxEray.h

IfxEray_getOutputBuffer() : IfxEray.h

IfxEray_getOutputBufferBusyShadowStatus() : IfxEray.h

IfxEray_getOutputBufferBusySrcPtr() : IfxEray.h

IfxEray_getPocState() : IfxEray.h

IfxEray_getStatusInterrupts() : IfxEray.h

IfxEray_getTimerInterrupt0SrcPtr() : IfxEray.h

IfxEray_getTimerInterrupt1SrcPtr() : IfxEray.h

IfxEray_getWakeupPatternReceivedChannel() : IfxEray.h

IfxEray_IdleDynamicSlots : IfxEray.h

IfxEray_IdleDynamicSlots_0 : IfxEray.h

IfxEray_IdleDynamicSlots_1 : IfxEray.h

IfxEray_IdleDynamicSlots_2 : IfxEray.h

IfxEray_Index : IfxEray_cfg.h

IfxEray_Index_0 : IfxEray_cfg.h

IfxEray_Index_1 : IfxEray_cfg.h

IfxEray_Index_none : IfxEray_cfg.h

IfxEray_initRxPin() : IfxEray.h

IfxEray_initRxPinWithPadLevel() : IfxEray.h

IfxEray_initTxEnPin() : IfxEray.h

IfxEray_initTxPin() : IfxEray.h

IfxEray_InterruptLine : IfxEray.h

IfxEray_InterruptLine_0 : IfxEray.h

IfxEray_InterruptLine_1 : IfxEray.h

IfxEray_isModuleSuspended() : IfxEray.h

IfxEray_isPocBusy() : IfxEray.h

IfxEray_isRamsCleared() : IfxEray.h

IfxEray_ListenTimeOutNoise : IfxEray.h

IfxEray_ListenTimeOutNoise_10 : IfxEray.h

IfxEray_ListenTimeOutNoise_11 : IfxEray.h

IfxEray_ListenTimeOutNoise_12 : IfxEray.h

IfxEray_ListenTimeOutNoise_13 : IfxEray.h

IfxEray_ListenTimeOutNoise_14 : IfxEray.h

IfxEray_ListenTimeOutNoise_15 : IfxEray.h

IfxEray_ListenTimeOutNoise_16 : IfxEray.h

IfxEray_ListenTimeOutNoise_2 : IfxEray.h

IfxEray_ListenTimeOutNoise_3 : IfxEray.h

IfxEray_ListenTimeOutNoise_4 : IfxEray.h

IfxEray_ListenTimeOutNoise_5 : IfxEray.h

IfxEray_ListenTimeOutNoise_6 : IfxEray.h

IfxEray_ListenTimeOutNoise_7 : IfxEray.h

IfxEray_ListenTimeOutNoise_8 : IfxEray.h

IfxEray_ListenTimeOutNoise_9 : IfxEray.h

IfxEray_MaxSynchFrames : IfxEray.h

IfxEray_MaxSynchFrames_10 : IfxEray.h

IfxEray_MaxSynchFrames_11 : IfxEray.h

IfxEray_MaxSynchFrames_12 : IfxEray.h

IfxEray_MaxSynchFrames_13 : IfxEray.h

IfxEray_MaxSynchFrames_14 : IfxEray.h

IfxEray_MaxSynchFrames_15 : IfxEray.h

IfxEray_MaxSynchFrames_2 : IfxEray.h

IfxEray_MaxSynchFrames_3 : IfxEray.h

IfxEray_MaxSynchFrames_4 : IfxEray.h

IfxEray_MaxSynchFrames_5 : IfxEray.h

IfxEray_MaxSynchFrames_6 : IfxEray.h

IfxEray_MaxSynchFrames_7 : IfxEray.h

IfxEray_MaxSynchFrames_8 : IfxEray.h

IfxEray_MaxSynchFrames_9 : IfxEray.h

IfxEray_NodeId : IfxEray_cfg.h

IfxEray_NodeId_a : IfxEray_cfg.h

IfxEray_NodeId_b : IfxEray_cfg.h

IfxEray_NodeId_none : IfxEray_cfg.h

IFXERAY_NUM_CHANNELS : IfxEray_cfg.h

IFXERAY_NUM_MODULES : IfxEray_cfg.h

IFXERAY_NUM_SLOTS : IfxEray_cfg.h

IFXERAY_PINMAP_NUM_MODULES : IfxEray_PinMap.h

IFXERAY_PINMAP_NUM_NODES : IfxEray_PinMap.h

IFXERAY_PINMAP_RXD_IN_NUM_ITEMS : IfxEray_PinMap.h

IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS : IfxEray_PinMap.h

IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS : IfxEray_PinMap.h

IfxEray_PocCommand : IfxEray.h

IfxEray_PocCommand_allSlots : IfxEray.h

IfxEray_PocCommand_clearRam : IfxEray.h

IfxEray_PocCommand_coldStart : IfxEray.h

IfxEray_PocCommand_config : IfxEray.h

IfxEray_PocCommand_freeze : IfxEray.h

IfxEray_PocCommand_halt : IfxEray.h

IfxEray_PocCommand_monitor : IfxEray.h

IfxEray_PocCommand_notAccepted : IfxEray.h

IfxEray_PocCommand_ready : IfxEray.h

IfxEray_PocCommand_reset : IfxEray.h

IfxEray_PocCommand_run : IfxEray.h

IfxEray_PocCommand_sendMts : IfxEray.h

IfxEray_PocCommand_wakeup : IfxEray.h

IfxEray_PocState : IfxEray.h

IfxEray_PocState_coldStartListen : IfxEray.h

IfxEray_PocState_collisionResolution : IfxEray.h

IfxEray_PocState_config : IfxEray.h

IfxEray_PocState_consistencyCheck : IfxEray.h

IfxEray_PocState_defaultConfig : IfxEray.h

IfxEray_PocState_gap : IfxEray.h

IfxEray_PocState_halt : IfxEray.h

IfxEray_PocState_initializeSchedule : IfxEray.h

IfxEray_PocState_integrationCheck : IfxEray.h

IfxEray_PocState_integrationConsistencyCheck : IfxEray.h

IfxEray_PocState_integrationListen : IfxEray.h

IfxEray_PocState_join : IfxEray.h

IfxEray_PocState_monitor : IfxEray.h

IfxEray_PocState_normalActive : IfxEray.h

IfxEray_PocState_normalPassive : IfxEray.h

IfxEray_PocState_ready : IfxEray.h

IfxEray_PocState_startup : IfxEray.h

IfxEray_PocState_startupSucced : IfxEray.h

IfxEray_PocState_staruAborted : IfxEray.h

IfxEray_PocState_wakeupDetect : IfxEray.h

IfxEray_PocState_wakeupListen : IfxEray.h

IfxEray_PocState_wakeupSend : IfxEray.h

IfxEray_PocState_wakeupStandby : IfxEray.h

IfxEray_readData() : IfxEray.c , IfxEray.h

IfxEray_readFrame() : IfxEray.c , IfxEray.h

IfxEray_ReceiveChannel : IfxEray.h

IfxEray_ReceiveChannel_a : IfxEray.h

IfxEray_ReceiveChannel_b : IfxEray.h

IfxEray_ReceiveChannel_both : IfxEray.h

IfxEray_ReceiveChannel_none : IfxEray.h

IfxEray_receiveData() : IfxEray.h

IfxEray_receiveHeader() : IfxEray.h

IfxEray_resetModule() : IfxEray.c , IfxEray.h

IfxEray_Rxd_In_pinTable : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray_selectRecieveInput() : IfxEray.h

IfxEray_sendData() : IfxEray.h

IfxEray_sendHeader() : IfxEray.h

IfxEray_setActiveCyclePairs() : IfxEray.h

IfxEray_setAutoDelayBuffers() : IfxEray.h

IfxEray_setBaudrate() : IfxEray.h

IfxEray_setBufferReconfigSecure() : IfxEray.h

IfxEray_setChannelAInitialOffsets() : IfxEray.h

IfxEray_setChannelBInitialOffsets() : IfxEray.h

IfxEray_setChannelsReceiveDelay() : IfxEray.h

IfxEray_setClockCorrectionCycles() : IfxEray.h

IfxEray_setClockSynchErrorHalt() : IfxEray.h

IfxEray_setClusterDriftValues() : IfxEray.h

IfxEray_setClusterStartupDeviation() : IfxEray.h

IfxEray_setCollisionAvoidanceDuration() : IfxEray.h

IfxEray_setCycleDurationMacroticks() : IfxEray.h

IfxEray_setCycleDurationMicroticks() : IfxEray.h

IfxEray_setDecodingCorrectionValue() : IfxEray.h

IfxEray_setDynamicSlots() : IfxEray.h

IfxEray_setExternalCorrectionControl() : IfxEray.h

IfxEray_setExternalCorrectionValues() : IfxEray.h

IfxEray_setFifoBufferStartIndex() : IfxEray.h

IfxEray_setFifoFilterConfigurations() : IfxEray.h

IfxEray_setFifoMessageBufferConfigurations() : IfxEray.h

IfxEray_setFirstDynamicBuffer() : IfxEray.h

IfxEray_setListenTimeOuts() : IfxEray.h

IfxEray_setMacroTickValue() : IfxEray.h

IfxEray_setMaxColdStartAttempts() : IfxEray.h

IfxEray_setMaxCorrectionValues() : IfxEray.h

IfxEray_setMaxSynchFrames() : IfxEray.h

IfxEray_setMessageBufferCount() : IfxEray.h

IfxEray_setMessageBufferInterruptDestination() : IfxEray.c , IfxEray.h

IfxEray_setMessageHandlerConfigurations() : IfxEray.h

IfxEray_setNetworkStartIdleTime() : IfxEray.h

IfxEray_setNetworkVectorLength() : IfxEray.h

IfxEray_setNewDataInterruptDestination() : IfxEray.c , IfxEray.h

IfxEray_setNodeChannels() : IfxEray.h

IfxEray_setOffsetCorrection() : IfxEray.h

IfxEray_setPocCommand() : IfxEray.h

IfxEray_setPocReady() : IfxEray.c , IfxEray.h

IfxEray_setReceiveRequest() : IfxEray.h

IfxEray_setReceiveWakeupTimes() : IfxEray.h

IfxEray_setRxBufferNumber() : IfxEray.h

IfxEray_setSleepMode() : IfxEray.h

IfxEray_setSlot() : IfxEray.c , IfxEray.h

IfxEray_setSlotActionPoints() : IfxEray.h

IfxEray_setStaticSlots() : IfxEray.h

IfxEray_setStrobePosition() : IfxEray.h

IfxEray_setSuspendMode() : IfxEray.h

IfxEray_setSymbolChannels() : IfxEray.h

IfxEray_setTransmissionSlotMode() : IfxEray.h

IfxEray_setTransmissionStartTime() : IfxEray.h

IfxEray_setTransmitRequest() : IfxEray.h

IfxEray_setTransmittedFrames() : IfxEray.h

IfxEray_setTransmitWakeupTimes() : IfxEray.h

IfxEray_setTxBufferNumber() : IfxEray.h

IfxEray_setViewData() : IfxEray.h

IfxEray_setWakeupPatternChannel() : IfxEray.h

IfxEray_SleepMode : IfxEray.h

IfxEray_SleepMode_disable : IfxEray.h

IfxEray_SleepMode_enable : IfxEray.h

IfxEray_StrobePosition : IfxEray.h

IfxEray_StrobePosition_4 : IfxEray.h

IfxEray_StrobePosition_5 : IfxEray.h

IfxEray_StrobePosition_6 : IfxEray.h

IfxEray_SuspendMode : IfxEray.h

IfxEray_SuspendMode_hard : IfxEray.h

IfxEray_SuspendMode_none : IfxEray.h

IfxEray_SuspendMode_soft : IfxEray.h

IfxEray_TransmissionMode : IfxEray.h

IfxEray_TransmissionMode_continuous : IfxEray.h

IfxEray_TransmissionMode_singleShot : IfxEray.h

IfxEray_TransmissionSlotMode : IfxEray.h

IfxEray_TransmissionSlotMode_all : IfxEray.h

IfxEray_TransmissionSlotMode_single : IfxEray.h

IfxEray_Txd_Out_pinTable : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray_Txen_Out_pinTable : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray_unlockConfigurationKey() : IfxEray.h

IfxEray_unlockTestModeKey() : IfxEray.h

IfxEray_waitForPocState() : IfxEray.h

IfxEray_WakeupChannel : IfxEray.h

IfxEray_WakeupChannel_a : IfxEray.h

IfxEray_WakeupChannel_b : IfxEray.h

IfxEray_writeData() : IfxEray.c , IfxEray.h

IfxEvadc_Adc_addToQueue() : IfxEvadc_Adc.h

IfxEvadc_Adc_clearQueue() : IfxEvadc_Adc.h

IfxEvadc_Adc_configureWaitForReadMode() : IfxEvadc_Adc.h

IfxEvadc_Adc_configureWaitForReadModeForGlobalResultRegister() : IfxEvadc_Adc.h

IfxEvadc_Adc_deInitGroup() : IfxEvadc_Adc.c , IfxEvadc_Adc.h

IfxEvadc_Adc_deInitModule() : IfxEvadc_Adc.h

IfxEvadc_Adc_getChannelConfig() : IfxEvadc_Adc.c , IfxEvadc_Adc.h

IfxEvadc_Adc_getEvadcFromGroup() : IfxEvadc_Adc.h

IfxEvadc_Adc_getGlobalResult() : IfxEvadc_Adc.h

IfxEvadc_Adc_getGroupConfig() : IfxEvadc_Adc.c , IfxEvadc_Adc.h

IfxEvadc_Adc_getGroupRegsFromGroup() : IfxEvadc_Adc.h

IfxEvadc_Adc_getGroupResult() : IfxEvadc_Adc.h

IfxEvadc_Adc_getMasterId() : IfxEvadc_Adc.c

IfxEvadc_Adc_getMasterKernelIndex() : IfxEvadc_Adc.c

IfxEvadc_Adc_getModuleConfig() : IfxEvadc_Adc.h

IfxEvadc_Adc_getQueueStatus() : IfxEvadc_Adc.h

IfxEvadc_Adc_getResult() : IfxEvadc_Adc.h

IfxEvadc_Adc_getResultBasedOnRequestSource() : IfxEvadc_Adc.h

IfxEvadc_Adc_initChannel() : IfxEvadc_Adc.c , IfxEvadc_Adc.h

IfxEvadc_Adc_initChannelConfig() : IfxEvadc_Adc.c , IfxEvadc_Adc.h

IfxEvadc_Adc_initExternalMultiplexerMode() : IfxEvadc_Adc.c , IfxEvadc_Adc.h

IfxEvadc_Adc_initExternalMultiplexerModeConfig() : IfxEvadc_Adc.c , IfxEvadc_Adc.h

IfxEvadc_Adc_initFastCompareChannel() : IfxEvadc_Adc.c , IfxEvadc_Adc.h

IfxEvadc_Adc_initFastCompareChannelConfig() : IfxEvadc_Adc.c , IfxEvadc_Adc.h

IfxEvadc_Adc_initGroup() : IfxEvadc_Adc.c , IfxEvadc_Adc.h

IfxEvadc_Adc_initGroupConfig() : IfxEvadc_Adc.c , IfxEvadc_Adc.h

IfxEvadc_Adc_initModule() : IfxEvadc_Adc.c , IfxEvadc_Adc.h

IfxEvadc_Adc_initModuleConfig() : IfxEvadc_Adc.c , IfxEvadc_Adc.h

IfxEvadc_Adc_masterIndex : IfxEvadc_Adc.c

IfxEvadc_Adc_setAnalogConvertControl() : IfxEvadc_Adc.c , IfxEvadc_Adc.h

IfxEvadc_Adc_setGlobalConfigurations() : IfxEvadc_Adc.c , IfxEvadc_Adc.h

IfxEvadc_Adc_startQueue() : IfxEvadc_Adc.h

IfxEvadc_Adc_SYNCTR_STSEL : IfxEvadc_Adc.h

IfxEvadc_addToQueue() : IfxEvadc.c , IfxEvadc.h

IFXEVADC_ANALOG_FREQUENCY_MAX : IfxEvadc_cfg.h

IFXEVADC_ANALOG_FREQUENCY_MIN : IfxEvadc_cfg.h

IfxEvadc_AnalogClockGenerationMode : IfxEvadc.h

IfxEvadc_AnalogClockGenerationMode_synchronized : IfxEvadc.h

IfxEvadc_AnalogClockGenerationMode_unsynchronized : IfxEvadc.h

IfxEvadc_AnalogClockSynchronizationDelay : IfxEvadc.h

IfxEvadc_AnalogClockSynchronizationDelay_0 : IfxEvadc.h

IfxEvadc_AnalogClockSynchronizationDelay_1 : IfxEvadc.h

IfxEvadc_AnalogClockSynchronizationDelay_2 : IfxEvadc.h

IfxEvadc_AnalogClockSynchronizationDelay_3 : IfxEvadc.h

IfxEvadc_AnalogClockSynchronizationDelay_4 : IfxEvadc.h

IfxEvadc_AnalogClockSynchronizationDelay_5 : IfxEvadc.h

IfxEvadc_AnalogClockSynchronizationDelay_6 : IfxEvadc.h

IfxEvadc_AnalogClockSynchronizationDelay_7 : IfxEvadc.h

IfxEvadc_AnalogConverterMode : IfxEvadc.h

IfxEvadc_AnalogConverterMode_fastStandby : IfxEvadc.h

IfxEvadc_AnalogConverterMode_normalOperation : IfxEvadc.h

IfxEvadc_AnalogConverterMode_off : IfxEvadc.h

IfxEvadc_AnalogConverterMode_slowStandby : IfxEvadc.h

IfxEvadc_AnalogInputPrechargeControl : IfxEvadc.h

IfxEvadc_AnalogInputPrechargeControl_16Cycles : IfxEvadc.h

IfxEvadc_AnalogInputPrechargeControl_32cycles : IfxEvadc.h

IfxEvadc_AnalogInputPrechargeControl_8Cycles : IfxEvadc.h

IfxEvadc_AnalogInputPrechargeControl_noPrecharge : IfxEvadc.h

IfxEvadc_ArbitrationMode : IfxEvadc.h

IfxEvadc_ArbitrationMode_0 : IfxEvadc.h

IfxEvadc_ArbitrationMode_1 : IfxEvadc.h

IfxEvadc_ArbitrationRounds : IfxEvadc.h

IfxEvadc_ArbitrationRounds_16_slots : IfxEvadc.h

IfxEvadc_ArbitrationRounds_20_slots : IfxEvadc.h

IfxEvadc_ArbitrationRounds_4_slots : IfxEvadc.h

IfxEvadc_ArbitrationRounds_8_slots : IfxEvadc.h

IfxEvadc_BoundaryExtension : IfxEvadc.h

IfxEvadc_BoundaryExtension_fastCompareResult1 : IfxEvadc.h

IfxEvadc_BoundaryExtension_fastCompareResult10 : IfxEvadc.h

IfxEvadc_BoundaryExtension_fastCompareResult11 : IfxEvadc.h

IfxEvadc_BoundaryExtension_fastCompareResult12 : IfxEvadc.h

IfxEvadc_BoundaryExtension_fastCompareResult13 : IfxEvadc.h

IfxEvadc_BoundaryExtension_fastCompareResult14 : IfxEvadc.h

IfxEvadc_BoundaryExtension_fastCompareResult15 : IfxEvadc.h

IfxEvadc_BoundaryExtension_fastCompareResult2 : IfxEvadc.h

IfxEvadc_BoundaryExtension_fastCompareResult3 : IfxEvadc.h

IfxEvadc_BoundaryExtension_fastCompareResult4 : IfxEvadc.h

IfxEvadc_BoundaryExtension_fastCompareResult5 : IfxEvadc.h

IfxEvadc_BoundaryExtension_fastCompareResult6 : IfxEvadc.h

IfxEvadc_BoundaryExtension_fastCompareResult7 : IfxEvadc.h

IfxEvadc_BoundaryExtension_fastCompareResult8 : IfxEvadc.h

IfxEvadc_BoundaryExtension_fastCompareResult9 : IfxEvadc.h

IfxEvadc_BoundaryExtension_standard : IfxEvadc.h

IfxEvadc_BoundaryFlagActivationMode : IfxEvadc.h

IfxEvadc_BoundaryFlagActivationMode_0 : IfxEvadc.h

IfxEvadc_BoundaryFlagActivationMode_1 : IfxEvadc.h

IfxEvadc_BoundaryFlagInversionControl : IfxEvadc.h

IfxEvadc_BoundaryFlagInversionControl_direct : IfxEvadc.h

IfxEvadc_BoundaryFlagInversionControl_invert : IfxEvadc.h

IfxEvadc_BoundaryFlagNodePointer : IfxEvadc.h

IfxEvadc_BoundaryFlagNodePointer_commonBoundaryFlagOutput0 : IfxEvadc.h

IfxEvadc_BoundaryFlagNodePointer_commonBoundaryFlagOutput1 : IfxEvadc.h

IfxEvadc_BoundaryFlagNodePointer_commonBoundaryFlagOutput2 : IfxEvadc.h

IfxEvadc_BoundaryFlagNodePointer_commonBoundaryFlagOutput3 : IfxEvadc.h

IfxEvadc_BoundaryFlagNodePointer_disabled : IfxEvadc.h

IfxEvadc_BoundaryFlagNodePointer_sharedServiceRequestLine0 : IfxEvadc.h

IfxEvadc_BoundaryFlagNodePointer_sharedServiceRequestLine1 : IfxEvadc.h

IfxEvadc_BoundaryFlagNodePointer_sharedServiceRequestLine2 : IfxEvadc.h

IfxEvadc_BoundaryFlagNodePointer_sharedServiceRequestLine3 : IfxEvadc.h

IfxEvadc_BoundaryFlagSwControl : IfxEvadc.h

IfxEvadc_BoundaryFlagSwControl_clear : IfxEvadc.h

IfxEvadc_BoundaryFlagSwControl_noAction : IfxEvadc.h

IfxEvadc_BoundaryFlagSwControl_set : IfxEvadc.h

IfxEvadc_BoundaryFlagSwControl_toggle : IfxEvadc.h

IfxEvadc_BoundarySelection : IfxEvadc.h

IfxEvadc_BoundarySelection_global0 : IfxEvadc.h

IfxEvadc_BoundarySelection_global1 : IfxEvadc.h

IfxEvadc_BoundarySelection_group0 : IfxEvadc.h

IfxEvadc_BoundarySelection_group1 : IfxEvadc.h

IfxEvadc_calculateSampleTime() : IfxEvadc.h

IfxEvadc_CalibrationSampleTimeControl : IfxEvadc.h

IfxEvadc_CalibrationSampleTimeControl_2 : IfxEvadc.h

IfxEvadc_CalibrationSampleTimeControl_4 : IfxEvadc.h

IfxEvadc_CalibrationSampleTimeControl_6 : IfxEvadc.h

IfxEvadc_CalibrationSampleTimeControl_8 : IfxEvadc.h

IfxEvadc_cfg_srcAddresses : IfxEvadc_cfg.c , IfxEvadc_cfg.h

IfxEvadc_ChannelEventMode : IfxEvadc.h

IfxEvadc_ChannelEventMode_aboveCompareValue : IfxEvadc.h

IfxEvadc_ChannelEventMode_aboveOrBelowCompareValue : IfxEvadc.h

IfxEvadc_ChannelEventMode_belowCompareValue : IfxEvadc.h

IfxEvadc_ChannelEventMode_never : IfxEvadc.h

IfxEvadc_ChannelId : IfxEvadc.h

IfxEvadc_ChannelId_0 : IfxEvadc.h

IfxEvadc_ChannelId_1 : IfxEvadc.h

IfxEvadc_ChannelId_10 : IfxEvadc.h

IfxEvadc_ChannelId_11 : IfxEvadc.h

IfxEvadc_ChannelId_12 : IfxEvadc.h

IfxEvadc_ChannelId_13 : IfxEvadc.h

IfxEvadc_ChannelId_14 : IfxEvadc.h

IfxEvadc_ChannelId_15 : IfxEvadc.h

IfxEvadc_ChannelId_2 : IfxEvadc.h

IfxEvadc_ChannelId_3 : IfxEvadc.h

IfxEvadc_ChannelId_4 : IfxEvadc.h

IfxEvadc_ChannelId_5 : IfxEvadc.h

IfxEvadc_ChannelId_6 : IfxEvadc.h

IfxEvadc_ChannelId_7 : IfxEvadc.h

IfxEvadc_ChannelId_8 : IfxEvadc.h

IfxEvadc_ChannelId_9 : IfxEvadc.h

IfxEvadc_ChannelId_none : IfxEvadc.h

IfxEvadc_ChannelNoiseReduction : IfxEvadc.h

IfxEvadc_ChannelNoiseReduction_level1 : IfxEvadc.h

IfxEvadc_ChannelNoiseReduction_level2 : IfxEvadc.h

IfxEvadc_ChannelNoiseReduction_level3 : IfxEvadc.h

IfxEvadc_ChannelNoiseReduction_standardConversion : IfxEvadc.h

IfxEvadc_ChannelNoiseReductionEMUX : IfxEvadc.h

IfxEvadc_ChannelNoiseReductionEMUX_level1 : IfxEvadc.h

IfxEvadc_ChannelNoiseReductionEMUX_level2 : IfxEvadc.h

IfxEvadc_ChannelNoiseReductionEMUX_level3 : IfxEvadc.h

IfxEvadc_ChannelNoiseReductionEMUX_standardConversion : IfxEvadc.h

IfxEvadc_ChannelReference : IfxEvadc.h

IfxEvadc_ChannelReference_channel0 : IfxEvadc.h

IfxEvadc_ChannelReference_standard : IfxEvadc.h

IfxEvadc_ChannelResult : IfxEvadc.h

IfxEvadc_ChannelResult_0 : IfxEvadc.h

IfxEvadc_ChannelResult_1 : IfxEvadc.h

IfxEvadc_ChannelResult_10 : IfxEvadc.h

IfxEvadc_ChannelResult_11 : IfxEvadc.h

IfxEvadc_ChannelResult_12 : IfxEvadc.h

IfxEvadc_ChannelResult_13 : IfxEvadc.h

IfxEvadc_ChannelResult_14 : IfxEvadc.h

IfxEvadc_ChannelResult_15 : IfxEvadc.h

IfxEvadc_ChannelResult_2 : IfxEvadc.h

IfxEvadc_ChannelResult_3 : IfxEvadc.h

IfxEvadc_ChannelResult_4 : IfxEvadc.h

IfxEvadc_ChannelResult_5 : IfxEvadc.h

IfxEvadc_ChannelResult_6 : IfxEvadc.h

IfxEvadc_ChannelResult_7 : IfxEvadc.h

IfxEvadc_ChannelResult_8 : IfxEvadc.h

IfxEvadc_ChannelResult_9 : IfxEvadc.h

IfxEvadc_ChannelSelectionStyle : IfxEvadc.h

IfxEvadc_ChannelSelectionStyle_binary : IfxEvadc.h

IfxEvadc_ChannelSelectionStyle_channelNumber : IfxEvadc.h

IfxEvadc_clearAllResultRequests() : IfxEvadc.h

IfxEvadc_clearChannelRequest() : IfxEvadc.h

IfxEvadc_clearQueue() : IfxEvadc.h

IfxEvadc_ClockDividerFactor : IfxEvadc.h

IfxEvadc_ClockDividerFactor_10 : IfxEvadc.h

IfxEvadc_ClockDividerFactor_11 : IfxEvadc.h

IfxEvadc_ClockDividerFactor_12 : IfxEvadc.h

IfxEvadc_ClockDividerFactor_13 : IfxEvadc.h

IfxEvadc_ClockDividerFactor_14 : IfxEvadc.h

IfxEvadc_ClockDividerFactor_15 : IfxEvadc.h

IfxEvadc_ClockDividerFactor_16 : IfxEvadc.h

IfxEvadc_ClockDividerFactor_17 : IfxEvadc.h

IfxEvadc_ClockDividerFactor_18 : IfxEvadc.h

IfxEvadc_ClockDividerFactor_19 : IfxEvadc.h

IfxEvadc_ClockDividerFactor_2 : IfxEvadc.h

IfxEvadc_ClockDividerFactor_20 : IfxEvadc.h

IfxEvadc_ClockDividerFactor_21 : IfxEvadc.h

IfxEvadc_ClockDividerFactor_22 : IfxEvadc.h

IfxEvadc_ClockDividerFactor_23 : IfxEvadc.h

IfxEvadc_ClockDividerFactor_24 : IfxEvadc.h

IfxEvadc_ClockDividerFactor_25 : IfxEvadc.h

IfxEvadc_ClockDividerFactor_26 : IfxEvadc.h

IfxEvadc_ClockDividerFactor_27 : IfxEvadc.h

IfxEvadc_ClockDividerFactor_28 : IfxEvadc.h

IfxEvadc_ClockDividerFactor_29 : IfxEvadc.h

IfxEvadc_ClockDividerFactor_3 : IfxEvadc.h

IfxEvadc_ClockDividerFactor_30 : IfxEvadc.h

IfxEvadc_ClockDividerFactor_31 : IfxEvadc.h

IfxEvadc_ClockDividerFactor_32 : IfxEvadc.h

IfxEvadc_ClockDividerFactor_4 : IfxEvadc.h

IfxEvadc_ClockDividerFactor_5 : IfxEvadc.h

IfxEvadc_ClockDividerFactor_6 : IfxEvadc.h

IfxEvadc_ClockDividerFactor_7 : IfxEvadc.h

IfxEvadc_ClockDividerFactor_8 : IfxEvadc.h

IfxEvadc_ClockDividerFactor_9 : IfxEvadc.h

IfxEvadc_ClockDividerFactor_maxFrequency : IfxEvadc.h

IfxEvadc_configExternalMultiplexerMode() : IfxEvadc.c , IfxEvadc.h

IfxEvadc_configureIclass() : IfxEvadc.h

IfxEvadc_configureWaitForReadMode() : IfxEvadc.h

IfxEvadc_configureWaitForReadModeForGlobalResultRegister() : IfxEvadc.h

IfxEvadc_DataModificationMode : IfxEvadc.h

IfxEvadc_DataModificationMode_differenceMode : IfxEvadc.h

IfxEvadc_DataModificationMode_resultFilteringMode : IfxEvadc.h

IfxEvadc_DataModificationMode_standardDataReduction : IfxEvadc.h

IfxEvadc_DataReductionControlMode : IfxEvadc.h

IfxEvadc_DataReductionControlMode_0 : IfxEvadc.h

IfxEvadc_DataReductionControlMode_1 : IfxEvadc.h

IfxEvadc_DataReductionControlMode_10 : IfxEvadc.h

IfxEvadc_DataReductionControlMode_11 : IfxEvadc.h

IfxEvadc_DataReductionControlMode_12 : IfxEvadc.h

IfxEvadc_DataReductionControlMode_13 : IfxEvadc.h

IfxEvadc_DataReductionControlMode_14 : IfxEvadc.h

IfxEvadc_DataReductionControlMode_15 : IfxEvadc.h

IfxEvadc_DataReductionControlMode_2 : IfxEvadc.h

IfxEvadc_DataReductionControlMode_3 : IfxEvadc.h

IfxEvadc_DataReductionControlMode_4 : IfxEvadc.h

IfxEvadc_DataReductionControlMode_5 : IfxEvadc.h

IfxEvadc_DataReductionControlMode_6 : IfxEvadc.h

IfxEvadc_DataReductionControlMode_7 : IfxEvadc.h

IfxEvadc_DataReductionControlMode_8 : IfxEvadc.h

IfxEvadc_DataReductionControlMode_9 : IfxEvadc.h

IFXEVADC_DEFAULT_ANALOG_FREQ : IfxEvadc_cfg.h

IfxEvadc_disableAccess() : IfxEvadc.c , IfxEvadc.h

IfxEvadc_disableFastCompareBoundaryFlag() : IfxEvadc.h

IfxEvadc_disableInputBuffer() : IfxEvadc.h

IfxEvadc_disableModule() : IfxEvadc.h

IfxEvadc_disablePostCalibration() : IfxEvadc.h

IfxEvadc_disableQueueSlotExternalTrigger() : IfxEvadc.c , IfxEvadc.h

IfxEvadc_disableReferencePrecharge() : IfxEvadc.h

IfxEvadc_disableServiceRequest() : IfxEvadc.h

IfxEvadc_EMUX00_P02_6_OUT : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_EMUX00_P33_3_OUT : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_EMUX01_P02_7_OUT : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_EMUX01_P33_2_OUT : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_EMUX02_P02_8_OUT : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_EMUX02_P33_1_OUT : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_EMUX10_P00_6_OUT : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_EMUX10_P33_6_OUT : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_EMUX11_P00_7_OUT : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_EMUX11_P33_5_OUT : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_EMUX12_P00_8_OUT : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_EMUX12_P33_4_OUT : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_Emux_Out_pinTable : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_EmuxCodingScheme : IfxEvadc.h

IfxEvadc_EmuxCodingScheme_binary : IfxEvadc.h

IfxEvadc_EmuxCodingScheme_gray : IfxEvadc.h

IfxEvadc_EmuxInterface : IfxEvadc.h

IfxEvadc_EmuxInterface_0 : IfxEvadc.h

IfxEvadc_EmuxInterface_1 : IfxEvadc.h

IfxEvadc_EmuxSampleTimeControl : IfxEvadc.h

IfxEvadc_EmuxSampleTimeControl_always : IfxEvadc.h

IfxEvadc_EmuxSampleTimeControl_settingChanges : IfxEvadc.h

IfxEvadc_EmuxSelectValue : IfxEvadc.h

IfxEvadc_EmuxSelectValue_0 : IfxEvadc.h

IfxEvadc_EmuxSelectValue_1 : IfxEvadc.h

IfxEvadc_EmuxSelectValue_2 : IfxEvadc.h

IfxEvadc_EmuxSelectValue_3 : IfxEvadc.h

IfxEvadc_EmuxSelectValue_4 : IfxEvadc.h

IfxEvadc_EmuxSelectValue_5 : IfxEvadc.h

IfxEvadc_EmuxSelectValue_6 : IfxEvadc.h

IfxEvadc_EmuxSelectValue_7 : IfxEvadc.h

IfxEvadc_enableAccess() : IfxEvadc.c , IfxEvadc.h

IfxEvadc_enableFastCompareBoundaryFlag() : IfxEvadc.h

IfxEvadc_enableFastCompareSampleSynchronization() : IfxEvadc.h

IfxEvadc_enableFifoMode() : IfxEvadc.h

IfxEvadc_enableInputBuffer() : IfxEvadc.h

IfxEvadc_enableModule() : IfxEvadc.h

IfxEvadc_enableQueueSlotExternalTrigger() : IfxEvadc.c , IfxEvadc.h

IfxEvadc_enableReferencePrecharge() : IfxEvadc.h

IfxEvadc_enableServiceRequest() : IfxEvadc.h

IfxEvadc_enableStartupCalibration() : IfxEvadc.h

IfxEvadc_ExternalMultiplexerMode : IfxEvadc.h

IfxEvadc_ExternalMultiplexerMode_sequence : IfxEvadc.h

IfxEvadc_ExternalMultiplexerMode_singleStep : IfxEvadc.h

IfxEvadc_ExternalMultiplexerMode_softwareControl : IfxEvadc.h

IfxEvadc_ExternalMultiplexerMode_steady : IfxEvadc.h

IfxEvadc_ExternalTriggerPolarity : IfxEvadc.h

IfxEvadc_ExternalTriggerPolarity_direct : IfxEvadc.h

IfxEvadc_ExternalTriggerPolarity_inverted : IfxEvadc.h

IfxEvadc_FastCompareAnalogClockSynchronizationDelay : IfxEvadc.h

IfxEvadc_FastCompareAnalogClockSynchronizationDelay_0 : IfxEvadc.h

IfxEvadc_FastCompareAnalogClockSynchronizationDelay_1 : IfxEvadc.h

IfxEvadc_FastCompareAnalogClockSynchronizationDelay_2 : IfxEvadc.h

IfxEvadc_FastCompareAnalogClockSynchronizationDelay_3 : IfxEvadc.h

IfxEvadc_FastCompareAnalogConverterControl : IfxEvadc.h

IfxEvadc_FastCompareAnalogConverterControl_normal : IfxEvadc.h

IfxEvadc_FastCompareAnalogConverterControl_off : IfxEvadc.h

IfxEvadc_FastCompareAutomaticUpdate : IfxEvadc.h

IfxEvadc_FastCompareAutomaticUpdate_alternateValue : IfxEvadc.h

IfxEvadc_FastCompareAutomaticUpdate_analogSource : IfxEvadc.h

IfxEvadc_FastCompareAutomaticUpdate_rampCounter : IfxEvadc.h

IfxEvadc_FastCompareAutomaticUpdate_sw : IfxEvadc.h

IfxEvadc_FastCompareRunControl : IfxEvadc.h

IfxEvadc_FastCompareRunControl_alwaysRun : IfxEvadc.h

IfxEvadc_FastCompareRunControl_stop : IfxEvadc.h

IfxEvadc_FastCompareServiceRequestGeneration : IfxEvadc.h

IfxEvadc_FastCompareServiceRequestGeneration_newResult : IfxEvadc.h

IfxEvadc_FastCompareServiceRequestGeneration_newValue : IfxEvadc.h

IfxEvadc_FastCompareServiceRequestGeneration_off : IfxEvadc.h

IfxEvadc_FastCompareServiceRequestGeneration_rampEnd : IfxEvadc.h

IfxEvadc_FC0BFLOUT_P00_5_OUT : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_FC0BFLOUT_P33_4_OUT : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_FC0CH0_AN16_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_FC1BFLOUT_P10_1_OUT : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_FC1BFLOUT_P33_6_OUT : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_FC1CH0_P40_10_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_FC2BFLOUT_P00_7_OUT : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_FC2BFLOUT_P33_0_OUT : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_FC2BFLOUT_P33_5_OUT : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_FC2CH0_P00_12_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_FC3BFLOUT_P10_2_OUT : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_FC3BFLOUT_P33_2_OUT : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_FC3BFLOUT_P33_7_OUT : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_FC3CH0_P00_11_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_FifoMode : IfxEvadc.h

IfxEvadc_FifoMode_fifoStructure : IfxEvadc.h

IfxEvadc_FifoMode_maximumMode : IfxEvadc.h

IfxEvadc_FifoMode_minimumMode : IfxEvadc.h

IfxEvadc_FifoMode_seperateResultRegister : IfxEvadc.h

IfxEvadc_G0CH0_AN0_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G0CH1_AN1_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G0CH2_AN2_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G0CH3_AN3_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G0CH4_AN4_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G0CH5_AN5_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G0CH6_AN6_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G0CH7_AN7_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G10CH0_P33_7_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G10CH10_P34_2_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G10CH11_P34_1_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G10CH1_P33_6_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G10CH2_P33_5_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G10CH3_P33_4_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G10CH4_P33_3_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G10CH5_P33_2_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G10CH6_P33_1_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G10CH7_P33_0_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G10CH8_P34_4_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G10CH9_P34_3_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G11CH0_AN4_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G11CH10_P40_2_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G11CH11_P40_3_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G11CH12_P40_4_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G11CH13_P40_5_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G11CH14_AN34_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G11CH15_AN35_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G11CH1_AN5_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G11CH2_AN6_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G11CH3_AN7_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G11CH4_AN8_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G11CH5_AN9_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G11CH6_AN10_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G11CH7_AN11_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G11CH8_P40_11_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G11CH9_P40_12_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G1CH0_AN8_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G1CH1_AN9_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G1CH2_AN10_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G1CH3_AN11_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G1CH4_AN12_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G1CH5_AN13_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G1CH6_AN14_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G1CH7_AN15_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G2CH0_AN16_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G2CH1_P40_10_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G2CH2_P40_11_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G2CH3_P40_12_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G2CH4_AN20_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G2CH5_AN21_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G2CH6_AN22_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G2CH7_AN23_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G3CH0_P40_0_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G3CH1_P40_1_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G3CH2_P40_2_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G3CH3_P40_3_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G3CH4_P40_13_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G3CH5_P40_14_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G3CH6_AN30_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G3CH7_AN31_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G4CH0_AN40_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G4CH1_AN41_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G4CH2_AN42_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G4CH3_AN43_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G4CH4_P40_13_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G4CH5_P40_14_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G4CH6_AN30_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G4CH7_AN31_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G5CH0_AN48_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G5CH1_AN49_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G5CH2_AN50_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G5CH3_AN51_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G5CH4_AN52_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G5CH5_AN53_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G5CH6_P41_4_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G5CH7_P41_5_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G6CH0_AN56_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G6CH1_AN57_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G6CH2_AN58_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G6CH3_AN59_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G6CH4_AN60_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G6CH5_AN61_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G6CH6_P41_6_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G6CH7_P41_7_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G7CH0_P41_8_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G7CH1_AN65_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G7CH2_AN66_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G7CH3_P40_15_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G7CH4_P41_0_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G7CH5_P41_1_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G7CH6_P41_2_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G7CH7_P41_3_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G8CH0_P40_4_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G8CH10_AN42_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G8CH11_AN43_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G8CH12_AN44_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G8CH13_AN45_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G8CH14_AN46_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G8CH15_AN47_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G8CH1_P40_5_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G8CH2_AN34_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G8CH3_AN35_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G8CH4_P40_6_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G8CH5_P40_7_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G8CH6_P40_8_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G8CH7_P40_9_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G8CH8_AN40_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G8CH9_AN41_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G9CH0_P00_12_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G9CH10_P00_2_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G9CH11_P00_1_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G9CH12_P01_5_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G9CH13_P01_4_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G9CH14_P01_3_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G9CH15_P02_11_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G9CH1_P00_11_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G9CH2_P00_10_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G9CH3_P00_9_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G9CH4_P00_8_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G9CH5_P00_7_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G9CH6_P00_6_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G9CH7_P00_5_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G9CH8_P00_4_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_G9CH9_P00_3_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_GateOperatingMode : IfxEvadc.h

IfxEvadc_GateOperatingMode_alternateValueMode : IfxEvadc.h

IfxEvadc_GateOperatingMode_lockBoundaryFlag : IfxEvadc.h

IfxEvadc_GateOperatingMode_noGateFunction : IfxEvadc.h

IfxEvadc_GatingMode : IfxEvadc.h

IfxEvadc_GatingMode_always : IfxEvadc.h

IfxEvadc_GatingMode_disabled : IfxEvadc.h

IfxEvadc_GatingMode_gatingHigh : IfxEvadc.h

IfxEvadc_GatingMode_gatingLow : IfxEvadc.h

IfxEvadc_GatingSource : IfxEvadc.h

IfxEvadc_GatingSource_0 : IfxEvadc.h

IfxEvadc_GatingSource_1 : IfxEvadc.h

IfxEvadc_GatingSource_10 : IfxEvadc.h

IfxEvadc_GatingSource_11 : IfxEvadc.h

IfxEvadc_GatingSource_12 : IfxEvadc.h

IfxEvadc_GatingSource_13 : IfxEvadc.h

IfxEvadc_GatingSource_14 : IfxEvadc.h

IfxEvadc_GatingSource_15 : IfxEvadc.h

IfxEvadc_GatingSource_2 : IfxEvadc.h

IfxEvadc_GatingSource_3 : IfxEvadc.h

IfxEvadc_GatingSource_4 : IfxEvadc.h

IfxEvadc_GatingSource_5 : IfxEvadc.h

IfxEvadc_GatingSource_6 : IfxEvadc.h

IfxEvadc_GatingSource_7 : IfxEvadc.h

IfxEvadc_GatingSource_8 : IfxEvadc.h

IfxEvadc_GatingSource_9 : IfxEvadc.h

IfxEvadc_getAdcAnalogFrequency() : IfxEvadc.h

IfxEvadc_getAdcCalibrationActiveState() : IfxEvadc.h

IfxEvadc_getAdcDigitalFrequency() : IfxEvadc.c , IfxEvadc.h

IfxEvadc_getAdcModuleFrequency() : IfxEvadc.c , IfxEvadc.h

IfxEvadc_getAnalogFunctionConfiguration() : IfxEvadc.h

IfxEvadc_getChannelControlConfig() : IfxEvadc.h

IfxEvadc_getChannelInputclass() : IfxEvadc.h

IfxEvadc_getChannelResultServiceRequestNodePointer0() : IfxEvadc.h

IfxEvadc_getChannelResultServiceRequestNodePointer1() : IfxEvadc.h

IfxEvadc_getChannelServiceRequestNodePointer0() : IfxEvadc.h

IfxEvadc_getChannelServiceRequestNodePointer1() : IfxEvadc.h

IfxEvadc_getEmuxGlobalConversionMode() : IfxEvadc.h

IfxEvadc_getEmuxGlobalSampleTime() : IfxEvadc.h

IfxEvadc_getEmuxGroupConversionMode() : IfxEvadc.h

IfxEvadc_getEmuxGroupSampleTime() : IfxEvadc.h

IfxEvadc_getFastCompareBoundaryFlagStatus() : IfxEvadc.h

IfxEvadc_getFastCompareExternalTriggerLevelStatus() : IfxEvadc.h

IfxEvadc_getFastCompareResultStatus() : IfxEvadc.h

IfxEvadc_getGlobalConfigValue() : IfxEvadc.h

IfxEvadc_getGlobalConversionMode() : IfxEvadc.h

IfxEvadc_getGlobalResult() : IfxEvadc.h

IfxEvadc_getGlobalSampleTime() : IfxEvadc.h

IfxEvadc_getGroupConversionMode() : IfxEvadc.h

IfxEvadc_getGroupResult() : IfxEvadc.h

IfxEvadc_getGroupSampleTime() : IfxEvadc.h

IfxEvadc_getMasterIndex() : IfxEvadc.h

IfxEvadc_getQueueSlotGatingMode() : IfxEvadc.c , IfxEvadc.h

IfxEvadc_getQueueSlotGatingSource() : IfxEvadc.c , IfxEvadc.h

IfxEvadc_getQueueSlotPriority() : IfxEvadc.c , IfxEvadc.h

IfxEvadc_getQueueSlotStartMode() : IfxEvadc.c , IfxEvadc.h

IfxEvadc_getQueueSlotTriggerInput() : IfxEvadc.c , IfxEvadc.h

IfxEvadc_getQueueSlotTriggerMode() : IfxEvadc.c , IfxEvadc.h

IfxEvadc_getQueueStatus() : IfxEvadc.c , IfxEvadc.h

IfxEvadc_getResult() : IfxEvadc.h

IfxEvadc_getResultBasedOnRequestSource() : IfxEvadc.c , IfxEvadc.h

IfxEvadc_getResultRegisterAddress() : IfxEvadc.h

IfxEvadc_getSrcAddress() : IfxEvadc.h

IfxEvadc_getStartupCalibrationStatus() : IfxEvadc.h

IfxEvadc_GroupId : IfxEvadc_cfg.h

IfxEvadc_GroupId_0 : IfxEvadc_cfg.h

IfxEvadc_GroupId_1 : IfxEvadc_cfg.h

IfxEvadc_GroupId_10 : IfxEvadc_cfg.h

IfxEvadc_GroupId_11 : IfxEvadc_cfg.h

IfxEvadc_GroupId_12 : IfxEvadc_cfg.h

IfxEvadc_GroupId_13 : IfxEvadc_cfg.h

IfxEvadc_GroupId_14 : IfxEvadc_cfg.h

IfxEvadc_GroupId_15 : IfxEvadc_cfg.h

IfxEvadc_GroupId_2 : IfxEvadc_cfg.h

IfxEvadc_GroupId_3 : IfxEvadc_cfg.h

IfxEvadc_GroupId_4 : IfxEvadc_cfg.h

IfxEvadc_GroupId_5 : IfxEvadc_cfg.h

IfxEvadc_GroupId_6 : IfxEvadc_cfg.h

IfxEvadc_GroupId_7 : IfxEvadc_cfg.h

IfxEvadc_GroupId_8 : IfxEvadc_cfg.h

IfxEvadc_GroupId_9 : IfxEvadc_cfg.h

IfxEvadc_GroupId_global0 : IfxEvadc_cfg.h

IfxEvadc_GroupId_global1 : IfxEvadc_cfg.h

IfxEvadc_GxBfl_Out_pinTable : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_IdlePrecharge : IfxEvadc.h

IfxEvadc_IdlePrecharge_currentLevel : IfxEvadc.h

IfxEvadc_IdlePrecharge_referenceBy2 : IfxEvadc.h

IfxEvadc_initEmuxPin() : IfxEvadc.h

IfxEvadc_initGxBflPin() : IfxEvadc.h

IfxEvadc_initialiseAdcConverterClock() : IfxEvadc.h

IfxEvadc_initializeFAdcI() : IfxEvadc.c , IfxEvadc.h

IfxEvadc_initiateStartupCalibration() : IfxEvadc.h

IfxEvadc_InputClasses : IfxEvadc.h

IfxEvadc_InputClasses_global0 : IfxEvadc.h

IfxEvadc_InputClasses_global1 : IfxEvadc.h

IfxEvadc_InputClasses_group0 : IfxEvadc.h

IfxEvadc_InputClasses_group1 : IfxEvadc.h

IfxEvadc_isFastCompareNewResultAvailable() : IfxEvadc.h

IfxEvadc_isModuleEnabled() : IfxEvadc.h

IfxEvadc_isModuleSuspended() : IfxEvadc.h

IfxEvadc_isRequestQueueSlotEnabled() : IfxEvadc.c , IfxEvadc.h

IfxEvadc_LimitCheck : IfxEvadc.h

IfxEvadc_LimitCheck_always : IfxEvadc.h

IfxEvadc_LimitCheck_eventIfInArea : IfxEvadc.h

IfxEvadc_LimitCheck_eventIfOutsideArea : IfxEvadc.h

IfxEvadc_LimitCheck_noCheck : IfxEvadc.h

IFXEVADC_MAXIMUM_BITFIELDS_IN_ACCPROT0_REGISTER : IfxEvadc_cfg.h

IFXEVADC_MAXIMUM_BITFIELDS_IN_ACCPROT1_REGISTER : IfxEvadc_cfg.h

IfxEvadc_MsbConversionTime : IfxEvadc.h

IfxEvadc_MsbConversionTime_doubleClockCycle : IfxEvadc.h

IfxEvadc_MsbConversionTime_singleClockCycle : IfxEvadc.h

IFXEVADC_NUM_ADC_CAL_GROUPS : IfxEvadc_cfg.h

IFXEVADC_NUM_ADC_COMMON_GROUPS : IfxEvadc_cfg.h

IFXEVADC_NUM_ADC_GROUPS : IfxEvadc_cfg.h

IFXEVADC_NUM_ADC_PRIMARY_GROUPS : IfxEvadc_cfg.h

IFXEVADC_NUM_ADC_SECONDARY_GROUPS : IfxEvadc_cfg.h

IFXEVADC_NUM_CHAN_PER_PRIM_GROUP : IfxEvadc_cfg.h

IFXEVADC_NUM_CHAN_PER_SEC_GROUP : IfxEvadc_cfg.h

IFXEVADC_NUM_FAST_COMPARE_CHANNELS : IfxEvadc_cfg.h

IFXEVADC_NUM_GLOBAL_INPUTCLASSES : IfxEvadc_cfg.h

IFXEVADC_NUM_INPUTCLASSES : IfxEvadc_cfg.h

IFXEVADC_NUM_REQUESTSLOTS : IfxEvadc_cfg.h

IFXEVADC_PINMAP_EMUX_OUT_NUM_ITEMS : IfxEvadc_PinMap.h

IFXEVADC_PINMAP_GXBFL_OUT_NUM_ITEMS : IfxEvadc_PinMap.h

IFXEVADC_PINMAP_NUM_GROUPS : IfxEvadc_PinMap.h

IFXEVADC_PINMAP_NUM_MODULES : IfxEvadc_PinMap.h

IFXEVADC_PINMAP_VADCG_IN_NUM_ITEMS : IfxEvadc_PinMap.h

IfxEvadc_Protection : IfxEvadc.h

IfxEvadc_Protection_channelControl0 : IfxEvadc.h

IfxEvadc_Protection_channelControl1 : IfxEvadc.h

IfxEvadc_Protection_channelControl10 : IfxEvadc.h

IfxEvadc_Protection_channelControl11 : IfxEvadc.h

IfxEvadc_Protection_channelControl12 : IfxEvadc.h

IfxEvadc_Protection_channelControl13 : IfxEvadc.h

IfxEvadc_Protection_channelControl14 : IfxEvadc.h

IfxEvadc_Protection_channelControl2 : IfxEvadc.h

IfxEvadc_Protection_channelControl3 : IfxEvadc.h

IfxEvadc_Protection_channelControl4 : IfxEvadc.h

IfxEvadc_Protection_channelControl5 : IfxEvadc.h

IfxEvadc_Protection_channelControl6 : IfxEvadc.h

IfxEvadc_Protection_channelControl7 : IfxEvadc.h

IfxEvadc_Protection_channelControl8 : IfxEvadc.h

IfxEvadc_Protection_channelControl9 : IfxEvadc.h

IfxEvadc_Protection_externalMultiplexer : IfxEvadc.h

IfxEvadc_Protection_globalConfig : IfxEvadc.h

IfxEvadc_Protection_initFastCompareChannel0 : IfxEvadc.h

IfxEvadc_Protection_initFastCompareChannel1 : IfxEvadc.h

IfxEvadc_Protection_initFastCompareChannel2 : IfxEvadc.h

IfxEvadc_Protection_initFastCompareChannel3 : IfxEvadc.h

IfxEvadc_Protection_initFastCompareChannel4 : IfxEvadc.h

IfxEvadc_Protection_initFastCompareChannel5 : IfxEvadc.h

IfxEvadc_Protection_initFastCompareChannel6 : IfxEvadc.h

IfxEvadc_Protection_initFastCompareChannel7 : IfxEvadc.h

IfxEvadc_Protection_initGroup0 : IfxEvadc.h

IfxEvadc_Protection_initGroup1 : IfxEvadc.h

IfxEvadc_Protection_initGroup10 : IfxEvadc.h

IfxEvadc_Protection_initGroup11 : IfxEvadc.h

IfxEvadc_Protection_initGroup12 : IfxEvadc.h

IfxEvadc_Protection_initGroup13 : IfxEvadc.h

IfxEvadc_Protection_initGroup14 : IfxEvadc.h

IfxEvadc_Protection_initGroup2 : IfxEvadc.h

IfxEvadc_Protection_initGroup3 : IfxEvadc.h

IfxEvadc_Protection_initGroup4 : IfxEvadc.h

IfxEvadc_Protection_initGroup5 : IfxEvadc.h

IfxEvadc_Protection_initGroup6 : IfxEvadc.h

IfxEvadc_Protection_initGroup7 : IfxEvadc.h

IfxEvadc_Protection_initGroup8 : IfxEvadc.h

IfxEvadc_Protection_initGroup9 : IfxEvadc.h

IfxEvadc_Protection_resultRegisterGroup0 : IfxEvadc.h

IfxEvadc_Protection_resultRegisterGroup1 : IfxEvadc.h

IfxEvadc_Protection_resultRegisterGroup10 : IfxEvadc.h

IfxEvadc_Protection_resultRegisterGroup11 : IfxEvadc.h

IfxEvadc_Protection_resultRegisterGroup12 : IfxEvadc.h

IfxEvadc_Protection_resultRegisterGroup13 : IfxEvadc.h

IfxEvadc_Protection_resultRegisterGroup14 : IfxEvadc.h

IfxEvadc_Protection_resultRegisterGroup2 : IfxEvadc.h

IfxEvadc_Protection_resultRegisterGroup3 : IfxEvadc.h

IfxEvadc_Protection_resultRegisterGroup4 : IfxEvadc.h

IfxEvadc_Protection_resultRegisterGroup5 : IfxEvadc.h

IfxEvadc_Protection_resultRegisterGroup6 : IfxEvadc.h

IfxEvadc_Protection_resultRegisterGroup7 : IfxEvadc.h

IfxEvadc_Protection_resultRegisterGroup8 : IfxEvadc.h

IfxEvadc_Protection_resultRegisterGroup9 : IfxEvadc.h

IfxEvadc_Protection_serviceGroup0 : IfxEvadc.h

IfxEvadc_Protection_serviceGroup1 : IfxEvadc.h

IfxEvadc_Protection_serviceGroup10 : IfxEvadc.h

IfxEvadc_Protection_serviceGroup11 : IfxEvadc.h

IfxEvadc_Protection_serviceGroup12 : IfxEvadc.h

IfxEvadc_Protection_serviceGroup13 : IfxEvadc.h

IfxEvadc_Protection_serviceGroup14 : IfxEvadc.h

IfxEvadc_Protection_serviceGroup2 : IfxEvadc.h

IfxEvadc_Protection_serviceGroup3 : IfxEvadc.h

IfxEvadc_Protection_serviceGroup4 : IfxEvadc.h

IfxEvadc_Protection_serviceGroup5 : IfxEvadc.h

IfxEvadc_Protection_serviceGroup6 : IfxEvadc.h

IfxEvadc_Protection_serviceGroup7 : IfxEvadc.h

IfxEvadc_Protection_serviceGroup8 : IfxEvadc.h

IfxEvadc_Protection_serviceGroup9 : IfxEvadc.h

IfxEvadc_Protection_testFunction : IfxEvadc.h

IFXEVADC_QUEUE_REFILL : IfxEvadc_cfg.h

IfxEvadc_RampDirection : IfxEvadc.h

IfxEvadc_RampDirection_down : IfxEvadc.h

IfxEvadc_RampDirection_up : IfxEvadc.h

IfxEvadc_RampRunControl : IfxEvadc.h

IfxEvadc_RampRunControl_1 : IfxEvadc.h

IfxEvadc_RampRunControl_2 : IfxEvadc.h

IfxEvadc_RampRunControl_3 : IfxEvadc.h

IfxEvadc_RampRunControl_stop : IfxEvadc.h

IfxEvadc_ReferencePrechargeControl : IfxEvadc.h

IfxEvadc_ReferencePrechargeControl_singleClockPeriod : IfxEvadc.h

IfxEvadc_ReferencePrechargeControl_singleClockPhase : IfxEvadc.h

IfxEvadc_RequestSlotPriority : IfxEvadc.h

IfxEvadc_RequestSlotPriority_high : IfxEvadc.h

IfxEvadc_RequestSlotPriority_highest : IfxEvadc.h

IfxEvadc_RequestSlotPriority_low : IfxEvadc.h

IfxEvadc_RequestSlotPriority_lowest : IfxEvadc.h

IfxEvadc_RequestSlotStartMode : IfxEvadc.h

IfxEvadc_RequestSlotStartMode_cancelInjectRepeat : IfxEvadc.h

IfxEvadc_RequestSlotStartMode_waitForStart : IfxEvadc.h

IfxEvadc_RequestSource : IfxEvadc.h

IfxEvadc_RequestSource_queue0 : IfxEvadc.h

IfxEvadc_RequestSource_queue1 : IfxEvadc.h

IfxEvadc_RequestSource_queue2 : IfxEvadc.h

IfxEvadc_resetGroup() : IfxEvadc.h

IfxEvadc_resetModule() : IfxEvadc.c , IfxEvadc.h

IfxEvadc_SampleSynchronization : IfxEvadc.h

IfxEvadc_SampleSynchronization_off : IfxEvadc.h

IfxEvadc_SampleSynchronization_synchronizeSampleTiming : IfxEvadc.h

IFXEVADC_SAMPLETIME_MIN : IfxEvadc_cfg.h

IfxEvadc_selectDoubleClockForMSBConversion() : IfxEvadc.h

IfxEvadc_selectFastCompareBoundaryFlagActivationMode() : IfxEvadc.h

IfxEvadc_selectFastCompareBoundaryFlagNodePointer() : IfxEvadc.h

IfxEvadc_selectIdlePrechargeLevel() : IfxEvadc.h

IfxEvadc_selectQueueGatingMode() : IfxEvadc.h

IfxEvadc_setAnalogClockSynchronizationDelay() : IfxEvadc.h

IfxEvadc_setAnalogConvertControl() : IfxEvadc.h

IfxEvadc_setAnalogInputPrechargeControlEMUX() : IfxEvadc.h

IfxEvadc_setAnalogInputPrechargeControlStandard() : IfxEvadc.h

IfxEvadc_setArbiterPriority() : IfxEvadc.c , IfxEvadc.h

IfxEvadc_setBoundaryMode() : IfxEvadc.h

IfxEvadc_setCalibrationSampleTime() : IfxEvadc.h

IfxEvadc_setChannelEventNodePointer0() : IfxEvadc.h

IfxEvadc_setChannelEventNodePointer1() : IfxEvadc.h

IfxEvadc_setChannelInputClass() : IfxEvadc.h

IfxEvadc_setChannelLimitCheckMode() : IfxEvadc.h

IfxEvadc_setChannelRequest() : IfxEvadc.h

IfxEvadc_setDataModificationMode() : IfxEvadc.h

IfxEvadc_setDataReductionControlMode() : IfxEvadc.h

IfxEvadc_setEmuxGlobalConversionMode() : IfxEvadc.h

IfxEvadc_setEmuxGlobalSampleTime() : IfxEvadc.h

IfxEvadc_setEmuxGroupConversionMode() : IfxEvadc.h

IfxEvadc_setEmuxGroupSampletime() : IfxEvadc.h

IfxEvadc_setEmuxInterfaceForGroup() : IfxEvadc.h

IfxEvadc_setFastCompareAnalogClockSynchronizationDelay() : IfxEvadc.h

IfxEvadc_setFastCompareAnalogConverter() : IfxEvadc.h

IfxEvadc_setFastCompareAnalogInputPrechargeControl() : IfxEvadc.h

IfxEvadc_setFastCompareAnalogInternalClockDivider() : IfxEvadc.h

IfxEvadc_setFastCompareAutomaticUpdateMode() : IfxEvadc.h

IfxEvadc_setFastCompareBoundaryFlagInversion() : IfxEvadc.h

IfxEvadc_setFastCompareBoundaryFlagSwControl() : IfxEvadc.h

IfxEvadc_setFastCompareChannelEventMode() : IfxEvadc.h

IfxEvadc_setFastCompareExternalTriggerPolarity() : IfxEvadc.h

IfxEvadc_setFastCompareGateOperatingMode() : IfxEvadc.h

IfxEvadc_setFastCompareRampDirection() : IfxEvadc.h

IfxEvadc_setFastCompareReferencePrechargeDuration() : IfxEvadc.h

IfxEvadc_setFastCompareReferenceValue() : IfxEvadc.h

IfxEvadc_setFastCompareRunControl() : IfxEvadc.h

IfxEvadc_setFastCompareRunRampControl() : IfxEvadc.h

IfxEvadc_setFastCompareSampleTimeControl() : IfxEvadc.h

IfxEvadc_setFastCompareServiceRequestGeneration() : IfxEvadc.h

IfxEvadc_setFastCompareTriggerInterval() : IfxEvadc.h

IfxEvadc_setFastCompareTriggerOperatingMode() : IfxEvadc.h

IfxEvadc_setFifoMode() : IfxEvadc.h

IfxEvadc_setGlobalConversionMode() : IfxEvadc.h

IfxEvadc_setGlobalSampleTime() : IfxEvadc.h

IfxEvadc_setGroupConversionMode() : IfxEvadc.h

IfxEvadc_setGroupConversionModeEMUX() : IfxEvadc.h

IfxEvadc_setGroupSampleTime() : IfxEvadc.h

IfxEvadc_setGroupSampleTimeEMUX() : IfxEvadc.h

IfxEvadc_setLowerBoundary() : IfxEvadc.h

IfxEvadc_setMasterIndex() : IfxEvadc.h

IfxEvadc_setQueueSlotGatingConfig() : IfxEvadc.c , IfxEvadc.h

IfxEvadc_setQueueSlotTriggerOperatingConfig() : IfxEvadc.c , IfxEvadc.h

IfxEvadc_setReferenceInput() : IfxEvadc.h

IfxEvadc_setReferencePrechargeDuration() : IfxEvadc.h

IfxEvadc_setResultNodeEventPointer0() : IfxEvadc.h

IfxEvadc_setResultNodeEventPointer1() : IfxEvadc.h

IfxEvadc_setResultPosition() : IfxEvadc.h

IfxEvadc_setSampleSynchronizationMode() : IfxEvadc.h

IfxEvadc_setSleepMode() : IfxEvadc.h

IfxEvadc_setSuspendMode() : IfxEvadc.h

IfxEvadc_setSyncRequest() : IfxEvadc.h

IfxEvadc_setUpperBoundary() : IfxEvadc.h

IfxEvadc_SleepMode : IfxEvadc.h

IfxEvadc_SleepMode_disable : IfxEvadc.h

IfxEvadc_SleepMode_enable : IfxEvadc.h

IfxEvadc_spreadEarlySamplePointEMUXConversions() : IfxEvadc.h

IfxEvadc_SpreadEarlySamplePointEMUXConversionsMode : IfxEvadc.h

IfxEvadc_SpreadEarlySamplePointEMUXConversionsMode_nominal : IfxEvadc.h

IfxEvadc_SpreadEarlySamplePointEMUXConversionsMode_spread : IfxEvadc.h

IfxEvadc_spreadEarlySamplePointStandardConversions() : IfxEvadc.h

IfxEvadc_SpreadEarlySamplePointStandardConversionsMode : IfxEvadc.h

IfxEvadc_SpreadEarlySamplePointStandardConversionsMode_nominal : IfxEvadc.h

IfxEvadc_SpreadEarlySamplePointStandardConversionsMode_spread : IfxEvadc.h

IfxEvadc_SrcNr : IfxEvadc.h

IfxEvadc_SrcNr_group0 : IfxEvadc.h

IfxEvadc_SrcNr_group1 : IfxEvadc.h

IfxEvadc_SrcNr_group2 : IfxEvadc.h

IfxEvadc_SrcNr_group3 : IfxEvadc.h

IfxEvadc_SrcNr_shared0 : IfxEvadc.h

IfxEvadc_SrcNr_shared1 : IfxEvadc.h

IfxEvadc_SrcNr_shared2 : IfxEvadc.h

IfxEvadc_SrcNr_shared3 : IfxEvadc.h

IfxEvadc_startQueue() : IfxEvadc.h

IfxEvadc_StartupCalibration : IfxEvadc.h

IfxEvadc_startupCalibration() : IfxEvadc.c , IfxEvadc.h

IfxEvadc_StartupCalibration_initiate : IfxEvadc.h

IfxEvadc_StartupCalibration_noAction : IfxEvadc.h

IfxEvadc_Status : IfxEvadc.h

IfxEvadc_Status_channelsStillPending : IfxEvadc.h

IfxEvadc_Status_invalidChannel : IfxEvadc.h

IfxEvadc_Status_invalidGroup : IfxEvadc.h

IfxEvadc_Status_noAccess : IfxEvadc.h

IfxEvadc_Status_noError : IfxEvadc.h

IfxEvadc_Status_notInitialised : IfxEvadc.h

IfxEvadc_Status_queueFull : IfxEvadc.h

IfxEvadc_storeGroupResult() : IfxEvadc.h

IfxEvadc_SupplyVoltageLevelControl : IfxEvadc.h

IfxEvadc_SupplyVoltageLevelControl_automaticControl : IfxEvadc.h

IfxEvadc_SupplyVoltageLevelControl_lowerVoltage : IfxEvadc.h

IfxEvadc_SupplyVoltageLevelControl_upperVoltage : IfxEvadc.h

IfxEvadc_SuspendMode : IfxEvadc.h

IfxEvadc_SuspendMode_hard : IfxEvadc.h

IfxEvadc_SuspendMode_none : IfxEvadc.h

IfxEvadc_SuspendMode_soft : IfxEvadc.h

IfxEvadc_syncConvWorkAround() : IfxEvadc.c , IfxEvadc.h

IfxEvadc_TriggerMode : IfxEvadc.h

IfxEvadc_TriggerMode_noExternalTrigger : IfxEvadc.h

IfxEvadc_TriggerMode_uponAnyEdge : IfxEvadc.h

IfxEvadc_TriggerMode_uponFallingEdge : IfxEvadc.h

IfxEvadc_TriggerMode_uponRisingEdge : IfxEvadc.h

IfxEvadc_TriggerOperatingMode : IfxEvadc.h

IfxEvadc_TriggerOperatingMode_anyEdge : IfxEvadc.h

IfxEvadc_TriggerOperatingMode_fallingEdge : IfxEvadc.h

IfxEvadc_TriggerOperatingMode_noExternalTrigger : IfxEvadc.h

IfxEvadc_TriggerOperatingMode_risingEdge : IfxEvadc.h

IfxEvadc_TriggerSource : IfxEvadc.h

IfxEvadc_TriggerSource_0 : IfxEvadc.h

IfxEvadc_TriggerSource_1 : IfxEvadc.h

IfxEvadc_TriggerSource_10 : IfxEvadc.h

IfxEvadc_TriggerSource_11 : IfxEvadc.h

IfxEvadc_TriggerSource_12 : IfxEvadc.h

IfxEvadc_TriggerSource_13 : IfxEvadc.h

IfxEvadc_TriggerSource_14 : IfxEvadc.h

IfxEvadc_TriggerSource_15 : IfxEvadc.h

IfxEvadc_TriggerSource_2 : IfxEvadc.h

IfxEvadc_TriggerSource_3 : IfxEvadc.h

IfxEvadc_TriggerSource_4 : IfxEvadc.h

IfxEvadc_TriggerSource_5 : IfxEvadc.h

IfxEvadc_TriggerSource_6 : IfxEvadc.h

IfxEvadc_TriggerSource_7 : IfxEvadc.h

IfxEvadc_TriggerSource_8 : IfxEvadc.h

IfxEvadc_TriggerSource_9 : IfxEvadc.h

IfxEvadc_Vadcg_In_pinTable : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h

IfxEvadc_WaitForRead : IfxEvadc.h

IfxEvadc_WaitForRead_enabled : IfxEvadc.h

IfxEvadc_WaitForRead_overwriteMode : IfxEvadc.h

IfxFce_clearCrcErrorFlags() : IfxFce.h

IfxFce_Crc_calculateCrc() : IfxFce_Crc.c , IfxFce_Crc.h

IfxFce_Crc_clearErrorFlags() : IfxFce_Crc.c , IfxFce_Crc.h

IfxFce_Crc_deInitModule() : IfxFce_Crc.c , IfxFce_Crc.h

IfxFce_Crc_getInterruptStatus() : IfxFce_Crc.c , IfxFce_Crc.h

IfxFce_Crc_initCrc() : IfxFce_Crc.c , IfxFce_Crc.h

IfxFce_Crc_initCrcConfig() : IfxFce_Crc.c , IfxFce_Crc.h

IfxFce_Crc_initModule() : IfxFce_Crc.c , IfxFce_Crc.h

IfxFce_Crc_initModuleConfig() : IfxFce_Crc.c , IfxFce_Crc.h

IfxFce_CrcChannel : IfxFce.h

IfxFce_CrcChannel_0 : IfxFce.h

IfxFce_CrcChannel_1 : IfxFce.h

IfxFce_CrcChannel_2 : IfxFce.h

IfxFce_CrcChannel_3 : IfxFce.h

IfxFce_CrcChannel_4 : IfxFce.h

IfxFce_CrcChannel_5 : IfxFce.h

IfxFce_CrcChannel_6 : IfxFce.h

IfxFce_CrcChannel_7 : IfxFce.h

IfxFce_CrcKernel : IfxFce.h

IfxFce_CrcKernel_0 : IfxFce.h

IfxFce_CrcKernel_1 : IfxFce.h

IfxFce_CrcKernel_2 : IfxFce.h

IfxFce_CrcKernel_3 : IfxFce.h

IfxFce_disableModule() : IfxFce.h

IfxFce_enableModule() : IfxFce.h

IfxFce_getCrcInterruptStatus() : IfxFce.h

IfxFce_getSrcPointer() : IfxFce.h

IFXFCE_NUM_KERNEL : IfxFce_cfg.h

IFXFCE_NUM_MODULES : IfxFce_cfg.h

IfxFce_reflectCrc32() : IfxFce.c , IfxFce.h

IfxFce_resetModule() : IfxFce.c , IfxFce.h

IfxFce_setChannelCrcLength() : IfxFce.h

IfxFce_setCrcstartValue() : IfxFce.h

IfxFce_setExpectedCrc() : IfxFce.h

IfxFlash_clearStatus() : IfxFlash.h

IFXFLASH_CMD_BASE_ADDRESS : IfxFlash_cfg.h

IFXFLASH_CMD_BASE_OFFSET : IfxFlash_cfg.h

IFXFLASH_DFLASH_BANKS : IfxFlash_cfg.h

IFXFLASH_DFLASH_BURST_LENGTH : IfxFlash_cfg.h

IFXFLASH_DFLASH_END : IfxFlash_cfg.h

IFXFLASH_DFLASH_NUM_CFS_LOG_SECTORS : IfxFlash_cfg.h

IFXFLASH_DFLASH_NUM_HSM_LOG_SECTORS : IfxFlash_cfg.h

IFXFLASH_DFLASH_NUM_LOG_SECTORS : IfxFlash_cfg.h

IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS : IfxFlash_cfg.h

IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS : IfxFlash_cfg.h

IFXFLASH_DFLASH_PAGE_LENGTH : IfxFlash_cfg.h

IFXFLASH_DFLASH_SIZE : IfxFlash_cfg.h

IFXFLASH_DFLASH_START : IfxFlash_cfg.h

IFXFLASH_DFLASH_WORDLINE_LENGTH : IfxFlash_cfg.h

IfxFlash_dFlashTableCfsLog : IfxFlash_cfg.c , IfxFlash_cfg.h

IfxFlash_dFlashTableEepLog : IfxFlash_cfg.c , IfxFlash_cfg.h

IfxFlash_dFlashTableHsmLog : IfxFlash_cfg.c , IfxFlash_cfg.h

IfxFlash_dFlashTablePhys : IfxFlash_cfg.c , IfxFlash_cfg.h

IfxFlash_dFlashTableUcbLog : IfxFlash_cfg.c , IfxFlash_cfg.h

IfxFlash_disableWriteProtection() : IfxFlash.c , IfxFlash.h

IfxFlash_enterCrankingMode() : IfxFlash.h

IfxFlash_enterDemandMode() : IfxFlash.h

IfxFlash_enterDynamicIdleMode() : IfxFlash.h

IfxFlash_enterPageMode() : IfxFlash.h

IfxFlash_eraseMultipleSectors() : IfxFlash.h

IfxFlash_eraseSector() : IfxFlash.h

IfxFlash_eraseVerifyMultipleSectors() : IfxFlash.h

IfxFlash_eraseVerifySector() : IfxFlash.h

IFXFLASH_ERROR_TRACKING_MAX_CORRECTABLE_ERRORS : IfxFlash_cfg.h

IFXFLASH_ERROR_TRACKING_MAX_UNCORRECTABLE_ERRORS : IfxFlash_cfg.h

IfxFlash_exitCrankingMode() : IfxFlash.h

IfxFlash_exitDemandMode() : IfxFlash.h

IfxFlash_exitDynamicIdleMode() : IfxFlash.h

IfxFlash_FlashType : IfxFlash_cfg.h

IfxFlash_FlashType_D0 : IfxFlash_cfg.h

IfxFlash_FlashType_D1 : IfxFlash_cfg.h

IfxFlash_FlashType_Fa : IfxFlash_cfg.h

IfxFlash_FlashType_P0 : IfxFlash_cfg.h

IfxFlash_FlashType_P1 : IfxFlash_cfg.h

IfxFlash_FlashType_P2 : IfxFlash_cfg.h

IfxFlash_FlashType_P3 : IfxFlash_cfg.h

IfxFlash_isCrankingMode() : IfxFlash.h

IfxFlash_isDemandMode() : IfxFlash.h

IfxFlash_isDynamicIdleMode() : IfxFlash.h

IfxFlash_loadPage() : IfxFlash.h

IfxFlash_loadPage2X32() : IfxFlash.h

IFXFLASH_NUM_FLASH_MODULES : IfxFlash_cfg.h

IFXFLASH_NUM_MODULES : IfxFlash_cfg.h

IFXFLASH_PFLASH_BANKS : IfxFlash_cfg.h

IFXFLASH_PFLASH_BURST_LENGTH : IfxFlash_cfg.h

IFXFLASH_PFLASH_END : IfxFlash_cfg.h

IFXFLASH_PFLASH_NUM_LOG_SECTORS : IfxFlash_cfg.h

IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS : IfxFlash_cfg.h

IFXFLASH_PFLASH_OFFSET : IfxFlash_cfg.h

IFXFLASH_PFLASH_P0_END : IfxFlash_cfg.h

IFXFLASH_PFLASH_P0_SIZE : IfxFlash_cfg.h

IFXFLASH_PFLASH_P0_START : IfxFlash_cfg.h

IFXFLASH_PFLASH_P1_END : IfxFlash_cfg.h

IFXFLASH_PFLASH_P1_SIZE : IfxFlash_cfg.h

IFXFLASH_PFLASH_P1_START : IfxFlash_cfg.h

IFXFLASH_PFLASH_P2_END : IfxFlash_cfg.h

IFXFLASH_PFLASH_P2_SIZE : IfxFlash_cfg.h

IFXFLASH_PFLASH_P2_START : IfxFlash_cfg.h

IFXFLASH_PFLASH_P3_END : IfxFlash_cfg.h

IFXFLASH_PFLASH_P3_SIZE : IfxFlash_cfg.h

IFXFLASH_PFLASH_P3_START : IfxFlash_cfg.h

IFXFLASH_PFLASH_PAGE_LENGTH : IfxFlash_cfg.h

IFXFLASH_PFLASH_SIZE : IfxFlash_cfg.h

IFXFLASH_PFLASH_START : IfxFlash_cfg.h

IFXFLASH_PFLASH_WORDLINE_LENGTH : IfxFlash_cfg.h

IfxFlash_pFlashTableLog : IfxFlash_cfg.c , IfxFlash_cfg.h

IfxFlash_pFlashTablePhys : IfxFlash_cfg.c , IfxFlash_cfg.h

IfxFlash_replaceLogicalSector() : IfxFlash.h

IfxFlash_resetToRead() : IfxFlash.h

IfxFlash_resumeProtection() : IfxFlash.h

IfxFlash_suspendResumeMultipleSectors() : IfxFlash.h

IfxFlash_suspendResumeSector() : IfxFlash.h

IfxFlash_UcbType : IfxFlash_cfg.h

IfxFlash_UcbType_ucbDebug : IfxFlash_cfg.h

IfxFlash_UcbType_ucbDflash : IfxFlash_cfg.h

IfxFlash_UcbType_ucbPflash : IfxFlash_cfg.h

IfxFlash_UcbType_ucbRetest : IfxFlash_cfg.h

IfxFlash_userContentCount() : IfxFlash.h

IfxFlash_userMarginCount() : IfxFlash.h

IfxFlash_userVthCount() : IfxFlash.h

IfxFlash_verifyErasedPage() : IfxFlash.h

IfxFlash_verifyErasedWordLine() : IfxFlash.h

IfxFlash_waitUnbusy() : IfxFlash.h

IfxFlash_waitUnbusyAll() : IfxFlash.h

IfxFlash_writeBurst() : IfxFlash.h

IfxFlash_writeBurstOnce() : IfxFlash.h

IfxFlash_writePage() : IfxFlash.h

IfxFlash_writePageOnce() : IfxFlash.h

IfxGeth_cfg_indexMap : IfxGeth_cfg.c , IfxGeth_cfg.h

IfxGeth_Col_In_pinTable : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_COL_P11_15_IN : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_Crs_In_pinTable : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_CRSA_P11_14_IN : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_CRSB_P11_11_IN : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_Crsdv_In_pinTable : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_CRSDVA_P11_11_IN : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_CRSDVB_P11_14_IN : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_disableModule() : IfxGeth.c , IfxGeth.h

IfxGeth_dma_applySoftwareReset() : IfxGeth.h

IfxGeth_dma_clearAllInterruptFlags() : IfxGeth.h

IfxGeth_dma_clearInterruptFlag() : IfxGeth.h

IfxGeth_dma_disableInterrupt() : IfxGeth.h

IfxGeth_dma_enableInterrupt() : IfxGeth.h

IfxGeth_dma_isInterruptFlagSet() : IfxGeth.h

IfxGeth_dma_isSoftwareResetDone() : IfxGeth.h

IfxGeth_dma_setAddressAlignedBeats() : IfxGeth.h

IfxGeth_dma_setFixedBurst() : IfxGeth.h

IfxGeth_dma_setMixedBurst() : IfxGeth.h

IfxGeth_dma_setRxBufferSize() : IfxGeth.h

IfxGeth_dma_setRxDescriptorListAddress() : IfxGeth.h

IfxGeth_dma_setRxDescriptorRingLength() : IfxGeth.h

IfxGeth_dma_setRxDescriptorTailPointer() : IfxGeth.h

IfxGeth_dma_setRxMaxBurstLength() : IfxGeth.h

IfxGeth_dma_setTxDescriptorListAddress() : IfxGeth.h

IfxGeth_dma_setTxDescriptorRingLength() : IfxGeth.h

IfxGeth_dma_setTxDescriptorTailPointer() : IfxGeth.h

IfxGeth_dma_setTxMaxBurstLength() : IfxGeth.h

IfxGeth_dma_startReceiver() : IfxGeth.h

IfxGeth_dma_startTransmitter() : IfxGeth.h

IfxGeth_dma_stopTransmitter() : IfxGeth.h

IfxGeth_DmaBurstLength : IfxGeth.h

IfxGeth_DmaBurstLength_0 : IfxGeth.h

IfxGeth_DmaBurstLength_1 : IfxGeth.h

IfxGeth_DmaBurstLength_16 : IfxGeth.h

IfxGeth_DmaBurstLength_2 : IfxGeth.h

IfxGeth_DmaBurstLength_32 : IfxGeth.h

IfxGeth_DmaBurstLength_4 : IfxGeth.h

IfxGeth_DmaBurstLength_8 : IfxGeth.h

IfxGeth_DmaChannel : IfxGeth.h

IfxGeth_DmaChannel_0 : IfxGeth.h

IfxGeth_DmaChannel_1 : IfxGeth.h

IfxGeth_DmaChannel_2 : IfxGeth.h

IfxGeth_DmaChannel_3 : IfxGeth.h

IfxGeth_DmaInterruptFlag : IfxGeth.h

IfxGeth_DmaInterruptFlag_abnormalInterruptSummary : IfxGeth.h

IfxGeth_DmaInterruptFlag_contextDescriptorError : IfxGeth.h

IfxGeth_DmaInterruptFlag_earlyReceiveInterrupt : IfxGeth.h

IfxGeth_DmaInterruptFlag_earlyTransmitInterrupt : IfxGeth.h

IfxGeth_DmaInterruptFlag_fatalBusError : IfxGeth.h

IfxGeth_DmaInterruptFlag_normalInterruptSummary : IfxGeth.h

IfxGeth_DmaInterruptFlag_receiveBufferUnavailable : IfxGeth.h

IfxGeth_DmaInterruptFlag_receiveInterrupt : IfxGeth.h

IfxGeth_DmaInterruptFlag_receiveStopped : IfxGeth.h

IfxGeth_DmaInterruptFlag_receiveWatchdogTimeout : IfxGeth.h

IfxGeth_DmaInterruptFlag_transmitBufferUnavailable : IfxGeth.h

IfxGeth_DmaInterruptFlag_transmitInterrupt : IfxGeth.h

IfxGeth_DmaInterruptFlag_transmitStopped : IfxGeth.h

IfxGeth_DuplexMode : IfxGeth.h

IfxGeth_DuplexMode_fullDuplex : IfxGeth.h

IfxGeth_DuplexMode_halfDuplex : IfxGeth.h

IfxGeth_enableModule() : IfxGeth.c , IfxGeth.h

IfxGeth_Eth_configureDMA() : IfxGeth_Eth.c , IfxGeth_Eth.h

IfxGeth_Eth_configureMacCore() : IfxGeth_Eth.c , IfxGeth_Eth.h

IfxGeth_Eth_configureMTL() : IfxGeth_Eth.c , IfxGeth_Eth.h

IfxGeth_Eth_freeReceiveBuffer() : IfxGeth_Eth.c , IfxGeth_Eth.h

IfxGeth_Eth_getActualRxDescriptor() : IfxGeth_Eth.h

IfxGeth_Eth_getActualTxDescriptor() : IfxGeth_Eth.h

IfxGeth_Eth_getBaseRxDescriptor() : IfxGeth_Eth.h

IfxGeth_Eth_getBaseTxDescriptor() : IfxGeth_Eth.h

IfxGeth_Eth_getReceiveBuffer() : IfxGeth_Eth.c , IfxGeth_Eth.h

IfxGeth_Eth_getTransmitBuffer() : IfxGeth_Eth.c , IfxGeth_Eth.h

IfxGeth_Eth_initModule() : IfxGeth_Eth.c , IfxGeth_Eth.h

IfxGeth_Eth_initModuleConfig() : IfxGeth_Eth.c , IfxGeth_Eth.h

IfxGeth_Eth_initReceiveDescriptors() : IfxGeth_Eth.c , IfxGeth_Eth.h

IfxGeth_Eth_initTransmitDescriptors() : IfxGeth_Eth.c , IfxGeth_Eth.h

IfxGeth_Eth_isRxDataAvailable() : IfxGeth_Eth.h

IfxGeth_Eth_rxDescrList : IfxGeth_Eth.c , IfxGeth_Eth.h

IfxGeth_Eth_sendFrame() : IfxGeth_Eth.c , IfxGeth_Eth.h

IfxGeth_Eth_sendTransmitBuffer() : IfxGeth_Eth.c , IfxGeth_Eth.h

IfxGeth_Eth_setupMiiInputPins() : IfxGeth_Eth.c , IfxGeth_Eth.h

IfxGeth_Eth_setupMiiOutputPins() : IfxGeth_Eth.c , IfxGeth_Eth.h

IfxGeth_Eth_setupRgmiiInputPins() : IfxGeth_Eth.c , IfxGeth_Eth.h

IfxGeth_Eth_setupRgmiiOutputPins() : IfxGeth_Eth.c , IfxGeth_Eth.h

IfxGeth_Eth_setupRmiiInputPins() : IfxGeth_Eth.c , IfxGeth_Eth.h

IfxGeth_Eth_setupRmiiOutputPins() : IfxGeth_Eth.c , IfxGeth_Eth.h

IfxGeth_Eth_shuffleRxDescriptor() : IfxGeth_Eth.c , IfxGeth_Eth.h

IfxGeth_Eth_shuffleTxDescriptor() : IfxGeth_Eth.c , IfxGeth_Eth.h

IfxGeth_Eth_startReceiver() : IfxGeth_Eth.c , IfxGeth_Eth.h

IfxGeth_Eth_startReceivers() : IfxGeth_Eth.c , IfxGeth_Eth.h

IfxGeth_Eth_startTransmitter() : IfxGeth_Eth.c , IfxGeth_Eth.h

IfxGeth_Eth_startTransmitters() : IfxGeth_Eth.c , IfxGeth_Eth.h

IfxGeth_Eth_stopTransmitters() : IfxGeth_Eth.c , IfxGeth_Eth.h

IfxGeth_Eth_txDescrList : IfxGeth_Eth.c , IfxGeth_Eth.h

IfxGeth_Eth_waitTransmitBuffer() : IfxGeth_Eth.h

IfxGeth_Eth_wakeupReceiver() : IfxGeth_Eth.c , IfxGeth_Eth.h

IfxGeth_Eth_wakeupTransmitter() : IfxGeth_Eth.c , IfxGeth_Eth.h

IfxGeth_Eth_writeHeader() : IfxGeth_Eth.c , IfxGeth_Eth.h

IfxGeth_getAddress() : IfxGeth.c , IfxGeth.h

IfxGeth_getIndex() : IfxGeth.c , IfxGeth.h

IfxGeth_getSrcPointer() : IfxGeth.c , IfxGeth.h

IfxGeth_Grefclk_In_pinTable : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_GREFCLK_P11_5_IN : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_Index : IfxGeth_cfg.h

IfxGeth_Index_0 : IfxGeth_cfg.h

IfxGeth_Index_none : IfxGeth_cfg.h

IfxGeth_isModuleEnabled() : IfxGeth.h

IfxGeth_LineSpeed : IfxGeth.h

IfxGeth_LineSpeed_1000Mbps : IfxGeth.h

IfxGeth_LineSpeed_100Mbps : IfxGeth.h

IfxGeth_LineSpeed_10Mbps : IfxGeth.h

IfxGeth_LineSpeed_2500Mbps : IfxGeth.h

IfxGeth_LoopbackMode : IfxGeth.h

IfxGeth_LoopbackMode_disable : IfxGeth.h

IfxGeth_LoopbackMode_enable : IfxGeth.h

IfxGeth_mac_disableReceiver() : IfxGeth.h

IfxGeth_mac_disableTransmitter() : IfxGeth.h

IfxGeth_mac_enableReceiver() : IfxGeth.h

IfxGeth_mac_enableTransmitter() : IfxGeth.h

IfxGeth_mac_readQueueVlanTag() : IfxGeth.c , IfxGeth.h

IfxGeth_mac_setAllMulticastPassing() : IfxGeth.h

IfxGeth_mac_setCrcChecking() : IfxGeth.h

IfxGeth_mac_setCrcStripping() : IfxGeth.h

IfxGeth_mac_setDuplexMode() : IfxGeth.h

IfxGeth_mac_setLineSpeed() : IfxGeth.c , IfxGeth.h

IfxGeth_mac_setLoopbackMode() : IfxGeth.h

IfxGeth_mac_setMacAddress() : IfxGeth.c , IfxGeth.h

IfxGeth_mac_setMaxPacketSize() : IfxGeth.c , IfxGeth.h

IfxGeth_mac_setPreambleLength() : IfxGeth.h

IfxGeth_mac_setPromiscuousMode() : IfxGeth.h

IfxGeth_mac_setQueueVlanInsertion() : IfxGeth.h

IfxGeth_mac_setVlanPriorityQueueRouting() : IfxGeth.h

IfxGeth_mac_writeQueueVlanTag() : IfxGeth.c , IfxGeth.h

IFXGETH_MAX_RX_DESCRIPTORS : IfxGeth.h

IFXGETH_MAX_TIMEOUT_VALUE : IfxGeth_cfg.h

IFXGETH_MAX_TX_DESCRIPTORS : IfxGeth.h

IfxGeth_Mdc_Out_pinTable : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_MDC_P02_8_OUT : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_MDC_P12_0_OUT : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_MDC_P21_2_OUT : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_Mdio_InOut_pinTable : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_MDIO_P00_0_INOUT : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_MDIO_P12_1_INOUT : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_MDIO_P21_3_INOUT : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_mtl_clearAllInterruptFlags() : IfxGeth.c , IfxGeth.h

IfxGeth_mtl_clearInterruptFlag() : IfxGeth.c , IfxGeth.h

IfxGeth_mtl_disableInterrupt() : IfxGeth.c , IfxGeth.h

IfxGeth_mtl_disableMulticastFilterFailQueuing() : IfxGeth.h

IfxGeth_mtl_disableUnicastFilterFailQueuing() : IfxGeth.h

IfxGeth_mtl_disableVlanFilterFailQueuing() : IfxGeth.h

IfxGeth_mtl_enableInterrupt() : IfxGeth.c , IfxGeth.h

IfxGeth_mtl_enableMulticastFilterFailQueuing() : IfxGeth.h

IfxGeth_mtl_enableRxQueue() : IfxGeth.h

IfxGeth_mtl_enableTxQueue() : IfxGeth.c , IfxGeth.h

IfxGeth_mtl_enableUnicastFilterFailQueuing() : IfxGeth.h

IfxGeth_mtl_enableVlanFilterFailQueuing() : IfxGeth.h

IfxGeth_mtl_isInterruptFlagSet() : IfxGeth.c , IfxGeth.h

IfxGeth_mtl_setRxArbitrationAlgorithm() : IfxGeth.h

IfxGeth_mtl_setRxForwardErrorPacket() : IfxGeth.c , IfxGeth.h

IfxGeth_mtl_setRxForwardUndersizedGoodPacket() : IfxGeth.c , IfxGeth.h

IfxGeth_mtl_setRxQueueDmaChannelMapping() : IfxGeth.h

IfxGeth_mtl_setRxQueueForDaBasedDmaChannel() : IfxGeth.h

IfxGeth_mtl_setRxQueueSize() : IfxGeth.c , IfxGeth.h

IfxGeth_mtl_setRxStoreAndForward() : IfxGeth.c , IfxGeth.h

IfxGeth_mtl_setTxQueueSize() : IfxGeth.c , IfxGeth.h

IfxGeth_mtl_setTxSchedulingAlgorithm() : IfxGeth.h

IfxGeth_mtl_setTxStoreAndForward() : IfxGeth.c , IfxGeth.h

IfxGeth_MtlInterruptFlag : IfxGeth.h

IfxGeth_MtlInterruptFlag_averageBitsPerSlot : IfxGeth.h

IfxGeth_MtlInterruptFlag_rxQueueOverflow : IfxGeth.h

IfxGeth_MtlInterruptFlag_txQueueUnderflow : IfxGeth.h

IfxGeth_MtlQueue : IfxGeth.h

IfxGeth_MtlQueue_0 : IfxGeth.h

IfxGeth_MtlQueue_1 : IfxGeth.h

IfxGeth_MtlQueue_2 : IfxGeth.h

IfxGeth_MtlQueue_3 : IfxGeth.h

IFXGETH_NUM_DMA_CHANNELS : IfxGeth_cfg.h

IFXGETH_NUM_MODULES : IfxGeth_cfg.h

IFXGETH_NUM_RX_CHANNELS : IfxGeth_cfg.h

IFXGETH_NUM_RX_QUEUES : IfxGeth_cfg.h

IFXGETH_NUM_TX_CHANNELS : IfxGeth_cfg.h

IFXGETH_NUM_TX_QUEUES : IfxGeth_cfg.h

IfxGeth_phy_Clause22_readMDIORegister() : IfxGeth.c , IfxGeth.h

IfxGeth_Phy_Clause22_writeMDIORegister() : IfxGeth.c , IfxGeth.h

IfxGeth_phy_Clause45_readMDIORegister() : IfxGeth.c , IfxGeth.h

IfxGeth_Phy_Clause45_writeMDIORegister() : IfxGeth.c , IfxGeth.h

IFXGETH_PHY_WAIT_GMII_READY : IfxGeth.h

IfxGeth_PhyInterfaceMode : IfxGeth.h

IfxGeth_PhyInterfaceMode_mii : IfxGeth.h

IfxGeth_PhyInterfaceMode_rgmii : IfxGeth.h

IfxGeth_PhyInterfaceMode_rmii : IfxGeth.h

IFXGETH_PINMAP_COL_IN_NUM_ITEMS : IfxGeth_PinMap.h

IFXGETH_PINMAP_CRS_IN_NUM_ITEMS : IfxGeth_PinMap.h

IFXGETH_PINMAP_CRSDV_IN_NUM_ITEMS : IfxGeth_PinMap.h

IFXGETH_PINMAP_GREFCLK_IN_NUM_ITEMS : IfxGeth_PinMap.h

IFXGETH_PINMAP_MDC_OUT_NUM_ITEMS : IfxGeth_PinMap.h

IFXGETH_PINMAP_MDIO_INOUT_NUM_ITEMS : IfxGeth_PinMap.h

IFXGETH_PINMAP_NUM_MODULES : IfxGeth_PinMap.h

IFXGETH_PINMAP_PPS_OUT_NUM_ITEMS : IfxGeth_PinMap.h

IFXGETH_PINMAP_REFCLK_IN_NUM_ITEMS : IfxGeth_PinMap.h

IFXGETH_PINMAP_RXCLK_IN_NUM_ITEMS : IfxGeth_PinMap.h

IFXGETH_PINMAP_RXCTL_IN_NUM_ITEMS : IfxGeth_PinMap.h

IFXGETH_PINMAP_RXD_IN_NUM_ITEMS : IfxGeth_PinMap.h

IFXGETH_PINMAP_RXDV_IN_NUM_ITEMS : IfxGeth_PinMap.h

IFXGETH_PINMAP_RXER_IN_NUM_ITEMS : IfxGeth_PinMap.h

IFXGETH_PINMAP_TXCLK_IN_NUM_ITEMS : IfxGeth_PinMap.h

IFXGETH_PINMAP_TXCLK_OUT_NUM_ITEMS : IfxGeth_PinMap.h

IFXGETH_PINMAP_TXCTL_OUT_NUM_ITEMS : IfxGeth_PinMap.h

IFXGETH_PINMAP_TXD_OUT_NUM_ITEMS : IfxGeth_PinMap.h

IFXGETH_PINMAP_TXEN_OUT_NUM_ITEMS : IfxGeth_PinMap.h

IFXGETH_PINMAP_TXER_OUT_NUM_ITEMS : IfxGeth_PinMap.h

IfxGeth_Pps_Out_pinTable : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_PPS_P14_4_OUT : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_PreambleLength : IfxGeth.h

IfxGeth_PreambleLength_3Bytes : IfxGeth.h

IfxGeth_PreambleLength_5Bytes : IfxGeth.h

IfxGeth_PreambleLength_7Bytes : IfxGeth.h

IfxGeth_QueueSize : IfxGeth.h

IfxGeth_QueueSize_1024Bytes : IfxGeth.h

IfxGeth_QueueSize_1280Bytes : IfxGeth.h

IfxGeth_QueueSize_1536Bytes : IfxGeth.h

IfxGeth_QueueSize_1792Bytes : IfxGeth.h

IfxGeth_QueueSize_2048Bytes : IfxGeth.h

IfxGeth_QueueSize_2304Bytes : IfxGeth.h

IfxGeth_QueueSize_2560Bytes : IfxGeth.h

IfxGeth_QueueSize_256Bytes : IfxGeth.h

IfxGeth_QueueSize_2816Bytes : IfxGeth.h

IfxGeth_QueueSize_3072Bytes : IfxGeth.h

IfxGeth_QueueSize_3328Bytes : IfxGeth.h

IfxGeth_QueueSize_3584Bytes : IfxGeth.h

IfxGeth_QueueSize_3840Bytes : IfxGeth.h

IfxGeth_QueueSize_4096Bytes : IfxGeth.h

IfxGeth_QueueSize_4352Bytes : IfxGeth.h

IfxGeth_QueueSize_4608Bytes : IfxGeth.h

IfxGeth_QueueSize_4864Bytes : IfxGeth.h

IfxGeth_QueueSize_5120Bytes : IfxGeth.h

IfxGeth_QueueSize_512Bytes : IfxGeth.h

IfxGeth_QueueSize_5376Bytes : IfxGeth.h

IfxGeth_QueueSize_5632Bytes : IfxGeth.h

IfxGeth_QueueSize_5888Bytes : IfxGeth.h

IfxGeth_QueueSize_6144Bytes : IfxGeth.h

IfxGeth_QueueSize_6400Bytes : IfxGeth.h

IfxGeth_QueueSize_6656Bytes : IfxGeth.h

IfxGeth_QueueSize_6912Bytes : IfxGeth.h

IfxGeth_QueueSize_7168Bytes : IfxGeth.h

IfxGeth_QueueSize_7424Bytes : IfxGeth.h

IfxGeth_QueueSize_7680Bytes : IfxGeth.h

IfxGeth_QueueSize_768Bytes : IfxGeth.h

IfxGeth_QueueSize_7936Bytes : IfxGeth.h

IfxGeth_QueueSize_8192Bytes : IfxGeth.h

IfxGeth_Refclk_In_pinTable : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_REFCLKA_P11_12_IN : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_resetModule() : IfxGeth.c , IfxGeth.h

IfxGeth_RxArbitrationAlgorithm : IfxGeth.h

IfxGeth_RxArbitrationAlgorithm_sp : IfxGeth.h

IfxGeth_RxArbitrationAlgorithm_wsp : IfxGeth.h

IfxGeth_Rxclk_In_pinTable : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_RXCLKA_P11_12_IN : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_RXCLKB_P11_4_IN : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_RXCLKC_P12_0_IN : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_Rxctl_In_pinTable : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_RXCTLA_P11_11_IN : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_RXD0A_P11_10_IN : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_RXD1A_P11_9_IN : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_RXD2A_P11_8_IN : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_RXD3A_P11_7_IN : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_Rxd_In_pinTable : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_RxDmaChannel : IfxGeth.h

IfxGeth_RxDmaChannel_0 : IfxGeth.h

IfxGeth_RxDmaChannel_1 : IfxGeth.h

IfxGeth_RxDmaChannel_2 : IfxGeth.h

IfxGeth_RxDmaChannel_3 : IfxGeth.h

IfxGeth_Rxdv_In_pinTable : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_RXDVA_P11_11_IN : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_RXDVB_P11_14_IN : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_Rxer_In_pinTable : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_RXERA_P11_13_IN : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_RXERB_P21_7_IN : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_RXERC_P10_0_IN : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_RxMtlQueue : IfxGeth.h

IfxGeth_RxMtlQueue_0 : IfxGeth.h

IfxGeth_RxMtlQueue_1 : IfxGeth.h

IfxGeth_RxMtlQueue_2 : IfxGeth.h

IfxGeth_RxMtlQueue_3 : IfxGeth.h

IfxGeth_ServiceRequest : IfxGeth.h

IfxGeth_ServiceRequest_0 : IfxGeth.h

IfxGeth_ServiceRequest_1 : IfxGeth.h

IfxGeth_ServiceRequest_2 : IfxGeth.h

IfxGeth_ServiceRequest_3 : IfxGeth.h

IfxGeth_ServiceRequest_4 : IfxGeth.h

IfxGeth_ServiceRequest_5 : IfxGeth.h

IfxGeth_ServiceRequest_6 : IfxGeth.h

IfxGeth_ServiceRequest_7 : IfxGeth.h

IfxGeth_ServiceRequest_8 : IfxGeth.h

IfxGeth_ServiceRequest_9 : IfxGeth.h

IfxGeth_setPhyInterfaceMode() : IfxGeth.h

IfxGeth_Txclk_In_pinTable : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_Txclk_Out_pinTable : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_TXCLK_P11_4_OUT : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_TXCLKA_P11_5_IN : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_TXCLKB_P11_12_IN : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_Txctl_Out_pinTable : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_TXCTL_P11_6_OUT : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_TXD0_P11_3_OUT : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_TXD1_P11_2_OUT : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_TXD2_P11_1_OUT : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_TXD3_P11_0_OUT : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_Txd_Out_pinTable : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_TxDmaChannel : IfxGeth.h

IfxGeth_TxDmaChannel_0 : IfxGeth.h

IfxGeth_TxDmaChannel_1 : IfxGeth.h

IfxGeth_TxDmaChannel_2 : IfxGeth.h

IfxGeth_TxDmaChannel_3 : IfxGeth.h

IfxGeth_Txen_Out_pinTable : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_TXEN_P11_6_OUT : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_Txer_Out_pinTable : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_TXER_P11_4_OUT : IfxGeth_PinMap.c , IfxGeth_PinMap.h

IfxGeth_TxMtlQueue : IfxGeth.h

IfxGeth_TxMtlQueue_0 : IfxGeth.h

IfxGeth_TxMtlQueue_1 : IfxGeth.h

IfxGeth_TxMtlQueue_2 : IfxGeth.h

IfxGeth_TxMtlQueue_3 : IfxGeth.h

IfxGeth_TxSchedulingAlgorithm : IfxGeth.h

IfxGeth_TxSchedulingAlgorithm_sp : IfxGeth.h

IfxGeth_TxSchedulingAlgorithm_wrr : IfxGeth.h

IFXGLOBAL_DERIVATIVE_NAME : IfxGlobal_cfg.h

IFXGLOBAL_DERIVATIVE_TC38x : IfxGlobal_cfg.h

IfxGpt120_CAPINA_P13_2_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt120_T2EUDA_P00_8_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt120_T2EUDB_P33_6_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt120_T2INA_P00_7_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt120_T2INB_P33_7_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt120_T3EUDA_P02_7_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt120_T3EUDB_P10_7_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt120_T3INA_P02_6_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt120_T3INB_P10_4_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt120_T3OUT_P10_6_OUT : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt120_T3OUT_P21_6_OUT : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt120_T4EUDA_P00_9_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt120_T4EUDB_P33_5_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt120_T4INA_P02_8_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt120_T4INB_P10_8_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt120_T5EUDA_P21_6_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt120_T5EUDB_P10_1_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt120_T5INA_P21_7_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt120_T5INB_P10_3_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt120_T6EUDA_P20_0_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt120_T6EUDB_P10_0_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt120_T6INA_P20_3_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt120_T6INB_P10_2_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt120_T6OUT_P10_5_OUT : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt120_T6OUT_P21_7_OUT : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt12_Capin_In_pinTable : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt12_CaptureInput : IfxGpt12.h

IfxGpt12_CaptureInput_A : IfxGpt12.h

IfxGpt12_CaptureInput_B : IfxGpt12.h

IfxGpt12_CaptureInput_C : IfxGpt12.h

IfxGpt12_CaptureInput_D : IfxGpt12.h

IfxGpt12_CaptureInputMode : IfxGpt12.h

IfxGpt12_CaptureInputMode_bothEdgesTxIN : IfxGpt12.h

IfxGpt12_CaptureInputMode_fallingEdgeTxIN : IfxGpt12.h

IfxGpt12_CaptureInputMode_none : IfxGpt12.h

IfxGpt12_CaptureInputMode_risingEdgeTxIN : IfxGpt12.h

IfxGpt12_CaptureTrigger : IfxGpt12.h

IfxGpt12_CaptureTrigger_capin : IfxGpt12.h

IfxGpt12_CaptureTrigger_t3inOrT3EUD : IfxGpt12.h

IfxGpt12_CaptureTriggerMode : IfxGpt12.h

IfxGpt12_CaptureTriggerMode_disabled : IfxGpt12.h

IfxGpt12_CaptureTriggerMode_fallingEdge : IfxGpt12.h

IfxGpt12_CaptureTriggerMode_randomEdge : IfxGpt12.h

IfxGpt12_CaptureTriggerMode_risingEdge : IfxGpt12.h

IfxGpt12_CounterInputMode : IfxGpt12.h

IfxGpt12_CounterInputMode_bothEdgesTxIN : IfxGpt12.h

IfxGpt12_CounterInputMode_bothEdgesTxOTL : IfxGpt12.h

IfxGpt12_CounterInputMode_counterDisabled : IfxGpt12.h

IfxGpt12_CounterInputMode_fallingEdgeTxIN : IfxGpt12.h

IfxGpt12_CounterInputMode_fallingEdgeTxOTL : IfxGpt12.h

IfxGpt12_CounterInputMode_risingEdgeTxIN : IfxGpt12.h

IfxGpt12_CounterInputMode_risingEdgeTxOTL : IfxGpt12.h

IfxGpt12_disableModule() : IfxGpt12.c , IfxGpt12.h

IfxGpt12_enableModule() : IfxGpt12.c , IfxGpt12.h

IfxGpt12_EudInput : IfxGpt12.h

IfxGpt12_EudInput_A : IfxGpt12.h

IfxGpt12_EudInput_B : IfxGpt12.h

IfxGpt12_EudInput_C : IfxGpt12.h

IfxGpt12_EudInput_D : IfxGpt12.h

IfxGpt12_getCaptureSrc() : IfxGpt12.h

IfxGpt12_getModuleFrequency() : IfxGpt12.h

IfxGpt12_Gpt1BlockPrescaler : IfxGpt12.h

IfxGpt12_Gpt1BlockPrescaler_16 : IfxGpt12.h

IfxGpt12_Gpt1BlockPrescaler_32 : IfxGpt12.h

IfxGpt12_Gpt1BlockPrescaler_4 : IfxGpt12.h

IfxGpt12_Gpt1BlockPrescaler_8 : IfxGpt12.h

IfxGpt12_Gpt2BlockPrescaler : IfxGpt12.h

IfxGpt12_Gpt2BlockPrescaler_16 : IfxGpt12.h

IfxGpt12_Gpt2BlockPrescaler_2 : IfxGpt12.h

IfxGpt12_Gpt2BlockPrescaler_4 : IfxGpt12.h

IfxGpt12_Gpt2BlockPrescaler_8 : IfxGpt12.h

IfxGpt12_IncrementalInterfaceInputMode : IfxGpt12.h

IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxEUD : IfxGpt12.h

IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxIN : IfxGpt12.h

IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxINOrTxEUD : IfxGpt12.h

IfxGpt12_IncrementalInterfaceInputMode_stopCounterTx : IfxGpt12.h

IfxGpt12_IncrEnc_getAbsolutePosition() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h

IfxGpt12_IncrEnc_getDirection() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h

IfxGpt12_IncrEnc_getFault() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h

IfxGpt12_IncrEnc_getOffset() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h

IfxGpt12_IncrEnc_getPeriodPerRotation() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h

IfxGpt12_IncrEnc_getPosition() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h

IfxGpt12_IncrEnc_getRawPosition() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h

IfxGpt12_IncrEnc_getRefreshPeriod() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h

IfxGpt12_IncrEnc_getResolution() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h

IfxGpt12_IncrEnc_getSensorType() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h

IfxGpt12_IncrEnc_getSpeed() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h

IfxGpt12_IncrEnc_getTurn() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h

IfxGpt12_IncrEnc_init() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h

IfxGpt12_IncrEnc_initConfig() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h

IfxGpt12_IncrEnc_onZeroIrq() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h

IfxGpt12_IncrEnc_reset() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h

IfxGpt12_IncrEnc_resetFaults() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h

IfxGpt12_IncrEnc_setOffset() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h

IfxGpt12_IncrEnc_setRefreshPeriod() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h

IfxGpt12_IncrEnc_stdIfPosInit() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h

IfxGpt12_IncrEnc_update() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h

IfxGpt12_IncrEnc_Update : IfxGpt12_IncrEnc.h

IfxGpt12_IncrEnc_updateFromT2() : IfxGpt12_IncrEnc.c

IfxGpt12_IncrEnc_updateFromT3() : IfxGpt12_IncrEnc.c

IfxGpt12_IncrEnc_updateSpeedFromT2() : IfxGpt12_IncrEnc.c

IfxGpt12_IncrEnc_updateSpeedFromT3() : IfxGpt12_IncrEnc.c

IfxGpt12_initCapInPin() : IfxGpt12.h

IfxGpt12_initCapInPinWithPadLevel() : IfxGpt12.h

IfxGpt12_initTxEudInPin() : IfxGpt12.c , IfxGpt12.h

IfxGpt12_initTxEudInPinWithPadLevel() : IfxGpt12.c , IfxGpt12.h

IfxGpt12_initTxInPin() : IfxGpt12.c , IfxGpt12.h

IfxGpt12_initTxInPinWithPadLevel() : IfxGpt12.c , IfxGpt12.h

IfxGpt12_initTxOutPin() : IfxGpt12.h

IfxGpt12_Input : IfxGpt12.h

IfxGpt12_Input_A : IfxGpt12.h

IfxGpt12_Input_B : IfxGpt12.h

IfxGpt12_Input_C : IfxGpt12.h

IfxGpt12_Input_D : IfxGpt12.h

IfxGpt12_isModuleSuspended() : IfxGpt12.h

IfxGpt12_Mode : IfxGpt12.h

IfxGpt12_Mode_capture : IfxGpt12.h

IfxGpt12_Mode_counter : IfxGpt12.h

IfxGpt12_Mode_highGatedTimer : IfxGpt12.h

IfxGpt12_Mode_incrementalInterfaceEdgeDetection : IfxGpt12.h

IfxGpt12_Mode_incrementalInterfaceRotationDetection : IfxGpt12.h

IfxGpt12_Mode_lowGatedTimer : IfxGpt12.h

IfxGpt12_Mode_reload : IfxGpt12.h

IfxGpt12_Mode_timer : IfxGpt12.h

IFXGPT12_NUM_MODULES : IfxGpt12_cfg.h

IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS : IfxGpt12_PinMap.h

IFXGPT12_PINMAP_NUM_MODULES : IfxGpt12_PinMap.h

IFXGPT12_PINMAP_NUM_TIMERS : IfxGpt12_PinMap.h

IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS : IfxGpt12_PinMap.h

IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS : IfxGpt12_PinMap.h

IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS : IfxGpt12_PinMap.h

IfxGpt12_ReloadInputMode : IfxGpt12.h

IfxGpt12_ReloadInputMode_bothEdgesTxIN : IfxGpt12.h

IfxGpt12_ReloadInputMode_bothEdgesTxOTL : IfxGpt12.h

IfxGpt12_ReloadInputMode_counterDisabled : IfxGpt12.h

IfxGpt12_ReloadInputMode_fallingEdgeTxIN : IfxGpt12.h

IfxGpt12_ReloadInputMode_fallingEdgeTxOTL : IfxGpt12.h

IfxGpt12_ReloadInputMode_risingEdgeTxIN : IfxGpt12.h

IfxGpt12_ReloadInputMode_risingEdgeTxOTL : IfxGpt12.h

IfxGpt12_resetModule() : IfxGpt12.c , IfxGpt12.h

IfxGpt12_setCaptureInput() : IfxGpt12.h

IfxGpt12_setCaptureReload() : IfxGpt12.h

IfxGpt12_setGpt1BlockPrescaler() : IfxGpt12.h

IfxGpt12_setGpt2BlockPrescaler() : IfxGpt12.h

IfxGpt12_setSleepMode() : IfxGpt12.h

IfxGpt12_setSuspendMode() : IfxGpt12.h

IfxGpt12_SleepMode : IfxGpt12.h

IfxGpt12_SleepMode_disable : IfxGpt12.h

IfxGpt12_SleepMode_enable : IfxGpt12.h

IfxGpt12_SuspendMode : IfxGpt12.h

IfxGpt12_SuspendMode_hard : IfxGpt12.h

IfxGpt12_SuspendMode_none : IfxGpt12.h

IfxGpt12_SuspendMode_soft : IfxGpt12.h

IfxGpt12_T2_getFrequency() : IfxGpt12.c , IfxGpt12.h

IfxGpt12_T2_getMode() : IfxGpt12.h

IfxGpt12_T2_getSrc() : IfxGpt12.h

IfxGpt12_T2_getTimerValue() : IfxGpt12.h

IfxGpt12_T2_run() : IfxGpt12.h

IfxGpt12_T2_setCaptureInputMode() : IfxGpt12.h

IfxGpt12_T2_setCounterInputMode() : IfxGpt12.h

IfxGpt12_T2_setDirectionSource() : IfxGpt12.h

IfxGpt12_T2_setEudInput() : IfxGpt12.h

IfxGpt12_T2_setIncrementalInterfaceInputMode() : IfxGpt12.h

IfxGpt12_T2_setInput() : IfxGpt12.h

IfxGpt12_T2_setInterruptEnable() : IfxGpt12.h

IfxGpt12_T2_setMode() : IfxGpt12.h

IfxGpt12_T2_setReloadInputMode() : IfxGpt12.h

IfxGpt12_T2_setRemoteControl() : IfxGpt12.h

IfxGpt12_T2_setTimerDirection() : IfxGpt12.h

IfxGpt12_T2_setTimerPrescaler() : IfxGpt12.h

IfxGpt12_T2_setTimerValue() : IfxGpt12.h

IfxGpt12_T3_enableOutput() : IfxGpt12.h

IfxGpt12_T3_getFrequency() : IfxGpt12.c , IfxGpt12.h

IfxGpt12_T3_getMode() : IfxGpt12.h

IfxGpt12_T3_getSrc() : IfxGpt12.h

IfxGpt12_T3_getTimerValue() : IfxGpt12.h

IfxGpt12_T3_run() : IfxGpt12.h

IfxGpt12_T3_setCounterInputMode() : IfxGpt12.h

IfxGpt12_T3_setDirectionSource() : IfxGpt12.h

IfxGpt12_T3_setEudInput() : IfxGpt12.h

IfxGpt12_T3_setIncrementalInterfaceInputMode() : IfxGpt12.h

IfxGpt12_T3_setInput() : IfxGpt12.h

IfxGpt12_T3_setMode() : IfxGpt12.h

IfxGpt12_T3_setTimerDirection() : IfxGpt12.h

IfxGpt12_T3_setTimerPrescaler() : IfxGpt12.h

IfxGpt12_T3_setTimerValue() : IfxGpt12.h

IfxGpt12_T4_enableClearTimerT2() : IfxGpt12.h

IfxGpt12_T4_enableClearTimerT3() : IfxGpt12.h

IfxGpt12_T4_getFrequency() : IfxGpt12.c , IfxGpt12.h

IfxGpt12_T4_getMode() : IfxGpt12.h

IfxGpt12_T4_getSrc() : IfxGpt12.h

IfxGpt12_T4_getTimerValue() : IfxGpt12.h

IfxGpt12_T4_run() : IfxGpt12.h

IfxGpt12_T4_setCaptureInputMode() : IfxGpt12.h

IfxGpt12_T4_setCounterInputMode() : IfxGpt12.h

IfxGpt12_T4_setDirectionSource() : IfxGpt12.h

IfxGpt12_T4_setEudInput() : IfxGpt12.h

IfxGpt12_T4_setIncrementalInterfaceInputMode() : IfxGpt12.h

IfxGpt12_T4_setInput() : IfxGpt12.h

IfxGpt12_T4_setInterruptEnable() : IfxGpt12.h

IfxGpt12_T4_setMode() : IfxGpt12.h

IfxGpt12_T4_setReloadInputMode() : IfxGpt12.h

IfxGpt12_T4_setRemoteControl() : IfxGpt12.h

IfxGpt12_T4_setTimerDirection() : IfxGpt12.h

IfxGpt12_T4_setTimerPrescaler() : IfxGpt12.h

IfxGpt12_T4_setTimerValue() : IfxGpt12.h

IfxGpt12_T5_enableClearTimer() : IfxGpt12.h

IfxGpt12_T5_getFrequency() : IfxGpt12.c , IfxGpt12.h

IfxGpt12_T5_getMode() : IfxGpt12.h

IfxGpt12_T5_getSrc() : IfxGpt12.h

IfxGpt12_T5_getTimerValue() : IfxGpt12.h

IfxGpt12_T5_run() : IfxGpt12.h

IfxGpt12_T5_setCaptureTrigger() : IfxGpt12.h

IfxGpt12_T5_setCaptureTriggerEnable() : IfxGpt12.h

IfxGpt12_T5_setCaptureTriggerMode() : IfxGpt12.h

IfxGpt12_T5_setCounterInputMode() : IfxGpt12.h

IfxGpt12_T5_setDirectionSource() : IfxGpt12.h

IfxGpt12_T5_setEudInput() : IfxGpt12.h

IfxGpt12_T5_setInput() : IfxGpt12.h

IfxGpt12_T5_setMode() : IfxGpt12.h

IfxGpt12_T5_setRemoteControl() : IfxGpt12.h

IfxGpt12_T5_setTimerDirection() : IfxGpt12.h

IfxGpt12_T5_setTimerPrescaler() : IfxGpt12.h

IfxGpt12_T5_setTimerValue() : IfxGpt12.h

IfxGpt12_T6_enableClearTimer() : IfxGpt12.h

IfxGpt12_T6_getFrequency() : IfxGpt12.c , IfxGpt12.h

IfxGpt12_T6_getMode() : IfxGpt12.h

IfxGpt12_T6_getSrc() : IfxGpt12.h

IfxGpt12_T6_getTimerValue() : IfxGpt12.h

IfxGpt12_T6_run() : IfxGpt12.h

IfxGpt12_T6_setCounterInputMode() : IfxGpt12.h

IfxGpt12_T6_setDirectionSource() : IfxGpt12.h

IfxGpt12_T6_setEudInput() : IfxGpt12.h

IfxGpt12_T6_setInput() : IfxGpt12.h

IfxGpt12_T6_setMode() : IfxGpt12.h

IfxGpt12_T6_setReloadMode() : IfxGpt12.h

IfxGpt12_T6_setTimerDirection() : IfxGpt12.h

IfxGpt12_T6_setTimerPrescaler() : IfxGpt12.h

IfxGpt12_T6_setTimerValue() : IfxGpt12.h

IfxGpt12_TimerDirection : IfxGpt12.h

IfxGpt12_TimerDirection_down : IfxGpt12.h

IfxGpt12_TimerDirection_up : IfxGpt12.h

IfxGpt12_TimerDirectionSource : IfxGpt12.h

IfxGpt12_TimerDirectionSource_external : IfxGpt12.h

IfxGpt12_TimerDirectionSource_internal : IfxGpt12.h

IfxGpt12_TimerInputPrescaler : IfxGpt12.h

IfxGpt12_TimerInputPrescaler_1 : IfxGpt12.h

IfxGpt12_TimerInputPrescaler_128 : IfxGpt12.h

IfxGpt12_TimerInputPrescaler_16 : IfxGpt12.h

IfxGpt12_TimerInputPrescaler_2 : IfxGpt12.h

IfxGpt12_TimerInputPrescaler_32 : IfxGpt12.h

IfxGpt12_TimerInputPrescaler_4 : IfxGpt12.h

IfxGpt12_TimerInputPrescaler_64 : IfxGpt12.h

IfxGpt12_TimerInputPrescaler_8 : IfxGpt12.h

IfxGpt12_TimerReloadMode : IfxGpt12.h

IfxGpt12_TimerReloadMode_disable : IfxGpt12.h

IfxGpt12_TimerReloadMode_enable : IfxGpt12.h

IfxGpt12_TimerRemoteControl : IfxGpt12.h

IfxGpt12_TimerRemoteControl_off : IfxGpt12.h

IfxGpt12_TimerRemoteControl_on : IfxGpt12.h

IfxGpt12_TimerRun : IfxGpt12.h

IfxGpt12_TimerRun_start : IfxGpt12.h

IfxGpt12_TimerRun_stop : IfxGpt12.h

IfxGpt12_TxEud_In_pinTable : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt12_TxIn_In_pinTable : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt12_TxOut_Out_pinTable : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGtm_Atom : IfxGtm_cfg.h

IfxGtm_ATOM0_0_TOUT0_P02_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_0_TOUT48_P22_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_0_TOUT53_P21_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_0_TOUT85_P14_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_0_TOUT8_P02_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_0_TOUT9_P00_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_0N_TOUT112_P01_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_0N_TOUT17_P00_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_0N_TOUT43_P23_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_0N_TOUT54_P21_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_0N_TOUT7_P02_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_1_TOUT10_P00_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_1_TOUT116_P02_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_1_TOUT11_P00_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_1_TOUT1_P02_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_1_TOUT31_P33_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_1_TOUT47_P22_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_1_TOUT54_P21_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_1_TOUT84_P14_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_1N_TOUT113_P01_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_1N_TOUT14_P00_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_1N_TOUT39_P32_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_1N_TOUT41_P23_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_1N_TOUT4_P02_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_1N_TOUT50_P22_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_1N_TOUT53_P21_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_1N_TOUT55_P21_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_1N_TOUT57_P21_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_1N_TOUT61_P20_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_2_TOUT117_P02_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_2_TOUT12_P00_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_2_TOUT2_P02_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_2_TOUT33_P33_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_2_TOUT42_P23_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_2_TOUT46_P23_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_2_TOUT55_P21_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_2_TOUT83_P14_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_2N_TOUT114_P01_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_2N_TOUT15_P00_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_2N_TOUT23_P33_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_2N_TOUT40_P32_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_2N_TOUT41_P23_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_2N_TOUT44_P23_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_2N_TOUT56_P21_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_2N_TOUT58_P21_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_2N_TOUT5_P02_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_2N_TOUT65_P20_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_3_TOUT118_P02_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_3_TOUT13_P00_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_3_TOUT38_P32_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_3_TOUT3_P02_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_3_TOUT49_P22_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_3_TOUT56_P21_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_3_TOUT60_P20_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_3_TOUT82_P14_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_3N_TOUT115_P01_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_3N_TOUT16_P00_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_3N_TOUT24_P33_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_3N_TOUT42_P23_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_3N_TOUT45_P23_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_3N_TOUT59_P20_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_3N_TOUT66_P20_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_3N_TOUT6_P02_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_4_TOUT146_P34_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_4_TOUT14_P00_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_4_TOUT29_P33_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_4_TOUT39_P32_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_4_TOUT4_P02_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_4_TOUT50_P22_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_4_TOUT57_P21_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_4_TOUT61_P20_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_4_TOUT81_P14_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_4N_TOUT118_P02_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_4N_TOUT135_P22_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_4N_TOUT13_P00_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_4N_TOUT147_P34_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_4N_TOUT3_P02_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_5_TOUT15_P00_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_5_TOUT23_P33_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_5_TOUT40_P32_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_5_TOUT41_P23_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_5_TOUT58_P21_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_5_TOUT5_P02_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_5N_TOUT0_P02_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_5N_TOUT136_P22_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_5N_TOUT148_P34_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_5N_TOUT26_P33_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_5N_TOUT8_P02_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_5N_TOUT9_P00_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_6_TOUT106_P10_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_6_TOUT16_P00_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_6_TOUT24_P33_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_6_TOUT42_P23_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_6_TOUT59_P20_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_6_TOUT6_P02_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_6N_TOUT10_P00_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_6N_TOUT116_P02_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_6N_TOUT11_P00_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_6N_TOUT137_P22_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_6N_TOUT149_P34_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_6N_TOUT1_P02_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_6N_TOUT27_P33_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_7_TOUT17_P00_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_7_TOUT25_P33_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_7_TOUT45_P23_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_7_TOUT64_P20_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_7_TOUT7_P02_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_7N_TOUT117_P02_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_7N_TOUT12_P00_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_7N_TOUT150_P34_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_7N_TOUT28_P33_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_7N_TOUT2_P02_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_0_TOUT0_P02_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_0_TOUT109_P10_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_0_TOUT68_P20_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_0_TOUT76_P15_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_0_TOUT77_P15_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_0_TOUT87_P14_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_0_TOUT8_P02_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_0_TOUT9_P00_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_0N_TOUT112_P01_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_0N_TOUT17_P00_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_0N_TOUT7_P02_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_1_TOUT103_P10_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_1_TOUT10_P00_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_1_TOUT116_P02_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_1_TOUT11_P00_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_1_TOUT1_P02_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_1_TOUT31_P33_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_1_TOUT69_P20_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_1_TOUT78_P15_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_1_TOUT79_P15_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_1_TOUT86_P14_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_1N_TOUT102_P10_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_1N_TOUT113_P01_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_1N_TOUT14_P00_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_1N_TOUT39_P32_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_1N_TOUT4_P02_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_1N_TOUT61_P20_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_1N_TOUT72_P15_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_2_TOUT104_P10_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_2_TOUT107_P10_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_2_TOUT117_P02_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_2_TOUT12_P00_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_2_TOUT2_P02_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_2_TOUT33_P33_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_2_TOUT70_P20_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_2_TOUT80_P14_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_2N_TOUT110_P10_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_2N_TOUT114_P01_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_2N_TOUT15_P00_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_2N_TOUT23_P33_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_2N_TOUT40_P32_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_2N_TOUT41_P23_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_2N_TOUT5_P02_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_2N_TOUT73_P15_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_3_TOUT105_P10_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_3_TOUT108_P10_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_3_TOUT118_P02_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_3_TOUT13_P00_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_3_TOUT38_P32_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_3_TOUT3_P02_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_3_TOUT60_P20_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_3_TOUT71_P15_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_3N_TOUT106_P10_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_3N_TOUT115_P01_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_3N_TOUT16_P00_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_3N_TOUT24_P33_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_3N_TOUT42_P23_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_3N_TOUT6_P02_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_3N_TOUT74_P15_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_4_TOUT102_P10_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_4_TOUT130_P22_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_4_TOUT146_P34_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_4_TOUT14_P00_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_4_TOUT29_P33_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_4_TOUT39_P32_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_4_TOUT4_P02_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_4_TOUT61_P20_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_4_TOUT72_P15_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_4N_TOUT105_P10_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_4N_TOUT108_P10_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_4N_TOUT118_P02_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_4N_TOUT131_P22_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_4N_TOUT13_P00_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_4N_TOUT147_P34_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_4N_TOUT3_P02_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_4N_TOUT71_P15_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_4N_TOUT75_P15_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_5_TOUT110_P10_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_5_TOUT15_P00_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_5_TOUT23_P33_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_5_TOUT40_P32_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_5_TOUT41_P23_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_5_TOUT5_P02_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_5_TOUT65_P20_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_5_TOUT73_P15_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_5N_TOUT0_P02_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_5N_TOUT109_P10_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_5N_TOUT132_P22_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_5N_TOUT148_P34_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_5N_TOUT26_P33_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_5N_TOUT76_P15_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_5N_TOUT77_P15_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_5N_TOUT8_P02_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_5N_TOUT9_P00_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_6_TOUT106_P10_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_6_TOUT16_P00_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_6_TOUT24_P33_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_6_TOUT42_P23_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_6_TOUT66_P20_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_6_TOUT6_P02_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_6_TOUT74_P15_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_6N_TOUT103_P10_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_6N_TOUT10_P00_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_6N_TOUT116_P02_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_6N_TOUT11_P00_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_6N_TOUT133_P22_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_6N_TOUT149_P34_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_6N_TOUT1_P02_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_6N_TOUT27_P33_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_6N_TOUT78_P15_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_7_TOUT17_P00_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_7_TOUT25_P33_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_7_TOUT45_P23_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_7_TOUT67_P20_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_7_TOUT75_P15_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_7_TOUT7_P02_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_7N_TOUT104_P10_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_7N_TOUT107_P10_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_7N_TOUT117_P02_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_7N_TOUT12_P00_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_7N_TOUT134_P22_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_7N_TOUT150_P34_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_7N_TOUT28_P33_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_7N_TOUT2_P02_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_7N_TOUT79_P15_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_0_TOUT109_P10_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_0_TOUT18_P00_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_0_TOUT26_P33_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_0_TOUT32_P33_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_0_TOUT94_P13_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_0N_TOUT101_P11_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_0N_TOUT108_P10_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_0N_TOUT12_P00_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_0N_TOUT144_P33_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_0N_TOUT25_P33_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_0N_TOUT32_P33_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_0N_TOUT37_P32_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_1_TOUT102_P10_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_1_TOUT19_P00_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_1_TOUT27_P33_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_1_TOUT43_P23_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_1_TOUT90_P14_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_1_TOUT95_P11_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_1N_TOUT105_P10_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_1N_TOUT167_P00_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_1N_TOUT22_P33_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_1N_TOUT30_P33_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_1N_TOUT34_P33_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_1N_TOUT51_P21_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_1N_TOUT90_P14_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_1N_TOUT91_P13_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_1N_TOUT98_P11_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_1N_TOUT9_P00_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_2_TOUT103_P10_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_2_TOUT20_P00_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_2_TOUT28_P33_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_2_TOUT44_P23_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_2_TOUT88_P14_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_2_TOUT96_P11_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_2N_TOUT106_P10_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_2N_TOUT10_P00_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_2N_TOUT114_P01_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_2N_TOUT138_P23_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_2N_TOUT166_P00_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_2N_TOUT23_P33_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_2N_TOUT31_P33_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_2N_TOUT35_P33_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_2N_TOUT52_P21_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_2N_TOUT91_P13_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_2N_TOUT92_P13_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_2N_TOUT99_P11_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_3_TOUT104_P10_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_3_TOUT21_P00_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_3_TOUT29_P33_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_3_TOUT89_P14_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_3_TOUT97_P11_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_3N_TOUT100_P11_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_3N_TOUT107_P10_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_3N_TOUT115_P01_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_3N_TOUT11_P00_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_3N_TOUT139_P23_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_3N_TOUT143_P33_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_3N_TOUT168_P00_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_3N_TOUT24_P33_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_3N_TOUT33_P33_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_3N_TOUT36_P32_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_3N_TOUT62_P20_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_3N_TOUT92_P13_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_3N_TOUT93_P13_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_4_TOUT167_P00_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_4_TOUT22_P33_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_4_TOUT30_P33_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_4_TOUT34_P33_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_4_TOUT51_P21_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_4_TOUT90_P14_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_4_TOUT98_P11_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_4N_TOUT29_P33_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_4N_TOUT57_P21_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_4N_TOUT86_P14_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_4N_TOUT97_P11_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_5_TOUT138_P23_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_5_TOUT166_P00_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_5_TOUT35_P33_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_5_TOUT52_P21_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_5_TOUT65_P20_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_5_TOUT91_P13_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_5_TOUT99_P11_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_5N_TOUT120_P11_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_5N_TOUT26_P33_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_5N_TOUT59_P20_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_5N_TOUT87_P14_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_5N_TOUT94_P13_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_6_TOUT100_P11_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_6_TOUT139_P23_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_6_TOUT143_P33_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_6_TOUT168_P00_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_6_TOUT36_P32_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_6_TOUT62_P20_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_6_TOUT92_P13_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_6N_TOUT27_P33_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_6N_TOUT60_P20_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_6N_TOUT88_P14_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_6N_TOUT95_P11_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_7_TOUT101_P11_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_7_TOUT140_P32_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_7_TOUT144_P33_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_7_TOUT37_P32_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_7_TOUT63_P20_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_7_TOUT93_P13_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_7N_TOUT28_P33_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_7N_TOUT61_P20_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_7N_TOUT89_P14_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_7N_TOUT96_P11_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_0_TOUT18_P00_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_0_TOUT26_P33_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_0_TOUT32_P33_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_0_TOUT65_P20_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_0_TOUT94_P13_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_0N_TOUT101_P11_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_0N_TOUT144_P33_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_0N_TOUT17_P00_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_0N_TOUT25_P33_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_0N_TOUT32_P33_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_0N_TOUT37_P32_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_0N_TOUT63_P20_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_0N_TOUT76_P15_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_1_TOUT111_P01_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_1_TOUT128_P12_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_1_TOUT19_P00_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_1_TOUT27_P33_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_1_TOUT43_P23_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_1_TOUT64_P20_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_1_TOUT90_P14_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_1_TOUT95_P11_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_1N_TOUT14_P00_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_1N_TOUT167_P00_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_1N_TOUT22_P33_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_1N_TOUT30_P33_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_1N_TOUT34_P33_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_1N_TOUT51_P21_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_1N_TOUT79_P15_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_1N_TOUT90_P14_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_1N_TOUT91_P13_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_1N_TOUT98_P11_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_2_TOUT112_P01_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_2_TOUT20_P00_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_2_TOUT28_P33_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_2_TOUT44_P23_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_2_TOUT63_P20_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_2_TOUT88_P14_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_2_TOUT96_P11_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_2N_TOUT114_P01_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_2N_TOUT15_P00_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_2N_TOUT166_P00_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_2N_TOUT23_P33_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_2N_TOUT31_P33_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_2N_TOUT35_P33_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_2N_TOUT52_P21_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_2N_TOUT78_P15_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_2N_TOUT91_P13_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_2N_TOUT92_P13_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_2N_TOUT99_P11_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_3_TOUT113_P01_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_3_TOUT21_P00_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_3_TOUT29_P33_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_3_TOUT62_P20_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_3_TOUT89_P14_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_3_TOUT97_P11_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_3N_TOUT100_P11_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_3N_TOUT115_P01_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_3N_TOUT143_P33_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_3N_TOUT168_P00_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_3N_TOUT16_P00_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_3N_TOUT24_P33_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_3N_TOUT33_P33_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_3N_TOUT36_P32_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_3N_TOUT62_P20_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_3N_TOUT77_P15_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_3N_TOUT92_P13_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_3N_TOUT93_P13_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_4_TOUT114_P01_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_4_TOUT131_P22_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_4_TOUT167_P00_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_4_TOUT22_P33_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_4_TOUT30_P33_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_4_TOUT34_P33_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_4_TOUT51_P21_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_4_TOUT90_P14_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_4_TOUT98_P11_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_4N_TOUT135_P22_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_4N_TOUT21_P00_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_4N_TOUT29_P33_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_4N_TOUT57_P21_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_4N_TOUT86_P14_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_4N_TOUT97_P11_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_5_TOUT115_P01_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_5_TOUT132_P22_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_5_TOUT166_P00_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_5_TOUT35_P33_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_5_TOUT52_P21_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_5_TOUT64_P20_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_5_TOUT91_P13_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_5_TOUT99_P11_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_5N_TOUT120_P11_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_5N_TOUT136_P22_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_5N_TOUT18_P00_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_5N_TOUT26_P33_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_5N_TOUT59_P20_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_5N_TOUT87_P14_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_5N_TOUT94_P13_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_6_TOUT100_P11_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_6_TOUT133_P22_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_6_TOUT143_P33_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_6_TOUT168_P00_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_6_TOUT36_P32_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_6_TOUT62_P20_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_6_TOUT92_P13_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_6N_TOUT137_P22_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_6N_TOUT19_P00_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_6N_TOUT27_P33_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_6N_TOUT60_P20_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_6N_TOUT88_P14_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_6N_TOUT95_P11_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_7_TOUT101_P11_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_7_TOUT134_P22_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_7_TOUT144_P33_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_7_TOUT37_P32_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_7_TOUT63_P20_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_7_TOUT93_P13_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_7N_TOUT20_P00_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_7N_TOUT28_P33_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_7N_TOUT61_P20_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_7N_TOUT89_P14_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_7N_TOUT96_P11_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_0_TOUT109_P10_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_0_TOUT39_P32_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_0_TOUT48_P22_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_0_TOUT53_P21_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_0_TOUT68_P20_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_0_TOUT76_P15_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_0_TOUT77_P15_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_0_TOUT85_P14_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_0_TOUT87_P14_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_0N_TOUT87_P14_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_1_TOUT103_P10_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_1_TOUT41_P23_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_1_TOUT47_P22_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_1_TOUT54_P21_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_1_TOUT69_P20_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_1_TOUT78_P15_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_1_TOUT79_P15_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_1_TOUT84_P14_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_1_TOUT86_P14_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_1N_TOUT102_P10_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_1N_TOUT44_P23_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_1N_TOUT50_P22_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_1N_TOUT53_P21_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_1N_TOUT57_P21_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_1N_TOUT72_P15_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_1N_TOUT85_P14_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_1N_TOUT86_P14_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_2_TOUT104_P10_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_2_TOUT107_P10_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_2_TOUT42_P23_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_2_TOUT46_P23_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_2_TOUT55_P21_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_2_TOUT70_P20_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_2_TOUT80_P14_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_2_TOUT83_P14_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_2N_TOUT110_P10_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_2N_TOUT45_P23_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_2N_TOUT52_P21_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_2N_TOUT58_P21_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_2N_TOUT65_P20_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_2N_TOUT73_P15_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_2N_TOUT81_P14_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_3_TOUT105_P10_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_3_TOUT108_P10_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_3_TOUT43_P23_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_3_TOUT49_P22_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_3_TOUT56_P21_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_3_TOUT71_P15_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_3_TOUT82_P14_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_3N_TOUT106_P10_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_3N_TOUT46_P23_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_3N_TOUT51_P21_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_3N_TOUT59_P20_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_3N_TOUT66_P20_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_3N_TOUT74_P15_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_3N_TOUT80_P14_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_4_TOUT102_P10_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_4_TOUT111_P01_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_4_TOUT131_P22_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_4_TOUT264_P13_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_4_TOUT44_P23_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_4_TOUT50_P22_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_4_TOUT57_P21_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_4_TOUT72_P15_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_4_TOUT81_P14_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_4N_TOUT105_P10_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_4N_TOUT108_P10_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_4N_TOUT132_P22_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_4N_TOUT21_P00_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_4N_TOUT56_P21_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_4N_TOUT71_P15_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_4N_TOUT75_P15_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_4N_TOUT95_P11_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_5_TOUT110_P10_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_5_TOUT116_P02_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_5_TOUT128_P12_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_5_TOUT130_P22_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_5_TOUT45_P23_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_5_TOUT56_P21_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_5_TOUT58_P21_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_5_TOUT65_P20_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_5_TOUT73_P15_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_5N_TOUT109_P10_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_5N_TOUT121_P11_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_5N_TOUT133_P22_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_5N_TOUT18_P00_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_5N_TOUT76_P15_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_5N_TOUT77_P15_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_6_TOUT106_P10_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_6_TOUT117_P02_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_6_TOUT129_P12_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_6_TOUT139_P23_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_6_TOUT46_P23_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_6_TOUT59_P20_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_6_TOUT66_P20_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_6_TOUT74_P15_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_6N_TOUT103_P10_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_6N_TOUT134_P22_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_6N_TOUT19_P00_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_6N_TOUT78_P15_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_6N_TOUT97_P11_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_7_TOUT118_P02_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_7_TOUT119_P11_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_7_TOUT138_P23_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_7_TOUT40_P32_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_7_TOUT64_P20_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_7_TOUT67_P20_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_7_TOUT75_P15_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_7N_TOUT104_P10_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_7N_TOUT107_P10_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_7N_TOUT124_P11_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_7N_TOUT135_P22_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_7N_TOUT20_P00_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM4_7N_TOUT79_P15_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_0_TOUT119_P11_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_0_TOUT130_P22_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_0_TOUT146_P34_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_0_TOUT155_P01_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_0_TOUT162_P01_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_0_TOUT174_P31_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_0_TOUT206_P25_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_0_TOUT249_P13_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_0_TOUT258_P14_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_0N_TOUT126_P11_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_0N_TOUT134_P22_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_0N_TOUT150_P34_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_0N_TOUT161_P01_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_0N_TOUT181_P31_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_0N_TOUT213_P25_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_0N_TOUT261_P14_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_0N_TOUT264_P13_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_1_TOUT120_P11_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_1_TOUT131_P22_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_1_TOUT147_P34_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_1_TOUT156_P01_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_1_TOUT164_P01_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_1_TOUT175_P31_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_1_TOUT207_P25_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_1_TOUT242_P15_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_1_TOUT253_P13_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_1_TOUT265_P10_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_1N_TOUT123_P11_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_1N_TOUT128_P12_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_1N_TOUT135_P22_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_1N_TOUT140_P32_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_1N_TOUT158_P01_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_1N_TOUT178_P31_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_1N_TOUT210_P25_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_1N_TOUT245_P15_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_1N_TOUT248_P13_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_1N_TOUT260_P14_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_1N_TOUT268_P10_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_2_TOUT121_P11_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_2_TOUT132_P22_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_2_TOUT148_P34_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_2_TOUT152_P02_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_2_TOUT157_P01_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_2_TOUT176_P31_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_2_TOUT208_P25_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_2_TOUT243_P15_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_2_TOUT254_P13_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_2_TOUT266_P10_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_2N_TOUT124_P11_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_2N_TOUT136_P22_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_2N_TOUT141_P32_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_2N_TOUT159_P01_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_2N_TOUT179_P31_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_2N_TOUT211_P25_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_2N_TOUT246_P15_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_2N_TOUT250_P13_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_2N_TOUT259_P14_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_2N_TOUT269_P10_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_3_TOUT122_P11_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_3_TOUT133_P22_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_3_TOUT149_P34_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_3_TOUT163_P01_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_3_TOUT165_P01_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_3_TOUT177_P31_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_3_TOUT209_P25_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_3_TOUT244_P15_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_3_TOUT255_P13_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_3_TOUT267_P10_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_3N_TOUT123_P11_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_3N_TOUT125_P11_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_3N_TOUT137_P22_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_3N_TOUT142_P32_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_3N_TOUT160_P01_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_3N_TOUT180_P31_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_3N_TOUT212_P25_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_3N_TOUT212_P26_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_3N_TOUT247_P15_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_3N_TOUT249_P13_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_3N_TOUT263_P14_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_3N_TOUT270_P10_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_4_TOUT123_P11_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_4_TOUT134_P22_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_4_TOUT150_P34_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_4_TOUT158_P01_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_4_TOUT178_P31_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_4_TOUT210_P25_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_4_TOUT245_P15_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_4_TOUT248_P13_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_4_TOUT268_P10_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_4N_TOUT122_P11_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_4N_TOUT129_P12_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_4N_TOUT163_P01_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_4N_TOUT165_P01_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_4N_TOUT177_P31_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_4N_TOUT209_P25_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_4N_TOUT267_P10_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_5_TOUT124_P11_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_5_TOUT135_P22_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_5_TOUT140_P32_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_5_TOUT159_P01_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_5_TOUT179_P31_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_5_TOUT211_P25_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_5_TOUT246_P15_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_5_TOUT250_P13_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_5_TOUT269_P10_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_5N_TOUT119_P11_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_5N_TOUT155_P01_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_5N_TOUT162_P01_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_5N_TOUT174_P31_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_5N_TOUT206_P25_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_6_TOUT125_P11_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_6_TOUT136_P22_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_6_TOUT141_P32_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_6_TOUT160_P01_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_6_TOUT180_P31_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_6_TOUT212_P25_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_6_TOUT212_P26_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_6_TOUT247_P15_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_6_TOUT249_P13_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_6_TOUT270_P10_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_6N_TOUT120_P11_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_6N_TOUT156_P01_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_6N_TOUT158_P01_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_6N_TOUT175_P31_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_6N_TOUT207_P25_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_6N_TOUT96_P11_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_7_TOUT126_P11_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_7_TOUT137_P22_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_7_TOUT142_P32_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_7_TOUT161_P01_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_7_TOUT181_P31_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_7_TOUT213_P25_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_7_TOUT248_P13_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_7N_TOUT121_P11_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_7N_TOUT152_P02_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_7N_TOUT157_P01_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_7N_TOUT176_P31_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM5_7N_TOUT208_P25_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_0_TOUT127_P11_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_0_TOUT141_P32_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_0_TOUT155_P01_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_0_TOUT162_P01_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_0_TOUT182_P31_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_0_TOUT214_P25_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_0_TOUT242_P15_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_0_TOUT250_P13_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_1_TOUT128_P12_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_1_TOUT142_P32_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_1_TOUT156_P01_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_1_TOUT164_P01_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_1_TOUT183_P31_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_1_TOUT215_P25_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_1_TOUT251_P13_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_1_TOUT258_P14_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_2_TOUT129_P12_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_2_TOUT143_P33_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_2_TOUT152_P02_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_2_TOUT157_P01_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_2_TOUT184_P31_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_2_TOUT216_P25_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_2_TOUT252_P13_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_2_TOUT259_P14_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_3_TOUT111_P01_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_3_TOUT144_P33_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_3_TOUT163_P01_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_3_TOUT165_P01_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_3_TOUT185_P31_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_3_TOUT217_P25_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_3_TOUT253_P13_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_3_TOUT260_P14_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_4_TOUT140_P32_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_4_TOUT143_P33_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_4_TOUT158_P01_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_4_TOUT186_P31_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_4_TOUT218_P25_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_4_TOUT254_P13_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_4_TOUT261_P14_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_4_TOUT31_P33_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_5_TOUT146_P34_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_5_TOUT159_P01_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_5_TOUT187_P31_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_5_TOUT219_P25_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_5_TOUT243_P15_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_5_TOUT255_P13_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_5_TOUT262_P13_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_6_TOUT147_P34_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_6_TOUT160_P01_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_6_TOUT188_P31_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_6_TOUT220_P25_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_6_TOUT256_P13_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_6_TOUT263_P14_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_7_TOUT148_P34_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_7_TOUT161_P01_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_7_TOUT189_P31_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_7_TOUT221_P25_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_7_TOUT244_P15_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM6_7_TOUT264_P13_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_0_TOUT149_P34_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_0_TOUT162_P01_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_0_TOUT190_P30_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_0_TOUT222_P24_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_0_TOUT249_P13_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_0_TOUT258_P14_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_1_TOUT150_P34_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_1_TOUT163_P01_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_1_TOUT191_P30_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_1_TOUT223_P24_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_1_TOUT242_P15_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_1_TOUT245_P15_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_1_TOUT253_P13_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_1_TOUT265_P10_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_2_TOUT164_P01_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_2_TOUT192_P30_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_2_TOUT224_P24_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_2_TOUT243_P15_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_2_TOUT246_P15_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_2_TOUT254_P13_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_2_TOUT266_P10_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_3_TOUT166_P00_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_3_TOUT193_P30_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_3_TOUT225_P24_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_3_TOUT244_P15_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_3_TOUT247_P15_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_3_TOUT255_P13_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_3_TOUT267_P10_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_4_TOUT167_P00_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_4_TOUT194_P30_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_4_TOUT226_P24_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_4_TOUT245_P15_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_4_TOUT248_P13_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_4_TOUT268_P10_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_5_TOUT168_P00_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_5_TOUT195_P30_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_5_TOUT227_P24_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_5_TOUT246_P15_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_5_TOUT251_P13_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_5_TOUT269_P10_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_6_TOUT151_P02_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_6_TOUT153_P02_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_6_TOUT196_P30_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_6_TOUT228_P24_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_6_TOUT247_P15_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_6_TOUT249_P13_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_6_TOUT270_P10_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_7_TOUT152_P02_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_7_TOUT154_P02_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_7_TOUT161_P01_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_7_TOUT197_P30_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_7_TOUT229_P24_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_7_TOUT248_P13_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM7_7_TOUT261_P14_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM8_0_TOUT162_P01_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM8_0_TOUT198_P30_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM8_0_TOUT230_P24_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM8_0_TOUT242_P15_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM8_0_TOUT250_P13_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM8_1_TOUT163_P01_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM8_1_TOUT199_P30_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM8_1_TOUT231_P24_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM8_1_TOUT251_P13_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM8_1_TOUT258_P14_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM8_2_TOUT164_P01_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM8_2_TOUT200_P30_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM8_2_TOUT232_P24_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM8_2_TOUT252_P13_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM8_2_TOUT259_P14_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM8_3_TOUT166_P00_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM8_3_TOUT201_P30_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM8_3_TOUT233_P24_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM8_3_TOUT253_P13_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM8_3_TOUT260_P14_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM8_4_TOUT167_P00_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM8_4_TOUT202_P30_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM8_4_TOUT234_P24_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM8_4_TOUT254_P13_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM8_4_TOUT261_P14_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM8_5_TOUT168_P00_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM8_5_TOUT203_P30_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM8_5_TOUT235_P24_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM8_5_TOUT243_P15_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM8_5_TOUT255_P13_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM8_5_TOUT262_P13_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM8_6_TOUT151_P02_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM8_6_TOUT153_P02_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM8_6_TOUT204_P30_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM8_6_TOUT236_P24_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM8_6_TOUT256_P13_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM8_6_TOUT263_P14_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM8_7_TOUT152_P02_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM8_7_TOUT154_P02_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM8_7_TOUT161_P01_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM8_7_TOUT205_P30_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM8_7_TOUT237_P24_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM8_7_TOUT244_P15_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM8_7_TOUT264_P13_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_Atom_0 : IfxGtm_cfg.h

IfxGtm_Atom_1 : IfxGtm_cfg.h

IfxGtm_Atom_2 : IfxGtm_cfg.h

IfxGtm_Atom_3 : IfxGtm_cfg.h

IfxGtm_Atom_4 : IfxGtm_cfg.h

IfxGtm_Atom_5 : IfxGtm_cfg.h

IfxGtm_Atom_6 : IfxGtm_cfg.h

IfxGtm_Atom_7 : IfxGtm_cfg.h

IfxGtm_Atom_8 : IfxGtm_cfg.h

IfxGtm_Atom_Agc_buildFeature() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Agc_buildFeatureForChannel() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Agc_enableChannel() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Agc_enableChannelOutput() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Agc_enableChannels() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Agc_enableChannelsOutput() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Agc_enableChannelsTrigger() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Agc_enableChannelsUpdate() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Agc_enableChannelUpdate() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Agc_enableTimeTrigger() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Agc_resetChannels() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Agc_setChannelForceUpdate() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Agc_setChannelsForceUpdate() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Agc_setChannelsUpdate() : IfxGtm_Atom.h

IfxGtm_Atom_Agc_setTimeTrigger() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Agc_trigger() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_AruInput : IfxGtm_Atom.h

IfxGtm_Atom_AruInput_disabled : IfxGtm_Atom.h

IfxGtm_Atom_AruInput_enabled : IfxGtm_Atom.h

IfxGtm_Atom_Ch : IfxGtm_cfg.h

IfxGtm_Atom_Ch_0 : IfxGtm_cfg.h

IfxGtm_Atom_Ch_1 : IfxGtm_cfg.h

IfxGtm_Atom_Ch_2 : IfxGtm_cfg.h

IfxGtm_Atom_Ch_3 : IfxGtm_cfg.h

IfxGtm_Atom_Ch_4 : IfxGtm_cfg.h

IfxGtm_Atom_Ch_5 : IfxGtm_cfg.h

IfxGtm_Atom_Ch_6 : IfxGtm_cfg.h

IfxGtm_Atom_Ch_7 : IfxGtm_cfg.h

IfxGtm_Atom_Ch_clearOneNotification() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_clearZeroNotification() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_configurePwmMode() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_getChannelPointer() : IfxGtm_Atom.h

IfxGtm_Atom_Ch_getClockFrequency() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_getClockSource() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_getCompareOne() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_getCompareOnePointer() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_getCompareZero() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_getCompareZeroPointer() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_getCounterValue() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_getOutputLevel() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_getSrcPointer() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_getTimerPointer() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_isOneNotification() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_isZeroNotification() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_none : IfxGtm_cfg.h

IfxGtm_Atom_Ch_OutputTrigger : IfxGtm_Atom.h

IfxGtm_Atom_Ch_OutputTrigger_forward : IfxGtm_Atom.h

IfxGtm_Atom_Ch_OutputTrigger_generate : IfxGtm_Atom.h

IfxGtm_Atom_Ch_raiseInterruptOne() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_raiseInterruptZero() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_ResetEvent : IfxGtm_Atom.h

IfxGtm_Atom_Ch_ResetEvent_onCm0 : IfxGtm_Atom.h

IfxGtm_Atom_Ch_ResetEvent_onTrigger : IfxGtm_Atom.h

IfxGtm_Atom_Ch_setAruInput() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_setAruReadAddress0() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_setAruReadAddress1() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_setClockSource() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_setCompare() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_setCompareOne() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_setCompareOneShadow() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_setCompareShadow() : IfxGtm_Atom.h

IfxGtm_Atom_Ch_setCompareZero() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_setCompareZeroShadow() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_setCounterValue() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_setMode() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_setNotification() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_setOneShotMode() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_setResetSource() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_setSignalLevel() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_setSomcControl() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_setSomcSignalLevelControl() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_setTriggerOutput() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Dtm_PwmHl_getDeadtime() : IfxGtm_Atom_Dtm_PwmHl.c , IfxGtm_Atom_Dtm_PwmHl.h

IfxGtm_Atom_Dtm_PwmHl_getDeadtimeInTimerClockTicks() : IfxGtm_Atom_Dtm_PwmHl.c

IfxGtm_Atom_Dtm_PwmHl_getDeadtimeTick() : IfxGtm_Atom_Dtm_PwmHl.c , IfxGtm_Atom_Dtm_PwmHl.h

IfxGtm_Atom_Dtm_PwmHl_getMinPulse() : IfxGtm_Atom_Dtm_PwmHl.c , IfxGtm_Atom_Dtm_PwmHl.h

IfxGtm_Atom_Dtm_PwmHl_getMode() : IfxGtm_Atom_Dtm_PwmHl.c , IfxGtm_Atom_Dtm_PwmHl.h

IfxGtm_Atom_Dtm_PwmHl_init() : IfxGtm_Atom_Dtm_PwmHl.c , IfxGtm_Atom_Dtm_PwmHl.h

IfxGtm_Atom_Dtm_PwmHl_initConfig() : IfxGtm_Atom_Dtm_PwmHl.c , IfxGtm_Atom_Dtm_PwmHl.h

IfxGtm_Atom_Dtm_PwmHl_invertActiveState() : IfxGtm_Atom_Dtm_PwmHl.c

IFXGTM_ATOM_DTM_PWMHL_MAX_DEADTIME_IN_TICKS : IfxGtm_Atom_Dtm_PwmHl.h

IFXGTM_ATOM_DTM_PWMHL_MAX_NUM_CHANNELS : IfxGtm_Atom_Dtm_PwmHl.h

IfxGtm_Atom_Dtm_PwmHl_modes : IfxGtm_Atom_Dtm_PwmHl.c

IfxGtm_Atom_Dtm_PwmHl_setDeadtime() : IfxGtm_Atom_Dtm_PwmHl.c , IfxGtm_Atom_Dtm_PwmHl.h

IfxGtm_Atom_Dtm_PwmHl_setMinPulse() : IfxGtm_Atom_Dtm_PwmHl.c , IfxGtm_Atom_Dtm_PwmHl.h

IfxGtm_Atom_Dtm_PwmHl_setMode() : IfxGtm_Atom_Dtm_PwmHl.c , IfxGtm_Atom_Dtm_PwmHl.h

IfxGtm_Atom_Dtm_PwmHl_setOnTime() : IfxGtm_Atom_Dtm_PwmHl.c

IfxGtm_Atom_Dtm_PwmHl_setOnTimeAndShift() : IfxGtm_Atom_Dtm_PwmHl.c , IfxGtm_Atom_Dtm_PwmHl.h

IfxGtm_Atom_Dtm_PwmHl_setPulse() : IfxGtm_Atom_Dtm_PwmHl.c , IfxGtm_Atom_Dtm_PwmHl.h

IfxGtm_Atom_Dtm_PwmHl_setupChannels() : IfxGtm_Atom_Dtm_PwmHl.c , IfxGtm_Atom_Dtm_PwmHl.h

IfxGtm_Atom_Dtm_PwmHl_stdIfPwmHlInit() : IfxGtm_Atom_Dtm_PwmHl.c , IfxGtm_Atom_Dtm_PwmHl.h

IfxGtm_Atom_Dtm_PwmHl_Update : IfxGtm_Atom_Dtm_PwmHl.h

IfxGtm_Atom_Dtm_PwmHl_updateAndShiftOff() : IfxGtm_Atom_Dtm_PwmHl.c

IfxGtm_Atom_Dtm_PwmHl_updateCenterAligned() : IfxGtm_Atom_Dtm_PwmHl.c

IfxGtm_Atom_Dtm_PwmHl_updateEdgeAligned() : IfxGtm_Atom_Dtm_PwmHl.c

IfxGtm_Atom_Dtm_PwmHl_updateOff() : IfxGtm_Atom_Dtm_PwmHl.c

IfxGtm_Atom_Dtm_PwmHl_updatePulse() : IfxGtm_Atom_Dtm_PwmHl.c

IfxGtm_Atom_Dtm_PwmHl_UpdatePulse : IfxGtm_Atom_Dtm_PwmHl.h

IfxGtm_Atom_Dtm_PwmHl_updatePulseOff() : IfxGtm_Atom_Dtm_PwmHl.c

IfxGtm_Atom_Dtm_PwmHl_UpdateShift : IfxGtm_Atom_Dtm_PwmHl.h

IfxGtm_Atom_Dtm_PwmHl_updateShiftCenterAligned() : IfxGtm_Atom_Dtm_PwmHl.c

IfxGtm_Atom_getShadowOne() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_getShadowOnePointer() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_getShadowZero() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_getShadowZeroPointer() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Mode : IfxGtm_Atom.h

IfxGtm_Atom_Mode_outputCompare : IfxGtm_Atom.h

IfxGtm_Atom_Mode_outputImmediate : IfxGtm_Atom.h

IfxGtm_Atom_Mode_outputPwm : IfxGtm_Atom.h

IfxGtm_Atom_Mode_outputSerial : IfxGtm_Atom.h

IFXGTM_ATOM_NUM_AGC_CHANNELS : IfxGtm_Atom.c

IfxGtm_Atom_Pwm_init() : IfxGtm_Atom_Pwm.c , IfxGtm_Atom_Pwm.h

IfxGtm_Atom_Pwm_initConfig() : IfxGtm_Atom_Pwm.c , IfxGtm_Atom_Pwm.h

IfxGtm_Atom_Pwm_start() : IfxGtm_Atom_Pwm.c , IfxGtm_Atom_Pwm.h

IfxGtm_Atom_Pwm_stop() : IfxGtm_Atom_Pwm.c , IfxGtm_Atom_Pwm.h

IfxGtm_Atom_PwmHl : IfxGtm_Atom_PwmHl.h

IfxGtm_Atom_PwmHl_getDeadtime() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h

IfxGtm_Atom_PwmHl_getMinPulse() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h

IfxGtm_Atom_PwmHl_getMode() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h

IfxGtm_Atom_PwmHl_init() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h

IfxGtm_Atom_PwmHl_initConfig() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h

IfxGtm_Atom_PwmHl_invertActiveState() : IfxGtm_Atom_PwmHl.c

IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS : IfxGtm_Atom_PwmHl.h

IfxGtm_Atom_PwmHl_modes : IfxGtm_Atom_PwmHl.c

IfxGtm_Atom_PwmHl_setDeadtime() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h

IfxGtm_Atom_PwmHl_setMinPulse() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h

IfxGtm_Atom_PwmHl_setMode() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h

IfxGtm_Atom_PwmHl_setOnTime() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h

IfxGtm_Atom_PwmHl_setOnTimeAndShift() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h

IfxGtm_Atom_PwmHl_setPulse() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h

IfxGtm_Atom_PwmHl_setupChannels() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h

IfxGtm_Atom_PwmHl_stdIfPwmHlInit() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h

IfxGtm_Atom_PwmHl_Update : IfxGtm_Atom_PwmHl.h

IfxGtm_Atom_PwmHl_updateAndShiftOff() : IfxGtm_Atom_PwmHl.c

IfxGtm_Atom_PwmHl_updateCenterAligned() : IfxGtm_Atom_PwmHl.c

IfxGtm_Atom_PwmHl_updateEdgeAligned() : IfxGtm_Atom_PwmHl.c

IfxGtm_Atom_PwmHl_updateOff() : IfxGtm_Atom_PwmHl.c

IfxGtm_Atom_PwmHl_updatePulse() : IfxGtm_Atom_PwmHl.c

IfxGtm_Atom_PwmHl_UpdatePulse : IfxGtm_Atom_PwmHl.h

IfxGtm_Atom_PwmHl_updatePulseOff() : IfxGtm_Atom_PwmHl.c

IfxGtm_Atom_PwmHl_UpdateShift : IfxGtm_Atom_PwmHl.h

IfxGtm_Atom_PwmHl_updateShiftCenterAligned() : IfxGtm_Atom_PwmHl.c

IfxGtm_Atom_setTout() : IfxGtm_Atom.h

IfxGtm_Atom_SomcControl : IfxGtm_Atom.h

IfxGtm_Atom_SomcControl_cancelCompare : IfxGtm_Atom.h

IfxGtm_Atom_SomcControl_ccu0ccu1Ts0 : IfxGtm_Atom.h

IfxGtm_Atom_SomcControl_ccu0ccu1Ts12 : IfxGtm_Atom.h

IfxGtm_Atom_SomcControl_ccu0Ts0 : IfxGtm_Atom.h

IfxGtm_Atom_SomcControl_ccu0Ts0ccu1Ts12 : IfxGtm_Atom.h

IfxGtm_Atom_SomcControl_ccu1Ts12 : IfxGtm_Atom.h

IfxGtm_Atom_SomcControl_compareBoth : IfxGtm_Atom.h

IfxGtm_Atom_SomcControl_compareBoth1 : IfxGtm_Atom.h

IfxGtm_Atom_SomcSignalLevelControl : IfxGtm_Atom.h

IfxGtm_Atom_SomcSignalLevelControl_noChange : IfxGtm_Atom.h

IfxGtm_Atom_SomcSignalLevelControl_sl0out0 : IfxGtm_Atom.h

IfxGtm_Atom_SomcSignalLevelControl_sl0out1 : IfxGtm_Atom.h

IfxGtm_Atom_SomcSignalLevelControl_toggle : IfxGtm_Atom.h

IfxGtm_Atom_Timer_acknowledgeTimerIrq() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h

IfxGtm_Atom_Timer_acknowledgeTriggerIrq() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h

IfxGtm_Atom_Timer_addToChannelMask() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h

IfxGtm_Atom_Timer_applyUpdate() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h

IfxGtm_Atom_Timer_disableUpdate() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h

IfxGtm_Atom_Timer_getFrequency() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h

IfxGtm_Atom_Timer_getInputFrequency() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h

IfxGtm_Atom_Timer_getOffset() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h

IfxGtm_Atom_Timer_getPeriod() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h

IfxGtm_Atom_Timer_getPointer() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h

IfxGtm_Atom_Timer_getResolution() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h

IfxGtm_Atom_Timer_getTrigger() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h

IfxGtm_Atom_Timer_getTriggerPointer() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h

IfxGtm_Atom_Timer_init() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h

IfxGtm_Atom_Timer_initConfig() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h

IfxGtm_Atom_Timer_run() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h

IfxGtm_Atom_Timer_setFrequency() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h

IfxGtm_Atom_Timer_setPeriod() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h

IfxGtm_Atom_Timer_setSingleMode() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h

IfxGtm_Atom_Timer_setTrigger() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h

IfxGtm_Atom_Timer_stdIfTimerInit() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h

IfxGtm_Atom_Timer_stop() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h

IfxGtm_Atom_Timer_updateInputFrequency() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h

IfxGtm_Atom_ToutMapP : IfxGtm_PinMap.h

IfxGtm_AtomDtm_PwmHl : IfxGtm_Atom_Dtm_PwmHl.h

IfxGtm_Cdtm : IfxGtm_cfg.h

IfxGtm_Cdtm_0 : IfxGtm_cfg.h

IfxGtm_Cdtm_1 : IfxGtm_cfg.h

IfxGtm_Cdtm_2 : IfxGtm_cfg.h

IfxGtm_Cdtm_3 : IfxGtm_cfg.h

IfxGtm_Cdtm_4 : IfxGtm_cfg.h

IfxGtm_Cdtm_5 : IfxGtm_cfg.h

IfxGtm_Cdtm_6 : IfxGtm_cfg.h

IfxGtm_Cdtm_none : IfxGtm_cfg.h

IfxGtm_ChXSel : IfxGtm_PinMap.h

IfxGtm_ChXSel_a : IfxGtm_PinMap.h

IfxGtm_ChXSel_b : IfxGtm_PinMap.h

IfxGtm_ChXSel_c : IfxGtm_PinMap.h

IfxGtm_ChXSel_d : IfxGtm_PinMap.h

IfxGtm_ChXSel_e : IfxGtm_PinMap.h

IfxGtm_ChXSel_f : IfxGtm_PinMap.h

IfxGtm_ChXSel_g : IfxGtm_PinMap.h

IfxGtm_ChXSel_h : IfxGtm_PinMap.h

IfxGtm_ChXSel_i : IfxGtm_PinMap.h

IfxGtm_ChXSel_j : IfxGtm_PinMap.h

IfxGtm_ChXSel_k : IfxGtm_PinMap.h

IfxGtm_ChXSel_l : IfxGtm_PinMap.h

IfxGtm_ChXSel_m : IfxGtm_PinMap.h

IfxGtm_ChXSel_n : IfxGtm_PinMap.h

IfxGtm_ChXSel_o : IfxGtm_PinMap.h

IfxGtm_ChXSel_p : IfxGtm_PinMap.h

IfxGtm_CLK0_P23_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_CLK1_P32_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_CLK2_P11_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_Cluster : IfxGtm_cfg.h

IfxGtm_Cluster_0 : IfxGtm_cfg.h

IfxGtm_Cluster_1 : IfxGtm_cfg.h

IfxGtm_Cluster_2 : IfxGtm_cfg.h

IfxGtm_Cluster_3 : IfxGtm_cfg.h

IfxGtm_Cluster_4 : IfxGtm_cfg.h

IfxGtm_Cluster_5 : IfxGtm_cfg.h

IfxGtm_Cluster_6 : IfxGtm_cfg.h

IfxGtm_Cluster_7 : IfxGtm_cfg.h

IfxGtm_Cluster_8 : IfxGtm_cfg.h

IfxGtm_Cmu_Clk : IfxGtm_Cmu.h

IfxGtm_Cmu_Clk_0 : IfxGtm_Cmu.h

IfxGtm_Cmu_Clk_1 : IfxGtm_Cmu.h

IfxGtm_Cmu_Clk_2 : IfxGtm_Cmu.h

IfxGtm_Cmu_Clk_3 : IfxGtm_Cmu.h

IfxGtm_Cmu_Clk_4 : IfxGtm_Cmu.h

IfxGtm_Cmu_Clk_5 : IfxGtm_Cmu.h

IfxGtm_Cmu_Clk_6 : IfxGtm_Cmu.h

IfxGtm_Cmu_Clk_7 : IfxGtm_Cmu.h

IFXGTM_CMU_CLKDIS_ALL : IfxGtm_cfg.h

IFXGTM_CMU_CLKDIS_CLK0 : IfxGtm_cfg.h

IFXGTM_CMU_CLKDIS_CLK1 : IfxGtm_cfg.h

IFXGTM_CMU_CLKDIS_CLK2 : IfxGtm_cfg.h

IFXGTM_CMU_CLKDIS_CLK3 : IfxGtm_cfg.h

IFXGTM_CMU_CLKDIS_CLK4 : IfxGtm_cfg.h

IFXGTM_CMU_CLKDIS_CLK5 : IfxGtm_cfg.h

IFXGTM_CMU_CLKDIS_CLK6 : IfxGtm_cfg.h

IFXGTM_CMU_CLKDIS_CLK7 : IfxGtm_cfg.h

IFXGTM_CMU_CLKDIS_ECLK0 : IfxGtm_cfg.h

IFXGTM_CMU_CLKDIS_ECLK1 : IfxGtm_cfg.h

IFXGTM_CMU_CLKDIS_ECLK2 : IfxGtm_cfg.h

IFXGTM_CMU_CLKDIS_FXCLK : IfxGtm_cfg.h

IFXGTM_CMU_CLKEN_ALL : IfxGtm_cfg.h

IFXGTM_CMU_CLKEN_CLK0 : IfxGtm_cfg.h

IFXGTM_CMU_CLKEN_CLK1 : IfxGtm_cfg.h

IFXGTM_CMU_CLKEN_CLK2 : IfxGtm_cfg.h

IFXGTM_CMU_CLKEN_CLK3 : IfxGtm_cfg.h

IFXGTM_CMU_CLKEN_CLK4 : IfxGtm_cfg.h

IFXGTM_CMU_CLKEN_CLK5 : IfxGtm_cfg.h

IFXGTM_CMU_CLKEN_CLK6 : IfxGtm_cfg.h

IFXGTM_CMU_CLKEN_CLK7 : IfxGtm_cfg.h

IFXGTM_CMU_CLKEN_ECLK0 : IfxGtm_cfg.h

IFXGTM_CMU_CLKEN_ECLK1 : IfxGtm_cfg.h

IFXGTM_CMU_CLKEN_ECLK2 : IfxGtm_cfg.h

IFXGTM_CMU_CLKEN_FXCLK : IfxGtm_cfg.h

IfxGtm_Cmu_Eclk : IfxGtm_Cmu.h

IfxGtm_Cmu_Eclk_0 : IfxGtm_Cmu.h

IfxGtm_Cmu_Eclk_1 : IfxGtm_Cmu.h

IfxGtm_Cmu_Eclk_2 : IfxGtm_Cmu.h

IfxGtm_Cmu_enableClocks() : IfxGtm_Cmu.c , IfxGtm_Cmu.h

IfxGtm_Cmu_Fxclk : IfxGtm_Cmu.h

IfxGtm_Cmu_Fxclk_0 : IfxGtm_Cmu.h

IfxGtm_Cmu_Fxclk_1 : IfxGtm_Cmu.h

IfxGtm_Cmu_Fxclk_2 : IfxGtm_Cmu.h

IfxGtm_Cmu_Fxclk_3 : IfxGtm_Cmu.h

IfxGtm_Cmu_Fxclk_4 : IfxGtm_Cmu.h

IfxGtm_Cmu_getClkFrequency() : IfxGtm_Cmu.c , IfxGtm_Cmu.h

IfxGtm_Cmu_getEclkFrequency() : IfxGtm_Cmu.c , IfxGtm_Cmu.h

IfxGtm_Cmu_getFxClkFrequency() : IfxGtm_Cmu.c , IfxGtm_Cmu.h

IfxGtm_Cmu_getGclkFrequency() : IfxGtm_Cmu.c , IfxGtm_Cmu.h

IfxGtm_Cmu_getModuleFrequency() : IfxGtm_Cmu.c , IfxGtm_Cmu.h

IfxGtm_Cmu_isClkClockEnabled() : IfxGtm_Cmu.c , IfxGtm_Cmu.h

IfxGtm_Cmu_isEclkClockEnabled() : IfxGtm_Cmu.c , IfxGtm_Cmu.h

IfxGtm_Cmu_isFxClockEnabled() : IfxGtm_Cmu.c , IfxGtm_Cmu.h

IfxGtm_Cmu_selectClkInput() : IfxGtm_Cmu.c , IfxGtm_Cmu.h

IfxGtm_Cmu_setClkFrequency() : IfxGtm_Cmu.c , IfxGtm_Cmu.h

IfxGtm_Cmu_setEclkFrequency() : IfxGtm_Cmu.c , IfxGtm_Cmu.h

IfxGtm_Cmu_setGclkFrequency() : IfxGtm_Cmu.c , IfxGtm_Cmu.h

IfxGtm_Cmu_Tim_Filter_Clk : IfxGtm_Cmu.h

IfxGtm_Cmu_Tim_Filter_Clk_0 : IfxGtm_Cmu.h

IfxGtm_Cmu_Tim_Filter_Clk_1 : IfxGtm_Cmu.h

IfxGtm_Cmu_Tim_Filter_Clk_6 : IfxGtm_Cmu.h

IfxGtm_Cmu_Tim_Filter_Clk_7 : IfxGtm_Cmu.h

IfxGtm_disable() : IfxGtm.c , IfxGtm.h

IfxGtm_Dpll_getSubIncFrequency() : IfxGtm_Dpll.c , IfxGtm_Dpll.h

IfxGtm_Dpll_SubInc : IfxGtm_cfg.h

IfxGtm_Dpll_SubInc_1 : IfxGtm_cfg.h

IfxGtm_Dpll_SubInc_2 : IfxGtm_cfg.h

IfxGtm_Dtm : IfxGtm_cfg.h

IfxGtm_Dtm_0 : IfxGtm_cfg.h

IfxGtm_Dtm_1 : IfxGtm_cfg.h

IfxGtm_Dtm_2 : IfxGtm_cfg.h

IfxGtm_Dtm_3 : IfxGtm_cfg.h

IfxGtm_Dtm_4 : IfxGtm_cfg.h

IfxGtm_Dtm_5 : IfxGtm_cfg.h

IfxGtm_Dtm_Ch : IfxGtm_cfg.h

IfxGtm_Dtm_Ch_0 : IfxGtm_cfg.h

IfxGtm_Dtm_Ch_1 : IfxGtm_cfg.h

IfxGtm_Dtm_Ch_2 : IfxGtm_cfg.h

IfxGtm_Dtm_Ch_3 : IfxGtm_cfg.h

IfxGtm_Dtm_Ch_none : IfxGtm_cfg.h

IfxGtm_Dtm_ClockSource : IfxGtm_Dtm.h

IfxGtm_Dtm_ClockSource_cmuClock0 : IfxGtm_Dtm.h

IfxGtm_Dtm_ClockSource_cmuClock1 : IfxGtm_Dtm.h

IfxGtm_Dtm_ClockSource_cmuClock2 : IfxGtm_Dtm.h

IfxGtm_Dtm_ClockSource_systemClock : IfxGtm_Dtm.h

IfxGtm_Dtm_DeadTimePath : IfxGtm_Dtm.h

IfxGtm_Dtm_DeadTimePath_enable : IfxGtm_Dtm.h

IfxGtm_Dtm_DeadTimePath_feedThrough : IfxGtm_Dtm.h

IfxGtm_Dtm_getCdtmIndex() : IfxGtm_Dtm.h

IfxGtm_Dtm_getClockFrequency() : IfxGtm_Dtm.c , IfxGtm_Dtm.h

IfxGtm_Dtm_getClockSource() : IfxGtm_Dtm.h

IfxGtm_Dtm_getDtmChannel() : IfxGtm_Dtm.h

IfxGtm_Dtm_getDtmIndex() : IfxGtm_Dtm.h

IfxGtm_Dtm_getDtmPointer() : IfxGtm_Dtm.c , IfxGtm_Dtm.h

IfxGtm_Dtm_none : IfxGtm_cfg.h

IfxGtm_Dtm_Output1Function : IfxGtm_Dtm.h

IfxGtm_Dtm_Output1Function_andOfDtmInputandShiftSignal : IfxGtm_Dtm.h

IfxGtm_Dtm_Output1Function_dtmInputSignal : IfxGtm_Dtm.h

IfxGtm_Dtm_Output1Function_signalEdgeTrigger : IfxGtm_Dtm.h

IfxGtm_Dtm_Output1Function_xorOfDtmInputandShiftSignal : IfxGtm_Dtm.h

IfxGtm_Dtm_Output1Select : IfxGtm_Dtm.h

IfxGtm_Dtm_Output1Select_inverseDeadTime : IfxGtm_Dtm.h

IfxGtm_Dtm_Output1Select_specialFunction : IfxGtm_Dtm.h

IfxGtm_Dtm_setClockSource() : IfxGtm_Dtm.h

IfxGtm_Dtm_setDeadtime() : IfxGtm_Dtm.h

IfxGtm_Dtm_setOutput0DeadTimePath() : IfxGtm_Dtm.h

IfxGtm_Dtm_setOutput1DeadTimePath() : IfxGtm_Dtm.h

IfxGtm_Dtm_setOutput1Function() : IfxGtm_Dtm.h

IfxGtm_Dtm_setOutput1Select() : IfxGtm_Dtm.h

IfxGtm_dtmAtom_map : IfxGtm_cfg.c , IfxGtm_cfg.h

IfxGtm_dtmTom_map : IfxGtm_cfg.c , IfxGtm_cfg.h

IfxGtm_enable() : IfxGtm.c , IfxGtm.h

IfxGtm_FeatureControl : IfxGtm_cfg.h

IfxGtm_FeatureControl_disable : IfxGtm_cfg.h

IfxGtm_FeatureControl_disabled : IfxGtm_cfg.h

IfxGtm_FeatureControl_enable : IfxGtm_cfg.h

IfxGtm_FeatureControl_enabled : IfxGtm_cfg.h

IfxGtm_getClusterFrequency() : IfxGtm.c , IfxGtm.h

IfxGtm_getSysClkFrequency() : IfxGtm.c , IfxGtm.h

IfxGtm_IrqMode : IfxGtm.h

IfxGtm_IrqMode_level : IfxGtm.h

IfxGtm_IrqMode_pulse : IfxGtm.h

IfxGtm_IrqMode_pulseNotify : IfxGtm.h

IfxGtm_IrqMode_singlePulse : IfxGtm.h

IfxGtm_isEnabled() : IfxGtm.h

IfxGtm_isModuleSuspended() : IfxGtm.h

IFXGTM_NUM_ATOM_CHANNELS : IfxGtm_cfg.h

IFXGTM_NUM_ATOM_OBJECTS : IfxGtm_cfg.h

IFXGTM_NUM_CCM_OBJECTS : IfxGtm_cfg.h

IFXGTM_NUM_CDTM_OBJECTS : IfxGtm_cfg.h

IFXGTM_NUM_DTM_PER_CDTM_OBJECTS : IfxGtm_cfg.h

IFXGTM_NUM_MCS_OBJECTS : IfxGtm_cfg.h

IFXGTM_NUM_MODULES : IfxGtm_cfg.h

IFXGTM_NUM_PSM_OBJECTS : IfxGtm_cfg.h

IFXGTM_NUM_SPE_OBJECTS : IfxGtm_cfg.h

IFXGTM_NUM_TIM_CHANNELS : IfxGtm_cfg.h

IFXGTM_NUM_TIM_OBJECTS : IfxGtm_cfg.h

IFXGTM_NUM_TOM_CHANNELS : IfxGtm_cfg.h

IFXGTM_NUM_TOM_OBJECTS : IfxGtm_cfg.h

IfxGtm_PinMap_setAtomTout() : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_PinMap_setTimTin() : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_PinMap_setTomTout() : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_Psm_Afd_getChannelPointer() : IfxGtm_Psm.h

IfxGtm_Psm_Afd_writeChannelBuffer() : IfxGtm_Psm.h

IfxGtm_Psm_F2a : IfxGtm_cfg.h

IfxGtm_Psm_F2a_0 : IfxGtm_cfg.h

IfxGtm_Psm_F2a_1 : IfxGtm_cfg.h

IfxGtm_Psm_F2a_disableStream() : IfxGtm_Psm.c , IfxGtm_Psm.h

IfxGtm_Psm_F2a_enableStream() : IfxGtm_Psm.c , IfxGtm_Psm.h

IfxGtm_Psm_F2a_getPointer() : IfxGtm_Psm.h

IfxGtm_Psm_F2a_getStreamState() : IfxGtm_Psm.c , IfxGtm_Psm.h

IfxGtm_Psm_F2a_getTransferDirection() : IfxGtm_Psm.h

IfxGtm_Psm_F2a_getTransferMode() : IfxGtm_Psm.h

IfxGtm_Psm_F2a_setAruReadAddress() : IfxGtm_Psm.h

IfxGtm_Psm_F2a_setTransferDirection() : IfxGtm_Psm.h

IfxGtm_Psm_F2a_setTransferMode() : IfxGtm_Psm.h

IfxGtm_Psm_F2aStream : IfxGtm_Psm.h

IfxGtm_Psm_F2aStream_0 : IfxGtm_Psm.h

IfxGtm_Psm_F2aStream_1 : IfxGtm_Psm.h

IfxGtm_Psm_F2aStream_2 : IfxGtm_Psm.h

IfxGtm_Psm_F2aStream_3 : IfxGtm_Psm.h

IfxGtm_Psm_F2aStream_4 : IfxGtm_Psm.h

IfxGtm_Psm_F2aStream_5 : IfxGtm_Psm.h

IfxGtm_Psm_F2aStream_6 : IfxGtm_Psm.h

IfxGtm_Psm_F2aStream_7 : IfxGtm_Psm.h

IfxGtm_Psm_F2aStreamState : IfxGtm_Psm.h

IfxGtm_Psm_F2aStreamState_disabled : IfxGtm_Psm.h

IfxGtm_Psm_F2aStreamState_enabled : IfxGtm_Psm.h

IfxGtm_Psm_F2aStreamState_readDisabled : IfxGtm_Psm.h

IfxGtm_Psm_F2aStreamState_readEnabled : IfxGtm_Psm.h

IfxGtm_Psm_F2aTransferDirection : IfxGtm_Psm.h

IfxGtm_Psm_F2aTransferDirection_aruToFifo : IfxGtm_Psm.h

IfxGtm_Psm_F2aTransferDirection_fifoToAru : IfxGtm_Psm.h

IfxGtm_Psm_F2aTransferMode : IfxGtm_Psm.h

IfxGtm_Psm_F2aTransferMode_transferBothWords : IfxGtm_Psm.h

IfxGtm_Psm_F2aTransferMode_transferHighWord : IfxGtm_Psm.h

IfxGtm_Psm_F2aTransferMode_transferLowWord : IfxGtm_Psm.h

IfxGtm_Psm_Fifo : IfxGtm_cfg.h

IfxGtm_Psm_Fifo_0 : IfxGtm_cfg.h

IfxGtm_Psm_Fifo_1 : IfxGtm_cfg.h

IfxGtm_Psm_Fifo_clearAllChannelInterrupts() : IfxGtm_Psm.h

IfxGtm_Psm_Fifo_clearChannelInterrupt() : IfxGtm_Psm.h

IfxGtm_Psm_Fifo_disableChannelInterrupt() : IfxGtm_Psm.c , IfxGtm_Psm.h

IfxGtm_Psm_Fifo_disableRamAccess() : IfxGtm_Psm.h

IfxGtm_Psm_Fifo_enableChannelInterrupt() : IfxGtm_Psm.c , IfxGtm_Psm.h

IfxGtm_Psm_Fifo_enableRamAccess() : IfxGtm_Psm.h

IfxGtm_Psm_Fifo_flushChannelFifo() : IfxGtm_Psm.h

IfxGtm_Psm_Fifo_getChannelEndAddress() : IfxGtm_Psm.h

IfxGtm_Psm_Fifo_getChannelFillLevel() : IfxGtm_Psm.h

IfxGtm_Psm_Fifo_getChannelInterruptStatus() : IfxGtm_Psm.h

IfxGtm_Psm_Fifo_getChannelLowerWatermark() : IfxGtm_Psm.h

IfxGtm_Psm_Fifo_getChannelPointer() : IfxGtm_Psm.h

IfxGtm_Psm_Fifo_getChannelReadPtr() : IfxGtm_Psm.h

IfxGtm_Psm_Fifo_getChannelSize() : IfxGtm_Psm.h

IfxGtm_Psm_Fifo_getChannelSrcPointer() : IfxGtm_Psm.h

IfxGtm_Psm_Fifo_getChannelStartAddress() : IfxGtm_Psm.h

IfxGtm_Psm_Fifo_getChannelStatus() : IfxGtm_Psm.c , IfxGtm_Psm.h

IfxGtm_Psm_Fifo_getChannelUpperWatermark() : IfxGtm_Psm.h

IfxGtm_Psm_Fifo_getChannelWritePtr() : IfxGtm_Psm.h

IfxGtm_Psm_Fifo_getPointer() : IfxGtm_Psm.h

IfxGtm_Psm_Fifo_setChannelDmaHystMode() : IfxGtm_Psm.h

IfxGtm_Psm_Fifo_setChannelEndAddress() : IfxGtm_Psm.c , IfxGtm_Psm.h

IfxGtm_Psm_Fifo_setChannelInterrupt() : IfxGtm_Psm.c , IfxGtm_Psm.h

IfxGtm_Psm_Fifo_setChannelInterruptMode() : IfxGtm_Psm.h

IfxGtm_Psm_Fifo_setChannelLowerWatermark() : IfxGtm_Psm.c , IfxGtm_Psm.h

IfxGtm_Psm_Fifo_setChannelMode() : IfxGtm_Psm.h

IfxGtm_Psm_Fifo_setChannelSize() : IfxGtm_Psm.c , IfxGtm_Psm.h

IfxGtm_Psm_Fifo_setChannelStartAddress() : IfxGtm_Psm.c , IfxGtm_Psm.h

IfxGtm_Psm_Fifo_setChannelUpperWatermark() : IfxGtm_Psm.c , IfxGtm_Psm.h

IfxGtm_Psm_FifoChannel : IfxGtm_Psm.h

IfxGtm_Psm_FifoChannel_0 : IfxGtm_Psm.h

IfxGtm_Psm_FifoChannel_1 : IfxGtm_Psm.h

IfxGtm_Psm_FifoChannel_2 : IfxGtm_Psm.h

IfxGtm_Psm_FifoChannel_3 : IfxGtm_Psm.h

IfxGtm_Psm_FifoChannel_4 : IfxGtm_Psm.h

IfxGtm_Psm_FifoChannel_5 : IfxGtm_Psm.h

IfxGtm_Psm_FifoChannel_6 : IfxGtm_Psm.h

IfxGtm_Psm_FifoChannel_7 : IfxGtm_Psm.h

IfxGtm_Psm_FifoChannelDmaHystDir : IfxGtm_Psm.h

IfxGtm_Psm_FifoChannelDmaHystDir_read : IfxGtm_Psm.h

IfxGtm_Psm_FifoChannelDmaHystDir_write : IfxGtm_Psm.h

IfxGtm_Psm_FifoChannelInterrupt : IfxGtm_Psm.h

IfxGtm_Psm_FifoChannelInterrupt_empty : IfxGtm_Psm.h

IfxGtm_Psm_FifoChannelInterrupt_full : IfxGtm_Psm.h

IfxGtm_Psm_FifoChannelInterrupt_lowerWm : IfxGtm_Psm.h

IfxGtm_Psm_FifoChannelInterrupt_upperWm : IfxGtm_Psm.h

IfxGtm_Psm_FifoChannelMode : IfxGtm_Psm.h

IfxGtm_Psm_FifoChannelMode_normal : IfxGtm_Psm.h

IfxGtm_Psm_FifoChannelMode_ringBuffer : IfxGtm_Psm.h

IfxGtm_Psm_FifoChannelStatus : IfxGtm_Psm.h

IfxGtm_Psm_FifoChannelStatus_empty : IfxGtm_Psm.h

IfxGtm_Psm_FifoChannelStatus_full : IfxGtm_Psm.h

IfxGtm_Psm_FifoChannelStatus_lowerWm : IfxGtm_Psm.h

IfxGtm_Psm_FifoChannelStatus_normal : IfxGtm_Psm.h

IfxGtm_Psm_FifoChannelStatus_upperWm : IfxGtm_Psm.h

IFXGTM_PSM_FIFORAMSIZE : IfxGtm_cfg.h

IFXGTM_PSM_FIFOWORDWIDTH : IfxGtm_cfg.h

IfxGtm_Psm_InterruptMode : IfxGtm_Psm.h

IfxGtm_Psm_InterruptMode_level : IfxGtm_Psm.h

IfxGtm_Psm_InterruptMode_pulse : IfxGtm_Psm.h

IfxGtm_Psm_InterruptMode_pulseNotify : IfxGtm_Psm.h

IfxGtm_Psm_InterruptMode_singlePulse : IfxGtm_Psm.h

IfxGtm_setSuspendMode() : IfxGtm.h

IfxGtm_Spe : IfxGtm_cfg.h

IfxGtm_Spe_0 : IfxGtm_cfg.h

IfxGtm_Spe_1 : IfxGtm_cfg.h

IfxGtm_Spe_2 : IfxGtm_cfg.h

IfxGtm_Spe_3 : IfxGtm_cfg.h

IfxGtm_Spe_ChannelOutputType : IfxGtm_Spe.h

IfxGtm_Spe_ChannelOutputType_0 : IfxGtm_Spe.h

IfxGtm_Spe_ChannelOutputType_1 : IfxGtm_Spe.h

IfxGtm_Spe_ChannelOutputType_tomCh0Sour : IfxGtm_Spe.h

IfxGtm_Spe_ChannelOutputType_tomCh1Sour : IfxGtm_Spe.h

IfxGtm_Spe_clearAllInterrupts() : IfxGtm_Spe.h

IfxGtm_Spe_clearInterrupt() : IfxGtm_Spe.h

IfxGtm_Spe_ControlCommand : IfxGtm_Spe.h

IfxGtm_Spe_ControlCommand_bwdPatPtr : IfxGtm_Spe.h

IfxGtm_Spe_ControlCommand_outPat6 : IfxGtm_Spe.h

IfxGtm_Spe_ControlCommand_outPat7 : IfxGtm_Spe.h

IfxGtm_Spe_ControlCommand_patPtr : IfxGtm_Spe.h

IfxGtm_Spe_Direction : IfxGtm_Spe.h

IfxGtm_Spe_Direction_bwd : IfxGtm_Spe.h

IfxGtm_Spe_Direction_fwd : IfxGtm_Spe.h

IfxGtm_Spe_disableInterrupt() : IfxGtm_Spe.c , IfxGtm_Spe.h

IfxGtm_Spe_enableErrorInterrupt() : IfxGtm_Spe.c , IfxGtm_Spe.h

IfxGtm_Spe_enableInput() : IfxGtm_Spe.c , IfxGtm_Spe.h

IfxGtm_Spe_enableInterrupt() : IfxGtm_Spe.c , IfxGtm_Spe.h

IfxGtm_Spe_enableModule() : IfxGtm_Spe.h

IFXGTM_SPE_GET_ETRIG : IfxGtm_Spe.h

IFXGTM_SPE_GET_TRIGSEL : IfxGtm_Spe.h

IfxGtm_Spe_getActualInputPat() : IfxGtm_Spe.h

IFXGTM_SPE_GETALLPATTERNS : IfxGtm_Spe.h

IfxGtm_Spe_getBwdPatternPtr() : IfxGtm_Spe.h

IfxGtm_Spe_getControlCommand() : IfxGtm_Spe.h

IfxGtm_Spe_getDir() : IfxGtm_Spe.h

IfxGtm_Spe_getFastShutoffLevel() : IfxGtm_Spe.c , IfxGtm_Spe.h

IfxGtm_Spe_getInterruptStatus() : IfxGtm_Spe.c , IfxGtm_Spe.h

IfxGtm_Spe_getNewInputPat() : IfxGtm_Spe.h

IfxGtm_Spe_getOutputCtrl() : IfxGtm_Spe.h

IfxGtm_Spe_getOutputPattern() : IfxGtm_Spe.h

IfxGtm_Spe_getPatternPtr() : IfxGtm_Spe.h

IfxGtm_Spe_getPrevDir() : IfxGtm_Spe.h

IfxGtm_Spe_getPreviousInputPat() : IfxGtm_Spe.h

IfxGtm_Spe_getRevCompare() : IfxGtm_Spe.c , IfxGtm_Spe.h

IfxGtm_Spe_getRevCounter() : IfxGtm_Spe.h

IfxGtm_Spe_getSrcPointer() : IfxGtm_Spe.h

IfxGtm_spe_indexMap : IfxGtm_cfg.c , IfxGtm_cfg.h

IfxGtm_Spe_InputSignal : IfxGtm_Spe.h

IfxGtm_Spe_InputSignal_chX : IfxGtm_Spe.h

IfxGtm_Spe_InputSignal_chY : IfxGtm_Spe.h

IfxGtm_Spe_InputSignal_chZ : IfxGtm_Spe.h

IfxGtm_Spe_InterruptMode : IfxGtm_Spe.h

IfxGtm_Spe_InterruptMode_level : IfxGtm_Spe.h

IfxGtm_Spe_InterruptMode_pulse : IfxGtm_Spe.h

IfxGtm_Spe_InterruptMode_pulseNotify : IfxGtm_Spe.h

IfxGtm_Spe_InterruptMode_singlePulse : IfxGtm_Spe.h

IfxGtm_Spe_InterruptSignal : IfxGtm_Spe.h

IfxGtm_Spe_InterruptSignal_bis : IfxGtm_Spe.h

IfxGtm_Spe_InterruptSignal_count : IfxGtm_Spe.h

IfxGtm_Spe_InterruptSignal_dchg : IfxGtm_Spe.h

IfxGtm_Spe_InterruptSignal_nipd : IfxGtm_Spe.h

IfxGtm_Spe_InterruptSignal_perr : IfxGtm_Spe.h

IfxGtm_Spe_InterruptSignal_rcmp : IfxGtm_Spe.h

IfxGtm_Spe_OutChannel : IfxGtm_Spe.h

IfxGtm_Spe_OutChannel_0 : IfxGtm_Spe.h

IfxGtm_Spe_OutChannel_1 : IfxGtm_Spe.h

IfxGtm_Spe_OutChannel_2 : IfxGtm_Spe.h

IfxGtm_Spe_OutChannel_3 : IfxGtm_Spe.h

IfxGtm_Spe_OutChannel_4 : IfxGtm_Spe.h

IfxGtm_Spe_OutChannel_5 : IfxGtm_Spe.h

IfxGtm_Spe_OutChannel_6 : IfxGtm_Spe.h

IfxGtm_Spe_OutChannel_7 : IfxGtm_Spe.h

IfxGtm_Spe_PatternIndex : IfxGtm_Spe.h

IfxGtm_Spe_PatternIndex_0 : IfxGtm_Spe.h

IfxGtm_Spe_PatternIndex_1 : IfxGtm_Spe.h

IfxGtm_Spe_PatternIndex_2 : IfxGtm_Spe.h

IfxGtm_Spe_PatternIndex_3 : IfxGtm_Spe.h

IfxGtm_Spe_PatternIndex_4 : IfxGtm_Spe.h

IfxGtm_Spe_PatternIndex_5 : IfxGtm_Spe.h

IfxGtm_Spe_PatternIndex_6 : IfxGtm_Spe.h

IfxGtm_Spe_PatternIndex_7 : IfxGtm_Spe.h

IfxGtm_Spe_selectTimInput() : IfxGtm_Spe.h

IfxGtm_Spe_selectTrigger() : IfxGtm_Spe.c , IfxGtm_Spe.h

IfxGtm_Spe_setAllInputPatterns() : IfxGtm_Spe.c , IfxGtm_Spe.h

IfxGtm_Spe_setBwdPatternPtr() : IfxGtm_Spe.h

IFXGTM_SPE_SETCHANNELOUTPUT : IfxGtm_Spe.h

IfxGtm_Spe_setControlCommand() : IfxGtm_Spe.h

IfxGtm_Spe_setFastShutoff() : IfxGtm_Spe.h

IfxGtm_Spe_setInputPattern() : IfxGtm_Spe.c , IfxGtm_Spe.h

IfxGtm_Spe_setInterrupt() : IfxGtm_Spe.c , IfxGtm_Spe.h

IfxGtm_Spe_setInterruptMode() : IfxGtm_Spe.h

IfxGtm_Spe_setOutputCtrl() : IfxGtm_Spe.h

IfxGtm_Spe_setOutputPattern() : IfxGtm_Spe.c , IfxGtm_Spe.h

IfxGtm_Spe_setPatternPtr() : IfxGtm_Spe.h

IfxGtm_Spe_setRevCompare() : IfxGtm_Spe.c , IfxGtm_Spe.h

IfxGtm_Spe_setRevCounter() : IfxGtm_Spe.h

IFXGTM_SPE_SETSINGLEPATTERN : IfxGtm_Spe.h

IfxGtm_Spe_TimInput : IfxGtm_cfg.h

IfxGtm_Spe_TimInput_spe0Tim0Ch0to2 : IfxGtm_cfg.h

IfxGtm_Spe_TimInput_spe0Tim1Ch0to2 : IfxGtm_cfg.h

IfxGtm_Spe_TimInput_spe1Tim0Ch3to5 : IfxGtm_cfg.h

IfxGtm_Spe_TimInput_spe1Tim1Ch3to5 : IfxGtm_cfg.h

IfxGtm_Spe_TimInput_spe2Tim2Ch0to2 : IfxGtm_cfg.h

IfxGtm_Spe_TimInput_spe2Tim3Ch0to2 : IfxGtm_cfg.h

IfxGtm_Spe_TimInput_spe3Tim2Ch3to5 : IfxGtm_cfg.h

IfxGtm_Spe_TimInput_spe3Tim3Ch3to5 : IfxGtm_cfg.h

IfxGtm_Spe_TimInput_spe4Tim4Ch0to2 : IfxGtm_cfg.h

IfxGtm_Spe_TimInput_spe4Tim5Ch0to2 : IfxGtm_cfg.h

IfxGtm_Spe_TimInput_spe5Tim4Ch3to5 : IfxGtm_cfg.h

IfxGtm_Spe_TimInput_spe5Tim5Ch3to5 : IfxGtm_cfg.h

IfxGtm_Spe_TriggerSource : IfxGtm_cfg.h

IfxGtm_Spe_TriggerSource_speNipd : IfxGtm_cfg.h

IfxGtm_Spe_TriggerSource_tomCh0Ccu0 : IfxGtm_cfg.h

IfxGtm_Spe_TriggerSource_tomCh0Ccu1 : IfxGtm_cfg.h

IfxGtm_Spe_TriggerSource_tomCh2Ccu1 : IfxGtm_cfg.h

IfxGtm_Spe_TriggerSource_tomCh6Ccu1 : IfxGtm_cfg.h

IfxGtm_Spe_TriggerSource_tomCh7Ccu1 : IfxGtm_cfg.h

IfxGtm_Spe_TriggerSource_tomCh8Ccu1 : IfxGtm_cfg.h

IfxGtm_Spe_TriggerSource_tomCh9Ccu1 : IfxGtm_cfg.h

IfxGtm_Spe_triggerUpdate() : IfxGtm_Spe.h

IfxGtm_SuspendMode : IfxGtm.h

IfxGtm_SuspendMode_hard : IfxGtm.h

IfxGtm_SuspendMode_none : IfxGtm.h

IfxGtm_SuspendMode_soft : IfxGtm.h

IfxGtm_Tbu_enableChannel() : IfxGtm_Tbu.h

IfxGtm_Tbu_getClockFrequency() : IfxGtm_Tbu.c , IfxGtm_Tbu.h

IfxGtm_Tbu_isChannelEnabled() : IfxGtm_Tbu.h

IfxGtm_Tbu_Ts : IfxGtm_Tbu.h

IfxGtm_Tbu_Ts_0 : IfxGtm_Tbu.h

IfxGtm_Tbu_Ts_1 : IfxGtm_Tbu.h

IfxGtm_Tbu_Ts_2 : IfxGtm_Tbu.h

IfxGtm_Tbu_Ts_3 : IfxGtm_Tbu.h

IfxGtm_Tim : IfxGtm_cfg.h

IfxGtm_TIM0_0_P00_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_0_P02_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_0_P10_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_0_P13_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_0_P14_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_0_P14_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_0_P15_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_0_P21_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_0_P22_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_0_P33_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_0_P33_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_1_P00_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_1_P02_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_1_P10_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_1_P10_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_1_P14_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_1_P15_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_1_P21_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_1_P22_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_1_P33_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_1_P33_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_2_P00_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_2_P02_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_2_P02_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_2_P10_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_2_P10_2_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM0_2_P10_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_2_P15_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_2_P21_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_2_P23_5_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM0_2_P33_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_2_P33_6_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM0_3_P00_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_3_P02_10_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM0_3_P02_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_3_P10_14_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_3_P10_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_3_P10_6_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM0_3_P14_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_3_P21_5_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM0_3_P22_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_3_P32_2_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM0_3_P33_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_4_P02_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_4_P10_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_4_P10_13_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM0_4_P14_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_4_P21_6_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM0_4_P22_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_4_P32_3_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM0_4_P33_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_4_P33_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_5_P01_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_5_P02_5_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM0_5_P10_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_5_P10_8_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM0_5_P14_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_5_P21_7_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM0_5_P23_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_5_P32_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_5_P33_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_6_P01_4_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM0_6_P02_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_6_P10_15_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM0_6_P10_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_6_P14_3_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM0_6_P20_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_6_P23_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_6_P23_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_6_P33_2_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM0_7_P02_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_7_P02_7_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM0_7_P11_15_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_7_P14_4_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM0_7_P20_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_7_P23_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_7_P23_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_7_P33_3_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM1_0_P00_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_0_P02_0_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM1_0_P10_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_0_P14_5_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM1_0_P14_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_0_P15_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_0_P21_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_0_P22_1_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM1_0_P33_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_0_P33_4_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM1_1_P00_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_1_P02_1_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM1_1_P10_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_1_P14_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_1_P15_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_1_P21_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_1_P22_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_1_P33_5_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM1_1_P33_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_2_P00_11_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM1_2_P02_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_2_P10_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_2_P10_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_2_P15_8_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM1_2_P21_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_2_P23_5_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM1_2_P23_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_2_P33_11_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM1_2_P33_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_3_P00_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_3_P02_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_3_P10_3_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM1_3_P10_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_3_P14_0_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM1_3_P21_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_3_P22_2_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM1_3_P23_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_3_P32_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_3_P33_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_4_P02_4_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM1_4_P10_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_4_P14_1_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM1_4_P20_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_4_P21_6_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM1_4_P22_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_4_P32_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_4_P33_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_4_P33_8_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM1_5_P02_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_5_P10_8_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM1_5_P14_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_5_P20_7_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM1_5_P21_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_5_P23_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_5_P32_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_5_P33_1_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM1_6_P02_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_6_P10_4_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM1_6_P14_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_6_P20_0_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM1_6_P23_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_6_P23_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_6_P33_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_7_P02_7_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM1_7_P14_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_7_P20_8_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM1_7_P23_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_7_P23_4_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM1_7_P33_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_0_P00_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_0_P01_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_0_P02_8_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM2_0_P11_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_0_P11_10_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM2_0_P13_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_0_P15_5_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM2_0_P20_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_0_P31_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_0_P33_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_0_P33_14_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM2_1_P00_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_1_P00_2_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM2_1_P01_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_1_P11_1_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM2_1_P11_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_1_P15_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_1_P20_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_1_P31_1_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM2_1_P33_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_1_P33_15_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM2_2_P00_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_2_P01_5_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM2_2_P11_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_2_P11_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_2_P14_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_2_P15_11_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM2_2_P15_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_2_P20_14_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM2_2_P31_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_2_P32_0_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM2_3_P00_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_3_P01_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_3_P11_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_3_P11_6_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM2_3_P14_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_3_P15_0_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM2_3_P15_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_3_P20_1_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM2_3_P31_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_3_P34_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_4_P00_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_4_P02_14_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM2_4_P11_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_4_P11_9_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM2_4_P14_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_4_P15_13_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM2_4_P15_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_4_P20_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_4_P21_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_4_P31_4_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM2_4_P34_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_5_P00_6_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM2_5_P01_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_5_P02_15_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM2_5_P11_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_5_P11_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_5_P13_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_5_P15_14_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM2_5_P15_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_5_P20_9_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM2_5_P21_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_5_P31_5_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM2_5_P34_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_6_P00_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_6_P01_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_6_P11_11_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM2_6_P11_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_6_P13_1_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM2_6_P15_15_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_6_P15_3_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM2_6_P20_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_6_P20_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_6_P22_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_6_P31_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_6_P34_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_7_P00_8_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM2_7_P01_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_7_P11_12_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM2_7_P11_14_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_7_P13_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_7_P13_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_7_P15_4_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM2_7_P20_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_7_P20_7_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM2_7_P31_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_7_P34_5_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM3_0_P00_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_0_P00_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_0_P02_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_0_P02_8_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM3_0_P11_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_0_P12_0_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM3_0_P13_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_0_P13_3_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM3_0_P15_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_0_P20_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_0_P22_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_0_P25_0_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM3_0_P33_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_0_P33_12_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM3_1_P00_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_1_P00_2_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM3_1_P00_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_1_P02_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_1_P11_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_1_P12_1_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM3_1_P13_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_1_P14_11_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM3_1_P20_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_1_P22_5_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM3_1_P25_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_1_P33_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_1_P33_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_2_P00_3_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM3_2_P00_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_2_P02_8_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM3_2_P11_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_2_P13_14_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM3_2_P14_14_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_2_P14_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_2_P20_14_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_2_P22_6_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM3_2_P25_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_2_P32_0_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM3_2_P33_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_3_P00_4_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM3_3_P00_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_3_P02_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_3_P11_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_3_P13_4_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM3_3_P14_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_3_P14_9_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM3_3_P15_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_3_P20_1_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM3_3_P22_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_3_P25_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_3_P32_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_3_P33_3_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM3_4_P00_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_4_P02_10_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM3_4_P11_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_4_P13_5_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM3_4_P14_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_4_P14_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_4_P15_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_4_P20_3_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM3_4_P21_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_4_P22_8_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM3_4_P25_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_4_P34_1_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM3_5_P00_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_5_P02_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_5_P11_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_5_P13_0_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM3_5_P13_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_5_P13_6_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM3_5_P15_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_5_P20_9_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM3_5_P21_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_5_P22_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_5_P25_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_5_P32_5_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM3_5_P34_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_6_P00_7_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM3_6_P02_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_6_P11_11_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM3_6_P13_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_6_P13_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_6_P14_15_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_6_P15_3_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM3_6_P20_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_6_P20_6_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM3_6_P22_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_6_P25_6_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM3_6_P26_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_6_P32_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_6_P34_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_7_P00_8_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM3_7_P02_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_7_P11_12_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM3_7_P13_15_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_7_P13_2_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM3_7_P15_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_7_P20_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_7_P20_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_7_P22_11_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM3_7_P25_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM3_7_P32_7_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM3_7_P34_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_0_P00_13_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM4_0_P00_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_0_P01_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_0_P02_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_0_P10_0_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM4_0_P10_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_0_P11_0_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM4_0_P12_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_0_P13_12_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM4_0_P21_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_0_P24_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_0_P25_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_0_P30_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_0_P32_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_1_P00_10_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM4_1_P00_15_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_1_P01_1_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM4_1_P02_15_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_1_P10_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_1_P11_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_1_P12_1_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM4_1_P15_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_1_P21_1_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM4_1_P24_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_1_P25_9_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM4_1_P30_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_1_P32_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_2_P00_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_2_P01_9_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM4_2_P02_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_2_P02_9_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM4_2_P10_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_2_P10_6_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM4_2_P11_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_2_P15_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_2_P21_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_2_P23_6_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM4_2_P24_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_2_P25_10_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM4_2_P30_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_3_P00_12_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM4_3_P01_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_3_P02_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_3_P02_14_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_3_P10_14_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM4_3_P10_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_3_P11_5_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM4_3_P15_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_3_P21_7_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM4_3_P23_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_3_P24_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_3_P25_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_3_P30_3_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM4_4_P01_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_4_P01_8_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM4_4_P02_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_4_P10_13_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM4_4_P10_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_4_P11_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_4_P15_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_4_P20_1_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM4_4_P24_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_4_P25_12_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM4_4_P30_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_4_P32_6_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM4_4_P33_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_4_P33_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_5_P01_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_5_P01_2_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM4_5_P01_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_5_P10_11_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM4_5_P10_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_5_P11_8_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM4_5_P15_14_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_5_P20_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_5_P24_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_5_P25_13_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM4_5_P30_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_5_P33_14_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM4_5_P33_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_6_P01_14_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM4_6_P01_15_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_6_P01_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_6_P10_15_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_6_P10_3_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM4_6_P11_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_6_P15_15_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM4_6_P24_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_6_P25_14_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM4_6_P30_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_6_P33_15_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_7_P00_14_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_7_P01_11_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM4_7_P10_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_7_P11_14_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM4_7_P11_15_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_7_P13_9_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM4_7_P14_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_7_P24_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_7_P25_15_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM4_7_P30_7_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM4_7_P34_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_0_P00_13_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM5_0_P01_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_0_P01_8_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM5_0_P02_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_0_P13_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_0_P22_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_0_P24_8_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM5_0_P30_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_0_P31_8_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM5_0_P33_14_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_1_P00_15_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM5_1_P01_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_1_P01_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_1_P02_15_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_1_P13_10_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM5_1_P14_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_1_P22_9_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM5_1_P24_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_1_P30_9_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM5_1_P31_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_1_P33_15_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_2_P01_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_2_P01_9_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM5_2_P02_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_2_P13_14_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM5_2_P14_14_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_2_P22_10_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM5_2_P24_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_2_P30_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_2_P31_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_3_P01_11_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM5_3_P01_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_3_P01_5_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM5_3_P02_14_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_3_P13_4_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM5_3_P14_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_3_P22_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_3_P24_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_3_P30_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_3_P31_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_3_P34_1_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM5_4_P00_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_4_P01_0_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM5_4_P01_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_4_P13_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_4_P14_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_4_P21_2_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM5_4_P24_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_4_P30_12_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM5_4_P31_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_4_P34_2_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM5_5_P00_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_5_P01_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_5_P01_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_5_P01_6_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM5_5_P13_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_5_P13_6_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM5_5_P21_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_5_P24_13_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM5_5_P30_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_5_P31_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_5_P32_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_5_P34_3_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM5_6_P00_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_6_P01_14_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM5_6_P01_15_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_6_P01_6_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM5_6_P13_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_6_P14_15_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_6_P21_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_6_P24_14_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM5_6_P30_14_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_6_P31_14_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM5_6_P32_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_6_P34_4_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM5_7_P00_14_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_7_P00_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_7_P01_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_7_P01_7_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM5_7_P13_15_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_7_P21_5_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM5_7_P24_15_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_7_P30_15_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM5_7_P31_15_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_7_P32_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM5_7_P34_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM6_0_P01_12_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM6_0_P10_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM6_0_P13_4_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM6_0_P20_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM6_0_P23_7_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM6_0_P24_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM6_0_P25_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM6_0_P30_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM6_0_P31_8_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM6_1_P01_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM6_1_P10_10_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM6_1_P13_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM6_1_P20_7_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM6_1_P23_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM6_1_P24_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM6_1_P25_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM6_1_P30_9_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM6_1_P31_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM6_2_P01_14_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM6_2_P10_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM6_2_P13_6_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM6_2_P20_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM6_2_P23_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM6_2_P24_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM6_2_P25_2_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM6_2_P30_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM6_2_P31_10_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM6_3_P01_15_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM6_3_P10_13_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM6_3_P13_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM6_3_P20_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM6_3_P23_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM6_3_P24_3_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM6_3_P25_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM6_3_P30_11_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM6_3_P31_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM6_4_P00_4_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM6_4_P13_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM6_4_P14_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM6_4_P23_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM6_4_P24_4_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM6_4_P25_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM6_4_P30_12_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM6_4_P31_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM6_5_P00_13_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM6_5_P13_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM6_5_P14_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM6_5_P23_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM6_5_P24_5_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM6_5_P25_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM6_5_P30_13_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM6_5_P31_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM6_6_P00_14_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM6_6_P13_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM6_6_P14_14_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM6_6_P23_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM6_6_P24_6_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM6_6_P25_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM6_6_P26_0_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM6_6_P30_14_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM6_6_P31_14_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM6_7_P00_15_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM6_7_P13_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM6_7_P14_15_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM6_7_P23_0_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM6_7_P24_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM6_7_P25_7_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM6_7_P30_15_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM6_7_P31_15_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_Tim_0 : IfxGtm_cfg.h

IfxGtm_Tim_1 : IfxGtm_cfg.h

IfxGtm_Tim_2 : IfxGtm_cfg.h

IfxGtm_Tim_3 : IfxGtm_cfg.h

IfxGtm_Tim_4 : IfxGtm_cfg.h

IfxGtm_Tim_5 : IfxGtm_cfg.h

IfxGtm_Tim_6 : IfxGtm_cfg.h

IfxGtm_Tim_Ch : IfxGtm_cfg.h

IfxGtm_Tim_Ch_0 : IfxGtm_cfg.h

IfxGtm_Tim_Ch_1 : IfxGtm_cfg.h

IfxGtm_Tim_Ch_2 : IfxGtm_cfg.h

IfxGtm_Tim_Ch_3 : IfxGtm_cfg.h

IfxGtm_Tim_Ch_4 : IfxGtm_cfg.h

IfxGtm_Tim_Ch_5 : IfxGtm_cfg.h

IfxGtm_Tim_Ch_6 : IfxGtm_cfg.h

IfxGtm_Tim_Ch_7 : IfxGtm_cfg.h

IfxGtm_Tim_Ch_clearAuxInputSourceSelection() : IfxGtm_Tim.h

IfxGtm_Tim_Ch_clearCntOverflowEvent() : IfxGtm_Tim.h

IfxGtm_Tim_Ch_clearDataLostEvent() : IfxGtm_Tim.h

IfxGtm_Tim_Ch_clearEcntOverflowEvent() : IfxGtm_Tim.h

IfxGtm_Tim_Ch_clearGlitchEvent() : IfxGtm_Tim.h

IfxGtm_Tim_Ch_clearNewValueEvent() : IfxGtm_Tim.h

IfxGtm_Tim_Ch_clearNotification() : IfxGtm_Tim.h

IfxGtm_Tim_Ch_getCaptureClockFrequency() : IfxGtm_Tim.c , IfxGtm_Tim.h

IfxGtm_Tim_Ch_getCaptureClockSource() : IfxGtm_Tim.c , IfxGtm_Tim.h

IfxGtm_Tim_Ch_getFilterClockFrequency() : IfxGtm_Tim.c , IfxGtm_Tim.h

IfxGtm_Tim_Ch_getFilterClockSource() : IfxGtm_Tim.c , IfxGtm_Tim.h

IfxGtm_Tim_Ch_getNotification() : IfxGtm_Tim.h

IfxGtm_Tim_Ch_getSrcPointer() : IfxGtm_Tim.h

IfxGtm_Tim_Ch_getTimeoutClockFrequency() : IfxGtm_Tim.c , IfxGtm_Tim.h

IfxGtm_Tim_Ch_getTimeoutClockSource() : IfxGtm_Tim.c , IfxGtm_Tim.h

IfxGtm_Tim_Ch_isCntOverflowEvent() : IfxGtm_Tim.h

IfxGtm_Tim_Ch_isDataLostEvent() : IfxGtm_Tim.h

IfxGtm_Tim_Ch_isEcntOverflowEvent() : IfxGtm_Tim.h

IfxGtm_Tim_Ch_isGlitchEvent() : IfxGtm_Tim.h

IfxGtm_Tim_Ch_isNewValueEvent() : IfxGtm_Tim.h

IfxGtm_Tim_Ch_resetChannel() : IfxGtm_Tim.h

IfxGtm_Tim_Ch_setAuxInputSourceSelection() : IfxGtm_Tim.h

IfxGtm_Tim_Ch_setChannelNotification() : IfxGtm_Tim.c , IfxGtm_Tim.h

IfxGtm_Tim_Ch_setClockSource() : IfxGtm_Tim.h , IfxGtm_Tim.c

IfxGtm_Tim_Ch_setControl() : IfxGtm_Tim.c , IfxGtm_Tim.h

IfxGtm_Tim_Ch_setEdgeCounter() : IfxGtm_Tim.h

IfxGtm_Tim_Ch_setFallingEdgeFilterTime() : IfxGtm_Tim.h

IfxGtm_Tim_Ch_setFilterNotification() : IfxGtm_Tim.c , IfxGtm_Tim.h

IfxGtm_Tim_Ch_setInputSourceSelection() : IfxGtm_Tim.h

IfxGtm_Tim_Ch_setNotification() : IfxGtm_Tim.h

IfxGtm_Tim_Ch_setNotificationMode() : IfxGtm_Tim.c , IfxGtm_Tim.h

IfxGtm_Tim_Ch_setRisingEdgeFilterTime() : IfxGtm_Tim.h

IfxGtm_Tim_Ch_setShadowCounter() : IfxGtm_Tim.h

IfxGtm_Tim_Ch_setTimeoutNotification() : IfxGtm_Tim.c , IfxGtm_Tim.h

IfxGtm_Tim_Ch_setTimTin() : IfxGtm_Tim.h

IfxGtm_Tim_CntsSel : IfxGtm_Tim.h

IfxGtm_Tim_CntsSel_cntReg : IfxGtm_Tim.h

IfxGtm_Tim_CntsSel_tbuTs0 : IfxGtm_Tim.h

IfxGtm_Tim_FilterCounter : IfxGtm_Tim.h

IfxGtm_Tim_FilterCounter_hold : IfxGtm_Tim.h

IfxGtm_Tim_FilterCounter_upDown : IfxGtm_Tim.h

IfxGtm_Tim_FilterCounterFreqSel : IfxGtm_Tim.h

IfxGtm_Tim_FilterCounterFreqSel_cmuClk0 : IfxGtm_Tim.h

IfxGtm_Tim_FilterCounterFreqSel_cmuClk1 : IfxGtm_Tim.h

IfxGtm_Tim_FilterCounterFreqSel_cmuClk6 : IfxGtm_Tim.h

IfxGtm_Tim_FilterCounterFreqSel_cmuClk7 : IfxGtm_Tim.h

IfxGtm_Tim_FilterMode : IfxGtm_Tim.h

IfxGtm_Tim_FilterMode_immediateEdgePropagation : IfxGtm_Tim.h

IfxGtm_Tim_FilterMode_individualDeglitchTime : IfxGtm_Tim.h

IfxGtm_Tim_getChannel() : IfxGtm_Tim.h

IfxGtm_Tim_GprSel : IfxGtm_Tim.h

IfxGtm_Tim_GprSel_cnts : IfxGtm_Tim.h

IfxGtm_Tim_GprSel_tbuTs0 : IfxGtm_Tim.h

IfxGtm_Tim_GprSel_tbuTs1 : IfxGtm_Tim.h

IfxGtm_Tim_GprSel_tbuTs2 : IfxGtm_Tim.h

IfxGtm_Tim_In_clearNewData() : IfxGtm_Tim_In.h

IfxGtm_Tim_In_ConfigFilterMode : IfxGtm_Tim_In.h

IfxGtm_Tim_In_ConfigFilterMode_immediateEdgePropagation : IfxGtm_Tim_In.h

IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeHold : IfxGtm_Tim_In.h

IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeUpDown : IfxGtm_Tim_In.h

IfxGtm_Tim_In_ConfigFilterMode_none : IfxGtm_Tim_In.h

IfxGtm_Tim_In_getDutyPercent() : IfxGtm_Tim_In.h

IfxGtm_Tim_In_getPeriodSecond() : IfxGtm_Tim_In.h

IfxGtm_Tim_In_getPeriodTicks() : IfxGtm_Tim_In.h

IfxGtm_Tim_In_getPulseLengthTick() : IfxGtm_Tim_In.h

IfxGtm_Tim_In_init() : IfxGtm_Tim_In.c , IfxGtm_Tim_In.h

IfxGtm_Tim_In_initConfig() : IfxGtm_Tim_In.c , IfxGtm_Tim_In.h

IfxGtm_Tim_In_Input : IfxGtm_Tim_In.h

IfxGtm_Tim_In_Input_adjacentChannel : IfxGtm_Tim_In.h

IfxGtm_Tim_In_Input_aux : IfxGtm_Tim_In.h

IfxGtm_Tim_In_Input_currentChannel : IfxGtm_Tim_In.h

IfxGtm_Tim_In_isDataLost() : IfxGtm_Tim_In.h

IfxGtm_Tim_In_isNewData() : IfxGtm_Tim_In.h

IfxGtm_Tim_In_onIsr() : IfxGtm_Tim_In.c , IfxGtm_Tim_In.h

IfxGtm_Tim_In_update() : IfxGtm_Tim_In.c , IfxGtm_Tim_In.h

IfxGtm_Tim_Input : IfxGtm_Tim.h

IfxGtm_Tim_Input_adjacentChannel : IfxGtm_Tim.h

IfxGtm_Tim_Input_currentChannel : IfxGtm_Tim.h

IfxGtm_Tim_IrqMode : IfxGtm_Tim.h

IfxGtm_Tim_IrqMode_level : IfxGtm_Tim.h

IfxGtm_Tim_IrqMode_none : IfxGtm_Tim.h

IfxGtm_Tim_IrqMode_pulse : IfxGtm_Tim.h

IfxGtm_Tim_IrqMode_pulseNotify : IfxGtm_Tim.h

IfxGtm_Tim_IrqMode_singlePulseMode : IfxGtm_Tim.h

IfxGtm_Tim_IrqType : IfxGtm_Tim.h

IfxGtm_Tim_IrqType_cntOverflow : IfxGtm_Tim.h

IfxGtm_Tim_IrqType_ecntOverflow : IfxGtm_Tim.h

IfxGtm_Tim_IrqType_glitchDetect : IfxGtm_Tim.h

IfxGtm_Tim_IrqType_gprOverflow : IfxGtm_Tim.h

IfxGtm_Tim_IrqType_newVal : IfxGtm_Tim.h

IfxGtm_Tim_IrqType_timeoutDetect : IfxGtm_Tim.h

IfxGtm_Tim_Mode : IfxGtm_Tim.h

IfxGtm_Tim_Mode_bitCompression : IfxGtm_Tim.h

IfxGtm_Tim_Mode_inputEvent : IfxGtm_Tim.h

IfxGtm_Tim_Mode_inputPrescaler : IfxGtm_Tim.h

IfxGtm_Tim_Mode_pulseIntegration : IfxGtm_Tim.h

IfxGtm_Tim_Mode_pwmMeasurement : IfxGtm_Tim.h

IfxGtm_Tim_Timeout : IfxGtm_Tim.h

IfxGtm_Tim_Timeout_bothEdge : IfxGtm_Tim.h

IfxGtm_Tim_Timeout_disabled : IfxGtm_Tim.h

IfxGtm_Tim_Timeout_fallingEdge : IfxGtm_Tim.h

IfxGtm_Tim_Timeout_risingEdge : IfxGtm_Tim.h

IfxGtm_Tim_Timer_initChannel() : IfxGtm_Tim_Timer.h , IfxGtm_Tim_Timer.c

IfxGtm_Tim_Timer_initChannelConfig() : IfxGtm_Tim_Timer.c , IfxGtm_Tim_Timer.h

IfxGtm_Tom : IfxGtm_cfg.h

IfxGtm_TOM0_0_TOUT0_P02_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_0_TOUT109_P10_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_0_TOUT151_P02_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_0_TOUT18_P00_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_0_TOUT26_P33_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_0_TOUT32_P33_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_0_TOUT53_P21_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_0_TOUT76_P15_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_0_TOUT77_P15_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_0_TOUT85_P14_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_0_TOUT87_P14_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_0N_TOUT106_P10_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_0N_TOUT17_P00_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_0N_TOUT25_P33_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_0N_TOUT34_P33_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_0N_TOUT51_P21_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_0N_TOUT61_P20_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_0N_TOUT72_P15_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_0N_TOUT7_P02_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_0N_TOUT91_P13_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_0N_TOUT9_P00_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_10_TOUT12_P00_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_10_TOUT2_P02_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_10_TOUT41_P23_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_10_TOUT46_P23_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_10_TOUT96_P11_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_11_TOUT13_P00_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_11_TOUT3_P02_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_11_TOUT43_P23_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_11_TOUT49_P22_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_11_TOUT97_P11_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_12_TOUT14_P00_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_12_TOUT44_P23_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_12_TOUT4_P02_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_12_TOUT50_P22_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_12_TOUT98_P11_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_13_TOUT15_P00_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_13_TOUT5_P02_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_13_TOUT99_P11_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_14_TOUT100_P11_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_14_TOUT16_P00_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_14_TOUT6_P02_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_15_TOUT101_P11_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_15_TOUT17_P00_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_15_TOUT42_P23_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_15_TOUT7_P02_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_1_TOUT103_P10_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_1_TOUT116_P02_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_1_TOUT19_P00_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_1_TOUT1_P02_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_1_TOUT27_P33_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_1_TOUT31_P33_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_1_TOUT54_P21_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_1_TOUT78_P15_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_1_TOUT86_P14_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_1N_TOUT107_P10_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_1N_TOUT10_P00_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_1N_TOUT14_P00_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_1N_TOUT22_P33_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_1N_TOUT30_P33_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_1N_TOUT35_P33_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_1N_TOUT39_P32_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_1N_TOUT4_P02_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_1N_TOUT52_P21_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_1N_TOUT57_P21_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_1N_TOUT73_P15_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_1N_TOUT90_P14_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_1N_TOUT92_P13_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_2_TOUT104_P10_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_2_TOUT107_P10_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_2_TOUT117_P02_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_2_TOUT20_P00_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_2_TOUT28_P33_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_2_TOUT2_P02_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_2_TOUT33_P33_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_2_TOUT55_P21_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_2_TOUT79_P15_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_2_TOUT88_P14_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_2N_TOUT108_P10_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_2N_TOUT11_P00_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_2N_TOUT143_P33_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_2N_TOUT15_P00_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_2N_TOUT23_P33_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_2N_TOUT40_P32_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_2N_TOUT58_P21_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_2N_TOUT5_P02_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_2N_TOUT74_P15_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_2N_TOUT93_P13_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_3_TOUT105_P10_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_3_TOUT108_P10_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_3_TOUT118_P02_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_3_TOUT21_P00_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_3_TOUT29_P33_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_3_TOUT38_P32_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_3_TOUT3_P02_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_3_TOUT56_P21_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_3_TOUT71_P15_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_3_TOUT80_P14_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_3_TOUT89_P14_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_3N_TOUT109_P10_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_3N_TOUT12_P00_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_3N_TOUT144_P33_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_3N_TOUT16_P00_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_3N_TOUT24_P33_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_3N_TOUT42_P23_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_3N_TOUT59_P20_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_3N_TOUT60_P20_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_3N_TOUT6_P02_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_3N_TOUT75_P15_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_3N_TOUT94_P13_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_4_TOUT0_P02_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_4_TOUT102_P10_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_4_TOUT124_P11_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_4_TOUT22_P33_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_4_TOUT30_P33_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_4_TOUT37_P32_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_4_TOUT39_P32_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_4_TOUT53_P21_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_4_TOUT57_P21_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_4_TOUT64_P20_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_4_TOUT72_P15_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_4_TOUT81_P14_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_4_TOUT90_P14_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_4_TOUT94_P13_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_4_TOUT9_P00_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_4N_TOUT10_P00_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_4N_TOUT143_P33_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_4N_TOUT147_P34_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_4N_TOUT1_P02_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_4N_TOUT29_P33_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_4N_TOUT36_P32_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_4N_TOUT54_P21_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_4N_TOUT56_P21_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_4N_TOUT65_P20_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_4N_TOUT73_P15_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_4N_TOUT89_P14_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_4N_TOUT8_P02_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_4N_TOUT95_P11_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_4N_TOUT96_P11_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_5_TOUT110_P10_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_5_TOUT11_P00_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_5_TOUT128_P12_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_5_TOUT23_P33_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_5_TOUT27_P33_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_5_TOUT2_P02_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_5_TOUT40_P32_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_5_TOUT55_P21_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_5_TOUT58_P21_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_5_TOUT66_P20_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_5_TOUT74_P15_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_5_TOUT82_P14_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_5_TOUT91_P13_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_5_TOUT96_P11_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_5N_TOUT121_P11_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_5N_TOUT12_P00_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_5N_TOUT144_P33_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_5N_TOUT148_P34_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_5N_TOUT26_P33_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_5N_TOUT28_P33_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_5N_TOUT32_P33_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_5N_TOUT37_P32_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_5N_TOUT3_P02_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_5N_TOUT53_P21_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_5N_TOUT56_P21_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_5N_TOUT67_P20_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_5N_TOUT76_P15_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_5N_TOUT77_P15_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_5N_TOUT87_P14_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_5N_TOUT97_P11_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_6_TOUT106_P10_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_6_TOUT129_P12_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_6_TOUT13_P00_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_6_TOUT24_P33_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_6_TOUT29_P33_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_6_TOUT42_P23_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_6_TOUT48_P22_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_6_TOUT4_P02_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_6_TOUT59_P20_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_6_TOUT68_P20_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_6_TOUT80_P14_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_6_TOUT83_P14_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_6_TOUT92_P13_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_6_TOUT98_P11_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_6N_TOUT149_P34_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_6N_TOUT14_P00_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_6N_TOUT27_P33_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_6N_TOUT30_P33_8_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_6N_TOUT31_P33_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_6N_TOUT38_P32_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_6N_TOUT40_P32_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_6N_TOUT49_P22_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_6N_TOUT54_P21_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_6N_TOUT5_P02_5_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_6N_TOUT69_P20_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_6N_TOUT78_P15_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_6N_TOUT82_P14_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_6N_TOUT86_P14_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_6N_TOUT91_P13_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_6N_TOUT97_P11_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_6N_TOUT99_P11_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_7_TOUT101_P11_12_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_7_TOUT119_P11_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_7_TOUT15_P00_6_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_7_TOUT25_P33_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_7_TOUT31_P33_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_7_TOUT45_P23_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_7_TOUT50_P22_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_7_TOUT6_P02_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_7_TOUT70_P20_14_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_7_TOUT81_P14_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_7_TOUT84_P14_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_7_TOUT92_P13_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_7_TOUT93_P13_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_7N_TOUT100_P11_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_7N_TOUT123_P11_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_7N_TOUT130_P22_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_7N_TOUT150_P34_5_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_7N_TOUT16_P00_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_7N_TOUT28_P33_6_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_7N_TOUT32_P33_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_7N_TOUT33_P33_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_7N_TOUT39_P32_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_7N_TOUT42_P23_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_7N_TOUT55_P21_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_7N_TOUT71_P15_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_7N_TOUT79_P15_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_7N_TOUT7_P02_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_7N_TOUT84_P14_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_7N_TOUT88_P14_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_7N_TOUT93_P13_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_8_TOUT0_P02_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_8_TOUT48_P22_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_8_TOUT51_P21_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_8_TOUT8_P02_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_8_TOUT94_P13_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_8_TOUT95_P11_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_8_TOUT9_P00_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_9_TOUT10_P00_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_9_TOUT11_P00_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_9_TOUT1_P02_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_9_TOUT47_P22_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_9_TOUT52_P21_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_0_TOUT0_P02_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_0_TOUT18_P00_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_0_TOUT26_P33_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_0_TOUT32_P33_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_0_TOUT68_P20_12_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_0_TOUT76_P15_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_0_TOUT77_P15_6_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_0_TOUT85_P14_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_0_TOUT8_P02_8_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_0_TOUT9_P00_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_0N_TOUT17_P00_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_0N_TOUT25_P33_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_0N_TOUT34_P33_12_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_0N_TOUT75_P15_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_0N_TOUT7_P02_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_10_TOUT143_P33_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_10_TOUT266_P10_10_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_10_TOUT2_P02_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_10_TOUT62_P20_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_11_TOUT144_P33_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_11_TOUT267_P10_14_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_11_TOUT3_P02_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_11_TOUT60_P20_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_11_TOUT63_P20_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_12_TOUT268_P10_13_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_12_TOUT34_P33_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_12_TOUT4_P02_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_12_TOUT61_P20_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_13_TOUT146_P34_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_13_TOUT269_P10_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_13_TOUT35_P33_13_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_13_TOUT5_P02_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_13_TOUT65_P20_9_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_14_TOUT147_P34_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_14_TOUT270_P10_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_14_TOUT36_P32_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_14_TOUT66_P20_10_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_14_TOUT6_P02_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_15_TOUT148_P34_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_15_TOUT150_P34_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_15_TOUT37_P32_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_15_TOUT67_P20_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_15_TOUT7_P02_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_1_TOUT10_P00_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_1_TOUT116_P02_9_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_1_TOUT11_P00_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_1_TOUT19_P00_10_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_1_TOUT1_P02_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_1_TOUT242_P15_10_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_1_TOUT27_P33_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_1_TOUT31_P33_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_1_TOUT69_P20_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_1_TOUT78_P15_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_1_TOUT86_P14_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_1N_TOUT14_P00_5_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_1N_TOUT22_P33_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_1N_TOUT245_P15_13_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_1N_TOUT30_P33_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_1N_TOUT35_P33_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_1N_TOUT39_P32_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_1N_TOUT4_P02_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_1N_TOUT72_P15_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_2_TOUT117_P02_10_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_2_TOUT12_P00_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_2_TOUT20_P00_11_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_2_TOUT243_P15_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_2_TOUT28_P33_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_2_TOUT2_P02_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_2_TOUT33_P33_11_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_2_TOUT70_P20_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_2_TOUT79_P15_8_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_2N_TOUT143_P33_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_2N_TOUT15_P00_6_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_2N_TOUT23_P33_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_2N_TOUT246_P15_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_2N_TOUT40_P32_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_2N_TOUT41_P23_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_2N_TOUT5_P02_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_2N_TOUT73_P15_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_3_TOUT118_P02_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_3_TOUT13_P00_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_3_TOUT21_P00_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_3_TOUT244_P15_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_3_TOUT29_P33_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_3_TOUT38_P32_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_3_TOUT3_P02_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_3_TOUT71_P15_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_3_TOUT80_P14_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_3N_TOUT144_P33_15_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_3N_TOUT16_P00_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_3N_TOUT247_P15_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_3N_TOUT24_P33_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_3N_TOUT43_P23_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_3N_TOUT6_P02_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_3N_TOUT74_P15_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_4_TOUT0_P02_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_4_TOUT124_P11_8_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_4_TOUT14_P00_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_4_TOUT22_P33_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_4_TOUT245_P15_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_4_TOUT30_P33_8_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_4_TOUT37_P32_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_4_TOUT39_P32_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_4_TOUT53_P21_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_4_TOUT64_P20_8_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_4_TOUT72_P15_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_4_TOUT81_P14_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_4_TOUT94_P13_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_4_TOUT9_P00_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_4N_TOUT10_P00_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_4N_TOUT13_P00_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_4N_TOUT143_P33_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_4N_TOUT147_P34_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_4N_TOUT1_P02_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_4N_TOUT21_P00_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_4N_TOUT244_P15_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_4N_TOUT29_P33_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_4N_TOUT36_P32_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_4N_TOUT54_P21_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_4N_TOUT65_P20_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_4N_TOUT71_P15_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_4N_TOUT73_P15_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_4N_TOUT8_P02_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_4N_TOUT95_P11_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_5_TOUT11_P00_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_5_TOUT15_P00_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_5_TOUT23_P33_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_5_TOUT246_P15_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_5_TOUT27_P33_5_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_5_TOUT2_P02_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_5_TOUT40_P32_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_5_TOUT41_P23_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_5_TOUT55_P21_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_5_TOUT66_P20_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_5_TOUT73_P15_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_5_TOUT74_P15_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_5_TOUT82_P14_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_5_TOUT96_P11_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_5N_TOUT12_P00_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_5N_TOUT144_P33_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_5N_TOUT148_P34_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_5N_TOUT18_P00_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_5N_TOUT26_P33_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_5N_TOUT28_P33_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_5N_TOUT32_P33_10_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_5N_TOUT37_P32_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_5N_TOUT3_P02_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_5N_TOUT56_P21_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_5N_TOUT67_P20_11_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_5N_TOUT76_P15_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_5N_TOUT77_P15_6_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_5N_TOUT97_P11_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_5N_TOUT9_P00_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_6_TOUT13_P00_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_6_TOUT16_P00_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_6_TOUT247_P15_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_6_TOUT24_P33_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_6_TOUT29_P33_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_6_TOUT43_P23_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_6_TOUT48_P22_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_6_TOUT4_P02_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_6_TOUT68_P20_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_6_TOUT74_P15_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_6_TOUT80_P14_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_6_TOUT83_P14_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_6_TOUT98_P11_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_6N_TOUT10_P00_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_6N_TOUT11_P00_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_6N_TOUT149_P34_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_6N_TOUT14_P00_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_6N_TOUT19_P00_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_6N_TOUT242_P15_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_6N_TOUT27_P33_5_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_6N_TOUT30_P33_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_6N_TOUT31_P33_9_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_6N_TOUT38_P32_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_6N_TOUT40_P32_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_6N_TOUT49_P22_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_6N_TOUT5_P02_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_6N_TOUT69_P20_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_6N_TOUT78_P15_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_6N_TOUT82_P14_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_6N_TOUT91_P13_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_6N_TOUT99_P11_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_7_TOUT101_P11_12_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_7_TOUT15_P00_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_7_TOUT17_P00_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_7_TOUT248_P13_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_7_TOUT25_P33_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_7_TOUT31_P33_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_7_TOUT44_P23_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_7_TOUT45_P23_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_7_TOUT50_P22_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_7_TOUT64_P20_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_7_TOUT6_P02_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_7_TOUT70_P20_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_7_TOUT75_P15_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_7_TOUT81_P14_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_7_TOUT84_P14_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_7_TOUT92_P13_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_7N_TOUT100_P11_11_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_7N_TOUT12_P00_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_7N_TOUT130_P22_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_7N_TOUT150_P34_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_7N_TOUT16_P00_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_7N_TOUT20_P00_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_7N_TOUT243_P15_11_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_7N_TOUT28_P33_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_7N_TOUT32_P33_10_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_7N_TOUT33_P33_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_7N_TOUT39_P32_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_7N_TOUT42_P23_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_7N_TOUT71_P15_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_7N_TOUT79_P15_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_7N_TOUT7_P02_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_7N_TOUT84_P14_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_7N_TOUT93_P13_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_8_TOUT0_P02_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_8_TOUT128_P12_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_8_TOUT141_P32_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_8_TOUT249_P13_12_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_9_TOUT129_P12_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_9_TOUT142_P32_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_9_TOUT1_P02_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_9_TOUT265_P10_9_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_0_TOUT119_P11_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_0_TOUT120_P11_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_0_TOUT250_P13_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_0_TOUT48_P22_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_0_TOUT53_P21_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_0_TOUT65_P20_9_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_0_TOUT87_P14_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_0_TOUT94_P13_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_0_TOUT95_P11_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_0N_TOUT101_P11_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_0N_TOUT126_P11_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_0N_TOUT264_P13_15_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_0N_TOUT43_P23_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_0N_TOUT51_P21_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_0N_TOUT61_P20_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_0N_TOUT76_P15_5_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_0N_TOUT91_P13_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_10_TOUT104_P10_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_10_TOUT107_P10_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_10_TOUT133_P22_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_10_TOUT260_P14_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_10_TOUT62_P20_6_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_10_TOUT70_P20_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_11_TOUT105_P10_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_11_TOUT108_P10_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_11_TOUT134_P22_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_11_TOUT261_P14_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_11_TOUT63_P20_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_11_TOUT71_P15_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_12_TOUT102_P10_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_12_TOUT135_P22_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_12_TOUT262_P13_13_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_12_TOUT34_P33_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_12_TOUT72_P15_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_13_TOUT110_P10_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_13_TOUT136_P22_10_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_13_TOUT263_P14_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_13_TOUT35_P33_13_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_13_TOUT65_P20_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_13_TOUT73_P15_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_14_TOUT137_P22_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_14_TOUT264_P13_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_14_TOUT36_P32_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_14_TOUT66_P20_10_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_14_TOUT74_P15_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_15_TOUT149_P34_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_15_TOUT37_P32_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_15_TOUT67_P20_11_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_15_TOUT75_P15_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_1_TOUT120_P11_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_1_TOUT127_P11_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_1_TOUT251_P13_10_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_1_TOUT47_P22_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_1_TOUT54_P21_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_1_TOUT64_P20_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_1_TOUT95_P11_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_1N_TOUT123_P11_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_1N_TOUT124_P11_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_1N_TOUT254_P13_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_1N_TOUT44_P23_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_1N_TOUT50_P22_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_1N_TOUT52_P21_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_1N_TOUT57_P21_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_1N_TOUT61_P20_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_1N_TOUT79_P15_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_1N_TOUT90_P14_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_1N_TOUT92_P13_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_1N_TOUT98_P11_9_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_2_TOUT121_P11_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_2_TOUT125_P11_13_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_2_TOUT252_P13_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_2_TOUT46_P23_5_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_2_TOUT50_P22_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_2_TOUT55_P21_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_2_TOUT63_P20_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_2_TOUT88_P14_8_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_2_TOUT96_P11_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_2N_TOUT124_P11_8_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_2N_TOUT255_P13_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_2N_TOUT46_P23_5_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_2N_TOUT58_P21_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_2N_TOUT78_P15_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_2N_TOUT93_P13_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_2N_TOUT99_P11_10_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_3_TOUT122_P11_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_3_TOUT126_P11_14_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_3_TOUT253_P13_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_3_TOUT49_P22_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_3_TOUT56_P21_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_3_TOUT60_P20_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_3_TOUT62_P20_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_3_TOUT89_P14_9_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_3_TOUT97_P11_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_3N_TOUT100_P11_11_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_3N_TOUT106_P10_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_3N_TOUT122_P11_5_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_3N_TOUT256_P13_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_3N_TOUT45_P23_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_3N_TOUT59_P20_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_3N_TOUT77_P15_6_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_4_TOUT102_P10_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_4_TOUT123_P11_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_4_TOUT133_P22_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_4_TOUT254_P13_5_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_4_TOUT50_P22_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_4_TOUT57_P21_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_4_TOUT61_P20_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_4_TOUT90_P14_10_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_4_TOUT98_P11_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_4N_TOUT106_P10_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_4N_TOUT120_P11_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_4N_TOUT122_P11_5_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_4N_TOUT126_P11_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_4N_TOUT137_P22_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_4N_TOUT253_P13_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_4N_TOUT56_P21_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_4N_TOUT60_P20_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_4N_TOUT89_P14_9_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_4N_TOUT97_P11_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_5_TOUT103_P10_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_5_TOUT124_P11_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_5_TOUT132_P22_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_5_TOUT255_P13_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_5_TOUT58_P21_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_5_TOUT91_P13_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_5_TOUT99_P11_10_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_5N_TOUT107_P10_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_5N_TOUT119_P11_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_5N_TOUT136_P22_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_5N_TOUT250_P13_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_5N_TOUT53_P21_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_5N_TOUT87_P14_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_5N_TOUT94_P13_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_6_TOUT100_P11_11_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_6_TOUT104_P10_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_6_TOUT106_P10_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_6_TOUT125_P11_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_6_TOUT131_P22_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_6_TOUT256_P13_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_6_TOUT59_P20_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_6_TOUT92_P13_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_6N_TOUT108_P10_6_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_6N_TOUT120_P11_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_6N_TOUT122_P11_5_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_6N_TOUT135_P22_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_6N_TOUT251_P13_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_6N_TOUT54_P21_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_6N_TOUT86_P14_6_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_6N_TOUT95_P11_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_7_TOUT101_P11_12_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_7_TOUT105_P10_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_7_TOUT126_P11_14_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_7_TOUT130_P22_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_7_TOUT264_P13_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_7_TOUT64_P20_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_7_TOUT93_P13_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_7N_TOUT109_P10_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_7N_TOUT121_P11_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_7N_TOUT134_P22_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_7N_TOUT252_P13_14_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_7N_TOUT55_P21_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_7N_TOUT88_P14_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_7N_TOUT96_P11_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_7N_TOUT98_P11_9_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_8_TOUT109_P10_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_8_TOUT127_P11_15_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_8_TOUT131_P22_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_8_TOUT258_P14_11_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_8_TOUT51_P21_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_8_TOUT68_P20_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_9_TOUT103_P10_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_9_TOUT132_P22_6_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_9_TOUT259_P14_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM2_9_TOUT52_P21_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM2_9_TOUT69_P20_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_0_TOUT110_P10_8_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_0_TOUT115_P01_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_0_TOUT130_P22_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_0_TOUT155_P01_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_0_TOUT162_P01_8_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_0_TOUT174_P31_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_0_TOUT206_P25_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_0N_TOUT134_P22_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_0N_TOUT161_P01_13_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_0N_TOUT181_P31_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_0N_TOUT213_P25_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_0N_TOUT8_P02_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_10_TOUT164_P01_14_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_10_TOUT184_P31_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_10_TOUT188_P31_14_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_10_TOUT216_P25_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_10_TOUT220_P25_14_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_10_TOUT266_P10_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_11_TOUT166_P00_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_11_TOUT185_P31_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_11_TOUT189_P31_15_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_11_TOUT217_P25_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_11_TOUT221_P25_15_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_11_TOUT267_P10_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_12_TOUT167_P00_13_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_12_TOUT186_P31_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_12_TOUT218_P25_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_12_TOUT268_P10_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_13_TOUT138_P23_6_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_13_TOUT168_P00_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_13_TOUT187_P31_13_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_13_TOUT219_P25_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_13_TOUT269_P10_11_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_14_TOUT139_P23_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_14_TOUT151_P02_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_14_TOUT153_P02_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_14_TOUT188_P31_14_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_14_TOUT220_P25_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_14_TOUT270_P10_15_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_15_TOUT140_P32_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_15_TOUT152_P02_15_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_15_TOUT154_P02_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_15_TOUT189_P31_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_15_TOUT221_P25_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_1_TOUT111_P01_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_1_TOUT114_P01_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_1_TOUT131_P22_5_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_1_TOUT156_P01_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_1_TOUT163_P01_10_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_1_TOUT175_P31_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_1_TOUT207_P25_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_1_TOUT242_P15_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_1_TOUT265_P10_9_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_1N_TOUT116_P02_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_1N_TOUT135_P22_9_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_1N_TOUT158_P01_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_1N_TOUT178_P31_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_1N_TOUT210_P25_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_1N_TOUT245_P15_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_1N_TOUT268_P10_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_2_TOUT112_P01_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_2_TOUT132_P22_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_2_TOUT157_P01_15_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_2_TOUT164_P01_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_2_TOUT176_P31_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_2_TOUT208_P25_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_2_TOUT243_P15_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_2_TOUT266_P10_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_2N_TOUT117_P02_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_2N_TOUT136_P22_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_2N_TOUT159_P01_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_2N_TOUT179_P31_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_2N_TOUT211_P25_5_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_2N_TOUT246_P15_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_2N_TOUT267_P10_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_3_TOUT113_P01_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_3_TOUT133_P22_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_3_TOUT165_P01_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_3_TOUT177_P31_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_3_TOUT209_P25_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_3_TOUT244_P15_12_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_3_TOUT269_P10_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_3N_TOUT118_P02_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_3N_TOUT137_P22_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_3N_TOUT160_P01_9_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_3N_TOUT180_P31_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_3N_TOUT212_P25_6_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_3N_TOUT212_P26_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_3N_TOUT247_P15_15_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_3N_TOUT270_P10_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_4_TOUT110_P10_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_4_TOUT111_P01_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_4_TOUT114_P01_6_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_4_TOUT134_P22_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_4_TOUT158_P01_12_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_4_TOUT178_P31_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_4_TOUT210_P25_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_4_TOUT245_P15_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_4N_TOUT151_P02_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_4N_TOUT165_P01_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_4N_TOUT177_P31_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_4N_TOUT209_P25_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_4N_TOUT244_P15_12_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_5_TOUT115_P01_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_5_TOUT135_P22_9_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_5_TOUT159_P01_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_5_TOUT179_P31_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_5_TOUT211_P25_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_5_TOUT246_P15_14_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_5_TOUT265_P10_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_5N_TOUT153_P02_13_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_5N_TOUT155_P01_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_5N_TOUT166_P00_14_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_5N_TOUT174_P31_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_5N_TOUT206_P25_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_5N_TOUT268_P10_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_6_TOUT136_P22_10_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_6_TOUT160_P01_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_6_TOUT180_P31_6_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_6_TOUT212_P25_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_6_TOUT212_P26_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_6_TOUT247_P15_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_6_TOUT266_P10_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_6N_TOUT154_P02_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_6N_TOUT156_P01_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_6N_TOUT175_P31_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_6N_TOUT207_P25_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_6N_TOUT242_P15_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_6N_TOUT267_P10_14_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_7_TOUT137_P22_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_7_TOUT161_P01_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_7_TOUT181_P31_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_7_TOUT213_P25_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_7_TOUT248_P13_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_7_TOUT269_P10_11_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_7N_TOUT152_P02_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_7N_TOUT157_P01_15_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_7N_TOUT176_P31_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_7N_TOUT208_P25_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_7N_TOUT243_P15_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_7N_TOUT270_P10_15_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_8_TOUT162_P01_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_8_TOUT182_P31_8_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_8_TOUT186_P31_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_8_TOUT214_P25_8_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_8_TOUT218_P25_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_8_TOUT249_P13_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_9_TOUT163_P01_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_9_TOUT183_P31_9_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_9_TOUT187_P31_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_9_TOUT215_P25_9_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM3_9_TOUT219_P25_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM3_9_TOUT265_P10_9_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM4_0_TOUT155_P01_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM4_0_TOUT162_P01_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM4_0_TOUT190_P30_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM4_0_TOUT222_P24_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM4_0_TOUT250_P13_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM4_10_TOUT164_P01_14_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM4_10_TOUT200_P30_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM4_10_TOUT204_P30_14_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM4_10_TOUT232_P24_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM4_10_TOUT260_P14_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM4_11_TOUT166_P00_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM4_11_TOUT201_P30_11_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM4_11_TOUT205_P30_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM4_11_TOUT233_P24_11_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM4_11_TOUT261_P14_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM4_12_TOUT167_P00_13_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM4_12_TOUT202_P30_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM4_12_TOUT230_P24_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM4_12_TOUT234_P24_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM4_12_TOUT262_P13_13_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM4_13_TOUT168_P00_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM4_13_TOUT203_P30_13_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM4_13_TOUT231_P24_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM4_13_TOUT235_P24_13_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM4_13_TOUT263_P14_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM4_14_TOUT151_P02_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM4_14_TOUT153_P02_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM4_14_TOUT204_P30_14_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM4_14_TOUT232_P24_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM4_14_TOUT236_P24_14_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM4_14_TOUT264_P13_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM4_15_TOUT152_P02_15_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM4_15_TOUT154_P02_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM4_15_TOUT205_P30_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM4_15_TOUT233_P24_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM4_15_TOUT237_P24_15_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM4_1_TOUT156_P01_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM4_1_TOUT163_P01_10_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM4_1_TOUT191_P30_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM4_1_TOUT223_P24_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM4_1_TOUT251_P13_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM4_2_TOUT157_P01_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM4_2_TOUT164_P01_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM4_2_TOUT192_P30_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM4_2_TOUT224_P24_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM4_2_TOUT252_P13_14_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM4_3_TOUT165_P01_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM4_3_TOUT193_P30_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM4_3_TOUT225_P24_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM4_3_TOUT253_P13_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM4_4_TOUT111_P01_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM4_4_TOUT158_P01_12_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM4_4_TOUT194_P30_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM4_4_TOUT226_P24_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM4_4_TOUT254_P13_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM4_4_TOUT8_P02_8_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM4_5_TOUT116_P02_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM4_5_TOUT159_P01_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM4_5_TOUT195_P30_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM4_5_TOUT227_P24_5_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM4_5_TOUT255_P13_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM4_6_TOUT117_P02_10_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM4_6_TOUT160_P01_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM4_6_TOUT196_P30_6_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM4_6_TOUT228_P24_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM4_6_TOUT256_P13_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM4_7_TOUT118_P02_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM4_7_TOUT161_P01_13_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM4_7_TOUT197_P30_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM4_7_TOUT229_P24_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM4_7_TOUT264_P13_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM4_8_TOUT162_P01_8_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM4_8_TOUT198_P30_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM4_8_TOUT202_P30_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM4_8_TOUT230_P24_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM4_8_TOUT258_P14_11_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM4_9_TOUT163_P01_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM4_9_TOUT199_P30_9_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM4_9_TOUT203_P30_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM4_9_TOUT231_P24_9_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM4_9_TOUT259_P14_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_Tom_0 : IfxGtm_cfg.h

IfxGtm_Tom_1 : IfxGtm_cfg.h

IfxGtm_Tom_2 : IfxGtm_cfg.h

IfxGtm_Tom_3 : IfxGtm_cfg.h

IfxGtm_Tom_4 : IfxGtm_cfg.h

IfxGtm_Tom_Ch : IfxGtm_cfg.h

IfxGtm_Tom_Ch_0 : IfxGtm_cfg.h

IfxGtm_Tom_Ch_1 : IfxGtm_cfg.h

IfxGtm_Tom_Ch_10 : IfxGtm_cfg.h

IfxGtm_Tom_Ch_11 : IfxGtm_cfg.h

IfxGtm_Tom_Ch_12 : IfxGtm_cfg.h

IfxGtm_Tom_Ch_13 : IfxGtm_cfg.h

IfxGtm_Tom_Ch_14 : IfxGtm_cfg.h

IfxGtm_Tom_Ch_15 : IfxGtm_cfg.h

IfxGtm_Tom_Ch_2 : IfxGtm_cfg.h

IfxGtm_Tom_Ch_3 : IfxGtm_cfg.h

IfxGtm_Tom_Ch_4 : IfxGtm_cfg.h

IfxGtm_Tom_Ch_5 : IfxGtm_cfg.h

IfxGtm_Tom_Ch_6 : IfxGtm_cfg.h

IfxGtm_Tom_Ch_7 : IfxGtm_cfg.h

IfxGtm_Tom_Ch_8 : IfxGtm_cfg.h

IfxGtm_Tom_Ch_9 : IfxGtm_cfg.h

IfxGtm_Tom_Ch_clearOneNotification() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Ch_clearZeroNotification() : IfxGtm_Tom.h , IfxGtm_Tom.c

IfxGtm_Tom_Ch_ClkSrc : IfxGtm_Tom.h

IfxGtm_Tom_Ch_ClkSrc_cmuFxclk0 : IfxGtm_Tom.h

IfxGtm_Tom_Ch_ClkSrc_cmuFxclk1 : IfxGtm_Tom.h

IfxGtm_Tom_Ch_ClkSrc_cmuFxclk2 : IfxGtm_Tom.h

IfxGtm_Tom_Ch_ClkSrc_cmuFxclk3 : IfxGtm_Tom.h

IfxGtm_Tom_Ch_ClkSrc_cmuFxclk4 : IfxGtm_Tom.h

IfxGtm_Tom_Ch_ClkSrc_noClock : IfxGtm_Tom.h

IfxGtm_Tom_Ch_getChannelPointer() : IfxGtm_Tom.h

IfxGtm_Tom_Ch_getClockFrequency() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Ch_getClockSource() : IfxGtm_Tom.h , IfxGtm_Tom.c

IfxGtm_Tom_Ch_getCompareOne() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Ch_getCompareOnePointer() : IfxGtm_Tom.h , IfxGtm_Tom.c

IfxGtm_Tom_Ch_getCompareZero() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Ch_getCompareZeroPointer() : IfxGtm_Tom.h , IfxGtm_Tom.c

IfxGtm_Tom_Ch_getOutputLevel() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Ch_getSrcPointer() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Ch_getTgcPointer() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Ch_getTimerPointer() : IfxGtm_Tom.h , IfxGtm_Tom.c

IfxGtm_Tom_Ch_isOneNotification() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Ch_isZeroNotification() : IfxGtm_Tom.h , IfxGtm_Tom.c

IfxGtm_Tom_Ch_none : IfxGtm_cfg.h

IfxGtm_Tom_Ch_OutputTrigger : IfxGtm_Tom.h

IfxGtm_Tom_Ch_OutputTrigger_forward : IfxGtm_Tom.h

IfxGtm_Tom_Ch_OutputTrigger_generate : IfxGtm_Tom.h

IfxGtm_Tom_Ch_raiseInterruptOne() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Ch_raiseInterruptZero() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Ch_ResetEvent : IfxGtm_Tom.h

IfxGtm_Tom_Ch_ResetEvent_onCm0 : IfxGtm_Tom.h

IfxGtm_Tom_Ch_ResetEvent_onTrigger : IfxGtm_Tom.h

IfxGtm_Tom_Ch_setClockSource() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Ch_setCompare() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Ch_setCompareOne() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Ch_setCompareOneShadow() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Ch_setCompareShadow() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Ch_setCompareZero() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Ch_setCompareZeroShadow() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Ch_setCounterValue() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Ch_setGatedCounter() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Ch_setNotification() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Ch_setOneShotMode() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Ch_setPcm() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Ch_setResetSource() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Ch_setSignalLevel() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Ch_setSpe() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Ch_setTriggerOutput() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Dtm_PwmHl_getDeadtime() : IfxGtm_Tom_Dtm_PwmHl.c , IfxGtm_Tom_Dtm_PwmHl.h

IfxGtm_Tom_Dtm_PwmHl_getDeadtimeInTimerClockTicks() : IfxGtm_Tom_Dtm_PwmHl.c

IfxGtm_Tom_Dtm_PwmHl_getDeadtimeTick() : IfxGtm_Tom_Dtm_PwmHl.h , IfxGtm_Tom_Dtm_PwmHl.c

IfxGtm_Tom_Dtm_PwmHl_getMinPulse() : IfxGtm_Tom_Dtm_PwmHl.c , IfxGtm_Tom_Dtm_PwmHl.h

IfxGtm_Tom_Dtm_PwmHl_getMode() : IfxGtm_Tom_Dtm_PwmHl.h , IfxGtm_Tom_Dtm_PwmHl.c

IfxGtm_Tom_Dtm_PwmHl_init() : IfxGtm_Tom_Dtm_PwmHl.c , IfxGtm_Tom_Dtm_PwmHl.h

IfxGtm_Tom_Dtm_PwmHl_initConfig() : IfxGtm_Tom_Dtm_PwmHl.c , IfxGtm_Tom_Dtm_PwmHl.h

IfxGtm_Tom_Dtm_PwmHl_invertActiveState() : IfxGtm_Tom_Dtm_PwmHl.c

IFXGTM_TOM_DTM_PWMHL_MAX_DEADTIME_IN_TICKS : IfxGtm_Tom_Dtm_PwmHl.h

IFXGTM_TOM_DTM_PWMHL_MAX_NUM_CHANNELS : IfxGtm_Tom_Dtm_PwmHl.h

IfxGtm_Tom_Dtm_PwmHl_modes : IfxGtm_Tom_Dtm_PwmHl.c

IfxGtm_Tom_Dtm_PwmHl_setDeadtime() : IfxGtm_Tom_Dtm_PwmHl.c , IfxGtm_Tom_Dtm_PwmHl.h

IfxGtm_Tom_Dtm_PwmHl_setMinPulse() : IfxGtm_Tom_Dtm_PwmHl.h , IfxGtm_Tom_Dtm_PwmHl.c

IfxGtm_Tom_Dtm_PwmHl_setMode() : IfxGtm_Tom_Dtm_PwmHl.c , IfxGtm_Tom_Dtm_PwmHl.h

IfxGtm_Tom_Dtm_PwmHl_setOnTime() : IfxGtm_Tom_Dtm_PwmHl.c

IfxGtm_Tom_Dtm_PwmHl_setOnTimeAndShift() : IfxGtm_Tom_Dtm_PwmHl.c , IfxGtm_Tom_Dtm_PwmHl.h

IfxGtm_Tom_Dtm_PwmHl_setPulse() : IfxGtm_Tom_Dtm_PwmHl.c , IfxGtm_Tom_Dtm_PwmHl.h

IfxGtm_Tom_Dtm_PwmHl_setupChannels() : IfxGtm_Tom_Dtm_PwmHl.c , IfxGtm_Tom_Dtm_PwmHl.h

IfxGtm_Tom_Dtm_PwmHl_stdIfPwmHlInit() : IfxGtm_Tom_Dtm_PwmHl.c , IfxGtm_Tom_Dtm_PwmHl.h

IfxGtm_Tom_Dtm_PwmHl_Update : IfxGtm_Tom_Dtm_PwmHl.h

IfxGtm_Tom_Dtm_PwmHl_updateAndShiftOff() : IfxGtm_Tom_Dtm_PwmHl.c

IfxGtm_Tom_Dtm_PwmHl_updateCenterAligned() : IfxGtm_Tom_Dtm_PwmHl.c

IfxGtm_Tom_Dtm_PwmHl_updateEdgeAligned() : IfxGtm_Tom_Dtm_PwmHl.c

IfxGtm_Tom_Dtm_PwmHl_updateOff() : IfxGtm_Tom_Dtm_PwmHl.c

IfxGtm_Tom_Dtm_PwmHl_updatePulse() : IfxGtm_Tom_Dtm_PwmHl.c

IfxGtm_Tom_Dtm_PwmHl_UpdatePulse : IfxGtm_Tom_Dtm_PwmHl.h

IfxGtm_Tom_Dtm_PwmHl_updatePulseOff() : IfxGtm_Tom_Dtm_PwmHl.c

IfxGtm_Tom_Dtm_PwmHl_UpdateShift : IfxGtm_Tom_Dtm_PwmHl.h

IfxGtm_Tom_Dtm_PwmHl_updateShiftCenterAligned() : IfxGtm_Tom_Dtm_PwmHl.c

IFXGTM_TOM_NUM_TGC_CHANNELS : IfxGtm_Tom.h

IfxGtm_Tom_Pwm_init() : IfxGtm_Tom_Pwm.c , IfxGtm_Tom_Pwm.h

IfxGtm_Tom_Pwm_initConfig() : IfxGtm_Tom_Pwm.c , IfxGtm_Tom_Pwm.h

IfxGtm_Tom_Pwm_start() : IfxGtm_Tom_Pwm.h , IfxGtm_Tom_Pwm.c

IfxGtm_Tom_Pwm_stop() : IfxGtm_Tom_Pwm.c , IfxGtm_Tom_Pwm.h

IfxGtm_Tom_PwmHl : IfxGtm_Tom_PwmHl.h

IfxGtm_Tom_PwmHl_getDeadtime() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h

IfxGtm_Tom_PwmHl_getMinPulse() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h

IfxGtm_Tom_PwmHl_getMode() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h

IfxGtm_Tom_PwmHl_init() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h

IfxGtm_Tom_PwmHl_initConfig() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h

IfxGtm_Tom_PwmHl_invertActiveState() : IfxGtm_Tom_PwmHl.c

IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS : IfxGtm_Tom_PwmHl.h

IfxGtm_Tom_PwmHl_modes : IfxGtm_Tom_PwmHl.c

IfxGtm_Tom_PwmHl_setDeadtime() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h

IfxGtm_Tom_PwmHl_setMinPulse() : IfxGtm_Tom_PwmHl.h , IfxGtm_Tom_PwmHl.c

IfxGtm_Tom_PwmHl_setMode() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h

IfxGtm_Tom_PwmHl_setOnTime() : IfxGtm_Tom_PwmHl.h , IfxGtm_Tom_PwmHl.c

IfxGtm_Tom_PwmHl_setOnTimeAndShift() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h

IfxGtm_Tom_PwmHl_setPulse() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h

IfxGtm_Tom_PwmHl_setupChannels() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h

IfxGtm_Tom_PwmHl_stdIfPwmHlInit() : IfxGtm_Tom_PwmHl.h , IfxGtm_Tom_PwmHl.c

IfxGtm_Tom_PwmHl_Update : IfxGtm_Tom_PwmHl.h

IfxGtm_Tom_PwmHl_updateAndShiftOff() : IfxGtm_Tom_PwmHl.c

IfxGtm_Tom_PwmHl_updateCenterAligned() : IfxGtm_Tom_PwmHl.c

IfxGtm_Tom_PwmHl_updateEdgeAligned() : IfxGtm_Tom_PwmHl.c

IfxGtm_Tom_PwmHl_updateOff() : IfxGtm_Tom_PwmHl.c

IfxGtm_Tom_PwmHl_updatePulse() : IfxGtm_Tom_PwmHl.c

IfxGtm_Tom_PwmHl_UpdatePulse : IfxGtm_Tom_PwmHl.h

IfxGtm_Tom_PwmHl_updatePulseOff() : IfxGtm_Tom_PwmHl.c

IfxGtm_Tom_PwmHl_UpdateShift : IfxGtm_Tom_PwmHl.h

IfxGtm_Tom_PwmHl_updateShiftCenterAligned() : IfxGtm_Tom_PwmHl.c

IfxGtm_Tom_setTout() : IfxGtm_Tom.h

IfxGtm_Tom_Tgc : IfxGtm_cfg.h

IfxGtm_Tom_Tgc_0 : IfxGtm_cfg.h

IfxGtm_Tom_Tgc_1 : IfxGtm_cfg.h

IfxGtm_Tom_Tgc_buildFeature() : IfxGtm_Tom.h , IfxGtm_Tom.c

IfxGtm_Tom_Tgc_buildFeatureForChannel() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Tgc_enableChannel() : IfxGtm_Tom.h , IfxGtm_Tom.c

IfxGtm_Tom_Tgc_enableChannelOutput() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Tgc_enableChannels() : IfxGtm_Tom.h , IfxGtm_Tom.c

IfxGtm_Tom_Tgc_enableChannelsOutput() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Tgc_enableChannelsTrigger() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Tgc_enableChannelsUpdate() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Tgc_enableChannelUpdate() : IfxGtm_Tom.h , IfxGtm_Tom.c

IfxGtm_Tom_Tgc_enableTimeTrigger() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Tgc_resetChannels() : IfxGtm_Tom.h , IfxGtm_Tom.c

IfxGtm_Tom_Tgc_setChannelForceUpdate() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Tgc_setChannelsForceUpdate() : IfxGtm_Tom.h , IfxGtm_Tom.c

IfxGtm_Tom_Tgc_setTimeTrigger() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Tgc_trigger() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Tgc_writeGlobalControl() : IfxGtm_Tom.h

IfxGtm_Tom_Timer_acknowledgeTimerIrq() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h

IfxGtm_Tom_Timer_acknowledgeTriggerIrq() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h

IfxGtm_Tom_Timer_addToChannelMask() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h

IfxGtm_Tom_Timer_applyUpdate() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h

IfxGtm_Tom_Timer_disableUpdate() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h

IfxGtm_Tom_Timer_getFrequency() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h

IfxGtm_Tom_Timer_getInputFrequency() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h

IfxGtm_Tom_Timer_getOffset() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h

IfxGtm_Tom_Timer_getPeriod() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h

IfxGtm_Tom_Timer_getPointer() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h

IfxGtm_Tom_Timer_getResolution() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h

IfxGtm_Tom_Timer_getTrigger() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h

IfxGtm_Tom_Timer_getTriggerPointer() : IfxGtm_Tom_Timer.h , IfxGtm_Tom_Timer.c

IfxGtm_Tom_Timer_init() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h

IfxGtm_Tom_Timer_initConfig() : IfxGtm_Tom_Timer.h , IfxGtm_Tom_Timer.c

IfxGtm_Tom_Timer_run() : IfxGtm_Tom_Timer.h , IfxGtm_Tom_Timer.c

IfxGtm_Tom_Timer_setFrequency() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h

IfxGtm_Tom_Timer_setPeriod() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h

IfxGtm_Tom_Timer_setSingleMode() : IfxGtm_Tom_Timer.h , IfxGtm_Tom_Timer.c

IfxGtm_Tom_Timer_setTrigger() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h

IfxGtm_Tom_Timer_stdIfTimerInit() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h

IfxGtm_Tom_Timer_stop() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h

IfxGtm_Tom_Timer_updateInputFrequency() : IfxGtm_Tom_Timer.h , IfxGtm_Tom_Timer.c

IfxGtm_Tom_ToutMapP : IfxGtm_PinMap.h

IfxGtm_TomDtm_PwmHl : IfxGtm_Tom_Dtm_PwmHl.h

IfxGtm_ToutSel : IfxGtm_PinMap.h

IfxGtm_ToutSel_a : IfxGtm_PinMap.h

IfxGtm_ToutSel_b : IfxGtm_PinMap.h

IfxGtm_ToutSel_c : IfxGtm_PinMap.h

IfxGtm_ToutSel_d : IfxGtm_PinMap.h

IfxGtm_ToutSel_e : IfxGtm_PinMap.h

IfxGtm_ToutSel_f : IfxGtm_PinMap.h

IfxGtm_ToutSel_g : IfxGtm_PinMap.h

IfxGtm_ToutSel_h : IfxGtm_PinMap.h

IfxGtm_ToutSel_i : IfxGtm_PinMap.h

IfxGtm_ToutSel_j : IfxGtm_PinMap.h

IfxGtm_ToutSel_k : IfxGtm_PinMap.h

IfxGtm_ToutSel_l : IfxGtm_PinMap.h

IfxGtm_Trig_AdcGroup : IfxGtm_Trig.h

IfxGtm_Trig_AdcGroup_0 : IfxGtm_Trig.h

IfxGtm_Trig_AdcGroup_1 : IfxGtm_Trig.h

IfxGtm_Trig_AdcGroup_10 : IfxGtm_Trig.h

IfxGtm_Trig_AdcGroup_11 : IfxGtm_Trig.h

IfxGtm_Trig_AdcGroup_2 : IfxGtm_Trig.h

IfxGtm_Trig_AdcGroup_3 : IfxGtm_Trig.h

IfxGtm_Trig_AdcGroup_4 : IfxGtm_Trig.h

IfxGtm_Trig_AdcGroup_5 : IfxGtm_Trig.h

IfxGtm_Trig_AdcGroup_6 : IfxGtm_Trig.h

IfxGtm_Trig_AdcGroup_7 : IfxGtm_Trig.h

IfxGtm_Trig_AdcGroup_8 : IfxGtm_Trig.h

IfxGtm_Trig_AdcGroup_9 : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrig : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrig_0 : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrig_1 : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrig_2 : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrig_3 : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrig_4 : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrig_count : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrigChannel : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrigChannel_11 : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrigChannel_12 : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrigChannel_13 : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrigChannel_14 : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrigChannel_15 : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrigChannel_3 : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrigChannel_4 : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrigChannel_5 : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrigChannel_6 : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrigChannel_7 : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrigChannel_count : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrigSource : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrigSource_atom0 : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrigSource_atom1 : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrigSource_atom10 : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrigSource_atom11 : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrigSource_atom2 : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrigSource_atom3 : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrigSource_atom4 : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrigSource_atom5 : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrigSource_atom6 : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrigSource_atom7 : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrigSource_atom8 : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrigSource_atom9 : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrigSource_count : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrigSource_tom0 : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrigSource_tom1 : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrigSource_tom2 : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrigSource_tom3 : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrigSource_tom4 : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrigSource_tom5 : IfxGtm_Trig.h

IfxGtm_Trig_CanDevice : IfxGtm_Trig.h

IfxGtm_Trig_CanDevice_0 : IfxGtm_Trig.h

IfxGtm_Trig_CanDevice_1 : IfxGtm_Trig.h

IfxGtm_Trig_CanDevice_2 : IfxGtm_Trig.h

IfxGtm_Trig_CanDevice_count : IfxGtm_Trig.h

IfxGtm_Trig_CanTrig : IfxGtm_Trig.h

IfxGtm_Trig_CanTrig_0 : IfxGtm_Trig.h

IfxGtm_Trig_CanTrig_1 : IfxGtm_Trig.h

IfxGtm_Trig_CanTrig_2 : IfxGtm_Trig.h

IfxGtm_Trig_CanTrig_3 : IfxGtm_Trig.h

IfxGtm_Trig_CanTrig_count : IfxGtm_Trig.h

IfxGtm_Trig_CanTrig_table0 : IfxGtm_Trig.c

IfxGtm_Trig_CanTrig_table1 : IfxGtm_Trig.c

IfxGtm_Trig_CanTrig_table2_3 : IfxGtm_Trig.c

IfxGtm_Trig_CanTrigChannel : IfxGtm_Trig.h

IfxGtm_Trig_CanTrigChannel_0 : IfxGtm_Trig.h

IfxGtm_Trig_CanTrigChannel_1 : IfxGtm_Trig.h

IfxGtm_Trig_CanTrigChannel_11 : IfxGtm_Trig.h

IfxGtm_Trig_CanTrigChannel_12 : IfxGtm_Trig.h

IfxGtm_Trig_CanTrigChannel_13 : IfxGtm_Trig.h

IfxGtm_Trig_CanTrigChannel_14 : IfxGtm_Trig.h

IfxGtm_Trig_CanTrigChannel_2 : IfxGtm_Trig.h

IfxGtm_Trig_CanTrigChannel_3 : IfxGtm_Trig.h

IfxGtm_Trig_CanTrigChannel_4 : IfxGtm_Trig.h

IfxGtm_Trig_CanTrigChannel_5 : IfxGtm_Trig.h

IfxGtm_Trig_CanTrigChannel_6 : IfxGtm_Trig.h

IfxGtm_Trig_CanTrigChannel_7 : IfxGtm_Trig.h

IfxGtm_Trig_CanTrigChannel_count : IfxGtm_Trig.h

IfxGtm_Trig_CanTrigSource : IfxGtm_Trig.h

IfxGtm_Trig_CanTrigSource_atom0 : IfxGtm_Trig.h

IfxGtm_Trig_CanTrigSource_atom1 : IfxGtm_Trig.h

IfxGtm_Trig_CanTrigSource_atom2 : IfxGtm_Trig.h

IfxGtm_Trig_CanTrigSource_count : IfxGtm_Trig.h

IfxGtm_Trig_CanTrigSource_tom0 : IfxGtm_Trig.h

IfxGtm_Trig_CanTrigSource_tom1 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrig : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrig_0 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrig_1 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrig_2 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrig_3 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource_atom0_4 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource_atom0_5 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource_atom0_6 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource_atom0_7 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource_atom10_6 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource_atom10_7 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource_atom11_6 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource_atom11_7 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource_atom1_4 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource_atom1_5 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource_atom1_6 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource_atom1_7 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource_atom2_4 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource_atom2_5 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource_atom2_6 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource_atom2_7 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource_atom3_4 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource_atom3_5 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource_atom3_6 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource_atom3_7 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource_atom4_6 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource_atom4_7 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource_atom5_6 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource_atom5_7 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource_atom6_6 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource_atom6_7 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource_atom7_6 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource_atom7_7 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource_atom8_6 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource_atom8_7 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource_atom9_6 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource_atom9_7 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource_reserved0 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource_reserved1 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource_reserved2 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource_tom0_13 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource_tom0_14 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource_tom0_6 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource_tom0_7 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource_tom1_14 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource_tom1_6 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource_tom1_7 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource_tom2_13 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource_tom2_14 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource_tom2_6 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource_tom2_7 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource_tom3_14 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource_tom3_7 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource_tom4_14 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource_tom4_7 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource_tom5_14 : IfxGtm_Trig.h

IfxGtm_Trig_EdsadcTrigSource_tom5_7 : IfxGtm_Trig.h

IfxGtm_Trig_EvadcTrig_tableAdc0_1_2 : IfxGtm_Trig.c

IfxGtm_Trig_EvadcTrig_tableAdc3_4 : IfxGtm_Trig.c

IfxGtm_Trig_EvadcTrig_tableAdc5_6_7 : IfxGtm_Trig.c

IfxGtm_Trig_EvadcTrig_tableAdc8_9_10_11 : IfxGtm_Trig.c

IfxGtm_Trig_fromEdsadc() : IfxGtm_Trig.c , IfxGtm_Trig.h

IfxGtm_Trig_fromMsc() : IfxGtm_Trig.h , IfxGtm_Trig.c

IfxGtm_Trig_MscTrig_table : IfxGtm_Trig.c

IfxGtm_Trig_MscTrigChannel : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigChannel_0 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigChannel_1 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigChannel_10 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigChannel_11 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigChannel_12 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigChannel_13 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigChannel_14 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigChannel_15 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigChannel_2 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigChannel_3 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigChannel_4 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigChannel_5 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigChannel_6 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigChannel_7 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigChannel_8 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigChannel_9 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigChannel_count : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigInput : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigInput_high : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigInput_low : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigInput_lowExtended : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigOutput : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigOutput_0 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigOutput_1 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigOutput_2 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigOutput_3 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigSet : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigSet_1 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigSet_2 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigSet_3 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigSet_4 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigSet_5 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigSet_6 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigSet_7 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigSet_8 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigSet_9 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigSet_count : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigSignal : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigSignal_0 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigSignal_1 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigSignal_10 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigSignal_11 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigSignal_12 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigSignal_13 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigSignal_14 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigSignal_15 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigSignal_2 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigSignal_3 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigSignal_4 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigSignal_5 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigSignal_6 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigSignal_7 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigSignal_8 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigSignal_9 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigSource : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigSource_atom0 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigSource_atom1 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigSource_atom10 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigSource_atom11 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigSource_atom2 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigSource_atom3 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigSource_atom4 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigSource_atom5 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigSource_atom6 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigSource_atom7 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigSource_atom8 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigSource_atom9 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigSource_count : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigSource_tom0 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigSource_tom1 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigSource_tom2 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigSource_tom3 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigSource_tom4 : IfxGtm_Trig.h

IfxGtm_Trig_MscTrigSource_tom5 : IfxGtm_Trig.h

IfxGtm_Trig_Psi5sTrigSource : IfxGtm_Trig.h

IfxGtm_Trig_Psi5sTrigSource_atomX_4 : IfxGtm_Trig.h

IfxGtm_Trig_Psi5sTrigSource_atomX_5 : IfxGtm_Trig.h

IfxGtm_Trig_Psi5sTrigSource_atomX_6 : IfxGtm_Trig.h

IfxGtm_Trig_Psi5sTrigSource_atomX_7 : IfxGtm_Trig.h

IfxGtm_Trig_Psi5sTrigSource_no_Trigger : IfxGtm_Trig.h

IfxGtm_Trig_Psi5sTrigSource_tomX_13 : IfxGtm_Trig.h

IfxGtm_Trig_Psi5sTrigSource_tomX_14 : IfxGtm_Trig.h

IfxGtm_Trig_Psi5sTrigSource_tomX_6 : IfxGtm_Trig.h

IfxGtm_Trig_Psi5sTrigSource_tomX_7 : IfxGtm_Trig.h

IfxGtm_Trig_Psi5TrigSource : IfxGtm_Trig.h

IfxGtm_Trig_Psi5TrigSource_atom2_4 : IfxGtm_Trig.h

IfxGtm_Trig_Psi5TrigSource_atom2_5 : IfxGtm_Trig.h

IfxGtm_Trig_Psi5TrigSource_atom2_6 : IfxGtm_Trig.h

IfxGtm_Trig_Psi5TrigSource_atom2_7 : IfxGtm_Trig.h

IfxGtm_Trig_Psi5TrigSource_no_Trigger : IfxGtm_Trig.h

IfxGtm_Trig_Psi5TrigSource_tom0_13 : IfxGtm_Trig.h

IfxGtm_Trig_Psi5TrigSource_tom0_14 : IfxGtm_Trig.h

IfxGtm_Trig_Psi5TrigSource_tom0_6 : IfxGtm_Trig.h

IfxGtm_Trig_Psi5TrigSource_tom0_7 : IfxGtm_Trig.h

IfxGtm_Trig_Psi5TrigSource_tom2_13 : IfxGtm_Trig.h

IfxGtm_Trig_Psi5TrigSource_tom2_14 : IfxGtm_Trig.h

IfxGtm_Trig_Psi5TrigSource_tom2_6 : IfxGtm_Trig.h

IfxGtm_Trig_Psi5TrigSource_tom2_7 : IfxGtm_Trig.h

IfxGtm_Trig_SentGroup : IfxGtm_Trig.h

IfxGtm_Trig_SentGroup_0 : IfxGtm_Trig.h

IfxGtm_Trig_SentGroup_1 : IfxGtm_Trig.h

IfxGtm_Trig_SentGroup_10 : IfxGtm_Trig.h

IfxGtm_Trig_SentGroup_11 : IfxGtm_Trig.h

IfxGtm_Trig_SentGroup_12 : IfxGtm_Trig.h

IfxGtm_Trig_SentGroup_13 : IfxGtm_Trig.h

IfxGtm_Trig_SentGroup_14 : IfxGtm_Trig.h

IfxGtm_Trig_SentGroup_15 : IfxGtm_Trig.h

IfxGtm_Trig_SentGroup_2 : IfxGtm_Trig.h

IfxGtm_Trig_SentGroup_3 : IfxGtm_Trig.h

IfxGtm_Trig_SentGroup_4 : IfxGtm_Trig.h

IfxGtm_Trig_SentGroup_5 : IfxGtm_Trig.h

IfxGtm_Trig_SentGroup_6 : IfxGtm_Trig.h

IfxGtm_Trig_SentGroup_7 : IfxGtm_Trig.h

IfxGtm_Trig_SentGroup_8 : IfxGtm_Trig.h

IfxGtm_Trig_SentGroup_9 : IfxGtm_Trig.h

IfxGtm_Trig_SentTrig : IfxGtm_Trig.h

IfxGtm_Trig_SentTrig_0 : IfxGtm_Trig.h

IfxGtm_Trig_SentTrig_1 : IfxGtm_Trig.h

IfxGtm_Trig_SentTrig_2 : IfxGtm_Trig.h

IfxGtm_Trig_SentTrig_3 : IfxGtm_Trig.h

IfxGtm_Trig_SentTrig_table12_13_14_15 : IfxGtm_Trig.c

IfxGtm_Trig_SentTrigChannel : IfxGtm_Trig.h

IfxGtm_Trig_SentTrigChannel_11 : IfxGtm_Trig.h

IfxGtm_Trig_SentTrigChannel_12 : IfxGtm_Trig.h

IfxGtm_Trig_SentTrigChannel_13 : IfxGtm_Trig.h

IfxGtm_Trig_SentTrigChannel_14 : IfxGtm_Trig.h

IfxGtm_Trig_SentTrigChannel_15 : IfxGtm_Trig.h

IfxGtm_Trig_SentTrigChannel_3 : IfxGtm_Trig.h

IfxGtm_Trig_SentTrigChannel_4 : IfxGtm_Trig.h

IfxGtm_Trig_SentTrigChannel_5 : IfxGtm_Trig.h

IfxGtm_Trig_SentTrigChannel_6 : IfxGtm_Trig.h

IfxGtm_Trig_SentTrigChannel_7 : IfxGtm_Trig.h

IfxGtm_Trig_SentTrigChannel_count : IfxGtm_Trig.h

IfxGtm_Trig_SentTrigSource : IfxGtm_Trig.h

IfxGtm_Trig_SentTrigSource_atom0 : IfxGtm_Trig.h

IfxGtm_Trig_SentTrigSource_atom1 : IfxGtm_Trig.h

IfxGtm_Trig_SentTrigSource_atom10 : IfxGtm_Trig.h

IfxGtm_Trig_SentTrigSource_atom11 : IfxGtm_Trig.h

IfxGtm_Trig_SentTrigSource_atom2 : IfxGtm_Trig.h

IfxGtm_Trig_SentTrigSource_atom3 : IfxGtm_Trig.h

IfxGtm_Trig_SentTrigSource_atom4 : IfxGtm_Trig.h

IfxGtm_Trig_SentTrigSource_atom5 : IfxGtm_Trig.h

IfxGtm_Trig_SentTrigSource_atom6 : IfxGtm_Trig.h

IfxGtm_Trig_SentTrigSource_atom7 : IfxGtm_Trig.h

IfxGtm_Trig_SentTrigSource_atom8 : IfxGtm_Trig.h

IfxGtm_Trig_SentTrigSource_atom9 : IfxGtm_Trig.h

IfxGtm_Trig_SentTrigSource_count : IfxGtm_Trig.h

IfxGtm_Trig_SentTrigSource_tom0 : IfxGtm_Trig.h

IfxGtm_Trig_SentTrigSource_tom1 : IfxGtm_Trig.h

IfxGtm_Trig_SentTrigSource_tom2 : IfxGtm_Trig.h

IfxGtm_Trig_SentTrigSource_tom3 : IfxGtm_Trig.h

IfxGtm_Trig_SentTrigSource_tom4 : IfxGtm_Trig.h

IfxGtm_Trig_SentTrigSource_tom5 : IfxGtm_Trig.h

IfxGtm_Trig_toCan() : IfxGtm_Trig.h , IfxGtm_Trig.c

IfxGtm_Trig_toEdsadc() : IfxGtm_Trig.h , IfxGtm_Trig.c

IfxGtm_Trig_toEVadc() : IfxGtm_Trig.c , IfxGtm_Trig.h

IfxGtm_Trig_toEVadcClear() : IfxGtm_Trig.c , IfxGtm_Trig.h

IfxGtm_Trig_toMsc() : IfxGtm_Trig.c , IfxGtm_Trig.h

IfxGtm_Trig_toPsi5() : IfxGtm_Trig.c , IfxGtm_Trig.h

IfxGtm_Trig_toPsi5s() : IfxGtm_Trig.c , IfxGtm_Trig.h

IfxGtm_Trig_toSent() : IfxGtm_Trig.c , IfxGtm_Trig.h

IfxHssl_cfg_hsctIndexMap : IfxHssl_cfg.h , IfxHssl_cfg.c

IfxHssl_cfg_hsslIndexMap : IfxHssl_cfg.h , IfxHssl_cfg.c

IfxHssl_ChannelId : IfxHssl.h

IfxHssl_ChannelId_0 : IfxHssl.h

IfxHssl_ChannelId_1 : IfxHssl.h

IfxHssl_ChannelId_2 : IfxHssl.h

IfxHssl_ChannelId_3 : IfxHssl.h

IfxHssl_clearHsctInterruptFlag() : IfxHssl.h

IfxHssl_clearHsslChannelErrorInterruptFlag() : IfxHssl.h

IfxHssl_clearHsslGlobalErrorInterruptFlag() : IfxHssl.h

IfxHssl_clearInitialiseModeFlag() : IfxHssl.h

IfxHssl_Command : IfxHssl.h

IfxHssl_Command_noAction : IfxHssl.h

IfxHssl_Command_readFrame : IfxHssl.h

IfxHssl_Command_triggerFrame : IfxHssl.h

IfxHssl_Command_writeFrame : IfxHssl.h

IfxHssl_ControlCommand : IfxHssl.h

IfxHssl_ControlCommand_disableReception : IfxHssl.h

IfxHssl_ControlCommand_enableReception : IfxHssl.h

IfxHssl_ControlCommand_highSpeedClockStart : IfxHssl.h

IfxHssl_ControlCommand_highSpeedClockStop : IfxHssl.h

IfxHssl_ControlCommand_highSpeedReception : IfxHssl.h

IfxHssl_ControlCommand_highSpeedTransmission : IfxHssl.h

IfxHssl_ControlCommand_lowSpeedReception : IfxHssl.h

IfxHssl_ControlCommand_lowSpeedTransmission : IfxHssl.h

IfxHssl_ControlCommand_mediumSpeedReception : IfxHssl.h

IfxHssl_ControlCommand_ping : IfxHssl.h

IfxHssl_ControlCommand_turnOffClockTestMode : IfxHssl.h

IfxHssl_ControlCommand_turnOnClockTestMode : IfxHssl.h

IfxHssl_ControlCommand_turnOnPayloadLoopback : IfxHssl.h

IfxHssl_DataLength : IfxHssl.h

IfxHssl_DataLength_16bit : IfxHssl.h

IfxHssl_DataLength_32bit : IfxHssl.h

IfxHssl_DataLength_8bit : IfxHssl.h

IfxHssl_disableHsctInterruptFlag() : IfxHssl.h

IfxHssl_disableHsctModule() : IfxHssl.c , IfxHssl.h

IfxHssl_disableHsctReceivePath() : IfxHssl.h

IfxHssl_disableHsctTransmitPath() : IfxHssl.h

IfxHssl_disableHsslChannelErrorInterruptFlag() : IfxHssl.h

IfxHssl_disableHsslGlobalErrorInterruptFlag() : IfxHssl.h

IfxHssl_disableHsslModule() : IfxHssl.h , IfxHssl.c

IfxHssl_enableAllErrorFlags() : IfxHssl.h

IfxHssl_enableHsctInterrupt() : IfxHssl.h

IfxHssl_enableHsctInterruptFlag() : IfxHssl.h

IfxHssl_enableHsctLvdsLoopback() : IfxHssl.h

IfxHssl_enableHsctModule() : IfxHssl.c , IfxHssl.h

IfxHssl_enableHsctReceivePath() : IfxHssl.h

IfxHssl_enableHsctTransmitPath() : IfxHssl.h

IfxHssl_enableHsslChannelErrorInterruptFlag() : IfxHssl.h

IfxHssl_enableHsslCOKInterrupt() : IfxHssl.h

IfxHssl_enableHsslERRInterrupt() : IfxHssl.h

IfxHssl_enableHsslEXIInterrupt() : IfxHssl.h

IfxHssl_enableHsslGlobalErrorInterruptFlag() : IfxHssl.h

IfxHssl_enableHsslModule() : IfxHssl.h , IfxHssl.c

IfxHssl_enableHsslRDIInterrupt() : IfxHssl.h

IfxHssl_enableHsslTRGInterrupt() : IfxHssl.h

IfxHssl_getAllMflagsStatus() : IfxHssl.h

IfxHssl_getCurrentCount() : IfxHssl.h

IfxHssl_getHsctAddress() : IfxHssl.h , IfxHssl.c

IfxHssl_getHsctIndex() : IfxHssl.h , IfxHssl.c

IfxHssl_getHsctInterruptFlagStatus() : IfxHssl.h

IfxHssl_getHsctSrcPointer() : IfxHssl.c , IfxHssl.h

IfxHssl_getHsctUnsolicitedStatusMessage() : IfxHssl.h

IfxHssl_getHsslAddress() : IfxHssl.h , IfxHssl.c

IfxHssl_getHsslChannelErrorInterruptFlagStatus() : IfxHssl.h

IfxHssl_getHsslCOKSrcPointer() : IfxHssl.h , IfxHssl.c

IfxHssl_getHsslERRSrcPointer() : IfxHssl.h , IfxHssl.c

IfxHssl_getHsslEXISrcPointer() : IfxHssl.c , IfxHssl.h

IfxHssl_getHsslGloabalErrorInterruptFlagStatus() : IfxHssl.h

IfxHssl_getHsslIndex() : IfxHssl.h , IfxHssl.c

IfxHssl_getHsslRDISrcPointer() : IfxHssl.c , IfxHssl.h

IfxHssl_getHsslTRGSrcPointer() : IfxHssl.c , IfxHssl.h

IfxHssl_getInitialiseModeFlagStatus() : IfxHssl.h

IfxHssl_getReloadCount() : IfxHssl.h

IfxHssl_Hsct_InterruptSource : IfxHssl.h

IfxHssl_Hsct_InterruptSource_commandError : IfxHssl.h

IfxHssl_Hsct_InterruptSource_headerError : IfxHssl.h

IfxHssl_Hsct_InterruptSource_interfaceControlFrameSend : IfxHssl.h

IfxHssl_Hsct_InterruptSource_payloadError : IfxHssl.h

IfxHssl_Hsct_InterruptSource_pingAnswerReceived : IfxHssl.h

IfxHssl_Hsct_InterruptSource_pllLockLosterror : IfxHssl.h

IfxHssl_Hsct_InterruptSource_speedModeSwitchError : IfxHssl.h

IfxHssl_Hsct_InterruptSource_synchronizationFifoOverflow : IfxHssl.h

IfxHssl_Hsct_InterruptSource_synchronizationFifoUnderflow : IfxHssl.h

IfxHssl_Hsct_InterruptSource_txTransferError : IfxHssl.h

IfxHssl_Hsct_InterruptSource_UnsolicitedMessageReceived : IfxHssl.h

IfxHssl_Hsct_InterruptSource_unsolicitedMessageSendFinished : IfxHssl.h

IfxHssl_Hsct_SleepMode : IfxHssl.h

IfxHssl_Hsct_SleepMode_disable : IfxHssl.h

IfxHssl_Hsct_SleepMode_enable : IfxHssl.h

IfxHssl_hsctIndex : IfxHssl_cfg.h

IfxHssl_hsctIndex_0 : IfxHssl_cfg.h

IfxHssl_hsctIndex_none : IfxHssl_cfg.h

IfxHssl_Hssl_checkErrors() : IfxHssl_Hssl.c , IfxHssl_Hssl.h

IfxHssl_Hssl_clearErrorFlags() : IfxHssl_Hssl.c , IfxHssl_Hssl.h

IfxHssl_Hssl_delay() : IfxHssl_Hssl.c , IfxHssl_Hssl.h

IfxHssl_Hssl_ERRInterruptSource : IfxHssl.h

IfxHssl_Hssl_ERRInterruptSource_notAcknowledgeError : IfxHssl.h

IfxHssl_Hssl_ERRInterruptSource_timeoutError : IfxHssl.h

IfxHssl_Hssl_ERRInterruptSource_transactionTagError : IfxHssl.h

IfxHssl_Hssl_ERRInterruptSource_unexpectedError : IfxHssl.h

IfxHssl_Hssl_EXIInterruptSource : IfxHssl.h

IfxHssl_Hssl_EXIInterruptSource_busAccessError : IfxHssl.h

IfxHssl_Hssl_EXIInterruptSource_channelNumberCodeError : IfxHssl.h

IfxHssl_Hssl_EXIInterruptSource_crcError : IfxHssl.h

IfxHssl_Hssl_EXIInterruptSource_dataLengthError : IfxHssl.h

IfxHssl_Hssl_EXIInterruptSource_memoryAccessViolation : IfxHssl.h

IfxHssl_Hssl_FrameRequest : IfxHssl_Hssl.h

IfxHssl_Hssl_FrameRequest_noAction : IfxHssl_Hssl.h

IfxHssl_Hssl_FrameRequest_readFrame : IfxHssl_Hssl.h

IfxHssl_Hssl_FrameRequest_readId : IfxHssl_Hssl.h

IfxHssl_Hssl_FrameRequest_triggerFrame : IfxHssl_Hssl.h

IfxHssl_Hssl_FrameRequest_writeFrame : IfxHssl_Hssl.h

IfxHssl_Hssl_getReadData() : IfxHssl_Hssl.h

IfxHssl_Hssl_initChannel() : IfxHssl_Hssl.c , IfxHssl_Hssl.h

IfxHssl_Hssl_initChannelConfig() : IfxHssl_Hssl.c , IfxHssl_Hssl.h

IfxHssl_Hssl_initHsctModule() : IfxHssl_Hssl.c , IfxHssl_Hssl.h

IfxHssl_Hssl_initHsctModuleConfig() : IfxHssl_Hssl.h , IfxHssl_Hssl.c

IfxHssl_Hssl_initHsslModule() : IfxHssl_Hssl.h , IfxHssl_Hssl.c

IfxHssl_Hssl_initHsslModuleConfig() : IfxHssl_Hssl.c , IfxHssl_Hssl.h

IfxHssl_Hssl_prepareStream() : IfxHssl_Hssl.c , IfxHssl_Hssl.h

IfxHssl_Hssl_read() : IfxHssl_Hssl.h , IfxHssl_Hssl.c

IfxHssl_Hssl_sendControlCommand() : IfxHssl_Hssl.c , IfxHssl_Hssl.h

IfxHssl_Hssl_singleFrameRequest() : IfxHssl_Hssl.h , IfxHssl_Hssl.c

IfxHssl_Hssl_SleepMode : IfxHssl.h

IfxHssl_Hssl_SleepMode_disable : IfxHssl.h

IfxHssl_Hssl_SleepMode_enable : IfxHssl.h

IfxHssl_Hssl_Status : IfxHssl_Hssl.h

IfxHssl_Hssl_Status_busy : IfxHssl_Hssl.h

IfxHssl_Hssl_Status_error : IfxHssl_Hssl.h

IfxHssl_Hssl_Status_ok : IfxHssl_Hssl.h

IfxHssl_Hssl_waitAcknowledge() : IfxHssl_Hssl.h , IfxHssl_Hssl.c

IfxHssl_Hssl_write() : IfxHssl_Hssl.h , IfxHssl_Hssl.c

IfxHssl_Hssl_writeStream() : IfxHssl_Hssl.c , IfxHssl_Hssl.h

IfxHssl_hsslIndex : IfxHssl_cfg.h

IfxHssl_hsslIndex_0 : IfxHssl_cfg.h

IfxHssl_hsslIndex_none : IfxHssl_cfg.h

IfxHssl_InterfaceMode : IfxHssl.h

IfxHssl_InterfaceMode_master : IfxHssl.h

IfxHssl_InterfaceMode_slave : IfxHssl.h

IfxHssl_isModuleSuspended() : IfxHssl.h

IFXHSSL_JTAG_ID_ADDRESS : IfxHssl_cfg.h

IfxHssl_MasterModeRxSpeed : IfxHssl.h

IfxHssl_MasterModeRxSpeed_highSpeed : IfxHssl.h

IfxHssl_MasterModeRxSpeed_lowSpeed : IfxHssl.h

IfxHssl_MasterModeRxSpeed_mediumSpeed : IfxHssl.h

IfxHssl_MasterModeTxSpeed : IfxHssl.h

IfxHssl_MasterModeTxSpeed_highSpeed : IfxHssl.h

IfxHssl_MasterModeTxSpeed_lowSpeed : IfxHssl.h

IFXHSSL_NUM_CHANNELS : IfxHssl_cfg.h

IFXHSSL_NUM_MODULES : IfxHssl_cfg.h

IfxHssl_PllReferenceClock : IfxHssl.h

IfxHssl_PllReferenceClock_hsctSystemClockInput : IfxHssl.h

IfxHssl_PllReferenceClock_oscillatorInput : IfxHssl.h

IfxHssl_RefClockFrequency : IfxHssl.h

IfxHssl_RefClockFrequency_10Mhz : IfxHssl.h

IfxHssl_RefClockFrequency_20Mhz : IfxHssl.h

IfxHssl_RefClockFrequency_40Mhz : IfxHssl.h

IfxHssl_resetHsctKernel() : IfxHssl.c , IfxHssl.h

IfxHssl_resetHsslKernel() : IfxHssl.h , IfxHssl.c

IfxHssl_sendHsctUnsolicitedStatusMessage() : IfxHssl.h

IfxHssl_setHsctRxLinkSpeed() : IfxHssl.h

IfxHssl_setHsctSleepMode() : IfxHssl.h

IfxHssl_setHsctTxLinkSpeed() : IfxHssl.h

IfxHssl_setHsslSleepMode() : IfxHssl.h

IfxHssl_setInitialiseModeFlag() : IfxHssl.h

IfxHssl_setReloadCount() : IfxHssl.h

IfxHssl_setSuspendMode() : IfxHssl.h

IfxHssl_setTimeoutReloadValue() : IfxHssl.h

IfxHssl_StreamingMode : IfxHssl.h

IfxHssl_StreamingMode_continuous : IfxHssl.h

IfxHssl_StreamingMode_single : IfxHssl.h

IfxHssl_SuspendMode : IfxHssl.h

IfxHssl_SuspendMode_hard : IfxHssl.h

IfxHssl_SuspendMode_none : IfxHssl.h

IfxHssl_SuspendMode_soft : IfxHssl.h

IfxHssl_SysClockDivider : IfxHssl.h

IfxHssl_SysClockDivider_1 : IfxHssl.h

IfxHssl_SysClockDivider_2 : IfxHssl.h

IfxHssl_SysClockDivider_4 : IfxHssl.h

IfxI2c0_SCL_P02_5_INOUT : IfxI2c_PinMap.c , IfxI2c_PinMap.h

IfxI2c0_SCL_P13_1_INOUT : IfxI2c_PinMap.c , IfxI2c_PinMap.h

IfxI2c0_SCL_P15_4_INOUT : IfxI2c_PinMap.c , IfxI2c_PinMap.h

IfxI2c0_SDA_P02_4_INOUT : IfxI2c_PinMap.c , IfxI2c_PinMap.h

IfxI2c0_SDA_P13_2_INOUT : IfxI2c_PinMap.c , IfxI2c_PinMap.h

IfxI2c0_SDA_P15_5_INOUT : IfxI2c_PinMap.h , IfxI2c_PinMap.c

IfxI2c1_SCL_P11_14_INOUT : IfxI2c_PinMap.h , IfxI2c_PinMap.c

IfxI2c1_SCL_P13_9_INOUT : IfxI2c_PinMap.c , IfxI2c_PinMap.h

IfxI2c1_SDA_P11_13_INOUT : IfxI2c_PinMap.c , IfxI2c_PinMap.h

IfxI2c1_SDA_P13_12_INOUT : IfxI2c_PinMap.h , IfxI2c_PinMap.c

IfxI2c_AddressMode : IfxI2c.h

IfxI2c_AddressMode_10Bit : IfxI2c.h

IfxI2c_AddressMode_7Bit : IfxI2c.h

IfxI2c_busIsFree() : IfxI2c.h

IfxI2c_BusStatus : IfxI2c.h

IfxI2c_BusStatus_busyMaster : IfxI2c.h

IfxI2c_BusStatus_idle : IfxI2c.h

IfxI2c_BusStatus_remoteSlave : IfxI2c.h

IfxI2c_BusStatus_started : IfxI2c.h

IfxI2c_cfg_indexMap : IfxI2c_cfg.h , IfxI2c_cfg.c

IfxI2c_clearAllDtrInterruptSources() : IfxI2c.h

IfxI2c_clearAllErrorInterruptSources() : IfxI2c.h

IfxI2c_clearAllProtocolInterruptSources() : IfxI2c.h

IfxI2c_clearDtrInterruptSource() : IfxI2c.h

IfxI2c_clearErrorInterruptSource() : IfxI2c.h

IfxI2c_clearProtocolInterruptSource() : IfxI2c.h

IfxI2c_clearRequestBuffer() : IfxI2c.h

IfxI2c_configureAsMaster() : IfxI2c.c , IfxI2c.h

IfxI2c_configureHighSpeedMode() : IfxI2c.c , IfxI2c.h

IfxI2c_disableDtrInterruptSource() : IfxI2c.h

IfxI2c_disableErrorInterruptFlag() : IfxI2c.h

IfxI2c_disableErrorInterruptSource() : IfxI2c.h

IfxI2c_disableModule() : IfxI2c.h , IfxI2c.c

IfxI2c_disableProtocolInterruptFlag() : IfxI2c.h

IfxI2c_disableProtocolInterruptSource() : IfxI2c.h

IfxI2c_DtrInterruptSource : IfxI2c.h

IfxI2c_DtrInterruptSource_burstRequest : IfxI2c.h

IfxI2c_DtrInterruptSource_lastBurstRequest : IfxI2c.h

IfxI2c_DtrInterruptSource_lastSingleRequest : IfxI2c.h

IfxI2c_DtrInterruptSource_singleRequest : IfxI2c.h

IfxI2c_enableDtrInterrupt() : IfxI2c.c , IfxI2c.h

IfxI2c_enableDtrInterruptSource() : IfxI2c.h

IfxI2c_enableErrorInterrupt() : IfxI2c.c , IfxI2c.h

IfxI2c_enableErrorInterruptFlag() : IfxI2c.h

IfxI2c_enableErrorInterruptSource() : IfxI2c.h

IfxI2c_enableModule() : IfxI2c.h , IfxI2c.c

IfxI2c_enableProtocolInterrupt() : IfxI2c.c , IfxI2c.h

IfxI2c_enableProtocolInterruptFlag() : IfxI2c.h

IfxI2c_enableProtocolInterruptSource() : IfxI2c.h

IfxI2c_ErrorInterruptSource : IfxI2c.h

IfxI2c_ErrorInterruptSource_rxFifoOverflow : IfxI2c.h

IfxI2c_ErrorInterruptSource_rxFifoUnderflow : IfxI2c.h

IfxI2c_ErrorInterruptSource_txFifoOverflow : IfxI2c.h

IfxI2c_ErrorInterruptSource_txFifoUnderflow : IfxI2c.h

IfxI2c_getAddress() : IfxI2c.c , IfxI2c.h

IfxI2c_getBaudrate() : IfxI2c.h , IfxI2c.c

IfxI2c_getBusStatus() : IfxI2c.h

IfxI2c_getDtrinterruptSourceStatus() : IfxI2c.h

IfxI2c_getDtrSrcPointer() : IfxI2c.h

IfxI2c_getErrorInterruptFlagStatus() : IfxI2c.h

IfxI2c_getErrorInterruptSourceStatus() : IfxI2c.h

IfxI2c_getErrorSrcPointer() : IfxI2c.h

IfxI2c_getIndex() : IfxI2c.h , IfxI2c.c

IfxI2c_getProtocolInterruptFlagStatus() : IfxI2c.h

IfxI2c_getProtocolInterruptSourceStatus() : IfxI2c.h

IfxI2c_getProtocolSrcPointer() : IfxI2c.h

IFXI2C_HIGHSPEED_MASTER_CODE : IfxI2c.h

IfxI2c_I2c_getBaudrate() : IfxI2c_I2c.h , IfxI2c_I2c.c

IfxI2c_I2c_initConfig() : IfxI2c_I2c.h , IfxI2c_I2c.c

IfxI2c_I2c_initDevice() : IfxI2c_I2c.h , IfxI2c_I2c.c

IfxI2c_I2c_initDeviceConfig() : IfxI2c_I2c.c , IfxI2c_I2c.h

IfxI2c_I2c_initModule() : IfxI2c_I2c.c , IfxI2c_I2c.h

IfxI2c_I2c_read() : IfxI2c_I2c.c , IfxI2c_I2c.h

IfxI2c_I2c_Status : IfxI2c_I2c.h

IfxI2c_I2c_Status_al : IfxI2c_I2c.h

IfxI2c_I2c_Status_busNotFree : IfxI2c_I2c.h

IfxI2c_I2c_Status_error : IfxI2c_I2c.h

IfxI2c_I2c_Status_nak : IfxI2c_I2c.h

IfxI2c_I2c_Status_ok : IfxI2c_I2c.h

IfxI2c_I2c_write() : IfxI2c_I2c.h , IfxI2c_I2c.c

IfxI2c_Index : IfxI2c_cfg.h

IfxI2c_Index_0 : IfxI2c_cfg.h

IfxI2c_Index_1 : IfxI2c_cfg.h

IfxI2c_Index_none : IfxI2c_cfg.h

IfxI2c_initSclSdaPin() : IfxI2c.c , IfxI2c.h

IfxI2c_isFifoRequest() : IfxI2c.h

IfxI2c_Mode : IfxI2c.h

IfxI2c_Mode_HighSpeed : IfxI2c.h

IfxI2c_Mode_StandardAndFast : IfxI2c.h

IFXI2C_NUM_MODULES : IfxI2c_cfg.h

IFXI2C_PINMAP_NUM_MODULES : IfxI2c_PinMap.h

IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS : IfxI2c_PinMap.h

IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS : IfxI2c_PinMap.h

IfxI2c_PinSelect : IfxI2c.h

IfxI2c_PinSelect_a : IfxI2c.h

IfxI2c_PinSelect_b : IfxI2c.h

IfxI2c_PinSelect_c : IfxI2c.h

IfxI2c_PinSelect_d : IfxI2c.h

IfxI2c_PinSelect_e : IfxI2c.h

IfxI2c_PinSelect_f : IfxI2c.h

IfxI2c_PinSelect_g : IfxI2c.h

IfxI2c_PinSelect_h : IfxI2c.h

IfxI2c_ProtocolInterruptSource : IfxI2c.h

IfxI2c_ProtocolInterruptSource_addressMatch : IfxI2c.h

IfxI2c_ProtocolInterruptSource_arbitrationLost : IfxI2c.h

IfxI2c_ProtocolInterruptSource_generalCall : IfxI2c.h

IfxI2c_ProtocolInterruptSource_masterCode : IfxI2c.h

IfxI2c_ProtocolInterruptSource_notAcknowledgeReceived : IfxI2c.h

IfxI2c_ProtocolInterruptSource_receiveMode : IfxI2c.h

IfxI2c_ProtocolInterruptSource_transmissionEnd : IfxI2c.h

IfxI2c_releaseBus() : IfxI2c.c , IfxI2c.h

IfxI2c_resetFifo() : IfxI2c.h , IfxI2c.c

IfxI2c_resetModule() : IfxI2c.c , IfxI2c.h

IfxI2c_run() : IfxI2c.h

IfxI2c_Scl_InOut_pinTable : IfxI2c_PinMap.h , IfxI2c_PinMap.c

IfxI2c_Sda_InOut_pinTable : IfxI2c_PinMap.c , IfxI2c_PinMap.h

IfxI2c_setBaudrate() : IfxI2c.c , IfxI2c.h

IfxI2c_setBitAddressMode() : IfxI2c.h

IfxI2c_setPinSelection() : IfxI2c.h

IfxI2c_setReceivePacketSize() : IfxI2c.h

IfxI2c_setSlaveDeviceAddress() : IfxI2c.h

IfxI2c_setSleepMode() : IfxI2c.h

IfxI2c_setTransmitPacketSize() : IfxI2c.h

IfxI2c_SleepMode : IfxI2c.h

IfxI2c_SleepMode_disable : IfxI2c.h

IfxI2c_SleepMode_enable : IfxI2c.h

IfxI2c_stop() : IfxI2c.h

IfxI2c_waitBusFree() : IfxI2c.h

IfxI2c_writeFifo() : IfxI2c.h

IfxIom_disableModule() : IfxIom.h

IfxIom_Driver_clearAllGlitch() : IfxIom_Driver.h , IfxIom_Driver.c

IfxIom_Driver_clearHistory() : IfxIom_Driver.h , IfxIom_Driver.c

IfxIom_Driver_clearLamMonGlitch() : IfxIom_Driver.c , IfxIom_Driver.h

IfxIom_Driver_clearLamRefGlitch() : IfxIom_Driver.c , IfxIom_Driver.h

IfxIom_Driver_disableEvents() : IfxIom_Driver.h , IfxIom_Driver.c

IfxIom_Driver_disableLamEvent() : IfxIom_Driver.c , IfxIom_Driver.h

IfxIom_Driver_enableLamEvent() : IfxIom_Driver.c , IfxIom_Driver.h

IfxIom_Driver_getHistory() : IfxIom_Driver.c , IfxIom_Driver.h

IfxIom_Driver_init() : IfxIom_Driver.h , IfxIom_Driver.c

IfxIom_Driver_initConfig() : IfxIom_Driver.h , IfxIom_Driver.c

IfxIom_Driver_initLam() : IfxIom_Driver.c , IfxIom_Driver.h

IfxIom_Driver_initLamConfig() : IfxIom_Driver.c , IfxIom_Driver.h

IfxIom_Driver_isLamMonGlitch() : IfxIom_Driver.h , IfxIom_Driver.c

IfxIom_Driver_isLamRefGlitch() : IfxIom_Driver.c , IfxIom_Driver.h

IFXIOM_DRIVER_LAM_GET_MON_INPUT_INDEX : IfxIom_Driver.c

IFXIOM_DRIVER_LAM_GET_MON_INPUT_SIGNAL : IfxIom_Driver.c

IFXIOM_DRIVER_LAM_GET_REF_INPUT_INDEX : IfxIom_Driver.c

IFXIOM_DRIVER_LAM_GET_REF_INPUT_SIGNAL : IfxIom_Driver.c

IfxIom_Driver_restoreEvents() : IfxIom_Driver.h , IfxIom_Driver.c

IfxIom_EdgeClearType : IfxIom.h

IfxIom_EdgeClearType_falling : IfxIom.h

IfxIom_EdgeClearType_rising : IfxIom.h

IfxIom_EdgeClearType_risingFalling : IfxIom.h

IfxIom_enableModule() : IfxIom.h

IfxIom_EventActiveEdgeSelection : IfxIom.h

IfxIom_EventActiveEdgeSelection_eitherGateEitherClear : IfxIom.h

IfxIom_EventActiveEdgeSelection_eitherGateNegativeClear : IfxIom.h

IfxIom_EventActiveEdgeSelection_eitherGateNeitherClear : IfxIom.h

IfxIom_EventActiveEdgeSelection_eitherGatePositiveClear : IfxIom.h

IfxIom_EventActiveEdgeSelection_negativeGateEitherClear : IfxIom.h

IfxIom_EventActiveEdgeSelection_negativeGateNegativeClear : IfxIom.h

IfxIom_EventActiveEdgeSelection_negativeGateNeitherClear : IfxIom.h

IfxIom_EventActiveEdgeSelection_negativeGatePositiveClear : IfxIom.h

IfxIom_EventActiveEdgeSelection_neitherGateEitherClear : IfxIom.h

IfxIom_EventActiveEdgeSelection_neitherGateNegativeClear : IfxIom.h

IfxIom_EventActiveEdgeSelection_neitherGateNeitherClear : IfxIom.h

IfxIom_EventActiveEdgeSelection_neitherGatePositiveClear : IfxIom.h

IfxIom_EventActiveEdgeSelection_positiveGateEitherClear : IfxIom.h

IfxIom_EventActiveEdgeSelection_positiveGateNegativeClear : IfxIom.h

IfxIom_EventActiveEdgeSelection_positiveGateNeitherClear : IfxIom.h

IfxIom_EventActiveEdgeSelection_positiveGatePositiveClear : IfxIom.h

IfxIom_EventCounterChannel : IfxIom.h

IfxIom_EventCounterChannel_0 : IfxIom.h

IfxIom_EventCounterChannel_1 : IfxIom.h

IfxIom_EventCounterChannel_10 : IfxIom.h

IfxIom_EventCounterChannel_11 : IfxIom.h

IfxIom_EventCounterChannel_12 : IfxIom.h

IfxIom_EventCounterChannel_13 : IfxIom.h

IfxIom_EventCounterChannel_14 : IfxIom.h

IfxIom_EventCounterChannel_15 : IfxIom.h

IfxIom_EventCounterChannel_2 : IfxIom.h

IfxIom_EventCounterChannel_3 : IfxIom.h

IfxIom_EventCounterChannel_4 : IfxIom.h

IfxIom_EventCounterChannel_5 : IfxIom.h

IfxIom_EventCounterChannel_6 : IfxIom.h

IfxIom_EventCounterChannel_7 : IfxIom.h

IfxIom_EventCounterChannel_8 : IfxIom.h

IfxIom_EventCounterChannel_9 : IfxIom.h

IfxIom_EventCounterThreshold : IfxIom.h

IfxIom_EventCounterThreshold_1 : IfxIom.h

IfxIom_EventCounterThreshold_10 : IfxIom.h

IfxIom_EventCounterThreshold_11 : IfxIom.h

IfxIom_EventCounterThreshold_12 : IfxIom.h

IfxIom_EventCounterThreshold_13 : IfxIom.h

IfxIom_EventCounterThreshold_14 : IfxIom.h

IfxIom_EventCounterThreshold_15 : IfxIom.h

IfxIom_EventCounterThreshold_2 : IfxIom.h

IfxIom_EventCounterThreshold_3 : IfxIom.h

IfxIom_EventCounterThreshold_4 : IfxIom.h

IfxIom_EventCounterThreshold_5 : IfxIom.h

IfxIom_EventCounterThreshold_6 : IfxIom.h

IfxIom_EventCounterThreshold_7 : IfxIom.h

IfxIom_EventCounterThreshold_8 : IfxIom.h

IfxIom_EventCounterThreshold_9 : IfxIom.h

IfxIom_EventCounterThreshold_disable : IfxIom.h

IfxIom_EventSource : IfxIom.h

IfxIom_EventSource_monitor : IfxIom.h

IfxIom_EventSource_reference : IfxIom.h

IfxIom_eventTriggerHistory() : IfxIom.h

IfxIom_FilterMode : IfxIom.h

IfxIom_FilterMode_delayedDebounce : IfxIom.h

IfxIom_FilterMode_fallingEdgeDelayedRisingEdgeImmediateDebounce : IfxIom.h

IfxIom_FilterMode_fallingEdgeImmediateDebounce : IfxIom.h

IfxIom_FilterMode_FallingEdgePrescaler : IfxIom.h

IfxIom_FilterMode_immediateDebounce : IfxIom.h

IfxIom_FilterMode_risingEdgeDelayedFallingEdgeImmediateDebounce : IfxIom.h

IfxIom_FilterMode_risingEdgeImmediateDebounce : IfxIom.h

IfxIom_FilterMode_risingEdgePrescaler : IfxIom.h

IfxIom_FpcChannelId : IfxIom.h

IfxIom_FpcChannelId_0 : IfxIom.h

IfxIom_FpcChannelId_1 : IfxIom.h

IfxIom_FpcChannelId_10 : IfxIom.h

IfxIom_FpcChannelId_11 : IfxIom.h

IfxIom_FpcChannelId_12 : IfxIom.h

IfxIom_FpcChannelId_13 : IfxIom.h

IfxIom_FpcChannelId_14 : IfxIom.h

IfxIom_FpcChannelId_15 : IfxIom.h

IfxIom_FpcChannelId_2 : IfxIom.h

IfxIom_FpcChannelId_3 : IfxIom.h

IfxIom_FpcChannelId_4 : IfxIom.h

IfxIom_FpcChannelId_5 : IfxIom.h

IfxIom_FpcChannelId_6 : IfxIom.h

IfxIom_FpcChannelId_7 : IfxIom.h

IfxIom_FpcChannelId_8 : IfxIom.h

IfxIom_FpcChannelId_9 : IfxIom.h

IfxIom_getFrequency() : IfxIom.h , IfxIom.c

IfxIom_Iom_clearFpcEdges() : IfxIom_Iom.h , IfxIom_Iom.c

IfxIom_Iom_deInitModule() : IfxIom_Iom.c , IfxIom_Iom.h

IfxIom_Iom_initAnalyser() : IfxIom_Iom.h , IfxIom_Iom.c

IfxIom_Iom_initAnalyserConfig() : IfxIom_Iom.h , IfxIom_Iom.c

IfxIom_Iom_initCombiner() : IfxIom_Iom.h , IfxIom_Iom.c

IfxIom_Iom_initCombinerConfig() : IfxIom_Iom.h , IfxIom_Iom.c

IfxIom_Iom_initFpcChannel() : IfxIom_Iom.h , IfxIom_Iom.c

IfxIom_Iom_initFpcChannelConfig() : IfxIom_Iom.h , IfxIom_Iom.c

IfxIom_Iom_initModule() : IfxIom_Iom.h , IfxIom_Iom.c

IfxIom_Iom_initModuleConfig() : IfxIom_Iom.c , IfxIom_Iom.h

IfxIom_LamEventSource : IfxIom.h

IfxIom_LamEventSource_mon : IfxIom.h

IfxIom_LamEventSource_monXorRef : IfxIom.h

IfxIom_LamEventTrigger : IfxIom.h

IfxIom_LamEventTrigger_anyEdge : IfxIom.h

IfxIom_LamEventTrigger_fallingEdge : IfxIom.h

IfxIom_LamEventTrigger_none : IfxIom.h

IfxIom_LamEventTrigger_risingEdge : IfxIom.h

IfxIom_LamEventWindowClearEvent : IfxIom.h

IfxIom_LamEventWindowClearEvent_anyEdge : IfxIom.h

IfxIom_LamEventWindowClearEvent_fallingEdge : IfxIom.h

IfxIom_LamEventWindowClearEvent_none : IfxIom.h

IfxIom_LamEventWindowClearEvent_risingEdge : IfxIom.h

IfxIom_LamEventWindowControlSource : IfxIom.h

IfxIom_LamEventWindowControlSource_mon : IfxIom.h

IfxIom_LamEventWindowControlSource_ref : IfxIom.h

IfxIom_LamEventWindowRunControl : IfxIom.h

IfxIom_LamEventWindowRunControl_freeRunning : IfxIom.h

IfxIom_LamEventWindowRunControl_gated : IfxIom.h

IfxIom_LamFilterMode : IfxIom.h

IfxIom_LamFilterMode_delayDebounceBothEdge : IfxIom.h

IfxIom_LamFilterMode_delayDebounceRisingEdgeImmediateDebounceFallingEdge : IfxIom.h

IfxIom_LamFilterMode_immediateDebounceBothEdge : IfxIom.h

IfxIom_LamFilterMode_immediateDebounceFallingEdge : IfxIom.h

IfxIom_LamFilterMode_immediateDebounceRisingEdge : IfxIom.h

IfxIom_LamFilterMode_immediateDebounceRisingEdgeDelayDebounceFallingEdge : IfxIom.h

IfxIom_LamFilterMode_noFilter : IfxIom.h

IfxIom_LamFilterMode_prescalerOnFallingEdge : IfxIom.h

IfxIom_LamFilterMode_prescalerOnRisingEdge : IfxIom.h

IfxIom_LamId : IfxIom.h

IfxIom_LamId_0 : IfxIom.h

IfxIom_LamId_1 : IfxIom.h

IfxIom_LamId_10 : IfxIom.h

IfxIom_LamId_11 : IfxIom.h

IfxIom_LamId_12 : IfxIom.h

IfxIom_LamId_13 : IfxIom.h

IfxIom_LamId_14 : IfxIom.h

IfxIom_LamId_15 : IfxIom.h

IfxIom_LamId_2 : IfxIom.h

IfxIom_LamId_3 : IfxIom.h

IfxIom_LamId_4 : IfxIom.h

IfxIom_LamId_5 : IfxIom.h

IfxIom_LamId_6 : IfxIom.h

IfxIom_LamId_7 : IfxIom.h

IfxIom_LamId_8 : IfxIom.h

IfxIom_LamId_9 : IfxIom.h

IfxIom_LamMonitorInputChannel : IfxIom.h

IfxIom_LamMonitorInputChannel_0 : IfxIom.h

IfxIom_LamMonitorInputChannel_1 : IfxIom.h

IfxIom_LamMonitorInputChannel_10 : IfxIom.h

IfxIom_LamMonitorInputChannel_11 : IfxIom.h

IfxIom_LamMonitorInputChannel_12 : IfxIom.h

IfxIom_LamMonitorInputChannel_13 : IfxIom.h

IfxIom_LamMonitorInputChannel_14 : IfxIom.h

IfxIom_LamMonitorInputChannel_15 : IfxIom.h

IfxIom_LamMonitorInputChannel_2 : IfxIom.h

IfxIom_LamMonitorInputChannel_3 : IfxIom.h

IfxIom_LamMonitorInputChannel_4 : IfxIom.h

IfxIom_LamMonitorInputChannel_5 : IfxIom.h

IfxIom_LamMonitorInputChannel_6 : IfxIom.h

IfxIom_LamMonitorInputChannel_7 : IfxIom.h

IfxIom_LamMonitorInputChannel_8 : IfxIom.h

IfxIom_LamMonitorInputChannel_9 : IfxIom.h

IfxIom_LamMonitorSource : IfxIom.h

IfxIom_LamMonitorSource_directFpcMonitor : IfxIom.h

IfxIom_LamMonitorSource_exoredFpcMonitor : IfxIom.h

IfxIom_LamReferenceInputChannel : IfxIom.h

IfxIom_LamReferenceInputChannel_0 : IfxIom.h

IfxIom_LamReferenceInputChannel_1 : IfxIom.h

IfxIom_LamReferenceInputChannel_10 : IfxIom.h

IfxIom_LamReferenceInputChannel_11 : IfxIom.h

IfxIom_LamReferenceInputChannel_12 : IfxIom.h

IfxIom_LamReferenceInputChannel_13 : IfxIom.h

IfxIom_LamReferenceInputChannel_14 : IfxIom.h

IfxIom_LamReferenceInputChannel_15 : IfxIom.h

IfxIom_LamReferenceInputChannel_2 : IfxIom.h

IfxIom_LamReferenceInputChannel_3 : IfxIom.h

IfxIom_LamReferenceInputChannel_4 : IfxIom.h

IfxIom_LamReferenceInputChannel_5 : IfxIom.h

IfxIom_LamReferenceInputChannel_6 : IfxIom.h

IfxIom_LamReferenceInputChannel_7 : IfxIom.h

IfxIom_LamReferenceInputChannel_8 : IfxIom.h

IfxIom_LamReferenceInputChannel_9 : IfxIom.h

IfxIom_LamRunMode : IfxIom.h

IfxIom_LamRunMode_freeRunning : IfxIom.h

IfxIom_LamRunMode_gated : IfxIom.h

IfxIom_MonInput : IfxIom_cfg.h

IfxIom_MonInput_asclin0Atx : IfxIom_cfg.h

IfxIom_MonInput_asclin1Atx : IfxIom_cfg.h

IfxIom_MonInput_asclin2Atx : IfxIom_cfg.h

IfxIom_MonInput_asclin3Atx : IfxIom_cfg.h

IfxIom_MonInput_canNode0Txd : IfxIom_cfg.h

IfxIom_MonInput_canNode1Txd : IfxIom_cfg.h

IfxIom_MonInput_canNode2Txd : IfxIom_cfg.h

IfxIom_MonInput_canNode3Txd : IfxIom_cfg.h

IfxIom_MonInput_ccu60Cc60 : IfxIom_cfg.h

IfxIom_MonInput_ccu60Cc61 : IfxIom_cfg.h

IfxIom_MonInput_ccu60Cc62 : IfxIom_cfg.h

IfxIom_MonInput_ccu60Cout60 : IfxIom_cfg.h

IfxIom_MonInput_ccu60Cout61 : IfxIom_cfg.h

IfxIom_MonInput_ccu60Cout62 : IfxIom_cfg.h

IfxIom_MonInput_ccu60Cout63 : IfxIom_cfg.h

IfxIom_MonInput_ccu61Cc60 : IfxIom_cfg.h

IfxIom_MonInput_ccu61Cc61 : IfxIom_cfg.h

IfxIom_MonInput_ccu61Cc62 : IfxIom_cfg.h

IfxIom_MonInput_ccu61Cout60 : IfxIom_cfg.h

IfxIom_MonInput_ccu61Cout61 : IfxIom_cfg.h

IfxIom_MonInput_ccu61Cout62 : IfxIom_cfg.h

IfxIom_MonInput_ccu61Cout63 : IfxIom_cfg.h

IfxIom_MonInput_gnd : IfxIom_cfg.h

IfxIom_MonInput_gtmTout104 : IfxIom_cfg.h

IfxIom_MonInput_gtmTout105 : IfxIom_cfg.h

IfxIom_MonInput_gtmTout106 : IfxIom_cfg.h

IfxIom_MonInput_gtmTout22 : IfxIom_cfg.h

IfxIom_MonInput_gtmTout23 : IfxIom_cfg.h

IfxIom_MonInput_gtmTout24 : IfxIom_cfg.h

IfxIom_MonInput_gtmTout25 : IfxIom_cfg.h

IfxIom_MonInput_gtmTout26 : IfxIom_cfg.h

IfxIom_MonInput_gtmTout27 : IfxIom_cfg.h

IfxIom_MonInput_gtmTout28 : IfxIom_cfg.h

IfxIom_MonInput_gtmTout29 : IfxIom_cfg.h

IfxIom_MonInput_gtmTout30 : IfxIom_cfg.h

IfxIom_MonInput_gtmTout31 : IfxIom_cfg.h

IfxIom_MonInput_gtmTout32 : IfxIom_cfg.h

IfxIom_MonInput_gtmTout33 : IfxIom_cfg.h

IfxIom_MonInput_gtmTout34 : IfxIom_cfg.h

IfxIom_MonInput_gtmTout68 : IfxIom_cfg.h

IfxIom_MonInput_gtmTout69 : IfxIom_cfg.h

IfxIom_MonInput_gtmTout70 : IfxIom_cfg.h

IfxIom_MonInput_p20_12 : IfxIom_cfg.h

IfxIom_MonInput_p20_13 : IfxIom_cfg.h

IfxIom_MonInput_p20_14 : IfxIom_cfg.h

IfxIom_MonInput_p33_0 : IfxIom_cfg.h

IfxIom_MonInput_p33_1 : IfxIom_cfg.h

IfxIom_MonInput_p33_10 : IfxIom_cfg.h

IfxIom_MonInput_p33_11 : IfxIom_cfg.h

IfxIom_MonInput_p33_12 : IfxIom_cfg.h

IfxIom_MonInput_p33_2 : IfxIom_cfg.h

IfxIom_MonInput_p33_3 : IfxIom_cfg.h

IfxIom_MonInput_p33_4 : IfxIom_cfg.h

IfxIom_MonInput_p33_5 : IfxIom_cfg.h

IfxIom_MonInput_p33_6 : IfxIom_cfg.h

IfxIom_MonInput_p33_7 : IfxIom_cfg.h

IfxIom_MonInput_p33_8 : IfxIom_cfg.h

IfxIom_MonInput_p33_9 : IfxIom_cfg.h

IfxIom_MonInput_psi5Psitx0 : IfxIom_cfg.h

IfxIom_MonInput_psi5Psitx1 : IfxIom_cfg.h

IfxIom_MonInput_qspi0Mrst : IfxIom_cfg.h

IfxIom_MonInput_qspi1Mrst : IfxIom_cfg.h

IfxIom_MonInput_qspi2Mrst : IfxIom_cfg.h

IfxIom_MonInput_qspi3Mrst : IfxIom_cfg.h

IfxIom_MonInputSignal : IfxIom_cfg.h

IfxIom_MonInputSignal_0 : IfxIom_cfg.h

IfxIom_MonInputSignal_1 : IfxIom_cfg.h

IfxIom_MonInputSignal_2 : IfxIom_cfg.h

IfxIom_MonInputSignal_p : IfxIom_cfg.h

IfxIom_MonitorSignal : IfxIom.h

IfxIom_MonitorSignal_0 : IfxIom.h

IfxIom_MonitorSignal_1 : IfxIom.h

IfxIom_MonitorSignal_2 : IfxIom.h

IfxIom_MonitorSignal_portLogic : IfxIom.h

IFXIOM_NUM_CHANNELS : IfxIom_cfg.h

IfxIom_ReferenceSignal : IfxIom.h

IfxIom_ReferenceSignal_0 : IfxIom.h

IfxIom_ReferenceSignal_1 : IfxIom.h

IfxIom_ReferenceSignal_2 : IfxIom.h

IfxIom_ReferenceSignal_gtmEXORCombiner : IfxIom.h

IfxIom_ReferenceSignal_portLogic : IfxIom.h

IfxIom_RefInput : IfxIom_cfg.h

IfxIom_RefInput_asclin0Atx : IfxIom_cfg.h

IfxIom_RefInput_asclin1Atx : IfxIom_cfg.h

IfxIom_RefInput_asclin2Atx : IfxIom_cfg.h

IfxIom_RefInput_asclin3Atx : IfxIom_cfg.h

IfxIom_RefInput_canNode0Txd : IfxIom_cfg.h

IfxIom_RefInput_canNode1Txd : IfxIom_cfg.h

IfxIom_RefInput_canNode2Txd : IfxIom_cfg.h

IfxIom_RefInput_canNode3Txd : IfxIom_cfg.h

IfxIom_RefInput_ccu60Cc60 : IfxIom_cfg.h

IfxIom_RefInput_ccu60Cc61 : IfxIom_cfg.h

IfxIom_RefInput_ccu60Cc62 : IfxIom_cfg.h

IfxIom_RefInput_ccu60Cout60 : IfxIom_cfg.h

IfxIom_RefInput_ccu60Cout61 : IfxIom_cfg.h

IfxIom_RefInput_ccu60Cout62 : IfxIom_cfg.h

IfxIom_RefInput_ccu60Cout63 : IfxIom_cfg.h

IfxIom_RefInput_ccu61Cc60 : IfxIom_cfg.h

IfxIom_RefInput_ccu61Cc61 : IfxIom_cfg.h

IfxIom_RefInput_ccu61Cc62 : IfxIom_cfg.h

IfxIom_RefInput_ccu61Cout60 : IfxIom_cfg.h

IfxIom_RefInput_ccu61Cout61 : IfxIom_cfg.h

IfxIom_RefInput_ccu61Cout62 : IfxIom_cfg.h

IfxIom_RefInput_ccu61Cout63 : IfxIom_cfg.h

IfxIom_RefInput_exorCombiner : IfxIom_cfg.h

IfxIom_RefInput_gnd : IfxIom_cfg.h

IfxIom_RefInput_gtmTout0 : IfxIom_cfg.h

IfxIom_RefInput_gtmTout1 : IfxIom_cfg.h

IfxIom_RefInput_gtmTout10 : IfxIom_cfg.h

IfxIom_RefInput_gtmTout107 : IfxIom_cfg.h

IfxIom_RefInput_gtmTout108 : IfxIom_cfg.h

IfxIom_RefInput_gtmTout109 : IfxIom_cfg.h

IfxIom_RefInput_gtmTout11 : IfxIom_cfg.h

IfxIom_RefInput_gtmTout12 : IfxIom_cfg.h

IfxIom_RefInput_gtmTout13 : IfxIom_cfg.h

IfxIom_RefInput_gtmTout14 : IfxIom_cfg.h

IfxIom_RefInput_gtmTout15 : IfxIom_cfg.h

IfxIom_RefInput_gtmTout2 : IfxIom_cfg.h

IfxIom_RefInput_gtmTout3 : IfxIom_cfg.h

IfxIom_RefInput_gtmTout4 : IfxIom_cfg.h

IfxIom_RefInput_gtmTout5 : IfxIom_cfg.h

IfxIom_RefInput_gtmTout6 : IfxIom_cfg.h

IfxIom_RefInput_gtmTout7 : IfxIom_cfg.h

IfxIom_RefInput_gtmTout8 : IfxIom_cfg.h

IfxIom_RefInput_gtmTout9 : IfxIom_cfg.h

IfxIom_RefInput_p20_12 : IfxIom_cfg.h

IfxIom_RefInput_p20_13 : IfxIom_cfg.h

IfxIom_RefInput_p20_14 : IfxIom_cfg.h

IfxIom_RefInput_p33_0 : IfxIom_cfg.h

IfxIom_RefInput_p33_1 : IfxIom_cfg.h

IfxIom_RefInput_p33_10 : IfxIom_cfg.h

IfxIom_RefInput_p33_11 : IfxIom_cfg.h

IfxIom_RefInput_p33_12 : IfxIom_cfg.h

IfxIom_RefInput_p33_2 : IfxIom_cfg.h

IfxIom_RefInput_p33_3 : IfxIom_cfg.h

IfxIom_RefInput_p33_4 : IfxIom_cfg.h

IfxIom_RefInput_p33_5 : IfxIom_cfg.h

IfxIom_RefInput_p33_6 : IfxIom_cfg.h

IfxIom_RefInput_p33_7 : IfxIom_cfg.h

IfxIom_RefInput_p33_8 : IfxIom_cfg.h

IfxIom_RefInput_p33_9 : IfxIom_cfg.h

IfxIom_RefInput_psi5Psitx0 : IfxIom_cfg.h

IfxIom_RefInput_psi5Psitx2 : IfxIom_cfg.h

IfxIom_RefInput_qspi0Mrst : IfxIom_cfg.h

IfxIom_RefInput_qspi1Mrst : IfxIom_cfg.h

IfxIom_RefInput_qspi2Mrst : IfxIom_cfg.h

IfxIom_RefInput_qspi3Mrst : IfxIom_cfg.h

IfxIom_RefInputSignal : IfxIom_cfg.h

IfxIom_RefInputSignal_0 : IfxIom_cfg.h

IfxIom_RefInputSignal_1 : IfxIom_cfg.h

IfxIom_RefInputSignal_2 : IfxIom_cfg.h

IfxIom_RefInputSignal_p : IfxIom_cfg.h

IfxIom_RefInputSignal_xorCombiner : IfxIom_cfg.h

IfxIom_resetModule() : IfxIom.h , IfxIom.c

IfxIom_setSleepMode() : IfxIom.h

IfxIom_setTimerValueOfFilterAndPrescalerCell() : IfxIom.h

IfxIom_SleepMode : IfxIom.h

IfxIom_SleepMode_disable : IfxIom.h

IfxIom_SleepMode_enable : IfxIom.h

IFXLMU_NUM_MODULES : IfxLmu_cfg.h

IfxMsc0_EN0_P10_2_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc0_EN0_P10_3_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc0_EN0_P10_4_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc0_EN0_P11_11_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc0_EN0_P14_10_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc0_EN0_P15_5_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc0_EN1_P10_1_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc0_EN1_P11_2_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc0_EN1_P13_0_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc0_EN1_P14_9_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc0_EN1_P15_3_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc0_FCLN_P13_0_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc0_FCLP_P11_6_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc0_FCLP_P13_1_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc0_FCLP_P13_2_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc0_INJ0_P00_0_IN : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc0_INJ1_P10_5_IN : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc0_SDI0_P11_10_IN : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc0_SDI1_P10_2_IN : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc0_SDI2_P14_3_IN : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc0_SDI3_P11_3_IN : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc0_SON_P13_2_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc0_SOP_P11_9_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc0_SOP_P13_3_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc1_EN0_P23_4_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc1_EN0_P32_4_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc1_EN1_P23_5_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc1_FCLN_P22_0_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc1_FCLP_P22_1_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc1_INJ0_P23_3_IN : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc1_INJ1_P33_13_IN : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc1_SDI0_P23_1_IN : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc1_SDI1_P02_3_IN : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc1_SDI2_P32_4_IN : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc1_SON_P22_2_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc1_SOP_P22_3_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc2_EN0_P13_4_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc2_EN0_P14_14_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc2_EN1_P14_13_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc2_EN2_P14_11_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc2_FCLN_P13_4_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc2_FCLP_P13_5_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc2_INJ0_P13_13_IN : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc2_INJ1_P14_15_IN : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc2_SDI0_P14_12_IN : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc2_SDI1_P14_11_IN : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc2_SON_P13_6_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc2_SOP_P13_7_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc2_SOP_P14_11_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc_ActivePhaseSelection : IfxMsc.h

IfxMsc_ActivePhaseSelection_lowLevel : IfxMsc.h

IfxMsc_ActivePhaseSelection_none : IfxMsc.h

IfxMsc_AsynchronousBlock : IfxMsc.h

IfxMsc_AsynchronousBlock_bypassed : IfxMsc.h

IfxMsc_AsynchronousBlock_noBypassed : IfxMsc.h

IfxMsc_cfg_indexMap : IfxMsc_cfg.c , IfxMsc_cfg.h

IfxMsc_ChipSelectActiveState : IfxMsc.h

IfxMsc_ChipSelectActiveState_high : IfxMsc.h

IfxMsc_ChipSelectActiveState_low : IfxMsc.h

IfxMsc_clearAbraOverflowFlag() : IfxMsc.h

IfxMsc_clearAbraUnderflowFlag() : IfxMsc.h

IfxMsc_clearDataFrameInterruptFlag() : IfxMsc.c , IfxMsc.h

IfxMsc_clearRecieveDataInterruptFlag() : IfxMsc.h

IfxMsc_clearReset() : IfxMsc.h , IfxMsc.c

IfxMsc_clearUpstreamTimeout() : IfxMsc.h

IfxMsc_clearUpstreamValidFlag() : IfxMsc.h

IfxMsc_clearValidbit() : IfxMsc.h

IfxMsc_ClockSelect : IfxMsc.h

IfxMsc_ClockSelect_fper : IfxMsc.h

IfxMsc_ClockSelect_noClock : IfxMsc.h

IfxMsc_CommandDataCommandRepetitionMode : IfxMsc.h

IfxMsc_CommandDataCommandRepetitionMode_disabled : IfxMsc.h

IfxMsc_CommandDataCommandRepetitionMode_enabled : IfxMsc.h

IfxMsc_CommandFrameInterrupt : IfxMsc.h

IfxMsc_CommandFrameInterrupt_disabled : IfxMsc.h

IfxMsc_CommandFrameInterrupt_enabled : IfxMsc.h

IfxMsc_CommandFrameInterruptNode : IfxMsc.h

IfxMsc_CommandFrameInterruptNode_SR0 : IfxMsc.h

IfxMsc_CommandFrameInterruptNode_SR1 : IfxMsc.h

IfxMsc_CommandFrameInterruptNode_SR2 : IfxMsc.h

IfxMsc_CommandFrameInterruptNode_SR3 : IfxMsc.h

IfxMsc_CommandFrameLength : IfxMsc.h

IfxMsc_CommandFrameLength_0 : IfxMsc.h

IfxMsc_CommandFrameLength_1 : IfxMsc.h

IfxMsc_CommandFrameLength_10 : IfxMsc.h

IfxMsc_CommandFrameLength_11 : IfxMsc.h

IfxMsc_CommandFrameLength_12 : IfxMsc.h

IfxMsc_CommandFrameLength_13 : IfxMsc.h

IfxMsc_CommandFrameLength_14 : IfxMsc.h

IfxMsc_CommandFrameLength_15 : IfxMsc.h

IfxMsc_CommandFrameLength_16 : IfxMsc.h

IfxMsc_CommandFrameLength_17 : IfxMsc.h

IfxMsc_CommandFrameLength_18 : IfxMsc.h

IfxMsc_CommandFrameLength_19 : IfxMsc.h

IfxMsc_CommandFrameLength_2 : IfxMsc.h

IfxMsc_CommandFrameLength_20 : IfxMsc.h

IfxMsc_CommandFrameLength_21 : IfxMsc.h

IfxMsc_CommandFrameLength_22 : IfxMsc.h

IfxMsc_CommandFrameLength_23 : IfxMsc.h

IfxMsc_CommandFrameLength_24 : IfxMsc.h

IfxMsc_CommandFrameLength_25 : IfxMsc.h

IfxMsc_CommandFrameLength_26 : IfxMsc.h

IfxMsc_CommandFrameLength_27 : IfxMsc.h

IfxMsc_CommandFrameLength_28 : IfxMsc.h

IfxMsc_CommandFrameLength_29 : IfxMsc.h

IfxMsc_CommandFrameLength_3 : IfxMsc.h

IfxMsc_CommandFrameLength_30 : IfxMsc.h

IfxMsc_CommandFrameLength_31 : IfxMsc.h

IfxMsc_CommandFrameLength_32 : IfxMsc.h

IfxMsc_CommandFrameLength_4 : IfxMsc.h

IfxMsc_CommandFrameLength_5 : IfxMsc.h

IfxMsc_CommandFrameLength_6 : IfxMsc.h

IfxMsc_CommandFrameLength_7 : IfxMsc.h

IfxMsc_CommandFrameLength_8 : IfxMsc.h

IfxMsc_CommandFrameLength_9 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_0 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_1 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_10 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_100 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_101 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_102 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_103 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_104 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_105 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_106 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_107 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_108 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_109 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_11 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_110 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_111 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_112 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_113 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_114 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_115 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_116 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_117 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_118 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_119 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_12 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_120 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_121 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_122 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_123 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_124 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_125 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_126 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_127 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_13 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_14 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_15 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_16 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_17 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_18 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_19 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_2 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_20 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_21 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_22 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_23 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_24 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_25 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_26 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_27 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_28 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_29 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_3 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_30 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_31 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_32 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_33 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_34 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_35 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_36 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_37 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_38 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_39 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_4 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_40 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_41 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_42 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_43 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_44 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_45 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_46 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_47 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_48 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_49 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_5 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_50 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_51 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_52 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_53 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_54 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_55 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_56 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_57 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_58 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_59 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_6 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_60 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_61 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_62 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_63 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_64 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_65 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_66 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_67 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_68 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_69 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_7 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_70 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_71 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_72 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_73 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_74 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_75 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_76 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_77 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_78 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_79 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_8 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_80 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_81 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_82 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_83 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_84 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_85 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_86 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_87 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_88 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_89 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_9 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_90 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_91 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_92 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_93 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_94 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_95 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_96 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_97 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_98 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_99 : IfxMsc.h

IfxMsc_DataFrameExtensionPassivePhaseLength : IfxMsc.h

IfxMsc_DataFrameExtensionPassivePhaseLength_0 : IfxMsc.h

IfxMsc_DataFrameExtensionPassivePhaseLength_1 : IfxMsc.h

IfxMsc_DataFrameExtensionPassivePhaseLength_2 : IfxMsc.h

IfxMsc_DataFrameExtensionPassivePhaseLength_3 : IfxMsc.h

IfxMsc_DataFrameInterrupt : IfxMsc.h

IfxMsc_DataFrameInterrupt_atFirstDataBit : IfxMsc.h

IfxMsc_DataFrameInterrupt_atLastDataBit : IfxMsc.h

IfxMsc_DataFrameInterrupt_disabled : IfxMsc.h

IfxMsc_DataFrameInterruptNode : IfxMsc.h

IfxMsc_DataFrameInterruptNode_SR0 : IfxMsc.h

IfxMsc_DataFrameInterruptNode_SR1 : IfxMsc.h

IfxMsc_DataFrameInterruptNode_SR2 : IfxMsc.h

IfxMsc_DataFrameInterruptNode_SR3 : IfxMsc.h

IfxMsc_DataFrameLength : IfxMsc.h

IfxMsc_DataFrameLength_0 : IfxMsc.h

IfxMsc_DataFrameLength_1 : IfxMsc.h

IfxMsc_DataFrameLength_10 : IfxMsc.h

IfxMsc_DataFrameLength_11 : IfxMsc.h

IfxMsc_DataFrameLength_12 : IfxMsc.h

IfxMsc_DataFrameLength_13 : IfxMsc.h

IfxMsc_DataFrameLength_14 : IfxMsc.h

IfxMsc_DataFrameLength_15 : IfxMsc.h

IfxMsc_DataFrameLength_16 : IfxMsc.h

IfxMsc_DataFrameLength_2 : IfxMsc.h

IfxMsc_DataFrameLength_3 : IfxMsc.h

IfxMsc_DataFrameLength_4 : IfxMsc.h

IfxMsc_DataFrameLength_5 : IfxMsc.h

IfxMsc_DataFrameLength_6 : IfxMsc.h

IfxMsc_DataFrameLength_7 : IfxMsc.h

IfxMsc_DataFrameLength_8 : IfxMsc.h

IfxMsc_DataFrameLength_9 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_10 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_11 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_12 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_13 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_14 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_15 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_16 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_17 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_18 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_19 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_2 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_20 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_21 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_22 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_23 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_24 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_25 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_26 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_27 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_28 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_29 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_3 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_30 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_31 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_32 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_4 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_5 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_6 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_7 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_8 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_9 : IfxMsc.h

IfxMsc_disableModule() : IfxMsc.c , IfxMsc.h

IfxMsc_disableUpstreamTimeoutInterrupt() : IfxMsc.h

IfxMsc_DividerMode : IfxMsc.h

IfxMsc_DividerMode_fractional : IfxMsc.h

IfxMsc_DividerMode_normal : IfxMsc.h

IfxMsc_downstreamAbraBaudCalculator() : IfxMsc.h , IfxMsc.c

IfxMsc_downstreamFractionalBaudCalculator() : IfxMsc.h , IfxMsc.c

IfxMsc_downstreamNormalBaudCalculator() : IfxMsc.h , IfxMsc.c

IfxMsc_EmergencyStop : IfxMsc.h

IfxMsc_EmergencyStop_disabled : IfxMsc.h

IfxMsc_EmergencyStop_enabled : IfxMsc.h

IfxMsc_En_Out_pinTable : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc_enableModule() : IfxMsc.h , IfxMsc.c

IfxMsc_enableUpstreamTimeoutInterrupt() : IfxMsc.h

IfxMsc_Extension : IfxMsc.h

IfxMsc_Extension_disabled : IfxMsc.h

IfxMsc_Extension_enabled : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_0 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_1 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_10 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_11 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_12 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_13 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_14 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_15 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_16 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_17 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_18 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_19 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_2 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_20 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_21 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_22 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_23 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_24 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_25 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_26 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_27 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_28 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_29 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_3 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_30 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_31 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_32 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_33 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_34 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_35 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_36 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_37 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_38 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_39 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_4 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_40 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_41 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_42 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_43 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_44 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_45 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_46 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_47 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_48 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_49 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_5 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_50 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_51 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_52 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_53 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_54 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_55 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_56 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_57 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_58 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_59 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_6 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_60 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_61 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_62 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_63 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_7 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_8 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_9 : IfxMsc.h

IfxMsc_ExternalSignalInjection : IfxMsc.h

IfxMsc_ExternalSignalInjection_disabled : IfxMsc.h

IfxMsc_ExternalSignalInjection_enabled : IfxMsc.h

IfxMsc_FastMode : IfxMsc.h

IfxMsc_FastMode_disabled : IfxMsc.h

IfxMsc_FastMode_enabled : IfxMsc.h

IfxMsc_FclClockControlEnabled : IfxMsc.h

IfxMsc_FclClockControlEnabled_activePhaseOnly : IfxMsc.h

IfxMsc_FclClockControlEnabled_always : IfxMsc.h

IfxMsc_FclLinePolarity : IfxMsc.h

IfxMsc_FclLinePolarity_inverted : IfxMsc.h

IfxMsc_FclLinePolarity_nonInverted : IfxMsc.h

IfxMsc_Fcln_Out_pinTable : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc_Fclp_Out_pinTable : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc_getActiveDataFrameStatus() : IfxMsc.h , IfxMsc.c

IfxMsc_getAddress() : IfxMsc.h , IfxMsc.c

IfxMsc_getAsyncClockBypass() : IfxMsc.h

IfxMsc_getData() : IfxMsc.h

IfxMsc_getDataFrameInterruptFlag() : IfxMsc.c , IfxMsc.h

IfxMsc_getDataHighTarget() : IfxMsc.h

IfxMsc_getDataLowTarget() : IfxMsc.h

IfxMsc_getDownstreamAbraBaudrate() : IfxMsc.h , IfxMsc.c

IfxMsc_getDownstreamAbraDisabledBaudrate() : IfxMsc.h , IfxMsc.c

IfxMsc_getDownstreamBaudrate() : IfxMsc.h , IfxMsc.c

IfxMsc_getDownStreamExtension() : IfxMsc.h

IfxMsc_getIndex() : IfxMsc.c , IfxMsc.h

IfxMsc_getRecieveDataInterruptFlag() : IfxMsc.h

IfxMsc_getSrcPointer() : IfxMsc.h

IfxMsc_getUpstreamData() : IfxMsc.h

IfxMsc_getUpstreamParityErrorFlag() : IfxMsc.h

IfxMsc_getUpstreamTimeoutFlag() : IfxMsc.h

IfxMsc_getUpstreamValidFlag() : IfxMsc.h

IfxMsc_HardwareClock : IfxMsc.h

IfxMsc_HardwareClock_disabled : IfxMsc.h

IfxMsc_HardwareClock_enabled : IfxMsc.h

IfxMsc_hasAbraOverflowErrorOccured() : IfxMsc.h

IfxMsc_hasAbraUnderflowErrorOccured() : IfxMsc.h

IfxMsc_Index : IfxMsc_cfg.h

IfxMsc_Index_0 : IfxMsc_cfg.h

IfxMsc_Index_1 : IfxMsc_cfg.h

IfxMsc_Index_2 : IfxMsc_cfg.h

IfxMsc_Index_none : IfxMsc_cfg.h

IfxMsc_initEnPin() : IfxMsc.h

IfxMsc_initFclnPin() : IfxMsc.h

IfxMsc_initFclpPin() : IfxMsc.h

IfxMsc_initInjPin() : IfxMsc.h

IfxMsc_initSdiPin() : IfxMsc.h

IfxMsc_initSonPin() : IfxMsc.h

IfxMsc_initSopPin() : IfxMsc.h

IfxMsc_Inj_In_pinTable : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc_InterruptServiceRequest : IfxMsc.h

IfxMsc_InterruptServiceRequest_0 : IfxMsc.h

IfxMsc_InterruptServiceRequest_1 : IfxMsc.h

IfxMsc_InterruptServiceRequest_2 : IfxMsc.h

IfxMsc_InterruptServiceRequest_3 : IfxMsc.h

IfxMsc_InterruptServiceRequest_4 : IfxMsc.h

IfxMsc_isModuleSuspended() : IfxMsc.h

IfxMsc_manualLoadCxModeCommand() : IfxMsc.c , IfxMsc.h

IfxMsc_ModuleSuspendRequestBit : IfxMsc.h

IfxMsc_ModuleSuspendRequestBit_hardSuspend : IfxMsc.h

IfxMsc_ModuleSuspendRequestBit_noSuspend : IfxMsc.h

IfxMsc_ModuleSuspendRequestBit_softSuspend : IfxMsc.h

IfxMsc_MsbBitDataExtension : IfxMsc.h

IfxMsc_MsbBitDataExtension_notPresent : IfxMsc.h

IfxMsc_MsbBitDataExtension_present : IfxMsc.h

IfxMsc_Msc_clearDataFrameInterrupt() : IfxMsc_Msc.h

IfxMsc_Msc_deInitModule() : IfxMsc_Msc.c , IfxMsc_Msc.h

IfxMsc_Msc_getActiveDataFrameStatus() : IfxMsc_Msc.h

IfxMsc_Msc_getDataFrameInterruptStatus() : IfxMsc_Msc.h

IfxMsc_Msc_getTarget() : IfxMsc_Msc.c , IfxMsc_Msc.h

IfxMsc_Msc_initializeAbra() : IfxMsc_Msc.c , IfxMsc_Msc.h

IfxMsc_Msc_initializeCommandExtension() : IfxMsc_Msc.c , IfxMsc_Msc.h

IfxMsc_Msc_initializeDataExtension() : IfxMsc_Msc.c , IfxMsc_Msc.h

IfxMsc_Msc_initModule() : IfxMsc_Msc.c , IfxMsc_Msc.h

IfxMsc_Msc_initModuleConfig() : IfxMsc_Msc.c , IfxMsc_Msc.h

IfxMsc_Msc_receiveData() : IfxMsc_Msc.c , IfxMsc_Msc.h

IfxMsc_Msc_sendCommand() : IfxMsc_Msc.c , IfxMsc_Msc.h

IfxMsc_Msc_sendData() : IfxMsc_Msc.c , IfxMsc_Msc.h

IfxMsc_Msc_sendDataExtension() : IfxMsc_Msc.c , IfxMsc_Msc.h

IfxMsc_Msc_sendDataHigh() : IfxMsc_Msc.c , IfxMsc_Msc.h

IfxMsc_Msc_sendDataLow() : IfxMsc_Msc.c , IfxMsc_Msc.h

IfxMsc_Msc_setCommandTarget() : IfxMsc_Msc.c , IfxMsc_Msc.h

IfxMsc_Msc_setDataTarget() : IfxMsc_Msc.c , IfxMsc_Msc.h

IfxMsc_Msc_Target : IfxMsc_Msc.h

IfxMsc_Msc_Target_high : IfxMsc_Msc.h

IfxMsc_Msc_Target_low : IfxMsc_Msc.h

IfxMsc_NDividerAbra : IfxMsc.h

IfxMsc_NDividerAbra_1 : IfxMsc.h

IfxMsc_NDividerAbra_2 : IfxMsc.h

IfxMsc_NDividerAbra_3 : IfxMsc.h

IfxMsc_NDividerAbra_4 : IfxMsc.h

IfxMsc_NDividerAbra_5 : IfxMsc.h

IfxMsc_NDividerAbra_6 : IfxMsc.h

IfxMsc_NDividerAbra_7 : IfxMsc.h

IfxMsc_NDividerAbra_8 : IfxMsc.h

IfxMsc_NDividerDownstream : IfxMsc.h

IfxMsc_NDividerDownstream_1 : IfxMsc.h

IfxMsc_NDividerDownstream_10 : IfxMsc.h

IfxMsc_NDividerDownstream_11 : IfxMsc.h

IfxMsc_NDividerDownstream_12 : IfxMsc.h

IfxMsc_NDividerDownstream_13 : IfxMsc.h

IfxMsc_NDividerDownstream_14 : IfxMsc.h

IfxMsc_NDividerDownstream_15 : IfxMsc.h

IfxMsc_NDividerDownstream_16 : IfxMsc.h

IfxMsc_NDividerDownstream_2 : IfxMsc.h

IfxMsc_NDividerDownstream_3 : IfxMsc.h

IfxMsc_NDividerDownstream_4 : IfxMsc.h

IfxMsc_NDividerDownstream_5 : IfxMsc.h

IfxMsc_NDividerDownstream_6 : IfxMsc.h

IfxMsc_NDividerDownstream_7 : IfxMsc.h

IfxMsc_NDividerDownstream_8 : IfxMsc.h

IfxMsc_NDividerDownstream_9 : IfxMsc.h

IFXMSC_NUM_ENABLE_SELECT_LINES : IfxMsc_cfg.h

IFXMSC_NUM_MODULES : IfxMsc_cfg.h

IfxMsc_OverflowInterrupt : IfxMsc.h

IfxMsc_OverflowInterrupt_disabled : IfxMsc.h

IfxMsc_OverflowInterrupt_enabled : IfxMsc.h

IfxMsc_OverflowInterruptNode : IfxMsc.h

IfxMsc_OverflowInterruptNode_SR0 : IfxMsc.h

IfxMsc_OverflowInterruptNode_SR1 : IfxMsc.h

IfxMsc_OverflowInterruptNode_SR2 : IfxMsc.h

IfxMsc_OverflowInterruptNode_SR3 : IfxMsc.h

IfxMsc_OverflowInterruptNode_SR4 : IfxMsc.h

IfxMsc_Parity : IfxMsc.h

IfxMsc_Parity_even : IfxMsc.h

IfxMsc_Parity_odd : IfxMsc.h

IfxMsc_PassiveTimeFrameCount : IfxMsc.h

IfxMsc_PassiveTimeFrameCount_0 : IfxMsc.h

IfxMsc_PassiveTimeFrameCount_1 : IfxMsc.h

IfxMsc_PassiveTimeFrameCount_10 : IfxMsc.h

IfxMsc_PassiveTimeFrameCount_11 : IfxMsc.h

IfxMsc_PassiveTimeFrameCount_12 : IfxMsc.h

IfxMsc_PassiveTimeFrameCount_13 : IfxMsc.h

IfxMsc_PassiveTimeFrameCount_14 : IfxMsc.h

IfxMsc_PassiveTimeFrameCount_15 : IfxMsc.h

IfxMsc_PassiveTimeFrameCount_2 : IfxMsc.h

IfxMsc_PassiveTimeFrameCount_3 : IfxMsc.h

IfxMsc_PassiveTimeFrameCount_4 : IfxMsc.h

IfxMsc_PassiveTimeFrameCount_5 : IfxMsc.h

IfxMsc_PassiveTimeFrameCount_6 : IfxMsc.h

IfxMsc_PassiveTimeFrameCount_7 : IfxMsc.h

IfxMsc_PassiveTimeFrameCount_8 : IfxMsc.h

IfxMsc_PassiveTimeFrameCount_9 : IfxMsc.h

IFXMSC_PINMAP_EN_OUT_NUM_ITEMS : IfxMsc_PinMap.h

IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS : IfxMsc_PinMap.h

IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS : IfxMsc_PinMap.h

IFXMSC_PINMAP_INJ_IN_NUM_ITEMS : IfxMsc_PinMap.h

IFXMSC_PINMAP_NUM_MODULES : IfxMsc_PinMap.h

IFXMSC_PINMAP_NUM_TARGETS : IfxMsc_PinMap.h

IFXMSC_PINMAP_SDI_IN_NUM_ITEMS : IfxMsc_PinMap.h

IFXMSC_PINMAP_SON_OUT_NUM_ITEMS : IfxMsc_PinMap.h

IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS : IfxMsc_PinMap.h

IfxMsc_ReceiveDataInterrupt : IfxMsc.h

IfxMsc_ReceiveDataInterrupt_disabled : IfxMsc.h

IfxMsc_ReceiveDataInterrupt_onDataReceive : IfxMsc.h

IfxMsc_ReceiveDataInterrupt_onDataReceiveInUd3 : IfxMsc.h

IfxMsc_ReceiveDataInterrupt_onRdieSet : IfxMsc.h

IfxMsc_ReceiveDataInterruptNode : IfxMsc.h

IfxMsc_ReceiveDataInterruptNode_SR0 : IfxMsc.h

IfxMsc_ReceiveDataInterruptNode_SR1 : IfxMsc.h

IfxMsc_ReceiveDataInterruptNode_SR2 : IfxMsc.h

IfxMsc_ReceiveDataInterruptNode_SR3 : IfxMsc.h

IfxMsc_resetModule() : IfxMsc.h , IfxMsc.c

IfxMsc_Sdi_In_pinTable : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc_SdiLinePolarity : IfxMsc.h

IfxMsc_SdiLinePolarity_invertedSi : IfxMsc.h

IfxMsc_SdiLinePolarity_likeSi : IfxMsc.h

IfxMsc_SerialDataInput : IfxMsc.h

IfxMsc_SerialDataInput_0 : IfxMsc.h

IfxMsc_SerialDataInput_1 : IfxMsc.h

IfxMsc_SerialDataInput_2 : IfxMsc.h

IfxMsc_SerialDataInput_3 : IfxMsc.h

IfxMsc_SerialDataInput_4 : IfxMsc.h

IfxMsc_SerialDataInput_5 : IfxMsc.h

IfxMsc_SerialDataInput_6 : IfxMsc.h

IfxMsc_SerialDataInput_7 : IfxMsc.h

IfxMsc_ServiceRequestDelay : IfxMsc.h

IfxMsc_ServiceRequestDelay_1bit : IfxMsc.h

IfxMsc_ServiceRequestDelay_noDelay : IfxMsc.h

IfxMsc_setAbraOverflowFlag() : IfxMsc.h

IfxMsc_setAbraUnderflowFlag() : IfxMsc.h

IfxMsc_setAsyncClockBypass() : IfxMsc.h

IfxMsc_setCommandTarget() : IfxMsc.h

IfxMsc_setDataHighTarget() : IfxMsc.h

IfxMsc_setDataLowTarget() : IfxMsc.h

IfxMsc_setDownStreamData() : IfxMsc.h

IfxMsc_setDownStreamExtension() : IfxMsc.h

IfxMsc_setDownStreamExtensionData() : IfxMsc.h

IfxMsc_setFastMode() : IfxMsc.h

IfxMsc_setFractionalDividerStep() : IfxMsc.h

IfxMsc_setNdividerDownstream() : IfxMsc.h

IfxMsc_setResetCommandExtensionMode() : IfxMsc.h

IfxMsc_setSerialDataInputSelect() : IfxMsc.h

IfxMsc_setSleepMode() : IfxMsc.h

IfxMsc_setSuspendMode() : IfxMsc.h

IfxMsc_setTransmissionMode() : IfxMsc.h

IfxMsc_setUpstreamChannelRecieveRate() : IfxMsc.h

IfxMsc_setUpstreamTimeout() : IfxMsc.h

IfxMsc_setUpstreamTimeoutPrescalar() : IfxMsc.h

IfxMsc_ShiftClockPhaseDuration : IfxMsc.h

IfxMsc_ShiftClockPhaseDuration_1 : IfxMsc.h

IfxMsc_ShiftClockPhaseDuration_10 : IfxMsc.h

IfxMsc_ShiftClockPhaseDuration_11 : IfxMsc.h

IfxMsc_ShiftClockPhaseDuration_12 : IfxMsc.h

IfxMsc_ShiftClockPhaseDuration_13 : IfxMsc.h

IfxMsc_ShiftClockPhaseDuration_14 : IfxMsc.h

IfxMsc_ShiftClockPhaseDuration_15 : IfxMsc.h

IfxMsc_ShiftClockPhaseDuration_16 : IfxMsc.h

IfxMsc_ShiftClockPhaseDuration_2 : IfxMsc.h

IfxMsc_ShiftClockPhaseDuration_3 : IfxMsc.h

IfxMsc_ShiftClockPhaseDuration_4 : IfxMsc.h

IfxMsc_ShiftClockPhaseDuration_5 : IfxMsc.h

IfxMsc_ShiftClockPhaseDuration_6 : IfxMsc.h

IfxMsc_ShiftClockPhaseDuration_7 : IfxMsc.h

IfxMsc_ShiftClockPhaseDuration_8 : IfxMsc.h

IfxMsc_ShiftClockPhaseDuration_9 : IfxMsc.h

IfxMsc_SleepMode : IfxMsc.h

IfxMsc_SleepMode_disable : IfxMsc.h

IfxMsc_SleepMode_enable : IfxMsc.h

IfxMsc_SoLinePolarity : IfxMsc.h

IfxMsc_SoLinePolarity_inverted : IfxMsc.h

IfxMsc_SoLinePolarity_nonInverted : IfxMsc.h

IfxMsc_Son_Out_pinTable : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc_Sop_Out_pinTable : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc_Source : IfxMsc.h

IfxMsc_Source_alternateInputLine : IfxMsc.h

IfxMsc_Source_alternateInputLineInverted : IfxMsc.h

IfxMsc_Source_downstreamDataRegister : IfxMsc.h

IfxMsc_SuspendMode : IfxMsc.h

IfxMsc_SuspendMode_hard : IfxMsc.h

IfxMsc_SuspendMode_none : IfxMsc.h

IfxMsc_SuspendMode_soft : IfxMsc.h

IfxMsc_Target : IfxMsc.h

IfxMsc_Target_en0 : IfxMsc.h

IfxMsc_Target_en1 : IfxMsc.h

IfxMsc_Target_en2 : IfxMsc.h

IfxMsc_Target_en3 : IfxMsc.h

IfxMsc_TimeFrameInterrupt : IfxMsc.h

IfxMsc_TimeFrameInterrupt_disabled : IfxMsc.h

IfxMsc_TimeFrameInterrupt_enabled : IfxMsc.h

IfxMsc_TimeFrameInterruptNode : IfxMsc.h

IfxMsc_TimeFrameInterruptNode_SR0 : IfxMsc.h

IfxMsc_TimeFrameInterruptNode_SR1 : IfxMsc.h

IfxMsc_TimeFrameInterruptNode_SR2 : IfxMsc.h

IfxMsc_TimeFrameInterruptNode_SR3 : IfxMsc.h

IfxMsc_TransmissionMode : IfxMsc.h

IfxMsc_TransmissionMode_dataRepetition : IfxMsc.h

IfxMsc_TransmissionMode_triggered : IfxMsc.h

IfxMsc_UnderflowInterrupt : IfxMsc.h

IfxMsc_UnderflowInterrupt_disabled : IfxMsc.h

IfxMsc_UnderflowInterrupt_enabled : IfxMsc.h

IfxMsc_UnderflowInterruptNode : IfxMsc.h

IfxMsc_UnderflowInterruptNode_SR0 : IfxMsc.h

IfxMsc_UnderflowInterruptNode_SR1 : IfxMsc.h

IfxMsc_UnderflowInterruptNode_SR2 : IfxMsc.h

IfxMsc_UnderflowInterruptNode_SR3 : IfxMsc.h

IfxMsc_UnderflowInterruptNode_SR4 : IfxMsc.h

IfxMsc_UpstreamChannelFrameType : IfxMsc.h

IfxMsc_UpstreamChannelFrameType_12bit : IfxMsc.h

IfxMsc_UpstreamChannelFrameType_16bit : IfxMsc.h

IfxMsc_UpstreamChannelReceivingRate : IfxMsc.h

IfxMsc_UpstreamChannelReceivingRate_128 : IfxMsc.h

IfxMsc_UpstreamChannelReceivingRate_16 : IfxMsc.h

IfxMsc_UpstreamChannelReceivingRate_256 : IfxMsc.h

IfxMsc_UpstreamChannelReceivingRate_32 : IfxMsc.h

IfxMsc_UpstreamChannelReceivingRate_4 : IfxMsc.h

IfxMsc_UpstreamChannelReceivingRate_64 : IfxMsc.h

IfxMsc_UpstreamChannelReceivingRate_8 : IfxMsc.h

IfxMsc_UpstreamChannelReceivingRate_disabled : IfxMsc.h

IfxMsc_upstreamFractionalBaudCalculator() : IfxMsc.c , IfxMsc.h

IfxMsc_upstreamNormalBaudCalculator() : IfxMsc.c , IfxMsc.h

IfxMsc_UpstreamTimeoutInterrupt : IfxMsc.h

IfxMsc_UpstreamTimeoutInterrupt_disabled : IfxMsc.h

IfxMsc_UpstreamTimeoutInterrupt_enabled : IfxMsc.h

IfxMsc_UpstreamTimeoutInterruptNode : IfxMsc.h

IfxMsc_UpstreamTimeoutInterruptNode_SR0 : IfxMsc.h

IfxMsc_UpstreamTimeoutInterruptNode_SR1 : IfxMsc.h

IfxMsc_UpstreamTimeoutInterruptNode_SR2 : IfxMsc.h

IfxMsc_UpstreamTimeoutInterruptNode_SR3 : IfxMsc.h

IfxMsc_UpstreamTimeoutInterruptNode_SR4 : IfxMsc.h

IfxMsc_UpstreamTimeoutPrescaler : IfxMsc.h

IfxMsc_UpstreamTimeoutPrescaler_1 : IfxMsc.h

IfxMsc_UpstreamTimeoutPrescaler_1024 : IfxMsc.h

IfxMsc_UpstreamTimeoutPrescaler_128 : IfxMsc.h

IfxMsc_UpstreamTimeoutPrescaler_16 : IfxMsc.h

IfxMsc_UpstreamTimeoutPrescaler_16384 : IfxMsc.h

IfxMsc_UpstreamTimeoutPrescaler_2 : IfxMsc.h

IfxMsc_UpstreamTimeoutPrescaler_2048 : IfxMsc.h

IfxMsc_UpstreamTimeoutPrescaler_256 : IfxMsc.h

IfxMsc_UpstreamTimeoutPrescaler_32 : IfxMsc.h

IfxMsc_UpstreamTimeoutPrescaler_32768 : IfxMsc.h

IfxMsc_UpstreamTimeoutPrescaler_4 : IfxMsc.h

IfxMsc_UpstreamTimeoutPrescaler_4096 : IfxMsc.h

IfxMsc_UpstreamTimeoutPrescaler_512 : IfxMsc.h

IfxMsc_UpstreamTimeoutPrescaler_64 : IfxMsc.h

IfxMsc_UpstreamTimeoutPrescaler_8 : IfxMsc.h

IfxMsc_UpstreamTimeoutPrescaler_8192 : IfxMsc.h

IfxMsc_UpstreamTimeoutValue : IfxMsc.h

IfxMsc_UpstreamTimeoutValue_1 : IfxMsc.h

IfxMsc_UpstreamTimeoutValue_10 : IfxMsc.h

IfxMsc_UpstreamTimeoutValue_11 : IfxMsc.h

IfxMsc_UpstreamTimeoutValue_12 : IfxMsc.h

IfxMsc_UpstreamTimeoutValue_13 : IfxMsc.h

IfxMsc_UpstreamTimeoutValue_14 : IfxMsc.h

IfxMsc_UpstreamTimeoutValue_15 : IfxMsc.h

IfxMsc_UpstreamTimeoutValue_16 : IfxMsc.h

IfxMsc_UpstreamTimeoutValue_2 : IfxMsc.h

IfxMsc_UpstreamTimeoutValue_3 : IfxMsc.h

IfxMsc_UpstreamTimeoutValue_4 : IfxMsc.h

IfxMsc_UpstreamTimeoutValue_5 : IfxMsc.h

IfxMsc_UpstreamTimeoutValue_6 : IfxMsc.h

IfxMsc_UpstreamTimeoutValue_7 : IfxMsc.h

IfxMsc_UpstreamTimeoutValue_8 : IfxMsc.h

IfxMsc_UpstreamTimeoutValue_9 : IfxMsc.h

IfxMtu_checkErrorFlags() : IfxMtu.h

IFXMTU_CLEAR_GLOBAL_SAFETY_ENDINIT : IfxMtu.c

IFXMTU_CLEAR_SRAM_MCONTROL_CONFIG : IfxMtu.c

IfxMtu_clearErrorTracking() : IfxMtu.c , IfxMtu.h

IfxMtu_clearSram() : IfxMtu.c , IfxMtu.h

IfxMtu_clearSramContinue() : IfxMtu.c , IfxMtu.h

IfxMtu_clearSramStart() : IfxMtu.c , IfxMtu.h

IfxMtu_disableErrorReporting() : IfxMtu.h

IfxMtu_disableMbistShell() : IfxMtu.h

IfxMtu_enableErrorReporting() : IfxMtu.h

IfxMtu_enableErrorTracking() : IfxMtu.c , IfxMtu.h

IfxMtu_enableMbistShell() : IfxMtu.h

IfxMtu_enableModule() : IfxMtu.h

IFXMTU_ERROR_FLAGS_MASK : IfxMtu.h

IfxMtu_getMemDoneRegisterIndex() : IfxMtu.h

IfxMtu_getSystemAddress() : IfxMtu.h , IfxMtu.c

IfxMtu_getTrackedSramAddresses() : IfxMtu.h , IfxMtu.c

IfxMtu_isAutoInitRunning() : IfxMtu.h

IfxMtu_isErrorTrackingEnabled() : IfxMtu.h

IfxMtu_isErrorTrackingOverflow() : IfxMtu.h

IfxMtu_isMbistDone() : IfxMtu.h

IfxMtu_isModuleEnabled() : IfxMtu.h

IfxMtu_isTestPass() : IfxMtu.c , IfxMtu.h

IFXMTU_LOOP_TIMEOUT_CHECK : IfxMtu.h

IFXMTU_MAX_TRACKED_ADDRESSES : IfxMtu_cfg.h

IFXMTU_MBIST_CONFIG_NONDISTTEST_CONFIG0 : IfxMtu.h

IFXMTU_MBIST_CONFIG_NONDISTTEST_CONFIG1 : IfxMtu.h

IFXMTU_MBIST_CONFIG_NONDISTTEST_MCONTROL : IfxMtu.h

IfxMtu_MbistSel : IfxMtu_cfg.h

IfxMtu_MbistSel_cpu0Dlmu : IfxMtu_cfg.h

IfxMtu_MbistSel_cpu0Dspr : IfxMtu_cfg.h

IfxMtu_MbistSel_cpu0Dspr1 : IfxMtu_cfg.h

IfxMtu_MbistSel_cpu0Dtag : IfxMtu_cfg.h

IfxMtu_MbistSel_cpu0Pspr : IfxMtu_cfg.h

IfxMtu_MbistSel_cpu0Ptag : IfxMtu_cfg.h

IfxMtu_MbistSel_cpu1Dlmu : IfxMtu_cfg.h

IfxMtu_MbistSel_cpu1Dspr : IfxMtu_cfg.h

IfxMtu_MbistSel_cpu1Dspr1 : IfxMtu_cfg.h

IfxMtu_MbistSel_cpu1Dtag : IfxMtu_cfg.h

IfxMtu_MbistSel_cpu1Pspr : IfxMtu_cfg.h

IfxMtu_MbistSel_cpu1Ptag : IfxMtu_cfg.h

IfxMtu_MbistSel_cpu2Dlmu : IfxMtu_cfg.h

IfxMtu_MbistSel_cpu2Dspr : IfxMtu_cfg.h

IfxMtu_MbistSel_cpu2Dtag : IfxMtu_cfg.h

IfxMtu_MbistSel_cpu2Pspr : IfxMtu_cfg.h

IfxMtu_MbistSel_cpu2Ptag : IfxMtu_cfg.h

IfxMtu_MbistSel_cpu3Dlmu : IfxMtu_cfg.h

IfxMtu_MbistSel_cpu3Dspr : IfxMtu_cfg.h

IfxMtu_MbistSel_cpu3Dtag : IfxMtu_cfg.h

IfxMtu_MbistSel_cpu3Pspr : IfxMtu_cfg.h

IfxMtu_MbistSel_cpu3Ptag : IfxMtu_cfg.h

IfxMtu_MbistSel_dam0 : IfxMtu_cfg.h

IfxMtu_MbistSel_dma : IfxMtu_cfg.h

IfxMtu_MbistSel_eray0IbfTbf : IfxMtu_cfg.h

IfxMtu_MbistSel_eray0Mbf : IfxMtu_cfg.h

IfxMtu_MbistSel_eray0Obf : IfxMtu_cfg.h

IfxMtu_MbistSel_eray1IbfTbf : IfxMtu_cfg.h

IfxMtu_MbistSel_eray1Mbf : IfxMtu_cfg.h

IfxMtu_MbistSel_eray1Obf : IfxMtu_cfg.h

IfxMtu_MbistSel_ethermacRx : IfxMtu_cfg.h

IfxMtu_MbistSel_ethermacTx : IfxMtu_cfg.h

IfxMtu_MbistSel_gtmDpll1a : IfxMtu_cfg.h

IfxMtu_MbistSel_gtmDpll1b : IfxMtu_cfg.h

IfxMtu_MbistSel_gtmDpll2 : IfxMtu_cfg.h

IfxMtu_MbistSel_gtmFifo : IfxMtu_cfg.h

IfxMtu_MbistSel_gtmMcs0Fast : IfxMtu_cfg.h

IfxMtu_MbistSel_gtmMcs0Slow : IfxMtu_cfg.h

IfxMtu_MbistSel_gtmMcs1Fast : IfxMtu_cfg.h

IfxMtu_MbistSel_gtmMcs1Slow : IfxMtu_cfg.h

IfxMtu_MbistSel_lmu0 : IfxMtu_cfg.h

IfxMtu_MbistSel_mcan0 : IfxMtu_cfg.h

IfxMtu_MbistSel_mcan1 : IfxMtu_cfg.h

IfxMtu_MbistSel_mcan2 : IfxMtu_cfg.h

IfxMtu_MbistSel_miniMcds : IfxMtu_cfg.h

IfxMtu_MbistSel_none : IfxMtu_cfg.h

IfxMtu_MbistSel_psi5 : IfxMtu_cfg.h

IfxMtu_MbistSel_scrIram : IfxMtu_cfg.h

IfxMtu_MbistSel_scrXram : IfxMtu_cfg.h

IFXMTU_MC_ADDRESS_BASE : IfxMtu_cfg.h

IFXMTU_NUM_MBIST_TABLE_ITEMS : IfxMtu_cfg.h

IfxMtu_readSramAddress() : IfxMtu.h , IfxMtu.c

IfxMtu_runCheckerBoardTest() : IfxMtu.h , IfxMtu.c

IfxMtu_runMarchUTest() : IfxMtu.h , IfxMtu.c

IfxMtu_runMbist() : IfxMtu.c , IfxMtu.h

IfxMtu_runMbistAll() : IfxMtu.h , IfxMtu.c

IfxMtu_runMbistClearRam() : IfxMtu.c

IfxMtu_runMbistConfigMtest() : IfxMtu.c

IfxMtu_runMbistConfigPatterns() : IfxMtu.c

IfxMtu_runMbistConfigRange() : IfxMtu.c

IfxMtu_runMbistEnd() : IfxMtu.c

IfxMtu_runNonDestructiveInversionTest() : IfxMtu.c , IfxMtu.h

IFXMTU_SCRAMBLED_RANGE_ADDR_DLMU0 : IfxMtu_cfg.h

IFXMTU_SCRAMBLED_RANGE_ADDR_DLMU1 : IfxMtu_cfg.h

IFXMTU_SCRAMBLED_RANGE_ADDR_DLMU2 : IfxMtu_cfg.h

IFXMTU_SCRAMBLED_RANGE_ADDR_DLMU3 : IfxMtu_cfg.h

IFXMTU_SCRAMBLED_RANGE_ADDR_DSPR0 : IfxMtu_cfg.h

IFXMTU_SCRAMBLED_RANGE_ADDR_DSPR1 : IfxMtu_cfg.h

IFXMTU_SCRAMBLED_RANGE_ADDR_DSPR2 : IfxMtu_cfg.h

IFXMTU_SCRAMBLED_RANGE_ADDR_DSPR3 : IfxMtu_cfg.h

IFXMTU_SCRAMBLED_RANGE_ADDR_PSPR0 : IfxMtu_cfg.h

IFXMTU_SCRAMBLED_RANGE_ADDR_PSPR1 : IfxMtu_cfg.h

IFXMTU_SCRAMBLED_RANGE_ADDR_PSPR2 : IfxMtu_cfg.h

IFXMTU_SCRAMBLED_RANGE_ADDR_PSPR3 : IfxMtu_cfg.h

IFXMTU_SET_GLOBAL_SAFETY_ENDINIT : IfxMtu.c

IfxMtu_sramTable : IfxMtu_cfg.h , IfxMtu_cfg.c

IFXMTU_WAIT_TIMEOUTCOUNT : IfxMtu.h

IfxMtu_writeSramAddress() : IfxMtu.c , IfxMtu.h

IfxPms_Dcdcsync_Out_pinTable : IfxPms_PinMap.c , IfxPms_PinMap.h

IfxPms_DCDCSYNC_P32_2_OUT : IfxPms_PinMap.c , IfxPms_PinMap.h

IfxPms_DCDCSYNC_P32_4_OUT : IfxPms_PinMap.c , IfxPms_PinMap.h

IFXPMS_DISABLE_ALL_MODULES_STANDBY : IfxPms_cfg.h

IFXPMS_DISABLE_MODULES_DURING_SLEEP : IfxPms_cfg.h

IfxPms_HWCFG1IN_P14_5_IN : IfxPms_PinMap.c , IfxPms_PinMap.h

IfxPms_HWCFG2IN_P14_2_IN : IfxPms_PinMap.c , IfxPms_PinMap.h

IfxPms_HWCFG3IN_P14_3_IN : IfxPms_PinMap.c , IfxPms_PinMap.h

IfxPms_HWCFG4IN_P10_5_IN : IfxPms_PinMap.c , IfxPms_PinMap.h

IfxPms_HWCFG5IN_P10_6_IN : IfxPms_PinMap.c , IfxPms_PinMap.h

IfxPms_HWCFG6IN_P14_4_IN : IfxPms_PinMap.c , IfxPms_PinMap.h

IfxPms_Hwcfg_In_pinTable : IfxPms_PinMap.c , IfxPms_PinMap.h

IFXPMS_NUM_MODULES : IfxPms_cfg.h

IfxPms_PINAWKP_P14_1_IN : IfxPms_PinMap.h , IfxPms_PinMap.c

IfxPms_PINBWKP_P33_12_IN : IfxPms_PinMap.h , IfxPms_PinMap.c

IFXPMS_PINMAP_DCDCSYNC_OUT_NUM_ITEMS : IfxPms_PinMap.h

IFXPMS_PINMAP_HWCFG_IN_NUM_ITEMS : IfxPms_PinMap.h

IFXPMS_PINMAP_NUM_MODULES : IfxPms_PinMap.h

IFXPMS_PINMAP_WKP_IN_NUM_ITEMS : IfxPms_PinMap.h

IFXPMS_RESTART_EXECUTION : IfxPms_cfg.h

IFXPMS_STANDBY_CPU0_DLMU_RAR_AREA : IfxPms_cfg.h

IFXPMS_STANDBY_CPU1_DLMU_RAR_AREA : IfxPms_cfg.h

IFXPMS_STANDBY_DLMU_RAR_SIZE : IfxPms_cfg.h

IFXPMS_WAIT_CYCLES : IfxPms_cfg.h

IFXPMS_WAKEUP_MODULES : IfxPms_cfg.h

IfxPms_Wkp_In_pinTable : IfxPms_PinMap.h , IfxPms_PinMap.c

IFXPMSEVR_ADC_VDD_LSB : IfxPmsEvr.h

IFXPMSEVR_ADC_VDDP3_LSB : IfxPmsEvr.h

IFXPMSEVR_ADC_VEXT_LSB : IfxPmsEvr.h

IfxPmsEvr_areInitValuesRight() : IfxPmsEvr.h

IfxPmsEvr_cfgPhase1Default : IfxPmsEvr.h , IfxPmsEvr.c

IfxPmsEvr_cfgPhase2Default : IfxPmsEvr.h , IfxPmsEvr.c

IfxPmsEvr_cfgPhase3Default : IfxPmsEvr.h , IfxPmsEvr.c

IfxPmsEvr_cfgPhasesDefault : IfxPmsEvr.h , IfxPmsEvr.c

IfxPmsEvr_cfgSequenceDefault : IfxPmsEvr.c , IfxPmsEvr.h

IfxPmsEvr_checkRegCfgDefault : IfxPmsEvr.h , IfxPmsEvr.c

IfxPmsEvr_checkRegValuesDefault : IfxPmsEvr.h , IfxPmsEvr.c

IfxPmsEvr_configureBlankingFilterDelay() : IfxPmsEvr.h

IFXPMSEVR_CTRL_UP_WAIT_TIMEOUTCOUNT : IfxPmsEvr.h

IfxPmsEvr_disableInterrupt() : IfxPmsEvr.h

IfxPmsEvr_enableDcdcSynchronisation() : IfxPmsEvr.h

IfxPmsEvr_EnableInterrupt : IfxPmsEvr.h

IfxPmsEvr_EnableInterrupt_esr0wkp : IfxPmsEvr.h

IfxPmsEvr_EnableInterrupt_esr1wkp : IfxPmsEvr.h

IfxPmsEvr_EnableInterrupt_evrcmod : IfxPmsEvr.h

IfxPmsEvr_EnableInterrupt_ov33 : IfxPmsEvr.h

IfxPmsEvr_EnableInterrupt_ovc : IfxPmsEvr.h

IfxPmsEvr_EnableInterrupt_ovddm : IfxPmsEvr.h

IfxPmsEvr_EnableInterrupt_ovpre : IfxPmsEvr.h

IfxPmsEvr_EnableInterrupt_ovsb : IfxPmsEvr.h

IfxPmsEvr_EnableInterrupt_ovswd : IfxPmsEvr.h

IfxPmsEvr_EnableInterrupt_pinawkp : IfxPmsEvr.h

IfxPmsEvr_EnableInterrupt_pinbwkp : IfxPmsEvr.h

IfxPmsEvr_EnableInterrupt_screcc : IfxPmsEvr.h

IfxPmsEvr_EnableInterrupt_scrint : IfxPmsEvr.h

IfxPmsEvr_EnableInterrupt_scrrst : IfxPmsEvr.h

IfxPmsEvr_EnableInterrupt_scrwdt : IfxPmsEvr.h

IfxPmsEvr_EnableInterrupt_sdvok : IfxPmsEvr.h

IfxPmsEvr_EnableInterrupt_swdlvl : IfxPmsEvr.h

IfxPmsEvr_EnableInterrupt_synclck : IfxPmsEvr.h

IfxPmsEvr_EnableInterrupt_uv33 : IfxPmsEvr.h

IfxPmsEvr_EnableInterrupt_uvc : IfxPmsEvr.h

IfxPmsEvr_EnableInterrupt_uvddm : IfxPmsEvr.h

IfxPmsEvr_EnableInterrupt_uvpre : IfxPmsEvr.h

IfxPmsEvr_EnableInterrupt_uvsb : IfxPmsEvr.h

IfxPmsEvr_EnableInterrupt_uvswd : IfxPmsEvr.h

IfxPmsEvr_EnableInterrupt_wutwkp : IfxPmsEvr.h

IfxPmsEvr_enableInterrupts() : IfxPmsEvr.h

IfxPmsEvr_enableWakeupOnVextSupplyRampUp() : IfxPmsEvr.h

IfxPmsEvr_evr33ResetTriggerSignalConfig() : IfxPmsEvr.h

IfxPmsEvr_EvrcMode : IfxPmsEvr.h

IfxPmsEvr_EvrcMode_disableMode : IfxPmsEvr.h

IfxPmsEvr_EvrcMode_lowPowerMode : IfxPmsEvr.h

IfxPmsEvr_EvrcMode_pwmMode : IfxPmsEvr.h

IfxPmsEvr_EvrcMode_startupMode : IfxPmsEvr.h

IfxPmsEvr_evrcResetTriggerSignalConfig() : IfxPmsEvr.h

IfxPmsEvr_ExtSyncSwitchingFreqDivFactor : IfxPmsEvr.h

IfxPmsEvr_ExtSyncSwitchingFreqDivFactor_1 : IfxPmsEvr.h

IfxPmsEvr_ExtSyncSwitchingFreqDivFactor_16 : IfxPmsEvr.h

IfxPmsEvr_ExtSyncSwitchingFreqDivFactor_2 : IfxPmsEvr.h

IfxPmsEvr_ExtSyncSwitchingFreqDivFactor_32 : IfxPmsEvr.h

IfxPmsEvr_ExtSyncSwitchingFreqDivFactor_4 : IfxPmsEvr.h

IfxPmsEvr_ExtSyncSwitchingFreqDivFactor_8 : IfxPmsEvr.h

IfxPmsEvr_filterSecondaryConversionResult() : IfxPmsEvr.h , IfxPmsEvr.c

IfxPmsEvr_fineTrimEvrClock() : IfxPmsEvr.h

IfxPmsEvr_getAdcVddp3Result() : IfxPmsEvr.h

IfxPmsEvr_getAdcVddResult() : IfxPmsEvr.h

IfxPmsEvr_getAdcVextResult() : IfxPmsEvr.h

IfxPmsEvr_getEvrcMode() : IfxPmsEvr.h

IfxPmsEvr_getEvrcVoltageRegulator() : IfxPmsEvr.h

IfxPmsEvr_getPrimaryAdcEvr33Result() : IfxPmsEvr.h

IfxPmsEvr_getPrimaryAdcEvrcResult() : IfxPmsEvr.h

IfxPmsEvr_getPrimaryAdcSwdResult() : IfxPmsEvr.h

IfxPmsEvr_getSecondaryAdcResult() : IfxPmsEvr.c , IfxPmsEvr.h

IfxPmsEvr_OverVoltageMonitoring : IfxPmsEvr.h

IfxPmsEvr_OverVoltageMonitoring_eitherDirectionVoltageTransition : IfxPmsEvr.h

IfxPmsEvr_OverVoltageMonitoring_highToLowVoltageTransition : IfxPmsEvr.h

IfxPmsEvr_OverVoltageMonitoring_inactive : IfxPmsEvr.h

IfxPmsEvr_OverVoltageMonitoring_lowToHighVoltageTransition : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_0 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_1 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_10 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_11 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_12 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_13 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_14 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_15 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_16 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_17 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_18 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_19 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_2 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_20 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_21 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_22 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_23 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_24 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_25 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_26 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_27 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_28 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_29 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_3 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_30 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_31 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_32 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_33 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_34 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_35 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_36 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_37 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_38 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_39 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_4 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_40 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_41 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_42 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_43 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_44 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_45 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_46 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_47 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_48 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_49 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_5 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_50 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_51 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_52 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_53 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_54 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_55 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_56 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_57 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_58 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_59 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_6 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_60 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_61 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_62 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_63 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_7 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_8 : IfxPmsEvr.h

IfxPmsEvr_PrimaryAdcTrimValue_9 : IfxPmsEvr.h

IfxPmsEvr_runInitSequence() : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level0 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level1 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level10 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level11 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level12 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level13 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level14 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level15 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level16 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level17 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level18 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level19 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level2 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level20 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level21 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level22 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level23 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level24 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level25 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level26 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level27 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level28 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level29 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level3 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level30 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level31 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level32 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level33 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level34 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level35 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level36 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level37 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level38 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level39 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level4 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level40 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level41 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level42 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level43 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level44 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level45 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level46 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level47 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level48 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level49 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level5 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level50 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level51 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level52 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level53 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level54 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level55 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level56 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level57 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level58 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level59 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level6 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level60 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level61 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level62 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level63 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level7 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level8 : IfxPmsEvr.h

IfxPmsEvr_SecondaryVoltageErrorCounter_level9 : IfxPmsEvr.h

IfxPmsEvr_setEvr33PrimaryAdcTrimValue() : IfxPmsEvr.h

IfxPmsEvr_setEvr33VoltageOutputlevel() : IfxPmsEvr.h

IfxPmsEvr_setFrequencySpreadThreshold() : IfxPmsEvr.h

IfxPmsEvr_setNmosLevel() : IfxPmsEvr.h

IfxPmsEvr_setOverVoltageMonitoringMode() : IfxPmsEvr.h

IfxPmsEvr_setPmosLevel() : IfxPmsEvr.h

IfxPmsEvr_setRegulatorSwitchingFrequency() : IfxPmsEvr.h

IfxPmsEvr_setResetTrimValueMv() : IfxPmsEvr.h

IfxPmsEvr_setSdRegulatorOutputLevel() : IfxPmsEvr.h

IfxPmsEvr_setSdRegulatorPrimaryAdcTrimValue() : IfxPmsEvr.h

IfxPmsEvr_setSecondaryOverVoltageThresholdMv() : IfxPmsEvr.c , IfxPmsEvr.h

IfxPmsEvr_setSecondaryUnderVoltageThresholdMv() : IfxPmsEvr.c , IfxPmsEvr.h

IfxPmsEvr_setStandbyRamSupply() : IfxPmsEvr.h

IfxPmsEvr_setSwitchingFreqDivFactorForExternalsync() : IfxPmsEvr.h

IfxPmsEvr_setUnderVoltageMonitoringMode() : IfxPmsEvr.h

IfxPmsEvr_signedFineTrimEvrClock() : IfxPmsEvr.h

IfxPmsEvr_SupplyFilter : IfxPmsEvr.h

IfxPmsEvr_SupplyFilter_avgAdcConversionResult0 : IfxPmsEvr.h

IfxPmsEvr_SupplyFilter_avgAdcConversionResult1 : IfxPmsEvr.h

IfxPmsEvr_SupplyFilter_avgAdcConversionResult10 : IfxPmsEvr.h

IfxPmsEvr_SupplyFilter_avgAdcConversionResult11 : IfxPmsEvr.h

IfxPmsEvr_SupplyFilter_avgAdcConversionResult12 : IfxPmsEvr.h

IfxPmsEvr_SupplyFilter_avgAdcConversionResult13 : IfxPmsEvr.h

IfxPmsEvr_SupplyFilter_avgAdcConversionResult14 : IfxPmsEvr.h

IfxPmsEvr_SupplyFilter_avgAdcConversionResult2 : IfxPmsEvr.h

IfxPmsEvr_SupplyFilter_avgAdcConversionResult3 : IfxPmsEvr.h

IfxPmsEvr_SupplyFilter_avgAdcConversionResult4 : IfxPmsEvr.h

IfxPmsEvr_SupplyFilter_avgAdcConversionResult5 : IfxPmsEvr.h

IfxPmsEvr_SupplyFilter_avgAdcConversionResult6 : IfxPmsEvr.h

IfxPmsEvr_SupplyFilter_avgAdcConversionResult7 : IfxPmsEvr.h

IfxPmsEvr_SupplyFilter_avgAdcConversionResult8 : IfxPmsEvr.h

IfxPmsEvr_SupplyFilter_avgAdcConversionResult9 : IfxPmsEvr.h

IfxPmsEvr_SupplyFilter_eachConversionResult : IfxPmsEvr.h

IfxPmsEvr_SupplyMode : IfxPmsEvr.h

IfxPmsEvr_SupplyMode_evr33 : IfxPmsEvr.h

IfxPmsEvr_SupplyMode_evrc : IfxPmsEvr.h

IfxPmsEvr_SupplyMode_evrpr : IfxPmsEvr.h

IfxPmsEvr_SupplyMode_sb : IfxPmsEvr.h

IfxPmsEvr_SupplyMode_swd : IfxPmsEvr.h

IfxPmsEvr_SupplyMode_vddm : IfxPmsEvr.h

IfxPmsEvr_swdResetTriggerSignalConfig() : IfxPmsEvr.h

IfxPmsEvr_UnderVoltageMonitoring : IfxPmsEvr.h

IfxPmsEvr_UnderVoltageMonitoring_eitherDirectionVoltageTransition : IfxPmsEvr.h

IfxPmsEvr_UnderVoltageMonitoring_highToLowVoltageTransition : IfxPmsEvr.h

IfxPmsEvr_UnderVoltageMonitoring_inactive : IfxPmsEvr.h

IfxPmsEvr_UnderVoltageMonitoring_lowToHighVoltageTransition : IfxPmsEvr.h

IfxPmsEvr_wait() : IfxPmsEvr.h

IfxPmsPm_BlankingFilterDelay : IfxPmsPm.h

IfxPmsPm_BlankingFilterDelay_0ms : IfxPmsPm.h

IfxPmsPm_BlankingFilterDelay_10240ms : IfxPmsPm.h

IfxPmsPm_BlankingFilterDelay_10ms : IfxPmsPm.h

IfxPmsPm_BlankingFilterDelay_1280ms : IfxPmsPm.h

IfxPmsPm_BlankingFilterDelay_160ms : IfxPmsPm.h

IfxPmsPm_BlankingFilterDelay_20ms : IfxPmsPm.h

IfxPmsPm_BlankingFilterDelay_2560ms : IfxPmsPm.h

IfxPmsPm_BlankingFilterDelay_2_5ms : IfxPmsPm.h

IfxPmsPm_BlankingFilterDelay_320ms : IfxPmsPm.h

IfxPmsPm_BlankingFilterDelay_40ms : IfxPmsPm.h

IfxPmsPm_BlankingFilterDelay_5120ms : IfxPmsPm.h

IfxPmsPm_BlankingFilterDelay_5ms : IfxPmsPm.h

IfxPmsPm_BlankingFilterDelay_640ms : IfxPmsPm.h

IfxPmsPm_BlankingFilterDelay_80ms : IfxPmsPm.h

IfxPmsPm_clearLoadJumpTimer() : IfxPmsPm.h

IfxPmsPm_clearLoadJumpTimerOverflowFlag() : IfxPmsPm.h

IfxPmsPm_clearVoltageDroopTimer() : IfxPmsPm.h

IfxPmsPm_clearVoltageDroopTimerOverflowFlag() : IfxPmsPm.h

IfxPmsPm_configureSupplyMonitoring() : IfxPmsPm.c , IfxPmsPm.h

IfxPmsPm_configureWakeup() : IfxPmsPm.c , IfxPmsPm.h

IfxPmsPm_continueSleepSequenceInRAM() : IfxPmsPm.c , IfxPmsPm.h

IfxPmsPm_continueStandbySequenceInRAM() : IfxPmsPm.c , IfxPmsPm.h

IfxPmsPm_DigitalFilter : IfxPmsPm.h

IfxPmsPm_DigitalFilter_bypassed : IfxPmsPm.h

IfxPmsPm_DigitalFilter_used : IfxPmsPm.h

IfxPmsPm_disableLoadJumpTimer() : IfxPmsPm.h

IfxPmsPm_disableLoadJumpTimerOverflowFlag() : IfxPmsPm.h

IfxPmsPm_disableLoadJumpTimerOverflowInterrupt() : IfxPmsPm.h

IfxPmsPm_disableVoltageDroopTimer() : IfxPmsPm.h

IfxPmsPm_disableVoltageDroopTimerOverflowFlag() : IfxPmsPm.h

IfxPmsPm_disableVoltageDroopTimerOverflowInterrupt() : IfxPmsPm.h

IfxPmsPm_EdgeDetectionControl : IfxPmsPm.h

IfxPmsPm_EdgeDetectionControl_always : IfxPmsPm.h

IfxPmsPm_EdgeDetectionControl_never : IfxPmsPm.h

IfxPmsPm_EdgeDetectionControl_onFallingEdge : IfxPmsPm.h

IfxPmsPm_EdgeDetectionControl_onRisingEdge : IfxPmsPm.h

IfxPmsPm_enableLoadJumpTimer() : IfxPmsPm.h

IfxPmsPm_enableLoadJumpTimerOverflowFlag() : IfxPmsPm.h

IfxPmsPm_enableLoadJumpTimerOverflowInterrupt() : IfxPmsPm.h

IfxPmsPm_enableVoltageDroopTimer() : IfxPmsPm.h

IfxPmsPm_enableVoltageDroopTimerOverflowFlag() : IfxPmsPm.h

IfxPmsPm_enableVoltageDroopTimerOverflowInterrupt() : IfxPmsPm.h

IfxPmsPm_enableWakeup() : IfxPmsPm.c , IfxPmsPm.h

IfxPmsPm_Esr0PinStateRequest : IfxPmsPm.h

IfxPmsPm_Esr0PinStateRequest_resetOutput : IfxPmsPm.h

IfxPmsPm_Esr0PinStateRequest_tristate : IfxPmsPm.h

IfxPmsPm_getLoadJumpStatus() : IfxPmsPm.h

IfxPmsPm_getLoadJumpTimerCompareValue() : IfxPmsPm.h

IfxPmsPm_getLoadJumpTimerCountValue() : IfxPmsPm.h

IfxPmsPm_getMasterCpu() : IfxPmsPm.h

IfxPmsPm_getVoltageDroopStatus() : IfxPmsPm.h

IfxPmsPm_getVoltageDroopTimerCompareValue() : IfxPmsPm.h

IfxPmsPm_handleStandbyRam() : IfxPmsPm.h , IfxPmsPm.c

IfxPmsPm_hasLoadJumpTimerOverflowOccured() : IfxPmsPm.h

IfxPmsPm_hasVoltageDroopTimerOverflowOccured() : IfxPmsPm.h

IfxPmsPm_initAndRequestLoadJump() : IfxPmsPm.h , IfxPmsPm.c

IfxPmsPm_initAndRequestVoltageDroop() : IfxPmsPm.h , IfxPmsPm.c

IfxPmsPm_initiateWakeup() : IfxPmsPm.h , IfxPmsPm.c

IfxPmsPm_initLoadJumpConfig() : IfxPmsPm.h , IfxPmsPm.c

IfxPmsPm_initSleepConfig() : IfxPmsPm.c , IfxPmsPm.h

IfxPmsPm_initStandbyConfig() : IfxPmsPm.h , IfxPmsPm.c

IfxPmsPm_initVoltageDroopConfig() : IfxPmsPm.h , IfxPmsPm.c

IfxPmsPm_LoadJumpStatus : IfxPmsPm.h

IfxPmsPm_LoadJumpStatus_hwTriggeredRequestActive : IfxPmsPm.h

IfxPmsPm_LoadJumpStatus_inactive : IfxPmsPm.h

IfxPmsPm_LoadJumpStatus_swTriggeredRequestActive : IfxPmsPm.h

IfxPmsPm_PadStateRequest : IfxPmsPm.h

IfxPmsPm_PadStateRequest_inputWithWeakPullUp : IfxPmsPm.h

IfxPmsPm_PadStateRequest_tristate : IfxPmsPm.h

IfxPmsPm_PinEdgeTriggerEvent : IfxPmsPm.h

IfxPmsPm_PinEdgeTriggerEvent_bothRisingAndFallingEdge : IfxPmsPm.h

IfxPmsPm_PinEdgeTriggerEvent_fallingEdge : IfxPmsPm.h

IfxPmsPm_PinEdgeTriggerEvent_none : IfxPmsPm.h

IfxPmsPm_PinEdgeTriggerEvent_risingEdge : IfxPmsPm.h

IfxPmsPm_RampingMode : IfxPmsPm.h

IfxPmsPm_RampingMode_both : IfxPmsPm.h

IfxPmsPm_RampingMode_down : IfxPmsPm.h

IfxPmsPm_RampingMode_none : IfxPmsPm.h

IfxPmsPm_RampingMode_up : IfxPmsPm.h

IfxPmsPm_readVoltageDroopTimerCountValue() : IfxPmsPm.h

IfxPmsPm_requestLoadJump() : IfxPmsPm.h

IfxPmsPm_RequestPowerMode : IfxPmsPm.h

IfxPmsPm_RequestPowerMode_idle : IfxPmsPm.h

IfxPmsPm_RequestPowerMode_run : IfxPmsPm.h

IfxPmsPm_RequestPowerMode_sleep : IfxPmsPm.h

IfxPmsPm_RequestPowerMode_standby : IfxPmsPm.h

IfxPmsPm_requestVoltageDroop() : IfxPmsPm.h

IfxPmsPm_ScrClocking : IfxPmsPm.h

IfxPmsPm_ScrClocking_100mhzOptional : IfxPmsPm.h

IfxPmsPm_ScrClocking_bothClocksActiive : IfxPmsPm.h

IfxPmsPm_setCoreMode() : IfxPmsPm.h , IfxPmsPm.c

IfxPmsPm_setLoadJumpTimerCompareValue() : IfxPmsPm.h

IfxPmsPm_setMasterCpu() : IfxPmsPm.h

IfxPmsPm_setSleepMode() : IfxPmsPm.h

IfxPmsPm_setStandbyMode() : IfxPmsPm.c , IfxPmsPm.h

IfxPmsPm_setVoltageDroopStep() : IfxPmsPm.h

IfxPmsPm_setVoltageDroopTimerCompareValue() : IfxPmsPm.h

IfxPmsPm_StandbyRamSupply : IfxPmsPm.h

IfxPmsPm_StandbyRamSupply_cpu0Block0 : IfxPmsPm.h

IfxPmsPm_StandbyRamSupply_cpu0Block01 : IfxPmsPm.h

IfxPmsPm_StandbyRamSupply_cpu0Cpu1 : IfxPmsPm.h

IfxPmsPm_StandbyRamSupply_cpu1Block01 : IfxPmsPm.h

IfxPmsPm_StandbyRamSupply_never : IfxPmsPm.h

IfxPmsPm_StandbyTriggerMode : IfxPmsPm.h

IfxPmsPm_StandbyTriggerMode_hardware_nmi : IfxPmsPm.h

IfxPmsPm_StandbyTriggerMode_hardware_undervoltage : IfxPmsPm.h

IfxPmsPm_StandbyTriggerMode_software : IfxPmsPm.h

IfxPmsPm_startLoadJumpTimer() : IfxPmsPm.h

IfxPmsPm_startSleepSequenceinFlash() : IfxPmsPm.c , IfxPmsPm.h

IfxPmsPm_startStandbySequenceInFlash() : IfxPmsPm.c , IfxPmsPm.h

IfxPmsPm_startVoltageDroopTimer() : IfxPmsPm.h

IfxPmsPm_stopLoadJumpTimer() : IfxPmsPm.h

IfxPmsPm_stopVoltageDroopTimer() : IfxPmsPm.h

IfxPmsPm_ThresholdEvent : IfxPmsPm.h

IfxPmsPm_ThresholdEvent_overvoltage : IfxPmsPm.h

IfxPmsPm_ThresholdEvent_undervoltage : IfxPmsPm.h

IfxPmsPm_VoltageDroopRequest : IfxPmsPm.h

IfxPmsPm_VoltageDroopRequest_negative : IfxPmsPm.h

IfxPmsPm_VoltageDroopRequest_positive : IfxPmsPm.h

IfxPmsPm_VoltageDroopStatus : IfxPmsPm.h

IfxPmsPm_VoltageDroopStatus_hwTriggeredRequestActive : IfxPmsPm.h

IfxPmsPm_VoltageDroopStatus_inactive : IfxPmsPm.h

IfxPmsPm_VoltageDroopStatus_swTriggeredRequestActive : IfxPmsPm.h

IfxPmsPm_VoltageDroopStep : IfxPmsPm.h

IfxPmsPm_VoltageDroopStep_0mV : IfxPmsPm.h

IfxPmsPm_VoltageDroopStep_10mV : IfxPmsPm.h

IfxPmsPm_VoltageDroopStep_15mV : IfxPmsPm.h

IfxPmsPm_VoltageDroopStep_20mV : IfxPmsPm.h

IfxPmsPm_VoltageDroopStep_25mV : IfxPmsPm.h

IfxPmsPm_VoltageDroopStep_30mV : IfxPmsPm.h

IfxPmsPm_VoltageDroopStep_35mV : IfxPmsPm.h

IfxPmsPm_VoltageDroopStep_40mV : IfxPmsPm.h

IfxPmsPm_VoltageDroopStep_45mV : IfxPmsPm.h

IfxPmsPm_VoltageDroopStep_50mV : IfxPmsPm.h

IfxPmsPm_VoltageDroopStep_55mV : IfxPmsPm.h

IfxPmsPm_VoltageDroopStep_5mV : IfxPmsPm.h

IfxPmsPm_VoltageDroopStep_60mV : IfxPmsPm.h

IfxPmsPm_VoltageDroopStep_65mV : IfxPmsPm.h

IfxPmsPm_VoltageDroopStep_70mV : IfxPmsPm.h

IfxPmsPm_VoltageDroopStep_75mV : IfxPmsPm.h

IfxPmsPm_VoltageSource : IfxPmsPm.h

IfxPmsPm_VoltageSource_vdd : IfxPmsPm.h

IfxPmsPm_VoltageSource_vddm : IfxPmsPm.h

IfxPmsPm_VoltageSource_vddp3 : IfxPmsPm.h

IfxPmsPm_VoltageSource_vddpd : IfxPmsPm.h

IfxPmsPm_VoltageSource_vevrsb : IfxPmsPm.h

IfxPmsPm_VoltageSource_vext : IfxPmsPm.h

IfxPmsPm_WakeupOn : IfxPmsPm.h

IfxPmsPm_WakeupOn_esr0 : IfxPmsPm.h

IfxPmsPm_WakeupOn_esr1 : IfxPmsPm.h

IfxPmsPm_WakeupOn_pinA : IfxPmsPm.h

IfxPmsPm_WakeupOn_pinB : IfxPmsPm.h

IfxPmsPm_WakeupOn_porst : IfxPmsPm.h

IfxPmsPm_WakeupOn_power : IfxPmsPm.h

IfxPmsPm_WakeupOn_scr : IfxPmsPm.h

IfxPmsPm_WakeupOn_timer : IfxPmsPm.h

IfxPmsPm_WakeupTimerMode : IfxPmsPm.h

IfxPmsPm_WakeupTimerMode_autoReload : IfxPmsPm.h

IfxPmsPm_WakeupTimerMode_autoStop : IfxPmsPm.h

IfxPmsPm_WutClock : IfxPmsPm.h

IfxPmsPm_WutClock_68Hz : IfxPmsPm.h

IfxPmsPm_WutClock_70kHz : IfxPmsPm.h

IfxPort_cfg_esrMasks : IfxPort_cfg.c , IfxPort_cfg.h

IfxPort_cfg_indexMap : IfxPort_cfg.c , IfxPort_cfg.h

IfxPort_ControlledBy : IfxPort.h

IfxPort_ControlledBy_hsct : IfxPort.h

IfxPort_ControlledBy_port : IfxPort.h

IfxPort_disableEmergencyStop() : IfxPort.c , IfxPort.h

IfxPort_enableEmergencyStop() : IfxPort.h , IfxPort.c

IfxPort_getAddress() : IfxPort.h , IfxPort.c

IfxPort_getGroupState() : IfxPort.h

IfxPort_getIndex() : IfxPort.c , IfxPort.h

IfxPort_getPinState() : IfxPort.h

IfxPort_Index : IfxPort_cfg.h

IfxPort_Index_00 : IfxPort_cfg.h

IfxPort_Index_01 : IfxPort_cfg.h

IfxPort_Index_02 : IfxPort_cfg.h

IfxPort_Index_10 : IfxPort_cfg.h

IfxPort_Index_11 : IfxPort_cfg.h

IfxPort_Index_12 : IfxPort_cfg.h

IfxPort_Index_13 : IfxPort_cfg.h

IfxPort_Index_14 : IfxPort_cfg.h

IfxPort_Index_15 : IfxPort_cfg.h

IfxPort_Index_20 : IfxPort_cfg.h

IfxPort_Index_21 : IfxPort_cfg.h

IfxPort_Index_22 : IfxPort_cfg.h

IfxPort_Index_23 : IfxPort_cfg.h

IfxPort_Index_24 : IfxPort_cfg.h

IfxPort_Index_25 : IfxPort_cfg.h

IfxPort_Index_26 : IfxPort_cfg.h

IfxPort_Index_30 : IfxPort_cfg.h

IfxPort_Index_31 : IfxPort_cfg.h

IfxPort_Index_32 : IfxPort_cfg.h

IfxPort_Index_33 : IfxPort_cfg.h

IfxPort_Index_34 : IfxPort_cfg.h

IfxPort_Index_40 : IfxPort_cfg.h

IfxPort_Index_41 : IfxPort_cfg.h

IfxPort_Index_none : IfxPort_cfg.h

IfxPort_InputMode : IfxPort.h

IfxPort_InputMode_noPullDevice : IfxPort.h

IfxPort_InputMode_pullDown : IfxPort.h

IfxPort_InputMode_pullUp : IfxPort.h

IfxPort_InputMode_undefined : IfxPort.h

IfxPort_Io_initModule() : IfxPort_Io.h , IfxPort_Io.c

IfxPort_LvdsDirection : IfxPort.h

IfxPort_LvdsDirection_rx : IfxPort.h

IfxPort_LvdsDirection_tx : IfxPort.h

IfxPort_LvdsMode : IfxPort.h

IfxPort_LvdsMode_high : IfxPort.h

IfxPort_LvdsMode_medium : IfxPort.h

IfxPort_LvdsPath : IfxPort.h

IfxPort_LvdsPath_disable : IfxPort.h

IfxPort_LvdsPath_enable : IfxPort.h

IfxPort_LvdsPullDown : IfxPort.h

IfxPort_LvdsPullDown_disable : IfxPort.h

IfxPort_LvdsPullDown_enable : IfxPort.h

IfxPort_LvdsTerminationMode : IfxPort.h

IfxPort_LvdsTerminationMode_external : IfxPort.h

IfxPort_LvdsTerminationMode_internal : IfxPort.h

IfxPort_Mode : IfxPort.h

IfxPort_Mode_inputNoPullDevice : IfxPort.h

IfxPort_Mode_inputPullDown : IfxPort.h

IfxPort_Mode_inputPullUp : IfxPort.h

IfxPort_Mode_outputOpenDrainAlt1 : IfxPort.h

IfxPort_Mode_outputOpenDrainAlt2 : IfxPort.h

IfxPort_Mode_outputOpenDrainAlt3 : IfxPort.h

IfxPort_Mode_outputOpenDrainAlt4 : IfxPort.h

IfxPort_Mode_outputOpenDrainAlt5 : IfxPort.h

IfxPort_Mode_outputOpenDrainAlt6 : IfxPort.h

IfxPort_Mode_outputOpenDrainAlt7 : IfxPort.h

IfxPort_Mode_outputOpenDrainGeneral : IfxPort.h

IfxPort_Mode_outputPushPullAlt1 : IfxPort.h

IfxPort_Mode_outputPushPullAlt2 : IfxPort.h

IfxPort_Mode_outputPushPullAlt3 : IfxPort.h

IfxPort_Mode_outputPushPullAlt4 : IfxPort.h

IfxPort_Mode_outputPushPullAlt5 : IfxPort.h

IfxPort_Mode_outputPushPullAlt6 : IfxPort.h

IfxPort_Mode_outputPushPullAlt7 : IfxPort.h

IfxPort_Mode_outputPushPullGeneral : IfxPort.h

IfxPort_modifyPinControllerSelection() : IfxPort.c , IfxPort.h

IFXPORT_NUM_MODULES : IfxPort_cfg.h

IFXPORT_OUTOUTFEATURE_NONE : IfxPort_cfg.h

IfxPort_OutputIdx : IfxPort.h

IfxPort_OutputIdx_alt1 : IfxPort.h

IfxPort_OutputIdx_alt2 : IfxPort.h

IfxPort_OutputIdx_alt3 : IfxPort.h

IfxPort_OutputIdx_alt4 : IfxPort.h

IfxPort_OutputIdx_alt5 : IfxPort.h

IfxPort_OutputIdx_alt6 : IfxPort.h

IfxPort_OutputIdx_alt7 : IfxPort.h

IfxPort_OutputIdx_general : IfxPort.h

IfxPort_OutputMode : IfxPort.h

IfxPort_OutputMode_none : IfxPort.h

IfxPort_OutputMode_openDrain : IfxPort.h

IfxPort_OutputMode_pushPull : IfxPort.h

IfxPort_P00_0 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P00_1 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P00_10 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P00_11 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P00_12 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P00_13 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P00_14 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P00_15 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P00_2 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P00_3 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P00_4 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P00_5 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P00_6 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P00_7 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P00_8 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P00_9 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P01_0 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P01_1 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P01_10 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P01_11 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P01_12 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P01_13 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P01_14 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P01_15 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P01_2 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P01_3 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P01_4 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P01_5 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P01_6 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P01_7 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P01_8 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P01_9 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P02_0 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P02_1 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P02_10 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P02_11 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P02_12 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P02_13 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P02_14 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P02_15 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P02_2 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P02_3 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P02_4 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P02_5 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P02_6 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P02_7 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P02_8 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P02_9 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P10_0 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P10_1 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P10_10 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P10_11 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P10_13 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P10_14 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P10_15 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P10_2 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P10_3 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P10_4 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P10_5 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P10_6 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P10_7 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P10_8 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P10_9 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P11_0 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P11_1 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P11_10 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P11_11 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P11_12 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P11_13 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P11_14 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P11_15 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P11_2 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P11_3 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P11_4 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P11_5 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P11_6 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P11_7 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P11_8 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P11_9 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P12_0 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P12_1 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P13_0 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P13_1 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P13_10 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P13_11 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P13_12 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P13_13 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P13_14 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P13_15 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P13_2 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P13_3 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P13_4 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P13_5 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P13_6 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P13_7 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P13_9 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P14_0 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P14_1 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P14_10 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P14_11 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P14_12 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P14_13 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P14_14 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P14_15 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P14_2 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P14_3 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P14_4 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P14_5 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P14_6 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P14_7 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P14_8 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P14_9 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P15_0 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P15_1 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P15_10 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P15_11 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P15_12 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P15_13 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P15_14 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P15_15 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P15_2 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P15_3 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P15_4 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P15_5 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P15_6 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P15_7 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P15_8 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P20_0 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P20_1 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P20_10 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P20_11 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P20_12 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P20_13 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P20_14 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P20_3 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P20_6 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P20_7 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P20_8 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P20_9 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P21_0 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P21_1 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P21_2 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P21_3 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P21_4 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P21_5 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P21_6 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P21_7 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P22_0 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P22_1 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P22_10 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P22_11 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P22_2 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P22_3 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P22_4 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P22_5 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P22_6 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P22_7 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P22_8 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P22_9 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P23_0 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P23_1 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P23_2 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P23_3 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P23_4 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P23_5 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P23_6 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P23_7 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P24_0 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P24_1 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P24_10 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P24_11 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P24_12 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P24_13 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P24_14 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P24_15 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P24_2 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P24_3 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P24_4 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P24_5 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P24_6 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P24_7 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P24_8 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P24_9 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P25_0 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P25_1 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P25_10 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P25_11 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P25_12 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P25_13 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P25_14 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P25_15 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P25_2 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P25_3 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P25_4 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P25_5 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P25_6 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P25_7 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P25_8 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P25_9 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P26_0 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P30_0 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P30_1 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P30_10 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P30_11 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P30_12 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P30_13 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P30_14 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P30_15 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P30_2 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P30_3 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P30_4 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P30_5 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P30_6 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P30_7 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P30_8 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P30_9 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P31_0 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P31_1 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P31_10 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P31_11 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P31_12 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P31_13 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P31_14 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P31_15 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P31_2 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P31_3 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P31_4 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P31_5 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P31_6 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P31_7 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P31_8 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P31_9 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P32_0 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P32_1 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P32_2 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P32_3 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P32_4 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P32_5 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P32_6 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P32_7 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P33_0 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P33_1 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P33_10 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P33_11 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P33_12 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P33_13 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P33_14 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P33_15 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P33_2 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P33_3 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P33_4 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P33_5 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P33_6 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P33_7 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P33_8 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P33_9 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P34_1 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P34_2 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P34_3 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P34_4 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P34_5 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P40_0 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P40_1 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P40_10 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P40_11 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P40_12 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P40_13 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P40_14 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P40_15 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P40_2 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P40_3 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P40_4 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P40_5 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P40_6 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P40_7 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P40_8 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P40_9 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P41_0 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P41_1 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P41_2 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P41_3 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P41_4 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P41_5 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P41_6 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P41_7 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P41_8 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_PadDriver : IfxPort.h

IfxPort_PadDriver_cmosAutomotiveSpeed1 : IfxPort.h

IfxPort_PadDriver_cmosAutomotiveSpeed2 : IfxPort.h

IfxPort_PadDriver_cmosAutomotiveSpeed3 : IfxPort.h

IfxPort_PadDriver_cmosAutomotiveSpeed4 : IfxPort.h

IfxPort_PadDriver_ttl3v3Speed1 : IfxPort.h

IfxPort_PadDriver_ttl3v3Speed2 : IfxPort.h

IfxPort_PadDriver_ttl3v3Speed3 : IfxPort.h

IfxPort_PadDriver_ttl3v3Speed4 : IfxPort.h

IfxPort_PadDriver_ttlSpeed1 : IfxPort.h

IfxPort_PadDriver_ttlSpeed2 : IfxPort.h

IfxPort_PadDriver_ttlSpeed3 : IfxPort.h

IfxPort_PadDriver_ttlSpeed4 : IfxPort.h

IfxPort_PadSupply : IfxPort.h

IfxPort_PadSupply_3v : IfxPort.h

IfxPort_PadSupply_5v : IfxPort.h

IfxPort_Pin_pinTable : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_PinFunctionMode : IfxPort.h

IfxPort_PinFunctionMode_analog : IfxPort.h

IfxPort_PinFunctionMode_digital : IfxPort.h

IFXPORT_PINMAP_NUM_MODULES : IfxPort_PinMap.h

IFXPORT_PINMAP_PIN_NUM_ITEMS : IfxPort_PinMap.h

IfxPort_resetESR() : IfxPort.h , IfxPort.c

IfxPort_resetPinControllerSelection() : IfxPort.c , IfxPort.h

IfxPort_setESR() : IfxPort.c , IfxPort.h

IfxPort_setGroupModeInput() : IfxPort.h , IfxPort.c

IfxPort_setGroupModeOutput() : IfxPort.h , IfxPort.c

IfxPort_setGroupPadDriver() : IfxPort.c , IfxPort.h

IfxPort_setGroupState() : IfxPort.h

IfxPort_setPinControllerSelection() : IfxPort.c , IfxPort.h

IfxPort_setPinFunctionMode() : IfxPort.h

IfxPort_setPinHigh() : IfxPort.h

IfxPort_setPinLow() : IfxPort.h

IfxPort_setPinMode() : IfxPort.h , IfxPort.c

IfxPort_setPinModeInput() : IfxPort.h

IfxPort_setPinModeLVDS() : IfxPort.h , IfxPort.c

IfxPort_setPinModeOutput() : IfxPort.h

IfxPort_setPinPadDriver() : IfxPort.h , IfxPort.c

IfxPort_setPinState() : IfxPort.h

IfxPort_State : IfxPort.h

IfxPort_State_high : IfxPort.h

IfxPort_State_low : IfxPort.h

IfxPort_State_notChanged : IfxPort.h

IfxPort_State_toggled : IfxPort.h

IfxPort_togglePin() : IfxPort.h

IfxPsi5_AlternateInput : IfxPsi5.h

IfxPsi5_AlternateInput_0 : IfxPsi5.h

IfxPsi5_AlternateInput_1 : IfxPsi5.h

IfxPsi5_AlternateInput_2 : IfxPsi5.h

IfxPsi5_AlternateInput_3 : IfxPsi5.h

IfxPsi5_BaudRate : IfxPsi5.h

IfxPsi5_BaudRate_125 : IfxPsi5.h

IfxPsi5_BaudRate_189 : IfxPsi5.h

IfxPsi5_ChannelId : IfxPsi5_cfg.h

IfxPsi5_ChannelId_0 : IfxPsi5_cfg.h

IfxPsi5_ChannelId_1 : IfxPsi5_cfg.h

IfxPsi5_ChannelId_2 : IfxPsi5_cfg.h

IfxPsi5_ChannelId_3 : IfxPsi5_cfg.h

IfxPsi5_ChannelId_none : IfxPsi5_cfg.h

IfxPsi5_clearAllInterrupt() : IfxPsi5.h

IfxPsi5_clearInterrupt() : IfxPsi5.h

IfxPsi5_ClockType : IfxPsi5.h

IfxPsi5_ClockType_fastClock_189 : IfxPsi5.h

IfxPsi5_ClockType_fracDiv : IfxPsi5.h

IfxPsi5_ClockType_slowClock_125 : IfxPsi5.h

IfxPsi5_ClockType_timeStamp : IfxPsi5.h

IfxPsi5_CRCorParity : IfxPsi5.h

IfxPsi5_CRCorParity_crc : IfxPsi5.h

IfxPsi5_CRCorParity_parity : IfxPsi5.h

IFXPSI5_DEFAULT_FASTCLOCK_FREQ : IfxPsi5_cfg.h

IFXPSI5_DEFAULT_SLOWCLOCK_FREQ : IfxPsi5_cfg.h

IFXPSI5_DEFAULT_TIMESTAMP_FREQ : IfxPsi5_cfg.h

IfxPsi5_DigitalInputFilterDepth : IfxPsi5.h

IfxPsi5_DigitalInputFilterDepth_0 : IfxPsi5.h

IfxPsi5_DigitalInputFilterDepth_1 : IfxPsi5.h

IfxPsi5_DigitalInputFilterDepth_10 : IfxPsi5.h

IfxPsi5_DigitalInputFilterDepth_11 : IfxPsi5.h

IfxPsi5_DigitalInputFilterDepth_12 : IfxPsi5.h

IfxPsi5_DigitalInputFilterDepth_13 : IfxPsi5.h

IfxPsi5_DigitalInputFilterDepth_14 : IfxPsi5.h

IfxPsi5_DigitalInputFilterDepth_15 : IfxPsi5.h

IfxPsi5_DigitalInputFilterDepth_2 : IfxPsi5.h

IfxPsi5_DigitalInputFilterDepth_3 : IfxPsi5.h

IfxPsi5_DigitalInputFilterDepth_4 : IfxPsi5.h

IfxPsi5_DigitalInputFilterDepth_5 : IfxPsi5.h

IfxPsi5_DigitalInputFilterDepth_6 : IfxPsi5.h

IfxPsi5_DigitalInputFilterDepth_7 : IfxPsi5.h

IfxPsi5_DigitalInputFilterDepth_8 : IfxPsi5.h

IfxPsi5_DigitalInputFilterDepth_9 : IfxPsi5.h

IfxPsi5_disableModule() : IfxPsi5.h , IfxPsi5.c

IfxPsi5_DividerMode : IfxPsi5.h

IfxPsi5_DividerMode_fractional : IfxPsi5.h

IfxPsi5_DividerMode_normal : IfxPsi5.h

IfxPsi5_DividerMode_off : IfxPsi5.h

IfxPsi5_DividerMode_spb : IfxPsi5.h

IFXPSI5_ENABLE_CHANNEL : IfxPsi5_cfg.h

IFXPSI5_ENABLE_CHANNELTRIGGER : IfxPsi5_cfg.h

IfxPsi5_enableAllChannels() : IfxPsi5.h

IfxPsi5_enableInterrupt() : IfxPsi5.h , IfxPsi5.c

IfxPsi5_enableModule() : IfxPsi5.h , IfxPsi5.c

IfxPsi5_FractionalDividerRegister : IfxPsi5.h

IfxPsi5_FractionalDividerRegister_highbitrate : IfxPsi5.h

IfxPsi5_FractionalDividerRegister_lowbitrate : IfxPsi5.h

IfxPsi5_FractionalDividerRegister_normal : IfxPsi5.h

IfxPsi5_FractionalDividerRegister_timestamp : IfxPsi5.h

IfxPsi5_FrameExpectation : IfxPsi5.h

IfxPsi5_FrameExpectation_expected : IfxPsi5.h

IfxPsi5_FrameExpectation_notExpected : IfxPsi5.h

IfxPsi5_getInterruptStatus() : IfxPsi5.h

IfxPsi5_getReadFifoPointer() : IfxPsi5.h

IfxPsi5_getReceiveDataRegisterLow() : IfxPsi5.h

IfxPsi5_getSrcPointer() : IfxPsi5.h

IfxPsi5_getStatusCrci() : IfxPsi5.h

IfxPsi5_getStatusMei() : IfxPsi5.h

IfxPsi5_getStatusNbi() : IfxPsi5.h

IfxPsi5_getStatusNfi() : IfxPsi5.h

IfxPsi5_getStatusRdi() : IfxPsi5.h

IfxPsi5_getStatusRmi() : IfxPsi5.h

IfxPsi5_getStatusRsi() : IfxPsi5.h

IfxPsi5_getStatusTei() : IfxPsi5.h

IfxPsi5_getWriteFifoPointer() : IfxPsi5.h

IfxPsi5_initRxPin() : IfxPsi5.h

IfxPsi5_initTxPin() : IfxPsi5.h

IfxPsi5_InterruptNodePointer : IfxPsi5.h

IfxPsi5_InterruptNodePointer_erri : IfxPsi5.h

IfxPsi5_InterruptNodePointer_fwi : IfxPsi5.h

IfxPsi5_InterruptNodePointer_rbi : IfxPsi5.h

IfxPsi5_InterruptNodePointer_rdi : IfxPsi5.h

IfxPsi5_InterruptNodePointer_rsi : IfxPsi5.h

IfxPsi5_InterruptNodePointer_sdi : IfxPsi5.h

IfxPsi5_InterruptNodePointer_tbi : IfxPsi5.h

IfxPsi5_InterruptNodePointer_tdi : IfxPsi5.h

IfxPsi5_InterruptRequest : IfxPsi5.h

IfxPsi5_InterruptRequest_disabled : IfxPsi5.h

IfxPsi5_InterruptRequest_enabled : IfxPsi5.h

IfxPsi5_InterruptServiceRequest : IfxPsi5.h

IfxPsi5_InterruptServiceRequest_0 : IfxPsi5.h

IfxPsi5_InterruptServiceRequest_1 : IfxPsi5.h

IfxPsi5_InterruptServiceRequest_2 : IfxPsi5.h

IfxPsi5_InterruptServiceRequest_3 : IfxPsi5.h

IfxPsi5_InterruptServiceRequest_4 : IfxPsi5.h

IfxPsi5_InterruptServiceRequest_5 : IfxPsi5.h

IfxPsi5_InterruptServiceRequest_6 : IfxPsi5.h

IfxPsi5_InterruptServiceRequest_7 : IfxPsi5.h

IfxPsi5_InterruptSource : IfxPsi5.h

IfxPsi5_InterruptSource_crci : IfxPsi5.h

IfxPsi5_InterruptSource_fwi : IfxPsi5.h

IfxPsi5_InterruptSource_mei : IfxPsi5.h

IfxPsi5_InterruptSource_nbi : IfxPsi5.h

IfxPsi5_InterruptSource_nfi : IfxPsi5.h

IfxPsi5_InterruptSource_rbi : IfxPsi5.h

IfxPsi5_InterruptSource_rdi : IfxPsi5.h

IfxPsi5_InterruptSource_rmi : IfxPsi5.h

IfxPsi5_InterruptSource_rsi : IfxPsi5.h

IfxPsi5_InterruptSource_rui : IfxPsi5.h

IfxPsi5_InterruptSource_scri0 : IfxPsi5.h

IfxPsi5_InterruptSource_scri1 : IfxPsi5.h

IfxPsi5_InterruptSource_scri2 : IfxPsi5.h

IfxPsi5_InterruptSource_scri3 : IfxPsi5.h

IfxPsi5_InterruptSource_scri4 : IfxPsi5.h

IfxPsi5_InterruptSource_scri5 : IfxPsi5.h

IfxPsi5_InterruptSource_sdi0 : IfxPsi5.h

IfxPsi5_InterruptSource_sdi1 : IfxPsi5.h

IfxPsi5_InterruptSource_sdi2 : IfxPsi5.h

IfxPsi5_InterruptSource_sdi3 : IfxPsi5.h

IfxPsi5_InterruptSource_sdi4 : IfxPsi5.h

IfxPsi5_InterruptSource_sdi5 : IfxPsi5.h

IfxPsi5_InterruptSource_soi0 : IfxPsi5.h

IfxPsi5_InterruptSource_soi1 : IfxPsi5.h

IfxPsi5_InterruptSource_soi2 : IfxPsi5.h

IfxPsi5_InterruptSource_soi3 : IfxPsi5.h

IfxPsi5_InterruptSource_soi4 : IfxPsi5.h

IfxPsi5_InterruptSource_soi5 : IfxPsi5.h

IfxPsi5_InterruptSource_tei : IfxPsi5.h

IfxPsi5_InterruptSource_toi : IfxPsi5.h

IfxPsi5_InterruptSource_tooi : IfxPsi5.h

IfxPsi5_InterruptSource_tpi : IfxPsi5.h

IfxPsi5_InterruptSource_tpoi : IfxPsi5.h

IfxPsi5_InterruptSource_tsi : IfxPsi5.h

IfxPsi5_InterruptSource_tsoi : IfxPsi5.h

IfxPsi5_InterruptSource_wsi0 : IfxPsi5.h

IfxPsi5_InterruptSource_wsi1 : IfxPsi5.h

IfxPsi5_InterruptSource_wsi2 : IfxPsi5.h

IfxPsi5_InterruptSource_wsi3 : IfxPsi5.h

IfxPsi5_InterruptSource_wsi4 : IfxPsi5.h

IfxPsi5_InterruptSource_wsi5 : IfxPsi5.h

IfxPsi5_InterruptStatusRegister : IfxPsi5.h

IfxPsi5_InterruptStatusRegister_a : IfxPsi5.h

IfxPsi5_InterruptStatusRegister_b : IfxPsi5.h

IfxPsi5_isModuleSuspended() : IfxPsi5.h

IfxPsi5_MessagingBits : IfxPsi5.h

IfxPsi5_MessagingBits_absent : IfxPsi5.h

IfxPsi5_MessagingBits_present : IfxPsi5.h

IFXPSI5_NUM_CHANNELS : IfxPsi5_cfg.h

IFXPSI5_NUM_MODULES : IfxPsi5_cfg.h

IFXPSI5_NUM_SLOTS : IfxPsi5_cfg.h

IFXPSI5_NUM_WDTS : IfxPsi5_cfg.h

IFXPSI5_PINMAP_NUM_CHANNELS : IfxPsi5_PinMap.h

IFXPSI5_PINMAP_NUM_MODULES : IfxPsi5_PinMap.h

IFXPSI5_PINMAP_RX_IN_NUM_ITEMS : IfxPsi5_PinMap.h

IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS : IfxPsi5_PinMap.h

IfxPsi5_Psi5_deInitModule() : IfxPsi5_Psi5.c , IfxPsi5_Psi5.h

IfxPsi5_Psi5_enableModule() : IfxPsi5_Psi5.c , IfxPsi5_Psi5.h

IfxPsi5_Psi5_getFracDivClock() : IfxPsi5_Psi5.h , IfxPsi5_Psi5.c

IfxPsi5_Psi5_initChannel() : IfxPsi5_Psi5.c , IfxPsi5_Psi5.h

IfxPsi5_Psi5_initChannelConfig() : IfxPsi5_Psi5.h , IfxPsi5_Psi5.c

IfxPsi5_Psi5_initializeClock() : IfxPsi5_Psi5.c , IfxPsi5_Psi5.h

IfxPsi5_Psi5_initModule() : IfxPsi5_Psi5.h , IfxPsi5_Psi5.c

IfxPsi5_Psi5_initModuleConfig() : IfxPsi5_Psi5.c , IfxPsi5_Psi5.h

IfxPsi5_Psi5_readChannelFrame() : IfxPsi5_Psi5.c , IfxPsi5_Psi5.h

IfxPsi5_Psi5_readChannelSerialMessage() : IfxPsi5_Psi5.c , IfxPsi5_Psi5.h

IfxPsi5_Psi5_resetModule() : IfxPsi5_Psi5.c , IfxPsi5_Psi5.h

IfxPsi5_Psi5_sendChannelData() : IfxPsi5_Psi5.h , IfxPsi5_Psi5.c

IfxPsi5_Psi5_startupChannel() : IfxPsi5_Psi5.h

IfxPsi5_readReceiveFifoData() : IfxPsi5.h

IfxPsi5_ReceiveDataRegisterTimestamp : IfxPsi5.h

IfxPsi5_ReceiveDataRegisterTimestamp_frame : IfxPsi5.h

IfxPsi5_ReceiveDataRegisterTimestamp_pulse : IfxPsi5.h

IfxPsi5_ReceiverControlRegister : IfxPsi5.h

IfxPsi5_ReceiverControlRegister_a : IfxPsi5.h

IfxPsi5_ReceiverControlRegister_b : IfxPsi5.h

IfxPsi5_ReceiverControlRegister_c : IfxPsi5.h

IfxPsi5_resetModule() : IfxPsi5.h , IfxPsi5.c

IfxPsi5_RX0A_P00_1_IN : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h

IfxPsi5_RX0B_P02_3_IN : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h

IfxPsi5_RX0C_P33_1_IN : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c

IfxPsi5_RX1A_P00_3_IN : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c

IfxPsi5_RX1B_P02_5_IN : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h

IfxPsi5_RX1C_P33_3_IN : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c

IfxPsi5_RX2A_P00_5_IN : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h

IfxPsi5_RX2B_P02_7_IN : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c

IfxPsi5_RX2C_P33_5_IN : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h

IfxPsi5_RX3A_P13_10_IN : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h

IfxPsi5_RX3B_P13_13_IN : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c

IfxPsi5_RX3C_P10_6_IN : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c

IfxPsi5_Rx_In_pinTable : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c

IfxPsi5_setFractionalDivider() : IfxPsi5.h

IfxPsi5_setInterruptNodePointer() : IfxPsi5.h

IfxPsi5_setReceiveFifoWarningLevel() : IfxPsi5.h

IfxPsi5_setReceiverControl() : IfxPsi5.h

IfxPsi5_setRxInput() : IfxPsi5.h

IfxPsi5_setSleepMode() : IfxPsi5.h

IfxPsi5_setSuspendMode() : IfxPsi5.h

IfxPsi5_SleepMode : IfxPsi5.h

IfxPsi5_SleepMode_disable : IfxPsi5.h

IfxPsi5_SleepMode_enable : IfxPsi5.h

IfxPsi5_Slot : IfxPsi5.h

IfxPsi5_Slot_0 : IfxPsi5.h

IfxPsi5_Slot_1 : IfxPsi5.h

IfxPsi5_Slot_2 : IfxPsi5.h

IfxPsi5_Slot_3 : IfxPsi5.h

IfxPsi5_Slot_4 : IfxPsi5.h

IfxPsi5_Slot_5 : IfxPsi5.h

IFXPSI5_STEP_RANGE : IfxPsi5_cfg.h

IfxPsi5_SuspendMode : IfxPsi5.h

IfxPsi5_SuspendMode_hard : IfxPsi5.h

IfxPsi5_SuspendMode_none : IfxPsi5.h

IfxPsi5_SuspendMode_soft : IfxPsi5.h

IfxPsi5_TimeBase : IfxPsi5.h

IfxPsi5_TimeBase_external : IfxPsi5.h

IfxPsi5_TimeBase_internal : IfxPsi5.h

IfxPsi5_TimestampRegister : IfxPsi5.h

IfxPsi5_TimestampRegister_a : IfxPsi5.h

IfxPsi5_TimestampRegister_b : IfxPsi5.h

IfxPsi5_TimestampRegister_c : IfxPsi5.h

IfxPsi5_Trigger : IfxPsi5.h

IfxPsi5_Trigger_0 : IfxPsi5.h

IfxPsi5_Trigger_1 : IfxPsi5.h

IfxPsi5_Trigger_2 : IfxPsi5.h

IfxPsi5_Trigger_3 : IfxPsi5.h

IfxPsi5_Trigger_4 : IfxPsi5.h

IfxPsi5_Trigger_5 : IfxPsi5.h

IfxPsi5_TriggerOutput : IfxPsi5.h

IfxPsi5_TriggerOutput_0 : IfxPsi5.h

IfxPsi5_TriggerOutput_1 : IfxPsi5.h

IfxPsi5_TriggerOutput_2 : IfxPsi5.h

IfxPsi5_TriggerOutput_3 : IfxPsi5.h

IfxPsi5_TriggerOutput_4 : IfxPsi5.h

IfxPsi5_TriggerOutput_5 : IfxPsi5.h

IfxPsi5_TriggerOutput_6 : IfxPsi5.h

IfxPsi5_TriggerOutput_7 : IfxPsi5.h

IfxPsi5_TriggerType : IfxPsi5.h

IfxPsi5_TriggerType_bypass : IfxPsi5.h

IfxPsi5_TriggerType_external : IfxPsi5.h

IfxPsi5_TriggerType_periodic : IfxPsi5.h

IfxPsi5_TX0_P00_2_OUT : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h

IfxPsi5_TX0_P02_2_OUT : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c

IfxPsi5_TX0_P33_2_OUT : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h

IfxPsi5_TX1_P00_4_OUT : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h

IfxPsi5_TX1_P02_6_OUT : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c

IfxPsi5_TX1_P33_4_OUT : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h

IfxPsi5_TX2_P00_6_OUT : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h

IfxPsi5_TX2_P02_8_OUT : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h

IfxPsi5_TX2_P33_6_OUT : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h

IfxPsi5_TX3_P10_5_OUT : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h

IfxPsi5_TX3_P13_11_OUT : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h

IfxPsi5_TX3_P13_15_OUT : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h

IfxPsi5_Tx_Out_pinTable : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h

IfxPsi5_Verbose : IfxPsi5.h

IfxPsi5_Verbose_off : IfxPsi5.h

IfxPsi5_Verbose_on : IfxPsi5.h

IfxPsi5s_AlternateInput : IfxPsi5s.h

IfxPsi5s_AlternateInput_0 : IfxPsi5s.h

IfxPsi5s_AlternateInput_1 : IfxPsi5s.h

IfxPsi5s_AlternateInput_2 : IfxPsi5s.h

IfxPsi5s_AlternateInput_3 : IfxPsi5s.h

IfxPsi5s_AscBaudratePrescalar : IfxPsi5s.h

IfxPsi5s_AscBaudratePrescalar_divideBy2 : IfxPsi5s.h

IfxPsi5s_AscBaudratePrescalar_divideBy3 : IfxPsi5s.h

IfxPsi5s_AscMode : IfxPsi5s.h

IfxPsi5s_AscMode_async_7bitDataWithParity : IfxPsi5s.h

IfxPsi5s_AscMode_async_8bitData : IfxPsi5s.h

IfxPsi5s_AscMode_async_8bitDataWithParity : IfxPsi5s.h

IfxPsi5s_AscMode_async_8bitDataWithWakeup : IfxPsi5s.h

IfxPsi5s_AscMode_async_9bitData : IfxPsi5s.h

IfxPsi5s_AscMode_sync : IfxPsi5s.h

IfxPsi5s_AscStopBits : IfxPsi5s.h

IfxPsi5s_AscStopBits_1 : IfxPsi5s.h

IfxPsi5s_AscStopBits_2 : IfxPsi5s.h

IFXPSI5S_BAUDRATE_1562500 : IfxPsi5s_cfg.h

IFXPSI5S_BG_RANGE : IfxPsi5s_cfg.h

IfxPsi5s_ChannelId : IfxPsi5s.h

IfxPsi5s_ChannelId_0 : IfxPsi5s.h

IfxPsi5s_ChannelId_1 : IfxPsi5s.h

IfxPsi5s_ChannelId_2 : IfxPsi5s.h

IfxPsi5s_ChannelId_3 : IfxPsi5s.h

IfxPsi5s_ChannelId_4 : IfxPsi5s.h

IfxPsi5s_ChannelId_5 : IfxPsi5s.h

IfxPsi5s_ChannelId_6 : IfxPsi5s.h

IfxPsi5s_ChannelId_7 : IfxPsi5s.h

IfxPsi5s_ChannelId_none : IfxPsi5s.h

IfxPsi5s_clearGlobalInterruptStatus() : IfxPsi5s.h

IfxPsi5s_clearInterruptStatus() : IfxPsi5s.h

IfxPsi5s_clearTimeStampCounterA() : IfxPsi5s.h

IfxPsi5s_clearTimeStampCounterB() : IfxPsi5s.h

IfxPsi5s_Clk_Out_pinTable : IfxPsi5s_PinMap.h , IfxPsi5s_PinMap.c

IfxPsi5s_CLK_P02_4_OUT : IfxPsi5s_PinMap.c , IfxPsi5s_PinMap.h

IfxPsi5s_CLK_P33_10_OUT : IfxPsi5s_PinMap.h , IfxPsi5s_PinMap.c

IfxPsi5s_ClockType : IfxPsi5s.h

IfxPsi5s_ClockType_ascFracDiv : IfxPsi5s.h

IfxPsi5s_ClockType_ascOutput : IfxPsi5s.h

IfxPsi5s_ClockType_fracDiv : IfxPsi5s.h

IfxPsi5s_ClockType_timeStamp : IfxPsi5s.h

IfxPsi5s_CrcOrParity : IfxPsi5s.h

IfxPsi5s_CrcOrParity_crc : IfxPsi5s.h

IfxPsi5s_CrcOrParity_parity : IfxPsi5s.h

IFXPSI5S_DEFAULT_FASTCLOCK_FREQ : IfxPsi5s_cfg.h

IFXPSI5S_DEFAULT_SLOWCLOCK_FREQ : IfxPsi5s_cfg.h

IFXPSI5S_DEFAULT_TIMESTAMP_FREQ : IfxPsi5s_cfg.h

IfxPsi5s_disableAscReceiver() : IfxPsi5s.c , IfxPsi5s.h

IfxPsi5s_disableModule() : IfxPsi5s.h , IfxPsi5s.c

IfxPsi5s_DividerMode : IfxPsi5s.h

IfxPsi5s_DividerMode_fractional : IfxPsi5s.h

IfxPsi5s_DividerMode_normal : IfxPsi5s.h

IfxPsi5s_DividerMode_off : IfxPsi5s.h

IfxPsi5s_DividerMode_spb : IfxPsi5s.h

IFXPSI5S_ENABLE_CHANNEL : IfxPsi5s_cfg.h

IFXPSI5S_ENABLE_CHANNELTRIGGER : IfxPsi5s_cfg.h

IfxPsi5s_enableAscReceiver() : IfxPsi5s.h , IfxPsi5s.c

IfxPsi5s_enableDisableChannels() : IfxPsi5s.h , IfxPsi5s.c

IfxPsi5s_enableDisableChannelTriggerCounters() : IfxPsi5s.h , IfxPsi5s.c

IfxPsi5s_enableGlobalInterrupt() : IfxPsi5s.h

IfxPsi5s_enableInterrupt() : IfxPsi5s.h

IfxPsi5s_EnhancedProtocol : IfxPsi5s.h

IfxPsi5s_EnhancedProtocol_pulseWidth_frameFormat_1to3 : IfxPsi5s.h

IfxPsi5s_EnhancedProtocol_pulseWidth_frameFormat_4 : IfxPsi5s.h

IfxPsi5s_EnhancedProtocol_toothGapMethod : IfxPsi5s.h

IFXPSI5S_FDV_RANGE : IfxPsi5s_cfg.h

IfxPsi5s_fillAscTransmitBuffer() : IfxPsi5s.h

IfxPsi5s_FrameId : IfxPsi5s.h

IfxPsi5s_FrameId_frameHeader : IfxPsi5s.h

IfxPsi5s_FrameId_rollingNumber : IfxPsi5s.h

IFXPSI5S_GCR_CHANNEL_TRIGGER_COUNTERS_ENABLE_MASK : IfxPsi5s_cfg.h

IFXPSI5S_GCR_CHANNELS_ENABLE_MASK : IfxPsi5s_cfg.h

IfxPsi5s_getBaudrate() : IfxPsi5s.c , IfxPsi5s.h

IfxPsi5s_getGlobalInterruptStatus() : IfxPsi5s.h

IfxPsi5s_getInterruptStatus() : IfxPsi5s.h

IfxPsi5s_getReadFrameStatus() : IfxPsi5s.c , IfxPsi5s.h

IfxPsi5s_getReceiveBuffer() : IfxPsi5s.h

IfxPsi5s_getReceiveInterruptStatus() : IfxPsi5s.h

IfxPsi5s_getSrcAddress() : IfxPsi5s.h , IfxPsi5s.c

IfxPsi5s_getSuccessfullyReceivedFrameStatus() : IfxPsi5s.c , IfxPsi5s.h

IfxPsi5s_getTransmitInterruptStatus() : IfxPsi5s.h

IfxPsi5s_GlobalInterruptSource : IfxPsi5s.h

IfxPsi5s_GlobalInterruptSource_eir : IfxPsi5s.h

IfxPsi5s_GlobalInterruptSource_foi : IfxPsi5s.h

IfxPsi5s_GlobalInterruptSource_rir : IfxPsi5s.h

IfxPsi5s_GlobalInterruptSource_tbir : IfxPsi5s.h

IfxPsi5s_GlobalInterruptSource_tir : IfxPsi5s.h

IfxPsi5s_GlobalInterruptSource_xcrci : IfxPsi5s.h

IfxPsi5s_IdleTime : IfxPsi5s.h

IfxPsi5s_IdleTime_1 : IfxPsi5s.h

IfxPsi5s_IdleTime_10 : IfxPsi5s.h

IfxPsi5s_IdleTime_11 : IfxPsi5s.h

IfxPsi5s_IdleTime_12 : IfxPsi5s.h

IfxPsi5s_IdleTime_13 : IfxPsi5s.h

IfxPsi5s_IdleTime_14 : IfxPsi5s.h

IfxPsi5s_IdleTime_15 : IfxPsi5s.h

IfxPsi5s_IdleTime_16 : IfxPsi5s.h

IfxPsi5s_IdleTime_2 : IfxPsi5s.h

IfxPsi5s_IdleTime_3 : IfxPsi5s.h

IfxPsi5s_IdleTime_4 : IfxPsi5s.h

IfxPsi5s_IdleTime_5 : IfxPsi5s.h

IfxPsi5s_IdleTime_6 : IfxPsi5s.h

IfxPsi5s_IdleTime_7 : IfxPsi5s.h

IfxPsi5s_IdleTime_8 : IfxPsi5s.h

IfxPsi5s_IdleTime_9 : IfxPsi5s.h

IfxPsi5s_initClkPin() : IfxPsi5s.h

IfxPsi5s_initRxPin() : IfxPsi5s.h

IfxPsi5s_initTxPin() : IfxPsi5s.h

IfxPsi5s_InterruptRequest : IfxPsi5s.h

IfxPsi5s_InterruptRequest_disabled : IfxPsi5s.h

IfxPsi5s_InterruptRequest_enabled : IfxPsi5s.h

IfxPsi5s_InterruptSource : IfxPsi5s.h

IfxPsi5s_InterruptSource_chci : IfxPsi5s.h

IfxPsi5s_InterruptSource_crci : IfxPsi5s.h

IfxPsi5s_InterruptSource_hdi : IfxPsi5s.h

IfxPsi5s_InterruptSource_rbi : IfxPsi5s.h

IfxPsi5s_InterruptSource_rdi : IfxPsi5s.h

IfxPsi5s_InterruptSource_rsi : IfxPsi5s.h

IfxPsi5s_InterruptSource_tei : IfxPsi5s.h

IfxPsi5s_InterruptSource_tpi : IfxPsi5s.h

IfxPsi5s_InterruptSource_tpoi : IfxPsi5s.h

IfxPsi5s_isModuleSuspended() : IfxPsi5s.h

IfxPsi5s_LoopBackMode : IfxPsi5s.h

IfxPsi5s_LoopBackMode_disable : IfxPsi5s.h

IfxPsi5s_LoopBackMode_enable : IfxPsi5s.h

IfxPsi5s_MessagingBits : IfxPsi5s.h

IfxPsi5s_MessagingBits_absent : IfxPsi5s.h

IfxPsi5s_MessagingBits_present : IfxPsi5s.h

IFXPSI5S_NUM_CHANNELS : IfxPsi5s_cfg.h

IFXPSI5S_NUM_MODULES : IfxPsi5s_cfg.h

IFXPSI5S_NUM_SLOTS : IfxPsi5s_cfg.h

IFXPSI5S_NUM_WDTS : IfxPsi5s_cfg.h

IfxPsi5s_NumberExpectedFrames : IfxPsi5s.h

IfxPsi5s_NumberExpectedFrames_1 : IfxPsi5s.h

IfxPsi5s_NumberExpectedFrames_2 : IfxPsi5s.h

IfxPsi5s_NumberExpectedFrames_3 : IfxPsi5s.h

IfxPsi5s_NumberExpectedFrames_4 : IfxPsi5s.h

IfxPsi5s_NumberExpectedFrames_5 : IfxPsi5s.h

IfxPsi5s_NumberExpectedFrames_6 : IfxPsi5s.h

IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS : IfxPsi5s_PinMap.h

IFXPSI5S_PINMAP_NUM_MODULES : IfxPsi5s_PinMap.h

IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS : IfxPsi5s_PinMap.h

IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS : IfxPsi5s_PinMap.h

IfxPsi5s_Psi5s_deInitModule() : IfxPsi5s_Psi5s.h , IfxPsi5s_Psi5s.c

IfxPsi5s_Psi5s_enableAscReceiver() : IfxPsi5s_Psi5s.h

IfxPsi5s_Psi5s_enableDisableChannels() : IfxPsi5s_Psi5s.h

IfxPsi5s_Psi5s_enableDisableChannelTriggerCounters() : IfxPsi5s_Psi5s.h

IfxPsi5s_Psi5s_enableModule() : IfxPsi5s_Psi5s.h , IfxPsi5s_Psi5s.c

IfxPsi5s_Psi5s_getBaudrate() : IfxPsi5s_Psi5s.c , IfxPsi5s_Psi5s.h

IfxPsi5s_Psi5s_getFracDivClock() : IfxPsi5s_Psi5s.c

IfxPsi5s_Psi5s_getReadFrameStatus() : IfxPsi5s_Psi5s.h

IfxPsi5s_Psi5s_initChannel() : IfxPsi5s_Psi5s.c , IfxPsi5s_Psi5s.h

IfxPsi5s_Psi5s_initChannelConfig() : IfxPsi5s_Psi5s.h , IfxPsi5s_Psi5s.c

IfxPsi5s_Psi5s_initializeClock() : IfxPsi5s_Psi5s.c

IfxPsi5s_Psi5s_initModule() : IfxPsi5s_Psi5s.h , IfxPsi5s_Psi5s.c

IfxPsi5s_Psi5s_initModuleConfig() : IfxPsi5s_Psi5s.h , IfxPsi5s_Psi5s.c

IfxPsi5s_Psi5s_readFrame() : IfxPsi5s_Psi5s.h , IfxPsi5s_Psi5s.c

IfxPsi5s_Psi5s_resetModule() : IfxPsi5s_Psi5s.h , IfxPsi5s_Psi5s.c

IfxPsi5s_Psi5s_sendChannelData() : IfxPsi5s_Psi5s.c , IfxPsi5s_Psi5s.h

IfxPsi5s_Psi5s_setBaudrate() : IfxPsi5s_Psi5s.c

IfxPsi5s_Psi5s_startAscTransactions() : IfxPsi5s_Psi5s.h

IfxPsi5s_resetModule() : IfxPsi5s.h , IfxPsi5s.c

IfxPsi5s_Rx_In_pinTable : IfxPsi5s_PinMap.c , IfxPsi5s_PinMap.h

IfxPsi5s_RXA_P00_3_IN : IfxPsi5s_PinMap.h , IfxPsi5s_PinMap.c

IfxPsi5s_RXB_P02_5_IN : IfxPsi5s_PinMap.h , IfxPsi5s_PinMap.c

IfxPsi5s_RXC_P33_5_IN : IfxPsi5s_PinMap.c , IfxPsi5s_PinMap.h

IfxPsi5s_setGlobalInterruptNodePointer() : IfxPsi5s.h

IfxPsi5s_setInterruptNodePointer() : IfxPsi5s.h

IfxPsi5s_setLoopBackMode() : IfxPsi5s.h

IfxPsi5s_setRxInput() : IfxPsi5s.h

IfxPsi5s_setSleepMode() : IfxPsi5s.h

IfxPsi5s_setSuspendMode() : IfxPsi5s.h

IfxPsi5s_setTimeStampCounterA() : IfxPsi5s.h

IfxPsi5s_setTimeStampCounterB() : IfxPsi5s.h

IfxPsi5s_SleepMode : IfxPsi5s.h

IfxPsi5s_SleepMode_disable : IfxPsi5s.h

IfxPsi5s_SleepMode_enable : IfxPsi5s.h

IfxPsi5s_startAscTransactions() : IfxPsi5s.c , IfxPsi5s.h

IFXPSI5S_STEP_RANGE : IfxPsi5s_cfg.h

IfxPsi5s_stopAscTransactions() : IfxPsi5s.h , IfxPsi5s.c

IfxPsi5s_SuspendMode : IfxPsi5s.h

IfxPsi5s_SuspendMode_hard : IfxPsi5s.h

IfxPsi5s_SuspendMode_none : IfxPsi5s.h

IfxPsi5s_SuspendMode_soft : IfxPsi5s.h

IfxPsi5s_TimeBase : IfxPsi5s.h

IfxPsi5s_TimeBase_external : IfxPsi5s.h

IfxPsi5s_TimeBase_internal : IfxPsi5s.h

IfxPsi5s_TimeStampCount : IfxPsi5s.h

IfxPsi5s_TimeStampCount_started : IfxPsi5s.h

IfxPsi5s_TimeStampCount_stopped : IfxPsi5s.h

IfxPsi5s_TimestampRegister : IfxPsi5s.h

IfxPsi5s_TimestampRegister_a : IfxPsi5s.h

IfxPsi5s_TimestampRegister_b : IfxPsi5s.h

IfxPsi5s_TimestampTrigger : IfxPsi5s.h

IfxPsi5s_TimestampTrigger_frame : IfxPsi5s.h

IfxPsi5s_TimestampTrigger_syncPulse : IfxPsi5s.h

IfxPsi5s_Trigger : IfxPsi5s.h

IfxPsi5s_Trigger_0 : IfxPsi5s.h

IfxPsi5s_Trigger_1 : IfxPsi5s.h

IfxPsi5s_Trigger_2 : IfxPsi5s.h

IfxPsi5s_Trigger_3 : IfxPsi5s.h

IfxPsi5s_Trigger_4 : IfxPsi5s.h

IfxPsi5s_Trigger_5 : IfxPsi5s.h

IfxPsi5s_Trigger_6 : IfxPsi5s.h

IfxPsi5s_Trigger_7 : IfxPsi5s.h

IfxPsi5s_TriggerOutput : IfxPsi5s.h

IfxPsi5s_TriggerOutput_0 : IfxPsi5s.h

IfxPsi5s_TriggerOutput_1 : IfxPsi5s.h

IfxPsi5s_TriggerOutput_2 : IfxPsi5s.h

IfxPsi5s_TriggerOutput_3 : IfxPsi5s.h

IfxPsi5s_TriggerOutput_4 : IfxPsi5s.h

IfxPsi5s_TriggerOutput_5 : IfxPsi5s.h

IfxPsi5s_TriggerOutput_6 : IfxPsi5s.h

IfxPsi5s_TriggerOutput_7 : IfxPsi5s.h

IfxPsi5s_TriggerType : IfxPsi5s.h

IfxPsi5s_TriggerType_external : IfxPsi5s.h

IfxPsi5s_TriggerType_periodic : IfxPsi5s.h

IfxPsi5s_Tx_Out_pinTable : IfxPsi5s_PinMap.c , IfxPsi5s_PinMap.h

IfxPsi5s_TX_P00_4_OUT : IfxPsi5s_PinMap.c , IfxPsi5s_PinMap.h

IfxPsi5s_TX_P02_6_OUT : IfxPsi5s_PinMap.h , IfxPsi5s_PinMap.c

IfxPsi5s_TX_P33_6_OUT : IfxPsi5s_PinMap.h , IfxPsi5s_PinMap.c

IfxPsi5s_UartFrameCount : IfxPsi5s.h

IfxPsi5s_UartFrameCount_3 : IfxPsi5s.h

IfxPsi5s_UartFrameCount_4 : IfxPsi5s.h

IfxPsi5s_UartFrameCount_5 : IfxPsi5s.h

IfxPsi5s_UartFrameCount_6 : IfxPsi5s.h

IfxPsi5s_WatchdogTimerMode : IfxPsi5s.h

IfxPsi5s_WatchdogTimerMode_frame : IfxPsi5s.h

IfxPsi5s_WatchdogTimerMode_syncPulse : IfxPsi5s.h

IfxQspi0_MRST_P20_12_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi0_MRST_P22_6_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi0_MRST_P22_9_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi0_MRSTA_P20_12_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi0_MRSTB_P22_9_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi0_MRSTC_P22_6_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi0_MTSR_P20_12_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi0_MTSR_P20_14_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi0_MTSR_P22_10_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi0_MTSR_P22_5_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi0_MTSRA_P20_14_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi0_MTSRB_P22_10_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi0_MTSRC_P22_5_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi0_SCLK_P20_11_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi0_SCLK_P20_13_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi0_SCLK_P22_7_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi0_SCLK_P22_8_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi0_SCLKA_P20_11_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi0_SCLKB_P22_8_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi0_SCLKC_P22_7_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi0_SLSIA_P20_13_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi0_SLSIB_P20_9_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi0_SLSO0_P20_8_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi0_SLSO10_P22_11_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi0_SLSO11_P23_6_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi0_SLSO12_P22_4_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi0_SLSO13_P15_0_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi0_SLSO1_P20_9_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi0_SLSO2_P20_13_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi0_SLSO3_P11_10_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi0_SLSO4_P11_11_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi0_SLSO5_P11_2_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi0_SLSO6_P20_10_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi0_SLSO7_P33_5_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi0_SLSO8_P20_6_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi0_SLSO9_P20_3_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi1_MRST_P10_1_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi1_MRST_P10_6_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi1_MRST_P11_3_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi1_MRSTA_P10_1_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi1_MRSTB_P11_3_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi1_MTSR_P10_1_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi1_MTSR_P10_3_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi1_MTSR_P10_4_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi1_MTSR_P11_9_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi1_MTSRA_P10_3_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi1_MTSRB_P11_9_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi1_MTSRC_P10_4_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi1_SCLK_P10_2_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi1_SCLK_P11_6_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi1_SCLKA_P10_2_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi1_SCLKB_P11_6_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi1_SLSIA_P11_10_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi1_SLSO0_P20_8_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi1_SLSO10_P10_0_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi1_SLSO1_P20_9_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi1_SLSO2_P20_13_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi1_SLSO3_P11_10_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi1_SLSO4_P11_11_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi1_SLSO5_P11_2_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi1_SLSO6_P33_10_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi1_SLSO7_P33_5_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi1_SLSO8_P10_4_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi1_SLSO9_P10_5_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi2_MRST_P15_4_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi2_MRST_P15_7_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi2_MRST_P34_4_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi2_MRSTA_P15_4_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi2_MRSTB_P15_7_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi2_MRSTCN_P21_2_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi2_MRSTCP_P21_3_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi2_MRSTD_P34_4_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi2_MRSTE_P15_2_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi2_MRSTFN_P14_9_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi2_MRSTFP_P14_10_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi2_MTSR_P15_5_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi2_MTSR_P15_6_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi2_MTSR_P34_5_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi2_MTSRA_P15_5_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi2_MTSRB_P15_6_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi2_MTSRD_P34_5_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi2_MTSRN_P13_2_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi2_MTSRP_P13_3_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi2_SCLK_P15_3_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi2_SCLK_P15_6_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi2_SCLK_P15_8_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi2_SCLK_P33_14_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi2_SCLK_P33_1_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi2_SCLKA_P15_3_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi2_SCLKB_P15_8_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi2_SCLKD_P33_14_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi2_SCLKN_P13_0_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi2_SCLKP_P13_1_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi2_SLSIA_P15_2_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi2_SLSIB_P15_1_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi2_SLSO0_P15_2_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi2_SLSO10_P33_2_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi2_SLSO10_P34_3_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi2_SLSO11_P33_15_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi2_SLSO11_P33_6_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi2_SLSO12_P32_6_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi2_SLSO12_P33_4_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi2_SLSO1_P14_2_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi2_SLSO2_P14_6_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi2_SLSO3_P14_3_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi2_SLSO4_P14_7_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi2_SLSO5_P15_1_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi2_SLSO6_P33_13_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi2_SLSO7_P20_10_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi2_SLSO8_P20_6_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi2_SLSO9_P20_3_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi3_MRST_P01_5_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_MRST_P02_5_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_MRST_P10_7_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi3_MRSTA_P02_5_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_MRSTB_P10_7_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi3_MRSTC_P01_5_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_MTSR_P01_6_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_MTSR_P02_6_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_MTSR_P10_6_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_MTSRA_P02_6_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi3_MTSRB_P10_6_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi3_MTSRC_P01_6_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_SCLK_P01_7_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_SCLK_P02_7_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi3_SCLK_P10_8_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi3_SCLKA_P02_7_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_SCLKB_P10_8_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_SCLKC_P01_7_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_SLSIA_P02_4_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi3_SLSIB_P01_3_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_SLSO0_P02_4_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi3_SLSO10_P01_4_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi3_SLSO1_P02_0_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_SLSO2_P02_1_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi3_SLSO3_P00_5_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_SLSO3_P02_2_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi3_SLSO4_P00_2_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi3_SLSO4_P02_3_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_SLSO5_P02_12_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_SLSO5_P02_8_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi3_SLSO6_P00_8_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_SLSO6_P02_15_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi3_SLSO7_P00_9_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_SLSO7_P02_13_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi3_SLSO8_P10_5_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_SLSO9_P01_3_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi4_MRST_P22_1_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi4_MRST_P33_13_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi4_MRSTA_P33_13_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi4_MRSTB_P22_1_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi4_MRSTCN_P21_2_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi4_MRSTCP_P21_3_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi4_MRSTDN_P21_0_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi4_MRSTDP_P21_1_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi4_MTSR_P22_0_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi4_MTSR_P33_12_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi4_MTSRA_P33_12_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi4_MTSRB_P22_0_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi4_MTSRN_P22_2_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi4_MTSRP_P22_3_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi4_SCLK_P22_3_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi4_SCLK_P33_11_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi4_SCLKA_P33_11_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi4_SCLKB_P22_3_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi4_SCLKN_P22_0_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi4_SCLKP_P22_1_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi4_SLSIA_P33_10_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi4_SLSIB_P22_2_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi4_SLSO0_P33_10_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi4_SLSO1_P33_9_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi4_SLSO2_P33_3_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi4_SLSO2_P33_8_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi4_SLSO3_P22_2_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi4_SLSO4_P02_12_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi4_SLSO4_P23_5_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi4_SLSO5_P02_15_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi4_SLSO5_P23_4_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi4_SLSO6_P02_13_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi4_SLSO6_P23_1_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi4_SLSO7_P02_1_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi4_SLSO7_P33_7_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IFXQSPI_BACONSIZE : IfxQspi.h

IfxQspi_calcRealBaudrate() : IfxQspi.c , IfxQspi.h

IfxQspi_calculateBasicConfigurationValue() : IfxQspi.h , IfxQspi.c

IfxQspi_calculateDelayConstants() : IfxQspi.c , IfxQspi.h

IfxQspi_calculateExtendedConfigurationValue() : IfxQspi.c , IfxQspi.h

IfxQspi_calculatePrescaler() : IfxQspi.c , IfxQspi.h

IfxQspi_calculateTimeQuantumLength() : IfxQspi.h , IfxQspi.c

IfxQspi_cfg_indexMap : IfxQspi_cfg.c , IfxQspi_cfg.h

IfxQspi_ChannelId : IfxQspi.h

IfxQspi_ChannelId_0 : IfxQspi.h

IfxQspi_ChannelId_1 : IfxQspi.h

IfxQspi_ChannelId_10 : IfxQspi.h

IfxQspi_ChannelId_11 : IfxQspi.h

IfxQspi_ChannelId_12 : IfxQspi.h

IfxQspi_ChannelId_13 : IfxQspi.h

IfxQspi_ChannelId_14 : IfxQspi.h

IfxQspi_ChannelId_2 : IfxQspi.h

IfxQspi_ChannelId_3 : IfxQspi.h

IfxQspi_ChannelId_4 : IfxQspi.h

IfxQspi_ChannelId_5 : IfxQspi.h

IfxQspi_ChannelId_6 : IfxQspi.h

IfxQspi_ChannelId_7 : IfxQspi.h

IfxQspi_ChannelId_8 : IfxQspi.h

IfxQspi_ChannelId_9 : IfxQspi.h

IfxQspi_clearAllEventFlags() : IfxQspi.h

IfxQspi_clearMoveCounterInterruptAfterLastFlag() : IfxQspi.h

IfxQspi_clearMoveCounterInterruptBeforeLastFlag() : IfxQspi.h

IfxQspi_clearRxReq() : IfxQspi.h

IfxQspi_clearTxReq() : IfxQspi.h

IfxQspi_configPT1Event() : IfxQspi.h

IfxQspi_configPT2Event() : IfxQspi.h

IfxQspi_DataLengthUnit : IfxQspi.h

IfxQspi_DataLengthUnit_bit : IfxQspi.h

IfxQspi_DataLengthUnit_byte : IfxQspi.h

IfxQspi_enableLoopbackMode() : IfxQspi.h

IfxQspi_enablePT1Event() : IfxQspi.h

IfxQspi_enablePT2Event() : IfxQspi.h

IfxQspi_enableUsrEvent() : IfxQspi.h

IfxQspi_Error : IfxQspi.h

IfxQspi_Error_baudrate : IfxQspi.h

IfxQspi_Error_configuration : IfxQspi.h

IfxQspi_Error_expectTimeout : IfxQspi.h

IfxQspi_Error_none : IfxQspi.h

IfxQspi_Error_parity : IfxQspi.h

IfxQspi_Error_rxfifoOverflow : IfxQspi.h

IfxQspi_Error_rxfifoUnderflow : IfxQspi.h

IfxQspi_Error_slsiMisplacedInactivation : IfxQspi.h

IfxQspi_Error_txfifoOverflow : IfxQspi.h

IfxQspi_Error_txfifoUnderflow : IfxQspi.h

IFXQSPI_ERRORENABLEMASK : IfxQspi.h

IfxQspi_ExpectTimeout : IfxQspi.h

IfxQspi_ExpectTimeout_1024 : IfxQspi.h

IfxQspi_ExpectTimeout_1048576 : IfxQspi.h

IfxQspi_ExpectTimeout_128 : IfxQspi.h

IfxQspi_ExpectTimeout_131072 : IfxQspi.h

IfxQspi_ExpectTimeout_16384 : IfxQspi.h

IfxQspi_ExpectTimeout_2048 : IfxQspi.h

IfxQspi_ExpectTimeout_2097152 : IfxQspi.h

IfxQspi_ExpectTimeout_256 : IfxQspi.h

IfxQspi_ExpectTimeout_262144 : IfxQspi.h

IfxQspi_ExpectTimeout_32768 : IfxQspi.h

IfxQspi_ExpectTimeout_4096 : IfxQspi.h

IfxQspi_ExpectTimeout_512 : IfxQspi.h

IfxQspi_ExpectTimeout_524288 : IfxQspi.h

IfxQspi_ExpectTimeout_64 : IfxQspi.h

IfxQspi_ExpectTimeout_65536 : IfxQspi.h

IfxQspi_ExpectTimeout_8192 : IfxQspi.h

IFXQSPI_FIFO32BITSIZE : IfxQspi.h

IfxQspi_FifoMode : IfxQspi.h

IfxQspi_FifoMode_batchMove : IfxQspi.h

IfxQspi_FifoMode_combinedMove : IfxQspi.h

IfxQspi_FifoMode_singleMove : IfxQspi.h

IfxQspi_getAddress() : IfxQspi.h , IfxQspi.c

IfxQspi_getErrorFlags() : IfxQspi.h

IfxQspi_getErrorSrc() : IfxQspi.h

IfxQspi_getIndex() : IfxQspi.c , IfxQspi.h

IFXQSPI_GETLONGMODEFIFOSIZE : IfxQspi.h

IfxQspi_getMode() : IfxQspi.h

IfxQspi_getModuleFrequency() : IfxQspi.h

IfxQspi_getPhase() : IfxQspi.h

IfxQspi_getReceiveFifoLevel() : IfxQspi.h

IfxQspi_getReceiveSrc() : IfxQspi.h

IfxQspi_getRxFifoMode() : IfxQspi.h

IfxQspi_getTimeQuantaFrequency() : IfxQspi.h

IfxQspi_getTransmitFifoLevel() : IfxQspi.h

IfxQspi_getTransmitSrc() : IfxQspi.h

IfxQspi_getTxFifoMode() : IfxQspi.h

IFXQSPI_HWFIFO_DEPTH : IfxQspi_cfg.h

IfxQspi_Index : IfxQspi_cfg.h

IfxQspi_Index_0 : IfxQspi_cfg.h

IfxQspi_Index_1 : IfxQspi_cfg.h

IfxQspi_Index_2 : IfxQspi_cfg.h

IfxQspi_Index_3 : IfxQspi_cfg.h

IfxQspi_Index_4 : IfxQspi_cfg.h

IfxQspi_Index_none : IfxQspi_cfg.h

IfxQspi_initMrstInPin() : IfxQspi.h

IfxQspi_initMrstInPinWithPadLevel() : IfxQspi.h

IfxQspi_initMrstOutPin() : IfxQspi.h

IfxQspi_initMtsrInPin() : IfxQspi.h

IfxQspi_initMtsrInPinWithPadLevel() : IfxQspi.h

IfxQspi_initMtsrOutPin() : IfxQspi.h

IfxQspi_initSclkInPin() : IfxQspi.h

IfxQspi_initSclkInPinWithPadLevel() : IfxQspi.h

IfxQspi_initSclkOutPin() : IfxQspi.h

IfxQspi_initSlsi() : IfxQspi.h

IfxQspi_initSlsiWithPadLevel() : IfxQspi.h

IfxQspi_initSlso() : IfxQspi.h

IfxQspi_isModuleEnabled() : IfxQspi.h

IfxQspi_isModuleSuspended() : IfxQspi.h

IfxQspi_Mode : IfxQspi.h

IfxQspi_Mode_master : IfxQspi.h

IfxQspi_Mode_pwmOverQspi : IfxQspi.h

IfxQspi_Mode_slave : IfxQspi.h

IfxQspi_Mrst_In_pinTable : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi_Mrst_Out_pinTable : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi_Mtsr_In_pinTable : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi_Mtsr_Out_pinTable : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IFXQSPI_NUM_CHANNELS : IfxQspi_cfg.h

IFXQSPI_NUM_MODULES : IfxQspi_cfg.h

IfxQspi_pause() : IfxQspi.h

IfxQspi_PauseRunTransition : IfxQspi.h

IfxQspi_PauseRunTransition_pause : IfxQspi.h

IfxQspi_PauseRunTransition_run : IfxQspi.h

IfxQspi_permutateBigEndian() : IfxQspi.h

IfxQspi_Phase : IfxQspi.h

IfxQspi_Phase_data : IfxQspi.h

IfxQspi_Phase_expect : IfxQspi.h

IfxQspi_Phase_idleA : IfxQspi.h

IfxQspi_Phase_idleB : IfxQspi.h

IfxQspi_Phase_lead : IfxQspi.h

IfxQspi_Phase_leadStrobe : IfxQspi.h

IfxQspi_Phase_trail : IfxQspi.h

IfxQspi_Phase_trailStrobe : IfxQspi.h

IfxQspi_Phase_wait : IfxQspi.h

IfxQspi_PhaseTransitionEvent : IfxQspi.h

IfxQspi_PhaseTransitionEvent_dataNotAvailable : IfxQspi.h

IfxQspi_PhaseTransitionEvent_endOfExpect : IfxQspi.h

IfxQspi_PhaseTransitionEvent_endOfFrame : IfxQspi.h

IfxQspi_PhaseTransitionEvent_endOfWait : IfxQspi.h

IfxQspi_PhaseTransitionEvent_receiveBufferFilled : IfxQspi.h

IfxQspi_PhaseTransitionEvent_serialClockPolarityChange : IfxQspi.h

IfxQspi_PhaseTransitionEvent_startOfFrame : IfxQspi.h

IfxQspi_PhaseTransitionEvent_transmitBufferEmptied : IfxQspi.h

IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS : IfxQspi_PinMap.h

IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS : IfxQspi_PinMap.h

IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS : IfxQspi_PinMap.h

IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS : IfxQspi_PinMap.h

IFXQSPI_PINMAP_NUM_MODULES : IfxQspi_PinMap.h

IFXQSPI_PINMAP_NUM_SLAVESELECTS : IfxQspi_PinMap.h

IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS : IfxQspi_PinMap.h

IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS : IfxQspi_PinMap.h

IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS : IfxQspi_PinMap.h

IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS : IfxQspi_PinMap.h

IfxQspi_read16() : IfxQspi.h , IfxQspi.c

IfxQspi_read32() : IfxQspi.c , IfxQspi.h

IfxQspi_read8() : IfxQspi.h , IfxQspi.c

IfxQspi_readReceiveFifo() : IfxQspi.h

IfxQspi_recalcBasicConfiguration() : IfxQspi.c , IfxQspi.h

IfxQspi_requestReset() : IfxQspi.h

IfxQspi_Reset : IfxQspi.h

IfxQspi_Reset_kernel : IfxQspi.h

IfxQspi_Reset_none : IfxQspi.h

IfxQspi_Reset_registers : IfxQspi.h

IfxQspi_Reset_stateMachineAndFifo : IfxQspi.h

IfxQspi_resetModule() : IfxQspi.c , IfxQspi.h

IfxQspi_run() : IfxQspi.h

IfxQspi_RxFifoInt : IfxQspi.h

IfxQspi_RxFifoInt_0 : IfxQspi.h

IfxQspi_RxFifoInt_1 : IfxQspi.h

IfxQspi_RxFifoInt_2 : IfxQspi.h

IfxQspi_RxFifoInt_3 : IfxQspi.h

IfxQspi_Sclk_In_pinTable : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi_Sclk_Out_pinTable : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi_setBitsegment1() : IfxQspi.h

IfxQspi_setBitsegment2() : IfxQspi.h

IfxQspi_setBitsegment3() : IfxQspi.h

IfxQspi_setDisableModuleRequest() : IfxQspi.h

IfxQspi_setEnableModuleRequest() : IfxQspi.h

IfxQspi_setMoveCounterInterruptAfterLastEnabled() : IfxQspi.h

IfxQspi_setMoveCounterInterruptAfterLastFlag() : IfxQspi.h

IfxQspi_setMoveCounterInterruptBeforeLastEnabled() : IfxQspi.h

IfxQspi_setMoveCounterInterruptBeforeLastFlag() : IfxQspi.h

IfxQspi_setMoveCounterPrescalerTrailingDelay() : IfxQspi.h

IfxQspi_setReceiveFifoInterrruptThreshold() : IfxQspi.h

IfxQspi_setRxFifoMode() : IfxQspi.h

IfxQspi_setSlaveSelectOutputControl() : IfxQspi.c , IfxQspi.h

IfxQspi_setSleepMode() : IfxQspi.h

IfxQspi_setSuspendMode() : IfxQspi.h

IfxQspi_setTimeQuantum() : IfxQspi.h

IfxQspi_setTransmitFifoInterrruptThreshold() : IfxQspi.h

IfxQspi_setTxFifoMode() : IfxQspi.h

IfxQspi_SleepMode : IfxQspi.h

IfxQspi_SleepMode_disable : IfxQspi.h

IfxQspi_SleepMode_enable : IfxQspi.h

IfxQspi_Slsi_In_pinTable : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi_Slso_Out_pinTable : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi_SpiMaster_activateSlso() : IfxQspi_SpiMaster.c

IfxQspi_SpiMaster_activeChannel() : IfxQspi_SpiMaster.c

IfxQspi_SpiMaster_AutoSlso : IfxQspi_SpiMaster.h

IfxQspi_SpiMaster_Channel : IfxQspi_SpiMaster.h

IfxQspi_SpiMaster_ChannelBasedCs : IfxQspi_SpiMaster.h

IfxQspi_SpiMaster_ChannelBasedCs_disabled : IfxQspi_SpiMaster.h

IfxQspi_SpiMaster_ChannelBasedCs_enabled : IfxQspi_SpiMaster.h

IfxQspi_SpiMaster_deactivateSlso() : IfxQspi_SpiMaster.c

IfxQspi_SpiMaster_exchange() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h

IfxQspi_SpiMaster_getChannelConfig() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h

IfxQspi_SpiMaster_getStatus() : IfxQspi_SpiMaster.h , IfxQspi_SpiMaster.c

IfxQspi_SpiMaster_initChannel() : IfxQspi_SpiMaster.h , IfxQspi_SpiMaster.c

IfxQspi_SpiMaster_initChannelConfig() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h

IfxQspi_SpiMaster_initModule() : IfxQspi_SpiMaster.h , IfxQspi_SpiMaster.c

IfxQspi_SpiMaster_initModuleConfig() : IfxQspi_SpiMaster.h , IfxQspi_SpiMaster.c

IfxQspi_SpiMaster_isrDmaReceive() : IfxQspi_SpiMaster.h , IfxQspi_SpiMaster.c

IfxQspi_SpiMaster_isrDmaTransmit() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h

IfxQspi_SpiMaster_isrError() : IfxQspi_SpiMaster.h , IfxQspi_SpiMaster.c

IfxQspi_SpiMaster_isrPhaseTransition() : IfxQspi_SpiMaster.h , IfxQspi_SpiMaster.c

IfxQspi_SpiMaster_isrReceive() : IfxQspi_SpiMaster.h , IfxQspi_SpiMaster.c

IfxQspi_SpiMaster_isrTransmit() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h

IfxQspi_SpiMaster_isrUserDefined() : IfxQspi_SpiMaster.h , IfxQspi_SpiMaster.c

IfxQspi_SpiMaster_lock() : IfxQspi_SpiMaster.c

IfxQspi_SpiMaster_Mode : IfxQspi_SpiMaster.h

IfxQspi_SpiMaster_Mode_long : IfxQspi_SpiMaster.h

IfxQspi_SpiMaster_Mode_longContinuous : IfxQspi_SpiMaster.h

IfxQspi_SpiMaster_Mode_short : IfxQspi_SpiMaster.h

IfxQspi_SpiMaster_Mode_shortContinuous : IfxQspi_SpiMaster.h

IfxQspi_SpiMaster_Mode_xxl : IfxQspi_SpiMaster.h

IfxQspi_SpiMaster_moveCounterControlConfiguration() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h

IfxQspi_SpiMaster_packLongModeBuffer() : IfxQspi_SpiMaster.h , IfxQspi_SpiMaster.c

IfxQspi_SpiMaster_read() : IfxQspi_SpiMaster.c

IfxQspi_SpiMaster_readReceiveFifo() : IfxQspi_SpiMaster.h

IfxQspi_SpiMaster_setChannelBaudrate() : IfxQspi_SpiMaster.h , IfxQspi_SpiMaster.c

IfxQspi_SpiMaster_unlock() : IfxQspi_SpiMaster.c

IfxQspi_SpiMaster_write() : IfxQspi_SpiMaster.c

IfxQspi_SpiMaster_writeBasicConfiguration() : IfxQspi_SpiMaster.h

IfxQspi_SpiMaster_writeExtendedConfiguration() : IfxQspi_SpiMaster.h

IfxQspi_SpiMaster_writeLong() : IfxQspi_SpiMaster.c

IfxQspi_SpiMaster_writeMixedDataConfiguration() : IfxQspi_SpiMaster.h

IfxQspi_SpiMaster_writeTransmitFifo() : IfxQspi_SpiMaster.h

IfxQspi_SpiSlave_dummyRxValue : IfxQspi_SpiSlave.c

IfxQspi_SpiSlave_dummyTxValue : IfxQspi_SpiSlave.c

IfxQspi_SpiSlave_exchange() : IfxQspi_SpiSlave.h , IfxQspi_SpiSlave.c

IfxQspi_SpiSlave_getStatus() : IfxQspi_SpiSlave.h , IfxQspi_SpiSlave.c

IfxQspi_SpiSlave_initModule() : IfxQspi_SpiSlave.h , IfxQspi_SpiSlave.c

IfxQspi_SpiSlave_initModuleConfig() : IfxQspi_SpiSlave.c , IfxQspi_SpiSlave.h

IfxQspi_SpiSlave_isrDmaReceive() : IfxQspi_SpiSlave.c , IfxQspi_SpiSlave.h

IfxQspi_SpiSlave_isrDmaTransmit() : IfxQspi_SpiSlave.h , IfxQspi_SpiSlave.c

IfxQspi_SpiSlave_isrError() : IfxQspi_SpiSlave.h , IfxQspi_SpiSlave.c

IfxQspi_SpiSlave_isrReceive() : IfxQspi_SpiSlave.c , IfxQspi_SpiSlave.h

IfxQspi_SpiSlave_isrTransmit() : IfxQspi_SpiSlave.h , IfxQspi_SpiSlave.c

IfxQspi_SpiSlave_read() : IfxQspi_SpiSlave.c

IfxQspi_SpiSlave_readReceiveFifo() : IfxQspi_SpiSlave.h

IfxQspi_SpiSlave_write() : IfxQspi_SpiSlave.c

IfxQspi_SpiSlave_writeTransmitFifo() : IfxQspi_SpiSlave.h

IfxQspi_StrobeDelay : IfxQspi.h

IfxQspi_StrobeDelay_1 : IfxQspi.h

IfxQspi_StrobeDelay_10 : IfxQspi.h

IfxQspi_StrobeDelay_11 : IfxQspi.h

IfxQspi_StrobeDelay_12 : IfxQspi.h

IfxQspi_StrobeDelay_13 : IfxQspi.h

IfxQspi_StrobeDelay_14 : IfxQspi.h

IfxQspi_StrobeDelay_15 : IfxQspi.h

IfxQspi_StrobeDelay_16 : IfxQspi.h

IfxQspi_StrobeDelay_17 : IfxQspi.h

IfxQspi_StrobeDelay_18 : IfxQspi.h

IfxQspi_StrobeDelay_19 : IfxQspi.h

IfxQspi_StrobeDelay_2 : IfxQspi.h

IfxQspi_StrobeDelay_20 : IfxQspi.h

IfxQspi_StrobeDelay_21 : IfxQspi.h

IfxQspi_StrobeDelay_22 : IfxQspi.h

IfxQspi_StrobeDelay_23 : IfxQspi.h

IfxQspi_StrobeDelay_24 : IfxQspi.h

IfxQspi_StrobeDelay_25 : IfxQspi.h

IfxQspi_StrobeDelay_26 : IfxQspi.h

IfxQspi_StrobeDelay_27 : IfxQspi.h

IfxQspi_StrobeDelay_28 : IfxQspi.h

IfxQspi_StrobeDelay_29 : IfxQspi.h

IfxQspi_StrobeDelay_3 : IfxQspi.h

IfxQspi_StrobeDelay_30 : IfxQspi.h

IfxQspi_StrobeDelay_31 : IfxQspi.h

IfxQspi_StrobeDelay_32 : IfxQspi.h

IfxQspi_StrobeDelay_4 : IfxQspi.h

IfxQspi_StrobeDelay_5 : IfxQspi.h

IfxQspi_StrobeDelay_6 : IfxQspi.h

IfxQspi_StrobeDelay_7 : IfxQspi.h

IfxQspi_StrobeDelay_8 : IfxQspi.h

IfxQspi_StrobeDelay_9 : IfxQspi.h

IfxQspi_SuspendMode : IfxQspi.h

IfxQspi_SuspendMode_hard : IfxQspi.h

IfxQspi_SuspendMode_none : IfxQspi.h

IfxQspi_SuspendMode_soft : IfxQspi.h

IfxQspi_trail2InjectionEnabled() : IfxQspi.h

IfxQspi_TxFifoInt : IfxQspi.h

IfxQspi_TxFifoInt_1 : IfxQspi.h

IfxQspi_TxFifoInt_2 : IfxQspi.h

IfxQspi_TxFifoInt_3 : IfxQspi.h

IfxQspi_TxFifoInt_4 : IfxQspi.h

IfxQspi_write16() : IfxQspi.h , IfxQspi.c

IfxQspi_write32() : IfxQspi.c , IfxQspi.h

IfxQspi_write8() : IfxQspi.c , IfxQspi.h

IfxQspi_writeBasicConfiguration() : IfxQspi.h

IfxQspi_writeBasicConfigurationBeginStream() : IfxQspi.h

IfxQspi_writeBasicConfigurationEndStream() : IfxQspi.h

IfxQspi_writeExtendedConfiguration() : IfxQspi.h

IfxQspi_writeMixedDataTransmitFifo() : IfxQspi.h

IfxQspi_writeTransmitFifo() : IfxQspi.h

IfxScu_CCUCON0_CLKSEL : IfxScu_cfg.h

IfxScu_CCUCON0_CLKSEL_fBack : IfxScu_cfg.h

IfxScu_CCUCON0_CLKSEL_fPll : IfxScu_cfg.h

IFXSCU_CFG_ASCLINFDIV_160MHZ_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_ASCLINFDIV_320MHZ_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_ASCLINSDIV_160MHZ_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_ASCLINSDIV_320MHZ_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_BBBDIV_133MHZ : IfxScu_cfg.h

IFXSCU_CFG_BBBDIV_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_BBBDIV_240MHZ : IfxScu_cfg.h

IFXSCU_CFG_BBBDIV_300MHZ : IfxScu_cfg.h

IFXSCU_CFG_BBBDIV_80MHZ : IfxScu_cfg.h

IFXSCU_CFG_CCUCON0 : IfxScu_cfg.h

IFXSCU_CFG_CCUCON0_BASIC : IfxScu_cfg.h

IFXSCU_CFG_CCUCON0_BASIC_ : IfxScu_cfg.h

IFXSCU_CFG_CCUCON0_MASK : IfxScu_cfg.h

IFXSCU_CFG_CCUCON1 : IfxScu_cfg.h

IFXSCU_CFG_CCUCON1_BASIC : IfxScu_cfg.h

IFXSCU_CFG_CCUCON1_BASIC_ : IfxScu_cfg.h

IFXSCU_CFG_CCUCON1_MASK : IfxScu_cfg.h

IFXSCU_CFG_CCUCON2 : IfxScu_cfg.h

IFXSCU_CFG_CCUCON2_BASIC : IfxScu_cfg.h

IFXSCU_CFG_CCUCON2_BASIC_ : IfxScu_cfg.h

IFXSCU_CFG_CCUCON2_MASK : IfxScu_cfg.h

IFXSCU_CFG_CCUCON5 : IfxScu_cfg.h

IFXSCU_CFG_CCUCON5_BASIC : IfxScu_cfg.h

IFXSCU_CFG_CCUCON5_BASIC_ : IfxScu_cfg.h

IFXSCU_CFG_CCUCON5_MASK : IfxScu_cfg.h

IFXSCU_CFG_CCUCON6 : IfxScu_cfg.h

IFXSCU_CFG_CCUCON6_BASIC : IfxScu_cfg.h

IFXSCU_CFG_CCUCON6_BASIC_ : IfxScu_cfg.h

IFXSCU_CFG_CCUCON6_MASK : IfxScu_cfg.h

IFXSCU_CFG_CCUCON7 : IfxScu_cfg.h

IFXSCU_CFG_CCUCON7_BASIC : IfxScu_cfg.h

IFXSCU_CFG_CCUCON7_BASIC_ : IfxScu_cfg.h

IFXSCU_CFG_CCUCON7_MASK : IfxScu_cfg.h

IFXSCU_CFG_CCUCON8 : IfxScu_cfg.h

IFXSCU_CFG_CCUCON8_BASIC : IfxScu_cfg.h

IFXSCU_CFG_CCUCON8_BASIC_ : IfxScu_cfg.h

IFXSCU_CFG_CCUCON8_MASK : IfxScu_cfg.h

IFXSCU_CFG_CCUCON9 : IfxScu_cfg.h

IFXSCU_CFG_CCUCON9_BASIC : IfxScu_cfg.h

IFXSCU_CFG_CCUCON9_BASIC_ : IfxScu_cfg.h

IFXSCU_CFG_CCUCON9_MASK : IfxScu_cfg.h

IFXSCU_CFG_CLK_DISTRIBUTION : IfxScu_cfg.h

IFXSCU_CFG_CLKSELASCLINS_160MHZ_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_CLKSELASCLINS_320MHZ_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_CLKSELMCAN_160MHZ_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_CLKSELMCAN_320MHZ_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_CLKSELMSC_160MHZ_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_CLKSELMSC_320MHZ_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_CLKSELQSPI_160MHZ_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_CLKSELQSPI_320MHZ_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_CPU0DIV_133MHZ : IfxScu_cfg.h

IFXSCU_CFG_CPU0DIV_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_CPU0DIV_240MHZ : IfxScu_cfg.h

IFXSCU_CFG_CPU0DIV_300MHZ : IfxScu_cfg.h

IFXSCU_CFG_CPU0DIV_80MHZ : IfxScu_cfg.h

IFXSCU_CFG_CPU1DIV_133MHZ : IfxScu_cfg.h

IFXSCU_CFG_CPU1DIV_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_CPU1DIV_240MHZ : IfxScu_cfg.h

IFXSCU_CFG_CPU1DIV_300MHZ : IfxScu_cfg.h

IFXSCU_CFG_CPU1DIV_80MHZ : IfxScu_cfg.h

IFXSCU_CFG_CPU2DIV_133MHZ : IfxScu_cfg.h

IFXSCU_CFG_CPU2DIV_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_CPU2DIV_240MHZ : IfxScu_cfg.h

IFXSCU_CFG_CPU2DIV_300MHZ : IfxScu_cfg.h

IFXSCU_CFG_CPU2DIV_80MHZ : IfxScu_cfg.h

IFXSCU_CFG_CPU3DIV_133MHZ : IfxScu_cfg.h

IFXSCU_CFG_CPU3DIV_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_CPU3DIV_240MHZ : IfxScu_cfg.h

IFXSCU_CFG_CPU3DIV_300MHZ : IfxScu_cfg.h

IFXSCU_CFG_CPU3DIV_80MHZ : IfxScu_cfg.h

IFXSCU_CFG_FLASH_WAITSTATE : IfxScu_cfg.h

IFXSCU_CFG_FLASH_WAITSTATE_MSK : IfxScu_cfg.h

IFXSCU_CFG_FLASH_WAITSTATE_VAL : IfxScu_cfg.h

IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC : IfxScu_cfg.h

IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC_ : IfxScu_cfg.h

IFXSCU_CFG_FSI2DIV_133MHZ : IfxScu_cfg.h

IFXSCU_CFG_FSI2DIV_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_FSI2DIV_240MHZ : IfxScu_cfg.h

IFXSCU_CFG_FSI2DIV_300MHZ : IfxScu_cfg.h

IFXSCU_CFG_FSI2DIV_80MHZ : IfxScu_cfg.h

IFXSCU_CFG_FSIDIV_133MHZ : IfxScu_cfg.h

IFXSCU_CFG_FSIDIV_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_FSIDIV_240MHZ : IfxScu_cfg.h

IFXSCU_CFG_FSIDIV_300MHZ : IfxScu_cfg.h

IFXSCU_CFG_FSIDIV_80MHZ : IfxScu_cfg.h

IFXSCU_CFG_GETHDIV_133MHZ : IfxScu_cfg.h

IFXSCU_CFG_GETHDIV_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_GETHDIV_240MHZ : IfxScu_cfg.h

IFXSCU_CFG_GETHDIV_300MHZ : IfxScu_cfg.h

IFXSCU_CFG_GETHDIV_80MHZ : IfxScu_cfg.h

IFXSCU_CFG_GTMDIV_133MHZ : IfxScu_cfg.h

IFXSCU_CFG_GTMDIV_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_GTMDIV_240MHZ : IfxScu_cfg.h

IFXSCU_CFG_GTMDIV_300MHZ : IfxScu_cfg.h

IFXSCU_CFG_GTMDIV_80MHZ : IfxScu_cfg.h

IFXSCU_CFG_I2CDIV_160MHZ_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_I2CDIV_320MHZ_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_MCANDIV_160MHZ_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_MCANDIV_320MHZ_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_MCANHDIV_133MHZ : IfxScu_cfg.h

IFXSCU_CFG_MCANHDIV_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_MCANHDIV_240MHZ : IfxScu_cfg.h

IFXSCU_CFG_MCANHDIV_300MHZ : IfxScu_cfg.h

IFXSCU_CFG_MCANHDIV_80MHZ : IfxScu_cfg.h

IFXSCU_CFG_MSCDIV_160MHZ_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_MSCDIV_320MHZ_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_PER_PLL_16MHZ_160MHZ_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_PER_PLL_16MHZ_320MHZ_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_PER_PLL_20MHZ_160MHZ_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_PER_PLL_20MHZ_320MHZ_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_PER_PLL_25MHZ_160MHZ_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_PER_PLL_40MHZ_160MHZ_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_PER_PLL_40MHZ_320MHZ_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_PER_PLL_INITIAL_STEP : IfxScu_cfg.h

IFXSCU_CFG_PER_PLL_INITIAL_STEP_BASIC : IfxScu_cfg.h

IFXSCU_CFG_PER_PLL_INITIAL_STEP_BASIC_ : IfxScu_cfg.h

IFXSCU_CFG_PLL1_FREQ : IfxScu_cfg.h

IFXSCU_CFG_PLL1DIVDIS_160MHZ_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL1DIVDIS_320MHZ_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL2_FREQ : IfxScu_cfg.h

IFXSCU_CFG_PLL_FREQ : IfxScu_cfg.h

IFXSCU_CFG_PLL_INITIAL_STEP : IfxScu_cfg.h

IFXSCU_CFG_PLL_STEPS : IfxScu_cfg.h

IFXSCU_CFG_PLL_STEPS_16MHZ_133MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_STEPS_16MHZ_240MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_STEPS_16MHZ_300MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_STEPS_16MHZ_80MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_STEPS_20MHZ_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_STEPS_20MHZ_240MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_STEPS_20MHZ_300MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_STEPS_25MHZ_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_STEPS_25MHZ_300MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_STEPS_40MHZ_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_STEPS_40MHZ_240MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_STEPS_40MHZ_300MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_STEPS_BASIC : IfxScu_cfg.h

IFXSCU_CFG_PLL_STEPS_BASIC_ : IfxScu_cfg.h

IFXSCU_CFG_PLL_STEPS_FDCO_600MHZ_TO_TARGET_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_STEPS_FDCO_600MHZ_TO_TARGET_300MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_STEPS_FDCO_640MHZ_TO_TARGET_80MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_STEPS_FDCO_720MHZ_TO_TARGET_240MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_STEPS_FDCO_800MHZ_TO_TARGET_133MHZ : IfxScu_cfg.h

IFXSCU_CFG_QSPIDIV_160MHZ_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_QSPIDIV_320MHZ_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_SPBDIV_133MHZ : IfxScu_cfg.h

IFXSCU_CFG_SPBDIV_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_SPBDIV_240MHZ : IfxScu_cfg.h

IFXSCU_CFG_SPBDIV_300MHZ : IfxScu_cfg.h

IFXSCU_CFG_SPBDIV_80MHZ : IfxScu_cfg.h

IFXSCU_CFG_SRIDIV_133MHZ : IfxScu_cfg.h

IFXSCU_CFG_SRIDIV_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_SRIDIV_240MHZ : IfxScu_cfg.h

IFXSCU_CFG_SRIDIV_300MHZ : IfxScu_cfg.h

IFXSCU_CFG_SRIDIV_80MHZ : IfxScu_cfg.h

IFXSCU_CFG_STMDIV_133MHZ : IfxScu_cfg.h

IFXSCU_CFG_STMDIV_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_STMDIV_240MHZ : IfxScu_cfg.h

IFXSCU_CFG_STMDIV_300MHZ : IfxScu_cfg.h

IFXSCU_CFG_STMDIV_80MHZ : IfxScu_cfg.h

IFXSCU_CFG_SYS_PLL_16MHZ_133MHZ : IfxScu_cfg.h

IFXSCU_CFG_SYS_PLL_16MHZ_240MHZ : IfxScu_cfg.h

IFXSCU_CFG_SYS_PLL_16MHZ_300MHZ : IfxScu_cfg.h

IFXSCU_CFG_SYS_PLL_16MHZ_80MHZ : IfxScu_cfg.h

IFXSCU_CFG_SYS_PLL_20MHZ_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_SYS_PLL_20MHZ_240MHZ : IfxScu_cfg.h

IFXSCU_CFG_SYS_PLL_20MHZ_300MHZ : IfxScu_cfg.h

IFXSCU_CFG_SYS_PLL_25MHZ_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_SYS_PLL_25MHZ_300MHZ : IfxScu_cfg.h

IFXSCU_CFG_SYS_PLL_40MHZ_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_SYS_PLL_40MHZ_240MHZ : IfxScu_cfg.h

IFXSCU_CFG_SYS_PLL_40MHZ_300MHZ : IfxScu_cfg.h

IFXSCU_CFG_SYS_PLL_INITIAL_STEP : IfxScu_cfg.h

IFXSCU_CFG_SYS_PLL_INITIAL_STEP_BASIC : IfxScu_cfg.h

IFXSCU_CFG_SYS_PLL_INITIAL_STEP_BASIC_ : IfxScu_cfg.h

IFXSCU_CFG_WAIT_INITIAL_STEP : IfxScu_cfg.h

IFXSCU_CFG_WAIT_INITIAL_STEP_16MHZ_133MHZ : IfxScu_cfg.h

IFXSCU_CFG_WAIT_INITIAL_STEP_16MHZ_240MHZ : IfxScu_cfg.h

IFXSCU_CFG_WAIT_INITIAL_STEP_16MHZ_300MHZ : IfxScu_cfg.h

IFXSCU_CFG_WAIT_INITIAL_STEP_16MHZ_80MHZ : IfxScu_cfg.h

IFXSCU_CFG_WAIT_INITIAL_STEP_20MHZ_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_WAIT_INITIAL_STEP_20MHZ_240MHZ : IfxScu_cfg.h

IFXSCU_CFG_WAIT_INITIAL_STEP_20MHZ_300MHZ : IfxScu_cfg.h

IFXSCU_CFG_WAIT_INITIAL_STEP_25MHZ_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_WAIT_INITIAL_STEP_25MHZ_300MHZ : IfxScu_cfg.h

IFXSCU_CFG_WAIT_INITIAL_STEP_40MHZ_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_WAIT_INITIAL_STEP_40MHZ_240MHZ : IfxScu_cfg.h

IFXSCU_CFG_WAIT_INITIAL_STEP_40MHZ_300MHZ : IfxScu_cfg.h

IFXSCU_CFG_WAIT_INITIAL_STEP_BASIC : IfxScu_cfg.h

IFXSCU_CFG_WAIT_INITIAL_STEP_BASIC_ : IfxScu_cfg.h

IFXSCU_CFG_XTAL_FREQ : IfxScu_cfg.h

IfxScu_Emgstop_In_pinTable : IfxScu_PinMap.h , IfxScu_PinMap.c

IfxScu_EMGSTOPA_P33_8_IN : IfxScu_PinMap.c , IfxScu_PinMap.h

IfxScu_EMGSTOPB_P21_2_IN : IfxScu_PinMap.c , IfxScu_PinMap.h

IFXSCU_EVR_OSC_FREQUENCY : IfxScu_cfg.h

IfxScu_EXTCLK0_P00_15_OUT : IfxScu_PinMap.h , IfxScu_PinMap.c

IfxScu_EXTCLK0_P23_1_OUT : IfxScu_PinMap.c , IfxScu_PinMap.h

IfxScu_EXTCLK1_P00_13_OUT : IfxScu_PinMap.h , IfxScu_PinMap.c

IfxScu_EXTCLK1_P11_12_OUT : IfxScu_PinMap.c , IfxScu_PinMap.h

IfxScu_EXTCLK1_P32_4_OUT : IfxScu_PinMap.h , IfxScu_PinMap.c

IfxScu_Extclk_Out_pinTable : IfxScu_PinMap.c , IfxScu_PinMap.h

IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS : IfxScu_PinMap.h

IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS : IfxScu_PinMap.h

IFXSCU_PINMAP_NUM_MODULES : IfxScu_PinMap.h

IFXSCU_PINMAP_NUM_REQUESTS : IfxScu_PinMap.h

IFXSCU_PINMAP_REQ_IN_NUM_ITEMS : IfxScu_PinMap.h

IFXSCU_PLL_FREERUNNING_FREQUENCY : IfxScu_cfg.h

IfxScu_PMCSR_REQSLP : IfxScu_cfg.h

IfxScu_PMCSR_REQSLP_Idle : IfxScu_cfg.h

IfxScu_PMCSR_REQSLP_Run : IfxScu_cfg.h

IfxScu_PMCSR_REQSLP_Sleep : IfxScu_cfg.h

IfxScu_PMCSR_REQSLP_Stby : IfxScu_cfg.h

IfxScu_REQ0A_P15_4_IN : IfxScu_PinMap.h , IfxScu_PinMap.c

IfxScu_REQ0C_P10_7_IN : IfxScu_PinMap.h , IfxScu_PinMap.c

IfxScu_REQ1A_P14_3_IN : IfxScu_PinMap.c , IfxScu_PinMap.h

IfxScu_REQ1C_P10_8_IN : IfxScu_PinMap.h , IfxScu_PinMap.c

IfxScu_REQ2A_P10_2_IN : IfxScu_PinMap.c , IfxScu_PinMap.h

IfxScu_REQ2B_P02_1_IN : IfxScu_PinMap.h , IfxScu_PinMap.c

IfxScu_REQ2C_P00_4_IN : IfxScu_PinMap.h , IfxScu_PinMap.c

IfxScu_REQ3A_P10_3_IN : IfxScu_PinMap.h , IfxScu_PinMap.c

IfxScu_REQ3B_P14_1_IN : IfxScu_PinMap.c , IfxScu_PinMap.h

IfxScu_REQ3C_P02_0_IN : IfxScu_PinMap.c , IfxScu_PinMap.h

IfxScu_REQ4A_P33_7_IN : IfxScu_PinMap.c , IfxScu_PinMap.h

IfxScu_REQ4D_P15_5_IN : IfxScu_PinMap.c , IfxScu_PinMap.h

IfxScu_REQ5A_P15_8_IN : IfxScu_PinMap.h , IfxScu_PinMap.c

IfxScu_REQ6A_P20_0_IN : IfxScu_PinMap.c , IfxScu_PinMap.h

IfxScu_REQ6D_P11_10_IN : IfxScu_PinMap.c , IfxScu_PinMap.h

IfxScu_REQ7A_P20_9_IN : IfxScu_PinMap.c , IfxScu_PinMap.h

IfxScu_REQ7C_P15_1_IN : IfxScu_PinMap.c , IfxScu_PinMap.h

IfxScu_Req_In_pinTable : IfxScu_PinMap.c , IfxScu_PinMap.h

IFXSCU_VCO_BASE_FREQUENCY : IfxScu_cfg.h

IfxScu_WDTCON1_IR : IfxScu_cfg.h

IfxScu_WDTCON1_IR_divBy16384 : IfxScu_cfg.h

IfxScu_WDTCON1_IR_divBy256 : IfxScu_cfg.h

IfxScu_WDTCON1_IR_divBy64 : IfxScu_cfg.h

IfxScuCcu_calRGainParameters() : IfxScuCcu.h , IfxScuCcu.c

IFXSCUCCU_CCUCON_LCK_BIT_TIMEOUT_COUNT : IfxScuCcu.h

IfxScuCcu_clearTrapStatusFlag() : IfxScuCcu.h

IfxScuCcu_configureCcuInitialStep() : IfxScuCcu.h

IfxScuCcu_defaultClockConfig : IfxScuCcu.h , IfxScuCcu.c

IfxScuCcu_defaultFlashWaitstateConfig : IfxScuCcu.c

IfxScuCcu_defaultModConfig : IfxScuCcu.c , IfxScuCcu.h

IfxScuCcu_defaultPllConfigSteps : IfxScuCcu.c

IfxScuCcu_distributeClock() : IfxScuCcu.c , IfxScuCcu.h

IfxScuCcu_distributeClockInline() : IfxScuCcu.h

IFXSCUCCU_FLASHWAITSTATECHECK : IfxScuCcu.h

IfxScuCcu_Fsource : IfxScuCcu.h

IfxScuCcu_Fsource_0 : IfxScuCcu.h

IfxScuCcu_Fsource_1 : IfxScuCcu.h

IfxScuCcu_Fsource_2 : IfxScuCcu.h

IFXSCUCCU_GET_MODCFG : IfxScuCcu.h

IFXSCUCCU_GET_RGAIN_HEX : IfxScuCcu.h

IFXSCUCCU_GET_RGAIN_NOM : IfxScuCcu.h

IfxScuCcu_getAdcFrequency() : IfxScuCcu.h

IfxScuCcu_getAsclinFFrequency() : IfxScuCcu.h

IfxScuCcu_getAsclinSFrequency() : IfxScuCcu.c , IfxScuCcu.h

IfxScuCcu_getBbbFrequency() : IfxScuCcu.c , IfxScuCcu.h

IfxScuCcu_getCpuFrequency() : IfxScuCcu.c , IfxScuCcu.h

IfxScuCcu_getEvrFrequency() : IfxScuCcu.h

IfxScuCcu_getFsi2Frequency() : IfxScuCcu.h , IfxScuCcu.c

IfxScuCcu_getFsiFrequency() : IfxScuCcu.h , IfxScuCcu.c

IfxScuCcu_getGethFrequency() : IfxScuCcu.h

IfxScuCcu_getGtmFrequency() : IfxScuCcu.h

IfxScuCcu_getI2cFrequency() : IfxScuCcu.h

IfxScuCcu_getMcanFrequency() : IfxScuCcu.c , IfxScuCcu.h

IfxScuCcu_getMcanhFrequency() : IfxScuCcu.h

IfxScuCcu_getModuleFrequency() : IfxScuCcu.c , IfxScuCcu.h

IfxScuCcu_getMscFrequency() : IfxScuCcu.h , IfxScuCcu.c

IfxScuCcu_getOsc0Frequency() : IfxScuCcu.h

IfxScuCcu_getOscFrequency() : IfxScuCcu.h

IfxScuCcu_getPerPllFrequency1() : IfxScuCcu.h , IfxScuCcu.c

IfxScuCcu_getPerPllFrequency2() : IfxScuCcu.h , IfxScuCcu.c

IfxScuCcu_getPllFrequency() : IfxScuCcu.h , IfxScuCcu.c

IfxScuCcu_getQspiFrequency() : IfxScuCcu.h , IfxScuCcu.c

IfxScuCcu_getSourceFrequency() : IfxScuCcu.h , IfxScuCcu.c

IfxScuCcu_getSourceSelection() : IfxScuCcu.h

IfxScuCcu_getSpbFrequency() : IfxScuCcu.h , IfxScuCcu.c

IfxScuCcu_getSriFrequency() : IfxScuCcu.c , IfxScuCcu.h

IfxScuCcu_getStmFrequency() : IfxScuCcu.h

IfxScuCcu_getTrapDisableFlag() : IfxScuCcu.h

IfxScuCcu_getTrapStatusFlag() : IfxScuCcu.h

IfxScuCcu_init() : IfxScuCcu.h , IfxScuCcu.c

IfxScuCcu_initConfig() : IfxScuCcu.h , IfxScuCcu.c

IfxScuCcu_K2divider : IfxScuCcu.h

IfxScuCcu_K2divider_1 : IfxScuCcu.h

IfxScuCcu_K2divider_2 : IfxScuCcu.h

IfxScuCcu_K2divider_3 : IfxScuCcu.h

IfxScuCcu_K2divider_4 : IfxScuCcu.h

IfxScuCcu_K2divider_5 : IfxScuCcu.h

IfxScuCcu_K2divider_6 : IfxScuCcu.h

IfxScuCcu_K2divider_7 : IfxScuCcu.h

IfxScuCcu_K2divider_8 : IfxScuCcu.h

IfxScuCcu_K3divider : IfxScuCcu.h

IfxScuCcu_K3divider_1 : IfxScuCcu.h

IfxScuCcu_K3divider_2 : IfxScuCcu.h

IfxScuCcu_K3divider_3 : IfxScuCcu.h

IfxScuCcu_K3divider_4 : IfxScuCcu.h

IfxScuCcu_K3divider_5 : IfxScuCcu.h

IfxScuCcu_K3divider_6 : IfxScuCcu.h

IfxScuCcu_K3divider_7 : IfxScuCcu.h

IfxScuCcu_K3divider_8 : IfxScuCcu.h

IFXSCUCCU_LOOP_TIMEOUT_CHECK : IfxScuCcu.h

IfxScuCcu_LowPowerDivRatio : IfxScuCcu.h

IfxScuCcu_LowPowerDivRatio_divBy120 : IfxScuCcu.h

IfxScuCcu_LowPowerDivRatio_divBy240 : IfxScuCcu.h

IfxScuCcu_LowPowerDivRatio_divBy30 : IfxScuCcu.h

IfxScuCcu_LowPowerDivRatio_divBy60 : IfxScuCcu.h

IFXSCUCCU_LPTONORMAL_WAITTIME : IfxScuCcu.h

IfxScuCcu_MA_percent : IfxScuCcu.h , IfxScuCcu.c

IFXSCUCCU_MODCFG_DEFAULT_SHIFT : IfxScuCcu.h

IFXSCUCCU_MODCFG_DEFAULT_VAL : IfxScuCcu.h

IfxScuCcu_ModEn : IfxScuCcu.h

IfxScuCcu_ModEn_disabled : IfxScuCcu.h

IfxScuCcu_ModEn_enabled : IfxScuCcu.h

IFXSCUCCU_MODULATION_FREQ_HZ : IfxScuCcu.h

IfxScuCcu_modulation_init() : IfxScuCcu.h , IfxScuCcu.c

IfxScuCcu_ModulationAmplitude : IfxScuCcu.h

IfxScuCcu_ModulationAmplitude_0p5 : IfxScuCcu.h

IfxScuCcu_ModulationAmplitude_1p0 : IfxScuCcu.h

IfxScuCcu_ModulationAmplitude_1p25 : IfxScuCcu.h

IfxScuCcu_ModulationAmplitude_1p5 : IfxScuCcu.h

IfxScuCcu_ModulationAmplitude_2p0 : IfxScuCcu.h

IfxScuCcu_ModulationAmplitude_2p5 : IfxScuCcu.h

IfxScuCcu_ModulationAmplitude_count : IfxScuCcu.h

IfxScuCcu_Ndivider : IfxScuCcu.h

IfxScuCcu_Ndivider_1 : IfxScuCcu.h

IfxScuCcu_Ndivider_10 : IfxScuCcu.h

IfxScuCcu_Ndivider_100 : IfxScuCcu.h

IfxScuCcu_Ndivider_101 : IfxScuCcu.h

IfxScuCcu_Ndivider_102 : IfxScuCcu.h

IfxScuCcu_Ndivider_103 : IfxScuCcu.h

IfxScuCcu_Ndivider_104 : IfxScuCcu.h

IfxScuCcu_Ndivider_105 : IfxScuCcu.h

IfxScuCcu_Ndivider_106 : IfxScuCcu.h

IfxScuCcu_Ndivider_107 : IfxScuCcu.h

IfxScuCcu_Ndivider_108 : IfxScuCcu.h

IfxScuCcu_Ndivider_109 : IfxScuCcu.h

IfxScuCcu_Ndivider_11 : IfxScuCcu.h

IfxScuCcu_Ndivider_110 : IfxScuCcu.h

IfxScuCcu_Ndivider_111 : IfxScuCcu.h

IfxScuCcu_Ndivider_112 : IfxScuCcu.h

IfxScuCcu_Ndivider_113 : IfxScuCcu.h

IfxScuCcu_Ndivider_114 : IfxScuCcu.h

IfxScuCcu_Ndivider_115 : IfxScuCcu.h

IfxScuCcu_Ndivider_116 : IfxScuCcu.h

IfxScuCcu_Ndivider_117 : IfxScuCcu.h

IfxScuCcu_Ndivider_118 : IfxScuCcu.h

IfxScuCcu_Ndivider_119 : IfxScuCcu.h

IfxScuCcu_Ndivider_12 : IfxScuCcu.h

IfxScuCcu_Ndivider_120 : IfxScuCcu.h

IfxScuCcu_Ndivider_121 : IfxScuCcu.h

IfxScuCcu_Ndivider_122 : IfxScuCcu.h

IfxScuCcu_Ndivider_123 : IfxScuCcu.h

IfxScuCcu_Ndivider_124 : IfxScuCcu.h

IfxScuCcu_Ndivider_125 : IfxScuCcu.h

IfxScuCcu_Ndivider_126 : IfxScuCcu.h

IfxScuCcu_Ndivider_127 : IfxScuCcu.h

IfxScuCcu_Ndivider_128 : IfxScuCcu.h

IfxScuCcu_Ndivider_13 : IfxScuCcu.h

IfxScuCcu_Ndivider_14 : IfxScuCcu.h

IfxScuCcu_Ndivider_15 : IfxScuCcu.h

IfxScuCcu_Ndivider_16 : IfxScuCcu.h

IfxScuCcu_Ndivider_17 : IfxScuCcu.h

IfxScuCcu_Ndivider_18 : IfxScuCcu.h

IfxScuCcu_Ndivider_19 : IfxScuCcu.h

IfxScuCcu_Ndivider_2 : IfxScuCcu.h

IfxScuCcu_Ndivider_20 : IfxScuCcu.h

IfxScuCcu_Ndivider_21 : IfxScuCcu.h

IfxScuCcu_Ndivider_22 : IfxScuCcu.h

IfxScuCcu_Ndivider_23 : IfxScuCcu.h

IfxScuCcu_Ndivider_24 : IfxScuCcu.h

IfxScuCcu_Ndivider_25 : IfxScuCcu.h

IfxScuCcu_Ndivider_26 : IfxScuCcu.h

IfxScuCcu_Ndivider_27 : IfxScuCcu.h

IfxScuCcu_Ndivider_28 : IfxScuCcu.h

IfxScuCcu_Ndivider_29 : IfxScuCcu.h

IfxScuCcu_Ndivider_3 : IfxScuCcu.h

IfxScuCcu_Ndivider_30 : IfxScuCcu.h

IfxScuCcu_Ndivider_31 : IfxScuCcu.h

IfxScuCcu_Ndivider_32 : IfxScuCcu.h

IfxScuCcu_Ndivider_33 : IfxScuCcu.h

IfxScuCcu_Ndivider_34 : IfxScuCcu.h

IfxScuCcu_Ndivider_35 : IfxScuCcu.h

IfxScuCcu_Ndivider_36 : IfxScuCcu.h

IfxScuCcu_Ndivider_37 : IfxScuCcu.h

IfxScuCcu_Ndivider_38 : IfxScuCcu.h

IfxScuCcu_Ndivider_39 : IfxScuCcu.h

IfxScuCcu_Ndivider_4 : IfxScuCcu.h

IfxScuCcu_Ndivider_40 : IfxScuCcu.h

IfxScuCcu_Ndivider_41 : IfxScuCcu.h

IfxScuCcu_Ndivider_42 : IfxScuCcu.h

IfxScuCcu_Ndivider_43 : IfxScuCcu.h

IfxScuCcu_Ndivider_44 : IfxScuCcu.h

IfxScuCcu_Ndivider_45 : IfxScuCcu.h

IfxScuCcu_Ndivider_46 : IfxScuCcu.h

IfxScuCcu_Ndivider_47 : IfxScuCcu.h

IfxScuCcu_Ndivider_48 : IfxScuCcu.h

IfxScuCcu_Ndivider_49 : IfxScuCcu.h

IfxScuCcu_Ndivider_5 : IfxScuCcu.h

IfxScuCcu_Ndivider_50 : IfxScuCcu.h

IfxScuCcu_Ndivider_51 : IfxScuCcu.h

IfxScuCcu_Ndivider_52 : IfxScuCcu.h

IfxScuCcu_Ndivider_53 : IfxScuCcu.h

IfxScuCcu_Ndivider_54 : IfxScuCcu.h

IfxScuCcu_Ndivider_55 : IfxScuCcu.h

IfxScuCcu_Ndivider_56 : IfxScuCcu.h

IfxScuCcu_Ndivider_57 : IfxScuCcu.h

IfxScuCcu_Ndivider_58 : IfxScuCcu.h

IfxScuCcu_Ndivider_59 : IfxScuCcu.h

IfxScuCcu_Ndivider_6 : IfxScuCcu.h

IfxScuCcu_Ndivider_60 : IfxScuCcu.h

IfxScuCcu_Ndivider_61 : IfxScuCcu.h

IfxScuCcu_Ndivider_62 : IfxScuCcu.h

IfxScuCcu_Ndivider_63 : IfxScuCcu.h

IfxScuCcu_Ndivider_64 : IfxScuCcu.h

IfxScuCcu_Ndivider_65 : IfxScuCcu.h

IfxScuCcu_Ndivider_66 : IfxScuCcu.h

IfxScuCcu_Ndivider_67 : IfxScuCcu.h

IfxScuCcu_Ndivider_68 : IfxScuCcu.h

IfxScuCcu_Ndivider_69 : IfxScuCcu.h

IfxScuCcu_Ndivider_7 : IfxScuCcu.h

IfxScuCcu_Ndivider_70 : IfxScuCcu.h

IfxScuCcu_Ndivider_71 : IfxScuCcu.h

IfxScuCcu_Ndivider_72 : IfxScuCcu.h

IfxScuCcu_Ndivider_73 : IfxScuCcu.h

IfxScuCcu_Ndivider_74 : IfxScuCcu.h

IfxScuCcu_Ndivider_75 : IfxScuCcu.h

IfxScuCcu_Ndivider_76 : IfxScuCcu.h

IfxScuCcu_Ndivider_77 : IfxScuCcu.h

IfxScuCcu_Ndivider_78 : IfxScuCcu.h

IfxScuCcu_Ndivider_79 : IfxScuCcu.h

IfxScuCcu_Ndivider_8 : IfxScuCcu.h

IfxScuCcu_Ndivider_80 : IfxScuCcu.h

IfxScuCcu_Ndivider_81 : IfxScuCcu.h

IfxScuCcu_Ndivider_82 : IfxScuCcu.h

IfxScuCcu_Ndivider_83 : IfxScuCcu.h

IfxScuCcu_Ndivider_84 : IfxScuCcu.h

IfxScuCcu_Ndivider_85 : IfxScuCcu.h

IfxScuCcu_Ndivider_86 : IfxScuCcu.h

IfxScuCcu_Ndivider_87 : IfxScuCcu.h

IfxScuCcu_Ndivider_88 : IfxScuCcu.h

IfxScuCcu_Ndivider_89 : IfxScuCcu.h

IfxScuCcu_Ndivider_9 : IfxScuCcu.h

IfxScuCcu_Ndivider_90 : IfxScuCcu.h

IfxScuCcu_Ndivider_91 : IfxScuCcu.h

IfxScuCcu_Ndivider_92 : IfxScuCcu.h

IfxScuCcu_Ndivider_93 : IfxScuCcu.h

IfxScuCcu_Ndivider_94 : IfxScuCcu.h

IfxScuCcu_Ndivider_95 : IfxScuCcu.h

IfxScuCcu_Ndivider_96 : IfxScuCcu.h

IfxScuCcu_Ndivider_97 : IfxScuCcu.h

IfxScuCcu_Ndivider_98 : IfxScuCcu.h

IfxScuCcu_Ndivider_99 : IfxScuCcu.h

IFXSCUCCU_OSC_STABLECHK_TIME : IfxScuCcu.h

IFXSCUCCU_OSCCON_PLLLV_OR_HV_TIMEOUT_COUNT : IfxScuCcu.h

IfxScuCcu_Pdivider : IfxScuCcu.h

IfxScuCcu_Pdivider_1 : IfxScuCcu.h

IfxScuCcu_Pdivider_2 : IfxScuCcu.h

IfxScuCcu_Pdivider_3 : IfxScuCcu.h

IfxScuCcu_Pdivider_4 : IfxScuCcu.h

IfxScuCcu_Pdivider_5 : IfxScuCcu.h

IfxScuCcu_Pdivider_6 : IfxScuCcu.h

IfxScuCcu_Pdivider_7 : IfxScuCcu.h

IfxScuCcu_Pdivider_8 : IfxScuCcu.h

IFXSCUCCU_PLL_KRDY_TIMEOUT_COUNT : IfxScuCcu.h

IFXSCUCCU_PLL_LOCK_TIMEOUT_COUNT : IfxScuCcu.h

IfxScuCcu_PllInputClockSelection : IfxScuCcu.h

IfxScuCcu_PllInputClockSelection_fOsc0 : IfxScuCcu.h

IfxScuCcu_PllInputClockSelection_fOsc1 : IfxScuCcu.h

IfxScuCcu_PllInputClockSelection_fSysclk : IfxScuCcu.h

IfxScuCcu_PllStepsFunctionHook : IfxScuCcu.h

IfxScuCcu_setAsclinFFrequency() : IfxScuCcu.h , IfxScuCcu.c

IfxScuCcu_setAsclinSFrequency() : IfxScuCcu.h , IfxScuCcu.c

IfxScuCcu_setBbbFrequency() : IfxScuCcu.h , IfxScuCcu.c

IfxScuCcu_setCpuFrequency() : IfxScuCcu.h , IfxScuCcu.c

IfxScuCcu_setFsi2Frequency() : IfxScuCcu.h , IfxScuCcu.c

IfxScuCcu_setFsiFrequency() : IfxScuCcu.h , IfxScuCcu.c

IfxScuCcu_setGethFrequency() : IfxScuCcu.h , IfxScuCcu.c

IfxScuCcu_setGtmFrequency() : IfxScuCcu.c , IfxScuCcu.h

IfxScuCcu_setI2cFrequency() : IfxScuCcu.c , IfxScuCcu.h

IfxScuCcu_setMcanFrequency() : IfxScuCcu.c , IfxScuCcu.h

IfxScuCcu_setMcanhFrequency() : IfxScuCcu.h , IfxScuCcu.c

IfxScuCcu_setMscFrequency() : IfxScuCcu.h , IfxScuCcu.c

IfxScuCcu_setQspiFrequency() : IfxScuCcu.h , IfxScuCcu.c

IfxScuCcu_setSpbFrequency() : IfxScuCcu.h , IfxScuCcu.c

IfxScuCcu_setSriFrequency() : IfxScuCcu.c , IfxScuCcu.h

IfxScuCcu_setStmFrequency() : IfxScuCcu.h , IfxScuCcu.c

IfxScuCcu_setTrapDisableFlag() : IfxScuCcu.h

IfxScuCcu_setTrapStatusFlag() : IfxScuCcu.h

IFXSCUCCU_SMUALARM_MASK : IfxScuCcu.h

IfxScuCcu_switchToBackupClock() : IfxScuCcu.h , IfxScuCcu.c

IfxScuCcu_switchToLowPowerMode() : IfxScuCcu.h

IfxScuCcu_switchToNormalMode() : IfxScuCcu.h

IFXSCUCCU_SYSPLLSTAT_PWDSTAT_TIMEOUT_COUNT : IfxScuCcu.h

IfxScuCcu_throttleSysPllClock() : IfxScuCcu.h , IfxScuCcu.c

IfxScuCcu_throttleSysPllClockInline() : IfxScuCcu.h

IfxScuCcu_Traprequest : IfxScuCcu.h

IfxScuCcu_Traprequest_esr0 : IfxScuCcu.h

IfxScuCcu_Traprequest_esr1 : IfxScuCcu.h

IfxScuCcu_Traprequest_smu : IfxScuCcu.h

IfxScuCcu_Traprequest_trap2 : IfxScuCcu.h

IfxScuCcu_wait() : IfxScuCcu.h

IfxScuCcu_waitWithWdtService() : IfxScuCcu.h

IfxScuCcu_xtalFrequency : IfxScuCcu.c , IfxScuCcu.h

IFXSCUERU_CHANNEL_NUMBER_ODD : IfxScuEru.c

IfxScuEru_clearAllEventFlags() : IfxScuEru.c , IfxScuEru.h

IfxScuEru_clearEventFlag() : IfxScuEru.c , IfxScuEru.h

IfxScuEru_clearInputChannelConfiguration() : IfxScuEru.c , IfxScuEru.h

IfxScuEru_clearOutputChannelConfiguration() : IfxScuEru.h , IfxScuEru.c

IfxScuEru_connectTrigger() : IfxScuEru.c , IfxScuEru.h

IfxScuEru_disableAutoClear() : IfxScuEru.h , IfxScuEru.c

IfxScuEru_disableFallingEdgeDetection() : IfxScuEru.h , IfxScuEru.c

IfxScuEru_disableInputFilter() : IfxScuEru.h

IfxScuEru_disablePatternDetectionTrigger() : IfxScuEru.h , IfxScuEru.c

IfxScuEru_disableRisingEdgeDetection() : IfxScuEru.c , IfxScuEru.h

IfxScuEru_disableTriggerPulse() : IfxScuEru.c , IfxScuEru.h

IfxScuEru_enableAutoClear() : IfxScuEru.c , IfxScuEru.h

IfxScuEru_enableFallingEdgeDetection() : IfxScuEru.h , IfxScuEru.c

IfxScuEru_enableInputFilter() : IfxScuEru.h

IfxScuEru_enablePatternDetectionTrigger() : IfxScuEru.c , IfxScuEru.h

IfxScuEru_enableRisingEdgeDetection() : IfxScuEru.h , IfxScuEru.c

IfxScuEru_enableTriggerPulse() : IfxScuEru.h , IfxScuEru.c

IfxScuEru_ExternalInputSelection : IfxScuEru.h

IfxScuEru_ExternalInputSelection_0 : IfxScuEru.h

IfxScuEru_ExternalInputSelection_1 : IfxScuEru.h

IfxScuEru_ExternalInputSelection_2 : IfxScuEru.h

IfxScuEru_ExternalInputSelection_3 : IfxScuEru.h

IfxScuEru_ExternalInputSelection_4 : IfxScuEru.h

IfxScuEru_ExternalInputSelection_5 : IfxScuEru.h

IfxScuEru_getAllEventFlagsStatus() : IfxScuEru.h , IfxScuEru.c

IfxScuEru_getEventFlagStatus() : IfxScuEru.c , IfxScuEru.h

IfxScuEru_getInputChannelConfiguration() : IfxScuEru.c , IfxScuEru.h

IfxScuEru_getOutputChannelConfiguration() : IfxScuEru.c , IfxScuEru.h

IfxScuEru_getPatternDetectionResult() : IfxScuEru.h , IfxScuEru.c

IfxScuEru_getWholePatternDetectionResult() : IfxScuEru.c , IfxScuEru.h

IfxScuEru_initReqPin() : IfxScuEru.h

IfxScuEru_InputChannel : IfxScuEru.h

IfxScuEru_InputChannel_0 : IfxScuEru.h

IfxScuEru_InputChannel_1 : IfxScuEru.h

IfxScuEru_InputChannel_2 : IfxScuEru.h

IfxScuEru_InputChannel_3 : IfxScuEru.h

IfxScuEru_InputChannel_4 : IfxScuEru.h

IfxScuEru_InputChannel_5 : IfxScuEru.h

IfxScuEru_InputChannel_6 : IfxScuEru.h

IfxScuEru_InputChannel_7 : IfxScuEru.h

IfxScuEru_InputFilterDepth : IfxScuEru.h

IfxScuEru_InputFilterDepth_1 : IfxScuEru.h

IfxScuEru_InputFilterDepth_10 : IfxScuEru.h

IfxScuEru_InputFilterDepth_11 : IfxScuEru.h

IfxScuEru_InputFilterDepth_12 : IfxScuEru.h

IfxScuEru_InputFilterDepth_13 : IfxScuEru.h

IfxScuEru_InputFilterDepth_14 : IfxScuEru.h

IfxScuEru_InputFilterDepth_15 : IfxScuEru.h

IfxScuEru_InputFilterDepth_2 : IfxScuEru.h

IfxScuEru_InputFilterDepth_3 : IfxScuEru.h

IfxScuEru_InputFilterDepth_4 : IfxScuEru.h

IfxScuEru_InputFilterDepth_5 : IfxScuEru.h

IfxScuEru_InputFilterDepth_6 : IfxScuEru.h

IfxScuEru_InputFilterDepth_7 : IfxScuEru.h

IfxScuEru_InputFilterDepth_8 : IfxScuEru.h

IfxScuEru_InputFilterDepth_9 : IfxScuEru.h

IfxScuEru_InputFilterDepth_disable : IfxScuEru.h

IfxScuEru_InputFilterPredivider : IfxScuEru.h

IfxScuEru_InputFilterPredivider_1 : IfxScuEru.h

IfxScuEru_InputFilterPredivider_10 : IfxScuEru.h

IfxScuEru_InputFilterPredivider_11 : IfxScuEru.h

IfxScuEru_InputFilterPredivider_12 : IfxScuEru.h

IfxScuEru_InputFilterPredivider_13 : IfxScuEru.h

IfxScuEru_InputFilterPredivider_14 : IfxScuEru.h

IfxScuEru_InputFilterPredivider_15 : IfxScuEru.h

IfxScuEru_InputFilterPredivider_2 : IfxScuEru.h

IfxScuEru_InputFilterPredivider_3 : IfxScuEru.h

IfxScuEru_InputFilterPredivider_4 : IfxScuEru.h

IfxScuEru_InputFilterPredivider_5 : IfxScuEru.h

IfxScuEru_InputFilterPredivider_6 : IfxScuEru.h

IfxScuEru_InputFilterPredivider_7 : IfxScuEru.h

IfxScuEru_InputFilterPredivider_8 : IfxScuEru.h

IfxScuEru_InputFilterPredivider_9 : IfxScuEru.h

IfxScuEru_InputFilterPredivider_disable : IfxScuEru.h

IfxScuEru_InputFilterRequestSelection : IfxScuEru.h

IfxScuEru_InputFilterRequestSelection_0A : IfxScuEru.h

IfxScuEru_InputFilterRequestSelection_0C : IfxScuEru.h

IfxScuEru_InputFilterRequestSelection_1A : IfxScuEru.h

IfxScuEru_InputFilterRequestSelection_1C : IfxScuEru.h

IfxScuEru_InputFilterRequestSelection_2A : IfxScuEru.h

IfxScuEru_InputFilterRequestSelection_2C : IfxScuEru.h

IfxScuEru_InputFilterRequestSelection_2D : IfxScuEru.h

IfxScuEru_InputFilterRequestSelection_3A : IfxScuEru.h

IfxScuEru_InputFilterRequestSelection_3C : IfxScuEru.h

IfxScuEru_InputFilterRequestSelection_3D : IfxScuEru.h

IfxScuEru_InputFilterRequestSelection_4A : IfxScuEru.h

IfxScuEru_InputFilterRequestSelection_4D : IfxScuEru.h

IfxScuEru_InputFilterRequestSelection_5A : IfxScuEru.h

IfxScuEru_InputFilterRequestSelection_6A : IfxScuEru.h

IfxScuEru_InputFilterRequestSelection_6D : IfxScuEru.h

IfxScuEru_InputFilterRequestSelection_7A : IfxScuEru.h

IfxScuEru_InputFilterRequestSelection_7C : IfxScuEru.h

IfxScuEru_InputNodePointer : IfxScuEru.h

IfxScuEru_InputNodePointer_0 : IfxScuEru.h

IfxScuEru_InputNodePointer_1 : IfxScuEru.h

IfxScuEru_InputNodePointer_2 : IfxScuEru.h

IfxScuEru_InputNodePointer_3 : IfxScuEru.h

IfxScuEru_InputNodePointer_4 : IfxScuEru.h

IfxScuEru_InputNodePointer_5 : IfxScuEru.h

IfxScuEru_InputNodePointer_6 : IfxScuEru.h

IfxScuEru_InputNodePointer_7 : IfxScuEru.h

IfxScuEru_InterruptGatingPattern : IfxScuEru.h

IfxScuEru_InterruptGatingPattern_alwaysActive : IfxScuEru.h

IfxScuEru_InterruptGatingPattern_none : IfxScuEru.h

IfxScuEru_InterruptGatingPattern_patternMatch : IfxScuEru.h

IfxScuEru_InterruptGatingPattern_patternMiss : IfxScuEru.h

IfxScuEru_OutputChannel : IfxScuEru.h

IfxScuEru_OutputChannel_0 : IfxScuEru.h

IfxScuEru_OutputChannel_1 : IfxScuEru.h

IfxScuEru_OutputChannel_2 : IfxScuEru.h

IfxScuEru_OutputChannel_3 : IfxScuEru.h

IfxScuEru_OutputChannel_4 : IfxScuEru.h

IfxScuEru_OutputChannel_5 : IfxScuEru.h

IfxScuEru_OutputChannel_6 : IfxScuEru.h

IfxScuEru_OutputChannel_7 : IfxScuEru.h

IfxScuEru_selectExternalInput() : IfxScuEru.h , IfxScuEru.c

IfxScuEru_setEventFlag() : IfxScuEru.h , IfxScuEru.c

IfxScuEru_setFlagPatternDetection() : IfxScuEru.c , IfxScuEru.h

IfxScuEru_setInputFilterDepth() : IfxScuEru.h

IfxScuEru_setInputFilterPredivider() : IfxScuEru.h

IfxScuEru_setInterruptGatingPattern() : IfxScuEru.h , IfxScuEru.c

IFXSCUERU_TO_REGISTER_BASE : IfxScuEru.c

IfxScuLbist_Application : IfxScuLbist.h

IfxScuLbist_Application_body : IfxScuLbist.h

IfxScuLbist_Application_pt : IfxScuLbist.h

IFXSCULBIST_CFG_PATTERN_A : IfxScu_cfg.h

IFXSCULBIST_CFG_PATTERN_B : IfxScu_cfg.h

IFXSCULBIST_CFG_SCANCHAINLENGTH : IfxScu_cfg.h

IFXSCULBIST_CFG_SEED : IfxScu_cfg.h

IFXSCULBIST_CFG_SIGNATURE_A : IfxScu_cfg.h

IFXSCULBIST_CFG_SIGNATURE_B : IfxScu_cfg.h

IfxScuLbist_defaultConfig : IfxScuLbist.h , IfxScuLbist.c

IfxScuLbist_evaluateResult() : IfxScuLbist.h

IfxScuLbist_Freq : IfxScuLbist.h

IfxScuLbist_Freq_div1 : IfxScuLbist.h

IfxScuLbist_Freq_div10 : IfxScuLbist.h

IfxScuLbist_Freq_div11 : IfxScuLbist.h

IfxScuLbist_Freq_div12 : IfxScuLbist.h

IfxScuLbist_Freq_div13 : IfxScuLbist.h

IfxScuLbist_Freq_div14 : IfxScuLbist.h

IfxScuLbist_Freq_div15 : IfxScuLbist.h

IfxScuLbist_Freq_div16 : IfxScuLbist.h

IfxScuLbist_Freq_div2 : IfxScuLbist.h

IfxScuLbist_Freq_div3 : IfxScuLbist.h

IfxScuLbist_Freq_div4 : IfxScuLbist.h

IfxScuLbist_Freq_div5 : IfxScuLbist.h

IfxScuLbist_Freq_div6 : IfxScuLbist.h

IfxScuLbist_Freq_div7 : IfxScuLbist.h

IfxScuLbist_Freq_div8 : IfxScuLbist.h

IfxScuLbist_Freq_div9 : IfxScuLbist.h

IfxScuLbist_initParameterSetInline() : IfxScuLbist.h

IfxScuLbist_isDone() : IfxScuLbist.h

IfxScuLbist_multiTriggersInline() : IfxScuLbist.h

IfxScuLbist_retriggerInline() : IfxScuLbist.h

IfxScuLbist_SplitShiftSel : IfxScuLbist.h

IfxScuLbist_SplitShiftSel_allScanPartitions : IfxScuLbist.h

IfxScuLbist_SplitShiftSel_fourScanPartitions : IfxScuLbist.h

IfxScuLbist_SplitShiftSel_twoScanPartitions : IfxScuLbist.h

IfxScuLbist_triggerInline() : IfxScuLbist.h

IFXSCURCU_APPLICATIONRESET_MASK : IfxScuRcu.h

IfxScuRcu_clearColdResetStatus() : IfxScuRcu.h

IfxScuRcu_configureResetRequestTrigger() : IfxScuRcu.h

IfxScuRcu_evaluateReset() : IfxScuRcu.h , IfxScuRcu.c

IfxScuRcu_isApplicationReset() : IfxScuRcu.h

IFXSCURCU_PERFORM_RESET_DELAY : IfxScuRcu.c

IfxScuRcu_performReset() : IfxScuRcu.h , IfxScuRcu.c

IFXSCURCU_POWERONRESET_MASK : IfxScuRcu.h

IfxScuRcu_readRawResetStatus() : IfxScuRcu.h

IfxScuRcu_ResetType : IfxScuRcu.h

IfxScuRcu_ResetType_application : IfxScuRcu.h

IfxScuRcu_ResetType_coldpoweron : IfxScuRcu.h

IfxScuRcu_ResetType_debug : IfxScuRcu.h

IfxScuRcu_ResetType_system : IfxScuRcu.h

IfxScuRcu_ResetType_undefined : IfxScuRcu.h

IfxScuRcu_ResetType_warmpoweron : IfxScuRcu.h

IfxScuRcu_Trigger : IfxScuRcu.h

IfxScuRcu_Trigger_cb0 : IfxScuRcu.h

IfxScuRcu_Trigger_cb1 : IfxScuRcu.h

IfxScuRcu_Trigger_cb3 : IfxScuRcu.h

IfxScuRcu_Trigger_esr0 : IfxScuRcu.h

IfxScuRcu_Trigger_esr1 : IfxScuRcu.h

IfxScuRcu_Trigger_evr33 : IfxScuRcu.h

IfxScuRcu_Trigger_evrc : IfxScuRcu.h

IfxScuRcu_Trigger_hsma : IfxScuRcu.h

IfxScuRcu_Trigger_hsms : IfxScuRcu.h

IfxScuRcu_Trigger_portst : IfxScuRcu.h

IfxScuRcu_Trigger_smu : IfxScuRcu.h

IfxScuRcu_Trigger_stbyr : IfxScuRcu.h

IfxScuRcu_Trigger_stm0 : IfxScuRcu.h

IfxScuRcu_Trigger_stm1 : IfxScuRcu.h

IfxScuRcu_Trigger_stm2 : IfxScuRcu.h

IfxScuRcu_Trigger_stm3 : IfxScuRcu.h

IfxScuRcu_Trigger_sw : IfxScuRcu.h

IfxScuRcu_Trigger_swd : IfxScuRcu.h

IfxScuRcu_Trigger_tcu : IfxScuRcu.h

IfxScuRcu_Trigger_tp : IfxScuRcu.h

IfxScuRcu_Trigger_undefined : IfxScuRcu.h

IfxScuWdt_calculateLfsr() : IfxScuWdt.asm.h

IFXSCUWDT_CALCULATELFSR : IfxScuWdt.asm.h

IfxScuWdt_changeCpuWatchdogPassword() : IfxScuWdt.h , IfxScuWdt.c

IfxScuWdt_changeCpuWatchdogReload() : IfxScuWdt.c , IfxScuWdt.h

IfxScuWdt_changeGlobalEndinitPassword() : IfxScuWdt.h , IfxScuWdt.c

IfxScuWdt_changeGlobalSafetyEndinitPassword() : IfxScuWdt.h , IfxScuWdt.c

IfxScuWdt_changeSafetyWatchdogPassword() : IfxScuWdt.c , IfxScuWdt.h

IfxScuWdt_changeSafetyWatchdogReload() : IfxScuWdt.h , IfxScuWdt.c

IfxScuWdt_clearCpuEndinit() : IfxScuWdt.c , IfxScuWdt.h

IfxScuWdt_clearCpuEndinitInline() : IfxScuWdt.h

IfxScuWdt_clearGlobalEndinit() : IfxScuWdt.h , IfxScuWdt.c

IfxScuWdt_clearGlobalSafetyEndinit() : IfxScuWdt.c , IfxScuWdt.h

IfxScuWdt_clearGlobalSafetyEndinitInline() : IfxScuWdt.h

IfxScuWdt_clearSafetyEndinit() : IfxScuWdt.c , IfxScuWdt.h

IfxScuWdt_clearSafetyEndinitInline() : IfxScuWdt.h

IfxScuWdt_disableCpuWatchdog() : IfxScuWdt.h , IfxScuWdt.c

IfxScuWdt_disableSafetyWatchdog() : IfxScuWdt.h , IfxScuWdt.c

IfxScuWdt_enableCpuWatchdog() : IfxScuWdt.h , IfxScuWdt.c

IfxScuWdt_enableSafetyWatchdog() : IfxScuWdt.h , IfxScuWdt.c

IfxScuWdt_enableWatchdogWithDebugger() : IfxScuWdt.c , IfxScuWdt.h

IFXSCUWDT_ENDINIT_WAIT_TIMEOUTCOUNT : IfxScuWdt.h

IfxScuWdt_getCpuWatchdogEndInit() : IfxScuWdt.h , IfxScuWdt.c

IfxScuWdt_getCpuWatchdogEndInitInline() : IfxScuWdt.h

IfxScuWdt_getCpuWatchdogPassword() : IfxScuWdt.c , IfxScuWdt.h

IfxScuWdt_getCpuWatchdogPasswordInline() : IfxScuWdt.h

IfxScuWdt_getCpuWatchdogStatus() : IfxScuWdt.h , IfxScuWdt.c

IfxScuWdt_getGlobalEndinitPassword() : IfxScuWdt.h , IfxScuWdt.c

IfxScuWdt_getGlobalSafetyEndinitPassword() : IfxScuWdt.c , IfxScuWdt.h

IfxScuWdt_getGlobalSafetyEndinitPasswordInline() : IfxScuWdt.h

IfxScuWdt_getSafetyWatchdogEndInit() : IfxScuWdt.h

IfxScuWdt_getSafetyWatchdogPassword() : IfxScuWdt.h , IfxScuWdt.c

IfxScuWdt_getSafetyWatchdogPasswordInline() : IfxScuWdt.h

IfxScuWdt_initConfig() : IfxScuWdt.h , IfxScuWdt.c

IfxScuWdt_initCpuWatchdog() : IfxScuWdt.h , IfxScuWdt.c

IfxScuWdt_initSafetyWatchdog() : IfxScuWdt.c , IfxScuWdt.h

IFXSCUWDT_RESET_PASSWORD : IfxScuWdt.c

IfxScuWdt_serviceCpuWatchdog() : IfxScuWdt.c , IfxScuWdt.h

IfxScuWdt_serviceSafetyWatchdog() : IfxScuWdt.c , IfxScuWdt.h

IfxScuWdt_setCpuEndinit() : IfxScuWdt.h , IfxScuWdt.c

IfxScuWdt_setCpuEndinitInline() : IfxScuWdt.h

IfxScuWdt_setGlobalEndinit() : IfxScuWdt.h , IfxScuWdt.c

IfxScuWdt_setGlobalSafetyEndinit() : IfxScuWdt.h , IfxScuWdt.c

IfxScuWdt_setGlobalSafetyEndinitInline() : IfxScuWdt.h

IfxScuWdt_setSafetyEndinit() : IfxScuWdt.h , IfxScuWdt.c

IfxScuWdt_setSafetyEndinitInline() : IfxScuWdt.h

IfxSent_AlternateInput : IfxSent.h

IfxSent_AlternateInput_0 : IfxSent.h

IfxSent_AlternateInput_1 : IfxSent.h

IfxSent_AlternateInput_2 : IfxSent.h

IfxSent_AlternateInput_3 : IfxSent.h

IFXSENT_CFG_CHANNEL_INTEN : IfxSent_cfg.h

IFXSENT_CFG_STEP_RANGE : IfxSent_cfg.h

IFXSENT_CFG_TIMEOUT_VALUE : IfxSent_cfg.h

IfxSent_ChannelId : IfxSent_cfg.h

IfxSent_ChannelId_0 : IfxSent_cfg.h

IfxSent_ChannelId_1 : IfxSent_cfg.h

IfxSent_ChannelId_10 : IfxSent_cfg.h

IfxSent_ChannelId_11 : IfxSent_cfg.h

IfxSent_ChannelId_12 : IfxSent_cfg.h

IfxSent_ChannelId_13 : IfxSent_cfg.h

IfxSent_ChannelId_14 : IfxSent_cfg.h

IfxSent_ChannelId_15 : IfxSent_cfg.h

IfxSent_ChannelId_16 : IfxSent_cfg.h

IfxSent_ChannelId_17 : IfxSent_cfg.h

IfxSent_ChannelId_18 : IfxSent_cfg.h

IfxSent_ChannelId_19 : IfxSent_cfg.h

IfxSent_ChannelId_2 : IfxSent_cfg.h

IfxSent_ChannelId_20 : IfxSent_cfg.h

IfxSent_ChannelId_21 : IfxSent_cfg.h

IfxSent_ChannelId_22 : IfxSent_cfg.h

IfxSent_ChannelId_23 : IfxSent_cfg.h

IfxSent_ChannelId_24 : IfxSent_cfg.h

IfxSent_ChannelId_3 : IfxSent_cfg.h

IfxSent_ChannelId_4 : IfxSent_cfg.h

IfxSent_ChannelId_5 : IfxSent_cfg.h

IfxSent_ChannelId_6 : IfxSent_cfg.h

IfxSent_ChannelId_7 : IfxSent_cfg.h

IfxSent_ChannelId_8 : IfxSent_cfg.h

IfxSent_ChannelId_9 : IfxSent_cfg.h

IfxSent_ChannelId_none : IfxSent_cfg.h

IfxSent_ChannelStatus : IfxSent.h

IfxSent_ChannelStatus_initialize : IfxSent.h

IfxSent_ChannelStatus_running : IfxSent.h

IfxSent_ChannelStatus_stop : IfxSent.h

IfxSent_ChannelStatus_synchronize : IfxSent.h

IfxSent_clearInterruptStatus() : IfxSent.h

IfxSent_ClockDividerMode : IfxSent.h

IfxSent_ClockDividerMode_fractional : IfxSent.h

IfxSent_ClockDividerMode_normal : IfxSent.h

IfxSent_ClockDividerMode_off : IfxSent.h

IfxSent_ConfigBit : IfxSent.h

IfxSent_ConfigBit_0 : IfxSent.h

IfxSent_ConfigBit_1 : IfxSent.h

IfxSent_DigitalGlitchesLength : IfxSent.h

IfxSent_DigitalGlitchesLength_1 : IfxSent.h

IfxSent_DigitalGlitchesLength_10 : IfxSent.h

IfxSent_DigitalGlitchesLength_11 : IfxSent.h

IfxSent_DigitalGlitchesLength_12 : IfxSent.h

IfxSent_DigitalGlitchesLength_13 : IfxSent.h

IfxSent_DigitalGlitchesLength_14 : IfxSent.h

IfxSent_DigitalGlitchesLength_15 : IfxSent.h

IfxSent_DigitalGlitchesLength_2 : IfxSent.h

IfxSent_DigitalGlitchesLength_3 : IfxSent.h

IfxSent_DigitalGlitchesLength_4 : IfxSent.h

IfxSent_DigitalGlitchesLength_5 : IfxSent.h

IfxSent_DigitalGlitchesLength_6 : IfxSent.h

IfxSent_DigitalGlitchesLength_7 : IfxSent.h

IfxSent_DigitalGlitchesLength_8 : IfxSent.h

IfxSent_DigitalGlitchesLength_9 : IfxSent.h

IfxSent_DigitalGlitchesLength_off : IfxSent.h

IfxSent_disableChannel() : IfxSent.h

IfxSent_disableModule() : IfxSent.h

IfxSent_enableChannel() : IfxSent.h

IfxSent_enableModule() : IfxSent.h

IfxSent_ExtendedSerialFrameMode : IfxSent.h

IfxSent_ExtendedSerialFrameMode_extended : IfxSent.h

IfxSent_ExtendedSerialFrameMode_standard : IfxSent.h

IfxSent_ExternalTrigger : IfxSent.h

IfxSent_ExternalTrigger_0 : IfxSent.h

IfxSent_ExternalTrigger_1 : IfxSent.h

IfxSent_ExternalTrigger_10 : IfxSent.h

IfxSent_ExternalTrigger_11 : IfxSent.h

IfxSent_ExternalTrigger_12 : IfxSent.h

IfxSent_ExternalTrigger_13 : IfxSent.h

IfxSent_ExternalTrigger_14 : IfxSent.h

IfxSent_ExternalTrigger_15 : IfxSent.h

IfxSent_ExternalTrigger_2 : IfxSent.h

IfxSent_ExternalTrigger_3 : IfxSent.h

IfxSent_ExternalTrigger_4 : IfxSent.h

IfxSent_ExternalTrigger_5 : IfxSent.h

IfxSent_ExternalTrigger_6 : IfxSent.h

IfxSent_ExternalTrigger_7 : IfxSent.h

IfxSent_ExternalTrigger_8 : IfxSent.h

IfxSent_ExternalTrigger_9 : IfxSent.h

IfxSent_FrameCheckMode : IfxSent.h

IfxSent_FrameCheckMode_futureSuncPulse : IfxSent.h

IfxSent_FrameCheckMode_pastSyncPulse : IfxSent.h

IfxSent_getAndClearInterruptStatus() : IfxSent.h

IfxSent_getChannelInterruptStatus() : IfxSent.h

IfxSent_getChannelSrc() : IfxSent.h

IfxSent_getChannelUnitTime() : IfxSent.c , IfxSent.h

IfxSent_getFrameLengthWithPausePulse() : IfxSent.h

IfxSent_getInterruptStatus() : IfxSent.h

IfxSent_getModuleClock() : IfxSent.c , IfxSent.h

IfxSent_initializeChannelUnitTime() : IfxSent.h , IfxSent.c

IfxSent_initializeModuleClock() : IfxSent.h , IfxSent.c

IfxSent_initSentPin() : IfxSent.h

IfxSent_initSpcPin() : IfxSent.h

IFXSENT_INTERRUPT_STATUS_ERROR_FLAGS : IfxSent.h

IfxSent_InterruptNodePointer : IfxSent.h

IfxSent_InterruptNodePointer_trigo0 : IfxSent.h

IfxSent_InterruptNodePointer_trigo1 : IfxSent.h

IfxSent_InterruptNodePointer_trigo2 : IfxSent.h

IfxSent_InterruptNodePointer_trigo3 : IfxSent.h

IfxSent_InterruptNodePointer_trigo4 : IfxSent.h

IfxSent_InterruptNodePointer_trigo5 : IfxSent.h

IfxSent_InterruptNodePointer_trigo6 : IfxSent.h

IfxSent_InterruptNodePointer_trigo7 : IfxSent.h

IfxSent_InterruptNodePointer_trigo8 : IfxSent.h

IfxSent_InterruptNodePointer_trigo9 : IfxSent.h

IfxSent_InterruptSource : IfxSent.h

IfxSent_InterruptSource_crci : IfxSent.h

IfxSent_InterruptSource_fdi : IfxSent.h

IfxSent_InterruptSource_fri : IfxSent.h

IfxSent_InterruptSource_nni : IfxSent.h

IfxSent_InterruptSource_nvi : IfxSent.h

IfxSent_InterruptSource_rbi : IfxSent.h

IfxSent_InterruptSource_rdi : IfxSent.h

IfxSent_InterruptSource_rsi : IfxSent.h

IfxSent_InterruptSource_scri : IfxSent.h

IfxSent_InterruptSource_sdi : IfxSent.h

IfxSent_InterruptSource_tbi : IfxSent.h

IfxSent_InterruptSource_tdi : IfxSent.h

IfxSent_InterruptSource_wdi : IfxSent.h

IfxSent_InterruptSource_wsi : IfxSent.h

IfxSent_isModuleEnabled() : IfxSent.h

IfxSent_isModuleSuspended() : IfxSent.h

IfxSent_Nibble : IfxSent.h

IfxSent_Nibble_0 : IfxSent.h

IfxSent_Nibble_1 : IfxSent.h

IfxSent_Nibble_2 : IfxSent.h

IfxSent_Nibble_3 : IfxSent.h

IfxSent_Nibble_4 : IfxSent.h

IfxSent_Nibble_5 : IfxSent.h

IfxSent_Nibble_6 : IfxSent.h

IfxSent_Nibble_7 : IfxSent.h

IFXSENT_NUM_CHANNELS : IfxSent_cfg.h

IFXSENT_NUM_MODULES : IfxSent_cfg.h

IFXSENT_PINMAP_NUM_CHANNELS : IfxSent_PinMap.h

IFXSENT_PINMAP_NUM_MODULES : IfxSent_PinMap.h

IFXSENT_PINMAP_SENT_IN_NUM_ITEMS : IfxSent_PinMap.h

IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS : IfxSent_PinMap.h

IfxSent_readReceivedChannelStatus() : IfxSent.h

IfxSent_readReceivedCrc() : IfxSent.h

IfxSent_readReceivedData() : IfxSent.h

IfxSent_readReceivedStatus() : IfxSent.h

IfxSent_readReceivedStatusAndCommunicationNibble() : IfxSent.h

IfxSent_readReceivedTimeStamp() : IfxSent.h

IfxSent_readSpcDelayLength() : IfxSent.h

IfxSent_readSpcPulseLength() : IfxSent.h

IfxSent_resetModule() : IfxSent.h , IfxSent.c

IfxSent_SENT0A_P40_0_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT0B_P00_1_IN : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_SENT0C_P02_8_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT10A_P40_10_IN : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_SENT10B_P00_11_IN : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_SENT10C_P32_5_IN : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_SENT10D_P15_2_IN : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_SENT11A_P40_11_IN : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_SENT11B_P00_12_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT11C_P32_6_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT11D_P15_4_IN : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_SENT12A_P40_12_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT12B_P02_4_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT12C_P32_7_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT13A_P40_13_IN : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_SENT13B_P02_3_IN : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_SENT13C_P33_0_IN : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_SENT14A_P40_14_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT14B_P02_2_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT14C_P33_7_IN : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_SENT15A_P40_15_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT15B_P01_1_IN : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_SENT15C_P10_9_IN : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_SENT16A_P41_0_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT16B_P01_9_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT16C_P10_10_IN : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_SENT17A_P41_1_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT17B_P01_8_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT17C_P10_14_IN : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_SENT17D_P14_0_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT18A_P41_2_IN : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_SENT18B_P01_10_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT18C_P10_13_IN : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_SENT18D_P14_1_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT19A_P41_3_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT19B_P01_11_IN : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_SENT19C_P10_11_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT1A_P40_1_IN : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_SENT1B_P00_2_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT1C_P02_7_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT20A_P41_4_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT20B_P02_9_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT20C_P31_8_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT21A_P41_5_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT21B_P02_10_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT21C_P31_9_IN : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_SENT22A_P41_6_IN : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_SENT22B_P02_11_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT22C_P31_10_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT23A_P41_7_IN : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_SENT23B_P02_12_IN : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_SENT23C_P31_11_IN : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_SENT24A_P41_8_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT24B_P02_13_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT24C_P31_12_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT2A_P40_2_IN : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_SENT2B_P00_3_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT2C_P02_6_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT3A_P40_3_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT3B_P00_4_IN : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_SENT3C_P02_5_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT4A_P40_4_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT4B_P00_5_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT4C_P33_6_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT5A_P40_5_IN : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_SENT5B_P00_6_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT5C_P33_5_IN : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_SENT6A_P40_6_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT6B_P00_7_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT6C_P33_4_IN : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_SENT7A_P40_7_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT7B_P00_8_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT7C_P33_3_IN : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_SENT8A_P40_8_IN : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_SENT8B_P00_9_IN : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_SENT8C_P33_2_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT9A_P40_9_IN : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_SENT9B_P00_10_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT9C_P33_1_IN : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_Sent_deInitModule() : IfxSent_Sent.h , IfxSent_Sent.c

IfxSent_Sent_getAndClearInterruptStatus() : IfxSent_Sent.h

IfxSent_Sent_In_pinTable : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_Sent_initChannel() : IfxSent_Sent.h , IfxSent_Sent.c

IfxSent_Sent_initChannelConfig() : IfxSent_Sent.c , IfxSent_Sent.h

IfxSent_Sent_initModule() : IfxSent_Sent.c , IfxSent_Sent.h

IfxSent_Sent_initModuleConfig() : IfxSent_Sent.c , IfxSent_Sent.h

IfxSent_Sent_readChannelSerialDataFrame() : IfxSent_Sent.h , IfxSent_Sent.c

IfxSent_Sent_readChannelSerialMessageFrame() : IfxSent_Sent.h , IfxSent_Sent.c

IfxSent_setAltiInput() : IfxSent.h

IfxSent_setChannelFractionalDivider() : IfxSent.h

IfxSent_setChannelPreDivider() : IfxSent.h

IfxSent_setSleepMode() : IfxSent.h

IfxSent_setSuspendMode() : IfxSent.h

IfxSent_setTimeStampPredivider() : IfxSent.h

IfxSent_setWatchDogTimerLimit() : IfxSent.h

IfxSent_SleepMode : IfxSent.h

IfxSent_SleepMode_disable : IfxSent.h

IfxSent_SleepMode_enable : IfxSent.h

IfxSent_SPC0_P00_1_OUT : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SPC1_P02_7_OUT : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SPC2_P00_3_OUT : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SPC3_P00_4_OUT : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_SPC4_P00_5_OUT : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_SPC5_P00_6_OUT : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SPC6_P00_7_OUT : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SPC7_P00_8_OUT : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SPC8_P00_9_OUT : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_SPC9_P00_10_OUT : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_Spc_Out_pinTable : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SpcMode : IfxSent.h

IfxSent_SpcMode_bidirectional : IfxSent.h

IfxSent_SpcMode_range : IfxSent.h

IfxSent_SpcMode_sync : IfxSent.h

IfxSent_SuspendMode : IfxSent.h

IfxSent_SuspendMode_hard : IfxSent.h

IfxSent_SuspendMode_none : IfxSent.h

IfxSent_SuspendMode_soft : IfxSent.h

IfxSent_TimeBase : IfxSent.h

IfxSent_TimeBase_measuredFrequency : IfxSent.h

IfxSent_TimeBase_nominalFrequency : IfxSent.h

IfxSent_TriggerSource : IfxSent.h

IfxSent_TriggerSource_externalTrigger : IfxSent.h

IfxSent_TriggerSource_fallingEdge : IfxSent.h

IfxSent_TriggerSource_immediate : IfxSent.h

IfxSent_TriggerSource_off : IfxSent.h

IfxSmu_activateFSP() : IfxSmu.c , IfxSmu.h

IfxSmu_activateRunState() : IfxSmu.c , IfxSmu.h

IfxSmu_Alarm : IfxSmu_cfg.h

IfxSmu_Alarm_BBB_BusErrorEvent : IfxSmu_cfg.h

IfxSmu_Alarm_CAN_CAN_MiscellaneousErrorDetection : IfxSmu_cfg.h

IfxSmu_Alarm_CAN_CAN_SingleBitErrorCorrection : IfxSmu_cfg.h

IfxSmu_Alarm_CAN_CAN_UncorrectableErrorDetection : IfxSmu_cfg.h

IfxSmu_Alarm_CCU_Backup_ClockAliveAlarm : IfxSmu_cfg.h

IfxSmu_Alarm_CCU_Backup_ClockOutOfRangeAlarm : IfxSmu_cfg.h

IfxSmu_Alarm_CCU_Safety_FfCorrectableErrorDetected : IfxSmu_cfg.h

IfxSmu_Alarm_CCU_Safety_FfUncorrectableErrorDetected : IfxSmu_cfg.h

IfxSmu_Alarm_CERBERUS_Safety_FfUncorrectableErrorDetected : IfxSmu_cfg.h

IfxSmu_Alarm_CONVERTER_Phase_SyncronizerError : IfxSmu_cfg.h

IfxSmu_Alarm_CPU0_Buslevel_MpuViolation : IfxSmu_cfg.h

IfxSmu_Alarm_CPU0_CPU_DataSriInterfaceLoadStoreEdcError : IfxSmu_cfg.h

IfxSmu_Alarm_CPU0_CPU_ExceptionInterruptTrap : IfxSmu_cfg.h

IfxSmu_Alarm_CPU0_CPU_InstructionFetchSriInterfaceEdcError : IfxSmu_cfg.h

IfxSmu_Alarm_CPU0_DCACHETAG_MiscellaneousErrorDetection : IfxSmu_cfg.h

IfxSmu_Alarm_CPU0_DCACHETAG_SingleBitErrorCorrection : IfxSmu_cfg.h

IfxSmu_Alarm_CPU0_DCACHETAG_UncorrectableErrorDetection : IfxSmu_cfg.h

IfxSmu_Alarm_CPU0_DSPRDCACHEDLMU_MiscelleniousErrorDetection : IfxSmu_cfg.h

IfxSmu_Alarm_CPU0_DSPRDCACHEDLMU_SingleBitErrorCorrection : IfxSmu_cfg.h

IfxSmu_Alarm_CPU0_DSPRDCACHEDLMU_UncorrectableErrorDetection : IfxSmu_cfg.h

IfxSmu_Alarm_CPU0_Lockstep_ComparatorError : IfxSmu_cfg.h

IfxSmu_Alarm_CPU0_PCACHETAG_MiscellaneousErrorDetection : IfxSmu_cfg.h

IfxSmu_Alarm_CPU0_PCACHETAG_UncorrectableErrorDetection : IfxSmu_cfg.h

IfxSmu_Alarm_CPU0_PFI0_PFLASH0_ReadPathError : IfxSmu_cfg.h

IfxSmu_Alarm_CPU0_PSPRPCACHE_MiscellaneousErrorDetection : IfxSmu_cfg.h

IfxSmu_Alarm_CPU0_PSPRPCACHE_SingleBitErrorCorrection : IfxSmu_cfg.h

IfxSmu_Alarm_CPU0_PSPRPCACHE_UncorrectableErrorDetection : IfxSmu_cfg.h

IfxSmu_Alarm_CPU1_Buslevel_MpuViolation : IfxSmu_cfg.h

IfxSmu_Alarm_CPU1_CPU_DataSriInterfaceLoadStoreEdcError : IfxSmu_cfg.h

IfxSmu_Alarm_CPU1_CPU_ExceptionInterruptTrap : IfxSmu_cfg.h

IfxSmu_Alarm_CPU1_CPU_InstructionFetchSriInterfaceEdcError : IfxSmu_cfg.h

IfxSmu_Alarm_CPU1_DCACHETAG_MiscellaneousErrorDetection : IfxSmu_cfg.h

IfxSmu_Alarm_CPU1_DCACHETAG_SingleBitErrorCorrection : IfxSmu_cfg.h

IfxSmu_Alarm_CPU1_DCACHETAG_UncorrectableErrorDetection : IfxSmu_cfg.h

IfxSmu_Alarm_CPU1_DSPRDCACHEDLMU_MiscellaneousErrorDetection : IfxSmu_cfg.h

IfxSmu_Alarm_CPU1_DSPRDCACHEDLMU_SingleBitErrorCorrection : IfxSmu_cfg.h

IfxSmu_Alarm_CPU1_DSPRDCACHEDLMU_UncorrectableErrorDetection : IfxSmu_cfg.h

IfxSmu_Alarm_CPU1_Lockstep_ComparatorError : IfxSmu_cfg.h

IfxSmu_Alarm_CPU1_PCACHETAG_MiscellaneousErrorDetection : IfxSmu_cfg.h

IfxSmu_Alarm_CPU1_PCACHETAG_UncorrectableErrorDetection : IfxSmu_cfg.h

IfxSmu_Alarm_CPU1_PFI1_PFLASH1_ReadPathError : IfxSmu_cfg.h

IfxSmu_Alarm_CPU1_PSPRPCACHE_MiscellaneousErrorDetection : IfxSmu_cfg.h

IfxSmu_Alarm_CPU1_PSPRPCACHE_SingleBitErrorCorrection : IfxSmu_cfg.h

IfxSmu_Alarm_CPU1_PSPRPCACHE_UncorrectableErrorDetection : IfxSmu_cfg.h

IfxSmu_Alarm_CPU2_Buslevel_MpuViolation : IfxSmu_cfg.h

IfxSmu_Alarm_CPU2_CPU_DataSriInterfaceLoadStoreEdcError : IfxSmu_cfg.h

IfxSmu_Alarm_CPU2_CPU_ExceptionInterruptTrap : IfxSmu_cfg.h

IfxSmu_Alarm_CPU2_CPU_InstructionFetchSriInterfaceEdcError : IfxSmu_cfg.h

IfxSmu_Alarm_CPU2_DCACHETAG_MiscellaneousErrorDetection : IfxSmu_cfg.h

IfxSmu_Alarm_CPU2_DCACHETAG_SingleBitErrorCorrection : IfxSmu_cfg.h

IfxSmu_Alarm_CPU2_DCACHETAG_UncorrectableErrorDetection : IfxSmu_cfg.h

IfxSmu_Alarm_CPU2_DSPRDCACHEDLMU_MiscellaneousErrorDetection : IfxSmu_cfg.h

IfxSmu_Alarm_CPU2_DSPRDCACHEDLMU_SingleBitErrorCorrection : IfxSmu_cfg.h

IfxSmu_Alarm_CPU2_DSPRDCACHEDLMU_UncorrectableErrorDetection : IfxSmu_cfg.h

IfxSmu_Alarm_CPU2_Lockstep_ComparatorError : IfxSmu_cfg.h

IfxSmu_Alarm_CPU2_PCACHETAG_MiscellaneousErrorDetection : IfxSmu_cfg.h

IfxSmu_Alarm_CPU2_PCACHETAG_UncorrectableErrorDetection : IfxSmu_cfg.h

IfxSmu_Alarm_CPU2_PFI2_PFLASH2_ReadPathError : IfxSmu_cfg.h

IfxSmu_Alarm_CPU2_PSPRPCACHE_MiscellaneousErrorDetection : IfxSmu_cfg.h

IfxSmu_Alarm_CPU2_PSPRPCACHE_SingleBitErrorCorrection : IfxSmu_cfg.h

IfxSmu_Alarm_CPU2_PSPRPCACHE_UncorrectableErrorDetection : IfxSmu_cfg.h

IfxSmu_Alarm_CPU3_Buslevel_MpuViolation : IfxSmu_cfg.h

IfxSmu_Alarm_CPU3_CPU_DataSriInterfaceLoadStoreEdcError : IfxSmu_cfg.h

IfxSmu_Alarm_CPU3_CPU_ExceptionInterruptTrap : IfxSmu_cfg.h

IfxSmu_Alarm_CPU3_CPU_InstructionFetchSriInterfaceEdcError : IfxSmu_cfg.h

IfxSmu_Alarm_CPU3_DCACHETAG_MiscellaneousErrorDetection : IfxSmu_cfg.h

IfxSmu_Alarm_CPU3_DCACHETAG_SingleBitErrorCorrection : IfxSmu_cfg.h

IfxSmu_Alarm_CPU3_DCACHETAG_UncorrectableErrorDetection : IfxSmu_cfg.h

IfxSmu_Alarm_CPU3_DSPRDCACHEDLMU_MiscellaneousErrorDetection : IfxSmu_cfg.h

IfxSmu_Alarm_CPU3_DSPRDCACHEDLMU_SingleBitErrorCorrection : IfxSmu_cfg.h

IfxSmu_Alarm_CPU3_DSPRDCACHEDLMU_UncorrectableErrorDetection : IfxSmu_cfg.h

IfxSmu_Alarm_CPU3_Lockstep_ComparatorError : IfxSmu_cfg.h

IfxSmu_Alarm_CPU3_PCACHETAG_MiscellaneousErrorDetection : IfxSmu_cfg.h

IfxSmu_Alarm_CPU3_PCACHETAG_UncorrectableErrorDetection : IfxSmu_cfg.h

IfxSmu_Alarm_CPU3_PFI3_PFLASH3_ReadPathError : IfxSmu_cfg.h

IfxSmu_Alarm_CPU3_PSPRPCACHE_MiscellaneousErrorDetection : IfxSmu_cfg.h

IfxSmu_Alarm_CPU3_PSPRPCACHE_SingleBitErrorCorrection : IfxSmu_cfg.h

IfxSmu_Alarm_CPU3_PSPRPCACHE_UncorrectableErrorDetection : IfxSmu_cfg.h

IfxSmu_Alarm_DMA_DMASRI_EccError : IfxSmu_cfg.h

IfxSmu_Alarm_DMA_Safety_FfUncorrectableErrorDetected : IfxSmu_cfg.h

IfxSmu_Alarm_DMU_EDC_AddressPhaseError : IfxSmu_cfg.h

IfxSmu_Alarm_DMU_EDC_WritePhaseError : IfxSmu_cfg.h

IfxSmu_Alarm_DTS_core_Over_TemperatureAlarm : IfxSmu_cfg.h

IfxSmu_Alarm_DTS_core_Under_TemperatureAlarm : IfxSmu_cfg.h

IfxSmu_Alarm_DTS_Temperature_Overflow : IfxSmu_cfg.h

IfxSmu_Alarm_DTS_Temperature_Underflow : IfxSmu_cfg.h

IfxSmu_Alarm_EMEM_Lockstep_ControlLogicInputAlarm : IfxSmu_cfg.h

IfxSmu_Alarm_EMEM_Safety_FfUncorrectableErrorDetected : IfxSmu_cfg.h

IfxSmu_Alarm_EMEM_SEP_ControlLogicAlarm : IfxSmu_cfg.h

IfxSmu_Alarm_EMEM_Unexpected_WriteToEmemAlarm : IfxSmu_cfg.h

IfxSmu_Alarm_ERAY_ERAY_MiscellaneousErrorDetection : IfxSmu_cfg.h

IfxSmu_Alarm_ERAY_ERAY_SingleBitErrorCorrection : IfxSmu_cfg.h

IfxSmu_Alarm_ERAY_ERAY_UncorrectableErrorDetection : IfxSmu_cfg.h

IfxSmu_Alarm_EVR_Overvoltage_Alarm : IfxSmu_cfg.h

IfxSmu_Alarm_EVR_Short_ToLowHightAlarm : IfxSmu_cfg.h

IfxSmu_Alarm_EVR_Undervoltage_Alarm : IfxSmu_cfg.h

IfxSmu_Alarm_FSI_CPUFLASHCON_ConfigurationError : IfxSmu_cfg.h

IfxSmu_Alarm_FSI_Double_BitCorrectionTrackingBufferFull : IfxSmu_cfg.h

IfxSmu_Alarm_FSI_Flash_StoredConfigurationError : IfxSmu_cfg.h

IfxSmu_Alarm_FSI_Multiple_BitErrorDetectionTrackingBufferFull : IfxSmu_cfg.h

IfxSmu_Alarm_FSI_PFlash_DoubleBitError : IfxSmu_cfg.h

IfxSmu_Alarm_FSI_PFlash_EccError : IfxSmu_cfg.h

IfxSmu_Alarm_FSI_PFlash_EdcError : IfxSmu_cfg.h

IfxSmu_Alarm_FSI_PFlash_SingleBitError : IfxSmu_cfg.h

IfxSmu_Alarm_FSI_Single_BitCorrectionTrackingBufferFull : IfxSmu_cfg.h

IfxSmu_Alarm_FSI_Zero_BitErrorTrackingBufferFull : IfxSmu_cfg.h

IfxSmu_Alarm_GTM_GTM_MiscellaneousErrorDetection : IfxSmu_cfg.h

IfxSmu_Alarm_GTM_GTM_SingleBitErrorCorrection : IfxSmu_cfg.h

IfxSmu_Alarm_GTM_GTM_UncorrectableErrorDetection : IfxSmu_cfg.h

IfxSmu_Alarm_HSM_Overvoltage_Alarm : IfxSmu_cfg.h

IfxSmu_Alarm_HSM_Undervoltage_Alarm : IfxSmu_cfg.h

IfxSmu_Alarm_HSSL_HSSL0EDC_ReadPhaseError : IfxSmu_cfg.h

IfxSmu_Alarm_IOM_Pin_MismatchIndication : IfxSmu_cfg.h

IfxSmu_Alarm_IOM_Safety_FfUncorrectableErrorDetected : IfxSmu_cfg.h

IfxSmu_Alarm_IR_EDC_ConfigurationDataPathError : IfxSmu_cfg.h

IfxSmu_Alarm_IR_Safety_FfUncorrectableErrorDetected : IfxSmu_cfg.h

IfxSmu_Alarm_LMU_Buslevel_MpuError : IfxSmu_cfg.h

IfxSmu_Alarm_LMU_ECC_Error : IfxSmu_cfg.h

IfxSmu_Alarm_LMU_EDC_AddressPhaseError : IfxSmu_cfg.h

IfxSmu_Alarm_LMU_EDC_ReadPhaseError : IfxSmu_cfg.h

IfxSmu_Alarm_LMU_EDC_WritePhaseError : IfxSmu_cfg.h

IfxSmu_Alarm_LMU_FSI_RAM_LMUDMU_MiscellaneousErrorDetection : IfxSmu_cfg.h

IfxSmu_Alarm_LMU_FSI_RAM_LMUDMU_SingleBitErrorCorrection : IfxSmu_cfg.h

IfxSmu_Alarm_LMU_FSI_RAM_LMUDMU_UncorrectableErrorDetection : IfxSmu_cfg.h

IfxSmu_Alarm_LMU_Lockstep_ComparatorError : IfxSmu_cfg.h

IfxSmu_Alarm_LMU_Lockstep_ControlError : IfxSmu_cfg.h

IfxSmu_Alarm_Misc_MISC_MiscellaneousErrorDetection : IfxSmu_cfg.h

IfxSmu_Alarm_Misc_MISC_SingleBitErrorCorrection : IfxSmu_cfg.h

IfxSmu_Alarm_Misc_MISC_UncorrectableErrorDetection : IfxSmu_cfg.h

IfxSmu_Alarm_MTU_Safety_FfUncorrectableErrorDetected : IfxSmu_cfg.h

IfxSmu_Alarm_PMS_Safety_FfUncorrectableErrorDetected : IfxSmu_cfg.h

IfxSmu_Alarm_SCU_CPU0_WatchdogTimeOut : IfxSmu_cfg.h

IfxSmu_Alarm_SCU_CPU1_WatchdogTimeOut : IfxSmu_cfg.h

IfxSmu_Alarm_SCU_CPU2_WatchdogTimeOut : IfxSmu_cfg.h

IfxSmu_Alarm_SCU_CPU3_WatchdogTimeOut : IfxSmu_cfg.h

IfxSmu_Alarm_SCU_External_EmergencyStopSignalEvent : IfxSmu_cfg.h

IfxSmu_Alarm_SCU_External_RequestUnitAlarm0 : IfxSmu_cfg.h

IfxSmu_Alarm_SCU_External_RequestUnitAlarm1 : IfxSmu_cfg.h

IfxSmu_Alarm_SCU_External_RequestUnitAlarm2 : IfxSmu_cfg.h

IfxSmu_Alarm_SCU_External_RequestUnitAlarm3 : IfxSmu_cfg.h

IfxSmu_Alarm_SCU_External_RequestUnitAlarm4 : IfxSmu_cfg.h

IfxSmu_Alarm_SCU_External_RequestUnitAlarm5 : IfxSmu_cfg.h

IfxSmu_Alarm_SCU_External_RequestUnitAlarm6 : IfxSmu_cfg.h

IfxSmu_Alarm_SCU_External_RequestUnitAlarm7 : IfxSmu_cfg.h

IfxSmu_Alarm_SCU_LBIST_Alarm : IfxSmu_cfg.h

IfxSmu_Alarm_SCU_LBIST_TestModeAlarm : IfxSmu_cfg.h

IfxSmu_Alarm_SCU_Lockstep_DualRailError : IfxSmu_cfg.h

IfxSmu_Alarm_SCU_OS_CClockFrequencyOutOfRange : IfxSmu_cfg.h

IfxSmu_Alarm_SCU_Pad_HeatingAlarm : IfxSmu_cfg.h

IfxSmu_Alarm_SCU_Peripheral_PllDcoLossOfLockEvent : IfxSmu_cfg.h

IfxSmu_Alarm_SCU_Safety_FfUncorrectableErrorDetected : IfxSmu_cfg.h

IfxSmu_Alarm_SCU_Safety_WatchdogTimeOut : IfxSmu_cfg.h

IfxSmu_Alarm_SCU_System_PllDcoLossOfLockEvent : IfxSmu_cfg.h

IfxSmu_Alarm_SCU_Watchdog_TimeOut : IfxSmu_cfg.h

IfxSmu_Alarm_SFI_BBB_EDC_AddressPhaseError : IfxSmu_cfg.h

IfxSmu_Alarm_SFI_BBB_EDC_WritePhaseError : IfxSmu_cfg.h

IfxSmu_Alarm_SFI_SPB_EDC_ReadPhaseError : IfxSmu_cfg.h

IfxSmu_Alarm_SMU_Access_EnableErrorDetected : IfxSmu_cfg.h

IfxSmu_Alarm_SMU_core_Safety_FfUncorrectableErrorDetected : IfxSmu_cfg.h

IfxSmu_Alarm_SMU_Error_PinFaultStateActivation : IfxSmu_cfg.h

IfxSmu_Alarm_SMU_Safety_FfCorrectableErrorDetected : IfxSmu_cfg.h

IfxSmu_Alarm_SMU_Safety_FfUncorrectableErrorDetected : IfxSmu_cfg.h

IfxSmu_Alarm_SMU_Timer0_TimeOut : IfxSmu_cfg.h

IfxSmu_Alarm_SMU_Timer1_TimeOut : IfxSmu_cfg.h

IfxSmu_Alarm_Software_Alarm0 : IfxSmu_cfg.h

IfxSmu_Alarm_Software_Alarm1 : IfxSmu_cfg.h

IfxSmu_Alarm_Software_Alarm10 : IfxSmu_cfg.h

IfxSmu_Alarm_Software_Alarm11 : IfxSmu_cfg.h

IfxSmu_Alarm_Software_Alarm12 : IfxSmu_cfg.h

IfxSmu_Alarm_Software_Alarm13 : IfxSmu_cfg.h

IfxSmu_Alarm_Software_Alarm14 : IfxSmu_cfg.h

IfxSmu_Alarm_Software_Alarm15 : IfxSmu_cfg.h

IfxSmu_Alarm_Software_Alarm2 : IfxSmu_cfg.h

IfxSmu_Alarm_Software_Alarm3 : IfxSmu_cfg.h

IfxSmu_Alarm_Software_Alarm4 : IfxSmu_cfg.h

IfxSmu_Alarm_Software_Alarm5 : IfxSmu_cfg.h

IfxSmu_Alarm_Software_Alarm6 : IfxSmu_cfg.h

IfxSmu_Alarm_Software_Alarm7 : IfxSmu_cfg.h

IfxSmu_Alarm_Software_Alarm8 : IfxSmu_cfg.h

IfxSmu_Alarm_Software_Alarm9 : IfxSmu_cfg.h

IfxSmu_Alarm_SPB_BusErrorEvent : IfxSmu_cfg.h

IfxSmu_Alarm_SRI_EDC_ReadPhaseError : IfxSmu_cfg.h

IfxSmu_Alarm_SYS_PLL_PER_PLL_Safety_FfUncorrectableErrorDetected : IfxSmu_cfg.h

IfxSmu_Alarm_XBAR0_SRI_BusErrorEvent : IfxSmu_cfg.h

IfxSmu_Alarm_XBAR1_SRI_BusErrorEvent : IfxSmu_cfg.h

IfxSmu_Alarm_XBAR2_SRI_BusErrorEvent : IfxSmu_cfg.h

IfxSmu_Alarm_XBAR_EDC_AddressPhaseError : IfxSmu_cfg.h

IfxSmu_Alarm_XBAR_EDC_WritePhaseError : IfxSmu_cfg.h

IfxSmu_Alarm_XBAR_SOTA_SwapError : IfxSmu_cfg.h

IfxSmu_AlarmExecutionStatus : IfxSmu.h

IfxSmu_AlarmExecutionStatus_ems : IfxSmu.h

IfxSmu_AlarmExecutionStatus_emsaem : IfxSmu.h

IfxSmu_AlarmExecutionStatus_irq0 : IfxSmu.h

IfxSmu_AlarmExecutionStatus_irq0aem : IfxSmu.h

IfxSmu_AlarmExecutionStatus_irq1 : IfxSmu.h

IfxSmu_AlarmExecutionStatus_irq1aem : IfxSmu.h

IfxSmu_AlarmExecutionStatus_irq2 : IfxSmu.h

IfxSmu_AlarmExecutionStatus_irq2aem : IfxSmu.h

IfxSmu_AlarmExecutionStatus_nmi : IfxSmu.h

IfxSmu_AlarmExecutionStatus_nmiaem : IfxSmu.h

IfxSmu_AlarmExecutionStatus_rst : IfxSmu.h

IfxSmu_AlarmExecutionStatus_rst0 : IfxSmu.h

IfxSmu_AlarmExecutionStatus_rst0aem : IfxSmu.h

IfxSmu_AlarmExecutionStatus_rst1 : IfxSmu.h

IfxSmu_AlarmExecutionStatus_rst1aem : IfxSmu.h

IfxSmu_AlarmExecutionStatus_rst2 : IfxSmu.h

IfxSmu_AlarmExecutionStatus_rst2aem : IfxSmu.h

IfxSmu_AlarmExecutionStatus_rst3 : IfxSmu.h

IfxSmu_AlarmExecutionStatus_rst3aem : IfxSmu.h

IfxSmu_AlarmExecutionStatus_rst4 : IfxSmu.h

IfxSmu_AlarmExecutionStatus_rst4aem : IfxSmu.h

IfxSmu_AlarmExecutionStatus_rst5 : IfxSmu.h

IfxSmu_AlarmExecutionStatus_rst5aem : IfxSmu.h

IfxSmu_AlarmExecutionStatus_rstaem : IfxSmu.h

IfxSmu_clearAlarmExecutedStatus() : IfxSmu.h

IfxSmu_clearAlarmStatus() : IfxSmu.h , IfxSmu.c

IfxSmu_clearRegisterMonitorErrorFlag() : IfxSmu.h

IfxSmu_clearRegisterMonitorStatus() : IfxSmu.h

IfxSmu_clearRegMonTestModeEnable() : IfxSmu.h

IfxSmu_Command : IfxSmu.h

IfxSmu_Command_activateFSP : IfxSmu.h

IfxSmu_Command_activatePES : IfxSmu.h

IfxSmu_Command_alarmStatusClear : IfxSmu.h

IfxSmu_Command_aliveTest : IfxSmu.h

IfxSmu_Command_releaseFSP : IfxSmu.h

IfxSmu_Command_start : IfxSmu.h

IfxSmu_Command_stopRT : IfxSmu.h

IfxSmu_Command_triggerAlarm : IfxSmu.h

IfxSmu_configAlarmActionPES() : IfxSmu.h , IfxSmu.c

IfxSmu_ConfigureInterruptGeneration() : IfxSmu.h , IfxSmu.c

IfxSmu_enableFaultToRunState() : IfxSmu.c , IfxSmu.h

IfxSmu_enablePortEmergencyStop() : IfxSmu.h , IfxSmu.c

IfxSmu_FSP0_P33_8_OUT : IfxSmu_PinMap.h , IfxSmu_PinMap.c

IfxSmu_FSP1_P33_10_OUT : IfxSmu_PinMap.h , IfxSmu_PinMap.c

IfxSmu_Fsp_Out_pinTable : IfxSmu_PinMap.c , IfxSmu_PinMap.h

IfxSmu_FspMode : IfxSmu.h

IfxSmu_FspMode_BiStableProtocol : IfxSmu.h

IfxSmu_FspMode_dualRailProtocol : IfxSmu.h

IfxSmu_FspMode_TimeSwitchingProtocol : IfxSmu.h

IfxSmu_FspPrescalar1 : IfxSmu.h

IfxSmu_FspPrescalar1_referenceClockDiv128 : IfxSmu.h

IfxSmu_FspPrescalar1_referenceClockDiv16 : IfxSmu.h

IfxSmu_FspPrescalar1_referenceClockDiv2 : IfxSmu.h

IfxSmu_FspPrescalar1_referenceClockDiv256 : IfxSmu.h

IfxSmu_FspPrescalar1_referenceClockDiv32 : IfxSmu.h

IfxSmu_FspPrescalar1_referenceClockDiv4 : IfxSmu.h

IfxSmu_FspPrescalar1_referenceClockDiv64 : IfxSmu.h

IfxSmu_FspPrescalar1_referenceClockDiv8 : IfxSmu.h

IfxSmu_FspPrescalar2 : IfxSmu.h

IfxSmu_FspPrescalar2_referenceClockDiv1024 : IfxSmu.h

IfxSmu_FspPrescalar2_referenceClockDiv2048 : IfxSmu.h

IfxSmu_FspPrescalar2_referenceClockDiv4096 : IfxSmu.h

IfxSmu_FspPrescalar2_referenceClockDiv512 : IfxSmu.h

IfxSmu_getAlarmAction() : IfxSmu.h , IfxSmu.c

IfxSmu_getAlarmExecutedStatus() : IfxSmu.h

IfxSmu_getAlarmGroupDebugStatus() : IfxSmu.h , IfxSmu.c

IfxSmu_getAlarmStatus() : IfxSmu.h , IfxSmu.c

IfxSmu_getPortControlHwDir() : IfxSmu.h

IfxSmu_getPortControlHwEnable() : IfxSmu.h

IfxSmu_getRegisterMonitorErrorFlag() : IfxSmu.h

IfxSmu_getRegisterMonitorStatus() : IfxSmu.h

IfxSmu_getRTMissedEvent() : IfxSmu.h , IfxSmu.c

IfxSmu_getSmuState() : IfxSmu.h , IfxSmu.c

IfxSmu_getSrcPointer() : IfxSmu.h

IfxSmu_InternalAlarmAction : IfxSmu.h

IfxSmu_InternalAlarmAction_cpureset : IfxSmu.h

IfxSmu_InternalAlarmAction_disabled : IfxSmu.h

IfxSmu_InternalAlarmAction_igcs0 : IfxSmu.h

IfxSmu_InternalAlarmAction_igcs1 : IfxSmu.h

IfxSmu_InternalAlarmAction_igcs2 : IfxSmu.h

IfxSmu_InternalAlarmAction_nmi : IfxSmu.h

IfxSmu_InternalAlarmAction_reset : IfxSmu.h

IfxSmu_InterruptGenerationConfiguration : IfxSmu.h

IfxSmu_InterruptGenerationConfiguration_0 : IfxSmu.h

IfxSmu_InterruptGenerationConfiguration_1 : IfxSmu.h

IfxSmu_InterruptGenerationConfiguration_2 : IfxSmu.h

IfxSmu_InterruptRequest : IfxSmu.h

IfxSmu_InterruptRequest_0 : IfxSmu.h

IfxSmu_InterruptRequest_1 : IfxSmu.h

IfxSmu_InterruptRequest_2 : IfxSmu.h

IfxSmu_isModuleSuspended() : IfxSmu.h

IfxSmu_lockConfigRegisters() : IfxSmu.c , IfxSmu.h

IFXSMU_NUM_ALARM_GROUPS : IfxSmu_cfg.h

IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS : IfxSmu_PinMap.h

IFXSMU_PINMAP_NUM_MODULES : IfxSmu_PinMap.h

IfxSmu_PortControlHwDir : IfxSmu.h

IfxSmu_PortControlHwDir_fsp0AndFsp1Input : IfxSmu.h

IfxSmu_PortControlHwDir_fsp0AndFsp1Output : IfxSmu.h

IfxSmu_PortControlHwDir_fsp0OutputAndFsp1Input : IfxSmu.h

IfxSmu_PortControlHwEnable : IfxSmu.h

IfxSmu_PortControlHwEnable_fsp0AndFsp1Disabled : IfxSmu.h

IfxSmu_PortControlHwEnable_fsp0AndFsp1Enabled : IfxSmu.h

IfxSmu_PortControlHwEnable_fsp0EnabledAndFsp1Disabled : IfxSmu.h

IfxSmu_releaseFSP() : IfxSmu.h , IfxSmu.c

IfxSmu_setAlarmAction() : IfxSmu.h , IfxSmu.c

IfxSmu_setAlarmStatus() : IfxSmu.c , IfxSmu.h

IfxSmu_setFspMode() : IfxSmu.h , IfxSmu.c

IfxSmu_setPortControlHwEnableAndDir() : IfxSmu.h

IfxSmu_setRegMonTestModeEnable() : IfxSmu.h

IfxSmu_setSuspendMode() : IfxSmu.h

IfxSmu_Smu_initModule() : IfxSmu_Smu.c , IfxSmu_Smu.h

IfxSmu_Smu_initModuleConfig() : IfxSmu_Smu.c , IfxSmu_Smu.h

IfxSmu_Smu_isAlarmTriggered() : IfxSmu_Smu.h , IfxSmu_Smu.c

IfxSmu_SmuState : IfxSmu.h

IfxSmu_SmuState_fault : IfxSmu.h

IfxSmu_SmuState_run : IfxSmu.h

IfxSmu_SmuState_start : IfxSmu.h

IfxSmu_SmuState_unspecified : IfxSmu.h

IFXSMU_START_ALIVE_TEST_ARG : IfxSmu.h

IfxSmu_startAliveTest() : IfxSmu.h

IFXSMU_STOP_ALIVE_TEST_ARG : IfxSmu.h

IfxSmu_stopAliveTest() : IfxSmu.h

IfxSmu_stopRT() : IfxSmu.h , IfxSmu.c

IfxSmu_SuspendMode : IfxSmu.h

IfxSmu_SuspendMode_hard : IfxSmu.h

IfxSmu_SuspendMode_none : IfxSmu.h

IfxSmu_SuspendMode_soft : IfxSmu.h

IfxSmu_temporaryLockConfigRegisters() : IfxSmu.h , IfxSmu.c

IfxSmu_unlockConfigRegisters() : IfxSmu.c , IfxSmu.h

IfxSmu_waitForAlarm() : IfxSmu.h

IfxSmuStdby_AlarmStatusClear : IfxSmuStdby.h

IfxSmuStdby_AlarmStatusClear_disable : IfxSmuStdby.h

IfxSmuStdby_AlarmStatusClear_enable : IfxSmuStdby.h

IfxSmuStdby_AlarmStatusFlag : IfxSmuStdby.h

IfxSmuStdby_AlarmStatusFlag_faultExist : IfxSmuStdby.h

IfxSmuStdby_AlarmStatusFlag_noFaultExist : IfxSmuStdby.h

IfxSmuStdby_clearSmuStdbyMonBistFlags() : IfxSmuStdby.h

IfxSmuStdby_enableAlarmStatusClear() : IfxSmuStdby.h

IfxSmuStdby_enableSmuStdby() : IfxSmuStdby.h

IfxSmuStdby_enableSmuStdbyMonBist() : IfxSmuStdby.h

IfxSmuStdby_FaultSignalAlarmConfigFlagEvent : IfxSmuStdby.h

IfxSmuStdby_FaultSignalAlarmConfigFlagEvent_disable : IfxSmuStdby.h

IfxSmuStdby_FaultSignalAlarmConfigFlagEvent_enable : IfxSmuStdby.h

IfxSmuStdby_FspErrorPinFaultState : IfxSmuStdby.h

IfxSmuStdby_FspErrorPinFaultState_fault : IfxSmuStdby.h

IfxSmuStdby_FspErrorPinFaultState_noFault : IfxSmuStdby.h

IfxSmuStdby_FspErrorPinState : IfxSmuStdby.h

IfxSmuStdby_FspErrorPinState_active : IfxSmuStdby.h

IfxSmuStdby_FspErrorPinState_inactive : IfxSmuStdby.h

IfxSmuStdby_getSmuStdbyAlarmGroupStatus() : IfxSmuStdby.h

IfxSmuStdby_getSmuStdbyAlarmStatus() : IfxSmuStdby.h

IfxSmuStdby_getSmuStdbyModuleStatus() : IfxSmuStdby.h

IfxSmuStdby_getSmuStdbyMonBistPmsErrorFlag() : IfxSmuStdby.h

IfxSmuStdby_getSmuStdbyMonBistSmuErrorFlag() : IfxSmuStdby.h

IfxSmuStdby_getSmuStdbyMonBistTestDoneFlag() : IfxSmuStdby.h

IfxSmuStdby_getSmuStdbyMonBistTestOkFlag() : IfxSmuStdby.h

IfxSmuStdby_getSmuStdbyMonBistTestRunFlag() : IfxSmuStdby.h

IfxSmuStdby_setFaultSignalAGConfigEventFlags() : IfxSmuStdby.c , IfxSmuStdby.h

IfxSmuStdby_setFaultSignalAlarmConfigEventFlag() : IfxSmuStdby.h , IfxSmuStdby.c

IfxSmuStdby_setFsp0ErrorPinActive() : IfxSmuStdby.h

IfxSmuStdby_setFsp1ErrorPinActive() : IfxSmuStdby.h

IfxSmuStdby_setSmuStdbyAlarmStatusFlag() : IfxSmuStdby.h , IfxSmuStdby.c

IfxSmuStdby_SmuStdbyModuleState : IfxSmuStdby.h

IfxSmuStdby_SmuStdbyModuleState_disable : IfxSmuStdby.h

IfxSmuStdby_SmuStdbyModuleState_enable : IfxSmuStdby.h

IfxSmuStdby_startSmuStdbyMonBist() : IfxSmuStdby.h , IfxSmuStdby.c

IfxSrc_clearOverrun() : IfxSrc.h

IfxSrc_clearRequest() : IfxSrc.h

IfxSrc_deinit() : IfxSrc.h

IfxSrc_disable() : IfxSrc.h

IfxSrc_enable() : IfxSrc.h

IfxSrc_init() : IfxSrc.h

IfxSrc_isOverrun() : IfxSrc.h

IfxSrc_isRequested() : IfxSrc.h

IfxSrc_setRequest() : IfxSrc.h

IfxSrc_Tos : IfxSrc_cfg.h

IfxSrc_Tos_cpu0 : IfxSrc_cfg.h

IfxSrc_Tos_cpu1 : IfxSrc_cfg.h

IfxSrc_Tos_cpu2 : IfxSrc_cfg.h

IfxSrc_Tos_cpu3 : IfxSrc_cfg.h

IfxSrc_Tos_dma : IfxSrc_cfg.h

IfxStdIf_DPipe : IfxStdIf_DPipe.h

IfxStdIf_DPipe_canReadCount() : IfxStdIf_DPipe.h

IfxStdIf_DPipe_CanReadCount : IfxStdIf_DPipe.h

IfxStdIf_DPipe_canWriteCount() : IfxStdIf_DPipe.h

IfxStdIf_DPipe_CanWriteCount : IfxStdIf_DPipe.h

IfxStdIf_DPipe_ClearRx : IfxStdIf_DPipe.h

IfxStdIf_DPipe_clearRx() : IfxStdIf_DPipe.h

IfxStdIf_DPipe_clearTx() : IfxStdIf_DPipe.h

IfxStdIf_DPipe_ClearTx : IfxStdIf_DPipe.h

IfxStdIf_DPipe_FlushTx : IfxStdIf_DPipe.h

IfxStdIf_DPipe_flushTx() : IfxStdIf_DPipe.h

IfxStdIf_DPipe_GetReadCount : IfxStdIf_DPipe.h

IfxStdIf_DPipe_getReadCount() : IfxStdIf_DPipe.h

IfxStdIf_DPipe_GetReadEvent : IfxStdIf_DPipe.h

IfxStdIf_DPipe_getReadEvent() : IfxStdIf_DPipe.h

IfxStdIf_DPipe_getSendCount() : IfxStdIf_DPipe.h

IfxStdIf_DPipe_GetSendCount : IfxStdIf_DPipe.h

IfxStdIf_DPipe_GetTxTimeStamp : IfxStdIf_DPipe.h

IfxStdIf_DPipe_getTxTimeStamp() : IfxStdIf_DPipe.h

IfxStdIf_DPipe_GetWriteCount : IfxStdIf_DPipe.h

IfxStdIf_DPipe_getWriteCount() : IfxStdIf_DPipe.h

IfxStdIf_DPipe_GetWriteEvent : IfxStdIf_DPipe.h

IfxStdIf_DPipe_getWriteEvent() : IfxStdIf_DPipe.h

IfxStdIf_DPipe_onError() : IfxStdIf_DPipe.h

IfxStdIf_DPipe_OnError : IfxStdIf_DPipe.h

IfxStdIf_DPipe_onReceive() : IfxStdIf_DPipe.h

IfxStdIf_DPipe_OnReceive : IfxStdIf_DPipe.h

IfxStdIf_DPipe_OnTransmit : IfxStdIf_DPipe.h

IfxStdIf_DPipe_onTransmit() : IfxStdIf_DPipe.h

IfxStdIf_DPipe_print() : IfxStdIf_DPipe.c , IfxStdIf_DPipe.h

IfxStdIf_DPipe_read() : IfxStdIf_DPipe.h

IfxStdIf_DPipe_Read : IfxStdIf_DPipe.h

IfxStdIf_DPipe_ReadEvent : IfxStdIf_DPipe.h

IfxStdIf_DPipe_ResetSendCount : IfxStdIf_DPipe.h

IfxStdIf_DPipe_resetSendCount() : IfxStdIf_DPipe.h

IfxStdIf_DPipe_Write : IfxStdIf_DPipe.h

IfxStdIf_DPipe_write() : IfxStdIf_DPipe.h

IfxStdIf_DPipe_WriteEvent : IfxStdIf_DPipe.h

IfxStdIf_InterfaceDriver : IfxStdIf.h

IfxStdIf_Pos : IfxStdIf_Pos.h

IfxStdIf_Pos_Dir : IfxStdIf_Pos.h

IfxStdIf_Pos_Dir_backward : IfxStdIf_Pos.h

IfxStdIf_Pos_Dir_forward : IfxStdIf_Pos.h

IfxStdIf_Pos_Dir_unknown : IfxStdIf_Pos.h

IfxStdIf_Pos_GetAbsolutePosition : IfxStdIf_Pos.h

IfxStdIf_Pos_getAbsolutePosition() : IfxStdIf_Pos.h

IfxStdIf_Pos_getDirection() : IfxStdIf_Pos.h

IfxStdIf_Pos_GetDirection : IfxStdIf_Pos.h

IfxStdIf_Pos_getFault() : IfxStdIf_Pos.h

IfxStdIf_Pos_GetFault : IfxStdIf_Pos.h

IfxStdIf_Pos_getOffset() : IfxStdIf_Pos.h

IfxStdIf_Pos_GetOffset : IfxStdIf_Pos.h

IfxStdIf_Pos_getPeriodPerRotation() : IfxStdIf_Pos.h

IfxStdIf_Pos_GetPeriodPerRotation : IfxStdIf_Pos.h

IfxStdIf_Pos_GetPosition : IfxStdIf_Pos.h

IfxStdIf_Pos_getPosition() : IfxStdIf_Pos.h

IfxStdIf_Pos_getRawPosition() : IfxStdIf_Pos.h

IfxStdIf_Pos_GetRawPosition : IfxStdIf_Pos.h

IfxStdIf_Pos_GetRefreshPeriod : IfxStdIf_Pos.h

IfxStdIf_Pos_getRefreshPeriod() : IfxStdIf_Pos.h

IfxStdIf_Pos_getResolution() : IfxStdIf_Pos.h

IfxStdIf_Pos_GetResolution : IfxStdIf_Pos.h

IfxStdIf_Pos_getSensorType() : IfxStdIf_Pos.h

IfxStdIf_Pos_GetSensorType : IfxStdIf_Pos.h

IfxStdIf_Pos_getSpeed() : IfxStdIf_Pos.h

IfxStdIf_Pos_GetSpeed : IfxStdIf_Pos.h

IfxStdIf_Pos_getTurn() : IfxStdIf_Pos.h

IfxStdIf_Pos_GetTurn : IfxStdIf_Pos.h

IfxStdIf_Pos_initConfig() : IfxStdIf_Pos.c , IfxStdIf_Pos.h

IfxStdIf_Pos_isFault() : IfxStdIf_Pos.h

IfxStdIf_Pos_MotionType : IfxStdIf_Pos.h

IfxStdIf_Pos_MotionType_linear : IfxStdIf_Pos.h

IfxStdIf_Pos_MotionType_rotating : IfxStdIf_Pos.h

IfxStdIf_Pos_onEventA() : IfxStdIf_Pos.h

IfxStdIf_Pos_OnEventA : IfxStdIf_Pos.h

IfxStdIf_Pos_onZeroIrq() : IfxStdIf_Pos.h

IfxStdIf_Pos_OnZeroIrq : IfxStdIf_Pos.h

IfxStdIf_Pos_printStatus() : IfxStdIf_Pos.c , IfxStdIf_Pos.h

IfxStdIf_Pos_radsToRpm() : IfxStdIf_Pos.h

IfxStdIf_Pos_RawAngle : IfxStdIf_Pos.h

IfxStdIf_Pos_Reset : IfxStdIf_Pos.h

IfxStdIf_Pos_reset() : IfxStdIf_Pos.h

IfxStdIf_Pos_ResetFaults : IfxStdIf_Pos.h

IfxStdIf_Pos_resetFaults() : IfxStdIf_Pos.h

IfxStdIf_Pos_ResolutionFactor : IfxStdIf_Pos.h

IfxStdIf_Pos_ResolutionFactor_fourFold : IfxStdIf_Pos.h

IfxStdIf_Pos_ResolutionFactor_oneFold : IfxStdIf_Pos.h

IfxStdIf_Pos_ResolutionFactor_twoFold : IfxStdIf_Pos.h

IfxStdIf_Pos_rpmToRads() : IfxStdIf_Pos.h

IfxStdIf_Pos_SensorType : IfxStdIf_Pos.h

IfxStdIf_Pos_SensorType_angletrk : IfxStdIf_Pos.h

IfxStdIf_Pos_SensorType_encoder : IfxStdIf_Pos.h

IfxStdIf_Pos_SensorType_hall : IfxStdIf_Pos.h

IfxStdIf_Pos_SensorType_igmr : IfxStdIf_Pos.h

IfxStdIf_Pos_SensorType_resolver : IfxStdIf_Pos.h

IfxStdIf_Pos_SensorType_virtual : IfxStdIf_Pos.h

IfxStdIf_Pos_setOffset() : IfxStdIf_Pos.h

IfxStdIf_Pos_SetOffset : IfxStdIf_Pos.h

IfxStdIf_Pos_setPosition() : IfxStdIf_Pos.h

IfxStdIf_Pos_SetPosition : IfxStdIf_Pos.h

IfxStdIf_Pos_setRawPosition() : IfxStdIf_Pos.h

IfxStdIf_Pos_SetRawPosition : IfxStdIf_Pos.h

IfxStdIf_Pos_setRefreshPeriod() : IfxStdIf_Pos.h

IfxStdIf_Pos_SetRefreshPeriod : IfxStdIf_Pos.h

IfxStdIf_Pos_SetSpeed : IfxStdIf_Pos.h

IfxStdIf_Pos_setSpeed() : IfxStdIf_Pos.h

IfxStdIf_Pos_update() : IfxStdIf_Pos.h

IfxStdIf_Pos_Update : IfxStdIf_Pos.h

IfxStdIf_PwmHl : IfxStdIf_PwmHl.h

IfxStdIf_PwmHl_GetDeadtime : IfxStdIf_PwmHl.h

IfxStdIf_PwmHl_getDeadtime() : IfxStdIf_PwmHl.h

IfxStdIf_PwmHl_getDeadtimetick() : IfxStdIf_PwmHl.h

IfxStdIf_PwmHl_GetDeadtimeTick : IfxStdIf_PwmHl.h

IfxStdIf_PwmHl_GetMinPulse : IfxStdIf_PwmHl.h

IfxStdIf_PwmHl_getMinPulse() : IfxStdIf_PwmHl.h

IfxStdIf_PwmHl_getMode() : IfxStdIf_PwmHl.h

IfxStdIf_PwmHl_GetMode : IfxStdIf_PwmHl.h

IfxStdIf_PwmHl_getTimer() : IfxStdIf_PwmHl.h

IfxStdIf_PwmHl_initConfig() : IfxStdIf_PwmHl.c , IfxStdIf_PwmHl.h

IfxStdIf_PwmHl_SetDeadtime : IfxStdIf_PwmHl.h

IfxStdIf_PwmHl_setDeadtime() : IfxStdIf_PwmHl.h

IfxStdIf_PwmHl_setMinPulse() : IfxStdIf_PwmHl.h

IfxStdIf_PwmHl_SetMinPulse : IfxStdIf_PwmHl.h

IfxStdIf_PwmHl_setMode() : IfxStdIf_PwmHl.h

IfxStdIf_PwmHl_SetMode : IfxStdIf_PwmHl.h

IfxStdIf_PwmHl_setOnTime() : IfxStdIf_PwmHl.h

IfxStdIf_PwmHl_SetOnTime : IfxStdIf_PwmHl.h

IfxStdIf_PwmHl_setOnTimeAndShift() : IfxStdIf_PwmHl.h

IfxStdIf_PwmHl_SetOnTimeAndShift : IfxStdIf_PwmHl.h

IfxStdIf_PwmHl_setPulse() : IfxStdIf_PwmHl.h

IfxStdIf_PwmHl_SetPulse : IfxStdIf_PwmHl.h

IfxStdIf_PwmHl_SetupChannels : IfxStdIf_PwmHl.h

IfxStdIf_PwmHl_setupChannels() : IfxStdIf_PwmHl.h

IfxStdIf_Timer : IfxStdIf_Timer.h

IfxStdIf_Timer_ackTimerIrq() : IfxStdIf_Timer.h

IfxStdIf_Timer_AckTimerIrq : IfxStdIf_Timer.h

IfxStdIf_Timer_AckTriggerIrq : IfxStdIf_Timer.h

IfxStdIf_Timer_ackTriggerIrq() : IfxStdIf_Timer.h

IfxStdIf_Timer_applyUpdate() : IfxStdIf_Timer.h

IfxStdIf_Timer_ApplyUpdate : IfxStdIf_Timer.h

IfxStdIf_Timer_CountDir : IfxStdIf_Timer.h

IfxStdIf_Timer_CountDir_down : IfxStdIf_Timer.h

IfxStdIf_Timer_CountDir_up : IfxStdIf_Timer.h

IfxStdIf_Timer_CountDir_upAndDown : IfxStdIf_Timer.h

IfxStdIf_Timer_DisableUpdate : IfxStdIf_Timer.h

IfxStdIf_Timer_disableUpdate() : IfxStdIf_Timer.h

IfxStdIf_Timer_GetFrequency : IfxStdIf_Timer.h

IfxStdIf_Timer_getFrequency() : IfxStdIf_Timer.h

IfxStdIf_Timer_getInputFrequency() : IfxStdIf_Timer.h

IfxStdIf_Timer_GetInputFrequency : IfxStdIf_Timer.h

IfxStdIf_Timer_GetPeriod : IfxStdIf_Timer.h

IfxStdIf_Timer_getPeriod() : IfxStdIf_Timer.h

IfxStdIf_Timer_getPeriodSecond() : IfxStdIf_Timer.h

IfxStdIf_Timer_getResolution() : IfxStdIf_Timer.h

IfxStdIf_Timer_GetResolution : IfxStdIf_Timer.h

IfxStdIf_Timer_getTrigger() : IfxStdIf_Timer.h

IfxStdIf_Timer_GetTrigger : IfxStdIf_Timer.h

IfxStdIf_Timer_initConfig() : IfxStdIf_Timer.h , IfxStdIf_Timer.c

IfxStdIf_Timer_initStdIf() : IfxStdIf_Timer.h , IfxStdIf_Timer.c

IfxStdIf_Timer_Output_disabled : IfxStdIf_Timer.h

IfxStdIf_Timer_Output_enabled : IfxStdIf_Timer.h

IfxStdIf_Timer_OutputEvent : IfxStdIf_Timer.h

IfxStdIf_Timer_run() : IfxStdIf_Timer.h

IfxStdIf_Timer_Run : IfxStdIf_Timer.h

IfxStdIf_Timer_SetFrequency : IfxStdIf_Timer.h

IfxStdIf_Timer_setFrequency() : IfxStdIf_Timer.h

IfxStdIf_Timer_setPeriod() : IfxStdIf_Timer.h

IfxStdIf_Timer_SetPeriod : IfxStdIf_Timer.h

IfxStdIf_Timer_SetSingleMode : IfxStdIf_Timer.h

IfxStdIf_Timer_setSingleMode() : IfxStdIf_Timer.h

IfxStdIf_Timer_setTrigger() : IfxStdIf_Timer.h

IfxStdIf_Timer_SetTrigger : IfxStdIf_Timer.h

IfxStdIf_Timer_stop() : IfxStdIf_Timer.h

IfxStdIf_Timer_Stop : IfxStdIf_Timer.h

IfxStdIf_Timer_sToTick() : IfxStdIf_Timer.h

IfxStdIf_Timer_tickToS() : IfxStdIf_Timer.h

IfxStdIf_Timer_UpdateInputFrequency : IfxStdIf_Timer.h

IfxStdIf_Timer_updateInputFrequency() : IfxStdIf_Timer.h

IfxStm_cfg_indexMap : IfxStm_cfg.c , IfxStm_cfg.h

IfxStm_clearCompareFlag() : IfxStm.c , IfxStm.h

IfxStm_Comparator : IfxStm.h

IfxStm_Comparator_0 : IfxStm.h

IfxStm_Comparator_1 : IfxStm.h

IfxStm_ComparatorInterrupt : IfxStm.h

IfxStm_ComparatorInterrupt_ir0 : IfxStm.h

IfxStm_ComparatorInterrupt_ir1 : IfxStm.h

IfxStm_ComparatorOffset : IfxStm.h

IfxStm_ComparatorOffset_0 : IfxStm.h

IfxStm_ComparatorOffset_1 : IfxStm.h

IfxStm_ComparatorOffset_10 : IfxStm.h

IfxStm_ComparatorOffset_11 : IfxStm.h

IfxStm_ComparatorOffset_12 : IfxStm.h

IfxStm_ComparatorOffset_13 : IfxStm.h

IfxStm_ComparatorOffset_14 : IfxStm.h

IfxStm_ComparatorOffset_15 : IfxStm.h

IfxStm_ComparatorOffset_16 : IfxStm.h

IfxStm_ComparatorOffset_17 : IfxStm.h

IfxStm_ComparatorOffset_18 : IfxStm.h

IfxStm_ComparatorOffset_19 : IfxStm.h

IfxStm_ComparatorOffset_2 : IfxStm.h

IfxStm_ComparatorOffset_20 : IfxStm.h

IfxStm_ComparatorOffset_21 : IfxStm.h

IfxStm_ComparatorOffset_22 : IfxStm.h

IfxStm_ComparatorOffset_23 : IfxStm.h

IfxStm_ComparatorOffset_24 : IfxStm.h

IfxStm_ComparatorOffset_25 : IfxStm.h

IfxStm_ComparatorOffset_26 : IfxStm.h

IfxStm_ComparatorOffset_27 : IfxStm.h

IfxStm_ComparatorOffset_28 : IfxStm.h

IfxStm_ComparatorOffset_29 : IfxStm.h

IfxStm_ComparatorOffset_3 : IfxStm.h

IfxStm_ComparatorOffset_30 : IfxStm.h

IfxStm_ComparatorOffset_31 : IfxStm.h

IfxStm_ComparatorOffset_4 : IfxStm.h

IfxStm_ComparatorOffset_5 : IfxStm.h

IfxStm_ComparatorOffset_6 : IfxStm.h

IfxStm_ComparatorOffset_7 : IfxStm.h

IfxStm_ComparatorOffset_8 : IfxStm.h

IfxStm_ComparatorOffset_9 : IfxStm.h

IfxStm_ComparatorSize : IfxStm.h

IfxStm_ComparatorSize_10Bits : IfxStm.h

IfxStm_ComparatorSize_11Bits : IfxStm.h

IfxStm_ComparatorSize_12Bits : IfxStm.h

IfxStm_ComparatorSize_13Bits : IfxStm.h

IfxStm_ComparatorSize_14Bits : IfxStm.h

IfxStm_ComparatorSize_15Bits : IfxStm.h

IfxStm_ComparatorSize_16Bits : IfxStm.h

IfxStm_ComparatorSize_17Bits : IfxStm.h

IfxStm_ComparatorSize_18Bits : IfxStm.h

IfxStm_ComparatorSize_19Bits : IfxStm.h

IfxStm_ComparatorSize_1Bit : IfxStm.h

IfxStm_ComparatorSize_20Bits : IfxStm.h

IfxStm_ComparatorSize_21Bits : IfxStm.h

IfxStm_ComparatorSize_22Bits : IfxStm.h

IfxStm_ComparatorSize_23Bits : IfxStm.h

IfxStm_ComparatorSize_24Bits : IfxStm.h

IfxStm_ComparatorSize_25Bits : IfxStm.h

IfxStm_ComparatorSize_26Bits : IfxStm.h

IfxStm_ComparatorSize_27Bits : IfxStm.h

IfxStm_ComparatorSize_28Bits : IfxStm.h

IfxStm_ComparatorSize_29Bits : IfxStm.h

IfxStm_ComparatorSize_2Bits : IfxStm.h

IfxStm_ComparatorSize_30Bits : IfxStm.h

IfxStm_ComparatorSize_31Bits : IfxStm.h

IfxStm_ComparatorSize_32Bits : IfxStm.h

IfxStm_ComparatorSize_3Bits : IfxStm.h

IfxStm_ComparatorSize_4Bits : IfxStm.h

IfxStm_ComparatorSize_5Bits : IfxStm.h

IfxStm_ComparatorSize_6Bits : IfxStm.h

IfxStm_ComparatorSize_7Bits : IfxStm.h

IfxStm_ComparatorSize_8Bits : IfxStm.h

IfxStm_ComparatorSize_9Bits : IfxStm.h

IFXSTM_DEFAULT_TIMER : IfxStm.h

IfxStm_disableComparatorInterrupt() : IfxStm.c , IfxStm.h

IfxStm_disableModule() : IfxStm.c , IfxStm.h

IfxStm_enableComparatorInterrupt() : IfxStm.c , IfxStm.h

IfxStm_enableOcdsSuspend() : IfxStm.c , IfxStm.h

IfxStm_get() : IfxStm.h

IfxStm_getAddress() : IfxStm.c , IfxStm.h

IfxStm_getCompare() : IfxStm.h

IfxStm_getDeadLine() : IfxStm.h

IfxStm_getFrequency() : IfxStm.h

IfxStm_getIndex() : IfxStm.h , IfxStm.c

IfxStm_getLower() : IfxStm.h

IfxStm_getOffset12Timer() : IfxStm.h

IfxStm_getOffset16Timer() : IfxStm.h

IfxStm_getOffset20Timer() : IfxStm.h

IfxStm_getOffset32Timer() : IfxStm.h

IfxStm_getOffset4Timer() : IfxStm.h

IfxStm_getOffset8Timer() : IfxStm.h

IfxStm_getOffsetTimer() : IfxStm.h

IfxStm_getSrcPointer() : IfxStm.h , IfxStm.c

IfxStm_getTicksFromMicroseconds() : IfxStm.h

IfxStm_getTicksFromMilliseconds() : IfxStm.h

IfxStm_increaseCompare() : IfxStm.h

IfxStm_Index : IfxStm_cfg.h

IfxStm_Index_0 : IfxStm_cfg.h

IfxStm_Index_1 : IfxStm_cfg.h

IfxStm_Index_2 : IfxStm_cfg.h

IfxStm_Index_3 : IfxStm_cfg.h

IfxStm_Index_none : IfxStm_cfg.h

IfxStm_initCompare() : IfxStm.h , IfxStm.c

IfxStm_initCompareConfig() : IfxStm.h , IfxStm.c

IfxStm_isCompareFlagSet() : IfxStm.h , IfxStm.c

IfxStm_isDeadLine() : IfxStm.h

IfxStm_isModuleSuspended() : IfxStm.h

IfxStm_now() : IfxStm.h

IFXSTM_NUM_COMPARATORS : IfxStm_cfg.h

IFXSTM_NUM_MODULES : IfxStm_cfg.h

IfxStm_resetModule() : IfxStm.h , IfxStm.c

IfxStm_setCompareControl() : IfxStm.c , IfxStm.h

IfxStm_setSleepMode() : IfxStm.h

IfxStm_setSuspendMode() : IfxStm.h

IfxStm_SleepMode : IfxStm.h

IfxStm_SleepMode_disable : IfxStm.h

IfxStm_SleepMode_enable : IfxStm.h

IfxStm_SuspendMode : IfxStm.h

IfxStm_SuspendMode_hard : IfxStm.h

IfxStm_SuspendMode_none : IfxStm.h

IfxStm_SuspendMode_soft : IfxStm.h

IfxStm_Timer_acknowledgeTimerIrq() : IfxStm_Timer.h , IfxStm_Timer.c

IfxStm_Timer_getFrequency() : IfxStm_Timer.c , IfxStm_Timer.h

IfxStm_Timer_getInputFrequency() : IfxStm_Timer.h , IfxStm_Timer.c

IfxStm_Timer_getPeriod() : IfxStm_Timer.h , IfxStm_Timer.c

IfxStm_Timer_getResolution() : IfxStm_Timer.c , IfxStm_Timer.h

IfxStm_Timer_init() : IfxStm_Timer.c , IfxStm_Timer.h

IfxStm_Timer_initConfig() : IfxStm_Timer.c , IfxStm_Timer.h

IfxStm_Timer_run() : IfxStm_Timer.h , IfxStm_Timer.c

IfxStm_Timer_setFrequency() : IfxStm_Timer.h , IfxStm_Timer.c

IfxStm_Timer_setPeriod() : IfxStm_Timer.c , IfxStm_Timer.h

IfxStm_Timer_setSingleMode() : IfxStm_Timer.c , IfxStm_Timer.h

IfxStm_Timer_stdIfTimerInit() : IfxStm_Timer.c , IfxStm_Timer.h

IfxStm_Timer_stop() : IfxStm_Timer.c , IfxStm_Timer.h

IfxStm_Timer_updateInputFrequency() : IfxStm_Timer.c , IfxStm_Timer.h

IfxStm_updateCompare() : IfxStm.h

IfxStm_wait() : IfxStm.h

IfxStm_waitTicks() : IfxStm.h

initTime() : Bsp.h

insert : IfxCpu_IntrinsicsDcc.h

isDeadLine() : Bsp.h

ISSPACE : Ifx_Shell.c

isync : IfxCpu_IntrinsicsDcc.h , Ifx_Ssw_CompilersDcc.h


iLLD_TC38A: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- l -

  • laccum : Ifx_TypesTasking.h , Ifx_TypesDcc.h , Ifx_TypesGnuc.h , Ifx_TypesGhs.h
  • LOW_BYTE_FIRST : Platform_Types.h
  • LSB_FIRST : Platform_Types.h


iLLD_TC38A: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- m -

  • max : IfxCpu_IntrinsicsDcc.h
  • mbistGang0Config : IfxMtu_cfg.c
  • mbistGang1Config : IfxMtu_cfg.c
  • mbistGang2Config : IfxMtu_cfg.c
  • mbistGang3Config : IfxMtu_cfg.c
  • mbistGang4Config : IfxMtu_cfg.c
  • mbistGang5Config : IfxMtu_cfg.c
  • mbistGang6Config : IfxMtu_cfg.c
  • mbistGang7Config : IfxMtu_cfg.c
  • mbistGangConfig : IfxMtu_cfg.c
  • mbistSshConfigGang0 : IfxMtu_cfg.c
  • mbistSshConfigGang1 : IfxMtu_cfg.c
  • mbistSshConfigGang2 : IfxMtu_cfg.c
  • mbistSshConfigGang3 : IfxMtu_cfg.c
  • mbistSshConfigGang4 : IfxMtu_cfg.c
  • mbistSshConfigGang5 : IfxMtu_cfg.c
  • mbistSshConfigGang6 : IfxMtu_cfg.c
  • mbistSshConfigGang7 : IfxMtu_cfg.c
  • memcpy() : Ifx_Ssw_CompilersGhs.h
  • memset() : Ifx_Ssw_CompilersGhs.h
  • mfcr : Ifx_Ssw_CompilersDcc.h , IfxCpu_IntrinsicsDcc.h
  • min : IfxCpu_IntrinsicsDcc.h
  • MSB_FIRST : Platform_Types.h
  • mtcr : IfxCpu_IntrinsicsDcc.h , Ifx_Ssw_CompilersDcc.h


iLLD_TC38A: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- n -

  • nonDestructiveTestPattern : IfxMtu_cfg.c
  • nop : IfxCpu_IntrinsicsDcc.h
  • NOP : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGnuc.h
  • nop : Ifx_Ssw_CompilersDcc.h
  • now() : Bsp.h
  • nowWithoutCriticalSection() : Bsp.h
  • NULL_PTR : Compilers.h


iLLD_TC38A: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- p -

  • pchar : Ifx_Types.h
  • PICBASE : Ifx_Ssw_CompilersGhs.h
  • PIDBASE : Ifx_Ssw_CompilersGhs.h
  • PIN_DRIVER_STRONG_SHARP : Bsp.h
  • Pin_enableEmgStop : Bsp.h
  • Pin_getGroupState : Bsp.h
  • Pin_getState : Bsp.h
  • Pin_setDriver : Bsp.h
  • Pin_setGroupModeInput : Bsp.h
  • Pin_setGroupModeOutput : Bsp.h
  • Pin_setGroupState : Bsp.h
  • Pin_setMode : Bsp.h
  • Pin_setState : Bsp.h
  • Pin_setStateHigh : Bsp.h
  • Pin_setStateLow : Bsp.h
  • PIRBASE : Ifx_Ssw_CompilersGhs.h
  • PLATFORM_AR_RELEASE_MAJOR_VERSION : Platform_Types.h
  • PLATFORM_AR_RELEASE_MINOR_VERSION : Platform_Types.h
  • PLATFORM_AR_RELEASE_REVISION_VERSION : Platform_Types.h
  • PLATFORM_SW_MAJOR_VERSION : Platform_Types.h
  • PLATFORM_SW_MINOR_VERSION : Platform_Types.h
  • PLATFORM_SW_PATCH_VERSION : Platform_Types.h
  • PLATFORM_VENDOR_ID : Platform_Types.h
  • poll() : Bsp.h
  • ptrdiff_t : Ifx_Ssw_CompilersGhs.h
  • pvoid : Ifx_Types.h
  • PwmHl : PwmHl.h
  • PwmHl_Pause : PwmHl.h
  • PwmHl_Resume : PwmHl.h
  • PwmHl_Start : PwmHl.h
  • PwmHl_Stop : PwmHl.h


iLLD_TC38A: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- r -

  • restore : IfxCpu_IntrinsicsDcc.h
  • restoreInterrupts() : Bsp.h
  • rodata_ptr : Ifx_Ssw_CompilersGhs.h
  • round_f() : Ifx_AngleTrkF32.c
  • rslcx : IfxCpu_IntrinsicsDcc.h


iLLD_TC38A: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- s -

  • sfract : Ifx_TypesTasking.h , Ifx_TypesDcc.h , Ifx_TypesGnuc.h , Ifx_TypesGhs.h
  • SHELL_HELP_DESCRIPTION_TEXT : Ifx_Shell.h
  • signed_size_t : Ifx_Ssw_CompilersGhs.h
  • sint16 : Platform_Types.h
  • sint16_least : Platform_Types.h
  • sint32 : Platform_Types.h
  • sint32_least : Platform_Types.h
  • sint64 : Platform_Types.h
  • sint8 : Platform_Types.h
  • sint8_least : Platform_Types.h
  • size_t : Ifx_Ssw_CompilersGhs.h
  • SpiIf : SpiIf.h
  • SpiIf_Cbk : SpiIf.h
  • SpiIf_Ch : SpiIf.h
  • SpiIf_ChConfig : SpiIf.h
  • SpiIf_ClockPolarity : SpiIf.h
  • SpiIf_ClockPolarity_idleHigh : SpiIf.h
  • SpiIf_ClockPolarity_idleLow : SpiIf.h
  • SpiIf_DataHeading : SpiIf.h
  • SpiIf_DataHeading_lsbFirst : SpiIf.h
  • SpiIf_DataHeading_msbFirst : SpiIf.h
  • SpiIf_exchange() : SpiIf.h
  • SpiIf_Exchange : SpiIf.h
  • SpiIf_getStatus() : SpiIf.h
  • SpiIf_GetStatus : SpiIf.h
  • SpiIf_initChannelConfig() : SpiIf.c , SpiIf.h
  • SpiIf_initConfig() : SpiIf.h , SpiIf.c
  • SpiIf_Mode : SpiIf.h
  • SpiIf_Mode_master : SpiIf.h
  • SpiIf_Mode_slave : SpiIf.h
  • SpiIf_Mode_undefined : SpiIf.h
  • SpiIf_OnEvent : SpiIf.h
  • SpiIf_ShiftClock : SpiIf.h
  • SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge : SpiIf.h
  • SpiIf_ShiftClock_shiftTransmitDataOnTrailingEdge : SpiIf.h
  • SpiIf_SlsoTiming : SpiIf.h
  • SpiIf_SlsoTiming_0 : SpiIf.h
  • SpiIf_SlsoTiming_1 : SpiIf.h
  • SpiIf_SlsoTiming_2 : SpiIf.h
  • SpiIf_SlsoTiming_3 : SpiIf.h
  • SpiIf_SlsoTiming_4 : SpiIf.h
  • SpiIf_SlsoTiming_5 : SpiIf.h
  • SpiIf_SlsoTiming_6 : SpiIf.h
  • SpiIf_SlsoTiming_7 : SpiIf.h
  • SpiIf_SlsoTiming_HalfTsclk : SpiIf.h
  • SpiIf_Status : SpiIf.h
  • SpiIf_Status_busy : SpiIf.h
  • SpiIf_Status_ok : SpiIf.h
  • SpiIf_Status_unknown : SpiIf.h
  • SpiIf_wait() : SpiIf.h
  • STDIF_DPIPE_MAX_PRINT_SIZE : IfxStdIf_DPipe.h
  • STRINGIFY : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs.h
  • svlcx : IfxCpu_IntrinsicsDcc.h
  • syscall : IfxCpu_IntrinsicsDcc.h
  • syze_t : Ifx_Ssw_CompilersGhs.h


iLLD_TC38A: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- t -

  • t : IfxCpu_IntrinsicsDcc.h
  • TIME_INFINITE : Ifx_Types.h
  • TIME_NULL : Ifx_Types.h
  • TimeConst : Bsp.h
  • TimeConst_0s : Bsp.h
  • TimeConst_100ms : Bsp.h
  • TimeConst_100ns : Bsp.h
  • TimeConst_100s : Bsp.h
  • TimeConst_100us : Bsp.h
  • TimeConst_10ms : Bsp.h
  • TimeConst_10ns : Bsp.h
  • TimeConst_10s : Bsp.h
  • TimeConst_10us : Bsp.h
  • TimeConst_1ms : Bsp.h
  • TimeConst_1s : Bsp.h
  • TimeConst_1us : Bsp.h
  • Timer : Timer.h
  • TIMER_COUNT : Bsp.h
  • Timer_CountOneStep : Timer.h
  • TIMER_INDEX_100MS : Bsp.h
  • TIMER_INDEX_100NS : Bsp.h
  • TIMER_INDEX_100S : Bsp.h
  • TIMER_INDEX_100US : Bsp.h
  • TIMER_INDEX_10MS : Bsp.h
  • TIMER_INDEX_10NS : Bsp.h
  • TIMER_INDEX_10S : Bsp.h
  • TIMER_INDEX_10US : Bsp.h
  • TIMER_INDEX_1MS : Bsp.h
  • TIMER_INDEX_1S : Bsp.h
  • TIMER_INDEX_1US : Bsp.h
  • Timer_Start : Timer.h
  • Timer_StartSingleShotMode : Timer.h
  • Timer_Stop : Timer.h
  • Timer_SynchronousStart : Timer.h
  • Timer_SynchronousStop : Timer.h
  • timingNoInterruptEnd() : Bsp.h
  • timingNoInterruptStart() : Bsp.h
  • TPwm : TPwm.h
  • TPwm_Pause : TPwm.h
  • TPwm_Resume : TPwm.h
  • TPwm_Start : TPwm.h
  • TPwm_Stop : TPwm.h
  • TRUE : Platform_Types.h
  • TxRxHandler : SpiIf.h


iLLD_TC38A: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- u -

  • u : IfxCpu_IntrinsicsDcc.h , Ifx_Ssw_CompilersDcc.h
  • uint16 : Platform_Types.h
  • uint16_least : Platform_Types.h
  • uint32 : Platform_Types.h
  • uint32_least : Platform_Types.h
  • uint64 : Platform_Types.h
  • uint8 : Platform_Types.h
  • uint8_least : Platform_Types.h


iLLD_TC38A: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- v -

  • VecAvg_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • VecGain_f32() : Ifx_Cf32.h , Ifx_Cf32.c
  • VecHalfSwap_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • VecMax_f32() : Ifx_Cf32.h , Ifx_Cf32.c
  • VecMaxIdx_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • VecMin_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • VecMinIdx_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • VecOfs_f32() : Ifx_Cf32.h , Ifx_Cf32.c
  • VecPwrdB_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • VecPwrdB_SF() : Ifx_Cf32.c , Ifx_Cf32.h
  • VecSum_f32() : Ifx_Cf32.h , Ifx_Cf32.c
  • VecWin_f32() : Ifx_Cf32.h , Ifx_Cf32.c
  • voidfunc : IfxCpu_IntrinsicsGhs.h
  • voidfuncvoid : Ifx_Types.h
  • vvoid : Ifx_Types.h


iLLD_TC38A: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- w -

  • wait() : Bsp.h
  • waitPoll() : Bsp.c , Bsp.h
  • waitTime() : Bsp.h , Bsp.c
  • WaitTimeFunction : Bsp.h
  • wi : IfxCpu_IntrinsicsDcc.h


iLLD_TC38A: Globals

- _ -

  • __abs() : IfxCpu_IntrinsicsDcc.h
  • __absdif() : IfxCpu_IntrinsicsDcc.h
  • __abss() : IfxCpu_IntrinsicsDcc.h
  • __addr_to_cx() : IfxCpu_Intrinsics.h
  • __adds() : IfxCpu_IntrinsicsDcc.h
  • __bisr() : IfxCpu_IntrinsicsDcc.h
  • __cacheawi() : IfxCpu_IntrinsicsDcc.h
  • __clo() : IfxCpu_IntrinsicsDcc.h
  • __cls() : IfxCpu_IntrinsicsDcc.h
  • __clz() : IfxCpu_IntrinsicsDcc.h
  • __Core1_start() : Ifx_Ssw.h , Ifx_Ssw_Tc1.c
  • __Core2_start() : Ifx_Ssw.h , Ifx_Ssw_Tc2.c
  • __Core3_start() : Ifx_Ssw_Tc3.c , Ifx_Ssw.h
  • __cx_to_addr() : IfxCpu_Intrinsics.h
  • __debug() : IfxCpu_IntrinsicsDcc.h
  • __disable() : IfxCpu_IntrinsicsDcc.h
  • __dsync() : IfxCpu_IntrinsicsDcc.h
  • __enable() : IfxCpu_IntrinsicsDcc.h
  • __extr() : IfxCpu_IntrinsicsDcc.h
  • __extru() : IfxCpu_IntrinsicsDcc.h
  • __float_to_sfract() : IfxCpu_IntrinsicsDcc.h
  • __initcirc() : IfxCpu_IntrinsicsDcc.h
  • __ins() : IfxCpu_IntrinsicsDcc.h
  • __insert() : IfxCpu_IntrinsicsDcc.h
  • __insn() : IfxCpu_IntrinsicsDcc.h
  • __isync() : IfxCpu_IntrinsicsDcc.h
  • __ld32() : IfxCpu_Intrinsics.h
  • __ld64() : IfxCpu_Intrinsics.h
  • __ld64_lu() : IfxCpu_Intrinsics.h
  • __ldmst_c() : IfxCpu_Intrinsics.h
  • __max() : IfxCpu_IntrinsicsDcc.h
  • __maxs() : IfxCpu_IntrinsicsDcc.h
  • __maxu() : IfxCpu_IntrinsicsDcc.h
  • __mfcr() : IfxCpu_IntrinsicsDcc.h
  • __min() : IfxCpu_IntrinsicsDcc.h
  • __mins() : IfxCpu_IntrinsicsDcc.h
  • __minu() : IfxCpu_IntrinsicsDcc.h
  • __mtcr() : IfxCpu_IntrinsicsDcc.h
  • __nop() : IfxCpu_IntrinsicsDcc.h
  • __restore() : IfxCpu_IntrinsicsDcc.h
  • __rslcx() : IfxCpu_IntrinsicsDcc.h
  • __scheduling_barrier() : IfxCpu_IntrinsicsDcc.h
  • __st32() : IfxCpu_Intrinsics.h
  • __st64() : IfxCpu_Intrinsics.h
  • __st64_lu() : IfxCpu_Intrinsics.h
  • __svlcx() : IfxCpu_IntrinsicsDcc.h
  • __syscall() : IfxCpu_IntrinsicsDcc.h
  • _START() : Ifx_Ssw_Tc0.c
  • _START1() : Ifx_Ssw_Tc1.c
  • _START2() : Ifx_Ssw_Tc2.c
  • _START3() : Ifx_Ssw_Tc3.c


iLLD_TC38A: Globals

- a -

  • addTTime() : Bsp.h
  • areInterruptsEnabled() : Bsp.h


iLLD_TC38A: Globals

- c -

  • core0_main() : Ifx_Ssw_Tc0.c
  • core1_main() : Ifx_Ssw_Tc1.c
  • core2_main() : Ifx_Ssw_Tc2.c
  • core3_main() : Ifx_Ssw_Tc3.c
  • CplxVecCpy_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • CplxVecCpy_f32S() : Ifx_Cf32.h , Ifx_Cf32.c
  • CplxVecMag_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • CplxVecMul_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • CplxVecPwr_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • CplxVecRst_f32() : Ifx_Cf32.h , Ifx_Cf32.c


iLLD_TC38A: Globals

- d -

  • DateTime_get() : Ifx_DateTime.c , Ifx_DateTime.h
  • DateTime_set() : Ifx_DateTime.h , Ifx_DateTime.c
  • disableInterrupts() : Bsp.h


iLLD_TC38A: Globals

- e -

  • elapsed() : Bsp.h
  • enableInterrupts() : Bsp.h


iLLD_TC38A: Globals

- f -

  • forceDisableInterrupts() : Bsp.h


iLLD_TC38A: Globals

- g -

  • getDeadLine() : Bsp.h
  • getTimeout() : Bsp.h


iLLD_TC38A: Globals

- i -

  • Ifx__absb() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__absdif() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__absh() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__abss() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__abssh() : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • Ifx__adds() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__addsu() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__cacheai() : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__cacheawi() : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__cacheawi_bo_post_inc() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__cacheiwi() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__clo() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__cls() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__clssf() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__cmpAndSwap() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__crc32() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__debug() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__disable_and_save() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__dsync() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__extr() : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extractbyte1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extractbyte2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extractbyte3() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extractbyte4() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extracthw1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extracthw2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extractubyte1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extractubyte2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extractubyte3() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extractubyte4() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extractuhw1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extractuhw2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extru() : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__fabs() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__fabsf() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__fixpoint_to_float32() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__float_to_fract() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__float_to_sfract() : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__fract_to_float() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__fract_to_sfract() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__getA11() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__getbyte1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__getbyte2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__getbyte3() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__getbyte4() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__getDataParamRet() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__getfract() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__gethw1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__gethw2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__getubyte1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__getubyte2() : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h
  • Ifx__getubyte3() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__getubyte4() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__getuhw1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__getuhw2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__imaskldmst() : IfxCpu_IntrinsicsDcc.h
  • Ifx__initpackb() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__initpackbl() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__initpackhw() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__initpackhwl() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__initupackb() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__initupackhw() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__ins() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__insert() : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__insertbyte1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__insertbyte2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__insertbyte3() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__insertbyte4() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__inserthw1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__inserthw2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__insertubyte1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__insertubyte2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__insertubyte3() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__insertubyte4() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__insertuhw1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__insertuhw2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__insn() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__isync() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__jump_and_link() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__jumpBackToLink() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__jumpToFunction() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__jumpToFunctionWithLink() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__ldmst() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__ldmstAsm() : IfxCpu_IntrinsicsTasking.h
  • Ifx__mac_r_sf() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__mac_sf() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__max() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__maxs() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__maxu() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__min() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__minb() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__minbu() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__minh() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__minhu() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__mins() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__minu() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__moveToAddrParam0() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__moveToDataParam0() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__moveToDataParamRet() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__mulfractfract() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__mulfractlong() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__mulsc() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__non_return_call() : IfxCpu_IntrinsicsDcc.h
  • Ifx__nop() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__nops() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__nops1000() : IfxCpu_IntrinsicsDcc.h
  • Ifx__parity() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__popcnt() : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__restore() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__rol() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__ror() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__round16() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__rslcx() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__s16_to_sfract() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__satb() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__satbu() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__sath() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__sathu() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__setbyte1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__setbyte2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__setbyte3() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__setbyte4() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__sethw1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__sethw2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__setStackPointer() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__setubyte1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__setubyte2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__setubyte3() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__setubyte4() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__setuhw1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__setuhw2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__sfract_to_s16() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__sfract_to_u16() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__shaaccum() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__shafracts() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__shasfracts() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__stopPerfCounters() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__subs() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__subsu() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__svlcx() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__swap() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__u16_to_sfract() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx_AngleTrkF32_bound() : Ifx_AngleTrkF32.c
  • Ifx_AngleTrkF32_boundInput() : Ifx_AngleTrkF32.c
  • Ifx_AngleTrkF32_getAbsolutePosition() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_getDirection() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_getFault() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_getLoopSpeed() : Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_getOffset() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_getPeriodPerRotation() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_getPosition() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_getRawPosition() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_getRefreshPeriod() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_getResolution() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_getSensorType() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_getSpeed() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_getTurn() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_init() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_initConfig() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_reset() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_resetFaults() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_setControlGains() : Ifx_AngleTrkF32.c
  • Ifx_AngleTrkF32_setOffset() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_setRefreshPeriod() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_setUserSampling() : Ifx_AngleTrkF32.c
  • Ifx_AngleTrkF32_stdIfPosInit() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_step() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_update() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_updateStatus() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_Assert_doLevel() : Assert.c , Assert.h
  • Ifx_Assert_doValidate() : Assert.c , Assert.h
  • Ifx_C_Init() : Compilers.h
  • IFX_Cf32_add() : Ifx_Cf32.h
  • IFX_Cf32_amp() : Ifx_Cf32.h
  • IFX_Cf32_div() : Ifx_Cf32.h
  • IFX_Cf32_dot() : Ifx_Cf32.h
  • IFX_Cf32_exp() : Ifx_Cf32.h
  • IFX_Cf32_mag() : Ifx_Cf32.h
  • IFX_Cf32_mul() : Ifx_Cf32.h
  • IFX_Cf32_reset() : Ifx_Cf32.h
  • IFX_Cf32_saturate() : Ifx_Cf32.h
  • IFX_Cf32_set() : Ifx_Cf32.h
  • IFX_Cf32_sub() : Ifx_Cf32.h
  • Ifx_CircularBuffer_addDataIncr() : Ifx_CircularBuffer.c
  • Ifx_CircularBuffer_get16() : Ifx_CircularBuffer.c , Ifx_CircularBuffer.h
  • Ifx_CircularBuffer_get32() : Ifx_CircularBuffer.c , Ifx_CircularBuffer.h
  • Ifx_CircularBuffer_read32() : Ifx_CircularBuffer.c , Ifx_CircularBuffer.h
  • Ifx_CircularBuffer_read8() : Ifx_CircularBuffer.c , Ifx_CircularBuffer.h
  • Ifx_CircularBuffer_write32() : Ifx_CircularBuffer.c , Ifx_CircularBuffer.h
  • Ifx_CircularBuffer_write8() : Ifx_CircularBuffer.c , Ifx_CircularBuffer.h
  • Ifx_ClpxFloat32_Integral_init() : Ifx_IntegralF32.c , Ifx_IntegralF32.h
  • Ifx_ClpxFloat32_Integral_reset() : Ifx_IntegralF32.c , Ifx_IntegralF32.h
  • Ifx_ClpxFloat32_Integral_step() : Ifx_IntegralF32.c , Ifx_IntegralF32.h
  • Ifx_Console_decrAlign() : Ifx_Console.h
  • Ifx_Console_getIo() : Ifx_Console.h
  • Ifx_Console_incrAlign() : Ifx_Console.h
  • Ifx_Console_init() : Ifx_Console.c , Ifx_Console.h
  • Ifx_Console_print() : Ifx_Console.c , Ifx_Console.h
  • Ifx_Console_printAlign() : Ifx_Console.c , Ifx_Console.h
  • Ifx_Crc_bitByBit() : Ifx_Crc.c , Ifx_Crc.h
  • Ifx_Crc_bitByBitFast() : Ifx_Crc.c , Ifx_Crc.h
  • Ifx_Crc_createTable() : Ifx_Crc.c , Ifx_Crc.h
  • Ifx_Crc_init() : Ifx_Crc.c , Ifx_Crc.h
  • Ifx_Crc_reflect() : Ifx_Crc.c
  • Ifx_Crc_table() : Ifx_Crc.c , Ifx_Crc.h
  • Ifx_Crc_tableFast() : Ifx_Crc.c , Ifx_Crc.h
  • Ifx_FftF32_generateTwiddleFactor() : Ifx_FftF32.c , Ifx_FftF32.h
  • Ifx_FftF32_lookUpReversedBits() : Ifx_FftF32.h
  • Ifx_FftF32_lookUpTwiddleFactor() : Ifx_FftF32.h
  • Ifx_FftF32_radix2() : Ifx_FftF32.c , Ifx_FftF32.h
  • Ifx_FftF32_radix2DecimationInTime() : Ifx_FftF32.c
  • Ifx_FftF32_radix2I() : Ifx_FftF32.c , Ifx_FftF32.h
  • Ifx_FftF32_reverseBits() : Ifx_FftF32.c , Ifx_FftF32.h
  • Ifx_Fifo_canReadCount() : Ifx_Fifo.c , Ifx_Fifo.h
  • Ifx_Fifo_canWriteCount() : Ifx_Fifo.c , Ifx_Fifo.h
  • Ifx_Fifo_clear() : Ifx_Fifo.c , Ifx_Fifo.h
  • Ifx_Fifo_create() : Ifx_Fifo.c , Ifx_Fifo.h
  • Ifx_Fifo_destroy() : Ifx_Fifo.c , Ifx_Fifo.h
  • Ifx_Fifo_flush() : Ifx_Fifo.h
  • Ifx_Fifo_init() : Ifx_Fifo.c , Ifx_Fifo.h
  • Ifx_Fifo_isEmpty() : Ifx_Fifo.h
  • Ifx_Fifo_read() : Ifx_Fifo.c , Ifx_Fifo.h
  • Ifx_Fifo_readCount() : Ifx_Fifo.h
  • Ifx_Fifo_write() : Ifx_Fifo.c , Ifx_Fifo.h
  • Ifx_Fifo_writeCount() : Ifx_Fifo.h
  • Ifx_GlobalResources_get() : Ifx_GlobalResources.c , Ifx_GlobalResources.h
  • Ifx_GlobalResources_getIndex() : Ifx_GlobalResources.c , Ifx_GlobalResources.h
  • Ifx_GlobalResources_getItem() : Ifx_GlobalResources.c , Ifx_GlobalResources.h
  • Ifx_GlobalResources_getName() : Ifx_GlobalResources.c , Ifx_GlobalResources.h
  • Ifx_GlobalResources_init() : Ifx_GlobalResources.c , Ifx_GlobalResources.h
  • Ifx_IntegralF32_init() : Ifx_IntegralF32.c , Ifx_IntegralF32.h
  • Ifx_IntegralF32_reset() : Ifx_IntegralF32.c , Ifx_IntegralF32.h
  • Ifx_IntegralF32_step() : Ifx_IntegralF32.c , Ifx_IntegralF32.h
  • Ifx_InternalMux_init() : Ifx_InternalMux.c , Ifx_InternalMux.h
  • Ifx_LowPassPt1F32_do() : Ifx_LowPassPt1F32.c , Ifx_LowPassPt1F32.h
  • Ifx_LowPassPt1F32_init() : Ifx_LowPassPt1F32.c , Ifx_LowPassPt1F32.h
  • Ifx_LowPassPt1F32_reset() : Ifx_LowPassPt1F32.h
  • Ifx_LutAtan2F32_float32() : Ifx_LutAtan2F32.c , Ifx_LutAtan2F32.h
  • Ifx_LutAtan2F32_float32Private() : Ifx_LutAtan2F32.c
  • Ifx_LutAtan2F32_fxpAngle() : Ifx_LutAtan2F32.c , Ifx_LutAtan2F32.h
  • Ifx_LutAtan2F32_fxpAnglePrivate() : Ifx_LutAtan2F32.c
  • Ifx_LutAtan2F32_init() : Ifx_LutAtan2F32.c , Ifx_LutAtan2F32.h
  • Ifx_LutIndexedLinearF32_search() : Ifx_LutIndexedLinearF32.h
  • Ifx_LutLinearF32_searchBin() : Ifx_LutLinearF32.c , Ifx_LutLinearF32.h
  • Ifx_LutLinearF32_searchNegSeq() : Ifx_LutLinearF32.h
  • Ifx_LutLinearF32_searchPosSeq() : Ifx_LutLinearF32.h
  • Ifx_LutLSincosF32_cos() : Ifx_LutLSincosF32.h
  • Ifx_LutLSincosF32_cossin() : Ifx_LutLSincosF32.h
  • Ifx_LutLSincosF32_sin() : Ifx_LutLSincosF32.h
  • Ifx_LutSincosF32_cos() : Ifx_LutSincosF32.h
  • Ifx_LutSincosF32_cossin() : Ifx_LutSincosF32.h
  • Ifx_LutSincosF32_init() : Ifx_LutSincosF32.c , Ifx_LutSincosF32.h
  • Ifx_LutSincosF32_sin() : Ifx_LutSincosF32.c , Ifx_LutSincosF32.h
  • Ifx_RampF32_getRef() : Ifx_RampF32.h
  • Ifx_RampF32_getValue() : Ifx_RampF32.h
  • Ifx_RampF32_init() : Ifx_RampF32.h
  • Ifx_RampF32_reset() : Ifx_RampF32.h
  • Ifx_RampF32_setRef() : Ifx_RampF32.h
  • Ifx_RampF32_setSlewRate() : Ifx_RampF32.h
  • Ifx_RampF32_step() : Ifx_RampF32.c , Ifx_RampF32.h
  • Ifx_Shell_bbProtocolStart() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_cmdEscapeProcess() : Ifx_Shell.c
  • Ifx_Shell_commandFind() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_commandListFind() : Ifx_Shell.c
  • Ifx_Shell_deinit() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_disable() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_enable() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_execute() : Ifx_Shell.c
  • Ifx_Shell_init() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_initConfig() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_isEndOfLine() : Ifx_Shell.c
  • Ifx_Shell_matchToken() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_parseAddress() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_parseFloat32() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_parseFloat64() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_parseSInt32() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_parseSInt64() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_parseToken() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_parseUInt32() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_parseUInt64() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_printSyntax() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_process() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_protocolStart() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_showHelp() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_showHelpSingle() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_showHelpSingleCommand() : Ifx_Shell.c
  • Ifx_Shell_skipWhitespace() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Ssw_C_Init() : Ifx_Ssw_Infra.c , Ifx_Ssw_Infra.h
  • Ifx_Ssw_C_InitInline() : Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersTasking.h
  • Ifx_Ssw_clearCpuEndinit() : Ifx_Ssw_Infra.c , Ifx_Ssw_Infra.h
  • Ifx_Ssw_clearCpuEndinitInline() : Ifx_Ssw_Infra.h
  • Ifx_Ssw_clearGlobalSafetyEndinitInline() : Ifx_Ssw_Infra.h
  • Ifx_Ssw_clearSafetyEndinit() : Ifx_Ssw_Infra.c , Ifx_Ssw_Infra.h
  • Ifx_Ssw_clearSafetyEndinitInline() : Ifx_Ssw_Infra.h
  • Ifx_Ssw_CLZ() : Ifx_Ssw_CompilersDcc.h
  • IFX_SSW_COMMON_LINKER_SYMBOLS() : Ifx_Ssw_Tc0.c , Ifx_Ssw_Tc1.c , Ifx_Ssw_Tc2.c , Ifx_Ssw_Tc3.c
  • IFX_SSW_CORE_LINKER_SYMBOLS() : Ifx_Ssw_Tc0.c , Ifx_Ssw_Tc1.c , Ifx_Ssw_Tc2.c , Ifx_Ssw_Tc3.c
  • Ifx_Ssw_disableCpuWatchdog() : Ifx_Ssw_Infra.c , Ifx_Ssw_Infra.h
  • Ifx_Ssw_disableSafetyWatchdog() : Ifx_Ssw_Infra.c , Ifx_Ssw_Infra.h
  • Ifx_Ssw_DSYNC() : Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersTasking.h
  • Ifx_Ssw_enableCpuWatchdog() : Ifx_Ssw_Infra.c , Ifx_Ssw_Infra.h
  • Ifx_Ssw_enableSafetyWatchdog() : Ifx_Ssw_Infra.c , Ifx_Ssw_Infra.h
  • Ifx_Ssw_getCpuWatchdogPassword() : Ifx_Ssw_Infra.c , Ifx_Ssw_Infra.h
  • Ifx_Ssw_getCpuWatchdogPasswordInline() : Ifx_Ssw_Infra.h
  • Ifx_Ssw_getDataParam0() : Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersTasking.h
  • Ifx_Ssw_getGlobalSafetyEndinitPasswordInline() : Ifx_Ssw_Infra.h
  • Ifx_Ssw_getSafetyWatchdogPassword() : Ifx_Ssw_Infra.c , Ifx_Ssw_Infra.h
  • Ifx_Ssw_getSafetyWatchdogPasswordInline() : Ifx_Ssw_Infra.h
  • Ifx_Ssw_getStmFrequency() : Ifx_Ssw_Infra.c , Ifx_Ssw_Infra.h
  • Ifx_Ssw_initCSA() : Ifx_Ssw_Infra.h
  • Ifx_Ssw_isApplicationReset() : Ifx_Ssw_Infra.h
  • Ifx_Ssw_isColdPoweronReset() : Ifx_Ssw_Infra.h
  • Ifx_Ssw_ISYNC() : Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersTasking.h
  • Ifx_Ssw_jumpBackToLink() : Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersTasking.h
  • Ifx_Ssw_jumpToFunction() : Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersTasking.h
  • Ifx_Ssw_jumpToFunctionWithLink() : Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersTasking.h
  • Ifx_Ssw_MFCR() : Ifx_Ssw_CompilersDcc.h
  • Ifx_Ssw_MINU() : Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersTasking.h
  • Ifx_Ssw_moveToDataParam0() : Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersTasking.h
  • Ifx_Ssw_MTCR() : Ifx_Ssw_CompilersDcc.h
  • Ifx_Ssw_NOP() : Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersTasking.h
  • Ifx_Ssw_serviceCpuWatchdog() : Ifx_Ssw_Infra.c , Ifx_Ssw_Infra.h
  • Ifx_Ssw_serviceSafetyWatchdog() : Ifx_Ssw_Infra.c , Ifx_Ssw_Infra.h
  • Ifx_Ssw_setCpu0Idle() : Ifx_Ssw_Infra.c , Ifx_Ssw_Infra.h
  • Ifx_Ssw_setCpuEndinit() : Ifx_Ssw_Infra.c , Ifx_Ssw_Infra.h
  • Ifx_Ssw_setCpuEndinitInline() : Ifx_Ssw_Infra.h
  • Ifx_Ssw_setGlobalSafetyEndinitInline() : Ifx_Ssw_Infra.h
  • Ifx_Ssw_setSafetyEndinit() : Ifx_Ssw_Infra.c , Ifx_Ssw_Infra.h
  • Ifx_Ssw_setSafetyEndinitInline() : Ifx_Ssw_Infra.h
  • Ifx_Ssw_startCore() : Ifx_Ssw_Infra.c , Ifx_Ssw_Infra.h
  • Ifx_WndF32_apply() : Ifx_WndF32.h
  • IfxAsclin_Asc_blockingRead() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_blockingWrite() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_canReadCount() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_canWriteCount() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_clearRx() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_clearTx() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_disableModule() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_flushTx() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_getReadCount() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_getReadEvent() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_getSendCount() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_getTxTimeStamp() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_getWriteCount() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_getWriteEvent() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_initiateTransmission() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_initModule() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_initModuleConfig() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_isrError() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_isrReceive() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_isrTransmit() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_read() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_resetSendCount() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_stdIfDPipeInit() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_write() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_clearAllFlags() : IfxAsclin.h
  • IfxAsclin_clearBreakDetectedFlag() : IfxAsclin.h
  • IfxAsclin_clearCollisionDetectionErrorFlag() : IfxAsclin.h
  • IfxAsclin_clearFallingEdgeDetectedFlag() : IfxAsclin.h
  • IfxAsclin_clearFrameErrorFlag() : IfxAsclin.h
  • IfxAsclin_clearHeaderTimeoutFlag() : IfxAsclin.h
  • IfxAsclin_clearKernelResetStatus() : IfxAsclin.h
  • IfxAsclin_clearLinAutoBaudDetectionErrorFlag() : IfxAsclin.h
  • IfxAsclin_clearLinChecksumErrorFlag() : IfxAsclin.h
  • IfxAsclin_clearLinParityErrorFlag() : IfxAsclin.h
  • IfxAsclin_clearParityErrorFlag() : IfxAsclin.h
  • IfxAsclin_clearRaisingEdgeDetectedFlag() : IfxAsclin.h
  • IfxAsclin_clearResponseTimeoutFlag() : IfxAsclin.h
  • IfxAsclin_clearRxFifoFillLevelFlag() : IfxAsclin.h
  • IfxAsclin_clearRxFifoOverflowFlag() : IfxAsclin.h
  • IfxAsclin_clearRxFifoUnderflowFlag() : IfxAsclin.h
  • IfxAsclin_clearRxHeaderEndFlag() : IfxAsclin.h
  • IfxAsclin_clearRxResponseEndFlag() : IfxAsclin.h
  • IfxAsclin_clearTransmissionCompletedFlag() : IfxAsclin.h
  • IfxAsclin_clearTxFifoFillLevelFlag() : IfxAsclin.h
  • IfxAsclin_clearTxFifoOverflowFlag() : IfxAsclin.h
  • IfxAsclin_clearTxHeaderEndFlag() : IfxAsclin.h
  • IfxAsclin_clearTxResponseEndFlag() : IfxAsclin.h
  • IfxAsclin_disableAllFlags() : IfxAsclin.h
  • IfxAsclin_disableModule() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_enableAscErrorFlags() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_enableAutoBaudrateDetection() : IfxAsclin.h
  • IfxAsclin_enableBreakDetectedFlag() : IfxAsclin.h
  • IfxAsclin_enableCollisionDetection() : IfxAsclin.h
  • IfxAsclin_enableCollisionDetectionErrorFlag() : IfxAsclin.h
  • IfxAsclin_enableCts() : IfxAsclin.h
  • IfxAsclin_enableFallingEdgeDetectedFlag() : IfxAsclin.h
  • IfxAsclin_enableFrameErrorFlag() : IfxAsclin.h
  • IfxAsclin_enableHardwareChecksum() : IfxAsclin.h
  • IfxAsclin_enableHeaderTimeoutFlag() : IfxAsclin.h
  • IfxAsclin_enableLinAutoBaudDetectionErrorFlag() : IfxAsclin.h
  • IfxAsclin_enableLinChecksumErrorFlag() : IfxAsclin.h
  • IfxAsclin_enableLinParityErrorFlag() : IfxAsclin.h
  • IfxAsclin_enableLoopBackMode() : IfxAsclin.h
  • IfxAsclin_enableModule() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_enableParity() : IfxAsclin.h
  • IfxAsclin_enableParityErrorFlag() : IfxAsclin.h
  • IfxAsclin_enableRaisingEdgeDetectedFlag() : IfxAsclin.h
  • IfxAsclin_enableResponseTimeoutFlag() : IfxAsclin.h
  • IfxAsclin_enableRxFifoFillLevelFlag() : IfxAsclin.h
  • IfxAsclin_enableRxFifoInlet() : IfxAsclin.h
  • IfxAsclin_enableRxFifoOverflowFlag() : IfxAsclin.h
  • IfxAsclin_enableRxFifoUnderflowFlag() : IfxAsclin.h
  • IfxAsclin_enableRxHeaderEndFlag() : IfxAsclin.h
  • IfxAsclin_enableRxResponseEndFlag() : IfxAsclin.h
  • IfxAsclin_enableTransmissionCompletedFlag() : IfxAsclin.h
  • IfxAsclin_enableTxFifoFillLevelFlag() : IfxAsclin.h
  • IfxAsclin_enableTxFifoOutlet() : IfxAsclin.h
  • IfxAsclin_enableTxFifoOverflowFlag() : IfxAsclin.h
  • IfxAsclin_enableTxHeaderEndFlag() : IfxAsclin.h
  • IfxAsclin_enableTxResponseEndFlag() : IfxAsclin.h
  • IfxAsclin_flushRxFifo() : IfxAsclin.h
  • IfxAsclin_flushTxFifo() : IfxAsclin.h
  • IfxAsclin_getAddress() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_getAllErrorFlagsStatus() : IfxAsclin.h
  • IfxAsclin_getBreakDetectedFlagStatus() : IfxAsclin.h
  • IfxAsclin_getClockSource() : IfxAsclin.h
  • IfxAsclin_getClockStatus() : IfxAsclin.h
  • IfxAsclin_getCollisionDetectionErrorFlagStatus() : IfxAsclin.h
  • IfxAsclin_getFaFrequency() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_getFallingEdgeDetectedFlagStatus() : IfxAsclin.h
  • IfxAsclin_getFrameErrorFlagStatus() : IfxAsclin.h
  • IfxAsclin_getHeaderTimeoutFlagStatus() : IfxAsclin.h
  • IfxAsclin_getIndex() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_getKernelResetStatus() : IfxAsclin.h
  • IfxAsclin_getLinAutoBaudDetectionErrorFlagStatus() : IfxAsclin.h
  • IfxAsclin_getLinChecksumErrorFlagStatus() : IfxAsclin.h
  • IfxAsclin_getLinParityErrorFlagStatus() : IfxAsclin.h
  • IfxAsclin_getModuleStatus() : IfxAsclin.h
  • IfxAsclin_getOvsFrequency() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_getParityErrorFlagStatus() : IfxAsclin.h
  • IfxAsclin_getPdFrequency() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_getPrescaler() : IfxAsclin.h
  • IfxAsclin_getRaisingEdgeDetectedFlagStatus() : IfxAsclin.h
  • IfxAsclin_getReceiveSignalStatus() : IfxAsclin.h
  • IfxAsclin_getResponseTimeoutFlagStatus() : IfxAsclin.h
  • IfxAsclin_getRxFifoFillLevel() : IfxAsclin.h
  • IfxAsclin_getRxFifoFillLevelFlagStatus() : IfxAsclin.h
  • IfxAsclin_getRxFifoOutletWidth() : IfxAsclin.h
  • IfxAsclin_getRxFifoOverflowFlagStatus() : IfxAsclin.h
  • IfxAsclin_getRxFifoUnderflowFlagStatus() : IfxAsclin.h
  • IfxAsclin_getRxHeaderEndFlagStatus() : IfxAsclin.h
  • IfxAsclin_getRxResponseEndFlagStatus() : IfxAsclin.h
  • IfxAsclin_getShiftFrequency() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_getSrcPointerEr() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_getSrcPointerRx() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_getSrcPointerTx() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_getTransmissionCompletedFlagStatus() : IfxAsclin.h
  • IfxAsclin_getTransmitSignalStatus() : IfxAsclin.h
  • IfxAsclin_getTxFifoFillLevel() : IfxAsclin.h
  • IfxAsclin_getTxFifoFillLevelFlagStatus() : IfxAsclin.h
  • IfxAsclin_getTxFifoInletWidth() : IfxAsclin.h
  • IfxAsclin_getTxFifoOverflowFlagStatus() : IfxAsclin.h
  • IfxAsclin_getTxHeaderEndFlagStatus() : IfxAsclin.h
  • IfxAsclin_getTxResponseEndFlagStatus() : IfxAsclin.h
  • IfxAsclin_initCtsPin() : IfxAsclin.h
  • IfxAsclin_initRtsPin() : IfxAsclin.h
  • IfxAsclin_initRxPin() : IfxAsclin.h
  • IfxAsclin_initSclkPin() : IfxAsclin.h
  • IfxAsclin_initSlsoPin() : IfxAsclin.h
  • IfxAsclin_initTxPin() : IfxAsclin.h
  • IfxAsclin_isModuleSuspended() : IfxAsclin.h
  • IfxAsclin_Lin_checkForReceivedHeaderFlags() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_checkForReceivedResponseFlags() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_checkForTransmittedHeaderFlags() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_checkForTransmittedResponseFlags() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_clearFlagsStatus() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_disableModule() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_ignoreHeader() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_initModule() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_initModuleConfig() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_isrError() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_isrReceive() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_isrTransmit() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_prepareHeaderReception() : IfxAsclin_Lin.h
  • IfxAsclin_Lin_prepareResponseReception() : IfxAsclin_Lin.h
  • IfxAsclin_Lin_readHeader() : IfxAsclin_Lin.h
  • IfxAsclin_Lin_readResponse() : IfxAsclin_Lin.h
  • IfxAsclin_Lin_receiveHeader() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_receiveResponse() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_sendFrame() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_sendHeader() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_sendResponse() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_waitForReceivedHeader() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_waitForReceivedResponse() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_waitForTransmittedHeader() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_waitForTransmittedResponse() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_read16() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_read32() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_read8() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_readRxData() : IfxAsclin.h
  • IfxAsclin_resetModule() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_setBaudrateBitFields() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_setBitTiming() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_setBrdLowerlimt() : IfxAsclin.h
  • IfxAsclin_setBrdUpperlimt() : IfxAsclin.h
  • IfxAsclin_setChecksumInjection() : IfxAsclin.h
  • IfxAsclin_setChecksumMode() : IfxAsclin.h
  • IfxAsclin_setClockPolarity() : IfxAsclin.h
  • IfxAsclin_setClockSource() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_setCtsInput() : IfxAsclin.h
  • IfxAsclin_setDataLength() : IfxAsclin.h
  • IfxAsclin_setDenominator() : IfxAsclin.h
  • IfxAsclin_setDisableModuleRequest() : IfxAsclin.h
  • IfxAsclin_setEnableModuleRequest() : IfxAsclin.h
  • IfxAsclin_setFilterDepth() : IfxAsclin.h
  • IfxAsclin_setFrameMode() : IfxAsclin.h
  • IfxAsclin_setHeaderResponseSelect() : IfxAsclin.h
  • IfxAsclin_setIdleDelay() : IfxAsclin.h
  • IfxAsclin_setKernelResetOne() : IfxAsclin.h
  • IfxAsclin_setKernelResetZero() : IfxAsclin.h
  • IfxAsclin_setLeadDelay() : IfxAsclin.h
  • IfxAsclin_setLinBreakLength() : IfxAsclin.h
  • IfxAsclin_setLinHeaderTimeout() : IfxAsclin.h
  • IfxAsclin_setLinMode() : IfxAsclin.h
  • IfxAsclin_setLinResponseTimeoutMode() : IfxAsclin.h
  • IfxAsclin_setLinResponseTimeoutThreshold() : IfxAsclin.h
  • IfxAsclin_setNumerator() : IfxAsclin.h
  • IfxAsclin_setOversampling() : IfxAsclin.h
  • IfxAsclin_setParityType() : IfxAsclin.h
  • IfxAsclin_setPrescaler() : IfxAsclin.h
  • IfxAsclin_setRtsCtsPolarity() : IfxAsclin.h
  • IfxAsclin_setRxBufferMode() : IfxAsclin.h
  • IfxAsclin_setRxFifoInterruptLevel() : IfxAsclin.h
  • IfxAsclin_setRxFifoInterruptMode() : IfxAsclin.h
  • IfxAsclin_setRxFifoOutletWidth() : IfxAsclin.h
  • IfxAsclin_setRxInput() : IfxAsclin.h
  • IfxAsclin_setSampleMode() : IfxAsclin.h
  • IfxAsclin_setSamplePointPosition() : IfxAsclin.h
  • IfxAsclin_setShiftDirection() : IfxAsclin.h
  • IfxAsclin_setSlavePolarity() : IfxAsclin.h
  • IfxAsclin_setSleepMode() : IfxAsclin.h
  • IfxAsclin_setStopBit() : IfxAsclin.h
  • IfxAsclin_setSuspendMode() : IfxAsclin.h
  • IfxAsclin_setTransmitHeaderRequestFlag() : IfxAsclin.h
  • IfxAsclin_setTransmitResponseRequestFlag() : IfxAsclin.h
  • IfxAsclin_setTransmitWakeRequestFlag() : IfxAsclin.h
  • IfxAsclin_setTxFifoInletWidth() : IfxAsclin.h
  • IfxAsclin_setTxFifoInterruptLevel() : IfxAsclin.h
  • IfxAsclin_setTxFifoInterruptMode() : IfxAsclin.h
  • IfxAsclin_Spi_disableModule() : IfxAsclin_Spi.c , IfxAsclin_Spi.h
  • IfxAsclin_Spi_exchange() : IfxAsclin_Spi.c , IfxAsclin_Spi.h
  • IfxAsclin_Spi_getStatus() : IfxAsclin_Spi.c , IfxAsclin_Spi.h
  • IfxAsclin_Spi_initModule() : IfxAsclin_Spi.c , IfxAsclin_Spi.h
  • IfxAsclin_Spi_initModuleConfig() : IfxAsclin_Spi.c , IfxAsclin_Spi.h
  • IfxAsclin_Spi_isrError() : IfxAsclin_Spi.c , IfxAsclin_Spi.h
  • IfxAsclin_Spi_isrReceive() : IfxAsclin_Spi.c , IfxAsclin_Spi.h
  • IfxAsclin_Spi_isrTransmit() : IfxAsclin_Spi.c , IfxAsclin_Spi.h
  • IfxAsclin_Spi_lock() : IfxAsclin_Spi.c
  • IfxAsclin_Spi_read() : IfxAsclin_Spi.c , IfxAsclin_Spi.h
  • IfxAsclin_Spi_unlock() : IfxAsclin_Spi.c
  • IfxAsclin_Spi_write() : IfxAsclin_Spi.c , IfxAsclin_Spi.h
  • IfxAsclin_write16() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_write32() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_write8() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_writeTxData() : IfxAsclin.h
  • IfxCan_Can_getRxFifo0FillLevel() : IfxCan_Can.h
  • IfxCan_Can_getRxFifo1FillLevel() : IfxCan_Can.h
  • IfxCan_Can_initMessage() : IfxCan_Can.c , IfxCan_Can.h
  • IfxCan_Can_initModule() : IfxCan_Can.c , IfxCan_Can.h
  • IfxCan_Can_initModuleConfig() : IfxCan_Can.c , IfxCan_Can.h
  • IfxCan_Can_initNode() : IfxCan_Can.c , IfxCan_Can.h
  • IfxCan_Can_initNodeConfig() : IfxCan_Can.c , IfxCan_Can.h
  • IfxCan_Can_isNewDataReceived() : IfxCan_Can.h
  • IfxCan_Can_isNodeSynchronized() : IfxCan_Can.h
  • IfxCan_Can_isTxBufferRequestPending() : IfxCan_Can.h
  • IfxCan_Can_isTxFifoQueueFull() : IfxCan_Can.h
  • IfxCan_Can_readMessage() : IfxCan_Can.c , IfxCan_Can.h
  • IfxCan_Can_sendMessage() : IfxCan_Can.c , IfxCan_Can.h
  • IfxCan_Can_setExtendedFilter() : IfxCan_Can.c , IfxCan_Can.h
  • IfxCan_Can_setStandardFilter() : IfxCan_Can.c , IfxCan_Can.h
  • IfxCan_disableModule() : IfxCan.c , IfxCan.h
  • IfxCan_enableModule() : IfxCan.c , IfxCan.h
  • IfxCan_getAddress() : IfxCan.c , IfxCan.h
  • IfxCan_getIndex() : IfxCan.c , IfxCan.h
  • IfxCan_getModuleFrequency() : IfxCan.c , IfxCan.h
  • IfxCan_getNodePointer() : IfxCan.h
  • IfxCan_getSrcPointer() : IfxCan.c , IfxCan.h
  • IfxCan_isModuleEnabled() : IfxCan.h
  • IfxCan_isModuleSuspended() : IfxCan.h
  • IfxCan_Node_acceptRemoteFrameswithExtendedId() : IfxCan.h
  • IfxCan_Node_acceptRemoteFramesWithStandardId() : IfxCan.h
  • IfxCan_Node_clearInterruptFlag() : IfxCan.h
  • IfxCan_Node_clearRxBufferNewDataFlag() : IfxCan.c , IfxCan.h
  • IfxCan_Node_configureExtendedFilterForNonMatchingFrames() : IfxCan.h
  • IfxCan_Node_configureStandardFilterForNonMatchingFrames() : IfxCan.h
  • IfxCan_Node_disableConfigurationChange() : IfxCan.h
  • IfxCan_Node_disableInterrupt() : IfxCan.h
  • IfxCan_Node_disableTxBufferCancellationFinishedInterrupt() : IfxCan.h
  • IfxCan_Node_disableTxBufferTransmissionInterrupt() : IfxCan.h
  • IfxCan_Node_enableConfigurationChange() : IfxCan.h
  • IfxCan_Node_enableInterrupt() : IfxCan.h
  • IfxCan_Node_enableLoopbackMode() : IfxCan.h
  • IfxCan_Node_enableTxBufferCancellationFinishedInterrupt() : IfxCan.h
  • IfxCan_Node_enableTxBufferTransmissionInterrupt() : IfxCan.h
  • IfxCan_Node_getActivityStatus() : IfxCan.h
  • IfxCan_Node_getBRSFromTxEventFifo() : IfxCan.h
  • IfxCan_Node_getBusOffStatus() : IfxCan.h
  • IfxCan_Node_getCodeFromDataLengthInBytes() : IfxCan.h
  • IfxCan_Node_getDataLength() : IfxCan.c , IfxCan.h
  • IfxCan_Node_getDataLengthCode() : IfxCan.h
  • IfxCan_Node_getDataLengthFromCode() : IfxCan.c , IfxCan.h
  • IfxCan_Node_getDataLengthInBytes() : IfxCan.c , IfxCan.h
  • IfxCan_Node_getDataPhaseLastErrorCode() : IfxCan.h
  • IfxCan_Node_getDLCFromTxEventFifo() : IfxCan.h
  • IfxCan_Node_getESIFromTxEventFifo() : IfxCan.h
  • IfxCan_Node_getExtendedFilterElementAddress() : IfxCan.c , IfxCan.h
  • IfxCan_Node_getFDFFromTxEventFifo() : IfxCan.h
  • IfxCan_Node_getFrameMode() : IfxCan.c , IfxCan.h
  • IfxCan_Node_getFrameModeFromTxEventFifo() : IfxCan.c , IfxCan.h
  • IfxCan_Node_getInterruptFlagStatus() : IfxCan.h
  • IfxCan_Node_getLastErroCodeStatus() : IfxCan.h
  • IfxCan_Node_getMesssageId() : IfxCan.h
  • IfxCan_Node_getMesssageIdFromTxEventFifo() : IfxCan.h
  • IfxCan_Node_getMMFromTxEventFifo() : IfxCan.h
  • IfxCan_Node_getRTRFromTxEventFifo() : IfxCan.h
  • IfxCan_Node_getRxBufferDataFieldSize() : IfxCan.c , IfxCan.h
  • IfxCan_Node_getRxBufferElementAddress() : IfxCan.c , IfxCan.h
  • IfxCan_Node_getRxFifo0DataFieldSize() : IfxCan.c , IfxCan.h
  • IfxCan_Node_getRxFifo0ElementAddress() : IfxCan.c , IfxCan.h
  • IfxCan_Node_getRxFifo0FillLevel() : IfxCan.h
  • IfxCan_Node_getRxFifo0GetIndex() : IfxCan.h
  • IfxCan_Node_getRxFifo1DataFieldSize() : IfxCan.c , IfxCan.h
  • IfxCan_Node_getRxFifo1ElementAddress() : IfxCan.c , IfxCan.h
  • IfxCan_Node_getRxFifo1FillLevel() : IfxCan.h
  • IfxCan_Node_getRxFifo1GetIndex() : IfxCan.h
  • IfxCan_Node_getStandardFilterElementAddress() : IfxCan.c , IfxCan.h
  • IfxCan_Node_getTxBufferDataFieldSize() : IfxCan.c , IfxCan.h
  • IfxCan_Node_getTxBufferElementAddress() : IfxCan.c , IfxCan.h
  • IfxCan_Node_getTxEventFifoAcknowledgeIndex() : IfxCan.h
  • IfxCan_Node_getTxEventFifoElementAddress() : IfxCan.c , IfxCan.h
  • IfxCan_Node_getTxEventFifoFillLevel() : IfxCan.h
  • IfxCan_Node_getTxEventFifoGetIndex() : IfxCan.h
  • IfxCan_Node_getTxEventFifoPutIndex() : IfxCan.h
  • IfxCan_Node_getTxEventFifoSize() : IfxCan.h
  • IfxCan_Node_getTxEventFifoStartAddress() : IfxCan.h
  • IfxCan_Node_getTxEventFifoWatermarkLevel() : IfxCan.h
  • IfxCan_Node_getTxFifoQueuePutIndex() : IfxCan.h
  • IfxCan_Node_getTXTSFromTxEventFifo() : IfxCan.h
  • IfxCan_Node_getWarningStatus() : IfxCan.h
  • IfxCan_Node_initRxPin() : IfxCan.c , IfxCan.h
  • IfxCan_Node_initTxPin() : IfxCan.c , IfxCan.h
  • IfxCan_Node_isBitRateSwitchFlagEnabled() : IfxCan.h
  • IfxCan_Node_isCanFDMsgReceived() : IfxCan.h
  • IfxCan_Node_isErrorPassive() : IfxCan.h
  • IfxCan_Node_isErrorStatusIndicatorEnabled() : IfxCan.h
  • IfxCan_Node_isNodeSynchronized() : IfxCan.h
  • IfxCan_Node_isProtocolExceptionEventOccured() : IfxCan.h
  • IfxCan_Node_isRxBufferNewDataUpdated() : IfxCan.c , IfxCan.h
  • IfxCan_Node_isTxBufferCancellationFinished() : IfxCan.h
  • IfxCan_Node_isTxBufferRequestPending() : IfxCan.h
  • IfxCan_Node_isTxBufferTransmissionOccured() : IfxCan.h
  • IfxCan_Node_isTxEventFifoElementLost() : IfxCan.h
  • IfxCan_Node_isTxEventFifoFull() : IfxCan.h
  • IfxCan_Node_isTxFifoQueueFull() : IfxCan.h
  • IfxCan_Node_pauseTransmission() : IfxCan.h
  • IfxCan_Node_readData() : IfxCan.c , IfxCan.h
  • IfxCan_Node_rejectRemoteFramesWithExtendedId() : IfxCan.h
  • IfxCan_Node_rejectRemoteFramesWithStandardId() : IfxCan.h
  • IfxCan_Node_setBitTiming() : IfxCan.c , IfxCan.h
  • IfxCan_Node_setBitTimingValues() : IfxCan.c , IfxCan.h
  • IfxCan_Node_setDataLength() : IfxCan.h
  • IfxCan_Node_setDataLengthCode() : IfxCan.h
  • IfxCan_Node_setDedicatedTxBuffersNumber() : IfxCan.h
  • IfxCan_Node_setErrorStateIndicator() : IfxCan.h
  • IfxCan_Node_setErrStateIndicator() : IfxCan.h
  • IfxCan_Node_setExtendedFilterConfiguration() : IfxCan.h
  • IfxCan_Node_setExtendedFilterId1() : IfxCan.h
  • IfxCan_Node_setExtendedFilterId2() : IfxCan.h
  • IfxCan_Node_setExtendedFilterListSize() : IfxCan.h
  • IfxCan_Node_setExtendedFilterListStartAddress() : IfxCan.h
  • IfxCan_Node_setExtendedFilterRxBufferOffset() : IfxCan.h
  • IfxCan_Node_setExtendedFilterType() : IfxCan.h
  • IfxCan_Node_setFastBitTiming() : IfxCan.c , IfxCan.h
  • IfxCan_Node_setFastBitTimingValues() : IfxCan.c , IfxCan.h
  • IfxCan_Node_setFrameMode() : IfxCan.c , IfxCan.h
  • IfxCan_Node_setFrameModeReq() : IfxCan.c , IfxCan.h
  • IfxCan_Node_setFrameModeRequest() : IfxCan.c , IfxCan.h
  • IfxCan_Node_setGroupInterruptLine() : IfxCan.c , IfxCan.h
  • IfxCan_Node_setInitialisation() : IfxCan.h
  • IfxCan_Node_setInterruptLine() : IfxCan.c , IfxCan.h
  • IfxCan_Node_setMessageMarker() : IfxCan.h
  • IfxCan_Node_setMesssageId() : IfxCan.h
  • IfxCan_Node_setMsgId() : IfxCan.h
  • IfxCan_Node_setRemoteTransmitReq() : IfxCan.h
  • IfxCan_Node_setRemoteTransmitRequest() : IfxCan.h
  • IfxCan_Node_setRxBufferDataFieldSize() : IfxCan.h
  • IfxCan_Node_setRxBuffersStartAddress() : IfxCan.h
  • IfxCan_Node_setRxFifo0AcknowledgeIndex() : IfxCan.h
  • IfxCan_Node_setRxFifo0DataFieldSize() : IfxCan.h
  • IfxCan_Node_setRxFifo0OperatingMode() : IfxCan.h
  • IfxCan_Node_setRxFifo0Size() : IfxCan.h
  • IfxCan_Node_setRxFifo0StartAddress() : IfxCan.h
  • IfxCan_Node_setRxFifo0WatermarkLevel() : IfxCan.h
  • IfxCan_Node_setRxFifo1AcknowledgeIndex() : IfxCan.h
  • IfxCan_Node_setRxFifo1DataFieldSize() : IfxCan.h
  • IfxCan_Node_setRxFifo1OperatingMode() : IfxCan.h
  • IfxCan_Node_setRxFifo1Size() : IfxCan.h
  • IfxCan_Node_setRxFifo1StartAddress() : IfxCan.h
  • IfxCan_Node_setRxFifo1WatermarkLevel() : IfxCan.h
  • IfxCan_Node_setStandardFilterConfiguration() : IfxCan.h
  • IfxCan_Node_setStandardFilterId1() : IfxCan.h
  • IfxCan_Node_setStandardFilterId2() : IfxCan.h
  • IfxCan_Node_setStandardFilterListSize() : IfxCan.h
  • IfxCan_Node_setStandardFilterListStartAddress() : IfxCan.h
  • IfxCan_Node_setStandardFilterRxBufferOffset() : IfxCan.h
  • IfxCan_Node_setStandardFilterType() : IfxCan.h
  • IfxCan_Node_setTransceiverDelayCompensationOffset() : IfxCan.h
  • IfxCan_Node_setTransmitFifoQueueMode() : IfxCan.h
  • IfxCan_Node_setTransmitFifoQueueSize() : IfxCan.h
  • IfxCan_Node_setTxBufferAddRequest() : IfxCan.h
  • IfxCan_Node_setTxBufferCancellationRequest() : IfxCan.h
  • IfxCan_Node_setTxBufferDataFieldSize() : IfxCan.h
  • IfxCan_Node_setTxBuffersStartAddress() : IfxCan.h
  • IfxCan_Node_setTxEventFifoControl() : IfxCan.h
  • IfxCan_Node_setTxEventFifoCtrl() : IfxCan.h
  • IfxCan_Node_setTxEventFifoSize() : IfxCan.h
  • IfxCan_Node_setTxEventFifoStartAddress() : IfxCan.h
  • IfxCan_Node_setTxEventFifoWatermarkLevel() : IfxCan.h
  • IfxCan_Node_writeData() : IfxCan.c , IfxCan.h
  • IfxCan_Node_writeTxBufData() : IfxCan.c , IfxCan.h
  • IfxCan_resetModule() : IfxCan.c , IfxCan.h
  • IfxCan_setClockSource() : IfxCan.c , IfxCan.h
  • IfxCan_setSleepMode() : IfxCan.h
  • IfxCan_setSuspendMode() : IfxCan.h
  • IfxCcu6_clearAllInterruptStatusFlags() : IfxCcu6.h
  • IfxCcu6_clearCounter() : IfxCcu6.h
  • IfxCcu6_clearDeadTimeCounters() : IfxCcu6.h
  • IfxCcu6_clearInterruptStatusFlag() : IfxCcu6.h
  • IfxCcu6_clearT12OneNotification() : IfxCcu6.h
  • IfxCcu6_clearT12PeriodNotification() : IfxCcu6.h
  • IfxCcu6_clearT13CompareNotification() : IfxCcu6.h
  • IfxCcu6_connectTrigger() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_disableAdditionalPrescaler() : IfxCcu6.h
  • IfxCcu6_disableDeadTime() : IfxCcu6.h
  • IfxCcu6_disableDelayBypass() : IfxCcu6.h
  • IfxCcu6_disableInterrupt() : IfxCcu6.h
  • IfxCcu6_disableModulationOutput() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_disableModule() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_disableMultiChannelMode() : IfxCcu6.h
  • IfxCcu6_disableShadowTransfer() : IfxCcu6.h
  • IfxCcu6_disableSingleShotMode() : IfxCcu6.h
  • IfxCcu6_disableT13InvertedModulation() : IfxCcu6.h
  • IfxCcu6_disableTimer() : IfxCcu6.h
  • IfxCcu6_disableTrap() : IfxCcu6.h
  • IfxCcu6_disableTrapPin() : IfxCcu6.h
  • IfxCcu6_enableAdditionalPrescaler() : IfxCcu6.h
  • IfxCcu6_enableCountEvent() : IfxCcu6.h
  • IfxCcu6_enableDeadTime() : IfxCcu6.h
  • IfxCcu6_enableDelayBypass() : IfxCcu6.h
  • IfxCcu6_enableHallPatternShadowTransfer() : IfxCcu6.h
  • IfxCcu6_enableInterrupt() : IfxCcu6.h
  • IfxCcu6_enableModulationOutput() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_enableModule() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_enableMultiChannelMode() : IfxCcu6.h
  • IfxCcu6_enableMultiChannelModeAvailability() : IfxCcu6.h
  • IfxCcu6_enableMultiChannelPwmPatternShadowTransfer() : IfxCcu6.h
  • IfxCcu6_enableMultiChannelT12DowncountingShadowTransfer() : IfxCcu6.h
  • IfxCcu6_enableMultiChannelT12UpcountingShadowTransfer() : IfxCcu6.h
  • IfxCcu6_enableMultiChannelT13UpcountingShadowTransfer() : IfxCcu6.h
  • IfxCcu6_enableShadowTransfer() : IfxCcu6.h
  • IfxCcu6_enableSingleShotMode() : IfxCcu6.h
  • IfxCcu6_enableT13InvertedModulation() : IfxCcu6.h
  • IfxCcu6_enableTimer() : IfxCcu6.h
  • IfxCcu6_enableTrap() : IfxCcu6.h
  • IfxCcu6_enableTrapPin() : IfxCcu6.h
  • IfxCcu6_getAddress() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_getCaptureRegisterValue() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_getCaptureShadowRegisterValue() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_getDeadTimeStatus() : IfxCcu6.h
  • IfxCcu6_getHallPatternSampleState() : IfxCcu6.h
  • IfxCcu6_getIndex() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_getInterruptStatusFlag() : IfxCcu6.h
  • IfxCcu6_getMultiChannelModeAvailabilityStatus() : IfxCcu6.h
  • IfxCcu6_getMultiChannelPWMPatternShadowTransferStatus() : IfxCcu6.h
  • IfxCcu6_getShadowTransferStatus() : IfxCcu6.h
  • IfxCcu6_getSrcAddress() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_getT12CaptureCompareState() : IfxCcu6.h
  • IfxCcu6_getT12CountDirection() : IfxCcu6.h
  • IfxCcu6_getT12TimerPointer() : IfxCcu6.h
  • IfxCcu6_getT13CaptureCompareState() : IfxCcu6.h
  • IfxCcu6_getTimerAvailabilityStatus() : IfxCcu6.h
  • IfxCcu6_getTimerRunStatus() : IfxCcu6.h
  • IfxCcu6_Icu_getTimeStamp() : IfxCcu6_Icu.c , IfxCcu6_Icu.h
  • IfxCcu6_Icu_initChannel() : IfxCcu6_Icu.c , IfxCcu6_Icu.h
  • IfxCcu6_Icu_initChannelConfig() : IfxCcu6_Icu.c , IfxCcu6_Icu.h
  • IfxCcu6_Icu_initModule() : IfxCcu6_Icu.c , IfxCcu6_Icu.h
  • IfxCcu6_Icu_initModuleConfig() : IfxCcu6_Icu.c , IfxCcu6_Icu.h
  • IfxCcu6_Icu_startCapture() : IfxCcu6_Icu.c , IfxCcu6_Icu.h
  • IfxCcu6_Icu_stopCapture() : IfxCcu6_Icu.c , IfxCcu6_Icu.h
  • IfxCcu6_initCc60InPin() : IfxCcu6.h
  • IfxCcu6_initCc60InPinWithPadLevel() : IfxCcu6.h
  • IfxCcu6_initCc60OutPin() : IfxCcu6.h
  • IfxCcu6_initCc61InPin() : IfxCcu6.h
  • IfxCcu6_initCc61InPinWithPadLevel() : IfxCcu6.h
  • IfxCcu6_initCc61OutPin() : IfxCcu6.h
  • IfxCcu6_initCc62InPin() : IfxCcu6.h
  • IfxCcu6_initCc62InPinWithPadLevel() : IfxCcu6.h
  • IfxCcu6_initCc62OutPin() : IfxCcu6.h
  • IfxCcu6_initCcpos0Pin() : IfxCcu6.h
  • IfxCcu6_initCcpos0PinWithPadLevel() : IfxCcu6.h
  • IfxCcu6_initCcpos1Pin() : IfxCcu6.h
  • IfxCcu6_initCcpos1PinWithPadLevel() : IfxCcu6.h
  • IfxCcu6_initCcpos2Pin() : IfxCcu6.h
  • IfxCcu6_initCcpos2PinWithPadLevel() : IfxCcu6.h
  • IfxCcu6_initCout60Pin() : IfxCcu6.h
  • IfxCcu6_initCout61Pin() : IfxCcu6.h
  • IfxCcu6_initCout62Pin() : IfxCcu6.h
  • IfxCcu6_initCout63Pin() : IfxCcu6.h
  • IfxCcu6_initCtrapPin() : IfxCcu6.h
  • IfxCcu6_initCtrapPinWithPadLevel() : IfxCcu6.h
  • IfxCcu6_initT12hrPin() : IfxCcu6.h
  • IfxCcu6_initT12hrPinWithPadLevel() : IfxCcu6.h
  • IfxCcu6_initT13hrPin() : IfxCcu6.h
  • IfxCcu6_initT13hrPinWithPadLevel() : IfxCcu6.h
  • IfxCcu6_isModuleEnabled() : IfxCcu6.h
  • IfxCcu6_isModuleSuspended() : IfxCcu6.h
  • IfxCcu6_isT12OneNotification() : IfxCcu6.h
  • IfxCcu6_isT12PeriodNotification() : IfxCcu6.h
  • IfxCcu6_isT13CompareNotification() : IfxCcu6.h
  • IfxCcu6_PwmBc_getMotorSpeed() : IfxCcu6_PwmBc.c , IfxCcu6_PwmBc.h
  • IfxCcu6_PwmBc_initModule() : IfxCcu6_PwmBc.c , IfxCcu6_PwmBc.h
  • IfxCcu6_PwmBc_initModuleConfig() : IfxCcu6_PwmBc.c , IfxCcu6_PwmBc.h
  • IfxCcu6_PwmBc_start() : IfxCcu6_PwmBc.c , IfxCcu6_PwmBc.h
  • IfxCcu6_PwmBc_stop() : IfxCcu6_PwmBc.c , IfxCcu6_PwmBc.h
  • IfxCcu6_PwmBc_updateHallPattern() : IfxCcu6_PwmBc.c , IfxCcu6_PwmBc.h
  • IfxCcu6_PwmHl_disable() : IfxCcu6_PwmHl.c
  • IfxCcu6_PwmHl_enable() : IfxCcu6_PwmHl.c
  • IfxCcu6_PwmHl_getDeadtime() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_getMinPulse() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_getMode() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_init() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_initConfig() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_invertActiveState() : IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_setDeadtime() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_setMinPulse() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_setMode() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_setOnTime() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_setOutputPins() : IfxCcu6_PwmHl.c
  • IfxCcu6_PwmHl_setupChannels() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_stdIfPwmHlInit() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_updateCenterAligned() : IfxCcu6_PwmHl.c
  • IfxCcu6_PwmHl_updateEdgeAligned() : IfxCcu6_PwmHl.c
  • IfxCcu6_PwmHl_updateOff() : IfxCcu6_PwmHl.c
  • IfxCcu6_readTimer() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_resetModule() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_routeInterruptNode() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_setCaptureCompareInputSignal() : IfxCcu6.h
  • IfxCcu6_setCountingInputMode() : IfxCcu6.h
  • IfxCcu6_setCurrentHallPattern() : IfxCcu6.h
  • IfxCcu6_setDeadTimeValue() : IfxCcu6.h
  • IfxCcu6_setExpectedHallPattern() : IfxCcu6.h
  • IfxCcu6_setExternalRunMode() : IfxCcu6.h
  • IfxCcu6_setHallSensorTriggerMode() : IfxCcu6.h
  • IfxCcu6_setInputClockFrequency() : IfxCcu6.h
  • IfxCcu6_setInterruptStatusFlag() : IfxCcu6.h
  • IfxCcu6_setMultiChannelPwmPattern() : IfxCcu6.h
  • IfxCcu6_setMultiChannelSwitchingMode() : IfxCcu6.h
  • IfxCcu6_setMultiChannelSwitchingSync() : IfxCcu6.h
  • IfxCcu6_setOutputPassiveLevel() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_setOutputPassiveState() : IfxCcu6.h
  • IfxCcu6_setSingleShotModeEnable() : IfxCcu6.h
  • IfxCcu6_setSleepMode() : IfxCcu6.h
  • IfxCcu6_setSuspendMode() : IfxCcu6.h
  • IfxCcu6_setT12CaptureCompareState() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_setT12ChannelMode() : IfxCcu6.h
  • IfxCcu6_setT12CompareValue() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_setT12CounterValue() : IfxCcu6.h
  • IfxCcu6_setT12CountMode() : IfxCcu6.h
  • IfxCcu6_setT12Frequency() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_setT12InputSignal() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_setT12PeriodValue() : IfxCcu6.h
  • IfxCcu6_setT13CaptureCompareState() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_setT13CompareValue() : IfxCcu6.h
  • IfxCcu6_setT13CounterValue() : IfxCcu6.h
  • IfxCcu6_setT13Frequency() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_setT13InputSignal() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_setT13PeriodValue() : IfxCcu6.h
  • IfxCcu6_setT13TriggerEventDirection() : IfxCcu6.h
  • IfxCcu6_setT13TriggerEventMode() : IfxCcu6.h
  • IfxCcu6_setTrapMode() : IfxCcu6.h
  • IfxCcu6_setTrapState() : IfxCcu6.h
  • IfxCcu6_startTimer() : IfxCcu6.h
  • IfxCcu6_stopTimer() : IfxCcu6.h
  • IfxCcu6_Timer_countOneStep() : IfxCcu6_Timer.c , IfxCcu6_Timer.h
  • IfxCcu6_Timer_initModule() : IfxCcu6_Timer.c , IfxCcu6_Timer.h
  • IfxCcu6_Timer_initModuleConfig() : IfxCcu6_Timer.c , IfxCcu6_Timer.h
  • IfxCcu6_Timer_start() : IfxCcu6_Timer.c , IfxCcu6_Timer.h
  • IfxCcu6_Timer_startSingleShotMode() : IfxCcu6_Timer.c , IfxCcu6_Timer.h
  • IfxCcu6_Timer_stop() : IfxCcu6_Timer.c , IfxCcu6_Timer.h
  • IfxCcu6_Timer_synchronousStart() : IfxCcu6_Timer.c , IfxCcu6_Timer.h
  • IfxCcu6_Timer_synchronousStop() : IfxCcu6_Timer.c , IfxCcu6_Timer.h
  • IfxCcu6_TimerWithTrigger_acknowledgeTimerIrq() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_acknowledgeTriggerIrq() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_applyUpdate() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_disableUpdate() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_getFrequency() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_getInputFrequency() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_getPeriod() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_getPointer() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_getResolution() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_init() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_initConfig() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_run() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_setFrequency() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_setPeriod() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_setSingleMode() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_setTrigger() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_stdIfTimerInit() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_stop() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_updateInputFrequency() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TPwm_initModule() : IfxCcu6_TPwm.c , IfxCcu6_TPwm.h
  • IfxCcu6_TPwm_initModuleConfig() : IfxCcu6_TPwm.c , IfxCcu6_TPwm.h
  • IfxCcu6_TPwm_pause() : IfxCcu6_TPwm.c , IfxCcu6_TPwm.h
  • IfxCcu6_TPwm_resume() : IfxCcu6_TPwm.c , IfxCcu6_TPwm.h
  • IfxCcu6_TPwm_start() : IfxCcu6_TPwm.c , IfxCcu6_TPwm.h
  • IfxCcu6_TPwm_stop() : IfxCcu6_TPwm.c , IfxCcu6_TPwm.h
  • IfxCcu6_updateHallPattern() : IfxCcu6.h
  • IfxConvctrl_clearAlarmFlag() : IfxConvctrl.h
  • IfxConvctrl_enableConfigurationAccess() : IfxConvctrl.h
  • IfxConvctrl_enableModule() : IfxConvctrl.h
  • IfxConvctrl_initializeModule() : IfxConvctrl.h
  • IfxConvctrl_injectCounterFault() : IfxConvctrl.h
  • IfxConvctrl_injectPhaseSyncDividerFault() : IfxConvctrl.h
  • IfxConvctrl_isErrorDetected() : IfxConvctrl.h
  • IfxConvctrl_isModuleSuspended() : IfxConvctrl.h
  • IfxConvctrl_lockConfigurationAccess() : IfxConvctrl.h
  • IfxConvctrl_resetModule() : IfxConvctrl.c , IfxConvctrl.h
  • IfxConvctrl_setDividerValue() : IfxConvctrl.h
  • IfxConvctrl_setSuspendMode() : IfxConvctrl.h
  • IfxCpu_acquireMutex() : IfxCpu.c , IfxCpu.h
  • IfxCpu_areInterruptsEnabled() : IfxCpu.h
  • IfxCpu_calculateCrc32() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • IfxCpu_disableInterrupts() : IfxCpu.h
  • IfxCpu_disableInterruptsAllExceptMaster() : IfxCpu.c , IfxCpu.h
  • IfxCpu_disableOverlayBlock() : IfxCpu.c , IfxCpu.h
  • IfxCpu_emitEvent() : IfxCpu.c , IfxCpu.h
  • IfxCpu_enableInterrupts() : IfxCpu.h
  • IfxCpu_enableOverlayBlock() : IfxCpu.c , IfxCpu.h
  • IfxCpu_enableSegmentSpecificDataAccessCacheability() : IfxCpu.h
  • IfxCpu_enableSegmentSpecificInstructionAccessCacheability() : IfxCpu.h
  • IfxCpu_forceDisableInterrupts() : IfxCpu.h
  • IfxCpu_getAddress() : IfxCpu.h
  • IfxCpu_getClockCounter() : IfxCpu.h
  • IfxCpu_getClockCounterStickyOverflow() : IfxCpu.h
  • IfxCpu_getCoreId() : IfxCpu.h
  • IfxCpu_getCoreIndex() : IfxCpu.h
  • IfxCpu_getCoreMode() : IfxCpu.c , IfxCpu.h
  • IfxCpu_getCpuResetStatus() : IfxCpu.c , IfxCpu.h
  • IfxCpu_getIndex() : IfxCpu.c , IfxCpu.h
  • IfxCpu_getInstructionCounter() : IfxCpu.h
  • IfxCpu_getInstructionCounterStickyOverflow() : IfxCpu.h
  • IfxCpu_getPerformanceCounter() : IfxCpu.h
  • IfxCpu_getPerformanceCounterStickyOverflow() : IfxCpu.h
  • IfxCpu_getRandomVal() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • IfxCpu_getRandomValue() : IfxCpu.c , IfxCpu.h
  • IfxCpu_getRandomValueWithinRange() : IfxCpu.c , IfxCpu.h
  • IfxCpu_initCSA() : IfxCpu.h
  • IfxCpu_invalidateProgramCache() : IfxCpu.h
  • IfxCpu_Irq_getTos() : IfxCpu_Irq.c , IfxCpu_Irq.h
  • IfxCpu_isAddressCachable() : IfxCpu.h
  • IfxCpu_releaseMutex() : IfxCpu.c , IfxCpu.h
  • IfxCpu_resetAndStartCounters() : IfxCpu.h
  • IfxCpu_resetSpinLock() : IfxCpu.c , IfxCpu.h
  • IfxCpu_restoreInterrupts() : IfxCpu.h
  • IfxCpu_setAllIdleExceptMasterCpu() : IfxCpu.c , IfxCpu.h
  • IfxCpu_setCoreMode() : IfxCpu.c , IfxCpu.h
  • IfxCpu_setDataCache() : IfxCpu.h
  • IfxCpu_setPerformanceCountersEnableBit() : IfxCpu.h
  • IfxCpu_setProgramCache() : IfxCpu.h
  • IfxCpu_setProgramCounter() : IfxCpu.c , IfxCpu.h
  • IfxCpu_setSafetyTaskIdentifier() : IfxCpu.h
  • IfxCpu_setSpinLock() : IfxCpu.c , IfxCpu.h
  • IfxCpu_startCore() : IfxCpu.c , IfxCpu.h
  • IfxCpu_stopCounters() : IfxCpu.h
  • IfxCpu_Trap_assertion() : IfxCpu_Trap.c
  • IfxCpu_Trap_busError() : IfxCpu_Trap.c
  • IfxCpu_Trap_contextManagementError() : IfxCpu_Trap.c
  • IfxCpu_Trap_extractTrapInfo() : IfxCpu_Trap.c
  • IfxCpu_Trap_instructionError() : IfxCpu_Trap.c
  • IfxCpu_Trap_internalProtectionError() : IfxCpu_Trap.c
  • IfxCpu_Trap_memoryManagementError() : IfxCpu_Trap.c
  • IfxCpu_Trap_nonMaskableInterrupt() : IfxCpu_Trap.c
  • IfxCpu_Trap_systemCall_Cpu0() : IfxCpu_Trap.c
  • IfxCpu_Trap_vectorTable0() : IfxCpu_Trap.c
  • IfxCpu_triggerCpuReset() : IfxCpu.c , IfxCpu.h
  • IfxCpu_triggerSwReset() : IfxCpu.h
  • IfxCpu_updateClockCounter() : IfxCpu.h
  • IfxCpu_updateInstructionCounter() : IfxCpu.h
  • IfxCpu_updatePerformanceCounter() : IfxCpu.h
  • IfxCpu_waitEvent() : IfxCpu.c , IfxCpu.h
  • IfxDma_clearChannelHalt() : IfxDma.h
  • IfxDma_clearChannelInterrupt() : IfxDma.h
  • IfxDma_clearChannelTransactionRequestLost() : IfxDma.h
  • IfxDma_clearErrorFlags() : IfxDma.h
  • IfxDma_disableChannelInterrupt() : IfxDma.h
  • IfxDma_disableChannelTransaction() : IfxDma.h
  • IfxDma_disableChannelTransactionLostError() : IfxDma.h
  • IfxDma_disableMoveEngineDestinationError() : IfxDma.h
  • IfxDma_disableMoveEngineSourceError() : IfxDma.h
  • IfxDma_Dma_clearChannelInterrupt() : IfxDma_Dma.h
  • IfxDma_Dma_configureTransactionSet() : IfxDma_Dma.c
  • IfxDma_Dma_createModuleHandle() : IfxDma_Dma.c , IfxDma_Dma.h
  • IfxDma_Dma_deInitChannel() : IfxDma_Dma.c , IfxDma_Dma.h
  • IfxDma_Dma_getAndClearChannelInterrupt() : IfxDma_Dma.h
  • IfxDma_Dma_getChannelInterrupt() : IfxDma_Dma.h
  • IfxDma_Dma_getSrcPointer() : IfxDma_Dma.h
  • IfxDma_Dma_initChannel() : IfxDma_Dma.c , IfxDma_Dma.h
  • IfxDma_Dma_initChannelConfig() : IfxDma_Dma.c , IfxDma_Dma.h
  • IfxDma_Dma_initLinkedListEntry() : IfxDma_Dma.c , IfxDma_Dma.h
  • IfxDma_Dma_initModule() : IfxDma_Dma.c , IfxDma_Dma.h
  • IfxDma_Dma_initModuleConfig() : IfxDma_Dma.c , IfxDma_Dma.h
  • IfxDma_Dma_isChannelTransactionPending() : IfxDma_Dma.h
  • IfxDma_Dma_setChannelDestinationAddress() : IfxDma_Dma.h
  • IfxDma_Dma_setChannelSourceAddress() : IfxDma_Dma.h
  • IfxDma_Dma_setChannelTransferCount() : IfxDma_Dma.h
  • IfxDma_Dma_startChannelTransaction() : IfxDma_Dma.h
  • IfxDma_enableChannelInterrupt() : IfxDma.h
  • IfxDma_enableChannelTransaction() : IfxDma.h
  • IfxDma_enableChannelTransactionLostError() : IfxDma.h
  • IfxDma_enableDestinationCircularBuffer() : IfxDma.h
  • IfxDma_enableMoveEngineDestinationError() : IfxDma.h
  • IfxDma_enableMoveEngineSourceError() : IfxDma.h
  • IfxDma_enableSourceCircularBuffer() : IfxDma.h
  • IfxDma_enableSwapDataByte() : IfxDma.h
  • IfxDma_getAndClearChannelInterrupt() : IfxDma.h
  • IfxDma_getAndClearChannelPatternDetectionInterrupt() : IfxDma.h
  • IfxDma_getAndClearChannelWrapDestinationBufferInterrupt() : IfxDma.h
  • IfxDma_getAndClearChannelWrapSourceBufferInterrupt() : IfxDma.h
  • IfxDma_getChannelDestinationAddress() : IfxDma.h
  • IfxDma_getChannelHalt() : IfxDma.h
  • IfxDma_getChannelInterrupt() : IfxDma.h
  • IfxDma_getChannelPatternDetectionOldValue() : IfxDma.h
  • IfxDma_getChannelSourceAddress() : IfxDma.h
  • IfxDma_getChannelSuspendModeStatus() : IfxDma.h
  • IfxDma_getChannelTransactionRequestLost() : IfxDma.h
  • IfxDma_getChannelTransferCount() : IfxDma.h
  • IfxDma_getCircularRangeCode() : IfxDma.h
  • IfxDma_getDataCRC() : IfxDma.h
  • IfxDma_getDoubleBufferRead() : IfxDma.h
  • IfxDma_getDoubleBufferSelection() : IfxDma.h
  • IfxDma_getErrorFlags() : IfxDma.h
  • IfxDma_getErrPointer() : IfxDma.h
  • IfxDma_getSourceAndDestinationCRC() : IfxDma.h
  • IfxDma_getSrcPointer() : IfxDma.h
  • IfxDma_getTimestamp() : IfxDma.h
  • IfxDma_isChannelReset() : IfxDma.h
  • IfxDma_isChannelTransactionEnabled() : IfxDma.h
  • IfxDma_isChannelTransactionPending() : IfxDma.h
  • IfxDma_keepDoubleBufferActive() : IfxDma.h
  • IfxDma_resetChannel() : IfxDma.h
  • IfxDma_setChannelBlockMode() : IfxDma.h
  • IfxDma_setChannelContinuousMode() : IfxDma.h
  • IfxDma_setChannelDestinationAddress() : IfxDma.h
  • IfxDma_setChannelDestinationIncrementStep() : IfxDma.h
  • IfxDma_setChannelHalt() : IfxDma.h
  • IfxDma_setChannelHardwareResourcePartition() : IfxDma.h
  • IfxDma_setChannelInterruptServiceRequest() : IfxDma.h
  • IfxDma_setChannelMoveSize() : IfxDma.h
  • IfxDma_setChannelShadow() : IfxDma.h
  • IfxDma_setChannelSingleMode() : IfxDma.h
  • IfxDma_setChannelSingleTransaction() : IfxDma.h
  • IfxDma_setChannelSingleTransfer() : IfxDma.h
  • IfxDma_setChannelSourceAddress() : IfxDma.h
  • IfxDma_setChannelSourceIncrementStep() : IfxDma.h
  • IfxDma_setChannelSuspendEnable() : IfxDma.h
  • IfxDma_setChannelTransferCount() : IfxDma.h
  • IfxDma_setCircularBufferDestinationLength() : IfxDma.h
  • IfxDma_setCircularBufferSourceLength() : IfxDma.h
  • IfxDma_setInterruptControlValue() : IfxDma.h
  • IfxDma_setSleepMode() : IfxDma.h
  • IfxDma_startChannelTransaction() : IfxDma.h
  • IfxDma_switchDoubleBuffer() : IfxDma.h
  • IfxDma_writeChannelShadowDisable() : IfxDma.h
  • IfxDma_writeChannelShadowEnable() : IfxDma.h
  • IfxDts_Dts_convertFromCelsius() : IfxDts_Dts.c , IfxDts_Dts.h
  • IfxDts_Dts_convertToCelsius() : IfxDts_Dts.c , IfxDts_Dts.h
  • IfxDts_Dts_getTemperatureCelsius() : IfxDts_Dts.h
  • IfxDts_Dts_getTemperatureValue() : IfxDts_Dts.h
  • IfxDts_Dts_initModule() : IfxDts_Dts.c , IfxDts_Dts.h
  • IfxDts_Dts_initModuleConfig() : IfxDts_Dts.c , IfxDts_Dts.h
  • IfxDts_getSrcPointer() : IfxDts.h
  • IfxDts_getTemperatureValue() : IfxDts.h
  • IfxEdsadc_configureModulator() : IfxEdsadc.c , IfxEdsadc.h
  • IfxEdsadc_disableModule() : IfxEdsadc.c , IfxEdsadc.h
  • IfxEdsadc_Edsadc_calcDIVCG() : IfxEdsadc_Edsadc.c
  • IfxEdsadc_Edsadc_calcDIVM() : IfxEdsadc_Edsadc.c
  • IfxEdsadc_Edsadc_getAuxSrc() : IfxEdsadc_Edsadc.h
  • IfxEdsadc_Edsadc_getMainResult() : IfxEdsadc_Edsadc.h
  • IfxEdsadc_Edsadc_getMainSrc() : IfxEdsadc_Edsadc.h
  • IfxEdsadc_Edsadc_getSubsequentResult() : IfxEdsadc_Edsadc.h
  • IfxEdsadc_Edsadc_initCarrierGen() : IfxEdsadc_Edsadc.c , IfxEdsadc_Edsadc.h
  • IfxEdsadc_Edsadc_initCarrierGenConfig() : IfxEdsadc_Edsadc.c , IfxEdsadc_Edsadc.h
  • IfxEdsadc_Edsadc_initChannel() : IfxEdsadc_Edsadc.c , IfxEdsadc_Edsadc.h
  • IfxEdsadc_Edsadc_initChannelConfig() : IfxEdsadc_Edsadc.c , IfxEdsadc_Edsadc.h
  • IfxEdsadc_Edsadc_initCombFilter() : IfxEdsadc_Edsadc.c , IfxEdsadc_Edsadc.h
  • IfxEdsadc_Edsadc_initCommonModeVoltage() : IfxEdsadc_Edsadc.h
  • IfxEdsadc_Edsadc_initDemodulator() : IfxEdsadc_Edsadc.c , IfxEdsadc_Edsadc.h
  • IfxEdsadc_Edsadc_initFirFilter() : IfxEdsadc_Edsadc.c , IfxEdsadc_Edsadc.h
  • IfxEdsadc_Edsadc_initIntegrator() : IfxEdsadc_Edsadc.c , IfxEdsadc_Edsadc.h
  • IfxEdsadc_Edsadc_initModulator() : IfxEdsadc_Edsadc.c , IfxEdsadc_Edsadc.h
  • IfxEdsadc_Edsadc_initModule() : IfxEdsadc_Edsadc.c , IfxEdsadc_Edsadc.h
  • IfxEdsadc_Edsadc_initModuleConfig() : IfxEdsadc_Edsadc.c , IfxEdsadc_Edsadc.h
  • IfxEdsadc_Edsadc_initRectifier() : IfxEdsadc_Edsadc.c , IfxEdsadc_Edsadc.h
  • IfxEdsadc_Edsadc_initTimeStampCounter() : IfxEdsadc_Edsadc.h
  • IfxEdsadc_Edsadc_setGainCorrectionFactor() : IfxEdsadc_Edsadc.h
  • IfxEdsadc_Edsadc_startScan() : IfxEdsadc_Edsadc.h
  • IfxEdsadc_Edsadc_stopScan() : IfxEdsadc_Edsadc.h
  • IfxEdsadc_enableModule() : IfxEdsadc.c , IfxEdsadc.h
  • IfxEdsadc_getAuxSrc() : IfxEdsadc.c , IfxEdsadc.h
  • IfxEdsadc_getIntegratorOutFreq() : IfxEdsadc.c , IfxEdsadc.h
  • IfxEdsadc_getMainCombDecimation() : IfxEdsadc.h
  • IfxEdsadc_getMainCombOutFreq() : IfxEdsadc.c , IfxEdsadc.h
  • IfxEdsadc_getMainGroupDelay() : IfxEdsadc.c , IfxEdsadc.h
  • IfxEdsadc_getMainResult() : IfxEdsadc.h
  • IfxEdsadc_getMainSrc() : IfxEdsadc.c , IfxEdsadc.h
  • IfxEdsadc_getModulatorClockFreq() : IfxEdsadc.c , IfxEdsadc.h
  • IfxEdsadc_getModulatorInputClockFreq() : IfxEdsadc.c , IfxEdsadc.h
  • IfxEdsadc_getNegativeInputLineConfiguration() : IfxEdsadc.h
  • IfxEdsadc_getPositiveInputLineConfiguration() : IfxEdsadc.h
  • IfxEdsadc_getResultRegisterAddress() : IfxEdsadc.h
  • IfxEdsadc_getSubsequentResult() : IfxEdsadc.h
  • IfxEdsadc_initCgPwmPin() : IfxEdsadc.h
  • IfxEdsadc_initCinPin() : IfxEdsadc.h
  • IfxEdsadc_initCoutPin() : IfxEdsadc.h
  • IfxEdsadc_initDinPin() : IfxEdsadc.h
  • IfxEdsadc_initDsnPin() : IfxEdsadc.h
  • IfxEdsadc_initDspPin() : IfxEdsadc.h
  • IfxEdsadc_initItrPin() : IfxEdsadc.h
  • IfxEdsadc_initSgPin() : IfxEdsadc.h
  • IfxEdsadc_isModuleEnabled() : IfxEdsadc.h
  • IfxEdsadc_isModuleSuspended() : IfxEdsadc.h
  • IfxEdsadc_resetModule() : IfxEdsadc.c , IfxEdsadc.h
  • IfxEdsadc_setCarrierMode() : IfxEdsadc.h
  • IfxEdsadc_setCommonModeVoltage() : IfxEdsadc.c , IfxEdsadc.h
  • IfxEdsadc_setGainCalibration() : IfxEdsadc.c , IfxEdsadc.h
  • IfxEdsadc_setGainControl() : IfxEdsadc.c , IfxEdsadc.h
  • IfxEdsadc_setGainCorrectionFactor() : IfxEdsadc.c , IfxEdsadc.h
  • IfxEdsadc_setOffsetCompensationValue() : IfxEdsadc.h
  • IfxEdsadc_setSleepMode() : IfxEdsadc.h
  • IfxEdsadc_setSuspendMode() : IfxEdsadc.h
  • IfxEdsadc_setTimeStampCounter() : IfxEdsadc.c , IfxEdsadc.h
  • IfxEdsadc_startScan() : IfxEdsadc.h
  • IfxEdsadc_stopScan() : IfxEdsadc.h
  • IfxEray_calcHeaderCrc() : IfxEray.c , IfxEray.h
  • IfxEray_changePocState() : IfxEray.c , IfxEray.h
  • IfxEray_clearAllFlags() : IfxEray.c , IfxEray.h
  • IfxEray_clearErrorFlag() : IfxEray.h
  • IfxEray_clearStatusFlag() : IfxEray.h
  • IfxEray_configureSuc1Register() : IfxEray.h
  • IfxEray_disableModule() : IfxEray.h
  • IfxEray_enableAllErrorInterrupts() : IfxEray.h
  • IfxEray_enableExternalLoopback() : IfxEray.h
  • IfxEray_enableInterruptLine() : IfxEray.h
  • IfxEray_enableInterruptLines() : IfxEray.c , IfxEray.h
  • IfxEray_enableModule() : IfxEray.h
  • IfxEray_enableTransmitInterrupt() : IfxEray.h
  • IfxEray_enableWriteTestRegister() : IfxEray.h
  • IfxEray_Eray_allowColdStart() : IfxEray_Eray.h
  • IfxEray_Eray_bufferReconfig() : IfxEray_Eray.h
  • IfxEray_Eray_changePocState() : IfxEray_Eray.h
  • IfxEray_Eray_clearErrorFlag() : IfxEray_Eray.h
  • IfxEray_Eray_clearStatusFlag() : IfxEray_Eray.h
  • IfxEray_Eray_deInitModule() : IfxEray_Eray.h
  • IfxEray_Eray_getErrorInterrupts() : IfxEray_Eray.h
  • IfxEray_Eray_getMessageBufferInterruptStatus() : IfxEray_Eray.h
  • IfxEray_Eray_getNewDataInterruptStatus() : IfxEray_Eray.h
  • IfxEray_Eray_getPocState() : IfxEray_Eray.h
  • IfxEray_Eray_getStatusInterrupts() : IfxEray_Eray.h
  • IfxEray_Eray_getWakeupPatternReceivedChannel() : IfxEray_Eray.h
  • IfxEray_Eray_initModule() : IfxEray_Eray.c , IfxEray_Eray.h
  • IfxEray_Eray_initModuleConfig() : IfxEray_Eray.c , IfxEray_Eray.h
  • IfxEray_Eray_Node_init() : IfxEray_Eray.c , IfxEray_Eray.h
  • IfxEray_Eray_Node_initCommunicationController() : IfxEray_Eray.c
  • IfxEray_Eray_Node_initConfig() : IfxEray_Eray.c , IfxEray_Eray.h
  • IfxEray_Eray_Node_initGTU() : IfxEray_Eray.c
  • IfxEray_Eray_Node_initMessageRAM() : IfxEray_Eray.c
  • IfxEray_Eray_readData() : IfxEray_Eray.h
  • IfxEray_Eray_readFrame() : IfxEray_Eray.h
  • IfxEray_Eray_receiveFifoFrame() : IfxEray_Eray.c , IfxEray_Eray.h
  • IfxEray_Eray_receiveFrame() : IfxEray_Eray.c , IfxEray_Eray.h
  • IfxEray_Eray_setMessageBufferInterruptDestination() : IfxEray_Eray.h
  • IfxEray_Eray_setNewDataInterruptDestination() : IfxEray_Eray.h
  • IfxEray_Eray_setPocAllSlots() : IfxEray_Eray.h
  • IfxEray_Eray_startCommunication() : IfxEray_Eray.h
  • IfxEray_Eray_transmitFrame() : IfxEray_Eray.c , IfxEray_Eray.h
  • IfxEray_Eray_wakeUpChannel() : IfxEray_Eray.h
  • IfxEray_Eray_wakeUpCluster() : IfxEray_Eray.h
  • IfxEray_Eray_writeData() : IfxEray_Eray.h
  • IfxEray_getAddress() : IfxEray.c , IfxEray.h
  • IfxEray_getErrorInterrupts() : IfxEray.h
  • IfxEray_getFifoIndex() : IfxEray.h
  • IfxEray_getFifoStatus() : IfxEray.h
  • IfxEray_getIndex() : IfxEray.c , IfxEray.h
  • IfxEray_getInputBufferBusyHostStatus() : IfxEray.h
  • IfxEray_getInputBufferBusyShadowStatus() : IfxEray.h
  • IfxEray_getInputBufferBusySrcPtr() : IfxEray.h
  • IfxEray_getInterruptLine0SrcPtr() : IfxEray.h
  • IfxEray_getInterruptLine1SrcPtr() : IfxEray.h
  • IfxEray_getMessageBufferInterruptStatus() : IfxEray.h
  • IfxEray_getMessageBufferStatus0SrcPtr() : IfxEray.h
  • IfxEray_getMessageBufferStatus1SrcPtr() : IfxEray.h
  • IfxEray_getNewDataInterrupt0SrcPtr() : IfxEray.h
  • IfxEray_getNewDataInterrupt1SrcPtr() : IfxEray.h
  • IfxEray_getNewDataInterruptStatus() : IfxEray.h
  • IfxEray_getOutputBuffer() : IfxEray.h
  • IfxEray_getOutputBufferBusyShadowStatus() : IfxEray.h
  • IfxEray_getOutputBufferBusySrcPtr() : IfxEray.h
  • IfxEray_getPocState() : IfxEray.h
  • IfxEray_getStatusInterrupts() : IfxEray.h
  • IfxEray_getTimerInterrupt0SrcPtr() : IfxEray.h
  • IfxEray_getTimerInterrupt1SrcPtr() : IfxEray.h
  • IfxEray_getWakeupPatternReceivedChannel() : IfxEray.h
  • IfxEray_initRxPin() : IfxEray.h
  • IfxEray_initRxPinWithPadLevel() : IfxEray.h
  • IfxEray_initTxEnPin() : IfxEray.h
  • IfxEray_initTxPin() : IfxEray.h
  • IfxEray_isModuleSuspended() : IfxEray.h
  • IfxEray_isPocBusy() : IfxEray.h
  • IfxEray_isRamsCleared() : IfxEray.h
  • IfxEray_readData() : IfxEray.c , IfxEray.h
  • IfxEray_readFrame() : IfxEray.c , IfxEray.h
  • IfxEray_receiveData() : IfxEray.h
  • IfxEray_receiveHeader() : IfxEray.h
  • IfxEray_resetModule() : IfxEray.c , IfxEray.h
  • IfxEray_selectRecieveInput() : IfxEray.h
  • IfxEray_sendData() : IfxEray.h
  • IfxEray_sendHeader() : IfxEray.h
  • IfxEray_setActiveCyclePairs() : IfxEray.h
  • IfxEray_setAutoDelayBuffers() : IfxEray.h
  • IfxEray_setBaudrate() : IfxEray.h
  • IfxEray_setBufferReconfigSecure() : IfxEray.h
  • IfxEray_setChannelAInitialOffsets() : IfxEray.h
  • IfxEray_setChannelBInitialOffsets() : IfxEray.h
  • IfxEray_setChannelsReceiveDelay() : IfxEray.h
  • IfxEray_setClockCorrectionCycles() : IfxEray.h
  • IfxEray_setClockSynchErrorHalt() : IfxEray.h
  • IfxEray_setClusterDriftValues() : IfxEray.h
  • IfxEray_setClusterStartupDeviation() : IfxEray.h
  • IfxEray_setCollisionAvoidanceDuration() : IfxEray.h
  • IfxEray_setCycleDurationMacroticks() : IfxEray.h
  • IfxEray_setCycleDurationMicroticks() : IfxEray.h
  • IfxEray_setDecodingCorrectionValue() : IfxEray.h
  • IfxEray_setDynamicSlots() : IfxEray.h
  • IfxEray_setExternalCorrectionControl() : IfxEray.h
  • IfxEray_setExternalCorrectionValues() : IfxEray.h
  • IfxEray_setFifoBufferStartIndex() : IfxEray.h
  • IfxEray_setFifoFilterConfigurations() : IfxEray.h
  • IfxEray_setFifoMessageBufferConfigurations() : IfxEray.h
  • IfxEray_setFirstDynamicBuffer() : IfxEray.h
  • IfxEray_setListenTimeOuts() : IfxEray.h
  • IfxEray_setMacroTickValue() : IfxEray.h
  • IfxEray_setMaxColdStartAttempts() : IfxEray.h
  • IfxEray_setMaxCorrectionValues() : IfxEray.h
  • IfxEray_setMaxSynchFrames() : IfxEray.h
  • IfxEray_setMessageBufferCount() : IfxEray.h
  • IfxEray_setMessageBufferInterruptDestination() : IfxEray.c , IfxEray.h
  • IfxEray_setMessageHandlerConfigurations() : IfxEray.h
  • IfxEray_setNetworkStartIdleTime() : IfxEray.h
  • IfxEray_setNetworkVectorLength() : IfxEray.h
  • IfxEray_setNewDataInterruptDestination() : IfxEray.c , IfxEray.h
  • IfxEray_setNodeChannels() : IfxEray.h
  • IfxEray_setOffsetCorrection() : IfxEray.h
  • IfxEray_setPocCommand() : IfxEray.h
  • IfxEray_setPocReady() : IfxEray.c , IfxEray.h
  • IfxEray_setReceiveRequest() : IfxEray.h
  • IfxEray_setReceiveWakeupTimes() : IfxEray.h
  • IfxEray_setRxBufferNumber() : IfxEray.h
  • IfxEray_setSleepMode() : IfxEray.h
  • IfxEray_setSlot() : IfxEray.c , IfxEray.h
  • IfxEray_setSlotActionPoints() : IfxEray.h
  • IfxEray_setStaticSlots() : IfxEray.h
  • IfxEray_setStrobePosition() : IfxEray.h
  • IfxEray_setSuspendMode() : IfxEray.h
  • IfxEray_setSymbolChannels() : IfxEray.h
  • IfxEray_setTransmissionSlotMode() : IfxEray.h
  • IfxEray_setTransmissionStartTime() : IfxEray.h
  • IfxEray_setTransmitRequest() : IfxEray.h
  • IfxEray_setTransmittedFrames() : IfxEray.h
  • IfxEray_setTransmitWakeupTimes() : IfxEray.h
  • IfxEray_setTxBufferNumber() : IfxEray.h
  • IfxEray_setViewData() : IfxEray.h
  • IfxEray_setWakeupPatternChannel() : IfxEray.h
  • IfxEray_unlockConfigurationKey() : IfxEray.h
  • IfxEray_unlockTestModeKey() : IfxEray.h
  • IfxEray_waitForPocState() : IfxEray.h
  • IfxEray_writeData() : IfxEray.c , IfxEray.h
  • IfxEvadc_Adc_addToQueue() : IfxEvadc_Adc.h
  • IfxEvadc_Adc_clearQueue() : IfxEvadc_Adc.h
  • IfxEvadc_Adc_configureWaitForReadMode() : IfxEvadc_Adc.h
  • IfxEvadc_Adc_configureWaitForReadModeForGlobalResultRegister() : IfxEvadc_Adc.h
  • IfxEvadc_Adc_deInitGroup() : IfxEvadc_Adc.c , IfxEvadc_Adc.h
  • IfxEvadc_Adc_deInitModule() : IfxEvadc_Adc.h
  • IfxEvadc_Adc_getChannelConfig() : IfxEvadc_Adc.c , IfxEvadc_Adc.h
  • IfxEvadc_Adc_getEvadcFromGroup() : IfxEvadc_Adc.h
  • IfxEvadc_Adc_getGlobalResult() : IfxEvadc_Adc.h
  • IfxEvadc_Adc_getGroupConfig() : IfxEvadc_Adc.c , IfxEvadc_Adc.h
  • IfxEvadc_Adc_getGroupRegsFromGroup() : IfxEvadc_Adc.h
  • IfxEvadc_Adc_getGroupResult() : IfxEvadc_Adc.h
  • IfxEvadc_Adc_getMasterId() : IfxEvadc_Adc.c
  • IfxEvadc_Adc_getMasterKernelIndex() : IfxEvadc_Adc.c
  • IfxEvadc_Adc_getModuleConfig() : IfxEvadc_Adc.h
  • IfxEvadc_Adc_getQueueStatus() : IfxEvadc_Adc.h
  • IfxEvadc_Adc_getResult() : IfxEvadc_Adc.h
  • IfxEvadc_Adc_getResultBasedOnRequestSource() : IfxEvadc_Adc.h
  • IfxEvadc_Adc_initChannel() : IfxEvadc_Adc.c , IfxEvadc_Adc.h
  • IfxEvadc_Adc_initChannelConfig() : IfxEvadc_Adc.c , IfxEvadc_Adc.h
  • IfxEvadc_Adc_initExternalMultiplexerMode() : IfxEvadc_Adc.c , IfxEvadc_Adc.h
  • IfxEvadc_Adc_initExternalMultiplexerModeConfig() : IfxEvadc_Adc.c , IfxEvadc_Adc.h
  • IfxEvadc_Adc_initFastCompareChannel() : IfxEvadc_Adc.c , IfxEvadc_Adc.h
  • IfxEvadc_Adc_initFastCompareChannelConfig() : IfxEvadc_Adc.c , IfxEvadc_Adc.h
  • IfxEvadc_Adc_initGroup() : IfxEvadc_Adc.c , IfxEvadc_Adc.h
  • IfxEvadc_Adc_initGroupConfig() : IfxEvadc_Adc.c , IfxEvadc_Adc.h
  • IfxEvadc_Adc_initModule() : IfxEvadc_Adc.c , IfxEvadc_Adc.h
  • IfxEvadc_Adc_initModuleConfig() : IfxEvadc_Adc.c , IfxEvadc_Adc.h
  • IfxEvadc_Adc_setAnalogConvertControl() : IfxEvadc_Adc.c , IfxEvadc_Adc.h
  • IfxEvadc_Adc_setGlobalConfigurations() : IfxEvadc_Adc.c , IfxEvadc_Adc.h
  • IfxEvadc_Adc_startQueue() : IfxEvadc_Adc.h
  • IfxEvadc_addToQueue() : IfxEvadc.c , IfxEvadc.h
  • IfxEvadc_calculateSampleTime() : IfxEvadc.h
  • IfxEvadc_clearAllResultRequests() : IfxEvadc.h
  • IfxEvadc_clearChannelRequest() : IfxEvadc.h
  • IfxEvadc_clearQueue() : IfxEvadc.h
  • IfxEvadc_configExternalMultiplexerMode() : IfxEvadc.c , IfxEvadc.h
  • IfxEvadc_configureIclass() : IfxEvadc.h
  • IfxEvadc_configureWaitForReadMode() : IfxEvadc.h
  • IfxEvadc_configureWaitForReadModeForGlobalResultRegister() : IfxEvadc.h
  • IfxEvadc_disableAccess() : IfxEvadc.c , IfxEvadc.h
  • IfxEvadc_disableFastCompareBoundaryFlag() : IfxEvadc.h
  • IfxEvadc_disableInputBuffer() : IfxEvadc.h
  • IfxEvadc_disableModule() : IfxEvadc.h
  • IfxEvadc_disablePostCalibration() : IfxEvadc.h
  • IfxEvadc_disableQueueSlotExternalTrigger() : IfxEvadc.c , IfxEvadc.h
  • IfxEvadc_disableReferencePrecharge() : IfxEvadc.h
  • IfxEvadc_disableServiceRequest() : IfxEvadc.h
  • IfxEvadc_enableAccess() : IfxEvadc.c , IfxEvadc.h
  • IfxEvadc_enableFastCompareBoundaryFlag() : IfxEvadc.h
  • IfxEvadc_enableFastCompareSampleSynchronization() : IfxEvadc.h
  • IfxEvadc_enableFifoMode() : IfxEvadc.h
  • IfxEvadc_enableInputBuffer() : IfxEvadc.h
  • IfxEvadc_enableModule() : IfxEvadc.h
  • IfxEvadc_enableQueueSlotExternalTrigger() : IfxEvadc.c , IfxEvadc.h
  • IfxEvadc_enableReferencePrecharge() : IfxEvadc.h
  • IfxEvadc_enableServiceRequest() : IfxEvadc.h
  • IfxEvadc_enableStartupCalibration() : IfxEvadc.h
  • IfxEvadc_getAdcAnalogFrequency() : IfxEvadc.h
  • IfxEvadc_getAdcCalibrationActiveState() : IfxEvadc.h
  • IfxEvadc_getAdcDigitalFrequency() : IfxEvadc.c , IfxEvadc.h
  • IfxEvadc_getAdcModuleFrequency() : IfxEvadc.c , IfxEvadc.h
  • IfxEvadc_getAnalogFunctionConfiguration() : IfxEvadc.h
  • IfxEvadc_getChannelControlConfig() : IfxEvadc.h
  • IfxEvadc_getChannelInputclass() : IfxEvadc.h
  • IfxEvadc_getChannelResultServiceRequestNodePointer0() : IfxEvadc.h
  • IfxEvadc_getChannelResultServiceRequestNodePointer1() : IfxEvadc.h
  • IfxEvadc_getChannelServiceRequestNodePointer0() : IfxEvadc.h
  • IfxEvadc_getChannelServiceRequestNodePointer1() : IfxEvadc.h
  • IfxEvadc_getEmuxGlobalConversionMode() : IfxEvadc.h
  • IfxEvadc_getEmuxGlobalSampleTime() : IfxEvadc.h
  • IfxEvadc_getEmuxGroupConversionMode() : IfxEvadc.h
  • IfxEvadc_getEmuxGroupSampleTime() : IfxEvadc.h
  • IfxEvadc_getFastCompareBoundaryFlagStatus() : IfxEvadc.h
  • IfxEvadc_getFastCompareExternalTriggerLevelStatus() : IfxEvadc.h
  • IfxEvadc_getFastCompareResultStatus() : IfxEvadc.h
  • IfxEvadc_getGlobalConfigValue() : IfxEvadc.h
  • IfxEvadc_getGlobalConversionMode() : IfxEvadc.h
  • IfxEvadc_getGlobalResult() : IfxEvadc.h
  • IfxEvadc_getGlobalSampleTime() : IfxEvadc.h
  • IfxEvadc_getGroupConversionMode() : IfxEvadc.h
  • IfxEvadc_getGroupResult() : IfxEvadc.h
  • IfxEvadc_getGroupSampleTime() : IfxEvadc.h
  • IfxEvadc_getMasterIndex() : IfxEvadc.h
  • IfxEvadc_getQueueSlotGatingMode() : IfxEvadc.c , IfxEvadc.h
  • IfxEvadc_getQueueSlotGatingSource() : IfxEvadc.c , IfxEvadc.h
  • IfxEvadc_getQueueSlotPriority() : IfxEvadc.c , IfxEvadc.h
  • IfxEvadc_getQueueSlotStartMode() : IfxEvadc.c , IfxEvadc.h
  • IfxEvadc_getQueueSlotTriggerInput() : IfxEvadc.c , IfxEvadc.h
  • IfxEvadc_getQueueSlotTriggerMode() : IfxEvadc.c , IfxEvadc.h
  • IfxEvadc_getQueueStatus() : IfxEvadc.c , IfxEvadc.h
  • IfxEvadc_getResult() : IfxEvadc.h
  • IfxEvadc_getResultBasedOnRequestSource() : IfxEvadc.c , IfxEvadc.h
  • IfxEvadc_getResultRegisterAddress() : IfxEvadc.h
  • IfxEvadc_getSrcAddress() : IfxEvadc.h
  • IfxEvadc_getStartupCalibrationStatus() : IfxEvadc.h
  • IfxEvadc_initEmuxPin() : IfxEvadc.h
  • IfxEvadc_initGxBflPin() : IfxEvadc.h
  • IfxEvadc_initialiseAdcConverterClock() : IfxEvadc.h
  • IfxEvadc_initializeFAdcI() : IfxEvadc.c , IfxEvadc.h
  • IfxEvadc_initiateStartupCalibration() : IfxEvadc.h
  • IfxEvadc_isFastCompareNewResultAvailable() : IfxEvadc.h
  • IfxEvadc_isModuleEnabled() : IfxEvadc.h
  • IfxEvadc_isModuleSuspended() : IfxEvadc.h
  • IfxEvadc_isRequestQueueSlotEnabled() : IfxEvadc.c , IfxEvadc.h
  • IfxEvadc_resetGroup() : IfxEvadc.h
  • IfxEvadc_resetModule() : IfxEvadc.c , IfxEvadc.h
  • IfxEvadc_selectDoubleClockForMSBConversion() : IfxEvadc.h
  • IfxEvadc_selectFastCompareBoundaryFlagActivationMode() : IfxEvadc.h
  • IfxEvadc_selectFastCompareBoundaryFlagNodePointer() : IfxEvadc.h
  • IfxEvadc_selectIdlePrechargeLevel() : IfxEvadc.h
  • IfxEvadc_selectQueueGatingMode() : IfxEvadc.h
  • IfxEvadc_setAnalogClockSynchronizationDelay() : IfxEvadc.h
  • IfxEvadc_setAnalogConvertControl() : IfxEvadc.h
  • IfxEvadc_setAnalogInputPrechargeControlEMUX() : IfxEvadc.h
  • IfxEvadc_setAnalogInputPrechargeControlStandard() : IfxEvadc.h
  • IfxEvadc_setArbiterPriority() : IfxEvadc.c , IfxEvadc.h
  • IfxEvadc_setBoundaryMode() : IfxEvadc.h
  • IfxEvadc_setCalibrationSampleTime() : IfxEvadc.h
  • IfxEvadc_setChannelEventNodePointer0() : IfxEvadc.h
  • IfxEvadc_setChannelEventNodePointer1() : IfxEvadc.h
  • IfxEvadc_setChannelInputClass() : IfxEvadc.h
  • IfxEvadc_setChannelLimitCheckMode() : IfxEvadc.h
  • IfxEvadc_setChannelRequest() : IfxEvadc.h
  • IfxEvadc_setDataModificationMode() : IfxEvadc.h
  • IfxEvadc_setDataReductionControlMode() : IfxEvadc.h
  • IfxEvadc_setEmuxGlobalConversionMode() : IfxEvadc.h
  • IfxEvadc_setEmuxGlobalSampleTime() : IfxEvadc.h
  • IfxEvadc_setEmuxGroupConversionMode() : IfxEvadc.h
  • IfxEvadc_setEmuxGroupSampletime() : IfxEvadc.h
  • IfxEvadc_setEmuxInterfaceForGroup() : IfxEvadc.h
  • IfxEvadc_setFastCompareAnalogClockSynchronizationDelay() : IfxEvadc.h
  • IfxEvadc_setFastCompareAnalogConverter() : IfxEvadc.h
  • IfxEvadc_setFastCompareAnalogInputPrechargeControl() : IfxEvadc.h
  • IfxEvadc_setFastCompareAnalogInternalClockDivider() : IfxEvadc.h
  • IfxEvadc_setFastCompareAutomaticUpdateMode() : IfxEvadc.h
  • IfxEvadc_setFastCompareBoundaryFlagInversion() : IfxEvadc.h
  • IfxEvadc_setFastCompareBoundaryFlagSwControl() : IfxEvadc.h
  • IfxEvadc_setFastCompareChannelEventMode() : IfxEvadc.h
  • IfxEvadc_setFastCompareExternalTriggerPolarity() : IfxEvadc.h
  • IfxEvadc_setFastCompareGateOperatingMode() : IfxEvadc.h
  • IfxEvadc_setFastCompareRampDirection() : IfxEvadc.h
  • IfxEvadc_setFastCompareReferencePrechargeDuration() : IfxEvadc.h
  • IfxEvadc_setFastCompareReferenceValue() : IfxEvadc.h
  • IfxEvadc_setFastCompareRunControl() : IfxEvadc.h
  • IfxEvadc_setFastCompareRunRampControl() : IfxEvadc.h
  • IfxEvadc_setFastCompareSampleTimeControl() : IfxEvadc.h
  • IfxEvadc_setFastCompareServiceRequestGeneration() : IfxEvadc.h
  • IfxEvadc_setFastCompareTriggerInterval() : IfxEvadc.h
  • IfxEvadc_setFastCompareTriggerOperatingMode() : IfxEvadc.h
  • IfxEvadc_setFifoMode() : IfxEvadc.h
  • IfxEvadc_setGlobalConversionMode() : IfxEvadc.h
  • IfxEvadc_setGlobalSampleTime() : IfxEvadc.h
  • IfxEvadc_setGroupConversionMode() : IfxEvadc.h
  • IfxEvadc_setGroupConversionModeEMUX() : IfxEvadc.h
  • IfxEvadc_setGroupSampleTime() : IfxEvadc.h
  • IfxEvadc_setGroupSampleTimeEMUX() : IfxEvadc.h
  • IfxEvadc_setLowerBoundary() : IfxEvadc.h
  • IfxEvadc_setMasterIndex() : IfxEvadc.h
  • IfxEvadc_setQueueSlotGatingConfig() : IfxEvadc.c , IfxEvadc.h
  • IfxEvadc_setQueueSlotTriggerOperatingConfig() : IfxEvadc.c , IfxEvadc.h
  • IfxEvadc_setReferenceInput() : IfxEvadc.h
  • IfxEvadc_setReferencePrechargeDuration() : IfxEvadc.h
  • IfxEvadc_setResultNodeEventPointer0() : IfxEvadc.h
  • IfxEvadc_setResultNodeEventPointer1() : IfxEvadc.h
  • IfxEvadc_setResultPosition() : IfxEvadc.h
  • IfxEvadc_setSampleSynchronizationMode() : IfxEvadc.h
  • IfxEvadc_setSleepMode() : IfxEvadc.h
  • IfxEvadc_setSuspendMode() : IfxEvadc.h
  • IfxEvadc_setSyncRequest() : IfxEvadc.h
  • IfxEvadc_setUpperBoundary() : IfxEvadc.h
  • IfxEvadc_spreadEarlySamplePointEMUXConversions() : IfxEvadc.h
  • IfxEvadc_spreadEarlySamplePointStandardConversions() : IfxEvadc.h
  • IfxEvadc_startQueue() : IfxEvadc.h
  • IfxEvadc_startupCalibration() : IfxEvadc.c , IfxEvadc.h
  • IfxEvadc_storeGroupResult() : IfxEvadc.h
  • IfxEvadc_syncConvWorkAround() : IfxEvadc.c , IfxEvadc.h
  • IfxFce_clearCrcErrorFlags() : IfxFce.h
  • IfxFce_Crc_calculateCrc() : IfxFce_Crc.c , IfxFce_Crc.h
  • IfxFce_Crc_clearErrorFlags() : IfxFce_Crc.c , IfxFce_Crc.h
  • IfxFce_Crc_deInitModule() : IfxFce_Crc.c , IfxFce_Crc.h
  • IfxFce_Crc_getInterruptStatus() : IfxFce_Crc.c , IfxFce_Crc.h
  • IfxFce_Crc_initCrc() : IfxFce_Crc.c , IfxFce_Crc.h
  • IfxFce_Crc_initCrcConfig() : IfxFce_Crc.c , IfxFce_Crc.h
  • IfxFce_Crc_initModule() : IfxFce_Crc.c , IfxFce_Crc.h
  • IfxFce_Crc_initModuleConfig() : IfxFce_Crc.c , IfxFce_Crc.h
  • IfxFce_disableModule() : IfxFce.h
  • IfxFce_enableModule() : IfxFce.h
  • IfxFce_getCrcInterruptStatus() : IfxFce.h
  • IfxFce_getSrcPointer() : IfxFce.h
  • IfxFce_reflectCrc32() : IfxFce.c , IfxFce.h
  • IfxFce_resetModule() : IfxFce.c , IfxFce.h
  • IfxFce_setChannelCrcLength() : IfxFce.h
  • IfxFce_setCrcstartValue() : IfxFce.h
  • IfxFce_setExpectedCrc() : IfxFce.h
  • IfxFlash_clearStatus() : IfxFlash.h
  • IfxFlash_disableWriteProtection() : IfxFlash.c , IfxFlash.h
  • IfxFlash_enterCrankingMode() : IfxFlash.h
  • IfxFlash_enterDemandMode() : IfxFlash.h
  • IfxFlash_enterDynamicIdleMode() : IfxFlash.h
  • IfxFlash_enterPageMode() : IfxFlash.h
  • IfxFlash_eraseMultipleSectors() : IfxFlash.h
  • IfxFlash_eraseSector() : IfxFlash.h
  • IfxFlash_eraseVerifyMultipleSectors() : IfxFlash.h
  • IfxFlash_eraseVerifySector() : IfxFlash.h
  • IfxFlash_exitCrankingMode() : IfxFlash.h
  • IfxFlash_exitDemandMode() : IfxFlash.h
  • IfxFlash_exitDynamicIdleMode() : IfxFlash.h
  • IfxFlash_isCrankingMode() : IfxFlash.h
  • IfxFlash_isDemandMode() : IfxFlash.h
  • IfxFlash_isDynamicIdleMode() : IfxFlash.h
  • IfxFlash_loadPage() : IfxFlash.h
  • IfxFlash_loadPage2X32() : IfxFlash.h
  • IfxFlash_replaceLogicalSector() : IfxFlash.h
  • IfxFlash_resetToRead() : IfxFlash.h
  • IfxFlash_resumeProtection() : IfxFlash.h
  • IfxFlash_suspendResumeMultipleSectors() : IfxFlash.h
  • IfxFlash_suspendResumeSector() : IfxFlash.h
  • IfxFlash_userContentCount() : IfxFlash.h
  • IfxFlash_userMarginCount() : IfxFlash.h
  • IfxFlash_userVthCount() : IfxFlash.h
  • IfxFlash_verifyErasedPage() : IfxFlash.h
  • IfxFlash_verifyErasedWordLine() : IfxFlash.h
  • IfxFlash_waitUnbusy() : IfxFlash.h
  • IfxFlash_waitUnbusyAll() : IfxFlash.h
  • IfxFlash_writeBurst() : IfxFlash.h
  • IfxFlash_writeBurstOnce() : IfxFlash.h
  • IfxFlash_writePage() : IfxFlash.h
  • IfxFlash_writePageOnce() : IfxFlash.h
  • IfxGeth_disableModule() : IfxGeth.c , IfxGeth.h
  • IfxGeth_dma_applySoftwareReset() : IfxGeth.h
  • IfxGeth_dma_clearAllInterruptFlags() : IfxGeth.h
  • IfxGeth_dma_clearInterruptFlag() : IfxGeth.h
  • IfxGeth_dma_disableInterrupt() : IfxGeth.h
  • IfxGeth_dma_enableInterrupt() : IfxGeth.h
  • IfxGeth_dma_isInterruptFlagSet() : IfxGeth.h
  • IfxGeth_dma_isSoftwareResetDone() : IfxGeth.h
  • IfxGeth_dma_setAddressAlignedBeats() : IfxGeth.h
  • IfxGeth_dma_setFixedBurst() : IfxGeth.h
  • IfxGeth_dma_setMixedBurst() : IfxGeth.h
  • IfxGeth_dma_setRxBufferSize() : IfxGeth.h
  • IfxGeth_dma_setRxDescriptorListAddress() : IfxGeth.h
  • IfxGeth_dma_setRxDescriptorRingLength() : IfxGeth.h
  • IfxGeth_dma_setRxDescriptorTailPointer() : IfxGeth.h
  • IfxGeth_dma_setRxMaxBurstLength() : IfxGeth.h
  • IfxGeth_dma_setTxDescriptorListAddress() : IfxGeth.h
  • IfxGeth_dma_setTxDescriptorRingLength() : IfxGeth.h
  • IfxGeth_dma_setTxDescriptorTailPointer() : IfxGeth.h
  • IfxGeth_dma_setTxMaxBurstLength() : IfxGeth.h
  • IfxGeth_dma_startReceiver() : IfxGeth.h
  • IfxGeth_dma_startTransmitter() : IfxGeth.h
  • IfxGeth_dma_stopTransmitter() : IfxGeth.h
  • IfxGeth_enableModule() : IfxGeth.c , IfxGeth.h
  • IfxGeth_Eth_configureDMA() : IfxGeth_Eth.c , IfxGeth_Eth.h
  • IfxGeth_Eth_configureMacCore() : IfxGeth_Eth.c , IfxGeth_Eth.h
  • IfxGeth_Eth_configureMTL() : IfxGeth_Eth.c , IfxGeth_Eth.h
  • IfxGeth_Eth_freeReceiveBuffer() : IfxGeth_Eth.c , IfxGeth_Eth.h
  • IfxGeth_Eth_getActualRxDescriptor() : IfxGeth_Eth.h
  • IfxGeth_Eth_getActualTxDescriptor() : IfxGeth_Eth.h
  • IfxGeth_Eth_getBaseRxDescriptor() : IfxGeth_Eth.h
  • IfxGeth_Eth_getBaseTxDescriptor() : IfxGeth_Eth.h
  • IfxGeth_Eth_getReceiveBuffer() : IfxGeth_Eth.c , IfxGeth_Eth.h
  • IfxGeth_Eth_getTransmitBuffer() : IfxGeth_Eth.c , IfxGeth_Eth.h
  • IfxGeth_Eth_initModule() : IfxGeth_Eth.c , IfxGeth_Eth.h
  • IfxGeth_Eth_initModuleConfig() : IfxGeth_Eth.c , IfxGeth_Eth.h
  • IfxGeth_Eth_initReceiveDescriptors() : IfxGeth_Eth.c , IfxGeth_Eth.h
  • IfxGeth_Eth_initTransmitDescriptors() : IfxGeth_Eth.c , IfxGeth_Eth.h
  • IfxGeth_Eth_isRxDataAvailable() : IfxGeth_Eth.h
  • IfxGeth_Eth_sendFrame() : IfxGeth_Eth.c , IfxGeth_Eth.h
  • IfxGeth_Eth_sendTransmitBuffer() : IfxGeth_Eth.c , IfxGeth_Eth.h
  • IfxGeth_Eth_setupMiiInputPins() : IfxGeth_Eth.c , IfxGeth_Eth.h
  • IfxGeth_Eth_setupMiiOutputPins() : IfxGeth_Eth.c , IfxGeth_Eth.h
  • IfxGeth_Eth_setupRgmiiInputPins() : IfxGeth_Eth.c , IfxGeth_Eth.h
  • IfxGeth_Eth_setupRgmiiOutputPins() : IfxGeth_Eth.c , IfxGeth_Eth.h
  • IfxGeth_Eth_setupRmiiInputPins() : IfxGeth_Eth.c , IfxGeth_Eth.h
  • IfxGeth_Eth_setupRmiiOutputPins() : IfxGeth_Eth.c , IfxGeth_Eth.h
  • IfxGeth_Eth_shuffleRxDescriptor() : IfxGeth_Eth.c , IfxGeth_Eth.h
  • IfxGeth_Eth_shuffleTxDescriptor() : IfxGeth_Eth.c , IfxGeth_Eth.h
  • IfxGeth_Eth_startReceiver() : IfxGeth_Eth.c , IfxGeth_Eth.h
  • IfxGeth_Eth_startReceivers() : IfxGeth_Eth.c , IfxGeth_Eth.h
  • IfxGeth_Eth_startTransmitter() : IfxGeth_Eth.c , IfxGeth_Eth.h
  • IfxGeth_Eth_startTransmitters() : IfxGeth_Eth.c , IfxGeth_Eth.h
  • IfxGeth_Eth_stopTransmitters() : IfxGeth_Eth.c , IfxGeth_Eth.h
  • IfxGeth_Eth_waitTransmitBuffer() : IfxGeth_Eth.h
  • IfxGeth_Eth_wakeupReceiver() : IfxGeth_Eth.c , IfxGeth_Eth.h
  • IfxGeth_Eth_wakeupTransmitter() : IfxGeth_Eth.c , IfxGeth_Eth.h
  • IfxGeth_Eth_writeHeader() : IfxGeth_Eth.c , IfxGeth_Eth.h
  • IfxGeth_getAddress() : IfxGeth.c , IfxGeth.h
  • IfxGeth_getIndex() : IfxGeth.c , IfxGeth.h
  • IfxGeth_getSrcPointer() : IfxGeth.c , IfxGeth.h
  • IfxGeth_isModuleEnabled() : IfxGeth.h
  • IfxGeth_mac_disableReceiver() : IfxGeth.h
  • IfxGeth_mac_disableTransmitter() : IfxGeth.h
  • IfxGeth_mac_enableReceiver() : IfxGeth.h
  • IfxGeth_mac_enableTransmitter() : IfxGeth.h
  • IfxGeth_mac_readQueueVlanTag() : IfxGeth.c , IfxGeth.h
  • IfxGeth_mac_setAllMulticastPassing() : IfxGeth.h
  • IfxGeth_mac_setCrcChecking() : IfxGeth.h
  • IfxGeth_mac_setCrcStripping() : IfxGeth.h
  • IfxGeth_mac_setDuplexMode() : IfxGeth.h
  • IfxGeth_mac_setLineSpeed() : IfxGeth.c , IfxGeth.h
  • IfxGeth_mac_setLoopbackMode() : IfxGeth.h
  • IfxGeth_mac_setMacAddress() : IfxGeth.c , IfxGeth.h
  • IfxGeth_mac_setMaxPacketSize() : IfxGeth.c , IfxGeth.h
  • IfxGeth_mac_setPreambleLength() : IfxGeth.h
  • IfxGeth_mac_setPromiscuousMode() : IfxGeth.h
  • IfxGeth_mac_setQueueVlanInsertion() : IfxGeth.h
  • IfxGeth_mac_setVlanPriorityQueueRouting() : IfxGeth.h
  • IfxGeth_mac_writeQueueVlanTag() : IfxGeth.c , IfxGeth.h
  • IfxGeth_mtl_clearAllInterruptFlags() : IfxGeth.c , IfxGeth.h
  • IfxGeth_mtl_clearInterruptFlag() : IfxGeth.c , IfxGeth.h
  • IfxGeth_mtl_disableInterrupt() : IfxGeth.c , IfxGeth.h
  • IfxGeth_mtl_disableMulticastFilterFailQueuing() : IfxGeth.h
  • IfxGeth_mtl_disableUnicastFilterFailQueuing() : IfxGeth.h
  • IfxGeth_mtl_disableVlanFilterFailQueuing() : IfxGeth.h
  • IfxGeth_mtl_enableInterrupt() : IfxGeth.c , IfxGeth.h
  • IfxGeth_mtl_enableMulticastFilterFailQueuing() : IfxGeth.h
  • IfxGeth_mtl_enableRxQueue() : IfxGeth.h
  • IfxGeth_mtl_enableTxQueue() : IfxGeth.c , IfxGeth.h
  • IfxGeth_mtl_enableUnicastFilterFailQueuing() : IfxGeth.h
  • IfxGeth_mtl_enableVlanFilterFailQueuing() : IfxGeth.h
  • IfxGeth_mtl_isInterruptFlagSet() : IfxGeth.c , IfxGeth.h
  • IfxGeth_mtl_setRxArbitrationAlgorithm() : IfxGeth.h
  • IfxGeth_mtl_setRxForwardErrorPacket() : IfxGeth.c , IfxGeth.h
  • IfxGeth_mtl_setRxForwardUndersizedGoodPacket() : IfxGeth.h , IfxGeth.c
  • IfxGeth_mtl_setRxQueueDmaChannelMapping() : IfxGeth.h
  • IfxGeth_mtl_setRxQueueForDaBasedDmaChannel() : IfxGeth.h
  • IfxGeth_mtl_setRxQueueSize() : IfxGeth.c , IfxGeth.h
  • IfxGeth_mtl_setRxStoreAndForward() : IfxGeth.c , IfxGeth.h
  • IfxGeth_mtl_setTxQueueSize() : IfxGeth.h , IfxGeth.c
  • IfxGeth_mtl_setTxSchedulingAlgorithm() : IfxGeth.h
  • IfxGeth_mtl_setTxStoreAndForward() : IfxGeth.c , IfxGeth.h
  • IfxGeth_phy_Clause22_readMDIORegister() : IfxGeth.c , IfxGeth.h
  • IfxGeth_Phy_Clause22_writeMDIORegister() : IfxGeth.c , IfxGeth.h
  • IfxGeth_phy_Clause45_readMDIORegister() : IfxGeth.c , IfxGeth.h
  • IfxGeth_Phy_Clause45_writeMDIORegister() : IfxGeth.c , IfxGeth.h
  • IfxGeth_resetModule() : IfxGeth.c , IfxGeth.h
  • IfxGeth_setPhyInterfaceMode() : IfxGeth.h
  • IfxGpt12_disableModule() : IfxGpt12.h , IfxGpt12.c
  • IfxGpt12_enableModule() : IfxGpt12.c , IfxGpt12.h
  • IfxGpt12_getCaptureSrc() : IfxGpt12.h
  • IfxGpt12_getModuleFrequency() : IfxGpt12.h
  • IfxGpt12_IncrEnc_getAbsolutePosition() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_getDirection() : IfxGpt12_IncrEnc.h , IfxGpt12_IncrEnc.c
  • IfxGpt12_IncrEnc_getFault() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_getOffset() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_getPeriodPerRotation() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_getPosition() : IfxGpt12_IncrEnc.h , IfxGpt12_IncrEnc.c
  • IfxGpt12_IncrEnc_getRawPosition() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_getRefreshPeriod() : IfxGpt12_IncrEnc.h , IfxGpt12_IncrEnc.c
  • IfxGpt12_IncrEnc_getResolution() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_getSensorType() : IfxGpt12_IncrEnc.h , IfxGpt12_IncrEnc.c
  • IfxGpt12_IncrEnc_getSpeed() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_getTurn() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_init() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_initConfig() : IfxGpt12_IncrEnc.h , IfxGpt12_IncrEnc.c
  • IfxGpt12_IncrEnc_onZeroIrq() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_reset() : IfxGpt12_IncrEnc.h , IfxGpt12_IncrEnc.c
  • IfxGpt12_IncrEnc_resetFaults() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_setOffset() : IfxGpt12_IncrEnc.h , IfxGpt12_IncrEnc.c
  • IfxGpt12_IncrEnc_setRefreshPeriod() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_stdIfPosInit() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_update() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_updateFromT2() : IfxGpt12_IncrEnc.c
  • IfxGpt12_IncrEnc_updateFromT3() : IfxGpt12_IncrEnc.c
  • IfxGpt12_IncrEnc_updateSpeedFromT2() : IfxGpt12_IncrEnc.c
  • IfxGpt12_IncrEnc_updateSpeedFromT3() : IfxGpt12_IncrEnc.c
  • IfxGpt12_initCapInPin() : IfxGpt12.h
  • IfxGpt12_initCapInPinWithPadLevel() : IfxGpt12.h
  • IfxGpt12_initTxEudInPin() : IfxGpt12.c , IfxGpt12.h
  • IfxGpt12_initTxEudInPinWithPadLevel() : IfxGpt12.h , IfxGpt12.c
  • IfxGpt12_initTxInPin() : IfxGpt12.c , IfxGpt12.h
  • IfxGpt12_initTxInPinWithPadLevel() : IfxGpt12.c , IfxGpt12.h
  • IfxGpt12_initTxOutPin() : IfxGpt12.h
  • IfxGpt12_isModuleSuspended() : IfxGpt12.h
  • IfxGpt12_resetModule() : IfxGpt12.h , IfxGpt12.c
  • IfxGpt12_setCaptureInput() : IfxGpt12.h
  • IfxGpt12_setCaptureReload() : IfxGpt12.h
  • IfxGpt12_setGpt1BlockPrescaler() : IfxGpt12.h
  • IfxGpt12_setGpt2BlockPrescaler() : IfxGpt12.h
  • IfxGpt12_setSleepMode() : IfxGpt12.h
  • IfxGpt12_setSuspendMode() : IfxGpt12.h
  • IfxGpt12_T2_getFrequency() : IfxGpt12.h , IfxGpt12.c
  • IfxGpt12_T2_getMode() : IfxGpt12.h
  • IfxGpt12_T2_getSrc() : IfxGpt12.h
  • IfxGpt12_T2_getTimerValue() : IfxGpt12.h
  • IfxGpt12_T2_run() : IfxGpt12.h
  • IfxGpt12_T2_setCaptureInputMode() : IfxGpt12.h
  • IfxGpt12_T2_setCounterInputMode() : IfxGpt12.h
  • IfxGpt12_T2_setDirectionSource() : IfxGpt12.h
  • IfxGpt12_T2_setEudInput() : IfxGpt12.h
  • IfxGpt12_T2_setIncrementalInterfaceInputMode() : IfxGpt12.h
  • IfxGpt12_T2_setInput() : IfxGpt12.h
  • IfxGpt12_T2_setInterruptEnable() : IfxGpt12.h
  • IfxGpt12_T2_setMode() : IfxGpt12.h
  • IfxGpt12_T2_setReloadInputMode() : IfxGpt12.h
  • IfxGpt12_T2_setRemoteControl() : IfxGpt12.h
  • IfxGpt12_T2_setTimerDirection() : IfxGpt12.h
  • IfxGpt12_T2_setTimerPrescaler() : IfxGpt12.h
  • IfxGpt12_T2_setTimerValue() : IfxGpt12.h
  • IfxGpt12_T3_enableOutput() : IfxGpt12.h
  • IfxGpt12_T3_getFrequency() : IfxGpt12.c , IfxGpt12.h
  • IfxGpt12_T3_getMode() : IfxGpt12.h
  • IfxGpt12_T3_getSrc() : IfxGpt12.h
  • IfxGpt12_T3_getTimerValue() : IfxGpt12.h
  • IfxGpt12_T3_run() : IfxGpt12.h
  • IfxGpt12_T3_setCounterInputMode() : IfxGpt12.h
  • IfxGpt12_T3_setDirectionSource() : IfxGpt12.h
  • IfxGpt12_T3_setEudInput() : IfxGpt12.h
  • IfxGpt12_T3_setIncrementalInterfaceInputMode() : IfxGpt12.h
  • IfxGpt12_T3_setInput() : IfxGpt12.h
  • IfxGpt12_T3_setMode() : IfxGpt12.h
  • IfxGpt12_T3_setTimerDirection() : IfxGpt12.h
  • IfxGpt12_T3_setTimerPrescaler() : IfxGpt12.h
  • IfxGpt12_T3_setTimerValue() : IfxGpt12.h
  • IfxGpt12_T4_enableClearTimerT2() : IfxGpt12.h
  • IfxGpt12_T4_enableClearTimerT3() : IfxGpt12.h
  • IfxGpt12_T4_getFrequency() : IfxGpt12.c , IfxGpt12.h
  • IfxGpt12_T4_getMode() : IfxGpt12.h
  • IfxGpt12_T4_getSrc() : IfxGpt12.h
  • IfxGpt12_T4_getTimerValue() : IfxGpt12.h
  • IfxGpt12_T4_run() : IfxGpt12.h
  • IfxGpt12_T4_setCaptureInputMode() : IfxGpt12.h
  • IfxGpt12_T4_setCounterInputMode() : IfxGpt12.h
  • IfxGpt12_T4_setDirectionSource() : IfxGpt12.h
  • IfxGpt12_T4_setEudInput() : IfxGpt12.h
  • IfxGpt12_T4_setIncrementalInterfaceInputMode() : IfxGpt12.h
  • IfxGpt12_T4_setInput() : IfxGpt12.h
  • IfxGpt12_T4_setInterruptEnable() : IfxGpt12.h
  • IfxGpt12_T4_setMode() : IfxGpt12.h
  • IfxGpt12_T4_setReloadInputMode() : IfxGpt12.h
  • IfxGpt12_T4_setRemoteControl() : IfxGpt12.h
  • IfxGpt12_T4_setTimerDirection() : IfxGpt12.h
  • IfxGpt12_T4_setTimerPrescaler() : IfxGpt12.h
  • IfxGpt12_T4_setTimerValue() : IfxGpt12.h
  • IfxGpt12_T5_enableClearTimer() : IfxGpt12.h
  • IfxGpt12_T5_getFrequency() : IfxGpt12.c , IfxGpt12.h
  • IfxGpt12_T5_getMode() : IfxGpt12.h
  • IfxGpt12_T5_getSrc() : IfxGpt12.h
  • IfxGpt12_T5_getTimerValue() : IfxGpt12.h
  • IfxGpt12_T5_run() : IfxGpt12.h
  • IfxGpt12_T5_setCaptureTrigger() : IfxGpt12.h
  • IfxGpt12_T5_setCaptureTriggerEnable() : IfxGpt12.h
  • IfxGpt12_T5_setCaptureTriggerMode() : IfxGpt12.h
  • IfxGpt12_T5_setCounterInputMode() : IfxGpt12.h
  • IfxGpt12_T5_setDirectionSource() : IfxGpt12.h
  • IfxGpt12_T5_setEudInput() : IfxGpt12.h
  • IfxGpt12_T5_setInput() : IfxGpt12.h
  • IfxGpt12_T5_setMode() : IfxGpt12.h
  • IfxGpt12_T5_setRemoteControl() : IfxGpt12.h
  • IfxGpt12_T5_setTimerDirection() : IfxGpt12.h
  • IfxGpt12_T5_setTimerPrescaler() : IfxGpt12.h
  • IfxGpt12_T5_setTimerValue() : IfxGpt12.h
  • IfxGpt12_T6_enableClearTimer() : IfxGpt12.h
  • IfxGpt12_T6_getFrequency() : IfxGpt12.h , IfxGpt12.c
  • IfxGpt12_T6_getMode() : IfxGpt12.h
  • IfxGpt12_T6_getSrc() : IfxGpt12.h
  • IfxGpt12_T6_getTimerValue() : IfxGpt12.h
  • IfxGpt12_T6_run() : IfxGpt12.h
  • IfxGpt12_T6_setCounterInputMode() : IfxGpt12.h
  • IfxGpt12_T6_setDirectionSource() : IfxGpt12.h
  • IfxGpt12_T6_setEudInput() : IfxGpt12.h
  • IfxGpt12_T6_setInput() : IfxGpt12.h
  • IfxGpt12_T6_setMode() : IfxGpt12.h
  • IfxGpt12_T6_setReloadMode() : IfxGpt12.h
  • IfxGpt12_T6_setTimerDirection() : IfxGpt12.h
  • IfxGpt12_T6_setTimerPrescaler() : IfxGpt12.h
  • IfxGpt12_T6_setTimerValue() : IfxGpt12.h
  • IfxGtm_Atom_Agc_buildFeature() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_buildFeatureForChannel() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_enableChannel() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_enableChannelOutput() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_enableChannels() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_enableChannelsOutput() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_enableChannelsTrigger() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_enableChannelsUpdate() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_enableChannelUpdate() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_enableTimeTrigger() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_resetChannels() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_setChannelForceUpdate() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_setChannelsForceUpdate() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_setChannelsUpdate() : IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_setTimeTrigger() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_trigger() : IfxGtm_Atom.h , IfxGtm_Atom.c
  • IfxGtm_Atom_Ch_clearOneNotification() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_clearZeroNotification() : IfxGtm_Atom.h , IfxGtm_Atom.c
  • IfxGtm_Atom_Ch_configurePwmMode() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_getChannelPointer() : IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_getClockFrequency() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_getClockSource() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_getCompareOne() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_getCompareOnePointer() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_getCompareZero() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_getCompareZeroPointer() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_getCounterValue() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_getOutputLevel() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_getSrcPointer() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_getTimerPointer() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_isOneNotification() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_isZeroNotification() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_raiseInterruptOne() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_raiseInterruptZero() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setAruInput() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setAruReadAddress0() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setAruReadAddress1() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setClockSource() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setCompare() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setCompareOne() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setCompareOneShadow() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setCompareShadow() : IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setCompareZero() : IfxGtm_Atom.h , IfxGtm_Atom.c
  • IfxGtm_Atom_Ch_setCompareZeroShadow() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setCounterValue() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setMode() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setNotification() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setOneShotMode() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setResetSource() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setSignalLevel() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setSomcControl() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setSomcSignalLevelControl() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setTriggerOutput() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Dtm_PwmHl_getDeadtime() : IfxGtm_Atom_Dtm_PwmHl.c , IfxGtm_Atom_Dtm_PwmHl.h
  • IfxGtm_Atom_Dtm_PwmHl_getDeadtimeInTimerClockTicks() : IfxGtm_Atom_Dtm_PwmHl.c
  • IfxGtm_Atom_Dtm_PwmHl_getDeadtimeTick() : IfxGtm_Atom_Dtm_PwmHl.c , IfxGtm_Atom_Dtm_PwmHl.h
  • IfxGtm_Atom_Dtm_PwmHl_getMinPulse() : IfxGtm_Atom_Dtm_PwmHl.c , IfxGtm_Atom_Dtm_PwmHl.h
  • IfxGtm_Atom_Dtm_PwmHl_getMode() : IfxGtm_Atom_Dtm_PwmHl.h , IfxGtm_Atom_Dtm_PwmHl.c
  • IfxGtm_Atom_Dtm_PwmHl_init() : IfxGtm_Atom_Dtm_PwmHl.c , IfxGtm_Atom_Dtm_PwmHl.h
  • IfxGtm_Atom_Dtm_PwmHl_initConfig() : IfxGtm_Atom_Dtm_PwmHl.h , IfxGtm_Atom_Dtm_PwmHl.c
  • IfxGtm_Atom_Dtm_PwmHl_invertActiveState() : IfxGtm_Atom_Dtm_PwmHl.c
  • IfxGtm_Atom_Dtm_PwmHl_setDeadtime() : IfxGtm_Atom_Dtm_PwmHl.c , IfxGtm_Atom_Dtm_PwmHl.h
  • IfxGtm_Atom_Dtm_PwmHl_setMinPulse() : IfxGtm_Atom_Dtm_PwmHl.c , IfxGtm_Atom_Dtm_PwmHl.h
  • IfxGtm_Atom_Dtm_PwmHl_setMode() : IfxGtm_Atom_Dtm_PwmHl.c , IfxGtm_Atom_Dtm_PwmHl.h
  • IfxGtm_Atom_Dtm_PwmHl_setOnTime() : IfxGtm_Atom_Dtm_PwmHl.c
  • IfxGtm_Atom_Dtm_PwmHl_setOnTimeAndShift() : IfxGtm_Atom_Dtm_PwmHl.c , IfxGtm_Atom_Dtm_PwmHl.h
  • IfxGtm_Atom_Dtm_PwmHl_setPulse() : IfxGtm_Atom_Dtm_PwmHl.h , IfxGtm_Atom_Dtm_PwmHl.c
  • IfxGtm_Atom_Dtm_PwmHl_setupChannels() : IfxGtm_Atom_Dtm_PwmHl.c , IfxGtm_Atom_Dtm_PwmHl.h
  • IfxGtm_Atom_Dtm_PwmHl_stdIfPwmHlInit() : IfxGtm_Atom_Dtm_PwmHl.h , IfxGtm_Atom_Dtm_PwmHl.c
  • IfxGtm_Atom_Dtm_PwmHl_updateAndShiftOff() : IfxGtm_Atom_Dtm_PwmHl.c
  • IfxGtm_Atom_Dtm_PwmHl_updateCenterAligned() : IfxGtm_Atom_Dtm_PwmHl.c
  • IfxGtm_Atom_Dtm_PwmHl_updateEdgeAligned() : IfxGtm_Atom_Dtm_PwmHl.c
  • IfxGtm_Atom_Dtm_PwmHl_updateOff() : IfxGtm_Atom_Dtm_PwmHl.c
  • IfxGtm_Atom_Dtm_PwmHl_updatePulse() : IfxGtm_Atom_Dtm_PwmHl.c
  • IfxGtm_Atom_Dtm_PwmHl_updatePulseOff() : IfxGtm_Atom_Dtm_PwmHl.c
  • IfxGtm_Atom_Dtm_PwmHl_updateShiftCenterAligned() : IfxGtm_Atom_Dtm_PwmHl.c
  • IfxGtm_Atom_getShadowOne() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_getShadowOnePointer() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_getShadowZero() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_getShadowZeroPointer() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Pwm_init() : IfxGtm_Atom_Pwm.c , IfxGtm_Atom_Pwm.h
  • IfxGtm_Atom_Pwm_initConfig() : IfxGtm_Atom_Pwm.c , IfxGtm_Atom_Pwm.h
  • IfxGtm_Atom_Pwm_start() : IfxGtm_Atom_Pwm.c , IfxGtm_Atom_Pwm.h
  • IfxGtm_Atom_Pwm_stop() : IfxGtm_Atom_Pwm.c , IfxGtm_Atom_Pwm.h
  • IfxGtm_Atom_PwmHl_getDeadtime() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_getMinPulse() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_getMode() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_init() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_initConfig() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_invertActiveState() : IfxGtm_Atom_PwmHl.c
  • IfxGtm_Atom_PwmHl_setDeadtime() : IfxGtm_Atom_PwmHl.h , IfxGtm_Atom_PwmHl.c
  • IfxGtm_Atom_PwmHl_setMinPulse() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_setMode() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_setOnTime() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_setOnTimeAndShift() : IfxGtm_Atom_PwmHl.h , IfxGtm_Atom_PwmHl.c
  • IfxGtm_Atom_PwmHl_setPulse() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_setupChannels() : IfxGtm_Atom_PwmHl.h , IfxGtm_Atom_PwmHl.c
  • IfxGtm_Atom_PwmHl_stdIfPwmHlInit() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_updateAndShiftOff() : IfxGtm_Atom_PwmHl.c
  • IfxGtm_Atom_PwmHl_updateCenterAligned() : IfxGtm_Atom_PwmHl.c
  • IfxGtm_Atom_PwmHl_updateEdgeAligned() : IfxGtm_Atom_PwmHl.c
  • IfxGtm_Atom_PwmHl_updateOff() : IfxGtm_Atom_PwmHl.c
  • IfxGtm_Atom_PwmHl_updatePulse() : IfxGtm_Atom_PwmHl.c
  • IfxGtm_Atom_PwmHl_updatePulseOff() : IfxGtm_Atom_PwmHl.c
  • IfxGtm_Atom_PwmHl_updateShiftCenterAligned() : IfxGtm_Atom_PwmHl.c
  • IfxGtm_Atom_setTout() : IfxGtm_Atom.h
  • IfxGtm_Atom_Timer_acknowledgeTimerIrq() : IfxGtm_Atom_Timer.h , IfxGtm_Atom_Timer.c
  • IfxGtm_Atom_Timer_acknowledgeTriggerIrq() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_addToChannelMask() : IfxGtm_Atom_Timer.h , IfxGtm_Atom_Timer.c
  • IfxGtm_Atom_Timer_applyUpdate() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_disableUpdate() : IfxGtm_Atom_Timer.h , IfxGtm_Atom_Timer.c
  • IfxGtm_Atom_Timer_getFrequency() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_getInputFrequency() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_getOffset() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_getPeriod() : IfxGtm_Atom_Timer.h , IfxGtm_Atom_Timer.c
  • IfxGtm_Atom_Timer_getPointer() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_getResolution() : IfxGtm_Atom_Timer.h , IfxGtm_Atom_Timer.c
  • IfxGtm_Atom_Timer_getTrigger() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_getTriggerPointer() : IfxGtm_Atom_Timer.h , IfxGtm_Atom_Timer.c
  • IfxGtm_Atom_Timer_init() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_initConfig() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_run() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_setFrequency() : IfxGtm_Atom_Timer.h , IfxGtm_Atom_Timer.c
  • IfxGtm_Atom_Timer_setPeriod() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_setSingleMode() : IfxGtm_Atom_Timer.h , IfxGtm_Atom_Timer.c
  • IfxGtm_Atom_Timer_setTrigger() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_stdIfTimerInit() : IfxGtm_Atom_Timer.h , IfxGtm_Atom_Timer.c
  • IfxGtm_Atom_Timer_stop() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_updateInputFrequency() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Cmu_enableClocks() : IfxGtm_Cmu.c , IfxGtm_Cmu.h
  • IfxGtm_Cmu_getClkFrequency() : IfxGtm_Cmu.h , IfxGtm_Cmu.c
  • IfxGtm_Cmu_getEclkFrequency() : IfxGtm_Cmu.c , IfxGtm_Cmu.h
  • IfxGtm_Cmu_getFxClkFrequency() : IfxGtm_Cmu.h , IfxGtm_Cmu.c
  • IfxGtm_Cmu_getGclkFrequency() : IfxGtm_Cmu.c , IfxGtm_Cmu.h
  • IfxGtm_Cmu_getModuleFrequency() : IfxGtm_Cmu.h , IfxGtm_Cmu.c
  • IfxGtm_Cmu_isClkClockEnabled() : IfxGtm_Cmu.c , IfxGtm_Cmu.h
  • IfxGtm_Cmu_isEclkClockEnabled() : IfxGtm_Cmu.c , IfxGtm_Cmu.h
  • IfxGtm_Cmu_isFxClockEnabled() : IfxGtm_Cmu.c , IfxGtm_Cmu.h
  • IfxGtm_Cmu_selectClkInput() : IfxGtm_Cmu.h , IfxGtm_Cmu.c
  • IfxGtm_Cmu_setClkFrequency() : IfxGtm_Cmu.c , IfxGtm_Cmu.h
  • IfxGtm_Cmu_setEclkFrequency() : IfxGtm_Cmu.h , IfxGtm_Cmu.c
  • IfxGtm_Cmu_setGclkFrequency() : IfxGtm_Cmu.c , IfxGtm_Cmu.h
  • IfxGtm_disable() : IfxGtm.h , IfxGtm.c
  • IfxGtm_Dpll_getSubIncFrequency() : IfxGtm_Dpll.c , IfxGtm_Dpll.h
  • IfxGtm_Dtm_getCdtmIndex() : IfxGtm_Dtm.h
  • IfxGtm_Dtm_getClockFrequency() : IfxGtm_Dtm.c , IfxGtm_Dtm.h
  • IfxGtm_Dtm_getClockSource() : IfxGtm_Dtm.h
  • IfxGtm_Dtm_getDtmChannel() : IfxGtm_Dtm.h
  • IfxGtm_Dtm_getDtmIndex() : IfxGtm_Dtm.h
  • IfxGtm_Dtm_getDtmPointer() : IfxGtm_Dtm.c , IfxGtm_Dtm.h
  • IfxGtm_Dtm_setClockSource() : IfxGtm_Dtm.h
  • IfxGtm_Dtm_setDeadtime() : IfxGtm_Dtm.h
  • IfxGtm_Dtm_setOutput0DeadTimePath() : IfxGtm_Dtm.h
  • IfxGtm_Dtm_setOutput1DeadTimePath() : IfxGtm_Dtm.h
  • IfxGtm_Dtm_setOutput1Function() : IfxGtm_Dtm.h
  • IfxGtm_Dtm_setOutput1Select() : IfxGtm_Dtm.h
  • IfxGtm_enable() : IfxGtm.c , IfxGtm.h
  • IfxGtm_getClusterFrequency() : IfxGtm.c , IfxGtm.h
  • IfxGtm_getSysClkFrequency() : IfxGtm.c , IfxGtm.h
  • IfxGtm_isEnabled() : IfxGtm.h
  • IfxGtm_isModuleSuspended() : IfxGtm.h
  • IfxGtm_PinMap_setAtomTout() : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_PinMap_setTimTin() : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_PinMap_setTomTout() : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_Psm_Afd_getChannelPointer() : IfxGtm_Psm.h
  • IfxGtm_Psm_Afd_writeChannelBuffer() : IfxGtm_Psm.h
  • IfxGtm_Psm_F2a_disableStream() : IfxGtm_Psm.c , IfxGtm_Psm.h
  • IfxGtm_Psm_F2a_enableStream() : IfxGtm_Psm.c , IfxGtm_Psm.h
  • IfxGtm_Psm_F2a_getPointer() : IfxGtm_Psm.h
  • IfxGtm_Psm_F2a_getStreamState() : IfxGtm_Psm.c , IfxGtm_Psm.h
  • IfxGtm_Psm_F2a_getTransferDirection() : IfxGtm_Psm.h
  • IfxGtm_Psm_F2a_getTransferMode() : IfxGtm_Psm.h
  • IfxGtm_Psm_F2a_setAruReadAddress() : IfxGtm_Psm.h
  • IfxGtm_Psm_F2a_setTransferDirection() : IfxGtm_Psm.h
  • IfxGtm_Psm_F2a_setTransferMode() : IfxGtm_Psm.h
  • IfxGtm_Psm_Fifo_clearAllChannelInterrupts() : IfxGtm_Psm.h
  • IfxGtm_Psm_Fifo_clearChannelInterrupt() : IfxGtm_Psm.h
  • IfxGtm_Psm_Fifo_disableChannelInterrupt() : IfxGtm_Psm.h , IfxGtm_Psm.c
  • IfxGtm_Psm_Fifo_disableRamAccess() : IfxGtm_Psm.h
  • IfxGtm_Psm_Fifo_enableChannelInterrupt() : IfxGtm_Psm.c , IfxGtm_Psm.h
  • IfxGtm_Psm_Fifo_enableRamAccess() : IfxGtm_Psm.h
  • IfxGtm_Psm_Fifo_flushChannelFifo() : IfxGtm_Psm.h
  • IfxGtm_Psm_Fifo_getChannelEndAddress() : IfxGtm_Psm.h
  • IfxGtm_Psm_Fifo_getChannelFillLevel() : IfxGtm_Psm.h
  • IfxGtm_Psm_Fifo_getChannelInterruptStatus() : IfxGtm_Psm.h
  • IfxGtm_Psm_Fifo_getChannelLowerWatermark() : IfxGtm_Psm.h
  • IfxGtm_Psm_Fifo_getChannelPointer() : IfxGtm_Psm.h
  • IfxGtm_Psm_Fifo_getChannelReadPtr() : IfxGtm_Psm.h
  • IfxGtm_Psm_Fifo_getChannelSize() : IfxGtm_Psm.h
  • IfxGtm_Psm_Fifo_getChannelSrcPointer() : IfxGtm_Psm.h
  • IfxGtm_Psm_Fifo_getChannelStartAddress() : IfxGtm_Psm.h
  • IfxGtm_Psm_Fifo_getChannelStatus() : IfxGtm_Psm.h , IfxGtm_Psm.c
  • IfxGtm_Psm_Fifo_getChannelUpperWatermark() : IfxGtm_Psm.h
  • IfxGtm_Psm_Fifo_getChannelWritePtr() : IfxGtm_Psm.h
  • IfxGtm_Psm_Fifo_getPointer() : IfxGtm_Psm.h
  • IfxGtm_Psm_Fifo_setChannelDmaHystMode() : IfxGtm_Psm.h
  • IfxGtm_Psm_Fifo_setChannelEndAddress() : IfxGtm_Psm.c , IfxGtm_Psm.h
  • IfxGtm_Psm_Fifo_setChannelInterrupt() : IfxGtm_Psm.h , IfxGtm_Psm.c
  • IfxGtm_Psm_Fifo_setChannelInterruptMode() : IfxGtm_Psm.h
  • IfxGtm_Psm_Fifo_setChannelLowerWatermark() : IfxGtm_Psm.c , IfxGtm_Psm.h
  • IfxGtm_Psm_Fifo_setChannelMode() : IfxGtm_Psm.h
  • IfxGtm_Psm_Fifo_setChannelSize() : IfxGtm_Psm.c , IfxGtm_Psm.h
  • IfxGtm_Psm_Fifo_setChannelStartAddress() : IfxGtm_Psm.h , IfxGtm_Psm.c
  • IfxGtm_Psm_Fifo_setChannelUpperWatermark() : IfxGtm_Psm.c , IfxGtm_Psm.h
  • IfxGtm_setSuspendMode() : IfxGtm.h
  • IfxGtm_Spe_clearAllInterrupts() : IfxGtm_Spe.h
  • IfxGtm_Spe_clearInterrupt() : IfxGtm_Spe.h
  • IfxGtm_Spe_disableInterrupt() : IfxGtm_Spe.c , IfxGtm_Spe.h
  • IfxGtm_Spe_enableErrorInterrupt() : IfxGtm_Spe.c , IfxGtm_Spe.h
  • IfxGtm_Spe_enableInput() : IfxGtm_Spe.c , IfxGtm_Spe.h
  • IfxGtm_Spe_enableInterrupt() : IfxGtm_Spe.c , IfxGtm_Spe.h
  • IfxGtm_Spe_enableModule() : IfxGtm_Spe.h
  • IfxGtm_Spe_getActualInputPat() : IfxGtm_Spe.h
  • IfxGtm_Spe_getBwdPatternPtr() : IfxGtm_Spe.h
  • IfxGtm_Spe_getControlCommand() : IfxGtm_Spe.h
  • IfxGtm_Spe_getDir() : IfxGtm_Spe.h
  • IfxGtm_Spe_getFastShutoffLevel() : IfxGtm_Spe.c , IfxGtm_Spe.h
  • IfxGtm_Spe_getInterruptStatus() : IfxGtm_Spe.c , IfxGtm_Spe.h
  • IfxGtm_Spe_getNewInputPat() : IfxGtm_Spe.h
  • IfxGtm_Spe_getOutputCtrl() : IfxGtm_Spe.h
  • IfxGtm_Spe_getOutputPattern() : IfxGtm_Spe.h
  • IfxGtm_Spe_getPatternPtr() : IfxGtm_Spe.h
  • IfxGtm_Spe_getPrevDir() : IfxGtm_Spe.h
  • IfxGtm_Spe_getPreviousInputPat() : IfxGtm_Spe.h
  • IfxGtm_Spe_getRevCompare() : IfxGtm_Spe.c , IfxGtm_Spe.h
  • IfxGtm_Spe_getRevCounter() : IfxGtm_Spe.h
  • IfxGtm_Spe_getSrcPointer() : IfxGtm_Spe.h
  • IfxGtm_Spe_selectTimInput() : IfxGtm_Spe.h
  • IfxGtm_Spe_selectTrigger() : IfxGtm_Spe.c , IfxGtm_Spe.h
  • IfxGtm_Spe_setAllInputPatterns() : IfxGtm_Spe.c , IfxGtm_Spe.h
  • IfxGtm_Spe_setBwdPatternPtr() : IfxGtm_Spe.h
  • IfxGtm_Spe_setControlCommand() : IfxGtm_Spe.h
  • IfxGtm_Spe_setFastShutoff() : IfxGtm_Spe.h
  • IfxGtm_Spe_setInputPattern() : IfxGtm_Spe.c , IfxGtm_Spe.h
  • IfxGtm_Spe_setInterrupt() : IfxGtm_Spe.h , IfxGtm_Spe.c
  • IfxGtm_Spe_setInterruptMode() : IfxGtm_Spe.h
  • IfxGtm_Spe_setOutputCtrl() : IfxGtm_Spe.h
  • IfxGtm_Spe_setOutputPattern() : IfxGtm_Spe.h , IfxGtm_Spe.c
  • IfxGtm_Spe_setPatternPtr() : IfxGtm_Spe.h
  • IfxGtm_Spe_setRevCompare() : IfxGtm_Spe.c , IfxGtm_Spe.h
  • IfxGtm_Spe_setRevCounter() : IfxGtm_Spe.h
  • IfxGtm_Spe_triggerUpdate() : IfxGtm_Spe.h
  • IfxGtm_Tbu_enableChannel() : IfxGtm_Tbu.h
  • IfxGtm_Tbu_getClockFrequency() : IfxGtm_Tbu.h , IfxGtm_Tbu.c
  • IfxGtm_Tbu_isChannelEnabled() : IfxGtm_Tbu.h
  • IfxGtm_Tim_Ch_clearAuxInputSourceSelection() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_clearCntOverflowEvent() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_clearDataLostEvent() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_clearEcntOverflowEvent() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_clearGlitchEvent() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_clearNewValueEvent() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_clearNotification() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_getCaptureClockFrequency() : IfxGtm_Tim.c , IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_getCaptureClockSource() : IfxGtm_Tim.c , IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_getFilterClockFrequency() : IfxGtm_Tim.c , IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_getFilterClockSource() : IfxGtm_Tim.h , IfxGtm_Tim.c
  • IfxGtm_Tim_Ch_getNotification() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_getSrcPointer() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_getTimeoutClockFrequency() : IfxGtm_Tim.h , IfxGtm_Tim.c
  • IfxGtm_Tim_Ch_getTimeoutClockSource() : IfxGtm_Tim.c , IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_isCntOverflowEvent() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_isDataLostEvent() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_isEcntOverflowEvent() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_isGlitchEvent() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_isNewValueEvent() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_resetChannel() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_setAuxInputSourceSelection() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_setChannelNotification() : IfxGtm_Tim.c , IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_setClockSource() : IfxGtm_Tim.c , IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_setControl() : IfxGtm_Tim.c , IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_setEdgeCounter() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_setFallingEdgeFilterTime() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_setFilterNotification() : IfxGtm_Tim.c , IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_setInputSourceSelection() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_setNotification() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_setNotificationMode() : IfxGtm_Tim.c , IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_setRisingEdgeFilterTime() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_setShadowCounter() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_setTimeoutNotification() : IfxGtm_Tim.c , IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_setTimTin() : IfxGtm_Tim.h
  • IfxGtm_Tim_getChannel() : IfxGtm_Tim.h
  • IfxGtm_Tim_In_clearNewData() : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_getDutyPercent() : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_getPeriodSecond() : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_getPeriodTicks() : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_getPulseLengthTick() : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_init() : IfxGtm_Tim_In.h , IfxGtm_Tim_In.c
  • IfxGtm_Tim_In_initConfig() : IfxGtm_Tim_In.c , IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_isDataLost() : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_isNewData() : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_onIsr() : IfxGtm_Tim_In.c , IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_update() : IfxGtm_Tim_In.h , IfxGtm_Tim_In.c
  • IfxGtm_Tim_Timer_initChannel() : IfxGtm_Tim_Timer.c , IfxGtm_Tim_Timer.h
  • IfxGtm_Tim_Timer_initChannelConfig() : IfxGtm_Tim_Timer.h , IfxGtm_Tim_Timer.c
  • IfxGtm_Tom_Ch_clearOneNotification() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_clearZeroNotification() : IfxGtm_Tom.h , IfxGtm_Tom.c
  • IfxGtm_Tom_Ch_getChannelPointer() : IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_getClockFrequency() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_getClockSource() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_getCompareOne() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_getCompareOnePointer() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_getCompareZero() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_getCompareZeroPointer() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_getOutputLevel() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_getSrcPointer() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_getTgcPointer() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_getTimerPointer() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_isOneNotification() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_isZeroNotification() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_raiseInterruptOne() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_raiseInterruptZero() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_setClockSource() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_setCompare() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_setCompareOne() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_setCompareOneShadow() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_setCompareShadow() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_setCompareZero() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_setCompareZeroShadow() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_setCounterValue() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_setGatedCounter() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_setNotification() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_setOneShotMode() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_setPcm() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_setResetSource() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_setSignalLevel() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_setSpe() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_setTriggerOutput() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Dtm_PwmHl_getDeadtime() : IfxGtm_Tom_Dtm_PwmHl.c , IfxGtm_Tom_Dtm_PwmHl.h
  • IfxGtm_Tom_Dtm_PwmHl_getDeadtimeInTimerClockTicks() : IfxGtm_Tom_Dtm_PwmHl.c
  • IfxGtm_Tom_Dtm_PwmHl_getDeadtimeTick() : IfxGtm_Tom_Dtm_PwmHl.c , IfxGtm_Tom_Dtm_PwmHl.h
  • IfxGtm_Tom_Dtm_PwmHl_getMinPulse() : IfxGtm_Tom_Dtm_PwmHl.c , IfxGtm_Tom_Dtm_PwmHl.h
  • IfxGtm_Tom_Dtm_PwmHl_getMode() : IfxGtm_Tom_Dtm_PwmHl.c , IfxGtm_Tom_Dtm_PwmHl.h
  • IfxGtm_Tom_Dtm_PwmHl_init() : IfxGtm_Tom_Dtm_PwmHl.h , IfxGtm_Tom_Dtm_PwmHl.c
  • IfxGtm_Tom_Dtm_PwmHl_initConfig() : IfxGtm_Tom_Dtm_PwmHl.c , IfxGtm_Tom_Dtm_PwmHl.h
  • IfxGtm_Tom_Dtm_PwmHl_invertActiveState() : IfxGtm_Tom_Dtm_PwmHl.c
  • IfxGtm_Tom_Dtm_PwmHl_setDeadtime() : IfxGtm_Tom_Dtm_PwmHl.c , IfxGtm_Tom_Dtm_PwmHl.h
  • IfxGtm_Tom_Dtm_PwmHl_setMinPulse() : IfxGtm_Tom_Dtm_PwmHl.c , IfxGtm_Tom_Dtm_PwmHl.h
  • IfxGtm_Tom_Dtm_PwmHl_setMode() : IfxGtm_Tom_Dtm_PwmHl.c , IfxGtm_Tom_Dtm_PwmHl.h
  • IfxGtm_Tom_Dtm_PwmHl_setOnTime() : IfxGtm_Tom_Dtm_PwmHl.c
  • IfxGtm_Tom_Dtm_PwmHl_setOnTimeAndShift() : IfxGtm_Tom_Dtm_PwmHl.c , IfxGtm_Tom_Dtm_PwmHl.h
  • IfxGtm_Tom_Dtm_PwmHl_setPulse() : IfxGtm_Tom_Dtm_PwmHl.c , IfxGtm_Tom_Dtm_PwmHl.h
  • IfxGtm_Tom_Dtm_PwmHl_setupChannels() : IfxGtm_Tom_Dtm_PwmHl.h , IfxGtm_Tom_Dtm_PwmHl.c
  • IfxGtm_Tom_Dtm_PwmHl_stdIfPwmHlInit() : IfxGtm_Tom_Dtm_PwmHl.c , IfxGtm_Tom_Dtm_PwmHl.h
  • IfxGtm_Tom_Dtm_PwmHl_updateAndShiftOff() : IfxGtm_Tom_Dtm_PwmHl.c
  • IfxGtm_Tom_Dtm_PwmHl_updateCenterAligned() : IfxGtm_Tom_Dtm_PwmHl.c
  • IfxGtm_Tom_Dtm_PwmHl_updateEdgeAligned() : IfxGtm_Tom_Dtm_PwmHl.c
  • IfxGtm_Tom_Dtm_PwmHl_updateOff() : IfxGtm_Tom_Dtm_PwmHl.c
  • IfxGtm_Tom_Dtm_PwmHl_updatePulse() : IfxGtm_Tom_Dtm_PwmHl.c
  • IfxGtm_Tom_Dtm_PwmHl_updatePulseOff() : IfxGtm_Tom_Dtm_PwmHl.c
  • IfxGtm_Tom_Dtm_PwmHl_updateShiftCenterAligned() : IfxGtm_Tom_Dtm_PwmHl.c
  • IfxGtm_Tom_Pwm_init() : IfxGtm_Tom_Pwm.c , IfxGtm_Tom_Pwm.h
  • IfxGtm_Tom_Pwm_initConfig() : IfxGtm_Tom_Pwm.c , IfxGtm_Tom_Pwm.h
  • IfxGtm_Tom_Pwm_start() : IfxGtm_Tom_Pwm.c , IfxGtm_Tom_Pwm.h
  • IfxGtm_Tom_Pwm_stop() : IfxGtm_Tom_Pwm.h , IfxGtm_Tom_Pwm.c
  • IfxGtm_Tom_PwmHl_getDeadtime() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_getMinPulse() : IfxGtm_Tom_PwmHl.h , IfxGtm_Tom_PwmHl.c
  • IfxGtm_Tom_PwmHl_getMode() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_init() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_initConfig() : IfxGtm_Tom_PwmHl.h , IfxGtm_Tom_PwmHl.c
  • IfxGtm_Tom_PwmHl_invertActiveState() : IfxGtm_Tom_PwmHl.c
  • IfxGtm_Tom_PwmHl_setDeadtime() : IfxGtm_Tom_PwmHl.h , IfxGtm_Tom_PwmHl.c
  • IfxGtm_Tom_PwmHl_setMinPulse() : IfxGtm_Tom_PwmHl.h , IfxGtm_Tom_PwmHl.c
  • IfxGtm_Tom_PwmHl_setMode() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_setOnTime() : IfxGtm_Tom_PwmHl.h , IfxGtm_Tom_PwmHl.c
  • IfxGtm_Tom_PwmHl_setOnTimeAndShift() : IfxGtm_Tom_PwmHl.h , IfxGtm_Tom_PwmHl.c
  • IfxGtm_Tom_PwmHl_setPulse() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_setupChannels() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_stdIfPwmHlInit() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_updateAndShiftOff() : IfxGtm_Tom_PwmHl.c
  • IfxGtm_Tom_PwmHl_updateCenterAligned() : IfxGtm_Tom_PwmHl.c
  • IfxGtm_Tom_PwmHl_updateEdgeAligned() : IfxGtm_Tom_PwmHl.c
  • IfxGtm_Tom_PwmHl_updateOff() : IfxGtm_Tom_PwmHl.c
  • IfxGtm_Tom_PwmHl_updatePulse() : IfxGtm_Tom_PwmHl.c
  • IfxGtm_Tom_PwmHl_updatePulseOff() : IfxGtm_Tom_PwmHl.c
  • IfxGtm_Tom_PwmHl_updateShiftCenterAligned() : IfxGtm_Tom_PwmHl.c
  • IfxGtm_Tom_setTout() : IfxGtm_Tom.h
  • IfxGtm_Tom_Tgc_buildFeature() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Tgc_buildFeatureForChannel() : IfxGtm_Tom.h , IfxGtm_Tom.c
  • IfxGtm_Tom_Tgc_enableChannel() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Tgc_enableChannelOutput() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Tgc_enableChannels() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Tgc_enableChannelsOutput() : IfxGtm_Tom.h , IfxGtm_Tom.c
  • IfxGtm_Tom_Tgc_enableChannelsTrigger() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Tgc_enableChannelsUpdate() : IfxGtm_Tom.h , IfxGtm_Tom.c
  • IfxGtm_Tom_Tgc_enableChannelUpdate() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Tgc_enableTimeTrigger() : IfxGtm_Tom.h , IfxGtm_Tom.c
  • IfxGtm_Tom_Tgc_resetChannels() : IfxGtm_Tom.h , IfxGtm_Tom.c
  • IfxGtm_Tom_Tgc_setChannelForceUpdate() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Tgc_setChannelsForceUpdate() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Tgc_setTimeTrigger() : IfxGtm_Tom.h , IfxGtm_Tom.c
  • IfxGtm_Tom_Tgc_trigger() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Tgc_writeGlobalControl() : IfxGtm_Tom.h
  • IfxGtm_Tom_Timer_acknowledgeTimerIrq() : IfxGtm_Tom_Timer.h , IfxGtm_Tom_Timer.c
  • IfxGtm_Tom_Timer_acknowledgeTriggerIrq() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_addToChannelMask() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_applyUpdate() : IfxGtm_Tom_Timer.h , IfxGtm_Tom_Timer.c
  • IfxGtm_Tom_Timer_disableUpdate() : IfxGtm_Tom_Timer.h , IfxGtm_Tom_Timer.c
  • IfxGtm_Tom_Timer_getFrequency() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_getInputFrequency() : IfxGtm_Tom_Timer.h , IfxGtm_Tom_Timer.c
  • IfxGtm_Tom_Timer_getOffset() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_getPeriod() : IfxGtm_Tom_Timer.h , IfxGtm_Tom_Timer.c
  • IfxGtm_Tom_Timer_getPointer() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_getResolution() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_getTrigger() : IfxGtm_Tom_Timer.h , IfxGtm_Tom_Timer.c
  • IfxGtm_Tom_Timer_getTriggerPointer() : IfxGtm_Tom_Timer.h , IfxGtm_Tom_Timer.c
  • IfxGtm_Tom_Timer_init() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_initConfig() : IfxGtm_Tom_Timer.h , IfxGtm_Tom_Timer.c
  • IfxGtm_Tom_Timer_run() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_setFrequency() : IfxGtm_Tom_Timer.h , IfxGtm_Tom_Timer.c
  • IfxGtm_Tom_Timer_setPeriod() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_setSingleMode() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_setTrigger() : IfxGtm_Tom_Timer.h , IfxGtm_Tom_Timer.c
  • IfxGtm_Tom_Timer_stdIfTimerInit() : IfxGtm_Tom_Timer.h , IfxGtm_Tom_Timer.c
  • IfxGtm_Tom_Timer_stop() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_updateInputFrequency() : IfxGtm_Tom_Timer.h , IfxGtm_Tom_Timer.c
  • IfxGtm_Trig_fromEdsadc() : IfxGtm_Trig.c , IfxGtm_Trig.h
  • IfxGtm_Trig_fromMsc() : IfxGtm_Trig.h , IfxGtm_Trig.c
  • IfxGtm_Trig_toCan() : IfxGtm_Trig.c , IfxGtm_Trig.h
  • IfxGtm_Trig_toEdsadc() : IfxGtm_Trig.c , IfxGtm_Trig.h
  • IfxGtm_Trig_toEVadc() : IfxGtm_Trig.h , IfxGtm_Trig.c
  • IfxGtm_Trig_toEVadcClear() : IfxGtm_Trig.h , IfxGtm_Trig.c
  • IfxGtm_Trig_toMsc() : IfxGtm_Trig.c , IfxGtm_Trig.h
  • IfxGtm_Trig_toPsi5() : IfxGtm_Trig.h , IfxGtm_Trig.c
  • IfxGtm_Trig_toPsi5s() : IfxGtm_Trig.c , IfxGtm_Trig.h
  • IfxGtm_Trig_toSent() : IfxGtm_Trig.h , IfxGtm_Trig.c
  • IfxHssl_clearHsctInterruptFlag() : IfxHssl.h
  • IfxHssl_clearHsslChannelErrorInterruptFlag() : IfxHssl.h
  • IfxHssl_clearHsslGlobalErrorInterruptFlag() : IfxHssl.h
  • IfxHssl_clearInitialiseModeFlag() : IfxHssl.h
  • IfxHssl_disableHsctInterruptFlag() : IfxHssl.h
  • IfxHssl_disableHsctModule() : IfxHssl.c , IfxHssl.h
  • IfxHssl_disableHsctReceivePath() : IfxHssl.h
  • IfxHssl_disableHsctTransmitPath() : IfxHssl.h
  • IfxHssl_disableHsslChannelErrorInterruptFlag() : IfxHssl.h
  • IfxHssl_disableHsslGlobalErrorInterruptFlag() : IfxHssl.h
  • IfxHssl_disableHsslModule() : IfxHssl.c , IfxHssl.h
  • IfxHssl_enableAllErrorFlags() : IfxHssl.h
  • IfxHssl_enableHsctInterrupt() : IfxHssl.h
  • IfxHssl_enableHsctInterruptFlag() : IfxHssl.h
  • IfxHssl_enableHsctLvdsLoopback() : IfxHssl.h
  • IfxHssl_enableHsctModule() : IfxHssl.h , IfxHssl.c
  • IfxHssl_enableHsctReceivePath() : IfxHssl.h
  • IfxHssl_enableHsctTransmitPath() : IfxHssl.h
  • IfxHssl_enableHsslChannelErrorInterruptFlag() : IfxHssl.h
  • IfxHssl_enableHsslCOKInterrupt() : IfxHssl.h
  • IfxHssl_enableHsslERRInterrupt() : IfxHssl.h
  • IfxHssl_enableHsslEXIInterrupt() : IfxHssl.h
  • IfxHssl_enableHsslGlobalErrorInterruptFlag() : IfxHssl.h
  • IfxHssl_enableHsslModule() : IfxHssl.h , IfxHssl.c
  • IfxHssl_enableHsslRDIInterrupt() : IfxHssl.h
  • IfxHssl_enableHsslTRGInterrupt() : IfxHssl.h
  • IfxHssl_getAllMflagsStatus() : IfxHssl.h
  • IfxHssl_getCurrentCount() : IfxHssl.h
  • IfxHssl_getHsctAddress() : IfxHssl.c , IfxHssl.h
  • IfxHssl_getHsctIndex() : IfxHssl.c , IfxHssl.h
  • IfxHssl_getHsctInterruptFlagStatus() : IfxHssl.h
  • IfxHssl_getHsctSrcPointer() : IfxHssl.c , IfxHssl.h
  • IfxHssl_getHsctUnsolicitedStatusMessage() : IfxHssl.h
  • IfxHssl_getHsslAddress() : IfxHssl.c , IfxHssl.h
  • IfxHssl_getHsslChannelErrorInterruptFlagStatus() : IfxHssl.h
  • IfxHssl_getHsslCOKSrcPointer() : IfxHssl.c , IfxHssl.h
  • IfxHssl_getHsslERRSrcPointer() : IfxHssl.h , IfxHssl.c
  • IfxHssl_getHsslEXISrcPointer() : IfxHssl.c , IfxHssl.h
  • IfxHssl_getHsslGloabalErrorInterruptFlagStatus() : IfxHssl.h
  • IfxHssl_getHsslIndex() : IfxHssl.c , IfxHssl.h
  • IfxHssl_getHsslRDISrcPointer() : IfxHssl.h , IfxHssl.c
  • IfxHssl_getHsslTRGSrcPointer() : IfxHssl.h , IfxHssl.c
  • IfxHssl_getInitialiseModeFlagStatus() : IfxHssl.h
  • IfxHssl_getReloadCount() : IfxHssl.h
  • IfxHssl_Hssl_checkErrors() : IfxHssl_Hssl.h , IfxHssl_Hssl.c
  • IfxHssl_Hssl_clearErrorFlags() : IfxHssl_Hssl.c , IfxHssl_Hssl.h
  • IfxHssl_Hssl_delay() : IfxHssl_Hssl.h , IfxHssl_Hssl.c
  • IfxHssl_Hssl_getReadData() : IfxHssl_Hssl.h
  • IfxHssl_Hssl_initChannel() : IfxHssl_Hssl.h , IfxHssl_Hssl.c
  • IfxHssl_Hssl_initChannelConfig() : IfxHssl_Hssl.c , IfxHssl_Hssl.h
  • IfxHssl_Hssl_initHsctModule() : IfxHssl_Hssl.c , IfxHssl_Hssl.h
  • IfxHssl_Hssl_initHsctModuleConfig() : IfxHssl_Hssl.h , IfxHssl_Hssl.c
  • IfxHssl_Hssl_initHsslModule() : IfxHssl_Hssl.h , IfxHssl_Hssl.c
  • IfxHssl_Hssl_initHsslModuleConfig() : IfxHssl_Hssl.c , IfxHssl_Hssl.h
  • IfxHssl_Hssl_prepareStream() : IfxHssl_Hssl.h , IfxHssl_Hssl.c
  • IfxHssl_Hssl_read() : IfxHssl_Hssl.c , IfxHssl_Hssl.h
  • IfxHssl_Hssl_sendControlCommand() : IfxHssl_Hssl.h , IfxHssl_Hssl.c
  • IfxHssl_Hssl_singleFrameRequest() : IfxHssl_Hssl.c , IfxHssl_Hssl.h
  • IfxHssl_Hssl_waitAcknowledge() : IfxHssl_Hssl.c , IfxHssl_Hssl.h
  • IfxHssl_Hssl_write() : IfxHssl_Hssl.c , IfxHssl_Hssl.h
  • IfxHssl_Hssl_writeStream() : IfxHssl_Hssl.h , IfxHssl_Hssl.c
  • IfxHssl_isModuleSuspended() : IfxHssl.h
  • IfxHssl_resetHsctKernel() : IfxHssl.c , IfxHssl.h
  • IfxHssl_resetHsslKernel() : IfxHssl.h , IfxHssl.c
  • IfxHssl_sendHsctUnsolicitedStatusMessage() : IfxHssl.h
  • IfxHssl_setHsctRxLinkSpeed() : IfxHssl.h
  • IfxHssl_setHsctSleepMode() : IfxHssl.h
  • IfxHssl_setHsctTxLinkSpeed() : IfxHssl.h
  • IfxHssl_setHsslSleepMode() : IfxHssl.h
  • IfxHssl_setInitialiseModeFlag() : IfxHssl.h
  • IfxHssl_setReloadCount() : IfxHssl.h
  • IfxHssl_setSuspendMode() : IfxHssl.h
  • IfxHssl_setTimeoutReloadValue() : IfxHssl.h
  • IfxI2c_busIsFree() : IfxI2c.h
  • IfxI2c_clearAllDtrInterruptSources() : IfxI2c.h
  • IfxI2c_clearAllErrorInterruptSources() : IfxI2c.h
  • IfxI2c_clearAllProtocolInterruptSources() : IfxI2c.h
  • IfxI2c_clearDtrInterruptSource() : IfxI2c.h
  • IfxI2c_clearErrorInterruptSource() : IfxI2c.h
  • IfxI2c_clearProtocolInterruptSource() : IfxI2c.h
  • IfxI2c_clearRequestBuffer() : IfxI2c.h
  • IfxI2c_configureAsMaster() : IfxI2c.h , IfxI2c.c
  • IfxI2c_configureHighSpeedMode() : IfxI2c.h , IfxI2c.c
  • IfxI2c_disableDtrInterruptSource() : IfxI2c.h
  • IfxI2c_disableErrorInterruptFlag() : IfxI2c.h
  • IfxI2c_disableErrorInterruptSource() : IfxI2c.h
  • IfxI2c_disableModule() : IfxI2c.c , IfxI2c.h
  • IfxI2c_disableProtocolInterruptFlag() : IfxI2c.h
  • IfxI2c_disableProtocolInterruptSource() : IfxI2c.h
  • IfxI2c_enableDtrInterrupt() : IfxI2c.h , IfxI2c.c
  • IfxI2c_enableDtrInterruptSource() : IfxI2c.h
  • IfxI2c_enableErrorInterrupt() : IfxI2c.h , IfxI2c.c
  • IfxI2c_enableErrorInterruptFlag() : IfxI2c.h
  • IfxI2c_enableErrorInterruptSource() : IfxI2c.h
  • IfxI2c_enableModule() : IfxI2c.c , IfxI2c.h
  • IfxI2c_enableProtocolInterrupt() : IfxI2c.c , IfxI2c.h
  • IfxI2c_enableProtocolInterruptFlag() : IfxI2c.h
  • IfxI2c_enableProtocolInterruptSource() : IfxI2c.h
  • IfxI2c_getAddress() : IfxI2c.c , IfxI2c.h
  • IfxI2c_getBaudrate() : IfxI2c.c , IfxI2c.h
  • IfxI2c_getBusStatus() : IfxI2c.h
  • IfxI2c_getDtrinterruptSourceStatus() : IfxI2c.h
  • IfxI2c_getDtrSrcPointer() : IfxI2c.h
  • IfxI2c_getErrorInterruptFlagStatus() : IfxI2c.h
  • IfxI2c_getErrorInterruptSourceStatus() : IfxI2c.h
  • IfxI2c_getErrorSrcPointer() : IfxI2c.h
  • IfxI2c_getIndex() : IfxI2c.c , IfxI2c.h
  • IfxI2c_getProtocolInterruptFlagStatus() : IfxI2c.h
  • IfxI2c_getProtocolInterruptSourceStatus() : IfxI2c.h
  • IfxI2c_getProtocolSrcPointer() : IfxI2c.h
  • IfxI2c_I2c_getBaudrate() : IfxI2c_I2c.c , IfxI2c_I2c.h
  • IfxI2c_I2c_initConfig() : IfxI2c_I2c.h , IfxI2c_I2c.c
  • IfxI2c_I2c_initDevice() : IfxI2c_I2c.h , IfxI2c_I2c.c
  • IfxI2c_I2c_initDeviceConfig() : IfxI2c_I2c.h , IfxI2c_I2c.c
  • IfxI2c_I2c_initModule() : IfxI2c_I2c.c , IfxI2c_I2c.h
  • IfxI2c_I2c_read() : IfxI2c_I2c.c , IfxI2c_I2c.h
  • IfxI2c_I2c_write() : IfxI2c_I2c.h , IfxI2c_I2c.c
  • IfxI2c_initSclSdaPin() : IfxI2c.h , IfxI2c.c
  • IfxI2c_isFifoRequest() : IfxI2c.h
  • IfxI2c_releaseBus() : IfxI2c.c , IfxI2c.h
  • IfxI2c_resetFifo() : IfxI2c.c , IfxI2c.h
  • IfxI2c_resetModule() : IfxI2c.c , IfxI2c.h
  • IfxI2c_run() : IfxI2c.h
  • IfxI2c_setBaudrate() : IfxI2c.c , IfxI2c.h
  • IfxI2c_setBitAddressMode() : IfxI2c.h
  • IfxI2c_setPinSelection() : IfxI2c.h
  • IfxI2c_setReceivePacketSize() : IfxI2c.h
  • IfxI2c_setSlaveDeviceAddress() : IfxI2c.h
  • IfxI2c_setSleepMode() : IfxI2c.h
  • IfxI2c_setTransmitPacketSize() : IfxI2c.h
  • IfxI2c_stop() : IfxI2c.h
  • IfxI2c_waitBusFree() : IfxI2c.h
  • IfxI2c_writeFifo() : IfxI2c.h
  • IfxIom_disableModule() : IfxIom.h
  • IfxIom_Driver_clearAllGlitch() : IfxIom_Driver.h , IfxIom_Driver.c
  • IfxIom_Driver_clearHistory() : IfxIom_Driver.h , IfxIom_Driver.c
  • IfxIom_Driver_clearLamMonGlitch() : IfxIom_Driver.c , IfxIom_Driver.h
  • IfxIom_Driver_clearLamRefGlitch() : IfxIom_Driver.c , IfxIom_Driver.h
  • IfxIom_Driver_disableEvents() : IfxIom_Driver.h , IfxIom_Driver.c
  • IfxIom_Driver_disableLamEvent() : IfxIom_Driver.h , IfxIom_Driver.c
  • IfxIom_Driver_enableLamEvent() : IfxIom_Driver.h , IfxIom_Driver.c
  • IfxIom_Driver_getHistory() : IfxIom_Driver.h , IfxIom_Driver.c
  • IfxIom_Driver_init() : IfxIom_Driver.h , IfxIom_Driver.c
  • IfxIom_Driver_initConfig() : IfxIom_Driver.h , IfxIom_Driver.c
  • IfxIom_Driver_initLam() : IfxIom_Driver.c , IfxIom_Driver.h
  • IfxIom_Driver_initLamConfig() : IfxIom_Driver.c , IfxIom_Driver.h
  • IfxIom_Driver_isLamMonGlitch() : IfxIom_Driver.h , IfxIom_Driver.c
  • IfxIom_Driver_isLamRefGlitch() : IfxIom_Driver.h , IfxIom_Driver.c
  • IfxIom_Driver_restoreEvents() : IfxIom_Driver.c , IfxIom_Driver.h
  • IfxIom_enableModule() : IfxIom.h
  • IfxIom_eventTriggerHistory() : IfxIom.h
  • IfxIom_getFrequency() : IfxIom.h , IfxIom.c
  • IfxIom_Iom_clearFpcEdges() : IfxIom_Iom.h , IfxIom_Iom.c
  • IfxIom_Iom_deInitModule() : IfxIom_Iom.c , IfxIom_Iom.h
  • IfxIom_Iom_initAnalyser() : IfxIom_Iom.c , IfxIom_Iom.h
  • IfxIom_Iom_initAnalyserConfig() : IfxIom_Iom.h , IfxIom_Iom.c
  • IfxIom_Iom_initCombiner() : IfxIom_Iom.h , IfxIom_Iom.c
  • IfxIom_Iom_initCombinerConfig() : IfxIom_Iom.h , IfxIom_Iom.c
  • IfxIom_Iom_initFpcChannel() : IfxIom_Iom.h , IfxIom_Iom.c
  • IfxIom_Iom_initFpcChannelConfig() : IfxIom_Iom.h , IfxIom_Iom.c
  • IfxIom_Iom_initModule() : IfxIom_Iom.h , IfxIom_Iom.c
  • IfxIom_Iom_initModuleConfig() : IfxIom_Iom.c , IfxIom_Iom.h
  • IfxIom_resetModule() : IfxIom.c , IfxIom.h
  • IfxIom_setSleepMode() : IfxIom.h
  • IfxIom_setTimerValueOfFilterAndPrescalerCell() : IfxIom.h
  • IfxMsc_clearAbraOverflowFlag() : IfxMsc.h
  • IfxMsc_clearAbraUnderflowFlag() : IfxMsc.h
  • IfxMsc_clearDataFrameInterruptFlag() : IfxMsc.c , IfxMsc.h
  • IfxMsc_clearRecieveDataInterruptFlag() : IfxMsc.h
  • IfxMsc_clearReset() : IfxMsc.c , IfxMsc.h
  • IfxMsc_clearUpstreamTimeout() : IfxMsc.h
  • IfxMsc_clearUpstreamValidFlag() : IfxMsc.h
  • IfxMsc_clearValidbit() : IfxMsc.h
  • IfxMsc_disableModule() : IfxMsc.c , IfxMsc.h
  • IfxMsc_disableUpstreamTimeoutInterrupt() : IfxMsc.h
  • IfxMsc_downstreamAbraBaudCalculator() : IfxMsc.c , IfxMsc.h
  • IfxMsc_downstreamFractionalBaudCalculator() : IfxMsc.c , IfxMsc.h
  • IfxMsc_downstreamNormalBaudCalculator() : IfxMsc.h , IfxMsc.c
  • IfxMsc_enableModule() : IfxMsc.c , IfxMsc.h
  • IfxMsc_enableUpstreamTimeoutInterrupt() : IfxMsc.h
  • IfxMsc_getActiveDataFrameStatus() : IfxMsc.h , IfxMsc.c
  • IfxMsc_getAddress() : IfxMsc.h , IfxMsc.c
  • IfxMsc_getAsyncClockBypass() : IfxMsc.h
  • IfxMsc_getData() : IfxMsc.h
  • IfxMsc_getDataFrameInterruptFlag() : IfxMsc.c , IfxMsc.h
  • IfxMsc_getDataHighTarget() : IfxMsc.h
  • IfxMsc_getDataLowTarget() : IfxMsc.h
  • IfxMsc_getDownstreamAbraBaudrate() : IfxMsc.h , IfxMsc.c
  • IfxMsc_getDownstreamAbraDisabledBaudrate() : IfxMsc.c , IfxMsc.h
  • IfxMsc_getDownstreamBaudrate() : IfxMsc.h , IfxMsc.c
  • IfxMsc_getDownStreamExtension() : IfxMsc.h
  • IfxMsc_getIndex() : IfxMsc.c , IfxMsc.h
  • IfxMsc_getRecieveDataInterruptFlag() : IfxMsc.h
  • IfxMsc_getSrcPointer() : IfxMsc.h
  • IfxMsc_getUpstreamData() : IfxMsc.h
  • IfxMsc_getUpstreamParityErrorFlag() : IfxMsc.h
  • IfxMsc_getUpstreamTimeoutFlag() : IfxMsc.h
  • IfxMsc_getUpstreamValidFlag() : IfxMsc.h
  • IfxMsc_hasAbraOverflowErrorOccured() : IfxMsc.h
  • IfxMsc_hasAbraUnderflowErrorOccured() : IfxMsc.h
  • IfxMsc_initEnPin() : IfxMsc.h
  • IfxMsc_initFclnPin() : IfxMsc.h
  • IfxMsc_initFclpPin() : IfxMsc.h
  • IfxMsc_initInjPin() : IfxMsc.h
  • IfxMsc_initSdiPin() : IfxMsc.h
  • IfxMsc_initSonPin() : IfxMsc.h
  • IfxMsc_initSopPin() : IfxMsc.h
  • IfxMsc_isModuleSuspended() : IfxMsc.h
  • IfxMsc_manualLoadCxModeCommand() : IfxMsc.c , IfxMsc.h
  • IfxMsc_Msc_clearDataFrameInterrupt() : IfxMsc_Msc.h
  • IfxMsc_Msc_deInitModule() : IfxMsc_Msc.c , IfxMsc_Msc.h
  • IfxMsc_Msc_getActiveDataFrameStatus() : IfxMsc_Msc.h
  • IfxMsc_Msc_getDataFrameInterruptStatus() : IfxMsc_Msc.h
  • IfxMsc_Msc_getTarget() : IfxMsc_Msc.h , IfxMsc_Msc.c
  • IfxMsc_Msc_initializeAbra() : IfxMsc_Msc.c , IfxMsc_Msc.h
  • IfxMsc_Msc_initializeCommandExtension() : IfxMsc_Msc.h , IfxMsc_Msc.c
  • IfxMsc_Msc_initializeDataExtension() : IfxMsc_Msc.h , IfxMsc_Msc.c
  • IfxMsc_Msc_initModule() : IfxMsc_Msc.h , IfxMsc_Msc.c
  • IfxMsc_Msc_initModuleConfig() : IfxMsc_Msc.c , IfxMsc_Msc.h
  • IfxMsc_Msc_receiveData() : IfxMsc_Msc.c , IfxMsc_Msc.h
  • IfxMsc_Msc_sendCommand() : IfxMsc_Msc.h , IfxMsc_Msc.c
  • IfxMsc_Msc_sendData() : IfxMsc_Msc.h , IfxMsc_Msc.c
  • IfxMsc_Msc_sendDataExtension() : IfxMsc_Msc.h , IfxMsc_Msc.c
  • IfxMsc_Msc_sendDataHigh() : IfxMsc_Msc.c , IfxMsc_Msc.h
  • IfxMsc_Msc_sendDataLow() : IfxMsc_Msc.h , IfxMsc_Msc.c
  • IfxMsc_Msc_setCommandTarget() : IfxMsc_Msc.h , IfxMsc_Msc.c
  • IfxMsc_Msc_setDataTarget() : IfxMsc_Msc.h , IfxMsc_Msc.c
  • IfxMsc_resetModule() : IfxMsc.c , IfxMsc.h
  • IfxMsc_setAbraOverflowFlag() : IfxMsc.h
  • IfxMsc_setAbraUnderflowFlag() : IfxMsc.h
  • IfxMsc_setAsyncClockBypass() : IfxMsc.h
  • IfxMsc_setCommandTarget() : IfxMsc.h
  • IfxMsc_setDataHighTarget() : IfxMsc.h
  • IfxMsc_setDataLowTarget() : IfxMsc.h
  • IfxMsc_setDownStreamData() : IfxMsc.h
  • IfxMsc_setDownStreamExtension() : IfxMsc.h
  • IfxMsc_setDownStreamExtensionData() : IfxMsc.h
  • IfxMsc_setFastMode() : IfxMsc.h
  • IfxMsc_setFractionalDividerStep() : IfxMsc.h
  • IfxMsc_setNdividerDownstream() : IfxMsc.h
  • IfxMsc_setResetCommandExtensionMode() : IfxMsc.h
  • IfxMsc_setSerialDataInputSelect() : IfxMsc.h
  • IfxMsc_setSleepMode() : IfxMsc.h
  • IfxMsc_setSuspendMode() : IfxMsc.h
  • IfxMsc_setTransmissionMode() : IfxMsc.h
  • IfxMsc_setUpstreamChannelRecieveRate() : IfxMsc.h
  • IfxMsc_setUpstreamTimeout() : IfxMsc.h
  • IfxMsc_setUpstreamTimeoutPrescalar() : IfxMsc.h
  • IfxMsc_upstreamFractionalBaudCalculator() : IfxMsc.h , IfxMsc.c
  • IfxMsc_upstreamNormalBaudCalculator() : IfxMsc.h , IfxMsc.c
  • IfxMtu_checkErrorFlags() : IfxMtu.h
  • IfxMtu_clearErrorTracking() : IfxMtu.c , IfxMtu.h
  • IfxMtu_clearSram() : IfxMtu.c , IfxMtu.h
  • IfxMtu_clearSramContinue() : IfxMtu.c , IfxMtu.h
  • IfxMtu_clearSramStart() : IfxMtu.h , IfxMtu.c
  • IfxMtu_disableErrorReporting() : IfxMtu.h
  • IfxMtu_disableMbistShell() : IfxMtu.h
  • IfxMtu_enableErrorReporting() : IfxMtu.h
  • IfxMtu_enableErrorTracking() : IfxMtu.c , IfxMtu.h
  • IfxMtu_enableMbistShell() : IfxMtu.h
  • IfxMtu_enableModule() : IfxMtu.h
  • IfxMtu_getMemDoneRegisterIndex() : IfxMtu.h
  • IfxMtu_getSystemAddress() : IfxMtu.c , IfxMtu.h
  • IfxMtu_getTrackedSramAddresses() : IfxMtu.c , IfxMtu.h
  • IfxMtu_isAutoInitRunning() : IfxMtu.h
  • IfxMtu_isErrorTrackingEnabled() : IfxMtu.h
  • IfxMtu_isErrorTrackingOverflow() : IfxMtu.h
  • IfxMtu_isMbistDone() : IfxMtu.h
  • IfxMtu_isModuleEnabled() : IfxMtu.h
  • IfxMtu_isTestPass() : IfxMtu.h , IfxMtu.c
  • IfxMtu_readSramAddress() : IfxMtu.h , IfxMtu.c
  • IfxMtu_runCheckerBoardTest() : IfxMtu.h , IfxMtu.c
  • IfxMtu_runMarchUTest() : IfxMtu.h , IfxMtu.c
  • IfxMtu_runMbist() : IfxMtu.h , IfxMtu.c
  • IfxMtu_runMbistAll() : IfxMtu.h , IfxMtu.c
  • IfxMtu_runMbistClearRam() : IfxMtu.c
  • IfxMtu_runMbistConfigMtest() : IfxMtu.c
  • IfxMtu_runMbistConfigPatterns() : IfxMtu.c
  • IfxMtu_runMbistConfigRange() : IfxMtu.c
  • IfxMtu_runMbistEnd() : IfxMtu.c
  • IfxMtu_runNonDestructiveInversionTest() : IfxMtu.c , IfxMtu.h
  • IfxMtu_writeSramAddress() : IfxMtu.h , IfxMtu.c
  • IfxPmsEvr_areInitValuesRight() : IfxPmsEvr.h
  • IfxPmsEvr_configureBlankingFilterDelay() : IfxPmsEvr.h
  • IfxPmsEvr_disableInterrupt() : IfxPmsEvr.h
  • IfxPmsEvr_enableDcdcSynchronisation() : IfxPmsEvr.h
  • IfxPmsEvr_enableInterrupts() : IfxPmsEvr.h
  • IfxPmsEvr_enableWakeupOnVextSupplyRampUp() : IfxPmsEvr.h
  • IfxPmsEvr_evr33ResetTriggerSignalConfig() : IfxPmsEvr.h
  • IfxPmsEvr_evrcResetTriggerSignalConfig() : IfxPmsEvr.h
  • IfxPmsEvr_filterSecondaryConversionResult() : IfxPmsEvr.c , IfxPmsEvr.h
  • IfxPmsEvr_fineTrimEvrClock() : IfxPmsEvr.h
  • IfxPmsEvr_getAdcVddp3Result() : IfxPmsEvr.h
  • IfxPmsEvr_getAdcVddResult() : IfxPmsEvr.h
  • IfxPmsEvr_getAdcVextResult() : IfxPmsEvr.h
  • IfxPmsEvr_getEvrcMode() : IfxPmsEvr.h
  • IfxPmsEvr_getEvrcVoltageRegulator() : IfxPmsEvr.h
  • IfxPmsEvr_getPrimaryAdcEvr33Result() : IfxPmsEvr.h
  • IfxPmsEvr_getPrimaryAdcEvrcResult() : IfxPmsEvr.h
  • IfxPmsEvr_getPrimaryAdcSwdResult() : IfxPmsEvr.h
  • IfxPmsEvr_getSecondaryAdcResult() : IfxPmsEvr.c , IfxPmsEvr.h
  • IfxPmsEvr_runInitSequence() : IfxPmsEvr.h
  • IfxPmsEvr_setEvr33PrimaryAdcTrimValue() : IfxPmsEvr.h
  • IfxPmsEvr_setEvr33VoltageOutputlevel() : IfxPmsEvr.h
  • IfxPmsEvr_setFrequencySpreadThreshold() : IfxPmsEvr.h
  • IfxPmsEvr_setNmosLevel() : IfxPmsEvr.h
  • IfxPmsEvr_setOverVoltageMonitoringMode() : IfxPmsEvr.h
  • IfxPmsEvr_setPmosLevel() : IfxPmsEvr.h
  • IfxPmsEvr_setRegulatorSwitchingFrequency() : IfxPmsEvr.h
  • IfxPmsEvr_setResetTrimValueMv() : IfxPmsEvr.h
  • IfxPmsEvr_setSdRegulatorOutputLevel() : IfxPmsEvr.h
  • IfxPmsEvr_setSdRegulatorPrimaryAdcTrimValue() : IfxPmsEvr.h
  • IfxPmsEvr_setSecondaryOverVoltageThresholdMv() : IfxPmsEvr.h , IfxPmsEvr.c
  • IfxPmsEvr_setSecondaryUnderVoltageThresholdMv() : IfxPmsEvr.h , IfxPmsEvr.c
  • IfxPmsEvr_setStandbyRamSupply() : IfxPmsEvr.h
  • IfxPmsEvr_setSwitchingFreqDivFactorForExternalsync() : IfxPmsEvr.h
  • IfxPmsEvr_setUnderVoltageMonitoringMode() : IfxPmsEvr.h
  • IfxPmsEvr_signedFineTrimEvrClock() : IfxPmsEvr.h
  • IfxPmsEvr_swdResetTriggerSignalConfig() : IfxPmsEvr.h
  • IfxPmsEvr_wait() : IfxPmsEvr.h
  • IfxPmsPm_clearLoadJumpTimer() : IfxPmsPm.h
  • IfxPmsPm_clearLoadJumpTimerOverflowFlag() : IfxPmsPm.h
  • IfxPmsPm_clearVoltageDroopTimer() : IfxPmsPm.h
  • IfxPmsPm_clearVoltageDroopTimerOverflowFlag() : IfxPmsPm.h
  • IfxPmsPm_configureSupplyMonitoring() : IfxPmsPm.h , IfxPmsPm.c
  • IfxPmsPm_configureWakeup() : IfxPmsPm.h , IfxPmsPm.c
  • IfxPmsPm_continueSleepSequenceInRAM() : IfxPmsPm.h , IfxPmsPm.c
  • IfxPmsPm_continueStandbySequenceInRAM() : IfxPmsPm.c , IfxPmsPm.h
  • IfxPmsPm_disableLoadJumpTimer() : IfxPmsPm.h
  • IfxPmsPm_disableLoadJumpTimerOverflowFlag() : IfxPmsPm.h
  • IfxPmsPm_disableLoadJumpTimerOverflowInterrupt() : IfxPmsPm.h
  • IfxPmsPm_disableVoltageDroopTimer() : IfxPmsPm.h
  • IfxPmsPm_disableVoltageDroopTimerOverflowFlag() : IfxPmsPm.h
  • IfxPmsPm_disableVoltageDroopTimerOverflowInterrupt() : IfxPmsPm.h
  • IfxPmsPm_enableLoadJumpTimer() : IfxPmsPm.h
  • IfxPmsPm_enableLoadJumpTimerOverflowFlag() : IfxPmsPm.h
  • IfxPmsPm_enableLoadJumpTimerOverflowInterrupt() : IfxPmsPm.h
  • IfxPmsPm_enableVoltageDroopTimer() : IfxPmsPm.h
  • IfxPmsPm_enableVoltageDroopTimerOverflowFlag() : IfxPmsPm.h
  • IfxPmsPm_enableVoltageDroopTimerOverflowInterrupt() : IfxPmsPm.h
  • IfxPmsPm_enableWakeup() : IfxPmsPm.h , IfxPmsPm.c
  • IfxPmsPm_getLoadJumpStatus() : IfxPmsPm.h
  • IfxPmsPm_getLoadJumpTimerCompareValue() : IfxPmsPm.h
  • IfxPmsPm_getLoadJumpTimerCountValue() : IfxPmsPm.h
  • IfxPmsPm_getMasterCpu() : IfxPmsPm.h
  • IfxPmsPm_getVoltageDroopStatus() : IfxPmsPm.h
  • IfxPmsPm_getVoltageDroopTimerCompareValue() : IfxPmsPm.h
  • IfxPmsPm_handleStandbyRam() : IfxPmsPm.c , IfxPmsPm.h
  • IfxPmsPm_hasLoadJumpTimerOverflowOccured() : IfxPmsPm.h
  • IfxPmsPm_hasVoltageDroopTimerOverflowOccured() : IfxPmsPm.h
  • IfxPmsPm_initAndRequestLoadJump() : IfxPmsPm.h , IfxPmsPm.c
  • IfxPmsPm_initAndRequestVoltageDroop() : IfxPmsPm.c , IfxPmsPm.h
  • IfxPmsPm_initiateWakeup() : IfxPmsPm.h , IfxPmsPm.c
  • IfxPmsPm_initLoadJumpConfig() : IfxPmsPm.h , IfxPmsPm.c
  • IfxPmsPm_initSleepConfig() : IfxPmsPm.h , IfxPmsPm.c
  • IfxPmsPm_initStandbyConfig() : IfxPmsPm.h , IfxPmsPm.c
  • IfxPmsPm_initVoltageDroopConfig() : IfxPmsPm.h , IfxPmsPm.c
  • IfxPmsPm_readVoltageDroopTimerCountValue() : IfxPmsPm.h
  • IfxPmsPm_requestLoadJump() : IfxPmsPm.h
  • IfxPmsPm_requestVoltageDroop() : IfxPmsPm.h
  • IfxPmsPm_setCoreMode() : IfxPmsPm.c , IfxPmsPm.h
  • IfxPmsPm_setLoadJumpTimerCompareValue() : IfxPmsPm.h
  • IfxPmsPm_setMasterCpu() : IfxPmsPm.h
  • IfxPmsPm_setSleepMode() : IfxPmsPm.h
  • IfxPmsPm_setStandbyMode() : IfxPmsPm.h , IfxPmsPm.c
  • IfxPmsPm_setVoltageDroopStep() : IfxPmsPm.h
  • IfxPmsPm_setVoltageDroopTimerCompareValue() : IfxPmsPm.h
  • IfxPmsPm_startLoadJumpTimer() : IfxPmsPm.h
  • IfxPmsPm_startSleepSequenceinFlash() : IfxPmsPm.h , IfxPmsPm.c
  • IfxPmsPm_startStandbySequenceInFlash() : IfxPmsPm.h , IfxPmsPm.c
  • IfxPmsPm_startVoltageDroopTimer() : IfxPmsPm.h
  • IfxPmsPm_stopLoadJumpTimer() : IfxPmsPm.h
  • IfxPmsPm_stopVoltageDroopTimer() : IfxPmsPm.h
  • IfxPort_disableEmergencyStop() : IfxPort.h , IfxPort.c
  • IfxPort_enableEmergencyStop() : IfxPort.c , IfxPort.h
  • IfxPort_getAddress() : IfxPort.h , IfxPort.c
  • IfxPort_getGroupState() : IfxPort.h
  • IfxPort_getIndex() : IfxPort.c , IfxPort.h
  • IfxPort_getPinState() : IfxPort.h
  • IfxPort_Io_initModule() : IfxPort_Io.c , IfxPort_Io.h
  • IfxPort_modifyPinControllerSelection() : IfxPort.h , IfxPort.c
  • IfxPort_resetESR() : IfxPort.c , IfxPort.h
  • IfxPort_resetPinControllerSelection() : IfxPort.h , IfxPort.c
  • IfxPort_setESR() : IfxPort.h , IfxPort.c
  • IfxPort_setGroupModeInput() : IfxPort.h , IfxPort.c
  • IfxPort_setGroupModeOutput() : IfxPort.c , IfxPort.h
  • IfxPort_setGroupPadDriver() : IfxPort.c , IfxPort.h
  • IfxPort_setGroupState() : IfxPort.h
  • IfxPort_setPinControllerSelection() : IfxPort.h , IfxPort.c
  • IfxPort_setPinFunctionMode() : IfxPort.h
  • IfxPort_setPinHigh() : IfxPort.h
  • IfxPort_setPinLow() : IfxPort.h
  • IfxPort_setPinMode() : IfxPort.h , IfxPort.c
  • IfxPort_setPinModeInput() : IfxPort.h
  • IfxPort_setPinModeLVDS() : IfxPort.h , IfxPort.c
  • IfxPort_setPinModeOutput() : IfxPort.h
  • IfxPort_setPinPadDriver() : IfxPort.c , IfxPort.h
  • IfxPort_setPinState() : IfxPort.h
  • IfxPort_togglePin() : IfxPort.h
  • IfxPsi5_clearAllInterrupt() : IfxPsi5.h
  • IfxPsi5_clearInterrupt() : IfxPsi5.h
  • IfxPsi5_disableModule() : IfxPsi5.c , IfxPsi5.h
  • IfxPsi5_enableAllChannels() : IfxPsi5.h
  • IfxPsi5_enableInterrupt() : IfxPsi5.h , IfxPsi5.c
  • IfxPsi5_enableModule() : IfxPsi5.h , IfxPsi5.c
  • IfxPsi5_getInterruptStatus() : IfxPsi5.h
  • IfxPsi5_getReadFifoPointer() : IfxPsi5.h
  • IfxPsi5_getReceiveDataRegisterLow() : IfxPsi5.h
  • IfxPsi5_getSrcPointer() : IfxPsi5.h
  • IfxPsi5_getStatusCrci() : IfxPsi5.h
  • IfxPsi5_getStatusMei() : IfxPsi5.h
  • IfxPsi5_getStatusNbi() : IfxPsi5.h
  • IfxPsi5_getStatusNfi() : IfxPsi5.h
  • IfxPsi5_getStatusRdi() : IfxPsi5.h
  • IfxPsi5_getStatusRmi() : IfxPsi5.h
  • IfxPsi5_getStatusRsi() : IfxPsi5.h
  • IfxPsi5_getStatusTei() : IfxPsi5.h
  • IfxPsi5_getWriteFifoPointer() : IfxPsi5.h
  • IfxPsi5_initRxPin() : IfxPsi5.h
  • IfxPsi5_initTxPin() : IfxPsi5.h
  • IfxPsi5_isModuleSuspended() : IfxPsi5.h
  • IfxPsi5_Psi5_deInitModule() : IfxPsi5_Psi5.h , IfxPsi5_Psi5.c
  • IfxPsi5_Psi5_enableModule() : IfxPsi5_Psi5.h , IfxPsi5_Psi5.c
  • IfxPsi5_Psi5_getFracDivClock() : IfxPsi5_Psi5.h , IfxPsi5_Psi5.c
  • IfxPsi5_Psi5_initChannel() : IfxPsi5_Psi5.h , IfxPsi5_Psi5.c
  • IfxPsi5_Psi5_initChannelConfig() : IfxPsi5_Psi5.c , IfxPsi5_Psi5.h
  • IfxPsi5_Psi5_initializeClock() : IfxPsi5_Psi5.h , IfxPsi5_Psi5.c
  • IfxPsi5_Psi5_initModule() : IfxPsi5_Psi5.h , IfxPsi5_Psi5.c
  • IfxPsi5_Psi5_initModuleConfig() : IfxPsi5_Psi5.c , IfxPsi5_Psi5.h
  • IfxPsi5_Psi5_readChannelFrame() : IfxPsi5_Psi5.c , IfxPsi5_Psi5.h
  • IfxPsi5_Psi5_readChannelSerialMessage() : IfxPsi5_Psi5.h , IfxPsi5_Psi5.c
  • IfxPsi5_Psi5_resetModule() : IfxPsi5_Psi5.h , IfxPsi5_Psi5.c
  • IfxPsi5_Psi5_sendChannelData() : IfxPsi5_Psi5.c , IfxPsi5_Psi5.h
  • IfxPsi5_Psi5_startupChannel() : IfxPsi5_Psi5.h
  • IfxPsi5_readReceiveFifoData() : IfxPsi5.h
  • IfxPsi5_resetModule() : IfxPsi5.h , IfxPsi5.c
  • IfxPsi5_setFractionalDivider() : IfxPsi5.h
  • IfxPsi5_setInterruptNodePointer() : IfxPsi5.h
  • IfxPsi5_setReceiveFifoWarningLevel() : IfxPsi5.h
  • IfxPsi5_setReceiverControl() : IfxPsi5.h
  • IfxPsi5_setRxInput() : IfxPsi5.h
  • IfxPsi5_setSleepMode() : IfxPsi5.h
  • IfxPsi5_setSuspendMode() : IfxPsi5.h
  • IfxPsi5s_clearGlobalInterruptStatus() : IfxPsi5s.h
  • IfxPsi5s_clearInterruptStatus() : IfxPsi5s.h
  • IfxPsi5s_clearTimeStampCounterA() : IfxPsi5s.h
  • IfxPsi5s_clearTimeStampCounterB() : IfxPsi5s.h
  • IfxPsi5s_disableAscReceiver() : IfxPsi5s.c , IfxPsi5s.h
  • IfxPsi5s_disableModule() : IfxPsi5s.h , IfxPsi5s.c
  • IfxPsi5s_enableAscReceiver() : IfxPsi5s.c , IfxPsi5s.h
  • IfxPsi5s_enableDisableChannels() : IfxPsi5s.h , IfxPsi5s.c
  • IfxPsi5s_enableDisableChannelTriggerCounters() : IfxPsi5s.h , IfxPsi5s.c
  • IfxPsi5s_enableGlobalInterrupt() : IfxPsi5s.h
  • IfxPsi5s_enableInterrupt() : IfxPsi5s.h
  • IfxPsi5s_fillAscTransmitBuffer() : IfxPsi5s.h
  • IfxPsi5s_getBaudrate() : IfxPsi5s.h , IfxPsi5s.c
  • IfxPsi5s_getGlobalInterruptStatus() : IfxPsi5s.h
  • IfxPsi5s_getInterruptStatus() : IfxPsi5s.h
  • IfxPsi5s_getReadFrameStatus() : IfxPsi5s.h , IfxPsi5s.c
  • IfxPsi5s_getReceiveBuffer() : IfxPsi5s.h
  • IfxPsi5s_getReceiveInterruptStatus() : IfxPsi5s.h
  • IfxPsi5s_getSrcAddress() : IfxPsi5s.h , IfxPsi5s.c
  • IfxPsi5s_getSuccessfullyReceivedFrameStatus() : IfxPsi5s.h , IfxPsi5s.c
  • IfxPsi5s_getTransmitInterruptStatus() : IfxPsi5s.h
  • IfxPsi5s_initClkPin() : IfxPsi5s.h
  • IfxPsi5s_initRxPin() : IfxPsi5s.h
  • IfxPsi5s_initTxPin() : IfxPsi5s.h
  • IfxPsi5s_isModuleSuspended() : IfxPsi5s.h
  • IfxPsi5s_Psi5s_deInitModule() : IfxPsi5s_Psi5s.c , IfxPsi5s_Psi5s.h
  • IfxPsi5s_Psi5s_enableAscReceiver() : IfxPsi5s_Psi5s.h
  • IfxPsi5s_Psi5s_enableDisableChannels() : IfxPsi5s_Psi5s.h
  • IfxPsi5s_Psi5s_enableDisableChannelTriggerCounters() : IfxPsi5s_Psi5s.h
  • IfxPsi5s_Psi5s_enableModule() : IfxPsi5s_Psi5s.c , IfxPsi5s_Psi5s.h
  • IfxPsi5s_Psi5s_getBaudrate() : IfxPsi5s_Psi5s.h , IfxPsi5s_Psi5s.c
  • IfxPsi5s_Psi5s_getFracDivClock() : IfxPsi5s_Psi5s.c
  • IfxPsi5s_Psi5s_getReadFrameStatus() : IfxPsi5s_Psi5s.h
  • IfxPsi5s_Psi5s_initChannel() : IfxPsi5s_Psi5s.c , IfxPsi5s_Psi5s.h
  • IfxPsi5s_Psi5s_initChannelConfig() : IfxPsi5s_Psi5s.h , IfxPsi5s_Psi5s.c
  • IfxPsi5s_Psi5s_initializeClock() : IfxPsi5s_Psi5s.c
  • IfxPsi5s_Psi5s_initModule() : IfxPsi5s_Psi5s.c , IfxPsi5s_Psi5s.h
  • IfxPsi5s_Psi5s_initModuleConfig() : IfxPsi5s_Psi5s.c , IfxPsi5s_Psi5s.h
  • IfxPsi5s_Psi5s_readFrame() : IfxPsi5s_Psi5s.h , IfxPsi5s_Psi5s.c
  • IfxPsi5s_Psi5s_resetModule() : IfxPsi5s_Psi5s.c , IfxPsi5s_Psi5s.h
  • IfxPsi5s_Psi5s_sendChannelData() : IfxPsi5s_Psi5s.h , IfxPsi5s_Psi5s.c
  • IfxPsi5s_Psi5s_setBaudrate() : IfxPsi5s_Psi5s.c
  • IfxPsi5s_Psi5s_startAscTransactions() : IfxPsi5s_Psi5s.h
  • IfxPsi5s_resetModule() : IfxPsi5s.h , IfxPsi5s.c
  • IfxPsi5s_setGlobalInterruptNodePointer() : IfxPsi5s.h
  • IfxPsi5s_setInterruptNodePointer() : IfxPsi5s.h
  • IfxPsi5s_setLoopBackMode() : IfxPsi5s.h
  • IfxPsi5s_setRxInput() : IfxPsi5s.h
  • IfxPsi5s_setSleepMode() : IfxPsi5s.h
  • IfxPsi5s_setSuspendMode() : IfxPsi5s.h
  • IfxPsi5s_setTimeStampCounterA() : IfxPsi5s.h
  • IfxPsi5s_setTimeStampCounterB() : IfxPsi5s.h
  • IfxPsi5s_startAscTransactions() : IfxPsi5s.c , IfxPsi5s.h
  • IfxPsi5s_stopAscTransactions() : IfxPsi5s.h , IfxPsi5s.c
  • IfxQspi_calcRealBaudrate() : IfxQspi.c , IfxQspi.h
  • IfxQspi_calculateBasicConfigurationValue() : IfxQspi.c , IfxQspi.h
  • IfxQspi_calculateDelayConstants() : IfxQspi.c , IfxQspi.h
  • IfxQspi_calculateExtendedConfigurationValue() : IfxQspi.c , IfxQspi.h
  • IfxQspi_calculatePrescaler() : IfxQspi.c , IfxQspi.h
  • IfxQspi_calculateTimeQuantumLength() : IfxQspi.h , IfxQspi.c
  • IfxQspi_clearAllEventFlags() : IfxQspi.h
  • IfxQspi_clearMoveCounterInterruptAfterLastFlag() : IfxQspi.h
  • IfxQspi_clearMoveCounterInterruptBeforeLastFlag() : IfxQspi.h
  • IfxQspi_clearRxReq() : IfxQspi.h
  • IfxQspi_clearTxReq() : IfxQspi.h
  • IfxQspi_configPT1Event() : IfxQspi.h
  • IfxQspi_configPT2Event() : IfxQspi.h
  • IfxQspi_enableLoopbackMode() : IfxQspi.h
  • IfxQspi_enablePT1Event() : IfxQspi.h
  • IfxQspi_enablePT2Event() : IfxQspi.h
  • IfxQspi_enableUsrEvent() : IfxQspi.h
  • IfxQspi_getAddress() : IfxQspi.c , IfxQspi.h
  • IfxQspi_getErrorFlags() : IfxQspi.h
  • IfxQspi_getErrorSrc() : IfxQspi.h
  • IfxQspi_getIndex() : IfxQspi.h , IfxQspi.c
  • IfxQspi_getMode() : IfxQspi.h
  • IfxQspi_getModuleFrequency() : IfxQspi.h
  • IfxQspi_getPhase() : IfxQspi.h
  • IfxQspi_getReceiveFifoLevel() : IfxQspi.h
  • IfxQspi_getReceiveSrc() : IfxQspi.h
  • IfxQspi_getRxFifoMode() : IfxQspi.h
  • IfxQspi_getTimeQuantaFrequency() : IfxQspi.h
  • IfxQspi_getTransmitFifoLevel() : IfxQspi.h
  • IfxQspi_getTransmitSrc() : IfxQspi.h
  • IfxQspi_getTxFifoMode() : IfxQspi.h
  • IfxQspi_initMrstInPin() : IfxQspi.h
  • IfxQspi_initMrstInPinWithPadLevel() : IfxQspi.h
  • IfxQspi_initMrstOutPin() : IfxQspi.h
  • IfxQspi_initMtsrInPin() : IfxQspi.h
  • IfxQspi_initMtsrInPinWithPadLevel() : IfxQspi.h
  • IfxQspi_initMtsrOutPin() : IfxQspi.h
  • IfxQspi_initSclkInPin() : IfxQspi.h
  • IfxQspi_initSclkInPinWithPadLevel() : IfxQspi.h
  • IfxQspi_initSclkOutPin() : IfxQspi.h
  • IfxQspi_initSlsi() : IfxQspi.h
  • IfxQspi_initSlsiWithPadLevel() : IfxQspi.h
  • IfxQspi_initSlso() : IfxQspi.h
  • IfxQspi_isModuleEnabled() : IfxQspi.h
  • IfxQspi_isModuleSuspended() : IfxQspi.h
  • IfxQspi_pause() : IfxQspi.h
  • IfxQspi_permutateBigEndian() : IfxQspi.h
  • IfxQspi_read16() : IfxQspi.c , IfxQspi.h
  • IfxQspi_read32() : IfxQspi.h , IfxQspi.c
  • IfxQspi_read8() : IfxQspi.c , IfxQspi.h
  • IfxQspi_readReceiveFifo() : IfxQspi.h
  • IfxQspi_recalcBasicConfiguration() : IfxQspi.h , IfxQspi.c
  • IfxQspi_requestReset() : IfxQspi.h
  • IfxQspi_resetModule() : IfxQspi.c , IfxQspi.h
  • IfxQspi_run() : IfxQspi.h
  • IfxQspi_setBitsegment1() : IfxQspi.h
  • IfxQspi_setBitsegment2() : IfxQspi.h
  • IfxQspi_setBitsegment3() : IfxQspi.h
  • IfxQspi_setDisableModuleRequest() : IfxQspi.h
  • IfxQspi_setEnableModuleRequest() : IfxQspi.h
  • IfxQspi_setMoveCounterInterruptAfterLastEnabled() : IfxQspi.h
  • IfxQspi_setMoveCounterInterruptAfterLastFlag() : IfxQspi.h
  • IfxQspi_setMoveCounterInterruptBeforeLastEnabled() : IfxQspi.h
  • IfxQspi_setMoveCounterInterruptBeforeLastFlag() : IfxQspi.h
  • IfxQspi_setMoveCounterPrescalerTrailingDelay() : IfxQspi.h
  • IfxQspi_setReceiveFifoInterrruptThreshold() : IfxQspi.h
  • IfxQspi_setRxFifoMode() : IfxQspi.h
  • IfxQspi_setSlaveSelectOutputControl() : IfxQspi.c , IfxQspi.h
  • IfxQspi_setSleepMode() : IfxQspi.h
  • IfxQspi_setSuspendMode() : IfxQspi.h
  • IfxQspi_setTimeQuantum() : IfxQspi.h
  • IfxQspi_setTransmitFifoInterrruptThreshold() : IfxQspi.h
  • IfxQspi_setTxFifoMode() : IfxQspi.h
  • IfxQspi_SpiMaster_activateSlso() : IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_activeChannel() : IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_deactivateSlso() : IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_exchange() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_getChannelConfig() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_getStatus() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_initChannel() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_initChannelConfig() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_initModule() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_initModuleConfig() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_isrDmaReceive() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_isrDmaTransmit() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_isrError() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_isrPhaseTransition() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_isrReceive() : IfxQspi_SpiMaster.h , IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_isrTransmit() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_isrUserDefined() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_lock() : IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_moveCounterControlConfiguration() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_packLongModeBuffer() : IfxQspi_SpiMaster.h , IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_read() : IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_readReceiveFifo() : IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_setChannelBaudrate() : IfxQspi_SpiMaster.h , IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_unlock() : IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_write() : IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_writeBasicConfiguration() : IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_writeExtendedConfiguration() : IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_writeLong() : IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_writeMixedDataConfiguration() : IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_writeTransmitFifo() : IfxQspi_SpiMaster.h
  • IfxQspi_SpiSlave_exchange() : IfxQspi_SpiSlave.h , IfxQspi_SpiSlave.c
  • IfxQspi_SpiSlave_getStatus() : IfxQspi_SpiSlave.h , IfxQspi_SpiSlave.c
  • IfxQspi_SpiSlave_initModule() : IfxQspi_SpiSlave.h , IfxQspi_SpiSlave.c
  • IfxQspi_SpiSlave_initModuleConfig() : IfxQspi_SpiSlave.h , IfxQspi_SpiSlave.c
  • IfxQspi_SpiSlave_isrDmaReceive() : IfxQspi_SpiSlave.c , IfxQspi_SpiSlave.h
  • IfxQspi_SpiSlave_isrDmaTransmit() : IfxQspi_SpiSlave.h , IfxQspi_SpiSlave.c
  • IfxQspi_SpiSlave_isrError() : IfxQspi_SpiSlave.h , IfxQspi_SpiSlave.c
  • IfxQspi_SpiSlave_isrReceive() : IfxQspi_SpiSlave.c , IfxQspi_SpiSlave.h
  • IfxQspi_SpiSlave_isrTransmit() : IfxQspi_SpiSlave.c , IfxQspi_SpiSlave.h
  • IfxQspi_SpiSlave_read() : IfxQspi_SpiSlave.c
  • IfxQspi_SpiSlave_readReceiveFifo() : IfxQspi_SpiSlave.h
  • IfxQspi_SpiSlave_write() : IfxQspi_SpiSlave.c
  • IfxQspi_SpiSlave_writeTransmitFifo() : IfxQspi_SpiSlave.h
  • IfxQspi_trail2InjectionEnabled() : IfxQspi.h
  • IfxQspi_write16() : IfxQspi.h , IfxQspi.c
  • IfxQspi_write32() : IfxQspi.c , IfxQspi.h
  • IfxQspi_write8() : IfxQspi.c , IfxQspi.h
  • IfxQspi_writeBasicConfiguration() : IfxQspi.h
  • IfxQspi_writeBasicConfigurationBeginStream() : IfxQspi.h
  • IfxQspi_writeBasicConfigurationEndStream() : IfxQspi.h
  • IfxQspi_writeExtendedConfiguration() : IfxQspi.h
  • IfxQspi_writeMixedDataTransmitFifo() : IfxQspi.h
  • IfxQspi_writeTransmitFifo() : IfxQspi.h
  • IfxScuCcu_calRGainParameters() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_clearTrapStatusFlag() : IfxScuCcu.h
  • IfxScuCcu_configureCcuInitialStep() : IfxScuCcu.h
  • IfxScuCcu_distributeClock() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_distributeClockInline() : IfxScuCcu.h
  • IfxScuCcu_getAdcFrequency() : IfxScuCcu.h
  • IfxScuCcu_getAsclinFFrequency() : IfxScuCcu.h
  • IfxScuCcu_getAsclinSFrequency() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_getBbbFrequency() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_getCpuFrequency() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_getEvrFrequency() : IfxScuCcu.h
  • IfxScuCcu_getFsi2Frequency() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_getFsiFrequency() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_getGethFrequency() : IfxScuCcu.h
  • IfxScuCcu_getGtmFrequency() : IfxScuCcu.h
  • IfxScuCcu_getI2cFrequency() : IfxScuCcu.h
  • IfxScuCcu_getMcanFrequency() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_getMcanhFrequency() : IfxScuCcu.h
  • IfxScuCcu_getModuleFrequency() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_getMscFrequency() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_getOsc0Frequency() : IfxScuCcu.h
  • IfxScuCcu_getOscFrequency() : IfxScuCcu.h
  • IfxScuCcu_getPerPllFrequency1() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_getPerPllFrequency2() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_getPllFrequency() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_getQspiFrequency() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_getSourceFrequency() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_getSourceSelection() : IfxScuCcu.h
  • IfxScuCcu_getSpbFrequency() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_getSriFrequency() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_getStmFrequency() : IfxScuCcu.h
  • IfxScuCcu_getTrapDisableFlag() : IfxScuCcu.h
  • IfxScuCcu_getTrapStatusFlag() : IfxScuCcu.h
  • IfxScuCcu_init() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_initConfig() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_modulation_init() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_setAsclinFFrequency() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_setAsclinSFrequency() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_setBbbFrequency() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_setCpuFrequency() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_setFsi2Frequency() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_setFsiFrequency() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_setGethFrequency() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_setGtmFrequency() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_setI2cFrequency() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_setMcanFrequency() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_setMcanhFrequency() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_setMscFrequency() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_setQspiFrequency() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_setSpbFrequency() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_setSriFrequency() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_setStmFrequency() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_setTrapDisableFlag() : IfxScuCcu.h
  • IfxScuCcu_setTrapStatusFlag() : IfxScuCcu.h
  • IfxScuCcu_switchToBackupClock() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_switchToLowPowerMode() : IfxScuCcu.h
  • IfxScuCcu_switchToNormalMode() : IfxScuCcu.h
  • IfxScuCcu_throttleSysPllClock() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_throttleSysPllClockInline() : IfxScuCcu.h
  • IfxScuCcu_wait() : IfxScuCcu.h
  • IfxScuCcu_waitWithWdtService() : IfxScuCcu.h
  • IfxScuEru_clearAllEventFlags() : IfxScuEru.h , IfxScuEru.c
  • IfxScuEru_clearEventFlag() : IfxScuEru.h , IfxScuEru.c
  • IfxScuEru_clearInputChannelConfiguration() : IfxScuEru.c , IfxScuEru.h
  • IfxScuEru_clearOutputChannelConfiguration() : IfxScuEru.h , IfxScuEru.c
  • IfxScuEru_connectTrigger() : IfxScuEru.h , IfxScuEru.c
  • IfxScuEru_disableAutoClear() : IfxScuEru.h , IfxScuEru.c
  • IfxScuEru_disableFallingEdgeDetection() : IfxScuEru.c , IfxScuEru.h
  • IfxScuEru_disableInputFilter() : IfxScuEru.h
  • IfxScuEru_disablePatternDetectionTrigger() : IfxScuEru.h , IfxScuEru.c
  • IfxScuEru_disableRisingEdgeDetection() : IfxScuEru.h , IfxScuEru.c
  • IfxScuEru_disableTriggerPulse() : IfxScuEru.h , IfxScuEru.c
  • IfxScuEru_enableAutoClear() : IfxScuEru.h , IfxScuEru.c
  • IfxScuEru_enableFallingEdgeDetection() : IfxScuEru.c , IfxScuEru.h
  • IfxScuEru_enableInputFilter() : IfxScuEru.h
  • IfxScuEru_enablePatternDetectionTrigger() : IfxScuEru.h , IfxScuEru.c
  • IfxScuEru_enableRisingEdgeDetection() : IfxScuEru.h , IfxScuEru.c
  • IfxScuEru_enableTriggerPulse() : IfxScuEru.c , IfxScuEru.h
  • IfxScuEru_getAllEventFlagsStatus() : IfxScuEru.c , IfxScuEru.h
  • IfxScuEru_getEventFlagStatus() : IfxScuEru.h , IfxScuEru.c
  • IfxScuEru_getInputChannelConfiguration() : IfxScuEru.c , IfxScuEru.h
  • IfxScuEru_getOutputChannelConfiguration() : IfxScuEru.c , IfxScuEru.h
  • IfxScuEru_getPatternDetectionResult() : IfxScuEru.h , IfxScuEru.c
  • IfxScuEru_getWholePatternDetectionResult() : IfxScuEru.h , IfxScuEru.c
  • IfxScuEru_initReqPin() : IfxScuEru.h
  • IfxScuEru_selectExternalInput() : IfxScuEru.c , IfxScuEru.h
  • IfxScuEru_setEventFlag() : IfxScuEru.h , IfxScuEru.c
  • IfxScuEru_setFlagPatternDetection() : IfxScuEru.c , IfxScuEru.h
  • IfxScuEru_setInputFilterDepth() : IfxScuEru.h
  • IfxScuEru_setInputFilterPredivider() : IfxScuEru.h
  • IfxScuEru_setInterruptGatingPattern() : IfxScuEru.c , IfxScuEru.h
  • IfxScuLbist_evaluateResult() : IfxScuLbist.h
  • IfxScuLbist_initParameterSetInline() : IfxScuLbist.h
  • IfxScuLbist_isDone() : IfxScuLbist.h
  • IfxScuLbist_multiTriggersInline() : IfxScuLbist.h
  • IfxScuLbist_retriggerInline() : IfxScuLbist.h
  • IfxScuLbist_triggerInline() : IfxScuLbist.h
  • IfxScuRcu_clearColdResetStatus() : IfxScuRcu.h
  • IfxScuRcu_configureResetRequestTrigger() : IfxScuRcu.h
  • IfxScuRcu_evaluateReset() : IfxScuRcu.c , IfxScuRcu.h
  • IfxScuRcu_isApplicationReset() : IfxScuRcu.h
  • IfxScuRcu_performReset() : IfxScuRcu.c , IfxScuRcu.h
  • IfxScuRcu_readRawResetStatus() : IfxScuRcu.h
  • IfxScuWdt_calculateLfsr() : IfxScuWdt.asm.h
  • IfxScuWdt_changeCpuWatchdogPassword() : IfxScuWdt.c , IfxScuWdt.h
  • IfxScuWdt_changeCpuWatchdogReload() : IfxScuWdt.h , IfxScuWdt.c
  • IfxScuWdt_changeGlobalEndinitPassword() : IfxScuWdt.c , IfxScuWdt.h
  • IfxScuWdt_changeGlobalSafetyEndinitPassword() : IfxScuWdt.c , IfxScuWdt.h
  • IfxScuWdt_changeSafetyWatchdogPassword() : IfxScuWdt.h , IfxScuWdt.c
  • IfxScuWdt_changeSafetyWatchdogReload() : IfxScuWdt.h , IfxScuWdt.c
  • IfxScuWdt_clearCpuEndinit() : IfxScuWdt.c , IfxScuWdt.h
  • IfxScuWdt_clearCpuEndinitInline() : IfxScuWdt.h
  • IfxScuWdt_clearGlobalEndinit() : IfxScuWdt.h , IfxScuWdt.c
  • IfxScuWdt_clearGlobalSafetyEndinit() : IfxScuWdt.h , IfxScuWdt.c
  • IfxScuWdt_clearGlobalSafetyEndinitInline() : IfxScuWdt.h
  • IfxScuWdt_clearSafetyEndinit() : IfxScuWdt.c , IfxScuWdt.h
  • IfxScuWdt_clearSafetyEndinitInline() : IfxScuWdt.h
  • IfxScuWdt_disableCpuWatchdog() : IfxScuWdt.h , IfxScuWdt.c
  • IfxScuWdt_disableSafetyWatchdog() : IfxScuWdt.h , IfxScuWdt.c
  • IfxScuWdt_enableCpuWatchdog() : IfxScuWdt.h , IfxScuWdt.c
  • IfxScuWdt_enableSafetyWatchdog() : IfxScuWdt.c , IfxScuWdt.h
  • IfxScuWdt_enableWatchdogWithDebugger() : IfxScuWdt.c , IfxScuWdt.h
  • IfxScuWdt_getCpuWatchdogEndInit() : IfxScuWdt.c , IfxScuWdt.h
  • IfxScuWdt_getCpuWatchdogEndInitInline() : IfxScuWdt.h
  • IfxScuWdt_getCpuWatchdogPassword() : IfxScuWdt.h , IfxScuWdt.c
  • IfxScuWdt_getCpuWatchdogPasswordInline() : IfxScuWdt.h
  • IfxScuWdt_getCpuWatchdogStatus() : IfxScuWdt.c , IfxScuWdt.h
  • IfxScuWdt_getGlobalEndinitPassword() : IfxScuWdt.h , IfxScuWdt.c
  • IfxScuWdt_getGlobalSafetyEndinitPassword() : IfxScuWdt.h , IfxScuWdt.c
  • IfxScuWdt_getGlobalSafetyEndinitPasswordInline() : IfxScuWdt.h
  • IfxScuWdt_getSafetyWatchdogEndInit() : IfxScuWdt.h
  • IfxScuWdt_getSafetyWatchdogPassword() : IfxScuWdt.c , IfxScuWdt.h
  • IfxScuWdt_getSafetyWatchdogPasswordInline() : IfxScuWdt.h
  • IfxScuWdt_initConfig() : IfxScuWdt.h , IfxScuWdt.c
  • IfxScuWdt_initCpuWatchdog() : IfxScuWdt.h , IfxScuWdt.c
  • IfxScuWdt_initSafetyWatchdog() : IfxScuWdt.h , IfxScuWdt.c
  • IfxScuWdt_serviceCpuWatchdog() : IfxScuWdt.h , IfxScuWdt.c
  • IfxScuWdt_serviceSafetyWatchdog() : IfxScuWdt.h , IfxScuWdt.c
  • IfxScuWdt_setCpuEndinit() : IfxScuWdt.h , IfxScuWdt.c
  • IfxScuWdt_setCpuEndinitInline() : IfxScuWdt.h
  • IfxScuWdt_setGlobalEndinit() : IfxScuWdt.c , IfxScuWdt.h
  • IfxScuWdt_setGlobalSafetyEndinit() : IfxScuWdt.c , IfxScuWdt.h
  • IfxScuWdt_setGlobalSafetyEndinitInline() : IfxScuWdt.h
  • IfxScuWdt_setSafetyEndinit() : IfxScuWdt.c , IfxScuWdt.h
  • IfxScuWdt_setSafetyEndinitInline() : IfxScuWdt.h
  • IfxSent_clearInterruptStatus() : IfxSent.h
  • IfxSent_disableChannel() : IfxSent.h
  • IfxSent_disableModule() : IfxSent.h
  • IfxSent_enableChannel() : IfxSent.h
  • IfxSent_enableModule() : IfxSent.h
  • IfxSent_getAndClearInterruptStatus() : IfxSent.h
  • IfxSent_getChannelInterruptStatus() : IfxSent.h
  • IfxSent_getChannelSrc() : IfxSent.h
  • IfxSent_getChannelUnitTime() : IfxSent.c , IfxSent.h
  • IfxSent_getFrameLengthWithPausePulse() : IfxSent.h
  • IfxSent_getInterruptStatus() : IfxSent.h
  • IfxSent_getModuleClock() : IfxSent.c , IfxSent.h
  • IfxSent_initializeChannelUnitTime() : IfxSent.c , IfxSent.h
  • IfxSent_initializeModuleClock() : IfxSent.c , IfxSent.h
  • IfxSent_initSentPin() : IfxSent.h
  • IfxSent_initSpcPin() : IfxSent.h
  • IfxSent_isModuleEnabled() : IfxSent.h
  • IfxSent_isModuleSuspended() : IfxSent.h
  • IfxSent_readReceivedChannelStatus() : IfxSent.h
  • IfxSent_readReceivedCrc() : IfxSent.h
  • IfxSent_readReceivedData() : IfxSent.h
  • IfxSent_readReceivedStatus() : IfxSent.h
  • IfxSent_readReceivedStatusAndCommunicationNibble() : IfxSent.h
  • IfxSent_readReceivedTimeStamp() : IfxSent.h
  • IfxSent_readSpcDelayLength() : IfxSent.h
  • IfxSent_readSpcPulseLength() : IfxSent.h
  • IfxSent_resetModule() : IfxSent.c , IfxSent.h
  • IfxSent_Sent_deInitModule() : IfxSent_Sent.c , IfxSent_Sent.h
  • IfxSent_Sent_getAndClearInterruptStatus() : IfxSent_Sent.h
  • IfxSent_Sent_initChannel() : IfxSent_Sent.c , IfxSent_Sent.h
  • IfxSent_Sent_initChannelConfig() : IfxSent_Sent.c , IfxSent_Sent.h
  • IfxSent_Sent_initModule() : IfxSent_Sent.c , IfxSent_Sent.h
  • IfxSent_Sent_initModuleConfig() : IfxSent_Sent.h , IfxSent_Sent.c
  • IfxSent_Sent_readChannelSerialDataFrame() : IfxSent_Sent.c , IfxSent_Sent.h
  • IfxSent_Sent_readChannelSerialMessageFrame() : IfxSent_Sent.h , IfxSent_Sent.c
  • IfxSent_setAltiInput() : IfxSent.h
  • IfxSent_setChannelFractionalDivider() : IfxSent.h
  • IfxSent_setChannelPreDivider() : IfxSent.h
  • IfxSent_setSleepMode() : IfxSent.h
  • IfxSent_setSuspendMode() : IfxSent.h
  • IfxSent_setTimeStampPredivider() : IfxSent.h
  • IfxSent_setWatchDogTimerLimit() : IfxSent.h
  • IfxSmu_activateFSP() : IfxSmu.h , IfxSmu.c
  • IfxSmu_activateRunState() : IfxSmu.c , IfxSmu.h
  • IfxSmu_clearAlarmExecutedStatus() : IfxSmu.h
  • IfxSmu_clearAlarmStatus() : IfxSmu.c , IfxSmu.h
  • IfxSmu_clearRegisterMonitorErrorFlag() : IfxSmu.h
  • IfxSmu_clearRegisterMonitorStatus() : IfxSmu.h
  • IfxSmu_clearRegMonTestModeEnable() : IfxSmu.h
  • IfxSmu_configAlarmActionPES() : IfxSmu.c , IfxSmu.h
  • IfxSmu_ConfigureInterruptGeneration() : IfxSmu.c , IfxSmu.h
  • IfxSmu_enableFaultToRunState() : IfxSmu.c , IfxSmu.h
  • IfxSmu_enablePortEmergencyStop() : IfxSmu.c , IfxSmu.h
  • IfxSmu_getAlarmAction() : IfxSmu.h , IfxSmu.c
  • IfxSmu_getAlarmExecutedStatus() : IfxSmu.h
  • IfxSmu_getAlarmGroupDebugStatus() : IfxSmu.c , IfxSmu.h
  • IfxSmu_getAlarmStatus() : IfxSmu.c , IfxSmu.h
  • IfxSmu_getPortControlHwDir() : IfxSmu.h
  • IfxSmu_getPortControlHwEnable() : IfxSmu.h
  • IfxSmu_getRegisterMonitorErrorFlag() : IfxSmu.h
  • IfxSmu_getRegisterMonitorStatus() : IfxSmu.h
  • IfxSmu_getRTMissedEvent() : IfxSmu.h , IfxSmu.c
  • IfxSmu_getSmuState() : IfxSmu.h , IfxSmu.c
  • IfxSmu_getSrcPointer() : IfxSmu.h
  • IfxSmu_isModuleSuspended() : IfxSmu.h
  • IfxSmu_lockConfigRegisters() : IfxSmu.c , IfxSmu.h
  • IfxSmu_releaseFSP() : IfxSmu.h , IfxSmu.c
  • IfxSmu_setAlarmAction() : IfxSmu.h , IfxSmu.c
  • IfxSmu_setAlarmStatus() : IfxSmu.c , IfxSmu.h
  • IfxSmu_setFspMode() : IfxSmu.c , IfxSmu.h
  • IfxSmu_setPortControlHwEnableAndDir() : IfxSmu.h
  • IfxSmu_setRegMonTestModeEnable() : IfxSmu.h
  • IfxSmu_setSuspendMode() : IfxSmu.h
  • IfxSmu_Smu_initModule() : IfxSmu_Smu.c , IfxSmu_Smu.h
  • IfxSmu_Smu_initModuleConfig() : IfxSmu_Smu.c , IfxSmu_Smu.h
  • IfxSmu_Smu_isAlarmTriggered() : IfxSmu_Smu.h , IfxSmu_Smu.c
  • IfxSmu_startAliveTest() : IfxSmu.h
  • IfxSmu_stopAliveTest() : IfxSmu.h
  • IfxSmu_stopRT() : IfxSmu.h , IfxSmu.c
  • IfxSmu_temporaryLockConfigRegisters() : IfxSmu.h , IfxSmu.c
  • IfxSmu_unlockConfigRegisters() : IfxSmu.h , IfxSmu.c
  • IfxSmu_waitForAlarm() : IfxSmu.h
  • IfxSmuStdby_clearSmuStdbyMonBistFlags() : IfxSmuStdby.h
  • IfxSmuStdby_enableAlarmStatusClear() : IfxSmuStdby.h
  • IfxSmuStdby_enableSmuStdby() : IfxSmuStdby.h
  • IfxSmuStdby_enableSmuStdbyMonBist() : IfxSmuStdby.h
  • IfxSmuStdby_getSmuStdbyAlarmGroupStatus() : IfxSmuStdby.h
  • IfxSmuStdby_getSmuStdbyAlarmStatus() : IfxSmuStdby.h
  • IfxSmuStdby_getSmuStdbyModuleStatus() : IfxSmuStdby.h
  • IfxSmuStdby_getSmuStdbyMonBistPmsErrorFlag() : IfxSmuStdby.h
  • IfxSmuStdby_getSmuStdbyMonBistSmuErrorFlag() : IfxSmuStdby.h
  • IfxSmuStdby_getSmuStdbyMonBistTestDoneFlag() : IfxSmuStdby.h
  • IfxSmuStdby_getSmuStdbyMonBistTestOkFlag() : IfxSmuStdby.h
  • IfxSmuStdby_getSmuStdbyMonBistTestRunFlag() : IfxSmuStdby.h
  • IfxSmuStdby_setFaultSignalAGConfigEventFlags() : IfxSmuStdby.h , IfxSmuStdby.c
  • IfxSmuStdby_setFaultSignalAlarmConfigEventFlag() : IfxSmuStdby.h , IfxSmuStdby.c
  • IfxSmuStdby_setFsp0ErrorPinActive() : IfxSmuStdby.h
  • IfxSmuStdby_setFsp1ErrorPinActive() : IfxSmuStdby.h
  • IfxSmuStdby_setSmuStdbyAlarmStatusFlag() : IfxSmuStdby.h , IfxSmuStdby.c
  • IfxSmuStdby_startSmuStdbyMonBist() : IfxSmuStdby.h , IfxSmuStdby.c
  • IfxSrc_clearOverrun() : IfxSrc.h
  • IfxSrc_clearRequest() : IfxSrc.h
  • IfxSrc_deinit() : IfxSrc.h
  • IfxSrc_disable() : IfxSrc.h
  • IfxSrc_enable() : IfxSrc.h
  • IfxSrc_init() : IfxSrc.h
  • IfxSrc_isOverrun() : IfxSrc.h
  • IfxSrc_isRequested() : IfxSrc.h
  • IfxSrc_setRequest() : IfxSrc.h
  • IfxStdIf_DPipe_canReadCount() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_canWriteCount() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_clearRx() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_clearTx() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_flushTx() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_getReadCount() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_getReadEvent() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_getSendCount() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_getTxTimeStamp() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_getWriteCount() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_getWriteEvent() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_onError() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_onReceive() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_onTransmit() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_print() : IfxStdIf_DPipe.c , IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_read() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_resetSendCount() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_write() : IfxStdIf_DPipe.h
  • IfxStdIf_Pos_getAbsolutePosition() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_getDirection() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_getFault() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_getOffset() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_getPeriodPerRotation() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_getPosition() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_getRawPosition() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_getRefreshPeriod() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_getResolution() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_getSensorType() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_getSpeed() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_getTurn() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_initConfig() : IfxStdIf_Pos.h , IfxStdIf_Pos.c
  • IfxStdIf_Pos_isFault() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_onEventA() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_onZeroIrq() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_printStatus() : IfxStdIf_Pos.h , IfxStdIf_Pos.c
  • IfxStdIf_Pos_radsToRpm() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_reset() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_resetFaults() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_rpmToRads() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_setOffset() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_setPosition() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_setRawPosition() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_setRefreshPeriod() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_setSpeed() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_update() : IfxStdIf_Pos.h
  • IfxStdIf_PwmHl_getDeadtime() : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_getDeadtimetick() : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_getMinPulse() : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_getMode() : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_getTimer() : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_initConfig() : IfxStdIf_PwmHl.c , IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_setDeadtime() : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_setMinPulse() : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_setMode() : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_setOnTime() : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_setOnTimeAndShift() : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_setPulse() : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_setupChannels() : IfxStdIf_PwmHl.h
  • IfxStdIf_Timer_ackTimerIrq() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_ackTriggerIrq() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_applyUpdate() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_disableUpdate() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_getFrequency() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_getInputFrequency() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_getPeriod() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_getPeriodSecond() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_getResolution() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_getTrigger() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_initConfig() : IfxStdIf_Timer.c , IfxStdIf_Timer.h
  • IfxStdIf_Timer_initStdIf() : IfxStdIf_Timer.h , IfxStdIf_Timer.c
  • IfxStdIf_Timer_run() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_setFrequency() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_setPeriod() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_setSingleMode() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_setTrigger() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_stop() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_sToTick() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_tickToS() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_updateInputFrequency() : IfxStdIf_Timer.h
  • IfxStm_clearCompareFlag() : IfxStm.h , IfxStm.c
  • IfxStm_disableComparatorInterrupt() : IfxStm.h , IfxStm.c
  • IfxStm_disableModule() : IfxStm.h , IfxStm.c
  • IfxStm_enableComparatorInterrupt() : IfxStm.c , IfxStm.h
  • IfxStm_enableOcdsSuspend() : IfxStm.c , IfxStm.h
  • IfxStm_get() : IfxStm.h
  • IfxStm_getAddress() : IfxStm.h , IfxStm.c
  • IfxStm_getCompare() : IfxStm.h
  • IfxStm_getDeadLine() : IfxStm.h
  • IfxStm_getFrequency() : IfxStm.h
  • IfxStm_getIndex() : IfxStm.c , IfxStm.h
  • IfxStm_getLower() : IfxStm.h
  • IfxStm_getOffset12Timer() : IfxStm.h
  • IfxStm_getOffset16Timer() : IfxStm.h
  • IfxStm_getOffset20Timer() : IfxStm.h
  • IfxStm_getOffset32Timer() : IfxStm.h
  • IfxStm_getOffset4Timer() : IfxStm.h
  • IfxStm_getOffset8Timer() : IfxStm.h
  • IfxStm_getOffsetTimer() : IfxStm.h
  • IfxStm_getSrcPointer() : IfxStm.c , IfxStm.h
  • IfxStm_getTicksFromMicroseconds() : IfxStm.h
  • IfxStm_getTicksFromMilliseconds() : IfxStm.h
  • IfxStm_increaseCompare() : IfxStm.h
  • IfxStm_initCompare() : IfxStm.h , IfxStm.c
  • IfxStm_initCompareConfig() : IfxStm.h , IfxStm.c
  • IfxStm_isCompareFlagSet() : IfxStm.h , IfxStm.c
  • IfxStm_isDeadLine() : IfxStm.h
  • IfxStm_isModuleSuspended() : IfxStm.h
  • IfxStm_now() : IfxStm.h
  • IfxStm_resetModule() : IfxStm.h , IfxStm.c
  • IfxStm_setCompareControl() : IfxStm.h , IfxStm.c
  • IfxStm_setSleepMode() : IfxStm.h
  • IfxStm_setSuspendMode() : IfxStm.h
  • IfxStm_Timer_acknowledgeTimerIrq() : IfxStm_Timer.h , IfxStm_Timer.c
  • IfxStm_Timer_getFrequency() : IfxStm_Timer.c , IfxStm_Timer.h
  • IfxStm_Timer_getInputFrequency() : IfxStm_Timer.h , IfxStm_Timer.c
  • IfxStm_Timer_getPeriod() : IfxStm_Timer.c , IfxStm_Timer.h
  • IfxStm_Timer_getResolution() : IfxStm_Timer.h , IfxStm_Timer.c
  • IfxStm_Timer_init() : IfxStm_Timer.c , IfxStm_Timer.h
  • IfxStm_Timer_initConfig() : IfxStm_Timer.h , IfxStm_Timer.c
  • IfxStm_Timer_run() : IfxStm_Timer.c , IfxStm_Timer.h
  • IfxStm_Timer_setFrequency() : IfxStm_Timer.h , IfxStm_Timer.c
  • IfxStm_Timer_setPeriod() : IfxStm_Timer.c , IfxStm_Timer.h
  • IfxStm_Timer_setSingleMode() : IfxStm_Timer.h , IfxStm_Timer.c
  • IfxStm_Timer_stdIfTimerInit() : IfxStm_Timer.h , IfxStm_Timer.c
  • IfxStm_Timer_stop() : IfxStm_Timer.c , IfxStm_Timer.h
  • IfxStm_Timer_updateInputFrequency() : IfxStm_Timer.h , IfxStm_Timer.c
  • IfxStm_updateCompare() : IfxStm.h
  • IfxStm_wait() : IfxStm.h
  • IfxStm_waitTicks() : IfxStm.h
  • initTime() : Bsp.h
  • isDeadLine() : Bsp.h


iLLD_TC38A: Globals

- m -

  • memcpy() : Ifx_Ssw_CompilersGhs.h
  • memset() : Ifx_Ssw_CompilersGhs.h


iLLD_TC38A: Globals

- n -

  • now() : Bsp.h
  • nowWithoutCriticalSection() : Bsp.h


iLLD_TC38A: Globals

- p -

  • poll() : Bsp.h


iLLD_TC38A: Globals

- r -

  • restoreInterrupts() : Bsp.h
  • round_f() : Ifx_AngleTrkF32.c


iLLD_TC38A: Globals

- s -

  • SpiIf_exchange() : SpiIf.h
  • SpiIf_getStatus() : SpiIf.h
  • SpiIf_initChannelConfig() : SpiIf.h , SpiIf.c
  • SpiIf_initConfig() : SpiIf.h , SpiIf.c
  • SpiIf_wait() : SpiIf.h


iLLD_TC38A: Globals

- t -

  • timingNoInterruptEnd() : Bsp.h
  • timingNoInterruptStart() : Bsp.h


iLLD_TC38A: Globals

- v -

  • VecAvg_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • VecGain_f32() : Ifx_Cf32.h , Ifx_Cf32.c
  • VecHalfSwap_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • VecMax_f32() : Ifx_Cf32.h , Ifx_Cf32.c
  • VecMaxIdx_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • VecMin_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • VecMinIdx_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • VecOfs_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • VecPwrdB_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • VecPwrdB_SF() : Ifx_Cf32.c , Ifx_Cf32.h
  • VecSum_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • VecWin_f32() : Ifx_Cf32.h , Ifx_Cf32.c


iLLD_TC38A: Globals

- w -

  • wait() : Bsp.h
  • waitPoll() : Bsp.c , Bsp.h
  • waitTime() : Bsp.c , Bsp.h


iLLD_TC38A: Globals

- $ -

  • $ $sb : IfxCpu_IntrinsicsDcc.h


iLLD_TC38A: Globals

- _ -

  • __clear_table : Ifx_Ssw_CompilersGnuc.h
  • __copy_table : Ifx_Ssw_CompilersGnuc.h


iLLD_TC38A: Globals

- a -

  • abs : IfxCpu_IntrinsicsDcc.h
  • absdif : IfxCpu_IntrinsicsDcc.h
  • abss : IfxCpu_IntrinsicsDcc.h
  • adds : IfxCpu_IntrinsicsDcc.h
  • Assert_level : Assert.c


iLLD_TC38A: Globals

- b -

  • bisr : IfxCpu_IntrinsicsDcc.h


iLLD_TC38A: Globals

- c -

  • clo : IfxCpu_IntrinsicsDcc.h
  • cls : IfxCpu_IntrinsicsDcc.h
  • clz : IfxCpu_IntrinsicsDcc.h , Ifx_Ssw_CompilersDcc.h


iLLD_TC38A: Globals

- d -

  • debug : IfxCpu_IntrinsicsDcc.h
  • disable : IfxCpu_IntrinsicsDcc.h
  • dsync : IfxCpu_IntrinsicsDcc.h , Ifx_Ssw_CompilersDcc.h


iLLD_TC38A: Globals

- e -

  • enable : IfxCpu_IntrinsicsDcc.h
  • extr : IfxCpu_IntrinsicsDcc.h


iLLD_TC38A: Globals

- g -

  • g_DateTimeOffset : Ifx_DateTime.c


iLLD_TC38A: Globals

- h -

  • h : IfxCpu_IntrinsicsDcc.h


iLLD_TC38A: Globals

- i -

  • Ifx_g_console : Ifx_Console.c , Ifx_Console.h
  • Ifx_g_FftF32_bitReverseTable : Ifx_FftF32_BitReverseTable.c , Ifx_FftF32.h
  • Ifx_g_FftF32_twiddleTable : Ifx_FftF32.h , Ifx_FftF32_TwiddleTable.c
  • Ifx_g_LutAtan2F32_FxpAngle_table : Ifx_LutAtan2F32_Table.c , Ifx_LutAtan2F32.h
  • Ifx_g_LutAtan2F32_table : Ifx_LutAtan2F32.h , Ifx_LutAtan2F32_Table.c
  • Ifx_g_LutLSincosF32 : Ifx_LutLSincosF32.c , Ifx_LutLSincosF32.h
  • Ifx_g_LutLSincosF32_table : Ifx_LutLSincosF32.c
  • Ifx_g_LutSincosF32_table : Ifx_LutSincosF32.h , Ifx_LutSincosF32_Table.c
  • Ifx_g_WndF32_blackmanHarrisTable : Ifx_WndF32.h , Ifx_WndF32_BlackmanHarrisTable.c
  • Ifx_g_WndF32_hannTable : Ifx_WndF32.h , Ifx_WndF32_HannTable.c
  • Ifx_Shell_cmdBuffer : Ifx_Shell.c
  • IfxAsclin0_CTSA_P14_9_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin0_RTS_P14_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin0_RXA_P14_1_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin0_RXB_P15_3_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin0_RXC_P01_8_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin0_RXD_P33_10_IN : IfxAsclin_PinMap.h , IfxAsclin_PinMap.c
  • IfxAsclin0_RXE_P13_11_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin0_SCLK_P14_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin0_SCLK_P15_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin0_TX_P01_13_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin0_TX_P13_10_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin0_TX_P14_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin0_TX_P14_1_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin0_TX_P15_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin0_TX_P15_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin0_TX_P33_9_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin10_RXA_P00_4_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin10_RXB_P00_8_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin10_RXC_P13_0_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin10_RXD_P13_1_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin10_SCLK_P13_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin10_SLSO_P13_3_OUT : IfxAsclin_PinMap.h , IfxAsclin_PinMap.c
  • IfxAsclin10_TX_P00_8_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin10_TX_P13_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin11_RXA_P10_0_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin11_RXB_P10_4_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin11_RXC_P21_0_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin11_RXD_P21_1_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin11_RXE_P21_2_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin11_RXF_P21_5_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin11_SCLK_P21_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin11_SLSO_P21_4_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin11_TX_P10_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin11_TX_P21_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin11_TX_P21_5_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin12_RXA_P00_3_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin12_RXB_P00_5_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin12_TX_P00_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin12_TX_P01_6_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin13_RXA_P00_9_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin13_RXB_P00_11_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin13_TX_P00_10_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin13_TX_P00_11_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin14_RXA_P33_3_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin14_RXB_P33_4_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin14_TX_P33_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin14_TX_P33_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin15_RXA_P32_4_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin15_RXB_P32_7_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin15_TX_P32_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin15_TX_P33_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin16_RXA_P23_5_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin16_RXB_P23_7_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin16_TX_P23_6_OUT : IfxAsclin_PinMap.h , IfxAsclin_PinMap.c
  • IfxAsclin16_TX_P23_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin17_RXA_P22_11_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin17_RXB_P21_0_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin17_TX_P22_11_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin17_TX_P22_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin18_RXA_P21_1_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin18_RXB_P21_4_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin18_TX_P21_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin18_TX_P21_4_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin19_RXA_P15_6_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin19_RXB_P15_7_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin19_TX_P15_4_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin19_TX_P15_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_CTSA_P20_7_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_CTSB_P32_4_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_RTS_P20_6_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_RTS_P23_1_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_RXA_P15_1_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_RXB_P15_5_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_RXC_P20_9_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_RXD_P14_8_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_RXE_P11_10_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_RXF_P33_13_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_RXG_P02_3_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_SCLK_P15_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_SCLK_P20_10_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_SCLK_P33_11_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_SCLK_P33_12_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_SLSO_P14_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_SLSO_P20_8_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_SLSO_P33_10_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_TX_P02_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_TX_P11_12_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_TX_P14_10_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_TX_P14_15_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_TX_P15_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_TX_P15_1_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_TX_P15_4_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_TX_P15_5_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_TX_P20_10_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_TX_P33_12_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_TX_P33_13_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin20_RXA_P14_7_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin20_RXB_P14_9_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin20_TX_P14_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin20_TX_P14_8_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin21_RXA_P13_0_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin21_RXB_P13_3_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin21_TX_P13_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin21_TX_P13_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin22_RXA_P10_4_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin22_RXB_P10_5_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin22_TX_P10_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin22_TX_P10_4_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin23_RXA_P10_6_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin23_RXB_P10_7_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin23_TX_P10_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin23_TX_P10_8_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_CTSA_P10_7_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_CTSB_P33_5_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_RTS_P10_8_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_RTS_P33_4_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_RXA_P14_3_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_RXB_P02_1_IN : IfxAsclin_PinMap.h , IfxAsclin_PinMap.c
  • IfxAsclin2_RXC_P02_10_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_RXD_P10_6_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_RXE_P33_8_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_RXF_P32_6_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_RXG_P02_0_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_SCLK_P02_4_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_SCLK_P10_6_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_SCLK_P14_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_SCLK_P33_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_SCLK_P33_9_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_SLSO_P02_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_SLSO_P10_5_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_SLSO_P33_6_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_TX_P02_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_TX_P02_9_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_TX_P10_5_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_TX_P14_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_TX_P14_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_TX_P32_5_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_TX_P33_8_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_TX_P33_9_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_CTSA_P00_12_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_RTS_P00_9_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_RXA_P15_7_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_RXB_P11_0_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_RXC_P20_3_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_RXD_P32_2_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_RXE_P00_1_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_RXF_P21_6_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_RXG_P21_2_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_RXG_P21_3_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_RXH_P13_12_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SCLK_P00_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SCLK_P00_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SCLK_P11_1_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SCLK_P11_4_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SCLK_P15_6_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SCLK_P15_8_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SCLK_P20_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SCLK_P21_5_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SCLK_P21_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SCLK_P32_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SCLK_P33_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SLSO_P00_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SLSO_P12_1_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SLSO_P14_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SLSO_P21_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SLSO_P21_6_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SLSO_P33_1_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_TX_P00_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_TX_P00_1_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_TX_P11_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_TX_P11_1_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_TX_P13_9_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_TX_P15_6_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_TX_P15_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_TX_P20_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_TX_P20_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_TX_P21_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_TX_P22_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_TX_P22_1_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_TX_P32_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_TX_P32_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin4_RXA_P00_12_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin4_RXB_P34_2_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin4_RXC_P22_6_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin4_RXD_P22_9_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin4_SCLK_P00_10_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin4_SCLK_P22_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin4_SCLK_P34_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin4_SLSO_P00_11_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin4_SLSO_P22_11_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin4_SLSO_P22_4_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin4_SLSO_P34_4_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin4_TX_P00_9_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin4_TX_P22_10_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin4_TX_P22_5_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin4_TX_P34_1_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin5_RXA_P00_6_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin5_RXB_P33_4_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin5_RXC_P22_3_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin5_RXD_P14_15_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin5_SCLK_P14_12_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin5_SCLK_P22_8_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin5_SCLK_P33_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin5_SLSO_P14_8_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin5_SLSO_P33_5_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin5_TX_P00_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin5_TX_P14_14_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin5_TX_P22_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin5_TX_P33_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin6_RXA_P23_3_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin6_RXB_P01_0_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin6_RXC_P32_6_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin6_RXD_P10_9_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin6_RXE_P22_0_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin6_RXF_P23_1_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin6_SCLK_P02_14_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin6_SCLK_P10_11_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin6_SCLK_P23_1_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin6_SLSO_P02_12_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin6_SLSO_P10_13_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin6_SLSO_P23_4_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin6_TX_P01_1_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin6_TX_P02_15_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin6_TX_P10_10_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin6_TX_P22_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin6_TX_P23_5_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin6_TX_P32_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin7_RXA_P14_15_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin7_RXB_P01_8_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin7_RXC_P23_2_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin7_RXD_P13_11_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin7_RXE_P22_1_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin7_RXF_P22_4_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin7_SCLK_P01_10_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin7_SCLK_P13_13_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin7_SCLK_P14_12_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin7_SLSO_P01_11_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin7_SLSO_P13_15_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin7_SLSO_P14_8_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin7_TX_P01_12_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin7_TX_P01_9_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin7_TX_P13_12_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin7_TX_P14_14_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin7_TX_P22_1_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin7_TX_P23_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin8_RXA_P02_9_IN : IfxAsclin_PinMap.h , IfxAsclin_PinMap.c
  • IfxAsclin8_RXB_P02_10_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin8_RXC_P33_1_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin8_RXD_P33_6_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin8_RXE_P34_5_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin8_SCLK_P02_8_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin8_SLSO_P02_11_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin8_TX_P02_9_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin8_TX_P33_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin8_TX_P34_5_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin9_RXA_P01_5_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin9_RXB_P01_7_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin9_RXC_P14_7_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin9_RXD_P14_9_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin9_RXE_P20_6_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin9_RXF_P20_7_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin9_SCLK_P01_6_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin9_SLSO_P01_4_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin9_TX_P01_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin9_TX_P14_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin9_TX_P20_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin_cfg_indexMap : IfxAsclin_cfg.c , IfxAsclin_cfg.h
  • IfxAsclin_Cts_In_pinTable : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin_Rts_Out_pinTable : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin_Rx_In_pinTable : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin_Sclk_Out_pinTable : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin_Slso_Out_pinTable : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin_Tx_Out_pinTable : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxCan_cfg_indexMap : IfxCan_cfg.c , IfxCan_cfg.h
  • IfxCan_RXD00A_P02_1_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD00B_P20_7_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD00C_P12_0_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD00D_P33_12_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD00E_P33_7_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD00F_P01_8_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD00G_P34_2_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD00H_P02_14_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD01A_P15_3_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD01B_P14_1_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD01C_P01_4_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD01D_P33_10_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD01E_P02_10_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD02A_P15_1_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD02B_P02_3_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD02C_P32_6_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD02D_P14_8_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD02E_P10_2_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD03A_P00_3_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD03B_P32_2_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD03C_P20_0_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD03D_P11_10_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD03E_P20_9_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD03F_P01_0_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD10A_P00_1_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD10B_P14_7_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD10C_P23_0_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD10D_P13_1_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD11A_P02_4_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD11B_P00_5_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD11C_P23_7_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD11D_P11_7_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD12A_P20_6_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD12B_P10_8_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD12C_P23_3_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD12D_P11_8_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD13A_P14_7_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD13B_P33_5_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD13C_P22_5_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD13D_P11_13_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD20A_P10_5_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD20B_P10_8_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD20C_P34_2_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD20D_P02_14_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD20E_P01_8_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD20F_P11_14_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD21A_P00_3_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD21B_P13_12_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD21C_P20_0_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD21D_P32_2_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD21E_P01_0_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD21F_P22_7_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD22A_P33_13_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD22B_P32_7_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD22C_P23_6_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD22D_P14_14_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD22E_P22_9_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD23A_P14_10_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD23B_P23_3_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD23C_P14_15_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD23D_P13_5_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_RXD23E_P22_11_IN : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_Rxd_In_pinTable : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD00_P01_13_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD00_P02_0_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD00_P02_13_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD00_P12_1_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD00_P20_8_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD00_P33_13_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD00_P33_8_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD00_P34_1_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD01_P01_3_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD01_P02_9_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD01_P14_0_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD01_P15_2_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD01_P33_9_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD02_P02_2_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD02_P10_3_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD02_P14_10_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD02_P15_0_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD02_P32_5_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD03_P00_2_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD03_P01_2_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD03_P11_12_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD03_P20_10_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD03_P20_3_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD03_P32_3_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD10_P00_0_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD10_P13_0_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD10_P14_9_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD10_P23_1_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD11_P00_4_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD11_P02_5_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD11_P11_0_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD11_P23_6_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD12_P10_7_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD12_P11_1_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD12_P20_7_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD12_P23_2_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD13_P11_4_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD13_P14_6_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD13_P22_4_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD13_P33_4_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD20_P01_13_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD20_P02_13_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD20_P10_6_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD20_P10_7_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD20_P11_5_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD20_P34_1_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD21_P00_2_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD21_P01_2_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD21_P13_9_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD21_P20_3_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD21_P22_6_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD21_P32_3_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD22_P14_13_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD22_P22_8_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD22_P23_5_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD22_P32_6_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD22_P33_12_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD23_P13_4_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD23_P14_14_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD23_P14_9_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD23_P22_10_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_TXD23_P23_2_OUT : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCan_Txd_Out_pinTable : IfxCan_PinMap.c , IfxCan_PinMap.h
  • IfxCcu60_CC60_P02_0_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC60_P02_6_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC60_P11_12_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC60_P15_6_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC60_P34_2_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC60INA_P02_0_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC60INB_P00_1_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC60INC_P02_6_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC61_P02_2_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC61_P02_7_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC61_P11_11_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC61_P15_5_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC61_P34_4_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC61INA_P02_2_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC61INB_P00_3_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC61INC_P02_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC62_P02_4_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC62_P02_8_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC62_P11_10_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC62_P15_4_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC62_P33_14_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC62INA_P02_4_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC62INB_P00_5_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC62INC_P02_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CCPOS0A_P02_6_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CCPOS0C_P10_4_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CCPOS0D_P40_0_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CCPOS1A_P02_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CCPOS1B_P40_1_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CCPOS1C_P10_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CCPOS1D_P40_2_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CCPOS2A_P02_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CCPOS2B_P40_3_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CCPOS2C_P10_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CCPOS2D_P40_4_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT60_P02_1_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT60_P11_9_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT60_P15_7_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT60_P34_3_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT61_P02_3_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT61_P11_6_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT61_P15_8_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT61_P34_5_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT62_P02_5_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT62_P11_3_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT62_P14_0_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT62_P33_15_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT63_P00_0_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT63_P11_2_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT63_P14_1_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT63_P32_4_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT63_P34_1_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CTRAPA_P00_11_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_T12HRB_P00_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_T12HRC_P00_9_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_T12HRE_P00_0_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_T13HRB_P00_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_T13HRC_P00_9_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC60_P00_1_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC60_P00_7_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC60_P20_8_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC60_P33_13_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC60INA_P00_1_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC60INB_P02_0_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC60INC_P00_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC61_P00_3_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC61_P00_8_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC61_P20_9_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC61_P33_11_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC61INA_P00_3_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC61INB_P02_2_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC61INC_P00_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC62_P00_5_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC62_P00_9_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC62_P20_10_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC62_P33_9_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC62INA_P00_5_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC62INB_P02_4_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC62INC_P00_9_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CCPOS0A_P00_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CCPOS0C_P33_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CCPOS0D_P40_5_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CCPOS1A_P00_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CCPOS1B_P40_6_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CCPOS1C_P33_6_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CCPOS1D_P40_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CCPOS2A_P00_9_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CCPOS2B_P40_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CCPOS2C_P33_5_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CCPOS2D_P40_9_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_COUT60_P00_2_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_COUT60_P20_11_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_COUT60_P33_12_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_COUT61_P00_4_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_COUT61_P20_12_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_COUT61_P33_10_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_COUT62_P00_6_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_COUT62_P20_13_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_COUT62_P33_8_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_COUT63_P00_10_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_COUT63_P00_12_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_COUT63_P20_7_OUT : IfxCcu6_PinMap.h , IfxCcu6_PinMap.c
  • IfxCcu61_CTRAPA_P00_0_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CTRAPC_P33_4_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_T12HRB_P02_6_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_T12HRC_P02_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_T12HRE_P00_11_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_T13HRB_P02_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_T13HRC_P02_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_Cc60_Out_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_Cc60in_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_Cc61_Out_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_Cc61in_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_Cc62_Out_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_Cc62in_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_Ccpos0_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_Ccpos1_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_Ccpos2_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_cfg_indexMap : IfxCcu6_cfg.c , IfxCcu6_cfg.h
  • IfxCcu6_Cout60_Out_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_Cout61_Out_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_Cout62_Out_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_Cout63_Out_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_Ctrap_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_PwmHl_modes : IfxCcu6_PwmHl.c
  • IfxCcu6_T12hr_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_T13hr_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCpu_cfg_indexMap : IfxCpu_cfg.c , IfxCpu_cfg.h
  • IfxDmu_Fdest_In_pinTable : IfxDmu_PinMap.c , IfxDmu_PinMap.h
  • IfxDmu_FDEST_P21_0_IN : IfxDmu_PinMap.c , IfxDmu_PinMap.h
  • IfxEdsadc_Cgpwm_Out_pinTable : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_CGPWMN_P00_5_OUT : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_CGPWMN_P02_0_OUT : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_CGPWMN_P33_11_OUT : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_CGPWMP_P00_6_OUT : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_CGPWMP_P02_1_OUT : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_CGPWMP_P33_12_OUT : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DS0NA_AN3_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DS0NB_AN13_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DS0PA_AN2_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DS0PB_AN12_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DS1NA_P40_7_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DS1NB_P40_9_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DS1NC_AN45_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DS1ND_AN47_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DS1PA_P40_6_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DS1PB_P40_8_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DS1PC_AN44_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DS1PD_AN46_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DS2NA_AN21_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DS2NB_P40_1_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DS2PA_AN20_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DS2PB_P40_0_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DS3NA_AN1_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DS3NB_AN15_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DS3PA_AN0_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DS3PB_AN14_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DS4NA_P00_7_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DS4NB_P00_9_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DS4PA_P00_8_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DS4PB_P00_10_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DS5NA_P00_1_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DS5NB_P00_3_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DS5PA_P00_2_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DS5PB_P00_4_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DS6NA_AN53_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DS6NB_P41_5_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DS6PA_AN52_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DS6PB_P41_4_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DS7NA_AN61_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DS7NB_P41_7_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DS7PA_AN60_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DS7PB_P41_6_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DS8NA_P41_1_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DS8PA_P41_0_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DS9NA_AN51_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DS9NB_P41_3_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DS9PA_AN50_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DS9PB_P41_2_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DSCIN0A_P00_11_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DSCIN0B_P33_5_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DSCIN1A_P00_9_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DSCIN1B_P33_3_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DSCIN2A_P00_5_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DSCIN2B_P33_1_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DSCIN3A_P00_3_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DSCIN3B_P02_7_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DSCIN4A_P00_7_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DSCIN4B_P02_5_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DSCIN5A_P00_1_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DSCIN5B_P02_3_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DSCIN6A_P00_14_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DSCIN7A_P01_2_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DSCIN7B_P00_1_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DSCIN8A_P01_5_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DSCIN9A_P01_9_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_Dscin_In_pinTable : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DSCOUT0_P00_11_OUT : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DSCOUT0_P33_5_OUT : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DSCOUT1_P00_9_OUT : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DSCOUT1_P33_3_OUT : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DSCOUT2_P00_5_OUT : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DSCOUT2_P33_1_OUT : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DSCOUT3_P00_3_OUT : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DSCOUT3_P02_7_OUT : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DSCOUT4_P00_7_OUT : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DSCOUT4_P02_5_OUT : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DSCOUT5_P00_1_OUT : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DSCOUT5_P02_3_OUT : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DSCOUT6_P00_14_OUT : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DSCOUT7_P00_1_OUT : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DSCOUT7_P01_2_OUT : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DSCOUT8_P01_5_OUT : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DSCOUT9_P01_9_OUT : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_Dscout_Out_pinTable : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DSDIN0A_P00_12_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DSDIN0B_P33_6_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DSDIN1A_P00_10_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DSDIN1B_P33_4_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DSDIN2A_P00_6_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DSDIN2B_P33_2_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DSDIN3A_P00_4_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DSDIN3B_P02_8_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DSDIN4A_P00_8_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DSDIN4B_P02_6_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DSDIN5A_P00_2_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DSDIN5B_P02_4_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DSDIN6A_P00_13_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DSDIN7A_P01_15_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DSDIN7B_P00_2_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DSDIN8A_P01_6_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_DSDIN9A_P01_8_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_Dsdin_In_pinTable : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_Dsn_In_pinTable : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_Dsp_In_pinTable : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_ITR0E_P33_0_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_ITR0F_P33_4_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_ITR1E_P33_1_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_ITR1F_P33_5_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_ITR2E_P33_2_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_ITR2F_P33_6_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_ITR3E_P02_8_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_ITR3F_P00_9_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_ITR4E_P02_7_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_ITR4F_P00_6_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_ITR5E_P02_6_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_ITR5F_P00_3_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_ITR6E_P01_0_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_ITR6F_P00_15_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_ITR7E_P01_4_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_ITR7F_P01_3_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_ITR8E_P01_1_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_ITR8F_P01_7_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_ITR9E_P01_11_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_ITR9F_P01_10_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_Itr_In_pinTable : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_Sg_In_pinTable : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_SGNA_P00_4_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEdsadc_SGNB_P33_13_IN : IfxEdsadc_PinMap.c , IfxEdsadc_PinMap.h
  • IfxEray0_RXDA0_P14_8_IN : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_RXDA1_P11_9_IN : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_RXDA2_P02_1_IN : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_RXDA3_P14_1_IN : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_RXDB0_P14_7_IN : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_RXDB1_P11_10_IN : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_RXDB2_P02_3_IN : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_RXDB3_P14_1_IN : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXDA_P02_0_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXDA_P11_3_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXDA_P14_0_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXDA_P14_10_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXDB_P02_2_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXDB_P11_12_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXDB_P14_0_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXDB_P14_5_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXENA_P02_4_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXENA_P11_6_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXENA_P14_9_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXENB_P02_5_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXENB_P11_11_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXENB_P11_6_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXENB_P14_6_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXENB_P14_9_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray1_RXDA0_P14_8_IN : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray1_RXDA1_P01_1_IN : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray1_RXDB0_P14_7_IN : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray1_RXDB1_P01_8_IN : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray1_TXDA_P01_12_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray1_TXDA_P14_10_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray1_TXDB_P01_13_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray1_TXDB_P14_5_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray1_TXENA_P01_14_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray1_TXENA_P14_9_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray1_TXENB_P02_15_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray1_TXENB_P14_6_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray_cfg_indexMap : IfxEray_cfg.c , IfxEray_cfg.h
  • IfxEray_Rxd_In_pinTable : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray_Txd_Out_pinTable : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray_Txen_Out_pinTable : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEvadc_Adc_masterIndex : IfxEvadc_Adc.c
  • IfxEvadc_cfg_srcAddresses : IfxEvadc_cfg.c , IfxEvadc_cfg.h
  • IfxEvadc_EMUX00_P02_6_OUT : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_EMUX00_P33_3_OUT : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_EMUX01_P02_7_OUT : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_EMUX01_P33_2_OUT : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_EMUX02_P02_8_OUT : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_EMUX02_P33_1_OUT : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_EMUX10_P00_6_OUT : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_EMUX10_P33_6_OUT : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_EMUX11_P00_7_OUT : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_EMUX11_P33_5_OUT : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_EMUX12_P00_8_OUT : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_EMUX12_P33_4_OUT : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_Emux_Out_pinTable : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_FC0BFLOUT_P00_5_OUT : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_FC0BFLOUT_P33_4_OUT : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_FC0CH0_AN16_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_FC1BFLOUT_P10_1_OUT : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_FC1BFLOUT_P33_6_OUT : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_FC1CH0_P40_10_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_FC2BFLOUT_P00_7_OUT : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_FC2BFLOUT_P33_0_OUT : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_FC2BFLOUT_P33_5_OUT : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_FC2CH0_P00_12_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_FC3BFLOUT_P10_2_OUT : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_FC3BFLOUT_P33_2_OUT : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_FC3BFLOUT_P33_7_OUT : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_FC3CH0_P00_11_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G0CH0_AN0_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G0CH1_AN1_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G0CH2_AN2_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G0CH3_AN3_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G0CH4_AN4_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G0CH5_AN5_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G0CH6_AN6_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G0CH7_AN7_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G10CH0_P33_7_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G10CH10_P34_2_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G10CH11_P34_1_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G10CH1_P33_6_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G10CH2_P33_5_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G10CH3_P33_4_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G10CH4_P33_3_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G10CH5_P33_2_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G10CH6_P33_1_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G10CH7_P33_0_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G10CH8_P34_4_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G10CH9_P34_3_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G11CH0_AN4_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G11CH10_P40_2_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G11CH11_P40_3_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G11CH12_P40_4_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G11CH13_P40_5_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G11CH14_AN34_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G11CH15_AN35_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G11CH1_AN5_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G11CH2_AN6_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G11CH3_AN7_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G11CH4_AN8_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G11CH5_AN9_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G11CH6_AN10_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G11CH7_AN11_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G11CH8_P40_11_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G11CH9_P40_12_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G1CH0_AN8_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G1CH1_AN9_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G1CH2_AN10_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G1CH3_AN11_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G1CH4_AN12_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G1CH5_AN13_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G1CH6_AN14_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G1CH7_AN15_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G2CH0_AN16_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G2CH1_P40_10_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G2CH2_P40_11_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G2CH3_P40_12_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G2CH4_AN20_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G2CH5_AN21_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G2CH6_AN22_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G2CH7_AN23_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G3CH0_P40_0_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G3CH1_P40_1_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G3CH2_P40_2_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G3CH3_P40_3_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G3CH4_P40_13_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G3CH5_P40_14_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G3CH6_AN30_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G3CH7_AN31_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G4CH0_AN40_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G4CH1_AN41_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G4CH2_AN42_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G4CH3_AN43_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G4CH4_P40_13_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G4CH5_P40_14_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G4CH6_AN30_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G4CH7_AN31_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G5CH0_AN48_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G5CH1_AN49_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G5CH2_AN50_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G5CH3_AN51_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G5CH4_AN52_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G5CH5_AN53_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G5CH6_P41_4_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G5CH7_P41_5_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G6CH0_AN56_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G6CH1_AN57_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G6CH2_AN58_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G6CH3_AN59_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G6CH4_AN60_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G6CH5_AN61_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G6CH6_P41_6_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G6CH7_P41_7_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G7CH0_P41_8_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G7CH1_AN65_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G7CH2_AN66_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G7CH3_P40_15_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G7CH4_P41_0_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G7CH5_P41_1_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G7CH6_P41_2_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G7CH7_P41_3_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G8CH0_P40_4_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G8CH10_AN42_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G8CH11_AN43_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G8CH12_AN44_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G8CH13_AN45_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G8CH14_AN46_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G8CH15_AN47_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G8CH1_P40_5_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G8CH2_AN34_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G8CH3_AN35_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G8CH4_P40_6_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G8CH5_P40_7_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G8CH6_P40_8_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G8CH7_P40_9_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G8CH8_AN40_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G8CH9_AN41_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G9CH0_P00_12_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G9CH10_P00_2_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G9CH11_P00_1_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G9CH12_P01_5_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G9CH13_P01_4_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G9CH14_P01_3_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G9CH15_P02_11_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G9CH1_P00_11_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G9CH2_P00_10_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G9CH3_P00_9_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G9CH4_P00_8_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G9CH5_P00_7_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G9CH6_P00_6_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G9CH7_P00_5_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G9CH8_P00_4_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_G9CH9_P00_3_IN : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_GxBfl_Out_pinTable : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxEvadc_Vadcg_In_pinTable : IfxEvadc_PinMap.c , IfxEvadc_PinMap.h
  • IfxFlash_dFlashTableCfsLog : IfxFlash_cfg.c , IfxFlash_cfg.h
  • IfxFlash_dFlashTableEepLog : IfxFlash_cfg.c , IfxFlash_cfg.h
  • IfxFlash_dFlashTableHsmLog : IfxFlash_cfg.c , IfxFlash_cfg.h
  • IfxFlash_dFlashTablePhys : IfxFlash_cfg.c , IfxFlash_cfg.h
  • IfxFlash_dFlashTableUcbLog : IfxFlash_cfg.c , IfxFlash_cfg.h
  • IfxFlash_pFlashTableLog : IfxFlash_cfg.c , IfxFlash_cfg.h
  • IfxFlash_pFlashTablePhys : IfxFlash_cfg.c , IfxFlash_cfg.h
  • IfxGeth_cfg_indexMap : IfxGeth_cfg.c , IfxGeth_cfg.h
  • IfxGeth_Col_In_pinTable : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_COL_P11_15_IN : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_Crs_In_pinTable : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_CRSA_P11_14_IN : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_CRSB_P11_11_IN : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_Crsdv_In_pinTable : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_CRSDVA_P11_11_IN : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_CRSDVB_P11_14_IN : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_Eth_rxDescrList : IfxGeth_Eth.c , IfxGeth_Eth.h
  • IfxGeth_Eth_txDescrList : IfxGeth_Eth.c , IfxGeth_Eth.h
  • IfxGeth_Grefclk_In_pinTable : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_GREFCLK_P11_5_IN : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_Mdc_Out_pinTable : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_MDC_P02_8_OUT : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_MDC_P12_0_OUT : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_MDC_P21_2_OUT : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_Mdio_InOut_pinTable : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_MDIO_P00_0_INOUT : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_MDIO_P12_1_INOUT : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_MDIO_P21_3_INOUT : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_Pps_Out_pinTable : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_PPS_P14_4_OUT : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_Refclk_In_pinTable : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_REFCLKA_P11_12_IN : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_Rxclk_In_pinTable : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_RXCLKA_P11_12_IN : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_RXCLKB_P11_4_IN : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_RXCLKC_P12_0_IN : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_Rxctl_In_pinTable : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_RXCTLA_P11_11_IN : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_RXD0A_P11_10_IN : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_RXD1A_P11_9_IN : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_RXD2A_P11_8_IN : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_RXD3A_P11_7_IN : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_Rxd_In_pinTable : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_Rxdv_In_pinTable : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_RXDVA_P11_11_IN : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_RXDVB_P11_14_IN : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_Rxer_In_pinTable : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_RXERA_P11_13_IN : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_RXERB_P21_7_IN : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_RXERC_P10_0_IN : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_Txclk_In_pinTable : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_Txclk_Out_pinTable : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_TXCLK_P11_4_OUT : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_TXCLKA_P11_5_IN : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_TXCLKB_P11_12_IN : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_Txctl_Out_pinTable : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_TXCTL_P11_6_OUT : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_TXD0_P11_3_OUT : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_TXD1_P11_2_OUT : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_TXD2_P11_1_OUT : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_TXD3_P11_0_OUT : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_Txd_Out_pinTable : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_Txen_Out_pinTable : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_TXEN_P11_6_OUT : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_Txer_Out_pinTable : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGeth_TXER_P11_4_OUT : IfxGeth_PinMap.c , IfxGeth_PinMap.h
  • IfxGpt120_CAPINA_P13_2_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T2EUDA_P00_8_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T2EUDB_P33_6_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T2INA_P00_7_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T2INB_P33_7_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T3EUDA_P02_7_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T3EUDB_P10_7_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T3INA_P02_6_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T3INB_P10_4_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T3OUT_P10_6_OUT : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T3OUT_P21_6_OUT : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T4EUDA_P00_9_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T4EUDB_P33_5_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T4INA_P02_8_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T4INB_P10_8_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T5EUDA_P21_6_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T5EUDB_P10_1_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T5INA_P21_7_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T5INB_P10_3_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T6EUDA_P20_0_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T6EUDB_P10_0_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T6INA_P20_3_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T6INB_P10_2_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T6OUT_P10_5_OUT : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T6OUT_P21_7_OUT : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt12_Capin_In_pinTable : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt12_TxEud_In_pinTable : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt12_TxIn_In_pinTable : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt12_TxOut_Out_pinTable : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGtm_ATOM0_0_TOUT0_P02_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_0_TOUT48_P22_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_0_TOUT53_P21_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_0_TOUT85_P14_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_0_TOUT8_P02_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_0_TOUT9_P00_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_0N_TOUT112_P01_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_0N_TOUT17_P00_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_0N_TOUT43_P23_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_0N_TOUT54_P21_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_0N_TOUT7_P02_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_1_TOUT10_P00_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_1_TOUT116_P02_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_1_TOUT11_P00_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_1_TOUT1_P02_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_1_TOUT31_P33_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_1_TOUT47_P22_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_1_TOUT54_P21_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_1_TOUT84_P14_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_1N_TOUT113_P01_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_1N_TOUT14_P00_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_1N_TOUT39_P32_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_1N_TOUT41_P23_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_1N_TOUT4_P02_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_1N_TOUT50_P22_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_1N_TOUT53_P21_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_1N_TOUT55_P21_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_1N_TOUT57_P21_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_1N_TOUT61_P20_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_2_TOUT117_P02_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_2_TOUT12_P00_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_2_TOUT2_P02_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_2_TOUT33_P33_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_2_TOUT42_P23_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_2_TOUT46_P23_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_2_TOUT55_P21_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_2_TOUT83_P14_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_2N_TOUT114_P01_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_2N_TOUT15_P00_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_2N_TOUT23_P33_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_2N_TOUT40_P32_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_2N_TOUT41_P23_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_2N_TOUT44_P23_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_2N_TOUT56_P21_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_2N_TOUT58_P21_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_2N_TOUT5_P02_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_2N_TOUT65_P20_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_3_TOUT118_P02_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_3_TOUT13_P00_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_3_TOUT38_P32_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_3_TOUT3_P02_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_3_TOUT49_P22_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_3_TOUT56_P21_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_3_TOUT60_P20_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_3_TOUT82_P14_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_3N_TOUT115_P01_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_3N_TOUT16_P00_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_3N_TOUT24_P33_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_3N_TOUT42_P23_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_3N_TOUT45_P23_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_3N_TOUT59_P20_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_3N_TOUT66_P20_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_3N_TOUT6_P02_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_4_TOUT146_P34_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_4_TOUT14_P00_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_4_TOUT29_P33_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_ATOM0_4_TOUT39_P32_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_4_TOUT4_P02_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_4_TOUT50_P22_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_4_TOUT57_P21_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_4_TOUT61_P20_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_4_TOUT81_P14_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_4N_TOUT118_P02_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_4N_TOUT135_P22_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_4N_TOUT13_P00_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_4N_TOUT147_P34_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_4N_TOUT3_P02_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_5_TOUT15_P00_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_5_TOUT23_P33_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_5_TOUT40_P32_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_5_TOUT41_P23_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_5_TOUT58_P21_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_5_TOUT5_P02_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_5N_TOUT0_P02_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_5N_TOUT136_P22_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_5N_TOUT148_P34_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_5N_TOUT26_P33_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_5N_TOUT8_P02_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_5N_TOUT9_P00_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_6_TOUT106_P10_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_6_TOUT16_P00_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_6_TOUT24_P33_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_6_TOUT42_P23_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_6_TOUT59_P20_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_6_TOUT6_P02_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_6N_TOUT10_P00_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_6N_TOUT116_P02_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_6N_TOUT11_P00_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_6N_TOUT137_P22_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_6N_TOUT149_P34_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_6N_TOUT1_P02_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_6N_TOUT27_P33_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_7_TOUT17_P00_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_7_TOUT25_P33_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_7_TOUT45_P23_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_7_TOUT64_P20_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_7_TOUT7_P02_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_7N_TOUT117_P02_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_7N_TOUT12_P00_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_7N_TOUT150_P34_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_7N_TOUT28_P33_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_7N_TOUT2_P02_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_0_TOUT0_P02_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_0_TOUT109_P10_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_0_TOUT68_P20_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_0_TOUT76_P15_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_0_TOUT77_P15_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_0_TOUT87_P14_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_0_TOUT8_P02_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_0_TOUT9_P00_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_0N_TOUT112_P01_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_0N_TOUT17_P00_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_0N_TOUT7_P02_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_1_TOUT103_P10_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_1_TOUT10_P00_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_1_TOUT116_P02_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_1_TOUT11_P00_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_1_TOUT1_P02_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_1_TOUT31_P33_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_1_TOUT69_P20_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_1_TOUT78_P15_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_1_TOUT79_P15_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_1_TOUT86_P14_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_1N_TOUT102_P10_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_1N_TOUT113_P01_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_1N_TOUT14_P00_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_1N_TOUT39_P32_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_1N_TOUT4_P02_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_1N_TOUT61_P20_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_1N_TOUT72_P15_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_2_TOUT104_P10_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_2_TOUT107_P10_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_2_TOUT117_P02_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_2_TOUT12_P00_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_2_TOUT2_P02_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_2_TOUT33_P33_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_2_TOUT70_P20_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_2_TOUT80_P14_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_2N_TOUT110_P10_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_2N_TOUT114_P01_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_2N_TOUT15_P00_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_2N_TOUT23_P33_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_2N_TOUT40_P32_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_2N_TOUT41_P23_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_2N_TOUT5_P02_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_2N_TOUT73_P15_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_3_TOUT105_P10_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_3_TOUT108_P10_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_3_TOUT118_P02_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_3_TOUT13_P00_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_3_TOUT38_P32_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_3_TOUT3_P02_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_3_TOUT60_P20_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_3_TOUT71_P15_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_3N_TOUT106_P10_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_3N_TOUT115_P01_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_3N_TOUT16_P00_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_3N_TOUT24_P33_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_3N_TOUT42_P23_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_3N_TOUT6_P02_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_3N_TOUT74_P15_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_4_TOUT102_P10_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_4_TOUT130_P22_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_4_TOUT146_P34_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_4_TOUT14_P00_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_4_TOUT29_P33_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_4_TOUT39_P32_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_4_TOUT4_P02_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_4_TOUT61_P20_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_4_TOUT72_P15_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_4N_TOUT105_P10_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_4N_TOUT108_P10_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_4N_TOUT118_P02_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_4N_TOUT131_P22_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_4N_TOUT13_P00_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_4N_TOUT147_P34_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_4N_TOUT3_P02_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_4N_TOUT71_P15_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_4N_TOUT75_P15_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_5_TOUT110_P10_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_5_TOUT15_P00_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_5_TOUT23_P33_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_5_TOUT40_P32_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_5_TOUT41_P23_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_5_TOUT5_P02_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_5_TOUT65_P20_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_5_TOUT73_P15_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_5N_TOUT0_P02_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_5N_TOUT109_P10_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_5N_TOUT132_P22_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_5N_TOUT148_P34_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_5N_TOUT26_P33_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_5N_TOUT76_P15_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_5N_TOUT77_P15_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_5N_TOUT8_P02_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_5N_TOUT9_P00_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_6_TOUT106_P10_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_6_TOUT16_P00_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_6_TOUT24_P33_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_6_TOUT42_P23_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_6_TOUT66_P20_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_6_TOUT6_P02_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_6_TOUT74_P15_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_6N_TOUT103_P10_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_6N_TOUT10_P00_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_6N_TOUT116_P02_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_6N_TOUT11_P00_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_6N_TOUT133_P22_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_6N_TOUT149_P34_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_6N_TOUT1_P02_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_6N_TOUT27_P33_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_6N_TOUT78_P15_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_7_TOUT17_P00_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_7_TOUT25_P33_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_7_TOUT45_P23_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_7_TOUT67_P20_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_7_TOUT75_P15_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_7_TOUT7_P02_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_7N_TOUT104_P10_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_7N_TOUT107_P10_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_7N_TOUT117_P02_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_7N_TOUT12_P00_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_7N_TOUT134_P22_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_7N_TOUT150_P34_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_7N_TOUT28_P33_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_7N_TOUT2_P02_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_7N_TOUT79_P15_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_0_TOUT109_P10_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_0_TOUT18_P00_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_0_TOUT26_P33_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_0_TOUT32_P33_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_0_TOUT94_P13_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_0N_TOUT101_P11_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_0N_TOUT108_P10_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_0N_TOUT12_P00_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_0N_TOUT144_P33_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_0N_TOUT25_P33_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_0N_TOUT32_P33_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_0N_TOUT37_P32_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_1_TOUT102_P10_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_1_TOUT19_P00_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_1_TOUT27_P33_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_1_TOUT43_P23_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_1_TOUT90_P14_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_1_TOUT95_P11_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_1N_TOUT105_P10_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_1N_TOUT167_P00_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_1N_TOUT22_P33_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_1N_TOUT30_P33_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_1N_TOUT34_P33_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_1N_TOUT51_P21_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_1N_TOUT90_P14_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_1N_TOUT91_P13_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_1N_TOUT98_P11_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_1N_TOUT9_P00_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_2_TOUT103_P10_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_2_TOUT20_P00_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_2_TOUT28_P33_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_2_TOUT44_P23_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_2_TOUT88_P14_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_2_TOUT96_P11_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_2N_TOUT106_P10_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_2N_TOUT10_P00_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_2N_TOUT114_P01_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_2N_TOUT138_P23_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_2N_TOUT166_P00_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_2N_TOUT23_P33_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_2N_TOUT31_P33_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_2N_TOUT35_P33_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_2N_TOUT52_P21_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_2N_TOUT91_P13_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_2N_TOUT92_P13_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_2N_TOUT99_P11_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_3_TOUT104_P10_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_3_TOUT21_P00_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_3_TOUT29_P33_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_3_TOUT89_P14_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_3_TOUT97_P11_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_3N_TOUT100_P11_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_3N_TOUT107_P10_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_3N_TOUT115_P01_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_3N_TOUT11_P00_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_3N_TOUT139_P23_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_3N_TOUT143_P33_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_3N_TOUT168_P00_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_3N_TOUT24_P33_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_3N_TOUT33_P33_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_3N_TOUT36_P32_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_3N_TOUT62_P20_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_3N_TOUT92_P13_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_3N_TOUT93_P13_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_4_TOUT167_P00_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_4_TOUT22_P33_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_4_TOUT30_P33_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_4_TOUT34_P33_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_4_TOUT51_P21_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_4_TOUT90_P14_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_4_TOUT98_P11_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_4N_TOUT29_P33_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_4N_TOUT57_P21_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_4N_TOUT86_P14_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_4N_TOUT97_P11_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_5_TOUT138_P23_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_5_TOUT166_P00_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_5_TOUT35_P33_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_5_TOUT52_P21_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_5_TOUT65_P20_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_5_TOUT91_P13_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_5_TOUT99_P11_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_5N_TOUT120_P11_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_5N_TOUT26_P33_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_5N_TOUT59_P20_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_5N_TOUT87_P14_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_5N_TOUT94_P13_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_6_TOUT100_P11_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_6_TOUT139_P23_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_6_TOUT143_P33_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_6_TOUT168_P00_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_6_TOUT36_P32_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_6_TOUT62_P20_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_6_TOUT92_P13_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_6N_TOUT27_P33_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_6N_TOUT60_P20_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_6N_TOUT88_P14_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_6N_TOUT95_P11_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_7_TOUT101_P11_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_7_TOUT140_P32_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_7_TOUT144_P33_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_7_TOUT37_P32_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_7_TOUT63_P20_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_7_TOUT93_P13_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_7N_TOUT28_P33_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_7N_TOUT61_P20_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_7N_TOUT89_P14_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_7N_TOUT96_P11_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_0_TOUT18_P00_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_0_TOUT26_P33_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_0_TOUT32_P33_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_0_TOUT65_P20_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_0_TOUT94_P13_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_0N_TOUT101_P11_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_0N_TOUT144_P33_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_0N_TOUT17_P00_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_0N_TOUT25_P33_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_0N_TOUT32_P33_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_0N_TOUT37_P32_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_0N_TOUT63_P20_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_0N_TOUT76_P15_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_1_TOUT111_P01_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_1_TOUT128_P12_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_1_TOUT19_P00_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_1_TOUT27_P33_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_1_TOUT43_P23_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_1_TOUT64_P20_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_1_TOUT90_P14_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_1_TOUT95_P11_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_1N_TOUT14_P00_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_1N_TOUT167_P00_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_1N_TOUT22_P33_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_1N_TOUT30_P33_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_1N_TOUT34_P33_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_1N_TOUT51_P21_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_1N_TOUT79_P15_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_1N_TOUT90_P14_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_1N_TOUT91_P13_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_1N_TOUT98_P11_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_2_TOUT112_P01_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_2_TOUT20_P00_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_2_TOUT28_P33_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_2_TOUT44_P23_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_2_TOUT63_P20_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_2_TOUT88_P14_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_2_TOUT96_P11_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_2N_TOUT114_P01_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_2N_TOUT15_P00_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_2N_TOUT166_P00_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_2N_TOUT23_P33_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_2N_TOUT31_P33_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_2N_TOUT35_P33_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_2N_TOUT52_P21_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_2N_TOUT78_P15_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_2N_TOUT91_P13_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_2N_TOUT92_P13_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_2N_TOUT99_P11_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_3_TOUT113_P01_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_3_TOUT21_P00_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_3_TOUT29_P33_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_3_TOUT62_P20_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_3_TOUT89_P14_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_3_TOUT97_P11_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_3N_TOUT100_P11_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_3N_TOUT115_P01_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_3N_TOUT143_P33_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_3N_TOUT168_P00_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_3N_TOUT16_P00_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_3N_TOUT24_P33_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_3N_TOUT33_P33_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_3N_TOUT36_P32_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_3N_TOUT62_P20_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_3N_TOUT77_P15_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_3N_TOUT92_P13_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_3N_TOUT93_P13_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_4_TOUT114_P01_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_4_TOUT131_P22_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_4_TOUT167_P00_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_4_TOUT22_P33_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_4_TOUT30_P33_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_4_TOUT34_P33_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_4_TOUT51_P21_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_4_TOUT90_P14_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_4_TOUT98_P11_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_4N_TOUT135_P22_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_4N_TOUT21_P00_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_4N_TOUT29_P33_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_4N_TOUT57_P21_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_4N_TOUT86_P14_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_4N_TOUT97_P11_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_5_TOUT115_P01_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_5_TOUT132_P22_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_5_TOUT166_P00_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_5_TOUT35_P33_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_5_TOUT52_P21_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_5_TOUT64_P20_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_5_TOUT91_P13_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_5_TOUT99_P11_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_5N_TOUT120_P11_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_5N_TOUT136_P22_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_5N_TOUT18_P00_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_5N_TOUT26_P33_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_5N_TOUT59_P20_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_5N_TOUT87_P14_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_5N_TOUT94_P13_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_6_TOUT100_P11_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_6_TOUT133_P22_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_6_TOUT143_P33_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_6_TOUT168_P00_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_6_TOUT36_P32_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_6_TOUT62_P20_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_6_TOUT92_P13_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_6N_TOUT137_P22_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_6N_TOUT19_P00_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_6N_TOUT27_P33_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_6N_TOUT60_P20_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_6N_TOUT88_P14_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_6N_TOUT95_P11_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_7_TOUT101_P11_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_7_TOUT134_P22_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_7_TOUT144_P33_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_7_TOUT37_P32_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_7_TOUT63_P20_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_7_TOUT93_P13_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_7N_TOUT20_P00_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_7N_TOUT28_P33_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_7N_TOUT61_P20_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_7N_TOUT89_P14_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_7N_TOUT96_P11_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_0_TOUT109_P10_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_0_TOUT39_P32_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_0_TOUT48_P22_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_0_TOUT53_P21_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_0_TOUT68_P20_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_0_TOUT76_P15_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_0_TOUT77_P15_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_0_TOUT85_P14_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_0_TOUT87_P14_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_0N_TOUT87_P14_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_1_TOUT103_P10_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_1_TOUT41_P23_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_1_TOUT47_P22_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_1_TOUT54_P21_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_1_TOUT69_P20_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_1_TOUT78_P15_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_1_TOUT79_P15_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_1_TOUT84_P14_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_1_TOUT86_P14_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_1N_TOUT102_P10_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_1N_TOUT44_P23_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_1N_TOUT50_P22_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_1N_TOUT53_P21_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_1N_TOUT57_P21_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_1N_TOUT72_P15_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_1N_TOUT85_P14_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_1N_TOUT86_P14_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_2_TOUT104_P10_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_2_TOUT107_P10_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_2_TOUT42_P23_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_2_TOUT46_P23_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_2_TOUT55_P21_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_2_TOUT70_P20_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_2_TOUT80_P14_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_2_TOUT83_P14_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_2N_TOUT110_P10_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_2N_TOUT45_P23_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_2N_TOUT52_P21_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_2N_TOUT58_P21_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_2N_TOUT65_P20_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_2N_TOUT73_P15_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_2N_TOUT81_P14_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_3_TOUT105_P10_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_3_TOUT108_P10_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_3_TOUT43_P23_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_3_TOUT49_P22_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_3_TOUT56_P21_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_3_TOUT71_P15_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_3_TOUT82_P14_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_3N_TOUT106_P10_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_3N_TOUT46_P23_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_3N_TOUT51_P21_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_3N_TOUT59_P20_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_3N_TOUT66_P20_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_3N_TOUT74_P15_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_3N_TOUT80_P14_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_4_TOUT102_P10_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_4_TOUT111_P01_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_4_TOUT131_P22_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_4_TOUT264_P13_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_4_TOUT44_P23_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_4_TOUT50_P22_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_4_TOUT57_P21_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_4_TOUT72_P15_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_4_TOUT81_P14_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_4N_TOUT105_P10_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_4N_TOUT108_P10_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_4N_TOUT132_P22_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_4N_TOUT21_P00_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_4N_TOUT56_P21_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_4N_TOUT71_P15_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_4N_TOUT75_P15_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_4N_TOUT95_P11_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_5_TOUT110_P10_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_5_TOUT116_P02_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_5_TOUT128_P12_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_5_TOUT130_P22_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_5_TOUT45_P23_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_5_TOUT56_P21_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_5_TOUT58_P21_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_5_TOUT65_P20_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_5_TOUT73_P15_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_5N_TOUT109_P10_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_5N_TOUT121_P11_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_5N_TOUT133_P22_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_5N_TOUT18_P00_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_5N_TOUT76_P15_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_5N_TOUT77_P15_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_6_TOUT106_P10_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_6_TOUT117_P02_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_6_TOUT129_P12_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_6_TOUT139_P23_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_6_TOUT46_P23_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_6_TOUT59_P20_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_6_TOUT66_P20_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_6_TOUT74_P15_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_6N_TOUT103_P10_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_6N_TOUT134_P22_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_6N_TOUT19_P00_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_6N_TOUT78_P15_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_6N_TOUT97_P11_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_7_TOUT118_P02_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_7_TOUT119_P11_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_7_TOUT138_P23_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_7_TOUT40_P32_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_7_TOUT64_P20_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_7_TOUT67_P20_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_7_TOUT75_P15_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_7N_TOUT104_P10_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_7N_TOUT107_P10_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_7N_TOUT124_P11_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_7N_TOUT135_P22_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_7N_TOUT20_P00_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM4_7N_TOUT79_P15_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_0_TOUT119_P11_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_0_TOUT130_P22_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_0_TOUT146_P34_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_0_TOUT155_P01_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_0_TOUT162_P01_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_0_TOUT174_P31_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_0_TOUT206_P25_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_0_TOUT249_P13_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_0_TOUT258_P14_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_0N_TOUT126_P11_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_0N_TOUT134_P22_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_0N_TOUT150_P34_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_0N_TOUT161_P01_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_0N_TOUT181_P31_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_0N_TOUT213_P25_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_0N_TOUT261_P14_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_0N_TOUT264_P13_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_1_TOUT120_P11_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_1_TOUT131_P22_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_1_TOUT147_P34_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_1_TOUT156_P01_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_1_TOUT164_P01_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_1_TOUT175_P31_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_1_TOUT207_P25_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_1_TOUT242_P15_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_1_TOUT253_P13_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_1_TOUT265_P10_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_1N_TOUT123_P11_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_1N_TOUT128_P12_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_1N_TOUT135_P22_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_1N_TOUT140_P32_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_1N_TOUT158_P01_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_1N_TOUT178_P31_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_1N_TOUT210_P25_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_1N_TOUT245_P15_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_1N_TOUT248_P13_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_1N_TOUT260_P14_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_1N_TOUT268_P10_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_2_TOUT121_P11_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_2_TOUT132_P22_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_2_TOUT148_P34_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_2_TOUT152_P02_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_2_TOUT157_P01_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_2_TOUT176_P31_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_2_TOUT208_P25_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_2_TOUT243_P15_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_2_TOUT254_P13_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_2_TOUT266_P10_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_2N_TOUT124_P11_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_2N_TOUT136_P22_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_2N_TOUT141_P32_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_2N_TOUT159_P01_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_2N_TOUT179_P31_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_2N_TOUT211_P25_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_2N_TOUT246_P15_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_2N_TOUT250_P13_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_2N_TOUT259_P14_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_2N_TOUT269_P10_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_3_TOUT122_P11_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_3_TOUT133_P22_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_3_TOUT149_P34_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_3_TOUT163_P01_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_3_TOUT165_P01_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_3_TOUT177_P31_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_3_TOUT209_P25_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_3_TOUT244_P15_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_3_TOUT255_P13_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_3_TOUT267_P10_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_3N_TOUT123_P11_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_3N_TOUT125_P11_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_3N_TOUT137_P22_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_3N_TOUT142_P32_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_3N_TOUT160_P01_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_3N_TOUT180_P31_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_3N_TOUT212_P25_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_3N_TOUT212_P26_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_3N_TOUT247_P15_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_3N_TOUT249_P13_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_3N_TOUT263_P14_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_3N_TOUT270_P10_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_4_TOUT123_P11_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_4_TOUT134_P22_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_4_TOUT150_P34_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_4_TOUT158_P01_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_4_TOUT178_P31_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_4_TOUT210_P25_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_4_TOUT245_P15_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_4_TOUT248_P13_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_4_TOUT268_P10_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_4N_TOUT122_P11_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_4N_TOUT129_P12_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_4N_TOUT163_P01_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_4N_TOUT165_P01_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_4N_TOUT177_P31_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_4N_TOUT209_P25_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_4N_TOUT267_P10_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_5_TOUT124_P11_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_5_TOUT135_P22_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_5_TOUT140_P32_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_5_TOUT159_P01_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_5_TOUT179_P31_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_5_TOUT211_P25_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_5_TOUT246_P15_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_5_TOUT250_P13_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_5_TOUT269_P10_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_5N_TOUT119_P11_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_5N_TOUT155_P01_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_5N_TOUT162_P01_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_5N_TOUT174_P31_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_5N_TOUT206_P25_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_6_TOUT125_P11_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_6_TOUT136_P22_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_6_TOUT141_P32_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_6_TOUT160_P01_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_6_TOUT180_P31_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_6_TOUT212_P25_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_6_TOUT212_P26_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_6_TOUT247_P15_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_6_TOUT249_P13_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_6_TOUT270_P10_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_6N_TOUT120_P11_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_6N_TOUT156_P01_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_6N_TOUT158_P01_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_6N_TOUT175_P31_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_6N_TOUT207_P25_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_6N_TOUT96_P11_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_7_TOUT126_P11_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_7_TOUT137_P22_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_7_TOUT142_P32_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_7_TOUT161_P01_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_7_TOUT181_P31_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_7_TOUT213_P25_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_7_TOUT248_P13_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_7N_TOUT121_P11_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_7N_TOUT152_P02_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_7N_TOUT157_P01_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_7N_TOUT176_P31_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM5_7N_TOUT208_P25_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_0_TOUT127_P11_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_0_TOUT141_P32_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_0_TOUT155_P01_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_0_TOUT162_P01_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_0_TOUT182_P31_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_0_TOUT214_P25_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_0_TOUT242_P15_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_0_TOUT250_P13_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_1_TOUT128_P12_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_1_TOUT142_P32_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_1_TOUT156_P01_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_1_TOUT164_P01_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_1_TOUT183_P31_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_1_TOUT215_P25_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_1_TOUT251_P13_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_1_TOUT258_P14_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_2_TOUT129_P12_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_2_TOUT143_P33_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_2_TOUT152_P02_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_2_TOUT157_P01_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_2_TOUT184_P31_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_2_TOUT216_P25_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_2_TOUT252_P13_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_2_TOUT259_P14_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_3_TOUT111_P01_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_3_TOUT144_P33_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_3_TOUT163_P01_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_3_TOUT165_P01_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_3_TOUT185_P31_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_3_TOUT217_P25_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_3_TOUT253_P13_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_3_TOUT260_P14_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_4_TOUT140_P32_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_4_TOUT143_P33_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_4_TOUT158_P01_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_4_TOUT186_P31_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_4_TOUT218_P25_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_4_TOUT254_P13_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_4_TOUT261_P14_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_4_TOUT31_P33_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_5_TOUT146_P34_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_5_TOUT159_P01_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_5_TOUT187_P31_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_5_TOUT219_P25_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_5_TOUT243_P15_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_5_TOUT255_P13_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_5_TOUT262_P13_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_6_TOUT147_P34_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_6_TOUT160_P01_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_6_TOUT188_P31_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_6_TOUT220_P25_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_6_TOUT256_P13_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_6_TOUT263_P14_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_7_TOUT148_P34_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_7_TOUT161_P01_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_7_TOUT189_P31_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_7_TOUT221_P25_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_7_TOUT244_P15_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM6_7_TOUT264_P13_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_0_TOUT149_P34_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_0_TOUT162_P01_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_0_TOUT190_P30_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_0_TOUT222_P24_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_0_TOUT249_P13_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_0_TOUT258_P14_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_1_TOUT150_P34_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_1_TOUT163_P01_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_1_TOUT191_P30_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_1_TOUT223_P24_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_1_TOUT242_P15_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_1_TOUT245_P15_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_1_TOUT253_P13_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_1_TOUT265_P10_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_2_TOUT164_P01_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_2_TOUT192_P30_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_2_TOUT224_P24_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_2_TOUT243_P15_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_2_TOUT246_P15_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_2_TOUT254_P13_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_2_TOUT266_P10_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_3_TOUT166_P00_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_3_TOUT193_P30_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_3_TOUT225_P24_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_3_TOUT244_P15_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_3_TOUT247_P15_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_3_TOUT255_P13_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_3_TOUT267_P10_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_4_TOUT167_P00_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_4_TOUT194_P30_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_4_TOUT226_P24_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_4_TOUT245_P15_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_4_TOUT248_P13_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_4_TOUT268_P10_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_5_TOUT168_P00_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_5_TOUT195_P30_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_5_TOUT227_P24_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_5_TOUT246_P15_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_5_TOUT251_P13_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_5_TOUT269_P10_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_6_TOUT151_P02_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_6_TOUT153_P02_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_6_TOUT196_P30_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_6_TOUT228_P24_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_6_TOUT247_P15_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_6_TOUT249_P13_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_6_TOUT270_P10_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_7_TOUT152_P02_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_7_TOUT154_P02_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_7_TOUT161_P01_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_7_TOUT197_P30_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_7_TOUT229_P24_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_7_TOUT248_P13_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM7_7_TOUT261_P14_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM8_0_TOUT162_P01_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM8_0_TOUT198_P30_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM8_0_TOUT230_P24_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM8_0_TOUT242_P15_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM8_0_TOUT250_P13_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM8_1_TOUT163_P01_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM8_1_TOUT199_P30_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM8_1_TOUT231_P24_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM8_1_TOUT251_P13_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM8_1_TOUT258_P14_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM8_2_TOUT164_P01_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM8_2_TOUT200_P30_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM8_2_TOUT232_P24_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM8_2_TOUT252_P13_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM8_2_TOUT259_P14_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM8_3_TOUT166_P00_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM8_3_TOUT201_P30_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM8_3_TOUT233_P24_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM8_3_TOUT253_P13_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM8_3_TOUT260_P14_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM8_4_TOUT167_P00_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM8_4_TOUT202_P30_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM8_4_TOUT234_P24_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM8_4_TOUT254_P13_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM8_4_TOUT261_P14_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM8_5_TOUT168_P00_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM8_5_TOUT203_P30_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM8_5_TOUT235_P24_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM8_5_TOUT243_P15_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM8_5_TOUT255_P13_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM8_5_TOUT262_P13_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM8_6_TOUT151_P02_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM8_6_TOUT153_P02_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM8_6_TOUT204_P30_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM8_6_TOUT236_P24_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM8_6_TOUT256_P13_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM8_6_TOUT263_P14_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM8_7_TOUT152_P02_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM8_7_TOUT154_P02_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM8_7_TOUT161_P01_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM8_7_TOUT205_P30_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM8_7_TOUT237_P24_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM8_7_TOUT244_P15_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM8_7_TOUT264_P13_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_Atom_Dtm_PwmHl_modes : IfxGtm_Atom_Dtm_PwmHl.c
  • IfxGtm_Atom_PwmHl_modes : IfxGtm_Atom_PwmHl.c
  • IfxGtm_CLK0_P23_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_CLK1_P32_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_CLK2_P11_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_dtmAtom_map : IfxGtm_cfg.c , IfxGtm_cfg.h
  • IfxGtm_dtmTom_map : IfxGtm_cfg.c , IfxGtm_cfg.h
  • IfxGtm_spe_indexMap : IfxGtm_cfg.c , IfxGtm_cfg.h
  • IfxGtm_TIM0_0_P00_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_0_P02_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_0_P10_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_0_P13_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_0_P14_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_0_P14_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_0_P15_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_0_P21_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_0_P22_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_0_P33_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_0_P33_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_1_P00_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_1_P02_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_1_P10_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_1_P10_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_1_P14_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_1_P15_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_1_P21_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_1_P22_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_1_P33_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_1_P33_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_2_P00_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_2_P02_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_2_P02_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_2_P10_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_2_P10_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_2_P10_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_2_P15_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_2_P21_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_2_P23_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_2_P33_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_2_P33_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_3_P00_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_3_P02_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_3_P02_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_3_P10_14_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_3_P10_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_3_P10_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_3_P14_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_3_P21_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_3_P22_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_3_P32_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_3_P33_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_4_P02_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_4_P10_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_4_P10_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_4_P14_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_4_P21_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_4_P22_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_4_P32_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_4_P33_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_4_P33_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_5_P01_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_5_P02_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_5_P10_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_5_P10_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_5_P14_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_5_P21_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_5_P23_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_5_P32_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_5_P33_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_6_P01_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_6_P02_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_6_P10_15_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_6_P10_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_6_P14_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_6_P20_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_6_P23_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_6_P23_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_6_P33_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_7_P02_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_7_P02_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_7_P11_15_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_7_P14_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_7_P20_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_7_P23_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_7_P23_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_7_P33_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_0_P00_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_0_P02_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_0_P10_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_0_P14_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_0_P14_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_0_P15_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_0_P21_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_0_P22_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_0_P33_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_0_P33_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_1_P00_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_1_P02_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_1_P10_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_1_P14_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_1_P15_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_1_P21_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_1_P22_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_1_P33_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_1_P33_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_2_P00_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_2_P02_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_2_P10_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_2_P10_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_2_P15_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_2_P21_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_2_P23_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_2_P23_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_2_P33_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_2_P33_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_3_P00_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_3_P02_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_3_P10_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_3_P10_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_3_P14_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_3_P21_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_3_P22_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_3_P23_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_3_P32_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_3_P33_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_4_P02_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_4_P10_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_4_P14_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_4_P20_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_4_P21_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_4_P22_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_4_P32_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_4_P33_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_4_P33_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_5_P02_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_5_P10_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_5_P14_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_5_P20_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_5_P21_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_5_P23_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_5_P32_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_5_P33_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_6_P02_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_6_P10_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_6_P14_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_6_P20_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_6_P23_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_6_P23_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_6_P33_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_7_P02_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_7_P14_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_7_P20_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_7_P23_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_7_P23_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_7_P33_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_0_P00_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_0_P01_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_0_P02_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_0_P11_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_0_P11_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_0_P13_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_0_P15_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_0_P20_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_0_P31_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_0_P33_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_0_P33_14_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_1_P00_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_1_P00_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_1_P01_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_1_P11_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_1_P11_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_1_P15_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_1_P20_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_1_P31_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_1_P33_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_1_P33_15_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_2_P00_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_2_P01_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_2_P11_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_2_P11_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_2_P14_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_2_P15_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_2_P15_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_2_P20_14_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_2_P31_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_2_P32_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_3_P00_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_3_P01_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_3_P11_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_3_P11_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_3_P14_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_3_P15_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_3_P15_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_3_P20_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_3_P31_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_3_P34_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_4_P00_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_4_P02_14_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_4_P11_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_4_P11_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_4_P14_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_4_P15_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_4_P15_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_4_P20_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_4_P21_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_4_P31_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_4_P34_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_5_P00_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_5_P01_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_5_P02_15_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_5_P11_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_5_P11_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_5_P13_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_5_P15_14_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_5_P15_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_5_P20_9_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM2_5_P21_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_5_P31_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_5_P34_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_6_P00_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_6_P01_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_6_P11_11_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM2_6_P11_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_6_P13_1_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM2_6_P15_15_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_6_P15_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_6_P20_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_6_P20_6_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM2_6_P22_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_6_P31_6_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM2_6_P34_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_7_P00_8_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM2_7_P01_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_7_P11_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_7_P11_14_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_7_P13_2_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM2_7_P13_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_7_P15_4_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM2_7_P20_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_7_P20_7_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM2_7_P31_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_7_P34_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_0_P00_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_0_P00_5_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM3_0_P02_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_0_P02_8_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM3_0_P11_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_0_P12_0_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM3_0_P13_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_0_P13_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_0_P15_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_0_P20_12_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM3_0_P22_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_0_P25_0_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM3_0_P33_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_0_P33_12_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM3_1_P00_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_1_P00_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_1_P00_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_1_P02_7_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM3_1_P11_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_1_P12_1_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM3_1_P13_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_1_P14_11_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM3_1_P20_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_1_P22_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_1_P25_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_1_P33_13_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM3_1_P33_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_2_P00_3_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM3_2_P00_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_2_P02_8_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM3_2_P11_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_2_P13_14_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_2_P14_14_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_2_P14_8_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM3_2_P20_14_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_2_P22_6_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM3_2_P25_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_2_P32_0_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM3_2_P33_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_3_P00_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_3_P00_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_3_P02_9_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM3_3_P11_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_3_P13_4_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM3_3_P14_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_3_P14_9_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM3_3_P15_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_3_P20_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_3_P22_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_3_P25_3_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM3_3_P32_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_3_P33_3_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM3_4_P00_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_4_P02_10_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM3_4_P11_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_4_P13_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_4_P14_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_4_P14_12_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM3_4_P15_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_4_P20_3_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM3_4_P21_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_4_P22_8_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM3_4_P25_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_4_P34_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_5_P00_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_5_P02_11_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM3_5_P11_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_5_P13_0_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM3_5_P13_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_5_P13_6_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM3_5_P15_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_5_P20_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_5_P21_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_5_P22_9_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM3_5_P25_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_5_P32_5_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM3_5_P34_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_6_P00_7_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM3_6_P02_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_6_P11_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_6_P13_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_6_P13_7_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM3_6_P14_15_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_6_P15_3_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM3_6_P20_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_6_P20_6_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM3_6_P22_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_6_P25_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_6_P26_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_6_P32_6_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM3_6_P34_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_7_P00_8_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM3_7_P02_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_7_P11_12_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM3_7_P13_15_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_7_P13_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_7_P15_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_7_P20_11_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM3_7_P20_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_7_P22_11_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM3_7_P25_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM3_7_P32_7_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM3_7_P34_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_0_P00_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_0_P00_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_0_P01_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_0_P02_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_0_P10_0_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM4_0_P10_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_0_P11_0_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM4_0_P12_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_0_P13_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_0_P21_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_0_P24_0_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM4_0_P25_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_0_P30_0_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM4_0_P32_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_1_P00_10_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM4_1_P00_15_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_1_P01_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_1_P02_15_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_1_P10_9_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM4_1_P11_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_1_P12_1_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM4_1_P15_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_1_P21_1_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM4_1_P24_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_1_P25_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_1_P30_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_1_P32_5_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM4_2_P00_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_2_P01_9_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM4_2_P02_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_2_P02_9_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM4_2_P10_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_2_P10_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_2_P11_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_2_P15_11_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM4_2_P21_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_2_P23_6_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM4_2_P24_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_2_P25_10_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM4_2_P30_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_3_P00_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_3_P01_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_3_P02_10_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM4_3_P02_14_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_3_P10_14_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM4_3_P10_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_3_P11_5_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM4_3_P15_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_3_P21_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_3_P23_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_3_P24_3_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM4_3_P25_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_3_P30_3_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM4_4_P01_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_4_P01_8_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM4_4_P02_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_4_P10_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_4_P10_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_4_P11_7_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM4_4_P15_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_4_P20_1_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM4_4_P24_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_4_P25_12_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM4_4_P30_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_4_P32_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_4_P33_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_4_P33_4_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM4_5_P01_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_5_P01_2_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM4_5_P01_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_5_P10_11_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM4_5_P10_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_5_P11_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_5_P15_14_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_5_P20_3_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM4_5_P24_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_5_P25_13_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM4_5_P30_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_5_P33_14_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM4_5_P33_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_6_P01_14_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_6_P01_15_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_6_P01_4_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM4_6_P10_15_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_6_P10_3_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM4_6_P11_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_6_P15_15_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM4_6_P24_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_6_P25_14_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_6_P30_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_6_P33_15_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM4_7_P00_14_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_7_P01_11_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM4_7_P10_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_7_P11_14_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM4_7_P11_15_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_7_P13_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_7_P14_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_7_P24_7_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM4_7_P25_15_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM4_7_P30_7_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM4_7_P34_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_0_P00_13_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM5_0_P01_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_0_P01_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_0_P02_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_0_P13_11_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM5_0_P22_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_0_P24_8_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM5_0_P30_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_0_P31_8_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM5_0_P33_14_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_1_P00_15_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_1_P01_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_1_P01_9_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM5_1_P02_15_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_1_P13_10_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM5_1_P14_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_1_P22_9_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM5_1_P24_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_1_P30_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_1_P31_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_1_P33_15_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM5_2_P01_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_2_P01_9_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM5_2_P02_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_2_P13_14_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM5_2_P14_14_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_2_P22_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_2_P24_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_2_P30_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_2_P31_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_3_P01_11_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM5_3_P01_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_3_P01_5_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM5_3_P02_14_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_3_P13_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_3_P14_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_3_P22_11_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM5_3_P24_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_3_P30_11_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM5_3_P31_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_3_P34_1_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM5_4_P00_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_4_P01_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_4_P01_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_4_P13_5_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM5_4_P14_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_4_P21_2_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM5_4_P24_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_4_P30_12_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM5_4_P31_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_4_P34_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_5_P00_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_5_P01_10_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM5_5_P01_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_5_P01_6_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM5_5_P13_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_5_P13_6_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM5_5_P21_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_5_P24_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_5_P30_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_5_P31_13_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM5_5_P32_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_5_P34_3_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM5_6_P00_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_6_P01_14_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM5_6_P01_15_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_6_P01_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_6_P13_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_6_P14_15_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM5_6_P21_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_6_P24_14_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM5_6_P30_14_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_6_P31_14_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM5_6_P32_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_6_P34_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_7_P00_14_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_7_P00_3_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM5_7_P01_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_7_P01_7_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM5_7_P13_15_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_7_P21_5_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM5_7_P24_15_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_7_P30_15_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_7_P31_15_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM5_7_P32_7_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM5_7_P34_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM6_0_P01_12_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM6_0_P10_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM6_0_P13_4_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM6_0_P20_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM6_0_P23_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM6_0_P24_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM6_0_P25_0_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM6_0_P30_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM6_0_P31_8_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM6_1_P01_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM6_1_P10_10_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM6_1_P13_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM6_1_P20_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM6_1_P23_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM6_1_P24_1_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM6_1_P25_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM6_1_P30_9_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM6_1_P31_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM6_2_P01_14_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM6_2_P10_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM6_2_P13_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM6_2_P20_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM6_2_P23_5_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM6_2_P24_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM6_2_P25_2_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM6_2_P30_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM6_2_P31_10_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM6_3_P01_15_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM6_3_P10_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM6_3_P13_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM6_3_P20_9_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM6_3_P23_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM6_3_P24_3_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM6_3_P25_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM6_3_P30_11_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM6_3_P31_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM6_4_P00_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM6_4_P13_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM6_4_P14_12_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM6_4_P23_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM6_4_P24_4_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM6_4_P25_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM6_4_P30_12_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM6_4_P31_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM6_5_P00_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM6_5_P13_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM6_5_P14_13_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM6_5_P23_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM6_5_P24_5_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM6_5_P25_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM6_5_P30_13_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM6_5_P31_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM6_6_P00_14_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM6_6_P13_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM6_6_P14_14_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM6_6_P23_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM6_6_P24_6_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM6_6_P25_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM6_6_P26_0_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM6_6_P30_14_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM6_6_P31_14_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM6_7_P00_15_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM6_7_P13_12_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM6_7_P14_15_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM6_7_P23_0_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM6_7_P24_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM6_7_P25_7_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TIM6_7_P30_15_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM6_7_P31_15_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_0_TOUT0_P02_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_0_TOUT109_P10_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_0_TOUT151_P02_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_0_TOUT18_P00_9_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_0_TOUT26_P33_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_0_TOUT32_P33_10_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_0_TOUT53_P21_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_0_TOUT76_P15_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_0_TOUT77_P15_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_0_TOUT85_P14_5_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_0_TOUT87_P14_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_0N_TOUT106_P10_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_0N_TOUT17_P00_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_0N_TOUT25_P33_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_0N_TOUT34_P33_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_0N_TOUT51_P21_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_0N_TOUT61_P20_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_0N_TOUT72_P15_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_0N_TOUT7_P02_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_0N_TOUT91_P13_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_0N_TOUT9_P00_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_10_TOUT12_P00_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_10_TOUT2_P02_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_10_TOUT41_P23_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_10_TOUT46_P23_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_10_TOUT96_P11_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_11_TOUT13_P00_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_11_TOUT3_P02_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_11_TOUT43_P23_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_11_TOUT49_P22_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_11_TOUT97_P11_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_12_TOUT14_P00_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_12_TOUT44_P23_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_12_TOUT4_P02_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_12_TOUT50_P22_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_12_TOUT98_P11_9_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_13_TOUT15_P00_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_13_TOUT5_P02_5_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_13_TOUT99_P11_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_14_TOUT100_P11_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_14_TOUT16_P00_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_14_TOUT6_P02_6_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_15_TOUT101_P11_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_15_TOUT17_P00_8_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_15_TOUT42_P23_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_15_TOUT7_P02_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_1_TOUT103_P10_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_1_TOUT116_P02_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_1_TOUT19_P00_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_1_TOUT1_P02_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_1_TOUT27_P33_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_1_TOUT31_P33_9_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_1_TOUT54_P21_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_1_TOUT78_P15_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_1_TOUT86_P14_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_1N_TOUT107_P10_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_1N_TOUT10_P00_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_1N_TOUT14_P00_5_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_1N_TOUT22_P33_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_1N_TOUT30_P33_8_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_1N_TOUT35_P33_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_1N_TOUT39_P32_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_1N_TOUT4_P02_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_1N_TOUT52_P21_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_1N_TOUT57_P21_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_1N_TOUT73_P15_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_1N_TOUT90_P14_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_1N_TOUT92_P13_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_2_TOUT104_P10_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_2_TOUT107_P10_5_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_2_TOUT117_P02_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_2_TOUT20_P00_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_2_TOUT28_P33_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_2_TOUT2_P02_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_2_TOUT33_P33_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_2_TOUT55_P21_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_2_TOUT79_P15_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_2_TOUT88_P14_8_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_2N_TOUT108_P10_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_2N_TOUT11_P00_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_2N_TOUT143_P33_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_2N_TOUT15_P00_6_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_2N_TOUT23_P33_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_2N_TOUT40_P32_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_2N_TOUT58_P21_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_2N_TOUT5_P02_5_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_2N_TOUT74_P15_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_2N_TOUT93_P13_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_3_TOUT105_P10_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_3_TOUT108_P10_6_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_3_TOUT118_P02_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_3_TOUT21_P00_12_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_3_TOUT29_P33_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_3_TOUT38_P32_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_3_TOUT3_P02_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_3_TOUT56_P21_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_3_TOUT71_P15_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_3_TOUT80_P14_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_3_TOUT89_P14_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_3N_TOUT109_P10_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_3N_TOUT12_P00_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_3N_TOUT144_P33_15_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_3N_TOUT16_P00_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_3N_TOUT24_P33_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_3N_TOUT42_P23_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_3N_TOUT59_P20_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_3N_TOUT60_P20_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_3N_TOUT6_P02_6_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_3N_TOUT75_P15_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_3N_TOUT94_P13_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_4_TOUT0_P02_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_4_TOUT102_P10_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_4_TOUT124_P11_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_4_TOUT22_P33_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_4_TOUT30_P33_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_4_TOUT37_P32_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_4_TOUT39_P32_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_4_TOUT53_P21_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_4_TOUT57_P21_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_4_TOUT64_P20_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_4_TOUT72_P15_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_4_TOUT81_P14_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_4_TOUT90_P14_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_4_TOUT94_P13_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_4_TOUT9_P00_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_4N_TOUT10_P00_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_4N_TOUT143_P33_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_4N_TOUT147_P34_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_4N_TOUT1_P02_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_4N_TOUT29_P33_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_4N_TOUT36_P32_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_4N_TOUT54_P21_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_4N_TOUT56_P21_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_4N_TOUT65_P20_9_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_4N_TOUT73_P15_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_4N_TOUT89_P14_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_4N_TOUT8_P02_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_4N_TOUT95_P11_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_4N_TOUT96_P11_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_5_TOUT110_P10_8_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_5_TOUT11_P00_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_5_TOUT128_P12_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_5_TOUT23_P33_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_5_TOUT27_P33_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_5_TOUT2_P02_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_5_TOUT40_P32_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_5_TOUT55_P21_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_5_TOUT58_P21_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_5_TOUT66_P20_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_5_TOUT74_P15_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_5_TOUT82_P14_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_5_TOUT91_P13_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_5_TOUT96_P11_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_5N_TOUT121_P11_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_5N_TOUT12_P00_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_5N_TOUT144_P33_15_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_5N_TOUT148_P34_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_5N_TOUT26_P33_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_5N_TOUT28_P33_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_5N_TOUT32_P33_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_5N_TOUT37_P32_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_5N_TOUT3_P02_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_5N_TOUT53_P21_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_5N_TOUT56_P21_5_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_5N_TOUT67_P20_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_5N_TOUT76_P15_5_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_5N_TOUT77_P15_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_5N_TOUT87_P14_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_5N_TOUT97_P11_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_6_TOUT106_P10_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_6_TOUT129_P12_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_6_TOUT13_P00_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_6_TOUT24_P33_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_6_TOUT29_P33_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_6_TOUT42_P23_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_6_TOUT48_P22_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_6_TOUT4_P02_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_6_TOUT59_P20_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_6_TOUT68_P20_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_6_TOUT80_P14_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_6_TOUT83_P14_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_6_TOUT92_P13_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_6_TOUT98_P11_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_6N_TOUT149_P34_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_6N_TOUT14_P00_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_6N_TOUT27_P33_5_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_6N_TOUT30_P33_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_6N_TOUT31_P33_9_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_6N_TOUT38_P32_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_6N_TOUT40_P32_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_6N_TOUT49_P22_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_6N_TOUT54_P21_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_6N_TOUT5_P02_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_6N_TOUT69_P20_13_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_6N_TOUT78_P15_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_6N_TOUT82_P14_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_6N_TOUT86_P14_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_6N_TOUT91_P13_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_6N_TOUT97_P11_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_6N_TOUT99_P11_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_7_TOUT101_P11_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_7_TOUT119_P11_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_7_TOUT15_P00_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_7_TOUT25_P33_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_7_TOUT31_P33_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_7_TOUT45_P23_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_7_TOUT50_P22_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_7_TOUT6_P02_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_7_TOUT70_P20_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_7_TOUT81_P14_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_7_TOUT84_P14_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_7_TOUT92_P13_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_7_TOUT93_P13_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_7N_TOUT100_P11_11_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_7N_TOUT123_P11_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_7N_TOUT130_P22_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_7N_TOUT150_P34_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_7N_TOUT16_P00_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_7N_TOUT28_P33_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_7N_TOUT32_P33_10_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_7N_TOUT33_P33_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_7N_TOUT39_P32_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_7N_TOUT42_P23_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_7N_TOUT55_P21_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_7N_TOUT71_P15_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_7N_TOUT79_P15_8_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_7N_TOUT7_P02_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_7N_TOUT84_P14_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_7N_TOUT88_P14_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_7N_TOUT93_P13_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_8_TOUT0_P02_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_8_TOUT48_P22_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_8_TOUT51_P21_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_8_TOUT8_P02_8_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_8_TOUT94_P13_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_8_TOUT95_P11_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_8_TOUT9_P00_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_9_TOUT10_P00_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM0_9_TOUT11_P00_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_9_TOUT1_P02_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_9_TOUT47_P22_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_9_TOUT52_P21_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_0_TOUT0_P02_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_0_TOUT18_P00_9_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_0_TOUT26_P33_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_0_TOUT32_P33_10_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_0_TOUT68_P20_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_0_TOUT76_P15_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_0_TOUT77_P15_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_0_TOUT85_P14_5_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_0_TOUT8_P02_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_0_TOUT9_P00_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_0N_TOUT17_P00_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_0N_TOUT25_P33_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_0N_TOUT34_P33_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_0N_TOUT75_P15_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_0N_TOUT7_P02_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_10_TOUT143_P33_14_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_10_TOUT266_P10_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_10_TOUT2_P02_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_10_TOUT62_P20_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_11_TOUT144_P33_15_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_11_TOUT267_P10_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_11_TOUT3_P02_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_11_TOUT60_P20_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_11_TOUT63_P20_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_12_TOUT268_P10_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_12_TOUT34_P33_12_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_12_TOUT4_P02_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_12_TOUT61_P20_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_13_TOUT146_P34_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_13_TOUT269_P10_11_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_13_TOUT35_P33_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_13_TOUT5_P02_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_13_TOUT65_P20_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_14_TOUT147_P34_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_14_TOUT270_P10_15_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_14_TOUT36_P32_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_14_TOUT66_P20_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_14_TOUT6_P02_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_15_TOUT148_P34_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_15_TOUT150_P34_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_15_TOUT37_P32_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_15_TOUT67_P20_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_15_TOUT7_P02_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_1_TOUT10_P00_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_1_TOUT116_P02_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_1_TOUT11_P00_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_1_TOUT19_P00_10_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_1_TOUT1_P02_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_1_TOUT242_P15_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_1_TOUT27_P33_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_1_TOUT31_P33_9_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_1_TOUT69_P20_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_1_TOUT78_P15_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_1_TOUT86_P14_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_1N_TOUT14_P00_5_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_1N_TOUT22_P33_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_1N_TOUT245_P15_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_1N_TOUT30_P33_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_1N_TOUT35_P33_13_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_1N_TOUT39_P32_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_1N_TOUT4_P02_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_1N_TOUT72_P15_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_2_TOUT117_P02_10_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_2_TOUT12_P00_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_2_TOUT20_P00_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_2_TOUT243_P15_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_2_TOUT28_P33_6_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_2_TOUT2_P02_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_2_TOUT33_P33_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_2_TOUT70_P20_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_2_TOUT79_P15_8_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_2N_TOUT143_P33_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_2N_TOUT15_P00_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_2N_TOUT23_P33_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_2N_TOUT246_P15_14_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_2N_TOUT40_P32_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_2N_TOUT41_P23_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_2N_TOUT5_P02_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_2N_TOUT73_P15_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_3_TOUT118_P02_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_3_TOUT13_P00_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_3_TOUT21_P00_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_3_TOUT244_P15_12_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_3_TOUT29_P33_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_3_TOUT38_P32_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_3_TOUT3_P02_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_3_TOUT71_P15_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_3_TOUT80_P14_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_3N_TOUT144_P33_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_3N_TOUT16_P00_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_3N_TOUT247_P15_15_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_3N_TOUT24_P33_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_3N_TOUT43_P23_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_3N_TOUT6_P02_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_3N_TOUT74_P15_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_4_TOUT0_P02_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_4_TOUT124_P11_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_4_TOUT14_P00_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_4_TOUT22_P33_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_4_TOUT245_P15_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_4_TOUT30_P33_8_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_4_TOUT37_P32_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_4_TOUT39_P32_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_4_TOUT53_P21_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_4_TOUT64_P20_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_4_TOUT72_P15_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_4_TOUT81_P14_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_4_TOUT94_P13_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_4_TOUT9_P00_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_4N_TOUT10_P00_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_4N_TOUT13_P00_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_4N_TOUT143_P33_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_4N_TOUT147_P34_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_4N_TOUT1_P02_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_4N_TOUT21_P00_12_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_4N_TOUT244_P15_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_4N_TOUT29_P33_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_4N_TOUT36_P32_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_4N_TOUT54_P21_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_4N_TOUT65_P20_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_4N_TOUT71_P15_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_4N_TOUT73_P15_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_4N_TOUT8_P02_8_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_4N_TOUT95_P11_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_5_TOUT11_P00_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_5_TOUT15_P00_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_5_TOUT23_P33_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_5_TOUT246_P15_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_5_TOUT27_P33_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_5_TOUT2_P02_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_5_TOUT40_P32_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_5_TOUT41_P23_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_5_TOUT55_P21_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_5_TOUT66_P20_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_5_TOUT73_P15_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_5_TOUT74_P15_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_5_TOUT82_P14_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_5_TOUT96_P11_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_5N_TOUT12_P00_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_5N_TOUT144_P33_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_5N_TOUT148_P34_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_5N_TOUT18_P00_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_5N_TOUT26_P33_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_5N_TOUT28_P33_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_5N_TOUT32_P33_10_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_5N_TOUT37_P32_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_5N_TOUT3_P02_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_5N_TOUT56_P21_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_5N_TOUT67_P20_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_5N_TOUT76_P15_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_5N_TOUT77_P15_6_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_5N_TOUT97_P11_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_5N_TOUT9_P00_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_6_TOUT13_P00_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_6_TOUT16_P00_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_6_TOUT247_P15_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_6_TOUT24_P33_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_6_TOUT29_P33_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_6_TOUT43_P23_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_6_TOUT48_P22_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_6_TOUT4_P02_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_6_TOUT68_P20_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_6_TOUT74_P15_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_6_TOUT80_P14_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_6_TOUT83_P14_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_6_TOUT98_P11_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_6N_TOUT10_P00_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_6N_TOUT11_P00_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_6N_TOUT149_P34_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_6N_TOUT14_P00_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_6N_TOUT19_P00_10_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_6N_TOUT242_P15_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_6N_TOUT27_P33_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_6N_TOUT30_P33_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_6N_TOUT31_P33_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_6N_TOUT38_P32_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_6N_TOUT40_P32_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_6N_TOUT49_P22_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_6N_TOUT5_P02_5_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_6N_TOUT69_P20_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_6N_TOUT78_P15_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_6N_TOUT82_P14_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_6N_TOUT91_P13_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_6N_TOUT99_P11_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_7_TOUT101_P11_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_7_TOUT15_P00_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_7_TOUT17_P00_8_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_7_TOUT248_P13_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_7_TOUT25_P33_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_7_TOUT31_P33_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_7_TOUT44_P23_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_7_TOUT45_P23_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_7_TOUT50_P22_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_7_TOUT64_P20_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_7_TOUT6_P02_6_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_7_TOUT70_P20_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_7_TOUT75_P15_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_7_TOUT81_P14_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_7_TOUT84_P14_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_7_TOUT92_P13_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_7N_TOUT100_P11_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_7N_TOUT12_P00_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_7N_TOUT130_P22_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_7N_TOUT150_P34_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_7N_TOUT16_P00_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_7N_TOUT20_P00_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_7N_TOUT243_P15_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_7N_TOUT28_P33_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_7N_TOUT32_P33_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_7N_TOUT33_P33_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_7N_TOUT39_P32_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_7N_TOUT42_P23_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_7N_TOUT71_P15_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_7N_TOUT79_P15_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_7N_TOUT7_P02_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_7N_TOUT84_P14_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_7N_TOUT93_P13_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_8_TOUT0_P02_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_8_TOUT128_P12_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_8_TOUT141_P32_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_8_TOUT249_P13_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_9_TOUT129_P12_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_9_TOUT142_P32_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_9_TOUT1_P02_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_9_TOUT265_P10_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_0_TOUT119_P11_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_0_TOUT120_P11_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_0_TOUT250_P13_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_0_TOUT48_P22_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_0_TOUT53_P21_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_0_TOUT65_P20_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_0_TOUT87_P14_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_0_TOUT94_P13_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_0_TOUT95_P11_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_0N_TOUT101_P11_12_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_0N_TOUT126_P11_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_0N_TOUT264_P13_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_0N_TOUT43_P23_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_0N_TOUT51_P21_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_0N_TOUT61_P20_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_0N_TOUT76_P15_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_0N_TOUT91_P13_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_10_TOUT104_P10_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_10_TOUT107_P10_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_10_TOUT133_P22_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_10_TOUT260_P14_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_10_TOUT62_P20_6_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_10_TOUT70_P20_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_11_TOUT105_P10_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_11_TOUT108_P10_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_11_TOUT134_P22_8_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_11_TOUT261_P14_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_11_TOUT63_P20_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_11_TOUT71_P15_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_12_TOUT102_P10_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_12_TOUT135_P22_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_12_TOUT262_P13_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_12_TOUT34_P33_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_12_TOUT72_P15_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_13_TOUT110_P10_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_13_TOUT136_P22_10_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_13_TOUT263_P14_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_13_TOUT35_P33_13_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_13_TOUT65_P20_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_13_TOUT73_P15_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_14_TOUT137_P22_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_14_TOUT264_P13_15_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_14_TOUT36_P32_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_14_TOUT66_P20_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_14_TOUT74_P15_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_15_TOUT149_P34_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_15_TOUT37_P32_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_15_TOUT67_P20_11_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_15_TOUT75_P15_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_1_TOUT120_P11_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_1_TOUT127_P11_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_1_TOUT251_P13_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_1_TOUT47_P22_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_1_TOUT54_P21_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_1_TOUT64_P20_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_1_TOUT95_P11_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_1N_TOUT123_P11_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_1N_TOUT124_P11_8_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_1N_TOUT254_P13_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_1N_TOUT44_P23_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_1N_TOUT50_P22_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_1N_TOUT52_P21_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_1N_TOUT57_P21_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_1N_TOUT61_P20_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_1N_TOUT79_P15_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_1N_TOUT90_P14_10_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_1N_TOUT92_P13_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_1N_TOUT98_P11_9_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_2_TOUT121_P11_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_2_TOUT125_P11_13_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_2_TOUT252_P13_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_2_TOUT46_P23_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_2_TOUT50_P22_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_2_TOUT55_P21_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_2_TOUT63_P20_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_2_TOUT88_P14_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_2_TOUT96_P11_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_2N_TOUT124_P11_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_2N_TOUT255_P13_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_2N_TOUT46_P23_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_2N_TOUT58_P21_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_2N_TOUT78_P15_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_2N_TOUT93_P13_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_2N_TOUT99_P11_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_3_TOUT122_P11_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_3_TOUT126_P11_14_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_3_TOUT253_P13_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_3_TOUT49_P22_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_3_TOUT56_P21_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_3_TOUT60_P20_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_3_TOUT62_P20_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_3_TOUT89_P14_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_3_TOUT97_P11_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_3N_TOUT100_P11_11_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_3N_TOUT106_P10_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_3N_TOUT122_P11_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_3N_TOUT256_P13_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_3N_TOUT45_P23_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_3N_TOUT59_P20_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_3N_TOUT77_P15_6_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_4_TOUT102_P10_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_4_TOUT123_P11_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_4_TOUT133_P22_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_4_TOUT254_P13_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_4_TOUT50_P22_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_4_TOUT57_P21_6_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_4_TOUT61_P20_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_4_TOUT90_P14_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_4_TOUT98_P11_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_4N_TOUT106_P10_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_4N_TOUT120_P11_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_4N_TOUT122_P11_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_4N_TOUT126_P11_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_4N_TOUT137_P22_11_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_4N_TOUT253_P13_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_4N_TOUT56_P21_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_4N_TOUT60_P20_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_4N_TOUT89_P14_9_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_4N_TOUT97_P11_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_5_TOUT103_P10_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_5_TOUT124_P11_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_5_TOUT132_P22_6_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_5_TOUT255_P13_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_5_TOUT58_P21_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_5_TOUT91_P13_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_5_TOUT99_P11_10_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_5N_TOUT107_P10_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_5N_TOUT119_P11_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_5N_TOUT136_P22_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_5N_TOUT250_P13_11_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_5N_TOUT53_P21_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_5N_TOUT87_P14_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_5N_TOUT94_P13_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_6_TOUT100_P11_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_6_TOUT104_P10_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_6_TOUT106_P10_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_6_TOUT125_P11_13_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_6_TOUT131_P22_5_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_6_TOUT256_P13_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_6_TOUT59_P20_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_6_TOUT92_P13_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_6N_TOUT108_P10_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_6N_TOUT120_P11_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_6N_TOUT122_P11_5_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_6N_TOUT135_P22_9_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_6N_TOUT251_P13_10_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_6N_TOUT54_P21_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_6N_TOUT86_P14_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_6N_TOUT95_P11_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_7_TOUT101_P11_12_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_7_TOUT105_P10_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_7_TOUT126_P11_14_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_7_TOUT130_P22_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_7_TOUT264_P13_15_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_7_TOUT64_P20_8_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_7_TOUT93_P13_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_7N_TOUT109_P10_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_7N_TOUT121_P11_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_7N_TOUT134_P22_8_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_7N_TOUT252_P13_14_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_7N_TOUT55_P21_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_7N_TOUT88_P14_8_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_7N_TOUT96_P11_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_7N_TOUT98_P11_9_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_8_TOUT109_P10_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_8_TOUT127_P11_15_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_8_TOUT131_P22_5_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_8_TOUT258_P14_11_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_8_TOUT51_P21_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_8_TOUT68_P20_12_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_9_TOUT103_P10_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_9_TOUT132_P22_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM2_9_TOUT259_P14_14_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_9_TOUT52_P21_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM2_9_TOUT69_P20_13_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_0_TOUT110_P10_8_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_0_TOUT115_P01_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_0_TOUT130_P22_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_0_TOUT155_P01_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_0_TOUT162_P01_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM3_0_TOUT174_P31_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_0_TOUT206_P25_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_0N_TOUT134_P22_8_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_0N_TOUT161_P01_13_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_0N_TOUT181_P31_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_0N_TOUT213_P25_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_0N_TOUT8_P02_8_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_10_TOUT164_P01_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM3_10_TOUT184_P31_10_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_10_TOUT188_P31_14_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_10_TOUT216_P25_10_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_10_TOUT220_P25_14_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_10_TOUT266_P10_10_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_11_TOUT166_P00_14_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_11_TOUT185_P31_11_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_11_TOUT189_P31_15_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_11_TOUT217_P25_11_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_11_TOUT221_P25_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM3_11_TOUT267_P10_14_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_12_TOUT167_P00_13_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_12_TOUT186_P31_12_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_12_TOUT218_P25_12_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_12_TOUT268_P10_13_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_13_TOUT138_P23_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM3_13_TOUT168_P00_15_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_13_TOUT187_P31_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM3_13_TOUT219_P25_13_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_13_TOUT269_P10_11_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_14_TOUT139_P23_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_14_TOUT151_P02_12_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_14_TOUT153_P02_13_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_14_TOUT188_P31_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM3_14_TOUT220_P25_14_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_14_TOUT270_P10_15_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_15_TOUT140_P32_5_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_15_TOUT152_P02_15_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_15_TOUT154_P02_14_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_15_TOUT189_P31_15_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_15_TOUT221_P25_15_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_1_TOUT111_P01_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM3_1_TOUT114_P01_6_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_1_TOUT131_P22_5_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_1_TOUT156_P01_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_1_TOUT163_P01_10_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_1_TOUT175_P31_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_1_TOUT207_P25_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_1_TOUT242_P15_10_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_1_TOUT265_P10_9_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_1N_TOUT116_P02_9_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_1N_TOUT135_P22_9_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_1N_TOUT158_P01_12_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_1N_TOUT178_P31_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_1N_TOUT210_P25_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_1N_TOUT245_P15_13_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_1N_TOUT268_P10_13_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_2_TOUT112_P01_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM3_2_TOUT132_P22_6_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_2_TOUT157_P01_15_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_2_TOUT164_P01_14_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_2_TOUT176_P31_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_2_TOUT208_P25_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_2_TOUT243_P15_11_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_2_TOUT266_P10_10_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_2N_TOUT117_P02_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM3_2N_TOUT136_P22_10_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_2N_TOUT159_P01_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_2N_TOUT179_P31_5_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_2N_TOUT211_P25_5_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_2N_TOUT246_P15_14_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_2N_TOUT267_P10_14_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_3_TOUT113_P01_5_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_3_TOUT133_P22_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM3_3_TOUT165_P01_11_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_3_TOUT177_P31_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_3_TOUT209_P25_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_3_TOUT244_P15_12_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_3_TOUT269_P10_11_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_3N_TOUT118_P02_11_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_3N_TOUT137_P22_11_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_3N_TOUT160_P01_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM3_3N_TOUT180_P31_6_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_3N_TOUT212_P25_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM3_3N_TOUT212_P26_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_3N_TOUT247_P15_15_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_3N_TOUT270_P10_15_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_4_TOUT110_P10_8_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_4_TOUT111_P01_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_4_TOUT114_P01_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM3_4_TOUT134_P22_8_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_4_TOUT158_P01_12_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_4_TOUT178_P31_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_4_TOUT210_P25_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_4_TOUT245_P15_13_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_4N_TOUT151_P02_12_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_4N_TOUT165_P01_11_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_4N_TOUT177_P31_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM3_4N_TOUT209_P25_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_4N_TOUT244_P15_12_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_5_TOUT115_P01_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_5_TOUT135_P22_9_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_5_TOUT159_P01_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_5_TOUT179_P31_5_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_5_TOUT211_P25_5_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_5_TOUT246_P15_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM3_5_TOUT265_P10_9_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_5N_TOUT153_P02_13_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_5N_TOUT155_P01_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_5N_TOUT166_P00_14_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_5N_TOUT174_P31_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_5N_TOUT206_P25_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_5N_TOUT268_P10_13_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_6_TOUT136_P22_10_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_6_TOUT160_P01_9_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_6_TOUT180_P31_6_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_6_TOUT212_P25_6_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_6_TOUT212_P26_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_6_TOUT247_P15_15_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_6_TOUT266_P10_10_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_6N_TOUT154_P02_14_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_6N_TOUT156_P01_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM3_6N_TOUT175_P31_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_6N_TOUT207_P25_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_6N_TOUT242_P15_10_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_6N_TOUT267_P10_14_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_7_TOUT137_P22_11_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_7_TOUT161_P01_13_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_7_TOUT181_P31_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_7_TOUT213_P25_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM3_7_TOUT248_P13_9_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_7_TOUT269_P10_11_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_7N_TOUT152_P02_15_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_7N_TOUT157_P01_15_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_7N_TOUT176_P31_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_7N_TOUT208_P25_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_7N_TOUT243_P15_11_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_7N_TOUT270_P10_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM3_8_TOUT162_P01_8_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_8_TOUT182_P31_8_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_8_TOUT186_P31_12_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_8_TOUT214_P25_8_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_8_TOUT218_P25_12_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_8_TOUT249_P13_12_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_9_TOUT163_P01_10_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_9_TOUT183_P31_9_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_9_TOUT187_P31_13_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_9_TOUT215_P25_9_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_9_TOUT219_P25_13_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM3_9_TOUT265_P10_9_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM4_0_TOUT155_P01_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM4_0_TOUT162_P01_8_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM4_0_TOUT190_P30_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM4_0_TOUT222_P24_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM4_0_TOUT250_P13_11_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM4_10_TOUT164_P01_14_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM4_10_TOUT200_P30_10_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM4_10_TOUT204_P30_14_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM4_10_TOUT232_P24_10_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM4_10_TOUT260_P14_13_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM4_11_TOUT166_P00_14_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM4_11_TOUT201_P30_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM4_11_TOUT205_P30_15_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM4_11_TOUT233_P24_11_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM4_11_TOUT261_P14_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM4_12_TOUT167_P00_13_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM4_12_TOUT202_P30_12_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM4_12_TOUT230_P24_8_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM4_12_TOUT234_P24_12_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM4_12_TOUT262_P13_13_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM4_13_TOUT168_P00_15_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM4_13_TOUT203_P30_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM4_13_TOUT231_P24_9_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM4_13_TOUT235_P24_13_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM4_13_TOUT263_P14_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM4_14_TOUT151_P02_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM4_14_TOUT153_P02_13_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM4_14_TOUT204_P30_14_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM4_14_TOUT232_P24_10_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM4_14_TOUT236_P24_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM4_14_TOUT264_P13_15_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM4_15_TOUT152_P02_15_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM4_15_TOUT154_P02_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM4_15_TOUT205_P30_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM4_15_TOUT233_P24_11_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM4_15_TOUT237_P24_15_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM4_1_TOUT156_P01_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM4_1_TOUT163_P01_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM4_1_TOUT191_P30_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM4_1_TOUT223_P24_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM4_1_TOUT251_P13_10_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM4_2_TOUT157_P01_15_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM4_2_TOUT164_P01_14_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM4_2_TOUT192_P30_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM4_2_TOUT224_P24_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM4_2_TOUT252_P13_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM4_3_TOUT165_P01_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM4_3_TOUT193_P30_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM4_3_TOUT225_P24_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM4_3_TOUT253_P13_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM4_4_TOUT111_P01_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM4_4_TOUT158_P01_12_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM4_4_TOUT194_P30_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM4_4_TOUT226_P24_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM4_4_TOUT254_P13_5_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM4_4_TOUT8_P02_8_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM4_5_TOUT116_P02_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM4_5_TOUT159_P01_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM4_5_TOUT195_P30_5_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM4_5_TOUT227_P24_5_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM4_5_TOUT255_P13_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM4_6_TOUT117_P02_10_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM4_6_TOUT160_P01_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM4_6_TOUT196_P30_6_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM4_6_TOUT228_P24_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM4_6_TOUT256_P13_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM4_7_TOUT118_P02_11_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM4_7_TOUT161_P01_13_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM4_7_TOUT197_P30_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM4_7_TOUT229_P24_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM4_7_TOUT264_P13_15_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM4_8_TOUT162_P01_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM4_8_TOUT198_P30_8_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM4_8_TOUT202_P30_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM4_8_TOUT230_P24_8_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM4_8_TOUT258_P14_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM4_9_TOUT163_P01_10_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM4_9_TOUT199_P30_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM4_9_TOUT203_P30_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM4_9_TOUT231_P24_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM4_9_TOUT259_P14_14_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_Tom_Dtm_PwmHl_modes : IfxGtm_Tom_Dtm_PwmHl.c
  • IfxGtm_Tom_PwmHl_modes : IfxGtm_Tom_PwmHl.c
  • IfxGtm_Trig_CanTrig_table0 : IfxGtm_Trig.c
  • IfxGtm_Trig_CanTrig_table1 : IfxGtm_Trig.c
  • IfxGtm_Trig_CanTrig_table2_3 : IfxGtm_Trig.c
  • IfxGtm_Trig_EvadcTrig_tableAdc0_1_2 : IfxGtm_Trig.c
  • IfxGtm_Trig_EvadcTrig_tableAdc3_4 : IfxGtm_Trig.c
  • IfxGtm_Trig_EvadcTrig_tableAdc5_6_7 : IfxGtm_Trig.c
  • IfxGtm_Trig_EvadcTrig_tableAdc8_9_10_11 : IfxGtm_Trig.c
  • IfxGtm_Trig_MscTrig_table : IfxGtm_Trig.c
  • IfxGtm_Trig_SentTrig_table12_13_14_15 : IfxGtm_Trig.c
  • IfxHssl_cfg_hsctIndexMap : IfxHssl_cfg.h , IfxHssl_cfg.c
  • IfxHssl_cfg_hsslIndexMap : IfxHssl_cfg.c , IfxHssl_cfg.h
  • IfxI2c0_SCL_P02_5_INOUT : IfxI2c_PinMap.h , IfxI2c_PinMap.c
  • IfxI2c0_SCL_P13_1_INOUT : IfxI2c_PinMap.c , IfxI2c_PinMap.h
  • IfxI2c0_SCL_P15_4_INOUT : IfxI2c_PinMap.h , IfxI2c_PinMap.c
  • IfxI2c0_SDA_P02_4_INOUT : IfxI2c_PinMap.c , IfxI2c_PinMap.h
  • IfxI2c0_SDA_P13_2_INOUT : IfxI2c_PinMap.h , IfxI2c_PinMap.c
  • IfxI2c0_SDA_P15_5_INOUT : IfxI2c_PinMap.c , IfxI2c_PinMap.h
  • IfxI2c1_SCL_P11_14_INOUT : IfxI2c_PinMap.c , IfxI2c_PinMap.h
  • IfxI2c1_SCL_P13_9_INOUT : IfxI2c_PinMap.c , IfxI2c_PinMap.h
  • IfxI2c1_SDA_P11_13_INOUT : IfxI2c_PinMap.h , IfxI2c_PinMap.c
  • IfxI2c1_SDA_P13_12_INOUT : IfxI2c_PinMap.c , IfxI2c_PinMap.h
  • IfxI2c_cfg_indexMap : IfxI2c_cfg.h , IfxI2c_cfg.c
  • IfxI2c_Scl_InOut_pinTable : IfxI2c_PinMap.c , IfxI2c_PinMap.h
  • IfxI2c_Sda_InOut_pinTable : IfxI2c_PinMap.h , IfxI2c_PinMap.c
  • IfxMsc0_EN0_P10_2_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_EN0_P10_3_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_EN0_P10_4_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_EN0_P11_11_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_EN0_P14_10_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_EN0_P15_5_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_EN1_P10_1_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_EN1_P11_2_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_EN1_P13_0_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_EN1_P14_9_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_EN1_P15_3_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_FCLN_P13_0_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_FCLP_P11_6_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_FCLP_P13_1_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_FCLP_P13_2_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_INJ0_P00_0_IN : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_INJ1_P10_5_IN : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_SDI0_P11_10_IN : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_SDI1_P10_2_IN : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_SDI2_P14_3_IN : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_SDI3_P11_3_IN : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_SON_P13_2_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_SOP_P11_9_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_SOP_P13_3_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc1_EN0_P23_4_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc1_EN0_P32_4_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc1_EN1_P23_5_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc1_FCLN_P22_0_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc1_FCLP_P22_1_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc1_INJ0_P23_3_IN : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc1_INJ1_P33_13_IN : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc1_SDI0_P23_1_IN : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc1_SDI1_P02_3_IN : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc1_SDI2_P32_4_IN : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc1_SON_P22_2_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc1_SOP_P22_3_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc2_EN0_P13_4_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc2_EN0_P14_14_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc2_EN1_P14_13_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc2_EN2_P14_11_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc2_FCLN_P13_4_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc2_FCLP_P13_5_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc2_INJ0_P13_13_IN : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc2_INJ1_P14_15_IN : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc2_SDI0_P14_12_IN : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc2_SDI1_P14_11_IN : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc2_SON_P13_6_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc2_SOP_P13_7_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc2_SOP_P14_11_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc_cfg_indexMap : IfxMsc_cfg.h , IfxMsc_cfg.c
  • IfxMsc_En_Out_pinTable : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc_Fcln_Out_pinTable : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc_Fclp_Out_pinTable : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc_Inj_In_pinTable : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc_Sdi_In_pinTable : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc_Son_Out_pinTable : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc_Sop_Out_pinTable : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMtu_sramTable : IfxMtu_cfg.h , IfxMtu_cfg.c
  • IfxPms_Dcdcsync_Out_pinTable : IfxPms_PinMap.h , IfxPms_PinMap.c
  • IfxPms_DCDCSYNC_P32_2_OUT : IfxPms_PinMap.h , IfxPms_PinMap.c
  • IfxPms_DCDCSYNC_P32_4_OUT : IfxPms_PinMap.c , IfxPms_PinMap.h
  • IfxPms_HWCFG1IN_P14_5_IN : IfxPms_PinMap.h , IfxPms_PinMap.c
  • IfxPms_HWCFG2IN_P14_2_IN : IfxPms_PinMap.c , IfxPms_PinMap.h
  • IfxPms_HWCFG3IN_P14_3_IN : IfxPms_PinMap.h , IfxPms_PinMap.c
  • IfxPms_HWCFG4IN_P10_5_IN : IfxPms_PinMap.c , IfxPms_PinMap.h
  • IfxPms_HWCFG5IN_P10_6_IN : IfxPms_PinMap.c , IfxPms_PinMap.h
  • IfxPms_HWCFG6IN_P14_4_IN : IfxPms_PinMap.c , IfxPms_PinMap.h
  • IfxPms_Hwcfg_In_pinTable : IfxPms_PinMap.h , IfxPms_PinMap.c
  • IfxPms_PINAWKP_P14_1_IN : IfxPms_PinMap.c , IfxPms_PinMap.h
  • IfxPms_PINBWKP_P33_12_IN : IfxPms_PinMap.c , IfxPms_PinMap.h
  • IfxPms_Wkp_In_pinTable : IfxPms_PinMap.c , IfxPms_PinMap.h
  • IfxPmsEvr_cfgPhase1Default : IfxPmsEvr.h , IfxPmsEvr.c
  • IfxPmsEvr_cfgPhase2Default : IfxPmsEvr.c , IfxPmsEvr.h
  • IfxPmsEvr_cfgPhase3Default : IfxPmsEvr.h , IfxPmsEvr.c
  • IfxPmsEvr_cfgPhasesDefault : IfxPmsEvr.c , IfxPmsEvr.h
  • IfxPmsEvr_cfgSequenceDefault : IfxPmsEvr.c , IfxPmsEvr.h
  • IfxPmsEvr_checkRegCfgDefault : IfxPmsEvr.c , IfxPmsEvr.h
  • IfxPmsEvr_checkRegValuesDefault : IfxPmsEvr.h , IfxPmsEvr.c
  • IfxPort_cfg_esrMasks : IfxPort_cfg.c , IfxPort_cfg.h
  • IfxPort_cfg_indexMap : IfxPort_cfg.h , IfxPort_cfg.c
  • IfxPort_P00_0 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P00_1 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P00_10 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P00_11 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P00_12 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P00_13 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P00_14 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P00_15 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P00_2 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P00_3 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P00_4 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P00_5 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P00_6 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P00_7 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P00_8 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P00_9 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P01_0 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P01_1 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P01_10 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P01_11 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P01_12 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P01_13 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P01_14 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P01_15 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P01_2 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P01_3 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P01_4 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P01_5 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P01_6 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P01_7 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P01_8 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P01_9 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P02_0 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P02_1 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P02_10 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P02_11 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P02_12 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P02_13 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P02_14 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P02_15 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P02_2 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P02_3 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P02_4 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P02_5 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P02_6 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P02_7 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P02_8 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P02_9 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P10_0 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P10_1 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P10_10 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P10_11 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P10_13 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P10_14 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P10_15 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P10_2 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P10_3 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P10_4 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P10_5 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P10_6 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P10_7 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P10_8 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P10_9 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P11_0 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P11_1 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P11_10 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P11_11 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P11_12 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P11_13 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P11_14 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P11_15 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P11_2 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P11_3 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P11_4 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P11_5 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P11_6 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P11_7 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P11_8 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P11_9 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P12_0 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P12_1 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P13_0 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P13_1 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P13_10 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P13_11 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P13_12 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P13_13 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P13_14 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P13_15 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P13_2 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P13_3 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P13_4 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P13_5 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P13_6 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P13_7 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P13_9 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P14_0 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P14_1 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P14_10 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P14_11 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P14_12 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P14_13 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P14_14 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P14_15 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P14_2 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P14_3 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P14_4 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P14_5 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P14_6 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P14_7 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P14_8 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P14_9 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P15_0 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P15_1 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P15_10 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P15_11 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P15_12 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P15_13 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P15_14 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P15_15 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P15_2 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P15_3 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P15_4 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P15_5 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P15_6 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P15_7 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P15_8 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P20_0 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P20_1 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P20_10 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P20_11 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P20_12 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P20_13 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P20_14 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P20_3 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P20_6 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P20_7 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P20_8 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P20_9 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P21_0 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P21_1 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P21_2 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P21_3 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P21_4 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P21_5 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P21_6 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P21_7 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P22_0 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P22_1 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P22_10 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P22_11 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P22_2 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P22_3 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P22_4 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P22_5 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P22_6 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P22_7 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P22_8 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P22_9 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P23_0 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P23_1 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P23_2 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P23_3 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P23_4 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P23_5 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P23_6 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P23_7 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P24_0 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P24_1 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P24_10 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P24_11 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P24_12 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P24_13 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P24_14 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P24_15 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P24_2 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P24_3 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P24_4 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P24_5 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P24_6 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P24_7 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P24_8 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P24_9 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P25_0 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P25_1 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P25_10 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P25_11 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P25_12 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P25_13 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P25_14 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P25_15 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P25_2 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P25_3 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P25_4 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P25_5 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P25_6 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P25_7 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P25_8 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P25_9 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P26_0 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P30_0 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P30_1 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P30_10 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P30_11 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P30_12 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P30_13 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P30_14 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P30_15 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P30_2 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P30_3 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P30_4 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P30_5 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P30_6 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P30_7 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P30_8 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P30_9 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P31_0 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P31_1 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P31_10 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P31_11 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P31_12 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P31_13 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P31_14 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P31_15 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P31_2 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P31_3 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P31_4 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P31_5 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P31_6 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P31_7 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P31_8 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P31_9 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P32_0 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P32_1 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P32_2 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P32_3 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P32_4 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P32_5 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P32_6 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P32_7 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P33_0 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P33_1 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P33_10 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P33_11 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P33_12 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P33_13 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P33_14 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P33_15 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P33_2 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P33_3 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P33_4 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P33_5 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P33_6 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P33_7 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P33_8 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P33_9 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P34_1 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P34_2 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P34_3 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P34_4 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P34_5 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P40_0 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P40_1 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P40_10 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P40_11 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P40_12 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P40_13 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P40_14 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P40_15 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P40_2 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P40_3 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P40_4 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P40_5 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P40_6 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P40_7 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P40_8 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P40_9 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P41_0 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P41_1 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P41_2 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P41_3 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P41_4 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P41_5 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P41_6 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P41_7 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P41_8 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_Pin_pinTable : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPsi5_RX0A_P00_1_IN : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h
  • IfxPsi5_RX0B_P02_3_IN : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5_RX0C_P33_1_IN : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h
  • IfxPsi5_RX1A_P00_3_IN : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5_RX1B_P02_5_IN : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h
  • IfxPsi5_RX1C_P33_3_IN : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5_RX2A_P00_5_IN : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h
  • IfxPsi5_RX2B_P02_7_IN : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5_RX2C_P33_5_IN : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h
  • IfxPsi5_RX3A_P13_10_IN : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h
  • IfxPsi5_RX3B_P13_13_IN : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h
  • IfxPsi5_RX3C_P10_6_IN : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5_Rx_In_pinTable : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h
  • IfxPsi5_TX0_P00_2_OUT : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5_TX0_P02_2_OUT : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5_TX0_P33_2_OUT : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h
  • IfxPsi5_TX1_P00_4_OUT : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5_TX1_P02_6_OUT : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5_TX1_P33_4_OUT : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h
  • IfxPsi5_TX2_P00_6_OUT : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5_TX2_P02_8_OUT : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5_TX2_P33_6_OUT : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5_TX3_P10_5_OUT : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h
  • IfxPsi5_TX3_P13_11_OUT : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h
  • IfxPsi5_TX3_P13_15_OUT : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5_Tx_Out_pinTable : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5s_Clk_Out_pinTable : IfxPsi5s_PinMap.h , IfxPsi5s_PinMap.c
  • IfxPsi5s_CLK_P02_4_OUT : IfxPsi5s_PinMap.c , IfxPsi5s_PinMap.h
  • IfxPsi5s_CLK_P33_10_OUT : IfxPsi5s_PinMap.c , IfxPsi5s_PinMap.h
  • IfxPsi5s_Rx_In_pinTable : IfxPsi5s_PinMap.c , IfxPsi5s_PinMap.h
  • IfxPsi5s_RXA_P00_3_IN : IfxPsi5s_PinMap.h , IfxPsi5s_PinMap.c
  • IfxPsi5s_RXB_P02_5_IN : IfxPsi5s_PinMap.h , IfxPsi5s_PinMap.c
  • IfxPsi5s_RXC_P33_5_IN : IfxPsi5s_PinMap.c , IfxPsi5s_PinMap.h
  • IfxPsi5s_Tx_Out_pinTable : IfxPsi5s_PinMap.h , IfxPsi5s_PinMap.c
  • IfxPsi5s_TX_P00_4_OUT : IfxPsi5s_PinMap.c , IfxPsi5s_PinMap.h
  • IfxPsi5s_TX_P02_6_OUT : IfxPsi5s_PinMap.c , IfxPsi5s_PinMap.h
  • IfxPsi5s_TX_P33_6_OUT : IfxPsi5s_PinMap.c , IfxPsi5s_PinMap.h
  • IfxQspi0_MRST_P20_12_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi0_MRST_P22_6_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_MRST_P22_9_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi0_MRSTA_P20_12_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_MRSTB_P22_9_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi0_MRSTC_P22_6_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi0_MTSR_P20_12_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi0_MTSR_P20_14_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi0_MTSR_P22_10_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi0_MTSR_P22_5_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_MTSRA_P20_14_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_MTSRB_P22_10_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi0_MTSRC_P22_5_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_SCLK_P20_11_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi0_SCLK_P20_13_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi0_SCLK_P22_7_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_SCLK_P22_8_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi0_SCLKA_P20_11_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_SCLKB_P22_8_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi0_SCLKC_P22_7_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_SLSIA_P20_13_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi0_SLSIB_P20_9_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_SLSO0_P20_8_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi0_SLSO10_P22_11_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_SLSO11_P23_6_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_SLSO12_P22_4_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi0_SLSO13_P15_0_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_SLSO1_P20_9_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_SLSO2_P20_13_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_SLSO3_P11_10_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi0_SLSO4_P11_11_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi0_SLSO5_P11_2_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_SLSO6_P20_10_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_SLSO7_P33_5_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi0_SLSO8_P20_6_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_SLSO9_P20_3_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_MRST_P10_1_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi1_MRST_P10_6_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_MRST_P11_3_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi1_MRSTA_P10_1_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_MRSTB_P11_3_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi1_MTSR_P10_1_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi1_MTSR_P10_3_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_MTSR_P10_4_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_MTSR_P11_9_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_MTSRA_P10_3_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi1_MTSRB_P11_9_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi1_MTSRC_P10_4_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi1_SCLK_P10_2_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi1_SCLK_P11_6_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi1_SCLKA_P10_2_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi1_SCLKB_P11_6_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi1_SLSIA_P11_10_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi1_SLSO0_P20_8_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi1_SLSO10_P10_0_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_SLSO1_P20_9_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_SLSO2_P20_13_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi1_SLSO3_P11_10_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi1_SLSO4_P11_11_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_SLSO5_P11_2_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_SLSO6_P33_10_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_SLSO7_P33_5_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_SLSO8_P10_4_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_SLSO9_P10_5_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_MRST_P15_4_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_MRST_P15_7_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_MRST_P34_4_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_MRSTA_P15_4_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_MRSTB_P15_7_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_MRSTCN_P21_2_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_MRSTCP_P21_3_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_MRSTD_P34_4_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_MRSTE_P15_2_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_MRSTFN_P14_9_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_MRSTFP_P14_10_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_MTSR_P15_5_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_MTSR_P15_6_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_MTSR_P34_5_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_MTSRA_P15_5_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_MTSRB_P15_6_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_MTSRD_P34_5_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_MTSRN_P13_2_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_MTSRP_P13_3_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_SCLK_P15_3_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_SCLK_P15_6_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_SCLK_P15_8_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_SCLK_P33_14_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_SCLK_P33_1_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_SCLKA_P15_3_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_SCLKB_P15_8_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_SCLKD_P33_14_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_SCLKN_P13_0_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_SCLKP_P13_1_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_SLSIA_P15_2_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_SLSIB_P15_1_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_SLSO0_P15_2_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_SLSO10_P33_2_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_SLSO10_P34_3_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_SLSO11_P33_15_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_SLSO11_P33_6_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_SLSO12_P32_6_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_SLSO12_P33_4_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_SLSO1_P14_2_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_SLSO2_P14_6_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_SLSO3_P14_3_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_SLSO4_P14_7_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_SLSO5_P15_1_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_SLSO6_P33_13_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_SLSO7_P20_10_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_SLSO8_P20_6_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_SLSO9_P20_3_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_MRST_P01_5_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_MRST_P02_5_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_MRST_P10_7_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_MRSTA_P02_5_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_MRSTB_P10_7_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_MRSTC_P01_5_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_MTSR_P01_6_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_MTSR_P02_6_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_MTSR_P10_6_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_MTSRA_P02_6_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_MTSRB_P10_6_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_MTSRC_P01_6_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SCLK_P01_7_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SCLK_P02_7_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SCLK_P10_8_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SCLKA_P02_7_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SCLKB_P10_8_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SCLKC_P01_7_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SLSIA_P02_4_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SLSIB_P01_3_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SLSO0_P02_4_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SLSO10_P01_4_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SLSO1_P02_0_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SLSO2_P02_1_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SLSO3_P00_5_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SLSO3_P02_2_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SLSO4_P00_2_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SLSO4_P02_3_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SLSO5_P02_12_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SLSO5_P02_8_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SLSO6_P00_8_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SLSO6_P02_15_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SLSO7_P00_9_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SLSO7_P02_13_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SLSO8_P10_5_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SLSO9_P01_3_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi4_MRST_P22_1_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi4_MRST_P33_13_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi4_MRSTA_P33_13_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi4_MRSTB_P22_1_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi4_MRSTCN_P21_2_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi4_MRSTCP_P21_3_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi4_MRSTDN_P21_0_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi4_MRSTDP_P21_1_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi4_MTSR_P22_0_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi4_MTSR_P33_12_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi4_MTSRA_P33_12_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi4_MTSRB_P22_0_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi4_MTSRN_P22_2_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi4_MTSRP_P22_3_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi4_SCLK_P22_3_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi4_SCLK_P33_11_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi4_SCLKA_P33_11_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi4_SCLKB_P22_3_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi4_SCLKN_P22_0_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi4_SCLKP_P22_1_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi4_SLSIA_P33_10_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi4_SLSIB_P22_2_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi4_SLSO0_P33_10_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi4_SLSO1_P33_9_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi4_SLSO2_P33_3_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi4_SLSO2_P33_8_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi4_SLSO3_P22_2_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi4_SLSO4_P02_12_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi4_SLSO4_P23_5_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi4_SLSO5_P02_15_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi4_SLSO5_P23_4_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi4_SLSO6_P02_13_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi4_SLSO6_P23_1_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi4_SLSO7_P02_1_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi4_SLSO7_P33_7_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi_cfg_indexMap : IfxQspi_cfg.h , IfxQspi_cfg.c
  • IfxQspi_Mrst_In_pinTable : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi_Mrst_Out_pinTable : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi_Mtsr_In_pinTable : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi_Mtsr_Out_pinTable : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi_Sclk_In_pinTable : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi_Sclk_Out_pinTable : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi_Slsi_In_pinTable : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi_Slso_Out_pinTable : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi_SpiSlave_dummyRxValue : IfxQspi_SpiSlave.c
  • IfxQspi_SpiSlave_dummyTxValue : IfxQspi_SpiSlave.c
  • IfxScu_Emgstop_In_pinTable : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_EMGSTOPA_P33_8_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_EMGSTOPB_P21_2_IN : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_EXTCLK0_P00_15_OUT : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_EXTCLK0_P23_1_OUT : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_EXTCLK1_P00_13_OUT : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_EXTCLK1_P11_12_OUT : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_EXTCLK1_P32_4_OUT : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_Extclk_Out_pinTable : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_REQ0A_P15_4_IN : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_REQ0C_P10_7_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_REQ1A_P14_3_IN : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_REQ1C_P10_8_IN : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_REQ2A_P10_2_IN : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_REQ2B_P02_1_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_REQ2C_P00_4_IN : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_REQ3A_P10_3_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_REQ3B_P14_1_IN : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_REQ3C_P02_0_IN : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_REQ4A_P33_7_IN : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_REQ4D_P15_5_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_REQ5A_P15_8_IN : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_REQ6A_P20_0_IN : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_REQ6D_P11_10_IN : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_REQ7A_P20_9_IN : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_REQ7C_P15_1_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_Req_In_pinTable : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScuCcu_defaultClockConfig : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_defaultFlashWaitstateConfig : IfxScuCcu.c
  • IfxScuCcu_defaultModConfig : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_defaultPllConfigSteps : IfxScuCcu.c
  • IfxScuCcu_MA_percent : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_xtalFrequency : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuLbist_defaultConfig : IfxScuLbist.h , IfxScuLbist.c
  • IfxSent_SENT0A_P40_0_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT0B_P00_1_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT0C_P02_8_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT10A_P40_10_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT10B_P00_11_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT10C_P32_5_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT10D_P15_2_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT11A_P40_11_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT11B_P00_12_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT11C_P32_6_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT11D_P15_4_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT12A_P40_12_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT12B_P02_4_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT12C_P32_7_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT13A_P40_13_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT13B_P02_3_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT13C_P33_0_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT14A_P40_14_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT14B_P02_2_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT14C_P33_7_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT15A_P40_15_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT15B_P01_1_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT15C_P10_9_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT16A_P41_0_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT16B_P01_9_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT16C_P10_10_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT17A_P41_1_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT17B_P01_8_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT17C_P10_14_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT17D_P14_0_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT18A_P41_2_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT18B_P01_10_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT18C_P10_13_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT18D_P14_1_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT19A_P41_3_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT19B_P01_11_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT19C_P10_11_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT1A_P40_1_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT1B_P00_2_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT1C_P02_7_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT20A_P41_4_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT20B_P02_9_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT20C_P31_8_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT21A_P41_5_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT21B_P02_10_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT21C_P31_9_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT22A_P41_6_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT22B_P02_11_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT22C_P31_10_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT23A_P41_7_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT23B_P02_12_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT23C_P31_11_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT24A_P41_8_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT24B_P02_13_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT24C_P31_12_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT2A_P40_2_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT2B_P00_3_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT2C_P02_6_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT3A_P40_3_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT3B_P00_4_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT3C_P02_5_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT4A_P40_4_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT4B_P00_5_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT4C_P33_6_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT5A_P40_5_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT5B_P00_6_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT5C_P33_5_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT6A_P40_6_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT6B_P00_7_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT6C_P33_4_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT7A_P40_7_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT7B_P00_8_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT7C_P33_3_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT8A_P40_8_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT8B_P00_9_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT8C_P33_2_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT9A_P40_9_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT9B_P00_10_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT9C_P33_1_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_Sent_In_pinTable : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SPC0_P00_1_OUT : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SPC1_P02_7_OUT : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SPC2_P00_3_OUT : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SPC3_P00_4_OUT : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SPC4_P00_5_OUT : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SPC5_P00_6_OUT : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SPC6_P00_7_OUT : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SPC7_P00_8_OUT : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SPC8_P00_9_OUT : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SPC9_P00_10_OUT : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_Spc_Out_pinTable : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSmu_FSP0_P33_8_OUT : IfxSmu_PinMap.c , IfxSmu_PinMap.h
  • IfxSmu_FSP1_P33_10_OUT : IfxSmu_PinMap.c , IfxSmu_PinMap.h
  • IfxSmu_Fsp_Out_pinTable : IfxSmu_PinMap.h , IfxSmu_PinMap.c
  • IfxStm_cfg_indexMap : IfxStm_cfg.c , IfxStm_cfg.h
  • insert : IfxCpu_IntrinsicsDcc.h
  • isync : Ifx_Ssw_CompilersDcc.h , IfxCpu_IntrinsicsDcc.h


iLLD_TC38A: Globals

- m -

  • max : IfxCpu_IntrinsicsDcc.h
  • mbistGang0Config : IfxMtu_cfg.c
  • mbistGang1Config : IfxMtu_cfg.c
  • mbistGang2Config : IfxMtu_cfg.c
  • mbistGang3Config : IfxMtu_cfg.c
  • mbistGang4Config : IfxMtu_cfg.c
  • mbistGang5Config : IfxMtu_cfg.c
  • mbistGang6Config : IfxMtu_cfg.c
  • mbistGang7Config : IfxMtu_cfg.c
  • mbistGangConfig : IfxMtu_cfg.c
  • mbistSshConfigGang0 : IfxMtu_cfg.c
  • mbistSshConfigGang1 : IfxMtu_cfg.c
  • mbistSshConfigGang2 : IfxMtu_cfg.c
  • mbistSshConfigGang3 : IfxMtu_cfg.c
  • mbistSshConfigGang4 : IfxMtu_cfg.c
  • mbistSshConfigGang5 : IfxMtu_cfg.c
  • mbistSshConfigGang6 : IfxMtu_cfg.c
  • mbistSshConfigGang7 : IfxMtu_cfg.c
  • mfcr : Ifx_Ssw_CompilersDcc.h , IfxCpu_IntrinsicsDcc.h
  • min : IfxCpu_IntrinsicsDcc.h
  • mtcr : IfxCpu_IntrinsicsDcc.h , Ifx_Ssw_CompilersDcc.h


iLLD_TC38A: Globals

- n -

  • nonDestructiveTestPattern : IfxMtu_cfg.c
  • nop : Ifx_Ssw_CompilersDcc.h , IfxCpu_IntrinsicsDcc.h


iLLD_TC38A: Globals

- r -

  • restore : IfxCpu_IntrinsicsDcc.h
  • rslcx : IfxCpu_IntrinsicsDcc.h


iLLD_TC38A: Globals

- s -

  • svlcx : IfxCpu_IntrinsicsDcc.h
  • syscall : IfxCpu_IntrinsicsDcc.h


iLLD_TC38A: Globals

- t -

  • t : IfxCpu_IntrinsicsDcc.h
  • TimeConst : Bsp.h


iLLD_TC38A: Globals

- u -

  • u : IfxCpu_IntrinsicsDcc.h , Ifx_Ssw_CompilersDcc.h


iLLD_TC38A: Globals

- w -

  • wi : IfxCpu_IntrinsicsDcc.h


iLLD_TC38A: Globals

- _ -

  • __packb : Ifx_TypesDcc.h , Ifx_TypesGhs.h , Ifx_TypesGnuc.h
  • __packhw : Ifx_TypesDcc.h , Ifx_TypesGhs.h , Ifx_TypesGnuc.h
  • __upackb : Ifx_TypesGnuc.h , Ifx_TypesGhs.h , Ifx_TypesDcc.h
  • __upackhw : Ifx_TypesGnuc.h , Ifx_TypesDcc.h , Ifx_TypesGhs.h

- b -

  • boolean : Platform_Types.h

- c -

  • circ_t : Ifx_TypesDcc.h

- f -

  • float32 : Platform_Types.h
  • float64 : Platform_Types.h
  • fract : Ifx_TypesGhs.h , Ifx_TypesDcc.h , Ifx_TypesGnuc.h

- i -

  • Icu : Icu.h
  • Icu_GetTimeStamp : Icu.h
  • Icu_StartCapture : Icu.h
  • Icu_StopCapture : Icu.h
  • Ifx_AddressValue : Ifx_Types.h
  • Ifx_Fifo : Ifx_Fifo.h
  • Ifx_GTM_TOM_TGC : IfxGtm_cfg.h
  • Ifx_Lut_FxpAngle : Ifx_Lut.h
  • Ifx_Priority : Ifx_Types.h
  • Ifx_Shell_Call : Ifx_Shell.h
  • Ifx_Shell_CommandList : Ifx_Shell.h
  • Ifx_Shell_CommandListConst : Ifx_Shell.h
  • Ifx_SignedTimerVal : Ifx_Types.h
  • Ifx_SizeT : Ifx_Types.h
  • Ifx_TickTime : Ifx_Types.h
  • Ifx_TimerValue : Ifx_Types.h
  • IfxCcu6_PwmHl : IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_Update : IfxCcu6_PwmHl.h
  • IfxCpu_mutexLock : IfxCpu.h
  • IfxCpu_spinLock : IfxCpu.h
  • IfxCpu_syncEvent : IfxCpu.h
  • IfxCpu_Trap_NonMaskableInterrupt_Id : IfxCpu_Trap.h
  • IfxCpu_Trap_SystemCall_Id : IfxCpu_Trap.h
  • IfxEvadc_Adc_SYNCTR_STSEL : IfxEvadc_Adc.h
  • IfxGpt12_IncrEnc_Update : IfxGpt12_IncrEnc.h
  • IfxGtm_Atom_Dtm_PwmHl_Update : IfxGtm_Atom_Dtm_PwmHl.h
  • IfxGtm_Atom_Dtm_PwmHl_UpdatePulse : IfxGtm_Atom_Dtm_PwmHl.h
  • IfxGtm_Atom_Dtm_PwmHl_UpdateShift : IfxGtm_Atom_Dtm_PwmHl.h
  • IfxGtm_Atom_PwmHl : IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_Update : IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_UpdatePulse : IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_UpdateShift : IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_ToutMapP : IfxGtm_PinMap.h
  • IfxGtm_AtomDtm_PwmHl : IfxGtm_Atom_Dtm_PwmHl.h
  • IfxGtm_Tom_Dtm_PwmHl_Update : IfxGtm_Tom_Dtm_PwmHl.h
  • IfxGtm_Tom_Dtm_PwmHl_UpdatePulse : IfxGtm_Tom_Dtm_PwmHl.h
  • IfxGtm_Tom_Dtm_PwmHl_UpdateShift : IfxGtm_Tom_Dtm_PwmHl.h
  • IfxGtm_Tom_PwmHl : IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_Update : IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_UpdatePulse : IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_UpdateShift : IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_ToutMapP : IfxGtm_PinMap.h
  • IfxGtm_TomDtm_PwmHl : IfxGtm_Tom_Dtm_PwmHl.h
  • IfxQspi_SpiMaster_AutoSlso : IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_Channel : IfxQspi_SpiMaster.h
  • IfxScuCcu_PllStepsFunctionHook : IfxScuCcu.h
  • IfxStdIf_DPipe : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_CanReadCount : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_CanWriteCount : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_ClearRx : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_ClearTx : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_FlushTx : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_GetReadCount : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_GetReadEvent : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_GetSendCount : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_GetTxTimeStamp : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_GetWriteCount : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_GetWriteEvent : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_OnError : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_OnReceive : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_OnTransmit : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_Read : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_ReadEvent : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_ResetSendCount : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_Write : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_WriteEvent : IfxStdIf_DPipe.h
  • IfxStdIf_InterfaceDriver : IfxStdIf.h
  • IfxStdIf_Pos : IfxStdIf_Pos.h
  • IfxStdIf_Pos_GetAbsolutePosition : IfxStdIf_Pos.h
  • IfxStdIf_Pos_GetDirection : IfxStdIf_Pos.h
  • IfxStdIf_Pos_GetFault : IfxStdIf_Pos.h
  • IfxStdIf_Pos_GetOffset : IfxStdIf_Pos.h
  • IfxStdIf_Pos_GetPeriodPerRotation : IfxStdIf_Pos.h
  • IfxStdIf_Pos_GetPosition : IfxStdIf_Pos.h
  • IfxStdIf_Pos_GetRawPosition : IfxStdIf_Pos.h
  • IfxStdIf_Pos_GetRefreshPeriod : IfxStdIf_Pos.h
  • IfxStdIf_Pos_GetResolution : IfxStdIf_Pos.h
  • IfxStdIf_Pos_GetSensorType : IfxStdIf_Pos.h
  • IfxStdIf_Pos_GetSpeed : IfxStdIf_Pos.h
  • IfxStdIf_Pos_GetTurn : IfxStdIf_Pos.h
  • IfxStdIf_Pos_OnEventA : IfxStdIf_Pos.h
  • IfxStdIf_Pos_OnZeroIrq : IfxStdIf_Pos.h
  • IfxStdIf_Pos_RawAngle : IfxStdIf_Pos.h
  • IfxStdIf_Pos_Reset : IfxStdIf_Pos.h
  • IfxStdIf_Pos_ResetFaults : IfxStdIf_Pos.h
  • IfxStdIf_Pos_SetOffset : IfxStdIf_Pos.h
  • IfxStdIf_Pos_SetPosition : IfxStdIf_Pos.h
  • IfxStdIf_Pos_SetRawPosition : IfxStdIf_Pos.h
  • IfxStdIf_Pos_SetRefreshPeriod : IfxStdIf_Pos.h
  • IfxStdIf_Pos_SetSpeed : IfxStdIf_Pos.h
  • IfxStdIf_Pos_Update : IfxStdIf_Pos.h
  • IfxStdIf_PwmHl : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_GetDeadtime : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_GetDeadtimeTick : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_GetMinPulse : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_GetMode : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_SetDeadtime : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_SetMinPulse : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_SetMode : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_SetOnTime : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_SetOnTimeAndShift : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_SetPulse : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_SetupChannels : IfxStdIf_PwmHl.h
  • IfxStdIf_Timer : IfxStdIf_Timer.h
  • IfxStdIf_Timer_AckTimerIrq : IfxStdIf_Timer.h
  • IfxStdIf_Timer_AckTriggerIrq : IfxStdIf_Timer.h
  • IfxStdIf_Timer_ApplyUpdate : IfxStdIf_Timer.h
  • IfxStdIf_Timer_DisableUpdate : IfxStdIf_Timer.h
  • IfxStdIf_Timer_GetFrequency : IfxStdIf_Timer.h
  • IfxStdIf_Timer_GetInputFrequency : IfxStdIf_Timer.h
  • IfxStdIf_Timer_GetPeriod : IfxStdIf_Timer.h
  • IfxStdIf_Timer_GetResolution : IfxStdIf_Timer.h
  • IfxStdIf_Timer_GetTrigger : IfxStdIf_Timer.h
  • IfxStdIf_Timer_Run : IfxStdIf_Timer.h
  • IfxStdIf_Timer_SetFrequency : IfxStdIf_Timer.h
  • IfxStdIf_Timer_SetPeriod : IfxStdIf_Timer.h
  • IfxStdIf_Timer_SetSingleMode : IfxStdIf_Timer.h
  • IfxStdIf_Timer_SetTrigger : IfxStdIf_Timer.h
  • IfxStdIf_Timer_Stop : IfxStdIf_Timer.h
  • IfxStdIf_Timer_UpdateInputFrequency : IfxStdIf_Timer.h

- l -

  • laccum : Ifx_TypesDcc.h , Ifx_TypesGnuc.h , Ifx_TypesGhs.h

- p -

  • pchar : Ifx_Types.h
  • ptrdiff_t : Ifx_Ssw_CompilersGhs.h
  • pvoid : Ifx_Types.h
  • PwmHl : PwmHl.h
  • PwmHl_Pause : PwmHl.h
  • PwmHl_Resume : PwmHl.h
  • PwmHl_Start : PwmHl.h
  • PwmHl_Stop : PwmHl.h

- r -

  • rodata_ptr : Ifx_Ssw_CompilersGhs.h

- s -

  • sfract : Ifx_TypesDcc.h , Ifx_TypesGhs.h , Ifx_TypesGnuc.h
  • signed_size_t : Ifx_Ssw_CompilersGhs.h
  • sint16 : Platform_Types.h
  • sint16_least : Platform_Types.h
  • sint32 : Platform_Types.h
  • sint32_least : Platform_Types.h
  • sint64 : Platform_Types.h
  • sint8 : Platform_Types.h
  • sint8_least : Platform_Types.h
  • SpiIf : SpiIf.h
  • SpiIf_Cbk : SpiIf.h
  • SpiIf_Ch : SpiIf.h
  • SpiIf_ChConfig : SpiIf.h
  • SpiIf_Exchange : SpiIf.h
  • SpiIf_GetStatus : SpiIf.h
  • SpiIf_OnEvent : SpiIf.h
  • SpiIf_SlsoTiming_HalfTsclk : SpiIf.h
  • syze_t : Ifx_Ssw_CompilersGhs.h

- t -

  • Timer : Timer.h
  • Timer_CountOneStep : Timer.h
  • Timer_Start : Timer.h
  • Timer_StartSingleShotMode : Timer.h
  • Timer_Stop : Timer.h
  • Timer_SynchronousStart : Timer.h
  • Timer_SynchronousStop : Timer.h
  • TPwm : TPwm.h
  • TPwm_Pause : TPwm.h
  • TPwm_Resume : TPwm.h
  • TPwm_Start : TPwm.h
  • TPwm_Stop : TPwm.h
  • TxRxHandler : SpiIf.h

- u -

  • uint16 : Platform_Types.h
  • uint16_least : Platform_Types.h
  • uint32 : Platform_Types.h
  • uint32_least : Platform_Types.h
  • uint64 : Platform_Types.h
  • uint8 : Platform_Types.h
  • uint8_least : Platform_Types.h

- v -

  • voidfunc : IfxCpu_IntrinsicsGhs.h
  • voidfuncvoid : Ifx_Types.h
  • vvoid : Ifx_Types.h

- w -

  • WaitTimeFunction : Bsp.h


iLLD_TC38A: Globals

- i -

  • Ifx_ActiveState : Ifx_Types.h
  • Ifx_DataBufferMode : Ifx_Types.h
  • Ifx_ParityMode : Ifx_Types.h
  • Ifx_Pwm_Mode : Ifx_Types.h
  • Ifx_RxSel : Ifx_Types.h
  • Ifx_Shell_CmdState : Ifx_Shell.h
  • Ifx_Shell_ResultCode : Ifx_Shell.h
  • IfxAsclin_Checksum : IfxAsclin.h
  • IfxAsclin_ChecksumInjection : IfxAsclin.h
  • IfxAsclin_ClockPolarity : IfxAsclin.h
  • IfxAsclin_ClockSource : IfxAsclin.h
  • IfxAsclin_CtsInputSelect : IfxAsclin.h
  • IfxAsclin_DataLength : IfxAsclin.h
  • IfxAsclin_FifoInterruptMode : IfxAsclin.h
  • IfxAsclin_FrameMode : IfxAsclin.h
  • IfxAsclin_HeaderResponseSelect : IfxAsclin.h
  • IfxAsclin_IdleDelay : IfxAsclin.h
  • IfxAsclin_Index : IfxAsclin_cfg.h
  • IfxAsclin_LeadDelay : IfxAsclin.h
  • IfxAsclin_Lin_Direction : IfxAsclin_Lin.h
  • IfxAsclin_LinMode : IfxAsclin.h
  • IfxAsclin_LinResponseTimeoutMode : IfxAsclin.h
  • IfxAsclin_OversamplingFactor : IfxAsclin.h
  • IfxAsclin_ParityType : IfxAsclin.h
  • IfxAsclin_ReceiveBufferMode : IfxAsclin.h
  • IfxAsclin_RtsCtsPolarity : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel : IfxAsclin.h
  • IfxAsclin_RxFifoOutletWidth : IfxAsclin.h
  • IfxAsclin_RxInputSelect : IfxAsclin.h
  • IfxAsclin_SamplePointPosition : IfxAsclin.h
  • IfxAsclin_SamplesPerBit : IfxAsclin.h
  • IfxAsclin_ShiftDirection : IfxAsclin.h
  • IfxAsclin_SlavePolarity : IfxAsclin.h
  • IfxAsclin_SleepMode : IfxAsclin.h
  • IfxAsclin_Spi_Status : IfxAsclin_Spi.h
  • IfxAsclin_Status : IfxAsclin.h
  • IfxAsclin_StopBit : IfxAsclin.h
  • IfxAsclin_SuspendMode : IfxAsclin.h
  • IfxAsclin_TxFifoInletWidth : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel : IfxAsclin.h
  • IfxCan_CanNodeBusOffErrorStatus : IfxCan.h
  • IfxCan_CanNodeCommunicationState : IfxCan.h
  • IfxCan_CanNodeErrorWarningLimitStatus : IfxCan.h
  • IfxCan_ClockSelect : IfxCan.h
  • IfxCan_ClockSource : IfxCan.h
  • IfxCan_DataFieldSize : IfxCan.h
  • IfxCan_DataLengthCode : IfxCan.h
  • IfxCan_FilterElementConfiguration : IfxCan.h
  • IfxCan_FilterType : IfxCan.h
  • IfxCan_FrameMode : IfxCan.h
  • IfxCan_FrameType : IfxCan.h
  • IfxCan_Index : IfxCan_cfg.h
  • IfxCan_Interrupt : IfxCan.h
  • IfxCan_InterruptGroup : IfxCan.h
  • IfxCan_InterruptLine : IfxCan.h
  • IfxCan_LastErrorCodeType : IfxCan.h
  • IfxCan_MessageIdLength : IfxCan.h
  • IfxCan_NodeId : IfxCan_cfg.h
  • IfxCan_NonMatchingFrame : IfxCan.h
  • IfxCan_RxBufferId : IfxCan.h
  • IfxCan_RxFifoMode : IfxCan.h
  • IfxCan_RxMode : IfxCan.h
  • IfxCan_SleepMode : IfxCan.h
  • IfxCan_Status : IfxCan.h
  • IfxCan_SuspendMode : IfxCan.h
  • IfxCan_TxBufferId : IfxCan.h
  • IfxCan_TxMode : IfxCan.h
  • IfxCcu6_CaptureCompareInput : IfxCcu6.h
  • IfxCcu6_CaptureCompareInputSignal : IfxCcu6.h
  • IfxCcu6_CaptureCompareState : IfxCcu6.h
  • IfxCcu6_ChannelOut : IfxCcu6.h
  • IfxCcu6_CountingInputMode : IfxCcu6.h
  • IfxCcu6_DelayBypass : IfxCcu6.h
  • IfxCcu6_ExternalTriggerMode : IfxCcu6.h
  • IfxCcu6_HallSensorTriggerMode : IfxCcu6.h
  • IfxCcu6_Index : IfxCcu6_cfg.h
  • IfxCcu6_InterruptSource : IfxCcu6.h
  • IfxCcu6_MultiChannelSwitchingSelect : IfxCcu6.h
  • IfxCcu6_MultiChannelSwitchingSync : IfxCcu6.h
  • IfxCcu6_ServiceRequest : IfxCcu6.h
  • IfxCcu6_SleepMode : IfxCcu6.h
  • IfxCcu6_SuspendMode : IfxCcu6.h
  • IfxCcu6_T12Channel : IfxCcu6.h
  • IfxCcu6_T12ChannelMode : IfxCcu6.h
  • IfxCcu6_T12CountDirection : IfxCcu6.h
  • IfxCcu6_T12CountMode : IfxCcu6.h
  • IfxCcu6_T13TriggerDirection : IfxCcu6.h
  • IfxCcu6_T13TriggerEvent : IfxCcu6.h
  • IfxCcu6_TimerId : IfxCcu6.h
  • IfxCcu6_TimerInputClock : IfxCcu6.h
  • IfxCcu6_TimerInputSignal : IfxCcu6.h
  • IfxCcu6_TimerRunStatus : IfxCcu6.h
  • IfxCcu6_TrapMode : IfxCcu6.h
  • IfxCcu6_TrapState : IfxCcu6.h
  • IfxCcu6_TrigOut : IfxCcu6_cfg.h
  • IfxCcu6_TrigSel : IfxCcu6_cfg.h
  • IfxConvctrl_PhaseSynchronizerDivider : IfxConvctrl.h
  • IfxConvctrl_SuspendMode : IfxConvctrl.h
  • IfxCpu_CoreMode : IfxCpu.h
  • IfxCpu_CounterMode : IfxCpu.h
  • IfxCpu_DBGST_HALT : IfxCpu_cfg.h
  • IfxCpu_Id : IfxCpu_cfg.h
  • IfxCpu_Index : IfxCpu_cfg.h
  • IfxCpu_OverlayAddressMask : IfxCpu.h
  • IfxCpu_OverlayMemorySelect : IfxCpu.h
  • IfxCpu_PMCSR_PMST : IfxCpu_cfg.h
  • IfxCpu_ResetStatus : IfxCpu.h
  • IfxCpu_ResourceCpu : IfxCpu_cfg.h
  • IfxCpu_Trap_Assertion_Id : IfxCpu_Trap.h
  • IfxCpu_Trap_Bus_Id : IfxCpu_Trap.h
  • IfxCpu_Trap_Class : IfxCpu_Trap.h
  • IfxCpu_Trap_ContextManagement_Id : IfxCpu_Trap.h
  • IfxCpu_Trap_InstructionErrors_Id : IfxCpu_Trap.h
  • IfxCpu_Trap_InternalProtection_Id : IfxCpu_Trap.h
  • IfxCpu_Trap_MemoryManagement_Id : IfxCpu_Trap.h
  • IfxDma_BusMasterMode : IfxDma.h
  • IfxDma_ChannelBusPriority : IfxDma.h
  • IfxDma_ChannelId : IfxDma_cfg.h
  • IfxDma_ChannelIncrementCircular : IfxDma.h
  • IfxDma_ChannelIncrementDirection : IfxDma.h
  • IfxDma_ChannelIncrementStep : IfxDma.h
  • IfxDma_ChannelInterruptControl : IfxDma.h
  • IfxDma_ChannelMove : IfxDma.h
  • IfxDma_ChannelMoveSize : IfxDma.h
  • IfxDma_ChannelOperationMode : IfxDma.h
  • IfxDma_ChannelPattern : IfxDma.h
  • IfxDma_ChannelPriority : IfxDma.h
  • IfxDma_ChannelRequestMode : IfxDma.h
  • IfxDma_ChannelRequestSource : IfxDma.h
  • IfxDma_ChannelShadow : IfxDma.h
  • IfxDma_HardwareResourcePartition : IfxDma.h
  • IfxDma_MoveEngine : IfxDma.h
  • IfxDma_SleepMode : IfxDma.h
  • IfxEdsadc_AnalogClockSyncDelay : IfxEdsadc.h
  • IfxEdsadc_AnalogMux : IfxEdsadc.h
  • IfxEdsadc_AuxServiceRequest : IfxEdsadc.h
  • IfxEdsadc_CarrierWaveformMode : IfxEdsadc.h
  • IfxEdsadc_ChannelId : IfxEdsadc_cfg.h
  • IfxEdsadc_CommonModeHoldVoltage : IfxEdsadc.h
  • IfxEdsadc_DataRead : IfxEdsadc.h
  • IfxEdsadc_DataStream : IfxEdsadc.h
  • IfxEdsadc_dithering : IfxEdsadc.h
  • IfxEdsadc_DitheringIntensity : IfxEdsadc.h
  • IfxEdsadc_EventSelect : IfxEdsadc.h
  • IfxEdsadc_FilterRunTimeInputCycle : IfxEdsadc.h
  • IfxEdsadc_FilterStrength : IfxEdsadc.h
  • IfxEdsadc_FractionalRefVoltage : IfxEdsadc.h
  • IfxEdsadc_FractionalRefVoltageSelection : IfxEdsadc.h
  • IfxEdsadc_HalfSupplyVoltage : IfxEdsadc.h
  • IfxEdsadc_InputConfig : IfxEdsadc.h
  • IfxEdsadc_InputDataSource : IfxEdsadc.h
  • IfxEdsadc_InputGain : IfxEdsadc.h
  • IfxEdsadc_InputMuxControlMode : IfxEdsadc.h
  • IfxEdsadc_InputPin : IfxEdsadc.h
  • IfxEdsadc_IntegrationShiftControl : IfxEdsadc.h
  • IfxEdsadc_IntegrationWindowSize : IfxEdsadc.h
  • IfxEdsadc_IntegratorTrigger : IfxEdsadc.h
  • IfxEdsadc_MainServiceRequest : IfxEdsadc.h
  • IfxEdsadc_ModulatorClockDivider : IfxEdsadc.h
  • IfxEdsadc_ModulatorClockGeneration : IfxEdsadc.h
  • IfxEdsadc_OffsetCompensationFilter : IfxEdsadc.h
  • IfxEdsadc_OvershootCompensation : IfxEdsadc.h
  • IfxEdsadc_RectifierSignSource : IfxEdsadc.h
  • IfxEdsadc_RestartFilterChain : IfxEdsadc.h
  • IfxEdsadc_ResultDisplayMode : IfxEdsadc.h
  • IfxEdsadc_SampleClockSource : IfxEdsadc.h
  • IfxEdsadc_ServiceRequestFifolevel : IfxEdsadc.h
  • IfxEdsadc_SleepMode : IfxEdsadc.h
  • IfxEdsadc_StepDetectionMode : IfxEdsadc.h
  • IfxEdsadc_SupplyVoltageLevel : IfxEdsadc.h
  • IfxEdsadc_SuspendMode : IfxEdsadc.h
  • IfxEdsadc_TimeStampCounterClockSelection : IfxEdsadc.h
  • IfxEdsadc_TimeStampCounterControl : IfxEdsadc.h
  • IfxEdsadc_TimestampTrigger : IfxEdsadc.h
  • IfxEdsadc_TriggerInput : IfxEdsadc.h
  • IfxEray_Baudrate : IfxEray.h
  • IfxEray_BufferDirection : IfxEray.h
  • IfxEray_Channel : IfxEray.h
  • IfxEray_ClearErrorFlag : IfxEray.h
  • IfxEray_ClearStatusFlag : IfxEray.h
  • IfxEray_ClockDivider : IfxEray.h
  • IfxEray_ExternalOffset : IfxEray.h
  • IfxEray_ExternalOffsetCorrection : IfxEray.h
  • IfxEray_ExternalRate : IfxEray.h
  • IfxEray_ExternalRateCorrection : IfxEray.h
  • IfxEray_IdleDynamicSlots : IfxEray.h
  • IfxEray_Index : IfxEray_cfg.h
  • IfxEray_InterruptLine : IfxEray.h
  • IfxEray_ListenTimeOutNoise : IfxEray.h
  • IfxEray_MaxSynchFrames : IfxEray.h
  • IfxEray_NodeId : IfxEray_cfg.h
  • IfxEray_PocCommand : IfxEray.h
  • IfxEray_PocState : IfxEray.h
  • IfxEray_ReceiveChannel : IfxEray.h
  • IfxEray_SleepMode : IfxEray.h
  • IfxEray_StrobePosition : IfxEray.h
  • IfxEray_SuspendMode : IfxEray.h
  • IfxEray_TransmissionMode : IfxEray.h
  • IfxEray_TransmissionSlotMode : IfxEray.h
  • IfxEray_WakeupChannel : IfxEray.h
  • IfxEvadc_AnalogClockGenerationMode : IfxEvadc.h
  • IfxEvadc_AnalogClockSynchronizationDelay : IfxEvadc.h
  • IfxEvadc_AnalogConverterMode : IfxEvadc.h
  • IfxEvadc_AnalogInputPrechargeControl : IfxEvadc.h
  • IfxEvadc_ArbitrationMode : IfxEvadc.h
  • IfxEvadc_ArbitrationRounds : IfxEvadc.h
  • IfxEvadc_BoundaryExtension : IfxEvadc.h
  • IfxEvadc_BoundaryFlagActivationMode : IfxEvadc.h
  • IfxEvadc_BoundaryFlagInversionControl : IfxEvadc.h
  • IfxEvadc_BoundaryFlagNodePointer : IfxEvadc.h
  • IfxEvadc_BoundaryFlagSwControl : IfxEvadc.h
  • IfxEvadc_BoundarySelection : IfxEvadc.h
  • IfxEvadc_CalibrationSampleTimeControl : IfxEvadc.h
  • IfxEvadc_ChannelEventMode : IfxEvadc.h
  • IfxEvadc_ChannelId : IfxEvadc.h
  • IfxEvadc_ChannelNoiseReduction : IfxEvadc.h
  • IfxEvadc_ChannelNoiseReductionEMUX : IfxEvadc.h
  • IfxEvadc_ChannelReference : IfxEvadc.h
  • IfxEvadc_ChannelResult : IfxEvadc.h
  • IfxEvadc_ChannelSelectionStyle : IfxEvadc.h
  • IfxEvadc_ClockDividerFactor : IfxEvadc.h
  • IfxEvadc_DataModificationMode : IfxEvadc.h
  • IfxEvadc_DataReductionControlMode : IfxEvadc.h
  • IfxEvadc_EmuxCodingScheme : IfxEvadc.h
  • IfxEvadc_EmuxInterface : IfxEvadc.h
  • IfxEvadc_EmuxSampleTimeControl : IfxEvadc.h
  • IfxEvadc_EmuxSelectValue : IfxEvadc.h
  • IfxEvadc_ExternalMultiplexerMode : IfxEvadc.h
  • IfxEvadc_ExternalTriggerPolarity : IfxEvadc.h
  • IfxEvadc_FastCompareAnalogClockSynchronizationDelay : IfxEvadc.h
  • IfxEvadc_FastCompareAnalogConverterControl : IfxEvadc.h
  • IfxEvadc_FastCompareAutomaticUpdate : IfxEvadc.h
  • IfxEvadc_FastCompareRunControl : IfxEvadc.h
  • IfxEvadc_FastCompareServiceRequestGeneration : IfxEvadc.h
  • IfxEvadc_FifoMode : IfxEvadc.h
  • IfxEvadc_GateOperatingMode : IfxEvadc.h
  • IfxEvadc_GatingMode : IfxEvadc.h
  • IfxEvadc_GatingSource : IfxEvadc.h
  • IfxEvadc_GroupId : IfxEvadc_cfg.h
  • IfxEvadc_IdlePrecharge : IfxEvadc.h
  • IfxEvadc_InputClasses : IfxEvadc.h
  • IfxEvadc_LimitCheck : IfxEvadc.h
  • IfxEvadc_MsbConversionTime : IfxEvadc.h
  • IfxEvadc_Protection : IfxEvadc.h
  • IfxEvadc_RampDirection : IfxEvadc.h
  • IfxEvadc_RampRunControl : IfxEvadc.h
  • IfxEvadc_ReferencePrechargeControl : IfxEvadc.h
  • IfxEvadc_RequestSlotPriority : IfxEvadc.h
  • IfxEvadc_RequestSlotStartMode : IfxEvadc.h
  • IfxEvadc_RequestSource : IfxEvadc.h
  • IfxEvadc_SampleSynchronization : IfxEvadc.h
  • IfxEvadc_SleepMode : IfxEvadc.h
  • IfxEvadc_SpreadEarlySamplePointEMUXConversionsMode : IfxEvadc.h
  • IfxEvadc_SpreadEarlySamplePointStandardConversionsMode : IfxEvadc.h
  • IfxEvadc_SrcNr : IfxEvadc.h
  • IfxEvadc_StartupCalibration : IfxEvadc.h
  • IfxEvadc_Status : IfxEvadc.h
  • IfxEvadc_SupplyVoltageLevelControl : IfxEvadc.h
  • IfxEvadc_SuspendMode : IfxEvadc.h
  • IfxEvadc_TriggerMode : IfxEvadc.h
  • IfxEvadc_TriggerOperatingMode : IfxEvadc.h
  • IfxEvadc_TriggerSource : IfxEvadc.h
  • IfxEvadc_WaitForRead : IfxEvadc.h
  • IfxFce_CrcChannel : IfxFce.h
  • IfxFce_CrcKernel : IfxFce.h
  • IfxFlash_FlashType : IfxFlash_cfg.h
  • IfxFlash_UcbType : IfxFlash_cfg.h
  • IfxGeth_DmaBurstLength : IfxGeth.h
  • IfxGeth_DmaChannel : IfxGeth.h
  • IfxGeth_DmaInterruptFlag : IfxGeth.h
  • IfxGeth_DuplexMode : IfxGeth.h
  • IfxGeth_Index : IfxGeth_cfg.h
  • IfxGeth_LineSpeed : IfxGeth.h
  • IfxGeth_LoopbackMode : IfxGeth.h
  • IfxGeth_MtlInterruptFlag : IfxGeth.h
  • IfxGeth_MtlQueue : IfxGeth.h
  • IfxGeth_PhyInterfaceMode : IfxGeth.h
  • IfxGeth_PreambleLength : IfxGeth.h
  • IfxGeth_QueueSize : IfxGeth.h
  • IfxGeth_RxArbitrationAlgorithm : IfxGeth.h
  • IfxGeth_RxDmaChannel : IfxGeth.h
  • IfxGeth_RxMtlQueue : IfxGeth.h
  • IfxGeth_ServiceRequest : IfxGeth.h
  • IfxGeth_TxDmaChannel : IfxGeth.h
  • IfxGeth_TxMtlQueue : IfxGeth.h
  • IfxGeth_TxSchedulingAlgorithm : IfxGeth.h
  • IfxGpt12_CaptureInput : IfxGpt12.h
  • IfxGpt12_CaptureInputMode : IfxGpt12.h
  • IfxGpt12_CaptureTrigger : IfxGpt12.h
  • IfxGpt12_CaptureTriggerMode : IfxGpt12.h
  • IfxGpt12_CounterInputMode : IfxGpt12.h
  • IfxGpt12_EudInput : IfxGpt12.h
  • IfxGpt12_Gpt1BlockPrescaler : IfxGpt12.h
  • IfxGpt12_Gpt2BlockPrescaler : IfxGpt12.h
  • IfxGpt12_IncrementalInterfaceInputMode : IfxGpt12.h
  • IfxGpt12_Input : IfxGpt12.h
  • IfxGpt12_Mode : IfxGpt12.h
  • IfxGpt12_ReloadInputMode : IfxGpt12.h
  • IfxGpt12_SleepMode : IfxGpt12.h
  • IfxGpt12_SuspendMode : IfxGpt12.h
  • IfxGpt12_TimerDirection : IfxGpt12.h
  • IfxGpt12_TimerDirectionSource : IfxGpt12.h
  • IfxGpt12_TimerInputPrescaler : IfxGpt12.h
  • IfxGpt12_TimerReloadMode : IfxGpt12.h
  • IfxGpt12_TimerRemoteControl : IfxGpt12.h
  • IfxGpt12_TimerRun : IfxGpt12.h
  • IfxGtm_Atom : IfxGtm_cfg.h
  • IfxGtm_Atom_AruInput : IfxGtm_Atom.h
  • IfxGtm_Atom_Ch : IfxGtm_cfg.h
  • IfxGtm_Atom_Ch_OutputTrigger : IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_ResetEvent : IfxGtm_Atom.h
  • IfxGtm_Atom_Mode : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcControl : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcSignalLevelControl : IfxGtm_Atom.h
  • IfxGtm_Cdtm : IfxGtm_cfg.h
  • IfxGtm_ChXSel : IfxGtm_PinMap.h
  • IfxGtm_Cluster : IfxGtm_cfg.h
  • IfxGtm_Cmu_Clk : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Eclk : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Fxclk : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Tim_Filter_Clk : IfxGtm_Cmu.h
  • IfxGtm_Dpll_SubInc : IfxGtm_cfg.h
  • IfxGtm_Dtm : IfxGtm_cfg.h
  • IfxGtm_Dtm_Ch : IfxGtm_cfg.h
  • IfxGtm_Dtm_ClockSource : IfxGtm_Dtm.h
  • IfxGtm_Dtm_DeadTimePath : IfxGtm_Dtm.h
  • IfxGtm_Dtm_Output1Function : IfxGtm_Dtm.h
  • IfxGtm_Dtm_Output1Select : IfxGtm_Dtm.h
  • IfxGtm_FeatureControl : IfxGtm_cfg.h
  • IfxGtm_IrqMode : IfxGtm.h
  • IfxGtm_Psm_F2a : IfxGtm_cfg.h
  • IfxGtm_Psm_F2aStream : IfxGtm_Psm.h
  • IfxGtm_Psm_F2aStreamState : IfxGtm_Psm.h
  • IfxGtm_Psm_F2aTransferDirection : IfxGtm_Psm.h
  • IfxGtm_Psm_F2aTransferMode : IfxGtm_Psm.h
  • IfxGtm_Psm_Fifo : IfxGtm_cfg.h
  • IfxGtm_Psm_FifoChannel : IfxGtm_Psm.h
  • IfxGtm_Psm_FifoChannelDmaHystDir : IfxGtm_Psm.h
  • IfxGtm_Psm_FifoChannelInterrupt : IfxGtm_Psm.h
  • IfxGtm_Psm_FifoChannelMode : IfxGtm_Psm.h
  • IfxGtm_Psm_FifoChannelStatus : IfxGtm_Psm.h
  • IfxGtm_Psm_InterruptMode : IfxGtm_Psm.h
  • IfxGtm_Spe : IfxGtm_cfg.h
  • IfxGtm_Spe_ChannelOutputType : IfxGtm_Spe.h
  • IfxGtm_Spe_ControlCommand : IfxGtm_Spe.h
  • IfxGtm_Spe_Direction : IfxGtm_Spe.h
  • IfxGtm_Spe_InputSignal : IfxGtm_Spe.h
  • IfxGtm_Spe_InterruptMode : IfxGtm_Spe.h
  • IfxGtm_Spe_InterruptSignal : IfxGtm_Spe.h
  • IfxGtm_Spe_OutChannel : IfxGtm_Spe.h
  • IfxGtm_Spe_PatternIndex : IfxGtm_Spe.h
  • IfxGtm_Spe_TimInput : IfxGtm_cfg.h
  • IfxGtm_Spe_TriggerSource : IfxGtm_cfg.h
  • IfxGtm_SuspendMode : IfxGtm.h
  • IfxGtm_Tbu_Ts : IfxGtm_Tbu.h
  • IfxGtm_Tim : IfxGtm_cfg.h
  • IfxGtm_Tim_Ch : IfxGtm_cfg.h
  • IfxGtm_Tim_CntsSel : IfxGtm_Tim.h
  • IfxGtm_Tim_FilterCounter : IfxGtm_Tim.h
  • IfxGtm_Tim_FilterCounterFreqSel : IfxGtm_Tim.h
  • IfxGtm_Tim_FilterMode : IfxGtm_Tim.h
  • IfxGtm_Tim_GprSel : IfxGtm_Tim.h
  • IfxGtm_Tim_In_ConfigFilterMode : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_Input : IfxGtm_Tim_In.h
  • IfxGtm_Tim_Input : IfxGtm_Tim.h
  • IfxGtm_Tim_IrqMode : IfxGtm_Tim.h
  • IfxGtm_Tim_IrqType : IfxGtm_Tim.h
  • IfxGtm_Tim_Mode : IfxGtm_Tim.h
  • IfxGtm_Tim_Timeout : IfxGtm_Tim.h
  • IfxGtm_Tom : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_ClkSrc : IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_OutputTrigger : IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_ResetEvent : IfxGtm_Tom.h
  • IfxGtm_Tom_Tgc : IfxGtm_cfg.h
  • IfxGtm_ToutSel : IfxGtm_PinMap.h
  • IfxGtm_Trig_AdcGroup : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrig : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigChannel : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigSource : IfxGtm_Trig.h
  • IfxGtm_Trig_CanDevice : IfxGtm_Trig.h
  • IfxGtm_Trig_CanTrig : IfxGtm_Trig.h
  • IfxGtm_Trig_CanTrigChannel : IfxGtm_Trig.h
  • IfxGtm_Trig_CanTrigSource : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrig : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigChannel : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigInput : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigOutput : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigSet : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigSignal : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigSource : IfxGtm_Trig.h
  • IfxGtm_Trig_Psi5sTrigSource : IfxGtm_Trig.h
  • IfxGtm_Trig_Psi5TrigSource : IfxGtm_Trig.h
  • IfxGtm_Trig_SentGroup : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrig : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigChannel : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigSource : IfxGtm_Trig.h
  • IfxHssl_ChannelId : IfxHssl.h
  • IfxHssl_Command : IfxHssl.h
  • IfxHssl_ControlCommand : IfxHssl.h
  • IfxHssl_DataLength : IfxHssl.h
  • IfxHssl_Hsct_InterruptSource : IfxHssl.h
  • IfxHssl_Hsct_SleepMode : IfxHssl.h
  • IfxHssl_hsctIndex : IfxHssl_cfg.h
  • IfxHssl_Hssl_ERRInterruptSource : IfxHssl.h
  • IfxHssl_Hssl_EXIInterruptSource : IfxHssl.h
  • IfxHssl_Hssl_FrameRequest : IfxHssl_Hssl.h
  • IfxHssl_Hssl_SleepMode : IfxHssl.h
  • IfxHssl_Hssl_Status : IfxHssl_Hssl.h
  • IfxHssl_hsslIndex : IfxHssl_cfg.h
  • IfxHssl_InterfaceMode : IfxHssl.h
  • IfxHssl_MasterModeRxSpeed : IfxHssl.h
  • IfxHssl_MasterModeTxSpeed : IfxHssl.h
  • IfxHssl_PllReferenceClock : IfxHssl.h
  • IfxHssl_RefClockFrequency : IfxHssl.h
  • IfxHssl_StreamingMode : IfxHssl.h
  • IfxHssl_SuspendMode : IfxHssl.h
  • IfxHssl_SysClockDivider : IfxHssl.h
  • IfxI2c_AddressMode : IfxI2c.h
  • IfxI2c_BusStatus : IfxI2c.h
  • IfxI2c_DtrInterruptSource : IfxI2c.h
  • IfxI2c_ErrorInterruptSource : IfxI2c.h
  • IfxI2c_I2c_Status : IfxI2c_I2c.h
  • IfxI2c_Index : IfxI2c_cfg.h
  • IfxI2c_Mode : IfxI2c.h
  • IfxI2c_PinSelect : IfxI2c.h
  • IfxI2c_ProtocolInterruptSource : IfxI2c.h
  • IfxI2c_SleepMode : IfxI2c.h
  • IfxIom_EdgeClearType : IfxIom.h
  • IfxIom_EventActiveEdgeSelection : IfxIom.h
  • IfxIom_EventCounterChannel : IfxIom.h
  • IfxIom_EventCounterThreshold : IfxIom.h
  • IfxIom_EventSource : IfxIom.h
  • IfxIom_FilterMode : IfxIom.h
  • IfxIom_FpcChannelId : IfxIom.h
  • IfxIom_LamEventSource : IfxIom.h
  • IfxIom_LamEventTrigger : IfxIom.h
  • IfxIom_LamEventWindowClearEvent : IfxIom.h
  • IfxIom_LamEventWindowControlSource : IfxIom.h
  • IfxIom_LamEventWindowRunControl : IfxIom.h
  • IfxIom_LamFilterMode : IfxIom.h
  • IfxIom_LamId : IfxIom.h
  • IfxIom_LamMonitorInputChannel : IfxIom.h
  • IfxIom_LamMonitorSource : IfxIom.h
  • IfxIom_LamReferenceInputChannel : IfxIom.h
  • IfxIom_LamRunMode : IfxIom.h
  • IfxIom_MonInput : IfxIom_cfg.h
  • IfxIom_MonInputSignal : IfxIom_cfg.h
  • IfxIom_MonitorSignal : IfxIom.h
  • IfxIom_ReferenceSignal : IfxIom.h
  • IfxIom_RefInput : IfxIom_cfg.h
  • IfxIom_RefInputSignal : IfxIom_cfg.h
  • IfxIom_SleepMode : IfxIom.h
  • IfxMsc_ActivePhaseSelection : IfxMsc.h
  • IfxMsc_AsynchronousBlock : IfxMsc.h
  • IfxMsc_ChipSelectActiveState : IfxMsc.h
  • IfxMsc_ClockSelect : IfxMsc.h
  • IfxMsc_CommandDataCommandRepetitionMode : IfxMsc.h
  • IfxMsc_CommandFrameInterrupt : IfxMsc.h
  • IfxMsc_CommandFrameInterruptNode : IfxMsc.h
  • IfxMsc_CommandFrameLength : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength : IfxMsc.h
  • IfxMsc_DataFrameExtensionPassivePhaseLength : IfxMsc.h
  • IfxMsc_DataFrameInterrupt : IfxMsc.h
  • IfxMsc_DataFrameInterruptNode : IfxMsc.h
  • IfxMsc_DataFrameLength : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength : IfxMsc.h
  • IfxMsc_DividerMode : IfxMsc.h
  • IfxMsc_EmergencyStop : IfxMsc.h
  • IfxMsc_Extension : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition : IfxMsc.h
  • IfxMsc_ExternalSignalInjection : IfxMsc.h
  • IfxMsc_FastMode : IfxMsc.h
  • IfxMsc_FclClockControlEnabled : IfxMsc.h
  • IfxMsc_FclLinePolarity : IfxMsc.h
  • IfxMsc_HardwareClock : IfxMsc.h
  • IfxMsc_Index : IfxMsc_cfg.h
  • IfxMsc_InterruptServiceRequest : IfxMsc.h
  • IfxMsc_ModuleSuspendRequestBit : IfxMsc.h
  • IfxMsc_MsbBitDataExtension : IfxMsc.h
  • IfxMsc_Msc_Target : IfxMsc_Msc.h
  • IfxMsc_NDividerAbra : IfxMsc.h
  • IfxMsc_NDividerDownstream : IfxMsc.h
  • IfxMsc_OverflowInterrupt : IfxMsc.h
  • IfxMsc_OverflowInterruptNode : IfxMsc.h
  • IfxMsc_Parity : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount : IfxMsc.h
  • IfxMsc_ReceiveDataInterrupt : IfxMsc.h
  • IfxMsc_ReceiveDataInterruptNode : IfxMsc.h
  • IfxMsc_SdiLinePolarity : IfxMsc.h
  • IfxMsc_SerialDataInput : IfxMsc.h
  • IfxMsc_ServiceRequestDelay : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration : IfxMsc.h
  • IfxMsc_SleepMode : IfxMsc.h
  • IfxMsc_SoLinePolarity : IfxMsc.h
  • IfxMsc_Source : IfxMsc.h
  • IfxMsc_SuspendMode : IfxMsc.h
  • IfxMsc_Target : IfxMsc.h
  • IfxMsc_TimeFrameInterrupt : IfxMsc.h
  • IfxMsc_TimeFrameInterruptNode : IfxMsc.h
  • IfxMsc_TransmissionMode : IfxMsc.h
  • IfxMsc_UnderflowInterrupt : IfxMsc.h
  • IfxMsc_UnderflowInterruptNode : IfxMsc.h
  • IfxMsc_UpstreamChannelFrameType : IfxMsc.h
  • IfxMsc_UpstreamChannelReceivingRate : IfxMsc.h
  • IfxMsc_UpstreamTimeoutInterrupt : IfxMsc.h
  • IfxMsc_UpstreamTimeoutInterruptNode : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue : IfxMsc.h
  • IfxMtu_MbistSel : IfxMtu_cfg.h
  • IfxPmsEvr_EnableInterrupt : IfxPmsEvr.h
  • IfxPmsEvr_EvrcMode : IfxPmsEvr.h
  • IfxPmsEvr_ExtSyncSwitchingFreqDivFactor : IfxPmsEvr.h
  • IfxPmsEvr_OverVoltageMonitoring : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter : IfxPmsEvr.h
  • IfxPmsEvr_SupplyFilter : IfxPmsEvr.h
  • IfxPmsEvr_SupplyMode : IfxPmsEvr.h
  • IfxPmsEvr_UnderVoltageMonitoring : IfxPmsEvr.h
  • IfxPmsPm_BlankingFilterDelay : IfxPmsPm.h
  • IfxPmsPm_DigitalFilter : IfxPmsPm.h
  • IfxPmsPm_EdgeDetectionControl : IfxPmsPm.h
  • IfxPmsPm_Esr0PinStateRequest : IfxPmsPm.h
  • IfxPmsPm_LoadJumpStatus : IfxPmsPm.h
  • IfxPmsPm_PadStateRequest : IfxPmsPm.h
  • IfxPmsPm_PinEdgeTriggerEvent : IfxPmsPm.h
  • IfxPmsPm_RampingMode : IfxPmsPm.h
  • IfxPmsPm_RequestPowerMode : IfxPmsPm.h
  • IfxPmsPm_ScrClocking : IfxPmsPm.h
  • IfxPmsPm_StandbyRamSupply : IfxPmsPm.h
  • IfxPmsPm_StandbyTriggerMode : IfxPmsPm.h
  • IfxPmsPm_ThresholdEvent : IfxPmsPm.h
  • IfxPmsPm_VoltageDroopRequest : IfxPmsPm.h
  • IfxPmsPm_VoltageDroopStatus : IfxPmsPm.h
  • IfxPmsPm_VoltageDroopStep : IfxPmsPm.h
  • IfxPmsPm_VoltageSource : IfxPmsPm.h
  • IfxPmsPm_WakeupOn : IfxPmsPm.h
  • IfxPmsPm_WakeupTimerMode : IfxPmsPm.h
  • IfxPmsPm_WutClock : IfxPmsPm.h
  • IfxPort_ControlledBy : IfxPort.h
  • IfxPort_Index : IfxPort_cfg.h
  • IfxPort_InputMode : IfxPort.h
  • IfxPort_LvdsDirection : IfxPort.h
  • IfxPort_LvdsMode : IfxPort.h
  • IfxPort_LvdsPath : IfxPort.h
  • IfxPort_LvdsPullDown : IfxPort.h
  • IfxPort_LvdsTerminationMode : IfxPort.h
  • IfxPort_Mode : IfxPort.h
  • IfxPort_OutputIdx : IfxPort.h
  • IfxPort_OutputMode : IfxPort.h
  • IfxPort_PadDriver : IfxPort.h
  • IfxPort_PadSupply : IfxPort.h
  • IfxPort_PinFunctionMode : IfxPort.h
  • IfxPort_State : IfxPort.h
  • IfxPsi5_AlternateInput : IfxPsi5.h
  • IfxPsi5_BaudRate : IfxPsi5.h
  • IfxPsi5_ChannelId : IfxPsi5_cfg.h
  • IfxPsi5_ClockType : IfxPsi5.h
  • IfxPsi5_CRCorParity : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth : IfxPsi5.h
  • IfxPsi5_DividerMode : IfxPsi5.h
  • IfxPsi5_FractionalDividerRegister : IfxPsi5.h
  • IfxPsi5_FrameExpectation : IfxPsi5.h
  • IfxPsi5_InterruptNodePointer : IfxPsi5.h
  • IfxPsi5_InterruptRequest : IfxPsi5.h
  • IfxPsi5_InterruptServiceRequest : IfxPsi5.h
  • IfxPsi5_InterruptSource : IfxPsi5.h
  • IfxPsi5_InterruptStatusRegister : IfxPsi5.h
  • IfxPsi5_MessagingBits : IfxPsi5.h
  • IfxPsi5_ReceiveDataRegisterTimestamp : IfxPsi5.h
  • IfxPsi5_ReceiverControlRegister : IfxPsi5.h
  • IfxPsi5_SleepMode : IfxPsi5.h
  • IfxPsi5_Slot : IfxPsi5.h
  • IfxPsi5_SuspendMode : IfxPsi5.h
  • IfxPsi5_TimeBase : IfxPsi5.h
  • IfxPsi5_TimestampRegister : IfxPsi5.h
  • IfxPsi5_Trigger : IfxPsi5.h
  • IfxPsi5_TriggerOutput : IfxPsi5.h
  • IfxPsi5_TriggerType : IfxPsi5.h
  • IfxPsi5_Verbose : IfxPsi5.h
  • IfxPsi5s_AlternateInput : IfxPsi5s.h
  • IfxPsi5s_AscBaudratePrescalar : IfxPsi5s.h
  • IfxPsi5s_AscMode : IfxPsi5s.h
  • IfxPsi5s_AscStopBits : IfxPsi5s.h
  • IfxPsi5s_ChannelId : IfxPsi5s.h
  • IfxPsi5s_ClockType : IfxPsi5s.h
  • IfxPsi5s_CrcOrParity : IfxPsi5s.h
  • IfxPsi5s_DividerMode : IfxPsi5s.h
  • IfxPsi5s_EnhancedProtocol : IfxPsi5s.h
  • IfxPsi5s_FrameId : IfxPsi5s.h
  • IfxPsi5s_GlobalInterruptSource : IfxPsi5s.h
  • IfxPsi5s_IdleTime : IfxPsi5s.h
  • IfxPsi5s_InterruptRequest : IfxPsi5s.h
  • IfxPsi5s_InterruptSource : IfxPsi5s.h
  • IfxPsi5s_LoopBackMode : IfxPsi5s.h
  • IfxPsi5s_MessagingBits : IfxPsi5s.h
  • IfxPsi5s_NumberExpectedFrames : IfxPsi5s.h
  • IfxPsi5s_SleepMode : IfxPsi5s.h
  • IfxPsi5s_SuspendMode : IfxPsi5s.h
  • IfxPsi5s_TimeBase : IfxPsi5s.h
  • IfxPsi5s_TimeStampCount : IfxPsi5s.h
  • IfxPsi5s_TimestampRegister : IfxPsi5s.h
  • IfxPsi5s_TimestampTrigger : IfxPsi5s.h
  • IfxPsi5s_Trigger : IfxPsi5s.h
  • IfxPsi5s_TriggerOutput : IfxPsi5s.h
  • IfxPsi5s_TriggerType : IfxPsi5s.h
  • IfxPsi5s_UartFrameCount : IfxPsi5s.h
  • IfxPsi5s_WatchdogTimerMode : IfxPsi5s.h
  • IfxQspi_ChannelId : IfxQspi.h
  • IfxQspi_DataLengthUnit : IfxQspi.h
  • IfxQspi_Error : IfxQspi.h
  • IfxQspi_ExpectTimeout : IfxQspi.h
  • IfxQspi_FifoMode : IfxQspi.h
  • IfxQspi_Index : IfxQspi_cfg.h
  • IfxQspi_Mode : IfxQspi.h
  • IfxQspi_PauseRunTransition : IfxQspi.h
  • IfxQspi_Phase : IfxQspi.h
  • IfxQspi_PhaseTransitionEvent : IfxQspi.h
  • IfxQspi_Reset : IfxQspi.h
  • IfxQspi_RxFifoInt : IfxQspi.h
  • IfxQspi_SleepMode : IfxQspi.h
  • IfxQspi_SpiMaster_ChannelBasedCs : IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_Mode : IfxQspi_SpiMaster.h
  • IfxQspi_StrobeDelay : IfxQspi.h
  • IfxQspi_SuspendMode : IfxQspi.h
  • IfxQspi_TxFifoInt : IfxQspi.h
  • IfxScu_CCUCON0_CLKSEL : IfxScu_cfg.h
  • IfxScu_PMCSR_REQSLP : IfxScu_cfg.h
  • IfxScu_WDTCON1_IR : IfxScu_cfg.h
  • IfxScuCcu_Fsource : IfxScuCcu.h
  • IfxScuCcu_K2divider : IfxScuCcu.h
  • IfxScuCcu_K3divider : IfxScuCcu.h
  • IfxScuCcu_LowPowerDivRatio : IfxScuCcu.h
  • IfxScuCcu_ModEn : IfxScuCcu.h
  • IfxScuCcu_ModulationAmplitude : IfxScuCcu.h
  • IfxScuCcu_Ndivider : IfxScuCcu.h
  • IfxScuCcu_Pdivider : IfxScuCcu.h
  • IfxScuCcu_PllInputClockSelection : IfxScuCcu.h
  • IfxScuCcu_Traprequest : IfxScuCcu.h
  • IfxScuEru_ExternalInputSelection : IfxScuEru.h
  • IfxScuEru_InputChannel : IfxScuEru.h
  • IfxScuEru_InputFilterDepth : IfxScuEru.h
  • IfxScuEru_InputFilterPredivider : IfxScuEru.h
  • IfxScuEru_InputFilterRequestSelection : IfxScuEru.h
  • IfxScuEru_InputNodePointer : IfxScuEru.h
  • IfxScuEru_InterruptGatingPattern : IfxScuEru.h
  • IfxScuEru_OutputChannel : IfxScuEru.h
  • IfxScuLbist_Application : IfxScuLbist.h
  • IfxScuLbist_Freq : IfxScuLbist.h
  • IfxScuLbist_SplitShiftSel : IfxScuLbist.h
  • IfxScuRcu_ResetType : IfxScuRcu.h
  • IfxScuRcu_Trigger : IfxScuRcu.h
  • IfxSent_AlternateInput : IfxSent.h
  • IfxSent_ChannelId : IfxSent_cfg.h
  • IfxSent_ChannelStatus : IfxSent.h
  • IfxSent_ClockDividerMode : IfxSent.h
  • IfxSent_ConfigBit : IfxSent.h
  • IfxSent_DigitalGlitchesLength : IfxSent.h
  • IfxSent_ExtendedSerialFrameMode : IfxSent.h
  • IfxSent_ExternalTrigger : IfxSent.h
  • IfxSent_FrameCheckMode : IfxSent.h
  • IfxSent_InterruptNodePointer : IfxSent.h
  • IfxSent_InterruptSource : IfxSent.h
  • IfxSent_Nibble : IfxSent.h
  • IfxSent_SleepMode : IfxSent.h
  • IfxSent_SpcMode : IfxSent.h
  • IfxSent_SuspendMode : IfxSent.h
  • IfxSent_TimeBase : IfxSent.h
  • IfxSent_TriggerSource : IfxSent.h
  • IfxSmu_Alarm : IfxSmu_cfg.h
  • IfxSmu_AlarmExecutionStatus : IfxSmu.h
  • IfxSmu_Command : IfxSmu.h
  • IfxSmu_FspMode : IfxSmu.h
  • IfxSmu_FspPrescalar1 : IfxSmu.h
  • IfxSmu_FspPrescalar2 : IfxSmu.h
  • IfxSmu_InternalAlarmAction : IfxSmu.h
  • IfxSmu_InterruptGenerationConfiguration : IfxSmu.h
  • IfxSmu_InterruptRequest : IfxSmu.h
  • IfxSmu_PortControlHwDir : IfxSmu.h
  • IfxSmu_PortControlHwEnable : IfxSmu.h
  • IfxSmu_SmuState : IfxSmu.h
  • IfxSmu_SuspendMode : IfxSmu.h
  • IfxSmuStdby_AlarmStatusClear : IfxSmuStdby.h
  • IfxSmuStdby_AlarmStatusFlag : IfxSmuStdby.h
  • IfxSmuStdby_FaultSignalAlarmConfigFlagEvent : IfxSmuStdby.h
  • IfxSmuStdby_FspErrorPinFaultState : IfxSmuStdby.h
  • IfxSmuStdby_FspErrorPinState : IfxSmuStdby.h
  • IfxSmuStdby_SmuStdbyModuleState : IfxSmuStdby.h
  • IfxSrc_Tos : IfxSrc_cfg.h
  • IfxStdIf_Pos_Dir : IfxStdIf_Pos.h
  • IfxStdIf_Pos_MotionType : IfxStdIf_Pos.h
  • IfxStdIf_Pos_ResolutionFactor : IfxStdIf_Pos.h
  • IfxStdIf_Pos_SensorType : IfxStdIf_Pos.h
  • IfxStdIf_Timer_CountDir : IfxStdIf_Timer.h
  • IfxStdIf_Timer_OutputEvent : IfxStdIf_Timer.h
  • IfxStm_Comparator : IfxStm.h
  • IfxStm_ComparatorInterrupt : IfxStm.h
  • IfxStm_ComparatorOffset : IfxStm.h
  • IfxStm_ComparatorSize : IfxStm.h
  • IfxStm_Index : IfxStm_cfg.h
  • IfxStm_SleepMode : IfxStm.h
  • IfxStm_SuspendMode : IfxStm.h


iLLD_TC38A: Globals

- s -

  • SpiIf_ClockPolarity : SpiIf.h
  • SpiIf_DataHeading : SpiIf.h
  • SpiIf_Mode : SpiIf.h
  • SpiIf_ShiftClock : SpiIf.h
  • SpiIf_SlsoTiming : SpiIf.h
  • SpiIf_Status : SpiIf.h


iLLD_TC38A: Globals

- i -

  • Ifx_ActiveState_high : Ifx_Types.h
  • Ifx_ActiveState_low : Ifx_Types.h
  • Ifx_DataBufferMode_normal : Ifx_Types.h
  • Ifx_DataBufferMode_timeStampSingle : Ifx_Types.h
  • Ifx_ParityMode_even : Ifx_Types.h
  • Ifx_ParityMode_odd : Ifx_Types.h
  • Ifx_Pwm_Mode_centerAligned : Ifx_Types.h
  • Ifx_Pwm_Mode_centerAlignedInverted : Ifx_Types.h
  • Ifx_Pwm_Mode_count : Ifx_Types.h
  • Ifx_Pwm_Mode_init : Ifx_Types.h
  • Ifx_Pwm_Mode_leftAligned : Ifx_Types.h
  • Ifx_Pwm_Mode_off : Ifx_Types.h
  • Ifx_Pwm_Mode_rightAligned : Ifx_Types.h
  • Ifx_RxSel_a : Ifx_Types.h
  • Ifx_RxSel_b : Ifx_Types.h
  • Ifx_RxSel_c : Ifx_Types.h
  • Ifx_RxSel_d : Ifx_Types.h
  • Ifx_RxSel_e : Ifx_Types.h
  • Ifx_RxSel_f : Ifx_Types.h
  • Ifx_RxSel_g : Ifx_Types.h
  • Ifx_RxSel_h : Ifx_Types.h
  • IFX_SHELL_CMD_STATE_ESCAPE : Ifx_Shell.h
  • IFX_SHELL_CMD_STATE_ESCAPE_BRACKET : Ifx_Shell.h
  • IFX_SHELL_CMD_STATE_ESCAPE_BRACKET_NUMBER : Ifx_Shell.h
  • IFX_SHELL_CMD_STATE_NORMAL : Ifx_Shell.h
  • Ifx_Shell_ResultCode_nok : Ifx_Shell.h
  • Ifx_Shell_ResultCode_ok : Ifx_Shell.h
  • Ifx_Shell_ResultCode_undefined : Ifx_Shell.h
  • Ifx_Shell_ResultCode_unknown : Ifx_Shell.h
  • IfxAsclin_Checksum_classic : IfxAsclin.h
  • IfxAsclin_Checksum_enhanced : IfxAsclin.h
  • IfxAsclin_ChecksumInjection_notWritten : IfxAsclin.h
  • IfxAsclin_ChecksumInjection_written : IfxAsclin.h
  • IfxAsclin_ClockPolarity_idleHigh : IfxAsclin.h
  • IfxAsclin_ClockPolarity_idleLow : IfxAsclin.h
  • IfxAsclin_ClockSource_ascFastClock : IfxAsclin.h
  • IfxAsclin_ClockSource_ascSlowClock : IfxAsclin.h
  • IfxAsclin_ClockSource_noClock : IfxAsclin.h
  • IfxAsclin_CtsInputSelect_0 : IfxAsclin.h
  • IfxAsclin_CtsInputSelect_1 : IfxAsclin.h
  • IfxAsclin_CtsInputSelect_2 : IfxAsclin.h
  • IfxAsclin_CtsInputSelect_3 : IfxAsclin.h
  • IfxAsclin_DataLength_1 : IfxAsclin.h
  • IfxAsclin_DataLength_10 : IfxAsclin.h
  • IfxAsclin_DataLength_11 : IfxAsclin.h
  • IfxAsclin_DataLength_12 : IfxAsclin.h
  • IfxAsclin_DataLength_13 : IfxAsclin.h
  • IfxAsclin_DataLength_14 : IfxAsclin.h
  • IfxAsclin_DataLength_15 : IfxAsclin.h
  • IfxAsclin_DataLength_16 : IfxAsclin.h
  • IfxAsclin_DataLength_2 : IfxAsclin.h
  • IfxAsclin_DataLength_3 : IfxAsclin.h
  • IfxAsclin_DataLength_4 : IfxAsclin.h
  • IfxAsclin_DataLength_5 : IfxAsclin.h
  • IfxAsclin_DataLength_6 : IfxAsclin.h
  • IfxAsclin_DataLength_7 : IfxAsclin.h
  • IfxAsclin_DataLength_8 : IfxAsclin.h
  • IfxAsclin_DataLength_9 : IfxAsclin.h
  • IfxAsclin_FifoInterruptMode_batch : IfxAsclin.h
  • IfxAsclin_FifoInterruptMode_combined : IfxAsclin.h
  • IfxAsclin_FifoInterruptMode_single : IfxAsclin.h
  • IfxAsclin_FrameMode_asc : IfxAsclin.h
  • IfxAsclin_FrameMode_initialise : IfxAsclin.h
  • IfxAsclin_FrameMode_lin : IfxAsclin.h
  • IfxAsclin_FrameMode_spi : IfxAsclin.h
  • IfxAsclin_HeaderResponseSelect_headerAndResponse : IfxAsclin.h
  • IfxAsclin_HeaderResponseSelect_headerOnly : IfxAsclin.h
  • IfxAsclin_IdleDelay_0 : IfxAsclin.h
  • IfxAsclin_IdleDelay_1 : IfxAsclin.h
  • IfxAsclin_IdleDelay_2 : IfxAsclin.h
  • IfxAsclin_IdleDelay_3 : IfxAsclin.h
  • IfxAsclin_IdleDelay_4 : IfxAsclin.h
  • IfxAsclin_IdleDelay_5 : IfxAsclin.h
  • IfxAsclin_IdleDelay_6 : IfxAsclin.h
  • IfxAsclin_IdleDelay_7 : IfxAsclin.h
  • IfxAsclin_Index_0 : IfxAsclin_cfg.h
  • IfxAsclin_Index_1 : IfxAsclin_cfg.h
  • IfxAsclin_Index_10 : IfxAsclin_cfg.h
  • IfxAsclin_Index_11 : IfxAsclin_cfg.h
  • IfxAsclin_Index_12 : IfxAsclin_cfg.h
  • IfxAsclin_Index_13 : IfxAsclin_cfg.h
  • IfxAsclin_Index_14 : IfxAsclin_cfg.h
  • IfxAsclin_Index_15 : IfxAsclin_cfg.h
  • IfxAsclin_Index_16 : IfxAsclin_cfg.h
  • IfxAsclin_Index_17 : IfxAsclin_cfg.h
  • IfxAsclin_Index_18 : IfxAsclin_cfg.h
  • IfxAsclin_Index_19 : IfxAsclin_cfg.h
  • IfxAsclin_Index_2 : IfxAsclin_cfg.h
  • IfxAsclin_Index_20 : IfxAsclin_cfg.h
  • IfxAsclin_Index_21 : IfxAsclin_cfg.h
  • IfxAsclin_Index_22 : IfxAsclin_cfg.h
  • IfxAsclin_Index_23 : IfxAsclin_cfg.h
  • IfxAsclin_Index_3 : IfxAsclin_cfg.h
  • IfxAsclin_Index_4 : IfxAsclin_cfg.h
  • IfxAsclin_Index_5 : IfxAsclin_cfg.h
  • IfxAsclin_Index_6 : IfxAsclin_cfg.h
  • IfxAsclin_Index_7 : IfxAsclin_cfg.h
  • IfxAsclin_Index_8 : IfxAsclin_cfg.h
  • IfxAsclin_Index_9 : IfxAsclin_cfg.h
  • IfxAsclin_Index_none : IfxAsclin_cfg.h
  • IfxAsclin_LeadDelay_0 : IfxAsclin.h
  • IfxAsclin_LeadDelay_1 : IfxAsclin.h
  • IfxAsclin_LeadDelay_2 : IfxAsclin.h
  • IfxAsclin_LeadDelay_3 : IfxAsclin.h
  • IfxAsclin_LeadDelay_4 : IfxAsclin.h
  • IfxAsclin_LeadDelay_5 : IfxAsclin.h
  • IfxAsclin_LeadDelay_6 : IfxAsclin.h
  • IfxAsclin_LeadDelay_7 : IfxAsclin.h
  • IfxAsclin_Lin_Direction_TransmitHeader : IfxAsclin_Lin.h
  • IfxAsclin_Lin_Direction_TransmitHeaderAndReceiveResponse : IfxAsclin_Lin.h
  • IfxAsclin_Lin_Direction_TransmitHeaderAndResponse : IfxAsclin_Lin.h
  • IfxAsclin_LinMode_master : IfxAsclin.h
  • IfxAsclin_LinMode_slave : IfxAsclin.h
  • IfxAsclin_LinResponseTimeoutMode_frameTimeout : IfxAsclin.h
  • IfxAsclin_LinResponseTimeoutMode_responseTimeout : IfxAsclin.h
  • IfxAsclin_OversamplingFactor_10 : IfxAsclin.h
  • IfxAsclin_OversamplingFactor_11 : IfxAsclin.h
  • IfxAsclin_OversamplingFactor_12 : IfxAsclin.h
  • IfxAsclin_OversamplingFactor_13 : IfxAsclin.h
  • IfxAsclin_OversamplingFactor_14 : IfxAsclin.h
  • IfxAsclin_OversamplingFactor_15 : IfxAsclin.h
  • IfxAsclin_OversamplingFactor_16 : IfxAsclin.h
  • IfxAsclin_OversamplingFactor_4 : IfxAsclin.h
  • IfxAsclin_OversamplingFactor_5 : IfxAsclin.h
  • IfxAsclin_OversamplingFactor_6 : IfxAsclin.h
  • IfxAsclin_OversamplingFactor_7 : IfxAsclin.h
  • IfxAsclin_OversamplingFactor_8 : IfxAsclin.h
  • IfxAsclin_OversamplingFactor_9 : IfxAsclin.h
  • IfxAsclin_ParityType_even : IfxAsclin.h
  • IfxAsclin_ParityType_odd : IfxAsclin.h
  • IfxAsclin_ReceiveBufferMode_rxBuffer : IfxAsclin.h
  • IfxAsclin_ReceiveBufferMode_rxFifo : IfxAsclin.h
  • IfxAsclin_RtsCtsPolarity_activeHigh : IfxAsclin.h
  • IfxAsclin_RtsCtsPolarity_activeLow : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_1 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_10 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_11 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_12 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_13 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_14 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_15 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_16 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_2 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_3 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_4 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_5 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_6 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_7 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_8 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_9 : IfxAsclin.h
  • IfxAsclin_RxFifoOutletWidth_0 : IfxAsclin.h
  • IfxAsclin_RxFifoOutletWidth_1 : IfxAsclin.h
  • IfxAsclin_RxFifoOutletWidth_2 : IfxAsclin.h
  • IfxAsclin_RxFifoOutletWidth_3 : IfxAsclin.h
  • IfxAsclin_RxInputSelect_0 : IfxAsclin.h
  • IfxAsclin_RxInputSelect_1 : IfxAsclin.h
  • IfxAsclin_RxInputSelect_2 : IfxAsclin.h
  • IfxAsclin_RxInputSelect_3 : IfxAsclin.h
  • IfxAsclin_RxInputSelect_4 : IfxAsclin.h
  • IfxAsclin_RxInputSelect_5 : IfxAsclin.h
  • IfxAsclin_RxInputSelect_6 : IfxAsclin.h
  • IfxAsclin_RxInputSelect_7 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_1 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_10 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_11 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_12 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_13 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_14 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_15 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_2 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_3 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_4 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_5 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_6 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_7 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_8 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_9 : IfxAsclin.h
  • IfxAsclin_SamplesPerBit_one : IfxAsclin.h
  • IfxAsclin_SamplesPerBit_three : IfxAsclin.h
  • IfxAsclin_ShiftDirection_lsbFirst : IfxAsclin.h
  • IfxAsclin_ShiftDirection_msbFirst : IfxAsclin.h
  • IfxAsclin_SlavePolarity_idlehigh : IfxAsclin.h
  • IfxAsclin_SlavePolarity_idleLow : IfxAsclin.h
  • IfxAsclin_SleepMode_disable : IfxAsclin.h
  • IfxAsclin_SleepMode_enable : IfxAsclin.h
  • IfxAsclin_Spi_Status_busy : IfxAsclin_Spi.h
  • IfxAsclin_Spi_Status_ok : IfxAsclin_Spi.h
  • IfxAsclin_Spi_Status_unknown : IfxAsclin_Spi.h
  • IfxAsclin_Status_configurationError : IfxAsclin.h
  • IfxAsclin_Status_noError : IfxAsclin.h
  • IfxAsclin_StopBit_0 : IfxAsclin.h
  • IfxAsclin_StopBit_1 : IfxAsclin.h
  • IfxAsclin_StopBit_2 : IfxAsclin.h
  • IfxAsclin_StopBit_3 : IfxAsclin.h
  • IfxAsclin_StopBit_4 : IfxAsclin.h
  • IfxAsclin_StopBit_5 : IfxAsclin.h
  • IfxAsclin_StopBit_6 : IfxAsclin.h
  • IfxAsclin_StopBit_7 : IfxAsclin.h
  • IfxAsclin_SuspendMode_hard : IfxAsclin.h
  • IfxAsclin_SuspendMode_none : IfxAsclin.h
  • IfxAsclin_SuspendMode_soft : IfxAsclin.h
  • IfxAsclin_TxFifoInletWidth_0 : IfxAsclin.h
  • IfxAsclin_TxFifoInletWidth_1 : IfxAsclin.h
  • IfxAsclin_TxFifoInletWidth_2 : IfxAsclin.h
  • IfxAsclin_TxFifoInletWidth_3 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_0 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_1 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_10 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_11 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_12 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_13 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_14 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_15 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_2 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_3 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_4 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_5 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_6 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_7 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_8 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_9 : IfxAsclin.h
  • IfxCan_CanNodeBusOffErrorStatus_BusOffErr : IfxCan.h
  • IfxCan_CanNodeBusOffErrorStatus_NoErr : IfxCan.h
  • IfxCan_CanNodeCommunicationState_idle : IfxCan.h
  • IfxCan_CanNodeCommunicationState_receive : IfxCan.h
  • IfxCan_CanNodeCommunicationState_synchronize : IfxCan.h
  • IfxCan_CanNodeCommunicationState_transmit : IfxCan.h
  • IfxCan_CanNodeErrorWarningLimitStatus_notReached : IfxCan.h
  • IfxCan_CanNodeErrorWarningLimitStatus_reached : IfxCan.h
  • IfxCan_ClockSelect_0 : IfxCan.h
  • IfxCan_ClockSelect_1 : IfxCan.h
  • IfxCan_ClockSelect_2 : IfxCan.h
  • IfxCan_ClockSelect_3 : IfxCan.h
  • IfxCan_ClockSource_asynchronous : IfxCan.h
  • IfxCan_ClockSource_both : IfxCan.h
  • IfxCan_ClockSource_noClock : IfxCan.h
  • IfxCan_ClockSource_synchronous : IfxCan.h
  • IfxCan_DataFieldSize_12 : IfxCan.h
  • IfxCan_DataFieldSize_16 : IfxCan.h
  • IfxCan_DataFieldSize_20 : IfxCan.h
  • IfxCan_DataFieldSize_24 : IfxCan.h
  • IfxCan_DataFieldSize_32 : IfxCan.h
  • IfxCan_DataFieldSize_48 : IfxCan.h
  • IfxCan_DataFieldSize_64 : IfxCan.h
  • IfxCan_DataFieldSize_8 : IfxCan.h
  • IfxCan_DataLengthCode_0 : IfxCan.h
  • IfxCan_DataLengthCode_1 : IfxCan.h
  • IfxCan_DataLengthCode_12 : IfxCan.h
  • IfxCan_DataLengthCode_16 : IfxCan.h
  • IfxCan_DataLengthCode_2 : IfxCan.h
  • IfxCan_DataLengthCode_20 : IfxCan.h
  • IfxCan_DataLengthCode_24 : IfxCan.h
  • IfxCan_DataLengthCode_3 : IfxCan.h
  • IfxCan_DataLengthCode_32 : IfxCan.h
  • IfxCan_DataLengthCode_4 : IfxCan.h
  • IfxCan_DataLengthCode_48 : IfxCan.h
  • IfxCan_DataLengthCode_5 : IfxCan.h
  • IfxCan_DataLengthCode_6 : IfxCan.h
  • IfxCan_DataLengthCode_64 : IfxCan.h
  • IfxCan_DataLengthCode_7 : IfxCan.h
  • IfxCan_DataLengthCode_8 : IfxCan.h
  • IfxCan_FilterElementConfiguration_disable : IfxCan.h
  • IfxCan_FilterElementConfiguration_rejectId : IfxCan.h
  • IfxCan_FilterElementConfiguration_setPriority : IfxCan.h
  • IfxCan_FilterElementConfiguration_setPriorityAndStoreInFifo0 : IfxCan.h
  • IfxCan_FilterElementConfiguration_setPriorityAndStoreInFifo1 : IfxCan.h
  • IfxCan_FilterElementConfiguration_storeInRxBuffer : IfxCan.h
  • IfxCan_FilterElementConfiguration_storeInRxFifo0 : IfxCan.h
  • IfxCan_FilterElementConfiguration_storeInRxFifo1 : IfxCan.h
  • IfxCan_FilterType_classic : IfxCan.h
  • IfxCan_FilterType_dualId : IfxCan.h
  • IfxCan_FilterType_none : IfxCan.h
  • IfxCan_FilterType_range : IfxCan.h
  • IfxCan_FrameMode_fdLong : IfxCan.h
  • IfxCan_FrameMode_fdLongAndFast : IfxCan.h
  • IfxCan_FrameMode_standard : IfxCan.h
  • IfxCan_FrameType_receive : IfxCan.h
  • IfxCan_FrameType_remoteAnswer : IfxCan.h
  • IfxCan_FrameType_remoteRequest : IfxCan.h
  • IfxCan_FrameType_transmit : IfxCan.h
  • IfxCan_FrameType_transmitAndReceive : IfxCan.h
  • IfxCan_Index_0 : IfxCan_cfg.h
  • IfxCan_Index_1 : IfxCan_cfg.h
  • IfxCan_Index_2 : IfxCan_cfg.h
  • IfxCan_Index_none : IfxCan_cfg.h
  • IfxCan_Interrupt_AccessToReservedAddress : IfxCan.h
  • IfxCan_Interrupt_bitErrorCorrected : IfxCan.h
  • IfxCan_Interrupt_bitErrorUncorrected : IfxCan.h
  • IfxCan_Interrupt_busOffStatus : IfxCan.h
  • IfxCan_Interrupt_errorLoggingOverflow : IfxCan.h
  • IfxCan_Interrupt_errorPassive : IfxCan.h
  • IfxCan_Interrupt_highPriorityMessage : IfxCan.h
  • IfxCan_Interrupt_messageRAMAccessFailure : IfxCan.h
  • IfxCan_Interrupt_messageStoredToDedicatedRxBuffer : IfxCan.h
  • IfxCan_Interrupt_protocolErrorArbitration : IfxCan.h
  • IfxCan_Interrupt_protocolErrorData : IfxCan.h
  • IfxCan_Interrupt_rxFifo0Full : IfxCan.h
  • IfxCan_Interrupt_rxFifo0MessageLost : IfxCan.h
  • IfxCan_Interrupt_rxFifo0NewMessage : IfxCan.h
  • IfxCan_Interrupt_rxFifo0WatermarkReached : IfxCan.h
  • IfxCan_Interrupt_rxFifo1Full : IfxCan.h
  • IfxCan_Interrupt_rxFifo1MessageLost : IfxCan.h
  • IfxCan_Interrupt_rxFifo1NewMessage : IfxCan.h
  • IfxCan_Interrupt_rxFifo1WatermarkReached : IfxCan.h
  • IfxCan_Interrupt_timeoutOccurred : IfxCan.h
  • IfxCan_Interrupt_timestampWraparound : IfxCan.h
  • IfxCan_Interrupt_transmissionCancellationFinished : IfxCan.h
  • IfxCan_Interrupt_transmissionCompleted : IfxCan.h
  • IfxCan_Interrupt_txEventFifoEventLost : IfxCan.h
  • IfxCan_Interrupt_txEventFifoFull : IfxCan.h
  • IfxCan_Interrupt_txEventFifoNewEntry : IfxCan.h
  • IfxCan_Interrupt_txEventFifoWatermarkReached : IfxCan.h
  • IfxCan_Interrupt_txFifoEmpty : IfxCan.h
  • IfxCan_Interrupt_warningStatus : IfxCan.h
  • IfxCan_Interrupt_watchdog : IfxCan.h
  • IfxCan_InterruptGroup_alrt : IfxCan.h
  • IfxCan_InterruptGroup_boff : IfxCan.h
  • IfxCan_InterruptGroup_hpe : IfxCan.h
  • IfxCan_InterruptGroup_loi : IfxCan.h
  • IfxCan_InterruptGroup_moer : IfxCan.h
  • IfxCan_InterruptGroup_reint : IfxCan.h
  • IfxCan_InterruptGroup_reti : IfxCan.h
  • IfxCan_InterruptGroup_rxf0f : IfxCan.h
  • IfxCan_InterruptGroup_rxf0n : IfxCan.h
  • IfxCan_InterruptGroup_rxf1f : IfxCan.h
  • IfxCan_InterruptGroup_rxf1n : IfxCan.h
  • IfxCan_InterruptGroup_safe : IfxCan.h
  • IfxCan_InterruptGroup_tefifo : IfxCan.h
  • IfxCan_InterruptGroup_traco : IfxCan.h
  • IfxCan_InterruptGroup_traq : IfxCan.h
  • IfxCan_InterruptGroup_wati : IfxCan.h
  • IfxCan_InterruptLine_0 : IfxCan.h
  • IfxCan_InterruptLine_1 : IfxCan.h
  • IfxCan_InterruptLine_10 : IfxCan.h
  • IfxCan_InterruptLine_11 : IfxCan.h
  • IfxCan_InterruptLine_12 : IfxCan.h
  • IfxCan_InterruptLine_13 : IfxCan.h
  • IfxCan_InterruptLine_14 : IfxCan.h
  • IfxCan_InterruptLine_15 : IfxCan.h
  • IfxCan_InterruptLine_2 : IfxCan.h
  • IfxCan_InterruptLine_3 : IfxCan.h
  • IfxCan_InterruptLine_4 : IfxCan.h
  • IfxCan_InterruptLine_5 : IfxCan.h
  • IfxCan_InterruptLine_6 : IfxCan.h
  • IfxCan_InterruptLine_7 : IfxCan.h
  • IfxCan_InterruptLine_8 : IfxCan.h
  • IfxCan_InterruptLine_9 : IfxCan.h
  • IfxCan_LastErrorCodeType_ackError : IfxCan.h
  • IfxCan_LastErrorCodeType_bit0Error : IfxCan.h
  • IfxCan_LastErrorCodeType_bit1Error : IfxCan.h
  • IfxCan_LastErrorCodeType_crcError : IfxCan.h
  • IfxCan_LastErrorCodeType_formError : IfxCan.h
  • IfxCan_LastErrorCodeType_noCANBusEvent : IfxCan.h
  • IfxCan_LastErrorCodeType_noError : IfxCan.h
  • IfxCan_LastErrorCodeType_stuffError : IfxCan.h
  • IfxCan_MessageIdLength_both : IfxCan.h
  • IfxCan_MessageIdLength_extended : IfxCan.h
  • IfxCan_MessageIdLength_standard : IfxCan.h
  • IfxCan_NodeId_0 : IfxCan_cfg.h
  • IfxCan_NodeId_1 : IfxCan_cfg.h
  • IfxCan_NodeId_2 : IfxCan_cfg.h
  • IfxCan_NodeId_3 : IfxCan_cfg.h
  • IfxCan_NodeId_none : IfxCan_cfg.h
  • IfxCan_NonMatchingFrame_acceptToRxFifo0 : IfxCan.h
  • IfxCan_NonMatchingFrame_acceptToRxFifo1 : IfxCan.h
  • IfxCan_NonMatchingFrame_reject : IfxCan.h
  • IfxCan_RxBufferId_0 : IfxCan.h
  • IfxCan_RxBufferId_1 : IfxCan.h
  • IfxCan_RxBufferId_10 : IfxCan.h
  • IfxCan_RxBufferId_11 : IfxCan.h
  • IfxCan_RxBufferId_12 : IfxCan.h
  • IfxCan_RxBufferId_13 : IfxCan.h
  • IfxCan_RxBufferId_14 : IfxCan.h
  • IfxCan_RxBufferId_15 : IfxCan.h
  • IfxCan_RxBufferId_16 : IfxCan.h
  • IfxCan_RxBufferId_17 : IfxCan.h
  • IfxCan_RxBufferId_18 : IfxCan.h
  • IfxCan_RxBufferId_19 : IfxCan.h
  • IfxCan_RxBufferId_2 : IfxCan.h
  • IfxCan_RxBufferId_20 : IfxCan.h
  • IfxCan_RxBufferId_21 : IfxCan.h
  • IfxCan_RxBufferId_22 : IfxCan.h
  • IfxCan_RxBufferId_23 : IfxCan.h
  • IfxCan_RxBufferId_24 : IfxCan.h
  • IfxCan_RxBufferId_25 : IfxCan.h
  • IfxCan_RxBufferId_26 : IfxCan.h
  • IfxCan_RxBufferId_27 : IfxCan.h
  • IfxCan_RxBufferId_28 : IfxCan.h
  • IfxCan_RxBufferId_29 : IfxCan.h
  • IfxCan_RxBufferId_3 : IfxCan.h
  • IfxCan_RxBufferId_30 : IfxCan.h
  • IfxCan_RxBufferId_31 : IfxCan.h
  • IfxCan_RxBufferId_32 : IfxCan.h
  • IfxCan_RxBufferId_33 : IfxCan.h
  • IfxCan_RxBufferId_34 : IfxCan.h
  • IfxCan_RxBufferId_35 : IfxCan.h
  • IfxCan_RxBufferId_36 : IfxCan.h
  • IfxCan_RxBufferId_37 : IfxCan.h
  • IfxCan_RxBufferId_38 : IfxCan.h
  • IfxCan_RxBufferId_39 : IfxCan.h
  • IfxCan_RxBufferId_4 : IfxCan.h
  • IfxCan_RxBufferId_40 : IfxCan.h
  • IfxCan_RxBufferId_41 : IfxCan.h
  • IfxCan_RxBufferId_42 : IfxCan.h
  • IfxCan_RxBufferId_43 : IfxCan.h
  • IfxCan_RxBufferId_44 : IfxCan.h
  • IfxCan_RxBufferId_45 : IfxCan.h
  • IfxCan_RxBufferId_46 : IfxCan.h
  • IfxCan_RxBufferId_47 : IfxCan.h
  • IfxCan_RxBufferId_48 : IfxCan.h
  • IfxCan_RxBufferId_49 : IfxCan.h
  • IfxCan_RxBufferId_5 : IfxCan.h
  • IfxCan_RxBufferId_50 : IfxCan.h
  • IfxCan_RxBufferId_51 : IfxCan.h
  • IfxCan_RxBufferId_52 : IfxCan.h
  • IfxCan_RxBufferId_53 : IfxCan.h
  • IfxCan_RxBufferId_54 : IfxCan.h
  • IfxCan_RxBufferId_55 : IfxCan.h
  • IfxCan_RxBufferId_56 : IfxCan.h
  • IfxCan_RxBufferId_57 : IfxCan.h
  • IfxCan_RxBufferId_58 : IfxCan.h
  • IfxCan_RxBufferId_59 : IfxCan.h
  • IfxCan_RxBufferId_6 : IfxCan.h
  • IfxCan_RxBufferId_60 : IfxCan.h
  • IfxCan_RxBufferId_61 : IfxCan.h
  • IfxCan_RxBufferId_62 : IfxCan.h
  • IfxCan_RxBufferId_63 : IfxCan.h
  • IfxCan_RxBufferId_7 : IfxCan.h
  • IfxCan_RxBufferId_8 : IfxCan.h
  • IfxCan_RxBufferId_9 : IfxCan.h
  • IfxCan_RxFifoMode_blocking : IfxCan.h
  • IfxCan_RxFifoMode_overwrite : IfxCan.h
  • IfxCan_RxMode_dedicatedBuffers : IfxCan.h
  • IfxCan_RxMode_fifo0 : IfxCan.h
  • IfxCan_RxMode_fifo1 : IfxCan.h
  • IfxCan_RxMode_sharedAll : IfxCan.h
  • IfxCan_RxMode_sharedFifo0 : IfxCan.h
  • IfxCan_RxMode_sharedFifo1 : IfxCan.h
  • IfxCan_SleepMode_disable : IfxCan.h
  • IfxCan_SleepMode_enable : IfxCan.h
  • IfxCan_Status_busOff : IfxCan.h
  • IfxCan_Status_messageLost : IfxCan.h
  • IfxCan_Status_newData : IfxCan.h
  • IfxCan_Status_newDataButOneLost : IfxCan.h
  • IfxCan_Status_notInitialised : IfxCan.h
  • IfxCan_Status_notSentBusy : IfxCan.h
  • IfxCan_Status_ok : IfxCan.h
  • IfxCan_Status_receiveEmpty : IfxCan.h
  • IfxCan_SuspendMode_hard : IfxCan.h
  • IfxCan_SuspendMode_none : IfxCan.h
  • IfxCan_SuspendMode_soft : IfxCan.h
  • IfxCan_TxBufferId_0 : IfxCan.h
  • IfxCan_TxBufferId_1 : IfxCan.h
  • IfxCan_TxBufferId_10 : IfxCan.h
  • IfxCan_TxBufferId_11 : IfxCan.h
  • IfxCan_TxBufferId_12 : IfxCan.h
  • IfxCan_TxBufferId_13 : IfxCan.h
  • IfxCan_TxBufferId_14 : IfxCan.h
  • IfxCan_TxBufferId_15 : IfxCan.h
  • IfxCan_TxBufferId_16 : IfxCan.h
  • IfxCan_TxBufferId_17 : IfxCan.h
  • IfxCan_TxBufferId_18 : IfxCan.h
  • IfxCan_TxBufferId_19 : IfxCan.h
  • IfxCan_TxBufferId_2 : IfxCan.h
  • IfxCan_TxBufferId_20 : IfxCan.h
  • IfxCan_TxBufferId_21 : IfxCan.h
  • IfxCan_TxBufferId_22 : IfxCan.h
  • IfxCan_TxBufferId_23 : IfxCan.h
  • IfxCan_TxBufferId_24 : IfxCan.h
  • IfxCan_TxBufferId_25 : IfxCan.h
  • IfxCan_TxBufferId_26 : IfxCan.h
  • IfxCan_TxBufferId_27 : IfxCan.h
  • IfxCan_TxBufferId_28 : IfxCan.h
  • IfxCan_TxBufferId_29 : IfxCan.h
  • IfxCan_TxBufferId_3 : IfxCan.h
  • IfxCan_TxBufferId_30 : IfxCan.h
  • IfxCan_TxBufferId_31 : IfxCan.h
  • IfxCan_TxBufferId_4 : IfxCan.h
  • IfxCan_TxBufferId_5 : IfxCan.h
  • IfxCan_TxBufferId_6 : IfxCan.h
  • IfxCan_TxBufferId_7 : IfxCan.h
  • IfxCan_TxBufferId_8 : IfxCan.h
  • IfxCan_TxBufferId_9 : IfxCan.h
  • IfxCan_TxMode_dedicatedBuffers : IfxCan.h
  • IfxCan_TxMode_fifo : IfxCan.h
  • IfxCan_TxMode_queue : IfxCan.h
  • IfxCan_TxMode_sharedFifo : IfxCan.h
  • IfxCan_TxMode_sharedQueue : IfxCan.h
  • IfxCcu6_CaptureCompareInput_cC60 : IfxCcu6.h
  • IfxCcu6_CaptureCompareInput_cC61 : IfxCcu6.h
  • IfxCcu6_CaptureCompareInput_cC62 : IfxCcu6.h
  • IfxCcu6_CaptureCompareInput_cCPOS0 : IfxCcu6.h
  • IfxCcu6_CaptureCompareInput_cCPOS1 : IfxCcu6.h
  • IfxCcu6_CaptureCompareInput_cCPOS2 : IfxCcu6.h
  • IfxCcu6_CaptureCompareInput_cTRAP : IfxCcu6.h
  • IfxCcu6_CaptureCompareInputSignal_a : IfxCcu6.h
  • IfxCcu6_CaptureCompareInputSignal_b : IfxCcu6.h
  • IfxCcu6_CaptureCompareInputSignal_c : IfxCcu6.h
  • IfxCcu6_CaptureCompareInputSignal_d : IfxCcu6.h
  • IfxCcu6_CaptureCompareState_clear : IfxCcu6.h
  • IfxCcu6_CaptureCompareState_set : IfxCcu6.h
  • IfxCcu6_CaptureCompareState_toggle : IfxCcu6.h
  • IfxCcu6_ChannelOut_cc0 : IfxCcu6.h
  • IfxCcu6_ChannelOut_cc1 : IfxCcu6.h
  • IfxCcu6_ChannelOut_cc2 : IfxCcu6.h
  • IfxCcu6_ChannelOut_cout0 : IfxCcu6.h
  • IfxCcu6_ChannelOut_cout1 : IfxCcu6.h
  • IfxCcu6_ChannelOut_cout2 : IfxCcu6.h
  • IfxCcu6_ChannelOut_cout3 : IfxCcu6.h
  • IfxCcu6_CountingInputMode_externalFalling : IfxCcu6.h
  • IfxCcu6_CountingInputMode_externalRising : IfxCcu6.h
  • IfxCcu6_CountingInputMode_internal : IfxCcu6.h
  • IfxCcu6_CountingInputMode_manual : IfxCcu6.h
  • IfxCcu6_DelayBypass_active : IfxCcu6.h
  • IfxCcu6_DelayBypass_notActive : IfxCcu6.h
  • IfxCcu6_ExternalTriggerMode_anyEdge : IfxCcu6.h
  • IfxCcu6_ExternalTriggerMode_disable : IfxCcu6.h
  • IfxCcu6_ExternalTriggerMode_fallingEdge : IfxCcu6.h
  • IfxCcu6_ExternalTriggerMode_risingEdge : IfxCcu6.h
  • IfxCcu6_HallSensorTriggerMode_cM61CountingDown : IfxCcu6.h
  • IfxCcu6_HallSensorTriggerMode_cM61CountingUp : IfxCcu6.h
  • IfxCcu6_HallSensorTriggerMode_cM63 : IfxCcu6.h
  • IfxCcu6_HallSensorTriggerMode_off : IfxCcu6.h
  • IfxCcu6_HallSensorTriggerMode_permanentCheck : IfxCcu6.h
  • IfxCcu6_HallSensorTriggerMode_t12OMCountingDown : IfxCcu6.h
  • IfxCcu6_HallSensorTriggerMode_t12PMCountingUp : IfxCcu6.h
  • IfxCcu6_HallSensorTriggerMode_t13PM : IfxCcu6.h
  • IfxCcu6_Index_0 : IfxCcu6_cfg.h
  • IfxCcu6_Index_1 : IfxCcu6_cfg.h
  • IfxCcu6_Index_none : IfxCcu6_cfg.h
  • IfxCcu6_InterruptSource_cc60FallingEdge : IfxCcu6.h
  • IfxCcu6_InterruptSource_cc60RisingEdge : IfxCcu6.h
  • IfxCcu6_InterruptSource_cc61FallingEdge : IfxCcu6.h
  • IfxCcu6_InterruptSource_cc61RisingEdge : IfxCcu6.h
  • IfxCcu6_InterruptSource_cc62FallingEdge : IfxCcu6.h
  • IfxCcu6_InterruptSource_cc62RisingEdge : IfxCcu6.h
  • IfxCcu6_InterruptSource_correctHallEvent : IfxCcu6.h
  • IfxCcu6_InterruptSource_t12OneMatch : IfxCcu6.h
  • IfxCcu6_InterruptSource_t12PeriodMatch : IfxCcu6.h
  • IfxCcu6_InterruptSource_t13CompareMatch : IfxCcu6.h
  • IfxCcu6_InterruptSource_t13PeriodMatch : IfxCcu6.h
  • IfxCcu6_InterruptSource_trap : IfxCcu6.h
  • IfxCcu6_InterruptSource_wrongHallEvent : IfxCcu6.h
  • IfxCcu6_MultiChannelSwitchingSelect_correctHallEvent : IfxCcu6.h
  • IfxCcu6_MultiChannelSwitchingSelect_noEvent : IfxCcu6.h
  • IfxCcu6_MultiChannelSwitchingSelect_t12Channel1CompareMatch : IfxCcu6.h
  • IfxCcu6_MultiChannelSwitchingSelect_t12OneMatch : IfxCcu6.h
  • IfxCcu6_MultiChannelSwitchingSelect_t12PeriodMatch : IfxCcu6.h
  • IfxCcu6_MultiChannelSwitchingSelect_t13PeriodMatch : IfxCcu6.h
  • IfxCcu6_MultiChannelSwitchingSync_direct : IfxCcu6.h
  • IfxCcu6_MultiChannelSwitchingSync_t12ZeroMatch : IfxCcu6.h
  • IfxCcu6_MultiChannelSwitchingSync_t13ZeroMatch : IfxCcu6.h
  • IfxCcu6_ServiceRequest_0 : IfxCcu6.h
  • IfxCcu6_ServiceRequest_1 : IfxCcu6.h
  • IfxCcu6_ServiceRequest_2 : IfxCcu6.h
  • IfxCcu6_ServiceRequest_3 : IfxCcu6.h
  • IfxCcu6_SleepMode_disable : IfxCcu6.h
  • IfxCcu6_SleepMode_enable : IfxCcu6.h
  • IfxCcu6_SuspendMode_hard : IfxCcu6.h
  • IfxCcu6_SuspendMode_none : IfxCcu6.h
  • IfxCcu6_SuspendMode_soft : IfxCcu6.h
  • IfxCcu6_T12Channel_0 : IfxCcu6.h
  • IfxCcu6_T12Channel_1 : IfxCcu6.h
  • IfxCcu6_T12Channel_2 : IfxCcu6.h
  • IfxCcu6_T12ChannelMode_compareMode : IfxCcu6.h
  • IfxCcu6_T12ChannelMode_doubleRegisterCaptureAny : IfxCcu6.h
  • IfxCcu6_T12ChannelMode_doubleRegisterCaptureFalling : IfxCcu6.h
  • IfxCcu6_T12ChannelMode_doubleRegisterCaptureRising : IfxCcu6.h
  • IfxCcu6_T12ChannelMode_doubleRegisterCaptureRisingAndFalling : IfxCcu6.h
  • IfxCcu6_T12ChannelMode_hallSensor : IfxCcu6.h
  • IfxCcu6_T12ChannelMode_hysteresisLikecompare : IfxCcu6.h
  • IfxCcu6_T12ChannelMode_multiInputCaptureAny : IfxCcu6.h
  • IfxCcu6_T12ChannelMode_multiInputCaptureBothFalling : IfxCcu6.h
  • IfxCcu6_T12ChannelMode_multiInputCaptureBothRising : IfxCcu6.h
  • IfxCcu6_T12ChannelMode_multiInputCaptureFallingAndRising : IfxCcu6.h
  • IfxCcu6_T12ChannelMode_multiInputCaptureRisingAndFalling : IfxCcu6.h
  • IfxCcu6_T12ChannelMode_off : IfxCcu6.h
  • IfxCcu6_T12CountDirection_down : IfxCcu6.h
  • IfxCcu6_T12CountDirection_up : IfxCcu6.h
  • IfxCcu6_T12CountMode_centerAligned : IfxCcu6.h
  • IfxCcu6_T12CountMode_edgeAligned : IfxCcu6.h
  • IfxCcu6_T13TriggerDirection_anyT12 : IfxCcu6.h
  • IfxCcu6_T13TriggerDirection_noAction : IfxCcu6.h
  • IfxCcu6_T13TriggerDirection_onT12CountingDown : IfxCcu6.h
  • IfxCcu6_T13TriggerDirection_onT12CountingUp : IfxCcu6.h
  • IfxCcu6_T13TriggerEvent_noAction : IfxCcu6.h
  • IfxCcu6_T13TriggerEvent_onAnyT12Compare : IfxCcu6.h
  • IfxCcu6_T13TriggerEvent_onCC60RCompare : IfxCcu6.h
  • IfxCcu6_T13TriggerEvent_onCC61RCompare : IfxCcu6.h
  • IfxCcu6_T13TriggerEvent_onCC62RCompare : IfxCcu6.h
  • IfxCcu6_T13TriggerEvent_onCCPOSxEdge : IfxCcu6.h
  • IfxCcu6_T13TriggerEvent_onT12Period : IfxCcu6.h
  • IfxCcu6_T13TriggerEvent_onT12Zero : IfxCcu6.h
  • IfxCcu6_TimerId_t12 : IfxCcu6.h
  • IfxCcu6_TimerId_t13 : IfxCcu6.h
  • IfxCcu6_TimerInputClock_fcc6 : IfxCcu6.h
  • IfxCcu6_TimerInputClock_fcc6By128 : IfxCcu6.h
  • IfxCcu6_TimerInputClock_fcc6By16 : IfxCcu6.h
  • IfxCcu6_TimerInputClock_fcc6By2 : IfxCcu6.h
  • IfxCcu6_TimerInputClock_fcc6By32 : IfxCcu6.h
  • IfxCcu6_TimerInputClock_fcc6By4 : IfxCcu6.h
  • IfxCcu6_TimerInputClock_fcc6By64 : IfxCcu6.h
  • IfxCcu6_TimerInputClock_fcc6By8 : IfxCcu6.h
  • IfxCcu6_TimerInputSignal_a : IfxCcu6.h
  • IfxCcu6_TimerInputSignal_b : IfxCcu6.h
  • IfxCcu6_TimerInputSignal_c : IfxCcu6.h
  • IfxCcu6_TimerInputSignal_d : IfxCcu6.h
  • IfxCcu6_TimerInputSignal_e : IfxCcu6.h
  • IfxCcu6_TimerInputSignal_f : IfxCcu6.h
  • IfxCcu6_TimerInputSignal_g : IfxCcu6.h
  • IfxCcu6_TimerInputSignal_h : IfxCcu6.h
  • IfxCcu6_TimerRunStatus_running : IfxCcu6.h
  • IfxCcu6_TimerRunStatus_stopped : IfxCcu6.h
  • IfxCcu6_TrapMode_automatic : IfxCcu6.h
  • IfxCcu6_TrapMode_manual : IfxCcu6.h
  • IfxCcu6_TrapState_immediate : IfxCcu6.h
  • IfxCcu6_TrapState_t12Sync : IfxCcu6.h
  • IfxCcu6_TrapState_t13Sync : IfxCcu6.h
  • IfxCcu6_TrigOut_0 : IfxCcu6_cfg.h
  • IfxCcu6_TrigOut_1 : IfxCcu6_cfg.h
  • IfxCcu6_TrigOut_2 : IfxCcu6_cfg.h
  • IfxCcu6_TrigSel_cc60 : IfxCcu6_cfg.h
  • IfxCcu6_TrigSel_cc61 : IfxCcu6_cfg.h
  • IfxCcu6_TrigSel_cc62 : IfxCcu6_cfg.h
  • IfxCcu6_TrigSel_cout63 : IfxCcu6_cfg.h
  • IfxCcu6_TrigSel_sr1 : IfxCcu6_cfg.h
  • IfxCcu6_TrigSel_sr3 : IfxCcu6_cfg.h
  • IfxConvctrl_PhaseSynchronizerDivider_10 : IfxConvctrl.h
  • IfxConvctrl_PhaseSynchronizerDivider_11 : IfxConvctrl.h
  • IfxConvctrl_PhaseSynchronizerDivider_12 : IfxConvctrl.h
  • IfxConvctrl_PhaseSynchronizerDivider_13 : IfxConvctrl.h
  • IfxConvctrl_PhaseSynchronizerDivider_14 : IfxConvctrl.h
  • IfxConvctrl_PhaseSynchronizerDivider_15 : IfxConvctrl.h
  • IfxConvctrl_PhaseSynchronizerDivider_16 : IfxConvctrl.h
  • IfxConvctrl_PhaseSynchronizerDivider_2 : IfxConvctrl.h
  • IfxConvctrl_PhaseSynchronizerDivider_3 : IfxConvctrl.h
  • IfxConvctrl_PhaseSynchronizerDivider_4 : IfxConvctrl.h
  • IfxConvctrl_PhaseSynchronizerDivider_5 : IfxConvctrl.h
  • IfxConvctrl_PhaseSynchronizerDivider_6 : IfxConvctrl.h
  • IfxConvctrl_PhaseSynchronizerDivider_7 : IfxConvctrl.h
  • IfxConvctrl_PhaseSynchronizerDivider_8 : IfxConvctrl.h
  • IfxConvctrl_PhaseSynchronizerDivider_9 : IfxConvctrl.h
  • IfxConvctrl_PhaseSynchronizerDivider_off : IfxConvctrl.h
  • IfxConvctrl_SuspendMode_1 : IfxConvctrl.h
  • IfxConvctrl_SuspendMode_2 : IfxConvctrl.h
  • IfxConvctrl_SuspendMode_noSuspend : IfxConvctrl.h
  • IfxCpu_CoreMode_halt : IfxCpu.h
  • IfxCpu_CoreMode_idle : IfxCpu.h
  • IfxCpu_CoreMode_run : IfxCpu.h
  • IfxCpu_CoreMode_sleep : IfxCpu.h
  • IfxCpu_CoreMode_stby : IfxCpu.h
  • IfxCpu_CoreMode_unknown : IfxCpu.h
  • IfxCpu_CounterMode_normal : IfxCpu.h
  • IfxCpu_CounterMode_task : IfxCpu.h
  • IfxCpu_DBGST_HALT_halt : IfxCpu_cfg.h
  • IfxCpu_DBGST_HALT_run : IfxCpu_cfg.h
  • IfxCpu_Id_0 : IfxCpu_cfg.h
  • IfxCpu_Id_1 : IfxCpu_cfg.h
  • IfxCpu_Id_2 : IfxCpu_cfg.h
  • IfxCpu_Id_3 : IfxCpu_cfg.h
  • IfxCpu_Id_none : IfxCpu_cfg.h
  • IfxCpu_Index_0 : IfxCpu_cfg.h
  • IfxCpu_Index_1 : IfxCpu_cfg.h
  • IfxCpu_Index_2 : IfxCpu_cfg.h
  • IfxCpu_Index_3 : IfxCpu_cfg.h
  • IfxCpu_Index_none : IfxCpu_cfg.h
  • IfxCpu_OverlayAddressMask_128byte : IfxCpu.h
  • IfxCpu_OverlayAddressMask_128KB : IfxCpu.h
  • IfxCpu_OverlayAddressMask_16KB : IfxCpu.h
  • IfxCpu_OverlayAddressMask_1KB : IfxCpu.h
  • IfxCpu_OverlayAddressMask_256byte : IfxCpu.h
  • IfxCpu_OverlayAddressMask_2KB : IfxCpu.h
  • IfxCpu_OverlayAddressMask_32byte : IfxCpu.h
  • IfxCpu_OverlayAddressMask_32KB : IfxCpu.h
  • IfxCpu_OverlayAddressMask_4KB : IfxCpu.h
  • IfxCpu_OverlayAddressMask_512byte : IfxCpu.h
  • IfxCpu_OverlayAddressMask_64byte : IfxCpu.h
  • IfxCpu_OverlayAddressMask_64KB : IfxCpu.h
  • IfxCpu_OverlayAddressMask_8KB : IfxCpu.h
  • IfxCpu_OverlayMemorySelect_core0DsprPspr : IfxCpu.h
  • IfxCpu_OverlayMemorySelect_core1DsprPspr : IfxCpu.h
  • IfxCpu_OverlayMemorySelect_core2DsprPspr : IfxCpu.h
  • IfxCpu_OverlayMemorySelect_core3DsprPspr : IfxCpu.h
  • IfxCpu_OverlayMemorySelect_lmu : IfxCpu.h
  • IfxCpu_PMCSR_PMST_idleMode : IfxCpu_cfg.h
  • IfxCpu_PMCSR_PMST_idleModeRequest : IfxCpu_cfg.h
  • IfxCpu_PMCSR_PMST_normalMode : IfxCpu_cfg.h
  • IfxCpu_PMCSR_PMST_sleepModeRequest : IfxCpu_cfg.h
  • IfxCpu_PMCSR_PMST_standbyModeRequest : IfxCpu_cfg.h
  • IfxCpu_ResetStatus_cpuResetBySmu : IfxCpu.h
  • IfxCpu_ResetStatus_cpuResetBySw : IfxCpu.h
  • IfxCpu_ResetStatus_notCpuReset : IfxCpu.h
  • IfxCpu_ResourceCpu_0 : IfxCpu_cfg.h
  • IfxCpu_ResourceCpu_1 : IfxCpu_cfg.h
  • IfxCpu_ResourceCpu_2 : IfxCpu_cfg.h
  • IfxCpu_ResourceCpu_3 : IfxCpu_cfg.h
  • IfxCpu_ResourceCpu_none : IfxCpu_cfg.h
  • IfxCpu_Trap_Assertion_Id_arithmeticOverflow : IfxCpu_Trap.h
  • IfxCpu_Trap_Assertion_Id_stickyArithmeticOverflow : IfxCpu_Trap.h
  • IfxCpu_Trap_Bus_Id_CoprocessorTrapAsynchronousError : IfxCpu_Trap.h
  • IfxCpu_Trap_Bus_Id_dataAccessAsynchronousError : IfxCpu_Trap.h
  • IfxCpu_Trap_Bus_Id_dataAccessSynchronousError : IfxCpu_Trap.h
  • IfxCpu_Trap_Bus_Id_dataMemoryIntegrityError : IfxCpu_Trap.h
  • IfxCpu_Trap_Bus_Id_programFetchSynchronousError : IfxCpu_Trap.h
  • IfxCpu_Trap_Bus_Id_programMemoryIntegrityError : IfxCpu_Trap.h
  • IfxCpu_Trap_Bus_Id_temporalAsynchronousError : IfxCpu_Trap.h
  • IfxCpu_Trap_Class_assertion : IfxCpu_Trap.h
  • IfxCpu_Trap_Class_bus : IfxCpu_Trap.h
  • IfxCpu_Trap_Class_contextManagement : IfxCpu_Trap.h
  • IfxCpu_Trap_Class_instructionErrors : IfxCpu_Trap.h
  • IfxCpu_Trap_Class_internalProtection : IfxCpu_Trap.h
  • IfxCpu_Trap_Class_memoryManagement : IfxCpu_Trap.h
  • IfxCpu_Trap_Class_nonMaskableInterrupt : IfxCpu_Trap.h
  • IfxCpu_Trap_Class_systemCall : IfxCpu_Trap.h
  • IfxCpu_Trap_ContextManagement_Id_callDepthOverflow : IfxCpu_Trap.h
  • IfxCpu_Trap_ContextManagement_Id_callDepthUnderflow : IfxCpu_Trap.h
  • IfxCpu_Trap_ContextManagement_Id_callStackUnderflow : IfxCpu_Trap.h
  • IfxCpu_Trap_ContextManagement_Id_contextType : IfxCpu_Trap.h
  • IfxCpu_Trap_ContextManagement_Id_freeContextListDepletion : IfxCpu_Trap.h
  • IfxCpu_Trap_ContextManagement_Id_freeContextListUnderflow : IfxCpu_Trap.h
  • IfxCpu_Trap_ContextManagement_Id_nestingError : IfxCpu_Trap.h
  • IfxCpu_Trap_InstructionErrors_Id_dataAddressAlignment : IfxCpu_Trap.h
  • IfxCpu_Trap_InstructionErrors_Id_illegalOpcode : IfxCpu_Trap.h
  • IfxCpu_Trap_InstructionErrors_Id_invalidMemoryAddress : IfxCpu_Trap.h
  • IfxCpu_Trap_InstructionErrors_Id_invalidOperand : IfxCpu_Trap.h
  • IfxCpu_Trap_InstructionErrors_Id_unimplementedOpcode : IfxCpu_Trap.h
  • IfxCpu_Trap_InternalProtection_Id_globalRegisterWriteProtection : IfxCpu_Trap.h
  • IfxCpu_Trap_InternalProtection_Id_memoryProtectionExecute : IfxCpu_Trap.h
  • IfxCpu_Trap_InternalProtection_Id_memoryProtectionNullAddress : IfxCpu_Trap.h
  • IfxCpu_Trap_InternalProtection_Id_memoryProtectionPeripheralAccess : IfxCpu_Trap.h
  • IfxCpu_Trap_InternalProtection_Id_memoryProtectionRead : IfxCpu_Trap.h
  • IfxCpu_Trap_InternalProtection_Id_memoryProtectionWrite : IfxCpu_Trap.h
  • IfxCpu_Trap_InternalProtection_Id_privilegeViolation : IfxCpu_Trap.h
  • IfxCpu_Trap_MemoryManagement_Id_virtualAddressFill : IfxCpu_Trap.h
  • IfxCpu_Trap_MemoryManagement_Id_virtualAddressProtection : IfxCpu_Trap.h
  • IfxDma_BusMasterMode_supervisor : IfxDma.h
  • IfxDma_BusMasterMode_user : IfxDma.h
  • IfxDma_ChannelBusPriority_high : IfxDma.h
  • IfxDma_ChannelBusPriority_low : IfxDma.h
  • IfxDma_ChannelBusPriority_medium : IfxDma.h
  • IfxDma_ChannelId_0 : IfxDma_cfg.h
  • IfxDma_ChannelId_1 : IfxDma_cfg.h
  • IfxDma_ChannelId_10 : IfxDma_cfg.h
  • IfxDma_ChannelId_100 : IfxDma_cfg.h
  • IfxDma_ChannelId_101 : IfxDma_cfg.h
  • IfxDma_ChannelId_102 : IfxDma_cfg.h
  • IfxDma_ChannelId_103 : IfxDma_cfg.h
  • IfxDma_ChannelId_104 : IfxDma_cfg.h
  • IfxDma_ChannelId_105 : IfxDma_cfg.h
  • IfxDma_ChannelId_106 : IfxDma_cfg.h
  • IfxDma_ChannelId_107 : IfxDma_cfg.h
  • IfxDma_ChannelId_108 : IfxDma_cfg.h
  • IfxDma_ChannelId_109 : IfxDma_cfg.h
  • IfxDma_ChannelId_11 : IfxDma_cfg.h
  • IfxDma_ChannelId_110 : IfxDma_cfg.h
  • IfxDma_ChannelId_111 : IfxDma_cfg.h
  • IfxDma_ChannelId_112 : IfxDma_cfg.h
  • IfxDma_ChannelId_113 : IfxDma_cfg.h
  • IfxDma_ChannelId_114 : IfxDma_cfg.h
  • IfxDma_ChannelId_115 : IfxDma_cfg.h
  • IfxDma_ChannelId_116 : IfxDma_cfg.h
  • IfxDma_ChannelId_117 : IfxDma_cfg.h
  • IfxDma_ChannelId_118 : IfxDma_cfg.h
  • IfxDma_ChannelId_119 : IfxDma_cfg.h
  • IfxDma_ChannelId_12 : IfxDma_cfg.h
  • IfxDma_ChannelId_120 : IfxDma_cfg.h
  • IfxDma_ChannelId_121 : IfxDma_cfg.h
  • IfxDma_ChannelId_122 : IfxDma_cfg.h
  • IfxDma_ChannelId_123 : IfxDma_cfg.h
  • IfxDma_ChannelId_124 : IfxDma_cfg.h
  • IfxDma_ChannelId_125 : IfxDma_cfg.h
  • IfxDma_ChannelId_126 : IfxDma_cfg.h
  • IfxDma_ChannelId_127 : IfxDma_cfg.h
  • IfxDma_ChannelId_13 : IfxDma_cfg.h
  • IfxDma_ChannelId_14 : IfxDma_cfg.h
  • IfxDma_ChannelId_15 : IfxDma_cfg.h
  • IfxDma_ChannelId_16 : IfxDma_cfg.h
  • IfxDma_ChannelId_17 : IfxDma_cfg.h
  • IfxDma_ChannelId_18 : IfxDma_cfg.h
  • IfxDma_ChannelId_19 : IfxDma_cfg.h
  • IfxDma_ChannelId_2 : IfxDma_cfg.h
  • IfxDma_ChannelId_20 : IfxDma_cfg.h
  • IfxDma_ChannelId_21 : IfxDma_cfg.h
  • IfxDma_ChannelId_22 : IfxDma_cfg.h
  • IfxDma_ChannelId_23 : IfxDma_cfg.h
  • IfxDma_ChannelId_24 : IfxDma_cfg.h
  • IfxDma_ChannelId_25 : IfxDma_cfg.h
  • IfxDma_ChannelId_26 : IfxDma_cfg.h
  • IfxDma_ChannelId_27 : IfxDma_cfg.h
  • IfxDma_ChannelId_28 : IfxDma_cfg.h
  • IfxDma_ChannelId_29 : IfxDma_cfg.h
  • IfxDma_ChannelId_3 : IfxDma_cfg.h
  • IfxDma_ChannelId_30 : IfxDma_cfg.h
  • IfxDma_ChannelId_31 : IfxDma_cfg.h
  • IfxDma_ChannelId_32 : IfxDma_cfg.h
  • IfxDma_ChannelId_33 : IfxDma_cfg.h
  • IfxDma_ChannelId_34 : IfxDma_cfg.h
  • IfxDma_ChannelId_35 : IfxDma_cfg.h
  • IfxDma_ChannelId_36 : IfxDma_cfg.h
  • IfxDma_ChannelId_37 : IfxDma_cfg.h
  • IfxDma_ChannelId_38 : IfxDma_cfg.h
  • IfxDma_ChannelId_39 : IfxDma_cfg.h
  • IfxDma_ChannelId_4 : IfxDma_cfg.h
  • IfxDma_ChannelId_40 : IfxDma_cfg.h
  • IfxDma_ChannelId_41 : IfxDma_cfg.h
  • IfxDma_ChannelId_42 : IfxDma_cfg.h
  • IfxDma_ChannelId_43 : IfxDma_cfg.h
  • IfxDma_ChannelId_44 : IfxDma_cfg.h
  • IfxDma_ChannelId_45 : IfxDma_cfg.h
  • IfxDma_ChannelId_46 : IfxDma_cfg.h
  • IfxDma_ChannelId_47 : IfxDma_cfg.h
  • IfxDma_ChannelId_48 : IfxDma_cfg.h
  • IfxDma_ChannelId_49 : IfxDma_cfg.h
  • IfxDma_ChannelId_5 : IfxDma_cfg.h
  • IfxDma_ChannelId_50 : IfxDma_cfg.h
  • IfxDma_ChannelId_51 : IfxDma_cfg.h
  • IfxDma_ChannelId_52 : IfxDma_cfg.h
  • IfxDma_ChannelId_53 : IfxDma_cfg.h
  • IfxDma_ChannelId_54 : IfxDma_cfg.h
  • IfxDma_ChannelId_55 : IfxDma_cfg.h
  • IfxDma_ChannelId_56 : IfxDma_cfg.h
  • IfxDma_ChannelId_57 : IfxDma_cfg.h
  • IfxDma_ChannelId_58 : IfxDma_cfg.h
  • IfxDma_ChannelId_59 : IfxDma_cfg.h
  • IfxDma_ChannelId_6 : IfxDma_cfg.h
  • IfxDma_ChannelId_60 : IfxDma_cfg.h
  • IfxDma_ChannelId_61 : IfxDma_cfg.h
  • IfxDma_ChannelId_62 : IfxDma_cfg.h
  • IfxDma_ChannelId_63 : IfxDma_cfg.h
  • IfxDma_ChannelId_64 : IfxDma_cfg.h
  • IfxDma_ChannelId_65 : IfxDma_cfg.h
  • IfxDma_ChannelId_66 : IfxDma_cfg.h
  • IfxDma_ChannelId_67 : IfxDma_cfg.h
  • IfxDma_ChannelId_68 : IfxDma_cfg.h
  • IfxDma_ChannelId_69 : IfxDma_cfg.h
  • IfxDma_ChannelId_7 : IfxDma_cfg.h
  • IfxDma_ChannelId_70 : IfxDma_cfg.h
  • IfxDma_ChannelId_71 : IfxDma_cfg.h
  • IfxDma_ChannelId_72 : IfxDma_cfg.h
  • IfxDma_ChannelId_73 : IfxDma_cfg.h
  • IfxDma_ChannelId_74 : IfxDma_cfg.h
  • IfxDma_ChannelId_75 : IfxDma_cfg.h
  • IfxDma_ChannelId_76 : IfxDma_cfg.h
  • IfxDma_ChannelId_77 : IfxDma_cfg.h
  • IfxDma_ChannelId_78 : IfxDma_cfg.h
  • IfxDma_ChannelId_79 : IfxDma_cfg.h
  • IfxDma_ChannelId_8 : IfxDma_cfg.h
  • IfxDma_ChannelId_80 : IfxDma_cfg.h
  • IfxDma_ChannelId_81 : IfxDma_cfg.h
  • IfxDma_ChannelId_82 : IfxDma_cfg.h
  • IfxDma_ChannelId_83 : IfxDma_cfg.h
  • IfxDma_ChannelId_84 : IfxDma_cfg.h
  • IfxDma_ChannelId_85 : IfxDma_cfg.h
  • IfxDma_ChannelId_86 : IfxDma_cfg.h
  • IfxDma_ChannelId_87 : IfxDma_cfg.h
  • IfxDma_ChannelId_88 : IfxDma_cfg.h
  • IfxDma_ChannelId_89 : IfxDma_cfg.h
  • IfxDma_ChannelId_9 : IfxDma_cfg.h
  • IfxDma_ChannelId_90 : IfxDma_cfg.h
  • IfxDma_ChannelId_91 : IfxDma_cfg.h
  • IfxDma_ChannelId_92 : IfxDma_cfg.h
  • IfxDma_ChannelId_93 : IfxDma_cfg.h
  • IfxDma_ChannelId_94 : IfxDma_cfg.h
  • IfxDma_ChannelId_95 : IfxDma_cfg.h
  • IfxDma_ChannelId_96 : IfxDma_cfg.h
  • IfxDma_ChannelId_97 : IfxDma_cfg.h
  • IfxDma_ChannelId_98 : IfxDma_cfg.h
  • IfxDma_ChannelId_99 : IfxDma_cfg.h
  • IfxDma_ChannelId_none : IfxDma_cfg.h
  • IfxDma_ChannelIncrementCircular_1024 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_128 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_16 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_16384 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_2 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_2048 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_256 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_32 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_32768 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_4 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_4096 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_512 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_64 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_8 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_8192 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_none : IfxDma.h
  • IfxDma_ChannelIncrementDirection_negative : IfxDma.h
  • IfxDma_ChannelIncrementDirection_positive : IfxDma.h
  • IfxDma_ChannelIncrementStep_1 : IfxDma.h
  • IfxDma_ChannelIncrementStep_128 : IfxDma.h
  • IfxDma_ChannelIncrementStep_16 : IfxDma.h
  • IfxDma_ChannelIncrementStep_2 : IfxDma.h
  • IfxDma_ChannelIncrementStep_32 : IfxDma.h
  • IfxDma_ChannelIncrementStep_4 : IfxDma.h
  • IfxDma_ChannelIncrementStep_64 : IfxDma.h
  • IfxDma_ChannelIncrementStep_8 : IfxDma.h
  • IfxDma_ChannelInterruptControl_thresholdLimitMatch : IfxDma.h
  • IfxDma_ChannelInterruptControl_transferCountDecremented : IfxDma.h
  • IfxDma_ChannelMove_1 : IfxDma.h
  • IfxDma_ChannelMove_16 : IfxDma.h
  • IfxDma_ChannelMove_2 : IfxDma.h
  • IfxDma_ChannelMove_3 : IfxDma.h
  • IfxDma_ChannelMove_4 : IfxDma.h
  • IfxDma_ChannelMove_5 : IfxDma.h
  • IfxDma_ChannelMove_8 : IfxDma.h
  • IfxDma_ChannelMove_9 : IfxDma.h
  • IfxDma_ChannelMoveSize_128bit : IfxDma.h
  • IfxDma_ChannelMoveSize_16bit : IfxDma.h
  • IfxDma_ChannelMoveSize_256bit : IfxDma.h
  • IfxDma_ChannelMoveSize_32bit : IfxDma.h
  • IfxDma_ChannelMoveSize_64bit : IfxDma.h
  • IfxDma_ChannelMoveSize_8bit : IfxDma.h
  • IfxDma_ChannelOperationMode_continuous : IfxDma.h
  • IfxDma_ChannelOperationMode_single : IfxDma.h
  • IfxDma_ChannelPattern_0_disable : IfxDma.h
  • IfxDma_ChannelPattern_0_mode1 : IfxDma.h
  • IfxDma_ChannelPattern_0_mode2 : IfxDma.h
  • IfxDma_ChannelPattern_0_mode3 : IfxDma.h
  • IfxDma_ChannelPattern_1_disable : IfxDma.h
  • IfxDma_ChannelPattern_1_mode1 : IfxDma.h
  • IfxDma_ChannelPattern_1_mode2 : IfxDma.h
  • IfxDma_ChannelPattern_1_mode3 : IfxDma.h
  • IfxDma_ChannelPriority_high : IfxDma.h
  • IfxDma_ChannelPriority_low : IfxDma.h
  • IfxDma_ChannelPriority_medium : IfxDma.h
  • IfxDma_ChannelRequestMode_completeTransactionPerRequest : IfxDma.h
  • IfxDma_ChannelRequestMode_oneTransferPerRequest : IfxDma.h
  • IfxDma_ChannelRequestSource_daisyChain : IfxDma.h
  • IfxDma_ChannelRequestSource_peripheral : IfxDma.h
  • IfxDma_ChannelShadow_accumulatedLinkedList : IfxDma.h
  • IfxDma_ChannelShadow_conditionalLinkedList : IfxDma.h
  • IfxDma_ChannelShadow_doubleDestinationBufferingHwSwSwitch : IfxDma.h
  • IfxDma_ChannelShadow_doubleDestinationBufferingSwSwitch : IfxDma.h
  • IfxDma_ChannelShadow_doubleSourceBufferingHwSwSwitch : IfxDma.h
  • IfxDma_ChannelShadow_doubleSourceBufferingSwSwitch : IfxDma.h
  • IfxDma_ChannelShadow_dst : IfxDma.h
  • IfxDma_ChannelShadow_dstDirectWrite : IfxDma.h
  • IfxDma_ChannelShadow_linkedList : IfxDma.h
  • IfxDma_ChannelShadow_none : IfxDma.h
  • IfxDma_ChannelShadow_safeLinkedList : IfxDma.h
  • IfxDma_ChannelShadow_src : IfxDma.h
  • IfxDma_ChannelShadow_srcDirectWrite : IfxDma.h
  • IfxDma_HardwareResourcePartition_0 : IfxDma.h
  • IfxDma_HardwareResourcePartition_1 : IfxDma.h
  • IfxDma_HardwareResourcePartition_2 : IfxDma.h
  • IfxDma_HardwareResourcePartition_3 : IfxDma.h
  • IfxDma_MoveEngine_0 : IfxDma.h
  • IfxDma_MoveEngine_1 : IfxDma.h
  • IfxDma_SleepMode_disable : IfxDma.h
  • IfxDma_SleepMode_enable : IfxDma.h
  • IfxEdsadc_AnalogClockSyncDelay_cycleDelay1 : IfxEdsadc.h
  • IfxEdsadc_AnalogClockSyncDelay_cycleDelay2 : IfxEdsadc.h
  • IfxEdsadc_AnalogClockSyncDelay_cycleDelay3 : IfxEdsadc.h
  • IfxEdsadc_AnalogClockSyncDelay_cycleDelay4 : IfxEdsadc.h
  • IfxEdsadc_AnalogClockSyncDelay_cycleDelay5 : IfxEdsadc.h
  • IfxEdsadc_AnalogClockSyncDelay_cycleDelay6 : IfxEdsadc.h
  • IfxEdsadc_AnalogClockSyncDelay_cycleDelay7 : IfxEdsadc.h
  • IfxEdsadc_AnalogClockSyncDelay_noDelay : IfxEdsadc.h
  • IfxEdsadc_AnalogMux_copyAmx : IfxEdsadc.h
  • IfxEdsadc_AnalogMux_doNotCopyAmx : IfxEdsadc.h
  • IfxEdsadc_AuxServiceRequest_altSource : IfxEdsadc.h
  • IfxEdsadc_AuxServiceRequest_compEvent : IfxEdsadc.h
  • IfxEdsadc_AuxServiceRequest_never : IfxEdsadc.h
  • IfxEdsadc_AuxServiceRequest_timestampEvent : IfxEdsadc.h
  • IfxEdsadc_CarrierWaveformMode_sine : IfxEdsadc.h
  • IfxEdsadc_CarrierWaveformMode_square : IfxEdsadc.h
  • IfxEdsadc_CarrierWaveformMode_stopped : IfxEdsadc.h
  • IfxEdsadc_CarrierWaveformMode_triangle : IfxEdsadc.h
  • IfxEdsadc_ChannelId_0 : IfxEdsadc_cfg.h
  • IfxEdsadc_ChannelId_1 : IfxEdsadc_cfg.h
  • IfxEdsadc_ChannelId_2 : IfxEdsadc_cfg.h
  • IfxEdsadc_ChannelId_3 : IfxEdsadc_cfg.h
  • IfxEdsadc_ChannelId_4 : IfxEdsadc_cfg.h
  • IfxEdsadc_ChannelId_5 : IfxEdsadc_cfg.h
  • IfxEdsadc_ChannelId_6 : IfxEdsadc_cfg.h
  • IfxEdsadc_ChannelId_7 : IfxEdsadc_cfg.h
  • IfxEdsadc_ChannelId_8 : IfxEdsadc_cfg.h
  • IfxEdsadc_ChannelId_9 : IfxEdsadc_cfg.h
  • IfxEdsadc_CommonModeHoldVoltage_disable : IfxEdsadc.h
  • IfxEdsadc_CommonModeHoldVoltage_enable : IfxEdsadc.h
  • IfxEdsadc_DataRead_double : IfxEdsadc.h
  • IfxEdsadc_DataRead_signOnHighbit : IfxEdsadc.h
  • IfxEdsadc_DataRead_timestampOnHighbit : IfxEdsadc.h
  • IfxEdsadc_DataStream_directFallingClockEdge : IfxEdsadc.h
  • IfxEdsadc_DataStream_directRisingClockEdge : IfxEdsadc.h
  • IfxEdsadc_DataStream_doubleDataClockEdge : IfxEdsadc.h
  • IfxEdsadc_DataStream_onChipModulator : IfxEdsadc.h
  • IfxEdsadc_DataStream_secondFallingClockEdge : IfxEdsadc.h
  • IfxEdsadc_DataStream_secondRisingClockEdge : IfxEdsadc.h
  • IfxEdsadc_dithering_disabled : IfxEdsadc.h
  • IfxEdsadc_dithering_enabled : IfxEdsadc.h
  • IfxEdsadc_DitheringIntensity_high : IfxEdsadc.h
  • IfxEdsadc_DitheringIntensity_low : IfxEdsadc.h
  • IfxEdsadc_DitheringIntensity_medium : IfxEdsadc.h
  • IfxEdsadc_DitheringIntensity_minimum : IfxEdsadc.h
  • IfxEdsadc_EventSelect_everyNewResult : IfxEdsadc.h
  • IfxEdsadc_EventSelect_insideBoundry : IfxEdsadc.h
  • IfxEdsadc_EventSelect_outsideBoundry : IfxEdsadc.h
  • IfxEdsadc_FilterRunTimeInputCycle_16 : IfxEdsadc.h
  • IfxEdsadc_FilterRunTimeInputCycle_2 : IfxEdsadc.h
  • IfxEdsadc_FilterRunTimeInputCycle_4 : IfxEdsadc.h
  • IfxEdsadc_FilterRunTimeInputCycle_8 : IfxEdsadc.h
  • IfxEdsadc_FilterStrength_maximum : IfxEdsadc.h
  • IfxEdsadc_FilterStrength_medium : IfxEdsadc.h
  • IfxEdsadc_FilterStrength_minimum : IfxEdsadc.h
  • IfxEdsadc_FilterStrength_weak : IfxEdsadc.h
  • IfxEdsadc_FractionalRefVoltage_disable : IfxEdsadc.h
  • IfxEdsadc_FractionalRefVoltage_enable : IfxEdsadc.h
  • IfxEdsadc_FractionalRefVoltageSelection_div16 : IfxEdsadc.h
  • IfxEdsadc_FractionalRefVoltageSelection_div2 : IfxEdsadc.h
  • IfxEdsadc_FractionalRefVoltageSelection_div4 : IfxEdsadc.h
  • IfxEdsadc_FractionalRefVoltageSelection_div8 : IfxEdsadc.h
  • IfxEdsadc_HalfSupplyVoltage_disable : IfxEdsadc.h
  • IfxEdsadc_HalfSupplyVoltage_enable : IfxEdsadc.h
  • IfxEdsadc_InputConfig_commonModeVoltage : IfxEdsadc.h
  • IfxEdsadc_InputConfig_inputPin : IfxEdsadc.h
  • IfxEdsadc_InputConfig_referenceGround : IfxEdsadc.h
  • IfxEdsadc_InputConfig_supplyVoltage : IfxEdsadc.h
  • IfxEdsadc_InputDataSource_directInputA : IfxEdsadc.h
  • IfxEdsadc_InputDataSource_directInputB : IfxEdsadc.h
  • IfxEdsadc_InputDataSource_directInputC : IfxEdsadc.h
  • IfxEdsadc_InputDataSource_directInputD : IfxEdsadc.h
  • IfxEdsadc_InputDataSource_invertedInputA : IfxEdsadc.h
  • IfxEdsadc_InputDataSource_invertedInputB : IfxEdsadc.h
  • IfxEdsadc_InputDataSource_invertedInputC : IfxEdsadc.h
  • IfxEdsadc_InputDataSource_invertedInputD : IfxEdsadc.h
  • IfxEdsadc_InputGain_factor1 : IfxEdsadc.h
  • IfxEdsadc_InputGain_factor16 : IfxEdsadc.h
  • IfxEdsadc_InputGain_factor2 : IfxEdsadc.h
  • IfxEdsadc_InputGain_factor4 : IfxEdsadc.h
  • IfxEdsadc_InputGain_factor8 : IfxEdsadc.h
  • IfxEdsadc_InputMuxControlMode_always : IfxEdsadc.h
  • IfxEdsadc_InputMuxControlMode_fallingEdge : IfxEdsadc.h
  • IfxEdsadc_InputMuxControlMode_risingEdge : IfxEdsadc.h
  • IfxEdsadc_InputMuxControlMode_softwareControl : IfxEdsadc.h
  • IfxEdsadc_InputPin_a : IfxEdsadc.h
  • IfxEdsadc_InputPin_b : IfxEdsadc.h
  • IfxEdsadc_InputPin_c : IfxEdsadc.h
  • IfxEdsadc_InputPin_d : IfxEdsadc.h
  • IfxEdsadc_IntegrationShiftControl_0 : IfxEdsadc.h
  • IfxEdsadc_IntegrationShiftControl_1 : IfxEdsadc.h
  • IfxEdsadc_IntegrationShiftControl_2 : IfxEdsadc.h
  • IfxEdsadc_IntegrationShiftControl_3 : IfxEdsadc.h
  • IfxEdsadc_IntegrationShiftControl_4 : IfxEdsadc.h
  • IfxEdsadc_IntegrationShiftControl_5 : IfxEdsadc.h
  • IfxEdsadc_IntegrationWindowSize_externalControl : IfxEdsadc.h
  • IfxEdsadc_IntegrationWindowSize_internalControl : IfxEdsadc.h
  • IfxEdsadc_IntegratorTrigger_alwaysActive : IfxEdsadc.h
  • IfxEdsadc_IntegratorTrigger_bypassed : IfxEdsadc.h
  • IfxEdsadc_IntegratorTrigger_fallingEdge : IfxEdsadc.h
  • IfxEdsadc_IntegratorTrigger_risingEdge : IfxEdsadc.h
  • IfxEdsadc_MainServiceRequest_everyNewResult : IfxEdsadc.h
  • IfxEdsadc_MainServiceRequest_highGateSignal : IfxEdsadc.h
  • IfxEdsadc_MainServiceRequest_lowGateSignal : IfxEdsadc.h
  • IfxEdsadc_MainServiceRequest_never : IfxEdsadc.h
  • IfxEdsadc_ModulatorClockDivider_div10 : IfxEdsadc.h
  • IfxEdsadc_ModulatorClockDivider_div12 : IfxEdsadc.h
  • IfxEdsadc_ModulatorClockDivider_div14 : IfxEdsadc.h
  • IfxEdsadc_ModulatorClockDivider_div16 : IfxEdsadc.h
  • IfxEdsadc_ModulatorClockDivider_div18 : IfxEdsadc.h
  • IfxEdsadc_ModulatorClockDivider_div4 : IfxEdsadc.h
  • IfxEdsadc_ModulatorClockDivider_div6 : IfxEdsadc.h
  • IfxEdsadc_ModulatorClockDivider_div8 : IfxEdsadc.h
  • IfxEdsadc_ModulatorClockGeneration_syncMode : IfxEdsadc.h
  • IfxEdsadc_ModulatorClockGeneration_unsyncMode : IfxEdsadc.h
  • IfxEdsadc_OffsetCompensationFilter_disabled : IfxEdsadc.h
  • IfxEdsadc_OffsetCompensationFilter_enablewithRateA : IfxEdsadc.h
  • IfxEdsadc_OffsetCompensationFilter_enablewithRateB : IfxEdsadc.h
  • IfxEdsadc_OffsetCompensationFilter_enablewithRateC : IfxEdsadc.h
  • IfxEdsadc_OffsetCompensationFilter_enablewithRateD : IfxEdsadc.h
  • IfxEdsadc_OffsetCompensationFilter_enablewithRateE : IfxEdsadc.h
  • IfxEdsadc_OffsetCompensationFilter_enablewithRateF : IfxEdsadc.h
  • IfxEdsadc_OffsetCompensationFilter_enablewithRateG : IfxEdsadc.h
  • IfxEdsadc_OvershootCompensation_disabled : IfxEdsadc.h
  • IfxEdsadc_OvershootCompensation_enabled : IfxEdsadc.h
  • IfxEdsadc_RectifierSignSource_externalA : IfxEdsadc.h
  • IfxEdsadc_RectifierSignSource_externalB : IfxEdsadc.h
  • IfxEdsadc_RectifierSignSource_nextChannel : IfxEdsadc.h
  • IfxEdsadc_RectifierSignSource_onChipGenerator : IfxEdsadc.h
  • IfxEdsadc_RestartFilterChain_off : IfxEdsadc.h
  • IfxEdsadc_RestartFilterChain_on : IfxEdsadc.h
  • IfxEdsadc_ResultDisplayMode_signed : IfxEdsadc.h
  • IfxEdsadc_ResultDisplayMode_unsigned : IfxEdsadc.h
  • IfxEdsadc_SampleClockSource_inputA : IfxEdsadc.h
  • IfxEdsadc_SampleClockSource_inputB : IfxEdsadc.h
  • IfxEdsadc_SampleClockSource_inputC : IfxEdsadc.h
  • IfxEdsadc_SampleClockSource_internal : IfxEdsadc.h
  • IfxEdsadc_ServiceRequestFifolevel_1 : IfxEdsadc.h
  • IfxEdsadc_ServiceRequestFifolevel_2 : IfxEdsadc.h
  • IfxEdsadc_ServiceRequestFifolevel_3 : IfxEdsadc.h
  • IfxEdsadc_ServiceRequestFifolevel_4 : IfxEdsadc.h
  • IfxEdsadc_SleepMode_disable : IfxEdsadc.h
  • IfxEdsadc_SleepMode_enable : IfxEdsadc.h
  • IfxEdsadc_StepDetectionMode_lastInput : IfxEdsadc.h
  • IfxEdsadc_StepDetectionMode_secondlastInput : IfxEdsadc.h
  • IfxEdsadc_SupplyVoltageLevel_automaticControl : IfxEdsadc.h
  • IfxEdsadc_SupplyVoltageLevel_lowerVoltage : IfxEdsadc.h
  • IfxEdsadc_SupplyVoltageLevel_upperVoltage : IfxEdsadc.h
  • IfxEdsadc_SuspendMode_hard : IfxEdsadc.h
  • IfxEdsadc_SuspendMode_none : IfxEdsadc.h
  • IfxEdsadc_SuspendMode_soft : IfxEdsadc.h
  • IfxEdsadc_TimeStampCounterClockSelection_div1 : IfxEdsadc.h
  • IfxEdsadc_TimeStampCounterClockSelection_div2 : IfxEdsadc.h
  • IfxEdsadc_TimeStampCounterClockSelection_div4 : IfxEdsadc.h
  • IfxEdsadc_TimeStampCounterClockSelection_div8 : IfxEdsadc.h
  • IfxEdsadc_TimeStampCounterControl_off : IfxEdsadc.h
  • IfxEdsadc_TimeStampCounterControl_on : IfxEdsadc.h
  • IfxEdsadc_TimestampTrigger_eachEdge : IfxEdsadc.h
  • IfxEdsadc_TimestampTrigger_fallingEdge : IfxEdsadc.h
  • IfxEdsadc_TimestampTrigger_noTrigger : IfxEdsadc.h
  • IfxEdsadc_TimestampTrigger_risingEdge : IfxEdsadc.h
  • IfxEdsadc_TriggerInput_a : IfxEdsadc.h
  • IfxEdsadc_TriggerInput_b : IfxEdsadc.h
  • IfxEdsadc_TriggerInput_c : IfxEdsadc.h
  • IfxEdsadc_TriggerInput_d : IfxEdsadc.h
  • IfxEdsadc_TriggerInput_e : IfxEdsadc.h
  • IfxEdsadc_TriggerInput_f : IfxEdsadc.h
  • IfxEdsadc_TriggerInput_g : IfxEdsadc.h
  • IfxEdsadc_TriggerInput_h : IfxEdsadc.h
  • IfxEdsadc_TriggerInput_i : IfxEdsadc.h
  • IfxEdsadc_TriggerInput_j : IfxEdsadc.h
  • IfxEdsadc_TriggerInput_k : IfxEdsadc.h
  • IfxEdsadc_TriggerInput_l : IfxEdsadc.h
  • IfxEdsadc_TriggerInput_m : IfxEdsadc.h
  • IfxEdsadc_TriggerInput_n : IfxEdsadc.h
  • IfxEdsadc_TriggerInput_o : IfxEdsadc.h
  • IfxEdsadc_TriggerInput_p : IfxEdsadc.h
  • IfxEray_Baudrate_10 : IfxEray.h
  • IfxEray_Baudrate_2_5 : IfxEray.h
  • IfxEray_Baudrate_5 : IfxEray.h
  • IfxEray_BufferDirection_receive : IfxEray.h
  • IfxEray_BufferDirection_transmit : IfxEray.h
  • IfxEray_Channel_a : IfxEray.h
  • IfxEray_Channel_b : IfxEray.h
  • IfxEray_ClearErrorFlag_ccf : IfxEray.h
  • IfxEray_ClearErrorFlag_ccl : IfxEray.h
  • IfxEray_ClearErrorFlag_cna : IfxEray.h
  • IfxEray_ClearErrorFlag_eda : IfxEray.h
  • IfxEray_ClearErrorFlag_edb : IfxEray.h
  • IfxEray_ClearErrorFlag_eerr : IfxEray.h
  • IfxEray_ClearErrorFlag_efa : IfxEray.h
  • IfxEray_ClearErrorFlag_iiba : IfxEray.h
  • IfxEray_ClearErrorFlag_ioba : IfxEray.h
  • IfxEray_ClearErrorFlag_ltva : IfxEray.h
  • IfxEray_ClearErrorFlag_ltvb : IfxEray.h
  • IfxEray_ClearErrorFlag_mhf : IfxEray.h
  • IfxEray_ClearErrorFlag_pemc : IfxEray.h
  • IfxEray_ClearErrorFlag_rfo : IfxEray.h
  • IfxEray_ClearErrorFlag_sfbm : IfxEray.h
  • IfxEray_ClearErrorFlag_sfo : IfxEray.h
  • IfxEray_ClearErrorFlag_taba : IfxEray.h
  • IfxEray_ClearErrorFlag_tabb : IfxEray.h
  • IfxEray_ClearStatusFlag_cas : IfxEray.h
  • IfxEray_ClearStatusFlag_cycs : IfxEray.h
  • IfxEray_ClearStatusFlag_mbsi : IfxEray.h
  • IfxEray_ClearStatusFlag_mtsa : IfxEray.h
  • IfxEray_ClearStatusFlag_mtsb : IfxEray.h
  • IfxEray_ClearStatusFlag_nmvc : IfxEray.h
  • IfxEray_ClearStatusFlag_rfcl : IfxEray.h
  • IfxEray_ClearStatusFlag_rfne : IfxEray.h
  • IfxEray_ClearStatusFlag_rxi : IfxEray.h
  • IfxEray_ClearStatusFlag_sds : IfxEray.h
  • IfxEray_ClearStatusFlag_sucs : IfxEray.h
  • IfxEray_ClearStatusFlag_swe : IfxEray.h
  • IfxEray_ClearStatusFlag_ti0 : IfxEray.h
  • IfxEray_ClearStatusFlag_ti1 : IfxEray.h
  • IfxEray_ClearStatusFlag_tibc : IfxEray.h
  • IfxEray_ClearStatusFlag_tobc : IfxEray.h
  • IfxEray_ClearStatusFlag_txi : IfxEray.h
  • IfxEray_ClearStatusFlag_wst : IfxEray.h
  • IfxEray_ClearStatusFlag_wupa : IfxEray.h
  • IfxEray_ClearStatusFlag_wupb : IfxEray.h
  • IfxEray_ClockDivider_1 : IfxEray.h
  • IfxEray_ClockDivider_2 : IfxEray.h
  • IfxEray_ClockDivider_3 : IfxEray.h
  • IfxEray_ClockDivider_4 : IfxEray.h
  • IfxEray_ClockDivider_5 : IfxEray.h
  • IfxEray_ClockDivider_6 : IfxEray.h
  • IfxEray_ClockDivider_7 : IfxEray.h
  • IfxEray_ClockDivider_none : IfxEray.h
  • IfxEray_ExternalOffset_correctionAdded : IfxEray.h
  • IfxEray_ExternalOffset_correctionSubtracted : IfxEray.h
  • IfxEray_ExternalOffset_noCorrection : IfxEray.h
  • IfxEray_ExternalOffsetCorrection_0 : IfxEray.h
  • IfxEray_ExternalOffsetCorrection_1 : IfxEray.h
  • IfxEray_ExternalOffsetCorrection_2 : IfxEray.h
  • IfxEray_ExternalOffsetCorrection_3 : IfxEray.h
  • IfxEray_ExternalOffsetCorrection_4 : IfxEray.h
  • IfxEray_ExternalOffsetCorrection_5 : IfxEray.h
  • IfxEray_ExternalOffsetCorrection_6 : IfxEray.h
  • IfxEray_ExternalOffsetCorrection_7 : IfxEray.h
  • IfxEray_ExternalRate_correctionAdded : IfxEray.h
  • IfxEray_ExternalRate_correctionSubtracted : IfxEray.h
  • IfxEray_ExternalRate_noCorrection : IfxEray.h
  • IfxEray_ExternalRateCorrection_0 : IfxEray.h
  • IfxEray_ExternalRateCorrection_1 : IfxEray.h
  • IfxEray_ExternalRateCorrection_2 : IfxEray.h
  • IfxEray_ExternalRateCorrection_3 : IfxEray.h
  • IfxEray_ExternalRateCorrection_4 : IfxEray.h
  • IfxEray_ExternalRateCorrection_5 : IfxEray.h
  • IfxEray_ExternalRateCorrection_6 : IfxEray.h
  • IfxEray_ExternalRateCorrection_7 : IfxEray.h
  • IfxEray_IdleDynamicSlots_0 : IfxEray.h
  • IfxEray_IdleDynamicSlots_1 : IfxEray.h
  • IfxEray_IdleDynamicSlots_2 : IfxEray.h
  • IfxEray_Index_0 : IfxEray_cfg.h
  • IfxEray_Index_1 : IfxEray_cfg.h
  • IfxEray_Index_none : IfxEray_cfg.h
  • IfxEray_InterruptLine_0 : IfxEray.h
  • IfxEray_InterruptLine_1 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_10 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_11 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_12 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_13 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_14 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_15 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_16 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_2 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_3 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_4 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_5 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_6 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_7 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_8 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_9 : IfxEray.h
  • IfxEray_MaxSynchFrames_10 : IfxEray.h
  • IfxEray_MaxSynchFrames_11 : IfxEray.h
  • IfxEray_MaxSynchFrames_12 : IfxEray.h
  • IfxEray_MaxSynchFrames_13 : IfxEray.h
  • IfxEray_MaxSynchFrames_14 : IfxEray.h
  • IfxEray_MaxSynchFrames_15 : IfxEray.h
  • IfxEray_MaxSynchFrames_2 : IfxEray.h
  • IfxEray_MaxSynchFrames_3 : IfxEray.h
  • IfxEray_MaxSynchFrames_4 : IfxEray.h
  • IfxEray_MaxSynchFrames_5 : IfxEray.h
  • IfxEray_MaxSynchFrames_6 : IfxEray.h
  • IfxEray_MaxSynchFrames_7 : IfxEray.h
  • IfxEray_MaxSynchFrames_8 : IfxEray.h
  • IfxEray_MaxSynchFrames_9 : IfxEray.h
  • IfxEray_NodeId_a : IfxEray_cfg.h
  • IfxEray_NodeId_b : IfxEray_cfg.h
  • IfxEray_NodeId_none : IfxEray_cfg.h
  • IfxEray_PocCommand_allSlots : IfxEray.h
  • IfxEray_PocCommand_clearRam : IfxEray.h
  • IfxEray_PocCommand_coldStart : IfxEray.h
  • IfxEray_PocCommand_config : IfxEray.h
  • IfxEray_PocCommand_freeze : IfxEray.h
  • IfxEray_PocCommand_halt : IfxEray.h
  • IfxEray_PocCommand_monitor : IfxEray.h
  • IfxEray_PocCommand_notAccepted : IfxEray.h
  • IfxEray_PocCommand_ready : IfxEray.h
  • IfxEray_PocCommand_reset : IfxEray.h
  • IfxEray_PocCommand_run : IfxEray.h
  • IfxEray_PocCommand_sendMts : IfxEray.h
  • IfxEray_PocCommand_wakeup : IfxEray.h
  • IfxEray_PocState_coldStartListen : IfxEray.h
  • IfxEray_PocState_collisionResolution : IfxEray.h
  • IfxEray_PocState_config : IfxEray.h
  • IfxEray_PocState_consistencyCheck : IfxEray.h
  • IfxEray_PocState_defaultConfig : IfxEray.h
  • IfxEray_PocState_gap : IfxEray.h
  • IfxEray_PocState_halt : IfxEray.h
  • IfxEray_PocState_initializeSchedule : IfxEray.h
  • IfxEray_PocState_integrationCheck : IfxEray.h
  • IfxEray_PocState_integrationConsistencyCheck : IfxEray.h
  • IfxEray_PocState_integrationListen : IfxEray.h
  • IfxEray_PocState_join : IfxEray.h
  • IfxEray_PocState_monitor : IfxEray.h
  • IfxEray_PocState_normalActive : IfxEray.h
  • IfxEray_PocState_normalPassive : IfxEray.h
  • IfxEray_PocState_ready : IfxEray.h
  • IfxEray_PocState_startup : IfxEray.h
  • IfxEray_PocState_startupSucced : IfxEray.h
  • IfxEray_PocState_staruAborted : IfxEray.h
  • IfxEray_PocState_wakeupDetect : IfxEray.h
  • IfxEray_PocState_wakeupListen : IfxEray.h
  • IfxEray_PocState_wakeupSend : IfxEray.h
  • IfxEray_PocState_wakeupStandby : IfxEray.h
  • IfxEray_ReceiveChannel_a : IfxEray.h
  • IfxEray_ReceiveChannel_b : IfxEray.h
  • IfxEray_ReceiveChannel_both : IfxEray.h
  • IfxEray_ReceiveChannel_none : IfxEray.h
  • IfxEray_SleepMode_disable : IfxEray.h
  • IfxEray_SleepMode_enable : IfxEray.h
  • IfxEray_StrobePosition_4 : IfxEray.h
  • IfxEray_StrobePosition_5 : IfxEray.h
  • IfxEray_StrobePosition_6 : IfxEray.h
  • IfxEray_SuspendMode_hard : IfxEray.h
  • IfxEray_SuspendMode_none : IfxEray.h
  • IfxEray_SuspendMode_soft : IfxEray.h
  • IfxEray_TransmissionMode_continuous : IfxEray.h
  • IfxEray_TransmissionMode_singleShot : IfxEray.h
  • IfxEray_TransmissionSlotMode_all : IfxEray.h
  • IfxEray_TransmissionSlotMode_single : IfxEray.h
  • IfxEray_WakeupChannel_a : IfxEray.h
  • IfxEray_WakeupChannel_b : IfxEray.h
  • IfxEvadc_AnalogClockGenerationMode_synchronized : IfxEvadc.h
  • IfxEvadc_AnalogClockGenerationMode_unsynchronized : IfxEvadc.h
  • IfxEvadc_AnalogClockSynchronizationDelay_0 : IfxEvadc.h
  • IfxEvadc_AnalogClockSynchronizationDelay_1 : IfxEvadc.h
  • IfxEvadc_AnalogClockSynchronizationDelay_2 : IfxEvadc.h
  • IfxEvadc_AnalogClockSynchronizationDelay_3 : IfxEvadc.h
  • IfxEvadc_AnalogClockSynchronizationDelay_4 : IfxEvadc.h
  • IfxEvadc_AnalogClockSynchronizationDelay_5 : IfxEvadc.h
  • IfxEvadc_AnalogClockSynchronizationDelay_6 : IfxEvadc.h
  • IfxEvadc_AnalogClockSynchronizationDelay_7 : IfxEvadc.h
  • IfxEvadc_AnalogConverterMode_fastStandby : IfxEvadc.h
  • IfxEvadc_AnalogConverterMode_normalOperation : IfxEvadc.h
  • IfxEvadc_AnalogConverterMode_off : IfxEvadc.h
  • IfxEvadc_AnalogConverterMode_slowStandby : IfxEvadc.h
  • IfxEvadc_AnalogInputPrechargeControl_16Cycles : IfxEvadc.h
  • IfxEvadc_AnalogInputPrechargeControl_32cycles : IfxEvadc.h
  • IfxEvadc_AnalogInputPrechargeControl_8Cycles : IfxEvadc.h
  • IfxEvadc_AnalogInputPrechargeControl_noPrecharge : IfxEvadc.h
  • IfxEvadc_ArbitrationMode_0 : IfxEvadc.h
  • IfxEvadc_ArbitrationMode_1 : IfxEvadc.h
  • IfxEvadc_ArbitrationRounds_16_slots : IfxEvadc.h
  • IfxEvadc_ArbitrationRounds_20_slots : IfxEvadc.h
  • IfxEvadc_ArbitrationRounds_4_slots : IfxEvadc.h
  • IfxEvadc_ArbitrationRounds_8_slots : IfxEvadc.h
  • IfxEvadc_BoundaryExtension_fastCompareResult1 : IfxEvadc.h
  • IfxEvadc_BoundaryExtension_fastCompareResult10 : IfxEvadc.h
  • IfxEvadc_BoundaryExtension_fastCompareResult11 : IfxEvadc.h
  • IfxEvadc_BoundaryExtension_fastCompareResult12 : IfxEvadc.h
  • IfxEvadc_BoundaryExtension_fastCompareResult13 : IfxEvadc.h
  • IfxEvadc_BoundaryExtension_fastCompareResult14 : IfxEvadc.h
  • IfxEvadc_BoundaryExtension_fastCompareResult15 : IfxEvadc.h
  • IfxEvadc_BoundaryExtension_fastCompareResult2 : IfxEvadc.h
  • IfxEvadc_BoundaryExtension_fastCompareResult3 : IfxEvadc.h
  • IfxEvadc_BoundaryExtension_fastCompareResult4 : IfxEvadc.h
  • IfxEvadc_BoundaryExtension_fastCompareResult5 : IfxEvadc.h
  • IfxEvadc_BoundaryExtension_fastCompareResult6 : IfxEvadc.h
  • IfxEvadc_BoundaryExtension_fastCompareResult7 : IfxEvadc.h
  • IfxEvadc_BoundaryExtension_fastCompareResult8 : IfxEvadc.h
  • IfxEvadc_BoundaryExtension_fastCompareResult9 : IfxEvadc.h
  • IfxEvadc_BoundaryExtension_standard : IfxEvadc.h
  • IfxEvadc_BoundaryFlagActivationMode_0 : IfxEvadc.h
  • IfxEvadc_BoundaryFlagActivationMode_1 : IfxEvadc.h
  • IfxEvadc_BoundaryFlagInversionControl_direct : IfxEvadc.h
  • IfxEvadc_BoundaryFlagInversionControl_invert : IfxEvadc.h
  • IfxEvadc_BoundaryFlagNodePointer_commonBoundaryFlagOutput0 : IfxEvadc.h
  • IfxEvadc_BoundaryFlagNodePointer_commonBoundaryFlagOutput1 : IfxEvadc.h
  • IfxEvadc_BoundaryFlagNodePointer_commonBoundaryFlagOutput2 : IfxEvadc.h
  • IfxEvadc_BoundaryFlagNodePointer_commonBoundaryFlagOutput3 : IfxEvadc.h
  • IfxEvadc_BoundaryFlagNodePointer_disabled : IfxEvadc.h
  • IfxEvadc_BoundaryFlagNodePointer_sharedServiceRequestLine0 : IfxEvadc.h
  • IfxEvadc_BoundaryFlagNodePointer_sharedServiceRequestLine1 : IfxEvadc.h
  • IfxEvadc_BoundaryFlagNodePointer_sharedServiceRequestLine2 : IfxEvadc.h
  • IfxEvadc_BoundaryFlagNodePointer_sharedServiceRequestLine3 : IfxEvadc.h
  • IfxEvadc_BoundaryFlagSwControl_clear : IfxEvadc.h
  • IfxEvadc_BoundaryFlagSwControl_noAction : IfxEvadc.h
  • IfxEvadc_BoundaryFlagSwControl_set : IfxEvadc.h
  • IfxEvadc_BoundaryFlagSwControl_toggle : IfxEvadc.h
  • IfxEvadc_BoundarySelection_global0 : IfxEvadc.h
  • IfxEvadc_BoundarySelection_global1 : IfxEvadc.h
  • IfxEvadc_BoundarySelection_group0 : IfxEvadc.h
  • IfxEvadc_BoundarySelection_group1 : IfxEvadc.h
  • IfxEvadc_CalibrationSampleTimeControl_2 : IfxEvadc.h
  • IfxEvadc_CalibrationSampleTimeControl_4 : IfxEvadc.h
  • IfxEvadc_CalibrationSampleTimeControl_6 : IfxEvadc.h
  • IfxEvadc_CalibrationSampleTimeControl_8 : IfxEvadc.h
  • IfxEvadc_ChannelEventMode_aboveCompareValue : IfxEvadc.h
  • IfxEvadc_ChannelEventMode_aboveOrBelowCompareValue : IfxEvadc.h
  • IfxEvadc_ChannelEventMode_belowCompareValue : IfxEvadc.h
  • IfxEvadc_ChannelEventMode_never : IfxEvadc.h
  • IfxEvadc_ChannelId_0 : IfxEvadc.h
  • IfxEvadc_ChannelId_1 : IfxEvadc.h
  • IfxEvadc_ChannelId_10 : IfxEvadc.h
  • IfxEvadc_ChannelId_11 : IfxEvadc.h
  • IfxEvadc_ChannelId_12 : IfxEvadc.h
  • IfxEvadc_ChannelId_13 : IfxEvadc.h
  • IfxEvadc_ChannelId_14 : IfxEvadc.h
  • IfxEvadc_ChannelId_15 : IfxEvadc.h
  • IfxEvadc_ChannelId_2 : IfxEvadc.h
  • IfxEvadc_ChannelId_3 : IfxEvadc.h
  • IfxEvadc_ChannelId_4 : IfxEvadc.h
  • IfxEvadc_ChannelId_5 : IfxEvadc.h
  • IfxEvadc_ChannelId_6 : IfxEvadc.h
  • IfxEvadc_ChannelId_7 : IfxEvadc.h
  • IfxEvadc_ChannelId_8 : IfxEvadc.h
  • IfxEvadc_ChannelId_9 : IfxEvadc.h
  • IfxEvadc_ChannelId_none : IfxEvadc.h
  • IfxEvadc_ChannelNoiseReduction_level1 : IfxEvadc.h
  • IfxEvadc_ChannelNoiseReduction_level2 : IfxEvadc.h
  • IfxEvadc_ChannelNoiseReduction_level3 : IfxEvadc.h
  • IfxEvadc_ChannelNoiseReduction_standardConversion : IfxEvadc.h
  • IfxEvadc_ChannelNoiseReductionEMUX_level1 : IfxEvadc.h
  • IfxEvadc_ChannelNoiseReductionEMUX_level2 : IfxEvadc.h
  • IfxEvadc_ChannelNoiseReductionEMUX_level3 : IfxEvadc.h
  • IfxEvadc_ChannelNoiseReductionEMUX_standardConversion : IfxEvadc.h
  • IfxEvadc_ChannelReference_channel0 : IfxEvadc.h
  • IfxEvadc_ChannelReference_standard : IfxEvadc.h
  • IfxEvadc_ChannelResult_0 : IfxEvadc.h
  • IfxEvadc_ChannelResult_1 : IfxEvadc.h
  • IfxEvadc_ChannelResult_10 : IfxEvadc.h
  • IfxEvadc_ChannelResult_11 : IfxEvadc.h
  • IfxEvadc_ChannelResult_12 : IfxEvadc.h
  • IfxEvadc_ChannelResult_13 : IfxEvadc.h
  • IfxEvadc_ChannelResult_14 : IfxEvadc.h
  • IfxEvadc_ChannelResult_15 : IfxEvadc.h
  • IfxEvadc_ChannelResult_2 : IfxEvadc.h
  • IfxEvadc_ChannelResult_3 : IfxEvadc.h
  • IfxEvadc_ChannelResult_4 : IfxEvadc.h
  • IfxEvadc_ChannelResult_5 : IfxEvadc.h
  • IfxEvadc_ChannelResult_6 : IfxEvadc.h
  • IfxEvadc_ChannelResult_7 : IfxEvadc.h
  • IfxEvadc_ChannelResult_8 : IfxEvadc.h
  • IfxEvadc_ChannelResult_9 : IfxEvadc.h
  • IfxEvadc_ChannelSelectionStyle_binary : IfxEvadc.h
  • IfxEvadc_ChannelSelectionStyle_channelNumber : IfxEvadc.h
  • IfxEvadc_ClockDividerFactor_10 : IfxEvadc.h
  • IfxEvadc_ClockDividerFactor_11 : IfxEvadc.h
  • IfxEvadc_ClockDividerFactor_12 : IfxEvadc.h
  • IfxEvadc_ClockDividerFactor_13 : IfxEvadc.h
  • IfxEvadc_ClockDividerFactor_14 : IfxEvadc.h
  • IfxEvadc_ClockDividerFactor_15 : IfxEvadc.h
  • IfxEvadc_ClockDividerFactor_16 : IfxEvadc.h
  • IfxEvadc_ClockDividerFactor_17 : IfxEvadc.h
  • IfxEvadc_ClockDividerFactor_18 : IfxEvadc.h
  • IfxEvadc_ClockDividerFactor_19 : IfxEvadc.h
  • IfxEvadc_ClockDividerFactor_2 : IfxEvadc.h
  • IfxEvadc_ClockDividerFactor_20 : IfxEvadc.h
  • IfxEvadc_ClockDividerFactor_21 : IfxEvadc.h
  • IfxEvadc_ClockDividerFactor_22 : IfxEvadc.h
  • IfxEvadc_ClockDividerFactor_23 : IfxEvadc.h
  • IfxEvadc_ClockDividerFactor_24 : IfxEvadc.h
  • IfxEvadc_ClockDividerFactor_25 : IfxEvadc.h
  • IfxEvadc_ClockDividerFactor_26 : IfxEvadc.h
  • IfxEvadc_ClockDividerFactor_27 : IfxEvadc.h
  • IfxEvadc_ClockDividerFactor_28 : IfxEvadc.h
  • IfxEvadc_ClockDividerFactor_29 : IfxEvadc.h
  • IfxEvadc_ClockDividerFactor_3 : IfxEvadc.h
  • IfxEvadc_ClockDividerFactor_30 : IfxEvadc.h
  • IfxEvadc_ClockDividerFactor_31 : IfxEvadc.h
  • IfxEvadc_ClockDividerFactor_32 : IfxEvadc.h
  • IfxEvadc_ClockDividerFactor_4 : IfxEvadc.h
  • IfxEvadc_ClockDividerFactor_5 : IfxEvadc.h
  • IfxEvadc_ClockDividerFactor_6 : IfxEvadc.h
  • IfxEvadc_ClockDividerFactor_7 : IfxEvadc.h
  • IfxEvadc_ClockDividerFactor_8 : IfxEvadc.h
  • IfxEvadc_ClockDividerFactor_9 : IfxEvadc.h
  • IfxEvadc_ClockDividerFactor_maxFrequency : IfxEvadc.h
  • IfxEvadc_DataModificationMode_differenceMode : IfxEvadc.h
  • IfxEvadc_DataModificationMode_resultFilteringMode : IfxEvadc.h
  • IfxEvadc_DataModificationMode_standardDataReduction : IfxEvadc.h
  • IfxEvadc_DataReductionControlMode_0 : IfxEvadc.h
  • IfxEvadc_DataReductionControlMode_1 : IfxEvadc.h
  • IfxEvadc_DataReductionControlMode_10 : IfxEvadc.h
  • IfxEvadc_DataReductionControlMode_11 : IfxEvadc.h
  • IfxEvadc_DataReductionControlMode_12 : IfxEvadc.h
  • IfxEvadc_DataReductionControlMode_13 : IfxEvadc.h
  • IfxEvadc_DataReductionControlMode_14 : IfxEvadc.h
  • IfxEvadc_DataReductionControlMode_15 : IfxEvadc.h
  • IfxEvadc_DataReductionControlMode_2 : IfxEvadc.h
  • IfxEvadc_DataReductionControlMode_3 : IfxEvadc.h
  • IfxEvadc_DataReductionControlMode_4 : IfxEvadc.h
  • IfxEvadc_DataReductionControlMode_5 : IfxEvadc.h
  • IfxEvadc_DataReductionControlMode_6 : IfxEvadc.h
  • IfxEvadc_DataReductionControlMode_7 : IfxEvadc.h
  • IfxEvadc_DataReductionControlMode_8 : IfxEvadc.h
  • IfxEvadc_DataReductionControlMode_9 : IfxEvadc.h
  • IfxEvadc_EmuxCodingScheme_binary : IfxEvadc.h
  • IfxEvadc_EmuxCodingScheme_gray : IfxEvadc.h
  • IfxEvadc_EmuxInterface_0 : IfxEvadc.h
  • IfxEvadc_EmuxInterface_1 : IfxEvadc.h
  • IfxEvadc_EmuxSampleTimeControl_always : IfxEvadc.h
  • IfxEvadc_EmuxSampleTimeControl_settingChanges : IfxEvadc.h
  • IfxEvadc_EmuxSelectValue_0 : IfxEvadc.h
  • IfxEvadc_EmuxSelectValue_1 : IfxEvadc.h
  • IfxEvadc_EmuxSelectValue_2 : IfxEvadc.h
  • IfxEvadc_EmuxSelectValue_3 : IfxEvadc.h
  • IfxEvadc_EmuxSelectValue_4 : IfxEvadc.h
  • IfxEvadc_EmuxSelectValue_5 : IfxEvadc.h
  • IfxEvadc_EmuxSelectValue_6 : IfxEvadc.h
  • IfxEvadc_EmuxSelectValue_7 : IfxEvadc.h
  • IfxEvadc_ExternalMultiplexerMode_sequence : IfxEvadc.h
  • IfxEvadc_ExternalMultiplexerMode_singleStep : IfxEvadc.h
  • IfxEvadc_ExternalMultiplexerMode_softwareControl : IfxEvadc.h
  • IfxEvadc_ExternalMultiplexerMode_steady : IfxEvadc.h
  • IfxEvadc_ExternalTriggerPolarity_direct : IfxEvadc.h
  • IfxEvadc_ExternalTriggerPolarity_inverted : IfxEvadc.h
  • IfxEvadc_FastCompareAnalogClockSynchronizationDelay_0 : IfxEvadc.h
  • IfxEvadc_FastCompareAnalogClockSynchronizationDelay_1 : IfxEvadc.h
  • IfxEvadc_FastCompareAnalogClockSynchronizationDelay_2 : IfxEvadc.h
  • IfxEvadc_FastCompareAnalogClockSynchronizationDelay_3 : IfxEvadc.h
  • IfxEvadc_FastCompareAnalogConverterControl_normal : IfxEvadc.h
  • IfxEvadc_FastCompareAnalogConverterControl_off : IfxEvadc.h
  • IfxEvadc_FastCompareAutomaticUpdate_alternateValue : IfxEvadc.h
  • IfxEvadc_FastCompareAutomaticUpdate_analogSource : IfxEvadc.h
  • IfxEvadc_FastCompareAutomaticUpdate_rampCounter : IfxEvadc.h
  • IfxEvadc_FastCompareAutomaticUpdate_sw : IfxEvadc.h
  • IfxEvadc_FastCompareRunControl_alwaysRun : IfxEvadc.h
  • IfxEvadc_FastCompareRunControl_stop : IfxEvadc.h
  • IfxEvadc_FastCompareServiceRequestGeneration_newResult : IfxEvadc.h
  • IfxEvadc_FastCompareServiceRequestGeneration_newValue : IfxEvadc.h
  • IfxEvadc_FastCompareServiceRequestGeneration_off : IfxEvadc.h
  • IfxEvadc_FastCompareServiceRequestGeneration_rampEnd : IfxEvadc.h
  • IfxEvadc_FifoMode_fifoStructure : IfxEvadc.h
  • IfxEvadc_FifoMode_maximumMode : IfxEvadc.h
  • IfxEvadc_FifoMode_minimumMode : IfxEvadc.h
  • IfxEvadc_FifoMode_seperateResultRegister : IfxEvadc.h
  • IfxEvadc_GateOperatingMode_alternateValueMode : IfxEvadc.h
  • IfxEvadc_GateOperatingMode_lockBoundaryFlag : IfxEvadc.h
  • IfxEvadc_GateOperatingMode_noGateFunction : IfxEvadc.h
  • IfxEvadc_GatingMode_always : IfxEvadc.h
  • IfxEvadc_GatingMode_disabled : IfxEvadc.h
  • IfxEvadc_GatingMode_gatingHigh : IfxEvadc.h
  • IfxEvadc_GatingMode_gatingLow : IfxEvadc.h
  • IfxEvadc_GatingSource_0 : IfxEvadc.h
  • IfxEvadc_GatingSource_1 : IfxEvadc.h
  • IfxEvadc_GatingSource_10 : IfxEvadc.h
  • IfxEvadc_GatingSource_11 : IfxEvadc.h
  • IfxEvadc_GatingSource_12 : IfxEvadc.h
  • IfxEvadc_GatingSource_13 : IfxEvadc.h
  • IfxEvadc_GatingSource_14 : IfxEvadc.h
  • IfxEvadc_GatingSource_15 : IfxEvadc.h
  • IfxEvadc_GatingSource_2 : IfxEvadc.h
  • IfxEvadc_GatingSource_3 : IfxEvadc.h
  • IfxEvadc_GatingSource_4 : IfxEvadc.h
  • IfxEvadc_GatingSource_5 : IfxEvadc.h
  • IfxEvadc_GatingSource_6 : IfxEvadc.h
  • IfxEvadc_GatingSource_7 : IfxEvadc.h
  • IfxEvadc_GatingSource_8 : IfxEvadc.h
  • IfxEvadc_GatingSource_9 : IfxEvadc.h
  • IfxEvadc_GroupId_0 : IfxEvadc_cfg.h
  • IfxEvadc_GroupId_1 : IfxEvadc_cfg.h
  • IfxEvadc_GroupId_10 : IfxEvadc_cfg.h
  • IfxEvadc_GroupId_11 : IfxEvadc_cfg.h
  • IfxEvadc_GroupId_12 : IfxEvadc_cfg.h
  • IfxEvadc_GroupId_13 : IfxEvadc_cfg.h
  • IfxEvadc_GroupId_14 : IfxEvadc_cfg.h
  • IfxEvadc_GroupId_15 : IfxEvadc_cfg.h
  • IfxEvadc_GroupId_2 : IfxEvadc_cfg.h
  • IfxEvadc_GroupId_3 : IfxEvadc_cfg.h
  • IfxEvadc_GroupId_4 : IfxEvadc_cfg.h
  • IfxEvadc_GroupId_5 : IfxEvadc_cfg.h
  • IfxEvadc_GroupId_6 : IfxEvadc_cfg.h
  • IfxEvadc_GroupId_7 : IfxEvadc_cfg.h
  • IfxEvadc_GroupId_8 : IfxEvadc_cfg.h
  • IfxEvadc_GroupId_9 : IfxEvadc_cfg.h
  • IfxEvadc_GroupId_global0 : IfxEvadc_cfg.h
  • IfxEvadc_GroupId_global1 : IfxEvadc_cfg.h
  • IfxEvadc_IdlePrecharge_currentLevel : IfxEvadc.h
  • IfxEvadc_IdlePrecharge_referenceBy2 : IfxEvadc.h
  • IfxEvadc_InputClasses_global0 : IfxEvadc.h
  • IfxEvadc_InputClasses_global1 : IfxEvadc.h
  • IfxEvadc_InputClasses_group0 : IfxEvadc.h
  • IfxEvadc_InputClasses_group1 : IfxEvadc.h
  • IfxEvadc_LimitCheck_always : IfxEvadc.h
  • IfxEvadc_LimitCheck_eventIfInArea : IfxEvadc.h
  • IfxEvadc_LimitCheck_eventIfOutsideArea : IfxEvadc.h
  • IfxEvadc_LimitCheck_noCheck : IfxEvadc.h
  • IfxEvadc_MsbConversionTime_doubleClockCycle : IfxEvadc.h
  • IfxEvadc_MsbConversionTime_singleClockCycle : IfxEvadc.h
  • IfxEvadc_Protection_channelControl0 : IfxEvadc.h
  • IfxEvadc_Protection_channelControl1 : IfxEvadc.h
  • IfxEvadc_Protection_channelControl10 : IfxEvadc.h
  • IfxEvadc_Protection_channelControl11 : IfxEvadc.h
  • IfxEvadc_Protection_channelControl12 : IfxEvadc.h
  • IfxEvadc_Protection_channelControl13 : IfxEvadc.h
  • IfxEvadc_Protection_channelControl14 : IfxEvadc.h
  • IfxEvadc_Protection_channelControl2 : IfxEvadc.h
  • IfxEvadc_Protection_channelControl3 : IfxEvadc.h
  • IfxEvadc_Protection_channelControl4 : IfxEvadc.h
  • IfxEvadc_Protection_channelControl5 : IfxEvadc.h
  • IfxEvadc_Protection_channelControl6 : IfxEvadc.h
  • IfxEvadc_Protection_channelControl7 : IfxEvadc.h
  • IfxEvadc_Protection_channelControl8 : IfxEvadc.h
  • IfxEvadc_Protection_channelControl9 : IfxEvadc.h
  • IfxEvadc_Protection_externalMultiplexer : IfxEvadc.h
  • IfxEvadc_Protection_globalConfig : IfxEvadc.h
  • IfxEvadc_Protection_initFastCompareChannel0 : IfxEvadc.h
  • IfxEvadc_Protection_initFastCompareChannel1 : IfxEvadc.h
  • IfxEvadc_Protection_initFastCompareChannel2 : IfxEvadc.h
  • IfxEvadc_Protection_initFastCompareChannel3 : IfxEvadc.h
  • IfxEvadc_Protection_initFastCompareChannel4 : IfxEvadc.h
  • IfxEvadc_Protection_initFastCompareChannel5 : IfxEvadc.h
  • IfxEvadc_Protection_initFastCompareChannel6 : IfxEvadc.h
  • IfxEvadc_Protection_initFastCompareChannel7 : IfxEvadc.h
  • IfxEvadc_Protection_initGroup0 : IfxEvadc.h
  • IfxEvadc_Protection_initGroup1 : IfxEvadc.h
  • IfxEvadc_Protection_initGroup10 : IfxEvadc.h
  • IfxEvadc_Protection_initGroup11 : IfxEvadc.h
  • IfxEvadc_Protection_initGroup12 : IfxEvadc.h
  • IfxEvadc_Protection_initGroup13 : IfxEvadc.h
  • IfxEvadc_Protection_initGroup14 : IfxEvadc.h
  • IfxEvadc_Protection_initGroup2 : IfxEvadc.h
  • IfxEvadc_Protection_initGroup3 : IfxEvadc.h
  • IfxEvadc_Protection_initGroup4 : IfxEvadc.h
  • IfxEvadc_Protection_initGroup5 : IfxEvadc.h
  • IfxEvadc_Protection_initGroup6 : IfxEvadc.h
  • IfxEvadc_Protection_initGroup7 : IfxEvadc.h
  • IfxEvadc_Protection_initGroup8 : IfxEvadc.h
  • IfxEvadc_Protection_initGroup9 : IfxEvadc.h
  • IfxEvadc_Protection_resultRegisterGroup0 : IfxEvadc.h
  • IfxEvadc_Protection_resultRegisterGroup1 : IfxEvadc.h
  • IfxEvadc_Protection_resultRegisterGroup10 : IfxEvadc.h
  • IfxEvadc_Protection_resultRegisterGroup11 : IfxEvadc.h
  • IfxEvadc_Protection_resultRegisterGroup12 : IfxEvadc.h
  • IfxEvadc_Protection_resultRegisterGroup13 : IfxEvadc.h
  • IfxEvadc_Protection_resultRegisterGroup14 : IfxEvadc.h
  • IfxEvadc_Protection_resultRegisterGroup2 : IfxEvadc.h
  • IfxEvadc_Protection_resultRegisterGroup3 : IfxEvadc.h
  • IfxEvadc_Protection_resultRegisterGroup4 : IfxEvadc.h
  • IfxEvadc_Protection_resultRegisterGroup5 : IfxEvadc.h
  • IfxEvadc_Protection_resultRegisterGroup6 : IfxEvadc.h
  • IfxEvadc_Protection_resultRegisterGroup7 : IfxEvadc.h
  • IfxEvadc_Protection_resultRegisterGroup8 : IfxEvadc.h
  • IfxEvadc_Protection_resultRegisterGroup9 : IfxEvadc.h
  • IfxEvadc_Protection_serviceGroup0 : IfxEvadc.h
  • IfxEvadc_Protection_serviceGroup1 : IfxEvadc.h
  • IfxEvadc_Protection_serviceGroup10 : IfxEvadc.h
  • IfxEvadc_Protection_serviceGroup11 : IfxEvadc.h
  • IfxEvadc_Protection_serviceGroup12 : IfxEvadc.h
  • IfxEvadc_Protection_serviceGroup13 : IfxEvadc.h
  • IfxEvadc_Protection_serviceGroup14 : IfxEvadc.h
  • IfxEvadc_Protection_serviceGroup2 : IfxEvadc.h
  • IfxEvadc_Protection_serviceGroup3 : IfxEvadc.h
  • IfxEvadc_Protection_serviceGroup4 : IfxEvadc.h
  • IfxEvadc_Protection_serviceGroup5 : IfxEvadc.h
  • IfxEvadc_Protection_serviceGroup6 : IfxEvadc.h
  • IfxEvadc_Protection_serviceGroup7 : IfxEvadc.h
  • IfxEvadc_Protection_serviceGroup8 : IfxEvadc.h
  • IfxEvadc_Protection_serviceGroup9 : IfxEvadc.h
  • IfxEvadc_Protection_testFunction : IfxEvadc.h
  • IfxEvadc_RampDirection_down : IfxEvadc.h
  • IfxEvadc_RampDirection_up : IfxEvadc.h
  • IfxEvadc_RampRunControl_1 : IfxEvadc.h
  • IfxEvadc_RampRunControl_2 : IfxEvadc.h
  • IfxEvadc_RampRunControl_3 : IfxEvadc.h
  • IfxEvadc_RampRunControl_stop : IfxEvadc.h
  • IfxEvadc_ReferencePrechargeControl_singleClockPeriod : IfxEvadc.h
  • IfxEvadc_ReferencePrechargeControl_singleClockPhase : IfxEvadc.h
  • IfxEvadc_RequestSlotPriority_high : IfxEvadc.h
  • IfxEvadc_RequestSlotPriority_highest : IfxEvadc.h
  • IfxEvadc_RequestSlotPriority_low : IfxEvadc.h
  • IfxEvadc_RequestSlotPriority_lowest : IfxEvadc.h
  • IfxEvadc_RequestSlotStartMode_cancelInjectRepeat : IfxEvadc.h
  • IfxEvadc_RequestSlotStartMode_waitForStart : IfxEvadc.h
  • IfxEvadc_RequestSource_queue0 : IfxEvadc.h
  • IfxEvadc_RequestSource_queue1 : IfxEvadc.h
  • IfxEvadc_RequestSource_queue2 : IfxEvadc.h
  • IfxEvadc_SampleSynchronization_off : IfxEvadc.h
  • IfxEvadc_SampleSynchronization_synchronizeSampleTiming : IfxEvadc.h
  • IfxEvadc_SleepMode_disable : IfxEvadc.h
  • IfxEvadc_SleepMode_enable : IfxEvadc.h
  • IfxEvadc_SpreadEarlySamplePointEMUXConversionsMode_nominal : IfxEvadc.h
  • IfxEvadc_SpreadEarlySamplePointEMUXConversionsMode_spread : IfxEvadc.h
  • IfxEvadc_SpreadEarlySamplePointStandardConversionsMode_nominal : IfxEvadc.h
  • IfxEvadc_SpreadEarlySamplePointStandardConversionsMode_spread : IfxEvadc.h
  • IfxEvadc_SrcNr_group0 : IfxEvadc.h
  • IfxEvadc_SrcNr_group1 : IfxEvadc.h
  • IfxEvadc_SrcNr_group2 : IfxEvadc.h
  • IfxEvadc_SrcNr_group3 : IfxEvadc.h
  • IfxEvadc_SrcNr_shared0 : IfxEvadc.h
  • IfxEvadc_SrcNr_shared1 : IfxEvadc.h
  • IfxEvadc_SrcNr_shared2 : IfxEvadc.h
  • IfxEvadc_SrcNr_shared3 : IfxEvadc.h
  • IfxEvadc_StartupCalibration_initiate : IfxEvadc.h
  • IfxEvadc_StartupCalibration_noAction : IfxEvadc.h
  • IfxEvadc_Status_channelsStillPending : IfxEvadc.h
  • IfxEvadc_Status_invalidChannel : IfxEvadc.h
  • IfxEvadc_Status_invalidGroup : IfxEvadc.h
  • IfxEvadc_Status_noAccess : IfxEvadc.h
  • IfxEvadc_Status_noError : IfxEvadc.h
  • IfxEvadc_Status_notInitialised : IfxEvadc.h
  • IfxEvadc_Status_queueFull : IfxEvadc.h
  • IfxEvadc_SupplyVoltageLevelControl_automaticControl : IfxEvadc.h
  • IfxEvadc_SupplyVoltageLevelControl_lowerVoltage : IfxEvadc.h
  • IfxEvadc_SupplyVoltageLevelControl_upperVoltage : IfxEvadc.h
  • IfxEvadc_SuspendMode_hard : IfxEvadc.h
  • IfxEvadc_SuspendMode_none : IfxEvadc.h
  • IfxEvadc_SuspendMode_soft : IfxEvadc.h
  • IfxEvadc_TriggerMode_noExternalTrigger : IfxEvadc.h
  • IfxEvadc_TriggerMode_uponAnyEdge : IfxEvadc.h
  • IfxEvadc_TriggerMode_uponFallingEdge : IfxEvadc.h
  • IfxEvadc_TriggerMode_uponRisingEdge : IfxEvadc.h
  • IfxEvadc_TriggerOperatingMode_anyEdge : IfxEvadc.h
  • IfxEvadc_TriggerOperatingMode_fallingEdge : IfxEvadc.h
  • IfxEvadc_TriggerOperatingMode_noExternalTrigger : IfxEvadc.h
  • IfxEvadc_TriggerOperatingMode_risingEdge : IfxEvadc.h
  • IfxEvadc_TriggerSource_0 : IfxEvadc.h
  • IfxEvadc_TriggerSource_1 : IfxEvadc.h
  • IfxEvadc_TriggerSource_10 : IfxEvadc.h
  • IfxEvadc_TriggerSource_11 : IfxEvadc.h
  • IfxEvadc_TriggerSource_12 : IfxEvadc.h
  • IfxEvadc_TriggerSource_13 : IfxEvadc.h
  • IfxEvadc_TriggerSource_14 : IfxEvadc.h
  • IfxEvadc_TriggerSource_15 : IfxEvadc.h
  • IfxEvadc_TriggerSource_2 : IfxEvadc.h
  • IfxEvadc_TriggerSource_3 : IfxEvadc.h
  • IfxEvadc_TriggerSource_4 : IfxEvadc.h
  • IfxEvadc_TriggerSource_5 : IfxEvadc.h
  • IfxEvadc_TriggerSource_6 : IfxEvadc.h
  • IfxEvadc_TriggerSource_7 : IfxEvadc.h
  • IfxEvadc_TriggerSource_8 : IfxEvadc.h
  • IfxEvadc_TriggerSource_9 : IfxEvadc.h
  • IfxEvadc_WaitForRead_enabled : IfxEvadc.h
  • IfxEvadc_WaitForRead_overwriteMode : IfxEvadc.h
  • IfxFce_CrcChannel_0 : IfxFce.h
  • IfxFce_CrcChannel_1 : IfxFce.h
  • IfxFce_CrcChannel_2 : IfxFce.h
  • IfxFce_CrcChannel_3 : IfxFce.h
  • IfxFce_CrcChannel_4 : IfxFce.h
  • IfxFce_CrcChannel_5 : IfxFce.h
  • IfxFce_CrcChannel_6 : IfxFce.h
  • IfxFce_CrcChannel_7 : IfxFce.h
  • IfxFce_CrcKernel_0 : IfxFce.h
  • IfxFce_CrcKernel_1 : IfxFce.h
  • IfxFce_CrcKernel_2 : IfxFce.h
  • IfxFce_CrcKernel_3 : IfxFce.h
  • IfxFlash_FlashType_D0 : IfxFlash_cfg.h
  • IfxFlash_FlashType_D1 : IfxFlash_cfg.h
  • IfxFlash_FlashType_Fa : IfxFlash_cfg.h
  • IfxFlash_FlashType_P0 : IfxFlash_cfg.h
  • IfxFlash_FlashType_P1 : IfxFlash_cfg.h
  • IfxFlash_FlashType_P2 : IfxFlash_cfg.h
  • IfxFlash_FlashType_P3 : IfxFlash_cfg.h
  • IfxFlash_UcbType_ucbDebug : IfxFlash_cfg.h
  • IfxFlash_UcbType_ucbDflash : IfxFlash_cfg.h
  • IfxFlash_UcbType_ucbPflash : IfxFlash_cfg.h
  • IfxFlash_UcbType_ucbRetest : IfxFlash_cfg.h
  • IfxGeth_DmaBurstLength_0 : IfxGeth.h
  • IfxGeth_DmaBurstLength_1 : IfxGeth.h
  • IfxGeth_DmaBurstLength_16 : IfxGeth.h
  • IfxGeth_DmaBurstLength_2 : IfxGeth.h
  • IfxGeth_DmaBurstLength_32 : IfxGeth.h
  • IfxGeth_DmaBurstLength_4 : IfxGeth.h
  • IfxGeth_DmaBurstLength_8 : IfxGeth.h
  • IfxGeth_DmaChannel_0 : IfxGeth.h
  • IfxGeth_DmaChannel_1 : IfxGeth.h
  • IfxGeth_DmaChannel_2 : IfxGeth.h
  • IfxGeth_DmaChannel_3 : IfxGeth.h
  • IfxGeth_DmaInterruptFlag_abnormalInterruptSummary : IfxGeth.h
  • IfxGeth_DmaInterruptFlag_contextDescriptorError : IfxGeth.h
  • IfxGeth_DmaInterruptFlag_earlyReceiveInterrupt : IfxGeth.h
  • IfxGeth_DmaInterruptFlag_earlyTransmitInterrupt : IfxGeth.h
  • IfxGeth_DmaInterruptFlag_fatalBusError : IfxGeth.h
  • IfxGeth_DmaInterruptFlag_normalInterruptSummary : IfxGeth.h
  • IfxGeth_DmaInterruptFlag_receiveBufferUnavailable : IfxGeth.h
  • IfxGeth_DmaInterruptFlag_receiveInterrupt : IfxGeth.h
  • IfxGeth_DmaInterruptFlag_receiveStopped : IfxGeth.h
  • IfxGeth_DmaInterruptFlag_receiveWatchdogTimeout : IfxGeth.h
  • IfxGeth_DmaInterruptFlag_transmitBufferUnavailable : IfxGeth.h
  • IfxGeth_DmaInterruptFlag_transmitInterrupt : IfxGeth.h
  • IfxGeth_DmaInterruptFlag_transmitStopped : IfxGeth.h
  • IfxGeth_DuplexMode_fullDuplex : IfxGeth.h
  • IfxGeth_DuplexMode_halfDuplex : IfxGeth.h
  • IfxGeth_Index_0 : IfxGeth_cfg.h
  • IfxGeth_Index_none : IfxGeth_cfg.h
  • IfxGeth_LineSpeed_1000Mbps : IfxGeth.h
  • IfxGeth_LineSpeed_100Mbps : IfxGeth.h
  • IfxGeth_LineSpeed_10Mbps : IfxGeth.h
  • IfxGeth_LineSpeed_2500Mbps : IfxGeth.h
  • IfxGeth_LoopbackMode_disable : IfxGeth.h
  • IfxGeth_LoopbackMode_enable : IfxGeth.h
  • IfxGeth_MtlInterruptFlag_averageBitsPerSlot : IfxGeth.h
  • IfxGeth_MtlInterruptFlag_rxQueueOverflow : IfxGeth.h
  • IfxGeth_MtlInterruptFlag_txQueueUnderflow : IfxGeth.h
  • IfxGeth_MtlQueue_0 : IfxGeth.h
  • IfxGeth_MtlQueue_1 : IfxGeth.h
  • IfxGeth_MtlQueue_2 : IfxGeth.h
  • IfxGeth_MtlQueue_3 : IfxGeth.h
  • IfxGeth_PhyInterfaceMode_mii : IfxGeth.h
  • IfxGeth_PhyInterfaceMode_rgmii : IfxGeth.h
  • IfxGeth_PhyInterfaceMode_rmii : IfxGeth.h
  • IfxGeth_PreambleLength_3Bytes : IfxGeth.h
  • IfxGeth_PreambleLength_5Bytes : IfxGeth.h
  • IfxGeth_PreambleLength_7Bytes : IfxGeth.h
  • IfxGeth_QueueSize_1024Bytes : IfxGeth.h
  • IfxGeth_QueueSize_1280Bytes : IfxGeth.h
  • IfxGeth_QueueSize_1536Bytes : IfxGeth.h
  • IfxGeth_QueueSize_1792Bytes : IfxGeth.h
  • IfxGeth_QueueSize_2048Bytes : IfxGeth.h
  • IfxGeth_QueueSize_2304Bytes : IfxGeth.h
  • IfxGeth_QueueSize_2560Bytes : IfxGeth.h
  • IfxGeth_QueueSize_256Bytes : IfxGeth.h
  • IfxGeth_QueueSize_2816Bytes : IfxGeth.h
  • IfxGeth_QueueSize_3072Bytes : IfxGeth.h
  • IfxGeth_QueueSize_3328Bytes : IfxGeth.h
  • IfxGeth_QueueSize_3584Bytes : IfxGeth.h
  • IfxGeth_QueueSize_3840Bytes : IfxGeth.h
  • IfxGeth_QueueSize_4096Bytes : IfxGeth.h
  • IfxGeth_QueueSize_4352Bytes : IfxGeth.h
  • IfxGeth_QueueSize_4608Bytes : IfxGeth.h
  • IfxGeth_QueueSize_4864Bytes : IfxGeth.h
  • IfxGeth_QueueSize_5120Bytes : IfxGeth.h
  • IfxGeth_QueueSize_512Bytes : IfxGeth.h
  • IfxGeth_QueueSize_5376Bytes : IfxGeth.h
  • IfxGeth_QueueSize_5632Bytes : IfxGeth.h
  • IfxGeth_QueueSize_5888Bytes : IfxGeth.h
  • IfxGeth_QueueSize_6144Bytes : IfxGeth.h
  • IfxGeth_QueueSize_6400Bytes : IfxGeth.h
  • IfxGeth_QueueSize_6656Bytes : IfxGeth.h
  • IfxGeth_QueueSize_6912Bytes : IfxGeth.h
  • IfxGeth_QueueSize_7168Bytes : IfxGeth.h
  • IfxGeth_QueueSize_7424Bytes : IfxGeth.h
  • IfxGeth_QueueSize_7680Bytes : IfxGeth.h
  • IfxGeth_QueueSize_768Bytes : IfxGeth.h
  • IfxGeth_QueueSize_7936Bytes : IfxGeth.h
  • IfxGeth_QueueSize_8192Bytes : IfxGeth.h
  • IfxGeth_RxArbitrationAlgorithm_sp : IfxGeth.h
  • IfxGeth_RxArbitrationAlgorithm_wsp : IfxGeth.h
  • IfxGeth_RxDmaChannel_0 : IfxGeth.h
  • IfxGeth_RxDmaChannel_1 : IfxGeth.h
  • IfxGeth_RxDmaChannel_2 : IfxGeth.h
  • IfxGeth_RxDmaChannel_3 : IfxGeth.h
  • IfxGeth_RxMtlQueue_0 : IfxGeth.h
  • IfxGeth_RxMtlQueue_1 : IfxGeth.h
  • IfxGeth_RxMtlQueue_2 : IfxGeth.h
  • IfxGeth_RxMtlQueue_3 : IfxGeth.h
  • IfxGeth_ServiceRequest_0 : IfxGeth.h
  • IfxGeth_ServiceRequest_1 : IfxGeth.h
  • IfxGeth_ServiceRequest_2 : IfxGeth.h
  • IfxGeth_ServiceRequest_3 : IfxGeth.h
  • IfxGeth_ServiceRequest_4 : IfxGeth.h
  • IfxGeth_ServiceRequest_5 : IfxGeth.h
  • IfxGeth_ServiceRequest_6 : IfxGeth.h
  • IfxGeth_ServiceRequest_7 : IfxGeth.h
  • IfxGeth_ServiceRequest_8 : IfxGeth.h
  • IfxGeth_ServiceRequest_9 : IfxGeth.h
  • IfxGeth_TxDmaChannel_0 : IfxGeth.h
  • IfxGeth_TxDmaChannel_1 : IfxGeth.h
  • IfxGeth_TxDmaChannel_2 : IfxGeth.h
  • IfxGeth_TxDmaChannel_3 : IfxGeth.h
  • IfxGeth_TxMtlQueue_0 : IfxGeth.h
  • IfxGeth_TxMtlQueue_1 : IfxGeth.h
  • IfxGeth_TxMtlQueue_2 : IfxGeth.h
  • IfxGeth_TxMtlQueue_3 : IfxGeth.h
  • IfxGeth_TxSchedulingAlgorithm_sp : IfxGeth.h
  • IfxGeth_TxSchedulingAlgorithm_wrr : IfxGeth.h
  • IfxGpt12_CaptureInput_A : IfxGpt12.h
  • IfxGpt12_CaptureInput_B : IfxGpt12.h
  • IfxGpt12_CaptureInput_C : IfxGpt12.h
  • IfxGpt12_CaptureInput_D : IfxGpt12.h
  • IfxGpt12_CaptureInputMode_bothEdgesTxIN : IfxGpt12.h
  • IfxGpt12_CaptureInputMode_fallingEdgeTxIN : IfxGpt12.h
  • IfxGpt12_CaptureInputMode_none : IfxGpt12.h
  • IfxGpt12_CaptureInputMode_risingEdgeTxIN : IfxGpt12.h
  • IfxGpt12_CaptureTrigger_capin : IfxGpt12.h
  • IfxGpt12_CaptureTrigger_t3inOrT3EUD : IfxGpt12.h
  • IfxGpt12_CaptureTriggerMode_disabled : IfxGpt12.h
  • IfxGpt12_CaptureTriggerMode_fallingEdge : IfxGpt12.h
  • IfxGpt12_CaptureTriggerMode_randomEdge : IfxGpt12.h
  • IfxGpt12_CaptureTriggerMode_risingEdge : IfxGpt12.h
  • IfxGpt12_CounterInputMode_bothEdgesTxIN : IfxGpt12.h
  • IfxGpt12_CounterInputMode_bothEdgesTxOTL : IfxGpt12.h
  • IfxGpt12_CounterInputMode_counterDisabled : IfxGpt12.h
  • IfxGpt12_CounterInputMode_fallingEdgeTxIN : IfxGpt12.h
  • IfxGpt12_CounterInputMode_fallingEdgeTxOTL : IfxGpt12.h
  • IfxGpt12_CounterInputMode_risingEdgeTxIN : IfxGpt12.h
  • IfxGpt12_CounterInputMode_risingEdgeTxOTL : IfxGpt12.h
  • IfxGpt12_EudInput_A : IfxGpt12.h
  • IfxGpt12_EudInput_B : IfxGpt12.h
  • IfxGpt12_EudInput_C : IfxGpt12.h
  • IfxGpt12_EudInput_D : IfxGpt12.h
  • IfxGpt12_Gpt1BlockPrescaler_16 : IfxGpt12.h
  • IfxGpt12_Gpt1BlockPrescaler_32 : IfxGpt12.h
  • IfxGpt12_Gpt1BlockPrescaler_4 : IfxGpt12.h
  • IfxGpt12_Gpt1BlockPrescaler_8 : IfxGpt12.h
  • IfxGpt12_Gpt2BlockPrescaler_16 : IfxGpt12.h
  • IfxGpt12_Gpt2BlockPrescaler_2 : IfxGpt12.h
  • IfxGpt12_Gpt2BlockPrescaler_4 : IfxGpt12.h
  • IfxGpt12_Gpt2BlockPrescaler_8 : IfxGpt12.h
  • IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxEUD : IfxGpt12.h
  • IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxIN : IfxGpt12.h
  • IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxINOrTxEUD : IfxGpt12.h
  • IfxGpt12_IncrementalInterfaceInputMode_stopCounterTx : IfxGpt12.h
  • IfxGpt12_Input_A : IfxGpt12.h
  • IfxGpt12_Input_B : IfxGpt12.h
  • IfxGpt12_Input_C : IfxGpt12.h
  • IfxGpt12_Input_D : IfxGpt12.h
  • IfxGpt12_Mode_capture : IfxGpt12.h
  • IfxGpt12_Mode_counter : IfxGpt12.h
  • IfxGpt12_Mode_highGatedTimer : IfxGpt12.h
  • IfxGpt12_Mode_incrementalInterfaceEdgeDetection : IfxGpt12.h
  • IfxGpt12_Mode_incrementalInterfaceRotationDetection : IfxGpt12.h
  • IfxGpt12_Mode_lowGatedTimer : IfxGpt12.h
  • IfxGpt12_Mode_reload : IfxGpt12.h
  • IfxGpt12_Mode_timer : IfxGpt12.h
  • IfxGpt12_ReloadInputMode_bothEdgesTxIN : IfxGpt12.h
  • IfxGpt12_ReloadInputMode_bothEdgesTxOTL : IfxGpt12.h
  • IfxGpt12_ReloadInputMode_counterDisabled : IfxGpt12.h
  • IfxGpt12_ReloadInputMode_fallingEdgeTxIN : IfxGpt12.h
  • IfxGpt12_ReloadInputMode_fallingEdgeTxOTL : IfxGpt12.h
  • IfxGpt12_ReloadInputMode_risingEdgeTxIN : IfxGpt12.h
  • IfxGpt12_ReloadInputMode_risingEdgeTxOTL : IfxGpt12.h
  • IfxGpt12_SleepMode_disable : IfxGpt12.h
  • IfxGpt12_SleepMode_enable : IfxGpt12.h
  • IfxGpt12_SuspendMode_hard : IfxGpt12.h
  • IfxGpt12_SuspendMode_none : IfxGpt12.h
  • IfxGpt12_SuspendMode_soft : IfxGpt12.h
  • IfxGpt12_TimerDirection_down : IfxGpt12.h
  • IfxGpt12_TimerDirection_up : IfxGpt12.h
  • IfxGpt12_TimerDirectionSource_external : IfxGpt12.h
  • IfxGpt12_TimerDirectionSource_internal : IfxGpt12.h
  • IfxGpt12_TimerInputPrescaler_1 : IfxGpt12.h
  • IfxGpt12_TimerInputPrescaler_128 : IfxGpt12.h
  • IfxGpt12_TimerInputPrescaler_16 : IfxGpt12.h
  • IfxGpt12_TimerInputPrescaler_2 : IfxGpt12.h
  • IfxGpt12_TimerInputPrescaler_32 : IfxGpt12.h
  • IfxGpt12_TimerInputPrescaler_4 : IfxGpt12.h
  • IfxGpt12_TimerInputPrescaler_64 : IfxGpt12.h
  • IfxGpt12_TimerInputPrescaler_8 : IfxGpt12.h
  • IfxGpt12_TimerReloadMode_disable : IfxGpt12.h
  • IfxGpt12_TimerReloadMode_enable : IfxGpt12.h
  • IfxGpt12_TimerRemoteControl_off : IfxGpt12.h
  • IfxGpt12_TimerRemoteControl_on : IfxGpt12.h
  • IfxGpt12_TimerRun_start : IfxGpt12.h
  • IfxGpt12_TimerRun_stop : IfxGpt12.h
  • IfxGtm_Atom_0 : IfxGtm_cfg.h
  • IfxGtm_Atom_1 : IfxGtm_cfg.h
  • IfxGtm_Atom_2 : IfxGtm_cfg.h
  • IfxGtm_Atom_3 : IfxGtm_cfg.h
  • IfxGtm_Atom_4 : IfxGtm_cfg.h
  • IfxGtm_Atom_5 : IfxGtm_cfg.h
  • IfxGtm_Atom_6 : IfxGtm_cfg.h
  • IfxGtm_Atom_7 : IfxGtm_cfg.h
  • IfxGtm_Atom_8 : IfxGtm_cfg.h
  • IfxGtm_Atom_AruInput_disabled : IfxGtm_Atom.h
  • IfxGtm_Atom_AruInput_enabled : IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_0 : IfxGtm_cfg.h
  • IfxGtm_Atom_Ch_1 : IfxGtm_cfg.h
  • IfxGtm_Atom_Ch_2 : IfxGtm_cfg.h
  • IfxGtm_Atom_Ch_3 : IfxGtm_cfg.h
  • IfxGtm_Atom_Ch_4 : IfxGtm_cfg.h
  • IfxGtm_Atom_Ch_5 : IfxGtm_cfg.h
  • IfxGtm_Atom_Ch_6 : IfxGtm_cfg.h
  • IfxGtm_Atom_Ch_7 : IfxGtm_cfg.h
  • IfxGtm_Atom_Ch_none : IfxGtm_cfg.h
  • IfxGtm_Atom_Ch_OutputTrigger_forward : IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_OutputTrigger_generate : IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_ResetEvent_onCm0 : IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_ResetEvent_onTrigger : IfxGtm_Atom.h
  • IfxGtm_Atom_Mode_outputCompare : IfxGtm_Atom.h
  • IfxGtm_Atom_Mode_outputImmediate : IfxGtm_Atom.h
  • IfxGtm_Atom_Mode_outputPwm : IfxGtm_Atom.h
  • IfxGtm_Atom_Mode_outputSerial : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcControl_cancelCompare : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcControl_ccu0ccu1Ts0 : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcControl_ccu0ccu1Ts12 : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcControl_ccu0Ts0 : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcControl_ccu0Ts0ccu1Ts12 : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcControl_ccu1Ts12 : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcControl_compareBoth : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcControl_compareBoth1 : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcSignalLevelControl_noChange : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcSignalLevelControl_sl0out0 : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcSignalLevelControl_sl0out1 : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcSignalLevelControl_toggle : IfxGtm_Atom.h
  • IfxGtm_Cdtm_0 : IfxGtm_cfg.h
  • IfxGtm_Cdtm_1 : IfxGtm_cfg.h
  • IfxGtm_Cdtm_2 : IfxGtm_cfg.h
  • IfxGtm_Cdtm_3 : IfxGtm_cfg.h
  • IfxGtm_Cdtm_4 : IfxGtm_cfg.h
  • IfxGtm_Cdtm_5 : IfxGtm_cfg.h
  • IfxGtm_Cdtm_6 : IfxGtm_cfg.h
  • IfxGtm_Cdtm_none : IfxGtm_cfg.h
  • IfxGtm_ChXSel_a : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_b : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_c : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_d : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_e : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_f : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_g : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_h : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_i : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_j : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_k : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_l : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_m : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_n : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_o : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_p : IfxGtm_PinMap.h
  • IfxGtm_Cluster_0 : IfxGtm_cfg.h
  • IfxGtm_Cluster_1 : IfxGtm_cfg.h
  • IfxGtm_Cluster_2 : IfxGtm_cfg.h
  • IfxGtm_Cluster_3 : IfxGtm_cfg.h
  • IfxGtm_Cluster_4 : IfxGtm_cfg.h
  • IfxGtm_Cluster_5 : IfxGtm_cfg.h
  • IfxGtm_Cluster_6 : IfxGtm_cfg.h
  • IfxGtm_Cluster_7 : IfxGtm_cfg.h
  • IfxGtm_Cluster_8 : IfxGtm_cfg.h
  • IfxGtm_Cmu_Clk_0 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Clk_1 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Clk_2 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Clk_3 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Clk_4 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Clk_5 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Clk_6 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Clk_7 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Eclk_0 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Eclk_1 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Eclk_2 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Fxclk_0 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Fxclk_1 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Fxclk_2 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Fxclk_3 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Fxclk_4 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Tim_Filter_Clk_0 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Tim_Filter_Clk_1 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Tim_Filter_Clk_6 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Tim_Filter_Clk_7 : IfxGtm_Cmu.h
  • IfxGtm_Dpll_SubInc_1 : IfxGtm_cfg.h
  • IfxGtm_Dpll_SubInc_2 : IfxGtm_cfg.h
  • IfxGtm_Dtm_0 : IfxGtm_cfg.h
  • IfxGtm_Dtm_1 : IfxGtm_cfg.h
  • IfxGtm_Dtm_2 : IfxGtm_cfg.h
  • IfxGtm_Dtm_3 : IfxGtm_cfg.h
  • IfxGtm_Dtm_4 : IfxGtm_cfg.h
  • IfxGtm_Dtm_5 : IfxGtm_cfg.h
  • IfxGtm_Dtm_Ch_0 : IfxGtm_cfg.h
  • IfxGtm_Dtm_Ch_1 : IfxGtm_cfg.h
  • IfxGtm_Dtm_Ch_2 : IfxGtm_cfg.h
  • IfxGtm_Dtm_Ch_3 : IfxGtm_cfg.h
  • IfxGtm_Dtm_Ch_none : IfxGtm_cfg.h
  • IfxGtm_Dtm_ClockSource_cmuClock0 : IfxGtm_Dtm.h
  • IfxGtm_Dtm_ClockSource_cmuClock1 : IfxGtm_Dtm.h
  • IfxGtm_Dtm_ClockSource_cmuClock2 : IfxGtm_Dtm.h
  • IfxGtm_Dtm_ClockSource_systemClock : IfxGtm_Dtm.h
  • IfxGtm_Dtm_DeadTimePath_enable : IfxGtm_Dtm.h
  • IfxGtm_Dtm_DeadTimePath_feedThrough : IfxGtm_Dtm.h
  • IfxGtm_Dtm_none : IfxGtm_cfg.h
  • IfxGtm_Dtm_Output1Function_andOfDtmInputandShiftSignal : IfxGtm_Dtm.h
  • IfxGtm_Dtm_Output1Function_dtmInputSignal : IfxGtm_Dtm.h
  • IfxGtm_Dtm_Output1Function_signalEdgeTrigger : IfxGtm_Dtm.h
  • IfxGtm_Dtm_Output1Function_xorOfDtmInputandShiftSignal : IfxGtm_Dtm.h
  • IfxGtm_Dtm_Output1Select_inverseDeadTime : IfxGtm_Dtm.h
  • IfxGtm_Dtm_Output1Select_specialFunction : IfxGtm_Dtm.h
  • IfxGtm_FeatureControl_disable : IfxGtm_cfg.h
  • IfxGtm_FeatureControl_disabled : IfxGtm_cfg.h
  • IfxGtm_FeatureControl_enable : IfxGtm_cfg.h
  • IfxGtm_FeatureControl_enabled : IfxGtm_cfg.h
  • IfxGtm_IrqMode_level : IfxGtm.h
  • IfxGtm_IrqMode_pulse : IfxGtm.h
  • IfxGtm_IrqMode_pulseNotify : IfxGtm.h
  • IfxGtm_IrqMode_singlePulse : IfxGtm.h
  • IfxGtm_Psm_F2a_0 : IfxGtm_cfg.h
  • IfxGtm_Psm_F2a_1 : IfxGtm_cfg.h
  • IfxGtm_Psm_F2aStream_0 : IfxGtm_Psm.h
  • IfxGtm_Psm_F2aStream_1 : IfxGtm_Psm.h
  • IfxGtm_Psm_F2aStream_2 : IfxGtm_Psm.h
  • IfxGtm_Psm_F2aStream_3 : IfxGtm_Psm.h
  • IfxGtm_Psm_F2aStream_4 : IfxGtm_Psm.h
  • IfxGtm_Psm_F2aStream_5 : IfxGtm_Psm.h
  • IfxGtm_Psm_F2aStream_6 : IfxGtm_Psm.h
  • IfxGtm_Psm_F2aStream_7 : IfxGtm_Psm.h
  • IfxGtm_Psm_F2aStreamState_disabled : IfxGtm_Psm.h
  • IfxGtm_Psm_F2aStreamState_enabled : IfxGtm_Psm.h
  • IfxGtm_Psm_F2aStreamState_readDisabled : IfxGtm_Psm.h
  • IfxGtm_Psm_F2aStreamState_readEnabled : IfxGtm_Psm.h
  • IfxGtm_Psm_F2aTransferDirection_aruToFifo : IfxGtm_Psm.h
  • IfxGtm_Psm_F2aTransferDirection_fifoToAru : IfxGtm_Psm.h
  • IfxGtm_Psm_F2aTransferMode_transferBothWords : IfxGtm_Psm.h
  • IfxGtm_Psm_F2aTransferMode_transferHighWord : IfxGtm_Psm.h
  • IfxGtm_Psm_F2aTransferMode_transferLowWord : IfxGtm_Psm.h
  • IfxGtm_Psm_Fifo_0 : IfxGtm_cfg.h
  • IfxGtm_Psm_Fifo_1 : IfxGtm_cfg.h
  • IfxGtm_Psm_FifoChannel_0 : IfxGtm_Psm.h
  • IfxGtm_Psm_FifoChannel_1 : IfxGtm_Psm.h
  • IfxGtm_Psm_FifoChannel_2 : IfxGtm_Psm.h
  • IfxGtm_Psm_FifoChannel_3 : IfxGtm_Psm.h
  • IfxGtm_Psm_FifoChannel_4 : IfxGtm_Psm.h
  • IfxGtm_Psm_FifoChannel_5 : IfxGtm_Psm.h
  • IfxGtm_Psm_FifoChannel_6 : IfxGtm_Psm.h
  • IfxGtm_Psm_FifoChannel_7 : IfxGtm_Psm.h
  • IfxGtm_Psm_FifoChannelDmaHystDir_read : IfxGtm_Psm.h
  • IfxGtm_Psm_FifoChannelDmaHystDir_write : IfxGtm_Psm.h
  • IfxGtm_Psm_FifoChannelInterrupt_empty : IfxGtm_Psm.h
  • IfxGtm_Psm_FifoChannelInterrupt_full : IfxGtm_Psm.h
  • IfxGtm_Psm_FifoChannelInterrupt_lowerWm : IfxGtm_Psm.h
  • IfxGtm_Psm_FifoChannelInterrupt_upperWm : IfxGtm_Psm.h
  • IfxGtm_Psm_FifoChannelMode_normal : IfxGtm_Psm.h
  • IfxGtm_Psm_FifoChannelMode_ringBuffer : IfxGtm_Psm.h
  • IfxGtm_Psm_FifoChannelStatus_empty : IfxGtm_Psm.h
  • IfxGtm_Psm_FifoChannelStatus_full : IfxGtm_Psm.h
  • IfxGtm_Psm_FifoChannelStatus_lowerWm : IfxGtm_Psm.h
  • IfxGtm_Psm_FifoChannelStatus_normal : IfxGtm_Psm.h
  • IfxGtm_Psm_FifoChannelStatus_upperWm : IfxGtm_Psm.h
  • IfxGtm_Psm_InterruptMode_level : IfxGtm_Psm.h
  • IfxGtm_Psm_InterruptMode_pulse : IfxGtm_Psm.h
  • IfxGtm_Psm_InterruptMode_pulseNotify : IfxGtm_Psm.h
  • IfxGtm_Psm_InterruptMode_singlePulse : IfxGtm_Psm.h
  • IfxGtm_Spe_0 : IfxGtm_cfg.h
  • IfxGtm_Spe_1 : IfxGtm_cfg.h
  • IfxGtm_Spe_2 : IfxGtm_cfg.h
  • IfxGtm_Spe_3 : IfxGtm_cfg.h
  • IfxGtm_Spe_ChannelOutputType_0 : IfxGtm_Spe.h
  • IfxGtm_Spe_ChannelOutputType_1 : IfxGtm_Spe.h
  • IfxGtm_Spe_ChannelOutputType_tomCh0Sour : IfxGtm_Spe.h
  • IfxGtm_Spe_ChannelOutputType_tomCh1Sour : IfxGtm_Spe.h
  • IfxGtm_Spe_ControlCommand_bwdPatPtr : IfxGtm_Spe.h
  • IfxGtm_Spe_ControlCommand_outPat6 : IfxGtm_Spe.h
  • IfxGtm_Spe_ControlCommand_outPat7 : IfxGtm_Spe.h
  • IfxGtm_Spe_ControlCommand_patPtr : IfxGtm_Spe.h
  • IfxGtm_Spe_Direction_bwd : IfxGtm_Spe.h
  • IfxGtm_Spe_Direction_fwd : IfxGtm_Spe.h
  • IfxGtm_Spe_InputSignal_chX : IfxGtm_Spe.h
  • IfxGtm_Spe_InputSignal_chY : IfxGtm_Spe.h
  • IfxGtm_Spe_InputSignal_chZ : IfxGtm_Spe.h
  • IfxGtm_Spe_InterruptMode_level : IfxGtm_Spe.h
  • IfxGtm_Spe_InterruptMode_pulse : IfxGtm_Spe.h
  • IfxGtm_Spe_InterruptMode_pulseNotify : IfxGtm_Spe.h
  • IfxGtm_Spe_InterruptMode_singlePulse : IfxGtm_Spe.h
  • IfxGtm_Spe_InterruptSignal_bis : IfxGtm_Spe.h
  • IfxGtm_Spe_InterruptSignal_count : IfxGtm_Spe.h
  • IfxGtm_Spe_InterruptSignal_dchg : IfxGtm_Spe.h
  • IfxGtm_Spe_InterruptSignal_nipd : IfxGtm_Spe.h
  • IfxGtm_Spe_InterruptSignal_perr : IfxGtm_Spe.h
  • IfxGtm_Spe_InterruptSignal_rcmp : IfxGtm_Spe.h
  • IfxGtm_Spe_OutChannel_0 : IfxGtm_Spe.h
  • IfxGtm_Spe_OutChannel_1 : IfxGtm_Spe.h
  • IfxGtm_Spe_OutChannel_2 : IfxGtm_Spe.h
  • IfxGtm_Spe_OutChannel_3 : IfxGtm_Spe.h
  • IfxGtm_Spe_OutChannel_4 : IfxGtm_Spe.h
  • IfxGtm_Spe_OutChannel_5 : IfxGtm_Spe.h
  • IfxGtm_Spe_OutChannel_6 : IfxGtm_Spe.h
  • IfxGtm_Spe_OutChannel_7 : IfxGtm_Spe.h
  • IfxGtm_Spe_PatternIndex_0 : IfxGtm_Spe.h
  • IfxGtm_Spe_PatternIndex_1 : IfxGtm_Spe.h
  • IfxGtm_Spe_PatternIndex_2 : IfxGtm_Spe.h
  • IfxGtm_Spe_PatternIndex_3 : IfxGtm_Spe.h
  • IfxGtm_Spe_PatternIndex_4 : IfxGtm_Spe.h
  • IfxGtm_Spe_PatternIndex_5 : IfxGtm_Spe.h
  • IfxGtm_Spe_PatternIndex_6 : IfxGtm_Spe.h
  • IfxGtm_Spe_PatternIndex_7 : IfxGtm_Spe.h
  • IfxGtm_Spe_TimInput_spe0Tim0Ch0to2 : IfxGtm_cfg.h
  • IfxGtm_Spe_TimInput_spe0Tim1Ch0to2 : IfxGtm_cfg.h
  • IfxGtm_Spe_TimInput_spe1Tim0Ch3to5 : IfxGtm_cfg.h
  • IfxGtm_Spe_TimInput_spe1Tim1Ch3to5 : IfxGtm_cfg.h
  • IfxGtm_Spe_TimInput_spe2Tim2Ch0to2 : IfxGtm_cfg.h
  • IfxGtm_Spe_TimInput_spe2Tim3Ch0to2 : IfxGtm_cfg.h
  • IfxGtm_Spe_TimInput_spe3Tim2Ch3to5 : IfxGtm_cfg.h
  • IfxGtm_Spe_TimInput_spe3Tim3Ch3to5 : IfxGtm_cfg.h
  • IfxGtm_Spe_TimInput_spe4Tim4Ch0to2 : IfxGtm_cfg.h
  • IfxGtm_Spe_TimInput_spe4Tim5Ch0to2 : IfxGtm_cfg.h
  • IfxGtm_Spe_TimInput_spe5Tim4Ch3to5 : IfxGtm_cfg.h
  • IfxGtm_Spe_TimInput_spe5Tim5Ch3to5 : IfxGtm_cfg.h
  • IfxGtm_Spe_TriggerSource_speNipd : IfxGtm_cfg.h
  • IfxGtm_Spe_TriggerSource_tomCh0Ccu0 : IfxGtm_cfg.h
  • IfxGtm_Spe_TriggerSource_tomCh0Ccu1 : IfxGtm_cfg.h
  • IfxGtm_Spe_TriggerSource_tomCh2Ccu1 : IfxGtm_cfg.h
  • IfxGtm_Spe_TriggerSource_tomCh6Ccu1 : IfxGtm_cfg.h
  • IfxGtm_Spe_TriggerSource_tomCh7Ccu1 : IfxGtm_cfg.h
  • IfxGtm_Spe_TriggerSource_tomCh8Ccu1 : IfxGtm_cfg.h
  • IfxGtm_Spe_TriggerSource_tomCh9Ccu1 : IfxGtm_cfg.h
  • IfxGtm_SuspendMode_hard : IfxGtm.h
  • IfxGtm_SuspendMode_none : IfxGtm.h
  • IfxGtm_SuspendMode_soft : IfxGtm.h
  • IfxGtm_Tbu_Ts_0 : IfxGtm_Tbu.h
  • IfxGtm_Tbu_Ts_1 : IfxGtm_Tbu.h
  • IfxGtm_Tbu_Ts_2 : IfxGtm_Tbu.h
  • IfxGtm_Tbu_Ts_3 : IfxGtm_Tbu.h
  • IfxGtm_Tim_0 : IfxGtm_cfg.h
  • IfxGtm_Tim_1 : IfxGtm_cfg.h
  • IfxGtm_Tim_2 : IfxGtm_cfg.h
  • IfxGtm_Tim_3 : IfxGtm_cfg.h
  • IfxGtm_Tim_4 : IfxGtm_cfg.h
  • IfxGtm_Tim_5 : IfxGtm_cfg.h
  • IfxGtm_Tim_6 : IfxGtm_cfg.h
  • IfxGtm_Tim_Ch_0 : IfxGtm_cfg.h
  • IfxGtm_Tim_Ch_1 : IfxGtm_cfg.h
  • IfxGtm_Tim_Ch_2 : IfxGtm_cfg.h
  • IfxGtm_Tim_Ch_3 : IfxGtm_cfg.h
  • IfxGtm_Tim_Ch_4 : IfxGtm_cfg.h
  • IfxGtm_Tim_Ch_5 : IfxGtm_cfg.h
  • IfxGtm_Tim_Ch_6 : IfxGtm_cfg.h
  • IfxGtm_Tim_Ch_7 : IfxGtm_cfg.h
  • IfxGtm_Tim_CntsSel_cntReg : IfxGtm_Tim.h
  • IfxGtm_Tim_CntsSel_tbuTs0 : IfxGtm_Tim.h
  • IfxGtm_Tim_FilterCounter_hold : IfxGtm_Tim.h
  • IfxGtm_Tim_FilterCounter_upDown : IfxGtm_Tim.h
  • IfxGtm_Tim_FilterCounterFreqSel_cmuClk0 : IfxGtm_Tim.h
  • IfxGtm_Tim_FilterCounterFreqSel_cmuClk1 : IfxGtm_Tim.h
  • IfxGtm_Tim_FilterCounterFreqSel_cmuClk6 : IfxGtm_Tim.h
  • IfxGtm_Tim_FilterCounterFreqSel_cmuClk7 : IfxGtm_Tim.h
  • IfxGtm_Tim_FilterMode_immediateEdgePropagation : IfxGtm_Tim.h
  • IfxGtm_Tim_FilterMode_individualDeglitchTime : IfxGtm_Tim.h
  • IfxGtm_Tim_GprSel_cnts : IfxGtm_Tim.h
  • IfxGtm_Tim_GprSel_tbuTs0 : IfxGtm_Tim.h
  • IfxGtm_Tim_GprSel_tbuTs1 : IfxGtm_Tim.h
  • IfxGtm_Tim_GprSel_tbuTs2 : IfxGtm_Tim.h
  • IfxGtm_Tim_In_ConfigFilterMode_immediateEdgePropagation : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeHold : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeUpDown : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_ConfigFilterMode_none : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_Input_adjacentChannel : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_Input_aux : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_Input_currentChannel : IfxGtm_Tim_In.h
  • IfxGtm_Tim_Input_adjacentChannel : IfxGtm_Tim.h
  • IfxGtm_Tim_Input_currentChannel : IfxGtm_Tim.h
  • IfxGtm_Tim_IrqMode_level : IfxGtm_Tim.h
  • IfxGtm_Tim_IrqMode_none : IfxGtm_Tim.h
  • IfxGtm_Tim_IrqMode_pulse : IfxGtm_Tim.h
  • IfxGtm_Tim_IrqMode_pulseNotify : IfxGtm_Tim.h
  • IfxGtm_Tim_IrqMode_singlePulseMode : IfxGtm_Tim.h
  • IfxGtm_Tim_IrqType_cntOverflow : IfxGtm_Tim.h
  • IfxGtm_Tim_IrqType_ecntOverflow : IfxGtm_Tim.h
  • IfxGtm_Tim_IrqType_glitchDetect : IfxGtm_Tim.h
  • IfxGtm_Tim_IrqType_gprOverflow : IfxGtm_Tim.h
  • IfxGtm_Tim_IrqType_newVal : IfxGtm_Tim.h
  • IfxGtm_Tim_IrqType_timeoutDetect : IfxGtm_Tim.h
  • IfxGtm_Tim_Mode_bitCompression : IfxGtm_Tim.h
  • IfxGtm_Tim_Mode_inputEvent : IfxGtm_Tim.h
  • IfxGtm_Tim_Mode_inputPrescaler : IfxGtm_Tim.h
  • IfxGtm_Tim_Mode_pulseIntegration : IfxGtm_Tim.h
  • IfxGtm_Tim_Mode_pwmMeasurement : IfxGtm_Tim.h
  • IfxGtm_Tim_Timeout_bothEdge : IfxGtm_Tim.h
  • IfxGtm_Tim_Timeout_disabled : IfxGtm_Tim.h
  • IfxGtm_Tim_Timeout_fallingEdge : IfxGtm_Tim.h
  • IfxGtm_Tim_Timeout_risingEdge : IfxGtm_Tim.h
  • IfxGtm_Tom_0 : IfxGtm_cfg.h
  • IfxGtm_Tom_1 : IfxGtm_cfg.h
  • IfxGtm_Tom_2 : IfxGtm_cfg.h
  • IfxGtm_Tom_3 : IfxGtm_cfg.h
  • IfxGtm_Tom_4 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_0 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_1 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_10 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_11 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_12 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_13 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_14 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_15 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_2 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_3 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_4 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_5 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_6 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_7 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_8 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_9 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_ClkSrc_cmuFxclk0 : IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_ClkSrc_cmuFxclk1 : IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_ClkSrc_cmuFxclk2 : IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_ClkSrc_cmuFxclk3 : IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_ClkSrc_cmuFxclk4 : IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_ClkSrc_noClock : IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_none : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_OutputTrigger_forward : IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_OutputTrigger_generate : IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_ResetEvent_onCm0 : IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_ResetEvent_onTrigger : IfxGtm_Tom.h
  • IfxGtm_Tom_Tgc_0 : IfxGtm_cfg.h
  • IfxGtm_Tom_Tgc_1 : IfxGtm_cfg.h
  • IfxGtm_ToutSel_a : IfxGtm_PinMap.h
  • IfxGtm_ToutSel_b : IfxGtm_PinMap.h
  • IfxGtm_ToutSel_c : IfxGtm_PinMap.h
  • IfxGtm_ToutSel_d : IfxGtm_PinMap.h
  • IfxGtm_ToutSel_e : IfxGtm_PinMap.h
  • IfxGtm_ToutSel_f : IfxGtm_PinMap.h
  • IfxGtm_ToutSel_g : IfxGtm_PinMap.h
  • IfxGtm_ToutSel_h : IfxGtm_PinMap.h
  • IfxGtm_ToutSel_i : IfxGtm_PinMap.h
  • IfxGtm_ToutSel_j : IfxGtm_PinMap.h
  • IfxGtm_ToutSel_k : IfxGtm_PinMap.h
  • IfxGtm_ToutSel_l : IfxGtm_PinMap.h
  • IfxGtm_Trig_AdcGroup_0 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcGroup_1 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcGroup_10 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcGroup_11 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcGroup_2 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcGroup_3 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcGroup_4 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcGroup_5 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcGroup_6 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcGroup_7 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcGroup_8 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcGroup_9 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrig_0 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrig_1 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrig_2 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrig_3 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrig_4 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrig_count : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigChannel_11 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigChannel_12 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigChannel_13 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigChannel_14 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigChannel_15 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigChannel_3 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigChannel_4 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigChannel_5 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigChannel_6 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigChannel_7 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigChannel_count : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigSource_atom0 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigSource_atom1 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigSource_atom10 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigSource_atom11 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigSource_atom2 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigSource_atom3 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigSource_atom4 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigSource_atom5 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigSource_atom6 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigSource_atom7 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigSource_atom8 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigSource_atom9 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigSource_count : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigSource_tom0 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigSource_tom1 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigSource_tom2 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigSource_tom3 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigSource_tom4 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigSource_tom5 : IfxGtm_Trig.h
  • IfxGtm_Trig_CanDevice_0 : IfxGtm_Trig.h
  • IfxGtm_Trig_CanDevice_1 : IfxGtm_Trig.h
  • IfxGtm_Trig_CanDevice_2 : IfxGtm_Trig.h
  • IfxGtm_Trig_CanDevice_count : IfxGtm_Trig.h
  • IfxGtm_Trig_CanTrig_0 : IfxGtm_Trig.h
  • IfxGtm_Trig_CanTrig_1 : IfxGtm_Trig.h
  • IfxGtm_Trig_CanTrig_2 : IfxGtm_Trig.h
  • IfxGtm_Trig_CanTrig_3 : IfxGtm_Trig.h
  • IfxGtm_Trig_CanTrig_count : IfxGtm_Trig.h
  • IfxGtm_Trig_CanTrigChannel_0 : IfxGtm_Trig.h
  • IfxGtm_Trig_CanTrigChannel_1 : IfxGtm_Trig.h
  • IfxGtm_Trig_CanTrigChannel_11 : IfxGtm_Trig.h
  • IfxGtm_Trig_CanTrigChannel_12 : IfxGtm_Trig.h
  • IfxGtm_Trig_CanTrigChannel_13 : IfxGtm_Trig.h
  • IfxGtm_Trig_CanTrigChannel_14 : IfxGtm_Trig.h
  • IfxGtm_Trig_CanTrigChannel_2 : IfxGtm_Trig.h
  • IfxGtm_Trig_CanTrigChannel_3 : IfxGtm_Trig.h
  • IfxGtm_Trig_CanTrigChannel_4 : IfxGtm_Trig.h
  • IfxGtm_Trig_CanTrigChannel_5 : IfxGtm_Trig.h
  • IfxGtm_Trig_CanTrigChannel_6 : IfxGtm_Trig.h
  • IfxGtm_Trig_CanTrigChannel_7 : IfxGtm_Trig.h
  • IfxGtm_Trig_CanTrigChannel_count : IfxGtm_Trig.h
  • IfxGtm_Trig_CanTrigSource_atom0 : IfxGtm_Trig.h
  • IfxGtm_Trig_CanTrigSource_atom1 : IfxGtm_Trig.h
  • IfxGtm_Trig_CanTrigSource_atom2 : IfxGtm_Trig.h
  • IfxGtm_Trig_CanTrigSource_count : IfxGtm_Trig.h
  • IfxGtm_Trig_CanTrigSource_tom0 : IfxGtm_Trig.h
  • IfxGtm_Trig_CanTrigSource_tom1 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrig_0 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrig_1 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrig_2 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrig_3 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource_atom0_4 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource_atom0_5 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource_atom0_6 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource_atom0_7 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource_atom10_6 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource_atom10_7 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource_atom11_6 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource_atom11_7 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource_atom1_4 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource_atom1_5 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource_atom1_6 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource_atom1_7 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource_atom2_4 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource_atom2_5 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource_atom2_6 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource_atom2_7 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource_atom3_4 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource_atom3_5 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource_atom3_6 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource_atom3_7 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource_atom4_6 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource_atom4_7 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource_atom5_6 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource_atom5_7 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource_atom6_6 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource_atom6_7 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource_atom7_6 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource_atom7_7 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource_atom8_6 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource_atom8_7 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource_atom9_6 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource_atom9_7 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource_reserved0 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource_reserved1 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource_reserved2 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource_tom0_13 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource_tom0_14 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource_tom0_6 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource_tom0_7 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource_tom1_14 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource_tom1_6 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource_tom1_7 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource_tom2_13 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource_tom2_14 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource_tom2_6 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource_tom2_7 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource_tom3_14 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource_tom3_7 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource_tom4_14 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource_tom4_7 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource_tom5_14 : IfxGtm_Trig.h
  • IfxGtm_Trig_EdsadcTrigSource_tom5_7 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigChannel_0 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigChannel_1 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigChannel_10 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigChannel_11 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigChannel_12 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigChannel_13 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigChannel_14 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigChannel_15 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigChannel_2 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigChannel_3 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigChannel_4 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigChannel_5 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigChannel_6 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigChannel_7 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigChannel_8 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigChannel_9 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigChannel_count : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigInput_high : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigInput_low : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigInput_lowExtended : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigOutput_0 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigOutput_1 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigOutput_2 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigOutput_3 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigSet_1 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigSet_2 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigSet_3 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigSet_4 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigSet_5 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigSet_6 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigSet_7 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigSet_8 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigSet_9 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigSet_count : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigSignal_0 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigSignal_1 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigSignal_10 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigSignal_11 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigSignal_12 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigSignal_13 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigSignal_14 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigSignal_15 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigSignal_2 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigSignal_3 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigSignal_4 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigSignal_5 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigSignal_6 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigSignal_7 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigSignal_8 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigSignal_9 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigSource_atom0 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigSource_atom1 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigSource_atom10 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigSource_atom11 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigSource_atom2 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigSource_atom3 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigSource_atom4 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigSource_atom5 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigSource_atom6 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigSource_atom7 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigSource_atom8 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigSource_atom9 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigSource_count : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigSource_tom0 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigSource_tom1 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigSource_tom2 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigSource_tom3 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigSource_tom4 : IfxGtm_Trig.h
  • IfxGtm_Trig_MscTrigSource_tom5 : IfxGtm_Trig.h
  • IfxGtm_Trig_Psi5sTrigSource_atomX_4 : IfxGtm_Trig.h
  • IfxGtm_Trig_Psi5sTrigSource_atomX_5 : IfxGtm_Trig.h
  • IfxGtm_Trig_Psi5sTrigSource_atomX_6 : IfxGtm_Trig.h
  • IfxGtm_Trig_Psi5sTrigSource_atomX_7 : IfxGtm_Trig.h
  • IfxGtm_Trig_Psi5sTrigSource_no_Trigger : IfxGtm_Trig.h
  • IfxGtm_Trig_Psi5sTrigSource_tomX_13 : IfxGtm_Trig.h
  • IfxGtm_Trig_Psi5sTrigSource_tomX_14 : IfxGtm_Trig.h
  • IfxGtm_Trig_Psi5sTrigSource_tomX_6 : IfxGtm_Trig.h
  • IfxGtm_Trig_Psi5sTrigSource_tomX_7 : IfxGtm_Trig.h
  • IfxGtm_Trig_Psi5TrigSource_atom2_4 : IfxGtm_Trig.h
  • IfxGtm_Trig_Psi5TrigSource_atom2_5 : IfxGtm_Trig.h
  • IfxGtm_Trig_Psi5TrigSource_atom2_6 : IfxGtm_Trig.h
  • IfxGtm_Trig_Psi5TrigSource_atom2_7 : IfxGtm_Trig.h
  • IfxGtm_Trig_Psi5TrigSource_no_Trigger : IfxGtm_Trig.h
  • IfxGtm_Trig_Psi5TrigSource_tom0_13 : IfxGtm_Trig.h
  • IfxGtm_Trig_Psi5TrigSource_tom0_14 : IfxGtm_Trig.h
  • IfxGtm_Trig_Psi5TrigSource_tom0_6 : IfxGtm_Trig.h
  • IfxGtm_Trig_Psi5TrigSource_tom0_7 : IfxGtm_Trig.h
  • IfxGtm_Trig_Psi5TrigSource_tom2_13 : IfxGtm_Trig.h
  • IfxGtm_Trig_Psi5TrigSource_tom2_14 : IfxGtm_Trig.h
  • IfxGtm_Trig_Psi5TrigSource_tom2_6 : IfxGtm_Trig.h
  • IfxGtm_Trig_Psi5TrigSource_tom2_7 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentGroup_0 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentGroup_1 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentGroup_10 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentGroup_11 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentGroup_12 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentGroup_13 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentGroup_14 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentGroup_15 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentGroup_2 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentGroup_3 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentGroup_4 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentGroup_5 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentGroup_6 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentGroup_7 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentGroup_8 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentGroup_9 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrig_0 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrig_1 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrig_2 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrig_3 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigChannel_11 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigChannel_12 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigChannel_13 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigChannel_14 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigChannel_15 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigChannel_3 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigChannel_4 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigChannel_5 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigChannel_6 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigChannel_7 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigChannel_count : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigSource_atom0 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigSource_atom1 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigSource_atom10 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigSource_atom11 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigSource_atom2 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigSource_atom3 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigSource_atom4 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigSource_atom5 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigSource_atom6 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigSource_atom7 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigSource_atom8 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigSource_atom9 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigSource_count : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigSource_tom0 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigSource_tom1 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigSource_tom2 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigSource_tom3 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigSource_tom4 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigSource_tom5 : IfxGtm_Trig.h
  • IfxHssl_ChannelId_0 : IfxHssl.h
  • IfxHssl_ChannelId_1 : IfxHssl.h
  • IfxHssl_ChannelId_2 : IfxHssl.h
  • IfxHssl_ChannelId_3 : IfxHssl.h
  • IfxHssl_Command_noAction : IfxHssl.h
  • IfxHssl_Command_readFrame : IfxHssl.h
  • IfxHssl_Command_triggerFrame : IfxHssl.h
  • IfxHssl_Command_writeFrame : IfxHssl.h
  • IfxHssl_ControlCommand_disableReception : IfxHssl.h
  • IfxHssl_ControlCommand_enableReception : IfxHssl.h
  • IfxHssl_ControlCommand_highSpeedClockStart : IfxHssl.h
  • IfxHssl_ControlCommand_highSpeedClockStop : IfxHssl.h
  • IfxHssl_ControlCommand_highSpeedReception : IfxHssl.h
  • IfxHssl_ControlCommand_highSpeedTransmission : IfxHssl.h
  • IfxHssl_ControlCommand_lowSpeedReception : IfxHssl.h
  • IfxHssl_ControlCommand_lowSpeedTransmission : IfxHssl.h
  • IfxHssl_ControlCommand_mediumSpeedReception : IfxHssl.h
  • IfxHssl_ControlCommand_ping : IfxHssl.h
  • IfxHssl_ControlCommand_turnOffClockTestMode : IfxHssl.h
  • IfxHssl_ControlCommand_turnOnClockTestMode : IfxHssl.h
  • IfxHssl_ControlCommand_turnOnPayloadLoopback : IfxHssl.h
  • IfxHssl_DataLength_16bit : IfxHssl.h
  • IfxHssl_DataLength_32bit : IfxHssl.h
  • IfxHssl_DataLength_8bit : IfxHssl.h
  • IfxHssl_Hsct_InterruptSource_commandError : IfxHssl.h
  • IfxHssl_Hsct_InterruptSource_headerError : IfxHssl.h
  • IfxHssl_Hsct_InterruptSource_interfaceControlFrameSend : IfxHssl.h
  • IfxHssl_Hsct_InterruptSource_payloadError : IfxHssl.h
  • IfxHssl_Hsct_InterruptSource_pingAnswerReceived : IfxHssl.h
  • IfxHssl_Hsct_InterruptSource_pllLockLosterror : IfxHssl.h
  • IfxHssl_Hsct_InterruptSource_speedModeSwitchError : IfxHssl.h
  • IfxHssl_Hsct_InterruptSource_synchronizationFifoOverflow : IfxHssl.h
  • IfxHssl_Hsct_InterruptSource_synchronizationFifoUnderflow : IfxHssl.h
  • IfxHssl_Hsct_InterruptSource_txTransferError : IfxHssl.h
  • IfxHssl_Hsct_InterruptSource_UnsolicitedMessageReceived : IfxHssl.h
  • IfxHssl_Hsct_InterruptSource_unsolicitedMessageSendFinished : IfxHssl.h
  • IfxHssl_Hsct_SleepMode_disable : IfxHssl.h
  • IfxHssl_Hsct_SleepMode_enable : IfxHssl.h
  • IfxHssl_hsctIndex_0 : IfxHssl_cfg.h
  • IfxHssl_hsctIndex_none : IfxHssl_cfg.h
  • IfxHssl_Hssl_ERRInterruptSource_notAcknowledgeError : IfxHssl.h
  • IfxHssl_Hssl_ERRInterruptSource_timeoutError : IfxHssl.h
  • IfxHssl_Hssl_ERRInterruptSource_transactionTagError : IfxHssl.h
  • IfxHssl_Hssl_ERRInterruptSource_unexpectedError : IfxHssl.h
  • IfxHssl_Hssl_EXIInterruptSource_busAccessError : IfxHssl.h
  • IfxHssl_Hssl_EXIInterruptSource_channelNumberCodeError : IfxHssl.h
  • IfxHssl_Hssl_EXIInterruptSource_crcError : IfxHssl.h
  • IfxHssl_Hssl_EXIInterruptSource_dataLengthError : IfxHssl.h
  • IfxHssl_Hssl_EXIInterruptSource_memoryAccessViolation : IfxHssl.h
  • IfxHssl_Hssl_FrameRequest_noAction : IfxHssl_Hssl.h
  • IfxHssl_Hssl_FrameRequest_readFrame : IfxHssl_Hssl.h
  • IfxHssl_Hssl_FrameRequest_readId : IfxHssl_Hssl.h
  • IfxHssl_Hssl_FrameRequest_triggerFrame : IfxHssl_Hssl.h
  • IfxHssl_Hssl_FrameRequest_writeFrame : IfxHssl_Hssl.h
  • IfxHssl_Hssl_SleepMode_disable : IfxHssl.h
  • IfxHssl_Hssl_SleepMode_enable : IfxHssl.h
  • IfxHssl_Hssl_Status_busy : IfxHssl_Hssl.h
  • IfxHssl_Hssl_Status_error : IfxHssl_Hssl.h
  • IfxHssl_Hssl_Status_ok : IfxHssl_Hssl.h
  • IfxHssl_hsslIndex_0 : IfxHssl_cfg.h
  • IfxHssl_hsslIndex_none : IfxHssl_cfg.h
  • IfxHssl_InterfaceMode_master : IfxHssl.h
  • IfxHssl_InterfaceMode_slave : IfxHssl.h
  • IfxHssl_MasterModeRxSpeed_highSpeed : IfxHssl.h
  • IfxHssl_MasterModeRxSpeed_lowSpeed : IfxHssl.h
  • IfxHssl_MasterModeRxSpeed_mediumSpeed : IfxHssl.h
  • IfxHssl_MasterModeTxSpeed_highSpeed : IfxHssl.h
  • IfxHssl_MasterModeTxSpeed_lowSpeed : IfxHssl.h
  • IfxHssl_PllReferenceClock_hsctSystemClockInput : IfxHssl.h
  • IfxHssl_PllReferenceClock_oscillatorInput : IfxHssl.h
  • IfxHssl_RefClockFrequency_10Mhz : IfxHssl.h
  • IfxHssl_RefClockFrequency_20Mhz : IfxHssl.h
  • IfxHssl_RefClockFrequency_40Mhz : IfxHssl.h
  • IfxHssl_StreamingMode_continuous : IfxHssl.h
  • IfxHssl_StreamingMode_single : IfxHssl.h
  • IfxHssl_SuspendMode_hard : IfxHssl.h
  • IfxHssl_SuspendMode_none : IfxHssl.h
  • IfxHssl_SuspendMode_soft : IfxHssl.h
  • IfxHssl_SysClockDivider_1 : IfxHssl.h
  • IfxHssl_SysClockDivider_2 : IfxHssl.h
  • IfxHssl_SysClockDivider_4 : IfxHssl.h
  • IfxI2c_AddressMode_10Bit : IfxI2c.h
  • IfxI2c_AddressMode_7Bit : IfxI2c.h
  • IfxI2c_BusStatus_busyMaster : IfxI2c.h
  • IfxI2c_BusStatus_idle : IfxI2c.h
  • IfxI2c_BusStatus_remoteSlave : IfxI2c.h
  • IfxI2c_BusStatus_started : IfxI2c.h
  • IfxI2c_DtrInterruptSource_burstRequest : IfxI2c.h
  • IfxI2c_DtrInterruptSource_lastBurstRequest : IfxI2c.h
  • IfxI2c_DtrInterruptSource_lastSingleRequest : IfxI2c.h
  • IfxI2c_DtrInterruptSource_singleRequest : IfxI2c.h
  • IfxI2c_ErrorInterruptSource_rxFifoOverflow : IfxI2c.h
  • IfxI2c_ErrorInterruptSource_rxFifoUnderflow : IfxI2c.h
  • IfxI2c_ErrorInterruptSource_txFifoOverflow : IfxI2c.h
  • IfxI2c_ErrorInterruptSource_txFifoUnderflow : IfxI2c.h
  • IfxI2c_I2c_Status_al : IfxI2c_I2c.h
  • IfxI2c_I2c_Status_busNotFree : IfxI2c_I2c.h
  • IfxI2c_I2c_Status_error : IfxI2c_I2c.h
  • IfxI2c_I2c_Status_nak : IfxI2c_I2c.h
  • IfxI2c_I2c_Status_ok : IfxI2c_I2c.h
  • IfxI2c_Index_0 : IfxI2c_cfg.h
  • IfxI2c_Index_1 : IfxI2c_cfg.h
  • IfxI2c_Index_none : IfxI2c_cfg.h
  • IfxI2c_Mode_HighSpeed : IfxI2c.h
  • IfxI2c_Mode_StandardAndFast : IfxI2c.h
  • IfxI2c_PinSelect_a : IfxI2c.h
  • IfxI2c_PinSelect_b : IfxI2c.h
  • IfxI2c_PinSelect_c : IfxI2c.h
  • IfxI2c_PinSelect_d : IfxI2c.h
  • IfxI2c_PinSelect_e : IfxI2c.h
  • IfxI2c_PinSelect_f : IfxI2c.h
  • IfxI2c_PinSelect_g : IfxI2c.h
  • IfxI2c_PinSelect_h : IfxI2c.h
  • IfxI2c_ProtocolInterruptSource_addressMatch : IfxI2c.h
  • IfxI2c_ProtocolInterruptSource_arbitrationLost : IfxI2c.h
  • IfxI2c_ProtocolInterruptSource_generalCall : IfxI2c.h
  • IfxI2c_ProtocolInterruptSource_masterCode : IfxI2c.h
  • IfxI2c_ProtocolInterruptSource_notAcknowledgeReceived : IfxI2c.h
  • IfxI2c_ProtocolInterruptSource_receiveMode : IfxI2c.h
  • IfxI2c_ProtocolInterruptSource_transmissionEnd : IfxI2c.h
  • IfxI2c_SleepMode_disable : IfxI2c.h
  • IfxI2c_SleepMode_enable : IfxI2c.h
  • IfxIom_EdgeClearType_falling : IfxIom.h
  • IfxIom_EdgeClearType_rising : IfxIom.h
  • IfxIom_EdgeClearType_risingFalling : IfxIom.h
  • IfxIom_EventActiveEdgeSelection_eitherGateEitherClear : IfxIom.h
  • IfxIom_EventActiveEdgeSelection_eitherGateNegativeClear : IfxIom.h
  • IfxIom_EventActiveEdgeSelection_eitherGateNeitherClear : IfxIom.h
  • IfxIom_EventActiveEdgeSelection_eitherGatePositiveClear : IfxIom.h
  • IfxIom_EventActiveEdgeSelection_negativeGateEitherClear : IfxIom.h
  • IfxIom_EventActiveEdgeSelection_negativeGateNegativeClear : IfxIom.h
  • IfxIom_EventActiveEdgeSelection_negativeGateNeitherClear : IfxIom.h
  • IfxIom_EventActiveEdgeSelection_negativeGatePositiveClear : IfxIom.h
  • IfxIom_EventActiveEdgeSelection_neitherGateEitherClear : IfxIom.h
  • IfxIom_EventActiveEdgeSelection_neitherGateNegativeClear : IfxIom.h
  • IfxIom_EventActiveEdgeSelection_neitherGateNeitherClear : IfxIom.h
  • IfxIom_EventActiveEdgeSelection_neitherGatePositiveClear : IfxIom.h
  • IfxIom_EventActiveEdgeSelection_positiveGateEitherClear : IfxIom.h
  • IfxIom_EventActiveEdgeSelection_positiveGateNegativeClear : IfxIom.h
  • IfxIom_EventActiveEdgeSelection_positiveGateNeitherClear : IfxIom.h
  • IfxIom_EventActiveEdgeSelection_positiveGatePositiveClear : IfxIom.h
  • IfxIom_EventCounterChannel_0 : IfxIom.h
  • IfxIom_EventCounterChannel_1 : IfxIom.h
  • IfxIom_EventCounterChannel_10 : IfxIom.h
  • IfxIom_EventCounterChannel_11 : IfxIom.h
  • IfxIom_EventCounterChannel_12 : IfxIom.h
  • IfxIom_EventCounterChannel_13 : IfxIom.h
  • IfxIom_EventCounterChannel_14 : IfxIom.h
  • IfxIom_EventCounterChannel_15 : IfxIom.h
  • IfxIom_EventCounterChannel_2 : IfxIom.h
  • IfxIom_EventCounterChannel_3 : IfxIom.h
  • IfxIom_EventCounterChannel_4 : IfxIom.h
  • IfxIom_EventCounterChannel_5 : IfxIom.h
  • IfxIom_EventCounterChannel_6 : IfxIom.h
  • IfxIom_EventCounterChannel_7 : IfxIom.h
  • IfxIom_EventCounterChannel_8 : IfxIom.h
  • IfxIom_EventCounterChannel_9 : IfxIom.h
  • IfxIom_EventCounterThreshold_1 : IfxIom.h
  • IfxIom_EventCounterThreshold_10 : IfxIom.h
  • IfxIom_EventCounterThreshold_11 : IfxIom.h
  • IfxIom_EventCounterThreshold_12 : IfxIom.h
  • IfxIom_EventCounterThreshold_13 : IfxIom.h
  • IfxIom_EventCounterThreshold_14 : IfxIom.h
  • IfxIom_EventCounterThreshold_15 : IfxIom.h
  • IfxIom_EventCounterThreshold_2 : IfxIom.h
  • IfxIom_EventCounterThreshold_3 : IfxIom.h
  • IfxIom_EventCounterThreshold_4 : IfxIom.h
  • IfxIom_EventCounterThreshold_5 : IfxIom.h
  • IfxIom_EventCounterThreshold_6 : IfxIom.h
  • IfxIom_EventCounterThreshold_7 : IfxIom.h
  • IfxIom_EventCounterThreshold_8 : IfxIom.h
  • IfxIom_EventCounterThreshold_9 : IfxIom.h
  • IfxIom_EventCounterThreshold_disable : IfxIom.h
  • IfxIom_EventSource_monitor : IfxIom.h
  • IfxIom_EventSource_reference : IfxIom.h
  • IfxIom_FilterMode_delayedDebounce : IfxIom.h
  • IfxIom_FilterMode_fallingEdgeDelayedRisingEdgeImmediateDebounce : IfxIom.h
  • IfxIom_FilterMode_fallingEdgeImmediateDebounce : IfxIom.h
  • IfxIom_FilterMode_FallingEdgePrescaler : IfxIom.h
  • IfxIom_FilterMode_immediateDebounce : IfxIom.h
  • IfxIom_FilterMode_risingEdgeDelayedFallingEdgeImmediateDebounce : IfxIom.h
  • IfxIom_FilterMode_risingEdgeImmediateDebounce : IfxIom.h
  • IfxIom_FilterMode_risingEdgePrescaler : IfxIom.h
  • IfxIom_FpcChannelId_0 : IfxIom.h
  • IfxIom_FpcChannelId_1 : IfxIom.h
  • IfxIom_FpcChannelId_10 : IfxIom.h
  • IfxIom_FpcChannelId_11 : IfxIom.h
  • IfxIom_FpcChannelId_12 : IfxIom.h
  • IfxIom_FpcChannelId_13 : IfxIom.h
  • IfxIom_FpcChannelId_14 : IfxIom.h
  • IfxIom_FpcChannelId_15 : IfxIom.h
  • IfxIom_FpcChannelId_2 : IfxIom.h
  • IfxIom_FpcChannelId_3 : IfxIom.h
  • IfxIom_FpcChannelId_4 : IfxIom.h
  • IfxIom_FpcChannelId_5 : IfxIom.h
  • IfxIom_FpcChannelId_6 : IfxIom.h
  • IfxIom_FpcChannelId_7 : IfxIom.h
  • IfxIom_FpcChannelId_8 : IfxIom.h
  • IfxIom_FpcChannelId_9 : IfxIom.h
  • IfxIom_LamEventSource_mon : IfxIom.h
  • IfxIom_LamEventSource_monXorRef : IfxIom.h
  • IfxIom_LamEventTrigger_anyEdge : IfxIom.h
  • IfxIom_LamEventTrigger_fallingEdge : IfxIom.h
  • IfxIom_LamEventTrigger_none : IfxIom.h
  • IfxIom_LamEventTrigger_risingEdge : IfxIom.h
  • IfxIom_LamEventWindowClearEvent_anyEdge : IfxIom.h
  • IfxIom_LamEventWindowClearEvent_fallingEdge : IfxIom.h
  • IfxIom_LamEventWindowClearEvent_none : IfxIom.h
  • IfxIom_LamEventWindowClearEvent_risingEdge : IfxIom.h
  • IfxIom_LamEventWindowControlSource_mon : IfxIom.h
  • IfxIom_LamEventWindowControlSource_ref : IfxIom.h
  • IfxIom_LamEventWindowRunControl_freeRunning : IfxIom.h
  • IfxIom_LamEventWindowRunControl_gated : IfxIom.h
  • IfxIom_LamFilterMode_delayDebounceBothEdge : IfxIom.h
  • IfxIom_LamFilterMode_delayDebounceRisingEdgeImmediateDebounceFallingEdge : IfxIom.h
  • IfxIom_LamFilterMode_immediateDebounceBothEdge : IfxIom.h
  • IfxIom_LamFilterMode_immediateDebounceFallingEdge : IfxIom.h
  • IfxIom_LamFilterMode_immediateDebounceRisingEdge : IfxIom.h
  • IfxIom_LamFilterMode_immediateDebounceRisingEdgeDelayDebounceFallingEdge : IfxIom.h
  • IfxIom_LamFilterMode_noFilter : IfxIom.h
  • IfxIom_LamFilterMode_prescalerOnFallingEdge : IfxIom.h
  • IfxIom_LamFilterMode_prescalerOnRisingEdge : IfxIom.h
  • IfxIom_LamId_0 : IfxIom.h
  • IfxIom_LamId_1 : IfxIom.h
  • IfxIom_LamId_10 : IfxIom.h
  • IfxIom_LamId_11 : IfxIom.h
  • IfxIom_LamId_12 : IfxIom.h
  • IfxIom_LamId_13 : IfxIom.h
  • IfxIom_LamId_14 : IfxIom.h
  • IfxIom_LamId_15 : IfxIom.h
  • IfxIom_LamId_2 : IfxIom.h
  • IfxIom_LamId_3 : IfxIom.h
  • IfxIom_LamId_4 : IfxIom.h
  • IfxIom_LamId_5 : IfxIom.h
  • IfxIom_LamId_6 : IfxIom.h
  • IfxIom_LamId_7 : IfxIom.h
  • IfxIom_LamId_8 : IfxIom.h
  • IfxIom_LamId_9 : IfxIom.h
  • IfxIom_LamMonitorInputChannel_0 : IfxIom.h
  • IfxIom_LamMonitorInputChannel_1 : IfxIom.h
  • IfxIom_LamMonitorInputChannel_10 : IfxIom.h
  • IfxIom_LamMonitorInputChannel_11 : IfxIom.h
  • IfxIom_LamMonitorInputChannel_12 : IfxIom.h
  • IfxIom_LamMonitorInputChannel_13 : IfxIom.h
  • IfxIom_LamMonitorInputChannel_14 : IfxIom.h
  • IfxIom_LamMonitorInputChannel_15 : IfxIom.h
  • IfxIom_LamMonitorInputChannel_2 : IfxIom.h
  • IfxIom_LamMonitorInputChannel_3 : IfxIom.h
  • IfxIom_LamMonitorInputChannel_4 : IfxIom.h
  • IfxIom_LamMonitorInputChannel_5 : IfxIom.h
  • IfxIom_LamMonitorInputChannel_6 : IfxIom.h
  • IfxIom_LamMonitorInputChannel_7 : IfxIom.h
  • IfxIom_LamMonitorInputChannel_8 : IfxIom.h
  • IfxIom_LamMonitorInputChannel_9 : IfxIom.h
  • IfxIom_LamMonitorSource_directFpcMonitor : IfxIom.h
  • IfxIom_LamMonitorSource_exoredFpcMonitor : IfxIom.h
  • IfxIom_LamReferenceInputChannel_0 : IfxIom.h
  • IfxIom_LamReferenceInputChannel_1 : IfxIom.h
  • IfxIom_LamReferenceInputChannel_10 : IfxIom.h
  • IfxIom_LamReferenceInputChannel_11 : IfxIom.h
  • IfxIom_LamReferenceInputChannel_12 : IfxIom.h
  • IfxIom_LamReferenceInputChannel_13 : IfxIom.h
  • IfxIom_LamReferenceInputChannel_14 : IfxIom.h
  • IfxIom_LamReferenceInputChannel_15 : IfxIom.h
  • IfxIom_LamReferenceInputChannel_2 : IfxIom.h
  • IfxIom_LamReferenceInputChannel_3 : IfxIom.h
  • IfxIom_LamReferenceInputChannel_4 : IfxIom.h
  • IfxIom_LamReferenceInputChannel_5 : IfxIom.h
  • IfxIom_LamReferenceInputChannel_6 : IfxIom.h
  • IfxIom_LamReferenceInputChannel_7 : IfxIom.h
  • IfxIom_LamReferenceInputChannel_8 : IfxIom.h
  • IfxIom_LamReferenceInputChannel_9 : IfxIom.h
  • IfxIom_LamRunMode_freeRunning : IfxIom.h
  • IfxIom_LamRunMode_gated : IfxIom.h
  • IfxIom_MonInput_asclin0Atx : IfxIom_cfg.h
  • IfxIom_MonInput_asclin1Atx : IfxIom_cfg.h
  • IfxIom_MonInput_asclin2Atx : IfxIom_cfg.h
  • IfxIom_MonInput_asclin3Atx : IfxIom_cfg.h
  • IfxIom_MonInput_canNode0Txd : IfxIom_cfg.h
  • IfxIom_MonInput_canNode1Txd : IfxIom_cfg.h
  • IfxIom_MonInput_canNode2Txd : IfxIom_cfg.h
  • IfxIom_MonInput_canNode3Txd : IfxIom_cfg.h
  • IfxIom_MonInput_ccu60Cc60 : IfxIom_cfg.h
  • IfxIom_MonInput_ccu60Cc61 : IfxIom_cfg.h
  • IfxIom_MonInput_ccu60Cc62 : IfxIom_cfg.h
  • IfxIom_MonInput_ccu60Cout60 : IfxIom_cfg.h
  • IfxIom_MonInput_ccu60Cout61 : IfxIom_cfg.h
  • IfxIom_MonInput_ccu60Cout62 : IfxIom_cfg.h
  • IfxIom_MonInput_ccu60Cout63 : IfxIom_cfg.h
  • IfxIom_MonInput_ccu61Cc60 : IfxIom_cfg.h
  • IfxIom_MonInput_ccu61Cc61 : IfxIom_cfg.h
  • IfxIom_MonInput_ccu61Cc62 : IfxIom_cfg.h
  • IfxIom_MonInput_ccu61Cout60 : IfxIom_cfg.h
  • IfxIom_MonInput_ccu61Cout61 : IfxIom_cfg.h
  • IfxIom_MonInput_ccu61Cout62 : IfxIom_cfg.h
  • IfxIom_MonInput_ccu61Cout63 : IfxIom_cfg.h
  • IfxIom_MonInput_gnd : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout104 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout105 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout106 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout22 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout23 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout24 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout25 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout26 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout27 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout28 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout29 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout30 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout31 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout32 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout33 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout34 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout68 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout69 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout70 : IfxIom_cfg.h
  • IfxIom_MonInput_p20_12 : IfxIom_cfg.h
  • IfxIom_MonInput_p20_13 : IfxIom_cfg.h
  • IfxIom_MonInput_p20_14 : IfxIom_cfg.h
  • IfxIom_MonInput_p33_0 : IfxIom_cfg.h
  • IfxIom_MonInput_p33_1 : IfxIom_cfg.h
  • IfxIom_MonInput_p33_10 : IfxIom_cfg.h
  • IfxIom_MonInput_p33_11 : IfxIom_cfg.h
  • IfxIom_MonInput_p33_12 : IfxIom_cfg.h
  • IfxIom_MonInput_p33_2 : IfxIom_cfg.h
  • IfxIom_MonInput_p33_3 : IfxIom_cfg.h
  • IfxIom_MonInput_p33_4 : IfxIom_cfg.h
  • IfxIom_MonInput_p33_5 : IfxIom_cfg.h
  • IfxIom_MonInput_p33_6 : IfxIom_cfg.h
  • IfxIom_MonInput_p33_7 : IfxIom_cfg.h
  • IfxIom_MonInput_p33_8 : IfxIom_cfg.h
  • IfxIom_MonInput_p33_9 : IfxIom_cfg.h
  • IfxIom_MonInput_psi5Psitx0 : IfxIom_cfg.h
  • IfxIom_MonInput_psi5Psitx1 : IfxIom_cfg.h
  • IfxIom_MonInput_qspi0Mrst : IfxIom_cfg.h
  • IfxIom_MonInput_qspi1Mrst : IfxIom_cfg.h
  • IfxIom_MonInput_qspi2Mrst : IfxIom_cfg.h
  • IfxIom_MonInput_qspi3Mrst : IfxIom_cfg.h
  • IfxIom_MonInputSignal_0 : IfxIom_cfg.h
  • IfxIom_MonInputSignal_1 : IfxIom_cfg.h
  • IfxIom_MonInputSignal_2 : IfxIom_cfg.h
  • IfxIom_MonInputSignal_p : IfxIom_cfg.h
  • IfxIom_MonitorSignal_0 : IfxIom.h
  • IfxIom_MonitorSignal_1 : IfxIom.h
  • IfxIom_MonitorSignal_2 : IfxIom.h
  • IfxIom_MonitorSignal_portLogic : IfxIom.h
  • IfxIom_ReferenceSignal_0 : IfxIom.h
  • IfxIom_ReferenceSignal_1 : IfxIom.h
  • IfxIom_ReferenceSignal_2 : IfxIom.h
  • IfxIom_ReferenceSignal_gtmEXORCombiner : IfxIom.h
  • IfxIom_ReferenceSignal_portLogic : IfxIom.h
  • IfxIom_RefInput_asclin0Atx : IfxIom_cfg.h
  • IfxIom_RefInput_asclin1Atx : IfxIom_cfg.h
  • IfxIom_RefInput_asclin2Atx : IfxIom_cfg.h
  • IfxIom_RefInput_asclin3Atx : IfxIom_cfg.h
  • IfxIom_RefInput_canNode0Txd : IfxIom_cfg.h
  • IfxIom_RefInput_canNode1Txd : IfxIom_cfg.h
  • IfxIom_RefInput_canNode2Txd : IfxIom_cfg.h
  • IfxIom_RefInput_canNode3Txd : IfxIom_cfg.h
  • IfxIom_RefInput_ccu60Cc60 : IfxIom_cfg.h
  • IfxIom_RefInput_ccu60Cc61 : IfxIom_cfg.h
  • IfxIom_RefInput_ccu60Cc62 : IfxIom_cfg.h
  • IfxIom_RefInput_ccu60Cout60 : IfxIom_cfg.h
  • IfxIom_RefInput_ccu60Cout61 : IfxIom_cfg.h
  • IfxIom_RefInput_ccu60Cout62 : IfxIom_cfg.h
  • IfxIom_RefInput_ccu60Cout63 : IfxIom_cfg.h
  • IfxIom_RefInput_ccu61Cc60 : IfxIom_cfg.h
  • IfxIom_RefInput_ccu61Cc61 : IfxIom_cfg.h
  • IfxIom_RefInput_ccu61Cc62 : IfxIom_cfg.h
  • IfxIom_RefInput_ccu61Cout60 : IfxIom_cfg.h
  • IfxIom_RefInput_ccu61Cout61 : IfxIom_cfg.h
  • IfxIom_RefInput_ccu61Cout62 : IfxIom_cfg.h
  • IfxIom_RefInput_ccu61Cout63 : IfxIom_cfg.h
  • IfxIom_RefInput_exorCombiner : IfxIom_cfg.h
  • IfxIom_RefInput_gnd : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout0 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout1 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout10 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout107 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout108 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout109 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout11 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout12 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout13 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout14 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout15 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout2 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout3 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout4 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout5 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout6 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout7 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout8 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout9 : IfxIom_cfg.h
  • IfxIom_RefInput_p20_12 : IfxIom_cfg.h
  • IfxIom_RefInput_p20_13 : IfxIom_cfg.h
  • IfxIom_RefInput_p20_14 : IfxIom_cfg.h
  • IfxIom_RefInput_p33_0 : IfxIom_cfg.h
  • IfxIom_RefInput_p33_1 : IfxIom_cfg.h
  • IfxIom_RefInput_p33_10 : IfxIom_cfg.h
  • IfxIom_RefInput_p33_11 : IfxIom_cfg.h
  • IfxIom_RefInput_p33_12 : IfxIom_cfg.h
  • IfxIom_RefInput_p33_2 : IfxIom_cfg.h
  • IfxIom_RefInput_p33_3 : IfxIom_cfg.h
  • IfxIom_RefInput_p33_4 : IfxIom_cfg.h
  • IfxIom_RefInput_p33_5 : IfxIom_cfg.h
  • IfxIom_RefInput_p33_6 : IfxIom_cfg.h
  • IfxIom_RefInput_p33_7 : IfxIom_cfg.h
  • IfxIom_RefInput_p33_8 : IfxIom_cfg.h
  • IfxIom_RefInput_p33_9 : IfxIom_cfg.h
  • IfxIom_RefInput_psi5Psitx0 : IfxIom_cfg.h
  • IfxIom_RefInput_psi5Psitx2 : IfxIom_cfg.h
  • IfxIom_RefInput_qspi0Mrst : IfxIom_cfg.h
  • IfxIom_RefInput_qspi1Mrst : IfxIom_cfg.h
  • IfxIom_RefInput_qspi2Mrst : IfxIom_cfg.h
  • IfxIom_RefInput_qspi3Mrst : IfxIom_cfg.h
  • IfxIom_RefInputSignal_0 : IfxIom_cfg.h
  • IfxIom_RefInputSignal_1 : IfxIom_cfg.h
  • IfxIom_RefInputSignal_2 : IfxIom_cfg.h
  • IfxIom_RefInputSignal_p : IfxIom_cfg.h
  • IfxIom_RefInputSignal_xorCombiner : IfxIom_cfg.h
  • IfxIom_SleepMode_disable : IfxIom.h
  • IfxIom_SleepMode_enable : IfxIom.h
  • IfxMsc_ActivePhaseSelection_lowLevel : IfxMsc.h
  • IfxMsc_ActivePhaseSelection_none : IfxMsc.h
  • IfxMsc_AsynchronousBlock_bypassed : IfxMsc.h
  • IfxMsc_AsynchronousBlock_noBypassed : IfxMsc.h
  • IfxMsc_ChipSelectActiveState_high : IfxMsc.h
  • IfxMsc_ChipSelectActiveState_low : IfxMsc.h
  • IfxMsc_ClockSelect_fper : IfxMsc.h
  • IfxMsc_ClockSelect_noClock : IfxMsc.h
  • IfxMsc_CommandDataCommandRepetitionMode_disabled : IfxMsc.h
  • IfxMsc_CommandDataCommandRepetitionMode_enabled : IfxMsc.h
  • IfxMsc_CommandFrameInterrupt_disabled : IfxMsc.h
  • IfxMsc_CommandFrameInterrupt_enabled : IfxMsc.h
  • IfxMsc_CommandFrameInterruptNode_SR0 : IfxMsc.h
  • IfxMsc_CommandFrameInterruptNode_SR1 : IfxMsc.h
  • IfxMsc_CommandFrameInterruptNode_SR2 : IfxMsc.h
  • IfxMsc_CommandFrameInterruptNode_SR3 : IfxMsc.h
  • IfxMsc_CommandFrameLength_0 : IfxMsc.h
  • IfxMsc_CommandFrameLength_1 : IfxMsc.h
  • IfxMsc_CommandFrameLength_10 : IfxMsc.h
  • IfxMsc_CommandFrameLength_11 : IfxMsc.h
  • IfxMsc_CommandFrameLength_12 : IfxMsc.h
  • IfxMsc_CommandFrameLength_13 : IfxMsc.h
  • IfxMsc_CommandFrameLength_14 : IfxMsc.h
  • IfxMsc_CommandFrameLength_15 : IfxMsc.h
  • IfxMsc_CommandFrameLength_16 : IfxMsc.h
  • IfxMsc_CommandFrameLength_17 : IfxMsc.h
  • IfxMsc_CommandFrameLength_18 : IfxMsc.h
  • IfxMsc_CommandFrameLength_19 : IfxMsc.h
  • IfxMsc_CommandFrameLength_2 : IfxMsc.h
  • IfxMsc_CommandFrameLength_20 : IfxMsc.h
  • IfxMsc_CommandFrameLength_21 : IfxMsc.h
  • IfxMsc_CommandFrameLength_22 : IfxMsc.h
  • IfxMsc_CommandFrameLength_23 : IfxMsc.h
  • IfxMsc_CommandFrameLength_24 : IfxMsc.h
  • IfxMsc_CommandFrameLength_25 : IfxMsc.h
  • IfxMsc_CommandFrameLength_26 : IfxMsc.h
  • IfxMsc_CommandFrameLength_27 : IfxMsc.h
  • IfxMsc_CommandFrameLength_28 : IfxMsc.h
  • IfxMsc_CommandFrameLength_29 : IfxMsc.h
  • IfxMsc_CommandFrameLength_3 : IfxMsc.h
  • IfxMsc_CommandFrameLength_30 : IfxMsc.h
  • IfxMsc_CommandFrameLength_31 : IfxMsc.h
  • IfxMsc_CommandFrameLength_32 : IfxMsc.h
  • IfxMsc_CommandFrameLength_4 : IfxMsc.h
  • IfxMsc_CommandFrameLength_5 : IfxMsc.h
  • IfxMsc_CommandFrameLength_6 : IfxMsc.h
  • IfxMsc_CommandFrameLength_7 : IfxMsc.h
  • IfxMsc_CommandFrameLength_8 : IfxMsc.h
  • IfxMsc_CommandFrameLength_9 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_0 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_1 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_10 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_100 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_101 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_102 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_103 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_104 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_105 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_106 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_107 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_108 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_109 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_11 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_110 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_111 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_112 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_113 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_114 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_115 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_116 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_117 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_118 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_119 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_12 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_120 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_121 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_122 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_123 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_124 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_125 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_126 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_127 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_13 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_14 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_15 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_16 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_17 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_18 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_19 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_2 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_20 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_21 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_22 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_23 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_24 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_25 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_26 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_27 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_28 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_29 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_3 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_30 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_31 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_32 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_33 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_34 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_35 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_36 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_37 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_38 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_39 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_4 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_40 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_41 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_42 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_43 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_44 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_45 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_46 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_47 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_48 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_49 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_5 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_50 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_51 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_52 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_53 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_54 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_55 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_56 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_57 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_58 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_59 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_6 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_60 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_61 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_62 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_63 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_64 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_65 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_66 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_67 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_68 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_69 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_7 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_70 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_71 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_72 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_73 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_74 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_75 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_76 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_77 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_78 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_79 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_8 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_80 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_81 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_82 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_83 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_84 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_85 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_86 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_87 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_88 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_89 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_9 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_90 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_91 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_92 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_93 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_94 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_95 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_96 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_97 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_98 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_99 : IfxMsc.h
  • IfxMsc_DataFrameExtensionPassivePhaseLength_0 : IfxMsc.h
  • IfxMsc_DataFrameExtensionPassivePhaseLength_1 : IfxMsc.h
  • IfxMsc_DataFrameExtensionPassivePhaseLength_2 : IfxMsc.h
  • IfxMsc_DataFrameExtensionPassivePhaseLength_3 : IfxMsc.h
  • IfxMsc_DataFrameInterrupt_atFirstDataBit : IfxMsc.h
  • IfxMsc_DataFrameInterrupt_atLastDataBit : IfxMsc.h
  • IfxMsc_DataFrameInterrupt_disabled : IfxMsc.h
  • IfxMsc_DataFrameInterruptNode_SR0 : IfxMsc.h
  • IfxMsc_DataFrameInterruptNode_SR1 : IfxMsc.h
  • IfxMsc_DataFrameInterruptNode_SR2 : IfxMsc.h
  • IfxMsc_DataFrameInterruptNode_SR3 : IfxMsc.h
  • IfxMsc_DataFrameLength_0 : IfxMsc.h
  • IfxMsc_DataFrameLength_1 : IfxMsc.h
  • IfxMsc_DataFrameLength_10 : IfxMsc.h
  • IfxMsc_DataFrameLength_11 : IfxMsc.h
  • IfxMsc_DataFrameLength_12 : IfxMsc.h
  • IfxMsc_DataFrameLength_13 : IfxMsc.h
  • IfxMsc_DataFrameLength_14 : IfxMsc.h
  • IfxMsc_DataFrameLength_15 : IfxMsc.h
  • IfxMsc_DataFrameLength_16 : IfxMsc.h
  • IfxMsc_DataFrameLength_2 : IfxMsc.h
  • IfxMsc_DataFrameLength_3 : IfxMsc.h
  • IfxMsc_DataFrameLength_4 : IfxMsc.h
  • IfxMsc_DataFrameLength_5 : IfxMsc.h
  • IfxMsc_DataFrameLength_6 : IfxMsc.h
  • IfxMsc_DataFrameLength_7 : IfxMsc.h
  • IfxMsc_DataFrameLength_8 : IfxMsc.h
  • IfxMsc_DataFrameLength_9 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_10 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_11 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_12 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_13 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_14 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_15 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_16 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_17 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_18 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_19 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_2 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_20 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_21 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_22 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_23 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_24 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_25 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_26 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_27 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_28 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_29 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_3 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_30 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_31 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_32 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_4 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_5 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_6 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_7 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_8 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_9 : IfxMsc.h
  • IfxMsc_DividerMode_fractional : IfxMsc.h
  • IfxMsc_DividerMode_normal : IfxMsc.h
  • IfxMsc_EmergencyStop_disabled : IfxMsc.h
  • IfxMsc_EmergencyStop_enabled : IfxMsc.h
  • IfxMsc_Extension_disabled : IfxMsc.h
  • IfxMsc_Extension_enabled : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_0 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_1 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_10 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_11 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_12 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_13 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_14 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_15 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_16 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_17 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_18 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_19 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_2 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_20 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_21 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_22 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_23 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_24 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_25 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_26 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_27 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_28 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_29 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_3 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_30 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_31 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_32 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_33 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_34 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_35 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_36 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_37 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_38 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_39 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_4 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_40 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_41 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_42 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_43 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_44 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_45 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_46 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_47 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_48 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_49 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_5 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_50 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_51 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_52 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_53 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_54 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_55 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_56 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_57 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_58 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_59 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_6 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_60 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_61 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_62 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_63 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_7 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_8 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_9 : IfxMsc.h
  • IfxMsc_ExternalSignalInjection_disabled : IfxMsc.h
  • IfxMsc_ExternalSignalInjection_enabled : IfxMsc.h
  • IfxMsc_FastMode_disabled : IfxMsc.h
  • IfxMsc_FastMode_enabled : IfxMsc.h
  • IfxMsc_FclClockControlEnabled_activePhaseOnly : IfxMsc.h
  • IfxMsc_FclClockControlEnabled_always : IfxMsc.h
  • IfxMsc_FclLinePolarity_inverted : IfxMsc.h
  • IfxMsc_FclLinePolarity_nonInverted : IfxMsc.h
  • IfxMsc_HardwareClock_disabled : IfxMsc.h
  • IfxMsc_HardwareClock_enabled : IfxMsc.h
  • IfxMsc_Index_0 : IfxMsc_cfg.h
  • IfxMsc_Index_1 : IfxMsc_cfg.h
  • IfxMsc_Index_2 : IfxMsc_cfg.h
  • IfxMsc_Index_none : IfxMsc_cfg.h
  • IfxMsc_InterruptServiceRequest_0 : IfxMsc.h
  • IfxMsc_InterruptServiceRequest_1 : IfxMsc.h
  • IfxMsc_InterruptServiceRequest_2 : IfxMsc.h
  • IfxMsc_InterruptServiceRequest_3 : IfxMsc.h
  • IfxMsc_InterruptServiceRequest_4 : IfxMsc.h
  • IfxMsc_ModuleSuspendRequestBit_hardSuspend : IfxMsc.h
  • IfxMsc_ModuleSuspendRequestBit_noSuspend : IfxMsc.h
  • IfxMsc_ModuleSuspendRequestBit_softSuspend : IfxMsc.h
  • IfxMsc_MsbBitDataExtension_notPresent : IfxMsc.h
  • IfxMsc_MsbBitDataExtension_present : IfxMsc.h
  • IfxMsc_Msc_Target_high : IfxMsc_Msc.h
  • IfxMsc_Msc_Target_low : IfxMsc_Msc.h
  • IfxMsc_NDividerAbra_1 : IfxMsc.h
  • IfxMsc_NDividerAbra_2 : IfxMsc.h
  • IfxMsc_NDividerAbra_3 : IfxMsc.h
  • IfxMsc_NDividerAbra_4 : IfxMsc.h
  • IfxMsc_NDividerAbra_5 : IfxMsc.h
  • IfxMsc_NDividerAbra_6 : IfxMsc.h
  • IfxMsc_NDividerAbra_7 : IfxMsc.h
  • IfxMsc_NDividerAbra_8 : IfxMsc.h
  • IfxMsc_NDividerDownstream_1 : IfxMsc.h
  • IfxMsc_NDividerDownstream_10 : IfxMsc.h
  • IfxMsc_NDividerDownstream_11 : IfxMsc.h
  • IfxMsc_NDividerDownstream_12 : IfxMsc.h
  • IfxMsc_NDividerDownstream_13 : IfxMsc.h
  • IfxMsc_NDividerDownstream_14 : IfxMsc.h
  • IfxMsc_NDividerDownstream_15 : IfxMsc.h
  • IfxMsc_NDividerDownstream_16 : IfxMsc.h
  • IfxMsc_NDividerDownstream_2 : IfxMsc.h
  • IfxMsc_NDividerDownstream_3 : IfxMsc.h
  • IfxMsc_NDividerDownstream_4 : IfxMsc.h
  • IfxMsc_NDividerDownstream_5 : IfxMsc.h
  • IfxMsc_NDividerDownstream_6 : IfxMsc.h
  • IfxMsc_NDividerDownstream_7 : IfxMsc.h
  • IfxMsc_NDividerDownstream_8 : IfxMsc.h
  • IfxMsc_NDividerDownstream_9 : IfxMsc.h
  • IfxMsc_OverflowInterrupt_disabled : IfxMsc.h
  • IfxMsc_OverflowInterrupt_enabled : IfxMsc.h
  • IfxMsc_OverflowInterruptNode_SR0 : IfxMsc.h
  • IfxMsc_OverflowInterruptNode_SR1 : IfxMsc.h
  • IfxMsc_OverflowInterruptNode_SR2 : IfxMsc.h
  • IfxMsc_OverflowInterruptNode_SR3 : IfxMsc.h
  • IfxMsc_OverflowInterruptNode_SR4 : IfxMsc.h
  • IfxMsc_Parity_even : IfxMsc.h
  • IfxMsc_Parity_odd : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_0 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_1 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_10 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_11 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_12 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_13 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_14 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_15 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_2 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_3 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_4 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_5 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_6 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_7 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_8 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_9 : IfxMsc.h
  • IfxMsc_ReceiveDataInterrupt_disabled : IfxMsc.h
  • IfxMsc_ReceiveDataInterrupt_onDataReceive : IfxMsc.h
  • IfxMsc_ReceiveDataInterrupt_onDataReceiveInUd3 : IfxMsc.h
  • IfxMsc_ReceiveDataInterrupt_onRdieSet : IfxMsc.h
  • IfxMsc_ReceiveDataInterruptNode_SR0 : IfxMsc.h
  • IfxMsc_ReceiveDataInterruptNode_SR1 : IfxMsc.h
  • IfxMsc_ReceiveDataInterruptNode_SR2 : IfxMsc.h
  • IfxMsc_ReceiveDataInterruptNode_SR3 : IfxMsc.h
  • IfxMsc_SdiLinePolarity_invertedSi : IfxMsc.h
  • IfxMsc_SdiLinePolarity_likeSi : IfxMsc.h
  • IfxMsc_SerialDataInput_0 : IfxMsc.h
  • IfxMsc_SerialDataInput_1 : IfxMsc.h
  • IfxMsc_SerialDataInput_2 : IfxMsc.h
  • IfxMsc_SerialDataInput_3 : IfxMsc.h
  • IfxMsc_SerialDataInput_4 : IfxMsc.h
  • IfxMsc_SerialDataInput_5 : IfxMsc.h
  • IfxMsc_SerialDataInput_6 : IfxMsc.h
  • IfxMsc_SerialDataInput_7 : IfxMsc.h
  • IfxMsc_ServiceRequestDelay_1bit : IfxMsc.h
  • IfxMsc_ServiceRequestDelay_noDelay : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_1 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_10 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_11 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_12 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_13 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_14 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_15 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_16 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_2 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_3 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_4 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_5 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_6 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_7 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_8 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_9 : IfxMsc.h
  • IfxMsc_SleepMode_disable : IfxMsc.h
  • IfxMsc_SleepMode_enable : IfxMsc.h
  • IfxMsc_SoLinePolarity_inverted : IfxMsc.h
  • IfxMsc_SoLinePolarity_nonInverted : IfxMsc.h
  • IfxMsc_Source_alternateInputLine : IfxMsc.h
  • IfxMsc_Source_alternateInputLineInverted : IfxMsc.h
  • IfxMsc_Source_downstreamDataRegister : IfxMsc.h
  • IfxMsc_SuspendMode_hard : IfxMsc.h
  • IfxMsc_SuspendMode_none : IfxMsc.h
  • IfxMsc_SuspendMode_soft : IfxMsc.h
  • IfxMsc_Target_en0 : IfxMsc.h
  • IfxMsc_Target_en1 : IfxMsc.h
  • IfxMsc_Target_en2 : IfxMsc.h
  • IfxMsc_Target_en3 : IfxMsc.h
  • IfxMsc_TimeFrameInterrupt_disabled : IfxMsc.h
  • IfxMsc_TimeFrameInterrupt_enabled : IfxMsc.h
  • IfxMsc_TimeFrameInterruptNode_SR0 : IfxMsc.h
  • IfxMsc_TimeFrameInterruptNode_SR1 : IfxMsc.h
  • IfxMsc_TimeFrameInterruptNode_SR2 : IfxMsc.h
  • IfxMsc_TimeFrameInterruptNode_SR3 : IfxMsc.h
  • IfxMsc_TransmissionMode_dataRepetition : IfxMsc.h
  • IfxMsc_TransmissionMode_triggered : IfxMsc.h
  • IfxMsc_UnderflowInterrupt_disabled : IfxMsc.h
  • IfxMsc_UnderflowInterrupt_enabled : IfxMsc.h
  • IfxMsc_UnderflowInterruptNode_SR0 : IfxMsc.h
  • IfxMsc_UnderflowInterruptNode_SR1 : IfxMsc.h
  • IfxMsc_UnderflowInterruptNode_SR2 : IfxMsc.h
  • IfxMsc_UnderflowInterruptNode_SR3 : IfxMsc.h
  • IfxMsc_UnderflowInterruptNode_SR4 : IfxMsc.h
  • IfxMsc_UpstreamChannelFrameType_12bit : IfxMsc.h
  • IfxMsc_UpstreamChannelFrameType_16bit : IfxMsc.h
  • IfxMsc_UpstreamChannelReceivingRate_128 : IfxMsc.h
  • IfxMsc_UpstreamChannelReceivingRate_16 : IfxMsc.h
  • IfxMsc_UpstreamChannelReceivingRate_256 : IfxMsc.h
  • IfxMsc_UpstreamChannelReceivingRate_32 : IfxMsc.h
  • IfxMsc_UpstreamChannelReceivingRate_4 : IfxMsc.h
  • IfxMsc_UpstreamChannelReceivingRate_64 : IfxMsc.h
  • IfxMsc_UpstreamChannelReceivingRate_8 : IfxMsc.h
  • IfxMsc_UpstreamChannelReceivingRate_disabled : IfxMsc.h
  • IfxMsc_UpstreamTimeoutInterrupt_disabled : IfxMsc.h
  • IfxMsc_UpstreamTimeoutInterrupt_enabled : IfxMsc.h
  • IfxMsc_UpstreamTimeoutInterruptNode_SR0 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutInterruptNode_SR1 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutInterruptNode_SR2 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutInterruptNode_SR3 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutInterruptNode_SR4 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_1 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_1024 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_128 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_16 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_16384 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_2 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_2048 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_256 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_32 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_32768 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_4 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_4096 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_512 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_64 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_8 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_8192 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_1 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_10 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_11 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_12 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_13 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_14 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_15 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_16 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_2 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_3 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_4 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_5 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_6 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_7 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_8 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_9 : IfxMsc.h
  • IfxMtu_MbistSel_cpu0Dlmu : IfxMtu_cfg.h
  • IfxMtu_MbistSel_cpu0Dspr : IfxMtu_cfg.h
  • IfxMtu_MbistSel_cpu0Dspr1 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_cpu0Dtag : IfxMtu_cfg.h
  • IfxMtu_MbistSel_cpu0Pspr : IfxMtu_cfg.h
  • IfxMtu_MbistSel_cpu0Ptag : IfxMtu_cfg.h
  • IfxMtu_MbistSel_cpu1Dlmu : IfxMtu_cfg.h
  • IfxMtu_MbistSel_cpu1Dspr : IfxMtu_cfg.h
  • IfxMtu_MbistSel_cpu1Dspr1 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_cpu1Dtag : IfxMtu_cfg.h
  • IfxMtu_MbistSel_cpu1Pspr : IfxMtu_cfg.h
  • IfxMtu_MbistSel_cpu1Ptag : IfxMtu_cfg.h
  • IfxMtu_MbistSel_cpu2Dlmu : IfxMtu_cfg.h
  • IfxMtu_MbistSel_cpu2Dspr : IfxMtu_cfg.h
  • IfxMtu_MbistSel_cpu2Dtag : IfxMtu_cfg.h
  • IfxMtu_MbistSel_cpu2Pspr : IfxMtu_cfg.h
  • IfxMtu_MbistSel_cpu2Ptag : IfxMtu_cfg.h
  • IfxMtu_MbistSel_cpu3Dlmu : IfxMtu_cfg.h
  • IfxMtu_MbistSel_cpu3Dspr : IfxMtu_cfg.h
  • IfxMtu_MbistSel_cpu3Dtag : IfxMtu_cfg.h
  • IfxMtu_MbistSel_cpu3Pspr : IfxMtu_cfg.h
  • IfxMtu_MbistSel_cpu3Ptag : IfxMtu_cfg.h
  • IfxMtu_MbistSel_dam0 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_dma : IfxMtu_cfg.h
  • IfxMtu_MbistSel_eray0IbfTbf : IfxMtu_cfg.h
  • IfxMtu_MbistSel_eray0Mbf : IfxMtu_cfg.h
  • IfxMtu_MbistSel_eray0Obf : IfxMtu_cfg.h
  • IfxMtu_MbistSel_eray1IbfTbf : IfxMtu_cfg.h
  • IfxMtu_MbistSel_eray1Mbf : IfxMtu_cfg.h
  • IfxMtu_MbistSel_eray1Obf : IfxMtu_cfg.h
  • IfxMtu_MbistSel_ethermacRx : IfxMtu_cfg.h
  • IfxMtu_MbistSel_ethermacTx : IfxMtu_cfg.h
  • IfxMtu_MbistSel_gtmDpll1a : IfxMtu_cfg.h
  • IfxMtu_MbistSel_gtmDpll1b : IfxMtu_cfg.h
  • IfxMtu_MbistSel_gtmDpll2 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_gtmFifo : IfxMtu_cfg.h
  • IfxMtu_MbistSel_gtmMcs0Fast : IfxMtu_cfg.h
  • IfxMtu_MbistSel_gtmMcs0Slow : IfxMtu_cfg.h
  • IfxMtu_MbistSel_gtmMcs1Fast : IfxMtu_cfg.h
  • IfxMtu_MbistSel_gtmMcs1Slow : IfxMtu_cfg.h
  • IfxMtu_MbistSel_lmu0 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_mcan0 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_mcan1 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_mcan2 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_miniMcds : IfxMtu_cfg.h
  • IfxMtu_MbistSel_none : IfxMtu_cfg.h
  • IfxMtu_MbistSel_psi5 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_scrIram : IfxMtu_cfg.h
  • IfxMtu_MbistSel_scrXram : IfxMtu_cfg.h
  • IfxPmsEvr_EnableInterrupt_esr0wkp : IfxPmsEvr.h
  • IfxPmsEvr_EnableInterrupt_esr1wkp : IfxPmsEvr.h
  • IfxPmsEvr_EnableInterrupt_evrcmod : IfxPmsEvr.h
  • IfxPmsEvr_EnableInterrupt_ov33 : IfxPmsEvr.h
  • IfxPmsEvr_EnableInterrupt_ovc : IfxPmsEvr.h
  • IfxPmsEvr_EnableInterrupt_ovddm : IfxPmsEvr.h
  • IfxPmsEvr_EnableInterrupt_ovpre : IfxPmsEvr.h
  • IfxPmsEvr_EnableInterrupt_ovsb : IfxPmsEvr.h
  • IfxPmsEvr_EnableInterrupt_ovswd : IfxPmsEvr.h
  • IfxPmsEvr_EnableInterrupt_pinawkp : IfxPmsEvr.h
  • IfxPmsEvr_EnableInterrupt_pinbwkp : IfxPmsEvr.h
  • IfxPmsEvr_EnableInterrupt_screcc : IfxPmsEvr.h
  • IfxPmsEvr_EnableInterrupt_scrint : IfxPmsEvr.h
  • IfxPmsEvr_EnableInterrupt_scrrst : IfxPmsEvr.h
  • IfxPmsEvr_EnableInterrupt_scrwdt : IfxPmsEvr.h
  • IfxPmsEvr_EnableInterrupt_sdvok : IfxPmsEvr.h
  • IfxPmsEvr_EnableInterrupt_swdlvl : IfxPmsEvr.h
  • IfxPmsEvr_EnableInterrupt_synclck : IfxPmsEvr.h
  • IfxPmsEvr_EnableInterrupt_uv33 : IfxPmsEvr.h
  • IfxPmsEvr_EnableInterrupt_uvc : IfxPmsEvr.h
  • IfxPmsEvr_EnableInterrupt_uvddm : IfxPmsEvr.h
  • IfxPmsEvr_EnableInterrupt_uvpre : IfxPmsEvr.h
  • IfxPmsEvr_EnableInterrupt_uvsb : IfxPmsEvr.h
  • IfxPmsEvr_EnableInterrupt_uvswd : IfxPmsEvr.h
  • IfxPmsEvr_EnableInterrupt_wutwkp : IfxPmsEvr.h
  • IfxPmsEvr_EvrcMode_disableMode : IfxPmsEvr.h
  • IfxPmsEvr_EvrcMode_lowPowerMode : IfxPmsEvr.h
  • IfxPmsEvr_EvrcMode_pwmMode : IfxPmsEvr.h
  • IfxPmsEvr_EvrcMode_startupMode : IfxPmsEvr.h
  • IfxPmsEvr_ExtSyncSwitchingFreqDivFactor_1 : IfxPmsEvr.h
  • IfxPmsEvr_ExtSyncSwitchingFreqDivFactor_16 : IfxPmsEvr.h
  • IfxPmsEvr_ExtSyncSwitchingFreqDivFactor_2 : IfxPmsEvr.h
  • IfxPmsEvr_ExtSyncSwitchingFreqDivFactor_32 : IfxPmsEvr.h
  • IfxPmsEvr_ExtSyncSwitchingFreqDivFactor_4 : IfxPmsEvr.h
  • IfxPmsEvr_ExtSyncSwitchingFreqDivFactor_8 : IfxPmsEvr.h
  • IfxPmsEvr_OverVoltageMonitoring_eitherDirectionVoltageTransition : IfxPmsEvr.h
  • IfxPmsEvr_OverVoltageMonitoring_highToLowVoltageTransition : IfxPmsEvr.h
  • IfxPmsEvr_OverVoltageMonitoring_inactive : IfxPmsEvr.h
  • IfxPmsEvr_OverVoltageMonitoring_lowToHighVoltageTransition : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_0 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_1 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_10 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_11 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_12 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_13 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_14 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_15 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_16 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_17 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_18 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_19 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_2 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_20 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_21 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_22 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_23 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_24 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_25 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_26 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_27 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_28 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_29 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_3 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_30 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_31 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_32 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_33 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_34 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_35 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_36 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_37 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_38 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_39 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_4 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_40 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_41 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_42 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_43 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_44 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_45 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_46 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_47 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_48 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_49 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_5 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_50 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_51 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_52 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_53 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_54 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_55 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_56 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_57 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_58 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_59 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_6 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_60 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_61 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_62 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_63 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_7 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_8 : IfxPmsEvr.h
  • IfxPmsEvr_PrimaryAdcTrimValue_9 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level0 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level1 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level10 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level11 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level12 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level13 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level14 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level15 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level16 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level17 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level18 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level19 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level2 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level20 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level21 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level22 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level23 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level24 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level25 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level26 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level27 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level28 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level29 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level3 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level30 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level31 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level32 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level33 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level34 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level35 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level36 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level37 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level38 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level39 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level4 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level40 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level41 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level42 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level43 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level44 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level45 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level46 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level47 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level48 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level49 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level5 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level50 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level51 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level52 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level53 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level54 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level55 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level56 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level57 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level58 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level59 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level6 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level60 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level61 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level62 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level63 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level7 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level8 : IfxPmsEvr.h
  • IfxPmsEvr_SecondaryVoltageErrorCounter_level9 : IfxPmsEvr.h
  • IfxPmsEvr_SupplyFilter_avgAdcConversionResult0 : IfxPmsEvr.h
  • IfxPmsEvr_SupplyFilter_avgAdcConversionResult1 : IfxPmsEvr.h
  • IfxPmsEvr_SupplyFilter_avgAdcConversionResult10 : IfxPmsEvr.h
  • IfxPmsEvr_SupplyFilter_avgAdcConversionResult11 : IfxPmsEvr.h
  • IfxPmsEvr_SupplyFilter_avgAdcConversionResult12 : IfxPmsEvr.h
  • IfxPmsEvr_SupplyFilter_avgAdcConversionResult13 : IfxPmsEvr.h
  • IfxPmsEvr_SupplyFilter_avgAdcConversionResult14 : IfxPmsEvr.h
  • IfxPmsEvr_SupplyFilter_avgAdcConversionResult2 : IfxPmsEvr.h
  • IfxPmsEvr_SupplyFilter_avgAdcConversionResult3 : IfxPmsEvr.h
  • IfxPmsEvr_SupplyFilter_avgAdcConversionResult4 : IfxPmsEvr.h
  • IfxPmsEvr_SupplyFilter_avgAdcConversionResult5 : IfxPmsEvr.h
  • IfxPmsEvr_SupplyFilter_avgAdcConversionResult6 : IfxPmsEvr.h
  • IfxPmsEvr_SupplyFilter_avgAdcConversionResult7 : IfxPmsEvr.h
  • IfxPmsEvr_SupplyFilter_avgAdcConversionResult8 : IfxPmsEvr.h
  • IfxPmsEvr_SupplyFilter_avgAdcConversionResult9 : IfxPmsEvr.h
  • IfxPmsEvr_SupplyFilter_eachConversionResult : IfxPmsEvr.h
  • IfxPmsEvr_SupplyMode_evr33 : IfxPmsEvr.h
  • IfxPmsEvr_SupplyMode_evrc : IfxPmsEvr.h
  • IfxPmsEvr_SupplyMode_evrpr : IfxPmsEvr.h
  • IfxPmsEvr_SupplyMode_sb : IfxPmsEvr.h
  • IfxPmsEvr_SupplyMode_swd : IfxPmsEvr.h
  • IfxPmsEvr_SupplyMode_vddm : IfxPmsEvr.h
  • IfxPmsEvr_UnderVoltageMonitoring_eitherDirectionVoltageTransition : IfxPmsEvr.h
  • IfxPmsEvr_UnderVoltageMonitoring_highToLowVoltageTransition : IfxPmsEvr.h
  • IfxPmsEvr_UnderVoltageMonitoring_inactive : IfxPmsEvr.h
  • IfxPmsEvr_UnderVoltageMonitoring_lowToHighVoltageTransition : IfxPmsEvr.h
  • IfxPmsPm_BlankingFilterDelay_0ms : IfxPmsPm.h
  • IfxPmsPm_BlankingFilterDelay_10240ms : IfxPmsPm.h
  • IfxPmsPm_BlankingFilterDelay_10ms : IfxPmsPm.h
  • IfxPmsPm_BlankingFilterDelay_1280ms : IfxPmsPm.h
  • IfxPmsPm_BlankingFilterDelay_160ms : IfxPmsPm.h
  • IfxPmsPm_BlankingFilterDelay_20ms : IfxPmsPm.h
  • IfxPmsPm_BlankingFilterDelay_2560ms : IfxPmsPm.h
  • IfxPmsPm_BlankingFilterDelay_2_5ms : IfxPmsPm.h
  • IfxPmsPm_BlankingFilterDelay_320ms : IfxPmsPm.h
  • IfxPmsPm_BlankingFilterDelay_40ms : IfxPmsPm.h
  • IfxPmsPm_BlankingFilterDelay_5120ms : IfxPmsPm.h
  • IfxPmsPm_BlankingFilterDelay_5ms : IfxPmsPm.h
  • IfxPmsPm_BlankingFilterDelay_640ms : IfxPmsPm.h
  • IfxPmsPm_BlankingFilterDelay_80ms : IfxPmsPm.h
  • IfxPmsPm_DigitalFilter_bypassed : IfxPmsPm.h
  • IfxPmsPm_DigitalFilter_used : IfxPmsPm.h
  • IfxPmsPm_EdgeDetectionControl_always : IfxPmsPm.h
  • IfxPmsPm_EdgeDetectionControl_never : IfxPmsPm.h
  • IfxPmsPm_EdgeDetectionControl_onFallingEdge : IfxPmsPm.h
  • IfxPmsPm_EdgeDetectionControl_onRisingEdge : IfxPmsPm.h
  • IfxPmsPm_Esr0PinStateRequest_resetOutput : IfxPmsPm.h
  • IfxPmsPm_Esr0PinStateRequest_tristate : IfxPmsPm.h
  • IfxPmsPm_LoadJumpStatus_hwTriggeredRequestActive : IfxPmsPm.h
  • IfxPmsPm_LoadJumpStatus_inactive : IfxPmsPm.h
  • IfxPmsPm_LoadJumpStatus_swTriggeredRequestActive : IfxPmsPm.h
  • IfxPmsPm_PadStateRequest_inputWithWeakPullUp : IfxPmsPm.h
  • IfxPmsPm_PadStateRequest_tristate : IfxPmsPm.h
  • IfxPmsPm_PinEdgeTriggerEvent_bothRisingAndFallingEdge : IfxPmsPm.h
  • IfxPmsPm_PinEdgeTriggerEvent_fallingEdge : IfxPmsPm.h
  • IfxPmsPm_PinEdgeTriggerEvent_none : IfxPmsPm.h
  • IfxPmsPm_PinEdgeTriggerEvent_risingEdge : IfxPmsPm.h
  • IfxPmsPm_RampingMode_both : IfxPmsPm.h
  • IfxPmsPm_RampingMode_down : IfxPmsPm.h
  • IfxPmsPm_RampingMode_none : IfxPmsPm.h
  • IfxPmsPm_RampingMode_up : IfxPmsPm.h
  • IfxPmsPm_RequestPowerMode_idle : IfxPmsPm.h
  • IfxPmsPm_RequestPowerMode_run : IfxPmsPm.h
  • IfxPmsPm_RequestPowerMode_sleep : IfxPmsPm.h
  • IfxPmsPm_RequestPowerMode_standby : IfxPmsPm.h
  • IfxPmsPm_ScrClocking_100mhzOptional : IfxPmsPm.h
  • IfxPmsPm_ScrClocking_bothClocksActiive : IfxPmsPm.h
  • IfxPmsPm_StandbyRamSupply_cpu0Block0 : IfxPmsPm.h
  • IfxPmsPm_StandbyRamSupply_cpu0Block01 : IfxPmsPm.h
  • IfxPmsPm_StandbyRamSupply_cpu0Cpu1 : IfxPmsPm.h
  • IfxPmsPm_StandbyRamSupply_cpu1Block01 : IfxPmsPm.h
  • IfxPmsPm_StandbyRamSupply_never : IfxPmsPm.h
  • IfxPmsPm_StandbyTriggerMode_hardware_nmi : IfxPmsPm.h
  • IfxPmsPm_StandbyTriggerMode_hardware_undervoltage : IfxPmsPm.h
  • IfxPmsPm_StandbyTriggerMode_software : IfxPmsPm.h
  • IfxPmsPm_ThresholdEvent_overvoltage : IfxPmsPm.h
  • IfxPmsPm_ThresholdEvent_undervoltage : IfxPmsPm.h
  • IfxPmsPm_VoltageDroopRequest_negative : IfxPmsPm.h
  • IfxPmsPm_VoltageDroopRequest_positive : IfxPmsPm.h
  • IfxPmsPm_VoltageDroopStatus_hwTriggeredRequestActive : IfxPmsPm.h
  • IfxPmsPm_VoltageDroopStatus_inactive : IfxPmsPm.h
  • IfxPmsPm_VoltageDroopStatus_swTriggeredRequestActive : IfxPmsPm.h
  • IfxPmsPm_VoltageDroopStep_0mV : IfxPmsPm.h
  • IfxPmsPm_VoltageDroopStep_10mV : IfxPmsPm.h
  • IfxPmsPm_VoltageDroopStep_15mV : IfxPmsPm.h
  • IfxPmsPm_VoltageDroopStep_20mV : IfxPmsPm.h
  • IfxPmsPm_VoltageDroopStep_25mV : IfxPmsPm.h
  • IfxPmsPm_VoltageDroopStep_30mV : IfxPmsPm.h
  • IfxPmsPm_VoltageDroopStep_35mV : IfxPmsPm.h
  • IfxPmsPm_VoltageDroopStep_40mV : IfxPmsPm.h
  • IfxPmsPm_VoltageDroopStep_45mV : IfxPmsPm.h
  • IfxPmsPm_VoltageDroopStep_50mV : IfxPmsPm.h
  • IfxPmsPm_VoltageDroopStep_55mV : IfxPmsPm.h
  • IfxPmsPm_VoltageDroopStep_5mV : IfxPmsPm.h
  • IfxPmsPm_VoltageDroopStep_60mV : IfxPmsPm.h
  • IfxPmsPm_VoltageDroopStep_65mV : IfxPmsPm.h
  • IfxPmsPm_VoltageDroopStep_70mV : IfxPmsPm.h
  • IfxPmsPm_VoltageDroopStep_75mV : IfxPmsPm.h
  • IfxPmsPm_VoltageSource_vdd : IfxPmsPm.h
  • IfxPmsPm_VoltageSource_vddm : IfxPmsPm.h
  • IfxPmsPm_VoltageSource_vddp3 : IfxPmsPm.h
  • IfxPmsPm_VoltageSource_vddpd : IfxPmsPm.h
  • IfxPmsPm_VoltageSource_vevrsb : IfxPmsPm.h
  • IfxPmsPm_VoltageSource_vext : IfxPmsPm.h
  • IfxPmsPm_WakeupOn_esr0 : IfxPmsPm.h
  • IfxPmsPm_WakeupOn_esr1 : IfxPmsPm.h
  • IfxPmsPm_WakeupOn_pinA : IfxPmsPm.h
  • IfxPmsPm_WakeupOn_pinB : IfxPmsPm.h
  • IfxPmsPm_WakeupOn_porst : IfxPmsPm.h
  • IfxPmsPm_WakeupOn_power : IfxPmsPm.h
  • IfxPmsPm_WakeupOn_scr : IfxPmsPm.h
  • IfxPmsPm_WakeupOn_timer : IfxPmsPm.h
  • IfxPmsPm_WakeupTimerMode_autoReload : IfxPmsPm.h
  • IfxPmsPm_WakeupTimerMode_autoStop : IfxPmsPm.h
  • IfxPmsPm_WutClock_68Hz : IfxPmsPm.h
  • IfxPmsPm_WutClock_70kHz : IfxPmsPm.h
  • IfxPort_ControlledBy_hsct : IfxPort.h
  • IfxPort_ControlledBy_port : IfxPort.h
  • IfxPort_Index_00 : IfxPort_cfg.h
  • IfxPort_Index_01 : IfxPort_cfg.h
  • IfxPort_Index_02 : IfxPort_cfg.h
  • IfxPort_Index_10 : IfxPort_cfg.h
  • IfxPort_Index_11 : IfxPort_cfg.h
  • IfxPort_Index_12 : IfxPort_cfg.h
  • IfxPort_Index_13 : IfxPort_cfg.h
  • IfxPort_Index_14 : IfxPort_cfg.h
  • IfxPort_Index_15 : IfxPort_cfg.h
  • IfxPort_Index_20 : IfxPort_cfg.h
  • IfxPort_Index_21 : IfxPort_cfg.h
  • IfxPort_Index_22 : IfxPort_cfg.h
  • IfxPort_Index_23 : IfxPort_cfg.h
  • IfxPort_Index_24 : IfxPort_cfg.h
  • IfxPort_Index_25 : IfxPort_cfg.h
  • IfxPort_Index_26 : IfxPort_cfg.h
  • IfxPort_Index_30 : IfxPort_cfg.h
  • IfxPort_Index_31 : IfxPort_cfg.h
  • IfxPort_Index_32 : IfxPort_cfg.h
  • IfxPort_Index_33 : IfxPort_cfg.h
  • IfxPort_Index_34 : IfxPort_cfg.h
  • IfxPort_Index_40 : IfxPort_cfg.h
  • IfxPort_Index_41 : IfxPort_cfg.h
  • IfxPort_Index_none : IfxPort_cfg.h
  • IfxPort_InputMode_noPullDevice : IfxPort.h
  • IfxPort_InputMode_pullDown : IfxPort.h
  • IfxPort_InputMode_pullUp : IfxPort.h
  • IfxPort_InputMode_undefined : IfxPort.h
  • IfxPort_LvdsDirection_rx : IfxPort.h
  • IfxPort_LvdsDirection_tx : IfxPort.h
  • IfxPort_LvdsMode_high : IfxPort.h
  • IfxPort_LvdsMode_medium : IfxPort.h
  • IfxPort_LvdsPath_disable : IfxPort.h
  • IfxPort_LvdsPath_enable : IfxPort.h
  • IfxPort_LvdsPullDown_disable : IfxPort.h
  • IfxPort_LvdsPullDown_enable : IfxPort.h
  • IfxPort_LvdsTerminationMode_external : IfxPort.h
  • IfxPort_LvdsTerminationMode_internal : IfxPort.h
  • IfxPort_Mode_inputNoPullDevice : IfxPort.h
  • IfxPort_Mode_inputPullDown : IfxPort.h
  • IfxPort_Mode_inputPullUp : IfxPort.h
  • IfxPort_Mode_outputOpenDrainAlt1 : IfxPort.h
  • IfxPort_Mode_outputOpenDrainAlt2 : IfxPort.h
  • IfxPort_Mode_outputOpenDrainAlt3 : IfxPort.h
  • IfxPort_Mode_outputOpenDrainAlt4 : IfxPort.h
  • IfxPort_Mode_outputOpenDrainAlt5 : IfxPort.h
  • IfxPort_Mode_outputOpenDrainAlt6 : IfxPort.h
  • IfxPort_Mode_outputOpenDrainAlt7 : IfxPort.h
  • IfxPort_Mode_outputOpenDrainGeneral : IfxPort.h
  • IfxPort_Mode_outputPushPullAlt1 : IfxPort.h
  • IfxPort_Mode_outputPushPullAlt2 : IfxPort.h
  • IfxPort_Mode_outputPushPullAlt3 : IfxPort.h
  • IfxPort_Mode_outputPushPullAlt4 : IfxPort.h
  • IfxPort_Mode_outputPushPullAlt5 : IfxPort.h
  • IfxPort_Mode_outputPushPullAlt6 : IfxPort.h
  • IfxPort_Mode_outputPushPullAlt7 : IfxPort.h
  • IfxPort_Mode_outputPushPullGeneral : IfxPort.h
  • IfxPort_OutputIdx_alt1 : IfxPort.h
  • IfxPort_OutputIdx_alt2 : IfxPort.h
  • IfxPort_OutputIdx_alt3 : IfxPort.h
  • IfxPort_OutputIdx_alt4 : IfxPort.h
  • IfxPort_OutputIdx_alt5 : IfxPort.h
  • IfxPort_OutputIdx_alt6 : IfxPort.h
  • IfxPort_OutputIdx_alt7 : IfxPort.h
  • IfxPort_OutputIdx_general : IfxPort.h
  • IfxPort_OutputMode_none : IfxPort.h
  • IfxPort_OutputMode_openDrain : IfxPort.h
  • IfxPort_OutputMode_pushPull : IfxPort.h
  • IfxPort_PadDriver_cmosAutomotiveSpeed1 : IfxPort.h
  • IfxPort_PadDriver_cmosAutomotiveSpeed2 : IfxPort.h
  • IfxPort_PadDriver_cmosAutomotiveSpeed3 : IfxPort.h
  • IfxPort_PadDriver_cmosAutomotiveSpeed4 : IfxPort.h
  • IfxPort_PadDriver_ttl3v3Speed1 : IfxPort.h
  • IfxPort_PadDriver_ttl3v3Speed2 : IfxPort.h
  • IfxPort_PadDriver_ttl3v3Speed3 : IfxPort.h
  • IfxPort_PadDriver_ttl3v3Speed4 : IfxPort.h
  • IfxPort_PadDriver_ttlSpeed1 : IfxPort.h
  • IfxPort_PadDriver_ttlSpeed2 : IfxPort.h
  • IfxPort_PadDriver_ttlSpeed3 : IfxPort.h
  • IfxPort_PadDriver_ttlSpeed4 : IfxPort.h
  • IfxPort_PadSupply_3v : IfxPort.h
  • IfxPort_PadSupply_5v : IfxPort.h
  • IfxPort_PinFunctionMode_analog : IfxPort.h
  • IfxPort_PinFunctionMode_digital : IfxPort.h
  • IfxPort_State_high : IfxPort.h
  • IfxPort_State_low : IfxPort.h
  • IfxPort_State_notChanged : IfxPort.h
  • IfxPort_State_toggled : IfxPort.h
  • IfxPsi5_AlternateInput_0 : IfxPsi5.h
  • IfxPsi5_AlternateInput_1 : IfxPsi5.h
  • IfxPsi5_AlternateInput_2 : IfxPsi5.h
  • IfxPsi5_AlternateInput_3 : IfxPsi5.h
  • IfxPsi5_BaudRate_125 : IfxPsi5.h
  • IfxPsi5_BaudRate_189 : IfxPsi5.h
  • IfxPsi5_ChannelId_0 : IfxPsi5_cfg.h
  • IfxPsi5_ChannelId_1 : IfxPsi5_cfg.h
  • IfxPsi5_ChannelId_2 : IfxPsi5_cfg.h
  • IfxPsi5_ChannelId_3 : IfxPsi5_cfg.h
  • IfxPsi5_ChannelId_none : IfxPsi5_cfg.h
  • IfxPsi5_ClockType_fastClock_189 : IfxPsi5.h
  • IfxPsi5_ClockType_fracDiv : IfxPsi5.h
  • IfxPsi5_ClockType_slowClock_125 : IfxPsi5.h
  • IfxPsi5_ClockType_timeStamp : IfxPsi5.h
  • IfxPsi5_CRCorParity_crc : IfxPsi5.h
  • IfxPsi5_CRCorParity_parity : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_0 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_1 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_10 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_11 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_12 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_13 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_14 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_15 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_2 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_3 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_4 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_5 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_6 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_7 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_8 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_9 : IfxPsi5.h
  • IfxPsi5_DividerMode_fractional : IfxPsi5.h
  • IfxPsi5_DividerMode_normal : IfxPsi5.h
  • IfxPsi5_DividerMode_off : IfxPsi5.h
  • IfxPsi5_DividerMode_spb : IfxPsi5.h
  • IfxPsi5_FractionalDividerRegister_highbitrate : IfxPsi5.h
  • IfxPsi5_FractionalDividerRegister_lowbitrate : IfxPsi5.h
  • IfxPsi5_FractionalDividerRegister_normal : IfxPsi5.h
  • IfxPsi5_FractionalDividerRegister_timestamp : IfxPsi5.h
  • IfxPsi5_FrameExpectation_expected : IfxPsi5.h
  • IfxPsi5_FrameExpectation_notExpected : IfxPsi5.h
  • IfxPsi5_InterruptNodePointer_erri : IfxPsi5.h
  • IfxPsi5_InterruptNodePointer_fwi : IfxPsi5.h
  • IfxPsi5_InterruptNodePointer_rbi : IfxPsi5.h
  • IfxPsi5_InterruptNodePointer_rdi : IfxPsi5.h
  • IfxPsi5_InterruptNodePointer_rsi : IfxPsi5.h
  • IfxPsi5_InterruptNodePointer_sdi : IfxPsi5.h
  • IfxPsi5_InterruptNodePointer_tbi : IfxPsi5.h
  • IfxPsi5_InterruptNodePointer_tdi : IfxPsi5.h
  • IfxPsi5_InterruptRequest_disabled : IfxPsi5.h
  • IfxPsi5_InterruptRequest_enabled : IfxPsi5.h
  • IfxPsi5_InterruptServiceRequest_0 : IfxPsi5.h
  • IfxPsi5_InterruptServiceRequest_1 : IfxPsi5.h
  • IfxPsi5_InterruptServiceRequest_2 : IfxPsi5.h
  • IfxPsi5_InterruptServiceRequest_3 : IfxPsi5.h
  • IfxPsi5_InterruptServiceRequest_4 : IfxPsi5.h
  • IfxPsi5_InterruptServiceRequest_5 : IfxPsi5.h
  • IfxPsi5_InterruptServiceRequest_6 : IfxPsi5.h
  • IfxPsi5_InterruptServiceRequest_7 : IfxPsi5.h
  • IfxPsi5_InterruptSource_crci : IfxPsi5.h
  • IfxPsi5_InterruptSource_fwi : IfxPsi5.h
  • IfxPsi5_InterruptSource_mei : IfxPsi5.h
  • IfxPsi5_InterruptSource_nbi : IfxPsi5.h
  • IfxPsi5_InterruptSource_nfi : IfxPsi5.h
  • IfxPsi5_InterruptSource_rbi : IfxPsi5.h
  • IfxPsi5_InterruptSource_rdi : IfxPsi5.h
  • IfxPsi5_InterruptSource_rmi : IfxPsi5.h
  • IfxPsi5_InterruptSource_rsi : IfxPsi5.h
  • IfxPsi5_InterruptSource_rui : IfxPsi5.h
  • IfxPsi5_InterruptSource_scri0 : IfxPsi5.h
  • IfxPsi5_InterruptSource_scri1 : IfxPsi5.h
  • IfxPsi5_InterruptSource_scri2 : IfxPsi5.h
  • IfxPsi5_InterruptSource_scri3 : IfxPsi5.h
  • IfxPsi5_InterruptSource_scri4 : IfxPsi5.h
  • IfxPsi5_InterruptSource_scri5 : IfxPsi5.h
  • IfxPsi5_InterruptSource_sdi0 : IfxPsi5.h
  • IfxPsi5_InterruptSource_sdi1 : IfxPsi5.h
  • IfxPsi5_InterruptSource_sdi2 : IfxPsi5.h
  • IfxPsi5_InterruptSource_sdi3 : IfxPsi5.h
  • IfxPsi5_InterruptSource_sdi4 : IfxPsi5.h
  • IfxPsi5_InterruptSource_sdi5 : IfxPsi5.h
  • IfxPsi5_InterruptSource_soi0 : IfxPsi5.h
  • IfxPsi5_InterruptSource_soi1 : IfxPsi5.h
  • IfxPsi5_InterruptSource_soi2 : IfxPsi5.h
  • IfxPsi5_InterruptSource_soi3 : IfxPsi5.h
  • IfxPsi5_InterruptSource_soi4 : IfxPsi5.h
  • IfxPsi5_InterruptSource_soi5 : IfxPsi5.h
  • IfxPsi5_InterruptSource_tei : IfxPsi5.h
  • IfxPsi5_InterruptSource_toi : IfxPsi5.h
  • IfxPsi5_InterruptSource_tooi : IfxPsi5.h
  • IfxPsi5_InterruptSource_tpi : IfxPsi5.h
  • IfxPsi5_InterruptSource_tpoi : IfxPsi5.h
  • IfxPsi5_InterruptSource_tsi : IfxPsi5.h
  • IfxPsi5_InterruptSource_tsoi : IfxPsi5.h
  • IfxPsi5_InterruptSource_wsi0 : IfxPsi5.h
  • IfxPsi5_InterruptSource_wsi1 : IfxPsi5.h
  • IfxPsi5_InterruptSource_wsi2 : IfxPsi5.h
  • IfxPsi5_InterruptSource_wsi3 : IfxPsi5.h
  • IfxPsi5_InterruptSource_wsi4 : IfxPsi5.h
  • IfxPsi5_InterruptSource_wsi5 : IfxPsi5.h
  • IfxPsi5_InterruptStatusRegister_a : IfxPsi5.h
  • IfxPsi5_InterruptStatusRegister_b : IfxPsi5.h
  • IfxPsi5_MessagingBits_absent : IfxPsi5.h
  • IfxPsi5_MessagingBits_present : IfxPsi5.h
  • IfxPsi5_ReceiveDataRegisterTimestamp_frame : IfxPsi5.h
  • IfxPsi5_ReceiveDataRegisterTimestamp_pulse : IfxPsi5.h
  • IfxPsi5_ReceiverControlRegister_a : IfxPsi5.h
  • IfxPsi5_ReceiverControlRegister_b : IfxPsi5.h
  • IfxPsi5_ReceiverControlRegister_c : IfxPsi5.h
  • IfxPsi5_SleepMode_disable : IfxPsi5.h
  • IfxPsi5_SleepMode_enable : IfxPsi5.h
  • IfxPsi5_Slot_0 : IfxPsi5.h
  • IfxPsi5_Slot_1 : IfxPsi5.h
  • IfxPsi5_Slot_2 : IfxPsi5.h
  • IfxPsi5_Slot_3 : IfxPsi5.h
  • IfxPsi5_Slot_4 : IfxPsi5.h
  • IfxPsi5_Slot_5 : IfxPsi5.h
  • IfxPsi5_SuspendMode_hard : IfxPsi5.h
  • IfxPsi5_SuspendMode_none : IfxPsi5.h
  • IfxPsi5_SuspendMode_soft : IfxPsi5.h
  • IfxPsi5_TimeBase_external : IfxPsi5.h
  • IfxPsi5_TimeBase_internal : IfxPsi5.h
  • IfxPsi5_TimestampRegister_a : IfxPsi5.h
  • IfxPsi5_TimestampRegister_b : IfxPsi5.h
  • IfxPsi5_TimestampRegister_c : IfxPsi5.h
  • IfxPsi5_Trigger_0 : IfxPsi5.h
  • IfxPsi5_Trigger_1 : IfxPsi5.h
  • IfxPsi5_Trigger_2 : IfxPsi5.h
  • IfxPsi5_Trigger_3 : IfxPsi5.h
  • IfxPsi5_Trigger_4 : IfxPsi5.h
  • IfxPsi5_Trigger_5 : IfxPsi5.h
  • IfxPsi5_TriggerOutput_0 : IfxPsi5.h
  • IfxPsi5_TriggerOutput_1 : IfxPsi5.h
  • IfxPsi5_TriggerOutput_2 : IfxPsi5.h
  • IfxPsi5_TriggerOutput_3 : IfxPsi5.h
  • IfxPsi5_TriggerOutput_4 : IfxPsi5.h
  • IfxPsi5_TriggerOutput_5 : IfxPsi5.h
  • IfxPsi5_TriggerOutput_6 : IfxPsi5.h
  • IfxPsi5_TriggerOutput_7 : IfxPsi5.h
  • IfxPsi5_TriggerType_bypass : IfxPsi5.h
  • IfxPsi5_TriggerType_external : IfxPsi5.h
  • IfxPsi5_TriggerType_periodic : IfxPsi5.h
  • IfxPsi5_Verbose_off : IfxPsi5.h
  • IfxPsi5_Verbose_on : IfxPsi5.h
  • IfxPsi5s_AlternateInput_0 : IfxPsi5s.h
  • IfxPsi5s_AlternateInput_1 : IfxPsi5s.h
  • IfxPsi5s_AlternateInput_2 : IfxPsi5s.h
  • IfxPsi5s_AlternateInput_3 : IfxPsi5s.h
  • IfxPsi5s_AscBaudratePrescalar_divideBy2 : IfxPsi5s.h
  • IfxPsi5s_AscBaudratePrescalar_divideBy3 : IfxPsi5s.h
  • IfxPsi5s_AscMode_async_7bitDataWithParity : IfxPsi5s.h
  • IfxPsi5s_AscMode_async_8bitData : IfxPsi5s.h
  • IfxPsi5s_AscMode_async_8bitDataWithParity : IfxPsi5s.h
  • IfxPsi5s_AscMode_async_8bitDataWithWakeup : IfxPsi5s.h
  • IfxPsi5s_AscMode_async_9bitData : IfxPsi5s.h
  • IfxPsi5s_AscMode_sync : IfxPsi5s.h
  • IfxPsi5s_AscStopBits_1 : IfxPsi5s.h
  • IfxPsi5s_AscStopBits_2 : IfxPsi5s.h
  • IfxPsi5s_ChannelId_0 : IfxPsi5s.h
  • IfxPsi5s_ChannelId_1 : IfxPsi5s.h
  • IfxPsi5s_ChannelId_2 : IfxPsi5s.h
  • IfxPsi5s_ChannelId_3 : IfxPsi5s.h
  • IfxPsi5s_ChannelId_4 : IfxPsi5s.h
  • IfxPsi5s_ChannelId_5 : IfxPsi5s.h
  • IfxPsi5s_ChannelId_6 : IfxPsi5s.h
  • IfxPsi5s_ChannelId_7 : IfxPsi5s.h
  • IfxPsi5s_ChannelId_none : IfxPsi5s.h
  • IfxPsi5s_ClockType_ascFracDiv : IfxPsi5s.h
  • IfxPsi5s_ClockType_ascOutput : IfxPsi5s.h
  • IfxPsi5s_ClockType_fracDiv : IfxPsi5s.h
  • IfxPsi5s_ClockType_timeStamp : IfxPsi5s.h
  • IfxPsi5s_CrcOrParity_crc : IfxPsi5s.h
  • IfxPsi5s_CrcOrParity_parity : IfxPsi5s.h
  • IfxPsi5s_DividerMode_fractional : IfxPsi5s.h
  • IfxPsi5s_DividerMode_normal : IfxPsi5s.h
  • IfxPsi5s_DividerMode_off : IfxPsi5s.h
  • IfxPsi5s_DividerMode_spb : IfxPsi5s.h
  • IfxPsi5s_EnhancedProtocol_pulseWidth_frameFormat_1to3 : IfxPsi5s.h
  • IfxPsi5s_EnhancedProtocol_pulseWidth_frameFormat_4 : IfxPsi5s.h
  • IfxPsi5s_EnhancedProtocol_toothGapMethod : IfxPsi5s.h
  • IfxPsi5s_FrameId_frameHeader : IfxPsi5s.h
  • IfxPsi5s_FrameId_rollingNumber : IfxPsi5s.h
  • IfxPsi5s_GlobalInterruptSource_eir : IfxPsi5s.h
  • IfxPsi5s_GlobalInterruptSource_foi : IfxPsi5s.h
  • IfxPsi5s_GlobalInterruptSource_rir : IfxPsi5s.h
  • IfxPsi5s_GlobalInterruptSource_tbir : IfxPsi5s.h
  • IfxPsi5s_GlobalInterruptSource_tir : IfxPsi5s.h
  • IfxPsi5s_GlobalInterruptSource_xcrci : IfxPsi5s.h
  • IfxPsi5s_IdleTime_1 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_10 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_11 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_12 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_13 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_14 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_15 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_16 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_2 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_3 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_4 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_5 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_6 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_7 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_8 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_9 : IfxPsi5s.h
  • IfxPsi5s_InterruptRequest_disabled : IfxPsi5s.h
  • IfxPsi5s_InterruptRequest_enabled : IfxPsi5s.h
  • IfxPsi5s_InterruptSource_chci : IfxPsi5s.h
  • IfxPsi5s_InterruptSource_crci : IfxPsi5s.h
  • IfxPsi5s_InterruptSource_hdi : IfxPsi5s.h
  • IfxPsi5s_InterruptSource_rbi : IfxPsi5s.h
  • IfxPsi5s_InterruptSource_rdi : IfxPsi5s.h
  • IfxPsi5s_InterruptSource_rsi : IfxPsi5s.h
  • IfxPsi5s_InterruptSource_tei : IfxPsi5s.h
  • IfxPsi5s_InterruptSource_tpi : IfxPsi5s.h
  • IfxPsi5s_InterruptSource_tpoi : IfxPsi5s.h
  • IfxPsi5s_LoopBackMode_disable : IfxPsi5s.h
  • IfxPsi5s_LoopBackMode_enable : IfxPsi5s.h
  • IfxPsi5s_MessagingBits_absent : IfxPsi5s.h
  • IfxPsi5s_MessagingBits_present : IfxPsi5s.h
  • IfxPsi5s_NumberExpectedFrames_1 : IfxPsi5s.h
  • IfxPsi5s_NumberExpectedFrames_2 : IfxPsi5s.h
  • IfxPsi5s_NumberExpectedFrames_3 : IfxPsi5s.h
  • IfxPsi5s_NumberExpectedFrames_4 : IfxPsi5s.h
  • IfxPsi5s_NumberExpectedFrames_5 : IfxPsi5s.h
  • IfxPsi5s_NumberExpectedFrames_6 : IfxPsi5s.h
  • IfxPsi5s_SleepMode_disable : IfxPsi5s.h
  • IfxPsi5s_SleepMode_enable : IfxPsi5s.h
  • IfxPsi5s_SuspendMode_hard : IfxPsi5s.h
  • IfxPsi5s_SuspendMode_none : IfxPsi5s.h
  • IfxPsi5s_SuspendMode_soft : IfxPsi5s.h
  • IfxPsi5s_TimeBase_external : IfxPsi5s.h
  • IfxPsi5s_TimeBase_internal : IfxPsi5s.h
  • IfxPsi5s_TimeStampCount_started : IfxPsi5s.h
  • IfxPsi5s_TimeStampCount_stopped : IfxPsi5s.h
  • IfxPsi5s_TimestampRegister_a : IfxPsi5s.h
  • IfxPsi5s_TimestampRegister_b : IfxPsi5s.h
  • IfxPsi5s_TimestampTrigger_frame : IfxPsi5s.h
  • IfxPsi5s_TimestampTrigger_syncPulse : IfxPsi5s.h
  • IfxPsi5s_Trigger_0 : IfxPsi5s.h
  • IfxPsi5s_Trigger_1 : IfxPsi5s.h
  • IfxPsi5s_Trigger_2 : IfxPsi5s.h
  • IfxPsi5s_Trigger_3 : IfxPsi5s.h
  • IfxPsi5s_Trigger_4 : IfxPsi5s.h
  • IfxPsi5s_Trigger_5 : IfxPsi5s.h
  • IfxPsi5s_Trigger_6 : IfxPsi5s.h
  • IfxPsi5s_Trigger_7 : IfxPsi5s.h
  • IfxPsi5s_TriggerOutput_0 : IfxPsi5s.h
  • IfxPsi5s_TriggerOutput_1 : IfxPsi5s.h
  • IfxPsi5s_TriggerOutput_2 : IfxPsi5s.h
  • IfxPsi5s_TriggerOutput_3 : IfxPsi5s.h
  • IfxPsi5s_TriggerOutput_4 : IfxPsi5s.h
  • IfxPsi5s_TriggerOutput_5 : IfxPsi5s.h
  • IfxPsi5s_TriggerOutput_6 : IfxPsi5s.h
  • IfxPsi5s_TriggerOutput_7 : IfxPsi5s.h
  • IfxPsi5s_TriggerType_external : IfxPsi5s.h
  • IfxPsi5s_TriggerType_periodic : IfxPsi5s.h
  • IfxPsi5s_UartFrameCount_3 : IfxPsi5s.h
  • IfxPsi5s_UartFrameCount_4 : IfxPsi5s.h
  • IfxPsi5s_UartFrameCount_5 : IfxPsi5s.h
  • IfxPsi5s_UartFrameCount_6 : IfxPsi5s.h
  • IfxPsi5s_WatchdogTimerMode_frame : IfxPsi5s.h
  • IfxPsi5s_WatchdogTimerMode_syncPulse : IfxPsi5s.h
  • IfxQspi_ChannelId_0 : IfxQspi.h
  • IfxQspi_ChannelId_1 : IfxQspi.h
  • IfxQspi_ChannelId_10 : IfxQspi.h
  • IfxQspi_ChannelId_11 : IfxQspi.h
  • IfxQspi_ChannelId_12 : IfxQspi.h
  • IfxQspi_ChannelId_13 : IfxQspi.h
  • IfxQspi_ChannelId_14 : IfxQspi.h
  • IfxQspi_ChannelId_2 : IfxQspi.h
  • IfxQspi_ChannelId_3 : IfxQspi.h
  • IfxQspi_ChannelId_4 : IfxQspi.h
  • IfxQspi_ChannelId_5 : IfxQspi.h
  • IfxQspi_ChannelId_6 : IfxQspi.h
  • IfxQspi_ChannelId_7 : IfxQspi.h
  • IfxQspi_ChannelId_8 : IfxQspi.h
  • IfxQspi_ChannelId_9 : IfxQspi.h
  • IfxQspi_DataLengthUnit_bit : IfxQspi.h
  • IfxQspi_DataLengthUnit_byte : IfxQspi.h
  • IfxQspi_Error_baudrate : IfxQspi.h
  • IfxQspi_Error_configuration : IfxQspi.h
  • IfxQspi_Error_expectTimeout : IfxQspi.h
  • IfxQspi_Error_none : IfxQspi.h
  • IfxQspi_Error_parity : IfxQspi.h
  • IfxQspi_Error_rxfifoOverflow : IfxQspi.h
  • IfxQspi_Error_rxfifoUnderflow : IfxQspi.h
  • IfxQspi_Error_slsiMisplacedInactivation : IfxQspi.h
  • IfxQspi_Error_txfifoOverflow : IfxQspi.h
  • IfxQspi_Error_txfifoUnderflow : IfxQspi.h
  • IfxQspi_ExpectTimeout_1024 : IfxQspi.h
  • IfxQspi_ExpectTimeout_1048576 : IfxQspi.h
  • IfxQspi_ExpectTimeout_128 : IfxQspi.h
  • IfxQspi_ExpectTimeout_131072 : IfxQspi.h
  • IfxQspi_ExpectTimeout_16384 : IfxQspi.h
  • IfxQspi_ExpectTimeout_2048 : IfxQspi.h
  • IfxQspi_ExpectTimeout_2097152 : IfxQspi.h
  • IfxQspi_ExpectTimeout_256 : IfxQspi.h
  • IfxQspi_ExpectTimeout_262144 : IfxQspi.h
  • IfxQspi_ExpectTimeout_32768 : IfxQspi.h
  • IfxQspi_ExpectTimeout_4096 : IfxQspi.h
  • IfxQspi_ExpectTimeout_512 : IfxQspi.h
  • IfxQspi_ExpectTimeout_524288 : IfxQspi.h
  • IfxQspi_ExpectTimeout_64 : IfxQspi.h
  • IfxQspi_ExpectTimeout_65536 : IfxQspi.h
  • IfxQspi_ExpectTimeout_8192 : IfxQspi.h
  • IfxQspi_FifoMode_batchMove : IfxQspi.h
  • IfxQspi_FifoMode_combinedMove : IfxQspi.h
  • IfxQspi_FifoMode_singleMove : IfxQspi.h
  • IfxQspi_Index_0 : IfxQspi_cfg.h
  • IfxQspi_Index_1 : IfxQspi_cfg.h
  • IfxQspi_Index_2 : IfxQspi_cfg.h
  • IfxQspi_Index_3 : IfxQspi_cfg.h
  • IfxQspi_Index_4 : IfxQspi_cfg.h
  • IfxQspi_Index_none : IfxQspi_cfg.h
  • IfxQspi_Mode_master : IfxQspi.h
  • IfxQspi_Mode_pwmOverQspi : IfxQspi.h
  • IfxQspi_Mode_slave : IfxQspi.h
  • IfxQspi_PauseRunTransition_pause : IfxQspi.h
  • IfxQspi_PauseRunTransition_run : IfxQspi.h
  • IfxQspi_Phase_data : IfxQspi.h
  • IfxQspi_Phase_expect : IfxQspi.h
  • IfxQspi_Phase_idleA : IfxQspi.h
  • IfxQspi_Phase_idleB : IfxQspi.h
  • IfxQspi_Phase_lead : IfxQspi.h
  • IfxQspi_Phase_leadStrobe : IfxQspi.h
  • IfxQspi_Phase_trail : IfxQspi.h
  • IfxQspi_Phase_trailStrobe : IfxQspi.h
  • IfxQspi_Phase_wait : IfxQspi.h
  • IfxQspi_PhaseTransitionEvent_dataNotAvailable : IfxQspi.h
  • IfxQspi_PhaseTransitionEvent_endOfExpect : IfxQspi.h
  • IfxQspi_PhaseTransitionEvent_endOfFrame : IfxQspi.h
  • IfxQspi_PhaseTransitionEvent_endOfWait : IfxQspi.h
  • IfxQspi_PhaseTransitionEvent_receiveBufferFilled : IfxQspi.h
  • IfxQspi_PhaseTransitionEvent_serialClockPolarityChange : IfxQspi.h
  • IfxQspi_PhaseTransitionEvent_startOfFrame : IfxQspi.h
  • IfxQspi_PhaseTransitionEvent_transmitBufferEmptied : IfxQspi.h
  • IfxQspi_Reset_kernel : IfxQspi.h
  • IfxQspi_Reset_none : IfxQspi.h
  • IfxQspi_Reset_registers : IfxQspi.h
  • IfxQspi_Reset_stateMachineAndFifo : IfxQspi.h
  • IfxQspi_RxFifoInt_0 : IfxQspi.h
  • IfxQspi_RxFifoInt_1 : IfxQspi.h
  • IfxQspi_RxFifoInt_2 : IfxQspi.h
  • IfxQspi_RxFifoInt_3 : IfxQspi.h
  • IfxQspi_SleepMode_disable : IfxQspi.h
  • IfxQspi_SleepMode_enable : IfxQspi.h
  • IfxQspi_SpiMaster_ChannelBasedCs_disabled : IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_ChannelBasedCs_enabled : IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_Mode_long : IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_Mode_longContinuous : IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_Mode_short : IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_Mode_shortContinuous : IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_Mode_xxl : IfxQspi_SpiMaster.h
  • IfxQspi_StrobeDelay_1 : IfxQspi.h
  • IfxQspi_StrobeDelay_10 : IfxQspi.h
  • IfxQspi_StrobeDelay_11 : IfxQspi.h
  • IfxQspi_StrobeDelay_12 : IfxQspi.h
  • IfxQspi_StrobeDelay_13 : IfxQspi.h
  • IfxQspi_StrobeDelay_14 : IfxQspi.h
  • IfxQspi_StrobeDelay_15 : IfxQspi.h
  • IfxQspi_StrobeDelay_16 : IfxQspi.h
  • IfxQspi_StrobeDelay_17 : IfxQspi.h
  • IfxQspi_StrobeDelay_18 : IfxQspi.h
  • IfxQspi_StrobeDelay_19 : IfxQspi.h
  • IfxQspi_StrobeDelay_2 : IfxQspi.h
  • IfxQspi_StrobeDelay_20 : IfxQspi.h
  • IfxQspi_StrobeDelay_21 : IfxQspi.h
  • IfxQspi_StrobeDelay_22 : IfxQspi.h
  • IfxQspi_StrobeDelay_23 : IfxQspi.h
  • IfxQspi_StrobeDelay_24 : IfxQspi.h
  • IfxQspi_StrobeDelay_25 : IfxQspi.h
  • IfxQspi_StrobeDelay_26 : IfxQspi.h
  • IfxQspi_StrobeDelay_27 : IfxQspi.h
  • IfxQspi_StrobeDelay_28 : IfxQspi.h
  • IfxQspi_StrobeDelay_29 : IfxQspi.h
  • IfxQspi_StrobeDelay_3 : IfxQspi.h
  • IfxQspi_StrobeDelay_30 : IfxQspi.h
  • IfxQspi_StrobeDelay_31 : IfxQspi.h
  • IfxQspi_StrobeDelay_32 : IfxQspi.h
  • IfxQspi_StrobeDelay_4 : IfxQspi.h
  • IfxQspi_StrobeDelay_5 : IfxQspi.h
  • IfxQspi_StrobeDelay_6 : IfxQspi.h
  • IfxQspi_StrobeDelay_7 : IfxQspi.h
  • IfxQspi_StrobeDelay_8 : IfxQspi.h
  • IfxQspi_StrobeDelay_9 : IfxQspi.h
  • IfxQspi_SuspendMode_hard : IfxQspi.h
  • IfxQspi_SuspendMode_none : IfxQspi.h
  • IfxQspi_SuspendMode_soft : IfxQspi.h
  • IfxQspi_TxFifoInt_1 : IfxQspi.h
  • IfxQspi_TxFifoInt_2 : IfxQspi.h
  • IfxQspi_TxFifoInt_3 : IfxQspi.h
  • IfxQspi_TxFifoInt_4 : IfxQspi.h
  • IfxScu_CCUCON0_CLKSEL_fBack : IfxScu_cfg.h
  • IfxScu_CCUCON0_CLKSEL_fPll : IfxScu_cfg.h
  • IfxScu_PMCSR_REQSLP_Idle : IfxScu_cfg.h
  • IfxScu_PMCSR_REQSLP_Run : IfxScu_cfg.h
  • IfxScu_PMCSR_REQSLP_Sleep : IfxScu_cfg.h
  • IfxScu_PMCSR_REQSLP_Stby : IfxScu_cfg.h
  • IfxScu_WDTCON1_IR_divBy16384 : IfxScu_cfg.h
  • IfxScu_WDTCON1_IR_divBy256 : IfxScu_cfg.h
  • IfxScu_WDTCON1_IR_divBy64 : IfxScu_cfg.h
  • IfxScuCcu_Fsource_0 : IfxScuCcu.h
  • IfxScuCcu_Fsource_1 : IfxScuCcu.h
  • IfxScuCcu_Fsource_2 : IfxScuCcu.h
  • IfxScuCcu_K2divider_1 : IfxScuCcu.h
  • IfxScuCcu_K2divider_2 : IfxScuCcu.h
  • IfxScuCcu_K2divider_3 : IfxScuCcu.h
  • IfxScuCcu_K2divider_4 : IfxScuCcu.h
  • IfxScuCcu_K2divider_5 : IfxScuCcu.h
  • IfxScuCcu_K2divider_6 : IfxScuCcu.h
  • IfxScuCcu_K2divider_7 : IfxScuCcu.h
  • IfxScuCcu_K2divider_8 : IfxScuCcu.h
  • IfxScuCcu_K3divider_1 : IfxScuCcu.h
  • IfxScuCcu_K3divider_2 : IfxScuCcu.h
  • IfxScuCcu_K3divider_3 : IfxScuCcu.h
  • IfxScuCcu_K3divider_4 : IfxScuCcu.h
  • IfxScuCcu_K3divider_5 : IfxScuCcu.h
  • IfxScuCcu_K3divider_6 : IfxScuCcu.h
  • IfxScuCcu_K3divider_7 : IfxScuCcu.h
  • IfxScuCcu_K3divider_8 : IfxScuCcu.h
  • IfxScuCcu_LowPowerDivRatio_divBy120 : IfxScuCcu.h
  • IfxScuCcu_LowPowerDivRatio_divBy240 : IfxScuCcu.h
  • IfxScuCcu_LowPowerDivRatio_divBy30 : IfxScuCcu.h
  • IfxScuCcu_LowPowerDivRatio_divBy60 : IfxScuCcu.h
  • IfxScuCcu_ModEn_disabled : IfxScuCcu.h
  • IfxScuCcu_ModEn_enabled : IfxScuCcu.h
  • IfxScuCcu_ModulationAmplitude_0p5 : IfxScuCcu.h
  • IfxScuCcu_ModulationAmplitude_1p0 : IfxScuCcu.h
  • IfxScuCcu_ModulationAmplitude_1p25 : IfxScuCcu.h
  • IfxScuCcu_ModulationAmplitude_1p5 : IfxScuCcu.h
  • IfxScuCcu_ModulationAmplitude_2p0 : IfxScuCcu.h
  • IfxScuCcu_ModulationAmplitude_2p5 : IfxScuCcu.h
  • IfxScuCcu_ModulationAmplitude_count : IfxScuCcu.h
  • IfxScuCcu_Ndivider_1 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_10 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_100 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_101 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_102 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_103 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_104 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_105 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_106 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_107 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_108 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_109 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_11 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_110 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_111 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_112 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_113 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_114 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_115 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_116 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_117 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_118 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_119 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_12 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_120 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_121 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_122 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_123 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_124 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_125 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_126 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_127 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_128 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_13 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_14 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_15 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_16 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_17 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_18 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_19 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_2 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_20 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_21 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_22 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_23 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_24 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_25 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_26 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_27 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_28 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_29 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_3 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_30 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_31 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_32 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_33 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_34 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_35 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_36 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_37 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_38 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_39 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_4 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_40 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_41 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_42 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_43 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_44 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_45 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_46 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_47 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_48 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_49 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_5 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_50 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_51 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_52 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_53 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_54 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_55 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_56 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_57 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_58 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_59 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_6 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_60 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_61 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_62 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_63 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_64 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_65 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_66 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_67 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_68 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_69 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_7 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_70 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_71 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_72 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_73 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_74 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_75 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_76 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_77 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_78 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_79 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_8 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_80 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_81 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_82 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_83 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_84 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_85 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_86 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_87 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_88 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_89 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_9 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_90 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_91 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_92 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_93 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_94 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_95 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_96 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_97 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_98 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_99 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_1 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_2 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_3 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_4 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_5 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_6 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_7 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_8 : IfxScuCcu.h
  • IfxScuCcu_PllInputClockSelection_fOsc0 : IfxScuCcu.h
  • IfxScuCcu_PllInputClockSelection_fOsc1 : IfxScuCcu.h
  • IfxScuCcu_PllInputClockSelection_fSysclk : IfxScuCcu.h
  • IfxScuCcu_Traprequest_esr0 : IfxScuCcu.h
  • IfxScuCcu_Traprequest_esr1 : IfxScuCcu.h
  • IfxScuCcu_Traprequest_smu : IfxScuCcu.h
  • IfxScuCcu_Traprequest_trap2 : IfxScuCcu.h
  • IfxScuEru_ExternalInputSelection_0 : IfxScuEru.h
  • IfxScuEru_ExternalInputSelection_1 : IfxScuEru.h
  • IfxScuEru_ExternalInputSelection_2 : IfxScuEru.h
  • IfxScuEru_ExternalInputSelection_3 : IfxScuEru.h
  • IfxScuEru_ExternalInputSelection_4 : IfxScuEru.h
  • IfxScuEru_ExternalInputSelection_5 : IfxScuEru.h
  • IfxScuEru_InputChannel_0 : IfxScuEru.h
  • IfxScuEru_InputChannel_1 : IfxScuEru.h
  • IfxScuEru_InputChannel_2 : IfxScuEru.h
  • IfxScuEru_InputChannel_3 : IfxScuEru.h
  • IfxScuEru_InputChannel_4 : IfxScuEru.h
  • IfxScuEru_InputChannel_5 : IfxScuEru.h
  • IfxScuEru_InputChannel_6 : IfxScuEru.h
  • IfxScuEru_InputChannel_7 : IfxScuEru.h
  • IfxScuEru_InputFilterDepth_1 : IfxScuEru.h
  • IfxScuEru_InputFilterDepth_10 : IfxScuEru.h
  • IfxScuEru_InputFilterDepth_11 : IfxScuEru.h
  • IfxScuEru_InputFilterDepth_12 : IfxScuEru.h
  • IfxScuEru_InputFilterDepth_13 : IfxScuEru.h
  • IfxScuEru_InputFilterDepth_14 : IfxScuEru.h
  • IfxScuEru_InputFilterDepth_15 : IfxScuEru.h
  • IfxScuEru_InputFilterDepth_2 : IfxScuEru.h
  • IfxScuEru_InputFilterDepth_3 : IfxScuEru.h
  • IfxScuEru_InputFilterDepth_4 : IfxScuEru.h
  • IfxScuEru_InputFilterDepth_5 : IfxScuEru.h
  • IfxScuEru_InputFilterDepth_6 : IfxScuEru.h
  • IfxScuEru_InputFilterDepth_7 : IfxScuEru.h
  • IfxScuEru_InputFilterDepth_8 : IfxScuEru.h
  • IfxScuEru_InputFilterDepth_9 : IfxScuEru.h
  • IfxScuEru_InputFilterDepth_disable : IfxScuEru.h
  • IfxScuEru_InputFilterPredivider_1 : IfxScuEru.h
  • IfxScuEru_InputFilterPredivider_10 : IfxScuEru.h
  • IfxScuEru_InputFilterPredivider_11 : IfxScuEru.h
  • IfxScuEru_InputFilterPredivider_12 : IfxScuEru.h
  • IfxScuEru_InputFilterPredivider_13 : IfxScuEru.h
  • IfxScuEru_InputFilterPredivider_14 : IfxScuEru.h
  • IfxScuEru_InputFilterPredivider_15 : IfxScuEru.h
  • IfxScuEru_InputFilterPredivider_2 : IfxScuEru.h
  • IfxScuEru_InputFilterPredivider_3 : IfxScuEru.h
  • IfxScuEru_InputFilterPredivider_4 : IfxScuEru.h
  • IfxScuEru_InputFilterPredivider_5 : IfxScuEru.h
  • IfxScuEru_InputFilterPredivider_6 : IfxScuEru.h
  • IfxScuEru_InputFilterPredivider_7 : IfxScuEru.h
  • IfxScuEru_InputFilterPredivider_8 : IfxScuEru.h
  • IfxScuEru_InputFilterPredivider_9 : IfxScuEru.h
  • IfxScuEru_InputFilterPredivider_disable : IfxScuEru.h
  • IfxScuEru_InputFilterRequestSelection_0A : IfxScuEru.h
  • IfxScuEru_InputFilterRequestSelection_0C : IfxScuEru.h
  • IfxScuEru_InputFilterRequestSelection_1A : IfxScuEru.h
  • IfxScuEru_InputFilterRequestSelection_1C : IfxScuEru.h
  • IfxScuEru_InputFilterRequestSelection_2A : IfxScuEru.h
  • IfxScuEru_InputFilterRequestSelection_2C : IfxScuEru.h
  • IfxScuEru_InputFilterRequestSelection_2D : IfxScuEru.h
  • IfxScuEru_InputFilterRequestSelection_3A : IfxScuEru.h
  • IfxScuEru_InputFilterRequestSelection_3C : IfxScuEru.h
  • IfxScuEru_InputFilterRequestSelection_3D : IfxScuEru.h
  • IfxScuEru_InputFilterRequestSelection_4A : IfxScuEru.h
  • IfxScuEru_InputFilterRequestSelection_4D : IfxScuEru.h
  • IfxScuEru_InputFilterRequestSelection_5A : IfxScuEru.h
  • IfxScuEru_InputFilterRequestSelection_6A : IfxScuEru.h
  • IfxScuEru_InputFilterRequestSelection_6D : IfxScuEru.h
  • IfxScuEru_InputFilterRequestSelection_7A : IfxScuEru.h
  • IfxScuEru_InputFilterRequestSelection_7C : IfxScuEru.h
  • IfxScuEru_InputNodePointer_0 : IfxScuEru.h
  • IfxScuEru_InputNodePointer_1 : IfxScuEru.h
  • IfxScuEru_InputNodePointer_2 : IfxScuEru.h
  • IfxScuEru_InputNodePointer_3 : IfxScuEru.h
  • IfxScuEru_InputNodePointer_4 : IfxScuEru.h
  • IfxScuEru_InputNodePointer_5 : IfxScuEru.h
  • IfxScuEru_InputNodePointer_6 : IfxScuEru.h
  • IfxScuEru_InputNodePointer_7 : IfxScuEru.h
  • IfxScuEru_InterruptGatingPattern_alwaysActive : IfxScuEru.h
  • IfxScuEru_InterruptGatingPattern_none : IfxScuEru.h
  • IfxScuEru_InterruptGatingPattern_patternMatch : IfxScuEru.h
  • IfxScuEru_InterruptGatingPattern_patternMiss : IfxScuEru.h
  • IfxScuEru_OutputChannel_0 : IfxScuEru.h
  • IfxScuEru_OutputChannel_1 : IfxScuEru.h
  • IfxScuEru_OutputChannel_2 : IfxScuEru.h
  • IfxScuEru_OutputChannel_3 : IfxScuEru.h
  • IfxScuEru_OutputChannel_4 : IfxScuEru.h
  • IfxScuEru_OutputChannel_5 : IfxScuEru.h
  • IfxScuEru_OutputChannel_6 : IfxScuEru.h
  • IfxScuEru_OutputChannel_7 : IfxScuEru.h
  • IfxScuLbist_Application_body : IfxScuLbist.h
  • IfxScuLbist_Application_pt : IfxScuLbist.h
  • IfxScuLbist_Freq_div1 : IfxScuLbist.h
  • IfxScuLbist_Freq_div10 : IfxScuLbist.h
  • IfxScuLbist_Freq_div11 : IfxScuLbist.h
  • IfxScuLbist_Freq_div12 : IfxScuLbist.h
  • IfxScuLbist_Freq_div13 : IfxScuLbist.h
  • IfxScuLbist_Freq_div14 : IfxScuLbist.h
  • IfxScuLbist_Freq_div15 : IfxScuLbist.h
  • IfxScuLbist_Freq_div16 : IfxScuLbist.h
  • IfxScuLbist_Freq_div2 : IfxScuLbist.h
  • IfxScuLbist_Freq_div3 : IfxScuLbist.h
  • IfxScuLbist_Freq_div4 : IfxScuLbist.h
  • IfxScuLbist_Freq_div5 : IfxScuLbist.h
  • IfxScuLbist_Freq_div6 : IfxScuLbist.h
  • IfxScuLbist_Freq_div7 : IfxScuLbist.h
  • IfxScuLbist_Freq_div8 : IfxScuLbist.h
  • IfxScuLbist_Freq_div9 : IfxScuLbist.h
  • IfxScuLbist_SplitShiftSel_allScanPartitions : IfxScuLbist.h
  • IfxScuLbist_SplitShiftSel_fourScanPartitions : IfxScuLbist.h
  • IfxScuLbist_SplitShiftSel_twoScanPartitions : IfxScuLbist.h
  • IfxScuRcu_ResetType_application : IfxScuRcu.h
  • IfxScuRcu_ResetType_coldpoweron : IfxScuRcu.h
  • IfxScuRcu_ResetType_debug : IfxScuRcu.h
  • IfxScuRcu_ResetType_system : IfxScuRcu.h
  • IfxScuRcu_ResetType_undefined : IfxScuRcu.h
  • IfxScuRcu_ResetType_warmpoweron : IfxScuRcu.h
  • IfxScuRcu_Trigger_cb0 : IfxScuRcu.h
  • IfxScuRcu_Trigger_cb1 : IfxScuRcu.h
  • IfxScuRcu_Trigger_cb3 : IfxScuRcu.h
  • IfxScuRcu_Trigger_esr0 : IfxScuRcu.h
  • IfxScuRcu_Trigger_esr1 : IfxScuRcu.h
  • IfxScuRcu_Trigger_evr33 : IfxScuRcu.h
  • IfxScuRcu_Trigger_evrc : IfxScuRcu.h
  • IfxScuRcu_Trigger_hsma : IfxScuRcu.h
  • IfxScuRcu_Trigger_hsms : IfxScuRcu.h
  • IfxScuRcu_Trigger_portst : IfxScuRcu.h
  • IfxScuRcu_Trigger_smu : IfxScuRcu.h
  • IfxScuRcu_Trigger_stbyr : IfxScuRcu.h
  • IfxScuRcu_Trigger_stm0 : IfxScuRcu.h
  • IfxScuRcu_Trigger_stm1 : IfxScuRcu.h
  • IfxScuRcu_Trigger_stm2 : IfxScuRcu.h
  • IfxScuRcu_Trigger_stm3 : IfxScuRcu.h
  • IfxScuRcu_Trigger_sw : IfxScuRcu.h
  • IfxScuRcu_Trigger_swd : IfxScuRcu.h
  • IfxScuRcu_Trigger_tcu : IfxScuRcu.h
  • IfxScuRcu_Trigger_tp : IfxScuRcu.h
  • IfxScuRcu_Trigger_undefined : IfxScuRcu.h
  • IfxSent_AlternateInput_0 : IfxSent.h
  • IfxSent_AlternateInput_1 : IfxSent.h
  • IfxSent_AlternateInput_2 : IfxSent.h
  • IfxSent_AlternateInput_3 : IfxSent.h
  • IfxSent_ChannelId_0 : IfxSent_cfg.h
  • IfxSent_ChannelId_1 : IfxSent_cfg.h
  • IfxSent_ChannelId_10 : IfxSent_cfg.h
  • IfxSent_ChannelId_11 : IfxSent_cfg.h
  • IfxSent_ChannelId_12 : IfxSent_cfg.h
  • IfxSent_ChannelId_13 : IfxSent_cfg.h
  • IfxSent_ChannelId_14 : IfxSent_cfg.h
  • IfxSent_ChannelId_15 : IfxSent_cfg.h
  • IfxSent_ChannelId_16 : IfxSent_cfg.h
  • IfxSent_ChannelId_17 : IfxSent_cfg.h
  • IfxSent_ChannelId_18 : IfxSent_cfg.h
  • IfxSent_ChannelId_19 : IfxSent_cfg.h
  • IfxSent_ChannelId_2 : IfxSent_cfg.h
  • IfxSent_ChannelId_20 : IfxSent_cfg.h
  • IfxSent_ChannelId_21 : IfxSent_cfg.h
  • IfxSent_ChannelId_22 : IfxSent_cfg.h
  • IfxSent_ChannelId_23 : IfxSent_cfg.h
  • IfxSent_ChannelId_24 : IfxSent_cfg.h
  • IfxSent_ChannelId_3 : IfxSent_cfg.h
  • IfxSent_ChannelId_4 : IfxSent_cfg.h
  • IfxSent_ChannelId_5 : IfxSent_cfg.h
  • IfxSent_ChannelId_6 : IfxSent_cfg.h
  • IfxSent_ChannelId_7 : IfxSent_cfg.h
  • IfxSent_ChannelId_8 : IfxSent_cfg.h
  • IfxSent_ChannelId_9 : IfxSent_cfg.h
  • IfxSent_ChannelId_none : IfxSent_cfg.h
  • IfxSent_ChannelStatus_initialize : IfxSent.h
  • IfxSent_ChannelStatus_running : IfxSent.h
  • IfxSent_ChannelStatus_stop : IfxSent.h
  • IfxSent_ChannelStatus_synchronize : IfxSent.h
  • IfxSent_ClockDividerMode_fractional : IfxSent.h
  • IfxSent_ClockDividerMode_normal : IfxSent.h
  • IfxSent_ClockDividerMode_off : IfxSent.h
  • IfxSent_ConfigBit_0 : IfxSent.h
  • IfxSent_ConfigBit_1 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_1 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_10 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_11 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_12 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_13 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_14 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_15 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_2 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_3 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_4 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_5 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_6 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_7 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_8 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_9 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_off : IfxSent.h
  • IfxSent_ExtendedSerialFrameMode_extended : IfxSent.h
  • IfxSent_ExtendedSerialFrameMode_standard : IfxSent.h
  • IfxSent_ExternalTrigger_0 : IfxSent.h
  • IfxSent_ExternalTrigger_1 : IfxSent.h
  • IfxSent_ExternalTrigger_10 : IfxSent.h
  • IfxSent_ExternalTrigger_11 : IfxSent.h
  • IfxSent_ExternalTrigger_12 : IfxSent.h
  • IfxSent_ExternalTrigger_13 : IfxSent.h
  • IfxSent_ExternalTrigger_14 : IfxSent.h
  • IfxSent_ExternalTrigger_15 : IfxSent.h
  • IfxSent_ExternalTrigger_2 : IfxSent.h
  • IfxSent_ExternalTrigger_3 : IfxSent.h
  • IfxSent_ExternalTrigger_4 : IfxSent.h
  • IfxSent_ExternalTrigger_5 : IfxSent.h
  • IfxSent_ExternalTrigger_6 : IfxSent.h
  • IfxSent_ExternalTrigger_7 : IfxSent.h
  • IfxSent_ExternalTrigger_8 : IfxSent.h
  • IfxSent_ExternalTrigger_9 : IfxSent.h
  • IfxSent_FrameCheckMode_futureSuncPulse : IfxSent.h
  • IfxSent_FrameCheckMode_pastSyncPulse : IfxSent.h
  • IfxSent_InterruptNodePointer_trigo0 : IfxSent.h
  • IfxSent_InterruptNodePointer_trigo1 : IfxSent.h
  • IfxSent_InterruptNodePointer_trigo2 : IfxSent.h
  • IfxSent_InterruptNodePointer_trigo3 : IfxSent.h
  • IfxSent_InterruptNodePointer_trigo4 : IfxSent.h
  • IfxSent_InterruptNodePointer_trigo5 : IfxSent.h
  • IfxSent_InterruptNodePointer_trigo6 : IfxSent.h
  • IfxSent_InterruptNodePointer_trigo7 : IfxSent.h
  • IfxSent_InterruptNodePointer_trigo8 : IfxSent.h
  • IfxSent_InterruptNodePointer_trigo9 : IfxSent.h
  • IfxSent_InterruptSource_crci : IfxSent.h
  • IfxSent_InterruptSource_fdi : IfxSent.h
  • IfxSent_InterruptSource_fri : IfxSent.h
  • IfxSent_InterruptSource_nni : IfxSent.h
  • IfxSent_InterruptSource_nvi : IfxSent.h
  • IfxSent_InterruptSource_rbi : IfxSent.h
  • IfxSent_InterruptSource_rdi : IfxSent.h
  • IfxSent_InterruptSource_rsi : IfxSent.h
  • IfxSent_InterruptSource_scri : IfxSent.h
  • IfxSent_InterruptSource_sdi : IfxSent.h
  • IfxSent_InterruptSource_tbi : IfxSent.h
  • IfxSent_InterruptSource_tdi : IfxSent.h
  • IfxSent_InterruptSource_wdi : IfxSent.h
  • IfxSent_InterruptSource_wsi : IfxSent.h
  • IfxSent_Nibble_0 : IfxSent.h
  • IfxSent_Nibble_1 : IfxSent.h
  • IfxSent_Nibble_2 : IfxSent.h
  • IfxSent_Nibble_3 : IfxSent.h
  • IfxSent_Nibble_4 : IfxSent.h
  • IfxSent_Nibble_5 : IfxSent.h
  • IfxSent_Nibble_6 : IfxSent.h
  • IfxSent_Nibble_7 : IfxSent.h
  • IfxSent_SleepMode_disable : IfxSent.h
  • IfxSent_SleepMode_enable : IfxSent.h
  • IfxSent_SpcMode_bidirectional : IfxSent.h
  • IfxSent_SpcMode_range : IfxSent.h
  • IfxSent_SpcMode_sync : IfxSent.h
  • IfxSent_SuspendMode_hard : IfxSent.h
  • IfxSent_SuspendMode_none : IfxSent.h
  • IfxSent_SuspendMode_soft : IfxSent.h
  • IfxSent_TimeBase_measuredFrequency : IfxSent.h
  • IfxSent_TimeBase_nominalFrequency : IfxSent.h
  • IfxSent_TriggerSource_externalTrigger : IfxSent.h
  • IfxSent_TriggerSource_fallingEdge : IfxSent.h
  • IfxSent_TriggerSource_immediate : IfxSent.h
  • IfxSent_TriggerSource_off : IfxSent.h
  • IfxSmu_Alarm_BBB_BusErrorEvent : IfxSmu_cfg.h
  • IfxSmu_Alarm_CAN_CAN_MiscellaneousErrorDetection : IfxSmu_cfg.h
  • IfxSmu_Alarm_CAN_CAN_SingleBitErrorCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_CAN_CAN_UncorrectableErrorDetection : IfxSmu_cfg.h
  • IfxSmu_Alarm_CCU_Backup_ClockAliveAlarm : IfxSmu_cfg.h
  • IfxSmu_Alarm_CCU_Backup_ClockOutOfRangeAlarm : IfxSmu_cfg.h
  • IfxSmu_Alarm_CCU_Safety_FfCorrectableErrorDetected : IfxSmu_cfg.h
  • IfxSmu_Alarm_CCU_Safety_FfUncorrectableErrorDetected : IfxSmu_cfg.h
  • IfxSmu_Alarm_CERBERUS_Safety_FfUncorrectableErrorDetected : IfxSmu_cfg.h
  • IfxSmu_Alarm_CONVERTER_Phase_SyncronizerError : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU0_Buslevel_MpuViolation : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU0_CPU_DataSriInterfaceLoadStoreEdcError : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU0_CPU_ExceptionInterruptTrap : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU0_CPU_InstructionFetchSriInterfaceEdcError : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU0_DCACHETAG_MiscellaneousErrorDetection : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU0_DCACHETAG_SingleBitErrorCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU0_DCACHETAG_UncorrectableErrorDetection : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU0_DSPRDCACHEDLMU_MiscelleniousErrorDetection : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU0_DSPRDCACHEDLMU_SingleBitErrorCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU0_DSPRDCACHEDLMU_UncorrectableErrorDetection : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU0_Lockstep_ComparatorError : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU0_PCACHETAG_MiscellaneousErrorDetection : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU0_PCACHETAG_UncorrectableErrorDetection : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU0_PFI0_PFLASH0_ReadPathError : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU0_PSPRPCACHE_MiscellaneousErrorDetection : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU0_PSPRPCACHE_SingleBitErrorCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU0_PSPRPCACHE_UncorrectableErrorDetection : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU1_Buslevel_MpuViolation : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU1_CPU_DataSriInterfaceLoadStoreEdcError : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU1_CPU_ExceptionInterruptTrap : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU1_CPU_InstructionFetchSriInterfaceEdcError : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU1_DCACHETAG_MiscellaneousErrorDetection : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU1_DCACHETAG_SingleBitErrorCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU1_DCACHETAG_UncorrectableErrorDetection : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU1_DSPRDCACHEDLMU_MiscellaneousErrorDetection : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU1_DSPRDCACHEDLMU_SingleBitErrorCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU1_DSPRDCACHEDLMU_UncorrectableErrorDetection : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU1_Lockstep_ComparatorError : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU1_PCACHETAG_MiscellaneousErrorDetection : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU1_PCACHETAG_UncorrectableErrorDetection : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU1_PFI1_PFLASH1_ReadPathError : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU1_PSPRPCACHE_MiscellaneousErrorDetection : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU1_PSPRPCACHE_SingleBitErrorCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU1_PSPRPCACHE_UncorrectableErrorDetection : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU2_Buslevel_MpuViolation : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU2_CPU_DataSriInterfaceLoadStoreEdcError : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU2_CPU_ExceptionInterruptTrap : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU2_CPU_InstructionFetchSriInterfaceEdcError : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU2_DCACHETAG_MiscellaneousErrorDetection : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU2_DCACHETAG_SingleBitErrorCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU2_DCACHETAG_UncorrectableErrorDetection : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU2_DSPRDCACHEDLMU_MiscellaneousErrorDetection : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU2_DSPRDCACHEDLMU_SingleBitErrorCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU2_DSPRDCACHEDLMU_UncorrectableErrorDetection : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU2_Lockstep_ComparatorError : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU2_PCACHETAG_MiscellaneousErrorDetection : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU2_PCACHETAG_UncorrectableErrorDetection : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU2_PFI2_PFLASH2_ReadPathError : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU2_PSPRPCACHE_MiscellaneousErrorDetection : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU2_PSPRPCACHE_SingleBitErrorCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU2_PSPRPCACHE_UncorrectableErrorDetection : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU3_Buslevel_MpuViolation : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU3_CPU_DataSriInterfaceLoadStoreEdcError : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU3_CPU_ExceptionInterruptTrap : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU3_CPU_InstructionFetchSriInterfaceEdcError : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU3_DCACHETAG_MiscellaneousErrorDetection : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU3_DCACHETAG_SingleBitErrorCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU3_DCACHETAG_UncorrectableErrorDetection : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU3_DSPRDCACHEDLMU_MiscellaneousErrorDetection : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU3_DSPRDCACHEDLMU_SingleBitErrorCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU3_DSPRDCACHEDLMU_UncorrectableErrorDetection : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU3_Lockstep_ComparatorError : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU3_PCACHETAG_MiscellaneousErrorDetection : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU3_PCACHETAG_UncorrectableErrorDetection : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU3_PFI3_PFLASH3_ReadPathError : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU3_PSPRPCACHE_MiscellaneousErrorDetection : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU3_PSPRPCACHE_SingleBitErrorCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_CPU3_PSPRPCACHE_UncorrectableErrorDetection : IfxSmu_cfg.h
  • IfxSmu_Alarm_DMA_DMASRI_EccError : IfxSmu_cfg.h
  • IfxSmu_Alarm_DMA_Safety_FfUncorrectableErrorDetected : IfxSmu_cfg.h
  • IfxSmu_Alarm_DMU_EDC_AddressPhaseError : IfxSmu_cfg.h
  • IfxSmu_Alarm_DMU_EDC_WritePhaseError : IfxSmu_cfg.h
  • IfxSmu_Alarm_DTS_core_Over_TemperatureAlarm : IfxSmu_cfg.h
  • IfxSmu_Alarm_DTS_core_Under_TemperatureAlarm : IfxSmu_cfg.h
  • IfxSmu_Alarm_DTS_Temperature_Overflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_DTS_Temperature_Underflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_EMEM_Lockstep_ControlLogicInputAlarm : IfxSmu_cfg.h
  • IfxSmu_Alarm_EMEM_Safety_FfUncorrectableErrorDetected : IfxSmu_cfg.h
  • IfxSmu_Alarm_EMEM_SEP_ControlLogicAlarm : IfxSmu_cfg.h
  • IfxSmu_Alarm_EMEM_Unexpected_WriteToEmemAlarm : IfxSmu_cfg.h
  • IfxSmu_Alarm_ERAY_ERAY_MiscellaneousErrorDetection : IfxSmu_cfg.h
  • IfxSmu_Alarm_ERAY_ERAY_SingleBitErrorCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_ERAY_ERAY_UncorrectableErrorDetection : IfxSmu_cfg.h
  • IfxSmu_Alarm_EVR_Overvoltage_Alarm : IfxSmu_cfg.h
  • IfxSmu_Alarm_EVR_Short_ToLowHightAlarm : IfxSmu_cfg.h
  • IfxSmu_Alarm_EVR_Undervoltage_Alarm : IfxSmu_cfg.h
  • IfxSmu_Alarm_FSI_CPUFLASHCON_ConfigurationError : IfxSmu_cfg.h
  • IfxSmu_Alarm_FSI_Double_BitCorrectionTrackingBufferFull : IfxSmu_cfg.h
  • IfxSmu_Alarm_FSI_Flash_StoredConfigurationError : IfxSmu_cfg.h
  • IfxSmu_Alarm_FSI_Multiple_BitErrorDetectionTrackingBufferFull : IfxSmu_cfg.h
  • IfxSmu_Alarm_FSI_PFlash_DoubleBitError : IfxSmu_cfg.h
  • IfxSmu_Alarm_FSI_PFlash_EccError : IfxSmu_cfg.h
  • IfxSmu_Alarm_FSI_PFlash_EdcError : IfxSmu_cfg.h
  • IfxSmu_Alarm_FSI_PFlash_SingleBitError : IfxSmu_cfg.h
  • IfxSmu_Alarm_FSI_Single_BitCorrectionTrackingBufferFull : IfxSmu_cfg.h
  • IfxSmu_Alarm_FSI_Zero_BitErrorTrackingBufferFull : IfxSmu_cfg.h
  • IfxSmu_Alarm_GTM_GTM_MiscellaneousErrorDetection : IfxSmu_cfg.h
  • IfxSmu_Alarm_GTM_GTM_SingleBitErrorCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_GTM_GTM_UncorrectableErrorDetection : IfxSmu_cfg.h
  • IfxSmu_Alarm_HSM_Overvoltage_Alarm : IfxSmu_cfg.h
  • IfxSmu_Alarm_HSM_Undervoltage_Alarm : IfxSmu_cfg.h
  • IfxSmu_Alarm_HSSL_HSSL0EDC_ReadPhaseError : IfxSmu_cfg.h
  • IfxSmu_Alarm_IOM_Pin_MismatchIndication : IfxSmu_cfg.h
  • IfxSmu_Alarm_IOM_Safety_FfUncorrectableErrorDetected : IfxSmu_cfg.h
  • IfxSmu_Alarm_IR_EDC_ConfigurationDataPathError : IfxSmu_cfg.h
  • IfxSmu_Alarm_IR_Safety_FfUncorrectableErrorDetected : IfxSmu_cfg.h
  • IfxSmu_Alarm_LMU_Buslevel_MpuError : IfxSmu_cfg.h
  • IfxSmu_Alarm_LMU_ECC_Error : IfxSmu_cfg.h
  • IfxSmu_Alarm_LMU_EDC_AddressPhaseError : IfxSmu_cfg.h
  • IfxSmu_Alarm_LMU_EDC_ReadPhaseError : IfxSmu_cfg.h
  • IfxSmu_Alarm_LMU_EDC_WritePhaseError : IfxSmu_cfg.h
  • IfxSmu_Alarm_LMU_FSI_RAM_LMUDMU_MiscellaneousErrorDetection : IfxSmu_cfg.h
  • IfxSmu_Alarm_LMU_FSI_RAM_LMUDMU_SingleBitErrorCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_LMU_FSI_RAM_LMUDMU_UncorrectableErrorDetection : IfxSmu_cfg.h
  • IfxSmu_Alarm_LMU_Lockstep_ComparatorError : IfxSmu_cfg.h
  • IfxSmu_Alarm_LMU_Lockstep_ControlError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Misc_MISC_MiscellaneousErrorDetection : IfxSmu_cfg.h
  • IfxSmu_Alarm_Misc_MISC_SingleBitErrorCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_Misc_MISC_UncorrectableErrorDetection : IfxSmu_cfg.h
  • IfxSmu_Alarm_MTU_Safety_FfUncorrectableErrorDetected : IfxSmu_cfg.h
  • IfxSmu_Alarm_PMS_Safety_FfUncorrectableErrorDetected : IfxSmu_cfg.h
  • IfxSmu_Alarm_SCU_CPU0_WatchdogTimeOut : IfxSmu_cfg.h
  • IfxSmu_Alarm_SCU_CPU1_WatchdogTimeOut : IfxSmu_cfg.h
  • IfxSmu_Alarm_SCU_CPU2_WatchdogTimeOut : IfxSmu_cfg.h
  • IfxSmu_Alarm_SCU_CPU3_WatchdogTimeOut : IfxSmu_cfg.h
  • IfxSmu_Alarm_SCU_External_EmergencyStopSignalEvent : IfxSmu_cfg.h
  • IfxSmu_Alarm_SCU_External_RequestUnitAlarm0 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SCU_External_RequestUnitAlarm1 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SCU_External_RequestUnitAlarm2 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SCU_External_RequestUnitAlarm3 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SCU_External_RequestUnitAlarm4 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SCU_External_RequestUnitAlarm5 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SCU_External_RequestUnitAlarm6 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SCU_External_RequestUnitAlarm7 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SCU_LBIST_Alarm : IfxSmu_cfg.h
  • IfxSmu_Alarm_SCU_LBIST_TestModeAlarm : IfxSmu_cfg.h
  • IfxSmu_Alarm_SCU_Lockstep_DualRailError : IfxSmu_cfg.h
  • IfxSmu_Alarm_SCU_OS_CClockFrequencyOutOfRange : IfxSmu_cfg.h
  • IfxSmu_Alarm_SCU_Pad_HeatingAlarm : IfxSmu_cfg.h
  • IfxSmu_Alarm_SCU_Peripheral_PllDcoLossOfLockEvent : IfxSmu_cfg.h
  • IfxSmu_Alarm_SCU_Safety_FfUncorrectableErrorDetected : IfxSmu_cfg.h
  • IfxSmu_Alarm_SCU_Safety_WatchdogTimeOut : IfxSmu_cfg.h
  • IfxSmu_Alarm_SCU_System_PllDcoLossOfLockEvent : IfxSmu_cfg.h
  • IfxSmu_Alarm_SCU_Watchdog_TimeOut : IfxSmu_cfg.h
  • IfxSmu_Alarm_SFI_BBB_EDC_AddressPhaseError : IfxSmu_cfg.h
  • IfxSmu_Alarm_SFI_BBB_EDC_WritePhaseError : IfxSmu_cfg.h
  • IfxSmu_Alarm_SFI_SPB_EDC_ReadPhaseError : IfxSmu_cfg.h
  • IfxSmu_Alarm_SMU_Access_EnableErrorDetected : IfxSmu_cfg.h
  • IfxSmu_Alarm_SMU_core_Safety_FfUncorrectableErrorDetected : IfxSmu_cfg.h
  • IfxSmu_Alarm_SMU_Error_PinFaultStateActivation : IfxSmu_cfg.h
  • IfxSmu_Alarm_SMU_Safety_FfCorrectableErrorDetected : IfxSmu_cfg.h
  • IfxSmu_Alarm_SMU_Safety_FfUncorrectableErrorDetected : IfxSmu_cfg.h
  • IfxSmu_Alarm_SMU_Timer0_TimeOut : IfxSmu_cfg.h
  • IfxSmu_Alarm_SMU_Timer1_TimeOut : IfxSmu_cfg.h
  • IfxSmu_Alarm_Software_Alarm0 : IfxSmu_cfg.h
  • IfxSmu_Alarm_Software_Alarm1 : IfxSmu_cfg.h
  • IfxSmu_Alarm_Software_Alarm10 : IfxSmu_cfg.h
  • IfxSmu_Alarm_Software_Alarm11 : IfxSmu_cfg.h
  • IfxSmu_Alarm_Software_Alarm12 : IfxSmu_cfg.h
  • IfxSmu_Alarm_Software_Alarm13 : IfxSmu_cfg.h
  • IfxSmu_Alarm_Software_Alarm14 : IfxSmu_cfg.h
  • IfxSmu_Alarm_Software_Alarm15 : IfxSmu_cfg.h
  • IfxSmu_Alarm_Software_Alarm2 : IfxSmu_cfg.h
  • IfxSmu_Alarm_Software_Alarm3 : IfxSmu_cfg.h
  • IfxSmu_Alarm_Software_Alarm4 : IfxSmu_cfg.h
  • IfxSmu_Alarm_Software_Alarm5 : IfxSmu_cfg.h
  • IfxSmu_Alarm_Software_Alarm6 : IfxSmu_cfg.h
  • IfxSmu_Alarm_Software_Alarm7 : IfxSmu_cfg.h
  • IfxSmu_Alarm_Software_Alarm8 : IfxSmu_cfg.h
  • IfxSmu_Alarm_Software_Alarm9 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SPB_BusErrorEvent : IfxSmu_cfg.h
  • IfxSmu_Alarm_SRI_EDC_ReadPhaseError : IfxSmu_cfg.h
  • IfxSmu_Alarm_SYS_PLL_PER_PLL_Safety_FfUncorrectableErrorDetected : IfxSmu_cfg.h
  • IfxSmu_Alarm_XBAR0_SRI_BusErrorEvent : IfxSmu_cfg.h
  • IfxSmu_Alarm_XBAR1_SRI_BusErrorEvent : IfxSmu_cfg.h
  • IfxSmu_Alarm_XBAR2_SRI_BusErrorEvent : IfxSmu_cfg.h
  • IfxSmu_Alarm_XBAR_EDC_AddressPhaseError : IfxSmu_cfg.h
  • IfxSmu_Alarm_XBAR_EDC_WritePhaseError : IfxSmu_cfg.h
  • IfxSmu_Alarm_XBAR_SOTA_SwapError : IfxSmu_cfg.h
  • IfxSmu_AlarmExecutionStatus_ems : IfxSmu.h
  • IfxSmu_AlarmExecutionStatus_emsaem : IfxSmu.h
  • IfxSmu_AlarmExecutionStatus_irq0 : IfxSmu.h
  • IfxSmu_AlarmExecutionStatus_irq0aem : IfxSmu.h
  • IfxSmu_AlarmExecutionStatus_irq1 : IfxSmu.h
  • IfxSmu_AlarmExecutionStatus_irq1aem : IfxSmu.h
  • IfxSmu_AlarmExecutionStatus_irq2 : IfxSmu.h
  • IfxSmu_AlarmExecutionStatus_irq2aem : IfxSmu.h
  • IfxSmu_AlarmExecutionStatus_nmi : IfxSmu.h
  • IfxSmu_AlarmExecutionStatus_nmiaem : IfxSmu.h
  • IfxSmu_AlarmExecutionStatus_rst : IfxSmu.h
  • IfxSmu_AlarmExecutionStatus_rst0 : IfxSmu.h
  • IfxSmu_AlarmExecutionStatus_rst0aem : IfxSmu.h
  • IfxSmu_AlarmExecutionStatus_rst1 : IfxSmu.h
  • IfxSmu_AlarmExecutionStatus_rst1aem : IfxSmu.h
  • IfxSmu_AlarmExecutionStatus_rst2 : IfxSmu.h
  • IfxSmu_AlarmExecutionStatus_rst2aem : IfxSmu.h
  • IfxSmu_AlarmExecutionStatus_rst3 : IfxSmu.h
  • IfxSmu_AlarmExecutionStatus_rst3aem : IfxSmu.h
  • IfxSmu_AlarmExecutionStatus_rst4 : IfxSmu.h
  • IfxSmu_AlarmExecutionStatus_rst4aem : IfxSmu.h
  • IfxSmu_AlarmExecutionStatus_rst5 : IfxSmu.h
  • IfxSmu_AlarmExecutionStatus_rst5aem : IfxSmu.h
  • IfxSmu_AlarmExecutionStatus_rstaem : IfxSmu.h
  • IfxSmu_Command_activateFSP : IfxSmu.h
  • IfxSmu_Command_activatePES : IfxSmu.h
  • IfxSmu_Command_alarmStatusClear : IfxSmu.h
  • IfxSmu_Command_aliveTest : IfxSmu.h
  • IfxSmu_Command_releaseFSP : IfxSmu.h
  • IfxSmu_Command_start : IfxSmu.h
  • IfxSmu_Command_stopRT : IfxSmu.h
  • IfxSmu_Command_triggerAlarm : IfxSmu.h
  • IfxSmu_FspMode_BiStableProtocol : IfxSmu.h
  • IfxSmu_FspMode_dualRailProtocol : IfxSmu.h
  • IfxSmu_FspMode_TimeSwitchingProtocol : IfxSmu.h
  • IfxSmu_FspPrescalar1_referenceClockDiv128 : IfxSmu.h
  • IfxSmu_FspPrescalar1_referenceClockDiv16 : IfxSmu.h
  • IfxSmu_FspPrescalar1_referenceClockDiv2 : IfxSmu.h
  • IfxSmu_FspPrescalar1_referenceClockDiv256 : IfxSmu.h
  • IfxSmu_FspPrescalar1_referenceClockDiv32 : IfxSmu.h
  • IfxSmu_FspPrescalar1_referenceClockDiv4 : IfxSmu.h
  • IfxSmu_FspPrescalar1_referenceClockDiv64 : IfxSmu.h
  • IfxSmu_FspPrescalar1_referenceClockDiv8 : IfxSmu.h
  • IfxSmu_FspPrescalar2_referenceClockDiv1024 : IfxSmu.h
  • IfxSmu_FspPrescalar2_referenceClockDiv2048 : IfxSmu.h
  • IfxSmu_FspPrescalar2_referenceClockDiv4096 : IfxSmu.h
  • IfxSmu_FspPrescalar2_referenceClockDiv512 : IfxSmu.h
  • IfxSmu_InternalAlarmAction_cpureset : IfxSmu.h
  • IfxSmu_InternalAlarmAction_disabled : IfxSmu.h
  • IfxSmu_InternalAlarmAction_igcs0 : IfxSmu.h
  • IfxSmu_InternalAlarmAction_igcs1 : IfxSmu.h
  • IfxSmu_InternalAlarmAction_igcs2 : IfxSmu.h
  • IfxSmu_InternalAlarmAction_nmi : IfxSmu.h
  • IfxSmu_InternalAlarmAction_reset : IfxSmu.h
  • IfxSmu_InterruptGenerationConfiguration_0 : IfxSmu.h
  • IfxSmu_InterruptGenerationConfiguration_1 : IfxSmu.h
  • IfxSmu_InterruptGenerationConfiguration_2 : IfxSmu.h
  • IfxSmu_InterruptRequest_0 : IfxSmu.h
  • IfxSmu_InterruptRequest_1 : IfxSmu.h
  • IfxSmu_InterruptRequest_2 : IfxSmu.h
  • IfxSmu_PortControlHwDir_fsp0AndFsp1Input : IfxSmu.h
  • IfxSmu_PortControlHwDir_fsp0AndFsp1Output : IfxSmu.h
  • IfxSmu_PortControlHwDir_fsp0OutputAndFsp1Input : IfxSmu.h
  • IfxSmu_PortControlHwEnable_fsp0AndFsp1Disabled : IfxSmu.h
  • IfxSmu_PortControlHwEnable_fsp0AndFsp1Enabled : IfxSmu.h
  • IfxSmu_PortControlHwEnable_fsp0EnabledAndFsp1Disabled : IfxSmu.h
  • IfxSmu_SmuState_fault : IfxSmu.h
  • IfxSmu_SmuState_run : IfxSmu.h
  • IfxSmu_SmuState_start : IfxSmu.h
  • IfxSmu_SmuState_unspecified : IfxSmu.h
  • IfxSmu_SuspendMode_hard : IfxSmu.h
  • IfxSmu_SuspendMode_none : IfxSmu.h
  • IfxSmu_SuspendMode_soft : IfxSmu.h
  • IfxSmuStdby_AlarmStatusClear_disable : IfxSmuStdby.h
  • IfxSmuStdby_AlarmStatusClear_enable : IfxSmuStdby.h
  • IfxSmuStdby_AlarmStatusFlag_faultExist : IfxSmuStdby.h
  • IfxSmuStdby_AlarmStatusFlag_noFaultExist : IfxSmuStdby.h
  • IfxSmuStdby_FaultSignalAlarmConfigFlagEvent_disable : IfxSmuStdby.h
  • IfxSmuStdby_FaultSignalAlarmConfigFlagEvent_enable : IfxSmuStdby.h
  • IfxSmuStdby_FspErrorPinFaultState_fault : IfxSmuStdby.h
  • IfxSmuStdby_FspErrorPinFaultState_noFault : IfxSmuStdby.h
  • IfxSmuStdby_FspErrorPinState_active : IfxSmuStdby.h
  • IfxSmuStdby_FspErrorPinState_inactive : IfxSmuStdby.h
  • IfxSmuStdby_SmuStdbyModuleState_disable : IfxSmuStdby.h
  • IfxSmuStdby_SmuStdbyModuleState_enable : IfxSmuStdby.h
  • IfxSrc_Tos_cpu0 : IfxSrc_cfg.h
  • IfxSrc_Tos_cpu1 : IfxSrc_cfg.h
  • IfxSrc_Tos_cpu2 : IfxSrc_cfg.h
  • IfxSrc_Tos_cpu3 : IfxSrc_cfg.h
  • IfxSrc_Tos_dma : IfxSrc_cfg.h
  • IfxStdIf_Pos_Dir_backward : IfxStdIf_Pos.h
  • IfxStdIf_Pos_Dir_forward : IfxStdIf_Pos.h
  • IfxStdIf_Pos_Dir_unknown : IfxStdIf_Pos.h
  • IfxStdIf_Pos_MotionType_linear : IfxStdIf_Pos.h
  • IfxStdIf_Pos_MotionType_rotating : IfxStdIf_Pos.h
  • IfxStdIf_Pos_ResolutionFactor_fourFold : IfxStdIf_Pos.h
  • IfxStdIf_Pos_ResolutionFactor_oneFold : IfxStdIf_Pos.h
  • IfxStdIf_Pos_ResolutionFactor_twoFold : IfxStdIf_Pos.h
  • IfxStdIf_Pos_SensorType_angletrk : IfxStdIf_Pos.h
  • IfxStdIf_Pos_SensorType_encoder : IfxStdIf_Pos.h
  • IfxStdIf_Pos_SensorType_hall : IfxStdIf_Pos.h
  • IfxStdIf_Pos_SensorType_igmr : IfxStdIf_Pos.h
  • IfxStdIf_Pos_SensorType_resolver : IfxStdIf_Pos.h
  • IfxStdIf_Pos_SensorType_virtual : IfxStdIf_Pos.h
  • IfxStdIf_Timer_CountDir_down : IfxStdIf_Timer.h
  • IfxStdIf_Timer_CountDir_up : IfxStdIf_Timer.h
  • IfxStdIf_Timer_CountDir_upAndDown : IfxStdIf_Timer.h
  • IfxStdIf_Timer_Output_disabled : IfxStdIf_Timer.h
  • IfxStdIf_Timer_Output_enabled : IfxStdIf_Timer.h
  • IfxStm_Comparator_0 : IfxStm.h
  • IfxStm_Comparator_1 : IfxStm.h
  • IfxStm_ComparatorInterrupt_ir0 : IfxStm.h
  • IfxStm_ComparatorInterrupt_ir1 : IfxStm.h
  • IfxStm_ComparatorOffset_0 : IfxStm.h
  • IfxStm_ComparatorOffset_1 : IfxStm.h
  • IfxStm_ComparatorOffset_10 : IfxStm.h
  • IfxStm_ComparatorOffset_11 : IfxStm.h
  • IfxStm_ComparatorOffset_12 : IfxStm.h
  • IfxStm_ComparatorOffset_13 : IfxStm.h
  • IfxStm_ComparatorOffset_14 : IfxStm.h
  • IfxStm_ComparatorOffset_15 : IfxStm.h
  • IfxStm_ComparatorOffset_16 : IfxStm.h
  • IfxStm_ComparatorOffset_17 : IfxStm.h
  • IfxStm_ComparatorOffset_18 : IfxStm.h
  • IfxStm_ComparatorOffset_19 : IfxStm.h
  • IfxStm_ComparatorOffset_2 : IfxStm.h
  • IfxStm_ComparatorOffset_20 : IfxStm.h
  • IfxStm_ComparatorOffset_21 : IfxStm.h
  • IfxStm_ComparatorOffset_22 : IfxStm.h
  • IfxStm_ComparatorOffset_23 : IfxStm.h
  • IfxStm_ComparatorOffset_24 : IfxStm.h
  • IfxStm_ComparatorOffset_25 : IfxStm.h
  • IfxStm_ComparatorOffset_26 : IfxStm.h
  • IfxStm_ComparatorOffset_27 : IfxStm.h
  • IfxStm_ComparatorOffset_28 : IfxStm.h
  • IfxStm_ComparatorOffset_29 : IfxStm.h
  • IfxStm_ComparatorOffset_3 : IfxStm.h
  • IfxStm_ComparatorOffset_30 : IfxStm.h
  • IfxStm_ComparatorOffset_31 : IfxStm.h
  • IfxStm_ComparatorOffset_4 : IfxStm.h
  • IfxStm_ComparatorOffset_5 : IfxStm.h
  • IfxStm_ComparatorOffset_6 : IfxStm.h
  • IfxStm_ComparatorOffset_7 : IfxStm.h
  • IfxStm_ComparatorOffset_8 : IfxStm.h
  • IfxStm_ComparatorOffset_9 : IfxStm.h
  • IfxStm_ComparatorSize_10Bits : IfxStm.h
  • IfxStm_ComparatorSize_11Bits : IfxStm.h
  • IfxStm_ComparatorSize_12Bits : IfxStm.h
  • IfxStm_ComparatorSize_13Bits : IfxStm.h
  • IfxStm_ComparatorSize_14Bits : IfxStm.h
  • IfxStm_ComparatorSize_15Bits : IfxStm.h
  • IfxStm_ComparatorSize_16Bits : IfxStm.h
  • IfxStm_ComparatorSize_17Bits : IfxStm.h
  • IfxStm_ComparatorSize_18Bits : IfxStm.h
  • IfxStm_ComparatorSize_19Bits : IfxStm.h
  • IfxStm_ComparatorSize_1Bit : IfxStm.h
  • IfxStm_ComparatorSize_20Bits : IfxStm.h
  • IfxStm_ComparatorSize_21Bits : IfxStm.h
  • IfxStm_ComparatorSize_22Bits : IfxStm.h
  • IfxStm_ComparatorSize_23Bits : IfxStm.h
  • IfxStm_ComparatorSize_24Bits : IfxStm.h
  • IfxStm_ComparatorSize_25Bits : IfxStm.h
  • IfxStm_ComparatorSize_26Bits : IfxStm.h
  • IfxStm_ComparatorSize_27Bits : IfxStm.h
  • IfxStm_ComparatorSize_28Bits : IfxStm.h
  • IfxStm_ComparatorSize_29Bits : IfxStm.h
  • IfxStm_ComparatorSize_2Bits : IfxStm.h
  • IfxStm_ComparatorSize_30Bits : IfxStm.h
  • IfxStm_ComparatorSize_31Bits : IfxStm.h
  • IfxStm_ComparatorSize_32Bits : IfxStm.h
  • IfxStm_ComparatorSize_3Bits : IfxStm.h
  • IfxStm_ComparatorSize_4Bits : IfxStm.h
  • IfxStm_ComparatorSize_5Bits : IfxStm.h
  • IfxStm_ComparatorSize_6Bits : IfxStm.h
  • IfxStm_ComparatorSize_7Bits : IfxStm.h
  • IfxStm_ComparatorSize_8Bits : IfxStm.h
  • IfxStm_ComparatorSize_9Bits : IfxStm.h
  • IfxStm_Index_0 : IfxStm_cfg.h
  • IfxStm_Index_1 : IfxStm_cfg.h
  • IfxStm_Index_2 : IfxStm_cfg.h
  • IfxStm_Index_3 : IfxStm_cfg.h
  • IfxStm_Index_none : IfxStm_cfg.h
  • IfxStm_SleepMode_disable : IfxStm.h
  • IfxStm_SleepMode_enable : IfxStm.h
  • IfxStm_SuspendMode_hard : IfxStm.h
  • IfxStm_SuspendMode_none : IfxStm.h
  • IfxStm_SuspendMode_soft : IfxStm.h


iLLD_TC38A: Globals

- s -

  • SpiIf_ClockPolarity_idleHigh : SpiIf.h
  • SpiIf_ClockPolarity_idleLow : SpiIf.h
  • SpiIf_DataHeading_lsbFirst : SpiIf.h
  • SpiIf_DataHeading_msbFirst : SpiIf.h
  • SpiIf_Mode_master : SpiIf.h
  • SpiIf_Mode_slave : SpiIf.h
  • SpiIf_Mode_undefined : SpiIf.h
  • SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge : SpiIf.h
  • SpiIf_ShiftClock_shiftTransmitDataOnTrailingEdge : SpiIf.h
  • SpiIf_SlsoTiming_0 : SpiIf.h
  • SpiIf_SlsoTiming_1 : SpiIf.h
  • SpiIf_SlsoTiming_2 : SpiIf.h
  • SpiIf_SlsoTiming_3 : SpiIf.h
  • SpiIf_SlsoTiming_4 : SpiIf.h
  • SpiIf_SlsoTiming_5 : SpiIf.h
  • SpiIf_SlsoTiming_6 : SpiIf.h
  • SpiIf_SlsoTiming_7 : SpiIf.h
  • SpiIf_Status_busy : SpiIf.h
  • SpiIf_Status_ok : SpiIf.h
  • SpiIf_Status_unknown : SpiIf.h


iLLD_TC38A: Globals

- _ -

  • ___setareg : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsTasking.h
  • __abs : IfxCpu_IntrinsicsGnuc.h
  • __abs_stdreal : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __absb : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __absdif : IfxCpu_IntrinsicsGnuc.h
  • __absf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __absh : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __abss : IfxCpu_IntrinsicsGnuc.h
  • __abssh : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __adds : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __addsu : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __asm__ : Ifx_TypesTasking.h
  • __bisr : IfxCpu_IntrinsicsGnuc.h
  • __cacheai : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __cacheawi : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __cacheawi_bo_post_inc : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __cacheiwi : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __checkrange : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __checkrangef : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __checkrangeX : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __clo : IfxCpu_IntrinsicsGnuc.h
  • __cls : IfxCpu_IntrinsicsGnuc.h
  • __clssf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __clz : IfxCpu_IntrinsicsGnuc.h
  • __cmpAndSwap : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __crc32 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __CSA : CompilerTasking.h , Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersTasking.h , CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h
  • __CSA_END : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h , Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersTasking.h
  • __debug : IfxCpu_IntrinsicsGnuc.h
  • __disable : IfxCpu_IntrinsicsGnuc.h
  • __disable_and_save : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __dsync : IfxCpu_IntrinsicsGnuc.h
  • __enable : IfxCpu_IntrinsicsGnuc.h
  • __extr : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __extractbyte1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __extractbyte2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __extractbyte3 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __extractbyte4 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __extracthw1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __extracthw2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __extractubyte1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __extractubyte2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __extractubyte3 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __extractubyte4 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __extractuhw1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __extractuhw2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __extru : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __fabs : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __fabsf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __fixpoint_to_float32 : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h
  • __float_to_fract : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __float_to_sfract : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __fract_to_float : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __fract_to_sfract : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __geqf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __getA11 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __getbit : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __getbyte1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __getbyte2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __getbyte3 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __getbyte4 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __getDataParamRet : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __getfract : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __gethw1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __gethw2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __getubyte1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __getubyte2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __getubyte3 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __getubyte4 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __getuhw1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __getuhw2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __HIGHTEC__ : Ifx_Ssw_Compilers.h
  • __imaskldmst : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __initpackb : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __initpackbl : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __initpackhw : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __initpackhwl : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __initupackb : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __initupackhw : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __ins : IfxCpu_IntrinsicsGnuc.h
  • __insert : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __insertbyte1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __insertbyte2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __insertbyte3 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __insertbyte4 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __inserthw1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __inserthw2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __insertubyte1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __insertubyte2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __insertubyte3 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __insertubyte4 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __insertuhw1 : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h
  • __insertuhw2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __insn : IfxCpu_IntrinsicsGnuc.h
  • __interrupt : Ifx_TypesGhs.h , Ifx_TypesGnuc.h
  • __INTTAB : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h , Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersTasking.h
  • __INTTAB_CPU : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h , Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersTasking.h
  • __ISTACK : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h , Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersTasking.h
  • __isync : IfxCpu_IntrinsicsGnuc.h
  • __jump_and_link : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __jumpBackToLink : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __jumpToFunction : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __jumpToFunctionWithLink : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __ldmst : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __ldmstAsm : IfxCpu_IntrinsicsTasking.h
  • __ldmstC : IfxCpu_IntrinsicsTasking.h
  • __leqf : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __mac_r_sf : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __mac_sf : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h
  • __max : IfxCpu_IntrinsicsGnuc.h
  • __max_stdreal : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __maxf : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsTasking.h
  • __maxs : IfxCpu_IntrinsicsGnuc.h
  • __maxu : IfxCpu_IntrinsicsGnuc.h
  • __maxX : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __mem_barrier : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __mfcr : IfxCpu_IntrinsicsGnuc.h
  • __min : IfxCpu_IntrinsicsGnuc.h
  • __min_stdreal : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsTasking.h
  • __minb : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __minbu : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __minf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGnuc.h
  • __minh : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __minhu : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __mins : IfxCpu_IntrinsicsGnuc.h
  • __minu : IfxCpu_IntrinsicsGnuc.h
  • __minX : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h
  • __moveToAddrParam0 : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h
  • __moveToDataParam0 : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h
  • __moveToDataParamRet : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __mtcr : IfxCpu_IntrinsicsGnuc.h
  • __mtcr_no_isync : IfxCpu_IntrinsicsTasking.h
  • __mulfractfract : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGnuc.h
  • __mulfractlong : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGnuc.h
  • __mulsc : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __neqf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __non_return_call : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __nop : IfxCpu_IntrinsicsGnuc.h
  • __nops : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsTasking.h
  • __nops1000 : IfxCpu_IntrinsicsDcc.h
  • __parity : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __popcnt : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __putbit : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h
  • __restore : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __rol : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __ror : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __round16 : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __roundf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGnuc.h
  • __rslcx : IfxCpu_IntrinsicsGnuc.h
  • __s16_to_sfract : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs.h
  • __satb : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __satbu : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __sath : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __sathu : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __saturate : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsTasking.h
  • __saturate_stdreal : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsTasking.h
  • __saturatef : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsTasking.h
  • __saturateu : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __saturateX : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __SDATA1 : Ifx_Ssw_CompilersTasking.h , Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersGnuc.h , CompilerGhs.h , CompilerTasking.h , CompilerDcc.h , CompilerGnuc.h , Ifx_Ssw_CompilersDcc.h
  • __SDATA2 : Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersTasking.h , CompilerTasking.h , CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , Ifx_Ssw_CompilersDcc.h
  • __SDATA3 : CompilerGhs.h , Ifx_Ssw_CompilersGhs.h , CompilerTasking.h , Ifx_Ssw_CompilersGnuc.h , CompilerDcc.h , CompilerGnuc.h , Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersTasking.h
  • __SDATA4 : Ifx_Ssw_CompilersTasking.h , CompilerGnuc.h , CompilerDcc.h , CompilerGhs.h , Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersGnuc.h , CompilerTasking.h
  • __setareg : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h
  • __setbyte1 : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __setbyte2 : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h
  • __setbyte3 : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h
  • __setbyte4 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __sethw1 : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __sethw2 : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h
  • __setStackPointer : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsTasking.h
  • __setubyte1 : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h
  • __setubyte2 : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h
  • __setubyte3 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __setubyte4 : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h
  • __setuhw1 : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h
  • __setuhw2 : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __sfract_to_s16 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __sfract_to_u16 : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h
  • __shaaccum : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __shafracts : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __shasfracts : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __sqrf : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __sqrtf : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __START : Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersTasking.h , Ifx_Ssw_CompilersGhs.h
  • __stopPerfCounters : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h
  • __subs : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __subsu : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __svlcx : IfxCpu_IntrinsicsGnuc.h
  • __swap : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h
  • __syscall : IfxCpu_IntrinsicsGnuc.h
  • __TRAPTAB : Ifx_Ssw_CompilersGnuc.h , CompilerGhs.h , Ifx_Ssw_CompilersTasking.h , Ifx_Ssw_CompilersGhs.h , CompilerTasking.h , Ifx_Ssw_CompilersDcc.h , CompilerDcc.h , CompilerGnuc.h
  • __TRAPTAB_CPU : Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersTasking.h , CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • __tric_syscall : IfxCpu_IntrinsicsGnuc.h
  • __u16_to_sfract : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h
  • __USTACK : CompilerTasking.h , Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersTasking.h , CompilerDcc.h , Ifx_Ssw_CompilersDcc.h , CompilerGnuc.h , Ifx_Ssw_CompilersGnuc.h , CompilerGhs.h
  • _DATAF : Ifx_Cf32.h


iLLD_TC38A: Globals

- a -

  • ABCQMAX : IfxQspi.c
  • ABCQMIN : IfxQspi.c
  • ATO_K : Ifx_AngleTrkF32.c
  • ATO_PSI : Ifx_AngleTrkF32.c
  • ATO_T : Ifx_AngleTrkF32.c


iLLD_TC38A: Globals

- b -

  • BSP_DEFAULT_TIMER : Bsp.h


iLLD_TC38A: Globals

- c -

  • CFG_LONG_SIZE_T : Compilers.h
  • COMPILER_NAME : CompilerDcc.h , CompilerGnuc.h , CompilerTasking.h , CompilerGhs.h
  • COMPILER_REVISION : CompilerGnuc.h , CompilerTasking.h , CompilerDcc.h , CompilerGhs.h
  • COMPILER_VERSION : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • CONSOLE : Ifx_Console.h
  • CONST_CFG : Compilers.h
  • CONST_FUNCP : Ifx_Ssw_CompilersGhs.h
  • Cplx_f32_printf : Ifx_Cf32.h
  • CPU_BIT_ORDER : Platform_Types.h
  • CPU_BYTE_ORDER : Platform_Types.h
  • CPU_TYPE : Platform_Types.h
  • CPU_TYPE_16 : Platform_Types.h
  • CPU_TYPE_32 : Platform_Types.h
  • CPU_TYPE_8 : Platform_Types.h
  • CRC_ENABLE_DPIPE : Ifx_Crc.h


iLLD_TC38A: Globals

- e -

  • ENDL : IfxStdIf_DPipe.h


iLLD_TC38A: Globals

- f -

  • FALSE : Platform_Types.h
  • fract : Ifx_TypesTasking.h
  • FRACT_MAX : Ifx_TypesGhs.h , Ifx_TypesDcc.h , Ifx_TypesGnuc.h


iLLD_TC38A: Globals

- h -

  • HIGH_BYTE_FIRST : Platform_Types.h


iLLD_TC38A: Globals

- i -

  • Ifx___setareg : IfxCpu_IntrinsicsTasking.h
  • Ifx__abs : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__abs_stdreal : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__absdif : IfxCpu_IntrinsicsDcc.h
  • Ifx__absf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__abss : IfxCpu_IntrinsicsDcc.h
  • Ifx__adds : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__addsu : IfxCpu_IntrinsicsTasking.h
  • Ifx__bisr : IfxCpu_IntrinsicsDcc.h
  • Ifx__cacheawi : IfxCpu_IntrinsicsDcc.h
  • Ifx__checkrange : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__checkrangef : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__checkrangeX : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__clo : IfxCpu_IntrinsicsDcc.h
  • Ifx__cls : IfxCpu_IntrinsicsDcc.h
  • Ifx__clz : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__cmpAndSwap : IfxCpu_IntrinsicsTasking.h
  • Ifx__debug : IfxCpu_IntrinsicsDcc.h
  • Ifx__disable : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__disable_and_save : IfxCpu_IntrinsicsTasking.h
  • Ifx__dsync : IfxCpu_IntrinsicsDcc.h
  • Ifx__enable : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extr : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__extru : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__fract_to_float : IfxCpu_IntrinsicsTasking.h
  • Ifx__fract_to_sfract : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__geqf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__getbit : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__imaskldmst : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__ins : IfxCpu_IntrinsicsDcc.h
  • Ifx__insert : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__insn : IfxCpu_IntrinsicsDcc.h
  • Ifx__isync : IfxCpu_IntrinsicsDcc.h
  • Ifx__ldmst : IfxCpu_IntrinsicsTasking.h
  • Ifx__leqf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__max : IfxCpu_IntrinsicsDcc.h
  • Ifx__max_stdreal : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__maxf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__maxs : IfxCpu_IntrinsicsDcc.h
  • Ifx__maxu : IfxCpu_IntrinsicsDcc.h
  • Ifx__maxX : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__mem_barrier : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__mfcr : IfxCpu_IntrinsicsDcc.h
  • Ifx__min : IfxCpu_IntrinsicsDcc.h
  • Ifx__min_stdreal : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__minf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__mins : IfxCpu_IntrinsicsDcc.h
  • Ifx__minu : IfxCpu_IntrinsicsDcc.h
  • Ifx__minX : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__mtcr : IfxCpu_IntrinsicsDcc.h
  • Ifx__mtcr_no_isync : IfxCpu_IntrinsicsTasking.h
  • Ifx__mulfractfract : IfxCpu_IntrinsicsTasking.h
  • Ifx__mulfractlong : IfxCpu_IntrinsicsTasking.h
  • Ifx__neqf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__non_return_call : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__nop : IfxCpu_IntrinsicsDcc.h
  • Ifx__NOP : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__putbit : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__restore : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__roundf : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h
  • Ifx__rslcx : IfxCpu_IntrinsicsDcc.h
  • Ifx__saturate : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__saturate_stdreal : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__saturatef : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__saturateu : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__saturateX : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__setareg : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__sqrf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__sqrtf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__subs : IfxCpu_IntrinsicsTasking.h
  • Ifx__subsu : IfxCpu_IntrinsicsTasking.h
  • Ifx__svlcx : IfxCpu_IntrinsicsDcc.h
  • Ifx__syscall : IfxCpu_IntrinsicsDcc.h
  • IFX_ALIGN : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • IFX_ALIGN_128 : IfxCpu_Intrinsics.h
  • IFX_ALIGN_16 : IfxCpu_Intrinsics.h
  • IFX_ALIGN_256 : IfxCpu_Intrinsics.h
  • IFX_ALIGN_32 : IfxCpu_Intrinsics.h
  • IFX_ALIGN_64 : IfxCpu_Intrinsics.h
  • IFX_ALIGN_8 : IfxCpu_Intrinsics.h
  • Ifx_AlignOn128 : IfxCpu_Intrinsics.h
  • Ifx_AlignOn16 : IfxCpu_Intrinsics.h
  • Ifx_AlignOn256 : IfxCpu_Intrinsics.h
  • Ifx_AlignOn32 : IfxCpu_Intrinsics.h
  • Ifx_AlignOn64 : IfxCpu_Intrinsics.h
  • Ifx_AlignOn8 : IfxCpu_Intrinsics.h
  • IFX_ANGLETRKF32_ATAN2F : Ifx_AngleTrkF32.c
  • IFX_ASSERT : Ifx_Assert.h , Assert.h
  • IFX_ASSERT_FEATURE_NOT_AVAILABLE : Ifx_Assert.h
  • IFX_ASSERT_FEATURE_NOT_IMPLEMENTED : Ifx_Assert.h
  • Ifx_Assert_setStandardIo : Assert.h
  • IFX_CFG_ANGLETRKF32_FILTERED_SPEED : Ifx_AngleTrkF32.h
  • IFX_CFG_ANGLETRKF32_SPEED_FILTER : Ifx_AngleTrkF32.h
  • IFX_CFG_ASSERT_STDIO : Assert.h
  • IFX_CFG_ASSERT_USE_BREAKPOINT : Assert.h
  • IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT : Assert.h
  • IFX_CFG_CIRCULARBUFFER_C : Ifx_CircularBuffer.h
  • IFX_CFG_CONSOLE_INDENT_SIZE : Ifx_Console.h
  • IFX_CFG_CPU_TRAP_ASSERT_HOOK : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_BE_HOOK : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_CME_HOOK : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_DEBUG : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_IE_HOOK : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_IPE_HOOK : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_MME_HOOK : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_NMI_HOOK : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_SYSCALL_CPU0_HOOK : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_SYSCALL_CPU1_HOOK : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_SYSCALL_CPU2_HOOK : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_SYSCALL_CPU3_HOOK : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_SYSCALL_CPU4_HOOK : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_SYSCALL_CPU5_HOOK : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_TSR_HOOK : IfxCpu_Trap.c
  • IFX_CFG_GLOBAL_RESOURCES_ENABLED : Ifx_GlobalResources.h
  • IFX_CFG_SCU_EXT_CLOCK : IfxScu_cfg.h
  • IFX_CFG_SCU_PLL1_FREQUENCY : IfxScu_cfg.h
  • IFX_CFG_SCU_PLL2_FREQUENCY : IfxScu_cfg.h
  • IFX_CFG_SCU_PLL_FREQUENCY : IfxScu_cfg.h
  • IFX_CFG_SCU_SYSCLK_FREQUENCY : IfxScu_cfg.h
  • IFX_CFG_SCU_XTAL_FREQUENCY : IfxScu_cfg.h
  • IFX_CFG_SHELL_CMD_HISTORY_SIZE : Ifx_Shell.h
  • IFX_CFG_SHELL_CMD_LINE_SIZE : Ifx_Shell.h
  • IFX_CFG_SHELL_COMMAND_LISTS : Ifx_Shell.h
  • IFX_CFG_SHELL_PROMPT : Ifx_Shell.h
  • IFX_CFG_SSW_CALLOUT_LBIST : Ifx_Ssw_Tc0.c
  • IFX_CFG_SSW_CALLOUT_MBIST : Ifx_Ssw_Tc0.c
  • IFX_CFG_SSW_CALLOUT_MMIC_CHECK : Ifx_Ssw_Tc0.c
  • IFX_CFG_SSW_CALLOUT_MONBIST : Ifx_Ssw_Tc0.c
  • IFX_CFG_SSW_CALLOUT_PLL_INIT : Ifx_Ssw_Tc0.c
  • IFX_CFG_SSW_CALLOUT_PMS_INIT : Ifx_Ssw_Tc0.c
  • IFX_CFG_SSW_CALLOUT_SMU : Ifx_Ssw_Tc0.c
  • IFX_CFG_SSW_CLEAR_SAFETY_ENDINIT : Ifx_Ssw_Infra.h
  • IFX_CFG_SSW_ENABLE_INDIVIDUAL_C_INIT : Ifx_Ssw.h
  • IFX_CFG_SSW_ENABLE_TRICORE0 : Ifx_Ssw.h
  • IFX_CFG_SSW_ENABLE_TRICORE0_DCACHE : Ifx_Ssw_Tc0.c
  • IFX_CFG_SSW_ENABLE_TRICORE0_PCACHE : Ifx_Ssw_Tc0.c
  • IFX_CFG_SSW_ENABLE_TRICORE1 : Ifx_Ssw.h
  • IFX_CFG_SSW_ENABLE_TRICORE1_DCACHE : Ifx_Ssw_Tc1.c
  • IFX_CFG_SSW_ENABLE_TRICORE1_PCACHE : Ifx_Ssw_Tc1.c
  • IFX_CFG_SSW_ENABLE_TRICORE2 : Ifx_Ssw.h
  • IFX_CFG_SSW_ENABLE_TRICORE2_DCACHE : Ifx_Ssw_Tc2.c
  • IFX_CFG_SSW_ENABLE_TRICORE2_PCACHE : Ifx_Ssw_Tc2.c
  • IFX_CFG_SSW_ENABLE_TRICORE3 : Ifx_Ssw.h
  • IFX_CFG_SSW_ENABLE_TRICORE3_DCACHE : Ifx_Ssw_Tc3.c
  • IFX_CFG_SSW_ENABLE_TRICORE3_PCACHE : Ifx_Ssw_Tc3.c
  • IFX_CFG_SSW_EVR_OSC_FREQUENCY : Ifx_Ssw_Infra.h
  • IFX_CFG_SSW_PSW_DEFAULT : Ifx_Ssw.h
  • IFX_CFG_SSW_SET_SAFETY_ENDINIT : Ifx_Ssw_Infra.h
  • IFX_CFG_SSW_STARTCPU_WAIT_TIME_IN_SECONDS : Ifx_Ssw_Infra.h
  • IFX_CFG_SSW_SYSCLK_PIN_FREQUENCY : Ifx_Ssw_Infra.h
  • IFX_CFG_SSW_XTAL_FREQUENCY : Ifx_Ssw_Infra.h
  • IFX_CONST : Compilers.h
  • Ifx_COUNTOF : IfxCpu_Intrinsics.h
  • IFX_EXTERN : Compilers.h
  • IFX_F32_LUTL_SINCOS_ELEMENT_COUNT : Ifx_LutLSincosF32.c
  • IFX_FAR_ABS : CompilerGnuc.h , CompilerTasking.h , CompilerDcc.h , CompilerGhs.h
  • IFX_FFTF32_MAX_LENGTH : Ifx_FftF32.h
  • IFX_FFTF32_MAX_RESOLUTION : Ifx_FftF32.h
  • IFX_INLINE : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • IFX_INTERRUPT : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , Compilers.h , CompilerTasking.h
  • IFX_INTERRUPT_FAST : CompilerDcc.h , CompilerGnuc.h , CompilerTasking.h
  • IFX_INTERRUPT_INTERNAL : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • IFX_INTERRUPT_LEGACY : CompilerDcc.h
  • IFX_LLD_VERSION_GENERATION : IfxLldVersion.h
  • IFX_LLD_VERSION_MAJOR : IfxLldVersion.h
  • IFX_LLD_VERSION_MAJOR_UPDATE : IfxLldVersion.h
  • IFX_LLD_VERSION_MINOR : IfxLldVersion.h
  • IFX_LLD_VERSION_REVISION : IfxLldVersion.h
  • IFX_LUT_ANGLE_BITS : Ifx_Lut.h
  • IFX_LUT_ANGLE_PI : Ifx_Lut.h
  • IFX_LUT_ANGLE_RESOLUTION : Ifx_Lut.h
  • IFX_LUT_F32_TO_FXPANGLE : Ifx_Lut.h
  • IFX_LUT_FXPANGLE_TO_F32 : Ifx_Lut.h
  • IFX_LUT_TABLE : Ifx_Lut.h
  • IFX_LUT_TABLE_CONST : Ifx_Lut.h
  • IFX_LUTATAN2F32_SIZE : Ifx_LutAtan2F32.h
  • IFX_NEAR_ABS : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • IFX_ONE_OVER_SQRT_THREE : Ifx_Types.h
  • IFX_ONES : Ifx_Types.h
  • IFX_PACKED : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • IFX_PI : Ifx_Types.h
  • IFX_REL_A0 : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • IFX_REL_A1 : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • IFX_REL_A8 : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • IFX_REL_A9 : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • IFX_SHELL_CMD_HISTORY_NO_ITEM : Ifx_Shell.h
  • IFX_SHELL_COMMAND_LIST_END : Ifx_Shell.h
  • IFX_SHELL_IF_ECHO : Ifx_Shell.c
  • IFX_SHELL_LLD : Ifx_Shell.c
  • IFX_SHELL_LLU : Ifx_Shell.c
  • IFX_SHELL_LLX : Ifx_Shell.c
  • IFX_SHELL_MAX_MESSAGE_SIZE : Ifx_Shell.c
  • IFX_SHELL_NULL_CHAR : Ifx_Shell.h
  • IFX_SHELL_SYNTAX_LIST_END : Ifx_Shell.h
  • IFX_SHELL_WRITE_BACKSPACES : Ifx_Shell.c
  • IFX_SHELL_WRITE_SPACES : Ifx_Shell.c
  • IFX_SIZET_MAX : Ifx_Types.h
  • IFX_SQRT_THREE : Ifx_Types.h
  • IFX_SQRT_TWO : Ifx_Types.h
  • Ifx_Ssw___setAddressReg : Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersTasking.h
  • IFX_SSW_APPLICATIONRESET : Ifx_Ssw_Infra.h
  • IFX_SSW_APPLICATIONRESET_MASK : Ifx_Ssw_Infra.h
  • Ifx_Ssw_CLZ : Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersTasking.h
  • IFX_SSW_COLD_POWERONRESET_MASK : Ifx_Ssw_Infra.h
  • IFX_SSW_COMMON_LINKER_SYMBOLS : Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersTasking.h
  • IFX_SSW_CORE_LINKER_SYMBOLS : Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersTasking.h
  • IFX_SSW_CSA_SIZE : Ifx_Ssw_Infra.h
  • IFX_SSW_INIT_CONTEXT : Ifx_Ssw_Tc0.c
  • IFX_SSW_INLINE : Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersTasking.h
  • Ifx_Ssw_MFCR : Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersTasking.h
  • Ifx_Ssw_MTCR : Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersTasking.h
  • IFX_SSW_NULL_PTR : Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersTasking.h
  • IFX_SSW_POWERONRESET_MASK : Ifx_Ssw_Infra.h
  • IFX_SSW_SEICON_REL_VAL_MSK : Ifx_Ssw_Infra.h
  • Ifx_Ssw_setAddressReg : Ifx_Ssw_CompilersDcc.h , Ifx_Ssw_CompilersGhs.h , Ifx_Ssw_CompilersGnuc.h , Ifx_Ssw_CompilersTasking.h
  • IFX_SSW_WDT_PASSWORD_INVERT_MSK : Ifx_Ssw_Infra.h
  • IFX_STATIC : Compilers.h
  • IFX_TWO_OVER_PI : Ifx_Types.h
  • IFX_UNUSED_PARAMETER : Ifx_Types.h
  • IFX_VALIDATE : Ifx_Assert.h , Assert.h
  • IFX_VERBOSE_LEVEL_DEBUG : Ifx_Assert.h
  • IFX_VERBOSE_LEVEL_ERROR : Ifx_Assert.h
  • IFX_VERBOSE_LEVEL_FAILURE : Ifx_Assert.h
  • IFX_VERBOSE_LEVEL_INFO : Ifx_Assert.h
  • IFX_VERBOSE_LEVEL_OFF : Ifx_Assert.h
  • IFX_VERBOSE_LEVEL_WARNING : Ifx_Assert.h
  • IFX_WNDF32_TABLE_LENGTH : Ifx_WndF32.h
  • IFX_ZEROS : Ifx_Types.h
  • IFXASCLIN_LIN_RECEIVE_RESPONSE : IfxAsclin_Lin.h
  • IFXASCLIN_LIN_SEND_RESPONSE : IfxAsclin_Lin.h
  • IFXASCLIN_NUM_MODULES : IfxAsclin_cfg.h
  • IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS : IfxAsclin_PinMap.h
  • IFXASCLIN_PINMAP_NUM_MODULES : IfxAsclin_PinMap.h
  • IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS : IfxAsclin_PinMap.h
  • IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS : IfxAsclin_PinMap.h
  • IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS : IfxAsclin_PinMap.h
  • IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS : IfxAsclin_PinMap.h
  • IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS : IfxAsclin_PinMap.h
  • IFXCAN_NUM_MODULES : IfxCan_cfg.h
  • IFXCAN_NUM_NODES : IfxCan_cfg.h
  • IFXCAN_PINMAP_NUM_MODULES : IfxCan_PinMap.h
  • IFXCAN_PINMAP_NUM_NODES : IfxCan_PinMap.h
  • IFXCAN_PINMAP_RXD_IN_NUM_ITEMS : IfxCan_PinMap.h
  • IFXCAN_PINMAP_TXD_OUT_NUM_ITEMS : IfxCan_PinMap.h
  • IFXCCU6_EMPTY_OUTPUT_SLOT : IfxCcu6_cfg.c
  • IFXCCU6_NUM_MODULES : IfxCcu6_cfg.h
  • IFXCCU6_NUM_SERVICE_REQUESTS : IfxCcu6_cfg.h
  • IFXCCU6_NUM_T12_CHANNELS : IfxCcu6_cfg.h
  • IFXCCU6_NUM_T13_CHANNELS : IfxCcu6_cfg.h
  • IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_NUM_MODULES : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PWMHL_MAX_CHANNELS : IfxCcu6_PwmHl.h
  • IFXCOMPILER_COMMON_LINKER_SYMBOLS : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • IFXCOMPILER_CORE_LINKER_SYMBOLS : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • IFXCPU_ALLCORE_DONE : IfxCpu_cfg.h
  • IFXCPU_CACHABLE_FLASH_SEGMENT : IfxCpu_cfg.h
  • IFXCPU_CACHABLE_LMU_SEGMENT : IfxCpu_cfg.h
  • IFXCPU_CFG_ALLCORE_DONE : IfxCpu_cfg.h
  • IFXCPU_GLB_ADDR_DSPR : IfxCpu.h
  • IFXCPU_GLB_ADDR_PSPR : IfxCpu.h
  • IFXCPU_INTRINSICSGNUC_USE_MACHINE_INTRINSICS : IfxCpu_IntrinsicsGnuc.h
  • IFXCPU_NUM_MODULES : IfxCpu_cfg.h
  • IFXDMA_ERROR_D : IfxDma_cfg.h
  • IFXDMA_ERROR_DLL : IfxDma_cfg.h
  • IFXDMA_ERROR_RAM : IfxDma_cfg.h
  • IFXDMA_ERROR_S : IfxDma_cfg.h
  • IFXDMA_ERROR_SLL : IfxDma_cfg.h
  • IFXDMA_ERROR_SPB : IfxDma_cfg.h
  • IFXDMA_ERROR_SRI : IfxDma_cfg.h
  • IFXDMA_NUM_CHANNELS : IfxDma_cfg.h
  • IFXDMA_NUM_MODULES : IfxDma_cfg.h
  • IFXDMU_PINMAP_FDEST_IN_NUM_ITEMS : IfxDmu_PinMap.h
  • IFXDMU_PINMAP_NUM_0S : IfxDmu_PinMap.h
  • IFXDMU_PINMAP_NUM_MODULES : IfxDmu_PinMap.h
  • IFXDTS_DEFAULT_TEMPERATURELIMIT_LOW : IfxDts_cfg.h
  • IFXDTS_DEFAULT_TEMPERATURELIMIT_UPPER : IfxDts_cfg.h
  • IFXDTS_NUM_MODULES : IfxDts_cfg.h
  • IFXEDSADC_NUM_CHANNELS : IfxEdsadc_cfg.h
  • IFXEDSADC_NUM_MODULES : IfxEdsadc_cfg.h
  • IFXEDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS : IfxEdsadc_PinMap.h
  • IFXEDSADC_PINMAP_DSCIN_IN_NUM_ITEMS : IfxEdsadc_PinMap.h
  • IFXEDSADC_PINMAP_DSCOUT_OUT_NUM_ITEMS : IfxEdsadc_PinMap.h
  • IFXEDSADC_PINMAP_DSDIN_IN_NUM_ITEMS : IfxEdsadc_PinMap.h
  • IFXEDSADC_PINMAP_DSN_IN_NUM_ITEMS : IfxEdsadc_PinMap.h
  • IFXEDSADC_PINMAP_DSP_IN_NUM_ITEMS : IfxEdsadc_PinMap.h
  • IFXEDSADC_PINMAP_ITR_IN_NUM_ITEMS : IfxEdsadc_PinMap.h
  • IFXEDSADC_PINMAP_NUM_CHANNELS : IfxEdsadc_PinMap.h
  • IFXEDSADC_PINMAP_NUM_MODULES : IfxEdsadc_PinMap.h
  • IFXEDSADC_PINMAP_SG_IN_NUM_ITEMS : IfxEdsadc_PinMap.h
  • IFXERAY_NUM_CHANNELS : IfxEray_cfg.h
  • IFXERAY_NUM_MODULES : IfxEray_cfg.h
  • IFXERAY_NUM_SLOTS : IfxEray_cfg.h
  • IFXERAY_PINMAP_NUM_MODULES : IfxEray_PinMap.h
  • IFXERAY_PINMAP_NUM_NODES : IfxEray_PinMap.h
  • IFXERAY_PINMAP_RXD_IN_NUM_ITEMS : IfxEray_PinMap.h
  • IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS : IfxEray_PinMap.h
  • IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS : IfxEray_PinMap.h
  • IFXEVADC_ANALOG_FREQUENCY_MAX : IfxEvadc_cfg.h
  • IFXEVADC_ANALOG_FREQUENCY_MIN : IfxEvadc_cfg.h
  • IFXEVADC_DEFAULT_ANALOG_FREQ : IfxEvadc_cfg.h
  • IFXEVADC_MAXIMUM_BITFIELDS_IN_ACCPROT0_REGISTER : IfxEvadc_cfg.h
  • IFXEVADC_MAXIMUM_BITFIELDS_IN_ACCPROT1_REGISTER : IfxEvadc_cfg.h
  • IFXEVADC_NUM_ADC_CAL_GROUPS : IfxEvadc_cfg.h
  • IFXEVADC_NUM_ADC_COMMON_GROUPS : IfxEvadc_cfg.h
  • IFXEVADC_NUM_ADC_GROUPS : IfxEvadc_cfg.h
  • IFXEVADC_NUM_ADC_PRIMARY_GROUPS : IfxEvadc_cfg.h
  • IFXEVADC_NUM_ADC_SECONDARY_GROUPS : IfxEvadc_cfg.h
  • IFXEVADC_NUM_CHAN_PER_PRIM_GROUP : IfxEvadc_cfg.h
  • IFXEVADC_NUM_CHAN_PER_SEC_GROUP : IfxEvadc_cfg.h
  • IFXEVADC_NUM_FAST_COMPARE_CHANNELS : IfxEvadc_cfg.h
  • IFXEVADC_NUM_GLOBAL_INPUTCLASSES : IfxEvadc_cfg.h
  • IFXEVADC_NUM_INPUTCLASSES : IfxEvadc_cfg.h
  • IFXEVADC_NUM_REQUESTSLOTS : IfxEvadc_cfg.h
  • IFXEVADC_PINMAP_EMUX_OUT_NUM_ITEMS : IfxEvadc_PinMap.h
  • IFXEVADC_PINMAP_GXBFL_OUT_NUM_ITEMS : IfxEvadc_PinMap.h
  • IFXEVADC_PINMAP_NUM_GROUPS : IfxEvadc_PinMap.h
  • IFXEVADC_PINMAP_NUM_MODULES : IfxEvadc_PinMap.h
  • IFXEVADC_PINMAP_VADCG_IN_NUM_ITEMS : IfxEvadc_PinMap.h
  • IFXEVADC_QUEUE_REFILL : IfxEvadc_cfg.h
  • IFXEVADC_SAMPLETIME_MIN : IfxEvadc_cfg.h
  • IFXFCE_NUM_KERNEL : IfxFce_cfg.h
  • IFXFCE_NUM_MODULES : IfxFce_cfg.h
  • IFXFLASH_CMD_BASE_ADDRESS : IfxFlash_cfg.h
  • IFXFLASH_CMD_BASE_OFFSET : IfxFlash_cfg.h
  • IFXFLASH_DFLASH_BANKS : IfxFlash_cfg.h
  • IFXFLASH_DFLASH_BURST_LENGTH : IfxFlash_cfg.h
  • IFXFLASH_DFLASH_END : IfxFlash_cfg.h
  • IFXFLASH_DFLASH_NUM_CFS_LOG_SECTORS : IfxFlash_cfg.h
  • IFXFLASH_DFLASH_NUM_HSM_LOG_SECTORS : IfxFlash_cfg.h
  • IFXFLASH_DFLASH_NUM_LOG_SECTORS : IfxFlash_cfg.h
  • IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS : IfxFlash_cfg.h
  • IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS : IfxFlash_cfg.h
  • IFXFLASH_DFLASH_PAGE_LENGTH : IfxFlash_cfg.h
  • IFXFLASH_DFLASH_SIZE : IfxFlash_cfg.h
  • IFXFLASH_DFLASH_START : IfxFlash_cfg.h
  • IFXFLASH_DFLASH_WORDLINE_LENGTH : IfxFlash_cfg.h
  • IFXFLASH_ERROR_TRACKING_MAX_CORRECTABLE_ERRORS : IfxFlash_cfg.h
  • IFXFLASH_ERROR_TRACKING_MAX_UNCORRECTABLE_ERRORS : IfxFlash_cfg.h
  • IFXFLASH_NUM_FLASH_MODULES : IfxFlash_cfg.h
  • IFXFLASH_NUM_MODULES : IfxFlash_cfg.h
  • IFXFLASH_PFLASH_BANKS : IfxFlash_cfg.h
  • IFXFLASH_PFLASH_BURST_LENGTH : IfxFlash_cfg.h
  • IFXFLASH_PFLASH_END : IfxFlash_cfg.h
  • IFXFLASH_PFLASH_NUM_LOG_SECTORS : IfxFlash_cfg.h
  • IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS : IfxFlash_cfg.h
  • IFXFLASH_PFLASH_OFFSET : IfxFlash_cfg.h
  • IFXFLASH_PFLASH_P0_END : IfxFlash_cfg.h
  • IFXFLASH_PFLASH_P0_SIZE : IfxFlash_cfg.h
  • IFXFLASH_PFLASH_P0_START : IfxFlash_cfg.h
  • IFXFLASH_PFLASH_P1_END : IfxFlash_cfg.h
  • IFXFLASH_PFLASH_P1_SIZE : IfxFlash_cfg.h
  • IFXFLASH_PFLASH_P1_START : IfxFlash_cfg.h
  • IFXFLASH_PFLASH_P2_END : IfxFlash_cfg.h
  • IFXFLASH_PFLASH_P2_SIZE : IfxFlash_cfg.h
  • IFXFLASH_PFLASH_P2_START : IfxFlash_cfg.h
  • IFXFLASH_PFLASH_P3_END : IfxFlash_cfg.h
  • IFXFLASH_PFLASH_P3_SIZE : IfxFlash_cfg.h
  • IFXFLASH_PFLASH_P3_START : IfxFlash_cfg.h
  • IFXFLASH_PFLASH_PAGE_LENGTH : IfxFlash_cfg.h
  • IFXFLASH_PFLASH_SIZE : IfxFlash_cfg.h
  • IFXFLASH_PFLASH_START : IfxFlash_cfg.h
  • IFXFLASH_PFLASH_WORDLINE_LENGTH : IfxFlash_cfg.h
  • IFXGETH_MAX_RX_DESCRIPTORS : IfxGeth.h
  • IFXGETH_MAX_TIMEOUT_VALUE : IfxGeth_cfg.h
  • IFXGETH_MAX_TX_DESCRIPTORS : IfxGeth.h
  • IFXGETH_NUM_DMA_CHANNELS : IfxGeth_cfg.h
  • IFXGETH_NUM_MODULES : IfxGeth_cfg.h
  • IFXGETH_NUM_RX_CHANNELS : IfxGeth_cfg.h
  • IFXGETH_NUM_RX_QUEUES : IfxGeth_cfg.h
  • IFXGETH_NUM_TX_CHANNELS : IfxGeth_cfg.h
  • IFXGETH_NUM_TX_QUEUES : IfxGeth_cfg.h
  • IFXGETH_PHY_WAIT_GMII_READY : IfxGeth.h
  • IFXGETH_PINMAP_COL_IN_NUM_ITEMS : IfxGeth_PinMap.h
  • IFXGETH_PINMAP_CRS_IN_NUM_ITEMS : IfxGeth_PinMap.h
  • IFXGETH_PINMAP_CRSDV_IN_NUM_ITEMS : IfxGeth_PinMap.h
  • IFXGETH_PINMAP_GREFCLK_IN_NUM_ITEMS : IfxGeth_PinMap.h
  • IFXGETH_PINMAP_MDC_OUT_NUM_ITEMS : IfxGeth_PinMap.h
  • IFXGETH_PINMAP_MDIO_INOUT_NUM_ITEMS : IfxGeth_PinMap.h
  • IFXGETH_PINMAP_NUM_MODULES : IfxGeth_PinMap.h
  • IFXGETH_PINMAP_PPS_OUT_NUM_ITEMS : IfxGeth_PinMap.h
  • IFXGETH_PINMAP_REFCLK_IN_NUM_ITEMS : IfxGeth_PinMap.h
  • IFXGETH_PINMAP_RXCLK_IN_NUM_ITEMS : IfxGeth_PinMap.h
  • IFXGETH_PINMAP_RXCTL_IN_NUM_ITEMS : IfxGeth_PinMap.h
  • IFXGETH_PINMAP_RXD_IN_NUM_ITEMS : IfxGeth_PinMap.h
  • IFXGETH_PINMAP_RXDV_IN_NUM_ITEMS : IfxGeth_PinMap.h
  • IFXGETH_PINMAP_RXER_IN_NUM_ITEMS : IfxGeth_PinMap.h
  • IFXGETH_PINMAP_TXCLK_IN_NUM_ITEMS : IfxGeth_PinMap.h
  • IFXGETH_PINMAP_TXCLK_OUT_NUM_ITEMS : IfxGeth_PinMap.h
  • IFXGETH_PINMAP_TXCTL_OUT_NUM_ITEMS : IfxGeth_PinMap.h
  • IFXGETH_PINMAP_TXD_OUT_NUM_ITEMS : IfxGeth_PinMap.h
  • IFXGETH_PINMAP_TXEN_OUT_NUM_ITEMS : IfxGeth_PinMap.h
  • IFXGETH_PINMAP_TXER_OUT_NUM_ITEMS : IfxGeth_PinMap.h
  • IFXGLOBAL_DERIVATIVE_NAME : IfxGlobal_cfg.h
  • IFXGLOBAL_DERIVATIVE_TC38x : IfxGlobal_cfg.h
  • IFXGPT12_NUM_MODULES : IfxGpt12_cfg.h
  • IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS : IfxGpt12_PinMap.h
  • IFXGPT12_PINMAP_NUM_MODULES : IfxGpt12_PinMap.h
  • IFXGPT12_PINMAP_NUM_TIMERS : IfxGpt12_PinMap.h
  • IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS : IfxGpt12_PinMap.h
  • IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS : IfxGpt12_PinMap.h
  • IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS : IfxGpt12_PinMap.h
  • IFXGTM_ATOM_DTM_PWMHL_MAX_DEADTIME_IN_TICKS : IfxGtm_Atom_Dtm_PwmHl.h
  • IFXGTM_ATOM_DTM_PWMHL_MAX_NUM_CHANNELS : IfxGtm_Atom_Dtm_PwmHl.h
  • IFXGTM_ATOM_NUM_AGC_CHANNELS : IfxGtm_Atom.c
  • IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS : IfxGtm_Atom_PwmHl.h
  • IFXGTM_CMU_CLKDIS_ALL : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKDIS_CLK0 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKDIS_CLK1 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKDIS_CLK2 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKDIS_CLK3 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKDIS_CLK4 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKDIS_CLK5 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKDIS_CLK6 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKDIS_CLK7 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKDIS_ECLK0 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKDIS_ECLK1 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKDIS_ECLK2 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKDIS_FXCLK : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKEN_ALL : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKEN_CLK0 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKEN_CLK1 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKEN_CLK2 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKEN_CLK3 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKEN_CLK4 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKEN_CLK5 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKEN_CLK6 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKEN_CLK7 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKEN_ECLK0 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKEN_ECLK1 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKEN_ECLK2 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKEN_FXCLK : IfxGtm_cfg.h
  • IFXGTM_NUM_ATOM_CHANNELS : IfxGtm_cfg.h
  • IFXGTM_NUM_ATOM_OBJECTS : IfxGtm_cfg.h
  • IFXGTM_NUM_CCM_OBJECTS : IfxGtm_cfg.h
  • IFXGTM_NUM_CDTM_OBJECTS : IfxGtm_cfg.h
  • IFXGTM_NUM_DTM_PER_CDTM_OBJECTS : IfxGtm_cfg.h
  • IFXGTM_NUM_MCS_OBJECTS : IfxGtm_cfg.h
  • IFXGTM_NUM_MODULES : IfxGtm_cfg.h
  • IFXGTM_NUM_PSM_OBJECTS : IfxGtm_cfg.h
  • IFXGTM_NUM_SPE_OBJECTS : IfxGtm_cfg.h
  • IFXGTM_NUM_TIM_CHANNELS : IfxGtm_cfg.h
  • IFXGTM_NUM_TIM_OBJECTS : IfxGtm_cfg.h
  • IFXGTM_NUM_TOM_CHANNELS : IfxGtm_cfg.h
  • IFXGTM_NUM_TOM_OBJECTS : IfxGtm_cfg.h
  • IFXGTM_PSM_FIFORAMSIZE : IfxGtm_cfg.h
  • IFXGTM_PSM_FIFOWORDWIDTH : IfxGtm_cfg.h
  • IFXGTM_SPE_GET_ETRIG : IfxGtm_Spe.h
  • IFXGTM_SPE_GET_TRIGSEL : IfxGtm_Spe.h
  • IFXGTM_SPE_GETALLPATTERNS : IfxGtm_Spe.h
  • IFXGTM_SPE_SETCHANNELOUTPUT : IfxGtm_Spe.h
  • IFXGTM_SPE_SETSINGLEPATTERN : IfxGtm_Spe.h
  • IFXGTM_TOM_DTM_PWMHL_MAX_DEADTIME_IN_TICKS : IfxGtm_Tom_Dtm_PwmHl.h
  • IFXGTM_TOM_DTM_PWMHL_MAX_NUM_CHANNELS : IfxGtm_Tom_Dtm_PwmHl.h
  • IFXGTM_TOM_NUM_TGC_CHANNELS : IfxGtm_Tom.h
  • IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS : IfxGtm_Tom_PwmHl.h
  • IFXHSSL_JTAG_ID_ADDRESS : IfxHssl_cfg.h
  • IFXHSSL_NUM_CHANNELS : IfxHssl_cfg.h
  • IFXHSSL_NUM_MODULES : IfxHssl_cfg.h
  • IFXI2C_HIGHSPEED_MASTER_CODE : IfxI2c.h
  • IFXI2C_NUM_MODULES : IfxI2c_cfg.h
  • IFXI2C_PINMAP_NUM_MODULES : IfxI2c_PinMap.h
  • IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS : IfxI2c_PinMap.h
  • IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS : IfxI2c_PinMap.h
  • IFXIOM_DRIVER_LAM_GET_MON_INPUT_INDEX : IfxIom_Driver.c
  • IFXIOM_DRIVER_LAM_GET_MON_INPUT_SIGNAL : IfxIom_Driver.c
  • IFXIOM_DRIVER_LAM_GET_REF_INPUT_INDEX : IfxIom_Driver.c
  • IFXIOM_DRIVER_LAM_GET_REF_INPUT_SIGNAL : IfxIom_Driver.c
  • IFXIOM_NUM_CHANNELS : IfxIom_cfg.h
  • IFXLMU_NUM_MODULES : IfxLmu_cfg.h
  • IFXMSC_NUM_ENABLE_SELECT_LINES : IfxMsc_cfg.h
  • IFXMSC_NUM_MODULES : IfxMsc_cfg.h
  • IFXMSC_PINMAP_EN_OUT_NUM_ITEMS : IfxMsc_PinMap.h
  • IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS : IfxMsc_PinMap.h
  • IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS : IfxMsc_PinMap.h
  • IFXMSC_PINMAP_INJ_IN_NUM_ITEMS : IfxMsc_PinMap.h
  • IFXMSC_PINMAP_NUM_MODULES : IfxMsc_PinMap.h
  • IFXMSC_PINMAP_NUM_TARGETS : IfxMsc_PinMap.h
  • IFXMSC_PINMAP_SDI_IN_NUM_ITEMS : IfxMsc_PinMap.h
  • IFXMSC_PINMAP_SON_OUT_NUM_ITEMS : IfxMsc_PinMap.h
  • IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS : IfxMsc_PinMap.h
  • IFXMTU_CLEAR_GLOBAL_SAFETY_ENDINIT : IfxMtu.c
  • IFXMTU_CLEAR_SRAM_MCONTROL_CONFIG : IfxMtu.c
  • IFXMTU_ERROR_FLAGS_MASK : IfxMtu.h
  • IFXMTU_LOOP_TIMEOUT_CHECK : IfxMtu.h
  • IFXMTU_MAX_TRACKED_ADDRESSES : IfxMtu_cfg.h
  • IFXMTU_MBIST_CONFIG_NONDISTTEST_CONFIG0 : IfxMtu.h
  • IFXMTU_MBIST_CONFIG_NONDISTTEST_CONFIG1 : IfxMtu.h
  • IFXMTU_MBIST_CONFIG_NONDISTTEST_MCONTROL : IfxMtu.h
  • IFXMTU_MC_ADDRESS_BASE : IfxMtu_cfg.h
  • IFXMTU_NUM_MBIST_TABLE_ITEMS : IfxMtu_cfg.h
  • IFXMTU_SCRAMBLED_RANGE_ADDR_DLMU0 : IfxMtu_cfg.h
  • IFXMTU_SCRAMBLED_RANGE_ADDR_DLMU1 : IfxMtu_cfg.h
  • IFXMTU_SCRAMBLED_RANGE_ADDR_DLMU2 : IfxMtu_cfg.h
  • IFXMTU_SCRAMBLED_RANGE_ADDR_DLMU3 : IfxMtu_cfg.h
  • IFXMTU_SCRAMBLED_RANGE_ADDR_DSPR0 : IfxMtu_cfg.h
  • IFXMTU_SCRAMBLED_RANGE_ADDR_DSPR1 : IfxMtu_cfg.h
  • IFXMTU_SCRAMBLED_RANGE_ADDR_DSPR2 : IfxMtu_cfg.h
  • IFXMTU_SCRAMBLED_RANGE_ADDR_DSPR3 : IfxMtu_cfg.h
  • IFXMTU_SCRAMBLED_RANGE_ADDR_PSPR0 : IfxMtu_cfg.h
  • IFXMTU_SCRAMBLED_RANGE_ADDR_PSPR1 : IfxMtu_cfg.h
  • IFXMTU_SCRAMBLED_RANGE_ADDR_PSPR2 : IfxMtu_cfg.h
  • IFXMTU_SCRAMBLED_RANGE_ADDR_PSPR3 : IfxMtu_cfg.h
  • IFXMTU_SET_GLOBAL_SAFETY_ENDINIT : IfxMtu.c
  • IFXMTU_WAIT_TIMEOUTCOUNT : IfxMtu.h
  • IFXPMS_DISABLE_ALL_MODULES_STANDBY : IfxPms_cfg.h
  • IFXPMS_DISABLE_MODULES_DURING_SLEEP : IfxPms_cfg.h
  • IFXPMS_NUM_MODULES : IfxPms_cfg.h
  • IFXPMS_PINMAP_DCDCSYNC_OUT_NUM_ITEMS : IfxPms_PinMap.h
  • IFXPMS_PINMAP_HWCFG_IN_NUM_ITEMS : IfxPms_PinMap.h
  • IFXPMS_PINMAP_NUM_MODULES : IfxPms_PinMap.h
  • IFXPMS_PINMAP_WKP_IN_NUM_ITEMS : IfxPms_PinMap.h
  • IFXPMS_RESTART_EXECUTION : IfxPms_cfg.h
  • IFXPMS_STANDBY_CPU0_DLMU_RAR_AREA : IfxPms_cfg.h
  • IFXPMS_STANDBY_CPU1_DLMU_RAR_AREA : IfxPms_cfg.h
  • IFXPMS_STANDBY_DLMU_RAR_SIZE : IfxPms_cfg.h
  • IFXPMS_WAIT_CYCLES : IfxPms_cfg.h
  • IFXPMS_WAKEUP_MODULES : IfxPms_cfg.h
  • IFXPMSEVR_ADC_VDD_LSB : IfxPmsEvr.h
  • IFXPMSEVR_ADC_VDDP3_LSB : IfxPmsEvr.h
  • IFXPMSEVR_ADC_VEXT_LSB : IfxPmsEvr.h
  • IFXPMSEVR_CTRL_UP_WAIT_TIMEOUTCOUNT : IfxPmsEvr.h
  • IFXPORT_NUM_MODULES : IfxPort_cfg.h
  • IFXPORT_OUTOUTFEATURE_NONE : IfxPort_cfg.h
  • IFXPORT_PINMAP_NUM_MODULES : IfxPort_PinMap.h
  • IFXPORT_PINMAP_PIN_NUM_ITEMS : IfxPort_PinMap.h
  • IFXPSI5_DEFAULT_FASTCLOCK_FREQ : IfxPsi5_cfg.h
  • IFXPSI5_DEFAULT_SLOWCLOCK_FREQ : IfxPsi5_cfg.h
  • IFXPSI5_DEFAULT_TIMESTAMP_FREQ : IfxPsi5_cfg.h
  • IFXPSI5_ENABLE_CHANNEL : IfxPsi5_cfg.h
  • IFXPSI5_ENABLE_CHANNELTRIGGER : IfxPsi5_cfg.h
  • IFXPSI5_NUM_CHANNELS : IfxPsi5_cfg.h
  • IFXPSI5_NUM_MODULES : IfxPsi5_cfg.h
  • IFXPSI5_NUM_SLOTS : IfxPsi5_cfg.h
  • IFXPSI5_NUM_WDTS : IfxPsi5_cfg.h
  • IFXPSI5_PINMAP_NUM_CHANNELS : IfxPsi5_PinMap.h
  • IFXPSI5_PINMAP_NUM_MODULES : IfxPsi5_PinMap.h
  • IFXPSI5_PINMAP_RX_IN_NUM_ITEMS : IfxPsi5_PinMap.h
  • IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS : IfxPsi5_PinMap.h
  • IFXPSI5_STEP_RANGE : IfxPsi5_cfg.h
  • IFXPSI5S_BAUDRATE_1562500 : IfxPsi5s_cfg.h
  • IFXPSI5S_BG_RANGE : IfxPsi5s_cfg.h
  • IFXPSI5S_DEFAULT_FASTCLOCK_FREQ : IfxPsi5s_cfg.h
  • IFXPSI5S_DEFAULT_SLOWCLOCK_FREQ : IfxPsi5s_cfg.h
  • IFXPSI5S_DEFAULT_TIMESTAMP_FREQ : IfxPsi5s_cfg.h
  • IFXPSI5S_ENABLE_CHANNEL : IfxPsi5s_cfg.h
  • IFXPSI5S_ENABLE_CHANNELTRIGGER : IfxPsi5s_cfg.h
  • IFXPSI5S_FDV_RANGE : IfxPsi5s_cfg.h
  • IFXPSI5S_GCR_CHANNEL_TRIGGER_COUNTERS_ENABLE_MASK : IfxPsi5s_cfg.h
  • IFXPSI5S_GCR_CHANNELS_ENABLE_MASK : IfxPsi5s_cfg.h
  • IFXPSI5S_NUM_CHANNELS : IfxPsi5s_cfg.h
  • IFXPSI5S_NUM_MODULES : IfxPsi5s_cfg.h
  • IFXPSI5S_NUM_SLOTS : IfxPsi5s_cfg.h
  • IFXPSI5S_NUM_WDTS : IfxPsi5s_cfg.h
  • IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS : IfxPsi5s_PinMap.h
  • IFXPSI5S_PINMAP_NUM_MODULES : IfxPsi5s_PinMap.h
  • IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS : IfxPsi5s_PinMap.h
  • IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS : IfxPsi5s_PinMap.h
  • IFXPSI5S_STEP_RANGE : IfxPsi5s_cfg.h
  • IFXQSPI_BACONSIZE : IfxQspi.h
  • IFXQSPI_ERRORENABLEMASK : IfxQspi.h
  • IFXQSPI_FIFO32BITSIZE : IfxQspi.h
  • IFXQSPI_GETLONGMODEFIFOSIZE : IfxQspi.h
  • IFXQSPI_HWFIFO_DEPTH : IfxQspi_cfg.h
  • IFXQSPI_NUM_CHANNELS : IfxQspi_cfg.h
  • IFXQSPI_NUM_MODULES : IfxQspi_cfg.h
  • IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS : IfxQspi_PinMap.h
  • IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS : IfxQspi_PinMap.h
  • IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS : IfxQspi_PinMap.h
  • IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS : IfxQspi_PinMap.h
  • IFXQSPI_PINMAP_NUM_MODULES : IfxQspi_PinMap.h
  • IFXQSPI_PINMAP_NUM_SLAVESELECTS : IfxQspi_PinMap.h
  • IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS : IfxQspi_PinMap.h
  • IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS : IfxQspi_PinMap.h
  • IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS : IfxQspi_PinMap.h
  • IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS : IfxQspi_PinMap.h
  • IFXSCU_CFG_ASCLINFDIV_160MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ASCLINFDIV_320MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ASCLINSDIV_160MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ASCLINSDIV_320MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BBBDIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BBBDIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BBBDIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BBBDIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BBBDIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON0 : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON0_BASIC : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON0_BASIC_ : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON0_MASK : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON1 : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON1_BASIC : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON1_BASIC_ : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON1_MASK : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON2 : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON2_BASIC : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON2_BASIC_ : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON2_MASK : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON5 : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON5_BASIC : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON5_BASIC_ : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON5_MASK : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON6 : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON6_BASIC : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON6_BASIC_ : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON6_MASK : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON7 : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON7_BASIC : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON7_BASIC_ : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON7_MASK : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON8 : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON8_BASIC : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON8_BASIC_ : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON8_MASK : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON9 : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON9_BASIC : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON9_BASIC_ : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON9_MASK : IfxScu_cfg.h
  • IFXSCU_CFG_CLK_DISTRIBUTION : IfxScu_cfg.h
  • IFXSCU_CFG_CLKSELASCLINS_160MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CLKSELASCLINS_320MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CLKSELMCAN_160MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CLKSELMCAN_320MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CLKSELMSC_160MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CLKSELMSC_320MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CLKSELQSPI_160MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CLKSELQSPI_320MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU0DIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU0DIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU0DIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU0DIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU0DIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU1DIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU1DIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU1DIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU1DIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU1DIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU2DIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU2DIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU2DIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU2DIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU2DIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU3DIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU3DIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU3DIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU3DIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU3DIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_WAITSTATE : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_WAITSTATE_MSK : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_WAITSTATE_VAL : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC_ : IfxScu_cfg.h
  • IFXSCU_CFG_FSI2DIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FSI2DIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FSI2DIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FSI2DIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FSI2DIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FSIDIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FSIDIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FSIDIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FSIDIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FSIDIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_GETHDIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_GETHDIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_GETHDIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_GETHDIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_GETHDIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_GTMDIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_GTMDIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_GTMDIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_GTMDIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_GTMDIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_I2CDIV_160MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_I2CDIV_320MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_MCANDIV_160MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_MCANDIV_320MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_MCANHDIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_MCANHDIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_MCANHDIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_MCANHDIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_MCANHDIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_MSCDIV_160MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_MSCDIV_320MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PER_PLL_16MHZ_160MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PER_PLL_16MHZ_320MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PER_PLL_20MHZ_160MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PER_PLL_20MHZ_320MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PER_PLL_25MHZ_160MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PER_PLL_40MHZ_160MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PER_PLL_40MHZ_320MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PER_PLL_INITIAL_STEP : IfxScu_cfg.h
  • IFXSCU_CFG_PER_PLL_INITIAL_STEP_BASIC : IfxScu_cfg.h
  • IFXSCU_CFG_PER_PLL_INITIAL_STEP_BASIC_ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL1_FREQ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL1DIVDIS_160MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL1DIVDIS_320MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL2_FREQ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_FREQ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_16MHZ_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_16MHZ_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_16MHZ_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_16MHZ_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_20MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_20MHZ_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_20MHZ_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_25MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_25MHZ_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_40MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_40MHZ_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_40MHZ_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_BASIC : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_BASIC_ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_FDCO_600MHZ_TO_TARGET_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_FDCO_600MHZ_TO_TARGET_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_FDCO_640MHZ_TO_TARGET_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_FDCO_720MHZ_TO_TARGET_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_FDCO_800MHZ_TO_TARGET_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_QSPIDIV_160MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_QSPIDIV_320MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SPBDIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SPBDIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SPBDIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SPBDIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SPBDIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SRIDIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SRIDIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SRIDIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SRIDIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SRIDIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_STMDIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_STMDIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_STMDIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_STMDIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_STMDIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SYS_PLL_16MHZ_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SYS_PLL_16MHZ_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SYS_PLL_16MHZ_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SYS_PLL_16MHZ_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SYS_PLL_20MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SYS_PLL_20MHZ_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SYS_PLL_20MHZ_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SYS_PLL_25MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SYS_PLL_25MHZ_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SYS_PLL_40MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SYS_PLL_40MHZ_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SYS_PLL_40MHZ_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SYS_PLL_INITIAL_STEP : IfxScu_cfg.h
  • IFXSCU_CFG_SYS_PLL_INITIAL_STEP_BASIC : IfxScu_cfg.h
  • IFXSCU_CFG_SYS_PLL_INITIAL_STEP_BASIC_ : IfxScu_cfg.h
  • IFXSCU_CFG_WAIT_INITIAL_STEP : IfxScu_cfg.h
  • IFXSCU_CFG_WAIT_INITIAL_STEP_16MHZ_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_WAIT_INITIAL_STEP_16MHZ_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_WAIT_INITIAL_STEP_16MHZ_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_WAIT_INITIAL_STEP_16MHZ_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_WAIT_INITIAL_STEP_20MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_WAIT_INITIAL_STEP_20MHZ_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_WAIT_INITIAL_STEP_20MHZ_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_WAIT_INITIAL_STEP_25MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_WAIT_INITIAL_STEP_25MHZ_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_WAIT_INITIAL_STEP_40MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_WAIT_INITIAL_STEP_40MHZ_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_WAIT_INITIAL_STEP_40MHZ_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_WAIT_INITIAL_STEP_BASIC : IfxScu_cfg.h
  • IFXSCU_CFG_WAIT_INITIAL_STEP_BASIC_ : IfxScu_cfg.h
  • IFXSCU_CFG_XTAL_FREQ : IfxScu_cfg.h
  • IFXSCU_EVR_OSC_FREQUENCY : IfxScu_cfg.h
  • IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS : IfxScu_PinMap.h
  • IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS : IfxScu_PinMap.h
  • IFXSCU_PINMAP_NUM_MODULES : IfxScu_PinMap.h
  • IFXSCU_PINMAP_NUM_REQUESTS : IfxScu_PinMap.h
  • IFXSCU_PINMAP_REQ_IN_NUM_ITEMS : IfxScu_PinMap.h
  • IFXSCU_PLL_FREERUNNING_FREQUENCY : IfxScu_cfg.h
  • IFXSCU_VCO_BASE_FREQUENCY : IfxScu_cfg.h
  • IFXSCUCCU_CCUCON_LCK_BIT_TIMEOUT_COUNT : IfxScuCcu.h
  • IFXSCUCCU_FLASHWAITSTATECHECK : IfxScuCcu.h
  • IFXSCUCCU_GET_MODCFG : IfxScuCcu.h
  • IFXSCUCCU_GET_RGAIN_HEX : IfxScuCcu.h
  • IFXSCUCCU_GET_RGAIN_NOM : IfxScuCcu.h
  • IFXSCUCCU_LOOP_TIMEOUT_CHECK : IfxScuCcu.h
  • IFXSCUCCU_LPTONORMAL_WAITTIME : IfxScuCcu.h
  • IFXSCUCCU_MODCFG_DEFAULT_SHIFT : IfxScuCcu.h
  • IFXSCUCCU_MODCFG_DEFAULT_VAL : IfxScuCcu.h
  • IFXSCUCCU_MODULATION_FREQ_HZ : IfxScuCcu.h
  • IFXSCUCCU_OSC_STABLECHK_TIME : IfxScuCcu.h
  • IFXSCUCCU_OSCCON_PLLLV_OR_HV_TIMEOUT_COUNT : IfxScuCcu.h
  • IFXSCUCCU_PLL_KRDY_TIMEOUT_COUNT : IfxScuCcu.h
  • IFXSCUCCU_PLL_LOCK_TIMEOUT_COUNT : IfxScuCcu.h
  • IFXSCUCCU_SMUALARM_MASK : IfxScuCcu.h
  • IFXSCUCCU_SYSPLLSTAT_PWDSTAT_TIMEOUT_COUNT : IfxScuCcu.h
  • IFXSCUERU_CHANNEL_NUMBER_ODD : IfxScuEru.c
  • IFXSCUERU_TO_REGISTER_BASE : IfxScuEru.c
  • IFXSCULBIST_CFG_PATTERN_A : IfxScu_cfg.h
  • IFXSCULBIST_CFG_PATTERN_B : IfxScu_cfg.h
  • IFXSCULBIST_CFG_SCANCHAINLENGTH : IfxScu_cfg.h
  • IFXSCULBIST_CFG_SEED : IfxScu_cfg.h
  • IFXSCULBIST_CFG_SIGNATURE_A : IfxScu_cfg.h
  • IFXSCULBIST_CFG_SIGNATURE_B : IfxScu_cfg.h
  • IFXSCURCU_APPLICATIONRESET_MASK : IfxScuRcu.h
  • IFXSCURCU_PERFORM_RESET_DELAY : IfxScuRcu.c
  • IFXSCURCU_POWERONRESET_MASK : IfxScuRcu.h
  • IFXSCUWDT_CALCULATELFSR : IfxScuWdt.asm.h
  • IFXSCUWDT_ENDINIT_WAIT_TIMEOUTCOUNT : IfxScuWdt.h
  • IFXSCUWDT_RESET_PASSWORD : IfxScuWdt.c
  • IFXSENT_CFG_CHANNEL_INTEN : IfxSent_cfg.h
  • IFXSENT_CFG_STEP_RANGE : IfxSent_cfg.h
  • IFXSENT_CFG_TIMEOUT_VALUE : IfxSent_cfg.h
  • IFXSENT_INTERRUPT_STATUS_ERROR_FLAGS : IfxSent.h
  • IFXSENT_NUM_CHANNELS : IfxSent_cfg.h
  • IFXSENT_NUM_MODULES : IfxSent_cfg.h
  • IFXSENT_PINMAP_NUM_CHANNELS : IfxSent_PinMap.h
  • IFXSENT_PINMAP_NUM_MODULES : IfxSent_PinMap.h
  • IFXSENT_PINMAP_SENT_IN_NUM_ITEMS : IfxSent_PinMap.h
  • IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS : IfxSent_PinMap.h
  • IFXSMU_NUM_ALARM_GROUPS : IfxSmu_cfg.h
  • IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS : IfxSmu_PinMap.h
  • IFXSMU_PINMAP_NUM_MODULES : IfxSmu_PinMap.h
  • IFXSMU_START_ALIVE_TEST_ARG : IfxSmu.h
  • IFXSMU_STOP_ALIVE_TEST_ARG : IfxSmu.h
  • IFXSTM_DEFAULT_TIMER : IfxStm.h
  • IFXSTM_NUM_COMPARATORS : IfxStm_cfg.h
  • IFXSTM_NUM_MODULES : IfxStm_cfg.h
  • ISSPACE : Ifx_Shell.c


iLLD_TC38A: Globals

- l -

  • laccum : Ifx_TypesTasking.h
  • LOW_BYTE_FIRST : Platform_Types.h
  • LSB_FIRST : Platform_Types.h


iLLD_TC38A: Globals

- m -

  • MSB_FIRST : Platform_Types.h


iLLD_TC38A: Globals

- n -

  • NOP : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGnuc.h
  • NULL_PTR : Compilers.h


iLLD_TC38A: Globals

- p -

  • PICBASE : Ifx_Ssw_CompilersGhs.h
  • PIDBASE : Ifx_Ssw_CompilersGhs.h
  • PIN_DRIVER_STRONG_SHARP : Bsp.h
  • Pin_enableEmgStop : Bsp.h
  • Pin_getGroupState : Bsp.h
  • Pin_getState : Bsp.h
  • Pin_setDriver : Bsp.h
  • Pin_setGroupModeInput : Bsp.h
  • Pin_setGroupModeOutput : Bsp.h
  • Pin_setGroupState : Bsp.h
  • Pin_setMode : Bsp.h
  • Pin_setState : Bsp.h
  • Pin_setStateHigh : Bsp.h
  • Pin_setStateLow : Bsp.h
  • PIRBASE : Ifx_Ssw_CompilersGhs.h
  • PLATFORM_AR_RELEASE_MAJOR_VERSION : Platform_Types.h
  • PLATFORM_AR_RELEASE_MINOR_VERSION : Platform_Types.h
  • PLATFORM_AR_RELEASE_REVISION_VERSION : Platform_Types.h
  • PLATFORM_SW_MAJOR_VERSION : Platform_Types.h
  • PLATFORM_SW_MINOR_VERSION : Platform_Types.h
  • PLATFORM_SW_PATCH_VERSION : Platform_Types.h
  • PLATFORM_VENDOR_ID : Platform_Types.h


iLLD_TC38A: Globals

- s -

  • sfract : Ifx_TypesTasking.h
  • SHELL_HELP_DESCRIPTION_TEXT : Ifx_Shell.h
  • size_t : Ifx_Ssw_CompilersGhs.h
  • STDIF_DPIPE_MAX_PRINT_SIZE : IfxStdIf_DPipe.h
  • STRINGIFY : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h


iLLD_TC38A: Globals

- t -

  • TIME_INFINITE : Ifx_Types.h
  • TIME_NULL : Ifx_Types.h
  • TimeConst_0s : Bsp.h
  • TimeConst_100ms : Bsp.h
  • TimeConst_100ns : Bsp.h
  • TimeConst_100s : Bsp.h
  • TimeConst_100us : Bsp.h
  • TimeConst_10ms : Bsp.h
  • TimeConst_10ns : Bsp.h
  • TimeConst_10s : Bsp.h
  • TimeConst_10us : Bsp.h
  • TimeConst_1ms : Bsp.h
  • TimeConst_1s : Bsp.h
  • TimeConst_1us : Bsp.h
  • TIMER_COUNT : Bsp.h
  • TIMER_INDEX_100MS : Bsp.h
  • TIMER_INDEX_100NS : Bsp.h
  • TIMER_INDEX_100S : Bsp.h
  • TIMER_INDEX_100US : Bsp.h
  • TIMER_INDEX_10MS : Bsp.h
  • TIMER_INDEX_10NS : Bsp.h
  • TIMER_INDEX_10S : Bsp.h
  • TIMER_INDEX_10US : Bsp.h
  • TIMER_INDEX_1MS : Bsp.h
  • TIMER_INDEX_1S : Bsp.h
  • TIMER_INDEX_1US : Bsp.h
  • TRUE : Platform_Types.h


iLLD_TC38A: Assert.c Source File

  • Service
  • CpuGeneric
  • SysSe
  • Bsp
Assert.c
Go to the documentation of this file.
1 /**
2 * \file Assert.c
3 * \brief Assert functions.
4 *
5 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
6 *
7 * $Date: 2014-02-27 20:08:29 GMT$
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 #include "Assert.h"
43
44 #if IFX_CFG_ASSERT_STDIO == 1
45 /** Current standard IO used for the IFX_ASSERT and IFX_VALIDATE */
46 IfxStdIf_DPipe *Assert_io = NULL_PTR;
47 #endif
48
49 #if IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT > IFX_VERBOSE_LEVEL_OFF
50 uint32 Assert_verboseLevel = IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT;
51 #endif
52
53 #if IFX_CFG_ASSERT_STDIO == 1
54 void Ifx_Assert_setStandardIo(IfxStdIf_DPipe *standardIo)
55 {
56 Assert_io = standardIo;
57 }
58
59
60 #endif
61
62 /** \internal
63 * Text used to display the king of assertion
64 */
65 const pchar Assert_level[6] = {
66 "OFF",
67 "FAILURE",
68 "ERROR",
69 "WARNING",
70 "INFO",
71 "DEBUG"
72 };
73
74 void Ifx_Assert_doLevel(uint8 level, pchar __assertion, pchar __file, unsigned int __line, pchar __function)
75 {
76 #if IFX_CFG_ASSERT_USE_BREAKPOINT == 1
77
78 if (level <= IFX_VERBOSE_LEVEL_ERROR)
79 {
80 __debug();
81 }
82
83 #endif
84
85 #if IFX_CFG_ASSERT_STDIO == 1
86
87 if (Assert_io != NULL_PTR)
88 {
89 IfxStdIf_DPipe_print(Assert_io, "ASSERTION %s '%s' in %s:%u (function '%s()')" ENDL, Assert_level[level],
90 __assertion, __file, __line, __function);
91 }
92
93 #endif
94 }
95
96
97 boolean Ifx_Assert_doValidate(boolean expr, uint8 level, pchar __assertion, pchar __file, unsigned int __line, pchar __function)
98 {
99 if (!((expr) || (level > Assert_verboseLevel)))
100 {
101 #if IFX_CFG_ASSERT_USE_BREAKPOINT == 1
102
103 if (level <= IFX_VERBOSE_LEVEL_ERROR)
104 {
105 __debug();
106 }
107
108 #endif
109
110 #if IFX_CFG_ASSERT_STDIO == 1
111
112 if (Assert_io != NULL_PTR)
113 {
114 IfxStdIf_DPipe_print(Assert_io, "VALIDATION %s '%s' in %s:%u (function '%s()')" ENDL, Assert_level[level],
115 __assertion, __file, __line, __function);
116 }
117
118 #endif
119 }
120 else
121 {}
122
123 return expr;
124 }
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxStdIf_DPipe_
Standard interface object.
Definition: IfxStdIf_DPipe.h:230
uint32
unsigned long uint32
Definition: Platform_Types.h:116
ENDL
#define ENDL
Definition: IfxStdIf_DPipe.h:64
Assert.h
Assert functions.
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxStdIf_DPipe_print
void IfxStdIf_DPipe_print(IfxStdIf_DPipe *stdIf, pchar format,...)
Definition: IfxStdIf_DPipe.c:50
IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT
#define IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT
defines the assertion default level
Definition: Assert.h:89
__debug
void __debug(void) __attribute__((intrinsic_function(0x103
Assert_level
const pchar Assert_level[6]
Definition: Assert.c:65
Ifx_Assert_doValidate
boolean Ifx_Assert_doValidate(boolean expr, uint8 level, pchar __assertion, pchar __file, unsigned int __line, pchar __function)
Definition: Assert.c:97
Ifx_Assert_doLevel
void Ifx_Assert_doLevel(uint8 level, pchar __assertion, pchar __file, unsigned int __line, pchar __function)
Definition: Assert.c:74
pchar
const char * pchar
const char pointer
Definition: Ifx_Types.h:53
uint8
unsigned char uint8
Definition: Platform_Types.h:108
Ifx_Assert_setStandardIo
#define Ifx_Assert_setStandardIo(standardIo)
Set the standard output used for IFX_ASSERT and IFX_VALIDATE.
Definition: Assert.h:105


iLLD_TC38A: Assert.h Source File

  • Service
  • CpuGeneric
  • SysSe
  • Bsp
Assert.h
Go to the documentation of this file.
1 /**
2 * \file Assert.h
3 * \brief Assert functions.
4 * \ingroup library_srvsw_sysse_bsp_assert
5 *
6 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7 *
8 * $Date: 2014-02-28 14:15:34 GMT$
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup library_srvsw_sysse_bsp_assert Assertion
42 * This module implements assertion functions.
43 * \ingroup library_srvsw_sysse_bsp
44 */
45
46 #ifndef ASSERT_H
47 #define ASSERT_H 1
48
49 #include "_Utilities/Ifx_Assert.h"
50
51 /** \addtogroup library_srvsw_sysse_bsp_assert
52 * Global configuration settings (Ifx_Cfg.h) :
53 * - IFX_CFG_ASSERT_STDIO: if IFX_CFG_ASSERT_STDIO=1, the assertion is output to the io
54 * defined by \ref Ifx_Assert_setStandardIo (). if IFX_CFG_ASSERT_STDIO=0, no text
55 * output is done.
56 * Default is IFX_CFG_ASSERT_STDIO=0
57 * - IFX_CFG_ASSERT_USE_BREAKPOINT: if IFX_CFG_ASSERT_USE_BREAKPOINT=1, a debug instruction is
58 * inserted in case an assertion occurs with a level of
59 * \ref IFX_VERBOSE_LEVEL_FAILURE or \ref IFX_VERBOSE_LEVEL_ERROR. If IFX_CFG_ASSERT_USE_BREAKPOINT=0 then
60 * no debug instruction is inserted.
61 * Default is IFX_CFG_ASSERT_USE_BREAKPOINT=0.
62 * - IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT: Set the assertion limit,
63 * assertion with a level below or equal to the limit are taken in
64 * account, other are ignored. range=[\ref IFX_VERBOSE_LEVEL_OFF, \ref IFX_VERBOSE_LEVEL_FAILURE,
65 * \ref IFX_VERBOSE_LEVEL_ERROR, \ref IFX_VERBOSE_LEVEL_WARNING, \ref IFX_VERBOSE_LEVEL_INFO,
66 * \ref IFX_VERBOSE_LEVEL_DEBUG]
67 * Default is IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT=\ref IFX_VERBOSE_LEVEL_INFO.
68 *
69 * Do not include this file but use # include "_Utilities/Ifx_Assert.h" instead
70 * \{ */
71
72 #ifndef IFX_CFG_ASSERT_STDIO
73 # define IFX_CFG_ASSERT_STDIO (0) /**< \brief If set to 1, the assert message is send to the Assert_io interface */
74 #endif
75
76 #if IFX_CFG_ASSERT_STDIO == 1
77 # include "StdIf/IfxStdIf_DPipe.h"
78 #endif
79
80 #ifndef IFX_CFG_ASSERT_USE_BREAKPOINT
81 # define IFX_CFG_ASSERT_USE_BREAKPOINT (0) /**< \brief If set to 1, the assert function will break the execution (breakpoint) */
82 #endif
83
84 #ifndef IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT
85 /** \brief defines the assertion default level
86 *
87 * If not defined, the default assert level is set to IFX_VERBOSE_LEVEL_INFO
88 * */
89 #define IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT (IFX_VERBOSE_LEVEL_INFO)
90 #endif
91
92 /** \brief Set the standard output used for \ref IFX_ASSERT and \ref IFX_VALIDATE
93 *
94 * For example the standard IO could redirect the output to a serial interface, CAN interface, ...
95 *
96 * \param standardIo Specifies the standard output used
97 *
98 * Enable only if (IFX_CFG_ASSERT_STDIO!=0)
99 *
100 * \return None.
101 */
102 #if IFX_CFG_ASSERT_STDIO == 1
103 IFX_EXTERN void Ifx_Assert_setStandardIo(IfxStdIf_DPipe *standardIo);
104 #else
105 #define Ifx_Assert_setStandardIo(standardIo) ((void)0)
106 #endif
107
108 /** \internal
109 * \brief Execute the assertion and display the assertion message
110 *
111 * Do not call this function directly, use IFX_ASSERT() instead
112 *
113 * \param level assertion level
114 * \param __assertion test as string, is displayed with the assertion message
115 * \param __file file in which the assertion occurred
116 * \param __line line number where the assertion occurred
117 * \param __function name of the function in which the assertion occurred
118 * \return void
119 */
120 IFX_EXTERN void Ifx_Assert_doLevel(uint8 level, pchar __assertion, pchar __file, unsigned int __line, pchar __function);
121
122 /** \internal
123 * \brief Execute the assertion and display the assertion message.
124 *
125 * Do not call this function directly, use IFX_VALIDATE() instead
126 *
127 * \param expr expression value, assertion occurs if FALSE
128 * \param level assertion level
129 * \param __assertion test as string, is displayed with the assertion message
130 * \param __file file in which the assertion occurred
131 * \param __line line number where the assertion occurred
132 * \param __function name of the function in which the assertion occurred
133 * \return expr
134 */
135 IFX_EXTERN boolean Ifx_Assert_doValidate(boolean expr, uint8 level, pchar __assertion, pchar __file, unsigned int __line, pchar __function);
136
137 #if IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT > IFX_VERBOSE_LEVEL_OFF
138 IFX_EXTERN uint32 Assert_verboseLevel; /**< \bri-ef Current verbose level, this value is initialised to IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT */
139
140 #else
141
142 # undef IFX_CFG_ASSERT_STDIO
143 # define IFX_CFG_ASSERT_STDIO (0)
144
145 #endif
146
147 #undef IFX_ASSERT
148 #undef IFX_VALIDATE
149
150 /** \brief Assertion function (assert)
151 *
152 * If expr is FALSE, then an assertion message is displayed. The message
153 * indicates the assertion level, the file, line and function where the
154 * assertion occurred, and also display expr as text. In case the debug break
155 * point is enabled then a debug instruction will also be inserted so that the debugger stops
156 *
157 * If expr is true, nothing is additional done.
158 *
159 * The expr expression is ignored (code disabled) in case the assertion level set by IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT is \ref IFX_VERBOSE_LEVEL_OFF.
160 *
161 * The output needs to the be set with the function Ifx_Assert_setStandardIo() in order for the message to be displayed.
162 *
163 * \param level level of the assertion, range=[\ref IFX_VERBOSE_LEVEL_OFF, \ref IFX_VERBOSE_LEVEL_FAILURE,
164 * \ref IFX_VERBOSE_LEVEL_ERROR, \ref IFX_VERBOSE_LEVEL_WARNING, \ref IFX_VERBOSE_LEVEL_INFO,
165 * \ref IFX_VERBOSE_LEVEL_DEBUG]
166 * \param expr expression to be tested. If FALSE the assertion is executed else nothing is done
167 *
168 * \return void
169 */
170 #if IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT > IFX_VERBOSE_LEVEL_OFF
171 # define IFX_ASSERT(level, expr) (((expr) || (level > Assert_verboseLevel)) ? ((void)0) : Ifx_Assert_doLevel(level,#expr, __FILE__, __LINE__, __func__))
172 #else
173 # define IFX_ASSERT(level, expr) ((void)0)
174 #endif
175
176 /** \brief Assertion function (validate)
177 *
178 * If expr is FALSE, then an assertion message is displayed. The message
179 * indicates the assertion level, the file, line and function where the
180 * assertion occurred, and also display expr as text. In case the debug
181 * break point is enabled then a debug instruction will also be inserted so
182 * that the debugger stops.
183 *
184 * \ref IFX_VALIDATE differs from \ref IFX_ASSERT in the way that the expr expression is
185 * evaluated whatever the assertion level set by IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT.
186 *
187 * The output needs to the be set with the function Ifx_Assert_setStandardIo() in order for the message to be displayed.
188 *
189 * \param level level of the assertion, range=[\ref IFX_VERBOSE_LEVEL_OFF, \ref IFX_VERBOSE_LEVEL_FAILURE,
190 * \ref IFX_VERBOSE_LEVEL_ERROR, \ref IFX_VERBOSE_LEVEL_WARNING, \ref IFX_VERBOSE_LEVEL_INFO,
191 * \ref IFX_VERBOSE_LEVEL_DEBUG]
192 * \param expr expression to be tested. If FALSE the assertion is executed else nothing is done
193 *
194 * \return void
195 */
196 #if IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT > IFX_VERBOSE_LEVEL_OFF
197 # define IFX_VALIDATE(level, expr) (Ifx_Assert_doValidate(expr, level,#expr, __FILE__, __LINE__, __func__))
198 #else
199 # define IFX_VALIDATE(level, expr) (expr)
200 #endif
201
202 /** \} */
203
204 //#include "_Utilities/Ifx_Assert.h" /* Needs to be at the end of the file */
205
206 #endif
IfxStdIf_DPipe_
Standard interface object.
Definition: IfxStdIf_DPipe.h:230
uint32
unsigned long uint32
Definition: Platform_Types.h:116
Ifx_Assert.h
Assert functions.
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxStdIf_DPipe.h
Standard interface: Data Pipe.
Ifx_Assert_doValidate
IFX_EXTERN boolean Ifx_Assert_doValidate(boolean expr, uint8 level, pchar __assertion, pchar __file, unsigned int __line, pchar __function)
Definition: Assert.c:97
Ifx_Assert_doLevel
IFX_EXTERN void Ifx_Assert_doLevel(uint8 level, pchar __assertion, pchar __file, unsigned int __line, pchar __function)
Definition: Assert.c:74
pchar
const char * pchar
const char pointer
Definition: Ifx_Types.h:53
uint8
unsigned char uint8
Definition: Platform_Types.h:108
Ifx_Assert_setStandardIo
#define Ifx_Assert_setStandardIo(standardIo)
Set the standard output used for IFX_ASSERT and IFX_VALIDATE.
Definition: Assert.h:105


iLLD_TC38A: Bsp.c Source File

  • Service
  • CpuGeneric
  • SysSe
  • Bsp
Bsp.c
Go to the documentation of this file.
1 /**
2 * \file Bsp.c
3 * \brief Board support package
4 * \ingroup library_srvsw_sysse_bsp_bsp
5 *
6 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7 *
8 * $Date: 2014-02-28 14:15:34 GMT$
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "Bsp.h"
44
45
46 /** \brief Wait function.
47 *
48 * This is an empty function that just spend some time waiting.
49 *
50 * \return None.
51 */
52 void waitPoll(void)
53 {}
54
55 /** \brief Wait time function.
56 *
57 * This is an empty function that that returns after the timeout elapsed. The
58 * minimal time spend in the function is guaranteed, but not the max time.
59 *
60 * \param timeout Specifies the time the function waits for before returning
61 *
62 * \return None.
63 */
64 void waitTime(Ifx_TickTime timeout)
65 {
66 wait(timeout);
67 }
Ifx_TickTime
sint64 Ifx_TickTime
Time in ticks.
Definition: Ifx_Types.h:76
waitTime
void waitTime(Ifx_TickTime timeout)
Wait time function.
Definition: Bsp.c:64
Bsp.h
Board support package.
wait
IFX_INLINE void wait(Ifx_TickTime timeout)
Wait for a while.
Definition: Bsp.h:416
waitPoll
void waitPoll(void)
Wait function.
Definition: Bsp.c:52


iLLD_TC38A: Bsp.h Source File

  • Service
  • CpuGeneric
  • SysSe
  • Bsp
Bsp.h
Go to the documentation of this file.
1 /**
2 * \file Bsp.h
3 * \brief Board support package
4 * \ingroup library_srvsw_sysse_bsp_bsp
5 *
6 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7 *
8 * $Date: 2014-02-28 14:15:35 GMT$
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup library_srvsw_sysse_bsp_bsp Board support package
42 * This module implements the board support package
43 * \ingroup library_srvsw_sysse_bsp
44 *
45 */
46
47 #ifndef BSP_H
48 #define BSP_H 1
49
50 #include "Ifx_Cfg.h" /* Do not remove this include */
51 #include "Cpu/Std/IfxCpu_Intrinsics.h" /* Do not remove this include */
52 #include "_Utilities/Ifx_Assert.h" /* Do not remove this include */
53
54 #include "Cpu/Std/IfxCpu.h"
55 #include "Port/Std/IfxPort.h"
56 #include "Src/Std/IfxSrc.h"
57 #include "Stm/Std/IfxStm.h"
58 #include "Scu/Std/IfxScuCcu.h"
59
60 #ifndef BSP_DEFAULT_TIMER
61 /** Defined the default timer used */
62 #define BSP_DEFAULT_TIMER (&MODULE_STM0)
63 #endif
64
65 /******************************************************************************/
66 /* Function prototypes */
67 /******************************************************************************/
68
69 /** \addtogroup library_srvsw_sysse_bsp_bsp
70 * \{ */
71 /** \name Interrupt APIs
72 * \{ */
73 IFX_INLINE boolean areInterruptsEnabled(void);
74 IFX_INLINE boolean disableInterrupts(void);
75 IFX_INLINE void enableInterrupts(void);
76 IFX_INLINE void restoreInterrupts(boolean enabled);
77 IFX_INLINE void forceDisableInterrupts(void);
78 /** \} */
79 /** \} */
80
81 /******************************************************************************/
82 /* Functions */
83 /******************************************************************************/
84
85 /** \brief Return the status of the global interrupts
86 *
87 * \retval TRUE if the global interrupts are enabled.
88 * \retval FALSE if the global interrupts are disabled.
89 *
90 * \see restoreInterrupts(), disableInterrupts()
91 */
92 IFX_INLINE boolean areInterruptsEnabled(void)
93 {
94 return IfxCpu_areInterruptsEnabled();
95 }
96
97
98 /** \brief Disable the global interrupts
99 *
100 * \retval TRUE if the global interrupts were enabled before the call to the function.
101 * \retval FALSE if the global interrupts are disabled before the call to the function.
102 *
103 * \see areInterruptsEnabled(), restoreInterrupts()
104 */
105 IFX_INLINE boolean disableInterrupts(void)
106 {
107 return IfxCpu_disableInterrupts();
108 }
109
110
111 /** \brief Disable the global interrupts forcefully
112 *
113 *
114 * \see areInterruptsEnabled(), restoreInterrupts()
115 */
116 IFX_INLINE void forceDisableInterrupts(void)
117 {
118 IfxCpu_forceDisableInterrupts();
119 }
120
121
122 /** \brief enable the global interrupts
123 *
124 */
125 IFX_INLINE void enableInterrupts(void)
126 {
127 IfxCpu_enableInterrupts();
128 }
129
130
131 /** \brief Restore the state of the global interrupts.
132 *
133 * \param enabled if TRUE, re-enable the global interrupts, else do nothing.
134 *
135 * \return None.
136 *
137 * \see areInterruptsEnabled(), disableInterrupts()
138 */
139 IFX_INLINE void restoreInterrupts(boolean enabled)
140 {
141 IfxCpu_restoreInterrupts(enabled);
142 }
143
144
145 /******************************************************************************/
146 /* Macros */
147 /******************************************************************************/
148 #define TIMER_COUNT (11) /**< \internal \brief number of timer values defined */
149 #define TIMER_INDEX_10NS (0) /**< \internal \brief Index of the time value 10ns*/
150 #define TIMER_INDEX_100NS (1) /**< \internal \brief Index of the time value 100ns*/
151 #define TIMER_INDEX_1US (2) /**< \internal \brief Index of the time value 1us*/
152 #define TIMER_INDEX_10US (3) /**< \internal \brief Index of the time value 10us*/
153 #define TIMER_INDEX_100US (4) /**< \internal \brief Index of the time value 100us*/
154 #define TIMER_INDEX_1MS (5) /**< \internal \brief Index of the time value 1ms*/
155 #define TIMER_INDEX_10MS (6) /**< \internal \brief Index of the time value 10ms*/
156 #define TIMER_INDEX_100MS (7) /**< \internal \brief Index of the time value 100ms*/
157 #define TIMER_INDEX_1S (8) /**< \internal \brief Index of the time value 1s*/
158 #define TIMER_INDEX_10S (9) /**< \internal \brief Index of the time value 10s*/
159 #define TIMER_INDEX_100S (10) /**< \internal \brief Index of the time value 100s*/
160
161 /** \internal
162 * Array containing the time constants. This variable should not be used in the application. TimeConst_0s, TimeConst_10ns, ... should be used instead
163 *
164 */
165 IFX_EXTERN Ifx_TickTime TimeConst[TIMER_COUNT];
166
167 /******************************************************************************/
168 /* Function prototypes */
169 /******************************************************************************/
170 /** \addtogroup library_srvsw_sysse_bsp_bsp
171 * \{ */
172 /** \name Time APIs
173 * \{ */
174 IFX_INLINE Ifx_TickTime addTTime(Ifx_TickTime a, Ifx_TickTime b);
175 IFX_INLINE Ifx_TickTime elapsed(Ifx_TickTime since);
176 IFX_INLINE Ifx_TickTime getDeadLine(Ifx_TickTime timeout);
177 IFX_INLINE Ifx_TickTime getTimeout(Ifx_TickTime deadline);
178 IFX_EXTERN void initTime(void);
179 IFX_INLINE boolean isDeadLine(Ifx_TickTime deadLine);
180 IFX_INLINE Ifx_TickTime now(void);
181 IFX_INLINE Ifx_TickTime nowWithoutCriticalSection(void);
182 IFX_INLINE boolean poll(volatile boolean *test, Ifx_TickTime timeout);
183 IFX_INLINE Ifx_TickTime timingNoInterruptEnd(Ifx_TickTime since, boolean interruptEnabled);
184 IFX_INLINE Ifx_TickTime timingNoInterruptStart(boolean *interruptEnabled);
185 IFX_INLINE void wait(Ifx_TickTime timeout);
186 IFX_EXTERN void waitPoll(void);
187 IFX_EXTERN void waitTime(Ifx_TickTime timeout);
188
189 /** Prototype for wait() functions */
190 typedef void (*WaitTimeFunction)(Ifx_TickTime timeout);
191
192 #define TimeConst_0s ((Ifx_TickTime)0) /**< \brief time constant equal to 1s */
193 #define TimeConst_10ns (TimeConst[TIMER_INDEX_10NS]) /**< \brief time constant equal to 10ns */
194 #define TimeConst_100ns (TimeConst[TIMER_INDEX_100NS]) /**< \brief time constant equal to 100ns */
195 #define TimeConst_1us (TimeConst[TIMER_INDEX_1US]) /**< \brief time constant equal to 1us */
196 #define TimeConst_10us (TimeConst[TIMER_INDEX_10US]) /**< \brief time constant equal to 10us */
197 #define TimeConst_100us (TimeConst[TIMER_INDEX_100US]) /**< \brief time constant equal to 100us */
198 #define TimeConst_1ms (TimeConst[TIMER_INDEX_1MS]) /**< \brief time constant equal to 1ms */
199 #define TimeConst_10ms (TimeConst[TIMER_INDEX_10MS]) /**< \brief time constant equal to 10ms */
200 #define TimeConst_100ms (TimeConst[TIMER_INDEX_100MS]) /**< \brief time constant equal to 100ms */
201 #define TimeConst_1s (TimeConst[TIMER_INDEX_1S]) /**< \brief time constant equal to 1s */
202 #define TimeConst_10s (TimeConst[TIMER_INDEX_10S]) /**< \brief time constant equal to 10s */
203 #define TimeConst_100s (TimeConst[TIMER_INDEX_100S]) /**< \brief time constant equal to 100s */
204
205 /**\}*/
206 /**\}*/
207 /******************************************************************************/
208 /* Functions */
209 /******************************************************************************/
210
211 /** \brief Return system timer value (critical section).
212 *
213 * The function IfxStm_get() is called in a critical section, disabling
214 * the interrupts. The system timer value is limited to TIME_INFINITE.
215 *
216 * \return Returns system timer value.
217 */
218 IFX_INLINE Ifx_TickTime now(void)
219 {
220 Ifx_TickTime stmNow;
221 boolean interruptState;
222
223 interruptState = disableInterrupts();
224 stmNow = (Ifx_TickTime)IfxStm_get(BSP_DEFAULT_TIMER) & TIME_INFINITE;
225 restoreInterrupts(interruptState);
226
227 return stmNow;
228 }
229
230
231 /** \brief Return system timer value (without critical section).
232 *
233 * The function IfxStm_get() is called. The system timer value is limited to TIME_INFINITE.
234 *
235 * \return Returns system timer value.
236 */
237 IFX_INLINE Ifx_TickTime nowWithoutCriticalSection(void)
238 {
239 Ifx_TickTime stmNow;
240
241 stmNow = (Ifx_TickTime)IfxStm_get(BSP_DEFAULT_TIMER) & TIME_INFINITE;
242
243 return stmNow;
244 }
245
246
247 /** \brief Add 2 Ifx_TickTime values and return the result
248 *
249 * \param a parameter a
250 * \param b parameter b
251 *
252 * \return a + b. If either a or b is TIME_INFINITE, the result is TIME_INFINITE
253 */
254 IFX_INLINE Ifx_TickTime addTTime(Ifx_TickTime a, Ifx_TickTime b)
255 {
256 Ifx_TickTime result;
257
258 if ((a == TIME_INFINITE) || (b == TIME_INFINITE))
259 {
260 result = TIME_INFINITE;
261 }
262 else
263 {
264 result = a + b; /* FIXME check for overflow */
265 }
266
267 return result;
268 }
269
270
271 /** \brief Return the elapsed time in ticks.
272 *
273 * Return the elapsed time between the current time and the time passed as parameter
274 *
275 * \return Returns the elapsed time.
276 */
277 IFX_INLINE Ifx_TickTime elapsed(Ifx_TickTime since)
278 {
279 return now() - since;
280 }
281
282
283 /** \brief Return the time dead line.
284 *
285 * \param timeout Specifies the dead line from now: Deadline = Now + Timeout
286 *
287 * \return Return the time dead line.
288 */
289 IFX_INLINE Ifx_TickTime getDeadLine(Ifx_TickTime timeout)
290 {
291 Ifx_TickTime deadLine;
292
293 if (timeout == TIME_INFINITE)
294 {
295 deadLine = TIME_INFINITE;
296 }
297 else
298 {
299 deadLine = now() + timeout;
300 }
301
302 return deadLine;
303 }
304
305
306 /** \brief Return the time until the dead line.
307 *
308 * \param deadline Specifies the dead line from now: Deadline = Now + Timeout
309 *
310 * \return Return the time until the dead line.
311 */
312 IFX_INLINE Ifx_TickTime getTimeout(Ifx_TickTime deadline)
313 {
314 Ifx_TickTime timeout;
315
316 if (deadline == TIME_INFINITE)
317 {
318 timeout = TIME_INFINITE;
319 }
320 else
321 {
322 timeout = deadline - now();
323 }
324
325 return timeout;
326 }
327
328
329 /** \brief Return TRUE if the dead line is over.
330 *
331 * \param deadLine Specifies the dead line.
332 *
333 * \retval TRUE Returns TRUE if the dead line is over
334 * \retval FALSE Returns FALSE if the dead line is not yet over
335 */
336 IFX_INLINE boolean isDeadLine(Ifx_TickTime deadLine)
337 {
338 boolean result;
339
340 if (deadLine == TIME_INFINITE)
341 {
342 result = FALSE;
343 }
344 else
345 {
346 result = now() >= deadLine;
347 }
348
349 return result;
350 }
351
352
353 /** \brief Poll a variable for a time.
354 *
355 * \param test Specifies the variable to test.
356 * \param timeout Specifies the maximal time the variable will be tested
357 *
358 * \retval TRUE Returns TRUE if the variable gets TRUE before the timeout elapse
359 * \retval FALSE Returns FALSE if the variable is FALSE as the timeout elapse
360 */
361 IFX_INLINE boolean poll(volatile boolean *test, Ifx_TickTime timeout)
362 {
363 Ifx_TickTime deadLine = getDeadLine(timeout);
364
365 while ((*test == FALSE) && (isDeadLine(deadLine) == FALSE))
366 {}
367
368 return *test;
369 }
370
371
372 /** \brief Return the elapsed time in system timer ticks, and enable the interrupts.
373 *
374 * The interrupts are enable by the function
375 *
376 * \param since time returned by timingNoInterruptStart()
377 * \param interruptEnabled If TRUE, the interrupts will be enabled before the function exit. This parameter should be set to the value returned by \ref timingNoInterruptStart()
378 *
379 * \return Returns the elapsed time.
380 *
381 * \see timingNoInterruptStart()
382 */
383 IFX_INLINE Ifx_TickTime timingNoInterruptEnd(Ifx_TickTime since, boolean interruptEnabled)
384 {
385 Ifx_TickTime stmNow;
386
387 stmNow = nowWithoutCriticalSection();
388 restoreInterrupts(interruptEnabled);
389
390 return stmNow - since;
391 }
392
393
394 /** \brief Disable the interrupt and return system timer value.
395 *
396 * The interrupt remains disabled after the function call
397 *
398 * \return Returns system timer value.
399 *
400 * \see timingNoInterruptEnd()
401 */
402 IFX_INLINE Ifx_TickTime timingNoInterruptStart(boolean *interruptEnabled)
403 {
404 *interruptEnabled = disableInterrupts();
405
406 return nowWithoutCriticalSection();
407 }
408
409
410 /** \brief Wait for a while.
411 *
412 * \param timeout Specifies the waiting time
413 *
414 * \return None.
415 */
416 IFX_INLINE void wait(Ifx_TickTime timeout)
417 {
418 Ifx_TickTime deadLine = getDeadLine(timeout);
419
420 while (isDeadLine(deadLine) == FALSE)
421 {}
422 }
423
424
425 #define PIN_DRIVER_STRONG_SHARP IfxPort_PadDriver_cmosAutomotiveSpeed1
426 #define Pin_setState(pin, mode) IfxPort_setPinState((pin)->port, (pin)->pinIndex, (mode))
427 #define Pin_setGroupState(pin, mask, data) IfxPort_setGroupState((pin)->port, (pin)->pinIndex, (mask), (data))
428 #define Pin_setMode(pin, mode) IfxPort_setPinMode((pin)->port, (pin)->pinIndex, (mode))
429 #define Pin_setDriver(pin, mode) IfxPort_setPinPadDriver((pin)->port, (pin)->pinIndex, (mode))
430 #define Pin_setStateHigh(pin) IfxPort_setPinHigh((pin)->port, (pin)->pinIndex)
431 #define Pin_setStateLow(pin) IfxPort_setPinLow((pin)->port, (pin)->pinIndex)
432 #define Pin_getState(pin) IfxPort_getPinState((pin)->port, (pin)->pinIndex)
433 #define Pin_setGroupModeOutput(pin, mask, mode, outputIdx) IfxPort_setGroupModeOutput((pin)->port, (pin)->pinIndex, (mask), (mode), (outputIdx))
434 #define Pin_setGroupModeInput(pin, mask, mode) IfxPort_setGroupModeInput((pin)->port, (pin)->pinIndex, (mask), (mode))
435 #define Pin_setGroupState(pin, mask, data) IfxPort_setGroupState((pin)->port, (pin)->pinIndex, (mask), (data))
436 #define Pin_getGroupState(pin, mask) IfxPort_getGroupState((pin)->port, (pin)->pinIndex, (mask))
437 #define Pin_enableEmgStop(pin) IfxPort_enableEmergencyStop((pin)->port, (pin)->pinIndex)
438 //------------------------------------------------------------------------------
439
440 #endif /* BSP_H */
Ifx_TickTime
sint64 Ifx_TickTime
Time in ticks.
Definition: Ifx_Types.h:76
nowWithoutCriticalSection
IFX_INLINE Ifx_TickTime nowWithoutCriticalSection(void)
Return system timer value (without critical section).
Definition: Bsp.h:237
IfxStm.h
STM basic functionality.
forceDisableInterrupts
IFX_INLINE void forceDisableInterrupts(void)
Disable the global interrupts forcefully.
Definition: Bsp.h:116
now
IFX_INLINE Ifx_TickTime now(void)
Return system timer value (critical section).
Definition: Bsp.h:218
timingNoInterruptEnd
IFX_INLINE Ifx_TickTime timingNoInterruptEnd(Ifx_TickTime since, boolean interruptEnabled)
Return the elapsed time in system timer ticks, and enable the interrupts.
Definition: Bsp.h:383
disableInterrupts
IFX_INLINE boolean disableInterrupts(void)
Disable the global interrupts.
Definition: Bsp.h:105
IfxCpu_enableInterrupts
IFX_INLINE void IfxCpu_enableInterrupts(void)
API to enable global interrupt. This API simply enables the global interrupt.
Definition: IfxCpu.h:759
Ifx_Assert.h
Assert functions.
enableInterrupts
IFX_INLINE void enableInterrupts(void)
enable the global interrupts
Definition: Bsp.h:125
IfxSrc.h
SRC basic functionality.
waitTime
IFX_EXTERN void waitTime(Ifx_TickTime timeout)
Wait time function.
Definition: Bsp.c:64
IfxCpu_Intrinsics.h
TIMER_COUNT
#define TIMER_COUNT
Definition: Bsp.h:148
IfxCpu_restoreInterrupts
IFX_INLINE void IfxCpu_restoreInterrupts(boolean enabled)
API to restore global interrupt with that of the passed parameter.
Definition: IfxCpu.h:1026
getDeadLine
IFX_INLINE Ifx_TickTime getDeadLine(Ifx_TickTime timeout)
Return the time dead line.
Definition: Bsp.h:289
TimeConst
IFX_EXTERN Ifx_TickTime TimeConst[TIMER_COUNT]
Definition: Bsp.h:165
elapsed
IFX_INLINE Ifx_TickTime elapsed(Ifx_TickTime since)
Return the elapsed time in ticks.
Definition: Bsp.h:277
FALSE
#define FALSE
Definition: Platform_Types.h:93
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxCpu_disableInterrupts
IFX_INLINE boolean IfxCpu_disableInterrupts(void)
API to disable global interrupt and return the previous status.
Definition: IfxCpu.h:749
wait
IFX_INLINE void wait(Ifx_TickTime timeout)
Wait for a while.
Definition: Bsp.h:416
isDeadLine
IFX_INLINE boolean isDeadLine(Ifx_TickTime deadLine)
Return TRUE if the dead line is over.
Definition: Bsp.h:336
IfxCpu.h
CPU basic functionality.
initTime
IFX_EXTERN void initTime(void)
time constant equal to 1s
restoreInterrupts
IFX_INLINE void restoreInterrupts(boolean enabled)
Restore the state of the global interrupts.
Definition: Bsp.h:139
WaitTimeFunction
void(* WaitTimeFunction)(Ifx_TickTime timeout)
Definition: Bsp.h:190
addTTime
IFX_INLINE Ifx_TickTime addTTime(Ifx_TickTime a, Ifx_TickTime b)
Add 2 Ifx_TickTime values and return the result.
Definition: Bsp.h:254
TIME_INFINITE
#define TIME_INFINITE
Definition: Ifx_Types.h:77
waitPoll
IFX_EXTERN void waitPoll(void)
Wait function.
Definition: Bsp.c:52
IfxScuCcu.h
SCU basic functionality.
IfxCpu_areInterruptsEnabled
IFX_INLINE boolean IfxCpu_areInterruptsEnabled(void)
API to get the status of global interrupt enable (ICR.IE) for the CPU which calls this API This API p...
Definition: IfxCpu.h:741
timingNoInterruptStart
IFX_INLINE Ifx_TickTime timingNoInterruptStart(boolean *interruptEnabled)
Disable the interrupt and return system timer value.
Definition: Bsp.h:402
areInterruptsEnabled
IFX_INLINE boolean areInterruptsEnabled(void)
Return the status of the global interrupts.
Definition: Bsp.h:92
BSP_DEFAULT_TIMER
#define BSP_DEFAULT_TIMER
Definition: Bsp.h:62
IfxStm_get
IFX_INLINE uint64 IfxStm_get(Ifx_STM *stm)
Returns system timer value.
Definition: IfxStm.h:576
IfxCpu_forceDisableInterrupts
IFX_INLINE void IfxCpu_forceDisableInterrupts(void)
Disable the Global Interrupt.
Definition: IfxCpu.h:827
getTimeout
IFX_INLINE Ifx_TickTime getTimeout(Ifx_TickTime deadline)
Return the time until the dead line.
Definition: Bsp.h:312
IfxPort.h
PORT basic functionality.
poll
IFX_INLINE boolean poll(volatile boolean *test, Ifx_TickTime timeout)
Poll a variable for a time.
Definition: Bsp.h:361


iLLD_TC38A: CompilerDcc.c Source File

  • Infra
  • Platform
  • Tricore
  • Compilers
CompilerDcc.c
Go to the documentation of this file.
1 /**
2 * \file CompilerDcc.c
3 *
4 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
5 *
6 * $Date: 2014-02-27 20:08:39 GMT$
7 *
8 * IMPORTANT NOTICE
9 *
10 * Use of this file is subject to the terms of use agreed between (i) you or
11 * the company in which ordinary course of business you are acting and (ii)
12 * Infineon Technologies AG or its licensees. If and as long as no such terms
13 * of use are agreed, use of this file is subject to following:
14 *
15 * Boost Software License - Version 1.0 - August 17th, 2003
16 *
17 * Permission is hereby granted, free of charge, to any person or organization
18 * obtaining a copy of the software and accompanying documentation covered by
19 * this license (the "Software") to use, reproduce, display, distribute,
20 * execute, and transmit the Software, and to prepare derivative works of the
21 * Software, and to permit third-parties to whom the Software is furnished to
22 * do so, all subject to the following:
23 *
24 * The copyright notices in the Software and this entire statement, including
25 * the above license grant, this restriction and the following disclaimer, must
26 * be included in all copies of the Software, in whole or in part, and all
27 * derivative works of the Software, unless such copies or derivative works are
28 * solely in the form of machine-executable object code generated by a source
29 * language processor.
30 *
31 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
32 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
33 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
34 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
35 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
36 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
37 * DEALINGS IN THE SOFTWARE.
38 *
39 */
40
41 #include "Cpu/Std/Ifx_Types.h"
42 #include "Compilers.h"
43
44 #if defined(__DCC__)
45 /*!
46 * \brief Initializes C variables
47 *
48 * This function is called in the startup. This function initialize the all variables in .data section
49 * and clears the .bss section
50 *
51 * Parameters: Nil
52 * Return: Nil
53 */
54 void Ifx_C_Init(void)
55 {
56 extern void __init_main(void);
57
58 __init_main(); /* initialize data */
59 }
60
61
62 #ifndef IFX_CFG_USE_COMPILER_DEFAULT_LINKER
63 /*Dummy main function
64 * This function is required only for the Windriver, which looks for main while linking
65 * ! DO NOT USE THIS FUNCTION !*/
66 int main(void)
67 {
68 return 0;
69 }
70
71
72 #endif /*IFX_CFG_USE_COMPILER_DEFAULT_LINKER */
73 #endif
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
Compilers.h
Ifx_C_Init
void Ifx_C_Init(void)


iLLD_TC38A: CompilerDcc.h Source File

  • Infra
  • Platform
  • Tricore
  • Compilers
CompilerDcc.h
Go to the documentation of this file.
1 /**
2 * \file CompilerDcc.h
3 *
4 * \version iLLD_New
5 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
6 *
7 *
8 * IMPORTANT NOTICE
9 *
10 * Use of this file is subject to the terms of use agreed between (i) you or
11 * the company in which ordinary course of business you are acting and (ii)
12 * Infineon Technologies AG or its licensees. If and as long as no such terms
13 * of use are agreed, use of this file is subject to following:
14 *
15 * Boost Software License - Version 1.0 - August 17th, 2003
16 *
17 * Permission is hereby granted, free of charge, to any person or organization
18 * obtaining a copy of the software and accompanying documentation covered by
19 * this license (the "Software") to use, reproduce, display, distribute,
20 * execute, and transmit the Software, and to prepare derivative works of the
21 * Software, and to permit third-parties to whom the Software is furnished to
22 * do so, all subject to the following:
23 *
24 * The copyright notices in the Software and this entire statement, including
25 * the above license grant, this restriction and the following disclaimer, must
26 * be included in all copies of the Software, in whole or in part, and all
27 * derivative works of the Software, unless such copies or derivative works are
28 * solely in the form of machine-executable object code generated by a source
29 * language processor.
30 *
31 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
32 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
33 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
34 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
35 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
36 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
37 * DEALINGS IN THE SOFTWARE.
38 *
39 */
40
41 #ifndef COMPILERDCC_H
42 #define COMPILERDCC_H 1
43
44 /******************************************************************************/
45
46 #include <stddef.h>
47
48 /*Linker definitions which are specific to Dcc */
49 /* IFX_CFG_USE_COMPILER_DEFAULT_LINKER shall be defined in Ifx_Cfg.h
50 * to use the default compiler linker varaibles and startup */
51 #ifndef IFX_CFG_USE_COMPILER_DEFAULT_LINKER
52
53 /*Start: Core 0 definitions ********************************************** */
54
55 /*C extern defintions */
56 #define IFXCOMPILER_CORE_LINKER_SYMBOLS(cpu) \
57 extern unsigned int __USTACK##cpu[]; /**< user stack end */ \
58 extern unsigned int __ISTACK##cpu[]; /**< interrupt stack end */ \
59 extern unsigned int __INTTAB_CPU##cpu[]; /**< interrupt vector table */ \
60 extern unsigned int __TRAPTAB_CPU##cpu[]; /**< trap vector table */ \
61 extern unsigned int __CSA##cpu[]; /**< context save area begin */ \
62 extern unsigned int __CSA##cpu##_END[]; /**< context save area end */
63
64 #define __USTACK(cpu) __USTACK##cpu
65 #define __ISTACK(cpu) __ISTACK##cpu
66 #define __INTTAB_CPU(cpu) __INTTAB_CPU##cpu
67 #define __TRAPTAB_CPU(cpu) __TRAPTAB_CPU##cpu
68 #define __CSA(cpu) __CSA##cpu
69 #define __CSA_END(cpu) __CSA##cpu##_END
70
71 #define IFXCOMPILER_COMMON_LINKER_SYMBOLS() \
72 __asm("\t .weak __A8_MEM, __A9_MEM"); /**< ASM extern definitions */
73
74 /*Wrapper macros for the tool specific definitions */
75 #if defined(IFX_USE_SW_MANAGED_INT)
76 #define __INTTAB(cpu) ((unsigned int)__INTTAB_CPU##cpu | (unsigned int)0x1FE0)
77 #else
78 #define __INTTAB(cpu) __INTTAB_CPU##cpu
79 #endif /*defined(IFX_USE_SW_MANAGED_INT) */
80
81 #define __TRAPTAB(cpu) __TRAPTAB_CPU##cpu
82
83 #define __SDATA1(cpu) _SMALL_DATA_
84 #define __SDATA2(cpu) _LITERAL_DATA_
85 #define __SDATA3(cpu) __A8_MEM
86 #define __SDATA4(cpu) __A9_MEM
87
88 #endif /*IFX_CFG_USE_COMPILER_DEFAULT_LINKER*/
89
90 /******************************************************************************/
91 #define IFX_INLINE static __inline__
92
93 /* FXIME check how to pack structure members */
94 #define IFX_PACKED
95
96 #define COMPILER_NAME "DCC"
97 #define COMPILER_VERSION __VERSION__
98
99 #define COMPILER_REVISION 0
100 #define IFX_INTERRUPT_FAST IFX_INTERRUPT
101
102 #if defined(IFX_USE_SW_MANAGED_INT)
103
104 #ifndef IFX_INTERRUPT
105 #define IFX_INTERRUPT(isr, vectabNum, prio) void isr(void)
106 #endif
107
108 #else
109 /* *INDENT-OFF* */
110
111 #ifndef IFX_INTERRUPT
112 #define IFX_INTERRUPT(isr, vectabNum, prio) IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio)
113 #endif
114 #endif /*defined(IFX_USE_SW_MANAGED_INT)*/
115
116 #ifndef IFX_INTERRUPT_INTERNAL
117 #define IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio) \
118 void __interrupt(prio) __vector_table(vectabNum) isr(void)
119 #endif
120
121 /*Macro IFX_INTERRUPT_LEGACY is to be used for compiler version pror to 5.9.3.0*/
122 #define IFX_INTERRUPT_LEGACY(isr, vectabNum, prio) \
123 __asm ("\t.align\t 5\n\t\
124 .section .int."#prio"\n \t.sectionlink .inttab"#vectabNum".intvec."#prio"\n\
125 #$$bf\n\
126 __intvec_tc"#vectabNum"_"#prio":\n\
127 movh.a\t %a14,"#isr"@ha\n\
128 lea\t %a14,[%a14]"#isr"@l\n\
129 ji\t %a14\n\
130 #$$ef\n\t\
131 .section .intend."#prio"\n \t.sectionlink .text");\
132 __interrupt__ void isr (void)
133
134 /* *INDENT-ON* */
135
136 /******************************************************************************/
137
138 #define IFX_ALIGN(n) __attribute__ ((aligned(n)))
139
140 /******************************************************************************/
141 /*Memory qualifiers*/
142 #ifndef IFX_FAR_ABS
143 #define IFX_FAR_ABS
144 #endif
145
146 #ifndef IFX_NEAR_ABS
147 #define IFX_NEAR_ABS
148 #endif
149
150 #ifndef IFX_REL_A0
151 #define IFX_REL_A0
152 #endif
153
154 #ifndef IFX_REL_A1
155 #define IFX_REL_A1
156 #endif
157
158 #ifndef IFX_REL_A8
159 #define IFX_REL_A8
160 #endif
161
162 #ifndef IFX_REL_A9
163 #define IFX_REL_A9
164 #endif
165 /******************************************************************************/
166
167 #endif /* COMPILERDCC_H */


iLLD_TC38A: CompilerGhs.c Source File

  • Infra
  • Platform
  • Tricore
  • Compilers
CompilerGhs.c
Go to the documentation of this file.
1 /**
2 * \file CompilerGhs.c
3 *
4 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
5 *
6 * $Date: 2014-02-27 20:08:40 GMT$
7 *
8 * IMPORTANT NOTICE
9 *
10 * Use of this file is subject to the terms of use agreed between (i) you or
11 * the company in which ordinary course of business you are acting and (ii)
12 * Infineon Technologies AG or its licensees. If and as long as no such terms
13 * of use are agreed, use of this file is subject to following:
14 *
15 * Boost Software License - Version 1.0 - August 17th, 2003
16 *
17 * Permission is hereby granted, free of charge, to any person or organization
18 * obtaining a copy of the software and accompanying documentation covered by
19 * this license (the "Software") to use, reproduce, display, distribute,
20 * execute, and transmit the Software, and to prepare derivative works of the
21 * Software, and to permit third-parties to whom the Software is furnished to
22 * do so, all subject to the following:
23 *
24 * The copyright notices in the Software and this entire statement, including
25 * the above license grant, this restriction and the following disclaimer, must
26 * be included in all copies of the Software, in whole or in part, and all
27 * derivative works of the Software, unless such copies or derivative works are
28 * solely in the form of machine-executable object code generated by a source
29 * language processor.
30 *
31 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
32 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
33 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
34 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
35 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
36 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
37 * DEALINGS IN THE SOFTWARE.
38 *
39 */
40
41 #include "Cpu/Std/Ifx_Types.h"
42 #include "Compilers.h"
43
44 #if defined(__ghs__) && !defined(WIN32)
45
46 typedef int ptrdiff_t;
47 typedef unsigned int syze_t;
48 typedef signed int signed_size_t;
49 #define size_t syze_t
50
51 extern void *memcpy(void *s1, const void *s2, syze_t n);
52 extern void *memset(void *s, int c, syze_t n);
53
54 /* rodata is absolute */
55 typedef const char rodata_ptr[];
56 # define PIRBASE 0
57
58 #define CONST_FUNCP *const
59
60 /*!
61 * \brief Initializes C variables.
62 *
63 * This function is called in the startup. This function initialize the all variables in .data section
64 * and clears the .bss section
65 *
66 * Parameters: Nil
67 * Return: Nil
68 */
69 void Ifx_C_Init(void)
70 {
71 /*----------------------------------------------------------------------*/
72 /* */
73 /* Clear BSS */
74 /* */
75 /*----------------------------------------------------------------------*/
76 { /* The .secinfo section is in text; declare functions to force PIC */
77
78 #pragma ghs rodata
79 extern rodata_ptr __ghsbinfo_clear;
80 #pragma ghs rodata
81 extern rodata_ptr __ghseinfo_clear;
82
83 void **b = (void **) ((char *)__ghsbinfo_clear);
84 void **e = (void **) ((char *)__ghseinfo_clear);
85
86 while (b != e) {
87 void * t; /* target pointer */
88 ptrdiff_t v; /* value to set */
89 size_t n; /* set n bytes */
90 t = (char *)(*b++);
91 v = *((ptrdiff_t *) b); b++;
92 n = *((size_t *) b); b++;
93 memset(t, v, n);
94 }
95 }
96
97 /*----------------*/
98 /* initialize iob */
99 /*----------------*/
100 {
101 #pragma weak __gh_iob_init
102 extern void __gh_iob_init(void);
103 static void (CONST_FUNCP iob_init_funcp)(void) = __gh_iob_init;
104 /* if cciob.c is loaded, initialize _iob for stdin,stdout,stderr */
105 if (iob_init_funcp) __gh_iob_init();
106 }
107 }
108
109
110 #endif
CONST_FUNCP
#define CONST_FUNCP
Definition: Ifx_Ssw_CompilersGhs.h:219
memcpy
void * memcpy(void *s1, const void *s2, syze_t n)
signed_size_t
signed int signed_size_t
Definition: Ifx_Ssw_CompilersGhs.h:207
rodata_ptr
const char rodata_ptr[]
Definition: Ifx_Ssw_CompilersGhs.h:214
memset
void * memset(void *s, int c, syze_t n)
syze_t
unsigned int syze_t
Definition: Ifx_Ssw_CompilersGhs.h:206
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
t
uint32 ins t
Definition: IfxCpu_IntrinsicsDcc.h:414
ptrdiff_t
int ptrdiff_t
Definition: Ifx_Ssw_CompilersGhs.h:205
Compilers.h
Ifx_C_Init
void Ifx_C_Init(void)


iLLD_TC38A: CompilerGhs.h Source File

  • Infra
  • Platform
  • Tricore
  • Compilers
CompilerGhs.h
Go to the documentation of this file.
1 /**
2 * \file CompilerGhs.h
3 *
4 * \version iLLD_New
5 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
6 *
7 *
8 * IMPORTANT NOTICE
9 *
10 * Use of this file is subject to the terms of use agreed between (i) you or
11 * the company in which ordinary course of business you are acting and (ii)
12 * Infineon Technologies AG or its licensees. If and as long as no such terms
13 * of use are agreed, use of this file is subject to following:
14 *
15 * Boost Software License - Version 1.0 - August 17th, 2003
16 *
17 * Permission is hereby granted, free of charge, to any person or organization
18 * obtaining a copy of the software and accompanying documentation covered by
19 * this license (the "Software") to use, reproduce, display, distribute,
20 * execute, and transmit the Software, and to prepare derivative works of the
21 * Software, and to permit third-parties to whom the Software is furnished to
22 * do so, all subject to the following:
23 *
24 * The copyright notices in the Software and this entire statement, including
25 * the above license grant, this restriction and the following disclaimer, must
26 * be included in all copies of the Software, in whole or in part, and all
27 * derivative works of the Software, unless such copies or derivative works are
28 * solely in the form of machine-executable object code generated by a source
29 * language processor.
30 *
31 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
32 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
33 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
34 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
35 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
36 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
37 * DEALINGS IN THE SOFTWARE.
38 *
39 */
40
41 #ifndef COMPILERGHS_H
42 #define COMPILERGHS_H 1
43
44 /******************************************************************************/
45
46 // #include <stddef.h>
47
48 /*Linker definitions which are specific to Ghs */
49 /* IFX_CFG_USE_COMPILER_DEFAULT_LINKER shall be defined in Ifx_Cfg.h
50 * to use the default compiler linker varaibles and startup */
51 #ifndef IFX_CFG_USE_COMPILER_DEFAULT_LINKER
52
53 /*Start: Common definitions ********************************************** */
54 #define IFXCOMPILER_COMMON_LINKER_SYMBOLS() \
55 extern unsigned int __A0_MEM[]; /**< center of A0 addressable area */ \
56 extern unsigned int __A1_MEM[]; /**< center of A1 addressable area */ \
57 extern unsigned int __A8_MEM[]; /**< center of A8 addressable area */ \
58 extern unsigned int __A9_MEM[]; /**< center of A9 addressable area */
59
60 /*End: Common definitions ************************************************ */
61
62 /*Start: Core 0 definitions ********************************************** */
63
64 /*C extern defintions */
65 #define IFXCOMPILER_CORE_LINKER_SYMBOLS(cpu) \
66 extern unsigned int __USTACK##cpu[]; /**< user stack end */ \
67 extern unsigned int __ISTACK##cpu[]; /**< interrupt stack end */ \
68 extern unsigned int __INTTAB_CPU##cpu[]; /**< Interrupt vector table */ \
69 extern unsigned int __TRAPTAB_CPU##cpu[]; /**< trap table */ \
70 extern unsigned int __CSA##cpu[]; /**< context save area 1 begin */ \
71 extern unsigned int __CSA##cpu##_END[]; /**< context save area 1 begin */
72
73 #define __USTACK(cpu) __USTACK##cpu
74 #define __ISTACK(cpu) __ISTACK##cpu
75 #define __INTTAB_CPU(cpu) __INTTAB_CPU##cpu
76 #define __TRAPTAB_CPU(cpu) __TRAPTAB_CPU##cpu
77 #define __CSA(cpu) __CSA##cpu
78 #define __CSA_END(cpu) __CSA##cpu##_END
79
80 /*Wrapper macros for the tool specific definitions */
81 #if defined(IFX_USE_SW_MANAGED_INT)
82 #define __INTTAB(cpu) ((unsigned int)__INTTAB_CPU##cpu | (unsigned int)0x1FE0)
83 #else
84 #define __INTTAB(cpu) __INTTAB_CPU##cpu
85 #endif /*defined(IFX_USE_SW_MANAGED_INT) */
86
87 #define __TRAPTAB(cpu) __TRAPTAB_CPU##cpu
88
89 #define __SDATA1(cpu) __A0_MEM
90 #define __SDATA2(cpu) __A1_MEM
91 #define __SDATA3(cpu) __A8_MEM
92 #define __SDATA4(cpu) __A9_MEM
93
94 /* MHWS+
95 #define __SDATA1(cpu) __A0_MEM
96 #define __SDATA2(cpu) __A1_MEM
97 #define __SDATA3(cpu) __A8_MEM
98 #define __SDATA4(cpu) __A9_MEM
99 MHWS- */
100 #endif /*IFX_CFG_USE_COMPILER_DEFAULT_LINKER*/
101
102 /******************************************************************************/
103 #ifndef IFX_INLINE
104 #define IFX_INLINE static inline __attribute__ ((always_inline)) /*Makes the function always inlined */
105 #endif
106
107 #define IFX_PACKED __packed
108
109 #define COMPILER_NAME "GHS"
110 #define COMPILER_VERSION __GHS_VERSION_NUMBER
111
112 #define COMPILER_REVISION __GHS_REVISION_VALUE
113
114 #if defined(IFX_USE_SW_MANAGED_INT)
115
116 #ifndef IFX_INTERRUPT
117 #define IFX_INTERRUPT(isr, vectabNum, prio) void isr(void)
118 #endif
119
120 #else
121 /* *INDENT-OFF* */
122
123 #ifndef IFX_INTERRUPT
124 #define IFX_INTERRUPT(isr, vectabNum, prio) IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio)
125 #endif
126 #endif /*defined(IFX_USE_SW_MANAGED_INT)*/
127
128 #define IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio) \
129 __attribute__((section(".intvec_tc"#vectabNum"_"#prio))) void iVecEntry##vectabNum##_##prio(void) \
130 { \
131 __asm__("movh.a a14, %hi("#isr") \n" \
132 "lea a14, [a14]%lo("#isr")\n" \
133 "ji a14"); \
134 } \
135 __interrupt void isr(void)
136
137 /* *INDENT-ON* */
138
139 /******************************************************************************/
140
141 #define IFX_ALIGN(n) __attribute__ ((aligned(n)))
142
143 /******************************************************************************/
144 /*Memory qualifiers*/
145 #ifndef IFX_FAR_ABS
146 #define IFX_FAR_ABS __attribute__((fardata))
147 #endif
148
149 #ifndef IFX_NEAR_ABS
150 #define IFX_NEAR_ABS
151 #endif
152
153 #ifndef IFX_REL_A0
154 #define IFX_REL_A0
155 #endif
156
157 #ifndef IFX_REL_A1
158 #define IFX_REL_A1
159 #endif
160
161 #ifndef IFX_REL_A8
162 #define IFX_REL_A8
163 #endif
164
165 #ifndef IFX_REL_A9
166 #define IFX_REL_A9
167 #endif
168 /******************************************************************************/
169
170 #endif /* COMPILERGHS_H */


iLLD_TC38A: CompilerGnuc.c Source File

  • Infra
  • Platform
  • Tricore
  • Compilers
CompilerGnuc.c
Go to the documentation of this file.
1 /**
2 * \file CompilerGnuc.c
3 *
4 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
5 *
6 * $Date: 2014-02-27 20:08:40 GMT$
7 *
8 * IMPORTANT NOTICE
9 *
10 * Use of this file is subject to the terms of use agreed between (i) you or
11 * the company in which ordinary course of business you are acting and (ii)
12 * Infineon Technologies AG or its licensees. If and as long as no such terms
13 * of use are agreed, use of this file is subject to following:
14 *
15 * Boost Software License - Version 1.0 - August 17th, 2003
16 *
17 * Permission is hereby granted, free of charge, to any person or organization
18 * obtaining a copy of the software and accompanying documentation covered by
19 * this license (the "Software") to use, reproduce, display, distribute,
20 * execute, and transmit the Software, and to prepare derivative works of the
21 * Software, and to permit third-parties to whom the Software is furnished to
22 * do so, all subject to the following:
23 *
24 * The copyright notices in the Software and this entire statement, including
25 * the above license grant, this restriction and the following disclaimer, must
26 * be included in all copies of the Software, in whole or in part, and all
27 * derivative works of the Software, unless such copies or derivative works are
28 * solely in the form of machine-executable object code generated by a source
29 * language processor.
30 *
31 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
32 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
33 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
34 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
35 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
36 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
37 * DEALINGS IN THE SOFTWARE.
38 *
39 */
40
41 #include "Cpu/Std/Ifx_Types.h"
42 #include "Compilers.h"
43
44 #if defined(__HIGHTEC__) && !defined(WIN32)
45 /*!
46 * \brief Data s C variables.
47 */
48 extern uint32 __clear_table[]; /**< clear table entry */
49 extern uint32 __copy_table[]; /**< copy table entry */
50
51 typedef volatile union
52 {
53 uint8 *ucPtr;
54 uint16 *usPtr;
55 uint32 *uiPtr;
56 unsigned long long *ullPtr;
57 } IfxStart_CTablePtr;
58
59 /*!
60 * \brief Initializes C variables.
61 *
62 * This function is called in the startup. This function initialize the all variables in .data section
63 * and clears the .bss section
64 *
65 * Parameters: Nil
66 * Return: Nil
67 */
68 void Ifx_C_Init(void)
69 {
70 IfxStart_CTablePtr pBlockDest, pBlockSrc;
71 uint32 uiLength, uiCnt;
72 uint32 *pTable;
73 /* clear table */
74 pTable = (uint32 *)&__clear_table;
75
76 while (pTable)
77 {
78 pBlockDest.uiPtr = (uint32 *)*pTable++;
79 uiLength = *pTable++;
80
81 /* we are finished when length == -1 */
82 if (uiLength == 0xFFFFFFFF)
83 {
84 break;
85 }
86
87 uiCnt = uiLength / 8;
88
89 while (uiCnt--)
90 {
91 *pBlockDest.ullPtr++ = 0;
92 }
93
94 if (uiLength & 0x4)
95 {
96 *pBlockDest.uiPtr++ = 0;
97 }
98
99 if (uiLength & 0x2)
100 {
101 *pBlockDest.usPtr++ = 0;
102 }
103
104 if (uiLength & 0x1)
105 {
106 *pBlockDest.ucPtr = 0;
107 }
108 }
109
110 /* copy table */
111 pTable = (uint32 *)&__copy_table;
112
113 while (pTable)
114 {
115 pBlockSrc.uiPtr = (uint32 *)*pTable++;
116 pBlockDest.uiPtr = (uint32 *)*pTable++;
117 uiLength = *pTable++;
118
119 /* we are finished when length == -1 */
120 if (uiLength == 0xFFFFFFFF)
121 {
122 break;
123 }
124
125 uiCnt = uiLength / 8;
126
127 while (uiCnt--)
128 {
129 *pBlockDest.ullPtr++ = *pBlockSrc.ullPtr++;
130 }
131
132 if (uiLength & 0x4)
133 {
134 *pBlockDest.uiPtr++ = *pBlockSrc.uiPtr++;
135 }
136
137 if (uiLength & 0x2)
138 {
139 *pBlockDest.usPtr++ = *pBlockSrc.usPtr++;
140 }
141
142 if (uiLength & 0x1)
143 {
144 *pBlockDest.ucPtr = *pBlockSrc.ucPtr;
145 }
146 }
147 }
148
149
150 #endif
uint32
unsigned long uint32
Definition: Platform_Types.h:116
__copy_table
unsigned int __copy_table[]
__clear_table
unsigned int __clear_table[]
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
Compilers.h
uint16
unsigned short uint16
Definition: Platform_Types.h:112
uint8
unsigned char uint8
Definition: Platform_Types.h:108
Ifx_C_Init
void Ifx_C_Init(void)


iLLD_TC38A: CompilerGnuc.h Source File

  • Infra
  • Platform
  • Tricore
  • Compilers
CompilerGnuc.h
Go to the documentation of this file.
1 /**
2 * \file CompilerGnuc.h
3 *
4 * \version iLLD_New
5 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
6 *
7 *
8 * IMPORTANT NOTICE
9 *
10 * Use of this file is subject to the terms of use agreed between (i) you or
11 * the company in which ordinary course of business you are acting and (ii)
12 * Infineon Technologies AG or its licensees. If and as long as no such terms
13 * of use are agreed, use of this file is subject to following:
14 *
15 * Boost Software License - Version 1.0 - August 17th, 2003
16 *
17 * Permission is hereby granted, free of charge, to any person or organization
18 * obtaining a copy of the software and accompanying documentation covered by
19 * this license (the "Software") to use, reproduce, display, distribute,
20 * execute, and transmit the Software, and to prepare derivative works of the
21 * Software, and to permit third-parties to whom the Software is furnished to
22 * do so, all subject to the following:
23 *
24 * The copyright notices in the Software and this entire statement, including
25 * the above license grant, this restriction and the following disclaimer, must
26 * be included in all copies of the Software, in whole or in part, and all
27 * derivative works of the Software, unless such copies or derivative works are
28 * solely in the form of machine-executable object code generated by a source
29 * language processor.
30 *
31 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
32 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
33 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
34 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
35 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
36 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
37 * DEALINGS IN THE SOFTWARE.
38 *
39 */
40
41 #ifndef COMPILERGNUC_H
42 #define COMPILERGNUC_H 1
43
44 /******************************************************************************/
45
46 #include <stddef.h>
47
48 /*Linker definitions which are specific to Gnuc */
49 /* IFX_CFG_USE_COMPILER_DEFAULT_LINKER shall be defined in Ifx_Cfg.h
50 * to use the default compiler linker varaibles and startup */
51 #ifndef IFX_CFG_USE_COMPILER_DEFAULT_LINKER
52
53 /*Start: Common definitions ********************************************** */
54 #define IFXCOMPILER_COMMON_LINKER_SYMBOLS() \
55 extern unsigned int __A0_MEM[]; /**< center of A0 addressable area */ \
56 extern unsigned int __A1_MEM[]; /**< center of A1 addressable area */ \
57 extern unsigned int __A8_MEM[]; /**< center of A8 addressable area */ \
58 extern unsigned int __A9_MEM[]; /**< center of A9 addressable area */
59
60 /*End: Common definitions ************************************************ */
61
62 /*Start: Core 0 definitions ********************************************** */
63
64 /*C extern defintions */
65 #define IFXCOMPILER_CORE_LINKER_SYMBOLS(cpu) \
66 extern unsigned int __USTACK##cpu[]; /**< user stack end */ \
67 extern unsigned int __ISTACK##cpu[]; /**< interrupt stack end */ \
68 extern unsigned int __INTTAB_CPU##cpu[]; /**< Interrupt vector table */ \
69 extern unsigned int __TRAPTAB_CPU##cpu[]; /**< trap table */ \
70 extern unsigned int __CSA##cpu[]; /**< context save area 1 begin */ \
71 extern unsigned int __CSA##cpu##_END[]; /**< context save area 1 begin */
72
73 #define __USTACK(cpu) __USTACK##cpu
74 #define __ISTACK(cpu) __ISTACK##cpu
75 #define __INTTAB_CPU(cpu) __INTTAB_CPU##cpu
76 #define __TRAPTAB_CPU(cpu) __TRAPTAB_CPU##cpu
77 #define __CSA(cpu) __CSA##cpu
78 #define __CSA_END(cpu) __CSA##cpu##_END
79
80 /*Wrapper macros for the tool specific definitions */
81 #if defined(IFX_USE_SW_MANAGED_INT)
82 #define __INTTAB(cpu) ((unsigned int)__INTTAB_CPU##cpu | (unsigned int)0x1FE0)
83 #else
84 #define __INTTAB(cpu) __INTTAB_CPU##cpu
85 #endif /*defined(IFX_USE_SW_MANAGED_INT) */
86
87 #define __TRAPTAB(cpu) __TRAPTAB_CPU##cpu
88
89 #define __SDATA1(cpu) __A0_MEM
90 #define __SDATA2(cpu) __A1_MEM
91 #define __SDATA3(cpu) __A8_MEM
92 #define __SDATA4(cpu) __A9_MEM
93
94 #endif /*IFX_CFG_USE_COMPILER_DEFAULT_LINKER*/
95
96 /******************************************************************************/
97 #ifndef IFX_INLINE
98 #define IFX_INLINE static inline __attribute__ ((always_inline)) /*Makes the function always inlined */
99 #endif
100
101 #define IFX_PACKED __attribute__ ((packed))
102
103 #define COMPILER_NAME "GNUC"
104 #define COMPILER_VERSION __VERSION__
105
106 #define COMPILER_REVISION 0
107
108 #define IFX_INTERRUPT_FAST IFX_INTERRUPT
109
110 #if defined(IFX_USE_SW_MANAGED_INT)
111
112 #ifndef IFX_INTERRUPT
113 #define IFX_INTERRUPT(isr, vectabNum, prio) void isr(void)
114 #endif
115
116 #else
117 /* *INDENT-OFF* */
118 #ifndef IFX_INTERRUPT
119 #define IFX_INTERRUPT(isr, vectabNum, prio) IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio)
120 #endif
121 #endif /*defined(IFX_USE_SW_MANAGED_INT)*/
122
123 #ifndef IFX_INTERRUPT_INTERNAL
124 #define IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio) \
125 __asm__ (".ifndef .intr.entry.include \n"\
126 ".altmacro \n"\
127 ".macro .int_entry.2 intEntryLabel, name # define the section and inttab entry code \n"\
128 " .pushsection .\\intEntryLabel,\"ax\",@progbits \n"\
129 " __\\intEntryLabel : \n"\
130 " svlcx \n"\
131 " movh.a %a14, hi:\\name \n"\
132 " lea %a14, [%a14]lo:\\name \n"\
133 " ji %a14 \n"\
134 " .popsection \n"\
135 ".endm \n"\
136 ".macro .int_entry.1 prio,vectabNum,u,name \n"\
137 ".int_entry.2 intvec_tc\\vectabNum\\u\\prio,(name) # build the unique name \n"\
138 ".endm \n"\
139 " \n"\
140 ".macro .intr.entry name,vectabNum,prio \n"\
141 ".int_entry.1 %(prio),%(vectabNum),_,name # evaluate the priority and the cpu number \n"\
142 ".endm \n"\
143 ".intr.entry.include: \n"\
144 ".endif \n"\
145 ".intr.entry "#isr","#vectabNum","#prio );\
146 IFX_EXTERN void __attribute__ ((interrupt_handler)) isr(); \
147 void isr (void)
148 #endif /* IFX_INTERRUPT_INTERNAL */
149
150 /* *INDENT-ON* */
151
152 /******************************************************************************/
153
154 #define IFX_ALIGN(n) __attribute__ ((aligned(n)))
155
156 /******************************************************************************/
157 /*Memory qualifiers*/
158 #ifndef IFX_FAR_ABS
159 #define IFX_FAR_ABS __attribute__((fardata))
160 #endif
161
162 #ifndef IFX_NEAR_ABS
163 #define IFX_NEAR_ABS
164 #endif
165
166 #ifndef IFX_REL_A0
167 #define IFX_REL_A0
168 #endif
169
170 #ifndef IFX_REL_A1
171 #define IFX_REL_A1
172 #endif
173
174 #ifndef IFX_REL_A8
175 #define IFX_REL_A8
176 #endif
177
178 #ifndef IFX_REL_A9
179 #define IFX_REL_A9
180 #endif
181 /******************************************************************************/
182
183 #endif /* COMPILERGNUC_H */


iLLD_TC38A: CompilerTasking.c Source File

  • Infra
  • Platform
  • Tricore
  • Compilers
CompilerTasking.c
Go to the documentation of this file.
1 /**
2 * \file CompilerTasking.c
3 *
4 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
5 *
6 * $Date: 2014-02-27 20:08:41 GMT$
7 *
8 * IMPORTANT NOTICE
9 *
10 * Use of this file is subject to the terms of use agreed between (i) you or
11 * the company in which ordinary course of business you are acting and (ii)
12 * Infineon Technologies AG or its licensees. If and as long as no such terms
13 * of use are agreed, use of this file is subject to following:
14 *
15 * Boost Software License - Version 1.0 - August 17th, 2003
16 *
17 * Permission is hereby granted, free of charge, to any person or organization
18 * obtaining a copy of the software and accompanying documentation covered by
19 * this license (the "Software") to use, reproduce, display, distribute,
20 * execute, and transmit the Software, and to prepare derivative works of the
21 * Software, and to permit third-parties to whom the Software is furnished to
22 * do so, all subject to the following:
23 *
24 * The copyright notices in the Software and this entire statement, including
25 * the above license grant, this restriction and the following disclaimer, must
26 * be included in all copies of the Software, in whole or in part, and all
27 * derivative works of the Software, unless such copies or derivative works are
28 * solely in the form of machine-executable object code generated by a source
29 * language processor.
30 *
31 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
32 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
33 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
34 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
35 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
36 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
37 * DEALINGS IN THE SOFTWARE.
38 *
39 */
40
41 #include "Cpu/Std/Ifx_Types.h"
42 #include "Compilers.h"
43
44 #if defined(__TASKING__)
45 /*!
46 * \brief Initializes C variables
47 *
48 * This function is called in the startup. This function initialize the all variables in .data section
49 * and clears the .bss section
50 *
51 * Parameters: Nil
52 * Return: Nil
53 */
54 void Ifx_C_Init(void)
55 {
56 extern void _c_init(void);
57
58 _c_init(); /* initialize data */
59 }
60
61
62 #endif
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
Compilers.h
Ifx_C_Init
void Ifx_C_Init(void)


iLLD_TC38A: CompilerTasking.h Source File

  • Infra
  • Platform
  • Tricore
  • Compilers
CompilerTasking.h
Go to the documentation of this file.
1 /**
2 * \file CompilerTasking.h
3 *
4 * \version iLLD_New
5 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
6 *
7 *
8 * IMPORTANT NOTICE
9 *
10 * Use of this file is subject to the terms of use agreed between (i) you or
11 * the company in which ordinary course of business you are acting and (ii)
12 * Infineon Technologies AG or its licensees. If and as long as no such terms
13 * of use are agreed, use of this file is subject to following:
14 *
15 * Boost Software License - Version 1.0 - August 17th, 2003
16 *
17 * Permission is hereby granted, free of charge, to any person or organization
18 * obtaining a copy of the software and accompanying documentation covered by
19 * this license (the "Software") to use, reproduce, display, distribute,
20 * execute, and transmit the Software, and to prepare derivative works of the
21 * Software, and to permit third-parties to whom the Software is furnished to
22 * do so, all subject to the following:
23 *
24 * The copyright notices in the Software and this entire statement, including
25 * the above license grant, this restriction and the following disclaimer, must
26 * be included in all copies of the Software, in whole or in part, and all
27 * derivative works of the Software, unless such copies or derivative works are
28 * solely in the form of machine-executable object code generated by a source
29 * language processor.
30 *
31 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
32 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
33 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
34 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
35 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
36 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
37 * DEALINGS IN THE SOFTWARE.
38 *
39 */
40
41 #ifndef COMPILERTASKING_H
42 #define COMPILERTASKING_H 1
43
44 /******************************************************************************/
45
46 #include <stddef.h>
47
48 /*Linker definitions which are specific to Tasking */
49 /* IFX_CFG_USE_COMPILER_DEFAULT_LINKER shall be defined in Ifx_Cfg.h
50 * to use the default compiler linker varaibles and startup */
51 #ifndef IFX_CFG_USE_COMPILER_DEFAULT_LINKER
52
53 #ifndef __cplusplus
54 /*Start: Common definitions ********************************************** */
55 #define IFXCOMPILER_COMMON_LINKER_SYMBOLS() \
56 __asm("\t .extern _SMALL_DATA_, _LITERAL_DATA_, _A8_DATA_, _A9_DATA_");
57
58 /*End: Common definitions ********************************************** */
59
60 /*Start: Core 0 definitions ********************************************** */
61
62 #define IFXCOMPILER_CORE_LINKER_SYMBOLS(cpu) \
63 __asm("\t .extern __USTACK"#cpu); /**< user stack end is required as asm to be used with setreg macro */ \
64 extern unsigned int __ISTACK##cpu[]; /**< interrupt stack end */ \
65 extern unsigned int __INTTAB_CPU##cpu[]; /**< interrupt vector table */ \
66 extern unsigned int __TRAPTAB_CPU##cpu[]; /**< trap vector table */ \
67 extern unsigned int __CSA##cpu[]; /**< context save area begin */ \
68 extern unsigned int __CSA##cpu##_END[]; /**< context save area end */
69 #endif
70
71 #define __USTACK(cpu) __USTACK##cpu
72 #define __ISTACK(cpu) __ISTACK##cpu
73 #define __INTTAB_CPU(cpu) __INTTAB_CPU##cpu
74 #define __TRAPTAB_CPU(cpu) __TRAPTAB_CPU##cpu
75 #define __CSA(cpu) __CSA##cpu
76 #define __CSA_END(cpu) __CSA##cpu##_END
77
78 /*Wrapper macros for the tool specific definitions */
79 #if defined(IFX_USE_SW_MANAGED_INT)
80 #define __INTTAB(cpu) ((unsigned int)__INTTAB_CPU##cpu | (unsigned int)0x1FE0)
81 #else
82 #define __INTTAB(cpu) __INTTAB_CPU##cpu
83 #endif /*defined(IFX_USE_SW_MANAGED_INT) */
84
85 #define __TRAPTAB(cpu) __TRAPTAB_CPU##cpu
86
87 #define __SDATA1(cpu) _SMALL_DATA_
88 #define __SDATA2(cpu) _LITERAL_DATA_
89 #define __SDATA3(cpu) _A8_DATA_
90 #define __SDATA4(cpu) _A9_DATA_
91
92 #endif /*IFX_CFG_USE_COMPILER_DEFAULT_LINKER*/
93
94 /******************************************************************************/
95 #ifdef __cplusplus
96 #define IFX_INLINE static inline
97 #else
98 #define IFX_INLINE static inline
99 #endif
100
101 /* FXIME check how to pack structure members */
102 #define IFX_PACKED
103
104 #define COMPILER_NAME "TASKING"
105 #define COMPILER_VERSION __VERSION__
106
107 /* Note that __REVISION__ is only available for tasking compiler! */
108 #define COMPILER_REVISION __REVISION__
109
110 /******************************************************************************/
111
112 #if defined(IFX_USE_SW_MANAGED_INT)
113
114 #ifndef IFX_INTERRUPT
115 #define IFX_INTERRUPT(isr, vectabNum, prio) void isr(void)
116 #endif
117
118 #else
119 /* *INDENT-OFF* */
120 #ifndef IFX_INTERRUPT
121 #define IFX_INTERRUPT(isr, vectabNum, prio) IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio)
122 #endif
123 #define IFX_INTERRUPT_FAST(isr, vectabNum, prio) void __interrupt_fast(prio) __vector_table(vectabNum) isr(void)
124
125 #endif /*defined(IFX_USE_SW_MANAGED_INT)*/
126
127 #define IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio) void __interrupt(prio) __vector_table(vectabNum) isr(void)
128
129 /* *INDENT-ON* */
130
131 /******************************************************************************/
132
133 #define IFX_ALIGN(n) __attribute__ ((__align(n)))
134
135 /******************************************************************************/
136 /*Memory qualifiers*/
137 #ifndef IFX_FAR_ABS
138 #define IFX_FAR_ABS __far
139 #endif
140
141 #ifndef IFX_NEAR_ABS
142 #define IFX_NEAR_ABS __near
143 #endif
144
145 #ifndef IFX_REL_A0
146 #define IFX_REL_A0 __a0
147 #endif
148
149 #ifndef IFX_REL_A1
150 #define IFX_REL_A1 __a1
151 #endif
152
153 #ifndef IFX_REL_A8
154 #define IFX_REL_A8 __a8
155 #endif
156
157 #ifndef IFX_REL_A9
158 #define IFX_REL_A9 __a9
159 #endif
160 /******************************************************************************/
161
162 #endif /* COMPILERTASKING_H */


iLLD_TC38A: Compilers.h Source File

  • Infra
  • Platform
  • Tricore
  • Compilers
Compilers.h
Go to the documentation of this file.
1 /**
2 * \file Compilers.h
3 *
4 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
5 *
6 * $Date: 2014-04-07 12:13:19 GMT$
7 *
8 * IMPORTANT NOTICE
9 *
10 * Use of this file is subject to the terms of use agreed between (i) you or
11 * the company in which ordinary course of business you are acting and (ii)
12 * Infineon Technologies AG or its licensees. If and as long as no such terms
13 * of use are agreed, use of this file is subject to following:
14 *
15 * Boost Software License - Version 1.0 - August 17th, 2003
16 *
17 * Permission is hereby granted, free of charge, to any person or organization
18 * obtaining a copy of the software and accompanying documentation covered by
19 * this license (the "Software") to use, reproduce, display, distribute,
20 * execute, and transmit the Software, and to prepare derivative works of the
21 * Software, and to permit third-parties to whom the Software is furnished to
22 * do so, all subject to the following:
23 *
24 * The copyright notices in the Software and this entire statement, including
25 * the above license grant, this restriction and the following disclaimer, must
26 * be included in all copies of the Software, in whole or in part, and all
27 * derivative works of the Software, unless such copies or derivative works are
28 * solely in the form of machine-executable object code generated by a source
29 * language processor.
30 *
31 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
32 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
33 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
34 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
35 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
36 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
37 * DEALINGS IN THE SOFTWARE.
38 *
39 */
40
41 #ifndef COMPILERS_H
42 #define COMPILERS_H 1
43
44 /******************************************************************************/
45
46 #include "Ifx_Cfg.h"
47
48 /*this file shall not be modified by the user, IFX_XXXX defines shall be defined in Ifx_Cfg.h */
49 #ifndef IFX_STATIC
50 #define IFX_STATIC static
51 #endif
52
53 #ifndef IFX_CONST
54 #define IFX_CONST const
55 #endif
56 #ifndef CONST_CFG
57 #define CONST_CFG const /* configuration constants are stored in ROM */
58 #endif
59
60 #ifdef __cplusplus
61 #define IFX_EXTERN extern "C"
62 #else
63 #define IFX_EXTERN extern
64 #endif
65
66 #ifndef NULL_PTR
67 #ifdef __cplusplus
68 #define NULL_PTR (0)
69 #else /*#ifdef __cplusplus */
70 #define NULL_PTR ((void *)0)
71 #endif /*#ifdef __cplusplus */
72 #endif /*#ifndef NULL_PTR */
73
74 #ifndef CFG_LONG_SIZE_T
75 #define CFG_LONG_SIZE_T (0)
76 #endif
77
78 #if defined(__DCC__)
79 #include "CompilerDcc.h"
80
81 #elif defined(__HIGHTEC__)
82 #include "CompilerGnuc.h"
83
84 #elif defined(__TASKING__)
85 #include "CompilerTasking.h"
86
87 #elif defined(__ghs__)
88 #include "CompilerGhs.h"
89
90 #elif defined(__MSVC__)
91 #include "CompilerMsvc.h"
92
93 #else
94
95 /** \addtogroup IfxLld_Cpu_Std_Interrupt
96 * \{ */
97 /** \brief Macro to define Interrupt Service Routine.
98 * This macro makes following definitions:\n
99 * 1) Define linker section as .intvec_tc<vector number>_<interrupt priority>.\n
100 * 2) define compiler specific attribute for the interrupt functions.\n
101 * 3) define the Interrupt service routine as Isr function.\n
102 * To get details about usage of this macro, refer \ref IfxLld_Cpu_Irq_Usage
103 *
104 * \param isr Name of the Isr function.
105 * \param vectabNum Vector table number.
106 * \param prio Interrupt priority. Refer Usage of Interrupt Macro for more details.
107 */
108 #define IFX_INTERRUPT(isr, vectabNum, prio)
109
110 /** \} */
111 #error "Compiler unsupported"
112 #endif
113
114 #if defined(__HIGHTEC__)
115 #define BEGIN_DATA_SECTION(sec) DATA_SECTION(section #sec aw 4)
116 #define DATA_SECTION(sec) _Pragma(#sec)
117 #define END_DATA_SECTION DATA_SECTION(section)
118 #elif defined(__TASKING__)
119 #define BEGIN_DATA_SECTION(sec) DATA_SECTION(section farbss #sec)
120 #define DATA_SECTION(sec) _Pragma(#sec)
121 #define END_DATA_SECTION DATA_SECTION(section farbss align restore) \
122 DATA_SECTION(section farbss)
123 #elif defined(__DCC__)
124 #define BEGIN_DATA_SECTION(sec) DATA_SECTION(section #sec WX)
125 #define DATA_SECTION(sec) _Pragma(#sec)
126 #define END_DATA_SECTION DATA_SECTION(section DATA X)
127 #elif defined(__ghs__)
128 #define BEGIN_DATA_SECTION(sec) DATA_SECTION(section #sec WX)
129 #define DATA_SECTION(sec) _Pragma(#sec)
130 #define END_DATA_SECTION DATA_SECTION(section DATA X)
131 #else
132 #error "Please specify compiler."
133 #endif
134
135 /* Functions prototypes */
136 /******************************************************************************/
137 void Ifx_C_Init(void);
138 /******************************************************************************/
139
140
141 #endif /* COMPILERS_H */
CompilerTasking.h
CompilerGhs.h
CompilerDcc.h
CompilerGnuc.h
Ifx_C_Init
void Ifx_C_Init(void)


iLLD_TC38A: Icu.h Source File

  • Service
  • CpuGeneric
  • If
  • Ccu6If
Icu.h
Go to the documentation of this file.
1 /**
2 * \file Icu.h
3 * \brief ICU interface
4 *
5 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
6 *
7 * $Date: 2014-02-27 20:08:18 GMT$
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 * \defgroup library_srvsw_if_icu ICU interface
41 * \ingroup library_srvsw_if
42 *
43 */
44
45 #ifndef ICU_H_
46 #define ICU_H_ 1
47
48 #include "Cpu/Std/Ifx_Types.h"
49
50 typedef struct Icu_s Icu;
51 typedef void (*Icu_StartCapture)(Icu *handle);
52 typedef void (*Icu_StopCapture)(Icu *handle);
53 typedef void (*Icu_GetTimeStamp)(Icu *handle);
54
55 typedef struct
56 {
57 Icu_StartCapture startCapture;
58 Icu_StopCapture stopCapture;
59 Icu_GetTimeStamp getTimeStamp;
60 } Icu_Functions;
61
62 /** \brief Structure of the Icu interface */
63 struct Icu_s
64 {
65 float32 frequency; /**< \brief dummy member to avoid error */
66 #if IFX_CFG_USE_STANDARD_INTERFACE
67 Icu_Functions functions; /**< \brief Actual timer period */
68 #endif
69 };
70
71 /** \brief Configuration structure of the Icu interface */
72 typedef struct
73 {
74 float32 frequency; /**< \brief dummy member to avoid error */
75 // IfxCcu6_Timer *timer;
76 } Icu_Config;
77
78 #if IFX_CFG_USE_STANDARD_INTERFACE
79 IFX_INLINE void Icu_startCapture(Icu *handle) {handle->functions.startCapture(handle); }
80 IFX_INLINE void Icu_stopCapture(Icu *handle) {handle->functions.stopCapture(handle); }
81 IFX_INLINE void Icu_getTimeStamp(Icu *handle) {handle->functions.getTimeStamp(handle); }
82 #endif
83
84 #endif /* ICU_H_ */
Icu_Config
Configuration structure of the Icu interface.
Definition: Icu.h:72
Icu_Functions::stopCapture
Icu_StopCapture stopCapture
Definition: Icu.h:58
float32
float float32
Definition: Platform_Types.h:170
Icu_Functions
Definition: Icu.h:55
Icu_StartCapture
void(* Icu_StartCapture)(Icu *handle)
Definition: Icu.h:51
Icu_s::frequency
float32 frequency
dummy member to avoid error
Definition: Icu.h:65
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
Icu_Functions::startCapture
Icu_StartCapture startCapture
Definition: Icu.h:57
Icu_StopCapture
void(* Icu_StopCapture)(Icu *handle)
Definition: Icu.h:52
Icu_Functions::getTimeStamp
Icu_GetTimeStamp getTimeStamp
Definition: Icu.h:59
Icu_s
Structure of the Icu interface.
Definition: Icu.h:63
Icu_GetTimeStamp
void(* Icu_GetTimeStamp)(Icu *handle)
Definition: Icu.h:53


iLLD_TC38A: Ifx_AngleTrkF32.c Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_AngleTrkF32.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_AngleTrkF32.c
3 * \brief Angle-tracking observer for sin/cos analog position sensor
4 *
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 //________________________________________________________________________________________
44 // INCLUDES
45
46 #include "Ifx_AngleTrkF32.h"
47 #include <math.h>
48 #include "string.h"
49 #include "Ifx_LutAtan2F32.h"
50
51 //________________________________________________________________________________________
52 // LOCAL DEFINITIONS
53
54 #define IFX_ANGLETRKF32_ATAN2F Ifx_LutAtan2F32_float32
55
56 //________________________________________________________________________________________
57 // LOCAL FUNCTION PROTOTYPES
58
59 void Ifx_AngleTrkF32_setUserSampling(Ifx_AngleTrkF32 *aObsv, float32 Ts);
60
61 //________________________________________________________________________________________
62 // GLOBAL VARIABLES
63
64 //________________________________________________________________________________________
65 // LOCAL VARIABLES
66
67 //________________________________________________________________________________________
68 // LOCAL FUNCTION IMPLEMENTATIONS
69
70 IFX_INLINE float32 Ifx_AngleTrkF32_bound(float32 angle, float32 periodPerRotation)
71 {
72 IFX_UNUSED_PARAMETER(periodPerRotation);
73 float32 fullPeriod = 2 * IFX_PI;
74
75 if (angle >= (fullPeriod / 2))
76 {
77 angle = angle - fullPeriod;
78 }
79 else if (angle < (-fullPeriod / 2))
80 {
81 angle = angle + fullPeriod;
82 }
83 else
84 {}
85
86 return angle;
87 }
88
89
90 IFX_INLINE float32 Ifx_AngleTrkF32_boundInput(float32 input)
91 {
92 return Ifx_AngleTrkF32_bound(input, 1);
93 }
94
95
96 float32 round_f(float32 val)
97 {
98 /*lint -e632 -e633 -e524*/
99 sint32 val_i = (sint32)val;
100
101 /*lint +e632 +e633 +e524*/
102 if ((val - (float32)val_i) > 0.5)
103 {
104 val = (float32)(val_i + 1);
105 }
106 else
107 {
108 val = (float32)val_i;
109 }
110
111 return val;
112 }
113
114
115 //________________________________________________________________________________________
116 // PUBLIC FUNCTION IMPLEMENTATIONS
117 #define ATO_T (15e-3f)
118 #define ATO_K (39.05f)
119 #define ATO_PSI (1.5f * IFX_PI)
120
121 void Ifx_AngleTrkF32_setControlGains(Ifx_AngleTrkF32_CfgData *cfgData, float32 K, float32 T, float32 psi)
122 {
123 cfgData->kp = ((2 * K) + (psi * psi) + 1) / (T * T);
124 cfgData->ki = K * ((psi * psi) + 1) / (T * T * T);
125 cfgData->kd = (K + 2) / T;
126 }
127
128
129 /** \brief Fill config with default values */
130 void Ifx_AngleTrkF32_initConfig(Ifx_AngleTrkF32_Config *config, sint16 *sinIn, sint16 *cosIn)
131 {
132 Ifx_AngleTrkF32_CfgData cfgData;
133 Ifx_AngleTrkF32_setControlGains(&cfgData, ATO_K, ATO_T, ATO_PSI);
134 config->kp = cfgData.kp;
135 config->ki = cfgData.ki;
136 config->kd = cfgData.kd;
137 config->sinIn = sinIn;
138 config->cosIn = cosIn;
139 config->errorThreshold = 5.0f / 180 * IFX_PI;
140 config->sqrAmplMax = (sint32)((1.01f * 1.01f) * 2048);
141 config->sqrAmplMin = (sint32)((0.99f * 0.99f) * 2048);
142 config->speedLpfFc = 100;
143 config->periodPerRotation = 1;
144 config->reversed = FALSE;
145 config->offset = 0;
146 config->resolution = (1UL << 12);/** \brief 12-bit default resolution */
147 }
148
149
150 void Ifx_AngleTrkF32_setUserSampling(Ifx_AngleTrkF32 *aObsv, float32 Ts)
151 {
152 aObsv->base.Ts = Ts;
153 aObsv->halfTs = aObsv->base.Ts / 2.0F;
154 }
155
156
157 /** \brief Initialize the Angle Tracking object
158 * \param aObsv Pointer to the Ifx_AngleTrkF32 object
159 * \param config Pointer to the configuration data
160 * \param Ts sampling period in seconds
161 */
162 void Ifx_AngleTrkF32_init(Ifx_AngleTrkF32 *aObsv, const Ifx_AngleTrkF32_Config *config, float32 Ts)
163 {
164 aObsv->base.offset = config->offset;
165 aObsv->base.resolution = config->resolution;
166 aObsv->base.reversed = config->reversed;
167 aObsv->base.Ts = Ts;
168 aObsv->base.rawPosition = 0;
169 aObsv->base.direction = IfxStdIf_Pos_Dir_unknown;
170 aObsv->base.turn = 0;
171 aObsv->base.status.status = 0;
172 aObsv->base.periodPerRotation = config->periodPerRotation;
173 aObsv->base.positionConst = 1.0 / (float32)aObsv->base.resolution * 2.0 * IFX_PI;
174
175 aObsv->cfgData.kd = config->kd;
176 aObsv->cfgData.ki = config->ki;
177 aObsv->cfgData.kp = config->kp;
178 aObsv->cfgData.errorThreshold = config->errorThreshold;
179 aObsv->cfgData.sqrAmplMax = config->sqrAmplMax;
180 aObsv->cfgData.sqrAmplMin = config->sqrAmplMin;
181 aObsv->sinIn = config->sinIn;
182 aObsv->cosIn = config->cosIn;
183
184 if (!__neqf(config->kp, 0) && !__neqf(config->ki, 0) && !__neqf(config->kp, 0))
185 { /* all gains are zero, use default */
186 /* FIXME might not be requied as set by Ifx_AngleTrkF32_initConfig() */
187 Ifx_AngleTrkF32_setControlGains(&aObsv->cfgData, ATO_K, ATO_T, ATO_PSI);
188 }
189
190 Ifx_AngleTrkF32_setUserSampling(aObsv, Ts);
191 aObsv->angleErr = 0.0F;
192 aObsv->angleEst = 0.0F;
193 aObsv->accelEst = 0.0F;
194 aObsv->speedEstA = 0.0F;
195 aObsv->speedEstB = 0.0F;
196 aObsv->angleRef = 0.0F;
197 {
198 #if IFX_CFG_ANGLETRKF32_SPEED_FILTER
199 Ifx_LowPassPt1F32_Config lpfConfig;
200 lpfConfig.gain = 1.0F;
201 lpfConfig.cutOffFrequency = (2 * IFX_PI * config->speedLpfFc);
202 lpfConfig.samplingTime = Ts;
203 Ifx_LowPassPt1F32_init(&aObsv->speedLpf, &lpfConfig);
204 #endif
205 }
206 }
207
208
209 /** \brief Step function of Ifx_AngleTrkF32 should be called at every sampling period provided
210 * during initialisation (call to Ifx_AngleTrkF32_init()).
211 *
212 * \note This function is automatically called by Ifx_AngleTrkF32_update()
213 * \param aObsv Pointer to the Ifx_AngleTrkF32 object
214 * \param sinIn sine input signal. The offset shall be zero.
215 * \param cosIn cosine input signal. The offset shall be zero.
216 * \param phase phase of input signal.
217 * \note This function returns the angular position in radians
218 * \note The amplitude of both sinIn and cosIn signal shall be the same.
219 */
220 float32 Ifx_AngleTrkF32_step(Ifx_AngleTrkF32 *aObsv, sint16 sinIn, sint16 cosIn, float32 phase)
221 {
222 float32 angleRef, angleEst, dAccel, dSpeed, dAngle;
223
224 if (aObsv->base.reversed != FALSE)
225 {
226 angleRef = IFX_ANGLETRKF32_ATAN2F((float32)cosIn, (float32)sinIn);
227 }
228 else
229 {
230 angleRef = IFX_ANGLETRKF32_ATAN2F((float32)sinIn, (float32)cosIn);
231 }
232
233 aObsv->angleAtan = angleRef;
234 angleRef = angleRef + phase;
235
236 aObsv->angleRef = angleRef;
237
238 // Acceleration, zero-order-hold integrator:
239 dAccel = aObsv->cfgData.ki * aObsv->angleErr;
240 aObsv->accelEst = aObsv->accelEst + (dAccel * aObsv->base.Ts);
241
242 // Speed, zero-order-hold integrator:
243 dSpeed = ((aObsv->cfgData.kp * aObsv->angleErr) + aObsv->accelEst);
244 aObsv->speedEstA = aObsv->speedEstA + (dSpeed * aObsv->base.Ts);
245
246 // Angle, first-order-hold integrator:
247 dAngle = ((aObsv->cfgData.kd * aObsv->angleErr) + aObsv->speedEstA);
248 angleEst = aObsv->angleEst + ((dAngle + aObsv->speedEstB) * aObsv->halfTs);
249 aObsv->speedEstB = dAngle;
250
251 aObsv->angleEst = Ifx_AngleTrkF32_boundInput(angleEst);
252
253 // Error, is calculated here to compensate one period delay
254 aObsv->angleErr = Ifx_AngleTrkF32_boundInput(aObsv->angleRef - aObsv->angleEst);
255
256 aObsv->base.direction = aObsv->speedEstB > 0 ? IfxStdIf_Pos_Dir_forward : IfxStdIf_Pos_Dir_backward;
257
258 #if IFX_CFG_ANGLETRKF32_SPEED_FILTER
259 // Filter speed:
260 Ifx_LowPassPt1F32_do(&aObsv->speedLpf, aObsv->speedEstB);
261 #endif
262
263 return aObsv->angleEst;
264 }
265
266
267 /** \brief Set the position offset (in ticks)
268 * \param aObsv Pointer to the Ifx_AngleTrkF32 object
269 * \param offset Position offset in ticks
270 */
271 void Ifx_AngleTrkF32_setOffset(Ifx_AngleTrkF32 *aObsv, IfxStdIf_Pos_RawAngle offset)
272 {
273 Ifx_AngleTrkF32_PosIf *base = &aObsv->base;
274 base->offset = offset;
275 }
276
277
278 /** \brief Update the status flags.
279 * \param aObsv Pointer to the Ifx_AngleTrkF32 object
280 * \param sinIn Sinus value
281 * \param cosIn Cosinus value
282 * \note This function is automatically called by Ifx_AngleTrkF32_update()
283 */
284 void Ifx_AngleTrkF32_updateStatus(Ifx_AngleTrkF32 *aObsv, sint16 sinIn, sint16 cosIn)
285 {
286 Ifx_AngleTrkF32_PosIf *base = &aObsv->base;
287 sint32 sqrAmpl = ((sint32)sinIn * (sint32)sinIn) + ((sint32)cosIn * (sint32)cosIn);
288 base->status.B.signalLoss = (sqrAmpl < aObsv->cfgData.sqrAmplMin);
289 base->status.B.signalDegradation = (sqrAmpl > aObsv->cfgData.sqrAmplMax);
290 base->status.B.trackingLoss = __absf(aObsv->angleErr) > aObsv->cfgData.errorThreshold;
291 }
292
293
294 /** \brief Update the object directly from its analog input
295 * \param aObsv Pointer to the Ifx_AngleTrkF32 object
296 */
297 void Ifx_AngleTrkF32_update(Ifx_AngleTrkF32 *aObsv)
298 {
299 Ifx_AngleTrkF32_PosIf *base = &aObsv->base;
300 float32 angleEst = Ifx_AngleTrkF32_step(aObsv, *aObsv->sinIn, *aObsv->cosIn, 0);
301
302 IfxStdIf_Pos_RawAngle newPosition = (IfxStdIf_Pos_RawAngle)(angleEst * (aObsv->base.resolution / 2) / IFX_PI);
303 newPosition = newPosition & (aObsv->base.resolution - 1);
304 base->rawPosition = newPosition;
305
306 Ifx_AngleTrkF32_updateStatus(aObsv, *aObsv->sinIn, *aObsv->cosIn);
307 }
308
309
310 /** \brief Returns the actual position
311 * \param aObsv Pointer to the Ifx_AngleTrkF32 object
312 * \note This function returns the angular position in ticks [0 .. Ifx_AngleTrkF32.base.resolution-1] (represents 0..360 degree)
313 */
314 IfxStdIf_Pos_RawAngle Ifx_AngleTrkF32_getRawPosition(Ifx_AngleTrkF32 *aObsv)
315 {
316 Ifx_AngleTrkF32_PosIf *base = &aObsv->base;
317 return base->rawPosition;
318 }
319
320
321 /** \brief Returns the Speed
322 * \param aObsv Pointer to the Ifx_AngleTrkF32 object
323 */
324 float32 Ifx_AngleTrkF32_getSpeed(Ifx_AngleTrkF32 *aObsv)
325 {
326 #if !IFX_CFG_ANGLETRKF32_FILTERED_SPEED
327 return aObsv->speedEstB; /* note: using speedEstB has better dynamic */
328 #else
329 return aObsv->speedLpf.out; /* note: using filtered speed has less ripples */
330 #endif
331 }
332
333
334 /*>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/
335 float32 Ifx_AngleTrkF32_getAbsolutePosition(Ifx_AngleTrkF32 *driver)
336 {
337 return ((float32)driver->base.turn + (float32)driver->base.rawPosition / (float32)driver->base.resolution) * 2.0 * IFX_PI;
338 }
339
340
341 IfxStdIf_Pos_Dir Ifx_AngleTrkF32_getDirection(Ifx_AngleTrkF32 *driver)
342 {
343 return driver->base.direction;
344 }
345
346
347 IfxStdIf_Pos_Status Ifx_AngleTrkF32_getFault(Ifx_AngleTrkF32 *driver)
348 {
349 return driver->base.status;
350 }
351
352
353 sint32 Ifx_AngleTrkF32_getOffset(Ifx_AngleTrkF32 *driver)
354 {
355 return driver->base.offset;
356 }
357
358
359 uint16 Ifx_AngleTrkF32_getPeriodPerRotation(Ifx_AngleTrkF32 *driver)
360 {
361 return driver->base.periodPerRotation;
362 }
363
364
365 float32 Ifx_AngleTrkF32_getPosition(Ifx_AngleTrkF32 *driver)
366 {
367 return (float32)driver->base.rawPosition * driver->base.positionConst;
368 }
369
370
371 float32 Ifx_AngleTrkF32_getRefreshPeriod(Ifx_AngleTrkF32 *driver)
372 {
373 return driver->base.Ts;
374 }
375
376
377 sint32 Ifx_AngleTrkF32_getResolution(Ifx_AngleTrkF32 *driver)
378 {
379 return driver->base.resolution;
380 }
381
382
383 IfxStdIf_Pos_SensorType Ifx_AngleTrkF32_getSensorType(Ifx_AngleTrkF32 *driver)
384 {
385 IFX_UNUSED_PARAMETER(driver);
386 return IfxStdIf_Pos_SensorType_angletrk;
387 }
388
389
390 sint32 Ifx_AngleTrkF32_getTurn(Ifx_AngleTrkF32 *driver)
391 {
392 return driver->base.turn;
393 }
394
395
396 void Ifx_AngleTrkF32_resetFaults(Ifx_AngleTrkF32 *driver)
397 {
398 driver->base.status.status = 0;
399 }
400
401
402 void Ifx_AngleTrkF32_setRefreshPeriod(Ifx_AngleTrkF32 *driver, float32 updatePeriod)
403 {
404 driver->base.Ts = updatePeriod;
405 }
406
407
408 void Ifx_AngleTrkF32_reset(Ifx_AngleTrkF32 *driver)
409 {
410 driver->base.rawPosition = 0;
411 driver->base.direction = IfxStdIf_Pos_Dir_unknown;
412 driver->base.turn = 0;
413 driver->angleErr = 0.0F;
414 driver->angleEst = 0.0F;
415 driver->accelEst = 0.0F;
416 driver->speedEstA = 0.0F;
417 driver->speedEstB = 0.0F;
418 driver->angleRef = 0.0F;
419 #if IFX_CFG_ANGLETRKF32_SPEED_FILTER
420 Ifx_LowPassPt1F32_reset(&driver->speedLpf);
421 #endif
422
423 driver->base.status.status = 0;
424 }
425
426
427 boolean Ifx_AngleTrkF32_stdIfPosInit(IfxStdIf_Pos *stdif, Ifx_AngleTrkF32 *driver)
428 {
429 /* Ensure the stdif is reset to zeros */
430 memset(stdif, 0, sizeof(IfxStdIf_Pos));
431
432 /* Set the driver */
433 stdif->driver = driver;
434
435 /* *INDENT-OFF* Note: this file was indented manually by the author. */
436 /* Set the API link */
437 stdif->onZeroIrq =(IfxStdIf_Pos_OnZeroIrq )NULL_PTR;
438 stdif->getAbsolutePosition=(IfxStdIf_Pos_GetAbsolutePosition )&Ifx_AngleTrkF32_getAbsolutePosition;
439 stdif->getDirection =(IfxStdIf_Pos_GetDirection )&Ifx_AngleTrkF32_getDirection;
440 stdif->getFault =(IfxStdIf_Pos_GetFault )&Ifx_AngleTrkF32_getFault;
441 stdif->getOffset =(IfxStdIf_Pos_GetOffset )&Ifx_AngleTrkF32_getOffset;
442 stdif->getPeriodPerRotation =(IfxStdIf_Pos_GetPeriodPerRotation )&Ifx_AngleTrkF32_getPeriodPerRotation;
443 stdif->getPosition =(IfxStdIf_Pos_GetPosition )&Ifx_AngleTrkF32_getPosition;
444 stdif->getRawPosition =(IfxStdIf_Pos_GetRawPosition )&Ifx_AngleTrkF32_getRawPosition;
445 stdif->getRefreshPeriod =(IfxStdIf_Pos_GetRefreshPeriod )&Ifx_AngleTrkF32_getRefreshPeriod;
446 stdif->getResolution =(IfxStdIf_Pos_GetResolution )&Ifx_AngleTrkF32_getResolution;
447 stdif->getSensorType =(IfxStdIf_Pos_GetSensorType )&Ifx_AngleTrkF32_getSensorType;
448 stdif->reset =(IfxStdIf_Pos_Reset )&Ifx_AngleTrkF32_reset;
449 stdif->resetFaults =(IfxStdIf_Pos_ResetFaults )&Ifx_AngleTrkF32_resetFaults;
450 stdif->getSpeed =(IfxStdIf_Pos_GetSpeed )&Ifx_AngleTrkF32_getSpeed;
451 stdif->update =(IfxStdIf_Pos_Update )&Ifx_AngleTrkF32_update;
452 stdif->setPosition =(IfxStdIf_Pos_SetPosition )NULL_PTR;
453 stdif->setRawPosition =(IfxStdIf_Pos_SetRawPosition )NULL_PTR;
454 stdif->setSpeed =(IfxStdIf_Pos_SetSpeed )NULL_PTR;
455 stdif->setOffset =(IfxStdIf_Pos_SetOffset )&Ifx_AngleTrkF32_setOffset;
456 stdif->setRefreshPeriod =(IfxStdIf_Pos_SetRefreshPeriod )&Ifx_AngleTrkF32_setRefreshPeriod;
457 stdif->getTurn =(IfxStdIf_Pos_GetTurn )&Ifx_AngleTrkF32_getTurn;
458 /* *INDENT-ON* */
459
460 return TRUE;
461 }
Ifx_AngleTrkF32_resetFaults
void Ifx_AngleTrkF32_resetFaults(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:396
Ifx_AngleTrkF32_Config::periodPerRotation
uint16 periodPerRotation
Number of electrical periods per mechanical rotation.
Definition: Ifx_AngleTrkF32.h:82
Ifx_AngleTrkF32_update
void Ifx_AngleTrkF32_update(Ifx_AngleTrkF32 *aObsv)
Update the object directly from its analog input.
Definition: Ifx_AngleTrkF32.c:297
Ifx_AngleTrkF32_Config::offset
IfxStdIf_Pos_RawAngle offset
Offset in ticks. [0 .. (Ifx_AngleTrkF32_Config::resolution - 1)].
Definition: Ifx_AngleTrkF32.h:85
Ifx_AngleTrkF32_getRawPosition
IfxStdIf_Pos_RawAngle Ifx_AngleTrkF32_getRawPosition(Ifx_AngleTrkF32 *aObsv)
Returns the actual position.
Definition: Ifx_AngleTrkF32.c:314
Ifx_AngleTrkF32_getAbsolutePosition
float32 Ifx_AngleTrkF32_getAbsolutePosition(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:335
IfxStdIf_Pos_GetRefreshPeriod
float32(* IfxStdIf_Pos_GetRefreshPeriod)(IfxStdIf_InterfaceDriver stdIf)
Get the update period.
Definition: IfxStdIf_Pos.h:187
round_f
float32 round_f(float32 val)
Definition: Ifx_AngleTrkF32.c:96
Ifx_AngleTrkF32_initConfig
void Ifx_AngleTrkF32_initConfig(Ifx_AngleTrkF32_Config *config, sint16 *sinIn, sint16 *cosIn)
Fill config with default values.
Definition: Ifx_AngleTrkF32.c:130
__neqf
#define __neqf
Definition: IfxCpu_IntrinsicsDcc.h:1665
IfxStdIf_Pos_::setRefreshPeriod
IfxStdIf_Pos_SetRefreshPeriod setRefreshPeriod
Definition: IfxStdIf_Pos.h:307
Ifx_LowPassPt1F32::out
float32 out
last output
Definition: Ifx_LowPassPt1F32.h:65
ATO_K
#define ATO_K
Definition: Ifx_AngleTrkF32.c:118
IfxStdIf_Pos_GetOffset
sint32(* IfxStdIf_Pos_GetOffset)(IfxStdIf_InterfaceDriver stdIf)
Return the raw position sensor offset.
Definition: IfxStdIf_Pos.h:139
Ifx_LowPassPt1F32_do
float32 Ifx_LowPassPt1F32_do(Ifx_LowPassPt1F32 *filter, float32 input)
Execute the low pass filter.
Definition: Ifx_LowPassPt1F32.c:73
Ifx_AngleTrkF32::angleAtan
float32 angleAtan
Definition: Ifx_AngleTrkF32.h:123
Ifx_AngleTrkF32::base
Ifx_AngleTrkF32_PosIf base
Definition: Ifx_AngleTrkF32.h:118
IfxStdIf_Pos_SetRawPosition
void(* IfxStdIf_Pos_SetRawPosition)(IfxStdIf_InterfaceDriver stdIf, sint32 position)
Set the sensor position (virtual sensor)
Definition: IfxStdIf_Pos.h:265
IfxStdIf_Pos_SensorType_angletrk
Definition: IfxStdIf_Pos.h:86
IfxStdIf_Pos_::setOffset
IfxStdIf_Pos_SetOffset setOffset
Definition: IfxStdIf_Pos.h:303
IfxStdIf_Pos_::setPosition
IfxStdIf_Pos_SetPosition setPosition
Definition: IfxStdIf_Pos.h:304
IfxStdIf_Pos_GetSpeed
float32(* IfxStdIf_Pos_GetSpeed)(IfxStdIf_InterfaceDriver stdIf)
Return the speed.
Definition: IfxStdIf_Pos.h:205
Ifx_AngleTrkF32_CfgData::kd
float32 kd
Derivative gain.
Definition: Ifx_AngleTrkF32.h:94
Ifx_AngleTrkF32_getResolution
sint32 Ifx_AngleTrkF32_getResolution(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:377
Ifx_AngleTrkF32::angleEst
float32 angleEst
Definition: Ifx_AngleTrkF32.h:125
IfxStdIf_Pos_::driver
IfxStdIf_InterfaceDriver driver
Interface driver object.
Definition: IfxStdIf_Pos.h:285
IfxStdIf_Pos_Dir_unknown
Unknown direction.
Definition: IfxStdIf_Pos.h:96
memset
void * memset(void *s, int c, syze_t n)
Ifx_AngleTrkF32_CfgData::ki
float32 ki
Integrator gain.
Definition: Ifx_AngleTrkF32.h:93
Ifx_AngleTrkF32_PosIf::rawPosition
IfxStdIf_Pos_RawAngle rawPosition
raw position in ticks.
Definition: Ifx_AngleTrkF32.h:102
Ifx_AngleTrkF32_Config::sqrAmplMax
sint32 sqrAmplMax
Maximum value for square of signal amplitudes.
Definition: Ifx_AngleTrkF32.h:80
float32
float float32
Definition: Platform_Types.h:170
Ifx_AngleTrkF32::angleErr
float32 angleErr
Definition: Ifx_AngleTrkF32.h:129
IfxStdIf_Pos_::getRawPosition
IfxStdIf_Pos_GetRawPosition getRawPosition
Definition: IfxStdIf_Pos.h:292
IfxStdIf_Pos_::getPeriodPerRotation
IfxStdIf_Pos_GetPeriodPerRotation getPeriodPerRotation
Definition: IfxStdIf_Pos.h:293
IfxStdIf_Pos_Status::status
uint32 status
Global status access.
Definition: IfxStdIf_Pos.h:102
Ifx_AngleTrkF32_Config::resolution
sint32 resolution
Sensor resolution.
Definition: Ifx_AngleTrkF32.h:84
Ifx_LowPassPt1F32_reset
IFX_INLINE void Ifx_LowPassPt1F32_reset(Ifx_LowPassPt1F32 *filter)
Reset the internal filter variable.
Definition: Ifx_LowPassPt1F32.h:90
IfxStdIf_Pos_RawAngle
sint32 IfxStdIf_Pos_RawAngle
Definition: IfxStdIf_Pos.h:113
IfxStdIf_Pos_::getSensorType
IfxStdIf_Pos_GetSensorType getSensorType
Definition: IfxStdIf_Pos.h:296
Ifx_AngleTrkF32_boundInput
IFX_INLINE float32 Ifx_AngleTrkF32_boundInput(float32 input)
Definition: Ifx_AngleTrkF32.c:90
Ifx_AngleTrkF32_init
void Ifx_AngleTrkF32_init(Ifx_AngleTrkF32 *aObsv, const Ifx_AngleTrkF32_Config *config, float32 Ts)
Initialize the Angle Tracking object.
Definition: Ifx_AngleTrkF32.c:162
IfxStdIf_Pos_::getDirection
IfxStdIf_Pos_GetDirection getDirection
Definition: IfxStdIf_Pos.h:290
Ifx_AngleTrkF32_getFault
IfxStdIf_Pos_Status Ifx_AngleTrkF32_getFault(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:347
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxStdIf_Pos_OnZeroIrq
void(* IfxStdIf_Pos_OnZeroIrq)(IfxStdIf_InterfaceDriver stdIf)
Handles the zero interrupt.
Definition: IfxStdIf_Pos.h:132
Ifx_AngleTrkF32_step
float32 Ifx_AngleTrkF32_step(Ifx_AngleTrkF32 *aObsv, sint16 sinIn, sint16 cosIn, float32 phase)
Step function of Ifx_AngleTrkF32 should be called at every sampling period provided during initialisa...
Definition: Ifx_AngleTrkF32.c:220
Ifx_AngleTrkF32_getSensorType
IfxStdIf_Pos_SensorType Ifx_AngleTrkF32_getSensorType(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:383
IfxStdIf_Pos_::setRawPosition
IfxStdIf_Pos_SetRawPosition setRawPosition
Definition: IfxStdIf_Pos.h:305
FALSE
#define FALSE
Definition: Platform_Types.h:93
Ifx_AngleTrkF32::speedEstB
float32 speedEstB
Definition: Ifx_AngleTrkF32.h:127
Ifx_AngleTrkF32_CfgData::kp
float32 kp
Proportional gain.
Definition: Ifx_AngleTrkF32.h:92
IfxStdIf_Pos_::getRefreshPeriod
IfxStdIf_Pos_GetRefreshPeriod getRefreshPeriod
Definition: IfxStdIf_Pos.h:294
IfxStdIf_Pos_Status::B
struct IfxStdIf_Pos_Status::@0 B
Bitfielf status access.
Ifx_AngleTrkF32.h
Angle-tracking observer for sin/cos analog position sensor.
Ifx_AngleTrkF32_Config::sinIn
sint16 * sinIn
Pointer to SIN input variable.
Definition: Ifx_AngleTrkF32.h:86
Ifx_AngleTrkF32_Config::errorThreshold
float32 errorThreshold
Threshold of error value in the tracking loop.
Definition: Ifx_AngleTrkF32.h:79
Ifx_AngleTrkF32_getDirection
IfxStdIf_Pos_Dir Ifx_AngleTrkF32_getDirection(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:341
IfxStdIf_Pos_::getPosition
IfxStdIf_Pos_GetPosition getPosition
Definition: IfxStdIf_Pos.h:289
sint16
short sint16
Definition: Platform_Types.h:129
Ifx_AngleTrkF32::cfgData
Ifx_AngleTrkF32_CfgData cfgData
Definition: Ifx_AngleTrkF32.h:119
IFX_PI
#define IFX_PI
Definition: Ifx_Types.h:217
IfxStdIf_Pos_::getFault
IfxStdIf_Pos_GetFault getFault
Definition: IfxStdIf_Pos.h:291
Ifx_AngleTrkF32_bound
IFX_INLINE float32 Ifx_AngleTrkF32_bound(float32 angle, float32 periodPerRotation)
Definition: Ifx_AngleTrkF32.c:70
__absf
#define __absf
Definition: IfxCpu_IntrinsicsDcc.h:1629
IfxStdIf_Pos_GetSensorType
IfxStdIf_Pos_SensorType(* IfxStdIf_Pos_GetSensorType)(IfxStdIf_InterfaceDriver stdIf)
Get the sensor type.
Definition: IfxStdIf_Pos.h:199
Ifx_AngleTrkF32_reset
void Ifx_AngleTrkF32_reset(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:408
IfxStdIf_Pos_SetPosition
void(* IfxStdIf_Pos_SetPosition)(IfxStdIf_InterfaceDriver stdIf, float32 position)
Set the sensor position (virtual sensor)
Definition: IfxStdIf_Pos.h:259
IfxStdIf_Pos_GetRawPosition
sint32(* IfxStdIf_Pos_GetRawPosition)(IfxStdIf_InterfaceDriver stdIf)
Return the raw position in ticks.
Definition: IfxStdIf_Pos.h:181
Ifx_AngleTrkF32::halfTs
float32 halfTs
Definition: Ifx_AngleTrkF32.h:122
Ifx_LowPassPt1F32_init
void Ifx_LowPassPt1F32_init(Ifx_LowPassPt1F32 *filter, const Ifx_LowPassPt1F32_Config *config)
Set the low pass filter configuration.
Definition: Ifx_LowPassPt1F32.c:55
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
Ifx_AngleTrkF32_setControlGains
void Ifx_AngleTrkF32_setControlGains(Ifx_AngleTrkF32_CfgData *cfgData, float32 K, float32 T, float32 psi)
Definition: Ifx_AngleTrkF32.c:121
IfxStdIf_Pos_GetDirection
IfxStdIf_Pos_Dir(* IfxStdIf_Pos_GetDirection)(IfxStdIf_InterfaceDriver stdIf)
Return the direction.
Definition: IfxStdIf_Pos.h:158
Ifx_AngleTrkF32_getTurn
sint32 Ifx_AngleTrkF32_getTurn(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:390
Ifx_AngleTrkF32_PosIf::resolution
IfxStdIf_Pos_RawAngle resolution
resolution of this position sensor interface
Definition: Ifx_AngleTrkF32.h:110
IfxStdIf_Pos_SetRefreshPeriod
void(* IfxStdIf_Pos_SetRefreshPeriod)(IfxStdIf_InterfaceDriver stdIf, float32 updatePeriod)
Set the update period.
Definition: IfxStdIf_Pos.h:279
Ifx_AngleTrkF32_Config
Angle Tracking Observer configuration.
Definition: Ifx_AngleTrkF32.h:73
Ifx_AngleTrkF32_Config::speedLpfFc
float32 speedLpfFc
Cut-off frequency of speed low-pass filter.
Definition: Ifx_AngleTrkF32.h:78
IfxStdIf_Pos_Dir
IfxStdIf_Pos_Dir
Position sensor direction definition.
Definition: IfxStdIf_Pos.h:92
IfxStdIf_Pos_GetPeriodPerRotation
uint16(* IfxStdIf_Pos_GetPeriodPerRotation)(IfxStdIf_InterfaceDriver stdIf)
Return the period per rotation setting.
Definition: IfxStdIf_Pos.h:172
IfxStdIf_Pos_Dir_backward
Backward direction. For rotating position sensor, fackward is counter-clockwise rotation.
Definition: IfxStdIf_Pos.h:95
IfxStdIf_Pos_::getResolution
IfxStdIf_Pos_GetResolution getResolution
Definition: IfxStdIf_Pos.h:295
Ifx_AngleTrkF32_setRefreshPeriod
void Ifx_AngleTrkF32_setRefreshPeriod(Ifx_AngleTrkF32 *driver, float32 updatePeriod)
Definition: Ifx_AngleTrkF32.c:402
IfxStdIf_Pos_
Standard interface object.
Definition: IfxStdIf_Pos.h:283
Ifx_AngleTrkF32_Config::reversed
boolean reversed
TRUE: reversed direction, FALSE: straight direction.
Definition: Ifx_AngleTrkF32.h:83
ATO_PSI
#define ATO_PSI
Definition: Ifx_AngleTrkF32.c:119
IfxStdIf_Pos_Dir_forward
Forward direction. For rotating position sensor, forward is clockwise rotation.
Definition: IfxStdIf_Pos.h:94
IfxStdIf_Pos_SensorType
IfxStdIf_Pos_SensorType
Position sensor Types.
Definition: IfxStdIf_Pos.h:81
Ifx_LutAtan2F32.h
Floating point signal, vector, and matrix library.
Ifx_AngleTrkF32_PosIf::turn
sint32 turn
number of mechanical turns. FIXME to be implemented
Definition: Ifx_AngleTrkF32.h:103
IfxStdIf_Pos_GetFault
IfxStdIf_Pos_Status(* IfxStdIf_Pos_GetFault)(IfxStdIf_InterfaceDriver stdIf)
Return the sensor status.
Definition: IfxStdIf_Pos.h:165
Ifx_AngleTrkF32_setUserSampling
void Ifx_AngleTrkF32_setUserSampling(Ifx_AngleTrkF32 *aObsv, float32 Ts)
Definition: Ifx_AngleTrkF32.c:150
Ifx_AngleTrkF32_stdIfPosInit
boolean Ifx_AngleTrkF32_stdIfPosInit(IfxStdIf_Pos *stdif, Ifx_AngleTrkF32 *driver)
Initializes the standard interface "Pos".
Definition: Ifx_AngleTrkF32.c:427
Ifx_AngleTrkF32_getRefreshPeriod
float32 Ifx_AngleTrkF32_getRefreshPeriod(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:371
Ifx_LowPassPt1F32_Config::samplingTime
float32 samplingTime
Sampling time.
Definition: Ifx_LowPassPt1F32.h:73
Ifx_AngleTrkF32::angleRef
float32 angleRef
Definition: Ifx_AngleTrkF32.h:124
Ifx_AngleTrkF32::speedLpf
Ifx_LowPassPt1F32 speedLpf
Definition: Ifx_AngleTrkF32.h:130
Ifx_AngleTrkF32_getSpeed
float32 Ifx_AngleTrkF32_getSpeed(Ifx_AngleTrkF32 *aObsv)
Returns the Speed.
Definition: Ifx_AngleTrkF32.c:324
IfxStdIf_Pos_SetSpeed
void(* IfxStdIf_Pos_SetSpeed)(IfxStdIf_InterfaceDriver stdIf, float32 speed)
Set the sensor speed (virtual sensor)
Definition: IfxStdIf_Pos.h:272
IfxStdIf_Pos_::getSpeed
IfxStdIf_Pos_GetSpeed getSpeed
Definition: IfxStdIf_Pos.h:301
IfxStdIf_Pos_SetOffset
void(* IfxStdIf_Pos_SetOffset)(IfxStdIf_InterfaceDriver stdIf, sint32 offset)
Set the sensor offset.
Definition: IfxStdIf_Pos.h:252
Ifx_AngleTrkF32
Angle Tracking Observer object.
Definition: Ifx_AngleTrkF32.h:116
IfxStdIf_Pos_Reset
void(* IfxStdIf_Pos_Reset)(IfxStdIf_InterfaceDriver stdIf)
Reset the driver.
Definition: IfxStdIf_Pos.h:236
Ifx_AngleTrkF32_PosIf
Definition: Ifx_AngleTrkF32.h:100
Ifx_AngleTrkF32_CfgData
Definition: Ifx_AngleTrkF32.h:90
Ifx_AngleTrkF32_Config::cosIn
sint16 * cosIn
Pointer to COS input variable.
Definition: Ifx_AngleTrkF32.h:87
IfxStdIf_Pos_::getOffset
IfxStdIf_Pos_GetOffset getOffset
Definition: IfxStdIf_Pos.h:288
uint16
unsigned short uint16
Definition: Platform_Types.h:112
Ifx_AngleTrkF32_getPeriodPerRotation
uint16 Ifx_AngleTrkF32_getPeriodPerRotation(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:359
ATO_T
#define ATO_T
Definition: Ifx_AngleTrkF32.c:117
IfxStdIf_Pos_::getAbsolutePosition
IfxStdIf_Pos_GetAbsolutePosition getAbsolutePosition
Return the absolute position.
Definition: IfxStdIf_Pos.h:287
Ifx_AngleTrkF32::accelEst
float32 accelEst
Definition: Ifx_AngleTrkF32.h:128
Ifx_AngleTrkF32_PosIf::Ts
float32 Ts
update period in seconds
Definition: Ifx_AngleTrkF32.h:111
IfxStdIf_Pos_::update
IfxStdIf_Pos_Update update
Definition: IfxStdIf_Pos.h:302
IfxStdIf_Pos_GetTurn
sint32(* IfxStdIf_Pos_GetTurn)(IfxStdIf_InterfaceDriver stdIf)
Return position in turn.
Definition: IfxStdIf_Pos.h:211
sint32
long sint32
Definition: Platform_Types.h:134
Ifx_AngleTrkF32_PosIf::direction
IfxStdIf_Pos_Dir direction
rotation direction
Definition: Ifx_AngleTrkF32.h:104
Ifx_LowPassPt1F32_Config::cutOffFrequency
float32 cutOffFrequency
Cut off frequency.
Definition: Ifx_LowPassPt1F32.h:71
IfxStdIf_Pos_GetAbsolutePosition
float32(* IfxStdIf_Pos_GetAbsolutePosition)(IfxStdIf_InterfaceDriver stdIf)
Return the position, inclusive turns.
Definition: IfxStdIf_Pos.h:126
Ifx_AngleTrkF32_PosIf::status
IfxStdIf_Pos_Status status
error code (0 = no error)
Definition: Ifx_AngleTrkF32.h:105
IfxStdIf_Pos_::resetFaults
IfxStdIf_Pos_ResetFaults resetFaults
Definition: IfxStdIf_Pos.h:300
IfxStdIf_Pos_Update
void(* IfxStdIf_Pos_Update)(IfxStdIf_InterfaceDriver stdIf)
Refresh the status.
Definition: IfxStdIf_Pos.h:227
IFX_ANGLETRKF32_ATAN2F
#define IFX_ANGLETRKF32_ATAN2F
Definition: Ifx_AngleTrkF32.c:54
IfxStdIf_Pos_::onZeroIrq
IfxStdIf_Pos_OnZeroIrq onZeroIrq
Definition: IfxStdIf_Pos.h:286
Ifx_AngleTrkF32_getOffset
sint32 Ifx_AngleTrkF32_getOffset(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:353
Ifx_AngleTrkF32_Config::sqrAmplMin
sint32 sqrAmplMin
Minimum value for square of signal amplitudes.
Definition: Ifx_AngleTrkF32.h:81
Ifx_AngleTrkF32_getPosition
float32 Ifx_AngleTrkF32_getPosition(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:365
IfxStdIf_Pos_Status
Position sensor status definition.
Definition: IfxStdIf_Pos.h:100
Ifx_LowPassPt1F32_Config::gain
float32 gain
Gain.
Definition: Ifx_LowPassPt1F32.h:72
Ifx_LowPassPt1F32_Config
PT1 configuration.
Definition: Ifx_LowPassPt1F32.h:69
TRUE
#define TRUE
Definition: Platform_Types.h:90
Ifx_AngleTrkF32::speedEstA
float32 speedEstA
Definition: Ifx_AngleTrkF32.h:126
IfxStdIf_Pos_::getTurn
IfxStdIf_Pos_GetTurn getTurn
Definition: IfxStdIf_Pos.h:297
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
IfxStdIf_Pos_::reset
IfxStdIf_Pos_Reset reset
Definition: IfxStdIf_Pos.h:299
IfxStdIf_Pos_GetPosition
float32(* IfxStdIf_Pos_GetPosition)(IfxStdIf_InterfaceDriver stdIf)
Return the position.
Definition: IfxStdIf_Pos.h:149
IfxStdIf_Pos_GetResolution
sint32(* IfxStdIf_Pos_GetResolution)(IfxStdIf_InterfaceDriver stdIf)
Get the resolution.
Definition: IfxStdIf_Pos.h:193
IfxStdIf_Pos_ResetFaults
void(* IfxStdIf_Pos_ResetFaults)(IfxStdIf_InterfaceDriver stdIf)
Reset the driver fault.
Definition: IfxStdIf_Pos.h:245
IfxStdIf_Pos_::setSpeed
IfxStdIf_Pos_SetSpeed setSpeed
Definition: IfxStdIf_Pos.h:306
Ifx_AngleTrkF32_setOffset
void Ifx_AngleTrkF32_setOffset(Ifx_AngleTrkF32 *aObsv, IfxStdIf_Pos_RawAngle offset)
Set the position offset (in ticks)
Definition: Ifx_AngleTrkF32.c:271
Ifx_AngleTrkF32_PosIf::positionConst
float32 positionConst
constant for calculating mechanical position (in rad) from raw position
Definition: Ifx_AngleTrkF32.h:112
Ifx_AngleTrkF32_updateStatus
void Ifx_AngleTrkF32_updateStatus(Ifx_AngleTrkF32 *aObsv, sint16 sinIn, sint16 cosIn)
Update the status flags.
Definition: Ifx_AngleTrkF32.c:284


iLLD_TC38A: Ifx_AngleTrkF32.h Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_AngleTrkF32.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_AngleTrkF32.h
3 * \brief Angle-tracking observer for sin/cos analog position sensor
4 *
5 *
6 *
7 * \version disabled
8 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 * \defgroup library_srvsw_sysse_math_f32_angletrk Angle-Tracking Observer
43 * This driver implements \ref library_srvsw_stdif_posif using 3rd order Angle-Tracking Observer algorithm.
44 * \ingroup library_srvsw_sysse_math_f32
45 *
46 */
47
48 #ifndef IFX_ANGLETRKF32_H
49 #define IFX_ANGLETRKF32_H
50
51 //________________________________________________________________________________________
52 // INCLUDES
53
54 #include "StdIf/IfxStdIf_Pos.h"
55 #include "SysSe/Math/Ifx_LowPassPt1F32.h"
56
57 //________________________________________________________________________________________
58 // CONFIGURATION DEFINES
59
60 #ifndef IFX_CFG_ANGLETRKF32_SPEED_FILTER
61 #define IFX_CFG_ANGLETRKF32_SPEED_FILTER (1)
62 #endif
63
64 /** \brief Specify whether the speed reading is filtered by low-pass filter or not */
65 #ifndef IFX_CFG_ANGLETRKF32_FILTERED_SPEED
66 #define IFX_CFG_ANGLETRKF32_FILTERED_SPEED (1)
67 #endif
68
69 //________________________________________________________________________________________
70 // DATA STRUCTURES
71
72 /** \brief Angle Tracking Observer configuration */
73 typedef struct
74 {
75 float32 kp; /**< \brief Proportional gain */
76 float32 ki; /**< \brief Integrator gain */
77 float32 kd; /**< \brief Derivative gain */
78 float32 speedLpfFc; /**< \brief Cut-off frequency of speed low-pass filter. */
79 float32 errorThreshold; /**< \brief Threshold of error value in the tracking loop */
80 sint32 sqrAmplMax; /**< \brief Maximum value for square of signal amplitudes */
81 sint32 sqrAmplMin; /**< \brief Minimum value for square of signal amplitudes */
82 uint16 periodPerRotation; /**< \brief Number of electrical periods per mechanical rotation */
83 boolean reversed; /**< \brief TRUE: reversed direction, FALSE: straight direction */
84 sint32 resolution; /**< \brief Sensor resolution */
85 IfxStdIf_Pos_RawAngle offset; /**< \brief Offset in ticks. [0 .. (\ref Ifx_AngleTrkF32_Config.resolution - 1)] */
86 sint16 *sinIn; /**< \brief Pointer to SIN input variable */
87 sint16 *cosIn; /**< \brief Pointer to COS input variable */
88 } Ifx_AngleTrkF32_Config;
89
90 typedef struct
91 {
92 float32 kp; /**< \brief Proportional gain */
93 float32 ki; /**< \brief Integrator gain */
94 float32 kd; /**< \brief Derivative gain */
95 float32 errorThreshold; /**< \brief Threshold of error value in the tracking loop */
96 sint32 sqrAmplMax; /**< \brief Maximum value for square of signal amplitudes */
97 sint32 sqrAmplMin; /**< \brief Minimum value for square of signal amplitudes */
98 } Ifx_AngleTrkF32_CfgData;
99
100 typedef struct
101 {
102 IfxStdIf_Pos_RawAngle rawPosition; /**< \brief raw position in ticks. \note: the value already contains the offset */
103 sint32 turn; /**< \brief number of mechanical turns. FIXME to be implemented */
104 IfxStdIf_Pos_Dir direction; /**< \brief rotation direction */
105 IfxStdIf_Pos_Status status; /**< \brief error code (0 = no error) */
106 /* configuration */
107 IfxStdIf_Pos_RawAngle offset; /**< \brief raw position offset */
108 boolean reversed; /**< \brief reverse direction */
109 uint16 periodPerRotation; /**< \brief sensor 'electrical' periods per mechanical rotation */
110 IfxStdIf_Pos_RawAngle resolution; /**< \brief resolution of this position sensor interface */
111 float32 Ts; /**< \brief update period in seconds */
112 float32 positionConst; /**< \brief constant for calculating mechanical position (in rad) from raw position */
113 } Ifx_AngleTrkF32_PosIf;
114
115 /** \brief Angle Tracking Observer object */
116 typedef struct
117 {
118 Ifx_AngleTrkF32_PosIf base;
119 Ifx_AngleTrkF32_CfgData cfgData;
120 sint16 *sinIn; /**< \brief Pointer to SIN input variable */
121 sint16 *cosIn; /**< \brief Pointer to COS input variable */
122 float32 halfTs;
123 float32 angleAtan;
124 float32 angleRef;
125 float32 angleEst;
126 float32 speedEstA;
127 float32 speedEstB;
128 float32 accelEst;
129 float32 angleErr;
130 Ifx_LowPassPt1F32 speedLpf; /**< Only used if IFX_CFG_ANGLETRKF32_SPEED_FILTER is set */
131 } Ifx_AngleTrkF32;
132
133 /** \addtogroup library_srvsw_sysse_math_f32_angletrk
134 * \{ */
135
136 //________________________________________________________________________________________
137 // PUBLIC FUNCTION PROTOTYPES
138
139 /** \name Initialisation functions
140 * Example use:
141 * \code
142 * extern sint16 g_SinInput, g_CosInput;
143 * Ifx_AngleTrkF32_Config driverConfig;
144 * Ifx_AngleTrkF32 driverData;
145 * Ifx_AngleTrkF32_initConfig(&driverConfig, &g_SinInput, g_CosInput);
146 * driverConfig.errorThreshold = 5.0 / 180 * IFX_PI; // 5 degree error
147 * driverConfig.sqrAmplMax = 1.01 * 1.01;
148 * driverConfig.sqrAmplMin = 0.99 * 0.99;
149 * driverConfig.speedLpfFc = 100;
150 * driverConfig.periodPerRotation = 1;
151 * driverConfig.reversed = FALSE;
152 * driverConfig.offset = 0;
153 * Ifx_AngleTrkF32_init(&driverData, &driverConfig);
154 * \endcode
155 * Prototypes:
156 * \{ */
157 IFX_EXTERN void Ifx_AngleTrkF32_init(Ifx_AngleTrkF32 *aObsv, const Ifx_AngleTrkF32_Config *config, float32 Ts);
158 IFX_EXTERN void Ifx_AngleTrkF32_initConfig(Ifx_AngleTrkF32_Config *config, sint16 *sinIn, sint16 *cosIn);
159 /** \} */
160
161 /** \name Protected functions
162 * These functions are not for end-user but may be used by another driver which extends
163 * the functionality of library_srvsw_sysse_math_f32_angletrk
164 * \{ */
165 IFX_EXTERN float32 Ifx_AngleTrkF32_step(Ifx_AngleTrkF32 *aObsv, sint16 sinIn, sint16 cosIn, float32 phase);
166 IFX_EXTERN void Ifx_AngleTrkF32_updateStatus(Ifx_AngleTrkF32 *aObsv, sint16 sinIn, sint16 cosIn);
167 IFX_INLINE float32 Ifx_AngleTrkF32_getLoopSpeed(Ifx_AngleTrkF32 *aObsv);
168 /** \} */
169
170 /** \} */
171
172 /** \brief get the speed.
173 * \param aObsv Pointer to the Ifx_AngleTrkF32 object
174 */
175 IFX_INLINE float32 Ifx_AngleTrkF32_getLoopSpeed(Ifx_AngleTrkF32 *aObsv)
176 {
177 return aObsv->speedEstB; /* note: using speedEstB has better dynamic */
178 /* return aObsv->speedLpf.out; */
179 }
180
181
182 /** \addtogroup library_srvsw_sysse_math_f32_angletrk
183 * \{ */
184
185 /******************************************************************************/
186 /*-------------------------Global Function Prototypes-------------------------*/
187 /******************************************************************************/
188
189 /** \brief \see IfxStdIf_Pos_GetAbsolutePosition
190 * \param driver driver handle
191 * \return absolute position
192 */
193 IFX_EXTERN float32 Ifx_AngleTrkF32_getAbsolutePosition(Ifx_AngleTrkF32 *driver);
194
195 /** \brief \see IfxStdIf_Pos_GetDirection
196 * \param driver driver handle
197 * \return direction
198 */
199 IFX_EXTERN IfxStdIf_Pos_Dir Ifx_AngleTrkF32_getDirection(Ifx_AngleTrkF32 *driver);
200
201 /** \brief \see IfxStdIf_Pos_GetFault
202 * \param driver driver handle
203 * \return Fault
204 */
205 IFX_EXTERN IfxStdIf_Pos_Status Ifx_AngleTrkF32_getFault(Ifx_AngleTrkF32 *driver);
206
207 /** \brief \see IfxStdIf_Pos_GetOffset
208 * \param driver driver handle
209 * \return offset address
210 */
211 IFX_EXTERN sint32 Ifx_AngleTrkF32_getOffset(Ifx_AngleTrkF32 *driver);
212
213 /** \brief \see IfxStdIf_Pos_GetPeriodPerRotation
214 * \param driver driver handle
215 * \return Period per rotation
216 */
217 IFX_EXTERN uint16 Ifx_AngleTrkF32_getPeriodPerRotation(Ifx_AngleTrkF32 *driver);
218
219 /** \brief \see IfxStdIf_Pos_GetPosition
220 * \param driver driver handle
221 * \return position
222 */
223 IFX_EXTERN float32 Ifx_AngleTrkF32_getPosition(Ifx_AngleTrkF32 *driver);
224
225 /** \brief \see IfxStdIf_Pos_GetRawPosition
226 * \param aObsv Pointer to the Ifx_AngleTrkF32 object
227 * \return position in ticks
228 */
229 IFX_EXTERN IfxStdIf_Pos_RawAngle Ifx_AngleTrkF32_getRawPosition(Ifx_AngleTrkF32 *aObsv);
230
231 /** \brief \see IfxStdIf_Pos_GetRefreshPeriod
232 * \param driver driver handle
233 * \return update period
234 */
235 IFX_EXTERN float32 Ifx_AngleTrkF32_getRefreshPeriod(Ifx_AngleTrkF32 *driver);
236
237 /** \brief \see IfxStdIf_Pos_GetResolution
238 * \param driver driver handle
239 * \return resolution
240 */
241 IFX_EXTERN sint32 Ifx_AngleTrkF32_getResolution(Ifx_AngleTrkF32 *driver);
242
243 /** \brief \see IfxStdIf_Pos_GetTurn
244 * \param driver driver handle
245 * \return Returns the number of turns
246 */
247 IFX_EXTERN sint32 Ifx_AngleTrkF32_getTurn(Ifx_AngleTrkF32 *driver);
248
249 /** \brief \see IfxStdIf_Pos_GetSensorType
250 * \param driver driver handle
251 * \return sensor type
252 */
253 IFX_EXTERN IfxStdIf_Pos_SensorType Ifx_AngleTrkF32_getSensorType(Ifx_AngleTrkF32 *driver);
254
255 /** \brief \see IfxStdIf_Pos_GetSpeed
256 * \param aObsv Pointer to the Ifx_AngleTrkF32 object
257 * \return speed
258 */
259 IFX_EXTERN float32 Ifx_AngleTrkF32_getSpeed(Ifx_AngleTrkF32 *aObsv);
260
261 /** \brief \see IfxStdIf_Pos_Reset
262 * \param driver driver handle
263 * \return None
264 */
265 IFX_EXTERN void Ifx_AngleTrkF32_reset(Ifx_AngleTrkF32 *driver);
266
267 /** \brief \see IfxStdIf_Pos_ResetFaults
268 * \param driver driver handle
269 * \return None
270 */
271 IFX_EXTERN void Ifx_AngleTrkF32_resetFaults(Ifx_AngleTrkF32 *driver);
272
273 /** \brief \see IfxStdIf_Pos_SetOffset
274 * \param aObsv driver handle
275 * \param offset offset
276 * \return None
277 */
278 IFX_EXTERN void Ifx_AngleTrkF32_setOffset(Ifx_AngleTrkF32 *aObsv, IfxStdIf_Pos_RawAngle offset);
279
280 /** \brief \see IfxStdIf_Pos_SetRefreshPeriod
281 * \param driver driver handle
282 * \param updatePeriod update period
283 * \return None
284 */
285 IFX_EXTERN void Ifx_AngleTrkF32_setRefreshPeriod(Ifx_AngleTrkF32 *driver, float32 updatePeriod);
286
287 /** \brief \see IfxStdIf_Pos_Update
288 * \param aObsv driver handle
289 * \return None
290 */
291 IFX_EXTERN void Ifx_AngleTrkF32_update(Ifx_AngleTrkF32 *aObsv);
292
293 /** \} */
294
295 /******************************************************************************/
296 /*-------------------------Global Function Prototypes-------------------------*/
297 /******************************************************************************/
298
299 /** \brief Initializes the standard interface "Pos"
300 * \param stdif Standard interface position object
301 * \param driver Virtual position sensor
302 * \return TRUE on success else FALSE
303 */
304 IFX_EXTERN boolean Ifx_AngleTrkF32_stdIfPosInit(IfxStdIf_Pos *stdif, Ifx_AngleTrkF32 *driver);
305
306 #endif /* IFX_ANGLETRKF32_H */
Ifx_AngleTrkF32_resetFaults
IFX_EXTERN void Ifx_AngleTrkF32_resetFaults(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:396
Ifx_AngleTrkF32_Config::periodPerRotation
uint16 periodPerRotation
Number of electrical periods per mechanical rotation.
Definition: Ifx_AngleTrkF32.h:82
Ifx_AngleTrkF32_update
IFX_EXTERN void Ifx_AngleTrkF32_update(Ifx_AngleTrkF32 *aObsv)
Update the object directly from its analog input.
Definition: Ifx_AngleTrkF32.c:297
Ifx_AngleTrkF32_Config::offset
IfxStdIf_Pos_RawAngle offset
Offset in ticks. [0 .. (Ifx_AngleTrkF32_Config::resolution - 1)].
Definition: Ifx_AngleTrkF32.h:85
Ifx_AngleTrkF32_getRawPosition
IFX_EXTERN IfxStdIf_Pos_RawAngle Ifx_AngleTrkF32_getRawPosition(Ifx_AngleTrkF32 *aObsv)
Returns the actual position.
Definition: Ifx_AngleTrkF32.c:314
Ifx_AngleTrkF32_getAbsolutePosition
IFX_EXTERN float32 Ifx_AngleTrkF32_getAbsolutePosition(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:335
Ifx_AngleTrkF32_initConfig
IFX_EXTERN void Ifx_AngleTrkF32_initConfig(Ifx_AngleTrkF32_Config *config, sint16 *sinIn, sint16 *cosIn)
Fill config with default values.
Definition: Ifx_AngleTrkF32.c:130
Ifx_AngleTrkF32::angleAtan
float32 angleAtan
Definition: Ifx_AngleTrkF32.h:123
Ifx_AngleTrkF32_stdIfPosInit
IFX_EXTERN boolean Ifx_AngleTrkF32_stdIfPosInit(IfxStdIf_Pos *stdif, Ifx_AngleTrkF32 *driver)
Initializes the standard interface "Pos".
Definition: Ifx_AngleTrkF32.c:427
Ifx_AngleTrkF32::base
Ifx_AngleTrkF32_PosIf base
Definition: Ifx_AngleTrkF32.h:118
Ifx_AngleTrkF32_Config::kd
float32 kd
Derivative gain.
Definition: Ifx_AngleTrkF32.h:77
Ifx_AngleTrkF32_getResolution
IFX_EXTERN sint32 Ifx_AngleTrkF32_getResolution(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:377
Ifx_AngleTrkF32::angleEst
float32 angleEst
Definition: Ifx_AngleTrkF32.h:125
Ifx_AngleTrkF32_Config::ki
float32 ki
Integrator gain.
Definition: Ifx_AngleTrkF32.h:76
Ifx_AngleTrkF32_PosIf::rawPosition
IfxStdIf_Pos_RawAngle rawPosition
raw position in ticks.
Definition: Ifx_AngleTrkF32.h:102
Ifx_AngleTrkF32_Config::sqrAmplMax
sint32 sqrAmplMax
Maximum value for square of signal amplitudes.
Definition: Ifx_AngleTrkF32.h:80
float32
float float32
Definition: Platform_Types.h:170
Ifx_AngleTrkF32::angleErr
float32 angleErr
Definition: Ifx_AngleTrkF32.h:129
Ifx_AngleTrkF32_Config::resolution
sint32 resolution
Sensor resolution.
Definition: Ifx_AngleTrkF32.h:84
IfxStdIf_Pos_RawAngle
sint32 IfxStdIf_Pos_RawAngle
Definition: IfxStdIf_Pos.h:113
Ifx_AngleTrkF32_init
IFX_EXTERN void Ifx_AngleTrkF32_init(Ifx_AngleTrkF32 *aObsv, const Ifx_AngleTrkF32_Config *config, float32 Ts)
Initialize the Angle Tracking object.
Definition: Ifx_AngleTrkF32.c:162
Ifx_AngleTrkF32_getFault
IFX_EXTERN IfxStdIf_Pos_Status Ifx_AngleTrkF32_getFault(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:347
Ifx_AngleTrkF32_step
IFX_EXTERN float32 Ifx_AngleTrkF32_step(Ifx_AngleTrkF32 *aObsv, sint16 sinIn, sint16 cosIn, float32 phase)
Step function of Ifx_AngleTrkF32 should be called at every sampling period provided during initialisa...
Definition: Ifx_AngleTrkF32.c:220
Ifx_AngleTrkF32_getSensorType
IFX_EXTERN IfxStdIf_Pos_SensorType Ifx_AngleTrkF32_getSensorType(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:383
Ifx_AngleTrkF32::speedEstB
float32 speedEstB
Definition: Ifx_AngleTrkF32.h:127
Ifx_AngleTrkF32_Config::kp
float32 kp
Proportional gain.
Definition: Ifx_AngleTrkF32.h:75
Ifx_AngleTrkF32_Config::sinIn
sint16 * sinIn
Pointer to SIN input variable.
Definition: Ifx_AngleTrkF32.h:86
Ifx_AngleTrkF32_Config::errorThreshold
float32 errorThreshold
Threshold of error value in the tracking loop.
Definition: Ifx_AngleTrkF32.h:79
Ifx_AngleTrkF32_getDirection
IFX_EXTERN IfxStdIf_Pos_Dir Ifx_AngleTrkF32_getDirection(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:341
sint16
short sint16
Definition: Platform_Types.h:129
Ifx_AngleTrkF32::cfgData
Ifx_AngleTrkF32_CfgData cfgData
Definition: Ifx_AngleTrkF32.h:119
Ifx_LowPassPt1F32
PT1 object definition.
Definition: Ifx_LowPassPt1F32.h:61
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxStdIf_Pos.h
Standard interface: Position interface.
Ifx_AngleTrkF32_reset
IFX_EXTERN void Ifx_AngleTrkF32_reset(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:408
Ifx_AngleTrkF32::halfTs
float32 halfTs
Definition: Ifx_AngleTrkF32.h:122
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
Ifx_AngleTrkF32_getTurn
IFX_EXTERN sint32 Ifx_AngleTrkF32_getTurn(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:390
Ifx_AngleTrkF32_PosIf::resolution
IfxStdIf_Pos_RawAngle resolution
resolution of this position sensor interface
Definition: Ifx_AngleTrkF32.h:110
Ifx_AngleTrkF32_Config
Angle Tracking Observer configuration.
Definition: Ifx_AngleTrkF32.h:73
Ifx_AngleTrkF32_Config::speedLpfFc
float32 speedLpfFc
Cut-off frequency of speed low-pass filter.
Definition: Ifx_AngleTrkF32.h:78
IfxStdIf_Pos_Dir
IfxStdIf_Pos_Dir
Position sensor direction definition.
Definition: IfxStdIf_Pos.h:92
Ifx_AngleTrkF32_setRefreshPeriod
IFX_EXTERN void Ifx_AngleTrkF32_setRefreshPeriod(Ifx_AngleTrkF32 *driver, float32 updatePeriod)
Definition: Ifx_AngleTrkF32.c:402
IfxStdIf_Pos_
Standard interface object.
Definition: IfxStdIf_Pos.h:283
Ifx_AngleTrkF32_Config::reversed
boolean reversed
TRUE: reversed direction, FALSE: straight direction.
Definition: Ifx_AngleTrkF32.h:83
Ifx_LowPassPt1F32.h
Low pass filter PT1.
IfxStdIf_Pos_SensorType
IfxStdIf_Pos_SensorType
Position sensor Types.
Definition: IfxStdIf_Pos.h:81
Ifx_AngleTrkF32_getLoopSpeed
IFX_INLINE float32 Ifx_AngleTrkF32_getLoopSpeed(Ifx_AngleTrkF32 *aObsv)
get the speed.
Definition: Ifx_AngleTrkF32.h:175
Ifx_AngleTrkF32_PosIf::turn
sint32 turn
number of mechanical turns. FIXME to be implemented
Definition: Ifx_AngleTrkF32.h:103
Ifx_AngleTrkF32_getRefreshPeriod
IFX_EXTERN float32 Ifx_AngleTrkF32_getRefreshPeriod(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:371
Ifx_AngleTrkF32::angleRef
float32 angleRef
Definition: Ifx_AngleTrkF32.h:124
Ifx_AngleTrkF32::speedLpf
Ifx_LowPassPt1F32 speedLpf
Definition: Ifx_AngleTrkF32.h:130
Ifx_AngleTrkF32_getSpeed
IFX_EXTERN float32 Ifx_AngleTrkF32_getSpeed(Ifx_AngleTrkF32 *aObsv)
Returns the Speed.
Definition: Ifx_AngleTrkF32.c:324
Ifx_AngleTrkF32
Angle Tracking Observer object.
Definition: Ifx_AngleTrkF32.h:116
Ifx_AngleTrkF32_PosIf
Definition: Ifx_AngleTrkF32.h:100
Ifx_AngleTrkF32_CfgData
Definition: Ifx_AngleTrkF32.h:90
Ifx_AngleTrkF32_Config::cosIn
sint16 * cosIn
Pointer to COS input variable.
Definition: Ifx_AngleTrkF32.h:87
uint16
unsigned short uint16
Definition: Platform_Types.h:112
Ifx_AngleTrkF32_getPeriodPerRotation
IFX_EXTERN uint16 Ifx_AngleTrkF32_getPeriodPerRotation(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:359
Ifx_AngleTrkF32::accelEst
float32 accelEst
Definition: Ifx_AngleTrkF32.h:128
Ifx_AngleTrkF32_PosIf::Ts
float32 Ts
update period in seconds
Definition: Ifx_AngleTrkF32.h:111
sint32
long sint32
Definition: Platform_Types.h:134
Ifx_AngleTrkF32_PosIf::direction
IfxStdIf_Pos_Dir direction
rotation direction
Definition: Ifx_AngleTrkF32.h:104
Ifx_AngleTrkF32_PosIf::status
IfxStdIf_Pos_Status status
error code (0 = no error)
Definition: Ifx_AngleTrkF32.h:105
Ifx_AngleTrkF32_getOffset
IFX_EXTERN sint32 Ifx_AngleTrkF32_getOffset(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:353
Ifx_AngleTrkF32_Config::sqrAmplMin
sint32 sqrAmplMin
Minimum value for square of signal amplitudes.
Definition: Ifx_AngleTrkF32.h:81
Ifx_AngleTrkF32_getPosition
IFX_EXTERN float32 Ifx_AngleTrkF32_getPosition(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:365
IfxStdIf_Pos_Status
Position sensor status definition.
Definition: IfxStdIf_Pos.h:100
Ifx_AngleTrkF32::speedEstA
float32 speedEstA
Definition: Ifx_AngleTrkF32.h:126
Ifx_AngleTrkF32_setOffset
IFX_EXTERN void Ifx_AngleTrkF32_setOffset(Ifx_AngleTrkF32 *aObsv, IfxStdIf_Pos_RawAngle offset)
Set the position offset (in ticks)
Definition: Ifx_AngleTrkF32.c:271
Ifx_AngleTrkF32_PosIf::positionConst
float32 positionConst
constant for calculating mechanical position (in rad) from raw position
Definition: Ifx_AngleTrkF32.h:112
Ifx_AngleTrkF32_updateStatus
IFX_EXTERN void Ifx_AngleTrkF32_updateStatus(Ifx_AngleTrkF32 *aObsv, sint16 sinIn, sint16 cosIn)
Update the status flags.
Definition: Ifx_AngleTrkF32.c:284


iLLD_TC38A: Ifx_Assert.h Source File

  • Service
  • CpuGeneric
  • _Utilities
Ifx_Assert.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_Assert.h
3 * \brief Assert functions.
4 * \ingroup library_srvsw_utilities_assert
5 *
6 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7 *
8 * $Date: 2014-02-28 14:15:42 GMT$
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup library_srvsw_utilities_assert Assertion
42 * This module implements assertion functions.
43 * \ingroup library_srvsw_utilities
44 *
45 */
46
47 #ifndef IFX_ASSERT_H
48 #define IFX_ASSERT_H 1
49
50 #include "Ifx_Cfg.h" /* Do not remove this include */
51 #include "Cpu/Std/Ifx_Types.h" /* Do not remove this include */
52
53 /** \addtogroup library_srvsw_utilities_assert
54 * \{ */
55
56 #define IFX_VERBOSE_LEVEL_OFF (0) /**< \brief Assertion level off, assertion is disabled */
57 #define IFX_VERBOSE_LEVEL_FAILURE (1) /**< \brief Assertion level failure, a debug instruction is inserted if enabled */
58 #define IFX_VERBOSE_LEVEL_ERROR (2) /**< \brief Assertion level error, a debug instruction is inserted if enabled */
59 #define IFX_VERBOSE_LEVEL_WARNING (3) /**< \brief Assertion level warning */
60 #define IFX_VERBOSE_LEVEL_INFO (4) /**< \brief Assertion level info */
61 #define IFX_VERBOSE_LEVEL_DEBUG (5) /**< \brief Assertion level debug */
62
63 /** \brief Constant to be used to indicate not implemented feature */
64 #define IFX_ASSERT_FEATURE_NOT_IMPLEMENTED (FALSE)
65 /** \brief Feature is not available on the selected hardware */
66 #define IFX_ASSERT_FEATURE_NOT_AVAILABLE (FALSE)
67
68 #ifndef IFX_ASSERT
69 # define IFX_ASSERT(level, expr) ((void)0)
70 #endif
71
72 #ifndef IFX_VALIDATE
73 # define IFX_VALIDATE(level, expr) (expr)
74 #endif
75
76 #ifdef IFX_CFG_ASSERT_INCLUDE
77 /** Configuration switch: IFX_CFG_ASSERT_INCLUDE
78 * This switch is used to enable user defined assertion implementation.
79 * A usage exmaple is given below:
80 *
81 * \code
82 * // File "Ifx_Cfg.h"
83 * #define IFX_CFG_ASSERT_INCLUDE "SysSe/Bsp/Assert.h"
84 * \endcode
85 */
86 #include IFX_CFG_ASSERT_INCLUDE
87 #endif
88 /** \} */
89
90 #endif
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.


iLLD_TC38A: Ifx_Cf32.c Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_Cf32.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_Cf32.c
3 * \brief Floating point signal, vector, and matrix library
4 *
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 */
41
42 #include "Ifx_Cf32.h"
43 #include <float.h>
44 #include <stdio.h>
45
46 void CplxVecRst_f32(cfloat32 *X, short nX)
47 {
48 for ( ; nX > 0; nX--)
49 {
50 X->real = X->imag = 0.0;
51 X++;
52 }
53 }
54
55
56 void CplxVecCpy_f32S(cfloat32 *X, short *S, short nS, short incrS)
57 {
58 for ( ; nS > 0; nS--)
59 {
60 (*X).imag = 0.0;
61 (*X).real = *(S);
62 X++; S += incrS;
63 }
64 }
65
66
67 void CplxVecCpy_f32(cfloat32 *X, cfloat32 *S, short nS)
68 {
69 for ( ; nS > 0; nS--)
70 {
71 *X = *S;
72 X++; S++;
73 }
74 }
75
76
77 float32 *CplxVecPwr_f32(cfloat32 *X, short nX)
78 {
79 unsigned short i;
80 float32 *r = (float32 *)X;
81
82 for (i = 0; i < nX; i++)
83 {
84 *r = IFX_Cf32_dot(X);
85 r++; X++;
86 }
87
88 return &r[-nX];
89 }
90
91
92 float32 *CplxVecMag_f32(cfloat32 *X, short nX)
93 {
94 unsigned short i;
95 float32 *r = (float32 *)X;
96
97 for (i = 0; i < nX; i++)
98 {
99 *r = IFX_Cf32_mag(X);
100 r++; X++;
101 }
102
103 return &r[-nX];
104 }
105
106
107 void CplxVecMul_f32(cfloat32 *X, const cfloat32 *mul, short nX)
108 {
109 for ( ; nX > 0; nX--)
110 {
111 *X = IFX_Cf32_mul(X, mul);
112 X++;
113 }
114 }
115
116
117 void VecPwrdB_f32(float32 *X, short nX)
118 {
119 unsigned short i;
120
121 for (i = 0; i < nX; i++)
122 {
123 *X = (float32)20.0 * log10f(*X);
124 X++;
125 }
126 }
127
128
129 void VecPwrdB_SF(sint16 *R, float32 *X, short nX)
130 {
131 unsigned short i;
132
133 for (i = 0; i < nX; i++)
134 {
135 *R = (sint16)(20.0 * log10f(*X));
136 R++; X++;
137 }
138 }
139
140
141 float32 VecMaxIdx_f32(float32 *X, short nX, sint16 *minIdx, sint16 *maxIdx)
142 {
143 float32 maxPeak = FLT_MIN;
144 unsigned short m;
145
146 for (m = 0; m < nX; m++)
147 {
148 if (*X > maxPeak)
149 {
150 maxPeak = *X;
151 *minIdx = m;
152 }
153
154 if (*X >= maxPeak)
155 {
156 *maxIdx = m;
157 }
158
159 X++;
160 }
161
162 return maxPeak;
163 }
164
165
166 float32 VecMinIdx_f32(float32 *X, short nX, sint16 *minIdx, sint16 *maxIdx)
167 {
168 float32 minPeak = FLT_MAX;
169 short m;
170
171 for (m = 0; m < nX; m++)
172 {
173 if (*X < minPeak)
174 {
175 minPeak = *X;
176 *minIdx = m;
177 }
178
179 if (*X <= minPeak)
180 {
181 *maxIdx = m;
182 }
183
184 X++;
185 }
186
187 return minPeak;
188 }
189
190
191 void VecOfs_f32(float32 *X, float32 offset, short nX)
192 {
193 unsigned short i;
194
195 for (i = 0; i < nX; i++)
196 {
197 *X -= offset;
198 X++;
199 }
200 }
201
202
203 void VecGain_f32(float32 *X, float32 gain, short nX)
204 {
205 unsigned short i;
206
207 for (i = 0; i < nX; i++)
208 {
209 *X = *X * gain;
210 X++;
211 }
212 }
213
214
215 float32 VecSum_f32(float32 *X, short nX)
216 {
217 float32 sumX = 0;
218 unsigned short i;
219
220 for (i = 0; i < nX; i++)
221 {
222 sumX += *X;
223 X++;
224 }
225
226 return sumX;
227 }
228
229
230 float32 VecAvg_f32(float32 *X, short nX)
231 {
232 return VecSum_f32(X, nX) / nX;
233 }
234
235
236 float32 VecMax_f32(float32 *X, short nX)
237 {
238 unsigned short i;
239 float32 r = FLT_MIN;
240
241 for (i = 0; i < nX; i++)
242 {
243 r = __maxf(r, *X);
244 X++;
245 }
246
247 return r;
248 }
249
250
251 float32 VecMin_f32(float32 *X, short nX)
252 {
253 unsigned short i;
254 float32 r = FLT_MAX;
255
256 for (i = 0; i < nX; i++)
257 {
258 r = __minf(r, *X);
259 X++;
260 }
261
262 return r;
263 }
264
265
266 void VecHalfSwap_f32(float32 *X, short nX)
267 {
268 unsigned short i;
269 unsigned short half = nX / 2;
270 float32 *F = &X[half];
271
272 for (i = 0; i < half; i++)
273 {
274 float32 tmp = *F;
275 *F = *X;
276 *X = tmp;
277 F++; X++;
278 }
279 }
280
281
282 /* NOTE:
283 * (nX <= nW) && ((nW % nX) == 0) && ((nX % 2) == 0)
284 * (symW != 0) when the window is symmetrical */
285 void VecWin_f32(float32 *X, const float32 *W, short nX, short nW, short incrX, short symW)
286 {
287 short step = nW / nX;
288 short i;
289
290 if (symW != 0)
291 { /* symmetrical window, using half of the length */
292 for (i = 0; i < nX / 2; i++)
293 {
294 *X = *X * *W;
295 X = &X[incrX];
296 W = &W[step];
297 }
298
299 W = &W[-step];
300
301 for ( ; i < nX; i++)
302 {
303 *X = *X * *W;
304 X = &X[incrX];
305 W = &W[-step];
306 }
307 }
308 }
309
310
311 #ifdef __WIN32__
312
313 #define ENDL "\r\n"
314
315 void DataF_printf(FILE *fp, pchar fileName, float32 *data, long nX, int enclosed)
316 {
317 long i;
318
319 if (fileName != NULL)
320 {
321 fp = fopen(fileName, "w+");
322 }
323
324 if (fp != NULL)
325 {
326 if (enclosed)
327 {
328 for (i = 0; i < nX; i++)
329 {
330 fprintf(fp, "_DATAF(%10.20f)," ENDL, *data);
331 data = &data[1];
332 }
333 }
334 else
335 {
336 for (i = 0; i < nX; i++)
337 {
338 fprintf(fp, "%10.20f," ENDL, *data);
339 data = &data[1];
340 }
341 }
342 }
343
344 if (fileName != NULL)
345 {
346 fclose(fp);
347 }
348 }
349
350
351 void Cplx_f32_printf(FILE *fp, pchar fileName, cfloat32 *data, long nX, int encloseData)
352 {
353 long i;
354
355 if (fileName != NULL)
356 {
357 fp = fopen(fileName, "w+");
358 }
359
360 if (fp != NULL)
361 {
362 if (encloseData)
363 {
364 for (i = 0; i < nX; i++)
365 {
366 fprintf(fp, "{_DATAF(%10.20f), _DATAF(%10.20f)}," ENDL, data->real, data->imag);
367 data = &data[1];
368 }
369 }
370 else
371 {
372 for (i = 0; i < nX; i++)
373 {
374 fprintf(fp, "%10.20f, %10.20f" ENDL, data->real, data->imag);
375 data = &data[1];
376 }
377 }
378 }
379
380 if (fileName != NULL)
381 {
382 fclose(fp);
383 }
384 }
385
386
387 #endif
CplxVecMul_f32
void CplxVecMul_f32(cfloat32 *X, const cfloat32 *mul, short nX)
Definition: Ifx_Cf32.c:107
VecGain_f32
void VecGain_f32(float32 *X, float32 gain, short nX)
Definition: Ifx_Cf32.c:203
CplxVecPwr_f32
float32 * CplxVecPwr_f32(cfloat32 *X, short nX)
Definition: Ifx_Cf32.c:77
VecOfs_f32
void VecOfs_f32(float32 *X, float32 offset, short nX)
Definition: Ifx_Cf32.c:191
Cplx_f32_printf
#define Cplx_f32_printf(...)
Definition: Ifx_Cf32.h:178
VecWin_f32
void VecWin_f32(float32 *X, const float32 *W, short nX, short nW, short incrX, short symW)
Definition: Ifx_Cf32.c:285
VecSum_f32
float32 VecSum_f32(float32 *X, short nX)
Definition: Ifx_Cf32.c:215
IFX_Cf32_mul
IFX_INLINE cfloat32 IFX_Cf32_mul(const cfloat32 *a, const cfloat32 *b)
Definition: Ifx_Cf32.h:64
ENDL
#define ENDL
Definition: IfxStdIf_DPipe.h:64
VecMax_f32
float32 VecMax_f32(float32 *X, short nX)
Definition: Ifx_Cf32.c:236
float32
float float32
Definition: Platform_Types.h:170
VecMaxIdx_f32
float32 VecMaxIdx_f32(float32 *X, short nX, sint16 *minIdx, sint16 *maxIdx)
Definition: Ifx_Cf32.c:141
cfloat32::imag
float32 imag
Imaginary part.
Definition: Ifx_Types.h:61
CplxVecMag_f32
float32 * CplxVecMag_f32(cfloat32 *X, short nX)
Definition: Ifx_Cf32.c:92
VecPwrdB_f32
void VecPwrdB_f32(float32 *X, short nX)
Definition: Ifx_Cf32.c:117
__maxf
#define __maxf
Definition: IfxCpu_IntrinsicsDcc.h:1637
cfloat32
Definition: Ifx_Types.h:58
sint16
short sint16
Definition: Platform_Types.h:129
VecAvg_f32
float32 VecAvg_f32(float32 *X, short nX)
Definition: Ifx_Cf32.c:230
VecMin_f32
float32 VecMin_f32(float32 *X, short nX)
Definition: Ifx_Cf32.c:251
cfloat32::real
float32 real
Real part.
Definition: Ifx_Types.h:60
CplxVecRst_f32
void CplxVecRst_f32(cfloat32 *X, short nX)
Definition: Ifx_Cf32.c:46
VecMinIdx_f32
float32 VecMinIdx_f32(float32 *X, short nX, sint16 *minIdx, sint16 *maxIdx)
Definition: Ifx_Cf32.c:166
VecHalfSwap_f32
void VecHalfSwap_f32(float32 *X, short nX)
Definition: Ifx_Cf32.c:266
__minf
#define __minf
Definition: IfxCpu_IntrinsicsDcc.h:1633
IFX_Cf32_dot
IFX_INLINE float32 IFX_Cf32_dot(const cfloat32 *b)
Definition: Ifx_Cf32.h:82
CplxVecCpy_f32S
void CplxVecCpy_f32S(cfloat32 *X, short *S, short nS, short incrS)
Definition: Ifx_Cf32.c:56
Ifx_Cf32.h
Floating point signal, vector, and matrix library.
pchar
const char * pchar
const char pointer
Definition: Ifx_Types.h:53
VecPwrdB_SF
void VecPwrdB_SF(sint16 *R, float32 *X, short nX)
Definition: Ifx_Cf32.c:129
IFX_Cf32_mag
IFX_INLINE float32 IFX_Cf32_mag(const cfloat32 *c)
Definition: Ifx_Cf32.h:88
CplxVecCpy_f32
void CplxVecCpy_f32(cfloat32 *X, cfloat32 *S, short nS)
Definition: Ifx_Cf32.c:67


iLLD_TC38A: Ifx_Cf32.h Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_Cf32.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_Cf32.h
3 * \brief Floating point signal, vector, and matrix library
4 *
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup library_srvsw_sysse_math_cf32 Floating point signal, vector, and matrix library
42 * \ingroup library_srvsw_sysse_math_f32
43 */
44
45 #ifndef IFX_CF32_H
46 #define IFX_CF32_H
47
48 #include "Cpu/Std/IfxCpu_Intrinsics.h"
49 #include <math.h>
50
51 #define _DATAF(val) ((float32)(val))
52
53 /* Complex Arithmetic --------------------------------------------------------*/
54 IFX_INLINE cfloat32 IFX_Cf32_exp(const cfloat32 *c)
55 {
56 float32 f = (float32)expf(c->real);
57 cfloat32 R;
58 R.real = f * (float32)cosf(c->imag);
59 R.imag = f * (float32)sinf(c->imag);
60 return R;
61 }
62
63
64 IFX_INLINE cfloat32 IFX_Cf32_mul(const cfloat32 *a, const cfloat32 *b)
65 {
66 cfloat32 R;
67 R.real = (a->real * b->real) - (a->imag * b->imag);
68 R.imag = (a->imag * b->real) + (a->real * b->imag);
69 return R;
70 }
71
72
73 IFX_INLINE cfloat32 IFX_Cf32_amp(const cfloat32 *a, float32 gain)
74 {
75 cfloat32 R;
76 R.real = a->real * gain;
77 R.imag = a->imag * gain;
78 return R;
79 }
80
81
82 IFX_INLINE float32 IFX_Cf32_dot(const cfloat32 *b)
83 {
84 return (b->real * b->real) + (b->imag * b->imag);
85 }
86
87
88 IFX_INLINE float32 IFX_Cf32_mag(const cfloat32 *c)
89 {
90 return (float32)sqrtf(IFX_Cf32_dot(c));
91 }
92
93
94 IFX_INLINE cfloat32 IFX_Cf32_div(const cfloat32 *a, const cfloat32 *b)
95 {
96 float32 denom = IFX_Cf32_dot(b);
97 cfloat32 R;
98 R.real = ((a->real * b->real) + (a->imag * b->imag)) / denom;
99 R.imag = ((a->imag * b->real) - (a->real * b->imag)) / denom;
100 return R;
101 }
102
103
104 IFX_INLINE cfloat32 IFX_Cf32_add(const cfloat32 *a, const cfloat32 *b)
105 {
106 cfloat32 R;
107 R.real = (a->real + b->real);
108 R.imag = (a->imag + b->imag);
109 return R;
110 }
111
112
113 IFX_INLINE cfloat32 IFX_Cf32_sub(const cfloat32 *a, const cfloat32 *b)
114 {
115 cfloat32 R;
116 R.real = (a->real - b->real);
117 R.imag = (a->imag - b->imag);
118 return R;
119 }
120
121
122 IFX_INLINE void IFX_Cf32_set(cfloat32 *a, float32 re, float32 im)
123 {
124 a->real = re;
125 a->imag = im;
126 }
127
128
129 IFX_INLINE void IFX_Cf32_reset(cfloat32 *a)
130 {
131 IFX_Cf32_set(a, 0.0, 0.0);
132 }
133
134
135 IFX_INLINE cfloat32 IFX_Cf32_saturate(cfloat32 *a, float32 *ampl, float32 limit)
136 {
137 cfloat32 R = *a;
138 *ampl = IFX_Cf32_mag(a);
139
140 if (*ampl > limit)
141 {
142 float32 scale = limit / *ampl;
143 R.imag = R.imag * scale;
144 R.real = R.real * scale;
145 }
146
147 return R;
148 }
149
150
151 IFX_EXTERN void CplxVecCpy_f32S(cfloat32 *X, short *S, short nS, short incrS);
152 IFX_EXTERN void CplxVecRst_f32(cfloat32 *X, short nX);
153 IFX_EXTERN void CplxVecCpy_f32(cfloat32 *X, cfloat32 *S, short nS);
154 IFX_EXTERN float32 *CplxVecPwr_f32(cfloat32 *X, short nX);
155 IFX_EXTERN float32 *CplxVecMag_f32(cfloat32 *X, short nX);
156 IFX_EXTERN void CplxVecMul_f32(cfloat32 *X, const cfloat32 *mul, short nX);
157
158 /* Vector Operation ----------------------------------------------------------*/
159
160 IFX_EXTERN void VecWin_f32(float32 *X, const float32 *W, short nX, short nW, short incrX, short symW);
161 IFX_EXTERN void VecPwrdB_f32(float32 *X, short nX);
162 IFX_EXTERN void VecPwrdB_SF(sint16 *R, float32 *X, short nX);
163 IFX_EXTERN void VecGain_f32(float32 *X, float32 gain, short nX);
164 IFX_EXTERN void VecOfs_f32(float32 *X, float32 offset, short nX);
165 IFX_EXTERN float32 VecSum_f32(float32 *X, short nX);
166 IFX_EXTERN float32 VecAvg_f32(float32 *X, short nX);
167 IFX_EXTERN float32 VecMax_f32(float32 *X, short nX);
168 IFX_EXTERN float32 VecMin_f32(float32 *X, short nX);
169 IFX_EXTERN float32 VecMinIdx_f32(float32 *X, short nX, sint16 *minIdx, sint16 *maxIdx);
170 IFX_EXTERN float32 VecMaxIdx_f32(float32 *X, short nX, sint16 *minIdx, sint16 *maxIdx);
171 IFX_EXTERN void VecHalfSwap_f32(float32 *X, short nX);
172
173 /* Helper functions ----------------------------------------------------------*/
174 #ifdef __WIN32__
175 #include <stdio.h>
176 void Cplx_f32_printf(FILE *fp, pchar fileName, cfloat32 *data, long nX, int encloseData);
177 #else
178 #define Cplx_f32_printf(...)
179 #endif
180
181 #endif /* IFX_CF32_H */
IFX_Cf32_reset
IFX_INLINE void IFX_Cf32_reset(cfloat32 *a)
Definition: Ifx_Cf32.h:129
VecPwrdB_SF
IFX_EXTERN void VecPwrdB_SF(sint16 *R, float32 *X, short nX)
Definition: Ifx_Cf32.c:129
VecSum_f32
IFX_EXTERN float32 VecSum_f32(float32 *X, short nX)
Definition: Ifx_Cf32.c:215
Cplx_f32_printf
#define Cplx_f32_printf(...)
Definition: Ifx_Cf32.h:178
IFX_Cf32_mul
IFX_INLINE cfloat32 IFX_Cf32_mul(const cfloat32 *a, const cfloat32 *b)
Definition: Ifx_Cf32.h:64
VecMaxIdx_f32
IFX_EXTERN float32 VecMaxIdx_f32(float32 *X, short nX, sint16 *minIdx, sint16 *maxIdx)
Definition: Ifx_Cf32.c:141
VecOfs_f32
IFX_EXTERN void VecOfs_f32(float32 *X, float32 offset, short nX)
Definition: Ifx_Cf32.c:191
float32
float float32
Definition: Platform_Types.h:170
IfxCpu_Intrinsics.h
VecAvg_f32
IFX_EXTERN float32 VecAvg_f32(float32 *X, short nX)
Definition: Ifx_Cf32.c:230
cfloat32::imag
float32 imag
Imaginary part.
Definition: Ifx_Types.h:61
VecWin_f32
IFX_EXTERN void VecWin_f32(float32 *X, const float32 *W, short nX, short nW, short incrX, short symW)
Definition: Ifx_Cf32.c:285
CplxVecCpy_f32
IFX_EXTERN void CplxVecCpy_f32(cfloat32 *X, cfloat32 *S, short nS)
Definition: Ifx_Cf32.c:67
cfloat32
Definition: Ifx_Types.h:58
sint16
short sint16
Definition: Platform_Types.h:129
IFX_Cf32_amp
IFX_INLINE cfloat32 IFX_Cf32_amp(const cfloat32 *a, float32 gain)
Definition: Ifx_Cf32.h:73
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
VecHalfSwap_f32
IFX_EXTERN void VecHalfSwap_f32(float32 *X, short nX)
Definition: Ifx_Cf32.c:266
VecPwrdB_f32
IFX_EXTERN void VecPwrdB_f32(float32 *X, short nX)
Definition: Ifx_Cf32.c:117
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IFX_Cf32_sub
IFX_INLINE cfloat32 IFX_Cf32_sub(const cfloat32 *a, const cfloat32 *b)
Definition: Ifx_Cf32.h:113
cfloat32::real
float32 real
Real part.
Definition: Ifx_Types.h:60
CplxVecCpy_f32S
IFX_EXTERN void CplxVecCpy_f32S(cfloat32 *X, short *S, short nS, short incrS)
Definition: Ifx_Cf32.c:56
IFX_Cf32_div
IFX_INLINE cfloat32 IFX_Cf32_div(const cfloat32 *a, const cfloat32 *b)
Definition: Ifx_Cf32.h:94
IFX_Cf32_dot
IFX_INLINE float32 IFX_Cf32_dot(const cfloat32 *b)
Definition: Ifx_Cf32.h:82
VecMinIdx_f32
IFX_EXTERN float32 VecMinIdx_f32(float32 *X, short nX, sint16 *minIdx, sint16 *maxIdx)
Definition: Ifx_Cf32.c:166
VecMax_f32
IFX_EXTERN float32 VecMax_f32(float32 *X, short nX)
Definition: Ifx_Cf32.c:236
IFX_Cf32_add
IFX_INLINE cfloat32 IFX_Cf32_add(const cfloat32 *a, const cfloat32 *b)
Definition: Ifx_Cf32.h:104
CplxVecPwr_f32
IFX_EXTERN float32 * CplxVecPwr_f32(cfloat32 *X, short nX)
Definition: Ifx_Cf32.c:77
VecMin_f32
IFX_EXTERN float32 VecMin_f32(float32 *X, short nX)
Definition: Ifx_Cf32.c:251
VecGain_f32
IFX_EXTERN void VecGain_f32(float32 *X, float32 gain, short nX)
Definition: Ifx_Cf32.c:203
IFX_Cf32_set
IFX_INLINE void IFX_Cf32_set(cfloat32 *a, float32 re, float32 im)
Definition: Ifx_Cf32.h:122
IFX_Cf32_exp
IFX_INLINE cfloat32 IFX_Cf32_exp(const cfloat32 *c)
Definition: Ifx_Cf32.h:54
CplxVecMul_f32
IFX_EXTERN void CplxVecMul_f32(cfloat32 *X, const cfloat32 *mul, short nX)
Definition: Ifx_Cf32.c:107
CplxVecRst_f32
IFX_EXTERN void CplxVecRst_f32(cfloat32 *X, short nX)
Definition: Ifx_Cf32.c:46
CplxVecMag_f32
IFX_EXTERN float32 * CplxVecMag_f32(cfloat32 *X, short nX)
Definition: Ifx_Cf32.c:92
IFX_Cf32_saturate
IFX_INLINE cfloat32 IFX_Cf32_saturate(cfloat32 *a, float32 *ampl, float32 limit)
Definition: Ifx_Cf32.h:135
pchar
const char * pchar
const char pointer
Definition: Ifx_Types.h:53
IFX_Cf32_mag
IFX_INLINE float32 IFX_Cf32_mag(const cfloat32 *c)
Definition: Ifx_Cf32.h:88


iLLD_TC38A: Ifx_CircularBuffer.asm.c Source File

  • _Lib
  • DataHandling
Ifx_CircularBuffer.asm.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_CircularBuffer.asm.c
3 * \brief Circular buffer functions (assembler implementation).
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 #include "Ifx_CircularBuffer.h"
43
44 #if !(IFX_CFG_CIRCULARBUFFER_C)
45
46 uint32 Ifx_CircularBuffer_get32(Ifx_CircularBuffer *buffer)
47 {
48 uint32 data;
49
50 __asm(" ld.da\ta14/a15,[%1]\n" /* Get circular buffer state */
51 " ld.w\t%0,[a14/a15+c]\n" /* Get the value from the buffer, and increment the buffer pointer */
52 " st.da\t[%1],a14/a15\n" /* Store the new circular buffer state */
53 : "=d" (data) : "a" (buffer) : "a14", "a15");
54
55 return data;
56 }
57
58
59 uint16 Ifx_CircularBuffer_get16(Ifx_CircularBuffer *buffer)
60 {
61 Ifx_SizeT data;
62
63 __asm(" ld.da\ta14/a15,[%1]\n" /* Get circular buffer state */
64 " ld.h\t%0,[a14/a15+c]\n" /* Get the value from the buffer, and increment the buffer pointer */
65 " st.da\t[%1],a14/a15\n" /* Store the new circular buffer state */
66 : "=d" (data) : "a" (buffer) : "a14", "a15");
67
68 return data;
69 }
70
71
72 /** \brief Add a 32 bit value to the circular buffer, and post-increment the circular buffer pointer
73 *
74 * \param buffer Specifies circular buffer.
75 * \param data Specifies value to be added to the buffer.
76 *
77 * \return None.
78 */
79 void Ifx_CircularBuffer_addDataIncr(Ifx_CircularBuffer *buffer, uint32 data)
80 {
81 __asm(" ld.da\ta14/a15,[%0]\n" /* Get circular buffer state */
82 " st.w\t[a14/a15+c]0,%1\n" /* Store the value to the buffer, and increment the buffer pointer */
83 " ld.w\t%1,[a14/a15+c]\n" /* Read the value from the buffer, to get the buffer pointer incremented (bug workaround) */
84 " st.da\t[%0],a14/a15\n" /* Store the new circular buffer state */
85 :
86 : "a" (buffer), "d" (data) : "a14", "a15");
87 }
88
89
90 void *Ifx_CircularBuffer_read8(Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
91 {
92 count--;
93 __asm(" mov.a\ta13,%3\n" /* Get count value */
94 " ld.da\ta14/a15,[%1]\n" /* Get circular buffer state */
95 "Ifx_CircularBuffer_read1:" " ld.b\td15,[a14/a15+c]\n"/* read the value from the buffer, and increment the buffer pointer */
96 " st.b\t[%2+],d15\n" /* Store value to the data buffer, and increment the pointer */
97 " loop\ta13,Ifx_CircularBuffer_read1\n" /* loop */
98 " mov.d\t%0,a15\n" /* Get the new index value */
99 " extr.u\t%0,%0,#0,#16\n": "=d" (buffer->index) : "a" (buffer), "a" (data), "d" (count) : "a13", "a14", "a15",
100 "d15");
101
102 return data;
103 }
104
105
106 void *Ifx_CircularBuffer_read32(Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
107 {
108 count--;
109 __asm(" mov.a\ta13,%3\n" /* Get count value */
110 " ld.da\ta14/a15,[%1]\n" /* Get circular buffer state */
111 "Ifx_CircularBuffer_read2:" " ld.w\td15,[a14/a15+c]\n"/* read the value from the buffer, and increment the buffer pointer */
112 " st.w\t[%2+],d15\n" /* Store value to the data buffer, and increment the pointer */
113 " loop\ta13,Ifx_CircularBuffer_read2\n" /* loop */
114 " mov.d\t%0,a15\n" /* Get the new index value */
115 " extr.u\t%0,%0,#0,#16\n": "=d" (buffer->index) : "a" (buffer), "a" (data), "d" (count) : "a13", "a14", "a15",
116 "d15");
117
118 return data;
119 }
120
121
122 const void *Ifx_CircularBuffer_write8(Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
123 {
124 count--;
125 __asm(" mov.a\ta13,%3\n" /* Get count value */
126 " ld.da\ta14/a15,[%1]\n" /* Get circular buffer state */
127 "Ifx_CircularBuffer_write1:" " ld.b\td15,[%2+]\n"/* Get value from the data buffer, and increment the pointer */
128 " st.b\t[a14/a15+c]0,d15\n" /* Store the value to the buffer, and increment the buffer pointer */
129 " ld.b\td15,[a14/a15+c]\n" /* Read the value from the buffer, to get the buffer pointer incremented (bug workaround) */
130 " loop\ta13,Ifx_CircularBuffer_write1\n" /* loop */
131 " mov.d\t%0,a15\n" /* Get the new index value */
132 " extr.u\t%0,%0,#0,#16\n": "=d" (buffer->index) : "a" (buffer), "a" (data), "d" (count) : "a13", "a14", "a15",
133 "d15");
134
135 return data;
136 }
137
138
139 const void *Ifx_CircularBuffer_write32(Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
140 {
141 count--;
142 __asm(" mov.a\ta13,%3\n" /* Get count value */
143 " ld.da\ta14/a15,[%1]\n" /* Get circular buffer state */
144 "Ifx_CircularBuffer_write2:" " ld.w\td15,[%2+]\n"/* Get value from the data buffer, and increment the pointer */
145 " st.w\t[a14/a15+c]0,d15\n" /* Store the value to the buffer, and increment the buffer pointer */
146 " ld.w\td15,[a14/a15+c]\n" /* Read the value from the buffer, to get the buffer pointer incremented (bug workaround) */
147 " loop\ta13,Ifx_CircularBuffer_write2\n" /* loop */
148 " mov.d\t%0,a15\n" /* Get the new index value */
149 " extr.u\t%0,%0,#0,#16\n": "=d" (buffer->index) : "a" (buffer), "a" (data), "d" (count) : "a13", "a14", "a15",
150 "d15");
151
152 return data;
153 }
154
155
156 #endif
Ifx_CircularBuffer_write8
const void * Ifx_CircularBuffer_write8(Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
Copy count bytes from the data array to the circular buffer.
Definition: Ifx_CircularBuffer.c:139
Ifx_CircularBuffer_read32
void * Ifx_CircularBuffer_read32(Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
Copy count 32 bit words from the circular buffer to the data array.
Definition: Ifx_CircularBuffer.c:116
uint32
unsigned long uint32
Definition: Platform_Types.h:116
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
Ifx_CircularBuffer_get32
uint32 Ifx_CircularBuffer_get32(Ifx_CircularBuffer *buffer)
Return the circular buffer 32 bit value, and post-increment the circular buffer pointer.
Definition: Ifx_CircularBuffer.c:46
Ifx_CircularBuffer_addDataIncr
void Ifx_CircularBuffer_addDataIncr(Ifx_CircularBuffer *buffer, uint32 data)
Add a 32 bit value to the circular buffer, and post-increment the circular buffer pointer...
Definition: Ifx_CircularBuffer.c:83
Ifx_CircularBuffer
Circular buffer definition.
Definition: Ifx_Types.h:93
Ifx_CircularBuffer_read8
void * Ifx_CircularBuffer_read8(Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
Copy count bytes from the circular buffer to the data array.
Definition: Ifx_CircularBuffer.c:95
Ifx_CircularBuffer_write32
const void * Ifx_CircularBuffer_write32(Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
Copy count 32 bit words from the data array to the circular buffer.
Definition: Ifx_CircularBuffer.c:160
Ifx_CircularBuffer_get16
uint16 Ifx_CircularBuffer_get16(Ifx_CircularBuffer *buffer)
Return the circular buffer 16 bit value, and post-increment the circular buffer pointer.
Definition: Ifx_CircularBuffer.c:61
Ifx_CircularBuffer.h
Circular buffer functions.
uint16
unsigned short uint16
Definition: Platform_Types.h:112
Ifx_CircularBuffer::index
uint16 index
buffer current index
Definition: Ifx_Types.h:96


iLLD_TC38A: Ifx_CircularBuffer.c Source File

  • _Lib
  • DataHandling
Ifx_CircularBuffer.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_CircularBuffer.c
3 * \brief Circular buffer functions in C language.
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 #include "Ifx_CircularBuffer.h"
43
44 #if (IFX_CFG_CIRCULARBUFFER_C)
45
46 uint32 Ifx_CircularBuffer_get32(Ifx_CircularBuffer *buffer)
47 {
48 uint32 data = ((uint32 *)buffer->base)[buffer->index];
49
50 buffer->index += 4;
51
52 if (buffer->index >= buffer->length)
53 {
54 buffer->index = 0;
55 }
56
57 return data;
58 }
59
60
61 uint16 Ifx_CircularBuffer_get16(Ifx_CircularBuffer *buffer)
62 {
63 uint16 data = ((uint16 *)buffer->base)[buffer->index];
64
65 buffer->index += 2;
66
67 if (buffer->index >= buffer->length)
68 {
69 buffer->index = 0;
70 }
71
72 return data;
73 }
74
75
76 /** \brief Add a 32 bit value to the circular buffer, and post-increment the circular buffer pointer
77 *
78 * \param buffer Specifies circular buffer.
79 * \param data Specifies value to be added to the buffer.
80 *
81 * \return None.
82 */
83 void Ifx_CircularBuffer_addDataIncr(Ifx_CircularBuffer *buffer, uint32 data)
84 {
85 ((uint32 *)buffer->base)[buffer->index] = data;
86 buffer->index += 4;
87
88 if (buffer->index >= buffer->length)
89 {
90 buffer->index = 0;
91 }
92 }
93
94
95 void *Ifx_CircularBuffer_read8(Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
96 {
97 uint8 *Dest = (uint8 *)data;
98
99 do
100 {
101 count--;
102 *Dest = ((uint8 *)buffer->base)[buffer->index];
103 Dest = &Dest[1];
104 buffer->index++;
105
106 if (buffer->index >= buffer->length)
107 {
108 buffer->index = 0;
109 }
110 } while (count > 0);
111
112 return Dest;
113 }
114
115
116 void *Ifx_CircularBuffer_read32(Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
117 {
118 uint32 *Dest = (uint32 *)data;
119 uint8 *base = buffer->base;
120
121 do
122 {
123 *Dest = *((uint32 *)(&base[buffer->index]));
124 Dest = &Dest[1];
125 buffer->index = buffer->index + 4;
126
127 if (buffer->index >= buffer->length)
128 {
129 buffer->index = 0;
130 }
131
132 count--;
133 } while (count > 0);
134
135 return Dest;
136 }
137
138
139 const void *Ifx_CircularBuffer_write8(Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
140 {
141 const uint8 *source = (const uint8 *)data;
142
143 do
144 {
145 count--;
146 ((uint8 *)buffer->base)[buffer->index] = *source;
147 source = &source[1];
148 buffer->index++;
149
150 if (buffer->index >= buffer->length)
151 {
152 buffer->index = 0;
153 }
154 } while (count > 0);
155
156 return source;
157 }
158
159
160 const void *Ifx_CircularBuffer_write32(Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
161 {
162 const uint32 *source = (const uint32 *)data;
163 uint8 *base = buffer->base;
164
165 do
166 {
167 *((uint32 *)(&base[buffer->index])) = *source;
168 source = &source[1];
169 buffer->index = buffer->index + 4;
170
171 if (buffer->index >= buffer->length)
172 {
173 buffer->index = 0;
174 }
175
176 count--;
177 } while (count > 0);
178
179 return source;
180 }
181
182
183 #endif
Ifx_CircularBuffer_write8
const void * Ifx_CircularBuffer_write8(Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
Copy count bytes from the data array to the circular buffer.
Definition: Ifx_CircularBuffer.c:139
Ifx_CircularBuffer_read32
void * Ifx_CircularBuffer_read32(Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
Copy count 32 bit words from the circular buffer to the data array.
Definition: Ifx_CircularBuffer.c:116
Ifx_CircularBuffer::length
uint16 length
buffer length
Definition: Ifx_Types.h:97
uint32
unsigned long uint32
Definition: Platform_Types.h:116
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
Ifx_CircularBuffer::base
void * base
buffer base address
Definition: Ifx_Types.h:95
Ifx_CircularBuffer_get32
uint32 Ifx_CircularBuffer_get32(Ifx_CircularBuffer *buffer)
Return the circular buffer 32 bit value, and post-increment the circular buffer pointer.
Definition: Ifx_CircularBuffer.c:46
Ifx_CircularBuffer_addDataIncr
void Ifx_CircularBuffer_addDataIncr(Ifx_CircularBuffer *buffer, uint32 data)
Add a 32 bit value to the circular buffer, and post-increment the circular buffer pointer...
Definition: Ifx_CircularBuffer.c:83
Ifx_CircularBuffer
Circular buffer definition.
Definition: Ifx_Types.h:93
Ifx_CircularBuffer_read8
void * Ifx_CircularBuffer_read8(Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
Copy count bytes from the circular buffer to the data array.
Definition: Ifx_CircularBuffer.c:95
Ifx_CircularBuffer_write32
const void * Ifx_CircularBuffer_write32(Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
Copy count 32 bit words from the data array to the circular buffer.
Definition: Ifx_CircularBuffer.c:160
Ifx_CircularBuffer_get16
uint16 Ifx_CircularBuffer_get16(Ifx_CircularBuffer *buffer)
Return the circular buffer 16 bit value, and post-increment the circular buffer pointer.
Definition: Ifx_CircularBuffer.c:61
Ifx_CircularBuffer.h
Circular buffer functions.
uint16
unsigned short uint16
Definition: Platform_Types.h:112
Ifx_CircularBuffer::index
uint16 index
buffer current index
Definition: Ifx_Types.h:96
uint8
unsigned char uint8
Definition: Platform_Types.h:108


iLLD_TC38A: Ifx_CircularBuffer.h Source File

  • _Lib
  • DataHandling
Ifx_CircularBuffer.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_CircularBuffer.h
3 * \brief Circular buffer functions.
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 * \defgroup IfxLld_lib_datahandling_circularbuffer Circular buffer
41 * This module implements circular buffer functions.
42 * \ingroup IfxLld_lib_datahandling
43 *
44 */
45
46 #ifndef IFX_CIRCULARBUFFER_H
47 #define IFX_CIRCULARBUFFER_H 1
48
49 //---------------------------------------------------------------------------
50 #include "Cpu/Std/IfxCpu_Intrinsics.h"
51 //---------------------------------------------------------------------------
52
53 #ifndef IFX_CFG_CIRCULARBUFFER_C
54 #define IFX_CFG_CIRCULARBUFFER_C (1)
55 #endif
56
57 /** \addtogroup IfxLld_lib_datahandling_circularbuffer
58 * \{
59 */
60 /** \brief Return the circular buffer 16 bit value, and post-increment the circular buffer pointer
61 *
62 * \param buffer Specifies circular buffer.
63 *
64 * \return Return the next circular buffer value.
65 */
66 uint16 Ifx_CircularBuffer_get16(Ifx_CircularBuffer *buffer);
67
68 /** \brief Return the circular buffer 32 bit value, and post-increment the circular buffer pointer
69 *
70 * \param buffer Specifies circular buffer.
71 *
72 * \return Return the next circular buffer value.
73 */
74 uint32 Ifx_CircularBuffer_get32(Ifx_CircularBuffer *buffer);
75
76 /** \brief Copy count bytes from the circular buffer to the data array
77 *
78 * \param buffer Specifies circular buffer.
79 * \param data Specifies destination pointer.
80 * \param count Specifies number of bytes to be copied. count MUST be >= 1.
81 *
82 * \return Returns the updated data pointer data = ((uint8*)data) + count
83 */
84 void *Ifx_CircularBuffer_read8(Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count);
85
86 /** \brief Copy count 32 bit words from the circular buffer to the data array
87 *
88 * \param buffer Specifies circular buffer.
89 * \param data Specifies destination pointer.
90 * \param count Specifies number of 32 bit words to be copied. count MUST be >= 1.
91 *
92 * \return Returns the updated data pointer data = ((uint32*)data) + count
93 */
94 void *Ifx_CircularBuffer_read32(Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count);
95
96 /** \brief Copy count bytes from the data array to the circular buffer
97 *
98 * \param buffer Specifies circular buffer.
99 * \param data Specifies source pointer.
100 * \param count Specifies number of bytes to be copied. count MUST be >= 1.
101 *
102 * \return Returns the updated data pointer data = ((uint8*)data) + count
103 */
104 const void *Ifx_CircularBuffer_write8(Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count);
105
106 /** \brief Copy count 32 bit words from the data array to the circular buffer
107 *
108 * \param buffer Specifies circular buffer.
109 * \param data Specifies source pointer.
110 * \param count Specifies number of 32 bit words to be copied. count MUST be >= 1.
111 *
112 * \return Returns the updated data pointer data = ((uint32*)data) + count
113 */
114 const void *Ifx_CircularBuffer_write32(Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count);
115
116 /** \} */
117 //---------------------------------------------------------------------------
118 #endif
Ifx_CircularBuffer_write8
const void * Ifx_CircularBuffer_write8(Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
Copy count bytes from the data array to the circular buffer.
Definition: Ifx_CircularBuffer.c:139
Ifx_CircularBuffer_read32
void * Ifx_CircularBuffer_read32(Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
Copy count 32 bit words from the circular buffer to the data array.
Definition: Ifx_CircularBuffer.c:116
uint32
unsigned long uint32
Definition: Platform_Types.h:116
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
IfxCpu_Intrinsics.h
Ifx_CircularBuffer_get32
uint32 Ifx_CircularBuffer_get32(Ifx_CircularBuffer *buffer)
Return the circular buffer 32 bit value, and post-increment the circular buffer pointer.
Definition: Ifx_CircularBuffer.c:46
Ifx_CircularBuffer
Circular buffer definition.
Definition: Ifx_Types.h:93
Ifx_CircularBuffer_read8
void * Ifx_CircularBuffer_read8(Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
Copy count bytes from the circular buffer to the data array.
Definition: Ifx_CircularBuffer.c:95
Ifx_CircularBuffer_write32
const void * Ifx_CircularBuffer_write32(Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
Copy count 32 bit words from the data array to the circular buffer.
Definition: Ifx_CircularBuffer.c:160
Ifx_CircularBuffer_get16
uint16 Ifx_CircularBuffer_get16(Ifx_CircularBuffer *buffer)
Return the circular buffer 16 bit value, and post-increment the circular buffer pointer.
Definition: Ifx_CircularBuffer.c:61
uint16
unsigned short uint16
Definition: Platform_Types.h:112


iLLD_TC38A: Ifx_Console.c Source File

  • Service
  • CpuGeneric
  • SysSe
  • Comm
Ifx_Console.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_Console.c
3 * \brief Main Ifx_Console module implementation file
4 *
5 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
6 *
7 * $Date: 2014-03-13 15:49:47 GMT$
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 #include <string.h>
43 #include <stdio.h>
44 #include <stdarg.h>
45
46 #include "Ifx_Console.h"
47 #include "_Utilities/Ifx_Assert.h"
48 #include "Cpu/Std/IfxCpu_Intrinsics.h"
49
50 Ifx_Console Ifx_g_console;
51
52 /**
53 * \brief Initialize the \ref Ifx_g_console object.
54 * \param standardIo Pointer to the IfxStdIf_DPipe object used by the \ref Ifx_g_console.
55 */
56 void Ifx_Console_init(IfxStdIf_DPipe *standardIo)
57 {
58 Ifx_g_console.standardIo = standardIo;
59 Ifx_g_console.align = 0;
60 }
61
62
63 /**
64 * \brief Print formatted string into \ref Ifx_g_console.
65 * \param format printf-compatible formatted string.
66 * \retval TRUE if the string is printed successfully
67 * \retval FALSE if the function failed.
68 */
69 boolean Ifx_Console_print(pchar format, ...)
70 {
71 if (!Ifx_g_console.standardIo->txDisabled)
72 {
73 char message[STDIF_DPIPE_MAX_PRINT_SIZE + 1];
74 Ifx_SizeT count;
75 va_list args;
76 va_start(args, format);
77 vsprintf((char *)message, format, args);
78 va_end(args);
79 count = (Ifx_SizeT)strlen(message);
80 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, count < STDIF_DPIPE_MAX_PRINT_SIZE);
81
82 return IfxStdIf_DPipe_write(Ifx_g_console.standardIo, (void *)message, &count, TIME_INFINITE);
83 }
84 else
85 {
86 return TRUE;
87 }
88 }
89
90
91 /**
92 * \brief Print formatted string into \ref Ifx_g_console.
93 * Indented with a number of spaces.
94 * \param format printf-compatible formatted string.
95 * \retval TRUE if the string is printed successfully
96 * \retval FALSE if the function failed.
97 */
98 boolean Ifx_Console_printAlign(pchar format, ...)
99 {
100 if (!Ifx_g_console.standardIo->txDisabled)
101 {
102 char message[STDIF_DPIPE_MAX_PRINT_SIZE + 1];
103 Ifx_SizeT align, count;
104 char spaces[17] = " ";
105 va_list args;
106 va_start(args, format);
107 vsprintf((char *)message, format, args);
108 va_end(args);
109 count = (Ifx_SizeT)strlen(message);
110 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, count < STDIF_DPIPE_MAX_PRINT_SIZE);
111 align = Ifx_g_console.align;
112
113 while (align > 0)
114 {
115 Ifx_SizeT scount;
116 scount = __min(align, 10);
117 IfxStdIf_DPipe_write(Ifx_g_console.standardIo, (void *)spaces, &scount, TIME_INFINITE);
118 align = align - scount;
119 }
120
121 return IfxStdIf_DPipe_write(Ifx_g_console.standardIo, (void *)message, &count, TIME_INFINITE);
122 }
123 else
124 {
125 return TRUE;
126 }
127 }
IfxStdIf_DPipe_::txDisabled
boolean txDisabled
If disabled is set to TRUE, the output is disabled, else enabled.
Definition: IfxStdIf_DPipe.h:233
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
Ifx_Console.h
Main Console module header file.
IfxStdIf_DPipe_
Standard interface object.
Definition: IfxStdIf_DPipe.h:230
STDIF_DPIPE_MAX_PRINT_SIZE
#define STDIF_DPIPE_MAX_PRINT_SIZE
Size of the buffer allocated on the stack for the print function.
Definition: IfxStdIf_DPipe.h:74
Ifx_Console::align
sint16 align
Variable for storing the actual (left)indentation level of the Ifx_g_console.
Definition: Ifx_Console.h:58
Ifx_Assert.h
Assert functions.
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
Ifx_Console::standardIo
IfxStdIf_DPipe * standardIo
Pointer to the IfxStdIf_DPipe object used as general console.
Definition: Ifx_Console.h:57
IfxCpu_Intrinsics.h
Ifx_Console
Definition: Ifx_Console.h:55
Ifx_g_console
Ifx_Console Ifx_g_console
Definition: Ifx_Console.c:50
Ifx_Console_print
boolean Ifx_Console_print(pchar format,...)
Print formatted string into Ifx_g_console.
Definition: Ifx_Console.c:69
IfxStdIf_DPipe_write
IFX_INLINE boolean IfxStdIf_DPipe_write(IfxStdIf_DPipe *stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Write binary data into the IfxStdIf_DPipe.
Definition: IfxStdIf_DPipe.h:259
Ifx_Console_init
void Ifx_Console_init(IfxStdIf_DPipe *standardIo)
Initialize the Ifx_g_console object.
Definition: Ifx_Console.c:56
Ifx_Console_printAlign
boolean Ifx_Console_printAlign(pchar format,...)
Print formatted string into Ifx_g_console. Indented with a number of spaces.
Definition: Ifx_Console.c:98
__min
sint32 __min(sint32, sint32) __attribute__((intrinsic_pseudo(3
TIME_INFINITE
#define TIME_INFINITE
Definition: Ifx_Types.h:77
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
TRUE
#define TRUE
Definition: Platform_Types.h:90
pchar
const char * pchar
const char pointer
Definition: Ifx_Types.h:53


iLLD_TC38A: Ifx_Console.h Source File

  • Service
  • CpuGeneric
  • SysSe
  • Comm
Ifx_Console.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_Console.h
3 * \brief Main Console module header file
4 *
5 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
6 *
7 * $Date: 2014-02-28 14:15:36 GMT$
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 * \defgroup library_srvsw_sysse_comm_console Console
41 * This module implements "Main Console" functions
42 * \ingroup library_srvsw_sysse_comm
43 *
44 */
45 #ifndef IFX_CONSOLE_H
46 #define IFX_CONSOLE_H 1
47
48 #include "StdIf/IfxStdIf_DPipe.h"
49
50 //----------------------------------------------------------------------------------------
51 #if !defined(IFX_CFG_CONSOLE_INDENT_SIZE)
52 #define IFX_CFG_CONSOLE_INDENT_SIZE (4) /**<\brief Default indentation/alignment size */
53 #endif
54
55 typedef struct
56 {
57 IfxStdIf_DPipe *standardIo; /**<\brief Pointer to the \ref IfxStdIf_DPipe object used as general console */
58 sint16 align; /**<\brief Variable for storing the actual (left)indentation level of the \ref Ifx_g_console */
59 } Ifx_Console;
60
61 IFX_EXTERN Ifx_Console Ifx_g_console; /**< \brief Default main console global variable */
62
63 //----------------------------------------------------------------------------------------
64 /** \addtogroup library_srvsw_sysse_comm_console
65 * \{ */
66
67 #ifndef CONSOLE
68
69 /* FIXME (Alann to discuss with Dian) there is no requirement to define multiple console, CONSOLE should be removed, and APIs used instead */
70 /** \brief Alias \ref Ifx_g_console object (by value) */
71 #define CONSOLE Ifx_g_console
72
73 /** \brief Return pointer to the default console object
74 *
75 * User can override this function by defining new \ref CONSOLE macro and this function
76 * externally, e.g. inside Ifx_Cfg.h file.*/
77 IFX_INLINE IfxStdIf_DPipe *Ifx_Console_getIo(void)
78 {
79 return Ifx_g_console.standardIo;
80 }
81
82
83 #endif
84
85 IFX_EXTERN void Ifx_Console_init(IfxStdIf_DPipe *standardIo);
86 IFX_EXTERN boolean Ifx_Console_print(pchar format, ...);
87 IFX_EXTERN boolean Ifx_Console_printAlign(pchar format, ...);
88
89 /**
90 * \brief Decrement the alignment/indentation using the given value
91 * \param value the increment. If value == 0, \ref IFX_CFG_CONSOLE_INDENT_SIZE will be used.
92 */
93 IFX_INLINE void Ifx_Console_decrAlign(sint16 value)
94 {
95 value = (sint16)(Ifx_g_console.align - ((value == 0U) ? IFX_CFG_CONSOLE_INDENT_SIZE : value));
96 Ifx_g_console.align = (value > 0) ? value : 0;
97 }
98
99
100 /**
101 * \brief Increment the alignment/indentation using the given value
102 * \param value the increment. If value == 0, \ref IFX_CFG_CONSOLE_INDENT_SIZE will be used.
103 */
104 IFX_INLINE void Ifx_Console_incrAlign(sint16 value)
105 {
106 Ifx_g_console.align += ((value == 0) ? (sint16)IFX_CFG_CONSOLE_INDENT_SIZE : value);
107 }
108
109
110 /** \} */
111 //----------------------------------------------------------------------------------------
112 #endif
IfxStdIf_DPipe_
Standard interface object.
Definition: IfxStdIf_DPipe.h:230
Ifx_Console::align
sint16 align
Variable for storing the actual (left)indentation level of the Ifx_g_console.
Definition: Ifx_Console.h:58
Ifx_Console_incrAlign
IFX_INLINE void Ifx_Console_incrAlign(sint16 value)
Increment the alignment/indentation using the given value.
Definition: Ifx_Console.h:104
Ifx_Console::standardIo
IfxStdIf_DPipe * standardIo
Pointer to the IfxStdIf_DPipe object used as general console.
Definition: Ifx_Console.h:57
Ifx_Console
Definition: Ifx_Console.h:55
Ifx_Console_getIo
IFX_INLINE IfxStdIf_DPipe * Ifx_Console_getIo(void)
Return pointer to the default console object.
Definition: Ifx_Console.h:77
sint16
short sint16
Definition: Platform_Types.h:129
Ifx_Console_decrAlign
IFX_INLINE void Ifx_Console_decrAlign(sint16 value)
Decrement the alignment/indentation using the given value.
Definition: Ifx_Console.h:93
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IFX_CFG_CONSOLE_INDENT_SIZE
#define IFX_CFG_CONSOLE_INDENT_SIZE
Default indentation/alignment size.
Definition: Ifx_Console.h:52
Ifx_Console_print
IFX_EXTERN boolean Ifx_Console_print(pchar format,...)
Print formatted string into Ifx_g_console.
Definition: Ifx_Console.c:69
Ifx_Console_init
IFX_EXTERN void Ifx_Console_init(IfxStdIf_DPipe *standardIo)
Initialize the Ifx_g_console object.
Definition: Ifx_Console.c:56
Ifx_Console_printAlign
IFX_EXTERN boolean Ifx_Console_printAlign(pchar format,...)
Print formatted string into Ifx_g_console. Indented with a number of spaces.
Definition: Ifx_Console.c:98
IfxStdIf_DPipe.h
Standard interface: Data Pipe.
Ifx_g_console
IFX_EXTERN Ifx_Console Ifx_g_console
Default main console global variable.
Definition: Ifx_Console.h:61
pchar
const char * pchar
const char pointer
Definition: Ifx_Types.h:53


iLLD_TC38A: Ifx_Crc.c Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_Crc.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_Crc.c
3 * \brief CRC algorithm
4 *
5 * \version disabled
6 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41 #include "Ifx_Crc.h"
42
43 uint32 Ifx_Crc_reflect(uint32 crc, sint32 bitnum);
44
45 boolean Ifx_Crc_init(Ifc_Crc *driver, const Ifc_Crc_Table *table, sint32 direct, sint32 refout, uint32 crcinit, uint32 crcxor)
46 {
47 sint32 i;
48 uint32 bit, crc;
49
50 if (crcinit != (crcinit & table->crcmask))
51 {
52 //IfxStdIf_DPipe_print(io,"ERROR, invalid crcinit."ENDL);
53 return FALSE;
54 }
55
56 if (crcxor != (crcxor & table->crcmask))
57 {
58 //IfxStdIf_DPipe_print(io,"ERROR, invalid crcxor."ENDL);
59 return FALSE;
60 }
61
62 driver->table = table;
63 driver->crcxor = crcxor;
64 driver->refout = refout;
65
66 // compute missing initial CRC value
67
68 if (!direct)
69 {
70 driver->crcinit_nondirect = crcinit;
71 crc = crcinit;
72
73 for (i = 0; i < table->order; i++)
74 {
75 bit = crc & table->crchighbit;
76 crc <<= 1;
77
78 if (bit)
79 {
80 crc ^= table->polynom;
81 }
82 }
83
84 crc &= table->crcmask;
85 driver->crcinit_direct = crc;
86 }
87
88 else
89 {
90 driver->crcinit_direct = crcinit;
91 crc = crcinit;
92
93 for (i = 0; i < table->order; i++)
94 {
95 bit = crc & 1;
96
97 if (bit)
98 {
99 crc ^= table->polynom;
100 }
101
102 crc >>= 1;
103
104 if (bit)
105 {
106 crc |= table->crchighbit;
107 }
108 }
109
110 driver->crcinit_nondirect = crc;
111 }
112
113 return TRUE;
114 }
115
116
117 boolean Ifx_Crc_createTable(Ifc_Crc_Table *table, sint32 order, uint32 polynom, sint32 refin)
118 {
119 uint32 crcmask;
120 // at first, compute constant bit masks for whole CRC and CRC high bit
121
122 crcmask = ((((uint32)1 << (order - 1)) - 1) << 1) | 1;
123
124 // check parameters
125
126 if ((order < 1) || (order > 32))
127 {
128 //IfxStdIf_DPipe_print(io,"ERROR, invalid order, it must be between 1..32."ENDL);
129 return FALSE;
130 }
131
132 if (polynom != (polynom & crcmask))
133 {
134 //IfxStdIf_DPipe_print(io,"ERROR, invalid polynom."ENDL);
135 return FALSE;
136 }
137
138 table->order = order;
139 table->polynom = polynom;
140 table->refin = refin;
141 table->crchighbit = (uint32)1 << (order - 1);
142 table->crcmask = crcmask;
143 // generate lookup table
144 // make CRC lookup table used by table algorithms
145 {
146 sint32 i, j;
147 uint32 bit, crc;
148
149 for (i = 0; i < 256; i++)
150 {
151 crc = (uint32)i;
152
153 if (refin)
154 {
155 crc = Ifx_Crc_reflect(crc, 8);
156 }
157
158 crc <<= order - 8;
159
160 for (j = 0; j < 8; j++)
161 {
162 bit = crc & table->crchighbit;
163 crc <<= 1;
164
165 if (bit)
166 {
167 crc ^= polynom;
168 }
169 }
170
171 if (refin)
172 {
173 crc = Ifx_Crc_reflect(crc, order);
174 }
175
176 crc &= crcmask;
177
178 if (order <= 8)
179 {
180 uint8 *crctab = (uint8 *)((uint32)table + sizeof(Ifc_Crc_Table));
181 crctab[i] = (uint8)crc;
182 }
183 else if (order <= 16)
184 {
185 uint16 *crctab = (uint16 *)((uint32)table + sizeof(Ifc_Crc_Table));
186 crctab[i] = (uint16)crc;
187 }
188 else
189 {
190 uint32 *crctab = (uint32 *)((uint32)table + sizeof(Ifc_Crc_Table));
191 crctab[i] = crc;
192 }
193 }
194 }
195 return TRUE;
196 }
197
198
199 // subroutines
200
201 uint32 Ifx_Crc_reflect(uint32 crc, sint32 bitnum)
202 {
203 // reflects the lower 'bitnum' bits of 'crc'
204
205 uint32 i, j = 1, crcout = 0;
206
207 for (i = (uint32)1 << (bitnum - 1); i; i >>= 1)
208 {
209 if (crc & i)
210 {
211 crcout |= j;
212 }
213
214 j <<= 1;
215 }
216
217 return crcout;
218 }
219
220
221 uint32 Ifx_Crc_tableFast(Ifc_Crc *driver, uint8 *p, uint32 len)
222 {
223 // fast lookup table algorithm without augmented zero bytes, e.g. used in pkzip.
224 // only usable with polynom orders of 8, 16, 24 or 32.
225
226 uint32 crc = driver->crcinit_direct;
227 sint32 orderMinusHeight = driver->table->order - 8;
228
229 if (driver->table->refin)
230 {
231 crc = Ifx_Crc_reflect(crc, driver->table->order);
232 }
233
234 if (driver->table->order <= 8)
235 {
236 uint8 *crctab = (uint8 *)((uint32)driver->table + sizeof(Ifc_Crc_Table));
237
238 if (!driver->table->refin)
239 {
240 while (len--)
241 {
242 crc = (crc << 8) ^ crctab[((crc >> (orderMinusHeight)) & 0xff) ^ *p++];
243 }
244 }
245 else
246 {
247 while (len--)
248 {
249 crc = (crc >> 8) ^ crctab[(crc & 0xff) ^ *p++];
250 }
251 }
252 }
253 else if (driver->table->order <= 16)
254 {
255 uint16 *crctab = (uint16 *)((uint32)driver->table + sizeof(Ifc_Crc_Table));
256
257 if (!driver->table->refin)
258 {
259 while (len--)
260 {
261 crc = (crc << 8) ^ crctab[((crc >> (orderMinusHeight)) & 0xff) ^ *p++];
262 }
263 }
264 else
265 {
266 while (len--)
267 {
268 crc = (crc >> 8) ^ crctab[(crc & 0xff) ^ *p++];
269 }
270 }
271 }
272 else
273 {
274 uint32 *crctab = (uint32 *)((uint32)driver->table + sizeof(Ifc_Crc_Table));
275
276 if (!driver->table->refin)
277 {
278 while (len--)
279 {
280 crc = (crc << 8) ^ crctab[((crc >> (orderMinusHeight)) & 0xff) ^ *p++];
281 }
282 }
283 else
284 {
285 while (len--)
286 {
287 crc = (crc >> 8) ^ crctab[(crc & 0xff) ^ *p++];
288 }
289 }
290 }
291
292 if (driver->refout ^ driver->table->refin)
293 {
294 crc = Ifx_Crc_reflect(crc, driver->table->order);
295 }
296
297 crc ^= driver->crcxor;
298 crc &= driver->table->crcmask;
299
300 return crc;
301 }
302
303
304 uint32 Ifx_Crc_table(Ifc_Crc *driver, uint8 *p, uint32 len)
305 {
306 // normal lookup table algorithm with augmented zero bytes.
307 // only usable with polynom orders of 8, 16, 24 or 32.
308
309 uint32 crc = driver->crcinit_nondirect;
310 sint32 orderMinusHeight = driver->table->order - 8;
311
312 if (driver->table->refin)
313 {
314 crc = Ifx_Crc_reflect(crc, driver->table->order);
315 }
316
317 if (driver->table->order <= 8)
318 {
319 uint8 *crctab = (uint8 *)((uint32)driver->table + sizeof(Ifc_Crc_Table));
320
321 if (!driver->table->refin)
322 {
323 while (len--)
324 {
325 crc = ((crc << 8) | *p++) ^ crctab[(crc >> (orderMinusHeight)) & 0xff];
326 }
327 }
328 else
329 {
330 while (len--)
331 {
332 crc = ((crc >> 8) | (*p++ << (orderMinusHeight))) ^ crctab[crc & 0xff];
333 }
334 }
335
336 if (!driver->table->refin)
337 {
338 while (++len < (driver->table->order >> 3))
339 {
340 crc = (crc << 8) ^ crctab[(crc >> (orderMinusHeight)) & 0xff];
341 }
342 }
343 else
344 {
345 while (++len < (driver->table->order >> 3))
346 {
347 crc = (crc >> 8) ^ crctab[crc & 0xff];
348 }
349 }
350 }
351 else if (driver->table->order <= 16)
352 {
353 uint16 *crctab = (uint16 *)((uint32)driver->table + sizeof(Ifc_Crc_Table));
354
355 if (!driver->table->refin)
356 {
357 while (len--)
358 {
359 crc = ((crc << 8) | *p++) ^ crctab[(crc >> (orderMinusHeight)) & 0xff];
360 }
361 }
362 else
363 {
364 while (len--)
365 {
366 crc = ((crc >> 8) | (*p++ << (orderMinusHeight))) ^ crctab[crc & 0xff];
367 }
368 }
369
370 if (!driver->table->refin)
371 {
372 while (++len < (driver->table->order >> 3))
373 {
374 crc = (crc << 8) ^ crctab[(crc >> (orderMinusHeight)) & 0xff];
375 }
376 }
377 else
378 {
379 while (++len < (driver->table->order >> 3))
380 {
381 crc = (crc >> 8) ^ crctab[crc & 0xff];
382 }
383 }
384 }
385 else if (driver->table->order <= 32)
386 {
387 uint32 *crctab = (uint32 *)((uint32)driver->table + sizeof(Ifc_Crc_Table));
388
389 if (!driver->table->refin)
390 {
391 while (len--)
392 {
393 crc = ((crc << 8) | *p++) ^ crctab[(crc >> (orderMinusHeight)) & 0xff];
394 }
395 }
396 else
397 {
398 while (len--)
399 {
400 crc = ((crc >> 8) | (*p++ << (orderMinusHeight))) ^ crctab[crc & 0xff];
401 }
402 }
403
404 if (!driver->table->refin)
405 {
406 while (++len < (driver->table->order >> 3))
407 {
408 crc = (crc << 8) ^ crctab[(crc >> (orderMinusHeight)) & 0xff];
409 }
410 }
411 else
412 {
413 while (++len < (driver->table->order >> 3))
414 {
415 crc = (crc >> 8) ^ crctab[crc & 0xff];
416 }
417 }
418 }
419
420 if (driver->refout ^ driver->table->refin)
421 {
422 crc = Ifx_Crc_reflect(crc, driver->table->order);
423 }
424
425 crc ^= driver->crcxor;
426 crc &= driver->table->crcmask;
427
428 return crc;
429 }
430
431
432 uint32 Ifx_Crc_bitByBit(Ifc_Crc *driver, uint8 *p, uint32 len)
433 {
434 // bit by bit algorithm with augmented zero bytes.
435 // does not use lookup table, suited for polynom driver->table->orders between 1...32.
436
437 uint32 i, j, c, bit;
438 uint32 crc = driver->crcinit_nondirect;
439
440 for (i = 0; i < len; i++)
441 {
442 c = (uint32)*p++;
443
444 if (driver->table->refin)
445 {
446 c = Ifx_Crc_reflect(c, 8);
447 }
448
449 for (j = 0x80; j; j >>= 1)
450 {
451 bit = crc & driver->table->crchighbit;
452 crc <<= 1;
453
454 if (c & j)
455 {
456 crc |= 1;
457 }
458
459 if (bit)
460 {
461 crc ^= driver->table->polynom;
462 }
463 }
464 }
465
466 for (i = 0; i < driver->table->order; i++)
467 {
468 bit = crc & driver->table->crchighbit;
469 crc <<= 1;
470
471 if (bit)
472 {
473 crc ^= driver->table->polynom;
474 }
475 }
476
477 if (driver->refout)
478 {
479 crc = Ifx_Crc_reflect(crc, driver->table->order);
480 }
481
482 crc ^= driver->crcxor;
483 crc &= driver->table->crcmask;
484
485 return crc;
486 }
487
488
489 uint32 Ifx_Crc_bitByBitFast(Ifc_Crc *driver, uint8 *p, uint32 len)
490 {
491 // fast bit by bit algorithm without augmented zero bytes.
492 // does not use lookup table, suited for polynom driver->table->orders between 1...32.
493
494 uint32 i, j, c, bit;
495 uint32 crc = driver->crcinit_direct;
496
497 for (i = 0; i < len; i++)
498 {
499 c = (uint32)*p++;
500
501 if (driver->table->refin)
502 {
503 c = Ifx_Crc_reflect(c, 8);
504 }
505
506 for (j = 0x80; j; j >>= 1)
507 {
508 bit = crc & driver->table->crchighbit;
509 crc <<= 1;
510
511 if (c & j)
512 {
513 bit ^= driver->table->crchighbit;
514 }
515
516 if (bit)
517 {
518 crc ^= driver->table->polynom;
519 }
520 }
521 }
522
523 if (driver->refout)
524 {
525 crc = Ifx_Crc_reflect(crc, driver->table->order);
526 }
527
528 crc ^= driver->crcxor;
529 crc &= driver->table->crcmask;
530
531 return crc;
532 }
533
534
535 #if CRC_ENABLE_DPIPE
536 void Ifx_Crc_printTable(Ifc_Crc_Table *table, IfxStdIf_DPipe *io)
537 {
538 sint32 i = 0;
539
540 uint32 typeSize;
541
542 if (table->order <= 8)
543 {
544 typeSize = 8;
545 }
546 else if (table->order <= 16)
547 {
548 typeSize = 16;
549 }
550 else
551 {
552 typeSize = 32;
553 }
554
555 IfxStdIf_DPipe_print(io, ENDL "Ifc_Crc_Table%d <tabe name> = {" ENDL, typeSize);
556 IfxStdIf_DPipe_print(io, " .data.order=%d," ENDL, table->order);
557 IfxStdIf_DPipe_print(io, " .data.polynom=0x%X," ENDL, table->polynom);
558 IfxStdIf_DPipe_print(io, " .data.refin=%d," ENDL, table->refin);
559 IfxStdIf_DPipe_print(io, " .data.crchighbit=%d," ENDL, table->crchighbit);
560 IfxStdIf_DPipe_print(io, " .data.crcmask=0x%X," ENDL, table->crcmask);
561 IfxStdIf_DPipe_print(io, " .crctab={" ENDL);
562 IfxStdIf_DPipe_print(io, " ");
563
564 while (i < 256)
565 {
566 if (table->order <= 4)
567 {
568 uint8 *crctab = (uint8 *)((uint32)table + sizeof(Ifc_Crc_Table));
569 IfxStdIf_DPipe_print(io, "0x%01X, ", crctab[i]);
570 }
571 else if (table->order <= 8)
572 {
573 uint8 *crctab = (uint8 *)((uint32)table + sizeof(Ifc_Crc_Table));
574 IfxStdIf_DPipe_print(io, "0x%02X, ", crctab[i]);
575 }
576 else if (table->order <= 16)
577 {
578 uint16 *crctab = (uint16 *)((uint32)table + sizeof(Ifc_Crc_Table));
579 IfxStdIf_DPipe_print(io, "0x%04X, ", crctab[i]);
580 }
581 else if (table->order <= 24)
582 {
583 uint32 *crctab = (uint32 *)((uint32)table + sizeof(Ifc_Crc_Table));
584 IfxStdIf_DPipe_print(io, "0x%06X, ", crctab[i]);
585 }
586 else
587 {
588 uint32 *crctab = (uint32 *)((uint32)table + sizeof(Ifc_Crc_Table));
589 IfxStdIf_DPipe_print(io, "0x%08X, ", crctab[i]);
590 }
591
592 i++;
593
594 if ((i % 16) == 0)
595 {
596 IfxStdIf_DPipe_print(io, ENDL " ");
597 }
598 }
599
600 IfxStdIf_DPipe_print(io, " }" ENDL);
601 IfxStdIf_DPipe_print(io, "};" ENDL);
602 }
603
604
605 boolean Ifx_Crc_Test(Ifc_Crc *driver, uint8 *string, uint32 length, IfxStdIf_DPipe *io)
606 {
607 IfxStdIf_DPipe_print(io, "" ENDL);
608 IfxStdIf_DPipe_print(io, "CRC tester v1.1 written on 13/01/2003 by Sven Reifegerste (zorc/reflex)" ENDL);
609 IfxStdIf_DPipe_print(io, "-----------------------------------------------------------------------" ENDL);
610 IfxStdIf_DPipe_print(io, "" ENDL);
611 IfxStdIf_DPipe_print(io, "Parameters:" ENDL);
612 IfxStdIf_DPipe_print(io, "" ENDL);
613 IfxStdIf_DPipe_print(io, " polynom : 0x%x" ENDL, driver->table->polynom);
614 IfxStdIf_DPipe_print(io, " order : %d" ENDL, driver->table->order);
615 IfxStdIf_DPipe_print(io, " crcinit : 0x%x direct, 0x%x nondirect" ENDL, driver->crcinit_direct, driver->crcinit_nondirect);
616 IfxStdIf_DPipe_print(io, " crcxor : 0x%x" ENDL, driver->crcxor);
617 IfxStdIf_DPipe_print(io, " refin : %d" ENDL, driver->table->refin);
618 IfxStdIf_DPipe_print(io, " refout : %d" ENDL, driver->refout);
619 IfxStdIf_DPipe_print(io, "" ENDL);
620 // IfxStdIf_DPipe_print(io," data string : '%s' (%d bytes)"ENDL, string, stringLength);
621 IfxStdIf_DPipe_print(io, "" ENDL);
622 IfxStdIf_DPipe_print(io, "Results:" ENDL);
623 IfxStdIf_DPipe_print(io, "" ENDL);
624 #if 0
625 IfxCpu_Perf perf;
626 uint32 result;
627
628 IfxCpu_resetAndStartCounters(IfxCpu_CounterMode_normal);
629 result = Ifx_Crc_bitByBit(driver, (uint8 *)string, length);
630 perf = IfxCpu_stopCounters();
631 IfxStdIf_DPipe_print(io, " crc bit by bit : 0x%X, %d cycles" ENDL, result, perf.clock.counter);
632
633 IfxCpu_resetAndStartCounters(IfxCpu_CounterMode_normal);
634 result = Ifx_Crc_bitByBitFast(driver, (uint8 *)string, length);
635 perf = IfxCpu_stopCounters();
636 IfxStdIf_DPipe_print(io, " crc bit by bit fast : 0x%X, %d cycles" ENDL, result, perf.clock.counter);
637
638 IfxCpu_resetAndStartCounters(IfxCpu_CounterMode_normal);
639 result = Ifx_Crc_table(driver, (uint8 *)string, length);
640 perf = IfxCpu_stopCounters();
641 IfxStdIf_DPipe_print(io, " crc table : 0x%X, %d cycles" ENDL, result, perf.clock.counter);
642
643 IfxCpu_resetAndStartCounters(IfxCpu_CounterMode_normal);
644 result = Ifx_Crc_tableFast(driver, (uint8 *)string, length);
645 perf = IfxCpu_stopCounters();
646 IfxStdIf_DPipe_print(io, " crc table fast : 0x%X, %d cycles" ENDL, result, perf.clock.counter);
647
648 #endif
649 return TRUE;
650 }
651
652
653 #endif
Ifc_Crc
Definition: Ifx_Crc.h:85
Ifc_Crc_Table::polynom
uint32 polynom
Definition: Ifx_Crc.h:62
IfxStdIf_DPipe_
Standard interface object.
Definition: IfxStdIf_DPipe.h:230
IfxCpu_stopCounters
IFX_INLINE IfxCpu_Perf IfxCpu_stopCounters(void)
Stop instruction and clock counters, return their values.
Definition: IfxCpu.h:1099
IfxCpu_Perf
Performance counter result.
Definition: IfxCpu.h:206
Ifc_Crc::crcxor
uint32 crcxor
Definition: Ifx_Crc.h:87
uint32
unsigned long uint32
Definition: Platform_Types.h:116
ENDL
#define ENDL
Definition: IfxStdIf_DPipe.h:64
Ifc_Crc_Table::crcmask
uint32 crcmask
Definition: Ifx_Crc.h:65
IfxStdIf_DPipe_print
void IfxStdIf_DPipe_print(IfxStdIf_DPipe *stdIf, pchar format,...)
Definition: IfxStdIf_DPipe.c:50
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxCpu_Perf::clock
IfxCpu_Counter clock
CPU clock counter.
Definition: IfxCpu.h:209
Ifx_Crc_tableFast
uint32 Ifx_Crc_tableFast(Ifc_Crc *driver, uint8 *p, uint32 len)
Definition: Ifx_Crc.c:221
Ifx_Crc_table
uint32 Ifx_Crc_table(Ifc_Crc *driver, uint8 *p, uint32 len)
Definition: Ifx_Crc.c:304
Ifc_Crc::crcinit_direct
uint32 crcinit_direct
Definition: Ifx_Crc.h:90
Ifc_Crc::refout
sint32 refout
Definition: Ifx_Crc.h:88
Ifx_Crc_bitByBit
uint32 Ifx_Crc_bitByBit(Ifc_Crc *driver, uint8 *p, uint32 len)
Definition: Ifx_Crc.c:432
Ifx_Crc.h
CRC algorithm.
Ifc_Crc_Table::order
sint32 order
Definition: Ifx_Crc.h:61
IfxCpu_resetAndStartCounters
IFX_INLINE void IfxCpu_resetAndStartCounters(IfxCpu_CounterMode mode)
Reset and start instruction, clock and multi counters.
Definition: IfxCpu.h:1004
Ifc_Crc_Table::crchighbit
uint32 crchighbit
Definition: Ifx_Crc.h:64
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxCpu_Counter::counter
uint32 counter
Counter value.
Definition: IfxCpu.h:196
Ifx_Crc_init
boolean Ifx_Crc_init(Ifc_Crc *driver, const Ifc_Crc_Table *table, sint32 direct, sint32 refout, uint32 crcinit, uint32 crcxor)
Definition: Ifx_Crc.c:45
Ifc_Crc_Table::refin
sint32 refin
Definition: Ifx_Crc.h:63
Ifc_Crc_Table
Definition: Ifx_Crc.h:59
sint32
long sint32
Definition: Platform_Types.h:134
Ifx_Crc_createTable
boolean Ifx_Crc_createTable(Ifc_Crc_Table *table, sint32 order, uint32 polynom, sint32 refin)
Definition: Ifx_Crc.c:117
IfxCpu_CounterMode_normal
Normal counter mode:the counter increments on their respective triggers.
Definition: IfxCpu.h:143
TRUE
#define TRUE
Definition: Platform_Types.h:90
uint8
unsigned char uint8
Definition: Platform_Types.h:108
Ifx_Crc_reflect
uint32 Ifx_Crc_reflect(uint32 crc, sint32 bitnum)
Definition: Ifx_Crc.c:201
Ifx_Crc_bitByBitFast
uint32 Ifx_Crc_bitByBitFast(Ifc_Crc *driver, uint8 *p, uint32 len)
Definition: Ifx_Crc.c:489
Ifc_Crc::crcinit_nondirect
uint32 crcinit_nondirect
Definition: Ifx_Crc.h:91
Ifc_Crc::table
const Ifc_Crc_Table * table
Definition: Ifx_Crc.h:92


iLLD_TC38A: Ifx_Crc.h Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_Crc.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_Crc.h
3 * \brief CRC algorithm
4 *
5 * \version disabled
6 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 * \defgroup library_srvsw_sysse_math_crc CRC
41 * This module implements CRC algorithm
42 * \ingroup library_srvsw_sysse_math
43 *
44 */
45
46 #ifndef IFX_CRC_H
47 #define IFX_CRC_H 1
48 //---------------------------------------------------------------------------
49 #include "Cpu/Std/Ifx_Types.h"
50
51 #ifndef CRC_ENABLE_DPIPE
52 #define CRC_ENABLE_DPIPE 0
53 #endif
54
55 #if CRC_ENABLE_DPIPE
56 #include "IfxStdIf_DPipe.h"
57 #endif
58 //---------------------------------------------------------------------------
59 typedef struct
60 {
61 sint32 order;
62 uint32 polynom;
63 sint32 refin;
64 uint32 crchighbit;
65 uint32 crcmask;
66 }Ifc_Crc_Table;
67 typedef struct
68 {
69 Ifc_Crc_Table data; /**< \brief CRC data, must be 1st member of the struct */
70 uint8 crctab[256]; /**< \brief CRC Table, must be 2st member of the struct */
71 }Ifc_Crc_Table8;
72
73 typedef struct
74 {
75 Ifc_Crc_Table data; /**< \brief CRC data, must be 1st member of the struct */
76 uint16 crctab[256]; /**< \brief CRC Table, must be 2st member of the struct */
77 }Ifc_Crc_Table16;
78
79 typedef struct
80 {
81 Ifc_Crc_Table data; /**< \brief CRC data, must be 1st member of the struct */
82 uint32 crctab[256]; /**< \brief CRC Table, must be 2st member of the struct */
83 }Ifc_Crc_Table32;
84
85 typedef struct
86 {
87 uint32 crcxor;
88 sint32 refout;
89
90 uint32 crcinit_direct;
91 uint32 crcinit_nondirect;
92 const Ifc_Crc_Table *table;
93 }Ifc_Crc;
94
95 /** \addtogroup library_srvsw_sysse_math_crc
96 * \{ */
97 /**
98 * \param direct [0,1] specifies the kind of algorithm: 1=direct, no augmented zero bits
99 * \param driver pointer to the crc driver
100 * \param table pointer to crc table
101 * \param direct direct
102 * \param crcinit is the initial CRC value belonging to that algorithm
103 * \param crcxor is the final XOR value
104 * \param refout [0,1] specifies if the CRC will be reflected before XOR
105 * \param table pointer to the table: Ifc_Crc_Table8, Ifc_Crc_Table16, Ifc_Crc_Table32
106 */
107 boolean Ifx_Crc_init(Ifc_Crc *driver, const Ifc_Crc_Table *table, sint32 direct, sint32 refout, uint32 crcinit, uint32 crcxor);
108 /**
109 * \param table pointer to the crc table
110 * \param order [1..32] is the CRC polynom order, counted without the leading '1' bit
111 * \param polynom is the CRC polynom without leading '1' bit
112 * \param refin [0,1] specifies if a data byte is reflected before processing (UART) or not
113 */
114 boolean Ifx_Crc_createTable(Ifc_Crc_Table *table, sint32 order, uint32 polynom, sint32 refin);
115
116 #if CRC_ENABLE_DPIPE
117 boolean Ifx_Crc_Test(Ifc_Crc *driver, uint8 *string, uint32 length, IfxStdIf_DPipe *io);
118 void Ifx_Crc_printTable(Ifc_Crc_Table *table, IfxStdIf_DPipe *io);
119 #endif
120 uint32 Ifx_Crc_tableFast(Ifc_Crc *driver, uint8 *p, uint32 len);
121 uint32 Ifx_Crc_table(Ifc_Crc *driver, uint8 *p, uint32 len);
122 uint32 Ifx_Crc_bitByBit(Ifc_Crc *driver, uint8 *p, uint32 len);
123 uint32 Ifx_Crc_bitByBitFast(Ifc_Crc *driver, uint8 *p, uint32 len);
124 /** \} */
125
126 //---------------------------------------------------------------------------
127 #endif // IFX_CRC_H
Ifc_Crc
Definition: Ifx_Crc.h:85
Ifc_Crc_Table::polynom
uint32 polynom
Definition: Ifx_Crc.h:62
IfxStdIf_DPipe_
Standard interface object.
Definition: IfxStdIf_DPipe.h:230
Ifc_Crc::crcxor
uint32 crcxor
Definition: Ifx_Crc.h:87
uint32
unsigned long uint32
Definition: Platform_Types.h:116
Ifc_Crc_Table::crcmask
uint32 crcmask
Definition: Ifx_Crc.h:65
Ifx_Crc_tableFast
uint32 Ifx_Crc_tableFast(Ifc_Crc *driver, uint8 *p, uint32 len)
Definition: Ifx_Crc.c:221
Ifx_Crc_table
uint32 Ifx_Crc_table(Ifc_Crc *driver, uint8 *p, uint32 len)
Definition: Ifx_Crc.c:304
Ifc_Crc::crcinit_direct
uint32 crcinit_direct
Definition: Ifx_Crc.h:90
Ifc_Crc::refout
sint32 refout
Definition: Ifx_Crc.h:88
Ifc_Crc_Table8::data
Ifc_Crc_Table data
CRC data, must be 1st member of the struct.
Definition: Ifx_Crc.h:69
Ifx_Crc_bitByBit
uint32 Ifx_Crc_bitByBit(Ifc_Crc *driver, uint8 *p, uint32 len)
Definition: Ifx_Crc.c:432
Ifc_Crc_Table16
Definition: Ifx_Crc.h:73
Ifc_Crc_Table32
Definition: Ifx_Crc.h:79
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxStdIf_DPipe.h
Standard interface: Data Pipe.
Ifc_Crc_Table::order
sint32 order
Definition: Ifx_Crc.h:61
Ifc_Crc_Table::crchighbit
uint32 crchighbit
Definition: Ifx_Crc.h:64
uint16
unsigned short uint16
Definition: Platform_Types.h:112
Ifx_Crc_init
boolean Ifx_Crc_init(Ifc_Crc *driver, const Ifc_Crc_Table *table, sint32 direct, sint32 refout, uint32 crcinit, uint32 crcxor)
Definition: Ifx_Crc.c:45
Ifc_Crc_Table::refin
sint32 refin
Definition: Ifx_Crc.h:63
Ifc_Crc_Table
Definition: Ifx_Crc.h:59
sint32
long sint32
Definition: Platform_Types.h:134
Ifx_Crc_createTable
boolean Ifx_Crc_createTable(Ifc_Crc_Table *table, sint32 order, uint32 polynom, sint32 refin)
Definition: Ifx_Crc.c:117
uint8
unsigned char uint8
Definition: Platform_Types.h:108
Ifc_Crc_Table8
Definition: Ifx_Crc.h:67
Ifx_Crc_bitByBitFast
uint32 Ifx_Crc_bitByBitFast(Ifc_Crc *driver, uint8 *p, uint32 len)
Definition: Ifx_Crc.c:489
Ifc_Crc::crcinit_nondirect
uint32 crcinit_nondirect
Definition: Ifx_Crc.h:91
Ifc_Crc::table
const Ifc_Crc_Table * table
Definition: Ifx_Crc.h:92


iLLD_TC38A: Ifx_DateTime.c Source File

  • Service
  • CpuGeneric
  • SysSe
  • Time
Ifx_DateTime.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_DateTime.c
3 * \brief Date and time functions.
4 *
5 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
6 *
7 * $Date: 2014-02-27 20:08:37 GMT$
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 #include "Ifx_DateTime.h"
43 #include "SysSe/Bsp/Bsp.h"
44
45 /* FIXME make compatible to unix time */
46 sint32 g_DateTimeOffset;
47
48 /** \brief Get the real time
49 * Note that this function is valid only if DateTime_set() has been called */
50 void DateTime_get(Ifx_DateTime *dt)
51 {
52 sint32 seconds = (sint32)(now() / TimeConst_1s);
53
54 seconds = seconds + g_DateTimeOffset;
55 dt->hours = seconds / 3600;
56 dt->minutes = seconds / 60;
57 dt->minutes = dt->minutes % 60;
58 dt->seconds = seconds % 60;
59 }
60
61
62 /** \brief Set the real time */
63 void DateTime_set(Ifx_DateTime *dt)
64 {
65 sint32 seconds = dt->seconds - ((sint32)(now() / TimeConst_1s));
66
67 seconds = seconds + (3600 * dt->hours);
68 seconds = seconds + (60 * dt->minutes);
69 g_DateTimeOffset = seconds;
70 }
DateTime_set
void DateTime_set(Ifx_DateTime *dt)
Set the real time.
Definition: Ifx_DateTime.c:63
now
IFX_INLINE Ifx_TickTime now(void)
Return system timer value (critical section).
Definition: Bsp.h:218
Ifx_DateTime::hours
sint32 hours
Definition: Ifx_DateTime.h:50
Ifx_DateTime::minutes
sint32 minutes
Definition: Ifx_DateTime.h:51
Bsp.h
Board support package.
DateTime_get
void DateTime_get(Ifx_DateTime *dt)
Get the real time Note that this function is valid only if DateTime_set() has been called...
Definition: Ifx_DateTime.c:50
Ifx_DateTime
Definition: Ifx_DateTime.h:48
Ifx_DateTime.h
Date and time functions.
Ifx_DateTime::seconds
sint32 seconds
Definition: Ifx_DateTime.h:52
TimeConst_1s
#define TimeConst_1s
time constant equal to 1s
Definition: Bsp.h:201
sint32
long sint32
Definition: Platform_Types.h:134
g_DateTimeOffset
sint32 g_DateTimeOffset
Definition: Ifx_DateTime.c:46


iLLD_TC38A: Ifx_DateTime.h Source File

  • Service
  • CpuGeneric
  • SysSe
  • Time
Ifx_DateTime.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_DateTime.h
3 * \brief Date and time functions.
4 *
5 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
6 *
7 * $Date: 2014-02-28 14:15:40 GMT$
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 * \defgroup library_srvsw_sysse_time_datetime DateTime
41 * This module implements the Date-Time functions.
42 * \ingroup library_srvsw_sysse_time
43 */
44
45 #ifndef REALTIME_H_
46 #define REALTIME_H_ 1
47 #include "Cpu/Std/Ifx_Types.h"
48 typedef struct
49 {
50 sint32 hours;
51 sint32 minutes;
52 sint32 seconds;
53 } Ifx_DateTime;
54 /** \addtogroup library_srvsw_sysse_time_datetime
55 * \{ */
56 IFX_EXTERN void DateTime_set(Ifx_DateTime *time);
57 IFX_EXTERN void DateTime_get(Ifx_DateTime *time);
58 /** \} */
59
60 #endif /* REALTIME_H_ */
DateTime_set
IFX_EXTERN void DateTime_set(Ifx_DateTime *time)
Set the real time.
Definition: Ifx_DateTime.c:63
Ifx_DateTime::hours
sint32 hours
Definition: Ifx_DateTime.h:50
Ifx_DateTime::minutes
sint32 minutes
Definition: Ifx_DateTime.h:51
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
DateTime_get
IFX_EXTERN void DateTime_get(Ifx_DateTime *time)
Get the real time Note that this function is valid only if DateTime_set() has been called...
Definition: Ifx_DateTime.c:50
Ifx_DateTime
Definition: Ifx_DateTime.h:48
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
Ifx_DateTime::seconds
sint32 seconds
Definition: Ifx_DateTime.h:52
sint32
long sint32
Definition: Platform_Types.h:134


iLLD_TC38A: Ifx_FftF32.c Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_FftF32.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_FftF32.c
3 * \brief Floating-point Fast Fourier Transform
4 *
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "Ifx_FftF32.h"
44 #include <math.h>
45
46 //#include "Compiler.h"
47
48 cfloat32 *Ifx_FftF32_generateTwiddleFactor(cfloat32 *TF, short nX)
49 {
50 int i;
51 double Theta;
52
53 // prepare twiddle coefficients
54 for (i = 0; i < nX / 2; i++)
55 {
56 Theta = 2 * IFX_PI * i / nX;
57
58 TF[i].real = (float32)(cosf(Theta));
59 TF[i].imag = (float32)(-sinf(Theta));
60 }
61
62 return TF;
63 }
64
65
66 /******************************************************************************/
67 unsigned short Ifx_FftF32_reverseBits(unsigned short n, unsigned bits)
68 {
69 /* This code is from:
70 * http://graphics.stanford.edu/~seander/bithacks.html
71 * */
72 unsigned long v = n; // 32-bit word to reverse bit order
73
74 // swap odd and even bits
75 v = ((v >> 1) & 0x55555555UL) | ((v & 0x55555555UL) << 1);
76 // swap consecutive pairs
77 v = ((v >> 2) & 0x33333333UL) | ((v & 0x33333333UL) << 2);
78 // swap nibbles ...
79 v = ((v >> 4) & 0x0F0F0F0FUL) | ((v & 0x0F0F0F0FUL) << 4);
80 // swap bytes
81 v = ((v >> 8) & 0x00FF00FFUL) | ((v & 0x00FF00FFUL) << 8);
82 // swap 2-byte long pairs
83 v = (v >> 16) | (v << 16);
84
85 v = v >> (32 - bits);
86 return (unsigned short)v;
87 }
88
89
90 /******************************************************************************/
91 void Ifx_FftF32_radix2DecimationInTime(cfloat32 *R, unsigned long p)
92 {
93 /* http://www.engineeringproductivitytools.com/stuff/T0001/PT04.HTM#Head317
94 * */
95 /*Perform in place Ifx_FftF32_radix2DecimationInTime of 2^p points (=size of f)
96 * N.B. The input array f is in bit reversed order! So all the
97 * 'even' input samples are in the 'top' half, all the 'odd'
98 * input samples are in the 'bottom' halR..etc (recursively).
99 */
100 /*Ifx_FftF32_radix2DecimationInTime*/
101 unsigned long Bp, Np, Npx, P, b, k, BaseT, BaseB;
102 cfloat32 top, bot;
103 /*initialise pass parameters*/
104 Bp = 1 << (p - 1); /*No. of blocks*/
105 Np = 2; /*No. of points in each block*/
106
107 /*perform p passes*/
108 for (P = 0; P < p; P++)
109 {
110 /*pass loop*/
111 Npx = Np >> 1; /*No. of butterflies*/
112 BaseT = 0; /*Reset even base index*/
113
114 for (b = 0; b < Bp; b++)
115 {
116 /*block loop*/
117 BaseB = BaseT + Npx; /*calc odd base index*/
118
119 for (k = 0; k < Npx; k++)
120 {
121 //printf("P = %d; b = %d; Np = %d; k = %d\n", P, b, Np, k);
122 /*butterfly loop*/
123 top = Ifx_FftF32_lookUpTwiddleFactor(Np, k);
124 bot = IFX_Cf32_mul(&R[BaseB + k], &top); /*twiddle the odd n results*/
125 top = R[BaseT + k];
126 R[BaseT + k] = IFX_Cf32_add(&top, &bot); /*top subset*/
127 R[BaseB + k] = IFX_Cf32_sub(&top, &bot); /*bottom subset*/
128 } /*butterfly loop*/
129
130 BaseT = BaseT + Np; /*start of next block*/
131 } /*block loop*/
132
133 /*calc parameters for next pass*/
134 Bp = Bp >> 1; /*half as many blocks*/
135 Np = Np << 1; /*twice as many points in each block*/
136 } /*pass loop*/
137 } /*Ifx_FftF32_radix2DecimationInTime*/
138
139
140 cfloat32 *Ifx_FftF32_radix2(cfloat32 *R, const cfloat32 *X, unsigned short nX)
141 {
142 unsigned int logN = 31 - __clz(nX);
143 unsigned short n, k;
144
145 /* Arrange in bit-reversed index */
146 for (n = 0; n < nX; n++)
147 {
148 //k = Ifx_FftF32_reverseBits(n, logN);
149 k = Ifx_FftF32_lookUpReversedBits(n, logN);
150 R[k] = X[n];
151 }
152
153 Ifx_FftF32_radix2DecimationInTime(R, logN);
154
155 return R;
156 }
157
158
159 cfloat32 *Ifx_FftF32_radix2I(cfloat32 *R, const cfloat32 *X, unsigned short nX)
160 {
161 unsigned int logN = 31 - __clz(nX);
162 unsigned short n, k = 0;
163
164 /* Arrange in bit-reversed index, and conjugate the input */
165 for (n = 0; n < nX; n++)
166 {
167 //k = Ifx_FftF32_reverseBits(n, logN);
168 k = Ifx_FftF32_lookUpReversedBits(n, logN);
169 R[k].real = X[n].real;
170 R[k].imag = -X[n].imag;
171 }
172
173 Ifx_FftF32_radix2DecimationInTime(R, logN);
174
175 /* Conjugate the output */
176 for (n = 0; n < nX; n++)
177 {
178 R[n].imag = -R[n].imag;
179 }
180
181 return R;
182 }
Ifx_FftF32_generateTwiddleFactor
cfloat32 * Ifx_FftF32_generateTwiddleFactor(cfloat32 *TF, short nX)
Twiddle factor generator.
Definition: Ifx_FftF32.c:48
__clz
sint32 __clz(sint32) __attribute__((intrinsic_pseudo(1
Ifx_FftF32_reverseBits
unsigned short Ifx_FftF32_reverseBits(unsigned short n, unsigned bits)
Calculate the bit-reversed <n> with <bits> as number of bits.
Definition: Ifx_FftF32.c:67
IFX_Cf32_mul
IFX_INLINE cfloat32 IFX_Cf32_mul(const cfloat32 *a, const cfloat32 *b)
Definition: Ifx_Cf32.h:64
float32
float float32
Definition: Platform_Types.h:170
Ifx_FftF32_radix2DecimationInTime
void Ifx_FftF32_radix2DecimationInTime(cfloat32 *R, unsigned long p)
Definition: Ifx_FftF32.c:91
cfloat32::imag
float32 imag
Imaginary part.
Definition: Ifx_Types.h:61
cfloat32
Definition: Ifx_Types.h:58
IFX_PI
#define IFX_PI
Definition: Ifx_Types.h:217
IFX_Cf32_sub
IFX_INLINE cfloat32 IFX_Cf32_sub(const cfloat32 *a, const cfloat32 *b)
Definition: Ifx_Cf32.h:113
cfloat32::real
float32 real
Real part.
Definition: Ifx_Types.h:60
Ifx_FftF32.h
Floating-point Fast Fourier Transform.
Ifx_FftF32_radix2
cfloat32 * Ifx_FftF32_radix2(cfloat32 *R, const cfloat32 *X, unsigned short nX)
Radix-2 Fast-Fourier Transform.
Definition: Ifx_FftF32.c:140
IFX_Cf32_add
IFX_INLINE cfloat32 IFX_Cf32_add(const cfloat32 *a, const cfloat32 *b)
Definition: Ifx_Cf32.h:104
Ifx_FftF32_lookUpTwiddleFactor
IFX_INLINE cfloat32 Ifx_FftF32_lookUpTwiddleFactor(sint32 N, sint32 k)
Lookup from Ifx_g_FftF32_twiddleTable the twiddle factor for N, k.
Definition: Ifx_FftF32.h:99
Ifx_FftF32_radix2I
cfloat32 * Ifx_FftF32_radix2I(cfloat32 *R, const cfloat32 *X, unsigned short nX)
Radix-2 Inverse Fast-Fourier Transform.
Definition: Ifx_FftF32.c:159
Ifx_FftF32_lookUpReversedBits
IFX_INLINE uint16 Ifx_FftF32_lookUpReversedBits(uint16 n, unsigned bits)
Lookup from Ifx_g_FftF32_bitReverseTable the bit-reversed <n> with <bits> as number of bits...
Definition: Ifx_FftF32.h:90


iLLD_TC38A: Ifx_FftF32.h Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_FftF32.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_FftF32.h
3 * \brief Floating-point Fast Fourier Transform
4 * \ingroup library_srvsw_sysse_math_f32_fft
5 *
6 *
7 *
8 * \version disabled
9 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
10 *
11 *
12 * IMPORTANT NOTICE
13 *
14 * Use of this file is subject to the terms of use agreed between (i) you or
15 * the company in which ordinary course of business you are acting and (ii)
16 * Infineon Technologies AG or its licensees. If and as long as no such terms
17 * of use are agreed, use of this file is subject to following:
18 *
19 * Boost Software License - Version 1.0 - August 17th, 2003
20 *
21 * Permission is hereby granted, free of charge, to any person or organization
22 * obtaining a copy of the software and accompanying documentation covered by
23 * this license (the "Software") to use, reproduce, display, distribute,
24 * execute, and transmit the Software, and to prepare derivative works of the
25 * Software, and to permit third-parties to whom the Software is furnished to
26 * do so, all subject to the following:
27 *
28 * The copyright notices in the Software and this entire statement, including
29 * the above license grant, this restriction and the following disclaimer, must
30 * be included in all copies of the Software, in whole or in part, and all
31 * derivative works of the Software, unless such copies or derivative works are
32 * solely in the form of machine-executable object code generated by a source
33 * language processor.
34 *
35 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
36 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
37 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
38 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
39 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
40 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
41 * DEALINGS IN THE SOFTWARE.
42 *
43 * \defgroup library_srvsw_sysse_math_f32_fft Floating-point FFT
44 * This module implements the Fast Fourier Transform in single precision floating-point
45 * \ingroup library_srvsw_sysse_math_f32
46 *
47 */
48
49 #ifndef IFX_FFTF32_H
50 #define IFX_FFTF32_H
51
52 #include "Ifx_Cf32.h"
53
54 /** \brief Maximum FFT resolution (bits).
55 * If redefined, then \ref Ifx_g_FftF32_bitReverseTable and \ref Ifx_g_FftF32_twiddleTable shall be regenerated. */
56 #define IFX_FFTF32_MAX_RESOLUTION (14)
57
58 /** \brief Maximum FFT length.
59 * If redefined, then \ref Ifx_g_FftF32_bitReverseTable and \ref Ifx_g_FftF32_twiddleTable shall be regenerated. */
60 #define IFX_FFTF32_MAX_LENGTH (1U << IFX_FFTF32_MAX_RESOLUTION)
61
62 /** \brief Bit reversal table */
63 IFX_EXTERN IFX_CONST uint16 Ifx_g_FftF32_bitReverseTable[IFX_FFTF32_MAX_LENGTH];
64
65 /** \brief Twiddle factor table */
66 IFX_EXTERN IFX_CONST cfloat32 Ifx_g_FftF32_twiddleTable[IFX_FFTF32_MAX_LENGTH / 2];
67
68 //----------------------------------------------------------------------------------------
69 /** \addtogroup library_srvsw_sysse_math_f32_fft
70 * \{ */
71
72 /** \name Transform functions
73 * \{ */
74
75 /** \brief Twiddle factor generator */
76 IFX_EXTERN cfloat32 *Ifx_FftF32_generateTwiddleFactor(cfloat32 *TF, sint16 nX);
77
78 /** \brief Radix-2 Fast-Fourier Transform */
79 IFX_EXTERN cfloat32 *Ifx_FftF32_radix2(cfloat32 *R, const cfloat32 *X, uint16 nX);
80
81 /** \brief Radix-2 Inverse Fast-Fourier Transform */
82 IFX_EXTERN cfloat32 *Ifx_FftF32_radix2I(cfloat32 *R, const cfloat32 *X, uint16 nX);
83
84 /** \} */
85 //----------------------------------------------------------------------------------------
86 /** \name Utility functions
87 * \{ */
88
89 /** \brief Lookup from \ref Ifx_g_FftF32_bitReverseTable the bit-reversed <n> with <bits> as number of bits */
90 IFX_INLINE uint16 Ifx_FftF32_lookUpReversedBits(uint16 n, unsigned bits)
91 {
92 unsigned shift = IFX_FFTF32_MAX_RESOLUTION - bits;
93 uint16 index = Ifx_g_FftF32_bitReverseTable[n];
94 return index >> shift;
95 }
96
97
98 /** \brief Lookup from \ref Ifx_g_FftF32_twiddleTable the twiddle factor for N, k */
99 IFX_INLINE cfloat32 Ifx_FftF32_lookUpTwiddleFactor(sint32 N, sint32 k)
100 {
101 return Ifx_g_FftF32_twiddleTable[k * IFX_FFTF32_MAX_LENGTH / N];
102 }
103
104
105 /** \brief Calculate the bit-reversed <n> with <bits> as number of bits */
106 IFX_EXTERN uint16 Ifx_FftF32_reverseBits(uint16 n, unsigned bits);
107
108 /** \} */
109 //----------------------------------------------------------------------------------------
110 /** \} */
111
112 #endif /* IFX_FFTF32_H */
Ifx_FftF32_generateTwiddleFactor
IFX_EXTERN cfloat32 * Ifx_FftF32_generateTwiddleFactor(cfloat32 *TF, sint16 nX)
Twiddle factor generator.
Definition: Ifx_FftF32.c:48
Ifx_FftF32_reverseBits
IFX_EXTERN uint16 Ifx_FftF32_reverseBits(uint16 n, unsigned bits)
Calculate the bit-reversed <n> with <bits> as number of bits.
Definition: Ifx_FftF32.c:67
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
cfloat32
Definition: Ifx_Types.h:58
sint16
short sint16
Definition: Platform_Types.h:129
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IFX_FFTF32_MAX_LENGTH
#define IFX_FFTF32_MAX_LENGTH
Maximum FFT length. If redefined, then Ifx_g_FftF32_bitReverseTable and Ifx_g_FftF32_twiddleTable sha...
Definition: Ifx_FftF32.h:60
Ifx_FftF32_radix2
IFX_EXTERN cfloat32 * Ifx_FftF32_radix2(cfloat32 *R, const cfloat32 *X, uint16 nX)
Radix-2 Fast-Fourier Transform.
Definition: Ifx_FftF32.c:140
uint16
unsigned short uint16
Definition: Platform_Types.h:112
Ifx_FftF32_lookUpTwiddleFactor
IFX_INLINE cfloat32 Ifx_FftF32_lookUpTwiddleFactor(sint32 N, sint32 k)
Lookup from Ifx_g_FftF32_twiddleTable the twiddle factor for N, k.
Definition: Ifx_FftF32.h:99
Ifx_g_FftF32_bitReverseTable
IFX_EXTERN IFX_CONST uint16 Ifx_g_FftF32_bitReverseTable[IFX_FFTF32_MAX_LENGTH]
Bit reversal table.
Definition: Ifx_FftF32.h:63
Ifx_Cf32.h
Floating point signal, vector, and matrix library.
sint32
long sint32
Definition: Platform_Types.h:134
IFX_FFTF32_MAX_RESOLUTION
#define IFX_FFTF32_MAX_RESOLUTION
Maximum FFT resolution (bits). If redefined, then Ifx_g_FftF32_bitReverseTable and Ifx_g_FftF32_twidd...
Definition: Ifx_FftF32.h:56
Ifx_g_FftF32_twiddleTable
IFX_EXTERN IFX_CONST cfloat32 Ifx_g_FftF32_twiddleTable[IFX_FFTF32_MAX_LENGTH/2]
Twiddle factor table.
Definition: Ifx_FftF32.h:66
Ifx_FftF32_radix2I
IFX_EXTERN cfloat32 * Ifx_FftF32_radix2I(cfloat32 *R, const cfloat32 *X, uint16 nX)
Radix-2 Inverse Fast-Fourier Transform.
Definition: Ifx_FftF32.c:159
Ifx_FftF32_lookUpReversedBits
IFX_INLINE uint16 Ifx_FftF32_lookUpReversedBits(uint16 n, unsigned bits)
Lookup from Ifx_g_FftF32_bitReverseTable the bit-reversed <n> with <bits> as number of bits...
Definition: Ifx_FftF32.h:90


iLLD_TC38A: Ifx_FftF32_BitReverseTable.c Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_FftF32_BitReverseTable.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_FftF32_BitReverseTable.c
3 * \brief Bit-reversal lookup for Floating-point Fast Fourier Transform
4 *
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "Ifx_FftF32.h"
44
45 /*lint -e915*/
46 CONST_CFG unsigned short Ifx_g_FftF32_bitReverseTable[IFX_FFTF32_MAX_LENGTH] = {
47 0,
48 8192,
49 4096,
50 12288,
51 2048,
52 10240,
53 6144,
54 14336,
55 1024,
56 9216,
57 5120,
58 13312,
59 3072,
60 11264,
61 7168,
62 15360,
63 512,
64 8704,
65 4608,
66 12800,
67 2560,
68 10752,
69 6656,
70 14848,
71 1536,
72 9728,
73 5632,
74 13824,
75 3584,
76 11776,
77 7680,
78 15872,
79 256,
80 8448,
81 4352,
82 12544,
83 2304,
84 10496,
85 6400,
86 14592,
87 1280,
88 9472,
89 5376,
90 13568,
91 3328,
92 11520,
93 7424,
94 15616,
95 768,
96 8960,
97 4864,
98 13056,
99 2816,
100 11008,
101 6912,
102 15104,
103 1792,
104 9984,
105 5888,
106 14080,
107 3840,
108 12032,
109 7936,
110 16128,
111 128,
112 8320,
113 4224,
114 12416,
115 2176,
116 10368,
117 6272,
118 14464,
119 1152,
120 9344,
121 5248,
122 13440,
123 3200,
124 11392,
125 7296,
126 15488,
127 640,
128 8832,
129 4736,
130 12928,
131 2688,
132 10880,
133 6784,
134 14976,
135 1664,
136 9856,
137 5760,
138 13952,
139 3712,
140 11904,
141 7808,
142 16000,
143 384,
144 8576,
145 4480,
146 12672,
147 2432,
148 10624,
149 6528,
150 14720,
151 1408,
152 9600,
153 5504,
154 13696,
155 3456,
156 11648,
157 7552,
158 15744,
159 896,
160 9088,
161 4992,
162 13184,
163 2944,
164 11136,
165 7040,
166 15232,
167 1920,
168 10112,
169 6016,
170 14208,
171 3968,
172 12160,
173 8064,
174 16256,
175 64,
176 8256,
177 4160,
178 12352,
179 2112,
180 10304,
181 6208,
182 14400,
183 1088,
184 9280,
185 5184,
186 13376,
187 3136,
188 11328,
189 7232,
190 15424,
191 576,
192 8768,
193 4672,
194 12864,
195 2624,
196 10816,
197 6720,
198 14912,
199 1600,
200 9792,
201 5696,
202 13888,
203 3648,
204 11840,
205 7744,
206 15936,
207 320,
208 8512,
209 4416,
210 12608,
211 2368,
212 10560,
213 6464,
214 14656,
215 1344,
216 9536,
217 5440,
218 13632,
219 3392,
220 11584,
221 7488,
222 15680,
223 832,
224 9024,
225 4928,
226 13120,
227 2880,
228 11072,
229 6976,
230 15168,
231 1856,
232 10048,
233 5952,
234 14144,
235 3904,
236 12096,
237 8000,
238 16192,
239 192,
240 8384,
241 4288,
242 12480,
243 2240,
244 10432,
245 6336,
246 14528,
247 1216,
248 9408,
249 5312,
250 13504,
251 3264,
252 11456,
253 7360,
254 15552,
255 704,
256 8896,
257 4800,
258 12992,
259 2752,
260 10944,
261 6848,
262 15040,
263 1728,
264 9920,
265 5824,
266 14016,
267 3776,
268 11968,
269 7872,
270 16064,
271 448,
272 8640,
273 4544,
274 12736,
275 2496,
276 10688,
277 6592,
278 14784,
279 1472,
280 9664,
281 5568,
282 13760,
283 3520,
284 11712,
285 7616,
286 15808,
287 960,
288 9152,
289 5056,
290 13248,
291 3008,
292 11200,
293 7104,
294 15296,
295 1984,
296 10176,
297 6080,
298 14272,
299 4032,
300 12224,
301 8128,
302 16320,
303 32,
304 8224,
305 4128,
306 12320,
307 2080,
308 10272,
309 6176,
310 14368,
311 1056,
312 9248,
313 5152,
314 13344,
315 3104,
316 11296,
317 7200,
318 15392,
319 544,
320 8736,
321 4640,
322 12832,
323 2592,
324 10784,
325 6688,
326 14880,
327 1568,
328 9760,
329 5664,
330 13856,
331 3616,
332 11808,
333 7712,
334 15904,
335 288,
336 8480,
337 4384,
338 12576,
339 2336,
340 10528,
341 6432,
342 14624,
343 1312,
344 9504,
345 5408,
346 13600,
347 3360,
348 11552,
349 7456,
350 15648,
351 800,
352 8992,
353 4896,
354 13088,
355 2848,
356 11040,
357 6944,
358 15136,
359 1824,
360 10016,
361 5920,
362 14112,
363 3872,
364 12064,
365 7968,
366 16160,
367 160,
368 8352,
369 4256,
370 12448,
371 2208,
372 10400,
373 6304,
374 14496,
375 1184,
376 9376,
377 5280,
378 13472,
379 3232,
380 11424,
381 7328,
382 15520,
383 672,
384 8864,
385 4768,
386 12960,
387 2720,
388 10912,
389 6816,
390 15008,
391 1696,
392 9888,
393 5792,
394 13984,
395 3744,
396 11936,
397 7840,
398 16032,
399 416,
400 8608,
401 4512,
402 12704,
403 2464,
404 10656,
405 6560,
406 14752,
407 1440,
408 9632,
409 5536,
410 13728,
411 3488,
412 11680,
413 7584,
414 15776,
415 928,
416 9120,
417 5024,
418 13216,
419 2976,
420 11168,
421 7072,
422 15264,
423 1952,
424 10144,
425 6048,
426 14240,
427 4000,
428 12192,
429 8096,
430 16288,
431 96,
432 8288,
433 4192,
434 12384,
435 2144,
436 10336,
437 6240,
438 14432,
439 1120,
440 9312,
441 5216,
442 13408,
443 3168,
444 11360,
445 7264,
446 15456,
447 608,
448 8800,
449 4704,
450 12896,
451 2656,
452 10848,
453 6752,
454 14944,
455 1632,
456 9824,
457 5728,
458 13920,
459 3680,
460 11872,
461 7776,
462 15968,
463 352,
464 8544,
465 4448,
466 12640,
467 2400,
468 10592,
469 6496,
470 14688,
471 1376,
472 9568,
473 5472,
474 13664,
475 3424,
476 11616,
477 7520,
478 15712,
479 864,
480 9056,
481 4960,
482 13152,
483 2912,
484 11104,
485 7008,
486 15200,
487 1888,
488 10080,
489 5984,
490 14176,
491 3936,
492 12128,
493 8032,
494 16224,
495 224,
496 8416,
497 4320,
498 12512,
499 2272,
500 10464,
501 6368,
502 14560,
503 1248,
504 9440,
505 5344,
506 13536,
507 3296,
508 11488,
509 7392,
510 15584,
511 736,
512 8928,
513 4832,
514 13024,
515 2784,
516 10976,
517 6880,
518 15072,
519 1760,
520 9952,
521 5856,
522 14048,
523 3808,
524 12000,
525 7904,
526 16096,
527 480,
528 8672,
529 4576,
530 12768,
531 2528,
532 10720,
533 6624,
534 14816,
535 1504,
536 9696,
537 5600,
538 13792,
539 3552,
540 11744,
541 7648,
542 15840,
543 992,
544 9184,
545 5088,
546 13280,
547 3040,
548 11232,
549 7136,
550 15328,
551 2016,
552 10208,
553 6112,
554 14304,
555 4064,
556 12256,
557 8160,
558 16352,
559 16,
560 8208,
561 4112,
562 12304,
563 2064,
564 10256,
565 6160,
566 14352,
567 1040,
568 9232,
569 5136,
570 13328,
571 3088,
572 11280,
573 7184,
574 15376,
575 528,
576 8720,
577 4624,
578 12816,
579 2576,
580 10768,
581 6672,
582 14864,
583 1552,
584 9744,
585 5648,
586 13840,
587 3600,
588 11792,
589 7696,
590 15888,
591 272,
592 8464,
593 4368,
594 12560,
595 2320,
596 10512,
597 6416,
598 14608,
599 1296,
600 9488,
601 5392,
602 13584,
603 3344,
604 11536,
605 7440,
606 15632,
607 784,
608 8976,
609 4880,
610 13072,
611 2832,
612 11024,
613 6928,
614 15120,
615 1808,
616 10000,
617 5904,
618 14096,
619 3856,
620 12048,
621 7952,
622 16144,
623 144,
624 8336,
625 4240,
626 12432,
627 2192,
628 10384,
629 6288,
630 14480,
631 1168,
632 9360,
633 5264,
634 13456,
635 3216,
636 11408,
637 7312,
638 15504,
639 656,
640 8848,
641 4752,
642 12944,
643 2704,
644 10896,
645 6800,
646 14992,
647 1680,
648 9872,
649 5776,
650 13968,
651 3728,
652 11920,
653 7824,
654 16016,
655 400,
656 8592,
657 4496,
658 12688,
659 2448,
660 10640,
661 6544,
662 14736,
663 1424,
664 9616,
665 5520,
666 13712,
667 3472,
668 11664,
669 7568,
670 15760,
671 912,
672 9104,
673 5008,
674 13200,
675 2960,
676 11152,
677 7056,
678 15248,
679 1936,
680 10128,
681 6032,
682 14224,
683 3984,
684 12176,
685 8080,
686 16272,
687 80,
688 8272,
689 4176,
690 12368,
691 2128,
692 10320,
693 6224,
694 14416,
695 1104,
696 9296,
697 5200,
698 13392,
699 3152,
700 11344,
701 7248,
702 15440,
703 592,
704 8784,
705 4688,
706 12880,
707 2640,
708 10832,
709 6736,
710 14928,
711 1616,
712 9808,
713 5712,
714 13904,
715 3664,
716 11856,
717 7760,
718 15952,
719 336,
720 8528,
721 4432,
722 12624,
723 2384,
724 10576,
725 6480,
726 14672,
727 1360,
728 9552,
729 5456,
730 13648,
731 3408,
732 11600,
733 7504,
734 15696,
735 848,
736 9040,
737 4944,
738 13136,
739 2896,
740 11088,
741 6992,
742 15184,
743 1872,
744 10064,
745 5968,
746 14160,
747 3920,
748 12112,
749 8016,
750 16208,
751 208,
752 8400,
753 4304,
754 12496,
755 2256,
756 10448,
757 6352,
758 14544,
759 1232,
760 9424,
761 5328,
762 13520,
763 3280,
764 11472,
765 7376,
766 15568,
767 720,
768 8912,
769 4816,
770 13008,
771 2768,
772 10960,
773 6864,
774 15056,
775 1744,
776 9936,
777 5840,
778 14032,
779 3792,
780 11984,
781 7888,
782 16080,
783 464,
784 8656,
785 4560,
786 12752,
787 2512,
788 10704,
789 6608,
790 14800,
791 1488,
792 9680,
793 5584,
794 13776,
795 3536,
796 11728,
797 7632,
798 15824,
799 976,
800 9168,
801 5072,
802 13264,
803 3024,
804 11216,
805 7120,
806 15312,
807 2000,
808 10192,
809 6096,
810 14288,
811 4048,
812 12240,
813 8144,
814 16336,
815 48,
816 8240,
817 4144,
818 12336,
819 2096,
820 10288,
821 6192,
822 14384,
823 1072,
824 9264,
825 5168,
826 13360,
827 3120,
828 11312,
829 7216,
830 15408,
831 560,
832 8752,
833 4656,
834 12848,
835 2608,
836 10800,
837 6704,
838 14896,
839 1584,
840 9776,
841 5680,
842 13872,
843 3632,
844 11824,
845 7728,
846 15920,
847 304,
848 8496,
849 4400,
850 12592,
851 2352,
852 10544,
853 6448,
854 14640,
855 1328,
856 9520,
857 5424,
858 13616,
859 3376,
860 11568,
861 7472,
862 15664,
863 816,
864 9008,
865 4912,
866 13104,
867 2864,
868 11056,
869 6960,
870 15152,
871 1840,
872 10032,
873 5936,
874 14128,
875 3888,
876 12080,
877 7984,
878 16176,
879 176,
880 8368,
881 4272,
882 12464,
883 2224,
884 10416,
885 6320,
886 14512,
887 1200,
888 9392,
889 5296,
890 13488,
891 3248,
892 11440,
893 7344,
894 15536,
895 688,
896 8880,
897 4784,
898 12976,
899 2736,
900 10928,
901 6832,
902 15024,
903 1712,
904 9904,
905 5808,
906 14000,
907 3760,
908 11952,
909 7856,
910 16048,
911 432,
912 8624,
913 4528,
914 12720,
915 2480,
916 10672,
917 6576,
918 14768,
919 1456,
920 9648,
921 5552,
922 13744,
923 3504,
924 11696,
925 7600,
926 15792,
927 944,
928 9136,
929 5040,
930 13232,
931 2992,
932 11184,
933 7088,
934 15280,
935 1968,
936 10160,
937 6064,
938 14256,
939 4016,
940 12208,
941 8112,
942 16304,
943 112,
944 8304,
945 4208,
946 12400,
947 2160,
948 10352,
949 6256,
950 14448,
951 1136,
952 9328,
953 5232,
954 13424,
955 3184,
956 11376,
957 7280,
958 15472,
959 624,
960 8816,
961 4720,
962 12912,
963 2672,
964 10864,
965 6768,
966 14960,
967 1648,
968 9840,
969 5744,
970 13936,
971 3696,
972 11888,
973 7792,
974 15984,
975 368,
976 8560,
977 4464,
978 12656,
979 2416,
980 10608,
981 6512,
982 14704,
983 1392,
984 9584,
985 5488,
986 13680,
987 3440,
988 11632,
989 7536,
990 15728,
991 880,
992 9072,
993 4976,
994 13168,
995 2928,
996 11120,
997 7024,
998 15216,
999 1904,
1000 10096,
1001 6000,
1002 14192,
1003 3952,
1004 12144,
1005 8048,
1006 16240,
1007 240,
1008 8432,
1009 4336,
1010 12528,
1011 2288,
1012 10480,
1013 6384,
1014 14576,
1015 1264,
1016 9456,
1017 5360,
1018 13552,
1019 3312,
1020 11504,
1021 7408,
1022 15600,
1023 752,
1024 8944,
1025 4848,
1026 13040,
1027 2800,
1028 10992,
1029 6896,
1030 15088,
1031 1776,
1032 9968,
1033 5872,
1034 14064,
1035 3824,
1036 12016,
1037 7920,
1038 16112,
1039 496,
1040 8688,
1041 4592,
1042 12784,
1043 2544,
1044 10736,
1045 6640,
1046 14832,
1047 1520,
1048 9712,
1049 5616,
1050 13808,
1051 3568,
1052 11760,
1053 7664,
1054 15856,
1055 1008,
1056 9200,
1057 5104,
1058 13296,
1059 3056,
1060 11248,
1061 7152,
1062 15344,
1063 2032,
1064 10224,
1065 6128,
1066 14320,
1067 4080,
1068 12272,
1069 8176,
1070 16368,
1071 8,
1072 8200,
1073 4104,
1074 12296,
1075 2056,
1076 10248,
1077 6152,
1078 14344,
1079 1032,
1080 9224,
1081 5128,
1082 13320,
1083 3080,
1084 11272,
1085 7176,
1086 15368,
1087 520,
1088 8712,
1089 4616,
1090 12808,
1091 2568,
1092 10760,
1093 6664,
1094 14856,
1095 1544,
1096 9736,
1097 5640,
1098 13832,
1099 3592,
1100 11784,
1101 7688,
1102 15880,
1103 264,
1104 8456,
1105 4360,
1106 12552,
1107 2312,
1108 10504,
1109 6408,
1110 14600,
1111 1288,
1112 9480,
1113 5384,
1114 13576,
1115 3336,
1116 11528,
1117 7432,
1118 15624,
1119 776,
1120 8968,
1121 4872,
1122 13064,
1123 2824,
1124 11016,
1125 6920,
1126 15112,
1127 1800,
1128 9992,
1129 5896,
1130 14088,
1131 3848,
1132 12040,
1133 7944,
1134 16136,
1135 136,
1136 8328,
1137 4232,
1138 12424,
1139 2184,
1140 10376,
1141 6280,
1142 14472,
1143 1160,
1144 9352,
1145 5256,
1146 13448,
1147 3208,
1148 11400,
1149 7304,
1150 15496,
1151 648,
1152 8840,
1153 4744,
1154 12936,
1155 2696,
1156 10888,
1157 6792,
1158 14984,
1159 1672,
1160 9864,
1161 5768,
1162 13960,
1163 3720,
1164 11912,
1165 7816,
1166 16008,
1167 392,
1168 8584,
1169 4488,
1170 12680,
1171 2440,
1172 10632,
1173 6536,
1174 14728,
1175 1416,
1176 9608,
1177 5512,
1178 13704,
1179 3464,
1180 11656,
1181 7560,
1182 15752,
1183 904,
1184 9096,
1185 5000,
1186 13192,
1187 2952,
1188 11144,
1189 7048,
1190 15240,
1191 1928,
1192 10120,
1193 6024,
1194 14216,
1195 3976,
1196 12168,
1197 8072,
1198 16264,
1199 72,
1200 8264,
1201 4168,
1202 12360,
1203 2120,
1204 10312,
1205 6216,
1206 14408,
1207 1096,
1208 9288,
1209 5192,
1210 13384,
1211 3144,
1212 11336,
1213 7240,
1214 15432,
1215 584,
1216 8776,
1217 4680,
1218 12872,
1219 2632,
1220 10824,
1221 6728,
1222 14920,
1223 1608,
1224 9800,
1225 5704,
1226 13896,
1227 3656,
1228 11848,
1229 7752,
1230 15944,
1231 328,
1232 8520,
1233 4424,
1234 12616,
1235 2376,
1236 10568,
1237 6472,
1238 14664,
1239 1352,
1240 9544,
1241 5448,
1242 13640,
1243 3400,
1244 11592,
1245 7496,
1246 15688,
1247 840,
1248 9032,
1249 4936,
1250 13128,
1251 2888,
1252 11080,
1253 6984,
1254 15176,
1255 1864,
1256 10056,
1257 5960,
1258 14152,
1259 3912,
1260 12104,
1261 8008,
1262 16200,
1263 200,
1264 8392,
1265 4296,
1266 12488,
1267 2248,
1268 10440,
1269 6344,
1270 14536,
1271 1224,
1272 9416,
1273 5320,
1274 13512,
1275 3272,
1276 11464,
1277 7368,
1278 15560,
1279 712,
1280 8904,
1281 4808,
1282 13000,
1283 2760,
1284 10952,
1285 6856,
1286 15048,
1287 1736,
1288 9928,
1289 5832,
1290 14024,
1291 3784,
1292 11976,
1293 7880,
1294 16072,
1295 456,
1296 8648,
1297 4552,
1298 12744,
1299 2504,
1300 10696,
1301 6600,
1302 14792,
1303 1480,
1304 9672,
1305 5576,
1306 13768,
1307 3528,
1308 11720,
1309 7624,
1310 15816,
1311 968,
1312 9160,
1313 5064,
1314 13256,
1315 3016,
1316 11208,
1317 7112,
1318 15304,
1319 1992,
1320 10184,
1321 6088,
1322 14280,
1323 4040,
1324 12232,
1325 8136,
1326 16328,
1327 40,
1328 8232,
1329 4136,
1330 12328,
1331 2088,
1332 10280,
1333 6184,
1334 14376,
1335 1064,
1336 9256,
1337 5160,
1338 13352,
1339 3112,
1340 11304,
1341 7208,
1342 15400,
1343 552,
1344 8744,
1345 4648,
1346 12840,
1347 2600,
1348 10792,
1349 6696,
1350 14888,
1351 1576,
1352 9768,
1353 5672,
1354 13864,
1355 3624,
1356 11816,
1357 7720,
1358 15912,
1359 296,
1360 8488,
1361 4392,
1362 12584,
1363 2344,
1364 10536,
1365 6440,
1366 14632,
1367 1320,
1368 9512,
1369 5416,
1370 13608,
1371 3368,
1372 11560,
1373 7464,
1374 15656,
1375 808,
1376 9000,
1377 4904,
1378 13096,
1379 2856,
1380 11048,
1381 6952,
1382 15144,
1383 1832,
1384 10024,
1385 5928,
1386 14120,
1387 3880,
1388 12072,
1389 7976,
1390 16168,
1391 168,
1392 8360,
1393 4264,
1394 12456,
1395 2216,
1396 10408,
1397 6312,
1398 14504,
1399 1192,
1400 9384,
1401 5288,
1402 13480,
1403 3240,
1404 11432,
1405 7336,
1406 15528,
1407 680,
1408 8872,
1409 4776,
1410 12968,
1411 2728,
1412 10920,
1413 6824,
1414 15016,
1415 1704,
1416 9896,
1417 5800,
1418 13992,
1419 3752,
1420 11944,
1421 7848,
1422 16040,
1423 424,
1424 8616,
1425 4520,
1426 12712,
1427 2472,
1428 10664,
1429 6568,
1430 14760,
1431 1448,
1432 9640,
1433 5544,
1434 13736,
1435 3496,
1436 11688,
1437 7592,
1438 15784,
1439 936,
1440 9128,
1441 5032,
1442 13224,
1443 2984,
1444 11176,
1445 7080,
1446 15272,
1447 1960,
1448 10152,
1449 6056,
1450 14248,
1451 4008,
1452 12200,
1453 8104,
1454 16296,
1455 104,
1456 8296,
1457 4200,
1458 12392,
1459 2152,
1460 10344,
1461 6248,
1462 14440,
1463 1128,
1464 9320,
1465 5224,
1466 13416,
1467 3176,
1468 11368,
1469 7272,
1470 15464,
1471 616,
1472 8808,
1473 4712,
1474 12904,
1475 2664,
1476 10856,
1477 6760,
1478 14952,
1479 1640,
1480 9832,
1481 5736,
1482 13928,
1483 3688,
1484 11880,
1485 7784,
1486 15976,
1487 360,
1488 8552,
1489 4456,
1490 12648,
1491 2408,
1492 10600,
1493 6504,
1494 14696,
1495 1384,
1496 9576,
1497 5480,
1498 13672,
1499 3432,
1500 11624,
1501 7528,
1502 15720,
1503 872,
1504 9064,
1505 4968,
1506 13160,
1507 2920,
1508 11112,
1509 7016,
1510 15208,
1511 1896,
1512 10088,
1513 5992,
1514 14184,
1515 3944,
1516 12136,
1517 8040,
1518 16232,
1519 232,
1520 8424,
1521 4328,
1522 12520,
1523 2280,
1524 10472,
1525 6376,
1526 14568,
1527 1256,
1528 9448,
1529 5352,
1530 13544,
1531 3304,
1532 11496,
1533 7400,
1534 15592,
1535 744,
1536 8936,
1537 4840,
1538 13032,
1539 2792,
1540 10984,
1541 6888,
1542 15080,
1543 1768,
1544 9960,
1545 5864,
1546 14056,
1547 3816,
1548 12008,
1549 7912,
1550 16104,
1551 488,
1552 8680,
1553 4584,
1554 12776,
1555 2536,
1556 10728,
1557 6632,
1558 14824,
1559 1512,
1560 9704,
1561 5608,
1562 13800,
1563 3560,
1564 11752,
1565 7656,
1566 15848,
1567 1000,
1568 9192,
1569 5096,
1570 13288,
1571 3048,
1572 11240,
1573 7144,
1574 15336,
1575 2024,
1576 10216,
1577 6120,
1578 14312,
1579 4072,
1580 12264,
1581 8168,
1582 16360,
1583 24,
1584 8216,
1585 4120,
1586 12312,
1587 2072,
1588 10264,
1589 6168,
1590 14360,
1591 1048,
1592 9240,
1593 5144,
1594 13336,
1595 3096,
1596 11288,
1597 7192,
1598 15384,
1599 536,
1600 8728,
1601 4632,
1602 12824,
1603 2584,
1604 10776,
1605 6680,
1606 14872,
1607 1560,
1608 9752,
1609 5656,
1610 13848,
1611 3608,
1612 11800,
1613 7704,
1614 15896,
1615 280,
1616 8472,
1617 4376,
1618 12568,
1619 2328,
1620 10520,
1621 6424,
1622 14616,
1623 1304,
1624 9496,
1625 5400,
1626 13592,
1627 3352,
1628 11544,
1629 7448,
1630 15640,
1631 792,
1632 8984,
1633 4888,
1634 13080,
1635 2840,
1636 11032,
1637 6936,
1638 15128,
1639 1816,
1640 10008,
1641 5912,
1642 14104,
1643 3864,
1644 12056,
1645 7960,
1646 16152,
1647 152,
1648 8344,
1649 4248,
1650 12440,
1651 2200,
1652 10392,
1653 6296,
1654 14488,
1655 1176,
1656 9368,
1657 5272,
1658 13464,
1659 3224,
1660 11416,
1661 7320,
1662 15512,
1663 664,
1664 8856,
1665 4760,
1666 12952,
1667 2712,
1668 10904,
1669 6808,
1670 15000,
1671 1688,
1672 9880,
1673 5784,
1674 13976,
1675 3736,
1676 11928,
1677 7832,
1678 16024,
1679 408,
1680 8600,
1681 4504,
1682 12696,
1683 2456,
1684 10648,
1685 6552,
1686 14744,
1687 1432,
1688 9624,
1689 5528,
1690 13720,
1691 3480,
1692 11672,
1693 7576,
1694 15768,
1695 920,
1696 9112,
1697 5016,
1698 13208,
1699 2968,
1700 11160,
1701 7064,
1702 15256,
1703 1944,
1704 10136,
1705 6040,
1706 14232,
1707 3992,
1708 12184,
1709 8088,
1710 16280,
1711 88,
1712 8280,
1713 4184,
1714 12376,
1715 2136,
1716 10328,
1717 6232,
1718 14424,
1719 1112,
1720 9304,
1721 5208,
1722 13400,
1723 3160,
1724 11352,
1725 7256,
1726 15448,
1727 600,
1728 8792,
1729 4696,
1730 12888,
1731 2648,
1732 10840,
1733 6744,
1734 14936,
1735 1624,
1736 9816,
1737 5720,
1738 13912,
1739 3672,
1740 11864,
1741 7768,
1742 15960,
1743 344,
1744 8536,
1745 4440,
1746 12632,
1747 2392,
1748 10584,
1749 6488,
1750 14680,
1751 1368,
1752 9560,
1753 5464,
1754 13656,
1755 3416,
1756 11608,
1757 7512,
1758 15704,
1759 856,
1760 9048,
1761 4952,
1762 13144,
1763 2904,
1764 11096,
1765 7000,
1766 15192,
1767 1880,
1768 10072,
1769 5976,
1770 14168,
1771 3928,
1772 12120,
1773 8024,
1774 16216,
1775 216,
1776 8408,
1777 4312,
1778 12504,
1779 2264,
1780 10456,
1781 6360,
1782 14552,
1783 1240,
1784 9432,
1785 5336,
1786 13528,
1787 3288,
1788 11480,
1789 7384,
1790 15576,
1791 728,
1792 8920,
1793 4824,
1794 13016,
1795 2776,
1796 10968,
1797 6872,
1798 15064,
1799 1752,
1800 9944,
1801 5848,
1802 14040,
1803 3800,
1804 11992,
1805 7896,
1806 16088,
1807 472,
1808 8664,
1809 4568,
1810 12760,
1811 2520,
1812 10712,
1813 6616,
1814 14808,
1815 1496,
1816 9688,
1817 5592,
1818 13784,
1819 3544,
1820 11736,
1821 7640,
1822 15832,
1823 984,
1824 9176,
1825 5080,
1826 13272,
1827 3032,
1828 11224,
1829 7128,
1830 15320,
1831 2008,
1832 10200,
1833 6104,
1834 14296,
1835 4056,
1836 12248,
1837 8152,
1838 16344,
1839 56,
1840 8248,
1841 4152,
1842 12344,
1843 2104,
1844 10296,
1845 6200,
1846 14392,
1847 1080,
1848 9272,
1849 5176,
1850 13368,
1851 3128,
1852 11320,
1853 7224,
1854 15416,
1855 568,
1856 8760,
1857 4664,
1858 12856,
1859 2616,
1860 10808,
1861 6712,
1862 14904,
1863 1592,
1864 9784,
1865 5688,
1866 13880,
1867 3640,
1868 11832,
1869 7736,
1870 15928,
1871 312,
1872 8504,
1873 4408,
1874 12600,
1875 2360,
1876 10552,
1877 6456,
1878 14648,
1879 1336,
1880 9528,
1881 5432,
1882 13624,
1883 3384,
1884 11576,
1885 7480,
1886 15672,
1887 824,
1888 9016,
1889 4920,
1890 13112,
1891 2872,
1892 11064,
1893 6968,
1894 15160,
1895 1848,
1896 10040,
1897 5944,
1898 14136,
1899 3896,
1900 12088,
1901 7992,
1902 16184,
1903 184,
1904 8376,
1905 4280,
1906 12472,
1907 2232,
1908 10424,
1909 6328,
1910 14520,
1911 1208,
1912 9400,
1913 5304,
1914 13496,
1915 3256,
1916 11448,
1917 7352,
1918 15544,
1919 696,
1920 8888,
1921 4792,
1922 12984,
1923 2744,
1924 10936,
1925 6840,
1926 15032,
1927 1720,
1928 9912,
1929 5816,
1930 14008,
1931 3768,
1932 11960,
1933 7864,
1934 16056,
1935 440,
1936 8632,
1937 4536,
1938 12728,
1939 2488,
1940 10680,
1941 6584,
1942 14776,
1943 1464,
1944 9656,
1945 5560,
1946 13752,
1947 3512,
1948 11704,
1949 7608,
1950 15800,
1951 952,
1952 9144,
1953 5048,
1954 13240,
1955 3000,
1956 11192,
1957 7096,
1958 15288,
1959 1976,
1960 10168,
1961 6072,
1962 14264,
1963 4024,
1964 12216,
1965 8120,
1966 16312,
1967 120,
1968 8312,
1969 4216,
1970 12408,
1971 2168,
1972 10360,
1973 6264,
1974 14456,
1975 1144,
1976 9336,
1977 5240,
1978 13432,
1979 3192,
1980 11384,
1981 7288,
1982 15480,
1983 632,
1984 8824,
1985 4728,
1986 12920,
1987 2680,
1988 10872,
1989 6776,
1990 14968,
1991 1656,
1992 9848,
1993 5752,
1994 13944,
1995 3704,
1996 11896,
1997 7800,
1998 15992,
1999 376,
2000 8568,
2001 4472,
2002 12664,
2003 2424,
2004 10616,
2005 6520,
2006 14712,
2007 1400,
2008 9592,
2009 5496,
2010 13688,
2011 3448,
2012 11640,
2013 7544,
2014 15736,
2015 888,
2016 9080,
2017 4984,
2018 13176,
2019 2936,
2020 11128,
2021 7032,
2022 15224,
2023 1912,
2024 10104,
2025 6008,
2026 14200,
2027 3960,
2028 12152,
2029 8056,
2030 16248,
2031 248,
2032 8440,
2033 4344,
2034 12536,
2035 2296,
2036 10488,
2037 6392,
2038 14584,
2039 1272,
2040 9464,
2041 5368,
2042 13560,
2043 3320,
2044 11512,
2045 7416,
2046 15608,
2047 760,
2048 8952,
2049 4856,
2050 13048,
2051 2808,
2052 11000,
2053 6904,
2054 15096,
2055 1784,
2056 9976,
2057 5880,
2058 14072,
2059 3832,
2060 12024,
2061 7928,
2062 16120,
2063 504,
2064 8696,
2065 4600,
2066 12792,
2067 2552,
2068 10744,
2069 6648,
2070 14840,
2071 1528,
2072 9720,
2073 5624,
2074 13816,
2075 3576,
2076 11768,
2077 7672,
2078 15864,
2079 1016,
2080 9208,
2081 5112,
2082 13304,
2083 3064,
2084 11256,
2085 7160,
2086 15352,
2087 2040,
2088 10232,
2089 6136,
2090 14328,
2091 4088,
2092 12280,
2093 8184,
2094 16376,
2095 4,
2096 8196,
2097 4100,
2098 12292,
2099 2052,
2100 10244,
2101 6148,
2102 14340,
2103 1028,
2104 9220,
2105 5124,
2106 13316,
2107 3076,
2108 11268,
2109 7172,
2110 15364,
2111 516,
2112 8708,
2113 4612,
2114 12804,
2115 2564,
2116 10756,
2117 6660,
2118 14852,
2119 1540,
2120 9732,
2121 5636,
2122 13828,
2123 3588,
2124 11780,
2125 7684,
2126 15876,
2127 260,
2128 8452,
2129 4356,
2130 12548,
2131 2308,
2132 10500,
2133 6404,
2134 14596,
2135 1284,
2136 9476,
2137 5380,
2138 13572,
2139 3332,
2140 11524,
2141 7428,
2142 15620,
2143 772,
2144 8964,
2145 4868,
2146 13060,
2147 2820,
2148 11012,
2149 6916,
2150 15108,
2151 1796,
2152 9988,
2153 5892,
2154 14084,
2155 3844,
2156 12036,
2157 7940,
2158 16132,
2159 132,
2160 8324,
2161 4228,
2162 12420,
2163 2180,
2164 10372,
2165 6276,
2166 14468,
2167 1156,
2168 9348,
2169 5252,
2170 13444,
2171 3204,
2172 11396,
2173 7300,
2174 15492,
2175 644,
2176 8836,
2177 4740,
2178 12932,
2179 2692,
2180 10884,
2181 6788,
2182 14980,
2183 1668,
2184 9860,
2185 5764,
2186 13956,
2187 3716,
2188 11908,
2189 7812,
2190 16004,
2191 388,
2192 8580,
2193 4484,
2194 12676,
2195 2436,
2196 10628,
2197 6532,
2198 14724,
2199 1412,
2200 9604,
2201 5508,
2202 13700,
2203 3460,
2204 11652,
2205 7556,
2206 15748,
2207 900,
2208 9092,
2209 4996,
2210 13188,
2211 2948,
2212 11140,
2213 7044,
2214 15236,
2215 1924,
2216 10116,
2217 6020,
2218 14212,
2219 3972,
2220 12164,
2221 8068,
2222 16260,
2223 68,
2224 8260,
2225 4164,
2226 12356,
2227 2116,
2228 10308,
2229 6212,
2230 14404,
2231 1092,
2232 9284,
2233 5188,
2234 13380,
2235 3140,
2236 11332,
2237 7236,
2238 15428,
2239 580,
2240 8772,
2241 4676,
2242 12868,
2243 2628,
2244 10820,
2245 6724,
2246 14916,
2247 1604,
2248 9796,
2249 5700,
2250 13892,
2251 3652,
2252 11844,
2253 7748,
2254 15940,
2255 324,
2256 8516,
2257 4420,
2258 12612,
2259 2372,
2260 10564,
2261 6468,
2262 14660,
2263 1348,
2264 9540,
2265 5444,
2266 13636,
2267 3396,
2268 11588,
2269 7492,
2270 15684,
2271 836,
2272 9028,
2273 4932,
2274 13124,
2275 2884,
2276 11076,
2277 6980,
2278 15172,
2279 1860,
2280 10052,
2281 5956,
2282 14148,
2283 3908,
2284 12100,
2285 8004,
2286 16196,
2287 196,
2288 8388,
2289 4292,
2290 12484,
2291 2244,
2292 10436,
2293 6340,
2294 14532,
2295 1220,
2296 9412,
2297 5316,
2298 13508,
2299 3268,
2300 11460,
2301 7364,
2302 15556,
2303 708,
2304 8900,
2305 4804,
2306 12996,
2307 2756,
2308 10948,
2309 6852,
2310 15044,
2311 1732,
2312 9924,
2313 5828,
2314 14020,
2315 3780,
2316 11972,
2317 7876,
2318 16068,
2319 452,
2320 8644,
2321 4548,
2322 12740,
2323 2500,
2324 10692,
2325 6596,
2326 14788,
2327 1476,
2328 9668,
2329 5572,
2330 13764,
2331 3524,
2332 11716,
2333 7620,
2334 15812,
2335 964,
2336 9156,
2337 5060,
2338 13252,
2339 3012,
2340 11204,
2341 7108,
2342 15300,
2343 1988,
2344 10180,
2345 6084,
2346 14276,
2347 4036,
2348 12228,
2349 8132,
2350 16324,
2351 36,
2352 8228,
2353 4132,
2354 12324,
2355 2084,
2356 10276,
2357 6180,
2358 14372,
2359 1060,
2360 9252,
2361 5156,
2362 13348,
2363 3108,
2364 11300,
2365 7204,
2366 15396,
2367 548,
2368 8740,
2369 4644,
2370 12836,
2371 2596,
2372 10788,
2373 6692,
2374 14884,
2375 1572,
2376 9764,
2377 5668,
2378 13860,
2379 3620,
2380 11812,
2381 7716,
2382 15908,
2383 292,
2384 8484,
2385 4388,
2386 12580,
2387 2340,
2388 10532,
2389 6436,
2390 14628,
2391 1316,
2392 9508,
2393 5412,
2394 13604,
2395 3364,
2396 11556,
2397 7460,
2398 15652,
2399 804,
2400 8996,
2401 4900,
2402 13092,
2403 2852,
2404 11044,
2405 6948,
2406 15140,
2407 1828,
2408 10020,
2409 5924,
2410 14116,
2411 3876,
2412 12068,
2413 7972,
2414 16164,
2415 164,
2416 8356,
2417 4260,
2418 12452,
2419 2212,
2420 10404,
2421 6308,
2422 14500,
2423 1188,
2424 9380,
2425 5284,
2426 13476,
2427 3236,
2428 11428,
2429 7332,
2430 15524,
2431 676,
2432 8868,
2433 4772,
2434 12964,
2435 2724,
2436 10916,
2437 6820,
2438 15012,
2439 1700,
2440 9892,
2441 5796,
2442 13988,
2443 3748,
2444 11940,
2445 7844,
2446 16036,
2447 420,
2448 8612,
2449 4516,
2450 12708,
2451 2468,
2452 10660,
2453 6564,
2454 14756,
2455 1444,
2456 9636,
2457 5540,
2458 13732,
2459 3492,
2460 11684,
2461 7588,
2462 15780,
2463 932,
2464 9124,
2465 5028,
2466 13220,
2467 2980,
2468 11172,
2469 7076,
2470 15268,
2471 1956,
2472 10148,
2473 6052,
2474 14244,
2475 4004,
2476 12196,
2477 8100,
2478 16292,
2479 100,
2480 8292,
2481 4196,
2482 12388,
2483 2148,
2484 10340,
2485 6244,
2486 14436,
2487 1124,
2488 9316,
2489 5220,
2490 13412,
2491 3172,
2492 11364,
2493 7268,
2494 15460,
2495 612,
2496 8804,
2497 4708,
2498 12900,
2499 2660,
2500 10852,
2501 6756,
2502 14948,
2503 1636,
2504 9828,
2505 5732,
2506 13924,
2507 3684,
2508 11876,
2509 7780,
2510 15972,
2511 356,
2512 8548,
2513 4452,
2514 12644,
2515 2404,
2516 10596,
2517 6500,
2518 14692,
2519 1380,
2520 9572,
2521 5476,
2522 13668,
2523 3428,
2524 11620,
2525 7524,
2526 15716,
2527 868,
2528 9060,
2529 4964,
2530 13156,
2531 2916,
2532 11108,
2533 7012,
2534 15204,
2535 1892,
2536 10084,
2537 5988,
2538 14180,
2539 3940,
2540 12132,
2541 8036,
2542 16228,
2543 228,
2544 8420,
2545 4324,
2546 12516,
2547 2276,
2548 10468,
2549 6372,
2550 14564,
2551 1252,
2552 9444,
2553 5348,
2554 13540,
2555 3300,
2556 11492,
2557 7396,
2558 15588,
2559 740,
2560 8932,
2561 4836,
2562 13028,
2563 2788,
2564 10980,
2565 6884,
2566 15076,
2567 1764,
2568 9956,
2569 5860,
2570 14052,
2571 3812,
2572 12004,
2573 7908,
2574 16100,
2575 484,
2576 8676,
2577 4580,
2578 12772,
2579 2532,
2580 10724,
2581 6628,
2582 14820,
2583 1508,
2584 9700,
2585 5604,
2586 13796,
2587 3556,
2588 11748,
2589 7652,
2590 15844,
2591 996,
2592 9188,
2593 5092,
2594 13284,
2595 3044,
2596 11236,
2597 7140,
2598 15332,
2599 2020,
2600 10212,
2601 6116,
2602 14308,
2603 4068,
2604 12260,
2605 8164,
2606 16356,
2607 20,
2608 8212,
2609 4116,
2610 12308,
2611 2068,
2612 10260,
2613 6164,
2614 14356,
2615 1044,
2616 9236,
2617 5140,
2618 13332,
2619 3092,
2620 11284,
2621 7188,
2622 15380,
2623 532,
2624 8724,
2625 4628,
2626 12820,
2627 2580,
2628 10772,
2629 6676,
2630 14868,
2631 1556,
2632 9748,
2633 5652,
2634 13844,
2635 3604,
2636 11796,
2637 7700,
2638 15892,
2639 276,
2640 8468,
2641 4372,
2642 12564,
2643 2324,
2644 10516,
2645 6420,
2646 14612,
2647 1300,
2648 9492,
2649 5396,
2650 13588,
2651 3348,
2652 11540,
2653 7444,
2654 15636,
2655 788,
2656 8980,
2657 4884,
2658 13076,
2659 2836,
2660 11028,
2661 6932,
2662 15124,
2663 1812,
2664 10004,
2665 5908,
2666 14100,
2667 3860,
2668 12052,
2669 7956,
2670 16148,
2671 148,
2672 8340,
2673 4244,
2674 12436,
2675 2196,
2676 10388,
2677 6292,
2678 14484,
2679 1172,
2680 9364,
2681 5268,
2682 13460,
2683 3220,
2684 11412,
2685 7316,
2686 15508,
2687 660,
2688 8852,
2689 4756,
2690 12948,
2691 2708,
2692 10900,
2693 6804,
2694 14996,
2695 1684,
2696 9876,
2697 5780,
2698 13972,
2699 3732,
2700 11924,
2701 7828,
2702 16020,
2703 404,
2704 8596,
2705 4500,
2706 12692,
2707 2452,
2708 10644,
2709 6548,
2710 14740,
2711 1428,
2712 9620,
2713 5524,
2714 13716,
2715 3476,
2716 11668,
2717 7572,
2718 15764,
2719 916,
2720 9108,
2721 5012,
2722 13204,
2723 2964,
2724 11156,
2725 7060,
2726 15252,
2727 1940,
2728 10132,
2729 6036,
2730 14228,
2731 3988,
2732 12180,
2733 8084,
2734 16276,
2735 84,
2736 8276,
2737 4180,
2738 12372,
2739 2132,
2740 10324,
2741 6228,
2742 14420,
2743 1108,
2744 9300,
2745 5204,
2746 13396,
2747 3156,
2748 11348,
2749 7252,
2750 15444,
2751 596,
2752 8788,
2753 4692,
2754 12884,
2755 2644,
2756 10836,
2757 6740,
2758 14932,
2759 1620,
2760 9812,
2761 5716,
2762 13908,
2763 3668,
2764 11860,
2765 7764,
2766 15956,
2767 340,
2768 8532,
2769 4436,
2770 12628,
2771 2388,
2772 10580,
2773 6484,
2774 14676,
2775 1364,
2776 9556,
2777 5460,
2778 13652,
2779 3412,
2780 11604,
2781 7508,
2782 15700,
2783 852,
2784 9044,
2785 4948,
2786 13140,
2787 2900,
2788 11092,
2789 6996,
2790 15188,
2791 1876,
2792 10068,
2793 5972,
2794 14164,
2795 3924,
2796 12116,
2797 8020,
2798 16212,
2799 212,
2800 8404,
2801 4308,
2802 12500,
2803 2260,
2804 10452,
2805 6356,
2806 14548,
2807 1236,
2808 9428,
2809 5332,
2810 13524,
2811 3284,
2812 11476,
2813 7380,
2814 15572,
2815 724,
2816 8916,
2817 4820,
2818 13012,
2819 2772,
2820 10964,
2821 6868,
2822 15060,
2823 1748,
2824 9940,
2825 5844,
2826 14036,
2827 3796,
2828 11988,
2829 7892,
2830 16084,
2831 468,
2832 8660,
2833 4564,
2834 12756,
2835 2516,
2836 10708,
2837 6612,
2838 14804,
2839 1492,
2840 9684,
2841 5588,
2842 13780,
2843 3540,
2844 11732,
2845 7636,
2846 15828,
2847 980,
2848 9172,
2849 5076,
2850 13268,
2851 3028,
2852 11220,
2853 7124,
2854 15316,
2855 2004,
2856 10196,
2857 6100,
2858 14292,
2859 4052,
2860 12244,
2861 8148,
2862 16340,
2863 52,
2864 8244,
2865 4148,
2866 12340,
2867 2100,
2868 10292,
2869 6196,
2870 14388,
2871 1076,
2872 9268,
2873 5172,
2874 13364,
2875 3124,
2876 11316,
2877 7220,
2878 15412,
2879 564,
2880 8756,
2881 4660,
2882 12852,
2883 2612,
2884 10804,
2885 6708,
2886 14900,
2887 1588,
2888 9780,
2889 5684,
2890 13876,
2891 3636,
2892 11828,
2893 7732,
2894 15924,
2895 308,
2896 8500,
2897 4404,
2898 12596,
2899 2356,
2900 10548,
2901 6452,
2902 14644,
2903 1332,
2904 9524,
2905 5428,
2906 13620,
2907 3380,
2908 11572,
2909 7476,
2910 15668,
2911 820,
2912 9012,
2913 4916,
2914 13108,
2915 2868,
2916 11060,
2917 6964,
2918 15156,
2919 1844,
2920 10036,
2921 5940,
2922 14132,
2923 3892,
2924 12084,
2925 7988,
2926 16180,
2927 180,
2928 8372,
2929 4276,
2930 12468,
2931 2228,
2932 10420,
2933 6324,
2934 14516,
2935 1204,
2936 9396,
2937 5300,
2938 13492,
2939 3252,
2940 11444,
2941 7348,
2942 15540,
2943 692,
2944 8884,
2945 4788,
2946 12980,
2947 2740,
2948 10932,
2949 6836,
2950 15028,
2951 1716,
2952 9908,
2953 5812,
2954 14004,
2955 3764,
2956 11956,
2957 7860,
2958 16052,
2959 436,
2960 8628,
2961 4532,
2962 12724,
2963 2484,
2964 10676,
2965 6580,
2966 14772,
2967 1460,
2968 9652,
2969 5556,
2970 13748,
2971 3508,
2972 11700,
2973 7604,
2974 15796,
2975 948,
2976 9140,
2977 5044,
2978 13236,
2979 2996,
2980 11188,
2981 7092,
2982 15284,
2983 1972,
2984 10164,
2985 6068,
2986 14260,
2987 4020,
2988 12212,
2989 8116,
2990 16308,
2991 116,
2992 8308,
2993 4212,
2994 12404,
2995 2164,
2996 10356,
2997 6260,
2998 14452,
2999 1140,
3000 9332,
3001 5236,
3002 13428,
3003 3188,
3004 11380,
3005 7284,
3006 15476,
3007 628,
3008 8820,
3009 4724,
3010 12916,
3011 2676,
3012 10868,
3013 6772,
3014 14964,
3015 1652,
3016 9844,
3017 5748,
3018 13940,
3019 3700,
3020 11892,
3021 7796,
3022 15988,
3023 372,
3024 8564,
3025 4468,
3026 12660,
3027 2420,
3028 10612,
3029 6516,
3030 14708,
3031 1396,
3032 9588,
3033 5492,
3034 13684,
3035 3444,
3036 11636,
3037 7540,
3038 15732,
3039 884,
3040 9076,
3041 4980,
3042 13172,
3043 2932,
3044 11124,
3045 7028,
3046 15220,
3047 1908,
3048 10100,
3049 6004,
3050 14196,
3051 3956,
3052 12148,
3053 8052,
3054 16244,
3055 244,
3056 8436,
3057 4340,
3058 12532,
3059 2292,
3060 10484,
3061 6388,
3062 14580,
3063 1268,
3064 9460,
3065 5364,
3066 13556,
3067 3316,
3068 11508,
3069 7412,
3070 15604,
3071 756,
3072 8948,
3073 4852,
3074 13044,
3075 2804,
3076 10996,
3077 6900,
3078 15092,
3079 1780,
3080 9972,
3081 5876,
3082 14068,
3083 3828,
3084 12020,
3085 7924,
3086 16116,
3087 500,
3088 8692,
3089 4596,
3090 12788,
3091 2548,
3092 10740,
3093 6644,
3094 14836,
3095 1524,
3096 9716,
3097 5620,
3098 13812,
3099 3572,
3100 11764,
3101 7668,
3102 15860,
3103 1012,
3104 9204,
3105 5108,
3106 13300,
3107 3060,
3108 11252,
3109 7156,
3110 15348,
3111 2036,
3112 10228,
3113 6132,
3114 14324,
3115 4084,
3116 12276,
3117 8180,
3118 16372,
3119 12,
3120 8204,
3121 4108,
3122 12300,
3123 2060,
3124 10252,
3125 6156,
3126 14348,
3127 1036,
3128 9228,
3129 5132,
3130 13324,
3131 3084,
3132 11276,
3133 7180,
3134 15372,
3135 524,
3136 8716,
3137 4620,
3138 12812,
3139 2572,
3140 10764,
3141 6668,
3142 14860,
3143 1548,
3144 9740,
3145 5644,
3146 13836,
3147 3596,
3148 11788,
3149 7692,
3150 15884,
3151 268,
3152 8460,
3153 4364,
3154 12556,
3155 2316,
3156 10508,
3157 6412,
3158 14604,
3159 1292,
3160 9484,
3161 5388,
3162 13580,
3163 3340,
3164 11532,
3165 7436,
3166 15628,
3167 780,
3168 8972,
3169 4876,
3170 13068,
3171 2828,
3172 11020,
3173 6924,
3174 15116,
3175 1804,
3176 9996,
3177 5900,
3178 14092,
3179 3852,
3180 12044,
3181 7948,
3182 16140,
3183 140,
3184 8332,
3185 4236,
3186 12428,
3187 2188,
3188 10380,
3189 6284,
3190 14476,
3191 1164,
3192 9356,
3193 5260,
3194 13452,
3195 3212,
3196 11404,
3197 7308,
3198 15500,
3199 652,
3200 8844,
3201 4748,
3202 12940,
3203 2700,
3204 10892,
3205 6796,
3206 14988,
3207 1676,
3208 9868,
3209 5772,
3210 13964,
3211 3724,
3212 11916,
3213 7820,
3214 16012,
3215 396,
3216 8588,
3217 4492,
3218 12684,
3219 2444,
3220 10636,
3221 6540,
3222 14732,
3223 1420,
3224 9612,
3225 5516,
3226 13708,
3227 3468,
3228 11660,
3229 7564,
3230 15756,
3231 908,
3232 9100,
3233 5004,
3234 13196,
3235 2956,
3236 11148,
3237 7052,
3238 15244,
3239 1932,
3240 10124,
3241 6028,
3242 14220,
3243 3980,
3244 12172,
3245 8076,
3246 16268,
3247 76,
3248 8268,
3249 4172,
3250 12364,
3251 2124,
3252 10316,
3253 6220,
3254 14412,
3255 1100,
3256 9292,
3257 5196,
3258 13388,
3259 3148,
3260 11340,
3261 7244,
3262 15436,
3263 588,
3264 8780,
3265 4684,
3266 12876,
3267 2636,
3268 10828,
3269 6732,
3270 14924,
3271 1612,
3272 9804,
3273 5708,
3274 13900,
3275 3660,
3276 11852,
3277 7756,
3278 15948,
3279 332,
3280 8524,
3281 4428,
3282 12620,
3283 2380,
3284 10572,
3285 6476,
3286 14668,
3287 1356,
3288 9548,
3289 5452,
3290 13644,
3291 3404,
3292 11596,
3293 7500,
3294 15692,
3295 844,
3296 9036,
3297 4940,
3298 13132,
3299 2892,
3300 11084,
3301 6988,
3302 15180,
3303 1868,
3304 10060,
3305 5964,
3306 14156,
3307 3916,
3308 12108,
3309 8012,
3310 16204,
3311 204,
3312 8396,
3313 4300,
3314 12492,
3315 2252,
3316 10444,
3317 6348,
3318 14540,
3319 1228,
3320 9420,
3321 5324,
3322 13516,
3323 3276,
3324 11468,
3325 7372,
3326 15564,
3327 716,
3328 8908,
3329 4812,
3330 13004,
3331 2764,
3332 10956,
3333 6860,
3334 15052,
3335 1740,
3336 9932,
3337 5836,
3338 14028,
3339 3788,
3340 11980,
3341 7884,
3342 16076,
3343 460,
3344 8652,
3345 4556,
3346 12748,
3347 2508,
3348 10700,
3349 6604,
3350 14796,
3351 1484,
3352 9676,
3353 5580,
3354 13772,
3355 3532,
3356 11724,
3357 7628,
3358 15820,
3359 972,
3360 9164,
3361 5068,
3362 13260,
3363 3020,
3364 11212,
3365 7116,
3366 15308,
3367 1996,
3368 10188,
3369 6092,
3370 14284,
3371 4044,
3372 12236,
3373 8140,
3374 16332,
3375 44,
3376 8236,
3377 4140,
3378 12332,
3379 2092,
3380 10284,
3381 6188,
3382 14380,
3383 1068,
3384 9260,
3385 5164,
3386 13356,
3387 3116,
3388 11308,
3389 7212,
3390 15404,
3391 556,
3392 8748,
3393 4652,
3394 12844,
3395 2604,
3396 10796,
3397 6700,
3398 14892,
3399 1580,
3400 9772,
3401 5676,
3402 13868,
3403 3628,
3404 11820,
3405 7724,
3406 15916,
3407 300,
3408 8492,
3409 4396,
3410 12588,
3411 2348,
3412 10540,
3413 6444,
3414 14636,
3415 1324,
3416 9516,
3417 5420,
3418 13612,
3419 3372,
3420 11564,
3421 7468,
3422 15660,
3423 812,
3424 9004,
3425 4908,
3426 13100,
3427 2860,
3428 11052,
3429 6956,
3430 15148,
3431 1836,
3432 10028,
3433 5932,
3434 14124,
3435 3884,
3436 12076,
3437 7980,
3438 16172,
3439 172,
3440 8364,
3441 4268,
3442 12460,
3443 2220,
3444 10412,
3445 6316,
3446 14508,
3447 1196,
3448 9388,
3449 5292,
3450 13484,
3451 3244,
3452 11436,
3453 7340,
3454 15532,
3455 684,
3456 8876,
3457 4780,
3458 12972,
3459 2732,
3460 10924,
3461 6828,
3462 15020,
3463 1708,
3464 9900,
3465 5804,
3466 13996,
3467 3756,
3468 11948,
3469 7852,
3470 16044,
3471 428,
3472 8620,
3473 4524,
3474 12716,
3475 2476,
3476 10668,
3477 6572,
3478 14764,
3479 1452,
3480 9644,
3481 5548,
3482 13740,
3483 3500,
3484 11692,
3485 7596,
3486 15788,
3487 940,
3488 9132,
3489 5036,
3490 13228,
3491 2988,
3492 11180,
3493 7084,
3494 15276,
3495 1964,
3496 10156,
3497 6060,
3498 14252,
3499 4012,
3500 12204,
3501 8108,
3502 16300,
3503 108,
3504 8300,
3505 4204,
3506 12396,
3507 2156,
3508 10348,
3509 6252,
3510 14444,
3511 1132,
3512 9324,
3513 5228,
3514 13420,
3515 3180,
3516 11372,
3517 7276,
3518 15468,
3519 620,
3520 8812,
3521 4716,
3522 12908,
3523 2668,
3524 10860,
3525 6764,
3526 14956,
3527 1644,
3528 9836,
3529 5740,
3530 13932,
3531 3692,
3532 11884,
3533 7788,
3534 15980,
3535 364,
3536 8556,
3537 4460,
3538 12652,
3539 2412,
3540 10604,
3541 6508,
3542 14700,
3543 1388,
3544 9580,
3545 5484,
3546 13676,
3547 3436,
3548 11628,
3549 7532,
3550 15724,
3551 876,
3552 9068,
3553 4972,
3554 13164,
3555 2924,
3556 11116,
3557 7020,
3558 15212,
3559 1900,
3560 10092,
3561 5996,
3562 14188,
3563 3948,
3564 12140,
3565 8044,
3566 16236,
3567 236,
3568 8428,
3569 4332,
3570 12524,
3571 2284,
3572 10476,
3573 6380,
3574 14572,
3575 1260,
3576 9452,
3577 5356,
3578 13548,
3579 3308,
3580 11500,
3581 7404,
3582 15596,
3583 748,
3584 8940,
3585 4844,
3586 13036,
3587 2796,
3588 10988,
3589 6892,
3590 15084,
3591 1772,
3592 9964,
3593 5868,
3594 14060,
3595 3820,
3596 12012,
3597 7916,
3598 16108,
3599 492,
3600 8684,
3601 4588,
3602 12780,
3603 2540,
3604 10732,
3605 6636,
3606 14828,
3607 1516,
3608 9708,
3609 5612,
3610 13804,
3611 3564,
3612 11756,
3613 7660,
3614 15852,
3615 1004,
3616 9196,
3617 5100,
3618 13292,
3619 3052,
3620 11244,
3621 7148,
3622 15340,
3623 2028,
3624 10220,
3625 6124,
3626 14316,
3627 4076,
3628 12268,
3629 8172,
3630 16364,
3631 28,
3632 8220,
3633 4124,
3634 12316,
3635 2076,
3636 10268,
3637 6172,
3638 14364,
3639 1052,
3640 9244,
3641 5148,
3642 13340,
3643 3100,
3644 11292,
3645 7196,
3646 15388,
3647 540,
3648 8732,
3649 4636,
3650 12828,
3651 2588,
3652 10780,
3653 6684,
3654 14876,
3655 1564,
3656 9756,
3657 5660,
3658 13852,
3659 3612,
3660 11804,
3661 7708,
3662 15900,
3663 284,
3664 8476,
3665 4380,
3666 12572,
3667 2332,
3668 10524,
3669 6428,
3670 14620,
3671 1308,
3672 9500,
3673 5404,
3674 13596,
3675 3356,
3676 11548,
3677 7452,
3678 15644,
3679 796,
3680 8988,
3681 4892,
3682 13084,
3683 2844,
3684 11036,
3685 6940,
3686 15132,
3687 1820,
3688 10012,
3689 5916,
3690 14108,
3691 3868,
3692 12060,
3693 7964,
3694 16156,
3695 156,
3696 8348,
3697 4252,
3698 12444,
3699 2204,
3700 10396,
3701 6300,
3702 14492,
3703 1180,
3704 9372,
3705 5276,
3706 13468,
3707 3228,
3708 11420,
3709 7324,
3710 15516,
3711 668,
3712 8860,
3713 4764,
3714 12956,
3715 2716,
3716 10908,
3717 6812,
3718 15004,
3719 1692,
3720 9884,
3721 5788,
3722 13980,
3723 3740,
3724 11932,
3725 7836,
3726 16028,
3727 412,
3728 8604,
3729 4508,
3730 12700,
3731 2460,
3732 10652,
3733 6556,
3734 14748,
3735 1436,
3736 9628,
3737 5532,
3738 13724,
3739 3484,
3740 11676,
3741 7580,
3742 15772,
3743 924,
3744 9116,
3745 5020,
3746 13212,
3747 2972,
3748 11164,
3749 7068,
3750 15260,
3751 1948,
3752 10140,
3753 6044,
3754 14236,
3755 3996,
3756 12188,
3757 8092,
3758 16284,
3759 92,
3760 8284,
3761 4188,
3762 12380,
3763 2140,
3764 10332,
3765 6236,
3766 14428,
3767 1116,
3768 9308,
3769 5212,
3770 13404,
3771 3164,
3772 11356,
3773 7260,
3774 15452,
3775 604,
3776 8796,
3777 4700,
3778 12892,
3779 2652,
3780 10844,
3781 6748,
3782 14940,
3783 1628,
3784 9820,
3785 5724,
3786 13916,
3787 3676,
3788 11868,
3789 7772,
3790 15964,
3791 348,
3792 8540,
3793 4444,
3794 12636,
3795 2396,
3796 10588,
3797 6492,
3798 14684,
3799 1372,
3800 9564,
3801 5468,
3802 13660,
3803 3420,
3804 11612,
3805 7516,
3806 15708,
3807 860,
3808 9052,
3809 4956,
3810 13148,
3811 2908,
3812 11100,
3813 7004,
3814 15196,
3815 1884,
3816 10076,
3817 5980,
3818 14172,
3819 3932,
3820 12124,
3821 8028,
3822 16220,
3823 220,
3824 8412,
3825 4316,
3826 12508,
3827 2268,
3828 10460,
3829 6364,
3830 14556,
3831 1244,
3832 9436,
3833 5340,
3834 13532,
3835 3292,
3836 11484,
3837 7388,
3838 15580,
3839 732,
3840 8924,
3841 4828,
3842 13020,
3843 2780,
3844 10972,
3845 6876,
3846 15068,
3847 1756,
3848 9948,
3849 5852,
3850 14044,
3851 3804,
3852 11996,
3853 7900,
3854 16092,
3855 476,
3856 8668,
3857 4572,
3858 12764,
3859 2524,
3860 10716,
3861 6620,
3862 14812,
3863 1500,
3864 9692,
3865 5596,
3866 13788,
3867 3548,
3868 11740,
3869 7644,
3870 15836,
3871 988,
3872 9180,
3873 5084,
3874 13276,
3875 3036,
3876 11228,
3877 7132,
3878 15324,
3879 2012,
3880 10204,
3881 6108,
3882 14300,
3883 4060,
3884 12252,
3885 8156,
3886 16348,
3887 60,
3888 8252,
3889 4156,
3890 12348,
3891 2108,
3892 10300,
3893 6204,
3894 14396,
3895 1084,
3896 9276,
3897 5180,
3898 13372,
3899 3132,
3900 11324,
3901 7228,
3902 15420,
3903 572,
3904 8764,
3905 4668,
3906 12860,
3907 2620,
3908 10812,
3909 6716,
3910 14908,
3911 1596,
3912 9788,
3913 5692,
3914 13884,
3915 3644,
3916 11836,
3917 7740,
3918 15932,
3919 316,
3920 8508,
3921 4412,
3922 12604,
3923 2364,
3924 10556,
3925 6460,
3926 14652,
3927 1340,
3928 9532,
3929 5436,
3930 13628,
3931 3388,
3932 11580,
3933 7484,
3934 15676,
3935 828,
3936 9020,
3937 4924,
3938 13116,
3939 2876,
3940 11068,
3941 6972,
3942 15164,
3943 1852,
3944 10044,
3945 5948,
3946 14140,
3947 3900,
3948 12092,
3949 7996,
3950 16188,
3951 188,
3952 8380,
3953 4284,
3954 12476,
3955 2236,
3956 10428,
3957 6332,
3958 14524,
3959 1212,
3960 9404,
3961 5308,
3962 13500,
3963 3260,
3964 11452,
3965 7356,
3966 15548,
3967 700,
3968 8892,
3969 4796,
3970 12988,
3971 2748,
3972 10940,
3973 6844,
3974 15036,
3975 1724,
3976 9916,
3977 5820,
3978 14012,
3979 3772,
3980 11964,
3981 7868,
3982 16060,
3983 444,
3984 8636,
3985 4540,
3986 12732,
3987 2492,
3988 10684,
3989 6588,
3990 14780,
3991 1468,
3992 9660,
3993 5564,
3994 13756,
3995 3516,
3996 11708,
3997 7612,
3998 15804,
3999 956,
4000 9148,
4001 5052,
4002 13244,
4003 3004,
4004 11196,
4005 7100,
4006 15292,
4007 1980,
4008 10172,
4009 6076,
4010 14268,
4011 4028,
4012 12220,
4013 8124,
4014 16316,
4015 124,
4016 8316,
4017 4220,
4018 12412,
4019 2172,
4020 10364,
4021 6268,
4022 14460,
4023 1148,
4024 9340,
4025 5244,
4026 13436,
4027 3196,
4028 11388,
4029 7292,
4030 15484,
4031 636,
4032 8828,
4033 4732,
4034 12924,
4035 2684,
4036 10876,
4037 6780,
4038 14972,
4039 1660,
4040 9852,
4041 5756,
4042 13948,
4043 3708,
4044 11900,
4045 7804,
4046 15996,
4047 380,
4048 8572,
4049 4476,
4050 12668,
4051 2428,
4052 10620,
4053 6524,
4054 14716,
4055 1404,
4056 9596,
4057 5500,
4058 13692,
4059 3452,
4060 11644,
4061 7548,
4062 15740,
4063 892,
4064 9084,
4065 4988,
4066 13180,
4067 2940,
4068 11132,
4069 7036,
4070 15228,
4071 1916,
4072 10108,
4073 6012,
4074 14204,
4075 3964,
4076 12156,
4077 8060,
4078 16252,
4079 252,
4080 8444,
4081 4348,
4082 12540,
4083 2300,
4084 10492,
4085 6396,
4086 14588,
4087 1276,
4088 9468,
4089 5372,
4090 13564,
4091 3324,
4092 11516,
4093 7420,
4094 15612,
4095 764,
4096 8956,
4097 4860,
4098 13052,
4099 2812,
4100 11004,
4101 6908,
4102 15100,
4103 1788,
4104 9980,
4105 5884,
4106 14076,
4107 3836,
4108 12028,
4109 7932,
4110 16124,
4111 508,
4112 8700,
4113 4604,
4114 12796,
4115 2556,
4116 10748,
4117 6652,
4118 14844,
4119 1532,
4120 9724,
4121 5628,
4122 13820,
4123 3580,
4124 11772,
4125 7676,
4126 15868,
4127 1020,
4128 9212,
4129 5116,
4130 13308,
4131 3068,
4132 11260,
4133 7164,
4134 15356,
4135 2044,
4136 10236,
4137 6140,
4138 14332,
4139 4092,
4140 12284,
4141 8188,
4142 16380,
4143 2,
4144 8194,
4145 4098,
4146 12290,
4147 2050,
4148 10242,
4149 6146,
4150 14338,
4151 1026,
4152 9218,
4153 5122,
4154 13314,
4155 3074,
4156 11266,
4157 7170,
4158 15362,
4159 514,
4160 8706,
4161 4610,
4162 12802,
4163 2562,
4164 10754,
4165 6658,
4166 14850,
4167 1538,
4168 9730,
4169 5634,
4170 13826,
4171 3586,
4172 11778,
4173 7682,
4174 15874,
4175 258,
4176 8450,
4177 4354,
4178 12546,
4179 2306,
4180 10498,
4181 6402,
4182 14594,
4183 1282,
4184 9474,
4185 5378,
4186 13570,
4187 3330,
4188 11522,
4189 7426,
4190 15618,
4191 770,
4192 8962,
4193 4866,
4194 13058,
4195 2818,
4196 11010,
4197 6914,
4198 15106,
4199 1794,
4200 9986,
4201 5890,
4202 14082,
4203 3842,
4204 12034,
4205 7938,
4206 16130,
4207 130,
4208 8322,
4209 4226,
4210 12418,
4211 2178,
4212 10370,
4213 6274,
4214 14466,
4215 1154,
4216 9346,
4217 5250,
4218 13442,
4219 3202,
4220 11394,
4221 7298,
4222 15490,
4223 642,
4224 8834,
4225 4738,
4226 12930,
4227 2690,
4228 10882,
4229 6786,
4230 14978,
4231 1666,
4232 9858,
4233 5762,
4234 13954,
4235 3714,
4236 11906,
4237 7810,
4238 16002,
4239 386,
4240 8578,
4241 4482,
4242 12674,
4243 2434,
4244 10626,
4245 6530,
4246 14722,
4247 1410,
4248 9602,
4249 5506,
4250 13698,
4251 3458,
4252 11650,
4253 7554,
4254 15746,
4255 898,
4256 9090,
4257 4994,
4258 13186,
4259 2946,
4260 11138,
4261 7042,
4262 15234,
4263 1922,
4264 10114,
4265 6018,
4266 14210,
4267 3970,
4268 12162,
4269 8066,
4270 16258,
4271 66,
4272 8258,
4273 4162,
4274 12354,
4275 2114,
4276 10306,
4277 6210,
4278 14402,
4279 1090,
4280 9282,
4281 5186,
4282 13378,
4283 3138,
4284 11330,
4285 7234,
4286 15426,
4287 578,
4288 8770,
4289 4674,
4290 12866,
4291 2626,
4292 10818,
4293 6722,
4294 14914,
4295 1602,
4296 9794,
4297 5698,
4298 13890,
4299 3650,
4300 11842,
4301 7746,
4302 15938,
4303 322,
4304 8514,
4305 4418,
4306 12610,
4307 2370,
4308 10562,
4309 6466,
4310 14658,
4311 1346,
4312 9538,
4313 5442,
4314 13634,
4315 3394,
4316 11586,
4317 7490,
4318 15682,
4319 834,
4320 9026,
4321 4930,
4322 13122,
4323 2882,
4324 11074,
4325 6978,
4326 15170,
4327 1858,
4328 10050,
4329 5954,
4330 14146,
4331 3906,
4332 12098,
4333 8002,
4334 16194,
4335 194,
4336 8386,
4337 4290,
4338 12482,
4339 2242,
4340 10434,
4341 6338,
4342 14530,
4343 1218,
4344 9410,
4345 5314,
4346 13506,
4347 3266,
4348 11458,
4349 7362,
4350 15554,
4351 706,
4352 8898,
4353 4802,
4354 12994,
4355 2754,
4356 10946,
4357 6850,
4358 15042,
4359 1730,
4360 9922,
4361 5826,
4362 14018,
4363 3778,
4364 11970,
4365 7874,
4366 16066,
4367 450,
4368 8642,
4369 4546,
4370 12738,
4371 2498,
4372 10690,
4373 6594,
4374 14786,
4375 1474,
4376 9666,
4377 5570,
4378 13762,
4379 3522,
4380 11714,
4381 7618,
4382 15810,
4383 962,
4384 9154,
4385 5058,
4386 13250,
4387 3010,
4388 11202,
4389 7106,
4390 15298,
4391 1986,
4392 10178,
4393 6082,
4394 14274,
4395 4034,
4396 12226,
4397 8130,
4398 16322,
4399 34,
4400 8226,
4401 4130,
4402 12322,
4403 2082,
4404 10274,
4405 6178,
4406 14370,
4407 1058,
4408 9250,
4409 5154,
4410 13346,
4411 3106,
4412 11298,
4413 7202,
4414 15394,
4415 546,
4416 8738,
4417 4642,
4418 12834,
4419 2594,
4420 10786,
4421 6690,
4422 14882,
4423 1570,
4424 9762,
4425 5666,
4426 13858,
4427 3618,
4428 11810,
4429 7714,
4430 15906,
4431 290,
4432 8482,
4433 4386,
4434 12578,
4435 2338,
4436 10530,
4437 6434,
4438 14626,
4439 1314,
4440 9506,
4441 5410,
4442 13602,
4443 3362,
4444 11554,
4445 7458,
4446 15650,
4447 802,
4448 8994,
4449 4898,
4450 13090,
4451 2850,
4452 11042,
4453 6946,
4454 15138,
4455 1826,
4456 10018,
4457 5922,
4458 14114,
4459 3874,
4460 12066,
4461 7970,
4462 16162,
4463 162,
4464 8354,
4465 4258,
4466 12450,
4467 2210,
4468 10402,
4469 6306,
4470 14498,
4471 1186,
4472 9378,
4473 5282,
4474 13474,
4475 3234,
4476 11426,
4477 7330,
4478 15522,
4479 674,
4480 8866,
4481 4770,
4482 12962,
4483 2722,
4484 10914,
4485 6818,
4486 15010,
4487 1698,
4488 9890,
4489 5794,
4490 13986,
4491 3746,
4492 11938,
4493 7842,
4494 16034,
4495 418,
4496 8610,
4497 4514,
4498 12706,
4499 2466,
4500 10658,
4501 6562,
4502 14754,
4503 1442,
4504 9634,
4505 5538,
4506 13730,
4507 3490,
4508 11682,
4509 7586,
4510 15778,
4511 930,
4512 9122,
4513 5026,
4514 13218,
4515 2978,
4516 11170,
4517 7074,
4518 15266,
4519 1954,
4520 10146,
4521 6050,
4522 14242,
4523 4002,
4524 12194,
4525 8098,
4526 16290,
4527 98,
4528 8290,
4529 4194,
4530 12386,
4531 2146,
4532 10338,
4533 6242,
4534 14434,
4535 1122,
4536 9314,
4537 5218,
4538 13410,
4539 3170,
4540 11362,
4541 7266,
4542 15458,
4543 610,
4544 8802,
4545 4706,
4546 12898,
4547 2658,
4548 10850,
4549 6754,
4550 14946,
4551 1634,
4552 9826,
4553 5730,
4554 13922,
4555 3682,
4556 11874,
4557 7778,
4558 15970,
4559 354,
4560 8546,
4561 4450,
4562 12642,
4563 2402,
4564 10594,
4565 6498,
4566 14690,
4567 1378,
4568 9570,
4569 5474,
4570 13666,
4571 3426,
4572 11618,
4573 7522,
4574 15714,
4575 866,
4576 9058,
4577 4962,
4578 13154,
4579 2914,
4580 11106,
4581 7010,
4582 15202,
4583 1890,
4584 10082,
4585 5986,
4586 14178,
4587 3938,
4588 12130,
4589 8034,
4590 16226,
4591 226,
4592 8418,
4593 4322,
4594 12514,
4595 2274,
4596 10466,
4597 6370,
4598 14562,
4599 1250,
4600 9442,
4601 5346,
4602 13538,
4603 3298,
4604 11490,
4605 7394,
4606 15586,
4607 738,
4608 8930,
4609 4834,
4610 13026,
4611 2786,
4612 10978,
4613 6882,
4614 15074,
4615 1762,
4616 9954,
4617 5858,
4618 14050,
4619 3810,
4620 12002,
4621 7906,
4622 16098,
4623 482,
4624 8674,
4625 4578,
4626 12770,
4627 2530,
4628 10722,
4629 6626,
4630 14818,
4631 1506,
4632 9698,
4633 5602,
4634 13794,
4635 3554,
4636 11746,
4637 7650,
4638 15842,
4639 994,
4640 9186,
4641 5090,
4642 13282,
4643 3042,
4644 11234,
4645 7138,
4646 15330,
4647 2018,
4648 10210,
4649 6114,
4650 14306,
4651 4066,
4652 12258,
4653 8162,
4654 16354,
4655 18,
4656 8210,
4657 4114,
4658 12306,
4659 2066,
4660 10258,
4661 6162,
4662 14354,
4663 1042,
4664 9234,
4665 5138,
4666 13330,
4667 3090,
4668 11282,
4669 7186,
4670 15378,
4671 530,
4672 8722,
4673 4626,
4674 12818,
4675 2578,
4676 10770,
4677 6674,
4678 14866,
4679 1554,
4680 9746,
4681 5650,
4682 13842,
4683 3602,
4684 11794,
4685 7698,
4686 15890,
4687 274,
4688 8466,
4689 4370,
4690 12562,
4691 2322,
4692 10514,
4693 6418,
4694 14610,
4695 1298,
4696 9490,
4697 5394,
4698 13586,
4699 3346,
4700 11538,
4701 7442,
4702 15634,
4703 786,
4704 8978,
4705 4882,
4706 13074,
4707 2834,
4708 11026,
4709 6930,
4710 15122,
4711 1810,
4712 10002,
4713 5906,
4714 14098,
4715 3858,
4716 12050,
4717 7954,
4718 16146,
4719 146,
4720 8338,
4721 4242,
4722 12434,
4723 2194,
4724 10386,
4725 6290,
4726 14482,
4727 1170,
4728 9362,
4729 5266,
4730 13458,
4731 3218,
4732 11410,
4733 7314,
4734 15506,
4735 658,
4736 8850,
4737 4754,
4738 12946,
4739 2706,
4740 10898,
4741 6802,
4742 14994,
4743 1682,
4744 9874,
4745 5778,
4746 13970,
4747 3730,
4748 11922,
4749 7826,
4750 16018,
4751 402,
4752 8594,
4753 4498,
4754 12690,
4755 2450,
4756 10642,
4757 6546,
4758 14738,
4759 1426,
4760 9618,
4761 5522,
4762 13714,
4763 3474,
4764 11666,
4765 7570,
4766 15762,
4767 914,
4768 9106,
4769 5010,
4770 13202,
4771 2962,
4772 11154,
4773 7058,
4774 15250,
4775 1938,
4776 10130,
4777 6034,
4778 14226,
4779 3986,
4780 12178,
4781 8082,
4782 16274,
4783 82,
4784 8274,
4785 4178,
4786 12370,
4787 2130,
4788 10322,
4789 6226,
4790 14418,
4791 1106,
4792 9298,
4793 5202,
4794 13394,
4795 3154,
4796 11346,
4797 7250,
4798 15442,
4799 594,
4800 8786,
4801 4690,
4802 12882,
4803 2642,
4804 10834,
4805 6738,
4806 14930,
4807 1618,
4808 9810,
4809 5714,
4810 13906,
4811 3666,
4812 11858,
4813 7762,
4814 15954,
4815 338,
4816 8530,
4817 4434,
4818 12626,
4819 2386,
4820 10578,
4821 6482,
4822 14674,
4823 1362,
4824 9554,
4825 5458,
4826 13650,
4827 3410,
4828 11602,
4829 7506,
4830 15698,
4831 850,
4832 9042,
4833 4946,
4834 13138,
4835 2898,
4836 11090,
4837 6994,
4838 15186,
4839 1874,
4840 10066,
4841 5970,
4842 14162,
4843 3922,
4844 12114,
4845 8018,
4846 16210,
4847 210,
4848 8402,
4849 4306,
4850 12498,
4851 2258,
4852 10450,
4853 6354,
4854 14546,
4855 1234,
4856 9426,
4857 5330,
4858 13522,
4859 3282,
4860 11474,
4861 7378,
4862 15570,
4863 722,
4864 8914,
4865 4818,
4866 13010,
4867 2770,
4868 10962,
4869 6866,
4870 15058,
4871 1746,
4872 9938,
4873 5842,
4874 14034,
4875 3794,
4876 11986,
4877 7890,
4878 16082,
4879 466,
4880 8658,
4881 4562,
4882 12754,
4883 2514,
4884 10706,
4885 6610,
4886 14802,
4887 1490,
4888 9682,
4889 5586,
4890 13778,
4891 3538,
4892 11730,
4893 7634,
4894 15826,
4895 978,
4896 9170,
4897 5074,
4898 13266,
4899 3026,
4900 11218,
4901 7122,
4902 15314,
4903 2002,
4904 10194,
4905 6098,
4906 14290,
4907 4050,
4908 12242,
4909 8146,
4910 16338,
4911 50,
4912 8242,
4913 4146,
4914 12338,
4915 2098,
4916 10290,
4917 6194,
4918 14386,
4919 1074,
4920 9266,
4921 5170,
4922 13362,
4923 3122,
4924 11314,
4925 7218,
4926 15410,
4927 562,
4928 8754,
4929 4658,
4930 12850,
4931 2610,
4932 10802,
4933 6706,
4934 14898,
4935 1586,
4936 9778,
4937 5682,
4938 13874,
4939 3634,
4940 11826,
4941 7730,
4942 15922,
4943 306,
4944 8498,
4945 4402,
4946 12594,
4947 2354,
4948 10546,
4949 6450,
4950 14642,
4951 1330,
4952 9522,
4953 5426,
4954 13618,
4955 3378,
4956 11570,
4957 7474,
4958 15666,
4959 818,
4960 9010,
4961 4914,
4962 13106,
4963 2866,
4964 11058,
4965 6962,
4966 15154,
4967 1842,
4968 10034,
4969 5938,
4970 14130,
4971 3890,
4972 12082,
4973 7986,
4974 16178,
4975 178,
4976 8370,
4977 4274,
4978 12466,
4979 2226,
4980 10418,
4981 6322,
4982 14514,
4983 1202,
4984 9394,
4985 5298,
4986 13490,
4987 3250,
4988 11442,
4989 7346,
4990 15538,
4991 690,
4992 8882,
4993 4786,
4994 12978,
4995 2738,
4996 10930,
4997 6834,
4998 15026,
4999 1714,
5000 9906,
5001 5810,
5002 14002,
5003 3762,
5004 11954,
5005 7858,
5006 16050,
5007 434,
5008 8626,
5009 4530,
5010 12722,
5011 2482,
5012 10674,
5013 6578,
5014 14770,
5015 1458,
5016 9650,
5017 5554,
5018 13746,
5019 3506,
5020 11698,
5021 7602,
5022 15794,
5023 946,
5024 9138,
5025 5042,
5026 13234,
5027 2994,
5028 11186,
5029 7090,
5030 15282,
5031 1970,
5032 10162,
5033 6066,
5034 14258,
5035 4018,
5036 12210,
5037 8114,
5038 16306,
5039 114,
5040 8306,
5041 4210,
5042 12402,
5043 2162,
5044 10354,
5045 6258,
5046 14450,
5047 1138,
5048 9330,
5049 5234,
5050 13426,
5051 3186,
5052 11378,
5053 7282,
5054 15474,
5055 626,
5056 8818,
5057 4722,
5058 12914,
5059 2674,
5060 10866,
5061 6770,
5062 14962,
5063 1650,
5064 9842,
5065 5746,
5066 13938,
5067 3698,
5068 11890,
5069 7794,
5070 15986,
5071 370,
5072 8562,
5073 4466,
5074 12658,
5075 2418,
5076 10610,
5077 6514,
5078 14706,
5079 1394,
5080 9586,
5081 5490,
5082 13682,
5083 3442,
5084 11634,
5085 7538,
5086 15730,
5087 882,
5088 9074,
5089 4978,
5090 13170,
5091 2930,
5092 11122,
5093 7026,
5094 15218,
5095 1906,
5096 10098,
5097 6002,
5098 14194,
5099 3954,
5100 12146,
5101 8050,
5102 16242,
5103 242,
5104 8434,
5105 4338,
5106 12530,
5107 2290,
5108 10482,
5109 6386,
5110 14578,
5111 1266,
5112 9458,
5113 5362,
5114 13554,
5115 3314,
5116 11506,
5117 7410,
5118 15602,
5119 754,
5120 8946,
5121 4850,
5122 13042,
5123 2802,
5124 10994,
5125 6898,
5126 15090,
5127 1778,
5128 9970,
5129 5874,
5130 14066,
5131 3826,
5132 12018,
5133 7922,
5134 16114,
5135 498,
5136 8690,
5137 4594,
5138 12786,
5139 2546,
5140 10738,
5141 6642,
5142 14834,
5143 1522,
5144 9714,
5145 5618,
5146 13810,
5147 3570,
5148 11762,
5149 7666,
5150 15858,
5151 1010,
5152 9202,
5153 5106,
5154 13298,
5155 3058,
5156 11250,
5157 7154,
5158 15346,
5159 2034,
5160 10226,
5161 6130,
5162 14322,
5163 4082,
5164 12274,
5165 8178,
5166 16370,
5167 10,
5168 8202,
5169 4106,
5170 12298,
5171 2058,
5172 10250,
5173 6154,
5174 14346,
5175 1034,
5176 9226,
5177 5130,
5178 13322,
5179 3082,
5180 11274,
5181 7178,
5182 15370,
5183 522,
5184 8714,
5185 4618,
5186 12810,
5187 2570,
5188 10762,
5189 6666,
5190 14858,
5191 1546,
5192 9738,
5193 5642,
5194 13834,
5195 3594,
5196 11786,
5197 7690,
5198 15882,
5199 266,
5200 8458,
5201 4362,
5202 12554,
5203 2314,
5204 10506,
5205 6410,
5206 14602,
5207 1290,
5208 9482,
5209 5386,
5210 13578,
5211 3338,
5212 11530,
5213 7434,
5214 15626,
5215 778,
5216 8970,
5217 4874,
5218 13066,
5219 2826,
5220 11018,
5221 6922,
5222 15114,
5223 1802,
5224 9994,
5225 5898,
5226 14090,
5227 3850,
5228 12042,
5229 7946,
5230 16138,
5231 138,
5232 8330,
5233 4234,
5234 12426,
5235 2186,
5236 10378,
5237 6282,
5238 14474,
5239 1162,
5240 9354,
5241 5258,
5242 13450,
5243 3210,
5244 11402,
5245 7306,
5246 15498,
5247 650,
5248 8842,
5249 4746,
5250 12938,
5251 2698,
5252 10890,
5253 6794,
5254 14986,
5255 1674,
5256 9866,
5257 5770,
5258 13962,
5259 3722,
5260 11914,
5261 7818,
5262 16010,
5263 394,
5264 8586,
5265 4490,
5266 12682,
5267 2442,
5268 10634,
5269 6538,
5270 14730,
5271 1418,
5272 9610,
5273 5514,
5274 13706,
5275 3466,
5276 11658,
5277 7562,
5278 15754,
5279 906,
5280 9098,
5281 5002,
5282 13194,
5283 2954,
5284 11146,
5285 7050,
5286 15242,
5287 1930,
5288 10122,
5289 6026,
5290 14218,
5291 3978,
5292 12170,
5293 8074,
5294 16266,
5295 74,
5296 8266,
5297 4170,
5298 12362,
5299 2122,
5300 10314,
5301 6218,
5302 14410,
5303 1098,
5304 9290,
5305 5194,
5306 13386,
5307 3146,
5308 11338,
5309 7242,
5310 15434,
5311 586,
5312 8778,
5313 4682,
5314 12874,
5315 2634,
5316 10826,
5317 6730,
5318 14922,
5319 1610,
5320 9802,
5321 5706,
5322 13898,
5323 3658,
5324 11850,
5325 7754,
5326 15946,
5327 330,
5328 8522,
5329 4426,
5330 12618,
5331 2378,
5332 10570,
5333 6474,
5334 14666,
5335 1354,
5336 9546,
5337 5450,
5338 13642,
5339 3402,
5340 11594,
5341 7498,
5342 15690,
5343 842,
5344 9034,
5345 4938,
5346 13130,
5347 2890,
5348 11082,
5349 6986,
5350 15178,
5351 1866,
5352 10058,
5353 5962,
5354 14154,
5355 3914,
5356 12106,
5357 8010,
5358 16202,
5359 202,
5360 8394,
5361 4298,
5362 12490,
5363 2250,
5364 10442,
5365 6346,
5366 14538,
5367 1226,
5368 9418,
5369 5322,
5370 13514,
5371 3274,
5372 11466,
5373 7370,
5374 15562,
5375 714,
5376 8906,
5377 4810,
5378 13002,
5379 2762,
5380 10954,
5381 6858,
5382 15050,
5383 1738,
5384 9930,
5385 5834,
5386 14026,
5387 3786,
5388 11978,
5389 7882,
5390 16074,
5391 458,
5392 8650,
5393 4554,
5394 12746,
5395 2506,
5396 10698,
5397 6602,
5398 14794,
5399 1482,
5400 9674,
5401 5578,
5402 13770,
5403 3530,
5404 11722,
5405 7626,
5406 15818,
5407 970,
5408 9162,
5409 5066,
5410 13258,
5411 3018,
5412 11210,
5413 7114,
5414 15306,
5415 1994,
5416 10186,
5417 6090,
5418 14282,
5419 4042,
5420 12234,
5421 8138,
5422 16330,
5423 42,
5424 8234,
5425 4138,
5426 12330,
5427 2090,
5428 10282,
5429 6186,
5430 14378,
5431 1066,
5432 9258,
5433 5162,
5434 13354,
5435 3114,
5436 11306,
5437 7210,
5438 15402,
5439 554,
5440 8746,
5441 4650,
5442 12842,
5443 2602,
5444 10794,
5445 6698,
5446 14890,
5447 1578,
5448 9770,
5449 5674,
5450 13866,
5451 3626,
5452 11818,
5453 7722,
5454 15914,
5455 298,
5456 8490,
5457 4394,
5458 12586,
5459 2346,
5460 10538,
5461 6442,
5462 14634,
5463 1322,
5464 9514,
5465 5418,
5466 13610,
5467 3370,
5468 11562,
5469 7466,
5470 15658,
5471 810,
5472 9002,
5473 4906,
5474 13098,
5475 2858,
5476 11050,
5477 6954,
5478 15146,
5479 1834,
5480 10026,
5481 5930,
5482 14122,
5483 3882,
5484 12074,
5485 7978,
5486 16170,
5487 170,
5488 8362,
5489 4266,
5490 12458,
5491 2218,
5492 10410,
5493 6314,
5494 14506,
5495 1194,
5496 9386,
5497 5290,
5498 13482,
5499 3242,
5500 11434,
5501 7338,
5502 15530,
5503 682,
5504 8874,
5505 4778,
5506 12970,
5507 2730,
5508 10922,
5509 6826,
5510 15018,
5511 1706,
5512 9898,
5513 5802,
5514 13994,
5515 3754,
5516 11946,
5517 7850,
5518 16042,
5519 426,
5520 8618,
5521 4522,
5522 12714,
5523 2474,
5524 10666,
5525 6570,
5526 14762,
5527 1450,
5528 9642,
5529 5546,
5530 13738,
5531 3498,
5532 11690,
5533 7594,
5534 15786,
5535 938,
5536 9130,
5537 5034,
5538 13226,
5539 2986,
5540 11178,
5541 7082,
5542 15274,
5543 1962,
5544 10154,
5545 6058,
5546 14250,
5547 4010,
5548 12202,
5549 8106,
5550 16298,
5551 106,
5552 8298,
5553 4202,
5554 12394,
5555 2154,
5556 10346,
5557 6250,
5558 14442,
5559 1130,
5560 9322,
5561 5226,
5562 13418,
5563 3178,
5564 11370,
5565 7274,
5566 15466,
5567 618,
5568 8810,
5569 4714,
5570 12906,
5571 2666,
5572 10858,
5573 6762,
5574 14954,
5575 1642,
5576 9834,
5577 5738,
5578 13930,
5579 3690,
5580 11882,
5581 7786,
5582 15978,
5583 362,
5584 8554,
5585 4458,
5586 12650,
5587 2410,
5588 10602,
5589 6506,
5590 14698,
5591 1386,
5592 9578,
5593 5482,
5594 13674,
5595 3434,
5596 11626,
5597 7530,
5598 15722,
5599 874,
5600 9066,
5601 4970,
5602 13162,
5603 2922,
5604 11114,
5605 7018,
5606 15210,
5607 1898,
5608 10090,
5609 5994,
5610 14186,
5611 3946,
5612 12138,
5613 8042,
5614 16234,
5615 234,
5616 8426,
5617 4330,
5618 12522,
5619 2282,
5620 10474,
5621 6378,
5622 14570,
5623 1258,
5624 9450,
5625 5354,
5626 13546,
5627 3306,
5628 11498,
5629 7402,
5630 15594,
5631 746,
5632 8938,
5633 4842,
5634 13034,
5635 2794,
5636 10986,
5637 6890,
5638 15082,
5639 1770,
5640 9962,
5641 5866,
5642 14058,
5643 3818,
5644 12010,
5645 7914,
5646 16106,
5647 490,
5648 8682,
5649 4586,
5650 12778,
5651 2538,
5652 10730,
5653 6634,
5654 14826,
5655 1514,
5656 9706,
5657 5610,
5658 13802,
5659 3562,
5660 11754,
5661 7658,
5662 15850,
5663 1002,
5664 9194,
5665 5098,
5666 13290,
5667 3050,
5668 11242,
5669 7146,
5670 15338,
5671 2026,
5672 10218,
5673 6122,
5674 14314,
5675 4074,
5676 12266,
5677 8170,
5678 16362,
5679 26,
5680 8218,
5681 4122,
5682 12314,
5683 2074,
5684 10266,
5685 6170,
5686 14362,
5687 1050,
5688 9242,
5689 5146,
5690 13338,
5691 3098,
5692 11290,
5693 7194,
5694 15386,
5695 538,
5696 8730,
5697 4634,
5698 12826,
5699 2586,
5700 10778,
5701 6682,
5702 14874,
5703 1562,
5704 9754,
5705 5658,
5706 13850,
5707 3610,
5708 11802,
5709 7706,
5710 15898,
5711 282,
5712 8474,
5713 4378,
5714 12570,
5715 2330,
5716 10522,
5717 6426,
5718 14618,
5719 1306,
5720 9498,
5721 5402,
5722 13594,
5723 3354,
5724 11546,
5725 7450,
5726 15642,
5727 794,
5728 8986,
5729 4890,
5730 13082,
5731 2842,
5732 11034,
5733 6938,
5734 15130,
5735 1818,
5736 10010,
5737 5914,
5738 14106,
5739 3866,
5740 12058,
5741 7962,
5742 16154,
5743 154,
5744 8346,
5745 4250,
5746 12442,
5747 2202,
5748 10394,
5749 6298,
5750 14490,
5751 1178,
5752 9370,
5753 5274,
5754 13466,
5755 3226,
5756 11418,
5757 7322,
5758 15514,
5759 666,
5760 8858,
5761 4762,
5762 12954,
5763 2714,
5764 10906,
5765 6810,
5766 15002,
5767 1690,
5768 9882,
5769 5786,
5770 13978,
5771 3738,
5772 11930,
5773 7834,
5774 16026,
5775 410,
5776 8602,
5777 4506,
5778 12698,
5779 2458,
5780 10650,
5781 6554,
5782 14746,
5783 1434,
5784 9626,
5785 5530,
5786 13722,
5787 3482,
5788 11674,
5789 7578,
5790 15770,
5791 922,
5792 9114,
5793 5018,
5794 13210,
5795 2970,
5796 11162,
5797 7066,
5798 15258,
5799 1946,
5800 10138,
5801 6042,
5802 14234,
5803 3994,
5804 12186,
5805 8090,
5806 16282,
5807 90,
5808 8282,
5809 4186,
5810 12378,
5811 2138,
5812 10330,
5813 6234,
5814 14426,
5815 1114,
5816 9306,
5817 5210,
5818 13402,
5819 3162,
5820 11354,
5821 7258,
5822 15450,
5823 602,
5824 8794,
5825 4698,
5826 12890,
5827 2650,
5828 10842,
5829 6746,
5830 14938,
5831 1626,
5832 9818,
5833 5722,
5834 13914,
5835 3674,
5836 11866,
5837 7770,
5838 15962,
5839 346,
5840 8538,
5841 4442,
5842 12634,
5843 2394,
5844 10586,
5845 6490,
5846 14682,
5847 1370,
5848 9562,
5849 5466,
5850 13658,
5851 3418,
5852 11610,
5853 7514,
5854 15706,
5855 858,
5856 9050,
5857 4954,
5858 13146,
5859 2906,
5860 11098,
5861 7002,
5862 15194,
5863 1882,
5864 10074,
5865 5978,
5866 14170,
5867 3930,
5868 12122,
5869 8026,
5870 16218,
5871 218,
5872 8410,
5873 4314,
5874 12506,
5875 2266,
5876 10458,
5877 6362,
5878 14554,
5879 1242,
5880 9434,
5881 5338,
5882 13530,
5883 3290,
5884 11482,
5885 7386,
5886 15578,
5887 730,
5888 8922,
5889 4826,
5890 13018,
5891 2778,
5892 10970,
5893 6874,
5894 15066,
5895 1754,
5896 9946,
5897 5850,
5898 14042,
5899 3802,
5900 11994,
5901 7898,
5902 16090,
5903 474,
5904 8666,
5905 4570,
5906 12762,
5907 2522,
5908 10714,
5909 6618,
5910 14810,
5911 1498,
5912 9690,
5913 5594,
5914 13786,
5915 3546,
5916 11738,
5917 7642,
5918 15834,
5919 986,
5920 9178,
5921 5082,
5922 13274,
5923 3034,
5924 11226,
5925 7130,
5926 15322,
5927 2010,
5928 10202,
5929 6106,
5930 14298,
5931 4058,
5932 12250,
5933 8154,
5934 16346,
5935 58,
5936 8250,
5937 4154,
5938 12346,
5939 2106,
5940 10298,
5941 6202,
5942 14394,
5943 1082,
5944 9274,
5945 5178,
5946 13370,
5947 3130,
5948 11322,
5949 7226,
5950 15418,
5951 570,
5952 8762,
5953 4666,
5954 12858,
5955 2618,
5956 10810,
5957 6714,
5958 14906,
5959 1594,
5960 9786,
5961 5690,
5962 13882,
5963 3642,
5964 11834,
5965 7738,
5966 15930,
5967 314,
5968 8506,
5969 4410,
5970 12602,
5971 2362,
5972 10554,
5973 6458,
5974 14650,
5975 1338,
5976 9530,
5977 5434,
5978 13626,
5979 3386,
5980 11578,
5981 7482,
5982 15674,
5983 826,
5984 9018,
5985 4922,
5986 13114,
5987 2874,
5988 11066,
5989 6970,
5990 15162,
5991 1850,
5992 10042,
5993 5946,
5994 14138,
5995 3898,
5996 12090,
5997 7994,
5998 16186,
5999 186,
6000 8378,
6001 4282,
6002 12474,
6003 2234,
6004 10426,
6005 6330,
6006 14522,
6007 1210,
6008 9402,
6009 5306,
6010 13498,
6011 3258,
6012 11450,
6013 7354,
6014 15546,
6015 698,
6016 8890,
6017 4794,
6018 12986,
6019 2746,
6020 10938,
6021 6842,
6022 15034,
6023 1722,
6024 9914,
6025 5818,
6026 14010,
6027 3770,
6028 11962,
6029 7866,
6030 16058,
6031 442,
6032 8634,
6033 4538,
6034 12730,
6035 2490,
6036 10682,
6037 6586,
6038 14778,
6039 1466,
6040 9658,
6041 5562,
6042 13754,
6043 3514,
6044 11706,
6045 7610,
6046 15802,
6047 954,
6048 9146,
6049 5050,
6050 13242,
6051 3002,
6052 11194,
6053 7098,
6054 15290,
6055 1978,
6056 10170,
6057 6074,
6058 14266,
6059 4026,
6060 12218,
6061 8122,
6062 16314,
6063 122,
6064 8314,
6065 4218,
6066 12410,
6067 2170,
6068 10362,
6069 6266,
6070 14458,
6071 1146,
6072 9338,
6073 5242,
6074 13434,
6075 3194,
6076 11386,
6077 7290,
6078 15482,
6079 634,
6080 8826,
6081 4730,
6082 12922,
6083 2682,
6084 10874,
6085 6778,
6086 14970,
6087 1658,
6088 9850,
6089 5754,
6090 13946,
6091 3706,
6092 11898,
6093 7802,
6094 15994,
6095 378,
6096 8570,
6097 4474,
6098 12666,
6099 2426,
6100 10618,
6101 6522,
6102 14714,
6103 1402,
6104 9594,
6105 5498,
6106 13690,
6107 3450,
6108 11642,
6109 7546,
6110 15738,
6111 890,
6112 9082,
6113 4986,
6114 13178,
6115 2938,
6116 11130,
6117 7034,
6118 15226,
6119 1914,
6120 10106,
6121 6010,
6122 14202,
6123 3962,
6124 12154,
6125 8058,
6126 16250,
6127 250,
6128 8442,
6129 4346,
6130 12538,
6131 2298,
6132 10490,
6133 6394,
6134 14586,
6135 1274,
6136 9466,
6137 5370,
6138 13562,
6139 3322,
6140 11514,
6141 7418,
6142 15610,
6143 762,
6144 8954,
6145 4858,
6146 13050,
6147 2810,
6148 11002,
6149 6906,
6150 15098,
6151 1786,
6152 9978,
6153 5882,
6154 14074,
6155 3834,
6156 12026,
6157 7930,
6158 16122,
6159 506,
6160 8698,
6161 4602,
6162 12794,
6163 2554,
6164 10746,
6165 6650,
6166 14842,
6167 1530,
6168 9722,
6169 5626,
6170 13818,
6171 3578,
6172 11770,
6173 7674,
6174 15866,
6175 1018,
6176 9210,
6177 5114,
6178 13306,
6179 3066,
6180 11258,
6181 7162,
6182 15354,
6183 2042,
6184 10234,
6185 6138,
6186 14330,
6187 4090,
6188 12282,
6189 8186,
6190 16378,
6191 6,
6192 8198,
6193 4102,
6194 12294,
6195 2054,
6196 10246,
6197 6150,
6198 14342,
6199 1030,
6200 9222,
6201 5126,
6202 13318,
6203 3078,
6204 11270,
6205 7174,
6206 15366,
6207 518,
6208 8710,
6209 4614,
6210 12806,
6211 2566,
6212 10758,
6213 6662,
6214 14854,
6215 1542,
6216 9734,
6217 5638,
6218 13830,
6219 3590,
6220 11782,
6221 7686,
6222 15878,
6223 262,
6224 8454,
6225 4358,
6226 12550,
6227 2310,
6228 10502,
6229 6406,
6230 14598,
6231 1286,
6232 9478,
6233 5382,
6234 13574,
6235 3334,
6236 11526,
6237 7430,
6238 15622,
6239 774,
6240 8966,
6241 4870,
6242 13062,
6243 2822,
6244 11014,
6245 6918,
6246 15110,
6247 1798,
6248 9990,
6249 5894,
6250 14086,
6251 3846,
6252 12038,
6253 7942,
6254 16134,
6255 134,
6256 8326,
6257 4230,
6258 12422,
6259 2182,
6260 10374,
6261 6278,
6262 14470,
6263 1158,
6264 9350,
6265 5254,
6266 13446,
6267 3206,
6268 11398,
6269 7302,
6270 15494,
6271 646,
6272 8838,
6273 4742,
6274 12934,
6275 2694,
6276 10886,
6277 6790,
6278 14982,
6279 1670,
6280 9862,
6281 5766,
6282 13958,
6283 3718,
6284 11910,
6285 7814,
6286 16006,
6287 390,
6288 8582,
6289 4486,
6290 12678,
6291 2438,
6292 10630,
6293 6534,
6294 14726,
6295 1414,
6296 9606,
6297 5510,
6298 13702,
6299 3462,
6300 11654,
6301 7558,
6302 15750,
6303 902,
6304 9094,
6305 4998,
6306 13190,
6307 2950,
6308 11142,
6309 7046,
6310 15238,
6311 1926,
6312 10118,
6313 6022,
6314 14214,
6315 3974,
6316 12166,
6317 8070,
6318 16262,
6319 70,
6320 8262,
6321 4166,
6322 12358,
6323 2118,
6324 10310,
6325 6214,
6326 14406,
6327 1094,
6328 9286,
6329 5190,
6330 13382,
6331 3142,
6332 11334,
6333 7238,
6334 15430,
6335 582,
6336 8774,
6337 4678,
6338 12870,
6339 2630,
6340 10822,
6341 6726,
6342 14918,
6343 1606,
6344 9798,
6345 5702,
6346 13894,
6347 3654,
6348 11846,
6349 7750,
6350 15942,
6351 326,
6352 8518,
6353 4422,
6354 12614,
6355 2374,
6356 10566,
6357 6470,
6358 14662,
6359 1350,
6360 9542,
6361 5446,
6362 13638,
6363 3398,
6364 11590,
6365 7494,
6366 15686,
6367 838,
6368 9030,
6369 4934,
6370 13126,
6371 2886,
6372 11078,
6373 6982,
6374 15174,
6375 1862,
6376 10054,
6377 5958,
6378 14150,
6379 3910,
6380 12102,
6381 8006,
6382 16198,
6383 198,
6384 8390,
6385 4294,
6386 12486,
6387 2246,
6388 10438,
6389 6342,
6390 14534,
6391 1222,
6392 9414,
6393 5318,
6394 13510,
6395 3270,
6396 11462,
6397 7366,
6398 15558,
6399 710,
6400 8902,
6401 4806,
6402 12998,
6403 2758,
6404 10950,
6405 6854,
6406 15046,
6407 1734,
6408 9926,
6409 5830,
6410 14022,
6411 3782,
6412 11974,
6413 7878,
6414 16070,
6415 454,
6416 8646,
6417 4550,
6418 12742,
6419 2502,
6420 10694,
6421 6598,
6422 14790,
6423 1478,
6424 9670,
6425 5574,
6426 13766,
6427 3526,
6428 11718,
6429 7622,
6430 15814,
6431 966,
6432 9158,
6433 5062,
6434 13254,
6435 3014,
6436 11206,
6437 7110,
6438 15302,
6439 1990,
6440 10182,
6441 6086,
6442 14278,
6443 4038,
6444 12230,
6445 8134,
6446 16326,
6447 38,
6448 8230,
6449 4134,
6450 12326,
6451 2086,
6452 10278,
6453 6182,
6454 14374,
6455 1062,
6456 9254,
6457 5158,
6458 13350,
6459 3110,
6460 11302,
6461 7206,
6462 15398,
6463 550,
6464 8742,
6465 4646,
6466 12838,
6467 2598,
6468 10790,
6469 6694,
6470 14886,
6471 1574,
6472 9766,
6473 5670,
6474 13862,
6475 3622,
6476 11814,
6477 7718,
6478 15910,
6479 294,
6480 8486,
6481 4390,
6482 12582,
6483 2342,
6484 10534,
6485 6438,
6486 14630,
6487 1318,
6488 9510,
6489 5414,
6490 13606,
6491 3366,
6492 11558,
6493 7462,
6494 15654,
6495 806,
6496 8998,
6497 4902,
6498 13094,
6499 2854,
6500 11046,
6501 6950,
6502 15142,
6503 1830,
6504 10022,
6505 5926,
6506 14118,
6507 3878,
6508 12070,
6509 7974,
6510 16166,
6511 166,
6512 8358,
6513 4262,
6514 12454,
6515 2214,
6516 10406,
6517 6310,
6518 14502,
6519 1190,
6520 9382,
6521 5286,
6522 13478,
6523 3238,
6524 11430,
6525 7334,
6526 15526,
6527 678,
6528 8870,
6529 4774,
6530 12966,
6531 2726,
6532 10918,
6533 6822,
6534 15014,
6535 1702,
6536 9894,
6537 5798,
6538 13990,
6539 3750,
6540 11942,
6541 7846,
6542 16038,
6543 422,
6544 8614,
6545 4518,
6546 12710,
6547 2470,
6548 10662,
6549 6566,
6550 14758,
6551 1446,
6552 9638,
6553 5542,
6554 13734,
6555 3494,
6556 11686,
6557 7590,
6558 15782,
6559 934,
6560 9126,
6561 5030,
6562 13222,
6563 2982,
6564 11174,
6565 7078,
6566 15270,
6567 1958,
6568 10150,
6569 6054,
6570 14246,
6571 4006,
6572 12198,
6573 8102,
6574 16294,
6575 102,
6576 8294,
6577 4198,
6578 12390,
6579 2150,
6580 10342,
6581 6246,
6582 14438,
6583 1126,
6584 9318,
6585 5222,
6586 13414,
6587 3174,
6588 11366,
6589 7270,
6590 15462,
6591 614,
6592 8806,
6593 4710,
6594 12902,
6595 2662,
6596 10854,
6597 6758,
6598 14950,
6599 1638,
6600 9830,
6601 5734,
6602 13926,
6603 3686,
6604 11878,
6605 7782,
6606 15974,
6607 358,
6608 8550,
6609 4454,
6610 12646,
6611 2406,
6612 10598,
6613 6502,
6614 14694,
6615 1382,
6616 9574,
6617 5478,
6618 13670,
6619 3430,
6620 11622,
6621 7526,
6622 15718,
6623 870,
6624 9062,
6625 4966,
6626 13158,
6627 2918,
6628 11110,
6629 7014,
6630 15206,
6631 1894,
6632 10086,
6633 5990,
6634 14182,
6635 3942,
6636 12134,
6637 8038,
6638 16230,
6639 230,
6640 8422,
6641 4326,
6642 12518,
6643 2278,
6644 10470,
6645 6374,
6646 14566,
6647 1254,
6648 9446,
6649 5350,
6650 13542,
6651 3302,
6652 11494,
6653 7398,
6654 15590,
6655 742,
6656 8934,
6657 4838,
6658 13030,
6659 2790,
6660 10982,
6661 6886,
6662 15078,
6663 1766,
6664 9958,
6665 5862,
6666 14054,
6667 3814,
6668 12006,
6669 7910,
6670 16102,
6671 486,
6672 8678,
6673 4582,
6674 12774,
6675 2534,
6676 10726,
6677 6630,
6678 14822,
6679 1510,
6680 9702,
6681 5606,
6682 13798,
6683 3558,
6684 11750,
6685 7654,
6686 15846,
6687 998,
6688 9190,
6689 5094,
6690 13286,
6691 3046,
6692 11238,
6693 7142,
6694 15334,
6695 2022,
6696 10214,
6697 6118,
6698 14310,
6699 4070,
6700 12262,
6701 8166,
6702 16358,
6703 22,
6704 8214,
6705 4118,
6706 12310,
6707 2070,
6708 10262,
6709 6166,
6710 14358,
6711 1046,
6712 9238,
6713 5142,
6714 13334,
6715 3094,
6716 11286,
6717 7190,
6718 15382,
6719 534,
6720 8726,
6721 4630,
6722 12822,
6723 2582,
6724 10774,
6725 6678,
6726 14870,
6727 1558,
6728 9750,
6729 5654,
6730 13846,
6731 3606,
6732 11798,
6733 7702,
6734 15894,
6735 278,
6736 8470,
6737 4374,
6738 12566,
6739 2326,
6740 10518,
6741 6422,
6742 14614,
6743 1302,
6744 9494,
6745 5398,
6746 13590,
6747 3350,
6748 11542,
6749 7446,
6750 15638,
6751 790,
6752 8982,
6753 4886,
6754 13078,
6755 2838,
6756 11030,
6757 6934,
6758 15126,
6759 1814,
6760 10006,
6761 5910,
6762 14102,
6763 3862,
6764 12054,
6765 7958,
6766 16150,
6767 150,
6768 8342,
6769 4246,
6770 12438,
6771 2198,
6772 10390,
6773 6294,
6774 14486,
6775 1174,
6776 9366,
6777 5270,
6778 13462,
6779 3222,
6780 11414,
6781 7318,
6782 15510,
6783 662,
6784 8854,
6785 4758,
6786 12950,
6787 2710,
6788 10902,
6789 6806,
6790 14998,
6791 1686,
6792 9878,
6793 5782,
6794 13974,
6795 3734,
6796 11926,
6797 7830,
6798 16022,
6799 406,
6800 8598,
6801 4502,
6802 12694,
6803 2454,
6804 10646,
6805 6550,
6806 14742,
6807 1430,
6808 9622,
6809 5526,
6810 13718,
6811 3478,
6812 11670,
6813 7574,
6814 15766,
6815 918,
6816 9110,
6817 5014,
6818 13206,
6819 2966,
6820 11158,
6821 7062,
6822 15254,
6823 1942,
6824 10134,
6825 6038,
6826 14230,
6827 3990,
6828 12182,
6829 8086,
6830 16278,
6831 86,
6832 8278,
6833 4182,
6834 12374,
6835 2134,
6836 10326,
6837 6230,
6838 14422,
6839 1110,
6840 9302,
6841 5206,
6842 13398,
6843 3158,
6844 11350,
6845 7254,
6846 15446,
6847 598,
6848 8790,
6849 4694,
6850 12886,
6851 2646,
6852 10838,
6853 6742,
6854 14934,
6855 1622,
6856 9814,
6857 5718,
6858 13910,
6859 3670,
6860 11862,
6861 7766,
6862 15958,
6863 342,
6864 8534,
6865 4438,
6866 12630,
6867 2390,
6868 10582,
6869 6486,
6870 14678,
6871 1366,
6872 9558,
6873 5462,
6874 13654,
6875 3414,
6876 11606,
6877 7510,
6878 15702,
6879 854,
6880 9046,
6881 4950,
6882 13142,
6883 2902,
6884 11094,
6885 6998,
6886 15190,
6887 1878,
6888 10070,
6889 5974,
6890 14166,
6891 3926,
6892 12118,
6893 8022,
6894 16214,
6895 214,
6896 8406,
6897 4310,
6898 12502,
6899 2262,
6900 10454,
6901 6358,
6902 14550,
6903 1238,
6904 9430,
6905 5334,
6906 13526,
6907 3286,
6908 11478,
6909 7382,
6910 15574,
6911 726,
6912 8918,
6913 4822,
6914 13014,
6915 2774,
6916 10966,
6917 6870,
6918 15062,
6919 1750,
6920 9942,
6921 5846,
6922 14038,
6923 3798,
6924 11990,
6925 7894,
6926 16086,
6927 470,
6928 8662,
6929 4566,
6930 12758,
6931 2518,
6932 10710,
6933 6614,
6934 14806,
6935 1494,
6936 9686,
6937 5590,
6938 13782,
6939 3542,
6940 11734,
6941 7638,
6942 15830,
6943 982,
6944 9174,
6945 5078,
6946 13270,
6947 3030,
6948 11222,
6949 7126,
6950 15318,
6951 2006,
6952 10198,
6953 6102,
6954 14294,
6955 4054,
6956 12246,
6957 8150,
6958 16342,
6959 54,
6960 8246,
6961 4150,
6962 12342,
6963 2102,
6964 10294,
6965 6198,
6966 14390,
6967 1078,
6968 9270,
6969 5174,
6970 13366,
6971 3126,
6972 11318,
6973 7222,
6974 15414,
6975 566,
6976 8758,
6977 4662,
6978 12854,
6979 2614,
6980 10806,
6981 6710,
6982 14902,
6983 1590,
6984 9782,
6985 5686,
6986 13878,
6987 3638,
6988 11830,
6989 7734,
6990 15926,
6991 310,
6992 8502,
6993 4406,
6994 12598,
6995 2358,
6996 10550,
6997 6454,
6998 14646,
6999 1334,
7000 9526,
7001 5430,
7002 13622,
7003 3382,
7004 11574,
7005 7478,
7006 15670,
7007 822,
7008 9014,
7009 4918,
7010 13110,
7011 2870,
7012 11062,
7013 6966,
7014 15158,
7015 1846,
7016 10038,
7017 5942,
7018 14134,
7019 3894,
7020 12086,
7021 7990,
7022 16182,
7023 182,
7024 8374,
7025 4278,
7026 12470,
7027 2230,
7028 10422,
7029 6326,
7030 14518,
7031 1206,
7032 9398,
7033 5302,
7034 13494,
7035 3254,
7036 11446,
7037 7350,
7038 15542,
7039 694,
7040 8886,
7041 4790,
7042 12982,
7043 2742,
7044 10934,
7045 6838,
7046 15030,
7047 1718,
7048 9910,
7049 5814,
7050 14006,
7051 3766,
7052 11958,
7053 7862,
7054 16054,
7055 438,
7056 8630,
7057 4534,
7058 12726,
7059 2486,
7060 10678,
7061 6582,
7062 14774,
7063 1462,
7064 9654,
7065 5558,
7066 13750,
7067 3510,
7068 11702,
7069 7606,
7070 15798,
7071 950,
7072 9142,
7073 5046,
7074 13238,
7075 2998,
7076 11190,
7077 7094,
7078 15286,
7079 1974,
7080 10166,
7081 6070,
7082 14262,
7083 4022,
7084 12214,
7085 8118,
7086 16310,
7087 118,
7088 8310,
7089 4214,
7090 12406,
7091 2166,
7092 10358,
7093 6262,
7094 14454,
7095 1142,
7096 9334,
7097 5238,
7098 13430,
7099 3190,
7100 11382,
7101 7286,
7102 15478,
7103 630,
7104 8822,
7105 4726,
7106 12918,
7107 2678,
7108 10870,
7109 6774,
7110 14966,
7111 1654,
7112 9846,
7113 5750,
7114 13942,
7115 3702,
7116 11894,
7117 7798,
7118 15990,
7119 374,
7120 8566,
7121 4470,
7122 12662,
7123 2422,
7124 10614,
7125 6518,
7126 14710,
7127 1398,
7128 9590,
7129 5494,
7130 13686,
7131 3446,
7132 11638,
7133 7542,
7134 15734,
7135 886,
7136 9078,
7137 4982,
7138 13174,
7139 2934,
7140 11126,
7141 7030,
7142 15222,
7143 1910,
7144 10102,
7145 6006,
7146 14198,
7147 3958,
7148 12150,
7149 8054,
7150 16246,
7151 246,
7152 8438,
7153 4342,
7154 12534,
7155 2294,
7156 10486,
7157 6390,
7158 14582,
7159 1270,
7160 9462,
7161 5366,
7162 13558,
7163 3318,
7164 11510,
7165 7414,
7166 15606,
7167 758,
7168 8950,
7169 4854,
7170 13046,
7171 2806,
7172 10998,
7173 6902,
7174 15094,
7175 1782,
7176 9974,
7177 5878,
7178 14070,
7179 3830,
7180 12022,
7181 7926,
7182 16118,
7183 502,
7184 8694,
7185 4598,
7186 12790,
7187 2550,
7188 10742,
7189 6646,
7190 14838,
7191 1526,
7192 9718,
7193 5622,
7194 13814,
7195 3574,
7196 11766,
7197 7670,
7198 15862,
7199 1014,
7200 9206,
7201 5110,
7202 13302,
7203 3062,
7204 11254,
7205 7158,
7206 15350,
7207 2038,
7208 10230,
7209 6134,
7210 14326,
7211 4086,
7212 12278,
7213 8182,
7214 16374,
7215 14,
7216 8206,
7217 4110,
7218 12302,
7219 2062,
7220 10254,
7221 6158,
7222 14350,
7223 1038,
7224 9230,
7225 5134,
7226 13326,
7227 3086,
7228 11278,
7229 7182,
7230 15374,
7231 526,
7232 8718,
7233 4622,
7234 12814,
7235 2574,
7236 10766,
7237 6670,
7238 14862,
7239 1550,
7240 9742,
7241 5646,
7242 13838,
7243 3598,
7244 11790,
7245 7694,
7246 15886,
7247 270,
7248 8462,
7249 4366,
7250 12558,
7251 2318,
7252 10510,
7253 6414,
7254 14606,
7255 1294,
7256 9486,
7257 5390,
7258 13582,
7259 3342,
7260 11534,
7261 7438,
7262 15630,
7263 782,
7264 8974,
7265 4878,
7266 13070,
7267 2830,
7268 11022,
7269 6926,
7270 15118,
7271 1806,
7272 9998,
7273 5902,
7274 14094,
7275 3854,
7276 12046,
7277 7950,
7278 16142,
7279 142,
7280 8334,
7281 4238,
7282 12430,
7283 2190,
7284 10382,
7285 6286,
7286 14478,
7287 1166,
7288 9358,
7289 5262,
7290 13454,
7291 3214,
7292 11406,
7293 7310,
7294 15502,
7295 654,
7296 8846,
7297 4750,
7298 12942,
7299 2702,
7300 10894,
7301 6798,
7302 14990,
7303 1678,
7304 9870,
7305 5774,
7306 13966,
7307 3726,
7308 11918,
7309 7822,
7310 16014,
7311 398,
7312 8590,
7313 4494,
7314 12686,
7315 2446,
7316 10638,
7317 6542,
7318 14734,
7319 1422,
7320 9614,
7321 5518,
7322 13710,
7323 3470,
7324 11662,
7325 7566,
7326 15758,
7327 910,
7328 9102,
7329 5006,
7330 13198,
7331 2958,
7332 11150,
7333 7054,
7334 15246,
7335 1934,
7336 10126,
7337 6030,
7338 14222,
7339 3982,
7340 12174,
7341 8078,
7342 16270,
7343 78,
7344 8270,
7345 4174,
7346 12366,
7347 2126,
7348 10318,
7349 6222,
7350 14414,
7351 1102,
7352 9294,
7353 5198,
7354 13390,
7355 3150,
7356 11342,
7357 7246,
7358 15438,
7359 590,
7360 8782,
7361 4686,
7362 12878,
7363 2638,
7364 10830,
7365 6734,
7366 14926,
7367 1614,
7368 9806,
7369 5710,
7370 13902,
7371 3662,
7372 11854,
7373 7758,
7374 15950,
7375 334,
7376 8526,
7377 4430,
7378 12622,
7379 2382,
7380 10574,
7381 6478,
7382 14670,
7383 1358,
7384 9550,
7385 5454,
7386 13646,
7387 3406,
7388 11598,
7389 7502,
7390 15694,
7391 846,
7392 9038,
7393 4942,
7394 13134,
7395 2894,
7396 11086,
7397 6990,
7398 15182,
7399 1870,
7400 10062,
7401 5966,
7402 14158,
7403 3918,
7404 12110,
7405 8014,
7406 16206,
7407 206,
7408 8398,
7409 4302,
7410 12494,
7411 2254,
7412 10446,
7413 6350,
7414 14542,
7415 1230,
7416 9422,
7417 5326,
7418 13518,
7419 3278,
7420 11470,
7421 7374,
7422 15566,
7423 718,
7424 8910,
7425 4814,
7426 13006,
7427 2766,
7428 10958,
7429 6862,
7430 15054,
7431 1742,
7432 9934,
7433 5838,
7434 14030,
7435 3790,
7436 11982,
7437 7886,
7438 16078,
7439 462,
7440 8654,
7441 4558,
7442 12750,
7443 2510,
7444 10702,
7445 6606,
7446 14798,
7447 1486,
7448 9678,
7449 5582,
7450 13774,
7451 3534,
7452 11726,
7453 7630,
7454 15822,
7455 974,
7456 9166,
7457 5070,
7458 13262,
7459 3022,
7460 11214,
7461 7118,
7462 15310,
7463 1998,
7464 10190,
7465 6094,
7466 14286,
7467 4046,
7468 12238,
7469 8142,
7470 16334,
7471 46,
7472 8238,
7473 4142,
7474 12334,
7475 2094,
7476 10286,
7477 6190,
7478 14382,
7479 1070,
7480 9262,
7481 5166,
7482 13358,
7483 3118,
7484 11310,
7485 7214,
7486 15406,
7487 558,
7488 8750,
7489 4654,
7490 12846,
7491 2606,
7492 10798,
7493 6702,
7494 14894,
7495 1582,
7496 9774,
7497 5678,
7498 13870,
7499 3630,
7500 11822,
7501 7726,
7502 15918,
7503 302,
7504 8494,
7505 4398,
7506 12590,
7507 2350,
7508 10542,
7509 6446,
7510 14638,
7511 1326,
7512 9518,
7513 5422,
7514 13614,
7515 3374,
7516 11566,
7517 7470,
7518 15662,
7519 814,
7520 9006,
7521 4910,
7522 13102,
7523 2862,
7524 11054,
7525 6958,
7526 15150,
7527 1838,
7528 10030,
7529 5934,
7530 14126,
7531 3886,
7532 12078,
7533 7982,
7534 16174,
7535 174,
7536 8366,
7537 4270,
7538 12462,
7539 2222,
7540 10414,
7541 6318,
7542 14510,
7543 1198,
7544 9390,
7545 5294,
7546 13486,
7547 3246,
7548 11438,
7549 7342,
7550 15534,
7551 686,
7552 8878,
7553 4782,
7554 12974,
7555 2734,
7556 10926,
7557 6830,
7558 15022,
7559 1710,
7560 9902,
7561 5806,
7562 13998,
7563 3758,
7564 11950,
7565 7854,
7566 16046,
7567 430,
7568 8622,
7569 4526,
7570 12718,
7571 2478,
7572 10670,
7573 6574,
7574 14766,
7575 1454,
7576 9646,
7577 5550,
7578 13742,
7579 3502,
7580 11694,
7581 7598,
7582 15790,
7583 942,
7584 9134,
7585 5038,
7586 13230,
7587 2990,
7588 11182,
7589 7086,
7590 15278,
7591 1966,
7592 10158,
7593 6062,
7594 14254,
7595 4014,
7596 12206,
7597 8110,
7598 16302,
7599 110,
7600 8302,
7601 4206,
7602 12398,
7603 2158,
7604 10350,
7605 6254,
7606 14446,
7607 1134,
7608 9326,
7609 5230,
7610 13422,
7611 3182,
7612 11374,
7613 7278,
7614 15470,
7615 622,
7616 8814,
7617 4718,
7618 12910,
7619 2670,
7620 10862,
7621 6766,
7622 14958,
7623 1646,
7624 9838,
7625 5742,
7626 13934,
7627 3694,
7628 11886,
7629 7790,
7630 15982,
7631 366,
7632 8558,
7633 4462,
7634 12654,
7635 2414,
7636 10606,
7637 6510,
7638 14702,
7639 1390,
7640 9582,
7641 5486,
7642 13678,
7643 3438,
7644 11630,
7645 7534,
7646 15726,
7647 878,
7648 9070,
7649 4974,
7650 13166,
7651 2926,
7652 11118,
7653 7022,
7654 15214,
7655 1902,
7656 10094,
7657 5998,
7658 14190,
7659 3950,
7660 12142,
7661 8046,
7662 16238,
7663 238,
7664 8430,
7665 4334,
7666 12526,
7667 2286,
7668 10478,
7669 6382,
7670 14574,
7671 1262,
7672 9454,
7673 5358,
7674 13550,
7675 3310,
7676 11502,
7677 7406,
7678 15598,
7679 750,
7680 8942,
7681 4846,
7682 13038,
7683 2798,
7684 10990,
7685 6894,
7686 15086,
7687 1774,
7688 9966,
7689 5870,
7690 14062,
7691 3822,
7692 12014,
7693 7918,
7694 16110,
7695 494,
7696 8686,
7697 4590,
7698 12782,
7699 2542,
7700 10734,
7701 6638,
7702 14830,
7703 1518,
7704 9710,
7705 5614,
7706 13806,
7707 3566,
7708 11758,
7709 7662,
7710 15854,
7711 1006,
7712 9198,
7713 5102,
7714 13294,
7715 3054,
7716 11246,
7717 7150,
7718 15342,
7719 2030,
7720 10222,
7721 6126,
7722 14318,
7723 4078,
7724 12270,
7725 8174,
7726 16366,
7727 30,
7728 8222,
7729 4126,
7730 12318,
7731 2078,
7732 10270,
7733 6174,
7734 14366,
7735 1054,
7736 9246,
7737 5150,
7738 13342,
7739 3102,
7740 11294,
7741 7198,
7742 15390,
7743 542,
7744 8734,
7745 4638,
7746 12830,
7747 2590,
7748 10782,
7749 6686,
7750 14878,
7751 1566,
7752 9758,
7753 5662,
7754 13854,
7755 3614,
7756 11806,
7757 7710,
7758 15902,
7759 286,
7760 8478,
7761 4382,
7762 12574,
7763 2334,
7764 10526,
7765 6430,
7766 14622,
7767 1310,
7768 9502,
7769 5406,
7770 13598,
7771 3358,
7772 11550,
7773 7454,
7774 15646,
7775 798,
7776 8990,
7777 4894,
7778 13086,
7779 2846,
7780 11038,
7781 6942,
7782 15134,
7783 1822,
7784 10014,
7785 5918,
7786 14110,
7787 3870,
7788 12062,
7789 7966,
7790 16158,
7791 158,
7792 8350,
7793 4254,
7794 12446,
7795 2206,
7796 10398,
7797 6302,
7798 14494,
7799 1182,
7800 9374,
7801 5278,
7802 13470,
7803 3230,
7804 11422,
7805 7326,
7806 15518,
7807 670,
7808 8862,
7809 4766,
7810 12958,
7811 2718,
7812 10910,
7813 6814,
7814 15006,
7815 1694,
7816 9886,
7817 5790,
7818 13982,
7819 3742,
7820 11934,
7821 7838,
7822 16030,
7823 414,
7824 8606,
7825 4510,
7826 12702,
7827 2462,
7828 10654,
7829 6558,
7830 14750,
7831 1438,
7832 9630,
7833 5534,
7834 13726,
7835 3486,
7836 11678,
7837 7582,
7838 15774,
7839 926,
7840 9118,
7841 5022,
7842 13214,
7843 2974,
7844 11166,
7845 7070,
7846 15262,
7847 1950,
7848 10142,
7849 6046,
7850 14238,
7851 3998,
7852 12190,
7853 8094,
7854 16286,
7855 94,
7856 8286,
7857 4190,
7858 12382,
7859 2142,
7860 10334,
7861 6238,
7862 14430,
7863 1118,
7864 9310,
7865 5214,
7866 13406,
7867 3166,
7868 11358,
7869 7262,
7870 15454,
7871 606,
7872 8798,
7873 4702,
7874 12894,
7875 2654,
7876 10846,
7877 6750,
7878 14942,
7879 1630,
7880 9822,
7881 5726,
7882 13918,
7883 3678,
7884 11870,
7885 7774,
7886 15966,
7887 350,
7888 8542,
7889 4446,
7890 12638,
7891 2398,
7892 10590,
7893 6494,
7894 14686,
7895 1374,
7896 9566,
7897 5470,
7898 13662,
7899 3422,
7900 11614,
7901 7518,
7902 15710,
7903 862,
7904 9054,
7905 4958,
7906 13150,
7907 2910,
7908 11102,
7909 7006,
7910 15198,
7911 1886,
7912 10078,
7913 5982,
7914 14174,
7915 3934,
7916 12126,
7917 8030,
7918 16222,
7919 222,
7920 8414,
7921 4318,
7922 12510,
7923 2270,
7924 10462,
7925 6366,
7926 14558,
7927 1246,
7928 9438,
7929 5342,
7930 13534,
7931 3294,
7932 11486,
7933 7390,
7934 15582,
7935 734,
7936 8926,
7937 4830,
7938 13022,
7939 2782,
7940 10974,
7941 6878,
7942 15070,
7943 1758,
7944 9950,
7945 5854,
7946 14046,
7947 3806,
7948 11998,
7949 7902,
7950 16094,
7951 478,
7952 8670,
7953 4574,
7954 12766,
7955 2526,
7956 10718,
7957 6622,
7958 14814,
7959 1502,
7960 9694,
7961 5598,
7962 13790,
7963 3550,
7964 11742,
7965 7646,
7966 15838,
7967 990,
7968 9182,
7969 5086,
7970 13278,
7971 3038,
7972 11230,
7973 7134,
7974 15326,
7975 2014,
7976 10206,
7977 6110,
7978 14302,
7979 4062,
7980 12254,
7981 8158,
7982 16350,
7983 62,
7984 8254,
7985 4158,
7986 12350,
7987 2110,
7988 10302,
7989 6206,
7990 14398,
7991 1086,
7992 9278,
7993 5182,
7994 13374,
7995 3134,
7996 11326,
7997 7230,
7998 15422,
7999 574,
8000 8766,
8001 4670,
8002 12862,
8003 2622,
8004 10814,
8005 6718,
8006 14910,
8007 1598,
8008 9790,
8009 5694,
8010 13886,
8011 3646,
8012 11838,
8013 7742,
8014 15934,
8015 318,
8016 8510,
8017 4414,
8018 12606,
8019 2366,
8020 10558,
8021 6462,
8022 14654,
8023 1342,
8024 9534,
8025 5438,
8026 13630,
8027 3390,
8028 11582,
8029 7486,
8030 15678,
8031 830,
8032 9022,
8033 4926,
8034 13118,
8035 2878,
8036 11070,
8037 6974,
8038 15166,
8039 1854,
8040 10046,
8041 5950,
8042 14142,
8043 3902,
8044 12094,
8045 7998,
8046 16190,
8047 190,
8048 8382,
8049 4286,
8050 12478,
8051 2238,
8052 10430,
8053 6334,
8054 14526,
8055 1214,
8056 9406,
8057 5310,
8058 13502,
8059 3262,
8060 11454,
8061 7358,
8062 15550,
8063 702,
8064 8894,
8065 4798,
8066 12990,
8067 2750,
8068 10942,
8069 6846,
8070 15038,
8071 1726,
8072 9918,
8073 5822,
8074 14014,
8075 3774,
8076 11966,
8077 7870,
8078 16062,
8079 446,
8080 8638,
8081 4542,
8082 12734,
8083 2494,
8084 10686,
8085 6590,
8086 14782,
8087 1470,
8088 9662,
8089 5566,
8090 13758,
8091 3518,
8092 11710,
8093 7614,
8094 15806,
8095 958,
8096 9150,
8097 5054,
8098 13246,
8099 3006,
8100 11198,
8101 7102,
8102 15294,
8103 1982,
8104 10174,
8105 6078,
8106 14270,
8107 4030,
8108 12222,
8109 8126,
8110 16318,
8111 126,
8112 8318,
8113 4222,
8114 12414,
8115 2174,
8116 10366,
8117 6270,
8118 14462,
8119 1150,
8120 9342,
8121 5246,
8122 13438,
8123 3198,
8124 11390,
8125 7294,
8126 15486,
8127 638,
8128 8830,
8129 4734,
8130 12926,
8131 2686,
8132 10878,
8133 6782,
8134 14974,
8135 1662,
8136 9854,
8137 5758,
8138 13950,
8139 3710,
8140 11902,
8141 7806,
8142 15998,
8143 382,
8144 8574,
8145 4478,
8146 12670,
8147 2430,
8148 10622,
8149 6526,
8150 14718,
8151 1406,
8152 9598,
8153 5502,
8154 13694,
8155 3454,
8156 11646,
8157 7550,
8158 15742,
8159 894,
8160 9086,
8161 4990,
8162 13182,
8163 2942,
8164 11134,
8165 7038,
8166 15230,
8167 1918,
8168 10110,
8169 6014,
8170 14206,
8171 3966,
8172 12158,
8173 8062,
8174 16254,
8175 254,
8176 8446,
8177 4350,
8178 12542,
8179 2302,
8180 10494,
8181 6398,
8182 14590,
8183 1278,
8184 9470,
8185 5374,
8186 13566,
8187 3326,
8188 11518,
8189 7422,
8190 15614,
8191 766,
8192 8958,
8193 4862,
8194 13054,
8195 2814,
8196 11006,
8197 6910,
8198 15102,
8199 1790,
8200 9982,
8201 5886,
8202 14078,
8203 3838,
8204 12030,
8205 7934,
8206 16126,
8207 510,
8208 8702,
8209 4606,
8210 12798,
8211 2558,
8212 10750,
8213 6654,
8214 14846,
8215 1534,
8216 9726,
8217 5630,
8218 13822,
8219 3582,
8220 11774,
8221 7678,
8222 15870,
8223 1022,
8224 9214,
8225 5118,
8226 13310,
8227 3070,
8228 11262,
8229 7166,
8230 15358,
8231 2046,
8232 10238,
8233 6142,
8234 14334,
8235 4094,
8236 12286,
8237 8190,
8238 16382,
8239 1,
8240 8193,
8241 4097,
8242 12289,
8243 2049,
8244 10241,
8245 6145,
8246 14337,
8247 1025,
8248 9217,
8249 5121,
8250 13313,
8251 3073,
8252 11265,
8253 7169,
8254 15361,
8255 513,
8256 8705,
8257 4609,
8258 12801,
8259 2561,
8260 10753,
8261 6657,
8262 14849,
8263 1537,
8264 9729,
8265 5633,
8266 13825,
8267 3585,
8268 11777,
8269 7681,
8270 15873,
8271 257,
8272 8449,
8273 4353,
8274 12545,
8275 2305,
8276 10497,
8277 6401,
8278 14593,
8279 1281,
8280 9473,
8281 5377,
8282 13569,
8283 3329,
8284 11521,
8285 7425,
8286 15617,
8287 769,
8288 8961,
8289 4865,
8290 13057,
8291 2817,
8292 11009,
8293 6913,
8294 15105,
8295 1793,
8296 9985,
8297 5889,
8298 14081,
8299 3841,
8300 12033,
8301 7937,
8302 16129,
8303 129,
8304 8321,
8305 4225,
8306 12417,
8307 2177,
8308 10369,
8309 6273,
8310 14465,
8311 1153,
8312 9345,
8313 5249,
8314 13441,
8315 3201,
8316 11393,
8317 7297,
8318 15489,
8319 641,
8320 8833,
8321 4737,
8322 12929,
8323 2689,
8324 10881,
8325 6785,
8326 14977,
8327 1665,
8328 9857,
8329 5761,
8330 13953,
8331 3713,
8332 11905,
8333 7809,
8334 16001,
8335 385,
8336 8577,
8337 4481,
8338 12673,
8339 2433,
8340 10625,
8341 6529,
8342 14721,
8343 1409,
8344 9601,
8345 5505,
8346 13697,
8347 3457,
8348 11649,
8349 7553,
8350 15745,
8351 897,
8352 9089,
8353 4993,
8354 13185,
8355 2945,
8356 11137,
8357 7041,
8358 15233,
8359 1921,
8360 10113,
8361 6017,
8362 14209,
8363 3969,
8364 12161,
8365 8065,
8366 16257,
8367 65,
8368 8257,
8369 4161,
8370 12353,
8371 2113,
8372 10305,
8373 6209,
8374 14401,
8375 1089,
8376 9281,
8377 5185,
8378 13377,
8379 3137,
8380 11329,
8381 7233,
8382 15425,
8383 577,
8384 8769,
8385 4673,
8386 12865,
8387 2625,
8388 10817,
8389 6721,
8390 14913,
8391 1601,
8392 9793,
8393 5697,
8394 13889,
8395 3649,
8396 11841,
8397 7745,
8398 15937,
8399 321,
8400 8513,
8401 4417,
8402 12609,
8403 2369,
8404 10561,
8405 6465,
8406 14657,
8407 1345,
8408 9537,
8409 5441,
8410 13633,
8411 3393,
8412 11585,
8413 7489,
8414 15681,
8415 833,
8416 9025,
8417 4929,
8418 13121,
8419 2881,
8420 11073,
8421 6977,
8422 15169,
8423 1857,
8424 10049,
8425 5953,
8426 14145,
8427 3905,
8428 12097,
8429 8001,
8430 16193,
8431 193,
8432 8385,
8433 4289,
8434 12481,
8435 2241,
8436 10433,
8437 6337,
8438 14529,
8439 1217,
8440 9409,
8441 5313,
8442 13505,
8443 3265,
8444 11457,
8445 7361,
8446 15553,
8447 705,
8448 8897,
8449 4801,
8450 12993,
8451 2753,
8452 10945,
8453 6849,
8454 15041,
8455 1729,
8456 9921,
8457 5825,
8458 14017,
8459 3777,
8460 11969,
8461 7873,
8462 16065,
8463 449,
8464 8641,
8465 4545,
8466 12737,
8467 2497,
8468 10689,
8469 6593,
8470 14785,
8471 1473,
8472 9665,
8473 5569,
8474 13761,
8475 3521,
8476 11713,
8477 7617,
8478 15809,
8479 961,
8480 9153,
8481 5057,
8482 13249,
8483 3009,
8484 11201,
8485 7105,
8486 15297,
8487 1985,
8488 10177,
8489 6081,
8490 14273,
8491 4033,
8492 12225,
8493 8129,
8494 16321,
8495 33,
8496 8225,
8497 4129,
8498 12321,
8499 2081,
8500 10273,
8501 6177,
8502 14369,
8503 1057,
8504 9249,
8505 5153,
8506 13345,
8507 3105,
8508 11297,
8509 7201,
8510 15393,
8511 545,
8512 8737,
8513 4641,
8514 12833,
8515 2593,
8516 10785,
8517 6689,
8518 14881,
8519 1569,
8520 9761,
8521 5665,
8522 13857,
8523 3617,
8524 11809,
8525 7713,
8526 15905,
8527 289,
8528 8481,
8529 4385,
8530 12577,
8531 2337,
8532 10529,
8533 6433,
8534 14625,
8535 1313,
8536 9505,
8537 5409,
8538 13601,
8539 3361,
8540 11553,
8541 7457,
8542 15649,
8543 801,
8544 8993,
8545 4897,
8546 13089,
8547 2849,
8548 11041,
8549 6945,
8550 15137,
8551 1825,
8552 10017,
8553 5921,
8554 14113,
8555 3873,
8556 12065,
8557 7969,
8558 16161,
8559 161,
8560 8353,
8561 4257,
8562 12449,
8563 2209,
8564 10401,
8565 6305,
8566 14497,
8567 1185,
8568 9377,
8569 5281,
8570 13473,
8571 3233,
8572 11425,
8573 7329,
8574 15521,
8575 673,
8576 8865,
8577 4769,
8578 12961,
8579 2721,
8580 10913,
8581 6817,
8582 15009,
8583 1697,
8584 9889,
8585 5793,
8586 13985,
8587 3745,
8588 11937,
8589 7841,
8590 16033,
8591 417,
8592 8609,
8593 4513,
8594 12705,
8595 2465,
8596 10657,
8597 6561,
8598 14753,
8599 1441,
8600 9633,
8601 5537,
8602 13729,
8603 3489,
8604 11681,
8605 7585,
8606 15777,
8607 929,
8608 9121,
8609 5025,
8610 13217,
8611 2977,
8612 11169,
8613 7073,
8614 15265,
8615 1953,
8616 10145,
8617 6049,
8618 14241,
8619 4001,
8620 12193,
8621 8097,
8622 16289,
8623 97,
8624 8289,
8625 4193,
8626 12385,
8627 2145,
8628 10337,
8629 6241,
8630 14433,
8631 1121,
8632 9313,
8633 5217,
8634 13409,
8635 3169,
8636 11361,
8637 7265,
8638 15457,
8639 609,
8640 8801,
8641 4705,
8642 12897,
8643 2657,
8644 10849,
8645 6753,
8646 14945,
8647 1633,
8648 9825,
8649 5729,
8650 13921,
8651 3681,
8652 11873,
8653 7777,
8654 15969,
8655 353,
8656 8545,
8657 4449,
8658 12641,
8659 2401,
8660 10593,
8661 6497,
8662 14689,
8663 1377,
8664 9569,
8665 5473,
8666 13665,
8667 3425,
8668 11617,
8669 7521,
8670 15713,
8671 865,
8672 9057,
8673 4961,
8674 13153,
8675 2913,
8676 11105,
8677 7009,
8678 15201,
8679 1889,
8680 10081,
8681 5985,
8682 14177,
8683 3937,
8684 12129,
8685 8033,
8686 16225,
8687 225,
8688 8417,
8689 4321,
8690 12513,
8691 2273,
8692 10465,
8693 6369,
8694 14561,
8695 1249,
8696 9441,
8697 5345,
8698 13537,
8699 3297,
8700 11489,
8701 7393,
8702 15585,
8703 737,
8704 8929,
8705 4833,
8706 13025,
8707 2785,
8708 10977,
8709 6881,
8710 15073,
8711 1761,
8712 9953,
8713 5857,
8714 14049,
8715 3809,
8716 12001,
8717 7905,
8718 16097,
8719 481,
8720 8673,
8721 4577,
8722 12769,
8723 2529,
8724 10721,
8725 6625,
8726 14817,
8727 1505,
8728 9697,
8729 5601,
8730 13793,
8731 3553,
8732 11745,
8733 7649,
8734 15841,
8735 993,
8736 9185,
8737 5089,
8738 13281,
8739 3041,
8740 11233,
8741 7137,
8742 15329,
8743 2017,
8744 10209,
8745 6113,
8746 14305,
8747 4065,
8748 12257,
8749 8161,
8750 16353,
8751 17,
8752 8209,
8753 4113,
8754 12305,
8755 2065,
8756 10257,
8757 6161,
8758 14353,
8759 1041,
8760 9233,
8761 5137,
8762 13329,
8763 3089,
8764 11281,
8765 7185,
8766 15377,
8767 529,
8768 8721,
8769 4625,
8770 12817,
8771 2577,
8772 10769,
8773 6673,
8774 14865,
8775 1553,
8776 9745,
8777 5649,
8778 13841,
8779 3601,
8780 11793,
8781 7697,
8782 15889,
8783 273,
8784 8465,
8785 4369,
8786 12561,
8787 2321,
8788 10513,
8789 6417,
8790 14609,
8791 1297,
8792 9489,
8793 5393,
8794 13585,
8795 3345,
8796 11537,
8797 7441,
8798 15633,
8799 785,
8800 8977,
8801 4881,
8802 13073,
8803 2833,
8804 11025,
8805 6929,
8806 15121,
8807 1809,
8808 10001,
8809 5905,
8810 14097,
8811 3857,
8812 12049,
8813 7953,
8814 16145,
8815 145,
8816 8337,
8817 4241,
8818 12433,
8819 2193,
8820 10385,
8821 6289,
8822 14481,
8823 1169,
8824 9361,
8825 5265,
8826 13457,
8827 3217,
8828 11409,
8829 7313,
8830 15505,
8831 657,
8832 8849,
8833 4753,
8834 12945,
8835 2705,
8836 10897,
8837 6801,
8838 14993,
8839 1681,
8840 9873,
8841 5777,
8842 13969,
8843 3729,
8844 11921,
8845 7825,
8846 16017,
8847 401,
8848 8593,
8849 4497,
8850 12689,
8851 2449,
8852 10641,
8853 6545,
8854 14737,
8855 1425,
8856 9617,
8857 5521,
8858 13713,
8859 3473,
8860 11665,
8861 7569,
8862 15761,
8863 913,
8864 9105,
8865 5009,
8866 13201,
8867 2961,
8868 11153,
8869 7057,
8870 15249,
8871 1937,
8872 10129,
8873 6033,
8874 14225,
8875 3985,
8876 12177,
8877 8081,
8878 16273,
8879 81,
8880 8273,
8881 4177,
8882 12369,
8883 2129,
8884 10321,
8885 6225,
8886 14417,
8887 1105,
8888 9297,
8889 5201,
8890 13393,
8891 3153,
8892 11345,
8893 7249,
8894 15441,
8895 593,
8896 8785,
8897 4689,
8898 12881,
8899 2641,
8900 10833,
8901 6737,
8902 14929,
8903 1617,
8904 9809,
8905 5713,
8906 13905,
8907 3665,
8908 11857,
8909 7761,
8910 15953,
8911 337,
8912 8529,
8913 4433,
8914 12625,
8915 2385,
8916 10577,
8917 6481,
8918 14673,
8919 1361,
8920 9553,
8921 5457,
8922 13649,
8923 3409,
8924 11601,
8925 7505,
8926 15697,
8927 849,
8928 9041,
8929 4945,
8930 13137,
8931 2897,
8932 11089,
8933 6993,
8934 15185,
8935 1873,
8936 10065,
8937 5969,
8938 14161,
8939 3921,
8940 12113,
8941 8017,
8942 16209,
8943 209,
8944 8401,
8945 4305,
8946 12497,
8947 2257,
8948 10449,
8949 6353,
8950 14545,
8951 1233,
8952 9425,
8953 5329,
8954 13521,
8955 3281,
8956 11473,
8957 7377,
8958 15569,
8959 721,
8960 8913,
8961 4817,
8962 13009,
8963 2769,
8964 10961,
8965 6865,
8966 15057,
8967 1745,
8968 9937,
8969 5841,
8970 14033,
8971 3793,
8972 11985,
8973 7889,
8974 16081,
8975 465,
8976 8657,
8977 4561,
8978 12753,
8979 2513,
8980 10705,
8981 6609,
8982 14801,
8983 1489,
8984 9681,
8985 5585,
8986 13777,
8987 3537,
8988 11729,
8989 7633,
8990 15825,
8991 977,
8992 9169,
8993 5073,
8994 13265,
8995 3025,
8996 11217,
8997 7121,
8998 15313,
8999 2001,
9000 10193,
9001 6097,
9002 14289,
9003 4049,
9004 12241,
9005 8145,
9006 16337,
9007 49,
9008 8241,
9009 4145,
9010 12337,
9011 2097,
9012 10289,
9013 6193,
9014 14385,
9015 1073,
9016 9265,
9017 5169,
9018 13361,
9019 3121,
9020 11313,
9021 7217,
9022 15409,
9023 561,
9024 8753,
9025 4657,
9026 12849,
9027 2609,
9028 10801,
9029 6705,
9030 14897,
9031 1585,
9032 9777,
9033 5681,
9034 13873,
9035 3633,
9036 11825,
9037 7729,
9038 15921,
9039 305,
9040 8497,
9041 4401,
9042 12593,
9043 2353,
9044 10545,
9045 6449,
9046 14641,
9047 1329,
9048 9521,
9049 5425,
9050 13617,
9051 3377,
9052 11569,
9053 7473,
9054 15665,
9055 817,
9056 9009,
9057 4913,
9058 13105,
9059 2865,
9060 11057,
9061 6961,
9062 15153,
9063 1841,
9064 10033,
9065 5937,
9066 14129,
9067 3889,
9068 12081,
9069 7985,
9070 16177,
9071 177,
9072 8369,
9073 4273,
9074 12465,
9075 2225,
9076 10417,
9077 6321,
9078 14513,
9079 1201,
9080 9393,
9081 5297,
9082 13489,
9083 3249,
9084 11441,
9085 7345,
9086 15537,
9087 689,
9088 8881,
9089 4785,
9090 12977,
9091 2737,
9092 10929,
9093 6833,
9094 15025,
9095 1713,
9096 9905,
9097 5809,
9098 14001,
9099 3761,
9100 11953,
9101 7857,
9102 16049,
9103 433,
9104 8625,
9105 4529,
9106 12721,
9107 2481,
9108 10673,
9109 6577,
9110 14769,
9111 1457,
9112 9649,
9113 5553,
9114 13745,
9115 3505,
9116 11697,
9117 7601,
9118 15793,
9119 945,
9120 9137,
9121 5041,
9122 13233,
9123 2993,
9124 11185,
9125 7089,
9126 15281,
9127 1969,
9128 10161,
9129 6065,
9130 14257,
9131 4017,
9132 12209,
9133 8113,
9134 16305,
9135 113,
9136 8305,
9137 4209,
9138 12401,
9139 2161,
9140 10353,
9141 6257,
9142 14449,
9143 1137,
9144 9329,
9145 5233,
9146 13425,
9147 3185,
9148 11377,
9149 7281,
9150 15473,
9151 625,
9152 8817,
9153 4721,
9154 12913,
9155 2673,
9156 10865,
9157 6769,
9158 14961,
9159 1649,
9160 9841,
9161 5745,
9162 13937,
9163 3697,
9164 11889,
9165 7793,
9166 15985,
9167 369,
9168 8561,
9169 4465,
9170 12657,
9171 2417,
9172 10609,
9173 6513,
9174 14705,
9175 1393,
9176 9585,
9177 5489,
9178 13681,
9179 3441,
9180 11633,
9181 7537,
9182 15729,
9183 881,
9184 9073,
9185 4977,
9186 13169,
9187 2929,
9188 11121,
9189 7025,
9190 15217,
9191 1905,
9192 10097,
9193 6001,
9194 14193,
9195 3953,
9196 12145,
9197 8049,
9198 16241,
9199 241,
9200 8433,
9201 4337,
9202 12529,
9203 2289,
9204 10481,
9205 6385,
9206 14577,
9207 1265,
9208 9457,
9209 5361,
9210 13553,
9211 3313,
9212 11505,
9213 7409,
9214 15601,
9215 753,
9216 8945,
9217 4849,
9218 13041,
9219 2801,
9220 10993,
9221 6897,
9222 15089,
9223 1777,
9224 9969,
9225 5873,
9226 14065,
9227 3825,
9228 12017,
9229 7921,
9230 16113,
9231 497,
9232 8689,
9233 4593,
9234 12785,
9235 2545,
9236 10737,
9237 6641,
9238 14833,
9239 1521,
9240 9713,
9241 5617,
9242 13809,
9243 3569,
9244 11761,
9245 7665,
9246 15857,
9247 1009,
9248 9201,
9249 5105,
9250 13297,
9251 3057,
9252 11249,
9253 7153,
9254 15345,
9255 2033,
9256 10225,
9257 6129,
9258 14321,
9259 4081,
9260 12273,
9261 8177,
9262 16369,
9263 9,
9264 8201,
9265 4105,
9266 12297,
9267 2057,
9268 10249,
9269 6153,
9270 14345,
9271 1033,
9272 9225,
9273 5129,
9274 13321,
9275 3081,
9276 11273,
9277 7177,
9278 15369,
9279 521,
9280 8713,
9281 4617,
9282 12809,
9283 2569,
9284 10761,
9285 6665,
9286 14857,
9287 1545,
9288 9737,
9289 5641,
9290 13833,
9291 3593,
9292 11785,
9293 7689,
9294 15881,
9295 265,
9296 8457,
9297 4361,
9298 12553,
9299 2313,
9300 10505,
9301 6409,
9302 14601,
9303 1289,
9304 9481,
9305 5385,
9306 13577,
9307 3337,
9308 11529,
9309 7433,
9310 15625,
9311 777,
9312 8969,
9313 4873,
9314 13065,
9315 2825,
9316 11017,
9317 6921,
9318 15113,
9319 1801,
9320 9993,
9321 5897,
9322 14089,
9323 3849,
9324 12041,
9325 7945,
9326 16137,
9327 137,
9328 8329,
9329 4233,
9330 12425,
9331 2185,
9332 10377,
9333 6281,
9334 14473,
9335 1161,
9336 9353,
9337 5257,
9338 13449,
9339 3209,
9340 11401,
9341 7305,
9342 15497,
9343 649,
9344 8841,
9345 4745,
9346 12937,
9347 2697,
9348 10889,
9349 6793,
9350 14985,
9351 1673,
9352 9865,
9353 5769,
9354 13961,
9355 3721,
9356 11913,
9357 7817,
9358 16009,
9359 393,
9360 8585,
9361 4489,
9362 12681,
9363 2441,
9364 10633,
9365 6537,
9366 14729,
9367 1417,
9368 9609,
9369 5513,
9370 13705,
9371 3465,
9372 11657,
9373 7561,
9374 15753,
9375 905,
9376 9097,
9377 5001,
9378 13193,
9379 2953,
9380 11145,
9381 7049,
9382 15241,
9383 1929,
9384 10121,
9385 6025,
9386 14217,
9387 3977,
9388 12169,
9389 8073,
9390 16265,
9391 73,
9392 8265,
9393 4169,
9394 12361,
9395 2121,
9396 10313,
9397 6217,
9398 14409,
9399 1097,
9400 9289,
9401 5193,
9402 13385,
9403 3145,
9404 11337,
9405 7241,
9406 15433,
9407 585,
9408 8777,
9409 4681,
9410 12873,
9411 2633,
9412 10825,
9413 6729,
9414 14921,
9415 1609,
9416 9801,
9417 5705,
9418 13897,
9419 3657,
9420 11849,
9421 7753,
9422 15945,
9423 329,
9424 8521,
9425 4425,
9426 12617,
9427 2377,
9428 10569,
9429 6473,
9430 14665,
9431 1353,
9432 9545,
9433 5449,
9434 13641,
9435 3401,
9436 11593,
9437 7497,
9438 15689,
9439 841,
9440 9033,
9441 4937,
9442 13129,
9443 2889,
9444 11081,
9445 6985,
9446 15177,
9447 1865,
9448 10057,
9449 5961,
9450 14153,
9451 3913,
9452 12105,
9453 8009,
9454 16201,
9455 201,
9456 8393,
9457 4297,
9458 12489,
9459 2249,
9460 10441,
9461 6345,
9462 14537,
9463 1225,
9464 9417,
9465 5321,
9466 13513,
9467 3273,
9468 11465,
9469 7369,
9470 15561,
9471 713,
9472 8905,
9473 4809,
9474 13001,
9475 2761,
9476 10953,
9477 6857,
9478 15049,
9479 1737,
9480 9929,
9481 5833,
9482 14025,
9483 3785,
9484 11977,
9485 7881,
9486 16073,
9487 457,
9488 8649,
9489 4553,
9490 12745,
9491 2505,
9492 10697,
9493 6601,
9494 14793,
9495 1481,
9496 9673,
9497 5577,
9498 13769,
9499 3529,
9500 11721,
9501 7625,
9502 15817,
9503 969,
9504 9161,
9505 5065,
9506 13257,
9507 3017,
9508 11209,
9509 7113,
9510 15305,
9511 1993,
9512 10185,
9513 6089,
9514 14281,
9515 4041,
9516 12233,
9517 8137,
9518 16329,
9519 41,
9520 8233,
9521 4137,
9522 12329,
9523 2089,
9524 10281,
9525 6185,
9526 14377,
9527 1065,
9528 9257,
9529 5161,
9530 13353,
9531 3113,
9532 11305,
9533 7209,
9534 15401,
9535 553,
9536 8745,
9537 4649,
9538 12841,
9539 2601,
9540 10793,
9541 6697,
9542 14889,
9543 1577,
9544 9769,
9545 5673,
9546 13865,
9547 3625,
9548 11817,
9549 7721,
9550 15913,
9551 297,
9552 8489,
9553 4393,
9554 12585,
9555 2345,
9556 10537,
9557 6441,
9558 14633,
9559 1321,
9560 9513,
9561 5417,
9562 13609,
9563 3369,
9564 11561,
9565 7465,
9566 15657,
9567 809,
9568 9001,
9569 4905,
9570 13097,
9571 2857,
9572 11049,
9573 6953,
9574 15145,
9575 1833,
9576 10025,
9577 5929,
9578 14121,
9579 3881,
9580 12073,
9581 7977,
9582 16169,
9583 169,
9584 8361,
9585 4265,
9586 12457,
9587 2217,
9588 10409,
9589 6313,
9590 14505,
9591 1193,
9592 9385,
9593 5289,
9594 13481,
9595 3241,
9596 11433,
9597 7337,
9598 15529,
9599 681,
9600 8873,
9601 4777,
9602 12969,
9603 2729,
9604 10921,
9605 6825,
9606 15017,
9607 1705,
9608 9897,
9609 5801,
9610 13993,
9611 3753,
9612 11945,
9613 7849,
9614 16041,
9615 425,
9616 8617,
9617 4521,
9618 12713,
9619 2473,
9620 10665,
9621 6569,
9622 14761,
9623 1449,
9624 9641,
9625 5545,
9626 13737,
9627 3497,
9628 11689,
9629 7593,
9630 15785,
9631 937,
9632 9129,
9633 5033,
9634 13225,
9635 2985,
9636 11177,
9637 7081,
9638 15273,
9639 1961,
9640 10153,
9641 6057,
9642 14249,
9643 4009,
9644 12201,
9645 8105,
9646 16297,
9647 105,
9648 8297,
9649 4201,
9650 12393,
9651 2153,
9652 10345,
9653 6249,
9654 14441,
9655 1129,
9656 9321,
9657 5225,
9658 13417,
9659 3177,
9660 11369,
9661 7273,
9662 15465,
9663 617,
9664 8809,
9665 4713,
9666 12905,
9667 2665,
9668 10857,
9669 6761,
9670 14953,
9671 1641,
9672 9833,
9673 5737,
9674 13929,
9675 3689,
9676 11881,
9677 7785,
9678 15977,
9679 361,
9680 8553,
9681 4457,
9682 12649,
9683 2409,
9684 10601,
9685 6505,
9686 14697,
9687 1385,
9688 9577,
9689 5481,
9690 13673,
9691 3433,
9692 11625,
9693 7529,
9694 15721,
9695 873,
9696 9065,
9697 4969,
9698 13161,
9699 2921,
9700 11113,
9701 7017,
9702 15209,
9703 1897,
9704 10089,
9705 5993,
9706 14185,
9707 3945,
9708 12137,
9709 8041,
9710 16233,
9711 233,
9712 8425,
9713 4329,
9714 12521,
9715 2281,
9716 10473,
9717 6377,
9718 14569,
9719 1257,
9720 9449,
9721 5353,
9722 13545,
9723 3305,
9724 11497,
9725 7401,
9726 15593,
9727 745,
9728 8937,
9729 4841,
9730 13033,
9731 2793,
9732 10985,
9733 6889,
9734 15081,
9735 1769,
9736 9961,
9737 5865,
9738 14057,
9739 3817,
9740 12009,
9741 7913,
9742 16105,
9743 489,
9744 8681,
9745 4585,
9746 12777,
9747 2537,
9748 10729,
9749 6633,
9750 14825,
9751 1513,
9752 9705,
9753 5609,
9754 13801,
9755 3561,
9756 11753,
9757 7657,
9758 15849,
9759 1001,
9760 9193,
9761 5097,
9762 13289,
9763 3049,
9764 11241,
9765 7145,
9766 15337,
9767 2025,
9768 10217,
9769 6121,
9770 14313,
9771 4073,
9772 12265,
9773 8169,
9774 16361,
9775 25,
9776 8217,
9777 4121,
9778 12313,
9779 2073,
9780 10265,
9781 6169,
9782 14361,
9783 1049,
9784 9241,
9785 5145,
9786 13337,
9787 3097,
9788 11289,
9789 7193,
9790 15385,
9791 537,
9792 8729,
9793 4633,
9794 12825,
9795 2585,
9796 10777,
9797 6681,
9798 14873,
9799 1561,
9800 9753,
9801 5657,
9802 13849,
9803 3609,
9804 11801,
9805 7705,
9806 15897,
9807 281,
9808 8473,
9809 4377,
9810 12569,
9811 2329,
9812 10521,
9813 6425,
9814 14617,
9815 1305,
9816 9497,
9817 5401,
9818 13593,
9819 3353,
9820 11545,
9821 7449,
9822 15641,
9823 793,
9824 8985,
9825 4889,
9826 13081,
9827 2841,
9828 11033,
9829 6937,
9830 15129,
9831 1817,
9832 10009,
9833 5913,
9834 14105,
9835 3865,
9836 12057,
9837 7961,
9838 16153,
9839 153,
9840 8345,
9841 4249,
9842 12441,
9843 2201,
9844 10393,
9845 6297,
9846 14489,
9847 1177,
9848 9369,
9849 5273,
9850 13465,
9851 3225,
9852 11417,
9853 7321,
9854 15513,
9855 665,
9856 8857,
9857 4761,
9858 12953,
9859 2713,
9860 10905,
9861 6809,
9862 15001,
9863 1689,
9864 9881,
9865 5785,
9866 13977,
9867 3737,
9868 11929,
9869 7833,
9870 16025,
9871 409,
9872 8601,
9873 4505,
9874 12697,
9875 2457,
9876 10649,
9877 6553,
9878 14745,
9879 1433,
9880 9625,
9881 5529,
9882 13721,
9883 3481,
9884 11673,
9885 7577,
9886 15769,
9887 921,
9888 9113,
9889 5017,
9890 13209,
9891 2969,
9892 11161,
9893 7065,
9894 15257,
9895 1945,
9896 10137,
9897 6041,
9898 14233,
9899 3993,
9900 12185,
9901 8089,
9902 16281,
9903 89,
9904 8281,
9905 4185,
9906 12377,
9907 2137,
9908 10329,
9909 6233,
9910 14425,
9911 1113,
9912 9305,
9913 5209,
9914 13401,
9915 3161,
9916 11353,
9917 7257,
9918 15449,
9919 601,
9920 8793,
9921 4697,
9922 12889,
9923 2649,
9924 10841,
9925 6745,
9926 14937,
9927 1625,
9928 9817,
9929 5721,
9930 13913,
9931 3673,
9932 11865,
9933 7769,
9934 15961,
9935 345,
9936 8537,
9937 4441,
9938 12633,
9939 2393,
9940 10585,
9941 6489,
9942 14681,
9943 1369,
9944 9561,
9945 5465,
9946 13657,
9947 3417,
9948 11609,
9949 7513,
9950 15705,
9951 857,
9952 9049,
9953 4953,
9954 13145,
9955 2905,
9956 11097,
9957 7001,
9958 15193,
9959 1881,
9960 10073,
9961 5977,
9962 14169,
9963 3929,
9964 12121,
9965 8025,
9966 16217,
9967 217,
9968 8409,
9969 4313,
9970 12505,
9971 2265,
9972 10457,
9973 6361,
9974 14553,
9975 1241,
9976 9433,
9977 5337,
9978 13529,
9979 3289,
9980 11481,
9981 7385,
9982 15577,
9983 729,
9984 8921,
9985 4825,
9986 13017,
9987 2777,
9988 10969,
9989 6873,
9990 15065,
9991 1753,
9992 9945,
9993 5849,
9994 14041,
9995 3801,
9996 11993,
9997 7897,
9998 16089,
9999 473,
10000 8665,
10001 4569,
10002 12761,
10003 2521,
10004 10713,
10005 6617,
10006 14809,
10007 1497,
10008 9689,
10009 5593,
10010 13785,
10011 3545,
10012 11737,
10013 7641,
10014 15833,
10015 985,
10016 9177,
10017 5081,
10018 13273,
10019 3033,
10020 11225,
10021 7129,
10022 15321,
10023 2009,
10024 10201,
10025 6105,
10026 14297,
10027 4057,
10028 12249,
10029 8153,
10030 16345,
10031 57,
10032 8249,
10033 4153,
10034 12345,
10035 2105,
10036 10297,
10037 6201,
10038 14393,
10039 1081,
10040 9273,
10041 5177,
10042 13369,
10043 3129,
10044 11321,
10045 7225,
10046 15417,
10047 569,
10048 8761,
10049 4665,
10050 12857,
10051 2617,
10052 10809,
10053 6713,
10054 14905,
10055 1593,
10056 9785,
10057 5689,
10058 13881,
10059 3641,
10060 11833,
10061 7737,
10062 15929,
10063 313,
10064 8505,
10065 4409,
10066 12601,
10067 2361,
10068 10553,
10069 6457,
10070 14649,
10071 1337,
10072 9529,
10073 5433,
10074 13625,
10075 3385,
10076 11577,
10077 7481,
10078 15673,
10079 825,
10080 9017,
10081 4921,
10082 13113,
10083 2873,
10084 11065,
10085 6969,
10086 15161,
10087 1849,
10088 10041,
10089 5945,
10090 14137,
10091 3897,
10092 12089,
10093 7993,
10094 16185,
10095 185,
10096 8377,
10097 4281,
10098 12473,
10099 2233,
10100 10425,
10101 6329,
10102 14521,
10103 1209,
10104 9401,
10105 5305,
10106 13497,
10107 3257,
10108 11449,
10109 7353,
10110 15545,
10111 697,
10112 8889,
10113 4793,
10114 12985,
10115 2745,
10116 10937,
10117 6841,
10118 15033,
10119 1721,
10120 9913,
10121 5817,
10122 14009,
10123 3769,
10124 11961,
10125 7865,
10126 16057,
10127 441,
10128 8633,
10129 4537,
10130 12729,
10131 2489,
10132 10681,
10133 6585,
10134 14777,
10135 1465,
10136 9657,
10137 5561,
10138 13753,
10139 3513,
10140 11705,
10141 7609,
10142 15801,
10143 953,
10144 9145,
10145 5049,
10146 13241,
10147 3001,
10148 11193,
10149 7097,
10150 15289,
10151 1977,
10152 10169,
10153 6073,
10154 14265,
10155 4025,
10156 12217,
10157 8121,
10158 16313,
10159 121,
10160 8313,
10161 4217,
10162 12409,
10163 2169,
10164 10361,
10165 6265,
10166 14457,
10167 1145,
10168 9337,
10169 5241,
10170 13433,
10171 3193,
10172 11385,
10173 7289,
10174 15481,
10175 633,
10176 8825,
10177 4729,
10178 12921,
10179 2681,
10180 10873,
10181 6777,
10182 14969,
10183 1657,
10184 9849,
10185 5753,
10186 13945,
10187 3705,
10188 11897,
10189 7801,
10190 15993,
10191 377,
10192 8569,
10193 4473,
10194 12665,
10195 2425,
10196 10617,
10197 6521,
10198 14713,
10199 1401,
10200 9593,
10201 5497,
10202 13689,
10203 3449,
10204 11641,
10205 7545,
10206 15737,
10207 889,
10208 9081,
10209 4985,
10210 13177,
10211 2937,
10212 11129,
10213 7033,
10214 15225,
10215 1913,
10216 10105,
10217 6009,
10218 14201,
10219 3961,
10220 12153,
10221 8057,
10222 16249,
10223 249,
10224 8441,
10225 4345,
10226 12537,
10227 2297,
10228 10489,
10229 6393,
10230 14585,
10231 1273,
10232 9465,
10233 5369,
10234 13561,
10235 3321,
10236 11513,
10237 7417,
10238 15609,
10239 761,
10240 8953,
10241 4857,
10242 13049,
10243 2809,
10244 11001,
10245 6905,
10246 15097,
10247 1785,
10248 9977,
10249 5881,
10250 14073,
10251 3833,
10252 12025,
10253 7929,
10254 16121,
10255 505,
10256 8697,
10257 4601,
10258 12793,
10259 2553,
10260 10745,
10261 6649,
10262 14841,
10263 1529,
10264 9721,
10265 5625,
10266 13817,
10267 3577,
10268 11769,
10269 7673,
10270 15865,
10271 1017,
10272 9209,
10273 5113,
10274 13305,
10275 3065,
10276 11257,
10277 7161,
10278 15353,
10279 2041,
10280 10233,
10281 6137,
10282 14329,
10283 4089,
10284 12281,
10285 8185,
10286 16377,
10287 5,
10288 8197,
10289 4101,
10290 12293,
10291 2053,
10292 10245,
10293 6149,
10294 14341,
10295 1029,
10296 9221,
10297 5125,
10298 13317,
10299 3077,
10300 11269,
10301 7173,
10302 15365,
10303 517,
10304 8709,
10305 4613,
10306 12805,
10307 2565,
10308 10757,
10309 6661,
10310 14853,
10311 1541,
10312 9733,
10313 5637,
10314 13829,
10315 3589,
10316 11781,
10317 7685,
10318 15877,
10319 261,
10320 8453,
10321 4357,
10322 12549,
10323 2309,
10324 10501,
10325 6405,
10326 14597,
10327 1285,
10328 9477,
10329 5381,
10330 13573,
10331 3333,
10332 11525,
10333 7429,
10334 15621,
10335 773,
10336 8965,
10337 4869,
10338 13061,
10339 2821,
10340 11013,
10341 6917,
10342 15109,
10343 1797,
10344 9989,
10345 5893,
10346 14085,
10347 3845,
10348 12037,
10349 7941,
10350 16133,
10351 133,
10352 8325,
10353 4229,
10354 12421,
10355 2181,
10356 10373,
10357 6277,
10358 14469,
10359 1157,
10360 9349,
10361 5253,
10362 13445,
10363 3205,
10364 11397,
10365 7301,
10366 15493,
10367 645,
10368 8837,
10369 4741,
10370 12933,
10371 2693,
10372 10885,
10373 6789,
10374 14981,
10375 1669,
10376 9861,
10377 5765,
10378 13957,
10379 3717,
10380 11909,
10381 7813,
10382 16005,
10383 389,
10384 8581,
10385 4485,
10386 12677,
10387 2437,
10388 10629,
10389 6533,
10390 14725,
10391 1413,
10392 9605,
10393 5509,
10394 13701,
10395 3461,
10396 11653,
10397 7557,
10398 15749,
10399 901,
10400 9093,
10401 4997,
10402 13189,
10403 2949,
10404 11141,
10405 7045,
10406 15237,
10407 1925,
10408 10117,
10409 6021,
10410 14213,
10411 3973,
10412 12165,
10413 8069,
10414 16261,
10415 69,
10416 8261,
10417 4165,
10418 12357,
10419 2117,
10420 10309,
10421 6213,
10422 14405,
10423 1093,
10424 9285,
10425 5189,
10426 13381,
10427 3141,
10428 11333,
10429 7237,
10430 15429,
10431 581,
10432 8773,
10433 4677,
10434 12869,
10435 2629,
10436 10821,
10437 6725,
10438 14917,
10439 1605,
10440 9797,
10441 5701,
10442 13893,
10443 3653,
10444 11845,
10445 7749,
10446 15941,
10447 325,
10448 8517,
10449 4421,
10450 12613,
10451 2373,
10452 10565,
10453 6469,
10454 14661,
10455 1349,
10456 9541,
10457 5445,
10458 13637,
10459 3397,
10460 11589,
10461 7493,
10462 15685,
10463 837,
10464 9029,
10465 4933,
10466 13125,
10467 2885,
10468 11077,
10469 6981,
10470 15173,
10471 1861,
10472 10053,
10473 5957,
10474 14149,
10475 3909,
10476 12101,
10477 8005,
10478 16197,
10479 197,
10480 8389,
10481 4293,
10482 12485,
10483 2245,
10484 10437,
10485 6341,
10486 14533,
10487 1221,
10488 9413,
10489 5317,
10490 13509,
10491 3269,
10492 11461,
10493 7365,
10494 15557,
10495 709,
10496 8901,
10497 4805,
10498 12997,
10499 2757,
10500 10949,
10501 6853,
10502 15045,
10503 1733,
10504 9925,
10505 5829,
10506 14021,
10507 3781,
10508 11973,
10509 7877,
10510 16069,
10511 453,
10512 8645,
10513 4549,
10514 12741,
10515 2501,
10516 10693,
10517 6597,
10518 14789,
10519 1477,
10520 9669,
10521 5573,
10522 13765,
10523 3525,
10524 11717,
10525 7621,
10526 15813,
10527 965,
10528 9157,
10529 5061,
10530 13253,
10531 3013,
10532 11205,
10533 7109,
10534 15301,
10535 1989,
10536 10181,
10537 6085,
10538 14277,
10539 4037,
10540 12229,
10541 8133,
10542 16325,
10543 37,
10544 8229,
10545 4133,
10546 12325,
10547 2085,
10548 10277,
10549 6181,
10550 14373,
10551 1061,
10552 9253,
10553 5157,
10554 13349,
10555 3109,
10556 11301,
10557 7205,
10558 15397,
10559 549,
10560 8741,
10561 4645,
10562 12837,
10563 2597,
10564 10789,
10565 6693,
10566 14885,
10567 1573,
10568 9765,
10569 5669,
10570 13861,
10571 3621,
10572 11813,
10573 7717,
10574 15909,
10575 293,
10576 8485,
10577 4389,
10578 12581,
10579 2341,
10580 10533,
10581 6437,
10582 14629,
10583 1317,
10584 9509,
10585 5413,
10586 13605,
10587 3365,
10588 11557,
10589 7461,
10590 15653,
10591 805,
10592 8997,
10593 4901,
10594 13093,
10595 2853,
10596 11045,
10597 6949,
10598 15141,
10599 1829,
10600 10021,
10601 5925,
10602 14117,
10603 3877,
10604 12069,
10605 7973,
10606 16165,
10607 165,
10608 8357,
10609 4261,
10610 12453,
10611 2213,
10612 10405,
10613 6309,
10614 14501,
10615 1189,
10616 9381,
10617 5285,
10618 13477,
10619 3237,
10620 11429,
10621 7333,
10622 15525,
10623 677,
10624 8869,
10625 4773,
10626 12965,
10627 2725,
10628 10917,
10629 6821,
10630 15013,
10631 1701,
10632 9893,
10633 5797,
10634 13989,
10635 3749,
10636 11941,
10637 7845,
10638 16037,
10639 421,
10640 8613,
10641 4517,
10642 12709,
10643 2469,
10644 10661,
10645 6565,
10646 14757,
10647 1445,
10648 9637,
10649 5541,
10650 13733,
10651 3493,
10652 11685,
10653 7589,
10654 15781,
10655 933,
10656 9125,
10657 5029,
10658 13221,
10659 2981,
10660 11173,
10661 7077,
10662 15269,
10663 1957,
10664 10149,
10665 6053,
10666 14245,
10667 4005,
10668 12197,
10669 8101,
10670 16293,
10671 101,
10672 8293,
10673 4197,
10674 12389,
10675 2149,
10676 10341,
10677 6245,
10678 14437,
10679 1125,
10680 9317,
10681 5221,
10682 13413,
10683 3173,
10684 11365,
10685 7269,
10686 15461,
10687 613,
10688 8805,
10689 4709,
10690 12901,
10691 2661,
10692 10853,
10693 6757,
10694 14949,
10695 1637,
10696 9829,
10697 5733,
10698 13925,
10699 3685,
10700 11877,
10701 7781,
10702 15973,
10703 357,
10704 8549,
10705 4453,
10706 12645,
10707 2405,
10708 10597,
10709 6501,
10710 14693,
10711 1381,
10712 9573,
10713 5477,
10714 13669,
10715 3429,
10716 11621,
10717 7525,
10718 15717,
10719 869,
10720 9061,
10721 4965,
10722 13157,
10723 2917,
10724 11109,
10725 7013,
10726 15205,
10727 1893,
10728 10085,
10729 5989,
10730 14181,
10731 3941,
10732 12133,
10733 8037,
10734 16229,
10735 229,
10736 8421,
10737 4325,
10738 12517,
10739 2277,
10740 10469,
10741 6373,
10742 14565,
10743 1253,
10744 9445,
10745 5349,
10746 13541,
10747 3301,
10748 11493,
10749 7397,
10750 15589,
10751 741,
10752 8933,
10753 4837,
10754 13029,
10755 2789,
10756 10981,
10757 6885,
10758 15077,
10759 1765,
10760 9957,
10761 5861,
10762 14053,
10763 3813,
10764 12005,
10765 7909,
10766 16101,
10767 485,
10768 8677,
10769 4581,
10770 12773,
10771 2533,
10772 10725,
10773 6629,
10774 14821,
10775 1509,
10776 9701,
10777 5605,
10778 13797,
10779 3557,
10780 11749,
10781 7653,
10782 15845,
10783 997,
10784 9189,
10785 5093,
10786 13285,
10787 3045,
10788 11237,
10789 7141,
10790 15333,
10791 2021,
10792 10213,
10793 6117,
10794 14309,
10795 4069,
10796 12261,
10797 8165,
10798 16357,
10799 21,
10800 8213,
10801 4117,
10802 12309,
10803 2069,
10804 10261,
10805 6165,
10806 14357,
10807 1045,
10808 9237,
10809 5141,
10810 13333,
10811 3093,
10812 11285,
10813 7189,
10814 15381,
10815 533,
10816 8725,
10817 4629,
10818 12821,
10819 2581,
10820 10773,
10821 6677,
10822 14869,
10823 1557,
10824 9749,
10825 5653,
10826 13845,
10827 3605,
10828 11797,
10829 7701,
10830 15893,
10831 277,
10832 8469,
10833 4373,
10834 12565,
10835 2325,
10836 10517,
10837 6421,
10838 14613,
10839 1301,
10840 9493,
10841 5397,
10842 13589,
10843 3349,
10844 11541,
10845 7445,
10846 15637,
10847 789,
10848 8981,
10849 4885,
10850 13077,
10851 2837,
10852 11029,
10853 6933,
10854 15125,
10855 1813,
10856 10005,
10857 5909,
10858 14101,
10859 3861,
10860 12053,
10861 7957,
10862 16149,
10863 149,
10864 8341,
10865 4245,
10866 12437,
10867 2197,
10868 10389,
10869 6293,
10870 14485,
10871 1173,
10872 9365,
10873 5269,
10874 13461,
10875 3221,
10876 11413,
10877 7317,
10878 15509,
10879 661,
10880 8853,
10881 4757,
10882 12949,
10883 2709,
10884 10901,
10885 6805,
10886 14997,
10887 1685,
10888 9877,
10889 5781,
10890 13973,
10891 3733,
10892 11925,
10893 7829,
10894 16021,
10895 405,
10896 8597,
10897 4501,
10898 12693,
10899 2453,
10900 10645,
10901 6549,
10902 14741,
10903 1429,
10904 9621,
10905 5525,
10906 13717,
10907 3477,
10908 11669,
10909 7573,
10910 15765,
10911 917,
10912 9109,
10913 5013,
10914 13205,
10915 2965,
10916 11157,
10917 7061,
10918 15253,
10919 1941,
10920 10133,
10921 6037,
10922 14229,
10923 3989,
10924 12181,
10925 8085,
10926 16277,
10927 85,
10928 8277,
10929 4181,
10930 12373,
10931 2133,
10932 10325,
10933 6229,
10934 14421,
10935 1109,
10936 9301,
10937 5205,
10938 13397,
10939 3157,
10940 11349,
10941 7253,
10942 15445,
10943 597,
10944 8789,
10945 4693,
10946 12885,
10947 2645,
10948 10837,
10949 6741,
10950 14933,
10951 1621,
10952 9813,
10953 5717,
10954 13909,
10955 3669,
10956 11861,
10957 7765,
10958 15957,
10959 341,
10960 8533,
10961 4437,
10962 12629,
10963 2389,
10964 10581,
10965 6485,
10966 14677,
10967 1365,
10968 9557,
10969 5461,
10970 13653,
10971 3413,
10972 11605,
10973 7509,
10974 15701,
10975 853,
10976 9045,
10977 4949,
10978 13141,
10979 2901,
10980 11093,
10981 6997,
10982 15189,
10983 1877,
10984 10069,
10985 5973,
10986 14165,
10987 3925,
10988 12117,
10989 8021,
10990 16213,
10991 213,
10992 8405,
10993 4309,
10994 12501,
10995 2261,
10996 10453,
10997 6357,
10998 14549,
10999 1237,
11000 9429,
11001 5333,
11002 13525,
11003 3285,
11004 11477,
11005 7381,
11006 15573,
11007 725,
11008 8917,
11009 4821,
11010 13013,
11011 2773,
11012 10965,
11013 6869,
11014 15061,
11015 1749,
11016 9941,
11017 5845,
11018 14037,
11019 3797,
11020 11989,
11021 7893,
11022 16085,
11023 469,
11024 8661,
11025 4565,
11026 12757,
11027 2517,
11028 10709,
11029 6613,
11030 14805,
11031 1493,
11032 9685,
11033 5589,
11034 13781,
11035 3541,
11036 11733,
11037 7637,
11038 15829,
11039 981,
11040 9173,
11041 5077,
11042 13269,
11043 3029,
11044 11221,
11045 7125,
11046 15317,
11047 2005,
11048 10197,
11049 6101,
11050 14293,
11051 4053,
11052 12245,
11053 8149,
11054 16341,
11055 53,
11056 8245,
11057 4149,
11058 12341,
11059 2101,
11060 10293,
11061 6197,
11062 14389,
11063 1077,
11064 9269,
11065 5173,
11066 13365,
11067 3125,
11068 11317,
11069 7221,
11070 15413,
11071 565,
11072 8757,
11073 4661,
11074 12853,
11075 2613,
11076 10805,
11077 6709,
11078 14901,
11079 1589,
11080 9781,
11081 5685,
11082 13877,
11083 3637,
11084 11829,
11085 7733,
11086 15925,
11087 309,
11088 8501,
11089 4405,
11090 12597,
11091 2357,
11092 10549,
11093 6453,
11094 14645,
11095 1333,
11096 9525,
11097 5429,
11098 13621,
11099 3381,
11100 11573,
11101 7477,
11102 15669,
11103 821,
11104 9013,
11105 4917,
11106 13109,
11107 2869,
11108 11061,
11109 6965,
11110 15157,
11111 1845,
11112 10037,
11113 5941,
11114 14133,
11115 3893,
11116 12085,
11117 7989,
11118 16181,
11119 181,
11120 8373,
11121 4277,
11122 12469,
11123 2229,
11124 10421,
11125 6325,
11126 14517,
11127 1205,
11128 9397,
11129 5301,
11130 13493,
11131 3253,
11132 11445,
11133 7349,
11134 15541,
11135 693,
11136 8885,
11137 4789,
11138 12981,
11139 2741,
11140 10933,
11141 6837,
11142 15029,
11143 1717,
11144 9909,
11145 5813,
11146 14005,
11147 3765,
11148 11957,
11149 7861,
11150 16053,
11151 437,
11152 8629,
11153 4533,
11154 12725,
11155 2485,
11156 10677,
11157 6581,
11158 14773,
11159 1461,
11160 9653,
11161 5557,
11162 13749,
11163 3509,
11164 11701,
11165 7605,
11166 15797,
11167 949,
11168 9141,
11169 5045,
11170 13237,
11171 2997,
11172 11189,
11173 7093,
11174 15285,
11175 1973,
11176 10165,
11177 6069,
11178 14261,
11179 4021,
11180 12213,
11181 8117,
11182 16309,
11183 117,
11184 8309,
11185 4213,
11186 12405,
11187 2165,
11188 10357,
11189 6261,
11190 14453,
11191 1141,
11192 9333,
11193 5237,
11194 13429,
11195 3189,
11196 11381,
11197 7285,
11198 15477,
11199 629,
11200 8821,
11201 4725,
11202 12917,
11203 2677,
11204 10869,
11205 6773,
11206 14965,
11207 1653,
11208 9845,
11209 5749,
11210 13941,
11211 3701,
11212 11893,
11213 7797,
11214 15989,
11215 373,
11216 8565,
11217 4469,
11218 12661,
11219 2421,
11220 10613,
11221 6517,
11222 14709,
11223 1397,
11224 9589,
11225 5493,
11226 13685,
11227 3445,
11228 11637,
11229 7541,
11230 15733,
11231 885,
11232 9077,
11233 4981,
11234 13173,
11235 2933,
11236 11125,
11237 7029,
11238 15221,
11239 1909,
11240 10101,
11241 6005,
11242 14197,
11243 3957,
11244 12149,
11245 8053,
11246 16245,
11247 245,
11248 8437,
11249 4341,
11250 12533,
11251 2293,
11252 10485,
11253 6389,
11254 14581,
11255 1269,
11256 9461,
11257 5365,
11258 13557,
11259 3317,
11260 11509,
11261 7413,
11262 15605,
11263 757,
11264 8949,
11265 4853,
11266 13045,
11267 2805,
11268 10997,
11269 6901,
11270 15093,
11271 1781,
11272 9973,
11273 5877,
11274 14069,
11275 3829,
11276 12021,
11277 7925,
11278 16117,
11279 501,
11280 8693,
11281 4597,
11282 12789,
11283 2549,
11284 10741,
11285 6645,
11286 14837,
11287 1525,
11288 9717,
11289 5621,
11290 13813,
11291 3573,
11292 11765,
11293 7669,
11294 15861,
11295 1013,
11296 9205,
11297 5109,
11298 13301,
11299 3061,
11300 11253,
11301 7157,
11302 15349,
11303 2037,
11304 10229,
11305 6133,
11306 14325,
11307 4085,
11308 12277,
11309 8181,
11310 16373,
11311 13,
11312 8205,
11313 4109,
11314 12301,
11315 2061,
11316 10253,
11317 6157,
11318 14349,
11319 1037,
11320 9229,
11321 5133,
11322 13325,
11323 3085,
11324 11277,
11325 7181,
11326 15373,
11327 525,
11328 8717,
11329 4621,
11330 12813,
11331 2573,
11332 10765,
11333 6669,
11334 14861,
11335 1549,
11336 9741,
11337 5645,
11338 13837,
11339 3597,
11340 11789,
11341 7693,
11342 15885,
11343 269,
11344 8461,
11345 4365,
11346 12557,
11347 2317,
11348 10509,
11349 6413,
11350 14605,
11351 1293,
11352 9485,
11353 5389,
11354 13581,
11355 3341,
11356 11533,
11357 7437,
11358 15629,
11359 781,
11360 8973,
11361 4877,
11362 13069,
11363 2829,
11364 11021,
11365 6925,
11366 15117,
11367 1805,
11368 9997,
11369 5901,
11370 14093,
11371 3853,
11372 12045,
11373 7949,
11374 16141,
11375 141,
11376 8333,
11377 4237,
11378 12429,
11379 2189,
11380 10381,
11381 6285,
11382 14477,
11383 1165,
11384 9357,
11385 5261,
11386 13453,
11387 3213,
11388 11405,
11389 7309,
11390 15501,
11391 653,
11392 8845,
11393 4749,
11394 12941,
11395 2701,
11396 10893,
11397 6797,
11398 14989,
11399 1677,
11400 9869,
11401 5773,
11402 13965,
11403 3725,
11404 11917,
11405 7821,
11406 16013,
11407 397,
11408 8589,
11409 4493,
11410 12685,
11411 2445,
11412 10637,
11413 6541,
11414 14733,
11415 1421,
11416 9613,
11417 5517,
11418 13709,
11419 3469,
11420 11661,
11421 7565,
11422 15757,
11423 909,
11424 9101,
11425 5005,
11426 13197,
11427 2957,
11428 11149,
11429 7053,
11430 15245,
11431 1933,
11432 10125,
11433 6029,
11434 14221,
11435 3981,
11436 12173,
11437 8077,
11438 16269,
11439 77,
11440 8269,
11441 4173,
11442 12365,
11443 2125,
11444 10317,
11445 6221,
11446 14413,
11447 1101,
11448 9293,
11449 5197,
11450 13389,
11451 3149,
11452 11341,
11453 7245,
11454 15437,
11455 589,
11456 8781,
11457 4685,
11458 12877,
11459 2637,
11460 10829,
11461 6733,
11462 14925,
11463 1613,
11464 9805,
11465 5709,
11466 13901,
11467 3661,
11468 11853,
11469 7757,
11470 15949,
11471 333,
11472 8525,
11473 4429,
11474 12621,
11475 2381,
11476 10573,
11477 6477,
11478 14669,
11479 1357,
11480 9549,
11481 5453,
11482 13645,
11483 3405,
11484 11597,
11485 7501,
11486 15693,
11487 845,
11488 9037,
11489 4941,
11490 13133,
11491 2893,
11492 11085,
11493 6989,
11494 15181,
11495 1869,
11496 10061,
11497 5965,
11498 14157,
11499 3917,
11500 12109,
11501 8013,
11502 16205,
11503 205,
11504 8397,
11505 4301,
11506 12493,
11507 2253,
11508 10445,
11509 6349,
11510 14541,
11511 1229,
11512 9421,
11513 5325,
11514 13517,
11515 3277,
11516 11469,
11517 7373,
11518 15565,
11519 717,
11520 8909,
11521 4813,
11522 13005,
11523 2765,
11524 10957,
11525 6861,
11526 15053,
11527 1741,
11528 9933,
11529 5837,
11530 14029,
11531 3789,
11532 11981,
11533 7885,
11534 16077,
11535 461,
11536 8653,
11537 4557,
11538 12749,
11539 2509,
11540 10701,
11541 6605,
11542 14797,
11543 1485,
11544 9677,
11545 5581,
11546 13773,
11547 3533,
11548 11725,
11549 7629,
11550 15821,
11551 973,
11552 9165,
11553 5069,
11554 13261,
11555 3021,
11556 11213,
11557 7117,
11558 15309,
11559 1997,
11560 10189,
11561 6093,
11562 14285,
11563 4045,
11564 12237,
11565 8141,
11566 16333,
11567 45,
11568 8237,
11569 4141,
11570 12333,
11571 2093,
11572 10285,
11573 6189,
11574 14381,
11575 1069,
11576 9261,
11577 5165,
11578 13357,
11579 3117,
11580 11309,
11581 7213,
11582 15405,
11583 557,
11584 8749,
11585 4653,
11586 12845,
11587 2605,
11588 10797,
11589 6701,
11590 14893,
11591 1581,
11592 9773,
11593 5677,
11594 13869,
11595 3629,
11596 11821,
11597 7725,
11598 15917,
11599 301,
11600 8493,
11601 4397,
11602 12589,
11603 2349,
11604 10541,
11605 6445,
11606 14637,
11607 1325,
11608 9517,
11609 5421,
11610 13613,
11611 3373,
11612 11565,
11613 7469,
11614 15661,
11615 813,
11616 9005,
11617 4909,
11618 13101,
11619 2861,
11620 11053,
11621 6957,
11622 15149,
11623 1837,
11624 10029,
11625 5933,
11626 14125,
11627 3885,
11628 12077,
11629 7981,
11630 16173,
11631 173,
11632 8365,
11633 4269,
11634 12461,
11635 2221,
11636 10413,
11637 6317,
11638 14509,
11639 1197,
11640 9389,
11641 5293,
11642 13485,
11643 3245,
11644 11437,
11645 7341,
11646 15533,
11647 685,
11648 8877,
11649 4781,
11650 12973,
11651 2733,
11652 10925,
11653 6829,
11654 15021,
11655 1709,
11656 9901,
11657 5805,
11658 13997,
11659 3757,
11660 11949,
11661 7853,
11662 16045,
11663 429,
11664 8621,
11665 4525,
11666 12717,
11667 2477,
11668 10669,
11669 6573,
11670 14765,
11671 1453,
11672 9645,
11673 5549,
11674 13741,
11675 3501,
11676 11693,
11677 7597,
11678 15789,
11679 941,
11680 9133,
11681 5037,
11682 13229,
11683 2989,
11684 11181,
11685 7085,
11686 15277,
11687 1965,
11688 10157,
11689 6061,
11690 14253,
11691 4013,
11692 12205,
11693 8109,
11694 16301,
11695 109,
11696 8301,
11697 4205,
11698 12397,
11699 2157,
11700 10349,
11701 6253,
11702 14445,
11703 1133,
11704 9325,
11705 5229,
11706 13421,
11707 3181,
11708 11373,
11709 7277,
11710 15469,
11711 621,
11712 8813,
11713 4717,
11714 12909,
11715 2669,
11716 10861,
11717 6765,
11718 14957,
11719 1645,
11720 9837,
11721 5741,
11722 13933,
11723 3693,
11724 11885,
11725 7789,
11726 15981,
11727 365,
11728 8557,
11729 4461,
11730 12653,
11731 2413,
11732 10605,
11733 6509,
11734 14701,
11735 1389,
11736 9581,
11737 5485,
11738 13677,
11739 3437,
11740 11629,
11741 7533,
11742 15725,
11743 877,
11744 9069,
11745 4973,
11746 13165,
11747 2925,
11748 11117,
11749 7021,
11750 15213,
11751 1901,
11752 10093,
11753 5997,
11754 14189,
11755 3949,
11756 12141,
11757 8045,
11758 16237,
11759 237,
11760 8429,
11761 4333,
11762 12525,
11763 2285,
11764 10477,
11765 6381,
11766 14573,
11767 1261,
11768 9453,
11769 5357,
11770 13549,
11771 3309,
11772 11501,
11773 7405,
11774 15597,
11775 749,
11776 8941,
11777 4845,
11778 13037,
11779 2797,
11780 10989,
11781 6893,
11782 15085,
11783 1773,
11784 9965,
11785 5869,
11786 14061,
11787 3821,
11788 12013,
11789 7917,
11790 16109,
11791 493,
11792 8685,
11793 4589,
11794 12781,
11795 2541,
11796 10733,
11797 6637,
11798 14829,
11799 1517,
11800 9709,
11801 5613,
11802 13805,
11803 3565,
11804 11757,
11805 7661,
11806 15853,
11807 1005,
11808 9197,
11809 5101,
11810 13293,
11811 3053,
11812 11245,
11813 7149,
11814 15341,
11815 2029,
11816 10221,
11817 6125,
11818 14317,
11819 4077,
11820 12269,
11821 8173,
11822 16365,
11823 29,
11824 8221,
11825 4125,
11826 12317,
11827 2077,
11828 10269,
11829 6173,
11830 14365,
11831 1053,
11832 9245,
11833 5149,
11834 13341,
11835 3101,
11836 11293,
11837 7197,
11838 15389,
11839 541,
11840 8733,
11841 4637,
11842 12829,
11843 2589,
11844 10781,
11845 6685,
11846 14877,
11847 1565,
11848 9757,
11849 5661,
11850 13853,
11851 3613,
11852 11805,
11853 7709,
11854 15901,
11855 285,
11856 8477,
11857 4381,
11858 12573,
11859 2333,
11860 10525,
11861 6429,
11862 14621,
11863 1309,
11864 9501,
11865 5405,
11866 13597,
11867 3357,
11868 11549,
11869 7453,
11870 15645,
11871 797,
11872 8989,
11873 4893,
11874 13085,
11875 2845,
11876 11037,
11877 6941,
11878 15133,
11879 1821,
11880 10013,
11881 5917,
11882 14109,
11883 3869,
11884 12061,
11885 7965,
11886 16157,
11887 157,
11888 8349,
11889 4253,
11890 12445,
11891 2205,
11892 10397,
11893 6301,
11894 14493,
11895 1181,
11896 9373,
11897 5277,
11898 13469,
11899 3229,
11900 11421,
11901 7325,
11902 15517,
11903 669,
11904 8861,
11905 4765,
11906 12957,
11907 2717,
11908 10909,
11909 6813,
11910 15005,
11911 1693,
11912 9885,
11913 5789,
11914 13981,
11915 3741,
11916 11933,
11917 7837,
11918 16029,
11919 413,
11920 8605,
11921 4509,
11922 12701,
11923 2461,
11924 10653,
11925 6557,
11926 14749,
11927 1437,
11928 9629,
11929 5533,
11930 13725,
11931 3485,
11932 11677,
11933 7581,
11934 15773,
11935 925,
11936 9117,
11937 5021,
11938 13213,
11939 2973,
11940 11165,
11941 7069,
11942 15261,
11943 1949,
11944 10141,
11945 6045,
11946 14237,
11947 3997,
11948 12189,
11949 8093,
11950 16285,
11951 93,
11952 8285,
11953 4189,
11954 12381,
11955 2141,
11956 10333,
11957 6237,
11958 14429,
11959 1117,
11960 9309,
11961 5213,
11962 13405,
11963 3165,
11964 11357,
11965 7261,
11966 15453,
11967 605,
11968 8797,
11969 4701,
11970 12893,
11971 2653,
11972 10845,
11973 6749,
11974 14941,
11975 1629,
11976 9821,
11977 5725,
11978 13917,
11979 3677,
11980 11869,
11981 7773,
11982 15965,
11983 349,
11984 8541,
11985 4445,
11986 12637,
11987 2397,
11988 10589,
11989 6493,
11990 14685,
11991 1373,
11992 9565,
11993 5469,
11994 13661,
11995 3421,
11996 11613,
11997 7517,
11998 15709,
11999 861,
12000 9053,
12001 4957,
12002 13149,
12003 2909,
12004 11101,
12005 7005,
12006 15197,
12007 1885,
12008 10077,
12009 5981,
12010 14173,
12011 3933,
12012 12125,
12013 8029,
12014 16221,
12015 221,
12016 8413,
12017 4317,
12018 12509,
12019 2269,
12020 10461,
12021 6365,
12022 14557,
12023 1245,
12024 9437,
12025 5341,
12026 13533,
12027 3293,
12028 11485,
12029 7389,
12030 15581,
12031 733,
12032 8925,
12033 4829,
12034 13021,
12035 2781,
12036 10973,
12037 6877,
12038 15069,
12039 1757,
12040 9949,
12041 5853,
12042 14045,
12043 3805,
12044 11997,
12045 7901,
12046 16093,
12047 477,
12048 8669,
12049 4573,
12050 12765,
12051 2525,
12052 10717,
12053 6621,
12054 14813,
12055 1501,
12056 9693,
12057 5597,
12058 13789,
12059 3549,
12060 11741,
12061 7645,
12062 15837,
12063 989,
12064 9181,
12065 5085,
12066 13277,
12067 3037,
12068 11229,
12069 7133,
12070 15325,
12071 2013,
12072 10205,
12073 6109,
12074 14301,
12075 4061,
12076 12253,
12077 8157,
12078 16349,
12079 61,
12080 8253,
12081 4157,
12082 12349,
12083 2109,
12084 10301,
12085 6205,
12086 14397,
12087 1085,
12088 9277,
12089 5181,
12090 13373,
12091 3133,
12092 11325,
12093 7229,
12094 15421,
12095 573,
12096 8765,
12097 4669,
12098 12861,
12099 2621,
12100 10813,
12101 6717,
12102 14909,
12103 1597,
12104 9789,
12105 5693,
12106 13885,
12107 3645,
12108 11837,
12109 7741,
12110 15933,
12111 317,
12112 8509,
12113 4413,
12114 12605,
12115 2365,
12116 10557,
12117 6461,
12118 14653,
12119 1341,
12120 9533,
12121 5437,
12122 13629,
12123 3389,
12124 11581,
12125 7485,
12126 15677,
12127 829,
12128 9021,
12129 4925,
12130 13117,
12131 2877,
12132 11069,
12133 6973,
12134 15165,
12135 1853,
12136 10045,
12137 5949,
12138 14141,
12139 3901,
12140 12093,
12141 7997,
12142 16189,
12143 189,
12144 8381,
12145 4285,
12146 12477,
12147 2237,
12148 10429,
12149 6333,
12150 14525,
12151 1213,
12152 9405,
12153 5309,
12154 13501,
12155 3261,
12156 11453,
12157 7357,
12158 15549,
12159 701,
12160 8893,
12161 4797,
12162 12989,
12163 2749,
12164 10941,
12165 6845,
12166 15037,
12167 1725,
12168 9917,
12169 5821,
12170 14013,
12171 3773,
12172 11965,
12173 7869,
12174 16061,
12175 445,
12176 8637,
12177 4541,
12178 12733,
12179 2493,
12180 10685,
12181 6589,
12182 14781,
12183 1469,
12184 9661,
12185 5565,
12186 13757,
12187 3517,
12188 11709,
12189 7613,
12190 15805,
12191 957,
12192 9149,
12193 5053,
12194 13245,
12195 3005,
12196 11197,
12197 7101,
12198 15293,
12199 1981,
12200 10173,
12201 6077,
12202 14269,
12203 4029,
12204 12221,
12205 8125,
12206 16317,
12207 125,
12208 8317,
12209 4221,
12210 12413,
12211 2173,
12212 10365,
12213 6269,
12214 14461,
12215 1149,
12216 9341,
12217 5245,
12218 13437,
12219 3197,
12220 11389,
12221 7293,
12222 15485,
12223 637,
12224 8829,
12225 4733,
12226 12925,
12227 2685,
12228 10877,
12229 6781,
12230 14973,
12231 1661,
12232 9853,
12233 5757,
12234 13949,
12235 3709,
12236 11901,
12237 7805,
12238 15997,
12239 381,
12240 8573,
12241 4477,
12242 12669,
12243 2429,
12244 10621,
12245 6525,
12246 14717,
12247 1405,
12248 9597,
12249 5501,
12250 13693,
12251 3453,
12252 11645,
12253 7549,
12254 15741,
12255 893,
12256 9085,
12257 4989,
12258 13181,
12259 2941,
12260 11133,
12261 7037,
12262 15229,
12263 1917,
12264 10109,
12265 6013,
12266 14205,
12267 3965,
12268 12157,
12269 8061,
12270 16253,
12271 253,
12272 8445,
12273 4349,
12274 12541,
12275 2301,
12276 10493,
12277 6397,
12278 14589,
12279 1277,
12280 9469,
12281 5373,
12282 13565,
12283 3325,
12284 11517,
12285 7421,
12286 15613,
12287 765,
12288 8957,
12289 4861,
12290 13053,
12291 2813,
12292 11005,
12293 6909,
12294 15101,
12295 1789,
12296 9981,
12297 5885,
12298 14077,
12299 3837,
12300 12029,
12301 7933,
12302 16125,
12303 509,
12304 8701,
12305 4605,
12306 12797,
12307 2557,
12308 10749,
12309 6653,
12310 14845,
12311 1533,
12312 9725,
12313 5629,
12314 13821,
12315 3581,
12316 11773,
12317 7677,
12318 15869,
12319 1021,
12320 9213,
12321 5117,
12322 13309,
12323 3069,
12324 11261,
12325 7165,
12326 15357,
12327 2045,
12328 10237,
12329 6141,
12330 14333,
12331 4093,
12332 12285,
12333 8189,
12334 16381,
12335 3,
12336 8195,
12337 4099,
12338 12291,
12339 2051,
12340 10243,
12341 6147,
12342 14339,
12343 1027,
12344 9219,
12345 5123,
12346 13315,
12347 3075,
12348 11267,
12349 7171,
12350 15363,
12351 515,
12352 8707,
12353 4611,
12354 12803,
12355 2563,
12356 10755,
12357 6659,
12358 14851,
12359 1539,
12360 9731,
12361 5635,
12362 13827,
12363 3587,
12364 11779,
12365 7683,
12366 15875,
12367 259,
12368 8451,
12369 4355,
12370 12547,
12371 2307,
12372 10499,
12373 6403,
12374 14595,
12375 1283,
12376 9475,
12377 5379,
12378 13571,
12379 3331,
12380 11523,
12381 7427,
12382 15619,
12383 771,
12384 8963,
12385 4867,
12386 13059,
12387 2819,
12388 11011,
12389 6915,
12390 15107,
12391 1795,
12392 9987,
12393 5891,
12394 14083,
12395 3843,
12396 12035,
12397 7939,
12398 16131,
12399 131,
12400 8323,
12401 4227,
12402 12419,
12403 2179,
12404 10371,
12405 6275,
12406 14467,
12407 1155,
12408 9347,
12409 5251,
12410 13443,
12411 3203,
12412 11395,
12413 7299,
12414 15491,
12415 643,
12416 8835,
12417 4739,
12418 12931,
12419 2691,
12420 10883,
12421 6787,
12422 14979,
12423 1667,
12424 9859,
12425 5763,
12426 13955,
12427 3715,
12428 11907,
12429 7811,
12430 16003,
12431 387,
12432 8579,
12433 4483,
12434 12675,
12435 2435,
12436 10627,
12437 6531,
12438 14723,
12439 1411,
12440 9603,
12441 5507,
12442 13699,
12443 3459,
12444 11651,
12445 7555,
12446 15747,
12447 899,
12448 9091,
12449 4995,
12450 13187,
12451 2947,
12452 11139,
12453 7043,
12454 15235,
12455 1923,
12456 10115,
12457 6019,
12458 14211,
12459 3971,
12460 12163,
12461 8067,
12462 16259,
12463 67,
12464 8259,
12465 4163,
12466 12355,
12467 2115,
12468 10307,
12469 6211,
12470 14403,
12471 1091,
12472 9283,
12473 5187,
12474 13379,
12475 3139,
12476 11331,
12477 7235,
12478 15427,
12479 579,
12480 8771,
12481 4675,
12482 12867,
12483 2627,
12484 10819,
12485 6723,
12486 14915,
12487 1603,
12488 9795,
12489 5699,
12490 13891,
12491 3651,
12492 11843,
12493 7747,
12494 15939,
12495 323,
12496 8515,
12497 4419,
12498 12611,
12499 2371,
12500 10563,
12501 6467,
12502 14659,
12503 1347,
12504 9539,
12505 5443,
12506 13635,
12507 3395,
12508 11587,
12509 7491,
12510 15683,
12511 835,
12512 9027,
12513 4931,
12514 13123,
12515 2883,
12516 11075,
12517 6979,
12518 15171,
12519 1859,
12520 10051,
12521 5955,
12522 14147,
12523 3907,
12524 12099,
12525 8003,
12526 16195,
12527 195,
12528 8387,
12529 4291,
12530 12483,
12531 2243,
12532 10435,
12533 6339,
12534 14531,
12535 1219,
12536 9411,
12537 5315,
12538 13507,
12539 3267,
12540 11459,
12541 7363,
12542 15555,
12543 707,
12544 8899,
12545 4803,
12546 12995,
12547 2755,
12548 10947,
12549 6851,
12550 15043,
12551 1731,
12552 9923,
12553 5827,
12554 14019,
12555 3779,
12556 11971,
12557 7875,
12558 16067,
12559 451,
12560 8643,
12561 4547,
12562 12739,
12563 2499,
12564 10691,
12565 6595,
12566 14787,
12567 1475,
12568 9667,
12569 5571,
12570 13763,
12571 3523,
12572 11715,
12573 7619,
12574 15811,
12575 963,
12576 9155,
12577 5059,
12578 13251,
12579 3011,
12580 11203,
12581 7107,
12582 15299,
12583 1987,
12584 10179,
12585 6083,
12586 14275,
12587 4035,
12588 12227,
12589 8131,
12590 16323,
12591 35,
12592 8227,
12593 4131,
12594 12323,
12595 2083,
12596 10275,
12597 6179,
12598 14371,
12599 1059,
12600 9251,
12601 5155,
12602 13347,
12603 3107,
12604 11299,
12605 7203,
12606 15395,
12607 547,
12608 8739,
12609 4643,
12610 12835,
12611 2595,
12612 10787,
12613 6691,
12614 14883,
12615 1571,
12616 9763,
12617 5667,
12618 13859,
12619 3619,
12620 11811,
12621 7715,
12622 15907,
12623 291,
12624 8483,
12625 4387,
12626 12579,
12627 2339,
12628 10531,
12629 6435,
12630 14627,
12631 1315,
12632 9507,
12633 5411,
12634 13603,
12635 3363,
12636 11555,
12637 7459,
12638 15651,
12639 803,
12640 8995,
12641 4899,
12642 13091,
12643 2851,
12644 11043,
12645 6947,
12646 15139,
12647 1827,
12648 10019,
12649 5923,
12650 14115,
12651 3875,
12652 12067,
12653 7971,
12654 16163,
12655 163,
12656 8355,
12657 4259,
12658 12451,
12659 2211,
12660 10403,
12661 6307,
12662 14499,
12663 1187,
12664 9379,
12665 5283,
12666 13475,
12667 3235,
12668 11427,
12669 7331,
12670 15523,
12671 675,
12672 8867,
12673 4771,
12674 12963,
12675 2723,
12676 10915,
12677 6819,
12678 15011,
12679 1699,
12680 9891,
12681 5795,
12682 13987,
12683 3747,
12684 11939,
12685 7843,
12686 16035,
12687 419,
12688 8611,
12689 4515,
12690 12707,
12691 2467,
12692 10659,
12693 6563,
12694 14755,
12695 1443,
12696 9635,
12697 5539,
12698 13731,
12699 3491,
12700 11683,
12701 7587,
12702 15779,
12703 931,
12704 9123,
12705 5027,
12706 13219,
12707 2979,
12708 11171,
12709 7075,
12710 15267,
12711 1955,
12712 10147,
12713 6051,
12714 14243,
12715 4003,
12716 12195,
12717 8099,
12718 16291,
12719 99,
12720 8291,
12721 4195,
12722 12387,
12723 2147,
12724 10339,
12725 6243,
12726 14435,
12727 1123,
12728 9315,
12729 5219,
12730 13411,
12731 3171,
12732 11363,
12733 7267,
12734 15459,
12735 611,
12736 8803,
12737 4707,
12738 12899,
12739 2659,
12740 10851,
12741 6755,
12742 14947,
12743 1635,
12744 9827,
12745 5731,
12746 13923,
12747 3683,
12748 11875,
12749 7779,
12750 15971,
12751 355,
12752 8547,
12753 4451,
12754 12643,
12755 2403,
12756 10595,
12757 6499,
12758 14691,
12759 1379,
12760 9571,
12761 5475,
12762 13667,
12763 3427,
12764 11619,
12765 7523,
12766 15715,
12767 867,
12768 9059,
12769 4963,
12770 13155,
12771 2915,
12772 11107,
12773 7011,
12774 15203,
12775 1891,
12776 10083,
12777 5987,
12778 14179,
12779 3939,
12780 12131,
12781 8035,
12782 16227,
12783 227,
12784 8419,
12785 4323,
12786 12515,
12787 2275,
12788 10467,
12789 6371,
12790 14563,
12791 1251,
12792 9443,
12793 5347,
12794 13539,
12795 3299,
12796 11491,
12797 7395,
12798 15587,
12799 739,
12800 8931,
12801 4835,
12802 13027,
12803 2787,
12804 10979,
12805 6883,
12806 15075,
12807 1763,
12808 9955,
12809 5859,
12810 14051,
12811 3811,
12812 12003,
12813 7907,
12814 16099,
12815 483,
12816 8675,
12817 4579,
12818 12771,
12819 2531,
12820 10723,
12821 6627,
12822 14819,
12823 1507,
12824 9699,
12825 5603,
12826 13795,
12827 3555,
12828 11747,
12829 7651,
12830 15843,
12831 995,
12832 9187,
12833 5091,
12834 13283,
12835 3043,
12836 11235,
12837 7139,
12838 15331,
12839 2019,
12840 10211,
12841 6115,
12842 14307,
12843 4067,
12844 12259,
12845 8163,
12846 16355,
12847 19,
12848 8211,
12849 4115,
12850 12307,
12851 2067,
12852 10259,
12853 6163,
12854 14355,
12855 1043,
12856 9235,
12857 5139,
12858 13331,
12859 3091,
12860 11283,
12861 7187,
12862 15379,
12863 531,
12864 8723,
12865 4627,
12866 12819,
12867 2579,
12868 10771,
12869 6675,
12870 14867,
12871 1555,
12872 9747,
12873 5651,
12874 13843,
12875 3603,
12876 11795,
12877 7699,
12878 15891,
12879 275,
12880 8467,
12881 4371,
12882 12563,
12883 2323,
12884 10515,
12885 6419,
12886 14611,
12887 1299,
12888 9491,
12889 5395,
12890 13587,
12891 3347,
12892 11539,
12893 7443,
12894 15635,
12895 787,
12896 8979,
12897 4883,
12898 13075,
12899 2835,
12900 11027,
12901 6931,
12902 15123,
12903 1811,
12904 10003,
12905 5907,
12906 14099,
12907 3859,
12908 12051,
12909 7955,
12910 16147,
12911 147,
12912 8339,
12913 4243,
12914 12435,
12915 2195,
12916 10387,
12917 6291,
12918 14483,
12919 1171,
12920 9363,
12921 5267,
12922 13459,
12923 3219,
12924 11411,
12925 7315,
12926 15507,
12927 659,
12928 8851,
12929 4755,
12930 12947,
12931 2707,
12932 10899,
12933 6803,
12934 14995,
12935 1683,
12936 9875,
12937 5779,
12938 13971,
12939 3731,
12940 11923,
12941 7827,
12942 16019,
12943 403,
12944 8595,
12945 4499,
12946 12691,
12947 2451,
12948 10643,
12949 6547,
12950 14739,
12951 1427,
12952 9619,
12953 5523,
12954 13715,
12955 3475,
12956 11667,
12957 7571,
12958 15763,
12959 915,
12960 9107,
12961 5011,
12962 13203,
12963 2963,
12964 11155,
12965 7059,
12966 15251,
12967 1939,
12968 10131,
12969 6035,
12970 14227,
12971 3987,
12972 12179,
12973 8083,
12974 16275,
12975 83,
12976 8275,
12977 4179,
12978 12371,
12979 2131,
12980 10323,
12981 6227,
12982 14419,
12983 1107,
12984 9299,
12985 5203,
12986 13395,
12987 3155,
12988 11347,
12989 7251,
12990 15443,
12991 595,
12992 8787,
12993 4691,
12994 12883,
12995 2643,
12996 10835,
12997 6739,
12998 14931,
12999 1619,
13000 9811,
13001 5715,
13002 13907,
13003 3667,
13004 11859,
13005 7763,
13006 15955,
13007 339,
13008 8531,
13009 4435,
13010 12627,
13011 2387,
13012 10579,
13013 6483,
13014 14675,
13015 1363,
13016 9555,
13017 5459,
13018 13651,
13019 3411,
13020 11603,
13021 7507,
13022 15699,
13023 851,
13024 9043,
13025 4947,
13026 13139,
13027 2899,
13028 11091,
13029 6995,
13030 15187,
13031 1875,
13032 10067,
13033 5971,
13034 14163,
13035 3923,
13036 12115,
13037 8019,
13038 16211,
13039 211,
13040 8403,
13041 4307,
13042 12499,
13043 2259,
13044 10451,
13045 6355,
13046 14547,
13047 1235,
13048 9427,
13049 5331,
13050 13523,
13051 3283,
13052 11475,
13053 7379,
13054 15571,
13055 723,
13056 8915,
13057 4819,
13058 13011,
13059 2771,
13060 10963,
13061 6867,
13062 15059,
13063 1747,
13064 9939,
13065 5843,
13066 14035,
13067 3795,
13068 11987,
13069 7891,
13070 16083,
13071 467,
13072 8659,
13073 4563,
13074 12755,
13075 2515,
13076 10707,
13077 6611,
13078 14803,
13079 1491,
13080 9683,
13081 5587,
13082 13779,
13083 3539,
13084 11731,
13085 7635,
13086 15827,
13087 979,
13088 9171,
13089 5075,
13090 13267,
13091 3027,
13092 11219,
13093 7123,
13094 15315,
13095 2003,
13096 10195,
13097 6099,
13098 14291,
13099 4051,
13100 12243,
13101 8147,
13102 16339,
13103 51,
13104 8243,
13105 4147,
13106 12339,
13107 2099,
13108 10291,
13109 6195,
13110 14387,
13111 1075,
13112 9267,
13113 5171,
13114 13363,
13115 3123,
13116 11315,
13117 7219,
13118 15411,
13119 563,
13120 8755,
13121 4659,
13122 12851,
13123 2611,
13124 10803,
13125 6707,
13126 14899,
13127 1587,
13128 9779,
13129 5683,
13130 13875,
13131 3635,
13132 11827,
13133 7731,
13134 15923,
13135 307,
13136 8499,
13137 4403,
13138 12595,
13139 2355,
13140 10547,
13141 6451,
13142 14643,
13143 1331,
13144 9523,
13145 5427,
13146 13619,
13147 3379,
13148 11571,
13149 7475,
13150 15667,
13151 819,
13152 9011,
13153 4915,
13154 13107,
13155 2867,
13156 11059,
13157 6963,
13158 15155,
13159 1843,
13160 10035,
13161 5939,
13162 14131,
13163 3891,
13164 12083,
13165 7987,
13166 16179,
13167 179,
13168 8371,
13169 4275,
13170 12467,
13171 2227,
13172 10419,
13173 6323,
13174 14515,
13175 1203,
13176 9395,
13177 5299,
13178 13491,
13179 3251,
13180 11443,
13181 7347,
13182 15539,
13183 691,
13184 8883,
13185 4787,
13186 12979,
13187 2739,
13188 10931,
13189 6835,
13190 15027,
13191 1715,
13192 9907,
13193 5811,
13194 14003,
13195 3763,
13196 11955,
13197 7859,
13198 16051,
13199 435,
13200 8627,
13201 4531,
13202 12723,
13203 2483,
13204 10675,
13205 6579,
13206 14771,
13207 1459,
13208 9651,
13209 5555,
13210 13747,
13211 3507,
13212 11699,
13213 7603,
13214 15795,
13215 947,
13216 9139,
13217 5043,
13218 13235,
13219 2995,
13220 11187,
13221 7091,
13222 15283,
13223 1971,
13224 10163,
13225 6067,
13226 14259,
13227 4019,
13228 12211,
13229 8115,
13230 16307,
13231 115,
13232 8307,
13233 4211,
13234 12403,
13235 2163,
13236 10355,
13237 6259,
13238 14451,
13239 1139,
13240 9331,
13241 5235,
13242 13427,
13243 3187,
13244 11379,
13245 7283,
13246 15475,
13247 627,
13248 8819,
13249 4723,
13250 12915,
13251 2675,
13252 10867,
13253 6771,
13254 14963,
13255 1651,
13256 9843,
13257 5747,
13258 13939,
13259 3699,
13260 11891,
13261 7795,
13262 15987,
13263 371,
13264 8563,
13265 4467,
13266 12659,
13267 2419,
13268 10611,
13269 6515,
13270 14707,
13271 1395,
13272 9587,
13273 5491,
13274 13683,
13275 3443,
13276 11635,
13277 7539,
13278 15731,
13279 883,
13280 9075,
13281 4979,
13282 13171,
13283 2931,
13284 11123,
13285 7027,
13286 15219,
13287 1907,
13288 10099,
13289 6003,
13290 14195,
13291 3955,
13292 12147,
13293 8051,
13294 16243,
13295 243,
13296 8435,
13297 4339,
13298 12531,
13299 2291,
13300 10483,
13301 6387,
13302 14579,
13303 1267,
13304 9459,
13305 5363,
13306 13555,
13307 3315,
13308 11507,
13309 7411,
13310 15603,
13311 755,
13312 8947,
13313 4851,
13314 13043,
13315 2803,
13316 10995,
13317 6899,
13318 15091,
13319 1779,
13320 9971,
13321 5875,
13322 14067,
13323 3827,
13324 12019,
13325 7923,
13326 16115,
13327 499,
13328 8691,
13329 4595,
13330 12787,
13331 2547,
13332 10739,
13333 6643,
13334 14835,
13335 1523,
13336 9715,
13337 5619,
13338 13811,
13339 3571,
13340 11763,
13341 7667,
13342 15859,
13343 1011,
13344 9203,
13345 5107,
13346 13299,
13347 3059,
13348 11251,
13349 7155,
13350 15347,
13351 2035,
13352 10227,
13353 6131,
13354 14323,
13355 4083,
13356 12275,
13357 8179,
13358 16371,
13359 11,
13360 8203,
13361 4107,
13362 12299,
13363 2059,
13364 10251,
13365 6155,
13366 14347,
13367 1035,
13368 9227,
13369 5131,
13370 13323,
13371 3083,
13372 11275,
13373 7179,
13374 15371,
13375 523,
13376 8715,
13377 4619,
13378 12811,
13379 2571,
13380 10763,
13381 6667,
13382 14859,
13383 1547,
13384 9739,
13385 5643,
13386 13835,
13387 3595,
13388 11787,
13389 7691,
13390 15883,
13391 267,
13392 8459,
13393 4363,
13394 12555,
13395 2315,
13396 10507,
13397 6411,
13398 14603,
13399 1291,
13400 9483,
13401 5387,
13402 13579,
13403 3339,
13404 11531,
13405 7435,
13406 15627,
13407 779,
13408 8971,
13409 4875,
13410 13067,
13411 2827,
13412 11019,
13413 6923,
13414 15115,
13415 1803,
13416 9995,
13417 5899,
13418 14091,
13419 3851,
13420 12043,
13421 7947,
13422 16139,
13423 139,
13424 8331,
13425 4235,
13426 12427,
13427 2187,
13428 10379,
13429 6283,
13430 14475,
13431 1163,
13432 9355,
13433 5259,
13434 13451,
13435 3211,
13436 11403,
13437 7307,
13438 15499,
13439 651,
13440 8843,
13441 4747,
13442 12939,
13443 2699,
13444 10891,
13445 6795,
13446 14987,
13447 1675,
13448 9867,
13449 5771,
13450 13963,
13451 3723,
13452 11915,
13453 7819,
13454 16011,
13455 395,
13456 8587,
13457 4491,
13458 12683,
13459 2443,
13460 10635,
13461 6539,
13462 14731,
13463 1419,
13464 9611,
13465 5515,
13466 13707,
13467 3467,
13468 11659,
13469 7563,
13470 15755,
13471 907,
13472 9099,
13473 5003,
13474 13195,
13475 2955,
13476 11147,
13477 7051,
13478 15243,
13479 1931,
13480 10123,
13481 6027,
13482 14219,
13483 3979,
13484 12171,
13485 8075,
13486 16267,
13487 75,
13488 8267,
13489 4171,
13490 12363,
13491 2123,
13492 10315,
13493 6219,
13494 14411,
13495 1099,
13496 9291,
13497 5195,
13498 13387,
13499 3147,
13500 11339,
13501 7243,
13502 15435,
13503 587,
13504 8779,
13505 4683,
13506 12875,
13507 2635,
13508 10827,
13509 6731,
13510 14923,
13511 1611,
13512 9803,
13513 5707,
13514 13899,
13515 3659,
13516 11851,
13517 7755,
13518 15947,
13519 331,
13520 8523,
13521 4427,
13522 12619,
13523 2379,
13524 10571,
13525 6475,
13526 14667,
13527 1355,
13528 9547,
13529 5451,
13530 13643,
13531 3403,
13532 11595,
13533 7499,
13534 15691,
13535 843,
13536 9035,
13537 4939,
13538 13131,
13539 2891,
13540 11083,
13541 6987,
13542 15179,
13543 1867,
13544 10059,
13545 5963,
13546 14155,
13547 3915,
13548 12107,
13549 8011,
13550 16203,
13551 203,
13552 8395,
13553 4299,
13554 12491,
13555 2251,
13556 10443,
13557 6347,
13558 14539,
13559 1227,
13560 9419,
13561 5323,
13562 13515,
13563 3275,
13564 11467,
13565 7371,
13566 15563,
13567 715,
13568 8907,
13569 4811,
13570 13003,
13571 2763,
13572 10955,
13573 6859,
13574 15051,
13575 1739,
13576 9931,
13577 5835,
13578 14027,
13579 3787,
13580 11979,
13581 7883,
13582 16075,
13583 459,
13584 8651,
13585 4555,
13586 12747,
13587 2507,
13588 10699,
13589 6603,
13590 14795,
13591 1483,
13592 9675,
13593 5579,
13594 13771,
13595 3531,
13596 11723,
13597 7627,
13598 15819,
13599 971,
13600 9163,
13601 5067,
13602 13259,
13603 3019,
13604 11211,
13605 7115,
13606 15307,
13607 1995,
13608 10187,
13609 6091,
13610 14283,
13611 4043,
13612 12235,
13613 8139,
13614 16331,
13615 43,
13616 8235,
13617 4139,
13618 12331,
13619 2091,
13620 10283,
13621 6187,
13622 14379,
13623 1067,
13624 9259,
13625 5163,
13626 13355,
13627 3115,
13628 11307,
13629 7211,
13630 15403,
13631 555,
13632 8747,
13633 4651,
13634 12843,
13635 2603,
13636 10795,
13637 6699,
13638 14891,
13639 1579,
13640 9771,
13641 5675,
13642 13867,
13643 3627,
13644 11819,
13645 7723,
13646 15915,
13647 299,
13648 8491,
13649 4395,
13650 12587,
13651 2347,
13652 10539,
13653 6443,
13654 14635,
13655 1323,
13656 9515,
13657 5419,
13658 13611,
13659 3371,
13660 11563,
13661 7467,
13662 15659,
13663 811,
13664 9003,
13665 4907,
13666 13099,
13667 2859,
13668 11051,
13669 6955,
13670 15147,
13671 1835,
13672 10027,
13673 5931,
13674 14123,
13675 3883,
13676 12075,
13677 7979,
13678 16171,
13679 171,
13680 8363,
13681 4267,
13682 12459,
13683 2219,
13684 10411,
13685 6315,
13686 14507,
13687 1195,
13688 9387,
13689 5291,
13690 13483,
13691 3243,
13692 11435,
13693 7339,
13694 15531,
13695 683,
13696 8875,
13697 4779,
13698 12971,
13699 2731,
13700 10923,
13701 6827,
13702 15019,
13703 1707,
13704 9899,
13705 5803,
13706 13995,
13707 3755,
13708 11947,
13709 7851,
13710 16043,
13711 427,
13712 8619,
13713 4523,
13714 12715,
13715 2475,
13716 10667,
13717 6571,
13718 14763,
13719 1451,
13720 9643,
13721 5547,
13722 13739,
13723 3499,
13724 11691,
13725 7595,
13726 15787,
13727 939,
13728 9131,
13729 5035,
13730 13227,
13731 2987,
13732 11179,
13733 7083,
13734 15275,
13735 1963,
13736 10155,
13737 6059,
13738 14251,
13739 4011,
13740 12203,
13741 8107,
13742 16299,
13743 107,
13744 8299,
13745 4203,
13746 12395,
13747 2155,
13748 10347,
13749 6251,
13750 14443,
13751 1131,
13752 9323,
13753 5227,
13754 13419,
13755 3179,
13756 11371,
13757 7275,
13758 15467,
13759 619,
13760 8811,
13761 4715,
13762 12907,
13763 2667,
13764 10859,
13765 6763,
13766 14955,
13767 1643,
13768 9835,
13769 5739,
13770 13931,
13771 3691,
13772 11883,
13773 7787,
13774 15979,
13775 363,
13776 8555,
13777 4459,
13778 12651,
13779 2411,
13780 10603,
13781 6507,
13782 14699,
13783 1387,
13784 9579,
13785 5483,
13786 13675,
13787 3435,
13788 11627,
13789 7531,
13790 15723,
13791 875,
13792 9067,
13793 4971,
13794 13163,
13795 2923,
13796 11115,
13797 7019,
13798 15211,
13799 1899,
13800 10091,
13801 5995,
13802 14187,
13803 3947,
13804 12139,
13805 8043,
13806 16235,
13807 235,
13808 8427,
13809 4331,
13810 12523,
13811 2283,
13812 10475,
13813 6379,
13814 14571,
13815 1259,
13816 9451,
13817 5355,
13818 13547,
13819 3307,
13820 11499,
13821 7403,
13822 15595,
13823 747,
13824 8939,
13825 4843,
13826 13035,
13827 2795,
13828 10987,
13829 6891,
13830 15083,
13831 1771,
13832 9963,
13833 5867,
13834 14059,
13835 3819,
13836 12011,
13837 7915,
13838 16107,
13839 491,
13840 8683,
13841 4587,
13842 12779,
13843 2539,
13844 10731,
13845 6635,
13846 14827,
13847 1515,
13848 9707,
13849 5611,
13850 13803,
13851 3563,
13852 11755,
13853 7659,
13854 15851,
13855 1003,
13856 9195,
13857 5099,
13858 13291,
13859 3051,
13860 11243,
13861 7147,
13862 15339,
13863 2027,
13864 10219,
13865 6123,
13866 14315,
13867 4075,
13868 12267,
13869 8171,
13870 16363,
13871 27,
13872 8219,
13873 4123,
13874 12315,
13875 2075,
13876 10267,
13877 6171,
13878 14363,
13879 1051,
13880 9243,
13881 5147,
13882 13339,
13883 3099,
13884 11291,
13885 7195,
13886 15387,
13887 539,
13888 8731,
13889 4635,
13890 12827,
13891 2587,
13892 10779,
13893 6683,
13894 14875,
13895 1563,
13896 9755,
13897 5659,
13898 13851,
13899 3611,
13900 11803,
13901 7707,
13902 15899,
13903 283,
13904 8475,
13905 4379,
13906 12571,
13907 2331,
13908 10523,
13909 6427,
13910 14619,
13911 1307,
13912 9499,
13913 5403,
13914 13595,
13915 3355,
13916 11547,
13917 7451,
13918 15643,
13919 795,
13920 8987,
13921 4891,
13922 13083,
13923 2843,
13924 11035,
13925 6939,
13926 15131,
13927 1819,
13928 10011,
13929 5915,
13930 14107,
13931 3867,
13932 12059,
13933 7963,
13934 16155,
13935 155,
13936 8347,
13937 4251,
13938 12443,
13939 2203,
13940 10395,
13941 6299,
13942 14491,
13943 1179,
13944 9371,
13945 5275,
13946 13467,
13947 3227,
13948 11419,
13949 7323,
13950 15515,
13951 667,
13952 8859,
13953 4763,
13954 12955,
13955 2715,
13956 10907,
13957 6811,
13958 15003,
13959 1691,
13960 9883,
13961 5787,
13962 13979,
13963 3739,
13964 11931,
13965 7835,
13966 16027,
13967 411,
13968 8603,
13969 4507,
13970 12699,
13971 2459,
13972 10651,
13973 6555,
13974 14747,
13975 1435,
13976 9627,
13977 5531,
13978 13723,
13979 3483,
13980 11675,
13981 7579,
13982 15771,
13983 923,
13984 9115,
13985 5019,
13986 13211,
13987 2971,
13988 11163,
13989 7067,
13990 15259,
13991 1947,
13992 10139,
13993 6043,
13994 14235,
13995 3995,
13996 12187,
13997 8091,
13998 16283,
13999 91,
14000 8283,
14001 4187,
14002 12379,
14003 2139,
14004 10331,
14005 6235,
14006 14427,
14007 1115,
14008 9307,
14009 5211,
14010 13403,
14011 3163,
14012 11355,
14013 7259,
14014 15451,
14015 603,
14016 8795,
14017 4699,
14018 12891,
14019 2651,
14020 10843,
14021 6747,
14022 14939,
14023 1627,
14024 9819,
14025 5723,
14026 13915,
14027 3675,
14028 11867,
14029 7771,
14030 15963,
14031 347,
14032 8539,
14033 4443,
14034 12635,
14035 2395,
14036 10587,
14037 6491,
14038 14683,
14039 1371,
14040 9563,
14041 5467,
14042 13659,
14043 3419,
14044 11611,
14045 7515,
14046 15707,
14047 859,
14048 9051,
14049 4955,
14050 13147,
14051 2907,
14052 11099,
14053 7003,
14054 15195,
14055 1883,
14056 10075,
14057 5979,
14058 14171,
14059 3931,
14060 12123,
14061 8027,
14062 16219,
14063 219,
14064 8411,
14065 4315,
14066 12507,
14067 2267,
14068 10459,
14069 6363,
14070 14555,
14071 1243,
14072 9435,
14073 5339,
14074 13531,
14075 3291,
14076 11483,
14077 7387,
14078 15579,
14079 731,
14080 8923,
14081 4827,
14082 13019,
14083 2779,
14084 10971,
14085 6875,
14086 15067,
14087 1755,
14088 9947,
14089 5851,
14090 14043,
14091 3803,
14092 11995,
14093 7899,
14094 16091,
14095 475,
14096 8667,
14097 4571,
14098 12763,
14099 2523,
14100 10715,
14101 6619,
14102 14811,
14103 1499,
14104 9691,
14105 5595,
14106 13787,
14107 3547,
14108 11739,
14109 7643,
14110 15835,
14111 987,
14112 9179,
14113 5083,
14114 13275,
14115 3035,
14116 11227,
14117 7131,
14118 15323,
14119 2011,
14120 10203,
14121 6107,
14122 14299,
14123 4059,
14124 12251,
14125 8155,
14126 16347,
14127 59,
14128 8251,
14129 4155,
14130 12347,
14131 2107,
14132 10299,
14133 6203,
14134 14395,
14135 1083,
14136 9275,
14137 5179,
14138 13371,
14139 3131,
14140 11323,
14141 7227,
14142 15419,
14143 571,
14144 8763,
14145 4667,
14146 12859,
14147 2619,
14148 10811,
14149 6715,
14150 14907,
14151 1595,
14152 9787,
14153 5691,
14154 13883,
14155 3643,
14156 11835,
14157 7739,
14158 15931,
14159 315,
14160 8507,
14161 4411,
14162 12603,
14163 2363,
14164 10555,
14165 6459,
14166 14651,
14167 1339,
14168 9531,
14169 5435,
14170 13627,
14171 3387,
14172 11579,
14173 7483,
14174 15675,
14175 827,
14176 9019,
14177 4923,
14178 13115,
14179 2875,
14180 11067,
14181 6971,
14182 15163,
14183 1851,
14184 10043,
14185 5947,
14186 14139,
14187 3899,
14188 12091,
14189 7995,
14190 16187,
14191 187,
14192 8379,
14193 4283,
14194 12475,
14195 2235,
14196 10427,
14197 6331,
14198 14523,
14199 1211,
14200 9403,
14201 5307,
14202 13499,
14203 3259,
14204 11451,
14205 7355,
14206 15547,
14207 699,
14208 8891,
14209 4795,
14210 12987,
14211 2747,
14212 10939,
14213 6843,
14214 15035,
14215 1723,
14216 9915,
14217 5819,
14218 14011,
14219 3771,
14220 11963,
14221 7867,
14222 16059,
14223 443,
14224 8635,
14225 4539,
14226 12731,
14227 2491,
14228 10683,
14229 6587,
14230 14779,
14231 1467,
14232 9659,
14233 5563,
14234 13755,
14235 3515,
14236 11707,
14237 7611,
14238 15803,
14239 955,
14240 9147,
14241 5051,
14242 13243,
14243 3003,
14244 11195,
14245 7099,
14246 15291,
14247 1979,
14248 10171,
14249 6075,
14250 14267,
14251 4027,
14252 12219,
14253 8123,
14254 16315,
14255 123,
14256 8315,
14257 4219,
14258 12411,
14259 2171,
14260 10363,
14261 6267,
14262 14459,
14263 1147,
14264 9339,
14265 5243,
14266 13435,
14267 3195,
14268 11387,
14269 7291,
14270 15483,
14271 635,
14272 8827,
14273 4731,
14274 12923,
14275 2683,
14276 10875,
14277 6779,
14278 14971,
14279 1659,
14280 9851,
14281 5755,
14282 13947,
14283 3707,
14284 11899,
14285 7803,
14286 15995,
14287 379,
14288 8571,
14289 4475,
14290 12667,
14291 2427,
14292 10619,
14293 6523,
14294 14715,
14295 1403,
14296 9595,
14297 5499,
14298 13691,
14299 3451,
14300 11643,
14301 7547,
14302 15739,
14303 891,
14304 9083,
14305 4987,
14306 13179,
14307 2939,
14308 11131,
14309 7035,
14310 15227,
14311 1915,
14312 10107,
14313 6011,
14314 14203,
14315 3963,
14316 12155,
14317 8059,
14318 16251,
14319 251,
14320 8443,
14321 4347,
14322 12539,
14323 2299,
14324 10491,
14325 6395,
14326 14587,
14327 1275,
14328 9467,
14329 5371,
14330 13563,
14331 3323,
14332 11515,
14333 7419,
14334 15611,
14335 763,
14336 8955,
14337 4859,
14338 13051,
14339 2811,
14340 11003,
14341 6907,
14342 15099,
14343 1787,
14344 9979,
14345 5883,
14346 14075,
14347 3835,
14348 12027,
14349 7931,
14350 16123,
14351 507,
14352 8699,
14353 4603,
14354 12795,
14355 2555,
14356 10747,
14357 6651,
14358 14843,
14359 1531,
14360 9723,
14361 5627,
14362 13819,
14363 3579,
14364 11771,
14365 7675,
14366 15867,
14367 1019,
14368 9211,
14369 5115,
14370 13307,
14371 3067,
14372 11259,
14373 7163,
14374 15355,
14375 2043,
14376 10235,
14377 6139,
14378 14331,
14379 4091,
14380 12283,
14381 8187,
14382 16379,
14383 7,
14384 8199,
14385 4103,
14386 12295,
14387 2055,
14388 10247,
14389 6151,
14390 14343,
14391 1031,
14392 9223,
14393 5127,
14394 13319,
14395 3079,
14396 11271,
14397 7175,
14398 15367,
14399 519,
14400 8711,
14401 4615,
14402 12807,
14403 2567,
14404 10759,
14405 6663,
14406 14855,
14407 1543,
14408 9735,
14409 5639,
14410 13831,
14411 3591,
14412 11783,
14413 7687,
14414 15879,
14415 263,
14416 8455,
14417 4359,
14418 12551,
14419 2311,
14420 10503,
14421 6407,
14422 14599,
14423 1287,
14424 9479,
14425 5383,
14426 13575,
14427 3335,
14428 11527,
14429 7431,
14430 15623,
14431 775,
14432 8967,
14433 4871,
14434 13063,
14435 2823,
14436 11015,
14437 6919,
14438 15111,
14439 1799,
14440 9991,
14441 5895,
14442 14087,
14443 3847,
14444 12039,
14445 7943,
14446 16135,
14447 135,
14448 8327,
14449 4231,
14450 12423,
14451 2183,
14452 10375,
14453 6279,
14454 14471,
14455 1159,
14456 9351,
14457 5255,
14458 13447,
14459 3207,
14460 11399,
14461 7303,
14462 15495,
14463 647,
14464 8839,
14465 4743,
14466 12935,
14467 2695,
14468 10887,
14469 6791,
14470 14983,
14471 1671,
14472 9863,
14473 5767,
14474 13959,
14475 3719,
14476 11911,
14477 7815,
14478 16007,
14479 391,
14480 8583,
14481 4487,
14482 12679,
14483 2439,
14484 10631,
14485 6535,
14486 14727,
14487 1415,
14488 9607,
14489 5511,
14490 13703,
14491 3463,
14492 11655,
14493 7559,
14494 15751,
14495 903,
14496 9095,
14497 4999,
14498 13191,
14499 2951,
14500 11143,
14501 7047,
14502 15239,
14503 1927,
14504 10119,
14505 6023,
14506 14215,
14507 3975,
14508 12167,
14509 8071,
14510 16263,
14511 71,
14512 8263,
14513 4167,
14514 12359,
14515 2119,
14516 10311,
14517 6215,
14518 14407,
14519 1095,
14520 9287,
14521 5191,
14522 13383,
14523 3143,
14524 11335,
14525 7239,
14526 15431,
14527 583,
14528 8775,
14529 4679,
14530 12871,
14531 2631,
14532 10823,
14533 6727,
14534 14919,
14535 1607,
14536 9799,
14537 5703,
14538 13895,
14539 3655,
14540 11847,
14541 7751,
14542 15943,
14543 327,
14544 8519,
14545 4423,
14546 12615,
14547 2375,
14548 10567,
14549 6471,
14550 14663,
14551 1351,
14552 9543,
14553 5447,
14554 13639,
14555 3399,
14556 11591,
14557 7495,
14558 15687,
14559 839,
14560 9031,
14561 4935,
14562 13127,
14563 2887,
14564 11079,
14565 6983,
14566 15175,
14567 1863,
14568 10055,
14569 5959,
14570 14151,
14571 3911,
14572 12103,
14573 8007,
14574 16199,
14575 199,
14576 8391,
14577 4295,
14578 12487,
14579 2247,
14580 10439,
14581 6343,
14582 14535,
14583 1223,
14584 9415,
14585 5319,
14586 13511,
14587 3271,
14588 11463,
14589 7367,
14590 15559,
14591 711,
14592 8903,
14593 4807,
14594 12999,
14595 2759,
14596 10951,
14597 6855,
14598 15047,
14599 1735,
14600 9927,
14601 5831,
14602 14023,
14603 3783,
14604 11975,
14605 7879,
14606 16071,
14607 455,
14608 8647,
14609 4551,
14610 12743,
14611 2503,
14612 10695,
14613 6599,
14614 14791,
14615 1479,
14616 9671,
14617 5575,
14618 13767,
14619 3527,
14620 11719,
14621 7623,
14622 15815,
14623 967,
14624 9159,
14625 5063,
14626 13255,
14627 3015,
14628 11207,
14629 7111,
14630 15303,
14631 1991,
14632 10183,
14633 6087,
14634 14279,
14635 4039,
14636 12231,
14637 8135,
14638 16327,
14639 39,
14640 8231,
14641 4135,
14642 12327,
14643 2087,
14644 10279,
14645 6183,
14646 14375,
14647 1063,
14648 9255,
14649 5159,
14650 13351,
14651 3111,
14652 11303,
14653 7207,
14654 15399,
14655 551,
14656 8743,
14657 4647,
14658 12839,
14659 2599,
14660 10791,
14661 6695,
14662 14887,
14663 1575,
14664 9767,
14665 5671,
14666 13863,
14667 3623,
14668 11815,
14669 7719,
14670 15911,
14671 295,
14672 8487,
14673 4391,
14674 12583,
14675 2343,
14676 10535,
14677 6439,
14678 14631,
14679 1319,
14680 9511,
14681 5415,
14682 13607,
14683 3367,
14684 11559,
14685 7463,
14686 15655,
14687 807,
14688 8999,
14689 4903,
14690 13095,
14691 2855,
14692 11047,
14693 6951,
14694 15143,
14695 1831,
14696 10023,
14697 5927,
14698 14119,
14699 3879,
14700 12071,
14701 7975,
14702 16167,
14703 167,
14704 8359,
14705 4263,
14706 12455,
14707 2215,
14708 10407,
14709 6311,
14710 14503,
14711 1191,
14712 9383,
14713 5287,
14714 13479,
14715 3239,
14716 11431,
14717 7335,
14718 15527,
14719 679,
14720 8871,
14721 4775,
14722 12967,
14723 2727,
14724 10919,
14725 6823,
14726 15015,
14727 1703,
14728 9895,
14729 5799,
14730 13991,
14731 3751,
14732 11943,
14733 7847,
14734 16039,
14735 423,
14736 8615,
14737 4519,
14738 12711,
14739 2471,
14740 10663,
14741 6567,
14742 14759,
14743 1447,
14744 9639,
14745 5543,
14746 13735,
14747 3495,
14748 11687,
14749 7591,
14750 15783,
14751 935,
14752 9127,
14753 5031,
14754 13223,
14755 2983,
14756 11175,
14757 7079,
14758 15271,
14759 1959,
14760 10151,
14761 6055,
14762 14247,
14763 4007,
14764 12199,
14765 8103,
14766 16295,
14767 103,
14768 8295,
14769 4199,
14770 12391,
14771 2151,
14772 10343,
14773 6247,
14774 14439,
14775 1127,
14776 9319,
14777 5223,
14778 13415,
14779 3175,
14780 11367,
14781 7271,
14782 15463,
14783 615,
14784 8807,
14785 4711,
14786 12903,
14787 2663,
14788 10855,
14789 6759,
14790 14951,
14791 1639,
14792 9831,
14793 5735,
14794 13927,
14795 3687,
14796 11879,
14797 7783,
14798 15975,
14799 359,
14800 8551,
14801 4455,
14802 12647,
14803 2407,
14804 10599,
14805 6503,
14806 14695,
14807 1383,
14808 9575,
14809 5479,
14810 13671,
14811 3431,
14812 11623,
14813 7527,
14814 15719,
14815 871,
14816 9063,
14817 4967,
14818 13159,
14819 2919,
14820 11111,
14821 7015,
14822 15207,
14823 1895,
14824 10087,
14825 5991,
14826 14183,
14827 3943,
14828 12135,
14829 8039,
14830 16231,
14831 231,
14832 8423,
14833 4327,
14834 12519,
14835 2279,
14836 10471,
14837 6375,
14838 14567,
14839 1255,
14840 9447,
14841 5351,
14842 13543,
14843 3303,
14844 11495,
14845 7399,
14846 15591,
14847 743,
14848 8935,
14849 4839,
14850 13031,
14851 2791,
14852 10983,
14853 6887,
14854 15079,
14855 1767,
14856 9959,
14857 5863,
14858 14055,
14859 3815,
14860 12007,
14861 7911,
14862 16103,
14863 487,
14864 8679,
14865 4583,
14866 12775,
14867 2535,
14868 10727,
14869 6631,
14870 14823,
14871 1511,
14872 9703,
14873 5607,
14874 13799,
14875 3559,
14876 11751,
14877 7655,
14878 15847,
14879 999,
14880 9191,
14881 5095,
14882 13287,
14883 3047,
14884 11239,
14885 7143,
14886 15335,
14887 2023,
14888 10215,
14889 6119,
14890 14311,
14891 4071,
14892 12263,
14893 8167,
14894 16359,
14895 23,
14896 8215,
14897 4119,
14898 12311,
14899 2071,
14900 10263,
14901 6167,
14902 14359,
14903 1047,
14904 9239,
14905 5143,
14906 13335,
14907 3095,
14908 11287,
14909 7191,
14910 15383,
14911 535,
14912 8727,
14913 4631,
14914 12823,
14915 2583,
14916 10775,
14917 6679,
14918 14871,
14919 1559,
14920 9751,
14921 5655,
14922 13847,
14923 3607,
14924 11799,
14925 7703,
14926 15895,
14927 279,
14928 8471,
14929 4375,
14930 12567,
14931 2327,
14932 10519,
14933 6423,
14934 14615,
14935 1303,
14936 9495,
14937 5399,
14938 13591,
14939 3351,
14940 11543,
14941 7447,
14942 15639,
14943 791,
14944 8983,
14945 4887,
14946 13079,
14947 2839,
14948 11031,
14949 6935,
14950 15127,
14951 1815,
14952 10007,
14953 5911,
14954 14103,
14955 3863,
14956 12055,
14957 7959,
14958 16151,
14959 151,
14960 8343,
14961 4247,
14962 12439,
14963 2199,
14964 10391,
14965 6295,
14966 14487,
14967 1175,
14968 9367,
14969 5271,
14970 13463,
14971 3223,
14972 11415,
14973 7319,
14974 15511,
14975 663,
14976 8855,
14977 4759,
14978 12951,
14979 2711,
14980 10903,
14981 6807,
14982 14999,
14983 1687,
14984 9879,
14985 5783,
14986 13975,
14987 3735,
14988 11927,
14989 7831,
14990 16023,
14991 407,
14992 8599,
14993 4503,
14994 12695,
14995 2455,
14996 10647,
14997 6551,
14998 14743,
14999 1431,
15000 9623,
15001 5527,
15002 13719,
15003 3479,
15004 11671,
15005 7575,
15006 15767,
15007 919,
15008 9111,
15009 5015,
15010 13207,
15011 2967,
15012 11159,
15013 7063,
15014 15255,
15015 1943,
15016 10135,
15017 6039,
15018 14231,
15019 3991,
15020 12183,
15021 8087,
15022 16279,
15023 87,
15024 8279,
15025 4183,
15026 12375,
15027 2135,
15028 10327,
15029 6231,
15030 14423,
15031 1111,
15032 9303,
15033 5207,
15034 13399,
15035 3159,
15036 11351,
15037 7255,
15038 15447,
15039 599,
15040 8791,
15041 4695,
15042 12887,
15043 2647,
15044 10839,
15045 6743,
15046 14935,
15047 1623,
15048 9815,
15049 5719,
15050 13911,
15051 3671,
15052 11863,
15053 7767,
15054 15959,
15055 343,
15056 8535,
15057 4439,
15058 12631,
15059 2391,
15060 10583,
15061 6487,
15062 14679,
15063 1367,
15064 9559,
15065 5463,
15066 13655,
15067 3415,
15068 11607,
15069 7511,
15070 15703,
15071 855,
15072 9047,
15073 4951,
15074 13143,
15075 2903,
15076 11095,
15077 6999,
15078 15191,
15079 1879,
15080 10071,
15081 5975,
15082 14167,
15083 3927,
15084 12119,
15085 8023,
15086 16215,
15087 215,
15088 8407,
15089 4311,
15090 12503,
15091 2263,
15092 10455,
15093 6359,
15094 14551,
15095 1239,
15096 9431,
15097 5335,
15098 13527,
15099 3287,
15100 11479,
15101 7383,
15102 15575,
15103 727,
15104 8919,
15105 4823,
15106 13015,
15107 2775,
15108 10967,
15109 6871,
15110 15063,
15111 1751,
15112 9943,
15113 5847,
15114 14039,
15115 3799,
15116 11991,
15117 7895,
15118 16087,
15119 471,
15120 8663,
15121 4567,
15122 12759,
15123 2519,
15124 10711,
15125 6615,
15126 14807,
15127 1495,
15128 9687,
15129 5591,
15130 13783,
15131 3543,
15132 11735,
15133 7639,
15134 15831,
15135 983,
15136 9175,
15137 5079,
15138 13271,
15139 3031,
15140 11223,
15141 7127,
15142 15319,
15143 2007,
15144 10199,
15145 6103,
15146 14295,
15147 4055,
15148 12247,
15149 8151,
15150 16343,
15151 55,
15152 8247,
15153 4151,
15154 12343,
15155 2103,
15156 10295,
15157 6199,
15158 14391,
15159 1079,
15160 9271,
15161 5175,
15162 13367,
15163 3127,
15164 11319,
15165 7223,
15166 15415,
15167 567,
15168 8759,
15169 4663,
15170 12855,
15171 2615,
15172 10807,
15173 6711,
15174 14903,
15175 1591,
15176 9783,
15177 5687,
15178 13879,
15179 3639,
15180 11831,
15181 7735,
15182 15927,
15183 311,
15184 8503,
15185 4407,
15186 12599,
15187 2359,
15188 10551,
15189 6455,
15190 14647,
15191 1335,
15192 9527,
15193 5431,
15194 13623,
15195 3383,
15196 11575,
15197 7479,
15198 15671,
15199 823,
15200 9015,
15201 4919,
15202 13111,
15203 2871,
15204 11063,
15205 6967,
15206 15159,
15207 1847,
15208 10039,
15209 5943,
15210 14135,
15211 3895,
15212 12087,
15213 7991,
15214 16183,
15215 183,
15216 8375,
15217 4279,
15218 12471,
15219 2231,
15220 10423,
15221 6327,
15222 14519,
15223 1207,
15224 9399,
15225 5303,
15226 13495,
15227 3255,
15228 11447,
15229 7351,
15230 15543,
15231 695,
15232 8887,
15233 4791,
15234 12983,
15235 2743,
15236 10935,
15237 6839,
15238 15031,
15239 1719,
15240 9911,
15241 5815,
15242 14007,
15243 3767,
15244 11959,
15245 7863,
15246 16055,
15247 439,
15248 8631,
15249 4535,
15250 12727,
15251 2487,
15252 10679,
15253 6583,
15254 14775,
15255 1463,
15256 9655,
15257 5559,
15258 13751,
15259 3511,
15260 11703,
15261 7607,
15262 15799,
15263 951,
15264 9143,
15265 5047,
15266 13239,
15267 2999,
15268 11191,
15269 7095,
15270 15287,
15271 1975,
15272 10167,
15273 6071,
15274 14263,
15275 4023,
15276 12215,
15277 8119,
15278 16311,
15279 119,
15280 8311,
15281 4215,
15282 12407,
15283 2167,
15284 10359,
15285 6263,
15286 14455,
15287 1143,
15288 9335,
15289 5239,
15290 13431,
15291 3191,
15292 11383,
15293 7287,
15294 15479,
15295 631,
15296 8823,
15297 4727,
15298 12919,
15299 2679,
15300 10871,
15301 6775,
15302 14967,
15303 1655,
15304 9847,
15305 5751,
15306 13943,
15307 3703,
15308 11895,
15309 7799,
15310 15991,
15311 375,
15312 8567,
15313 4471,
15314 12663,
15315 2423,
15316 10615,
15317 6519,
15318 14711,
15319 1399,
15320 9591,
15321 5495,
15322 13687,
15323 3447,
15324 11639,
15325 7543,
15326 15735,
15327 887,
15328 9079,
15329 4983,
15330 13175,
15331 2935,
15332 11127,
15333 7031,
15334 15223,
15335 1911,
15336 10103,
15337 6007,
15338 14199,
15339 3959,
15340 12151,
15341 8055,
15342 16247,
15343 247,
15344 8439,
15345 4343,
15346 12535,
15347 2295,
15348 10487,
15349 6391,
15350 14583,
15351 1271,
15352 9463,
15353 5367,
15354 13559,
15355 3319,
15356 11511,
15357 7415,
15358 15607,
15359 759,
15360 8951,
15361 4855,
15362 13047,
15363 2807,
15364 10999,
15365 6903,
15366 15095,
15367 1783,
15368 9975,
15369 5879,
15370 14071,
15371 3831,
15372 12023,
15373 7927,
15374 16119,
15375 503,
15376 8695,
15377 4599,
15378 12791,
15379 2551,
15380 10743,
15381 6647,
15382 14839,
15383 1527,
15384 9719,
15385 5623,
15386 13815,
15387 3575,
15388 11767,
15389 7671,
15390 15863,
15391 1015,
15392 9207,
15393 5111,
15394 13303,
15395 3063,
15396 11255,
15397 7159,
15398 15351,
15399 2039,
15400 10231,
15401 6135,
15402 14327,
15403 4087,
15404 12279,
15405 8183,
15406 16375,
15407 15,
15408 8207,
15409 4111,
15410 12303,
15411 2063,
15412 10255,
15413 6159,
15414 14351,
15415 1039,
15416 9231,
15417 5135,
15418 13327,
15419 3087,
15420 11279,
15421 7183,
15422 15375,
15423 527,
15424 8719,
15425 4623,
15426 12815,
15427 2575,
15428 10767,
15429 6671,
15430 14863,
15431 1551,
15432 9743,
15433 5647,
15434 13839,
15435 3599,
15436 11791,
15437 7695,
15438 15887,
15439 271,
15440 8463,
15441 4367,
15442 12559,
15443 2319,
15444 10511,
15445 6415,
15446 14607,
15447 1295,
15448 9487,
15449 5391,
15450 13583,
15451 3343,
15452 11535,
15453 7439,
15454 15631,
15455 783,
15456 8975,
15457 4879,
15458 13071,
15459 2831,
15460 11023,
15461 6927,
15462 15119,
15463 1807,
15464 9999,
15465 5903,
15466 14095,
15467 3855,
15468 12047,
15469 7951,
15470 16143,
15471 143,
15472 8335,
15473 4239,
15474 12431,
15475 2191,
15476 10383,
15477 6287,
15478 14479,
15479 1167,
15480 9359,
15481 5263,
15482 13455,
15483 3215,
15484 11407,
15485 7311,
15486 15503,
15487 655,
15488 8847,
15489 4751,
15490 12943,
15491 2703,
15492 10895,
15493 6799,
15494 14991,
15495 1679,
15496 9871,
15497 5775,
15498 13967,
15499 3727,
15500 11919,
15501 7823,
15502 16015,
15503 399,
15504 8591,
15505 4495,
15506 12687,
15507 2447,
15508 10639,
15509 6543,
15510 14735,
15511 1423,
15512 9615,
15513 5519,
15514 13711,
15515 3471,
15516 11663,
15517 7567,
15518 15759,
15519 911,
15520 9103,
15521 5007,
15522 13199,
15523 2959,
15524 11151,
15525 7055,
15526 15247,
15527 1935,
15528 10127,
15529 6031,
15530 14223,
15531 3983,
15532 12175,
15533 8079,
15534 16271,
15535 79,
15536 8271,
15537 4175,
15538 12367,
15539 2127,
15540 10319,
15541 6223,
15542 14415,
15543 1103,
15544 9295,
15545 5199,
15546 13391,
15547 3151,
15548 11343,
15549 7247,
15550 15439,
15551 591,
15552 8783,
15553 4687,
15554 12879,
15555 2639,
15556 10831,
15557 6735,
15558 14927,
15559 1615,
15560 9807,
15561 5711,
15562 13903,
15563 3663,
15564 11855,
15565 7759,
15566 15951,
15567 335,
15568 8527,
15569 4431,
15570 12623,
15571 2383,
15572 10575,
15573 6479,
15574 14671,
15575 1359,
15576 9551,
15577 5455,
15578 13647,
15579 3407,
15580 11599,
15581 7503,
15582 15695,
15583 847,
15584 9039,
15585 4943,
15586 13135,
15587 2895,
15588 11087,
15589 6991,
15590 15183,
15591 1871,
15592 10063,
15593 5967,
15594 14159,
15595 3919,
15596 12111,
15597 8015,
15598 16207,
15599 207,
15600 8399,
15601 4303,
15602 12495,
15603 2255,
15604 10447,
15605 6351,
15606 14543,
15607 1231,
15608 9423,
15609 5327,
15610 13519,
15611 3279,
15612 11471,
15613 7375,
15614 15567,
15615 719,
15616 8911,
15617 4815,
15618 13007,
15619 2767,
15620 10959,
15621 6863,
15622 15055,
15623 1743,
15624 9935,
15625 5839,
15626 14031,
15627 3791,
15628 11983,
15629 7887,
15630 16079,
15631 463,
15632 8655,
15633 4559,
15634 12751,
15635 2511,
15636 10703,
15637 6607,
15638 14799,
15639 1487,
15640 9679,
15641 5583,
15642 13775,
15643 3535,
15644 11727,
15645 7631,
15646 15823,
15647 975,
15648 9167,
15649 5071,
15650 13263,
15651 3023,
15652 11215,
15653 7119,
15654 15311,
15655 1999,
15656 10191,
15657 6095,
15658 14287,
15659 4047,
15660 12239,
15661 8143,
15662 16335,
15663 47,
15664 8239,
15665 4143,
15666 12335,
15667 2095,
15668 10287,
15669 6191,
15670 14383,
15671 1071,
15672 9263,
15673 5167,
15674 13359,
15675 3119,
15676 11311,
15677 7215,
15678 15407,
15679 559,
15680 8751,
15681 4655,
15682 12847,
15683 2607,
15684 10799,
15685 6703,
15686 14895,
15687 1583,
15688 9775,
15689 5679,
15690 13871,
15691 3631,
15692 11823,
15693 7727,
15694 15919,
15695 303,
15696 8495,
15697 4399,
15698 12591,
15699 2351,
15700 10543,
15701 6447,
15702 14639,
15703 1327,
15704 9519,
15705 5423,
15706 13615,
15707 3375,
15708 11567,
15709 7471,
15710 15663,
15711 815,
15712 9007,
15713 4911,
15714 13103,
15715 2863,
15716 11055,
15717 6959,
15718 15151,
15719 1839,
15720 10031,
15721 5935,
15722 14127,
15723 3887,
15724 12079,
15725 7983,
15726 16175,
15727 175,
15728 8367,
15729 4271,
15730 12463,
15731 2223,
15732 10415,
15733 6319,
15734 14511,
15735 1199,
15736 9391,
15737 5295,
15738 13487,
15739 3247,
15740 11439,
15741 7343,
15742 15535,
15743 687,
15744 8879,
15745 4783,
15746 12975,
15747 2735,
15748 10927,
15749 6831,
15750 15023,
15751 1711,
15752 9903,
15753 5807,
15754 13999,
15755 3759,
15756 11951,
15757 7855,
15758 16047,
15759 431,
15760 8623,
15761 4527,
15762 12719,
15763 2479,
15764 10671,
15765 6575,
15766 14767,
15767 1455,
15768 9647,
15769 5551,
15770 13743,
15771 3503,
15772 11695,
15773 7599,
15774 15791,
15775 943,
15776 9135,
15777 5039,
15778 13231,
15779 2991,
15780 11183,
15781 7087,
15782 15279,
15783 1967,
15784 10159,
15785 6063,
15786 14255,
15787 4015,
15788 12207,
15789 8111,
15790 16303,
15791 111,
15792 8303,
15793 4207,
15794 12399,
15795 2159,
15796 10351,
15797 6255,
15798 14447,
15799 1135,
15800 9327,
15801 5231,
15802 13423,
15803 3183,
15804 11375,
15805 7279,
15806 15471,
15807 623,
15808 8815,
15809 4719,
15810 12911,
15811 2671,
15812 10863,
15813 6767,
15814 14959,
15815 1647,
15816 9839,
15817 5743,
15818 13935,
15819 3695,
15820 11887,
15821 7791,
15822 15983,
15823 367,
15824 8559,
15825 4463,
15826 12655,
15827 2415,
15828 10607,
15829 6511,
15830 14703,
15831 1391,
15832 9583,
15833 5487,
15834 13679,
15835 3439,
15836 11631,
15837 7535,
15838 15727,
15839 879,
15840 9071,
15841 4975,
15842 13167,
15843 2927,
15844 11119,
15845 7023,
15846 15215,
15847 1903,
15848 10095,
15849 5999,
15850 14191,
15851 3951,
15852 12143,
15853 8047,
15854 16239,
15855 239,
15856 8431,
15857 4335,
15858 12527,
15859 2287,
15860 10479,
15861 6383,
15862 14575,
15863 1263,
15864 9455,
15865 5359,
15866 13551,
15867 3311,
15868 11503,
15869 7407,
15870 15599,
15871 751,
15872 8943,
15873 4847,
15874 13039,
15875 2799,
15876 10991,
15877 6895,
15878 15087,
15879 1775,
15880 9967,
15881 5871,
15882 14063,
15883 3823,
15884 12015,
15885 7919,
15886 16111,
15887 495,
15888 8687,
15889 4591,
15890 12783,
15891 2543,
15892 10735,
15893 6639,
15894 14831,
15895 1519,
15896 9711,
15897 5615,
15898 13807,
15899 3567,
15900 11759,
15901 7663,
15902 15855,
15903 1007,
15904 9199,
15905 5103,
15906 13295,
15907 3055,
15908 11247,
15909 7151,
15910 15343,
15911 2031,
15912 10223,
15913 6127,
15914 14319,
15915 4079,
15916 12271,
15917 8175,
15918 16367,
15919 31,
15920 8223,
15921 4127,
15922 12319,
15923 2079,
15924 10271,
15925 6175,
15926 14367,
15927 1055,
15928 9247,
15929 5151,
15930 13343,
15931 3103,
15932 11295,
15933 7199,
15934 15391,
15935 543,
15936 8735,
15937 4639,
15938 12831,
15939 2591,
15940 10783,
15941 6687,
15942 14879,
15943 1567,
15944 9759,
15945 5663,
15946 13855,
15947 3615,
15948 11807,
15949 7711,
15950 15903,
15951 287,
15952 8479,
15953 4383,
15954 12575,
15955 2335,
15956 10527,
15957 6431,
15958 14623,
15959 1311,
15960 9503,
15961 5407,
15962 13599,
15963 3359,
15964 11551,
15965 7455,
15966 15647,
15967 799,
15968 8991,
15969 4895,
15970 13087,
15971 2847,
15972 11039,
15973 6943,
15974 15135,
15975 1823,
15976 10015,
15977 5919,
15978 14111,
15979 3871,
15980 12063,
15981 7967,
15982 16159,
15983 159,
15984 8351,
15985 4255,
15986 12447,
15987 2207,
15988 10399,
15989 6303,
15990 14495,
15991 1183,
15992 9375,
15993 5279,
15994 13471,
15995 3231,
15996 11423,
15997 7327,
15998 15519,
15999 671,
16000 8863,
16001 4767,
16002 12959,
16003 2719,
16004 10911,
16005 6815,
16006 15007,
16007 1695,
16008 9887,
16009 5791,
16010 13983,
16011 3743,
16012 11935,
16013 7839,
16014 16031,
16015 415,
16016 8607,
16017 4511,
16018 12703,
16019 2463,
16020 10655,
16021 6559,
16022 14751,
16023 1439,
16024 9631,
16025 5535,
16026 13727,
16027 3487,
16028 11679,
16029 7583,
16030 15775,
16031 927,
16032 9119,
16033 5023,
16034 13215,
16035 2975,
16036 11167,
16037 7071,
16038 15263,
16039 1951,
16040 10143,
16041 6047,
16042 14239,
16043 3999,
16044 12191,
16045 8095,
16046 16287,
16047 95,
16048 8287,
16049 4191,
16050 12383,
16051 2143,
16052 10335,
16053 6239,
16054 14431,
16055 1119,
16056 9311,
16057 5215,
16058 13407,
16059 3167,
16060 11359,
16061 7263,
16062 15455,
16063 607,
16064 8799,
16065 4703,
16066 12895,
16067 2655,
16068 10847,
16069 6751,
16070 14943,
16071 1631,
16072 9823,
16073 5727,
16074 13919,
16075 3679,
16076 11871,
16077 7775,
16078 15967,
16079 351,
16080 8543,
16081 4447,
16082 12639,
16083 2399,
16084 10591,
16085 6495,
16086 14687,
16087 1375,
16088 9567,
16089 5471,
16090 13663,
16091 3423,
16092 11615,
16093 7519,
16094 15711,
16095 863,
16096 9055,
16097 4959,
16098 13151,
16099 2911,
16100 11103,
16101 7007,
16102 15199,
16103 1887,
16104 10079,
16105 5983,
16106 14175,
16107 3935,
16108 12127,
16109 8031,
16110 16223,
16111 223,
16112 8415,
16113 4319,
16114 12511,
16115 2271,
16116 10463,
16117 6367,
16118 14559,
16119 1247,
16120 9439,
16121 5343,
16122 13535,
16123 3295,
16124 11487,
16125 7391,
16126 15583,
16127 735,
16128 8927,
16129 4831,
16130 13023,
16131 2783,
16132 10975,
16133 6879,
16134 15071,
16135 1759,
16136 9951,
16137 5855,
16138 14047,
16139 3807,
16140 11999,
16141 7903,
16142 16095,
16143 479,
16144 8671,
16145 4575,
16146 12767,
16147 2527,
16148 10719,
16149 6623,
16150 14815,
16151 1503,
16152 9695,
16153 5599,
16154 13791,
16155 3551,
16156 11743,
16157 7647,
16158 15839,
16159 991,
16160 9183,
16161 5087,
16162 13279,
16163 3039,
16164 11231,
16165 7135,
16166 15327,
16167 2015,
16168 10207,
16169 6111,
16170 14303,
16171 4063,
16172 12255,
16173 8159,
16174 16351,
16175 63,
16176 8255,
16177 4159,
16178 12351,
16179 2111,
16180 10303,
16181 6207,
16182 14399,
16183 1087,
16184 9279,
16185 5183,
16186 13375,
16187 3135,
16188 11327,
16189 7231,
16190 15423,
16191 575,
16192 8767,
16193 4671,
16194 12863,
16195 2623,
16196 10815,
16197 6719,
16198 14911,
16199 1599,
16200 9791,
16201 5695,
16202 13887,
16203 3647,
16204 11839,
16205 7743,
16206 15935,
16207 319,
16208 8511,
16209 4415,
16210 12607,
16211 2367,
16212 10559,
16213 6463,
16214 14655,
16215 1343,
16216 9535,
16217 5439,
16218 13631,
16219 3391,
16220 11583,
16221 7487,
16222 15679,
16223 831,
16224 9023,
16225 4927,
16226 13119,
16227 2879,
16228 11071,
16229 6975,
16230 15167,
16231 1855,
16232 10047,
16233 5951,
16234 14143,
16235 3903,
16236 12095,
16237 7999,
16238 16191,
16239 191,
16240 8383,
16241 4287,
16242 12479,
16243 2239,
16244 10431,
16245 6335,
16246 14527,
16247 1215,
16248 9407,
16249 5311,
16250 13503,
16251 3263,
16252 11455,
16253 7359,
16254 15551,
16255 703,
16256 8895,
16257 4799,
16258 12991,
16259 2751,
16260 10943,
16261 6847,
16262 15039,
16263 1727,
16264 9919,
16265 5823,
16266 14015,
16267 3775,
16268 11967,
16269 7871,
16270 16063,
16271 447,
16272 8639,
16273 4543,
16274 12735,
16275 2495,
16276 10687,
16277 6591,
16278 14783,
16279 1471,
16280 9663,
16281 5567,
16282 13759,
16283 3519,
16284 11711,
16285 7615,
16286 15807,
16287 959,
16288 9151,
16289 5055,
16290 13247,
16291 3007,
16292 11199,
16293 7103,
16294 15295,
16295 1983,
16296 10175,
16297 6079,
16298 14271,
16299 4031,
16300 12223,
16301 8127,
16302 16319,
16303 127,
16304 8319,
16305 4223,
16306 12415,
16307 2175,
16308 10367,
16309 6271,
16310 14463,
16311 1151,
16312 9343,
16313 5247,
16314 13439,
16315 3199,
16316 11391,
16317 7295,
16318 15487,
16319 639,
16320 8831,
16321 4735,
16322 12927,
16323 2687,
16324 10879,
16325 6783,
16326 14975,
16327 1663,
16328 9855,
16329 5759,
16330 13951,
16331 3711,
16332 11903,
16333 7807,
16334 15999,
16335 383,
16336 8575,
16337 4479,
16338 12671,
16339 2431,
16340 10623,
16341 6527,
16342 14719,
16343 1407,
16344 9599,
16345 5503,
16346 13695,
16347 3455,
16348 11647,
16349 7551,
16350 15743,
16351 895,
16352 9087,
16353 4991,
16354 13183,
16355 2943,
16356 11135,
16357 7039,
16358 15231,
16359 1919,
16360 10111,
16361 6015,
16362 14207,
16363 3967,
16364 12159,
16365 8063,
16366 16255,
16367 255,
16368 8447,
16369 4351,
16370 12543,
16371 2303,
16372 10495,
16373 6399,
16374 14591,
16375 1279,
16376 9471,
16377 5375,
16378 13567,
16379 3327,
16380 11519,
16381 7423,
16382 15615,
16383 767,
16384 8959,
16385 4863,
16386 13055,
16387 2815,
16388 11007,
16389 6911,
16390 15103,
16391 1791,
16392 9983,
16393 5887,
16394 14079,
16395 3839,
16396 12031,
16397 7935,
16398 16127,
16399 511,
16400 8703,
16401 4607,
16402 12799,
16403 2559,
16404 10751,
16405 6655,
16406 14847,
16407 1535,
16408 9727,
16409 5631,
16410 13823,
16411 3583,
16412 11775,
16413 7679,
16414 15871,
16415 1023,
16416 9215,
16417 5119,
16418 13311,
16419 3071,
16420 11263,
16421 7167,
16422 15359,
16423 2047,
16424 10239,
16425 6143,
16426 14335,
16427 4095,
16428 12287,
16429 8191,
16430 16383,
16431 };
16432 /*lint +e915*/
Ifx_g_FftF32_bitReverseTable
CONST_CFG unsigned short Ifx_g_FftF32_bitReverseTable[IFX_FFTF32_MAX_LENGTH]
Definition: Ifx_FftF32_BitReverseTable.c:46
IFX_FFTF32_MAX_LENGTH
#define IFX_FFTF32_MAX_LENGTH
Maximum FFT length. If redefined, then Ifx_g_FftF32_bitReverseTable and Ifx_g_FftF32_twiddleTable sha...
Definition: Ifx_FftF32.h:60
Ifx_FftF32.h
Floating-point Fast Fourier Transform.
CONST_CFG
#define CONST_CFG
Definition: Compilers.h:57


iLLD_TC38A: Ifx_FftF32_TwiddleTable.c Source File

Service

CpuGeneric

SysSe

Math

Ifx_FftF32_TwiddleTable.c

Go to the documentation of this file.

1 /**

2 * \file Ifx_FftF32_TwiddleTable.c

3 * \brief Floating-point Fast Fourier Transform Twiddle-Factors

4 *

5 *

6 * \version disabled

7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.

8 *

9 *

10 * IMPORTANT NOTICE

11 *

12 * Use of this file is subject to the terms of use agreed between (i) you or

13 * the company in which ordinary course of business you are acting and (ii)

14 * Infineon Technologies AG or its licensees. If and as long as no such terms

15 * of use are agreed, use of this file is subject to following:

16 *

17 * Boost Software License - Version 1.0 - August 17th, 2003

18 *

19 * Permission is hereby granted, free of charge, to any person or organization

20 * obtaining a copy of the software and accompanying documentation covered by

21 * this license (the "Software") to use, reproduce, display, distribute,

22 * execute, and transmit the Software, and to prepare derivative works of the

23 * Software, and to permit third-parties to whom the Software is furnished to

24 * do so, all subject to the following:

25 *

26 * The copyright notices in the Software and this entire statement, including

27 * the above license grant, this restriction and the following disclaimer, must

28 * be included in all copies of the Software, in whole or in part, and all

29 * derivative works of the Software, unless such copies or derivative works are

30 * solely in the form of machine-executable object code generated by a source

31 * language processor.

32 *

33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT

36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE

37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,

38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER

39 * DEALINGS IN THE SOFTWARE.

40 *

41 */

42

43 #include "Ifx_FftF32.h"

44

45 /*lint -e915*/

46 IFX_CONST cfloat32 Ifx_g_FftF32_twiddleTable[IFX_FFTF32_MAX_LENGTH / 2] = {

47 {_DATAF(1.00000000000000000000), _DATAF(-0.00000000000000000000)},

48 {_DATAF(0.99999994039535522000), _DATAF(-0.00038349517853930593)},

49 {_DATAF(0.99999970197677612000), _DATAF(-0.00076699029887095094)},

50 {_DATAF(0.99999934434890747000), _DATAF(-0.00115048536099493500)},

51 {_DATAF(0.99999880790710449000), _DATAF(-0.00153398013208061460)},

52 {_DATAF(0.99999815225601196000), _DATAF(-0.00191747478675097230)},

53 {_DATAF(0.99999737739562988000), _DATAF(-0.00230096909217536450)},

54 {_DATAF(0.99999642372131348000), _DATAF(-0.00268446304835379120)},

55 {_DATAF(0.99999529123306274000), _DATAF(-0.00306795677170157430)},

56 {_DATAF(0.99999403953552246000), _DATAF(-0.00345145002938807010)},

57 {_DATAF(0.99999266862869263000), _DATAF(-0.00383494258858263490)},

58 {_DATAF(0.99999111890792847000), _DATAF(-0.00421843444928526880)},

59 {_DATAF(0.99998939037322998000), _DATAF(-0.00460192607715725900)},

60 {_DATAF(0.99998760223388672000), _DATAF(-0.00498541677370667460)},

61 {_DATAF(0.99998557567596436000), _DATAF(-0.00536890700459480290)},

62 {_DATAF(0.99998342990875244000), _DATAF(-0.00575239630416035650)},

63 {_DATAF(0.99998116493225098000), _DATAF(-0.00613588467240333560)},

64 {_DATAF(0.99997872114181519000), _DATAF(-0.00651937210932374000)},

65 {_DATAF(0.99997615814208984000), _DATAF(-0.00690285861492156980)},

66 {_DATAF(0.99997347593307495000), _DATAF(-0.00728634418919682500)},

67 {_DATAF(0.99997061491012573000), _DATAF(-0.00766982883214950560)},

68 {_DATAF(0.99996757507324219000), _DATAF(-0.00805331207811832430)},

69 {_DATAF(0.99996441602706909000), _DATAF(-0.00843679439276456830)},

70 {_DATAF(0.99996107816696167000), _DATAF(-0.00882027484476566310)},

71 {_DATAF(0.99995762109756470000), _DATAF(-0.00920375436544418330)},

72 {_DATAF(0.99995404481887817000), _DATAF(-0.00958723295480012890)},

73 {_DATAF(0.99995028972625732000), _DATAF(-0.00997070968151092530)},

74 {_DATAF(0.99994641542434692000), _DATAF(-0.01035418547689914700)},

75 {_DATAF(0.99994236230850220000), _DATAF(-0.01073765940964222000)},

76 {_DATAF(0.99993813037872314000), _DATAF(-0.01112113147974014300)},

77 {_DATAF(0.99993383884429932000), _DATAF(-0.01150460168719291700)},

78 {_DATAF(0.99992930889129639000), _DATAF(-0.01188807096332311600)},

79 {_DATAF(0.99992471933364868000), _DATAF(-0.01227153837680816700)},

80 {_DATAF(0.99991995096206665000), _DATAF(-0.01265500392764806700)},

81 {_DATAF(0.99991500377655029000), _DATAF(-0.01303846761584281900)},

82 {_DATAF(0.99990993738174438000), _DATAF(-0.01342192851006984700)},

83 {_DATAF(0.99990469217300415000), _DATAF(-0.01380538847297430000)},

84 {_DATAF(0.99989932775497437000), _DATAF(-0.01418884657323360400)},

85 {_DATAF(0.99989384412765503000), _DATAF(-0.01457230187952518500)},

86 {_DATAF(0.99988818168640137000), _DATAF(-0.01495575532317161600)},

87 {_DATAF(0.99988234043121338000), _DATAF(-0.01533920597285032300)},

88 {_DATAF(0.99987637996673584000), _DATAF(-0.01572265475988388100)},

89 {_DATAF(0.99987030029296875000), _DATAF(-0.01610610261559486400)},

90 {_DATAF(0.99986404180526733000), _DATAF(-0.01648954674601554900)},

91 {_DATAF(0.99985766410827637000), _DATAF(-0.01687298715114593500)},

92 {_DATAF(0.99985110759735107000), _DATAF(-0.01725642755627632100)},

93 {_DATAF(0.99984443187713623000), _DATAF(-0.01763986423611640900)},

94 {_DATAF(0.99983757734298706000), _DATAF(-0.01802329905331134800)},

95 {_DATAF(0.99983060359954834000), _DATAF(-0.01840673014521598800)},

96 {_DATAF(0.99982345104217529000), _DATAF(-0.01879015937447547900)},

97 {_DATAF(0.99981617927551270000), _DATAF(-0.01917358487844467200)},

98 {_DATAF(0.99980872869491577000), _DATAF(-0.01955700851976871500)},

99 {_DATAF(0.99980115890502930000), _DATAF(-0.01994042843580246000)},

100 {_DATAF(0.99979346990585327000), _DATAF(-0.02032384648919105500)},

101 {_DATAF(0.99978560209274292000), _DATAF(-0.02070726081728935200)},

102 {_DATAF(0.99977755546569824000), _DATAF(-0.02109067142009735100)},

103 {_DATAF(0.99976938962936401000), _DATAF(-0.02147408016026020100)},

104 {_DATAF(0.99976110458374023000), _DATAF(-0.02185748517513275100)},

105 {_DATAF(0.99975264072418213000), _DATAF(-0.02224088832736015300)},

106 {_DATAF(0.99974405765533447000), _DATAF(-0.02262428589165210700)},

107 {_DATAF(0.99973529577255249000), _DATAF(-0.02300768159329891200)},

108 {_DATAF(0.99972641468048096000), _DATAF(-0.02339107356965541800)},

109 {_DATAF(0.99971735477447510000), _DATAF(-0.02377446182072162600)},

110 {_DATAF(0.99970817565917969000), _DATAF(-0.02415784634649753600)},

111 {_DATAF(0.99969881772994995000), _DATAF(-0.02454122900962829600)},

112 {_DATAF(0.99968934059143066000), _DATAF(-0.02492460608482360800)},

113 {_DATAF(0.99967968463897705000), _DATAF(-0.02530798129737377200)},

114 {_DATAF(0.99966990947723389000), _DATAF(-0.02569135092198848700)},

115 {_DATAF(0.99966001510620117000), _DATAF(-0.02607471868395805400)},

116 {_DATAF(0.99964994192123413000), _DATAF(-0.02645808085799217200)},

117 {_DATAF(0.99963968992233276000), _DATAF(-0.02684143930673599200)},

118 {_DATAF(0.99962931871414185000), _DATAF(-0.02722479403018951400)},

119 {_DATAF(0.99961882829666138000), _DATAF(-0.02760814502835273700)},

120 {_DATAF(0.99960815906524658000), _DATAF(-0.02799149230122566200)},

121 {_DATAF(0.99959737062454224000), _DATAF(-0.02837483584880828900)},

122 {_DATAF(0.99958640336990356000), _DATAF(-0.02875817380845546700)},

123 {_DATAF(0.99957531690597534000), _DATAF(-0.02914150804281234700)},

124 {_DATAF(0.99956405162811279000), _DATAF(-0.02952483855187892900)},

125 {_DATAF(0.99955266714096069000), _DATAF(-0.02990816533565521200)},

126 {_DATAF(0.99954110383987427000), _DATAF(-0.03029148653149604800)},

127 {_DATAF(0.99952942132949829000), _DATAF(-0.03067480400204658500)},

128 {_DATAF(0.99951756000518799000), _DATAF(-0.03105811588466167400)},

129 {_DATAF(0.99950557947158813000), _DATAF(-0.03144142404198646500)},

130 {_DATAF(0.99949347972869873000), _DATAF(-0.03182472661137580900)},

131 {_DATAF(0.99948120117187500000), _DATAF(-0.03220802545547485400)},

132 {_DATAF(0.99946874380111694000), _DATAF(-0.03259132057428360000)},

133 {_DATAF(0.99945616722106934000), _DATAF(-0.03297460824251174900)},

134 {_DATAF(0.99944347143173218000), _DATAF(-0.03335789218544960000)},

135 {_DATAF(0.99943059682846069000), _DATAF(-0.03374117240309715300)},

136 {_DATAF(0.99941760301589966000), _DATAF(-0.03412444517016410800)},

137 {_DATAF(0.99940443038940430000), _DATAF(-0.03450771421194076500)},

138 {_DATAF(0.99939113855361938000), _DATAF(-0.03489097952842712400)},

139 {_DATAF(0.99937766790390015000), _DATAF(-0.03527423739433288600)},

140 {_DATAF(0.99936407804489136000), _DATAF(-0.03565749153494834900)},

141 {_DATAF(0.99935030937194824000), _DATAF(-0.03604074195027351400)},

142 {_DATAF(0.99933642148971558000), _DATAF(-0.03642398491501808200)},

143 {_DATAF(0.99932235479354858000), _DATAF(-0.03680722415447235100)},

144 {_DATAF(0.99930816888809204000), _DATAF(-0.03719045594334602400)},

145 {_DATAF(0.99929386377334595000), _DATAF(-0.03757368400692939800)},

146 {_DATAF(0.99927937984466553000), _DATAF(-0.03795690461993217500)},

147 {_DATAF(0.99926477670669556000), _DATAF(-0.03834012150764465300)},

148 {_DATAF(0.99924999475479126000), _DATAF(-0.03872333094477653500)},

149 {_DATAF(0.99923503398895264000), _DATAF(-0.03910653665661811800)},

150 {_DATAF(0.99921995401382446000), _DATAF(-0.03948973491787910500)},

151 {_DATAF(0.99920475482940674000), _DATAF(-0.03987292572855949400)},

152 {_DATAF(0.99918937683105469000), _DATAF(-0.04025611653923988300)},

153 {_DATAF(0.99917387962341309000), _DATAF(-0.04063929617404937700)},

154 {_DATAF(0.99915820360183716000), _DATAF(-0.04102247208356857300)},

155 {_DATAF(0.99914240837097168000), _DATAF(-0.04140564054250717200)},

156 {_DATAF(0.99912649393081665000), _DATAF(-0.04178880527615547200)},

157 {_DATAF(0.99911034107208252000), _DATAF(-0.04217196255922317500)},

158 {_DATAF(0.99909412860870361000), _DATAF(-0.04255511239171028100)},

159 {_DATAF(0.99907773733139038000), _DATAF(-0.04293825849890708900)},

160 {_DATAF(0.99906116724014282000), _DATAF(-0.04332139343023300200)},

161 {_DATAF(0.99904447793960571000), _DATAF(-0.04370452836155891400)},

162 {_DATAF(0.99902766942977905000), _DATAF(-0.04408765211701393100)},

163 {_DATAF(0.99901068210601807000), _DATAF(-0.04447077214717865000)},

164 {_DATAF(0.99899357557296753000), _DATAF(-0.04485388472676277200)},

165 {_DATAF(0.99897629022598267000), _DATAF(-0.04523698985576629600)},

166 {_DATAF(0.99895888566970825000), _DATAF(-0.04562009125947952300)},

167 {_DATAF(0.99894130229949951000), _DATAF(-0.04600318148732185400)},

168 {_DATAF(0.99892359972000122000), _DATAF(-0.04638626798987388600)},

169 {_DATAF(0.99890571832656860000), _DATAF(-0.04676934704184532200)},

170 {_DATAF(0.99888771772384644000), _DATAF(-0.04715241864323616000)},

171 {_DATAF(0.99886953830718994000), _DATAF(-0.04753548279404640200)},

172 {_DATAF(0.99885123968124390000), _DATAF(-0.04791854321956634500)},

173 {_DATAF(0.99883282184600830000), _DATAF(-0.04830159246921539300)},

174 {_DATAF(0.99881422519683838000), _DATAF(-0.04868463799357414200)},

175 {_DATAF(0.99879544973373413000), _DATAF(-0.04906767606735229500)},

176 {_DATAF(0.99877655506134033000), _DATAF(-0.04945070296525955200)},

177 {_DATAF(0.99875754117965698000), _DATAF(-0.04983372613787651100)},

178 {_DATAF(0.99873834848403931000), _DATAF(-0.05021674185991287200)},

179 {_DATAF(0.99871903657913208000), _DATAF(-0.05059975013136863700)},

180 {_DATAF(0.99869954586029053000), _DATAF(-0.05098275095224380500)},

181 {_DATAF(0.99867993593215942000), _DATAF(-0.05136574059724807700)},

182 {_DATAF(0.99866014719009399000), _DATAF(-0.05174872651696205100)},

183 {_DATAF(0.99864023923873901000), _DATAF(-0.05213170498609542800)},

184 {_DATAF(0.99862015247344971000), _DATAF(-0.05251467600464820900)},

185 {_DATAF(0.99859994649887085000), _DATAF(-0.05289763584733009300)},

186 {_DATAF(0.99857956171035767000), _DATAF(-0.05328059196472168000)},

187 {_DATAF(0.99855905771255493000), _DATAF(-0.05366353690624237100)},

188 {_DATAF(0.99853843450546265000), _DATAF(-0.05404647812247276300)},

189 {_DATAF(0.99851763248443604000), _DATAF(-0.05442940816283226000)},

190 {_DATAF(0.99849665164947510000), _DATAF(-0.05481233075261116000)},

191 {_DATAF(0.99847555160522461000), _DATAF(-0.05519524589180946400)},

192 {_DATAF(0.99845433235168457000), _DATAF(-0.05557814985513687100)},

193 {_DATAF(0.99843293428421021000), _DATAF(-0.05596105009317398100)},

194 {_DATAF(0.99841141700744629000), _DATAF(-0.05634393915534019500)},

195 {_DATAF(0.99838972091674805000), _DATAF(-0.05672682076692581200)},

196 {_DATAF(0.99836790561676025000), _DATAF(-0.05710969492793083200)},

197 {_DATAF(0.99834591150283813000), _DATAF(-0.05749255791306495700)},

198 {_DATAF(0.99832379817962646000), _DATAF(-0.05787541717290878300)},

199 {_DATAF(0.99830156564712524000), _DATAF(-0.05825826525688171400)},

200 {_DATAF(0.99827915430068970000), _DATAF(-0.05864110589027404800)},

201 {_DATAF(0.99825656414031982000), _DATAF(-0.05902393534779548600)},

202 {_DATAF(0.99823385477066040000), _DATAF(-0.05940675735473632800)},

203 {_DATAF(0.99821102619171143000), _DATAF(-0.05978957191109657300)},

204 {_DATAF(0.99818801879882813000), _DATAF(-0.06017237529158592200)},

205 {_DATAF(0.99816483259201050000), _DATAF(-0.06055517122149467500)},

206 {_DATAF(0.99814152717590332000), _DATAF(-0.06093795970082283000)},

207 {_DATAF(0.99811810255050659000), _DATAF(-0.06132073700428009000)},

208 {_DATAF(0.99809449911117554000), _DATAF(-0.06170350685715675400)},

209 {_DATAF(0.99807077646255493000), _DATAF(-0.06208626553416252100)},

210 {_DATAF(0.99804687500000000000), _DATAF(-0.06246901676058769200)},

211 {_DATAF(0.99802285432815552000), _DATAF(-0.06285175681114196800)},

212 {_DATAF(0.99799871444702148000), _DATAF(-0.06323449313640594500)},

213 {_DATAF(0.99797439575195313000), _DATAF(-0.06361721456050872800)},

214 {_DATAF(0.99794989824295044000), _DATAF(-0.06399992853403091400)},

215 {_DATAF(0.99792528152465820000), _DATAF(-0.06438262760639190700)},

216 {_DATAF(0.99790054559707642000), _DATAF(-0.06476532667875289900)},

217 {_DATAF(0.99787563085556030000), _DATAF(-0.06514801084995269800)},

218 {_DATAF(0.99785053730010986000), _DATAF(-0.06553068757057189900)},

219 {_DATAF(0.99782532453536987000), _DATAF(-0.06591334939002990700)},

220 {_DATAF(0.99779999256134033000), _DATAF(-0.06629601120948791500)},

221 {_DATAF(0.99777448177337646000), _DATAF(-0.06667865812778472900)},

222 {_DATAF(0.99774885177612305000), _DATAF(-0.06706129014492034900)},

223 {_DATAF(0.99772304296493530000), _DATAF(-0.06744392216205596900)},

224 {_DATAF(0.99769711494445801000), _DATAF(-0.06782653927803039600)},

225 {_DATAF(0.99767106771469116000), _DATAF(-0.06820914149284362800)},

226 {_DATAF(0.99764484167098999000), _DATAF(-0.06859174370765686000)},

227 {_DATAF(0.99761843681335449000), _DATAF(-0.06897433102130889900)},

228 {_DATAF(0.99759191274642944000), _DATAF(-0.06935690343379974400)},

229 {_DATAF(0.99756520986557007000), _DATAF(-0.06973946839570999100)},

230 {_DATAF(0.99753844738006592000), _DATAF(-0.07012202590703964200)},

231 {_DATAF(0.99751144647598267000), _DATAF(-0.07050457596778869600)},

232 {_DATAF(0.99748432636260986000), _DATAF(-0.07088711112737655600)},

233 {_DATAF(0.99745708703994751000), _DATAF(-0.07126963138580322300)},

234 {_DATAF(0.99742966890335083000), _DATAF(-0.07165215164422988900)},

235 {_DATAF(0.99740213155746460000), _DATAF(-0.07203464955091476400)},

236 {_DATAF(0.99737441539764404000), _DATAF(-0.07241714745759964000)},

237 {_DATAF(0.99734658002853394000), _DATAF(-0.07279963046312332200)},

238 {_DATAF(0.99731856584548950000), _DATAF(-0.07318209856748580900)},

239 {_DATAF(0.99729043245315552000), _DATAF(-0.07356456667184829700)},

240 {_DATAF(0.99726217985153198000), _DATAF(-0.07394701242446899400)},

241 {_DATAF(0.99723374843597412000), _DATAF(-0.07432945072650909400)},

242 {_DATAF(0.99720513820648193000), _DATAF(-0.07471188157796859700)},

243 {_DATAF(0.99717640876770020000), _DATAF(-0.07509429752826690700)},

244 {_DATAF(0.99714756011962891000), _DATAF(-0.07547670602798461900)},

245 {_DATAF(0.99711853265762329000), _DATAF(-0.07585910707712173500)},

246 {_DATAF(0.99708938598632813000), _DATAF(-0.07624148577451705900)},

247 {_DATAF(0.99706006050109863000), _DATAF(-0.07662386447191238400)},

248 {_DATAF(0.99703061580657959000), _DATAF(-0.07700622081756591800)},

249 {_DATAF(0.99700099229812622000), _DATAF(-0.07738857716321945200)},

250 {_DATAF(0.99697124958038330000), _DATAF(-0.07777091115713119500)},

251 {_DATAF(0.99694132804870605000), _DATAF(-0.07815324515104293800)},

252 {_DATAF(0.99691128730773926000), _DATAF(-0.07853555679321289100)},

253 {_DATAF(0.99688112735748291000), _DATAF(-0.07891786098480224600)},

254 {_DATAF(0.99685078859329224000), _DATAF(-0.07930015772581100500)},

255 {_DATAF(0.99682027101516724000), _DATAF(-0.07968243956565856900)},

256 {_DATAF(0.99678969383239746000), _DATAF(-0.08006470650434494000)},

257 {_DATAF(0.99675887823104858000), _DATAF(-0.08044696599245071400)},

258 {_DATAF(0.99672794342041016000), _DATAF(-0.08082921057939529400)},

259 {_DATAF(0.99669688940048218000), _DATAF(-0.08121144771575927700)},

260 {_DATAF(0.99666565656661987000), _DATAF(-0.08159366995096206700)},

261 {_DATAF(0.99663430452346802000), _DATAF(-0.08197587728500366200)},

262 {_DATAF(0.99660277366638184000), _DATAF(-0.08235807716846466100)},

263 {_DATAF(0.99657112360000610000), _DATAF(-0.08274026215076446500)},

264 {_DATAF(0.99653935432434082000), _DATAF(-0.08312243968248367300)},

265 {_DATAF(0.99650740623474121000), _DATAF(-0.08350460231304168700)},

266 {_DATAF(0.99647527933120728000), _DATAF(-0.08388675004243850700)},

267 {_DATAF(0.99644303321838379000), _DATAF(-0.08426889032125473000)},

268 {_DATAF(0.99641066789627075000), _DATAF(-0.08465101569890976000)},

269 {_DATAF(0.99637812376022339000), _DATAF(-0.08503312617540359500)},

270 {_DATAF(0.99634546041488647000), _DATAF(-0.08541522175073623700)},

271 {_DATAF(0.99631261825561523000), _DATAF(-0.08579730987548828100)},

272 {_DATAF(0.99627965688705444000), _DATAF(-0.08617939054965972900)},

273 {_DATAF(0.99624651670455933000), _DATAF(-0.08656144887208938600)},

274 {_DATAF(0.99621325731277466000), _DATAF(-0.08694349974393844600)},

275 {_DATAF(0.99617981910705566000), _DATAF(-0.08732553571462631200)},

276 {_DATAF(0.99614626169204712000), _DATAF(-0.08770755678415298500)},

277 {_DATAF(0.99611258506774902000), _DATAF(-0.08808957040309906000)},

278 {_DATAF(0.99607872962951660000), _DATAF(-0.08847156912088394200)},

279 {_DATAF(0.99604469537734985000), _DATAF(-0.08885355293750762900)},

280 {_DATAF(0.99601054191589355000), _DATAF(-0.08923552185297012300)},

281 {_DATAF(0.99597626924514771000), _DATAF(-0.08961748331785202000)},

282 {_DATAF(0.99594181776046753000), _DATAF(-0.08999942988157272300)},

283 {_DATAF(0.99590724706649780000), _DATAF(-0.09038136154413223300)},

284 {_DATAF(0.99587249755859375000), _DATAF(-0.09076327830553054800)},

285 {_DATAF(0.99583762884140015000), _DATAF(-0.09114518761634826700)},

286 {_DATAF(0.99580258131027222000), _DATAF(-0.09152707457542419400)},

287 {_DATAF(0.99576741456985474000), _DATAF(-0.09190895408391952500)},

288 {_DATAF(0.99573206901550293000), _DATAF(-0.09229081869125366200)},

289 {_DATAF(0.99569660425186157000), _DATAF(-0.09267267584800720200)},

290 {_DATAF(0.99566102027893066000), _DATAF(-0.09305451065301895100)},

291 {_DATAF(0.99562525749206543000), _DATAF(-0.09343633800745010400)},

292 {_DATAF(0.99558937549591064000), _DATAF(-0.09381814301013946500)},

293 {_DATAF(0.99555331468582153000), _DATAF(-0.09419994056224823000)},

294 {_DATAF(0.99551707506179810000), _DATAF(-0.09458172321319580100)},

295 {_DATAF(0.99548077583312988000), _DATAF(-0.09496349841356277500)},

296 {_DATAF(0.99544423818588257000), _DATAF(-0.09534525126218795800)},

297 {_DATAF(0.99540764093399048000), _DATAF(-0.09572698920965194700)},

298 {_DATAF(0.99537086486816406000), _DATAF(-0.09610871970653533900)},

299 {_DATAF(0.99533390998840332000), _DATAF(-0.09649042785167694100)},

300 {_DATAF(0.99529683589935303000), _DATAF(-0.09687212854623794600)},

301 {_DATAF(0.99525958299636841000), _DATAF(-0.09725381433963775600)},

302 {_DATAF(0.99522227048873901000), _DATAF(-0.09763548523187637300)},

303 {_DATAF(0.99518471956253052000), _DATAF(-0.09801714122295379600)},

304 {_DATAF(0.99514704942703247000), _DATAF(-0.09839878231287002600)},

305 {_DATAF(0.99510926008224487000), _DATAF(-0.09878040850162506100)},

306 {_DATAF(0.99507129192352295000), _DATAF(-0.09916201978921890300)},

307 {_DATAF(0.99503320455551147000), _DATAF(-0.09954361617565155000)},

308 {_DATAF(0.99499493837356567000), _DATAF(-0.09992520511150360100)},

309 {_DATAF(0.99495655298233032000), _DATAF(-0.10030677169561386000)},

310 {_DATAF(0.99491798877716064000), _DATAF(-0.10068832337856293000)},

311 {_DATAF(0.99487930536270142000), _DATAF(-0.10106986016035080000)},

312 {_DATAF(0.99484050273895264000), _DATAF(-0.10145138949155807000)},

313 {_DATAF(0.99480152130126953000), _DATAF(-0.10183289647102356000)},

314 {_DATAF(0.99476242065429688000), _DATAF(-0.10221438854932785000)},

315 {_DATAF(0.99472314119338989000), _DATAF(-0.10259586572647095000)},

316 {_DATAF(0.99468368291854858000), _DATAF(-0.10297733545303345000)},

317 {_DATAF(0.99464416503906250000), _DATAF(-0.10335878282785416000)},

318 {_DATAF(0.99460440874099731000), _DATAF(-0.10374021530151367000)},

319 {_DATAF(0.99456459283828735000), _DATAF(-0.10412163287401199000)},

320 {_DATAF(0.99452453851699829000), _DATAF(-0.10450303554534912000)},

321 {_DATAF(0.99448442459106445000), _DATAF(-0.10488442331552505000)},

322 {_DATAF(0.99444413185119629000), _DATAF(-0.10526579618453979000)},

323 {_DATAF(0.99440366029739380000), _DATAF(-0.10564715415239334000)},

324 {_DATAF(0.99436306953430176000), _DATAF(-0.10602849721908569000)},

325 {_DATAF(0.99432235956192017000), _DATAF(-0.10640981793403625000)},

326 {_DATAF(0.99428147077560425000), _DATAF(-0.10679113119840622000)},

327 {_DATAF(0.99424046277999878000), _DATAF(-0.10717242211103439000)},

328 {_DATAF(0.99419927597045898000), _DATAF(-0.10755370557308197000)},

329 {_DATAF(0.99415796995162964000), _DATAF(-0.10793496668338776000)},

330 {_DATAF(0.99411648511886597000), _DATAF(-0.10831621289253235000)},

331 {_DATAF(0.99407488107681274000), _DATAF(-0.10869744420051575000)},

332 {_DATAF(0.99403309822082520000), _DATAF(-0.10907866060733795000)},

333 {_DATAF(0.99399119615554810000), _DATAF(-0.10945985466241837000)},

334 {_DATAF(0.99394917488098145000), _DATAF(-0.10984104126691818000)},

335 {_DATAF(0.99390697479248047000), _DATAF(-0.11022220551967621000)},

336 {_DATAF(0.99386465549468994000), _DATAF(-0.11060335487127304000)},

337 {_DATAF(0.99382215738296509000), _DATAF(-0.11098448932170868000)},

338 {_DATAF(0.99377948045730591000), _DATAF(-0.11136560887098312000)},

339 {_DATAF(0.99373674392700195000), _DATAF(-0.11174671351909637000)},

340 {_DATAF(0.99369376897811890000), _DATAF(-0.11212779581546783000)},

341 {_DATAF(0.99365073442459106000), _DATAF(-0.11250886321067810000)},

342 {_DATAF(0.99360752105712891000), _DATAF(-0.11288991570472717000)},

343 {_DATAF(0.99356412887573242000), _DATAF(-0.11327095329761505000)},

344 {_DATAF(0.99352061748504639000), _DATAF(-0.11365196853876114000)},

345 {_DATAF(0.99347698688507080000), _DATAF(-0.11403297632932663000)},

346 {_DATAF(0.99343317747116089000), _DATAF(-0.11441396176815033000)},

347 {_DATAF(0.99338918924331665000), _DATAF(-0.11479492485523224000)},

348 {_DATAF(0.99334514141082764000), _DATAF(-0.11517588049173355000)},

349 {_DATAF(0.99330085515975952000), _DATAF(-0.11555681377649307000)},

350 {_DATAF(0.99325650930404663000), _DATAF(-0.11593773216009140000)},

351 {_DATAF(0.99321192502975464000), _DATAF(-0.11631862819194794000)},

352 {_DATAF(0.99316728115081787000), _DATAF(-0.11669951677322388000)},

353 {_DATAF(0.99312245845794678000), _DATAF(-0.11708038300275803000)},

354 {_DATAF(0.99307745695114136000), _DATAF(-0.11746122688055038000)},

355 {_DATAF(0.99303233623504639000), _DATAF(-0.11784206330776215000)},

356 {_DATAF(0.99298709630966187000), _DATAF(-0.11822287738323212000)},

357 {_DATAF(0.99294167757034302000), _DATAF(-0.11860367655754089000)},

358 {_DATAF(0.99289613962173462000), _DATAF(-0.11898445338010788000)},

359 {_DATAF(0.99285042285919189000), _DATAF(-0.11936521530151367000)},

360 {_DATAF(0.99280458688735962000), _DATAF(-0.11974596232175827000)},

361 {_DATAF(0.99275857210159302000), _DATAF(-0.12012668699026108000)},

362 {_DATAF(0.99271243810653687000), _DATAF(-0.12050739675760269000)},

363 {_DATAF(0.99266612529754639000), _DATAF(-0.12088808417320251000)},

364 {_DATAF(0.99261969327926636000), _DATAF(-0.12126876413822174000)},

365 {_DATAF(0.99257314205169678000), _DATAF(-0.12164941430091858000)},

366 {_DATAF(0.99252641201019287000), _DATAF(-0.12203005701303482000)},

367 {_DATAF(0.99247956275939941000), _DATAF(-0.12241067737340927000)},

368 {_DATAF(0.99243253469467163000), _DATAF(-0.12279127538204193000)},

369 {_DATAF(0.99238532781600952000), _DATAF(-0.12317185848951340000)},

370 {_DATAF(0.99233806133270264000), _DATAF(-0.12355242669582367000)},

371 {_DATAF(0.99229061603546143000), _DATAF(-0.12393297255039215000)},

372 {_DATAF(0.99224299192428589000), _DATAF(-0.12431350350379944000)},

373 {_DATAF(0.99219524860382080000), _DATAF(-0.12469401955604553000)},

374 {_DATAF(0.99214732646942139000), _DATAF(-0.12507450580596924000)},

375 {_DATAF(0.99209928512573242000), _DATAF(-0.12545497715473175000)},

376 {_DATAF(0.99205112457275391000), _DATAF(-0.12583543360233307000)},

377 {_DATAF(0.99200278520584106000), _DATAF(-0.12621587514877319000)},

378 {_DATAF(0.99195432662963867000), _DATAF(-0.12659630179405212000)},

379 {_DATAF(0.99190568923950195000), _DATAF(-0.12697669863700867000)},

380 {_DATAF(0.99185693264007568000), _DATAF(-0.12735708057880402000)},

381 {_DATAF(0.99180799722671509000), _DATAF(-0.12773744761943817000)},

382 {_DATAF(0.99175894260406494000), _DATAF(-0.12811778485774994000)},

383 {_DATAF(0.99170976877212524000), _DATAF(-0.12849810719490051000)},

384 {_DATAF(0.99166041612625122000), _DATAF(-0.12887841463088989000)},

385 {_DATAF(0.99161088466644287000), _DATAF(-0.12925870716571808000)},

386 {_DATAF(0.99156123399734497000), _DATAF(-0.12963896989822388000)},

387 {_DATAF(0.99151146411895752000), _DATAF(-0.13001921772956848000)},

388 {_DATAF(0.99146151542663574000), _DATAF(-0.13039945065975189000)},

389 {_DATAF(0.99141144752502441000), _DATAF(-0.13077966868877411000)},

390 {_DATAF(0.99136126041412354000), _DATAF(-0.13115985691547394000)},

391 {_DATAF(0.99131083488464355000), _DATAF(-0.13154003024101257000)},

392 {_DATAF(0.99126034975051880000), _DATAF(-0.13192018866539001000)},

393 {_DATAF(0.99120968580245972000), _DATAF(-0.13230031728744507000)},

394 {_DATAF(0.99115884304046631000), _DATAF(-0.13268043100833893000)},

395 {_DATAF(0.99110794067382813000), _DATAF(-0.13306052982807159000)},

396 {_DATAF(0.99105679988861084000), _DATAF(-0.13344059884548187000)},

397 {_DATAF(0.99100553989410400000), _DATAF(-0.13382065296173096000)},

398 {_DATAF(0.99095416069030762000), _DATAF(-0.13420069217681885000)},

399 {_DATAF(0.99090266227722168000), _DATAF(-0.13458070158958435000)},

400 {_DATAF(0.99085092544555664000), _DATAF(-0.13496071100234985000)},

401 {_DATAF(0.99079912900924683000), _DATAF(-0.13534067571163177000)},

402 {_DATAF(0.99074715375900269000), _DATAF(-0.13572064042091370000)},

403 {_DATAF(0.99069499969482422000), _DATAF(-0.13610057532787323000)},

404 {_DATAF(0.99064278602600098000), _DATAF(-0.13648049533367157000)},

405 {_DATAF(0.99059033393859863000), _DATAF(-0.13686038553714752000)},

406 {_DATAF(0.99053776264190674000), _DATAF(-0.13724026083946228000)},

407 {_DATAF(0.99048507213592529000), _DATAF(-0.13762012124061584000)},

408 {_DATAF(0.99043226242065430000), _DATAF(-0.13799995183944702000)},

409 {_DATAF(0.99037921428680420000), _DATAF(-0.13837976753711700000)},

410 {_DATAF(0.99032610654830933000), _DATAF(-0.13875956833362579000)},

411 {_DATAF(0.99027281999588013000), _DATAF(-0.13913933932781219000)},

412 {_DATAF(0.99021935462951660000), _DATAF(-0.13951909542083740000)},

413 {_DATAF(0.99016582965850830000), _DATAF(-0.13989883661270142000)},

414 {_DATAF(0.99011206626892090000), _DATAF(-0.14027854800224304000)},

415 {_DATAF(0.99005818367004395000), _DATAF(-0.14065824449062347000)},

416 {_DATAF(0.99000418186187744000), _DATAF(-0.14103791117668152000)},

417 {_DATAF(0.98995006084442139000), _DATAF(-0.14141756296157837000)},

418 {_DATAF(0.98989570140838623000), _DATAF(-0.14179719984531403000)},

419 {_DATAF(0.98984128236770630000), _DATAF(-0.14217680692672729000)},

420 {_DATAF(0.98978668451309204000), _DATAF(-0.14255639910697937000)},

421 {_DATAF(0.98973196744918823000), _DATAF(-0.14293596148490906000)},

422 {_DATAF(0.98967707157135010000), _DATAF(-0.14331550896167755000)},

423 {_DATAF(0.98962199687957764000), _DATAF(-0.14369502663612366000)},

424 {_DATAF(0.98956686258316040000), _DATAF(-0.14407454431056976000)},

425 {_DATAF(0.98951148986816406000), _DATAF(-0.14445401728153229000)},

426 {_DATAF(0.98945605754852295000), _DATAF(-0.14483349025249481000)},

427 {_DATAF(0.98940044641494751000), _DATAF(-0.14521291851997375000)},

428 {_DATAF(0.98934465646743774000), _DATAF(-0.14559234678745270000)},

429 {_DATAF(0.98928874731063843000), _DATAF(-0.14597174525260925000)},

430 {_DATAF(0.98923271894454956000), _DATAF(-0.14635111391544342000)},

431 {_DATAF(0.98917651176452637000), _DATAF(-0.14673046767711639000)},

432 {_DATAF(0.98912018537521362000), _DATAF(-0.14710980653762817000)},

433 {_DATAF(0.98906368017196655000), _DATAF(-0.14748911559581757000)},

434 {_DATAF(0.98900705575942993000), _DATAF(-0.14786840975284576000)},

435 {_DATAF(0.98895025253295898000), _DATAF(-0.14824767410755157000)},

436 {_DATAF(0.98889333009719849000), _DATAF(-0.14862692356109619000)},

437 {_DATAF(0.98883628845214844000), _DATAF(-0.14900614321231842000)},

438 {_DATAF(0.98877906799316406000), _DATAF(-0.14938534796237946000)},

439 {_DATAF(0.98872166872024536000), _DATAF(-0.14976453781127930000)},

440 {_DATAF(0.98866420984268188000), _DATAF(-0.15014369785785675000)},

441 {_DATAF(0.98860651254653931000), _DATAF(-0.15052282810211182000)},

442 {_DATAF(0.98854875564575195000), _DATAF(-0.15090194344520569000)},

443 {_DATAF(0.98849081993103027000), _DATAF(-0.15128104388713837000)},

444 {_DATAF(0.98843270540237427000), _DATAF(-0.15166011452674866000)},

445 {_DATAF(0.98837447166442871000), _DATAF(-0.15203915536403656000)},

446 {_DATAF(0.98831611871719360000), _DATAF(-0.15241818130016327000)},

447 {_DATAF(0.98825758695602417000), _DATAF(-0.15279719233512878000)},

448 {_DATAF(0.98819887638092041000), _DATAF(-0.15317615866661072000)},

449 {_DATAF(0.98814010620117188000), _DATAF(-0.15355512499809265000)},

450 {_DATAF(0.98808109760284424000), _DATAF(-0.15393406152725220000)},

451 {_DATAF(0.98802202939987183000), _DATAF(-0.15431296825408936000)},

452 {_DATAF(0.98796278238296509000), _DATAF(-0.15469186007976532000)},

453 {_DATAF(0.98790335655212402000), _DATAF(-0.15507073700428009000)},

454 {_DATAF(0.98784381151199341000), _DATAF(-0.15544956922531128000)},

455 {_DATAF(0.98778414726257324000), _DATAF(-0.15582840144634247000)},

456 {_DATAF(0.98772430419921875000), _DATAF(-0.15620720386505127000)},

457 {_DATAF(0.98766434192657471000), _DATAF(-0.15658597648143768000)},

458 {_DATAF(0.98760420083999634000), _DATAF(-0.15696471929550171000)},

459 {_DATAF(0.98754394054412842000), _DATAF(-0.15734346210956573000)},

460 {_DATAF(0.98748350143432617000), _DATAF(-0.15772216022014618000)},

461 {_DATAF(0.98742294311523438000), _DATAF(-0.15810084342956543000)},

462 {_DATAF(0.98736226558685303000), _DATAF(-0.15847951173782349000)},

463 {_DATAF(0.98730140924453735000), _DATAF(-0.15885815024375916000)},

464 {_DATAF(0.98724043369293213000), _DATAF(-0.15923675894737244000)},

465 {_DATAF(0.98717927932739258000), _DATAF(-0.15961535274982452000)},

466 {_DATAF(0.98711800575256348000), _DATAF(-0.15999391674995422000)},

467 {_DATAF(0.98705655336380005000), _DATAF(-0.16037245094776154000)},

468 {_DATAF(0.98699498176574707000), _DATAF(-0.16075097024440765000)},

469 {_DATAF(0.98693329095840454000), _DATAF(-0.16112947463989258000)},

470 {_DATAF(0.98687142133712769000), _DATAF(-0.16150794923305511000)},

471 {_DATAF(0.98680937290191650000), _DATAF(-0.16188639402389526000)},

472 {_DATAF(0.98674726486206055000), _DATAF(-0.16226482391357422000)},

473 {_DATAF(0.98668491840362549000), _DATAF(-0.16264322400093079000)},

474 {_DATAF(0.98662251234054565000), _DATAF(-0.16302159428596497000)},

475 {_DATAF(0.98655992746353149000), _DATAF(-0.16339994966983795000)},

476 {_DATAF(0.98649716377258301000), _DATAF(-0.16377827525138855000)},

477 {_DATAF(0.98643428087234497000), _DATAF(-0.16415658593177795000)},

478 {_DATAF(0.98637127876281738000), _DATAF(-0.16453486680984497000)},

479 {_DATAF(0.98630809783935547000), _DATAF(-0.16491311788558960000)},

480 {_DATAF(0.98624479770660400000), _DATAF(-0.16529135406017303000)},

481 {_DATAF(0.98618131875991821000), _DATAF(-0.16566956043243408000)},

482 {_DATAF(0.98611772060394287000), _DATAF(-0.16604773700237274000)},

483 {_DATAF(0.98605394363403320000), _DATAF(-0.16642589867115021000)},

484 {_DATAF(0.98599004745483398000), _DATAF(-0.16680404543876648000)},

485 {_DATAF(0.98592603206634521000), _DATAF(-0.16718214750289917000)},

486 {_DATAF(0.98586183786392212000), _DATAF(-0.16756023466587067000)},

487 {_DATAF(0.98579752445220947000), _DATAF(-0.16793829202651978000)},

488 {_DATAF(0.98573303222656250000), _DATAF(-0.16831633448600769000)},

489 {_DATAF(0.98566842079162598000), _DATAF(-0.16869434714317322000)},

490 {_DATAF(0.98560363054275513000), _DATAF(-0.16907232999801636000)},

491 {_DATAF(0.98553872108459473000), _DATAF(-0.16945029795169830000)},

492 {_DATAF(0.98547369241714478000), _DATAF(-0.16982822120189667000)},

493 {_DATAF(0.98540848493576050000), _DATAF(-0.17020614445209503000)},

494 {_DATAF(0.98534315824508667000), _DATAF(-0.17058402299880981000)},

495 {_DATAF(0.98527765274047852000), _DATAF(-0.17096188664436340000)},

496 {_DATAF(0.98521202802658081000), _DATAF(-0.17133972048759460000)},

497 {_DATAF(0.98514622449874878000), _DATAF(-0.17171753942966461000)},

498 {_DATAF(0.98508030176162720000), _DATAF(-0.17209532856941223000)},

499 {_DATAF(0.98501425981521606000), _DATAF(-0.17247308790683746000)},

500 {_DATAF(0.98494803905487061000), _DATAF(-0.17285081744194031000)},

501 {_DATAF(0.98488163948059082000), _DATAF(-0.17322853207588196000)},

502 {_DATAF(0.98481518030166626000), _DATAF(-0.17360621690750122000)},

503 {_DATAF(0.98474848270416260000), _DATAF(-0.17398387193679810000)},

504 {_DATAF(0.98468172550201416000), _DATAF(-0.17436151206493378000)},

505 {_DATAF(0.98461478948593140000), _DATAF(-0.17473910748958588000)},

506 {_DATAF(0.98454767465591431000), _DATAF(-0.17511670291423798000)},

507 {_DATAF(0.98448044061660767000), _DATAF(-0.17549425363540649000)},

508 {_DATAF(0.98441308736801147000), _DATAF(-0.17587178945541382000)},

509 {_DATAF(0.98434555530548096000), _DATAF(-0.17624929547309875000)},

510 {_DATAF(0.98427790403366089000), _DATAF(-0.17662677168846130000)},

511 {_DATAF(0.98421007394790649000), _DATAF(-0.17700421810150146000)},

512 {_DATAF(0.98414212465286255000), _DATAF(-0.17738164961338043000)},

513 {_DATAF(0.98407405614852905000), _DATAF(-0.17775905132293701000)},

514 {_DATAF(0.98400580883026123000), _DATAF(-0.17813642323017120000)},

515 {_DATAF(0.98393744230270386000), _DATAF(-0.17851376533508301000)},

516 {_DATAF(0.98386889696121216000), _DATAF(-0.17889109253883362000)},

517 {_DATAF(0.98380023241043091000), _DATAF(-0.17926838994026184000)},

518 {_DATAF(0.98373138904571533000), _DATAF(-0.17964565753936768000)},

519 {_DATAF(0.98366242647171021000), _DATAF(-0.18002289533615112000)},

520 {_DATAF(0.98359328508377075000), _DATAF(-0.18040011823177338000)},

521 {_DATAF(0.98352402448654175000), _DATAF(-0.18077731132507324000)},

522 {_DATAF(0.98345464468002319000), _DATAF(-0.18115447461605072000)},

523 {_DATAF(0.98338508605957031000), _DATAF(-0.18153160810470581000)},

524 {_DATAF(0.98331540822982788000), _DATAF(-0.18190871179103851000)},

525 {_DATAF(0.98324561119079590000), _DATAF(-0.18228580057621002000)},

526 {_DATAF(0.98317563533782959000), _DATAF(-0.18266285955905914000)},

527 {_DATAF(0.98310548067092896000), _DATAF(-0.18303988873958588000)},

528 {_DATAF(0.98303520679473877000), _DATAF(-0.18341688811779022000)},

529 {_DATAF(0.98296481370925903000), _DATAF(-0.18379387259483337000)},

530 {_DATAF(0.98289424180984497000), _DATAF(-0.18417081236839294000)},

531 {_DATAF(0.98282355070114136000), _DATAF(-0.18454773724079132000)},

532 {_DATAF(0.98275268077850342000), _DATAF(-0.18492463231086731000)},

533 {_DATAF(0.98268169164657593000), _DATAF(-0.18530149757862091000)},

534 {_DATAF(0.98261058330535889000), _DATAF(-0.18567833304405212000)},

535 {_DATAF(0.98253929615020752000), _DATAF(-0.18605515360832214000)},

536 {_DATAF(0.98246788978576660000), _DATAF(-0.18643194437026978000)},

537 {_DATAF(0.98239630460739136000), _DATAF(-0.18680869042873383000)},

538 {_DATAF(0.98232460021972656000), _DATAF(-0.18718542158603668000)},

539 {_DATAF(0.98225271701812744000), _DATAF(-0.18756212294101715000)},

540 {_DATAF(0.98218071460723877000), _DATAF(-0.18793880939483643000)},

541 {_DATAF(0.98210859298706055000), _DATAF(-0.18831545114517212000)},

542 {_DATAF(0.98203629255294800000), _DATAF(-0.18869207799434662000)},

543 {_DATAF(0.98196387290954590000), _DATAF(-0.18906866014003754000)},

544 {_DATAF(0.98189127445220947000), _DATAF(-0.18944522738456726000)},

545 {_DATAF(0.98181855678558350000), _DATAF(-0.18982176482677460000)},

546 {_DATAF(0.98174571990966797000), _DATAF(-0.19019827246665955000)},

547 {_DATAF(0.98167270421981812000), _DATAF(-0.19057475030422211000)},

548 {_DATAF(0.98159950971603394000), _DATAF(-0.19095121324062347000)},

549 {_DATAF(0.98152625560760498000), _DATAF(-0.19132763147354126000)},

550 {_DATAF(0.98145276308059692000), _DATAF(-0.19170403480529785000)},

551 {_DATAF(0.98137921094894409000), _DATAF(-0.19208039343357086000)},

552 {_DATAF(0.98130548000335693000), _DATAF(-0.19245673716068268000)},

553 {_DATAF(0.98123157024383545000), _DATAF(-0.19283305108547211000)},

554 {_DATAF(0.98115754127502441000), _DATAF(-0.19320933520793915000)},

555 {_DATAF(0.98108339309692383000), _DATAF(-0.19358558952808380000)},

556 {_DATAF(0.98100906610488892000), _DATAF(-0.19396181404590607000)},

557 {_DATAF(0.98093461990356445000), _DATAF(-0.19433800876140594000)},

558 {_DATAF(0.98085999488830566000), _DATAF(-0.19471418857574463000)},

559 {_DATAF(0.98078525066375732000), _DATAF(-0.19509032368659973000)},

560 {_DATAF(0.98071038722991943000), _DATAF(-0.19546642899513245000)},

561 {_DATAF(0.98063534498214722000), _DATAF(-0.19584251940250397000)},

562 {_DATAF(0.98056018352508545000), _DATAF(-0.19621856510639191000)},

563 {_DATAF(0.98048484325408936000), _DATAF(-0.19659459590911865000)},

564 {_DATAF(0.98040938377380371000), _DATAF(-0.19697059690952301000)},

565 {_DATAF(0.98033380508422852000), _DATAF(-0.19734656810760498000)},

566 {_DATAF(0.98025804758071899000), _DATAF(-0.19772249460220337000)},

567 {_DATAF(0.98018211126327515000), _DATAF(-0.19809840619564056000)},

568 {_DATAF(0.98010611534118652000), _DATAF(-0.19847428798675537000)},

569 {_DATAF(0.98002988100051880000), _DATAF(-0.19885013997554779000)},

570 {_DATAF(0.97995358705520630000), _DATAF(-0.19922596216201782000)},

571 {_DATAF(0.97987711429595947000), _DATAF(-0.19960175454616547000)},

572 {_DATAF(0.97980046272277832000), _DATAF(-0.19997751712799072000)},

573 {_DATAF(0.97972375154495239000), _DATAF(-0.20035324990749359000)},

574 {_DATAF(0.97964680194854736000), _DATAF(-0.20072895288467407000)},

575 {_DATAF(0.97956979274749756000), _DATAF(-0.20110464096069336000)},

576 {_DATAF(0.97949254512786865000), _DATAF(-0.20148028433322906000)},

577 {_DATAF(0.97941523790359497000), _DATAF(-0.20185589790344238000)},

578 {_DATAF(0.97933775186538696000), _DATAF(-0.20223148167133331000)},

579 {_DATAF(0.97926014661788940000), _DATAF(-0.20260703563690186000)},

580 {_DATAF(0.97918236255645752000), _DATAF(-0.20298255980014801000)},

581 {_DATAF(0.97910445928573608000), _DATAF(-0.20335806906223297000)},

582 {_DATAF(0.97902637720108032000), _DATAF(-0.20373353362083435000)},

583 {_DATAF(0.97894817590713501000), _DATAF(-0.20410896837711334000)},

584 {_DATAF(0.97886985540390015000), _DATAF(-0.20448437333106995000)},

585 {_DATAF(0.97879135608673096000), _DATAF(-0.20485974848270416000)},

586 {_DATAF(0.97871267795562744000), _DATAF(-0.20523509383201599000)},

587 {_DATAF(0.97863394021987915000), _DATAF(-0.20561040937900543000)},

588 {_DATAF(0.97855502367019653000), _DATAF(-0.20598569512367249000)},

589 {_DATAF(0.97847592830657959000), _DATAF(-0.20636095106601715000)},

590 {_DATAF(0.97839671373367310000), _DATAF(-0.20673617720603943000)},

591 {_DATAF(0.97831737995147705000), _DATAF(-0.20711137354373932000)},

592 {_DATAF(0.97823786735534668000), _DATAF(-0.20748654007911682000)},

593 {_DATAF(0.97815823554992676000), _DATAF(-0.20786167681217194000)},

594 {_DATAF(0.97807842493057251000), _DATAF(-0.20823678374290466000)},

595 {_DATAF(0.97799849510192871000), _DATAF(-0.20861184597015381000)},

596 {_DATAF(0.97791844606399536000), _DATAF(-0.20898689329624176000)},

597 {_DATAF(0.97783821821212769000), _DATAF(-0.20936191082000732000)},

598 {_DATAF(0.97775787115097046000), _DATAF(-0.20973688364028931000)},

599 {_DATAF(0.97767734527587891000), _DATAF(-0.21011184155941010000)},

600 {_DATAF(0.97759670019149780000), _DATAF(-0.21048675477504730000)},

601 {_DATAF(0.97751593589782715000), _DATAF(-0.21086163818836212000)},

602 {_DATAF(0.97743499279022217000), _DATAF(-0.21123650670051575000)},

603 {_DATAF(0.97735387086868286000), _DATAF(-0.21161133050918579000)},

604 {_DATAF(0.97727268934249878000), _DATAF(-0.21198612451553345000)},

605 {_DATAF(0.97719132900238037000), _DATAF(-0.21236088871955872000)},

606 {_DATAF(0.97710978984832764000), _DATAF(-0.21273562312126160000)},

607 {_DATAF(0.97702813148498535000), _DATAF(-0.21311031281948090000)},

608 {_DATAF(0.97694635391235352000), _DATAF(-0.21348498761653900000)},

609 {_DATAF(0.97686439752578735000), _DATAF(-0.21385963261127472000)},

610 {_DATAF(0.97678232192993164000), _DATAF(-0.21423423290252686000)},

611 {_DATAF(0.97670006752014160000), _DATAF(-0.21460881829261780000)},

612 {_DATAF(0.97661769390106201000), _DATAF(-0.21498335897922516000)},

613 {_DATAF(0.97653520107269287000), _DATAF(-0.21535786986351013000)},

614 {_DATAF(0.97645252943038940000), _DATAF(-0.21573235094547272000)},

615 {_DATAF(0.97636973857879639000), _DATAF(-0.21610680222511292000)},

616 {_DATAF(0.97628676891326904000), _DATAF(-0.21648120880126953000)},

617 {_DATAF(0.97620368003845215000), _DATAF(-0.21685560047626495000)},

618 {_DATAF(0.97612047195434570000), _DATAF(-0.21722994744777679000)},

619 {_DATAF(0.97603708505630493000), _DATAF(-0.21760427951812744000)},

620 {_DATAF(0.97595357894897461000), _DATAF(-0.21797856688499451000)},

621 {_DATAF(0.97586989402770996000), _DATAF(-0.21835282444953918000)},

622 {_DATAF(0.97578608989715576000), _DATAF(-0.21872705221176147000)},

623 {_DATAF(0.97570210695266724000), _DATAF(-0.21910123527050018000)},

624 {_DATAF(0.97561800479888916000), _DATAF(-0.21947540342807770000)},

625 {_DATAF(0.97553378343582153000), _DATAF(-0.21984952688217163000)},

626 {_DATAF(0.97544938325881958000), _DATAF(-0.22022362053394318000)},

627 {_DATAF(0.97536486387252808000), _DATAF(-0.22059768438339233000)},

628 {_DATAF(0.97528022527694702000), _DATAF(-0.22097171843051910000)},

629 {_DATAF(0.97519540786743164000), _DATAF(-0.22134572267532349000)},

630 {_DATAF(0.97511047124862671000), _DATAF(-0.22171968221664429000)},

631 {_DATAF(0.97502535581588745000), _DATAF(-0.22209362685680389000)},

632 {_DATAF(0.97494012117385864000), _DATAF(-0.22246752679347992000)},

633 {_DATAF(0.97485470771789551000), _DATAF(-0.22284139692783356000)},

634 {_DATAF(0.97476917505264282000), _DATAF(-0.22321522235870361000)},

635 {_DATAF(0.97468352317810059000), _DATAF(-0.22358903288841248000)},

636 {_DATAF(0.97459769248962402000), _DATAF(-0.22396279871463776000)},

637 {_DATAF(0.97451174259185791000), _DATAF(-0.22433653473854065000)},

638 {_DATAF(0.97442561388015747000), _DATAF(-0.22471024096012115000)},

639 {_DATAF(0.97433936595916748000), _DATAF(-0.22508391737937927000)},

640 {_DATAF(0.97425299882888794000), _DATAF(-0.22545754909515381000)},

641 {_DATAF(0.97416645288467407000), _DATAF(-0.22583115100860596000)},

642 {_DATAF(0.97407978773117065000), _DATAF(-0.22620472311973572000)},

643 {_DATAF(0.97399294376373291000), _DATAF(-0.22657826542854309000)},

644 {_DATAF(0.97390598058700562000), _DATAF(-0.22695176303386688000)},

645 {_DATAF(0.97381889820098877000), _DATAF(-0.22732524573802948000)},

646 {_DATAF(0.97373163700103760000), _DATAF(-0.22769868373870850000)},

647 {_DATAF(0.97364425659179688000), _DATAF(-0.22807207703590393000)},

648 {_DATAF(0.97355669736862183000), _DATAF(-0.22844545543193817000)},

649 {_DATAF(0.97346901893615723000), _DATAF(-0.22881878912448883000)},

650 {_DATAF(0.97338122129440308000), _DATAF(-0.22919209301471710000)},

651 {_DATAF(0.97329324483871460000), _DATAF(-0.22956536710262299000)},

652 {_DATAF(0.97320514917373657000), _DATAF(-0.22993859648704529000)},

653 {_DATAF(0.97311687469482422000), _DATAF(-0.23031181097030640000)},

654 {_DATAF(0.97302848100662231000), _DATAF(-0.23068498075008392000)},

655 {_DATAF(0.97293996810913086000), _DATAF(-0.23105810582637787000)},

656 {_DATAF(0.97285127639770508000), _DATAF(-0.23143121600151062000)},

657 {_DATAF(0.97276246547698975000), _DATAF(-0.23180428147315979000)},

658 {_DATAF(0.97267347574234009000), _DATAF(-0.23217730224132538000)},

659 {_DATAF(0.97258436679840088000), _DATAF(-0.23255030810832977000)},

660 {_DATAF(0.97249513864517212000), _DATAF(-0.23292326927185059000)},

661 {_DATAF(0.97240573167800903000), _DATAF(-0.23329620063304901000)},

662 {_DATAF(0.97231620550155640000), _DATAF(-0.23366910219192505000)},

663 {_DATAF(0.97222650051116943000), _DATAF(-0.23404195904731750000)},

664 {_DATAF(0.97213667631149292000), _DATAF(-0.23441478610038757000)},

665 {_DATAF(0.97204673290252686000), _DATAF(-0.23478758335113525000)},

666 {_DATAF(0.97195661067962646000), _DATAF(-0.23516033589839935000)},

667 {_DATAF(0.97186630964279175000), _DATAF(-0.23553305864334106000)},

668 {_DATAF(0.97177594900131226000), _DATAF(-0.23590575158596039000)},

669 {_DATAF(0.97168540954589844000), _DATAF(-0.23627839982509613000)},

670 {_DATAF(0.97159469127655029000), _DATAF(-0.23665101826190948000)},

671 {_DATAF(0.97150391340255737000), _DATAF(-0.23702360689640045000)},

672 {_DATAF(0.97141289710998535000), _DATAF(-0.23739615082740784000)},

673 {_DATAF(0.97132182121276855000), _DATAF(-0.23776866495609283000)},

674 {_DATAF(0.97123056650161743000), _DATAF(-0.23814114928245544000)},

675 {_DATAF(0.97113913297653198000), _DATAF(-0.23851358890533447000)},

676 {_DATAF(0.97104763984680176000), _DATAF(-0.23888599872589111000)},

677 {_DATAF(0.97095590829849243000), _DATAF(-0.23925837874412537000)},

678 {_DATAF(0.97086411714553833000), _DATAF(-0.23963071405887604000)},

679 {_DATAF(0.97077214717864990000), _DATAF(-0.24000301957130432000)},

680 {_DATAF(0.97068005800247192000), _DATAF(-0.24037529528141022000)},

681 {_DATAF(0.97058779001235962000), _DATAF(-0.24074752628803253000)},

682 {_DATAF(0.97049540281295776000), _DATAF(-0.24111972749233246000)},

683 {_DATAF(0.97040283679962158000), _DATAF(-0.24149188399314880000)},

684 {_DATAF(0.97031015157699585000), _DATAF(-0.24186401069164276000)},

685 {_DATAF(0.97021734714508057000), _DATAF(-0.24223610758781433000)},

686 {_DATAF(0.97012436389923096000), _DATAF(-0.24260815978050232000)},

687 {_DATAF(0.97003126144409180000), _DATAF(-0.24298018217086792000)},

688 {_DATAF(0.96993798017501831000), _DATAF(-0.24335215985774994000)},

689 {_DATAF(0.96984457969665527000), _DATAF(-0.24372410774230957000)},

690 {_DATAF(0.96975106000900269000), _DATAF(-0.24409602582454681000)},

691 {_DATAF(0.96965736150741577000), _DATAF(-0.24446789920330048000)},

692 {_DATAF(0.96956354379653931000), _DATAF(-0.24483974277973175000)},

693 {_DATAF(0.96946960687637329000), _DATAF(-0.24521154165267944000)},

694 {_DATAF(0.96937549114227295000), _DATAF(-0.24558331072330475000)},

695 {_DATAF(0.96928125619888306000), _DATAF(-0.24595504999160767000)},

696 {_DATAF(0.96918684244155884000), _DATAF(-0.24632674455642700000)},

697 {_DATAF(0.96909230947494507000), _DATAF(-0.24669840931892395000)},

698 {_DATAF(0.96899759769439697000), _DATAF(-0.24707002937793732000)},

699 {_DATAF(0.96890282630920410000), _DATAF(-0.24744161963462830000)},

700 {_DATAF(0.96880781650543213000), _DATAF(-0.24781316518783569000)},

701 {_DATAF(0.96871274709701538000), _DATAF(-0.24818468093872070000)},

702 {_DATAF(0.96861749887466431000), _DATAF(-0.24855616688728333000)},

703 {_DATAF(0.96852207183837891000), _DATAF(-0.24892760813236237000)},

704 {_DATAF(0.96842658519744873000), _DATAF(-0.24929900467395782000)},

705 {_DATAF(0.96833086013793945000), _DATAF(-0.24967038631439209000)},

706 {_DATAF(0.96823507547378540000), _DATAF(-0.25004172325134277000)},

707 {_DATAF(0.96813911199569702000), _DATAF(-0.25041300058364868000)},

708 {_DATAF(0.96804302930831909000), _DATAF(-0.25078427791595459000)},

709 {_DATAF(0.96794676780700684000), _DATAF(-0.25115549564361572000)},

710 {_DATAF(0.96785038709640503000), _DATAF(-0.25152668356895447000)},

711 {_DATAF(0.96775382757186890000), _DATAF(-0.25189781188964844000)},

712 {_DATAF(0.96765714883804321000), _DATAF(-0.25226894021034241000)},

713 {_DATAF(0.96756035089492798000), _DATAF(-0.25264000892639160000)},

714 {_DATAF(0.96746337413787842000), _DATAF(-0.25301104784011841000)},

715 {_DATAF(0.96736627817153931000), _DATAF(-0.25338202714920044000)},

716 {_DATAF(0.96726906299591064000), _DATAF(-0.25375300645828247000)},

717 {_DATAF(0.96717166900634766000), _DATAF(-0.25412392616271973000)},

718 {_DATAF(0.96707415580749512000), _DATAF(-0.25449481606483459000)},

719 {_DATAF(0.96697646379470825000), _DATAF(-0.25486564636230469000)},

720 {_DATAF(0.96687865257263184000), _DATAF(-0.25523647665977478000)},

721 {_DATAF(0.96678072214126587000), _DATAF(-0.25560724735260010000)},

722 {_DATAF(0.96668261289596558000), _DATAF(-0.25597798824310303000)},

723 {_DATAF(0.96658438444137573000), _DATAF(-0.25634866952896118000)},

724 {_DATAF(0.96648597717285156000), _DATAF(-0.25671935081481934000)},

725 {_DATAF(0.96638745069503784000), _DATAF(-0.25708997249603271000)},

726 {_DATAF(0.96628880500793457000), _DATAF(-0.25746056437492371000)},

727 {_DATAF(0.96618998050689697000), _DATAF(-0.25783109664916992000)},

728 {_DATAF(0.96609103679656982000), _DATAF(-0.25820159912109375000)},

729 {_DATAF(0.96599197387695313000), _DATAF(-0.25857207179069519000)},

730 {_DATAF(0.96589273214340210000), _DATAF(-0.25894251465797424000)},

731 {_DATAF(0.96579337120056152000), _DATAF(-0.25931292772293091000)},

732 {_DATAF(0.96569383144378662000), _DATAF(-0.25968328118324280000)},

733 {_DATAF(0.96559417247772217000), _DATAF(-0.26005360484123230000)},

734 {_DATAF(0.96549439430236816000), _DATAF(-0.26042386889457703000)},

735 {_DATAF(0.96539443731307983000), _DATAF(-0.26079410314559937000)},

736 {_DATAF(0.96529436111450195000), _DATAF(-0.26116433739662170000)},

737 {_DATAF(0.96519410610198975000), _DATAF(-0.26153448224067688000)},

738 {_DATAF(0.96509379148483276000), _DATAF(-0.26190462708473206000)},

739 {_DATAF(0.96499323844909668000), _DATAF(-0.26227471232414246000)},

740 {_DATAF(0.96489262580871582000), _DATAF(-0.26264476776123047000)},

741 {_DATAF(0.96479183435440063000), _DATAF(-0.26301476359367371000)},

742 {_DATAF(0.96469086408615112000), _DATAF(-0.26338472962379456000)},

743 {_DATAF(0.96458977460861206000), _DATAF(-0.26375466585159302000)},

744 {_DATAF(0.96448856592178345000), _DATAF(-0.26412457227706909000)},

745 {_DATAF(0.96438723802566528000), _DATAF(-0.26449441909790039000)},

746 {_DATAF(0.96428573131561279000), _DATAF(-0.26486423611640930000)},

747 {_DATAF(0.96418404579162598000), _DATAF(-0.26523402333259583000)},

748 {_DATAF(0.96408230066299438000), _DATAF(-0.26560378074645996000)},

749 {_DATAF(0.96398037672042847000), _DATAF(-0.26597347855567932000)},

750 {_DATAF(0.96387827396392822000), _DATAF(-0.26634314656257629000)},

751 {_DATAF(0.96377605199813843000), _DATAF(-0.26671275496482849000)},

752 {_DATAF(0.96367371082305908000), _DATAF(-0.26708233356475830000)},

753 {_DATAF(0.96357119083404541000), _DATAF(-0.26745188236236572000)},

754 {_DATAF(0.96346855163574219000), _DATAF(-0.26782140135765076000)},

755 {_DATAF(0.96336579322814941000), _DATAF(-0.26819086074829102000)},

756 {_DATAF(0.96326285600662231000), _DATAF(-0.26856029033660889000)},

757 {_DATAF(0.96315979957580566000), _DATAF(-0.26892966032028198000)},

758 {_DATAF(0.96305662393569946000), _DATAF(-0.26929903030395508000)},

759 {_DATAF(0.96295326948165894000), _DATAF(-0.26966831088066101000)},

760 {_DATAF(0.96284979581832886000), _DATAF(-0.27003759145736694000)},

761 {_DATAF(0.96274614334106445000), _DATAF(-0.27040681242942810000)},

762 {_DATAF(0.96264237165451050000), _DATAF(-0.27077600359916687000)},

763 {_DATAF(0.96253848075866699000), _DATAF(-0.27114516496658325000)},

764 {_DATAF(0.96243441104888916000), _DATAF(-0.27151426672935486000)},

765 {_DATAF(0.96233022212982178000), _DATAF(-0.27188333868980408000)},

766 {_DATAF(0.96222585439682007000), _DATAF(-0.27225238084793091000)},

767 {_DATAF(0.96212142705917358000), _DATAF(-0.27262136340141296000)},

768 {_DATAF(0.96201676130294800000), _DATAF(-0.27299031615257263000)},

769 {_DATAF(0.96191203594207764000), _DATAF(-0.27335920929908752000)},

770 {_DATAF(0.96180713176727295000), _DATAF(-0.27372807264328003000)},

771 {_DATAF(0.96170204877853394000), _DATAF(-0.27409690618515015000)},

772 {_DATAF(0.96159690618515015000), _DATAF(-0.27446570992469788000)},

773 {_DATAF(0.96149158477783203000), _DATAF(-0.27483445405960083000)},

774 {_DATAF(0.96138608455657959000), _DATAF(-0.27520313858985901000)},

775 {_DATAF(0.96128046512603760000), _DATAF(-0.27557182312011719000)},

776 {_DATAF(0.96117472648620605000), _DATAF(-0.27594044804573059000)},

777 {_DATAF(0.96106886863708496000), _DATAF(-0.27630904316902161000)},

778 {_DATAF(0.96096283197402954000), _DATAF(-0.27667757868766785000)},

779 {_DATAF(0.96085661649703979000), _DATAF(-0.27704608440399170000)},

780 {_DATAF(0.96075034141540527000), _DATAF(-0.27741453051567078000)},

781 {_DATAF(0.96064388751983643000), _DATAF(-0.27778297662734985000)},

782 {_DATAF(0.96053725481033325000), _DATAF(-0.27815136313438416000)},

783 {_DATAF(0.96043050289154053000), _DATAF(-0.27851969003677368000)},

784 {_DATAF(0.96032363176345825000), _DATAF(-0.27888798713684082000)},

785 {_DATAF(0.96021664142608643000), _DATAF(-0.27925625443458557000)},

786 {_DATAF(0.96010947227478027000), _DATAF(-0.27962446212768555000)},

787 {_DATAF(0.96000212430953979000), _DATAF(-0.27999264001846313000)},

788 {_DATAF(0.95989471673965454000), _DATAF(-0.28036078810691833000)},

789 {_DATAF(0.95978713035583496000), _DATAF(-0.28072887659072876000)},

790 {_DATAF(0.95967936515808105000), _DATAF(-0.28109693527221680000)},

791 {_DATAF(0.95957154035568237000), _DATAF(-0.28146493434906006000)},

792 {_DATAF(0.95946347713470459000), _DATAF(-0.28183290362358093000)},

793 {_DATAF(0.95935535430908203000), _DATAF(-0.28220084309577942000)},

794 {_DATAF(0.95924705266952515000), _DATAF(-0.28256872296333313000)},

795 {_DATAF(0.95913863182067871000), _DATAF(-0.28293657302856445000)},

796 {_DATAF(0.95903003215789795000), _DATAF(-0.28330436348915100000)},

797 {_DATAF(0.95892131328582764000), _DATAF(-0.28367212414741516000)},

798 {_DATAF(0.95881247520446777000), _DATAF(-0.28403985500335693000)},

799 {_DATAF(0.95870345830917358000), _DATAF(-0.28440752625465393000)},

800 {_DATAF(0.95859432220458984000), _DATAF(-0.28477516770362854000)},

801 {_DATAF(0.95848506689071655000), _DATAF(-0.28514277935028076000)},

802 {_DATAF(0.95837563276290894000), _DATAF(-0.28551033139228821000)},

803 {_DATAF(0.95826607942581177000), _DATAF(-0.28587782382965088000)},

804 {_DATAF(0.95815634727478027000), _DATAF(-0.28624531626701355000)},

805 {_DATAF(0.95804649591445923000), _DATAF(-0.28661271929740906000)},

806 {_DATAF(0.95793652534484863000), _DATAF(-0.28698012232780457000)},

807 {_DATAF(0.95782643556594849000), _DATAF(-0.28734746575355530000)},

808 {_DATAF(0.95771616697311401000), _DATAF(-0.28771474957466125000)},

809 {_DATAF(0.95760571956634521000), _DATAF(-0.28808203339576721000)},

810 {_DATAF(0.95749521255493164000), _DATAF(-0.28844922780990601000)},

811 {_DATAF(0.95738452672958374000), _DATAF(-0.28881642222404480000)},

812 {_DATAF(0.95727366209030151000), _DATAF(-0.28918352723121643000)},

813 {_DATAF(0.95716267824172974000), _DATAF(-0.28955063223838806000)},

814 {_DATAF(0.95705157518386841000), _DATAF(-0.28991767764091492000)},

815 {_DATAF(0.95694035291671753000), _DATAF(-0.29028466343879700000)},

816 {_DATAF(0.95682895183563232000), _DATAF(-0.29065164923667908000)},

817 {_DATAF(0.95671743154525757000), _DATAF(-0.29101854562759399000)},

818 {_DATAF(0.95660573244094849000), _DATAF(-0.29138544201850891000)},

819 {_DATAF(0.95649391412734985000), _DATAF(-0.29175224900245667000)},

820 {_DATAF(0.95638197660446167000), _DATAF(-0.29211905598640442000)},

821 {_DATAF(0.95626986026763916000), _DATAF(-0.29248580336570740000)},

822 {_DATAF(0.95615762472152710000), _DATAF(-0.29285249114036560000)},

823 {_DATAF(0.95604526996612549000), _DATAF(-0.29321914911270142000)},

824 {_DATAF(0.95593273639678955000), _DATAF(-0.29358577728271484000)},

825 {_DATAF(0.95582008361816406000), _DATAF(-0.29395234584808350000)},

826 {_DATAF(0.95570725202560425000), _DATAF(-0.29431888461112976000)},

827 {_DATAF(0.95559436082839966000), _DATAF(-0.29468536376953125000)},

828 {_DATAF(0.95548123121261597000), _DATAF(-0.29505181312561035000)},

829 {_DATAF(0.95536804199218750000), _DATAF(-0.29541820287704468000)},

830 {_DATAF(0.95525467395782471000), _DATAF(-0.29578456282615662000)},

831 {_DATAF(0.95514118671417236000), _DATAF(-0.29615089297294617000)},

832 {_DATAF(0.95502752065658569000), _DATAF(-0.29651716351509094000)},

833 {_DATAF(0.95491373538970947000), _DATAF(-0.29688337445259094000)},

834 {_DATAF(0.95479983091354370000), _DATAF(-0.29724955558776855000)},

835 {_DATAF(0.95468574762344360000), _DATAF(-0.29761570692062378000)},

836 {_DATAF(0.95457154512405396000), _DATAF(-0.29798179864883423000)},

837 {_DATAF(0.95445722341537476000), _DATAF(-0.29834786057472229000)},

838 {_DATAF(0.95434272289276123000), _DATAF(-0.29871386289596558000)},

839 {_DATAF(0.95422810316085815000), _DATAF(-0.29907983541488647000)},

840 {_DATAF(0.95411330461502075000), _DATAF(-0.29944574832916260000)},

841 {_DATAF(0.95399844646453857000), _DATAF(-0.29981163144111633000)},

842 {_DATAF(0.95388334989547729000), _DATAF(-0.30017745494842529000)},

843 {_DATAF(0.95376819372177124000), _DATAF(-0.30054324865341187000)},

844 {_DATAF(0.95365285873413086000), _DATAF(-0.30090898275375366000)},

845 {_DATAF(0.95353740453720093000), _DATAF(-0.30127468705177307000)},

846 {_DATAF(0.95342177152633667000), _DATAF(-0.30164033174514771000)},

847 {_DATAF(0.95330601930618286000), _DATAF(-0.30200594663619995000)},

848 {_DATAF(0.95319014787673950000), _DATAF(-0.30237150192260742000)},

849 {_DATAF(0.95307409763336182000), _DATAF(-0.30273702740669250000)},

850 {_DATAF(0.95295792818069458000), _DATAF(-0.30310252308845520000)},

851 {_DATAF(0.95284163951873779000), _DATAF(-0.30346795916557312000)},

852 {_DATAF(0.95272517204284668000), _DATAF(-0.30383333563804626000)},

853 {_DATAF(0.95260858535766602000), _DATAF(-0.30419868230819702000)},

854 {_DATAF(0.95249187946319580000), _DATAF(-0.30456396937370300000)},

855 {_DATAF(0.95237499475479126000), _DATAF(-0.30492922663688660000)},

856 {_DATAF(0.95225799083709717000), _DATAF(-0.30529442429542542000)},

857 {_DATAF(0.95214086771011353000), _DATAF(-0.30565959215164185000)},

858 {_DATAF(0.95202356576919556000), _DATAF(-0.30602473020553589000)},

859 {_DATAF(0.95190614461898804000), _DATAF(-0.30638980865478516000)},

860 {_DATAF(0.95178854465484619000), _DATAF(-0.30675482749938965000)},

861 {_DATAF(0.95167088508605957000), _DATAF(-0.30711981654167175000)},

862 {_DATAF(0.95155298709869385000), _DATAF(-0.30748474597930908000)},

863 {_DATAF(0.95143502950668335000), _DATAF(-0.30784964561462402000)},

864 {_DATAF(0.95131689310073853000), _DATAF(-0.30821448564529419000)},

865 {_DATAF(0.95119863748550415000), _DATAF(-0.30857929587364197000)},

866 {_DATAF(0.95108020305633545000), _DATAF(-0.30894404649734497000)},

867 {_DATAF(0.95096164941787720000), _DATAF(-0.30930876731872559000)},

868 {_DATAF(0.95084297657012939000), _DATAF(-0.30967342853546143000)},

869 {_DATAF(0.95072412490844727000), _DATAF(-0.31003805994987488000)},

870 {_DATAF(0.95060515403747559000), _DATAF(-0.31040263175964355000)},

871 {_DATAF(0.95048606395721436000), _DATAF(-0.31076714396476746000)},

872 {_DATAF(0.95036685466766357000), _DATAF(-0.31113162636756897000)},

873 {_DATAF(0.95024746656417847000), _DATAF(-0.31149607896804810000)},

874 {_DATAF(0.95012789964675903000), _DATAF(-0.31186047196388245000)},

875 {_DATAF(0.95000827312469482000), _DATAF(-0.31222480535507202000)},

876 {_DATAF(0.94988846778869629000), _DATAF(-0.31258910894393921000)},

877 {_DATAF(0.94976848363876343000), _DATAF(-0.31295338273048401000)},

878 {_DATAF(0.94964838027954102000), _DATAF(-0.31331756711006165000)},

879 {_DATAF(0.94952815771102905000), _DATAF(-0.31368175148963928000)},

880 {_DATAF(0.94940781593322754000), _DATAF(-0.31404584646224976000)},

881 {_DATAF(0.94928729534149170000), _DATAF(-0.31440994143486023000)},

882 {_DATAF(0.94916665554046631000), _DATAF(-0.31477394700050354000)},

883 {_DATAF(0.94904589653015137000), _DATAF(-0.31513792276382446000)},

884 {_DATAF(0.94892495870590210000), _DATAF(-0.31550186872482300000)},

885 {_DATAF(0.94880390167236328000), _DATAF(-0.31586575508117676000)},

886 {_DATAF(0.94868266582489014000), _DATAF(-0.31622958183288574000)},

887 {_DATAF(0.94856137037277222000), _DATAF(-0.31659337878227234000)},

888 {_DATAF(0.94843989610671997000), _DATAF(-0.31695711612701416000)},

889 {_DATAF(0.94831824302673340000), _DATAF(-0.31732082366943359000)},

890 {_DATAF(0.94819647073745728000), _DATAF(-0.31768447160720825000)},

891 {_DATAF(0.94807457923889160000), _DATAF(-0.31804808974266052000)},

892 {_DATAF(0.94795256853103638000), _DATAF(-0.31841164827346802000)},

893 {_DATAF(0.94783037900924683000), _DATAF(-0.31877514719963074000)},

894 {_DATAF(0.94770807027816772000), _DATAF(-0.31913861632347107000)},

895 {_DATAF(0.94758558273315430000), _DATAF(-0.31950202584266663000)},

896 {_DATAF(0.94746297597885132000), _DATAF(-0.31986540555953979000)},

897 {_DATAF(0.94734025001525879000), _DATAF(-0.32022872567176819000)},

898 {_DATAF(0.94721740484237671000), _DATAF(-0.32059201598167419000)},

899 {_DATAF(0.94709438085556030000), _DATAF(-0.32095524668693542000)},

900 {_DATAF(0.94697123765945435000), _DATAF(-0.32131841778755188000)},

901 {_DATAF(0.94684791564941406000), _DATAF(-0.32168155908584595000)},

902 {_DATAF(0.94672447443008423000), _DATAF(-0.32204464077949524000)},

903 {_DATAF(0.94660091400146484000), _DATAF(-0.32240769267082214000)},

904 {_DATAF(0.94647717475891113000), _DATAF(-0.32277068495750427000)},

905 {_DATAF(0.94635337591171265000), _DATAF(-0.32313361763954163000)},

906 {_DATAF(0.94622933864593506000), _DATAF(-0.32349652051925659000)},

907 {_DATAF(0.94610524177551270000), _DATAF(-0.32385936379432678000)},

908 {_DATAF(0.94598096609115601000), _DATAF(-0.32422217726707458000)},

909 {_DATAF(0.94585657119750977000), _DATAF(-0.32458493113517761000)},

910 {_DATAF(0.94573199748992920000), _DATAF(-0.32494762539863586000)},

911 {_DATAF(0.94560730457305908000), _DATAF(-0.32531028985977173000)},

912 {_DATAF(0.94548249244689941000), _DATAF(-0.32567289471626282000)},

913 {_DATAF(0.94535756111145020000), _DATAF(-0.32603546977043152000)},

914 {_DATAF(0.94523245096206665000), _DATAF(-0.32639798521995544000)},

915 {_DATAF(0.94510722160339355000), _DATAF(-0.32676044106483459000)},

916 {_DATAF(0.94498181343078613000), _DATAF(-0.32712286710739136000)},

917 {_DATAF(0.94485628604888916000), _DATAF(-0.32748523354530334000)},

918 {_DATAF(0.94473063945770264000), _DATAF(-0.32784757018089294000)},

919 {_DATAF(0.94460481405258179000), _DATAF(-0.32820984721183777000)},

920 {_DATAF(0.94447892904281616000), _DATAF(-0.32857206463813782000)},

921 {_DATAF(0.94435280561447144000), _DATAF(-0.32893425226211548000)},

922 {_DATAF(0.94422662258148193000), _DATAF(-0.32929638028144836000)},

923 {_DATAF(0.94410026073455811000), _DATAF(-0.32965844869613647000)},

924 {_DATAF(0.94397377967834473000), _DATAF(-0.33002048730850220000)},

925 {_DATAF(0.94384711980819702000), _DATAF(-0.33038249611854553000)},

926 {_DATAF(0.94372034072875977000), _DATAF(-0.33074441552162170000)},

927 {_DATAF(0.94359344244003296000), _DATAF(-0.33110630512237549000)},

928 {_DATAF(0.94346642494201660000), _DATAF(-0.33146813511848450000)},

929 {_DATAF(0.94333922863006592000), _DATAF(-0.33182993531227112000)},

930 {_DATAF(0.94321191310882568000), _DATAF(-0.33219167590141296000)},

931 {_DATAF(0.94308441877365112000), _DATAF(-0.33255335688591003000)},

932 {_DATAF(0.94295686483383179000), _DATAF(-0.33291500806808472000)},

933 {_DATAF(0.94282907247543335000), _DATAF(-0.33327659964561462000)},

934 {_DATAF(0.94270122051239014000), _DATAF(-0.33363816142082214000)},

935 {_DATAF(0.94257318973541260000), _DATAF(-0.33399966359138489000)},

936 {_DATAF(0.94244503974914551000), _DATAF(-0.33436110615730286000)},

937 {_DATAF(0.94231677055358887000), _DATAF(-0.33472248911857605000)},

938 {_DATAF(0.94218832254409790000), _DATAF(-0.33508384227752686000)},

939 {_DATAF(0.94205975532531738000), _DATAF(-0.33544513583183289000)},

940 {_DATAF(0.94193100929260254000), _DATAF(-0.33580639958381653000)},

941 {_DATAF(0.94180220365524292000), _DATAF(-0.33616760373115540000)},

942 {_DATAF(0.94167321920394897000), _DATAF(-0.33652874827384949000)},

943 {_DATAF(0.94154405593872070000), _DATAF(-0.33688986301422119000)},

944 {_DATAF(0.94141477346420288000), _DATAF(-0.33725091814994812000)},

945 {_DATAF(0.94128537178039551000), _DATAF(-0.33761191368103027000)},

946 {_DATAF(0.94115585088729858000), _DATAF(-0.33797284960746765000)},

947 {_DATAF(0.94102615118026733000), _DATAF(-0.33833375573158264000)},

948 {_DATAF(0.94089633226394653000), _DATAF(-0.33869463205337524000)},

949 {_DATAF(0.94076639413833618000), _DATAF(-0.33905541896820068000)},

950 {_DATAF(0.94063627719879150000), _DATAF(-0.33941617608070374000)},

951 {_DATAF(0.94050604104995728000), _DATAF(-0.33977687358856201000)},

952 {_DATAF(0.94037568569183350000), _DATAF(-0.34013754129409790000)},

953 {_DATAF(0.94024521112442017000), _DATAF(-0.34049814939498901000)},

954 {_DATAF(0.94011455774307251000), _DATAF(-0.34085869789123535000)},

955 {_DATAF(0.93998372554779053000), _DATAF(-0.34121921658515930000)},

956 {_DATAF(0.93985283374786377000), _DATAF(-0.34157964587211609000)},

957 {_DATAF(0.93972176313400269000), _DATAF(-0.34194007515907288000)},

958 {_DATAF(0.93959057331085205000), _DATAF(-0.34230041503906250000)},

959 {_DATAF(0.93945920467376709000), _DATAF(-0.34266072511672974000)},

960 {_DATAF(0.93932771682739258000), _DATAF(-0.34302097558975220000)},

961 {_DATAF(0.93919610977172852000), _DATAF(-0.34338116645812988000)},

962 {_DATAF(0.93906438350677490000), _DATAF(-0.34374132752418518000)},

963 {_DATAF(0.93893247842788696000), _DATAF(-0.34410142898559570000)},

964 {_DATAF(0.93880045413970947000), _DATAF(-0.34446147084236145000)},

965 {_DATAF(0.93866831064224243000), _DATAF(-0.34482148289680481000)},

966 {_DATAF(0.93853598833084106000), _DATAF(-0.34518143534660339000)},

967 {_DATAF(0.93840354681015015000), _DATAF(-0.34554132819175720000)},

968 {_DATAF(0.93827092647552490000), _DATAF(-0.34590116143226624000)},

969 {_DATAF(0.93813824653625488000), _DATAF(-0.34626096487045288000)},

970 {_DATAF(0.93800538778305054000), _DATAF(-0.34662070870399475000)},

971 {_DATAF(0.93787235021591187000), _DATAF(-0.34698042273521423000)},

972 {_DATAF(0.93773925304412842000), _DATAF(-0.34734004735946655000)},

973 {_DATAF(0.93760597705841064000), _DATAF(-0.34769964218139648000)},

974 {_DATAF(0.93747258186340332000), _DATAF(-0.34805917739868164000)},

975 {_DATAF(0.93733900785446167000), _DATAF(-0.34841868281364441000)},

976 {_DATAF(0.93720531463623047000), _DATAF(-0.34877812862396240000)},

977 {_DATAF(0.93707150220870972000), _DATAF(-0.34913751482963562000)},

978 {_DATAF(0.93693757057189941000), _DATAF(-0.34949684143066406000)},

979 {_DATAF(0.93680346012115479000), _DATAF(-0.34985613822937012000)},

980 {_DATAF(0.93666923046112061000), _DATAF(-0.35021537542343140000)},

981 {_DATAF(0.93653482198715210000), _DATAF(-0.35057455301284790000)},

982 {_DATAF(0.93640029430389404000), _DATAF(-0.35093367099761963000)},

983 {_DATAF(0.93626564741134644000), _DATAF(-0.35129275918006897000)},

984 {_DATAF(0.93613088130950928000), _DATAF(-0.35165178775787354000)},

985 {_DATAF(0.93599593639373779000), _DATAF(-0.35201075673103333000)},

986 {_DATAF(0.93586087226867676000), _DATAF(-0.35236969590187073000)},

987 {_DATAF(0.93572568893432617000), _DATAF(-0.35272854566574097000)},

988 {_DATAF(0.93559032678604126000), _DATAF(-0.35308736562728882000)},

989 {_DATAF(0.93545484542846680000), _DATAF(-0.35344615578651428000)},

990 {_DATAF(0.93531924486160278000), _DATAF(-0.35380485653877258000)},

991 {_DATAF(0.93518352508544922000), _DATAF(-0.35416352748870850000)},

992 {_DATAF(0.93504762649536133000), _DATAF(-0.35452213883399963000)},

993 {_DATAF(0.93491160869598389000), _DATAF(-0.35488069057464600000)},

994 {_DATAF(0.93477541208267212000), _DATAF(-0.35523921251296997000)},

995 {_DATAF(0.93463915586471558000), _DATAF(-0.35559767484664917000)},

996 {_DATAF(0.93450272083282471000), _DATAF(-0.35595607757568359000)},

997 {_DATAF(0.93436610698699951000), _DATAF(-0.35631442070007324000)},

998 {_DATAF(0.93422937393188477000), _DATAF(-0.35667270421981812000)},

999 {_DATAF(0.93409252166748047000), _DATAF(-0.35703095793724060000)},

1000 {_DATAF(0.93395555019378662000), _DATAF(-0.35738915205001831000)},

1001 {_DATAF(0.93381845951080322000), _DATAF(-0.35774728655815125000)},

1002 {_DATAF(0.93368119001388550000), _DATAF(-0.35810539126396179000)},

1003 {_DATAF(0.93354380130767822000), _DATAF(-0.35846340656280518000)},

1004 {_DATAF(0.93340623378753662000), _DATAF(-0.35882139205932617000)},

1005 {_DATAF(0.93326854705810547000), _DATAF(-0.35917934775352478000)},

1006 {_DATAF(0.93313074111938477000), _DATAF(-0.35953721404075623000)},

1007 {_DATAF(0.93299281597137451000), _DATAF(-0.35989505052566528000)},

1008 {_DATAF(0.93285471200942993000), _DATAF(-0.36025279760360718000)},

1009 {_DATAF(0.93271648883819580000), _DATAF(-0.36061051487922668000)},

1010 {_DATAF(0.93257814645767212000), _DATAF(-0.36096820235252380000)},

1011 {_DATAF(0.93243962526321411000), _DATAF(-0.36132580041885376000)},

1012 {_DATAF(0.93230098485946655000), _DATAF(-0.36168336868286133000)},

1013 {_DATAF(0.93216222524642944000), _DATAF(-0.36204087734222412000)},

1014 {_DATAF(0.93202328681945801000), _DATAF(-0.36239832639694214000)},

1015 {_DATAF(0.93188428878784180000), _DATAF(-0.36275571584701538000)},

1016 {_DATAF(0.93174505233764648000), _DATAF(-0.36311307549476624000)},

1017 {_DATAF(0.93160575628280640000), _DATAF(-0.36347037553787231000)},

1018 {_DATAF(0.93146628141403198000), _DATAF(-0.36382761597633362000)},

1019 {_DATAF(0.93132668733596802000), _DATAF(-0.36418479681015015000)},

1020 {_DATAF(0.93118697404861450000), _DATAF(-0.36454191803932190000)},

1021 {_DATAF(0.93104708194732666000), _DATAF(-0.36489900946617126000)},

1022 {_DATAF(0.93090713024139404000), _DATAF(-0.36525601148605347000)},

1023 {_DATAF(0.93076694011688232000), _DATAF(-0.36561298370361328000)},

1024 {_DATAF(0.93062669038772583000), _DATAF(-0.36596992611885071000)},

1025 {_DATAF(0.93048626184463501000), _DATAF(-0.36632677912712097000)},

1026 {_DATAF(0.93034571409225464000), _DATAF(-0.36668360233306885000)},

1027 {_DATAF(0.93020504713058472000), _DATAF(-0.36704033613204956000)},

1028 {_DATAF(0.93006420135498047000), _DATAF(-0.36739704012870789000)},

1029 {_DATAF(0.92992323637008667000), _DATAF(-0.36775368452072144000)},

1030 {_DATAF(0.92978215217590332000), _DATAF(-0.36811029911041260000)},

1031 {_DATAF(0.92964088916778564000), _DATAF(-0.36846682429313660000)},

1032 {_DATAF(0.92949950695037842000), _DATAF(-0.36882331967353821000)},

1033 {_DATAF(0.92935800552368164000), _DATAF(-0.36917975544929504000)},

1034 {_DATAF(0.92921638488769531000), _DATAF(-0.36953613162040710000)},

1035 {_DATAF(0.92907458543777466000), _DATAF(-0.36989244818687439000)},

1036 {_DATAF(0.92893266677856445000), _DATAF(-0.37024870514869690000)},

1037 {_DATAF(0.92879062891006470000), _DATAF(-0.37060493230819702000)},

1038 {_DATAF(0.92864841222763062000), _DATAF(-0.37096109986305237000)},

1039 {_DATAF(0.92850607633590698000), _DATAF(-0.37131720781326294000)},

1040 {_DATAF(0.92836362123489380000), _DATAF(-0.37167325615882874000)},

1041 {_DATAF(0.92822098731994629000), _DATAF(-0.37202924489974976000)},

1042 {_DATAF(0.92807829380035400000), _DATAF(-0.37238517403602600000)},

1043 {_DATAF(0.92793542146682739000), _DATAF(-0.37274107336997986000)},

1044 {_DATAF(0.92779237031936646000), _DATAF(-0.37309691309928894000)},

1045 {_DATAF(0.92764925956726074000), _DATAF(-0.37345266342163086000)},

1046 {_DATAF(0.92750597000122070000), _DATAF(-0.37380838394165039000)},

1047 {_DATAF(0.92736250162124634000), _DATAF(-0.37416407465934753000)},

1048 {_DATAF(0.92721897363662720000), _DATAF(-0.37451967597007751000)},

1049 {_DATAF(0.92707526683807373000), _DATAF(-0.37487521767616272000)},

1050 {_DATAF(0.92693144083023071000), _DATAF(-0.37523072957992554000)},

1051 {_DATAF(0.92678749561309814000), _DATAF(-0.37558618187904358000)},

1052 {_DATAF(0.92664337158203125000), _DATAF(-0.37594157457351685000)},

1053 {_DATAF(0.92649912834167480000), _DATAF(-0.37629690766334534000)},

1054 {_DATAF(0.92635476589202881000), _DATAF(-0.37665218114852905000)},

1055 {_DATAF(0.92621022462844849000), _DATAF(-0.37700742483139038000)},

1056 {_DATAF(0.92606556415557861000), _DATAF(-0.37736257910728455000)},

1057 {_DATAF(0.92592078447341919000), _DATAF(-0.37771770358085632000)},

1058 {_DATAF(0.92577588558197021000), _DATAF(-0.37807273864746094000)},

1059 {_DATAF(0.92563080787658691000), _DATAF(-0.37842774391174316000)},

1060 {_DATAF(0.92548561096191406000), _DATAF(-0.37878268957138062000)},

1061 {_DATAF(0.92534029483795166000), _DATAF(-0.37913760542869568000)},

1062 {_DATAF(0.92519485950469971000), _DATAF(-0.37949243187904358000)},

1063 {_DATAF(0.92504924535751343000), _DATAF(-0.37984719872474670000)},

1064 {_DATAF(0.92490351200103760000), _DATAF(-0.38020193576812744000)},

1065 {_DATAF(0.92475759983062744000), _DATAF(-0.38055661320686340000)},

1066 {_DATAF(0.92461162805557251000), _DATAF(-0.38091120123863220000)},

1067 {_DATAF(0.92446547746658325000), _DATAF(-0.38126575946807861000)},

1068 {_DATAF(0.92431920766830444000), _DATAF(-0.38162025809288025000)},

1069 {_DATAF(0.92417275905609131000), _DATAF(-0.38197472691535950000)},

1070 {_DATAF(0.92402625083923340000), _DATAF(-0.38232910633087158000)},

1071 {_DATAF(0.92387950420379639000), _DATAF(-0.38268342614173889000)},

1072 {_DATAF(0.92373269796371460000), _DATAF(-0.38303771615028381000)},

1073 {_DATAF(0.92358577251434326000), _DATAF(-0.38339191675186157000)},

1074 {_DATAF(0.92343866825103760000), _DATAF(-0.38374608755111694000)},

1075 {_DATAF(0.92329144477844238000), _DATAF(-0.38410019874572754000)},

1076 {_DATAF(0.92314404249191284000), _DATAF(-0.38445425033569336000)},

1077 {_DATAF(0.92299652099609375000), _DATAF(-0.38480824232101440000)},

1078 {_DATAF(0.92284888029098511000), _DATAF(-0.38516217470169067000)},

1079 {_DATAF(0.92270112037658691000), _DATAF(-0.38551604747772217000)},

1080 {_DATAF(0.92255324125289917000), _DATAF(-0.38586989045143127000)},

1081 {_DATAF(0.92240518331527710000), _DATAF(-0.38622364401817322000)},

1082 {_DATAF(0.92225700616836548000), _DATAF(-0.38657733798027039000)},

1083 {_DATAF(0.92210865020751953000), _DATAF(-0.38693100214004517000)},

1084 {_DATAF(0.92196023464202881000), _DATAF(-0.38728460669517517000)},

1085 {_DATAF(0.92181164026260376000), _DATAF(-0.38763815164566040000)},

1086 {_DATAF(0.92166292667388916000), _DATAF(-0.38799160718917847000)},

1087 {_DATAF(0.92151403427124023000), _DATAF(-0.38834503293037415000)},

1088 {_DATAF(0.92136502265930176000), _DATAF(-0.38869842886924744000)},

1089 {_DATAF(0.92121589183807373000), _DATAF(-0.38905173540115356000)},

1090 {_DATAF(0.92106664180755615000), _DATAF(-0.38940498232841492000)},

1091 {_DATAF(0.92091721296310425000), _DATAF(-0.38975816965103149000)},

1092 {_DATAF(0.92076772451400757000), _DATAF(-0.39011132717132568000)},

1093 {_DATAF(0.92061805725097656000), _DATAF(-0.39046439528465271000)},

1094 {_DATAF(0.92046821117401123000), _DATAF(-0.39081740379333496000)},

1095 {_DATAF(0.92031830549240112000), _DATAF(-0.39117038249969482000)},

1096 {_DATAF(0.92016822099685669000), _DATAF(-0.39152330160140991000)},

1097 {_DATAF(0.92001795768737793000), _DATAF(-0.39187613129615784000)},

1098 {_DATAF(0.91986763477325439000), _DATAF(-0.39222893118858337000)},

1099 {_DATAF(0.91971713304519653000), _DATAF(-0.39258167147636414000)},

1100 {_DATAF(0.91956651210784912000), _DATAF(-0.39293435215950012000)},

1101 {_DATAF(0.91941577196121216000), _DATAF(-0.39328697323799133000)},

1102 {_DATAF(0.91926485300064087000), _DATAF(-0.39363953471183777000)},

1103 {_DATAF(0.91911387443542480000), _DATAF(-0.39399203658103943000)},

1104 {_DATAF(0.91896271705627441000), _DATAF(-0.39434447884559631000)},

1105 {_DATAF(0.91881138086318970000), _DATAF(-0.39469686150550842000)},

1106 {_DATAF(0.91865998506546021000), _DATAF(-0.39504921436309814000)},

1107 {_DATAF(0.91850841045379639000), _DATAF(-0.39540147781372070000)},

1108 {_DATAF(0.91835671663284302000), _DATAF(-0.39575368165969849000)},

1109 {_DATAF(0.91820484399795532000), _DATAF(-0.39610585570335388000)},

1110 {_DATAF(0.91805291175842285000), _DATAF(-0.39645794034004211000)},

1111 {_DATAF(0.91790080070495605000), _DATAF(-0.39680999517440796000)},

1112 {_DATAF(0.91774851083755493000), _DATAF(-0.39716196060180664000)},

1113 {_DATAF(0.91759616136550903000), _DATAF(-0.39751389622688293000)},

1114 {_DATAF(0.91744363307952881000), _DATAF(-0.39786574244499207000)},

1115 {_DATAF(0.91729098558425903000), _DATAF(-0.39821755886077881000)},

1116 {_DATAF(0.91713821887969971000), _DATAF(-0.39856931567192078000)},

1117 {_DATAF(0.91698527336120605000), _DATAF(-0.39892101287841797000)},

1118 {_DATAF(0.91683226823806763000), _DATAF(-0.39927262067794800000)},

1119 {_DATAF(0.91667908430099487000), _DATAF(-0.39962419867515564000)},

1120 {_DATAF(0.91652572154998779000), _DATAF(-0.39997571706771851000)},

1121 {_DATAF(0.91637229919433594000), _DATAF(-0.40032717585563660000)},

1122 {_DATAF(0.91621869802474976000), _DATAF(-0.40067857503890991000)},

1123 {_DATAF(0.91606497764587402000), _DATAF(-0.40102988481521606000)},

1124 {_DATAF(0.91591107845306396000), _DATAF(-0.40138116478919983000)},

1125 {_DATAF(0.91575711965560913000), _DATAF(-0.40173238515853882000)},

1126 {_DATAF(0.91560298204421997000), _DATAF(-0.40208354592323303000)},

1127 {_DATAF(0.91544872522354126000), _DATAF(-0.40243464708328247000)},

1128 {_DATAF(0.91529428958892822000), _DATAF(-0.40278568863868713000)},

1129 {_DATAF(0.91513979434967041000), _DATAF(-0.40313667058944702000)},

1130 {_DATAF(0.91498512029647827000), _DATAF(-0.40348759293556213000)},

1131 {_DATAF(0.91483032703399658000), _DATAF(-0.40383845567703247000)},

1132 {_DATAF(0.91467535495758057000), _DATAF(-0.40418925881385803000)},

1133 {_DATAF(0.91452032327651978000), _DATAF(-0.40454000234603882000)},

1134 {_DATAF(0.91436511278152466000), _DATAF(-0.40489068627357483000)},

1135 {_DATAF(0.91420978307723999000), _DATAF(-0.40524131059646606000)},

1136 {_DATAF(0.91405427455902100000), _DATAF(-0.40559187531471252000)},

1137 {_DATAF(0.91389864683151245000), _DATAF(-0.40594238042831421000)},

1138 {_DATAF(0.91374289989471436000), _DATAF(-0.40629282593727112000)},

1139 {_DATAF(0.91358703374862671000), _DATAF(-0.40664321184158325000)},

1140 {_DATAF(0.91343104839324951000), _DATAF(-0.40699353814125061000)},

1141 {_DATAF(0.91327488422393799000), _DATAF(-0.40734380483627319000)},

1142 {_DATAF(0.91311860084533691000), _DATAF(-0.40769401192665100000)},

1143 {_DATAF(0.91296219825744629000), _DATAF(-0.40804415941238403000)},

1144 {_DATAF(0.91280561685562134000), _DATAF(-0.40839424729347229000)},

1145 {_DATAF(0.91264897584915161000), _DATAF(-0.40874427556991577000)},

1146 {_DATAF(0.91249215602874756000), _DATAF(-0.40909424424171448000)},

1147 {_DATAF(0.91233515739440918000), _DATAF(-0.40944415330886841000)},

1148 {_DATAF(0.91217809915542603000), _DATAF(-0.40979400277137756000)},

1149 {_DATAF(0.91202086210250854000), _DATAF(-0.41014379262924194000)},

1150 {_DATAF(0.91186350584030151000), _DATAF(-0.41049349308013916000)},

1151 {_DATAF(0.91170603036880493000), _DATAF(-0.41084316372871399000)},

1152 {_DATAF(0.91154843568801880000), _DATAF(-0.41119277477264404000)},

1153 {_DATAF(0.91139066219329834000), _DATAF(-0.41154232621192932000)},

1154 {_DATAF(0.91123276948928833000), _DATAF(-0.41189181804656982000)},

1155 {_DATAF(0.91107475757598877000), _DATAF(-0.41224122047424316000)},

1156 {_DATAF(0.91091656684875488000), _DATAF(-0.41259059309959412000)},

1157 {_DATAF(0.91075825691223145000), _DATAF(-0.41293987631797791000)},

1158 {_DATAF(0.91059982776641846000), _DATAF(-0.41328912973403931000)},

1159 {_DATAF(0.91044127941131592000), _DATAF(-0.41363832354545593000)},

1160 {_DATAF(0.91028261184692383000), _DATAF(-0.41398742794990540000)},

1161 {_DATAF(0.91012376546859741000), _DATAF(-0.41433650255203247000)},

1162 {_DATAF(0.90996479988098145000), _DATAF(-0.41468548774719238000)},

1163 {_DATAF(0.90980571508407593000), _DATAF(-0.41503441333770752000)},

1164 {_DATAF(0.90964645147323608000), _DATAF(-0.41538330912590027000)},

1165 {_DATAF(0.90948712825775146000), _DATAF(-0.41573211550712585000)},

1166 {_DATAF(0.90932762622833252000), _DATAF(-0.41608086228370667000)},

1167 {_DATAF(0.90916800498962402000), _DATAF(-0.41642954945564270000)},

1168 {_DATAF(0.90900820493698120000), _DATAF(-0.41677817702293396000)},

1169 {_DATAF(0.90884834527969360000), _DATAF(-0.41712677478790283000)},

1170 {_DATAF(0.90868830680847168000), _DATAF(-0.41747528314590454000)},

1171 {_DATAF(0.90852808952331543000), _DATAF(-0.41782370209693909000)},

1172 {_DATAF(0.90836781263351440000), _DATAF(-0.41817209124565125000)},

1173 {_DATAF(0.90820735692977905000), _DATAF(-0.41852042078971863000)},

1174 {_DATAF(0.90804684162139893000), _DATAF(-0.41886869072914124000)},

1175 {_DATAF(0.90788608789443970000), _DATAF(-0.41921690106391907000)},

1176 {_DATAF(0.90772527456283569000), _DATAF(-0.41956502199172974000)},

1177 {_DATAF(0.90756434202194214000), _DATAF(-0.41991311311721802000)},

1178 {_DATAF(0.90740323066711426000), _DATAF(-0.42026111483573914000)},

1179 {_DATAF(0.90724200010299683000), _DATAF(-0.42060908675193787000)},

1180 {_DATAF(0.90708059072494507000), _DATAF(-0.42095696926116943000)},

1181 {_DATAF(0.90691912174224854000), _DATAF(-0.42130479216575623000)},

1182 {_DATAF(0.90675747394561768000), _DATAF(-0.42165255546569824000)},

1183 {_DATAF(0.90659570693969727000), _DATAF(-0.42200025916099548000)},

1184 {_DATAF(0.90643382072448730000), _DATAF(-0.42234790325164795000)},

1185 {_DATAF(0.90627175569534302000), _DATAF(-0.42269548773765564000)},

1186 {_DATAF(0.90610957145690918000), _DATAF(-0.42304301261901855000)},

1187 {_DATAF(0.90594726800918579000), _DATAF(-0.42339047789573669000)},

1188 {_DATAF(0.90578484535217285000), _DATAF(-0.42373788356781006000)},

1189 {_DATAF(0.90562230348587036000), _DATAF(-0.42408519983291626000)},

1190 {_DATAF(0.90545958280563354000), _DATAF(-0.42443248629570007000)},

1191 {_DATAF(0.90529674291610718000), _DATAF(-0.42477968335151672000)},

1192 {_DATAF(0.90513378381729126000), _DATAF(-0.42512682080268860000)},

1193 {_DATAF(0.90497070550918579000), _DATAF(-0.42547389864921570000)},

1194 {_DATAF(0.90480744838714600000), _DATAF(-0.42582091689109802000)},

1195 {_DATAF(0.90464407205581665000), _DATAF(-0.42616787552833557000)},

1196 {_DATAF(0.90448057651519775000), _DATAF(-0.42651477456092834000)},

1197 {_DATAF(0.90431696176528931000), _DATAF(-0.42686161398887634000)},

1198 {_DATAF(0.90415316820144653000), _DATAF(-0.42720839381217957000)},

1199 {_DATAF(0.90398931503295898000), _DATAF(-0.42755508422851563000)},

1200 {_DATAF(0.90382528305053711000), _DATAF(-0.42790174484252930000)},

1201 {_DATAF(0.90366107225418091000), _DATAF(-0.42824831604957581000)},

1202 {_DATAF(0.90349680185317993000), _DATAF(-0.42859482765197754000)},

1203 {_DATAF(0.90333235263824463000), _DATAF(-0.42894127964973450000)},

1204 {_DATAF(0.90316778421401978000), _DATAF(-0.42928767204284668000)},

1205 {_DATAF(0.90300309658050537000), _DATAF(-0.42963400483131409000)},

1206 {_DATAF(0.90283828973770142000), _DATAF(-0.42998027801513672000)},

1207 {_DATAF(0.90267330408096313000), _DATAF(-0.43032649159431458000)},

1208 {_DATAF(0.90250819921493530000), _DATAF(-0.43067261576652527000)},

1209 {_DATAF(0.90234297513961792000), _DATAF(-0.43101871013641357000)},

1210 {_DATAF(0.90217763185501099000), _DATAF(-0.43136471509933472000)},

1211 {_DATAF(0.90201216936111450000), _DATAF(-0.43171066045761108000)},

1212 {_DATAF(0.90184652805328369000), _DATAF(-0.43205654621124268000)},

1213 {_DATAF(0.90168076753616333000), _DATAF(-0.43240237236022949000)},

1214 {_DATAF(0.90151488780975342000), _DATAF(-0.43274813890457153000)},

1215 {_DATAF(0.90134882926940918000), _DATAF(-0.43309381604194641000)},

1216 {_DATAF(0.90118271112442017000), _DATAF(-0.43343946337699890000)},

1217 {_DATAF(0.90101641416549683000), _DATAF(-0.43378502130508423000)},

1218 {_DATAF(0.90084999799728394000), _DATAF(-0.43413051962852478000)},

1219 {_DATAF(0.90068340301513672000), _DATAF(-0.43447595834732056000)},

1220 {_DATAF(0.90051674842834473000), _DATAF(-0.43482133746147156000)},

1221 {_DATAF(0.90034991502761841000), _DATAF(-0.43516665697097778000)},

1222 {_DATAF(0.90018296241760254000), _DATAF(-0.43551188707351685000)},

1223 {_DATAF(0.90001589059829712000), _DATAF(-0.43585708737373352000)},

1224 {_DATAF(0.89984869956970215000), _DATAF(-0.43620219826698303000)},

1225 {_DATAF(0.89968132972717285000), _DATAF(-0.43654724955558777000)},

1226 {_DATAF(0.89951384067535400000), _DATAF(-0.43689224123954773000)},

1227 {_DATAF(0.89934623241424561000), _DATAF(-0.43723717331886292000)},

1228 {_DATAF(0.89917850494384766000), _DATAF(-0.43758204579353333000)},

1229 {_DATAF(0.89901059865951538000), _DATAF(-0.43792682886123657000)},

1230 {_DATAF(0.89884263277053833000), _DATAF(-0.43827158212661743000)},

1231 {_DATAF(0.89867448806762695000), _DATAF(-0.43861624598503113000)},

1232 {_DATAF(0.89850616455078125000), _DATAF(-0.43896085023880005000)},

1233 {_DATAF(0.89833778142929077000), _DATAF(-0.43930539488792419000)},

1234 {_DATAF(0.89816927909851074000), _DATAF(-0.43964985013008118000)},

1235 {_DATAF(0.89800059795379639000), _DATAF(-0.43999427556991577000)},

1236 {_DATAF(0.89783179759979248000), _DATAF(-0.44033861160278320000)},

1237 {_DATAF(0.89766281843185425000), _DATAF(-0.44068288803100586000)},

1238 {_DATAF(0.89749377965927124000), _DATAF(-0.44102710485458374000)},

1239 {_DATAF(0.89732456207275391000), _DATAF(-0.44137126207351685000)},

1240 {_DATAF(0.89715522527694702000), _DATAF(-0.44171535968780518000)},

1241 {_DATAF(0.89698576927185059000), _DATAF(-0.44205936789512634000)},

1242 {_DATAF(0.89681619405746460000), _DATAF(-0.44240334630012512000)},

1243 {_DATAF(0.89664649963378906000), _DATAF(-0.44274723529815674000)},

1244 {_DATAF(0.89647662639617920000), _DATAF(-0.44309106469154358000)},

1245 {_DATAF(0.89630663394927979000), _DATAF(-0.44343480467796326000)},

1246 {_DATAF(0.89613652229309082000), _DATAF(-0.44377851486206055000)},

1247 {_DATAF(0.89596623182296753000), _DATAF(-0.44412213563919067000)},

1248 {_DATAF(0.89579588174819946000), _DATAF(-0.44446569681167603000)},

1249 {_DATAF(0.89562535285949707000), _DATAF(-0.44480919837951660000)},

1250 {_DATAF(0.89545470476150513000), _DATAF(-0.44515264034271240000)},

1251 {_DATAF(0.89528393745422363000), _DATAF(-0.44549602270126343000)},

1252 {_DATAF(0.89511299133300781000), _DATAF(-0.44583931565284729000)},

1253 {_DATAF(0.89494198560714722000), _DATAF(-0.44618254899978638000)},

1254 {_DATAF(0.89477080106735229000), _DATAF(-0.44652572274208069000)},

1255 {_DATAF(0.89459949731826782000), _DATAF(-0.44686883687973022000)},

1256 {_DATAF(0.89442807435989380000), _DATAF(-0.44721189141273499000)},

1257 {_DATAF(0.89425647258758545000), _DATAF(-0.44755485653877258000)},

1258 {_DATAF(0.89408475160598755000), _DATAF(-0.44789776206016541000)},

1259 {_DATAF(0.89391297101974487000), _DATAF(-0.44824060797691345000)},

1260 {_DATAF(0.89374095201492310000), _DATAF(-0.44858339428901672000)},

1261 {_DATAF(0.89356887340545654000), _DATAF(-0.44892609119415283000)},

1262 {_DATAF(0.89339667558670044000), _DATAF(-0.44926875829696655000)},

1263 {_DATAF(0.89322429895401001000), _DATAF(-0.44961133599281311000)},

1264 {_DATAF(0.89305180311203003000), _DATAF(-0.44995385408401489000)},

1265 {_DATAF(0.89287918806076050000), _DATAF(-0.45029628276824951000)},

1266 {_DATAF(0.89270645380020142000), _DATAF(-0.45063868165016174000)},

1267 {_DATAF(0.89253354072570801000), _DATAF(-0.45098099112510681000)},

1268 {_DATAF(0.89236056804656982000), _DATAF(-0.45132324099540710000)},

1269 {_DATAF(0.89218741655349731000), _DATAF(-0.45166543126106262000)},

1270 {_DATAF(0.89201414585113525000), _DATAF(-0.45200753211975098000)},

1271 {_DATAF(0.89184069633483887000), _DATAF(-0.45234957337379456000)},

1272 {_DATAF(0.89166718721389771000), _DATAF(-0.45269158482551575000)},

1273 {_DATAF(0.89149349927902222000), _DATAF(-0.45303347706794739000)},

1274 {_DATAF(0.89131969213485718000), _DATAF(-0.45337533950805664000)},

1275 {_DATAF(0.89114576578140259000), _DATAF(-0.45371711254119873000)},

1276 {_DATAF(0.89097172021865845000), _DATAF(-0.45405882596969604000)},

1277 {_DATAF(0.89079749584197998000), _DATAF(-0.45440047979354858000)},

1278 {_DATAF(0.89062315225601196000), _DATAF(-0.45474207401275635000)},

1279 {_DATAF(0.89044874906539917000), _DATAF(-0.45508357882499695000)},

1280 {_DATAF(0.89027410745620728000), _DATAF(-0.45542502403259277000)},

1281 {_DATAF(0.89009940624237061000), _DATAF(-0.45576640963554382000)},

1282 {_DATAF(0.88992458581924438000), _DATAF(-0.45610773563385010000)},

1283 {_DATAF(0.88974958658218384000), _DATAF(-0.45644897222518921000)},

1284 {_DATAF(0.88957446813583374000), _DATAF(-0.45679014921188354000)},

1285 {_DATAF(0.88939923048019409000), _DATAF(-0.45713126659393311000)},

1286 {_DATAF(0.88922387361526489000), _DATAF(-0.45747232437133789000)},

1287 {_DATAF(0.88904833793640137000), _DATAF(-0.45781329274177551000)},

1288 {_DATAF(0.88887274265289307000), _DATAF(-0.45815420150756836000)},

1289 {_DATAF(0.88869696855545044000), _DATAF(-0.45849505066871643000)},

1290 {_DATAF(0.88852107524871826000), _DATAF(-0.45883584022521973000)},

1291 {_DATAF(0.88834506273269653000), _DATAF(-0.45917654037475586000)},

1292 {_DATAF(0.88816887140274048000), _DATAF(-0.45951718091964722000)},

1293 {_DATAF(0.88799256086349487000), _DATAF(-0.45985776185989380000)},

1294 {_DATAF(0.88781619071960449000), _DATAF(-0.46019828319549561000)},

1295 {_DATAF(0.88763964176177979000), _DATAF(-0.46053871512413025000)},

1296 {_DATAF(0.88746291399002075000), _DATAF(-0.46087908744812012000)},

1297 {_DATAF(0.88728612661361694000), _DATAF(-0.46121940016746521000)},

1298 {_DATAF(0.88710916042327881000), _DATAF(-0.46155962347984314000)},

1299 {_DATAF(0.88693213462829590000), _DATAF(-0.46189978718757629000)},

1300 {_DATAF(0.88675493001937866000), _DATAF(-0.46223989129066467000)},

1301 {_DATAF(0.88657760620117188000), _DATAF(-0.46257993578910828000)},

1302 {_DATAF(0.88640010356903076000), _DATAF(-0.46291989088058472000)},

1303 {_DATAF(0.88622254133224487000), _DATAF(-0.46325978636741638000)},

1304 {_DATAF(0.88604480028152466000), _DATAF(-0.46359962224960327000)},

1305 {_DATAF(0.88586694002151489000), _DATAF(-0.46393936872482300000)},

1306 {_DATAF(0.88568896055221558000), _DATAF(-0.46427905559539795000)},

1307 {_DATAF(0.88551086187362671000), _DATAF(-0.46461868286132813000)},

1308 {_DATAF(0.88533258438110352000), _DATAF(-0.46495825052261353000)},

1309 {_DATAF(0.88515424728393555000), _DATAF(-0.46529772877693176000)},

1310 {_DATAF(0.88497573137283325000), _DATAF(-0.46563714742660522000)},

1311 {_DATAF(0.88479709625244141000), _DATAF(-0.46597650647163391000)},

1312 {_DATAF(0.88461834192276001000), _DATAF(-0.46631577610969543000)},

1313 {_DATAF(0.88443946838378906000), _DATAF(-0.46665498614311218000)},

1314 {_DATAF(0.88426041603088379000), _DATAF(-0.46699413657188416000)},

1315 {_DATAF(0.88408124446868896000), _DATAF(-0.46733319759368896000)},

1316 {_DATAF(0.88390195369720459000), _DATAF(-0.46767222881317139000)},

1317 {_DATAF(0.88372254371643066000), _DATAF(-0.46801114082336426000)},

1318 {_DATAF(0.88354301452636719000), _DATAF(-0.46835002303123474000)},

1319 {_DATAF(0.88336336612701416000), _DATAF(-0.46868881583213806000)},

1320 {_DATAF(0.88318353891372681000), _DATAF(-0.46902754902839661000)},

1321 {_DATAF(0.88300359249114990000), _DATAF(-0.46936622262001038000)},

1322 {_DATAF(0.88282352685928345000), _DATAF(-0.46970480680465698000)},

1323 {_DATAF(0.88264334201812744000), _DATAF(-0.47004333138465881000)},

1324 {_DATAF(0.88246303796768188000), _DATAF(-0.47038179636001587000)},

1325 {_DATAF(0.88228255510330200000), _DATAF(-0.47072017192840576000)},

1326 {_DATAF(0.88210195302963257000), _DATAF(-0.47105848789215088000)},

1327 {_DATAF(0.88192129135131836000), _DATAF(-0.47139674425125122000)},

1328 {_DATAF(0.88174045085906982000), _DATAF(-0.47173491120338440000)},

1329 {_DATAF(0.88155943155288696000), _DATAF(-0.47207301855087280000)},

1330 {_DATAF(0.88137835264205933000), _DATAF(-0.47241106629371643000)},

1331 {_DATAF(0.88119709491729736000), _DATAF(-0.47274902462959290000)},

1332 {_DATAF(0.88101577758789063000), _DATAF(-0.47308692336082458000)},

1333 {_DATAF(0.88083428144454956000), _DATAF(-0.47342476248741150000)},

1334 {_DATAF(0.88065266609191895000), _DATAF(-0.47376251220703125000)},

1335 {_DATAF(0.88047087192535400000), _DATAF(-0.47410020232200623000)},

1336 {_DATAF(0.88028901815414429000), _DATAF(-0.47443783283233643000)},

1337 {_DATAF(0.88010698556900024000), _DATAF(-0.47477537393569946000)},

1338 {_DATAF(0.87992483377456665000), _DATAF(-0.47511285543441772000)},

1339 {_DATAF(0.87974262237548828000), _DATAF(-0.47545027732849121000)},

1340 {_DATAF(0.87956017255783081000), _DATAF(-0.47578760981559753000)},

1341 {_DATAF(0.87937766313552856000), _DATAF(-0.47612488269805908000)},

1342 {_DATAF(0.87919503450393677000), _DATAF(-0.47646209597587585000)},

1343 {_DATAF(0.87901222705841064000), _DATAF(-0.47679921984672546000)},

1344 {_DATAF(0.87882930040359497000), _DATAF(-0.47713628411293030000)},

1345 {_DATAF(0.87864625453948975000), _DATAF(-0.47747328877449036000)},

1346 {_DATAF(0.87846308946609497000), _DATAF(-0.47781020402908325000)},

1347 {_DATAF(0.87827980518341064000), _DATAF(-0.47814705967903137000)},

1348 {_DATAF(0.87809634208679199000), _DATAF(-0.47848382592201233000)},

1349 {_DATAF(0.87791281938552856000), _DATAF(-0.47882056236267090000)},

1350 {_DATAF(0.87772911787033081000), _DATAF(-0.47915717959403992000)},

1351 {_DATAF(0.87754529714584351000), _DATAF(-0.47949376702308655000)},

1352 {_DATAF(0.87736135721206665000), _DATAF(-0.47983026504516602000)},

1353 {_DATAF(0.87717723846435547000), _DATAF(-0.48016667366027832000)},

1354 {_DATAF(0.87699306011199951000), _DATAF(-0.48050305247306824000)},

1355 {_DATAF(0.87680870294570923000), _DATAF(-0.48083934187889099000)},

1356 {_DATAF(0.87662428617477417000), _DATAF(-0.48117554187774658000)},

1357 {_DATAF(0.87643969058990479000), _DATAF(-0.48151168227195740000)},

1358 {_DATAF(0.87625491619110107000), _DATAF(-0.48184776306152344000)},

1359 {_DATAF(0.87607008218765259000), _DATAF(-0.48218378424644470000)},

1360 {_DATAF(0.87588512897491455000), _DATAF(-0.48251971602439880000)},

1361 {_DATAF(0.87569999694824219000), _DATAF(-0.48285555839538574000)},

1362 {_DATAF(0.87551474571228027000), _DATAF(-0.48319137096405029000)},

1363 {_DATAF(0.87532937526702881000), _DATAF(-0.48352706432342529000)},

1364 {_DATAF(0.87514388561248779000), _DATAF(-0.48386272788047791000)},

1365 {_DATAF(0.87495827674865723000), _DATAF(-0.48419830203056335000)},

1366 {_DATAF(0.87477254867553711000), _DATAF(-0.48453381657600403000)},

1367 {_DATAF(0.87458664178848267000), _DATAF(-0.48486924171447754000)},

1368 {_DATAF(0.87440061569213867000), _DATAF(-0.48520460724830627000)},

1369 {_DATAF(0.87421452999114990000), _DATAF(-0.48553991317749023000)},

1370 {_DATAF(0.87402826547622681000), _DATAF(-0.48587512969970703000)},

1371 {_DATAF(0.87384182214736938000), _DATAF(-0.48621028661727905000)},

1372 {_DATAF(0.87365531921386719000), _DATAF(-0.48654535412788391000)},

1373 {_DATAF(0.87346869707107544000), _DATAF(-0.48688036203384399000)},

1374 {_DATAF(0.87328189611434937000), _DATAF(-0.48721531033515930000)},

1375 {_DATAF(0.87309497594833374000), _DATAF(-0.48755016922950745000)},

1376 {_DATAF(0.87290793657302856000), _DATAF(-0.48788493871688843000)},

1377 {_DATAF(0.87272077798843384000), _DATAF(-0.48821967840194702000)},

1378 {_DATAF(0.87253350019454956000), _DATAF(-0.48855432868003845000)},

1379 {_DATAF(0.87234604358673096000), _DATAF(-0.48888888955116272000)},

1380 {_DATAF(0.87215852737426758000), _DATAF(-0.48922339081764221000)},

1381 {_DATAF(0.87197083234786987000), _DATAF(-0.48955783247947693000)},

1382 {_DATAF(0.87178301811218262000), _DATAF(-0.48989218473434448000)},

1383 {_DATAF(0.87159508466720581000), _DATAF(-0.49022647738456726000)},

1384 {_DATAF(0.87140703201293945000), _DATAF(-0.49056071043014526000)},

1385 {_DATAF(0.87121886014938354000), _DATAF(-0.49089485406875610000)},

1386 {_DATAF(0.87103050947189331000), _DATAF(-0.49122890830039978000)},

1387 {_DATAF(0.87084203958511353000), _DATAF(-0.49156290292739868000)},

1388 {_DATAF(0.87065351009368896000), _DATAF(-0.49189683794975281000)},

1389 {_DATAF(0.87046480178833008000), _DATAF(-0.49223071336746216000)},

1390 {_DATAF(0.87027597427368164000), _DATAF(-0.49256446957588196000)},

1391 {_DATAF(0.87008696794509888000), _DATAF(-0.49289819598197937000)},

1392 {_DATAF(0.86989790201187134000), _DATAF(-0.49323183298110962000)},

1393 {_DATAF(0.86970865726470947000), _DATAF(-0.49356541037559509000)},

1394 {_DATAF(0.86951935291290283000), _DATAF(-0.49389889836311340000)},

1395 {_DATAF(0.86932986974716187000), _DATAF(-0.49423229694366455000)},

1396 {_DATAF(0.86914026737213135000), _DATAF(-0.49456566572189331000)},

1397 {_DATAF(0.86895054578781128000), _DATAF(-0.49489894509315491000)},

1398 {_DATAF(0.86876070499420166000), _DATAF(-0.49523213505744934000)},

1399 {_DATAF(0.86857068538665771000), _DATAF(-0.49556526541709900000)},

1400 {_DATAF(0.86838060617446899000), _DATAF(-0.49589830636978149000)},

1401 {_DATAF(0.86819034814834595000), _DATAF(-0.49623128771781921000)},

1402 {_DATAF(0.86799997091293335000), _DATAF(-0.49656420946121216000)},

1403 {_DATAF(0.86780947446823120000), _DATAF(-0.49689704179763794000)},

1404 {_DATAF(0.86761885881423950000), _DATAF(-0.49722981452941895000)},

1405 {_DATAF(0.86742812395095825000), _DATAF(-0.49756249785423279000)},

1406 {_DATAF(0.86723726987838745000), _DATAF(-0.49789512157440186000)},

1407 {_DATAF(0.86704623699188232000), _DATAF(-0.49822765588760376000)},

1408 {_DATAF(0.86685508489608765000), _DATAF(-0.49856013059616089000)},

1409 {_DATAF(0.86666387319564819000), _DATAF(-0.49889254570007324000)},

1410 {_DATAF(0.86647248268127441000), _DATAF(-0.49922487139701843000)},

1411 {_DATAF(0.86628097295761108000), _DATAF(-0.49955710768699646000)},

1412 {_DATAF(0.86608928442001343000), _DATAF(-0.49988928437232971000)},

1413 {_DATAF(0.86589753627777100000), _DATAF(-0.50022137165069580000)},

1414 {_DATAF(0.86570566892623901000), _DATAF(-0.50055342912673950000)},

1415 {_DATAF(0.86551362276077271000), _DATAF(-0.50088536739349365000)},

1416 {_DATAF(0.86532145738601685000), _DATAF(-0.50121724605560303000)},

1417 {_DATAF(0.86512917280197144000), _DATAF(-0.50154906511306763000)},

1418 {_DATAF(0.86493676900863647000), _DATAF(-0.50188082456588745000)},

1419 {_DATAF(0.86474424600601196000), _DATAF(-0.50221246480941772000)},

1420 {_DATAF(0.86455160379409790000), _DATAF(-0.50254404544830322000)},

1421 {_DATAF(0.86435878276824951000), _DATAF(-0.50287556648254395000)},

1422 {_DATAF(0.86416590213775635000), _DATAF(-0.50320702791213989000)},

1423 {_DATAF(0.86397284269332886000), _DATAF(-0.50353837013244629000)},

1424 {_DATAF(0.86377966403961182000), _DATAF(-0.50386965274810791000)},

1425 {_DATAF(0.86358636617660522000), _DATAF(-0.50420087575912476000)},

1426 {_DATAF(0.86339294910430908000), _DATAF(-0.50453203916549683000)},

1427 {_DATAF(0.86319941282272339000), _DATAF(-0.50486308336257935000)},

1428 {_DATAF(0.86300575733184814000), _DATAF(-0.50519412755966187000)},

1429 {_DATAF(0.86281192302703857000), _DATAF(-0.50552505254745483000)},

1430 {_DATAF(0.86261802911758423000), _DATAF(-0.50585585832595825000)},

1431 {_DATAF(0.86242395639419556000), _DATAF(-0.50618666410446167000)},

1432 {_DATAF(0.86222976446151733000), _DATAF(-0.50651735067367554000)},

1433 {_DATAF(0.86203545331954956000), _DATAF(-0.50684797763824463000)},

1434 {_DATAF(0.86184102296829224000), _DATAF(-0.50717854499816895000)},

1435 {_DATAF(0.86164647340774536000), _DATAF(-0.50750899314880371000)},

1436 {_DATAF(0.86145174503326416000), _DATAF(-0.50783938169479370000)},

1437 {_DATAF(0.86125695705413818000), _DATAF(-0.50816971063613892000)},

1438 {_DATAF(0.86106199026107788000), _DATAF(-0.50849997997283936000)},

1439 {_DATAF(0.86086696386337280000), _DATAF(-0.50883013010025024000)},

1440 {_DATAF(0.86067175865173340000), _DATAF(-0.50916022062301636000)},

1441 {_DATAF(0.86047643423080444000), _DATAF(-0.50949025154113770000)},

1442 {_DATAF(0.86028099060058594000), _DATAF(-0.50982022285461426000)},

1443 {_DATAF(0.86008536815643311000), _DATAF(-0.51015007495880127000)},

1444 {_DATAF(0.85988968610763550000), _DATAF(-0.51047992706298828000)},

1445 {_DATAF(0.85969388484954834000), _DATAF(-0.51080960035324097000)},

1446 {_DATAF(0.85949790477752686000), _DATAF(-0.51113927364349365000)},

1447 {_DATAF(0.85930180549621582000), _DATAF(-0.51146882772445679000)},

1448 {_DATAF(0.85910558700561523000), _DATAF(-0.51179832220077515000)},

1449 {_DATAF(0.85890924930572510000), _DATAF(-0.51212775707244873000)},

1450 {_DATAF(0.85871279239654541000), _DATAF(-0.51245713233947754000)},

1451 {_DATAF(0.85851621627807617000), _DATAF(-0.51278638839721680000)},

1452 {_DATAF(0.85831952095031738000), _DATAF(-0.51311558485031128000)},

1453 {_DATAF(0.85812264680862427000), _DATAF(-0.51344472169876099000)},

1454 {_DATAF(0.85792571306228638000), _DATAF(-0.51377379894256592000)},

1455 {_DATAF(0.85772860050201416000), _DATAF(-0.51410275697708130000)},

1456 {_DATAF(0.85753136873245239000), _DATAF(-0.51443165540695190000)},

1457 {_DATAF(0.85733401775360107000), _DATAF(-0.51476043462753296000)},

1458 {_DATAF(0.85713654756546021000), _DATAF(-0.51508921384811401000)},

1459 {_DATAF(0.85693895816802979000), _DATAF(-0.51541787385940552000)},

1460 {_DATAF(0.85674124956130981000), _DATAF(-0.51574647426605225000)},

1461 {_DATAF(0.85654342174530029000), _DATAF(-0.51607501506805420000)},

1462 {_DATAF(0.85634541511535645000), _DATAF(-0.51640343666076660000)},

1463 {_DATAF(0.85614734888076782000), _DATAF(-0.51673179864883423000)},

1464 {_DATAF(0.85594910383224487000), _DATAF(-0.51706010103225708000)},

1465 {_DATAF(0.85575073957443237000), _DATAF(-0.51738828420639038000)},

1466 {_DATAF(0.85555225610733032000), _DATAF(-0.51771646738052368000)},

1467 {_DATAF(0.85535365343093872000), _DATAF(-0.51804453134536743000)},

1468 {_DATAF(0.85515493154525757000), _DATAF(-0.51837247610092163000)},

1469 {_DATAF(0.85495609045028687000), _DATAF(-0.51870042085647583000)},

1470 {_DATAF(0.85475707054138184000), _DATAF(-0.51902824640274048000)},

1471 {_DATAF(0.85455799102783203000), _DATAF(-0.51935601234436035000)},

1472 {_DATAF(0.85435873270034790000), _DATAF(-0.51968365907669067000)},

1473 {_DATAF(0.85415941476821899000), _DATAF(-0.52001124620437622000)},

1474 {_DATAF(0.85395991802215576000), _DATAF(-0.52033877372741699000)},

1475 {_DATAF(0.85376030206680298000), _DATAF(-0.52066624164581299000)},

1476 {_DATAF(0.85356056690216064000), _DATAF(-0.52099364995956421000)},

1477 {_DATAF(0.85336071252822876000), _DATAF(-0.52132093906402588000)},

1478 {_DATAF(0.85316073894500732000), _DATAF(-0.52164816856384277000)},

1479 {_DATAF(0.85296058654785156000), _DATAF(-0.52197527885437012000)},

1480 {_DATAF(0.85276037454605103000), _DATAF(-0.52230238914489746000)},

1481 {_DATAF(0.85255998373031616000), _DATAF(-0.52262938022613525000)},

1482 {_DATAF(0.85235953330993652000), _DATAF(-0.52295625209808350000)},

1483 {_DATAF(0.85215890407562256000), _DATAF(-0.52328312397003174000)},

1484 {_DATAF(0.85195815563201904000), _DATAF(-0.52360987663269043000)},

1485 {_DATAF(0.85175728797912598000), _DATAF(-0.52393656969070435000)},

1486 {_DATAF(0.85155630111694336000), _DATAF(-0.52426314353942871000)},

1487 {_DATAF(0.85135519504547119000), _DATAF(-0.52458965778350830000)},

1488 {_DATAF(0.85115396976470947000), _DATAF(-0.52491611242294312000)},

1489 {_DATAF(0.85095256567001343000), _DATAF(-0.52524250745773315000)},

1490 {_DATAF(0.85075110197067261000), _DATAF(-0.52556878328323364000)},

1491 {_DATAF(0.85054945945739746000), _DATAF(-0.52589499950408936000)},

1492 {_DATAF(0.85034775733947754000), _DATAF(-0.52622115612030029000)},

1493 {_DATAF(0.85014587640762329000), _DATAF(-0.52654725313186646000)},

1494 {_DATAF(0.84994387626647949000), _DATAF(-0.52687323093414307000)},

1495 {_DATAF(0.84974175691604614000), _DATAF(-0.52719914913177490000)},

1496 {_DATAF(0.84953951835632324000), _DATAF(-0.52752494812011719000)},

1497 {_DATAF(0.84933716058731079000), _DATAF(-0.52785074710845947000)},

1498 {_DATAF(0.84913468360900879000), _DATAF(-0.52817642688751221000)},

1499 {_DATAF(0.84893202781677246000), _DATAF(-0.52850198745727539000)},

1500 {_DATAF(0.84872931241989136000), _DATAF(-0.52882754802703857000)},

1501 {_DATAF(0.84852647781372070000), _DATAF(-0.52915298938751221000)},

1502 {_DATAF(0.84832346439361572000), _DATAF(-0.52947831153869629000)},

1503 {_DATAF(0.84812033176422119000), _DATAF(-0.52980363368988037000)},

1504 {_DATAF(0.84791707992553711000), _DATAF(-0.53012883663177490000)},

1505 {_DATAF(0.84771376848220825000), _DATAF(-0.53045397996902466000)},

1506 {_DATAF(0.84751027822494507000), _DATAF(-0.53077900409698486000)},

1507 {_DATAF(0.84730660915374756000), _DATAF(-0.53110402822494507000)},

1508 {_DATAF(0.84710288047790527000), _DATAF(-0.53142887353897095000)},

1509 {_DATAF(0.84689903259277344000), _DATAF(-0.53175371885299683000)},

1510 {_DATAF(0.84669506549835205000), _DATAF(-0.53207844495773315000)},

1511 {_DATAF(0.84649091958999634000), _DATAF(-0.53240311145782471000)},

1512 {_DATAF(0.84628671407699585000), _DATAF(-0.53272771835327148000)},

1513 {_DATAF(0.84608232975006104000), _DATAF(-0.53305220603942871000)},

1514 {_DATAF(0.84587788581848145000), _DATAF(-0.53337663412094116000)},

1515 {_DATAF(0.84567326307296753000), _DATAF(-0.53370100259780884000)},

1516 {_DATAF(0.84546852111816406000), _DATAF(-0.53402525186538696000)},

1517 {_DATAF(0.84526365995407104000), _DATAF(-0.53434944152832031000)},

1518 {_DATAF(0.84505867958068848000), _DATAF(-0.53467357158660889000)},

1519 {_DATAF(0.84485357999801636000), _DATAF(-0.53499764204025269000)},

1520 {_DATAF(0.84464836120605469000), _DATAF(-0.53532159328460693000)},

1521 {_DATAF(0.84444296360015869000), _DATAF(-0.53564548492431641000)},

1522 {_DATAF(0.84423750638961792000), _DATAF(-0.53596925735473633000)},

1523 {_DATAF(0.84403187036514282000), _DATAF(-0.53629297018051147000)},

1524 {_DATAF(0.84382617473602295000), _DATAF(-0.53661662340164185000)},

1525 {_DATAF(0.84362030029296875000), _DATAF(-0.53694015741348267000)},

1526 {_DATAF(0.84341436624526978000), _DATAF(-0.53726369142532349000)},

1527 {_DATAF(0.84320825338363647000), _DATAF(-0.53758704662322998000)},

1528 {_DATAF(0.84300202131271362000), _DATAF(-0.53791040182113647000)},

1529 {_DATAF(0.84279567003250122000), _DATAF(-0.53823363780975342000)},

1530 {_DATAF(0.84258919954299927000), _DATAF(-0.53855681419372559000)},

1531 {_DATAF(0.84238260984420776000), _DATAF(-0.53887993097305298000)},

1532 {_DATAF(0.84217590093612671000), _DATAF(-0.53920292854309082000)},

1533 {_DATAF(0.84196901321411133000), _DATAF(-0.53952586650848389000)},

1534 {_DATAF(0.84176206588745117000), _DATAF(-0.53984868526458740000)},

1535 {_DATAF(0.84155499935150146000), _DATAF(-0.54017144441604614000)},

1536 {_DATAF(0.84134775400161743000), _DATAF(-0.54049414396286011000)},

1537 {_DATAF(0.84114044904708862000), _DATAF(-0.54081678390502930000)},

1538 {_DATAF(0.84093296527862549000), _DATAF(-0.54113930463790894000)},

1539 {_DATAF(0.84072536230087280000), _DATAF(-0.54146176576614380000)},

1540 {_DATAF(0.84051764011383057000), _DATAF(-0.54178416728973389000)},

1541 {_DATAF(0.84030985832214355000), _DATAF(-0.54210644960403442000)},

1542 {_DATAF(0.84010189771652222000), _DATAF(-0.54242867231369019000)},

1543 {_DATAF(0.83989381790161133000), _DATAF(-0.54275077581405640000)},

1544 {_DATAF(0.83968561887741089000), _DATAF(-0.54307281970977783000)},

1545 {_DATAF(0.83947724103927612000), _DATAF(-0.54339480400085449000)},

1546 {_DATAF(0.83926880359649658000), _DATAF(-0.54371672868728638000)},

1547 {_DATAF(0.83906024694442749000), _DATAF(-0.54403853416442871000)},

1548 {_DATAF(0.83885151147842407000), _DATAF(-0.54436028003692627000)},

1549 {_DATAF(0.83864271640777588000), _DATAF(-0.54468190670013428000)},

1550 {_DATAF(0.83843380212783813000), _DATAF(-0.54500347375869751000)},

1551 {_DATAF(0.83822470903396606000), _DATAF(-0.54532498121261597000)},

1552 {_DATAF(0.83801549673080444000), _DATAF(-0.54564642906188965000)},

1553 {_DATAF(0.83780622482299805000), _DATAF(-0.54596775770187378000)},

1554 {_DATAF(0.83759677410125732000), _DATAF(-0.54628896713256836000)},

1555 {_DATAF(0.83738720417022705000), _DATAF(-0.54661017656326294000)},

1556 {_DATAF(0.83717751502990723000), _DATAF(-0.54693126678466797000)},

1557 {_DATAF(0.83696770668029785000), _DATAF(-0.54725229740142822000)},

1558 {_DATAF(0.83675777912139893000), _DATAF(-0.54757320880889893000)},

1559 {_DATAF(0.83654773235321045000), _DATAF(-0.54789406061172485000)},

1560 {_DATAF(0.83633756637573242000), _DATAF(-0.54821485280990601000)},

1561 {_DATAF(0.83612728118896484000), _DATAF(-0.54853552579879761000)},

1562 {_DATAF(0.83591681718826294000), _DATAF(-0.54885613918304443000)},

1563 {_DATAF(0.83570629358291626000), _DATAF(-0.54917663335800171000)},

1564 {_DATAF(0.83549559116363525000), _DATAF(-0.54949712753295898000)},

1565 {_DATAF(0.83528482913970947000), _DATAF(-0.54981750249862671000)},

1566 {_DATAF(0.83507388830184937000), _DATAF(-0.55013775825500488000)},

1567 {_DATAF(0.83486288785934448000), _DATAF(-0.55045795440673828000)},

1568 {_DATAF(0.83465170860290527000), _DATAF(-0.55077809095382690000)},

1569 {_DATAF(0.83444041013717651000), _DATAF(-0.55109816789627075000)},

1570 {_DATAF(0.83422905206680298000), _DATAF(-0.55141812562942505000)},

1571 {_DATAF(0.83401751518249512000), _DATAF(-0.55173796415328979000)},

1572 {_DATAF(0.83380585908889771000), _DATAF(-0.55205780267715454000)},

1573 {_DATAF(0.83359408378601074000), _DATAF(-0.55237752199172974000)},

1574 {_DATAF(0.83338218927383423000), _DATAF(-0.55269712209701538000)},

1575 {_DATAF(0.83317017555236816000), _DATAF(-0.55301672220230103000)},

1576 {_DATAF(0.83295804262161255000), _DATAF(-0.55333620309829712000)},

1577 {_DATAF(0.83274579048156738000), _DATAF(-0.55365556478500366000)},

1578 {_DATAF(0.83253335952758789000), _DATAF(-0.55397486686706543000)},

1579 {_DATAF(0.83232086896896362000), _DATAF(-0.55429410934448242000)},

1580 {_DATAF(0.83210825920104980000), _DATAF(-0.55461329221725464000)},

1581 {_DATAF(0.83189547061920166000), _DATAF(-0.55493235588073730000)},

1582 {_DATAF(0.83168262243270874000), _DATAF(-0.55525130033493042000)},

1583 {_DATAF(0.83146959543228149000), _DATAF(-0.55557024478912354000)},

1584 {_DATAF(0.83125650882720947000), _DATAF(-0.55588907003402710000)},

1585 {_DATAF(0.83104324340820313000), _DATAF(-0.55620777606964111000)},

1586 {_DATAF(0.83082985877990723000), _DATAF(-0.55652648210525513000)},

1587 {_DATAF(0.83061641454696655000), _DATAF(-0.55684500932693481000)},

1588 {_DATAF(0.83040279150009155000), _DATAF(-0.55716353654861450000)},

1589 {_DATAF(0.83018904924392700000), _DATAF(-0.55748194456100464000)},

1590 {_DATAF(0.82997518777847290000), _DATAF(-0.55780029296875000000)},

1591 {_DATAF(0.82976120710372925000), _DATAF(-0.55811852216720581000)},

1592 {_DATAF(0.82954710721969604000), _DATAF(-0.55843669176101685000)},

1593 {_DATAF(0.82933294773101807000), _DATAF(-0.55875480175018311000)},

1594 {_DATAF(0.82911854982376099000), _DATAF(-0.55907279253005981000)},

1595 {_DATAF(0.82890409231185913000), _DATAF(-0.55939072370529175000)},

1596 {_DATAF(0.82868951559066772000), _DATAF(-0.55970853567123413000)},

1597 {_DATAF(0.82847481966018677000), _DATAF(-0.56002628803253174000)},

1598 {_DATAF(0.82826000452041626000), _DATAF(-0.56034398078918457000)},

1599 {_DATAF(0.82804507017135620000), _DATAF(-0.56066155433654785000)},

1600 {_DATAF(0.82782995700836182000), _DATAF(-0.56097906827926636000)},

1601 {_DATAF(0.82761478424072266000), _DATAF(-0.56129652261734009000)},

1602 {_DATAF(0.82739949226379395000), _DATAF(-0.56161385774612427000)},

1603 {_DATAF(0.82718402147293091000), _DATAF(-0.56193113327026367000)},

1604 {_DATAF(0.82696849107742310000), _DATAF(-0.56224828958511353000)},

1605 {_DATAF(0.82675278186798096000), _DATAF(-0.56256538629531860000)},

1606 {_DATAF(0.82653701305389404000), _DATAF(-0.56288242340087891000)},

1607 {_DATAF(0.82632106542587280000), _DATAF(-0.56319934129714966000)},

1608 {_DATAF(0.82610499858856201000), _DATAF(-0.56351619958877563000)},

1609 {_DATAF(0.82588887214660645000), _DATAF(-0.56383293867111206000)},

1610 {_DATAF(0.82567256689071655000), _DATAF(-0.56414961814880371000)},

1611 {_DATAF(0.82545614242553711000), _DATAF(-0.56446623802185059000)},

1612 {_DATAF(0.82523959875106812000), _DATAF(-0.56478273868560791000)},

1613 {_DATAF(0.82502299547195435000), _DATAF(-0.56509917974472046000)},

1614 {_DATAF(0.82480621337890625000), _DATAF(-0.56541556119918823000)},

1615 {_DATAF(0.82458931207656860000), _DATAF(-0.56573182344436646000)},

1616 {_DATAF(0.82437229156494141000), _DATAF(-0.56604796648025513000)},

1617 {_DATAF(0.82415515184402466000), _DATAF(-0.56636410951614380000)},

1618 {_DATAF(0.82393789291381836000), _DATAF(-0.56668013334274292000)},

1619 {_DATAF(0.82372051477432251000), _DATAF(-0.56699603796005249000)},

1620 {_DATAF(0.82350301742553711000), _DATAF(-0.56731188297271729000)},

1621 {_DATAF(0.82328540086746216000), _DATAF(-0.56762766838073730000)},

1622 {_DATAF(0.82306766510009766000), _DATAF(-0.56794333457946777000)},

1623 {_DATAF(0.82284981012344360000), _DATAF(-0.56825894117355347000)},

1624 {_DATAF(0.82263177633285522000), _DATAF(-0.56857448816299438000)},

1625 {_DATAF(0.82241368293762207000), _DATAF(-0.56888991594314575000)},

1626 {_DATAF(0.82219547033309937000), _DATAF(-0.56920522451400757000)},

1627 {_DATAF(0.82197713851928711000), _DATAF(-0.56952053308486938000)},

1628 {_DATAF(0.82175862789154053000), _DATAF(-0.56983572244644165000)},

1629 {_DATAF(0.82154005765914917000), _DATAF(-0.57015079259872437000)},

1630 {_DATAF(0.82132136821746826000), _DATAF(-0.57046580314636230000)},

1631 {_DATAF(0.82110249996185303000), _DATAF(-0.57078075408935547000)},

1632 {_DATAF(0.82088357210159302000), _DATAF(-0.57109558582305908000)},

1633 {_DATAF(0.82066446542739868000), _DATAF(-0.57141035795211792000)},

1634 {_DATAF(0.82044529914855957000), _DATAF(-0.57172501087188721000)},

1635 {_DATAF(0.82022595405578613000), _DATAF(-0.57203960418701172000)},

1636 {_DATAF(0.82000654935836792000), _DATAF(-0.57235413789749146000)},

1637 {_DATAF(0.81978696584701538000), _DATAF(-0.57266855239868164000)},

1638 {_DATAF(0.81956732273101807000), _DATAF(-0.57298290729522705000)},

1639 {_DATAF(0.81934750080108643000), _DATAF(-0.57329714298248291000)},

1640 {_DATAF(0.81912761926651001000), _DATAF(-0.57361131906509399000)},

1641 {_DATAF(0.81890755891799927000), _DATAF(-0.57392543554306030000)},

1642 {_DATAF(0.81868737936019897000), _DATAF(-0.57423943281173706000)},

1643 {_DATAF(0.81846714019775391000), _DATAF(-0.57455337047576904000)},

1644 {_DATAF(0.81824672222137451000), _DATAF(-0.57486718893051147000)},

1645 {_DATAF(0.81802618503570557000), _DATAF(-0.57518094778060913000)},

1646 {_DATAF(0.81780558824539185000), _DATAF(-0.57549458742141724000)},

1647 {_DATAF(0.81758481264114380000), _DATAF(-0.57580816745758057000)},

1648 {_DATAF(0.81736391782760620000), _DATAF(-0.57612168788909912000)},

1649 {_DATAF(0.81714290380477905000), _DATAF(-0.57643508911132813000)},

1650 {_DATAF(0.81692183017730713000), _DATAF(-0.57674843072891235000)},

1651 {_DATAF(0.81670057773590088000), _DATAF(-0.57706165313720703000)},

1652 {_DATAF(0.81647920608520508000), _DATAF(-0.57737481594085693000)},

1653 {_DATAF(0.81625771522521973000), _DATAF(-0.57768791913986206000)},

1654 {_DATAF(0.81603610515594482000), _DATAF(-0.57800090312957764000)},

1655 {_DATAF(0.81581443548202515000), _DATAF(-0.57831376791000366000)},

1656 {_DATAF(0.81559258699417114000), _DATAF(-0.57862663269042969000)},

1657 {_DATAF(0.81537061929702759000), _DATAF(-0.57893931865692139000)},

1658 {_DATAF(0.81514853239059448000), _DATAF(-0.57925200462341309000)},

1659 {_DATAF(0.81492632627487183000), _DATAF(-0.57956457138061523000)},

1660 {_DATAF(0.81470400094985962000), _DATAF(-0.57987701892852783000)},

1661 {_DATAF(0.81448155641555786000), _DATAF(-0.58018940687179565000)},

1662 {_DATAF(0.81425899267196655000), _DATAF(-0.58050173521041870000)},

1663 {_DATAF(0.81403630971908569000), _DATAF(-0.58081394433975220000)},

1664 {_DATAF(0.81381350755691528000), _DATAF(-0.58112609386444092000)},

1665 {_DATAF(0.81359058618545532000), _DATAF(-0.58143812417984009000)},

1666 {_DATAF(0.81336754560470581000), _DATAF(-0.58175009489059448000)},

1667 {_DATAF(0.81314438581466675000), _DATAF(-0.58206200599670410000)},

1668 {_DATAF(0.81292116641998291000), _DATAF(-0.58237379789352417000)},

1669 {_DATAF(0.81269776821136475000), _DATAF(-0.58268547058105469000)},

1670 {_DATAF(0.81247425079345703000), _DATAF(-0.58299714326858521000)},

1671 {_DATAF(0.81225061416625977000), _DATAF(-0.58330863714218140000)},

1672 {_DATAF(0.81202685832977295000), _DATAF(-0.58362013101577759000)},

1673 {_DATAF(0.81180298328399658000), _DATAF(-0.58393144607543945000)},

1674 {_DATAF(0.81157898902893066000), _DATAF(-0.58424276113510132000)},

1675 {_DATAF(0.81135487556457520000), _DATAF(-0.58455395698547363000)},

1676 {_DATAF(0.81113064289093018000), _DATAF(-0.58486503362655640000)},

1677 {_DATAF(0.81090623140335083000), _DATAF(-0.58517605066299438000)},

1678 {_DATAF(0.81068176031112671000), _DATAF(-0.58548700809478760000)},

1679 {_DATAF(0.81045717000961304000), _DATAF(-0.58579784631729126000)},

1680 {_DATAF(0.81023246049880981000), _DATAF(-0.58610862493515015000)},

1681 {_DATAF(0.81000763177871704000), _DATAF(-0.58641928434371948000)},

1682 {_DATAF(0.80978268384933472000), _DATAF(-0.58672988414764404000)},

1683 {_DATAF(0.80955761671066284000), _DATAF(-0.58704036474227905000)},

1684 {_DATAF(0.80933243036270142000), _DATAF(-0.58735078573226929000)},

1685 {_DATAF(0.80910712480545044000), _DATAF(-0.58766114711761475000)},

1686 {_DATAF(0.80888170003890991000), _DATAF(-0.58797138929367065000)},

1687 {_DATAF(0.80865615606307983000), _DATAF(-0.58828157186508179000)},

1688 {_DATAF(0.80843049287796021000), _DATAF(-0.58859163522720337000)},

1689 {_DATAF(0.80820471048355103000), _DATAF(-0.58890157938003540000)},

1690 {_DATAF(0.80797880887985229000), _DATAF(-0.58921152353286743000)},

1691 {_DATAF(0.80775284767150879000), _DATAF(-0.58952128887176514000)},

1692 {_DATAF(0.80752670764923096000), _DATAF(-0.58983105421066284000)},

1693 {_DATAF(0.80730044841766357000), _DATAF(-0.59014070034027100000)},

1694 {_DATAF(0.80707406997680664000), _DATAF(-0.59045022726058960000)},

1695 {_DATAF(0.80684757232666016000), _DATAF(-0.59075969457626343000)},

1696 {_DATAF(0.80662095546722412000), _DATAF(-0.59106910228729248000)},

1697 {_DATAF(0.80639421939849854000), _DATAF(-0.59137839078903198000)},

1698 {_DATAF(0.80616736412048340000), _DATAF(-0.59168756008148193000)},

1699 {_DATAF(0.80594038963317871000), _DATAF(-0.59199666976928711000)},

1700 {_DATAF(0.80571329593658447000), _DATAF(-0.59230571985244751000)},

1701 {_DATAF(0.80548608303070068000), _DATAF(-0.59261465072631836000)},

1702 {_DATAF(0.80525875091552734000), _DATAF(-0.59292352199554443000)},

1703 {_DATAF(0.80503135919570923000), _DATAF(-0.59323227405548096000)},

1704 {_DATAF(0.80480378866195679000), _DATAF(-0.59354096651077271000)},

1705 {_DATAF(0.80457609891891479000), _DATAF(-0.59384959936141968000)},

1706 {_DATAF(0.80434828996658325000), _DATAF(-0.59415805339813232000)},

1707 {_DATAF(0.80412036180496216000), _DATAF(-0.59446650743484497000)},

1708 {_DATAF(0.80389231443405151000), _DATAF(-0.59477484226226807000)},

1709 {_DATAF(0.80366420745849609000), _DATAF(-0.59508305788040161000)},

1710 {_DATAF(0.80343592166900635000), _DATAF(-0.59539121389389038000)},

1711 {_DATAF(0.80320751667022705000), _DATAF(-0.59569931030273438000)},

1712 {_DATAF(0.80297905206680298000), _DATAF(-0.59600728750228882000)},

1713 {_DATAF(0.80275040864944458000), _DATAF(-0.59631520509719849000)},

1714 {_DATAF(0.80252164602279663000), _DATAF(-0.59662300348281860000)},

1715 {_DATAF(0.80229282379150391000), _DATAF(-0.59693068265914917000)},

1716 {_DATAF(0.80206382274627686000), _DATAF(-0.59723836183547974000)},

1717 {_DATAF(0.80183470249176025000), _DATAF(-0.59754586219787598000)},

1718 {_DATAF(0.80160552263259888000), _DATAF(-0.59785336256027222000)},

1719 {_DATAF(0.80137616395950317000), _DATAF(-0.59816068410873413000)},

1720 {_DATAF(0.80114674568176270000), _DATAF(-0.59846800565719604000)},

1721 {_DATAF(0.80091714859008789000), _DATAF(-0.59877520799636841000)},

1722 {_DATAF(0.80068749189376831000), _DATAF(-0.59908229112625122000)},

1723 {_DATAF(0.80045765638351440000), _DATAF(-0.59938931465148926000)},

1724 {_DATAF(0.80022776126861572000), _DATAF(-0.59969621896743774000)},

1725 {_DATAF(0.79999768733978271000), _DATAF(-0.60000306367874146000)},

1726 {_DATAF(0.79976755380630493000), _DATAF(-0.60030978918075562000)},

1727 {_DATAF(0.79953724145889282000), _DATAF(-0.60061645507812500000)},

1728 {_DATAF(0.79930686950683594000), _DATAF(-0.60092306137084961000)},

1729 {_DATAF(0.79907637834548950000), _DATAF(-0.60122954845428467000)},

1730 {_DATAF(0.79884576797485352000), _DATAF(-0.60153591632843018000)},

1731 {_DATAF(0.79861497879028320000), _DATAF(-0.60184222459793091000)},

1732 {_DATAF(0.79838413000106812000), _DATAF(-0.60214847326278687000)},

1733 {_DATAF(0.79815316200256348000), _DATAF(-0.60245460271835327000)},

1734 {_DATAF(0.79792207479476929000), _DATAF(-0.60276067256927490000)},

1735 {_DATAF(0.79769086837768555000), _DATAF(-0.60306662321090698000)},

1736 {_DATAF(0.79745948314666748000), _DATAF(-0.60337245464324951000)},

1737 {_DATAF(0.79722803831100464000), _DATAF(-0.60367822647094727000)},

1738 {_DATAF(0.79699647426605225000), _DATAF(-0.60398393869400024000)},

1739 {_DATAF(0.79676479101181030000), _DATAF(-0.60428953170776367000)},

1740 {_DATAF(0.79653298854827881000), _DATAF(-0.60459506511688232000)},

1741 {_DATAF(0.79630106687545776000), _DATAF(-0.60490047931671143000)},

1742 {_DATAF(0.79606908559799194000), _DATAF(-0.60520577430725098000)},

1743 {_DATAF(0.79583692550659180000), _DATAF(-0.60551106929779053000)},

1744 {_DATAF(0.79560464620590210000), _DATAF(-0.60581618547439575000)},

1745 {_DATAF(0.79537224769592285000), _DATAF(-0.60612124204635620000)},

1746 {_DATAF(0.79513972997665405000), _DATAF(-0.60642623901367188000)},

1747 {_DATAF(0.79490715265274048000), _DATAF(-0.60673111677169800000)},

1748 {_DATAF(0.79467439651489258000), _DATAF(-0.60703593492507935000)},

1749 {_DATAF(0.79444152116775513000), _DATAF(-0.60734063386917114000)},

1750 {_DATAF(0.79420858621597290000), _DATAF(-0.60764527320861816000)},

1751 {_DATAF(0.79397547245025635000), _DATAF(-0.60794979333877563000)},

1752 {_DATAF(0.79374229907989502000), _DATAF(-0.60825425386428833000)},

1753 {_DATAF(0.79350894689559937000), _DATAF(-0.60855859518051147000)},

1754 {_DATAF(0.79327553510665894000), _DATAF(-0.60886281728744507000)},

1755 {_DATAF(0.79304194450378418000), _DATAF(-0.60916703939437866000)},

1756 {_DATAF(0.79280829429626465000), _DATAF(-0.60947108268737793000)},

1757 {_DATAF(0.79257452487945557000), _DATAF(-0.60977506637573242000)},

1758 {_DATAF(0.79234057664871216000), _DATAF(-0.61007899045944214000)},

1759 {_DATAF(0.79210656881332397000), _DATAF(-0.61038279533386230000)},

1760 {_DATAF(0.79187244176864624000), _DATAF(-0.61068654060363770000)},

1761 {_DATAF(0.79163819551467896000), _DATAF(-0.61099016666412354000)},

1762 {_DATAF(0.79140383005142212000), _DATAF(-0.61129373311996460000)},

1763 {_DATAF(0.79116934537887573000), _DATAF(-0.61159718036651611000)},

1764 {_DATAF(0.79093474149703979000), _DATAF(-0.61190050840377808000)},

1765 {_DATAF(0.79070001840591431000), _DATAF(-0.61220377683639526000)},

1766 {_DATAF(0.79046517610549927000), _DATAF(-0.61250698566436768000)},

1767 {_DATAF(0.79023021459579468000), _DATAF(-0.61281007528305054000)},

1768 {_DATAF(0.78999513387680054000), _DATAF(-0.61311310529708862000)},

1769 {_DATAF(0.78975999355316162000), _DATAF(-0.61341601610183716000)},

1770 {_DATAF(0.78952467441558838000), _DATAF(-0.61371880769729614000)},

1771 {_DATAF(0.78928923606872559000), _DATAF(-0.61402153968811035000)},

1772 {_DATAF(0.78905373811721802000), _DATAF(-0.61432421207427979000)},

1773 {_DATAF(0.78881806135177612000), _DATAF(-0.61462676525115967000)},

1774 {_DATAF(0.78858232498168945000), _DATAF(-0.61492919921875000000)},

1775 {_DATAF(0.78834640979766846000), _DATAF(-0.61523157358169556000)},

1776 {_DATAF(0.78811043500900269000), _DATAF(-0.61553388833999634000)},

1777 {_DATAF(0.78787434101104736000), _DATAF(-0.61583608388900757000)},

1778 {_DATAF(0.78763806819915771000), _DATAF(-0.61613816022872925000)},

1779 {_DATAF(0.78740173578262329000), _DATAF(-0.61644017696380615000)},

1780 {_DATAF(0.78716528415679932000), _DATAF(-0.61674207448959351000)},

1781 {_DATAF(0.78692871332168579000), _DATAF(-0.61704391241073608000)},

1782 {_DATAF(0.78669202327728271000), _DATAF(-0.61734563112258911000)},

1783 {_DATAF(0.78645521402359009000), _DATAF(-0.61764729022979736000)},

1784 {_DATAF(0.78621828556060791000), _DATAF(-0.61794888973236084000)},

1785 {_DATAF(0.78598123788833618000), _DATAF(-0.61825031042098999000)},

1786 {_DATAF(0.78574407100677490000), _DATAF(-0.61855173110961914000)},

1787 {_DATAF(0.78550684452056885000), _DATAF(-0.61885297298431396000)},

1788 {_DATAF(0.78526943922042847000), _DATAF(-0.61915415525436401000)},

1789 {_DATAF(0.78503191471099854000), _DATAF(-0.61945527791976929000)},

1790 {_DATAF(0.78479433059692383000), _DATAF(-0.61975628137588501000)},

1791 {_DATAF(0.78455656766891479000), _DATAF(-0.62005722522735596000)},

1792 {_DATAF(0.78431874513626099000), _DATAF(-0.62035804986953735000)},

1793 {_DATAF(0.78408080339431763000), _DATAF(-0.62065875530242920000)},

1794 {_DATAF(0.78384268283843994000), _DATAF(-0.62095940113067627000)},

1795 {_DATAF(0.78360450267791748000), _DATAF(-0.62125998735427856000)},

1796 {_DATAF(0.78336620330810547000), _DATAF(-0.62156045436859131000)},

1797 {_DATAF(0.78312778472900391000), _DATAF(-0.62186080217361450000)},

1798 {_DATAF(0.78288924694061279000), _DATAF(-0.62216109037399292000)},

1799 {_DATAF(0.78265058994293213000), _DATAF(-0.62246125936508179000)},

1800 {_DATAF(0.78241181373596191000), _DATAF(-0.62276136875152588000)},

1801 {_DATAF(0.78217291831970215000), _DATAF(-0.62306135892868042000)},

1802 {_DATAF(0.78193396329879761000), _DATAF(-0.62336128950119019000)},

1803 {_DATAF(0.78169482946395874000), _DATAF(-0.62366110086441040000)},

1804 {_DATAF(0.78145557641983032000), _DATAF(-0.62396085262298584000)},

1805 {_DATAF(0.78121626377105713000), _DATAF(-0.62426048517227173000)},

1806 {_DATAF(0.78097677230834961000), _DATAF(-0.62456005811691284000)},

1807 {_DATAF(0.78073722124099731000), _DATAF(-0.62485951185226440000)},

1808 {_DATAF(0.78049755096435547000), _DATAF(-0.62515884637832642000)},

1809 {_DATAF(0.78025776147842407000), _DATAF(-0.62545812129974365000)},

1810 {_DATAF(0.78001779317855835000), _DATAF(-0.62575727701187134000)},

1811 {_DATAF(0.77977776527404785000), _DATAF(-0.62605637311935425000)},

1812 {_DATAF(0.77953761816024780000), _DATAF(-0.62635540962219238000)},

1813 {_DATAF(0.77929735183715820000), _DATAF(-0.62665426731109619000)},

1814 {_DATAF(0.77905702590942383000), _DATAF(-0.62695312500000000000)},

1815 {_DATAF(0.77881652116775513000), _DATAF(-0.62725180387496948000)},

1816 {_DATAF(0.77857589721679688000), _DATAF(-0.62755042314529419000)},

1817 {_DATAF(0.77833521366119385000), _DATAF(-0.62784898281097412000)},

1818 {_DATAF(0.77809435129165649000), _DATAF(-0.62814742326736450000)},

1819 {_DATAF(0.77785342931747437000), _DATAF(-0.62844574451446533000)},

1820 {_DATAF(0.77761232852935791000), _DATAF(-0.62874400615692139000)},

1821 {_DATAF(0.77737116813659668000), _DATAF(-0.62904220819473267000)},

1822 {_DATAF(0.77712988853454590000), _DATAF(-0.62934023141860962000)},

1823 {_DATAF(0.77688848972320557000), _DATAF(-0.62963825464248657000)},

1824 {_DATAF(0.77664697170257568000), _DATAF(-0.62993609905242920000)},

1825 {_DATAF(0.77640533447265625000), _DATAF(-0.63023394346237183000)},

1826 {_DATAF(0.77616357803344727000), _DATAF(-0.63053160905838013000)},

1827 {_DATAF(0.77592170238494873000), _DATAF(-0.63082921504974365000)},

1828 {_DATAF(0.77567970752716064000), _DATAF(-0.63112676143646240000)},

1829 {_DATAF(0.77543765306472778000), _DATAF(-0.63142418861389160000)},

1830 {_DATAF(0.77519541978836060000), _DATAF(-0.63172149658203125000)},

1831 {_DATAF(0.77495312690734863000), _DATAF(-0.63201874494552612000)},

1832 {_DATAF(0.77471065521240234000), _DATAF(-0.63231587409973145000)},

1833 {_DATAF(0.77446812391281128000), _DATAF(-0.63261294364929199000)},

1834 {_DATAF(0.77422547340393066000), _DATAF(-0.63290989398956299000)},

1835 {_DATAF(0.77398270368576050000), _DATAF(-0.63320678472518921000)},

1836 {_DATAF(0.77373981475830078000), _DATAF(-0.63350355625152588000)},

1837 {_DATAF(0.77349680662155151000), _DATAF(-0.63380020856857300000)},

1838 {_DATAF(0.77325367927551270000), _DATAF(-0.63409680128097534000)},

1839 {_DATAF(0.77301043272018433000), _DATAF(-0.63439327478408813000)},

1840 {_DATAF(0.77276712656021118000), _DATAF(-0.63468968868255615000)},

1841 {_DATAF(0.77252364158630371000), _DATAF(-0.63498598337173462000)},

1842 {_DATAF(0.77228009700775146000), _DATAF(-0.63528221845626831000)},

1843 {_DATAF(0.77203637361526489000), _DATAF(-0.63557833433151245000)},

1844 {_DATAF(0.77179259061813354000), _DATAF(-0.63587433099746704000)},

1845 {_DATAF(0.77154868841171265000), _DATAF(-0.63617026805877686000)},

1846 {_DATAF(0.77130466699600220000), _DATAF(-0.63646614551544189000)},

1847 {_DATAF(0.77106052637100220000), _DATAF(-0.63676184415817261000)},

1848 {_DATAF(0.77081626653671265000), _DATAF(-0.63705748319625854000)},

1849 {_DATAF(0.77057188749313354000), _DATAF(-0.63735306262969971000)},

1850 {_DATAF(0.77032744884490967000), _DATAF(-0.63764852285385132000)},

1851 {_DATAF(0.77008283138275146000), _DATAF(-0.63794392347335815000)},

1852 {_DATAF(0.76983815431594849000), _DATAF(-0.63823920488357544000)},

1853 {_DATAF(0.76959329843521118000), _DATAF(-0.63853436708450317000)},

1854 {_DATAF(0.76934838294982910000), _DATAF(-0.63882946968078613000)},

1855 {_DATAF(0.76910334825515747000), _DATAF(-0.63912445306777954000)},

1856 {_DATAF(0.76885819435119629000), _DATAF(-0.63941931724548340000)},

1857 {_DATAF(0.76861292123794556000), _DATAF(-0.63971418142318726000)},

1858 {_DATAF(0.76836752891540527000), _DATAF(-0.64000886678695679000)},

1859 {_DATAF(0.76812201738357544000), _DATAF(-0.64030349254608154000)},

1860 {_DATAF(0.76787644624710083000), _DATAF(-0.64059799909591675000)},

1861 {_DATAF(0.76763069629669189000), _DATAF(-0.64089244604110718000)},

1862 {_DATAF(0.76738488674163818000), _DATAF(-0.64118677377700806000)},

1863 {_DATAF(0.76713889837265015000), _DATAF(-0.64148104190826416000)},

1864 {_DATAF(0.76689285039901733000), _DATAF(-0.64177513122558594000)},

1865 {_DATAF(0.76664668321609497000), _DATAF(-0.64206922054290771000)},

1866 {_DATAF(0.76640039682388306000), _DATAF(-0.64236319065093994000)},

1867 {_DATAF(0.76615399122238159000), _DATAF(-0.64265704154968262000)},

1868 {_DATAF(0.76590746641159058000), _DATAF(-0.64295083284378052000)},

1869 {_DATAF(0.76566088199615479000), _DATAF(-0.64324450492858887000)},

1870 {_DATAF(0.76541411876678467000), _DATAF(-0.64353805780410767000)},

1871 {_DATAF(0.76516723632812500000), _DATAF(-0.64383155107498169000)},

1872 {_DATAF(0.76492029428482056000), _DATAF(-0.64412492513656616000)},

1873 {_DATAF(0.76467323303222656000), _DATAF(-0.64441823959350586000)},

1874 {_DATAF(0.76442605257034302000), _DATAF(-0.64471143484115601000)},

1875 {_DATAF(0.76417875289916992000), _DATAF(-0.64500451087951660000)},

1876 {_DATAF(0.76393133401870728000), _DATAF(-0.64529752731323242000)},

1877 {_DATAF(0.76368379592895508000), _DATAF(-0.64559048414230347000)},

1878 {_DATAF(0.76343613862991333000), _DATAF(-0.64588326215744019000)},

1879 {_DATAF(0.76318842172622681000), _DATAF(-0.64617604017257690000)},

1880 {_DATAF(0.76294052600860596000), _DATAF(-0.64646863937377930000)},

1881 {_DATAF(0.76269257068634033000), _DATAF(-0.64676117897033691000)},

1882 {_DATAF(0.76244449615478516000), _DATAF(-0.64705359935760498000)},

1883 {_DATAF(0.76219630241394043000), _DATAF(-0.64734596014022827000)},

1884 {_DATAF(0.76194798946380615000), _DATAF(-0.64763820171356201000)},

1885 {_DATAF(0.76169955730438232000), _DATAF(-0.64793038368225098000)},

1886 {_DATAF(0.76145100593566895000), _DATAF(-0.64822244644165039000)},

1887 {_DATAF(0.76120239496231079000), _DATAF(-0.64851438999176025000)},

1888 {_DATAF(0.76095360517501831000), _DATAF(-0.64880627393722534000)},

1889 {_DATAF(0.76070475578308105000), _DATAF(-0.64909803867340088000)},

1890 {_DATAF(0.76045578718185425000), _DATAF(-0.64938974380493164000)},

1891 {_DATAF(0.76020669937133789000), _DATAF(-0.64968132972717285000)},

1892 {_DATAF(0.75995749235153198000), _DATAF(-0.64997279644012451000)},

1893 {_DATAF(0.75970816612243652000), _DATAF(-0.65026420354843140000)},

1894 {_DATAF(0.75945872068405151000), _DATAF(-0.65055549144744873000)},

1895 {_DATAF(0.75920921564102173000), _DATAF(-0.65084666013717651000)},

1896 {_DATAF(0.75895953178405762000), _DATAF(-0.65113776922225952000)},

1897 {_DATAF(0.75870978832244873000), _DATAF(-0.65142881870269775000)},

1898 {_DATAF(0.75845992565155029000), _DATAF(-0.65171968936920166000)},

1899 {_DATAF(0.75820988416671753000), _DATAF(-0.65201056003570557000)},

1900 {_DATAF(0.75795978307723999000), _DATAF(-0.65230125188827515000)},

1901 {_DATAF(0.75770962238311768000), _DATAF(-0.65259188413619995000)},

1902 {_DATAF(0.75745928287506104000), _DATAF(-0.65288239717483521000)},

1903 {_DATAF(0.75720882415771484000), _DATAF(-0.65317285060882568000)},

1904 {_DATAF(0.75695830583572388000), _DATAF(-0.65346318483352661000)},

1905 {_DATAF(0.75670766830444336000), _DATAF(-0.65375339984893799000)},

1906 {_DATAF(0.75645685195922852000), _DATAF(-0.65404355525970459000)},

1907 {_DATAF(0.75620597600936890000), _DATAF(-0.65433359146118164000)},

1908 {_DATAF(0.75595504045486450000), _DATAF(-0.65462356805801392000)},

1909 {_DATAF(0.75570392608642578000), _DATAF(-0.65491342544555664000)},

1910 {_DATAF(0.75545269250869751000), _DATAF(-0.65520316362380981000)},

1911 {_DATAF(0.75520139932632446000), _DATAF(-0.65549284219741821000)},

1912 {_DATAF(0.75494992733001709000), _DATAF(-0.65578240156173706000)},

1913 {_DATAF(0.75469839572906494000), _DATAF(-0.65607190132141113000)},

1914 {_DATAF(0.75444674491882324000), _DATAF(-0.65636128187179565000)},

1915 {_DATAF(0.75419497489929199000), _DATAF(-0.65665054321289063000)},

1916 {_DATAF(0.75394308567047119000), _DATAF(-0.65693974494934082000)},

1917 {_DATAF(0.75369113683700562000), _DATAF(-0.65722882747650146000)},

1918 {_DATAF(0.75343900918960571000), _DATAF(-0.65751779079437256000)},

1919 {_DATAF(0.75318682193756104000), _DATAF(-0.65780669450759888000)},

1920 {_DATAF(0.75293445587158203000), _DATAF(-0.65809547901153564000)},

1921 {_DATAF(0.75268203020095825000), _DATAF(-0.65838420391082764000)},

1922 {_DATAF(0.75242948532104492000), _DATAF(-0.65867280960083008000)},

1923 {_DATAF(0.75217682123184204000), _DATAF(-0.65896129608154297000)},

1924 {_DATAF(0.75192409753799438000), _DATAF(-0.65924972295761108000)},

1925 {_DATAF(0.75167119503021240000), _DATAF(-0.65953803062438965000)},

1926 {_DATAF(0.75141823291778564000), _DATAF(-0.65982621908187866000)},

1927 {_DATAF(0.75116515159606934000), _DATAF(-0.66011434793472290000)},

1928 {_DATAF(0.75091195106506348000), _DATAF(-0.66040235757827759000)},

1929 {_DATAF(0.75065863132476807000), _DATAF(-0.66069030761718750000)},

1930 {_DATAF(0.75040519237518311000), _DATAF(-0.66097813844680786000)},

1931 {_DATAF(0.75015163421630859000), _DATAF(-0.66126585006713867000)},

1932 {_DATAF(0.74989801645278931000), _DATAF(-0.66155344247817993000)},

1933 {_DATAF(0.74964421987533569000), _DATAF(-0.66184097528457642000)},

1934 {_DATAF(0.74939036369323730000), _DATAF(-0.66212844848632813000)},

1935 {_DATAF(0.74913638830184937000), _DATAF(-0.66241580247879028000)},

1936 {_DATAF(0.74888229370117188000), _DATAF(-0.66270303726196289000)},

1937 {_DATAF(0.74862807989120483000), _DATAF(-0.66299015283584595000)},

1938 {_DATAF(0.74837380647659302000), _DATAF(-0.66327720880508423000)},

1939 {_DATAF(0.74811935424804688000), _DATAF(-0.66356414556503296000)},

1940 {_DATAF(0.74786484241485596000), _DATAF(-0.66385102272033691000)},

1941 {_DATAF(0.74761021137237549000), _DATAF(-0.66413778066635132000)},

1942 {_DATAF(0.74735546112060547000), _DATAF(-0.66442441940307617000)},

1943 {_DATAF(0.74710059165954590000), _DATAF(-0.66471099853515625000)},

1944 {_DATAF(0.74684566259384155000), _DATAF(-0.66499745845794678000)},

1945 {_DATAF(0.74659055471420288000), _DATAF(-0.66528379917144775000)},

1946 {_DATAF(0.74633538722991943000), _DATAF(-0.66557008028030396000)},

1947 {_DATAF(0.74608010053634644000), _DATAF(-0.66585624217987061000)},

1948 {_DATAF(0.74582469463348389000), _DATAF(-0.66614228487014771000)},

1949 {_DATAF(0.74556916952133179000), _DATAF(-0.66642826795578003000)},

1950 {_DATAF(0.74531352519989014000), _DATAF(-0.66671413183212280000)},

1951 {_DATAF(0.74505776166915894000), _DATAF(-0.66699993610382080000)},

1952 {_DATAF(0.74480193853378296000), _DATAF(-0.66728562116622925000)},

1953 {_DATAF(0.74454599618911743000), _DATAF(-0.66757118701934814000)},

1954 {_DATAF(0.74428993463516235000), _DATAF(-0.66785663366317749000)},

1955 {_DATAF(0.74403375387191772000), _DATAF(-0.66814202070236206000)},

1956 {_DATAF(0.74377745389938354000), _DATAF(-0.66842734813690186000)},

1957 {_DATAF(0.74352109432220459000), _DATAF(-0.66871249675750732000)},

1958 {_DATAF(0.74326455593109131000), _DATAF(-0.66899758577346802000)},

1959 {_DATAF(0.74300795793533325000), _DATAF(-0.66928261518478394000)},

1960 {_DATAF(0.74275124073028564000), _DATAF(-0.66956746578216553000)},

1961 {_DATAF(0.74249440431594849000), _DATAF(-0.66985225677490234000)},

1962 {_DATAF(0.74223744869232178000), _DATAF(-0.67013698816299438000)},

1963 {_DATAF(0.74198043346405029000), _DATAF(-0.67042154073715210000)},

1964 {_DATAF(0.74172323942184448000), _DATAF(-0.67070603370666504000)},

1965 {_DATAF(0.74146598577499390000), _DATAF(-0.67099046707153320000)},

1966 {_DATAF(0.74120861291885376000), _DATAF(-0.67127478122711182000)},

1967 {_DATAF(0.74095112085342407000), _DATAF(-0.67155897617340088000)},

1968 {_DATAF(0.74069350957870483000), _DATAF(-0.67184305191040039000)},

1969 {_DATAF(0.74043583869934082000), _DATAF(-0.67212706804275513000)},

1970 {_DATAF(0.74017798900604248000), _DATAF(-0.67241096496582031000)},

1971 {_DATAF(0.73992007970809937000), _DATAF(-0.67269474267959595000)},

1972 {_DATAF(0.73966205120086670000), _DATAF(-0.67297846078872681000)},

1973 {_DATAF(0.73940390348434448000), _DATAF(-0.67326205968856812000)},

1974 {_DATAF(0.73914569616317749000), _DATAF(-0.67354559898376465000)},

1975 {_DATAF(0.73888731002807617000), _DATAF(-0.67382901906967163000)},

1976 {_DATAF(0.73862886428833008000), _DATAF(-0.67411231994628906000)},

1977 {_DATAF(0.73837029933929443000), _DATAF(-0.67439550161361694000)},

1978 {_DATAF(0.73811161518096924000), _DATAF(-0.67467862367630005000)},

1979 {_DATAF(0.73785281181335449000), _DATAF(-0.67496162652969360000)},

1980 {_DATAF(0.73759388923645020000), _DATAF(-0.67524456977844238000)},

1981 {_DATAF(0.73733490705490112000), _DATAF(-0.67552739381790161000)},

1982 {_DATAF(0.73707580566406250000), _DATAF(-0.67581009864807129000)},

1983 {_DATAF(0.73681658506393433000), _DATAF(-0.67609268426895142000)},

1984 {_DATAF(0.73655724525451660000), _DATAF(-0.67637521028518677000)},

1985 {_DATAF(0.73629778623580933000), _DATAF(-0.67665761709213257000)},

1986 {_DATAF(0.73603826761245728000), _DATAF(-0.67693996429443359000)},

1987 {_DATAF(0.73577857017517090000), _DATAF(-0.67722219228744507000)},

1988 {_DATAF(0.73551881313323975000), _DATAF(-0.67750430107116699000)},

1989 {_DATAF(0.73525893688201904000), _DATAF(-0.67778629064559937000)},

1990 {_DATAF(0.73499894142150879000), _DATAF(-0.67806822061538696000)},

1991 {_DATAF(0.73473888635635376000), _DATAF(-0.67835003137588501000)},

1992 {_DATAF(0.73447865247726440000), _DATAF(-0.67863178253173828000)},

1993 {_DATAF(0.73421835899353027000), _DATAF(-0.67891335487365723000)},

1994 {_DATAF(0.73395794630050659000), _DATAF(-0.67919492721557617000)},

1995 {_DATAF(0.73369741439819336000), _DATAF(-0.67947632074356079000)},

1996 {_DATAF(0.73343682289123535000), _DATAF(-0.67975765466690063000)},

1997 {_DATAF(0.73317605257034302000), _DATAF(-0.68003886938095093000)},

1998 {_DATAF(0.73291522264480591000), _DATAF(-0.68031996488571167000)},

1999 {_DATAF(0.73265427350997925000), _DATAF(-0.68060100078582764000)},

2000 {_DATAF(0.73239320516586304000), _DATAF(-0.68088191747665405000)},

2001 {_DATAF(0.73213201761245728000), _DATAF(-0.68116271495819092000)},

2002 {_DATAF(0.73187077045440674000), _DATAF(-0.68144345283508301000)},

2003 {_DATAF(0.73160940408706665000), _DATAF(-0.68172407150268555000)},

2004 {_DATAF(0.73134791851043701000), _DATAF(-0.68200457096099854000)},

2005 {_DATAF(0.73108631372451782000), _DATAF(-0.68228501081466675000)},

2006 {_DATAF(0.73082458972930908000), _DATAF(-0.68256533145904541000)},

2007 {_DATAF(0.73056274652481079000), _DATAF(-0.68284553289413452000)},

2008 {_DATAF(0.73030084371566772000), _DATAF(-0.68312567472457886000)},

2009 {_DATAF(0.73003882169723511000), _DATAF(-0.68340569734573364000)},

2010 {_DATAF(0.72977668046951294000), _DATAF(-0.68368560075759888000)},

2011 {_DATAF(0.72951442003250122000), _DATAF(-0.68396538496017456000)},

2012 {_DATAF(0.72925209999084473000), _DATAF(-0.68424510955810547000)},

2013 {_DATAF(0.72898960113525391000), _DATAF(-0.68452471494674683000)},

2014 {_DATAF(0.72872704267501831000), _DATAF(-0.68480426073074341000)},

2015 {_DATAF(0.72846436500549316000), _DATAF(-0.68508368730545044000)},

2016 {_DATAF(0.72820162773132324000), _DATAF(-0.68536299467086792000)},

2017 {_DATAF(0.72793871164321899000), _DATAF(-0.68564218282699585000)},

2018 {_DATAF(0.72767573595046997000), _DATAF(-0.68592131137847900000)},

2019 {_DATAF(0.72741264104843140000), _DATAF(-0.68620032072067261000)},

2020 {_DATAF(0.72714942693710327000), _DATAF(-0.68647921085357666000)},

2021 {_DATAF(0.72688609361648560000), _DATAF(-0.68675804138183594000)},

2022 {_DATAF(0.72662270069122314000), _DATAF(-0.68703675270080566000)},

2023 {_DATAF(0.72635912895202637000), _DATAF(-0.68731534481048584000)},

2024 {_DATAF(0.72609549760818481000), _DATAF(-0.68759381771087646000)},

2025 {_DATAF(0.72583180665969849000), _DATAF(-0.68787223100662231000)},

2026 {_DATAF(0.72556793689727783000), _DATAF(-0.68815052509307861000)},

2027 {_DATAF(0.72530394792556763000), _DATAF(-0.68842875957489014000)},

2028 {_DATAF(0.72503989934921265000), _DATAF(-0.68870687484741211000)},

2029 {_DATAF(0.72477573156356812000), _DATAF(-0.68898487091064453000)},

2030 {_DATAF(0.72451144456863403000), _DATAF(-0.68926274776458740000)},

2031 {_DATAF(0.72424709796905518000), _DATAF(-0.68954056501388550000)},

2032 {_DATAF(0.72398257255554199000), _DATAF(-0.68981826305389404000)},

2033 {_DATAF(0.72371798753738403000), _DATAF(-0.69009584188461304000)},

2034 {_DATAF(0.72345328330993652000), _DATAF(-0.69037330150604248000)},

2035 {_DATAF(0.72318845987319946000), _DATAF(-0.69065070152282715000)},

2036 {_DATAF(0.72292357683181763000), _DATAF(-0.69092798233032227000)},

2037 {_DATAF(0.72265857458114624000), _DATAF(-0.69120520353317261000)},

2038 {_DATAF(0.72239345312118530000), _DATAF(-0.69148224592208862000)},

2039 {_DATAF(0.72212821245193481000), _DATAF(-0.69175922870635986000)},

2040 {_DATAF(0.72186285257339478000), _DATAF(-0.69203615188598633000)},

2041 {_DATAF(0.72159743309020996000), _DATAF(-0.69231289625167847000)},

2042 {_DATAF(0.72133183479309082000), _DATAF(-0.69258958101272583000)},

2043 {_DATAF(0.72106617689132690000), _DATAF(-0.69286614656448364000)},

2044 {_DATAF(0.72080045938491821000), _DATAF(-0.69314265251159668000)},

2045 {_DATAF(0.72053456306457520000), _DATAF(-0.69341903924942017000)},

2046 {_DATAF(0.72026860713958740000), _DATAF(-0.69369530677795410000)},

2047 {_DATAF(0.72000253200531006000), _DATAF(-0.69397145509719849000)},

2048 {_DATAF(0.71973633766174316000), _DATAF(-0.69424754381179810000)},

2049 {_DATAF(0.71947002410888672000), _DATAF(-0.69452351331710815000)},

2050 {_DATAF(0.71920365095138550000), _DATAF(-0.69479936361312866000)},

2051 {_DATAF(0.71893709897994995000), _DATAF(-0.69507509469985962000)},

2052 {_DATAF(0.71867048740386963000), _DATAF(-0.69535076618194580000)},

2053 {_DATAF(0.71840381622314453000), _DATAF(-0.69562631845474243000)},

2054 {_DATAF(0.71813696622848511000), _DATAF(-0.69590175151824951000)},

2055 {_DATAF(0.71787005662918091000), _DATAF(-0.69617712497711182000)},

2056 {_DATAF(0.71760302782058716000), _DATAF(-0.69645237922668457000)},

2057 {_DATAF(0.71733587980270386000), _DATAF(-0.69672751426696777000)},

2058 {_DATAF(0.71706861257553101000), _DATAF(-0.69700258970260620000)},

2059 {_DATAF(0.71680128574371338000), _DATAF(-0.69727748632431030000)},

2060 {_DATAF(0.71653383970260620000), _DATAF(-0.69755232334136963000)},

2061 {_DATAF(0.71626627445220947000), _DATAF(-0.69782710075378418000)},

2062 {_DATAF(0.71599858999252319000), _DATAF(-0.69810169935226440000)},

2063 {_DATAF(0.71573084592819214000), _DATAF(-0.69837623834609985000)},

2064 {_DATAF(0.71546292304992676000), _DATAF(-0.69865065813064575000)},

2065 {_DATAF(0.71519494056701660000), _DATAF(-0.69892501831054688000)},

2066 {_DATAF(0.71492689847946167000), _DATAF(-0.69919919967651367000)},

2067 {_DATAF(0.71465867757797241000), _DATAF(-0.69947332143783569000)},

2068 {_DATAF(0.71439039707183838000), _DATAF(-0.69974738359451294000)},

2069 {_DATAF(0.71412199735641479000), _DATAF(-0.70002126693725586000)},

2070 {_DATAF(0.71385347843170166000), _DATAF(-0.70029509067535400000)},

2071 {_DATAF(0.71358484029769897000), _DATAF(-0.70056879520416260000)},

2072 {_DATAF(0.71331614255905151000), _DATAF(-0.70084238052368164000)},

2073 {_DATAF(0.71304732561111450000), _DATAF(-0.70111590623855591000)},

2074 {_DATAF(0.71277838945388794000), _DATAF(-0.70138931274414063000)},

2075 {_DATAF(0.71250939369201660000), _DATAF(-0.70166260004043579000)},

2076 {_DATAF(0.71224021911621094000), _DATAF(-0.70193576812744141000)},

2077 {_DATAF(0.71197098493576050000), _DATAF(-0.70220887660980225000)},

2078 {_DATAF(0.71170163154602051000), _DATAF(-0.70248186588287354000)},

2079 {_DATAF(0.71143221855163574000), _DATAF(-0.70275473594665527000)},

2080 {_DATAF(0.71116262674331665000), _DATAF(-0.70302754640579224000)},

2081 {_DATAF(0.71089297533035278000), _DATAF(-0.70330017805099487000)},

2082 {_DATAF(0.71062320470809937000), _DATAF(-0.70357275009155273000)},

2083 {_DATAF(0.71035337448120117000), _DATAF(-0.70384526252746582000)},

2084 {_DATAF(0.71008336544036865000), _DATAF(-0.70411759614944458000)},

2085 {_DATAF(0.70981329679489136000), _DATAF(-0.70438987016677856000)},

2086 {_DATAF(0.70954310894012451000), _DATAF(-0.70466202497482300000)},

2087 {_DATAF(0.70927280187606812000), _DATAF(-0.70493406057357788000)},

2088 {_DATAF(0.70900243520736694000), _DATAF(-0.70520603656768799000)},

2089 {_DATAF(0.70873194932937622000), _DATAF(-0.70547789335250854000)},

2090 {_DATAF(0.70846134424209595000), _DATAF(-0.70574963092803955000)},

2091 {_DATAF(0.70819061994552612000), _DATAF(-0.70602124929428101000)},

2092 {_DATAF(0.70791983604431152000), _DATAF(-0.70629280805587769000)},

2093 {_DATAF(0.70764893293380737000), _DATAF(-0.70656424760818481000)},

2094 {_DATAF(0.70737791061401367000), _DATAF(-0.70683556795120239000)},

2095 {_DATAF(0.70710676908493042000), _DATAF(-0.70710676908493042000)},

2096 {_DATAF(0.70683556795120239000), _DATAF(-0.70737791061401367000)},

2097 {_DATAF(0.70656424760818481000), _DATAF(-0.70764893293380737000)},

2098 {_DATAF(0.70629280805587769000), _DATAF(-0.70791983604431152000)},

2099 {_DATAF(0.70602124929428101000), _DATAF(-0.70819061994552612000)},

2100 {_DATAF(0.70574963092803955000), _DATAF(-0.70846134424209595000)},

2101 {_DATAF(0.70547789335250854000), _DATAF(-0.70873194932937622000)},

2102 {_DATAF(0.70520603656768799000), _DATAF(-0.70900243520736694000)},

2103 {_DATAF(0.70493406057357788000), _DATAF(-0.70927280187606812000)},

2104 {_DATAF(0.70466202497482300000), _DATAF(-0.70954310894012451000)},

2105 {_DATAF(0.70438987016677856000), _DATAF(-0.70981329679489136000)},

2106 {_DATAF(0.70411759614944458000), _DATAF(-0.71008336544036865000)},

2107 {_DATAF(0.70384526252746582000), _DATAF(-0.71035337448120117000)},

2108 {_DATAF(0.70357275009155273000), _DATAF(-0.71062320470809937000)},

2109 {_DATAF(0.70330017805099487000), _DATAF(-0.71089297533035278000)},

2110 {_DATAF(0.70302754640579224000), _DATAF(-0.71116262674331665000)},

2111 {_DATAF(0.70275473594665527000), _DATAF(-0.71143221855163574000)},

2112 {_DATAF(0.70248186588287354000), _DATAF(-0.71170163154602051000)},

2113 {_DATAF(0.70220887660980225000), _DATAF(-0.71197098493576050000)},

2114 {_DATAF(0.70193576812744141000), _DATAF(-0.71224021911621094000)},

2115 {_DATAF(0.70166260004043579000), _DATAF(-0.71250939369201660000)},

2116 {_DATAF(0.70138931274414063000), _DATAF(-0.71277838945388794000)},

2117 {_DATAF(0.70111590623855591000), _DATAF(-0.71304732561111450000)},

2118 {_DATAF(0.70084238052368164000), _DATAF(-0.71331614255905151000)},

2119 {_DATAF(0.70056879520416260000), _DATAF(-0.71358484029769897000)},

2120 {_DATAF(0.70029509067535400000), _DATAF(-0.71385347843170166000)},

2121 {_DATAF(0.70002126693725586000), _DATAF(-0.71412199735641479000)},

2122 {_DATAF(0.69974738359451294000), _DATAF(-0.71439039707183838000)},

2123 {_DATAF(0.69947332143783569000), _DATAF(-0.71465867757797241000)},

2124 {_DATAF(0.69919919967651367000), _DATAF(-0.71492689847946167000)},

2125 {_DATAF(0.69892501831054688000), _DATAF(-0.71519494056701660000)},

2126 {_DATAF(0.69865065813064575000), _DATAF(-0.71546292304992676000)},

2127 {_DATAF(0.69837623834609985000), _DATAF(-0.71573084592819214000)},

2128 {_DATAF(0.69810169935226440000), _DATAF(-0.71599858999252319000)},

2129 {_DATAF(0.69782710075378418000), _DATAF(-0.71626627445220947000)},

2130 {_DATAF(0.69755232334136963000), _DATAF(-0.71653383970260620000)},

2131 {_DATAF(0.69727748632431030000), _DATAF(-0.71680128574371338000)},

2132 {_DATAF(0.69700258970260620000), _DATAF(-0.71706861257553101000)},

2133 {_DATAF(0.69672751426696777000), _DATAF(-0.71733587980270386000)},

2134 {_DATAF(0.69645237922668457000), _DATAF(-0.71760302782058716000)},

2135 {_DATAF(0.69617712497711182000), _DATAF(-0.71787005662918091000)},

2136 {_DATAF(0.69590175151824951000), _DATAF(-0.71813696622848511000)},

2137 {_DATAF(0.69562631845474243000), _DATAF(-0.71840381622314453000)},

2138 {_DATAF(0.69535076618194580000), _DATAF(-0.71867048740386963000)},

2139 {_DATAF(0.69507509469985962000), _DATAF(-0.71893709897994995000)},

2140 {_DATAF(0.69479936361312866000), _DATAF(-0.71920365095138550000)},

2141 {_DATAF(0.69452351331710815000), _DATAF(-0.71947002410888672000)},

2142 {_DATAF(0.69424754381179810000), _DATAF(-0.71973633766174316000)},

2143 {_DATAF(0.69397145509719849000), _DATAF(-0.72000253200531006000)},

2144 {_DATAF(0.69369530677795410000), _DATAF(-0.72026860713958740000)},

2145 {_DATAF(0.69341903924942017000), _DATAF(-0.72053456306457520000)},

2146 {_DATAF(0.69314265251159668000), _DATAF(-0.72080045938491821000)},

2147 {_DATAF(0.69286614656448364000), _DATAF(-0.72106617689132690000)},

2148 {_DATAF(0.69258958101272583000), _DATAF(-0.72133183479309082000)},

2149 {_DATAF(0.69231289625167847000), _DATAF(-0.72159743309020996000)},

2150 {_DATAF(0.69203615188598633000), _DATAF(-0.72186285257339478000)},

2151 {_DATAF(0.69175922870635986000), _DATAF(-0.72212821245193481000)},

2152 {_DATAF(0.69148224592208862000), _DATAF(-0.72239345312118530000)},

2153 {_DATAF(0.69120520353317261000), _DATAF(-0.72265857458114624000)},

2154 {_DATAF(0.69092798233032227000), _DATAF(-0.72292357683181763000)},

2155 {_DATAF(0.69065070152282715000), _DATAF(-0.72318845987319946000)},

2156 {_DATAF(0.69037330150604248000), _DATAF(-0.72345328330993652000)},

2157 {_DATAF(0.69009584188461304000), _DATAF(-0.72371798753738403000)},

2158 {_DATAF(0.68981826305389404000), _DATAF(-0.72398257255554199000)},

2159 {_DATAF(0.68954056501388550000), _DATAF(-0.72424709796905518000)},

2160 {_DATAF(0.68926274776458740000), _DATAF(-0.72451144456863403000)},

2161 {_DATAF(0.68898487091064453000), _DATAF(-0.72477573156356812000)},

2162 {_DATAF(0.68870687484741211000), _DATAF(-0.72503989934921265000)},

2163 {_DATAF(0.68842875957489014000), _DATAF(-0.72530394792556763000)},

2164 {_DATAF(0.68815052509307861000), _DATAF(-0.72556793689727783000)},

2165 {_DATAF(0.68787223100662231000), _DATAF(-0.72583180665969849000)},

2166 {_DATAF(0.68759381771087646000), _DATAF(-0.72609549760818481000)},

2167 {_DATAF(0.68731534481048584000), _DATAF(-0.72635912895202637000)},

2168 {_DATAF(0.68703675270080566000), _DATAF(-0.72662270069122314000)},

2169 {_DATAF(0.68675804138183594000), _DATAF(-0.72688609361648560000)},

2170 {_DATAF(0.68647921085357666000), _DATAF(-0.72714942693710327000)},

2171 {_DATAF(0.68620032072067261000), _DATAF(-0.72741264104843140000)},

2172 {_DATAF(0.68592131137847900000), _DATAF(-0.72767573595046997000)},

2173 {_DATAF(0.68564218282699585000), _DATAF(-0.72793871164321899000)},

2174 {_DATAF(0.68536299467086792000), _DATAF(-0.72820162773132324000)},

2175 {_DATAF(0.68508368730545044000), _DATAF(-0.72846436500549316000)},

2176 {_DATAF(0.68480426073074341000), _DATAF(-0.72872704267501831000)},

2177 {_DATAF(0.68452471494674683000), _DATAF(-0.72898960113525391000)},

2178 {_DATAF(0.68424510955810547000), _DATAF(-0.72925209999084473000)},

2179 {_DATAF(0.68396538496017456000), _DATAF(-0.72951442003250122000)},

2180 {_DATAF(0.68368560075759888000), _DATAF(-0.72977668046951294000)},

2181 {_DATAF(0.68340569734573364000), _DATAF(-0.73003882169723511000)},

2182 {_DATAF(0.68312567472457886000), _DATAF(-0.73030084371566772000)},

2183 {_DATAF(0.68284553289413452000), _DATAF(-0.73056274652481079000)},

2184 {_DATAF(0.68256533145904541000), _DATAF(-0.73082458972930908000)},

2185 {_DATAF(0.68228501081466675000), _DATAF(-0.73108631372451782000)},

2186 {_DATAF(0.68200457096099854000), _DATAF(-0.73134791851043701000)},

2187 {_DATAF(0.68172407150268555000), _DATAF(-0.73160940408706665000)},

2188 {_DATAF(0.68144345283508301000), _DATAF(-0.73187077045440674000)},

2189 {_DATAF(0.68116271495819092000), _DATAF(-0.73213201761245728000)},

2190 {_DATAF(0.68088191747665405000), _DATAF(-0.73239320516586304000)},

2191 {_DATAF(0.68060100078582764000), _DATAF(-0.73265427350997925000)},

2192 {_DATAF(0.68031996488571167000), _DATAF(-0.73291522264480591000)},

2193 {_DATAF(0.68003886938095093000), _DATAF(-0.73317605257034302000)},

2194 {_DATAF(0.67975765466690063000), _DATAF(-0.73343682289123535000)},

2195 {_DATAF(0.67947632074356079000), _DATAF(-0.73369741439819336000)},

2196 {_DATAF(0.67919492721557617000), _DATAF(-0.73395794630050659000)},

2197 {_DATAF(0.67891335487365723000), _DATAF(-0.73421835899353027000)},

2198 {_DATAF(0.67863178253173828000), _DATAF(-0.73447865247726440000)},

2199 {_DATAF(0.67835003137588501000), _DATAF(-0.73473888635635376000)},

2200 {_DATAF(0.67806822061538696000), _DATAF(-0.73499894142150879000)},

2201 {_DATAF(0.67778629064559937000), _DATAF(-0.73525893688201904000)},

2202 {_DATAF(0.67750430107116699000), _DATAF(-0.73551881313323975000)},

2203 {_DATAF(0.67722219228744507000), _DATAF(-0.73577857017517090000)},

2204 {_DATAF(0.67693996429443359000), _DATAF(-0.73603826761245728000)},

2205 {_DATAF(0.67665761709213257000), _DATAF(-0.73629778623580933000)},

2206 {_DATAF(0.67637521028518677000), _DATAF(-0.73655724525451660000)},

2207 {_DATAF(0.67609268426895142000), _DATAF(-0.73681658506393433000)},

2208 {_DATAF(0.67581009864807129000), _DATAF(-0.73707580566406250000)},

2209 {_DATAF(0.67552739381790161000), _DATAF(-0.73733490705490112000)},

2210 {_DATAF(0.67524456977844238000), _DATAF(-0.73759388923645020000)},

2211 {_DATAF(0.67496162652969360000), _DATAF(-0.73785281181335449000)},

2212 {_DATAF(0.67467862367630005000), _DATAF(-0.73811161518096924000)},

2213 {_DATAF(0.67439550161361694000), _DATAF(-0.73837029933929443000)},

2214 {_DATAF(0.67411231994628906000), _DATAF(-0.73862886428833008000)},

2215 {_DATAF(0.67382901906967163000), _DATAF(-0.73888731002807617000)},

2216 {_DATAF(0.67354559898376465000), _DATAF(-0.73914569616317749000)},

2217 {_DATAF(0.67326205968856812000), _DATAF(-0.73940390348434448000)},

2218 {_DATAF(0.67297846078872681000), _DATAF(-0.73966205120086670000)},

2219 {_DATAF(0.67269474267959595000), _DATAF(-0.73992007970809937000)},

2220 {_DATAF(0.67241096496582031000), _DATAF(-0.74017798900604248000)},

2221 {_DATAF(0.67212706804275513000), _DATAF(-0.74043583869934082000)},

2222 {_DATAF(0.67184305191040039000), _DATAF(-0.74069350957870483000)},

2223 {_DATAF(0.67155897617340088000), _DATAF(-0.74095112085342407000)},

2224 {_DATAF(0.67127478122711182000), _DATAF(-0.74120861291885376000)},

2225 {_DATAF(0.67099046707153320000), _DATAF(-0.74146598577499390000)},

2226 {_DATAF(0.67070603370666504000), _DATAF(-0.74172323942184448000)},

2227 {_DATAF(0.67042154073715210000), _DATAF(-0.74198043346405029000)},

2228 {_DATAF(0.67013698816299438000), _DATAF(-0.74223744869232178000)},

2229 {_DATAF(0.66985225677490234000), _DATAF(-0.74249440431594849000)},

2230 {_DATAF(0.66956746578216553000), _DATAF(-0.74275124073028564000)},

2231 {_DATAF(0.66928261518478394000), _DATAF(-0.74300795793533325000)},

2232 {_DATAF(0.66899758577346802000), _DATAF(-0.74326455593109131000)},

2233 {_DATAF(0.66871249675750732000), _DATAF(-0.74352109432220459000)},

2234 {_DATAF(0.66842734813690186000), _DATAF(-0.74377745389938354000)},

2235 {_DATAF(0.66814202070236206000), _DATAF(-0.74403375387191772000)},

2236 {_DATAF(0.66785663366317749000), _DATAF(-0.74428993463516235000)},

2237 {_DATAF(0.66757118701934814000), _DATAF(-0.74454599618911743000)},

2238 {_DATAF(0.66728562116622925000), _DATAF(-0.74480193853378296000)},

2239 {_DATAF(0.66699993610382080000), _DATAF(-0.74505776166915894000)},

2240 {_DATAF(0.66671413183212280000), _DATAF(-0.74531352519989014000)},

2241 {_DATAF(0.66642826795578003000), _DATAF(-0.74556916952133179000)},

2242 {_DATAF(0.66614228487014771000), _DATAF(-0.74582469463348389000)},

2243 {_DATAF(0.66585624217987061000), _DATAF(-0.74608010053634644000)},

2244 {_DATAF(0.66557008028030396000), _DATAF(-0.74633538722991943000)},

2245 {_DATAF(0.66528379917144775000), _DATAF(-0.74659055471420288000)},

2246 {_DATAF(0.66499745845794678000), _DATAF(-0.74684566259384155000)},

2247 {_DATAF(0.66471099853515625000), _DATAF(-0.74710059165954590000)},

2248 {_DATAF(0.66442441940307617000), _DATAF(-0.74735546112060547000)},

2249 {_DATAF(0.66413778066635132000), _DATAF(-0.74761021137237549000)},

2250 {_DATAF(0.66385102272033691000), _DATAF(-0.74786484241485596000)},

2251 {_DATAF(0.66356414556503296000), _DATAF(-0.74811935424804688000)},

2252 {_DATAF(0.66327720880508423000), _DATAF(-0.74837380647659302000)},

2253 {_DATAF(0.66299015283584595000), _DATAF(-0.74862807989120483000)},

2254 {_DATAF(0.66270303726196289000), _DATAF(-0.74888229370117188000)},

2255 {_DATAF(0.66241580247879028000), _DATAF(-0.74913638830184937000)},

2256 {_DATAF(0.66212844848632813000), _DATAF(-0.74939036369323730000)},

2257 {_DATAF(0.66184097528457642000), _DATAF(-0.74964421987533569000)},

2258 {_DATAF(0.66155344247817993000), _DATAF(-0.74989801645278931000)},

2259 {_DATAF(0.66126585006713867000), _DATAF(-0.75015163421630859000)},

2260 {_DATAF(0.66097813844680786000), _DATAF(-0.75040519237518311000)},

2261 {_DATAF(0.66069030761718750000), _DATAF(-0.75065863132476807000)},

2262 {_DATAF(0.66040235757827759000), _DATAF(-0.75091195106506348000)},

2263 {_DATAF(0.66011434793472290000), _DATAF(-0.75116515159606934000)},

2264 {_DATAF(0.65982621908187866000), _DATAF(-0.75141823291778564000)},

2265 {_DATAF(0.65953803062438965000), _DATAF(-0.75167119503021240000)},

2266 {_DATAF(0.65924972295761108000), _DATAF(-0.75192409753799438000)},

2267 {_DATAF(0.65896129608154297000), _DATAF(-0.75217682123184204000)},

2268 {_DATAF(0.65867280960083008000), _DATAF(-0.75242948532104492000)},

2269 {_DATAF(0.65838420391082764000), _DATAF(-0.75268203020095825000)},

2270 {_DATAF(0.65809547901153564000), _DATAF(-0.75293445587158203000)},

2271 {_DATAF(0.65780669450759888000), _DATAF(-0.75318682193756104000)},

2272 {_DATAF(0.65751779079437256000), _DATAF(-0.75343900918960571000)},

2273 {_DATAF(0.65722882747650146000), _DATAF(-0.75369113683700562000)},

2274 {_DATAF(0.65693974494934082000), _DATAF(-0.75394308567047119000)},

2275 {_DATAF(0.65665054321289063000), _DATAF(-0.75419497489929199000)},

2276 {_DATAF(0.65636128187179565000), _DATAF(-0.75444674491882324000)},

2277 {_DATAF(0.65607190132141113000), _DATAF(-0.75469839572906494000)},

2278 {_DATAF(0.65578240156173706000), _DATAF(-0.75494992733001709000)},

2279 {_DATAF(0.65549284219741821000), _DATAF(-0.75520139932632446000)},

2280 {_DATAF(0.65520316362380981000), _DATAF(-0.75545269250869751000)},

2281 {_DATAF(0.65491342544555664000), _DATAF(-0.75570392608642578000)},

2282 {_DATAF(0.65462356805801392000), _DATAF(-0.75595504045486450000)},

2283 {_DATAF(0.65433359146118164000), _DATAF(-0.75620597600936890000)},

2284 {_DATAF(0.65404355525970459000), _DATAF(-0.75645685195922852000)},

2285 {_DATAF(0.65375339984893799000), _DATAF(-0.75670766830444336000)},

2286 {_DATAF(0.65346318483352661000), _DATAF(-0.75695830583572388000)},

2287 {_DATAF(0.65317285060882568000), _DATAF(-0.75720882415771484000)},

2288 {_DATAF(0.65288239717483521000), _DATAF(-0.75745928287506104000)},

2289 {_DATAF(0.65259188413619995000), _DATAF(-0.75770962238311768000)},

2290 {_DATAF(0.65230125188827515000), _DATAF(-0.75795978307723999000)},

2291 {_DATAF(0.65201056003570557000), _DATAF(-0.75820988416671753000)},

2292 {_DATAF(0.65171968936920166000), _DATAF(-0.75845992565155029000)},

2293 {_DATAF(0.65142881870269775000), _DATAF(-0.75870978832244873000)},

2294 {_DATAF(0.65113776922225952000), _DATAF(-0.75895953178405762000)},

2295 {_DATAF(0.65084666013717651000), _DATAF(-0.75920921564102173000)},

2296 {_DATAF(0.65055549144744873000), _DATAF(-0.75945872068405151000)},

2297 {_DATAF(0.65026420354843140000), _DATAF(-0.75970816612243652000)},

2298 {_DATAF(0.64997279644012451000), _DATAF(-0.75995749235153198000)},

2299 {_DATAF(0.64968132972717285000), _DATAF(-0.76020669937133789000)},

2300 {_DATAF(0.64938974380493164000), _DATAF(-0.76045578718185425000)},

2301 {_DATAF(0.64909803867340088000), _DATAF(-0.76070475578308105000)},

2302 {_DATAF(0.64880627393722534000), _DATAF(-0.76095360517501831000)},

2303 {_DATAF(0.64851438999176025000), _DATAF(-0.76120239496231079000)},

2304 {_DATAF(0.64822244644165039000), _DATAF(-0.76145100593566895000)},

2305 {_DATAF(0.64793038368225098000), _DATAF(-0.76169955730438232000)},

2306 {_DATAF(0.64763820171356201000), _DATAF(-0.76194798946380615000)},

2307 {_DATAF(0.64734596014022827000), _DATAF(-0.76219630241394043000)},

2308 {_DATAF(0.64705359935760498000), _DATAF(-0.76244449615478516000)},

2309 {_DATAF(0.64676117897033691000), _DATAF(-0.76269257068634033000)},

2310 {_DATAF(0.64646863937377930000), _DATAF(-0.76294052600860596000)},

2311 {_DATAF(0.64617604017257690000), _DATAF(-0.76318842172622681000)},

2312 {_DATAF(0.64588326215744019000), _DATAF(-0.76343613862991333000)},

2313 {_DATAF(0.64559048414230347000), _DATAF(-0.76368379592895508000)},

2314 {_DATAF(0.64529752731323242000), _DATAF(-0.76393133401870728000)},

2315 {_DATAF(0.64500451087951660000), _DATAF(-0.76417875289916992000)},

2316 {_DATAF(0.64471143484115601000), _DATAF(-0.76442605257034302000)},

2317 {_DATAF(0.64441823959350586000), _DATAF(-0.76467323303222656000)},

2318 {_DATAF(0.64412492513656616000), _DATAF(-0.76492029428482056000)},

2319 {_DATAF(0.64383155107498169000), _DATAF(-0.76516723632812500000)},

2320 {_DATAF(0.64353805780410767000), _DATAF(-0.76541411876678467000)},

2321 {_DATAF(0.64324450492858887000), _DATAF(-0.76566088199615479000)},

2322 {_DATAF(0.64295083284378052000), _DATAF(-0.76590746641159058000)},

2323 {_DATAF(0.64265704154968262000), _DATAF(-0.76615399122238159000)},

2324 {_DATAF(0.64236319065093994000), _DATAF(-0.76640039682388306000)},

2325 {_DATAF(0.64206922054290771000), _DATAF(-0.76664668321609497000)},

2326 {_DATAF(0.64177513122558594000), _DATAF(-0.76689285039901733000)},

2327 {_DATAF(0.64148104190826416000), _DATAF(-0.76713889837265015000)},

2328 {_DATAF(0.64118677377700806000), _DATAF(-0.76738488674163818000)},

2329 {_DATAF(0.64089244604110718000), _DATAF(-0.76763069629669189000)},

2330 {_DATAF(0.64059799909591675000), _DATAF(-0.76787644624710083000)},

2331 {_DATAF(0.64030349254608154000), _DATAF(-0.76812201738357544000)},

2332 {_DATAF(0.64000886678695679000), _DATAF(-0.76836752891540527000)},

2333 {_DATAF(0.63971418142318726000), _DATAF(-0.76861292123794556000)},

2334 {_DATAF(0.63941931724548340000), _DATAF(-0.76885819435119629000)},

2335 {_DATAF(0.63912445306777954000), _DATAF(-0.76910334825515747000)},

2336 {_DATAF(0.63882946968078613000), _DATAF(-0.76934838294982910000)},

2337 {_DATAF(0.63853436708450317000), _DATAF(-0.76959329843521118000)},

2338 {_DATAF(0.63823920488357544000), _DATAF(-0.76983815431594849000)},

2339 {_DATAF(0.63794392347335815000), _DATAF(-0.77008283138275146000)},

2340 {_DATAF(0.63764852285385132000), _DATAF(-0.77032744884490967000)},

2341 {_DATAF(0.63735306262969971000), _DATAF(-0.77057188749313354000)},

2342 {_DATAF(0.63705748319625854000), _DATAF(-0.77081626653671265000)},

2343 {_DATAF(0.63676184415817261000), _DATAF(-0.77106052637100220000)},

2344 {_DATAF(0.63646614551544189000), _DATAF(-0.77130466699600220000)},

2345 {_DATAF(0.63617026805877686000), _DATAF(-0.77154868841171265000)},

2346 {_DATAF(0.63587433099746704000), _DATAF(-0.77179259061813354000)},

2347 {_DATAF(0.63557833433151245000), _DATAF(-0.77203637361526489000)},

2348 {_DATAF(0.63528221845626831000), _DATAF(-0.77228009700775146000)},

2349 {_DATAF(0.63498598337173462000), _DATAF(-0.77252364158630371000)},

2350 {_DATAF(0.63468968868255615000), _DATAF(-0.77276712656021118000)},

2351 {_DATAF(0.63439327478408813000), _DATAF(-0.77301043272018433000)},

2352 {_DATAF(0.63409680128097534000), _DATAF(-0.77325367927551270000)},

2353 {_DATAF(0.63380020856857300000), _DATAF(-0.77349680662155151000)},

2354 {_DATAF(0.63350355625152588000), _DATAF(-0.77373981475830078000)},

2355 {_DATAF(0.63320678472518921000), _DATAF(-0.77398270368576050000)},

2356 {_DATAF(0.63290989398956299000), _DATAF(-0.77422547340393066000)},

2357 {_DATAF(0.63261294364929199000), _DATAF(-0.77446812391281128000)},

2358 {_DATAF(0.63231587409973145000), _DATAF(-0.77471065521240234000)},

2359 {_DATAF(0.63201874494552612000), _DATAF(-0.77495312690734863000)},

2360 {_DATAF(0.63172149658203125000), _DATAF(-0.77519541978836060000)},

2361 {_DATAF(0.63142418861389160000), _DATAF(-0.77543765306472778000)},

2362 {_DATAF(0.63112676143646240000), _DATAF(-0.77567970752716064000)},

2363 {_DATAF(0.63082921504974365000), _DATAF(-0.77592170238494873000)},

2364 {_DATAF(0.63053160905838013000), _DATAF(-0.77616357803344727000)},

2365 {_DATAF(0.63023394346237183000), _DATAF(-0.77640533447265625000)},

2366 {_DATAF(0.62993609905242920000), _DATAF(-0.77664697170257568000)},

2367 {_DATAF(0.62963825464248657000), _DATAF(-0.77688848972320557000)},

2368 {_DATAF(0.62934023141860962000), _DATAF(-0.77712988853454590000)},

2369 {_DATAF(0.62904220819473267000), _DATAF(-0.77737116813659668000)},

2370 {_DATAF(0.62874400615692139000), _DATAF(-0.77761232852935791000)},

2371 {_DATAF(0.62844574451446533000), _DATAF(-0.77785342931747437000)},

2372 {_DATAF(0.62814742326736450000), _DATAF(-0.77809435129165649000)},

2373 {_DATAF(0.62784898281097412000), _DATAF(-0.77833521366119385000)},

2374 {_DATAF(0.62755042314529419000), _DATAF(-0.77857589721679688000)},

2375 {_DATAF(0.62725180387496948000), _DATAF(-0.77881652116775513000)},

2376 {_DATAF(0.62695312500000000000), _DATAF(-0.77905702590942383000)},

2377 {_DATAF(0.62665426731109619000), _DATAF(-0.77929735183715820000)},

2378 {_DATAF(0.62635540962219238000), _DATAF(-0.77953761816024780000)},

2379 {_DATAF(0.62605637311935425000), _DATAF(-0.77977776527404785000)},

2380 {_DATAF(0.62575727701187134000), _DATAF(-0.78001779317855835000)},

2381 {_DATAF(0.62545812129974365000), _DATAF(-0.78025776147842407000)},

2382 {_DATAF(0.62515884637832642000), _DATAF(-0.78049755096435547000)},

2383 {_DATAF(0.62485951185226440000), _DATAF(-0.78073722124099731000)},

2384 {_DATAF(0.62456005811691284000), _DATAF(-0.78097677230834961000)},

2385 {_DATAF(0.62426048517227173000), _DATAF(-0.78121626377105713000)},

2386 {_DATAF(0.62396085262298584000), _DATAF(-0.78145557641983032000)},

2387 {_DATAF(0.62366110086441040000), _DATAF(-0.78169482946395874000)},

2388 {_DATAF(0.62336128950119019000), _DATAF(-0.78193396329879761000)},

2389 {_DATAF(0.62306135892868042000), _DATAF(-0.78217291831970215000)},

2390 {_DATAF(0.62276136875152588000), _DATAF(-0.78241181373596191000)},

2391 {_DATAF(0.62246125936508179000), _DATAF(-0.78265058994293213000)},

2392 {_DATAF(0.62216109037399292000), _DATAF(-0.78288924694061279000)},

2393 {_DATAF(0.62186080217361450000), _DATAF(-0.78312778472900391000)},

2394 {_DATAF(0.62156045436859131000), _DATAF(-0.78336620330810547000)},

2395 {_DATAF(0.62125998735427856000), _DATAF(-0.78360450267791748000)},

2396 {_DATAF(0.62095940113067627000), _DATAF(-0.78384268283843994000)},

2397 {_DATAF(0.62065875530242920000), _DATAF(-0.78408080339431763000)},

2398 {_DATAF(0.62035804986953735000), _DATAF(-0.78431874513626099000)},

2399 {_DATAF(0.62005722522735596000), _DATAF(-0.78455656766891479000)},

2400 {_DATAF(0.61975628137588501000), _DATAF(-0.78479433059692383000)},

2401 {_DATAF(0.61945527791976929000), _DATAF(-0.78503191471099854000)},

2402 {_DATAF(0.61915415525436401000), _DATAF(-0.78526943922042847000)},

2403 {_DATAF(0.61885297298431396000), _DATAF(-0.78550684452056885000)},

2404 {_DATAF(0.61855173110961914000), _DATAF(-0.78574407100677490000)},

2405 {_DATAF(0.61825031042098999000), _DATAF(-0.78598123788833618000)},

2406 {_DATAF(0.61794888973236084000), _DATAF(-0.78621828556060791000)},

2407 {_DATAF(0.61764729022979736000), _DATAF(-0.78645521402359009000)},

2408 {_DATAF(0.61734563112258911000), _DATAF(-0.78669202327728271000)},

2409 {_DATAF(0.61704391241073608000), _DATAF(-0.78692871332168579000)},

2410 {_DATAF(0.61674207448959351000), _DATAF(-0.78716528415679932000)},

2411 {_DATAF(0.61644017696380615000), _DATAF(-0.78740173578262329000)},

2412 {_DATAF(0.61613816022872925000), _DATAF(-0.78763806819915771000)},

2413 {_DATAF(0.61583608388900757000), _DATAF(-0.78787434101104736000)},

2414 {_DATAF(0.61553388833999634000), _DATAF(-0.78811043500900269000)},

2415 {_DATAF(0.61523157358169556000), _DATAF(-0.78834640979766846000)},

2416 {_DATAF(0.61492919921875000000), _DATAF(-0.78858232498168945000)},

2417 {_DATAF(0.61462676525115967000), _DATAF(-0.78881806135177612000)},

2418 {_DATAF(0.61432421207427979000), _DATAF(-0.78905373811721802000)},

2419 {_DATAF(0.61402153968811035000), _DATAF(-0.78928923606872559000)},

2420 {_DATAF(0.61371880769729614000), _DATAF(-0.78952467441558838000)},

2421 {_DATAF(0.61341601610183716000), _DATAF(-0.78975999355316162000)},

2422 {_DATAF(0.61311310529708862000), _DATAF(-0.78999513387680054000)},

2423 {_DATAF(0.61281007528305054000), _DATAF(-0.79023021459579468000)},

2424 {_DATAF(0.61250698566436768000), _DATAF(-0.79046517610549927000)},

2425 {_DATAF(0.61220377683639526000), _DATAF(-0.79070001840591431000)},

2426 {_DATAF(0.61190050840377808000), _DATAF(-0.79093474149703979000)},

2427 {_DATAF(0.61159718036651611000), _DATAF(-0.79116934537887573000)},

2428 {_DATAF(0.61129373311996460000), _DATAF(-0.79140383005142212000)},

2429 {_DATAF(0.61099016666412354000), _DATAF(-0.79163819551467896000)},

2430 {_DATAF(0.61068654060363770000), _DATAF(-0.79187244176864624000)},

2431 {_DATAF(0.61038279533386230000), _DATAF(-0.79210656881332397000)},

2432 {_DATAF(0.61007899045944214000), _DATAF(-0.79234057664871216000)},

2433 {_DATAF(0.60977506637573242000), _DATAF(-0.79257452487945557000)},

2434 {_DATAF(0.60947108268737793000), _DATAF(-0.79280829429626465000)},

2435 {_DATAF(0.60916703939437866000), _DATAF(-0.79304194450378418000)},

2436 {_DATAF(0.60886281728744507000), _DATAF(-0.79327553510665894000)},

2437 {_DATAF(0.60855859518051147000), _DATAF(-0.79350894689559937000)},

2438 {_DATAF(0.60825425386428833000), _DATAF(-0.79374229907989502000)},

2439 {_DATAF(0.60794979333877563000), _DATAF(-0.79397547245025635000)},

2440 {_DATAF(0.60764527320861816000), _DATAF(-0.79420858621597290000)},

2441 {_DATAF(0.60734063386917114000), _DATAF(-0.79444152116775513000)},

2442 {_DATAF(0.60703593492507935000), _DATAF(-0.79467439651489258000)},

2443 {_DATAF(0.60673111677169800000), _DATAF(-0.79490715265274048000)},

2444 {_DATAF(0.60642623901367188000), _DATAF(-0.79513972997665405000)},

2445 {_DATAF(0.60612124204635620000), _DATAF(-0.79537224769592285000)},

2446 {_DATAF(0.60581618547439575000), _DATAF(-0.79560464620590210000)},

2447 {_DATAF(0.60551106929779053000), _DATAF(-0.79583692550659180000)},

2448 {_DATAF(0.60520577430725098000), _DATAF(-0.79606908559799194000)},

2449 {_DATAF(0.60490047931671143000), _DATAF(-0.79630106687545776000)},

2450 {_DATAF(0.60459506511688232000), _DATAF(-0.79653298854827881000)},

2451 {_DATAF(0.60428953170776367000), _DATAF(-0.79676479101181030000)},

2452 {_DATAF(0.60398393869400024000), _DATAF(-0.79699647426605225000)},

2453 {_DATAF(0.60367822647094727000), _DATAF(-0.79722803831100464000)},

2454 {_DATAF(0.60337245464324951000), _DATAF(-0.79745948314666748000)},

2455 {_DATAF(0.60306662321090698000), _DATAF(-0.79769086837768555000)},

2456 {_DATAF(0.60276067256927490000), _DATAF(-0.79792207479476929000)},

2457 {_DATAF(0.60245460271835327000), _DATAF(-0.79815316200256348000)},

2458 {_DATAF(0.60214847326278687000), _DATAF(-0.79838413000106812000)},

2459 {_DATAF(0.60184222459793091000), _DATAF(-0.79861497879028320000)},

2460 {_DATAF(0.60153591632843018000), _DATAF(-0.79884576797485352000)},

2461 {_DATAF(0.60122954845428467000), _DATAF(-0.79907637834548950000)},

2462 {_DATAF(0.60092306137084961000), _DATAF(-0.79930686950683594000)},

2463 {_DATAF(0.60061645507812500000), _DATAF(-0.79953724145889282000)},

2464 {_DATAF(0.60030978918075562000), _DATAF(-0.79976755380630493000)},

2465 {_DATAF(0.60000306367874146000), _DATAF(-0.79999768733978271000)},

2466 {_DATAF(0.59969621896743774000), _DATAF(-0.80022776126861572000)},

2467 {_DATAF(0.59938931465148926000), _DATAF(-0.80045765638351440000)},

2468 {_DATAF(0.59908229112625122000), _DATAF(-0.80068749189376831000)},

2469 {_DATAF(0.59877520799636841000), _DATAF(-0.80091714859008789000)},

2470 {_DATAF(0.59846800565719604000), _DATAF(-0.80114674568176270000)},

2471 {_DATAF(0.59816068410873413000), _DATAF(-0.80137616395950317000)},

2472 {_DATAF(0.59785336256027222000), _DATAF(-0.80160552263259888000)},

2473 {_DATAF(0.59754586219787598000), _DATAF(-0.80183470249176025000)},

2474 {_DATAF(0.59723836183547974000), _DATAF(-0.80206382274627686000)},

2475 {_DATAF(0.59693068265914917000), _DATAF(-0.80229282379150391000)},

2476 {_DATAF(0.59662300348281860000), _DATAF(-0.80252164602279663000)},

2477 {_DATAF(0.59631520509719849000), _DATAF(-0.80275040864944458000)},

2478 {_DATAF(0.59600728750228882000), _DATAF(-0.80297905206680298000)},

2479 {_DATAF(0.59569931030273438000), _DATAF(-0.80320751667022705000)},

2480 {_DATAF(0.59539121389389038000), _DATAF(-0.80343592166900635000)},

2481 {_DATAF(0.59508305788040161000), _DATAF(-0.80366420745849609000)},

2482 {_DATAF(0.59477484226226807000), _DATAF(-0.80389231443405151000)},

2483 {_DATAF(0.59446650743484497000), _DATAF(-0.80412036180496216000)},

2484 {_DATAF(0.59415805339813232000), _DATAF(-0.80434828996658325000)},

2485 {_DATAF(0.59384959936141968000), _DATAF(-0.80457609891891479000)},

2486 {_DATAF(0.59354096651077271000), _DATAF(-0.80480378866195679000)},

2487 {_DATAF(0.59323227405548096000), _DATAF(-0.80503135919570923000)},

2488 {_DATAF(0.59292352199554443000), _DATAF(-0.80525875091552734000)},

2489 {_DATAF(0.59261465072631836000), _DATAF(-0.80548608303070068000)},

2490 {_DATAF(0.59230571985244751000), _DATAF(-0.80571329593658447000)},

2491 {_DATAF(0.59199666976928711000), _DATAF(-0.80594038963317871000)},

2492 {_DATAF(0.59168756008148193000), _DATAF(-0.80616736412048340000)},

2493 {_DATAF(0.59137839078903198000), _DATAF(-0.80639421939849854000)},

2494 {_DATAF(0.59106910228729248000), _DATAF(-0.80662095546722412000)},

2495 {_DATAF(0.59075969457626343000), _DATAF(-0.80684757232666016000)},

2496 {_DATAF(0.59045022726058960000), _DATAF(-0.80707406997680664000)},

2497 {_DATAF(0.59014070034027100000), _DATAF(-0.80730044841766357000)},

2498 {_DATAF(0.58983105421066284000), _DATAF(-0.80752670764923096000)},

2499 {_DATAF(0.58952128887176514000), _DATAF(-0.80775284767150879000)},

2500 {_DATAF(0.58921152353286743000), _DATAF(-0.80797880887985229000)},

2501 {_DATAF(0.58890157938003540000), _DATAF(-0.80820471048355103000)},

2502 {_DATAF(0.58859163522720337000), _DATAF(-0.80843049287796021000)},

2503 {_DATAF(0.58828157186508179000), _DATAF(-0.80865615606307983000)},

2504 {_DATAF(0.58797138929367065000), _DATAF(-0.80888170003890991000)},

2505 {_DATAF(0.58766114711761475000), _DATAF(-0.80910712480545044000)},

2506 {_DATAF(0.58735078573226929000), _DATAF(-0.80933243036270142000)},

2507 {_DATAF(0.58704036474227905000), _DATAF(-0.80955761671066284000)},

2508 {_DATAF(0.58672988414764404000), _DATAF(-0.80978268384933472000)},

2509 {_DATAF(0.58641928434371948000), _DATAF(-0.81000763177871704000)},

2510 {_DATAF(0.58610862493515015000), _DATAF(-0.81023246049880981000)},

2511 {_DATAF(0.58579784631729126000), _DATAF(-0.81045717000961304000)},

2512 {_DATAF(0.58548700809478760000), _DATAF(-0.81068176031112671000)},

2513 {_DATAF(0.58517605066299438000), _DATAF(-0.81090623140335083000)},

2514 {_DATAF(0.58486503362655640000), _DATAF(-0.81113064289093018000)},

2515 {_DATAF(0.58455395698547363000), _DATAF(-0.81135487556457520000)},

2516 {_DATAF(0.58424276113510132000), _DATAF(-0.81157898902893066000)},

2517 {_DATAF(0.58393144607543945000), _DATAF(-0.81180298328399658000)},

2518 {_DATAF(0.58362013101577759000), _DATAF(-0.81202685832977295000)},

2519 {_DATAF(0.58330863714218140000), _DATAF(-0.81225061416625977000)},

2520 {_DATAF(0.58299714326858521000), _DATAF(-0.81247425079345703000)},

2521 {_DATAF(0.58268547058105469000), _DATAF(-0.81269776821136475000)},

2522 {_DATAF(0.58237379789352417000), _DATAF(-0.81292116641998291000)},

2523 {_DATAF(0.58206200599670410000), _DATAF(-0.81314438581466675000)},

2524 {_DATAF(0.58175009489059448000), _DATAF(-0.81336754560470581000)},

2525 {_DATAF(0.58143812417984009000), _DATAF(-0.81359058618545532000)},

2526 {_DATAF(0.58112609386444092000), _DATAF(-0.81381350755691528000)},

2527 {_DATAF(0.58081394433975220000), _DATAF(-0.81403630971908569000)},

2528 {_DATAF(0.58050173521041870000), _DATAF(-0.81425899267196655000)},

2529 {_DATAF(0.58018940687179565000), _DATAF(-0.81448155641555786000)},

2530 {_DATAF(0.57987701892852783000), _DATAF(-0.81470400094985962000)},

2531 {_DATAF(0.57956457138061523000), _DATAF(-0.81492632627487183000)},

2532 {_DATAF(0.57925200462341309000), _DATAF(-0.81514853239059448000)},

2533 {_DATAF(0.57893931865692139000), _DATAF(-0.81537061929702759000)},

2534 {_DATAF(0.57862663269042969000), _DATAF(-0.81559258699417114000)},

2535 {_DATAF(0.57831376791000366000), _DATAF(-0.81581443548202515000)},

2536 {_DATAF(0.57800090312957764000), _DATAF(-0.81603610515594482000)},

2537 {_DATAF(0.57768791913986206000), _DATAF(-0.81625771522521973000)},

2538 {_DATAF(0.57737481594085693000), _DATAF(-0.81647920608520508000)},

2539 {_DATAF(0.57706165313720703000), _DATAF(-0.81670057773590088000)},

2540 {_DATAF(0.57674843072891235000), _DATAF(-0.81692183017730713000)},

2541 {_DATAF(0.57643508911132813000), _DATAF(-0.81714290380477905000)},

2542 {_DATAF(0.57612168788909912000), _DATAF(-0.81736391782760620000)},

2543 {_DATAF(0.57580816745758057000), _DATAF(-0.81758481264114380000)},

2544 {_DATAF(0.57549458742141724000), _DATAF(-0.81780558824539185000)},

2545 {_DATAF(0.57518094778060913000), _DATAF(-0.81802618503570557000)},

2546 {_DATAF(0.57486718893051147000), _DATAF(-0.81824672222137451000)},

2547 {_DATAF(0.57455337047576904000), _DATAF(-0.81846714019775391000)},

2548 {_DATAF(0.57423943281173706000), _DATAF(-0.81868737936019897000)},

2549 {_DATAF(0.57392543554306030000), _DATAF(-0.81890755891799927000)},

2550 {_DATAF(0.57361131906509399000), _DATAF(-0.81912761926651001000)},

2551 {_DATAF(0.57329714298248291000), _DATAF(-0.81934750080108643000)},

2552 {_DATAF(0.57298290729522705000), _DATAF(-0.81956732273101807000)},

2553 {_DATAF(0.57266855239868164000), _DATAF(-0.81978696584701538000)},

2554 {_DATAF(0.57235413789749146000), _DATAF(-0.82000654935836792000)},

2555 {_DATAF(0.57203960418701172000), _DATAF(-0.82022595405578613000)},

2556 {_DATAF(0.57172501087188721000), _DATAF(-0.82044529914855957000)},

2557 {_DATAF(0.57141035795211792000), _DATAF(-0.82066446542739868000)},

2558 {_DATAF(0.57109558582305908000), _DATAF(-0.82088357210159302000)},

2559 {_DATAF(0.57078075408935547000), _DATAF(-0.82110249996185303000)},

2560 {_DATAF(0.57046580314636230000), _DATAF(-0.82132136821746826000)},

2561 {_DATAF(0.57015079259872437000), _DATAF(-0.82154005765914917000)},

2562 {_DATAF(0.56983572244644165000), _DATAF(-0.82175862789154053000)},

2563 {_DATAF(0.56952053308486938000), _DATAF(-0.82197713851928711000)},

2564 {_DATAF(0.56920522451400757000), _DATAF(-0.82219547033309937000)},

2565 {_DATAF(0.56888991594314575000), _DATAF(-0.82241368293762207000)},

2566 {_DATAF(0.56857448816299438000), _DATAF(-0.82263177633285522000)},

2567 {_DATAF(0.56825894117355347000), _DATAF(-0.82284981012344360000)},

2568 {_DATAF(0.56794333457946777000), _DATAF(-0.82306766510009766000)},

2569 {_DATAF(0.56762766838073730000), _DATAF(-0.82328540086746216000)},

2570 {_DATAF(0.56731188297271729000), _DATAF(-0.82350301742553711000)},

2571 {_DATAF(0.56699603796005249000), _DATAF(-0.82372051477432251000)},

2572 {_DATAF(0.56668013334274292000), _DATAF(-0.82393789291381836000)},

2573 {_DATAF(0.56636410951614380000), _DATAF(-0.82415515184402466000)},

2574 {_DATAF(0.56604796648025513000), _DATAF(-0.82437229156494141000)},

2575 {_DATAF(0.56573182344436646000), _DATAF(-0.82458931207656860000)},

2576 {_DATAF(0.56541556119918823000), _DATAF(-0.82480621337890625000)},

2577 {_DATAF(0.56509917974472046000), _DATAF(-0.82502299547195435000)},

2578 {_DATAF(0.56478273868560791000), _DATAF(-0.82523959875106812000)},

2579 {_DATAF(0.56446623802185059000), _DATAF(-0.82545614242553711000)},

2580 {_DATAF(0.56414961814880371000), _DATAF(-0.82567256689071655000)},

2581 {_DATAF(0.56383293867111206000), _DATAF(-0.82588887214660645000)},

2582 {_DATAF(0.56351619958877563000), _DATAF(-0.82610499858856201000)},

2583 {_DATAF(0.56319934129714966000), _DATAF(-0.82632106542587280000)},

2584 {_DATAF(0.56288242340087891000), _DATAF(-0.82653701305389404000)},

2585 {_DATAF(0.56256538629531860000), _DATAF(-0.82675278186798096000)},

2586 {_DATAF(0.56224828958511353000), _DATAF(-0.82696849107742310000)},

2587 {_DATAF(0.56193113327026367000), _DATAF(-0.82718402147293091000)},

2588 {_DATAF(0.56161385774612427000), _DATAF(-0.82739949226379395000)},

2589 {_DATAF(0.56129652261734009000), _DATAF(-0.82761478424072266000)},

2590 {_DATAF(0.56097906827926636000), _DATAF(-0.82782995700836182000)},

2591 {_DATAF(0.56066155433654785000), _DATAF(-0.82804507017135620000)},

2592 {_DATAF(0.56034398078918457000), _DATAF(-0.82826000452041626000)},

2593 {_DATAF(0.56002628803253174000), _DATAF(-0.82847481966018677000)},

2594 {_DATAF(0.55970853567123413000), _DATAF(-0.82868951559066772000)},

2595 {_DATAF(0.55939072370529175000), _DATAF(-0.82890409231185913000)},

2596 {_DATAF(0.55907279253005981000), _DATAF(-0.82911854982376099000)},

2597 {_DATAF(0.55875480175018311000), _DATAF(-0.82933294773101807000)},

2598 {_DATAF(0.55843669176101685000), _DATAF(-0.82954710721969604000)},

2599 {_DATAF(0.55811852216720581000), _DATAF(-0.82976120710372925000)},

2600 {_DATAF(0.55780029296875000000), _DATAF(-0.82997518777847290000)},

2601 {_DATAF(0.55748194456100464000), _DATAF(-0.83018904924392700000)},

2602 {_DATAF(0.55716353654861450000), _DATAF(-0.83040279150009155000)},

2603 {_DATAF(0.55684500932693481000), _DATAF(-0.83061641454696655000)},

2604 {_DATAF(0.55652648210525513000), _DATAF(-0.83082985877990723000)},

2605 {_DATAF(0.55620777606964111000), _DATAF(-0.83104324340820313000)},

2606 {_DATAF(0.55588907003402710000), _DATAF(-0.83125650882720947000)},

2607 {_DATAF(0.55557024478912354000), _DATAF(-0.83146959543228149000)},

2608 {_DATAF(0.55525130033493042000), _DATAF(-0.83168262243270874000)},

2609 {_DATAF(0.55493235588073730000), _DATAF(-0.83189547061920166000)},

2610 {_DATAF(0.55461329221725464000), _DATAF(-0.83210825920104980000)},

2611 {_DATAF(0.55429410934448242000), _DATAF(-0.83232086896896362000)},

2612 {_DATAF(0.55397486686706543000), _DATAF(-0.83253335952758789000)},

2613 {_DATAF(0.55365556478500366000), _DATAF(-0.83274579048156738000)},

2614 {_DATAF(0.55333620309829712000), _DATAF(-0.83295804262161255000)},

2615 {_DATAF(0.55301672220230103000), _DATAF(-0.83317017555236816000)},

2616 {_DATAF(0.55269712209701538000), _DATAF(-0.83338218927383423000)},

2617 {_DATAF(0.55237752199172974000), _DATAF(-0.83359408378601074000)},

2618 {_DATAF(0.55205780267715454000), _DATAF(-0.83380585908889771000)},

2619 {_DATAF(0.55173796415328979000), _DATAF(-0.83401751518249512000)},

2620 {_DATAF(0.55141812562942505000), _DATAF(-0.83422905206680298000)},

2621 {_DATAF(0.55109816789627075000), _DATAF(-0.83444041013717651000)},

2622 {_DATAF(0.55077809095382690000), _DATAF(-0.83465170860290527000)},

2623 {_DATAF(0.55045795440673828000), _DATAF(-0.83486288785934448000)},

2624 {_DATAF(0.55013775825500488000), _DATAF(-0.83507388830184937000)},

2625 {_DATAF(0.54981750249862671000), _DATAF(-0.83528482913970947000)},

2626 {_DATAF(0.54949712753295898000), _DATAF(-0.83549559116363525000)},

2627 {_DATAF(0.54917663335800171000), _DATAF(-0.83570629358291626000)},

2628 {_DATAF(0.54885613918304443000), _DATAF(-0.83591681718826294000)},

2629 {_DATAF(0.54853552579879761000), _DATAF(-0.83612728118896484000)},

2630 {_DATAF(0.54821485280990601000), _DATAF(-0.83633756637573242000)},

2631 {_DATAF(0.54789406061172485000), _DATAF(-0.83654773235321045000)},

2632 {_DATAF(0.54757320880889893000), _DATAF(-0.83675777912139893000)},

2633 {_DATAF(0.54725229740142822000), _DATAF(-0.83696770668029785000)},

2634 {_DATAF(0.54693126678466797000), _DATAF(-0.83717751502990723000)},

2635 {_DATAF(0.54661017656326294000), _DATAF(-0.83738720417022705000)},

2636 {_DATAF(0.54628896713256836000), _DATAF(-0.83759677410125732000)},

2637 {_DATAF(0.54596775770187378000), _DATAF(-0.83780622482299805000)},

2638 {_DATAF(0.54564642906188965000), _DATAF(-0.83801549673080444000)},

2639 {_DATAF(0.54532498121261597000), _DATAF(-0.83822470903396606000)},

2640 {_DATAF(0.54500347375869751000), _DATAF(-0.83843380212783813000)},

2641 {_DATAF(0.54468190670013428000), _DATAF(-0.83864271640777588000)},

2642 {_DATAF(0.54436028003692627000), _DATAF(-0.83885151147842407000)},

2643 {_DATAF(0.54403853416442871000), _DATAF(-0.83906024694442749000)},

2644 {_DATAF(0.54371672868728638000), _DATAF(-0.83926880359649658000)},

2645 {_DATAF(0.54339480400085449000), _DATAF(-0.83947724103927612000)},

2646 {_DATAF(0.54307281970977783000), _DATAF(-0.83968561887741089000)},

2647 {_DATAF(0.54275077581405640000), _DATAF(-0.83989381790161133000)},

2648 {_DATAF(0.54242867231369019000), _DATAF(-0.84010189771652222000)},

2649 {_DATAF(0.54210644960403442000), _DATAF(-0.84030985832214355000)},

2650 {_DATAF(0.54178416728973389000), _DATAF(-0.84051764011383057000)},

2651 {_DATAF(0.54146176576614380000), _DATAF(-0.84072536230087280000)},

2652 {_DATAF(0.54113930463790894000), _DATAF(-0.84093296527862549000)},

2653 {_DATAF(0.54081678390502930000), _DATAF(-0.84114044904708862000)},

2654 {_DATAF(0.54049414396286011000), _DATAF(-0.84134775400161743000)},

2655 {_DATAF(0.54017144441604614000), _DATAF(-0.84155499935150146000)},

2656 {_DATAF(0.53984868526458740000), _DATAF(-0.84176206588745117000)},

2657 {_DATAF(0.53952586650848389000), _DATAF(-0.84196901321411133000)},

2658 {_DATAF(0.53920292854309082000), _DATAF(-0.84217590093612671000)},

2659 {_DATAF(0.53887993097305298000), _DATAF(-0.84238260984420776000)},

2660 {_DATAF(0.53855681419372559000), _DATAF(-0.84258919954299927000)},

2661 {_DATAF(0.53823363780975342000), _DATAF(-0.84279567003250122000)},

2662 {_DATAF(0.53791040182113647000), _DATAF(-0.84300202131271362000)},

2663 {_DATAF(0.53758704662322998000), _DATAF(-0.84320825338363647000)},

2664 {_DATAF(0.53726369142532349000), _DATAF(-0.84341436624526978000)},

2665 {_DATAF(0.53694015741348267000), _DATAF(-0.84362030029296875000)},

2666 {_DATAF(0.53661662340164185000), _DATAF(-0.84382617473602295000)},

2667 {_DATAF(0.53629297018051147000), _DATAF(-0.84403187036514282000)},

2668 {_DATAF(0.53596925735473633000), _DATAF(-0.84423750638961792000)},

2669 {_DATAF(0.53564548492431641000), _DATAF(-0.84444296360015869000)},

2670 {_DATAF(0.53532159328460693000), _DATAF(-0.84464836120605469000)},

2671 {_DATAF(0.53499764204025269000), _DATAF(-0.84485357999801636000)},

2672 {_DATAF(0.53467357158660889000), _DATAF(-0.84505867958068848000)},

2673 {_DATAF(0.53434944152832031000), _DATAF(-0.84526365995407104000)},

2674 {_DATAF(0.53402525186538696000), _DATAF(-0.84546852111816406000)},

2675 {_DATAF(0.53370100259780884000), _DATAF(-0.84567326307296753000)},

2676 {_DATAF(0.53337663412094116000), _DATAF(-0.84587788581848145000)},

2677 {_DATAF(0.53305220603942871000), _DATAF(-0.84608232975006104000)},

2678 {_DATAF(0.53272771835327148000), _DATAF(-0.84628671407699585000)},

2679 {_DATAF(0.53240311145782471000), _DATAF(-0.84649091958999634000)},

2680 {_DATAF(0.53207844495773315000), _DATAF(-0.84669506549835205000)},

2681 {_DATAF(0.53175371885299683000), _DATAF(-0.84689903259277344000)},

2682 {_DATAF(0.53142887353897095000), _DATAF(-0.84710288047790527000)},

2683 {_DATAF(0.53110402822494507000), _DATAF(-0.84730660915374756000)},

2684 {_DATAF(0.53077900409698486000), _DATAF(-0.84751027822494507000)},

2685 {_DATAF(0.53045397996902466000), _DATAF(-0.84771376848220825000)},

2686 {_DATAF(0.53012883663177490000), _DATAF(-0.84791707992553711000)},

2687 {_DATAF(0.52980363368988037000), _DATAF(-0.84812033176422119000)},

2688 {_DATAF(0.52947831153869629000), _DATAF(-0.84832346439361572000)},

2689 {_DATAF(0.52915298938751221000), _DATAF(-0.84852647781372070000)},

2690 {_DATAF(0.52882754802703857000), _DATAF(-0.84872931241989136000)},

2691 {_DATAF(0.52850198745727539000), _DATAF(-0.84893202781677246000)},

2692 {_DATAF(0.52817642688751221000), _DATAF(-0.84913468360900879000)},

2693 {_DATAF(0.52785074710845947000), _DATAF(-0.84933716058731079000)},

2694 {_DATAF(0.52752494812011719000), _DATAF(-0.84953951835632324000)},

2695 {_DATAF(0.52719914913177490000), _DATAF(-0.84974175691604614000)},

2696 {_DATAF(0.52687323093414307000), _DATAF(-0.84994387626647949000)},

2697 {_DATAF(0.52654725313186646000), _DATAF(-0.85014587640762329000)},

2698 {_DATAF(0.52622115612030029000), _DATAF(-0.85034775733947754000)},

2699 {_DATAF(0.52589499950408936000), _DATAF(-0.85054945945739746000)},

2700 {_DATAF(0.52556878328323364000), _DATAF(-0.85075110197067261000)},

2701 {_DATAF(0.52524250745773315000), _DATAF(-0.85095256567001343000)},

2702 {_DATAF(0.52491611242294312000), _DATAF(-0.85115396976470947000)},

2703 {_DATAF(0.52458965778350830000), _DATAF(-0.85135519504547119000)},

2704 {_DATAF(0.52426314353942871000), _DATAF(-0.85155630111694336000)},

2705 {_DATAF(0.52393656969070435000), _DATAF(-0.85175728797912598000)},

2706 {_DATAF(0.52360987663269043000), _DATAF(-0.85195815563201904000)},

2707 {_DATAF(0.52328312397003174000), _DATAF(-0.85215890407562256000)},

2708 {_DATAF(0.52295625209808350000), _DATAF(-0.85235953330993652000)},

2709 {_DATAF(0.52262938022613525000), _DATAF(-0.85255998373031616000)},

2710 {_DATAF(0.52230238914489746000), _DATAF(-0.85276037454605103000)},

2711 {_DATAF(0.52197527885437012000), _DATAF(-0.85296058654785156000)},

2712 {_DATAF(0.52164816856384277000), _DATAF(-0.85316073894500732000)},

2713 {_DATAF(0.52132093906402588000), _DATAF(-0.85336071252822876000)},

2714 {_DATAF(0.52099364995956421000), _DATAF(-0.85356056690216064000)},

2715 {_DATAF(0.52066624164581299000), _DATAF(-0.85376030206680298000)},

2716 {_DATAF(0.52033877372741699000), _DATAF(-0.85395991802215576000)},

2717 {_DATAF(0.52001124620437622000), _DATAF(-0.85415941476821899000)},

2718 {_DATAF(0.51968365907669067000), _DATAF(-0.85435873270034790000)},

2719 {_DATAF(0.51935601234436035000), _DATAF(-0.85455799102783203000)},

2720 {_DATAF(0.51902824640274048000), _DATAF(-0.85475707054138184000)},

2721 {_DATAF(0.51870042085647583000), _DATAF(-0.85495609045028687000)},

2722 {_DATAF(0.51837247610092163000), _DATAF(-0.85515493154525757000)},

2723 {_DATAF(0.51804453134536743000), _DATAF(-0.85535365343093872000)},

2724 {_DATAF(0.51771646738052368000), _DATAF(-0.85555225610733032000)},

2725 {_DATAF(0.51738828420639038000), _DATAF(-0.85575073957443237000)},

2726 {_DATAF(0.51706010103225708000), _DATAF(-0.85594910383224487000)},

2727 {_DATAF(0.51673179864883423000), _DATAF(-0.85614734888076782000)},

2728 {_DATAF(0.51640343666076660000), _DATAF(-0.85634541511535645000)},

2729 {_DATAF(0.51607501506805420000), _DATAF(-0.85654342174530029000)},

2730 {_DATAF(0.51574647426605225000), _DATAF(-0.85674124956130981000)},

2731 {_DATAF(0.51541787385940552000), _DATAF(-0.85693895816802979000)},

2732 {_DATAF(0.51508921384811401000), _DATAF(-0.85713654756546021000)},

2733 {_DATAF(0.51476043462753296000), _DATAF(-0.85733401775360107000)},

2734 {_DATAF(0.51443165540695190000), _DATAF(-0.85753136873245239000)},

2735 {_DATAF(0.51410275697708130000), _DATAF(-0.85772860050201416000)},

2736 {_DATAF(0.51377379894256592000), _DATAF(-0.85792571306228638000)},

2737 {_DATAF(0.51344472169876099000), _DATAF(-0.85812264680862427000)},

2738 {_DATAF(0.51311558485031128000), _DATAF(-0.85831952095031738000)},

2739 {_DATAF(0.51278638839721680000), _DATAF(-0.85851621627807617000)},

2740 {_DATAF(0.51245713233947754000), _DATAF(-0.85871279239654541000)},

2741 {_DATAF(0.51212775707244873000), _DATAF(-0.85890924930572510000)},

2742 {_DATAF(0.51179832220077515000), _DATAF(-0.85910558700561523000)},

2743 {_DATAF(0.51146882772445679000), _DATAF(-0.85930180549621582000)},

2744 {_DATAF(0.51113927364349365000), _DATAF(-0.85949790477752686000)},

2745 {_DATAF(0.51080960035324097000), _DATAF(-0.85969388484954834000)},

2746 {_DATAF(0.51047992706298828000), _DATAF(-0.85988968610763550000)},

2747 {_DATAF(0.51015007495880127000), _DATAF(-0.86008536815643311000)},

2748 {_DATAF(0.50982022285461426000), _DATAF(-0.86028099060058594000)},

2749 {_DATAF(0.50949025154113770000), _DATAF(-0.86047643423080444000)},

2750 {_DATAF(0.50916022062301636000), _DATAF(-0.86067175865173340000)},

2751 {_DATAF(0.50883013010025024000), _DATAF(-0.86086696386337280000)},

2752 {_DATAF(0.50849997997283936000), _DATAF(-0.86106199026107788000)},

2753 {_DATAF(0.50816971063613892000), _DATAF(-0.86125695705413818000)},

2754 {_DATAF(0.50783938169479370000), _DATAF(-0.86145174503326416000)},

2755 {_DATAF(0.50750899314880371000), _DATAF(-0.86164647340774536000)},

2756 {_DATAF(0.50717854499816895000), _DATAF(-0.86184102296829224000)},

2757 {_DATAF(0.50684797763824463000), _DATAF(-0.86203545331954956000)},

2758 {_DATAF(0.50651735067367554000), _DATAF(-0.86222976446151733000)},

2759 {_DATAF(0.50618666410446167000), _DATAF(-0.86242395639419556000)},

2760 {_DATAF(0.50585585832595825000), _DATAF(-0.86261802911758423000)},

2761 {_DATAF(0.50552505254745483000), _DATAF(-0.86281192302703857000)},

2762 {_DATAF(0.50519412755966187000), _DATAF(-0.86300575733184814000)},

2763 {_DATAF(0.50486308336257935000), _DATAF(-0.86319941282272339000)},

2764 {_DATAF(0.50453203916549683000), _DATAF(-0.86339294910430908000)},

2765 {_DATAF(0.50420087575912476000), _DATAF(-0.86358636617660522000)},

2766 {_DATAF(0.50386965274810791000), _DATAF(-0.86377966403961182000)},

2767 {_DATAF(0.50353837013244629000), _DATAF(-0.86397284269332886000)},

2768 {_DATAF(0.50320702791213989000), _DATAF(-0.86416590213775635000)},

2769 {_DATAF(0.50287556648254395000), _DATAF(-0.86435878276824951000)},

2770 {_DATAF(0.50254404544830322000), _DATAF(-0.86455160379409790000)},

2771 {_DATAF(0.50221246480941772000), _DATAF(-0.86474424600601196000)},

2772 {_DATAF(0.50188082456588745000), _DATAF(-0.86493676900863647000)},

2773 {_DATAF(0.50154906511306763000), _DATAF(-0.86512917280197144000)},

2774 {_DATAF(0.50121724605560303000), _DATAF(-0.86532145738601685000)},

2775 {_DATAF(0.50088536739349365000), _DATAF(-0.86551362276077271000)},

2776 {_DATAF(0.50055342912673950000), _DATAF(-0.86570566892623901000)},

2777 {_DATAF(0.50022137165069580000), _DATAF(-0.86589753627777100000)},

2778 {_DATAF(0.49988928437232971000), _DATAF(-0.86608928442001343000)},

2779 {_DATAF(0.49955710768699646000), _DATAF(-0.86628097295761108000)},

2780 {_DATAF(0.49922487139701843000), _DATAF(-0.86647248268127441000)},

2781 {_DATAF(0.49889254570007324000), _DATAF(-0.86666387319564819000)},

2782 {_DATAF(0.49856013059616089000), _DATAF(-0.86685508489608765000)},

2783 {_DATAF(0.49822765588760376000), _DATAF(-0.86704623699188232000)},

2784 {_DATAF(0.49789512157440186000), _DATAF(-0.86723726987838745000)},

2785 {_DATAF(0.49756249785423279000), _DATAF(-0.86742812395095825000)},

2786 {_DATAF(0.49722981452941895000), _DATAF(-0.86761885881423950000)},

2787 {_DATAF(0.49689704179763794000), _DATAF(-0.86780947446823120000)},

2788 {_DATAF(0.49656420946121216000), _DATAF(-0.86799997091293335000)},

2789 {_DATAF(0.49623128771781921000), _DATAF(-0.86819034814834595000)},

2790 {_DATAF(0.49589830636978149000), _DATAF(-0.86838060617446899000)},

2791 {_DATAF(0.49556526541709900000), _DATAF(-0.86857068538665771000)},

2792 {_DATAF(0.49523213505744934000), _DATAF(-0.86876070499420166000)},

2793 {_DATAF(0.49489894509315491000), _DATAF(-0.86895054578781128000)},

2794 {_DATAF(0.49456566572189331000), _DATAF(-0.86914026737213135000)},

2795 {_DATAF(0.49423229694366455000), _DATAF(-0.86932986974716187000)},

2796 {_DATAF(0.49389889836311340000), _DATAF(-0.86951935291290283000)},

2797 {_DATAF(0.49356541037559509000), _DATAF(-0.86970865726470947000)},

2798 {_DATAF(0.49323183298110962000), _DATAF(-0.86989790201187134000)},

2799 {_DATAF(0.49289819598197937000), _DATAF(-0.87008696794509888000)},

2800 {_DATAF(0.49256446957588196000), _DATAF(-0.87027597427368164000)},

2801 {_DATAF(0.49223071336746216000), _DATAF(-0.87046480178833008000)},

2802 {_DATAF(0.49189683794975281000), _DATAF(-0.87065351009368896000)},

2803 {_DATAF(0.49156290292739868000), _DATAF(-0.87084203958511353000)},

2804 {_DATAF(0.49122890830039978000), _DATAF(-0.87103050947189331000)},

2805 {_DATAF(0.49089485406875610000), _DATAF(-0.87121886014938354000)},

2806 {_DATAF(0.49056071043014526000), _DATAF(-0.87140703201293945000)},

2807 {_DATAF(0.49022647738456726000), _DATAF(-0.87159508466720581000)},

2808 {_DATAF(0.48989218473434448000), _DATAF(-0.87178301811218262000)},

2809 {_DATAF(0.48955783247947693000), _DATAF(-0.87197083234786987000)},

2810 {_DATAF(0.48922339081764221000), _DATAF(-0.87215852737426758000)},

2811 {_DATAF(0.48888888955116272000), _DATAF(-0.87234604358673096000)},

2812 {_DATAF(0.48855432868003845000), _DATAF(-0.87253350019454956000)},

2813 {_DATAF(0.48821967840194702000), _DATAF(-0.87272077798843384000)},

2814 {_DATAF(0.48788493871688843000), _DATAF(-0.87290793657302856000)},

2815 {_DATAF(0.48755016922950745000), _DATAF(-0.87309497594833374000)},

2816 {_DATAF(0.48721531033515930000), _DATAF(-0.87328189611434937000)},

2817 {_DATAF(0.48688036203384399000), _DATAF(-0.87346869707107544000)},

2818 {_DATAF(0.48654535412788391000), _DATAF(-0.87365531921386719000)},

2819 {_DATAF(0.48621028661727905000), _DATAF(-0.87384182214736938000)},

2820 {_DATAF(0.48587512969970703000), _DATAF(-0.87402826547622681000)},

2821 {_DATAF(0.48553991317749023000), _DATAF(-0.87421452999114990000)},

2822 {_DATAF(0.48520460724830627000), _DATAF(-0.87440061569213867000)},

2823 {_DATAF(0.48486924171447754000), _DATAF(-0.87458664178848267000)},

2824 {_DATAF(0.48453381657600403000), _DATAF(-0.87477254867553711000)},

2825 {_DATAF(0.48419830203056335000), _DATAF(-0.87495827674865723000)},

2826 {_DATAF(0.48386272788047791000), _DATAF(-0.87514388561248779000)},

2827 {_DATAF(0.48352706432342529000), _DATAF(-0.87532937526702881000)},

2828 {_DATAF(0.48319137096405029000), _DATAF(-0.87551474571228027000)},

2829 {_DATAF(0.48285555839538574000), _DATAF(-0.87569999694824219000)},

2830 {_DATAF(0.48251971602439880000), _DATAF(-0.87588512897491455000)},

2831 {_DATAF(0.48218378424644470000), _DATAF(-0.87607008218765259000)},

2832 {_DATAF(0.48184776306152344000), _DATAF(-0.87625491619110107000)},

2833 {_DATAF(0.48151168227195740000), _DATAF(-0.87643969058990479000)},

2834 {_DATAF(0.48117554187774658000), _DATAF(-0.87662428617477417000)},

2835 {_DATAF(0.48083934187889099000), _DATAF(-0.87680870294570923000)},

2836 {_DATAF(0.48050305247306824000), _DATAF(-0.87699306011199951000)},

2837 {_DATAF(0.48016667366027832000), _DATAF(-0.87717723846435547000)},

2838 {_DATAF(0.47983026504516602000), _DATAF(-0.87736135721206665000)},

2839 {_DATAF(0.47949376702308655000), _DATAF(-0.87754529714584351000)},

2840 {_DATAF(0.47915717959403992000), _DATAF(-0.87772911787033081000)},

2841 {_DATAF(0.47882056236267090000), _DATAF(-0.87791281938552856000)},

2842 {_DATAF(0.47848382592201233000), _DATAF(-0.87809634208679199000)},

2843 {_DATAF(0.47814705967903137000), _DATAF(-0.87827980518341064000)},

2844 {_DATAF(0.47781020402908325000), _DATAF(-0.87846308946609497000)},

2845 {_DATAF(0.47747328877449036000), _DATAF(-0.87864625453948975000)},

2846 {_DATAF(0.47713628411293030000), _DATAF(-0.87882930040359497000)},

2847 {_DATAF(0.47679921984672546000), _DATAF(-0.87901222705841064000)},

2848 {_DATAF(0.47646209597587585000), _DATAF(-0.87919503450393677000)},

2849 {_DATAF(0.47612488269805908000), _DATAF(-0.87937766313552856000)},

2850 {_DATAF(0.47578760981559753000), _DATAF(-0.87956017255783081000)},

2851 {_DATAF(0.47545027732849121000), _DATAF(-0.87974262237548828000)},

2852 {_DATAF(0.47511285543441772000), _DATAF(-0.87992483377456665000)},

2853 {_DATAF(0.47477537393569946000), _DATAF(-0.88010698556900024000)},

2854 {_DATAF(0.47443783283233643000), _DATAF(-0.88028901815414429000)},

2855 {_DATAF(0.47410020232200623000), _DATAF(-0.88047087192535400000)},

2856 {_DATAF(0.47376251220703125000), _DATAF(-0.88065266609191895000)},

2857 {_DATAF(0.47342476248741150000), _DATAF(-0.88083428144454956000)},

2858 {_DATAF(0.47308692336082458000), _DATAF(-0.88101577758789063000)},

2859 {_DATAF(0.47274902462959290000), _DATAF(-0.88119709491729736000)},

2860 {_DATAF(0.47241106629371643000), _DATAF(-0.88137835264205933000)},

2861 {_DATAF(0.47207301855087280000), _DATAF(-0.88155943155288696000)},

2862 {_DATAF(0.47173491120338440000), _DATAF(-0.88174045085906982000)},

2863 {_DATAF(0.47139674425125122000), _DATAF(-0.88192129135131836000)},

2864 {_DATAF(0.47105848789215088000), _DATAF(-0.88210195302963257000)},

2865 {_DATAF(0.47072017192840576000), _DATAF(-0.88228255510330200000)},

2866 {_DATAF(0.47038179636001587000), _DATAF(-0.88246303796768188000)},

2867 {_DATAF(0.47004333138465881000), _DATAF(-0.88264334201812744000)},

2868 {_DATAF(0.46970480680465698000), _DATAF(-0.88282352685928345000)},

2869 {_DATAF(0.46936622262001038000), _DATAF(-0.88300359249114990000)},

2870 {_DATAF(0.46902754902839661000), _DATAF(-0.88318353891372681000)},

2871 {_DATAF(0.46868881583213806000), _DATAF(-0.88336336612701416000)},

2872 {_DATAF(0.46835002303123474000), _DATAF(-0.88354301452636719000)},

2873 {_DATAF(0.46801114082336426000), _DATAF(-0.88372254371643066000)},

2874 {_DATAF(0.46767222881317139000), _DATAF(-0.88390195369720459000)},

2875 {_DATAF(0.46733319759368896000), _DATAF(-0.88408124446868896000)},

2876 {_DATAF(0.46699413657188416000), _DATAF(-0.88426041603088379000)},

2877 {_DATAF(0.46665498614311218000), _DATAF(-0.88443946838378906000)},

2878 {_DATAF(0.46631577610969543000), _DATAF(-0.88461834192276001000)},

2879 {_DATAF(0.46597650647163391000), _DATAF(-0.88479709625244141000)},

2880 {_DATAF(0.46563714742660522000), _DATAF(-0.88497573137283325000)},

2881 {_DATAF(0.46529772877693176000), _DATAF(-0.88515424728393555000)},

2882 {_DATAF(0.46495825052261353000), _DATAF(-0.88533258438110352000)},

2883 {_DATAF(0.46461868286132813000), _DATAF(-0.88551086187362671000)},

2884 {_DATAF(0.46427905559539795000), _DATAF(-0.88568896055221558000)},

2885 {_DATAF(0.46393936872482300000), _DATAF(-0.88586694002151489000)},

2886 {_DATAF(0.46359962224960327000), _DATAF(-0.88604480028152466000)},

2887 {_DATAF(0.46325978636741638000), _DATAF(-0.88622254133224487000)},

2888 {_DATAF(0.46291989088058472000), _DATAF(-0.88640010356903076000)},

2889 {_DATAF(0.46257993578910828000), _DATAF(-0.88657760620117188000)},

2890 {_DATAF(0.46223989129066467000), _DATAF(-0.88675493001937866000)},

2891 {_DATAF(0.46189978718757629000), _DATAF(-0.88693213462829590000)},

2892 {_DATAF(0.46155962347984314000), _DATAF(-0.88710916042327881000)},

2893 {_DATAF(0.46121940016746521000), _DATAF(-0.88728612661361694000)},

2894 {_DATAF(0.46087908744812012000), _DATAF(-0.88746291399002075000)},

2895 {_DATAF(0.46053871512413025000), _DATAF(-0.88763964176177979000)},

2896 {_DATAF(0.46019828319549561000), _DATAF(-0.88781619071960449000)},

2897 {_DATAF(0.45985776185989380000), _DATAF(-0.88799256086349487000)},

2898 {_DATAF(0.45951718091964722000), _DATAF(-0.88816887140274048000)},

2899 {_DATAF(0.45917654037475586000), _DATAF(-0.88834506273269653000)},

2900 {_DATAF(0.45883584022521973000), _DATAF(-0.88852107524871826000)},

2901 {_DATAF(0.45849505066871643000), _DATAF(-0.88869696855545044000)},

2902 {_DATAF(0.45815420150756836000), _DATAF(-0.88887274265289307000)},

2903 {_DATAF(0.45781329274177551000), _DATAF(-0.88904833793640137000)},

2904 {_DATAF(0.45747232437133789000), _DATAF(-0.88922387361526489000)},

2905 {_DATAF(0.45713126659393311000), _DATAF(-0.88939923048019409000)},

2906 {_DATAF(0.45679014921188354000), _DATAF(-0.88957446813583374000)},

2907 {_DATAF(0.45644897222518921000), _DATAF(-0.88974958658218384000)},

2908 {_DATAF(0.45610773563385010000), _DATAF(-0.88992458581924438000)},

2909 {_DATAF(0.45576640963554382000), _DATAF(-0.89009940624237061000)},

2910 {_DATAF(0.45542502403259277000), _DATAF(-0.89027410745620728000)},

2911 {_DATAF(0.45508357882499695000), _DATAF(-0.89044874906539917000)},

2912 {_DATAF(0.45474207401275635000), _DATAF(-0.89062315225601196000)},

2913 {_DATAF(0.45440047979354858000), _DATAF(-0.89079749584197998000)},

2914 {_DATAF(0.45405882596969604000), _DATAF(-0.89097172021865845000)},

2915 {_DATAF(0.45371711254119873000), _DATAF(-0.89114576578140259000)},

2916 {_DATAF(0.45337533950805664000), _DATAF(-0.89131969213485718000)},

2917 {_DATAF(0.45303347706794739000), _DATAF(-0.89149349927902222000)},

2918 {_DATAF(0.45269158482551575000), _DATAF(-0.89166718721389771000)},

2919 {_DATAF(0.45234957337379456000), _DATAF(-0.89184069633483887000)},

2920 {_DATAF(0.45200753211975098000), _DATAF(-0.89201414585113525000)},

2921 {_DATAF(0.45166543126106262000), _DATAF(-0.89218741655349731000)},

2922 {_DATAF(0.45132324099540710000), _DATAF(-0.89236056804656982000)},

2923 {_DATAF(0.45098099112510681000), _DATAF(-0.89253354072570801000)},

2924 {_DATAF(0.45063868165016174000), _DATAF(-0.89270645380020142000)},

2925 {_DATAF(0.45029628276824951000), _DATAF(-0.89287918806076050000)},

2926 {_DATAF(0.44995385408401489000), _DATAF(-0.89305180311203003000)},

2927 {_DATAF(0.44961133599281311000), _DATAF(-0.89322429895401001000)},

2928 {_DATAF(0.44926875829696655000), _DATAF(-0.89339667558670044000)},

2929 {_DATAF(0.44892609119415283000), _DATAF(-0.89356887340545654000)},

2930 {_DATAF(0.44858339428901672000), _DATAF(-0.89374095201492310000)},

2931 {_DATAF(0.44824060797691345000), _DATAF(-0.89391297101974487000)},

2932 {_DATAF(0.44789776206016541000), _DATAF(-0.89408475160598755000)},

2933 {_DATAF(0.44755485653877258000), _DATAF(-0.89425647258758545000)},

2934 {_DATAF(0.44721189141273499000), _DATAF(-0.89442807435989380000)},

2935 {_DATAF(0.44686883687973022000), _DATAF(-0.89459949731826782000)},

2936 {_DATAF(0.44652572274208069000), _DATAF(-0.89477080106735229000)},

2937 {_DATAF(0.44618254899978638000), _DATAF(-0.89494198560714722000)},

2938 {_DATAF(0.44583931565284729000), _DATAF(-0.89511299133300781000)},

2939 {_DATAF(0.44549602270126343000), _DATAF(-0.89528393745422363000)},

2940 {_DATAF(0.44515264034271240000), _DATAF(-0.89545470476150513000)},

2941 {_DATAF(0.44480919837951660000), _DATAF(-0.89562535285949707000)},

2942 {_DATAF(0.44446569681167603000), _DATAF(-0.89579588174819946000)},

2943 {_DATAF(0.44412213563919067000), _DATAF(-0.89596623182296753000)},

2944 {_DATAF(0.44377851486206055000), _DATAF(-0.89613652229309082000)},

2945 {_DATAF(0.44343480467796326000), _DATAF(-0.89630663394927979000)},

2946 {_DATAF(0.44309106469154358000), _DATAF(-0.89647662639617920000)},

2947 {_DATAF(0.44274723529815674000), _DATAF(-0.89664649963378906000)},

2948 {_DATAF(0.44240334630012512000), _DATAF(-0.89681619405746460000)},

2949 {_DATAF(0.44205936789512634000), _DATAF(-0.89698576927185059000)},

2950 {_DATAF(0.44171535968780518000), _DATAF(-0.89715522527694702000)},

2951 {_DATAF(0.44137126207351685000), _DATAF(-0.89732456207275391000)},

2952 {_DATAF(0.44102710485458374000), _DATAF(-0.89749377965927124000)},

2953 {_DATAF(0.44068288803100586000), _DATAF(-0.89766281843185425000)},

2954 {_DATAF(0.44033861160278320000), _DATAF(-0.89783179759979248000)},

2955 {_DATAF(0.43999427556991577000), _DATAF(-0.89800059795379639000)},

2956 {_DATAF(0.43964985013008118000), _DATAF(-0.89816927909851074000)},

2957 {_DATAF(0.43930539488792419000), _DATAF(-0.89833778142929077000)},

2958 {_DATAF(0.43896085023880005000), _DATAF(-0.89850616455078125000)},

2959 {_DATAF(0.43861624598503113000), _DATAF(-0.89867448806762695000)},

2960 {_DATAF(0.43827158212661743000), _DATAF(-0.89884263277053833000)},

2961 {_DATAF(0.43792682886123657000), _DATAF(-0.89901059865951538000)},

2962 {_DATAF(0.43758204579353333000), _DATAF(-0.89917850494384766000)},

2963 {_DATAF(0.43723717331886292000), _DATAF(-0.89934623241424561000)},

2964 {_DATAF(0.43689224123954773000), _DATAF(-0.89951384067535400000)},

2965 {_DATAF(0.43654724955558777000), _DATAF(-0.89968132972717285000)},

2966 {_DATAF(0.43620219826698303000), _DATAF(-0.89984869956970215000)},

2967 {_DATAF(0.43585708737373352000), _DATAF(-0.90001589059829712000)},

2968 {_DATAF(0.43551188707351685000), _DATAF(-0.90018296241760254000)},

2969 {_DATAF(0.43516665697097778000), _DATAF(-0.90034991502761841000)},

2970 {_DATAF(0.43482133746147156000), _DATAF(-0.90051674842834473000)},

2971 {_DATAF(0.43447595834732056000), _DATAF(-0.90068340301513672000)},

2972 {_DATAF(0.43413051962852478000), _DATAF(-0.90084999799728394000)},

2973 {_DATAF(0.43378502130508423000), _DATAF(-0.90101641416549683000)},

2974 {_DATAF(0.43343946337699890000), _DATAF(-0.90118271112442017000)},

2975 {_DATAF(0.43309381604194641000), _DATAF(-0.90134882926940918000)},

2976 {_DATAF(0.43274813890457153000), _DATAF(-0.90151488780975342000)},

2977 {_DATAF(0.43240237236022949000), _DATAF(-0.90168076753616333000)},

2978 {_DATAF(0.43205654621124268000), _DATAF(-0.90184652805328369000)},

2979 {_DATAF(0.43171066045761108000), _DATAF(-0.90201216936111450000)},

2980 {_DATAF(0.43136471509933472000), _DATAF(-0.90217763185501099000)},

2981 {_DATAF(0.43101871013641357000), _DATAF(-0.90234297513961792000)},

2982 {_DATAF(0.43067261576652527000), _DATAF(-0.90250819921493530000)},

2983 {_DATAF(0.43032649159431458000), _DATAF(-0.90267330408096313000)},

2984 {_DATAF(0.42998027801513672000), _DATAF(-0.90283828973770142000)},

2985 {_DATAF(0.42963400483131409000), _DATAF(-0.90300309658050537000)},

2986 {_DATAF(0.42928767204284668000), _DATAF(-0.90316778421401978000)},

2987 {_DATAF(0.42894127964973450000), _DATAF(-0.90333235263824463000)},

2988 {_DATAF(0.42859482765197754000), _DATAF(-0.90349680185317993000)},

2989 {_DATAF(0.42824831604957581000), _DATAF(-0.90366107225418091000)},

2990 {_DATAF(0.42790174484252930000), _DATAF(-0.90382528305053711000)},

2991 {_DATAF(0.42755508422851563000), _DATAF(-0.90398931503295898000)},

2992 {_DATAF(0.42720839381217957000), _DATAF(-0.90415316820144653000)},

2993 {_DATAF(0.42686161398887634000), _DATAF(-0.90431696176528931000)},

2994 {_DATAF(0.42651477456092834000), _DATAF(-0.90448057651519775000)},

2995 {_DATAF(0.42616787552833557000), _DATAF(-0.90464407205581665000)},

2996 {_DATAF(0.42582091689109802000), _DATAF(-0.90480744838714600000)},

2997 {_DATAF(0.42547389864921570000), _DATAF(-0.90497070550918579000)},

2998 {_DATAF(0.42512682080268860000), _DATAF(-0.90513378381729126000)},

2999 {_DATAF(0.42477968335151672000), _DATAF(-0.90529674291610718000)},

3000 {_DATAF(0.42443248629570007000), _DATAF(-0.90545958280563354000)},

3001 {_DATAF(0.42408519983291626000), _DATAF(-0.90562230348587036000)},

3002 {_DATAF(0.42373788356781006000), _DATAF(-0.90578484535217285000)},

3003 {_DATAF(0.42339047789573669000), _DATAF(-0.90594726800918579000)},

3004 {_DATAF(0.42304301261901855000), _DATAF(-0.90610957145690918000)},

3005 {_DATAF(0.42269548773765564000), _DATAF(-0.90627175569534302000)},

3006 {_DATAF(0.42234790325164795000), _DATAF(-0.90643382072448730000)},

3007 {_DATAF(0.42200025916099548000), _DATAF(-0.90659570693969727000)},

3008 {_DATAF(0.42165255546569824000), _DATAF(-0.90675747394561768000)},

3009 {_DATAF(0.42130479216575623000), _DATAF(-0.90691912174224854000)},

3010 {_DATAF(0.42095696926116943000), _DATAF(-0.90708059072494507000)},

3011 {_DATAF(0.42060908675193787000), _DATAF(-0.90724200010299683000)},

3012 {_DATAF(0.42026111483573914000), _DATAF(-0.90740323066711426000)},

3013 {_DATAF(0.41991311311721802000), _DATAF(-0.90756434202194214000)},

3014 {_DATAF(0.41956502199172974000), _DATAF(-0.90772527456283569000)},

3015 {_DATAF(0.41921690106391907000), _DATAF(-0.90788608789443970000)},

3016 {_DATAF(0.41886869072914124000), _DATAF(-0.90804684162139893000)},

3017 {_DATAF(0.41852042078971863000), _DATAF(-0.90820735692977905000)},

3018 {_DATAF(0.41817209124565125000), _DATAF(-0.90836781263351440000)},

3019 {_DATAF(0.41782370209693909000), _DATAF(-0.90852808952331543000)},

3020 {_DATAF(0.41747528314590454000), _DATAF(-0.90868830680847168000)},

3021 {_DATAF(0.41712677478790283000), _DATAF(-0.90884834527969360000)},

3022 {_DATAF(0.41677817702293396000), _DATAF(-0.90900820493698120000)},

3023 {_DATAF(0.41642954945564270000), _DATAF(-0.90916800498962402000)},

3024 {_DATAF(0.41608086228370667000), _DATAF(-0.90932762622833252000)},

3025 {_DATAF(0.41573211550712585000), _DATAF(-0.90948712825775146000)},

3026 {_DATAF(0.41538330912590027000), _DATAF(-0.90964645147323608000)},

3027 {_DATAF(0.41503441333770752000), _DATAF(-0.90980571508407593000)},

3028 {_DATAF(0.41468548774719238000), _DATAF(-0.90996479988098145000)},

3029 {_DATAF(0.41433650255203247000), _DATAF(-0.91012376546859741000)},

3030 {_DATAF(0.41398742794990540000), _DATAF(-0.91028261184692383000)},

3031 {_DATAF(0.41363832354545593000), _DATAF(-0.91044127941131592000)},

3032 {_DATAF(0.41328912973403931000), _DATAF(-0.91059982776641846000)},

3033 {_DATAF(0.41293987631797791000), _DATAF(-0.91075825691223145000)},

3034 {_DATAF(0.41259059309959412000), _DATAF(-0.91091656684875488000)},

3035 {_DATAF(0.41224122047424316000), _DATAF(-0.91107475757598877000)},

3036 {_DATAF(0.41189181804656982000), _DATAF(-0.91123276948928833000)},

3037 {_DATAF(0.41154232621192932000), _DATAF(-0.91139066219329834000)},

3038 {_DATAF(0.41119277477264404000), _DATAF(-0.91154843568801880000)},

3039 {_DATAF(0.41084316372871399000), _DATAF(-0.91170603036880493000)},

3040 {_DATAF(0.41049349308013916000), _DATAF(-0.91186350584030151000)},

3041 {_DATAF(0.41014379262924194000), _DATAF(-0.91202086210250854000)},

3042 {_DATAF(0.40979400277137756000), _DATAF(-0.91217809915542603000)},

3043 {_DATAF(0.40944415330886841000), _DATAF(-0.91233515739440918000)},

3044 {_DATAF(0.40909424424171448000), _DATAF(-0.91249215602874756000)},

3045 {_DATAF(0.40874427556991577000), _DATAF(-0.91264897584915161000)},

3046 {_DATAF(0.40839424729347229000), _DATAF(-0.91280561685562134000)},

3047 {_DATAF(0.40804415941238403000), _DATAF(-0.91296219825744629000)},

3048 {_DATAF(0.40769401192665100000), _DATAF(-0.91311860084533691000)},

3049 {_DATAF(0.40734380483627319000), _DATAF(-0.91327488422393799000)},

3050 {_DATAF(0.40699353814125061000), _DATAF(-0.91343104839324951000)},

3051 {_DATAF(0.40664321184158325000), _DATAF(-0.91358703374862671000)},

3052 {_DATAF(0.40629282593727112000), _DATAF(-0.91374289989471436000)},

3053 {_DATAF(0.40594238042831421000), _DATAF(-0.91389864683151245000)},

3054 {_DATAF(0.40559187531471252000), _DATAF(-0.91405427455902100000)},

3055 {_DATAF(0.40524131059646606000), _DATAF(-0.91420978307723999000)},

3056 {_DATAF(0.40489068627357483000), _DATAF(-0.91436511278152466000)},

3057 {_DATAF(0.40454000234603882000), _DATAF(-0.91452032327651978000)},

3058 {_DATAF(0.40418925881385803000), _DATAF(-0.91467535495758057000)},

3059 {_DATAF(0.40383845567703247000), _DATAF(-0.91483032703399658000)},

3060 {_DATAF(0.40348759293556213000), _DATAF(-0.91498512029647827000)},

3061 {_DATAF(0.40313667058944702000), _DATAF(-0.91513979434967041000)},

3062 {_DATAF(0.40278568863868713000), _DATAF(-0.91529428958892822000)},

3063 {_DATAF(0.40243464708328247000), _DATAF(-0.91544872522354126000)},

3064 {_DATAF(0.40208354592323303000), _DATAF(-0.91560298204421997000)},

3065 {_DATAF(0.40173238515853882000), _DATAF(-0.91575711965560913000)},

3066 {_DATAF(0.40138116478919983000), _DATAF(-0.91591107845306396000)},

3067 {_DATAF(0.40102988481521606000), _DATAF(-0.91606497764587402000)},

3068 {_DATAF(0.40067857503890991000), _DATAF(-0.91621869802474976000)},

3069 {_DATAF(0.40032717585563660000), _DATAF(-0.91637229919433594000)},

3070 {_DATAF(0.39997571706771851000), _DATAF(-0.91652572154998779000)},

3071 {_DATAF(0.39962419867515564000), _DATAF(-0.91667908430099487000)},

3072 {_DATAF(0.39927262067794800000), _DATAF(-0.91683226823806763000)},

3073 {_DATAF(0.39892101287841797000), _DATAF(-0.91698527336120605000)},

3074 {_DATAF(0.39856931567192078000), _DATAF(-0.91713821887969971000)},

3075 {_DATAF(0.39821755886077881000), _DATAF(-0.91729098558425903000)},

3076 {_DATAF(0.39786574244499207000), _DATAF(-0.91744363307952881000)},

3077 {_DATAF(0.39751389622688293000), _DATAF(-0.91759616136550903000)},

3078 {_DATAF(0.39716196060180664000), _DATAF(-0.91774851083755493000)},

3079 {_DATAF(0.39680999517440796000), _DATAF(-0.91790080070495605000)},

3080 {_DATAF(0.39645794034004211000), _DATAF(-0.91805291175842285000)},

3081 {_DATAF(0.39610585570335388000), _DATAF(-0.91820484399795532000)},

3082 {_DATAF(0.39575368165969849000), _DATAF(-0.91835671663284302000)},

3083 {_DATAF(0.39540147781372070000), _DATAF(-0.91850841045379639000)},

3084 {_DATAF(0.39504921436309814000), _DATAF(-0.91865998506546021000)},

3085 {_DATAF(0.39469686150550842000), _DATAF(-0.91881138086318970000)},

3086 {_DATAF(0.39434447884559631000), _DATAF(-0.91896271705627441000)},

3087 {_DATAF(0.39399203658103943000), _DATAF(-0.91911387443542480000)},

3088 {_DATAF(0.39363953471183777000), _DATAF(-0.91926485300064087000)},

3089 {_DATAF(0.39328697323799133000), _DATAF(-0.91941577196121216000)},

3090 {_DATAF(0.39293435215950012000), _DATAF(-0.91956651210784912000)},

3091 {_DATAF(0.39258167147636414000), _DATAF(-0.91971713304519653000)},

3092 {_DATAF(0.39222893118858337000), _DATAF(-0.91986763477325439000)},

3093 {_DATAF(0.39187613129615784000), _DATAF(-0.92001795768737793000)},

3094 {_DATAF(0.39152330160140991000), _DATAF(-0.92016822099685669000)},

3095 {_DATAF(0.39117038249969482000), _DATAF(-0.92031830549240112000)},

3096 {_DATAF(0.39081740379333496000), _DATAF(-0.92046821117401123000)},

3097 {_DATAF(0.39046439528465271000), _DATAF(-0.92061805725097656000)},

3098 {_DATAF(0.39011132717132568000), _DATAF(-0.92076772451400757000)},

3099 {_DATAF(0.38975816965103149000), _DATAF(-0.92091721296310425000)},

3100 {_DATAF(0.38940498232841492000), _DATAF(-0.92106664180755615000)},

3101 {_DATAF(0.38905173540115356000), _DATAF(-0.92121589183807373000)},

3102 {_DATAF(0.38869842886924744000), _DATAF(-0.92136502265930176000)},

3103 {_DATAF(0.38834503293037415000), _DATAF(-0.92151403427124023000)},

3104 {_DATAF(0.38799160718917847000), _DATAF(-0.92166292667388916000)},

3105 {_DATAF(0.38763815164566040000), _DATAF(-0.92181164026260376000)},

3106 {_DATAF(0.38728460669517517000), _DATAF(-0.92196023464202881000)},

3107 {_DATAF(0.38693100214004517000), _DATAF(-0.92210865020751953000)},

3108 {_DATAF(0.38657733798027039000), _DATAF(-0.92225700616836548000)},

3109 {_DATAF(0.38622364401817322000), _DATAF(-0.92240518331527710000)},

3110 {_DATAF(0.38586989045143127000), _DATAF(-0.92255324125289917000)},

3111 {_DATAF(0.38551604747772217000), _DATAF(-0.92270112037658691000)},

3112 {_DATAF(0.38516217470169067000), _DATAF(-0.92284888029098511000)},

3113 {_DATAF(0.38480824232101440000), _DATAF(-0.92299652099609375000)},

3114 {_DATAF(0.38445425033569336000), _DATAF(-0.92314404249191284000)},

3115 {_DATAF(0.38410019874572754000), _DATAF(-0.92329144477844238000)},

3116 {_DATAF(0.38374608755111694000), _DATAF(-0.92343866825103760000)},

3117 {_DATAF(0.38339191675186157000), _DATAF(-0.92358577251434326000)},

3118 {_DATAF(0.38303771615028381000), _DATAF(-0.92373269796371460000)},

3119 {_DATAF(0.38268342614173889000), _DATAF(-0.92387950420379639000)},

3120 {_DATAF(0.38232910633087158000), _DATAF(-0.92402625083923340000)},

3121 {_DATAF(0.38197472691535950000), _DATAF(-0.92417275905609131000)},

3122 {_DATAF(0.38162025809288025000), _DATAF(-0.92431920766830444000)},

3123 {_DATAF(0.38126575946807861000), _DATAF(-0.92446547746658325000)},

3124 {_DATAF(0.38091120123863220000), _DATAF(-0.92461162805557251000)},

3125 {_DATAF(0.38055661320686340000), _DATAF(-0.92475759983062744000)},

3126 {_DATAF(0.38020193576812744000), _DATAF(-0.92490351200103760000)},

3127 {_DATAF(0.37984719872474670000), _DATAF(-0.92504924535751343000)},

3128 {_DATAF(0.37949243187904358000), _DATAF(-0.92519485950469971000)},

3129 {_DATAF(0.37913760542869568000), _DATAF(-0.92534029483795166000)},

3130 {_DATAF(0.37878268957138062000), _DATAF(-0.92548561096191406000)},

3131 {_DATAF(0.37842774391174316000), _DATAF(-0.92563080787658691000)},

3132 {_DATAF(0.37807273864746094000), _DATAF(-0.92577588558197021000)},

3133 {_DATAF(0.37771770358085632000), _DATAF(-0.92592078447341919000)},

3134 {_DATAF(0.37736257910728455000), _DATAF(-0.92606556415557861000)},

3135 {_DATAF(0.37700742483139038000), _DATAF(-0.92621022462844849000)},

3136 {_DATAF(0.37665218114852905000), _DATAF(-0.92635476589202881000)},

3137 {_DATAF(0.37629690766334534000), _DATAF(-0.92649912834167480000)},

3138 {_DATAF(0.37594157457351685000), _DATAF(-0.92664337158203125000)},

3139 {_DATAF(0.37558618187904358000), _DATAF(-0.92678749561309814000)},

3140 {_DATAF(0.37523072957992554000), _DATAF(-0.92693144083023071000)},

3141 {_DATAF(0.37487521767616272000), _DATAF(-0.92707526683807373000)},

3142 {_DATAF(0.37451967597007751000), _DATAF(-0.92721897363662720000)},

3143 {_DATAF(0.37416407465934753000), _DATAF(-0.92736250162124634000)},

3144 {_DATAF(0.37380838394165039000), _DATAF(-0.92750597000122070000)},

3145 {_DATAF(0.37345266342163086000), _DATAF(-0.92764925956726074000)},

3146 {_DATAF(0.37309691309928894000), _DATAF(-0.92779237031936646000)},

3147 {_DATAF(0.37274107336997986000), _DATAF(-0.92793542146682739000)},

3148 {_DATAF(0.37238517403602600000), _DATAF(-0.92807829380035400000)},

3149 {_DATAF(0.37202924489974976000), _DATAF(-0.92822098731994629000)},

3150 {_DATAF(0.37167325615882874000), _DATAF(-0.92836362123489380000)},

3151 {_DATAF(0.37131720781326294000), _DATAF(-0.92850607633590698000)},

3152 {_DATAF(0.37096109986305237000), _DATAF(-0.92864841222763062000)},

3153 {_DATAF(0.37060493230819702000), _DATAF(-0.92879062891006470000)},

3154 {_DATAF(0.37024870514869690000), _DATAF(-0.92893266677856445000)},

3155 {_DATAF(0.36989244818687439000), _DATAF(-0.92907458543777466000)},

3156 {_DATAF(0.36953613162040710000), _DATAF(-0.92921638488769531000)},

3157 {_DATAF(0.36917975544929504000), _DATAF(-0.92935800552368164000)},

3158 {_DATAF(0.36882331967353821000), _DATAF(-0.92949950695037842000)},

3159 {_DATAF(0.36846682429313660000), _DATAF(-0.92964088916778564000)},

3160 {_DATAF(0.36811029911041260000), _DATAF(-0.92978215217590332000)},

3161 {_DATAF(0.36775368452072144000), _DATAF(-0.92992323637008667000)},

3162 {_DATAF(0.36739704012870789000), _DATAF(-0.93006420135498047000)},

3163 {_DATAF(0.36704033613204956000), _DATAF(-0.93020504713058472000)},

3164 {_DATAF(0.36668360233306885000), _DATAF(-0.93034571409225464000)},

3165 {_DATAF(0.36632677912712097000), _DATAF(-0.93048626184463501000)},

3166 {_DATAF(0.36596992611885071000), _DATAF(-0.93062669038772583000)},

3167 {_DATAF(0.36561298370361328000), _DATAF(-0.93076694011688232000)},

3168 {_DATAF(0.36525601148605347000), _DATAF(-0.93090713024139404000)},

3169 {_DATAF(0.36489900946617126000), _DATAF(-0.93104708194732666000)},

3170 {_DATAF(0.36454191803932190000), _DATAF(-0.93118697404861450000)},

3171 {_DATAF(0.36418479681015015000), _DATAF(-0.93132668733596802000)},

3172 {_DATAF(0.36382761597633362000), _DATAF(-0.93146628141403198000)},

3173 {_DATAF(0.36347037553787231000), _DATAF(-0.93160575628280640000)},

3174 {_DATAF(0.36311307549476624000), _DATAF(-0.93174505233764648000)},

3175 {_DATAF(0.36275571584701538000), _DATAF(-0.93188428878784180000)},

3176 {_DATAF(0.36239832639694214000), _DATAF(-0.93202328681945801000)},

3177 {_DATAF(0.36204087734222412000), _DATAF(-0.93216222524642944000)},

3178 {_DATAF(0.36168336868286133000), _DATAF(-0.93230098485946655000)},

3179 {_DATAF(0.36132580041885376000), _DATAF(-0.93243962526321411000)},

3180 {_DATAF(0.36096820235252380000), _DATAF(-0.93257814645767212000)},

3181 {_DATAF(0.36061051487922668000), _DATAF(-0.93271648883819580000)},

3182 {_DATAF(0.36025279760360718000), _DATAF(-0.93285471200942993000)},

3183 {_DATAF(0.35989505052566528000), _DATAF(-0.93299281597137451000)},

3184 {_DATAF(0.35953721404075623000), _DATAF(-0.93313074111938477000)},

3185 {_DATAF(0.35917934775352478000), _DATAF(-0.93326854705810547000)},

3186 {_DATAF(0.35882139205932617000), _DATAF(-0.93340623378753662000)},

3187 {_DATAF(0.35846340656280518000), _DATAF(-0.93354380130767822000)},

3188 {_DATAF(0.35810539126396179000), _DATAF(-0.93368119001388550000)},

3189 {_DATAF(0.35774728655815125000), _DATAF(-0.93381845951080322000)},

3190 {_DATAF(0.35738915205001831000), _DATAF(-0.93395555019378662000)},

3191 {_DATAF(0.35703095793724060000), _DATAF(-0.93409252166748047000)},

3192 {_DATAF(0.35667270421981812000), _DATAF(-0.93422937393188477000)},

3193 {_DATAF(0.35631442070007324000), _DATAF(-0.93436610698699951000)},

3194 {_DATAF(0.35595607757568359000), _DATAF(-0.93450272083282471000)},

3195 {_DATAF(0.35559767484664917000), _DATAF(-0.93463915586471558000)},

3196 {_DATAF(0.35523921251296997000), _DATAF(-0.93477541208267212000)},

3197 {_DATAF(0.35488069057464600000), _DATAF(-0.93491160869598389000)},

3198 {_DATAF(0.35452213883399963000), _DATAF(-0.93504762649536133000)},

3199 {_DATAF(0.35416352748870850000), _DATAF(-0.93518352508544922000)},

3200 {_DATAF(0.35380485653877258000), _DATAF(-0.93531924486160278000)},

3201 {_DATAF(0.35344615578651428000), _DATAF(-0.93545484542846680000)},

3202 {_DATAF(0.35308736562728882000), _DATAF(-0.93559032678604126000)},

3203 {_DATAF(0.35272854566574097000), _DATAF(-0.93572568893432617000)},

3204 {_DATAF(0.35236969590187073000), _DATAF(-0.93586087226867676000)},

3205 {_DATAF(0.35201075673103333000), _DATAF(-0.93599593639373779000)},

3206 {_DATAF(0.35165178775787354000), _DATAF(-0.93613088130950928000)},

3207 {_DATAF(0.35129275918006897000), _DATAF(-0.93626564741134644000)},

3208 {_DATAF(0.35093367099761963000), _DATAF(-0.93640029430389404000)},

3209 {_DATAF(0.35057455301284790000), _DATAF(-0.93653482198715210000)},

3210 {_DATAF(0.35021537542343140000), _DATAF(-0.93666923046112061000)},

3211 {_DATAF(0.34985613822937012000), _DATAF(-0.93680346012115479000)},

3212 {_DATAF(0.34949684143066406000), _DATAF(-0.93693757057189941000)},

3213 {_DATAF(0.34913751482963562000), _DATAF(-0.93707150220870972000)},

3214 {_DATAF(0.34877812862396240000), _DATAF(-0.93720531463623047000)},

3215 {_DATAF(0.34841868281364441000), _DATAF(-0.93733900785446167000)},

3216 {_DATAF(0.34805917739868164000), _DATAF(-0.93747258186340332000)},

3217 {_DATAF(0.34769964218139648000), _DATAF(-0.93760597705841064000)},

3218 {_DATAF(0.34734004735946655000), _DATAF(-0.93773925304412842000)},

3219 {_DATAF(0.34698042273521423000), _DATAF(-0.93787235021591187000)},

3220 {_DATAF(0.34662070870399475000), _DATAF(-0.93800538778305054000)},

3221 {_DATAF(0.34626096487045288000), _DATAF(-0.93813824653625488000)},

3222 {_DATAF(0.34590116143226624000), _DATAF(-0.93827092647552490000)},

3223 {_DATAF(0.34554132819175720000), _DATAF(-0.93840354681015015000)},

3224 {_DATAF(0.34518143534660339000), _DATAF(-0.93853598833084106000)},

3225 {_DATAF(0.34482148289680481000), _DATAF(-0.93866831064224243000)},

3226 {_DATAF(0.34446147084236145000), _DATAF(-0.93880045413970947000)},

3227 {_DATAF(0.34410142898559570000), _DATAF(-0.93893247842788696000)},

3228 {_DATAF(0.34374132752418518000), _DATAF(-0.93906438350677490000)},

3229 {_DATAF(0.34338116645812988000), _DATAF(-0.93919610977172852000)},

3230 {_DATAF(0.34302097558975220000), _DATAF(-0.93932771682739258000)},

3231 {_DATAF(0.34266072511672974000), _DATAF(-0.93945920467376709000)},

3232 {_DATAF(0.34230041503906250000), _DATAF(-0.93959057331085205000)},

3233 {_DATAF(0.34194007515907288000), _DATAF(-0.93972176313400269000)},

3234 {_DATAF(0.34157964587211609000), _DATAF(-0.93985283374786377000)},

3235 {_DATAF(0.34121921658515930000), _DATAF(-0.93998372554779053000)},

3236 {_DATAF(0.34085869789123535000), _DATAF(-0.94011455774307251000)},

3237 {_DATAF(0.34049814939498901000), _DATAF(-0.94024521112442017000)},

3238 {_DATAF(0.34013754129409790000), _DATAF(-0.94037568569183350000)},

3239 {_DATAF(0.33977687358856201000), _DATAF(-0.94050604104995728000)},

3240 {_DATAF(0.33941617608070374000), _DATAF(-0.94063627719879150000)},

3241 {_DATAF(0.33905541896820068000), _DATAF(-0.94076639413833618000)},

3242 {_DATAF(0.33869463205337524000), _DATAF(-0.94089633226394653000)},

3243 {_DATAF(0.33833375573158264000), _DATAF(-0.94102615118026733000)},

3244 {_DATAF(0.33797284960746765000), _DATAF(-0.94115585088729858000)},

3245 {_DATAF(0.33761191368103027000), _DATAF(-0.94128537178039551000)},

3246 {_DATAF(0.33725091814994812000), _DATAF(-0.94141477346420288000)},

3247 {_DATAF(0.33688986301422119000), _DATAF(-0.94154405593872070000)},

3248 {_DATAF(0.33652874827384949000), _DATAF(-0.94167321920394897000)},

3249 {_DATAF(0.33616760373115540000), _DATAF(-0.94180220365524292000)},

3250 {_DATAF(0.33580639958381653000), _DATAF(-0.94193100929260254000)},

3251 {_DATAF(0.33544513583183289000), _DATAF(-0.94205975532531738000)},

3252 {_DATAF(0.33508384227752686000), _DATAF(-0.94218832254409790000)},

3253 {_DATAF(0.33472248911857605000), _DATAF(-0.94231677055358887000)},

3254 {_DATAF(0.33436110615730286000), _DATAF(-0.94244503974914551000)},

3255 {_DATAF(0.33399966359138489000), _DATAF(-0.94257318973541260000)},

3256 {_DATAF(0.33363816142082214000), _DATAF(-0.94270122051239014000)},

3257 {_DATAF(0.33327659964561462000), _DATAF(-0.94282907247543335000)},

3258 {_DATAF(0.33291500806808472000), _DATAF(-0.94295686483383179000)},

3259 {_DATAF(0.33255335688591003000), _DATAF(-0.94308441877365112000)},

3260 {_DATAF(0.33219167590141296000), _DATAF(-0.94321191310882568000)},

3261 {_DATAF(0.33182993531227112000), _DATAF(-0.94333922863006592000)},

3262 {_DATAF(0.33146813511848450000), _DATAF(-0.94346642494201660000)},

3263 {_DATAF(0.33110630512237549000), _DATAF(-0.94359344244003296000)},

3264 {_DATAF(0.33074441552162170000), _DATAF(-0.94372034072875977000)},

3265 {_DATAF(0.33038249611854553000), _DATAF(-0.94384711980819702000)},

3266 {_DATAF(0.33002048730850220000), _DATAF(-0.94397377967834473000)},

3267 {_DATAF(0.32965844869613647000), _DATAF(-0.94410026073455811000)},

3268 {_DATAF(0.32929638028144836000), _DATAF(-0.94422662258148193000)},

3269 {_DATAF(0.32893425226211548000), _DATAF(-0.94435280561447144000)},

3270 {_DATAF(0.32857206463813782000), _DATAF(-0.94447892904281616000)},

3271 {_DATAF(0.32820984721183777000), _DATAF(-0.94460481405258179000)},

3272 {_DATAF(0.32784757018089294000), _DATAF(-0.94473063945770264000)},

3273 {_DATAF(0.32748523354530334000), _DATAF(-0.94485628604888916000)},

3274 {_DATAF(0.32712286710739136000), _DATAF(-0.94498181343078613000)},

3275 {_DATAF(0.32676044106483459000), _DATAF(-0.94510722160339355000)},

3276 {_DATAF(0.32639798521995544000), _DATAF(-0.94523245096206665000)},

3277 {_DATAF(0.32603546977043152000), _DATAF(-0.94535756111145020000)},

3278 {_DATAF(0.32567289471626282000), _DATAF(-0.94548249244689941000)},

3279 {_DATAF(0.32531028985977173000), _DATAF(-0.94560730457305908000)},

3280 {_DATAF(0.32494762539863586000), _DATAF(-0.94573199748992920000)},

3281 {_DATAF(0.32458493113517761000), _DATAF(-0.94585657119750977000)},

3282 {_DATAF(0.32422217726707458000), _DATAF(-0.94598096609115601000)},

3283 {_DATAF(0.32385936379432678000), _DATAF(-0.94610524177551270000)},

3284 {_DATAF(0.32349652051925659000), _DATAF(-0.94622933864593506000)},

3285 {_DATAF(0.32313361763954163000), _DATAF(-0.94635337591171265000)},

3286 {_DATAF(0.32277068495750427000), _DATAF(-0.94647717475891113000)},

3287 {_DATAF(0.32240769267082214000), _DATAF(-0.94660091400146484000)},

3288 {_DATAF(0.32204464077949524000), _DATAF(-0.94672447443008423000)},

3289 {_DATAF(0.32168155908584595000), _DATAF(-0.94684791564941406000)},

3290 {_DATAF(0.32131841778755188000), _DATAF(-0.94697123765945435000)},

3291 {_DATAF(0.32095524668693542000), _DATAF(-0.94709438085556030000)},

3292 {_DATAF(0.32059201598167419000), _DATAF(-0.94721740484237671000)},

3293 {_DATAF(0.32022872567176819000), _DATAF(-0.94734025001525879000)},

3294 {_DATAF(0.31986540555953979000), _DATAF(-0.94746297597885132000)},

3295 {_DATAF(0.31950202584266663000), _DATAF(-0.94758558273315430000)},

3296 {_DATAF(0.31913861632347107000), _DATAF(-0.94770807027816772000)},

3297 {_DATAF(0.31877514719963074000), _DATAF(-0.94783037900924683000)},

3298 {_DATAF(0.31841164827346802000), _DATAF(-0.94795256853103638000)},

3299 {_DATAF(0.31804808974266052000), _DATAF(-0.94807457923889160000)},

3300 {_DATAF(0.31768447160720825000), _DATAF(-0.94819647073745728000)},

3301 {_DATAF(0.31732082366943359000), _DATAF(-0.94831824302673340000)},

3302 {_DATAF(0.31695711612701416000), _DATAF(-0.94843989610671997000)},

3303 {_DATAF(0.31659337878227234000), _DATAF(-0.94856137037277222000)},

3304 {_DATAF(0.31622958183288574000), _DATAF(-0.94868266582489014000)},

3305 {_DATAF(0.31586575508117676000), _DATAF(-0.94880390167236328000)},

3306 {_DATAF(0.31550186872482300000), _DATAF(-0.94892495870590210000)},

3307 {_DATAF(0.31513792276382446000), _DATAF(-0.94904589653015137000)},

3308 {_DATAF(0.31477394700050354000), _DATAF(-0.94916665554046631000)},

3309 {_DATAF(0.31440994143486023000), _DATAF(-0.94928729534149170000)},

3310 {_DATAF(0.31404584646224976000), _DATAF(-0.94940781593322754000)},

3311 {_DATAF(0.31368175148963928000), _DATAF(-0.94952815771102905000)},

3312 {_DATAF(0.31331756711006165000), _DATAF(-0.94964838027954102000)},

3313 {_DATAF(0.31295338273048401000), _DATAF(-0.94976848363876343000)},

3314 {_DATAF(0.31258910894393921000), _DATAF(-0.94988846778869629000)},

3315 {_DATAF(0.31222480535507202000), _DATAF(-0.95000827312469482000)},

3316 {_DATAF(0.31186047196388245000), _DATAF(-0.95012789964675903000)},

3317 {_DATAF(0.31149607896804810000), _DATAF(-0.95024746656417847000)},

3318 {_DATAF(0.31113162636756897000), _DATAF(-0.95036685466766357000)},

3319 {_DATAF(0.31076714396476746000), _DATAF(-0.95048606395721436000)},

3320 {_DATAF(0.31040263175964355000), _DATAF(-0.95060515403747559000)},

3321 {_DATAF(0.31003805994987488000), _DATAF(-0.95072412490844727000)},

3322 {_DATAF(0.30967342853546143000), _DATAF(-0.95084297657012939000)},

3323 {_DATAF(0.30930876731872559000), _DATAF(-0.95096164941787720000)},

3324 {_DATAF(0.30894404649734497000), _DATAF(-0.95108020305633545000)},

3325 {_DATAF(0.30857929587364197000), _DATAF(-0.95119863748550415000)},

3326 {_DATAF(0.30821448564529419000), _DATAF(-0.95131689310073853000)},

3327 {_DATAF(0.30784964561462402000), _DATAF(-0.95143502950668335000)},

3328 {_DATAF(0.30748474597930908000), _DATAF(-0.95155298709869385000)},

3329 {_DATAF(0.30711981654167175000), _DATAF(-0.95167088508605957000)},

3330 {_DATAF(0.30675482749938965000), _DATAF(-0.95178854465484619000)},

3331 {_DATAF(0.30638980865478516000), _DATAF(-0.95190614461898804000)},

3332 {_DATAF(0.30602473020553589000), _DATAF(-0.95202356576919556000)},

3333 {_DATAF(0.30565959215164185000), _DATAF(-0.95214086771011353000)},

3334 {_DATAF(0.30529442429542542000), _DATAF(-0.95225799083709717000)},

3335 {_DATAF(0.30492922663688660000), _DATAF(-0.95237499475479126000)},

3336 {_DATAF(0.30456396937370300000), _DATAF(-0.95249187946319580000)},

3337 {_DATAF(0.30419868230819702000), _DATAF(-0.95260858535766602000)},

3338 {_DATAF(0.30383333563804626000), _DATAF(-0.95272517204284668000)},

3339 {_DATAF(0.30346795916557312000), _DATAF(-0.95284163951873779000)},

3340 {_DATAF(0.30310252308845520000), _DATAF(-0.95295792818069458000)},

3341 {_DATAF(0.30273702740669250000), _DATAF(-0.95307409763336182000)},

3342 {_DATAF(0.30237150192260742000), _DATAF(-0.95319014787673950000)},

3343 {_DATAF(0.30200594663619995000), _DATAF(-0.95330601930618286000)},

3344 {_DATAF(0.30164033174514771000), _DATAF(-0.95342177152633667000)},

3345 {_DATAF(0.30127468705177307000), _DATAF(-0.95353740453720093000)},

3346 {_DATAF(0.30090898275375366000), _DATAF(-0.95365285873413086000)},

3347 {_DATAF(0.30054324865341187000), _DATAF(-0.95376819372177124000)},

3348 {_DATAF(0.30017745494842529000), _DATAF(-0.95388334989547729000)},

3349 {_DATAF(0.29981163144111633000), _DATAF(-0.95399844646453857000)},

3350 {_DATAF(0.29944574832916260000), _DATAF(-0.95411330461502075000)},

3351 {_DATAF(0.29907983541488647000), _DATAF(-0.95422810316085815000)},

3352 {_DATAF(0.29871386289596558000), _DATAF(-0.95434272289276123000)},

3353 {_DATAF(0.29834786057472229000), _DATAF(-0.95445722341537476000)},

3354 {_DATAF(0.29798179864883423000), _DATAF(-0.95457154512405396000)},

3355 {_DATAF(0.29761570692062378000), _DATAF(-0.95468574762344360000)},

3356 {_DATAF(0.29724955558776855000), _DATAF(-0.95479983091354370000)},

3357 {_DATAF(0.29688337445259094000), _DATAF(-0.95491373538970947000)},

3358 {_DATAF(0.29651716351509094000), _DATAF(-0.95502752065658569000)},

3359 {_DATAF(0.29615089297294617000), _DATAF(-0.95514118671417236000)},

3360 {_DATAF(0.29578456282615662000), _DATAF(-0.95525467395782471000)},

3361 {_DATAF(0.29541820287704468000), _DATAF(-0.95536804199218750000)},

3362 {_DATAF(0.29505181312561035000), _DATAF(-0.95548123121261597000)},

3363 {_DATAF(0.29468536376953125000), _DATAF(-0.95559436082839966000)},

3364 {_DATAF(0.29431888461112976000), _DATAF(-0.95570725202560425000)},

3365 {_DATAF(0.29395234584808350000), _DATAF(-0.95582008361816406000)},

3366 {_DATAF(0.29358577728271484000), _DATAF(-0.95593273639678955000)},

3367 {_DATAF(0.29321914911270142000), _DATAF(-0.95604526996612549000)},

3368 {_DATAF(0.29285249114036560000), _DATAF(-0.95615762472152710000)},

3369 {_DATAF(0.29248580336570740000), _DATAF(-0.95626986026763916000)},

3370 {_DATAF(0.29211905598640442000), _DATAF(-0.95638197660446167000)},

3371 {_DATAF(0.29175224900245667000), _DATAF(-0.95649391412734985000)},

3372 {_DATAF(0.29138544201850891000), _DATAF(-0.95660573244094849000)},

3373 {_DATAF(0.29101854562759399000), _DATAF(-0.95671743154525757000)},

3374 {_DATAF(0.29065164923667908000), _DATAF(-0.95682895183563232000)},

3375 {_DATAF(0.29028466343879700000), _DATAF(-0.95694035291671753000)},

3376 {_DATAF(0.28991767764091492000), _DATAF(-0.95705157518386841000)},

3377 {_DATAF(0.28955063223838806000), _DATAF(-0.95716267824172974000)},

3378 {_DATAF(0.28918352723121643000), _DATAF(-0.95727366209030151000)},

3379 {_DATAF(0.28881642222404480000), _DATAF(-0.95738452672958374000)},

3380 {_DATAF(0.28844922780990601000), _DATAF(-0.95749521255493164000)},

3381 {_DATAF(0.28808203339576721000), _DATAF(-0.95760571956634521000)},

3382 {_DATAF(0.28771474957466125000), _DATAF(-0.95771616697311401000)},

3383 {_DATAF(0.28734746575355530000), _DATAF(-0.95782643556594849000)},

3384 {_DATAF(0.28698012232780457000), _DATAF(-0.95793652534484863000)},

3385 {_DATAF(0.28661271929740906000), _DATAF(-0.95804649591445923000)},

3386 {_DATAF(0.28624531626701355000), _DATAF(-0.95815634727478027000)},

3387 {_DATAF(0.28587782382965088000), _DATAF(-0.95826607942581177000)},

3388 {_DATAF(0.28551033139228821000), _DATAF(-0.95837563276290894000)},

3389 {_DATAF(0.28514277935028076000), _DATAF(-0.95848506689071655000)},

3390 {_DATAF(0.28477516770362854000), _DATAF(-0.95859432220458984000)},

3391 {_DATAF(0.28440752625465393000), _DATAF(-0.95870345830917358000)},

3392 {_DATAF(0.28403985500335693000), _DATAF(-0.95881247520446777000)},

3393 {_DATAF(0.28367212414741516000), _DATAF(-0.95892131328582764000)},

3394 {_DATAF(0.28330436348915100000), _DATAF(-0.95903003215789795000)},

3395 {_DATAF(0.28293657302856445000), _DATAF(-0.95913863182067871000)},

3396 {_DATAF(0.28256872296333313000), _DATAF(-0.95924705266952515000)},

3397 {_DATAF(0.28220084309577942000), _DATAF(-0.95935535430908203000)},

3398 {_DATAF(0.28183290362358093000), _DATAF(-0.95946347713470459000)},

3399 {_DATAF(0.28146493434906006000), _DATAF(-0.95957154035568237000)},

3400 {_DATAF(0.28109693527221680000), _DATAF(-0.95967936515808105000)},

3401 {_DATAF(0.28072887659072876000), _DATAF(-0.95978713035583496000)},

3402 {_DATAF(0.28036078810691833000), _DATAF(-0.95989471673965454000)},

3403 {_DATAF(0.27999264001846313000), _DATAF(-0.96000212430953979000)},

3404 {_DATAF(0.27962446212768555000), _DATAF(-0.96010947227478027000)},

3405 {_DATAF(0.27925625443458557000), _DATAF(-0.96021664142608643000)},

3406 {_DATAF(0.27888798713684082000), _DATAF(-0.96032363176345825000)},

3407 {_DATAF(0.27851969003677368000), _DATAF(-0.96043050289154053000)},

3408 {_DATAF(0.27815136313438416000), _DATAF(-0.96053725481033325000)},

3409 {_DATAF(0.27778297662734985000), _DATAF(-0.96064388751983643000)},

3410 {_DATAF(0.27741453051567078000), _DATAF(-0.96075034141540527000)},

3411 {_DATAF(0.27704608440399170000), _DATAF(-0.96085661649703979000)},

3412 {_DATAF(0.27667757868766785000), _DATAF(-0.96096283197402954000)},

3413 {_DATAF(0.27630904316902161000), _DATAF(-0.96106886863708496000)},

3414 {_DATAF(0.27594044804573059000), _DATAF(-0.96117472648620605000)},

3415 {_DATAF(0.27557182312011719000), _DATAF(-0.96128046512603760000)},

3416 {_DATAF(0.27520313858985901000), _DATAF(-0.96138608455657959000)},

3417 {_DATAF(0.27483445405960083000), _DATAF(-0.96149158477783203000)},

3418 {_DATAF(0.27446570992469788000), _DATAF(-0.96159690618515015000)},

3419 {_DATAF(0.27409690618515015000), _DATAF(-0.96170204877853394000)},

3420 {_DATAF(0.27372807264328003000), _DATAF(-0.96180713176727295000)},

3421 {_DATAF(0.27335920929908752000), _DATAF(-0.96191203594207764000)},

3422 {_DATAF(0.27299031615257263000), _DATAF(-0.96201676130294800000)},

3423 {_DATAF(0.27262136340141296000), _DATAF(-0.96212142705917358000)},

3424 {_DATAF(0.27225238084793091000), _DATAF(-0.96222585439682007000)},

3425 {_DATAF(0.27188333868980408000), _DATAF(-0.96233022212982178000)},

3426 {_DATAF(0.27151426672935486000), _DATAF(-0.96243441104888916000)},

3427 {_DATAF(0.27114516496658325000), _DATAF(-0.96253848075866699000)},

3428 {_DATAF(0.27077600359916687000), _DATAF(-0.96264237165451050000)},

3429 {_DATAF(0.27040681242942810000), _DATAF(-0.96274614334106445000)},

3430 {_DATAF(0.27003759145736694000), _DATAF(-0.96284979581832886000)},

3431 {_DATAF(0.26966831088066101000), _DATAF(-0.96295326948165894000)},

3432 {_DATAF(0.26929903030395508000), _DATAF(-0.96305662393569946000)},

3433 {_DATAF(0.26892966032028198000), _DATAF(-0.96315979957580566000)},

3434 {_DATAF(0.26856029033660889000), _DATAF(-0.96326285600662231000)},

3435 {_DATAF(0.26819086074829102000), _DATAF(-0.96336579322814941000)},

3436 {_DATAF(0.26782140135765076000), _DATAF(-0.96346855163574219000)},

3437 {_DATAF(0.26745188236236572000), _DATAF(-0.96357119083404541000)},

3438 {_DATAF(0.26708233356475830000), _DATAF(-0.96367371082305908000)},

3439 {_DATAF(0.26671275496482849000), _DATAF(-0.96377605199813843000)},

3440 {_DATAF(0.26634314656257629000), _DATAF(-0.96387827396392822000)},

3441 {_DATAF(0.26597347855567932000), _DATAF(-0.96398037672042847000)},

3442 {_DATAF(0.26560378074645996000), _DATAF(-0.96408230066299438000)},

3443 {_DATAF(0.26523402333259583000), _DATAF(-0.96418404579162598000)},

3444 {_DATAF(0.26486423611640930000), _DATAF(-0.96428573131561279000)},

3445 {_DATAF(0.26449441909790039000), _DATAF(-0.96438723802566528000)},

3446 {_DATAF(0.26412457227706909000), _DATAF(-0.96448856592178345000)},

3447 {_DATAF(0.26375466585159302000), _DATAF(-0.96458977460861206000)},

3448 {_DATAF(0.26338472962379456000), _DATAF(-0.96469086408615112000)},

3449 {_DATAF(0.26301476359367371000), _DATAF(-0.96479183435440063000)},

3450 {_DATAF(0.26264476776123047000), _DATAF(-0.96489262580871582000)},

3451 {_DATAF(0.26227471232414246000), _DATAF(-0.96499323844909668000)},

3452 {_DATAF(0.26190462708473206000), _DATAF(-0.96509379148483276000)},

3453 {_DATAF(0.26153448224067688000), _DATAF(-0.96519410610198975000)},

3454 {_DATAF(0.26116433739662170000), _DATAF(-0.96529436111450195000)},

3455 {_DATAF(0.26079410314559937000), _DATAF(-0.96539443731307983000)},

3456 {_DATAF(0.26042386889457703000), _DATAF(-0.96549439430236816000)},

3457 {_DATAF(0.26005360484123230000), _DATAF(-0.96559417247772217000)},

3458 {_DATAF(0.25968328118324280000), _DATAF(-0.96569383144378662000)},

3459 {_DATAF(0.25931292772293091000), _DATAF(-0.96579337120056152000)},

3460 {_DATAF(0.25894251465797424000), _DATAF(-0.96589273214340210000)},

3461 {_DATAF(0.25857207179069519000), _DATAF(-0.96599197387695313000)},

3462 {_DATAF(0.25820159912109375000), _DATAF(-0.96609103679656982000)},

3463 {_DATAF(0.25783109664916992000), _DATAF(-0.96618998050689697000)},

3464 {_DATAF(0.25746056437492371000), _DATAF(-0.96628880500793457000)},

3465 {_DATAF(0.25708997249603271000), _DATAF(-0.96638745069503784000)},

3466 {_DATAF(0.25671935081481934000), _DATAF(-0.96648597717285156000)},

3467 {_DATAF(0.25634866952896118000), _DATAF(-0.96658438444137573000)},

3468 {_DATAF(0.25597798824310303000), _DATAF(-0.96668261289596558000)},

3469 {_DATAF(0.25560724735260010000), _DATAF(-0.96678072214126587000)},

3470 {_DATAF(0.25523647665977478000), _DATAF(-0.96687865257263184000)},

3471 {_DATAF(0.25486564636230469000), _DATAF(-0.96697646379470825000)},

3472 {_DATAF(0.25449481606483459000), _DATAF(-0.96707415580749512000)},

3473 {_DATAF(0.25412392616271973000), _DATAF(-0.96717166900634766000)},

3474 {_DATAF(0.25375300645828247000), _DATAF(-0.96726906299591064000)},

3475 {_DATAF(0.25338202714920044000), _DATAF(-0.96736627817153931000)},

3476 {_DATAF(0.25301104784011841000), _DATAF(-0.96746337413787842000)},

3477 {_DATAF(0.25264000892639160000), _DATAF(-0.96756035089492798000)},

3478 {_DATAF(0.25226894021034241000), _DATAF(-0.96765714883804321000)},

3479 {_DATAF(0.25189781188964844000), _DATAF(-0.96775382757186890000)},

3480 {_DATAF(0.25152668356895447000), _DATAF(-0.96785038709640503000)},

3481 {_DATAF(0.25115549564361572000), _DATAF(-0.96794676780700684000)},

3482 {_DATAF(0.25078427791595459000), _DATAF(-0.96804302930831909000)},

3483 {_DATAF(0.25041300058364868000), _DATAF(-0.96813911199569702000)},

3484 {_DATAF(0.25004172325134277000), _DATAF(-0.96823507547378540000)},

3485 {_DATAF(0.24967038631439209000), _DATAF(-0.96833086013793945000)},

3486 {_DATAF(0.24929900467395782000), _DATAF(-0.96842658519744873000)},

3487 {_DATAF(0.24892760813236237000), _DATAF(-0.96852207183837891000)},

3488 {_DATAF(0.24855616688728333000), _DATAF(-0.96861749887466431000)},

3489 {_DATAF(0.24818468093872070000), _DATAF(-0.96871274709701538000)},

3490 {_DATAF(0.24781316518783569000), _DATAF(-0.96880781650543213000)},

3491 {_DATAF(0.24744161963462830000), _DATAF(-0.96890282630920410000)},

3492 {_DATAF(0.24707002937793732000), _DATAF(-0.96899759769439697000)},

3493 {_DATAF(0.24669840931892395000), _DATAF(-0.96909230947494507000)},

3494 {_DATAF(0.24632674455642700000), _DATAF(-0.96918684244155884000)},

3495 {_DATAF(0.24595504999160767000), _DATAF(-0.96928125619888306000)},

3496 {_DATAF(0.24558331072330475000), _DATAF(-0.96937549114227295000)},

3497 {_DATAF(0.24521154165267944000), _DATAF(-0.96946960687637329000)},

3498 {_DATAF(0.24483974277973175000), _DATAF(-0.96956354379653931000)},

3499 {_DATAF(0.24446789920330048000), _DATAF(-0.96965736150741577000)},

3500 {_DATAF(0.24409602582454681000), _DATAF(-0.96975106000900269000)},

3501 {_DATAF(0.24372410774230957000), _DATAF(-0.96984457969665527000)},

3502 {_DATAF(0.24335215985774994000), _DATAF(-0.96993798017501831000)},

3503 {_DATAF(0.24298018217086792000), _DATAF(-0.97003126144409180000)},

3504 {_DATAF(0.24260815978050232000), _DATAF(-0.97012436389923096000)},

3505 {_DATAF(0.24223610758781433000), _DATAF(-0.97021734714508057000)},

3506 {_DATAF(0.24186401069164276000), _DATAF(-0.97031015157699585000)},

3507 {_DATAF(0.24149188399314880000), _DATAF(-0.97040283679962158000)},

3508 {_DATAF(0.24111972749233246000), _DATAF(-0.97049540281295776000)},

3509 {_DATAF(0.24074752628803253000), _DATAF(-0.97058779001235962000)},

3510 {_DATAF(0.24037529528141022000), _DATAF(-0.97068005800247192000)},

3511 {_DATAF(0.24000301957130432000), _DATAF(-0.97077214717864990000)},

3512 {_DATAF(0.23963071405887604000), _DATAF(-0.97086411714553833000)},

3513 {_DATAF(0.23925837874412537000), _DATAF(-0.97095590829849243000)},

3514 {_DATAF(0.23888599872589111000), _DATAF(-0.97104763984680176000)},

3515 {_DATAF(0.23851358890533447000), _DATAF(-0.97113913297653198000)},

3516 {_DATAF(0.23814114928245544000), _DATAF(-0.97123056650161743000)},

3517 {_DATAF(0.23776866495609283000), _DATAF(-0.97132182121276855000)},

3518 {_DATAF(0.23739615082740784000), _DATAF(-0.97141289710998535000)},

3519 {_DATAF(0.23702360689640045000), _DATAF(-0.97150391340255737000)},

3520 {_DATAF(0.23665101826190948000), _DATAF(-0.97159469127655029000)},

3521 {_DATAF(0.23627839982509613000), _DATAF(-0.97168540954589844000)},

3522 {_DATAF(0.23590575158596039000), _DATAF(-0.97177594900131226000)},

3523 {_DATAF(0.23553305864334106000), _DATAF(-0.97186630964279175000)},

3524 {_DATAF(0.23516033589839935000), _DATAF(-0.97195661067962646000)},

3525 {_DATAF(0.23478758335113525000), _DATAF(-0.97204673290252686000)},

3526 {_DATAF(0.23441478610038757000), _DATAF(-0.97213667631149292000)},

3527 {_DATAF(0.23404195904731750000), _DATAF(-0.97222650051116943000)},

3528 {_DATAF(0.23366910219192505000), _DATAF(-0.97231620550155640000)},

3529 {_DATAF(0.23329620063304901000), _DATAF(-0.97240573167800903000)},

3530 {_DATAF(0.23292326927185059000), _DATAF(-0.97249513864517212000)},

3531 {_DATAF(0.23255030810832977000), _DATAF(-0.97258436679840088000)},

3532 {_DATAF(0.23217730224132538000), _DATAF(-0.97267347574234009000)},

3533 {_DATAF(0.23180428147315979000), _DATAF(-0.97276246547698975000)},

3534 {_DATAF(0.23143121600151062000), _DATAF(-0.97285127639770508000)},

3535 {_DATAF(0.23105810582637787000), _DATAF(-0.97293996810913086000)},

3536 {_DATAF(0.23068498075008392000), _DATAF(-0.97302848100662231000)},

3537 {_DATAF(0.23031181097030640000), _DATAF(-0.97311687469482422000)},

3538 {_DATAF(0.22993859648704529000), _DATAF(-0.97320514917373657000)},

3539 {_DATAF(0.22956536710262299000), _DATAF(-0.97329324483871460000)},

3540 {_DATAF(0.22919209301471710000), _DATAF(-0.97338122129440308000)},

3541 {_DATAF(0.22881878912448883000), _DATAF(-0.97346901893615723000)},

3542 {_DATAF(0.22844545543193817000), _DATAF(-0.97355669736862183000)},

3543 {_DATAF(0.22807207703590393000), _DATAF(-0.97364425659179688000)},

3544 {_DATAF(0.22769868373870850000), _DATAF(-0.97373163700103760000)},

3545 {_DATAF(0.22732524573802948000), _DATAF(-0.97381889820098877000)},

3546 {_DATAF(0.22695176303386688000), _DATAF(-0.97390598058700562000)},

3547 {_DATAF(0.22657826542854309000), _DATAF(-0.97399294376373291000)},

3548 {_DATAF(0.22620472311973572000), _DATAF(-0.97407978773117065000)},

3549 {_DATAF(0.22583115100860596000), _DATAF(-0.97416645288467407000)},

3550 {_DATAF(0.22545754909515381000), _DATAF(-0.97425299882888794000)},

3551 {_DATAF(0.22508391737937927000), _DATAF(-0.97433936595916748000)},

3552 {_DATAF(0.22471024096012115000), _DATAF(-0.97442561388015747000)},

3553 {_DATAF(0.22433653473854065000), _DATAF(-0.97451174259185791000)},

3554 {_DATAF(0.22396279871463776000), _DATAF(-0.97459769248962402000)},

3555 {_DATAF(0.22358903288841248000), _DATAF(-0.97468352317810059000)},

3556 {_DATAF(0.22321522235870361000), _DATAF(-0.97476917505264282000)},

3557 {_DATAF(0.22284139692783356000), _DATAF(-0.97485470771789551000)},

3558 {_DATAF(0.22246752679347992000), _DATAF(-0.97494012117385864000)},

3559 {_DATAF(0.22209362685680389000), _DATAF(-0.97502535581588745000)},

3560 {_DATAF(0.22171968221664429000), _DATAF(-0.97511047124862671000)},

3561 {_DATAF(0.22134572267532349000), _DATAF(-0.97519540786743164000)},

3562 {_DATAF(0.22097171843051910000), _DATAF(-0.97528022527694702000)},

3563 {_DATAF(0.22059768438339233000), _DATAF(-0.97536486387252808000)},

3564 {_DATAF(0.22022362053394318000), _DATAF(-0.97544938325881958000)},

3565 {_DATAF(0.21984952688217163000), _DATAF(-0.97553378343582153000)},

3566 {_DATAF(0.21947540342807770000), _DATAF(-0.97561800479888916000)},

3567 {_DATAF(0.21910123527050018000), _DATAF(-0.97570210695266724000)},

3568 {_DATAF(0.21872705221176147000), _DATAF(-0.97578608989715576000)},

3569 {_DATAF(0.21835282444953918000), _DATAF(-0.97586989402770996000)},

3570 {_DATAF(0.21797856688499451000), _DATAF(-0.97595357894897461000)},

3571 {_DATAF(0.21760427951812744000), _DATAF(-0.97603708505630493000)},

3572 {_DATAF(0.21722994744777679000), _DATAF(-0.97612047195434570000)},

3573 {_DATAF(0.21685560047626495000), _DATAF(-0.97620368003845215000)},

3574 {_DATAF(0.21648120880126953000), _DATAF(-0.97628676891326904000)},

3575 {_DATAF(0.21610680222511292000), _DATAF(-0.97636973857879639000)},

3576 {_DATAF(0.21573235094547272000), _DATAF(-0.97645252943038940000)},

3577 {_DATAF(0.21535786986351013000), _DATAF(-0.97653520107269287000)},

3578 {_DATAF(0.21498335897922516000), _DATAF(-0.97661769390106201000)},

3579 {_DATAF(0.21460881829261780000), _DATAF(-0.97670006752014160000)},

3580 {_DATAF(0.21423423290252686000), _DATAF(-0.97678232192993164000)},

3581 {_DATAF(0.21385963261127472000), _DATAF(-0.97686439752578735000)},

3582 {_DATAF(0.21348498761653900000), _DATAF(-0.97694635391235352000)},

3583 {_DATAF(0.21311031281948090000), _DATAF(-0.97702813148498535000)},

3584 {_DATAF(0.21273562312126160000), _DATAF(-0.97710978984832764000)},

3585 {_DATAF(0.21236088871955872000), _DATAF(-0.97719132900238037000)},

3586 {_DATAF(0.21198612451553345000), _DATAF(-0.97727268934249878000)},

3587 {_DATAF(0.21161133050918579000), _DATAF(-0.97735387086868286000)},

3588 {_DATAF(0.21123650670051575000), _DATAF(-0.97743499279022217000)},

3589 {_DATAF(0.21086163818836212000), _DATAF(-0.97751593589782715000)},

3590 {_DATAF(0.21048675477504730000), _DATAF(-0.97759670019149780000)},

3591 {_DATAF(0.21011184155941010000), _DATAF(-0.97767734527587891000)},

3592 {_DATAF(0.20973688364028931000), _DATAF(-0.97775787115097046000)},

3593 {_DATAF(0.20936191082000732000), _DATAF(-0.97783821821212769000)},

3594 {_DATAF(0.20898689329624176000), _DATAF(-0.97791844606399536000)},

3595 {_DATAF(0.20861184597015381000), _DATAF(-0.97799849510192871000)},

3596 {_DATAF(0.20823678374290466000), _DATAF(-0.97807842493057251000)},

3597 {_DATAF(0.20786167681217194000), _DATAF(-0.97815823554992676000)},

3598 {_DATAF(0.20748654007911682000), _DATAF(-0.97823786735534668000)},

3599 {_DATAF(0.20711137354373932000), _DATAF(-0.97831737995147705000)},

3600 {_DATAF(0.20673617720603943000), _DATAF(-0.97839671373367310000)},

3601 {_DATAF(0.20636095106601715000), _DATAF(-0.97847592830657959000)},

3602 {_DATAF(0.20598569512367249000), _DATAF(-0.97855502367019653000)},

3603 {_DATAF(0.20561040937900543000), _DATAF(-0.97863394021987915000)},

3604 {_DATAF(0.20523509383201599000), _DATAF(-0.97871267795562744000)},

3605 {_DATAF(0.20485974848270416000), _DATAF(-0.97879135608673096000)},

3606 {_DATAF(0.20448437333106995000), _DATAF(-0.97886985540390015000)},

3607 {_DATAF(0.20410896837711334000), _DATAF(-0.97894817590713501000)},

3608 {_DATAF(0.20373353362083435000), _DATAF(-0.97902637720108032000)},

3609 {_DATAF(0.20335806906223297000), _DATAF(-0.97910445928573608000)},

3610 {_DATAF(0.20298255980014801000), _DATAF(-0.97918236255645752000)},

3611 {_DATAF(0.20260703563690186000), _DATAF(-0.97926014661788940000)},

3612 {_DATAF(0.20223148167133331000), _DATAF(-0.97933775186538696000)},

3613 {_DATAF(0.20185589790344238000), _DATAF(-0.97941523790359497000)},

3614 {_DATAF(0.20148028433322906000), _DATAF(-0.97949254512786865000)},

3615 {_DATAF(0.20110464096069336000), _DATAF(-0.97956979274749756000)},

3616 {_DATAF(0.20072895288467407000), _DATAF(-0.97964680194854736000)},

3617 {_DATAF(0.20035324990749359000), _DATAF(-0.97972375154495239000)},

3618 {_DATAF(0.19997751712799072000), _DATAF(-0.97980046272277832000)},

3619 {_DATAF(0.19960175454616547000), _DATAF(-0.97987711429595947000)},

3620 {_DATAF(0.19922596216201782000), _DATAF(-0.97995358705520630000)},

3621 {_DATAF(0.19885013997554779000), _DATAF(-0.98002988100051880000)},

3622 {_DATAF(0.19847428798675537000), _DATAF(-0.98010611534118652000)},

3623 {_DATAF(0.19809840619564056000), _DATAF(-0.98018211126327515000)},

3624 {_DATAF(0.19772249460220337000), _DATAF(-0.98025804758071899000)},

3625 {_DATAF(0.19734656810760498000), _DATAF(-0.98033380508422852000)},

3626 {_DATAF(0.19697059690952301000), _DATAF(-0.98040938377380371000)},

3627 {_DATAF(0.19659459590911865000), _DATAF(-0.98048484325408936000)},

3628 {_DATAF(0.19621856510639191000), _DATAF(-0.98056018352508545000)},

3629 {_DATAF(0.19584251940250397000), _DATAF(-0.98063534498214722000)},

3630 {_DATAF(0.19546642899513245000), _DATAF(-0.98071038722991943000)},

3631 {_DATAF(0.19509032368659973000), _DATAF(-0.98078525066375732000)},

3632 {_DATAF(0.19471418857574463000), _DATAF(-0.98085999488830566000)},

3633 {_DATAF(0.19433800876140594000), _DATAF(-0.98093461990356445000)},

3634 {_DATAF(0.19396181404590607000), _DATAF(-0.98100906610488892000)},

3635 {_DATAF(0.19358558952808380000), _DATAF(-0.98108339309692383000)},

3636 {_DATAF(0.19320933520793915000), _DATAF(-0.98115754127502441000)},

3637 {_DATAF(0.19283305108547211000), _DATAF(-0.98123157024383545000)},

3638 {_DATAF(0.19245673716068268000), _DATAF(-0.98130548000335693000)},

3639 {_DATAF(0.19208039343357086000), _DATAF(-0.98137921094894409000)},

3640 {_DATAF(0.19170403480529785000), _DATAF(-0.98145276308059692000)},

3641 {_DATAF(0.19132763147354126000), _DATAF(-0.98152625560760498000)},

3642 {_DATAF(0.19095121324062347000), _DATAF(-0.98159950971603394000)},

3643 {_DATAF(0.19057475030422211000), _DATAF(-0.98167270421981812000)},

3644 {_DATAF(0.19019827246665955000), _DATAF(-0.98174571990966797000)},

3645 {_DATAF(0.18982176482677460000), _DATAF(-0.98181855678558350000)},

3646 {_DATAF(0.18944522738456726000), _DATAF(-0.98189127445220947000)},

3647 {_DATAF(0.18906866014003754000), _DATAF(-0.98196387290954590000)},

3648 {_DATAF(0.18869207799434662000), _DATAF(-0.98203629255294800000)},

3649 {_DATAF(0.18831545114517212000), _DATAF(-0.98210859298706055000)},

3650 {_DATAF(0.18793880939483643000), _DATAF(-0.98218071460723877000)},

3651 {_DATAF(0.18756212294101715000), _DATAF(-0.98225271701812744000)},

3652 {_DATAF(0.18718542158603668000), _DATAF(-0.98232460021972656000)},

3653 {_DATAF(0.18680869042873383000), _DATAF(-0.98239630460739136000)},

3654 {_DATAF(0.18643194437026978000), _DATAF(-0.98246788978576660000)},

3655 {_DATAF(0.18605515360832214000), _DATAF(-0.98253929615020752000)},

3656 {_DATAF(0.18567833304405212000), _DATAF(-0.98261058330535889000)},

3657 {_DATAF(0.18530149757862091000), _DATAF(-0.98268169164657593000)},

3658 {_DATAF(0.18492463231086731000), _DATAF(-0.98275268077850342000)},

3659 {_DATAF(0.18454773724079132000), _DATAF(-0.98282355070114136000)},

3660 {_DATAF(0.18417081236839294000), _DATAF(-0.98289424180984497000)},

3661 {_DATAF(0.18379387259483337000), _DATAF(-0.98296481370925903000)},

3662 {_DATAF(0.18341688811779022000), _DATAF(-0.98303520679473877000)},

3663 {_DATAF(0.18303988873958588000), _DATAF(-0.98310548067092896000)},

3664 {_DATAF(0.18266285955905914000), _DATAF(-0.98317563533782959000)},

3665 {_DATAF(0.18228580057621002000), _DATAF(-0.98324561119079590000)},

3666 {_DATAF(0.18190871179103851000), _DATAF(-0.98331540822982788000)},

3667 {_DATAF(0.18153160810470581000), _DATAF(-0.98338508605957031000)},

3668 {_DATAF(0.18115447461605072000), _DATAF(-0.98345464468002319000)},

3669 {_DATAF(0.18077731132507324000), _DATAF(-0.98352402448654175000)},

3670 {_DATAF(0.18040011823177338000), _DATAF(-0.98359328508377075000)},

3671 {_DATAF(0.18002289533615112000), _DATAF(-0.98366242647171021000)},

3672 {_DATAF(0.17964565753936768000), _DATAF(-0.98373138904571533000)},

3673 {_DATAF(0.17926838994026184000), _DATAF(-0.98380023241043091000)},

3674 {_DATAF(0.17889109253883362000), _DATAF(-0.98386889696121216000)},

3675 {_DATAF(0.17851376533508301000), _DATAF(-0.98393744230270386000)},

3676 {_DATAF(0.17813642323017120000), _DATAF(-0.98400580883026123000)},

3677 {_DATAF(0.17775905132293701000), _DATAF(-0.98407405614852905000)},

3678 {_DATAF(0.17738164961338043000), _DATAF(-0.98414212465286255000)},

3679 {_DATAF(0.17700421810150146000), _DATAF(-0.98421007394790649000)},

3680 {_DATAF(0.17662677168846130000), _DATAF(-0.98427790403366089000)},

3681 {_DATAF(0.17624929547309875000), _DATAF(-0.98434555530548096000)},

3682 {_DATAF(0.17587178945541382000), _DATAF(-0.98441308736801147000)},

3683 {_DATAF(0.17549425363540649000), _DATAF(-0.98448044061660767000)},

3684 {_DATAF(0.17511670291423798000), _DATAF(-0.98454767465591431000)},

3685 {_DATAF(0.17473910748958588000), _DATAF(-0.98461478948593140000)},

3686 {_DATAF(0.17436151206493378000), _DATAF(-0.98468172550201416000)},

3687 {_DATAF(0.17398387193679810000), _DATAF(-0.98474848270416260000)},

3688 {_DATAF(0.17360621690750122000), _DATAF(-0.98481518030166626000)},

3689 {_DATAF(0.17322853207588196000), _DATAF(-0.98488163948059082000)},

3690 {_DATAF(0.17285081744194031000), _DATAF(-0.98494803905487061000)},

3691 {_DATAF(0.17247308790683746000), _DATAF(-0.98501425981521606000)},

3692 {_DATAF(0.17209532856941223000), _DATAF(-0.98508030176162720000)},

3693 {_DATAF(0.17171753942966461000), _DATAF(-0.98514622449874878000)},

3694 {_DATAF(0.17133972048759460000), _DATAF(-0.98521202802658081000)},

3695 {_DATAF(0.17096188664436340000), _DATAF(-0.98527765274047852000)},

3696 {_DATAF(0.17058402299880981000), _DATAF(-0.98534315824508667000)},

3697 {_DATAF(0.17020614445209503000), _DATAF(-0.98540848493576050000)},

3698 {_DATAF(0.16982822120189667000), _DATAF(-0.98547369241714478000)},

3699 {_DATAF(0.16945029795169830000), _DATAF(-0.98553872108459473000)},

3700 {_DATAF(0.16907232999801636000), _DATAF(-0.98560363054275513000)},

3701 {_DATAF(0.16869434714317322000), _DATAF(-0.98566842079162598000)},

3702 {_DATAF(0.16831633448600769000), _DATAF(-0.98573303222656250000)},

3703 {_DATAF(0.16793829202651978000), _DATAF(-0.98579752445220947000)},

3704 {_DATAF(0.16756023466587067000), _DATAF(-0.98586183786392212000)},

3705 {_DATAF(0.16718214750289917000), _DATAF(-0.98592603206634521000)},

3706 {_DATAF(0.16680404543876648000), _DATAF(-0.98599004745483398000)},

3707 {_DATAF(0.16642589867115021000), _DATAF(-0.98605394363403320000)},

3708 {_DATAF(0.16604773700237274000), _DATAF(-0.98611772060394287000)},

3709 {_DATAF(0.16566956043243408000), _DATAF(-0.98618131875991821000)},

3710 {_DATAF(0.16529135406017303000), _DATAF(-0.98624479770660400000)},

3711 {_DATAF(0.16491311788558960000), _DATAF(-0.98630809783935547000)},

3712 {_DATAF(0.16453486680984497000), _DATAF(-0.98637127876281738000)},

3713 {_DATAF(0.16415658593177795000), _DATAF(-0.98643428087234497000)},

3714 {_DATAF(0.16377827525138855000), _DATAF(-0.98649716377258301000)},

3715 {_DATAF(0.16339994966983795000), _DATAF(-0.98655992746353149000)},

3716 {_DATAF(0.16302159428596497000), _DATAF(-0.98662251234054565000)},

3717 {_DATAF(0.16264322400093079000), _DATAF(-0.98668491840362549000)},

3718 {_DATAF(0.16226482391357422000), _DATAF(-0.98674726486206055000)},

3719 {_DATAF(0.16188639402389526000), _DATAF(-0.98680937290191650000)},

3720 {_DATAF(0.16150794923305511000), _DATAF(-0.98687142133712769000)},

3721 {_DATAF(0.16112947463989258000), _DATAF(-0.98693329095840454000)},

3722 {_DATAF(0.16075097024440765000), _DATAF(-0.98699498176574707000)},

3723 {_DATAF(0.16037245094776154000), _DATAF(-0.98705655336380005000)},

3724 {_DATAF(0.15999391674995422000), _DATAF(-0.98711800575256348000)},

3725 {_DATAF(0.15961535274982452000), _DATAF(-0.98717927932739258000)},

3726 {_DATAF(0.15923675894737244000), _DATAF(-0.98724043369293213000)},

3727 {_DATAF(0.15885815024375916000), _DATAF(-0.98730140924453735000)},

3728 {_DATAF(0.15847951173782349000), _DATAF(-0.98736226558685303000)},

3729 {_DATAF(0.15810084342956543000), _DATAF(-0.98742294311523438000)},

3730 {_DATAF(0.15772216022014618000), _DATAF(-0.98748350143432617000)},

3731 {_DATAF(0.15734346210956573000), _DATAF(-0.98754394054412842000)},

3732 {_DATAF(0.15696471929550171000), _DATAF(-0.98760420083999634000)},

3733 {_DATAF(0.15658597648143768000), _DATAF(-0.98766434192657471000)},

3734 {_DATAF(0.15620720386505127000), _DATAF(-0.98772430419921875000)},

3735 {_DATAF(0.15582840144634247000), _DATAF(-0.98778414726257324000)},

3736 {_DATAF(0.15544956922531128000), _DATAF(-0.98784381151199341000)},

3737 {_DATAF(0.15507073700428009000), _DATAF(-0.98790335655212402000)},

3738 {_DATAF(0.15469186007976532000), _DATAF(-0.98796278238296509000)},

3739 {_DATAF(0.15431296825408936000), _DATAF(-0.98802202939987183000)},

3740 {_DATAF(0.15393406152725220000), _DATAF(-0.98808109760284424000)},

3741 {_DATAF(0.15355512499809265000), _DATAF(-0.98814010620117188000)},

3742 {_DATAF(0.15317615866661072000), _DATAF(-0.98819887638092041000)},

3743 {_DATAF(0.15279719233512878000), _DATAF(-0.98825758695602417000)},

3744 {_DATAF(0.15241818130016327000), _DATAF(-0.98831611871719360000)},

3745 {_DATAF(0.15203915536403656000), _DATAF(-0.98837447166442871000)},

3746 {_DATAF(0.15166011452674866000), _DATAF(-0.98843270540237427000)},

3747 {_DATAF(0.15128104388713837000), _DATAF(-0.98849081993103027000)},

3748 {_DATAF(0.15090194344520569000), _DATAF(-0.98854875564575195000)},

3749 {_DATAF(0.15052282810211182000), _DATAF(-0.98860651254653931000)},

3750 {_DATAF(0.15014369785785675000), _DATAF(-0.98866420984268188000)},

3751 {_DATAF(0.14976453781127930000), _DATAF(-0.98872166872024536000)},

3752 {_DATAF(0.14938534796237946000), _DATAF(-0.98877906799316406000)},

3753 {_DATAF(0.14900614321231842000), _DATAF(-0.98883628845214844000)},

3754 {_DATAF(0.14862692356109619000), _DATAF(-0.98889333009719849000)},

3755 {_DATAF(0.14824767410755157000), _DATAF(-0.98895025253295898000)},

3756 {_DATAF(0.14786840975284576000), _DATAF(-0.98900705575942993000)},

3757 {_DATAF(0.14748911559581757000), _DATAF(-0.98906368017196655000)},

3758 {_DATAF(0.14710980653762817000), _DATAF(-0.98912018537521362000)},

3759 {_DATAF(0.14673046767711639000), _DATAF(-0.98917651176452637000)},

3760 {_DATAF(0.14635111391544342000), _DATAF(-0.98923271894454956000)},

3761 {_DATAF(0.14597174525260925000), _DATAF(-0.98928874731063843000)},

3762 {_DATAF(0.14559234678745270000), _DATAF(-0.98934465646743774000)},

3763 {_DATAF(0.14521291851997375000), _DATAF(-0.98940044641494751000)},

3764 {_DATAF(0.14483349025249481000), _DATAF(-0.98945605754852295000)},

3765 {_DATAF(0.14445401728153229000), _DATAF(-0.98951148986816406000)},

3766 {_DATAF(0.14407454431056976000), _DATAF(-0.98956686258316040000)},

3767 {_DATAF(0.14369502663612366000), _DATAF(-0.98962199687957764000)},

3768 {_DATAF(0.14331550896167755000), _DATAF(-0.98967707157135010000)},

3769 {_DATAF(0.14293596148490906000), _DATAF(-0.98973196744918823000)},

3770 {_DATAF(0.14255639910697937000), _DATAF(-0.98978668451309204000)},

3771 {_DATAF(0.14217680692672729000), _DATAF(-0.98984128236770630000)},

3772 {_DATAF(0.14179719984531403000), _DATAF(-0.98989570140838623000)},

3773 {_DATAF(0.14141756296157837000), _DATAF(-0.98995006084442139000)},

3774 {_DATAF(0.14103791117668152000), _DATAF(-0.99000418186187744000)},

3775 {_DATAF(0.14065824449062347000), _DATAF(-0.99005818367004395000)},

3776 {_DATAF(0.14027854800224304000), _DATAF(-0.99011206626892090000)},

3777 {_DATAF(0.13989883661270142000), _DATAF(-0.99016582965850830000)},

3778 {_DATAF(0.13951909542083740000), _DATAF(-0.99021935462951660000)},

3779 {_DATAF(0.13913933932781219000), _DATAF(-0.99027281999588013000)},

3780 {_DATAF(0.13875956833362579000), _DATAF(-0.99032610654830933000)},

3781 {_DATAF(0.13837976753711700000), _DATAF(-0.99037921428680420000)},

3782 {_DATAF(0.13799995183944702000), _DATAF(-0.99043226242065430000)},

3783 {_DATAF(0.13762012124061584000), _DATAF(-0.99048507213592529000)},

3784 {_DATAF(0.13724026083946228000), _DATAF(-0.99053776264190674000)},

3785 {_DATAF(0.13686038553714752000), _DATAF(-0.99059033393859863000)},

3786 {_DATAF(0.13648049533367157000), _DATAF(-0.99064278602600098000)},

3787 {_DATAF(0.13610057532787323000), _DATAF(-0.99069499969482422000)},

3788 {_DATAF(0.13572064042091370000), _DATAF(-0.99074715375900269000)},

3789 {_DATAF(0.13534067571163177000), _DATAF(-0.99079912900924683000)},

3790 {_DATAF(0.13496071100234985000), _DATAF(-0.99085092544555664000)},

3791 {_DATAF(0.13458070158958435000), _DATAF(-0.99090266227722168000)},

3792 {_DATAF(0.13420069217681885000), _DATAF(-0.99095416069030762000)},

3793 {_DATAF(0.13382065296173096000), _DATAF(-0.99100553989410400000)},

3794 {_DATAF(0.13344059884548187000), _DATAF(-0.99105679988861084000)},

3795 {_DATAF(0.13306052982807159000), _DATAF(-0.99110794067382813000)},

3796 {_DATAF(0.13268043100833893000), _DATAF(-0.99115884304046631000)},

3797 {_DATAF(0.13230031728744507000), _DATAF(-0.99120968580245972000)},

3798 {_DATAF(0.13192018866539001000), _DATAF(-0.99126034975051880000)},

3799 {_DATAF(0.13154003024101257000), _DATAF(-0.99131083488464355000)},

3800 {_DATAF(0.13115985691547394000), _DATAF(-0.99136126041412354000)},

3801 {_DATAF(0.13077966868877411000), _DATAF(-0.99141144752502441000)},

3802 {_DATAF(0.13039945065975189000), _DATAF(-0.99146151542663574000)},

3803 {_DATAF(0.13001921772956848000), _DATAF(-0.99151146411895752000)},

3804 {_DATAF(0.12963896989822388000), _DATAF(-0.99156123399734497000)},

3805 {_DATAF(0.12925870716571808000), _DATAF(-0.99161088466644287000)},

3806 {_DATAF(0.12887841463088989000), _DATAF(-0.99166041612625122000)},

3807 {_DATAF(0.12849810719490051000), _DATAF(-0.99170976877212524000)},

3808 {_DATAF(0.12811778485774994000), _DATAF(-0.99175894260406494000)},

3809 {_DATAF(0.12773744761943817000), _DATAF(-0.99180799722671509000)},

3810 {_DATAF(0.12735708057880402000), _DATAF(-0.99185693264007568000)},

3811 {_DATAF(0.12697669863700867000), _DATAF(-0.99190568923950195000)},

3812 {_DATAF(0.12659630179405212000), _DATAF(-0.99195432662963867000)},

3813 {_DATAF(0.12621587514877319000), _DATAF(-0.99200278520584106000)},

3814 {_DATAF(0.12583543360233307000), _DATAF(-0.99205112457275391000)},

3815 {_DATAF(0.12545497715473175000), _DATAF(-0.99209928512573242000)},

3816 {_DATAF(0.12507450580596924000), _DATAF(-0.99214732646942139000)},

3817 {_DATAF(0.12469401955604553000), _DATAF(-0.99219524860382080000)},

3818 {_DATAF(0.12431350350379944000), _DATAF(-0.99224299192428589000)},

3819 {_DATAF(0.12393297255039215000), _DATAF(-0.99229061603546143000)},

3820 {_DATAF(0.12355242669582367000), _DATAF(-0.99233806133270264000)},

3821 {_DATAF(0.12317185848951340000), _DATAF(-0.99238532781600952000)},

3822 {_DATAF(0.12279127538204193000), _DATAF(-0.99243253469467163000)},

3823 {_DATAF(0.12241067737340927000), _DATAF(-0.99247956275939941000)},

3824 {_DATAF(0.12203005701303482000), _DATAF(-0.99252641201019287000)},

3825 {_DATAF(0.12164941430091858000), _DATAF(-0.99257314205169678000)},

3826 {_DATAF(0.12126876413822174000), _DATAF(-0.99261969327926636000)},

3827 {_DATAF(0.12088808417320251000), _DATAF(-0.99266612529754639000)},

3828 {_DATAF(0.12050739675760269000), _DATAF(-0.99271243810653687000)},

3829 {_DATAF(0.12012668699026108000), _DATAF(-0.99275857210159302000)},

3830 {_DATAF(0.11974596232175827000), _DATAF(-0.99280458688735962000)},

3831 {_DATAF(0.11936521530151367000), _DATAF(-0.99285042285919189000)},

3832 {_DATAF(0.11898445338010788000), _DATAF(-0.99289613962173462000)},

3833 {_DATAF(0.11860367655754089000), _DATAF(-0.99294167757034302000)},

3834 {_DATAF(0.11822287738323212000), _DATAF(-0.99298709630966187000)},

3835 {_DATAF(0.11784206330776215000), _DATAF(-0.99303233623504639000)},

3836 {_DATAF(0.11746122688055038000), _DATAF(-0.99307745695114136000)},

3837 {_DATAF(0.11708038300275803000), _DATAF(-0.99312245845794678000)},

3838 {_DATAF(0.11669951677322388000), _DATAF(-0.99316728115081787000)},

3839 {_DATAF(0.11631862819194794000), _DATAF(-0.99321192502975464000)},

3840 {_DATAF(0.11593773216009140000), _DATAF(-0.99325650930404663000)},

3841 {_DATAF(0.11555681377649307000), _DATAF(-0.99330085515975952000)},

3842 {_DATAF(0.11517588049173355000), _DATAF(-0.99334514141082764000)},

3843 {_DATAF(0.11479492485523224000), _DATAF(-0.99338918924331665000)},

3844 {_DATAF(0.11441396176815033000), _DATAF(-0.99343317747116089000)},

3845 {_DATAF(0.11403297632932663000), _DATAF(-0.99347698688507080000)},

3846 {_DATAF(0.11365196853876114000), _DATAF(-0.99352061748504639000)},

3847 {_DATAF(0.11327095329761505000), _DATAF(-0.99356412887573242000)},

3848 {_DATAF(0.11288991570472717000), _DATAF(-0.99360752105712891000)},

3849 {_DATAF(0.11250886321067810000), _DATAF(-0.99365073442459106000)},

3850 {_DATAF(0.11212779581546783000), _DATAF(-0.99369376897811890000)},

3851 {_DATAF(0.11174671351909637000), _DATAF(-0.99373674392700195000)},

3852 {_DATAF(0.11136560887098312000), _DATAF(-0.99377948045730591000)},

3853 {_DATAF(0.11098448932170868000), _DATAF(-0.99382215738296509000)},

3854 {_DATAF(0.11060335487127304000), _DATAF(-0.99386465549468994000)},

3855 {_DATAF(0.11022220551967621000), _DATAF(-0.99390697479248047000)},

3856 {_DATAF(0.10984104126691818000), _DATAF(-0.99394917488098145000)},

3857 {_DATAF(0.10945985466241837000), _DATAF(-0.99399119615554810000)},

3858 {_DATAF(0.10907866060733795000), _DATAF(-0.99403309822082520000)},

3859 {_DATAF(0.10869744420051575000), _DATAF(-0.99407488107681274000)},

3860 {_DATAF(0.10831621289253235000), _DATAF(-0.99411648511886597000)},

3861 {_DATAF(0.10793496668338776000), _DATAF(-0.99415796995162964000)},

3862 {_DATAF(0.10755370557308197000), _DATAF(-0.99419927597045898000)},

3863 {_DATAF(0.10717242211103439000), _DATAF(-0.99424046277999878000)},

3864 {_DATAF(0.10679113119840622000), _DATAF(-0.99428147077560425000)},

3865 {_DATAF(0.10640981793403625000), _DATAF(-0.99432235956192017000)},

3866 {_DATAF(0.10602849721908569000), _DATAF(-0.99436306953430176000)},

3867 {_DATAF(0.10564715415239334000), _DATAF(-0.99440366029739380000)},

3868 {_DATAF(0.10526579618453979000), _DATAF(-0.99444413185119629000)},

3869 {_DATAF(0.10488442331552505000), _DATAF(-0.99448442459106445000)},

3870 {_DATAF(0.10450303554534912000), _DATAF(-0.99452453851699829000)},

3871 {_DATAF(0.10412163287401199000), _DATAF(-0.99456459283828735000)},

3872 {_DATAF(0.10374021530151367000), _DATAF(-0.99460440874099731000)},

3873 {_DATAF(0.10335878282785416000), _DATAF(-0.99464416503906250000)},

3874 {_DATAF(0.10297733545303345000), _DATAF(-0.99468368291854858000)},

3875 {_DATAF(0.10259586572647095000), _DATAF(-0.99472314119338989000)},

3876 {_DATAF(0.10221438854932785000), _DATAF(-0.99476242065429688000)},

3877 {_DATAF(0.10183289647102356000), _DATAF(-0.99480152130126953000)},

3878 {_DATAF(0.10145138949155807000), _DATAF(-0.99484050273895264000)},

3879 {_DATAF(0.10106986016035080000), _DATAF(-0.99487930536270142000)},

3880 {_DATAF(0.10068832337856293000), _DATAF(-0.99491798877716064000)},

3881 {_DATAF(0.10030677169561386000), _DATAF(-0.99495655298233032000)},

3882 {_DATAF(0.09992520511150360100), _DATAF(-0.99499493837356567000)},

3883 {_DATAF(0.09954361617565155000), _DATAF(-0.99503320455551147000)},

3884 {_DATAF(0.09916201978921890300), _DATAF(-0.99507129192352295000)},

3885 {_DATAF(0.09878040850162506100), _DATAF(-0.99510926008224487000)},

3886 {_DATAF(0.09839878231287002600), _DATAF(-0.99514704942703247000)},

3887 {_DATAF(0.09801714122295379600), _DATAF(-0.99518471956253052000)},

3888 {_DATAF(0.09763548523187637300), _DATAF(-0.99522227048873901000)},

3889 {_DATAF(0.09725381433963775600), _DATAF(-0.99525958299636841000)},

3890 {_DATAF(0.09687212854623794600), _DATAF(-0.99529683589935303000)},

3891 {_DATAF(0.09649042785167694100), _DATAF(-0.99533390998840332000)},

3892 {_DATAF(0.09610871970653533900), _DATAF(-0.99537086486816406000)},

3893 {_DATAF(0.09572698920965194700), _DATAF(-0.99540764093399048000)},

3894 {_DATAF(0.09534525126218795800), _DATAF(-0.99544423818588257000)},

3895 {_DATAF(0.09496349841356277500), _DATAF(-0.99548077583312988000)},

3896 {_DATAF(0.09458172321319580100), _DATAF(-0.99551707506179810000)},

3897 {_DATAF(0.09419994056224823000), _DATAF(-0.99555331468582153000)},

3898 {_DATAF(0.09381814301013946500), _DATAF(-0.99558937549591064000)},

3899 {_DATAF(0.09343633800745010400), _DATAF(-0.99562525749206543000)},

3900 {_DATAF(0.09305451065301895100), _DATAF(-0.99566102027893066000)},

3901 {_DATAF(0.09267267584800720200), _DATAF(-0.99569660425186157000)},

3902 {_DATAF(0.09229081869125366200), _DATAF(-0.99573206901550293000)},

3903 {_DATAF(0.09190895408391952500), _DATAF(-0.99576741456985474000)},

3904 {_DATAF(0.09152707457542419400), _DATAF(-0.99580258131027222000)},

3905 {_DATAF(0.09114518761634826700), _DATAF(-0.99583762884140015000)},

3906 {_DATAF(0.09076327830553054800), _DATAF(-0.99587249755859375000)},

3907 {_DATAF(0.09038136154413223300), _DATAF(-0.99590724706649780000)},

3908 {_DATAF(0.08999942988157272300), _DATAF(-0.99594181776046753000)},

3909 {_DATAF(0.08961748331785202000), _DATAF(-0.99597626924514771000)},

3910 {_DATAF(0.08923552185297012300), _DATAF(-0.99601054191589355000)},

3911 {_DATAF(0.08885355293750762900), _DATAF(-0.99604469537734985000)},

3912 {_DATAF(0.08847156912088394200), _DATAF(-0.99607872962951660000)},

3913 {_DATAF(0.08808957040309906000), _DATAF(-0.99611258506774902000)},

3914 {_DATAF(0.08770755678415298500), _DATAF(-0.99614626169204712000)},

3915 {_DATAF(0.08732553571462631200), _DATAF(-0.99617981910705566000)},

3916 {_DATAF(0.08694349974393844600), _DATAF(-0.99621325731277466000)},

3917 {_DATAF(0.08656144887208938600), _DATAF(-0.99624651670455933000)},

3918 {_DATAF(0.08617939054965972900), _DATAF(-0.99627965688705444000)},

3919 {_DATAF(0.08579730987548828100), _DATAF(-0.99631261825561523000)},

3920 {_DATAF(0.08541522175073623700), _DATAF(-0.99634546041488647000)},

3921 {_DATAF(0.08503312617540359500), _DATAF(-0.99637812376022339000)},

3922 {_DATAF(0.08465101569890976000), _DATAF(-0.99641066789627075000)},

3923 {_DATAF(0.08426889032125473000), _DATAF(-0.99644303321838379000)},

3924 {_DATAF(0.08388675004243850700), _DATAF(-0.99647527933120728000)},

3925 {_DATAF(0.08350460231304168700), _DATAF(-0.99650740623474121000)},

3926 {_DATAF(0.08312243968248367300), _DATAF(-0.99653935432434082000)},

3927 {_DATAF(0.08274026215076446500), _DATAF(-0.99657112360000610000)},

3928 {_DATAF(0.08235807716846466100), _DATAF(-0.99660277366638184000)},

3929 {_DATAF(0.08197587728500366200), _DATAF(-0.99663430452346802000)},

3930 {_DATAF(0.08159366995096206700), _DATAF(-0.99666565656661987000)},

3931 {_DATAF(0.08121144771575927700), _DATAF(-0.99669688940048218000)},

3932 {_DATAF(0.08082921057939529400), _DATAF(-0.99672794342041016000)},

3933 {_DATAF(0.08044696599245071400), _DATAF(-0.99675887823104858000)},

3934 {_DATAF(0.08006470650434494000), _DATAF(-0.99678969383239746000)},

3935 {_DATAF(0.07968243956565856900), _DATAF(-0.99682027101516724000)},

3936 {_DATAF(0.07930015772581100500), _DATAF(-0.99685078859329224000)},

3937 {_DATAF(0.07891786098480224600), _DATAF(-0.99688112735748291000)},

3938 {_DATAF(0.07853555679321289100), _DATAF(-0.99691128730773926000)},

3939 {_DATAF(0.07815324515104293800), _DATAF(-0.99694132804870605000)},

3940 {_DATAF(0.07777091115713119500), _DATAF(-0.99697124958038330000)},

3941 {_DATAF(0.07738857716321945200), _DATAF(-0.99700099229812622000)},

3942 {_DATAF(0.07700622081756591800), _DATAF(-0.99703061580657959000)},

3943 {_DATAF(0.07662386447191238400), _DATAF(-0.99706006050109863000)},

3944 {_DATAF(0.07624148577451705900), _DATAF(-0.99708938598632813000)},

3945 {_DATAF(0.07585910707712173500), _DATAF(-0.99711853265762329000)},

3946 {_DATAF(0.07547670602798461900), _DATAF(-0.99714756011962891000)},

3947 {_DATAF(0.07509429752826690700), _DATAF(-0.99717640876770020000)},

3948 {_DATAF(0.07471188157796859700), _DATAF(-0.99720513820648193000)},

3949 {_DATAF(0.07432945072650909400), _DATAF(-0.99723374843597412000)},

3950 {_DATAF(0.07394701242446899400), _DATAF(-0.99726217985153198000)},

3951 {_DATAF(0.07356456667184829700), _DATAF(-0.99729043245315552000)},

3952 {_DATAF(0.07318209856748580900), _DATAF(-0.99731856584548950000)},

3953 {_DATAF(0.07279963046312332200), _DATAF(-0.99734658002853394000)},

3954 {_DATAF(0.07241714745759964000), _DATAF(-0.99737441539764404000)},

3955 {_DATAF(0.07203464955091476400), _DATAF(-0.99740213155746460000)},

3956 {_DATAF(0.07165215164422988900), _DATAF(-0.99742966890335083000)},

3957 {_DATAF(0.07126963138580322300), _DATAF(-0.99745708703994751000)},

3958 {_DATAF(0.07088711112737655600), _DATAF(-0.99748432636260986000)},

3959 {_DATAF(0.07050457596778869600), _DATAF(-0.99751144647598267000)},

3960 {_DATAF(0.07012202590703964200), _DATAF(-0.99753844738006592000)},

3961 {_DATAF(0.06973946839570999100), _DATAF(-0.99756520986557007000)},

3962 {_DATAF(0.06935690343379974400), _DATAF(-0.99759191274642944000)},

3963 {_DATAF(0.06897433102130889900), _DATAF(-0.99761843681335449000)},

3964 {_DATAF(0.06859174370765686000), _DATAF(-0.99764484167098999000)},

3965 {_DATAF(0.06820914149284362800), _DATAF(-0.99767106771469116000)},

3966 {_DATAF(0.06782653927803039600), _DATAF(-0.99769711494445801000)},

3967 {_DATAF(0.06744392216205596900), _DATAF(-0.99772304296493530000)},

3968 {_DATAF(0.06706129014492034900), _DATAF(-0.99774885177612305000)},

3969 {_DATAF(0.06667865812778472900), _DATAF(-0.99777448177337646000)},

3970 {_DATAF(0.06629601120948791500), _DATAF(-0.99779999256134033000)},

3971 {_DATAF(0.06591334939002990700), _DATAF(-0.99782532453536987000)},

3972 {_DATAF(0.06553068757057189900), _DATAF(-0.99785053730010986000)},

3973 {_DATAF(0.06514801084995269800), _DATAF(-0.99787563085556030000)},

3974 {_DATAF(0.06476532667875289900), _DATAF(-0.99790054559707642000)},

3975 {_DATAF(0.06438262760639190700), _DATAF(-0.99792528152465820000)},

3976 {_DATAF(0.06399992853403091400), _DATAF(-0.99794989824295044000)},

3977 {_DATAF(0.06361721456050872800), _DATAF(-0.99797439575195313000)},

3978 {_DATAF(0.06323449313640594500), _DATAF(-0.99799871444702148000)},

3979 {_DATAF(0.06285175681114196800), _DATAF(-0.99802285432815552000)},

3980 {_DATAF(0.06246901676058769200), _DATAF(-0.99804687500000000000)},

3981 {_DATAF(0.06208626553416252100), _DATAF(-0.99807077646255493000)},

3982 {_DATAF(0.06170350685715675400), _DATAF(-0.99809449911117554000)},

3983 {_DATAF(0.06132073700428009000), _DATAF(-0.99811810255050659000)},

3984 {_DATAF(0.06093795970082283000), _DATAF(-0.99814152717590332000)},

3985 {_DATAF(0.06055517122149467500), _DATAF(-0.99816483259201050000)},

3986 {_DATAF(0.06017237529158592200), _DATAF(-0.99818801879882813000)},

3987 {_DATAF(0.05978957191109657300), _DATAF(-0.99821102619171143000)},

3988 {_DATAF(0.05940675735473632800), _DATAF(-0.99823385477066040000)},

3989 {_DATAF(0.05902393534779548600), _DATAF(-0.99825656414031982000)},

3990 {_DATAF(0.05864110589027404800), _DATAF(-0.99827915430068970000)},

3991 {_DATAF(0.05825826525688171400), _DATAF(-0.99830156564712524000)},

3992 {_DATAF(0.05787541717290878300), _DATAF(-0.99832379817962646000)},

3993 {_DATAF(0.05749255791306495700), _DATAF(-0.99834591150283813000)},

3994 {_DATAF(0.05710969492793083200), _DATAF(-0.99836790561676025000)},

3995 {_DATAF(0.05672682076692581200), _DATAF(-0.99838972091674805000)},

3996 {_DATAF(0.05634393915534019500), _DATAF(-0.99841141700744629000)},

3997 {_DATAF(0.05596105009317398100), _DATAF(-0.99843293428421021000)},

3998 {_DATAF(0.05557814985513687100), _DATAF(-0.99845433235168457000)},

3999 {_DATAF(0.05519524589180946400), _DATAF(-0.99847555160522461000)},

4000 {_DATAF(0.05481233075261116000), _DATAF(-0.99849665164947510000)},

4001 {_DATAF(0.05442940816283226000), _DATAF(-0.99851763248443604000)},

4002 {_DATAF(0.05404647812247276300), _DATAF(-0.99853843450546265000)},

4003 {_DATAF(0.05366353690624237100), _DATAF(-0.99855905771255493000)},

4004 {_DATAF(0.05328059196472168000), _DATAF(-0.99857956171035767000)},

4005 {_DATAF(0.05289763584733009300), _DATAF(-0.99859994649887085000)},

4006 {_DATAF(0.05251467600464820900), _DATAF(-0.99862015247344971000)},

4007 {_DATAF(0.05213170498609542800), _DATAF(-0.99864023923873901000)},

4008 {_DATAF(0.05174872651696205100), _DATAF(-0.99866014719009399000)},

4009 {_DATAF(0.05136574059724807700), _DATAF(-0.99867993593215942000)},

4010 {_DATAF(0.05098275095224380500), _DATAF(-0.99869954586029053000)},

4011 {_DATAF(0.05059975013136863700), _DATAF(-0.99871903657913208000)},

4012 {_DATAF(0.05021674185991287200), _DATAF(-0.99873834848403931000)},

4013 {_DATAF(0.04983372613787651100), _DATAF(-0.99875754117965698000)},

4014 {_DATAF(0.04945070296525955200), _DATAF(-0.99877655506134033000)},

4015 {_DATAF(0.04906767606735229500), _DATAF(-0.99879544973373413000)},

4016 {_DATAF(0.04868463799357414200), _DATAF(-0.99881422519683838000)},

4017 {_DATAF(0.04830159246921539300), _DATAF(-0.99883282184600830000)},

4018 {_DATAF(0.04791854321956634500), _DATAF(-0.99885123968124390000)},

4019 {_DATAF(0.04753548279404640200), _DATAF(-0.99886953830718994000)},

4020 {_DATAF(0.04715241864323616000), _DATAF(-0.99888771772384644000)},

4021 {_DATAF(0.04676934704184532200), _DATAF(-0.99890571832656860000)},

4022 {_DATAF(0.04638626798987388600), _DATAF(-0.99892359972000122000)},

4023 {_DATAF(0.04600318148732185400), _DATAF(-0.99894130229949951000)},

4024 {_DATAF(0.04562009125947952300), _DATAF(-0.99895888566970825000)},

4025 {_DATAF(0.04523698985576629600), _DATAF(-0.99897629022598267000)},

4026 {_DATAF(0.04485388472676277200), _DATAF(-0.99899357557296753000)},

4027 {_DATAF(0.04447077214717865000), _DATAF(-0.99901068210601807000)},

4028 {_DATAF(0.04408765211701393100), _DATAF(-0.99902766942977905000)},

4029 {_DATAF(0.04370452836155891400), _DATAF(-0.99904447793960571000)},

4030 {_DATAF(0.04332139343023300200), _DATAF(-0.99906116724014282000)},

4031 {_DATAF(0.04293825849890708900), _DATAF(-0.99907773733139038000)},

4032 {_DATAF(0.04255511239171028100), _DATAF(-0.99909412860870361000)},

4033 {_DATAF(0.04217196255922317500), _DATAF(-0.99911034107208252000)},

4034 {_DATAF(0.04178880527615547200), _DATAF(-0.99912649393081665000)},

4035 {_DATAF(0.04140564054250717200), _DATAF(-0.99914240837097168000)},

4036 {_DATAF(0.04102247208356857300), _DATAF(-0.99915820360183716000)},

4037 {_DATAF(0.04063929617404937700), _DATAF(-0.99917387962341309000)},

4038 {_DATAF(0.04025611653923988300), _DATAF(-0.99918937683105469000)},

4039 {_DATAF(0.03987292572855949400), _DATAF(-0.99920475482940674000)},

4040 {_DATAF(0.03948973491787910500), _DATAF(-0.99921995401382446000)},

4041 {_DATAF(0.03910653665661811800), _DATAF(-0.99923503398895264000)},

4042 {_DATAF(0.03872333094477653500), _DATAF(-0.99924999475479126000)},

4043 {_DATAF(0.03834012150764465300), _DATAF(-0.99926477670669556000)},

4044 {_DATAF(0.03795690461993217500), _DATAF(-0.99927937984466553000)},

4045 {_DATAF(0.03757368400692939800), _DATAF(-0.99929386377334595000)},

4046 {_DATAF(0.03719045594334602400), _DATAF(-0.99930816888809204000)},

4047 {_DATAF(0.03680722415447235100), _DATAF(-0.99932235479354858000)},

4048 {_DATAF(0.03642398491501808200), _DATAF(-0.99933642148971558000)},

4049 {_DATAF(0.03604074195027351400), _DATAF(-0.99935030937194824000)},

4050 {_DATAF(0.03565749153494834900), _DATAF(-0.99936407804489136000)},

4051 {_DATAF(0.03527423739433288600), _DATAF(-0.99937766790390015000)},

4052 {_DATAF(0.03489097952842712400), _DATAF(-0.99939113855361938000)},

4053 {_DATAF(0.03450771421194076500), _DATAF(-0.99940443038940430000)},

4054 {_DATAF(0.03412444517016410800), _DATAF(-0.99941760301589966000)},

4055 {_DATAF(0.03374117240309715300), _DATAF(-0.99943059682846069000)},

4056 {_DATAF(0.03335789218544960000), _DATAF(-0.99944347143173218000)},

4057 {_DATAF(0.03297460824251174900), _DATAF(-0.99945616722106934000)},

4058 {_DATAF(0.03259132057428360000), _DATAF(-0.99946874380111694000)},

4059 {_DATAF(0.03220802545547485400), _DATAF(-0.99948120117187500000)},

4060 {_DATAF(0.03182472661137580900), _DATAF(-0.99949347972869873000)},

4061 {_DATAF(0.03144142404198646500), _DATAF(-0.99950557947158813000)},

4062 {_DATAF(0.03105811588466167400), _DATAF(-0.99951756000518799000)},

4063 {_DATAF(0.03067480400204658500), _DATAF(-0.99952942132949829000)},

4064 {_DATAF(0.03029148653149604800), _DATAF(-0.99954110383987427000)},

4065 {_DATAF(0.02990816533565521200), _DATAF(-0.99955266714096069000)},

4066 {_DATAF(0.02952483855187892900), _DATAF(-0.99956405162811279000)},

4067 {_DATAF(0.02914150804281234700), _DATAF(-0.99957531690597534000)},

4068 {_DATAF(0.02875817380845546700), _DATAF(-0.99958640336990356000)},

4069 {_DATAF(0.02837483584880828900), _DATAF(-0.99959737062454224000)},

4070 {_DATAF(0.02799149230122566200), _DATAF(-0.99960815906524658000)},

4071 {_DATAF(0.02760814502835273700), _DATAF(-0.99961882829666138000)},

4072 {_DATAF(0.02722479403018951400), _DATAF(-0.99962931871414185000)},

4073 {_DATAF(0.02684143930673599200), _DATAF(-0.99963968992233276000)},

4074 {_DATAF(0.02645808085799217200), _DATAF(-0.99964994192123413000)},

4075 {_DATAF(0.02607471868395805400), _DATAF(-0.99966001510620117000)},

4076 {_DATAF(0.02569135092198848700), _DATAF(-0.99966990947723389000)},

4077 {_DATAF(0.02530798129737377200), _DATAF(-0.99967968463897705000)},

4078 {_DATAF(0.02492460608482360800), _DATAF(-0.99968934059143066000)},

4079 {_DATAF(0.02454122900962829600), _DATAF(-0.99969881772994995000)},

4080 {_DATAF(0.02415784634649753600), _DATAF(-0.99970817565917969000)},

4081 {_DATAF(0.02377446182072162600), _DATAF(-0.99971735477447510000)},

4082 {_DATAF(0.02339107356965541800), _DATAF(-0.99972641468048096000)},

4083 {_DATAF(0.02300768159329891200), _DATAF(-0.99973529577255249000)},

4084 {_DATAF(0.02262428589165210700), _DATAF(-0.99974405765533447000)},

4085 {_DATAF(0.02224088832736015300), _DATAF(-0.99975264072418213000)},

4086 {_DATAF(0.02185748517513275100), _DATAF(-0.99976110458374023000)},

4087 {_DATAF(0.02147408016026020100), _DATAF(-0.99976938962936401000)},

4088 {_DATAF(0.02109067142009735100), _DATAF(-0.99977755546569824000)},

4089 {_DATAF(0.02070726081728935200), _DATAF(-0.99978560209274292000)},

4090 {_DATAF(0.02032384648919105500), _DATAF(-0.99979346990585327000)},

4091 {_DATAF(0.01994042843580246000), _DATAF(-0.99980115890502930000)},

4092 {_DATAF(0.01955700851976871500), _DATAF(-0.99980872869491577000)},

4093 {_DATAF(0.01917358487844467200), _DATAF(-0.99981617927551270000)},

4094 {_DATAF(0.01879015937447547900), _DATAF(-0.99982345104217529000)},

4095 {_DATAF(0.01840673014521598800), _DATAF(-0.99983060359954834000)},

4096 {_DATAF(0.01802329905331134800), _DATAF(-0.99983757734298706000)},

4097 {_DATAF(0.01763986423611640900), _DATAF(-0.99984443187713623000)},

4098 {_DATAF(0.01725642755627632100), _DATAF(-0.99985110759735107000)},

4099 {_DATAF(0.01687298715114593500), _DATAF(-0.99985766410827637000)},

4100 {_DATAF(0.01648954674601554900), _DATAF(-0.99986404180526733000)},

4101 {_DATAF(0.01610610261559486400), _DATAF(-0.99987030029296875000)},

4102 {_DATAF(0.01572265475988388100), _DATAF(-0.99987637996673584000)},

4103 {_DATAF(0.01533920597285032300), _DATAF(-0.99988234043121338000)},

4104 {_DATAF(0.01495575532317161600), _DATAF(-0.99988818168640137000)},

4105 {_DATAF(0.01457230187952518500), _DATAF(-0.99989384412765503000)},

4106 {_DATAF(0.01418884657323360400), _DATAF(-0.99989932775497437000)},

4107 {_DATAF(0.01380538847297430000), _DATAF(-0.99990469217300415000)},

4108 {_DATAF(0.01342192851006984700), _DATAF(-0.99990993738174438000)},

4109 {_DATAF(0.01303846761584281900), _DATAF(-0.99991500377655029000)},

4110 {_DATAF(0.01265500392764806700), _DATAF(-0.99991995096206665000)},

4111 {_DATAF(0.01227153837680816700), _DATAF(-0.99992471933364868000)},

4112 {_DATAF(0.01188807096332311600), _DATAF(-0.99992930889129639000)},

4113 {_DATAF(0.01150460168719291700), _DATAF(-0.99993383884429932000)},

4114 {_DATAF(0.01112113147974014300), _DATAF(-0.99993813037872314000)},

4115 {_DATAF(0.01073765940964222000), _DATAF(-0.99994236230850220000)},

4116 {_DATAF(0.01035418547689914700), _DATAF(-0.99994641542434692000)},

4117 {_DATAF(0.00997070968151092530), _DATAF(-0.99995028972625732000)},

4118 {_DATAF(0.00958723295480012890), _DATAF(-0.99995404481887817000)},

4119 {_DATAF(0.00920375436544418330), _DATAF(-0.99995762109756470000)},

4120 {_DATAF(0.00882027484476566310), _DATAF(-0.99996107816696167000)},

4121 {_DATAF(0.00843679439276456830), _DATAF(-0.99996441602706909000)},

4122 {_DATAF(0.00805331207811832430), _DATAF(-0.99996757507324219000)},

4123 {_DATAF(0.00766982883214950560), _DATAF(-0.99997061491012573000)},

4124 {_DATAF(0.00728634418919682500), _DATAF(-0.99997347593307495000)},

4125 {_DATAF(0.00690285861492156980), _DATAF(-0.99997615814208984000)},

4126 {_DATAF(0.00651937210932374000), _DATAF(-0.99997872114181519000)},

4127 {_DATAF(0.00613588467240333560), _DATAF(-0.99998116493225098000)},

4128 {_DATAF(0.00575239630416035650), _DATAF(-0.99998342990875244000)},

4129 {_DATAF(0.00536890700459480290), _DATAF(-0.99998557567596436000)},

4130 {_DATAF(0.00498541677370667460), _DATAF(-0.99998760223388672000)},

4131 {_DATAF(0.00460192607715725900), _DATAF(-0.99998939037322998000)},

4132 {_DATAF(0.00421843444928526880), _DATAF(-0.99999111890792847000)},

4133 {_DATAF(0.00383494258858263490), _DATAF(-0.99999266862869263000)},

4134 {_DATAF(0.00345145002938807010), _DATAF(-0.99999403953552246000)},

4135 {_DATAF(0.00306795677170157430), _DATAF(-0.99999529123306274000)},

4136 {_DATAF(0.00268446304835379120), _DATAF(-0.99999642372131348000)},

4137 {_DATAF(0.00230096909217536450), _DATAF(-0.99999737739562988000)},

4138 {_DATAF(0.00191747478675097230), _DATAF(-0.99999815225601196000)},

4139 {_DATAF(0.00153398013208061460), _DATAF(-0.99999880790710449000)},

4140 {_DATAF(0.00115048536099493500), _DATAF(-0.99999934434890747000)},

4141 {_DATAF(0.00076699029887095094), _DATAF(-0.99999970197677612000)},

4142 {_DATAF(0.00038349517853930593), _DATAF(-0.99999994039535522000)},

4143 {_DATAF(0.00000000000000006123), _DATAF(-1.00000000000000000000)},

4144 {_DATAF(-0.00038349517853930593), _DATAF(-0.99999994039535522000)},

4145 {_DATAF(-0.00076699029887095094), _DATAF(-0.99999970197677612000)},

4146 {_DATAF(-0.00115048536099493500), _DATAF(-0.99999934434890747000)},

4147 {_DATAF(-0.00153398013208061460), _DATAF(-0.99999880790710449000)},

4148 {_DATAF(-0.00191747478675097230), _DATAF(-0.99999815225601196000)},

4149 {_DATAF(-0.00230096909217536450), _DATAF(-0.99999737739562988000)},

4150 {_DATAF(-0.00268446304835379120), _DATAF(-0.99999642372131348000)},

4151 {_DATAF(-0.00306795677170157430), _DATAF(-0.99999529123306274000)},

4152 {_DATAF(-0.00345145002938807010), _DATAF(-0.99999403953552246000)},

4153 {_DATAF(-0.00383494258858263490), _DATAF(-0.99999266862869263000)},

4154 {_DATAF(-0.00421843444928526880), _DATAF(-0.99999111890792847000)},

4155 {_DATAF(-0.00460192607715725900), _DATAF(-0.99998939037322998000)},

4156 {_DATAF(-0.00498541677370667460), _DATAF(-0.99998760223388672000)},

4157 {_DATAF(-0.00536890700459480290), _DATAF(-0.99998557567596436000)},

4158 {_DATAF(-0.00575239630416035650), _DATAF(-0.99998342990875244000)},

4159 {_DATAF(-0.00613588467240333560), _DATAF(-0.99998116493225098000)},

4160 {_DATAF(-0.00651937210932374000), _DATAF(-0.99997872114181519000)},

4161 {_DATAF(-0.00690285861492156980), _DATAF(-0.99997615814208984000)},

4162 {_DATAF(-0.00728634418919682500), _DATAF(-0.99997347593307495000)},

4163 {_DATAF(-0.00766982883214950560), _DATAF(-0.99997061491012573000)},

4164 {_DATAF(-0.00805331207811832430), _DATAF(-0.99996757507324219000)},

4165 {_DATAF(-0.00843679439276456830), _DATAF(-0.99996441602706909000)},

4166 {_DATAF(-0.00882027484476566310), _DATAF(-0.99996107816696167000)},

4167 {_DATAF(-0.00920375436544418330), _DATAF(-0.99995762109756470000)},

4168 {_DATAF(-0.00958723295480012890), _DATAF(-0.99995404481887817000)},

4169 {_DATAF(-0.00997070968151092530), _DATAF(-0.99995028972625732000)},

4170 {_DATAF(-0.01035418547689914700), _DATAF(-0.99994641542434692000)},

4171 {_DATAF(-0.01073765940964222000), _DATAF(-0.99994236230850220000)},

4172 {_DATAF(-0.01112113147974014300), _DATAF(-0.99993813037872314000)},

4173 {_DATAF(-0.01150460168719291700), _DATAF(-0.99993383884429932000)},

4174 {_DATAF(-0.01188807096332311600), _DATAF(-0.99992930889129639000)},

4175 {_DATAF(-0.01227153837680816700), _DATAF(-0.99992471933364868000)},

4176 {_DATAF(-0.01265500392764806700), _DATAF(-0.99991995096206665000)},

4177 {_DATAF(-0.01303846761584281900), _DATAF(-0.99991500377655029000)},

4178 {_DATAF(-0.01342192851006984700), _DATAF(-0.99990993738174438000)},

4179 {_DATAF(-0.01380538847297430000), _DATAF(-0.99990469217300415000)},

4180 {_DATAF(-0.01418884657323360400), _DATAF(-0.99989932775497437000)},

4181 {_DATAF(-0.01457230187952518500), _DATAF(-0.99989384412765503000)},

4182 {_DATAF(-0.01495575532317161600), _DATAF(-0.99988818168640137000)},

4183 {_DATAF(-0.01533920597285032300), _DATAF(-0.99988234043121338000)},

4184 {_DATAF(-0.01572265475988388100), _DATAF(-0.99987637996673584000)},

4185 {_DATAF(-0.01610610261559486400), _DATAF(-0.99987030029296875000)},

4186 {_DATAF(-0.01648954674601554900), _DATAF(-0.99986404180526733000)},

4187 {_DATAF(-0.01687298715114593500), _DATAF(-0.99985766410827637000)},

4188 {_DATAF(-0.01725642755627632100), _DATAF(-0.99985110759735107000)},

4189 {_DATAF(-0.01763986423611640900), _DATAF(-0.99984443187713623000)},

4190 {_DATAF(-0.01802329905331134800), _DATAF(-0.99983757734298706000)},

4191 {_DATAF(-0.01840673014521598800), _DATAF(-0.99983060359954834000)},

4192 {_DATAF(-0.01879015937447547900), _DATAF(-0.99982345104217529000)},

4193 {_DATAF(-0.01917358487844467200), _DATAF(-0.99981617927551270000)},

4194 {_DATAF(-0.01955700851976871500), _DATAF(-0.99980872869491577000)},

4195 {_DATAF(-0.01994042843580246000), _DATAF(-0.99980115890502930000)},

4196 {_DATAF(-0.02032384648919105500), _DATAF(-0.99979346990585327000)},

4197 {_DATAF(-0.02070726081728935200), _DATAF(-0.99978560209274292000)},

4198 {_DATAF(-0.02109067142009735100), _DATAF(-0.99977755546569824000)},

4199 {_DATAF(-0.02147408016026020100), _DATAF(-0.99976938962936401000)},

4200 {_DATAF(-0.02185748517513275100), _DATAF(-0.99976110458374023000)},

4201 {_DATAF(-0.02224088832736015300), _DATAF(-0.99975264072418213000)},

4202 {_DATAF(-0.02262428589165210700), _DATAF(-0.99974405765533447000)},

4203 {_DATAF(-0.02300768159329891200), _DATAF(-0.99973529577255249000)},

4204 {_DATAF(-0.02339107356965541800), _DATAF(-0.99972641468048096000)},

4205 {_DATAF(-0.02377446182072162600), _DATAF(-0.99971735477447510000)},

4206 {_DATAF(-0.02415784634649753600), _DATAF(-0.99970817565917969000)},

4207 {_DATAF(-0.02454122900962829600), _DATAF(-0.99969881772994995000)},

4208 {_DATAF(-0.02492460608482360800), _DATAF(-0.99968934059143066000)},

4209 {_DATAF(-0.02530798129737377200), _DATAF(-0.99967968463897705000)},

4210 {_DATAF(-0.02569135092198848700), _DATAF(-0.99966990947723389000)},

4211 {_DATAF(-0.02607471868395805400), _DATAF(-0.99966001510620117000)},

4212 {_DATAF(-0.02645808085799217200), _DATAF(-0.99964994192123413000)},

4213 {_DATAF(-0.02684143930673599200), _DATAF(-0.99963968992233276000)},

4214 {_DATAF(-0.02722479403018951400), _DATAF(-0.99962931871414185000)},

4215 {_DATAF(-0.02760814502835273700), _DATAF(-0.99961882829666138000)},

4216 {_DATAF(-0.02799149230122566200), _DATAF(-0.99960815906524658000)},

4217 {_DATAF(-0.02837483584880828900), _DATAF(-0.99959737062454224000)},

4218 {_DATAF(-0.02875817380845546700), _DATAF(-0.99958640336990356000)},

4219 {_DATAF(-0.02914150804281234700), _DATAF(-0.99957531690597534000)},

4220 {_DATAF(-0.02952483855187892900), _DATAF(-0.99956405162811279000)},

4221 {_DATAF(-0.02990816533565521200), _DATAF(-0.99955266714096069000)},

4222 {_DATAF(-0.03029148653149604800), _DATAF(-0.99954110383987427000)},

4223 {_DATAF(-0.03067480400204658500), _DATAF(-0.99952942132949829000)},

4224 {_DATAF(-0.03105811588466167400), _DATAF(-0.99951756000518799000)},

4225 {_DATAF(-0.03144142404198646500), _DATAF(-0.99950557947158813000)},

4226 {_DATAF(-0.03182472661137580900), _DATAF(-0.99949347972869873000)},

4227 {_DATAF(-0.03220802545547485400), _DATAF(-0.99948120117187500000)},

4228 {_DATAF(-0.03259132057428360000), _DATAF(-0.99946874380111694000)},

4229 {_DATAF(-0.03297460824251174900), _DATAF(-0.99945616722106934000)},

4230 {_DATAF(-0.03335789218544960000), _DATAF(-0.99944347143173218000)},

4231 {_DATAF(-0.03374117240309715300), _DATAF(-0.99943059682846069000)},

4232 {_DATAF(-0.03412444517016410800), _DATAF(-0.99941760301589966000)},

4233 {_DATAF(-0.03450771421194076500), _DATAF(-0.99940443038940430000)},

4234 {_DATAF(-0.03489097952842712400), _DATAF(-0.99939113855361938000)},

4235 {_DATAF(-0.03527423739433288600), _DATAF(-0.99937766790390015000)},

4236 {_DATAF(-0.03565749153494834900), _DATAF(-0.99936407804489136000)},

4237 {_DATAF(-0.03604074195027351400), _DATAF(-0.99935030937194824000)},

4238 {_DATAF(-0.03642398491501808200), _DATAF(-0.99933642148971558000)},

4239 {_DATAF(-0.03680722415447235100), _DATAF(-0.99932235479354858000)},

4240 {_DATAF(-0.03719045594334602400), _DATAF(-0.99930816888809204000)},

4241 {_DATAF(-0.03757368400692939800), _DATAF(-0.99929386377334595000)},

4242 {_DATAF(-0.03795690461993217500), _DATAF(-0.99927937984466553000)},

4243 {_DATAF(-0.03834012150764465300), _DATAF(-0.99926477670669556000)},

4244 {_DATAF(-0.03872333094477653500), _DATAF(-0.99924999475479126000)},

4245 {_DATAF(-0.03910653665661811800), _DATAF(-0.99923503398895264000)},

4246 {_DATAF(-0.03948973491787910500), _DATAF(-0.99921995401382446000)},

4247 {_DATAF(-0.03987292572855949400), _DATAF(-0.99920475482940674000)},

4248 {_DATAF(-0.04025611653923988300), _DATAF(-0.99918937683105469000)},

4249 {_DATAF(-0.04063929617404937700), _DATAF(-0.99917387962341309000)},

4250 {_DATAF(-0.04102247208356857300), _DATAF(-0.99915820360183716000)},

4251 {_DATAF(-0.04140564054250717200), _DATAF(-0.99914240837097168000)},

4252 {_DATAF(-0.04178880527615547200), _DATAF(-0.99912649393081665000)},

4253 {_DATAF(-0.04217196255922317500), _DATAF(-0.99911034107208252000)},

4254 {_DATAF(-0.04255511239171028100), _DATAF(-0.99909412860870361000)},

4255 {_DATAF(-0.04293825849890708900), _DATAF(-0.99907773733139038000)},

4256 {_DATAF(-0.04332139343023300200), _DATAF(-0.99906116724014282000)},

4257 {_DATAF(-0.04370452836155891400), _DATAF(-0.99904447793960571000)},

4258 {_DATAF(-0.04408765211701393100), _DATAF(-0.99902766942977905000)},

4259 {_DATAF(-0.04447077214717865000), _DATAF(-0.99901068210601807000)},

4260 {_DATAF(-0.04485388472676277200), _DATAF(-0.99899357557296753000)},

4261 {_DATAF(-0.04523698985576629600), _DATAF(-0.99897629022598267000)},

4262 {_DATAF(-0.04562009125947952300), _DATAF(-0.99895888566970825000)},

4263 {_DATAF(-0.04600318148732185400), _DATAF(-0.99894130229949951000)},

4264 {_DATAF(-0.04638626798987388600), _DATAF(-0.99892359972000122000)},

4265 {_DATAF(-0.04676934704184532200), _DATAF(-0.99890571832656860000)},

4266 {_DATAF(-0.04715241864323616000), _DATAF(-0.99888771772384644000)},

4267 {_DATAF(-0.04753548279404640200), _DATAF(-0.99886953830718994000)},

4268 {_DATAF(-0.04791854321956634500), _DATAF(-0.99885123968124390000)},

4269 {_DATAF(-0.04830159246921539300), _DATAF(-0.99883282184600830000)},

4270 {_DATAF(-0.04868463799357414200), _DATAF(-0.99881422519683838000)},

4271 {_DATAF(-0.04906767606735229500), _DATAF(-0.99879544973373413000)},

4272 {_DATAF(-0.04945070296525955200), _DATAF(-0.99877655506134033000)},

4273 {_DATAF(-0.04983372613787651100), _DATAF(-0.99875754117965698000)},

4274 {_DATAF(-0.05021674185991287200), _DATAF(-0.99873834848403931000)},

4275 {_DATAF(-0.05059975013136863700), _DATAF(-0.99871903657913208000)},

4276 {_DATAF(-0.05098275095224380500), _DATAF(-0.99869954586029053000)},

4277 {_DATAF(-0.05136574059724807700), _DATAF(-0.99867993593215942000)},

4278 {_DATAF(-0.05174872651696205100), _DATAF(-0.99866014719009399000)},

4279 {_DATAF(-0.05213170498609542800), _DATAF(-0.99864023923873901000)},

4280 {_DATAF(-0.05251467600464820900), _DATAF(-0.99862015247344971000)},

4281 {_DATAF(-0.05289763584733009300), _DATAF(-0.99859994649887085000)},

4282 {_DATAF(-0.05328059196472168000), _DATAF(-0.99857956171035767000)},

4283 {_DATAF(-0.05366353690624237100), _DATAF(-0.99855905771255493000)},

4284 {_DATAF(-0.05404647812247276300), _DATAF(-0.99853843450546265000)},

4285 {_DATAF(-0.05442940816283226000), _DATAF(-0.99851763248443604000)},

4286 {_DATAF(-0.05481233075261116000), _DATAF(-0.99849665164947510000)},

4287 {_DATAF(-0.05519524589180946400), _DATAF(-0.99847555160522461000)},

4288 {_DATAF(-0.05557814985513687100), _DATAF(-0.99845433235168457000)},

4289 {_DATAF(-0.05596105009317398100), _DATAF(-0.99843293428421021000)},

4290 {_DATAF(-0.05634393915534019500), _DATAF(-0.99841141700744629000)},

4291 {_DATAF(-0.05672682076692581200), _DATAF(-0.99838972091674805000)},

4292 {_DATAF(-0.05710969492793083200), _DATAF(-0.99836790561676025000)},

4293 {_DATAF(-0.05749255791306495700), _DATAF(-0.99834591150283813000)},

4294 {_DATAF(-0.05787541717290878300), _DATAF(-0.99832379817962646000)},

4295 {_DATAF(-0.05825826525688171400), _DATAF(-0.99830156564712524000)},

4296 {_DATAF(-0.05864110589027404800), _DATAF(-0.99827915430068970000)},

4297 {_DATAF(-0.05902393534779548600), _DATAF(-0.99825656414031982000)},

4298 {_DATAF(-0.05940675735473632800), _DATAF(-0.99823385477066040000)},

4299 {_DATAF(-0.05978957191109657300), _DATAF(-0.99821102619171143000)},

4300 {_DATAF(-0.06017237529158592200), _DATAF(-0.99818801879882813000)},

4301 {_DATAF(-0.06055517122149467500), _DATAF(-0.99816483259201050000)},

4302 {_DATAF(-0.06093795970082283000), _DATAF(-0.99814152717590332000)},

4303 {_DATAF(-0.06132073700428009000), _DATAF(-0.99811810255050659000)},

4304 {_DATAF(-0.06170350685715675400), _DATAF(-0.99809449911117554000)},

4305 {_DATAF(-0.06208626553416252100), _DATAF(-0.99807077646255493000)},

4306 {_DATAF(-0.06246901676058769200), _DATAF(-0.99804687500000000000)},

4307 {_DATAF(-0.06285175681114196800), _DATAF(-0.99802285432815552000)},

4308 {_DATAF(-0.06323449313640594500), _DATAF(-0.99799871444702148000)},

4309 {_DATAF(-0.06361721456050872800), _DATAF(-0.99797439575195313000)},

4310 {_DATAF(-0.06399992853403091400), _DATAF(-0.99794989824295044000)},

4311 {_DATAF(-0.06438262760639190700), _DATAF(-0.99792528152465820000)},

4312 {_DATAF(-0.06476532667875289900), _DATAF(-0.99790054559707642000)},

4313 {_DATAF(-0.06514801084995269800), _DATAF(-0.99787563085556030000)},

4314 {_DATAF(-0.06553068757057189900), _DATAF(-0.99785053730010986000)},

4315 {_DATAF(-0.06591334939002990700), _DATAF(-0.99782532453536987000)},

4316 {_DATAF(-0.06629601120948791500), _DATAF(-0.99779999256134033000)},

4317 {_DATAF(-0.06667865812778472900), _DATAF(-0.99777448177337646000)},

4318 {_DATAF(-0.06706129014492034900), _DATAF(-0.99774885177612305000)},

4319 {_DATAF(-0.06744392216205596900), _DATAF(-0.99772304296493530000)},

4320 {_DATAF(-0.06782653927803039600), _DATAF(-0.99769711494445801000)},

4321 {_DATAF(-0.06820914149284362800), _DATAF(-0.99767106771469116000)},

4322 {_DATAF(-0.06859174370765686000), _DATAF(-0.99764484167098999000)},

4323 {_DATAF(-0.06897433102130889900), _DATAF(-0.99761843681335449000)},

4324 {_DATAF(-0.06935690343379974400), _DATAF(-0.99759191274642944000)},

4325 {_DATAF(-0.06973946839570999100), _DATAF(-0.99756520986557007000)},

4326 {_DATAF(-0.07012202590703964200), _DATAF(-0.99753844738006592000)},

4327 {_DATAF(-0.07050457596778869600), _DATAF(-0.99751144647598267000)},

4328 {_DATAF(-0.07088711112737655600), _DATAF(-0.99748432636260986000)},

4329 {_DATAF(-0.07126963138580322300), _DATAF(-0.99745708703994751000)},

4330 {_DATAF(-0.07165215164422988900), _DATAF(-0.99742966890335083000)},

4331 {_DATAF(-0.07203464955091476400), _DATAF(-0.99740213155746460000)},

4332 {_DATAF(-0.07241714745759964000), _DATAF(-0.99737441539764404000)},

4333 {_DATAF(-0.07279963046312332200), _DATAF(-0.99734658002853394000)},

4334 {_DATAF(-0.07318209856748580900), _DATAF(-0.99731856584548950000)},

4335 {_DATAF(-0.07356456667184829700), _DATAF(-0.99729043245315552000)},

4336 {_DATAF(-0.07394701242446899400), _DATAF(-0.99726217985153198000)},

4337 {_DATAF(-0.07432945072650909400), _DATAF(-0.99723374843597412000)},

4338 {_DATAF(-0.07471188157796859700), _DATAF(-0.99720513820648193000)},

4339 {_DATAF(-0.07509429752826690700), _DATAF(-0.99717640876770020000)},

4340 {_DATAF(-0.07547670602798461900), _DATAF(-0.99714756011962891000)},

4341 {_DATAF(-0.07585910707712173500), _DATAF(-0.99711853265762329000)},

4342 {_DATAF(-0.07624148577451705900), _DATAF(-0.99708938598632813000)},

4343 {_DATAF(-0.07662386447191238400), _DATAF(-0.99706006050109863000)},

4344 {_DATAF(-0.07700622081756591800), _DATAF(-0.99703061580657959000)},

4345 {_DATAF(-0.07738857716321945200), _DATAF(-0.99700099229812622000)},

4346 {_DATAF(-0.07777091115713119500), _DATAF(-0.99697124958038330000)},

4347 {_DATAF(-0.07815324515104293800), _DATAF(-0.99694132804870605000)},

4348 {_DATAF(-0.07853555679321289100), _DATAF(-0.99691128730773926000)},

4349 {_DATAF(-0.07891786098480224600), _DATAF(-0.99688112735748291000)},

4350 {_DATAF(-0.07930015772581100500), _DATAF(-0.99685078859329224000)},

4351 {_DATAF(-0.07968243956565856900), _DATAF(-0.99682027101516724000)},

4352 {_DATAF(-0.08006470650434494000), _DATAF(-0.99678969383239746000)},

4353 {_DATAF(-0.08044696599245071400), _DATAF(-0.99675887823104858000)},

4354 {_DATAF(-0.08082921057939529400), _DATAF(-0.99672794342041016000)},

4355 {_DATAF(-0.08121144771575927700), _DATAF(-0.99669688940048218000)},

4356 {_DATAF(-0.08159366995096206700), _DATAF(-0.99666565656661987000)},

4357 {_DATAF(-0.08197587728500366200), _DATAF(-0.99663430452346802000)},

4358 {_DATAF(-0.08235807716846466100), _DATAF(-0.99660277366638184000)},

4359 {_DATAF(-0.08274026215076446500), _DATAF(-0.99657112360000610000)},

4360 {_DATAF(-0.08312243968248367300), _DATAF(-0.99653935432434082000)},

4361 {_DATAF(-0.08350460231304168700), _DATAF(-0.99650740623474121000)},

4362 {_DATAF(-0.08388675004243850700), _DATAF(-0.99647527933120728000)},

4363 {_DATAF(-0.08426889032125473000), _DATAF(-0.99644303321838379000)},

4364 {_DATAF(-0.08465101569890976000), _DATAF(-0.99641066789627075000)},

4365 {_DATAF(-0.08503312617540359500), _DATAF(-0.99637812376022339000)},

4366 {_DATAF(-0.08541522175073623700), _DATAF(-0.99634546041488647000)},

4367 {_DATAF(-0.08579730987548828100), _DATAF(-0.99631261825561523000)},

4368 {_DATAF(-0.08617939054965972900), _DATAF(-0.99627965688705444000)},

4369 {_DATAF(-0.08656144887208938600), _DATAF(-0.99624651670455933000)},

4370 {_DATAF(-0.08694349974393844600), _DATAF(-0.99621325731277466000)},

4371 {_DATAF(-0.08732553571462631200), _DATAF(-0.99617981910705566000)},

4372 {_DATAF(-0.08770755678415298500), _DATAF(-0.99614626169204712000)},

4373 {_DATAF(-0.08808957040309906000), _DATAF(-0.99611258506774902000)},

4374 {_DATAF(-0.08847156912088394200), _DATAF(-0.99607872962951660000)},

4375 {_DATAF(-0.08885355293750762900), _DATAF(-0.99604469537734985000)},

4376 {_DATAF(-0.08923552185297012300), _DATAF(-0.99601054191589355000)},

4377 {_DATAF(-0.08961748331785202000), _DATAF(-0.99597626924514771000)},

4378 {_DATAF(-0.08999942988157272300), _DATAF(-0.99594181776046753000)},

4379 {_DATAF(-0.09038136154413223300), _DATAF(-0.99590724706649780000)},

4380 {_DATAF(-0.09076327830553054800), _DATAF(-0.99587249755859375000)},

4381 {_DATAF(-0.09114518761634826700), _DATAF(-0.99583762884140015000)},

4382 {_DATAF(-0.09152707457542419400), _DATAF(-0.99580258131027222000)},

4383 {_DATAF(-0.09190895408391952500), _DATAF(-0.99576741456985474000)},

4384 {_DATAF(-0.09229081869125366200), _DATAF(-0.99573206901550293000)},

4385 {_DATAF(-0.09267267584800720200), _DATAF(-0.99569660425186157000)},

4386 {_DATAF(-0.09305451065301895100), _DATAF(-0.99566102027893066000)},

4387 {_DATAF(-0.09343633800745010400), _DATAF(-0.99562525749206543000)},

4388 {_DATAF(-0.09381814301013946500), _DATAF(-0.99558937549591064000)},

4389 {_DATAF(-0.09419994056224823000), _DATAF(-0.99555331468582153000)},

4390 {_DATAF(-0.09458172321319580100), _DATAF(-0.99551707506179810000)},

4391 {_DATAF(-0.09496349841356277500), _DATAF(-0.99548077583312988000)},

4392 {_DATAF(-0.09534525126218795800), _DATAF(-0.99544423818588257000)},

4393 {_DATAF(-0.09572698920965194700), _DATAF(-0.99540764093399048000)},

4394 {_DATAF(-0.09610871970653533900), _DATAF(-0.99537086486816406000)},

4395 {_DATAF(-0.09649042785167694100), _DATAF(-0.99533390998840332000)},

4396 {_DATAF(-0.09687212854623794600), _DATAF(-0.99529683589935303000)},

4397 {_DATAF(-0.09725381433963775600), _DATAF(-0.99525958299636841000)},

4398 {_DATAF(-0.09763548523187637300), _DATAF(-0.99522227048873901000)},

4399 {_DATAF(-0.09801714122295379600), _DATAF(-0.99518471956253052000)},

4400 {_DATAF(-0.09839878231287002600), _DATAF(-0.99514704942703247000)},

4401 {_DATAF(-0.09878040850162506100), _DATAF(-0.99510926008224487000)},

4402 {_DATAF(-0.09916201978921890300), _DATAF(-0.99507129192352295000)},

4403 {_DATAF(-0.09954361617565155000), _DATAF(-0.99503320455551147000)},

4404 {_DATAF(-0.09992520511150360100), _DATAF(-0.99499493837356567000)},

4405 {_DATAF(-0.10030677169561386000), _DATAF(-0.99495655298233032000)},

4406 {_DATAF(-0.10068832337856293000), _DATAF(-0.99491798877716064000)},

4407 {_DATAF(-0.10106986016035080000), _DATAF(-0.99487930536270142000)},

4408 {_DATAF(-0.10145138949155807000), _DATAF(-0.99484050273895264000)},

4409 {_DATAF(-0.10183289647102356000), _DATAF(-0.99480152130126953000)},

4410 {_DATAF(-0.10221438854932785000), _DATAF(-0.99476242065429688000)},

4411 {_DATAF(-0.10259586572647095000), _DATAF(-0.99472314119338989000)},

4412 {_DATAF(-0.10297733545303345000), _DATAF(-0.99468368291854858000)},

4413 {_DATAF(-0.10335878282785416000), _DATAF(-0.99464416503906250000)},

4414 {_DATAF(-0.10374021530151367000), _DATAF(-0.99460440874099731000)},

4415 {_DATAF(-0.10412163287401199000), _DATAF(-0.99456459283828735000)},

4416 {_DATAF(-0.10450303554534912000), _DATAF(-0.99452453851699829000)},

4417 {_DATAF(-0.10488442331552505000), _DATAF(-0.99448442459106445000)},

4418 {_DATAF(-0.10526579618453979000), _DATAF(-0.99444413185119629000)},

4419 {_DATAF(-0.10564715415239334000), _DATAF(-0.99440366029739380000)},

4420 {_DATAF(-0.10602849721908569000), _DATAF(-0.99436306953430176000)},

4421 {_DATAF(-0.10640981793403625000), _DATAF(-0.99432235956192017000)},

4422 {_DATAF(-0.10679113119840622000), _DATAF(-0.99428147077560425000)},

4423 {_DATAF(-0.10717242211103439000), _DATAF(-0.99424046277999878000)},

4424 {_DATAF(-0.10755370557308197000), _DATAF(-0.99419927597045898000)},

4425 {_DATAF(-0.10793496668338776000), _DATAF(-0.99415796995162964000)},

4426 {_DATAF(-0.10831621289253235000), _DATAF(-0.99411648511886597000)},

4427 {_DATAF(-0.10869744420051575000), _DATAF(-0.99407488107681274000)},

4428 {_DATAF(-0.10907866060733795000), _DATAF(-0.99403309822082520000)},

4429 {_DATAF(-0.10945985466241837000), _DATAF(-0.99399119615554810000)},

4430 {_DATAF(-0.10984104126691818000), _DATAF(-0.99394917488098145000)},

4431 {_DATAF(-0.11022220551967621000), _DATAF(-0.99390697479248047000)},

4432 {_DATAF(-0.11060335487127304000), _DATAF(-0.99386465549468994000)},

4433 {_DATAF(-0.11098448932170868000), _DATAF(-0.99382215738296509000)},

4434 {_DATAF(-0.11136560887098312000), _DATAF(-0.99377948045730591000)},

4435 {_DATAF(-0.11174671351909637000), _DATAF(-0.99373674392700195000)},

4436 {_DATAF(-0.11212779581546783000), _DATAF(-0.99369376897811890000)},

4437 {_DATAF(-0.11250886321067810000), _DATAF(-0.99365073442459106000)},

4438 {_DATAF(-0.11288991570472717000), _DATAF(-0.99360752105712891000)},

4439 {_DATAF(-0.11327095329761505000), _DATAF(-0.99356412887573242000)},

4440 {_DATAF(-0.11365196853876114000), _DATAF(-0.99352061748504639000)},

4441 {_DATAF(-0.11403297632932663000), _DATAF(-0.99347698688507080000)},

4442 {_DATAF(-0.11441396176815033000), _DATAF(-0.99343317747116089000)},

4443 {_DATAF(-0.11479492485523224000), _DATAF(-0.99338918924331665000)},

4444 {_DATAF(-0.11517588049173355000), _DATAF(-0.99334514141082764000)},

4445 {_DATAF(-0.11555681377649307000), _DATAF(-0.99330085515975952000)},

4446 {_DATAF(-0.11593773216009140000), _DATAF(-0.99325650930404663000)},

4447 {_DATAF(-0.11631862819194794000), _DATAF(-0.99321192502975464000)},

4448 {_DATAF(-0.11669951677322388000), _DATAF(-0.99316728115081787000)},

4449 {_DATAF(-0.11708038300275803000), _DATAF(-0.99312245845794678000)},

4450 {_DATAF(-0.11746122688055038000), _DATAF(-0.99307745695114136000)},

4451 {_DATAF(-0.11784206330776215000), _DATAF(-0.99303233623504639000)},

4452 {_DATAF(-0.11822287738323212000), _DATAF(-0.99298709630966187000)},

4453 {_DATAF(-0.11860367655754089000), _DATAF(-0.99294167757034302000)},

4454 {_DATAF(-0.11898445338010788000), _DATAF(-0.99289613962173462000)},

4455 {_DATAF(-0.11936521530151367000), _DATAF(-0.99285042285919189000)},

4456 {_DATAF(-0.11974596232175827000), _DATAF(-0.99280458688735962000)},

4457 {_DATAF(-0.12012668699026108000), _DATAF(-0.99275857210159302000)},

4458 {_DATAF(-0.12050739675760269000), _DATAF(-0.99271243810653687000)},

4459 {_DATAF(-0.12088808417320251000), _DATAF(-0.99266612529754639000)},

4460 {_DATAF(-0.12126876413822174000), _DATAF(-0.99261969327926636000)},

4461 {_DATAF(-0.12164941430091858000), _DATAF(-0.99257314205169678000)},

4462 {_DATAF(-0.12203005701303482000), _DATAF(-0.99252641201019287000)},

4463 {_DATAF(-0.12241067737340927000), _DATAF(-0.99247956275939941000)},

4464 {_DATAF(-0.12279127538204193000), _DATAF(-0.99243253469467163000)},

4465 {_DATAF(-0.12317185848951340000), _DATAF(-0.99238532781600952000)},

4466 {_DATAF(-0.12355242669582367000), _DATAF(-0.99233806133270264000)},

4467 {_DATAF(-0.12393297255039215000), _DATAF(-0.99229061603546143000)},

4468 {_DATAF(-0.12431350350379944000), _DATAF(-0.99224299192428589000)},

4469 {_DATAF(-0.12469401955604553000), _DATAF(-0.99219524860382080000)},

4470 {_DATAF(-0.12507450580596924000), _DATAF(-0.99214732646942139000)},

4471 {_DATAF(-0.12545497715473175000), _DATAF(-0.99209928512573242000)},

4472 {_DATAF(-0.12583543360233307000), _DATAF(-0.99205112457275391000)},

4473 {_DATAF(-0.12621587514877319000), _DATAF(-0.99200278520584106000)},

4474 {_DATAF(-0.12659630179405212000), _DATAF(-0.99195432662963867000)},

4475 {_DATAF(-0.12697669863700867000), _DATAF(-0.99190568923950195000)},

4476 {_DATAF(-0.12735708057880402000), _DATAF(-0.99185693264007568000)},

4477 {_DATAF(-0.12773744761943817000), _DATAF(-0.99180799722671509000)},

4478 {_DATAF(-0.12811778485774994000), _DATAF(-0.99175894260406494000)},

4479 {_DATAF(-0.12849810719490051000), _DATAF(-0.99170976877212524000)},

4480 {_DATAF(-0.12887841463088989000), _DATAF(-0.99166041612625122000)},

4481 {_DATAF(-0.12925870716571808000), _DATAF(-0.99161088466644287000)},

4482 {_DATAF(-0.12963896989822388000), _DATAF(-0.99156123399734497000)},

4483 {_DATAF(-0.13001921772956848000), _DATAF(-0.99151146411895752000)},

4484 {_DATAF(-0.13039945065975189000), _DATAF(-0.99146151542663574000)},

4485 {_DATAF(-0.13077966868877411000), _DATAF(-0.99141144752502441000)},

4486 {_DATAF(-0.13115985691547394000), _DATAF(-0.99136126041412354000)},

4487 {_DATAF(-0.13154003024101257000), _DATAF(-0.99131083488464355000)},

4488 {_DATAF(-0.13192018866539001000), _DATAF(-0.99126034975051880000)},

4489 {_DATAF(-0.13230031728744507000), _DATAF(-0.99120968580245972000)},

4490 {_DATAF(-0.13268043100833893000), _DATAF(-0.99115884304046631000)},

4491 {_DATAF(-0.13306052982807159000), _DATAF(-0.99110794067382813000)},

4492 {_DATAF(-0.13344059884548187000), _DATAF(-0.99105679988861084000)},

4493 {_DATAF(-0.13382065296173096000), _DATAF(-0.99100553989410400000)},

4494 {_DATAF(-0.13420069217681885000), _DATAF(-0.99095416069030762000)},

4495 {_DATAF(-0.13458070158958435000), _DATAF(-0.99090266227722168000)},

4496 {_DATAF(-0.13496071100234985000), _DATAF(-0.99085092544555664000)},

4497 {_DATAF(-0.13534067571163177000), _DATAF(-0.99079912900924683000)},

4498 {_DATAF(-0.13572064042091370000), _DATAF(-0.99074715375900269000)},

4499 {_DATAF(-0.13610057532787323000), _DATAF(-0.99069499969482422000)},

4500 {_DATAF(-0.13648049533367157000), _DATAF(-0.99064278602600098000)},

4501 {_DATAF(-0.13686038553714752000), _DATAF(-0.99059033393859863000)},

4502 {_DATAF(-0.13724026083946228000), _DATAF(-0.99053776264190674000)},

4503 {_DATAF(-0.13762012124061584000), _DATAF(-0.99048507213592529000)},

4504 {_DATAF(-0.13799995183944702000), _DATAF(-0.99043226242065430000)},

4505 {_DATAF(-0.13837976753711700000), _DATAF(-0.99037921428680420000)},

4506 {_DATAF(-0.13875956833362579000), _DATAF(-0.99032610654830933000)},

4507 {_DATAF(-0.13913933932781219000), _DATAF(-0.99027281999588013000)},

4508 {_DATAF(-0.13951909542083740000), _DATAF(-0.99021935462951660000)},

4509 {_DATAF(-0.13989883661270142000), _DATAF(-0.99016582965850830000)},

4510 {_DATAF(-0.14027854800224304000), _DATAF(-0.99011206626892090000)},

4511 {_DATAF(-0.14065824449062347000), _DATAF(-0.99005818367004395000)},

4512 {_DATAF(-0.14103791117668152000), _DATAF(-0.99000418186187744000)},

4513 {_DATAF(-0.14141756296157837000), _DATAF(-0.98995006084442139000)},

4514 {_DATAF(-0.14179719984531403000), _DATAF(-0.98989570140838623000)},

4515 {_DATAF(-0.14217680692672729000), _DATAF(-0.98984128236770630000)},

4516 {_DATAF(-0.14255639910697937000), _DATAF(-0.98978668451309204000)},

4517 {_DATAF(-0.14293596148490906000), _DATAF(-0.98973196744918823000)},

4518 {_DATAF(-0.14331550896167755000), _DATAF(-0.98967707157135010000)},

4519 {_DATAF(-0.14369502663612366000), _DATAF(-0.98962199687957764000)},

4520 {_DATAF(-0.14407454431056976000), _DATAF(-0.98956686258316040000)},

4521 {_DATAF(-0.14445401728153229000), _DATAF(-0.98951148986816406000)},

4522 {_DATAF(-0.14483349025249481000), _DATAF(-0.98945605754852295000)},

4523 {_DATAF(-0.14521291851997375000), _DATAF(-0.98940044641494751000)},

4524 {_DATAF(-0.14559234678745270000), _DATAF(-0.98934465646743774000)},

4525 {_DATAF(-0.14597174525260925000), _DATAF(-0.98928874731063843000)},

4526 {_DATAF(-0.14635111391544342000), _DATAF(-0.98923271894454956000)},

4527 {_DATAF(-0.14673046767711639000), _DATAF(-0.98917651176452637000)},

4528 {_DATAF(-0.14710980653762817000), _DATAF(-0.98912018537521362000)},

4529 {_DATAF(-0.14748911559581757000), _DATAF(-0.98906368017196655000)},

4530 {_DATAF(-0.14786840975284576000), _DATAF(-0.98900705575942993000)},

4531 {_DATAF(-0.14824767410755157000), _DATAF(-0.98895025253295898000)},

4532 {_DATAF(-0.14862692356109619000), _DATAF(-0.98889333009719849000)},

4533 {_DATAF(-0.14900614321231842000), _DATAF(-0.98883628845214844000)},

4534 {_DATAF(-0.14938534796237946000), _DATAF(-0.98877906799316406000)},

4535 {_DATAF(-0.14976453781127930000), _DATAF(-0.98872166872024536000)},

4536 {_DATAF(-0.15014369785785675000), _DATAF(-0.98866420984268188000)},

4537 {_DATAF(-0.15052282810211182000), _DATAF(-0.98860651254653931000)},

4538 {_DATAF(-0.15090194344520569000), _DATAF(-0.98854875564575195000)},

4539 {_DATAF(-0.15128104388713837000), _DATAF(-0.98849081993103027000)},

4540 {_DATAF(-0.15166011452674866000), _DATAF(-0.98843270540237427000)},

4541 {_DATAF(-0.15203915536403656000), _DATAF(-0.98837447166442871000)},

4542 {_DATAF(-0.15241818130016327000), _DATAF(-0.98831611871719360000)},

4543 {_DATAF(-0.15279719233512878000), _DATAF(-0.98825758695602417000)},

4544 {_DATAF(-0.15317615866661072000), _DATAF(-0.98819887638092041000)},

4545 {_DATAF(-0.15355512499809265000), _DATAF(-0.98814010620117188000)},

4546 {_DATAF(-0.15393406152725220000), _DATAF(-0.98808109760284424000)},

4547 {_DATAF(-0.15431296825408936000), _DATAF(-0.98802202939987183000)},

4548 {_DATAF(-0.15469186007976532000), _DATAF(-0.98796278238296509000)},

4549 {_DATAF(-0.15507073700428009000), _DATAF(-0.98790335655212402000)},

4550 {_DATAF(-0.15544956922531128000), _DATAF(-0.98784381151199341000)},

4551 {_DATAF(-0.15582840144634247000), _DATAF(-0.98778414726257324000)},

4552 {_DATAF(-0.15620720386505127000), _DATAF(-0.98772430419921875000)},

4553 {_DATAF(-0.15658597648143768000), _DATAF(-0.98766434192657471000)},

4554 {_DATAF(-0.15696471929550171000), _DATAF(-0.98760420083999634000)},

4555 {_DATAF(-0.15734346210956573000), _DATAF(-0.98754394054412842000)},

4556 {_DATAF(-0.15772216022014618000), _DATAF(-0.98748350143432617000)},

4557 {_DATAF(-0.15810084342956543000), _DATAF(-0.98742294311523438000)},

4558 {_DATAF(-0.15847951173782349000), _DATAF(-0.98736226558685303000)},

4559 {_DATAF(-0.15885815024375916000), _DATAF(-0.98730140924453735000)},

4560 {_DATAF(-0.15923675894737244000), _DATAF(-0.98724043369293213000)},

4561 {_DATAF(-0.15961535274982452000), _DATAF(-0.98717927932739258000)},

4562 {_DATAF(-0.15999391674995422000), _DATAF(-0.98711800575256348000)},

4563 {_DATAF(-0.16037245094776154000), _DATAF(-0.98705655336380005000)},

4564 {_DATAF(-0.16075097024440765000), _DATAF(-0.98699498176574707000)},

4565 {_DATAF(-0.16112947463989258000), _DATAF(-0.98693329095840454000)},

4566 {_DATAF(-0.16150794923305511000), _DATAF(-0.98687142133712769000)},

4567 {_DATAF(-0.16188639402389526000), _DATAF(-0.98680937290191650000)},

4568 {_DATAF(-0.16226482391357422000), _DATAF(-0.98674726486206055000)},

4569 {_DATAF(-0.16264322400093079000), _DATAF(-0.98668491840362549000)},

4570 {_DATAF(-0.16302159428596497000), _DATAF(-0.98662251234054565000)},

4571 {_DATAF(-0.16339994966983795000), _DATAF(-0.98655992746353149000)},

4572 {_DATAF(-0.16377827525138855000), _DATAF(-0.98649716377258301000)},

4573 {_DATAF(-0.16415658593177795000), _DATAF(-0.98643428087234497000)},

4574 {_DATAF(-0.16453486680984497000), _DATAF(-0.98637127876281738000)},

4575 {_DATAF(-0.16491311788558960000), _DATAF(-0.98630809783935547000)},

4576 {_DATAF(-0.16529135406017303000), _DATAF(-0.98624479770660400000)},

4577 {_DATAF(-0.16566956043243408000), _DATAF(-0.98618131875991821000)},

4578 {_DATAF(-0.16604773700237274000), _DATAF(-0.98611772060394287000)},

4579 {_DATAF(-0.16642589867115021000), _DATAF(-0.98605394363403320000)},

4580 {_DATAF(-0.16680404543876648000), _DATAF(-0.98599004745483398000)},

4581 {_DATAF(-0.16718214750289917000), _DATAF(-0.98592603206634521000)},

4582 {_DATAF(-0.16756023466587067000), _DATAF(-0.98586183786392212000)},

4583 {_DATAF(-0.16793829202651978000), _DATAF(-0.98579752445220947000)},

4584 {_DATAF(-0.16831633448600769000), _DATAF(-0.98573303222656250000)},

4585 {_DATAF(-0.16869434714317322000), _DATAF(-0.98566842079162598000)},

4586 {_DATAF(-0.16907232999801636000), _DATAF(-0.98560363054275513000)},

4587 {_DATAF(-0.16945029795169830000), _DATAF(-0.98553872108459473000)},

4588 {_DATAF(-0.16982822120189667000), _DATAF(-0.98547369241714478000)},

4589 {_DATAF(-0.17020614445209503000), _DATAF(-0.98540848493576050000)},

4590 {_DATAF(-0.17058402299880981000), _DATAF(-0.98534315824508667000)},

4591 {_DATAF(-0.17096188664436340000), _DATAF(-0.98527765274047852000)},

4592 {_DATAF(-0.17133972048759460000), _DATAF(-0.98521202802658081000)},

4593 {_DATAF(-0.17171753942966461000), _DATAF(-0.98514622449874878000)},

4594 {_DATAF(-0.17209532856941223000), _DATAF(-0.98508030176162720000)},

4595 {_DATAF(-0.17247308790683746000), _DATAF(-0.98501425981521606000)},

4596 {_DATAF(-0.17285081744194031000), _DATAF(-0.98494803905487061000)},

4597 {_DATAF(-0.17322853207588196000), _DATAF(-0.98488163948059082000)},

4598 {_DATAF(-0.17360621690750122000), _DATAF(-0.98481518030166626000)},

4599 {_DATAF(-0.17398387193679810000), _DATAF(-0.98474848270416260000)},

4600 {_DATAF(-0.17436151206493378000), _DATAF(-0.98468172550201416000)},

4601 {_DATAF(-0.17473910748958588000), _DATAF(-0.98461478948593140000)},

4602 {_DATAF(-0.17511670291423798000), _DATAF(-0.98454767465591431000)},

4603 {_DATAF(-0.17549425363540649000), _DATAF(-0.98448044061660767000)},

4604 {_DATAF(-0.17587178945541382000), _DATAF(-0.98441308736801147000)},

4605 {_DATAF(-0.17624929547309875000), _DATAF(-0.98434555530548096000)},

4606 {_DATAF(-0.17662677168846130000), _DATAF(-0.98427790403366089000)},

4607 {_DATAF(-0.17700421810150146000), _DATAF(-0.98421007394790649000)},

4608 {_DATAF(-0.17738164961338043000), _DATAF(-0.98414212465286255000)},

4609 {_DATAF(-0.17775905132293701000), _DATAF(-0.98407405614852905000)},

4610 {_DATAF(-0.17813642323017120000), _DATAF(-0.98400580883026123000)},

4611 {_DATAF(-0.17851376533508301000), _DATAF(-0.98393744230270386000)},

4612 {_DATAF(-0.17889109253883362000), _DATAF(-0.98386889696121216000)},

4613 {_DATAF(-0.17926838994026184000), _DATAF(-0.98380023241043091000)},

4614 {_DATAF(-0.17964565753936768000), _DATAF(-0.98373138904571533000)},

4615 {_DATAF(-0.18002289533615112000), _DATAF(-0.98366242647171021000)},

4616 {_DATAF(-0.18040011823177338000), _DATAF(-0.98359328508377075000)},

4617 {_DATAF(-0.18077731132507324000), _DATAF(-0.98352402448654175000)},

4618 {_DATAF(-0.18115447461605072000), _DATAF(-0.98345464468002319000)},

4619 {_DATAF(-0.18153160810470581000), _DATAF(-0.98338508605957031000)},

4620 {_DATAF(-0.18190871179103851000), _DATAF(-0.98331540822982788000)},

4621 {_DATAF(-0.18228580057621002000), _DATAF(-0.98324561119079590000)},

4622 {_DATAF(-0.18266285955905914000), _DATAF(-0.98317563533782959000)},

4623 {_DATAF(-0.18303988873958588000), _DATAF(-0.98310548067092896000)},

4624 {_DATAF(-0.18341688811779022000), _DATAF(-0.98303520679473877000)},

4625 {_DATAF(-0.18379387259483337000), _DATAF(-0.98296481370925903000)},

4626 {_DATAF(-0.18417081236839294000), _DATAF(-0.98289424180984497000)},

4627 {_DATAF(-0.18454773724079132000), _DATAF(-0.98282355070114136000)},

4628 {_DATAF(-0.18492463231086731000), _DATAF(-0.98275268077850342000)},

4629 {_DATAF(-0.18530149757862091000), _DATAF(-0.98268169164657593000)},

4630 {_DATAF(-0.18567833304405212000), _DATAF(-0.98261058330535889000)},

4631 {_DATAF(-0.18605515360832214000), _DATAF(-0.98253929615020752000)},

4632 {_DATAF(-0.18643194437026978000), _DATAF(-0.98246788978576660000)},

4633 {_DATAF(-0.18680869042873383000), _DATAF(-0.98239630460739136000)},

4634 {_DATAF(-0.18718542158603668000), _DATAF(-0.98232460021972656000)},

4635 {_DATAF(-0.18756212294101715000), _DATAF(-0.98225271701812744000)},

4636 {_DATAF(-0.18793880939483643000), _DATAF(-0.98218071460723877000)},

4637 {_DATAF(-0.18831545114517212000), _DATAF(-0.98210859298706055000)},

4638 {_DATAF(-0.18869207799434662000), _DATAF(-0.98203629255294800000)},

4639 {_DATAF(-0.18906866014003754000), _DATAF(-0.98196387290954590000)},

4640 {_DATAF(-0.18944522738456726000), _DATAF(-0.98189127445220947000)},

4641 {_DATAF(-0.18982176482677460000), _DATAF(-0.98181855678558350000)},

4642 {_DATAF(-0.19019827246665955000), _DATAF(-0.98174571990966797000)},

4643 {_DATAF(-0.19057475030422211000), _DATAF(-0.98167270421981812000)},

4644 {_DATAF(-0.19095121324062347000), _DATAF(-0.98159950971603394000)},

4645 {_DATAF(-0.19132763147354126000), _DATAF(-0.98152625560760498000)},

4646 {_DATAF(-0.19170403480529785000), _DATAF(-0.98145276308059692000)},

4647 {_DATAF(-0.19208039343357086000), _DATAF(-0.98137921094894409000)},

4648 {_DATAF(-0.19245673716068268000), _DATAF(-0.98130548000335693000)},

4649 {_DATAF(-0.19283305108547211000), _DATAF(-0.98123157024383545000)},

4650 {_DATAF(-0.19320933520793915000), _DATAF(-0.98115754127502441000)},

4651 {_DATAF(-0.19358558952808380000), _DATAF(-0.98108339309692383000)},

4652 {_DATAF(-0.19396181404590607000), _DATAF(-0.98100906610488892000)},

4653 {_DATAF(-0.19433800876140594000), _DATAF(-0.98093461990356445000)},

4654 {_DATAF(-0.19471418857574463000), _DATAF(-0.98085999488830566000)},

4655 {_DATAF(-0.19509032368659973000), _DATAF(-0.98078525066375732000)},

4656 {_DATAF(-0.19546642899513245000), _DATAF(-0.98071038722991943000)},

4657 {_DATAF(-0.19584251940250397000), _DATAF(-0.98063534498214722000)},

4658 {_DATAF(-0.19621856510639191000), _DATAF(-0.98056018352508545000)},

4659 {_DATAF(-0.19659459590911865000), _DATAF(-0.98048484325408936000)},

4660 {_DATAF(-0.19697059690952301000), _DATAF(-0.98040938377380371000)},

4661 {_DATAF(-0.19734656810760498000), _DATAF(-0.98033380508422852000)},

4662 {_DATAF(-0.19772249460220337000), _DATAF(-0.98025804758071899000)},

4663 {_DATAF(-0.19809840619564056000), _DATAF(-0.98018211126327515000)},

4664 {_DATAF(-0.19847428798675537000), _DATAF(-0.98010611534118652000)},

4665 {_DATAF(-0.19885013997554779000), _DATAF(-0.98002988100051880000)},

4666 {_DATAF(-0.19922596216201782000), _DATAF(-0.97995358705520630000)},

4667 {_DATAF(-0.19960175454616547000), _DATAF(-0.97987711429595947000)},

4668 {_DATAF(-0.19997751712799072000), _DATAF(-0.97980046272277832000)},

4669 {_DATAF(-0.20035324990749359000), _DATAF(-0.97972375154495239000)},

4670 {_DATAF(-0.20072895288467407000), _DATAF(-0.97964680194854736000)},

4671 {_DATAF(-0.20110464096069336000), _DATAF(-0.97956979274749756000)},

4672 {_DATAF(-0.20148028433322906000), _DATAF(-0.97949254512786865000)},

4673 {_DATAF(-0.20185589790344238000), _DATAF(-0.97941523790359497000)},

4674 {_DATAF(-0.20223148167133331000), _DATAF(-0.97933775186538696000)},

4675 {_DATAF(-0.20260703563690186000), _DATAF(-0.97926014661788940000)},

4676 {_DATAF(-0.20298255980014801000), _DATAF(-0.97918236255645752000)},

4677 {_DATAF(-0.20335806906223297000), _DATAF(-0.97910445928573608000)},

4678 {_DATAF(-0.20373353362083435000), _DATAF(-0.97902637720108032000)},

4679 {_DATAF(-0.20410896837711334000), _DATAF(-0.97894817590713501000)},

4680 {_DATAF(-0.20448437333106995000), _DATAF(-0.97886985540390015000)},

4681 {_DATAF(-0.20485974848270416000), _DATAF(-0.97879135608673096000)},

4682 {_DATAF(-0.20523509383201599000), _DATAF(-0.97871267795562744000)},

4683 {_DATAF(-0.20561040937900543000), _DATAF(-0.97863394021987915000)},

4684 {_DATAF(-0.20598569512367249000), _DATAF(-0.97855502367019653000)},

4685 {_DATAF(-0.20636095106601715000), _DATAF(-0.97847592830657959000)},

4686 {_DATAF(-0.20673617720603943000), _DATAF(-0.97839671373367310000)},

4687 {_DATAF(-0.20711137354373932000), _DATAF(-0.97831737995147705000)},

4688 {_DATAF(-0.20748654007911682000), _DATAF(-0.97823786735534668000)},

4689 {_DATAF(-0.20786167681217194000), _DATAF(-0.97815823554992676000)},

4690 {_DATAF(-0.20823678374290466000), _DATAF(-0.97807842493057251000)},

4691 {_DATAF(-0.20861184597015381000), _DATAF(-0.97799849510192871000)},

4692 {_DATAF(-0.20898689329624176000), _DATAF(-0.97791844606399536000)},

4693 {_DATAF(-0.20936191082000732000), _DATAF(-0.97783821821212769000)},

4694 {_DATAF(-0.20973688364028931000), _DATAF(-0.97775787115097046000)},

4695 {_DATAF(-0.21011184155941010000), _DATAF(-0.97767734527587891000)},

4696 {_DATAF(-0.21048675477504730000), _DATAF(-0.97759670019149780000)},

4697 {_DATAF(-0.21086163818836212000), _DATAF(-0.97751593589782715000)},

4698 {_DATAF(-0.21123650670051575000), _DATAF(-0.97743499279022217000)},

4699 {_DATAF(-0.21161133050918579000), _DATAF(-0.97735387086868286000)},

4700 {_DATAF(-0.21198612451553345000), _DATAF(-0.97727268934249878000)},

4701 {_DATAF(-0.21236088871955872000), _DATAF(-0.97719132900238037000)},

4702 {_DATAF(-0.21273562312126160000), _DATAF(-0.97710978984832764000)},

4703 {_DATAF(-0.21311031281948090000), _DATAF(-0.97702813148498535000)},

4704 {_DATAF(-0.21348498761653900000), _DATAF(-0.97694635391235352000)},

4705 {_DATAF(-0.21385963261127472000), _DATAF(-0.97686439752578735000)},

4706 {_DATAF(-0.21423423290252686000), _DATAF(-0.97678232192993164000)},

4707 {_DATAF(-0.21460881829261780000), _DATAF(-0.97670006752014160000)},

4708 {_DATAF(-0.21498335897922516000), _DATAF(-0.97661769390106201000)},

4709 {_DATAF(-0.21535786986351013000), _DATAF(-0.97653520107269287000)},

4710 {_DATAF(-0.21573235094547272000), _DATAF(-0.97645252943038940000)},

4711 {_DATAF(-0.21610680222511292000), _DATAF(-0.97636973857879639000)},

4712 {_DATAF(-0.21648120880126953000), _DATAF(-0.97628676891326904000)},

4713 {_DATAF(-0.21685560047626495000), _DATAF(-0.97620368003845215000)},

4714 {_DATAF(-0.21722994744777679000), _DATAF(-0.97612047195434570000)},

4715 {_DATAF(-0.21760427951812744000), _DATAF(-0.97603708505630493000)},

4716 {_DATAF(-0.21797856688499451000), _DATAF(-0.97595357894897461000)},

4717 {_DATAF(-0.21835282444953918000), _DATAF(-0.97586989402770996000)},

4718 {_DATAF(-0.21872705221176147000), _DATAF(-0.97578608989715576000)},

4719 {_DATAF(-0.21910123527050018000), _DATAF(-0.97570210695266724000)},

4720 {_DATAF(-0.21947540342807770000), _DATAF(-0.97561800479888916000)},

4721 {_DATAF(-0.21984952688217163000), _DATAF(-0.97553378343582153000)},

4722 {_DATAF(-0.22022362053394318000), _DATAF(-0.97544938325881958000)},

4723 {_DATAF(-0.22059768438339233000), _DATAF(-0.97536486387252808000)},

4724 {_DATAF(-0.22097171843051910000), _DATAF(-0.97528022527694702000)},

4725 {_DATAF(-0.22134572267532349000), _DATAF(-0.97519540786743164000)},

4726 {_DATAF(-0.22171968221664429000), _DATAF(-0.97511047124862671000)},

4727 {_DATAF(-0.22209362685680389000), _DATAF(-0.97502535581588745000)},

4728 {_DATAF(-0.22246752679347992000), _DATAF(-0.97494012117385864000)},

4729 {_DATAF(-0.22284139692783356000), _DATAF(-0.97485470771789551000)},

4730 {_DATAF(-0.22321522235870361000), _DATAF(-0.97476917505264282000)},

4731 {_DATAF(-0.22358903288841248000), _DATAF(-0.97468352317810059000)},

4732 {_DATAF(-0.22396279871463776000), _DATAF(-0.97459769248962402000)},

4733 {_DATAF(-0.22433653473854065000), _DATAF(-0.97451174259185791000)},

4734 {_DATAF(-0.22471024096012115000), _DATAF(-0.97442561388015747000)},

4735 {_DATAF(-0.22508391737937927000), _DATAF(-0.97433936595916748000)},

4736 {_DATAF(-0.22545754909515381000), _DATAF(-0.97425299882888794000)},

4737 {_DATAF(-0.22583115100860596000), _DATAF(-0.97416645288467407000)},

4738 {_DATAF(-0.22620472311973572000), _DATAF(-0.97407978773117065000)},

4739 {_DATAF(-0.22657826542854309000), _DATAF(-0.97399294376373291000)},

4740 {_DATAF(-0.22695176303386688000), _DATAF(-0.97390598058700562000)},

4741 {_DATAF(-0.22732524573802948000), _DATAF(-0.97381889820098877000)},

4742 {_DATAF(-0.22769868373870850000), _DATAF(-0.97373163700103760000)},

4743 {_DATAF(-0.22807207703590393000), _DATAF(-0.97364425659179688000)},

4744 {_DATAF(-0.22844545543193817000), _DATAF(-0.97355669736862183000)},

4745 {_DATAF(-0.22881878912448883000), _DATAF(-0.97346901893615723000)},

4746 {_DATAF(-0.22919209301471710000), _DATAF(-0.97338122129440308000)},

4747 {_DATAF(-0.22956536710262299000), _DATAF(-0.97329324483871460000)},

4748 {_DATAF(-0.22993859648704529000), _DATAF(-0.97320514917373657000)},

4749 {_DATAF(-0.23031181097030640000), _DATAF(-0.97311687469482422000)},

4750 {_DATAF(-0.23068498075008392000), _DATAF(-0.97302848100662231000)},

4751 {_DATAF(-0.23105810582637787000), _DATAF(-0.97293996810913086000)},

4752 {_DATAF(-0.23143121600151062000), _DATAF(-0.97285127639770508000)},

4753 {_DATAF(-0.23180428147315979000), _DATAF(-0.97276246547698975000)},

4754 {_DATAF(-0.23217730224132538000), _DATAF(-0.97267347574234009000)},

4755 {_DATAF(-0.23255030810832977000), _DATAF(-0.97258436679840088000)},

4756 {_DATAF(-0.23292326927185059000), _DATAF(-0.97249513864517212000)},

4757 {_DATAF(-0.23329620063304901000), _DATAF(-0.97240573167800903000)},

4758 {_DATAF(-0.23366910219192505000), _DATAF(-0.97231620550155640000)},

4759 {_DATAF(-0.23404195904731750000), _DATAF(-0.97222650051116943000)},

4760 {_DATAF(-0.23441478610038757000), _DATAF(-0.97213667631149292000)},

4761 {_DATAF(-0.23478758335113525000), _DATAF(-0.97204673290252686000)},

4762 {_DATAF(-0.23516033589839935000), _DATAF(-0.97195661067962646000)},

4763 {_DATAF(-0.23553305864334106000), _DATAF(-0.97186630964279175000)},

4764 {_DATAF(-0.23590575158596039000), _DATAF(-0.97177594900131226000)},

4765 {_DATAF(-0.23627839982509613000), _DATAF(-0.97168540954589844000)},

4766 {_DATAF(-0.23665101826190948000), _DATAF(-0.97159469127655029000)},

4767 {_DATAF(-0.23702360689640045000), _DATAF(-0.97150391340255737000)},

4768 {_DATAF(-0.23739615082740784000), _DATAF(-0.97141289710998535000)},

4769 {_DATAF(-0.23776866495609283000), _DATAF(-0.97132182121276855000)},

4770 {_DATAF(-0.23814114928245544000), _DATAF(-0.97123056650161743000)},

4771 {_DATAF(-0.23851358890533447000), _DATAF(-0.97113913297653198000)},

4772 {_DATAF(-0.23888599872589111000), _DATAF(-0.97104763984680176000)},

4773 {_DATAF(-0.23925837874412537000), _DATAF(-0.97095590829849243000)},

4774 {_DATAF(-0.23963071405887604000), _DATAF(-0.97086411714553833000)},

4775 {_DATAF(-0.24000301957130432000), _DATAF(-0.97077214717864990000)},

4776 {_DATAF(-0.24037529528141022000), _DATAF(-0.97068005800247192000)},

4777 {_DATAF(-0.24074752628803253000), _DATAF(-0.97058779001235962000)},

4778 {_DATAF(-0.24111972749233246000), _DATAF(-0.97049540281295776000)},

4779 {_DATAF(-0.24149188399314880000), _DATAF(-0.97040283679962158000)},

4780 {_DATAF(-0.24186401069164276000), _DATAF(-0.97031015157699585000)},

4781 {_DATAF(-0.24223610758781433000), _DATAF(-0.97021734714508057000)},

4782 {_DATAF(-0.24260815978050232000), _DATAF(-0.97012436389923096000)},

4783 {_DATAF(-0.24298018217086792000), _DATAF(-0.97003126144409180000)},

4784 {_DATAF(-0.24335215985774994000), _DATAF(-0.96993798017501831000)},

4785 {_DATAF(-0.24372410774230957000), _DATAF(-0.96984457969665527000)},

4786 {_DATAF(-0.24409602582454681000), _DATAF(-0.96975106000900269000)},

4787 {_DATAF(-0.24446789920330048000), _DATAF(-0.96965736150741577000)},

4788 {_DATAF(-0.24483974277973175000), _DATAF(-0.96956354379653931000)},

4789 {_DATAF(-0.24521154165267944000), _DATAF(-0.96946960687637329000)},

4790 {_DATAF(-0.24558331072330475000), _DATAF(-0.96937549114227295000)},

4791 {_DATAF(-0.24595504999160767000), _DATAF(-0.96928125619888306000)},

4792 {_DATAF(-0.24632674455642700000), _DATAF(-0.96918684244155884000)},

4793 {_DATAF(-0.24669840931892395000), _DATAF(-0.96909230947494507000)},

4794 {_DATAF(-0.24707002937793732000), _DATAF(-0.96899759769439697000)},

4795 {_DATAF(-0.24744161963462830000), _DATAF(-0.96890282630920410000)},

4796 {_DATAF(-0.24781316518783569000), _DATAF(-0.96880781650543213000)},

4797 {_DATAF(-0.24818468093872070000), _DATAF(-0.96871274709701538000)},

4798 {_DATAF(-0.24855616688728333000), _DATAF(-0.96861749887466431000)},

4799 {_DATAF(-0.24892760813236237000), _DATAF(-0.96852207183837891000)},

4800 {_DATAF(-0.24929900467395782000), _DATAF(-0.96842658519744873000)},

4801 {_DATAF(-0.24967038631439209000), _DATAF(-0.96833086013793945000)},

4802 {_DATAF(-0.25004172325134277000), _DATAF(-0.96823507547378540000)},

4803 {_DATAF(-0.25041300058364868000), _DATAF(-0.96813911199569702000)},

4804 {_DATAF(-0.25078427791595459000), _DATAF(-0.96804302930831909000)},

4805 {_DATAF(-0.25115549564361572000), _DATAF(-0.96794676780700684000)},

4806 {_DATAF(-0.25152668356895447000), _DATAF(-0.96785038709640503000)},

4807 {_DATAF(-0.25189781188964844000), _DATAF(-0.96775382757186890000)},

4808 {_DATAF(-0.25226894021034241000), _DATAF(-0.96765714883804321000)},

4809 {_DATAF(-0.25264000892639160000), _DATAF(-0.96756035089492798000)},

4810 {_DATAF(-0.25301104784011841000), _DATAF(-0.96746337413787842000)},

4811 {_DATAF(-0.25338202714920044000), _DATAF(-0.96736627817153931000)},

4812 {_DATAF(-0.25375300645828247000), _DATAF(-0.96726906299591064000)},

4813 {_DATAF(-0.25412392616271973000), _DATAF(-0.96717166900634766000)},

4814 {_DATAF(-0.25449481606483459000), _DATAF(-0.96707415580749512000)},

4815 {_DATAF(-0.25486564636230469000), _DATAF(-0.96697646379470825000)},

4816 {_DATAF(-0.25523647665977478000), _DATAF(-0.96687865257263184000)},

4817 {_DATAF(-0.25560724735260010000), _DATAF(-0.96678072214126587000)},

4818 {_DATAF(-0.25597798824310303000), _DATAF(-0.96668261289596558000)},

4819 {_DATAF(-0.25634866952896118000), _DATAF(-0.96658438444137573000)},

4820 {_DATAF(-0.25671935081481934000), _DATAF(-0.96648597717285156000)},

4821 {_DATAF(-0.25708997249603271000), _DATAF(-0.96638745069503784000)},

4822 {_DATAF(-0.25746056437492371000), _DATAF(-0.96628880500793457000)},

4823 {_DATAF(-0.25783109664916992000), _DATAF(-0.96618998050689697000)},

4824 {_DATAF(-0.25820159912109375000), _DATAF(-0.96609103679656982000)},

4825 {_DATAF(-0.25857207179069519000), _DATAF(-0.96599197387695313000)},

4826 {_DATAF(-0.25894251465797424000), _DATAF(-0.96589273214340210000)},

4827 {_DATAF(-0.25931292772293091000), _DATAF(-0.96579337120056152000)},

4828 {_DATAF(-0.25968328118324280000), _DATAF(-0.96569383144378662000)},

4829 {_DATAF(-0.26005360484123230000), _DATAF(-0.96559417247772217000)},

4830 {_DATAF(-0.26042386889457703000), _DATAF(-0.96549439430236816000)},

4831 {_DATAF(-0.26079410314559937000), _DATAF(-0.96539443731307983000)},

4832 {_DATAF(-0.26116433739662170000), _DATAF(-0.96529436111450195000)},

4833 {_DATAF(-0.26153448224067688000), _DATAF(-0.96519410610198975000)},

4834 {_DATAF(-0.26190462708473206000), _DATAF(-0.96509379148483276000)},

4835 {_DATAF(-0.26227471232414246000), _DATAF(-0.96499323844909668000)},

4836 {_DATAF(-0.26264476776123047000), _DATAF(-0.96489262580871582000)},

4837 {_DATAF(-0.26301476359367371000), _DATAF(-0.96479183435440063000)},

4838 {_DATAF(-0.26338472962379456000), _DATAF(-0.96469086408615112000)},

4839 {_DATAF(-0.26375466585159302000), _DATAF(-0.96458977460861206000)},

4840 {_DATAF(-0.26412457227706909000), _DATAF(-0.96448856592178345000)},

4841 {_DATAF(-0.26449441909790039000), _DATAF(-0.96438723802566528000)},

4842 {_DATAF(-0.26486423611640930000), _DATAF(-0.96428573131561279000)},

4843 {_DATAF(-0.26523402333259583000), _DATAF(-0.96418404579162598000)},

4844 {_DATAF(-0.26560378074645996000), _DATAF(-0.96408230066299438000)},

4845 {_DATAF(-0.26597347855567932000), _DATAF(-0.96398037672042847000)},

4846 {_DATAF(-0.26634314656257629000), _DATAF(-0.96387827396392822000)},

4847 {_DATAF(-0.26671275496482849000), _DATAF(-0.96377605199813843000)},

4848 {_DATAF(-0.26708233356475830000), _DATAF(-0.96367371082305908000)},

4849 {_DATAF(-0.26745188236236572000), _DATAF(-0.96357119083404541000)},

4850 {_DATAF(-0.26782140135765076000), _DATAF(-0.96346855163574219000)},

4851 {_DATAF(-0.26819086074829102000), _DATAF(-0.96336579322814941000)},

4852 {_DATAF(-0.26856029033660889000), _DATAF(-0.96326285600662231000)},

4853 {_DATAF(-0.26892966032028198000), _DATAF(-0.96315979957580566000)},

4854 {_DATAF(-0.26929903030395508000), _DATAF(-0.96305662393569946000)},

4855 {_DATAF(-0.26966831088066101000), _DATAF(-0.96295326948165894000)},

4856 {_DATAF(-0.27003759145736694000), _DATAF(-0.96284979581832886000)},

4857 {_DATAF(-0.27040681242942810000), _DATAF(-0.96274614334106445000)},

4858 {_DATAF(-0.27077600359916687000), _DATAF(-0.96264237165451050000)},

4859 {_DATAF(-0.27114516496658325000), _DATAF(-0.96253848075866699000)},

4860 {_DATAF(-0.27151426672935486000), _DATAF(-0.96243441104888916000)},

4861 {_DATAF(-0.27188333868980408000), _DATAF(-0.96233022212982178000)},

4862 {_DATAF(-0.27225238084793091000), _DATAF(-0.96222585439682007000)},

4863 {_DATAF(-0.27262136340141296000), _DATAF(-0.96212142705917358000)},

4864 {_DATAF(-0.27299031615257263000), _DATAF(-0.96201676130294800000)},

4865 {_DATAF(-0.27335920929908752000), _DATAF(-0.96191203594207764000)},

4866 {_DATAF(-0.27372807264328003000), _DATAF(-0.96180713176727295000)},

4867 {_DATAF(-0.27409690618515015000), _DATAF(-0.96170204877853394000)},

4868 {_DATAF(-0.27446570992469788000), _DATAF(-0.96159690618515015000)},

4869 {_DATAF(-0.27483445405960083000), _DATAF(-0.96149158477783203000)},

4870 {_DATAF(-0.27520313858985901000), _DATAF(-0.96138608455657959000)},

4871 {_DATAF(-0.27557182312011719000), _DATAF(-0.96128046512603760000)},

4872 {_DATAF(-0.27594044804573059000), _DATAF(-0.96117472648620605000)},

4873 {_DATAF(-0.27630904316902161000), _DATAF(-0.96106886863708496000)},

4874 {_DATAF(-0.27667757868766785000), _DATAF(-0.96096283197402954000)},

4875 {_DATAF(-0.27704608440399170000), _DATAF(-0.96085661649703979000)},

4876 {_DATAF(-0.27741453051567078000), _DATAF(-0.96075034141540527000)},

4877 {_DATAF(-0.27778297662734985000), _DATAF(-0.96064388751983643000)},

4878 {_DATAF(-0.27815136313438416000), _DATAF(-0.96053725481033325000)},

4879 {_DATAF(-0.27851969003677368000), _DATAF(-0.96043050289154053000)},

4880 {_DATAF(-0.27888798713684082000), _DATAF(-0.96032363176345825000)},

4881 {_DATAF(-0.27925625443458557000), _DATAF(-0.96021664142608643000)},

4882 {_DATAF(-0.27962446212768555000), _DATAF(-0.96010947227478027000)},

4883 {_DATAF(-0.27999264001846313000), _DATAF(-0.96000212430953979000)},

4884 {_DATAF(-0.28036078810691833000), _DATAF(-0.95989471673965454000)},

4885 {_DATAF(-0.28072887659072876000), _DATAF(-0.95978713035583496000)},

4886 {_DATAF(-0.28109693527221680000), _DATAF(-0.95967936515808105000)},

4887 {_DATAF(-0.28146493434906006000), _DATAF(-0.95957154035568237000)},

4888 {_DATAF(-0.28183290362358093000), _DATAF(-0.95946347713470459000)},

4889 {_DATAF(-0.28220084309577942000), _DATAF(-0.95935535430908203000)},

4890 {_DATAF(-0.28256872296333313000), _DATAF(-0.95924705266952515000)},

4891 {_DATAF(-0.28293657302856445000), _DATAF(-0.95913863182067871000)},

4892 {_DATAF(-0.28330436348915100000), _DATAF(-0.95903003215789795000)},

4893 {_DATAF(-0.28367212414741516000), _DATAF(-0.95892131328582764000)},

4894 {_DATAF(-0.28403985500335693000), _DATAF(-0.95881247520446777000)},

4895 {_DATAF(-0.28440752625465393000), _DATAF(-0.95870345830917358000)},

4896 {_DATAF(-0.28477516770362854000), _DATAF(-0.95859432220458984000)},

4897 {_DATAF(-0.28514277935028076000), _DATAF(-0.95848506689071655000)},

4898 {_DATAF(-0.28551033139228821000), _DATAF(-0.95837563276290894000)},

4899 {_DATAF(-0.28587782382965088000), _DATAF(-0.95826607942581177000)},

4900 {_DATAF(-0.28624531626701355000), _DATAF(-0.95815634727478027000)},

4901 {_DATAF(-0.28661271929740906000), _DATAF(-0.95804649591445923000)},

4902 {_DATAF(-0.28698012232780457000), _DATAF(-0.95793652534484863000)},

4903 {_DATAF(-0.28734746575355530000), _DATAF(-0.95782643556594849000)},

4904 {_DATAF(-0.28771474957466125000), _DATAF(-0.95771616697311401000)},

4905 {_DATAF(-0.28808203339576721000), _DATAF(-0.95760571956634521000)},

4906 {_DATAF(-0.28844922780990601000), _DATAF(-0.95749521255493164000)},

4907 {_DATAF(-0.28881642222404480000), _DATAF(-0.95738452672958374000)},

4908 {_DATAF(-0.28918352723121643000), _DATAF(-0.95727366209030151000)},

4909 {_DATAF(-0.28955063223838806000), _DATAF(-0.95716267824172974000)},

4910 {_DATAF(-0.28991767764091492000), _DATAF(-0.95705157518386841000)},

4911 {_DATAF(-0.29028466343879700000), _DATAF(-0.95694035291671753000)},

4912 {_DATAF(-0.29065164923667908000), _DATAF(-0.95682895183563232000)},

4913 {_DATAF(-0.29101854562759399000), _DATAF(-0.95671743154525757000)},

4914 {_DATAF(-0.29138544201850891000), _DATAF(-0.95660573244094849000)},

4915 {_DATAF(-0.29175224900245667000), _DATAF(-0.95649391412734985000)},

4916 {_DATAF(-0.29211905598640442000), _DATAF(-0.95638197660446167000)},

4917 {_DATAF(-0.29248580336570740000), _DATAF(-0.95626986026763916000)},

4918 {_DATAF(-0.29285249114036560000), _DATAF(-0.95615762472152710000)},

4919 {_DATAF(-0.29321914911270142000), _DATAF(-0.95604526996612549000)},

4920 {_DATAF(-0.29358577728271484000), _DATAF(-0.95593273639678955000)},

4921 {_DATAF(-0.29395234584808350000), _DATAF(-0.95582008361816406000)},

4922 {_DATAF(-0.29431888461112976000), _DATAF(-0.95570725202560425000)},

4923 {_DATAF(-0.29468536376953125000), _DATAF(-0.95559436082839966000)},

4924 {_DATAF(-0.29505181312561035000), _DATAF(-0.95548123121261597000)},

4925 {_DATAF(-0.29541820287704468000), _DATAF(-0.95536804199218750000)},

4926 {_DATAF(-0.29578456282615662000), _DATAF(-0.95525467395782471000)},

4927 {_DATAF(-0.29615089297294617000), _DATAF(-0.95514118671417236000)},

4928 {_DATAF(-0.29651716351509094000), _DATAF(-0.95502752065658569000)},

4929 {_DATAF(-0.29688337445259094000), _DATAF(-0.95491373538970947000)},

4930 {_DATAF(-0.29724955558776855000), _DATAF(-0.95479983091354370000)},

4931 {_DATAF(-0.29761570692062378000), _DATAF(-0.95468574762344360000)},

4932 {_DATAF(-0.29798179864883423000), _DATAF(-0.95457154512405396000)},

4933 {_DATAF(-0.29834786057472229000), _DATAF(-0.95445722341537476000)},

4934 {_DATAF(-0.29871386289596558000), _DATAF(-0.95434272289276123000)},

4935 {_DATAF(-0.29907983541488647000), _DATAF(-0.95422810316085815000)},

4936 {_DATAF(-0.29944574832916260000), _DATAF(-0.95411330461502075000)},

4937 {_DATAF(-0.29981163144111633000), _DATAF(-0.95399844646453857000)},

4938 {_DATAF(-0.30017745494842529000), _DATAF(-0.95388334989547729000)},

4939 {_DATAF(-0.30054324865341187000), _DATAF(-0.95376819372177124000)},

4940 {_DATAF(-0.30090898275375366000), _DATAF(-0.95365285873413086000)},

4941 {_DATAF(-0.30127468705177307000), _DATAF(-0.95353740453720093000)},

4942 {_DATAF(-0.30164033174514771000), _DATAF(-0.95342177152633667000)},

4943 {_DATAF(-0.30200594663619995000), _DATAF(-0.95330601930618286000)},

4944 {_DATAF(-0.30237150192260742000), _DATAF(-0.95319014787673950000)},

4945 {_DATAF(-0.30273702740669250000), _DATAF(-0.95307409763336182000)},

4946 {_DATAF(-0.30310252308845520000), _DATAF(-0.95295792818069458000)},

4947 {_DATAF(-0.30346795916557312000), _DATAF(-0.95284163951873779000)},

4948 {_DATAF(-0.30383333563804626000), _DATAF(-0.95272517204284668000)},

4949 {_DATAF(-0.30419868230819702000), _DATAF(-0.95260858535766602000)},

4950 {_DATAF(-0.30456396937370300000), _DATAF(-0.95249187946319580000)},

4951 {_DATAF(-0.30492922663688660000), _DATAF(-0.95237499475479126000)},

4952 {_DATAF(-0.30529442429542542000), _DATAF(-0.95225799083709717000)},

4953 {_DATAF(-0.30565959215164185000), _DATAF(-0.95214086771011353000)},

4954 {_DATAF(-0.30602473020553589000), _DATAF(-0.95202356576919556000)},

4955 {_DATAF(-0.30638980865478516000), _DATAF(-0.95190614461898804000)},

4956 {_DATAF(-0.30675482749938965000), _DATAF(-0.95178854465484619000)},

4957 {_DATAF(-0.30711981654167175000), _DATAF(-0.95167088508605957000)},

4958 {_DATAF(-0.30748474597930908000), _DATAF(-0.95155298709869385000)},

4959 {_DATAF(-0.30784964561462402000), _DATAF(-0.95143502950668335000)},

4960 {_DATAF(-0.30821448564529419000), _DATAF(-0.95131689310073853000)},

4961 {_DATAF(-0.30857929587364197000), _DATAF(-0.95119863748550415000)},

4962 {_DATAF(-0.30894404649734497000), _DATAF(-0.95108020305633545000)},

4963 {_DATAF(-0.30930876731872559000), _DATAF(-0.95096164941787720000)},

4964 {_DATAF(-0.30967342853546143000), _DATAF(-0.95084297657012939000)},

4965 {_DATAF(-0.31003805994987488000), _DATAF(-0.95072412490844727000)},

4966 {_DATAF(-0.31040263175964355000), _DATAF(-0.95060515403747559000)},

4967 {_DATAF(-0.31076714396476746000), _DATAF(-0.95048606395721436000)},

4968 {_DATAF(-0.31113162636756897000), _DATAF(-0.95036685466766357000)},

4969 {_DATAF(-0.31149607896804810000), _DATAF(-0.95024746656417847000)},

4970 {_DATAF(-0.31186047196388245000), _DATAF(-0.95012789964675903000)},

4971 {_DATAF(-0.31222480535507202000), _DATAF(-0.95000827312469482000)},

4972 {_DATAF(-0.31258910894393921000), _DATAF(-0.94988846778869629000)},

4973 {_DATAF(-0.31295338273048401000), _DATAF(-0.94976848363876343000)},

4974 {_DATAF(-0.31331756711006165000), _DATAF(-0.94964838027954102000)},

4975 {_DATAF(-0.31368175148963928000), _DATAF(-0.94952815771102905000)},

4976 {_DATAF(-0.31404584646224976000), _DATAF(-0.94940781593322754000)},

4977 {_DATAF(-0.31440994143486023000), _DATAF(-0.94928729534149170000)},

4978 {_DATAF(-0.31477394700050354000), _DATAF(-0.94916665554046631000)},

4979 {_DATAF(-0.31513792276382446000), _DATAF(-0.94904589653015137000)},

4980 {_DATAF(-0.31550186872482300000), _DATAF(-0.94892495870590210000)},

4981 {_DATAF(-0.31586575508117676000), _DATAF(-0.94880390167236328000)},

4982 {_DATAF(-0.31622958183288574000), _DATAF(-0.94868266582489014000)},

4983 {_DATAF(-0.31659337878227234000), _DATAF(-0.94856137037277222000)},

4984 {_DATAF(-0.31695711612701416000), _DATAF(-0.94843989610671997000)},

4985 {_DATAF(-0.31732082366943359000), _DATAF(-0.94831824302673340000)},

4986 {_DATAF(-0.31768447160720825000), _DATAF(-0.94819647073745728000)},

4987 {_DATAF(-0.31804808974266052000), _DATAF(-0.94807457923889160000)},

4988 {_DATAF(-0.31841164827346802000), _DATAF(-0.94795256853103638000)},

4989 {_DATAF(-0.31877514719963074000), _DATAF(-0.94783037900924683000)},

4990 {_DATAF(-0.31913861632347107000), _DATAF(-0.94770807027816772000)},

4991 {_DATAF(-0.31950202584266663000), _DATAF(-0.94758558273315430000)},

4992 {_DATAF(-0.31986540555953979000), _DATAF(-0.94746297597885132000)},

4993 {_DATAF(-0.32022872567176819000), _DATAF(-0.94734025001525879000)},

4994 {_DATAF(-0.32059201598167419000), _DATAF(-0.94721740484237671000)},

4995 {_DATAF(-0.32095524668693542000), _DATAF(-0.94709438085556030000)},

4996 {_DATAF(-0.32131841778755188000), _DATAF(-0.94697123765945435000)},

4997 {_DATAF(-0.32168155908584595000), _DATAF(-0.94684791564941406000)},

4998 {_DATAF(-0.32204464077949524000), _DATAF(-0.94672447443008423000)},

4999 {_DATAF(-0.32240769267082214000), _DATAF(-0.94660091400146484000)},

5000 {_DATAF(-0.32277068495750427000), _DATAF(-0.94647717475891113000)},

5001 {_DATAF(-0.32313361763954163000), _DATAF(-0.94635337591171265000)},

5002 {_DATAF(-0.32349652051925659000), _DATAF(-0.94622933864593506000)},

5003 {_DATAF(-0.32385936379432678000), _DATAF(-0.94610524177551270000)},

5004 {_DATAF(-0.32422217726707458000), _DATAF(-0.94598096609115601000)},

5005 {_DATAF(-0.32458493113517761000), _DATAF(-0.94585657119750977000)},

5006 {_DATAF(-0.32494762539863586000), _DATAF(-0.94573199748992920000)},

5007 {_DATAF(-0.32531028985977173000), _DATAF(-0.94560730457305908000)},

5008 {_DATAF(-0.32567289471626282000), _DATAF(-0.94548249244689941000)},

5009 {_DATAF(-0.32603546977043152000), _DATAF(-0.94535756111145020000)},

5010 {_DATAF(-0.32639798521995544000), _DATAF(-0.94523245096206665000)},

5011 {_DATAF(-0.32676044106483459000), _DATAF(-0.94510722160339355000)},

5012 {_DATAF(-0.32712286710739136000), _DATAF(-0.94498181343078613000)},

5013 {_DATAF(-0.32748523354530334000), _DATAF(-0.94485628604888916000)},

5014 {_DATAF(-0.32784757018089294000), _DATAF(-0.94473063945770264000)},

5015 {_DATAF(-0.32820984721183777000), _DATAF(-0.94460481405258179000)},

5016 {_DATAF(-0.32857206463813782000), _DATAF(-0.94447892904281616000)},

5017 {_DATAF(-0.32893425226211548000), _DATAF(-0.94435280561447144000)},

5018 {_DATAF(-0.32929638028144836000), _DATAF(-0.94422662258148193000)},

5019 {_DATAF(-0.32965844869613647000), _DATAF(-0.94410026073455811000)},

5020 {_DATAF(-0.33002048730850220000), _DATAF(-0.94397377967834473000)},

5021 {_DATAF(-0.33038249611854553000), _DATAF(-0.94384711980819702000)},

5022 {_DATAF(-0.33074441552162170000), _DATAF(-0.94372034072875977000)},

5023 {_DATAF(-0.33110630512237549000), _DATAF(-0.94359344244003296000)},

5024 {_DATAF(-0.33146813511848450000), _DATAF(-0.94346642494201660000)},

5025 {_DATAF(-0.33182993531227112000), _DATAF(-0.94333922863006592000)},

5026 {_DATAF(-0.33219167590141296000), _DATAF(-0.94321191310882568000)},

5027 {_DATAF(-0.33255335688591003000), _DATAF(-0.94308441877365112000)},

5028 {_DATAF(-0.33291500806808472000), _DATAF(-0.94295686483383179000)},

5029 {_DATAF(-0.33327659964561462000), _DATAF(-0.94282907247543335000)},

5030 {_DATAF(-0.33363816142082214000), _DATAF(-0.94270122051239014000)},

5031 {_DATAF(-0.33399966359138489000), _DATAF(-0.94257318973541260000)},

5032 {_DATAF(-0.33436110615730286000), _DATAF(-0.94244503974914551000)},

5033 {_DATAF(-0.33472248911857605000), _DATAF(-0.94231677055358887000)},

5034 {_DATAF(-0.33508384227752686000), _DATAF(-0.94218832254409790000)},

5035 {_DATAF(-0.33544513583183289000), _DATAF(-0.94205975532531738000)},

5036 {_DATAF(-0.33580639958381653000), _DATAF(-0.94193100929260254000)},

5037 {_DATAF(-0.33616760373115540000), _DATAF(-0.94180220365524292000)},

5038 {_DATAF(-0.33652874827384949000), _DATAF(-0.94167321920394897000)},

5039 {_DATAF(-0.33688986301422119000), _DATAF(-0.94154405593872070000)},

5040 {_DATAF(-0.33725091814994812000), _DATAF(-0.94141477346420288000)},

5041 {_DATAF(-0.33761191368103027000), _DATAF(-0.94128537178039551000)},

5042 {_DATAF(-0.33797284960746765000), _DATAF(-0.94115585088729858000)},

5043 {_DATAF(-0.33833375573158264000), _DATAF(-0.94102615118026733000)},

5044 {_DATAF(-0.33869463205337524000), _DATAF(-0.94089633226394653000)},

5045 {_DATAF(-0.33905541896820068000), _DATAF(-0.94076639413833618000)},

5046 {_DATAF(-0.33941617608070374000), _DATAF(-0.94063627719879150000)},

5047 {_DATAF(-0.33977687358856201000), _DATAF(-0.94050604104995728000)},

5048 {_DATAF(-0.34013754129409790000), _DATAF(-0.94037568569183350000)},

5049 {_DATAF(-0.34049814939498901000), _DATAF(-0.94024521112442017000)},

5050 {_DATAF(-0.34085869789123535000), _DATAF(-0.94011455774307251000)},

5051 {_DATAF(-0.34121921658515930000), _DATAF(-0.93998372554779053000)},

5052 {_DATAF(-0.34157964587211609000), _DATAF(-0.93985283374786377000)},

5053 {_DATAF(-0.34194007515907288000), _DATAF(-0.93972176313400269000)},

5054 {_DATAF(-0.34230041503906250000), _DATAF(-0.93959057331085205000)},

5055 {_DATAF(-0.34266072511672974000), _DATAF(-0.93945920467376709000)},

5056 {_DATAF(-0.34302097558975220000), _DATAF(-0.93932771682739258000)},

5057 {_DATAF(-0.34338116645812988000), _DATAF(-0.93919610977172852000)},

5058 {_DATAF(-0.34374132752418518000), _DATAF(-0.93906438350677490000)},

5059 {_DATAF(-0.34410142898559570000), _DATAF(-0.93893247842788696000)},

5060 {_DATAF(-0.34446147084236145000), _DATAF(-0.93880045413970947000)},

5061 {_DATAF(-0.34482148289680481000), _DATAF(-0.93866831064224243000)},

5062 {_DATAF(-0.34518143534660339000), _DATAF(-0.93853598833084106000)},

5063 {_DATAF(-0.34554132819175720000), _DATAF(-0.93840354681015015000)},

5064 {_DATAF(-0.34590116143226624000), _DATAF(-0.93827092647552490000)},

5065 {_DATAF(-0.34626096487045288000), _DATAF(-0.93813824653625488000)},

5066 {_DATAF(-0.34662070870399475000), _DATAF(-0.93800538778305054000)},

5067 {_DATAF(-0.34698042273521423000), _DATAF(-0.93787235021591187000)},

5068 {_DATAF(-0.34734004735946655000), _DATAF(-0.93773925304412842000)},

5069 {_DATAF(-0.34769964218139648000), _DATAF(-0.93760597705841064000)},

5070 {_DATAF(-0.34805917739868164000), _DATAF(-0.93747258186340332000)},

5071 {_DATAF(-0.34841868281364441000), _DATAF(-0.93733900785446167000)},

5072 {_DATAF(-0.34877812862396240000), _DATAF(-0.93720531463623047000)},

5073 {_DATAF(-0.34913751482963562000), _DATAF(-0.93707150220870972000)},

5074 {_DATAF(-0.34949684143066406000), _DATAF(-0.93693757057189941000)},

5075 {_DATAF(-0.34985613822937012000), _DATAF(-0.93680346012115479000)},

5076 {_DATAF(-0.35021537542343140000), _DATAF(-0.93666923046112061000)},

5077 {_DATAF(-0.35057455301284790000), _DATAF(-0.93653482198715210000)},

5078 {_DATAF(-0.35093367099761963000), _DATAF(-0.93640029430389404000)},

5079 {_DATAF(-0.35129275918006897000), _DATAF(-0.93626564741134644000)},

5080 {_DATAF(-0.35165178775787354000), _DATAF(-0.93613088130950928000)},

5081 {_DATAF(-0.35201075673103333000), _DATAF(-0.93599593639373779000)},

5082 {_DATAF(-0.35236969590187073000), _DATAF(-0.93586087226867676000)},

5083 {_DATAF(-0.35272854566574097000), _DATAF(-0.93572568893432617000)},

5084 {_DATAF(-0.35308736562728882000), _DATAF(-0.93559032678604126000)},

5085 {_DATAF(-0.35344615578651428000), _DATAF(-0.93545484542846680000)},

5086 {_DATAF(-0.35380485653877258000), _DATAF(-0.93531924486160278000)},

5087 {_DATAF(-0.35416352748870850000), _DATAF(-0.93518352508544922000)},

5088 {_DATAF(-0.35452213883399963000), _DATAF(-0.93504762649536133000)},

5089 {_DATAF(-0.35488069057464600000), _DATAF(-0.93491160869598389000)},

5090 {_DATAF(-0.35523921251296997000), _DATAF(-0.93477541208267212000)},

5091 {_DATAF(-0.35559767484664917000), _DATAF(-0.93463915586471558000)},

5092 {_DATAF(-0.35595607757568359000), _DATAF(-0.93450272083282471000)},

5093 {_DATAF(-0.35631442070007324000), _DATAF(-0.93436610698699951000)},

5094 {_DATAF(-0.35667270421981812000), _DATAF(-0.93422937393188477000)},

5095 {_DATAF(-0.35703095793724060000), _DATAF(-0.93409252166748047000)},

5096 {_DATAF(-0.35738915205001831000), _DATAF(-0.93395555019378662000)},

5097 {_DATAF(-0.35774728655815125000), _DATAF(-0.93381845951080322000)},

5098 {_DATAF(-0.35810539126396179000), _DATAF(-0.93368119001388550000)},

5099 {_DATAF(-0.35846340656280518000), _DATAF(-0.93354380130767822000)},

5100 {_DATAF(-0.35882139205932617000), _DATAF(-0.93340623378753662000)},

5101 {_DATAF(-0.35917934775352478000), _DATAF(-0.93326854705810547000)},

5102 {_DATAF(-0.35953721404075623000), _DATAF(-0.93313074111938477000)},

5103 {_DATAF(-0.35989505052566528000), _DATAF(-0.93299281597137451000)},

5104 {_DATAF(-0.36025279760360718000), _DATAF(-0.93285471200942993000)},

5105 {_DATAF(-0.36061051487922668000), _DATAF(-0.93271648883819580000)},

5106 {_DATAF(-0.36096820235252380000), _DATAF(-0.93257814645767212000)},

5107 {_DATAF(-0.36132580041885376000), _DATAF(-0.93243962526321411000)},

5108 {_DATAF(-0.36168336868286133000), _DATAF(-0.93230098485946655000)},

5109 {_DATAF(-0.36204087734222412000), _DATAF(-0.93216222524642944000)},

5110 {_DATAF(-0.36239832639694214000), _DATAF(-0.93202328681945801000)},

5111 {_DATAF(-0.36275571584701538000), _DATAF(-0.93188428878784180000)},

5112 {_DATAF(-0.36311307549476624000), _DATAF(-0.93174505233764648000)},

5113 {_DATAF(-0.36347037553787231000), _DATAF(-0.93160575628280640000)},

5114 {_DATAF(-0.36382761597633362000), _DATAF(-0.93146628141403198000)},

5115 {_DATAF(-0.36418479681015015000), _DATAF(-0.93132668733596802000)},

5116 {_DATAF(-0.36454191803932190000), _DATAF(-0.93118697404861450000)},

5117 {_DATAF(-0.36489900946617126000), _DATAF(-0.93104708194732666000)},

5118 {_DATAF(-0.36525601148605347000), _DATAF(-0.93090713024139404000)},

5119 {_DATAF(-0.36561298370361328000), _DATAF(-0.93076694011688232000)},

5120 {_DATAF(-0.36596992611885071000), _DATAF(-0.93062669038772583000)},

5121 {_DATAF(-0.36632677912712097000), _DATAF(-0.93048626184463501000)},

5122 {_DATAF(-0.36668360233306885000), _DATAF(-0.93034571409225464000)},

5123 {_DATAF(-0.36704033613204956000), _DATAF(-0.93020504713058472000)},

5124 {_DATAF(-0.36739704012870789000), _DATAF(-0.93006420135498047000)},

5125 {_DATAF(-0.36775368452072144000), _DATAF(-0.92992323637008667000)},

5126 {_DATAF(-0.36811029911041260000), _DATAF(-0.92978215217590332000)},

5127 {_DATAF(-0.36846682429313660000), _DATAF(-0.92964088916778564000)},

5128 {_DATAF(-0.36882331967353821000), _DATAF(-0.92949950695037842000)},

5129 {_DATAF(-0.36917975544929504000), _DATAF(-0.92935800552368164000)},

5130 {_DATAF(-0.36953613162040710000), _DATAF(-0.92921638488769531000)},

5131 {_DATAF(-0.36989244818687439000), _DATAF(-0.92907458543777466000)},

5132 {_DATAF(-0.37024870514869690000), _DATAF(-0.92893266677856445000)},

5133 {_DATAF(-0.37060493230819702000), _DATAF(-0.92879062891006470000)},

5134 {_DATAF(-0.37096109986305237000), _DATAF(-0.92864841222763062000)},

5135 {_DATAF(-0.37131720781326294000), _DATAF(-0.92850607633590698000)},

5136 {_DATAF(-0.37167325615882874000), _DATAF(-0.92836362123489380000)},

5137 {_DATAF(-0.37202924489974976000), _DATAF(-0.92822098731994629000)},

5138 {_DATAF(-0.37238517403602600000), _DATAF(-0.92807829380035400000)},

5139 {_DATAF(-0.37274107336997986000), _DATAF(-0.92793542146682739000)},

5140 {_DATAF(-0.37309691309928894000), _DATAF(-0.92779237031936646000)},

5141 {_DATAF(-0.37345266342163086000), _DATAF(-0.92764925956726074000)},

5142 {_DATAF(-0.37380838394165039000), _DATAF(-0.92750597000122070000)},

5143 {_DATAF(-0.37416407465934753000), _DATAF(-0.92736250162124634000)},

5144 {_DATAF(-0.37451967597007751000), _DATAF(-0.92721897363662720000)},

5145 {_DATAF(-0.37487521767616272000), _DATAF(-0.92707526683807373000)},

5146 {_DATAF(-0.37523072957992554000), _DATAF(-0.92693144083023071000)},

5147 {_DATAF(-0.37558618187904358000), _DATAF(-0.92678749561309814000)},

5148 {_DATAF(-0.37594157457351685000), _DATAF(-0.92664337158203125000)},

5149 {_DATAF(-0.37629690766334534000), _DATAF(-0.92649912834167480000)},

5150 {_DATAF(-0.37665218114852905000), _DATAF(-0.92635476589202881000)},

5151 {_DATAF(-0.37700742483139038000), _DATAF(-0.92621022462844849000)},

5152 {_DATAF(-0.37736257910728455000), _DATAF(-0.92606556415557861000)},

5153 {_DATAF(-0.37771770358085632000), _DATAF(-0.92592078447341919000)},

5154 {_DATAF(-0.37807273864746094000), _DATAF(-0.92577588558197021000)},

5155 {_DATAF(-0.37842774391174316000), _DATAF(-0.92563080787658691000)},

5156 {_DATAF(-0.37878268957138062000), _DATAF(-0.92548561096191406000)},

5157 {_DATAF(-0.37913760542869568000), _DATAF(-0.92534029483795166000)},

5158 {_DATAF(-0.37949243187904358000), _DATAF(-0.92519485950469971000)},

5159 {_DATAF(-0.37984719872474670000), _DATAF(-0.92504924535751343000)},

5160 {_DATAF(-0.38020193576812744000), _DATAF(-0.92490351200103760000)},

5161 {_DATAF(-0.38055661320686340000), _DATAF(-0.92475759983062744000)},

5162 {_DATAF(-0.38091120123863220000), _DATAF(-0.92461162805557251000)},

5163 {_DATAF(-0.38126575946807861000), _DATAF(-0.92446547746658325000)},

5164 {_DATAF(-0.38162025809288025000), _DATAF(-0.92431920766830444000)},

5165 {_DATAF(-0.38197472691535950000), _DATAF(-0.92417275905609131000)},

5166 {_DATAF(-0.38232910633087158000), _DATAF(-0.92402625083923340000)},

5167 {_DATAF(-0.38268342614173889000), _DATAF(-0.92387950420379639000)},

5168 {_DATAF(-0.38303771615028381000), _DATAF(-0.92373269796371460000)},

5169 {_DATAF(-0.38339191675186157000), _DATAF(-0.92358577251434326000)},

5170 {_DATAF(-0.38374608755111694000), _DATAF(-0.92343866825103760000)},

5171 {_DATAF(-0.38410019874572754000), _DATAF(-0.92329144477844238000)},

5172 {_DATAF(-0.38445425033569336000), _DATAF(-0.92314404249191284000)},

5173 {_DATAF(-0.38480824232101440000), _DATAF(-0.92299652099609375000)},

5174 {_DATAF(-0.38516217470169067000), _DATAF(-0.92284888029098511000)},

5175 {_DATAF(-0.38551604747772217000), _DATAF(-0.92270112037658691000)},

5176 {_DATAF(-0.38586989045143127000), _DATAF(-0.92255324125289917000)},

5177 {_DATAF(-0.38622364401817322000), _DATAF(-0.92240518331527710000)},

5178 {_DATAF(-0.38657733798027039000), _DATAF(-0.92225700616836548000)},

5179 {_DATAF(-0.38693100214004517000), _DATAF(-0.92210865020751953000)},

5180 {_DATAF(-0.38728460669517517000), _DATAF(-0.92196023464202881000)},

5181 {_DATAF(-0.38763815164566040000), _DATAF(-0.92181164026260376000)},

5182 {_DATAF(-0.38799160718917847000), _DATAF(-0.92166292667388916000)},

5183 {_DATAF(-0.38834503293037415000), _DATAF(-0.92151403427124023000)},

5184 {_DATAF(-0.38869842886924744000), _DATAF(-0.92136502265930176000)},

5185 {_DATAF(-0.38905173540115356000), _DATAF(-0.92121589183807373000)},

5186 {_DATAF(-0.38940498232841492000), _DATAF(-0.92106664180755615000)},

5187 {_DATAF(-0.38975816965103149000), _DATAF(-0.92091721296310425000)},

5188 {_DATAF(-0.39011132717132568000), _DATAF(-0.92076772451400757000)},

5189 {_DATAF(-0.39046439528465271000), _DATAF(-0.92061805725097656000)},

5190 {_DATAF(-0.39081740379333496000), _DATAF(-0.92046821117401123000)},

5191 {_DATAF(-0.39117038249969482000), _DATAF(-0.92031830549240112000)},

5192 {_DATAF(-0.39152330160140991000), _DATAF(-0.92016822099685669000)},

5193 {_DATAF(-0.39187613129615784000), _DATAF(-0.92001795768737793000)},

5194 {_DATAF(-0.39222893118858337000), _DATAF(-0.91986763477325439000)},

5195 {_DATAF(-0.39258167147636414000), _DATAF(-0.91971713304519653000)},

5196 {_DATAF(-0.39293435215950012000), _DATAF(-0.91956651210784912000)},

5197 {_DATAF(-0.39328697323799133000), _DATAF(-0.91941577196121216000)},

5198 {_DATAF(-0.39363953471183777000), _DATAF(-0.91926485300064087000)},

5199 {_DATAF(-0.39399203658103943000), _DATAF(-0.91911387443542480000)},

5200 {_DATAF(-0.39434447884559631000), _DATAF(-0.91896271705627441000)},

5201 {_DATAF(-0.39469686150550842000), _DATAF(-0.91881138086318970000)},

5202 {_DATAF(-0.39504921436309814000), _DATAF(-0.91865998506546021000)},

5203 {_DATAF(-0.39540147781372070000), _DATAF(-0.91850841045379639000)},

5204 {_DATAF(-0.39575368165969849000), _DATAF(-0.91835671663284302000)},

5205 {_DATAF(-0.39610585570335388000), _DATAF(-0.91820484399795532000)},

5206 {_DATAF(-0.39645794034004211000), _DATAF(-0.91805291175842285000)},

5207 {_DATAF(-0.39680999517440796000), _DATAF(-0.91790080070495605000)},

5208 {_DATAF(-0.39716196060180664000), _DATAF(-0.91774851083755493000)},

5209 {_DATAF(-0.39751389622688293000), _DATAF(-0.91759616136550903000)},

5210 {_DATAF(-0.39786574244499207000), _DATAF(-0.91744363307952881000)},

5211 {_DATAF(-0.39821755886077881000), _DATAF(-0.91729098558425903000)},

5212 {_DATAF(-0.39856931567192078000), _DATAF(-0.91713821887969971000)},

5213 {_DATAF(-0.39892101287841797000), _DATAF(-0.91698527336120605000)},

5214 {_DATAF(-0.39927262067794800000), _DATAF(-0.91683226823806763000)},

5215 {_DATAF(-0.39962419867515564000), _DATAF(-0.91667908430099487000)},

5216 {_DATAF(-0.39997571706771851000), _DATAF(-0.91652572154998779000)},

5217 {_DATAF(-0.40032717585563660000), _DATAF(-0.91637229919433594000)},

5218 {_DATAF(-0.40067857503890991000), _DATAF(-0.91621869802474976000)},

5219 {_DATAF(-0.40102988481521606000), _DATAF(-0.91606497764587402000)},

5220 {_DATAF(-0.40138116478919983000), _DATAF(-0.91591107845306396000)},

5221 {_DATAF(-0.40173238515853882000), _DATAF(-0.91575711965560913000)},

5222 {_DATAF(-0.40208354592323303000), _DATAF(-0.91560298204421997000)},

5223 {_DATAF(-0.40243464708328247000), _DATAF(-0.91544872522354126000)},

5224 {_DATAF(-0.40278568863868713000), _DATAF(-0.91529428958892822000)},

5225 {_DATAF(-0.40313667058944702000), _DATAF(-0.91513979434967041000)},

5226 {_DATAF(-0.40348759293556213000), _DATAF(-0.91498512029647827000)},

5227 {_DATAF(-0.40383845567703247000), _DATAF(-0.91483032703399658000)},

5228 {_DATAF(-0.40418925881385803000), _DATAF(-0.91467535495758057000)},

5229 {_DATAF(-0.40454000234603882000), _DATAF(-0.91452032327651978000)},

5230 {_DATAF(-0.40489068627357483000), _DATAF(-0.91436511278152466000)},

5231 {_DATAF(-0.40524131059646606000), _DATAF(-0.91420978307723999000)},

5232 {_DATAF(-0.40559187531471252000), _DATAF(-0.91405427455902100000)},

5233 {_DATAF(-0.40594238042831421000), _DATAF(-0.91389864683151245000)},

5234 {_DATAF(-0.40629282593727112000), _DATAF(-0.91374289989471436000)},

5235 {_DATAF(-0.40664321184158325000), _DATAF(-0.91358703374862671000)},

5236 {_DATAF(-0.40699353814125061000), _DATAF(-0.91343104839324951000)},

5237 {_DATAF(-0.40734380483627319000), _DATAF(-0.91327488422393799000)},

5238 {_DATAF(-0.40769401192665100000), _DATAF(-0.91311860084533691000)},

5239 {_DATAF(-0.40804415941238403000), _DATAF(-0.91296219825744629000)},

5240 {_DATAF(-0.40839424729347229000), _DATAF(-0.91280561685562134000)},

5241 {_DATAF(-0.40874427556991577000), _DATAF(-0.91264897584915161000)},

5242 {_DATAF(-0.40909424424171448000), _DATAF(-0.91249215602874756000)},

5243 {_DATAF(-0.40944415330886841000), _DATAF(-0.91233515739440918000)},

5244 {_DATAF(-0.40979400277137756000), _DATAF(-0.91217809915542603000)},

5245 {_DATAF(-0.41014379262924194000), _DATAF(-0.91202086210250854000)},

5246 {_DATAF(-0.41049349308013916000), _DATAF(-0.91186350584030151000)},

5247 {_DATAF(-0.41084316372871399000), _DATAF(-0.91170603036880493000)},

5248 {_DATAF(-0.41119277477264404000), _DATAF(-0.91154843568801880000)},

5249 {_DATAF(-0.41154232621192932000), _DATAF(-0.91139066219329834000)},

5250 {_DATAF(-0.41189181804656982000), _DATAF(-0.91123276948928833000)},

5251 {_DATAF(-0.41224122047424316000), _DATAF(-0.91107475757598877000)},

5252 {_DATAF(-0.41259059309959412000), _DATAF(-0.91091656684875488000)},

5253 {_DATAF(-0.41293987631797791000), _DATAF(-0.91075825691223145000)},

5254 {_DATAF(-0.41328912973403931000), _DATAF(-0.91059982776641846000)},

5255 {_DATAF(-0.41363832354545593000), _DATAF(-0.91044127941131592000)},

5256 {_DATAF(-0.41398742794990540000), _DATAF(-0.91028261184692383000)},

5257 {_DATAF(-0.41433650255203247000), _DATAF(-0.91012376546859741000)},

5258 {_DATAF(-0.41468548774719238000), _DATAF(-0.90996479988098145000)},

5259 {_DATAF(-0.41503441333770752000), _DATAF(-0.90980571508407593000)},

5260 {_DATAF(-0.41538330912590027000), _DATAF(-0.90964645147323608000)},

5261 {_DATAF(-0.41573211550712585000), _DATAF(-0.90948712825775146000)},

5262 {_DATAF(-0.41608086228370667000), _DATAF(-0.90932762622833252000)},

5263 {_DATAF(-0.41642954945564270000), _DATAF(-0.90916800498962402000)},

5264 {_DATAF(-0.41677817702293396000), _DATAF(-0.90900820493698120000)},

5265 {_DATAF(-0.41712677478790283000), _DATAF(-0.90884834527969360000)},

5266 {_DATAF(-0.41747528314590454000), _DATAF(-0.90868830680847168000)},

5267 {_DATAF(-0.41782370209693909000), _DATAF(-0.90852808952331543000)},

5268 {_DATAF(-0.41817209124565125000), _DATAF(-0.90836781263351440000)},

5269 {_DATAF(-0.41852042078971863000), _DATAF(-0.90820735692977905000)},

5270 {_DATAF(-0.41886869072914124000), _DATAF(-0.90804684162139893000)},

5271 {_DATAF(-0.41921690106391907000), _DATAF(-0.90788608789443970000)},

5272 {_DATAF(-0.41956502199172974000), _DATAF(-0.90772527456283569000)},

5273 {_DATAF(-0.41991311311721802000), _DATAF(-0.90756434202194214000)},

5274 {_DATAF(-0.42026111483573914000), _DATAF(-0.90740323066711426000)},

5275 {_DATAF(-0.42060908675193787000), _DATAF(-0.90724200010299683000)},

5276 {_DATAF(-0.42095696926116943000), _DATAF(-0.90708059072494507000)},

5277 {_DATAF(-0.42130479216575623000), _DATAF(-0.90691912174224854000)},

5278 {_DATAF(-0.42165255546569824000), _DATAF(-0.90675747394561768000)},

5279 {_DATAF(-0.42200025916099548000), _DATAF(-0.90659570693969727000)},

5280 {_DATAF(-0.42234790325164795000), _DATAF(-0.90643382072448730000)},

5281 {_DATAF(-0.42269548773765564000), _DATAF(-0.90627175569534302000)},

5282 {_DATAF(-0.42304301261901855000), _DATAF(-0.90610957145690918000)},

5283 {_DATAF(-0.42339047789573669000), _DATAF(-0.90594726800918579000)},

5284 {_DATAF(-0.42373788356781006000), _DATAF(-0.90578484535217285000)},

5285 {_DATAF(-0.42408519983291626000), _DATAF(-0.90562230348587036000)},

5286 {_DATAF(-0.42443248629570007000), _DATAF(-0.90545958280563354000)},

5287 {_DATAF(-0.42477968335151672000), _DATAF(-0.90529674291610718000)},

5288 {_DATAF(-0.42512682080268860000), _DATAF(-0.90513378381729126000)},

5289 {_DATAF(-0.42547389864921570000), _DATAF(-0.90497070550918579000)},

5290 {_DATAF(-0.42582091689109802000), _DATAF(-0.90480744838714600000)},

5291 {_DATAF(-0.42616787552833557000), _DATAF(-0.90464407205581665000)},

5292 {_DATAF(-0.42651477456092834000), _DATAF(-0.90448057651519775000)},

5293 {_DATAF(-0.42686161398887634000), _DATAF(-0.90431696176528931000)},

5294 {_DATAF(-0.42720839381217957000), _DATAF(-0.90415316820144653000)},

5295 {_DATAF(-0.42755508422851563000), _DATAF(-0.90398931503295898000)},

5296 {_DATAF(-0.42790174484252930000), _DATAF(-0.90382528305053711000)},

5297 {_DATAF(-0.42824831604957581000), _DATAF(-0.90366107225418091000)},

5298 {_DATAF(-0.42859482765197754000), _DATAF(-0.90349680185317993000)},

5299 {_DATAF(-0.42894127964973450000), _DATAF(-0.90333235263824463000)},

5300 {_DATAF(-0.42928767204284668000), _DATAF(-0.90316778421401978000)},

5301 {_DATAF(-0.42963400483131409000), _DATAF(-0.90300309658050537000)},

5302 {_DATAF(-0.42998027801513672000), _DATAF(-0.90283828973770142000)},

5303 {_DATAF(-0.43032649159431458000), _DATAF(-0.90267330408096313000)},

5304 {_DATAF(-0.43067261576652527000), _DATAF(-0.90250819921493530000)},

5305 {_DATAF(-0.43101871013641357000), _DATAF(-0.90234297513961792000)},

5306 {_DATAF(-0.43136471509933472000), _DATAF(-0.90217763185501099000)},

5307 {_DATAF(-0.43171066045761108000), _DATAF(-0.90201216936111450000)},

5308 {_DATAF(-0.43205654621124268000), _DATAF(-0.90184652805328369000)},

5309 {_DATAF(-0.43240237236022949000), _DATAF(-0.90168076753616333000)},

5310 {_DATAF(-0.43274813890457153000), _DATAF(-0.90151488780975342000)},

5311 {_DATAF(-0.43309381604194641000), _DATAF(-0.90134882926940918000)},

5312 {_DATAF(-0.43343946337699890000), _DATAF(-0.90118271112442017000)},

5313 {_DATAF(-0.43378502130508423000), _DATAF(-0.90101641416549683000)},

5314 {_DATAF(-0.43413051962852478000), _DATAF(-0.90084999799728394000)},

5315 {_DATAF(-0.43447595834732056000), _DATAF(-0.90068340301513672000)},

5316 {_DATAF(-0.43482133746147156000), _DATAF(-0.90051674842834473000)},

5317 {_DATAF(-0.43516665697097778000), _DATAF(-0.90034991502761841000)},

5318 {_DATAF(-0.43551188707351685000), _DATAF(-0.90018296241760254000)},

5319 {_DATAF(-0.43585708737373352000), _DATAF(-0.90001589059829712000)},

5320 {_DATAF(-0.43620219826698303000), _DATAF(-0.89984869956970215000)},

5321 {_DATAF(-0.43654724955558777000), _DATAF(-0.89968132972717285000)},

5322 {_DATAF(-0.43689224123954773000), _DATAF(-0.89951384067535400000)},

5323 {_DATAF(-0.43723717331886292000), _DATAF(-0.89934623241424561000)},

5324 {_DATAF(-0.43758204579353333000), _DATAF(-0.89917850494384766000)},

5325 {_DATAF(-0.43792682886123657000), _DATAF(-0.89901059865951538000)},

5326 {_DATAF(-0.43827158212661743000), _DATAF(-0.89884263277053833000)},

5327 {_DATAF(-0.43861624598503113000), _DATAF(-0.89867448806762695000)},

5328 {_DATAF(-0.43896085023880005000), _DATAF(-0.89850616455078125000)},

5329 {_DATAF(-0.43930539488792419000), _DATAF(-0.89833778142929077000)},

5330 {_DATAF(-0.43964985013008118000), _DATAF(-0.89816927909851074000)},

5331 {_DATAF(-0.43999427556991577000), _DATAF(-0.89800059795379639000)},

5332 {_DATAF(-0.44033861160278320000), _DATAF(-0.89783179759979248000)},

5333 {_DATAF(-0.44068288803100586000), _DATAF(-0.89766281843185425000)},

5334 {_DATAF(-0.44102710485458374000), _DATAF(-0.89749377965927124000)},

5335 {_DATAF(-0.44137126207351685000), _DATAF(-0.89732456207275391000)},

5336 {_DATAF(-0.44171535968780518000), _DATAF(-0.89715522527694702000)},

5337 {_DATAF(-0.44205936789512634000), _DATAF(-0.89698576927185059000)},

5338 {_DATAF(-0.44240334630012512000), _DATAF(-0.89681619405746460000)},

5339 {_DATAF(-0.44274723529815674000), _DATAF(-0.89664649963378906000)},

5340 {_DATAF(-0.44309106469154358000), _DATAF(-0.89647662639617920000)},

5341 {_DATAF(-0.44343480467796326000), _DATAF(-0.89630663394927979000)},

5342 {_DATAF(-0.44377851486206055000), _DATAF(-0.89613652229309082000)},

5343 {_DATAF(-0.44412213563919067000), _DATAF(-0.89596623182296753000)},

5344 {_DATAF(-0.44446569681167603000), _DATAF(-0.89579588174819946000)},

5345 {_DATAF(-0.44480919837951660000), _DATAF(-0.89562535285949707000)},

5346 {_DATAF(-0.44515264034271240000), _DATAF(-0.89545470476150513000)},

5347 {_DATAF(-0.44549602270126343000), _DATAF(-0.89528393745422363000)},

5348 {_DATAF(-0.44583931565284729000), _DATAF(-0.89511299133300781000)},

5349 {_DATAF(-0.44618254899978638000), _DATAF(-0.89494198560714722000)},

5350 {_DATAF(-0.44652572274208069000), _DATAF(-0.89477080106735229000)},

5351 {_DATAF(-0.44686883687973022000), _DATAF(-0.89459949731826782000)},

5352 {_DATAF(-0.44721189141273499000), _DATAF(-0.89442807435989380000)},

5353 {_DATAF(-0.44755485653877258000), _DATAF(-0.89425647258758545000)},

5354 {_DATAF(-0.44789776206016541000), _DATAF(-0.89408475160598755000)},

5355 {_DATAF(-0.44824060797691345000), _DATAF(-0.89391297101974487000)},

5356 {_DATAF(-0.44858339428901672000), _DATAF(-0.89374095201492310000)},

5357 {_DATAF(-0.44892609119415283000), _DATAF(-0.89356887340545654000)},

5358 {_DATAF(-0.44926875829696655000), _DATAF(-0.89339667558670044000)},

5359 {_DATAF(-0.44961133599281311000), _DATAF(-0.89322429895401001000)},

5360 {_DATAF(-0.44995385408401489000), _DATAF(-0.89305180311203003000)},

5361 {_DATAF(-0.45029628276824951000), _DATAF(-0.89287918806076050000)},

5362 {_DATAF(-0.45063868165016174000), _DATAF(-0.89270645380020142000)},

5363 {_DATAF(-0.45098099112510681000), _DATAF(-0.89253354072570801000)},

5364 {_DATAF(-0.45132324099540710000), _DATAF(-0.89236056804656982000)},

5365 {_DATAF(-0.45166543126106262000), _DATAF(-0.89218741655349731000)},

5366 {_DATAF(-0.45200753211975098000), _DATAF(-0.89201414585113525000)},

5367 {_DATAF(-0.45234957337379456000), _DATAF(-0.89184069633483887000)},

5368 {_DATAF(-0.45269158482551575000), _DATAF(-0.89166718721389771000)},

5369 {_DATAF(-0.45303347706794739000), _DATAF(-0.89149349927902222000)},

5370 {_DATAF(-0.45337533950805664000), _DATAF(-0.89131969213485718000)},

5371 {_DATAF(-0.45371711254119873000), _DATAF(-0.89114576578140259000)},

5372 {_DATAF(-0.45405882596969604000), _DATAF(-0.89097172021865845000)},

5373 {_DATAF(-0.45440047979354858000), _DATAF(-0.89079749584197998000)},

5374 {_DATAF(-0.45474207401275635000), _DATAF(-0.89062315225601196000)},

5375 {_DATAF(-0.45508357882499695000), _DATAF(-0.89044874906539917000)},

5376 {_DATAF(-0.45542502403259277000), _DATAF(-0.89027410745620728000)},

5377 {_DATAF(-0.45576640963554382000), _DATAF(-0.89009940624237061000)},

5378 {_DATAF(-0.45610773563385010000), _DATAF(-0.88992458581924438000)},

5379 {_DATAF(-0.45644897222518921000), _DATAF(-0.88974958658218384000)},

5380 {_DATAF(-0.45679014921188354000), _DATAF(-0.88957446813583374000)},

5381 {_DATAF(-0.45713126659393311000), _DATAF(-0.88939923048019409000)},

5382 {_DATAF(-0.45747232437133789000), _DATAF(-0.88922387361526489000)},

5383 {_DATAF(-0.45781329274177551000), _DATAF(-0.88904833793640137000)},

5384 {_DATAF(-0.45815420150756836000), _DATAF(-0.88887274265289307000)},

5385 {_DATAF(-0.45849505066871643000), _DATAF(-0.88869696855545044000)},

5386 {_DATAF(-0.45883584022521973000), _DATAF(-0.88852107524871826000)},

5387 {_DATAF(-0.45917654037475586000), _DATAF(-0.88834506273269653000)},

5388 {_DATAF(-0.45951718091964722000), _DATAF(-0.88816887140274048000)},

5389 {_DATAF(-0.45985776185989380000), _DATAF(-0.88799256086349487000)},

5390 {_DATAF(-0.46019828319549561000), _DATAF(-0.88781619071960449000)},

5391 {_DATAF(-0.46053871512413025000), _DATAF(-0.88763964176177979000)},

5392 {_DATAF(-0.46087908744812012000), _DATAF(-0.88746291399002075000)},

5393 {_DATAF(-0.46121940016746521000), _DATAF(-0.88728612661361694000)},

5394 {_DATAF(-0.46155962347984314000), _DATAF(-0.88710916042327881000)},

5395 {_DATAF(-0.46189978718757629000), _DATAF(-0.88693213462829590000)},

5396 {_DATAF(-0.46223989129066467000), _DATAF(-0.88675493001937866000)},

5397 {_DATAF(-0.46257993578910828000), _DATAF(-0.88657760620117188000)},

5398 {_DATAF(-0.46291989088058472000), _DATAF(-0.88640010356903076000)},

5399 {_DATAF(-0.46325978636741638000), _DATAF(-0.88622254133224487000)},

5400 {_DATAF(-0.46359962224960327000), _DATAF(-0.88604480028152466000)},

5401 {_DATAF(-0.46393936872482300000), _DATAF(-0.88586694002151489000)},

5402 {_DATAF(-0.46427905559539795000), _DATAF(-0.88568896055221558000)},

5403 {_DATAF(-0.46461868286132813000), _DATAF(-0.88551086187362671000)},

5404 {_DATAF(-0.46495825052261353000), _DATAF(-0.88533258438110352000)},

5405 {_DATAF(-0.46529772877693176000), _DATAF(-0.88515424728393555000)},

5406 {_DATAF(-0.46563714742660522000), _DATAF(-0.88497573137283325000)},

5407 {_DATAF(-0.46597650647163391000), _DATAF(-0.88479709625244141000)},

5408 {_DATAF(-0.46631577610969543000), _DATAF(-0.88461834192276001000)},

5409 {_DATAF(-0.46665498614311218000), _DATAF(-0.88443946838378906000)},

5410 {_DATAF(-0.46699413657188416000), _DATAF(-0.88426041603088379000)},

5411 {_DATAF(-0.46733319759368896000), _DATAF(-0.88408124446868896000)},

5412 {_DATAF(-0.46767222881317139000), _DATAF(-0.88390195369720459000)},

5413 {_DATAF(-0.46801114082336426000), _DATAF(-0.88372254371643066000)},

5414 {_DATAF(-0.46835002303123474000), _DATAF(-0.88354301452636719000)},

5415 {_DATAF(-0.46868881583213806000), _DATAF(-0.88336336612701416000)},

5416 {_DATAF(-0.46902754902839661000), _DATAF(-0.88318353891372681000)},

5417 {_DATAF(-0.46936622262001038000), _DATAF(-0.88300359249114990000)},

5418 {_DATAF(-0.46970480680465698000), _DATAF(-0.88282352685928345000)},

5419 {_DATAF(-0.47004333138465881000), _DATAF(-0.88264334201812744000)},

5420 {_DATAF(-0.47038179636001587000), _DATAF(-0.88246303796768188000)},

5421 {_DATAF(-0.47072017192840576000), _DATAF(-0.88228255510330200000)},

5422 {_DATAF(-0.47105848789215088000), _DATAF(-0.88210195302963257000)},

5423 {_DATAF(-0.47139674425125122000), _DATAF(-0.88192129135131836000)},

5424 {_DATAF(-0.47173491120338440000), _DATAF(-0.88174045085906982000)},

5425 {_DATAF(-0.47207301855087280000), _DATAF(-0.88155943155288696000)},

5426 {_DATAF(-0.47241106629371643000), _DATAF(-0.88137835264205933000)},

5427 {_DATAF(-0.47274902462959290000), _DATAF(-0.88119709491729736000)},

5428 {_DATAF(-0.47308692336082458000), _DATAF(-0.88101577758789063000)},

5429 {_DATAF(-0.47342476248741150000), _DATAF(-0.88083428144454956000)},

5430 {_DATAF(-0.47376251220703125000), _DATAF(-0.88065266609191895000)},

5431 {_DATAF(-0.47410020232200623000), _DATAF(-0.88047087192535400000)},

5432 {_DATAF(-0.47443783283233643000), _DATAF(-0.88028901815414429000)},

5433 {_DATAF(-0.47477537393569946000), _DATAF(-0.88010698556900024000)},

5434 {_DATAF(-0.47511285543441772000), _DATAF(-0.87992483377456665000)},

5435 {_DATAF(-0.47545027732849121000), _DATAF(-0.87974262237548828000)},

5436 {_DATAF(-0.47578760981559753000), _DATAF(-0.87956017255783081000)},

5437 {_DATAF(-0.47612488269805908000), _DATAF(-0.87937766313552856000)},

5438 {_DATAF(-0.47646209597587585000), _DATAF(-0.87919503450393677000)},

5439 {_DATAF(-0.47679921984672546000), _DATAF(-0.87901222705841064000)},

5440 {_DATAF(-0.47713628411293030000), _DATAF(-0.87882930040359497000)},

5441 {_DATAF(-0.47747328877449036000), _DATAF(-0.87864625453948975000)},

5442 {_DATAF(-0.47781020402908325000), _DATAF(-0.87846308946609497000)},

5443 {_DATAF(-0.47814705967903137000), _DATAF(-0.87827980518341064000)},

5444 {_DATAF(-0.47848382592201233000), _DATAF(-0.87809634208679199000)},

5445 {_DATAF(-0.47882056236267090000), _DATAF(-0.87791281938552856000)},

5446 {_DATAF(-0.47915717959403992000), _DATAF(-0.87772911787033081000)},

5447 {_DATAF(-0.47949376702308655000), _DATAF(-0.87754529714584351000)},

5448 {_DATAF(-0.47983026504516602000), _DATAF(-0.87736135721206665000)},

5449 {_DATAF(-0.48016667366027832000), _DATAF(-0.87717723846435547000)},

5450 {_DATAF(-0.48050305247306824000), _DATAF(-0.87699306011199951000)},

5451 {_DATAF(-0.48083934187889099000), _DATAF(-0.87680870294570923000)},

5452 {_DATAF(-0.48117554187774658000), _DATAF(-0.87662428617477417000)},

5453 {_DATAF(-0.48151168227195740000), _DATAF(-0.87643969058990479000)},

5454 {_DATAF(-0.48184776306152344000), _DATAF(-0.87625491619110107000)},

5455 {_DATAF(-0.48218378424644470000), _DATAF(-0.87607008218765259000)},

5456 {_DATAF(-0.48251971602439880000), _DATAF(-0.87588512897491455000)},

5457 {_DATAF(-0.48285555839538574000), _DATAF(-0.87569999694824219000)},

5458 {_DATAF(-0.48319137096405029000), _DATAF(-0.87551474571228027000)},

5459 {_DATAF(-0.48352706432342529000), _DATAF(-0.87532937526702881000)},

5460 {_DATAF(-0.48386272788047791000), _DATAF(-0.87514388561248779000)},

5461 {_DATAF(-0.48419830203056335000), _DATAF(-0.87495827674865723000)},

5462 {_DATAF(-0.48453381657600403000), _DATAF(-0.87477254867553711000)},

5463 {_DATAF(-0.48486924171447754000), _DATAF(-0.87458664178848267000)},

5464 {_DATAF(-0.48520460724830627000), _DATAF(-0.87440061569213867000)},

5465 {_DATAF(-0.48553991317749023000), _DATAF(-0.87421452999114990000)},

5466 {_DATAF(-0.48587512969970703000), _DATAF(-0.87402826547622681000)},

5467 {_DATAF(-0.48621028661727905000), _DATAF(-0.87384182214736938000)},

5468 {_DATAF(-0.48654535412788391000), _DATAF(-0.87365531921386719000)},

5469 {_DATAF(-0.48688036203384399000), _DATAF(-0.87346869707107544000)},

5470 {_DATAF(-0.48721531033515930000), _DATAF(-0.87328189611434937000)},

5471 {_DATAF(-0.48755016922950745000), _DATAF(-0.87309497594833374000)},

5472 {_DATAF(-0.48788493871688843000), _DATAF(-0.87290793657302856000)},

5473 {_DATAF(-0.48821967840194702000), _DATAF(-0.87272077798843384000)},

5474 {_DATAF(-0.48855432868003845000), _DATAF(-0.87253350019454956000)},

5475 {_DATAF(-0.48888888955116272000), _DATAF(-0.87234604358673096000)},

5476 {_DATAF(-0.48922339081764221000), _DATAF(-0.87215852737426758000)},

5477 {_DATAF(-0.48955783247947693000), _DATAF(-0.87197083234786987000)},

5478 {_DATAF(-0.48989218473434448000), _DATAF(-0.87178301811218262000)},

5479 {_DATAF(-0.49022647738456726000), _DATAF(-0.87159508466720581000)},

5480 {_DATAF(-0.49056071043014526000), _DATAF(-0.87140703201293945000)},

5481 {_DATAF(-0.49089485406875610000), _DATAF(-0.87121886014938354000)},

5482 {_DATAF(-0.49122890830039978000), _DATAF(-0.87103050947189331000)},

5483 {_DATAF(-0.49156290292739868000), _DATAF(-0.87084203958511353000)},

5484 {_DATAF(-0.49189683794975281000), _DATAF(-0.87065351009368896000)},

5485 {_DATAF(-0.49223071336746216000), _DATAF(-0.87046480178833008000)},

5486 {_DATAF(-0.49256446957588196000), _DATAF(-0.87027597427368164000)},

5487 {_DATAF(-0.49289819598197937000), _DATAF(-0.87008696794509888000)},

5488 {_DATAF(-0.49323183298110962000), _DATAF(-0.86989790201187134000)},

5489 {_DATAF(-0.49356541037559509000), _DATAF(-0.86970865726470947000)},

5490 {_DATAF(-0.49389889836311340000), _DATAF(-0.86951935291290283000)},

5491 {_DATAF(-0.49423229694366455000), _DATAF(-0.86932986974716187000)},

5492 {_DATAF(-0.49456566572189331000), _DATAF(-0.86914026737213135000)},

5493 {_DATAF(-0.49489894509315491000), _DATAF(-0.86895054578781128000)},

5494 {_DATAF(-0.49523213505744934000), _DATAF(-0.86876070499420166000)},

5495 {_DATAF(-0.49556526541709900000), _DATAF(-0.86857068538665771000)},

5496 {_DATAF(-0.49589830636978149000), _DATAF(-0.86838060617446899000)},

5497 {_DATAF(-0.49623128771781921000), _DATAF(-0.86819034814834595000)},

5498 {_DATAF(-0.49656420946121216000), _DATAF(-0.86799997091293335000)},

5499 {_DATAF(-0.49689704179763794000), _DATAF(-0.86780947446823120000)},

5500 {_DATAF(-0.49722981452941895000), _DATAF(-0.86761885881423950000)},

5501 {_DATAF(-0.49756249785423279000), _DATAF(-0.86742812395095825000)},

5502 {_DATAF(-0.49789512157440186000), _DATAF(-0.86723726987838745000)},

5503 {_DATAF(-0.49822765588760376000), _DATAF(-0.86704623699188232000)},

5504 {_DATAF(-0.49856013059616089000), _DATAF(-0.86685508489608765000)},

5505 {_DATAF(-0.49889254570007324000), _DATAF(-0.86666387319564819000)},

5506 {_DATAF(-0.49922487139701843000), _DATAF(-0.86647248268127441000)},

5507 {_DATAF(-0.49955710768699646000), _DATAF(-0.86628097295761108000)},

5508 {_DATAF(-0.49988928437232971000), _DATAF(-0.86608928442001343000)},

5509 {_DATAF(-0.50022137165069580000), _DATAF(-0.86589753627777100000)},

5510 {_DATAF(-0.50055342912673950000), _DATAF(-0.86570566892623901000)},

5511 {_DATAF(-0.50088536739349365000), _DATAF(-0.86551362276077271000)},

5512 {_DATAF(-0.50121724605560303000), _DATAF(-0.86532145738601685000)},

5513 {_DATAF(-0.50154906511306763000), _DATAF(-0.86512917280197144000)},

5514 {_DATAF(-0.50188082456588745000), _DATAF(-0.86493676900863647000)},

5515 {_DATAF(-0.50221246480941772000), _DATAF(-0.86474424600601196000)},

5516 {_DATAF(-0.50254404544830322000), _DATAF(-0.86455160379409790000)},

5517 {_DATAF(-0.50287556648254395000), _DATAF(-0.86435878276824951000)},

5518 {_DATAF(-0.50320702791213989000), _DATAF(-0.86416590213775635000)},

5519 {_DATAF(-0.50353837013244629000), _DATAF(-0.86397284269332886000)},

5520 {_DATAF(-0.50386965274810791000), _DATAF(-0.86377966403961182000)},

5521 {_DATAF(-0.50420087575912476000), _DATAF(-0.86358636617660522000)},

5522 {_DATAF(-0.50453203916549683000), _DATAF(-0.86339294910430908000)},

5523 {_DATAF(-0.50486308336257935000), _DATAF(-0.86319941282272339000)},

5524 {_DATAF(-0.50519412755966187000), _DATAF(-0.86300575733184814000)},

5525 {_DATAF(-0.50552505254745483000), _DATAF(-0.86281192302703857000)},

5526 {_DATAF(-0.50585585832595825000), _DATAF(-0.86261802911758423000)},

5527 {_DATAF(-0.50618666410446167000), _DATAF(-0.86242395639419556000)},

5528 {_DATAF(-0.50651735067367554000), _DATAF(-0.86222976446151733000)},

5529 {_DATAF(-0.50684797763824463000), _DATAF(-0.86203545331954956000)},

5530 {_DATAF(-0.50717854499816895000), _DATAF(-0.86184102296829224000)},

5531 {_DATAF(-0.50750899314880371000), _DATAF(-0.86164647340774536000)},

5532 {_DATAF(-0.50783938169479370000), _DATAF(-0.86145174503326416000)},

5533 {_DATAF(-0.50816971063613892000), _DATAF(-0.86125695705413818000)},

5534 {_DATAF(-0.50849997997283936000), _DATAF(-0.86106199026107788000)},

5535 {_DATAF(-0.50883013010025024000), _DATAF(-0.86086696386337280000)},

5536 {_DATAF(-0.50916022062301636000), _DATAF(-0.86067175865173340000)},

5537 {_DATAF(-0.50949025154113770000), _DATAF(-0.86047643423080444000)},

5538 {_DATAF(-0.50982022285461426000), _DATAF(-0.86028099060058594000)},

5539 {_DATAF(-0.51015007495880127000), _DATAF(-0.86008536815643311000)},

5540 {_DATAF(-0.51047992706298828000), _DATAF(-0.85988968610763550000)},

5541 {_DATAF(-0.51080960035324097000), _DATAF(-0.85969388484954834000)},

5542 {_DATAF(-0.51113927364349365000), _DATAF(-0.85949790477752686000)},

5543 {_DATAF(-0.51146882772445679000), _DATAF(-0.85930180549621582000)},

5544 {_DATAF(-0.51179832220077515000), _DATAF(-0.85910558700561523000)},

5545 {_DATAF(-0.51212775707244873000), _DATAF(-0.85890924930572510000)},

5546 {_DATAF(-0.51245713233947754000), _DATAF(-0.85871279239654541000)},

5547 {_DATAF(-0.51278638839721680000), _DATAF(-0.85851621627807617000)},

5548 {_DATAF(-0.51311558485031128000), _DATAF(-0.85831952095031738000)},

5549 {_DATAF(-0.51344472169876099000), _DATAF(-0.85812264680862427000)},

5550 {_DATAF(-0.51377379894256592000), _DATAF(-0.85792571306228638000)},

5551 {_DATAF(-0.51410275697708130000), _DATAF(-0.85772860050201416000)},

5552 {_DATAF(-0.51443165540695190000), _DATAF(-0.85753136873245239000)},

5553 {_DATAF(-0.51476043462753296000), _DATAF(-0.85733401775360107000)},

5554 {_DATAF(-0.51508921384811401000), _DATAF(-0.85713654756546021000)},

5555 {_DATAF(-0.51541787385940552000), _DATAF(-0.85693895816802979000)},

5556 {_DATAF(-0.51574647426605225000), _DATAF(-0.85674124956130981000)},

5557 {_DATAF(-0.51607501506805420000), _DATAF(-0.85654342174530029000)},

5558 {_DATAF(-0.51640343666076660000), _DATAF(-0.85634541511535645000)},

5559 {_DATAF(-0.51673179864883423000), _DATAF(-0.85614734888076782000)},

5560 {_DATAF(-0.51706010103225708000), _DATAF(-0.85594910383224487000)},

5561 {_DATAF(-0.51738828420639038000), _DATAF(-0.85575073957443237000)},

5562 {_DATAF(-0.51771646738052368000), _DATAF(-0.85555225610733032000)},

5563 {_DATAF(-0.51804453134536743000), _DATAF(-0.85535365343093872000)},

5564 {_DATAF(-0.51837247610092163000), _DATAF(-0.85515493154525757000)},

5565 {_DATAF(-0.51870042085647583000), _DATAF(-0.85495609045028687000)},

5566 {_DATAF(-0.51902824640274048000), _DATAF(-0.85475707054138184000)},

5567 {_DATAF(-0.51935601234436035000), _DATAF(-0.85455799102783203000)},

5568 {_DATAF(-0.51968365907669067000), _DATAF(-0.85435873270034790000)},

5569 {_DATAF(-0.52001124620437622000), _DATAF(-0.85415941476821899000)},

5570 {_DATAF(-0.52033877372741699000), _DATAF(-0.85395991802215576000)},

5571 {_DATAF(-0.52066624164581299000), _DATAF(-0.85376030206680298000)},

5572 {_DATAF(-0.52099364995956421000), _DATAF(-0.85356056690216064000)},

5573 {_DATAF(-0.52132093906402588000), _DATAF(-0.85336071252822876000)},

5574 {_DATAF(-0.52164816856384277000), _DATAF(-0.85316073894500732000)},

5575 {_DATAF(-0.52197527885437012000), _DATAF(-0.85296058654785156000)},

5576 {_DATAF(-0.52230238914489746000), _DATAF(-0.85276037454605103000)},

5577 {_DATAF(-0.52262938022613525000), _DATAF(-0.85255998373031616000)},

5578 {_DATAF(-0.52295625209808350000), _DATAF(-0.85235953330993652000)},

5579 {_DATAF(-0.52328312397003174000), _DATAF(-0.85215890407562256000)},

5580 {_DATAF(-0.52360987663269043000), _DATAF(-0.85195815563201904000)},

5581 {_DATAF(-0.52393656969070435000), _DATAF(-0.85175728797912598000)},

5582 {_DATAF(-0.52426314353942871000), _DATAF(-0.85155630111694336000)},

5583 {_DATAF(-0.52458965778350830000), _DATAF(-0.85135519504547119000)},

5584 {_DATAF(-0.52491611242294312000), _DATAF(-0.85115396976470947000)},

5585 {_DATAF(-0.52524250745773315000), _DATAF(-0.85095256567001343000)},

5586 {_DATAF(-0.52556878328323364000), _DATAF(-0.85075110197067261000)},

5587 {_DATAF(-0.52589499950408936000), _DATAF(-0.85054945945739746000)},

5588 {_DATAF(-0.52622115612030029000), _DATAF(-0.85034775733947754000)},

5589 {_DATAF(-0.52654725313186646000), _DATAF(-0.85014587640762329000)},

5590 {_DATAF(-0.52687323093414307000), _DATAF(-0.84994387626647949000)},

5591 {_DATAF(-0.52719914913177490000), _DATAF(-0.84974175691604614000)},

5592 {_DATAF(-0.52752494812011719000), _DATAF(-0.84953951835632324000)},

5593 {_DATAF(-0.52785074710845947000), _DATAF(-0.84933716058731079000)},

5594 {_DATAF(-0.52817642688751221000), _DATAF(-0.84913468360900879000)},

5595 {_DATAF(-0.52850198745727539000), _DATAF(-0.84893202781677246000)},

5596 {_DATAF(-0.52882754802703857000), _DATAF(-0.84872931241989136000)},

5597 {_DATAF(-0.52915298938751221000), _DATAF(-0.84852647781372070000)},

5598 {_DATAF(-0.52947831153869629000), _DATAF(-0.84832346439361572000)},

5599 {_DATAF(-0.52980363368988037000), _DATAF(-0.84812033176422119000)},

5600 {_DATAF(-0.53012883663177490000), _DATAF(-0.84791707992553711000)},

5601 {_DATAF(-0.53045397996902466000), _DATAF(-0.84771376848220825000)},

5602 {_DATAF(-0.53077900409698486000), _DATAF(-0.84751027822494507000)},

5603 {_DATAF(-0.53110402822494507000), _DATAF(-0.84730660915374756000)},

5604 {_DATAF(-0.53142887353897095000), _DATAF(-0.84710288047790527000)},

5605 {_DATAF(-0.53175371885299683000), _DATAF(-0.84689903259277344000)},

5606 {_DATAF(-0.53207844495773315000), _DATAF(-0.84669506549835205000)},

5607 {_DATAF(-0.53240311145782471000), _DATAF(-0.84649091958999634000)},

5608 {_DATAF(-0.53272771835327148000), _DATAF(-0.84628671407699585000)},

5609 {_DATAF(-0.53305220603942871000), _DATAF(-0.84608232975006104000)},

5610 {_DATAF(-0.53337663412094116000), _DATAF(-0.84587788581848145000)},

5611 {_DATAF(-0.53370100259780884000), _DATAF(-0.84567326307296753000)},

5612 {_DATAF(-0.53402525186538696000), _DATAF(-0.84546852111816406000)},

5613 {_DATAF(-0.53434944152832031000), _DATAF(-0.84526365995407104000)},

5614 {_DATAF(-0.53467357158660889000), _DATAF(-0.84505867958068848000)},

5615 {_DATAF(-0.53499764204025269000), _DATAF(-0.84485357999801636000)},

5616 {_DATAF(-0.53532159328460693000), _DATAF(-0.84464836120605469000)},

5617 {_DATAF(-0.53564548492431641000), _DATAF(-0.84444296360015869000)},

5618 {_DATAF(-0.53596925735473633000), _DATAF(-0.84423750638961792000)},

5619 {_DATAF(-0.53629297018051147000), _DATAF(-0.84403187036514282000)},

5620 {_DATAF(-0.53661662340164185000), _DATAF(-0.84382617473602295000)},

5621 {_DATAF(-0.53694015741348267000), _DATAF(-0.84362030029296875000)},

5622 {_DATAF(-0.53726369142532349000), _DATAF(-0.84341436624526978000)},

5623 {_DATAF(-0.53758704662322998000), _DATAF(-0.84320825338363647000)},

5624 {_DATAF(-0.53791040182113647000), _DATAF(-0.84300202131271362000)},

5625 {_DATAF(-0.53823363780975342000), _DATAF(-0.84279567003250122000)},

5626 {_DATAF(-0.53855681419372559000), _DATAF(-0.84258919954299927000)},

5627 {_DATAF(-0.53887993097305298000), _DATAF(-0.84238260984420776000)},

5628 {_DATAF(-0.53920292854309082000), _DATAF(-0.84217590093612671000)},

5629 {_DATAF(-0.53952586650848389000), _DATAF(-0.84196901321411133000)},

5630 {_DATAF(-0.53984868526458740000), _DATAF(-0.84176206588745117000)},

5631 {_DATAF(-0.54017144441604614000), _DATAF(-0.84155499935150146000)},

5632 {_DATAF(-0.54049414396286011000), _DATAF(-0.84134775400161743000)},

5633 {_DATAF(-0.54081678390502930000), _DATAF(-0.84114044904708862000)},

5634 {_DATAF(-0.54113930463790894000), _DATAF(-0.84093296527862549000)},

5635 {_DATAF(-0.54146176576614380000), _DATAF(-0.84072536230087280000)},

5636 {_DATAF(-0.54178416728973389000), _DATAF(-0.84051764011383057000)},

5637 {_DATAF(-0.54210644960403442000), _DATAF(-0.84030985832214355000)},

5638 {_DATAF(-0.54242867231369019000), _DATAF(-0.84010189771652222000)},

5639 {_DATAF(-0.54275077581405640000), _DATAF(-0.83989381790161133000)},

5640 {_DATAF(-0.54307281970977783000), _DATAF(-0.83968561887741089000)},

5641 {_DATAF(-0.54339480400085449000), _DATAF(-0.83947724103927612000)},

5642 {_DATAF(-0.54371672868728638000), _DATAF(-0.83926880359649658000)},

5643 {_DATAF(-0.54403853416442871000), _DATAF(-0.83906024694442749000)},

5644 {_DATAF(-0.54436028003692627000), _DATAF(-0.83885151147842407000)},

5645 {_DATAF(-0.54468190670013428000), _DATAF(-0.83864271640777588000)},

5646 {_DATAF(-0.54500347375869751000), _DATAF(-0.83843380212783813000)},

5647 {_DATAF(-0.54532498121261597000), _DATAF(-0.83822470903396606000)},

5648 {_DATAF(-0.54564642906188965000), _DATAF(-0.83801549673080444000)},

5649 {_DATAF(-0.54596775770187378000), _DATAF(-0.83780622482299805000)},

5650 {_DATAF(-0.54628896713256836000), _DATAF(-0.83759677410125732000)},

5651 {_DATAF(-0.54661017656326294000), _DATAF(-0.83738720417022705000)},

5652 {_DATAF(-0.54693126678466797000), _DATAF(-0.83717751502990723000)},

5653 {_DATAF(-0.54725229740142822000), _DATAF(-0.83696770668029785000)},

5654 {_DATAF(-0.54757320880889893000), _DATAF(-0.83675777912139893000)},

5655 {_DATAF(-0.54789406061172485000), _DATAF(-0.83654773235321045000)},

5656 {_DATAF(-0.54821485280990601000), _DATAF(-0.83633756637573242000)},

5657 {_DATAF(-0.54853552579879761000), _DATAF(-0.83612728118896484000)},

5658 {_DATAF(-0.54885613918304443000), _DATAF(-0.83591681718826294000)},

5659 {_DATAF(-0.54917663335800171000), _DATAF(-0.83570629358291626000)},

5660 {_DATAF(-0.54949712753295898000), _DATAF(-0.83549559116363525000)},

5661 {_DATAF(-0.54981750249862671000), _DATAF(-0.83528482913970947000)},

5662 {_DATAF(-0.55013775825500488000), _DATAF(-0.83507388830184937000)},

5663 {_DATAF(-0.55045795440673828000), _DATAF(-0.83486288785934448000)},

5664 {_DATAF(-0.55077809095382690000), _DATAF(-0.83465170860290527000)},

5665 {_DATAF(-0.55109816789627075000), _DATAF(-0.83444041013717651000)},

5666 {_DATAF(-0.55141812562942505000), _DATAF(-0.83422905206680298000)},

5667 {_DATAF(-0.55173796415328979000), _DATAF(-0.83401751518249512000)},

5668 {_DATAF(-0.55205780267715454000), _DATAF(-0.83380585908889771000)},

5669 {_DATAF(-0.55237752199172974000), _DATAF(-0.83359408378601074000)},

5670 {_DATAF(-0.55269712209701538000), _DATAF(-0.83338218927383423000)},

5671 {_DATAF(-0.55301672220230103000), _DATAF(-0.83317017555236816000)},

5672 {_DATAF(-0.55333620309829712000), _DATAF(-0.83295804262161255000)},

5673 {_DATAF(-0.55365556478500366000), _DATAF(-0.83274579048156738000)},

5674 {_DATAF(-0.55397486686706543000), _DATAF(-0.83253335952758789000)},

5675 {_DATAF(-0.55429410934448242000), _DATAF(-0.83232086896896362000)},

5676 {_DATAF(-0.55461329221725464000), _DATAF(-0.83210825920104980000)},

5677 {_DATAF(-0.55493235588073730000), _DATAF(-0.83189547061920166000)},

5678 {_DATAF(-0.55525130033493042000), _DATAF(-0.83168262243270874000)},

5679 {_DATAF(-0.55557024478912354000), _DATAF(-0.83146959543228149000)},

5680 {_DATAF(-0.55588907003402710000), _DATAF(-0.83125650882720947000)},

5681 {_DATAF(-0.55620777606964111000), _DATAF(-0.83104324340820313000)},

5682 {_DATAF(-0.55652648210525513000), _DATAF(-0.83082985877990723000)},

5683 {_DATAF(-0.55684500932693481000), _DATAF(-0.83061641454696655000)},

5684 {_DATAF(-0.55716353654861450000), _DATAF(-0.83040279150009155000)},

5685 {_DATAF(-0.55748194456100464000), _DATAF(-0.83018904924392700000)},

5686 {_DATAF(-0.55780029296875000000), _DATAF(-0.82997518777847290000)},

5687 {_DATAF(-0.55811852216720581000), _DATAF(-0.82976120710372925000)},

5688 {_DATAF(-0.55843669176101685000), _DATAF(-0.82954710721969604000)},

5689 {_DATAF(-0.55875480175018311000), _DATAF(-0.82933294773101807000)},

5690 {_DATAF(-0.55907279253005981000), _DATAF(-0.82911854982376099000)},

5691 {_DATAF(-0.55939072370529175000), _DATAF(-0.82890409231185913000)},

5692 {_DATAF(-0.55970853567123413000), _DATAF(-0.82868951559066772000)},

5693 {_DATAF(-0.56002628803253174000), _DATAF(-0.82847481966018677000)},

5694 {_DATAF(-0.56034398078918457000), _DATAF(-0.82826000452041626000)},

5695 {_DATAF(-0.56066155433654785000), _DATAF(-0.82804507017135620000)},

5696 {_DATAF(-0.56097906827926636000), _DATAF(-0.82782995700836182000)},

5697 {_DATAF(-0.56129652261734009000), _DATAF(-0.82761478424072266000)},

5698 {_DATAF(-0.56161385774612427000), _DATAF(-0.82739949226379395000)},

5699 {_DATAF(-0.56193113327026367000), _DATAF(-0.82718402147293091000)},

5700 {_DATAF(-0.56224828958511353000), _DATAF(-0.82696849107742310000)},

5701 {_DATAF(-0.56256538629531860000), _DATAF(-0.82675278186798096000)},

5702 {_DATAF(-0.56288242340087891000), _DATAF(-0.82653701305389404000)},

5703 {_DATAF(-0.56319934129714966000), _DATAF(-0.82632106542587280000)},

5704 {_DATAF(-0.56351619958877563000), _DATAF(-0.82610499858856201000)},

5705 {_DATAF(-0.56383293867111206000), _DATAF(-0.82588887214660645000)},

5706 {_DATAF(-0.56414961814880371000), _DATAF(-0.82567256689071655000)},

5707 {_DATAF(-0.56446623802185059000), _DATAF(-0.82545614242553711000)},

5708 {_DATAF(-0.56478273868560791000), _DATAF(-0.82523959875106812000)},

5709 {_DATAF(-0.56509917974472046000), _DATAF(-0.82502299547195435000)},

5710 {_DATAF(-0.56541556119918823000), _DATAF(-0.82480621337890625000)},

5711 {_DATAF(-0.56573182344436646000), _DATAF(-0.82458931207656860000)},

5712 {_DATAF(-0.56604796648025513000), _DATAF(-0.82437229156494141000)},

5713 {_DATAF(-0.56636410951614380000), _DATAF(-0.82415515184402466000)},

5714 {_DATAF(-0.56668013334274292000), _DATAF(-0.82393789291381836000)},

5715 {_DATAF(-0.56699603796005249000), _DATAF(-0.82372051477432251000)},

5716 {_DATAF(-0.56731188297271729000), _DATAF(-0.82350301742553711000)},

5717 {_DATAF(-0.56762766838073730000), _DATAF(-0.82328540086746216000)},

5718 {_DATAF(-0.56794333457946777000), _DATAF(-0.82306766510009766000)},

5719 {_DATAF(-0.56825894117355347000), _DATAF(-0.82284981012344360000)},

5720 {_DATAF(-0.56857448816299438000), _DATAF(-0.82263177633285522000)},

5721 {_DATAF(-0.56888991594314575000), _DATAF(-0.82241368293762207000)},

5722 {_DATAF(-0.56920522451400757000), _DATAF(-0.82219547033309937000)},

5723 {_DATAF(-0.56952053308486938000), _DATAF(-0.82197713851928711000)},

5724 {_DATAF(-0.56983572244644165000), _DATAF(-0.82175862789154053000)},

5725 {_DATAF(-0.57015079259872437000), _DATAF(-0.82154005765914917000)},

5726 {_DATAF(-0.57046580314636230000), _DATAF(-0.82132136821746826000)},

5727 {_DATAF(-0.57078075408935547000), _DATAF(-0.82110249996185303000)},

5728 {_DATAF(-0.57109558582305908000), _DATAF(-0.82088357210159302000)},

5729 {_DATAF(-0.57141035795211792000), _DATAF(-0.82066446542739868000)},

5730 {_DATAF(-0.57172501087188721000), _DATAF(-0.82044529914855957000)},

5731 {_DATAF(-0.57203960418701172000), _DATAF(-0.82022595405578613000)},

5732 {_DATAF(-0.57235413789749146000), _DATAF(-0.82000654935836792000)},

5733 {_DATAF(-0.57266855239868164000), _DATAF(-0.81978696584701538000)},

5734 {_DATAF(-0.57298290729522705000), _DATAF(-0.81956732273101807000)},

5735 {_DATAF(-0.57329714298248291000), _DATAF(-0.81934750080108643000)},

5736 {_DATAF(-0.57361131906509399000), _DATAF(-0.81912761926651001000)},

5737 {_DATAF(-0.57392543554306030000), _DATAF(-0.81890755891799927000)},

5738 {_DATAF(-0.57423943281173706000), _DATAF(-0.81868737936019897000)},

5739 {_DATAF(-0.57455337047576904000), _DATAF(-0.81846714019775391000)},

5740 {_DATAF(-0.57486718893051147000), _DATAF(-0.81824672222137451000)},

5741 {_DATAF(-0.57518094778060913000), _DATAF(-0.81802618503570557000)},

5742 {_DATAF(-0.57549458742141724000), _DATAF(-0.81780558824539185000)},

5743 {_DATAF(-0.57580816745758057000), _DATAF(-0.81758481264114380000)},

5744 {_DATAF(-0.57612168788909912000), _DATAF(-0.81736391782760620000)},

5745 {_DATAF(-0.57643508911132813000), _DATAF(-0.81714290380477905000)},

5746 {_DATAF(-0.57674843072891235000), _DATAF(-0.81692183017730713000)},

5747 {_DATAF(-0.57706165313720703000), _DATAF(-0.81670057773590088000)},

5748 {_DATAF(-0.57737481594085693000), _DATAF(-0.81647920608520508000)},

5749 {_DATAF(-0.57768791913986206000), _DATAF(-0.81625771522521973000)},

5750 {_DATAF(-0.57800090312957764000), _DATAF(-0.81603610515594482000)},

5751 {_DATAF(-0.57831376791000366000), _DATAF(-0.81581443548202515000)},

5752 {_DATAF(-0.57862663269042969000), _DATAF(-0.81559258699417114000)},

5753 {_DATAF(-0.57893931865692139000), _DATAF(-0.81537061929702759000)},

5754 {_DATAF(-0.57925200462341309000), _DATAF(-0.81514853239059448000)},

5755 {_DATAF(-0.57956457138061523000), _DATAF(-0.81492632627487183000)},

5756 {_DATAF(-0.57987701892852783000), _DATAF(-0.81470400094985962000)},

5757 {_DATAF(-0.58018940687179565000), _DATAF(-0.81448155641555786000)},

5758 {_DATAF(-0.58050173521041870000), _DATAF(-0.81425899267196655000)},

5759 {_DATAF(-0.58081394433975220000), _DATAF(-0.81403630971908569000)},

5760 {_DATAF(-0.58112609386444092000), _DATAF(-0.81381350755691528000)},

5761 {_DATAF(-0.58143812417984009000), _DATAF(-0.81359058618545532000)},

5762 {_DATAF(-0.58175009489059448000), _DATAF(-0.81336754560470581000)},

5763 {_DATAF(-0.58206200599670410000), _DATAF(-0.81314438581466675000)},

5764 {_DATAF(-0.58237379789352417000), _DATAF(-0.81292116641998291000)},

5765 {_DATAF(-0.58268547058105469000), _DATAF(-0.81269776821136475000)},

5766 {_DATAF(-0.58299714326858521000), _DATAF(-0.81247425079345703000)},

5767 {_DATAF(-0.58330863714218140000), _DATAF(-0.81225061416625977000)},

5768 {_DATAF(-0.58362013101577759000), _DATAF(-0.81202685832977295000)},

5769 {_DATAF(-0.58393144607543945000), _DATAF(-0.81180298328399658000)},

5770 {_DATAF(-0.58424276113510132000), _DATAF(-0.81157898902893066000)},

5771 {_DATAF(-0.58455395698547363000), _DATAF(-0.81135487556457520000)},

5772 {_DATAF(-0.58486503362655640000), _DATAF(-0.81113064289093018000)},

5773 {_DATAF(-0.58517605066299438000), _DATAF(-0.81090623140335083000)},

5774 {_DATAF(-0.58548700809478760000), _DATAF(-0.81068176031112671000)},

5775 {_DATAF(-0.58579784631729126000), _DATAF(-0.81045717000961304000)},

5776 {_DATAF(-0.58610862493515015000), _DATAF(-0.81023246049880981000)},

5777 {_DATAF(-0.58641928434371948000), _DATAF(-0.81000763177871704000)},

5778 {_DATAF(-0.58672988414764404000), _DATAF(-0.80978268384933472000)},

5779 {_DATAF(-0.58704036474227905000), _DATAF(-0.80955761671066284000)},

5780 {_DATAF(-0.58735078573226929000), _DATAF(-0.80933243036270142000)},

5781 {_DATAF(-0.58766114711761475000), _DATAF(-0.80910712480545044000)},

5782 {_DATAF(-0.58797138929367065000), _DATAF(-0.80888170003890991000)},

5783 {_DATAF(-0.58828157186508179000), _DATAF(-0.80865615606307983000)},

5784 {_DATAF(-0.58859163522720337000), _DATAF(-0.80843049287796021000)},

5785 {_DATAF(-0.58890157938003540000), _DATAF(-0.80820471048355103000)},

5786 {_DATAF(-0.58921152353286743000), _DATAF(-0.80797880887985229000)},

5787 {_DATAF(-0.58952128887176514000), _DATAF(-0.80775284767150879000)},

5788 {_DATAF(-0.58983105421066284000), _DATAF(-0.80752670764923096000)},

5789 {_DATAF(-0.59014070034027100000), _DATAF(-0.80730044841766357000)},

5790 {_DATAF(-0.59045022726058960000), _DATAF(-0.80707406997680664000)},

5791 {_DATAF(-0.59075969457626343000), _DATAF(-0.80684757232666016000)},

5792 {_DATAF(-0.59106910228729248000), _DATAF(-0.80662095546722412000)},

5793 {_DATAF(-0.59137839078903198000), _DATAF(-0.80639421939849854000)},

5794 {_DATAF(-0.59168756008148193000), _DATAF(-0.80616736412048340000)},

5795 {_DATAF(-0.59199666976928711000), _DATAF(-0.80594038963317871000)},

5796 {_DATAF(-0.59230571985244751000), _DATAF(-0.80571329593658447000)},

5797 {_DATAF(-0.59261465072631836000), _DATAF(-0.80548608303070068000)},

5798 {_DATAF(-0.59292352199554443000), _DATAF(-0.80525875091552734000)},

5799 {_DATAF(-0.59323227405548096000), _DATAF(-0.80503135919570923000)},

5800 {_DATAF(-0.59354096651077271000), _DATAF(-0.80480378866195679000)},

5801 {_DATAF(-0.59384959936141968000), _DATAF(-0.80457609891891479000)},

5802 {_DATAF(-0.59415805339813232000), _DATAF(-0.80434828996658325000)},

5803 {_DATAF(-0.59446650743484497000), _DATAF(-0.80412036180496216000)},

5804 {_DATAF(-0.59477484226226807000), _DATAF(-0.80389231443405151000)},

5805 {_DATAF(-0.59508305788040161000), _DATAF(-0.80366420745849609000)},

5806 {_DATAF(-0.59539121389389038000), _DATAF(-0.80343592166900635000)},

5807 {_DATAF(-0.59569931030273438000), _DATAF(-0.80320751667022705000)},

5808 {_DATAF(-0.59600728750228882000), _DATAF(-0.80297905206680298000)},

5809 {_DATAF(-0.59631520509719849000), _DATAF(-0.80275040864944458000)},

5810 {_DATAF(-0.59662300348281860000), _DATAF(-0.80252164602279663000)},

5811 {_DATAF(-0.59693068265914917000), _DATAF(-0.80229282379150391000)},

5812 {_DATAF(-0.59723836183547974000), _DATAF(-0.80206382274627686000)},

5813 {_DATAF(-0.59754586219787598000), _DATAF(-0.80183470249176025000)},

5814 {_DATAF(-0.59785336256027222000), _DATAF(-0.80160552263259888000)},

5815 {_DATAF(-0.59816068410873413000), _DATAF(-0.80137616395950317000)},

5816 {_DATAF(-0.59846800565719604000), _DATAF(-0.80114674568176270000)},

5817 {_DATAF(-0.59877520799636841000), _DATAF(-0.80091714859008789000)},

5818 {_DATAF(-0.59908229112625122000), _DATAF(-0.80068749189376831000)},

5819 {_DATAF(-0.59938931465148926000), _DATAF(-0.80045765638351440000)},

5820 {_DATAF(-0.59969621896743774000), _DATAF(-0.80022776126861572000)},

5821 {_DATAF(-0.60000306367874146000), _DATAF(-0.79999768733978271000)},

5822 {_DATAF(-0.60030978918075562000), _DATAF(-0.79976755380630493000)},

5823 {_DATAF(-0.60061645507812500000), _DATAF(-0.79953724145889282000)},

5824 {_DATAF(-0.60092306137084961000), _DATAF(-0.79930686950683594000)},

5825 {_DATAF(-0.60122954845428467000), _DATAF(-0.79907637834548950000)},

5826 {_DATAF(-0.60153591632843018000), _DATAF(-0.79884576797485352000)},

5827 {_DATAF(-0.60184222459793091000), _DATAF(-0.79861497879028320000)},

5828 {_DATAF(-0.60214847326278687000), _DATAF(-0.79838413000106812000)},

5829 {_DATAF(-0.60245460271835327000), _DATAF(-0.79815316200256348000)},

5830 {_DATAF(-0.60276067256927490000), _DATAF(-0.79792207479476929000)},

5831 {_DATAF(-0.60306662321090698000), _DATAF(-0.79769086837768555000)},

5832 {_DATAF(-0.60337245464324951000), _DATAF(-0.79745948314666748000)},

5833 {_DATAF(-0.60367822647094727000), _DATAF(-0.79722803831100464000)},

5834 {_DATAF(-0.60398393869400024000), _DATAF(-0.79699647426605225000)},

5835 {_DATAF(-0.60428953170776367000), _DATAF(-0.79676479101181030000)},

5836 {_DATAF(-0.60459506511688232000), _DATAF(-0.79653298854827881000)},

5837 {_DATAF(-0.60490047931671143000), _DATAF(-0.79630106687545776000)},

5838 {_DATAF(-0.60520577430725098000), _DATAF(-0.79606908559799194000)},

5839 {_DATAF(-0.60551106929779053000), _DATAF(-0.79583692550659180000)},

5840 {_DATAF(-0.60581618547439575000), _DATAF(-0.79560464620590210000)},

5841 {_DATAF(-0.60612124204635620000), _DATAF(-0.79537224769592285000)},

5842 {_DATAF(-0.60642623901367188000), _DATAF(-0.79513972997665405000)},

5843 {_DATAF(-0.60673111677169800000), _DATAF(-0.79490715265274048000)},

5844 {_DATAF(-0.60703593492507935000), _DATAF(-0.79467439651489258000)},

5845 {_DATAF(-0.60734063386917114000), _DATAF(-0.79444152116775513000)},

5846 {_DATAF(-0.60764527320861816000), _DATAF(-0.79420858621597290000)},

5847 {_DATAF(-0.60794979333877563000), _DATAF(-0.79397547245025635000)},

5848 {_DATAF(-0.60825425386428833000), _DATAF(-0.79374229907989502000)},

5849 {_DATAF(-0.60855859518051147000), _DATAF(-0.79350894689559937000)},

5850 {_DATAF(-0.60886281728744507000), _DATAF(-0.79327553510665894000)},

5851 {_DATAF(-0.60916703939437866000), _DATAF(-0.79304194450378418000)},

5852 {_DATAF(-0.60947108268737793000), _DATAF(-0.79280829429626465000)},

5853 {_DATAF(-0.60977506637573242000), _DATAF(-0.79257452487945557000)},

5854 {_DATAF(-0.61007899045944214000), _DATAF(-0.79234057664871216000)},

5855 {_DATAF(-0.61038279533386230000), _DATAF(-0.79210656881332397000)},

5856 {_DATAF(-0.61068654060363770000), _DATAF(-0.79187244176864624000)},

5857 {_DATAF(-0.61099016666412354000), _DATAF(-0.79163819551467896000)},

5858 {_DATAF(-0.61129373311996460000), _DATAF(-0.79140383005142212000)},

5859 {_DATAF(-0.61159718036651611000), _DATAF(-0.79116934537887573000)},

5860 {_DATAF(-0.61190050840377808000), _DATAF(-0.79093474149703979000)},

5861 {_DATAF(-0.61220377683639526000), _DATAF(-0.79070001840591431000)},

5862 {_DATAF(-0.61250698566436768000), _DATAF(-0.79046517610549927000)},

5863 {_DATAF(-0.61281007528305054000), _DATAF(-0.79023021459579468000)},

5864 {_DATAF(-0.61311310529708862000), _DATAF(-0.78999513387680054000)},

5865 {_DATAF(-0.61341601610183716000), _DATAF(-0.78975999355316162000)},

5866 {_DATAF(-0.61371880769729614000), _DATAF(-0.78952467441558838000)},

5867 {_DATAF(-0.61402153968811035000), _DATAF(-0.78928923606872559000)},

5868 {_DATAF(-0.61432421207427979000), _DATAF(-0.78905373811721802000)},

5869 {_DATAF(-0.61462676525115967000), _DATAF(-0.78881806135177612000)},

5870 {_DATAF(-0.61492919921875000000), _DATAF(-0.78858232498168945000)},

5871 {_DATAF(-0.61523157358169556000), _DATAF(-0.78834640979766846000)},

5872 {_DATAF(-0.61553388833999634000), _DATAF(-0.78811043500900269000)},

5873 {_DATAF(-0.61583608388900757000), _DATAF(-0.78787434101104736000)},

5874 {_DATAF(-0.61613816022872925000), _DATAF(-0.78763806819915771000)},

5875 {_DATAF(-0.61644017696380615000), _DATAF(-0.78740173578262329000)},

5876 {_DATAF(-0.61674207448959351000), _DATAF(-0.78716528415679932000)},

5877 {_DATAF(-0.61704391241073608000), _DATAF(-0.78692871332168579000)},

5878 {_DATAF(-0.61734563112258911000), _DATAF(-0.78669202327728271000)},

5879 {_DATAF(-0.61764729022979736000), _DATAF(-0.78645521402359009000)},

5880 {_DATAF(-0.61794888973236084000), _DATAF(-0.78621828556060791000)},

5881 {_DATAF(-0.61825031042098999000), _DATAF(-0.78598123788833618000)},

5882 {_DATAF(-0.61855173110961914000), _DATAF(-0.78574407100677490000)},

5883 {_DATAF(-0.61885297298431396000), _DATAF(-0.78550684452056885000)},

5884 {_DATAF(-0.61915415525436401000), _DATAF(-0.78526943922042847000)},

5885 {_DATAF(-0.61945527791976929000), _DATAF(-0.78503191471099854000)},

5886 {_DATAF(-0.61975628137588501000), _DATAF(-0.78479433059692383000)},

5887 {_DATAF(-0.62005722522735596000), _DATAF(-0.78455656766891479000)},

5888 {_DATAF(-0.62035804986953735000), _DATAF(-0.78431874513626099000)},

5889 {_DATAF(-0.62065875530242920000), _DATAF(-0.78408080339431763000)},

5890 {_DATAF(-0.62095940113067627000), _DATAF(-0.78384268283843994000)},

5891 {_DATAF(-0.62125998735427856000), _DATAF(-0.78360450267791748000)},

5892 {_DATAF(-0.62156045436859131000), _DATAF(-0.78336620330810547000)},

5893 {_DATAF(-0.62186080217361450000), _DATAF(-0.78312778472900391000)},

5894 {_DATAF(-0.62216109037399292000), _DATAF(-0.78288924694061279000)},

5895 {_DATAF(-0.62246125936508179000), _DATAF(-0.78265058994293213000)},

5896 {_DATAF(-0.62276136875152588000), _DATAF(-0.78241181373596191000)},

5897 {_DATAF(-0.62306135892868042000), _DATAF(-0.78217291831970215000)},

5898 {_DATAF(-0.62336128950119019000), _DATAF(-0.78193396329879761000)},

5899 {_DATAF(-0.62366110086441040000), _DATAF(-0.78169482946395874000)},

5900 {_DATAF(-0.62396085262298584000), _DATAF(-0.78145557641983032000)},

5901 {_DATAF(-0.62426048517227173000), _DATAF(-0.78121626377105713000)},

5902 {_DATAF(-0.62456005811691284000), _DATAF(-0.78097677230834961000)},

5903 {_DATAF(-0.62485951185226440000), _DATAF(-0.78073722124099731000)},

5904 {_DATAF(-0.62515884637832642000), _DATAF(-0.78049755096435547000)},

5905 {_DATAF(-0.62545812129974365000), _DATAF(-0.78025776147842407000)},

5906 {_DATAF(-0.62575727701187134000), _DATAF(-0.78001779317855835000)},

5907 {_DATAF(-0.62605637311935425000), _DATAF(-0.77977776527404785000)},

5908 {_DATAF(-0.62635540962219238000), _DATAF(-0.77953761816024780000)},

5909 {_DATAF(-0.62665426731109619000), _DATAF(-0.77929735183715820000)},

5910 {_DATAF(-0.62695312500000000000), _DATAF(-0.77905702590942383000)},

5911 {_DATAF(-0.62725180387496948000), _DATAF(-0.77881652116775513000)},

5912 {_DATAF(-0.62755042314529419000), _DATAF(-0.77857589721679688000)},

5913 {_DATAF(-0.62784898281097412000), _DATAF(-0.77833521366119385000)},

5914 {_DATAF(-0.62814742326736450000), _DATAF(-0.77809435129165649000)},

5915 {_DATAF(-0.62844574451446533000), _DATAF(-0.77785342931747437000)},

5916 {_DATAF(-0.62874400615692139000), _DATAF(-0.77761232852935791000)},

5917 {_DATAF(-0.62904220819473267000), _DATAF(-0.77737116813659668000)},

5918 {_DATAF(-0.62934023141860962000), _DATAF(-0.77712988853454590000)},

5919 {_DATAF(-0.62963825464248657000), _DATAF(-0.77688848972320557000)},

5920 {_DATAF(-0.62993609905242920000), _DATAF(-0.77664697170257568000)},

5921 {_DATAF(-0.63023394346237183000), _DATAF(-0.77640533447265625000)},

5922 {_DATAF(-0.63053160905838013000), _DATAF(-0.77616357803344727000)},

5923 {_DATAF(-0.63082921504974365000), _DATAF(-0.77592170238494873000)},

5924 {_DATAF(-0.63112676143646240000), _DATAF(-0.77567970752716064000)},

5925 {_DATAF(-0.63142418861389160000), _DATAF(-0.77543765306472778000)},

5926 {_DATAF(-0.63172149658203125000), _DATAF(-0.77519541978836060000)},

5927 {_DATAF(-0.63201874494552612000), _DATAF(-0.77495312690734863000)},

5928 {_DATAF(-0.63231587409973145000), _DATAF(-0.77471065521240234000)},

5929 {_DATAF(-0.63261294364929199000), _DATAF(-0.77446812391281128000)},

5930 {_DATAF(-0.63290989398956299000), _DATAF(-0.77422547340393066000)},

5931 {_DATAF(-0.63320678472518921000), _DATAF(-0.77398270368576050000)},

5932 {_DATAF(-0.63350355625152588000), _DATAF(-0.77373981475830078000)},

5933 {_DATAF(-0.63380020856857300000), _DATAF(-0.77349680662155151000)},

5934 {_DATAF(-0.63409680128097534000), _DATAF(-0.77325367927551270000)},

5935 {_DATAF(-0.63439327478408813000), _DATAF(-0.77301043272018433000)},

5936 {_DATAF(-0.63468968868255615000), _DATAF(-0.77276712656021118000)},

5937 {_DATAF(-0.63498598337173462000), _DATAF(-0.77252364158630371000)},

5938 {_DATAF(-0.63528221845626831000), _DATAF(-0.77228009700775146000)},

5939 {_DATAF(-0.63557833433151245000), _DATAF(-0.77203637361526489000)},

5940 {_DATAF(-0.63587433099746704000), _DATAF(-0.77179259061813354000)},

5941 {_DATAF(-0.63617026805877686000), _DATAF(-0.77154868841171265000)},

5942 {_DATAF(-0.63646614551544189000), _DATAF(-0.77130466699600220000)},

5943 {_DATAF(-0.63676184415817261000), _DATAF(-0.77106052637100220000)},

5944 {_DATAF(-0.63705748319625854000), _DATAF(-0.77081626653671265000)},

5945 {_DATAF(-0.63735306262969971000), _DATAF(-0.77057188749313354000)},

5946 {_DATAF(-0.63764852285385132000), _DATAF(-0.77032744884490967000)},

5947 {_DATAF(-0.63794392347335815000), _DATAF(-0.77008283138275146000)},

5948 {_DATAF(-0.63823920488357544000), _DATAF(-0.76983815431594849000)},

5949 {_DATAF(-0.63853436708450317000), _DATAF(-0.76959329843521118000)},

5950 {_DATAF(-0.63882946968078613000), _DATAF(-0.76934838294982910000)},

5951 {_DATAF(-0.63912445306777954000), _DATAF(-0.76910334825515747000)},

5952 {_DATAF(-0.63941931724548340000), _DATAF(-0.76885819435119629000)},

5953 {_DATAF(-0.63971418142318726000), _DATAF(-0.76861292123794556000)},

5954 {_DATAF(-0.64000886678695679000), _DATAF(-0.76836752891540527000)},

5955 {_DATAF(-0.64030349254608154000), _DATAF(-0.76812201738357544000)},

5956 {_DATAF(-0.64059799909591675000), _DATAF(-0.76787644624710083000)},

5957 {_DATAF(-0.64089244604110718000), _DATAF(-0.76763069629669189000)},

5958 {_DATAF(-0.64118677377700806000), _DATAF(-0.76738488674163818000)},

5959 {_DATAF(-0.64148104190826416000), _DATAF(-0.76713889837265015000)},

5960 {_DATAF(-0.64177513122558594000), _DATAF(-0.76689285039901733000)},

5961 {_DATAF(-0.64206922054290771000), _DATAF(-0.76664668321609497000)},

5962 {_DATAF(-0.64236319065093994000), _DATAF(-0.76640039682388306000)},

5963 {_DATAF(-0.64265704154968262000), _DATAF(-0.76615399122238159000)},

5964 {_DATAF(-0.64295083284378052000), _DATAF(-0.76590746641159058000)},

5965 {_DATAF(-0.64324450492858887000), _DATAF(-0.76566088199615479000)},

5966 {_DATAF(-0.64353805780410767000), _DATAF(-0.76541411876678467000)},

5967 {_DATAF(-0.64383155107498169000), _DATAF(-0.76516723632812500000)},

5968 {_DATAF(-0.64412492513656616000), _DATAF(-0.76492029428482056000)},

5969 {_DATAF(-0.64441823959350586000), _DATAF(-0.76467323303222656000)},

5970 {_DATAF(-0.64471143484115601000), _DATAF(-0.76442605257034302000)},

5971 {_DATAF(-0.64500451087951660000), _DATAF(-0.76417875289916992000)},

5972 {_DATAF(-0.64529752731323242000), _DATAF(-0.76393133401870728000)},

5973 {_DATAF(-0.64559048414230347000), _DATAF(-0.76368379592895508000)},

5974 {_DATAF(-0.64588326215744019000), _DATAF(-0.76343613862991333000)},

5975 {_DATAF(-0.64617604017257690000), _DATAF(-0.76318842172622681000)},

5976 {_DATAF(-0.64646863937377930000), _DATAF(-0.76294052600860596000)},

5977 {_DATAF(-0.64676117897033691000), _DATAF(-0.76269257068634033000)},

5978 {_DATAF(-0.64705359935760498000), _DATAF(-0.76244449615478516000)},

5979 {_DATAF(-0.64734596014022827000), _DATAF(-0.76219630241394043000)},

5980 {_DATAF(-0.64763820171356201000), _DATAF(-0.76194798946380615000)},

5981 {_DATAF(-0.64793038368225098000), _DATAF(-0.76169955730438232000)},

5982 {_DATAF(-0.64822244644165039000), _DATAF(-0.76145100593566895000)},

5983 {_DATAF(-0.64851438999176025000), _DATAF(-0.76120239496231079000)},

5984 {_DATAF(-0.64880627393722534000), _DATAF(-0.76095360517501831000)},

5985 {_DATAF(-0.64909803867340088000), _DATAF(-0.76070475578308105000)},

5986 {_DATAF(-0.64938974380493164000), _DATAF(-0.76045578718185425000)},

5987 {_DATAF(-0.64968132972717285000), _DATAF(-0.76020669937133789000)},

5988 {_DATAF(-0.64997279644012451000), _DATAF(-0.75995749235153198000)},

5989 {_DATAF(-0.65026420354843140000), _DATAF(-0.75970816612243652000)},

5990 {_DATAF(-0.65055549144744873000), _DATAF(-0.75945872068405151000)},

5991 {_DATAF(-0.65084666013717651000), _DATAF(-0.75920921564102173000)},

5992 {_DATAF(-0.65113776922225952000), _DATAF(-0.75895953178405762000)},

5993 {_DATAF(-0.65142881870269775000), _DATAF(-0.75870978832244873000)},

5994 {_DATAF(-0.65171968936920166000), _DATAF(-0.75845992565155029000)},

5995 {_DATAF(-0.65201056003570557000), _DATAF(-0.75820988416671753000)},

5996 {_DATAF(-0.65230125188827515000), _DATAF(-0.75795978307723999000)},

5997 {_DATAF(-0.65259188413619995000), _DATAF(-0.75770962238311768000)},

5998 {_DATAF(-0.65288239717483521000), _DATAF(-0.75745928287506104000)},

5999 {_DATAF(-0.65317285060882568000), _DATAF(-0.75720882415771484000)},

6000 {_DATAF(-0.65346318483352661000), _DATAF(-0.75695830583572388000)},

6001 {_DATAF(-0.65375339984893799000), _DATAF(-0.75670766830444336000)},

6002 {_DATAF(-0.65404355525970459000), _DATAF(-0.75645685195922852000)},

6003 {_DATAF(-0.65433359146118164000), _DATAF(-0.75620597600936890000)},

6004 {_DATAF(-0.65462356805801392000), _DATAF(-0.75595504045486450000)},

6005 {_DATAF(-0.65491342544555664000), _DATAF(-0.75570392608642578000)},

6006 {_DATAF(-0.65520316362380981000), _DATAF(-0.75545269250869751000)},

6007 {_DATAF(-0.65549284219741821000), _DATAF(-0.75520139932632446000)},

6008 {_DATAF(-0.65578240156173706000), _DATAF(-0.75494992733001709000)},

6009 {_DATAF(-0.65607190132141113000), _DATAF(-0.75469839572906494000)},

6010 {_DATAF(-0.65636128187179565000), _DATAF(-0.75444674491882324000)},

6011 {_DATAF(-0.65665054321289063000), _DATAF(-0.75419497489929199000)},

6012 {_DATAF(-0.65693974494934082000), _DATAF(-0.75394308567047119000)},

6013 {_DATAF(-0.65722882747650146000), _DATAF(-0.75369113683700562000)},

6014 {_DATAF(-0.65751779079437256000), _DATAF(-0.75343900918960571000)},

6015 {_DATAF(-0.65780669450759888000), _DATAF(-0.75318682193756104000)},

6016 {_DATAF(-0.65809547901153564000), _DATAF(-0.75293445587158203000)},

6017 {_DATAF(-0.65838420391082764000), _DATAF(-0.75268203020095825000)},

6018 {_DATAF(-0.65867280960083008000), _DATAF(-0.75242948532104492000)},

6019 {_DATAF(-0.65896129608154297000), _DATAF(-0.75217682123184204000)},

6020 {_DATAF(-0.65924972295761108000), _DATAF(-0.75192409753799438000)},

6021 {_DATAF(-0.65953803062438965000), _DATAF(-0.75167119503021240000)},

6022 {_DATAF(-0.65982621908187866000), _DATAF(-0.75141823291778564000)},

6023 {_DATAF(-0.66011434793472290000), _DATAF(-0.75116515159606934000)},

6024 {_DATAF(-0.66040235757827759000), _DATAF(-0.75091195106506348000)},

6025 {_DATAF(-0.66069030761718750000), _DATAF(-0.75065863132476807000)},

6026 {_DATAF(-0.66097813844680786000), _DATAF(-0.75040519237518311000)},

6027 {_DATAF(-0.66126585006713867000), _DATAF(-0.75015163421630859000)},

6028 {_DATAF(-0.66155344247817993000), _DATAF(-0.74989801645278931000)},

6029 {_DATAF(-0.66184097528457642000), _DATAF(-0.74964421987533569000)},

6030 {_DATAF(-0.66212844848632813000), _DATAF(-0.74939036369323730000)},

6031 {_DATAF(-0.66241580247879028000), _DATAF(-0.74913638830184937000)},

6032 {_DATAF(-0.66270303726196289000), _DATAF(-0.74888229370117188000)},

6033 {_DATAF(-0.66299015283584595000), _DATAF(-0.74862807989120483000)},

6034 {_DATAF(-0.66327720880508423000), _DATAF(-0.74837380647659302000)},

6035 {_DATAF(-0.66356414556503296000), _DATAF(-0.74811935424804688000)},

6036 {_DATAF(-0.66385102272033691000), _DATAF(-0.74786484241485596000)},

6037 {_DATAF(-0.66413778066635132000), _DATAF(-0.74761021137237549000)},

6038 {_DATAF(-0.66442441940307617000), _DATAF(-0.74735546112060547000)},

6039 {_DATAF(-0.66471099853515625000), _DATAF(-0.74710059165954590000)},

6040 {_DATAF(-0.66499745845794678000), _DATAF(-0.74684566259384155000)},

6041 {_DATAF(-0.66528379917144775000), _DATAF(-0.74659055471420288000)},

6042 {_DATAF(-0.66557008028030396000), _DATAF(-0.74633538722991943000)},

6043 {_DATAF(-0.66585624217987061000), _DATAF(-0.74608010053634644000)},

6044 {_DATAF(-0.66614228487014771000), _DATAF(-0.74582469463348389000)},

6045 {_DATAF(-0.66642826795578003000), _DATAF(-0.74556916952133179000)},

6046 {_DATAF(-0.66671413183212280000), _DATAF(-0.74531352519989014000)},

6047 {_DATAF(-0.66699993610382080000), _DATAF(-0.74505776166915894000)},

6048 {_DATAF(-0.66728562116622925000), _DATAF(-0.74480193853378296000)},

6049 {_DATAF(-0.66757118701934814000), _DATAF(-0.74454599618911743000)},

6050 {_DATAF(-0.66785663366317749000), _DATAF(-0.74428993463516235000)},

6051 {_DATAF(-0.66814202070236206000), _DATAF(-0.74403375387191772000)},

6052 {_DATAF(-0.66842734813690186000), _DATAF(-0.74377745389938354000)},

6053 {_DATAF(-0.66871249675750732000), _DATAF(-0.74352109432220459000)},

6054 {_DATAF(-0.66899758577346802000), _DATAF(-0.74326455593109131000)},

6055 {_DATAF(-0.66928261518478394000), _DATAF(-0.74300795793533325000)},

6056 {_DATAF(-0.66956746578216553000), _DATAF(-0.74275124073028564000)},

6057 {_DATAF(-0.66985225677490234000), _DATAF(-0.74249440431594849000)},

6058 {_DATAF(-0.67013698816299438000), _DATAF(-0.74223744869232178000)},

6059 {_DATAF(-0.67042154073715210000), _DATAF(-0.74198043346405029000)},

6060 {_DATAF(-0.67070603370666504000), _DATAF(-0.74172323942184448000)},

6061 {_DATAF(-0.67099046707153320000), _DATAF(-0.74146598577499390000)},

6062 {_DATAF(-0.67127478122711182000), _DATAF(-0.74120861291885376000)},

6063 {_DATAF(-0.67155897617340088000), _DATAF(-0.74095112085342407000)},

6064 {_DATAF(-0.67184305191040039000), _DATAF(-0.74069350957870483000)},

6065 {_DATAF(-0.67212706804275513000), _DATAF(-0.74043583869934082000)},

6066 {_DATAF(-0.67241096496582031000), _DATAF(-0.74017798900604248000)},

6067 {_DATAF(-0.67269474267959595000), _DATAF(-0.73992007970809937000)},

6068 {_DATAF(-0.67297846078872681000), _DATAF(-0.73966205120086670000)},

6069 {_DATAF(-0.67326205968856812000), _DATAF(-0.73940390348434448000)},

6070 {_DATAF(-0.67354559898376465000), _DATAF(-0.73914569616317749000)},

6071 {_DATAF(-0.67382901906967163000), _DATAF(-0.73888731002807617000)},

6072 {_DATAF(-0.67411231994628906000), _DATAF(-0.73862886428833008000)},

6073 {_DATAF(-0.67439550161361694000), _DATAF(-0.73837029933929443000)},

6074 {_DATAF(-0.67467862367630005000), _DATAF(-0.73811161518096924000)},

6075 {_DATAF(-0.67496162652969360000), _DATAF(-0.73785281181335449000)},

6076 {_DATAF(-0.67524456977844238000), _DATAF(-0.73759388923645020000)},

6077 {_DATAF(-0.67552739381790161000), _DATAF(-0.73733490705490112000)},

6078 {_DATAF(-0.67581009864807129000), _DATAF(-0.73707580566406250000)},

6079 {_DATAF(-0.67609268426895142000), _DATAF(-0.73681658506393433000)},

6080 {_DATAF(-0.67637521028518677000), _DATAF(-0.73655724525451660000)},

6081 {_DATAF(-0.67665761709213257000), _DATAF(-0.73629778623580933000)},

6082 {_DATAF(-0.67693996429443359000), _DATAF(-0.73603826761245728000)},

6083 {_DATAF(-0.67722219228744507000), _DATAF(-0.73577857017517090000)},

6084 {_DATAF(-0.67750430107116699000), _DATAF(-0.73551881313323975000)},

6085 {_DATAF(-0.67778629064559937000), _DATAF(-0.73525893688201904000)},

6086 {_DATAF(-0.67806822061538696000), _DATAF(-0.73499894142150879000)},

6087 {_DATAF(-0.67835003137588501000), _DATAF(-0.73473888635635376000)},

6088 {_DATAF(-0.67863178253173828000), _DATAF(-0.73447865247726440000)},

6089 {_DATAF(-0.67891335487365723000), _DATAF(-0.73421835899353027000)},

6090 {_DATAF(-0.67919492721557617000), _DATAF(-0.73395794630050659000)},

6091 {_DATAF(-0.67947632074356079000), _DATAF(-0.73369741439819336000)},

6092 {_DATAF(-0.67975765466690063000), _DATAF(-0.73343682289123535000)},

6093 {_DATAF(-0.68003886938095093000), _DATAF(-0.73317605257034302000)},

6094 {_DATAF(-0.68031996488571167000), _DATAF(-0.73291522264480591000)},

6095 {_DATAF(-0.68060100078582764000), _DATAF(-0.73265427350997925000)},

6096 {_DATAF(-0.68088191747665405000), _DATAF(-0.73239320516586304000)},

6097 {_DATAF(-0.68116271495819092000), _DATAF(-0.73213201761245728000)},

6098 {_DATAF(-0.68144345283508301000), _DATAF(-0.73187077045440674000)},

6099 {_DATAF(-0.68172407150268555000), _DATAF(-0.73160940408706665000)},

6100 {_DATAF(-0.68200457096099854000), _DATAF(-0.73134791851043701000)},

6101 {_DATAF(-0.68228501081466675000), _DATAF(-0.73108631372451782000)},

6102 {_DATAF(-0.68256533145904541000), _DATAF(-0.73082458972930908000)},

6103 {_DATAF(-0.68284553289413452000), _DATAF(-0.73056274652481079000)},

6104 {_DATAF(-0.68312567472457886000), _DATAF(-0.73030084371566772000)},

6105 {_DATAF(-0.68340569734573364000), _DATAF(-0.73003882169723511000)},

6106 {_DATAF(-0.68368560075759888000), _DATAF(-0.72977668046951294000)},

6107 {_DATAF(-0.68396538496017456000), _DATAF(-0.72951442003250122000)},

6108 {_DATAF(-0.68424510955810547000), _DATAF(-0.72925209999084473000)},

6109 {_DATAF(-0.68452471494674683000), _DATAF(-0.72898960113525391000)},

6110 {_DATAF(-0.68480426073074341000), _DATAF(-0.72872704267501831000)},

6111 {_DATAF(-0.68508368730545044000), _DATAF(-0.72846436500549316000)},

6112 {_DATAF(-0.68536299467086792000), _DATAF(-0.72820162773132324000)},

6113 {_DATAF(-0.68564218282699585000), _DATAF(-0.72793871164321899000)},

6114 {_DATAF(-0.68592131137847900000), _DATAF(-0.72767573595046997000)},

6115 {_DATAF(-0.68620032072067261000), _DATAF(-0.72741264104843140000)},

6116 {_DATAF(-0.68647921085357666000), _DATAF(-0.72714942693710327000)},

6117 {_DATAF(-0.68675804138183594000), _DATAF(-0.72688609361648560000)},

6118 {_DATAF(-0.68703675270080566000), _DATAF(-0.72662270069122314000)},

6119 {_DATAF(-0.68731534481048584000), _DATAF(-0.72635912895202637000)},

6120 {_DATAF(-0.68759381771087646000), _DATAF(-0.72609549760818481000)},

6121 {_DATAF(-0.68787223100662231000), _DATAF(-0.72583180665969849000)},

6122 {_DATAF(-0.68815052509307861000), _DATAF(-0.72556793689727783000)},

6123 {_DATAF(-0.68842875957489014000), _DATAF(-0.72530394792556763000)},

6124 {_DATAF(-0.68870687484741211000), _DATAF(-0.72503989934921265000)},

6125 {_DATAF(-0.68898487091064453000), _DATAF(-0.72477573156356812000)},

6126 {_DATAF(-0.68926274776458740000), _DATAF(-0.72451144456863403000)},

6127 {_DATAF(-0.68954056501388550000), _DATAF(-0.72424709796905518000)},

6128 {_DATAF(-0.68981826305389404000), _DATAF(-0.72398257255554199000)},

6129 {_DATAF(-0.69009584188461304000), _DATAF(-0.72371798753738403000)},

6130 {_DATAF(-0.69037330150604248000), _DATAF(-0.72345328330993652000)},

6131 {_DATAF(-0.69065070152282715000), _DATAF(-0.72318845987319946000)},

6132 {_DATAF(-0.69092798233032227000), _DATAF(-0.72292357683181763000)},

6133 {_DATAF(-0.69120520353317261000), _DATAF(-0.72265857458114624000)},

6134 {_DATAF(-0.69148224592208862000), _DATAF(-0.72239345312118530000)},

6135 {_DATAF(-0.69175922870635986000), _DATAF(-0.72212821245193481000)},

6136 {_DATAF(-0.69203615188598633000), _DATAF(-0.72186285257339478000)},

6137 {_DATAF(-0.69231289625167847000), _DATAF(-0.72159743309020996000)},

6138 {_DATAF(-0.69258958101272583000), _DATAF(-0.72133183479309082000)},

6139 {_DATAF(-0.69286614656448364000), _DATAF(-0.72106617689132690000)},

6140 {_DATAF(-0.69314265251159668000), _DATAF(-0.72080045938491821000)},

6141 {_DATAF(-0.69341903924942017000), _DATAF(-0.72053456306457520000)},

6142 {_DATAF(-0.69369530677795410000), _DATAF(-0.72026860713958740000)},

6143 {_DATAF(-0.69397145509719849000), _DATAF(-0.72000253200531006000)},

6144 {_DATAF(-0.69424754381179810000), _DATAF(-0.71973633766174316000)},

6145 {_DATAF(-0.69452351331710815000), _DATAF(-0.71947002410888672000)},

6146 {_DATAF(-0.69479936361312866000), _DATAF(-0.71920365095138550000)},

6147 {_DATAF(-0.69507509469985962000), _DATAF(-0.71893709897994995000)},

6148 {_DATAF(-0.69535076618194580000), _DATAF(-0.71867048740386963000)},

6149 {_DATAF(-0.69562631845474243000), _DATAF(-0.71840381622314453000)},

6150 {_DATAF(-0.69590175151824951000), _DATAF(-0.71813696622848511000)},

6151 {_DATAF(-0.69617712497711182000), _DATAF(-0.71787005662918091000)},

6152 {_DATAF(-0.69645237922668457000), _DATAF(-0.71760302782058716000)},

6153 {_DATAF(-0.69672751426696777000), _DATAF(-0.71733587980270386000)},

6154 {_DATAF(-0.69700258970260620000), _DATAF(-0.71706861257553101000)},

6155 {_DATAF(-0.69727748632431030000), _DATAF(-0.71680128574371338000)},

6156 {_DATAF(-0.69755232334136963000), _DATAF(-0.71653383970260620000)},

6157 {_DATAF(-0.69782710075378418000), _DATAF(-0.71626627445220947000)},

6158 {_DATAF(-0.69810169935226440000), _DATAF(-0.71599858999252319000)},

6159 {_DATAF(-0.69837623834609985000), _DATAF(-0.71573084592819214000)},

6160 {_DATAF(-0.69865065813064575000), _DATAF(-0.71546292304992676000)},

6161 {_DATAF(-0.69892501831054688000), _DATAF(-0.71519494056701660000)},

6162 {_DATAF(-0.69919919967651367000), _DATAF(-0.71492689847946167000)},

6163 {_DATAF(-0.69947332143783569000), _DATAF(-0.71465867757797241000)},

6164 {_DATAF(-0.69974738359451294000), _DATAF(-0.71439039707183838000)},

6165 {_DATAF(-0.70002126693725586000), _DATAF(-0.71412199735641479000)},

6166 {_DATAF(-0.70029509067535400000), _DATAF(-0.71385347843170166000)},

6167 {_DATAF(-0.70056879520416260000), _DATAF(-0.71358484029769897000)},

6168 {_DATAF(-0.70084238052368164000), _DATAF(-0.71331614255905151000)},

6169 {_DATAF(-0.70111590623855591000), _DATAF(-0.71304732561111450000)},

6170 {_DATAF(-0.70138931274414063000), _DATAF(-0.71277838945388794000)},

6171 {_DATAF(-0.70166260004043579000), _DATAF(-0.71250939369201660000)},

6172 {_DATAF(-0.70193576812744141000), _DATAF(-0.71224021911621094000)},

6173 {_DATAF(-0.70220887660980225000), _DATAF(-0.71197098493576050000)},

6174 {_DATAF(-0.70248186588287354000), _DATAF(-0.71170163154602051000)},

6175 {_DATAF(-0.70275473594665527000), _DATAF(-0.71143221855163574000)},

6176 {_DATAF(-0.70302754640579224000), _DATAF(-0.71116262674331665000)},

6177 {_DATAF(-0.70330017805099487000), _DATAF(-0.71089297533035278000)},

6178 {_DATAF(-0.70357275009155273000), _DATAF(-0.71062320470809937000)},

6179 {_DATAF(-0.70384526252746582000), _DATAF(-0.71035337448120117000)},

6180 {_DATAF(-0.70411759614944458000), _DATAF(-0.71008336544036865000)},

6181 {_DATAF(-0.70438987016677856000), _DATAF(-0.70981329679489136000)},

6182 {_DATAF(-0.70466202497482300000), _DATAF(-0.70954310894012451000)},

6183 {_DATAF(-0.70493406057357788000), _DATAF(-0.70927280187606812000)},

6184 {_DATAF(-0.70520603656768799000), _DATAF(-0.70900243520736694000)},

6185 {_DATAF(-0.70547789335250854000), _DATAF(-0.70873194932937622000)},

6186 {_DATAF(-0.70574963092803955000), _DATAF(-0.70846134424209595000)},

6187 {_DATAF(-0.70602124929428101000), _DATAF(-0.70819061994552612000)},

6188 {_DATAF(-0.70629280805587769000), _DATAF(-0.70791983604431152000)},

6189 {_DATAF(-0.70656424760818481000), _DATAF(-0.70764893293380737000)},

6190 {_DATAF(-0.70683556795120239000), _DATAF(-0.70737791061401367000)},

6191 {_DATAF(-0.70710676908493042000), _DATAF(-0.70710676908493042000)},

6192 {_DATAF(-0.70737791061401367000), _DATAF(-0.70683556795120239000)},

6193 {_DATAF(-0.70764893293380737000), _DATAF(-0.70656424760818481000)},

6194 {_DATAF(-0.70791983604431152000), _DATAF(-0.70629280805587769000)},

6195 {_DATAF(-0.70819061994552612000), _DATAF(-0.70602124929428101000)},

6196 {_DATAF(-0.70846134424209595000), _DATAF(-0.70574963092803955000)},

6197 {_DATAF(-0.70873194932937622000), _DATAF(-0.70547789335250854000)},

6198 {_DATAF(-0.70900243520736694000), _DATAF(-0.70520603656768799000)},

6199 {_DATAF(-0.70927280187606812000), _DATAF(-0.70493406057357788000)},

6200 {_DATAF(-0.70954310894012451000), _DATAF(-0.70466202497482300000)},

6201 {_DATAF(-0.70981329679489136000), _DATAF(-0.70438987016677856000)},

6202 {_DATAF(-0.71008336544036865000), _DATAF(-0.70411759614944458000)},

6203 {_DATAF(-0.71035337448120117000), _DATAF(-0.70384526252746582000)},

6204 {_DATAF(-0.71062320470809937000), _DATAF(-0.70357275009155273000)},

6205 {_DATAF(-0.71089297533035278000), _DATAF(-0.70330017805099487000)},

6206 {_DATAF(-0.71116262674331665000), _DATAF(-0.70302754640579224000)},

6207 {_DATAF(-0.71143221855163574000), _DATAF(-0.70275473594665527000)},

6208 {_DATAF(-0.71170163154602051000), _DATAF(-0.70248186588287354000)},

6209 {_DATAF(-0.71197098493576050000), _DATAF(-0.70220887660980225000)},

6210 {_DATAF(-0.71224021911621094000), _DATAF(-0.70193576812744141000)},

6211 {_DATAF(-0.71250939369201660000), _DATAF(-0.70166260004043579000)},

6212 {_DATAF(-0.71277838945388794000), _DATAF(-0.70138931274414063000)},

6213 {_DATAF(-0.71304732561111450000), _DATAF(-0.70111590623855591000)},

6214 {_DATAF(-0.71331614255905151000), _DATAF(-0.70084238052368164000)},

6215 {_DATAF(-0.71358484029769897000), _DATAF(-0.70056879520416260000)},

6216 {_DATAF(-0.71385347843170166000), _DATAF(-0.70029509067535400000)},

6217 {_DATAF(-0.71412199735641479000), _DATAF(-0.70002126693725586000)},

6218 {_DATAF(-0.71439039707183838000), _DATAF(-0.69974738359451294000)},

6219 {_DATAF(-0.71465867757797241000), _DATAF(-0.69947332143783569000)},

6220 {_DATAF(-0.71492689847946167000), _DATAF(-0.69919919967651367000)},

6221 {_DATAF(-0.71519494056701660000), _DATAF(-0.69892501831054688000)},

6222 {_DATAF(-0.71546292304992676000), _DATAF(-0.69865065813064575000)},

6223 {_DATAF(-0.71573084592819214000), _DATAF(-0.69837623834609985000)},

6224 {_DATAF(-0.71599858999252319000), _DATAF(-0.69810169935226440000)},

6225 {_DATAF(-0.71626627445220947000), _DATAF(-0.69782710075378418000)},

6226 {_DATAF(-0.71653383970260620000), _DATAF(-0.69755232334136963000)},

6227 {_DATAF(-0.71680128574371338000), _DATAF(-0.69727748632431030000)},

6228 {_DATAF(-0.71706861257553101000), _DATAF(-0.69700258970260620000)},

6229 {_DATAF(-0.71733587980270386000), _DATAF(-0.69672751426696777000)},

6230 {_DATAF(-0.71760302782058716000), _DATAF(-0.69645237922668457000)},

6231 {_DATAF(-0.71787005662918091000), _DATAF(-0.69617712497711182000)},

6232 {_DATAF(-0.71813696622848511000), _DATAF(-0.69590175151824951000)},

6233 {_DATAF(-0.71840381622314453000), _DATAF(-0.69562631845474243000)},

6234 {_DATAF(-0.71867048740386963000), _DATAF(-0.69535076618194580000)},

6235 {_DATAF(-0.71893709897994995000), _DATAF(-0.69507509469985962000)},

6236 {_DATAF(-0.71920365095138550000), _DATAF(-0.69479936361312866000)},

6237 {_DATAF(-0.71947002410888672000), _DATAF(-0.69452351331710815000)},

6238 {_DATAF(-0.71973633766174316000), _DATAF(-0.69424754381179810000)},

6239 {_DATAF(-0.72000253200531006000), _DATAF(-0.69397145509719849000)},

6240 {_DATAF(-0.72026860713958740000), _DATAF(-0.69369530677795410000)},

6241 {_DATAF(-0.72053456306457520000), _DATAF(-0.69341903924942017000)},

6242 {_DATAF(-0.72080045938491821000), _DATAF(-0.69314265251159668000)},

6243 {_DATAF(-0.72106617689132690000), _DATAF(-0.69286614656448364000)},

6244 {_DATAF(-0.72133183479309082000), _DATAF(-0.69258958101272583000)},

6245 {_DATAF(-0.72159743309020996000), _DATAF(-0.69231289625167847000)},

6246 {_DATAF(-0.72186285257339478000), _DATAF(-0.69203615188598633000)},

6247 {_DATAF(-0.72212821245193481000), _DATAF(-0.69175922870635986000)},

6248 {_DATAF(-0.72239345312118530000), _DATAF(-0.69148224592208862000)},

6249 {_DATAF(-0.72265857458114624000), _DATAF(-0.69120520353317261000)},

6250 {_DATAF(-0.72292357683181763000), _DATAF(-0.69092798233032227000)},

6251 {_DATAF(-0.72318845987319946000), _DATAF(-0.69065070152282715000)},

6252 {_DATAF(-0.72345328330993652000), _DATAF(-0.69037330150604248000)},

6253 {_DATAF(-0.72371798753738403000), _DATAF(-0.69009584188461304000)},

6254 {_DATAF(-0.72398257255554199000), _DATAF(-0.68981826305389404000)},

6255 {_DATAF(-0.72424709796905518000), _DATAF(-0.68954056501388550000)},

6256 {_DATAF(-0.72451144456863403000), _DATAF(-0.68926274776458740000)},

6257 {_DATAF(-0.72477573156356812000), _DATAF(-0.68898487091064453000)},

6258 {_DATAF(-0.72503989934921265000), _DATAF(-0.68870687484741211000)},

6259 {_DATAF(-0.72530394792556763000), _DATAF(-0.68842875957489014000)},

6260 {_DATAF(-0.72556793689727783000), _DATAF(-0.68815052509307861000)},

6261 {_DATAF(-0.72583180665969849000), _DATAF(-0.68787223100662231000)},

6262 {_DATAF(-0.72609549760818481000), _DATAF(-0.68759381771087646000)},

6263 {_DATAF(-0.72635912895202637000), _DATAF(-0.68731534481048584000)},

6264 {_DATAF(-0.72662270069122314000), _DATAF(-0.68703675270080566000)},

6265 {_DATAF(-0.72688609361648560000), _DATAF(-0.68675804138183594000)},

6266 {_DATAF(-0.72714942693710327000), _DATAF(-0.68647921085357666000)},

6267 {_DATAF(-0.72741264104843140000), _DATAF(-0.68620032072067261000)},

6268 {_DATAF(-0.72767573595046997000), _DATAF(-0.68592131137847900000)},

6269 {_DATAF(-0.72793871164321899000), _DATAF(-0.68564218282699585000)},

6270 {_DATAF(-0.72820162773132324000), _DATAF(-0.68536299467086792000)},

6271 {_DATAF(-0.72846436500549316000), _DATAF(-0.68508368730545044000)},

6272 {_DATAF(-0.72872704267501831000), _DATAF(-0.68480426073074341000)},

6273 {_DATAF(-0.72898960113525391000), _DATAF(-0.68452471494674683000)},

6274 {_DATAF(-0.72925209999084473000), _DATAF(-0.68424510955810547000)},

6275 {_DATAF(-0.72951442003250122000), _DATAF(-0.68396538496017456000)},

6276 {_DATAF(-0.72977668046951294000), _DATAF(-0.68368560075759888000)},

6277 {_DATAF(-0.73003882169723511000), _DATAF(-0.68340569734573364000)},

6278 {_DATAF(-0.73030084371566772000), _DATAF(-0.68312567472457886000)},

6279 {_DATAF(-0.73056274652481079000), _DATAF(-0.68284553289413452000)},

6280 {_DATAF(-0.73082458972930908000), _DATAF(-0.68256533145904541000)},

6281 {_DATAF(-0.73108631372451782000), _DATAF(-0.68228501081466675000)},

6282 {_DATAF(-0.73134791851043701000), _DATAF(-0.68200457096099854000)},

6283 {_DATAF(-0.73160940408706665000), _DATAF(-0.68172407150268555000)},

6284 {_DATAF(-0.73187077045440674000), _DATAF(-0.68144345283508301000)},

6285 {_DATAF(-0.73213201761245728000), _DATAF(-0.68116271495819092000)},

6286 {_DATAF(-0.73239320516586304000), _DATAF(-0.68088191747665405000)},

6287 {_DATAF(-0.73265427350997925000), _DATAF(-0.68060100078582764000)},

6288 {_DATAF(-0.73291522264480591000), _DATAF(-0.68031996488571167000)},

6289 {_DATAF(-0.73317605257034302000), _DATAF(-0.68003886938095093000)},

6290 {_DATAF(-0.73343682289123535000), _DATAF(-0.67975765466690063000)},

6291 {_DATAF(-0.73369741439819336000), _DATAF(-0.67947632074356079000)},

6292 {_DATAF(-0.73395794630050659000), _DATAF(-0.67919492721557617000)},

6293 {_DATAF(-0.73421835899353027000), _DATAF(-0.67891335487365723000)},

6294 {_DATAF(-0.73447865247726440000), _DATAF(-0.67863178253173828000)},

6295 {_DATAF(-0.73473888635635376000), _DATAF(-0.67835003137588501000)},

6296 {_DATAF(-0.73499894142150879000), _DATAF(-0.67806822061538696000)},

6297 {_DATAF(-0.73525893688201904000), _DATAF(-0.67778629064559937000)},

6298 {_DATAF(-0.73551881313323975000), _DATAF(-0.67750430107116699000)},

6299 {_DATAF(-0.73577857017517090000), _DATAF(-0.67722219228744507000)},

6300 {_DATAF(-0.73603826761245728000), _DATAF(-0.67693996429443359000)},

6301 {_DATAF(-0.73629778623580933000), _DATAF(-0.67665761709213257000)},

6302 {_DATAF(-0.73655724525451660000), _DATAF(-0.67637521028518677000)},

6303 {_DATAF(-0.73681658506393433000), _DATAF(-0.67609268426895142000)},

6304 {_DATAF(-0.73707580566406250000), _DATAF(-0.67581009864807129000)},

6305 {_DATAF(-0.73733490705490112000), _DATAF(-0.67552739381790161000)},

6306 {_DATAF(-0.73759388923645020000), _DATAF(-0.67524456977844238000)},

6307 {_DATAF(-0.73785281181335449000), _DATAF(-0.67496162652969360000)},

6308 {_DATAF(-0.73811161518096924000), _DATAF(-0.67467862367630005000)},

6309 {_DATAF(-0.73837029933929443000), _DATAF(-0.67439550161361694000)},

6310 {_DATAF(-0.73862886428833008000), _DATAF(-0.67411231994628906000)},

6311 {_DATAF(-0.73888731002807617000), _DATAF(-0.67382901906967163000)},

6312 {_DATAF(-0.73914569616317749000), _DATAF(-0.67354559898376465000)},

6313 {_DATAF(-0.73940390348434448000), _DATAF(-0.67326205968856812000)},

6314 {_DATAF(-0.73966205120086670000), _DATAF(-0.67297846078872681000)},

6315 {_DATAF(-0.73992007970809937000), _DATAF(-0.67269474267959595000)},

6316 {_DATAF(-0.74017798900604248000), _DATAF(-0.67241096496582031000)},

6317 {_DATAF(-0.74043583869934082000), _DATAF(-0.67212706804275513000)},

6318 {_DATAF(-0.74069350957870483000), _DATAF(-0.67184305191040039000)},

6319 {_DATAF(-0.74095112085342407000), _DATAF(-0.67155897617340088000)},

6320 {_DATAF(-0.74120861291885376000), _DATAF(-0.67127478122711182000)},

6321 {_DATAF(-0.74146598577499390000), _DATAF(-0.67099046707153320000)},

6322 {_DATAF(-0.74172323942184448000), _DATAF(-0.67070603370666504000)},

6323 {_DATAF(-0.74198043346405029000), _DATAF(-0.67042154073715210000)},

6324 {_DATAF(-0.74223744869232178000), _DATAF(-0.67013698816299438000)},

6325 {_DATAF(-0.74249440431594849000), _DATAF(-0.66985225677490234000)},

6326 {_DATAF(-0.74275124073028564000), _DATAF(-0.66956746578216553000)},

6327 {_DATAF(-0.74300795793533325000), _DATAF(-0.66928261518478394000)},

6328 {_DATAF(-0.74326455593109131000), _DATAF(-0.66899758577346802000)},

6329 {_DATAF(-0.74352109432220459000), _DATAF(-0.66871249675750732000)},

6330 {_DATAF(-0.74377745389938354000), _DATAF(-0.66842734813690186000)},

6331 {_DATAF(-0.74403375387191772000), _DATAF(-0.66814202070236206000)},

6332 {_DATAF(-0.74428993463516235000), _DATAF(-0.66785663366317749000)},

6333 {_DATAF(-0.74454599618911743000), _DATAF(-0.66757118701934814000)},

6334 {_DATAF(-0.74480193853378296000), _DATAF(-0.66728562116622925000)},

6335 {_DATAF(-0.74505776166915894000), _DATAF(-0.66699993610382080000)},

6336 {_DATAF(-0.74531352519989014000), _DATAF(-0.66671413183212280000)},

6337 {_DATAF(-0.74556916952133179000), _DATAF(-0.66642826795578003000)},

6338 {_DATAF(-0.74582469463348389000), _DATAF(-0.66614228487014771000)},

6339 {_DATAF(-0.74608010053634644000), _DATAF(-0.66585624217987061000)},

6340 {_DATAF(-0.74633538722991943000), _DATAF(-0.66557008028030396000)},

6341 {_DATAF(-0.74659055471420288000), _DATAF(-0.66528379917144775000)},

6342 {_DATAF(-0.74684566259384155000), _DATAF(-0.66499745845794678000)},

6343 {_DATAF(-0.74710059165954590000), _DATAF(-0.66471099853515625000)},

6344 {_DATAF(-0.74735546112060547000), _DATAF(-0.66442441940307617000)},

6345 {_DATAF(-0.74761021137237549000), _DATAF(-0.66413778066635132000)},

6346 {_DATAF(-0.74786484241485596000), _DATAF(-0.66385102272033691000)},

6347 {_DATAF(-0.74811935424804688000), _DATAF(-0.66356414556503296000)},

6348 {_DATAF(-0.74837380647659302000), _DATAF(-0.66327720880508423000)},

6349 {_DATAF(-0.74862807989120483000), _DATAF(-0.66299015283584595000)},

6350 {_DATAF(-0.74888229370117188000), _DATAF(-0.66270303726196289000)},

6351 {_DATAF(-0.74913638830184937000), _DATAF(-0.66241580247879028000)},

6352 {_DATAF(-0.74939036369323730000), _DATAF(-0.66212844848632813000)},

6353 {_DATAF(-0.74964421987533569000), _DATAF(-0.66184097528457642000)},

6354 {_DATAF(-0.74989801645278931000), _DATAF(-0.66155344247817993000)},

6355 {_DATAF(-0.75015163421630859000), _DATAF(-0.66126585006713867000)},

6356 {_DATAF(-0.75040519237518311000), _DATAF(-0.66097813844680786000)},

6357 {_DATAF(-0.75065863132476807000), _DATAF(-0.66069030761718750000)},

6358 {_DATAF(-0.75091195106506348000), _DATAF(-0.66040235757827759000)},

6359 {_DATAF(-0.75116515159606934000), _DATAF(-0.66011434793472290000)},

6360 {_DATAF(-0.75141823291778564000), _DATAF(-0.65982621908187866000)},

6361 {_DATAF(-0.75167119503021240000), _DATAF(-0.65953803062438965000)},

6362 {_DATAF(-0.75192409753799438000), _DATAF(-0.65924972295761108000)},

6363 {_DATAF(-0.75217682123184204000), _DATAF(-0.65896129608154297000)},

6364 {_DATAF(-0.75242948532104492000), _DATAF(-0.65867280960083008000)},

6365 {_DATAF(-0.75268203020095825000), _DATAF(-0.65838420391082764000)},

6366 {_DATAF(-0.75293445587158203000), _DATAF(-0.65809547901153564000)},

6367 {_DATAF(-0.75318682193756104000), _DATAF(-0.65780669450759888000)},

6368 {_DATAF(-0.75343900918960571000), _DATAF(-0.65751779079437256000)},

6369 {_DATAF(-0.75369113683700562000), _DATAF(-0.65722882747650146000)},

6370 {_DATAF(-0.75394308567047119000), _DATAF(-0.65693974494934082000)},

6371 {_DATAF(-0.75419497489929199000), _DATAF(-0.65665054321289063000)},

6372 {_DATAF(-0.75444674491882324000), _DATAF(-0.65636128187179565000)},

6373 {_DATAF(-0.75469839572906494000), _DATAF(-0.65607190132141113000)},

6374 {_DATAF(-0.75494992733001709000), _DATAF(-0.65578240156173706000)},

6375 {_DATAF(-0.75520139932632446000), _DATAF(-0.65549284219741821000)},

6376 {_DATAF(-0.75545269250869751000), _DATAF(-0.65520316362380981000)},

6377 {_DATAF(-0.75570392608642578000), _DATAF(-0.65491342544555664000)},

6378 {_DATAF(-0.75595504045486450000), _DATAF(-0.65462356805801392000)},

6379 {_DATAF(-0.75620597600936890000), _DATAF(-0.65433359146118164000)},

6380 {_DATAF(-0.75645685195922852000), _DATAF(-0.65404355525970459000)},

6381 {_DATAF(-0.75670766830444336000), _DATAF(-0.65375339984893799000)},

6382 {_DATAF(-0.75695830583572388000), _DATAF(-0.65346318483352661000)},

6383 {_DATAF(-0.75720882415771484000), _DATAF(-0.65317285060882568000)},

6384 {_DATAF(-0.75745928287506104000), _DATAF(-0.65288239717483521000)},

6385 {_DATAF(-0.75770962238311768000), _DATAF(-0.65259188413619995000)},

6386 {_DATAF(-0.75795978307723999000), _DATAF(-0.65230125188827515000)},

6387 {_DATAF(-0.75820988416671753000), _DATAF(-0.65201056003570557000)},

6388 {_DATAF(-0.75845992565155029000), _DATAF(-0.65171968936920166000)},

6389 {_DATAF(-0.75870978832244873000), _DATAF(-0.65142881870269775000)},

6390 {_DATAF(-0.75895953178405762000), _DATAF(-0.65113776922225952000)},

6391 {_DATAF(-0.75920921564102173000), _DATAF(-0.65084666013717651000)},

6392 {_DATAF(-0.75945872068405151000), _DATAF(-0.65055549144744873000)},

6393 {_DATAF(-0.75970816612243652000), _DATAF(-0.65026420354843140000)},

6394 {_DATAF(-0.75995749235153198000), _DATAF(-0.64997279644012451000)},

6395 {_DATAF(-0.76020669937133789000), _DATAF(-0.64968132972717285000)},

6396 {_DATAF(-0.76045578718185425000), _DATAF(-0.64938974380493164000)},

6397 {_DATAF(-0.76070475578308105000), _DATAF(-0.64909803867340088000)},

6398 {_DATAF(-0.76095360517501831000), _DATAF(-0.64880627393722534000)},

6399 {_DATAF(-0.76120239496231079000), _DATAF(-0.64851438999176025000)},

6400 {_DATAF(-0.76145100593566895000), _DATAF(-0.64822244644165039000)},

6401 {_DATAF(-0.76169955730438232000), _DATAF(-0.64793038368225098000)},

6402 {_DATAF(-0.76194798946380615000), _DATAF(-0.64763820171356201000)},

6403 {_DATAF(-0.76219630241394043000), _DATAF(-0.64734596014022827000)},

6404 {_DATAF(-0.76244449615478516000), _DATAF(-0.64705359935760498000)},

6405 {_DATAF(-0.76269257068634033000), _DATAF(-0.64676117897033691000)},

6406 {_DATAF(-0.76294052600860596000), _DATAF(-0.64646863937377930000)},

6407 {_DATAF(-0.76318842172622681000), _DATAF(-0.64617604017257690000)},

6408 {_DATAF(-0.76343613862991333000), _DATAF(-0.64588326215744019000)},

6409 {_DATAF(-0.76368379592895508000), _DATAF(-0.64559048414230347000)},

6410 {_DATAF(-0.76393133401870728000), _DATAF(-0.64529752731323242000)},

6411 {_DATAF(-0.76417875289916992000), _DATAF(-0.64500451087951660000)},

6412 {_DATAF(-0.76442605257034302000), _DATAF(-0.64471143484115601000)},

6413 {_DATAF(-0.76467323303222656000), _DATAF(-0.64441823959350586000)},

6414 {_DATAF(-0.76492029428482056000), _DATAF(-0.64412492513656616000)},

6415 {_DATAF(-0.76516723632812500000), _DATAF(-0.64383155107498169000)},

6416 {_DATAF(-0.76541411876678467000), _DATAF(-0.64353805780410767000)},

6417 {_DATAF(-0.76566088199615479000), _DATAF(-0.64324450492858887000)},

6418 {_DATAF(-0.76590746641159058000), _DATAF(-0.64295083284378052000)},

6419 {_DATAF(-0.76615399122238159000), _DATAF(-0.64265704154968262000)},

6420 {_DATAF(-0.76640039682388306000), _DATAF(-0.64236319065093994000)},

6421 {_DATAF(-0.76664668321609497000), _DATAF(-0.64206922054290771000)},

6422 {_DATAF(-0.76689285039901733000), _DATAF(-0.64177513122558594000)},

6423 {_DATAF(-0.76713889837265015000), _DATAF(-0.64148104190826416000)},

6424 {_DATAF(-0.76738488674163818000), _DATAF(-0.64118677377700806000)},

6425 {_DATAF(-0.76763069629669189000), _DATAF(-0.64089244604110718000)},

6426 {_DATAF(-0.76787644624710083000), _DATAF(-0.64059799909591675000)},

6427 {_DATAF(-0.76812201738357544000), _DATAF(-0.64030349254608154000)},

6428 {_DATAF(-0.76836752891540527000), _DATAF(-0.64000886678695679000)},

6429 {_DATAF(-0.76861292123794556000), _DATAF(-0.63971418142318726000)},

6430 {_DATAF(-0.76885819435119629000), _DATAF(-0.63941931724548340000)},

6431 {_DATAF(-0.76910334825515747000), _DATAF(-0.63912445306777954000)},

6432 {_DATAF(-0.76934838294982910000), _DATAF(-0.63882946968078613000)},

6433 {_DATAF(-0.76959329843521118000), _DATAF(-0.63853436708450317000)},

6434 {_DATAF(-0.76983815431594849000), _DATAF(-0.63823920488357544000)},

6435 {_DATAF(-0.77008283138275146000), _DATAF(-0.63794392347335815000)},

6436 {_DATAF(-0.77032744884490967000), _DATAF(-0.63764852285385132000)},

6437 {_DATAF(-0.77057188749313354000), _DATAF(-0.63735306262969971000)},

6438 {_DATAF(-0.77081626653671265000), _DATAF(-0.63705748319625854000)},

6439 {_DATAF(-0.77106052637100220000), _DATAF(-0.63676184415817261000)},

6440 {_DATAF(-0.77130466699600220000), _DATAF(-0.63646614551544189000)},

6441 {_DATAF(-0.77154868841171265000), _DATAF(-0.63617026805877686000)},

6442 {_DATAF(-0.77179259061813354000), _DATAF(-0.63587433099746704000)},

6443 {_DATAF(-0.77203637361526489000), _DATAF(-0.63557833433151245000)},

6444 {_DATAF(-0.77228009700775146000), _DATAF(-0.63528221845626831000)},

6445 {_DATAF(-0.77252364158630371000), _DATAF(-0.63498598337173462000)},

6446 {_DATAF(-0.77276712656021118000), _DATAF(-0.63468968868255615000)},

6447 {_DATAF(-0.77301043272018433000), _DATAF(-0.63439327478408813000)},

6448 {_DATAF(-0.77325367927551270000), _DATAF(-0.63409680128097534000)},

6449 {_DATAF(-0.77349680662155151000), _DATAF(-0.63380020856857300000)},

6450 {_DATAF(-0.77373981475830078000), _DATAF(-0.63350355625152588000)},

6451 {_DATAF(-0.77398270368576050000), _DATAF(-0.63320678472518921000)},

6452 {_DATAF(-0.77422547340393066000), _DATAF(-0.63290989398956299000)},

6453 {_DATAF(-0.77446812391281128000), _DATAF(-0.63261294364929199000)},

6454 {_DATAF(-0.77471065521240234000), _DATAF(-0.63231587409973145000)},

6455 {_DATAF(-0.77495312690734863000), _DATAF(-0.63201874494552612000)},

6456 {_DATAF(-0.77519541978836060000), _DATAF(-0.63172149658203125000)},

6457 {_DATAF(-0.77543765306472778000), _DATAF(-0.63142418861389160000)},

6458 {_DATAF(-0.77567970752716064000), _DATAF(-0.63112676143646240000)},

6459 {_DATAF(-0.77592170238494873000), _DATAF(-0.63082921504974365000)},

6460 {_DATAF(-0.77616357803344727000), _DATAF(-0.63053160905838013000)},

6461 {_DATAF(-0.77640533447265625000), _DATAF(-0.63023394346237183000)},

6462 {_DATAF(-0.77664697170257568000), _DATAF(-0.62993609905242920000)},

6463 {_DATAF(-0.77688848972320557000), _DATAF(-0.62963825464248657000)},

6464 {_DATAF(-0.77712988853454590000), _DATAF(-0.62934023141860962000)},

6465 {_DATAF(-0.77737116813659668000), _DATAF(-0.62904220819473267000)},

6466 {_DATAF(-0.77761232852935791000), _DATAF(-0.62874400615692139000)},

6467 {_DATAF(-0.77785342931747437000), _DATAF(-0.62844574451446533000)},

6468 {_DATAF(-0.77809435129165649000), _DATAF(-0.62814742326736450000)},

6469 {_DATAF(-0.77833521366119385000), _DATAF(-0.62784898281097412000)},

6470 {_DATAF(-0.77857589721679688000), _DATAF(-0.62755042314529419000)},

6471 {_DATAF(-0.77881652116775513000), _DATAF(-0.62725180387496948000)},

6472 {_DATAF(-0.77905702590942383000), _DATAF(-0.62695312500000000000)},

6473 {_DATAF(-0.77929735183715820000), _DATAF(-0.62665426731109619000)},

6474 {_DATAF(-0.77953761816024780000), _DATAF(-0.62635540962219238000)},

6475 {_DATAF(-0.77977776527404785000), _DATAF(-0.62605637311935425000)},

6476 {_DATAF(-0.78001779317855835000), _DATAF(-0.62575727701187134000)},

6477 {_DATAF(-0.78025776147842407000), _DATAF(-0.62545812129974365000)},

6478 {_DATAF(-0.78049755096435547000), _DATAF(-0.62515884637832642000)},

6479 {_DATAF(-0.78073722124099731000), _DATAF(-0.62485951185226440000)},

6480 {_DATAF(-0.78097677230834961000), _DATAF(-0.62456005811691284000)},

6481 {_DATAF(-0.78121626377105713000), _DATAF(-0.62426048517227173000)},

6482 {_DATAF(-0.78145557641983032000), _DATAF(-0.62396085262298584000)},

6483 {_DATAF(-0.78169482946395874000), _DATAF(-0.62366110086441040000)},

6484 {_DATAF(-0.78193396329879761000), _DATAF(-0.62336128950119019000)},

6485 {_DATAF(-0.78217291831970215000), _DATAF(-0.62306135892868042000)},

6486 {_DATAF(-0.78241181373596191000), _DATAF(-0.62276136875152588000)},

6487 {_DATAF(-0.78265058994293213000), _DATAF(-0.62246125936508179000)},

6488 {_DATAF(-0.78288924694061279000), _DATAF(-0.62216109037399292000)},

6489 {_DATAF(-0.78312778472900391000), _DATAF(-0.62186080217361450000)},

6490 {_DATAF(-0.78336620330810547000), _DATAF(-0.62156045436859131000)},

6491 {_DATAF(-0.78360450267791748000), _DATAF(-0.62125998735427856000)},

6492 {_DATAF(-0.78384268283843994000), _DATAF(-0.62095940113067627000)},

6493 {_DATAF(-0.78408080339431763000), _DATAF(-0.62065875530242920000)},

6494 {_DATAF(-0.78431874513626099000), _DATAF(-0.62035804986953735000)},

6495 {_DATAF(-0.78455656766891479000), _DATAF(-0.62005722522735596000)},

6496 {_DATAF(-0.78479433059692383000), _DATAF(-0.61975628137588501000)},

6497 {_DATAF(-0.78503191471099854000), _DATAF(-0.61945527791976929000)},

6498 {_DATAF(-0.78526943922042847000), _DATAF(-0.61915415525436401000)},

6499 {_DATAF(-0.78550684452056885000), _DATAF(-0.61885297298431396000)},

6500 {_DATAF(-0.78574407100677490000), _DATAF(-0.61855173110961914000)},

6501 {_DATAF(-0.78598123788833618000), _DATAF(-0.61825031042098999000)},

6502 {_DATAF(-0.78621828556060791000), _DATAF(-0.61794888973236084000)},

6503 {_DATAF(-0.78645521402359009000), _DATAF(-0.61764729022979736000)},

6504 {_DATAF(-0.78669202327728271000), _DATAF(-0.61734563112258911000)},

6505 {_DATAF(-0.78692871332168579000), _DATAF(-0.61704391241073608000)},

6506 {_DATAF(-0.78716528415679932000), _DATAF(-0.61674207448959351000)},

6507 {_DATAF(-0.78740173578262329000), _DATAF(-0.61644017696380615000)},

6508 {_DATAF(-0.78763806819915771000), _DATAF(-0.61613816022872925000)},

6509 {_DATAF(-0.78787434101104736000), _DATAF(-0.61583608388900757000)},

6510 {_DATAF(-0.78811043500900269000), _DATAF(-0.61553388833999634000)},

6511 {_DATAF(-0.78834640979766846000), _DATAF(-0.61523157358169556000)},

6512 {_DATAF(-0.78858232498168945000), _DATAF(-0.61492919921875000000)},

6513 {_DATAF(-0.78881806135177612000), _DATAF(-0.61462676525115967000)},

6514 {_DATAF(-0.78905373811721802000), _DATAF(-0.61432421207427979000)},

6515 {_DATAF(-0.78928923606872559000), _DATAF(-0.61402153968811035000)},

6516 {_DATAF(-0.78952467441558838000), _DATAF(-0.61371880769729614000)},

6517 {_DATAF(-0.78975999355316162000), _DATAF(-0.61341601610183716000)},

6518 {_DATAF(-0.78999513387680054000), _DATAF(-0.61311310529708862000)},

6519 {_DATAF(-0.79023021459579468000), _DATAF(-0.61281007528305054000)},

6520 {_DATAF(-0.79046517610549927000), _DATAF(-0.61250698566436768000)},

6521 {_DATAF(-0.79070001840591431000), _DATAF(-0.61220377683639526000)},

6522 {_DATAF(-0.79093474149703979000), _DATAF(-0.61190050840377808000)},

6523 {_DATAF(-0.79116934537887573000), _DATAF(-0.61159718036651611000)},

6524 {_DATAF(-0.79140383005142212000), _DATAF(-0.61129373311996460000)},

6525 {_DATAF(-0.79163819551467896000), _DATAF(-0.61099016666412354000)},

6526 {_DATAF(-0.79187244176864624000), _DATAF(-0.61068654060363770000)},

6527 {_DATAF(-0.79210656881332397000), _DATAF(-0.61038279533386230000)},

6528 {_DATAF(-0.79234057664871216000), _DATAF(-0.61007899045944214000)},

6529 {_DATAF(-0.79257452487945557000), _DATAF(-0.60977506637573242000)},

6530 {_DATAF(-0.79280829429626465000), _DATAF(-0.60947108268737793000)},

6531 {_DATAF(-0.79304194450378418000), _DATAF(-0.60916703939437866000)},

6532 {_DATAF(-0.79327553510665894000), _DATAF(-0.60886281728744507000)},

6533 {_DATAF(-0.79350894689559937000), _DATAF(-0.60855859518051147000)},

6534 {_DATAF(-0.79374229907989502000), _DATAF(-0.60825425386428833000)},

6535 {_DATAF(-0.79397547245025635000), _DATAF(-0.60794979333877563000)},

6536 {_DATAF(-0.79420858621597290000), _DATAF(-0.60764527320861816000)},

6537 {_DATAF(-0.79444152116775513000), _DATAF(-0.60734063386917114000)},

6538 {_DATAF(-0.79467439651489258000), _DATAF(-0.60703593492507935000)},

6539 {_DATAF(-0.79490715265274048000), _DATAF(-0.60673111677169800000)},

6540 {_DATAF(-0.79513972997665405000), _DATAF(-0.60642623901367188000)},

6541 {_DATAF(-0.79537224769592285000), _DATAF(-0.60612124204635620000)},

6542 {_DATAF(-0.79560464620590210000), _DATAF(-0.60581618547439575000)},

6543 {_DATAF(-0.79583692550659180000), _DATAF(-0.60551106929779053000)},

6544 {_DATAF(-0.79606908559799194000), _DATAF(-0.60520577430725098000)},

6545 {_DATAF(-0.79630106687545776000), _DATAF(-0.60490047931671143000)},

6546 {_DATAF(-0.79653298854827881000), _DATAF(-0.60459506511688232000)},

6547 {_DATAF(-0.79676479101181030000), _DATAF(-0.60428953170776367000)},

6548 {_DATAF(-0.79699647426605225000), _DATAF(-0.60398393869400024000)},

6549 {_DATAF(-0.79722803831100464000), _DATAF(-0.60367822647094727000)},

6550 {_DATAF(-0.79745948314666748000), _DATAF(-0.60337245464324951000)},

6551 {_DATAF(-0.79769086837768555000), _DATAF(-0.60306662321090698000)},

6552 {_DATAF(-0.79792207479476929000), _DATAF(-0.60276067256927490000)},

6553 {_DATAF(-0.79815316200256348000), _DATAF(-0.60245460271835327000)},

6554 {_DATAF(-0.79838413000106812000), _DATAF(-0.60214847326278687000)},

6555 {_DATAF(-0.79861497879028320000), _DATAF(-0.60184222459793091000)},

6556 {_DATAF(-0.79884576797485352000), _DATAF(-0.60153591632843018000)},

6557 {_DATAF(-0.79907637834548950000), _DATAF(-0.60122954845428467000)},

6558 {_DATAF(-0.79930686950683594000), _DATAF(-0.60092306137084961000)},

6559 {_DATAF(-0.79953724145889282000), _DATAF(-0.60061645507812500000)},

6560 {_DATAF(-0.79976755380630493000), _DATAF(-0.60030978918075562000)},

6561 {_DATAF(-0.79999768733978271000), _DATAF(-0.60000306367874146000)},

6562 {_DATAF(-0.80022776126861572000), _DATAF(-0.59969621896743774000)},

6563 {_DATAF(-0.80045765638351440000), _DATAF(-0.59938931465148926000)},

6564 {_DATAF(-0.80068749189376831000), _DATAF(-0.59908229112625122000)},

6565 {_DATAF(-0.80091714859008789000), _DATAF(-0.59877520799636841000)},

6566 {_DATAF(-0.80114674568176270000), _DATAF(-0.59846800565719604000)},

6567 {_DATAF(-0.80137616395950317000), _DATAF(-0.59816068410873413000)},

6568 {_DATAF(-0.80160552263259888000), _DATAF(-0.59785336256027222000)},

6569 {_DATAF(-0.80183470249176025000), _DATAF(-0.59754586219787598000)},

6570 {_DATAF(-0.80206382274627686000), _DATAF(-0.59723836183547974000)},

6571 {_DATAF(-0.80229282379150391000), _DATAF(-0.59693068265914917000)},

6572 {_DATAF(-0.80252164602279663000), _DATAF(-0.59662300348281860000)},

6573 {_DATAF(-0.80275040864944458000), _DATAF(-0.59631520509719849000)},

6574 {_DATAF(-0.80297905206680298000), _DATAF(-0.59600728750228882000)},

6575 {_DATAF(-0.80320751667022705000), _DATAF(-0.59569931030273438000)},

6576 {_DATAF(-0.80343592166900635000), _DATAF(-0.59539121389389038000)},

6577 {_DATAF(-0.80366420745849609000), _DATAF(-0.59508305788040161000)},

6578 {_DATAF(-0.80389231443405151000), _DATAF(-0.59477484226226807000)},

6579 {_DATAF(-0.80412036180496216000), _DATAF(-0.59446650743484497000)},

6580 {_DATAF(-0.80434828996658325000), _DATAF(-0.59415805339813232000)},

6581 {_DATAF(-0.80457609891891479000), _DATAF(-0.59384959936141968000)},

6582 {_DATAF(-0.80480378866195679000), _DATAF(-0.59354096651077271000)},

6583 {_DATAF(-0.80503135919570923000), _DATAF(-0.59323227405548096000)},

6584 {_DATAF(-0.80525875091552734000), _DATAF(-0.59292352199554443000)},

6585 {_DATAF(-0.80548608303070068000), _DATAF(-0.59261465072631836000)},

6586 {_DATAF(-0.80571329593658447000), _DATAF(-0.59230571985244751000)},

6587 {_DATAF(-0.80594038963317871000), _DATAF(-0.59199666976928711000)},

6588 {_DATAF(-0.80616736412048340000), _DATAF(-0.59168756008148193000)},

6589 {_DATAF(-0.80639421939849854000), _DATAF(-0.59137839078903198000)},

6590 {_DATAF(-0.80662095546722412000), _DATAF(-0.59106910228729248000)},

6591 {_DATAF(-0.80684757232666016000), _DATAF(-0.59075969457626343000)},

6592 {_DATAF(-0.80707406997680664000), _DATAF(-0.59045022726058960000)},

6593 {_DATAF(-0.80730044841766357000), _DATAF(-0.59014070034027100000)},

6594 {_DATAF(-0.80752670764923096000), _DATAF(-0.58983105421066284000)},

6595 {_DATAF(-0.80775284767150879000), _DATAF(-0.58952128887176514000)},

6596 {_DATAF(-0.80797880887985229000), _DATAF(-0.58921152353286743000)},

6597 {_DATAF(-0.80820471048355103000), _DATAF(-0.58890157938003540000)},

6598 {_DATAF(-0.80843049287796021000), _DATAF(-0.58859163522720337000)},

6599 {_DATAF(-0.80865615606307983000), _DATAF(-0.58828157186508179000)},

6600 {_DATAF(-0.80888170003890991000), _DATAF(-0.58797138929367065000)},

6601 {_DATAF(-0.80910712480545044000), _DATAF(-0.58766114711761475000)},

6602 {_DATAF(-0.80933243036270142000), _DATAF(-0.58735078573226929000)},

6603 {_DATAF(-0.80955761671066284000), _DATAF(-0.58704036474227905000)},

6604 {_DATAF(-0.80978268384933472000), _DATAF(-0.58672988414764404000)},

6605 {_DATAF(-0.81000763177871704000), _DATAF(-0.58641928434371948000)},

6606 {_DATAF(-0.81023246049880981000), _DATAF(-0.58610862493515015000)},

6607 {_DATAF(-0.81045717000961304000), _DATAF(-0.58579784631729126000)},

6608 {_DATAF(-0.81068176031112671000), _DATAF(-0.58548700809478760000)},

6609 {_DATAF(-0.81090623140335083000), _DATAF(-0.58517605066299438000)},

6610 {_DATAF(-0.81113064289093018000), _DATAF(-0.58486503362655640000)},

6611 {_DATAF(-0.81135487556457520000), _DATAF(-0.58455395698547363000)},

6612 {_DATAF(-0.81157898902893066000), _DATAF(-0.58424276113510132000)},

6613 {_DATAF(-0.81180298328399658000), _DATAF(-0.58393144607543945000)},

6614 {_DATAF(-0.81202685832977295000), _DATAF(-0.58362013101577759000)},

6615 {_DATAF(-0.81225061416625977000), _DATAF(-0.58330863714218140000)},

6616 {_DATAF(-0.81247425079345703000), _DATAF(-0.58299714326858521000)},

6617 {_DATAF(-0.81269776821136475000), _DATAF(-0.58268547058105469000)},

6618 {_DATAF(-0.81292116641998291000), _DATAF(-0.58237379789352417000)},

6619 {_DATAF(-0.81314438581466675000), _DATAF(-0.58206200599670410000)},

6620 {_DATAF(-0.81336754560470581000), _DATAF(-0.58175009489059448000)},

6621 {_DATAF(-0.81359058618545532000), _DATAF(-0.58143812417984009000)},

6622 {_DATAF(-0.81381350755691528000), _DATAF(-0.58112609386444092000)},

6623 {_DATAF(-0.81403630971908569000), _DATAF(-0.58081394433975220000)},

6624 {_DATAF(-0.81425899267196655000), _DATAF(-0.58050173521041870000)},

6625 {_DATAF(-0.81448155641555786000), _DATAF(-0.58018940687179565000)},

6626 {_DATAF(-0.81470400094985962000), _DATAF(-0.57987701892852783000)},

6627 {_DATAF(-0.81492632627487183000), _DATAF(-0.57956457138061523000)},

6628 {_DATAF(-0.81514853239059448000), _DATAF(-0.57925200462341309000)},

6629 {_DATAF(-0.81537061929702759000), _DATAF(-0.57893931865692139000)},

6630 {_DATAF(-0.81559258699417114000), _DATAF(-0.57862663269042969000)},

6631 {_DATAF(-0.81581443548202515000), _DATAF(-0.57831376791000366000)},

6632 {_DATAF(-0.81603610515594482000), _DATAF(-0.57800090312957764000)},

6633 {_DATAF(-0.81625771522521973000), _DATAF(-0.57768791913986206000)},

6634 {_DATAF(-0.81647920608520508000), _DATAF(-0.57737481594085693000)},

6635 {_DATAF(-0.81670057773590088000), _DATAF(-0.57706165313720703000)},

6636 {_DATAF(-0.81692183017730713000), _DATAF(-0.57674843072891235000)},

6637 {_DATAF(-0.81714290380477905000), _DATAF(-0.57643508911132813000)},

6638 {_DATAF(-0.81736391782760620000), _DATAF(-0.57612168788909912000)},

6639 {_DATAF(-0.81758481264114380000), _DATAF(-0.57580816745758057000)},

6640 {_DATAF(-0.81780558824539185000), _DATAF(-0.57549458742141724000)},

6641 {_DATAF(-0.81802618503570557000), _DATAF(-0.57518094778060913000)},

6642 {_DATAF(-0.81824672222137451000), _DATAF(-0.57486718893051147000)},

6643 {_DATAF(-0.81846714019775391000), _DATAF(-0.57455337047576904000)},

6644 {_DATAF(-0.81868737936019897000), _DATAF(-0.57423943281173706000)},

6645 {_DATAF(-0.81890755891799927000), _DATAF(-0.57392543554306030000)},

6646 {_DATAF(-0.81912761926651001000), _DATAF(-0.57361131906509399000)},

6647 {_DATAF(-0.81934750080108643000), _DATAF(-0.57329714298248291000)},

6648 {_DATAF(-0.81956732273101807000), _DATAF(-0.57298290729522705000)},

6649 {_DATAF(-0.81978696584701538000), _DATAF(-0.57266855239868164000)},

6650 {_DATAF(-0.82000654935836792000), _DATAF(-0.57235413789749146000)},

6651 {_DATAF(-0.82022595405578613000), _DATAF(-0.57203960418701172000)},

6652 {_DATAF(-0.82044529914855957000), _DATAF(-0.57172501087188721000)},

6653 {_DATAF(-0.82066446542739868000), _DATAF(-0.57141035795211792000)},

6654 {_DATAF(-0.82088357210159302000), _DATAF(-0.57109558582305908000)},

6655 {_DATAF(-0.82110249996185303000), _DATAF(-0.57078075408935547000)},

6656 {_DATAF(-0.82132136821746826000), _DATAF(-0.57046580314636230000)},

6657 {_DATAF(-0.82154005765914917000), _DATAF(-0.57015079259872437000)},

6658 {_DATAF(-0.82175862789154053000), _DATAF(-0.56983572244644165000)},

6659 {_DATAF(-0.82197713851928711000), _DATAF(-0.56952053308486938000)},

6660 {_DATAF(-0.82219547033309937000), _DATAF(-0.56920522451400757000)},

6661 {_DATAF(-0.82241368293762207000), _DATAF(-0.56888991594314575000)},

6662 {_DATAF(-0.82263177633285522000), _DATAF(-0.56857448816299438000)},

6663 {_DATAF(-0.82284981012344360000), _DATAF(-0.56825894117355347000)},

6664 {_DATAF(-0.82306766510009766000), _DATAF(-0.56794333457946777000)},

6665 {_DATAF(-0.82328540086746216000), _DATAF(-0.56762766838073730000)},

6666 {_DATAF(-0.82350301742553711000), _DATAF(-0.56731188297271729000)},

6667 {_DATAF(-0.82372051477432251000), _DATAF(-0.56699603796005249000)},

6668 {_DATAF(-0.82393789291381836000), _DATAF(-0.56668013334274292000)},

6669 {_DATAF(-0.82415515184402466000), _DATAF(-0.56636410951614380000)},

6670 {_DATAF(-0.82437229156494141000), _DATAF(-0.56604796648025513000)},

6671 {_DATAF(-0.82458931207656860000), _DATAF(-0.56573182344436646000)},

6672 {_DATAF(-0.82480621337890625000), _DATAF(-0.56541556119918823000)},

6673 {_DATAF(-0.82502299547195435000), _DATAF(-0.56509917974472046000)},

6674 {_DATAF(-0.82523959875106812000), _DATAF(-0.56478273868560791000)},

6675 {_DATAF(-0.82545614242553711000), _DATAF(-0.56446623802185059000)},

6676 {_DATAF(-0.82567256689071655000), _DATAF(-0.56414961814880371000)},

6677 {_DATAF(-0.82588887214660645000), _DATAF(-0.56383293867111206000)},

6678 {_DATAF(-0.82610499858856201000), _DATAF(-0.56351619958877563000)},

6679 {_DATAF(-0.82632106542587280000), _DATAF(-0.56319934129714966000)},

6680 {_DATAF(-0.82653701305389404000), _DATAF(-0.56288242340087891000)},

6681 {_DATAF(-0.82675278186798096000), _DATAF(-0.56256538629531860000)},

6682 {_DATAF(-0.82696849107742310000), _DATAF(-0.56224828958511353000)},

6683 {_DATAF(-0.82718402147293091000), _DATAF(-0.56193113327026367000)},

6684 {_DATAF(-0.82739949226379395000), _DATAF(-0.56161385774612427000)},

6685 {_DATAF(-0.82761478424072266000), _DATAF(-0.56129652261734009000)},

6686 {_DATAF(-0.82782995700836182000), _DATAF(-0.56097906827926636000)},

6687 {_DATAF(-0.82804507017135620000), _DATAF(-0.56066155433654785000)},

6688 {_DATAF(-0.82826000452041626000), _DATAF(-0.56034398078918457000)},

6689 {_DATAF(-0.82847481966018677000), _DATAF(-0.56002628803253174000)},

6690 {_DATAF(-0.82868951559066772000), _DATAF(-0.55970853567123413000)},

6691 {_DATAF(-0.82890409231185913000), _DATAF(-0.55939072370529175000)},

6692 {_DATAF(-0.82911854982376099000), _DATAF(-0.55907279253005981000)},

6693 {_DATAF(-0.82933294773101807000), _DATAF(-0.55875480175018311000)},

6694 {_DATAF(-0.82954710721969604000), _DATAF(-0.55843669176101685000)},

6695 {_DATAF(-0.82976120710372925000), _DATAF(-0.55811852216720581000)},

6696 {_DATAF(-0.82997518777847290000), _DATAF(-0.55780029296875000000)},

6697 {_DATAF(-0.83018904924392700000), _DATAF(-0.55748194456100464000)},

6698 {_DATAF(-0.83040279150009155000), _DATAF(-0.55716353654861450000)},

6699 {_DATAF(-0.83061641454696655000), _DATAF(-0.55684500932693481000)},

6700 {_DATAF(-0.83082985877990723000), _DATAF(-0.55652648210525513000)},

6701 {_DATAF(-0.83104324340820313000), _DATAF(-0.55620777606964111000)},

6702 {_DATAF(-0.83125650882720947000), _DATAF(-0.55588907003402710000)},

6703 {_DATAF(-0.83146959543228149000), _DATAF(-0.55557024478912354000)},

6704 {_DATAF(-0.83168262243270874000), _DATAF(-0.55525130033493042000)},

6705 {_DATAF(-0.83189547061920166000), _DATAF(-0.55493235588073730000)},

6706 {_DATAF(-0.83210825920104980000), _DATAF(-0.55461329221725464000)},

6707 {_DATAF(-0.83232086896896362000), _DATAF(-0.55429410934448242000)},

6708 {_DATAF(-0.83253335952758789000), _DATAF(-0.55397486686706543000)},

6709 {_DATAF(-0.83274579048156738000), _DATAF(-0.55365556478500366000)},

6710 {_DATAF(-0.83295804262161255000), _DATAF(-0.55333620309829712000)},

6711 {_DATAF(-0.83317017555236816000), _DATAF(-0.55301672220230103000)},

6712 {_DATAF(-0.83338218927383423000), _DATAF(-0.55269712209701538000)},

6713 {_DATAF(-0.83359408378601074000), _DATAF(-0.55237752199172974000)},

6714 {_DATAF(-0.83380585908889771000), _DATAF(-0.55205780267715454000)},

6715 {_DATAF(-0.83401751518249512000), _DATAF(-0.55173796415328979000)},

6716 {_DATAF(-0.83422905206680298000), _DATAF(-0.55141812562942505000)},

6717 {_DATAF(-0.83444041013717651000), _DATAF(-0.55109816789627075000)},

6718 {_DATAF(-0.83465170860290527000), _DATAF(-0.55077809095382690000)},

6719 {_DATAF(-0.83486288785934448000), _DATAF(-0.55045795440673828000)},

6720 {_DATAF(-0.83507388830184937000), _DATAF(-0.55013775825500488000)},

6721 {_DATAF(-0.83528482913970947000), _DATAF(-0.54981750249862671000)},

6722 {_DATAF(-0.83549559116363525000), _DATAF(-0.54949712753295898000)},

6723 {_DATAF(-0.83570629358291626000), _DATAF(-0.54917663335800171000)},

6724 {_DATAF(-0.83591681718826294000), _DATAF(-0.54885613918304443000)},

6725 {_DATAF(-0.83612728118896484000), _DATAF(-0.54853552579879761000)},

6726 {_DATAF(-0.83633756637573242000), _DATAF(-0.54821485280990601000)},

6727 {_DATAF(-0.83654773235321045000), _DATAF(-0.54789406061172485000)},

6728 {_DATAF(-0.83675777912139893000), _DATAF(-0.54757320880889893000)},

6729 {_DATAF(-0.83696770668029785000), _DATAF(-0.54725229740142822000)},

6730 {_DATAF(-0.83717751502990723000), _DATAF(-0.54693126678466797000)},

6731 {_DATAF(-0.83738720417022705000), _DATAF(-0.54661017656326294000)},

6732 {_DATAF(-0.83759677410125732000), _DATAF(-0.54628896713256836000)},

6733 {_DATAF(-0.83780622482299805000), _DATAF(-0.54596775770187378000)},

6734 {_DATAF(-0.83801549673080444000), _DATAF(-0.54564642906188965000)},

6735 {_DATAF(-0.83822470903396606000), _DATAF(-0.54532498121261597000)},

6736 {_DATAF(-0.83843380212783813000), _DATAF(-0.54500347375869751000)},

6737 {_DATAF(-0.83864271640777588000), _DATAF(-0.54468190670013428000)},

6738 {_DATAF(-0.83885151147842407000), _DATAF(-0.54436028003692627000)},

6739 {_DATAF(-0.83906024694442749000), _DATAF(-0.54403853416442871000)},

6740 {_DATAF(-0.83926880359649658000), _DATAF(-0.54371672868728638000)},

6741 {_DATAF(-0.83947724103927612000), _DATAF(-0.54339480400085449000)},

6742 {_DATAF(-0.83968561887741089000), _DATAF(-0.54307281970977783000)},

6743 {_DATAF(-0.83989381790161133000), _DATAF(-0.54275077581405640000)},

6744 {_DATAF(-0.84010189771652222000), _DATAF(-0.54242867231369019000)},

6745 {_DATAF(-0.84030985832214355000), _DATAF(-0.54210644960403442000)},

6746 {_DATAF(-0.84051764011383057000), _DATAF(-0.54178416728973389000)},

6747 {_DATAF(-0.84072536230087280000), _DATAF(-0.54146176576614380000)},

6748 {_DATAF(-0.84093296527862549000), _DATAF(-0.54113930463790894000)},

6749 {_DATAF(-0.84114044904708862000), _DATAF(-0.54081678390502930000)},

6750 {_DATAF(-0.84134775400161743000), _DATAF(-0.54049414396286011000)},

6751 {_DATAF(-0.84155499935150146000), _DATAF(-0.54017144441604614000)},

6752 {_DATAF(-0.84176206588745117000), _DATAF(-0.53984868526458740000)},

6753 {_DATAF(-0.84196901321411133000), _DATAF(-0.53952586650848389000)},

6754 {_DATAF(-0.84217590093612671000), _DATAF(-0.53920292854309082000)},

6755 {_DATAF(-0.84238260984420776000), _DATAF(-0.53887993097305298000)},

6756 {_DATAF(-0.84258919954299927000), _DATAF(-0.53855681419372559000)},

6757 {_DATAF(-0.84279567003250122000), _DATAF(-0.53823363780975342000)},

6758 {_DATAF(-0.84300202131271362000), _DATAF(-0.53791040182113647000)},

6759 {_DATAF(-0.84320825338363647000), _DATAF(-0.53758704662322998000)},

6760 {_DATAF(-0.84341436624526978000), _DATAF(-0.53726369142532349000)},

6761 {_DATAF(-0.84362030029296875000), _DATAF(-0.53694015741348267000)},

6762 {_DATAF(-0.84382617473602295000), _DATAF(-0.53661662340164185000)},

6763 {_DATAF(-0.84403187036514282000), _DATAF(-0.53629297018051147000)},

6764 {_DATAF(-0.84423750638961792000), _DATAF(-0.53596925735473633000)},

6765 {_DATAF(-0.84444296360015869000), _DATAF(-0.53564548492431641000)},

6766 {_DATAF(-0.84464836120605469000), _DATAF(-0.53532159328460693000)},

6767 {_DATAF(-0.84485357999801636000), _DATAF(-0.53499764204025269000)},

6768 {_DATAF(-0.84505867958068848000), _DATAF(-0.53467357158660889000)},

6769 {_DATAF(-0.84526365995407104000), _DATAF(-0.53434944152832031000)},

6770 {_DATAF(-0.84546852111816406000), _DATAF(-0.53402525186538696000)},

6771 {_DATAF(-0.84567326307296753000), _DATAF(-0.53370100259780884000)},

6772 {_DATAF(-0.84587788581848145000), _DATAF(-0.53337663412094116000)},

6773 {_DATAF(-0.84608232975006104000), _DATAF(-0.53305220603942871000)},

6774 {_DATAF(-0.84628671407699585000), _DATAF(-0.53272771835327148000)},

6775 {_DATAF(-0.84649091958999634000), _DATAF(-0.53240311145782471000)},

6776 {_DATAF(-0.84669506549835205000), _DATAF(-0.53207844495773315000)},

6777 {_DATAF(-0.84689903259277344000), _DATAF(-0.53175371885299683000)},

6778 {_DATAF(-0.84710288047790527000), _DATAF(-0.53142887353897095000)},

6779 {_DATAF(-0.84730660915374756000), _DATAF(-0.53110402822494507000)},

6780 {_DATAF(-0.84751027822494507000), _DATAF(-0.53077900409698486000)},

6781 {_DATAF(-0.84771376848220825000), _DATAF(-0.53045397996902466000)},

6782 {_DATAF(-0.84791707992553711000), _DATAF(-0.53012883663177490000)},

6783 {_DATAF(-0.84812033176422119000), _DATAF(-0.52980363368988037000)},

6784 {_DATAF(-0.84832346439361572000), _DATAF(-0.52947831153869629000)},

6785 {_DATAF(-0.84852647781372070000), _DATAF(-0.52915298938751221000)},

6786 {_DATAF(-0.84872931241989136000), _DATAF(-0.52882754802703857000)},

6787 {_DATAF(-0.84893202781677246000), _DATAF(-0.52850198745727539000)},

6788 {_DATAF(-0.84913468360900879000), _DATAF(-0.52817642688751221000)},

6789 {_DATAF(-0.84933716058731079000), _DATAF(-0.52785074710845947000)},

6790 {_DATAF(-0.84953951835632324000), _DATAF(-0.52752494812011719000)},

6791 {_DATAF(-0.84974175691604614000), _DATAF(-0.52719914913177490000)},

6792 {_DATAF(-0.84994387626647949000), _DATAF(-0.52687323093414307000)},

6793 {_DATAF(-0.85014587640762329000), _DATAF(-0.52654725313186646000)},

6794 {_DATAF(-0.85034775733947754000), _DATAF(-0.52622115612030029000)},

6795 {_DATAF(-0.85054945945739746000), _DATAF(-0.52589499950408936000)},

6796 {_DATAF(-0.85075110197067261000), _DATAF(-0.52556878328323364000)},

6797 {_DATAF(-0.85095256567001343000), _DATAF(-0.52524250745773315000)},

6798 {_DATAF(-0.85115396976470947000), _DATAF(-0.52491611242294312000)},

6799 {_DATAF(-0.85135519504547119000), _DATAF(-0.52458965778350830000)},

6800 {_DATAF(-0.85155630111694336000), _DATAF(-0.52426314353942871000)},

6801 {_DATAF(-0.85175728797912598000), _DATAF(-0.52393656969070435000)},

6802 {_DATAF(-0.85195815563201904000), _DATAF(-0.52360987663269043000)},

6803 {_DATAF(-0.85215890407562256000), _DATAF(-0.52328312397003174000)},

6804 {_DATAF(-0.85235953330993652000), _DATAF(-0.52295625209808350000)},

6805 {_DATAF(-0.85255998373031616000), _DATAF(-0.52262938022613525000)},

6806 {_DATAF(-0.85276037454605103000), _DATAF(-0.52230238914489746000)},

6807 {_DATAF(-0.85296058654785156000), _DATAF(-0.52197527885437012000)},

6808 {_DATAF(-0.85316073894500732000), _DATAF(-0.52164816856384277000)},

6809 {_DATAF(-0.85336071252822876000), _DATAF(-0.52132093906402588000)},

6810 {_DATAF(-0.85356056690216064000), _DATAF(-0.52099364995956421000)},

6811 {_DATAF(-0.85376030206680298000), _DATAF(-0.52066624164581299000)},

6812 {_DATAF(-0.85395991802215576000), _DATAF(-0.52033877372741699000)},

6813 {_DATAF(-0.85415941476821899000), _DATAF(-0.52001124620437622000)},

6814 {_DATAF(-0.85435873270034790000), _DATAF(-0.51968365907669067000)},

6815 {_DATAF(-0.85455799102783203000), _DATAF(-0.51935601234436035000)},

6816 {_DATAF(-0.85475707054138184000), _DATAF(-0.51902824640274048000)},

6817 {_DATAF(-0.85495609045028687000), _DATAF(-0.51870042085647583000)},

6818 {_DATAF(-0.85515493154525757000), _DATAF(-0.51837247610092163000)},

6819 {_DATAF(-0.85535365343093872000), _DATAF(-0.51804453134536743000)},

6820 {_DATAF(-0.85555225610733032000), _DATAF(-0.51771646738052368000)},

6821 {_DATAF(-0.85575073957443237000), _DATAF(-0.51738828420639038000)},

6822 {_DATAF(-0.85594910383224487000), _DATAF(-0.51706010103225708000)},

6823 {_DATAF(-0.85614734888076782000), _DATAF(-0.51673179864883423000)},

6824 {_DATAF(-0.85634541511535645000), _DATAF(-0.51640343666076660000)},

6825 {_DATAF(-0.85654342174530029000), _DATAF(-0.51607501506805420000)},

6826 {_DATAF(-0.85674124956130981000), _DATAF(-0.51574647426605225000)},

6827 {_DATAF(-0.85693895816802979000), _DATAF(-0.51541787385940552000)},

6828 {_DATAF(-0.85713654756546021000), _DATAF(-0.51508921384811401000)},

6829 {_DATAF(-0.85733401775360107000), _DATAF(-0.51476043462753296000)},

6830 {_DATAF(-0.85753136873245239000), _DATAF(-0.51443165540695190000)},

6831 {_DATAF(-0.85772860050201416000), _DATAF(-0.51410275697708130000)},

6832 {_DATAF(-0.85792571306228638000), _DATAF(-0.51377379894256592000)},

6833 {_DATAF(-0.85812264680862427000), _DATAF(-0.51344472169876099000)},

6834 {_DATAF(-0.85831952095031738000), _DATAF(-0.51311558485031128000)},

6835 {_DATAF(-0.85851621627807617000), _DATAF(-0.51278638839721680000)},

6836 {_DATAF(-0.85871279239654541000), _DATAF(-0.51245713233947754000)},

6837 {_DATAF(-0.85890924930572510000), _DATAF(-0.51212775707244873000)},

6838 {_DATAF(-0.85910558700561523000), _DATAF(-0.51179832220077515000)},

6839 {_DATAF(-0.85930180549621582000), _DATAF(-0.51146882772445679000)},

6840 {_DATAF(-0.85949790477752686000), _DATAF(-0.51113927364349365000)},

6841 {_DATAF(-0.85969388484954834000), _DATAF(-0.51080960035324097000)},

6842 {_DATAF(-0.85988968610763550000), _DATAF(-0.51047992706298828000)},

6843 {_DATAF(-0.86008536815643311000), _DATAF(-0.51015007495880127000)},

6844 {_DATAF(-0.86028099060058594000), _DATAF(-0.50982022285461426000)},

6845 {_DATAF(-0.86047643423080444000), _DATAF(-0.50949025154113770000)},

6846 {_DATAF(-0.86067175865173340000), _DATAF(-0.50916022062301636000)},

6847 {_DATAF(-0.86086696386337280000), _DATAF(-0.50883013010025024000)},

6848 {_DATAF(-0.86106199026107788000), _DATAF(-0.50849997997283936000)},

6849 {_DATAF(-0.86125695705413818000), _DATAF(-0.50816971063613892000)},

6850 {_DATAF(-0.86145174503326416000), _DATAF(-0.50783938169479370000)},

6851 {_DATAF(-0.86164647340774536000), _DATAF(-0.50750899314880371000)},

6852 {_DATAF(-0.86184102296829224000), _DATAF(-0.50717854499816895000)},

6853 {_DATAF(-0.86203545331954956000), _DATAF(-0.50684797763824463000)},

6854 {_DATAF(-0.86222976446151733000), _DATAF(-0.50651735067367554000)},

6855 {_DATAF(-0.86242395639419556000), _DATAF(-0.50618666410446167000)},

6856 {_DATAF(-0.86261802911758423000), _DATAF(-0.50585585832595825000)},

6857 {_DATAF(-0.86281192302703857000), _DATAF(-0.50552505254745483000)},

6858 {_DATAF(-0.86300575733184814000), _DATAF(-0.50519412755966187000)},

6859 {_DATAF(-0.86319941282272339000), _DATAF(-0.50486308336257935000)},

6860 {_DATAF(-0.86339294910430908000), _DATAF(-0.50453203916549683000)},

6861 {_DATAF(-0.86358636617660522000), _DATAF(-0.50420087575912476000)},

6862 {_DATAF(-0.86377966403961182000), _DATAF(-0.50386965274810791000)},

6863 {_DATAF(-0.86397284269332886000), _DATAF(-0.50353837013244629000)},

6864 {_DATAF(-0.86416590213775635000), _DATAF(-0.50320702791213989000)},

6865 {_DATAF(-0.86435878276824951000), _DATAF(-0.50287556648254395000)},

6866 {_DATAF(-0.86455160379409790000), _DATAF(-0.50254404544830322000)},

6867 {_DATAF(-0.86474424600601196000), _DATAF(-0.50221246480941772000)},

6868 {_DATAF(-0.86493676900863647000), _DATAF(-0.50188082456588745000)},

6869 {_DATAF(-0.86512917280197144000), _DATAF(-0.50154906511306763000)},

6870 {_DATAF(-0.86532145738601685000), _DATAF(-0.50121724605560303000)},

6871 {_DATAF(-0.86551362276077271000), _DATAF(-0.50088536739349365000)},

6872 {_DATAF(-0.86570566892623901000), _DATAF(-0.50055342912673950000)},

6873 {_DATAF(-0.86589753627777100000), _DATAF(-0.50022137165069580000)},

6874 {_DATAF(-0.86608928442001343000), _DATAF(-0.49988928437232971000)},

6875 {_DATAF(-0.86628097295761108000), _DATAF(-0.49955710768699646000)},

6876 {_DATAF(-0.86647248268127441000), _DATAF(-0.49922487139701843000)},

6877 {_DATAF(-0.86666387319564819000), _DATAF(-0.49889254570007324000)},

6878 {_DATAF(-0.86685508489608765000), _DATAF(-0.49856013059616089000)},

6879 {_DATAF(-0.86704623699188232000), _DATAF(-0.49822765588760376000)},

6880 {_DATAF(-0.86723726987838745000), _DATAF(-0.49789512157440186000)},

6881 {_DATAF(-0.86742812395095825000), _DATAF(-0.49756249785423279000)},

6882 {_DATAF(-0.86761885881423950000), _DATAF(-0.49722981452941895000)},

6883 {_DATAF(-0.86780947446823120000), _DATAF(-0.49689704179763794000)},

6884 {_DATAF(-0.86799997091293335000), _DATAF(-0.49656420946121216000)},

6885 {_DATAF(-0.86819034814834595000), _DATAF(-0.49623128771781921000)},

6886 {_DATAF(-0.86838060617446899000), _DATAF(-0.49589830636978149000)},

6887 {_DATAF(-0.86857068538665771000), _DATAF(-0.49556526541709900000)},

6888 {_DATAF(-0.86876070499420166000), _DATAF(-0.49523213505744934000)},

6889 {_DATAF(-0.86895054578781128000), _DATAF(-0.49489894509315491000)},

6890 {_DATAF(-0.86914026737213135000), _DATAF(-0.49456566572189331000)},

6891 {_DATAF(-0.86932986974716187000), _DATAF(-0.49423229694366455000)},

6892 {_DATAF(-0.86951935291290283000), _DATAF(-0.49389889836311340000)},

6893 {_DATAF(-0.86970865726470947000), _DATAF(-0.49356541037559509000)},

6894 {_DATAF(-0.86989790201187134000), _DATAF(-0.49323183298110962000)},

6895 {_DATAF(-0.87008696794509888000), _DATAF(-0.49289819598197937000)},

6896 {_DATAF(-0.87027597427368164000), _DATAF(-0.49256446957588196000)},

6897 {_DATAF(-0.87046480178833008000), _DATAF(-0.49223071336746216000)},

6898 {_DATAF(-0.87065351009368896000), _DATAF(-0.49189683794975281000)},

6899 {_DATAF(-0.87084203958511353000), _DATAF(-0.49156290292739868000)},

6900 {_DATAF(-0.87103050947189331000), _DATAF(-0.49122890830039978000)},

6901 {_DATAF(-0.87121886014938354000), _DATAF(-0.49089485406875610000)},

6902 {_DATAF(-0.87140703201293945000), _DATAF(-0.49056071043014526000)},

6903 {_DATAF(-0.87159508466720581000), _DATAF(-0.49022647738456726000)},

6904 {_DATAF(-0.87178301811218262000), _DATAF(-0.48989218473434448000)},

6905 {_DATAF(-0.87197083234786987000), _DATAF(-0.48955783247947693000)},

6906 {_DATAF(-0.87215852737426758000), _DATAF(-0.48922339081764221000)},

6907 {_DATAF(-0.87234604358673096000), _DATAF(-0.48888888955116272000)},

6908 {_DATAF(-0.87253350019454956000), _DATAF(-0.48855432868003845000)},

6909 {_DATAF(-0.87272077798843384000), _DATAF(-0.48821967840194702000)},

6910 {_DATAF(-0.87290793657302856000), _DATAF(-0.48788493871688843000)},

6911 {_DATAF(-0.87309497594833374000), _DATAF(-0.48755016922950745000)},

6912 {_DATAF(-0.87328189611434937000), _DATAF(-0.48721531033515930000)},

6913 {_DATAF(-0.87346869707107544000), _DATAF(-0.48688036203384399000)},

6914 {_DATAF(-0.87365531921386719000), _DATAF(-0.48654535412788391000)},

6915 {_DATAF(-0.87384182214736938000), _DATAF(-0.48621028661727905000)},

6916 {_DATAF(-0.87402826547622681000), _DATAF(-0.48587512969970703000)},

6917 {_DATAF(-0.87421452999114990000), _DATAF(-0.48553991317749023000)},

6918 {_DATAF(-0.87440061569213867000), _DATAF(-0.48520460724830627000)},

6919 {_DATAF(-0.87458664178848267000), _DATAF(-0.48486924171447754000)},

6920 {_DATAF(-0.87477254867553711000), _DATAF(-0.48453381657600403000)},

6921 {_DATAF(-0.87495827674865723000), _DATAF(-0.48419830203056335000)},

6922 {_DATAF(-0.87514388561248779000), _DATAF(-0.48386272788047791000)},

6923 {_DATAF(-0.87532937526702881000), _DATAF(-0.48352706432342529000)},

6924 {_DATAF(-0.87551474571228027000), _DATAF(-0.48319137096405029000)},

6925 {_DATAF(-0.87569999694824219000), _DATAF(-0.48285555839538574000)},

6926 {_DATAF(-0.87588512897491455000), _DATAF(-0.48251971602439880000)},

6927 {_DATAF(-0.87607008218765259000), _DATAF(-0.48218378424644470000)},

6928 {_DATAF(-0.87625491619110107000), _DATAF(-0.48184776306152344000)},

6929 {_DATAF(-0.87643969058990479000), _DATAF(-0.48151168227195740000)},

6930 {_DATAF(-0.87662428617477417000), _DATAF(-0.48117554187774658000)},

6931 {_DATAF(-0.87680870294570923000), _DATAF(-0.48083934187889099000)},

6932 {_DATAF(-0.87699306011199951000), _DATAF(-0.48050305247306824000)},

6933 {_DATAF(-0.87717723846435547000), _DATAF(-0.48016667366027832000)},

6934 {_DATAF(-0.87736135721206665000), _DATAF(-0.47983026504516602000)},

6935 {_DATAF(-0.87754529714584351000), _DATAF(-0.47949376702308655000)},

6936 {_DATAF(-0.87772911787033081000), _DATAF(-0.47915717959403992000)},

6937 {_DATAF(-0.87791281938552856000), _DATAF(-0.47882056236267090000)},

6938 {_DATAF(-0.87809634208679199000), _DATAF(-0.47848382592201233000)},

6939 {_DATAF(-0.87827980518341064000), _DATAF(-0.47814705967903137000)},

6940 {_DATAF(-0.87846308946609497000), _DATAF(-0.47781020402908325000)},

6941 {_DATAF(-0.87864625453948975000), _DATAF(-0.47747328877449036000)},

6942 {_DATAF(-0.87882930040359497000), _DATAF(-0.47713628411293030000)},

6943 {_DATAF(-0.87901222705841064000), _DATAF(-0.47679921984672546000)},

6944 {_DATAF(-0.87919503450393677000), _DATAF(-0.47646209597587585000)},

6945 {_DATAF(-0.87937766313552856000), _DATAF(-0.47612488269805908000)},

6946 {_DATAF(-0.87956017255783081000), _DATAF(-0.47578760981559753000)},

6947 {_DATAF(-0.87974262237548828000), _DATAF(-0.47545027732849121000)},

6948 {_DATAF(-0.87992483377456665000), _DATAF(-0.47511285543441772000)},

6949 {_DATAF(-0.88010698556900024000), _DATAF(-0.47477537393569946000)},

6950 {_DATAF(-0.88028901815414429000), _DATAF(-0.47443783283233643000)},

6951 {_DATAF(-0.88047087192535400000), _DATAF(-0.47410020232200623000)},

6952 {_DATAF(-0.88065266609191895000), _DATAF(-0.47376251220703125000)},

6953 {_DATAF(-0.88083428144454956000), _DATAF(-0.47342476248741150000)},

6954 {_DATAF(-0.88101577758789063000), _DATAF(-0.47308692336082458000)},

6955 {_DATAF(-0.88119709491729736000), _DATAF(-0.47274902462959290000)},

6956 {_DATAF(-0.88137835264205933000), _DATAF(-0.47241106629371643000)},

6957 {_DATAF(-0.88155943155288696000), _DATAF(-0.47207301855087280000)},

6958 {_DATAF(-0.88174045085906982000), _DATAF(-0.47173491120338440000)},

6959 {_DATAF(-0.88192129135131836000), _DATAF(-0.47139674425125122000)},

6960 {_DATAF(-0.88210195302963257000), _DATAF(-0.47105848789215088000)},

6961 {_DATAF(-0.88228255510330200000), _DATAF(-0.47072017192840576000)},

6962 {_DATAF(-0.88246303796768188000), _DATAF(-0.47038179636001587000)},

6963 {_DATAF(-0.88264334201812744000), _DATAF(-0.47004333138465881000)},

6964 {_DATAF(-0.88282352685928345000), _DATAF(-0.46970480680465698000)},

6965 {_DATAF(-0.88300359249114990000), _DATAF(-0.46936622262001038000)},

6966 {_DATAF(-0.88318353891372681000), _DATAF(-0.46902754902839661000)},

6967 {_DATAF(-0.88336336612701416000), _DATAF(-0.46868881583213806000)},

6968 {_DATAF(-0.88354301452636719000), _DATAF(-0.46835002303123474000)},

6969 {_DATAF(-0.88372254371643066000), _DATAF(-0.46801114082336426000)},

6970 {_DATAF(-0.88390195369720459000), _DATAF(-0.46767222881317139000)},

6971 {_DATAF(-0.88408124446868896000), _DATAF(-0.46733319759368896000)},

6972 {_DATAF(-0.88426041603088379000), _DATAF(-0.46699413657188416000)},

6973 {_DATAF(-0.88443946838378906000), _DATAF(-0.46665498614311218000)},

6974 {_DATAF(-0.88461834192276001000), _DATAF(-0.46631577610969543000)},

6975 {_DATAF(-0.88479709625244141000), _DATAF(-0.46597650647163391000)},

6976 {_DATAF(-0.88497573137283325000), _DATAF(-0.46563714742660522000)},

6977 {_DATAF(-0.88515424728393555000), _DATAF(-0.46529772877693176000)},

6978 {_DATAF(-0.88533258438110352000), _DATAF(-0.46495825052261353000)},

6979 {_DATAF(-0.88551086187362671000), _DATAF(-0.46461868286132813000)},

6980 {_DATAF(-0.88568896055221558000), _DATAF(-0.46427905559539795000)},

6981 {_DATAF(-0.88586694002151489000), _DATAF(-0.46393936872482300000)},

6982 {_DATAF(-0.88604480028152466000), _DATAF(-0.46359962224960327000)},

6983 {_DATAF(-0.88622254133224487000), _DATAF(-0.46325978636741638000)},

6984 {_DATAF(-0.88640010356903076000), _DATAF(-0.46291989088058472000)},

6985 {_DATAF(-0.88657760620117188000), _DATAF(-0.46257993578910828000)},

6986 {_DATAF(-0.88675493001937866000), _DATAF(-0.46223989129066467000)},

6987 {_DATAF(-0.88693213462829590000), _DATAF(-0.46189978718757629000)},

6988 {_DATAF(-0.88710916042327881000), _DATAF(-0.46155962347984314000)},

6989 {_DATAF(-0.88728612661361694000), _DATAF(-0.46121940016746521000)},

6990 {_DATAF(-0.88746291399002075000), _DATAF(-0.46087908744812012000)},

6991 {_DATAF(-0.88763964176177979000), _DATAF(-0.46053871512413025000)},

6992 {_DATAF(-0.88781619071960449000), _DATAF(-0.46019828319549561000)},

6993 {_DATAF(-0.88799256086349487000), _DATAF(-0.45985776185989380000)},

6994 {_DATAF(-0.88816887140274048000), _DATAF(-0.45951718091964722000)},

6995 {_DATAF(-0.88834506273269653000), _DATAF(-0.45917654037475586000)},

6996 {_DATAF(-0.88852107524871826000), _DATAF(-0.45883584022521973000)},

6997 {_DATAF(-0.88869696855545044000), _DATAF(-0.45849505066871643000)},

6998 {_DATAF(-0.88887274265289307000), _DATAF(-0.45815420150756836000)},

6999 {_DATAF(-0.88904833793640137000), _DATAF(-0.45781329274177551000)},

7000 {_DATAF(-0.88922387361526489000), _DATAF(-0.45747232437133789000)},

7001 {_DATAF(-0.88939923048019409000), _DATAF(-0.45713126659393311000)},

7002 {_DATAF(-0.88957446813583374000), _DATAF(-0.45679014921188354000)},

7003 {_DATAF(-0.88974958658218384000), _DATAF(-0.45644897222518921000)},

7004 {_DATAF(-0.88992458581924438000), _DATAF(-0.45610773563385010000)},

7005 {_DATAF(-0.89009940624237061000), _DATAF(-0.45576640963554382000)},

7006 {_DATAF(-0.89027410745620728000), _DATAF(-0.45542502403259277000)},

7007 {_DATAF(-0.89044874906539917000), _DATAF(-0.45508357882499695000)},

7008 {_DATAF(-0.89062315225601196000), _DATAF(-0.45474207401275635000)},

7009 {_DATAF(-0.89079749584197998000), _DATAF(-0.45440047979354858000)},

7010 {_DATAF(-0.89097172021865845000), _DATAF(-0.45405882596969604000)},

7011 {_DATAF(-0.89114576578140259000), _DATAF(-0.45371711254119873000)},

7012 {_DATAF(-0.89131969213485718000), _DATAF(-0.45337533950805664000)},

7013 {_DATAF(-0.89149349927902222000), _DATAF(-0.45303347706794739000)},

7014 {_DATAF(-0.89166718721389771000), _DATAF(-0.45269158482551575000)},

7015 {_DATAF(-0.89184069633483887000), _DATAF(-0.45234957337379456000)},

7016 {_DATAF(-0.89201414585113525000), _DATAF(-0.45200753211975098000)},

7017 {_DATAF(-0.89218741655349731000), _DATAF(-0.45166543126106262000)},

7018 {_DATAF(-0.89236056804656982000), _DATAF(-0.45132324099540710000)},

7019 {_DATAF(-0.89253354072570801000), _DATAF(-0.45098099112510681000)},

7020 {_DATAF(-0.89270645380020142000), _DATAF(-0.45063868165016174000)},

7021 {_DATAF(-0.89287918806076050000), _DATAF(-0.45029628276824951000)},

7022 {_DATAF(-0.89305180311203003000), _DATAF(-0.44995385408401489000)},

7023 {_DATAF(-0.89322429895401001000), _DATAF(-0.44961133599281311000)},

7024 {_DATAF(-0.89339667558670044000), _DATAF(-0.44926875829696655000)},

7025 {_DATAF(-0.89356887340545654000), _DATAF(-0.44892609119415283000)},

7026 {_DATAF(-0.89374095201492310000), _DATAF(-0.44858339428901672000)},

7027 {_DATAF(-0.89391297101974487000), _DATAF(-0.44824060797691345000)},

7028 {_DATAF(-0.89408475160598755000), _DATAF(-0.44789776206016541000)},

7029 {_DATAF(-0.89425647258758545000), _DATAF(-0.44755485653877258000)},

7030 {_DATAF(-0.89442807435989380000), _DATAF(-0.44721189141273499000)},

7031 {_DATAF(-0.89459949731826782000), _DATAF(-0.44686883687973022000)},

7032 {_DATAF(-0.89477080106735229000), _DATAF(-0.44652572274208069000)},

7033 {_DATAF(-0.89494198560714722000), _DATAF(-0.44618254899978638000)},

7034 {_DATAF(-0.89511299133300781000), _DATAF(-0.44583931565284729000)},

7035 {_DATAF(-0.89528393745422363000), _DATAF(-0.44549602270126343000)},

7036 {_DATAF(-0.89545470476150513000), _DATAF(-0.44515264034271240000)},

7037 {_DATAF(-0.89562535285949707000), _DATAF(-0.44480919837951660000)},

7038 {_DATAF(-0.89579588174819946000), _DATAF(-0.44446569681167603000)},

7039 {_DATAF(-0.89596623182296753000), _DATAF(-0.44412213563919067000)},

7040 {_DATAF(-0.89613652229309082000), _DATAF(-0.44377851486206055000)},

7041 {_DATAF(-0.89630663394927979000), _DATAF(-0.44343480467796326000)},

7042 {_DATAF(-0.89647662639617920000), _DATAF(-0.44309106469154358000)},

7043 {_DATAF(-0.89664649963378906000), _DATAF(-0.44274723529815674000)},

7044 {_DATAF(-0.89681619405746460000), _DATAF(-0.44240334630012512000)},

7045 {_DATAF(-0.89698576927185059000), _DATAF(-0.44205936789512634000)},

7046 {_DATAF(-0.89715522527694702000), _DATAF(-0.44171535968780518000)},

7047 {_DATAF(-0.89732456207275391000), _DATAF(-0.44137126207351685000)},

7048 {_DATAF(-0.89749377965927124000), _DATAF(-0.44102710485458374000)},

7049 {_DATAF(-0.89766281843185425000), _DATAF(-0.44068288803100586000)},

7050 {_DATAF(-0.89783179759979248000), _DATAF(-0.44033861160278320000)},

7051 {_DATAF(-0.89800059795379639000), _DATAF(-0.43999427556991577000)},

7052 {_DATAF(-0.89816927909851074000), _DATAF(-0.43964985013008118000)},

7053 {_DATAF(-0.89833778142929077000), _DATAF(-0.43930539488792419000)},

7054 {_DATAF(-0.89850616455078125000), _DATAF(-0.43896085023880005000)},

7055 {_DATAF(-0.89867448806762695000), _DATAF(-0.43861624598503113000)},

7056 {_DATAF(-0.89884263277053833000), _DATAF(-0.43827158212661743000)},

7057 {_DATAF(-0.89901059865951538000), _DATAF(-0.43792682886123657000)},

7058 {_DATAF(-0.89917850494384766000), _DATAF(-0.43758204579353333000)},

7059 {_DATAF(-0.89934623241424561000), _DATAF(-0.43723717331886292000)},

7060 {_DATAF(-0.89951384067535400000), _DATAF(-0.43689224123954773000)},

7061 {_DATAF(-0.89968132972717285000), _DATAF(-0.43654724955558777000)},

7062 {_DATAF(-0.89984869956970215000), _DATAF(-0.43620219826698303000)},

7063 {_DATAF(-0.90001589059829712000), _DATAF(-0.43585708737373352000)},

7064 {_DATAF(-0.90018296241760254000), _DATAF(-0.43551188707351685000)},

7065 {_DATAF(-0.90034991502761841000), _DATAF(-0.43516665697097778000)},

7066 {_DATAF(-0.90051674842834473000), _DATAF(-0.43482133746147156000)},

7067 {_DATAF(-0.90068340301513672000), _DATAF(-0.43447595834732056000)},

7068 {_DATAF(-0.90084999799728394000), _DATAF(-0.43413051962852478000)},

7069 {_DATAF(-0.90101641416549683000), _DATAF(-0.43378502130508423000)},

7070 {_DATAF(-0.90118271112442017000), _DATAF(-0.43343946337699890000)},

7071 {_DATAF(-0.90134882926940918000), _DATAF(-0.43309381604194641000)},

7072 {_DATAF(-0.90151488780975342000), _DATAF(-0.43274813890457153000)},

7073 {_DATAF(-0.90168076753616333000), _DATAF(-0.43240237236022949000)},

7074 {_DATAF(-0.90184652805328369000), _DATAF(-0.43205654621124268000)},

7075 {_DATAF(-0.90201216936111450000), _DATAF(-0.43171066045761108000)},

7076 {_DATAF(-0.90217763185501099000), _DATAF(-0.43136471509933472000)},

7077 {_DATAF(-0.90234297513961792000), _DATAF(-0.43101871013641357000)},

7078 {_DATAF(-0.90250819921493530000), _DATAF(-0.43067261576652527000)},

7079 {_DATAF(-0.90267330408096313000), _DATAF(-0.43032649159431458000)},

7080 {_DATAF(-0.90283828973770142000), _DATAF(-0.42998027801513672000)},

7081 {_DATAF(-0.90300309658050537000), _DATAF(-0.42963400483131409000)},

7082 {_DATAF(-0.90316778421401978000), _DATAF(-0.42928767204284668000)},

7083 {_DATAF(-0.90333235263824463000), _DATAF(-0.42894127964973450000)},

7084 {_DATAF(-0.90349680185317993000), _DATAF(-0.42859482765197754000)},

7085 {_DATAF(-0.90366107225418091000), _DATAF(-0.42824831604957581000)},

7086 {_DATAF(-0.90382528305053711000), _DATAF(-0.42790174484252930000)},

7087 {_DATAF(-0.90398931503295898000), _DATAF(-0.42755508422851563000)},

7088 {_DATAF(-0.90415316820144653000), _DATAF(-0.42720839381217957000)},

7089 {_DATAF(-0.90431696176528931000), _DATAF(-0.42686161398887634000)},

7090 {_DATAF(-0.90448057651519775000), _DATAF(-0.42651477456092834000)},

7091 {_DATAF(-0.90464407205581665000), _DATAF(-0.42616787552833557000)},

7092 {_DATAF(-0.90480744838714600000), _DATAF(-0.42582091689109802000)},

7093 {_DATAF(-0.90497070550918579000), _DATAF(-0.42547389864921570000)},

7094 {_DATAF(-0.90513378381729126000), _DATAF(-0.42512682080268860000)},

7095 {_DATAF(-0.90529674291610718000), _DATAF(-0.42477968335151672000)},

7096 {_DATAF(-0.90545958280563354000), _DATAF(-0.42443248629570007000)},

7097 {_DATAF(-0.90562230348587036000), _DATAF(-0.42408519983291626000)},

7098 {_DATAF(-0.90578484535217285000), _DATAF(-0.42373788356781006000)},

7099 {_DATAF(-0.90594726800918579000), _DATAF(-0.42339047789573669000)},

7100 {_DATAF(-0.90610957145690918000), _DATAF(-0.42304301261901855000)},

7101 {_DATAF(-0.90627175569534302000), _DATAF(-0.42269548773765564000)},

7102 {_DATAF(-0.90643382072448730000), _DATAF(-0.42234790325164795000)},

7103 {_DATAF(-0.90659570693969727000), _DATAF(-0.42200025916099548000)},

7104 {_DATAF(-0.90675747394561768000), _DATAF(-0.42165255546569824000)},

7105 {_DATAF(-0.90691912174224854000), _DATAF(-0.42130479216575623000)},

7106 {_DATAF(-0.90708059072494507000), _DATAF(-0.42095696926116943000)},

7107 {_DATAF(-0.90724200010299683000), _DATAF(-0.42060908675193787000)},

7108 {_DATAF(-0.90740323066711426000), _DATAF(-0.42026111483573914000)},

7109 {_DATAF(-0.90756434202194214000), _DATAF(-0.41991311311721802000)},

7110 {_DATAF(-0.90772527456283569000), _DATAF(-0.41956502199172974000)},

7111 {_DATAF(-0.90788608789443970000), _DATAF(-0.41921690106391907000)},

7112 {_DATAF(-0.90804684162139893000), _DATAF(-0.41886869072914124000)},

7113 {_DATAF(-0.90820735692977905000), _DATAF(-0.41852042078971863000)},

7114 {_DATAF(-0.90836781263351440000), _DATAF(-0.41817209124565125000)},

7115 {_DATAF(-0.90852808952331543000), _DATAF(-0.41782370209693909000)},

7116 {_DATAF(-0.90868830680847168000), _DATAF(-0.41747528314590454000)},

7117 {_DATAF(-0.90884834527969360000), _DATAF(-0.41712677478790283000)},

7118 {_DATAF(-0.90900820493698120000), _DATAF(-0.41677817702293396000)},

7119 {_DATAF(-0.90916800498962402000), _DATAF(-0.41642954945564270000)},

7120 {_DATAF(-0.90932762622833252000), _DATAF(-0.41608086228370667000)},

7121 {_DATAF(-0.90948712825775146000), _DATAF(-0.41573211550712585000)},

7122 {_DATAF(-0.90964645147323608000), _DATAF(-0.41538330912590027000)},

7123 {_DATAF(-0.90980571508407593000), _DATAF(-0.41503441333770752000)},

7124 {_DATAF(-0.90996479988098145000), _DATAF(-0.41468548774719238000)},

7125 {_DATAF(-0.91012376546859741000), _DATAF(-0.41433650255203247000)},

7126 {_DATAF(-0.91028261184692383000), _DATAF(-0.41398742794990540000)},

7127 {_DATAF(-0.91044127941131592000), _DATAF(-0.41363832354545593000)},

7128 {_DATAF(-0.91059982776641846000), _DATAF(-0.41328912973403931000)},

7129 {_DATAF(-0.91075825691223145000), _DATAF(-0.41293987631797791000)},

7130 {_DATAF(-0.91091656684875488000), _DATAF(-0.41259059309959412000)},

7131 {_DATAF(-0.91107475757598877000), _DATAF(-0.41224122047424316000)},

7132 {_DATAF(-0.91123276948928833000), _DATAF(-0.41189181804656982000)},

7133 {_DATAF(-0.91139066219329834000), _DATAF(-0.41154232621192932000)},

7134 {_DATAF(-0.91154843568801880000), _DATAF(-0.41119277477264404000)},

7135 {_DATAF(-0.91170603036880493000), _DATAF(-0.41084316372871399000)},

7136 {_DATAF(-0.91186350584030151000), _DATAF(-0.41049349308013916000)},

7137 {_DATAF(-0.91202086210250854000), _DATAF(-0.41014379262924194000)},

7138 {_DATAF(-0.91217809915542603000), _DATAF(-0.40979400277137756000)},

7139 {_DATAF(-0.91233515739440918000), _DATAF(-0.40944415330886841000)},

7140 {_DATAF(-0.91249215602874756000), _DATAF(-0.40909424424171448000)},

7141 {_DATAF(-0.91264897584915161000), _DATAF(-0.40874427556991577000)},

7142 {_DATAF(-0.91280561685562134000), _DATAF(-0.40839424729347229000)},

7143 {_DATAF(-0.91296219825744629000), _DATAF(-0.40804415941238403000)},

7144 {_DATAF(-0.91311860084533691000), _DATAF(-0.40769401192665100000)},

7145 {_DATAF(-0.91327488422393799000), _DATAF(-0.40734380483627319000)},

7146 {_DATAF(-0.91343104839324951000), _DATAF(-0.40699353814125061000)},

7147 {_DATAF(-0.91358703374862671000), _DATAF(-0.40664321184158325000)},

7148 {_DATAF(-0.91374289989471436000), _DATAF(-0.40629282593727112000)},

7149 {_DATAF(-0.91389864683151245000), _DATAF(-0.40594238042831421000)},

7150 {_DATAF(-0.91405427455902100000), _DATAF(-0.40559187531471252000)},

7151 {_DATAF(-0.91420978307723999000), _DATAF(-0.40524131059646606000)},

7152 {_DATAF(-0.91436511278152466000), _DATAF(-0.40489068627357483000)},

7153 {_DATAF(-0.91452032327651978000), _DATAF(-0.40454000234603882000)},

7154 {_DATAF(-0.91467535495758057000), _DATAF(-0.40418925881385803000)},

7155 {_DATAF(-0.91483032703399658000), _DATAF(-0.40383845567703247000)},

7156 {_DATAF(-0.91498512029647827000), _DATAF(-0.40348759293556213000)},

7157 {_DATAF(-0.91513979434967041000), _DATAF(-0.40313667058944702000)},

7158 {_DATAF(-0.91529428958892822000), _DATAF(-0.40278568863868713000)},

7159 {_DATAF(-0.91544872522354126000), _DATAF(-0.40243464708328247000)},

7160 {_DATAF(-0.91560298204421997000), _DATAF(-0.40208354592323303000)},

7161 {_DATAF(-0.91575711965560913000), _DATAF(-0.40173238515853882000)},

7162 {_DATAF(-0.91591107845306396000), _DATAF(-0.40138116478919983000)},

7163 {_DATAF(-0.91606497764587402000), _DATAF(-0.40102988481521606000)},

7164 {_DATAF(-0.91621869802474976000), _DATAF(-0.40067857503890991000)},

7165 {_DATAF(-0.91637229919433594000), _DATAF(-0.40032717585563660000)},

7166 {_DATAF(-0.91652572154998779000), _DATAF(-0.39997571706771851000)},

7167 {_DATAF(-0.91667908430099487000), _DATAF(-0.39962419867515564000)},

7168 {_DATAF(-0.91683226823806763000), _DATAF(-0.39927262067794800000)},

7169 {_DATAF(-0.91698527336120605000), _DATAF(-0.39892101287841797000)},

7170 {_DATAF(-0.91713821887969971000), _DATAF(-0.39856931567192078000)},

7171 {_DATAF(-0.91729098558425903000), _DATAF(-0.39821755886077881000)},

7172 {_DATAF(-0.91744363307952881000), _DATAF(-0.39786574244499207000)},

7173 {_DATAF(-0.91759616136550903000), _DATAF(-0.39751389622688293000)},

7174 {_DATAF(-0.91774851083755493000), _DATAF(-0.39716196060180664000)},

7175 {_DATAF(-0.91790080070495605000), _DATAF(-0.39680999517440796000)},

7176 {_DATAF(-0.91805291175842285000), _DATAF(-0.39645794034004211000)},

7177 {_DATAF(-0.91820484399795532000), _DATAF(-0.39610585570335388000)},

7178 {_DATAF(-0.91835671663284302000), _DATAF(-0.39575368165969849000)},

7179 {_DATAF(-0.91850841045379639000), _DATAF(-0.39540147781372070000)},

7180 {_DATAF(-0.91865998506546021000), _DATAF(-0.39504921436309814000)},

7181 {_DATAF(-0.91881138086318970000), _DATAF(-0.39469686150550842000)},

7182 {_DATAF(-0.91896271705627441000), _DATAF(-0.39434447884559631000)},

7183 {_DATAF(-0.91911387443542480000), _DATAF(-0.39399203658103943000)},

7184 {_DATAF(-0.91926485300064087000), _DATAF(-0.39363953471183777000)},

7185 {_DATAF(-0.91941577196121216000), _DATAF(-0.39328697323799133000)},

7186 {_DATAF(-0.91956651210784912000), _DATAF(-0.39293435215950012000)},

7187 {_DATAF(-0.91971713304519653000), _DATAF(-0.39258167147636414000)},

7188 {_DATAF(-0.91986763477325439000), _DATAF(-0.39222893118858337000)},

7189 {_DATAF(-0.92001795768737793000), _DATAF(-0.39187613129615784000)},

7190 {_DATAF(-0.92016822099685669000), _DATAF(-0.39152330160140991000)},

7191 {_DATAF(-0.92031830549240112000), _DATAF(-0.39117038249969482000)},

7192 {_DATAF(-0.92046821117401123000), _DATAF(-0.39081740379333496000)},

7193 {_DATAF(-0.92061805725097656000), _DATAF(-0.39046439528465271000)},

7194 {_DATAF(-0.92076772451400757000), _DATAF(-0.39011132717132568000)},

7195 {_DATAF(-0.92091721296310425000), _DATAF(-0.38975816965103149000)},

7196 {_DATAF(-0.92106664180755615000), _DATAF(-0.38940498232841492000)},

7197 {_DATAF(-0.92121589183807373000), _DATAF(-0.38905173540115356000)},

7198 {_DATAF(-0.92136502265930176000), _DATAF(-0.38869842886924744000)},

7199 {_DATAF(-0.92151403427124023000), _DATAF(-0.38834503293037415000)},

7200 {_DATAF(-0.92166292667388916000), _DATAF(-0.38799160718917847000)},

7201 {_DATAF(-0.92181164026260376000), _DATAF(-0.38763815164566040000)},

7202 {_DATAF(-0.92196023464202881000), _DATAF(-0.38728460669517517000)},

7203 {_DATAF(-0.92210865020751953000), _DATAF(-0.38693100214004517000)},

7204 {_DATAF(-0.92225700616836548000), _DATAF(-0.38657733798027039000)},

7205 {_DATAF(-0.92240518331527710000), _DATAF(-0.38622364401817322000)},

7206 {_DATAF(-0.92255324125289917000), _DATAF(-0.38586989045143127000)},

7207 {_DATAF(-0.92270112037658691000), _DATAF(-0.38551604747772217000)},

7208 {_DATAF(-0.92284888029098511000), _DATAF(-0.38516217470169067000)},

7209 {_DATAF(-0.92299652099609375000), _DATAF(-0.38480824232101440000)},

7210 {_DATAF(-0.92314404249191284000), _DATAF(-0.38445425033569336000)},

7211 {_DATAF(-0.92329144477844238000), _DATAF(-0.38410019874572754000)},

7212 {_DATAF(-0.92343866825103760000), _DATAF(-0.38374608755111694000)},

7213 {_DATAF(-0.92358577251434326000), _DATAF(-0.38339191675186157000)},

7214 {_DATAF(-0.92373269796371460000), _DATAF(-0.38303771615028381000)},

7215 {_DATAF(-0.92387950420379639000), _DATAF(-0.38268342614173889000)},

7216 {_DATAF(-0.92402625083923340000), _DATAF(-0.38232910633087158000)},

7217 {_DATAF(-0.92417275905609131000), _DATAF(-0.38197472691535950000)},

7218 {_DATAF(-0.92431920766830444000), _DATAF(-0.38162025809288025000)},

7219 {_DATAF(-0.92446547746658325000), _DATAF(-0.38126575946807861000)},

7220 {_DATAF(-0.92461162805557251000), _DATAF(-0.38091120123863220000)},

7221 {_DATAF(-0.92475759983062744000), _DATAF(-0.38055661320686340000)},

7222 {_DATAF(-0.92490351200103760000), _DATAF(-0.38020193576812744000)},

7223 {_DATAF(-0.92504924535751343000), _DATAF(-0.37984719872474670000)},

7224 {_DATAF(-0.92519485950469971000), _DATAF(-0.37949243187904358000)},

7225 {_DATAF(-0.92534029483795166000), _DATAF(-0.37913760542869568000)},

7226 {_DATAF(-0.92548561096191406000), _DATAF(-0.37878268957138062000)},

7227 {_DATAF(-0.92563080787658691000), _DATAF(-0.37842774391174316000)},

7228 {_DATAF(-0.92577588558197021000), _DATAF(-0.37807273864746094000)},

7229 {_DATAF(-0.92592078447341919000), _DATAF(-0.37771770358085632000)},

7230 {_DATAF(-0.92606556415557861000), _DATAF(-0.37736257910728455000)},

7231 {_DATAF(-0.92621022462844849000), _DATAF(-0.37700742483139038000)},

7232 {_DATAF(-0.92635476589202881000), _DATAF(-0.37665218114852905000)},

7233 {_DATAF(-0.92649912834167480000), _DATAF(-0.37629690766334534000)},

7234 {_DATAF(-0.92664337158203125000), _DATAF(-0.37594157457351685000)},

7235 {_DATAF(-0.92678749561309814000), _DATAF(-0.37558618187904358000)},

7236 {_DATAF(-0.92693144083023071000), _DATAF(-0.37523072957992554000)},

7237 {_DATAF(-0.92707526683807373000), _DATAF(-0.37487521767616272000)},

7238 {_DATAF(-0.92721897363662720000), _DATAF(-0.37451967597007751000)},

7239 {_DATAF(-0.92736250162124634000), _DATAF(-0.37416407465934753000)},

7240 {_DATAF(-0.92750597000122070000), _DATAF(-0.37380838394165039000)},

7241 {_DATAF(-0.92764925956726074000), _DATAF(-0.37345266342163086000)},

7242 {_DATAF(-0.92779237031936646000), _DATAF(-0.37309691309928894000)},

7243 {_DATAF(-0.92793542146682739000), _DATAF(-0.37274107336997986000)},

7244 {_DATAF(-0.92807829380035400000), _DATAF(-0.37238517403602600000)},

7245 {_DATAF(-0.92822098731994629000), _DATAF(-0.37202924489974976000)},

7246 {_DATAF(-0.92836362123489380000), _DATAF(-0.37167325615882874000)},

7247 {_DATAF(-0.92850607633590698000), _DATAF(-0.37131720781326294000)},

7248 {_DATAF(-0.92864841222763062000), _DATAF(-0.37096109986305237000)},

7249 {_DATAF(-0.92879062891006470000), _DATAF(-0.37060493230819702000)},

7250 {_DATAF(-0.92893266677856445000), _DATAF(-0.37024870514869690000)},

7251 {_DATAF(-0.92907458543777466000), _DATAF(-0.36989244818687439000)},

7252 {_DATAF(-0.92921638488769531000), _DATAF(-0.36953613162040710000)},

7253 {_DATAF(-0.92935800552368164000), _DATAF(-0.36917975544929504000)},

7254 {_DATAF(-0.92949950695037842000), _DATAF(-0.36882331967353821000)},

7255 {_DATAF(-0.92964088916778564000), _DATAF(-0.36846682429313660000)},

7256 {_DATAF(-0.92978215217590332000), _DATAF(-0.36811029911041260000)},

7257 {_DATAF(-0.92992323637008667000), _DATAF(-0.36775368452072144000)},

7258 {_DATAF(-0.93006420135498047000), _DATAF(-0.36739704012870789000)},

7259 {_DATAF(-0.93020504713058472000), _DATAF(-0.36704033613204956000)},

7260 {_DATAF(-0.93034571409225464000), _DATAF(-0.36668360233306885000)},

7261 {_DATAF(-0.93048626184463501000), _DATAF(-0.36632677912712097000)},

7262 {_DATAF(-0.93062669038772583000), _DATAF(-0.36596992611885071000)},

7263 {_DATAF(-0.93076694011688232000), _DATAF(-0.36561298370361328000)},

7264 {_DATAF(-0.93090713024139404000), _DATAF(-0.36525601148605347000)},

7265 {_DATAF(-0.93104708194732666000), _DATAF(-0.36489900946617126000)},

7266 {_DATAF(-0.93118697404861450000), _DATAF(-0.36454191803932190000)},

7267 {_DATAF(-0.93132668733596802000), _DATAF(-0.36418479681015015000)},

7268 {_DATAF(-0.93146628141403198000), _DATAF(-0.36382761597633362000)},

7269 {_DATAF(-0.93160575628280640000), _DATAF(-0.36347037553787231000)},

7270 {_DATAF(-0.93174505233764648000), _DATAF(-0.36311307549476624000)},

7271 {_DATAF(-0.93188428878784180000), _DATAF(-0.36275571584701538000)},

7272 {_DATAF(-0.93202328681945801000), _DATAF(-0.36239832639694214000)},

7273 {_DATAF(-0.93216222524642944000), _DATAF(-0.36204087734222412000)},

7274 {_DATAF(-0.93230098485946655000), _DATAF(-0.36168336868286133000)},

7275 {_DATAF(-0.93243962526321411000), _DATAF(-0.36132580041885376000)},

7276 {_DATAF(-0.93257814645767212000), _DATAF(-0.36096820235252380000)},

7277 {_DATAF(-0.93271648883819580000), _DATAF(-0.36061051487922668000)},

7278 {_DATAF(-0.93285471200942993000), _DATAF(-0.36025279760360718000)},

7279 {_DATAF(-0.93299281597137451000), _DATAF(-0.35989505052566528000)},

7280 {_DATAF(-0.93313074111938477000), _DATAF(-0.35953721404075623000)},

7281 {_DATAF(-0.93326854705810547000), _DATAF(-0.35917934775352478000)},

7282 {_DATAF(-0.93340623378753662000), _DATAF(-0.35882139205932617000)},

7283 {_DATAF(-0.93354380130767822000), _DATAF(-0.35846340656280518000)},

7284 {_DATAF(-0.93368119001388550000), _DATAF(-0.35810539126396179000)},

7285 {_DATAF(-0.93381845951080322000), _DATAF(-0.35774728655815125000)},

7286 {_DATAF(-0.93395555019378662000), _DATAF(-0.35738915205001831000)},

7287 {_DATAF(-0.93409252166748047000), _DATAF(-0.35703095793724060000)},

7288 {_DATAF(-0.93422937393188477000), _DATAF(-0.35667270421981812000)},

7289 {_DATAF(-0.93436610698699951000), _DATAF(-0.35631442070007324000)},

7290 {_DATAF(-0.93450272083282471000), _DATAF(-0.35595607757568359000)},

7291 {_DATAF(-0.93463915586471558000), _DATAF(-0.35559767484664917000)},

7292 {_DATAF(-0.93477541208267212000), _DATAF(-0.35523921251296997000)},

7293 {_DATAF(-0.93491160869598389000), _DATAF(-0.35488069057464600000)},

7294 {_DATAF(-0.93504762649536133000), _DATAF(-0.35452213883399963000)},

7295 {_DATAF(-0.93518352508544922000), _DATAF(-0.35416352748870850000)},

7296 {_DATAF(-0.93531924486160278000), _DATAF(-0.35380485653877258000)},

7297 {_DATAF(-0.93545484542846680000), _DATAF(-0.35344615578651428000)},

7298 {_DATAF(-0.93559032678604126000), _DATAF(-0.35308736562728882000)},

7299 {_DATAF(-0.93572568893432617000), _DATAF(-0.35272854566574097000)},

7300 {_DATAF(-0.93586087226867676000), _DATAF(-0.35236969590187073000)},

7301 {_DATAF(-0.93599593639373779000), _DATAF(-0.35201075673103333000)},

7302 {_DATAF(-0.93613088130950928000), _DATAF(-0.35165178775787354000)},

7303 {_DATAF(-0.93626564741134644000), _DATAF(-0.35129275918006897000)},

7304 {_DATAF(-0.93640029430389404000), _DATAF(-0.35093367099761963000)},

7305 {_DATAF(-0.93653482198715210000), _DATAF(-0.35057455301284790000)},

7306 {_DATAF(-0.93666923046112061000), _DATAF(-0.35021537542343140000)},

7307 {_DATAF(-0.93680346012115479000), _DATAF(-0.34985613822937012000)},

7308 {_DATAF(-0.93693757057189941000), _DATAF(-0.34949684143066406000)},

7309 {_DATAF(-0.93707150220870972000), _DATAF(-0.34913751482963562000)},

7310 {_DATAF(-0.93720531463623047000), _DATAF(-0.34877812862396240000)},

7311 {_DATAF(-0.93733900785446167000), _DATAF(-0.34841868281364441000)},

7312 {_DATAF(-0.93747258186340332000), _DATAF(-0.34805917739868164000)},

7313 {_DATAF(-0.93760597705841064000), _DATAF(-0.34769964218139648000)},

7314 {_DATAF(-0.93773925304412842000), _DATAF(-0.34734004735946655000)},

7315 {_DATAF(-0.93787235021591187000), _DATAF(-0.34698042273521423000)},

7316 {_DATAF(-0.93800538778305054000), _DATAF(-0.34662070870399475000)},

7317 {_DATAF(-0.93813824653625488000), _DATAF(-0.34626096487045288000)},

7318 {_DATAF(-0.93827092647552490000), _DATAF(-0.34590116143226624000)},

7319 {_DATAF(-0.93840354681015015000), _DATAF(-0.34554132819175720000)},

7320 {_DATAF(-0.93853598833084106000), _DATAF(-0.34518143534660339000)},

7321 {_DATAF(-0.93866831064224243000), _DATAF(-0.34482148289680481000)},

7322 {_DATAF(-0.93880045413970947000), _DATAF(-0.34446147084236145000)},

7323 {_DATAF(-0.93893247842788696000), _DATAF(-0.34410142898559570000)},

7324 {_DATAF(-0.93906438350677490000), _DATAF(-0.34374132752418518000)},

7325 {_DATAF(-0.93919610977172852000), _DATAF(-0.34338116645812988000)},

7326 {_DATAF(-0.93932771682739258000), _DATAF(-0.34302097558975220000)},

7327 {_DATAF(-0.93945920467376709000), _DATAF(-0.34266072511672974000)},

7328 {_DATAF(-0.93959057331085205000), _DATAF(-0.34230041503906250000)},

7329 {_DATAF(-0.93972176313400269000), _DATAF(-0.34194007515907288000)},

7330 {_DATAF(-0.93985283374786377000), _DATAF(-0.34157964587211609000)},

7331 {_DATAF(-0.93998372554779053000), _DATAF(-0.34121921658515930000)},

7332 {_DATAF(-0.94011455774307251000), _DATAF(-0.34085869789123535000)},

7333 {_DATAF(-0.94024521112442017000), _DATAF(-0.34049814939498901000)},

7334 {_DATAF(-0.94037568569183350000), _DATAF(-0.34013754129409790000)},

7335 {_DATAF(-0.94050604104995728000), _DATAF(-0.33977687358856201000)},

7336 {_DATAF(-0.94063627719879150000), _DATAF(-0.33941617608070374000)},

7337 {_DATAF(-0.94076639413833618000), _DATAF(-0.33905541896820068000)},

7338 {_DATAF(-0.94089633226394653000), _DATAF(-0.33869463205337524000)},

7339 {_DATAF(-0.94102615118026733000), _DATAF(-0.33833375573158264000)},

7340 {_DATAF(-0.94115585088729858000), _DATAF(-0.33797284960746765000)},

7341 {_DATAF(-0.94128537178039551000), _DATAF(-0.33761191368103027000)},

7342 {_DATAF(-0.94141477346420288000), _DATAF(-0.33725091814994812000)},

7343 {_DATAF(-0.94154405593872070000), _DATAF(-0.33688986301422119000)},

7344 {_DATAF(-0.94167321920394897000), _DATAF(-0.33652874827384949000)},

7345 {_DATAF(-0.94180220365524292000), _DATAF(-0.33616760373115540000)},

7346 {_DATAF(-0.94193100929260254000), _DATAF(-0.33580639958381653000)},

7347 {_DATAF(-0.94205975532531738000), _DATAF(-0.33544513583183289000)},

7348 {_DATAF(-0.94218832254409790000), _DATAF(-0.33508384227752686000)},

7349 {_DATAF(-0.94231677055358887000), _DATAF(-0.33472248911857605000)},

7350 {_DATAF(-0.94244503974914551000), _DATAF(-0.33436110615730286000)},

7351 {_DATAF(-0.94257318973541260000), _DATAF(-0.33399966359138489000)},

7352 {_DATAF(-0.94270122051239014000), _DATAF(-0.33363816142082214000)},

7353 {_DATAF(-0.94282907247543335000), _DATAF(-0.33327659964561462000)},

7354 {_DATAF(-0.94295686483383179000), _DATAF(-0.33291500806808472000)},

7355 {_DATAF(-0.94308441877365112000), _DATAF(-0.33255335688591003000)},

7356 {_DATAF(-0.94321191310882568000), _DATAF(-0.33219167590141296000)},

7357 {_DATAF(-0.94333922863006592000), _DATAF(-0.33182993531227112000)},

7358 {_DATAF(-0.94346642494201660000), _DATAF(-0.33146813511848450000)},

7359 {_DATAF(-0.94359344244003296000), _DATAF(-0.33110630512237549000)},

7360 {_DATAF(-0.94372034072875977000), _DATAF(-0.33074441552162170000)},

7361 {_DATAF(-0.94384711980819702000), _DATAF(-0.33038249611854553000)},

7362 {_DATAF(-0.94397377967834473000), _DATAF(-0.33002048730850220000)},

7363 {_DATAF(-0.94410026073455811000), _DATAF(-0.32965844869613647000)},

7364 {_DATAF(-0.94422662258148193000), _DATAF(-0.32929638028144836000)},

7365 {_DATAF(-0.94435280561447144000), _DATAF(-0.32893425226211548000)},

7366 {_DATAF(-0.94447892904281616000), _DATAF(-0.32857206463813782000)},

7367 {_DATAF(-0.94460481405258179000), _DATAF(-0.32820984721183777000)},

7368 {_DATAF(-0.94473063945770264000), _DATAF(-0.32784757018089294000)},

7369 {_DATAF(-0.94485628604888916000), _DATAF(-0.32748523354530334000)},

7370 {_DATAF(-0.94498181343078613000), _DATAF(-0.32712286710739136000)},

7371 {_DATAF(-0.94510722160339355000), _DATAF(-0.32676044106483459000)},

7372 {_DATAF(-0.94523245096206665000), _DATAF(-0.32639798521995544000)},

7373 {_DATAF(-0.94535756111145020000), _DATAF(-0.32603546977043152000)},

7374 {_DATAF(-0.94548249244689941000), _DATAF(-0.32567289471626282000)},

7375 {_DATAF(-0.94560730457305908000), _DATAF(-0.32531028985977173000)},

7376 {_DATAF(-0.94573199748992920000), _DATAF(-0.32494762539863586000)},

7377 {_DATAF(-0.94585657119750977000), _DATAF(-0.32458493113517761000)},

7378 {_DATAF(-0.94598096609115601000), _DATAF(-0.32422217726707458000)},

7379 {_DATAF(-0.94610524177551270000), _DATAF(-0.32385936379432678000)},

7380 {_DATAF(-0.94622933864593506000), _DATAF(-0.32349652051925659000)},

7381 {_DATAF(-0.94635337591171265000), _DATAF(-0.32313361763954163000)},

7382 {_DATAF(-0.94647717475891113000), _DATAF(-0.32277068495750427000)},

7383 {_DATAF(-0.94660091400146484000), _DATAF(-0.32240769267082214000)},

7384 {_DATAF(-0.94672447443008423000), _DATAF(-0.32204464077949524000)},

7385 {_DATAF(-0.94684791564941406000), _DATAF(-0.32168155908584595000)},

7386 {_DATAF(-0.94697123765945435000), _DATAF(-0.32131841778755188000)},

7387 {_DATAF(-0.94709438085556030000), _DATAF(-0.32095524668693542000)},

7388 {_DATAF(-0.94721740484237671000), _DATAF(-0.32059201598167419000)},

7389 {_DATAF(-0.94734025001525879000), _DATAF(-0.32022872567176819000)},

7390 {_DATAF(-0.94746297597885132000), _DATAF(-0.31986540555953979000)},

7391 {_DATAF(-0.94758558273315430000), _DATAF(-0.31950202584266663000)},

7392 {_DATAF(-0.94770807027816772000), _DATAF(-0.31913861632347107000)},

7393 {_DATAF(-0.94783037900924683000), _DATAF(-0.31877514719963074000)},

7394 {_DATAF(-0.94795256853103638000), _DATAF(-0.31841164827346802000)},

7395 {_DATAF(-0.94807457923889160000), _DATAF(-0.31804808974266052000)},

7396 {_DATAF(-0.94819647073745728000), _DATAF(-0.31768447160720825000)},

7397 {_DATAF(-0.94831824302673340000), _DATAF(-0.31732082366943359000)},

7398 {_DATAF(-0.94843989610671997000), _DATAF(-0.31695711612701416000)},

7399 {_DATAF(-0.94856137037277222000), _DATAF(-0.31659337878227234000)},

7400 {_DATAF(-0.94868266582489014000), _DATAF(-0.31622958183288574000)},

7401 {_DATAF(-0.94880390167236328000), _DATAF(-0.31586575508117676000)},

7402 {_DATAF(-0.94892495870590210000), _DATAF(-0.31550186872482300000)},

7403 {_DATAF(-0.94904589653015137000), _DATAF(-0.31513792276382446000)},

7404 {_DATAF(-0.94916665554046631000), _DATAF(-0.31477394700050354000)},

7405 {_DATAF(-0.94928729534149170000), _DATAF(-0.31440994143486023000)},

7406 {_DATAF(-0.94940781593322754000), _DATAF(-0.31404584646224976000)},

7407 {_DATAF(-0.94952815771102905000), _DATAF(-0.31368175148963928000)},

7408 {_DATAF(-0.94964838027954102000), _DATAF(-0.31331756711006165000)},

7409 {_DATAF(-0.94976848363876343000), _DATAF(-0.31295338273048401000)},

7410 {_DATAF(-0.94988846778869629000), _DATAF(-0.31258910894393921000)},

7411 {_DATAF(-0.95000827312469482000), _DATAF(-0.31222480535507202000)},

7412 {_DATAF(-0.95012789964675903000), _DATAF(-0.31186047196388245000)},

7413 {_DATAF(-0.95024746656417847000), _DATAF(-0.31149607896804810000)},

7414 {_DATAF(-0.95036685466766357000), _DATAF(-0.31113162636756897000)},

7415 {_DATAF(-0.95048606395721436000), _DATAF(-0.31076714396476746000)},

7416 {_DATAF(-0.95060515403747559000), _DATAF(-0.31040263175964355000)},

7417 {_DATAF(-0.95072412490844727000), _DATAF(-0.31003805994987488000)},

7418 {_DATAF(-0.95084297657012939000), _DATAF(-0.30967342853546143000)},

7419 {_DATAF(-0.95096164941787720000), _DATAF(-0.30930876731872559000)},

7420 {_DATAF(-0.95108020305633545000), _DATAF(-0.30894404649734497000)},

7421 {_DATAF(-0.95119863748550415000), _DATAF(-0.30857929587364197000)},

7422 {_DATAF(-0.95131689310073853000), _DATAF(-0.30821448564529419000)},

7423 {_DATAF(-0.95143502950668335000), _DATAF(-0.30784964561462402000)},

7424 {_DATAF(-0.95155298709869385000), _DATAF(-0.30748474597930908000)},

7425 {_DATAF(-0.95167088508605957000), _DATAF(-0.30711981654167175000)},

7426 {_DATAF(-0.95178854465484619000), _DATAF(-0.30675482749938965000)},

7427 {_DATAF(-0.95190614461898804000), _DATAF(-0.30638980865478516000)},

7428 {_DATAF(-0.95202356576919556000), _DATAF(-0.30602473020553589000)},

7429 {_DATAF(-0.95214086771011353000), _DATAF(-0.30565959215164185000)},

7430 {_DATAF(-0.95225799083709717000), _DATAF(-0.30529442429542542000)},

7431 {_DATAF(-0.95237499475479126000), _DATAF(-0.30492922663688660000)},

7432 {_DATAF(-0.95249187946319580000), _DATAF(-0.30456396937370300000)},

7433 {_DATAF(-0.95260858535766602000), _DATAF(-0.30419868230819702000)},

7434 {_DATAF(-0.95272517204284668000), _DATAF(-0.30383333563804626000)},

7435 {_DATAF(-0.95284163951873779000), _DATAF(-0.30346795916557312000)},

7436 {_DATAF(-0.95295792818069458000), _DATAF(-0.30310252308845520000)},

7437 {_DATAF(-0.95307409763336182000), _DATAF(-0.30273702740669250000)},

7438 {_DATAF(-0.95319014787673950000), _DATAF(-0.30237150192260742000)},

7439 {_DATAF(-0.95330601930618286000), _DATAF(-0.30200594663619995000)},

7440 {_DATAF(-0.95342177152633667000), _DATAF(-0.30164033174514771000)},

7441 {_DATAF(-0.95353740453720093000), _DATAF(-0.30127468705177307000)},

7442 {_DATAF(-0.95365285873413086000), _DATAF(-0.30090898275375366000)},

7443 {_DATAF(-0.95376819372177124000), _DATAF(-0.30054324865341187000)},

7444 {_DATAF(-0.95388334989547729000), _DATAF(-0.30017745494842529000)},

7445 {_DATAF(-0.95399844646453857000), _DATAF(-0.29981163144111633000)},

7446 {_DATAF(-0.95411330461502075000), _DATAF(-0.29944574832916260000)},

7447 {_DATAF(-0.95422810316085815000), _DATAF(-0.29907983541488647000)},

7448 {_DATAF(-0.95434272289276123000), _DATAF(-0.29871386289596558000)},

7449 {_DATAF(-0.95445722341537476000), _DATAF(-0.29834786057472229000)},

7450 {_DATAF(-0.95457154512405396000), _DATAF(-0.29798179864883423000)},

7451 {_DATAF(-0.95468574762344360000), _DATAF(-0.29761570692062378000)},

7452 {_DATAF(-0.95479983091354370000), _DATAF(-0.29724955558776855000)},

7453 {_DATAF(-0.95491373538970947000), _DATAF(-0.29688337445259094000)},

7454 {_DATAF(-0.95502752065658569000), _DATAF(-0.29651716351509094000)},

7455 {_DATAF(-0.95514118671417236000), _DATAF(-0.29615089297294617000)},

7456 {_DATAF(-0.95525467395782471000), _DATAF(-0.29578456282615662000)},

7457 {_DATAF(-0.95536804199218750000), _DATAF(-0.29541820287704468000)},

7458 {_DATAF(-0.95548123121261597000), _DATAF(-0.29505181312561035000)},

7459 {_DATAF(-0.95559436082839966000), _DATAF(-0.29468536376953125000)},

7460 {_DATAF(-0.95570725202560425000), _DATAF(-0.29431888461112976000)},

7461 {_DATAF(-0.95582008361816406000), _DATAF(-0.29395234584808350000)},

7462 {_DATAF(-0.95593273639678955000), _DATAF(-0.29358577728271484000)},

7463 {_DATAF(-0.95604526996612549000), _DATAF(-0.29321914911270142000)},

7464 {_DATAF(-0.95615762472152710000), _DATAF(-0.29285249114036560000)},

7465 {_DATAF(-0.95626986026763916000), _DATAF(-0.29248580336570740000)},

7466 {_DATAF(-0.95638197660446167000), _DATAF(-0.29211905598640442000)},

7467 {_DATAF(-0.95649391412734985000), _DATAF(-0.29175224900245667000)},

7468 {_DATAF(-0.95660573244094849000), _DATAF(-0.29138544201850891000)},

7469 {_DATAF(-0.95671743154525757000), _DATAF(-0.29101854562759399000)},

7470 {_DATAF(-0.95682895183563232000), _DATAF(-0.29065164923667908000)},

7471 {_DATAF(-0.95694035291671753000), _DATAF(-0.29028466343879700000)},

7472 {_DATAF(-0.95705157518386841000), _DATAF(-0.28991767764091492000)},

7473 {_DATAF(-0.95716267824172974000), _DATAF(-0.28955063223838806000)},

7474 {_DATAF(-0.95727366209030151000), _DATAF(-0.28918352723121643000)},

7475 {_DATAF(-0.95738452672958374000), _DATAF(-0.28881642222404480000)},

7476 {_DATAF(-0.95749521255493164000), _DATAF(-0.28844922780990601000)},

7477 {_DATAF(-0.95760571956634521000), _DATAF(-0.28808203339576721000)},

7478 {_DATAF(-0.95771616697311401000), _DATAF(-0.28771474957466125000)},

7479 {_DATAF(-0.95782643556594849000), _DATAF(-0.28734746575355530000)},

7480 {_DATAF(-0.95793652534484863000), _DATAF(-0.28698012232780457000)},

7481 {_DATAF(-0.95804649591445923000), _DATAF(-0.28661271929740906000)},

7482 {_DATAF(-0.95815634727478027000), _DATAF(-0.28624531626701355000)},

7483 {_DATAF(-0.95826607942581177000), _DATAF(-0.28587782382965088000)},

7484 {_DATAF(-0.95837563276290894000), _DATAF(-0.28551033139228821000)},

7485 {_DATAF(-0.95848506689071655000), _DATAF(-0.28514277935028076000)},

7486 {_DATAF(-0.95859432220458984000), _DATAF(-0.28477516770362854000)},

7487 {_DATAF(-0.95870345830917358000), _DATAF(-0.28440752625465393000)},

7488 {_DATAF(-0.95881247520446777000), _DATAF(-0.28403985500335693000)},

7489 {_DATAF(-0.95892131328582764000), _DATAF(-0.28367212414741516000)},

7490 {_DATAF(-0.95903003215789795000), _DATAF(-0.28330436348915100000)},

7491 {_DATAF(-0.95913863182067871000), _DATAF(-0.28293657302856445000)},

7492 {_DATAF(-0.95924705266952515000), _DATAF(-0.28256872296333313000)},

7493 {_DATAF(-0.95935535430908203000), _DATAF(-0.28220084309577942000)},

7494 {_DATAF(-0.95946347713470459000), _DATAF(-0.28183290362358093000)},

7495 {_DATAF(-0.95957154035568237000), _DATAF(-0.28146493434906006000)},

7496 {_DATAF(-0.95967936515808105000), _DATAF(-0.28109693527221680000)},

7497 {_DATAF(-0.95978713035583496000), _DATAF(-0.28072887659072876000)},

7498 {_DATAF(-0.95989471673965454000), _DATAF(-0.28036078810691833000)},

7499 {_DATAF(-0.96000212430953979000), _DATAF(-0.27999264001846313000)},

7500 {_DATAF(-0.96010947227478027000), _DATAF(-0.27962446212768555000)},

7501 {_DATAF(-0.96021664142608643000), _DATAF(-0.27925625443458557000)},

7502 {_DATAF(-0.96032363176345825000), _DATAF(-0.27888798713684082000)},

7503 {_DATAF(-0.96043050289154053000), _DATAF(-0.27851969003677368000)},

7504 {_DATAF(-0.96053725481033325000), _DATAF(-0.27815136313438416000)},

7505 {_DATAF(-0.96064388751983643000), _DATAF(-0.27778297662734985000)},

7506 {_DATAF(-0.96075034141540527000), _DATAF(-0.27741453051567078000)},

7507 {_DATAF(-0.96085661649703979000), _DATAF(-0.27704608440399170000)},

7508 {_DATAF(-0.96096283197402954000), _DATAF(-0.27667757868766785000)},

7509 {_DATAF(-0.96106886863708496000), _DATAF(-0.27630904316902161000)},

7510 {_DATAF(-0.96117472648620605000), _DATAF(-0.27594044804573059000)},

7511 {_DATAF(-0.96128046512603760000), _DATAF(-0.27557182312011719000)},

7512 {_DATAF(-0.96138608455657959000), _DATAF(-0.27520313858985901000)},

7513 {_DATAF(-0.96149158477783203000), _DATAF(-0.27483445405960083000)},

7514 {_DATAF(-0.96159690618515015000), _DATAF(-0.27446570992469788000)},

7515 {_DATAF(-0.96170204877853394000), _DATAF(-0.27409690618515015000)},

7516 {_DATAF(-0.96180713176727295000), _DATAF(-0.27372807264328003000)},

7517 {_DATAF(-0.96191203594207764000), _DATAF(-0.27335920929908752000)},

7518 {_DATAF(-0.96201676130294800000), _DATAF(-0.27299031615257263000)},

7519 {_DATAF(-0.96212142705917358000), _DATAF(-0.27262136340141296000)},

7520 {_DATAF(-0.96222585439682007000), _DATAF(-0.27225238084793091000)},

7521 {_DATAF(-0.96233022212982178000), _DATAF(-0.27188333868980408000)},

7522 {_DATAF(-0.96243441104888916000), _DATAF(-0.27151426672935486000)},

7523 {_DATAF(-0.96253848075866699000), _DATAF(-0.27114516496658325000)},

7524 {_DATAF(-0.96264237165451050000), _DATAF(-0.27077600359916687000)},

7525 {_DATAF(-0.96274614334106445000), _DATAF(-0.27040681242942810000)},

7526 {_DATAF(-0.96284979581832886000), _DATAF(-0.27003759145736694000)},

7527 {_DATAF(-0.96295326948165894000), _DATAF(-0.26966831088066101000)},

7528 {_DATAF(-0.96305662393569946000), _DATAF(-0.26929903030395508000)},

7529 {_DATAF(-0.96315979957580566000), _DATAF(-0.26892966032028198000)},

7530 {_DATAF(-0.96326285600662231000), _DATAF(-0.26856029033660889000)},

7531 {_DATAF(-0.96336579322814941000), _DATAF(-0.26819086074829102000)},

7532 {_DATAF(-0.96346855163574219000), _DATAF(-0.26782140135765076000)},

7533 {_DATAF(-0.96357119083404541000), _DATAF(-0.26745188236236572000)},

7534 {_DATAF(-0.96367371082305908000), _DATAF(-0.26708233356475830000)},

7535 {_DATAF(-0.96377605199813843000), _DATAF(-0.26671275496482849000)},

7536 {_DATAF(-0.96387827396392822000), _DATAF(-0.26634314656257629000)},

7537 {_DATAF(-0.96398037672042847000), _DATAF(-0.26597347855567932000)},

7538 {_DATAF(-0.96408230066299438000), _DATAF(-0.26560378074645996000)},

7539 {_DATAF(-0.96418404579162598000), _DATAF(-0.26523402333259583000)},

7540 {_DATAF(-0.96428573131561279000), _DATAF(-0.26486423611640930000)},

7541 {_DATAF(-0.96438723802566528000), _DATAF(-0.26449441909790039000)},

7542 {_DATAF(-0.96448856592178345000), _DATAF(-0.26412457227706909000)},

7543 {_DATAF(-0.96458977460861206000), _DATAF(-0.26375466585159302000)},

7544 {_DATAF(-0.96469086408615112000), _DATAF(-0.26338472962379456000)},

7545 {_DATAF(-0.96479183435440063000), _DATAF(-0.26301476359367371000)},

7546 {_DATAF(-0.96489262580871582000), _DATAF(-0.26264476776123047000)},

7547 {_DATAF(-0.96499323844909668000), _DATAF(-0.26227471232414246000)},

7548 {_DATAF(-0.96509379148483276000), _DATAF(-0.26190462708473206000)},

7549 {_DATAF(-0.96519410610198975000), _DATAF(-0.26153448224067688000)},

7550 {_DATAF(-0.96529436111450195000), _DATAF(-0.26116433739662170000)},

7551 {_DATAF(-0.96539443731307983000), _DATAF(-0.26079410314559937000)},

7552 {_DATAF(-0.96549439430236816000), _DATAF(-0.26042386889457703000)},

7553 {_DATAF(-0.96559417247772217000), _DATAF(-0.26005360484123230000)},

7554 {_DATAF(-0.96569383144378662000), _DATAF(-0.25968328118324280000)},

7555 {_DATAF(-0.96579337120056152000), _DATAF(-0.25931292772293091000)},

7556 {_DATAF(-0.96589273214340210000), _DATAF(-0.25894251465797424000)},

7557 {_DATAF(-0.96599197387695313000), _DATAF(-0.25857207179069519000)},

7558 {_DATAF(-0.96609103679656982000), _DATAF(-0.25820159912109375000)},

7559 {_DATAF(-0.96618998050689697000), _DATAF(-0.25783109664916992000)},

7560 {_DATAF(-0.96628880500793457000), _DATAF(-0.25746056437492371000)},

7561 {_DATAF(-0.96638745069503784000), _DATAF(-0.25708997249603271000)},

7562 {_DATAF(-0.96648597717285156000), _DATAF(-0.25671935081481934000)},

7563 {_DATAF(-0.96658438444137573000), _DATAF(-0.25634866952896118000)},

7564 {_DATAF(-0.96668261289596558000), _DATAF(-0.25597798824310303000)},

7565 {_DATAF(-0.96678072214126587000), _DATAF(-0.25560724735260010000)},

7566 {_DATAF(-0.96687865257263184000), _DATAF(-0.25523647665977478000)},

7567 {_DATAF(-0.96697646379470825000), _DATAF(-0.25486564636230469000)},

7568 {_DATAF(-0.96707415580749512000), _DATAF(-0.25449481606483459000)},

7569 {_DATAF(-0.96717166900634766000), _DATAF(-0.25412392616271973000)},

7570 {_DATAF(-0.96726906299591064000), _DATAF(-0.25375300645828247000)},

7571 {_DATAF(-0.96736627817153931000), _DATAF(-0.25338202714920044000)},

7572 {_DATAF(-0.96746337413787842000), _DATAF(-0.25301104784011841000)},

7573 {_DATAF(-0.96756035089492798000), _DATAF(-0.25264000892639160000)},

7574 {_DATAF(-0.96765714883804321000), _DATAF(-0.25226894021034241000)},

7575 {_DATAF(-0.96775382757186890000), _DATAF(-0.25189781188964844000)},

7576 {_DATAF(-0.96785038709640503000), _DATAF(-0.25152668356895447000)},

7577 {_DATAF(-0.96794676780700684000), _DATAF(-0.25115549564361572000)},

7578 {_DATAF(-0.96804302930831909000), _DATAF(-0.25078427791595459000)},

7579 {_DATAF(-0.96813911199569702000), _DATAF(-0.25041300058364868000)},

7580 {_DATAF(-0.96823507547378540000), _DATAF(-0.25004172325134277000)},

7581 {_DATAF(-0.96833086013793945000), _DATAF(-0.24967038631439209000)},

7582 {_DATAF(-0.96842658519744873000), _DATAF(-0.24929900467395782000)},

7583 {_DATAF(-0.96852207183837891000), _DATAF(-0.24892760813236237000)},

7584 {_DATAF(-0.96861749887466431000), _DATAF(-0.24855616688728333000)},

7585 {_DATAF(-0.96871274709701538000), _DATAF(-0.24818468093872070000)},

7586 {_DATAF(-0.96880781650543213000), _DATAF(-0.24781316518783569000)},

7587 {_DATAF(-0.96890282630920410000), _DATAF(-0.24744161963462830000)},

7588 {_DATAF(-0.96899759769439697000), _DATAF(-0.24707002937793732000)},

7589 {_DATAF(-0.96909230947494507000), _DATAF(-0.24669840931892395000)},

7590 {_DATAF(-0.96918684244155884000), _DATAF(-0.24632674455642700000)},

7591 {_DATAF(-0.96928125619888306000), _DATAF(-0.24595504999160767000)},

7592 {_DATAF(-0.96937549114227295000), _DATAF(-0.24558331072330475000)},

7593 {_DATAF(-0.96946960687637329000), _DATAF(-0.24521154165267944000)},

7594 {_DATAF(-0.96956354379653931000), _DATAF(-0.24483974277973175000)},

7595 {_DATAF(-0.96965736150741577000), _DATAF(-0.24446789920330048000)},

7596 {_DATAF(-0.96975106000900269000), _DATAF(-0.24409602582454681000)},

7597 {_DATAF(-0.96984457969665527000), _DATAF(-0.24372410774230957000)},

7598 {_DATAF(-0.96993798017501831000), _DATAF(-0.24335215985774994000)},

7599 {_DATAF(-0.97003126144409180000), _DATAF(-0.24298018217086792000)},

7600 {_DATAF(-0.97012436389923096000), _DATAF(-0.24260815978050232000)},

7601 {_DATAF(-0.97021734714508057000), _DATAF(-0.24223610758781433000)},

7602 {_DATAF(-0.97031015157699585000), _DATAF(-0.24186401069164276000)},

7603 {_DATAF(-0.97040283679962158000), _DATAF(-0.24149188399314880000)},

7604 {_DATAF(-0.97049540281295776000), _DATAF(-0.24111972749233246000)},

7605 {_DATAF(-0.97058779001235962000), _DATAF(-0.24074752628803253000)},

7606 {_DATAF(-0.97068005800247192000), _DATAF(-0.24037529528141022000)},

7607 {_DATAF(-0.97077214717864990000), _DATAF(-0.24000301957130432000)},

7608 {_DATAF(-0.97086411714553833000), _DATAF(-0.23963071405887604000)},

7609 {_DATAF(-0.97095590829849243000), _DATAF(-0.23925837874412537000)},

7610 {_DATAF(-0.97104763984680176000), _DATAF(-0.23888599872589111000)},

7611 {_DATAF(-0.97113913297653198000), _DATAF(-0.23851358890533447000)},

7612 {_DATAF(-0.97123056650161743000), _DATAF(-0.23814114928245544000)},

7613 {_DATAF(-0.97132182121276855000), _DATAF(-0.23776866495609283000)},

7614 {_DATAF(-0.97141289710998535000), _DATAF(-0.23739615082740784000)},

7615 {_DATAF(-0.97150391340255737000), _DATAF(-0.23702360689640045000)},

7616 {_DATAF(-0.97159469127655029000), _DATAF(-0.23665101826190948000)},

7617 {_DATAF(-0.97168540954589844000), _DATAF(-0.23627839982509613000)},

7618 {_DATAF(-0.97177594900131226000), _DATAF(-0.23590575158596039000)},

7619 {_DATAF(-0.97186630964279175000), _DATAF(-0.23553305864334106000)},

7620 {_DATAF(-0.97195661067962646000), _DATAF(-0.23516033589839935000)},

7621 {_DATAF(-0.97204673290252686000), _DATAF(-0.23478758335113525000)},

7622 {_DATAF(-0.97213667631149292000), _DATAF(-0.23441478610038757000)},

7623 {_DATAF(-0.97222650051116943000), _DATAF(-0.23404195904731750000)},

7624 {_DATAF(-0.97231620550155640000), _DATAF(-0.23366910219192505000)},

7625 {_DATAF(-0.97240573167800903000), _DATAF(-0.23329620063304901000)},

7626 {_DATAF(-0.97249513864517212000), _DATAF(-0.23292326927185059000)},

7627 {_DATAF(-0.97258436679840088000), _DATAF(-0.23255030810832977000)},

7628 {_DATAF(-0.97267347574234009000), _DATAF(-0.23217730224132538000)},

7629 {_DATAF(-0.97276246547698975000), _DATAF(-0.23180428147315979000)},

7630 {_DATAF(-0.97285127639770508000), _DATAF(-0.23143121600151062000)},

7631 {_DATAF(-0.97293996810913086000), _DATAF(-0.23105810582637787000)},

7632 {_DATAF(-0.97302848100662231000), _DATAF(-0.23068498075008392000)},

7633 {_DATAF(-0.97311687469482422000), _DATAF(-0.23031181097030640000)},

7634 {_DATAF(-0.97320514917373657000), _DATAF(-0.22993859648704529000)},

7635 {_DATAF(-0.97329324483871460000), _DATAF(-0.22956536710262299000)},

7636 {_DATAF(-0.97338122129440308000), _DATAF(-0.22919209301471710000)},

7637 {_DATAF(-0.97346901893615723000), _DATAF(-0.22881878912448883000)},

7638 {_DATAF(-0.97355669736862183000), _DATAF(-0.22844545543193817000)},

7639 {_DATAF(-0.97364425659179688000), _DATAF(-0.22807207703590393000)},

7640 {_DATAF(-0.97373163700103760000), _DATAF(-0.22769868373870850000)},

7641 {_DATAF(-0.97381889820098877000), _DATAF(-0.22732524573802948000)},

7642 {_DATAF(-0.97390598058700562000), _DATAF(-0.22695176303386688000)},

7643 {_DATAF(-0.97399294376373291000), _DATAF(-0.22657826542854309000)},

7644 {_DATAF(-0.97407978773117065000), _DATAF(-0.22620472311973572000)},

7645 {_DATAF(-0.97416645288467407000), _DATAF(-0.22583115100860596000)},

7646 {_DATAF(-0.97425299882888794000), _DATAF(-0.22545754909515381000)},

7647 {_DATAF(-0.97433936595916748000), _DATAF(-0.22508391737937927000)},

7648 {_DATAF(-0.97442561388015747000), _DATAF(-0.22471024096012115000)},

7649 {_DATAF(-0.97451174259185791000), _DATAF(-0.22433653473854065000)},

7650 {_DATAF(-0.97459769248962402000), _DATAF(-0.22396279871463776000)},

7651 {_DATAF(-0.97468352317810059000), _DATAF(-0.22358903288841248000)},

7652 {_DATAF(-0.97476917505264282000), _DATAF(-0.22321522235870361000)},

7653 {_DATAF(-0.97485470771789551000), _DATAF(-0.22284139692783356000)},

7654 {_DATAF(-0.97494012117385864000), _DATAF(-0.22246752679347992000)},

7655 {_DATAF(-0.97502535581588745000), _DATAF(-0.22209362685680389000)},

7656 {_DATAF(-0.97511047124862671000), _DATAF(-0.22171968221664429000)},

7657 {_DATAF(-0.97519540786743164000), _DATAF(-0.22134572267532349000)},

7658 {_DATAF(-0.97528022527694702000), _DATAF(-0.22097171843051910000)},

7659 {_DATAF(-0.97536486387252808000), _DATAF(-0.22059768438339233000)},

7660 {_DATAF(-0.97544938325881958000), _DATAF(-0.22022362053394318000)},

7661 {_DATAF(-0.97553378343582153000), _DATAF(-0.21984952688217163000)},

7662 {_DATAF(-0.97561800479888916000), _DATAF(-0.21947540342807770000)},

7663 {_DATAF(-0.97570210695266724000), _DATAF(-0.21910123527050018000)},

7664 {_DATAF(-0.97578608989715576000), _DATAF(-0.21872705221176147000)},

7665 {_DATAF(-0.97586989402770996000), _DATAF(-0.21835282444953918000)},

7666 {_DATAF(-0.97595357894897461000), _DATAF(-0.21797856688499451000)},

7667 {_DATAF(-0.97603708505630493000), _DATAF(-0.21760427951812744000)},

7668 {_DATAF(-0.97612047195434570000), _DATAF(-0.21722994744777679000)},

7669 {_DATAF(-0.97620368003845215000), _DATAF(-0.21685560047626495000)},

7670 {_DATAF(-0.97628676891326904000), _DATAF(-0.21648120880126953000)},

7671 {_DATAF(-0.97636973857879639000), _DATAF(-0.21610680222511292000)},

7672 {_DATAF(-0.97645252943038940000), _DATAF(-0.21573235094547272000)},

7673 {_DATAF(-0.97653520107269287000), _DATAF(-0.21535786986351013000)},

7674 {_DATAF(-0.97661769390106201000), _DATAF(-0.21498335897922516000)},

7675 {_DATAF(-0.97670006752014160000), _DATAF(-0.21460881829261780000)},

7676 {_DATAF(-0.97678232192993164000), _DATAF(-0.21423423290252686000)},

7677 {_DATAF(-0.97686439752578735000), _DATAF(-0.21385963261127472000)},

7678 {_DATAF(-0.97694635391235352000), _DATAF(-0.21348498761653900000)},

7679 {_DATAF(-0.97702813148498535000), _DATAF(-0.21311031281948090000)},

7680 {_DATAF(-0.97710978984832764000), _DATAF(-0.21273562312126160000)},

7681 {_DATAF(-0.97719132900238037000), _DATAF(-0.21236088871955872000)},

7682 {_DATAF(-0.97727268934249878000), _DATAF(-0.21198612451553345000)},

7683 {_DATAF(-0.97735387086868286000), _DATAF(-0.21161133050918579000)},

7684 {_DATAF(-0.97743499279022217000), _DATAF(-0.21123650670051575000)},

7685 {_DATAF(-0.97751593589782715000), _DATAF(-0.21086163818836212000)},

7686 {_DATAF(-0.97759670019149780000), _DATAF(-0.21048675477504730000)},

7687 {_DATAF(-0.97767734527587891000), _DATAF(-0.21011184155941010000)},

7688 {_DATAF(-0.97775787115097046000), _DATAF(-0.20973688364028931000)},

7689 {_DATAF(-0.97783821821212769000), _DATAF(-0.20936191082000732000)},

7690 {_DATAF(-0.97791844606399536000), _DATAF(-0.20898689329624176000)},

7691 {_DATAF(-0.97799849510192871000), _DATAF(-0.20861184597015381000)},

7692 {_DATAF(-0.97807842493057251000), _DATAF(-0.20823678374290466000)},

7693 {_DATAF(-0.97815823554992676000), _DATAF(-0.20786167681217194000)},

7694 {_DATAF(-0.97823786735534668000), _DATAF(-0.20748654007911682000)},

7695 {_DATAF(-0.97831737995147705000), _DATAF(-0.20711137354373932000)},

7696 {_DATAF(-0.97839671373367310000), _DATAF(-0.20673617720603943000)},

7697 {_DATAF(-0.97847592830657959000), _DATAF(-0.20636095106601715000)},

7698 {_DATAF(-0.97855502367019653000), _DATAF(-0.20598569512367249000)},

7699 {_DATAF(-0.97863394021987915000), _DATAF(-0.20561040937900543000)},

7700 {_DATAF(-0.97871267795562744000), _DATAF(-0.20523509383201599000)},

7701 {_DATAF(-0.97879135608673096000), _DATAF(-0.20485974848270416000)},

7702 {_DATAF(-0.97886985540390015000), _DATAF(-0.20448437333106995000)},

7703 {_DATAF(-0.97894817590713501000), _DATAF(-0.20410896837711334000)},

7704 {_DATAF(-0.97902637720108032000), _DATAF(-0.20373353362083435000)},

7705 {_DATAF(-0.97910445928573608000), _DATAF(-0.20335806906223297000)},

7706 {_DATAF(-0.97918236255645752000), _DATAF(-0.20298255980014801000)},

7707 {_DATAF(-0.97926014661788940000), _DATAF(-0.20260703563690186000)},

7708 {_DATAF(-0.97933775186538696000), _DATAF(-0.20223148167133331000)},

7709 {_DATAF(-0.97941523790359497000), _DATAF(-0.20185589790344238000)},

7710 {_DATAF(-0.97949254512786865000), _DATAF(-0.20148028433322906000)},

7711 {_DATAF(-0.97956979274749756000), _DATAF(-0.20110464096069336000)},

7712 {_DATAF(-0.97964680194854736000), _DATAF(-0.20072895288467407000)},

7713 {_DATAF(-0.97972375154495239000), _DATAF(-0.20035324990749359000)},

7714 {_DATAF(-0.97980046272277832000), _DATAF(-0.19997751712799072000)},

7715 {_DATAF(-0.97987711429595947000), _DATAF(-0.19960175454616547000)},

7716 {_DATAF(-0.97995358705520630000), _DATAF(-0.19922596216201782000)},

7717 {_DATAF(-0.98002988100051880000), _DATAF(-0.19885013997554779000)},

7718 {_DATAF(-0.98010611534118652000), _DATAF(-0.19847428798675537000)},

7719 {_DATAF(-0.98018211126327515000), _DATAF(-0.19809840619564056000)},

7720 {_DATAF(-0.98025804758071899000), _DATAF(-0.19772249460220337000)},

7721 {_DATAF(-0.98033380508422852000), _DATAF(-0.19734656810760498000)},

7722 {_DATAF(-0.98040938377380371000), _DATAF(-0.19697059690952301000)},

7723 {_DATAF(-0.98048484325408936000), _DATAF(-0.19659459590911865000)},

7724 {_DATAF(-0.98056018352508545000), _DATAF(-0.19621856510639191000)},

7725 {_DATAF(-0.98063534498214722000), _DATAF(-0.19584251940250397000)},

7726 {_DATAF(-0.98071038722991943000), _DATAF(-0.19546642899513245000)},

7727 {_DATAF(-0.98078525066375732000), _DATAF(-0.19509032368659973000)},

7728 {_DATAF(-0.98085999488830566000), _DATAF(-0.19471418857574463000)},

7729 {_DATAF(-0.98093461990356445000), _DATAF(-0.19433800876140594000)},

7730 {_DATAF(-0.98100906610488892000), _DATAF(-0.19396181404590607000)},

7731 {_DATAF(-0.98108339309692383000), _DATAF(-0.19358558952808380000)},

7732 {_DATAF(-0.98115754127502441000), _DATAF(-0.19320933520793915000)},

7733 {_DATAF(-0.98123157024383545000), _DATAF(-0.19283305108547211000)},

7734 {_DATAF(-0.98130548000335693000), _DATAF(-0.19245673716068268000)},

7735 {_DATAF(-0.98137921094894409000), _DATAF(-0.19208039343357086000)},

7736 {_DATAF(-0.98145276308059692000), _DATAF(-0.19170403480529785000)},

7737 {_DATAF(-0.98152625560760498000), _DATAF(-0.19132763147354126000)},

7738 {_DATAF(-0.98159950971603394000), _DATAF(-0.19095121324062347000)},

7739 {_DATAF(-0.98167270421981812000), _DATAF(-0.19057475030422211000)},

7740 {_DATAF(-0.98174571990966797000), _DATAF(-0.19019827246665955000)},

7741 {_DATAF(-0.98181855678558350000), _DATAF(-0.18982176482677460000)},

7742 {_DATAF(-0.98189127445220947000), _DATAF(-0.18944522738456726000)},

7743 {_DATAF(-0.98196387290954590000), _DATAF(-0.18906866014003754000)},

7744 {_DATAF(-0.98203629255294800000), _DATAF(-0.18869207799434662000)},

7745 {_DATAF(-0.98210859298706055000), _DATAF(-0.18831545114517212000)},

7746 {_DATAF(-0.98218071460723877000), _DATAF(-0.18793880939483643000)},

7747 {_DATAF(-0.98225271701812744000), _DATAF(-0.18756212294101715000)},

7748 {_DATAF(-0.98232460021972656000), _DATAF(-0.18718542158603668000)},

7749 {_DATAF(-0.98239630460739136000), _DATAF(-0.18680869042873383000)},

7750 {_DATAF(-0.98246788978576660000), _DATAF(-0.18643194437026978000)},

7751 {_DATAF(-0.98253929615020752000), _DATAF(-0.18605515360832214000)},

7752 {_DATAF(-0.98261058330535889000), _DATAF(-0.18567833304405212000)},

7753 {_DATAF(-0.98268169164657593000), _DATAF(-0.18530149757862091000)},

7754 {_DATAF(-0.98275268077850342000), _DATAF(-0.18492463231086731000)},

7755 {_DATAF(-0.98282355070114136000), _DATAF(-0.18454773724079132000)},

7756 {_DATAF(-0.98289424180984497000), _DATAF(-0.18417081236839294000)},

7757 {_DATAF(-0.98296481370925903000), _DATAF(-0.18379387259483337000)},

7758 {_DATAF(-0.98303520679473877000), _DATAF(-0.18341688811779022000)},

7759 {_DATAF(-0.98310548067092896000), _DATAF(-0.18303988873958588000)},

7760 {_DATAF(-0.98317563533782959000), _DATAF(-0.18266285955905914000)},

7761 {_DATAF(-0.98324561119079590000), _DATAF(-0.18228580057621002000)},

7762 {_DATAF(-0.98331540822982788000), _DATAF(-0.18190871179103851000)},

7763 {_DATAF(-0.98338508605957031000), _DATAF(-0.18153160810470581000)},

7764 {_DATAF(-0.98345464468002319000), _DATAF(-0.18115447461605072000)},

7765 {_DATAF(-0.98352402448654175000), _DATAF(-0.18077731132507324000)},

7766 {_DATAF(-0.98359328508377075000), _DATAF(-0.18040011823177338000)},

7767 {_DATAF(-0.98366242647171021000), _DATAF(-0.18002289533615112000)},

7768 {_DATAF(-0.98373138904571533000), _DATAF(-0.17964565753936768000)},

7769 {_DATAF(-0.98380023241043091000), _DATAF(-0.17926838994026184000)},

7770 {_DATAF(-0.98386889696121216000), _DATAF(-0.17889109253883362000)},

7771 {_DATAF(-0.98393744230270386000), _DATAF(-0.17851376533508301000)},

7772 {_DATAF(-0.98400580883026123000), _DATAF(-0.17813642323017120000)},

7773 {_DATAF(-0.98407405614852905000), _DATAF(-0.17775905132293701000)},

7774 {_DATAF(-0.98414212465286255000), _DATAF(-0.17738164961338043000)},

7775 {_DATAF(-0.98421007394790649000), _DATAF(-0.17700421810150146000)},

7776 {_DATAF(-0.98427790403366089000), _DATAF(-0.17662677168846130000)},

7777 {_DATAF(-0.98434555530548096000), _DATAF(-0.17624929547309875000)},

7778 {_DATAF(-0.98441308736801147000), _DATAF(-0.17587178945541382000)},

7779 {_DATAF(-0.98448044061660767000), _DATAF(-0.17549425363540649000)},

7780 {_DATAF(-0.98454767465591431000), _DATAF(-0.17511670291423798000)},

7781 {_DATAF(-0.98461478948593140000), _DATAF(-0.17473910748958588000)},

7782 {_DATAF(-0.98468172550201416000), _DATAF(-0.17436151206493378000)},

7783 {_DATAF(-0.98474848270416260000), _DATAF(-0.17398387193679810000)},

7784 {_DATAF(-0.98481518030166626000), _DATAF(-0.17360621690750122000)},

7785 {_DATAF(-0.98488163948059082000), _DATAF(-0.17322853207588196000)},

7786 {_DATAF(-0.98494803905487061000), _DATAF(-0.17285081744194031000)},

7787 {_DATAF(-0.98501425981521606000), _DATAF(-0.17247308790683746000)},

7788 {_DATAF(-0.98508030176162720000), _DATAF(-0.17209532856941223000)},

7789 {_DATAF(-0.98514622449874878000), _DATAF(-0.17171753942966461000)},

7790 {_DATAF(-0.98521202802658081000), _DATAF(-0.17133972048759460000)},

7791 {_DATAF(-0.98527765274047852000), _DATAF(-0.17096188664436340000)},

7792 {_DATAF(-0.98534315824508667000), _DATAF(-0.17058402299880981000)},

7793 {_DATAF(-0.98540848493576050000), _DATAF(-0.17020614445209503000)},

7794 {_DATAF(-0.98547369241714478000), _DATAF(-0.16982822120189667000)},

7795 {_DATAF(-0.98553872108459473000), _DATAF(-0.16945029795169830000)},

7796 {_DATAF(-0.98560363054275513000), _DATAF(-0.16907232999801636000)},

7797 {_DATAF(-0.98566842079162598000), _DATAF(-0.16869434714317322000)},

7798 {_DATAF(-0.98573303222656250000), _DATAF(-0.16831633448600769000)},

7799 {_DATAF(-0.98579752445220947000), _DATAF(-0.16793829202651978000)},

7800 {_DATAF(-0.98586183786392212000), _DATAF(-0.16756023466587067000)},

7801 {_DATAF(-0.98592603206634521000), _DATAF(-0.16718214750289917000)},

7802 {_DATAF(-0.98599004745483398000), _DATAF(-0.16680404543876648000)},

7803 {_DATAF(-0.98605394363403320000), _DATAF(-0.16642589867115021000)},

7804 {_DATAF(-0.98611772060394287000), _DATAF(-0.16604773700237274000)},

7805 {_DATAF(-0.98618131875991821000), _DATAF(-0.16566956043243408000)},

7806 {_DATAF(-0.98624479770660400000), _DATAF(-0.16529135406017303000)},

7807 {_DATAF(-0.98630809783935547000), _DATAF(-0.16491311788558960000)},

7808 {_DATAF(-0.98637127876281738000), _DATAF(-0.16453486680984497000)},

7809 {_DATAF(-0.98643428087234497000), _DATAF(-0.16415658593177795000)},

7810 {_DATAF(-0.98649716377258301000), _DATAF(-0.16377827525138855000)},

7811 {_DATAF(-0.98655992746353149000), _DATAF(-0.16339994966983795000)},

7812 {_DATAF(-0.98662251234054565000), _DATAF(-0.16302159428596497000)},

7813 {_DATAF(-0.98668491840362549000), _DATAF(-0.16264322400093079000)},

7814 {_DATAF(-0.98674726486206055000), _DATAF(-0.16226482391357422000)},

7815 {_DATAF(-0.98680937290191650000), _DATAF(-0.16188639402389526000)},

7816 {_DATAF(-0.98687142133712769000), _DATAF(-0.16150794923305511000)},

7817 {_DATAF(-0.98693329095840454000), _DATAF(-0.16112947463989258000)},

7818 {_DATAF(-0.98699498176574707000), _DATAF(-0.16075097024440765000)},

7819 {_DATAF(-0.98705655336380005000), _DATAF(-0.16037245094776154000)},

7820 {_DATAF(-0.98711800575256348000), _DATAF(-0.15999391674995422000)},

7821 {_DATAF(-0.98717927932739258000), _DATAF(-0.15961535274982452000)},

7822 {_DATAF(-0.98724043369293213000), _DATAF(-0.15923675894737244000)},

7823 {_DATAF(-0.98730140924453735000), _DATAF(-0.15885815024375916000)},

7824 {_DATAF(-0.98736226558685303000), _DATAF(-0.15847951173782349000)},

7825 {_DATAF(-0.98742294311523438000), _DATAF(-0.15810084342956543000)},

7826 {_DATAF(-0.98748350143432617000), _DATAF(-0.15772216022014618000)},

7827 {_DATAF(-0.98754394054412842000), _DATAF(-0.15734346210956573000)},

7828 {_DATAF(-0.98760420083999634000), _DATAF(-0.15696471929550171000)},

7829 {_DATAF(-0.98766434192657471000), _DATAF(-0.15658597648143768000)},

7830 {_DATAF(-0.98772430419921875000), _DATAF(-0.15620720386505127000)},

7831 {_DATAF(-0.98778414726257324000), _DATAF(-0.15582840144634247000)},

7832 {_DATAF(-0.98784381151199341000), _DATAF(-0.15544956922531128000)},

7833 {_DATAF(-0.98790335655212402000), _DATAF(-0.15507073700428009000)},

7834 {_DATAF(-0.98796278238296509000), _DATAF(-0.15469186007976532000)},

7835 {_DATAF(-0.98802202939987183000), _DATAF(-0.15431296825408936000)},

7836 {_DATAF(-0.98808109760284424000), _DATAF(-0.15393406152725220000)},

7837 {_DATAF(-0.98814010620117188000), _DATAF(-0.15355512499809265000)},

7838 {_DATAF(-0.98819887638092041000), _DATAF(-0.15317615866661072000)},

7839 {_DATAF(-0.98825758695602417000), _DATAF(-0.15279719233512878000)},

7840 {_DATAF(-0.98831611871719360000), _DATAF(-0.15241818130016327000)},

7841 {_DATAF(-0.98837447166442871000), _DATAF(-0.15203915536403656000)},

7842 {_DATAF(-0.98843270540237427000), _DATAF(-0.15166011452674866000)},

7843 {_DATAF(-0.98849081993103027000), _DATAF(-0.15128104388713837000)},

7844 {_DATAF(-0.98854875564575195000), _DATAF(-0.15090194344520569000)},

7845 {_DATAF(-0.98860651254653931000), _DATAF(-0.15052282810211182000)},

7846 {_DATAF(-0.98866420984268188000), _DATAF(-0.15014369785785675000)},

7847 {_DATAF(-0.98872166872024536000), _DATAF(-0.14976453781127930000)},

7848 {_DATAF(-0.98877906799316406000), _DATAF(-0.14938534796237946000)},

7849 {_DATAF(-0.98883628845214844000), _DATAF(-0.14900614321231842000)},

7850 {_DATAF(-0.98889333009719849000), _DATAF(-0.14862692356109619000)},

7851 {_DATAF(-0.98895025253295898000), _DATAF(-0.14824767410755157000)},

7852 {_DATAF(-0.98900705575942993000), _DATAF(-0.14786840975284576000)},

7853 {_DATAF(-0.98906368017196655000), _DATAF(-0.14748911559581757000)},

7854 {_DATAF(-0.98912018537521362000), _DATAF(-0.14710980653762817000)},

7855 {_DATAF(-0.98917651176452637000), _DATAF(-0.14673046767711639000)},

7856 {_DATAF(-0.98923271894454956000), _DATAF(-0.14635111391544342000)},

7857 {_DATAF(-0.98928874731063843000), _DATAF(-0.14597174525260925000)},

7858 {_DATAF(-0.98934465646743774000), _DATAF(-0.14559234678745270000)},

7859 {_DATAF(-0.98940044641494751000), _DATAF(-0.14521291851997375000)},

7860 {_DATAF(-0.98945605754852295000), _DATAF(-0.14483349025249481000)},

7861 {_DATAF(-0.98951148986816406000), _DATAF(-0.14445401728153229000)},

7862 {_DATAF(-0.98956686258316040000), _DATAF(-0.14407454431056976000)},

7863 {_DATAF(-0.98962199687957764000), _DATAF(-0.14369502663612366000)},

7864 {_DATAF(-0.98967707157135010000), _DATAF(-0.14331550896167755000)},

7865 {_DATAF(-0.98973196744918823000), _DATAF(-0.14293596148490906000)},

7866 {_DATAF(-0.98978668451309204000), _DATAF(-0.14255639910697937000)},

7867 {_DATAF(-0.98984128236770630000), _DATAF(-0.14217680692672729000)},

7868 {_DATAF(-0.98989570140838623000), _DATAF(-0.14179719984531403000)},

7869 {_DATAF(-0.98995006084442139000), _DATAF(-0.14141756296157837000)},

7870 {_DATAF(-0.99000418186187744000), _DATAF(-0.14103791117668152000)},

7871 {_DATAF(-0.99005818367004395000), _DATAF(-0.14065824449062347000)},

7872 {_DATAF(-0.99011206626892090000), _DATAF(-0.14027854800224304000)},

7873 {_DATAF(-0.99016582965850830000), _DATAF(-0.13989883661270142000)},

7874 {_DATAF(-0.99021935462951660000), _DATAF(-0.13951909542083740000)},

7875 {_DATAF(-0.99027281999588013000), _DATAF(-0.13913933932781219000)},

7876 {_DATAF(-0.99032610654830933000), _DATAF(-0.13875956833362579000)},

7877 {_DATAF(-0.99037921428680420000), _DATAF(-0.13837976753711700000)},

7878 {_DATAF(-0.99043226242065430000), _DATAF(-0.13799995183944702000)},

7879 {_DATAF(-0.99048507213592529000), _DATAF(-0.13762012124061584000)},

7880 {_DATAF(-0.99053776264190674000), _DATAF(-0.13724026083946228000)},

7881 {_DATAF(-0.99059033393859863000), _DATAF(-0.13686038553714752000)},

7882 {_DATAF(-0.99064278602600098000), _DATAF(-0.13648049533367157000)},

7883 {_DATAF(-0.99069499969482422000), _DATAF(-0.13610057532787323000)},

7884 {_DATAF(-0.99074715375900269000), _DATAF(-0.13572064042091370000)},

7885 {_DATAF(-0.99079912900924683000), _DATAF(-0.13534067571163177000)},

7886 {_DATAF(-0.99085092544555664000), _DATAF(-0.13496071100234985000)},

7887 {_DATAF(-0.99090266227722168000), _DATAF(-0.13458070158958435000)},

7888 {_DATAF(-0.99095416069030762000), _DATAF(-0.13420069217681885000)},

7889 {_DATAF(-0.99100553989410400000), _DATAF(-0.13382065296173096000)},

7890 {_DATAF(-0.99105679988861084000), _DATAF(-0.13344059884548187000)},

7891 {_DATAF(-0.99110794067382813000), _DATAF(-0.13306052982807159000)},

7892 {_DATAF(-0.99115884304046631000), _DATAF(-0.13268043100833893000)},

7893 {_DATAF(-0.99120968580245972000), _DATAF(-0.13230031728744507000)},

7894 {_DATAF(-0.99126034975051880000), _DATAF(-0.13192018866539001000)},

7895 {_DATAF(-0.99131083488464355000), _DATAF(-0.13154003024101257000)},

7896 {_DATAF(-0.99136126041412354000), _DATAF(-0.13115985691547394000)},

7897 {_DATAF(-0.99141144752502441000), _DATAF(-0.13077966868877411000)},

7898 {_DATAF(-0.99146151542663574000), _DATAF(-0.13039945065975189000)},

7899 {_DATAF(-0.99151146411895752000), _DATAF(-0.13001921772956848000)},

7900 {_DATAF(-0.99156123399734497000), _DATAF(-0.12963896989822388000)},

7901 {_DATAF(-0.99161088466644287000), _DATAF(-0.12925870716571808000)},

7902 {_DATAF(-0.99166041612625122000), _DATAF(-0.12887841463088989000)},

7903 {_DATAF(-0.99170976877212524000), _DATAF(-0.12849810719490051000)},

7904 {_DATAF(-0.99175894260406494000), _DATAF(-0.12811778485774994000)},

7905 {_DATAF(-0.99180799722671509000), _DATAF(-0.12773744761943817000)},

7906 {_DATAF(-0.99185693264007568000), _DATAF(-0.12735708057880402000)},

7907 {_DATAF(-0.99190568923950195000), _DATAF(-0.12697669863700867000)},

7908 {_DATAF(-0.99195432662963867000), _DATAF(-0.12659630179405212000)},

7909 {_DATAF(-0.99200278520584106000), _DATAF(-0.12621587514877319000)},

7910 {_DATAF(-0.99205112457275391000), _DATAF(-0.12583543360233307000)},

7911 {_DATAF(-0.99209928512573242000), _DATAF(-0.12545497715473175000)},

7912 {_DATAF(-0.99214732646942139000), _DATAF(-0.12507450580596924000)},

7913 {_DATAF(-0.99219524860382080000), _DATAF(-0.12469401955604553000)},

7914 {_DATAF(-0.99224299192428589000), _DATAF(-0.12431350350379944000)},

7915 {_DATAF(-0.99229061603546143000), _DATAF(-0.12393297255039215000)},

7916 {_DATAF(-0.99233806133270264000), _DATAF(-0.12355242669582367000)},

7917 {_DATAF(-0.99238532781600952000), _DATAF(-0.12317185848951340000)},

7918 {_DATAF(-0.99243253469467163000), _DATAF(-0.12279127538204193000)},

7919 {_DATAF(-0.99247956275939941000), _DATAF(-0.12241067737340927000)},

7920 {_DATAF(-0.99252641201019287000), _DATAF(-0.12203005701303482000)},

7921 {_DATAF(-0.99257314205169678000), _DATAF(-0.12164941430091858000)},

7922 {_DATAF(-0.99261969327926636000), _DATAF(-0.12126876413822174000)},

7923 {_DATAF(-0.99266612529754639000), _DATAF(-0.12088808417320251000)},

7924 {_DATAF(-0.99271243810653687000), _DATAF(-0.12050739675760269000)},

7925 {_DATAF(-0.99275857210159302000), _DATAF(-0.12012668699026108000)},

7926 {_DATAF(-0.99280458688735962000), _DATAF(-0.11974596232175827000)},

7927 {_DATAF(-0.99285042285919189000), _DATAF(-0.11936521530151367000)},

7928 {_DATAF(-0.99289613962173462000), _DATAF(-0.11898445338010788000)},

7929 {_DATAF(-0.99294167757034302000), _DATAF(-0.11860367655754089000)},

7930 {_DATAF(-0.99298709630966187000), _DATAF(-0.11822287738323212000)},

7931 {_DATAF(-0.99303233623504639000), _DATAF(-0.11784206330776215000)},

7932 {_DATAF(-0.99307745695114136000), _DATAF(-0.11746122688055038000)},

7933 {_DATAF(-0.99312245845794678000), _DATAF(-0.11708038300275803000)},

7934 {_DATAF(-0.99316728115081787000), _DATAF(-0.11669951677322388000)},

7935 {_DATAF(-0.99321192502975464000), _DATAF(-0.11631862819194794000)},

7936 {_DATAF(-0.99325650930404663000), _DATAF(-0.11593773216009140000)},

7937 {_DATAF(-0.99330085515975952000), _DATAF(-0.11555681377649307000)},

7938 {_DATAF(-0.99334514141082764000), _DATAF(-0.11517588049173355000)},

7939 {_DATAF(-0.99338918924331665000), _DATAF(-0.11479492485523224000)},

7940 {_DATAF(-0.99343317747116089000), _DATAF(-0.11441396176815033000)},

7941 {_DATAF(-0.99347698688507080000), _DATAF(-0.11403297632932663000)},

7942 {_DATAF(-0.99352061748504639000), _DATAF(-0.11365196853876114000)},

7943 {_DATAF(-0.99356412887573242000), _DATAF(-0.11327095329761505000)},

7944 {_DATAF(-0.99360752105712891000), _DATAF(-0.11288991570472717000)},

7945 {_DATAF(-0.99365073442459106000), _DATAF(-0.11250886321067810000)},

7946 {_DATAF(-0.99369376897811890000), _DATAF(-0.11212779581546783000)},

7947 {_DATAF(-0.99373674392700195000), _DATAF(-0.11174671351909637000)},

7948 {_DATAF(-0.99377948045730591000), _DATAF(-0.11136560887098312000)},

7949 {_DATAF(-0.99382215738296509000), _DATAF(-0.11098448932170868000)},

7950 {_DATAF(-0.99386465549468994000), _DATAF(-0.11060335487127304000)},

7951 {_DATAF(-0.99390697479248047000), _DATAF(-0.11022220551967621000)},

7952 {_DATAF(-0.99394917488098145000), _DATAF(-0.10984104126691818000)},

7953 {_DATAF(-0.99399119615554810000), _DATAF(-0.10945985466241837000)},

7954 {_DATAF(-0.99403309822082520000), _DATAF(-0.10907866060733795000)},

7955 {_DATAF(-0.99407488107681274000), _DATAF(-0.10869744420051575000)},

7956 {_DATAF(-0.99411648511886597000), _DATAF(-0.10831621289253235000)},

7957 {_DATAF(-0.99415796995162964000), _DATAF(-0.10793496668338776000)},

7958 {_DATAF(-0.99419927597045898000), _DATAF(-0.10755370557308197000)},

7959 {_DATAF(-0.99424046277999878000), _DATAF(-0.10717242211103439000)},

7960 {_DATAF(-0.99428147077560425000), _DATAF(-0.10679113119840622000)},

7961 {_DATAF(-0.99432235956192017000), _DATAF(-0.10640981793403625000)},

7962 {_DATAF(-0.99436306953430176000), _DATAF(-0.10602849721908569000)},

7963 {_DATAF(-0.99440366029739380000), _DATAF(-0.10564715415239334000)},

7964 {_DATAF(-0.99444413185119629000), _DATAF(-0.10526579618453979000)},

7965 {_DATAF(-0.99448442459106445000), _DATAF(-0.10488442331552505000)},

7966 {_DATAF(-0.99452453851699829000), _DATAF(-0.10450303554534912000)},

7967 {_DATAF(-0.99456459283828735000), _DATAF(-0.10412163287401199000)},

7968 {_DATAF(-0.99460440874099731000), _DATAF(-0.10374021530151367000)},

7969 {_DATAF(-0.99464416503906250000), _DATAF(-0.10335878282785416000)},

7970 {_DATAF(-0.99468368291854858000), _DATAF(-0.10297733545303345000)},

7971 {_DATAF(-0.99472314119338989000), _DATAF(-0.10259586572647095000)},

7972 {_DATAF(-0.99476242065429688000), _DATAF(-0.10221438854932785000)},

7973 {_DATAF(-0.99480152130126953000), _DATAF(-0.10183289647102356000)},

7974 {_DATAF(-0.99484050273895264000), _DATAF(-0.10145138949155807000)},

7975 {_DATAF(-0.99487930536270142000), _DATAF(-0.10106986016035080000)},

7976 {_DATAF(-0.99491798877716064000), _DATAF(-0.10068832337856293000)},

7977 {_DATAF(-0.99495655298233032000), _DATAF(-0.10030677169561386000)},

7978 {_DATAF(-0.99499493837356567000), _DATAF(-0.09992520511150360100)},

7979 {_DATAF(-0.99503320455551147000), _DATAF(-0.09954361617565155000)},

7980 {_DATAF(-0.99507129192352295000), _DATAF(-0.09916201978921890300)},

7981 {_DATAF(-0.99510926008224487000), _DATAF(-0.09878040850162506100)},

7982 {_DATAF(-0.99514704942703247000), _DATAF(-0.09839878231287002600)},

7983 {_DATAF(-0.99518471956253052000), _DATAF(-0.09801714122295379600)},

7984 {_DATAF(-0.99522227048873901000), _DATAF(-0.09763548523187637300)},

7985 {_DATAF(-0.99525958299636841000), _DATAF(-0.09725381433963775600)},

7986 {_DATAF(-0.99529683589935303000), _DATAF(-0.09687212854623794600)},

7987 {_DATAF(-0.99533390998840332000), _DATAF(-0.09649042785167694100)},

7988 {_DATAF(-0.99537086486816406000), _DATAF(-0.09610871970653533900)},

7989 {_DATAF(-0.99540764093399048000), _DATAF(-0.09572698920965194700)},

7990 {_DATAF(-0.99544423818588257000), _DATAF(-0.09534525126218795800)},

7991 {_DATAF(-0.99548077583312988000), _DATAF(-0.09496349841356277500)},

7992 {_DATAF(-0.99551707506179810000), _DATAF(-0.09458172321319580100)},

7993 {_DATAF(-0.99555331468582153000), _DATAF(-0.09419994056224823000)},

7994 {_DATAF(-0.99558937549591064000), _DATAF(-0.09381814301013946500)},

7995 {_DATAF(-0.99562525749206543000), _DATAF(-0.09343633800745010400)},

7996 {_DATAF(-0.99566102027893066000), _DATAF(-0.09305451065301895100)},

7997 {_DATAF(-0.99569660425186157000), _DATAF(-0.09267267584800720200)},

7998 {_DATAF(-0.99573206901550293000), _DATAF(-0.09229081869125366200)},

7999 {_DATAF(-0.99576741456985474000), _DATAF(-0.09190895408391952500)},

8000 {_DATAF(-0.99580258131027222000), _DATAF(-0.09152707457542419400)},

8001 {_DATAF(-0.99583762884140015000), _DATAF(-0.09114518761634826700)},

8002 {_DATAF(-0.99587249755859375000), _DATAF(-0.09076327830553054800)},

8003 {_DATAF(-0.99590724706649780000), _DATAF(-0.09038136154413223300)},

8004 {_DATAF(-0.99594181776046753000), _DATAF(-0.08999942988157272300)},

8005 {_DATAF(-0.99597626924514771000), _DATAF(-0.08961748331785202000)},

8006 {_DATAF(-0.99601054191589355000), _DATAF(-0.08923552185297012300)},

8007 {_DATAF(-0.99604469537734985000), _DATAF(-0.08885355293750762900)},

8008 {_DATAF(-0.99607872962951660000), _DATAF(-0.08847156912088394200)},

8009 {_DATAF(-0.99611258506774902000), _DATAF(-0.08808957040309906000)},

8010 {_DATAF(-0.99614626169204712000), _DATAF(-0.08770755678415298500)},

8011 {_DATAF(-0.99617981910705566000), _DATAF(-0.08732553571462631200)},

8012 {_DATAF(-0.99621325731277466000), _DATAF(-0.08694349974393844600)},

8013 {_DATAF(-0.99624651670455933000), _DATAF(-0.08656144887208938600)},

8014 {_DATAF(-0.99627965688705444000), _DATAF(-0.08617939054965972900)},

8015 {_DATAF(-0.99631261825561523000), _DATAF(-0.08579730987548828100)},

8016 {_DATAF(-0.99634546041488647000), _DATAF(-0.08541522175073623700)},

8017 {_DATAF(-0.99637812376022339000), _DATAF(-0.08503312617540359500)},

8018 {_DATAF(-0.99641066789627075000), _DATAF(-0.08465101569890976000)},

8019 {_DATAF(-0.99644303321838379000), _DATAF(-0.08426889032125473000)},

8020 {_DATAF(-0.99647527933120728000), _DATAF(-0.08388675004243850700)},

8021 {_DATAF(-0.99650740623474121000), _DATAF(-0.08350460231304168700)},

8022 {_DATAF(-0.99653935432434082000), _DATAF(-0.08312243968248367300)},

8023 {_DATAF(-0.99657112360000610000), _DATAF(-0.08274026215076446500)},

8024 {_DATAF(-0.99660277366638184000), _DATAF(-0.08235807716846466100)},

8025 {_DATAF(-0.99663430452346802000), _DATAF(-0.08197587728500366200)},

8026 {_DATAF(-0.99666565656661987000), _DATAF(-0.08159366995096206700)},

8027 {_DATAF(-0.99669688940048218000), _DATAF(-0.08121144771575927700)},

8028 {_DATAF(-0.99672794342041016000), _DATAF(-0.08082921057939529400)},

8029 {_DATAF(-0.99675887823104858000), _DATAF(-0.08044696599245071400)},

8030 {_DATAF(-0.99678969383239746000), _DATAF(-0.08006470650434494000)},

8031 {_DATAF(-0.99682027101516724000), _DATAF(-0.07968243956565856900)},

8032 {_DATAF(-0.99685078859329224000), _DATAF(-0.07930015772581100500)},

8033 {_DATAF(-0.99688112735748291000), _DATAF(-0.07891786098480224600)},

8034 {_DATAF(-0.99691128730773926000), _DATAF(-0.07853555679321289100)},

8035 {_DATAF(-0.99694132804870605000), _DATAF(-0.07815324515104293800)},

8036 {_DATAF(-0.99697124958038330000), _DATAF(-0.07777091115713119500)},

8037 {_DATAF(-0.99700099229812622000), _DATAF(-0.07738857716321945200)},

8038 {_DATAF(-0.99703061580657959000), _DATAF(-0.07700622081756591800)},

8039 {_DATAF(-0.99706006050109863000), _DATAF(-0.07662386447191238400)},

8040 {_DATAF(-0.99708938598632813000), _DATAF(-0.07624148577451705900)},

8041 {_DATAF(-0.99711853265762329000), _DATAF(-0.07585910707712173500)},

8042 {_DATAF(-0.99714756011962891000), _DATAF(-0.07547670602798461900)},

8043 {_DATAF(-0.99717640876770020000), _DATAF(-0.07509429752826690700)},

8044 {_DATAF(-0.99720513820648193000), _DATAF(-0.07471188157796859700)},

8045 {_DATAF(-0.99723374843597412000), _DATAF(-0.07432945072650909400)},

8046 {_DATAF(-0.99726217985153198000), _DATAF(-0.07394701242446899400)},

8047 {_DATAF(-0.99729043245315552000), _DATAF(-0.07356456667184829700)},

8048 {_DATAF(-0.99731856584548950000), _DATAF(-0.07318209856748580900)},

8049 {_DATAF(-0.99734658002853394000), _DATAF(-0.07279963046312332200)},

8050 {_DATAF(-0.99737441539764404000), _DATAF(-0.07241714745759964000)},

8051 {_DATAF(-0.99740213155746460000), _DATAF(-0.07203464955091476400)},

8052 {_DATAF(-0.99742966890335083000), _DATAF(-0.07165215164422988900)},

8053 {_DATAF(-0.99745708703994751000), _DATAF(-0.07126963138580322300)},

8054 {_DATAF(-0.99748432636260986000), _DATAF(-0.07088711112737655600)},

8055 {_DATAF(-0.99751144647598267000), _DATAF(-0.07050457596778869600)},

8056 {_DATAF(-0.99753844738006592000), _DATAF(-0.07012202590703964200)},

8057 {_DATAF(-0.99756520986557007000), _DATAF(-0.06973946839570999100)},

8058 {_DATAF(-0.99759191274642944000), _DATAF(-0.06935690343379974400)},

8059 {_DATAF(-0.99761843681335449000), _DATAF(-0.06897433102130889900)},

8060 {_DATAF(-0.99764484167098999000), _DATAF(-0.06859174370765686000)},

8061 {_DATAF(-0.99767106771469116000), _DATAF(-0.06820914149284362800)},

8062 {_DATAF(-0.99769711494445801000), _DATAF(-0.06782653927803039600)},

8063 {_DATAF(-0.99772304296493530000), _DATAF(-0.06744392216205596900)},

8064 {_DATAF(-0.99774885177612305000), _DATAF(-0.06706129014492034900)},

8065 {_DATAF(-0.99777448177337646000), _DATAF(-0.06667865812778472900)},

8066 {_DATAF(-0.99779999256134033000), _DATAF(-0.06629601120948791500)},

8067 {_DATAF(-0.99782532453536987000), _DATAF(-0.06591334939002990700)},

8068 {_DATAF(-0.99785053730010986000), _DATAF(-0.06553068757057189900)},

8069 {_DATAF(-0.99787563085556030000), _DATAF(-0.06514801084995269800)},

8070 {_DATAF(-0.99790054559707642000), _DATAF(-0.06476532667875289900)},

8071 {_DATAF(-0.99792528152465820000), _DATAF(-0.06438262760639190700)},

8072 {_DATAF(-0.99794989824295044000), _DATAF(-0.06399992853403091400)},

8073 {_DATAF(-0.99797439575195313000), _DATAF(-0.06361721456050872800)},

8074 {_DATAF(-0.99799871444702148000), _DATAF(-0.06323449313640594500)},

8075 {_DATAF(-0.99802285432815552000), _DATAF(-0.06285175681114196800)},

8076 {_DATAF(-0.99804687500000000000), _DATAF(-0.06246901676058769200)},

8077 {_DATAF(-0.99807077646255493000), _DATAF(-0.06208626553416252100)},

8078 {_DATAF(-0.99809449911117554000), _DATAF(-0.06170350685715675400)},

8079 {_DATAF(-0.99811810255050659000), _DATAF(-0.06132073700428009000)},

8080 {_DATAF(-0.99814152717590332000), _DATAF(-0.06093795970082283000)},

8081 {_DATAF(-0.99816483259201050000), _DATAF(-0.06055517122149467500)},

8082 {_DATAF(-0.99818801879882813000), _DATAF(-0.06017237529158592200)},

8083 {_DATAF(-0.99821102619171143000), _DATAF(-0.05978957191109657300)},

8084 {_DATAF(-0.99823385477066040000), _DATAF(-0.05940675735473632800)},

8085 {_DATAF(-0.99825656414031982000), _DATAF(-0.05902393534779548600)},

8086 {_DATAF(-0.99827915430068970000), _DATAF(-0.05864110589027404800)},

8087 {_DATAF(-0.99830156564712524000), _DATAF(-0.05825826525688171400)},

8088 {_DATAF(-0.99832379817962646000), _DATAF(-0.05787541717290878300)},

8089 {_DATAF(-0.99834591150283813000), _DATAF(-0.05749255791306495700)},

8090 {_DATAF(-0.99836790561676025000), _DATAF(-0.05710969492793083200)},

8091 {_DATAF(-0.99838972091674805000), _DATAF(-0.05672682076692581200)},

8092 {_DATAF(-0.99841141700744629000), _DATAF(-0.05634393915534019500)},

8093 {_DATAF(-0.99843293428421021000), _DATAF(-0.05596105009317398100)},

8094 {_DATAF(-0.99845433235168457000), _DATAF(-0.05557814985513687100)},

8095 {_DATAF(-0.99847555160522461000), _DATAF(-0.05519524589180946400)},

8096 {_DATAF(-0.99849665164947510000), _DATAF(-0.05481233075261116000)},

8097 {_DATAF(-0.99851763248443604000), _DATAF(-0.05442940816283226000)},

8098 {_DATAF(-0.99853843450546265000), _DATAF(-0.05404647812247276300)},

8099 {_DATAF(-0.99855905771255493000), _DATAF(-0.05366353690624237100)},

8100 {_DATAF(-0.99857956171035767000), _DATAF(-0.05328059196472168000)},

8101 {_DATAF(-0.99859994649887085000), _DATAF(-0.05289763584733009300)},

8102 {_DATAF(-0.99862015247344971000), _DATAF(-0.05251467600464820900)},

8103 {_DATAF(-0.99864023923873901000), _DATAF(-0.05213170498609542800)},

8104 {_DATAF(-0.99866014719009399000), _DATAF(-0.05174872651696205100)},

8105 {_DATAF(-0.99867993593215942000), _DATAF(-0.05136574059724807700)},

8106 {_DATAF(-0.99869954586029053000), _DATAF(-0.05098275095224380500)},

8107 {_DATAF(-0.99871903657913208000), _DATAF(-0.05059975013136863700)},

8108 {_DATAF(-0.99873834848403931000), _DATAF(-0.05021674185991287200)},

8109 {_DATAF(-0.99875754117965698000), _DATAF(-0.04983372613787651100)},

8110 {_DATAF(-0.99877655506134033000), _DATAF(-0.04945070296525955200)},

8111 {_DATAF(-0.99879544973373413000), _DATAF(-0.04906767606735229500)},

8112 {_DATAF(-0.99881422519683838000), _DATAF(-0.04868463799357414200)},

8113 {_DATAF(-0.99883282184600830000), _DATAF(-0.04830159246921539300)},

8114 {_DATAF(-0.99885123968124390000), _DATAF(-0.04791854321956634500)},

8115 {_DATAF(-0.99886953830718994000), _DATAF(-0.04753548279404640200)},

8116 {_DATAF(-0.99888771772384644000), _DATAF(-0.04715241864323616000)},

8117 {_DATAF(-0.99890571832656860000), _DATAF(-0.04676934704184532200)},

8118 {_DATAF(-0.99892359972000122000), _DATAF(-0.04638626798987388600)},

8119 {_DATAF(-0.99894130229949951000), _DATAF(-0.04600318148732185400)},

8120 {_DATAF(-0.99895888566970825000), _DATAF(-0.04562009125947952300)},

8121 {_DATAF(-0.99897629022598267000), _DATAF(-0.04523698985576629600)},

8122 {_DATAF(-0.99899357557296753000), _DATAF(-0.04485388472676277200)},

8123 {_DATAF(-0.99901068210601807000), _DATAF(-0.04447077214717865000)},

8124 {_DATAF(-0.99902766942977905000), _DATAF(-0.04408765211701393100)},

8125 {_DATAF(-0.99904447793960571000), _DATAF(-0.04370452836155891400)},

8126 {_DATAF(-0.99906116724014282000), _DATAF(-0.04332139343023300200)},

8127 {_DATAF(-0.99907773733139038000), _DATAF(-0.04293825849890708900)},

8128 {_DATAF(-0.99909412860870361000), _DATAF(-0.04255511239171028100)},

8129 {_DATAF(-0.99911034107208252000), _DATAF(-0.04217196255922317500)},

8130 {_DATAF(-0.99912649393081665000), _DATAF(-0.04178880527615547200)},

8131 {_DATAF(-0.99914240837097168000), _DATAF(-0.04140564054250717200)},

8132 {_DATAF(-0.99915820360183716000), _DATAF(-0.04102247208356857300)},

8133 {_DATAF(-0.99917387962341309000), _DATAF(-0.04063929617404937700)},

8134 {_DATAF(-0.99918937683105469000), _DATAF(-0.04025611653923988300)},

8135 {_DATAF(-0.99920475482940674000), _DATAF(-0.03987292572855949400)},

8136 {_DATAF(-0.99921995401382446000), _DATAF(-0.03948973491787910500)},

8137 {_DATAF(-0.99923503398895264000), _DATAF(-0.03910653665661811800)},

8138 {_DATAF(-0.99924999475479126000), _DATAF(-0.03872333094477653500)},

8139 {_DATAF(-0.99926477670669556000), _DATAF(-0.03834012150764465300)},

8140 {_DATAF(-0.99927937984466553000), _DATAF(-0.03795690461993217500)},

8141 {_DATAF(-0.99929386377334595000), _DATAF(-0.03757368400692939800)},

8142 {_DATAF(-0.99930816888809204000), _DATAF(-0.03719045594334602400)},

8143 {_DATAF(-0.99932235479354858000), _DATAF(-0.03680722415447235100)},

8144 {_DATAF(-0.99933642148971558000), _DATAF(-0.03642398491501808200)},

8145 {_DATAF(-0.99935030937194824000), _DATAF(-0.03604074195027351400)},

8146 {_DATAF(-0.99936407804489136000), _DATAF(-0.03565749153494834900)},

8147 {_DATAF(-0.99937766790390015000), _DATAF(-0.03527423739433288600)},

8148 {_DATAF(-0.99939113855361938000), _DATAF(-0.03489097952842712400)},

8149 {_DATAF(-0.99940443038940430000), _DATAF(-0.03450771421194076500)},

8150 {_DATAF(-0.99941760301589966000), _DATAF(-0.03412444517016410800)},

8151 {_DATAF(-0.99943059682846069000), _DATAF(-0.03374117240309715300)},

8152 {_DATAF(-0.99944347143173218000), _DATAF(-0.03335789218544960000)},

8153 {_DATAF(-0.99945616722106934000), _DATAF(-0.03297460824251174900)},

8154 {_DATAF(-0.99946874380111694000), _DATAF(-0.03259132057428360000)},

8155 {_DATAF(-0.99948120117187500000), _DATAF(-0.03220802545547485400)},

8156 {_DATAF(-0.99949347972869873000), _DATAF(-0.03182472661137580900)},

8157 {_DATAF(-0.99950557947158813000), _DATAF(-0.03144142404198646500)},

8158 {_DATAF(-0.99951756000518799000), _DATAF(-0.03105811588466167400)},

8159 {_DATAF(-0.99952942132949829000), _DATAF(-0.03067480400204658500)},

8160 {_DATAF(-0.99954110383987427000), _DATAF(-0.03029148653149604800)},

8161 {_DATAF(-0.99955266714096069000), _DATAF(-0.02990816533565521200)},

8162 {_DATAF(-0.99956405162811279000), _DATAF(-0.02952483855187892900)},

8163 {_DATAF(-0.99957531690597534000), _DATAF(-0.02914150804281234700)},

8164 {_DATAF(-0.99958640336990356000), _DATAF(-0.02875817380845546700)},

8165 {_DATAF(-0.99959737062454224000), _DATAF(-0.02837483584880828900)},

8166 {_DATAF(-0.99960815906524658000), _DATAF(-0.02799149230122566200)},

8167 {_DATAF(-0.99961882829666138000), _DATAF(-0.02760814502835273700)},

8168 {_DATAF(-0.99962931871414185000), _DATAF(-0.02722479403018951400)},

8169 {_DATAF(-0.99963968992233276000), _DATAF(-0.02684143930673599200)},

8170 {_DATAF(-0.99964994192123413000), _DATAF(-0.02645808085799217200)},

8171 {_DATAF(-0.99966001510620117000), _DATAF(-0.02607471868395805400)},

8172 {_DATAF(-0.99966990947723389000), _DATAF(-0.02569135092198848700)},

8173 {_DATAF(-0.99967968463897705000), _DATAF(-0.02530798129737377200)},

8174 {_DATAF(-0.99968934059143066000), _DATAF(-0.02492460608482360800)},

8175 {_DATAF(-0.99969881772994995000), _DATAF(-0.02454122900962829600)},

8176 {_DATAF(-0.99970817565917969000), _DATAF(-0.02415784634649753600)},

8177 {_DATAF(-0.99971735477447510000), _DATAF(-0.02377446182072162600)},

8178 {_DATAF(-0.99972641468048096000), _DATAF(-0.02339107356965541800)},

8179 {_DATAF(-0.99973529577255249000), _DATAF(-0.02300768159329891200)},

8180 {_DATAF(-0.99974405765533447000), _DATAF(-0.02262428589165210700)},

8181 {_DATAF(-0.99975264072418213000), _DATAF(-0.02224088832736015300)},

8182 {_DATAF(-0.99976110458374023000), _DATAF(-0.02185748517513275100)},

8183 {_DATAF(-0.99976938962936401000), _DATAF(-0.02147408016026020100)},

8184 {_DATAF(-0.99977755546569824000), _DATAF(-0.02109067142009735100)},

8185 {_DATAF(-0.99978560209274292000), _DATAF(-0.02070726081728935200)},

8186 {_DATAF(-0.99979346990585327000), _DATAF(-0.02032384648919105500)},

8187 {_DATAF(-0.99980115890502930000), _DATAF(-0.01994042843580246000)},

8188 {_DATAF(-0.99980872869491577000), _DATAF(-0.01955700851976871500)},

8189 {_DATAF(-0.99981617927551270000), _DATAF(-0.01917358487844467200)},

8190 {_DATAF(-0.99982345104217529000), _DATAF(-0.01879015937447547900)},

8191 {_DATAF(-0.99983060359954834000), _DATAF(-0.01840673014521598800)},

8192 {_DATAF(-0.99983757734298706000), _DATAF(-0.01802329905331134800)},

8193 {_DATAF(-0.99984443187713623000), _DATAF(-0.01763986423611640900)},

8194 {_DATAF(-0.99985110759735107000), _DATAF(-0.01725642755627632100)},

8195 {_DATAF(-0.99985766410827637000), _DATAF(-0.01687298715114593500)},

8196 {_DATAF(-0.99986404180526733000), _DATAF(-0.01648954674601554900)},

8197 {_DATAF(-0.99987030029296875000), _DATAF(-0.01610610261559486400)},

8198 {_DATAF(-0.99987637996673584000), _DATAF(-0.01572265475988388100)},

8199 {_DATAF(-0.99988234043121338000), _DATAF(-0.01533920597285032300)},

8200 {_DATAF(-0.99988818168640137000), _DATAF(-0.01495575532317161600)},

8201 {_DATAF(-0.99989384412765503000), _DATAF(-0.01457230187952518500)},

8202 {_DATAF(-0.99989932775497437000), _DATAF(-0.01418884657323360400)},

8203 {_DATAF(-0.99990469217300415000), _DATAF(-0.01380538847297430000)},

8204 {_DATAF(-0.99990993738174438000), _DATAF(-0.01342192851006984700)},

8205 {_DATAF(-0.99991500377655029000), _DATAF(-0.01303846761584281900)},

8206 {_DATAF(-0.99991995096206665000), _DATAF(-0.01265500392764806700)},

8207 {_DATAF(-0.99992471933364868000), _DATAF(-0.01227153837680816700)},

8208 {_DATAF(-0.99992930889129639000), _DATAF(-0.01188807096332311600)},

8209 {_DATAF(-0.99993383884429932000), _DATAF(-0.01150460168719291700)},

8210 {_DATAF(-0.99993813037872314000), _DATAF(-0.01112113147974014300)},

8211 {_DATAF(-0.99994236230850220000), _DATAF(-0.01073765940964222000)},

8212 {_DATAF(-0.99994641542434692000), _DATAF(-0.01035418547689914700)},

8213 {_DATAF(-0.99995028972625732000), _DATAF(-0.00997070968151092530)},

8214 {_DATAF(-0.99995404481887817000), _DATAF(-0.00958723295480012890)},

8215 {_DATAF(-0.99995762109756470000), _DATAF(-0.00920375436544418330)},

8216 {_DATAF(-0.99996107816696167000), _DATAF(-0.00882027484476566310)},

8217 {_DATAF(-0.99996441602706909000), _DATAF(-0.00843679439276456830)},

8218 {_DATAF(-0.99996757507324219000), _DATAF(-0.00805331207811832430)},

8219 {_DATAF(-0.99997061491012573000), _DATAF(-0.00766982883214950560)},

8220 {_DATAF(-0.99997347593307495000), _DATAF(-0.00728634418919682500)},

8221 {_DATAF(-0.99997615814208984000), _DATAF(-0.00690285861492156980)},

8222 {_DATAF(-0.99997872114181519000), _DATAF(-0.00651937210932374000)},

8223 {_DATAF(-0.99998116493225098000), _DATAF(-0.00613588467240333560)},

8224 {_DATAF(-0.99998342990875244000), _DATAF(-0.00575239630416035650)},

8225 {_DATAF(-0.99998557567596436000), _DATAF(-0.00536890700459480290)},

8226 {_DATAF(-0.99998760223388672000), _DATAF(-0.00498541677370667460)},

8227 {_DATAF(-0.99998939037322998000), _DATAF(-0.00460192607715725900)},

8228 {_DATAF(-0.99999111890792847000), _DATAF(-0.00421843444928526880)},

8229 {_DATAF(-0.99999266862869263000), _DATAF(-0.00383494258858263490)},

8230 {_DATAF(-0.99999403953552246000), _DATAF(-0.00345145002938807010)},

8231 {_DATAF(-0.99999529123306274000), _DATAF(-0.00306795677170157430)},

8232 {_DATAF(-0.99999642372131348000), _DATAF(-0.00268446304835379120)},

8233 {_DATAF(-0.99999737739562988000), _DATAF(-0.00230096909217536450)},

8234 {_DATAF(-0.99999815225601196000), _DATAF(-0.00191747478675097230)},

8235 {_DATAF(-0.99999880790710449000), _DATAF(-0.00153398013208061460)},

8236 {_DATAF(-0.99999934434890747000), _DATAF(-0.00115048536099493500)},

8237 {_DATAF(-0.99999970197677612000), _DATAF(-0.00076699029887095094)},

8238 {_DATAF(-0.99999994039535522000), _DATAF(-0.00038349517853930593)},

8239 };

8240 /*lint +e915*/

Ifx_g_FftF32_twiddleTable

IFX_CONST cfloat32 Ifx_g_FftF32_twiddleTable[IFX_FFTF32_MAX_LENGTH/2]

Definition: Ifx_FftF32_TwiddleTable.c:46

IFX_CONST

#define IFX_CONST

Definition: Compilers.h:54

cfloat32

Definition: Ifx_Types.h:58

IFX_FFTF32_MAX_LENGTH

#define IFX_FFTF32_MAX_LENGTH

Maximum FFT length. If redefined, then Ifx_g_FftF32_bitReverseTable and Ifx_g_FftF32_twiddleTable sha...

Definition: Ifx_FftF32.h:60

Ifx_FftF32.h

Floating-point Fast Fourier Transform.

_DATAF

#define _DATAF(val)

Definition: Ifx_Cf32.h:51


iLLD_TC38A: Ifx_Fifo.c Source File

  • _Lib
  • DataHandling
Ifx_Fifo.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_Fifo.c
3 * \brief FIFO functions
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 //------------------------------------------------------------------------------
43 #include "Ifx_Fifo.h"
44 #include <stdlib.h>
45 #include "Ifx_CircularBuffer.h"
46 #include "_Utilities/Ifx_Assert.h"
47 #include "Cpu/Std/IfxCpu.h"
48 #include "Stm/Std/IfxStm.h"
49 //------------------------------------------------------------------------------
50 /*
51 * Note: the fifo function can be used to exchange data between the main task and interrupts:
52 * - a mutex using the interrupt enable / disable is implemented to insure
53 * data consitancy
54 * - it is supposed that all access to 8, 16, 32 bit data are atomic and are
55 * therefore not protected by a critical section
56 * - the following is possible
57 * reader(main) -- writer(main)
58 * reader(main) -- writer(interrupt)
59 * reader(interrupt) -- writer(main)
60 * reader(interrupt) -- writer(interrupt)
61 * - Only one reader and one writer are allowed by FIFO, no nested read write
62 * Implementation note: as an interrupt runs at a higher cpu level than the thread
63 * the interrupt is not disabled in the IntfifoXXX() functions
64 * This is valid is an OS is used.
65 *
66 */
67 //------------------------------------------------------------------------------
68 Ifx_Fifo *Ifx_Fifo_create(Ifx_SizeT size, Ifx_SizeT elementSize)
69 {
70 Ifx_Fifo *fifo = NULL_PTR;
71
72 size = Ifx_AlignOn32(size); /* data transfer is optimised for 32 bit access */
73
74 fifo = malloc(size + sizeof(Ifx_Fifo) + 8); /* +8 because of padding in case the pointer is not aligned on 64 */
75
76 if (IFX_VALIDATE(IFX_VERBOSE_LEVEL_ERROR, (fifo != NULL_PTR)))
77 {
78 fifo = Ifx_Fifo_init(fifo, size, elementSize);
79 }
80
81 return fifo;
82 }
83
84
85 void Ifx_Fifo_destroy(Ifx_Fifo *fifo)
86 {
87 free(fifo);
88 }
89
90
91 Ifx_Fifo *Ifx_Fifo_init(void *buffer, Ifx_SizeT size, Ifx_SizeT elementSize)
92 {
93 Ifx_Fifo *fifo = NULL_PTR;
94
95 size = Ifx_AlignOn32(size); /* data transfer is optimised for 32 bit access */
96 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, elementSize <= size);
97 /* Check size over maximum FIFO size */
98 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (size <= IFX_SIZET_MAX));
99
100 {
101 fifo = (Ifx_Fifo *)buffer;
102 fifo->eventReader = FALSE;
103 fifo->eventWriter = TRUE;
104 fifo->buffer = (uint8 *)Ifx_AlignOn64(((uint32)fifo) + sizeof(Ifx_Fifo));
105 fifo->shared.count = 0;
106 fifo->shared.maxcount = 0;
107 fifo->shared.readerWaitx = fifo->shared.writerWaitx = 0;
108 fifo->startIndex = fifo->endIndex = 0;
109 fifo->size = size;
110 fifo->elementSize = elementSize;
111 }
112
113 return fifo;
114 }
115
116
117 /**
118 * param: count in bytes
119 */
120 static Ifx_SizeT Ifx_Fifo_beginRead(Ifx_Fifo *fifo, Ifx_SizeT count)
121 {
122 boolean interruptState;
123 Ifx_SizeT blockSize;
124
125 interruptState = IfxCpu_disableInterrupts();
126 blockSize = __min(count, Ifx_Fifo_readCount(fifo));
127 blockSize -= blockSize % fifo->elementSize;
128 fifo->eventReader = FALSE;
129 fifo->shared.readerWaitx = __min(count - blockSize, fifo->size);
130 IfxCpu_restoreInterrupts(interruptState);
131
132 return blockSize;
133 }
134
135
136 boolean Ifx_Fifo_canReadCount(Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_TickTime timeout)
137 {
138 boolean result;
139
140 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, fifo != NULL_PTR);
141
142 if ((count < fifo->elementSize) || (count > fifo->size))
143 { /* Only complete elements can be read from the buffer */
144 result = FALSE;
145 }
146 else
147 {
148 boolean interruptState;
149 sint32 waitCount;
150 interruptState = IfxCpu_disableInterrupts();
151 waitCount = count - Ifx_Fifo_readCount(fifo);
152
153 if (waitCount <= 0)
154 {
155 fifo->shared.readerWaitx = 0;
156 fifo->eventReader = TRUE;
157 IfxCpu_restoreInterrupts(interruptState);
158 result = TRUE;
159 }
160 else
161 {
162 Ifx_TickTime DeadLine = IfxStm_getDeadLine(timeout);
163 fifo->eventReader = FALSE;
164 fifo->shared.readerWaitx = waitCount;
165 IfxCpu_restoreInterrupts(interruptState);
166
167 while ((fifo->eventReader == FALSE) && (IfxStm_isDeadLine(DeadLine) == FALSE))
168 {}
169 /* After the timeout, the reader is not waiting for any data */
170 fifo->shared.readerWaitx = 0;
171 result = fifo->eventReader == TRUE;
172 }
173 }
174
175 return result;
176 }
177
178
179 /**
180 * param: count in bytes
181 */
182 static Ifx_SizeT Ifx_Fifo_readEnd(Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_SizeT blockSize)
183 {
184 boolean interruptState;
185
186 /* Set the shared values */
187 interruptState = IfxCpu_disableInterrupts();
188
189 fifo->shared.count -= blockSize;
190
191 if (fifo->shared.writerWaitx != 0)
192 {
193 fifo->shared.writerWaitx -= blockSize;
194
195 if (fifo->shared.writerWaitx <= 0)
196 {
197 fifo->shared.writerWaitx = 0;
198 fifo->eventWriter = TRUE; /* Signal the writer */
199 }
200 }
201
202 IfxCpu_restoreInterrupts(interruptState);
203
204 return count - blockSize;
205 }
206
207
208 Ifx_SizeT Ifx_Fifo_read(Ifx_Fifo *fifo, void *data, Ifx_SizeT count, Ifx_TickTime timeout)
209 {
210 Ifx_TickTime DeadLine;
211 Ifx_SizeT blockSize;
212 Ifx_CircularBuffer buffer;
213 boolean Stop = FALSE;
214
215 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, fifo != NULL_PTR);
216 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, data != NULL_PTR);
217
218 if (count != 0)
219 {
220 buffer.base = fifo->buffer;
221 buffer.length = (uint16)fifo->size; /* size always fit into 16 bit */
222 buffer.index = (uint16)fifo->startIndex; /* startIndex always fit into size */
223 DeadLine = IfxStm_getDeadLine(timeout);
224
225 do
226 {
227 blockSize = Ifx_Fifo_beginRead(fifo, count);
228
229 if (blockSize != 0)
230 {
231 /* read element from the buffer */
232 data = Ifx_CircularBuffer_read8(&buffer, data, blockSize);
233 count = Ifx_Fifo_readEnd(fifo, count, blockSize);
234 }
235
236 if ((Stop != FALSE) || (IfxStm_isDeadLine(DeadLine) != FALSE))
237 {
238 /*When exiting, the reader is not waiting for any data */
239 fifo->shared.readerWaitx = 0;
240 break;
241 }
242
243 if (count != 0)
244 {
245 while ((fifo->eventReader == FALSE) && (IfxStm_isDeadLine(DeadLine) == FALSE))
246 {}
247
248 Stop = (fifo->eventReader == FALSE); /* If the function timeout, the maximum number of characters are read before returning */
249 }
250 } while (count != 0);
251
252 fifo->startIndex = buffer.index;
253 }
254
255 return count;
256 }
257
258
259 void Ifx_Fifo_clear(Ifx_Fifo *fifo)
260 {
261 boolean interruptState;
262
263 interruptState = IfxCpu_disableInterrupts();
264
265 if (fifo->shared.writerWaitx != 0)
266 {
267 fifo->shared.writerWaitx = 0;
268 fifo->eventWriter = TRUE; /* Signal the writer */
269 }
270
271 fifo->eventReader = FALSE;
272 fifo->shared.readerWaitx = 0;
273 fifo->shared.count = 0;
274 fifo->shared.maxcount = 0;
275 fifo->startIndex = fifo->endIndex;
276 IfxCpu_restoreInterrupts(interruptState);
277 }
278
279
280 static Ifx_SizeT Ifx_Fifo_beginWrite(Ifx_Fifo *fifo, Ifx_SizeT count)
281 {
282 Ifx_SizeT blockSize;
283 boolean interruptState;
284
285 interruptState = IfxCpu_disableInterrupts();
286 blockSize = __min(count, fifo->size - Ifx_Fifo_readCount(fifo));
287 blockSize -= blockSize % fifo->elementSize;
288 fifo->eventWriter = FALSE;
289 fifo->shared.writerWaitx = __min(count - blockSize, fifo->size);
290 IfxCpu_restoreInterrupts(interruptState);
291
292 return blockSize;
293 }
294
295
296 boolean Ifx_Fifo_canWriteCount(Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_TickTime timeout)
297 {
298 boolean result;
299
300 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, fifo != NULL_PTR);
301
302
303 if ((count < fifo->elementSize) || (count > fifo->size))
304 { /* Only complete elements can be written to the buffer */
305 result = FALSE;
306 }
307
308 else
309 {
310 boolean interruptState;
311 interruptState = IfxCpu_disableInterrupts();
312
313 if ((fifo->size - Ifx_Fifo_readCount(fifo)) >= count)
314 {
315 fifo->shared.writerWaitx = 0;
316 fifo->eventWriter = TRUE;
317 IfxCpu_restoreInterrupts(interruptState);
318 result = TRUE;
319 }
320 else
321 {
322 Ifx_TickTime DeadLine = IfxStm_getDeadLine(timeout);
323 fifo->eventWriter = FALSE;
324 fifo->shared.writerWaitx = __max(0, count - (fifo->size - Ifx_Fifo_readCount(fifo)));
325 IfxCpu_restoreInterrupts(interruptState);
326
327 while ((fifo->eventWriter == FALSE) && (IfxStm_isDeadLine(DeadLine) == FALSE))
328 {}
329 /* After the timeout, the writer is not waiting for any space */
330 fifo->shared.writerWaitx = 0;
331 result = fifo->eventWriter == TRUE;
332 }
333 }
334
335 return result;
336 }
337
338 static Ifx_SizeT Ifx_Fifo_endWrite(Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_SizeT blockSize)
339 {
340 boolean interruptState;
341
342 /* Set the shared values */
343 interruptState = IfxCpu_disableInterrupts();
344
345 fifo->shared.count += blockSize;
346 fifo->shared.maxcount = __max(fifo->shared.maxcount, fifo->shared.count); /* Update maximum value */
347
348 if (fifo->shared.readerWaitx != 0)
349 {
350 fifo->shared.readerWaitx -= blockSize;
351
352 if (fifo->shared.readerWaitx <= 0)
353 {
354 fifo->shared.readerWaitx = 0;
355 fifo->eventReader = TRUE; /* Signal the reader - a re-scheduling may occur at this point! */
356 }
357 }
358
359 IfxCpu_restoreInterrupts(interruptState);
360
361 return count - blockSize;
362 }
363
364
365
366 Ifx_SizeT Ifx_Fifo_write(Ifx_Fifo *fifo, const void *data, Ifx_SizeT count, Ifx_TickTime timeout)
367 {
368 Ifx_TickTime DeadLine;
369 Ifx_SizeT blockSize;
370 Ifx_CircularBuffer buffer;
371 boolean Stop = FALSE;
372
373 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, fifo != NULL_PTR);
374 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, data != NULL_PTR);
375
376 if (count != 0)
377 {
378 buffer.base = fifo->buffer;
379 buffer.length = (uint16)fifo->size; /* size always fit into 16 bit */
380 buffer.index = (uint16)fifo->endIndex; /* startIndex always fit into size */
381 DeadLine = IfxStm_getDeadLine(timeout);
382
383 do
384 {
385 blockSize = Ifx_Fifo_beginWrite(fifo, count);
386
387 if (blockSize != 0)
388 {
389 /* write element to the buffer */
390 data = Ifx_CircularBuffer_write8(&buffer, data, blockSize);
391 count = Ifx_Fifo_endWrite(fifo, count, blockSize);
392 }
393
394 if ((Stop != FALSE) || (IfxStm_isDeadLine(DeadLine) != FALSE))
395 {
396 /*When exiting, the writer is not waiting for any space */
397 fifo->shared.writerWaitx = 0;
398 break;
399 }
400
401 if (count != 0)
402 {
403 while ((fifo->eventWriter == FALSE) && (IfxStm_isDeadLine(DeadLine) == FALSE))
404 {}
405
406 Stop = fifo->eventWriter == FALSE; /* If the function timeout, the maximum number of characters are written before returning */
407 }
408 } while (count != 0);
409
410 fifo->endIndex = buffer.index;
411 }
412
413 return count;
414 }
415
416 //------------------------------------------------------------------------------
Ifx_CircularBuffer_write8
const void * Ifx_CircularBuffer_write8(Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
Copy count bytes from the data array to the circular buffer.
Definition: Ifx_CircularBuffer.c:139
Ifx_TickTime
sint64 Ifx_TickTime
Time in ticks.
Definition: Ifx_Types.h:76
_Fifo::buffer
void * buffer
aligned on 64 bit boundary
Definition: Ifx_Fifo.h:72
_Fifo::startIndex
Ifx_SizeT startIndex
buffer valid data start index
Definition: Ifx_Fifo.h:74
Ifx_Fifo_write
Ifx_SizeT Ifx_Fifo_write(Ifx_Fifo *fifo, const void *data, Ifx_SizeT count, Ifx_TickTime timeout)
Write data into a fifo.
Definition: Ifx_Fifo.c:366
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxStm.h
STM basic functionality.
Ifx_Fifo_canReadCount
boolean Ifx_Fifo_canReadCount(Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if the required number of bytes are available in the buffer.
Definition: Ifx_Fifo.c:136
Ifx_CircularBuffer::length
uint16 length
buffer length
Definition: Ifx_Types.h:97
_Fifo::eventReader
volatile boolean eventReader
event set by the writer to signal the reader that the required data are available in the buffer ...
Definition: Ifx_Fifo.h:78
IFX_SIZET_MAX
#define IFX_SIZET_MAX
Definition: Ifx_Types.h:88
IfxStm_getDeadLine
IFX_INLINE sint64 IfxStm_getDeadLine(sint64 timeout)
Get the deadline value.
Definition: IfxStm.h:746
uint32
unsigned long uint32
Definition: Platform_Types.h:116
Ifx_AlignOn64
#define Ifx_AlignOn64(Size)
Definition: IfxCpu_Intrinsics.h:74
Ifx_Assert.h
Assert functions.
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
Ifx_Fifo_Shared::writerWaitx
sint32 writerWaitx
Number of byte that the writer expect to be free. When the reader modify it to 0 the reader get signa...
Definition: Ifx_Fifo.h:61
Ifx_Fifo_init
Ifx_Fifo * Ifx_Fifo_init(void *buffer, Ifx_SizeT size, Ifx_SizeT elementSize)
Initialize the FIFO buffer object.
Definition: Ifx_Fifo.c:91
Ifx_Fifo_destroy
void Ifx_Fifo_destroy(Ifx_Fifo *fifo)
Destroy the FIFO object.
Definition: Ifx_Fifo.c:85
Ifx_CircularBuffer::base
void * base
buffer base address
Definition: Ifx_Types.h:95
IfxCpu_restoreInterrupts
IFX_INLINE void IfxCpu_restoreInterrupts(boolean enabled)
API to restore global interrupt with that of the passed parameter.
Definition: IfxCpu.h:1026
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
Ifx_Fifo_Shared::maxcount
Ifx_SizeT maxcount
Highest value seen in the count.
Definition: Ifx_Fifo.h:62
_Fifo::endIndex
Ifx_SizeT endIndex
buffer valid data end index
Definition: Ifx_Fifo.h:75
FALSE
#define FALSE
Definition: Platform_Types.h:93
Ifx_Fifo_read
Ifx_SizeT Ifx_Fifo_read(Ifx_Fifo *fifo, void *data, Ifx_SizeT count, Ifx_TickTime timeout)
Read data from a fifo and remove them from the buffer.
Definition: Ifx_Fifo.c:208
_Fifo::shared
Ifx_Fifo_Shared shared
data shared between reader / writer
Definition: Ifx_Fifo.h:73
Ifx_Fifo_canWriteCount
boolean Ifx_Fifo_canWriteCount(Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if there is enough free space to write the data in the buffer.
Definition: Ifx_Fifo.c:296
Ifx_Fifo.h
FIFO buffer functions.
__max
sint32 __max(sint32, sint32) __attribute__((intrinsic_pseudo(3
IfxCpu_disableInterrupts
IFX_INLINE boolean IfxCpu_disableInterrupts(void)
API to disable global interrupt and return the previous status.
Definition: IfxCpu.h:749
_Fifo::eventWriter
volatile boolean eventWriter
event set by the reader to signal the writer that the required free space are available in the buffer...
Definition: Ifx_Fifo.h:79
IfxStm_isDeadLine
IFX_INLINE boolean IfxStm_isDeadLine(sint64 deadLine)
Checked if deadline has occured.
Definition: IfxStm.h:763
Ifx_AlignOn32
#define Ifx_AlignOn32(Size)
Definition: IfxCpu_Intrinsics.h:75
Ifx_CircularBuffer
Circular buffer definition.
Definition: Ifx_Types.h:93
_Fifo::elementSize
Ifx_SizeT elementSize
minimum number of bytes (block) added / removed to / from the buffer
Definition: Ifx_Fifo.h:77
_Fifo
Definition: Ifx_Fifo.h:70
Ifx_CircularBuffer_read8
void * Ifx_CircularBuffer_read8(Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
Copy count bytes from the circular buffer to the data array.
Definition: Ifx_CircularBuffer.c:95
Ifx_Fifo_create
Ifx_Fifo * Ifx_Fifo_create(Ifx_SizeT size, Ifx_SizeT elementSize)
Create a Fifo object.
Definition: Ifx_Fifo.c:68
Ifx_Fifo_Shared::count
Ifx_SizeT count
number of bytes contained in the buffer
Definition: Ifx_Fifo.h:59
Ifx_Fifo_readCount
IFX_INLINE Ifx_SizeT Ifx_Fifo_readCount(Ifx_Fifo *fifo)
Returns the size of the data in the buffer in bytes.
Definition: Ifx_Fifo.h:203
Ifx_Fifo_clear
void Ifx_Fifo_clear(Ifx_Fifo *fifo)
Clear fifo contents.
Definition: Ifx_Fifo.c:259
IFX_VALIDATE
#define IFX_VALIDATE(level, expr)
Definition: Ifx_Assert.h:73
_Fifo::size
Ifx_SizeT size
multiple of 8 bit, max 0xFFF8
Definition: Ifx_Fifo.h:76
IfxCpu.h
CPU basic functionality.
Ifx_CircularBuffer.h
Circular buffer functions.
uint16
unsigned short uint16
Definition: Platform_Types.h:112
__min
sint32 __min(sint32, sint32) __attribute__((intrinsic_pseudo(3
sint32
long sint32
Definition: Platform_Types.h:134
Ifx_Fifo_Shared::readerWaitx
sint32 readerWaitx
Number of bytes that the reader is waiting for. When the writer modify it to 0 the reader get signale...
Definition: Ifx_Fifo.h:60
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
TRUE
#define TRUE
Definition: Platform_Types.h:90
Ifx_CircularBuffer::index
uint16 index
buffer current index
Definition: Ifx_Types.h:96
uint8
unsigned char uint8
Definition: Platform_Types.h:108


iLLD_TC38A: Ifx_Fifo.h Source File

  • _Lib
  • DataHandling
Ifx_Fifo.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_Fifo.h
3 * \brief FIFO buffer functions
4 * \ingroup IfxLld_lib_datahandling_fifo
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_lib_datahandling_fifo FIFO
42 * This module implements the FIFO buffer functionality.
43 * \ingroup IfxLld_lib_datahandling
44 *
45 */
46
47 #ifndef IFX_FIFO_H
48 #define IFX_FIFO_H 1
49 //------------------------------------------------------------------------------
50 #include "Ifx_Cfg.h"
51 #include "Cpu/Std/IfxCpu_Intrinsics.h"
52 //------------------------------------------------------------------------------
53
54 /** Shared data of the FIFO
55 *
56 */
57 typedef struct
58 {
59 Ifx_SizeT count; /**< \brief number of bytes contained in the buffer */
60 sint32 readerWaitx; /**< \brief Number of bytes that the reader is waiting for. When the writer modify it to 0 the reader get signaled */
61 sint32 writerWaitx; /**< \brief Number of byte that the writer expect to be free. When the reader modify it to 0 the reader get signaled */
62 Ifx_SizeT maxcount; /**< \brief Highest value seen in the count */
63 } Ifx_Fifo_Shared;
64
65 /** \addtogroup IfxLld_lib_datahandling_fifo
66 * \{ */
67 /** Fifo object
68 *
69 */
70 typedef struct _Fifo
71 {
72 void *buffer; /**< \brief aligned on 64 bit boundary */
73 Ifx_Fifo_Shared shared; /**< \brief data shared between reader / writer */
74 Ifx_SizeT startIndex; /**< \brief buffer valid data start index */
75 Ifx_SizeT endIndex; /**< \brief buffer valid data end index */
76 Ifx_SizeT size; /**< \brief multiple of 8 bit, max 0xFFF8 */
77 Ifx_SizeT elementSize; /**< \brief minimum number of bytes (block) added / removed to / from the buffer */
78 volatile boolean eventReader; /**< \brief event set by the writer to signal the reader that the required data are available in the buffer */
79 volatile boolean eventWriter; /**< \brief event set by the reader to signal the writer that the required free space are available in the buffer */
80 } Ifx_Fifo;
81
82 /** \brief Indicates if the required number of bytes are available in the buffer
83 *
84 * Should not be called from an interrupt as this function may wait forever
85 * \param fifo Pointer on the Fifo object
86 * \param count in bytes
87 * \param timeout in system timer ticks
88 *
89 * \return TRUE if at least count bytes can be read from the buffer, else
90 * the Event is armed to be set when the buffer count is bigger or equal to the requested count
91 */
92 IFX_EXTERN boolean Ifx_Fifo_canReadCount(Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_TickTime timeout);
93 /** \brief Indicates if there is enough free space to write the data in the buffer
94 *
95 * Should not be called from an interrupt as this function may wait forever
96 *
97 * \param fifo Pointer on the Fifo object
98 * \param count in bytes
99 * \param timeout in system timer ticks
100 *
101 * \return TRUE if at least count bytes can be written to the buffer,
102 * if not the Event is armed to be set when the buffer free count is bigger or equal to the requested count
103 */
104 IFX_EXTERN boolean Ifx_Fifo_canWriteCount(Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_TickTime timeout);
105
106 /** \brief Clear fifo contents.
107 *
108 * \param fifo Pointer on the Fifo object
109 *
110 * \return void
111 */
112 IFX_EXTERN void Ifx_Fifo_clear(Ifx_Fifo *fifo);
113
114 /** \brief Create a Fifo object
115 *
116 * The memory required for the object is allocated dynamically.
117 *
118 * \param size Specifies the FIFO buffer size in bytes
119 * \param elementSize Specifies data element size in bytes. size must be bigger or equal to elemenntSize.
120 *
121 * \return returns a pointer to the FIFO object
122 *
123 * \see Ifx_Fifo_destroy()
124 */
125 IFX_EXTERN Ifx_Fifo *Ifx_Fifo_create(Ifx_SizeT size, Ifx_SizeT elementSize);
126
127 /** \brief Destroy the FIFO object
128 *
129 * This function must be called to destroy the fifo object when created with \ref Ifx_Fifo_create()
130 *
131 * \param fifo Pointer on the Fifo object
132 * \return void
133 *
134 * \see Ifx_Fifo_create()
135 */
136 IFX_EXTERN void Ifx_Fifo_destroy(Ifx_Fifo *fifo);
137
138 /** \brief Initialize the FIFO buffer object
139 *
140 * \param buffer Specifies the FIFO object address.
141 * \param size Specifies the FIFO buffer size in bytes
142 * \param elementSize Specifies data element size in bytes. size must be bigger or equal to elemenntSize.
143 *
144 * \return Returns a pointer on the FIFO object
145 *
146 * \note: The buffer parameter must point on a free memory location where the
147 * buffer object will be initialised. The size of this area must be at least
148 * equals to "size + sizeof(Ifx_Fifo) + 8". Not taking this in account may result
149 * in unpredictable behavior.
150 */
151 IFX_EXTERN Ifx_Fifo *Ifx_Fifo_init(void *buffer, Ifx_SizeT size, Ifx_SizeT elementSize);
152
153 /** \brief Read data from a fifo and remove them from the buffer.
154 *
155 * Only complete elements are returned, if count is not a multiple of
156 * elementSize then the incomplete element is not read/removed from the buffer.
157 *
158 * \param fifo Pointer on the Fifo object
159 * \param data Pointer to the data buffer for storing values
160 * \param count in bytes
161 * \param timeout in system timer ticks
162 *
163 * \return return the number of byte that could not be read
164 */
165 IFX_EXTERN Ifx_SizeT Ifx_Fifo_read(Ifx_Fifo *fifo, void *data, Ifx_SizeT count, Ifx_TickTime timeout);
166
167 /** \brief Write data into a fifo.
168 *
169 * Only complete elements are written to the buffer, if count is not a multiple of
170 * elementSize then the incomplete element are not written to the buffer.
171 *
172 * \param fifo Pointer on the Fifo object
173 * \param data Pointer to the data buffer to write into the Fifo
174 * \param count in bytes
175 * \param timeout in system timer ticks
176 */
177 IFX_EXTERN Ifx_SizeT Ifx_Fifo_write(Ifx_Fifo *fifo, const void *data, Ifx_SizeT count, Ifx_TickTime timeout);
178
179 /** \brief Empty the fifo
180 *
181 * \param fifo Pointer on the Fifo object
182 * \param timeout in system timer ticks
183 *
184 * \return TRUE if the buffer is emptied.
185 */
186 IFX_INLINE boolean Ifx_Fifo_flush(Ifx_Fifo *fifo, Ifx_TickTime timeout)
187 {
188 return Ifx_Fifo_canWriteCount(fifo, fifo->size, timeout);
189 }
190
191
192 /**
193 * \brief Returns the size of the data in the buffer in bytes
194 *
195 * \param fifo Pointer on the Fifo object
196 *
197 * Note as the Ifx_Fifo_write / Ifx_Fifo_read function does only write blocks which are
198 * a multiple of fifo->elementSize, the Ifx_Fifo_readCount / Ifx_Fifo_writeCount return
199 * a multiple of fifo->elementSize
200 *
201 * \return Returns the size of the data in the buffer in bytes
202 */
203 IFX_INLINE Ifx_SizeT Ifx_Fifo_readCount(Ifx_Fifo *fifo)
204 {
205 return fifo->shared.count;
206 }
207
208
209 /** \brief Returns the free size in bytes
210 *
211 * \param fifo Pointer on the Fifo object
212 *
213 * Note as the Ifx_Fifo_write / Ifx_Fifo_read function does only write blocks which are
214 * a multiple of fifo->elementSize, the Ifx_Fifo_readCount / Ifx_Fifo_writeCount return
215 * a multiple of fifo->elementSize
216 *
217 * \return Returns the free size in bytes
218 */
219 IFX_INLINE Ifx_SizeT Ifx_Fifo_writeCount(Ifx_Fifo *fifo)
220 {
221 return (Ifx_SizeT)(fifo->size - Ifx_Fifo_readCount(fifo));
222 }
223
224
225 /** \brief Indicates if the fifo is empty
226 *
227 * \param fifo Pointer on the Ifx_Fifo object
228 *
229 * \retval TRUE is the buffer is empty
230 * \retval FALSE is the buffer is not empty
231 */
232 IFX_INLINE boolean Ifx_Fifo_isEmpty(Ifx_Fifo *fifo)
233 {
234 return (Ifx_Fifo_readCount(fifo) != FALSE) ? FALSE : TRUE;
235 }
236
237
238 /**\}*/
239 //------------------------------------------------------------------------------
240 #endif
Ifx_TickTime
sint64 Ifx_TickTime
Time in ticks.
Definition: Ifx_Types.h:76
_Fifo::buffer
void * buffer
aligned on 64 bit boundary
Definition: Ifx_Fifo.h:72
_Fifo::startIndex
Ifx_SizeT startIndex
buffer valid data start index
Definition: Ifx_Fifo.h:74
Ifx_Fifo_write
IFX_EXTERN Ifx_SizeT Ifx_Fifo_write(Ifx_Fifo *fifo, const void *data, Ifx_SizeT count, Ifx_TickTime timeout)
Write data into a fifo.
Definition: Ifx_Fifo.c:366
Ifx_Fifo
struct _Fifo Ifx_Fifo
Ifx_Fifo_canReadCount
IFX_EXTERN boolean Ifx_Fifo_canReadCount(Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if the required number of bytes are available in the buffer.
Definition: Ifx_Fifo.c:136
_Fifo::eventReader
volatile boolean eventReader
event set by the writer to signal the reader that the required data are available in the buffer ...
Definition: Ifx_Fifo.h:78
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
Ifx_Fifo_Shared::writerWaitx
sint32 writerWaitx
Number of byte that the writer expect to be free. When the reader modify it to 0 the reader get signa...
Definition: Ifx_Fifo.h:61
Ifx_Fifo_init
IFX_EXTERN Ifx_Fifo * Ifx_Fifo_init(void *buffer, Ifx_SizeT size, Ifx_SizeT elementSize)
Initialize the FIFO buffer object.
Definition: Ifx_Fifo.c:91
Ifx_Fifo_destroy
IFX_EXTERN void Ifx_Fifo_destroy(Ifx_Fifo *fifo)
Destroy the FIFO object.
Definition: Ifx_Fifo.c:85
IfxCpu_Intrinsics.h
Ifx_Fifo_Shared::maxcount
Ifx_SizeT maxcount
Highest value seen in the count.
Definition: Ifx_Fifo.h:62
_Fifo::endIndex
Ifx_SizeT endIndex
buffer valid data end index
Definition: Ifx_Fifo.h:75
FALSE
#define FALSE
Definition: Platform_Types.h:93
Ifx_Fifo_read
IFX_EXTERN Ifx_SizeT Ifx_Fifo_read(Ifx_Fifo *fifo, void *data, Ifx_SizeT count, Ifx_TickTime timeout)
Read data from a fifo and remove them from the buffer.
Definition: Ifx_Fifo.c:208
_Fifo::shared
Ifx_Fifo_Shared shared
data shared between reader / writer
Definition: Ifx_Fifo.h:73
Ifx_Fifo_canWriteCount
IFX_EXTERN boolean Ifx_Fifo_canWriteCount(Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if there is enough free space to write the data in the buffer.
Definition: Ifx_Fifo.c:296
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
_Fifo::eventWriter
volatile boolean eventWriter
event set by the reader to signal the writer that the required free space are available in the buffer...
Definition: Ifx_Fifo.h:79
_Fifo::elementSize
Ifx_SizeT elementSize
minimum number of bytes (block) added / removed to / from the buffer
Definition: Ifx_Fifo.h:77
Ifx_Fifo_Shared
Definition: Ifx_Fifo.h:57
_Fifo
Definition: Ifx_Fifo.h:70
Ifx_Fifo_flush
IFX_INLINE boolean Ifx_Fifo_flush(Ifx_Fifo *fifo, Ifx_TickTime timeout)
Empty the fifo.
Definition: Ifx_Fifo.h:186
Ifx_Fifo_create
IFX_EXTERN Ifx_Fifo * Ifx_Fifo_create(Ifx_SizeT size, Ifx_SizeT elementSize)
Create a Fifo object.
Definition: Ifx_Fifo.c:68
Ifx_Fifo_Shared::count
Ifx_SizeT count
number of bytes contained in the buffer
Definition: Ifx_Fifo.h:59
Ifx_Fifo_readCount
IFX_INLINE Ifx_SizeT Ifx_Fifo_readCount(Ifx_Fifo *fifo)
Returns the size of the data in the buffer in bytes.
Definition: Ifx_Fifo.h:203
Ifx_Fifo_clear
IFX_EXTERN void Ifx_Fifo_clear(Ifx_Fifo *fifo)
Clear fifo contents.
Definition: Ifx_Fifo.c:259
_Fifo::size
Ifx_SizeT size
multiple of 8 bit, max 0xFFF8
Definition: Ifx_Fifo.h:76
Ifx_Fifo_writeCount
IFX_INLINE Ifx_SizeT Ifx_Fifo_writeCount(Ifx_Fifo *fifo)
Returns the free size in bytes.
Definition: Ifx_Fifo.h:219
sint32
long sint32
Definition: Platform_Types.h:134
Ifx_Fifo_isEmpty
IFX_INLINE boolean Ifx_Fifo_isEmpty(Ifx_Fifo *fifo)
Indicates if the fifo is empty.
Definition: Ifx_Fifo.h:232
Ifx_Fifo_Shared::readerWaitx
sint32 readerWaitx
Number of bytes that the reader is waiting for. When the writer modify it to 0 the reader get signale...
Definition: Ifx_Fifo.h:60
TRUE
#define TRUE
Definition: Platform_Types.h:90


iLLD_TC38A: Ifx_GlobalResources.c Source File

  • Service
  • CpuGeneric
  • SysSe
  • General
Ifx_GlobalResources.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_GlobalResources.h
3 * \brief Handling of global resources
4 *
5 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
6 *
7 * $Date: 2014-02-27 20:08:36 GMT$
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 #include "Ifx_GlobalResources.h"
43 /** \brief Global resource object */
44 typedef struct
45 {
46 const Ifx_GlobalResources_Item *table; /**< \brief Pointer to the global resource table */
47 sint32 size; /**< \brief Size of the global resource table */
48 } Ifx_GlobalResources;
49
50 #if IFX_CFG_GLOBAL_RESOURCES_ENABLED
51
52 Ifx_GlobalResources ifx_GlobalResource;
53 #endif
54
55 void *Ifx_GlobalResources_get(sint32 id)
56 {
57 void *result;
58
59 #if IFX_CFG_GLOBAL_RESOURCES_ENABLED
60
61 if (id < ifx_GlobalResource.size)
62 {
63 result = ifx_GlobalResource.table[id].resource;
64 }
65 else
66 {
67 result = NULL_PTR;
68 }
69
70 #else
71 result = NULL_PTR;
72
73 #endif
74
75 return result;
76 }
77
78
79 sint32 Ifx_GlobalResources_getIndex(void *resource)
80 {
81 sint32 id = -1;
82
83 #if IFX_CFG_GLOBAL_RESOURCES_ENABLED
84 int i;
85
86 for (i = 0; i < ifx_GlobalResource.size; i++)
87 {
88 if (resource == ifx_GlobalResource.table[i].resource)
89 {
90 id = i;
91 }
92 else
93 {}
94 }
95
96 #else
97 #endif
98
99 return id;
100 }
101
102
103 const Ifx_GlobalResources_Item *Ifx_GlobalResources_getItem(sint32 id)
104 {
105 const Ifx_GlobalResources_Item *result;
106
107 #if IFX_CFG_GLOBAL_RESOURCES_ENABLED
108
109 if (id < ifx_GlobalResource.size)
110 {
111 result = &ifx_GlobalResource.table[id];
112 }
113 else
114 {
115 result = NULL_PTR;
116 }
117
118 #else
119 result = NULL_PTR;
120
121 #endif
122
123 return result;
124 }
125
126
127 pchar Ifx_GlobalResources_getName(sint32 id)
128 {
129 pchar name;
130
131 #if IFX_CFG_GLOBAL_RESOURCES_ENABLED
132
133 if (id < ifx_GlobalResource.size)
134 {
135 name = ifx_GlobalResource.table[id].name;
136 }
137 else
138 {
139 name = "unknown";
140 }
141
142 #else
143 name = "unknown";
144
145 #endif
146
147 return name;
148 }
149
150
151 boolean Ifx_GlobalResources_init(const Ifx_GlobalResources_Item *table, uint32 size)
152 {
153 boolean result;
154
155 #if IFX_CFG_GLOBAL_RESOURCES_ENABLED
156 ifx_GlobalResource.table = table;
157 ifx_GlobalResource.size = size;
158 result = TRUE;
159 #else
160 result = FALSE;
161
162 #endif
163
164 return result;
165 }
Ifx_GlobalResources_getName
pchar Ifx_GlobalResources_getName(sint32 id)
Definition: Ifx_GlobalResources.c:127
Ifx_GlobalResources_Item::name
pchar name
Definition: Ifx_GlobalResources.h:58
uint32
unsigned long uint32
Definition: Platform_Types.h:116
Ifx_GlobalResources.h
Handling of global resources.
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
FALSE
#define FALSE
Definition: Platform_Types.h:93
Ifx_GlobalResources::table
const Ifx_GlobalResources_Item * table
Pointer to the global resource table.
Definition: Ifx_GlobalResources.c:46
Ifx_GlobalResources_get
void * Ifx_GlobalResources_get(sint32 id)
Definition: Ifx_GlobalResources.c:55
Ifx_GlobalResources_init
boolean Ifx_GlobalResources_init(const Ifx_GlobalResources_Item *table, uint32 size)
Definition: Ifx_GlobalResources.c:151
Ifx_GlobalResources_getItem
const Ifx_GlobalResources_Item * Ifx_GlobalResources_getItem(sint32 id)
Definition: Ifx_GlobalResources.c:103
Ifx_GlobalResources::size
sint32 size
Size of the global resource table.
Definition: Ifx_GlobalResources.c:47
sint32
long sint32
Definition: Platform_Types.h:134
Ifx_GlobalResources_Item::resource
void * resource
Definition: Ifx_GlobalResources.h:57
Ifx_GlobalResources_Item
Definition: Ifx_GlobalResources.h:55
Ifx_GlobalResources
Global resource object.
Definition: Ifx_GlobalResources.c:44
TRUE
#define TRUE
Definition: Platform_Types.h:90
pchar
const char * pchar
const char pointer
Definition: Ifx_Types.h:53
Ifx_GlobalResources_getIndex
sint32 Ifx_GlobalResources_getIndex(void *resource)
Returns the global resource index.
Definition: Ifx_GlobalResources.c:79


iLLD_TC38A: Ifx_GlobalResources.h Source File

  • Service
  • CpuGeneric
  • SysSe
  • General
Ifx_GlobalResources.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_GlobalResources.h
3 * \brief Handling of global resources
4 *
5 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
6 *
7 * $Date: 2014-02-28 14:15:39 GMT$
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 * \defgroup library_srvsw_sysse_general_globalresources Global resources
41 * This module implements the global resources handling
42 * \ingroup library_srvsw_sysse_general
43 */
44
45 #ifndef IFX_GLOBALRESOURCES_H
46 #define IFX_GLOBALRESOURCES_H 1
47
48 #include "Ifx_Cfg.h"
49 #include "Cpu/Std/Ifx_Types.h"
50
51 #ifndef IFX_CFG_GLOBAL_RESOURCES_ENABLED
52 #define IFX_CFG_GLOBAL_RESOURCES_ENABLED (0)
53 #endif
54
55 typedef struct
56 {
57 void *resource;
58 pchar name;
59 } Ifx_GlobalResources_Item;
60
61 /** \addtogroup library_srvsw_sysse_general_globalresources
62 * \{ */
63 /** Return a pointer to the global resource
64 *
65 * \param id index of the Ifx_GlobalResources_Item in the table, the index starts with 0
66 *
67 * \return return Ifx_GlobalResources_Item.resource
68 */
69 IFX_EXTERN void *Ifx_GlobalResources_get(sint32 id);
70
71 /** \brief Returns the global resource index.
72 *
73 * \return Returns the global resource index, -1 if not found
74 */
75 IFX_EXTERN sint32 Ifx_GlobalResources_getIndex(void *resource);
76
77 /** Return a pointer to the global resource item
78 *
79 * \param id index of the Ifx_GlobalResources_Item in the table, the index starts with 0
80 *
81 * \return return the Ifx_GlobalResources_Item
82 */
83 IFX_EXTERN const Ifx_GlobalResources_Item *Ifx_GlobalResources_getItem(sint32 id);
84
85 /** Return a the resource name as an NULL terminated string
86 *
87 * \param id index of the Ifx_GlobalResources_Item in the table, the index starts with 0
88 *
89 * \return return Ifx_GlobalResources_Item.name
90 */
91 IFX_EXTERN pchar Ifx_GlobalResources_getName(sint32 id);
92
93 /** Initialize the global resource handler
94 *
95 * \param table pointer to an array of Ifx_GlobalResources_Item
96 * \param size number of item in the table corresponds to sizeof(table)
97 *
98 * return returns TRUE in case of success else FALSE
99 *
100 */
101 IFX_EXTERN boolean Ifx_GlobalResources_init(const Ifx_GlobalResources_Item *table, uint32 size);
102 /** \} */
103
104 #endif /* IFX_GLOBALRESOURCES_H */
Ifx_GlobalResources_getName
IFX_EXTERN pchar Ifx_GlobalResources_getName(sint32 id)
Definition: Ifx_GlobalResources.c:127
Ifx_GlobalResources_Item::name
pchar name
Definition: Ifx_GlobalResources.h:58
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
Ifx_GlobalResources_get
IFX_EXTERN void * Ifx_GlobalResources_get(sint32 id)
Definition: Ifx_GlobalResources.c:55
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
Ifx_GlobalResources_init
IFX_EXTERN boolean Ifx_GlobalResources_init(const Ifx_GlobalResources_Item *table, uint32 size)
Definition: Ifx_GlobalResources.c:151
Ifx_GlobalResources_getItem
IFX_EXTERN const Ifx_GlobalResources_Item * Ifx_GlobalResources_getItem(sint32 id)
Definition: Ifx_GlobalResources.c:103
sint32
long sint32
Definition: Platform_Types.h:134
Ifx_GlobalResources_Item::resource
void * resource
Definition: Ifx_GlobalResources.h:57
Ifx_GlobalResources_Item
Definition: Ifx_GlobalResources.h:55
pchar
const char * pchar
const char pointer
Definition: Ifx_Types.h:53
Ifx_GlobalResources_getIndex
IFX_EXTERN sint32 Ifx_GlobalResources_getIndex(void *resource)
Returns the global resource index.
Definition: Ifx_GlobalResources.c:79


iLLD_TC38A: Ifx_IntegralF32.c Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_IntegralF32.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_IntegralF32.c
3 * \brief Discrete integral approximation
4 *
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42 #include "Ifx_IntegralF32.h"
43
44 void Ifx_IntegralF32_reset(Ifx_IntegralF32 *ci)
45 {
46 ci->uk = 0;
47 ci->ik = 0;
48 }
49
50
51 void Ifx_IntegralF32_init(Ifx_IntegralF32 *ci, float32 gain, float32 Ts)
52 {
53 ci->delta = gain * Ts / 2;
54 }
55
56
57 float32 Ifx_IntegralF32_step(Ifx_IntegralF32 *ci, float32 ik)
58 {
59 ci->uk = ci->uk + (ik + ci->ik) * ci->delta;
60 ci->ik = ik;
61
62 return ci->uk;
63 }
64
65
66 void Ifx_ClpxFloat32_Integral_reset(Ifx_ClpxFloat32_Integral *ci)
67 {
68 ci->uk.real = 0;
69 ci->uk.imag = 0;
70 ci->ik.real = 0;
71 ci->ik.imag = 0;
72 }
73
74
75 void Ifx_ClpxFloat32_Integral_init(Ifx_ClpxFloat32_Integral *ci, float32 gain, float32 Ts)
76 {
77 Ifx_ClpxFloat32_Integral_reset(ci);
78 ci->delta = gain * Ts / 2;
79 }
80
81
82 cfloat32 Ifx_ClpxFloat32_Integral_step(Ifx_ClpxFloat32_Integral *ci, cfloat32 ik)
83 {
84 ci->uk.real = ci->uk.real + (ik.real + ci->ik.real) * ci->delta;
85 ci->uk.imag = ci->uk.imag + (ik.imag + ci->ik.imag) * ci->delta;
86 ci->ik = ik;
87
88 return ci->uk;
89 }
Ifx_IntegralF32.h
Discrete integral approximation.
Ifx_ClpxFloat32_Integral_init
void Ifx_ClpxFloat32_Integral_init(Ifx_ClpxFloat32_Integral *ci, float32 gain, float32 Ts)
Initialize the integrator object.
Definition: Ifx_IntegralF32.c:75
Ifx_IntegralF32::delta
float32 delta
Definition: Ifx_IntegralF32.h:58
Ifx_ClpxFloat32_Integral_step
cfloat32 Ifx_ClpxFloat32_Integral_step(Ifx_ClpxFloat32_Integral *ci, cfloat32 ik)
Step function of the integrator object.
Definition: Ifx_IntegralF32.c:82
float32
float float32
Definition: Platform_Types.h:170
Ifx_ClpxFloat32_Integral::uk
cfloat32 uk
Definition: Ifx_IntegralF32.h:64
Ifx_ClpxFloat32_Integral_reset
void Ifx_ClpxFloat32_Integral_reset(Ifx_ClpxFloat32_Integral *ci)
Reset the integrator object.
Definition: Ifx_IntegralF32.c:66
cfloat32::imag
float32 imag
Imaginary part.
Definition: Ifx_Types.h:61
Ifx_IntegralF32::ik
float32 ik
Definition: Ifx_IntegralF32.h:57
cfloat32
Definition: Ifx_Types.h:58
cfloat32::real
float32 real
Real part.
Definition: Ifx_Types.h:60
Ifx_IntegralF32::uk
float32 uk
Definition: Ifx_IntegralF32.h:56
Ifx_ClpxFloat32_Integral
Integrator object for cfloat32 data type.
Definition: Ifx_IntegralF32.h:62
Ifx_ClpxFloat32_Integral::ik
cfloat32 ik
Definition: Ifx_IntegralF32.h:65
Ifx_IntegralF32_step
float32 Ifx_IntegralF32_step(Ifx_IntegralF32 *ci, float32 ik)
Step function of the integrator object.
Definition: Ifx_IntegralF32.c:57
Ifx_IntegralF32_init
void Ifx_IntegralF32_init(Ifx_IntegralF32 *ci, float32 gain, float32 Ts)
Initialize the integrator object.
Definition: Ifx_IntegralF32.c:51
Ifx_IntegralF32_reset
void Ifx_IntegralF32_reset(Ifx_IntegralF32 *ci)
Reset the integrator object.
Definition: Ifx_IntegralF32.c:44
Ifx_IntegralF32
Integrator object for float32 data type.
Definition: Ifx_IntegralF32.h:54


iLLD_TC38A: Ifx_IntegralF32.h Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_IntegralF32.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_IntegralF32.h
3 * \brief Discrete integral approximation
4 * \ingroup library_srvsw_sysse_math_f32_integral
5 *
6 *
7 *
8 * \version disabled
9 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
10 *
11 *
12 * IMPORTANT NOTICE
13 *
14 * Use of this file is subject to the terms of use agreed between (i) you or
15 * the company in which ordinary course of business you are acting and (ii)
16 * Infineon Technologies AG or its licensees. If and as long as no such terms
17 * of use are agreed, use of this file is subject to following:
18 *
19 * Boost Software License - Version 1.0 - August 17th, 2003
20 *
21 * Permission is hereby granted, free of charge, to any person or organization
22 * obtaining a copy of the software and accompanying documentation covered by
23 * this license (the "Software") to use, reproduce, display, distribute,
24 * execute, and transmit the Software, and to prepare derivative works of the
25 * Software, and to permit third-parties to whom the Software is furnished to
26 * do so, all subject to the following:
27 *
28 * The copyright notices in the Software and this entire statement, including
29 * the above license grant, this restriction and the following disclaimer, must
30 * be included in all copies of the Software, in whole or in part, and all
31 * derivative works of the Software, unless such copies or derivative works are
32 * solely in the form of machine-executable object code generated by a source
33 * language processor.
34 *
35 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
36 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
37 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
38 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
39 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
40 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
41 * DEALINGS IN THE SOFTWARE.
42 *
43 * \defgroup library_srvsw_sysse_math_f32_integral Discrete Integral Approximation
44 * \ingroup library_srvsw_sysse_math_f32
45 *
46 */
47
48 #ifndef INTEGRAL_H
49 #define INTEGRAL_H
50
51 #include "Ifx_Cf32.h"
52
53 /** \brief Integrator object for float32 data type */
54 typedef struct
55 {
56 float32 uk;
57 float32 ik;
58 float32 delta;
59 } Ifx_IntegralF32;
60
61 /** \brief Integrator object for cfloat32 data type */
62 typedef struct
63 {
64 cfloat32 uk;
65 cfloat32 ik;
66 float32 delta;
67 } Ifx_ClpxFloat32_Integral;
68
69 /** \addtogroup library_srvsw_sysse_math_f32_integral
70 * \{ */
71
72 /** \brief Initialize the integrator object
73 * \param ci Pointer to the integrator object
74 * \param gain Integrator gain
75 * \param Ts Sampling period */
76 void Ifx_IntegralF32_init(Ifx_IntegralF32 *ci, float32 gain, float32 Ts);
77
78 /** \brief Step function of the integrator object
79 * \param ci Pointer to the integrator object
80 * \param ik input value
81 * \return most actual integrator value */
82 float32 Ifx_IntegralF32_step(Ifx_IntegralF32 *ci, float32 ik);
83
84 /** \brief Reset the integrator object
85 * \param ci Pointer to the integrator object */
86 void Ifx_IntegralF32_reset(Ifx_IntegralF32 *ci);
87
88 /** \brief Initialize the integrator object
89 * \param ci Pointer to the integrator object
90 * \param gain Integrator gain
91 * \param Ts Sampling period */
92 void Ifx_ClpxFloat32_Integral_init(Ifx_ClpxFloat32_Integral *ci, float32 gain, float32 Ts);
93
94 /** \brief Step function of the integrator object
95 * \param ci Pointer to the integrator object
96 * \param ik input value
97 * \return most actual integrator value */
98 cfloat32 Ifx_ClpxFloat32_Integral_step(Ifx_ClpxFloat32_Integral *ci, cfloat32 ik);
99
100 /** \brief Reset the integrator object
101 * \param ci Pointer to the integrator object */
102 void Ifx_ClpxFloat32_Integral_reset(Ifx_ClpxFloat32_Integral *ci);
103
104 /**\}*/
105
106 #endif /* INTEGRAL_H */
Ifx_ClpxFloat32_Integral_init
void Ifx_ClpxFloat32_Integral_init(Ifx_ClpxFloat32_Integral *ci, float32 gain, float32 Ts)
Initialize the integrator object.
Definition: Ifx_IntegralF32.c:75
Ifx_IntegralF32::delta
float32 delta
Definition: Ifx_IntegralF32.h:58
Ifx_ClpxFloat32_Integral_step
cfloat32 Ifx_ClpxFloat32_Integral_step(Ifx_ClpxFloat32_Integral *ci, cfloat32 ik)
Step function of the integrator object.
Definition: Ifx_IntegralF32.c:82
float32
float float32
Definition: Platform_Types.h:170
Ifx_ClpxFloat32_Integral::uk
cfloat32 uk
Definition: Ifx_IntegralF32.h:64
Ifx_ClpxFloat32_Integral_reset
void Ifx_ClpxFloat32_Integral_reset(Ifx_ClpxFloat32_Integral *ci)
Reset the integrator object.
Definition: Ifx_IntegralF32.c:66
Ifx_IntegralF32::ik
float32 ik
Definition: Ifx_IntegralF32.h:57
cfloat32
Definition: Ifx_Types.h:58
Ifx_IntegralF32::uk
float32 uk
Definition: Ifx_IntegralF32.h:56
Ifx_ClpxFloat32_Integral
Integrator object for cfloat32 data type.
Definition: Ifx_IntegralF32.h:62
Ifx_Cf32.h
Floating point signal, vector, and matrix library.
Ifx_ClpxFloat32_Integral::ik
cfloat32 ik
Definition: Ifx_IntegralF32.h:65
Ifx_IntegralF32_step
float32 Ifx_IntegralF32_step(Ifx_IntegralF32 *ci, float32 ik)
Step function of the integrator object.
Definition: Ifx_IntegralF32.c:57
Ifx_IntegralF32_init
void Ifx_IntegralF32_init(Ifx_IntegralF32 *ci, float32 gain, float32 Ts)
Initialize the integrator object.
Definition: Ifx_IntegralF32.c:51
Ifx_IntegralF32_reset
void Ifx_IntegralF32_reset(Ifx_IntegralF32 *ci)
Reset the integrator object.
Definition: Ifx_IntegralF32.c:44
Ifx_IntegralF32
Integrator object for float32 data type.
Definition: Ifx_IntegralF32.h:54


iLLD_TC38A: Ifx_InternalMux.c Source File

  • _Lib
  • InternalMux
Ifx_InternalMux.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_InternalMux.c
3 * \brief Mux configuration functions
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "Ifx_InternalMux.h"
47 #include "Cpu/Std/IfxCpu_Intrinsics.h"
48
49 /******************************************************************************/
50 /*-------------------------Function Implementations---------------------------*/
51 /******************************************************************************/
52
53 void Ifx_InternalMux_init(const Ifx_InternalMux_Config *cfg)
54 {
55 uint32 i;
56
57 for (i = 0; i < cfg->size; i++)
58 {
59 Ifx_InternalMux_MuxConfig muxCfg = cfg->muxConfig[i];
60
61 /*Load modify store operation done to insert the value to the register bit field*/
62 __ldmst((volatile void *)(muxCfg.regAddr), muxCfg.mask, muxCfg.value);
63 }
64 }
Ifx_InternalMux_MuxConfig::value
uint32 value
Mux/Demux configuration value.
Definition: Ifx_InternalMux.h:66
uint32
unsigned long uint32
Definition: Platform_Types.h:116
Ifx_InternalMux_MuxConfig::mask
uint32 mask
Bit field position for the Mux/Demux selection.
Definition: Ifx_InternalMux.h:65
IfxCpu_Intrinsics.h
Ifx_InternalMux.h
Mux configuration functions.
Ifx_InternalMux_Config
Definition: Ifx_InternalMux.h:72
Ifx_InternalMux_Config::size
uint32 size
Definition: Ifx_InternalMux.h:74
__ldmst
#define __ldmst
Definition: IfxCpu_IntrinsicsDcc.h:2065
Ifx_InternalMux_init
void Ifx_InternalMux_init(const Ifx_InternalMux_Config *cfg)
Initialises the internal mux configuration.
Definition: Ifx_InternalMux.c:53
Ifx_InternalMux_MuxConfig::regAddr
volatile void * regAddr
pointer to the register for Mux/Demux configuration
Definition: Ifx_InternalMux.h:64
Ifx_InternalMux_MuxConfig
Definition: Ifx_InternalMux.h:62
Ifx_InternalMux_Config::muxConfig
Ifx_InternalMux_MuxConfig * muxConfig
Definition: Ifx_InternalMux.h:75


iLLD_TC38A: Ifx_InternalMux.h Source File

  • _Lib
  • InternalMux
Ifx_InternalMux.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_InternalMux.h
3 * \brief Mux configuration functions
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2015 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 * \defgroup IfxLld_lib_internalmux_internalmux FIFO
41 * This module implements the Internal Mux functionality.
42 * \ingroup IfxLld_lib_internalmux
43 */
44
45 #ifndef IFX_INTERNALMUX_H
46 #define IFX_INTERNALMUX_H 1
47
48 /******************************************************************************/
49 /*----------------------------------Includes----------------------------------*/
50 /******************************************************************************/
51
52 #include "Cpu/Std/Ifx_Types.h"
53
54 /******************************************************************************/
55 /*-----------------------------Data Structures--------------------------------*/
56 /******************************************************************************/
57 /** \addtogroup IfxLld_lib_internalmux_internalmux
58 * \{ */
59 /** Individual Mux configuration structure
60 *
61 */
62 typedef struct
63 {
64 volatile void *regAddr; /**< \brief pointer to the register for Mux/Demux configuration */
65 uint32 mask; /**< \brief Bit field position for the Mux/Demux selection */
66 uint32 value; /**< \brief Mux/Demux configuration value */
67 } Ifx_InternalMux_MuxConfig;
68
69 /** Global/Combined Mux configuration object
70 *
71 */
72 typedef struct
73 {
74 uint32 size; /**< size of the internal mux configuration array*/
75 Ifx_InternalMux_MuxConfig *muxConfig; /**< pointer to the internal mux config array*/
76 }Ifx_InternalMux_Config;
77
78 /******************************************************************************/
79 /*-------------------------Global Function Prototypes-------------------------*/
80 /******************************************************************************/
81 /** \brief Initialises the internal mux configuration
82 *
83 * \param cfg Pointer on the Global Mux Configuration object
84 *
85 * \return None
86 */
87 IFX_EXTERN void Ifx_InternalMux_init(const Ifx_InternalMux_Config *cfg);
88
89 /**\}*/
90
91 #endif /* IFX_INTERNALMUX_H */
Ifx_InternalMux_MuxConfig::value
uint32 value
Mux/Demux configuration value.
Definition: Ifx_InternalMux.h:66
uint32
unsigned long uint32
Definition: Platform_Types.h:116
Ifx_InternalMux_MuxConfig::mask
uint32 mask
Bit field position for the Mux/Demux selection.
Definition: Ifx_InternalMux.h:65
Ifx_InternalMux_Config
Definition: Ifx_InternalMux.h:72
Ifx_InternalMux_Config::size
uint32 size
Definition: Ifx_InternalMux.h:74
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
Ifx_InternalMux_init
IFX_EXTERN void Ifx_InternalMux_init(const Ifx_InternalMux_Config *cfg)
Initialises the internal mux configuration.
Definition: Ifx_InternalMux.c:53
Ifx_InternalMux_MuxConfig::regAddr
volatile void * regAddr
pointer to the register for Mux/Demux configuration
Definition: Ifx_InternalMux.h:64
Ifx_InternalMux_MuxConfig
Definition: Ifx_InternalMux.h:62
Ifx_InternalMux_Config::muxConfig
Ifx_InternalMux_MuxConfig * muxConfig
Definition: Ifx_InternalMux.h:75


iLLD_TC38A: Ifx_LowPassPt1F32.c Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_LowPassPt1F32.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_LowPassPt1F32.c
3 * \brief Low pass filter PT1
4 *
5 * \version disabled
6 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 //------------------------------------------------------------------------------
43 #include "SysSe/Math/Ifx_LowPassPt1F32.h"
44 //------------------------------------------------------------------------------
45
46 /** \brief Set the low pass filter configuration
47 *
48 * This function sets the low pass filter configuration and reset the filter output.
49 *
50 * \param filter Specifies PT1 filter.
51 * \param config Specifies the PT1 filter configuration.
52 *
53 * \return None
54 */
55 void Ifx_LowPassPt1F32_init(Ifx_LowPassPt1F32 *filter, const Ifx_LowPassPt1F32_Config *config)
56 {
57 float32 tStar;
58 float32 T = 1 / config->cutOffFrequency;
59 tStar = 1 / (T / config->samplingTime + 1);
60
61 filter->a = config->gain * tStar;
62 filter->b = tStar;
63 filter->out = 0;
64 }
65
66
67 /** \brief Execute the low pass filter
68 * \param filter Specifies PT1 filter.
69 * \param input Specifies the filter input.
70 *
71 * \return Returns the filter output
72 */
73 float32 Ifx_LowPassPt1F32_do(Ifx_LowPassPt1F32 *filter, float32 input)
74 {
75 filter->out = filter->out + filter->a * input - filter->b * filter->out;
76 return filter->out;
77 }
Ifx_LowPassPt1F32::out
float32 out
last output
Definition: Ifx_LowPassPt1F32.h:65
Ifx_LowPassPt1F32_do
float32 Ifx_LowPassPt1F32_do(Ifx_LowPassPt1F32 *filter, float32 input)
Execute the low pass filter.
Definition: Ifx_LowPassPt1F32.c:73
float32
float float32
Definition: Platform_Types.h:170
Ifx_LowPassPt1F32
PT1 object definition.
Definition: Ifx_LowPassPt1F32.h:61
Ifx_LowPassPt1F32_init
void Ifx_LowPassPt1F32_init(Ifx_LowPassPt1F32 *filter, const Ifx_LowPassPt1F32_Config *config)
Set the low pass filter configuration.
Definition: Ifx_LowPassPt1F32.c:55
Ifx_LowPassPt1F32.h
Low pass filter PT1.
Ifx_LowPassPt1F32::b
float32 b
b parameter
Definition: Ifx_LowPassPt1F32.h:64
Ifx_LowPassPt1F32_Config::samplingTime
float32 samplingTime
Sampling time.
Definition: Ifx_LowPassPt1F32.h:73
Ifx_LowPassPt1F32::a
float32 a
a parameter
Definition: Ifx_LowPassPt1F32.h:63
Ifx_LowPassPt1F32_Config::cutOffFrequency
float32 cutOffFrequency
Cut off frequency.
Definition: Ifx_LowPassPt1F32.h:71
Ifx_LowPassPt1F32_Config::gain
float32 gain
Gain.
Definition: Ifx_LowPassPt1F32.h:72
Ifx_LowPassPt1F32_Config
PT1 configuration.
Definition: Ifx_LowPassPt1F32.h:69


iLLD_TC38A: Ifx_LowPassPt1F32.h Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_LowPassPt1F32.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_LowPassPt1F32.h
3 * \brief Low pass filter PT1
4 *
5 * \version disabled
6 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 * \defgroup library_srvsw_sysse_math_f32_lowpasspt1 Low-pass Filter: Type PT1
41 * This module implements a PT1 low pass filter.
42 * http://de.wikipedia.org/wiki/PT1-Glied
43 *
44 * Formula: \n
45 * \f$ y_k = y_{k-1} + a * x_k - b * y_{k-1} \f$ \n
46 * with \f$(T^* = \frac{T_s}{T+T_s})\f$, \f$(a = K*T^*)\f$, \f$(b = T^*)\f$
47 * with \f$(T_s: Sample time)\f$, \f$(K: Gain)\f$, \f$(T = \frac{1}{\omega_0})\f$
48 *
49 * \ingroup library_srvsw_sysse_math_f32
50 *
51 */
52
53 #if !defined(IFX_LOWPASSPT1F32)
54 #define IFX_LOWPASSPT1F32
55 //------------------------------------------------------------------------------
56 #include "Cpu/Std/Ifx_Types.h"
57 //------------------------------------------------------------------------------
58
59 /** \brief PT1 object definition.
60 */
61 typedef struct
62 {
63 float32 a; /**< \brief a parameter */
64 float32 b; /**< \brief b parameter */
65 float32 out; /**< \brief last output */
66 } Ifx_LowPassPt1F32;
67
68 /** \brief PT1 configuration */
69 typedef struct
70 {
71 float32 cutOffFrequency; /**< \brief Cut off frequency */
72 float32 gain; /**< \brief Gain */
73 float32 samplingTime; /**< \brief Sampling time */
74 } Ifx_LowPassPt1F32_Config;
75
76 //------------------------------------------------------------------------------
77
78 /** \addtogroup library_srvsw_sysse_math_f32_lowpasspt1
79 * \{ */
80 IFX_EXTERN void Ifx_LowPassPt1F32_init(Ifx_LowPassPt1F32 *filter, const Ifx_LowPassPt1F32_Config *config);
81 IFX_INLINE void Ifx_LowPassPt1F32_reset(Ifx_LowPassPt1F32 *filter);
82 IFX_EXTERN float32 Ifx_LowPassPt1F32_do(Ifx_LowPassPt1F32 *filter, float32 input);
83 /** \} */
84
85 //------------------------------------------------------------------------------
86
87 /** \brief Reset the internal filter variable
88 * \param filter Specifies PT1 filter.
89 */
90 IFX_INLINE void Ifx_LowPassPt1F32_reset(Ifx_LowPassPt1F32 *filter)
91 {
92 filter->out = 0.0;
93 }
94
95
96 //------------------------------------------------------------------------------
97 #endif
Ifx_LowPassPt1F32::out
float32 out
last output
Definition: Ifx_LowPassPt1F32.h:65
Ifx_LowPassPt1F32_do
IFX_EXTERN float32 Ifx_LowPassPt1F32_do(Ifx_LowPassPt1F32 *filter, float32 input)
Execute the low pass filter.
Definition: Ifx_LowPassPt1F32.c:73
float32
float float32
Definition: Platform_Types.h:170
Ifx_LowPassPt1F32_reset
IFX_INLINE void Ifx_LowPassPt1F32_reset(Ifx_LowPassPt1F32 *filter)
Reset the internal filter variable.
Definition: Ifx_LowPassPt1F32.h:90
Ifx_LowPassPt1F32
PT1 object definition.
Definition: Ifx_LowPassPt1F32.h:61
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
Ifx_LowPassPt1F32_init
IFX_EXTERN void Ifx_LowPassPt1F32_init(Ifx_LowPassPt1F32 *filter, const Ifx_LowPassPt1F32_Config *config)
Set the low pass filter configuration.
Definition: Ifx_LowPassPt1F32.c:55
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
Ifx_LowPassPt1F32::b
float32 b
b parameter
Definition: Ifx_LowPassPt1F32.h:64
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
Ifx_LowPassPt1F32_Config::samplingTime
float32 samplingTime
Sampling time.
Definition: Ifx_LowPassPt1F32.h:73
Ifx_LowPassPt1F32::a
float32 a
a parameter
Definition: Ifx_LowPassPt1F32.h:63
Ifx_LowPassPt1F32_Config::cutOffFrequency
float32 cutOffFrequency
Cut off frequency.
Definition: Ifx_LowPassPt1F32.h:71
Ifx_LowPassPt1F32_Config::gain
float32 gain
Gain.
Definition: Ifx_LowPassPt1F32.h:72
Ifx_LowPassPt1F32_Config
PT1 configuration.
Definition: Ifx_LowPassPt1F32.h:69


iLLD_TC38A: Ifx_Lut.h Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_Lut.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_Lut.h
3 * \brief Lookup defintion with fixed-point angle data type
4 *
5 *
6 *
7 * \version disabled
8 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 * \defgroup library_srvsw_sysse_math_lut Look-ups
43 * \ingroup library_srvsw_sysse_math
44 *
45 * \defgroup library_srvsw_sysse_math_f32_lut Look-ups float32
46 * \ingroup library_srvsw_sysse_math_lut
47 *
48 */
49 #ifndef IFX_LUT_H
50 #define IFX_LUT_H
51 //________________________________________________________________________________________
52 #include "Cpu/Std/IfxCpu_Intrinsics.h"
53 //________________________________________________________________________________________
54 #ifndef IFX_LUT_TABLE_CONST
55 /** \brief 0 = Lookup tables are generated and stored in RAM,
56 * 1 = Lookup tables are precompiled and stored in FLASH */
57 #define IFX_LUT_TABLE_CONST (1)
58 #endif
59
60 #if (IFX_LUT_TABLE_CONST != 0)
61 /** \brief Lookup table type modifier (stored in ROM) */
62 # define IFX_LUT_TABLE const
63 #else
64 /** \brief Lookup table type modifier (stored in RAM) */
65 # define IFX_LUT_TABLE
66 #endif
67
68 /** \brief Define the resolution (in bits) of cosinus and sinus table \ingroup library_srvsw_sysse_math_lut */
69 #define IFX_LUT_ANGLE_BITS (12)
70
71 /** \brief Define the cosinus and sinus table size \ingroup library_srvsw_sysse_math_lut */
72 #define IFX_LUT_ANGLE_RESOLUTION (1 << IFX_LUT_ANGLE_BITS)
73
74 /** \brief Value used as 180 degree angle */
75 #define IFX_LUT_ANGLE_PI (IFX_LUT_ANGLE_RESOLUTION / 2)
76
77 //________________________________________________________________________________________
78 /** \brief Fixed-point angle type.
79 *
80 * Resolution is defined by \ref IFX_LUT_ANGLE_RESOLUTION */
81 typedef sint32 Ifx_Lut_FxpAngle;
82
83 /** \brief Convert from float32 angle in radian into fixed-point angle type */
84 #define IFX_LUT_F32_TO_FXPANGLE(f) ((Ifx_Lut_FxpAngle)(f / IFX_PI * IFX_LUT_ANGLE_PI))
85
86 /** \brief Convert from fixed-point angle type to float32 angle in radian */
87 #define IFX_LUT_FXPANGLE_TO_F32(fx) ((float32)fx * IFX_PI / IFX_LUT_ANGLE_PI)
88
89 //________________________________________________________________________________________
90 #if (1U << IFX_LUT_ANGLE_BITS) != IFX_LUT_ANGLE_RESOLUTION
91 #error (1U << IFX_LUT_ANGLE_BITS) != IFX_LUT_ANGLE_RESOLUTION
92 #endif
93 //________________________________________________________________________________________
94 #endif /* IFX_LUT_H */
IfxCpu_Intrinsics.h
sint32
long sint32
Definition: Platform_Types.h:134
Ifx_Lut_FxpAngle
sint32 Ifx_Lut_FxpAngle
Fixed-point angle type.
Definition: Ifx_Lut.h:81


iLLD_TC38A: Ifx_LutAtan2F32.c Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_LutAtan2F32.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_LutAtan2F32.c
3 * \brief ATAN2 lookup functions with fixed-point angle data type
4 *
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42 #include "Ifx_LutAtan2F32.h"
43
44 #include <math.h>
45
46 void Ifx_LutAtan2F32_init(void)
47 {
48 #if IFX_LUT_TABLE_CONST == 0
49 { /* generate arctan table */
50 sint32 k;
51 float32 Step, value;
52 Step = (double)IFX_LUT_ATAN_LIMIT_LOW / IFX_LUT_ATAN_SIZE_LOW;
53
54 for (k = 0; k < IFX_LUTATAN2F32_SIZE; k++)
55 {
56 Ifx_g_LutAtan2F32_FxpAngle_table[k] = IFX_LUT_F32_TO_FXPANGLE(atanf(k / Step));
57 }
58 }
59 #endif
60 }
61
62
63 IFX_INLINE Ifx_Lut_FxpAngle Ifx_LutAtan2F32_fxpAnglePrivate(float32 valf)
64 {
65 uint32 vali;
66 valf = IFX_LUTATAN2F32_SIZE * valf;
67 vali = (uint32)valf;
68
69 if ((valf - (float32)vali) > 0.5)
70 { /* Round to nearest */
71 vali++;
72 }
73
74 return Ifx_g_LutAtan2F32_FxpAngle_table[vali];
75 }
76
77
78 IFX_INLINE float32 Ifx_LutAtan2F32_float32Private(float32 val)
79 { /* FIXME round to nearest ?? */
80 return Ifx_g_LutAtan2F32_table[(int)(val * IFX_LUTATAN2F32_SIZE)];
81 }
82
83
84 Ifx_Lut_FxpAngle Ifx_LutAtan2F32_fxpAngle(float32 x, float32 y)
85 {
86 Ifx_Lut_FxpAngle angle;
87 float32 fx = (float32)x;
88 float32 fy = (float32)y;
89
90 if (y < 0)
91 {
92 if (x < 0)
93 {
94 if (-y < -x)
95 { // 180 .. 225 deg
96 angle = -IFX_LUT_ANGLE_PI + Ifx_LutAtan2F32_fxpAnglePrivate(-fy / -fx);
97 }
98 else
99 { // 225 .. 270 deg
100 angle = -(IFX_LUT_ANGLE_PI / 2) - Ifx_LutAtan2F32_fxpAnglePrivate(-fx / -fy);
101 }
102 }
103 else // x >= 0
104 {
105 if (-y < x)
106 { // 315 .. 360 deg
107 angle = -Ifx_LutAtan2F32_fxpAnglePrivate(-fy / fx); // ok
108 }
109 else
110 { // 225 .. 270 deg
111 angle = -(IFX_LUT_ANGLE_PI / 2) + Ifx_LutAtan2F32_fxpAnglePrivate(fx / -fy);
112 }
113 }
114 }
115 else // y >= 0
116 {
117 if (x < 0)
118 {
119 if (y < -x)
120 { // 135 .. 180 deg
121 angle = IFX_LUT_ANGLE_PI - Ifx_LutAtan2F32_fxpAnglePrivate(fy / -fx); // ok
122 }
123 else
124 { // 90 .. 135 deg
125 angle = (IFX_LUT_ANGLE_PI / 2) + Ifx_LutAtan2F32_fxpAnglePrivate(-fx / fy); // ok
126 }
127 }
128 else // x >= 0
129 {
130 if (y < x)
131 { // 0 .. 45 deg
132 angle = Ifx_LutAtan2F32_fxpAnglePrivate(fy / fx); // ok
133 }
134 else
135 { // 45 .. 90 deg
136 angle = (IFX_LUT_ANGLE_PI / 2) - Ifx_LutAtan2F32_fxpAnglePrivate(fx / fy); // ok
137 }
138 }
139 }
140
141 return angle & (IFX_LUT_ANGLE_RESOLUTION - 1);
142 }
143
144
145 float32 Ifx_LutAtan2F32_float32(float32 y, float32 x)
146 {
147 float32 angle;
148
149 if (y < 0)
150 {
151 if (x < 0)
152 {
153 if (-y < -x)
154 { // 180 .. 225 deg
155 angle = -IFX_PI + Ifx_LutAtan2F32_float32Private(-y / -x);
156 }
157 else
158 { // 225 .. 270 deg
159 angle = -(IFX_PI / 2) - Ifx_LutAtan2F32_float32Private(-x / -y);
160 }
161 }
162 else // x >= 0
163 {
164 if (-y < x)
165 { // 315 .. 360 deg
166 angle = -Ifx_LutAtan2F32_float32Private(-y / x); // ok
167 }
168 else
169 { // 225 .. 270 deg
170 angle = -(IFX_PI / 2) + Ifx_LutAtan2F32_float32Private(x / -y);
171 }
172 }
173 }
174 else // y >= 0
175 {
176 if (x < 0)
177 {
178 if (y < -x)
179 { // 135 .. 180 deg
180 angle = IFX_PI - Ifx_LutAtan2F32_float32Private(y / -x); // ok
181 }
182 else
183 { // 90 .. 135 deg
184 angle = (IFX_PI / 2) + Ifx_LutAtan2F32_float32Private(-x / y); // ok
185 }
186 }
187 else // x >= 0
188 {
189 if (y < x)
190 { // 0 .. 45 deg
191 angle = Ifx_LutAtan2F32_float32Private(y / x); // ok
192 }
193 else
194 { // 45 .. 90 deg
195 angle = (IFX_PI / 2) - Ifx_LutAtan2F32_float32Private(x / y); // ok
196 }
197 }
198 }
199
200 return angle;
201 }
IFX_LUTATAN2F32_SIZE
#define IFX_LUTATAN2F32_SIZE
size of Ifx_LutAtan2F32 table
Definition: Ifx_LutAtan2F32.h:52
IFX_LUT_ANGLE_PI
#define IFX_LUT_ANGLE_PI
Value used as 180 degree angle.
Definition: Ifx_Lut.h:75
Ifx_g_LutAtan2F32_FxpAngle_table
IFX_EXTERN IFX_LUT_TABLE Ifx_Lut_FxpAngle Ifx_g_LutAtan2F32_FxpAngle_table[IFX_LUTATAN2F32_SIZE+1]
Table I for Ifx_LutAtan2F32_fxpAngle()
Definition: Ifx_LutAtan2F32.h:57
uint32
unsigned long uint32
Definition: Platform_Types.h:116
Ifx_g_LutAtan2F32_table
IFX_EXTERN IFX_LUT_TABLE float32 Ifx_g_LutAtan2F32_table[IFX_LUTATAN2F32_SIZE+1]
Definition: Ifx_LutAtan2F32.h:58
float32
float float32
Definition: Platform_Types.h:170
Ifx_LutAtan2F32_float32
float32 Ifx_LutAtan2F32_float32(float32 y, float32 x)
Definition: Ifx_LutAtan2F32.c:145
IFX_PI
#define IFX_PI
Definition: Ifx_Types.h:217
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
Ifx_LutAtan2F32_float32Private
IFX_INLINE float32 Ifx_LutAtan2F32_float32Private(float32 val)
Definition: Ifx_LutAtan2F32.c:78
Ifx_LutAtan2F32.h
Floating point signal, vector, and matrix library.
sint32
long sint32
Definition: Platform_Types.h:134
Ifx_Lut_FxpAngle
sint32 Ifx_Lut_FxpAngle
Fixed-point angle type.
Definition: Ifx_Lut.h:81
IFX_LUT_F32_TO_FXPANGLE
#define IFX_LUT_F32_TO_FXPANGLE(f)
Convert from float32 angle in radian into fixed-point angle type.
Definition: Ifx_Lut.h:84
IFX_LUT_ANGLE_RESOLUTION
#define IFX_LUT_ANGLE_RESOLUTION
Define the cosinus and sinus table size.
Definition: Ifx_Lut.h:72
Ifx_LutAtan2F32_fxpAnglePrivate
IFX_INLINE Ifx_Lut_FxpAngle Ifx_LutAtan2F32_fxpAnglePrivate(float32 valf)
Definition: Ifx_LutAtan2F32.c:63
Ifx_LutAtan2F32_init
void Ifx_LutAtan2F32_init(void)
Initialise the lookup tables.
Definition: Ifx_LutAtan2F32.c:46
Ifx_LutAtan2F32_fxpAngle
Ifx_Lut_FxpAngle Ifx_LutAtan2F32_fxpAngle(float32 x, float32 y)
Look-up arcus tangent value of y/x.
Definition: Ifx_LutAtan2F32.c:84


iLLD_TC38A: Ifx_LutAtan2F32.h Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_LutAtan2F32.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_LutAtan2F32.h
3 * \brief Floating point signal, vector, and matrix library
4 *
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup library_srvsw_sysse_math_lut_atan2 ATAN lookup table
42 * \ingroup library_srvsw_sysse_math_f32_lut
43 */
44
45 #ifndef IFX_LUTATAN2F32_H
46 #define IFX_LUTATAN2F32_H
47 //----------------------------------------------------------------------------------------
48 #include "Ifx_Lut.h"
49
50 //----------------------------------------------------------------------------------------
51
52 #define IFX_LUTATAN2F32_SIZE (1024) /**< \brief size of Ifx_LutAtan2F32 table */
53
54 //----------------------------------------------------------------------------------------
55
56 /** \brief Table I for Ifx_LutAtan2F32_fxpAngle() */
57 IFX_EXTERN IFX_LUT_TABLE Ifx_Lut_FxpAngle Ifx_g_LutAtan2F32_FxpAngle_table[IFX_LUTATAN2F32_SIZE + 1];
58 IFX_EXTERN IFX_LUT_TABLE float32 Ifx_g_LutAtan2F32_table[IFX_LUTATAN2F32_SIZE + 1];
59
60 /** \brief Initialise the lookup tables
61 * \ingroup library_srvsw_sysse_math_lut_atan2
62 */
63 IFX_EXTERN void Ifx_LutAtan2F32_init(void);
64
65 /**
66 * \brief Look-up arcus tangent value of y/x.
67 * \return fxpAngle 0 .. (IFX_LUT_ANGLE_RESOLUTION - 1), which represents 0 .. 2*IFX_PI
68 * \ingroup library_srvsw_sysse_math_lut_atan2
69 */
70 IFX_EXTERN Ifx_Lut_FxpAngle Ifx_LutAtan2F32_fxpAngle(float32 x, float32 y);
71 IFX_EXTERN float32 Ifx_LutAtan2F32_float32(float32 y, float32 x);
72
73 #endif
IFX_LUTATAN2F32_SIZE
#define IFX_LUTATAN2F32_SIZE
size of Ifx_LutAtan2F32 table
Definition: Ifx_LutAtan2F32.h:52
Ifx_LutAtan2F32_float32
IFX_EXTERN float32 Ifx_LutAtan2F32_float32(float32 y, float32 x)
Definition: Ifx_LutAtan2F32.c:145
Ifx_Lut.h
Lookup defintion with fixed-point angle data type.
Ifx_g_LutAtan2F32_FxpAngle_table
IFX_EXTERN IFX_LUT_TABLE Ifx_Lut_FxpAngle Ifx_g_LutAtan2F32_FxpAngle_table[IFX_LUTATAN2F32_SIZE+1]
Table I for Ifx_LutAtan2F32_fxpAngle()
Definition: Ifx_LutAtan2F32.h:57
IFX_LUT_TABLE
#define IFX_LUT_TABLE
Lookup table type modifier (stored in ROM)
Definition: Ifx_Lut.h:62
Ifx_g_LutAtan2F32_table
IFX_EXTERN IFX_LUT_TABLE float32 Ifx_g_LutAtan2F32_table[IFX_LUTATAN2F32_SIZE+1]
Definition: Ifx_LutAtan2F32.h:58
float32
float float32
Definition: Platform_Types.h:170
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
Ifx_Lut_FxpAngle
sint32 Ifx_Lut_FxpAngle
Fixed-point angle type.
Definition: Ifx_Lut.h:81
Ifx_LutAtan2F32_init
IFX_EXTERN void Ifx_LutAtan2F32_init(void)
Initialise the lookup tables.
Definition: Ifx_LutAtan2F32.c:46
Ifx_LutAtan2F32_fxpAngle
IFX_EXTERN Ifx_Lut_FxpAngle Ifx_LutAtan2F32_fxpAngle(float32 x, float32 y)
Look-up arcus tangent value of y/x.
Definition: Ifx_LutAtan2F32.c:84


iLLD_TC38A: Ifx_LutAtan2F32_Table.c Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_LutAtan2F32_Table.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_LutAtan2F32_Table.c
3 * \brief Table data for ATAN2 lookup functions
4 *
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "Ifx_LutAtan2F32.h"
44
45 #if IFX_LUT_TABLE_CONST == 0
46 /* FIXME Table size and type not consistent */
47 sint16 Ifx_g_LutAtan2F32_FxpAngle_table[IFX_LUTATAN2F32_SIZE];
48 #else
49
50 #if (IFX_LUTATAN2F32_SIZE != 1024)
51 #error "Inconsistent between Lookup Table and configuration. Please regenerate."
52 #endif
53
54 const Ifx_Lut_FxpAngle Ifx_g_LutAtan2F32_FxpAngle_table[1024 + 1] = {
55 IFX_LUT_F32_TO_FXPANGLE(0),
56 IFX_LUT_F32_TO_FXPANGLE(0.000976562189559319),
57 IFX_LUT_F32_TO_FXPANGLE(0.00195312251647882),
58 IFX_LUT_F32_TO_FXPANGLE(0.00292967911813999),
59 IFX_LUT_F32_TO_FXPANGLE(0.00390623013196697),
60 IFX_LUT_F32_TO_FXPANGLE(0.00488277369544783),
61 IFX_LUT_F32_TO_FXPANGLE(0.00585930794615589),
62 IFX_LUT_F32_TO_FXPANGLE(0.00683583102177106),
63 IFX_LUT_F32_TO_FXPANGLE(0.00781234106010111),
64 IFX_LUT_F32_TO_FXPANGLE(0.008788836199103),
65 IFX_LUT_F32_TO_FXPANGLE(0.00976531457690415),
66 IFX_LUT_F32_TO_FXPANGLE(0.0107417743318238),
67 IFX_LUT_F32_TO_FXPANGLE(0.0117182136023941),
68 IFX_LUT_F32_TO_FXPANGLE(0.0126946305273818),
69 IFX_LUT_F32_TO_FXPANGLE(0.0136710232458091),
70 IFX_LUT_F32_TO_FXPANGLE(0.014647389896975),
71 IFX_LUT_F32_TO_FXPANGLE(0.0156237286204768),
72 IFX_LUT_F32_TO_FXPANGLE(0.0166000375562313),
73 IFX_LUT_F32_TO_FXPANGLE(0.0175763148444956),
74 IFX_LUT_F32_TO_FXPANGLE(0.018552558625889),
75 IFX_LUT_F32_TO_FXPANGLE(0.0195287670414137),
76 IFX_LUT_F32_TO_FXPANGLE(0.0205049382324764),
77 IFX_LUT_F32_TO_FXPANGLE(0.0214810703409091),
78 IFX_LUT_F32_TO_FXPANGLE(0.0224571615089906),
79 IFX_LUT_F32_TO_FXPANGLE(0.0234332098794676),
80 IFX_LUT_F32_TO_FXPANGLE(0.0244092135955758),
81 IFX_LUT_F32_TO_FXPANGLE(0.0253851708010611),
82 IFX_LUT_F32_TO_FXPANGLE(0.0263610796402008),
83 IFX_LUT_F32_TO_FXPANGLE(0.0273369382578244),
84 IFX_LUT_F32_TO_FXPANGLE(0.0283127447993352),
85 IFX_LUT_F32_TO_FXPANGLE(0.029288497410731),
86 IFX_LUT_F32_TO_FXPANGLE(0.0302641942386252),
87 IFX_LUT_F32_TO_FXPANGLE(0.0312398334302683),
88 IFX_LUT_F32_TO_FXPANGLE(0.0322154131335681),
89 IFX_LUT_F32_TO_FXPANGLE(0.0331909314971116),
90 IFX_LUT_F32_TO_FXPANGLE(0.0341663866701854),
91 IFX_LUT_F32_TO_FXPANGLE(0.0351417768027968),
92 IFX_LUT_F32_TO_FXPANGLE(0.036117100045695),
93 IFX_LUT_F32_TO_FXPANGLE(0.0370923545503918),
94 IFX_LUT_F32_TO_FXPANGLE(0.0380675384691825),
95 IFX_LUT_F32_TO_FXPANGLE(0.039042649955167),
96 IFX_LUT_F32_TO_FXPANGLE(0.0400176871622703),
97 IFX_LUT_F32_TO_FXPANGLE(0.0409926482452638),
98 IFX_LUT_F32_TO_FXPANGLE(0.0419675313597857),
99 IFX_LUT_F32_TO_FXPANGLE(0.0429423346623622),
100 IFX_LUT_F32_TO_FXPANGLE(0.0439170563104278),
101 IFX_LUT_F32_TO_FXPANGLE(0.0448916944623465),
102 IFX_LUT_F32_TO_FXPANGLE(0.0458662472774322),
103 IFX_LUT_F32_TO_FXPANGLE(0.0468407129159697),
104 IFX_LUT_F32_TO_FXPANGLE(0.0478150895392348),
105 IFX_LUT_F32_TO_FXPANGLE(0.0487893753095156),
106 IFX_LUT_F32_TO_FXPANGLE(0.0497635683901328),
107 IFX_LUT_F32_TO_FXPANGLE(0.0507376669454602),
108 IFX_LUT_F32_TO_FXPANGLE(0.0517116691409454),
109 IFX_LUT_F32_TO_FXPANGLE(0.05268557314313),
110 IFX_LUT_F32_TO_FXPANGLE(0.0536593771196708),
111 IFX_LUT_F32_TO_FXPANGLE(0.0546330792393595),
112 IFX_LUT_F32_TO_FXPANGLE(0.0556066776721433),
113 IFX_LUT_F32_TO_FXPANGLE(0.0565801705891457),
114 IFX_LUT_F32_TO_FXPANGLE(0.0575535561626864),
115 IFX_LUT_F32_TO_FXPANGLE(0.0585268325663018),
116 IFX_LUT_F32_TO_FXPANGLE(0.0594999979747652),
117 IFX_LUT_F32_TO_FXPANGLE(0.0604730505641073),
118 IFX_LUT_F32_TO_FXPANGLE(0.0614459885116361),
119 IFX_LUT_F32_TO_FXPANGLE(0.0624188099959574),
120 IFX_LUT_F32_TO_FXPANGLE(0.0633915131969944),
121 IFX_LUT_F32_TO_FXPANGLE(0.0643640962960086),
122 IFX_LUT_F32_TO_FXPANGLE(0.0653365574756192),
123 IFX_LUT_F32_TO_FXPANGLE(0.0663088949198235),
124 IFX_LUT_F32_TO_FXPANGLE(0.0672811068140167),
125 IFX_LUT_F32_TO_FXPANGLE(0.068253191345012),
126 IFX_LUT_F32_TO_FXPANGLE(0.0692251467010603),
127 IFX_LUT_F32_TO_FXPANGLE(0.0701969710718705),
128 IFX_LUT_F32_TO_FXPANGLE(0.0711686626486288),
129 IFX_LUT_F32_TO_FXPANGLE(0.0721402196240188),
130 IFX_LUT_F32_TO_FXPANGLE(0.0731116401922413),
131 IFX_LUT_F32_TO_FXPANGLE(0.0740829225490337),
132 IFX_LUT_F32_TO_FXPANGLE(0.0750540648916902),
133 IFX_LUT_F32_TO_FXPANGLE(0.0760250654190807),
134 IFX_LUT_F32_TO_FXPANGLE(0.0769959223316711),
135 IFX_LUT_F32_TO_FXPANGLE(0.0779666338315423),
136 IFX_LUT_F32_TO_FXPANGLE(0.07893719812241),
137 IFX_LUT_F32_TO_FXPANGLE(0.0799076134096439),
138 IFX_LUT_F32_TO_FXPANGLE(0.0808778779002873),
139 IFX_LUT_F32_TO_FXPANGLE(0.0818479898030765),
140 IFX_LUT_F32_TO_FXPANGLE(0.0828179473284599),
141 IFX_LUT_F32_TO_FXPANGLE(0.0837877486886171),
142 IFX_LUT_F32_TO_FXPANGLE(0.0847573920974787),
143 IFX_LUT_F32_TO_FXPANGLE(0.0857268757707448),
144 IFX_LUT_F32_TO_FXPANGLE(0.0866961979259047),
145 IFX_LUT_F32_TO_FXPANGLE(0.0876653567822554),
146 IFX_LUT_F32_TO_FXPANGLE(0.0886343505609211),
147 IFX_LUT_F32_TO_FXPANGLE(0.0896031774848717),
148 IFX_LUT_F32_TO_FXPANGLE(0.0905718357789422),
149 IFX_LUT_F32_TO_FXPANGLE(0.0915403236698511),
150 IFX_LUT_F32_TO_FXPANGLE(0.0925086393862194),
151 IFX_LUT_F32_TO_FXPANGLE(0.0934767811585895),
152 IFX_LUT_F32_TO_FXPANGLE(0.0944447472194436),
153 IFX_LUT_F32_TO_FXPANGLE(0.0954125358032227),
154 IFX_LUT_F32_TO_FXPANGLE(0.0963801451463448),
155 IFX_LUT_F32_TO_FXPANGLE(0.0973475734872237),
156 IFX_LUT_F32_TO_FXPANGLE(0.0983148190662873),
157 IFX_LUT_F32_TO_FXPANGLE(0.0992818801259964),
158 IFX_LUT_F32_TO_FXPANGLE(0.100248754910863),
159 IFX_LUT_F32_TO_FXPANGLE(0.101215441667467),
160 IFX_LUT_F32_TO_FXPANGLE(0.102181938644477),
161 IFX_LUT_F32_TO_FXPANGLE(0.103148244092669),
162 IFX_LUT_F32_TO_FXPANGLE(0.10411435626494),
163 IFX_LUT_F32_TO_FXPANGLE(0.10508027341633),
164 IFX_LUT_F32_TO_FXPANGLE(0.106045993804039),
165 IFX_LUT_F32_TO_FXPANGLE(0.107011515687447),
166 IFX_LUT_F32_TO_FXPANGLE(0.107976837328126),
167 IFX_LUT_F32_TO_FXPANGLE(0.108941956989866),
168 IFX_LUT_F32_TO_FXPANGLE(0.109906872938685),
169 IFX_LUT_F32_TO_FXPANGLE(0.110871583442852),
170 IFX_LUT_F32_TO_FXPANGLE(0.111836086772904),
171 IFX_LUT_F32_TO_FXPANGLE(0.112800381201659),
172 IFX_LUT_F32_TO_FXPANGLE(0.113764465004242),
173 IFX_LUT_F32_TO_FXPANGLE(0.114728336458092),
174 IFX_LUT_F32_TO_FXPANGLE(0.115691993842991),
175 IFX_LUT_F32_TO_FXPANGLE(0.116655435441069),
176 IFX_LUT_F32_TO_FXPANGLE(0.117618659536834),
177 IFX_LUT_F32_TO_FXPANGLE(0.118581664417177),
178 IFX_LUT_F32_TO_FXPANGLE(0.1195444483714),
179 IFX_LUT_F32_TO_FXPANGLE(0.120507009691225),
180 IFX_LUT_F32_TO_FXPANGLE(0.121469346670814),
181 IFX_LUT_F32_TO_FXPANGLE(0.122431457606789),
182 IFX_LUT_F32_TO_FXPANGLE(0.123393340798243),
183 IFX_LUT_F32_TO_FXPANGLE(0.124354994546761),
184 IFX_LUT_F32_TO_FXPANGLE(0.125316417156437),
185 IFX_LUT_F32_TO_FXPANGLE(0.126277606933887),
186 IFX_LUT_F32_TO_FXPANGLE(0.127238562188269),
187 IFX_LUT_F32_TO_FXPANGLE(0.128199281231298),
188 IFX_LUT_F32_TO_FXPANGLE(0.129159762377265),
189 IFX_LUT_F32_TO_FXPANGLE(0.130120003943049),
190 IFX_LUT_F32_TO_FXPANGLE(0.131080004248137),
191 IFX_LUT_F32_TO_FXPANGLE(0.132039761614639),
192 IFX_LUT_F32_TO_FXPANGLE(0.132999274367304),
193 IFX_LUT_F32_TO_FXPANGLE(0.133958540833537),
194 IFX_LUT_F32_TO_FXPANGLE(0.134917559343415),
195 IFX_LUT_F32_TO_FXPANGLE(0.135876328229701),
196 IFX_LUT_F32_TO_FXPANGLE(0.136834845827863),
197 IFX_LUT_F32_TO_FXPANGLE(0.137793110476088),
198 IFX_LUT_F32_TO_FXPANGLE(0.138751120515297),
199 IFX_LUT_F32_TO_FXPANGLE(0.139708874289164),
200 IFX_LUT_F32_TO_FXPANGLE(0.140666370144127),
201 IFX_LUT_F32_TO_FXPANGLE(0.14162360642941),
202 IFX_LUT_F32_TO_FXPANGLE(0.14258058149703),
203 IFX_LUT_F32_TO_FXPANGLE(0.143537293701821),
204 IFX_LUT_F32_TO_FXPANGLE(0.144493741401443),
205 IFX_LUT_F32_TO_FXPANGLE(0.145449922956401),
206 IFX_LUT_F32_TO_FXPANGLE(0.146405836730058),
207 IFX_LUT_F32_TO_FXPANGLE(0.147361481088652),
208 IFX_LUT_F32_TO_FXPANGLE(0.148316854401309),
209 IFX_LUT_F32_TO_FXPANGLE(0.14927195504006),
210 IFX_LUT_F32_TO_FXPANGLE(0.150226781379856),
211 IFX_LUT_F32_TO_FXPANGLE(0.15118133179858),
212 IFX_LUT_F32_TO_FXPANGLE(0.152135604677064),
213 IFX_LUT_F32_TO_FXPANGLE(0.153089598399105),
214 IFX_LUT_F32_TO_FXPANGLE(0.154043311351475),
215 IFX_LUT_F32_TO_FXPANGLE(0.154996741923941),
216 IFX_LUT_F32_TO_FXPANGLE(0.155949888509276),
217 IFX_LUT_F32_TO_FXPANGLE(0.156902749503275),
218 IFX_LUT_F32_TO_FXPANGLE(0.157855323304766),
219 IFX_LUT_F32_TO_FXPANGLE(0.158807608315631),
220 IFX_LUT_F32_TO_FXPANGLE(0.159759602940813),
221 IFX_LUT_F32_TO_FXPANGLE(0.160711305588332),
222 IFX_LUT_F32_TO_FXPANGLE(0.161662714669305),
223 IFX_LUT_F32_TO_FXPANGLE(0.162613828597949),
224 IFX_LUT_F32_TO_FXPANGLE(0.163564645791604),
225 IFX_LUT_F32_TO_FXPANGLE(0.164515164670743),
226 IFX_LUT_F32_TO_FXPANGLE(0.165465383658987),
227 IFX_LUT_F32_TO_FXPANGLE(0.166415301183115),
228 IFX_LUT_F32_TO_FXPANGLE(0.167364915673083),
229 IFX_LUT_F32_TO_FXPANGLE(0.168314225562034),
230 IFX_LUT_F32_TO_FXPANGLE(0.169263229286312),
231 IFX_LUT_F32_TO_FXPANGLE(0.170211925285474),
232 IFX_LUT_F32_TO_FXPANGLE(0.171160312002307),
233 IFX_LUT_F32_TO_FXPANGLE(0.172108387882836),
234 IFX_LUT_F32_TO_FXPANGLE(0.17305615137634),
235 IFX_LUT_F32_TO_FXPANGLE(0.174003600935368),
236 IFX_LUT_F32_TO_FXPANGLE(0.174950735015743),
237 IFX_LUT_F32_TO_FXPANGLE(0.175897552076585),
238 IFX_LUT_F32_TO_FXPANGLE(0.176844050580316),
239 IFX_LUT_F32_TO_FXPANGLE(0.177790228992676),
240 IFX_LUT_F32_TO_FXPANGLE(0.178736085782736),
241 IFX_LUT_F32_TO_FXPANGLE(0.179681619422909),
242 IFX_LUT_F32_TO_FXPANGLE(0.180626828388963),
243 IFX_LUT_F32_TO_FXPANGLE(0.181571711160032),
244 IFX_LUT_F32_TO_FXPANGLE(0.182516266218631),
245 IFX_LUT_F32_TO_FXPANGLE(0.183460492050666),
246 IFX_LUT_F32_TO_FXPANGLE(0.184404387145446),
247 IFX_LUT_F32_TO_FXPANGLE(0.185347949995695),
248 IFX_LUT_F32_TO_FXPANGLE(0.186291179097566),
249 IFX_LUT_F32_TO_FXPANGLE(0.187234072950649),
250 IFX_LUT_F32_TO_FXPANGLE(0.188176630057987),
251 IFX_LUT_F32_TO_FXPANGLE(0.189118848926084),
252 IFX_LUT_F32_TO_FXPANGLE(0.190060728064918),
253 IFX_LUT_F32_TO_FXPANGLE(0.191002265987953),
254 IFX_LUT_F32_TO_FXPANGLE(0.191943461212149),
255 IFX_LUT_F32_TO_FXPANGLE(0.192884312257975),
256 IFX_LUT_F32_TO_FXPANGLE(0.193824817649417),
257 IFX_LUT_F32_TO_FXPANGLE(0.194764975913995),
258 IFX_LUT_F32_TO_FXPANGLE(0.195704785582767),
259 IFX_LUT_F32_TO_FXPANGLE(0.196644245190345),
260 IFX_LUT_F32_TO_FXPANGLE(0.197583353274903),
261 IFX_LUT_F32_TO_FXPANGLE(0.19852210837819),
262 IFX_LUT_F32_TO_FXPANGLE(0.199460509045539),
263 IFX_LUT_F32_TO_FXPANGLE(0.200398553825879),
264 IFX_LUT_F32_TO_FXPANGLE(0.201336241271742),
265 IFX_LUT_F32_TO_FXPANGLE(0.202273569939279),
266 IFX_LUT_F32_TO_FXPANGLE(0.203210538388266),
267 IFX_LUT_F32_TO_FXPANGLE(0.204147145182117),
268 IFX_LUT_F32_TO_FXPANGLE(0.205083388887891),
269 IFX_LUT_F32_TO_FXPANGLE(0.206019268076305),
270 IFX_LUT_F32_TO_FXPANGLE(0.206954781321742),
271 IFX_LUT_F32_TO_FXPANGLE(0.207889927202263),
272 IFX_LUT_F32_TO_FXPANGLE(0.208824704299615),
273 IFX_LUT_F32_TO_FXPANGLE(0.209759111199241),
274 IFX_LUT_F32_TO_FXPANGLE(0.210693146490291),
275 IFX_LUT_F32_TO_FXPANGLE(0.21162680876563),
276 IFX_LUT_F32_TO_FXPANGLE(0.212560096621847),
277 IFX_LUT_F32_TO_FXPANGLE(0.213493008659266),
278 IFX_LUT_F32_TO_FXPANGLE(0.214425543481956),
279 IFX_LUT_F32_TO_FXPANGLE(0.215357699697738),
280 IFX_LUT_F32_TO_FXPANGLE(0.216289475918194),
281 IFX_LUT_F32_TO_FXPANGLE(0.217220870758679),
282 IFX_LUT_F32_TO_FXPANGLE(0.218151882838326),
283 IFX_LUT_F32_TO_FXPANGLE(0.219082510780058),
284 IFX_LUT_F32_TO_FXPANGLE(0.220012753210596),
285 IFX_LUT_F32_TO_FXPANGLE(0.220942608760466),
286 IFX_LUT_F32_TO_FXPANGLE(0.22187207606401),
287 IFX_LUT_F32_TO_FXPANGLE(0.222801153759395),
288 IFX_LUT_F32_TO_FXPANGLE(0.223729840488615),
289 IFX_LUT_F32_TO_FXPANGLE(0.22465813489751),
290 IFX_LUT_F32_TO_FXPANGLE(0.225586035635764),
291 IFX_LUT_F32_TO_FXPANGLE(0.22651354135692),
292 IFX_LUT_F32_TO_FXPANGLE(0.227440650718385),
293 IFX_LUT_F32_TO_FXPANGLE(0.228367362381439),
294 IFX_LUT_F32_TO_FXPANGLE(0.229293675011242),
295 IFX_LUT_F32_TO_FXPANGLE(0.230219587276844),
296 IFX_LUT_F32_TO_FXPANGLE(0.231145097851188),
297 IFX_LUT_F32_TO_FXPANGLE(0.232070205411125),
298 IFX_LUT_F32_TO_FXPANGLE(0.232994908637414),
299 IFX_LUT_F32_TO_FXPANGLE(0.233919206214733),
300 IFX_LUT_F32_TO_FXPANGLE(0.234843096831689),
301 IFX_LUT_F32_TO_FXPANGLE(0.23576657918082),
302 IFX_LUT_F32_TO_FXPANGLE(0.236689651958605),
303 IFX_LUT_F32_TO_FXPANGLE(0.237612313865471),
304 IFX_LUT_F32_TO_FXPANGLE(0.238534563605801),
305 IFX_LUT_F32_TO_FXPANGLE(0.239456399887938),
306 IFX_LUT_F32_TO_FXPANGLE(0.240377821424194),
307 IFX_LUT_F32_TO_FXPANGLE(0.241298826930859),
308 IFX_LUT_F32_TO_FXPANGLE(0.242219415128201),
309 IFX_LUT_F32_TO_FXPANGLE(0.24313958474048),
310 IFX_LUT_F32_TO_FXPANGLE(0.244059334495949),
311 IFX_LUT_F32_TO_FXPANGLE(0.244978663126864),
312 IFX_LUT_F32_TO_FXPANGLE(0.24589756936949),
313 IFX_LUT_F32_TO_FXPANGLE(0.246816051964103),
314 IFX_LUT_F32_TO_FXPANGLE(0.247734109655002),
315 IFX_LUT_F32_TO_FXPANGLE(0.248651741190513),
316 IFX_LUT_F32_TO_FXPANGLE(0.249568945322993),
317 IFX_LUT_F32_TO_FXPANGLE(0.250485720808836),
318 IFX_LUT_F32_TO_FXPANGLE(0.251402066408485),
319 IFX_LUT_F32_TO_FXPANGLE(0.252317980886427),
320 IFX_LUT_F32_TO_FXPANGLE(0.25323346301121),
321 IFX_LUT_F32_TO_FXPANGLE(0.254148511555439),
322 IFX_LUT_F32_TO_FXPANGLE(0.25506312529579),
323 IFX_LUT_F32_TO_FXPANGLE(0.255977303013006),
324 IFX_LUT_F32_TO_FXPANGLE(0.25689104349191),
325 IFX_LUT_F32_TO_FXPANGLE(0.25780434552141),
326 IFX_LUT_F32_TO_FXPANGLE(0.258717207894497),
327 IFX_LUT_F32_TO_FXPANGLE(0.259629629408258),
328 IFX_LUT_F32_TO_FXPANGLE(0.260541608863876),
329 IFX_LUT_F32_TO_FXPANGLE(0.261453145066638),
330 IFX_LUT_F32_TO_FXPANGLE(0.262364236825938),
331 IFX_LUT_F32_TO_FXPANGLE(0.263274882955282),
332 IFX_LUT_F32_TO_FXPANGLE(0.264185082272293),
333 IFX_LUT_F32_TO_FXPANGLE(0.265094833598715),
334 IFX_LUT_F32_TO_FXPANGLE(0.266004135760417),
335 IFX_LUT_F32_TO_FXPANGLE(0.2669129875874),
336 IFX_LUT_F32_TO_FXPANGLE(0.267821387913799),
337 IFX_LUT_F32_TO_FXPANGLE(0.268729335577886),
338 IFX_LUT_F32_TO_FXPANGLE(0.269636829422078),
339 IFX_LUT_F32_TO_FXPANGLE(0.270543868292937),
340 IFX_LUT_F32_TO_FXPANGLE(0.271450451041176),
341 IFX_LUT_F32_TO_FXPANGLE(0.272356576521665),
342 IFX_LUT_F32_TO_FXPANGLE(0.27326224359343),
343 IFX_LUT_F32_TO_FXPANGLE(0.274167451119659),
344 IFX_LUT_F32_TO_FXPANGLE(0.275072197967707),
345 IFX_LUT_F32_TO_FXPANGLE(0.275976483009098),
346 IFX_LUT_F32_TO_FXPANGLE(0.27688030511953),
347 IFX_LUT_F32_TO_FXPANGLE(0.277783663178873),
348 IFX_LUT_F32_TO_FXPANGLE(0.278686556071182),
349 IFX_LUT_F32_TO_FXPANGLE(0.27958898268469),
350 IFX_LUT_F32_TO_FXPANGLE(0.280490941911819),
351 IFX_LUT_F32_TO_FXPANGLE(0.281392432649178),
352 IFX_LUT_F32_TO_FXPANGLE(0.282293453797569),
353 IFX_LUT_F32_TO_FXPANGLE(0.283194004261987),
354 IFX_LUT_F32_TO_FXPANGLE(0.284094082951627),
355 IFX_LUT_F32_TO_FXPANGLE(0.284993688779881),
356 IFX_LUT_F32_TO_FXPANGLE(0.285892820664347),
357 IFX_LUT_F32_TO_FXPANGLE(0.286791477526827),
358 IFX_LUT_F32_TO_FXPANGLE(0.28768965829333),
359 IFX_LUT_F32_TO_FXPANGLE(0.288587361894077),
360 IFX_LUT_F32_TO_FXPANGLE(0.289484587263501),
361 IFX_LUT_F32_TO_FXPANGLE(0.29038133334025),
362 IFX_LUT_F32_TO_FXPANGLE(0.291277599067188),
363 IFX_LUT_F32_TO_FXPANGLE(0.292173383391399),
364 IFX_LUT_F32_TO_FXPANGLE(0.293068685264188),
365 IFX_LUT_F32_TO_FXPANGLE(0.293963503641084),
366 IFX_LUT_F32_TO_FXPANGLE(0.294857837481838),
367 IFX_LUT_F32_TO_FXPANGLE(0.295751685750432),
368 IFX_LUT_F32_TO_FXPANGLE(0.296645047415071),
369 IFX_LUT_F32_TO_FXPANGLE(0.297537921448196),
370 IFX_LUT_F32_TO_FXPANGLE(0.298430306826474),
371 IFX_LUT_F32_TO_FXPANGLE(0.299322202530807),
372 IFX_LUT_F32_TO_FXPANGLE(0.300213607546333),
373 IFX_LUT_F32_TO_FXPANGLE(0.301104520862424),
374 IFX_LUT_F32_TO_FXPANGLE(0.301994941472688),
375 IFX_LUT_F32_TO_FXPANGLE(0.302884868374971),
376 IFX_LUT_F32_TO_FXPANGLE(0.303774300571361),
377 IFX_LUT_F32_TO_FXPANGLE(0.304663237068183),
378 IFX_LUT_F32_TO_FXPANGLE(0.305551676876003),
379 IFX_LUT_F32_TO_FXPANGLE(0.30643961900963),
380 IFX_LUT_F32_TO_FXPANGLE(0.307327062488116),
381 IFX_LUT_F32_TO_FXPANGLE(0.308214006334753),
382 IFX_LUT_F32_TO_FXPANGLE(0.309100449577082),
383 IFX_LUT_F32_TO_FXPANGLE(0.309986391246883),
384 IFX_LUT_F32_TO_FXPANGLE(0.310871830380185),
385 IFX_LUT_F32_TO_FXPANGLE(0.31175676601726),
386 IFX_LUT_F32_TO_FXPANGLE(0.312641197202625),
387 IFX_LUT_F32_TO_FXPANGLE(0.313525122985044),
388 IFX_LUT_F32_TO_FXPANGLE(0.314408542417527),
389 IFX_LUT_F32_TO_FXPANGLE(0.31529145455733),
390 IFX_LUT_F32_TO_FXPANGLE(0.316173858465954),
391 IFX_LUT_F32_TO_FXPANGLE(0.317055753209147),
392 IFX_LUT_F32_TO_FXPANGLE(0.317937137856902),
393 IFX_LUT_F32_TO_FXPANGLE(0.318818011483458),
394 IFX_LUT_F32_TO_FXPANGLE(0.3196983731673),
395 IFX_LUT_F32_TO_FXPANGLE(0.320578221991157),
396 IFX_LUT_F32_TO_FXPANGLE(0.321457557042003),
397 IFX_LUT_F32_TO_FXPANGLE(0.322336377411056),
398 IFX_LUT_F32_TO_FXPANGLE(0.323214682193777),
399 IFX_LUT_F32_TO_FXPANGLE(0.324092470489872),
400 IFX_LUT_F32_TO_FXPANGLE(0.324969741403286),
401 IFX_LUT_F32_TO_FXPANGLE(0.325846494042208),
402 IFX_LUT_F32_TO_FXPANGLE(0.326722727519067),
403 IFX_LUT_F32_TO_FXPANGLE(0.327598440950531),
404 IFX_LUT_F32_TO_FXPANGLE(0.328473633457506),
405 IFX_LUT_F32_TO_FXPANGLE(0.329348304165139),
406 IFX_LUT_F32_TO_FXPANGLE(0.330222452202808),
407 IFX_LUT_F32_TO_FXPANGLE(0.331096076704132),
408 IFX_LUT_F32_TO_FXPANGLE(0.33196917680696),
409 IFX_LUT_F32_TO_FXPANGLE(0.332841751653376),
410 IFX_LUT_F32_TO_FXPANGLE(0.333713800389694),
411 IFX_LUT_F32_TO_FXPANGLE(0.334585322166459),
412 IFX_LUT_F32_TO_FXPANGLE(0.335456316138443),
413 IFX_LUT_F32_TO_FXPANGLE(0.336326781464645),
414 IFX_LUT_F32_TO_FXPANGLE(0.33719671730829),
415 IFX_LUT_F32_TO_FXPANGLE(0.338066122836825),
416 IFX_LUT_F32_TO_FXPANGLE(0.338934997221921),
417 IFX_LUT_F32_TO_FXPANGLE(0.339803339639465),
418 IFX_LUT_F32_TO_FXPANGLE(0.340671149269565),
419 IFX_LUT_F32_TO_FXPANGLE(0.341538425296542),
420 IFX_LUT_F32_TO_FXPANGLE(0.342405166908932),
421 IFX_LUT_F32_TO_FXPANGLE(0.343271373299484),
422 IFX_LUT_F32_TO_FXPANGLE(0.344137043665154),
423 IFX_LUT_F32_TO_FXPANGLE(0.345002177207105),
424 IFX_LUT_F32_TO_FXPANGLE(0.345866773130707),
425 IFX_LUT_F32_TO_FXPANGLE(0.34673083064553),
426 IFX_LUT_F32_TO_FXPANGLE(0.347594348965346),
427 IFX_LUT_F32_TO_FXPANGLE(0.348457327308122),
428 IFX_LUT_F32_TO_FXPANGLE(0.349319764896022),
429 IFX_LUT_F32_TO_FXPANGLE(0.350181660955402),
430 IFX_LUT_F32_TO_FXPANGLE(0.351043014716805),
431 IFX_LUT_F32_TO_FXPANGLE(0.351903825414965),
432 IFX_LUT_F32_TO_FXPANGLE(0.352764092288795),
433 IFX_LUT_F32_TO_FXPANGLE(0.353623814581394),
434 IFX_LUT_F32_TO_FXPANGLE(0.354482991540035),
435 IFX_LUT_F32_TO_FXPANGLE(0.355341622416168),
436 IFX_LUT_F32_TO_FXPANGLE(0.356199706465416),
437 IFX_LUT_F32_TO_FXPANGLE(0.357057242947567),
438 IFX_LUT_F32_TO_FXPANGLE(0.35791423112658),
439 IFX_LUT_F32_TO_FXPANGLE(0.358770670270572),
440 IFX_LUT_F32_TO_FXPANGLE(0.359626559651822),
441 IFX_LUT_F32_TO_FXPANGLE(0.360481898546763),
442 IFX_LUT_F32_TO_FXPANGLE(0.361336686235982),
443 IFX_LUT_F32_TO_FXPANGLE(0.362190922004212),
444 IFX_LUT_F32_TO_FXPANGLE(0.363044605140335),
445 IFX_LUT_F32_TO_FXPANGLE(0.363897734937373),
446 IFX_LUT_F32_TO_FXPANGLE(0.364750310692485),
447 IFX_LUT_F32_TO_FXPANGLE(0.365602331706967),
448 IFX_LUT_F32_TO_FXPANGLE(0.366453797286243),
449 IFX_LUT_F32_TO_FXPANGLE(0.367304706739864),
450 IFX_LUT_F32_TO_FXPANGLE(0.368155059381507),
451 IFX_LUT_F32_TO_FXPANGLE(0.369004854528964),
452 IFX_LUT_F32_TO_FXPANGLE(0.369854091504145),
453 IFX_LUT_F32_TO_FXPANGLE(0.370702769633069),
454 IFX_LUT_F32_TO_FXPANGLE(0.371550888245862),
455 IFX_LUT_F32_TO_FXPANGLE(0.372398446676754),
456 IFX_LUT_F32_TO_FXPANGLE(0.373245444264073),
457 IFX_LUT_F32_TO_FXPANGLE(0.374091880350239),
458 IFX_LUT_F32_TO_FXPANGLE(0.374937754281765),
459 IFX_LUT_F32_TO_FXPANGLE(0.375783065409249),
460 IFX_LUT_F32_TO_FXPANGLE(0.376627813087368),
461 IFX_LUT_F32_TO_FXPANGLE(0.377471996674877),
462 IFX_LUT_F32_TO_FXPANGLE(0.378315615534604),
463 IFX_LUT_F32_TO_FXPANGLE(0.379158669033442),
464 IFX_LUT_F32_TO_FXPANGLE(0.380001156542349),
465 IFX_LUT_F32_TO_FXPANGLE(0.380843077436342),
466 IFX_LUT_F32_TO_FXPANGLE(0.381684431094488),
467 IFX_LUT_F32_TO_FXPANGLE(0.382525216899905),
468 IFX_LUT_F32_TO_FXPANGLE(0.383365434239755),
469 IFX_LUT_F32_TO_FXPANGLE(0.384205082505239),
470 IFX_LUT_F32_TO_FXPANGLE(0.385044161091591),
471 IFX_LUT_F32_TO_FXPANGLE(0.385882669398074),
472 IFX_LUT_F32_TO_FXPANGLE(0.386720606827975),
473 IFX_LUT_F32_TO_FXPANGLE(0.387557972788602),
474 IFX_LUT_F32_TO_FXPANGLE(0.388394766691274),
475 IFX_LUT_F32_TO_FXPANGLE(0.389230987951321),
476 IFX_LUT_F32_TO_FXPANGLE(0.390066635988073),
477 IFX_LUT_F32_TO_FXPANGLE(0.390901710224862),
478 IFX_LUT_F32_TO_FXPANGLE(0.39173621008901),
479 IFX_LUT_F32_TO_FXPANGLE(0.392570135011829),
480 IFX_LUT_F32_TO_FXPANGLE(0.393403484428609),
481 IFX_LUT_F32_TO_FXPANGLE(0.394236257778621),
482 IFX_LUT_F32_TO_FXPANGLE(0.395068454505103),
483 IFX_LUT_F32_TO_FXPANGLE(0.395900074055263),
484 IFX_LUT_F32_TO_FXPANGLE(0.396731115880264),
485 IFX_LUT_F32_TO_FXPANGLE(0.397561579435227),
486 IFX_LUT_F32_TO_FXPANGLE(0.39839146417922),
487 IFX_LUT_F32_TO_FXPANGLE(0.399220769575253),
488 IFX_LUT_F32_TO_FXPANGLE(0.400049495090274),
489 IFX_LUT_F32_TO_FXPANGLE(0.400877640195163),
490 IFX_LUT_F32_TO_FXPANGLE(0.401705204364725),
491 IFX_LUT_F32_TO_FXPANGLE(0.402532187077683),
492 IFX_LUT_F32_TO_FXPANGLE(0.403358587816674),
493 IFX_LUT_F32_TO_FXPANGLE(0.404184406068245),
494 IFX_LUT_F32_TO_FXPANGLE(0.405009641322841),
495 IFX_LUT_F32_TO_FXPANGLE(0.405834293074804),
496 IFX_LUT_F32_TO_FXPANGLE(0.406658360822366),
497 IFX_LUT_F32_TO_FXPANGLE(0.407481844067642),
498 IFX_LUT_F32_TO_FXPANGLE(0.408304742316622),
499 IFX_LUT_F32_TO_FXPANGLE(0.409127055079168),
500 IFX_LUT_F32_TO_FXPANGLE(0.409948781869008),
501 IFX_LUT_F32_TO_FXPANGLE(0.410769922203726),
502 IFX_LUT_F32_TO_FXPANGLE(0.411590475604759),
503 IFX_LUT_F32_TO_FXPANGLE(0.412410441597387),
504 IFX_LUT_F32_TO_FXPANGLE(0.413229819710733),
505 IFX_LUT_F32_TO_FXPANGLE(0.414048609477749),
506 IFX_LUT_F32_TO_FXPANGLE(0.414866810435215),
507 IFX_LUT_F32_TO_FXPANGLE(0.415684422123729),
508 IFX_LUT_F32_TO_FXPANGLE(0.416501444087703),
509 IFX_LUT_F32_TO_FXPANGLE(0.417317875875355),
510 IFX_LUT_F32_TO_FXPANGLE(0.418133717038701),
511 IFX_LUT_F32_TO_FXPANGLE(0.418948967133553),
512 IFX_LUT_F32_TO_FXPANGLE(0.419763625719506),
513 IFX_LUT_F32_TO_FXPANGLE(0.420577692359935),
514 IFX_LUT_F32_TO_FXPANGLE(0.42139116662199),
515 IFX_LUT_F32_TO_FXPANGLE(0.422204048076584),
516 IFX_LUT_F32_TO_FXPANGLE(0.423016336298389),
517 IFX_LUT_F32_TO_FXPANGLE(0.423828030865831),
518 IFX_LUT_F32_TO_FXPANGLE(0.42463913136108),
519 IFX_LUT_F32_TO_FXPANGLE(0.425449637370042),
520 IFX_LUT_F32_TO_FXPANGLE(0.426259548482358),
521 IFX_LUT_F32_TO_FXPANGLE(0.427068864291389),
522 IFX_LUT_F32_TO_FXPANGLE(0.427877584394215),
523 IFX_LUT_F32_TO_FXPANGLE(0.428685708391626),
524 IFX_LUT_F32_TO_FXPANGLE(0.429493235888114),
525 IFX_LUT_F32_TO_FXPANGLE(0.430300166491866),
526 IFX_LUT_F32_TO_FXPANGLE(0.431106499814758),
527 IFX_LUT_F32_TO_FXPANGLE(0.431912235472348),
528 IFX_LUT_F32_TO_FXPANGLE(0.432717373083866),
529 IFX_LUT_F32_TO_FXPANGLE(0.433521912272209),
530 IFX_LUT_F32_TO_FXPANGLE(0.434325852663933),
531 IFX_LUT_F32_TO_FXPANGLE(0.435129193889247),
532 IFX_LUT_F32_TO_FXPANGLE(0.435931935582003),
533 IFX_LUT_F32_TO_FXPANGLE(0.43673407737969),
534 IFX_LUT_F32_TO_FXPANGLE(0.437535618923428),
535 IFX_LUT_F32_TO_FXPANGLE(0.438336559857958),
536 IFX_LUT_F32_TO_FXPANGLE(0.439136899831635),
537 IFX_LUT_F32_TO_FXPANGLE(0.439936638496422),
538 IFX_LUT_F32_TO_FXPANGLE(0.440735775507881),
539 IFX_LUT_F32_TO_FXPANGLE(0.441534310525167),
540 IFX_LUT_F32_TO_FXPANGLE(0.442332243211017),
541 IFX_LUT_F32_TO_FXPANGLE(0.443129573231746),
542 IFX_LUT_F32_TO_FXPANGLE(0.443926300257239),
543 IFX_LUT_F32_TO_FXPANGLE(0.444722423960939),
544 IFX_LUT_F32_TO_FXPANGLE(0.445517944019847),
545 IFX_LUT_F32_TO_FXPANGLE(0.446312860114506),
546 IFX_LUT_F32_TO_FXPANGLE(0.447107171928999),
547 IFX_LUT_F32_TO_FXPANGLE(0.447900879150937),
548 IFX_LUT_F32_TO_FXPANGLE(0.448693981471457),
549 IFX_LUT_F32_TO_FXPANGLE(0.449486478585208),
550 IFX_LUT_F32_TO_FXPANGLE(0.450278370190345),
551 IFX_LUT_F32_TO_FXPANGLE(0.451069655988523),
552 IFX_LUT_F32_TO_FXPANGLE(0.451860335684889),
553 IFX_LUT_F32_TO_FXPANGLE(0.452650408988071),
554 IFX_LUT_F32_TO_FXPANGLE(0.453439875610172),
555 IFX_LUT_F32_TO_FXPANGLE(0.454228735266762),
556 IFX_LUT_F32_TO_FXPANGLE(0.455016987676872),
557 IFX_LUT_F32_TO_FXPANGLE(0.45580463256298),
558 IFX_LUT_F32_TO_FXPANGLE(0.456591669651011),
559 IFX_LUT_F32_TO_FXPANGLE(0.457378098670321),
560 IFX_LUT_F32_TO_FXPANGLE(0.458163919353695),
561 IFX_LUT_F32_TO_FXPANGLE(0.458949131437335),
562 IFX_LUT_F32_TO_FXPANGLE(0.459733734660856),
563 IFX_LUT_F32_TO_FXPANGLE(0.460517728767271),
564 IFX_LUT_F32_TO_FXPANGLE(0.461301113502991),
565 IFX_LUT_F32_TO_FXPANGLE(0.46208388861781),
566 IFX_LUT_F32_TO_FXPANGLE(0.462866053864901),
567 IFX_LUT_F32_TO_FXPANGLE(0.463647609000806),
568 IFX_LUT_F32_TO_FXPANGLE(0.464428553785428),
569 IFX_LUT_F32_TO_FXPANGLE(0.465208887982023),
570 IFX_LUT_F32_TO_FXPANGLE(0.46598861135719),
571 IFX_LUT_F32_TO_FXPANGLE(0.466767723680866),
572 IFX_LUT_F32_TO_FXPANGLE(0.467546224726316),
573 IFX_LUT_F32_TO_FXPANGLE(0.468324114270123),
574 IFX_LUT_F32_TO_FXPANGLE(0.46910139209218),
575 IFX_LUT_F32_TO_FXPANGLE(0.469878057975687),
576 IFX_LUT_F32_TO_FXPANGLE(0.470654111707133),
577 IFX_LUT_F32_TO_FXPANGLE(0.471429553076297),
578 IFX_LUT_F32_TO_FXPANGLE(0.472204381876234),
579 IFX_LUT_F32_TO_FXPANGLE(0.472978597903266),
580 IFX_LUT_F32_TO_FXPANGLE(0.473752200956977),
581 IFX_LUT_F32_TO_FXPANGLE(0.474525190840205),
582 IFX_LUT_F32_TO_FXPANGLE(0.475297567359028),
583 IFX_LUT_F32_TO_FXPANGLE(0.476069330322761),
584 IFX_LUT_F32_TO_FXPANGLE(0.476840479543945),
585 IFX_LUT_F32_TO_FXPANGLE(0.477611014838337),
586 IFX_LUT_F32_TO_FXPANGLE(0.478380936024907),
587 IFX_LUT_F32_TO_FXPANGLE(0.479150242925823),
588 IFX_LUT_F32_TO_FXPANGLE(0.479918935366444),
589 IFX_LUT_F32_TO_FXPANGLE(0.480687013175316),
590 IFX_LUT_F32_TO_FXPANGLE(0.481454476184158),
591 IFX_LUT_F32_TO_FXPANGLE(0.482221324227854),
592 IFX_LUT_F32_TO_FXPANGLE(0.482987557144447),
593 IFX_LUT_F32_TO_FXPANGLE(0.48375317477513),
594 IFX_LUT_F32_TO_FXPANGLE(0.484518176964233),
595 IFX_LUT_F32_TO_FXPANGLE(0.485282563559221),
596 IFX_LUT_F32_TO_FXPANGLE(0.48604633441068),
597 IFX_LUT_F32_TO_FXPANGLE(0.48680948937231),
598 IFX_LUT_F32_TO_FXPANGLE(0.487572028300918),
599 IFX_LUT_F32_TO_FXPANGLE(0.488333951056406),
600 IFX_LUT_F32_TO_FXPANGLE(0.489095257501764),
601 IFX_LUT_F32_TO_FXPANGLE(0.489855947503062),
602 IFX_LUT_F32_TO_FXPANGLE(0.490616020929441),
603 IFX_LUT_F32_TO_FXPANGLE(0.491375477653102),
604 IFX_LUT_F32_TO_FXPANGLE(0.4921343175493),
605 IFX_LUT_F32_TO_FXPANGLE(0.492892540496335),
606 IFX_LUT_F32_TO_FXPANGLE(0.49365014637554),
607 IFX_LUT_F32_TO_FXPANGLE(0.494407135071275),
608 IFX_LUT_F32_TO_FXPANGLE(0.49516350647092),
609 IFX_LUT_F32_TO_FXPANGLE(0.495919260464861),
610 IFX_LUT_F32_TO_FXPANGLE(0.496674396946486),
611 IFX_LUT_F32_TO_FXPANGLE(0.497428915812172),
612 IFX_LUT_F32_TO_FXPANGLE(0.498182816961281),
613 IFX_LUT_F32_TO_FXPANGLE(0.498936100296146),
614 IFX_LUT_F32_TO_FXPANGLE(0.499688765722065),
615 IFX_LUT_F32_TO_FXPANGLE(0.500440813147294),
616 IFX_LUT_F32_TO_FXPANGLE(0.501192242483033),
617 IFX_LUT_F32_TO_FXPANGLE(0.501943053643421),
618 IFX_LUT_F32_TO_FXPANGLE(0.502693246545526),
619 IFX_LUT_F32_TO_FXPANGLE(0.503442821109336),
620 IFX_LUT_F32_TO_FXPANGLE(0.504191777257751),
621 IFX_LUT_F32_TO_FXPANGLE(0.504940114916572),
622 IFX_LUT_F32_TO_FXPANGLE(0.505687834014494),
623 IFX_LUT_F32_TO_FXPANGLE(0.506434934483097),
624 IFX_LUT_F32_TO_FXPANGLE(0.507181416256835),
625 IFX_LUT_F32_TO_FXPANGLE(0.50792727927303),
626 IFX_LUT_F32_TO_FXPANGLE(0.508672523471861),
627 IFX_LUT_F32_TO_FXPANGLE(0.509417148796356),
628 IFX_LUT_F32_TO_FXPANGLE(0.510161155192383),
629 IFX_LUT_F32_TO_FXPANGLE(0.51090454260864),
630 IFX_LUT_F32_TO_FXPANGLE(0.511647310996647),
631 IFX_LUT_F32_TO_FXPANGLE(0.512389460310738),
632 IFX_LUT_F32_TO_FXPANGLE(0.513130990508049),
633 IFX_LUT_F32_TO_FXPANGLE(0.513871901548512),
634 IFX_LUT_F32_TO_FXPANGLE(0.514612193394845),
635 IFX_LUT_F32_TO_FXPANGLE(0.515351866012543),
636 IFX_LUT_F32_TO_FXPANGLE(0.51609091936987),
637 IFX_LUT_F32_TO_FXPANGLE(0.516829353437846),
638 IFX_LUT_F32_TO_FXPANGLE(0.517567168190245),
639 IFX_LUT_F32_TO_FXPANGLE(0.518304363603578),
640 IFX_LUT_F32_TO_FXPANGLE(0.519040939657092),
641 IFX_LUT_F32_TO_FXPANGLE(0.519776896332754),
642 IFX_LUT_F32_TO_FXPANGLE(0.520512233615247),
643 IFX_LUT_F32_TO_FXPANGLE(0.521246951491958),
644 IFX_LUT_F32_TO_FXPANGLE(0.521981049952972),
645 IFX_LUT_F32_TO_FXPANGLE(0.522714528991058),
646 IFX_LUT_F32_TO_FXPANGLE(0.523447388601666),
647 IFX_LUT_F32_TO_FXPANGLE(0.524179628782913),
648 IFX_LUT_F32_TO_FXPANGLE(0.524911249535579),
649 IFX_LUT_F32_TO_FXPANGLE(0.525642250863092),
650 IFX_LUT_F32_TO_FXPANGLE(0.526372632771524),
651 IFX_LUT_F32_TO_FXPANGLE(0.52710239526958),
652 IFX_LUT_F32_TO_FXPANGLE(0.527831538368588),
653 IFX_LUT_F32_TO_FXPANGLE(0.528560062082493),
654 IFX_LUT_F32_TO_FXPANGLE(0.529287966427846),
655 IFX_LUT_F32_TO_FXPANGLE(0.530015251423793),
656 IFX_LUT_F32_TO_FXPANGLE(0.530741917092071),
657 IFX_LUT_F32_TO_FXPANGLE(0.531467963456995),
658 IFX_LUT_F32_TO_FXPANGLE(0.53219339054545),
659 IFX_LUT_F32_TO_FXPANGLE(0.532918198386882),
660 IFX_LUT_F32_TO_FXPANGLE(0.533642387013291),
661 IFX_LUT_F32_TO_FXPANGLE(0.534365956459219),
662 IFX_LUT_F32_TO_FXPANGLE(0.535088906761743),
663 IFX_LUT_F32_TO_FXPANGLE(0.535811237960464),
664 IFX_LUT_F32_TO_FXPANGLE(0.5365329500975),
665 IFX_LUT_F32_TO_FXPANGLE(0.537254043217479),
666 IFX_LUT_F32_TO_FXPANGLE(0.537974517367523),
667 IFX_LUT_F32_TO_FXPANGLE(0.538694372597247),
668 IFX_LUT_F32_TO_FXPANGLE(0.539413608958744),
669 IFX_LUT_F32_TO_FXPANGLE(0.540132226506582),
670 IFX_LUT_F32_TO_FXPANGLE(0.540850225297788),
671 IFX_LUT_F32_TO_FXPANGLE(0.541567605391845),
672 IFX_LUT_F32_TO_FXPANGLE(0.542284366850679),
673 IFX_LUT_F32_TO_FXPANGLE(0.543000509738655),
674 IFX_LUT_F32_TO_FXPANGLE(0.54371603412256),
675 IFX_LUT_F32_TO_FXPANGLE(0.544430940071603),
676 IFX_LUT_F32_TO_FXPANGLE(0.545145227657401),
677 IFX_LUT_F32_TO_FXPANGLE(0.54585889695397),
678 IFX_LUT_F32_TO_FXPANGLE(0.546571948037719),
679 IFX_LUT_F32_TO_FXPANGLE(0.547284380987437),
680 IFX_LUT_F32_TO_FXPANGLE(0.547996195884288),
681 IFX_LUT_F32_TO_FXPANGLE(0.548707392811801),
682 IFX_LUT_F32_TO_FXPANGLE(0.549417971855859),
683 IFX_LUT_F32_TO_FXPANGLE(0.550127933104693),
684 IFX_LUT_F32_TO_FXPANGLE(0.55083727664887),
685 IFX_LUT_F32_TO_FXPANGLE(0.551546002581289),
686 IFX_LUT_F32_TO_FXPANGLE(0.552254110997165),
687 IFX_LUT_F32_TO_FXPANGLE(0.552961601994028),
688 IFX_LUT_F32_TO_FXPANGLE(0.553668475671709),
689 IFX_LUT_F32_TO_FXPANGLE(0.554374732132331),
690 IFX_LUT_F32_TO_FXPANGLE(0.555080371480305),
691 IFX_LUT_F32_TO_FXPANGLE(0.555785393822314),
692 IFX_LUT_F32_TO_FXPANGLE(0.55648979926731),
693 IFX_LUT_F32_TO_FXPANGLE(0.557193587926504),
694 IFX_LUT_F32_TO_FXPANGLE(0.557896759913355),
695 IFX_LUT_F32_TO_FXPANGLE(0.558599315343562),
696 IFX_LUT_F32_TO_FXPANGLE(0.559301254335059),
697 IFX_LUT_F32_TO_FXPANGLE(0.560002577007999),
698 IFX_LUT_F32_TO_FXPANGLE(0.560703283484751),
699 IFX_LUT_F32_TO_FXPANGLE(0.561403373889889),
700 IFX_LUT_F32_TO_FXPANGLE(0.562102848350186),
701 IFX_LUT_F32_TO_FXPANGLE(0.562801706994599),
702 IFX_LUT_F32_TO_FXPANGLE(0.563499949954267),
703 IFX_LUT_F32_TO_FXPANGLE(0.564197577362498),
704 IFX_LUT_F32_TO_FXPANGLE(0.564894589354762),
705 IFX_LUT_F32_TO_FXPANGLE(0.565590986068683),
706 IFX_LUT_F32_TO_FXPANGLE(0.566286767644028),
707 IFX_LUT_F32_TO_FXPANGLE(0.5669819342227),
708 IFX_LUT_F32_TO_FXPANGLE(0.56767648594873),
709 IFX_LUT_F32_TO_FXPANGLE(0.568370422968264),
710 IFX_LUT_F32_TO_FXPANGLE(0.569063745429561),
711 IFX_LUT_F32_TO_FXPANGLE(0.569756453482978),
712 IFX_LUT_F32_TO_FXPANGLE(0.570448547280968),
713 IFX_LUT_F32_TO_FXPANGLE(0.571140026978063),
714 IFX_LUT_F32_TO_FXPANGLE(0.571830892730873),
715 IFX_LUT_F32_TO_FXPANGLE(0.572521144698072),
716 IFX_LUT_F32_TO_FXPANGLE(0.573210783040395),
717 IFX_LUT_F32_TO_FXPANGLE(0.573899807920624),
718 IFX_LUT_F32_TO_FXPANGLE(0.57458821950358),
719 IFX_LUT_F32_TO_FXPANGLE(0.575276017956118),
720 IFX_LUT_F32_TO_FXPANGLE(0.575963203447116),
721 IFX_LUT_F32_TO_FXPANGLE(0.576649776147467),
722 IFX_LUT_F32_TO_FXPANGLE(0.577335736230069),
723 IFX_LUT_F32_TO_FXPANGLE(0.57802108386982),
724 IFX_LUT_F32_TO_FXPANGLE(0.578705819243603),
725 IFX_LUT_F32_TO_FXPANGLE(0.579389942530287),
726 IFX_LUT_F32_TO_FXPANGLE(0.580073453910708),
727 IFX_LUT_F32_TO_FXPANGLE(0.58075635356767),
728 IFX_LUT_F32_TO_FXPANGLE(0.58143864168593),
729 IFX_LUT_F32_TO_FXPANGLE(0.582120318452191),
730 IFX_LUT_F32_TO_FXPANGLE(0.582801384055095),
731 IFX_LUT_F32_TO_FXPANGLE(0.583481838685215),
732 IFX_LUT_F32_TO_FXPANGLE(0.584161682535044),
733 IFX_LUT_F32_TO_FXPANGLE(0.584840915798988),
734 IFX_LUT_F32_TO_FXPANGLE(0.585519538673358),
735 IFX_LUT_F32_TO_FXPANGLE(0.586197551356361),
736 IFX_LUT_F32_TO_FXPANGLE(0.586874954048091),
737 IFX_LUT_F32_TO_FXPANGLE(0.587551746950524),
738 IFX_LUT_F32_TO_FXPANGLE(0.588227930267504),
739 IFX_LUT_F32_TO_FXPANGLE(0.588903504204738),
740 IFX_LUT_F32_TO_FXPANGLE(0.58957846896979),
741 IFX_LUT_F32_TO_FXPANGLE(0.590252824772067),
742 IFX_LUT_F32_TO_FXPANGLE(0.590926571822816),
743 IFX_LUT_F32_TO_FXPANGLE(0.591599710335111),
744 IFX_LUT_F32_TO_FXPANGLE(0.592272240523851),
745 IFX_LUT_F32_TO_FXPANGLE(0.592944162605743),
746 IFX_LUT_F32_TO_FXPANGLE(0.593615476799303),
747 IFX_LUT_F32_TO_FXPANGLE(0.594286183324841),
748 IFX_LUT_F32_TO_FXPANGLE(0.594956282404456),
749 IFX_LUT_F32_TO_FXPANGLE(0.595625774262027),
750 IFX_LUT_F32_TO_FXPANGLE(0.596294659123204),
751 IFX_LUT_F32_TO_FXPANGLE(0.596962937215402),
752 IFX_LUT_F32_TO_FXPANGLE(0.597630608767789),
753 IFX_LUT_F32_TO_FXPANGLE(0.598297674011284),
754 IFX_LUT_F32_TO_FXPANGLE(0.598964133178543),
755 IFX_LUT_F32_TO_FXPANGLE(0.599629986503951),
756 IFX_LUT_F32_TO_FXPANGLE(0.600295234223621),
757 IFX_LUT_F32_TO_FXPANGLE(0.600959876575375),
758 IFX_LUT_F32_TO_FXPANGLE(0.601623913798746),
759 IFX_LUT_F32_TO_FXPANGLE(0.602287346134964),
760 IFX_LUT_F32_TO_FXPANGLE(0.60295017382695),
761 IFX_LUT_F32_TO_FXPANGLE(0.603612397119307),
762 IFX_LUT_F32_TO_FXPANGLE(0.604274016258314),
763 IFX_LUT_F32_TO_FXPANGLE(0.604935031491914),
764 IFX_LUT_F32_TO_FXPANGLE(0.605595443069711),
765 IFX_LUT_F32_TO_FXPANGLE(0.606255251242958),
766 IFX_LUT_F32_TO_FXPANGLE(0.606914456264552),
767 IFX_LUT_F32_TO_FXPANGLE(0.607573058389022),
768 IFX_LUT_F32_TO_FXPANGLE(0.608231057872528),
769 IFX_LUT_F32_TO_FXPANGLE(0.608888454972845),
770 IFX_LUT_F32_TO_FXPANGLE(0.609545249949361),
771 IFX_LUT_F32_TO_FXPANGLE(0.610201443063065),
772 IFX_LUT_F32_TO_FXPANGLE(0.610857034576544),
773 IFX_LUT_F32_TO_FXPANGLE(0.611512024753969),
774 IFX_LUT_F32_TO_FXPANGLE(0.612166413861094),
775 IFX_LUT_F32_TO_FXPANGLE(0.612820202165241),
776 IFX_LUT_F32_TO_FXPANGLE(0.613473389935299),
777 IFX_LUT_F32_TO_FXPANGLE(0.614125977441711),
778 IFX_LUT_F32_TO_FXPANGLE(0.614777964956469),
779 IFX_LUT_F32_TO_FXPANGLE(0.615429352753105),
780 IFX_LUT_F32_TO_FXPANGLE(0.616080141106684),
781 IFX_LUT_F32_TO_FXPANGLE(0.616730330293797),
782 IFX_LUT_F32_TO_FXPANGLE(0.617379920592551),
783 IFX_LUT_F32_TO_FXPANGLE(0.618028912282562),
784 IFX_LUT_F32_TO_FXPANGLE(0.61867730564495),
785 IFX_LUT_F32_TO_FXPANGLE(0.619325100962327),
786 IFX_LUT_F32_TO_FXPANGLE(0.619972298518794),
787 IFX_LUT_F32_TO_FXPANGLE(0.620618898599929),
788 IFX_LUT_F32_TO_FXPANGLE(0.621264901492783),
789 IFX_LUT_F32_TO_FXPANGLE(0.621910307485869),
790 IFX_LUT_F32_TO_FXPANGLE(0.622555116869157),
791 IFX_LUT_F32_TO_FXPANGLE(0.623199329934066),
792 IFX_LUT_F32_TO_FXPANGLE(0.623842946973455),
793 IFX_LUT_F32_TO_FXPANGLE(0.624485968281619),
794 IFX_LUT_F32_TO_FXPANGLE(0.625128394154276),
795 IFX_LUT_F32_TO_FXPANGLE(0.625770224888563),
796 IFX_LUT_F32_TO_FXPANGLE(0.626411460783031),
797 IFX_LUT_F32_TO_FXPANGLE(0.62705210213763),
798 IFX_LUT_F32_TO_FXPANGLE(0.627692149253711),
799 IFX_LUT_F32_TO_FXPANGLE(0.62833160243401),
800 IFX_LUT_F32_TO_FXPANGLE(0.628970461982645),
801 IFX_LUT_F32_TO_FXPANGLE(0.62960872820511),
802 IFX_LUT_F32_TO_FXPANGLE(0.630246401408263),
803 IFX_LUT_F32_TO_FXPANGLE(0.630883481900322),
804 IFX_LUT_F32_TO_FXPANGLE(0.631519969990857),
805 IFX_LUT_F32_TO_FXPANGLE(0.632155865990784),
806 IFX_LUT_F32_TO_FXPANGLE(0.632791170212352),
807 IFX_LUT_F32_TO_FXPANGLE(0.633425882969145),
808 IFX_LUT_F32_TO_FXPANGLE(0.634060004576065),
809 IFX_LUT_F32_TO_FXPANGLE(0.634693535349333),
810 IFX_LUT_F32_TO_FXPANGLE(0.635326475606475),
811 IFX_LUT_F32_TO_FXPANGLE(0.635958825666321),
812 IFX_LUT_F32_TO_FXPANGLE(0.636590585848993),
813 IFX_LUT_F32_TO_FXPANGLE(0.637221756475899),
814 IFX_LUT_F32_TO_FXPANGLE(0.637852337869727),
815 IFX_LUT_F32_TO_FXPANGLE(0.638482330354438),
816 IFX_LUT_F32_TO_FXPANGLE(0.639111734255255),
817 IFX_LUT_F32_TO_FXPANGLE(0.639740549898664),
818 IFX_LUT_F32_TO_FXPANGLE(0.640368777612397),
819 IFX_LUT_F32_TO_FXPANGLE(0.640996417725432),
820 IFX_LUT_F32_TO_FXPANGLE(0.641623470567984),
821 IFX_LUT_F32_TO_FXPANGLE(0.642249936471496),
822 IFX_LUT_F32_TO_FXPANGLE(0.642875815768636),
823 IFX_LUT_F32_TO_FXPANGLE(0.643501108793284),
824 IFX_LUT_F32_TO_FXPANGLE(0.644125815880533),
825 IFX_LUT_F32_TO_FXPANGLE(0.644749937366675),
826 IFX_LUT_F32_TO_FXPANGLE(0.645373473589196),
827 IFX_LUT_F32_TO_FXPANGLE(0.645996424886772),
828 IFX_LUT_F32_TO_FXPANGLE(0.646618791599258),
829 IFX_LUT_F32_TO_FXPANGLE(0.647240574067683),
830 IFX_LUT_F32_TO_FXPANGLE(0.647861772634245),
831 IFX_LUT_F32_TO_FXPANGLE(0.648482387642301),
832 IFX_LUT_F32_TO_FXPANGLE(0.649102419436359),
833 IFX_LUT_F32_TO_FXPANGLE(0.649721868362078),
834 IFX_LUT_F32_TO_FXPANGLE(0.650340734766252),
835 IFX_LUT_F32_TO_FXPANGLE(0.650959018996812),
836 IFX_LUT_F32_TO_FXPANGLE(0.651576721402813),
837 IFX_LUT_F32_TO_FXPANGLE(0.652193842334429),
838 IFX_LUT_F32_TO_FXPANGLE(0.652810382142948),
839 IFX_LUT_F32_TO_FXPANGLE(0.653426341180762),
840 IFX_LUT_F32_TO_FXPANGLE(0.654041719801364),
841 IFX_LUT_F32_TO_FXPANGLE(0.65465651835934),
842 IFX_LUT_F32_TO_FXPANGLE(0.655270737210358),
843 IFX_LUT_F32_TO_FXPANGLE(0.655884376711171),
844 IFX_LUT_F32_TO_FXPANGLE(0.656497437219599),
845 IFX_LUT_F32_TO_FXPANGLE(0.657109919094532),
846 IFX_LUT_F32_TO_FXPANGLE(0.657721822695918),
847 IFX_LUT_F32_TO_FXPANGLE(0.658333148384756),
848 IFX_LUT_F32_TO_FXPANGLE(0.658943896523094),
849 IFX_LUT_F32_TO_FXPANGLE(0.659554067474019),
850 IFX_LUT_F32_TO_FXPANGLE(0.660163661601649),
851 IFX_LUT_F32_TO_FXPANGLE(0.660772679271133),
852 IFX_LUT_F32_TO_FXPANGLE(0.661381120848635),
853 IFX_LUT_F32_TO_FXPANGLE(0.661988986701338),
854 IFX_LUT_F32_TO_FXPANGLE(0.662596277197427),
855 IFX_LUT_F32_TO_FXPANGLE(0.663202992706093),
856 IFX_LUT_F32_TO_FXPANGLE(0.663809133597518),
857 IFX_LUT_F32_TO_FXPANGLE(0.664414700242873),
858 IFX_LUT_F32_TO_FXPANGLE(0.665019693014312),
859 IFX_LUT_F32_TO_FXPANGLE(0.665624112284961),
860 IFX_LUT_F32_TO_FXPANGLE(0.666227958428919),
861 IFX_LUT_F32_TO_FXPANGLE(0.666831231821246),
862 IFX_LUT_F32_TO_FXPANGLE(0.667433932837957),
863 IFX_LUT_F32_TO_FXPANGLE(0.66803606185602),
864 IFX_LUT_F32_TO_FXPANGLE(0.668637619253345),
865 IFX_LUT_F32_TO_FXPANGLE(0.66923860540878),
866 IFX_LUT_F32_TO_FXPANGLE(0.669839020702103),
867 IFX_LUT_F32_TO_FXPANGLE(0.670438865514021),
868 IFX_LUT_F32_TO_FXPANGLE(0.671038140226157),
869 IFX_LUT_F32_TO_FXPANGLE(0.671636845221047),
870 IFX_LUT_F32_TO_FXPANGLE(0.672234980882134),
871 IFX_LUT_F32_TO_FXPANGLE(0.672832547593763),
872 IFX_LUT_F32_TO_FXPANGLE(0.673429545741172),
873 IFX_LUT_F32_TO_FXPANGLE(0.674025975710487),
874 IFX_LUT_F32_TO_FXPANGLE(0.674621837888718),
875 IFX_LUT_F32_TO_FXPANGLE(0.67521713266375),
876 IFX_LUT_F32_TO_FXPANGLE(0.675811860424338),
877 IFX_LUT_F32_TO_FXPANGLE(0.676406021560103),
878 IFX_LUT_F32_TO_FXPANGLE(0.676999616461522),
879 IFX_LUT_F32_TO_FXPANGLE(0.677592645519925),
880 IFX_LUT_F32_TO_FXPANGLE(0.678185109127489),
881 IFX_LUT_F32_TO_FXPANGLE(0.678777007677231),
882 IFX_LUT_F32_TO_FXPANGLE(0.679368341563002),
883 IFX_LUT_F32_TO_FXPANGLE(0.679959111179482),
884 IFX_LUT_F32_TO_FXPANGLE(0.680549316922172),
885 IFX_LUT_F32_TO_FXPANGLE(0.681138959187393),
886 IFX_LUT_F32_TO_FXPANGLE(0.681728038372273),
887 IFX_LUT_F32_TO_FXPANGLE(0.682316554874748),
888 IFX_LUT_F32_TO_FXPANGLE(0.682904509093552),
889 IFX_LUT_F32_TO_FXPANGLE(0.683491901428213),
890 IFX_LUT_F32_TO_FXPANGLE(0.684078732279046),
891 IFX_LUT_F32_TO_FXPANGLE(0.684665002047149),
892 IFX_LUT_F32_TO_FXPANGLE(0.685250711134394),
893 IFX_LUT_F32_TO_FXPANGLE(0.685835859943427),
894 IFX_LUT_F32_TO_FXPANGLE(0.686420448877654),
895 IFX_LUT_F32_TO_FXPANGLE(0.687004478341245),
896 IFX_LUT_F32_TO_FXPANGLE(0.68758794873912),
897 IFX_LUT_F32_TO_FXPANGLE(0.688170860476949),
898 IFX_LUT_F32_TO_FXPANGLE(0.688753213961141),
899 IFX_LUT_F32_TO_FXPANGLE(0.689335009598846),
900 IFX_LUT_F32_TO_FXPANGLE(0.689916247797941),
901 IFX_LUT_F32_TO_FXPANGLE(0.69049692896703),
902 IFX_LUT_F32_TO_FXPANGLE(0.691077053515437),
903 IFX_LUT_F32_TO_FXPANGLE(0.6916566218532),
904 IFX_LUT_F32_TO_FXPANGLE(0.692235634391065),
905 IFX_LUT_F32_TO_FXPANGLE(0.692814091540483),
906 IFX_LUT_F32_TO_FXPANGLE(0.693391993713601),
907 IFX_LUT_F32_TO_FXPANGLE(0.69396934132326),
908 IFX_LUT_F32_TO_FXPANGLE(0.694546134782985),
909 IFX_LUT_F32_TO_FXPANGLE(0.695122374506987),
910 IFX_LUT_F32_TO_FXPANGLE(0.695698060910148),
911 IFX_LUT_F32_TO_FXPANGLE(0.696273194408024),
912 IFX_LUT_F32_TO_FXPANGLE(0.696847775416835),
913 IFX_LUT_F32_TO_FXPANGLE(0.697421804353461),
914 IFX_LUT_F32_TO_FXPANGLE(0.697995281635439),
915 IFX_LUT_F32_TO_FXPANGLE(0.69856820768095),
916 IFX_LUT_F32_TO_FXPANGLE(0.699140582908824),
917 IFX_LUT_F32_TO_FXPANGLE(0.699712407738527),
918 IFX_LUT_F32_TO_FXPANGLE(0.70028368259016),
919 IFX_LUT_F32_TO_FXPANGLE(0.70085440788445),
920 IFX_LUT_F32_TO_FXPANGLE(0.70142458404275),
921 IFX_LUT_F32_TO_FXPANGLE(0.701994211487028),
922 IFX_LUT_F32_TO_FXPANGLE(0.702563290639866),
923 IFX_LUT_F32_TO_FXPANGLE(0.703131821924454),
924 IFX_LUT_F32_TO_FXPANGLE(0.703699805764582),
925 IFX_LUT_F32_TO_FXPANGLE(0.704267242584639),
926 IFX_LUT_F32_TO_FXPANGLE(0.704834132809605),
927 IFX_LUT_F32_TO_FXPANGLE(0.705400476865049),
928 IFX_LUT_F32_TO_FXPANGLE(0.705966275177119),
929 IFX_LUT_F32_TO_FXPANGLE(0.706531528172541),
930 IFX_LUT_F32_TO_FXPANGLE(0.707096236278612),
931 IFX_LUT_F32_TO_FXPANGLE(0.707660399923198),
932 IFX_LUT_F32_TO_FXPANGLE(0.708224019534724),
933 IFX_LUT_F32_TO_FXPANGLE(0.708787095542173),
934 IFX_LUT_F32_TO_FXPANGLE(0.70934962837508),
935 IFX_LUT_F32_TO_FXPANGLE(0.709911618463525),
936 IFX_LUT_F32_TO_FXPANGLE(0.710473066238132),
937 IFX_LUT_F32_TO_FXPANGLE(0.711033972130061),
938 IFX_LUT_F32_TO_FXPANGLE(0.711594336571003),
939 IFX_LUT_F32_TO_FXPANGLE(0.712154159993179),
940 IFX_LUT_F32_TO_FXPANGLE(0.712713442829328),
941 IFX_LUT_F32_TO_FXPANGLE(0.713272185512711),
942 IFX_LUT_F32_TO_FXPANGLE(0.713830388477098),
943 IFX_LUT_F32_TO_FXPANGLE(0.714388052156769),
944 IFX_LUT_F32_TO_FXPANGLE(0.714945176986506),
945 IFX_LUT_F32_TO_FXPANGLE(0.715501763401588),
946 IFX_LUT_F32_TO_FXPANGLE(0.71605781183779),
947 IFX_LUT_F32_TO_FXPANGLE(0.716613322731375),
948 IFX_LUT_F32_TO_FXPANGLE(0.717168296519088),
949 IFX_LUT_F32_TO_FXPANGLE(0.717722733638155),
950 IFX_LUT_F32_TO_FXPANGLE(0.718276634526277),
951 IFX_LUT_F32_TO_FXPANGLE(0.718829999621625),
952 IFX_LUT_F32_TO_FXPANGLE(0.719382829362832),
953 IFX_LUT_F32_TO_FXPANGLE(0.719935124188996),
954 IFX_LUT_F32_TO_FXPANGLE(0.720486884539668),
955 IFX_LUT_F32_TO_FXPANGLE(0.721038110854852),
956 IFX_LUT_F32_TO_FXPANGLE(0.721588803574998),
957 IFX_LUT_F32_TO_FXPANGLE(0.722138963140998),
958 IFX_LUT_F32_TO_FXPANGLE(0.722688589994184),
959 IFX_LUT_F32_TO_FXPANGLE(0.723237684576318),
960 IFX_LUT_F32_TO_FXPANGLE(0.723786247329592),
961 IFX_LUT_F32_TO_FXPANGLE(0.724334278696622),
962 IFX_LUT_F32_TO_FXPANGLE(0.724881779120445),
963 IFX_LUT_F32_TO_FXPANGLE(0.725428749044511),
964 IFX_LUT_F32_TO_FXPANGLE(0.725975188912682),
965 IFX_LUT_F32_TO_FXPANGLE(0.726521099169226),
966 IFX_LUT_F32_TO_FXPANGLE(0.727066480258813),
967 IFX_LUT_F32_TO_FXPANGLE(0.727611332626511),
968 IFX_LUT_F32_TO_FXPANGLE(0.72815565671778),
969 IFX_LUT_F32_TO_FXPANGLE(0.72869945297847),
970 IFX_LUT_F32_TO_FXPANGLE(0.729242721854815),
971 IFX_LUT_F32_TO_FXPANGLE(0.729785463793429),
972 IFX_LUT_F32_TO_FXPANGLE(0.730327679241302),
973 IFX_LUT_F32_TO_FXPANGLE(0.730869368645794),
974 IFX_LUT_F32_TO_FXPANGLE(0.731410532454635),
975 IFX_LUT_F32_TO_FXPANGLE(0.731951171115917),
976 IFX_LUT_F32_TO_FXPANGLE(0.732491285078088),
977 IFX_LUT_F32_TO_FXPANGLE(0.733030874789955),
978 IFX_LUT_F32_TO_FXPANGLE(0.733569940700672),
979 IFX_LUT_F32_TO_FXPANGLE(0.73410848325974),
980 IFX_LUT_F32_TO_FXPANGLE(0.734646502917002),
981 IFX_LUT_F32_TO_FXPANGLE(0.73518400012264),
982 IFX_LUT_F32_TO_FXPANGLE(0.735720975327167),
983 IFX_LUT_F32_TO_FXPANGLE(0.736257428981428),
984 IFX_LUT_F32_TO_FXPANGLE(0.736793361536592),
985 IFX_LUT_F32_TO_FXPANGLE(0.737328773444149),
986 IFX_LUT_F32_TO_FXPANGLE(0.737863665155908),
987 IFX_LUT_F32_TO_FXPANGLE(0.73839803712399),
988 IFX_LUT_F32_TO_FXPANGLE(0.738931889800823),
989 IFX_LUT_F32_TO_FXPANGLE(0.739465223639145),
990 IFX_LUT_F32_TO_FXPANGLE(0.73999803909199),
991 IFX_LUT_F32_TO_FXPANGLE(0.740530336612693),
992 IFX_LUT_F32_TO_FXPANGLE(0.741062116654879),
993 IFX_LUT_F32_TO_FXPANGLE(0.741593379672465),
994 IFX_LUT_F32_TO_FXPANGLE(0.74212412611965),
995 IFX_LUT_F32_TO_FXPANGLE(0.742654356450918),
996 IFX_LUT_F32_TO_FXPANGLE(0.743184071121027),
997 IFX_LUT_F32_TO_FXPANGLE(0.74371327058501),
998 IFX_LUT_F32_TO_FXPANGLE(0.74424195529817),
999 IFX_LUT_F32_TO_FXPANGLE(0.744770125716075),
1000 IFX_LUT_F32_TO_FXPANGLE(0.745297782294555),
1001 IFX_LUT_F32_TO_FXPANGLE(0.745824925489697),
1002 IFX_LUT_F32_TO_FXPANGLE(0.746351555757843),
1003 IFX_LUT_F32_TO_FXPANGLE(0.746877673555588),
1004 IFX_LUT_F32_TO_FXPANGLE(0.747403279339768),
1005 IFX_LUT_F32_TO_FXPANGLE(0.747928373567467),
1006 IFX_LUT_F32_TO_FXPANGLE(0.748452956696006),
1007 IFX_LUT_F32_TO_FXPANGLE(0.748977029182941),
1008 IFX_LUT_F32_TO_FXPANGLE(0.749500591486061),
1009 IFX_LUT_F32_TO_FXPANGLE(0.750023644063381),
1010 IFX_LUT_F32_TO_FXPANGLE(0.750546187373141),
1011 IFX_LUT_F32_TO_FXPANGLE(0.751068221873802),
1012 IFX_LUT_F32_TO_FXPANGLE(0.751589748024043),
1013 IFX_LUT_F32_TO_FXPANGLE(0.752110766282754),
1014 IFX_LUT_F32_TO_FXPANGLE(0.752631277109036),
1015 IFX_LUT_F32_TO_FXPANGLE(0.753151280962194),
1016 IFX_LUT_F32_TO_FXPANGLE(0.75367077830174),
1017 IFX_LUT_F32_TO_FXPANGLE(0.754189769587379),
1018 IFX_LUT_F32_TO_FXPANGLE(0.754708255279016),
1019 IFX_LUT_F32_TO_FXPANGLE(0.755226235836745),
1020 IFX_LUT_F32_TO_FXPANGLE(0.755743711720849),
1021 IFX_LUT_F32_TO_FXPANGLE(0.756260683391796),
1022 IFX_LUT_F32_TO_FXPANGLE(0.756777151310235),
1023 IFX_LUT_F32_TO_FXPANGLE(0.757293115936992),
1024 IFX_LUT_F32_TO_FXPANGLE(0.757808577733069),
1025 IFX_LUT_F32_TO_FXPANGLE(0.758323537159635),
1026 IFX_LUT_F32_TO_FXPANGLE(0.758837994678031),
1027 IFX_LUT_F32_TO_FXPANGLE(0.759351950749758),
1028 IFX_LUT_F32_TO_FXPANGLE(0.75986540583648),
1029 IFX_LUT_F32_TO_FXPANGLE(0.760378360400016),
1030 IFX_LUT_F32_TO_FXPANGLE(0.760890814902341),
1031 IFX_LUT_F32_TO_FXPANGLE(0.761402769805578),
1032 IFX_LUT_F32_TO_FXPANGLE(0.761914225571999),
1033 IFX_LUT_F32_TO_FXPANGLE(0.762425182664017),
1034 IFX_LUT_F32_TO_FXPANGLE(0.762935641544187),
1035 IFX_LUT_F32_TO_FXPANGLE(0.763445602675202),
1036 IFX_LUT_F32_TO_FXPANGLE(0.763955066519886),
1037 IFX_LUT_F32_TO_FXPANGLE(0.764464033541195),
1038 IFX_LUT_F32_TO_FXPANGLE(0.764972504202212),
1039 IFX_LUT_F32_TO_FXPANGLE(0.765480478966144),
1040 IFX_LUT_F32_TO_FXPANGLE(0.765987958296319),
1041 IFX_LUT_F32_TO_FXPANGLE(0.766494942656179),
1042 IFX_LUT_F32_TO_FXPANGLE(0.767001432509286),
1043 IFX_LUT_F32_TO_FXPANGLE(0.767507428319308),
1044 IFX_LUT_F32_TO_FXPANGLE(0.768012930550024),
1045 IFX_LUT_F32_TO_FXPANGLE(0.768517939665315),
1046 IFX_LUT_F32_TO_FXPANGLE(0.769022456129166),
1047 IFX_LUT_F32_TO_FXPANGLE(0.769526480405658),
1048 IFX_LUT_F32_TO_FXPANGLE(0.77003001295897),
1049 IFX_LUT_F32_TO_FXPANGLE(0.770533054253371),
1050 IFX_LUT_F32_TO_FXPANGLE(0.771035604753219),
1051 IFX_LUT_F32_TO_FXPANGLE(0.77153766492296),
1052 IFX_LUT_F32_TO_FXPANGLE(0.77203923522712),
1053 IFX_LUT_F32_TO_FXPANGLE(0.772540316130307),
1054 IFX_LUT_F32_TO_FXPANGLE(0.773040908097206),
1055 IFX_LUT_F32_TO_FXPANGLE(0.773541011592573),
1056 IFX_LUT_F32_TO_FXPANGLE(0.774040627081239),
1057 IFX_LUT_F32_TO_FXPANGLE(0.7745397550281),
1058 IFX_LUT_F32_TO_FXPANGLE(0.775038395898116),
1059 IFX_LUT_F32_TO_FXPANGLE(0.775536550156312),
1060 IFX_LUT_F32_TO_FXPANGLE(0.776034218267768),
1061 IFX_LUT_F32_TO_FXPANGLE(0.776531400697624),
1062 IFX_LUT_F32_TO_FXPANGLE(0.77702809791107),
1063 IFX_LUT_F32_TO_FXPANGLE(0.777524310373348),
1064 IFX_LUT_F32_TO_FXPANGLE(0.778020038549745),
1065 IFX_LUT_F32_TO_FXPANGLE(0.778515282905595),
1066 IFX_LUT_F32_TO_FXPANGLE(0.779010043906271),
1067 IFX_LUT_F32_TO_FXPANGLE(0.779504322017186),
1068 IFX_LUT_F32_TO_FXPANGLE(0.77999811770379),
1069 IFX_LUT_F32_TO_FXPANGLE(0.780491431431562),
1070 IFX_LUT_F32_TO_FXPANGLE(0.780984263666015),
1071 IFX_LUT_F32_TO_FXPANGLE(0.781476614872688),
1072 IFX_LUT_F32_TO_FXPANGLE(0.781968485517144),
1073 IFX_LUT_F32_TO_FXPANGLE(0.782459876064968),
1074 IFX_LUT_F32_TO_FXPANGLE(0.782950786981764),
1075 IFX_LUT_F32_TO_FXPANGLE(0.783441218733152),
1076 IFX_LUT_F32_TO_FXPANGLE(0.783931171784766),
1077 IFX_LUT_F32_TO_FXPANGLE(0.784420646602251),
1078 IFX_LUT_F32_TO_FXPANGLE(0.784909643651259),
1079 IFX_LUT_F32_TO_FXPANGLE(0.785398163397448),
1080 };
1081 #endif
1082
1083 const float32 Ifx_g_LutAtan2F32_table[IFX_LUTATAN2F32_SIZE + 1] =
1084 {0, 0.000976562189559319f, 0.00195312251647882f, 0.00292967911813999f, 0.00390623013196697f, 0.00488277369544783f, 0.00585930794615589f, 0.00683583102177106f, 0.00781234106010111f, 0.008788836199103f,
1085 0.00976531457690415f, 0.0107417743318238f, 0.0117182136023941f, 0.0126946305273818f, 0.0136710232458091f, 0.014647389896975f, 0.0156237286204768f, 0.0166000375562313f, 0.0175763148444956f,
1086 0.018552558625889f, 0.0195287670414137f, 0.0205049382324764f, 0.0214810703409091f, 0.0224571615089906f, 0.0234332098794676f, 0.0244092135955758f, 0.0253851708010611f, 0.0263610796402008f,
1087 0.0273369382578244f, 0.0283127447993352f, 0.029288497410731f, 0.0302641942386252f, 0.0312398334302683f, 0.0322154131335681f, 0.0331909314971116f, 0.0341663866701854f, 0.0351417768027968f,
1088 0.036117100045695f, 0.0370923545503918f, 0.0380675384691825f, 0.039042649955167f, 0.0400176871622703f, 0.0409926482452638f, 0.0419675313597857f, 0.0429423346623622f, 0.0439170563104278f,
1089 0.0448916944623465f, 0.0458662472774322f, 0.0468407129159697f, 0.0478150895392348f, 0.0487893753095156f, 0.0497635683901328f, 0.0507376669454602f, 0.0517116691409454f, 0.05268557314313f,
1090 0.0536593771196708f, 0.0546330792393595f, 0.0556066776721433f, 0.0565801705891457f, 0.0575535561626864f, 0.0585268325663018f, 0.0594999979747652f, 0.0604730505641073f, 0.0614459885116361f,
1091 0.0624188099959574f, 0.0633915131969944f, 0.0643640962960086f, 0.0653365574756192f, 0.0663088949198235f, 0.0672811068140167f, 0.068253191345012f, 0.0692251467010603f, 0.0701969710718705f,
1092 0.0711686626486288f, 0.0721402196240188f, 0.0731116401922413f, 0.0740829225490337f, 0.0750540648916902f, 0.0760250654190807f, 0.0769959223316711f, 0.0779666338315423f, 0.07893719812241f,
1093 0.0799076134096439f, 0.0808778779002873f, 0.0818479898030765f, 0.0828179473284599f, 0.0837877486886171f, 0.0847573920974787f, 0.0857268757707448f, 0.0866961979259047f, 0.0876653567822554f,
1094 0.0886343505609211f, 0.0896031774848717f, 0.0905718357789422f, 0.0915403236698511f, 0.0925086393862194f, 0.0934767811585895f, 0.0944447472194436f, 0.0954125358032227f, 0.0963801451463448f,
1095 0.0973475734872237f, 0.0983148190662873f, 0.0992818801259964f, 0.100248754910863f, 0.101215441667467f, 0.102181938644477f, 0.103148244092669f, 0.10411435626494f, 0.10508027341633f, 0.106045993804039f,
1096 0.107011515687447f, 0.107976837328126f, 0.108941956989866f, 0.109906872938685f, 0.110871583442852f, 0.111836086772904f, 0.112800381201659f, 0.113764465004242f, 0.114728336458092f, 0.115691993842991f,
1097 0.116655435441069f, 0.117618659536834f, 0.118581664417177f, 0.1195444483714f, 0.120507009691225f, 0.121469346670814f, 0.122431457606789f, 0.123393340798243f, 0.124354994546761f, 0.125316417156437f,
1098 0.126277606933887f, 0.127238562188269f, 0.128199281231298f, 0.129159762377265f, 0.130120003943049f, 0.131080004248137f, 0.132039761614639f, 0.132999274367304f, 0.133958540833537f, 0.134917559343415f,
1099 0.135876328229701f, 0.136834845827863f, 0.137793110476088f, 0.138751120515297f, 0.139708874289164f, 0.140666370144127f, 0.14162360642941f, 0.14258058149703f, 0.143537293701821f, 0.144493741401443f,
1100 0.145449922956401f, 0.146405836730058f, 0.147361481088652f, 0.148316854401309f, 0.14927195504006f, 0.150226781379856f, 0.15118133179858f, 0.152135604677064f, 0.153089598399105f, 0.154043311351475f,
1101 0.154996741923941f, 0.155949888509276f, 0.156902749503275f, 0.157855323304766f, 0.158807608315631f, 0.159759602940813f, 0.160711305588332f, 0.161662714669305f, 0.162613828597949f, 0.163564645791604f,
1102 0.164515164670743f, 0.165465383658987f, 0.166415301183115f, 0.167364915673083f, 0.168314225562034f, 0.169263229286312f, 0.170211925285474f, 0.171160312002307f, 0.172108387882836f, 0.17305615137634f,
1103 0.174003600935368f, 0.174950735015743f, 0.175897552076585f, 0.176844050580316f, 0.177790228992676f, 0.178736085782736f, 0.179681619422909f, 0.180626828388963f, 0.181571711160032f, 0.182516266218631f,
1104 0.183460492050666f, 0.184404387145446f, 0.185347949995695f, 0.186291179097566f, 0.187234072950649f, 0.188176630057987f, 0.189118848926084f, 0.190060728064918f, 0.191002265987953f, 0.191943461212149f,
1105 0.192884312257975f, 0.193824817649417f, 0.194764975913995f, 0.195704785582767f, 0.196644245190345f, 0.197583353274903f, 0.19852210837819f, 0.199460509045539f, 0.200398553825879f, 0.201336241271742f,
1106 0.202273569939279f, 0.203210538388266f, 0.204147145182117f, 0.205083388887891f, 0.206019268076305f, 0.206954781321742f, 0.207889927202263f, 0.208824704299615f, 0.209759111199241f, 0.210693146490291f,
1107 0.21162680876563f, 0.212560096621847f, 0.213493008659266f, 0.214425543481956f, 0.215357699697738f, 0.216289475918194f, 0.217220870758679f, 0.218151882838326f, 0.219082510780058f, 0.220012753210596f,
1108 0.220942608760466f, 0.22187207606401f, 0.222801153759395f, 0.223729840488615f, 0.22465813489751f, 0.225586035635764f, 0.22651354135692f, 0.227440650718385f, 0.228367362381439f, 0.229293675011242f,
1109 0.230219587276844f, 0.231145097851188f, 0.232070205411125f, 0.232994908637414f, 0.233919206214733f, 0.234843096831689f, 0.23576657918082f, 0.236689651958605f, 0.237612313865471f, 0.238534563605801f,
1110 0.239456399887938f, 0.240377821424194f, 0.241298826930859f, 0.242219415128201f, 0.24313958474048f, 0.244059334495949f, 0.244978663126864f, 0.24589756936949f, 0.246816051964103f, 0.247734109655002f,
1111 0.248651741190513f, 0.249568945322993f, 0.250485720808836f, 0.251402066408485f, 0.252317980886427f, 0.25323346301121f, 0.254148511555439f, 0.25506312529579f, 0.255977303013006f, 0.25689104349191f,
1112 0.25780434552141f, 0.258717207894497f, 0.259629629408258f, 0.260541608863876f, 0.261453145066638f, 0.262364236825938f, 0.263274882955282f, 0.264185082272293f, 0.265094833598715f, 0.266004135760417f,
1113 0.2669129875874f, 0.267821387913799f, 0.268729335577886f, 0.269636829422078f, 0.270543868292937f, 0.271450451041176f, 0.272356576521665f, 0.27326224359343f, 0.274167451119659f, 0.275072197967707f,
1114 0.275976483009098f, 0.27688030511953f, 0.277783663178873f, 0.278686556071182f, 0.27958898268469f, 0.280490941911819f, 0.281392432649178f, 0.282293453797569f, 0.283194004261987f, 0.284094082951627f,
1115 0.284993688779881f, 0.285892820664347f, 0.286791477526827f, 0.28768965829333f, 0.288587361894077f, 0.289484587263501f, 0.29038133334025f, 0.291277599067188f, 0.292173383391399f, 0.293068685264188f,
1116 0.293963503641084f, 0.294857837481838f, 0.295751685750432f, 0.296645047415071f, 0.297537921448196f, 0.298430306826474f, 0.299322202530807f, 0.300213607546333f, 0.301104520862424f, 0.301994941472688f,
1117 0.302884868374971f, 0.303774300571361f, 0.304663237068183f, 0.305551676876003f, 0.30643961900963f, 0.307327062488116f, 0.308214006334753f, 0.309100449577082f, 0.309986391246883f, 0.310871830380185f,
1118 0.31175676601726f, 0.312641197202625f, 0.313525122985044f, 0.314408542417527f, 0.31529145455733f, 0.316173858465954f, 0.317055753209147f, 0.317937137856902f, 0.318818011483458f, 0.3196983731673f,
1119 0.320578221991157f, 0.321457557042003f, 0.322336377411056f, 0.323214682193777f, 0.324092470489872f, 0.324969741403286f, 0.325846494042208f, 0.326722727519067f, 0.327598440950531f, 0.328473633457506f,
1120 0.329348304165139f, 0.330222452202808f, 0.331096076704132f, 0.33196917680696f, 0.332841751653376f, 0.333713800389694f, 0.334585322166459f, 0.335456316138443f, 0.336326781464645f, 0.33719671730829f,
1121 0.338066122836825f, 0.338934997221921f, 0.339803339639465f, 0.340671149269565f, 0.341538425296542f, 0.342405166908932f, 0.343271373299484f, 0.344137043665154f, 0.345002177207105f, 0.345866773130707f,
1122 0.34673083064553f, 0.347594348965346f, 0.348457327308122f, 0.349319764896022f, 0.350181660955402f, 0.351043014716805f, 0.351903825414965f, 0.352764092288795f, 0.353623814581394f, 0.354482991540035f,
1123 0.355341622416168f, 0.356199706465416f, 0.357057242947567f, 0.35791423112658f, 0.358770670270572f, 0.359626559651822f, 0.360481898546763f, 0.361336686235982f, 0.362190922004212f, 0.363044605140335f,
1124 0.363897734937373f, 0.364750310692485f, 0.365602331706967f, 0.366453797286243f, 0.367304706739864f, 0.368155059381507f, 0.369004854528964f, 0.369854091504145f, 0.370702769633069f, 0.371550888245862f,
1125 0.372398446676754f, 0.373245444264073f, 0.374091880350239f, 0.374937754281765f, 0.375783065409249f, 0.376627813087368f, 0.377471996674877f, 0.378315615534604f, 0.379158669033442f, 0.380001156542349f,
1126 0.380843077436342f, 0.381684431094488f, 0.382525216899905f, 0.383365434239755f, 0.384205082505239f, 0.385044161091591f, 0.385882669398074f, 0.386720606827975f, 0.387557972788602f, 0.388394766691274f,
1127 0.389230987951321f, 0.390066635988073f, 0.390901710224862f, 0.39173621008901f, 0.392570135011829f, 0.393403484428609f, 0.394236257778621f, 0.395068454505103f, 0.395900074055263f, 0.396731115880264f,
1128 0.397561579435227f, 0.39839146417922f, 0.399220769575253f, 0.400049495090274f, 0.400877640195163f, 0.401705204364725f, 0.402532187077683f, 0.403358587816674f, 0.404184406068245f, 0.405009641322841f,
1129 0.405834293074804f, 0.406658360822366f, 0.407481844067642f, 0.408304742316622f, 0.409127055079168f, 0.409948781869008f, 0.410769922203726f, 0.411590475604759f, 0.412410441597387f, 0.413229819710733f,
1130 0.414048609477749f, 0.414866810435215f, 0.415684422123729f, 0.416501444087703f, 0.417317875875355f, 0.418133717038701f, 0.418948967133553f, 0.419763625719506f, 0.420577692359935f, 0.42139116662199f,
1131 0.422204048076584f, 0.423016336298389f, 0.423828030865831f, 0.42463913136108f, 0.425449637370042f, 0.426259548482358f, 0.427068864291389f, 0.427877584394215f, 0.428685708391626f, 0.429493235888114f,
1132 0.430300166491866f, 0.431106499814758f, 0.431912235472348f, 0.432717373083866f, 0.433521912272209f, 0.434325852663933f, 0.435129193889247f, 0.435931935582003f, 0.43673407737969f, 0.437535618923428f,
1133 0.438336559857958f, 0.439136899831635f, 0.439936638496422f, 0.440735775507881f, 0.441534310525167f, 0.442332243211017f, 0.443129573231746f, 0.443926300257239f, 0.444722423960939f, 0.445517944019847f,
1134 0.446312860114506f, 0.447107171928999f, 0.447900879150937f, 0.448693981471457f, 0.449486478585208f, 0.450278370190345f, 0.451069655988523f, 0.451860335684889f, 0.452650408988071f, 0.453439875610172f,
1135 0.454228735266762f, 0.455016987676872f, 0.45580463256298f, 0.456591669651011f, 0.457378098670321f, 0.458163919353695f, 0.458949131437335f, 0.459733734660856f, 0.460517728767271f, 0.461301113502991f,
1136 0.46208388861781f, 0.462866053864901f, 0.463647609000806f, 0.464428553785428f, 0.465208887982023f, 0.46598861135719f, 0.466767723680866f, 0.467546224726316f, 0.468324114270123f, 0.46910139209218f,
1137 0.469878057975687f, 0.470654111707133f, 0.471429553076297f, 0.472204381876234f, 0.472978597903266f, 0.473752200956977f, 0.474525190840205f, 0.475297567359028f, 0.476069330322761f, 0.476840479543945f,
1138 0.477611014838337f, 0.478380936024907f, 0.479150242925823f, 0.479918935366444f, 0.480687013175316f, 0.481454476184158f, 0.482221324227854f, 0.482987557144447f, 0.48375317477513f, 0.484518176964233f,
1139 0.485282563559221f, 0.48604633441068f, 0.48680948937231f, 0.487572028300918f, 0.488333951056406f, 0.489095257501764f, 0.489855947503062f, 0.490616020929441f, 0.491375477653102f, 0.4921343175493f,
1140 0.492892540496335f, 0.49365014637554f, 0.494407135071275f, 0.49516350647092f, 0.495919260464861f, 0.496674396946486f, 0.497428915812172f, 0.498182816961281f, 0.498936100296146f, 0.499688765722065f,
1141 0.500440813147294f, 0.501192242483033f, 0.501943053643421f, 0.502693246545526f, 0.503442821109336f, 0.504191777257751f, 0.504940114916572f, 0.505687834014494f, 0.506434934483097f, 0.507181416256835f,
1142 0.50792727927303f, 0.508672523471861f, 0.509417148796356f, 0.510161155192383f, 0.51090454260864f, 0.511647310996647f, 0.512389460310738f, 0.513130990508049f, 0.513871901548512f, 0.514612193394845f,
1143 0.515351866012543f, 0.51609091936987f, 0.516829353437846f, 0.517567168190245f, 0.518304363603578f, 0.519040939657092f, 0.519776896332754f, 0.520512233615247f, 0.521246951491958f, 0.521981049952972f,
1144 0.522714528991058f, 0.523447388601666f, 0.524179628782913f, 0.524911249535579f, 0.525642250863092f, 0.526372632771524f, 0.52710239526958f, 0.527831538368588f, 0.528560062082493f, 0.529287966427846f,
1145 0.530015251423793f, 0.530741917092071f, 0.531467963456995f, 0.53219339054545f, 0.532918198386882f, 0.533642387013291f, 0.534365956459219f, 0.535088906761743f, 0.535811237960464f, 0.5365329500975f,
1146 0.537254043217479f, 0.537974517367523f, 0.538694372597247f, 0.539413608958744f, 0.540132226506582f, 0.540850225297788f, 0.541567605391845f, 0.542284366850679f, 0.543000509738655f, 0.54371603412256f,
1147 0.544430940071603f, 0.545145227657401f, 0.54585889695397f, 0.546571948037719f, 0.547284380987437f, 0.547996195884288f, 0.548707392811801f, 0.549417971855859f, 0.550127933104693f, 0.55083727664887f,
1148 0.551546002581289f, 0.552254110997165f, 0.552961601994028f, 0.553668475671709f, 0.554374732132331f, 0.555080371480305f, 0.555785393822314f, 0.55648979926731f, 0.557193587926504f, 0.557896759913355f,
1149 0.558599315343562f, 0.559301254335059f, 0.560002577007999f, 0.560703283484751f, 0.561403373889889f, 0.562102848350186f, 0.562801706994599f, 0.563499949954267f, 0.564197577362498f, 0.564894589354762f,
1150 0.565590986068683f, 0.566286767644028f, 0.5669819342227f, 0.56767648594873f, 0.568370422968264f, 0.569063745429561f, 0.569756453482978f, 0.570448547280968f, 0.571140026978063f, 0.571830892730873f,
1151 0.572521144698072f, 0.573210783040395f, 0.573899807920624f, 0.57458821950358f, 0.575276017956118f, 0.575963203447116f, 0.576649776147467f, 0.577335736230069f, 0.57802108386982f, 0.578705819243603f,
1152 0.579389942530287f, 0.580073453910708f, 0.58075635356767f, 0.58143864168593f, 0.582120318452191f, 0.582801384055095f, 0.583481838685215f, 0.584161682535044f, 0.584840915798988f, 0.585519538673358f,
1153 0.586197551356361f, 0.586874954048091f, 0.587551746950524f, 0.588227930267504f, 0.588903504204738f, 0.58957846896979f, 0.590252824772067f, 0.590926571822816f, 0.591599710335111f, 0.592272240523851f,
1154 0.592944162605743f, 0.593615476799303f, 0.594286183324841f, 0.594956282404456f, 0.595625774262027f, 0.596294659123204f, 0.596962937215402f, 0.597630608767789f, 0.598297674011284f, 0.598964133178543f,
1155 0.599629986503951f, 0.600295234223621f, 0.600959876575375f, 0.601623913798746f, 0.602287346134964f, 0.60295017382695f, 0.603612397119307f, 0.604274016258314f, 0.604935031491914f, 0.605595443069711f,
1156 0.606255251242958f, 0.606914456264552f, 0.607573058389022f, 0.608231057872528f, 0.608888454972845f, 0.609545249949361f, 0.610201443063065f, 0.610857034576544f, 0.611512024753969f, 0.612166413861094f,
1157 0.612820202165241f, 0.613473389935299f, 0.614125977441711f, 0.614777964956469f, 0.615429352753105f, 0.616080141106684f, 0.616730330293797f, 0.617379920592551f, 0.618028912282562f, 0.61867730564495f,
1158 0.619325100962327f, 0.619972298518794f, 0.620618898599929f, 0.621264901492783f, 0.621910307485869f, 0.622555116869157f, 0.623199329934066f, 0.623842946973455f, 0.624485968281619f, 0.625128394154276f,
1159 0.625770224888563f, 0.626411460783031f, 0.62705210213763f, 0.627692149253711f, 0.62833160243401f, 0.628970461982645f, 0.62960872820511f, 0.630246401408263f, 0.630883481900322f, 0.631519969990857f,
1160 0.632155865990784f, 0.632791170212352f, 0.633425882969145f, 0.634060004576065f, 0.634693535349333f, 0.635326475606475f, 0.635958825666321f, 0.636590585848993f, 0.637221756475899f, 0.637852337869727f,
1161 0.638482330354438f, 0.639111734255255f, 0.639740549898664f, 0.640368777612397f, 0.640996417725432f, 0.641623470567984f, 0.642249936471496f, 0.642875815768636f, 0.643501108793284f, 0.644125815880533f,
1162 0.644749937366675f, 0.645373473589196f, 0.645996424886772f, 0.646618791599258f, 0.647240574067683f, 0.647861772634245f, 0.648482387642301f, 0.649102419436359f, 0.649721868362078f, 0.650340734766252f,
1163 0.650959018996812f, 0.651576721402813f, 0.652193842334429f, 0.652810382142948f, 0.653426341180762f, 0.654041719801364f, 0.65465651835934f, 0.655270737210358f, 0.655884376711171f, 0.656497437219599f,
1164 0.657109919094532f, 0.657721822695918f, 0.658333148384756f, 0.658943896523094f, 0.659554067474019f, 0.660163661601649f, 0.660772679271133f, 0.661381120848635f, 0.661988986701338f, 0.662596277197427f,
1165 0.663202992706093f, 0.663809133597518f, 0.664414700242873f, 0.665019693014312f, 0.665624112284961f, 0.666227958428919f, 0.666831231821246f, 0.667433932837957f, 0.66803606185602f, 0.668637619253345f,
1166 0.66923860540878f, 0.669839020702103f, 0.670438865514021f, 0.671038140226157f, 0.671636845221047f, 0.672234980882134f, 0.672832547593763f, 0.673429545741172f, 0.674025975710487f, 0.674621837888718f,
1167 0.67521713266375f, 0.675811860424338f, 0.676406021560103f, 0.676999616461522f, 0.677592645519925f, 0.678185109127489f, 0.678777007677231f, 0.679368341563002f, 0.679959111179482f, 0.680549316922172f,
1168 0.681138959187393f, 0.681728038372273f, 0.682316554874748f, 0.682904509093552f, 0.683491901428213f, 0.684078732279046f, 0.684665002047149f, 0.685250711134394f, 0.685835859943427f, 0.686420448877654f,
1169 0.687004478341245f, 0.68758794873912f, 0.688170860476949f, 0.688753213961141f, 0.689335009598846f, 0.689916247797941f, 0.69049692896703f, 0.691077053515437f, 0.6916566218532f, 0.692235634391065f,
1170 0.692814091540483f, 0.693391993713601f, 0.69396934132326f, 0.694546134782985f, 0.695122374506987f, 0.695698060910148f, 0.696273194408024f, 0.696847775416835f, 0.697421804353461f, 0.697995281635439f,
1171 0.69856820768095f, 0.699140582908824f, 0.699712407738527f, 0.70028368259016f, 0.70085440788445f, 0.70142458404275f, 0.701994211487028f, 0.702563290639866f, 0.703131821924454f, 0.703699805764582f,
1172 0.704267242584639f, 0.704834132809605f, 0.705400476865049f, 0.705966275177119f, 0.706531528172541f, 0.707096236278612f, 0.707660399923198f, 0.708224019534724f, 0.708787095542173f, 0.70934962837508f,
1173 0.709911618463525f, 0.710473066238132f, 0.711033972130061f, 0.711594336571003f, 0.712154159993179f, 0.712713442829328f, 0.713272185512711f, 0.713830388477098f, 0.714388052156769f, 0.714945176986506f,
1174 0.715501763401588f, 0.71605781183779f, 0.716613322731375f, 0.717168296519088f, 0.717722733638155f, 0.718276634526277f, 0.718829999621625f, 0.719382829362832f, 0.719935124188996f, 0.720486884539668f,
1175 0.721038110854852f, 0.721588803574998f, 0.722138963140998f, 0.722688589994184f, 0.723237684576318f, 0.723786247329592f, 0.724334278696622f, 0.724881779120445f, 0.725428749044511f, 0.725975188912682f,
1176 0.726521099169226f, 0.727066480258813f, 0.727611332626511f, 0.72815565671778f, 0.72869945297847f, 0.729242721854815f, 0.729785463793429f, 0.730327679241302f, 0.730869368645794f, 0.731410532454635f,
1177 0.731951171115917f, 0.732491285078088f, 0.733030874789955f, 0.733569940700672f, 0.73410848325974f, 0.734646502917002f, 0.73518400012264f, 0.735720975327167f, 0.736257428981428f, 0.736793361536592f,
1178 0.737328773444149f, 0.737863665155908f, 0.73839803712399f, 0.738931889800823f, 0.739465223639145f, 0.73999803909199f, 0.740530336612693f, 0.741062116654879f, 0.741593379672465f, 0.74212412611965f,
1179 0.742654356450918f, 0.743184071121027f, 0.74371327058501f, 0.74424195529817f, 0.744770125716075f, 0.745297782294555f, 0.745824925489697f, 0.746351555757843f, 0.746877673555588f, 0.747403279339768f,
1180 0.747928373567467f, 0.748452956696006f, 0.748977029182941f, 0.749500591486061f, 0.750023644063381f, 0.750546187373141f, 0.751068221873802f, 0.751589748024043f, 0.752110766282754f, 0.752631277109036f,
1181 0.753151280962194f, 0.75367077830174f, 0.754189769587379f, 0.754708255279016f, 0.755226235836745f, 0.755743711720849f, 0.756260683391796f, 0.756777151310235f, 0.757293115936992f, 0.757808577733069f,
1182 0.758323537159635f, 0.758837994678031f, 0.759351950749758f, 0.75986540583648f, 0.760378360400016f, 0.760890814902341f, 0.761402769805578f, 0.761914225571999f, 0.762425182664017f, 0.762935641544187f,
1183 0.763445602675202f, 0.763955066519886f, 0.764464033541195f, 0.764972504202212f, 0.765480478966144f, 0.765987958296319f, 0.766494942656179f, 0.767001432509286f, 0.767507428319308f, 0.768012930550024f,
1184 0.768517939665315f, 0.769022456129166f, 0.769526480405658f, 0.77003001295897f, 0.770533054253371f, 0.771035604753219f, 0.77153766492296f, 0.77203923522712f, 0.772540316130307f, 0.773040908097206f,
1185 0.773541011592573f, 0.774040627081239f, 0.7745397550281f, 0.775038395898116f, 0.775536550156312f, 0.776034218267768f, 0.776531400697624f, 0.77702809791107f, 0.777524310373348f, 0.778020038549745f,
1186 0.778515282905595f, 0.779010043906271f, 0.779504322017186f, 0.77999811770379f, 0.780491431431562f, 0.780984263666015f, 0.781476614872688f, 0.781968485517144f, 0.782459876064968f, 0.782950786981764f,
1187 0.783441218733152f, 0.783931171784766f, 0.784420646602251f, 0.784909643651259f, 0.785398163397448f};
IFX_LUTATAN2F32_SIZE
#define IFX_LUTATAN2F32_SIZE
size of Ifx_LutAtan2F32 table
Definition: Ifx_LutAtan2F32.h:52
float32
float float32
Definition: Platform_Types.h:170
sint16
short sint16
Definition: Platform_Types.h:129
Ifx_g_LutAtan2F32_FxpAngle_table
const Ifx_Lut_FxpAngle Ifx_g_LutAtan2F32_FxpAngle_table[1024+1]
Definition: Ifx_LutAtan2F32_Table.c:54
Ifx_LutAtan2F32.h
Floating point signal, vector, and matrix library.
Ifx_g_LutAtan2F32_table
const float32 Ifx_g_LutAtan2F32_table[IFX_LUTATAN2F32_SIZE+1]
Definition: Ifx_LutAtan2F32_Table.c:1083
Ifx_Lut_FxpAngle
sint32 Ifx_Lut_FxpAngle
Fixed-point angle type.
Definition: Ifx_Lut.h:81
IFX_LUT_F32_TO_FXPANGLE
#define IFX_LUT_F32_TO_FXPANGLE(f)
Convert from float32 angle in radian into fixed-point angle type.
Definition: Ifx_Lut.h:84


iLLD_TC38A: Ifx_LutIndexedLinearF32.h Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_LutIndexedLinearF32.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_LutIndexedLinearF32.h
3 * \brief Look-up functionality
4 *
5 *
6 *
7 * \version disabled
8 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 * \defgroup library_srvsw_sysse_math_f32_lut_indexedLinear Indexes look-up table (with linear interpolation)
43 * \ingroup library_srvsw_sysse_math_f32_lut
44 *
45 */
46
47 #ifndef IFX_LUTINDEXEDLINEARF32_H
48 #define IFX_LUTINDEXEDLINEARF32_H
49
50 //________________________________________________________________________________________
51 // INCLUDES
52 #include "Cpu/Std/Ifx_Types.h"
53
54 typedef struct
55 {
56 float32 gain; /**< \brief channel gain */
57 float32 offset; /**< \brief channel offset */
58 } Ifx_LutIndexedLinearF32_Item;
59
60 typedef struct
61 {
62 uint16 segmentCount;
63 sint8 shift;
64 const Ifx_LutIndexedLinearF32_Item *segments;
65 } Ifx_LutIndexedLinearF32;
66
67 //________________________________________________________________________________________
68 // FUNCTION PROTOTYPES
69
70 /** \addtogroup library_srvsw_sysse_math_f32_lut_indexedLinear
71 * \{ */
72 IFX_INLINE float32 Ifx_LutIndexedLinearF32_search(const Ifx_LutIndexedLinearF32 *ml, uint32 index);
73 /** \} */
74
75 //________________________________________________________________________________________
76 // INLINE FUNCTION IMPLEMENTATION
77
78 /** \brief Look-up table search
79 *
80 *
81 * \param ml pointer to the multi-segment object
82 * \param index
83 * \return interpolated value */
84 IFX_INLINE float32 Ifx_LutIndexedLinearF32_search(const Ifx_LutIndexedLinearF32 *ml, uint32 index)
85 {
86 uint32 i;
87 i = index >> ml->shift;
88
89 return (ml->segments[i].gain * index) + ml->segments[i].offset;
90 }
91
92
93 #endif /* IFX_LUTINDEXEDLINEARF32_H */
Ifx_LutIndexedLinearF32_Item::gain
float32 gain
channel gain
Definition: Ifx_LutIndexedLinearF32.h:56
Ifx_LutIndexedLinearF32
Definition: Ifx_LutIndexedLinearF32.h:60
uint32
unsigned long uint32
Definition: Platform_Types.h:116
float32
float float32
Definition: Platform_Types.h:170
Ifx_LutIndexedLinearF32_Item::offset
float32 offset
channel offset
Definition: Ifx_LutIndexedLinearF32.h:57
Ifx_LutIndexedLinearF32_search
IFX_INLINE float32 Ifx_LutIndexedLinearF32_search(const Ifx_LutIndexedLinearF32 *ml, uint32 index)
Look-up table search.
Definition: Ifx_LutIndexedLinearF32.h:84
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
Ifx_LutIndexedLinearF32_Item
Definition: Ifx_LutIndexedLinearF32.h:54
uint16
unsigned short uint16
Definition: Platform_Types.h:112
Ifx_LutIndexedLinearF32::segmentCount
uint16 segmentCount
Definition: Ifx_LutIndexedLinearF32.h:62
Ifx_LutIndexedLinearF32::segments
const Ifx_LutIndexedLinearF32_Item * segments
Definition: Ifx_LutIndexedLinearF32.h:64
sint8
signed char sint8
Definition: Platform_Types.h:125
Ifx_LutIndexedLinearF32::shift
sint8 shift
Definition: Ifx_LutIndexedLinearF32.h:63


iLLD_TC38A: Ifx_LutLSincosF32.c Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_LutLSincosF32.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_LutLSincosF32.c
3 * \brief Table data for linear interpolation Sin/Cos lookup functions
4 *
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * $Revision: 614 $
42 * $Date: 2013-03-04 14:09:48 +0100 (Mon, 04 Mar 2013) $
43 *
44 */
45
46 #include "Ifx_Lut.h"
47 #include "Ifx_LutIndexedLinearF32.h"
48
49 #if IFX_LUT_TABLE_CONST == 0
50 /* FIXME Table size not consistent */
51 IFX_LUT_TABLE float32 Ifx_g_LutLSincosF32_table[IFX_LUT_ANGLE_RESOLUTION + (IFX_LUT_ANGLE_RESOLUTION / 4)];
52 IFX_LUT_TABLE Ifx_LutIndexedLinearF32 Ifx_g_LutLSincosF32;
53 #else
54
55 #if (IFX_LUT_ANGLE_RESOLUTION != 4096)
56 #error "Inconsistent between Lookup Table and configuration. Please regenerate."
57 #endif
58
59 /*lint -e915*/
60 #define IFX_F32_LUTL_SINCOS_ELEMENT_COUNT (128)
61
62 const Ifx_LutIndexedLinearF32_Item Ifx_g_LutLSincosF32_table[128] = {
63 {0.00153336482273181, 0 },
64 {0.00152967081256696, 0.000118208325275426},
65 {0.00152229169143129, 0.000590472077958315},
66 {0.00151124523627395, 0.00165093177306225 },
67 {0.00149655805897299, 0.00353089046758576 },
68 {0.00147826554222495, 0.00645769314727157 },
69 {0.00145641175430493, 0.010653620427916 },
70 {0.00143104934290218, 0.0163348005821319 },
71 {0.00140223940828726, 0.0237101438435514 },
72 {0.00137005135611611, 0.0329803028688421 },
73 {0.00133456273022575, 0.0443366631537574 },
74 {0.00129585902582439, 0.057960367103036 },
75 {0.00125403348352597, 0.074021375345628 },
76 {0.00120918686472538, 0.0926775687666757 },
77 {0.0011614272088554, 0.114073894596426 },
78 {0.00111086957311029, 0.138341559754081 },
79 {0.00105763575526286, 0.165597274491961 },
80 {0.00100185400024306, 0.195942549222735 },
81 {0.00094365869118462, 0.229463047240396 },
82 {0.000883190025684388, 0.266227995864537 },
83 {0.000820593678053965, 0.306289658348008 },
84 {0.000756020448377588, 0.349682868690533 },
85 {0.000689625899221512, 0.39642463129641 },
86 {0.000621569980870106, 0.446513787203045 },
87 {0.00055201664599169, 0.499930748389669 },
88 {0.000481133454662129, 0.556637301453318 },
89 {0.00040909117069797, 0.616576481711498 },
90 {0.000336063350271452, 0.67967251856001 },
91 {0.000262225923798456, 0.745830852679814 },
92 {0.000187756772106744, 0.814938225449723 },
93 {0.000112835297905487, 0.886862840682929 },
94 {3.76419935883623E-05, 0.961454598565517 },
95 {-3.76419935883623E-05, 1.03854540143448 },
96 {-0.000112835297905484, 1.11794953079336 },
97 {-0.000187756772106747, 1.19946409472434 },
98 {-0.000262225923798456, 1.28286954461905 },
99 {-0.000336063350271452, 1.36793025991594 },
100 {-0.00040909117069797, 1.45439519930094 },
101 {-0.000481133454662129, 1.54199861660136 },
102 {-0.00055201664599169, 1.63046083938065 },
103 {-0.000621569980870103, 1.71948910802502 },
104 {-0.000689625899221512, 1.80877847290207 },
105 {-0.000756020448377592, 1.89801274696784 },
106 {-0.000820593678053958, 1.98686551100252 },
107 {-0.000883190025684391, 2.07500116846617 },
108 {-0.00094365869118462, 2.1620760467865 },
109 {-0.00100185400024307, 2.24773954172053 },
110 {-0.00105763575526286, 2.3316353012703 },
111 {-0.00111086957311028, 2.41340244548394 },
112 {-0.00116142720885541, 2.4926768183323 },
113 {-0.00120918686472538, 2.56909226772425 },
114 {-0.00125403348352598, 2.64228194960683 },
115 {-0.00129585902582439, 2.71187965199138 },
116 {-0.00133456273022575, 2.77752113465609 },
117 {-0.00137005135611612, 2.83884548019465 },
118 {-0.00140223940828725, 2.89549645201585 },
119 {-0.00143104934290217, 2.94712385484579 },
120 {-0.00145641175430494, 2.99338489324442 },
121 {-0.00147826554222495, 3.03394552362397 },
122 {-0.00149655805897298, 3.06848179524426 },
123 {-0.00151124523627396, 3.09668117566214 },
124 {-0.00152229169143128, 3.11824385612922 },
125 {-0.00152967081256696, 3.13288403246242 },
126 {-0.00153336482273181, 3.14033115695474 },
127 {-0.00153336482273181, 3.14033115695474 },
128 {-0.00152967081256696, 3.13264761581187 },
129 {-0.00152229169143128, 3.11706291197331 },
130 {-0.00151124523627396, 3.09337931211601 },
131 {-0.00149655805897298, 3.06142001430908 },
132 {-0.00147826554222495, 3.02103013732942 },
133 {-0.00145641175430494, 2.9720776523886 },
134 {-0.00143104934290217, 2.91445425368152 },
135 {-0.00140223940828725, 2.84807616432874 },
136 {-0.00137005135611612, 2.77288487445697 },
137 {-0.00133456273022575, 2.68884780834857 },
138 {-0.00129585902582439, 2.59595891778531 },
139 {-0.00125403348352598, 2.49423919891558 },
140 {-0.00120918686472538, 2.38373713019089 },
141 {-0.00116142720885541, 2.26452902913946 },
142 {-0.00111086957311028, 2.13671932597577 },
143 {-0.00105763575526286, 2.00044075228637 },
144 {-0.00100185400024306, 1.85585444327504 },
145 {-0.000943658691184637, 1.70314995230575 },
146 {-0.000883190025684381, 1.54254517673707 },
147 {-0.000820593678053962, 1.3742861943065 },
148 {-0.000756020448377592, 1.19864700958678 },
149 {-0.000689625899221506, 1.01592921030923 },
150 {-0.000621569980870106, 0.826461533618933 },
151 {-0.000552016645991697, 0.630599342601331 },
152 {-0.000481133454662126, 0.428724013694713 },
153 {-0.000409091170697973, 0.221242235877955 },
154 {-0.000336063350271448, 0.00858522279591345 },
155 {-0.000262225923798456, -0.208792160740577 },
156 {-0.000187756772106751, -0.430412356175091 },
157 {-0.000112835297905484, -0.655776150572502 },
158 {-3.76419935883623E-05, -0.884363795696551 },
159 {3.76419935883623E-05, -1.11563620430345 },
160 {0.000112835297905484, -1.34903622090379 },
161 {0.000187756772106751, -1.58398996399897 },
162 {0.000262225923798452, -1.81990823655828 },
163 {0.000336063350271452, -2.05618800127188 },
164 {0.00040909117069797, -2.29221391689038 },
165 {0.000481133454662126, -2.52735993174939 },
166 {0.000552016645991697, -2.76099093037165 },
167 {0.000621569980870103, -2.99246442884699 },
168 {0.000689625899221509, -3.22113231450771 },
169 {0.000756020448377588, -3.44634262524513 },
170 {0.000820593678053962, -3.66744136365704 },
171 {0.000883190025684381, -3.88377434106776 },
172 {0.000943658691184637, -4.09468904633266 },
173 {0.00100185400024306, -4.29953653421829 },
174 {0.00105763575526286, -4.49767332804863 },
175 {0.00111086957311028, -4.6884633312138 },
176 {0.0011614272088554, -4.87127974206814 },
177 {0.0012091868647254, -5.04550696668189 },
178 {0.00125403348352597, -5.21054252386801 },
179 {0.00129585902582438, -5.36579893687972 },
180 {0.00133456273022575, -5.51070560615843 },
181 {0.00137005135611611, -5.64471065752041 },
182 {0.00140223940828725, -5.76728276018815 },
183 {0.0014310493429022, -5.87791290910954 },
184 {0.00145641175430492, -5.97611616606088 },
185 {0.00147826554222495, -6.06143335410066 },
186 {0.00149655805897298, -6.13343270002092 },
187 {0.00151124523627395, -6.19171141955115 },
188 {0.00152229169143131, -6.2358972401806 },
189 {0.00152967081256695, -6.2656498565995 },
190 {0.00153336482273181, -6.28066231390948 },
191 };
192
193 const Ifx_LutIndexedLinearF32 Ifx_g_LutLSincosF32 = {
194 .segmentCount = IFX_F32_LUTL_SINCOS_ELEMENT_COUNT,
195 .shift = 5,
196 .segments = Ifx_g_LutLSincosF32_table
197 };
198 #endif
Ifx_g_LutLSincosF32_table
const Ifx_LutIndexedLinearF32_Item Ifx_g_LutLSincosF32_table[128]
Definition: Ifx_LutLSincosF32.c:62
Ifx_Lut.h
Lookup defintion with fixed-point angle data type.
Ifx_LutIndexedLinearF32
Definition: Ifx_LutIndexedLinearF32.h:60
IFX_LUT_TABLE
#define IFX_LUT_TABLE
Lookup table type modifier (stored in ROM)
Definition: Ifx_Lut.h:62
float32
float float32
Definition: Platform_Types.h:170
Ifx_g_LutLSincosF32
const Ifx_LutIndexedLinearF32 Ifx_g_LutLSincosF32
Definition: Ifx_LutLSincosF32.c:193
IFX_F32_LUTL_SINCOS_ELEMENT_COUNT
#define IFX_F32_LUTL_SINCOS_ELEMENT_COUNT
Definition: Ifx_LutLSincosF32.c:60
Ifx_LutIndexedLinearF32_Item
Definition: Ifx_LutIndexedLinearF32.h:54
Ifx_LutIndexedLinearF32::segmentCount
uint16 segmentCount
Definition: Ifx_LutIndexedLinearF32.h:62
IFX_LUT_ANGLE_RESOLUTION
#define IFX_LUT_ANGLE_RESOLUTION
Define the cosinus and sinus table size.
Definition: Ifx_Lut.h:72
Ifx_LutIndexedLinearF32.h
Look-up functionality.


iLLD_TC38A: Ifx_LutLSincosF32.h Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_LutLSincosF32.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_LutLSincosF32.h
3 * \brief Sin/Cos linear approximated lookup functions with fixed-point angle data type
4 * \ingroup library_srvsw_sysse_math_lut_lsincos
5 *
6 *
7 *
8 * \version disabled
9 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
10 *
11 *
12 * IMPORTANT NOTICE
13 *
14 * Use of this file is subject to the terms of use agreed between (i) you or
15 * the company in which ordinary course of business you are acting and (ii)
16 * Infineon Technologies AG or its licensees. If and as long as no such terms
17 * of use are agreed, use of this file is subject to following:
18 *
19 * Boost Software License - Version 1.0 - August 17th, 2003
20 *
21 * Permission is hereby granted, free of charge, to any person or organization
22 * obtaining a copy of the software and accompanying documentation covered by
23 * this license (the "Software") to use, reproduce, display, distribute,
24 * execute, and transmit the Software, and to prepare derivative works of the
25 * Software, and to permit third-parties to whom the Software is furnished to
26 * do so, all subject to the following:
27 *
28 * The copyright notices in the Software and this entire statement, including
29 * the above license grant, this restriction and the following disclaimer, must
30 * be included in all copies of the Software, in whole or in part, and all
31 * derivative works of the Software, unless such copies or derivative works are
32 * solely in the form of machine-executable object code generated by a source
33 * language processor.
34 *
35 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
36 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
37 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
38 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
39 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
40 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
41 * DEALINGS IN THE SOFTWARE.
42 *
43 * \defgroup library_srvsw_sysse_math_lut_lsincos Linear trigonometric Look-ups
44 * \ingroup library_srvsw_sysse_math_f32_lut
45 *
46 */
47
48 #ifndef IFX_LUTLSINCOSF32_H
49 #define IFX_LUTLSINCOSF32_H
50 //________________________________________________________________________________________
51
52 #include "SysSe/Math/IFX_Cf32.h"
53 #include "Ifx_Lut.h"
54 #include "Ifx_LutIndexedLinearF32.h"
55 //________________________________________________________________________________________
56
57 /**
58 * \brief Look-up table for sin */
59 IFX_EXTERN const Ifx_LutIndexedLinearF32 Ifx_g_LutLSincosF32;
60
61 /**
62 * \brief Sine lookup function
63 * \param fxpAngle 0 .. (IFX_LUT_ANGLE_RESOLUTION - 1)
64 * \return sin(2*IFX_PI*fxpAngle/IFX_LUT_ANGLE_RESOLUTION)
65 * \ingroup library_srvsw_sysse_math_lut_lsincos
66 */
67 IFX_INLINE float32 Ifx_LutLSincosF32_sin(Ifx_Lut_FxpAngle fxpAngle)
68 {
69 fxpAngle = fxpAngle & (IFX_LUT_ANGLE_RESOLUTION - 1);
70
71 return Ifx_LutIndexedLinearF32_search(&Ifx_g_LutLSincosF32, fxpAngle);
72 }
73
74
75 /**
76 * \brief Cosine lookup function
77 * \param fxpAngle 0 .. (IFX_LUT_ANGLE_RESOLUTION - 1), which represents 0 .. 2*IFX_PI
78 * \return cos(2*IFX_PI*fxpAngle/IFX_LUT_ANGLE_RESOLUTION)
79 * \ingroup library_srvsw_sysse_math_lut_lsincos
80 */
81 IFX_INLINE float32 Ifx_LutLSincosF32_cos(Ifx_Lut_FxpAngle fxpAngle)
82 {
83 return Ifx_LutLSincosF32_sin((IFX_LUT_ANGLE_PI / 2) - fxpAngle);
84 }
85
86
87 /**
88 * \brief Sine and Cosine lookup function
89 * \param fxpAngle 0 .. (IFX_LUT_ANGLE_RESOLUTION - 1), which represents 0 .. 2*IFX_PI
90 * \retval real = cos(2*IFX_PI*fxpAngle/IFX_LUT_ANGLE_RESOLUTION)
91 * \retval imag = sin(2*IFX_PI*fxpAngle/IFX_LUT_ANGLE_RESOLUTION)
92 * \ingroup library_srvsw_sysse_math_lut_lsincos
93 */
94 IFX_INLINE cfloat32 Ifx_LutLSincosF32_cossin(Ifx_Lut_FxpAngle fxpAngle)
95 {
96 cfloat32 result;
97 result.imag = Ifx_LutLSincosF32_sin(fxpAngle);
98 result.real = Ifx_LutLSincosF32_sin((IFX_LUT_ANGLE_PI / 2) - fxpAngle);
99 return result;
100 }
101
102
103 //________________________________________________________________________________________
104 #endif
Ifx_LutLSincosF32_cossin
IFX_INLINE cfloat32 Ifx_LutLSincosF32_cossin(Ifx_Lut_FxpAngle fxpAngle)
Sine and Cosine lookup function.
Definition: Ifx_LutLSincosF32.h:94
Ifx_Lut.h
Lookup defintion with fixed-point angle data type.
Ifx_g_LutLSincosF32
IFX_EXTERN const Ifx_LutIndexedLinearF32 Ifx_g_LutLSincosF32
Look-up table for sin.
Definition: Ifx_LutLSincosF32.h:59
IFX_LUT_ANGLE_PI
#define IFX_LUT_ANGLE_PI
Value used as 180 degree angle.
Definition: Ifx_Lut.h:75
Ifx_LutIndexedLinearF32
Definition: Ifx_LutIndexedLinearF32.h:60
float32
float float32
Definition: Platform_Types.h:170
cfloat32::imag
float32 imag
Imaginary part.
Definition: Ifx_Types.h:61
Ifx_LutLSincosF32_sin
IFX_INLINE float32 Ifx_LutLSincosF32_sin(Ifx_Lut_FxpAngle fxpAngle)
Sine lookup function.
Definition: Ifx_LutLSincosF32.h:67
cfloat32
Definition: Ifx_Types.h:58
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
Ifx_LutIndexedLinearF32_search
IFX_INLINE float32 Ifx_LutIndexedLinearF32_search(const Ifx_LutIndexedLinearF32 *ml, uint32 index)
Look-up table search.
Definition: Ifx_LutIndexedLinearF32.h:84
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
Ifx_LutLSincosF32_cos
IFX_INLINE float32 Ifx_LutLSincosF32_cos(Ifx_Lut_FxpAngle fxpAngle)
Cosine lookup function.
Definition: Ifx_LutLSincosF32.h:81
cfloat32::real
float32 real
Real part.
Definition: Ifx_Types.h:60
Ifx_Cf32.h
Floating point signal, vector, and matrix library.
Ifx_Lut_FxpAngle
sint32 Ifx_Lut_FxpAngle
Fixed-point angle type.
Definition: Ifx_Lut.h:81
IFX_LUT_ANGLE_RESOLUTION
#define IFX_LUT_ANGLE_RESOLUTION
Define the cosinus and sinus table size.
Definition: Ifx_Lut.h:72
Ifx_LutIndexedLinearF32.h
Look-up functionality.


iLLD_TC38A: Ifx_LutLinearF32.c Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_LutLinearF32.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_LutLinearF32.c
3 * \brief Linear look-up function
4 *
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "Ifx_LutLinearF32.h"
44
45 /** \brief Look-up table with binary search implementation
46 *
47 * Value inside table will be linearly interpolated.
48 * Value outside table will be linearly extrapolated.
49 *
50 * \param ml pointer to the multi-segment object
51 * \param index
52 * \return linear interpolated value */
53 float32 Ifx_LutLinearF32_searchBin(const Ifx_LutLinearF32 *ml, float32 index)
54 {
55 sint16 imin;
56 sint16 imax;
57 sint16 imid;
58
59 imin = 0;
60 imax = ml->segmentCount - 1;
61
62 if (ml->segments[1].boundary > ml->segments[0].boundary)
63 {
64 while (imin < imax)
65 {
66 imid = imin + (imax - imin) / 2;
67
68 if (index > ml->segments[imid].boundary)
69 {
70 imin = imid + 1;
71 }
72 else
73 {
74 imax = imid;
75 }
76 }
77 }
78 else
79 {
80 while (imin < imax)
81 {
82 imid = imin + (imax - imin) / 2;
83
84 if (index < ml->segments[imid].boundary)
85 {
86 imin = imid + 1;
87 }
88 else
89 {
90 imax = imid;
91 }
92 }
93 }
94
95 return (ml->segments[imin].gain * index) + ml->segments[imin].offset;
96 }
Ifx_LutLinearF32::segmentCount
sint8 segmentCount
Definition: Ifx_LutLinearF32.h:63
Ifx_LutLinearF32_searchBin
float32 Ifx_LutLinearF32_searchBin(const Ifx_LutLinearF32 *ml, float32 index)
Look-up table with binary search implementation.
Definition: Ifx_LutLinearF32.c:53
float32
float float32
Definition: Platform_Types.h:170
Ifx_LutLinearF32_Item::boundary
float32 boundary
segment input upper limit
Definition: Ifx_LutLinearF32.h:58
Ifx_LutLinearF32::segments
const Ifx_LutLinearF32_Item * segments
Definition: Ifx_LutLinearF32.h:64
sint16
short sint16
Definition: Platform_Types.h:129
Ifx_LutLinearF32
Definition: Ifx_LutLinearF32.h:61
Ifx_LutLinearF32_Item::offset
float32 offset
channel offset
Definition: Ifx_LutLinearF32.h:57
Ifx_LutLinearF32.h
Look-up functionality.
Ifx_LutLinearF32_Item::gain
float32 gain
channel gain
Definition: Ifx_LutLinearF32.h:56


iLLD_TC38A: Ifx_LutLinearF32.h Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_LutLinearF32.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_LutLinearF32.h
3 * \brief Look-up functionality
4 *
5 *
6 *
7 * \version disabled
8 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 * \defgroup library_srvsw_sysse_math_f32_lut_linear Look-up table (with linear interpolation)
43 * \ingroup library_srvsw_sysse_math_f32_lut
44 *
45 */
46
47 #ifndef IFX_LUTLINEARF32_H
48 #define IFX_LUTLINEARF32_H
49
50 //________________________________________________________________________________________
51 // INCLUDES
52 #include "Cpu/Std/Ifx_Types.h"
53
54 typedef struct
55 {
56 float32 gain; /**< \brief channel gain */
57 float32 offset; /**< \brief channel offset */
58 float32 boundary; /**< \brief segment input upper limit */
59 } Ifx_LutLinearF32_Item;
60
61 typedef struct
62 {
63 sint8 segmentCount;
64 const Ifx_LutLinearF32_Item *segments;
65 } Ifx_LutLinearF32;
66
67 //________________________________________________________________________________________
68 // FUNCTION PROTOTYPES
69
70 /** \addtogroup library_srvsw_sysse_math_f32_lut_linear
71 * \{ */
72 IFX_EXTERN float32 Ifx_LutLinearF32_searchBin(const Ifx_LutLinearF32 *ml, float32 index);
73 IFX_INLINE float32 Ifx_LutLinearF32_searchNegSeq(const Ifx_LutLinearF32 *ml, float32 index);
74 IFX_INLINE float32 Ifx_LutLinearF32_searchPosSeq(const Ifx_LutLinearF32 *ml, float32 index);
75 /** \} */
76
77 //________________________________________________________________________________________
78 // INLINE FUNCTION IMPLEMENTATION
79
80 /** \brief Look-up table with positive sequential search implementation
81 *
82 * Value inside table will be linearly interpolated
83 * Value outside table will be linearly extrapolated
84 *
85 * \param ml pointer to the multi-segment object
86 * \param index
87 * \return interpolated value */
88 IFX_INLINE float32 Ifx_LutLinearF32_searchPosSeq(const Ifx_LutLinearF32 *ml, float32 index)
89 {
90 sint8 i = 0;
91
92 while ((index > ml->segments[i].boundary) && (i < ml->segmentCount - 1))
93 {
94 i++;
95 }
96
97 return (ml->segments[i].gain * index) + ml->segments[i].offset;
98 }
99
100
101 /** \brief Look-up table with negative sequential search implementation
102 *
103 * Value inside table will be linearly interpolated
104 * Value outside table will be linearly extrapolated
105 *
106 * \param ml pointer to the multi-segment object
107 * \param index
108 * \return interpolated value */
109 IFX_INLINE float32 Ifx_LutLinearF32_searchNegSeq(const Ifx_LutLinearF32 *ml, float32 index)
110 {
111 sint8 i = ml->segmentCount - 1;
112
113 while ((i - 1 >= 0) && (index > ml->segments[i - 1].boundary))
114 {
115 i--;
116 }
117
118 return (ml->segments[i].gain * index) + ml->segments[i].offset;
119 }
120
121
122 #endif /* IFX_LUTLINEARF32_H */
Ifx_LutLinearF32::segmentCount
sint8 segmentCount
Definition: Ifx_LutLinearF32.h:63
Ifx_LutLinearF32_searchBin
IFX_EXTERN float32 Ifx_LutLinearF32_searchBin(const Ifx_LutLinearF32 *ml, float32 index)
Look-up table with binary search implementation.
Definition: Ifx_LutLinearF32.c:53
float32
float float32
Definition: Platform_Types.h:170
Ifx_LutLinearF32_Item::boundary
float32 boundary
segment input upper limit
Definition: Ifx_LutLinearF32.h:58
Ifx_LutLinearF32::segments
const Ifx_LutLinearF32_Item * segments
Definition: Ifx_LutLinearF32.h:64
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
Ifx_LutLinearF32_Item
Definition: Ifx_LutLinearF32.h:54
Ifx_LutLinearF32_searchNegSeq
IFX_INLINE float32 Ifx_LutLinearF32_searchNegSeq(const Ifx_LutLinearF32 *ml, float32 index)
Look-up table with negative sequential search implementation.
Definition: Ifx_LutLinearF32.h:109
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
Ifx_LutLinearF32
Definition: Ifx_LutLinearF32.h:61
Ifx_LutLinearF32_Item::offset
float32 offset
channel offset
Definition: Ifx_LutLinearF32.h:57
Ifx_LutLinearF32_searchPosSeq
IFX_INLINE float32 Ifx_LutLinearF32_searchPosSeq(const Ifx_LutLinearF32 *ml, float32 index)
Look-up table with positive sequential search implementation.
Definition: Ifx_LutLinearF32.h:88
sint8
signed char sint8
Definition: Platform_Types.h:125
Ifx_LutLinearF32_Item::gain
float32 gain
channel gain
Definition: Ifx_LutLinearF32.h:56


iLLD_TC38A: Ifx_LutSincosF32.c Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_LutSincosF32.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_LutSincosF32.c
3 * \brief Sin/Cos lookup functions with fixed-point angle data type
4 *
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42 #include "Ifx_LutSincosF32.h"
43
44 #include <math.h>
45
46 void Ifx_LutSincosF32_init(void)
47 {
48 #if IFX_LUT_TABLE_CONST == 0
49 { /* generate sin and cos table */
50 sint32 k;
51
52 for (k = 0; k <= (IFX_LUT_ANGLE_PI / 2); k++)
53 {
54 Ifx_g_LutSincosF32_table[k] = sinf((IFX_PI * 2 * k) / IFX_LUT_ANGLE_RESOLUTION);
55 }
56 }
57 #endif
58 }
59
60
61 float32 Ifx_LutSincosF32_sin(Ifx_Lut_FxpAngle fxpAngle)
62 {
63 float32 result;
64 fxpAngle = fxpAngle & (IFX_LUT_ANGLE_RESOLUTION - 1);
65
66 if (fxpAngle < (IFX_LUT_ANGLE_PI / 2))
67 {
68 result = Ifx_g_LutSincosF32_table[fxpAngle];
69 }
70 else if (fxpAngle < IFX_LUT_ANGLE_PI)
71 {
72 fxpAngle = IFX_LUT_ANGLE_PI - fxpAngle;
73 result = Ifx_g_LutSincosF32_table[fxpAngle];
74 }
75 else if (fxpAngle < (IFX_LUT_ANGLE_PI / 2 * 3))
76 {
77 fxpAngle = fxpAngle - IFX_LUT_ANGLE_PI;
78 result = -Ifx_g_LutSincosF32_table[fxpAngle];
79 }
80 else
81 {
82 fxpAngle = IFX_LUT_ANGLE_RESOLUTION - fxpAngle;
83 result = -Ifx_g_LutSincosF32_table[fxpAngle];
84 }
85
86 return result;
87 }
IFX_LUT_ANGLE_PI
#define IFX_LUT_ANGLE_PI
Value used as 180 degree angle.
Definition: Ifx_Lut.h:75
float32
float float32
Definition: Platform_Types.h:170
IFX_PI
#define IFX_PI
Definition: Ifx_Types.h:217
Ifx_LutSincosF32.h
Sin/Cos lookup functions with fixed-point angle data type.
Ifx_LutSincosF32_init
void Ifx_LutSincosF32_init(void)
Initialise the lookup tables.
Definition: Ifx_LutSincosF32.c:46
Ifx_g_LutSincosF32_table
IFX_EXTERN IFX_LUT_TABLE float32 Ifx_g_LutSincosF32_table[(IFX_LUT_ANGLE_PI/2)+1]
Look-up table for sin(IFX_PI*2*k/IFX_LUT_ANGLE_RESOLUTION), where k = 0..IFX_LUT_ANGLE_RESOLUTION.
Definition: Ifx_LutSincosF32.h:59
sint32
long sint32
Definition: Platform_Types.h:134
Ifx_LutSincosF32_sin
float32 Ifx_LutSincosF32_sin(Ifx_Lut_FxpAngle fxpAngle)
Sine lookup function.
Definition: Ifx_LutSincosF32.c:61
Ifx_Lut_FxpAngle
sint32 Ifx_Lut_FxpAngle
Fixed-point angle type.
Definition: Ifx_Lut.h:81
IFX_LUT_ANGLE_RESOLUTION
#define IFX_LUT_ANGLE_RESOLUTION
Define the cosinus and sinus table size.
Definition: Ifx_Lut.h:72


iLLD_TC38A: Ifx_LutSincosF32.h Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_LutSincosF32.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_LutSincosF32.h
3 * \brief Sin/Cos lookup functions with fixed-point angle data type
4 * \ingroup library_srvsw_sysse_math_lut_sincos
5 *
6 *
7 *
8 * \version disabled
9 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
10 *
11 *
12 * IMPORTANT NOTICE
13 *
14 * Use of this file is subject to the terms of use agreed between (i) you or
15 * the company in which ordinary course of business you are acting and (ii)
16 * Infineon Technologies AG or its licensees. If and as long as no such terms
17 * of use are agreed, use of this file is subject to following:
18 *
19 * Boost Software License - Version 1.0 - August 17th, 2003
20 *
21 * Permission is hereby granted, free of charge, to any person or organization
22 * obtaining a copy of the software and accompanying documentation covered by
23 * this license (the "Software") to use, reproduce, display, distribute,
24 * execute, and transmit the Software, and to prepare derivative works of the
25 * Software, and to permit third-parties to whom the Software is furnished to
26 * do so, all subject to the following:
27 *
28 * The copyright notices in the Software and this entire statement, including
29 * the above license grant, this restriction and the following disclaimer, must
30 * be included in all copies of the Software, in whole or in part, and all
31 * derivative works of the Software, unless such copies or derivative works are
32 * solely in the form of machine-executable object code generated by a source
33 * language processor.
34 *
35 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
36 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
37 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
38 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
39 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
40 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
41 * DEALINGS IN THE SOFTWARE.
42 *
43 * \defgroup library_srvsw_sysse_math_lut_sincos Sinus and cosinus Look-ups
44 * \ingroup library_srvsw_sysse_math_f32_lut
45 *
46 */
47
48 #ifndef IFX_LUTSINCOSF32_H
49 #define IFX_LUTSINCOSF32_H
50 //________________________________________________________________________________________
51
52 #include "SysSe/Math/Ifx_Cf32.h"
53 #include "Ifx_Lut.h"
54 //________________________________________________________________________________________
55
56 /**
57 * \brief Look-up table for sin(IFX_PI*2*k/IFX_LUT_ANGLE_RESOLUTION),
58 * where k = 0..IFX_LUT_ANGLE_RESOLUTION */
59 IFX_EXTERN IFX_LUT_TABLE float32 Ifx_g_LutSincosF32_table[(IFX_LUT_ANGLE_PI / 2) + 1];
60
61 /** \brief Initialise the lookup tables
62 * \note This is not required if (\ref IFX_LUT_TABLE_CONST == 1)
63 * \ingroup library_srvsw_sysse_math_lut_sincos
64 */
65 IFX_EXTERN void Ifx_LutSincosF32_init(void);
66
67 /**
68 * \brief Sine lookup function
69 * \param fxpAngle 0 .. (IFX_LUT_ANGLE_RESOLUTION - 1)
70 * \return sin(2*IFX_PI*fxpAngle/IFX_LUT_ANGLE_RESOLUTION)
71 * \ingroup library_srvsw_sysse_math_lut_sincos
72 */
73 IFX_EXTERN float32 Ifx_LutSincosF32_sin(Ifx_Lut_FxpAngle fxpAngle);
74
75 /**
76 * \brief Cosine lookup function
77 * \param fxpAngle 0 .. (IFX_LUT_ANGLE_RESOLUTION - 1), which represents 0 .. 2*IFX_PI
78 * \return cos(2*IFX_PI*fxpAngle/IFX_LUT_ANGLE_RESOLUTION)
79 * \ingroup library_srvsw_sysse_math_lut_sincos
80 */
81 IFX_INLINE float32 Ifx_LutSincosF32_cos(Ifx_Lut_FxpAngle fxpAngle)
82 {
83 return Ifx_LutSincosF32_sin((IFX_LUT_ANGLE_PI / 2) - fxpAngle);
84 }
85
86
87 /**
88 * \brief Sine and Cosine lookup function
89 * \param fxpAngle 0 .. (IFX_LUT_ANGLE_RESOLUTION - 1), which represents 0 .. 2*IFX_PI
90 * \retval real = cos(2*IFX_PI*fxpAngle/IFX_LUT_ANGLE_RESOLUTION)
91 * \retval imag = sin(2*IFX_PI*fxpAngle/IFX_LUT_ANGLE_RESOLUTION)
92 * \ingroup library_srvsw_sysse_math_lut_sincos
93 */
94 IFX_INLINE cfloat32 Ifx_LutSincosF32_cossin(Ifx_Lut_FxpAngle fxpAngle)
95 {
96 cfloat32 result;
97 result.imag = Ifx_LutSincosF32_sin(fxpAngle);
98 result.real = Ifx_LutSincosF32_sin((IFX_LUT_ANGLE_PI / 2) - fxpAngle);
99 return result;
100 }
101
102
103 //________________________________________________________________________________________
104 #endif
Ifx_Lut.h
Lookup defintion with fixed-point angle data type.
Ifx_LutSincosF32_cos
IFX_INLINE float32 Ifx_LutSincosF32_cos(Ifx_Lut_FxpAngle fxpAngle)
Cosine lookup function.
Definition: Ifx_LutSincosF32.h:81
IFX_LUT_ANGLE_PI
#define IFX_LUT_ANGLE_PI
Value used as 180 degree angle.
Definition: Ifx_Lut.h:75
Ifx_LutSincosF32_cossin
IFX_INLINE cfloat32 Ifx_LutSincosF32_cossin(Ifx_Lut_FxpAngle fxpAngle)
Sine and Cosine lookup function.
Definition: Ifx_LutSincosF32.h:94
IFX_LUT_TABLE
#define IFX_LUT_TABLE
Lookup table type modifier (stored in ROM)
Definition: Ifx_Lut.h:62
float32
float float32
Definition: Platform_Types.h:170
cfloat32::imag
float32 imag
Imaginary part.
Definition: Ifx_Types.h:61
cfloat32
Definition: Ifx_Types.h:58
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
cfloat32::real
float32 real
Real part.
Definition: Ifx_Types.h:60
Ifx_LutSincosF32_init
IFX_EXTERN void Ifx_LutSincosF32_init(void)
Initialise the lookup tables.
Definition: Ifx_LutSincosF32.c:46
Ifx_g_LutSincosF32_table
IFX_EXTERN IFX_LUT_TABLE float32 Ifx_g_LutSincosF32_table[(IFX_LUT_ANGLE_PI/2)+1]
Look-up table for sin(IFX_PI*2*k/IFX_LUT_ANGLE_RESOLUTION), where k = 0..IFX_LUT_ANGLE_RESOLUTION.
Definition: Ifx_LutSincosF32.h:59
Ifx_Cf32.h
Floating point signal, vector, and matrix library.
Ifx_LutSincosF32_sin
IFX_EXTERN float32 Ifx_LutSincosF32_sin(Ifx_Lut_FxpAngle fxpAngle)
Sine lookup function.
Definition: Ifx_LutSincosF32.c:61
Ifx_Lut_FxpAngle
sint32 Ifx_Lut_FxpAngle
Fixed-point angle type.
Definition: Ifx_Lut.h:81


iLLD_TC38A: Ifx_LutSincosF32_Table.c Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_LutSincosF32_Table.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_LutSincosF32_Table.c
3 * \brief Table data for Sin/Cos lookup functions
4 *
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * $Revision: 614 $
42 * $Date: 2013-03-04 14:09:48 +0100 (Mon, 04 Mar 2013) $
43 *
44 */
45
46 #include "Ifx_Lut.h"
47
48 #if IFX_LUT_TABLE_CONST == 0
49 /* FIXME Table size not consistent */
50 IFX_LUT_TABLE float32 Ifx_g_LutSincosF32_table[IFX_LUT_ANGLE_RESOLUTION + (IFX_LUT_ANGLE_RESOLUTION / 4)];
51 #else
52
53 #if (IFX_LUT_ANGLE_RESOLUTION != 4096)
54 #error "Inconsistent between Lookup Table and configuration. Please regenerate."
55 #endif
56
57 /*lint -e915*/
58 const float32 Ifx_g_LutSincosF32_table[1025] = {
59 0,
60 0.00153398018628477,
61 0.00306795676296598,
62 0.00460192612044857,
63 0.00613588464915448,
64 0.0076698287395311,
65 0.00920375478205982,
66 0.0107376591672645,
67 0.0122715382857199,
68 0.0138053885280604,
69 0.0153392062849881,
70 0.0168729879472817,
71 0.0184067299058048,
72 0.0199404285515144,
73 0.0214740802754695,
74 0.0230076814688394,
75 0.0245412285229123,
76 0.0260747178291039,
77 0.0276081457789657,
78 0.0291415087641937,
79 0.0306748031766366,
80 0.0322080254083046,
81 0.0337411718513776,
82 0.0352742388982139,
83 0.0368072229413588,
84 0.0383401203735527,
85 0.0398729275877398,
86 0.0414056409770767,
87 0.0429382569349408,
88 0.0444707718549387,
89 0.0460031821309146,
90 0.0475354841569593,
91 0.049067674327418,
92 0.0505997490368993,
93 0.0521317046802833,
94 0.0536635376527305,
95 0.0551952443496899,
96 0.0567268211669077,
97 0.0582582645004358,
98 0.0597895707466399,
99 0.0613207363022086,
100 0.0628517575641614,
101 0.0643826309298575,
102 0.0659133527970038,
103 0.0674439195636641,
104 0.0689743276282667,
105 0.0705045733896139,
106 0.0720346532468893,
107 0.0735645635996674,
108 0.0750943008479213,
109 0.0766238613920315,
110 0.0781532416327942,
111 0.0796824379714301,
112 0.0812114468095924,
113 0.0827402645493757,
114 0.0842688875933241,
115 0.0857973123444399,
116 0.0873255352061921,
117 0.0888535525825246,
118 0.090381360877865,
119 0.0919089564971327,
120 0.0934363358457478,
121 0.094963495329639,
122 0.0964904313552526,
123 0.0980171403295606,
124 0.0995436186600693,
125 0.101069862754828,
126 0.102595869022436,
127 0.104121633872055,
128 0.105647153713411,
129 0.107172424956809,
130 0.108697444013139,
131 0.110222207293883,
132 0.111746711211127,
133 0.113270952177564,
134 0.11479492660651,
135 0.116318630911905,
136 0.117842061508325,
137 0.119365214810991,
138 0.120888087235777,
139 0.122410675199216,
140 0.123932975118512,
141 0.125454983411546,
142 0.126976696496886,
143 0.128498110793793,
144 0.130019222722233,
145 0.131540028702883,
146 0.133060525157139,
147 0.134580708507126,
148 0.136100575175706,
149 0.137620121586486,
150 0.139139344163826,
151 0.140658239332849,
152 0.142176803519448,
153 0.143695033150294,
154 0.145212924652847,
155 0.146730474455362,
156 0.148247678986896,
157 0.149764534677322,
158 0.15128103795733,
159 0.152797185258443,
160 0.15431297301302,
161 0.155828397654265,
162 0.157343455616238,
163 0.158858143333861,
164 0.160372457242928,
165 0.161886393780112,
166 0.163399949382973,
167 0.16491312048997,
168 0.166425903540464,
169 0.167938294974731,
170 0.169450291233968,
171 0.170961888760301,
172 0.172473083996796,
173 0.173983873387464,
174 0.175494253377271,
175 0.177004220412149,
176 0.178513770938998,
177 0.1800229014057,
178 0.181531608261125,
179 0.183039887955141,
180 0.18454773693862,
181 0.186055151663447,
182 0.18756212858253,
183 0.189068664149806,
184 0.190574754820253,
185 0.192080397049892,
186 0.193585587295804,
187 0.195090322016128,
188 0.19659459767008,
189 0.198098410717954,
190 0.199601757621131,
191 0.201104634842092,
192 0.202607038844421,
193 0.204108966092817,
194 0.205610413053099,
195 0.207111376192219,
196 0.208611851978263,
197 0.21011183688047,
198 0.211611327369228,
199 0.213110319916091,
200 0.214608810993787,
201 0.21610679707622,
202 0.217604274638484,
203 0.21910124015687,
204 0.220597690108874,
205 0.222093620973204,
206 0.22358902922979,
207 0.225083911359793,
208 0.22657826384561,
209 0.228072083170886,
210 0.229565365820519,
211 0.231058108280671,
212 0.232550307038775,
213 0.234041958583543,
214 0.235533059404975,
215 0.237023605994367,
216 0.238513594844318,
217 0.240003022448741,
218 0.241491885302869,
219 0.242980179903264,
220 0.244467902747824,
221 0.245955050335795,
222 0.247441619167773,
223 0.24892760574572,
224 0.250413006572965,
225 0.251897818154217,
226 0.25338203699557,
227 0.254865659604515,
228 0.256348682489943,
229 0.257831102162159,
230 0.259312915132886,
231 0.260794117915276,
232 0.262274707023914,
233 0.263754678974831,
234 0.265234030285512,
235 0.266712757474898,
236 0.268190857063403,
237 0.269668325572915,
238 0.271145159526808,
239 0.272621355449949,
240 0.274096909868706,
241 0.275571819310958,
242 0.2770460803061,
243 0.278519689385053,
244 0.279992643080273,
245 0.281464937925758,
246 0.282936570457055,
247 0.284407537211272,
248 0.285877834727081,
249 0.28734745954473,
250 0.288816408206049,
251 0.290284677254462,
252 0.291752263234989,
253 0.293219162694259,
254 0.294685372180514,
255 0.296150888243624,
256 0.297615707435086,
257 0.29907982630804,
258 0.300543241417273,
259 0.302005949319228,
260 0.303467946572011,
261 0.304929229735402,
262 0.306389795370861,
263 0.307849640041535,
264 0.309308760312269,
265 0.310767152749611,
266 0.312224813921825,
267 0.313681740398892,
268 0.315137928752522,
269 0.316593375556166,
270 0.318048077385015,
271 0.319502030816016,
272 0.320955232427875,
273 0.32240767880107,
274 0.323859366517853,
275 0.325310292162263,
276 0.326760452320132,
277 0.328209843579092,
278 0.329658462528587,
279 0.331106305759876,
280 0.332553369866044,
281 0.333999651442009,
282 0.335445147084532,
283 0.33688985339222,
284 0.338333766965541,
285 0.339776884406827,
286 0.341219202320282,
287 0.342660717311994,
288 0.344101425989939,
289 0.345541324963989,
290 0.346980410845924,
291 0.348418680249435,
292 0.349856129790135,
293 0.351292756085567,
294 0.352728555755211,
295 0.35416352542049,
296 0.355597661704784,
297 0.35703096123343,
298 0.358463420633737,
299 0.359895036534988,
300 0.361325805568454,
301 0.362755724367397,
302 0.36418478956708,
303 0.365612997804774,
304 0.367040345719767,
305 0.368466829953372,
306 0.369892447148934,
307 0.371317193951838,
308 0.372741067009516,
309 0.374164062971458,
310 0.375586178489217,
311 0.377007410216418,
312 0.378427754808766,
313 0.379847208924051,
314 0.381265769222162,
315 0.38268343236509,
316 0.384100195016935,
317 0.385516053843919,
318 0.386931005514389,
319 0.388345046698826,
320 0.389758174069856,
321 0.391170384302254,
322 0.392581674072951,
323 0.393992040061048,
324 0.395401478947816,
325 0.39680998741671,
326 0.398217562153374,
327 0.399624199845647,
328 0.401029897183576,
329 0.402434650859418,
330 0.403838457567654,
331 0.40524131400499,
332 0.406643216870369,
333 0.408044162864979,
334 0.409444148692258,
335 0.410843171057904,
336 0.412241226669883,
337 0.413638312238435,
338 0.415034424476082,
339 0.416429560097637,
340 0.417823715820212,
341 0.419216888363224,
342 0.420609074448403,
343 0.4220002707998,
344 0.423390474143796,
345 0.424779681209109,
346 0.4261678887268,
347 0.427555093430282,
348 0.428941292055329,
349 0.430326481340083,
350 0.431710658025057,
351 0.433093818853152,
352 0.434475960569656,
353 0.435857079922255,
354 0.437237173661044,
355 0.438616238538528,
356 0.439994271309633,
357 0.441371268731717,
358 0.44274722756457,
359 0.444122144570429,
360 0.445496016513982,
361 0.446868840162374,
362 0.44824061228522,
363 0.449611329654607,
364 0.450980989045104,
365 0.452349587233771,
366 0.453717121000164,
367 0.455083587126344,
368 0.456448982396884,
369 0.457813303598877,
370 0.459176547521944,
371 0.46053871095824,
372 0.461899790702463,
373 0.46325978355186,
374 0.464618686306238,
375 0.465976495767966,
376 0.467333208741988,
377 0.468688822035828,
378 0.470043332459596,
379 0.471396736825998,
380 0.472749031950343,
381 0.47410021465055,
382 0.475450281747156,
383 0.476799230063322,
384 0.478147056424843,
385 0.479493757660153,
386 0.480839330600334,
387 0.482183772079123,
388 0.483527078932919,
389 0.484869248000791,
390 0.486210276124486,
391 0.487550160148436,
392 0.488888896919763,
393 0.490226483288291,
394 0.49156291610655,
395 0.492898192229784,
396 0.49423230851596,
397 0.495565261825773,
398 0.496897049022654,
399 0.498227666972782,
400 0.499557112545082,
401 0.500885382611241,
402 0.502212474045711,
403 0.503538383725718,
404 0.504863108531268,
405 0.506186645345155,
406 0.507508991052971,
407 0.508830142543107,
408 0.510150096706767,
409 0.51146885043797,
410 0.512786400633563,
411 0.514102744193222,
412 0.515417878019463,
413 0.51673179901765,
414 0.518044504095999,
415 0.51935599016559,
416 0.520666254140367,
417 0.521975292937154,
418 0.523283103475656,
419 0.524589682678469,
420 0.525895027471085,
421 0.527199134781901,
422 0.528502001542228,
423 0.529803624686295,
424 0.531104001151255,
425 0.532403127877198,
426 0.533701001807153,
427 0.534997619887097,
428 0.536292979065963,
429 0.537587076295645,
430 0.538879908531008,
431 0.540171472729893,
432 0.541461765853123,
433 0.542750784864516,
434 0.544038526730884,
435 0.545324988422046,
436 0.546610166910835,
437 0.5478940591731,
438 0.54917666218772,
439 0.550457972936605,
440 0.551737988404707,
441 0.553016705580027,
442 0.55429412145362,
443 0.555570233019602,
444 0.55684503727516,
445 0.558118531220556,
446 0.559390711859136,
447 0.560661576197336,
448 0.561931121244689,
449 0.563199344013834,
450 0.564466241520519,
451 0.565731810783613,
452 0.566996048825109,
453 0.568258952670131,
454 0.569520519346947,
455 0.570780745886967,
456 0.572039629324757,
457 0.573297166698042,
458 0.574553355047716,
459 0.575808191417845,
460 0.577061672855679,
461 0.578313796411656,
462 0.579564559139406,
463 0.580813958095765,
464 0.582061990340775,
465 0.583308652937698,
466 0.584553942953015,
467 0.585797857456439,
468 0.587040393520918,
469 0.588281548222645,
470 0.589521318641064,
471 0.590759701858874,
472 0.591996694962041,
473 0.5932322950398,
474 0.594466499184664,
475 0.595699304492433,
476 0.596930708062197,
477 0.598160706996342,
478 0.599389298400565,
479 0.600616479383869,
480 0.60184224705858,
481 0.603066598540348,
482 0.604289530948156,
483 0.605511041404326,
484 0.606731127034524,
485 0.607949784967774,
486 0.609167012336453,
487 0.610382806276309,
488 0.611597163926462,
489 0.61281008242941,
490 0.614021558931038,
491 0.615231590580627,
492 0.616440174530854,
493 0.617647307937804,
494 0.618852987960976,
495 0.620057211763289,
496 0.621259976511088,
497 0.62246127937415,
498 0.623661117525695,
499 0.624859488142386,
500 0.626056388404344,
501 0.627251815495144,
502 0.628445766601833,
503 0.629638238914927,
504 0.630829229628424,
505 0.632018735939809,
506 0.633206755050057,
507 0.634393284163645,
508 0.635578320488556,
509 0.636761861236284,
510 0.637943903621844,
511 0.639124444863776,
512 0.640303482184152,
513 0.641481012808583,
514 0.642657033966227,
515 0.643831542889791,
516 0.645004536815544,
517 0.646176012983316,
518 0.647345968636512,
519 0.648514401022112,
520 0.649681307390683,
521 0.650846684996381,
522 0.65201053109696,
523 0.653172842953777,
524 0.6543336178318,
525 0.655492852999615,
526 0.656650545729429,
527 0.657806693297079,
528 0.658961292982037,
529 0.66011434206742,
530 0.661265837839992,
531 0.662415777590172,
532 0.66356415861204,
533 0.664710978203345,
534 0.66585623366551,
535 0.666999922303637,
536 0.668142041426518,
537 0.669282588346636,
538 0.670421560380173,
539 0.671558954847018,
540 0.672694769070773,
541 0.673829000378756,
542 0.674961646102012,
543 0.676092703575316,
544 0.67722217013718,
545 0.678350043129861,
546 0.679476319899365,
547 0.680600997795453,
548 0.68172407417165,
549 0.682845546385248,
550 0.683965411797315,
551 0.6850836677727,
552 0.686200311680039,
553 0.687315340891759,
554 0.68842875278409,
555 0.689540544737067,
556 0.690650714134535,
557 0.691759258364158,
558 0.692866174817425,
559 0.693971460889654,
560 0.695075113980001,
561 0.696177131491463,
562 0.697277510830887,
563 0.698376249408973,
564 0.699473344640284,
565 0.700568793943248,
566 0.701662594740168,
567 0.702754744457225,
568 0.703845240524485,
569 0.704934080375905,
570 0.70602126144934,
571 0.707106781186547,
572 0.708190637033195,
573 0.709272826438866,
574 0.710353346857062,
575 0.711432195745216,
576 0.712509370564692,
577 0.713584868780794,
578 0.714658687862769,
579 0.715730825283819,
580 0.7168012785211,
581 0.717870045055732,
582 0.718937122372804,
583 0.720002507961382,
584 0.721066199314508,
585 0.722128193929215,
586 0.723188489306527,
587 0.724247082951467,
588 0.725303972373061,
589 0.726359155084346,
590 0.727412628602376,
591 0.728464390448225,
592 0.729514438146997,
593 0.730562769227828,
594 0.731609381223893,
595 0.732654271672413,
596 0.73369743811466,
597 0.734738878095963,
598 0.735778589165713,
599 0.73681656887737,
600 0.737852814788466,
601 0.738887324460615,
602 0.739920095459516,
603 0.740951125354959,
604 0.741980411720831,
605 0.743007952135122,
606 0.744033744179929,
607 0.745057785441466,
608 0.746080073510064,
609 0.74710060598018,
610 0.748119380450403,
611 0.749136394523459,
612 0.750151645806215,
613 0.751165131909686,
614 0.752176850449043,
615 0.753186799043612,
616 0.754194975316889,
617 0.755201376896537,
618 0.756206001414395,
619 0.757208846506484,
620 0.758209909813015,
621 0.759209188978388,
622 0.760206681651202,
623 0.761202385484262,
624 0.762196298134579,
625 0.763188417263381,
626 0.764178740536117,
627 0.765167265622459,
628 0.766153990196313,
629 0.76713891193582,
630 0.768122028523365,
631 0.76910333764558,
632 0.770082836993348,
633 0.771060524261814,
634 0.772036397150384,
635 0.773010453362737,
636 0.773982690606823,
637 0.774953106594874,
638 0.775921699043408,
639 0.776888465673232,
640 0.777853404209453,
641 0.778816512381476,
642 0.779777787923014,
643 0.780737228572094,
644 0.781694832071059,
645 0.782650596166576,
646 0.783604518609638,
647 0.784556597155575,
648 0.785506829564054,
649 0.786455213599086,
650 0.787401747029031,
651 0.788346427626606,
652 0.789289253168886,
653 0.79023022143731,
654 0.79116933021769,
655 0.792106577300212,
656 0.793041960479444,
657 0.793975477554337,
658 0.794907126328237,
659 0.795836904608883,
660 0.796764810208419,
661 0.797690840943391,
662 0.798614994634761,
663 0.799537269107905,
664 0.800457662192623,
665 0.80137617172314,
666 0.802292795538116,
667 0.803207531480645,
668 0.804120377398266,
669 0.805031331142964,
670 0.805940390571176,
671 0.806847553543799,
672 0.80775281792619,
673 0.808656181588175,
674 0.809557642404051,
675 0.810457198252595,
676 0.811354847017064,
677 0.812250586585204,
678 0.813144414849254,
679 0.814036329705948,
680 0.814926329056527,
681 0.815814410806734,
682 0.816700572866828,
683 0.817584813151584,
684 0.818467129580299,
685 0.819347520076797,
686 0.820225982569435,
687 0.821102514991105,
688 0.821977115279242,
689 0.822849781375826,
690 0.823720511227391,
691 0.824589302785025,
692 0.825456154004377,
693 0.826321062845663,
694 0.827184027273669,
695 0.828045045257756,
696 0.828904114771865,
697 0.829761233794523,
698 0.830616400308846,
699 0.831469612302545,
700 0.83232086776793,
701 0.833170164701913,
702 0.834017501106018,
703 0.83486287498638,
704 0.835706284353753,
705 0.836547727223512,
706 0.837387201615662,
707 0.838224705554838,
708 0.839060237070313,
709 0.839893794195999,
710 0.840725374970458,
711 0.841554977436898,
712 0.842382599643186,
713 0.843208239641845,
714 0.844031895490066,
715 0.844853565249707,
716 0.845673246987299,
717 0.846490938774052,
718 0.847306638685858,
719 0.848120344803297,
720 0.84893205521164,
721 0.849741768000852,
722 0.850549481265603,
723 0.851355193105265,
724 0.85215890162392,
725 0.852960604930364,
726 0.853760301138111,
727 0.854557988365401,
728 0.855353664735196,
729 0.856147328375194,
730 0.856938977417829,
731 0.857728610000272,
732 0.858516224264443,
733 0.859301818357008,
734 0.86008539042939,
735 0.860866938637767,
736 0.861646461143081,
737 0.862423956111041,
738 0.863199421712124,
739 0.863972856121587,
740 0.864744257519462,
741 0.865513624090569,
742 0.866280954024513,
743 0.867046245515693,
744 0.867809496763303,
745 0.868570705971341,
746 0.869329871348607,
747 0.870086991108711,
748 0.870842063470079,
749 0.871595086655951,
750 0.872346058894392,
751 0.87309497841829,
752 0.873841843465367,
753 0.874586652278176,
754 0.875329403104111,
755 0.876070094195407,
756 0.876808723809146,
757 0.877545290207261,
758 0.878279791656541,
759 0.879012226428633,
760 0.879742592800047,
761 0.880470889052161,
762 0.881197113471222,
763 0.881921264348355,
764 0.882643339979563,
765 0.883363338665732,
766 0.884081258712635,
767 0.884797098430938,
768 0.8855108561362,
769 0.886222530148881,
770 0.886932118794342,
771 0.887639620402854,
772 0.888345033309596,
773 0.889048355854665,
774 0.889749586383073,
775 0.890448723244758,
776 0.891145764794583,
777 0.891840709392343,
778 0.892533555402765,
779 0.893224301195515,
780 0.893912945145203,
781 0.894599485631383,
782 0.895283921038558,
783 0.895966249756185,
784 0.89664647017868,
785 0.897324580705418,
786 0.89800057974074,
787 0.898674465693954,
788 0.899346236979341,
789 0.90001589201616,
790 0.900683429228647,
791 0.901348847046022,
792 0.902012143902493,
793 0.902673318237259,
794 0.903332368494512,
795 0.903989293123443,
796 0.904644090578246,
797 0.905296759318119,
798 0.905947297807268,
799 0.906595704514915,
800 0.907241977915296,
801 0.907886116487666,
802 0.908528118716306,
803 0.909167983090522,
804 0.909805708104652,
805 0.910441292258067,
806 0.911074734055176,
807 0.91170603200543,
808 0.912335184623323,
809 0.912962190428398,
810 0.913587047945251,
811 0.914209755703531,
812 0.914830312237946,
813 0.915448716088268,
814 0.916064965799332,
815 0.916679059921043,
816 0.917290997008378,
817 0.91790077562139,
818 0.918508394325212,
819 0.919113851690058,
820 0.919717146291227,
821 0.92031827670911,
822 0.92091724152919,
823 0.921514039342042,
824 0.922108668743345,
825 0.922701128333879,
826 0.923291416719528,
827 0.923879532511287,
828 0.924465474325263,
829 0.925049240782678,
830 0.925630830509873,
831 0.926210242138311,
832 0.926787474304582,
833 0.927362525650401,
834 0.927935394822618,
835 0.928506080473215,
836 0.929074581259316,
837 0.929640895843181,
838 0.930205022892219,
839 0.930766961078984,
840 0.93132670908118,
841 0.931884265581668,
842 0.932439629268462,
843 0.932992798834739,
844 0.933543772978836,
845 0.934092550404259,
846 0.934639129819681,
847 0.935183509938947,
848 0.93572568948108,
849 0.936265667170278,
850 0.936803441735922,
851 0.937339011912575,
852 0.93787237643999,
853 0.938403534063108,
854 0.938932483532064,
855 0.93945922360219,
856 0.939983753034014,
857 0.940506070593268,
858 0.941026175050889,
859 0.941544065183021,
860 0.942059739771017,
861 0.942573197601447,
862 0.943084437466093,
863 0.94359345816196,
864 0.944100258491273,
865 0.94460483726148,
866 0.945107193285261,
867 0.945607325380521,
868 0.946105232370403,
869 0.946600913083284,
870 0.947094366352777,
871 0.947585591017741,
872 0.948074585922276,
873 0.94856134991573,
874 0.949045881852701,
875 0.949528180593037,
876 0.950008245001843,
877 0.950486073949482,
878 0.950961666311575,
879 0.951435020969008,
880 0.951906136807932,
881 0.952375012719766,
882 0.952841647601199,
883 0.953306040354194,
884 0.95376818988599,
885 0.954228095109106,
886 0.954685754941338,
887 0.955141168305771,
888 0.955594334130771,
889 0.956045251349996,
890 0.956493918902395,
891 0.956940335732209,
892 0.957384500788976,
893 0.957826413027533,
894 0.958266071408018,
895 0.958703474895872,
896 0.959138622461842,
897 0.959571513081985,
898 0.960002145737666,
899 0.960430519415566,
900 0.96085663310768,
901 0.961280485811321,
902 0.961702076529123,
903 0.962121404269042,
904 0.962538468044359,
905 0.962953266873684,
906 0.963365799780954,
907 0.96377606579544,
908 0.964184063951746,
909 0.964589793289813,
910 0.96499325285492,
911 0.965394441697689,
912 0.965793358874084,
913 0.966190003445413,
914 0.966584374478333,
915 0.966976471044852,
916 0.967366292222329,
917 0.967753837093476,
918 0.968139104746362,
919 0.968522094274417,
920 0.968902804776429,
921 0.969281235356549,
922 0.969657385124292,
923 0.970031253194544,
924 0.970402838687556,
925 0.97077214072895,
926 0.971139158449725,
927 0.971503890986252,
928 0.971866337480279,
929 0.972226497078936,
930 0.972584368934732,
931 0.97293995220556,
932 0.973293246054698,
933 0.973644249650812,
934 0.973992962167956,
935 0.974339382785576,
936 0.974683510688511,
937 0.975025345066994,
938 0.975364885116657,
939 0.975702130038529,
940 0.976037079039039,
941 0.976369731330021,
942 0.976700086128712,
943 0.977028142657754,
944 0.9773539001452,
945 0.97767735782451,
946 0.977998514934557,
947 0.978317370719628,
948 0.978633924429423,
949 0.978948175319062,
950 0.979260122649082,
951 0.979569765685441,
952 0.979877103699518,
953 0.980182135968117,
954 0.980484861773469,
955 0.98078528040323,
956 0.981083391150487,
957 0.981379193313755,
958 0.981672686196983,
959 0.981963869109555,
960 0.982252741366289,
961 0.982539302287441,
962 0.982823551198705,
963 0.983105487431216,
964 0.983385110321551,
965 0.98366241921173,
966 0.983937413449219,
967 0.984210092386929,
968 0.984480455383221,
969 0.984748501801904,
970 0.98501423101224,
971 0.985277642388941,
972 0.985538735312176,
973 0.985797509167567,
974 0.986053963346195,
975 0.986308097244599,
976 0.986559910264775,
977 0.986809401814185,
978 0.987056571305751,
979 0.987301418157858,
980 0.987543941794359,
981 0.987784141644572,
982 0.988022017143284,
983 0.988257567730749,
984 0.988490792852697,
985 0.988721691960324,
986 0.988950264510303,
987 0.989176509964781,
988 0.98940042779138,
989 0.989622017463201,
990 0.989841278458821,
991 0.990058210262297,
992 0.990272812363169,
993 0.990485084256457,
994 0.990695025442665,
995 0.99090263542778,
996 0.991107913723277,
997 0.991310859846115,
998 0.991511473318744,
999 0.9917097536691,
1000 0.991905700430609,
1001 0.992099313142192,
1002 0.992290591348257,
1003 0.99247953459871,
1004 0.992666142448948,
1005 0.992850414459865,
1006 0.993032350197851,
1007 0.993211949234794,
1008 0.993389211148081,
1009 0.993564135520595,
1010 0.993736721940725,
1011 0.993906970002356,
1012 0.994074879304879,
1013 0.994240449453188,
1014 0.994403680057679,
1015 0.994564570734255,
1016 0.994723121104326,
1017 0.994879330794806,
1018 0.995033199438119,
1019 0.995184726672197,
1020 0.995333912140482,
1021 0.995480755491927,
1022 0.995625256380994,
1023 0.99576741446766,
1024 0.995907229417412,
1025 0.996044700901252,
1026 0.996179828595697,
1027 0.996312612182778,
1028 0.996443051350043,
1029 0.996571145790555,
1030 0.996696895202896,
1031 0.996820299291166,
1032 0.996941357764982,
1033 0.997060070339483,
1034 0.997176436735326,
1035 0.99729045667869,
1036 0.997402129901275,
1037 0.997511456140303,
1038 0.99761843513852,
1039 0.997723066644192,
1040 0.997825350411112,
1041 0.997925286198596,
1042 0.998022873771486,
1043 0.998118112900149,
1044 0.998211003360478,
1045 0.998301544933893,
1046 0.99838973740734,
1047 0.998475580573295,
1048 0.998559074229759,
1049 0.998640218180265,
1050 0.998719012233873,
1051 0.998795456205172,
1052 0.998869549914284,
1053 0.998941293186857,
1054 0.999010685854073,
1055 0.999077727752645,
1056 0.999142418724817,
1057 0.999204758618364,
1058 0.999264747286594,
1059 0.99932238458835,
1060 0.999377670388003,
1061 0.999430604555462,
1062 0.999481186966167,
1063 0.999529417501093,
1064 0.999575296046749,
1065 0.999618822495179,
1066 0.999659996743959,
1067 0.999698818696204,
1068 0.999735288260562,
1069 0.999769405351215,
1070 0.999801169887884,
1071 0.999830581795823,
1072 0.999857641005824,
1073 0.999882347454213,
1074 0.999904701082853,
1075 0.999924701839145,
1076 0.999942349676024,
1077 0.999957644551964,
1078 0.999970586430974,
1079 0.999981175282601,
1080 0.999989411081928,
1081 0.999995293809576,
1082 0.999998823451702,
1083 1,
1084 };
1085
1086 #endif
Ifx_Lut.h
Lookup defintion with fixed-point angle data type.
IFX_LUT_TABLE
#define IFX_LUT_TABLE
Lookup table type modifier (stored in ROM)
Definition: Ifx_Lut.h:62
float32
float float32
Definition: Platform_Types.h:170
Ifx_g_LutSincosF32_table
const float32 Ifx_g_LutSincosF32_table[1025]
Definition: Ifx_LutSincosF32_Table.c:58
IFX_LUT_ANGLE_RESOLUTION
#define IFX_LUT_ANGLE_RESOLUTION
Define the cosinus and sinus table size.
Definition: Ifx_Lut.h:72


iLLD_TC38A: Ifx_RampF32.c Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_RampF32.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_RampF32.c
3 * \brief Ramp function
4 *
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "SysSe/Math/Ifx_RampF32.h"
44
45 /**
46 * \brief Execute the Ramp function
47 *
48 * NOTE: shall be called every 'period'.
49 * The period was defined by Ifx_RampF32_init() or Ifx_RampF32_setSlewRate()
50 *
51 * \param ramp Pointer to the Ifx_RampF32 object
52 * \return Actual value
53 */
54 float32 Ifx_RampF32_step(Ifx_RampF32 *ramp)
55 {
56 if (ramp->uk < ramp->ik)
57 {
58 ramp->uk = __minf(ramp->ik, ramp->uk + ramp->delta);
59 }
60 else if (ramp->uk > ramp->ik)
61 {
62 ramp->uk = __maxf(ramp->ik, ramp->uk - ramp->delta);
63 }
64 else
65 {}
66
67 return ramp->uk;
68 }
Ifx_RampF32_step
float32 Ifx_RampF32_step(Ifx_RampF32 *ramp)
Execute the Ramp function.
Definition: Ifx_RampF32.c:54
float32
float float32
Definition: Platform_Types.h:170
__maxf
#define __maxf
Definition: IfxCpu_IntrinsicsDcc.h:1637
Ifx_RampF32::uk
float32 uk
Definition: Ifx_RampF32.h:57
Ifx_RampF32::ik
float32 ik
Definition: Ifx_RampF32.h:58
__minf
#define __minf
Definition: IfxCpu_IntrinsicsDcc.h:1633
Ifx_RampF32::delta
float32 delta
Definition: Ifx_RampF32.h:59
Ifx_RampF32
Ifx_RampF32 object definition.
Definition: Ifx_RampF32.h:55
Ifx_RampF32.h
Ramp function.


iLLD_TC38A: Ifx_RampF32.h Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_RampF32.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_RampF32.h
3 * \brief Ramp function
4 *
5 *
6 *
7 * \version disabled
8 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 * \defgroup library_srvsw_sysse_math_f32_ramp Ramp
43 * \ingroup library_srvsw_sysse_math_f32
44 *
45 */
46
47 #ifndef IFX_RAMPF32_H
48 #define IFX_RAMPF32_H
49
50 #include "Cpu/Std/IfxCpu_Intrinsics.h"
51
52 /**
53 * \brief Ifx_RampF32 object definition
54 */
55 typedef struct
56 {
57 float32 uk;
58 float32 ik;
59 float32 delta;
60 } Ifx_RampF32;
61
62 //________________________________________________________________________________________
63 // FUNCTION PROTOTYPES
64
65 /** \addtogroup library_srvsw_sysse_math_f32_ramp
66 * \{ */
67 IFX_INLINE void Ifx_RampF32_init(Ifx_RampF32 *ramp, float32 slewRate, float32 period);
68 IFX_INLINE void Ifx_RampF32_reset(Ifx_RampF32 *ramp);
69 IFX_INLINE void Ifx_RampF32_setSlewRate(Ifx_RampF32 *ramp, float32 slewRate, float32 period);
70 IFX_INLINE void Ifx_RampF32_setRef(Ifx_RampF32 *ramp, float32 ref);
71 IFX_INLINE float32 Ifx_RampF32_getValue(Ifx_RampF32 *ramp);
72 IFX_EXTERN float32 Ifx_RampF32_step(Ifx_RampF32 *ramp);
73 /** \} */
74
75 //________________________________________________________________________________________
76 // INLINE FUNCTION IMPLEMENTATION
77
78 /**
79 * \brief Reset internal values
80 * \param ramp Pointer to the Ifx_RampF32 object
81 */
82 IFX_INLINE void Ifx_RampF32_reset(Ifx_RampF32 *ramp)
83 {
84 ramp->ik = 0;
85 ramp->uk = 0;
86 }
87
88
89 /**
90 * \brief Get the reference value
91 * \param ramp Pointer to the Ifx_RampF32 object
92 * \return Returns the ref value
93 */
94 IFX_INLINE float32 Ifx_RampF32_getRef(Ifx_RampF32 *ramp)
95 {
96 return ramp->ik;
97 }
98
99
100 /**
101 * \brief Set the maximum slew rate
102 * \param ramp Pointer to the Ifx_RampF32 object
103 * \param slewRate Maximum slew rate, value per second
104 * \param period Sampling period of the Ifx_RampF32_step() function
105 */
106 IFX_INLINE void Ifx_RampF32_setSlewRate(Ifx_RampF32 *ramp, float32 slewRate, float32 period)
107 {
108 ramp->delta = slewRate * period;
109 }
110
111
112 /**
113 * \brief Initialize the Ifx_RampF32 object.
114 * \param ramp Pointer to the Ifx_RampF32 object
115 * \param slewRate Maximum slew rate, value per second
116 * \param period Sampling period of the Ifx_RampF32_step() function
117 */
118 IFX_INLINE void Ifx_RampF32_init(Ifx_RampF32 *ramp, float32 slewRate, float32 period)
119 {
120 Ifx_RampF32_setSlewRate(ramp, slewRate, period);
121 Ifx_RampF32_reset(ramp);
122 }
123
124
125 /**
126 * \brief Set the reference value
127 * \param ramp Pointer to the Ifx_RampF32 object
128 * \param ref Reference value
129 */
130 IFX_INLINE void Ifx_RampF32_setRef(Ifx_RampF32 *ramp, float32 ref)
131 {
132 ramp->ik = ref;
133 }
134
135
136 /**
137 * \brief Get the actual output value
138 * \param ramp Pointer to the Ifx_RampF32 object
139 * \return Actual value
140 */
141 IFX_INLINE float32 Ifx_RampF32_getValue(Ifx_RampF32 *ramp)
142 {
143 return ramp->uk;
144 }
145
146
147 #endif /* IFX_RAMPF32_H */
Ifx_RampF32_getValue
IFX_INLINE float32 Ifx_RampF32_getValue(Ifx_RampF32 *ramp)
Get the actual output value.
Definition: Ifx_RampF32.h:141
Ifx_RampF32_getRef
IFX_INLINE float32 Ifx_RampF32_getRef(Ifx_RampF32 *ramp)
Get the reference value.
Definition: Ifx_RampF32.h:94
Ifx_RampF32_step
IFX_EXTERN float32 Ifx_RampF32_step(Ifx_RampF32 *ramp)
Execute the Ramp function.
Definition: Ifx_RampF32.c:54
float32
float float32
Definition: Platform_Types.h:170
Ifx_RampF32_init
IFX_INLINE void Ifx_RampF32_init(Ifx_RampF32 *ramp, float32 slewRate, float32 period)
Initialize the Ifx_RampF32 object.
Definition: Ifx_RampF32.h:118
IfxCpu_Intrinsics.h
Ifx_RampF32::uk
float32 uk
Definition: Ifx_RampF32.h:57
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
Ifx_RampF32::ik
float32 ik
Definition: Ifx_RampF32.h:58
Ifx_RampF32_reset
IFX_INLINE void Ifx_RampF32_reset(Ifx_RampF32 *ramp)
Reset internal values.
Definition: Ifx_RampF32.h:82
Ifx_RampF32_setSlewRate
IFX_INLINE void Ifx_RampF32_setSlewRate(Ifx_RampF32 *ramp, float32 slewRate, float32 period)
Set the maximum slew rate.
Definition: Ifx_RampF32.h:106
Ifx_RampF32::delta
float32 delta
Definition: Ifx_RampF32.h:59
Ifx_RampF32
Ifx_RampF32 object definition.
Definition: Ifx_RampF32.h:55
Ifx_RampF32_setRef
IFX_INLINE void Ifx_RampF32_setRef(Ifx_RampF32 *ramp, float32 ref)
Set the reference value.
Definition: Ifx_RampF32.h:130


iLLD_TC38A: Ifx_Shell.c Source File

  • Service
  • CpuGeneric
  • SysSe
  • Comm
Ifx_Shell.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_Shell.c
3 * \brief shell functions.
4 *
5 * \version disabled
6 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 //---------------------------------------------------------------------------
43 #include "Ifx_Shell.h"
44 #include "_Utilities/Ifx_Assert.h"
45 #include "Cpu/Std/IfxCpu_Intrinsics.h"
46
47 #include <string.h>
48 #include <stdlib.h>
49 #include <stdio.h>
50
51 #define IFX_SHELL_LLD "%lld "
52 #define IFX_SHELL_LLX "%llx "
53 #define IFX_SHELL_LLU "%llu "
54
55 //---------------------------------------------------------------------------
56 #define IFX_SHELL_MAX_MESSAGE_SIZE 255
57 //---------------------------------------------------------------------------
58
59 /* Macro to detect space character */
60 #define ISSPACE(c) (((c) == ' ') || ((c) == '\t'))
61
62 /* Macro to only execute parameter if echo is enabled for this shell */
63 #define IFX_SHELL_IF_ECHO(X) {if (shell->control.echo) {X; }}
64
65 /* Macro to write lots of spaces */
66 #define IFX_SHELL_WRITE_SPACES(X) \
67 {int ii; for (ii = 0; ii < (X); ii++) {IfxStdIf_DPipe_print(shell->io, " "); }}
68
69 /* Macro to write lots of backspaces */
70 #define IFX_SHELL_WRITE_BACKSPACES(X) \
71 {int ii; for (ii = 0; ii < (X); ii++) {IfxStdIf_DPipe_print(shell->io, "\b"); }}
72
73 //---------------------------------------------------------------------------
74 char Ifx_Shell_cmdBuffer[IFX_CFG_SHELL_CMD_LINE_SIZE * IFX_CFG_SHELL_CMD_HISTORY_SIZE];
75 //---------------------------------------------------------------------------
76 void Ifx_Shell_execute(Ifx_Shell *shell, pchar commandLine);
77 void Ifx_Shell_cmdEscapeProcess(Ifx_Shell *shell, char EscapeChar1, char EscapeChar2);
78 const Ifx_Shell_Command *Ifx_Shell_commandListFind(Ifx_Shell *shell, pchar commandLine, pchar *args, Ifx_Shell_CommandListConst *commandList);
79 static boolean Ifx_Shell_matchCommand(pchar *argsPtr, pchar *match);
80
81 //---------------------------------------------------------------------------
82 /**
83 * \brief Check whether the args is already at the end.
84 * \param args The argument null-terminated string
85 */
86 boolean Ifx_Shell_isEndOfLine(pchar args)
87 {
88 return ((args == NULL_PTR) || (*args == IFX_SHELL_NULL_CHAR)) ? TRUE : FALSE;
89 }
90
91
92 static boolean Ifx_Shell_writeResult(Ifx_Shell *shell, Ifx_SizeT Code)
93 {
94 Ifx_SizeT length = sizeof(Code);
95 boolean result = IfxStdIf_DPipe_write(shell->io, &Code, &length, TIME_INFINITE);
96
97 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, result != FALSE);
98
99 return result;
100 }
101
102
103 //---------------------------------------------------------------------------
104 boolean Ifx_Shell_showHelpSingle(Ifx_Shell_CommandListConst commandList, IfxStdIf_DPipe *io, boolean briefOnly, boolean singleCommand)
105 {
106 const Ifx_Shell_Command *command = commandList;
107 uint32 index = 0;
108 pchar space = "";
109 pchar spaceParam = "";
110
111 while (command->commandLine != NULL_PTR)
112 {
113 pchar help = command->help;
114 pchar chunk;
115 boolean isParam = FALSE;
116 boolean isSyntax = FALSE;
117 IfxStdIf_DPipe_print(io, "%s%s", space, command->commandLine);
118
119 while (*help != IFX_SHELL_NULL_CHAR)
120 {
121 Ifx_SizeT count;
122 pchar matchp = "/p";
123 pchar matchs = "/s";
124 spaceParam = "";
125
126 if (Ifx_Shell_matchCommand(&help, &matchp))
127 { /* Parameter description found */
128 isParam = TRUE;
129 isSyntax = FALSE,
130 spaceParam = " ";
131 }
132 else if (Ifx_Shell_matchCommand(&help, &matchs))
133 { /* Parameter description found */
134 isParam = FALSE;
135 isSyntax = TRUE,
136 spaceParam = " SYNTAX: ";
137 }
138 else
139 { /* Other text */
140 if (isParam)
141 { /* Show param details*/
142 spaceParam = " ";
143 }
144 else if (isSyntax)
145 { /* Show param details*/
146 spaceParam = " ";
147 }
148 }
149
150 /* Split print by ENDL */
151 chunk = strstr(help, ENDL);
152
153 if (chunk == NULL_PTR)
154 {
155 chunk = help + strlen(help);
156 }
157 else
158 {
159 if (!briefOnly)
160 {
161 chunk += strlen(ENDL);
162 }
163 }
164
165 count = chunk - help;
166 IfxStdIf_DPipe_print(io, "%s%s", space, spaceParam);
167 IfxStdIf_DPipe_write(io, (void *)help, &count, TIME_INFINITE);
168
169 help += count;
170
171 if (briefOnly)
172 { /* Print Brief only */
173 break;
174 }
175 }
176
177 IfxStdIf_DPipe_print(io, ENDL);
178
179 if ((command->call == NULL_PTR) && (index == 0))
180 {
181 index = 1;
182 space = " ";
183 }
184
185 command = &command[1];
186
187 if (singleCommand)
188 {
189 break;
190 }
191 }
192
193 return TRUE;
194 }
195
196
197 boolean Ifx_Shell_showHelpSingleCommand(pchar args, void *shellPtr, IfxStdIf_DPipe *io)
198 {
199 Ifx_Shell_CommandListConst commandList;
200 const Ifx_Shell_Command *shellCommand = Ifx_Shell_commandListFind(shellPtr, args, &args, &commandList);
201
202 if (shellCommand != NULL_PTR)
203 {
204 if (shellCommand->call == NULL_PTR)
205 {
206 Ifx_Shell_showHelpSingle(commandList, io, FALSE, FALSE);
207 }
208 else
209 {
210 if (commandList->call == NULL_PTR)
211 {
212 IfxStdIf_DPipe_print(io, "%s ", commandList->commandLine);
213 }
214
215 Ifx_Shell_showHelpSingle(shellCommand, io, FALSE, TRUE);
216 }
217
218 return TRUE;
219 }
220 else
221 {
222 IfxStdIf_DPipe_print(io, "unknown command");
223 return FALSE;
224 }
225 }
226
227
228 boolean Ifx_Shell_showHelp(pchar args, void *shellPtr, IfxStdIf_DPipe *io)
229 {
230 sint32 i;
231 Ifx_Shell *shell = shellPtr;
232 boolean result = TRUE;
233
234 if (*args == IFX_SHELL_NULL_CHAR)
235 {
236 for (i = 0; i < IFX_CFG_SHELL_COMMAND_LISTS; i++)
237 {
238 if (shell->commandList[i] != NULL_PTR)
239 {
240 Ifx_Shell_showHelpSingle(shell->commandList[i], io, TRUE, FALSE);
241 }
242 }
243 }
244 else
245 {
246 result = Ifx_Shell_showHelpSingleCommand(args, shellPtr, io);
247 }
248
249 return result;
250 }
251
252
253 boolean Ifx_Shell_protocolStart(pchar args, void *data, IfxStdIf_DPipe *io)
254 {
255 Ifx_Shell *shell = data;
256 boolean Result = TRUE;
257
258 if (Ifx_Shell_matchToken(&args, "?") != FALSE)
259 {
260 IfxStdIf_DPipe_print(io, "Syntax : protocol start" ENDL);
261 IfxStdIf_DPipe_print(io, " > start a protocol" ENDL);
262 }
263 else if (Ifx_Shell_matchToken(&args, "start") != FALSE)
264 {
265 if ((shell->protocol.start != NULL_PTR) && (shell->protocol.object != NULL_PTR))
266 {
267 Result = shell->protocol.start(shell->protocol.object, io);
268 shell->protocol.started = (Result != FALSE);
269
270 if (shell->protocol.onStart != NULL_PTR)
271 {
272 shell->protocol.onStart(shell->protocol.object, shell->protocol.onStartData);
273 }
274 }
275 else
276 {
277 Result = FALSE;
278 }
279 }
280 else
281 {}
282
283 return Result;
284 }
285
286
287 boolean Ifx_Shell_bbProtocolStart(pchar args, void *data, IfxStdIf_DPipe *io)
288 {
289 boolean result = TRUE;
290
291 if (Ifx_Shell_matchToken(&args, "?") != FALSE)
292 {
293 IfxStdIf_DPipe_print(io, "Syntax : protocol start" ENDL);
294 IfxStdIf_DPipe_print(io, " > start a protocol" ENDL);
295 }
296 else if (Ifx_Shell_matchToken(&args, "protocol") != FALSE)
297 {
298 result = Ifx_Shell_protocolStart(args, data, io);
299 }
300 else
301 {}
302
303 return result;
304 }
305
306
307 //---------------------------------------------------------------------------
308 void Ifx_Shell_initConfig(Ifx_Shell_Config *config)
309 {
310 uint32 i;
311
312 for (i = 0; i < IFX_CFG_SHELL_COMMAND_LISTS; i++)
313 {
314 config->commandList[i] = NULL_PTR;
315 }
316
317 config->standardIo = NULL_PTR;
318 config->echo = TRUE;
319 config->protocol.execute = NULL_PTR;
320 config->protocol.object = NULL_PTR;
321 config->protocol.onStart = NULL_PTR;
322 config->protocol.onStartData = NULL_PTR;
323 config->protocol.start = NULL_PTR;
324 config->protocol.started = FALSE;
325 config->sendResultCode = FALSE;
326 config->showPrompt = TRUE;
327 config->standardIo = NULL_PTR;
328 }
329
330
331 boolean Ifx_Shell_init(Ifx_Shell *shell, const Ifx_Shell_Config *config)
332 {
333 sint32 i;
334 char **CmdHistory = NULL_PTR; /* Pointer to array of pointers for command history items */
335
336 /* Ensure state variable is cleared */
337 memset(shell, 0, sizeof(*shell));
338
339 shell->protocol = config->protocol;
340 shell->protocol.started = FALSE;
341
342 shell->io = config->standardIo;
343 shell->control.showPrompt = config->showPrompt;
344 shell->control.sendResultCode = config->sendResultCode;
345 shell->control.echo = config->echo;
346 shell->control.echoError = TRUE;
347 shell->control.enabled = TRUE;
348
349 shell->locals.escBracketNum = IFX_SHELL_NULL_CHAR; /* Used to cache number in sequence "ESC [ 1/2/3/4 ~" */
350 shell->locals.cmdState = IFX_SHELL_CMD_STATE_NORMAL;
351
352 /* Copy command line buffer pointer into state variable */
353 shell->cmd.cmdStr = shell->locals.cmdStr;
354
355 /* Initialize command history space and cache pointer */
356 memset(Ifx_Shell_cmdBuffer, 0, sizeof(Ifx_Shell_cmdBuffer));
357 shell->cmdHistory[0] = &Ifx_Shell_cmdBuffer[0];
358
359 for (i = 0; i < IFX_CFG_SHELL_COMMAND_LISTS; i++)
360 {
361 shell->commandList[i] = config->commandList[i];
362 }
363
364 /* Initialize command history pointers */
365 CmdHistory = shell->cmdHistory;
366
367 for (i = 1; i < IFX_CFG_SHELL_CMD_HISTORY_SIZE; i++)
368 {
369 CmdHistory[i] = &CmdHistory[i - 1][IFX_CFG_SHELL_CMD_LINE_SIZE]; /* Items are just offsets into a large allocated area */
370 }
371
372 shell->cmd.historyItem = IFX_SHELL_CMD_HISTORY_NO_ITEM;
373
374 /* Pre-load useful commands into history buffer */
375 strcpy(CmdHistory[0], "help");
376 //strcpy(CmdHistory[1], "protocol start");
377
378 if (shell->control.showPrompt != 0)
379 {
380 IfxStdIf_DPipe_print(shell->io, ENDL);
381 IfxStdIf_DPipe_print(shell->io, IFX_CFG_SHELL_PROMPT);
382 }
383
384 return TRUE;
385 }
386
387
388 void Ifx_Shell_process(Ifx_Shell *shell)
389 {
390 Ifx_SizeT i, j; /* Loop variables */
391 Ifx_SizeT count;
392 Ifx_SizeT readCount;
393 boolean NormalKeyPress; /* Indicates if this is a normal keypress, i.e. not part of an escape code */
394
395 Ifx_Shell_CmdLine *Cmd = &shell->cmd;
396 char *inputbuffer = shell->locals.inputbuffer;
397 char *cmdStr = shell->locals.cmdStr;
398 char **CmdHistory = shell->cmdHistory;
399
400 if (shell->control.enabled == 0)
401 {
402 return;
403 }
404
405 if ((shell->protocol.object != NULL_PTR) && (shell->protocol.started != FALSE))
406 {
407 shell->protocol.execute(shell->protocol.object);
408 }
409 else
410 {
411 /**** NORMAL MODE ****/
412
413 /********************************************************************************/
414 /* Read all characters until enter inclusive. */
415 /* If the command is bigger than IFX_SHELL_CMD_SIZE, the command is ignored. */
416 /* */
417 /* Escape sequences are handled by a state machine. */
418 /* The following escape sequences (prefix "ESC [") are supported: */
419 /* */
420 /* A - up B - down C - right D - left */
421 /* 1~ - HOME 2~ - INSERT 3~ - DELETE 5~ - END */
422 /* */
423 /* Backspace ('\b') is also supported. */
424 /********************************************************************************/
425
426 count = 0;
427 readCount = IFX_CFG_SHELL_CMD_LINE_SIZE - count;
428 IfxStdIf_DPipe_read(shell->io, &inputbuffer[count], &readCount, TIME_NULL);
429 count += readCount;
430
431 for (i = 0; i < count; i++)
432 {
433 /* By default, we assume character is part of escape sequence */
434 NormalKeyPress = FALSE;
435
436 /* Process key pressed */
437 switch (inputbuffer[i])
438 {
439 /* New line (ENTER) */
440 case '\n':
441 case '\r':
442 /* Print new line to terminal if requested */
443 IFX_SHELL_IF_ECHO(IfxStdIf_DPipe_print(shell->io, ENDL))
444
445 /* Execute command if length is valid - i.e. not an over-full buffer
446 * (prevents attempted execution of junk) */
447 if (Cmd->length < IFX_CFG_SHELL_CMD_LINE_SIZE)
448 {
449 cmdStr[Cmd->length] = IFX_SHELL_NULL_CHAR; /* Terminate cmdStr */
450
451 if (Cmd->historyAdd != FALSE)
452 {
453 /* Shuffle history up */
454 for (j = IFX_CFG_SHELL_CMD_HISTORY_SIZE - 1; j > 0; j--)
455 {
456 /* Copy text */
457 strncpy(CmdHistory[j], CmdHistory[j - 1], IFX_CFG_SHELL_CMD_LINE_SIZE);
458 }
459
460 /* Copy in new entry */
461 strncpy(CmdHistory[0], cmdStr, IFX_CFG_SHELL_CMD_LINE_SIZE);
462 }
463
464 /* Execute command */
465 Ifx_Shell_execute(shell, cmdStr);
466 }
467
468 /* Show prompt if in main shell */
469 if (shell->control.showPrompt != 0)
470 {
471 IfxStdIf_DPipe_print(shell->io, IFX_CFG_SHELL_PROMPT);
472 }
473
474 /* Reset command line buffer length */
475 Cmd->length = 0;
476
477 /* Reset command line buffer cursor position */
478 Cmd->cursor = 0;
479
480 /* Clear flag */
481 Cmd->historyAdd = FALSE;
482
483 /* Ensure we're not in command history list */
484 Cmd->historyItem = IFX_SHELL_CMD_HISTORY_NO_ITEM;
485 break;
486
487 /* Backspace (may occur in middle of text if cursor location is not at end) */
488 case '\b':
489
490 if (Cmd->cursor > 0)
491 {
492 /* Update on screen */
493 if (shell->control.echo != 0)
494 {
495 /* Move left one character */
496 IfxStdIf_DPipe_print(shell->io, "\b");
497
498 /* Update line with new characters */
499 for (j = Cmd->cursor; j < Cmd->length; j++)
500 {
501 IfxStdIf_DPipe_print(shell->io, "%c", cmdStr[j]);
502 }
503
504 /* Write over duplicated character at end */
505 IfxStdIf_DPipe_print(shell->io, " ");
506 IFX_SHELL_WRITE_BACKSPACES((Cmd->length - Cmd->cursor) + 1)
507 }
508
509 /* Update in command line variable. Shuffle text left */
510 strncpy(&cmdStr[Cmd->cursor - 1], &cmdStr[Cmd->cursor], Cmd->length - Cmd->cursor);
511
512 /* Terminate string at end of shorter string */
513 cmdStr[Cmd->length - 1] = IFX_SHELL_NULL_CHAR;
514
515 Cmd->length--;
516 Cmd->cursor--;
517
518 /* Command line has been modified */
519 Cmd->historyAdd = TRUE;
520 }
521
522 break;
523
524 /* Escape character */
525 case '\x1B': /*'\x1B': */
526 shell->locals.cmdState = IFX_SHELL_CMD_STATE_ESCAPE;
527 break;
528
529 /* '[' - check to see if this is second part of an escape sequence */
530 case '[':
531
532 if (shell->locals.cmdState == IFX_SHELL_CMD_STATE_ESCAPE)
533 {
534 /* ESC [ pressed */
535 shell->locals.cmdState = IFX_SHELL_CMD_STATE_ESCAPE_BRACKET;
536 }
537 else
538 {
539 NormalKeyPress = TRUE;
540 }
541
542 break;
543
544 /* Check for supported characters in escape sequences ( ESC [ A/B/C/D ) */
545 case 'A':
546 case 'B':
547 case 'C':
548 case 'D':
549
550 if (shell->locals.cmdState == IFX_SHELL_CMD_STATE_ESCAPE_BRACKET)
551 {
552 /* Process arrow keys */
553 Ifx_Shell_cmdEscapeProcess(shell, inputbuffer[i], 0);
554
555 /* End of escape sequence */
556 shell->locals.cmdState = IFX_SHELL_CMD_STATE_NORMAL;
557 }
558 else
559 {
560 NormalKeyPress = TRUE;
561 }
562
563 break;
564
565 /* Check for supported characters in escape sequences (ESC [ 2/4/5 ~) */
566 case '1':
567 case '2':
568 case '3':
569 case '4':
570
571 if (shell->locals.cmdState == IFX_SHELL_CMD_STATE_ESCAPE_BRACKET)
572 {
573 /* Store number for use once complete escape sequence is confirmed (below) */
574 shell->locals.escBracketNum = inputbuffer[i];
575 shell->locals.cmdState = IFX_SHELL_CMD_STATE_ESCAPE_BRACKET_NUMBER;
576 }
577 else
578 {
579 NormalKeyPress = TRUE;
580 }
581
582 break;
583
584 /* Check for supported characters in escape sequences (ESC [ 2/4/5 ~) */
585 case '~':
586
587 if (shell->locals.cmdState == IFX_SHELL_CMD_STATE_ESCAPE_BRACKET_NUMBER)
588 {
589 /* Process home/delete/end */
590 Ifx_Shell_cmdEscapeProcess(shell, shell->locals.escBracketNum, '~');
591
592 /* End of escape sequence */
593 shell->locals.cmdState = IFX_SHELL_CMD_STATE_NORMAL;
594 }
595 else
596 {
597 NormalKeyPress = TRUE;
598 }
599
600 break;
601
602 /* Normal character - add to command string */
603 default:
604 NormalKeyPress = TRUE;
605 break;
606 }
607
608 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, Cmd->length >= Cmd->cursor); /* Sanity check */
609
610 /* If this was a normal key press (not part of an escape sequence),
611 * add it to the command string */
612 if (NormalKeyPress != FALSE)
613 {
614 /* Ensure state machine is reset */
615 shell->locals.cmdState = IFX_SHELL_CMD_STATE_NORMAL;
616
617 /* If not filled buffer, add in this character */
618 if (Cmd->length < (IFX_CFG_SHELL_CMD_LINE_SIZE - 1))
619 {
620 /* Command line has been modified */
621 Cmd->historyAdd = TRUE;
622
623 /* Copy into command line */
624 cmdStr[Cmd->cursor] = inputbuffer[i];
625 Cmd->cursor++;
626
627 /* Update length of buffer */
628 Cmd->length = __max(Cmd->length, Cmd->cursor);
629
630 if (shell->control.echo != 0)
631 {
632 /* echo character to shell output if requested */
633 shell->locals.echo[0] = inputbuffer[i];
634 IfxStdIf_DPipe_print(shell->io, shell->locals.echo);
635 }
636 }
637 else
638 {
639 /* Line too long - ignore further characters */
640 Cmd->historyAdd = FALSE; /* Invalid command line */
641 }
642 }
643 }
644 }
645 }
646
647
648 void Ifx_Shell_deinit(Ifx_Shell *shell)
649 {
650 (void)shell; /* ignore compiler warning; */
651 // tbd free necessary memory
652 }
653
654
655 pchar Ifx_Shell_skipWhitespace(pchar args)
656 {
657 if (args != NULL_PTR)
658 {
659 while ((*args != IFX_SHELL_NULL_CHAR) && (ISSPACE(*args)))
660 {
661 args = &args[1];
662 }
663 }
664
665 return args;
666 }
667
668
669 boolean Ifx_Shell_matchToken(pchar *argsPtr, pchar token)
670 {
671 pchar savedArguments = *argsPtr;
672 char buffer[256];
673 boolean result = FALSE;
674
675 if (Ifx_Shell_parseToken(argsPtr, buffer, Ifx_COUNTOF(buffer)) != FALSE)
676 {
677 if (strcmp(token, buffer) == 0)
678 {
679 result = TRUE;
680 }
681 }
682
683 if (result == FALSE)
684 {
685 // No match: don't advance pointer
686 *argsPtr = savedArguments;
687 }
688
689 return result;
690 }
691
692
693 static boolean Ifx_Shell_matchCommand(pchar *argsPtr, pchar *match)
694 {
695 boolean result = FALSE;
696 pchar savedArguments = *argsPtr;
697 pchar savedMatch = *match;
698 char buffer0[256];
699 char buffer1[256];
700
701 if ((Ifx_Shell_parseToken(argsPtr, buffer0, Ifx_COUNTOF(buffer0)) != FALSE)
702 && (Ifx_Shell_parseToken(match, buffer1, Ifx_COUNTOF(buffer1)) != FALSE))
703 {
704 if (strcmp(buffer1, buffer0) == 0)
705 {
706 result = TRUE;
707 }
708 }
709
710 if (result == FALSE)
711 {
712 // No match: don't advance pointer
713 *argsPtr = savedArguments;
714 *match = savedMatch;
715 }
716
717 return result;
718 }
719
720
721 boolean Ifx_Shell_parseToken(pchar *argsPtr, char *tokenBuffer, int bufferLength)
722 {
723 int mindex = 0;
724 pchar args = Ifx_Shell_skipWhitespace(*argsPtr);
725
726 tokenBuffer[0] = IFX_SHELL_NULL_CHAR;
727
728 if (args == NULL_PTR)
729 {
730 return FALSE;
731 }
732
733 if (*args == '\"')
734 {
735 args = &args[1];
736
737 while ((*args != IFX_SHELL_NULL_CHAR) && (*args != '\"'))
738 {
739 if (mindex < bufferLength)
740 {
741 tokenBuffer[mindex] = *args;
742 mindex++;
743 }
744
745 args = &args[1];
746 }
747
748 // error if no closing quote
749 if (*args != '\"')
750 {
751 return FALSE;
752 }
753
754 args = &args[1];
755 }
756 else
757 {
758 // don't allow unquoted empty tokens
759 if (*args == IFX_SHELL_NULL_CHAR)
760 {
761 return FALSE;
762 }
763
764 while ((*args != IFX_SHELL_NULL_CHAR) && (!ISSPACE(*args)))
765 {
766 if (mindex < bufferLength)
767 {
768 tokenBuffer[mindex] = *args;
769 mindex++;
770 }
771
772 args = &args[1];
773 }
774 }
775
776 // make sure string is zero terminated
777 if (bufferLength > 0)
778 {
779 tokenBuffer[__min(mindex, bufferLength - 1)] = IFX_SHELL_NULL_CHAR;
780 }
781
782 *argsPtr = Ifx_Shell_skipWhitespace(args);
783
784 return TRUE;
785 }
786
787
788 boolean Ifx_Shell_parseAddress(pchar *argsPtr, void **address)
789 {
790 char buffer[32];
791 boolean result;
792
793 *address = 0;
794
795 if (Ifx_Shell_parseToken(argsPtr, buffer, Ifx_COUNTOF(buffer)) == FALSE)
796 {
797 result = FALSE;
798 }
799 else
800 {
801 result = (buffer[0] != IFX_SHELL_NULL_CHAR) && (sscanf(buffer, "%x ", (unsigned int *)address) == 1);
802 }
803
804 return result;
805 }
806
807
808 boolean Ifx_Shell_parseSInt32(pchar *argsPtr, sint32 *value)
809 {
810 sint64 value64;
811 boolean result;
812
813 *value = 0;
814
815 if (Ifx_Shell_parseSInt64(argsPtr, &value64) == FALSE)
816 {
817 result = FALSE;
818 }
819 else
820 {
821 *value = (sint32)value64;
822 result = TRUE;
823 }
824
825 return result;
826 }
827
828
829 boolean Ifx_Shell_parseUInt32(pchar *argsPtr, uint32 *value, boolean hex)
830 {
831 uint64 value64;
832 boolean result;
833
834 *value = 0;
835
836 if (Ifx_Shell_parseUInt64(argsPtr, &value64, hex) == FALSE)
837 {
838 result = FALSE;
839 }
840 else
841 {
842 *value = (uint32)value64;
843 result = TRUE;
844 }
845
846 return result;
847 }
848
849
850 boolean Ifx_Shell_parseSInt64(pchar *argsPtr, sint64 *value)
851 {
852 char buffer[64];
853 boolean result;
854
855 *value = 0;
856
857 if (Ifx_Shell_parseToken(argsPtr, buffer, Ifx_COUNTOF(buffer)) == FALSE)
858 {
859 result = FALSE;
860 }
861 else
862 {
863 result = (buffer[0] != IFX_SHELL_NULL_CHAR) && (sscanf(buffer, IFX_SHELL_LLD, value) == 1);
864 }
865
866 return result;
867 }
868
869
870 boolean Ifx_Shell_parseUInt64(pchar *argsPtr, uint64 *value, boolean hex)
871 {
872 char buffer[64];
873 boolean result;
874
875 *value = 0;
876
877 if (Ifx_Shell_parseToken(argsPtr, buffer, Ifx_COUNTOF(buffer)) == FALSE)
878 {
879 result = FALSE;
880 }
881 else
882 {
883 char *bufferPointer = buffer;
884
885 if ((buffer[0] == '0') && (buffer[1] == 'x'))
886 {
887 bufferPointer = &bufferPointer[2];
888 hex = TRUE;
889 }
890
891 if (hex != FALSE)
892 {
893 result = (bufferPointer[0] != IFX_SHELL_NULL_CHAR) && (sscanf(bufferPointer, IFX_SHELL_LLX, value) == 1);
894 }
895 else
896 {
897 result = (bufferPointer[0] != IFX_SHELL_NULL_CHAR) && (sscanf(bufferPointer, IFX_SHELL_LLU, value) == 1);
898 }
899 }
900
901 return result;
902 }
903
904
905 boolean Ifx_Shell_parseFloat64(pchar *argsPtr, float64 *value)
906 {
907 char buffer[64];
908 boolean result;
909
910 *value = 0;
911
912 if (Ifx_Shell_parseToken(argsPtr, buffer, Ifx_COUNTOF(buffer)) == FALSE)
913 {
914 result = FALSE;
915 }
916 else
917 {
918 result = (buffer[0] != IFX_SHELL_NULL_CHAR) && (sscanf(buffer, "%lf ", value) == 1);
919 }
920
921 return result;
922 }
923
924
925 boolean Ifx_Shell_parseFloat32(pchar *argsPtr, float32 *value)
926 {
927 char buffer[64];
928 boolean result;
929
930 *value = 0;
931
932 if (Ifx_Shell_parseToken(argsPtr, buffer, Ifx_COUNTOF(buffer)) == FALSE)
933 {
934 result = FALSE;
935 }
936 else
937 {
938 result = (buffer[0] != IFX_SHELL_NULL_CHAR) && (sscanf(buffer, "%f ", value) == 1);
939 }
940
941 return result;
942 }
943
944
945 const Ifx_Shell_Command *Ifx_Shell_commandFind(Ifx_Shell_CommandListConst commandList, pchar commandLine, pchar *args, uint32 *match)
946 {
947 const Ifx_Shell_Command *command = commandList;
948 const Ifx_Shell_Command *result = NULL_PTR;
949 pchar cmdLineTemp = commandLine;
950 uint32 matchInit = 0;
951 uint32 index = 0;
952
953 boolean hasPrefix;
954
955 hasPrefix = (command->commandLine != NULL_PTR) && (command->call == NULL_PTR);
956 *match = 0;
957
958 while (command->commandLine != NULL_PTR)
959 {
960 pchar commandTemp = command->commandLine;
961 pchar commandLineTemp = cmdLineTemp;
962 char buffer[256];
963 uint32 matchCount = matchInit;
964
965 while (Ifx_Shell_matchCommand(&commandLineTemp, &commandTemp) != FALSE)
966 {
967 matchCount++;
968 }
969
970 if ((matchCount > *match) && (Ifx_Shell_parseToken(&commandTemp, buffer, Ifx_COUNTOF(buffer)) == FALSE))
971 {
972 if ((index == 0) && (command->call == NULL_PTR))
973 { /* List has a prefix */
974 cmdLineTemp = commandLineTemp;
975 matchInit = matchCount;
976 }
977
978 *match = matchCount;
979 *args = commandLineTemp;
980 result = command;
981 }
982 else
983 {
984 if ((index == 0) && hasPrefix)
985 {
986 /* Prefix does not match */
987 break;
988 }
989 }
990
991 command = &command[1];
992
993 index++;
994 }
995
996 return result;
997 }
998
999
1000 const Ifx_Shell_Command *Ifx_Shell_commandListFind(Ifx_Shell *shell, pchar commandLine, pchar *args, Ifx_Shell_CommandListConst *commandList)
1001 {
1002 int i;
1003 const Ifx_Shell_Command *shellCommand = NULL_PTR;
1004 const Ifx_Shell_Command *Command = NULL_PTR;
1005 uint32 matchMax = 0;
1006 uint32 match;
1007
1008 for (i = 0; i < IFX_CFG_SHELL_COMMAND_LISTS; i++)
1009 {
1010 if (shell->commandList[i] != NULL_PTR)
1011 {
1012 shellCommand = Ifx_Shell_commandFind(shell->commandList[i], commandLine, args, &match);
1013
1014 if ((shellCommand != NULL_PTR) && (match > matchMax))
1015 {
1016 matchMax = match;
1017 Command = shellCommand;
1018 *commandList = shell->commandList[i];
1019 }
1020 }
1021 }
1022
1023 return Command;
1024 }
1025
1026
1027 void Ifx_Shell_execute(Ifx_Shell *shell, pchar commandLine)
1028 {
1029 pchar args = NULL_PTR;
1030 Ifx_Shell_CommandListConst commandList;
1031 const Ifx_Shell_Command *shellCommand = Ifx_Shell_commandListFind(shell, commandLine, &args, &commandList);
1032
1033 if (shellCommand != NULL_PTR)
1034 {
1035 if (shellCommand->call == NULL_PTR)
1036 {
1037 Ifx_Shell_showHelp(commandLine, shell, shell->io);
1038 }
1039 else if (shellCommand->call(args, shellCommand->data, shell->io) != FALSE)
1040 {
1041 if (shell->control.sendResultCode != 0)
1042 {
1043 Ifx_Shell_writeResult(shell, Ifx_Shell_ResultCode_ok);
1044 }
1045 }
1046 else
1047 {
1048 if (shell->control.sendResultCode != 0)
1049 {
1050 Ifx_Shell_writeResult(shell, Ifx_Shell_ResultCode_nok);
1051 }
1052 else if (shell->control.echoError != 0)
1053 {
1054 IfxStdIf_DPipe_print(shell->io, "\r\nShell command error: %s" ENDL, commandLine);
1055 }
1056 else
1057 {}
1058 }
1059 }
1060 else
1061 {
1062 if (commandLine[0] != IFX_SHELL_NULL_CHAR)
1063 {
1064 if (shell->control.sendResultCode != 0)
1065 {
1066 Ifx_Shell_writeResult(shell, Ifx_Shell_ResultCode_unknown);
1067 }
1068 else if (shell->control.echoError != 0)
1069 {
1070 IfxStdIf_DPipe_print(shell->io, "\r\nUnknown command: %s" ENDL, commandLine);
1071 }
1072 else
1073 {}
1074 }
1075 }
1076 }
1077
1078
1079 /****************************************************************************************/
1080 /* Processes escape sequences, including handling command history. */
1081 /* The following escape sequences (prefix "ESC [") are supported: */
1082 /* A - up B - down C - right D - left */
1083 /* 1~ - HOME 2~ - INSERT 3~ - DELETE 4~ - END */
1084 /* */
1085 /* Parameters: */
1086 /* EscapeChar1 - First character to follow ESC [ */
1087 /* EscapeChar2 - Second character following ESC [ , if applicable */
1088 /* */
1089 /****************************************************************************************/
1090 void Ifx_Shell_cmdEscapeProcess(Ifx_Shell *shell, char EscapeChar1, char EscapeChar2)
1091 {
1092 Ifx_Shell_CmdLine *Cmd = NULL_PTR; /* Command line editing state */
1093 char *cmdStr = NULL_PTR; /* Cached pointer to command line being edited */
1094 sint32 i = 0; /* Loop variable */
1095
1096 /* Validate parameters */
1097 boolean result = (shell != NULL_PTR);
1098
1099 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, result != FALSE);
1100
1101 if (result == FALSE)
1102 {
1103 return; /* ERROR CASE - no thread data available! */
1104 }
1105
1106 /* Cache command state and command line pointer */
1107 Cmd = &shell->cmd;
1108 cmdStr = Cmd->cmdStr;
1109
1110 /* Validate command line state */
1111 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, cmdStr != NULL_PTR);
1112 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, Cmd->cursor < IFX_CFG_SHELL_CMD_LINE_SIZE);
1113 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, Cmd->length < IFX_CFG_SHELL_CMD_LINE_SIZE);
1114
1115 /* Switch on first character after ESC [ */
1116 switch (EscapeChar1)
1117 {
1118 case 'A': /* Up arrow */
1119
1120 if (Cmd->historyItem == IFX_SHELL_CMD_HISTORY_NO_ITEM)
1121 {
1122 /* Not using list at the moment - take most recent item [0] */
1123 Cmd->historyItem = 0;
1124 }
1125 else
1126 {
1127 if (Cmd->historyItem < (IFX_CFG_SHELL_CMD_HISTORY_SIZE - 1))
1128 {
1129 /* If not already at oldest, go back one in list */
1130 Cmd->historyItem++;
1131 }
1132 }
1133
1134 /* Copy text into buffer */
1135 strncpy(cmdStr, shell->cmdHistory[Cmd->historyItem], IFX_CFG_SHELL_CMD_LINE_SIZE);
1136
1137 /* echo to screen if requested */
1138 if (shell->control.echo != 0)
1139 {
1140 IFX_SHELL_WRITE_BACKSPACES(Cmd->cursor) /* Move cursor back to start */
1141 IFX_SHELL_WRITE_SPACES(Cmd->length) /* Overwrite text with spaces */
1142 IFX_SHELL_WRITE_BACKSPACES(Cmd->length) /* Move cursor back to start */
1143 IfxStdIf_DPipe_print(shell->io, cmdStr); /* Copy buffer to screen */
1144 }
1145
1146 Cmd->cursor = (Ifx_SizeT)strlen(cmdStr); /* Store cursor position */
1147 Cmd->length = Cmd->cursor; /* Store command line length */
1148 Cmd->historyAdd = FALSE; /* Don't add back to history unless modified */
1149 break;
1150
1151 case 'B': /* Down arrow */
1152
1153 if ((Cmd->historyItem == IFX_SHELL_CMD_HISTORY_NO_ITEM) || (Cmd->historyItem == 0))
1154 {
1155 /* Not using list at the moment, or have dropped off the end - just clear command line */
1156 if (shell->control.echo != 0)
1157 {
1158 IFX_SHELL_WRITE_BACKSPACES(Cmd->cursor) /* Move cursor back to start */
1159 IFX_SHELL_WRITE_SPACES(Cmd->length) /* Overwrite text with spaces */
1160 IFX_SHELL_WRITE_BACKSPACES(Cmd->length) /* Move cursor back to start */
1161 }
1162
1163 Cmd->length = 0; /* Reset command line length */
1164 Cmd->cursor = 0;
1165 Cmd->historyItem = IFX_SHELL_CMD_HISTORY_NO_ITEM; /* Ensure we are not using list */
1166 }
1167 else
1168 {
1169 /* Within list - move to more recent entry */
1170 Cmd->historyItem--;
1171
1172 /* Copy text into buffer */
1173 strncpy(cmdStr, shell->cmdHistory[Cmd->historyItem], IFX_CFG_SHELL_CMD_LINE_SIZE);
1174
1175 if (shell->control.echo != 0)
1176 {
1177 IFX_SHELL_WRITE_BACKSPACES(Cmd->cursor) /* Move cursor back to start */
1178 IFX_SHELL_WRITE_SPACES(Cmd->length) /* Overwrite text with spaces */
1179 IFX_SHELL_WRITE_BACKSPACES(Cmd->length) /* Move cursor back to start */
1180 IfxStdIf_DPipe_print(shell->io, cmdStr); /* Copy buffer to screen */
1181 }
1182
1183 Cmd->cursor = (Ifx_SizeT)strlen(cmdStr); /* Store cursor position */
1184 Cmd->length = Cmd->cursor; /* Store command line length */
1185 }
1186
1187 Cmd->historyAdd = FALSE;
1188 break;
1189
1190 case 'C': /* Right arrow */
1191
1192 if (Cmd->cursor < Cmd->length)
1193 {
1194 /* Move cursor one place to right */
1195 IFX_SHELL_IF_ECHO(IfxStdIf_DPipe_print(shell->io, "%c", cmdStr[Cmd->cursor])) Cmd->cursor++;
1196 }
1197
1198 break;
1199
1200 case 'D': /* Left arrow */
1201
1202 if (Cmd->cursor > 0)
1203 {
1204 /* Move cursor one place to left */
1205 IFX_SHELL_IF_ECHO(IfxStdIf_DPipe_print(shell->io, "\b")) Cmd->cursor--;
1206 }
1207
1208 break;
1209
1210 default:
1211 break;
1212 }
1213
1214 /* If second character after ESC [ is ~ then switch on number */
1215 if (EscapeChar2 == '~')
1216 {
1217 switch (EscapeChar1)
1218 {
1219 case '1': /* HOME - move to start of buffer */
1220
1221 if (Cmd->cursor > 0)
1222 {
1223 IFX_SHELL_WRITE_BACKSPACES(Cmd->cursor) Cmd->cursor = 0;
1224 }
1225
1226 break;
1227
1228 case '2': /* INSERT - insert blank character at cursor and move all remaining characters right one */
1229
1230 if ((Cmd->cursor < Cmd->length) && (Cmd->length < (IFX_CFG_SHELL_CMD_LINE_SIZE - 1)))
1231 {
1232 /* Update on screen */
1233 if (shell->control.echo != FALSE)
1234 {
1235 /* write over duplicated character at cursor */
1236 IfxStdIf_DPipe_print(shell->io, " ");
1237
1238 /* Update line with new characters */
1239 for (i = Cmd->cursor; i < Cmd->length; i++)
1240 {
1241 IfxStdIf_DPipe_print(shell->io, "%c", cmdStr[i]);
1242 }
1243
1244 /* Move cursor back to new place */
1245 IFX_SHELL_WRITE_BACKSPACES((Cmd->length + 1) - Cmd->cursor)
1246 }
1247
1248 /* Update in command line variable */
1249 for (i = Cmd->length; i > Cmd->cursor; i--)
1250 {
1251 cmdStr[i] = cmdStr[i - 1]; /* Shuffle text right */
1252 }
1253
1254 cmdStr[Cmd->length + 1] = IFX_SHELL_NULL_CHAR; /* Terminate string at end of longer string */
1255 cmdStr[Cmd->cursor] = ' '; /* Blank character at cursor */
1256
1257 Cmd->length++; /* Now one character longer */
1258 }
1259
1260 break;
1261
1262 case '3': /* DELETE - delete character to right and move all remaining characters left one */
1263
1264 if (Cmd->cursor < Cmd->length)
1265 {
1266 /* Update on screen */
1267 if (shell->control.echo != 0)
1268 {
1269 for (i = Cmd->cursor; i < (Cmd->length - 1); i++)
1270 {
1271 /* Update line with new characters */
1272 IfxStdIf_DPipe_print(shell->io, "%c", cmdStr[i + 1]);
1273 }
1274
1275 /* write over duplicated character at end */
1276 IfxStdIf_DPipe_print(shell->io, " ");
1277
1278 /* Move cursor back to right place */
1279 IFX_SHELL_WRITE_BACKSPACES(Cmd->length - Cmd->cursor)
1280 }
1281
1282 /* Update in command line variable. Shuffle text left */
1283 strncpy(&cmdStr[Cmd->cursor], &cmdStr[Cmd->cursor + 1], Cmd->length - Cmd->cursor - 1);
1284
1285 cmdStr[Cmd->length - 1] = IFX_SHELL_NULL_CHAR; /* Terminate string at end of shorter string */
1286 Cmd->length--; /* Now one character shorter */
1287 }
1288
1289 break;
1290
1291 case '4': /* END - ensure cursor is at end */
1292
1293 while (Cmd->cursor < Cmd->length)
1294 {
1295 IFX_SHELL_IF_ECHO(IfxStdIf_DPipe_print(shell->io, "%c", cmdStr[Cmd->cursor])) Cmd->cursor++;
1296 }
1297
1298 break;
1299
1300 default:
1301 break;
1302 }
1303 }
1304 }
1305
1306
1307 void Ifx_Shell_enable(Ifx_Shell *shell)
1308 {
1309 // Clear the Rx buffer!
1310 IfxStdIf_DPipe_clearRx(shell->io);
1311 // Enable the shell
1312 shell->control.enabled = 1;
1313 }
1314
1315
1316 void Ifx_Shell_disable(Ifx_Shell *shell)
1317 {
1318 shell->control.enabled = 0;
1319 }
1320
1321
1322 void Ifx_Shell_printSyntax(const Ifx_Shell_Syntax *syntaxList, IfxStdIf_DPipe *io)
1323 {
1324 const Ifx_Shell_Syntax *syntax = syntaxList;
1325
1326 while (syntax->syntax != NULL_PTR)
1327 {
1328 IfxStdIf_DPipe_print(io, "Syntax : %s" ENDL, syntax->syntax);
1329 IfxStdIf_DPipe_print(io, " > %s" ENDL, syntax->description);
1330 syntax = &syntax[1];
1331 }
1332 }
Ifx_Shell_commandListFind
const Ifx_Shell_Command * Ifx_Shell_commandListFind(Ifx_Shell *shell, pchar commandLine, pchar *args, Ifx_Shell_CommandListConst *commandList)
Definition: Ifx_Shell.c:1000
Ifx_Shell::io
IfxStdIf_DPipe * io
Pointer to IfxStdIf_DPipe object used by the Shell.
Definition: Ifx_Shell.h:234
Ifx_Shell_Runtime::cmdState
Ifx_Shell_CmdState cmdState
Definition: Ifx_Shell.h:223
Ifx_Shell_Flags::enabled
uint16 enabled
Definition: Ifx_Shell.h:211
Ifx_Shell_parseUInt32
boolean Ifx_Shell_parseUInt32(pchar *argsPtr, uint32 *value, boolean hex)
Parse an unsigned 32-bit integer value.
Definition: Ifx_Shell.c:829
Ifx_Shell::locals
Ifx_Shell_Runtime locals
Runtime data.
Definition: Ifx_Shell.h:244
Ifx_Shell_Command::help
pchar help
Definition: Ifx_Shell.h:172
Ifx_Shell_CmdLine::cmdStr
char * cmdStr
Pointer to current string containing command line as so far processed.
Definition: Ifx_Shell.h:180
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
Ifx_Shell::control
Ifx_Shell_Flags control
control flags
Definition: Ifx_Shell.h:236
ISSPACE
#define ISSPACE(c)
Definition: Ifx_Shell.c:60
Ifx_Shell_Flags::echoError
uint16 echoError
Definition: Ifx_Shell.h:214
IfxStdIf_DPipe_
Standard interface object.
Definition: IfxStdIf_DPipe.h:230
Ifx_Shell_Command
Shell command object.
Definition: Ifx_Shell.h:169
Ifx_Shell_ResultCode_nok
Definition: Ifx_Shell.h:160
Ifx_Shell_skipWhitespace
pchar Ifx_Shell_skipWhitespace(pchar args)
Within the context of Shell.call, skip the whitespaces of the args string.
Definition: Ifx_Shell.c:655
Ifx_Shell_cmdEscapeProcess
void Ifx_Shell_cmdEscapeProcess(Ifx_Shell *shell, char EscapeChar1, char EscapeChar2)
Definition: Ifx_Shell.c:1090
Ifx_Shell_CmdLine::historyAdd
boolean historyAdd
If TRUE, when Enter is pressed, the current cmdLine should be added to the command history (in parent...
Definition: Ifx_Shell.h:183
Ifx_Shell_Protocol::start
boolean(* start)(void *protocol, IfxStdIf_DPipe *io)
Definition: Ifx_Shell.h:199
Ifx_Shell_Config::sendResultCode
boolean sendResultCode
Specifies whether the Ifx_Shell_ResultCode shall be sent to user.
Definition: Ifx_Shell.h:266
memset
void * memset(void *s, int c, syze_t n)
Ifx_Shell::cmd
Ifx_Shell_CmdLine cmd
Current status of command line editing (saves passing many parameters around)
Definition: Ifx_Shell.h:242
uint32
unsigned long uint32
Definition: Platform_Types.h:116
ENDL
#define ENDL
Definition: IfxStdIf_DPipe.h:64
float32
float float32
Definition: Platform_Types.h:170
Ifx_Assert.h
Assert functions.
Ifx_Shell_Runtime::echo
char echo[2]
Definition: Ifx_Shell.h:220
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
IFX_CFG_SHELL_PROMPT
#define IFX_CFG_SHELL_PROMPT
Shell prompt.
Definition: Ifx_Shell.h:139
Ifx_Shell_enable
void Ifx_Shell_enable(Ifx_Shell *shell)
Clear the receive buffer and enable the shell.
Definition: Ifx_Shell.c:1307
Ifx_Shell_CmdLine
Command line editing state.
Definition: Ifx_Shell.h:178
Ifx_Shell_Syntax
Shell Syntax Description.
Definition: Ifx_Shell.h:274
IfxCpu_Intrinsics.h
Ifx_Shell_showHelpSingle
boolean Ifx_Shell_showHelpSingle(Ifx_Shell_CommandListConst commandList, IfxStdIf_DPipe *io, boolean briefOnly, boolean singleCommand)
Implementation of Ifx_Shell_Call. Show the help menu from single command list.
Definition: Ifx_Shell.c:104
uint64
unsigned long long uint64
Definition: Platform_Types.h:121
Ifx_Shell_commandFind
const Ifx_Shell_Command * Ifx_Shell_commandFind(Ifx_Shell_CommandListConst commandList, pchar commandLine, pchar *args, uint32 *match)
Find command in command List.
Definition: Ifx_Shell.c:945
Ifx_Shell_Flags::sendResultCode
uint16 sendResultCode
Definition: Ifx_Shell.h:212
Ifx_Shell_parseFloat64
boolean Ifx_Shell_parseFloat64(pchar *argsPtr, float64 *value)
Parse a 64-bit (double precision) floating-point value.
Definition: Ifx_Shell.c:905
Ifx_Shell_printSyntax
void Ifx_Shell_printSyntax(const Ifx_Shell_Syntax *syntaxList, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. print the syntax.
Definition: Ifx_Shell.c:1322
Ifx_Shell_Runtime::cmdStr
char cmdStr[IFX_CFG_SHELL_CMD_LINE_SIZE]
Definition: Ifx_Shell.h:222
IFX_SHELL_LLX
#define IFX_SHELL_LLX
Definition: Ifx_Shell.c:52
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxStdIf_DPipe_print
void IfxStdIf_DPipe_print(IfxStdIf_DPipe *stdIf, pchar format,...)
Definition: IfxStdIf_DPipe.c:50
TIME_NULL
#define TIME_NULL
Definition: Ifx_Types.h:78
FALSE
#define FALSE
Definition: Platform_Types.h:93
Ifx_Shell_parseSInt64
boolean Ifx_Shell_parseSInt64(pchar *argsPtr, sint64 *value)
Parse a signed 64-bit integer value.
Definition: Ifx_Shell.c:850
Ifx_Shell_parseSInt32
boolean Ifx_Shell_parseSInt32(pchar *argsPtr, sint32 *value)
Parse a signed 32-bit integer value.
Definition: Ifx_Shell.c:808
Ifx_Shell_Runtime::escBracketNum
char escBracketNum
Definition: Ifx_Shell.h:224
Ifx_Shell_parseAddress
boolean Ifx_Shell_parseAddress(pchar *argsPtr, void **address)
Parse an address.
Definition: Ifx_Shell.c:788
IFX_SHELL_IF_ECHO
#define IFX_SHELL_IF_ECHO(X)
Definition: Ifx_Shell.c:63
Ifx_Shell_protocolStart
boolean Ifx_Shell_protocolStart(pchar args, void *data, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. Start the Shell protocol.
Definition: Ifx_Shell.c:253
__max
sint32 __max(sint32, sint32) __attribute__((intrinsic_pseudo(3
Ifx_Shell_Syntax::description
pchar description
description
Definition: Ifx_Shell.h:277
IFX_SHELL_LLU
#define IFX_SHELL_LLU
Definition: Ifx_Shell.c:53
Ifx_Shell::cmdHistory
char * cmdHistory[IFX_CFG_SHELL_CMD_HISTORY_SIZE]
Array of pointers to the history entries.
Definition: Ifx_Shell.h:239
Ifx_Shell_showHelpSingleCommand
boolean Ifx_Shell_showHelpSingleCommand(pchar args, void *shellPtr, IfxStdIf_DPipe *io)
Definition: Ifx_Shell.c:197
IFX_SHELL_NULL_CHAR
#define IFX_SHELL_NULL_CHAR
Definition: Ifx_Shell.h:124
Ifx_Shell::protocol
Ifx_Shell_Protocol protocol
Protocol handler data.
Definition: Ifx_Shell.h:255
Ifx_Shell_Config::echo
boolean echo
Specifies whether each command shall be echoed back to user.
Definition: Ifx_Shell.h:264
Ifx_Shell_Runtime::inputbuffer
char inputbuffer[IFX_CFG_SHELL_CMD_LINE_SIZE+1]
Definition: Ifx_Shell.h:221
IFX_SHELL_CMD_HISTORY_NO_ITEM
#define IFX_SHELL_CMD_HISTORY_NO_ITEM
Signifies no item in use in command history list.
Definition: Ifx_Shell.h:154
Ifx_Shell_parseToken
boolean Ifx_Shell_parseToken(pchar *argsPtr, char *tokenBuffer, int bufferLength)
Parse a token Return the next token in tokenBuffer and move the argsPtr pointer after this token...
Definition: Ifx_Shell.c:721
Ifx_Shell_parseFloat32
boolean Ifx_Shell_parseFloat32(pchar *argsPtr, float32 *value)
Parse a 32-bit (single precision) floating-point value.
Definition: Ifx_Shell.c:925
Ifx_Shell_Protocol::onStart
void(* onStart)(void *protocol, void *data)
Definition: Ifx_Shell.h:201
Ifx_Shell_Protocol::onStartData
void * onStartData
Definition: Ifx_Shell.h:202
IfxStdIf_DPipe_write
IFX_INLINE boolean IfxStdIf_DPipe_write(IfxStdIf_DPipe *stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Write binary data into the IfxStdIf_DPipe.
Definition: IfxStdIf_DPipe.h:259
IFX_CFG_SHELL_CMD_HISTORY_SIZE
#define IFX_CFG_SHELL_CMD_HISTORY_SIZE
Number of commands to store in history.
Definition: Ifx_Shell.h:127
Ifx_Shell_Command::call
Ifx_Shell_Call call
Definition: Ifx_Shell.h:174
sint64
long long sint64
Definition: Platform_Types.h:141
Ifx_Shell_init
boolean Ifx_Shell_init(Ifx_Shell *shell, const Ifx_Shell_Config *config)
Initialize the shell.
Definition: Ifx_Shell.c:331
IfxStdIf_DPipe_clearRx
IFX_INLINE void IfxStdIf_DPipe_clearRx(IfxStdIf_DPipe *stdIf)
Clears the RX buffer by removing all data.
Definition: IfxStdIf_DPipe.h:339
IFX_SHELL_LLD
#define IFX_SHELL_LLD
Definition: Ifx_Shell.c:51
Ifx_Shell_ResultCode_ok
Definition: Ifx_Shell.h:162
Ifx_Shell_Command::data
void * data
Definition: Ifx_Shell.h:173
Ifx_Shell_CmdLine::historyItem
Ifx_SizeT historyItem
Item ID in command history list, or IFX_SHELL_CMD_HISTORY_NO_ITEM if not using list (e...
Definition: Ifx_Shell.h:184
Ifx_Shell_Config::standardIo
IfxStdIf_DPipe * standardIo
Pointer to a IfxStdIf_DPipe object used by the Shell.
Definition: Ifx_Shell.h:263
IFX_SHELL_WRITE_SPACES
#define IFX_SHELL_WRITE_SPACES(X)
Definition: Ifx_Shell.c:66
Ifx_Shell_Config
Shell configuration.
Definition: Ifx_Shell.h:261
Ifx_Shell_Protocol::object
void * object
Definition: Ifx_Shell.h:203
float64
double float64
Definition: Platform_Types.h:175
Ifx_COUNTOF
#define Ifx_COUNTOF(x)
Definition: IfxCpu_Intrinsics.h:79
__min
sint32 __min(sint32, sint32) __attribute__((intrinsic_pseudo(3
Ifx_Shell_bbProtocolStart
boolean Ifx_Shell_bbProtocolStart(pchar args, void *data, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. Start the ShellBb protocol.
Definition: Ifx_Shell.c:287
Ifx_Shell_Config::showPrompt
boolean showPrompt
Specifies whether the IFX_CFG_SHELL_PROMPT shall be displayed after each command. ...
Definition: Ifx_Shell.h:265
Ifx_Shell_Syntax::syntax
pchar syntax
syntax
Definition: Ifx_Shell.h:276
Ifx_Shell_matchToken
boolean Ifx_Shell_matchToken(pchar *argsPtr, pchar token)
Match string pointed by the *argsPtr with a given token.
Definition: Ifx_Shell.c:669
TIME_INFINITE
#define TIME_INFINITE
Definition: Ifx_Types.h:77
Ifx_Shell_Flags::echo
uint16 echo
Definition: Ifx_Shell.h:213
Ifx_Shell_Protocol::execute
void(* execute)(void *protocol)
Definition: Ifx_Shell.h:200
Ifx_Shell_showHelp
boolean Ifx_Shell_showHelp(pchar args, void *shellPtr, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. Show the help menu and list of commands.
Definition: Ifx_Shell.c:228
Ifx_Shell_initConfig
void Ifx_Shell_initConfig(Ifx_Shell_Config *config)
Definition: Ifx_Shell.c:308
IFX_CFG_SHELL_CMD_LINE_SIZE
#define IFX_CFG_SHELL_CMD_LINE_SIZE
max command line IFX_CFG_SHELL_CMD_LINE_SIZE - 1
Definition: Ifx_Shell.h:131
sint32
long sint32
Definition: Platform_Types.h:134
IFX_SHELL_CMD_STATE_NORMAL
Normal - no special sequences being processed.
Definition: Ifx_Shell.h:190
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IFX_SHELL_CMD_STATE_ESCAPE
Escape character has been pressed.
Definition: Ifx_Shell.h:191
Ifx_Shell_Flags::showPrompt
uint16 showPrompt
Definition: Ifx_Shell.h:210
Ifx_Shell::commandList
Ifx_Shell_CommandListConst commandList[IFX_CFG_SHELL_COMMAND_LISTS]
Array of pointers to command list. The pointed location shall be constant during Shell lifetime...
Definition: Ifx_Shell.h:253
IFX_SHELL_WRITE_BACKSPACES
#define IFX_SHELL_WRITE_BACKSPACES(X)
Definition: Ifx_Shell.c:70
IfxStdIf_DPipe_read
IFX_INLINE boolean IfxStdIf_DPipe_read(IfxStdIf_DPipe *stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Read data from the IfxStdIf_DPipe object.
Definition: IfxStdIf_DPipe.h:267
Ifx_Shell_CmdLine::length
Ifx_SizeT length
Pointer to variable containing total length of command line.
Definition: Ifx_Shell.h:182
IFX_SHELL_CMD_STATE_ESCAPE_BRACKET_NUMBER
ESC [ (number) pressed.
Definition: Ifx_Shell.h:193
Ifx_Shell_execute
void Ifx_Shell_execute(Ifx_Shell *shell, pchar commandLine)
Definition: Ifx_Shell.c:1027
Ifx_Shell_CmdLine::cursor
Ifx_SizeT cursor
Pointer to variable containing position of cursor in so-far-processed command line.
Definition: Ifx_Shell.h:181
Ifx_Shell_Command::commandLine
pchar commandLine
Definition: Ifx_Shell.h:171
Ifx_Shell_ResultCode_unknown
Definition: Ifx_Shell.h:159
Ifx_Shell_parseUInt64
boolean Ifx_Shell_parseUInt64(pchar *argsPtr, uint64 *value, boolean hex)
Parse an unsigned 64-bit integer value.
Definition: Ifx_Shell.c:870
Ifx_Shell_deinit
void Ifx_Shell_deinit(Ifx_Shell *shell)
Deinitialise the shell.
Definition: Ifx_Shell.c:648
Ifx_Shell_process
void Ifx_Shell_process(Ifx_Shell *shell)
Process the shell.
Definition: Ifx_Shell.c:388
Ifx_Shell_isEndOfLine
boolean Ifx_Shell_isEndOfLine(pchar args)
Check whether the args is already at the end.
Definition: Ifx_Shell.c:86
Ifx_Shell_disable
void Ifx_Shell_disable(Ifx_Shell *shell)
Disable the shell.
Definition: Ifx_Shell.c:1316
IFX_SHELL_CMD_STATE_ESCAPE_BRACKET
ESC [ pressed.
Definition: Ifx_Shell.h:192
TRUE
#define TRUE
Definition: Platform_Types.h:90
pchar
const char * pchar
const char pointer
Definition: Ifx_Types.h:53
Ifx_Shell.h
Shell functions.
Ifx_Shell_cmdBuffer
char Ifx_Shell_cmdBuffer[IFX_CFG_SHELL_CMD_LINE_SIZE *IFX_CFG_SHELL_CMD_HISTORY_SIZE]
Definition: Ifx_Shell.c:74
Ifx_Shell_Protocol::started
boolean started
Definition: Ifx_Shell.h:204
Ifx_Shell
Shell object definition.
Definition: Ifx_Shell.h:232
IFX_CFG_SHELL_COMMAND_LISTS
#define IFX_CFG_SHELL_COMMAND_LISTS
Number of command lists.
Definition: Ifx_Shell.h:135


iLLD_TC38A: Ifx_Shell.h Source File

  • Service
  • CpuGeneric
  • SysSe
  • Comm
Ifx_Shell.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_Shell.h
3 * \brief Shell functions.
4 * \ingroup library_srvsw_sysse_comm_shell
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup library_srvsw_sysse_comm_shell Shell
42 * This module implements the Shell functions.
43 * It parses a command line and call the corresponding command execution.
44 * Multiple command list can be used in parallel.
45 *
46 * Only full command match is accepted.
47 *
48 * New feature / change:
49 * - Prefix can be defined for each command list
50 * - Help for a single command is displayed with "help <command>"
51 * - help for a command list is displayed with "help <listPrefix>"
52 * - command short cut is not allowed
53 * - command with identical start option "opt1 opt2" and "opt1 opt3" are accepted, and root to different handlers
54 * - Enhanced help info print
55 *
56 * Help text xyntax:
57 * - /p indicates a parameter description, can be multi-line, lines must be separated with ENDL
58 * - /s Indicates a syntax help
59 *
60 * Example of help list:
61 * \code
62 * Ifx_Shell_Command Ifx_g_OsciShell_commands[] =
63 * {
64 * {IFX_OSCI_SHELL_PREFIX, " : Oscilloscope functions"
65 * , NULL_PTR, NULL_PTR },
66 * {"run", " : run the oscilloscope"ENDL
67 * "/s run [single|auto|normal]"
68 * , NULL_PTR, &Ifx_OsciShell_run },
69 * {"stop", " : stop oscilloscope"
70 * , NULL_PTR, &Ifx_OsciShell_stop },
71 * {"trigger", " : trigger settings"ENDL
72 * "/s trigger [force|single|level <value>|raising|falling|source <chNum>|interval <value>]"ENDL
73 * "/p force: Force the trigger"ENDL
74 * "/p single: Single the trigger"ENDL
75 * "/p level <value>: Set trigger level to value"ENDL
76 * "/p [raising|falling]: Set trigger to raising or falling edges"ENDL
77 * "/p source <chNum>: Set trigger channel number"ENDL
78 * "<chNum> can be obtained with 'channel' command"ENDL
79 * "/p interval <value>: Set sampling interval to value"
80 *
81 * , NULL_PTR, &Ifx_OsciShell_trigger },
82 * {"status", " : display status"
83 * , NULL_PTR, &Ifx_OsciShell_status },
84 * {"channel", " : channel information"ENDL
85 * "/s channel: Show the channels information"ENDL
86 * "/s channel <ch> <sig>: Assign a signal to a channel"
87 * , NULL_PTR, &Ifx_OsciShell_channel },
88 * {"analyze", " : signal analysis of a ch"ENDL
89 * "/s analyze <ch>: analyze the input channel <ch>"
90 * , NULL_PTR, &Ifx_OsciShell_analyze },
91 * {"simulate", " : simulate a signal"ENDL
92 * "/s simulate <ch> <op> <wave> <freq> <ampl> <offs> <phase> : Simulate a signal generation"ENDL
93 * "/p <ch> : {0 .. Channel count}"ENDL
94 * "/p <op> : {add,sub,mul,clr}"ENDL
95 * "/p <wave> : {sine,square}"ENDL
96 * "/p <freq> : -INF .. INF"ENDL
97 * "/p <offs> : -INF .. INF"ENDL
98 * "/p <ampl> : -INF .. INF"ENDL
99 * "/p <phase>: 0 .. 360 [degree]"ENDL
100 * "/s simulate <ch> atan <ych> <xch>: Compute atan(ych/xch) and store in channel <ch>"
101 * , NULL_PTR, &Ifx_OsciShell_simulate},
102 * {"dump", " : dump values (all channels)"ENDL
103 * "/s dump <ch> [hex]"ENDL
104 * "/p <ch>: Dump the values of the channel <ch>"ENDL
105 * "/p hex: If hex is specified, values will be in hexadecimal"
106 * , NULL_PTR, &Ifx_OsciShell_dump },
107 * IFX_SHELL_COMMAND_LIST_END,
108 * };
109 * \endcode
110 *
111 * To enable help command, include the below command in the main command list
112 * {"help", SHELL_HELP_DESCRIPTION_TEXT , &<Ifx_Shell>, &Ifx_Shell_showHelp, },
113 *
114 * \ingroup library_srvsw_sysse_comm
115 *
116 */
117
118 #ifndef IFX_SHELL_H
119 #define IFX_SHELL_H 1
120 //----------------------------------------------------------------------------------------
121 #include "StdIf/IfxStdIf_DPipe.h"
122 #include "Ifx_Cfg.h"
123 //----------------------------------------------------------------------------------------
124 #define IFX_SHELL_NULL_CHAR '\0'
125
126 #ifndef IFX_CFG_SHELL_CMD_HISTORY_SIZE
127 #define IFX_CFG_SHELL_CMD_HISTORY_SIZE (10) /**<\brief Number of commands to store in history */
128 #endif
129
130 #ifndef IFX_CFG_SHELL_CMD_LINE_SIZE
131 #define IFX_CFG_SHELL_CMD_LINE_SIZE (128) /**<\brief max command line IFX_CFG_SHELL_CMD_LINE_SIZE - 1 */
132 #endif
133
134 #ifndef IFX_CFG_SHELL_COMMAND_LISTS
135 #define IFX_CFG_SHELL_COMMAND_LISTS (1) /**<\brief Number of command lists */
136 #endif
137
138 #ifndef IFX_CFG_SHELL_PROMPT
139 #define IFX_CFG_SHELL_PROMPT "Shell>" /**<\brief Shell prompt */
140 #endif
141
142 #define SHELL_HELP_DESCRIPTION_TEXT \
143 " : Display command list, and command help."ENDL \
144 "/s help: show all commands"ENDL \
145 "/s help <command>: show the command details"
146
147 /** \brief Marker for end of command list, the end of list is detected by commandLine=NULL */
148 #define IFX_SHELL_COMMAND_LIST_END {0, 0, 0, 0}
149
150 /** \brief Marker for end of syntax list */
151 #define IFX_SHELL_SYNTAX_LIST_END {0, 0}
152
153 /** \brief Signifies no item in use in command history list */
154 #define IFX_SHELL_CMD_HISTORY_NO_ITEM (-1)
155 //----------------------------------------------------------------------------------------
156 /** \brief Result code definition used after each executed Shell command */
157 typedef enum
158 {
159 Ifx_Shell_ResultCode_unknown = (128),
160 Ifx_Shell_ResultCode_nok = (129),
161 Ifx_Shell_ResultCode_undefined = (130),
162 Ifx_Shell_ResultCode_ok = (255)
163 } Ifx_Shell_ResultCode;
164
165 /** \brief Definition of a callback function which handles a Shell command */
166 typedef boolean (*Ifx_Shell_Call)(pchar args, void *data, IfxStdIf_DPipe *io);
167
168 /** \brief Shell command object */
169 typedef struct
170 {
171 pchar commandLine;
172 pchar help;
173 void *data;
174 Ifx_Shell_Call call;
175 } Ifx_Shell_Command;
176
177 /** \brief Command line editing state */
178 typedef struct
179 {
180 char *cmdStr; /**< \brief Pointer to current string containing command line as so far processed */
181 Ifx_SizeT cursor; /**< \brief Pointer to variable containing position of cursor in so-far-processed command line */
182 Ifx_SizeT length; /**< \brief Pointer to variable containing total length of command line */
183 boolean historyAdd; /**< \brief If TRUE, when Enter is pressed, the current cmdLine should be added to the command history (in parent) */
184 Ifx_SizeT historyItem; /**< \brief Item ID in command history list, or IFX_SHELL_CMD_HISTORY_NO_ITEM if not using list (e.g. new command) */
185 } Ifx_Shell_CmdLine;
186
187 /** \brief Shell command processing state */
188 typedef enum
189 {
190 IFX_SHELL_CMD_STATE_NORMAL, /**< \brief Normal - no special sequences being processed */
191 IFX_SHELL_CMD_STATE_ESCAPE, /**< \brief Escape character has been pressed */
192 IFX_SHELL_CMD_STATE_ESCAPE_BRACKET, /**< \brief ESC [ pressed */
193 IFX_SHELL_CMD_STATE_ESCAPE_BRACKET_NUMBER /**< \brief ESC [ (number) pressed */
194 } Ifx_Shell_CmdState;
195
196 /** \brief Shell protocol configuration */
197 typedef struct
198 {
199 boolean (*start)(void *protocol, IfxStdIf_DPipe *io);
200 void (*execute)(void *protocol);
201 void (*onStart)(void *protocol, void *data);
202 void *onStartData;
203 void *object;
204 boolean started;
205 } Ifx_Shell_Protocol;
206
207 /** \brief Shell control flags */
208 typedef struct
209 {
210 uint16 showPrompt : 1;
211 uint16 enabled : 1;
212 uint16 sendResultCode : 1;
213 uint16 echo : 1;
214 uint16 echoError : 1;
215 } Ifx_Shell_Flags;
216
217 /** \brief internal Shell run-time data */
218 typedef struct
219 {
220 char echo[2];
221 char inputbuffer[IFX_CFG_SHELL_CMD_LINE_SIZE + 1];
222 char cmdStr[IFX_CFG_SHELL_CMD_LINE_SIZE];
223 Ifx_Shell_CmdState cmdState;
224 char escBracketNum;
225 } Ifx_Shell_Runtime;
226
227 typedef Ifx_Shell_Command *Ifx_Shell_CommandList;
228 typedef const Ifx_Shell_Command *Ifx_Shell_CommandListConst;
229 /**
230 * \brief Shell object definition
231 */
232 typedef struct
233 {
234 IfxStdIf_DPipe *io; /**< \brief Pointer to IfxStdIf_DPipe object used by the Shell */
235
236 Ifx_Shell_Flags control; /**< \brief control flags */
237
238 /** \brief Array of pointers to the history entries */
239 char *cmdHistory[IFX_CFG_SHELL_CMD_HISTORY_SIZE];
240
241 /** \brief Current status of command line editing (saves passing many parameters around) */
242 Ifx_Shell_CmdLine cmd;
243
244 Ifx_Shell_Runtime locals; /**< \brief Runtime data */
245
246 /** \brief Array of pointers to command list. The pointed location shall be constant
247 * during Shell lifetime, e.g. stored in non-volatile memory or as global variable
248 *
249 * The 1st item in the list is use as a group command prefix if its "call" parameter is NULL pointer, else it is use as other entries.
250 * In case "call" is NULL, the corresponding 'data' is ignored, and the 'help' is displayed.
251 *
252 **/
253 Ifx_Shell_CommandListConst commandList[IFX_CFG_SHELL_COMMAND_LISTS];
254
255 Ifx_Shell_Protocol protocol; /**< \brief Protocol handler data */
256 } Ifx_Shell;
257
258 /**
259 * \brief Shell configuration.
260 */
261 typedef struct
262 {
263 IfxStdIf_DPipe *standardIo; /**<\brief Pointer to a IfxStdIf_DPipe object used by the Shell */
264 boolean echo; /**<\brief Specifies whether each command shall be echoed back to user */
265 boolean showPrompt; /**<\brief Specifies whether the IFX_CFG_SHELL_PROMPT shall be displayed after each command */
266 boolean sendResultCode; /**<\brief Specifies whether the Ifx_Shell_ResultCode shall be sent to user */
267 Ifx_Shell_CommandListConst commandList[IFX_CFG_SHELL_COMMAND_LISTS]; /**< \brief Specifies pointer to the command list */
268 Ifx_Shell_Protocol protocol; /**<\brief Configuration for the Ifx_Shell_Protocol */
269 } Ifx_Shell_Config;
270
271 /**
272 * \brief Shell Syntax Description.
273 */
274 typedef struct
275 {
276 pchar syntax; /**<\brief syntax */
277 pchar description; /**<\brief description */
278 } Ifx_Shell_Syntax;
279
280 //----------------------------------------------------------------------------------------
281 /** \addtogroup library_srvsw_sysse_comm_shell
282 * \{ */
283
284 /** \name Basic functionality
285 * \{ */
286
287 /** Set the config default parameter
288 *
289 * \param config Pointer to the configuration structure to be initialized
290 */
291 void Ifx_Shell_initConfig(Ifx_Shell_Config *config);
292
293 /**
294 * \brief Initialize the shell
295 * \param shell Pointer to the \ref Ifx_Shell object
296 * \param config Pointer to the configuration structure
297 */
298 IFX_EXTERN boolean Ifx_Shell_init(Ifx_Shell *shell, const Ifx_Shell_Config *config);
299
300 /**
301 * \brief Deinitialise the shell
302 * \param shell Pointer to the \ref Ifx_Shell object
303 */
304 IFX_EXTERN void Ifx_Shell_deinit(Ifx_Shell *shell);
305
306 /**
307 * \brief Clear the receive buffer and enable the shell
308 * \param shell Pointer to the \ref Ifx_Shell object
309 */
310 IFX_EXTERN void Ifx_Shell_enable(Ifx_Shell *shell);
311
312 /**
313 * \brief Disable the shell
314 * \param shell Pointer to the \ref Ifx_Shell object
315 */
316 IFX_EXTERN void Ifx_Shell_disable(Ifx_Shell *shell);
317
318 /**
319 * \brief Process the shell.
320 *
321 * This function shall be called within a loop or periodic timer to guarantee the correct
322 * processing of the incoming/received data.
323 *
324 * \param shell Pointer to the \ref Ifx_Shell object
325 */
326 IFX_EXTERN void Ifx_Shell_process(Ifx_Shell *shell);
327
328 /** \} */
329 //----------------------------------------------------------------------------------------
330 /** \name Parsing functions
331 * \{ */
332
333 /**
334 * \brief Within the context of Shell.call, skip the whitespaces of the args string.
335 * \param args Pointer to the original string
336 * \return Pointer to the string after skipping the whitespaces
337 */
338 IFX_EXTERN pchar Ifx_Shell_skipWhitespace(pchar args);
339
340 /**
341 * \brief Match string pointed by the *argsPtr with a given token
342 * \param argsPtr Pointer to the argument null-terminated string
343 * \param token Pointer to the token string to match
344 * \retval TRUE if the given token match with the string pointed by argsPtr
345 */
346 IFX_EXTERN boolean Ifx_Shell_matchToken(pchar *argsPtr, pchar token);
347
348 /**
349 * \brief Parse a token
350 * Return the next token in tokenBuffer and move the argsPtr pointer after this token
351 * \param argsPtr Pointer to the argument null-terminated string
352 * \param tokenBuffer Pointer to the value storage
353 * \param bufferLength Maximum parsing length
354 */
355 IFX_EXTERN boolean Ifx_Shell_parseToken(pchar *argsPtr, char *tokenBuffer, int bufferLength);
356
357 /**
358 * \brief Parse an address
359 * \param argsPtr Pointer to the argument null-terminated string
360 * \param address Pointer to the value storage
361 */
362 IFX_EXTERN boolean Ifx_Shell_parseAddress(pchar *argsPtr, void **address);
363
364 /**
365 * \brief Parse a signed 32-bit integer value
366 * \param argsPtr Pointer to the argument null-terminated string
367 * \param value Pointer to the value storage
368 */
369 IFX_EXTERN boolean Ifx_Shell_parseSInt32(pchar *argsPtr, sint32 *value);
370
371 /**
372 * \brief Parse an unsigned 32-bit integer value
373 * \param argsPtr Pointer to the argument null-terminated string
374 * \param value Pointer to the value storage
375 * \param hex if TRUE, hex parsing will be done, else decimal parsing
376 */
377 IFX_EXTERN boolean Ifx_Shell_parseUInt32(pchar *argsPtr, uint32 *value, boolean hex);
378
379 /**
380 * \brief Parse a signed 64-bit integer value
381 * \param argsPtr Pointer to the argument null-terminated string
382 * \param value Pointer to the value storage
383 */
384 IFX_EXTERN boolean Ifx_Shell_parseSInt64(pchar *argsPtr, sint64 *value);
385
386 /**
387 * \brief Parse an unsigned 64-bit integer value
388 * \param argsPtr Pointer to the argument null-terminated string
389 * \param value Pointer to the value storage
390 * \param hex if TRUE, hex parsing will be done, else decimal parsing
391 */
392 IFX_EXTERN boolean Ifx_Shell_parseUInt64(pchar *argsPtr, uint64 *value, boolean hex);
393
394 /**
395 * \brief Parse a 64-bit (double precision) floating-point value
396 * \param argsPtr Pointer to the argument null-terminated string
397 * \param value Pointer to the value storage
398 */
399 IFX_EXTERN boolean Ifx_Shell_parseFloat64(pchar *argsPtr, float64 *value);
400
401 /**
402 * \brief Parse a 32-bit (single precision) floating-point value
403 * \param argsPtr Pointer to the argument null-terminated string
404 * \param value Pointer to the value storage
405 */
406 IFX_EXTERN boolean Ifx_Shell_parseFloat32(pchar *argsPtr, float32 *value);
407
408 /** \} */
409 //----------------------------------------------------------------------------------------
410 /** \name Command list functions
411 * \{ */
412
413 /**
414 * \brief Find command in command List
415 * \param commandList Pointer to the first entry of an array of \ref Ifx_Shell_Command
416 * \param commandLine Pointer to null-terminated string containings the command to search.
417 * \param args Pointer to the argument null-terminated string
418 * \param match Return the number of arguments that matches
419 */
420 IFX_EXTERN const Ifx_Shell_Command *Ifx_Shell_commandFind(Ifx_Shell_CommandListConst commandList, pchar commandLine, pchar *args, uint32 *match);
421
422 /**
423 * \brief Implementation of \ref Ifx_Shell_Call. Show the help menu from single command list.
424 * \param commandList Pointer to an array of Ifx_Shell_Command
425 * \param io Pointer to the IfxStdIf_DPipe object
426 * \param briefOnly if TRUE, show only the brief description, else show the full description
427 * \param singleCommand If TRUE, only show the 1st command pointed by commandList, else show the full list
428 */
429 IFX_EXTERN boolean Ifx_Shell_showHelpSingle(Ifx_Shell_CommandListConst commandList, IfxStdIf_DPipe *io, boolean briefOnly, boolean singleCommand);
430
431 /**
432 * \brief Implementation of \ref Ifx_Shell_Call. Show the help menu and list of commands.
433 * \param args The argument null-terminated string
434 * \param shellPtr Pointer to a Shell object
435 * \param io Pointer to \ref IfxStdIf_DPipe object
436 */
437 IFX_EXTERN boolean Ifx_Shell_showHelp(pchar args, void *shellPtr, IfxStdIf_DPipe *io);
438
439 /**
440 * \brief Implementation of \ref Ifx_Shell_Call. print the syntax.
441 * \param syntaxList Pointer to syntax list
442 * \param io Pointer to \ref IfxStdIf_DPipe object
443 */
444 IFX_EXTERN void Ifx_Shell_printSyntax(const Ifx_Shell_Syntax *syntaxList, IfxStdIf_DPipe *io);
445
446 /** \} */
447 //----------------------------------------------------------------------------------------
448 /** \name Sub protocol functions
449 * \{ */
450
451 /**
452 * \brief Implementation of \ref Ifx_Shell_Call. Start the Shell protocol.
453 * \param args The argument null-terminated string
454 * \param data Pointer to \ref Ifx_Shell object
455 * \param io Pointer to \ref IfxStdIf_DPipe object
456 */
457 IFX_EXTERN boolean Ifx_Shell_protocolStart(pchar args, void *data, IfxStdIf_DPipe *io);
458
459 /**
460 * \brief Implementation of \ref Ifx_Shell_Call. Start the ShellBb protocol.
461 * \param args The argument null-terminated string
462 * \param data Pointer to \ref Ifx_Shell object
463 * \param io Pointer to \ref IfxStdIf_DPipe object
464 */
465 IFX_EXTERN boolean Ifx_Shell_bbProtocolStart(pchar args, void *data, IfxStdIf_DPipe *io);
466
467 /** \} */
468 //----------------------------------------------------------------------------------------
469 /** \} */
470
471 #endif
Ifx_Shell::io
IfxStdIf_DPipe * io
Pointer to IfxStdIf_DPipe object used by the Shell.
Definition: Ifx_Shell.h:234
Ifx_Shell_Runtime::cmdState
Ifx_Shell_CmdState cmdState
Definition: Ifx_Shell.h:223
Ifx_Shell_Flags::enabled
uint16 enabled
Definition: Ifx_Shell.h:211
Ifx_Shell_parseUInt32
IFX_EXTERN boolean Ifx_Shell_parseUInt32(pchar *argsPtr, uint32 *value, boolean hex)
Parse an unsigned 32-bit integer value.
Definition: Ifx_Shell.c:829
Ifx_Shell::locals
Ifx_Shell_Runtime locals
Runtime data.
Definition: Ifx_Shell.h:244
Ifx_Shell_Command::help
pchar help
Definition: Ifx_Shell.h:172
Ifx_Shell_CmdLine::cmdStr
char * cmdStr
Pointer to current string containing command line as so far processed.
Definition: Ifx_Shell.h:180
Ifx_Shell::control
Ifx_Shell_Flags control
control flags
Definition: Ifx_Shell.h:236
Ifx_Shell_Flags::echoError
uint16 echoError
Definition: Ifx_Shell.h:214
IfxStdIf_DPipe_
Standard interface object.
Definition: IfxStdIf_DPipe.h:230
Ifx_Shell_Command
Shell command object.
Definition: Ifx_Shell.h:169
Ifx_Shell_ResultCode_nok
Definition: Ifx_Shell.h:160
Ifx_Shell_skipWhitespace
IFX_EXTERN pchar Ifx_Shell_skipWhitespace(pchar args)
Within the context of Shell.call, skip the whitespaces of the args string.
Definition: Ifx_Shell.c:655
Ifx_Shell_CmdLine::historyAdd
boolean historyAdd
If TRUE, when Enter is pressed, the current cmdLine should be added to the command history (in parent...
Definition: Ifx_Shell.h:183
Ifx_Shell_Config::sendResultCode
boolean sendResultCode
Specifies whether the Ifx_Shell_ResultCode shall be sent to user.
Definition: Ifx_Shell.h:266
Ifx_Shell_Runtime
internal Shell run-time data
Definition: Ifx_Shell.h:218
Ifx_Shell::cmd
Ifx_Shell_CmdLine cmd
Current status of command line editing (saves passing many parameters around)
Definition: Ifx_Shell.h:242
Ifx_Shell_CommandListConst
const Ifx_Shell_Command * Ifx_Shell_CommandListConst
Definition: Ifx_Shell.h:228
uint32
unsigned long uint32
Definition: Platform_Types.h:116
Ifx_Shell_ResultCode
Ifx_Shell_ResultCode
Result code definition used after each executed Shell command.
Definition: Ifx_Shell.h:157
float32
float float32
Definition: Platform_Types.h:170
Ifx_Shell_CmdState
Ifx_Shell_CmdState
Shell command processing state.
Definition: Ifx_Shell.h:188
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
Ifx_Shell_Call
boolean(* Ifx_Shell_Call)(pchar args, void *data, IfxStdIf_DPipe *io)
Definition of a callback function which handles a Shell command.
Definition: Ifx_Shell.h:166
Ifx_Shell_enable
IFX_EXTERN void Ifx_Shell_enable(Ifx_Shell *shell)
Clear the receive buffer and enable the shell.
Definition: Ifx_Shell.c:1307
Ifx_Shell_CmdLine
Command line editing state.
Definition: Ifx_Shell.h:178
Ifx_Shell_Flags
Shell control flags.
Definition: Ifx_Shell.h:208
Ifx_Shell_Syntax
Shell Syntax Description.
Definition: Ifx_Shell.h:274
Ifx_Shell_showHelpSingle
IFX_EXTERN boolean Ifx_Shell_showHelpSingle(Ifx_Shell_CommandListConst commandList, IfxStdIf_DPipe *io, boolean briefOnly, boolean singleCommand)
Implementation of Ifx_Shell_Call. Show the help menu from single command list.
Definition: Ifx_Shell.c:104
uint64
unsigned long long uint64
Definition: Platform_Types.h:121
Ifx_Shell_commandFind
IFX_EXTERN const Ifx_Shell_Command * Ifx_Shell_commandFind(Ifx_Shell_CommandListConst commandList, pchar commandLine, pchar *args, uint32 *match)
Find command in command List.
Definition: Ifx_Shell.c:945
Ifx_Shell_Flags::sendResultCode
uint16 sendResultCode
Definition: Ifx_Shell.h:212
Ifx_Shell_parseFloat64
IFX_EXTERN boolean Ifx_Shell_parseFloat64(pchar *argsPtr, float64 *value)
Parse a 64-bit (double precision) floating-point value.
Definition: Ifx_Shell.c:905
Ifx_Shell_printSyntax
IFX_EXTERN void Ifx_Shell_printSyntax(const Ifx_Shell_Syntax *syntaxList, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. print the syntax.
Definition: Ifx_Shell.c:1322
Ifx_Shell_parseSInt64
IFX_EXTERN boolean Ifx_Shell_parseSInt64(pchar *argsPtr, sint64 *value)
Parse a signed 64-bit integer value.
Definition: Ifx_Shell.c:850
Ifx_Shell_parseSInt32
IFX_EXTERN boolean Ifx_Shell_parseSInt32(pchar *argsPtr, sint32 *value)
Parse a signed 32-bit integer value.
Definition: Ifx_Shell.c:808
Ifx_Shell_Runtime::escBracketNum
char escBracketNum
Definition: Ifx_Shell.h:224
Ifx_Shell_parseAddress
IFX_EXTERN boolean Ifx_Shell_parseAddress(pchar *argsPtr, void **address)
Parse an address.
Definition: Ifx_Shell.c:788
Ifx_Shell_protocolStart
IFX_EXTERN boolean Ifx_Shell_protocolStart(pchar args, void *data, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. Start the Shell protocol.
Definition: Ifx_Shell.c:253
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
Ifx_Shell_CommandList
Ifx_Shell_Command * Ifx_Shell_CommandList
Definition: Ifx_Shell.h:227
Ifx_Shell_Syntax::description
pchar description
description
Definition: Ifx_Shell.h:277
Ifx_Shell::protocol
Ifx_Shell_Protocol protocol
Protocol handler data.
Definition: Ifx_Shell.h:255
Ifx_Shell_Config::echo
boolean echo
Specifies whether each command shall be echoed back to user.
Definition: Ifx_Shell.h:264
Ifx_Shell_parseToken
IFX_EXTERN boolean Ifx_Shell_parseToken(pchar *argsPtr, char *tokenBuffer, int bufferLength)
Parse a token Return the next token in tokenBuffer and move the argsPtr pointer after this token...
Definition: Ifx_Shell.c:721
Ifx_Shell_parseFloat32
IFX_EXTERN boolean Ifx_Shell_parseFloat32(pchar *argsPtr, float32 *value)
Parse a 32-bit (single precision) floating-point value.
Definition: Ifx_Shell.c:925
Ifx_Shell_Protocol::onStartData
void * onStartData
Definition: Ifx_Shell.h:202
IfxStdIf_DPipe.h
Standard interface: Data Pipe.
IFX_CFG_SHELL_CMD_HISTORY_SIZE
#define IFX_CFG_SHELL_CMD_HISTORY_SIZE
Number of commands to store in history.
Definition: Ifx_Shell.h:127
Ifx_Shell_Command::call
Ifx_Shell_Call call
Definition: Ifx_Shell.h:174
sint64
long long sint64
Definition: Platform_Types.h:141
Ifx_Shell_init
IFX_EXTERN boolean Ifx_Shell_init(Ifx_Shell *shell, const Ifx_Shell_Config *config)
Initialize the shell.
Definition: Ifx_Shell.c:331
Ifx_Shell_ResultCode_ok
Definition: Ifx_Shell.h:162
Ifx_Shell_ResultCode_undefined
Definition: Ifx_Shell.h:161
Ifx_Shell_Command::data
void * data
Definition: Ifx_Shell.h:173
boolean
unsigned char boolean
Definition: Platform_Types.h:104
Ifx_Shell_CmdLine::historyItem
Ifx_SizeT historyItem
Item ID in command history list, or IFX_SHELL_CMD_HISTORY_NO_ITEM if not using list (e...
Definition: Ifx_Shell.h:184
Ifx_Shell_Config::standardIo
IfxStdIf_DPipe * standardIo
Pointer to a IfxStdIf_DPipe object used by the Shell.
Definition: Ifx_Shell.h:263
Ifx_Shell_Config
Shell configuration.
Definition: Ifx_Shell.h:261
Ifx_Shell_Protocol::object
void * object
Definition: Ifx_Shell.h:203
float64
double float64
Definition: Platform_Types.h:175
uint16
unsigned short uint16
Definition: Platform_Types.h:112
Ifx_Shell_bbProtocolStart
IFX_EXTERN boolean Ifx_Shell_bbProtocolStart(pchar args, void *data, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. Start the ShellBb protocol.
Definition: Ifx_Shell.c:287
Ifx_Shell_Config::showPrompt
boolean showPrompt
Specifies whether the IFX_CFG_SHELL_PROMPT shall be displayed after each command. ...
Definition: Ifx_Shell.h:265
Ifx_Shell_Syntax::syntax
pchar syntax
syntax
Definition: Ifx_Shell.h:276
Ifx_Shell_matchToken
IFX_EXTERN boolean Ifx_Shell_matchToken(pchar *argsPtr, pchar token)
Match string pointed by the *argsPtr with a given token.
Definition: Ifx_Shell.c:669
Ifx_Shell_Flags::echo
uint16 echo
Definition: Ifx_Shell.h:213
Ifx_Shell_showHelp
IFX_EXTERN boolean Ifx_Shell_showHelp(pchar args, void *shellPtr, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. Show the help menu and list of commands.
Definition: Ifx_Shell.c:228
Ifx_Shell_initConfig
void Ifx_Shell_initConfig(Ifx_Shell_Config *config)
Definition: Ifx_Shell.c:308
IFX_CFG_SHELL_CMD_LINE_SIZE
#define IFX_CFG_SHELL_CMD_LINE_SIZE
max command line IFX_CFG_SHELL_CMD_LINE_SIZE - 1
Definition: Ifx_Shell.h:131
sint32
long sint32
Definition: Platform_Types.h:134
IFX_SHELL_CMD_STATE_NORMAL
Normal - no special sequences being processed.
Definition: Ifx_Shell.h:190
IFX_SHELL_CMD_STATE_ESCAPE
Escape character has been pressed.
Definition: Ifx_Shell.h:191
Ifx_Shell_Flags::showPrompt
uint16 showPrompt
Definition: Ifx_Shell.h:210
Ifx_Shell_CmdLine::length
Ifx_SizeT length
Pointer to variable containing total length of command line.
Definition: Ifx_Shell.h:182
IFX_SHELL_CMD_STATE_ESCAPE_BRACKET_NUMBER
ESC [ (number) pressed.
Definition: Ifx_Shell.h:193
Ifx_Shell_CmdLine::cursor
Ifx_SizeT cursor
Pointer to variable containing position of cursor in so-far-processed command line.
Definition: Ifx_Shell.h:181
Ifx_Shell_Command::commandLine
pchar commandLine
Definition: Ifx_Shell.h:171
Ifx_Shell_Protocol
Shell protocol configuration.
Definition: Ifx_Shell.h:197
Ifx_Shell_ResultCode_unknown
Definition: Ifx_Shell.h:159
Ifx_Shell_parseUInt64
IFX_EXTERN boolean Ifx_Shell_parseUInt64(pchar *argsPtr, uint64 *value, boolean hex)
Parse an unsigned 64-bit integer value.
Definition: Ifx_Shell.c:870
Ifx_Shell_deinit
IFX_EXTERN void Ifx_Shell_deinit(Ifx_Shell *shell)
Deinitialise the shell.
Definition: Ifx_Shell.c:648
Ifx_Shell_process
IFX_EXTERN void Ifx_Shell_process(Ifx_Shell *shell)
Process the shell.
Definition: Ifx_Shell.c:388
Ifx_Shell_disable
IFX_EXTERN void Ifx_Shell_disable(Ifx_Shell *shell)
Disable the shell.
Definition: Ifx_Shell.c:1316
IFX_SHELL_CMD_STATE_ESCAPE_BRACKET
ESC [ pressed.
Definition: Ifx_Shell.h:192
pchar
const char * pchar
const char pointer
Definition: Ifx_Types.h:53
Ifx_Shell_Protocol::started
boolean started
Definition: Ifx_Shell.h:204
Ifx_Shell
Shell object definition.
Definition: Ifx_Shell.h:232
IFX_CFG_SHELL_COMMAND_LISTS
#define IFX_CFG_SHELL_COMMAND_LISTS
Number of command lists.
Definition: Ifx_Shell.h:135


iLLD_TC38A: Ifx_Ssw.h Source File

  • Infra
  • Ssw
  • TC38A
  • Tricore
Ifx_Ssw.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_Ssw.h
3 * \brief Startup Software configuration. Can configure which core to be enabled.
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 #ifndef IFX_SSW_H_
43 #define IFX_SSW_H_
44
45 /*******************************************************************************
46 ** Includes **
47 *******************************************************************************/
48 #include "Ifx_Ssw_Compilers.h"
49 #include "Ifx_Ssw_LegacySwCfg.h"
50
51 /******************************************************************************/
52 /* Macros */
53 /******************************************************************************/
54
55 #ifndef IFX_CFG_SSW_ENABLE_TRICORE0
56 #define IFX_CFG_SSW_ENABLE_TRICORE0 (1U)
57 #endif
58
59 #ifndef IFX_CFG_SSW_ENABLE_TRICORE1
60 #define IFX_CFG_SSW_ENABLE_TRICORE1 (1U)
61 #endif
62
63 #ifndef IFX_CFG_SSW_ENABLE_TRICORE2
64 #define IFX_CFG_SSW_ENABLE_TRICORE2 (1U)
65 #endif
66
67 #ifndef IFX_CFG_SSW_ENABLE_TRICORE3
68 #define IFX_CFG_SSW_ENABLE_TRICORE3 (1U)
69 #endif
70
71 #ifndef IFX_CFG_SSW_PSW_DEFAULT
72 #define IFX_CFG_SSW_PSW_DEFAULT (0x00000980u)
73 #endif
74
75 #ifndef IFX_CFG_SSW_ENABLE_INDIVIDUAL_C_INIT
76 #define IFX_CFG_SSW_ENABLE_INDIVIDUAL_C_INIT (0U)
77 #endif
78
79 /******************************************************************************/
80 /* Typedefs */
81 /******************************************************************************/
82 /** \brief Structure definition for the BMHD
83 * Based on BMI and start address respective CRC and Inverted CRC values has to be calculated and updated.
84 * CRC-32 polynomial as defined in the IEEE 802.3 standard is used to generate the CRC value. The CRC algorithm
85 * treats input data as a stream of bits.
86 *
87 * Eg. To calculate the CRC data has to given in big-endian order.
88 * for the below values:
89 * bmi = 0x00FE
90 * bmhdid = 0xB359
91 * stad = 0xA00A0000
92 * CRC calculation:
93 * Input = 0xB35900FEA00A0000
94 * CRC value = 0x3CEED0A6
95 * CRC Inverted = 0xC3112F59
96 */
97 typedef struct
98 {
99 unsigned short bmi; /**< \brief 0x000: Boot Mode Index (BMI)*/
100 unsigned short bmhdid; /**< \brief 0x002: Boot Mode Header ID (CODE) = B359H*/
101 unsigned int stad; /**< \brief 0x004: User Code start address*/
102 unsigned int crc; /**< \brief 0x008: Check Result for the BMI Header (offset 000H - 007H)*/
103 unsigned int crcInv; /**< \brief 0x00C: Inverted Check Result for the BMI Header (offset 000H - 007H)*/
104 unsigned int reserved0[60]; /**< \brief 0x010: Reserved area (60 words) till the offset 0x100*/
105 unsigned int pw[8]; /**< \brief 0x100: Password protection (8 words) till the offset 0x120 */
106 unsigned int reserved1[52]; /**< \brief 0x120: Reserved area (52 words) till the offset 0x1F0*/
107 unsigned int confirmation; /**< \brief 0x1F0: 32-bit CODE, (always same)*/
108 } Ifx_Ssw_Bmhd;
109
110 /******************************************************************************/
111 /* Exported prototypes */
112 /******************************************************************************/
113 void __Core1_start(void);
114 void __Core2_start(void);
115 void __Core3_start(void);
116
117 #endif /* IFX_SSW_H_ */
Ifx_Ssw_Compilers.h
Startup Software for compiler options.
Ifx_Ssw_Bmhd::stad
unsigned int stad
0x004: User Code start address
Definition: Ifx_Ssw.h:101
Ifx_Ssw_Bmhd::crcInv
unsigned int crcInv
0x00C: Inverted Check Result for the BMI Header (offset 000H - 007H)
Definition: Ifx_Ssw.h:103
__Core2_start
void __Core2_start(void)
Definition: Ifx_Ssw_Tc2.c:87
Ifx_Ssw_Bmhd::confirmation
unsigned int confirmation
0x1F0: 32-bit CODE, (always same)
Definition: Ifx_Ssw.h:107
Ifx_Ssw_LegacySwCfg.h
Startup Software to support legacy controller options.
Ifx_Ssw_Bmhd::crc
unsigned int crc
0x008: Check Result for the BMI Header (offset 000H - 007H)
Definition: Ifx_Ssw.h:102
__Core1_start
void __Core1_start(void)
Definition: Ifx_Ssw_Tc1.c:87
Ifx_Ssw_Bmhd::bmhdid
unsigned short bmhdid
0x002: Boot Mode Header ID (CODE) = B359H
Definition: Ifx_Ssw.h:100
Ifx_Ssw_Bmhd
Structure definition for the BMHD Based on BMI and start address respective CRC and Inverted CRC valu...
Definition: Ifx_Ssw.h:97
Ifx_Ssw_Bmhd::bmi
unsigned short bmi
0x000: Boot Mode Index (BMI)
Definition: Ifx_Ssw.h:99
__Core3_start
void __Core3_start(void)
Definition: Ifx_Ssw_Tc3.c:87


iLLD_TC38A: Ifx_Ssw_Compilers.h Source File

  • Infra
  • Ssw
  • TC38A
  • Tricore
Ifx_Ssw_Compilers.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_Ssw_Compilers.h
3 * \brief Startup Software for compiler options
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 #ifndef IFX_SSW_COMPILERS_H_
43 #define IFX_SSW_COMPILERS_H_
44
45 /*Macro definition to show GNUC macros with the editor*/
46 #if ((!defined(__ghs__)) && (!defined(__DCC__)) && (!defined(__TASKING__)) && (!defined(__HIGHTEC__)))
47 #define __HIGHTEC__
48 #endif
49
50 /*Include files for each compiler*/
51 #ifdef __DCC__
52 #include "Ifx_Ssw_CompilersDcc.h"
53
54 #elif defined(__HIGHTEC__)
55 #include "Ifx_Ssw_CompilersGnuc.h"
56
57 #elif defined(__TASKING__)
58 #include "Ifx_Ssw_CompilersTasking.h"
59
60 #elif defined(__ghs__)
61 #include "Ifx_Ssw_CompilersGhs.h"
62 #endif
63
64 #endif /* IFX_SSW_COMPILERS_H_ */
Ifx_Ssw_CompilersGnuc.h
Startup Software for GNU compiler options.
Ifx_Ssw_CompilersGhs.h
Startup Software for GHS compiler options.
Ifx_Ssw_CompilersDcc.h
Startup Software for DCC compiler options.
Ifx_Ssw_CompilersTasking.h
Startup Software for Tasking compiler options.


iLLD_TC38A: Ifx_Ssw_CompilersDcc.h Source File

  • Infra
  • Ssw
  • TC38A
  • Tricore
Ifx_Ssw_CompilersDcc.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_Ssw_CompilersDcc.h
3 * \brief Startup Software for DCC compiler options
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 * IMPORTANT NOTICE
9 *
10 * Use of this file is subject to the terms of use agreed between (i) you or
11 * the company in which ordinary course of business you are acting and (ii)
12 * Infineon Technologies AG or its licensees. If and as long as no such terms
13 * of use are agreed, use of this file is subject to following:
14 *
15 * Boost Software License - Version 1.0 - August 17th, 2003
16 *
17 * Permission is hereby granted, free of charge, to any person or organization
18 * obtaining a copy of the software and accompanying documentation covered by
19 * this license (the "Software") to use, reproduce, display, distribute,
20 * execute, and transmit the Software, and to prepare derivative works of the
21 * Software, and to permit third-parties to whom the Software is furnished to
22 * do so, all subject to the following:
23 *
24 * The copyright notices in the Software and this entire statement, including
25 * the above license grant, this restriction and the following disclaimer, must
26 * be included in all copies of the Software, in whole or in part, and all
27 * derivative works of the Software, unless such copies or derivative works are
28 * solely in the form of machine-executable object code generated by a source
29 * language processor.
30 *
31 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
32 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
33 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
34 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
35 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
36 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
37 * DEALINGS IN THE SOFTWARE.
38 *
39 */
40
41 #ifndef IFX_SSW_COMPILERSDCC_H_
42 #define IFX_SSW_COMPILERSDCC_H_
43
44 /******************************************************************************/
45 /*----------------------------------Includes----------------------------------*/
46 /******************************************************************************/
47
48 /******************************************************************************/
49 /*-----------------------------------Macros-----------------------------------*/
50 /******************************************************************************/
51
52 /*Linker definitions which are specific to Gnuc */
53 /* IFX_CFG_USE_COMPILER_DEFAULT_LINKER shall be defined in Ifx_Cfg.h
54 * to use the default compiler linker varaibles and startup */
55 #ifndef IFX_CFG_USE_COMPILER_DEFAULT_LINKER
56
57 /*Start: Core 0 definitions ********************************************** */
58
59 /*C extern defintions */
60 #define IFX_SSW_CORE_LINKER_SYMBOLS(cpu) \
61 extern unsigned int __USTACK##cpu[]; /**< user stack end */ \
62 extern unsigned int __ISTACK##cpu[]; /**< interrupt stack end */ \
63 extern unsigned int __INTTAB_CPU##cpu[]; /**< interrupt vector table */ \
64 extern unsigned int __TRAPTAB_CPU##cpu[]; /**< trap vector table */ \
65 extern unsigned int __CSA##cpu[]; /**< context save area begin */ \
66 extern unsigned int __CSA##cpu##_END[]; /**< context save area end */
67
68 #define __USTACK(cpu) __USTACK##cpu
69 #define __ISTACK(cpu) __ISTACK##cpu
70 #define __INTTAB_CPU(cpu) __INTTAB_CPU##cpu
71 #define __TRAPTAB_CPU(cpu) __TRAPTAB_CPU##cpu
72 #define __CSA(cpu) __CSA##cpu
73 #define __CSA_END(cpu) __CSA##cpu##_END
74 #define __START(cpu) __START##cpu
75
76 #define IFX_SSW_COMMON_LINKER_SYMBOLS() \
77 __asm("\t .weak __A8_MEM, __A9_MEM"); /**< ASM extern definitions */ \
78 extern unsigned int __START0[]; /**< Pointer to the startup code */ \
79 extern unsigned int __START1[]; /**< Pointer to the startup code */ \
80 extern unsigned int __START2[]; /**< Pointer to the startup code */ \
81 extern unsigned int __START3[]; /**< Pointer to the startup code */ \
82 extern unsigned int __START4[]; /**< Pointer to the startup code */ \
83 extern unsigned int __START5[]; /**< Pointer to the startup code */
84
85 /*Wrapper macros for the tool specific definitions */
86 #if defined(IFX_USE_SW_MANAGED_INT)
87 #define __INTTAB(cpu) ((unsigned int)__INTTAB_CPU##cpu | (unsigned int)0x1FE0)
88 #else
89 #define __INTTAB(cpu) __INTTAB_CPU##cpu
90 #endif /*defined(IFX_USE_SW_MANAGED_INT) */
91
92 #define __TRAPTAB(cpu) __TRAPTAB_CPU##cpu
93
94 #define __SDATA1(cpu) _SMALL_DATA_
95 #define __SDATA2(cpu) _LITERAL_DATA_
96 #define __SDATA3(cpu) __A8_MEM
97 #define __SDATA4(cpu) __A9_MEM
98
99 #endif /*#ifndef IFX_CFG_USE_COMPILER_DEFAULT_LINKER*/
100
101 #define IFX_SSW_INLINE __inline__
102
103 #define IFX_SSW_NULL_PTR ((void *)0x0U)
104
105 /******************************************************************************/
106 /*-------------------------------- Typedefs -------------------------------*/
107 /******************************************************************************/
108 typedef volatile union
109 {
110 unsigned int *ucPtr;
111 unsigned int *usPtr;
112 unsigned int *uiPtr;
113 unsigned long long *ullPtr;
114 } Ifx_Ssw_CTablePtr;
115
116 /******************************************************************************/
117 /*---------------------------- GNU Intrinsics -----------------------------*/
118 /******************************************************************************/
119
120 extern void Ifx_Ssw_MTCR(const unsigned int, unsigned int) __attribute__ ((intrinsic_function(0x102, 0, "mtcr")));
121
122 extern int Ifx_Ssw_MFCR(const unsigned int) __attribute__ ((intrinsic_function(0x101, 0, "mfcr")));
123
124 extern void Ifx_Ssw_NOP(void) __attribute__ ((intrinsic_function(0x103, 0, "nop")));
125
126 extern void Ifx_Ssw_DSYNC(void) __attribute__ ((intrinsic_function(0x103, 0, "dsync")));
127
128 extern void Ifx_Ssw_ISYNC(void) __attribute__ ((intrinsic_function(0x103, 0, "isync")));
129
130 extern unsigned int Ifx_Ssw_MINU(unsigned int, unsigned int) __attribute__ ((intrinsic_pseudo(3, "min.u")));
131
132 extern int Ifx_Ssw_CLZ(int) __attribute__ ((intrinsic_pseudo(1, "clz")));
133
134 #define Ifx_Ssw___setAddressReg(aReg, val) \
135 {__asm("#$$bp"); \
136 __asm(" movh.a\t %a15,"#val "@ha\n"); \
137 __asm(" lea\t %a15,[%a15]"#val "@l\n"); \
138 __asm(" mov.aa %"#aReg ", %a15\n"); \
139 __asm("#$$noadjust"); \
140 __asm("#$$ep"); }
141
142 #define Ifx_Ssw_setAddressReg(regNum, val) Ifx_Ssw___setAddressReg(regNum, val)
143
144 asm volatile void Ifx_Ssw_moveToDataParam0(unsigned int var)
145 {
146 % reg var
147 ! "%d2"
148 mov %d2, var
149 }
150
151 asm volatile unsigned int Ifx_Ssw_getDataParam0(void)
152 {
153 ! "%d2"
154 mov %d2, %d2
155 }
156
157 asm volatile void Ifx_Ssw_jumpToFunction(void *fun)
158 {
159 % reg fun
160 ji fun
161 }
162
163 asm volatile void Ifx_Ssw_jumpToFunctionWithLink(void *fun)
164 {
165 % reg fun
166 jli fun
167 }
168
169 asm void Ifx_Ssw_jumpBackToLink(void)
170 {
171 ! "%a11"
172 ji %a11
173 }
174
175 IFX_SSW_INLINE void Ifx_Ssw_C_InitInline(void)
176 {
177 extern void __init_main(void);
178 __init_main(); /* initialize data */
179 }
180
181 #endif /* IFX_SSW_COMPILERSDCC_H_ */
Ifx_Ssw_CLZ
int Ifx_Ssw_CLZ(int) __attribute__((intrinsic_pseudo(1
Ifx_Ssw_MTCR
void Ifx_Ssw_MTCR(const unsigned int, unsigned int) __attribute__((intrinsic_function(0x102
Ifx_Ssw_DSYNC
void Ifx_Ssw_DSYNC(void) __attribute__((intrinsic_function(0x103
IFX_SSW_INLINE
#define IFX_SSW_INLINE
Definition: Ifx_Ssw_CompilersDcc.h:114
Ifx_Ssw_C_InitInline
IFX_SSW_INLINE void Ifx_Ssw_C_InitInline(void)
Definition: Ifx_Ssw_CompilersDcc.h:188
Ifx_Ssw_NOP
void Ifx_Ssw_NOP(void) __attribute__((intrinsic_function(0x103
Ifx_Ssw_jumpToFunction
asm volatile void Ifx_Ssw_jumpToFunction(void *fun)
Definition: Ifx_Ssw_CompilersDcc.h:170
Ifx_Ssw_jumpBackToLink
asm void Ifx_Ssw_jumpBackToLink(void)
Definition: Ifx_Ssw_CompilersDcc.h:182
Ifx_Ssw_getDataParam0
asm volatile unsigned int Ifx_Ssw_getDataParam0(void)
Definition: Ifx_Ssw_CompilersDcc.h:164
Ifx_Ssw_CTablePtr
Definition: Ifx_Ssw_CompilersDcc.h:121
Ifx_Ssw_jumpToFunctionWithLink
asm volatile void Ifx_Ssw_jumpToFunctionWithLink(void *fun)
Definition: Ifx_Ssw_CompilersDcc.h:176
Ifx_Ssw_MFCR
int Ifx_Ssw_MFCR(const unsigned int) __attribute__((intrinsic_function(0x101
Ifx_Ssw_MINU
unsigned int Ifx_Ssw_MINU(unsigned int, unsigned int) __attribute__((intrinsic_pseudo(3
Ifx_Ssw_moveToDataParam0
asm volatile void Ifx_Ssw_moveToDataParam0(unsigned int var)
Definition: Ifx_Ssw_CompilersDcc.h:157
Ifx_Ssw_ISYNC
void Ifx_Ssw_ISYNC(void) __attribute__((intrinsic_function(0x103


iLLD_TC38A: Ifx_Ssw_CompilersGhs.h Source File

  • Infra
  • Ssw
  • TC38A
  • Tricore
Ifx_Ssw_CompilersGhs.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_Ssw_CompilersGhs.h
3 * \brief Startup Software for GHS compiler options
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 * IMPORTANT NOTICE
9 *
10 * Use of this file is subject to the terms of use agreed between (i) you or
11 * the company in which ordinary course of business you are acting and (ii)
12 * Infineon Technologies AG or its licensees. If and as long as no such terms
13 * of use are agreed, use of this file is subject to following:
14 *
15 * Boost Software License - Version 1.0 - August 17th, 2003
16 *
17 * Permission is hereby granted, free of charge, to any person or organization
18 * obtaining a copy of the software and accompanying documentation covered by
19 * this license (the "Software") to use, reproduce, display, distribute,
20 * execute, and transmit the Software, and to prepare derivative works of the
21 * Software, and to permit third-parties to whom the Software is furnished to
22 * do so, all subject to the following:
23 *
24 * The copyright notices in the Software and this entire statement, including
25 * the above license grant, this restriction and the following disclaimer, must
26 * be included in all copies of the Software, in whole or in part, and all
27 * derivative works of the Software, unless such copies or derivative works are
28 * solely in the form of machine-executable object code generated by a source
29 * language processor.
30 *
31 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
32 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
33 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
34 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
35 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
36 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
37 * DEALINGS IN THE SOFTWARE.
38 *
39 */
40
41 #ifndef IFX_SSW_COMPILERSGHS_H_
42 #define IFX_SSW_COMPILERSGHS_H_
43
44 /******************************************************************************/
45 /*----------------------------------Includes----------------------------------*/
46 /******************************************************************************/
47
48 #include <intrinsics.h>
49
50 /******************************************************************************/
51 /*-----------------------------------Macros-----------------------------------*/
52 /******************************************************************************/
53
54 /*Linker definitions which are specific to Gnuc */
55 /* IFX_CFG_USE_COMPILER_DEFAULT_LINKER shall be defined in Ifx_Cfg.h
56 * to use the default compiler linker varaibles and startup */
57 #ifndef IFX_CFG_USE_COMPILER_DEFAULT_LINKER
58
59 /*Start: Common definitions ********************************************** */
60 #define IFX_SSW_COMMON_LINKER_SYMBOLS() \
61 __asm__("\t .extern _SMALL_DATA_, _LITERAL_DATA_, _SMALL_DATA_A8_, _SMALL_DATA_A9_"); \
62 extern unsigned int __START0[]; /**< Pointer to the startup code */ \
63 extern unsigned int __START1[]; /**< Pointer to the startup code */ \
64 extern unsigned int __START2[]; /**< Pointer to the startup code */ \
65 extern unsigned int __START3[]; /**< Pointer to the startup code */ \
66 extern unsigned int __START4[]; /**< Pointer to the startup code */ \
67 extern unsigned int __START5[] /**< Pointer to the startup code */
68
69 /*End: Common definitions ************************************************ */
70
71 /*Start: Core 0 definitions ********************************************** */
72
73 /*C extern defintions */
74 #define IFX_SSW_CORE_LINKER_SYMBOLS(cpu) \
75 extern unsigned int __USTACK##cpu[]; /**< user stack end */ \
76 extern unsigned int __ISTACK##cpu[]; /**< interrupt stack end */ \
77 extern unsigned int __INTTAB_CPU##cpu[]; /**< Interrupt vector table */ \
78 extern unsigned int __TRAPTAB_CPU##cpu[]; /**< trap table */ \
79 extern unsigned int __CSA##cpu[]; /**< context save area 1 begin */ \
80 extern unsigned int __CSA##cpu##_END[] /**< context save area 1 begin */
81
82 #define __USTACK(cpu) __USTACK##cpu
83 #define __ISTACK(cpu) __ISTACK##cpu
84 #define __INTTAB_CPU(cpu) __INTTAB_CPU##cpu
85 #define __TRAPTAB_CPU(cpu) __TRAPTAB_CPU##cpu
86 #define __CSA(cpu) __CSA##cpu
87 #define __CSA_END(cpu) __CSA##cpu##_END
88 #define __START(cpu) __START##cpu
89
90 /*Wrapper macros for the tool specific definitions */
91 #if defined(IFX_USE_SW_MANAGED_INT)
92 #define __INTTAB(cpu) ((unsigned int)__INTTAB_CPU##cpu | (unsigned int)0x1FE0)
93 #else
94 #define __INTTAB(cpu) __INTTAB_CPU##cpu
95 #endif /*defined(IFX_USE_SW_MANAGED_INT) */
96
97 #define __TRAPTAB(cpu) __TRAPTAB_CPU##cpu
98
99 #define __SDATA1(cpu) __A0_MEM
100 #define __SDATA2(cpu) __A1_MEM
101 #define __SDATA3(cpu) __A8_MEM
102 #define __SDATA4(cpu) __A9_MEM
103
104 #endif /*#ifndef IFX_CFG_USE_COMPILER_DEFAULT_LINKER*/
105
106 #define IFX_SSW_INLINE static inline __attribute__ ((always_inline))
107
108 #define IFX_SSW_NULL_PTR ((void *)0x0U)
109
110 /******************************************************************************/
111 /*-------------------------------- Typedefs -------------------------------*/
112 /******************************************************************************/
113 typedef volatile union
114 {
115 unsigned int *ucPtr;
116 unsigned int *usPtr;
117 unsigned int *uiPtr;
118 unsigned long long *ullPtr;
119 } Ifx_Ssw_CTablePtr;
120
121 /******************************************************************************/
122 /*---------------------------- GNU Intrinsics -----------------------------*/
123 /******************************************************************************/
124
125 #define Ifx_Ssw_MTCR(reg, val) __mtcr(reg, val);
126
127 #define Ifx_Ssw_MFCR(reg) __mfcr(reg);
128
129 IFX_SSW_INLINE void Ifx_Ssw_NOP(void)
130 {
131 __nop();
132 }
133
134
135 IFX_SSW_INLINE void Ifx_Ssw_DSYNC(void)
136 {
137 __dsync();
138 }
139
140
141 IFX_SSW_INLINE void Ifx_Ssw_ISYNC(void)
142 {
143 __isync();
144 }
145
146
147 IFX_SSW_INLINE unsigned int Ifx_Ssw_MINU(unsigned int a, unsigned int b)
148 {
149 return __minu(a, b);
150 }
151
152
153 #define Ifx_Ssw_CLZ(a) __CLZ32(a)
154
155 #define Ifx_Ssw___setAddressReg(aReg, val) \
156 {__asm__ volatile ("movh.a\t "#aReg ", %hi("#val ")\n\tlea\t "#aReg ",["#aReg "]%lo("#val ")"); }
157
158 #define Ifx_Ssw_setAddressReg(regNum, val) Ifx_Ssw___setAddressReg(regNum, val)
159
160 IFX_SSW_INLINE void Ifx_Ssw_moveToDataParam0(unsigned int var)
161 {
162 __asm__ volatile ("mov\t d2, %0" ::"d" (var));
163 }
164
165
166 IFX_SSW_INLINE unsigned int Ifx_Ssw_getDataParam0(void)
167 {
168 unsigned int var;
169 __asm__ volatile (" mov\t %0, d2" : "=d" (var));
170 return var;
171 }
172
173
174 IFX_SSW_INLINE void Ifx_Ssw_jumpToFunction(void (*fun)(void))
175 {
176 __asm__ volatile ("ji %0" ::"a" (fun));
177 }
178
179
180 IFX_SSW_INLINE void Ifx_Ssw_jumpToFunctionWithLink(void *fun)
181 {
182 __asm__ volatile ("jli %0" ::"a" (fun));
183 }
184
185
186 IFX_SSW_INLINE void Ifx_Ssw_jumpBackToLink(void)
187 {
188 __asm__ volatile ("ji a11");
189 }
190
191
192 typedef int ptrdiff_t;
193 typedef unsigned int syze_t;
194 typedef signed int signed_size_t;
195 #define size_t syze_t
196
197 extern void *memcpy(void *s1, const void *s2, syze_t n);
198 extern void *memset(void *s, int c, syze_t n);
199
200 /* rodata is absolute */
201 typedef const char rodata_ptr[];
202 #define PICBASE 0
203 #define PIDBASE 0
204 #define PIRBASE 0
205
206 #define CONST_FUNCP *const
207
208 IFX_SSW_INLINE void Ifx_Ssw_C_InitInline(void)
209 {
210 /*----------------------------------------------------------------------*/
211 /* */
212 /* Clear BSS */
213 /* */
214 /*----------------------------------------------------------------------*/
215 {
216 #pragma ghs rodata
217 extern rodata_ptr __ghsbinfo_clear;
218 #pragma ghs rodata
219 extern rodata_ptr __ghseinfo_clear;
220 #pragma ghs rodata
221 extern rodata_ptr __ghsbinfo_aclear;
222
223 void **b = (void **)((char *)__ghsbinfo_clear);
224 void **e = (void **)((char *)__ghseinfo_clear);
225 void **a = __ghsbinfo_aclear != 0 ?
226 ((void **)((char *)__ghsbinfo_aclear)) : e;
227
228 /* Warning: This code assumes
229 * __ghsbinfo_clear <= __ghsbinfo_aclear <= __ghseinfo_clear
230 * Which is currently enforced with elxr
231 * OR
232 * __ghsbinfo_aclear == 0 (i.e.: undefined)
233 */
234
235 int OFFSET = PIDBASE;
236
237 while (b != e)
238 {
239 void *t; /* target pointer */
240 ptrdiff_t v; /* value to set */
241 size_t n; /* set n bytes */
242
243 while (b != a)
244 {
245 t = OFFSET + (char *)(*b++);
246 v = *((ptrdiff_t *)b); b++;
247 n = *((size_t *)b); b++;
248 (void)memset(t, v, n);
249 }
250
251 OFFSET = 0;
252 a = e;
253 }
254 }
255
256 /*----------------------------------------------------------------------*/
257 /* */
258 /* Copy from ROM to RAM */
259 /* */
260 /*----------------------------------------------------------------------*/
261
262 {
263 #pragma ghs rodata
264 extern rodata_ptr __ghsbinfo_copy;
265 #pragma ghs rodata
266 extern rodata_ptr __ghsbinfo_tcopy;
267 #pragma ghs rodata
268 extern rodata_ptr __ghseinfo_copy;
269
270 void **b = (void **)((char *)__ghsbinfo_copy);
271 void **m = (void **)((char *)__ghsbinfo_tcopy);
272 void **e = (void **)((char *)__ghseinfo_copy);
273
274 while (b != e)
275 {
276 void *t; /* target pointer */
277 void *s; /* source pointer */
278 size_t n; /* copy n bytes */
279 t = ((b < m) ? PIDBASE : PICBASE) + (char *)(*b); b++;
280 s = PIRBASE + (char *)(*b++);
281 n = *((size_t *)b); b++;
282 (void)memcpy(t, s, n);
283 }
284 }
285 }
286
287
288 #endif /* IFX_SSW_COMPILERSGHS_H_ */
memcpy
void * memcpy(void *s1, const void *s2, syze_t n)
signed_size_t
signed int signed_size_t
Definition: Ifx_Ssw_CompilersGhs.h:207
Ifx_Ssw_jumpToFunction
IFX_SSW_INLINE void Ifx_Ssw_jumpToFunction(void(*fun)(void))
Definition: Ifx_Ssw_CompilersGhs.h:187
rodata_ptr
const char rodata_ptr[]
Definition: Ifx_Ssw_CompilersGhs.h:214
memset
void * memset(void *s, int c, syze_t n)
__asm__
#define __asm__
Definition: Ifx_TypesTasking.h:45
__nop
void __nop(void) __attribute__((intrinsic_function(0x103
IFX_SSW_INLINE
#define IFX_SSW_INLINE
Definition: Ifx_Ssw_CompilersGhs.h:119
__minu
uint32 __minu(uint32, uint32) __attribute__((intrinsic_pseudo(3
__isync
void __isync(void) __attribute__((intrinsic_function(0x103
Ifx_Ssw_getDataParam0
IFX_SSW_INLINE unsigned int Ifx_Ssw_getDataParam0(void)
Definition: Ifx_Ssw_CompilersGhs.h:179
syze_t
unsigned int syze_t
Definition: Ifx_Ssw_CompilersGhs.h:206
PIDBASE
#define PIDBASE
Definition: Ifx_Ssw_CompilersGhs.h:216
Ifx_Ssw_jumpToFunctionWithLink
IFX_SSW_INLINE void Ifx_Ssw_jumpToFunctionWithLink(void *fun)
Definition: Ifx_Ssw_CompilersGhs.h:193
PIRBASE
#define PIRBASE
Definition: Ifx_Ssw_CompilersGhs.h:217
Ifx_Ssw_MINU
IFX_SSW_INLINE unsigned int Ifx_Ssw_MINU(unsigned int a, unsigned int b)
Definition: Ifx_Ssw_CompilersGhs.h:160
Ifx_Ssw_C_InitInline
IFX_SSW_INLINE void Ifx_Ssw_C_InitInline(void)
Definition: Ifx_Ssw_CompilersGhs.h:221
__dsync
void __dsync(void) __attribute__((intrinsic_function(0x103
t
uint32 ins t
Definition: IfxCpu_IntrinsicsDcc.h:414
ptrdiff_t
int ptrdiff_t
Definition: Ifx_Ssw_CompilersGhs.h:205
Ifx_Ssw_moveToDataParam0
IFX_SSW_INLINE void Ifx_Ssw_moveToDataParam0(unsigned int var)
Definition: Ifx_Ssw_CompilersGhs.h:173
Ifx_Ssw_CTablePtr
Definition: Ifx_Ssw_CompilersDcc.h:121
PICBASE
#define PICBASE
Definition: Ifx_Ssw_CompilersGhs.h:215
Ifx_Ssw_jumpBackToLink
IFX_SSW_INLINE void Ifx_Ssw_jumpBackToLink(void)
Definition: Ifx_Ssw_CompilersGhs.h:199
Ifx_Ssw_ISYNC
IFX_SSW_INLINE void Ifx_Ssw_ISYNC(void)
Definition: Ifx_Ssw_CompilersGhs.h:154
Ifx_Ssw_DSYNC
IFX_SSW_INLINE void Ifx_Ssw_DSYNC(void)
Definition: Ifx_Ssw_CompilersGhs.h:148
Ifx_Ssw_NOP
IFX_SSW_INLINE void Ifx_Ssw_NOP(void)
Definition: Ifx_Ssw_CompilersGhs.h:142


iLLD_TC38A: Ifx_Ssw_CompilersGnuc.h Source File

  • Infra
  • Ssw
  • TC38A
  • Tricore
Ifx_Ssw_CompilersGnuc.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_Ssw_CompilersGnuc.h
3 * \brief Startup Software for GNU compiler options
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 * IMPORTANT NOTICE
9 *
10 * Use of this file is subject to the terms of use agreed between (i) you or
11 * the company in which ordinary course of business you are acting and (ii)
12 * Infineon Technologies AG or its licensees. If and as long as no such terms
13 * of use are agreed, use of this file is subject to following:
14 *
15 * Boost Software License - Version 1.0 - August 17th, 2003
16 *
17 * Permission is hereby granted, free of charge, to any person or organization
18 * obtaining a copy of the software and accompanying documentation covered by
19 * this license (the "Software") to use, reproduce, display, distribute,
20 * execute, and transmit the Software, and to prepare derivative works of the
21 * Software, and to permit third-parties to whom the Software is furnished to
22 * do so, all subject to the following:
23 *
24 * The copyright notices in the Software and this entire statement, including
25 * the above license grant, this restriction and the following disclaimer, must
26 * be included in all copies of the Software, in whole or in part, and all
27 * derivative works of the Software, unless such copies or derivative works are
28 * solely in the form of machine-executable object code generated by a source
29 * language processor.
30 *
31 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
32 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
33 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
34 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
35 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
36 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
37 * DEALINGS IN THE SOFTWARE.
38 *
39 */
40
41 #ifndef IFX_SSW_COMPILERSGNUC_H_
42 #define IFX_SSW_COMPILERSGNUC_H_
43
44 /******************************************************************************/
45 /*----------------------------------Includes----------------------------------*/
46 /******************************************************************************/
47
48 #include "machine/intrinsics.h"
49
50 /******************************************************************************/
51 /*-----------------------------------Macros-----------------------------------*/
52 /******************************************************************************/
53
54 /*Linker definitions which are specific to Gnuc */
55 /* IFX_CFG_USE_COMPILER_DEFAULT_LINKER shall be defined in Ifx_Cfg.h
56 * to use the default compiler linker varaibles and startup */
57 #ifndef IFX_CFG_USE_COMPILER_DEFAULT_LINKER
58
59 /*Start: Common definitions ********************************************** */
60 #define IFX_SSW_COMMON_LINKER_SYMBOLS() \
61 extern unsigned int __A0_MEM[]; /**< center of A0 addressable area */ \
62 extern unsigned int __A1_MEM[]; /**< center of A1 addressable area */ \
63 extern unsigned int __A8_MEM[]; /**< center of A8 addressable area */ \
64 extern unsigned int __A9_MEM[]; /**< center of A9 addressable area */ \
65 extern unsigned int __START0[]; /**< Pointer to the startup code */ \
66 extern unsigned int __START1[]; /**< Pointer to the startup code */ \
67 extern unsigned int __START2[]; /**< Pointer to the startup code */ \
68 extern unsigned int __START3[]; /**< Pointer to the startup code */ \
69 extern unsigned int __START4[]; /**< Pointer to the startup code */ \
70 extern unsigned int __START5[]; /**< Pointer to the startup code */
71
72 /*End: Common definitions ************************************************ */
73
74 /*Start: Core 0 definitions ********************************************** */
75
76 /*C extern defintions */
77 #define IFX_SSW_CORE_LINKER_SYMBOLS(cpu) \
78 extern unsigned int __USTACK##cpu[]; /**< user stack end */ \
79 extern unsigned int __ISTACK##cpu[]; /**< interrupt stack end */ \
80 extern unsigned int __INTTAB_CPU##cpu[]; /**< Interrupt vector table */ \
81 extern unsigned int __TRAPTAB_CPU##cpu[]; /**< trap table */ \
82 extern unsigned int __CSA##cpu[]; /**< context save area 1 begin */ \
83 extern unsigned int __CSA##cpu##_END[]; /**< context save area 1 begin */
84
85 #define __USTACK(cpu) __USTACK##cpu
86 #define __ISTACK(cpu) __ISTACK##cpu
87 #define __INTTAB_CPU(cpu) __INTTAB_CPU##cpu
88 #define __TRAPTAB_CPU(cpu) __TRAPTAB_CPU##cpu
89 #define __CSA(cpu) __CSA##cpu
90 #define __CSA_END(cpu) __CSA##cpu##_END
91 #define __START(cpu) __START##cpu
92
93 /*Wrapper macros for the tool specific definitions */
94 #if defined(IFX_USE_SW_MANAGED_INT)
95 #define __INTTAB(cpu) ((unsigned int)__INTTAB_CPU##cpu | (unsigned int)0x1FE0)
96 #else
97 #define __INTTAB(cpu) __INTTAB_CPU##cpu
98 #endif /*defined(IFX_USE_SW_MANAGED_INT) */
99
100 #define __TRAPTAB(cpu) __TRAPTAB_CPU##cpu
101
102 #define __SDATA1(cpu) __A0_MEM
103 #define __SDATA2(cpu) __A1_MEM
104 #define __SDATA3(cpu) __A8_MEM
105 #define __SDATA4(cpu) __A9_MEM
106
107 #endif /*#ifndef IFX_CFG_USE_COMPILER_DEFAULT_LINKER*/
108
109 #define IFX_SSW_INLINE static inline __attribute__ ((always_inline))
110
111 #define IFX_SSW_NULL_PTR ((void *)0x0U)
112
113 /******************************************************************************/
114 /*-------------------------------- Typedefs -------------------------------*/
115 /******************************************************************************/
116 typedef volatile union
117 {
118 unsigned char *ucPtr;
119 unsigned short *usPtr;
120 unsigned int *uiPtr;
121 unsigned long long *ullPtr;
122 } Ifx_Ssw_CTablePtr;
123
124 /******************************************************************************/
125 /*---------------------------- GNU Intrinsics -----------------------------*/
126 /******************************************************************************/
127
128 #define Ifx_Ssw_MTCR(reg, val) __mtcr(reg, val);
129
130 #define Ifx_Ssw_MFCR(reg) __mfcr(reg);
131
132 IFX_SSW_INLINE void Ifx_Ssw_NOP(void)
133 {
134 __asm__ volatile ("nop" : : : "memory");
135 }
136
137
138 IFX_SSW_INLINE void Ifx_Ssw_DSYNC(void)
139 {
140 __asm__ volatile ("dsync" : : : "memory");
141 }
142
143
144 IFX_SSW_INLINE void Ifx_Ssw_ISYNC(void)
145 {
146 __asm__ volatile ("isync" : : : "memory");
147 }
148
149
150 IFX_SSW_INLINE unsigned int Ifx_Ssw_MINU(unsigned int a, unsigned int b)
151 {
152 unsigned int res;
153 __asm__ volatile ("min.u %0, %1, %2" : "=d" (res) : "d" (a), "d" (b));
154 return res;
155 }
156
157
158 #define Ifx_Ssw_CLZ(a) __builtin_clz(a)
159
160 #define Ifx_Ssw___setAddressReg(aReg, val) \
161 {__asm__ volatile ("movh.a\t %"#aReg ", hi:("#val ")\n\tlea\t %"#aReg ",[%"#aReg "] lo:("#val ")"); }
162
163 #define Ifx_Ssw_setAddressReg(regNum, val) Ifx_Ssw___setAddressReg(regNum, val)
164
165 IFX_SSW_INLINE void Ifx_Ssw_moveToDataParam0(unsigned int var)
166 {
167 __asm__ volatile ("mov\t %%d2, %0" ::"d" (var));
168 }
169
170
171 IFX_SSW_INLINE unsigned int Ifx_Ssw_getDataParam0(void)
172 {
173 unsigned int var;
174 __asm__ volatile (" mov\t %0, %%d2" : "=d" (var));
175 return var;
176 }
177
178
179 IFX_SSW_INLINE void Ifx_Ssw_jumpToFunction(void (*fun)(void))
180 {
181 __asm__ volatile ("ji %0" ::"a" (fun));
182 }
183
184
185 IFX_SSW_INLINE void Ifx_Ssw_jumpToFunctionWithLink(void *fun)
186 {
187 __asm__ volatile ("jli %0" ::"a" (fun));
188 }
189
190
191 IFX_SSW_INLINE void Ifx_Ssw_jumpBackToLink(void)
192 {
193 __asm__ volatile ("ji %a11");
194 }
195
196
197 extern unsigned int __clear_table[]; /**< clear table entry */
198 extern unsigned int __copy_table[]; /**< copy table entry */
199
200 IFX_SSW_INLINE void Ifx_Ssw_C_InitInline(void)
201 {
202 Ifx_Ssw_CTablePtr pBlockDest, pBlockSrc;
203 unsigned int uiLength, uiCnt;
204 unsigned int *pTable;
205 /* clear table */
206 pTable = (unsigned int *)&__clear_table;
207
208 while (pTable)
209 {
210 pBlockDest.uiPtr = (unsigned int *)*pTable++;
211 uiLength = *pTable++;
212
213 /* we are finished when length == -1 */
214 if (uiLength == 0xFFFFFFFF)
215 {
216 break;
217 }
218
219 uiCnt = uiLength / 8;
220
221 while (uiCnt--)
222 {
223 *pBlockDest.ullPtr++ = 0;
224 }
225
226 if (uiLength & 0x4)
227 {
228 *pBlockDest.uiPtr++ = 0;
229 }
230
231 if (uiLength & 0x2)
232 {
233 *pBlockDest.usPtr++ = 0;
234 }
235
236 if (uiLength & 0x1)
237 {
238 *pBlockDest.ucPtr = 0;
239 }
240 }
241
242 /* copy table */
243 pTable = (unsigned int *)&__copy_table;
244
245 while (pTable)
246 {
247 pBlockSrc.uiPtr = (unsigned int *)*pTable++;
248 pBlockDest.uiPtr = (unsigned int *)*pTable++;
249 uiLength = *pTable++;
250
251 /* we are finished when length == -1 */
252 if (uiLength == 0xFFFFFFFF)
253 {
254 break;
255 }
256
257 uiCnt = uiLength / 8;
258
259 while (uiCnt--)
260 {
261 *pBlockDest.ullPtr++ = *pBlockSrc.ullPtr++;
262 }
263
264 if (uiLength & 0x4)
265 {
266 *pBlockDest.uiPtr++ = *pBlockSrc.uiPtr++;
267 }
268
269 if (uiLength & 0x2)
270 {
271 *pBlockDest.usPtr++ = *pBlockSrc.usPtr++;
272 }
273
274 if (uiLength & 0x1)
275 {
276 *pBlockDest.ucPtr = *pBlockSrc.ucPtr;
277 }
278 }
279 }
280
281
282 #endif /* IFX_SSW_COMPILERSGNUC_H_ */
IFX_SSW_INLINE
#define IFX_SSW_INLINE
Definition: Ifx_Ssw_CompilersGnuc.h:125
Ifx_Ssw_CTablePtr::ullPtr
unsigned long long * ullPtr
Definition: Ifx_Ssw_CompilersDcc.h:126
__asm__
#define __asm__
Definition: Ifx_TypesTasking.h:45
Ifx_Ssw_moveToDataParam0
IFX_SSW_INLINE void Ifx_Ssw_moveToDataParam0(unsigned int var)
Definition: Ifx_Ssw_CompilersGnuc.h:181
Ifx_Ssw_jumpBackToLink
IFX_SSW_INLINE void Ifx_Ssw_jumpBackToLink(void)
Definition: Ifx_Ssw_CompilersGnuc.h:207
Ifx_Ssw_NOP
IFX_SSW_INLINE void Ifx_Ssw_NOP(void)
Definition: Ifx_Ssw_CompilersGnuc.h:148
Ifx_Ssw_getDataParam0
IFX_SSW_INLINE unsigned int Ifx_Ssw_getDataParam0(void)
Definition: Ifx_Ssw_CompilersGnuc.h:187
Ifx_Ssw_DSYNC
IFX_SSW_INLINE void Ifx_Ssw_DSYNC(void)
Definition: Ifx_Ssw_CompilersGnuc.h:154
Ifx_Ssw_jumpToFunctionWithLink
IFX_SSW_INLINE void Ifx_Ssw_jumpToFunctionWithLink(void *fun)
Definition: Ifx_Ssw_CompilersGnuc.h:201
__copy_table
unsigned int __copy_table[]
Ifx_Ssw_CTablePtr::uiPtr
unsigned int * uiPtr
Definition: Ifx_Ssw_CompilersDcc.h:125
__clear_table
unsigned int __clear_table[]
Ifx_Ssw_C_InitInline
IFX_SSW_INLINE void Ifx_Ssw_C_InitInline(void)
Definition: Ifx_Ssw_CompilersGnuc.h:216
Ifx_Ssw_CTablePtr::ucPtr
unsigned int * ucPtr
Definition: Ifx_Ssw_CompilersDcc.h:123
Ifx_Ssw_CTablePtr
Definition: Ifx_Ssw_CompilersDcc.h:121
Ifx_Ssw_ISYNC
IFX_SSW_INLINE void Ifx_Ssw_ISYNC(void)
Definition: Ifx_Ssw_CompilersGnuc.h:160
Ifx_Ssw_MINU
IFX_SSW_INLINE unsigned int Ifx_Ssw_MINU(unsigned int a, unsigned int b)
Definition: Ifx_Ssw_CompilersGnuc.h:166
Ifx_Ssw_jumpToFunction
IFX_SSW_INLINE void Ifx_Ssw_jumpToFunction(void(*fun)(void))
Definition: Ifx_Ssw_CompilersGnuc.h:195
Ifx_Ssw_CTablePtr::usPtr
unsigned int * usPtr
Definition: Ifx_Ssw_CompilersDcc.h:124


iLLD_TC38A: Ifx_Ssw_CompilersTasking.h Source File

  • Infra
  • Ssw
  • TC38A
  • Tricore
Ifx_Ssw_CompilersTasking.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_Ssw_CompilersTasking.h
3 * \brief Startup Software for Tasking compiler options
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 * IMPORTANT NOTICE
9 *
10 * Use of this file is subject to the terms of use agreed between (i) you or
11 * the company in which ordinary course of business you are acting and (ii)
12 * Infineon Technologies AG or its licensees. If and as long as no such terms
13 * of use are agreed, use of this file is subject to following:
14 *
15 * Boost Software License - Version 1.0 - August 17th, 2003
16 *
17 * Permission is hereby granted, free of charge, to any person or organization
18 * obtaining a copy of the software and accompanying documentation covered by
19 * this license (the "Software") to use, reproduce, display, distribute,
20 * execute, and transmit the Software, and to prepare derivative works of the
21 * Software, and to permit third-parties to whom the Software is furnished to
22 * do so, all subject to the following:
23 *
24 * The copyright notices in the Software and this entire statement, including
25 * the above license grant, this restriction and the following disclaimer, must
26 * be included in all copies of the Software, in whole or in part, and all
27 * derivative works of the Software, unless such copies or derivative works are
28 * solely in the form of machine-executable object code generated by a source
29 * language processor.
30 *
31 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
32 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
33 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
34 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
35 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
36 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
37 * DEALINGS IN THE SOFTWARE.
38 *
39 */
40 #ifndef IFX_SSW_COMPILERSTASKING_H_
41 #define IFX_SSW_COMPILERSTASKING_H_
42
43 /******************************************************************************/
44 /*----------------------------------Includes----------------------------------*/
45 /******************************************************************************/
46
47 /******************************************************************************/
48 /*-----------------------------------Macros-----------------------------------*/
49 /******************************************************************************/
50
51 /*Linker definitions which are specific to Tasking */
52 /* IFX_CFG_USE_COMPILER_DEFAULT_LINKER shall be defined in Ifx_Cfg.h
53 * to use the default compiler linker varaibles and startup */
54 #ifndef IFX_CFG_USE_COMPILER_DEFAULT_LINKER
55
56 /*Start: Common definitions ********************************************** */
57 #define IFX_SSW_COMMON_LINKER_SYMBOLS() \
58 __asm("\t .extern _SMALL_DATA_, _LITERAL_DATA_, _A8_DATA_, _A9_DATA_"); \
59 extern unsigned int __START0[]; /**< Pointer to the startup code */ \
60 extern unsigned int __START1[]; /**< Pointer to the startup code */ \
61 extern unsigned int __START2[]; /**< Pointer to the startup code */ \
62 extern unsigned int __START3[]; /**< Pointer to the startup code */ \
63 extern unsigned int __START4[]; /**< Pointer to the startup code */ \
64 extern unsigned int __START5[]; /**< Pointer to the startup code */
65
66 /*End: Common definitions ************************************************ */
67
68 /*Start: Core 0 definitions ********************************************** */
69
70 /*C extern defintions */
71 #define IFX_SSW_CORE_LINKER_SYMBOLS(cpu) \
72 __asm("\t .extern __USTACK"#cpu); /**< user stack end is required as asm to be used with setreg macro */ \
73 extern unsigned int __ISTACK##cpu[]; /**< interrupt stack end */ \
74 extern unsigned int __INTTAB_CPU##cpu[]; /**< interrupt vector table */ \
75 extern unsigned int __TRAPTAB_CPU##cpu[]; /**< trap vector table */ \
76 extern unsigned int __CSA##cpu[]; /**< context save area begin */ \
77 extern unsigned int __CSA##cpu##_END[]; /**< context save area end */
78
79 #define __USTACK(cpu) __USTACK##cpu
80 #define __ISTACK(cpu) __ISTACK##cpu
81 #define __INTTAB_CPU(cpu) __INTTAB_CPU##cpu
82 #define __TRAPTAB_CPU(cpu) __TRAPTAB_CPU##cpu
83 #define __CSA(cpu) __CSA##cpu
84 #define __CSA_END(cpu) __CSA##cpu##_END
85 #define __START(cpu) __START##cpu
86
87 /*Wrapper macros for the tool specific definitions */
88 #if defined(IFX_USE_SW_MANAGED_INT)
89 #define __INTTAB(cpu) ((unsigned int)__INTTAB_CPU##cpu | (unsigned int)0x1FE0)
90 #else
91 #define __INTTAB(cpu) __INTTAB_CPU##cpu
92 #endif /*defined(IFX_USE_SW_MANAGED_INT) */
93
94 #define __TRAPTAB(cpu) __TRAPTAB_CPU##cpu
95
96 #define __SDATA1(cpu) _SMALL_DATA_
97 #define __SDATA2(cpu) _LITERAL_DATA_
98 #define __SDATA3(cpu) _A8_DATA_
99 #define __SDATA4(cpu) _A9_DATA_
100
101 #endif /*IFX_CFG_USE_COMPILER_DEFAULT_LINKER*/
102
103 #ifdef __cplusplus
104 #define IFX_SSW_INLINE static inline
105 #else
106 #define IFX_SSW_INLINE inline
107 #endif
108
109 #define IFX_SSW_NULL_PTR ((void *)0x0U)
110
111 /******************************************************************************/
112 /*---------------------------- GNU Intrinsics -----------------------------*/
113 /******************************************************************************/
114
115 #define Ifx_Ssw_MTCR(reg, val) __mtcr(reg, val);
116
117 #define Ifx_Ssw_MFCR(reg) __mfcr(reg);
118
119 IFX_SSW_INLINE void Ifx_Ssw_NOP(void)
120 {
121 __nop();
122 }
123
124
125 IFX_SSW_INLINE void Ifx_Ssw_DSYNC(void)
126 {
127 __dsync();
128 }
129
130
131 IFX_SSW_INLINE void Ifx_Ssw_ISYNC(void)
132 {
133 __isync();
134 }
135
136
137 IFX_SSW_INLINE unsigned int Ifx_Ssw_MINU(unsigned int a, unsigned int b)
138 {
139 return __minu(a, b);
140 }
141
142
143 #define Ifx_Ssw_CLZ(a) __clz(a)
144
145 #define Ifx_Ssw___setAddressReg(aReg, val) \
146 {__asm(" movh.a\t "#aReg ",#@his("#val ")\n lea\t "#aReg ",["#aReg "]@los("#val ")"); }
147
148 #define Ifx_Ssw_setAddressReg(regNum, val) Ifx_Ssw___setAddressReg(regNum, val)
149
150 IFX_SSW_INLINE void Ifx_Ssw_moveToDataParam0(unsigned int var)
151 {
152 __asm("mov d2, %0" ::"d" (var));
153 }
154
155
156 IFX_SSW_INLINE unsigned int Ifx_Ssw_getDataParam0(void)
157 {
158 unsigned int var;
159 __asm(" mov\t %0, d2" : "=d" (var));
160 return var;
161 }
162
163
164 IFX_SSW_INLINE void Ifx_Ssw_jumpToFunction(void *fun)
165 {
166 __asm("ji %0" ::"a" (fun));
167 }
168
169
170 IFX_SSW_INLINE void Ifx_Ssw_jumpToFunctionWithLink(void *fun)
171 {
172 __asm("jli %0" ::"a" (fun));
173 }
174
175
176 IFX_SSW_INLINE void Ifx_Ssw_jumpBackToLink(void)
177 {
178 __asm("ji a11");
179 }
180
181
182 IFX_SSW_INLINE void Ifx_Ssw_C_InitInline(void)
183 {
184 extern void _c_init(void);
185 _c_init(); /* initialize data */
186 }
187
188
189 #endif /* IFX_SSW_COMPILERSTASKING_H_ */
Ifx_Ssw_MINU
IFX_SSW_INLINE unsigned int Ifx_Ssw_MINU(unsigned int a, unsigned int b)
Definition: Ifx_Ssw_CompilersTasking.h:150
Ifx_Ssw_DSYNC
IFX_SSW_INLINE void Ifx_Ssw_DSYNC(void)
Definition: Ifx_Ssw_CompilersTasking.h:138
IFX_SSW_INLINE
#define IFX_SSW_INLINE
Definition: Ifx_Ssw_CompilersTasking.h:119
Ifx_Ssw_NOP
IFX_SSW_INLINE void Ifx_Ssw_NOP(void)
Definition: Ifx_Ssw_CompilersTasking.h:132
Ifx_Ssw_moveToDataParam0
IFX_SSW_INLINE void Ifx_Ssw_moveToDataParam0(unsigned int var)
Definition: Ifx_Ssw_CompilersTasking.h:163
__nop
void __nop(void) __attribute__((intrinsic_function(0x103
__minu
uint32 __minu(uint32, uint32) __attribute__((intrinsic_pseudo(3
__isync
void __isync(void) __attribute__((intrinsic_function(0x103
Ifx_Ssw_jumpToFunction
IFX_SSW_INLINE void Ifx_Ssw_jumpToFunction(void *fun)
Definition: Ifx_Ssw_CompilersTasking.h:177
Ifx_Ssw_jumpBackToLink
IFX_SSW_INLINE void Ifx_Ssw_jumpBackToLink(void)
Definition: Ifx_Ssw_CompilersTasking.h:189
Ifx_Ssw_C_InitInline
IFX_SSW_INLINE void Ifx_Ssw_C_InitInline(void)
Definition: Ifx_Ssw_CompilersTasking.h:195
Ifx_Ssw_getDataParam0
IFX_SSW_INLINE unsigned int Ifx_Ssw_getDataParam0(void)
Definition: Ifx_Ssw_CompilersTasking.h:169
__dsync
void __dsync(void) __attribute__((intrinsic_function(0x103
Ifx_Ssw_ISYNC
IFX_SSW_INLINE void Ifx_Ssw_ISYNC(void)
Definition: Ifx_Ssw_CompilersTasking.h:144
Ifx_Ssw_jumpToFunctionWithLink
IFX_SSW_INLINE void Ifx_Ssw_jumpToFunctionWithLink(void *fun)
Definition: Ifx_Ssw_CompilersTasking.h:183


iLLD_TC38A: Ifx_Ssw_Infra.c Source File

  • Infra
  • Ssw
  • TC38A
  • Tricore
Ifx_Ssw_Infra.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_Ssw_Infra.c
3 * \brief Startup Software support functions.
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 */
40
41 #include "Ifx_Cfg.h"
42 #include "Ifx_Ssw_Infra.h"
43
44 /******************************************************************************/
45 /*-------------------------Infrastructure Functions---------------------------*/
46 /******************************************************************************/
47
48 unsigned short Ifx_Ssw_getCpuWatchdogPassword(Ifx_SCU_WDTCPU *watchdog)
49 {
50 return Ifx_Ssw_getCpuWatchdogPasswordInline(watchdog);
51 }
52
53
54 unsigned short Ifx_Ssw_getSafetyWatchdogPassword(void)
55 {
56 return Ifx_Ssw_getSafetyWatchdogPasswordInline();
57 }
58
59
60 void Ifx_Ssw_clearCpuEndinit(Ifx_SCU_WDTCPU *watchdog, unsigned short password)
61 {
62 Ifx_Ssw_clearCpuEndinitInline(watchdog, password);
63 }
64
65
66 void Ifx_Ssw_setCpuEndinit(Ifx_SCU_WDTCPU *watchdog, unsigned short password)
67 {
68 Ifx_Ssw_setCpuEndinitInline(watchdog, password);
69 }
70
71
72 void Ifx_Ssw_clearSafetyEndinit(unsigned short password)
73 {
74 Ifx_Ssw_clearSafetyEndinitInline(password);
75 }
76
77
78 void Ifx_Ssw_setSafetyEndinit(unsigned short password)
79 {
80 Ifx_Ssw_setSafetyEndinitInline(password);
81 }
82
83
84 void Ifx_Ssw_serviceCpuWatchdog(Ifx_SCU_WDTCPU *watchdog, unsigned short password)
85 {
86 Ifx_Ssw_setCpuEndinitInline(watchdog, password);
87 }
88
89
90 void Ifx_Ssw_serviceSafetyWatchdog(unsigned short password)
91 {
92 Ifx_Ssw_setSafetyEndinitInline(password);
93 }
94
95
96 void Ifx_Ssw_disableCpuWatchdog(Ifx_SCU_WDTCPU *watchdog, unsigned short password)
97 {
98 /* Select CPU Watchdog based on Core Id */
99 unsigned int cpuIndex;
100 cpuIndex = Ifx_Ssw_MFCR(CPU_CORE_ID);
101 cpuIndex = (unsigned int)((unsigned int)cpuIndex >> IFX_CPU_CORE_ID_CORE_ID_OFF) & IFX_CPU_CORE_ID_CORE_ID_MSK;
102 cpuIndex = Ifx_Ssw_MINU(cpuIndex, 5);
103 Ifx_SCU_WDTCPU *wdt = &MODULE_SCU.WDTCPU[cpuIndex];
104
105 Ifx_Ssw_clearCpuEndinit(wdt, password);
106 wdt->CON1.B.DR = 1U; /* Set DR bit in Config_1 register */
107 Ifx_Ssw_setCpuEndinit(wdt, password);
108 }
109
110
111 void Ifx_Ssw_enableCpuWatchdog(Ifx_SCU_WDTCPU *watchdog, unsigned short password)
112 {
113 /* Select CPU Watchdog based on Core Id */
114 unsigned int cpuIndex;
115 cpuIndex = Ifx_Ssw_MFCR(CPU_CORE_ID);
116 cpuIndex = (unsigned int)((unsigned int)cpuIndex >> IFX_CPU_CORE_ID_CORE_ID_OFF) & IFX_CPU_CORE_ID_CORE_ID_MSK;
117 cpuIndex = Ifx_Ssw_MINU(cpuIndex, 5);
118 Ifx_SCU_WDTCPU *wdt = &MODULE_SCU.WDTCPU[cpuIndex];
119
120 Ifx_Ssw_clearCpuEndinit(wdt, password);
121 wdt->CON1.B.DR = 0U; /* Clear DR bit in Config_1 register */
122 Ifx_Ssw_setCpuEndinit(wdt, password);
123 }
124
125
126 void Ifx_Ssw_disableSafetyWatchdog(unsigned short password)
127 {
128 Ifx_Ssw_clearSafetyEndinit(password);
129 SCU_WDTS_CON1.B.DR = 1U; /* Set DR bit in Config_1 register */
130 Ifx_Ssw_setSafetyEndinit(password);
131 }
132
133
134 void Ifx_Ssw_enableSafetyWatchdog(unsigned short password)
135 {
136 Ifx_Ssw_clearSafetyEndinit(password);
137 SCU_WDTS_CON1.B.DR = 0U; /* Clear DR bit in Config_1 register */
138 Ifx_Ssw_setSafetyEndinit(password);
139 }
140
141
142 void Ifx_Ssw_startCore(Ifx_CPU *cpu, unsigned int programCounter)
143 {
144 /* Set the PC */
145 cpu->PC.B.PC = (unsigned int)programCounter >> 1U;
146
147 /* release boot halt mode if required */
148 Ifx_CPU_SYSCON syscon;
149 syscon = cpu->SYSCON;
150
151 if (syscon.B.BHALT)
152 {
153 syscon.B.BHALT = 0U;
154 cpu->SYSCON = syscon;
155 }
156
157 }
158
159
160 void Ifx_Ssw_setCpu0Idle(void)
161 {
162 Ifx_SCU_WDTCPU *wdt = &MODULE_SCU.WDTCPU[0];
163 unsigned short cpuWdtPw = Ifx_Ssw_getCpuWatchdogPassword(wdt);
164 Ifx_Ssw_clearCpuEndinit(wdt, cpuWdtPw);
165 SCU_PMCSR0.B.REQSLP = 1U;
166 Ifx_Ssw_setCpuEndinit(wdt, cpuWdtPw);
167 }
168
169
170 float Ifx_Ssw_getStmFrequency(void)
171 {
172 float oscFreq = IFX_CFG_SSW_XTAL_FREQUENCY;
173 float sourcefreq = IFX_CFG_SSW_EVR_OSC_FREQUENCY;
174 unsigned int insel = SCU_SYSPLLCON0.B.INSEL;
175
176 if (insel == 2U)
177 {
178 oscFreq = IFX_CFG_SSW_SYSCLK_PIN_FREQUENCY;
179 }
180 else if (insel == 1U)
181 {
182 oscFreq = IFX_CFG_SSW_XTAL_FREQUENCY;
183 }
184 else
185 {
186 oscFreq = IFX_CFG_SSW_EVR_OSC_FREQUENCY;
187 }
188
189 if (SCU_CCUCON0.B.CLKSEL != 0U)
190 {
191 sourcefreq = (oscFreq * (SCU_SYSPLLCON0.B.NDIV + 1U)) /
192 ((SCU_SYSPLLCON0.B.PDIV + 1U) * (SCU_SYSPLLCON1.B.K2DIV + 1U));
193 }
194
195 return sourcefreq / SCU_CCUCON0.B.STMDIV;
196 }
197
198 void Ifx_Ssw_C_Init(void)
199 {
200 Ifx_Ssw_C_InitInline();
201 }
202
203
204 #if defined(__TASKING__)
205 #pragma optimize RL
206 #elif defined(__HIGHTEC__)
207 #pragma GCC optimize "O2"
208 #endif
209
210 #if (IFX_CFG_SSW_ENABLE_MONBIST == 1U)
211
212 static void Ifx_Ssw_MonbistCheck(void);
213
214 void Ifx_Ssw_Monbist(void)
215 {
216 uint32 timeout;
217
218 /* Disable the write-protection for registers */
219 IFX_CFG_SSW_CLEAR_SAFETY_ENDINIT();
220 /* Enable SMU Standby */
221 PMS_CMD_STDBY.U = 0x40000001U;
222 /* clears the TSTEN, TSTRUN, TSTDONE, TSTOK, SMUERR and PMSERR flags */
223 PMS_MONBISTCTRL.U = 0x40000002U;
224 /* Clear the filter */
225 PMS_MONFILT.U = 0x20000000U;
226 /* Wait until register is updated */
227 timeout = 0x1000U;
228 while ((PMS_MONFILT.U != 0x20000000U) && (timeout--))
229 {};
230 /* Activate under voltage and over voltage alarms */
231 PMS_MONCTRL.U = 0xa5a5a5U;
232 /* Wait until register is updated */
233 timeout = 0x1000U;
234 while ((PMS_MONCTRL.U != 0xa5a5a5U) && (timeout--))
235 {};
236 /* corresponding Over-voltage and Under-voltage interrupts are disabled */
237 PMS_PMSIEN.U &= ~0x00000FFFU;
238 /* Fault Signal reaction on alarms are disabled */
239 PMS_AGFSP_STDBY0.U = 0x40000000U;
240 PMS_AGFSP_STDBY1.U = 0x40000000U;
241 /* FSP0EN and FSP1EN configuration bits are cleared to avoid spurious Error pin activation */
242 PMS_CMD_STDBY.U |= 0x40000000U;
243 PMS_CMD_STDBY.U |= 0x40000008U;
244 /* Reset the MONFILT register */
245 PMS_MONFILT.U = 0x00000000U;
246 /* Start MONBIST test */
247 PMS_MONBISTCTRL.U = 0x40000001U;
248
249 /* Wait until MONBIST execution is done */
250 timeout = 0x1000U;
251 while (((PMS_MONBISTSTAT.B.TSTRUN == 1) || (PMS_MONBISTSTAT.B.TSTDONE == 0)) && (timeout--))
252 {};
253
254 /* Disable SMU Standby */
255 PMS_CMD_STDBY.U = 0x40000000U;
256 IFX_CFG_SSW_SET_SAFETY_ENDINIT();
257
258 Ifx_Ssw_jumpToFunction(&Ifx_Ssw_MonbistCheck);
259 }
260
261 void Ifx_Ssw_MonbistCheck(void)
262 {
263 /* Check for MONBIST error state */
264 if ((PMS_MONBISTSTAT.B.TSTOK == 0U) || (PMS_MONBISTSTAT.B.SMUERR == 1U) || (PMS_MONBISTSTAT.B.PMSERR == 1U))
265 {
266 __debug();
267 }
268
269 Ifx_Ssw_jumpBackToLink();
270 }
271 #endif
272
273 #if defined(__TASKING__)
274 #pragma endoptimize
275 #elif defined(__HIGHTEC__)
276 #pragma GCC reset_options
277 #endif
Ifx_Ssw_clearSafetyEndinitInline
IFX_SSW_INLINE void Ifx_Ssw_clearSafetyEndinitInline(unsigned short password)
Definition: Ifx_Ssw_Infra.h:378
Ifx_Ssw_setSafetyEndinitInline
IFX_SSW_INLINE void Ifx_Ssw_setSafetyEndinitInline(unsigned short password)
Definition: Ifx_Ssw_Infra.h:422
Ifx_Ssw_setSafetyEndinit
void Ifx_Ssw_setSafetyEndinit(unsigned short password)
Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: Ifx_Ssw_Infra.c:78
IFX_CFG_SSW_CLEAR_SAFETY_ENDINIT
#define IFX_CFG_SSW_CLEAR_SAFETY_ENDINIT()
clear safety endinit. Note: IFX_CFG_SSW_CLEAR_SAFETY_ENDINIT() function macro is added to avoid issue...
Definition: Ifx_Ssw_Infra.h:123
uint32
unsigned long uint32
Definition: Platform_Types.h:116
Ifx_Ssw_C_Init
void Ifx_Ssw_C_Init(void)
Initialise the C runtime environment.
Definition: Ifx_Ssw_Infra.c:198
Ifx_Ssw_serviceSafetyWatchdog
void Ifx_Ssw_serviceSafetyWatchdog(unsigned short password)
SCUWDT API to service Safety Watchdog functionality.
Definition: Ifx_Ssw_Infra.c:90
Ifx_Ssw_getCpuWatchdogPasswordInline
IFX_SSW_INLINE unsigned short Ifx_Ssw_getCpuWatchdogPasswordInline(Ifx_SCU_WDTCPU *watchdog)
Definition: Ifx_Ssw_Infra.h:327
Ifx_Ssw_getCpuWatchdogPassword
unsigned short Ifx_Ssw_getCpuWatchdogPassword(Ifx_SCU_WDTCPU *watchdog)
Fetch current password of CPU Watchdog module.
Definition: Ifx_Ssw_Infra.c:48
Ifx_Ssw_disableCpuWatchdog
void Ifx_Ssw_disableCpuWatchdog(Ifx_SCU_WDTCPU *watchdog, unsigned short password)
Disable CPU Watchdog functionality.
Definition: Ifx_Ssw_Infra.c:96
Ifx_Ssw_getSafetyWatchdogPasswordInline
IFX_SSW_INLINE unsigned short Ifx_Ssw_getSafetyWatchdogPasswordInline(void)
Definition: Ifx_Ssw_Infra.h:341
Ifx_Ssw_C_InitInline
IFX_SSW_INLINE void Ifx_Ssw_C_InitInline(void)
Definition: Ifx_Ssw_CompilersDcc.h:188
IFX_CFG_SSW_XTAL_FREQUENCY
#define IFX_CFG_SSW_XTAL_FREQUENCY
Definition: Ifx_Ssw_Infra.h:114
IFX_CFG_SSW_EVR_OSC_FREQUENCY
#define IFX_CFG_SSW_EVR_OSC_FREQUENCY
Definition: Ifx_Ssw_Infra.h:106
Ifx_Ssw_jumpToFunction
asm volatile void Ifx_Ssw_jumpToFunction(void *fun)
Definition: Ifx_Ssw_CompilersDcc.h:170
Ifx_Ssw_setCpu0Idle
void Ifx_Ssw_setCpu0Idle(void)
Set CPU0 to idle state.
Definition: Ifx_Ssw_Infra.c:160
Ifx_Ssw_jumpBackToLink
asm void Ifx_Ssw_jumpBackToLink(void)
Definition: Ifx_Ssw_CompilersDcc.h:182
IFX_CFG_SSW_SET_SAFETY_ENDINIT
#define IFX_CFG_SSW_SET_SAFETY_ENDINIT()
set safety endinit. Note: IFX_CFG_SSW_SET_SAFETY_ENDINIT() function macro is added to avoid issues hi...
Definition: Ifx_Ssw_Infra.h:142
Ifx_Ssw_startCore
void Ifx_Ssw_startCore(Ifx_CPU *cpu, unsigned int programCounter)
Set the program counter for the CPU specified and start the CPU.
Definition: Ifx_Ssw_Infra.c:142
Ifx_Ssw_enableCpuWatchdog
void Ifx_Ssw_enableCpuWatchdog(Ifx_SCU_WDTCPU *watchdog, unsigned short password)
SCUWDT API to enable CPU Watchdog functionality.
Definition: Ifx_Ssw_Infra.c:111
IFX_CFG_SSW_SYSCLK_PIN_FREQUENCY
#define IFX_CFG_SSW_SYSCLK_PIN_FREQUENCY
Definition: Ifx_Ssw_Infra.h:110
__debug
void __debug(void) __attribute__((intrinsic_function(0x103
Ifx_Ssw_getSafetyWatchdogPassword
unsigned short Ifx_Ssw_getSafetyWatchdogPassword(void)
Fetch current password of Safety Watchdog module.
Definition: Ifx_Ssw_Infra.c:54
Ifx_Ssw_clearCpuEndinitInline
IFX_SSW_INLINE void Ifx_Ssw_clearCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, unsigned short password)
Definition: Ifx_Ssw_Infra.h:356
Ifx_Ssw_Infra.h
Startup Software support functions.
Ifx_Ssw_clearSafetyEndinit
void Ifx_Ssw_clearSafetyEndinit(unsigned short password)
Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: Ifx_Ssw_Infra.c:72
Ifx_Ssw_setCpuEndinit
void Ifx_Ssw_setCpuEndinit(Ifx_SCU_WDTCPU *watchdog, unsigned short password)
Set ENDINIT bit provided by CPU WDT Hardware module.
Definition: Ifx_Ssw_Infra.c:66
Ifx_Ssw_disableSafetyWatchdog
void Ifx_Ssw_disableSafetyWatchdog(unsigned short password)
Disable Safety Watchdog functionality.
Definition: Ifx_Ssw_Infra.c:126
Ifx_Ssw_enableSafetyWatchdog
void Ifx_Ssw_enableSafetyWatchdog(unsigned short password)
Enable Safety Watchdog functionality.
Definition: Ifx_Ssw_Infra.c:134
Ifx_Ssw_MFCR
int Ifx_Ssw_MFCR(const unsigned int) __attribute__((intrinsic_function(0x101
Ifx_Ssw_MINU
unsigned int Ifx_Ssw_MINU(unsigned int, unsigned int) __attribute__((intrinsic_pseudo(3
Ifx_Ssw_getStmFrequency
float Ifx_Ssw_getStmFrequency(void)
Returns the system timer frequency.
Definition: Ifx_Ssw_Infra.c:170
Ifx_Ssw_clearCpuEndinit
void Ifx_Ssw_clearCpuEndinit(Ifx_SCU_WDTCPU *watchdog, unsigned short password)
Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: Ifx_Ssw_Infra.c:60
Ifx_Ssw_setCpuEndinitInline
IFX_SSW_INLINE void Ifx_Ssw_setCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, unsigned short password)
Definition: Ifx_Ssw_Infra.h:400
Ifx_Ssw_serviceCpuWatchdog
void Ifx_Ssw_serviceCpuWatchdog(Ifx_SCU_WDTCPU *watchdog, unsigned short password)
SCUWDT API to service CPU Watchdog functionality.
Definition: Ifx_Ssw_Infra.c:84


iLLD_TC38A: Ifx_Ssw_Infra.h Source File

  • Infra
  • Ssw
  • TC38A
  • Tricore
Ifx_Ssw_Infra.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_Ssw_Infra.h
3 * \brief Startup Software support functions.
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 #ifndef IFX_SSW_INFRA_H_
43 #define IFX_SSW_INFRA_H_
44
45 #include "Ifx_Ssw_Compilers.h"
46 #include "Ifx_Cfg_Ssw.h"
47 #include "IfxScu_reg.h"
48 #include "IfxCpu_reg.h"
49 #include "IfxScu_bf.h"
50 #include "IfxCpu_bf.h"
51
52 /******************************************************************************/
53 /*-----------------------------------Macros-----------------------------------*/
54 /******************************************************************************/
55
56 /** \brief PowerOn Reset Mask
57 */
58 #define IFX_SSW_POWERONRESET_MASK \
59 (((unsigned int)IFX_SCU_RSTSTAT_STBYR_MSK << IFX_SCU_RSTSTAT_STBYR_OFF) | \
60 ((unsigned int)IFX_SCU_RSTSTAT_SWD_MSK << IFX_SCU_RSTSTAT_SWD_OFF) | \
61 ((unsigned int)IFX_SCU_RSTSTAT_EVR33_MSK << IFX_SCU_RSTSTAT_EVR33_OFF) | \
62 ((unsigned int)IFX_SCU_RSTSTAT_EVRC_MSK << IFX_SCU_RSTSTAT_EVRC_OFF) | \
63 ((unsigned int)IFX_SCU_RSTSTAT_CB1_MSK << IFX_SCU_RSTSTAT_CB1_OFF) | \
64 ((unsigned int)IFX_SCU_RSTSTAT_CB0_MSK << IFX_SCU_RSTSTAT_CB0_OFF) | \
65 ((unsigned int)IFX_SCU_RSTSTAT_PORST_MSK << IFX_SCU_RSTSTAT_PORST_OFF))
66
67 /** \brief Application Reset Mask
68 */
69 #define IFX_SSW_APPLICATIONRESET_MASK \
70 (((unsigned int)IFX_SCU_RSTSTAT_SW_MSK << IFX_SCU_RSTSTAT_SW_OFF) | \
71 ((unsigned int)IFX_SCU_RSTSTAT_STM3_MSK << IFX_SCU_RSTSTAT_STM3_OFF) | \
72 ((unsigned int)IFX_SCU_RSTSTAT_STM2_MSK << IFX_SCU_RSTSTAT_STM2_OFF) | \
73 ((unsigned int)IFX_SCU_RSTSTAT_STM1_MSK << IFX_SCU_RSTSTAT_STM1_OFF) | \
74 ((unsigned int)IFX_SCU_RSTSTAT_STM0_MSK << IFX_SCU_RSTSTAT_STM0_OFF) | \
75 ((unsigned int)IFX_SCU_RSTSTAT_SMU_MSK << IFX_SCU_RSTSTAT_SMU_OFF) | \
76 ((unsigned int)IFX_SCU_RSTSTAT_ESR1_MSK << IFX_SCU_RSTSTAT_ESR1_OFF) | \
77 ((unsigned int)IFX_SCU_RSTSTAT_ESR0_MSK << IFX_SCU_RSTSTAT_ESR0_OFF))
78
79 /** \brief Cold PowerOn Reset Mask
80 */
81 #define IFX_SSW_COLD_POWERONRESET_MASK \
82 (((unsigned int)IFX_SCU_RSTSTAT_STBYR_MSK << IFX_SCU_RSTSTAT_STBYR_OFF) | \
83 ((unsigned int)IFX_SCU_RSTSTAT_SWD_MSK << IFX_SCU_RSTSTAT_SWD_OFF) | \
84 ((unsigned int)IFX_SCU_RSTSTAT_EVR33_MSK << IFX_SCU_RSTSTAT_EVR33_OFF) | \
85 ((unsigned int)IFX_SCU_RSTSTAT_EVRC_MSK << IFX_SCU_RSTSTAT_EVRC_OFF))
86
87 /** \brief Application reset enabled
88 * In SCU_RSTCON register, value 2 represents the Application reset
89 */
90 #define IFX_SSW_APPLICATIONRESET (2U)
91
92 /** \brief Reload value mask */
93 #define IFX_SSW_SEICON_REL_VAL_MSK (unsigned short)(0xFFFCU << IFX_SCU_SEICON0_REL_OFF)
94
95 /** \brief Mask values is used to invert the password value bits */
96 #define IFX_SSW_WDT_PASSWORD_INVERT_MSK (0x003FU)
97
98 /** \brief CSA size */
99 #define IFX_SSW_CSA_SIZE 16U
100
101 #ifndef IFX_CFG_SSW_STARTCPU_WAIT_TIME_IN_SECONDS
102 #define IFX_CFG_SSW_STARTCPU_WAIT_TIME_IN_SECONDS (0.0001)
103 #endif
104
105 #ifndef IFX_CFG_SSW_EVR_OSC_FREQUENCY
106 #define IFX_CFG_SSW_EVR_OSC_FREQUENCY (100000000.0)
107 #endif
108
109 #ifndef IFX_CFG_SSW_SYSCLK_PIN_FREQUENCY
110 #define IFX_CFG_SSW_SYSCLK_PIN_FREQUENCY (20000000.0)
111 #endif
112
113 #ifndef IFX_CFG_SSW_XTAL_FREQUENCY
114 #define IFX_CFG_SSW_XTAL_FREQUENCY (IFX_CFG_SCU_XTAL_FREQUENCY)
115 #endif
116
117 /******************************************************************************/
118 /*-------------------------Infrastructure Functions---------------------------*/
119 /******************************************************************************/
120 /** \brief clear safety endinit.\n
121 * Note: IFX_CFG_SSW_CLEAR_SAFETY_ENDINIT() function macro is added to avoid issues higher optimization is enabled.
122 */
123 #define IFX_CFG_SSW_CLEAR_SAFETY_ENDINIT() \
124 { \
125 /* see Table 1 (Password Access Bit Pattern Requirements) */ \
126 SCU_WDTS_CON0.U = ((unsigned int)1 << IFX_SCU_WDTS_CON0_ENDINIT_OFF) | \
127 ((unsigned int)0 << IFX_SCU_WDTS_CON0_LCK_OFF) | \
128 ((unsigned int)(MODULE_SCU.WDTS.CON0.B.PW ^ 0x003F) << IFX_SCU_WDTS_CON0_PW_OFF) |\
129 ((unsigned int)SCU_WDTS_CON0.B.REL << IFX_SCU_WDTS_CON0_REL_OFF); \
130 /* Clear ENDINT and set LCK bit in Config_0 register */ \
131 SCU_WDTS_CON0.U = ((unsigned int)0 << IFX_SCU_WDTS_CON0_ENDINIT_OFF) | \
132 ((unsigned int)1 << IFX_SCU_WDTS_CON0_LCK_OFF) | \
133 ((unsigned int)(MODULE_SCU.WDTS.CON0.B.PW ^ 0x003F) << IFX_SCU_WDTS_CON0_PW_OFF) |\
134 ((unsigned int)SCU_WDTS_CON0.B.REL << IFX_SCU_WDTS_CON0_REL_OFF); \
135 /* Read back of the register is mandatory to ensure the register update */ \
136 SCU_WDTS_CON0.U; \
137 }
138
139 /** \brief set safety endinit.\n
140 * Note: IFX_CFG_SSW_SET_SAFETY_ENDINIT() function macro is added to avoid issues higher optimization is enabled.
141 */
142 #define IFX_CFG_SSW_SET_SAFETY_ENDINIT() \
143 { \
144 /* see Table 1 (Password Access Bit Pattern Requirements) */ \
145 SCU_WDTS_CON0.U = ((unsigned int)1 << IFX_SCU_WDTS_CON0_ENDINIT_OFF) | \
146 ((unsigned int)0 << IFX_SCU_WDTS_CON0_LCK_OFF) | \
147 ((unsigned int)(MODULE_SCU.WDTS.CON0.B.PW ^ 0x003F) << IFX_SCU_WDTS_CON0_PW_OFF) |\
148 ((unsigned int)SCU_WDTS_CON0.B.REL << IFX_SCU_WDTS_CON0_REL_OFF); \
149 /* Set ENDINT and set LCK bit in Config_0 register */ \
150 SCU_WDTS_CON0.U = ((unsigned int)1 << IFX_SCU_WDTS_CON0_ENDINIT_OFF) | \
151 ((unsigned int)1 << IFX_SCU_WDTS_CON0_LCK_OFF) | \
152 ((unsigned int)(MODULE_SCU.WDTS.CON0.B.PW ^ 0x003F) << IFX_SCU_WDTS_CON0_PW_OFF) |\
153 ((unsigned int)SCU_WDTS_CON0.B.REL << IFX_SCU_WDTS_CON0_REL_OFF); \
154 /* Read back of the register is mandatory to ensure the register update */ \
155 SCU_WDTS_CON0.U; \
156 }
157
158 /** \brief Fetch current password of CPU Watchdog module.
159 *
160 * This API will fetch current Watchdog password for CPU WDT Hardware module.
161 * password is needed to be passed with most of the WDT APIs.
162 * \param watchdog pointer to the watchdog register map of CPU WDT hardware instance
163 * \return password Existing (Application specific) password for the Watchdog module.
164 */
165 extern unsigned short Ifx_Ssw_getCpuWatchdogPassword(Ifx_SCU_WDTCPU *watchdog);
166
167 /** \brief Fetch current password of Safety Watchdog module.
168 *
169 * This API will fetch current Watchdog password for Safety WDT Hardware module.
170 * password is needed to be passed with most of the WDT APIs.
171 * \return password Existing (Application specific) password for the Watchdog module.
172 */
173 extern unsigned short Ifx_Ssw_getSafetyWatchdogPassword(void);
174
175 /** \brief Clear ENDINIT bit provided by CPU WDT Hardware module.
176 *
177 * This API will disable ENDINIT functionality provided by CPU WDT Hardware module.
178 * User need to use this API call before modifying any ENDINIT protected register. User must
179 * always set the ENDINIT bit using other API Ifx_Ssw_setCpuEndinit. The sequence clear and set
180 * ENDINIT shall not be interrupted by another interrupt/call.
181 * \param watchdog pointer to the watchdog register map of CPU WDT hardware instance
182 * \param password Existing (Application specific) password for the Watchdog module.
183 * \return None
184 */
185 extern void Ifx_Ssw_clearCpuEndinit(Ifx_SCU_WDTCPU *watchdog, unsigned short password);
186
187 /** \brief Set ENDINIT bit provided by CPU WDT Hardware module.
188 *
189 * This API will enable ENDINIT functionality provided by CPU WDT Hardware module.
190 * User need to use this API call after modifying any ENDINIT protected register.
191 * \param watchdog pointer to the watchdog register map of CPU WDT hardware instance
192 * \param password Existing (Application specific) password for the Watchdog module.
193 * \return None
194 */
195 extern void Ifx_Ssw_setCpuEndinit(Ifx_SCU_WDTCPU *watchdog, unsigned short password);
196
197 /** \brief Clear ENDINIT bit provided by Safety WDT Hardware module.
198 *
199 * This API will disable ENDINIT functionality provided by Safety WDT Hardware module.
200 * User need to use this API call before modifying any ENDINIT protected register. User must
201 * always set the ENDINIT bit using other API Ifx_Ssw_setCpuEndinit. The sequence clear and set
202 * ENDINIT shall not be interrupted by another interrupt/call.
203 * \param password Existing (Application specific) password for the Watchdog module.
204 * \return None
205 */
206 extern void Ifx_Ssw_clearSafetyEndinit(unsigned short password);
207
208 /** \brief Set ENDINIT bit provided by Safety WDT Hardware module.
209 *
210 * This API will enable ENDINIT functionality provided by Safety WDT Hardware module.
211 * User need to use this API call after modifying any ENDINIT protected register.
212 * \param password Existing (Application specific) password for the Watchdog module.
213 * \return None
214 */
215 extern void Ifx_Ssw_setSafetyEndinit(unsigned short password);
216
217 /** \brief Disable CPU Watchdog functionality.
218 *
219 * This API will disable Watchdog functionality of CPU WDT Hardware module. The Watchdog timers will stop counting
220 * after this API call.
221 * \param watchdog pointer to the watchdog register map of CPU WDT hardware instance
222 * \param password Existing (Application specific) password for the Watchdog module.
223 * \return None
224 */
225 extern void Ifx_Ssw_disableCpuWatchdog(Ifx_SCU_WDTCPU *watchdog, unsigned short password);
226
227 /** \brief SCUWDT API to enable CPU Watchdog functionality.
228 *
229 * This API will enable Watchdog functionality of CPU WDT Hardware module. The Watchdog timers need to be serviced
230 * periodically after this API call.
231 * \param watchdog pointer to the watchdog register map of CPU WDT hardware instance
232 * \param password Existing (Application specific) password for the Watchdog module.
233 * \return None
234 */
235 extern void Ifx_Ssw_enableCpuWatchdog(Ifx_SCU_WDTCPU *watchdog, unsigned short password);
236
237 /** \brief Disable Safety Watchdog functionality.
238 *
239 * This API will disable Watchdog functionality of Safety WDT Hardware module. The Watchdog timers will stop counting
240 * after this API call.
241 * \param password Existing (Application specific) password for the Watchdog module.
242 * \return None
243 */
244 extern void Ifx_Ssw_disableSafetyWatchdog(unsigned short password);
245
246 /** \brief Enable Safety Watchdog functionality.
247 *
248 * This API will enable Watchdog functionality of Safety WDT Hardware module. The Watchdog timers need to be serviced
249 * periodically after this API call.
250 * \param password Existing (Application specific) password for the Watchdog module.
251 * \return None
252 */
253 extern void Ifx_Ssw_enableSafetyWatchdog(unsigned short password);
254
255 /** \brief Set the program counter for the CPU specified and start the CPU
256 * \param cpu Pointer to the CPU HW module (register memory map)
257 * \param programCounter Program counter value to start the CPU
258 */
259 extern void Ifx_Ssw_startCore(Ifx_CPU *cpu, unsigned int programCounter);
260
261 /** \brief Set CPU0 to idle state */
262 extern void Ifx_Ssw_setCpu0Idle(void);
263
264 /** \brief Initialise the C runtime environment */
265 extern void Ifx_Ssw_C_Init(void);
266
267 /** \brief Returns the system timer frequency.
268 * \return the system timer frequency in Hz.
269 */
270 extern float Ifx_Ssw_getStmFrequency(void);
271
272 /** \brief SCUWDT API to service CPU Watchdog functionality.
273 *
274 * This API will service Watchdog functionality corresponding to CPU WDT Hardware module.
275 * User need to use this API call periodically. This API results in reloading of the Watchdog Timer.
276 * User need to have the password stored locally in the caller function, (use Ifx_Ssw_getCpuWatchdogPassword).
277 * \param password Existing (Application specific) password for the Watchdog module.
278 * \param watchdog pointer to the watchdog register map of CPU WDT hardware instance.
279 * \return None
280 */
281 extern void Ifx_Ssw_serviceCpuWatchdog(Ifx_SCU_WDTCPU *watchdog, unsigned short password);
282
283 /** \brief SCUWDT API to service Safety Watchdog functionality.
284 *
285 * This API will service Watchdog functionality corresponding to Safety WDT Hardware module.
286 * User need to use this API call periodically. This API results in reloading of the Watchdog Timer.
287 * User need to have the password stored locally in the caller function, (use Ifx_Ssw_getSafetyWatchdogPassword).
288 * \param password Existing (Application specific) password for the Watchdog module.
289 * \return None
290 */
291 extern void Ifx_Ssw_serviceSafetyWatchdog(unsigned short password);
292
293 /*Endinit Functions*/
294 IFX_SSW_INLINE unsigned short Ifx_Ssw_getGlobalSafetyEndinitPasswordInline(void)
295 {
296 /* Read Password from CON0 register
297 * !!! NOTE: !!! when read bottom six bit of password are inverted so we have
298 * to toggle them before returning password */
299
300 unsigned short password = (unsigned short)MODULE_SCU.SEICON0.B.EPW ^ IFX_SSW_WDT_PASSWORD_INVERT_MSK;
301 return password;
302 }
303
304
305 IFX_SSW_INLINE void Ifx_Ssw_clearGlobalSafetyEndinitInline(unsigned short password)
306 {
307 /* Clear EndInit Watch-dog*/
308 MODULE_SCU.SEICON0.U = IFX_SSW_SEICON_REL_VAL_MSK | ((unsigned int)password << IFX_SCU_SEICON0_EPW_OFF);
309
310 /* Read back of the register is mandatory to ensure the register update */
311 MODULE_SCU.SEICON0.U;
312 }
313
314
315 IFX_SSW_INLINE void Ifx_Ssw_setGlobalSafetyEndinitInline(unsigned short password)
316 {
317 /* Set EndInit Watch-dog*/
318 MODULE_SCU.SEICON0.U = IFX_SSW_SEICON_REL_VAL_MSK | \
319 ((unsigned int)password << IFX_SCU_SEICON0_EPW_OFF) | \
320 ((unsigned int)1 << IFX_SCU_SEICON0_ENDINIT_OFF);
321
322 /* Read back of the register is mandatory to ensure the register update */
323 MODULE_SCU.SEICON0.U;
324 }
325
326
327 IFX_SSW_INLINE unsigned short Ifx_Ssw_getCpuWatchdogPasswordInline(Ifx_SCU_WDTCPU *watchdog)
328 {
329 unsigned short password;
330
331 /* Read Password from CON0 register
332 * !!! NOTE: !!! when read bottom six bit of password are inverted so we have
333 * to toggle them before returning password */
334 password = watchdog->CON0.B.PW;
335 password ^= IFX_SSW_WDT_PASSWORD_INVERT_MSK;
336
337 return password;
338 }
339
340
341 IFX_SSW_INLINE unsigned short Ifx_Ssw_getSafetyWatchdogPasswordInline(void)
342 {
343 unsigned short password;
344 Ifx_SCU_WDTS *watchdog;
345 watchdog = &MODULE_SCU.WDTS;
346 /* Read Password from Safety WDT CON0 register
347 * !!! NOTE: !!! when read bottom six bit of password are inverted so we have
348 * to toggle them before returning password */
349 password = watchdog->CON0.B.PW;
350 password ^= IFX_SSW_WDT_PASSWORD_INVERT_MSK;
351
352 return password;
353 }
354
355
356 IFX_SSW_INLINE void Ifx_Ssw_clearCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, unsigned short password)
357 {
358 if (watchdog->CON0.B.LCK)
359 {
360 /* see Table 1 (Password Access Bit Pattern Requirements) */
361 watchdog->CON0.U = ((unsigned int)1 << IFX_SCU_WDTCPU_CON0_ENDINIT_OFF) |
362 ((unsigned int)0 << IFX_SCU_WDTCPU_CON0_LCK_OFF) |
363 ((unsigned int)password << IFX_SCU_WDTCPU_CON0_PW_OFF) |
364 ((unsigned int)watchdog->CON0.B.REL << IFX_SCU_WDTCPU_CON0_REL_OFF);
365 }
366
367 /* Clear ENDINT and set LCK bit in Config_0 register */
368 watchdog->CON0.U = ((unsigned int)0 << IFX_SCU_WDTCPU_CON0_ENDINIT_OFF) |
369 ((unsigned int)1 << IFX_SCU_WDTCPU_CON0_LCK_OFF) |
370 ((unsigned int)password << IFX_SCU_WDTCPU_CON0_PW_OFF) |
371 ((unsigned int)watchdog->CON0.B.REL << IFX_SCU_WDTCPU_CON0_REL_OFF);
372
373 /* Read back of the register is mandatory to ensure the register update */
374 watchdog->CON0.U;
375 }
376
377
378 IFX_SSW_INLINE void Ifx_Ssw_clearSafetyEndinitInline(unsigned short password)
379 {
380 if (SCU_WDTS_CON0.B.LCK)
381 {
382 /* see Table 1 (Password Access Bit Pattern Requirements) */
383 SCU_WDTS_CON0.U = ((unsigned int)1 << IFX_SCU_WDTS_CON0_ENDINIT_OFF) |
384 ((unsigned int)0 << IFX_SCU_WDTS_CON0_LCK_OFF) |
385 ((unsigned int)password << IFX_SCU_WDTS_CON0_PW_OFF) |
386 ((unsigned int)SCU_WDTS_CON0.B.REL << IFX_SCU_WDTS_CON0_REL_OFF);
387 }
388
389 /* Clear ENDINT and set LCK bit in Config_0 register */
390 SCU_WDTS_CON0.U = ((unsigned int)0 << IFX_SCU_WDTS_CON0_ENDINIT_OFF) |
391 ((unsigned int)1 << IFX_SCU_WDTS_CON0_LCK_OFF) |
392 ((unsigned int)password << IFX_SCU_WDTS_CON0_PW_OFF) |
393 ((unsigned int)SCU_WDTS_CON0.B.REL << IFX_SCU_WDTS_CON0_REL_OFF);
394
395 /* Read back of the register is mandatory to ensure the register update */
396 SCU_WDTS_CON0.U;
397 }
398
399
400 IFX_SSW_INLINE void Ifx_Ssw_setCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, unsigned short password)
401 {
402 if (watchdog->CON0.B.LCK)
403 {
404 /* see Table 1 (Pass.word Access Bit Pattern Requirements) */
405 watchdog->CON0.U = ((unsigned int)1 << IFX_SCU_WDTCPU_CON0_ENDINIT_OFF) |
406 ((unsigned int)0 << IFX_SCU_WDTCPU_CON0_LCK_OFF) |
407 ((unsigned int)password << IFX_SCU_WDTCPU_CON0_PW_OFF) |
408 ((unsigned int)watchdog->CON0.B.REL << IFX_SCU_WDTCPU_CON0_REL_OFF);
409 }
410
411 /* Set ENDINT and set LCK bit in Config_0 register */
412 watchdog->CON0.U = ((unsigned int)1 << IFX_SCU_WDTCPU_CON0_ENDINIT_OFF) |
413 ((unsigned int)1 << IFX_SCU_WDTCPU_CON0_LCK_OFF) |
414 ((unsigned int)password << IFX_SCU_WDTCPU_CON0_PW_OFF) |
415 ((unsigned int)watchdog->CON0.B.REL << IFX_SCU_WDTCPU_CON0_REL_OFF);
416
417 /* Read back of the register is mandatory to ensure the register update */
418 watchdog->CON0.U;
419 }
420
421
422 IFX_SSW_INLINE void Ifx_Ssw_setSafetyEndinitInline(unsigned short password)
423 {
424 if (SCU_WDTS_CON0.B.LCK)
425 {
426 /* see Table 1 (Password Access Bit Pattern Requirements) */
427 SCU_WDTS_CON0.U = ((unsigned int)1 << IFX_SCU_WDTS_CON0_ENDINIT_OFF) |
428 ((unsigned int)0 << IFX_SCU_WDTS_CON0_LCK_OFF) |
429 ((unsigned int)password << IFX_SCU_WDTS_CON0_PW_OFF) |
430 ((unsigned int)SCU_WDTS_CON0.B.REL << IFX_SCU_WDTS_CON0_REL_OFF);
431 }
432
433 /* Set ENDINT and set LCK bit in Config_0 register */
434 SCU_WDTS_CON0.U = ((unsigned int)1 << IFX_SCU_WDTS_CON0_ENDINIT_OFF) |
435 ((unsigned int)1 << IFX_SCU_WDTS_CON0_LCK_OFF) |
436 ((unsigned int)password << IFX_SCU_WDTS_CON0_PW_OFF) |
437 ((unsigned int)SCU_WDTS_CON0.B.REL << IFX_SCU_WDTS_CON0_REL_OFF);
438
439 /* Read back of the register is mandatory to ensure the register update */
440 SCU_WDTS_CON0.U;
441 }
442
443 /* Check if Cold PowerOn Reset */
444
445 IFX_SSW_INLINE char Ifx_Ssw_isColdPoweronReset(void)
446 {
447 return (char)((SCU_RSTSTAT.U & IFX_SSW_COLD_POWERONRESET_MASK) > 0);
448 }
449
450 /*Add options to eliminate usage of stack pointers unnecessarily*/
451 #if defined(__HIGHTEC__)
452 #pragma GCC optimize "O2"
453 #endif
454
455 IFX_SSW_INLINE unsigned char Ifx_Ssw_isApplicationReset(void)
456 {
457 unsigned char returnVal;
458 unsigned int tempValue = SCU_RSTSTAT.U;
459
460 if ((tempValue & IFX_SSW_POWERONRESET_MASK) > 0U)
461 {
462 returnVal = 0U;
463 }
464 else if ((tempValue & IFX_SSW_APPLICATIONRESET_MASK) > 0U)
465 {
466 /* get the bit which is set at RSTSTAT (assumption: RSTSTAT register was cleared before and only one bit can be set) */
467 tempValue = tempValue & IFX_SSW_APPLICATIONRESET_MASK;
468 tempValue = (SCU_RSTCON.U >> ((31U - Ifx_Ssw_CLZ(tempValue)) << 1U)) & 3U;
469
470 if (tempValue == IFX_SSW_APPLICATIONRESET)
471 {
472 returnVal = 1U;
473 }
474 else
475 {
476 returnVal = 0U;
477 }
478 }
479 else if (((unsigned int)tempValue & ((unsigned int)IFX_SCU_RSTSTAT_CB3_MSK << IFX_SCU_RSTSTAT_CB3_OFF)))
480 {
481 /* CB3 reset is not configurable and is always application reset */
482 returnVal = 1U;
483 }
484 else if (CPU0_KRST0.B.RSTSTAT != 0) /*CPU0 KRST status */
485 {
486 returnVal = 1U;
487 }
488 else
489 {
490 returnVal = 0U;
491 }
492
493 return returnVal;
494 }
495
496
497 /*Restore the options to command line provided ones*/
498 #if defined(__HIGHTEC__)
499 #pragma GCC reset_options
500 #endif
501
502 IFX_SSW_INLINE void Ifx_Ssw_initCSA(unsigned int *csaBegin, unsigned int *csaEnd)
503 {
504 unsigned int k;
505 unsigned int nxt_cxi_val = 0U;
506 unsigned int *prvCsa = 0U;
507 unsigned int *nxtCsa = csaBegin;
508 unsigned int numOfCsa = (((unsigned int)csaEnd - (unsigned int)csaBegin) / 64U);
509
510 for (k = 0U; k < numOfCsa; k++)
511 {
512 nxt_cxi_val = ((unsigned int)((unsigned int)nxtCsa & ((unsigned int)0XFU << 28U)) >> 12U) | \
513 ((unsigned int)((unsigned int)nxtCsa & ((unsigned int)0XFFFFU << 6U)) >> 6U);
514
515 if (k == 0U)
516 {
517 Ifx_Ssw_MTCR(CPU_FCX, nxt_cxi_val); /* store the new pcxi value to LCX */
518 }
519 else
520 {
521 *prvCsa = nxt_cxi_val;
522 }
523
524 if (k == (numOfCsa - 3U))
525 {
526 Ifx_Ssw_MTCR(CPU_LCX, nxt_cxi_val); /* Last but 2 context save area is pointed in LCX to know if there is CSA depletion */
527 }
528
529 prvCsa = (unsigned int *)nxtCsa;
530 nxtCsa += IFX_SSW_CSA_SIZE; /* next CSA */
531 }
532
533 *prvCsa = 0U; /* Store null pointer in last CSA (= very first time!) */
534
535 Ifx_Ssw_DSYNC();
536 }
537
538
539 #endif /* IFXCPU_SSW_INFRA_H_ */
Ifx_Ssw_disableSafetyWatchdog
void Ifx_Ssw_disableSafetyWatchdog(unsigned short password)
Disable Safety Watchdog functionality.
Definition: Ifx_Ssw_Infra.c:126
Ifx_Ssw_CLZ
int Ifx_Ssw_CLZ(int) __attribute__((intrinsic_pseudo(1
Ifx_Ssw_clearSafetyEndinitInline
IFX_SSW_INLINE void Ifx_Ssw_clearSafetyEndinitInline(unsigned short password)
Definition: Ifx_Ssw_Infra.h:378
Ifx_Ssw_setSafetyEndinitInline
IFX_SSW_INLINE void Ifx_Ssw_setSafetyEndinitInline(unsigned short password)
Definition: Ifx_Ssw_Infra.h:422
Ifx_Ssw_MTCR
void Ifx_Ssw_MTCR(const unsigned int, unsigned int) __attribute__((intrinsic_function(0x102
IFX_SSW_APPLICATIONRESET
#define IFX_SSW_APPLICATIONRESET
Application reset enabled In SCU_RSTCON register, value 2 represents the Application reset...
Definition: Ifx_Ssw_Infra.h:90
Ifx_Ssw_disableCpuWatchdog
void Ifx_Ssw_disableCpuWatchdog(Ifx_SCU_WDTCPU *watchdog, unsigned short password)
Disable CPU Watchdog functionality.
Definition: Ifx_Ssw_Infra.c:96
IFX_SSW_POWERONRESET_MASK
#define IFX_SSW_POWERONRESET_MASK
PowerOn Reset Mask.
Definition: Ifx_Ssw_Infra.h:58
Ifx_Ssw_DSYNC
void Ifx_Ssw_DSYNC(void) __attribute__((intrinsic_function(0x103
Ifx_Ssw_getGlobalSafetyEndinitPasswordInline
IFX_SSW_INLINE unsigned short Ifx_Ssw_getGlobalSafetyEndinitPasswordInline(void)
Definition: Ifx_Ssw_Infra.h:294
Ifx_Ssw_clearCpuEndinit
void Ifx_Ssw_clearCpuEndinit(Ifx_SCU_WDTCPU *watchdog, unsigned short password)
Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: Ifx_Ssw_Infra.c:60
Ifx_Ssw_setGlobalSafetyEndinitInline
IFX_SSW_INLINE void Ifx_Ssw_setGlobalSafetyEndinitInline(unsigned short password)
Definition: Ifx_Ssw_Infra.h:315
IFX_SSW_INLINE
#define IFX_SSW_INLINE
Definition: Ifx_Ssw_CompilersDcc.h:114
Ifx_Ssw_clearGlobalSafetyEndinitInline
IFX_SSW_INLINE void Ifx_Ssw_clearGlobalSafetyEndinitInline(unsigned short password)
Definition: Ifx_Ssw_Infra.h:305
Ifx_Ssw_initCSA
IFX_SSW_INLINE void Ifx_Ssw_initCSA(unsigned int *csaBegin, unsigned int *csaEnd)
Definition: Ifx_Ssw_Infra.h:502
Ifx_Ssw_serviceCpuWatchdog
void Ifx_Ssw_serviceCpuWatchdog(Ifx_SCU_WDTCPU *watchdog, unsigned short password)
SCUWDT API to service CPU Watchdog functionality.
Definition: Ifx_Ssw_Infra.c:84
Ifx_Ssw_enableSafetyWatchdog
void Ifx_Ssw_enableSafetyWatchdog(unsigned short password)
Enable Safety Watchdog functionality.
Definition: Ifx_Ssw_Infra.c:134
Ifx_Ssw_Compilers.h
Startup Software for compiler options.
Ifx_Ssw_getCpuWatchdogPasswordInline
IFX_SSW_INLINE unsigned short Ifx_Ssw_getCpuWatchdogPasswordInline(Ifx_SCU_WDTCPU *watchdog)
Definition: Ifx_Ssw_Infra.h:327
Ifx_Ssw_getSafetyWatchdogPasswordInline
IFX_SSW_INLINE unsigned short Ifx_Ssw_getSafetyWatchdogPasswordInline(void)
Definition: Ifx_Ssw_Infra.h:341
IFX_SSW_CSA_SIZE
#define IFX_SSW_CSA_SIZE
CSA size.
Definition: Ifx_Ssw_Infra.h:99
Ifx_Ssw_isColdPoweronReset
IFX_SSW_INLINE char Ifx_Ssw_isColdPoweronReset(void)
Definition: Ifx_Ssw_Infra.h:445
Ifx_Ssw_setSafetyEndinit
void Ifx_Ssw_setSafetyEndinit(unsigned short password)
Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: Ifx_Ssw_Infra.c:78
Ifx_Ssw_C_Init
void Ifx_Ssw_C_Init(void)
Initialise the C runtime environment.
Definition: Ifx_Ssw_Infra.c:198
Ifx_Ssw_getStmFrequency
float Ifx_Ssw_getStmFrequency(void)
Returns the system timer frequency.
Definition: Ifx_Ssw_Infra.c:170
IFX_SSW_APPLICATIONRESET_MASK
#define IFX_SSW_APPLICATIONRESET_MASK
Application Reset Mask.
Definition: Ifx_Ssw_Infra.h:69
Ifx_Ssw_clearSafetyEndinit
void Ifx_Ssw_clearSafetyEndinit(unsigned short password)
Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: Ifx_Ssw_Infra.c:72
Ifx_Ssw_setCpuEndinit
void Ifx_Ssw_setCpuEndinit(Ifx_SCU_WDTCPU *watchdog, unsigned short password)
Set ENDINIT bit provided by CPU WDT Hardware module.
Definition: Ifx_Ssw_Infra.c:66
IFX_SSW_COLD_POWERONRESET_MASK
#define IFX_SSW_COLD_POWERONRESET_MASK
Cold PowerOn Reset Mask.
Definition: Ifx_Ssw_Infra.h:81
Ifx_Ssw_clearCpuEndinitInline
IFX_SSW_INLINE void Ifx_Ssw_clearCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, unsigned short password)
Definition: Ifx_Ssw_Infra.h:356
Ifx_Ssw_serviceSafetyWatchdog
void Ifx_Ssw_serviceSafetyWatchdog(unsigned short password)
SCUWDT API to service Safety Watchdog functionality.
Definition: Ifx_Ssw_Infra.c:90
Ifx_Ssw_setCpu0Idle
void Ifx_Ssw_setCpu0Idle(void)
Set CPU0 to idle state.
Definition: Ifx_Ssw_Infra.c:160
Ifx_Ssw_getCpuWatchdogPassword
unsigned short Ifx_Ssw_getCpuWatchdogPassword(Ifx_SCU_WDTCPU *watchdog)
Fetch current password of CPU Watchdog module.
Definition: Ifx_Ssw_Infra.c:48
Ifx_Ssw_isApplicationReset
IFX_SSW_INLINE unsigned char Ifx_Ssw_isApplicationReset(void)
Definition: Ifx_Ssw_Infra.h:455
Ifx_Ssw_getSafetyWatchdogPassword
unsigned short Ifx_Ssw_getSafetyWatchdogPassword(void)
Fetch current password of Safety Watchdog module.
Definition: Ifx_Ssw_Infra.c:54
Ifx_Ssw_startCore
void Ifx_Ssw_startCore(Ifx_CPU *cpu, unsigned int programCounter)
Set the program counter for the CPU specified and start the CPU.
Definition: Ifx_Ssw_Infra.c:142
IFX_SSW_SEICON_REL_VAL_MSK
#define IFX_SSW_SEICON_REL_VAL_MSK
Reload value mask.
Definition: Ifx_Ssw_Infra.h:93
Ifx_Ssw_enableCpuWatchdog
void Ifx_Ssw_enableCpuWatchdog(Ifx_SCU_WDTCPU *watchdog, unsigned short password)
SCUWDT API to enable CPU Watchdog functionality.
Definition: Ifx_Ssw_Infra.c:111
Ifx_Ssw_setCpuEndinitInline
IFX_SSW_INLINE void Ifx_Ssw_setCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, unsigned short password)
Definition: Ifx_Ssw_Infra.h:400
IFX_SSW_WDT_PASSWORD_INVERT_MSK
#define IFX_SSW_WDT_PASSWORD_INVERT_MSK
Mask values is used to invert the password value bits.
Definition: Ifx_Ssw_Infra.h:96


iLLD_TC38A: Ifx_Ssw_LegacySwCfg.h Source File

  • Infra
  • Ssw
  • TC38A
  • Tricore
Ifx_Ssw_LegacySwCfg.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_Ssw_LegacySwCfg.h
3 * \brief Startup Software to support legacy controller options.
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 #ifndef IFX_SSW_DEFAULTCFG_H_
43 #define IFX_SSW_DEFAULTCFG_H_
44
45 #include "Ifx_Cfg.h"
46
47 /******************************************************************************/
48 /* Macros to support Legacy SW */
49 /******************************************************************************/
50 #ifdef IFX_CFG_CPU_CSTART_ENABLE_TRICORE0
51 # define IFX_CFG_SSW_ENABLE_TRICORE0 IFX_CFG_CPU_CSTART_ENABLE_TRICORE0
52 #endif
53 #ifdef IFX_CFG_CPU_CSTART_ENABLE_TRICORE1
54 # define IFX_CFG_SSW_ENABLE_TRICORE1 IFX_CFG_CPU_CSTART_ENABLE_TRICORE1
55 #endif
56 #ifdef IFX_CFG_CPU_CSTART_ENABLE_TRICORE2
57 # define IFX_CFG_SSW_ENABLE_TRICORE2 IFX_CFG_CPU_CSTART_ENABLE_TRICORE2
58 #endif
59 #ifdef IFX_CFG_CPU_CSTART_ENABLE_TRICORE3
60 # define IFX_CFG_SSW_ENABLE_TRICORE3 IFX_CFG_CPU_CSTART_ENABLE_TRICORE3
61 #endif
62 #ifdef IFX_CFG_CPU_CSTART_ENABLE_TRICORE4
63 # define IFX_CFG_SSW_ENABLE_TRICORE4 IFX_CFG_CPU_CSTART_ENABLE_TRICORE4
64 #endif
65 #ifdef IFX_CFG_CPU_CSTART_ENABLE_TRICORE5
66 # define IFX_CFG_SSW_ENABLE_TRICORE5 IFX_CFG_CPU_CSTART_ENABLE_TRICORE5
67 #endif
68
69 #ifdef IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_PCACHE
70 # define IFX_CFG_SSW_ENABLE_TRICORE0_PCACHE IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_PCACHE
71 #endif
72 #ifdef IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_DCACHE
73 # define IFX_CFG_SSW_ENABLE_TRICORE0_DCACHE IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_DCACHE
74 #endif
75
76 #ifdef IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_PCACHE
77 # define IFX_CFG_SSW_ENABLE_TRICORE1_PCACHE IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_PCACHE
78 #endif
79 #ifdef IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_DCACHE
80 # define IFX_CFG_SSW_ENABLE_TRICORE1_DCACHE IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_DCACHE
81 #endif
82
83 #ifdef IFX_CFG_CPU_CSTART_ENABLE_TRICORE2_PCACHE
84 # define IFX_CFG_SSW_ENABLE_TRICORE2_PCACHE IFX_CFG_CPU_CSTART_ENABLE_TRICORE2_PCACHE
85 #endif
86 #ifdef IFX_CFG_CPU_CSTART_ENABLE_TRICORE2_DCACHE
87 # define IFX_CFG_SSW_ENABLE_TRICORE2_DCACHE IFX_CFG_CPU_CSTART_ENABLE_TRICORE2_DCACHE
88 #endif
89
90 #ifdef IFX_CFG_CPU_CSTART_ENABLE_TRICORE3_PCACHE
91 # define IFX_CFG_SSW_ENABLE_TRICORE3_PCACHE IFX_CFG_CPU_CSTART_ENABLE_TRICORE3_PCACHE
92 #endif
93 #ifdef IFX_CFG_CPU_CSTART_ENABLE_TRICORE3_DCACHE
94 # define IFX_CFG_SSW_ENABLE_TRICORE3_DCACHE IFX_CFG_CPU_CSTART_ENABLE_TRICORE3_DCACHE
95 #endif
96
97 #ifdef IFX_CFG_CPU_CSTART_ENABLE_TRICORE4_PCACHE
98 # define IFX_CFG_SSW_ENABLE_TRICORE4_PCACHE IFX_CFG_CPU_CSTART_ENABLE_TRICORE4_PCACHE
99 #endif
100 #ifdef IFX_CFG_CPU_CSTART_ENABLE_TRICORE4_DCACHE
101 # define IFX_CFG_SSW_ENABLE_TRICORE4_DCACHE IFX_CFG_CPU_CSTART_ENABLE_TRICORE4_DCACHE
102 #endif
103
104 #ifdef IFX_CFG_CPU_CSTART_ENABLE_TRICORE5_PCACHE
105 # define IFX_CFG_SSW_ENABLE_TRICORE5_PCACHE IFX_CFG_CPU_CSTART_ENABLE_TRICORE5_PCACHE
106 #endif
107 #ifdef IFX_CFG_CPU_CSTART_ENABLE_TRICORE5_DCACHE
108 # define IFX_CFG_SSW_ENABLE_TRICORE5_DCACHE IFX_CFG_CPU_CSTART_ENABLE_TRICORE5_DCACHE
109 #endif
110
111 #ifndef USE_LEGACY_ILLD_DEFINES
112 #ifdef IFX_CFG_CPU_CSTART_ENABLE_TRICORE0
113 #error Unsupported legacy constant 'IFX_CFG_CPU_CSTART_ENABLE_TRICORE0' defined! Use 'IFX_CFG_SSW_CSTART_ENABLE_TRICORE0' instead!
114 #endif
115 #ifdef IFX_CFG_CPU_CSTART_ENABLE_TRICORE1
116 #error Unsupported legacy constant 'IFX_CFG_CPU_CSTART_ENABLE_TRICORE1' defined! Use 'IFX_CFG_SSW_CSTART_ENABLE_TRICORE1' instead!
117 #endif
118 #ifdef IFX_CFG_CPU_CSTART_ENABLE_TRICORE2
119 #error Unsupported legacy constant 'IFX_CFG_CPU_CSTART_ENABLE_TRICORE2' defined! Use 'IFX_CFG_SSW_CSTART_ENABLE_TRICORE2' instead!
120 #endif
121 #ifdef IFX_CFG_CPU_CSTART_ENABLE_TRICORE3
122 #error Unsupported legacy constant 'IFX_CFG_CPU_CSTART_ENABLE_TRICORE3' defined! Use 'IFX_CFG_SSW_CSTART_ENABLE_TRICORE3' instead!
123 #endif
124 #ifdef IFX_CFG_CPU_CSTART_ENABLE_TRICORE4
125 #error Unsupported legacy constant 'IFX_CFG_CPU_CSTART_ENABLE_TRICORE4' defined! Use 'IFX_CFG_SSW_CSTART_ENABLE_TRICORE4' instead!
126 #endif
127 #ifdef IFX_CFG_CPU_CSTART_ENABLE_TRICORE5
128 #error Unsupported legacy constant 'IFX_CFG_CPU_CSTART_ENABLE_TRICORE5' defined! Use 'IFX_CFG_SSW_CSTART_ENABLE_TRICORE5' instead!
129 #endif
130
131 #ifdef IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_PCACHE
132 #error Unsupported legacy constant 'IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_PCACHE' defined! Use 'IFX_CFG_SSW_ENABLE_TRICORE0_PCACHE' instead!
133 #endif
134 #ifdef IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_DCACHE
135 #error Unsupported legacy constant 'IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_DCACHE' defined! Use 'IFX_CFG_SSW_ENABLE_TRICORE0_DCACHE' instead!
136 #endif
137
138 #ifdef IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_PCACHE
139 #error Unsupported legacy constant 'IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_PCACHE' defined! Use 'IFX_CFG_SSW_ENABLE_TRICORE1_PCACHE' instead!
140 #endif
141 #ifdef IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_DCACHE
142 #error Unsupported legacy constant 'IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_DCACHE' defined! Use 'IFX_CFG_SSW_ENABLE_TRICORE1_DCACHE' instead!
143 #endif
144
145 #ifdef IFX_CFG_CPU_CSTART_ENABLE_TRICORE2_PCACHE
146 #error Unsupported legacy constant 'IFX_CFG_CPU_CSTART_ENABLE_TRICORE2_PCACHE' defined! Use 'IFX_CFG_SSW_ENABLE_TRICORE2_PCACHE' instead!
147 #endif
148 #ifdef IFX_CFG_CPU_CSTART_ENABLE_TRICORE2_DCACHE
149 #error Unsupported legacy constant 'IFX_CFG_CPU_CSTART_ENABLE_TRICORE2_DCACHE' defined! Use 'IFX_CFG_SSW_ENABLE_TRICORE2_DCACHE' instead!
150 #endif
151
152 #ifdef IFX_CFG_CPU_CSTART_ENABLE_TRICORE3_PCACHE
153 #error Unsupported legacy constant 'IFX_CFG_CPU_CSTART_ENABLE_TRICORE3_PCACHE' defined! Use 'IFX_CFG_SSW_ENABLE_TRICORE3_PCACHE' instead!
154 #endif
155 #ifdef IFX_CFG_CPU_CSTART_ENABLE_TRICORE3_DCACHE
156 #error Unsupported legacy constant 'IFX_CFG_CPU_CSTART_ENABLE_TRICORE3_DCACHE' defined! Use 'IFX_CFG_SSW_ENABLE_TRICORE3_DCACHE' instead!
157 #endif
158
159 #ifdef IFX_CFG_CPU_CSTART_ENABLE_TRICORE4_PCACHE
160 #error Unsupported legacy constant 'IFX_CFG_CPU_CSTART_ENABLE_TRICORE4_PCACHE' defined! Use 'IFX_CFG_SSW_ENABLE_TRICORE4_PCACHE' instead!
161 #endif
162 #ifdef IFX_CFG_CPU_CSTART_ENABLE_TRICORE4_DCACHE
163 #error Unsupported legacy constant 'IFX_CFG_CPU_CSTART_ENABLE_TRICORE4_DCACHE' defined! Use 'IFX_CFG_SSW_ENABLE_TRICORE4_DCACHE' instead!
164 #endif
165
166 #ifdef IFX_CFG_CPU_CSTART_ENABLE_TRICORE5_PCACHE
167 #error Unsupported legacy constant 'IFX_CFG_CPU_CSTART_ENABLE_TRICORE5_PCACHE' defined! Use 'IFX_CFG_SSW_ENABLE_TRICORE5_PCACHE' instead!
168 #endif
169 #ifdef IFX_CFG_CPU_CSTART_ENABLE_TRICORE5_DCACHE
170 #error Unsupported legacy constant 'IFX_CFG_CPU_CSTART_ENABLE_TRICORE5_DCACHE' defined! Use 'IFX_CFG_SSW_ENABLE_TRICORE5_DCACHE' instead!
171 #endif
172 #endif /* USE_LEGACY_ILLD_DEFINES */
173
174 #endif /* IFX_SSW_DEFAULTCFG_H_ */


iLLD_TC38A: Ifx_Ssw_Tc0.c Source File

  • Infra
  • Ssw
  • TC38A
  • Tricore
Ifx_Ssw_Tc0.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_Ssw_Tc0.c
3 * \brief Startup Software for Core0
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /*******************************************************************************
43 ** Includes **
44 *******************************************************************************/
45 #include "Ifx_Cfg.h"
46 #include "Ifx_Ssw.h"
47 #include "Ifx_Ssw_Infra.h"
48 #include "Ifx_Cfg_Ssw.h"
49 /*******************************************************************************
50 ** Macros **
51 *******************************************************************************/
52 #ifndef IFX_CFG_SSW_ENABLE_TRICORE0_PCACHE
53 #define IFX_CFG_SSW_ENABLE_TRICORE0_PCACHE (1U)
54 #endif
55
56 #ifndef IFX_CFG_SSW_ENABLE_TRICORE0_DCACHE
57 #define IFX_CFG_SSW_ENABLE_TRICORE0_DCACHE (1U)
58 #endif
59
60 #ifndef IFX_CFG_SSW_CALLOUT_PMS_INIT
61 #define IFX_CFG_SSW_CALLOUT_PMS_INIT()
62 #endif
63
64 #ifndef IFX_CFG_SSW_CALLOUT_LBIST
65 #define IFX_CFG_SSW_CALLOUT_LBIST()
66 #endif
67
68 #ifndef IFX_CFG_SSW_CALLOUT_MONBIST
69 #define IFX_CFG_SSW_CALLOUT_MONBIST()
70 #endif
71
72 #ifndef IFX_CFG_SSW_CALLOUT_MMIC_CHECK
73 #define IFX_CFG_SSW_CALLOUT_MMIC_CHECK()
74 #endif
75
76 #ifndef IFX_CFG_SSW_CALLOUT_PLL_INIT
77 #define IFX_CFG_SSW_CALLOUT_PLL_INIT()
78 #endif
79
80 #ifndef IFX_CFG_SSW_CALLOUT_MBIST
81 #define IFX_CFG_SSW_CALLOUT_MBIST()
82 #endif
83
84 #ifndef IFX_CFG_SSW_CALLOUT_SMU
85 #define IFX_CFG_SSW_CALLOUT_SMU()
86 #endif
87
88 #define IFX_SSW_INIT_CONTEXT() \
89 { \
90 /* Load user stack pointer */ \
91 Ifx_Ssw_setAddressReg(a10, __USTACK(0)); \
92 Ifx_Ssw_DSYNC(); \
93 \
94 /*Initialize the context save area for CPU0. Function Calls Possible */ \
95 /* Setup the context save area linked list */ \
96 Ifx_Ssw_initCSA((unsigned int *)__CSA(0), (unsigned int *)__CSA_END(0)); \
97 /* Clears any instruction buffer */ \
98 Ifx_Ssw_ISYNC(); \
99 }
100 /*******************************************************************************
101 ** Prototypes & Externals **
102 *******************************************************************************/
103 /** !IMPORTANT: The SSW Configuration shall be defined at Application SW Configuration
104 * Please refer to iLLD demos for startup sw configuration (Ifx_Cfg_Ssw.c and .h)
105 */
106 static void __StartUpSoftware(void);
107 static void __StartUpSoftware_Phase2(void);
108 static void __StartUpSoftware_Phase3ApplicationResetPath(void);
109 static void __StartUpSoftware_Phase3PowerOnResetPath(void);
110 static void __StartUpSoftware_Phase4(void);
111 static void __StartUpSoftware_Phase5(void);
112 static void __StartUpSoftware_Phase6(void);
113 static void __Core0_start(void);
114 IFX_SSW_COMMON_LINKER_SYMBOLS();
115 IFX_SSW_CORE_LINKER_SYMBOLS(0);
116
117 /*******************************************************************************
118 ** Defines **
119 *******************************************************************************/
120 extern void core0_main(void);
121
122 #if defined(__TASKING__)
123 __asm("\t .extern core0_main");
124 #endif
125
126 /*Add options to eliminate usage of stack pointers unnecessarily*/
127 #if defined(__HIGHTEC__)
128 #pragma GCC optimize "O2"
129 #elif defined(__TASKING__)
130 #pragma optimize R
131 #endif
132
133 static void __StartUpSoftware(void)
134 {
135 /* Initialize A1 pointer to use the global constants with small data addressing */
136 Ifx_Ssw_setAddressReg(a1, __SDATA2(0));
137
138 /* Set the PSW to its reset value in case of a warm start,clear PSW.IS */
139 Ifx_Ssw_MTCR(CPU_PSW, IFX_CFG_SSW_PSW_DEFAULT);
140
141 /* This phase is executed only if last reset is not of type application reset */
142 if (Ifx_Ssw_isApplicationReset() != 1)
143 {
144 Ifx_Ssw_jumpToFunction(__StartUpSoftware_Phase2);
145 }
146 else
147 {
148 Ifx_Ssw_jumpToFunction(__StartUpSoftware_Phase3ApplicationResetPath);
149 }
150 }
151
152
153 static void __StartUpSoftware_Phase2(void)
154 {
155 /* Power and EVRC configurations */
156 IFX_CFG_SSW_CALLOUT_PMS_INIT();
157
158 /* LBIST Tests and evaluation */
159 IFX_CFG_SSW_CALLOUT_LBIST();
160
161 /* MONBIST Tests and evaluation */
162 IFX_CFG_SSW_CALLOUT_MONBIST();
163
164 Ifx_Ssw_jumpToFunction(__StartUpSoftware_Phase3PowerOnResetPath);
165 }
166
167
168 static void __StartUpSoftware_Phase3PowerOnResetPath(void)
169 {
170 IFX_SSW_INIT_CONTEXT();
171
172 Ifx_Ssw_jumpToFunction(__StartUpSoftware_Phase4);
173 }
174
175
176 static void __StartUpSoftware_Phase3ApplicationResetPath(void)
177 {
178 IFX_SSW_INIT_CONTEXT();
179
180 Ifx_Ssw_jumpToFunction(__StartUpSoftware_Phase5);
181 }
182
183
184 static void __StartUpSoftware_Phase4(void)
185 {
186 /* This is for ADAS chip, where clock is provided by MMIC chip. This has to be
187 * implemented according the board.
188 */
189 IFX_CFG_SSW_CALLOUT_MMIC_CHECK();
190
191 {
192 /* Update safety and cpu watchdog reload value*/
193 unsigned short cpuWdtPassword = Ifx_Ssw_getCpuWatchdogPasswordInline(&MODULE_SCU.WDTCPU[0]);
194 unsigned short safetyWdtPassword = Ifx_Ssw_getSafetyWatchdogPasswordInline();
195
196 /* servicing watchdog timers */
197 Ifx_Ssw_serviceCpuWatchdog(&MODULE_SCU.WDTCPU[0], cpuWdtPassword);
198 Ifx_Ssw_serviceSafetyWatchdog(safetyWdtPassword);
199 }
200
201 /* Initialize the clock system */
202 IFX_CFG_SSW_CALLOUT_PLL_INIT();
203
204 /* MBIST Tests and evaluation */
205 IFX_CFG_SSW_CALLOUT_MBIST();
206
207 Ifx_Ssw_jumpToFunction(__StartUpSoftware_Phase5);
208 }
209
210
211 static void __StartUpSoftware_Phase5(void)
212 {
213 /* SMU alarm handling */
214 IFX_CFG_SSW_CALLOUT_SMU();
215
216 Ifx_Ssw_jumpToFunction(__StartUpSoftware_Phase6);
217 }
218
219
220 static void __StartUpSoftware_Phase6(void)
221 {
222 /* Start remaining cores as a daisy-chain */
223 #if (IFX_CFG_SSW_ENABLE_TRICORE1 != 0)
224 Ifx_Ssw_startCore(&MODULE_CPU1, (unsigned int)__START(1)); /*The status returned by function call is ignored */
225 #endif /* #if (IFX_CFG_CPU_CSTART_ENABLE_TRICORE1 != 0)*/
226 #if (IFX_CFG_SSW_ENABLE_TRICORE1 == 0)
227 #if (IFX_CFG_SSW_ENABLE_TRICORE2 != 0)
228 Ifx_Ssw_startCore(&MODULE_CPU2, (unsigned int)__START(2)); /*The status returned by function call is ignored */
229 #endif
230 #if (IFX_CFG_SSW_ENABLE_TRICORE2 == 0)
231 #if (IFX_CFG_SSW_ENABLE_TRICORE3 != 0)
232 Ifx_Ssw_startCore(&MODULE_CPU3, (unsigned int)__START(3)); /*The status returned by function call is ignored */
233 #endif
234 #endif /* #if (IFX_CFG_SSW_ENABLE_TRICORE2 == 0) */
235 #endif /* #if (IFX_CFG_SSW_ENABLE_TRICORE1 == 0) */
236
237 Ifx_Ssw_jumpToFunction(__Core0_start);
238 }
239
240
241 static void __Core0_start(void)
242 {
243 /* Update safety and cpu/safety watchdog reload values */
244 /* Password value is read again, because there is chance that local variables may be overridden. */
245 unsigned short cpuWdtPassword = Ifx_Ssw_getCpuWatchdogPasswordInline(&MODULE_SCU.WDTCPU[0]);
246 unsigned short safetyWdtPassword = Ifx_Ssw_getSafetyWatchdogPasswordInline();
247
248 Ifx_Ssw_clearCpuEndinitInline(&MODULE_SCU.WDTCPU[0], cpuWdtPassword);
249
250 /* Enable/ Disable the caches depending on the configuration. At this point cache are invalidated */
251 {
252 Ifx_CPU_PCON0 pcon0;
253 pcon0.U = 0;
254 pcon0.B.PCBYP = IFX_CFG_SSW_ENABLE_TRICORE0_PCACHE ? 0 : 1; /* depending on the enable bypass bit is reset/set */
255 Ifx_Ssw_MTCR(CPU_PCON0, pcon0.U);
256 Ifx_Ssw_ISYNC();
257 }
258
259 {
260 Ifx_CPU_DCON0 dcon0;
261 dcon0.U = 0;
262 dcon0.B.DCBYP = IFX_CFG_SSW_ENABLE_TRICORE0_DCACHE ? 0 : 1; /* depending on the enable bypass bit is reset/set */
263 Ifx_Ssw_MTCR(CPU_DCON0, dcon0.U);
264 Ifx_Ssw_ISYNC();
265 }
266
267 /* Set A0 Pointer to access global variables with small data addressing */
268 Ifx_Ssw_setAddressReg(a0, __SDATA1(0));
269
270 /* These to be un commented if A8 and A9 are required to be initialized */
271 Ifx_Ssw_setAddressReg(a8, __SDATA3(0));
272 Ifx_Ssw_setAddressReg(a9, __SDATA4(0));
273
274 /* Trap vector table initialization is necessary if it is not same as default value */
275 Ifx_Ssw_MTCR(CPU_BTV, (unsigned int)__TRAPTAB(0));
276 /* Base interrupt vector table initialized */
277 Ifx_Ssw_MTCR(CPU_BIV, (unsigned int)__INTTAB(0));
278 /* Interrupt stack pointer is configured */
279 Ifx_Ssw_MTCR(CPU_ISP, (unsigned int)__ISTACK(0));
280
281 Ifx_Ssw_setCpuEndinitInline(&MODULE_SCU.WDTCPU[0], cpuWdtPassword);
282
283 /* CPU and safety watchdogs are enabled by default,
284 * C initialization functions are not servicing the watchdogs.
285 */
286 Ifx_Ssw_disableCpuWatchdog(&MODULE_SCU.WDTCPU[0], cpuWdtPassword);
287 Ifx_Ssw_disableSafetyWatchdog(safetyWdtPassword);
288
289 /* Initialization of C runtime variables */
290 Ifx_Ssw_C_Init();
291
292 Ifx_Ssw_enableSafetyWatchdog(safetyWdtPassword);
293
294 #if (IFX_CFG_SSW_ENABLE_TRICORE0 == 0)
295 /* Set the CPU 0 to Idle mode, if it is not needed to be enabled */
296 Ifx_Ssw_setCpu0Idle();
297 #endif
298
299 Ifx_Ssw_enableCpuWatchdog(&MODULE_SCU.WDTCPU[0], cpuWdtPassword);
300
301 /*Call main function of Cpu0 */
302 Ifx_Ssw_jumpToFunction(core0_main);
303 }
304
305
306 /******************************************************************************
307 * reset vector address *
308 *****************************************************************************/
309 #if defined(__HIGHTEC__)
310 #pragma section
311 #pragma section ".start" x
312 #endif
313 #if defined(__TASKING__)
314 #pragma protect on
315 #pragma section code "start"
316 #endif
317 #if defined(__DCC__)
318 #pragma section CODE ".start" X
319 #endif
320 #if defined(__ghs__)
321 #pragma ghs section text=".start"
322 #endif
323
324 void _START(void)
325 {
326 Ifx_Ssw_jumpToFunction(__StartUpSoftware);
327 }
328
329
330 /* reset the sections defined above, to normal region */
331 #if defined(__HIGHTEC__)
332 #pragma section
333 #endif
334 #if defined(__TASKING__)
335 #pragma protect restore
336 #pragma section code restore
337 #endif
338 #if defined(__DCC__)
339 #pragma section CODE
340 #endif
341 #if defined(__ghs__)
342 #pragma ghs section text=default
343 #endif
344
345 /*Restore the options to command line provided ones*/
346 #if defined(__HIGHTEC__)
347 #pragma GCC reset_options
348 #elif defined(__TASKING__)
349 #pragma endoptimize
350 #endif
__ISTACK
#define __ISTACK(cpu)
Definition: CompilerDcc.h:71
core0_main
void core0_main(void)
Ifx_Ssw_MTCR
void Ifx_Ssw_MTCR(const unsigned int, unsigned int) __attribute__((intrinsic_function(0x102
IFX_CFG_SSW_CALLOUT_MMIC_CHECK
#define IFX_CFG_SSW_CALLOUT_MMIC_CHECK()
Definition: Ifx_Ssw_Tc0.c:73
IFX_CFG_SSW_CALLOUT_LBIST
#define IFX_CFG_SSW_CALLOUT_LBIST()
Definition: Ifx_Ssw_Tc0.c:65
Ifx_Ssw_setAddressReg
#define Ifx_Ssw_setAddressReg(regNum, val)
Definition: Ifx_Ssw_CompilersDcc.h:155
__SDATA3
#define __SDATA3(cpu)
Definition: CompilerDcc.h:92
__SDATA2
#define __SDATA2(cpu)
Definition: CompilerDcc.h:91
IFX_CFG_SSW_CALLOUT_MONBIST
#define IFX_CFG_SSW_CALLOUT_MONBIST()
Definition: Ifx_Ssw_Tc0.c:69
IFX_CFG_SSW_ENABLE_TRICORE0_PCACHE
#define IFX_CFG_SSW_ENABLE_TRICORE0_PCACHE
Definition: Ifx_Ssw_Tc0.c:53
Ifx_Ssw_C_Init
void Ifx_Ssw_C_Init(void)
Initialise the C runtime environment.
Definition: Ifx_Ssw_Infra.c:198
Ifx_Ssw_serviceSafetyWatchdog
void Ifx_Ssw_serviceSafetyWatchdog(unsigned short password)
SCUWDT API to service Safety Watchdog functionality.
Definition: Ifx_Ssw_Infra.c:90
Ifx_Ssw_getCpuWatchdogPasswordInline
IFX_SSW_INLINE unsigned short Ifx_Ssw_getCpuWatchdogPasswordInline(Ifx_SCU_WDTCPU *watchdog)
Definition: Ifx_Ssw_Infra.h:327
IFX_CFG_SSW_CALLOUT_SMU
#define IFX_CFG_SSW_CALLOUT_SMU()
Definition: Ifx_Ssw_Tc0.c:85
Ifx_Ssw_disableCpuWatchdog
void Ifx_Ssw_disableCpuWatchdog(Ifx_SCU_WDTCPU *watchdog, unsigned short password)
Disable CPU Watchdog functionality.
Definition: Ifx_Ssw_Infra.c:96
Ifx_Ssw_getSafetyWatchdogPasswordInline
IFX_SSW_INLINE unsigned short Ifx_Ssw_getSafetyWatchdogPasswordInline(void)
Definition: Ifx_Ssw_Infra.h:341
IFX_CFG_SSW_CALLOUT_MBIST
#define IFX_CFG_SSW_CALLOUT_MBIST()
Definition: Ifx_Ssw_Tc0.c:81
_START
void _START(void)
Definition: Ifx_Ssw_Tc0.c:324
Ifx_Ssw.h
Startup Software configuration. Can configure which core to be enabled.
__INTTAB
#define __INTTAB(cpu)
Definition: CompilerDcc.h:85
Ifx_Ssw_jumpToFunction
asm volatile void Ifx_Ssw_jumpToFunction(void *fun)
Definition: Ifx_Ssw_CompilersDcc.h:170
__SDATA1
#define __SDATA1(cpu)
Definition: CompilerDcc.h:90
Ifx_Ssw_setCpu0Idle
void Ifx_Ssw_setCpu0Idle(void)
Set CPU0 to idle state.
Definition: Ifx_Ssw_Infra.c:160
Ifx_Ssw_startCore
void Ifx_Ssw_startCore(Ifx_CPU *cpu, unsigned int programCounter)
Set the program counter for the CPU specified and start the CPU.
Definition: Ifx_Ssw_Infra.c:142
__TRAPTAB
#define __TRAPTAB(cpu)
Definition: CompilerDcc.h:88
Ifx_Ssw_enableCpuWatchdog
void Ifx_Ssw_enableCpuWatchdog(Ifx_SCU_WDTCPU *watchdog, unsigned short password)
SCUWDT API to enable CPU Watchdog functionality.
Definition: Ifx_Ssw_Infra.c:111
__START
#define __START(cpu)
Definition: Ifx_Ssw_CompilersDcc.h:80
IFX_SSW_INIT_CONTEXT
#define IFX_SSW_INIT_CONTEXT()
Definition: Ifx_Ssw_Tc0.c:88
Ifx_Ssw_clearCpuEndinitInline
IFX_SSW_INLINE void Ifx_Ssw_clearCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, unsigned short password)
Definition: Ifx_Ssw_Infra.h:356
IFX_CFG_SSW_CALLOUT_PLL_INIT
#define IFX_CFG_SSW_CALLOUT_PLL_INIT()
Definition: Ifx_Ssw_Tc0.c:77
Ifx_Ssw_Infra.h
Startup Software support functions.
Ifx_Ssw_disableSafetyWatchdog
void Ifx_Ssw_disableSafetyWatchdog(unsigned short password)
Disable Safety Watchdog functionality.
Definition: Ifx_Ssw_Infra.c:126
IFX_CFG_SSW_ENABLE_TRICORE0_DCACHE
#define IFX_CFG_SSW_ENABLE_TRICORE0_DCACHE
Definition: Ifx_Ssw_Tc0.c:57
Ifx_Ssw_enableSafetyWatchdog
void Ifx_Ssw_enableSafetyWatchdog(unsigned short password)
Enable Safety Watchdog functionality.
Definition: Ifx_Ssw_Infra.c:134
Ifx_Ssw_isApplicationReset
IFX_SSW_INLINE unsigned char Ifx_Ssw_isApplicationReset(void)
Definition: Ifx_Ssw_Infra.h:455
IFX_SSW_COMMON_LINKER_SYMBOLS
IFX_SSW_COMMON_LINKER_SYMBOLS()
IFX_CFG_SSW_CALLOUT_PMS_INIT
#define IFX_CFG_SSW_CALLOUT_PMS_INIT()
Definition: Ifx_Ssw_Tc0.c:61
IFX_CFG_SSW_PSW_DEFAULT
#define IFX_CFG_SSW_PSW_DEFAULT
Definition: Ifx_Ssw.h:72
__SDATA4
#define __SDATA4(cpu)
Definition: CompilerDcc.h:93
IFX_SSW_CORE_LINKER_SYMBOLS
IFX_SSW_CORE_LINKER_SYMBOLS(0)
Ifx_Ssw_setCpuEndinitInline
IFX_SSW_INLINE void Ifx_Ssw_setCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, unsigned short password)
Definition: Ifx_Ssw_Infra.h:400
Ifx_Ssw_serviceCpuWatchdog
void Ifx_Ssw_serviceCpuWatchdog(Ifx_SCU_WDTCPU *watchdog, unsigned short password)
SCUWDT API to service CPU Watchdog functionality.
Definition: Ifx_Ssw_Infra.c:84
Ifx_Ssw_ISYNC
void Ifx_Ssw_ISYNC(void) __attribute__((intrinsic_function(0x103


iLLD_TC38A: Ifx_Ssw_Tc1.c Source File

  • Infra
  • Ssw
  • TC38A
  • Tricore
Ifx_Ssw_Tc1.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_Ssw_Tc1.c
3 * \brief Startup Software for Core1
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /*******************************************************************************
43 ** Includes **
44 *******************************************************************************/
45 #include "Ifx_Cfg.h"
46 #include "Ifx_Ssw.h"
47 #include "Ifx_Ssw_Infra.h"
48
49 #include "IfxScu_reg.h"
50 #include "IfxStm_reg.h"
51
52 /******************************************************************************/
53 /* Macros */
54 /******************************************************************************/
55 /** \brief Configuration for cache enable.
56 *
57 */
58 #ifndef IFX_CFG_SSW_ENABLE_TRICORE1_PCACHE
59 # define IFX_CFG_SSW_ENABLE_TRICORE1_PCACHE (1U) /**< Program Cache enabled by default*/
60 #endif
61 #ifndef IFX_CFG_SSW_ENABLE_TRICORE1_DCACHE
62 # define IFX_CFG_SSW_ENABLE_TRICORE1_DCACHE (1U) /**< Data Cache enabled by default*/
63 #endif
64 /*******************************************************************************
65 ** Imported Function Declarations **
66 *******************************************************************************/
67 IFX_SSW_COMMON_LINKER_SYMBOLS();
68 IFX_SSW_CORE_LINKER_SYMBOLS(1);
69
70 extern void core1_main(void);
71 #if defined(__TASKING__)
72 __asm("\t .extern core1_main");
73 #endif
74
75 /*******************************************************************************
76 ** Private Constant Definitions **
77 *******************************************************************************/
78
79 /*********************************************************************************
80 * - startup code
81 *********************************************************************************/
82 /*Add options to eliminate usage of stack pointers unnecessarily*/
83 #if defined(__HIGHTEC__)
84 #pragma GCC optimize "O2"
85 #endif
86
87 void __Core1_start(void)
88 {
89 unsigned int stmCount;
90 unsigned int stmCountBegin = STM0_TIM0.U; /* it is necessary to get this value to have minimum 100uS delay in subsequent CPU start */
91 unsigned short wdtPassword = Ifx_Ssw_getCpuWatchdogPasswordInline(&MODULE_SCU.WDTCPU[1]);
92
93 /* Load user stack pointer */
94 Ifx_Ssw_setAddressReg(sp, __USTACK(1));
95 Ifx_Ssw_DSYNC();
96
97 /* Set the PSW to its reset value in case of a warm start,clear PSW.IS */
98 Ifx_Ssw_MTCR(CPU_PSW, IFX_CFG_SSW_PSW_DEFAULT);
99
100 /* Clear the ENDINIT bit in the WDT_CON0 register, inline function */
101 Ifx_Ssw_clearCpuEndinitInline(&MODULE_SCU.WDTCPU[1], wdtPassword);
102
103 {
104 Ifx_CPU_PCON0 pcon0;
105 pcon0.U = 0;
106 pcon0.B.PCBYP = IFX_CFG_SSW_ENABLE_TRICORE1_PCACHE ? 0 : 1; /*depending on the enable bypass bit is reset/set */
107 Ifx_Ssw_MTCR(CPU_PCON0, pcon0.U);
108 Ifx_Ssw_ISYNC();
109 }
110
111 {
112 Ifx_CPU_DCON0 dcon0;
113 dcon0.U = 0;
114 dcon0.B.DCBYP = IFX_CFG_SSW_ENABLE_TRICORE1_DCACHE ? 0 : 1; /*depending on the enable bypass bit is reset/set */
115 Ifx_Ssw_MTCR(CPU_DCON0, dcon0.U);
116 Ifx_Ssw_ISYNC();
117 }
118
119 /* Load Base Address of Trap Vector Table. */
120 Ifx_Ssw_MTCR(CPU_BTV, (unsigned int)__TRAPTAB(1));
121
122 /* Load Base Address of Interrupt Vector Table. we will do this later in the program */
123 Ifx_Ssw_MTCR(CPU_BIV, (unsigned int)__INTTAB(1));
124
125 /* Load interrupt stack pointer. */
126 Ifx_Ssw_MTCR(CPU_ISP, (unsigned int)__ISTACK(1));
127
128 Ifx_Ssw_setCpuEndinitInline(&MODULE_SCU.WDTCPU[1], wdtPassword);
129
130 /* initialize SDA base pointers */
131 Ifx_Ssw_setAddressReg(a0, __SDATA1(1));
132 Ifx_Ssw_setAddressReg(a1, __SDATA2(1));
133 Ifx_Ssw_setAddressReg(a8, __SDATA3(1));
134 Ifx_Ssw_setAddressReg(a9, __SDATA4(1));
135
136 Ifx_Ssw_initCSA((unsigned int *)__CSA(1), (unsigned int *)__CSA_END(1));
137
138 /* Clears any instruction buffer */
139 Ifx_Ssw_ISYNC();
140
141 stmCount = (unsigned int)(Ifx_Ssw_getStmFrequency() * IFX_CFG_SSW_STARTCPU_WAIT_TIME_IN_SECONDS);
142
143 while ((unsigned int)(STM0_TIM0.U - stmCountBegin) < stmCount)
144 {
145 /* There is no need to check overflow of the STM timer.
146 * When counter after overflow subtracted with counter before overflow,
147 * the subtraction result will be as expected, as long as both are unsigned 32 bits
148 * eg: stmCountBegin= 0xFFFFFFFE (before overflow)
149 * stmCountNow = 0x00000002 (before overflow)
150 * diff= stmCountNow - stmCountBegin = 4 as expected.*/
151 }
152
153 /*Start remaining cores down the line in a daisy-chain fashion*/
154 #if (IFX_CFG_SSW_ENABLE_TRICORE2 != 0)
155 (void)Ifx_Ssw_startCore(&MODULE_CPU2, (unsigned int)__START(2)); /*The status returned by function call is ignored */
156 #endif
157 #if (IFX_CFG_SSW_ENABLE_TRICORE2 == 0)
158 #if (IFX_CFG_SSW_ENABLE_TRICORE3 != 0)
159 (void)Ifx_Ssw_startCore(&MODULE_CPU3, (unsigned int)__START(3)); /*The status returned by function call is ignored */
160 #endif
161 #endif /* #if (IFX_CFG_SSW_ENABLE_TRICORE2 == 0) */
162
163 /*Initialize CPU Private Global Variables*/
164 //TODO : This implementation is done once all compilers support this
165 #if (IFX_CFG_SSW_ENABLE_INDIVIDUAL_C_INIT != 0)
166 (void)Ifx_Ssw_C_Init();
167 #endif
168
169 /*Call main function of Cpu1 */
170 Ifx_Ssw_jumpToFunction(core1_main);
171 }
172
173 /******************************************************************************
174 * reset vector address *
175 *****************************************************************************/
176 #if defined(__HIGHTEC__)
177 #pragma section
178 #pragma section ".start_cpu1" x
179 #endif
180 #if defined(__TASKING__)
181 #pragma protect on
182 #pragma section code "start_cpu1"
183 #endif
184 #if defined(__DCC__)
185 #pragma section CODE ".start_cpu1" X
186 #endif
187 #if defined(__ghs__)
188 #pragma ghs section text=".start_cpu1"
189 #endif
190
191 void _START1(void)
192 {
193 Ifx_Ssw_jumpToFunction(__Core1_start);
194 }
195
196 /* reset the sections defined above, to normal region */
197 #if defined(__HIGHTEC__)
198 #pragma section
199 #endif
200 #if defined(__TASKING__)
201 #pragma protect restore
202 #pragma section code restore
203 #endif
204 #if defined(__DCC__)
205 #pragma section CODE
206 #endif
207 #if defined(__ghs__)
208 #pragma ghs section text=default
209 #endif
210
211 /*Restore the options to command line provided ones*/
212 #if defined(__HIGHTEC__)
213 #pragma GCC reset_options
214 #endif
__ISTACK
#define __ISTACK(cpu)
Definition: CompilerDcc.h:71
Ifx_Ssw_MTCR
void Ifx_Ssw_MTCR(const unsigned int, unsigned int) __attribute__((intrinsic_function(0x102
Ifx_Ssw_setAddressReg
#define Ifx_Ssw_setAddressReg(regNum, val)
Definition: Ifx_Ssw_CompilersDcc.h:155
__SDATA3
#define __SDATA3(cpu)
Definition: CompilerDcc.h:92
Ifx_Ssw_DSYNC
void Ifx_Ssw_DSYNC(void) __attribute__((intrinsic_function(0x103
Ifx_Ssw_initCSA
IFX_SSW_INLINE void Ifx_Ssw_initCSA(unsigned int *csaBegin, unsigned int *csaEnd)
Definition: Ifx_Ssw_Infra.h:502
__SDATA2
#define __SDATA2(cpu)
Definition: CompilerDcc.h:91
__CSA
#define __CSA(cpu)
Definition: CompilerDcc.h:74
__CSA_END
#define __CSA_END(cpu)
Definition: CompilerDcc.h:75
IFX_CFG_SSW_ENABLE_TRICORE1_PCACHE
#define IFX_CFG_SSW_ENABLE_TRICORE1_PCACHE
Configuration for cache enable.
Definition: Ifx_Ssw_Tc1.c:59
Ifx_Ssw_C_Init
void Ifx_Ssw_C_Init(void)
Initialise the C runtime environment.
Definition: Ifx_Ssw_Infra.c:198
Ifx_Ssw_getCpuWatchdogPasswordInline
IFX_SSW_INLINE unsigned short Ifx_Ssw_getCpuWatchdogPasswordInline(Ifx_SCU_WDTCPU *watchdog)
Definition: Ifx_Ssw_Infra.h:327
__USTACK
#define __USTACK(cpu)
Definition: CompilerDcc.h:70
IFX_SSW_COMMON_LINKER_SYMBOLS
IFX_SSW_COMMON_LINKER_SYMBOLS()
core1_main
void core1_main(void)
Ifx_Ssw.h
Startup Software configuration. Can configure which core to be enabled.
IFX_SSW_CORE_LINKER_SYMBOLS
IFX_SSW_CORE_LINKER_SYMBOLS(1)
__INTTAB
#define __INTTAB(cpu)
Definition: CompilerDcc.h:85
Ifx_Ssw_jumpToFunction
asm volatile void Ifx_Ssw_jumpToFunction(void *fun)
Definition: Ifx_Ssw_CompilersDcc.h:170
__SDATA1
#define __SDATA1(cpu)
Definition: CompilerDcc.h:90
__Core1_start
void __Core1_start(void)
Definition: Ifx_Ssw_Tc1.c:87
Ifx_Ssw_startCore
void Ifx_Ssw_startCore(Ifx_CPU *cpu, unsigned int programCounter)
Set the program counter for the CPU specified and start the CPU.
Definition: Ifx_Ssw_Infra.c:142
__TRAPTAB
#define __TRAPTAB(cpu)
Definition: CompilerDcc.h:88
__START
#define __START(cpu)
Definition: Ifx_Ssw_CompilersDcc.h:80
Ifx_Ssw_clearCpuEndinitInline
IFX_SSW_INLINE void Ifx_Ssw_clearCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, unsigned short password)
Definition: Ifx_Ssw_Infra.h:356
_START1
void _START1(void)
Definition: Ifx_Ssw_Tc1.c:191
Ifx_Ssw_Infra.h
Startup Software support functions.
IFX_CFG_SSW_ENABLE_TRICORE1_DCACHE
#define IFX_CFG_SSW_ENABLE_TRICORE1_DCACHE
Definition: Ifx_Ssw_Tc1.c:62
Ifx_Ssw_getStmFrequency
float Ifx_Ssw_getStmFrequency(void)
Returns the system timer frequency.
Definition: Ifx_Ssw_Infra.c:170
IFX_CFG_SSW_PSW_DEFAULT
#define IFX_CFG_SSW_PSW_DEFAULT
Definition: Ifx_Ssw.h:72
__SDATA4
#define __SDATA4(cpu)
Definition: CompilerDcc.h:93
Ifx_Ssw_setCpuEndinitInline
IFX_SSW_INLINE void Ifx_Ssw_setCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, unsigned short password)
Definition: Ifx_Ssw_Infra.h:400
Ifx_Ssw_ISYNC
void Ifx_Ssw_ISYNC(void) __attribute__((intrinsic_function(0x103
IFX_CFG_SSW_STARTCPU_WAIT_TIME_IN_SECONDS
#define IFX_CFG_SSW_STARTCPU_WAIT_TIME_IN_SECONDS
Definition: Ifx_Ssw_Infra.h:102


iLLD_TC38A: Ifx_Ssw_Tc2.c Source File

  • Infra
  • Ssw
  • TC38A
  • Tricore
Ifx_Ssw_Tc2.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_Ssw_Tc2.c
3 * \brief Startup Software for Core2
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /*******************************************************************************
43 ** Includes **
44 *******************************************************************************/
45 #include "Ifx_Cfg.h"
46 #include "Ifx_Ssw.h"
47 #include "Ifx_Ssw_Infra.h"
48
49 #include "IfxScu_reg.h"
50 #include "IfxStm_reg.h"
51
52 /******************************************************************************/
53 /* Macros */
54 /******************************************************************************/
55 /** \brief Configuration for cache enable.
56 *
57 */
58 #ifndef IFX_CFG_SSW_ENABLE_TRICORE2_PCACHE
59 # define IFX_CFG_SSW_ENABLE_TRICORE2_PCACHE (1U) /**< Program Cache enabled by default*/
60 #endif
61 #ifndef IFX_CFG_SSW_ENABLE_TRICORE2_DCACHE
62 # define IFX_CFG_SSW_ENABLE_TRICORE2_DCACHE (1U) /**< Data Cache enabled by default*/
63 #endif
64 /*******************************************************************************
65 ** Imported Function Declarations **
66 *******************************************************************************/
67 IFX_SSW_COMMON_LINKER_SYMBOLS();
68 IFX_SSW_CORE_LINKER_SYMBOLS(2);
69
70 extern void core2_main(void);
71 #if defined(__TASKING__)
72 __asm("\t .extern core2_main");
73 #endif
74
75 /*******************************************************************************
76 ** Private Constant Definitions **
77 *******************************************************************************/
78
79 /*********************************************************************************
80 * - startup code
81 *********************************************************************************/
82 /*Add options to eliminate usage of stack pointers unnecessarily*/
83 #if defined(__HIGHTEC__)
84 #pragma GCC optimize "O2"
85 #endif
86
87 void __Core2_start(void)
88 {
89 unsigned int stmCount;
90 unsigned int stmCountBegin = STM0_TIM0.U; /* it is necessary to get this value to have minimum 100uS delay in subsequent CPU start */
91 unsigned short wdtPassword = Ifx_Ssw_getCpuWatchdogPasswordInline(&MODULE_SCU.WDTCPU[2]);
92
93 /* Load user stack pointer */
94 Ifx_Ssw_setAddressReg(sp, __USTACK(2));
95 Ifx_Ssw_DSYNC();
96
97 /* Set the PSW to its reset value in case of a warm start,clear PSW.IS */
98 Ifx_Ssw_MTCR(CPU_PSW, IFX_CFG_SSW_PSW_DEFAULT);
99
100 /* Clear the ENDINIT bit in the WDT_CON0 register, inline function */
101 Ifx_Ssw_clearCpuEndinitInline(&MODULE_SCU.WDTCPU[2], wdtPassword);
102
103 {
104 Ifx_CPU_PCON0 pcon0;
105 pcon0.U = 0;
106 pcon0.B.PCBYP = IFX_CFG_SSW_ENABLE_TRICORE2_PCACHE ? 0 : 1; /*depending on the enable bypass bit is reset/set */
107 Ifx_Ssw_MTCR(CPU_PCON0, pcon0.U);
108 Ifx_Ssw_ISYNC();
109 }
110
111 {
112 Ifx_CPU_DCON0 dcon0;
113 dcon0.U = 0;
114 dcon0.B.DCBYP = IFX_CFG_SSW_ENABLE_TRICORE2_DCACHE ? 0 : 1; /*depending on the enable bypass bit is reset/set */
115 Ifx_Ssw_MTCR(CPU_DCON0, dcon0.U);
116 Ifx_Ssw_ISYNC();
117 }
118
119 /* Load Base Address of Trap Vector Table. */
120 Ifx_Ssw_MTCR(CPU_BTV, (unsigned int)__TRAPTAB(2));
121
122 /* Load Base Address of Interrupt Vector Table. we will do this later in the program */
123 Ifx_Ssw_MTCR(CPU_BIV, (unsigned int)__INTTAB(2));
124
125 /* Load interrupt stack pointer. */
126 Ifx_Ssw_MTCR(CPU_ISP, (unsigned int)__ISTACK(2));
127
128 Ifx_Ssw_setCpuEndinitInline(&MODULE_SCU.WDTCPU[2], wdtPassword);
129
130 /* initialize SDA base pointers */
131 Ifx_Ssw_setAddressReg(a0, __SDATA1(2));
132 Ifx_Ssw_setAddressReg(a1, __SDATA2(2));
133 Ifx_Ssw_setAddressReg(a8, __SDATA3(2));
134 Ifx_Ssw_setAddressReg(a9, __SDATA4(2));
135
136 Ifx_Ssw_initCSA((unsigned int *)__CSA(2), (unsigned int *)__CSA_END(2));
137
138 /* Clears any instruction buffer */
139 Ifx_Ssw_ISYNC();
140
141 stmCount = (unsigned int)(Ifx_Ssw_getStmFrequency() * IFX_CFG_SSW_STARTCPU_WAIT_TIME_IN_SECONDS);
142
143 while ((unsigned int)(STM0_TIM0.U - stmCountBegin) < stmCount)
144 {
145 /* There is no need to check overflow of the STM timer.
146 * When counter after overflow subtracted with counter before overflow,
147 * the subtraction result will be as expected, as long as both are unsigned 32 bits
148 * eg: stmCountBegin= 0xFFFFFFFE (before overflow)
149 * stmCountNow = 0x00000002 (before overflow)
150 * diff= stmCountNow - stmCountBegin = 4 as expected.*/
151 }
152
153 /*Start remaining cores down the line in a daisy-chain fashion*/
154 #if (IFX_CFG_SSW_ENABLE_TRICORE3 != 0)
155 (void)Ifx_Ssw_startCore(&MODULE_CPU3, (unsigned int)__START(3)); /*The status returned by function call is ignored */
156 #endif
157
158 /*Initialize CPU Private Global Variables*/
159 //TODO : This implementation is done once all compilers support this
160 #if (IFX_CFG_SSW_ENABLE_INDIVIDUAL_C_INIT != 0)
161 (void)Ifx_Ssw_C_Init();
162 #endif
163
164 /*Call main function of Cpu2 */
165 Ifx_Ssw_jumpToFunction(core2_main);
166 }
167
168 /******************************************************************************
169 * reset vector address *
170 *****************************************************************************/
171 #if defined(__HIGHTEC__)
172 #pragma section
173 #pragma section ".start_cpu2" x
174 #endif
175 #if defined(__TASKING__)
176 #pragma protect on
177 #pragma section code "start_cpu2"
178 #endif
179 #if defined(__DCC__)
180 #pragma section CODE ".start_cpu2" X
181 #endif
182 #if defined(__ghs__)
183 #pragma ghs section text=".start_cpu2"
184 #endif
185
186 void _START2(void)
187 {
188 Ifx_Ssw_jumpToFunction(__Core2_start);
189 }
190
191 /* reset the sections defined above, to normal region */
192 #if defined(__HIGHTEC__)
193 #pragma section
194 #endif
195 #if defined(__TASKING__)
196 #pragma protect restore
197 #pragma section code restore
198 #endif
199 #if defined(__DCC__)
200 #pragma section CODE
201 #endif
202 #if defined(__ghs__)
203 #pragma ghs section text=default
204 #endif
205
206 /*Restore the options to command line provided ones*/
207 #if defined(__HIGHTEC__)
208 #pragma GCC reset_options
209 #endif
_START2
void _START2(void)
Definition: Ifx_Ssw_Tc2.c:186
__ISTACK
#define __ISTACK(cpu)
Definition: CompilerDcc.h:71
Ifx_Ssw_MTCR
void Ifx_Ssw_MTCR(const unsigned int, unsigned int) __attribute__((intrinsic_function(0x102
Ifx_Ssw_setAddressReg
#define Ifx_Ssw_setAddressReg(regNum, val)
Definition: Ifx_Ssw_CompilersDcc.h:155
__SDATA3
#define __SDATA3(cpu)
Definition: CompilerDcc.h:92
Ifx_Ssw_DSYNC
void Ifx_Ssw_DSYNC(void) __attribute__((intrinsic_function(0x103
Ifx_Ssw_initCSA
IFX_SSW_INLINE void Ifx_Ssw_initCSA(unsigned int *csaBegin, unsigned int *csaEnd)
Definition: Ifx_Ssw_Infra.h:502
__SDATA2
#define __SDATA2(cpu)
Definition: CompilerDcc.h:91
__CSA
#define __CSA(cpu)
Definition: CompilerDcc.h:74
__CSA_END
#define __CSA_END(cpu)
Definition: CompilerDcc.h:75
Ifx_Ssw_C_Init
void Ifx_Ssw_C_Init(void)
Initialise the C runtime environment.
Definition: Ifx_Ssw_Infra.c:198
Ifx_Ssw_getCpuWatchdogPasswordInline
IFX_SSW_INLINE unsigned short Ifx_Ssw_getCpuWatchdogPasswordInline(Ifx_SCU_WDTCPU *watchdog)
Definition: Ifx_Ssw_Infra.h:327
__USTACK
#define __USTACK(cpu)
Definition: CompilerDcc.h:70
IFX_CFG_SSW_ENABLE_TRICORE2_PCACHE
#define IFX_CFG_SSW_ENABLE_TRICORE2_PCACHE
Configuration for cache enable.
Definition: Ifx_Ssw_Tc2.c:59
core2_main
void core2_main(void)
IFX_SSW_COMMON_LINKER_SYMBOLS
IFX_SSW_COMMON_LINKER_SYMBOLS()
Ifx_Ssw.h
Startup Software configuration. Can configure which core to be enabled.
__Core2_start
void __Core2_start(void)
Definition: Ifx_Ssw_Tc2.c:87
__INTTAB
#define __INTTAB(cpu)
Definition: CompilerDcc.h:85
Ifx_Ssw_jumpToFunction
asm volatile void Ifx_Ssw_jumpToFunction(void *fun)
Definition: Ifx_Ssw_CompilersDcc.h:170
__SDATA1
#define __SDATA1(cpu)
Definition: CompilerDcc.h:90
Ifx_Ssw_startCore
void Ifx_Ssw_startCore(Ifx_CPU *cpu, unsigned int programCounter)
Set the program counter for the CPU specified and start the CPU.
Definition: Ifx_Ssw_Infra.c:142
__TRAPTAB
#define __TRAPTAB(cpu)
Definition: CompilerDcc.h:88
IFX_CFG_SSW_ENABLE_TRICORE2_DCACHE
#define IFX_CFG_SSW_ENABLE_TRICORE2_DCACHE
Definition: Ifx_Ssw_Tc2.c:62
__START
#define __START(cpu)
Definition: Ifx_Ssw_CompilersDcc.h:80
Ifx_Ssw_clearCpuEndinitInline
IFX_SSW_INLINE void Ifx_Ssw_clearCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, unsigned short password)
Definition: Ifx_Ssw_Infra.h:356
Ifx_Ssw_Infra.h
Startup Software support functions.
IFX_SSW_CORE_LINKER_SYMBOLS
IFX_SSW_CORE_LINKER_SYMBOLS(2)
Ifx_Ssw_getStmFrequency
float Ifx_Ssw_getStmFrequency(void)
Returns the system timer frequency.
Definition: Ifx_Ssw_Infra.c:170
IFX_CFG_SSW_PSW_DEFAULT
#define IFX_CFG_SSW_PSW_DEFAULT
Definition: Ifx_Ssw.h:72
__SDATA4
#define __SDATA4(cpu)
Definition: CompilerDcc.h:93
Ifx_Ssw_setCpuEndinitInline
IFX_SSW_INLINE void Ifx_Ssw_setCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, unsigned short password)
Definition: Ifx_Ssw_Infra.h:400
Ifx_Ssw_ISYNC
void Ifx_Ssw_ISYNC(void) __attribute__((intrinsic_function(0x103
IFX_CFG_SSW_STARTCPU_WAIT_TIME_IN_SECONDS
#define IFX_CFG_SSW_STARTCPU_WAIT_TIME_IN_SECONDS
Definition: Ifx_Ssw_Infra.h:102


iLLD_TC38A: Ifx_Ssw_Tc3.c Source File

  • Infra
  • Ssw
  • TC38A
  • Tricore
Ifx_Ssw_Tc3.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_Ssw_Tc3.c
3 * \brief Startup Software for Core3
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /*******************************************************************************
43 ** Includes **
44 *******************************************************************************/
45 #include "Ifx_Cfg.h"
46 #include "Ifx_Ssw.h"
47 #include "Ifx_Ssw_Infra.h"
48
49 #include "IfxScu_reg.h"
50 #include "IfxStm_reg.h"
51
52 /******************************************************************************/
53 /* Macros */
54 /******************************************************************************/
55 /** \brief Configuration for cache enable.
56 *
57 */
58 #ifndef IFX_CFG_SSW_ENABLE_TRICORE3_PCACHE
59 # define IFX_CFG_SSW_ENABLE_TRICORE3_PCACHE (1U) /**< Program Cache enabled by default*/
60 #endif
61 #ifndef IFX_CFG_SSW_ENABLE_TRICORE3_DCACHE
62 # define IFX_CFG_SSW_ENABLE_TRICORE3_DCACHE (1U) /**< Data Cache enabled by default*/
63 #endif
64 /*******************************************************************************
65 ** Imported Function Declarations **
66 *******************************************************************************/
67 IFX_SSW_COMMON_LINKER_SYMBOLS();
68 IFX_SSW_CORE_LINKER_SYMBOLS(3);
69
70 extern void core3_main(void);
71 #if defined(__TASKING__)
72 __asm("\t .extern core3_main");
73 #endif
74
75 /*******************************************************************************
76 ** Private Constant Definitions **
77 *******************************************************************************/
78
79 /*********************************************************************************
80 * - startup code
81 *********************************************************************************/
82 /*Add options to eliminate usage of stack pointers unnecessarily*/
83 #if defined(__HIGHTEC__)
84 #pragma GCC optimize "O2"
85 #endif
86
87 void __Core3_start(void)
88 {
89 unsigned int stmCount;
90 unsigned int stmCountBegin = STM0_TIM0.U; /* it is necessary to get this value to have minimum 100uS delay in subsequent CPU start */
91 unsigned short wdtPassword = Ifx_Ssw_getCpuWatchdogPasswordInline(&MODULE_SCU.WDTCPU[3]);
92
93 /* Load user stack pointer */
94 Ifx_Ssw_setAddressReg(sp, __USTACK(3));
95 Ifx_Ssw_DSYNC();
96
97 /* Set the PSW to its reset value in case of a warm start,clear PSW.IS */
98 Ifx_Ssw_MTCR(CPU_PSW, IFX_CFG_SSW_PSW_DEFAULT);
99
100 /* Clear the ENDINIT bit in the WDT_CON0 register, inline function */
101 Ifx_Ssw_clearCpuEndinitInline(&MODULE_SCU.WDTCPU[3], wdtPassword);
102
103 {
104 Ifx_CPU_PCON0 pcon0;
105 pcon0.U = 0;
106 pcon0.B.PCBYP = IFX_CFG_SSW_ENABLE_TRICORE3_PCACHE ? 0 : 1; /*depending on the enable bypass bit is reset/set */
107 Ifx_Ssw_MTCR(CPU_PCON0, pcon0.U);
108 Ifx_Ssw_ISYNC();
109 }
110
111 {
112 Ifx_CPU_DCON0 dcon0;
113 dcon0.U = 0;
114 dcon0.B.DCBYP = IFX_CFG_SSW_ENABLE_TRICORE3_DCACHE ? 0 : 1; /*depending on the enable bypass bit is reset/set */
115 Ifx_Ssw_MTCR(CPU_DCON0, dcon0.U);
116 Ifx_Ssw_ISYNC();
117 }
118
119 /* Load Base Address of Trap Vector Table. */
120 Ifx_Ssw_MTCR(CPU_BTV, (unsigned int)__TRAPTAB(3));
121
122 /* Load Base Address of Interrupt Vector Table. we will do this later in the program */
123 Ifx_Ssw_MTCR(CPU_BIV, (unsigned int)__INTTAB(3));
124
125 /* Load interrupt stack pointer. */
126 Ifx_Ssw_MTCR(CPU_ISP, (unsigned int)__ISTACK(3));
127
128 Ifx_Ssw_setCpuEndinitInline(&MODULE_SCU.WDTCPU[3], wdtPassword);
129
130 /* initialize SDA base pointers */
131 Ifx_Ssw_setAddressReg(a0, __SDATA1(3));
132 Ifx_Ssw_setAddressReg(a1, __SDATA2(3));
133 Ifx_Ssw_setAddressReg(a8, __SDATA3(3));
134 Ifx_Ssw_setAddressReg(a9, __SDATA4(3));
135
136 Ifx_Ssw_initCSA((unsigned int *)__CSA(3), (unsigned int *)__CSA_END(3));
137
138 /* Clears any instruction buffer */
139 Ifx_Ssw_ISYNC();
140
141 stmCount = (unsigned int)(Ifx_Ssw_getStmFrequency() * IFX_CFG_SSW_STARTCPU_WAIT_TIME_IN_SECONDS);
142
143 while ((unsigned int)(STM0_TIM0.U - stmCountBegin) < stmCount)
144 {
145 /* There is no need to check overflow of the STM timer.
146 * When counter after overflow subtracted with counter before overflow,
147 * the subtraction result will be as expected, as long as both are unsigned 32 bits
148 * eg: stmCountBegin= 0xFFFFFFFE (before overflow)
149 * stmCountNow = 0x00000002 (before overflow)
150 * diff= stmCountNow - stmCountBegin = 4 as expected.*/
151 }
152
153 /*Initialize CPU Private Global Variables*/
154 //TODO : This implementation is done once all compilers support this
155 #if (IFX_CFG_SSW_ENABLE_INDIVIDUAL_C_INIT != 0)
156 (void)Ifx_Ssw_C_Init();
157 #endif
158
159 /*Call main function of Cpu3 */
160 Ifx_Ssw_jumpToFunction(core3_main);
161 }
162
163 /******************************************************************************
164 * reset vector address *
165 *****************************************************************************/
166 #if defined(__HIGHTEC__)
167 #pragma section
168 #pragma section ".start_cpu3" x
169 #endif
170 #if defined(__TASKING__)
171 #pragma protect on
172 #pragma section code "start_cpu3"
173 #endif
174 #if defined(__DCC__)
175 #pragma section CODE ".start_cpu3" X
176 #endif
177 #if defined(__ghs__)
178 #pragma ghs section text=".start_cpu3"
179 #endif
180
181 void _START3(void)
182 {
183 Ifx_Ssw_jumpToFunction(__Core3_start);
184 }
185
186 /* reset the sections defined above, to normal region */
187 #if defined(__HIGHTEC__)
188 #pragma section
189 #endif
190 #if defined(__TASKING__)
191 #pragma protect restore
192 #pragma section code restore
193 #endif
194 #if defined(__DCC__)
195 #pragma section CODE
196 #endif
197 #if defined(__ghs__)
198 #pragma ghs section text=default
199 #endif
200
201 /*Restore the options to command line provided ones*/
202 #if defined(__HIGHTEC__)
203 #pragma GCC reset_options
204 #endif
__ISTACK
#define __ISTACK(cpu)
Definition: CompilerDcc.h:71
Ifx_Ssw_MTCR
void Ifx_Ssw_MTCR(const unsigned int, unsigned int) __attribute__((intrinsic_function(0x102
Ifx_Ssw_setAddressReg
#define Ifx_Ssw_setAddressReg(regNum, val)
Definition: Ifx_Ssw_CompilersDcc.h:155
__SDATA3
#define __SDATA3(cpu)
Definition: CompilerDcc.h:92
Ifx_Ssw_DSYNC
void Ifx_Ssw_DSYNC(void) __attribute__((intrinsic_function(0x103
Ifx_Ssw_initCSA
IFX_SSW_INLINE void Ifx_Ssw_initCSA(unsigned int *csaBegin, unsigned int *csaEnd)
Definition: Ifx_Ssw_Infra.h:502
__SDATA2
#define __SDATA2(cpu)
Definition: CompilerDcc.h:91
__CSA
#define __CSA(cpu)
Definition: CompilerDcc.h:74
__CSA_END
#define __CSA_END(cpu)
Definition: CompilerDcc.h:75
Ifx_Ssw_C_Init
void Ifx_Ssw_C_Init(void)
Initialise the C runtime environment.
Definition: Ifx_Ssw_Infra.c:198
IFX_SSW_CORE_LINKER_SYMBOLS
IFX_SSW_CORE_LINKER_SYMBOLS(3)
core3_main
void core3_main(void)
Ifx_Ssw_getCpuWatchdogPasswordInline
IFX_SSW_INLINE unsigned short Ifx_Ssw_getCpuWatchdogPasswordInline(Ifx_SCU_WDTCPU *watchdog)
Definition: Ifx_Ssw_Infra.h:327
__USTACK
#define __USTACK(cpu)
Definition: CompilerDcc.h:70
Ifx_Ssw.h
Startup Software configuration. Can configure which core to be enabled.
__INTTAB
#define __INTTAB(cpu)
Definition: CompilerDcc.h:85
Ifx_Ssw_jumpToFunction
asm volatile void Ifx_Ssw_jumpToFunction(void *fun)
Definition: Ifx_Ssw_CompilersDcc.h:170
__SDATA1
#define __SDATA1(cpu)
Definition: CompilerDcc.h:90
__TRAPTAB
#define __TRAPTAB(cpu)
Definition: CompilerDcc.h:88
IFX_CFG_SSW_ENABLE_TRICORE3_PCACHE
#define IFX_CFG_SSW_ENABLE_TRICORE3_PCACHE
Configuration for cache enable.
Definition: Ifx_Ssw_Tc3.c:59
Ifx_Ssw_clearCpuEndinitInline
IFX_SSW_INLINE void Ifx_Ssw_clearCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, unsigned short password)
Definition: Ifx_Ssw_Infra.h:356
IFX_CFG_SSW_ENABLE_TRICORE3_DCACHE
#define IFX_CFG_SSW_ENABLE_TRICORE3_DCACHE
Definition: Ifx_Ssw_Tc3.c:62
Ifx_Ssw_Infra.h
Startup Software support functions.
_START3
void _START3(void)
Definition: Ifx_Ssw_Tc3.c:181
IFX_SSW_COMMON_LINKER_SYMBOLS
IFX_SSW_COMMON_LINKER_SYMBOLS()
Ifx_Ssw_getStmFrequency
float Ifx_Ssw_getStmFrequency(void)
Returns the system timer frequency.
Definition: Ifx_Ssw_Infra.c:170
IFX_CFG_SSW_PSW_DEFAULT
#define IFX_CFG_SSW_PSW_DEFAULT
Definition: Ifx_Ssw.h:72
__SDATA4
#define __SDATA4(cpu)
Definition: CompilerDcc.h:93
__Core3_start
void __Core3_start(void)
Definition: Ifx_Ssw_Tc3.c:87
Ifx_Ssw_setCpuEndinitInline
IFX_SSW_INLINE void Ifx_Ssw_setCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, unsigned short password)
Definition: Ifx_Ssw_Infra.h:400
Ifx_Ssw_ISYNC
void Ifx_Ssw_ISYNC(void) __attribute__((intrinsic_function(0x103
IFX_CFG_SSW_STARTCPU_WAIT_TIME_IN_SECONDS
#define IFX_CFG_SSW_STARTCPU_WAIT_TIME_IN_SECONDS
Definition: Ifx_Ssw_Infra.h:102


iLLD_TC38A: Ifx_Types.h Source File

  • Cpu
  • Std
Ifx_Types.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_Types.h
3 * \brief This files defines all types used by the IFX HAL and libraries
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 #ifndef IFX_TYPES_H
43 #define IFX_TYPES_H 1
44
45 /******************************************************************************/
46 #include "Tricore/Compilers/Compilers.h" /* mapping compiler specific keywords */
47 #include "Platform_Types.h"
48
49 /*******************************************************************************
50 ** Global Data Types **
51 ** (Types not defined by AUTOSAR) **
52 *******************************************************************************/
53 typedef const char *pchar; /**< \brief const char pointer */
54 typedef void *pvoid; /**< \brief void pointer */
55 typedef volatile void *vvoid; /**< \brief volatile void pointer */
56 typedef void (*voidfuncvoid) (void); /**< \brief void pointer which takes void argument */
57
58 typedef struct
59 {
60 float32 real; /**< \brief Real part */
61 float32 imag; /**< \brief Imaginary part */
62 } cfloat32;
63
64 typedef struct
65 {
66 sint32 real; /**< \brief Real part */
67 sint32 imag; /**< \brief Imaginary part */
68 } csint32;
69
70 typedef struct
71 {
72 sint16 real; /**< \brief Real part */
73 sint16 imag; /**< \brief Imaginary part */
74 } csint16;
75
76 typedef sint64 Ifx_TickTime; /**< \brief Time in ticks */
77 #define TIME_INFINITE ((Ifx_TickTime)0x7FFFFFFFFFFFFFFFLL)
78 #define TIME_NULL ((Ifx_TickTime)0x0000000000000000LL)
79
80 #define IFX_ONES (0xFFFFFFFFFFFFFFFFU)
81 #define IFX_ZEROS (0x0000000000000000U)
82
83
84 #if CFG_LONG_SIZE_T
85 #define IFX_SIZET_MAX (0x7FFFFFFFL)
86 typedef sint32 Ifx_SizeT; /**< \brief Type used for data stream size */
87 #else
88 #define IFX_SIZET_MAX (0x7FFF)
89 typedef sint16 Ifx_SizeT; /**< \brief Type used for data stream size */
90 #endif
91
92 /** \brief Circular buffer definition. */
93 typedef struct
94 {
95 void *base; /**< \brief buffer base address */
96 uint16 index; /**< \brief buffer current index */
97 uint16 length; /**< \brief buffer length*/
98 } Ifx_CircularBuffer;
99
100 typedef uint16 Ifx_Priority; /**< \brief Used in interrupt service priorities */
101 typedef uint32 Ifx_TimerValue; /**< \brief Used in timer values */
102 typedef sint32 Ifx_SignedTimerVal; /**< \brief Used in signed timer values */
103
104 typedef pvoid Ifx_AddressValue; /**< \brief Used in address values */
105
106 typedef struct
107 {
108 uint16 priority;
109 uint16 provider;
110 } Ifx_IsrSetting;
111
112 /** \brief Signal active state definition. */
113 typedef enum
114 {
115 Ifx_ActiveState_low = 0, /**< \brief The signal is low active */
116 Ifx_ActiveState_high = 1 /**< \brief The signal is high active */
117 } Ifx_ActiveState;
118
119 typedef enum
120 {
121 Ifx_ParityMode_even = 0,
122 Ifx_ParityMode_odd = 1
123 } Ifx_ParityMode;
124
125 /** \brief input multiplexer definition used in PinMaps
126 */
127 typedef enum
128 {
129 Ifx_RxSel_a,
130 Ifx_RxSel_b,
131 Ifx_RxSel_c,
132 Ifx_RxSel_d,
133 Ifx_RxSel_e,
134 Ifx_RxSel_f,
135 Ifx_RxSel_g,
136 Ifx_RxSel_h
137 } Ifx_RxSel;
138
139 /** \brief Module address and index map */
140 typedef struct
141 {
142 volatile void *module; /**< \brief Module address */
143 sint32 index; /**< \brief Module index */
144 } IfxModule_IndexMap;
145
146 typedef struct
147 {
148 Ifx_TickTime timestamp;
149 uint8 data;
150 }Ifx_DataBufferMode_TimeStampSingle;
151
152 /*
153 * typedef struct
154 * {
155 * Ifx_TickTime timestamp;
156 * uint8 count[1]; // Number of valid data
157 * uint8 data[7];
158 * }Ifx_DataBufferMode_TimeStampBurst;
159 */
160
161 typedef enum
162 {
163 Ifx_DataBufferMode_normal = 0, /**< \brief normal mode, each received byte is moved to the rx fifo */
164 Ifx_DataBufferMode_timeStampSingle, /**< \brief Single byte type stamp mode. The rx fifo is filled in with Ifx_DataBufferMode_TimeStampSingle items. */
165 // Ifx_DataBufferMode_timeStameBurst /**< \brief Burst byte type stamp mode. The rx fifo is filled in with Ifx_DataBufferMode_TimeStampBurst items. */
166 }Ifx_DataBufferMode;
167
168 /**
169 * Defines the PWM modes
170 *
171 * The 1st member shall start with value 0, and the next members value shall be the previous member +1
172 * pwmMode_off shall be the member with the higher index
173 * \note enum order and values should not be modified, except Ifx_Pwm_Mode_init and Ifx_Pwm_Mode_count
174 */
175 typedef enum
176 {
177 Ifx_Pwm_Mode_centerAligned = 0, /**< \brief Center aligned mode */
178 Ifx_Pwm_Mode_centerAlignedInverted = 1, /**< \brief Center aligned inverted aligned mode */
179 Ifx_Pwm_Mode_leftAligned = 2, /**< \brief Left aligned mode. The PWM period starts with a rising edge */
180 Ifx_Pwm_Mode_rightAligned = 3, /**< \brief Right aligned mode. The PWM period starts with a falling edge*/
181 Ifx_Pwm_Mode_off = 4, /**< \brief All switch open */
182 Ifx_Pwm_Mode_init = 5, /**< \brief Initialisation mode, do not use at run time */
183 Ifx_Pwm_Mode_count /**< \brief Number of defined modes */
184 } Ifx_Pwm_Mode;
185
186 #ifdef __DCC__
187 #include "Ifx_TypesDcc.h"
188
189 #elif defined(__TASKING__)
190 #include "Ifx_TypesTasking.h"
191
192 #elif defined(__HIGHTEC__)
193 #include "Ifx_TypesGnuc.h"
194
195 #elif defined(__ghs__)
196 #include "Ifx_TypesGhs.h"
197
198 #elif defined(__MSVC__)
199 #include "Ifx_TypesMsvc.h"
200 #else
201 #error Unsupported compiler.
202 #endif
203
204
205 typedef struct
206 {
207 fract real; /**< \brief Real part */
208 fract imag; /**< \brief Imaginary part */
209 } cfract;
210
211 typedef struct
212 {
213 sfract real; /**< \brief Real part */
214 sfract imag; /**< \brief Imaginary part */
215 } csfract;
216
217 #define IFX_PI (3.1415926535897932384626433832795f)
218 #define IFX_TWO_OVER_PI (2.0 / IFX_PI)
219 #define IFX_ONE_OVER_SQRT_THREE (0.57735026918962576450914878050196f)
220 #define IFX_SQRT_TWO (1.4142135623730950488016887242097f)
221 #define IFX_SQRT_THREE (1.7320508075688772935274463415059f)
222 #define IFX_UNUSED_PARAMETER(x) if(x){} /**< \brief Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(but function signature maintained for legacy purposes). Another use case being usage of intrinsics wherein the compiler ignores it and copy pastes the statements using intrinsics directly to the object file and hence usage of arguments isn't visible to it.(eg: __mfcr() etc) */
223
224 #endif /* IFX_TYPES_H */
Ifx_ActiveState_high
The signal is high active.
Definition: Ifx_Types.h:116
Ifx_Pwm_Mode
Ifx_Pwm_Mode
Definition: Ifx_Types.h:175
Ifx_SignedTimerVal
sint32 Ifx_SignedTimerVal
Used in signed timer values.
Definition: Ifx_Types.h:102
Ifx_ActiveState_low
The signal is low active.
Definition: Ifx_Types.h:115
Ifx_TickTime
sint64 Ifx_TickTime
Time in ticks.
Definition: Ifx_Types.h:76
Ifx_RxSel_e
Definition: Ifx_Types.h:133
Ifx_RxSel_d
Definition: Ifx_Types.h:132
csfract
Definition: Ifx_Types.h:211
Ifx_DataBufferMode
Ifx_DataBufferMode
Definition: Ifx_Types.h:161
Ifx_RxSel_g
Definition: Ifx_Types.h:135
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:100
Ifx_CircularBuffer::length
uint16 length
buffer length
Definition: Ifx_Types.h:97
Ifx_DataBufferMode_TimeStampSingle::data
uint8 data
Definition: Ifx_Types.h:149
sfract
short sfract
Definition: Ifx_TypesDcc.h:45
Ifx_Pwm_Mode_centerAligned
Center aligned mode.
Definition: Ifx_Types.h:177
csint32::imag
sint32 imag
Imaginary part.
Definition: Ifx_Types.h:67
uint32
unsigned long uint32
Definition: Platform_Types.h:116
Ifx_ParityMode_even
Definition: Ifx_Types.h:121
float32
float float32
Definition: Platform_Types.h:170
Ifx_DataBufferMode_normal
normal mode, each received byte is moved to the rx fifo
Definition: Ifx_Types.h:163
Ifx_RxSel_a
Definition: Ifx_Types.h:129
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
pvoid
void * pvoid
void pointer
Definition: Ifx_Types.h:54
Ifx_DataBufferMode_timeStampSingle
Single byte type stamp mode. The rx fifo is filled in with Ifx_DataBufferMode_TimeStampSingle items...
Definition: Ifx_Types.h:164
Ifx_CircularBuffer::base
void * base
buffer base address
Definition: Ifx_Types.h:95
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:113
Ifx_TypesGhs.h
Ifx_Pwm_Mode_count
Number of defined modes.
Definition: Ifx_Types.h:183
Ifx_DataBufferMode_TimeStampSingle
Definition: Ifx_Types.h:146
Ifx_RxSel_h
Definition: Ifx_Types.h:136
cfloat32::imag
float32 imag
Imaginary part.
Definition: Ifx_Types.h:61
Ifx_RxSel_b
Definition: Ifx_Types.h:130
cfloat32
Definition: Ifx_Types.h:58
sint16
short sint16
Definition: Platform_Types.h:129
Ifx_IsrSetting
Definition: Ifx_Types.h:106
fract
long fract
Definition: Ifx_TypesDcc.h:44
Ifx_Pwm_Mode_leftAligned
Left aligned mode. The PWM period starts with a rising edge.
Definition: Ifx_Types.h:179
Ifx_IsrSetting::priority
uint16 priority
Definition: Ifx_Types.h:108
Ifx_Pwm_Mode_init
Initialisation mode, do not use at run time.
Definition: Ifx_Types.h:182
IfxModule_IndexMap::module
volatile void * module
Module address.
Definition: Ifx_Types.h:142
cfloat32::real
float32 real
Real part.
Definition: Ifx_Types.h:60
Ifx_CircularBuffer
Circular buffer definition.
Definition: Ifx_Types.h:93
csfract::real
sfract real
Real part.
Definition: Ifx_Types.h:213
Ifx_Pwm_Mode_off
All switch open.
Definition: Ifx_Types.h:181
Ifx_RxSel_c
Definition: Ifx_Types.h:131
Ifx_Pwm_Mode_centerAlignedInverted
Center aligned inverted aligned mode.
Definition: Ifx_Types.h:178
Ifx_DataBufferMode_TimeStampSingle::timestamp
Ifx_TickTime timestamp
Definition: Ifx_Types.h:148
csint16::real
sint16 real
Real part.
Definition: Ifx_Types.h:72
csint32::real
sint32 real
Real part.
Definition: Ifx_Types.h:66
Ifx_Pwm_Mode_rightAligned
Right aligned mode. The PWM period starts with a falling edge.
Definition: Ifx_Types.h:180
Ifx_TypesGnuc.h
cfract::real
fract real
Real part.
Definition: Ifx_Types.h:207
sint64
long long sint64
Definition: Platform_Types.h:141
Platform_Types.h
Ifx_AddressValue
pvoid Ifx_AddressValue
Used in address values.
Definition: Ifx_Types.h:104
voidfuncvoid
void(* voidfuncvoid)(void)
void pointer which takes void argument
Definition: Ifx_Types.h:56
cfract::imag
fract imag
Imaginary part.
Definition: Ifx_Types.h:208
Compilers.h
Ifx_RxSel_f
Definition: Ifx_Types.h:134
uint16
unsigned short uint16
Definition: Platform_Types.h:112
Ifx_RxSel
Ifx_RxSel
input multiplexer definition used in PinMaps
Definition: Ifx_Types.h:127
csfract::imag
sfract imag
Imaginary part.
Definition: Ifx_Types.h:214
sint32
long sint32
Definition: Platform_Types.h:134
Ifx_IsrSetting::provider
uint16 provider
Definition: Ifx_Types.h:109
Ifx_TypesDcc.h
csint16
Definition: Ifx_Types.h:70
csint32
Definition: Ifx_Types.h:64
vvoid
volatile void * vvoid
volatile void pointer
Definition: Ifx_Types.h:55
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:140
Ifx_ParityMode_odd
Definition: Ifx_Types.h:122
pchar
const char * pchar
const char pointer
Definition: Ifx_Types.h:53
Ifx_CircularBuffer::index
uint16 index
buffer current index
Definition: Ifx_Types.h:96
IfxModule_IndexMap::index
sint32 index
Module index.
Definition: Ifx_Types.h:143
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
uint8
unsigned char uint8
Definition: Platform_Types.h:108
Ifx_ParityMode
Ifx_ParityMode
Definition: Ifx_Types.h:119
csint16::imag
sint16 imag
Imaginary part.
Definition: Ifx_Types.h:73
Ifx_TypesTasking.h
cfract
Definition: Ifx_Types.h:205


iLLD_TC38A: Ifx_TypesDcc.h Source File

  • Cpu
  • Std
Ifx_TypesDcc.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_TypesDcc.h
3 * \version iLLD_1_0_1_12_0
4 * \copyright Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
5 *
6 *
7 * IMPORTANT NOTICE
8 *
9 * Use of this file is subject to the terms of use agreed between (i) you or
10 * the company in which ordinary course of business you are acting and (ii)
11 * Infineon Technologies AG or its licensees. If and as long as no such terms
12 * of use are agreed, use of this file is subject to following:
13 *
14 * Boost Software License - Version 1.0 - August 17th, 2003
15 *
16 * Permission is hereby granted, free of charge, to any person or organization
17 * obtaining a copy of the software and accompanying documentation covered by
18 * this license (the "Software") to use, reproduce, display, distribute,
19 * execute, and transmit the Software, and to prepare derivative works of the
20 * Software, and to permit third-parties to whom the Software is furnished to
21 * do so, all subject to the following:
22 *
23 * The copyright notices in the Software and this entire statement, including
24 * the above license grant, this restriction and the following disclaimer, must
25 * be included in all copies of the Software, in whole or in part, and all
26 * derivative works of the Software, unless such copies or derivative works are
27 * solely in the form of machine-executable object code generated by a source
28 * language processor.
29 *
30 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
31 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
32 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
33 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
34 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
35 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
36 * DEALINGS IN THE SOFTWARE.
37 *
38 */
39 #ifndef IFX_TYPESDDC_H_
40 #define IFX_TYPESDDC_H_
41 /******************************************************************************/
42 #define FRACT_MAX 0x7fffffff
43
44 typedef long fract;
45 typedef short sfract;
46 typedef long long laccum;
47 typedef long __packb; //MSMRK should be struct of four chars
48 typedef unsigned long __upackb; //MSMRK should be struct of four unsigned chars
49 typedef long __packhw; //MSMRK should be struct of two shorts
50 typedef unsigned long __upackhw; //MSMRK should be struct of two unsigned shorts
51
52 typedef unsigned long long circ_t;
53
54 /******************************************************************************/
55 #endif /* IFX_TYPESDDC_H_ */
__packb
long __packb
Definition: Ifx_TypesDcc.h:47
sfract
short sfract
Definition: Ifx_TypesDcc.h:45
__upackhw
unsigned long __upackhw
Definition: Ifx_TypesDcc.h:50
circ_t
unsigned long long circ_t
Definition: Ifx_TypesDcc.h:52
__packhw
long __packhw
Definition: Ifx_TypesDcc.h:49
fract
long fract
Definition: Ifx_TypesDcc.h:44
laccum
long long laccum
Definition: Ifx_TypesDcc.h:46
__upackb
unsigned long __upackb
Definition: Ifx_TypesDcc.h:48


iLLD_TC38A: Ifx_TypesGhs.h Source File

  • Cpu
  • Std
Ifx_TypesGhs.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_TypesGhs.h
3 * \version iLLD_1_0_1_12_0
4 * \copyright Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
5 *
6 *
7 * IMPORTANT NOTICE
8 *
9 * Use of this file is subject to the terms of use agreed between (i) you or
10 * the company in which ordinary course of business you are acting and (ii)
11 * Infineon Technologies AG or its licensees. If and as long as no such terms
12 * of use are agreed, use of this file is subject to following:
13 *
14 * Boost Software License - Version 1.0 - August 17th, 2003
15 *
16 * Permission is hereby granted, free of charge, to any person or organization
17 * obtaining a copy of the software and accompanying documentation covered by
18 * this license (the "Software") to use, reproduce, display, distribute,
19 * execute, and transmit the Software, and to prepare derivative works of the
20 * Software, and to permit third-parties to whom the Software is furnished to
21 * do so, all subject to the following:
22 *
23 * The copyright notices in the Software and this entire statement, including
24 * the above license grant, this restriction and the following disclaimer, must
25 * be included in all copies of the Software, in whole or in part, and all
26 * derivative works of the Software, unless such copies or derivative works are
27 * solely in the form of machine-executable object code generated by a source
28 * language processor.
29 *
30 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
31 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
32 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
33 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
34 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
35 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
36 * DEALINGS IN THE SOFTWARE.
37 *
38 */
39 #ifndef IFX_TYPESGHS_H_
40 #define IFX_TYPESGHS_H_
41 /******************************************************************************/
42 #define FRACT_MAX 0x7fffffff
43
44 #define __interrupt(intno)
45
46 typedef long fract;
47 typedef short sfract;
48 typedef long long laccum;
49 typedef long __packb; //MSMRK should be struct of four chars
50 typedef unsigned long __upackb; //MSMRK should be struct of four unsigned chars
51 typedef long __packhw; //MSMRK should be struct of two shorts
52 typedef unsigned long __upackhw; //MSMRK should be struct of two unsigned shorts
53 /******************************************************************************/
54
55 #endif /* IFX_TYPESGHS_H_ */
sfract
short sfract
Definition: Ifx_TypesGhs.h:47
__upackhw
unsigned long __upackhw
Definition: Ifx_TypesGhs.h:52
__packhw
long __packhw
Definition: Ifx_TypesGhs.h:51
__packb
long __packb
Definition: Ifx_TypesGhs.h:49
laccum
long long laccum
Definition: Ifx_TypesGhs.h:48
fract
long fract
Definition: Ifx_TypesGhs.h:46
__upackb
unsigned long __upackb
Definition: Ifx_TypesGhs.h:50


iLLD_TC38A: Ifx_TypesGnuc.h Source File

  • Cpu
  • Std
Ifx_TypesGnuc.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_TypesGnuc.h
3 * \version iLLD_1_0_1_12_0
4 * \copyright Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
5 *
6 *
7 * IMPORTANT NOTICE
8 *
9 * Use of this file is subject to the terms of use agreed between (i) you or
10 * the company in which ordinary course of business you are acting and (ii)
11 * Infineon Technologies AG or its licensees. If and as long as no such terms
12 * of use are agreed, use of this file is subject to following:
13 *
14 * Boost Software License - Version 1.0 - August 17th, 2003
15 *
16 * Permission is hereby granted, free of charge, to any person or organization
17 * obtaining a copy of the software and accompanying documentation covered by
18 * this license (the "Software") to use, reproduce, display, distribute,
19 * execute, and transmit the Software, and to prepare derivative works of the
20 * Software, and to permit third-parties to whom the Software is furnished to
21 * do so, all subject to the following:
22 *
23 * The copyright notices in the Software and this entire statement, including
24 * the above license grant, this restriction and the following disclaimer, must
25 * be included in all copies of the Software, in whole or in part, and all
26 * derivative works of the Software, unless such copies or derivative works are
27 * solely in the form of machine-executable object code generated by a source
28 * language processor.
29 *
30 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
31 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
32 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
33 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
34 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
35 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
36 * DEALINGS IN THE SOFTWARE.
37 *
38 */
39 #ifndef IFX_TYPESGNUC_H_
40 #define IFX_TYPESGNUC_H_
41 /******************************************************************************/
42 #define FRACT_MAX 0x7fffffff
43
44 #include <machine/cint.h>
45 #define __interrupt(intno)
46
47 typedef long fract;
48 typedef short sfract;
49 typedef long long laccum;
50 typedef long __packb; //MSMRK should be struct of four chars
51 typedef unsigned long __upackb; //MSMRK should be struct of four unsigned chars
52 typedef long __packhw; //MSMRK should be struct of two shorts
53 typedef unsigned long __upackhw; //MSMRK should be struct of two unsigned shorts
54 /******************************************************************************/
55
56 #endif /* IFX_TYPESGNUC_H_ */
laccum
long long laccum
Definition: Ifx_TypesGnuc.h:49
__packb
long __packb
Definition: Ifx_TypesGnuc.h:50
__upackb
unsigned long __upackb
Definition: Ifx_TypesGnuc.h:51
sfract
short sfract
Definition: Ifx_TypesGnuc.h:48
__packhw
long __packhw
Definition: Ifx_TypesGnuc.h:52
fract
long fract
Definition: Ifx_TypesGnuc.h:47
__upackhw
unsigned long __upackhw
Definition: Ifx_TypesGnuc.h:53


iLLD_TC38A: Ifx_TypesTasking.h Source File

  • Cpu
  • Std
Ifx_TypesTasking.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_TypesTasking.h
3 * \version iLLD_1_0_1_12_0
4 * \copyright Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
5 *
6 *
7 * IMPORTANT NOTICE
8 *
9 * Use of this file is subject to the terms of use agreed between (i) you or
10 * the company in which ordinary course of business you are acting and (ii)
11 * Infineon Technologies AG or its licensees. If and as long as no such terms
12 * of use are agreed, use of this file is subject to following:
13 *
14 * Boost Software License - Version 1.0 - August 17th, 2003
15 *
16 * Permission is hereby granted, free of charge, to any person or organization
17 * obtaining a copy of the software and accompanying documentation covered by
18 * this license (the "Software") to use, reproduce, display, distribute,
19 * execute, and transmit the Software, and to prepare derivative works of the
20 * Software, and to permit third-parties to whom the Software is furnished to
21 * do so, all subject to the following:
22 *
23 * The copyright notices in the Software and this entire statement, including
24 * the above license grant, this restriction and the following disclaimer, must
25 * be included in all copies of the Software, in whole or in part, and all
26 * derivative works of the Software, unless such copies or derivative works are
27 * solely in the form of machine-executable object code generated by a source
28 * language processor.
29 *
30 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
31 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
32 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
33 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
34 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
35 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
36 * DEALINGS IN THE SOFTWARE.
37 *
38 */
39 #ifndef IFX_TYPESTASKING_H_
40 #define IFX_TYPESTASKING_H_
41 /******************************************************************************/
42 #define fract __fract // see http://www.open-std.org/jtc1/sc22/wg14/www/docs/n1169.pdf
43 #define sfract __sfract // see http://www.open-std.org/jtc1/sc22/wg14/www/docs/n1169.pdf
44 #define laccum __laccum
45 #define __asm__ __asm
46 /******************************************************************************/
47
48 /******************************************************************************/
49
50 #endif /* IFX_TYPESTASKING_H_ */


iLLD_TC38A: Ifx_WndF32.h Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_WndF32.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_WndF32.h
3 * \brief Windowing function
4 * \ingroup library_srvsw_sysse_math_f32_wnd
5 *
6 *
7 *
8 * \version disabled
9 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
10 *
11 *
12 * IMPORTANT NOTICE
13 *
14 * Use of this file is subject to the terms of use agreed between (i) you or
15 * the company in which ordinary course of business you are acting and (ii)
16 * Infineon Technologies AG or its licensees. If and as long as no such terms
17 * of use are agreed, use of this file is subject to following:
18 *
19 * Boost Software License - Version 1.0 - August 17th, 2003
20 *
21 * Permission is hereby granted, free of charge, to any person or organization
22 * obtaining a copy of the software and accompanying documentation covered by
23 * this license (the "Software") to use, reproduce, display, distribute,
24 * execute, and transmit the Software, and to prepare derivative works of the
25 * Software, and to permit third-parties to whom the Software is furnished to
26 * do so, all subject to the following:
27 *
28 * The copyright notices in the Software and this entire statement, including
29 * the above license grant, this restriction and the following disclaimer, must
30 * be included in all copies of the Software, in whole or in part, and all
31 * derivative works of the Software, unless such copies or derivative works are
32 * solely in the form of machine-executable object code generated by a source
33 * language processor.
34 *
35 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
36 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
37 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
38 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
39 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
40 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
41 * DEALINGS IN THE SOFTWARE.
42 *
43 * \defgroup library_srvsw_sysse_math_f32_wnd Window functions
44 * \ingroup library_srvsw_sysse_math_f32
45 */
46
47 #ifndef IFX_WNDF32_H
48 #define IFX_WNDF32_H
49
50 #include "Ifx_Cf32.h"
51
52 #define IFX_WNDF32_TABLE_LENGTH (1024)
53
54 /** \addtogroup library_srvsw_sysse_math_f32_wnd
55 * \{ */
56
57 IFX_EXTERN CONST_CFG float32 Ifx_g_WndF32_hannTable[IFX_WNDF32_TABLE_LENGTH / 2];
58 IFX_EXTERN CONST_CFG float32 Ifx_g_WndF32_blackmanHarrisTable[IFX_WNDF32_TABLE_LENGTH / 2];
59
60 /** \brief Apply a window to complex array x which has nX length.
61 *
62 * Example: Ifx_WndF32_apply(x, Ifx_g_WndF32_hannTable, 1024); */
63 IFX_INLINE void Ifx_WndF32_apply(cfloat32 *x, CONST_CFG float32 *window, short nX)
64 {
65 VecWin_f32(&x->real, window, nX, IFX_WNDF32_TABLE_LENGTH, 2, 1);
66 }
67
68
69 /** \} */
70
71 #endif /* IFX_WNDF32_H */
IFX_WNDF32_TABLE_LENGTH
#define IFX_WNDF32_TABLE_LENGTH
Definition: Ifx_WndF32.h:52
Ifx_g_WndF32_hannTable
IFX_EXTERN CONST_CFG float32 Ifx_g_WndF32_hannTable[IFX_WNDF32_TABLE_LENGTH/2]
Definition: Ifx_WndF32.h:57
VecWin_f32
void VecWin_f32(float32 *X, const float32 *W, short nX, short nW, short incrX, short symW)
Definition: Ifx_Cf32.c:285
float32
float float32
Definition: Platform_Types.h:170
Ifx_g_WndF32_blackmanHarrisTable
IFX_EXTERN CONST_CFG float32 Ifx_g_WndF32_blackmanHarrisTable[IFX_WNDF32_TABLE_LENGTH/2]
Definition: Ifx_WndF32.h:58
cfloat32
Definition: Ifx_Types.h:58
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
cfloat32::real
float32 real
Real part.
Definition: Ifx_Types.h:60
Ifx_Cf32.h
Floating point signal, vector, and matrix library.
Ifx_WndF32_apply
IFX_INLINE void Ifx_WndF32_apply(cfloat32 *x, CONST_CFG float32 *window, short nX)
Apply a window to complex array x which has nX length.
Definition: Ifx_WndF32.h:63
CONST_CFG
#define CONST_CFG
Definition: Compilers.h:57


iLLD_TC38A: Ifx_WndF32_BlackmanHarrisTable.c Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_WndF32_BlackmanHarrisTable.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_WndF32_BlackmanHarrisTable.c
3 * \brief Lookup table for Blackman-Harris window function
4 *
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "Ifx_WndF32.h"
44
45 #if IFX_WNDF32_TABLE_LENGTH != 1024
46 #error This was generated with IFX_WNDF32_TABLE_LENGTH = 1024. Please regenerate.
47 #endif
48
49 CONST_CFG float32 Ifx_g_WndF32_blackmanHarrisTable[(IFX_WNDF32_TABLE_LENGTH / 2)] = {
50 _DATAF(0.000060000000000001),
51 _DATAF(6.05336435769415E-05),
52 _DATAF(6.21351621010909E-05),
53 _DATAF(6.48063189517042E-05),
54 _DATAF(6.85500530901977E-05),
55 _DATAF(7.33704790552552E-05),
56 _DATAF(7.92728869546643E-05),
57 _DATAF(8.62637424542366E-05),
58 _DATAF(9.43506867646833E-05),
59 _DATAF(0.000103542536623254),
60 _DATAF(0.000113849284272844),
61 _DATAF(0.00012528209743509),
62 _DATAF(0.000137853319279022),
63 _DATAF(0.000151576468382483),
64 _DATAF(0.000166466238687386),
65 _DATAF(0.000182538499446352),
66 _DATAF(0.000199810295160321),
67 _DATAF(0.000218299845506252),
68 _DATAF(0.000238026545253333),
69 _DATAF(0.000259010964166398),
70 _DATAF(0.000281274846895671),
71 _DATAF(0.000304841112851225),
72 _DATAF(0.000329733856060103),
73 _DATAF(0.000355978345005534),
74 _DATAF(0.000383601022445701),
75 _DATAF(0.00041262950521132),
76 _DATAF(0.000443092583978778),
77 _DATAF(0.000475020223018621),
78 _DATAF(0.000508443559916298),
79 _DATAF(0.000543394905263906),
80 _DATAF(0.000579907742319714),
81 _DATAF(0.000618016726635444),
82 _DATAF(0.000657757685646449),
83 _DATAF(0.000699167618224639),
84 _DATAF(0.000742284694190907),
85 _DATAF(0.000787148253784491),
86 _DATAF(0.000833798807087666),
87 _DATAF(0.000882278033402194),
88 _DATAF(0.000932628780575385),
89 _DATAF(0.000984895064273818),
90 _DATAF(0.00103912206720055),
91 _DATAF(0.00109535613825471),
92 _DATAF(0.00115364479162906),
93 _DATAF(0.00121403670584417),
94 _DATAF(0.00127658172271511),
95 _DATAF(0.00134133084624859),
96 _DATAF(0.0014083362414667),
97 _DATAF(0.00147765123315459),
98 _DATAF(0.00154933030452976),
99 _DATAF(0.0016234290958281),
100 _DATAF(0.00170000440280525),
101 _DATAF(0.00177911417514856),
102 _DATAF(0.00186081751479774),
103 _DATAF(0.00194517467416997),
104 _DATAF(0.00203224705428634),
105 _DATAF(0.00212209720279637),
106 _DATAF(0.0022147888118974),
107 _DATAF(0.00231038671614482),
108 _DATAF(0.00240895689015029),
109 _DATAF(0.00251056644616419),
110 _DATAF(0.00261528363153874),
111 _DATAF(0.00272317782606849),
112 _DATAF(0.0028343195392042),
113 _DATAF(0.00294878040713723),
114 _DATAF(0.00306663318975018),
115 _DATAF(0.00318795176743033),
116 _DATAF(0.00331281113774309),
117 _DATAF(0.00344128741195982),
118 _DATAF(0.00357345781143924),
119 _DATAF(0.00370940066385603),
120 _DATAF(0.00384919539927517),
121 _DATAF(0.00399292254606638),
122 _DATAF(0.00414066372665728),
123 _DATAF(0.00429250165311901),
124 _DATAF(0.00444852012258346),
125 _DATAF(0.00460880401248608),
126 _DATAF(0.00477343927563203),
127 _DATAF(0.0049425129350816),
128 _DATAF(0.00511611307885149),
129 _DATAF(0.00529432885442795),
130 _DATAF(0.00547725046308894),
131 _DATAF(0.00566496915403105),
132 _DATAF(0.00585757721829767),
133 _DATAF(0.00605516798250564),
134 _DATAF(0.00625783580236627),
135 _DATAF(0.00646567605599707),
136 _DATAF(0.00667878513702144),
137 _DATAF(0.00689726044745254),
138 _DATAF(0.00712120039035792),
139 _DATAF(0.00735070436230157),
140 _DATAF(0.00758587274556064),
141 _DATAF(0.00782680690011242),
142 _DATAF(0.00807360915538975),
143 _DATAF(0.00832638280180106),
144 _DATAF(0.00858523208201078),
145 _DATAF(0.0088502621819799),
146 _DATAF(0.00912157922176039),
147 _DATAF(0.00939929024604285),
148 _DATAF(0.00968350321445337),
149 _DATAF(0.00997432699159716),
150 _DATAF(0.0102718713368455),
151 _DATAF(0.010576246893865),
152 _DATAF(0.0108875651798833),
153 _DATAF(0.0112059385746926),
154 _DATAF(0.0115314803093847),
155 _DATAF(0.011864304454818),
156 _DATAF(0.0122045259098121),
157 _DATAF(0.0125522603890683),
158 _DATAF(0.0129076244108144),
159 _DATAF(0.0132707352841705),
160 _DATAF(0.013641711096234),
161 _DATAF(0.0140206706988822),
162 _DATAF(0.0144077336952905),
163 _DATAF(0.0148030204261634),
164 _DATAF(0.0152066519556773),
165 _DATAF(0.0156187500571341),
166 _DATAF(0.0160394371983217),
167 _DATAF(0.0164688365265826),
168 _DATAF(0.0169070718535868),
169 _DATAF(0.0173542676398092),
170 _DATAF(0.0178105489787098),
171 _DATAF(0.0182760415806149),
172 _DATAF(0.0187508717562994),
173 _DATAF(0.0192351664002677),
174 _DATAF(0.0197290529737345),
175 _DATAF(0.020232659487302),
176 _DATAF(0.0207461144833353),
177 _DATAF(0.0212695470180336),
178 _DATAF(0.0218030866431987),
179 _DATAF(0.0223468633876972),
180 _DATAF(0.0229010077386208),
181 _DATAF(0.0234656506221394),
182 _DATAF(0.0240409233840514),
183 _DATAF(0.0246269577700285),
184 _DATAF(0.0252238859055558),
185 _DATAF(0.025831840275569),
186 _DATAF(0.026450953703786),
187 _DATAF(0.0270813593317373),
188 _DATAF(0.0277231905974923),
189 _DATAF(0.0283765812140843),
190 _DATAF(0.0290416651476349),
191 _DATAF(0.029718576595178),
192 _DATAF(0.0304074499621848),
193 _DATAF(0.031108419839792),
194 _DATAF(0.0318216209817327),
195 _DATAF(0.0325471882809733),
196 _DATAF(0.0332852567460565),
197 _DATAF(0.0340359614771537),
198 _DATAF(0.0347994376418264),
199 _DATAF(0.0355758204505013),
200 _DATAF(0.036365245131659),
201 _DATAF(0.0371678469067388),
202 _DATAF(0.0379837609647635),
203 _DATAF(0.038813122436685),
204 _DATAF(0.039656066369453),
205 _DATAF(0.0405127276998116),
206 _DATAF(0.041383241227825),
207 _DATAF(0.0422677415901346),
208 _DATAF(0.0431663632329524),
209 _DATAF(0.0440792403847932),
210 _DATAF(0.0450065070289477),
211 _DATAF(0.0459482968757025),
212 _DATAF(0.0469047433343071),
213 _DATAF(0.0478759794846953),
214 _DATAF(0.0488621380489625),
215 _DATAF(0.0498633513626023),
216 _DATAF(0.0508797513455092),
217 _DATAF(0.0519114694727488),
218 _DATAF(0.0529586367451015),
219 _DATAF(0.0540213836593831),
220 _DATAF(0.0550998401785474),
221 _DATAF(0.0561941357015757),
222 _DATAF(0.0573043990331573),
223 _DATAF(0.0584307583531662),
224 _DATAF(0.0595733411859395),
225 _DATAF(0.0607322743693613),
226 _DATAF(0.06190768402376),
227 _DATAF(0.0630996955206202),
228 _DATAF(0.0643084334511193),
229 _DATAF(0.0655340215944914),
230 _DATAF(0.0667765828862246),
231 _DATAF(0.0680362393860989),
232 _DATAF(0.0693131122460692),
233 _DATAF(0.0706073216779996),
234 _DATAF(0.0719189869212565),
235 _DATAF(0.0732482262101651),
236 _DATAF(0.0745951567413363),
237 _DATAF(0.0759598946408714),
238 _DATAF(0.0773425549314486),
239 _DATAF(0.0787432514993022),
240 _DATAF(0.0801620970610963),
241 _DATAF(0.0815992031307037),
242 _DATAF(0.083054679985896),
243 _DATAF(0.0845286366349502),
244 _DATAF(0.0860211807831818),
245 _DATAF(0.0875324187994092),
246 _DATAF(0.0890624556823589),
247 _DATAF(0.0906113950270166),
248 _DATAF(0.092179338990934),
249 _DATAF(0.0937663882604969),
250 _DATAF(0.0953726420171649),
251 _DATAF(0.0969981979036867),
252 _DATAF(0.0986431519903029),
253 _DATAF(0.100307598740941),
254 _DATAF(0.101991630979414),
255 _DATAF(0.103695339855624),
256 _DATAF(0.105418814811791),
257 _DATAF(0.107162143548701),
258 _DATAF(0.108925411991991),
259 _DATAF(0.110708704258479),
260 _DATAF(0.112512102622539),
261 _DATAF(0.114335687482543),
262 _DATAF(0.116179537327367),
263 _DATAF(0.118043728702971),
264 _DATAF(0.119928336179073),
265 _DATAF(0.121833432315909),
266 _DATAF(0.123759087631096),
267 _DATAF(0.125705370566615),
268 _DATAF(0.127672347455906),
269 _DATAF(0.129660082491093),
270 _DATAF(0.131668637690355),
271 _DATAF(0.133698072865431),
272 _DATAF(0.135748445589297),
273 _DATAF(0.137819811163995),
274 _DATAF(0.139912222588642),
275 _DATAF(0.142025730527626),
276 _DATAF(0.144160383278985),
277 _DATAF(0.146316226742996),
278 _DATAF(0.14849330439097),
279 _DATAF(0.150691657234271),
280 _DATAF(0.152911323793562),
281 _DATAF(0.155152340068285),
282 _DATAF(0.157414739506395),
283 _DATAF(0.15969855297435),
284 _DATAF(0.162003808727361),
285 _DATAF(0.164330532379924),
286 _DATAF(0.166678746876629),
287 _DATAF(0.169048472463272),
288 _DATAF(0.171439726658257),
289 _DATAF(0.173852524224323),
290 _DATAF(0.176286877140581),
291 _DATAF(0.178742794574886),
292 _DATAF(0.181220282856548),
293 _DATAF(0.183719345449389),
294 _DATAF(0.186239982925158),
295 _DATAF(0.188782192937316),
296 _DATAF(0.191345970195187),
297 _DATAF(0.193931306438502),
298 _DATAF(0.196538190412331),
299 _DATAF(0.199166607842421),
300 _DATAF(0.201816541410937),
301 _DATAF(0.204487970732631),
302 _DATAF(0.207180872331433),
303 _DATAF(0.209895219617483),
304 _DATAF(0.212630982864606),
305 _DATAF(0.21538812918824),
306 _DATAF(0.218166622523828),
307 _DATAF(0.220966423605681),
308 _DATAF(0.223787489946321),
309 _DATAF(0.226629775816306),
310 _DATAF(0.229493232224558),
311 _DATAF(0.232377806899193),
312 _DATAF(0.235283444268855),
313 _DATAF(0.238210085444584),
314 _DATAF(0.241157668202195),
315 _DATAF(0.244126126965209),
316 _DATAF(0.247115392788316),
317 _DATAF(0.25012539334139),
318 _DATAF(0.253156052894067),
319 _DATAF(0.256207292300887),
320 _DATAF(0.259279028987005),
321 _DATAF(0.262371176934486),
322 _DATAF(0.265483646669187),
323 _DATAF(0.268616345248233),
324 _DATAF(0.271769176248094),
325 _DATAF(0.27494203975327),
326 _DATAF(0.278134832345589),
327 _DATAF(0.281347447094127),
328 _DATAF(0.284579773545761),
329 _DATAF(0.287831697716344),
330 _DATAF(0.291103102082533),
331 _DATAF(0.294393865574252),
332 _DATAF(0.297703863567812),
333 _DATAF(0.301032967879694),
334 _DATAF(0.30438104676098),
335 _DATAF(0.307747964892468),
336 _DATAF(0.311133583380456),
337 _DATAF(0.314537759753201),
338 _DATAF(0.317960347958064),
339 _DATAF(0.321401198359353),
340 _DATAF(0.324860157736845),
341 _DATAF(0.328337069285016),
342 _DATAF(0.331831772612977),
343 _DATAF(0.335344103745104),
344 _DATAF(0.338873895122394),
345 _DATAF(0.342420975604529),
346 _DATAF(0.345985170472656),
347 _DATAF(0.3495663014329),
348 _DATAF(0.353164186620592),
349 _DATAF(0.356778640605235),
350 _DATAF(0.360409474396196),
351 _DATAF(0.364056495449141),
352 _DATAF(0.367719507673201),
353 _DATAF(0.371398311438886),
354 _DATAF(0.375092703586736),
355 _DATAF(0.378802477436722),
356 _DATAF(0.382527422798394),
357 _DATAF(0.386267325981779),
358 _DATAF(0.39002196980903),
359 _DATAF(0.393791133626826),
360 _DATAF(0.397574593319535),
361 _DATAF(0.401372121323116),
362 _DATAF(0.4051834866398),
363 _DATAF(0.409008454853506),
364 _DATAF(0.412846788146031),
365 _DATAF(0.416698245313995),
366 _DATAF(0.420562581786534),
367 _DATAF(0.424439549643771),
368 _DATAF(0.428328897636028),
369 _DATAF(0.432230371203805),
370 _DATAF(0.436143712498517),
371 _DATAF(0.440068660403987),
372 _DATAF(0.444004950558688),
373 _DATAF(0.447952315378757),
374 _DATAF(0.451910484081743),
375 _DATAF(0.455879182711121),
376 _DATAF(0.459858134161553),
377 _DATAF(0.463847058204895),
378 _DATAF(0.46784567151695),
379 _DATAF(0.471853687704974),
380 _DATAF(0.475870817335914),
381 _DATAF(0.479896767965388),
382 _DATAF(0.483931244167404),
383 _DATAF(0.487973947564809),
384 _DATAF(0.492024576860471),
385 _DATAF(0.496082827869183),
386 _DATAF(0.500148393550297),
387 _DATAF(0.50422096404107),
388 _DATAF(0.508300226690728),
389 _DATAF(0.512385866095238),
390 _DATAF(0.516477564132795),
391 _DATAF(0.520575),
392 _DATAF(0.524677850248738),
393 _DATAF(0.528785788823753),
394 _DATAF(0.532898487100904),
395 _DATAF(0.537015613926103),
396 _DATAF(0.541136835654929),
397 _DATAF(0.545261816192918),
398 _DATAF(0.549390217036503),
399 _DATAF(0.553521697314626),
400 _DATAF(0.557655913830994),
401 _DATAF(0.561792521106979),
402 _DATAF(0.565931171425163),
403 _DATAF(0.570071514873506),
404 _DATAF(0.574213199390142),
405 _DATAF(0.578355870808795),
406 _DATAF(0.582499172904798),
407 _DATAF(0.586642747441718),
408 _DATAF(0.590786234218577),
409 _DATAF(0.594929271117651),
410 _DATAF(0.599071494152859),
411 _DATAF(0.603212537518709),
412 _DATAF(0.607352033639815),
413 _DATAF(0.611489613220962),
414 _DATAF(0.615624905297715),
415 _DATAF(0.619757537287565),
416 _DATAF(0.623887135041594),
417 _DATAF(0.628013322896669),
418 _DATAF(0.632135723728129),
419 _DATAF(0.636253959002978),
420 _DATAF(0.640367648833561),
421 _DATAF(0.644476412031722),
422 _DATAF(0.648579866163425),
423 _DATAF(0.652677627603835),
424 _DATAF(0.656769311592843),
425 _DATAF(0.660854532291033),
426 _DATAF(0.664932902836069),
427 _DATAF(0.669004035399499),
428 _DATAF(0.673067541243964),
429 _DATAF(0.6771230307808),
430 _DATAF(0.681170113628019),
431 _DATAF(0.685208398668663),
432 _DATAF(0.689237494109519),
433 _DATAF(0.693257007540177),
434 _DATAF(0.697266545992425),
435 _DATAF(0.701265715999973),
436 _DATAF(0.705254123658479),
437 _DATAF(0.70923137468589),
438 _DATAF(0.713197074483052),
439 _DATAF(0.717150828194615),
440 _DATAF(0.721092240770188),
441 _DATAF(0.72502091702575),
442 _DATAF(0.7289364617053),
443 _DATAF(0.732838479542731),
444 _DATAF(0.736726575323917),
445 _DATAF(0.740600353949007),
446 _DATAF(0.744459420494891),
447 _DATAF(0.748303380277859),
448 _DATAF(0.752131838916412),
449 _DATAF(0.755944402394215),
450 _DATAF(0.759740677123202),
451 _DATAF(0.763520270006787),
452 _DATAF(0.76728278850319),
453 _DATAF(0.771027840688865),
454 _DATAF(0.774755035321995),
455 _DATAF(0.778463981906066),
456 _DATAF(0.782154290753498),
457 _DATAF(0.785825573049304),
458 _DATAF(0.789477440914794),
459 _DATAF(0.793109507471277),
460 _DATAF(0.796721386903776),
461 _DATAF(0.800312694524721),
462 _DATAF(0.803883046837616),
463 _DATAF(0.807432061600672),
464 _DATAF(0.810959357890378),
465 _DATAF(0.814464556165),
466 _DATAF(0.817947278328014),
467 _DATAF(0.821407147791419),
468 _DATAF(0.824843789538964),
469 _DATAF(0.82825683018923),
470 _DATAF(0.831645898058594),
471 _DATAF(0.835010623224019),
472 _DATAF(0.8383506375857),
473 _DATAF(0.841665574929516),
474 _DATAF(0.844955070989297),
475 _DATAF(0.848218763508878),
476 _DATAF(0.851456292303937),
477 _DATAF(0.854667299323595),
478 _DATAF(0.85785142871177),
479 _DATAF(0.861008326868267),
480 _DATAF(0.864137642509598),
481 _DATAF(0.867239026729501),
482 _DATAF(0.87031213305917),
483 _DATAF(0.87335661752716),
484 _DATAF(0.876372138718963),
485 _DATAF(0.879358357836245),
486 _DATAF(0.882314938755719),
487 _DATAF(0.885241548087659),
488 _DATAF(0.888137855234021),
489 _DATAF(0.891003532446169),
490 _DATAF(0.8938382548822),
491 _DATAF(0.896641700663836),
492 _DATAF(0.899413550932886),
493 _DATAF(0.90215348990726),
494 _DATAF(0.90486120493652),
495 _DATAF(0.907536386556961),
496 _DATAF(0.9101787285462),
497 _DATAF(0.912787927977272),
498 _DATAF(0.915363685272211),
499 _DATAF(0.917905704255112),
500 _DATAF(0.92041369220465),
501 _DATAF(0.922887359906061),
502 _DATAF(0.925326421702555),
503 _DATAF(0.927730595546164),
504 _DATAF(0.930099603048002),
505 _DATAF(0.932433169527932),
506 _DATAF(0.93473102406363),
507 _DATAF(0.936992899539027),
508 _DATAF(0.939218532692123),
509 _DATAF(0.941407664162166),
510 _DATAF(0.943560038536173),
511 _DATAF(0.945675404394792),
512 _DATAF(0.947753514357501),
513 _DATAF(0.949794125127105),
514 _DATAF(0.951796997533564),
515 _DATAF(0.953761896577093),
516 _DATAF(0.955688591470572),
517 _DATAF(0.957576855681214),
518 _DATAF(0.959426466971513),
519 _DATAF(0.961237207439446),
520 _DATAF(0.963008863557916),
521 _DATAF(0.964741226213449),
522 _DATAF(0.966434090744106),
523 _DATAF(0.968087256976625),
524 _DATAF(0.969700529262773),
525 _DATAF(0.971273716514903),
526 _DATAF(0.972806632240705),
527 _DATAF(0.974299094577144),
528 _DATAF(0.975750926323582),
529 _DATAF(0.977161954974065),
530 _DATAF(0.978532012748779),
531 _DATAF(0.979860936624663),
532 _DATAF(0.981148568365171),
533 _DATAF(0.982394754549168),
534 _DATAF(0.98359934659898),
535 _DATAF(0.984762200807557),
536 _DATAF(0.985883178364764),
537 _DATAF(0.986962145382792),
538 _DATAF(0.987998972920675),
539 _DATAF(0.988993537007913),
540 _DATAF(0.989945718667196),
541 _DATAF(0.990855403936222),
542 _DATAF(0.991722483888599),
543 _DATAF(0.992546854653837),
544 _DATAF(0.993328417436418),
545 _DATAF(0.994067078533934),
546 _DATAF(0.994762749354304),
547 _DATAF(0.995415346432055),
548 _DATAF(0.996024791443661),
549 _DATAF(0.996591011221945),
550 _DATAF(0.997113937769534),
551 _DATAF(0.997593508271372),
552 _DATAF(0.998029665106271),
553 _DATAF(0.99842235585752),
554 _DATAF(0.998771533322532),
555 _DATAF(0.999077155521532),
556 _DATAF(0.99933918570529),
557 _DATAF(0.999557592361884),
558 _DATAF(0.999732349222509),
559 _DATAF(0.999863435266309),
560 _DATAF(0.999950834724255),
561 _DATAF(0.999994537082046),
562 };
Ifx_WndF32.h
Windowing function.
IFX_WNDF32_TABLE_LENGTH
#define IFX_WNDF32_TABLE_LENGTH
Definition: Ifx_WndF32.h:52
float32
float float32
Definition: Platform_Types.h:170
Ifx_g_WndF32_blackmanHarrisTable
CONST_CFG float32 Ifx_g_WndF32_blackmanHarrisTable[(IFX_WNDF32_TABLE_LENGTH/2)]
Definition: Ifx_WndF32_BlackmanHarrisTable.c:49
CONST_CFG
#define CONST_CFG
Definition: Compilers.h:57
_DATAF
#define _DATAF(val)
Definition: Ifx_Cf32.h:51


iLLD_TC38A: Ifx_WndF32_HannTable.c Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_WndF32_HannTable.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_WndF32_HannTable.c
3 * \brief Lookup table for Hann window function
4 *
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "Ifx_WndF32.h"
44
45 #if IFX_WNDF32_TABLE_LENGTH != 1024
46 #error This was generated with IFX_WNDF32_TABLE_LENGTH = 1024. Please regenerate.
47 #endif
48
49 CONST_CFG float32 Ifx_g_WndF32_hannTable[(IFX_WNDF32_TABLE_LENGTH / 2)] = {
50 _DATAF(0.00000000000000000000),
51 _DATAF(0.00000943076884141192),
52 _DATAF(0.00003772272248170339),
53 _DATAF(0.00008487478771712631),
54 _DATAF(0.00015088518557604402),
55 _DATAF(0.00023575144587084651),
56 _DATAF(0.00033947033807635307),
57 _DATAF(0.00046203794772736728),
58 _DATAF(0.00060344970552250743),
59 _DATAF(0.00076370022725313902),
60 _DATAF(0.00094278343021869659),
61 _DATAF(0.00114069262053817510),
62 _DATAF(0.00135742034763097760),
63 _DATAF(0.00159295846242457630),
64 _DATAF(0.00184729788452386860),
65 _DATAF(0.00212042918428778650),
66 _DATAF(0.00241234223358333110),
67 _DATAF(0.00272302562370896340),
68 _DATAF(0.00305246794596314430),
69 _DATAF(0.00340065662749111650),
70 _DATAF(0.00376757839694619180),
71 _DATAF(0.00415321951732039450),
72 _DATAF(0.00455756578594446180),
73 _DATAF(0.00498060183599591260),
74 _DATAF(0.00542231136932969090),
75 _DATAF(0.00588267762213945390),
76 _DATAF(0.00636168383061885830),
77 _DATAF(0.00685931136831641200),
78 _DATAF(0.00737554160878062250),
79 _DATAF(0.00791035499423742290),
80 _DATAF(0.00846373196691274640),
81 _DATAF(0.00903565157204866410),
82 _DATAF(0.00962609145790338520),
83 _DATAF(0.01023502927273511900),
84 _DATAF(0.01086244266480207400),
85 _DATAF(0.01150830835103988600),
86 _DATAF(0.01217260118573904000),
87 _DATAF(0.01285529602319002200),
88 _DATAF(0.01355636864900589000),
89 _DATAF(0.01427579019218683200),
90 _DATAF(0.01501353550702333500),
91 _DATAF(0.01576957479119300800),
92 _DATAF(0.01654388196766376500),
93 _DATAF(0.01733642630279064200),
94 _DATAF(0.01814717799425125100),
95 _DATAF(0.01897610723972320600),
96 _DATAF(0.01982318051159381900),
97 _DATAF(0.02068836987018585200),
98 _DATAF(0.02157163806259632100),
99 _DATAF(0.02247295528650283800),
100 _DATAF(0.02339228615164756800),
101 _DATAF(0.02432959713041782400),
102 _DATAF(0.02528485096991062200),
103 _DATAF(0.02625801227986812600),
104 _DATAF(0.02724904380738735200),
105 _DATAF(0.02825791016221046400),
106 _DATAF(0.02928457222878933000),
107 _DATAF(0.03032899089157581300),
108 _DATAF(0.03139112517237663300),
109 _DATAF(0.03247094154357910200),
110 _DATAF(0.03356838971376419100),
111 _DATAF(0.03468343615531921400),
112 _DATAF(0.03581603243947029100),
113 _DATAF(0.03696614131331443800),
114 _DATAF(0.03813371807336807300),
115 _DATAF(0.03931871801614761400),
116 _DATAF(0.04052109271287918100),
117 _DATAF(0.04174080491065979000),
118 _DATAF(0.04297780245542526200),
119 _DATAF(0.04423204064369201700),
120 _DATAF(0.04550346732139587400),
121 _DATAF(0.04679204523563385000),
122 _DATAF(0.04809771478176116900),
123 _DATAF(0.04942043498158454900),
124 _DATAF(0.05076014995574951200),
125 _DATAF(0.05211681500077247600),
126 _DATAF(0.05349037423729896500),
127 _DATAF(0.05488077551126480100),
128 _DATAF(0.05628796666860580400),
129 _DATAF(0.05771189928054809600),
130 _DATAF(0.05915251374244689900),
131 _DATAF(0.06060976162552833600),
132 _DATAF(0.06208358332514762900),
133 _DATAF(0.06357392668724060100),
134 _DATAF(0.06508072465658187900),
135 _DATAF(0.06660393625497818000),
136 _DATAF(0.06814350187778472900),
137 _DATAF(0.06969934701919555700),
138 _DATAF(0.07127143442630767800),
139 _DATAF(0.07285968959331512500),
140 _DATAF(0.07446406036615371700),
141 _DATAF(0.07608447968959808300),
142 _DATAF(0.07772088795900344800),
143 _DATAF(0.07937323302030563400),
144 _DATAF(0.08104144036769866900),
145 _DATAF(0.08272545784711837800),
146 _DATAF(0.08442521095275878900),
147 _DATAF(0.08614064753055572500),
148 _DATAF(0.08787168562412262000),
149 _DATAF(0.08961828052997589100),
150 _DATAF(0.09138035029172897300),
151 _DATAF(0.09315783530473709100),
152 _DATAF(0.09495066851377487200),
153 _DATAF(0.09675878286361694300),
154 _DATAF(0.09858211129903793300),
155 _DATAF(0.10042057186365128000),
156 _DATAF(0.10227411240339279000),
157 _DATAF(0.10414265841245651000),
158 _DATAF(0.10602613538503647000),
159 _DATAF(0.10792447626590729000),
160 _DATAF(0.10983760654926300000),
161 _DATAF(0.11176545172929764000),
162 _DATAF(0.11370794475078583000),
163 _DATAF(0.11566501110792160000),
164 _DATAF(0.11763656884431839000),
165 _DATAF(0.11962255835533142000),
166 _DATAF(0.12162289768457413000),
167 _DATAF(0.12363750487565994000),
168 _DATAF(0.12566630542278290000),
169 _DATAF(0.12770923972129822000),
170 _DATAF(0.12976621091365814000),
171 _DATAF(0.13183714449405670000),
172 _DATAF(0.13392198085784912000),
173 _DATAF(0.13602061569690704000),
174 _DATAF(0.13813297450542450000),
175 _DATAF(0.14025899767875671000),
176 _DATAF(0.14239858090877533000),
177 _DATAF(0.14455166459083557000),
178 _DATAF(0.14671814441680908000),
179 _DATAF(0.14889796078205109000),
180 _DATAF(0.15109102427959442000),
181 _DATAF(0.15329724550247192000),
182 _DATAF(0.15551653504371643000),
183 _DATAF(0.15774883329868317000),
184 _DATAF(0.15999403595924377000),
185 _DATAF(0.16225206851959229000),
186 _DATAF(0.16452284157276154000),
187 _DATAF(0.16680626571178436000),
188 _DATAF(0.16910226643085480000),
189 _DATAF(0.17141073942184448000),
190 _DATAF(0.17373161017894745000),
191 _DATAF(0.17606478929519653000),
192 _DATAF(0.17841020226478577000),
193 _DATAF(0.18076772987842560000),
194 _DATAF(0.18313729763031006000),
195 _DATAF(0.18551883101463318000),
196 _DATAF(0.18791222572326660000),
197 _DATAF(0.19031739234924316000),
198 _DATAF(0.19273422658443451000),
199 _DATAF(0.19516266882419586000),
200 _DATAF(0.19760259985923767000),
201 _DATAF(0.20005394518375397000),
202 _DATAF(0.20251661539077759000),
203 _DATAF(0.20499049127101898000),
204 _DATAF(0.20747549831867218000),
205 _DATAF(0.20997154712677002000),
206 _DATAF(0.21247853338718414000),
207 _DATAF(0.21499636769294739000),
208 _DATAF(0.21752494573593140000),
209 _DATAF(0.22006417810916901000),
210 _DATAF(0.22261397540569305000),
211 _DATAF(0.22517424821853638000),
212 _DATAF(0.22774487733840942000),
213 _DATAF(0.23032577335834503000),
214 _DATAF(0.23291684687137604000),
215 _DATAF(0.23551799356937408000),
216 _DATAF(0.23812912404537201000),
217 _DATAF(0.24075011909008026000),
218 _DATAF(0.24338090419769287000),
219 _DATAF(0.24602137506008148000),
220 _DATAF(0.24867141246795654000),
221 _DATAF(0.25133094191551208000),
222 _DATAF(0.25399985909461975000),
223 _DATAF(0.25667804479598999000),
224 _DATAF(0.25936540961265564000),
225 _DATAF(0.26206183433532715000),
226 _DATAF(0.26476725935935974000),
227 _DATAF(0.26748156547546387000),
228 _DATAF(0.27020460367202759000),
229 _DATAF(0.27293634414672852000),
230 _DATAF(0.27567663788795471000),
231 _DATAF(0.27842539548873901000),
232 _DATAF(0.28118252754211426000),
233 _DATAF(0.28394788503646851000),
234 _DATAF(0.28672140836715698000),
235 _DATAF(0.28950297832489014000),
236 _DATAF(0.29229250550270081000),
237 _DATAF(0.29508984088897705000),
238 _DATAF(0.29789492487907410000),
239 _DATAF(0.30070760846138000000),
240 _DATAF(0.30352783203125000000),
241 _DATAF(0.30635544657707214000),
242 _DATAF(0.30919039249420166000),
243 _DATAF(0.31203252077102661000),
244 _DATAF(0.31488174200057983000),
245 _DATAF(0.31773793697357178000),
246 _DATAF(0.32060101628303528000),
247 _DATAF(0.32347086071968079000),
248 _DATAF(0.32634738087654114000),
249 _DATAF(0.32923042774200439000),
250 _DATAF(0.33211994171142578000),
251 _DATAF(0.33501577377319336000),
252 _DATAF(0.33791780471801758000),
253 _DATAF(0.34082597494125366000),
254 _DATAF(0.34374016523361206000),
255 _DATAF(0.34666022658348083000),
256 _DATAF(0.34958606958389282000),
257 _DATAF(0.35251760482788086000),
258 _DATAF(0.35545471310615540000),
259 _DATAF(0.35839724540710449000),
260 _DATAF(0.36134514212608337000),
261 _DATAF(0.36429825425148010000),
262 _DATAF(0.36725649237632751000),
263 _DATAF(0.37021973729133606000),
264 _DATAF(0.37318786978721619000),
265 _DATAF(0.37616080045700073000),
266 _DATAF(0.37913838028907776000),
267 _DATAF(0.38212051987648010000),
268 _DATAF(0.38510712981224060000),
269 _DATAF(0.38809806108474731000),
270 _DATAF(0.39109322428703308000),
271 _DATAF(0.39409247040748596000),
272 _DATAF(0.39709573984146118000),
273 _DATAF(0.40010288357734680000),
274 _DATAF(0.40311378240585327000),
275 _DATAF(0.40612834692001343000),
276 _DATAF(0.40914645791053772000),
277 _DATAF(0.41216799616813660000),
278 _DATAF(0.41519284248352051000),
279 _DATAF(0.41822087764739990000),
280 _DATAF(0.42125201225280762000),
281 _DATAF(0.42428609728813171000),
282 _DATAF(0.42732307314872742000),
283 _DATAF(0.43036276102066040000),
284 _DATAF(0.43340510129928589000),
285 _DATAF(0.43644991517066956000),
286 _DATAF(0.43949717283248901000),
287 _DATAF(0.44254666566848755000),
288 _DATAF(0.44559836387634277000),
289 _DATAF(0.44865208864212036000),
290 _DATAF(0.45170778036117554000),
291 _DATAF(0.45476526021957397000),
292 _DATAF(0.45782446861267090000),
293 _DATAF(0.46088525652885437000),
294 _DATAF(0.46394753456115723000),
295 _DATAF(0.46701115369796753000),
296 _DATAF(0.47007602453231812000),
297 _DATAF(0.47314202785491943000),
298 _DATAF(0.47620904445648193000),
299 _DATAF(0.47927695512771606000),
300 _DATAF(0.48234564065933228000),
301 _DATAF(0.48541501164436340000),
302 _DATAF(0.48848491907119751000),
303 _DATAF(0.49155527353286743000),
304 _DATAF(0.49462592601776123000),
305 _DATAF(0.49769678711891174000),
306 _DATAF(0.50076776742935181000),
307 _DATAF(0.50383865833282471000),
308 _DATAF(0.50690943002700806000),
309 _DATAF(0.50997996330261230000),
310 _DATAF(0.51305007934570313000),
311 _DATAF(0.51611977815628052000),
312 _DATAF(0.51918876171112061000),
313 _DATAF(0.52225708961486816000),
314 _DATAF(0.52532458305358887000),
315 _DATAF(0.52839112281799316000),
316 _DATAF(0.53145653009414673000),
317 _DATAF(0.53452080488204956000),
318 _DATAF(0.53758376836776733000),
319 _DATAF(0.54064530134201050000),
320 _DATAF(0.54370534420013428000),
321 _DATAF(0.54676371812820435000),
322 _DATAF(0.54982030391693115000),
323 _DATAF(0.55287504196166992000),
324 _DATAF(0.55592775344848633000),
325 _DATAF(0.55897837877273560000),
326 _DATAF(0.56202673912048340000),
327 _DATAF(0.56507277488708496000),
328 _DATAF(0.56811636686325073000),
329 _DATAF(0.57115739583969116000),
330 _DATAF(0.57419574260711670000),
331 _DATAF(0.57723128795623779000),
332 _DATAF(0.58026391267776489000),
333 _DATAF(0.58329355716705322000),
334 _DATAF(0.58631998300552368000),
335 _DATAF(0.58934319019317627000),
336 _DATAF(0.59236299991607666000),
337 _DATAF(0.59537935256958008000),
338 _DATAF(0.59839212894439697000),
339 _DATAF(0.60140115022659302000),
340 _DATAF(0.60440635681152344000),
341 _DATAF(0.60740762948989868000),
342 _DATAF(0.61040484905242920000),
343 _DATAF(0.61339795589447021000),
344 _DATAF(0.61638671159744263000),
345 _DATAF(0.61937111616134644000),
346 _DATAF(0.62235099077224731000),
347 _DATAF(0.62532627582550049000),
348 _DATAF(0.62829679250717163000),
349 _DATAF(0.63126254081726074000),
350 _DATAF(0.63422328233718872000),
351 _DATAF(0.63717895746231079000),
352 _DATAF(0.64012944698333740000),
353 _DATAF(0.64307469129562378000),
354 _DATAF(0.64601451158523560000),
355 _DATAF(0.64894884824752808000),
356 _DATAF(0.65187758207321167000),
357 _DATAF(0.65480053424835205000),
358 _DATAF(0.65771764516830444000),
359 _DATAF(0.66062885522842407000),
360 _DATAF(0.66353398561477661000),
361 _DATAF(0.66643291711807251000),
362 _DATAF(0.66932559013366699000),
363 _DATAF(0.67221188545227051000),
364 _DATAF(0.67509168386459351000),
365 _DATAF(0.67796486616134644000),
366 _DATAF(0.68083137273788452000),
367 _DATAF(0.68369102478027344000),
368 _DATAF(0.68654376268386841000),
369 _DATAF(0.68938946723937988000),
370 _DATAF(0.69222795963287354000),
371 _DATAF(0.69505929946899414000),
372 _DATAF(0.69788318872451782000),
373 _DATAF(0.70069968700408936000),
374 _DATAF(0.70350855588912964000),
375 _DATAF(0.70630979537963867000),
376 _DATAF(0.70910322666168213000),
377 _DATAF(0.71188879013061523000),
378 _DATAF(0.71466636657714844000),
379 _DATAF(0.71743583679199219000),
380 _DATAF(0.72019708156585693000),
381 _DATAF(0.72295004129409790000),
382 _DATAF(0.72569459676742554000),
383 _DATAF(0.72843056917190552000),
384 _DATAF(0.73115801811218262000),
385 _DATAF(0.73387670516967773000),
386 _DATAF(0.73658657073974609000),
387 _DATAF(0.73928749561309814000),
388 _DATAF(0.74197942018508911000),
389 _DATAF(0.74466222524642944000),
390 _DATAF(0.74733579158782959000),
391 _DATAF(0.75000000000000000000),
392 _DATAF(0.75265479087829590000),
393 _DATAF(0.75530004501342773000),
394 _DATAF(0.75793570280075073000),
395 _DATAF(0.76056158542633057000),
396 _DATAF(0.76317769289016724000),
397 _DATAF(0.76578384637832642000),
398 _DATAF(0.76837992668151855000),
399 _DATAF(0.77096593379974365000),
400 _DATAF(0.77354174852371216000),
401 _DATAF(0.77610719203948975000),
402 _DATAF(0.77866220474243164000),
403 _DATAF(0.78120678663253784000),
404 _DATAF(0.78374069929122925000),
405 _DATAF(0.78626388311386108000),
406 _DATAF(0.78877633810043335000),
407 _DATAF(0.79127782583236694000),
408 _DATAF(0.79376840591430664000),
409 _DATAF(0.79624783992767334000),
410 _DATAF(0.79871612787246704000),
411 _DATAF(0.80117315053939819000),
412 _DATAF(0.80361878871917725000),
413 _DATAF(0.80605298280715942000),
414 _DATAF(0.80847567319869995000),
415 _DATAF(0.81088668107986450000),
416 _DATAF(0.81328594684600830000),
417 _DATAF(0.81567341089248657000),
418 _DATAF(0.81804895401000977000),
419 _DATAF(0.82041257619857788000),
420 _DATAF(0.82276403903961182000),
421 _DATAF(0.82510334253311157000),
422 _DATAF(0.82743036746978760000),
423 _DATAF(0.82974505424499512000),
424 _DATAF(0.83204728364944458000),
425 _DATAF(0.83433699607849121000),
426 _DATAF(0.83661413192749023000),
427 _DATAF(0.83887857198715210000),
428 _DATAF(0.84113019704818726000),
429 _DATAF(0.84336894750595093000),
430 _DATAF(0.84559476375579834000),
431 _DATAF(0.84780752658843994000),
432 _DATAF(0.85000717639923096000),
433 _DATAF(0.85219359397888184000),
434 _DATAF(0.85436677932739258000),
435 _DATAF(0.85652655363082886000),
436 _DATAF(0.85867291688919067000),
437 _DATAF(0.86080569028854370000),
438 _DATAF(0.86292493343353271000),
439 _DATAF(0.86503040790557861000),
440 _DATAF(0.86712217330932617000),
441 _DATAF(0.86920005083084106000),
442 _DATAF(0.87126404047012329000),
443 _DATAF(0.87331396341323853000),
444 _DATAF(0.87534987926483154000),
445 _DATAF(0.87737154960632324000),
446 _DATAF(0.87937903404235840000),
447 _DATAF(0.88137221336364746000),
448 _DATAF(0.88335102796554565000),
449 _DATAF(0.88531535863876343000),
450 _DATAF(0.88726514577865601000),
451 _DATAF(0.88920032978057861000),
452 _DATAF(0.89112079143524170000),
453 _DATAF(0.89302653074264526000),
454 _DATAF(0.89491748809814453000),
455 _DATAF(0.89679348468780518000),
456 _DATAF(0.89865452051162720000),
457 _DATAF(0.90050053596496582000),
458 _DATAF(0.90233147144317627000),
459 _DATAF(0.90414720773696899000),
460 _DATAF(0.90594768524169922000),
461 _DATAF(0.90773284435272217000),
462 _DATAF(0.90950262546539307000),
463 _DATAF(0.91125696897506714000),
464 _DATAF(0.91299575567245483000),
465 _DATAF(0.91471904516220093000),
466 _DATAF(0.91642659902572632000),
467 _DATAF(0.91811853647232056000),
468 _DATAF(0.91979461908340454000),
469 _DATAF(0.92145490646362305000),
470 _DATAF(0.92309933900833130000),
471 _DATAF(0.92472773790359497000),
472 _DATAF(0.92634016275405884000),
473 _DATAF(0.92793643474578857000),
474 _DATAF(0.92951661348342896000),
475 _DATAF(0.93108057975769043000),
476 _DATAF(0.93262833356857300000),
477 _DATAF(0.93415969610214233000),
478 _DATAF(0.93567472696304321000),
479 _DATAF(0.93717330694198608000),
480 _DATAF(0.93865537643432617000),
481 _DATAF(0.94012093544006348000),
482 _DATAF(0.94156986474990845000),
483 _DATAF(0.94300216436386108000),
484 _DATAF(0.94441771507263184000),
485 _DATAF(0.94581651687622070000),
486 _DATAF(0.94719851016998291000),
487 _DATAF(0.94856363534927368000),
488 _DATAF(0.94991183280944824000),
489 _DATAF(0.95124304294586182000),
490 _DATAF(0.95255726575851440000),
491 _DATAF(0.95385438203811646000),
492 _DATAF(0.95513439178466797000),
493 _DATAF(0.95639723539352417000),
494 _DATAF(0.95764285326004028000),
495 _DATAF(0.95887118577957153000),
496 _DATAF(0.96008229255676270000),
497 _DATAF(0.96127593517303467000),
498 _DATAF(0.96245223283767700000),
499 _DATAF(0.96361112594604492000),
500 _DATAF(0.96475243568420410000),
501 _DATAF(0.96587628126144409000),
502 _DATAF(0.96698254346847534000),
503 _DATAF(0.96807116270065308000),
504 _DATAF(0.96914213895797729000),
505 _DATAF(0.97019541263580322000),
506 _DATAF(0.97123098373413086000),
507 _DATAF(0.97224873304367065000),
508 _DATAF(0.97324872016906738000),
509 _DATAF(0.97423082590103149000),
510 _DATAF(0.97519499063491821000),
511 _DATAF(0.97614127397537231000),
512 _DATAF(0.97706961631774902000),
513 _DATAF(0.97797995805740356000),
514 _DATAF(0.97887223958969116000),
515 _DATAF(0.97974646091461182000),
516 _DATAF(0.98060262203216553000),
517 _DATAF(0.98144060373306274000),
518 _DATAF(0.98226046562194824000),
519 _DATAF(0.98306214809417725000),
520 _DATAF(0.98384553194046021000),
521 _DATAF(0.98461073637008667000),
522 _DATAF(0.98535764217376709000),
523 _DATAF(0.98608618974685669000),
524 _DATAF(0.98679643869400024000),
525 _DATAF(0.98748832941055298000),
526 _DATAF(0.98816186189651489000),
527 _DATAF(0.98881691694259644000),
528 _DATAF(0.98945355415344238000),
529 _DATAF(0.99007177352905273000),
530 _DATAF(0.99067145586013794000),
531 _DATAF(0.99125260114669800000),
532 _DATAF(0.99181526899337769000),
533 _DATAF(0.99235939979553223000),
534 _DATAF(0.99288487434387207000),
535 _DATAF(0.99339181184768677000),
536 _DATAF(0.99388015270233154000),
537 _DATAF(0.99434983730316162000),
538 _DATAF(0.99480086565017700000),
539 _DATAF(0.99523323774337769000),
540 _DATAF(0.99564695358276367000),
541 _DATAF(0.99604195356369019000),
542 _DATAF(0.99641823768615723000),
543 _DATAF(0.99677580595016479000),
544 _DATAF(0.99711459875106812000),
545 _DATAF(0.99743467569351196000),
546 _DATAF(0.99773597717285156000),
547 _DATAF(0.99801850318908691000),
548 _DATAF(0.99828219413757324000),
549 _DATAF(0.99852716922760010000),
550 _DATAF(0.99875330924987793000),
551 _DATAF(0.99896061420440674000),
552 _DATAF(0.99914908409118652000),
553 _DATAF(0.99931877851486206000),
554 _DATAF(0.99946963787078857000),
555 _DATAF(0.99960160255432129000),
556 _DATAF(0.99971473217010498000),
557 _DATAF(0.99980902671813965000),
558 _DATAF(0.99988448619842529000),
559 _DATAF(0.99994105100631714000),
560 _DATAF(0.99997878074645996000),
561 _DATAF(0.99999761581420898000),
562 };
Ifx_WndF32.h
Windowing function.
IFX_WNDF32_TABLE_LENGTH
#define IFX_WNDF32_TABLE_LENGTH
Definition: Ifx_WndF32.h:52
float32
float float32
Definition: Platform_Types.h:170
CONST_CFG
#define CONST_CFG
Definition: Compilers.h:57
Ifx_g_WndF32_hannTable
CONST_CFG float32 Ifx_g_WndF32_hannTable[(IFX_WNDF32_TABLE_LENGTH/2)]
Definition: Ifx_WndF32_HannTable.c:49
_DATAF
#define _DATAF(val)
Definition: Ifx_Cf32.h:51


iLLD_TC38A: IfxAsclin.c Source File

  • Asclin
  • Std
IfxAsclin.c
Go to the documentation of this file.
1 /**
2 * \file IfxAsclin.c
3 * \brief ASCLIN basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 */
43
44 /******************************************************************************/
45 /*----------------------------------Includes----------------------------------*/
46 /******************************************************************************/
47
48 #include "IfxAsclin.h"
49
50 /******************************************************************************/
51 /*-------------------------Function Implementations---------------------------*/
52 /******************************************************************************/
53
54 void IfxAsclin_disableModule(Ifx_ASCLIN *asclin)
55 {
56 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
57 IfxScuWdt_clearCpuEndinit(psw); /* clears the endinit protection*/
58 IfxAsclin_setDisableModuleRequest(asclin); /* disables the module*/
59 IfxScuWdt_setCpuEndinit(psw); /* sets the endinit protection back on*/
60 }
61
62
63 void IfxAsclin_enableAscErrorFlags(Ifx_ASCLIN *asclin, boolean parEnable, boolean rfoEnable)
64 {
65 IfxAsclin_enableParityErrorFlag(asclin, parEnable); /* enables parity error*/
66 IfxAsclin_enableRxFifoOverflowFlag(asclin, rfoEnable); /* enables Rx fifo Overflow error*/
67 }
68
69
70 void IfxAsclin_enableModule(Ifx_ASCLIN *asclin)
71 {
72 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
73 IfxScuWdt_clearCpuEndinit(psw); /* clears the endinit protection*/
74 IfxAsclin_setEnableModuleRequest(asclin); /* enables the module*/
75 IfxScuWdt_setCpuEndinit(psw); /* sets the endinit protection back on*/
76 }
77
78
79 Ifx_ASCLIN *IfxAsclin_getAddress(IfxAsclin_Index asclin)
80 {
81 Ifx_ASCLIN *module;
82
83 if (asclin < IFXASCLIN_NUM_MODULES)
84 {
85 module = (Ifx_ASCLIN *)IfxAsclin_cfg_indexMap[asclin].module;
86 }
87 else
88 {
89 module = NULL_PTR;
90 }
91
92 return module;
93 }
94
95
96 float32 IfxAsclin_getFaFrequency(Ifx_ASCLIN *asclin)
97 {
98 float32 frequency;
99 IfxAsclin_ClockSource clockSource = (IfxAsclin_ClockSource)IfxAsclin_getClockSource(asclin); /* gets the current clock source*/
100
101 switch (clockSource)
102 {
103 case IfxAsclin_ClockSource_noClock: /* gets the respective frequency*/
104 frequency = 0.0;
105 break;
106 case IfxAsclin_ClockSource_ascFastClock:
107 frequency = IfxScuCcu_getAsclinFFrequency();
108 break;
109 case IfxAsclin_ClockSource_ascSlowClock:
110 frequency = IfxScuCcu_getAsclinSFrequency();
111 break;
112 default:
113 frequency = 0.0;
114 break;
115 }
116
117 return frequency;
118 }
119
120
121 IfxAsclin_Index IfxAsclin_getIndex(Ifx_ASCLIN *asclin)
122 {
123 uint32 index;
124 IfxAsclin_Index result;
125
126 result = IfxAsclin_Index_none;
127
128 for (index = 0; index < IFXASCLIN_NUM_MODULES; index++)
129 {
130 if (IfxAsclin_cfg_indexMap[index].module == asclin)
131 {
132 result = (IfxAsclin_Index)IfxAsclin_cfg_indexMap[index].index;
133 break;
134 }
135 }
136
137 return result;
138 }
139
140
141 float32 IfxAsclin_getOvsFrequency(Ifx_ASCLIN *asclin)
142 {
143 return (IfxAsclin_getPdFrequency(asclin) * asclin->BRG.B.NUMERATOR) / asclin->BRG.B.DENOMINATOR;
144 }
145
146
147 float32 IfxAsclin_getPdFrequency(Ifx_ASCLIN *asclin)
148 {
149 return IfxAsclin_getFaFrequency(asclin) / (asclin->BITCON.B.PRESCALER + 1);
150 }
151
152
153 float32 IfxAsclin_getShiftFrequency(Ifx_ASCLIN *asclin)
154 {
155 return IfxAsclin_getOvsFrequency(asclin) / asclin->BITCON.B.OVERSAMPLING;
156 }
157
158
159 volatile Ifx_SRC_SRCR *IfxAsclin_getSrcPointerEr(Ifx_ASCLIN *asclin)
160 {
161 uint32 index = IfxAsclin_getIndex(asclin);
162 Ifx_SRC_SRCR *const srcAscLinErrAddress[] = {
163 (Ifx_SRC_SRCR *)&SRC_ASCLIN0ERR,
164 (Ifx_SRC_SRCR *)&SRC_ASCLIN1ERR,
165 (Ifx_SRC_SRCR *)&SRC_ASCLIN2ERR,
166 (Ifx_SRC_SRCR *)&SRC_ASCLIN3ERR,
167 (Ifx_SRC_SRCR *)&SRC_ASCLIN4ERR,
168 (Ifx_SRC_SRCR *)&SRC_ASCLIN5ERR,
169 (Ifx_SRC_SRCR *)&SRC_ASCLIN6ERR,
170 (Ifx_SRC_SRCR *)&SRC_ASCLIN7ERR,
171 (Ifx_SRC_SRCR *)&SRC_ASCLIN8ERR,
172 (Ifx_SRC_SRCR *)&SRC_ASCLIN9ERR,
173 (Ifx_SRC_SRCR *)&SRC_ASCLIN10ERR,
174 (Ifx_SRC_SRCR *)&SRC_ASCLIN11ERR,
175 (Ifx_SRC_SRCR *)&SRC_ASCLIN12ERR,
176 (Ifx_SRC_SRCR *)&SRC_ASCLIN13ERR,
177 (Ifx_SRC_SRCR *)&SRC_ASCLIN14ERR,
178 (Ifx_SRC_SRCR *)&SRC_ASCLIN15ERR,
179 (Ifx_SRC_SRCR *)&SRC_ASCLIN16ERR,
180 (Ifx_SRC_SRCR *)&SRC_ASCLIN17ERR,
181 (Ifx_SRC_SRCR *)&SRC_ASCLIN18ERR,
182 (Ifx_SRC_SRCR *)&SRC_ASCLIN19ERR,
183 (Ifx_SRC_SRCR *)&SRC_ASCLIN20ERR,
184 (Ifx_SRC_SRCR *)&SRC_ASCLIN21ERR,
185 (Ifx_SRC_SRCR *)&SRC_ASCLIN22ERR,
186 (Ifx_SRC_SRCR *)&SRC_ASCLIN23ERR,
187 };
188 return srcAscLinErrAddress[index];
189 }
190
191
192 volatile Ifx_SRC_SRCR *IfxAsclin_getSrcPointerRx(Ifx_ASCLIN *asclin)
193 {
194 uint32 index = IfxAsclin_getIndex(asclin);
195 Ifx_SRC_SRCR *const srcAscLinRxAddress[] = {
196 (Ifx_SRC_SRCR *)&SRC_ASCLIN0RX,
197 (Ifx_SRC_SRCR *)&SRC_ASCLIN1RX,
198 (Ifx_SRC_SRCR *)&SRC_ASCLIN2RX,
199 (Ifx_SRC_SRCR *)&SRC_ASCLIN3RX,
200 (Ifx_SRC_SRCR *)&SRC_ASCLIN4RX,
201 (Ifx_SRC_SRCR *)&SRC_ASCLIN5RX,
202 (Ifx_SRC_SRCR *)&SRC_ASCLIN6RX,
203 (Ifx_SRC_SRCR *)&SRC_ASCLIN7RX,
204 (Ifx_SRC_SRCR *)&SRC_ASCLIN8RX,
205 (Ifx_SRC_SRCR *)&SRC_ASCLIN9RX,
206 (Ifx_SRC_SRCR *)&SRC_ASCLIN10RX,
207 (Ifx_SRC_SRCR *)&SRC_ASCLIN11RX,
208 (Ifx_SRC_SRCR *)&SRC_ASCLIN12RX,
209 (Ifx_SRC_SRCR *)&SRC_ASCLIN13RX,
210 (Ifx_SRC_SRCR *)&SRC_ASCLIN14RX,
211 (Ifx_SRC_SRCR *)&SRC_ASCLIN15RX,
212 (Ifx_SRC_SRCR *)&SRC_ASCLIN16RX,
213 (Ifx_SRC_SRCR *)&SRC_ASCLIN17RX,
214 (Ifx_SRC_SRCR *)&SRC_ASCLIN18RX,
215 (Ifx_SRC_SRCR *)&SRC_ASCLIN19RX,
216 (Ifx_SRC_SRCR *)&SRC_ASCLIN20RX,
217 (Ifx_SRC_SRCR *)&SRC_ASCLIN21RX,
218 (Ifx_SRC_SRCR *)&SRC_ASCLIN22RX,
219 (Ifx_SRC_SRCR *)&SRC_ASCLIN23RX,
220 };
221 return srcAscLinRxAddress[index];
222 }
223
224
225 volatile Ifx_SRC_SRCR *IfxAsclin_getSrcPointerTx(Ifx_ASCLIN *asclin)
226 {
227 uint32 index = IfxAsclin_getIndex(asclin);
228 Ifx_SRC_SRCR *const srcAscLinTxAddress[] = {
229 (Ifx_SRC_SRCR *)&SRC_ASCLIN0TX,
230 (Ifx_SRC_SRCR *)&SRC_ASCLIN1TX,
231 (Ifx_SRC_SRCR *)&SRC_ASCLIN2TX,
232 (Ifx_SRC_SRCR *)&SRC_ASCLIN3TX,
233 (Ifx_SRC_SRCR *)&SRC_ASCLIN4TX,
234 (Ifx_SRC_SRCR *)&SRC_ASCLIN5TX,
235 (Ifx_SRC_SRCR *)&SRC_ASCLIN6TX,
236 (Ifx_SRC_SRCR *)&SRC_ASCLIN7TX,
237 (Ifx_SRC_SRCR *)&SRC_ASCLIN8TX,
238 (Ifx_SRC_SRCR *)&SRC_ASCLIN9TX,
239 (Ifx_SRC_SRCR *)&SRC_ASCLIN10TX,
240 (Ifx_SRC_SRCR *)&SRC_ASCLIN11TX,
241 (Ifx_SRC_SRCR *)&SRC_ASCLIN12TX,
242 (Ifx_SRC_SRCR *)&SRC_ASCLIN13TX,
243 (Ifx_SRC_SRCR *)&SRC_ASCLIN14TX,
244 (Ifx_SRC_SRCR *)&SRC_ASCLIN15TX,
245 (Ifx_SRC_SRCR *)&SRC_ASCLIN16TX,
246 (Ifx_SRC_SRCR *)&SRC_ASCLIN17TX,
247 (Ifx_SRC_SRCR *)&SRC_ASCLIN18TX,
248 (Ifx_SRC_SRCR *)&SRC_ASCLIN19TX,
249 (Ifx_SRC_SRCR *)&SRC_ASCLIN20TX,
250 (Ifx_SRC_SRCR *)&SRC_ASCLIN21TX,
251 (Ifx_SRC_SRCR *)&SRC_ASCLIN22TX,
252 (Ifx_SRC_SRCR *)&SRC_ASCLIN23TX
253 };
254 return srcAscLinTxAddress[index];
255 }
256
257
258 uint32 IfxAsclin_read16(Ifx_ASCLIN *asclin, uint16 *data, uint32 count)
259 {
260 volatile Ifx_ASCLIN_RXDATA *rxData = (volatile Ifx_ASCLIN_RXDATA *)&asclin->RXDATA.U;
261
262 while (count > 0)
263 {
264 *data++ = (uint16)rxData->U;
265 count--;
266 }
267
268 return count;
269 }
270
271
272 uint32 IfxAsclin_read32(Ifx_ASCLIN *asclin, uint32 *data, uint32 count)
273 {
274 volatile Ifx_ASCLIN_RXDATA *rxData = (volatile Ifx_ASCLIN_RXDATA *)&asclin->RXDATA.U;
275
276 while (count > 0)
277 {
278 *data++ = rxData->U;
279 count--;
280 }
281
282 return count;
283 }
284
285
286 uint32 IfxAsclin_read8(Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
287 {
288 volatile Ifx_ASCLIN_RXDATA *rxData = (volatile Ifx_ASCLIN_RXDATA *)&asclin->RXDATA.U;
289
290 while (count > 0)
291 {
292 *data++ = (uint8)rxData->U;
293 count--;
294 }
295
296 return count;
297 }
298
299
300 void IfxAsclin_resetModule(Ifx_ASCLIN *asclin)
301 {
302 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
303 IfxScuWdt_clearCpuEndinit(passwd);
304
305 asclin->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
306 asclin->KRST1.B.RST = 1;
307 IfxScuWdt_setCpuEndinit(passwd);
308
309 while (0 == asclin->KRST0.B.RSTSTAT) /* Wait until reset is executed */
310 {}
311
312 IfxScuWdt_clearCpuEndinit(passwd);
313 asclin->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
314
315 IfxScuWdt_setCpuEndinit(passwd);
316 }
317
318
319 void IfxAsclin_setBaudrateBitFields(Ifx_ASCLIN *asclin, uint16 prescaler, uint16 numerator, uint16 denominator, IfxAsclin_OversamplingFactor oversampling)
320 {
321 IfxAsclin_ClockSource clockSource = (IfxAsclin_ClockSource)IfxAsclin_getClockSource(asclin); /* gets the current clock source */
322 IfxAsclin_setClockSource(asclin, IfxAsclin_ClockSource_noClock); /* turns off the clock for settings */
323 IfxAsclin_setPrescaler(asclin, prescaler); /* sets the prescaler*/
324 IfxAsclin_setNumerator(asclin, numerator); /* sets the numerator*/
325 IfxAsclin_setDenominator(asclin, denominator); /* sets the denominator*/
326 IfxAsclin_setOversampling(asclin, oversampling); /* sets the oversampling*/
327 IfxAsclin_setClockSource(asclin, clockSource); /* sets the clock source back on*/
328 }
329
330
331 boolean IfxAsclin_setBitTiming(Ifx_ASCLIN *asclin, float32 baudrate, IfxAsclin_OversamplingFactor oversampling, IfxAsclin_SamplePointPosition samplepoint, IfxAsclin_SamplesPerBit medianFilter)
332 {
333 IfxAsclin_ClockSource source = (IfxAsclin_ClockSource)IfxAsclin_getClockSource(asclin);
334 float32 fOvs;
335 uint32 d = 0, n, dBest = 1, nBest = 1;
336 float32 f;
337
338 /* Set the PD frequency */
339 float32 fpd = IfxAsclin_getPdFrequency(asclin);
340 oversampling = (IfxAsclin_OversamplingFactor)__maxu((oversampling + 1), 4);
341 samplepoint = (IfxAsclin_SamplePointPosition)__maxu(samplepoint, 1);
342 fOvs = baudrate * oversampling;
343 float32 relError = fOvs;
344 float32 limit = 0.001 * fOvs; // save the error limit
345
346 boolean terminated = FALSE;
347 float32 newRelError; //modified by Hassan
348 uint32 adder_facL, adder_facH, adder_facL_min, count; //modified by Hassan
349
350 d = (uint32)(fpd / fOvs);
351 n = 1;
352
353 if (d >> 12)
354 {
355 if (((uint32)(fpd / (baudrate * 16))) >> 12)
356 {
357 /* Increase the value of the prescalar to generate the required baudrate */
358 IFX_ASSERT(IFX_VERBOSE_LEVEL_WARNING, FALSE);
359 }
360 else
361 {
362 /* Increase the value of the oversampling to generate the required baudrate */
363 IFX_ASSERT(IFX_VERBOSE_LEVEL_WARNING, FALSE);
364 }
365 }
366
367 dBest = d;
368 nBest = n;
369 adder_facL_min = 0;
370 f = (fpd * n) / d;
371 relError = __absf(fOvs - f);
372
373 if (relError <= limit)
374 {
375 terminated = TRUE;
376 }
377
378 for (n = 2; ((!terminated) && ((n * d) <= 0xFFF)); n++)
379 {
380 if (n == 2)
381 {
382 adder_facL = 1;
383 adder_facH = 1;
384 }
385 else
386 {
387 adder_facL = (adder_facL_min * n) / nBest;
388 adder_facH = adder_facL + 1;
389 }
390
391 for (count = adder_facL; count <= adder_facH; count++)
392 {
393 f = (fpd * n) / (n * d + count);
394 newRelError = __absf(fOvs - f);
395
396 if (relError > (newRelError))
397 {
398 relError = newRelError;
399 nBest = n;
400 dBest = (n * d + count);
401 adder_facL_min = count;
402 }
403 }
404
405 if (relError <= limit)
406 {
407 break;
408 }
409 }
410
411 IfxAsclin_setClockSource(asclin, IfxAsclin_ClockSource_noClock);
412 asclin->BRG.B.DENOMINATOR = dBest;
413 asclin->BRG.B.NUMERATOR = nBest;
414
415 /* Set the SHIFT frequency */
416 asclin->BITCON.B.OVERSAMPLING = oversampling - 1;
417
418 /* Set the sampling point */
419 asclin->BITCON.B.SAMPLEPOINT = samplepoint;
420
421 /* Set the median filter */
422 asclin->BITCON.B.SM = medianFilter ? 1 : 0;
423
424 IfxAsclin_setClockSource(asclin, source);
425
426 return TRUE;
427 }
428
429
430 void IfxAsclin_setClockSource(Ifx_ASCLIN *asclin, IfxAsclin_ClockSource clockSource)
431 {
432 asclin->CSR.B.CLKSEL = clockSource; /* selects the given clock source*/
433
434 /* Waits TW or polls for CSR.CON to change */
435 if (clockSource == IfxAsclin_ClockSource_noClock)
436 {
437 while (IfxAsclin_getClockStatus(asclin) != 0U)
438 {}
439 }
440 else
441 {
442 while (IfxAsclin_getClockStatus(asclin) != 1U)
443 {}
444 }
445 }
446
447
448 uint32 IfxAsclin_write16(Ifx_ASCLIN *asclin, uint16 *data, uint32 count)
449 {
450 volatile Ifx_ASCLIN_TXDATA *txData = (volatile Ifx_ASCLIN_TXDATA *)&asclin->TXDATA.U;
451
452 while ((count > 0))
453 {
454 txData->U = *data++;
455 count--;
456 }
457
458 return count;
459 }
460
461
462 uint32 IfxAsclin_write32(Ifx_ASCLIN *asclin, uint32 *data, uint32 count)
463 {
464 volatile Ifx_ASCLIN_TXDATA *txData = (volatile Ifx_ASCLIN_TXDATA *)&asclin->TXDATA.U;
465
466 while ((count > 0))
467 {
468 txData->U = *data++;
469 count--;
470 }
471
472 return count;
473 }
474
475
476 uint32 IfxAsclin_write8(Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
477 {
478 volatile Ifx_ASCLIN_TXDATA *txData = (volatile Ifx_ASCLIN_TXDATA *)&asclin->TXDATA.U;
479
480 while ((count > 0))
481 {
482 txData->U = *data++;
483 count--;
484 }
485
486 return count;
487 }
IfxAsclin_getAddress
Ifx_ASCLIN * IfxAsclin_getAddress(IfxAsclin_Index asclin)
API to get the address for ASCLIN HW module register memory map.
Definition: IfxAsclin.c:79
IfxAsclin_write32
uint32 IfxAsclin_write32(Ifx_ASCLIN *asclin, uint32 *data, uint32 count)
Writes data up to 32 bits.
Definition: IfxAsclin.c:462
IfxAsclin_setNumerator
IFX_INLINE void IfxAsclin_setNumerator(Ifx_ASCLIN *asclin, uint16 numerator)
Sets the numerator of the fractional divider.
Definition: IfxAsclin.h:2339
IfxAsclin_getIndex
IfxAsclin_Index IfxAsclin_getIndex(Ifx_ASCLIN *asclin)
API to get the resource index of the ASCLIN specified.
Definition: IfxAsclin.c:121
IfxAsclin_getShiftFrequency
float32 IfxAsclin_getShiftFrequency(Ifx_ASCLIN *asclin)
Returns the SHIFT frequency.
Definition: IfxAsclin.c:153
IfxScuCcu_getAsclinFFrequency
IFX_INLINE float32 IfxScuCcu_getAsclinFFrequency(void)
API to get ASCLINF divider frequency. This API returns the based on the divider value in CCUCON regis...
Definition: IfxScuCcu.h:1570
IfxAsclin_resetModule
void IfxAsclin_resetModule(Ifx_ASCLIN *asclin)
resets Asclin kernel
Definition: IfxAsclin.c:300
IfxAsclin_read32
uint32 IfxAsclin_read32(Ifx_ASCLIN *asclin, uint32 *data, uint32 count)
Reads data up to 32 bits.
Definition: IfxAsclin.c:272
IfxScuCcu_getAsclinSFrequency
float32 IfxScuCcu_getAsclinSFrequency(void)
API to get ASCLINS divider frequency. This API returns the ASCLINS frequency based on the divider val...
Definition: IfxScuCcu.c:121
IfxAsclin_getSrcPointerEr
volatile Ifx_SRC_SRCR * IfxAsclin_getSrcPointerEr(Ifx_ASCLIN *asclin)
Returns the SRC pointer for ERR.
Definition: IfxAsclin.c:159
IfxAsclin_SamplesPerBit
IfxAsclin_SamplesPerBit
Number of samples per bit, sample mode/medianfilter Definition in Ifx_ASCLIN.BITCON.B.SM.
Definition: IfxAsclin.h:352
IfxAsclin_getOvsFrequency
float32 IfxAsclin_getOvsFrequency(Ifx_ASCLIN *asclin)
Returns the OVS frequency.
Definition: IfxAsclin.c:141
IfxAsclin_ClockSource_ascFastClock
f asclinf wiil be supplied
Definition: IfxAsclin.h:112
IfxAsclin_enableModule
void IfxAsclin_enableModule(Ifx_ASCLIN *asclin)
Enables the module.
Definition: IfxAsclin.c:70
IfxAsclin_getFaFrequency
float32 IfxAsclin_getFaFrequency(Ifx_ASCLIN *asclin)
Returns the ASCLIN module FA frequency in Hz.
Definition: IfxAsclin.c:96
IfxAsclin_Index
IfxAsclin_Index
List of the available Asclin resources.
Definition: IfxAsclin_cfg.h:77
uint32
unsigned long uint32
Definition: Platform_Types.h:116
float32
float float32
Definition: Platform_Types.h:170
IfxAsclin_setDenominator
IFX_INLINE void IfxAsclin_setDenominator(Ifx_ASCLIN *asclin, uint16 denominator)
Sets the denominator of the fractional divider.
Definition: IfxAsclin.h:2249
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxAsclin_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxAsclin_cfg_indexMap[IFXASCLIN_NUM_MODULES]
Definition: IfxAsclin_cfg.c:54
IFXASCLIN_NUM_MODULES
#define IFXASCLIN_NUM_MODULES
Definition: IfxAsclin_cfg.h:67
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxAsclin_setBitTiming
boolean IfxAsclin_setBitTiming(Ifx_ASCLIN *asclin, float32 baudrate, IfxAsclin_OversamplingFactor oversampling, IfxAsclin_SamplePointPosition samplepoint, IfxAsclin_SamplesPerBit medianFilter)
Set the bit timing.
Definition: IfxAsclin.c:331
IfxAsclin_enableParityErrorFlag
IFX_INLINE void IfxAsclin_enableParityErrorFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables parity error flag.
Definition: IfxAsclin.h:1844
IFX_VERBOSE_LEVEL_WARNING
#define IFX_VERBOSE_LEVEL_WARNING
Assertion level warning.
Definition: Ifx_Assert.h:59
IfxAsclin_getSrcPointerTx
volatile Ifx_SRC_SRCR * IfxAsclin_getSrcPointerTx(Ifx_ASCLIN *asclin)
Returns the SRC pointer for Tx.
Definition: IfxAsclin.c:225
IfxAsclin_OversamplingFactor
IfxAsclin_OversamplingFactor
Defines the bit length in ticks in the range of 1 to 16. The lengths of 1 to 3 are not allowed Defini...
Definition: IfxAsclin.h:234
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
__absf
#define __absf
Definition: IfxCpu_IntrinsicsDcc.h:1629
IfxAsclin_ClockSource
IfxAsclin_ClockSource
Selection of clock source Definition in Ifx_ASCLIN.CSR.B.CLKSEL.
Definition: IfxAsclin.h:109
IfxAsclin_enableAscErrorFlags
void IfxAsclin_enableAscErrorFlags(Ifx_ASCLIN *asclin, boolean parEnable, boolean rfoEnable)
Enables the ASC error interrupt Flags.
Definition: IfxAsclin.c:63
IfxAsclin_setPrescaler
IFX_INLINE void IfxAsclin_setPrescaler(Ifx_ASCLIN *asclin, uint16 prescaler)
Sets the division ratio of the predivider (prescaler)
Definition: IfxAsclin.h:2357
IfxAsclin_Index_none
Not Selected.
Definition: IfxAsclin_cfg.h:79
IfxAsclin_enableRxFifoOverflowFlag
IFX_INLINE void IfxAsclin_enableRxFifoOverflowFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Rx FIFO overflow flag.
Definition: IfxAsclin.h:1874
IfxAsclin_SamplePointPosition
IfxAsclin_SamplePointPosition
Sample point position Definition in Ifx_ASCLIN.BITCON.B.SAMPLEPOINT.
Definition: IfxAsclin.h:330
IfxAsclin_setBaudrateBitFields
void IfxAsclin_setBaudrateBitFields(Ifx_ASCLIN *asclin, uint16 prescaler, uint16 numerator, uint16 denominator, IfxAsclin_OversamplingFactor oversampling)
Sets the baudrate bit fields.
Definition: IfxAsclin.c:319
IfxAsclin_getSrcPointerRx
volatile Ifx_SRC_SRCR * IfxAsclin_getSrcPointerRx(Ifx_ASCLIN *asclin)
Returns the SRC pointer for Rx.
Definition: IfxAsclin.c:192
IfxAsclin_read8
uint32 IfxAsclin_read8(Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
Reads data up to 8 bits.
Definition: IfxAsclin.c:286
IfxAsclin_ClockSource_ascSlowClock
f asclins will be supplied
Definition: IfxAsclin.h:113
IfxAsclin_write16
uint32 IfxAsclin_write16(Ifx_ASCLIN *asclin, uint16 *data, uint32 count)
Writes data up to 16 bits.
Definition: IfxAsclin.c:448
IfxAsclin_write8
uint32 IfxAsclin_write8(Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
Writes data up to 8 bits.
Definition: IfxAsclin.c:476
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxAsclin_getClockStatus
IFX_INLINE boolean IfxAsclin_getClockStatus(Ifx_ASCLIN *asclin)
Returns the clock status.
Definition: IfxAsclin.h:1958
__maxu
uint32 __maxu(uint32, uint32) __attribute__((intrinsic_pseudo(3
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxAsclin_disableModule
void IfxAsclin_disableModule(Ifx_ASCLIN *asclin)
Disables the module.
Definition: IfxAsclin.c:54
IfxAsclin_ClockSource_noClock
no clock will be supplied
Definition: IfxAsclin.h:111
IfxAsclin_setEnableModuleRequest
IFX_INLINE void IfxAsclin_setEnableModuleRequest(Ifx_ASCLIN *asclin)
Sets the enable module request.
Definition: IfxAsclin.h:2261
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxAsclin_setOversampling
IFX_INLINE void IfxAsclin_setOversampling(Ifx_ASCLIN *asclin, IfxAsclin_OversamplingFactor ovsFactor)
Sets the division ratio of the baudrate post divider.
Definition: IfxAsclin.h:2345
IfxAsclin_read16
uint32 IfxAsclin_read16(Ifx_ASCLIN *asclin, uint16 *data, uint32 count)
Reads data up to 16 bits.
Definition: IfxAsclin.c:258
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxAsclin_getClockSource
IFX_INLINE uint8 IfxAsclin_getClockSource(Ifx_ASCLIN *asclin)
Returns the clock source.
Definition: IfxAsclin.h:1952
IfxAsclin.h
ASCLIN basic functionality.
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxAsclin_setDisableModuleRequest
IFX_INLINE void IfxAsclin_setDisableModuleRequest(Ifx_ASCLIN *asclin)
Sets the disable module request.
Definition: IfxAsclin.h:2255
IfxAsclin_getPdFrequency
float32 IfxAsclin_getPdFrequency(Ifx_ASCLIN *asclin)
Returns the PD frequency.
Definition: IfxAsclin.c:147
IfxAsclin_setClockSource
void IfxAsclin_setClockSource(Ifx_ASCLIN *asclin, IfxAsclin_ClockSource clockSource)
Sets the clock source.
Definition: IfxAsclin.c:430


iLLD_TC38A: IfxAsclin.h Source File

  • Asclin
  • Std
IfxAsclin.h
Go to the documentation of this file.
1 /**
2 * \file IfxAsclin.h
3 * \brief ASCLIN basic functionality
4 * \ingroup IfxLld_Asclin
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 *
43 * \defgroup IfxLld_Asclin_Std_Enumerations Enumerations
44 * \ingroup IfxLld_Asclin_Std
45 * \defgroup IfxLld_Asclin_Std_Operative Operative Functions
46 * \ingroup IfxLld_Asclin_Std
47 * \defgroup IfxLld_Asclin_Std_Utility Utility Functions
48 * \ingroup IfxLld_Asclin_Std
49 * \defgroup IfxLld_Asclin_Std_Configuration Configuration Functions
50 * \ingroup IfxLld_Asclin_Std
51 * \defgroup IfxLld_Asclin_Std_External External Functions
52 * \ingroup IfxLld_Asclin_Std
53 * \defgroup IfxLld_Asclin_Std_IO IO Pin Configuration Functions
54 * \ingroup IfxLld_Asclin_Std
55 */
56
57 #ifndef IFXASCLIN_H
58 #define IFXASCLIN_H 1
59
60 /******************************************************************************/
61 /*----------------------------------Includes----------------------------------*/
62 /******************************************************************************/
63
64 #include "_Impl/IfxAsclin_cfg.h"
65 #include "Scu/Std/IfxScuCcu.h"
66 #include "Scu/Std/IfxScuWdt.h"
67 #include "Cpu/Std/IfxCpu_Intrinsics.h"
68 #include "IfxAsclin_reg.h"
69 #include "Src/Std/IfxSrc.h"
70 #include "_PinMap/IfxAsclin_PinMap.h"
71
72 /******************************************************************************/
73 /*--------------------------------Enumerations--------------------------------*/
74 /******************************************************************************/
75
76 /** \addtogroup IfxLld_Asclin_Std_Enumerations
77 * \{ */
78 /** \brief Defines if the classic or the enhanced checksum will be calculated by the checksum block.\n
79 * Definition in Ifx_ASCLIN.DATCON.B.CSM
80 */
81 typedef enum
82 {
83 IfxAsclin_Checksum_classic = 0, /**< \brief classic checksum */
84 IfxAsclin_Checksum_enhanced = 1 /**< \brief enhanced checksum */
85 } IfxAsclin_Checksum;
86
87 /** \brief Defines if the received checksum byte is written into the RXFifo or not.\n
88 * Definition in Ifx_ASCLIN.LIN.CON.B.CSI
89 */
90 typedef enum
91 {
92 IfxAsclin_ChecksumInjection_notWritten = 0, /**< \brief checksum byte is not written */
93 IfxAsclin_ChecksumInjection_written = 1 /**< \brief checksum byte is written */
94 } IfxAsclin_ChecksumInjection;
95
96 /** \brief CPOL defines the idle level of the clock signal in the SPI mode.\n
97 * Idle level is the level outside the data transmission time intervals.\n
98 * Definition in Ifx_ASCLIN.IOCR.B.CPOL
99 */
100 typedef enum
101 {
102 IfxAsclin_ClockPolarity_idleLow = 0, /**< \brief idle low */
103 IfxAsclin_ClockPolarity_idleHigh = 1 /**< \brief idle high */
104 } IfxAsclin_ClockPolarity;
105
106 /** \brief Selection of clock source\n
107 * Definition in Ifx_ASCLIN.CSR.B.CLKSEL
108 */
109 typedef enum
110 {
111 IfxAsclin_ClockSource_noClock = 0, /**< \brief no clock will be supplied */
112 IfxAsclin_ClockSource_ascFastClock = 2, /**< \brief f asclinf wiil be supplied */
113 IfxAsclin_ClockSource_ascSlowClock = 4 /**< \brief f asclins will be supplied */
114 } IfxAsclin_ClockSource;
115
116 /** \brief CTS input pin selection\n
117 * Definition in Ifx_ASCLIN.IOCR.B.CTS
118 */
119 typedef enum
120 {
121 IfxAsclin_CtsInputSelect_0, /**< \brief CTS input pin 0 */
122 IfxAsclin_CtsInputSelect_1, /**< \brief CTS input pin 1 */
123 IfxAsclin_CtsInputSelect_2, /**< \brief CTS input pin 2 */
124 IfxAsclin_CtsInputSelect_3 /**< \brief CTS input pin 3 */
125 } IfxAsclin_CtsInputSelect;
126
127 /** \brief Number of bits per transfer\n
128 * Definition in Ifx_ASCLIN.FRAMECON.B.DATALEN
129 */
130 typedef enum
131 {
132 IfxAsclin_DataLength_1 = 0, /**< \brief number of bits per transfer 0 */
133 IfxAsclin_DataLength_2, /**< \brief number of bits per transfer 1 */
134 IfxAsclin_DataLength_3, /**< \brief number of bits per transfer 2 */
135 IfxAsclin_DataLength_4, /**< \brief number of bits per transfer 3 */
136 IfxAsclin_DataLength_5, /**< \brief number of bits per transfer 4 */
137 IfxAsclin_DataLength_6, /**< \brief number of bits per transfer 5 */
138 IfxAsclin_DataLength_7, /**< \brief number of bits per transfer 6 */
139 IfxAsclin_DataLength_8, /**< \brief number of bits per transfer 7 */
140 IfxAsclin_DataLength_9, /**< \brief number of bits per transfer 8 */
141 IfxAsclin_DataLength_10, /**< \brief number of bits per transfer 9 */
142 IfxAsclin_DataLength_11, /**< \brief number of bits per transfer 10 */
143 IfxAsclin_DataLength_12, /**< \brief number of bits per transfer 11 */
144 IfxAsclin_DataLength_13, /**< \brief number of bits per transfer 12 */
145 IfxAsclin_DataLength_14, /**< \brief number of bits per transfer 13 */
146 IfxAsclin_DataLength_15, /**< \brief number of bits per transfer 14 */
147 IfxAsclin_DataLength_16 /**< \brief number of bits per transfer 15 */
148 } IfxAsclin_DataLength;
149
150 /** \brief Defines the interrupt generation modes of Tx FIFO and Rx FIFO\n
151 * Definition in Ifx_ASCLIN.RXFIFOCON.B.FM and Ifx_ASCLIN.TXFIFOCON.B.FM
152 */
153 typedef enum
154 {
155 IfxAsclin_FifoInterruptMode_combined, /**< \brief Combined Move Mode */
156 IfxAsclin_FifoInterruptMode_single, /**< \brief Single Move Mode */
157 IfxAsclin_FifoInterruptMode_batch /**< \brief Batch Move Mode */
158 } IfxAsclin_FifoInterruptMode;
159
160 /** \brief Defines the basic operating mode of the module. Changing the mode must be done by switching first to initialize mode, and then to the other mode.\n
161 * Definition in Ifx_ASCLIN.FRAMECON.B.MODE
162 */
163 typedef enum
164 {
165 IfxAsclin_FrameMode_initialise = 0, /**< \brief initialise mode */
166 IfxAsclin_FrameMode_asc = 1, /**< \brief asc mode */
167 IfxAsclin_FrameMode_spi = 2, /**< \brief spi mode */
168 IfxAsclin_FrameMode_lin = 3 /**< \brief lin mode */
169 } IfxAsclin_FrameMode;
170
171 /** \brief Defines if LIN frame shall consist of a header and response or of a header only.\n
172 * Definition in Ifx_ASCLIN.DATCON.B.HO
173 */
174 typedef enum
175 {
176 IfxAsclin_HeaderResponseSelect_headerAndResponse = 0, /**< \brief header and response expected */
177 IfxAsclin_HeaderResponseSelect_headerOnly = 1 /**< \brief header only expected */
178 } IfxAsclin_HeaderResponseSelect;
179
180 /** \brief Defines the duration of the IDLE delay in bit times.\n
181 * SPI mode: this is the idle time between the frames.\n
182 * ASC and LIN mode: this is the pause inserted between transmission of bytes.\n
183 * Definition in Ifx_ASCLIN.FRAMECON.B.IDLE
184 */
185 typedef enum
186 {
187 IfxAsclin_IdleDelay_0, /**< \brief idle delay in 0 bit times */
188 IfxAsclin_IdleDelay_1, /**< \brief idle delay in 1 bit times */
189 IfxAsclin_IdleDelay_2, /**< \brief idle delay in 2 bit times */
190 IfxAsclin_IdleDelay_3, /**< \brief idle delay in 3 bit times */
191 IfxAsclin_IdleDelay_4, /**< \brief idle delay in 4 bit times */
192 IfxAsclin_IdleDelay_5, /**< \brief idle delay in 5 bit times */
193 IfxAsclin_IdleDelay_6, /**< \brief idle delay in 6 bit times */
194 IfxAsclin_IdleDelay_7 /**< \brief idle delay in 7 bit times */
195 } IfxAsclin_IdleDelay;
196
197 /** \brief Defines the leading delay in bit times in SPI mode. ASC mode: not applicable.\n
198 * LIN mode: delay between the end of the break and the start of the sync character.\n
199 * Definition in Ifx_ASCLIN.FRAMECON.B.LEAD
200 */
201 typedef enum
202 {
203 IfxAsclin_LeadDelay_0, /**< \brief lead delay in 0 bit times */
204 IfxAsclin_LeadDelay_1, /**< \brief lead delay in 1 bit times */
205 IfxAsclin_LeadDelay_2, /**< \brief lead delay in 2 bit times */
206 IfxAsclin_LeadDelay_3, /**< \brief lead delay in 3 bit times */
207 IfxAsclin_LeadDelay_4, /**< \brief lead delay in 4 bit times */
208 IfxAsclin_LeadDelay_5, /**< \brief lead delay in 5 bit times */
209 IfxAsclin_LeadDelay_6, /**< \brief lead delay in 6 bit times */
210 IfxAsclin_LeadDelay_7 /**< \brief lead delay in 7 bit times */
211 } IfxAsclin_LeadDelay;
212
213 /** \brief Configures if the module in LIN mode operates as master or slave\n
214 * Definition in Ifx_ASCLIN.LIN.CON.B.MS
215 */
216 typedef enum
217 {
218 IfxAsclin_LinMode_slave = 0, /**< \brief operates in slave mode */
219 IfxAsclin_LinMode_master = 1 /**< \brief operates in master mode */
220 } IfxAsclin_LinMode;
221
222 /** \brief Defines the timeout threshold of RESPOSE bit is for LIN response timeout or LIN frame timeout.\n
223 * Definition in Ifx_ASCLIN.DATCON.B.RM
224 */
225 typedef enum
226 {
227 IfxAsclin_LinResponseTimeoutMode_frameTimeout = 0, /**< \brief timeout threshold is for frame */
228 IfxAsclin_LinResponseTimeoutMode_responseTimeout = 1 /**< \brief timeout threshold is for reponse */
229 } IfxAsclin_LinResponseTimeoutMode;
230
231 /** \brief Defines the bit length in ticks in the range of 1 to 16. The lengths of 1 to 3 are not allowed\n
232 * Definition in Ifx_ASCLIN.BITCON.B.OVERSAMPLING
233 */
234 typedef enum
235 {
236 IfxAsclin_OversamplingFactor_4 = 3, /**< \brief oversampling factor 4 */
237 IfxAsclin_OversamplingFactor_5 = 4, /**< \brief oversampling factor 5 */
238 IfxAsclin_OversamplingFactor_6 = 5, /**< \brief oversampling factor 6 */
239 IfxAsclin_OversamplingFactor_7 = 6, /**< \brief oversampling factor 7 */
240 IfxAsclin_OversamplingFactor_8 = 7, /**< \brief oversampling factor 8 */
241 IfxAsclin_OversamplingFactor_9 = 8, /**< \brief oversampling factor 9 */
242 IfxAsclin_OversamplingFactor_10 = 9, /**< \brief oversampling factor 10 */
243 IfxAsclin_OversamplingFactor_11 = 10, /**< \brief oversampling factor 11 */
244 IfxAsclin_OversamplingFactor_12 = 11, /**< \brief oversampling factor 12 */
245 IfxAsclin_OversamplingFactor_13 = 12, /**< \brief oversampling factor 13 */
246 IfxAsclin_OversamplingFactor_14 = 13, /**< \brief oversampling factor 14 */
247 IfxAsclin_OversamplingFactor_15 = 14, /**< \brief oversampling factor 15 */
248 IfxAsclin_OversamplingFactor_16 = 15 /**< \brief oversampling factor 16 */
249 } IfxAsclin_OversamplingFactor;
250
251 /** \brief Type of parity bit attached to data bits\n
252 * Definition in Ifx_ASCLIN.FRAMECON.B.ODD
253 */
254 typedef enum
255 {
256 IfxAsclin_ParityType_even = 0, /**< \brief even parity */
257 IfxAsclin_ParityType_odd = 1 /**< \brief odd parity */
258 } IfxAsclin_ParityType;
259
260 /** \brief Receive buffer mode\n
261 * Definition in Ifx_ASCLIN.RXFIFOCON.B.BUF
262 */
263 typedef enum
264 {
265 IfxAsclin_ReceiveBufferMode_rxFifo = 0, /**< \brief RxFIFO mode */
266 IfxAsclin_ReceiveBufferMode_rxBuffer = 1 /**< \brief single stage Rx buffer */
267 } IfxAsclin_ReceiveBufferMode;
268
269 /** \brief Polarity of the RTS and CTS signals\n
270 * Definition in Ifx_ASCLIN.IOCR.B.RCPOL
271 */
272 typedef enum
273 {
274 IfxAsclin_RtsCtsPolarity_activeHigh = 0, /**< \brief ready/clear are active-high */
275 IfxAsclin_RtsCtsPolarity_activeLow = 1 /**< \brief ready/clear are active-low */
276 } IfxAsclin_RtsCtsPolarity;
277
278 /** \brief Defines the filling level that triggers a drain (RX) interrupt or DMA access\n
279 * Definition in Ifx_ASCLIN.RXFIFOCON.B.INTLEVEL
280 */
281 typedef enum
282 {
283 IfxAsclin_RxFifoInterruptLevel_1, /**< \brief RX FIFO level 1 */
284 IfxAsclin_RxFifoInterruptLevel_2, /**< \brief RX FIFO level 2 */
285 IfxAsclin_RxFifoInterruptLevel_3, /**< \brief RX FIFO level 3 */
286 IfxAsclin_RxFifoInterruptLevel_4, /**< \brief RX FIFO level 4 */
287 IfxAsclin_RxFifoInterruptLevel_5, /**< \brief RX FIFO level 5 */
288 IfxAsclin_RxFifoInterruptLevel_6, /**< \brief RX FIFO level 6 */
289 IfxAsclin_RxFifoInterruptLevel_7, /**< \brief RX FIFO level 7 */
290 IfxAsclin_RxFifoInterruptLevel_8, /**< \brief RX FIFO level 8 */
291 IfxAsclin_RxFifoInterruptLevel_9, /**< \brief RX FIFO level 9 */
292 IfxAsclin_RxFifoInterruptLevel_10, /**< \brief RX FIFO level 10 */
293 IfxAsclin_RxFifoInterruptLevel_11, /**< \brief RX FIFO level 11 */
294 IfxAsclin_RxFifoInterruptLevel_12, /**< \brief RX FIFO level 12 */
295 IfxAsclin_RxFifoInterruptLevel_13, /**< \brief RX FIFO level 13 */
296 IfxAsclin_RxFifoInterruptLevel_14, /**< \brief RX FIFO level 14 */
297 IfxAsclin_RxFifoInterruptLevel_15, /**< \brief RX FIFO level 15 */
298 IfxAsclin_RxFifoInterruptLevel_16 /**< \brief RX FIFO level 16 */
299 } IfxAsclin_RxFifoInterruptLevel;
300
301 /** \brief Defines the number of bytes read from the Rx FIFO with one FPI bus read\n
302 * Definition in Ifx_ASCLIN.RXFIFOCON.B.OUTW
303 */
304 typedef enum
305 {
306 IfxAsclin_RxFifoOutletWidth_0, /**< \brief number of bytes 0 */
307 IfxAsclin_RxFifoOutletWidth_1, /**< \brief number of bytes 1 */
308 IfxAsclin_RxFifoOutletWidth_2, /**< \brief number of bytes 2 */
309 IfxAsclin_RxFifoOutletWidth_3 /**< \brief number of bytes 3 */
310 } IfxAsclin_RxFifoOutletWidth;
311
312 /** \brief Alternate input selection for Rx signal.\n
313 * Definition in Ifx_ASCLIN.IOCR.B.ALTI
314 */
315 typedef enum
316 {
317 IfxAsclin_RxInputSelect_0, /**< \brief alternate input selection 0 */
318 IfxAsclin_RxInputSelect_1, /**< \brief alternate input selection 1 */
319 IfxAsclin_RxInputSelect_2, /**< \brief alternate input selection 2 */
320 IfxAsclin_RxInputSelect_3, /**< \brief alternate input selection 3 */
321 IfxAsclin_RxInputSelect_4, /**< \brief alternate input selection 4 */
322 IfxAsclin_RxInputSelect_5, /**< \brief alternate input selection 5 */
323 IfxAsclin_RxInputSelect_6, /**< \brief alternate input selection 6 */
324 IfxAsclin_RxInputSelect_7 /**< \brief alternate input selection 7 */
325 } IfxAsclin_RxInputSelect;
326
327 /** \brief Sample point position\n
328 * Definition in Ifx_ASCLIN.BITCON.B.SAMPLEPOINT
329 */
330 typedef enum
331 {
332 IfxAsclin_SamplePointPosition_1 = 1, /**< \brief sample point position at 1 */
333 IfxAsclin_SamplePointPosition_2 = 2, /**< \brief sample point position at 2 */
334 IfxAsclin_SamplePointPosition_3 = 3, /**< \brief sample point position at 3 */
335 IfxAsclin_SamplePointPosition_4 = 4, /**< \brief sample point position at 4 */
336 IfxAsclin_SamplePointPosition_5 = 5, /**< \brief sample point position at 5 */
337 IfxAsclin_SamplePointPosition_6 = 6, /**< \brief sample point position at 6 */
338 IfxAsclin_SamplePointPosition_7 = 7, /**< \brief sample point position at 7 */
339 IfxAsclin_SamplePointPosition_8 = 8, /**< \brief sample point position at 8 */
340 IfxAsclin_SamplePointPosition_9 = 9, /**< \brief sample point position at 9 */
341 IfxAsclin_SamplePointPosition_10 = 10, /**< \brief sample point position at 10 */
342 IfxAsclin_SamplePointPosition_11 = 11, /**< \brief sample point position at 11 */
343 IfxAsclin_SamplePointPosition_12 = 12, /**< \brief sample point position at 12 */
344 IfxAsclin_SamplePointPosition_13 = 13, /**< \brief sample point position at 13 */
345 IfxAsclin_SamplePointPosition_14 = 14, /**< \brief sample point position at 14 */
346 IfxAsclin_SamplePointPosition_15 = 15 /**< \brief sample point position at 15 */
347 } IfxAsclin_SamplePointPosition;
348
349 /** \brief Number of samples per bit, sample mode/medianfilter\n
350 * Definition in Ifx_ASCLIN.BITCON.B.SM
351 */
352 typedef enum
353 {
354 IfxAsclin_SamplesPerBit_one = 0, /**< \brief one sample per bit */
355 IfxAsclin_SamplesPerBit_three = 1 /**< \brief three samples per bit */
356 } IfxAsclin_SamplesPerBit;
357
358 /** \brief SPI mode: defines the shift direction of the shift register.\n
359 * ASC and LIN mode: should be set to 0.\n
360 * Definition in Ifx_ASCLIN.FRAMECON.B.MSB
361 */
362 typedef enum
363 {
364 IfxAsclin_ShiftDirection_lsbFirst = 0, /**< \brief LSB first */
365 IfxAsclin_ShiftDirection_msbFirst = 1 /**< \brief MSB first */
366 } IfxAsclin_ShiftDirection;
367
368 /** \brief Defines the idle level of the SLSO signal, which is the level.\n
369 * Outside the data transmission, leading and trailing time intervals.\n
370 * Definition in Ifx_ASCLIN.IOCR.B.SPOL
371 */
372 typedef enum
373 {
374 IfxAsclin_SlavePolarity_idleLow = 0, /**< \brief idle low */
375 IfxAsclin_SlavePolarity_idlehigh = 1 /**< \brief idle high */
376 } IfxAsclin_SlavePolarity;
377
378 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
379 * Definition in Ifx_ASCLIN.CLC.B.EDIS
380 */
381 typedef enum
382 {
383 IfxAsclin_SleepMode_enable = 0, /**< \brief enables sleep mode */
384 IfxAsclin_SleepMode_disable = 1 /**< \brief disables sleep mode */
385 } IfxAsclin_SleepMode;
386
387 /** \brief Error status
388 */
389 typedef enum
390 {
391 IfxAsclin_Status_configurationError = 0, /**< \brief Configuration error */
392 IfxAsclin_Status_noError = 1 /**< \brief No error */
393 } IfxAsclin_Status;
394
395 /** \brief ASC and LIN mode: number of stop bits (0 is not allowed), SPI mode: trailing delay.\n
396 * Definition in Ifx_ASCLIN.FRAMECON.B.STOP
397 */
398 typedef enum
399 {
400 IfxAsclin_StopBit_0, /**< \brief number of stop bits 0 */
401 IfxAsclin_StopBit_1, /**< \brief number of stop bits 1 */
402 IfxAsclin_StopBit_2, /**< \brief number of stop bits 2 */
403 IfxAsclin_StopBit_3, /**< \brief number of stop bits 3 */
404 IfxAsclin_StopBit_4, /**< \brief number of stop bits 4 */
405 IfxAsclin_StopBit_5, /**< \brief number of stop bits 5 */
406 IfxAsclin_StopBit_6, /**< \brief number of stop bits 6 */
407 IfxAsclin_StopBit_7 /**< \brief number of stop bits 7 */
408 } IfxAsclin_StopBit;
409
410 /** \brief OCDS Suspend Control (OCDS.SUS)
411 */
412 typedef enum
413 {
414 IfxAsclin_SuspendMode_none = 0, /**< \brief No suspend */
415 IfxAsclin_SuspendMode_hard = 1, /**< \brief Hard Suspend */
416 IfxAsclin_SuspendMode_soft = 2 /**< \brief Soft Suspend */
417 } IfxAsclin_SuspendMode;
418
419 /** \brief Defines the number of bytes written to the Tx FIFO with one FPI bus write\n
420 * Definition in Ifx_ASCLIN.TXFIFOCON.B.INW
421 */
422 typedef enum
423 {
424 IfxAsclin_TxFifoInletWidth_0, /**< \brief number of bytes 0 */
425 IfxAsclin_TxFifoInletWidth_1, /**< \brief number of bytes 1 */
426 IfxAsclin_TxFifoInletWidth_2, /**< \brief number of bytes 2 */
427 IfxAsclin_TxFifoInletWidth_3 /**< \brief number of bytes 3 */
428 } IfxAsclin_TxFifoInletWidth;
429
430 /** \brief Defines the filling level that triggers a refill (TX) interrupt or DMA access\n
431 * Definition in Ifx_ASCLIN.TXFIFOCON.B.INTLEVEL
432 */
433 typedef enum
434 {
435 IfxAsclin_TxFifoInterruptLevel_0, /**< \brief TX FIFO level 0 */
436 IfxAsclin_TxFifoInterruptLevel_1, /**< \brief TX FIFO level 1 */
437 IfxAsclin_TxFifoInterruptLevel_2, /**< \brief TX FIFO level 2 */
438 IfxAsclin_TxFifoInterruptLevel_3, /**< \brief TX FIFO level 3 */
439 IfxAsclin_TxFifoInterruptLevel_4, /**< \brief TX FIFO level 4 */
440 IfxAsclin_TxFifoInterruptLevel_5, /**< \brief TX FIFO level 5 */
441 IfxAsclin_TxFifoInterruptLevel_6, /**< \brief TX FIFO level 6 */
442 IfxAsclin_TxFifoInterruptLevel_7, /**< \brief TX FIFO level 7 */
443 IfxAsclin_TxFifoInterruptLevel_8, /**< \brief TX FIFO level 8 */
444 IfxAsclin_TxFifoInterruptLevel_9, /**< \brief TX FIFO level 9 */
445 IfxAsclin_TxFifoInterruptLevel_10, /**< \brief TX FIFO level 10 */
446 IfxAsclin_TxFifoInterruptLevel_11, /**< \brief TX FIFO level 11 */
447 IfxAsclin_TxFifoInterruptLevel_12, /**< \brief TX FIFO level 12 */
448 IfxAsclin_TxFifoInterruptLevel_13, /**< \brief TX FIFO level 13 */
449 IfxAsclin_TxFifoInterruptLevel_14, /**< \brief TX FIFO level 14 */
450 IfxAsclin_TxFifoInterruptLevel_15 /**< \brief TX FIFO level 15 */
451 } IfxAsclin_TxFifoInterruptLevel;
452
453 /** \} */
454
455 /** \addtogroup IfxLld_Asclin_Std_Operative
456 * \{ */
457
458 /******************************************************************************/
459 /*-------------------------Inline Function Prototypes-------------------------*/
460 /******************************************************************************/
461
462 /** \brief clears all the flags
463 * \param asclin pointer to ASCLIN registers
464 * \return None
465 */
466 IFX_INLINE void IfxAsclin_clearAllFlags(Ifx_ASCLIN *asclin);
467
468 /** \brief Clears the break detected flag
469 * \param asclin pointer to ASCLIN registers
470 * \return None
471 */
472 IFX_INLINE void IfxAsclin_clearBreakDetectedFlag(Ifx_ASCLIN *asclin);
473
474 /** \brief Clears the collision detection error flag
475 * \param asclin pointer to ASCLIN registers
476 * \return None
477 */
478 IFX_INLINE void IfxAsclin_clearCollisionDetectionErrorFlag(Ifx_ASCLIN *asclin);
479
480 /** \brief Clears the falling edge detected flag
481 * \param asclin pointer to ASCLIN registers
482 * \return None
483 */
484 IFX_INLINE void IfxAsclin_clearFallingEdgeDetectedFlag(Ifx_ASCLIN *asclin);
485
486 /** \brief Clears the frame error flag
487 * \param asclin pointer to ASCLIN registers
488 * \return None
489 */
490 IFX_INLINE void IfxAsclin_clearFrameErrorFlag(Ifx_ASCLIN *asclin);
491
492 /** \brief Clears the header timeout flag
493 * \param asclin pointer to ASCLIN registers
494 * \return None
495 */
496 IFX_INLINE void IfxAsclin_clearHeaderTimeoutFlag(Ifx_ASCLIN *asclin);
497
498 /** \brief Clears the kernel reset status
499 * \param asclin pointer to ASCLIN registers
500 * \return None
501 */
502 IFX_INLINE void IfxAsclin_clearKernelResetStatus(Ifx_ASCLIN *asclin);
503
504 /** \brief Clears the auto baudrate detection error flag
505 * \param asclin pointer to ASCLIN registers
506 * \return None
507 */
508 IFX_INLINE void IfxAsclin_clearLinAutoBaudDetectionErrorFlag(Ifx_ASCLIN *asclin);
509
510 /** \brief Clears the LIN checksum error flag
511 * \param asclin pointer to ASCLIN registers
512 * \return None
513 */
514 IFX_INLINE void IfxAsclin_clearLinChecksumErrorFlag(Ifx_ASCLIN *asclin);
515
516 /** \brief Clears the LIN parity error flag
517 * \param asclin pointer to ASCLIN registers
518 * \return None
519 */
520 IFX_INLINE void IfxAsclin_clearLinParityErrorFlag(Ifx_ASCLIN *asclin);
521
522 /** \brief Clears the parity error flag
523 * \param asclin pointer to ASCLIN registers
524 * \return None
525 */
526 IFX_INLINE void IfxAsclin_clearParityErrorFlag(Ifx_ASCLIN *asclin);
527
528 /** \brief Clears the raising edge detected flag
529 * \param asclin pointer to ASCLIN registers
530 * \return None
531 */
532 IFX_INLINE void IfxAsclin_clearRaisingEdgeDetectedFlag(Ifx_ASCLIN *asclin);
533
534 /** \brief Clears the response timeout flag
535 * \param asclin pointer to ASCLIN registers
536 * \return None
537 */
538 IFX_INLINE void IfxAsclin_clearResponseTimeoutFlag(Ifx_ASCLIN *asclin);
539
540 /** \brief Clears the Rx FIFO level flag
541 * \param asclin pointer to ASCLIN registers
542 * \return None
543 */
544 IFX_INLINE void IfxAsclin_clearRxFifoFillLevelFlag(Ifx_ASCLIN *asclin);
545
546 /** \brief Clears the Rx FIFO overflow flag
547 * \param asclin pointer to ASCLIN registers
548 * \return None
549 */
550 IFX_INLINE void IfxAsclin_clearRxFifoOverflowFlag(Ifx_ASCLIN *asclin);
551
552 /** \brief Clears the Rx FIFO underflow flag
553 * \param asclin pointer to ASCLIN registers
554 * \return None
555 */
556 IFX_INLINE void IfxAsclin_clearRxFifoUnderflowFlag(Ifx_ASCLIN *asclin);
557
558 /** \brief Clears the receive header end flag
559 * \param asclin pointer to ASCLIN registers
560 * \return None
561 */
562 IFX_INLINE void IfxAsclin_clearRxHeaderEndFlag(Ifx_ASCLIN *asclin);
563
564 /** \brief Clears the receive response end flag
565 * \param asclin pointer to ASCLIN registers
566 * \return None
567 */
568 IFX_INLINE void IfxAsclin_clearRxResponseEndFlag(Ifx_ASCLIN *asclin);
569
570 /** \brief Clears the transmission pending flag
571 * \param asclin pointer to ASCLIN registers
572 * \return None
573 */
574 IFX_INLINE void IfxAsclin_clearTransmissionCompletedFlag(Ifx_ASCLIN *asclin);
575
576 /** \brief Clears the Tx FIFO level flag
577 * \param asclin pointer to ASCLIN registers
578 * \return None
579 */
580 IFX_INLINE void IfxAsclin_clearTxFifoFillLevelFlag(Ifx_ASCLIN *asclin);
581
582 /** \brief Clears the Tx FIFO overflow flag
583 * \param asclin pointer to ASCLIN registers
584 * \return None
585 */
586 IFX_INLINE void IfxAsclin_clearTxFifoOverflowFlag(Ifx_ASCLIN *asclin);
587
588 /** \brief Clears the transmit header end flag
589 * \param asclin pointer to ASCLIN registers
590 * \return None
591 */
592 IFX_INLINE void IfxAsclin_clearTxHeaderEndFlag(Ifx_ASCLIN *asclin);
593
594 /** \brief Clears the transmit response end flag
595 * \param asclin pointer to ASCLIN registers
596 * \return None
597 */
598 IFX_INLINE void IfxAsclin_clearTxResponseEndFlag(Ifx_ASCLIN *asclin);
599
600 /** \brief Flushes (empties) the Rx FIFO
601 * \param asclin pointer to ASCLIN registers
602 * \return None
603 */
604 IFX_INLINE void IfxAsclin_flushRxFifo(Ifx_ASCLIN *asclin);
605
606 /** \brief Flushes (empties) the Tx FIFO
607 * \param asclin pointer to ASCLIN registers
608 * \return None
609 */
610 IFX_INLINE void IfxAsclin_flushTxFifo(Ifx_ASCLIN *asclin);
611
612 /** \brief Sets the baudrate detection's lower limit
613 * \param asclin pointer to ASCLIN registers
614 * \param limit value of the lower limit
615 * \return None
616 */
617 IFX_INLINE void IfxAsclin_setBrdLowerlimt(Ifx_ASCLIN *asclin, uint8 limit);
618
619 /** \brief Sets the baudrate detection's upper limit
620 * \param asclin pointer to ASCLIN registers
621 * \param limit value of the upper limit
622 * \return None
623 */
624 IFX_INLINE void IfxAsclin_setBrdUpperlimt(Ifx_ASCLIN *asclin, uint8 limit);
625
626 /** \brief Sets the checksum injection
627 * \param asclin pointer to ASCLIN registers
628 * \param csi checksum injection selection (not written / written)
629 * \return None
630 */
631 IFX_INLINE void IfxAsclin_setChecksumInjection(Ifx_ASCLIN *asclin, IfxAsclin_ChecksumInjection csi);
632
633 /** \brief Sets the checksum mode
634 * \param asclin pointer to ASCLIN registers
635 * \param mode checksum mode selection (classic / enhanced)
636 * \return None
637 */
638 IFX_INLINE void IfxAsclin_setChecksumMode(Ifx_ASCLIN *asclin, IfxAsclin_Checksum mode);
639
640 /** \brief Sets the data length (number of bits per transfer)
641 * \param asclin pointer to ASCLIN registers
642 * \param length data length selection
643 * \return None
644 */
645 IFX_INLINE void IfxAsclin_setDataLength(Ifx_ASCLIN *asclin, IfxAsclin_DataLength length);
646
647 /** \brief Sets the denominator of the fractional divider
648 * \param asclin pointer to ASCLIN registers
649 * \param denominator value of the denominator
650 * \return None
651 */
652 IFX_INLINE void IfxAsclin_setDenominator(Ifx_ASCLIN *asclin, uint16 denominator);
653
654 /** \brief Sets the disable module request
655 * \param asclin pointer to ASCLIN registers
656 * \return None
657 */
658 IFX_INLINE void IfxAsclin_setDisableModuleRequest(Ifx_ASCLIN *asclin);
659
660 /** \brief Sets the enable module request
661 * \param asclin pointer to ASCLIN registers
662 * \return None
663 */
664 IFX_INLINE void IfxAsclin_setEnableModuleRequest(Ifx_ASCLIN *asclin);
665
666 /** \brief Sets digital glitch filter depth
667 * \param asclin pointer to ASCLIN registers
668 * \param depth digital glitch filter depth selection (1 to 63)
669 * \return None
670 */
671 IFX_INLINE void IfxAsclin_setFilterDepth(Ifx_ASCLIN *asclin, uint8 depth);
672
673 /** \brief Sets the header response selection
674 * \param asclin pointer to ASCLIN registers
675 * \param type type of selection (header and response or header only)
676 * \return None
677 */
678 IFX_INLINE void IfxAsclin_setHeaderResponseSelect(Ifx_ASCLIN *asclin, IfxAsclin_HeaderResponseSelect type);
679
680 /** \brief Sets the idle delay
681 * \param asclin pointer to ASCLIN registers
682 * \param delay idle delay selection
683 * \return None
684 */
685 IFX_INLINE void IfxAsclin_setIdleDelay(Ifx_ASCLIN *asclin, IfxAsclin_IdleDelay delay);
686
687 /** \brief Sets the kernal reset of the KRST1
688 * \param asclin pointer to ASCLIN registers
689 * \return None
690 */
691 IFX_INLINE void IfxAsclin_setKernelResetOne(Ifx_ASCLIN *asclin);
692
693 /** \brief Sets the kernel reset of the KRST0
694 * \param asclin pointer to ASCLIN registers
695 * \return None
696 */
697 IFX_INLINE void IfxAsclin_setKernelResetZero(Ifx_ASCLIN *asclin);
698
699 /** \brief Sets the lead delay
700 * \param asclin pointer to ASCLIN registers
701 * \param delay lead delay selection
702 * \return None
703 */
704 IFX_INLINE void IfxAsclin_setLeadDelay(Ifx_ASCLIN *asclin, IfxAsclin_LeadDelay delay);
705
706 /** \brief Sets the LIN break length
707 * \param asclin pointer to ASCLIN registers
708 * \param length value of the break length
709 * \return None
710 */
711 IFX_INLINE void IfxAsclin_setLinBreakLength(Ifx_ASCLIN *asclin, uint8 length);
712
713 /** \brief Sets the LIN header timeout
714 * \param asclin pointer to ASCLIN registers
715 * \param timeout value of the header timeout
716 * \return None
717 */
718 IFX_INLINE void IfxAsclin_setLinHeaderTimeout(Ifx_ASCLIN *asclin, uint8 timeout);
719
720 /** \brief Sets the LIN mode of operation
721 * \param asclin pointer to ASCLIN registers
722 * \param mode mode selection (slave / master)
723 * \return None
724 */
725 IFX_INLINE void IfxAsclin_setLinMode(Ifx_ASCLIN *asclin, IfxAsclin_LinMode mode);
726
727 /** \brief Sets the LIN response timeout mode
728 * \param asclin pointer to ASCLIN registers
729 * \param mode LIN response timeout mode selection
730 * \return None
731 */
732 IFX_INLINE void IfxAsclin_setLinResponseTimeoutMode(Ifx_ASCLIN *asclin, IfxAsclin_LinResponseTimeoutMode mode);
733
734 /** \brief Sets the LIN response timeout threshold
735 * \param asclin pointer to ASCLIN registers
736 * \param threshold value of the tomeout threshold (1 to 256 bit times)
737 * \return None
738 */
739 IFX_INLINE void IfxAsclin_setLinResponseTimeoutThreshold(Ifx_ASCLIN *asclin, uint16 threshold);
740
741 /** \brief Sets the numerator of the fractional divider
742 * \param asclin pointer to ASCLIN registers
743 * \param numerator value of the numerator
744 * \return None
745 */
746 IFX_INLINE void IfxAsclin_setNumerator(Ifx_ASCLIN *asclin, uint16 numerator);
747
748 /** \brief Sets the division ratio of the baudrate post divider
749 * \param asclin pointer to ASCLIN registers
750 * \param ovsFactor value of oversampling factor
751 * \return None
752 */
753 IFX_INLINE void IfxAsclin_setOversampling(Ifx_ASCLIN *asclin, IfxAsclin_OversamplingFactor ovsFactor);
754
755 /** \brief Sets the parity type
756 * \param asclin pointer to ASCLIN registers
757 * \param type parity type selction (even / odd)
758 * \return None
759 */
760 IFX_INLINE void IfxAsclin_setParityType(Ifx_ASCLIN *asclin, IfxAsclin_ParityType type);
761
762 /** \brief Sets the division ratio of the predivider (prescaler)
763 * \param asclin pointer to ASCLIN registers
764 * \param prescaler value of prescaler
765 * \return None
766 */
767 IFX_INLINE void IfxAsclin_setPrescaler(Ifx_ASCLIN *asclin, uint16 prescaler);
768
769 /** \brief Sets the receive buffer mode
770 * \param asclin pointer to ASCLIN registers
771 * \param mode receive buffer mode selection (Rx FIFO or single stage Rx buffer)
772 * \return None
773 */
774 IFX_INLINE void IfxAsclin_setRxBufferMode(Ifx_ASCLIN *asclin, IfxAsclin_ReceiveBufferMode mode);
775
776 /** \brief Sets the Tx FIFO interrupt level
777 * \param asclin pointer to ASCLIN registers
778 * \param level interrupt level selection
779 * \return None
780 */
781 IFX_INLINE void IfxAsclin_setRxFifoInterruptLevel(Ifx_ASCLIN *asclin, IfxAsclin_RxFifoInterruptLevel level);
782
783 /** \brief Sets the receive FIFO outlet width
784 * \param asclin pointer to ASCLIN registers
785 * \param width number of bytes read to the Rx FIFO with one FPI bus read
786 * \return None
787 */
788 IFX_INLINE void IfxAsclin_setRxFifoOutletWidth(Ifx_ASCLIN *asclin, IfxAsclin_RxFifoOutletWidth width);
789
790 /** \brief Sets the sample mode (number of samples per bit / median filter)
791 * \param asclin pointer to ASCLIN registers
792 * \param medianFilter value of the median filter
793 * \return None
794 */
795 IFX_INLINE void IfxAsclin_setSampleMode(Ifx_ASCLIN *asclin, IfxAsclin_SamplesPerBit medianFilter);
796
797 /** \brief Sets the sampling point position
798 * \param asclin pointer to ASCLIN registers
799 * \param spPosition sample point position selection
800 * \return None
801 */
802 IFX_INLINE void IfxAsclin_setSamplePointPosition(Ifx_ASCLIN *asclin, IfxAsclin_SamplePointPosition spPosition);
803
804 /** \brief Sets the shift direction
805 * \param asclin pointer to ASCLIN registers
806 * \param dir shift direction selection (LSB / MSB first)
807 * \return None
808 */
809 IFX_INLINE void IfxAsclin_setShiftDirection(Ifx_ASCLIN *asclin, IfxAsclin_ShiftDirection dir);
810
811 /** \brief Sets the number of stop bits
812 * \param asclin pointer to ASCLIN registers
813 * \param stopBit number of stop bits selection
814 * \return None
815 */
816 IFX_INLINE void IfxAsclin_setStopBit(Ifx_ASCLIN *asclin, IfxAsclin_StopBit stopBit);
817
818 /** \brief Sets the transmit header request flag
819 * \param asclin pointer to ASCLIN registers
820 * \return None
821 */
822 IFX_INLINE void IfxAsclin_setTransmitHeaderRequestFlag(Ifx_ASCLIN *asclin);
823
824 /** \brief Sets the transmit response request flag
825 * \param asclin pointer to ASCLIN registers
826 * \return None
827 */
828 IFX_INLINE void IfxAsclin_setTransmitResponseRequestFlag(Ifx_ASCLIN *asclin);
829
830 /** \brief Sets the transmission wake request flag
831 * \param asclin pointer to ASCLIN registers
832 * \return None
833 */
834 IFX_INLINE void IfxAsclin_setTransmitWakeRequestFlag(Ifx_ASCLIN *asclin);
835
836 /** \brief Sets the transmit FIFO inlet width
837 * \param asclin pointer to ASCLIN registers
838 * \param width number of bytes written to the Tx FIFO with one FPI bus write
839 * \return None
840 */
841 IFX_INLINE void IfxAsclin_setTxFifoInletWidth(Ifx_ASCLIN *asclin, IfxAsclin_TxFifoInletWidth width);
842
843 /** \brief Sets the Tx FIFO interrupt level
844 * \param asclin pointer to ASCLIN registers
845 * \param level interrupt level selection
846 * \return None
847 */
848 IFX_INLINE void IfxAsclin_setTxFifoInterruptLevel(Ifx_ASCLIN *asclin, IfxAsclin_TxFifoInterruptLevel level);
849
850 /** \} */
851
852 /** \addtogroup IfxLld_Asclin_Std_Utility
853 * \{ */
854
855 /******************************************************************************/
856 /*-------------------------Inline Function Prototypes-------------------------*/
857 /******************************************************************************/
858
859 /** \brief Returns the break detected flag status
860 * \param asclin pointer to ASCLIN registers
861 * \return break detected flag status
862 */
863 IFX_INLINE boolean IfxAsclin_getBreakDetectedFlagStatus(Ifx_ASCLIN *asclin);
864
865 /** \brief Returns the clock source
866 * \param asclin pointer to ASCLIN registers
867 * \return clock source
868 */
869 IFX_INLINE uint8 IfxAsclin_getClockSource(Ifx_ASCLIN *asclin);
870
871 /** \brief Returns the clock status
872 * \param asclin pointer to ASCLIN registers
873 * \return clock status (off / on)
874 */
875 IFX_INLINE boolean IfxAsclin_getClockStatus(Ifx_ASCLIN *asclin);
876
877 /** \brief Returns the collision detection error flag status
878 * \param asclin pointer to ASCLIN registers
879 * \return collision detection error flag status
880 */
881 IFX_INLINE boolean IfxAsclin_getCollisionDetectionErrorFlagStatus(Ifx_ASCLIN *asclin);
882
883 /** \brief Returns the falling edge detected flag status
884 * \param asclin pointer to ASCLIN registers
885 * \return falling edge detected flag status
886 */
887 IFX_INLINE boolean IfxAsclin_getFallingEdgeDetectedFlagStatus(Ifx_ASCLIN *asclin);
888
889 /** \brief Returns the frame error flag status
890 * \param asclin pointer to ASCLIN registers
891 * \return frame error flag status
892 */
893 IFX_INLINE boolean IfxAsclin_getFrameErrorFlagStatus(Ifx_ASCLIN *asclin);
894
895 /** \brief Returns the header timeout flag status
896 * \param asclin pointer to ASCLIN registers
897 * \return header timeout flag status
898 */
899 IFX_INLINE boolean IfxAsclin_getHeaderTimeoutFlagStatus(Ifx_ASCLIN *asclin);
900
901 /** \brief Returns the kernel reset status
902 * \param asclin pointer to ASCLIN registers
903 * \return kernel reset status
904 */
905 IFX_INLINE boolean IfxAsclin_getKernelResetStatus(Ifx_ASCLIN *asclin);
906
907 /** \brief Returns the LIN auto baudrate detection error flag status
908 * \param asclin pointer to ASCLIN registers
909 * \return LIN auto baudrate detection error flag status
910 */
911 IFX_INLINE boolean IfxAsclin_getLinAutoBaudDetectionErrorFlagStatus(Ifx_ASCLIN *asclin);
912
913 /** \brief Returns the LIN checksum error flag status
914 * \param asclin pointer to ASCLIN registers
915 * \return LIN checksum error flag status
916 */
917 IFX_INLINE boolean IfxAsclin_getLinChecksumErrorFlagStatus(Ifx_ASCLIN *asclin);
918
919 /** \brief Returns the LIN parity error flag status
920 * \param asclin pointer to ASCLIN registers
921 * \return LIN parity error flag status
922 */
923 IFX_INLINE boolean IfxAsclin_getLinParityErrorFlagStatus(Ifx_ASCLIN *asclin);
924
925 /** \brief Returns the module status
926 * \param asclin pointer to ASCLIN registers
927 * \return module status (enabled / disabled)
928 */
929 IFX_INLINE boolean IfxAsclin_getModuleStatus(Ifx_ASCLIN *asclin);
930
931 /** \brief Returns the parity error flag status
932 * \param asclin pointer to ASCLIN registers
933 * \return parity error flag status
934 */
935 IFX_INLINE boolean IfxAsclin_getParityErrorFlagStatus(Ifx_ASCLIN *asclin);
936
937 /** \brief Returns the division ratio of the predivider (prescaler)
938 * \param asclin pointer to ASCLIN registers
939 * \return value of prescaler
940 */
941 IFX_INLINE uint16 IfxAsclin_getPrescaler(Ifx_ASCLIN *asclin);
942
943 /** \brief Returns the raising edge detected flag status
944 * \param asclin pointer to ASCLIN registers
945 * \return raising edge detected flag status
946 */
947 IFX_INLINE boolean IfxAsclin_getRaisingEdgeDetectedFlagStatus(Ifx_ASCLIN *asclin);
948
949 /** \brief Returns the received signal status
950 * \param asclin pointer to ASCLIN registers
951 * \return received signal status (0 is low & 1 is high)
952 */
953 IFX_INLINE boolean IfxAsclin_getReceiveSignalStatus(Ifx_ASCLIN *asclin);
954
955 /** \brief Returns the response timeout flag status
956 * \param asclin pointer to ASCLIN registers
957 * \return response timeout flag status
958 */
959 IFX_INLINE boolean IfxAsclin_getResponseTimeoutFlagStatus(Ifx_ASCLIN *asclin);
960
961 /** \brief Returns the current filling level of Tx FIFO
962 * \param asclin pointer to ASCLIN registers
963 * \return current filling level of Rx FIFO
964 */
965 IFX_INLINE uint8 IfxAsclin_getRxFifoFillLevel(Ifx_ASCLIN *asclin);
966
967 /** \brief Returns the Rx FIFO level flag status
968 * \param asclin pointer to ASCLIN registers
969 * \return Rx FIFO level flag status
970 */
971 IFX_INLINE boolean IfxAsclin_getRxFifoFillLevelFlagStatus(Ifx_ASCLIN *asclin);
972
973 /** \brief Returns the receive FIFO inlet width
974 * \param asclin pointer to ASCLIN registers
975 * \return number of bytes read to the Rx FIFO with one FPI bus read
976 */
977 IFX_INLINE uint8 IfxAsclin_getRxFifoOutletWidth(Ifx_ASCLIN *asclin);
978
979 /** \brief Returns the Rx FIFO overflow flag status
980 * \param asclin pointer to ASCLIN registers
981 * \return Rx FIFO overflow flag status
982 */
983 IFX_INLINE boolean IfxAsclin_getRxFifoOverflowFlagStatus(Ifx_ASCLIN *asclin);
984
985 /** \brief Returns the Rx FIFO underflow flag status
986 * \param asclin pointer to ASCLIN registers
987 * \return Rx FIFO underflow flag status
988 */
989 IFX_INLINE boolean IfxAsclin_getRxFifoUnderflowFlagStatus(Ifx_ASCLIN *asclin);
990
991 /** \brief Returns the receive header end flag status
992 * \param asclin pointer to ASCLIN registers
993 * \return receive header end flag status
994 */
995 IFX_INLINE boolean IfxAsclin_getRxHeaderEndFlagStatus(Ifx_ASCLIN *asclin);
996
997 /** \brief Returns the receive response end flag status
998 * \param asclin pointer to ASCLIN registers
999 * \return receive response end flag status
1000 */
1001 IFX_INLINE boolean IfxAsclin_getRxResponseEndFlagStatus(Ifx_ASCLIN *asclin);
1002
1003 /** \brief Returns the transmission pending flag status
1004 * \param asclin pointer to ASCLIN registers
1005 * \return transmission pending flag status
1006 */
1007 IFX_INLINE boolean IfxAsclin_getTransmissionCompletedFlagStatus(Ifx_ASCLIN *asclin);
1008
1009 /** \brief Returns the transmit signal status
1010 * \param asclin pointer to ASCLIN registers
1011 * \return transmit signal status (0 is low & 1 is high)
1012 */
1013 IFX_INLINE boolean IfxAsclin_getTransmitSignalStatus(Ifx_ASCLIN *asclin);
1014
1015 /** \brief Returns the current filling level of Tx FIFO
1016 * \param asclin pointer to ASCLIN registers
1017 * \return current filling level of Tx FIFO
1018 */
1019 IFX_INLINE uint8 IfxAsclin_getTxFifoFillLevel(Ifx_ASCLIN *asclin);
1020
1021 /** \brief Returns the Tx FIFO level flag status
1022 * \param asclin pointer to ASCLIN registers
1023 * \return Tx FIFO level flag status
1024 */
1025 IFX_INLINE boolean IfxAsclin_getTxFifoFillLevelFlagStatus(Ifx_ASCLIN *asclin);
1026
1027 /** \brief Returns the transmit FIFO inlet width
1028 * \param asclin pointer to ASCLIN registers
1029 * \return number of bytes written to the Tx FIFO with one FPI bus write
1030 */
1031 IFX_INLINE uint8 IfxAsclin_getTxFifoInletWidth(Ifx_ASCLIN *asclin);
1032
1033 /** \brief Returns the Tx FIFO overflow flag status
1034 * \param asclin pointer to ASCLIN registers
1035 * \return Tx FIFO overflow flag status
1036 */
1037 IFX_INLINE boolean IfxAsclin_getTxFifoOverflowFlagStatus(Ifx_ASCLIN *asclin);
1038
1039 /** \brief Returns the transmit header end flag status
1040 * \param asclin pointer to ASCLIN registers
1041 * \return transmit header end flag status
1042 */
1043 IFX_INLINE boolean IfxAsclin_getTxHeaderEndFlagStatus(Ifx_ASCLIN *asclin);
1044
1045 /** \brief Returns the transmit response end flag status
1046 * \param asclin pointer to ASCLIN registers
1047 * \return transmit response end flag status
1048 */
1049 IFX_INLINE boolean IfxAsclin_getTxResponseEndFlagStatus(Ifx_ASCLIN *asclin);
1050
1051 /** \brief Sets the sensitivity of the module to sleep signal
1052 * \param asclin pointer to ASCLIN registers
1053 * \param mode mode selection (enable / disable)
1054 * \return None
1055 */
1056 IFX_INLINE void IfxAsclin_setSleepMode(Ifx_ASCLIN *asclin, IfxAsclin_SleepMode mode);
1057
1058 /******************************************************************************/
1059 /*-------------------------Global Function Prototypes-------------------------*/
1060 /******************************************************************************/
1061
1062 /** \brief API to get the address for ASCLIN HW module register memory map
1063 * \param asclin Resource index of the ASCLIN
1064 * \return ASCLIN module register address
1065 */
1066 IFX_EXTERN Ifx_ASCLIN *IfxAsclin_getAddress(IfxAsclin_Index asclin);
1067
1068 /** \brief Returns the ASCLIN module FA frequency in Hz
1069 * \param asclin pointer to ASCLIN registers
1070 * \return Returns the ASCLIN module FA frequency in Hz
1071 */
1072 IFX_EXTERN float32 IfxAsclin_getFaFrequency(Ifx_ASCLIN *asclin);
1073
1074 /** \brief API to get the resource index of the ASCLIN specified.
1075 * \return asclin resource index
1076 */
1077 IFX_EXTERN IfxAsclin_Index IfxAsclin_getIndex(Ifx_ASCLIN *asclin);
1078
1079 /** \brief Returns the OVS frequency
1080 * \param asclin pointer to ASCLIN registers
1081 * \return Returns the ASCLIN module OVS frequency in Hz
1082 */
1083 IFX_EXTERN float32 IfxAsclin_getOvsFrequency(Ifx_ASCLIN *asclin);
1084
1085 /** \brief Returns the PD frequency
1086 * \param asclin pointer to ASCLIN registers
1087 * \return Returns the ASCLIN module PD frequency in Hz
1088 */
1089 IFX_EXTERN float32 IfxAsclin_getPdFrequency(Ifx_ASCLIN *asclin);
1090
1091 /** \brief Returns the SHIFT frequency
1092 * \param asclin pointer to ASCLIN registers
1093 * \return Returns the ASCLIN module SHIFT frequency in Hz
1094 */
1095 IFX_EXTERN float32 IfxAsclin_getShiftFrequency(Ifx_ASCLIN *asclin);
1096
1097 /** \brief resets Asclin kernel
1098 * \param asclin pointer to ASCLIN resgisters
1099 * \return None
1100 */
1101 IFX_EXTERN void IfxAsclin_resetModule(Ifx_ASCLIN *asclin);
1102
1103 /** \} */
1104
1105 /** \addtogroup IfxLld_Asclin_Std_Configuration
1106 * \{ */
1107
1108 /******************************************************************************/
1109 /*-------------------------Inline Function Prototypes-------------------------*/
1110 /******************************************************************************/
1111
1112 /** \brief disables all flags
1113 * \param asclin pointer to ASCLIN registers
1114 * \return None
1115 */
1116 IFX_INLINE void IfxAsclin_disableAllFlags(Ifx_ASCLIN *asclin);
1117
1118 /** \brief Enables/disables the auto baudrate detection
1119 * \param asclin pointer to ASCLIN registers
1120 * \param enable choice (enable / disable)
1121 * \return None
1122 */
1123 IFX_INLINE void IfxAsclin_enableAutoBaudrateDetection(Ifx_ASCLIN *asclin, boolean enable);
1124
1125 /** \brief Enables/disables break detected flag
1126 * \param asclin pointer to ASCLIN registers
1127 * \param enable choice (enable / disable)
1128 * \return None
1129 */
1130 IFX_INLINE void IfxAsclin_enableBreakDetectedFlag(Ifx_ASCLIN *asclin, boolean enable);
1131
1132 /** \brief Enables/disables the collision detection
1133 * \param asclin pointer to ASCLIN registers
1134 * \param enable choice (enable/disable)
1135 * \return None
1136 */
1137 IFX_INLINE void IfxAsclin_enableCollisionDetection(Ifx_ASCLIN *asclin, boolean enable);
1138
1139 /** \brief Enables/disables LIN collision detection error flag
1140 * \param asclin pointer to ASCLIN registers
1141 * \param enable choice (enable / disable)
1142 * \return None
1143 */
1144 IFX_INLINE void IfxAsclin_enableCollisionDetectionErrorFlag(Ifx_ASCLIN *asclin, boolean enable);
1145
1146 /** \brief Enables/disables CTS
1147 * \param asclin pointer to ASCLIN registers
1148 * \param enable choice (enable/disable)
1149 * \return None
1150 */
1151 IFX_INLINE void IfxAsclin_enableCts(Ifx_ASCLIN *asclin, boolean enable);
1152
1153 /** \brief Enables/disables falling edge detected flag
1154 * \param asclin pointer to ASCLIN registers
1155 * \param enable choice (enable / disable)
1156 * \return None
1157 */
1158 IFX_INLINE void IfxAsclin_enableFallingEdgeDetectedFlag(Ifx_ASCLIN *asclin, boolean enable);
1159
1160 /** \brief Enables/disables frame error flag
1161 * \param asclin pointer to ASCLIN registers
1162 * \param enable choice (enable / disable)
1163 * \return None
1164 */
1165 IFX_INLINE void IfxAsclin_enableFrameErrorFlag(Ifx_ASCLIN *asclin, boolean enable);
1166
1167 /** \brief Enables/disables the hardware checksum
1168 * \param asclin pointer to ASCLIN registers
1169 * \param enable choice (enable / disable)
1170 * \return None
1171 */
1172 IFX_INLINE void IfxAsclin_enableHardwareChecksum(Ifx_ASCLIN *asclin, boolean enable);
1173
1174 /** \brief Enables/disables header timeout flag
1175 * \param asclin pointer to ASCLIN registers
1176 * \param enable choice (enable / disable)
1177 * \return None
1178 */
1179 IFX_INLINE void IfxAsclin_enableHeaderTimeoutFlag(Ifx_ASCLIN *asclin, boolean enable);
1180
1181 /** \brief Enables/disables LIN auto baudrate detection error flag
1182 * \param asclin pointer to ASCLIN registers
1183 * \param enable choice (enable / disable)
1184 * \return None
1185 */
1186 IFX_INLINE void IfxAsclin_enableLinAutoBaudDetectionErrorFlag(Ifx_ASCLIN *asclin, boolean enable);
1187
1188 /** \brief Enables/disables LIN checksum error flag
1189 * \param asclin pointer to ASCLIN registers
1190 * \param enable choice (enable / disable)
1191 * \return None
1192 */
1193 IFX_INLINE void IfxAsclin_enableLinChecksumErrorFlag(Ifx_ASCLIN *asclin, boolean enable);
1194
1195 /** \brief Enables/disables LIN parity error flag
1196 * \param asclin pointer to ASCLIN registers
1197 * \param enable choice (enable / disable)
1198 * \return None
1199 */
1200 IFX_INLINE void IfxAsclin_enableLinParityErrorFlag(Ifx_ASCLIN *asclin, boolean enable);
1201
1202 /** \brief Enables/disables the loop back mode
1203 * \param asclin pointer to ASCLIN registers
1204 * \param enable choice (enable/disable)
1205 * \return None
1206 */
1207 IFX_INLINE void IfxAsclin_enableLoopBackMode(Ifx_ASCLIN *asclin, boolean enable);
1208
1209 /** \brief Enables/disables the parity bit attachment to tha data bits
1210 * \param asclin pointer to ASCLIN registers
1211 * \param enable choice (enable/disable)
1212 * \return None
1213 */
1214 IFX_INLINE void IfxAsclin_enableParity(Ifx_ASCLIN *asclin, boolean enable);
1215
1216 /** \brief Enables/disables parity error flag
1217 * \param asclin pointer to ASCLIN registers
1218 * \param enable choice (enable / disable)
1219 * \return None
1220 */
1221 IFX_INLINE void IfxAsclin_enableParityErrorFlag(Ifx_ASCLIN *asclin, boolean enable);
1222
1223 /** \brief Enables/disables raising edge detected flag
1224 * \param asclin pointer to ASCLIN registers
1225 * \param enable choice (enable / disable)
1226 * \return None
1227 */
1228 IFX_INLINE void IfxAsclin_enableRaisingEdgeDetectedFlag(Ifx_ASCLIN *asclin, boolean enable);
1229
1230 /** \brief Enables/disables response timeout flag
1231 * \param asclin pointer to ASCLIN registers
1232 * \param enable choice (enable / disable)
1233 * \return None
1234 */
1235 IFX_INLINE void IfxAsclin_enableResponseTimeoutFlag(Ifx_ASCLIN *asclin, boolean enable);
1236
1237 /** \brief Enables/disables Rx FIFO level flag
1238 * \param asclin pointer to ASCLIN registers
1239 * \param enable choice (enable / disable)
1240 * \return None
1241 */
1242 IFX_INLINE void IfxAsclin_enableRxFifoFillLevelFlag(Ifx_ASCLIN *asclin, boolean enable);
1243
1244 /** \brief Enables/disables the receive FIFO outlet to allow filling of Rx FIFO through shift register
1245 * \param asclin pointer to ASCLIN registers
1246 * \param enable choice (enable/disable)
1247 * \return None
1248 */
1249 IFX_INLINE void IfxAsclin_enableRxFifoInlet(Ifx_ASCLIN *asclin, boolean enable);
1250
1251 /** \brief Enables/disables Rx FIFO overflow flag
1252 * \param asclin pointer to ASCLIN registers
1253 * \param enable choice (enable / disable)
1254 * \return None
1255 */
1256 IFX_INLINE void IfxAsclin_enableRxFifoOverflowFlag(Ifx_ASCLIN *asclin, boolean enable);
1257
1258 /** \brief Enables/disables Rx FIFO underflow flag
1259 * \param asclin pointer to ASCLIN registers
1260 * \param enable choice (enable / disable)
1261 * \return None
1262 */
1263 IFX_INLINE void IfxAsclin_enableRxFifoUnderflowFlag(Ifx_ASCLIN *asclin, boolean enable);
1264
1265 /** \brief Enables/disables receive header end flag
1266 * \param asclin pointer to ASCLIN registers
1267 * \param enable choice (enable / disable)
1268 * \return None
1269 */
1270 IFX_INLINE void IfxAsclin_enableRxHeaderEndFlag(Ifx_ASCLIN *asclin, boolean enable);
1271
1272 /** \brief Enables/disables receive response end flag
1273 * \param asclin pointer to ASCLIN registers
1274 * \param enable choice (enable / disable)
1275 * \return None
1276 */
1277 IFX_INLINE void IfxAsclin_enableRxResponseEndFlag(Ifx_ASCLIN *asclin, boolean enable);
1278
1279 /** \brief Enables/disables transmission completed flag
1280 * \param asclin pointer to ASCLIN registers
1281 * \param enable choice (enable / disable)
1282 * \return None
1283 */
1284 IFX_INLINE void IfxAsclin_enableTransmissionCompletedFlag(Ifx_ASCLIN *asclin, boolean enable);
1285
1286 /** \brief Enables/disables Tx FIFO level flag
1287 * \param asclin pointer to ASCLIN registers
1288 * \param enable choice (enable / disable)
1289 * \return None
1290 */
1291 IFX_INLINE void IfxAsclin_enableTxFifoFillLevelFlag(Ifx_ASCLIN *asclin, boolean enable);
1292
1293 /** \brief Enables/disables the transmit FIFO outlet to allow transmission
1294 * \param asclin pointer to ASCLIN registers
1295 * \param enable choice (enable/disable)
1296 * \return None
1297 */
1298 IFX_INLINE void IfxAsclin_enableTxFifoOutlet(Ifx_ASCLIN *asclin, boolean enable);
1299
1300 /** \brief Enables/disables Tx FIFO overflow flag
1301 * \param asclin pointer to ASCLIN registers
1302 * \param enable choice (enable / disable)
1303 * \return None
1304 */
1305 IFX_INLINE void IfxAsclin_enableTxFifoOverflowFlag(Ifx_ASCLIN *asclin, boolean enable);
1306
1307 /** \brief Enables/disables transmit header end flag
1308 * \param asclin pointer to ASCLIN registers
1309 * \param enable choice (enable / disable)
1310 * \return None
1311 */
1312 IFX_INLINE void IfxAsclin_enableTxHeaderEndFlag(Ifx_ASCLIN *asclin, boolean enable);
1313
1314 /** \brief Enables/disables transmit response end flag
1315 * \param asclin pointer to ASCLIN registers
1316 * \param enable choice (enable / disable)
1317 * \return None
1318 */
1319 IFX_INLINE void IfxAsclin_enableTxResponseEndFlag(Ifx_ASCLIN *asclin, boolean enable);
1320
1321 /** \brief Returns the module's suspend state.
1322 * TRUE :if module is suspended.
1323 * FALSE:if module is not yet suspended.
1324 * \param asclin Pointer to ASCLIN module registers
1325 * \return Suspend status (TRUE / FALSE)
1326 */
1327 IFX_INLINE boolean IfxAsclin_isModuleSuspended(Ifx_ASCLIN *asclin);
1328
1329 /** \brief Selects the clock polarity
1330 * \param asclin pointer to ASCLIN registers
1331 * \param cpol CPOL selection
1332 * \return None
1333 */
1334 IFX_INLINE void IfxAsclin_setClockPolarity(Ifx_ASCLIN *asclin, IfxAsclin_ClockPolarity cpol);
1335
1336 /** \brief Selects the CTS input pin
1337 * \param asclin pointer to ASCLIN registers
1338 * \param ctsi CTS input pin selection
1339 * \return None
1340 */
1341 IFX_INLINE void IfxAsclin_setCtsInput(Ifx_ASCLIN *asclin, IfxAsclin_CtsInputSelect ctsi);
1342
1343 /** \brief Selects the module's mode of operation
1344 * \param asclin pointer to ASCLIN registers
1345 * \param mode mode selction
1346 * \return None
1347 */
1348 IFX_INLINE void IfxAsclin_setFrameMode(Ifx_ASCLIN *asclin, IfxAsclin_FrameMode mode);
1349
1350 /** \brief Selects the RTS/CTS polarity
1351 * \param asclin pointer to ASCLIN registers
1352 * \param rcpol RCPOL selection
1353 * \return None
1354 */
1355 IFX_INLINE void IfxAsclin_setRtsCtsPolarity(Ifx_ASCLIN *asclin, IfxAsclin_RtsCtsPolarity rcpol);
1356
1357 /** \brief Selects the Rx FIFO interupt generation mode
1358 * \param asclin pointer to ASCLIN registers
1359 * \param mode mode selction
1360 * \return None
1361 */
1362 IFX_INLINE void IfxAsclin_setRxFifoInterruptMode(Ifx_ASCLIN *asclin, IfxAsclin_FifoInterruptMode mode);
1363
1364 /** \brief Selects the alternate input for Rx signal
1365 * \param asclin pointer to ASCLIN registers
1366 * \param alti alternate input selection of Rx signal
1367 * \return None
1368 */
1369 IFX_INLINE void IfxAsclin_setRxInput(Ifx_ASCLIN *asclin, IfxAsclin_RxInputSelect alti);
1370
1371 /** \brief Selects the slave polarity
1372 * \param asclin pointer to ASCLIN registers
1373 * \param spol SPOL selection
1374 * \return None
1375 */
1376 IFX_INLINE void IfxAsclin_setSlavePolarity(Ifx_ASCLIN *asclin, IfxAsclin_SlavePolarity spol);
1377
1378 /** \brief Configure the Module to Hard/Soft suspend mode.
1379 * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
1380 * \param asclin Pointer to ASCLIN module registers
1381 * \param mode Module suspend mode
1382 * \return None
1383 */
1384 IFX_INLINE void IfxAsclin_setSuspendMode(Ifx_ASCLIN *asclin, IfxAsclin_SuspendMode mode);
1385
1386 /** \brief Selects the Tx FIFO interupt generation mode
1387 * \param asclin pointer to ASCLIN registers
1388 * \param mode mode selction
1389 * \return None
1390 */
1391 IFX_INLINE void IfxAsclin_setTxFifoInterruptMode(Ifx_ASCLIN *asclin, IfxAsclin_FifoInterruptMode mode);
1392
1393 /******************************************************************************/
1394 /*-------------------------Global Function Prototypes-------------------------*/
1395 /******************************************************************************/
1396
1397 /** \brief Set the bit timing
1398 *
1399 * \note this function required FA source and the PD frequency to be set to their final values
1400 * \param asclin pointer to ASCLIN registers
1401 * \param baudrate Required baudrate
1402 * \param oversampling The oversampling factor
1403 * \param samplepoint The sample point position
1404 * \param medianFilter Number of samples per bit (median filter)
1405 * \return TRUE if configuration was successfull
1406 */
1407 IFX_EXTERN boolean IfxAsclin_setBitTiming(Ifx_ASCLIN *asclin, float32 baudrate, IfxAsclin_OversamplingFactor oversampling, IfxAsclin_SamplePointPosition samplepoint, IfxAsclin_SamplesPerBit medianFilter);
1408
1409 /** \} */
1410
1411 /** \addtogroup IfxLld_Asclin_Std_External
1412 * \{ */
1413
1414 /******************************************************************************/
1415 /*-------------------------Global Function Prototypes-------------------------*/
1416 /******************************************************************************/
1417
1418 /** \brief Disables the module
1419 * \param asclin pointer to ASCLIN registers
1420 * \return None
1421 */
1422 IFX_EXTERN void IfxAsclin_disableModule(Ifx_ASCLIN *asclin);
1423
1424 /** \brief Enables the ASC error interrupt Flags
1425 * \param asclin pointer to ASCLIN registers
1426 * \param parEnable parity error
1427 * \param rfoEnable Rx FIFO overflow error
1428 * \return None
1429 */
1430 IFX_EXTERN void IfxAsclin_enableAscErrorFlags(Ifx_ASCLIN *asclin, boolean parEnable, boolean rfoEnable);
1431
1432 /** \brief Enables the module
1433 * \param asclin pointer to ASCLIN registers
1434 * \return None
1435 */
1436 IFX_EXTERN void IfxAsclin_enableModule(Ifx_ASCLIN *asclin);
1437
1438 /** \brief Returns the SRC pointer for ERR
1439 * \param asclin pointer to ASCLIN registers
1440 */
1441 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxAsclin_getSrcPointerEr(Ifx_ASCLIN *asclin);
1442
1443 /** \brief Returns the SRC pointer for Rx
1444 * \param asclin pointer to ASCLIN registers
1445 */
1446 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxAsclin_getSrcPointerRx(Ifx_ASCLIN *asclin);
1447
1448 /** \brief Returns the SRC pointer for Tx
1449 * \param asclin pointer to ASCLIN registers
1450 */
1451 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxAsclin_getSrcPointerTx(Ifx_ASCLIN *asclin);
1452
1453 /** \brief Reads data up to 16 bits
1454 * \param asclin pointer to ASCLIN registers
1455 * \param data Array where the read data shall be stored
1456 * \param count number of items to read
1457 * \return number of items that could not be read
1458 */
1459 IFX_EXTERN uint32 IfxAsclin_read16(Ifx_ASCLIN *asclin, uint16 *data, uint32 count);
1460
1461 /** \brief Reads data up to 32 bits
1462 * \param asclin pointer to ASCLIN registers
1463 * \param data Array where the read data shall be stored
1464 * \param count number of items to read
1465 * \return number of items that could not be read
1466 */
1467 IFX_EXTERN uint32 IfxAsclin_read32(Ifx_ASCLIN *asclin, uint32 *data, uint32 count);
1468
1469 /** \brief Reads data up to 8 bits
1470 * \param asclin pointer to ASCLIN registers
1471 * \param data Array where the read data shall be stored
1472 * \param count number of items to read
1473 * \return number of items that could not be read
1474 */
1475 IFX_EXTERN uint32 IfxAsclin_read8(Ifx_ASCLIN *asclin, uint8 *data, uint32 count);
1476
1477 /** \brief Sets the baudrate bit fields
1478 * \param asclin pointer to ASCLIN registers
1479 * \param prescaler division ratio of the predivider
1480 * \param numerator numerator of the fractional divider
1481 * \param denominator denominator of the fractional divider
1482 * \param oversampling division ratio of the baudrate postdivider
1483 * \return None
1484 */
1485 IFX_EXTERN void IfxAsclin_setBaudrateBitFields(Ifx_ASCLIN *asclin, uint16 prescaler, uint16 numerator, uint16 denominator, IfxAsclin_OversamplingFactor oversampling);
1486
1487 /** \brief Sets the clock source
1488 * \param asclin pointer to ASCLIN registers
1489 * \param clockSource clock source selection
1490 * \return None
1491 */
1492 IFX_EXTERN void IfxAsclin_setClockSource(Ifx_ASCLIN *asclin, IfxAsclin_ClockSource clockSource);
1493
1494 /** \brief Writes data up to 16 bits
1495 * \param asclin pointer to ASCLIN registers
1496 * \param data Array of data to be send
1497 * \param count number of items to be send
1498 * \return the number of items that could not be send
1499 */
1500 IFX_EXTERN uint32 IfxAsclin_write16(Ifx_ASCLIN *asclin, uint16 *data, uint32 count);
1501
1502 /** \brief Writes data up to 32 bits
1503 * \param asclin pointer to ASCLIN registers
1504 * \param data Array of data to be send
1505 * \param count number of items to be send
1506 * \return the number of items that could not be send
1507 */
1508 IFX_EXTERN uint32 IfxAsclin_write32(Ifx_ASCLIN *asclin, uint32 *data, uint32 count);
1509
1510 /** \brief Writes data up to 8 bits
1511 * \param asclin pointer to ASCLIN registers
1512 * \param data Array of data to be send
1513 * \param count number of items to be send
1514 * \return the number of items that could not be send
1515 */
1516 IFX_EXTERN uint32 IfxAsclin_write8(Ifx_ASCLIN *asclin, uint8 *data, uint32 count);
1517
1518 /** \} */
1519
1520 /** \addtogroup IfxLld_Asclin_Std_IO
1521 * \{ */
1522
1523 /******************************************************************************/
1524 /*-------------------------Inline Function Prototypes-------------------------*/
1525 /******************************************************************************/
1526
1527 /** \brief Initializes a CTS input
1528 *
1529 * Attention: the kernel clock has to be disabled whenever the input multiplexer is changed.
1530 *
1531 * This can be done with IfxAsclin_setClockSource(asclinSFR, IfxAsclin_ClockSource_noClock);
1532 *
1533 * After the function call, the current clock can be enabled again.
1534 * \param cts the CTS Pin which should be configured
1535 * \param inputMode the pin input mode which should be configured
1536 * \param padDriver the pad driver mode which should be configured
1537 * \return None
1538 */
1539 IFX_INLINE void IfxAsclin_initCtsPin(const IfxAsclin_Cts_In *cts, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
1540
1541 /** \brief Initializes a RTS output
1542 * \param rts the RTS Pin which should be configured
1543 * \param outputMode the pin output mode which should be configured
1544 * \param padDriver the pad driver mode which should be configured
1545 * \return None
1546 */
1547 IFX_INLINE void IfxAsclin_initRtsPin(const IfxAsclin_Rts_Out *rts, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
1548
1549 /** \brief Initializes a RX input
1550 *
1551 * Attention: the kernel clock has to be disabled whenever the input multiplexer is changed.
1552 *
1553 * This can be done with IfxAsclin_setClockSource(asclinSFR, IfxAsclin_ClockSource_noClock);
1554 *
1555 * After the function call, the current clock can be enabled again.
1556 * \param rx the RX Pin which should be configured
1557 * \param inputMode the pin input mode which should be configured
1558 * \param padDriver the pad driver mode which should be configured
1559 * \return None
1560 */
1561 IFX_INLINE void IfxAsclin_initRxPin(const IfxAsclin_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
1562
1563 /** \brief Initializes a SCLK output
1564 * \param sclk the SCLK Pin which should be configured
1565 * \param outputMode the pin output mode which should be configured
1566 * \param padDriver the pad driver mode which should be configured
1567 * \return None
1568 */
1569 IFX_INLINE void IfxAsclin_initSclkPin(const IfxAsclin_Sclk_Out *sclk, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
1570
1571 /** \brief Initializes a SLSO output
1572 * \param slso the SLSO Pin which should be configured
1573 * \param outputMode the pin output mode which should be configured
1574 * \param padDriver the pad driver mode which should be configured
1575 * \return None
1576 */
1577 IFX_INLINE void IfxAsclin_initSlsoPin(const IfxAsclin_Slso_Out *slso, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
1578
1579 /** \brief Initializes a TX output
1580 * \param tx the TX Pin which should be configured
1581 * \param outputMode the pin output mode which should be configured
1582 * \param padDriver the pad driver mode which should be configured
1583 * \return None
1584 */
1585 IFX_INLINE void IfxAsclin_initTxPin(const IfxAsclin_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
1586
1587 /** \} */
1588
1589 /******************************************************************************/
1590 /*-------------------------Inline Function Prototypes-------------------------*/
1591 /******************************************************************************/
1592
1593 /**
1594 * \param asclin pointer to ASCLIN registers
1595 * \return returns the value of RxDATA register
1596 */
1597 IFX_INLINE uint32 IfxAsclin_readRxData(Ifx_ASCLIN *asclin);
1598
1599 /**
1600 * \param asclin pointer to ASCLIN registers
1601 * \param data data to be written
1602 * \return None
1603 */
1604 IFX_INLINE void IfxAsclin_writeTxData(Ifx_ASCLIN *asclin, uint32 data);
1605
1606 /** \brief Returns the status of all error flags
1607 * \param asclin pointer to ASCLIN registers
1608 * \return status
1609 */
1610 IFX_INLINE uint16 IfxAsclin_getAllErrorFlagsStatus(Ifx_ASCLIN *asclin);
1611
1612 /******************************************************************************/
1613 /*---------------------Inline Function Implementations------------------------*/
1614 /******************************************************************************/
1615
1616 IFX_INLINE void IfxAsclin_clearAllFlags(Ifx_ASCLIN *asclin)
1617 {
1618 asclin->FLAGSCLEAR.U = 0xFFFFFFFF;
1619 }
1620
1621
1622 IFX_INLINE void IfxAsclin_clearBreakDetectedFlag(Ifx_ASCLIN *asclin)
1623 {
1624 asclin->FLAGSCLEAR.B.BDC = 1;
1625 }
1626
1627
1628 IFX_INLINE void IfxAsclin_clearCollisionDetectionErrorFlag(Ifx_ASCLIN *asclin)
1629 {
1630 asclin->FLAGSCLEAR.B.CEC = 1;
1631 }
1632
1633
1634 IFX_INLINE void IfxAsclin_clearFallingEdgeDetectedFlag(Ifx_ASCLIN *asclin)
1635 {
1636 asclin->FLAGSCLEAR.B.FEDC = 1;
1637 }
1638
1639
1640 IFX_INLINE void IfxAsclin_clearFrameErrorFlag(Ifx_ASCLIN *asclin)
1641 {
1642 asclin->FLAGSCLEAR.B.FEC = 1;
1643 }
1644
1645
1646 IFX_INLINE void IfxAsclin_clearHeaderTimeoutFlag(Ifx_ASCLIN *asclin)
1647 {
1648 asclin->FLAGSCLEAR.B.HTC = 1;
1649 }
1650
1651
1652 IFX_INLINE void IfxAsclin_clearKernelResetStatus(Ifx_ASCLIN *asclin)
1653 {
1654 asclin->KRSTCLR.B.CLR = 1;
1655 }
1656
1657
1658 IFX_INLINE void IfxAsclin_clearLinAutoBaudDetectionErrorFlag(Ifx_ASCLIN *asclin)
1659 {
1660 asclin->FLAGSCLEAR.B.LAC = 1;
1661 }
1662
1663
1664 IFX_INLINE void IfxAsclin_clearLinChecksumErrorFlag(Ifx_ASCLIN *asclin)
1665 {
1666 asclin->FLAGSCLEAR.B.LCC = 1;
1667 }
1668
1669
1670 IFX_INLINE void IfxAsclin_clearLinParityErrorFlag(Ifx_ASCLIN *asclin)
1671 {
1672 asclin->FLAGSCLEAR.B.LPC = 1;
1673 }
1674
1675
1676 IFX_INLINE void IfxAsclin_clearParityErrorFlag(Ifx_ASCLIN *asclin)
1677 {
1678 asclin->FLAGSCLEAR.B.PEC = 1;
1679 }
1680
1681
1682 IFX_INLINE void IfxAsclin_clearRaisingEdgeDetectedFlag(Ifx_ASCLIN *asclin)
1683 {
1684 asclin->FLAGSCLEAR.B.REDC = 1;
1685 }
1686
1687
1688 IFX_INLINE void IfxAsclin_clearResponseTimeoutFlag(Ifx_ASCLIN *asclin)
1689 {
1690 asclin->FLAGSCLEAR.B.RTC = 1;
1691 }
1692
1693
1694 IFX_INLINE void IfxAsclin_clearRxFifoFillLevelFlag(Ifx_ASCLIN *asclin)
1695 {
1696 asclin->FLAGSCLEAR.B.RFLC = 1;
1697 }
1698
1699
1700 IFX_INLINE void IfxAsclin_clearRxFifoOverflowFlag(Ifx_ASCLIN *asclin)
1701 {
1702 asclin->FLAGSCLEAR.B.RFOC = 1;
1703 }
1704
1705
1706 IFX_INLINE void IfxAsclin_clearRxFifoUnderflowFlag(Ifx_ASCLIN *asclin)
1707 {
1708 asclin->FLAGSCLEAR.B.RFUC = 1;
1709 }
1710
1711
1712 IFX_INLINE void IfxAsclin_clearRxHeaderEndFlag(Ifx_ASCLIN *asclin)
1713 {
1714 asclin->FLAGSCLEAR.B.RHC = 1;
1715 }
1716
1717
1718 IFX_INLINE void IfxAsclin_clearRxResponseEndFlag(Ifx_ASCLIN *asclin)
1719 {
1720 asclin->FLAGSCLEAR.B.RRC = 1;
1721 }
1722
1723
1724 IFX_INLINE void IfxAsclin_clearTransmissionCompletedFlag(Ifx_ASCLIN *asclin)
1725 {
1726 asclin->FLAGSCLEAR.B.TCC = 1;
1727 }
1728
1729
1730 IFX_INLINE void IfxAsclin_clearTxFifoFillLevelFlag(Ifx_ASCLIN *asclin)
1731 {
1732 asclin->FLAGSCLEAR.B.TFLC = 1;
1733 }
1734
1735
1736 IFX_INLINE void IfxAsclin_clearTxFifoOverflowFlag(Ifx_ASCLIN *asclin)
1737 {
1738 asclin->FLAGSCLEAR.B.TFOC = 1;
1739 }
1740
1741
1742 IFX_INLINE void IfxAsclin_clearTxHeaderEndFlag(Ifx_ASCLIN *asclin)
1743 {
1744 asclin->FLAGSCLEAR.B.THC = 1;
1745 }
1746
1747
1748 IFX_INLINE void IfxAsclin_clearTxResponseEndFlag(Ifx_ASCLIN *asclin)
1749 {
1750 asclin->FLAGSCLEAR.B.TRC = 1;
1751 }
1752
1753
1754 IFX_INLINE void IfxAsclin_disableAllFlags(Ifx_ASCLIN *asclin)
1755 {
1756 asclin->FLAGSENABLE.U = 0x00000000;
1757 }
1758
1759
1760 IFX_INLINE void IfxAsclin_enableAutoBaudrateDetection(Ifx_ASCLIN *asclin, boolean enable)
1761 {
1762 asclin->LIN.CON.B.ABD = enable ? 1 : 0;
1763 }
1764
1765
1766 IFX_INLINE void IfxAsclin_enableBreakDetectedFlag(Ifx_ASCLIN *asclin, boolean enable)
1767 {
1768 asclin->FLAGSENABLE.B.BDE = enable ? 1 : 0;
1769 }
1770
1771
1772 IFX_INLINE void IfxAsclin_enableCollisionDetection(Ifx_ASCLIN *asclin, boolean enable)
1773 {
1774 asclin->FRAMECON.B.CEN = enable ? 1 : 0;
1775 }
1776
1777
1778 IFX_INLINE void IfxAsclin_enableCollisionDetectionErrorFlag(Ifx_ASCLIN *asclin, boolean enable)
1779 {
1780 asclin->FLAGSENABLE.B.CEE = enable ? 1 : 0;
1781 }
1782
1783
1784 IFX_INLINE void IfxAsclin_enableCts(Ifx_ASCLIN *asclin, boolean enable)
1785 {
1786 asclin->IOCR.B.CTSEN = enable ? 1 : 0;
1787 }
1788
1789
1790 IFX_INLINE void IfxAsclin_enableFallingEdgeDetectedFlag(Ifx_ASCLIN *asclin, boolean enable)
1791 {
1792 asclin->FLAGSENABLE.B.FEDE = enable ? 1 : 0;
1793 }
1794
1795
1796 IFX_INLINE void IfxAsclin_enableFrameErrorFlag(Ifx_ASCLIN *asclin, boolean enable)
1797 {
1798 asclin->FLAGSENABLE.B.FEE = enable ? 1 : 0;
1799 }
1800
1801
1802 IFX_INLINE void IfxAsclin_enableHardwareChecksum(Ifx_ASCLIN *asclin, boolean enable)
1803 {
1804 asclin->LIN.CON.B.CSEN = enable ? 1 : 0;
1805 }
1806
1807
1808 IFX_INLINE void IfxAsclin_enableHeaderTimeoutFlag(Ifx_ASCLIN *asclin, boolean enable)
1809 {
1810 asclin->FLAGSENABLE.B.HTE = enable ? 1 : 0;
1811 }
1812
1813
1814 IFX_INLINE void IfxAsclin_enableLinAutoBaudDetectionErrorFlag(Ifx_ASCLIN *asclin, boolean enable)
1815 {
1816 asclin->FLAGSENABLE.B.LAE = enable ? 1 : 0;
1817 }
1818
1819
1820 IFX_INLINE void IfxAsclin_enableLinChecksumErrorFlag(Ifx_ASCLIN *asclin, boolean enable)
1821 {
1822 asclin->FLAGSENABLE.B.LCE = enable ? 1 : 0;
1823 }
1824
1825
1826 IFX_INLINE void IfxAsclin_enableLinParityErrorFlag(Ifx_ASCLIN *asclin, boolean enable)
1827 {
1828 asclin->FLAGSENABLE.B.LPE = enable ? 1 : 0;
1829 }
1830
1831
1832 IFX_INLINE void IfxAsclin_enableLoopBackMode(Ifx_ASCLIN *asclin, boolean enable)
1833 {
1834 asclin->IOCR.B.LB = enable ? 1 : 0;
1835 }
1836
1837
1838 IFX_INLINE void IfxAsclin_enableParity(Ifx_ASCLIN *asclin, boolean enable)
1839 {
1840 asclin->FRAMECON.B.PEN = enable ? 1 : 0;
1841 }
1842
1843
1844 IFX_INLINE void IfxAsclin_enableParityErrorFlag(Ifx_ASCLIN *asclin, boolean enable)
1845 {
1846 asclin->FLAGSENABLE.B.PEE = enable ? 1 : 0;
1847 }
1848
1849
1850 IFX_INLINE void IfxAsclin_enableRaisingEdgeDetectedFlag(Ifx_ASCLIN *asclin, boolean enable)
1851 {
1852 asclin->FLAGSENABLE.B.REDE = enable ? 1 : 0;
1853 }
1854
1855
1856 IFX_INLINE void IfxAsclin_enableResponseTimeoutFlag(Ifx_ASCLIN *asclin, boolean enable)
1857 {
1858 asclin->FLAGSENABLE.B.RTE = enable ? 1 : 0;
1859 }
1860
1861
1862 IFX_INLINE void IfxAsclin_enableRxFifoFillLevelFlag(Ifx_ASCLIN *asclin, boolean enable)
1863 {
1864 asclin->FLAGSENABLE.B.RFLE = enable ? 1 : 0;
1865 }
1866
1867
1868 IFX_INLINE void IfxAsclin_enableRxFifoInlet(Ifx_ASCLIN *asclin, boolean enable)
1869 {
1870 asclin->RXFIFOCON.B.ENI = enable ? 1 : 0;
1871 }
1872
1873
1874 IFX_INLINE void IfxAsclin_enableRxFifoOverflowFlag(Ifx_ASCLIN *asclin, boolean enable)
1875 {
1876 asclin->FLAGSENABLE.B.RFOE = enable ? 1 : 0;
1877 }
1878
1879
1880 IFX_INLINE void IfxAsclin_enableRxFifoUnderflowFlag(Ifx_ASCLIN *asclin, boolean enable)
1881 {
1882 asclin->FLAGSENABLE.B.RFUE = enable ? 1 : 0;
1883 }
1884
1885
1886 IFX_INLINE void IfxAsclin_enableRxHeaderEndFlag(Ifx_ASCLIN *asclin, boolean enable)
1887 {
1888 asclin->FLAGSENABLE.B.RHE = enable ? 1 : 0;
1889 }
1890
1891
1892 IFX_INLINE void IfxAsclin_enableRxResponseEndFlag(Ifx_ASCLIN *asclin, boolean enable)
1893 {
1894 asclin->FLAGSENABLE.B.RRE = enable ? 1 : 0;
1895 }
1896
1897
1898 IFX_INLINE void IfxAsclin_enableTransmissionCompletedFlag(Ifx_ASCLIN *asclin, boolean enable)
1899 {
1900 asclin->FLAGSENABLE.B.TCE = enable ? 1 : 0;
1901 }
1902
1903
1904 IFX_INLINE void IfxAsclin_enableTxFifoFillLevelFlag(Ifx_ASCLIN *asclin, boolean enable)
1905 {
1906 asclin->FLAGSENABLE.B.TFLE = enable ? 1 : 0;
1907 }
1908
1909
1910 IFX_INLINE void IfxAsclin_enableTxFifoOutlet(Ifx_ASCLIN *asclin, boolean enable)
1911 {
1912 asclin->TXFIFOCON.B.ENO = enable ? 1 : 0;
1913 }
1914
1915
1916 IFX_INLINE void IfxAsclin_enableTxFifoOverflowFlag(Ifx_ASCLIN *asclin, boolean enable)
1917 {
1918 asclin->FLAGSENABLE.B.TFOE = enable ? 1 : 0;
1919 }
1920
1921
1922 IFX_INLINE void IfxAsclin_enableTxHeaderEndFlag(Ifx_ASCLIN *asclin, boolean enable)
1923 {
1924 asclin->FLAGSENABLE.B.THE = enable ? 1 : 0;
1925 }
1926
1927
1928 IFX_INLINE void IfxAsclin_enableTxResponseEndFlag(Ifx_ASCLIN *asclin, boolean enable)
1929 {
1930 asclin->FLAGSENABLE.B.TRE = enable ? 1 : 0;
1931 }
1932
1933
1934 IFX_INLINE void IfxAsclin_flushRxFifo(Ifx_ASCLIN *asclin)
1935 {
1936 asclin->RXFIFOCON.B.FLUSH = 1;
1937 }
1938
1939
1940 IFX_INLINE void IfxAsclin_flushTxFifo(Ifx_ASCLIN *asclin)
1941 {
1942 asclin->TXFIFOCON.B.FLUSH = 1;
1943 }
1944
1945
1946 IFX_INLINE boolean IfxAsclin_getBreakDetectedFlagStatus(Ifx_ASCLIN *asclin)
1947 {
1948 return asclin->FLAGS.B.BD;
1949 }
1950
1951
1952 IFX_INLINE uint8 IfxAsclin_getClockSource(Ifx_ASCLIN *asclin)
1953 {
1954 return asclin->CSR.B.CLKSEL;
1955 }
1956
1957
1958 IFX_INLINE boolean IfxAsclin_getClockStatus(Ifx_ASCLIN *asclin)
1959 {
1960 return asclin->CSR.B.CON;
1961 }
1962
1963
1964 IFX_INLINE boolean IfxAsclin_getCollisionDetectionErrorFlagStatus(Ifx_ASCLIN *asclin)
1965 {
1966 return asclin->FLAGS.B.CE;
1967 }
1968
1969
1970 IFX_INLINE boolean IfxAsclin_getFallingEdgeDetectedFlagStatus(Ifx_ASCLIN *asclin)
1971 {
1972 return asclin->FLAGS.B.FED;
1973 }
1974
1975
1976 IFX_INLINE boolean IfxAsclin_getFrameErrorFlagStatus(Ifx_ASCLIN *asclin)
1977 {
1978 return asclin->FLAGS.B.FE;
1979 }
1980
1981
1982 IFX_INLINE boolean IfxAsclin_getHeaderTimeoutFlagStatus(Ifx_ASCLIN *asclin)
1983 {
1984 return asclin->FLAGS.B.HT;
1985 }
1986
1987
1988 IFX_INLINE boolean IfxAsclin_getKernelResetStatus(Ifx_ASCLIN *asclin)
1989 {
1990 return asclin->KRST0.B.RSTSTAT;
1991 }
1992
1993
1994 IFX_INLINE boolean IfxAsclin_getLinAutoBaudDetectionErrorFlagStatus(Ifx_ASCLIN *asclin)
1995 {
1996 return asclin->FLAGS.B.LA;
1997 }
1998
1999
2000 IFX_INLINE boolean IfxAsclin_getLinChecksumErrorFlagStatus(Ifx_ASCLIN *asclin)
2001 {
2002 return asclin->FLAGS.B.LC;
2003 }
2004
2005
2006 IFX_INLINE boolean IfxAsclin_getLinParityErrorFlagStatus(Ifx_ASCLIN *asclin)
2007 {
2008 return asclin->FLAGS.B.LP;
2009 }
2010
2011
2012 IFX_INLINE boolean IfxAsclin_getModuleStatus(Ifx_ASCLIN *asclin)
2013 {
2014 return asclin->CLC.B.DISS;
2015 }
2016
2017
2018 IFX_INLINE boolean IfxAsclin_getParityErrorFlagStatus(Ifx_ASCLIN *asclin)
2019 {
2020 return asclin->FLAGS.B.PE;
2021 }
2022
2023
2024 IFX_INLINE uint16 IfxAsclin_getPrescaler(Ifx_ASCLIN *asclin)
2025 {
2026 return asclin->BITCON.B.PRESCALER + 1;
2027 }
2028
2029
2030 IFX_INLINE boolean IfxAsclin_getRaisingEdgeDetectedFlagStatus(Ifx_ASCLIN *asclin)
2031 {
2032 return asclin->FLAGS.B.RED;
2033 }
2034
2035
2036 IFX_INLINE boolean IfxAsclin_getReceiveSignalStatus(Ifx_ASCLIN *asclin)
2037 {
2038 return asclin->IOCR.B.RXM;
2039 }
2040
2041
2042 IFX_INLINE boolean IfxAsclin_getResponseTimeoutFlagStatus(Ifx_ASCLIN *asclin)
2043 {
2044 return asclin->FLAGS.B.RT;
2045 }
2046
2047
2048 IFX_INLINE uint8 IfxAsclin_getRxFifoFillLevel(Ifx_ASCLIN *asclin)
2049 {
2050 return asclin->RXFIFOCON.B.FILL;
2051 }
2052
2053
2054 IFX_INLINE boolean IfxAsclin_getRxFifoFillLevelFlagStatus(Ifx_ASCLIN *asclin)
2055 {
2056 return asclin->FLAGS.B.RFL;
2057 }
2058
2059
2060 IFX_INLINE uint8 IfxAsclin_getRxFifoOutletWidth(Ifx_ASCLIN *asclin)
2061 {
2062 return asclin->RXFIFOCON.B.OUTW;
2063 }
2064
2065
2066 IFX_INLINE boolean IfxAsclin_getRxFifoOverflowFlagStatus(Ifx_ASCLIN *asclin)
2067 {
2068 return asclin->FLAGS.B.RFO;
2069 }
2070
2071
2072 IFX_INLINE boolean IfxAsclin_getRxFifoUnderflowFlagStatus(Ifx_ASCLIN *asclin)
2073 {
2074 return asclin->FLAGS.B.RFU;
2075 }
2076
2077
2078 IFX_INLINE boolean IfxAsclin_getRxHeaderEndFlagStatus(Ifx_ASCLIN *asclin)
2079 {
2080 return asclin->FLAGS.B.RH;
2081 }
2082
2083
2084 IFX_INLINE boolean IfxAsclin_getRxResponseEndFlagStatus(Ifx_ASCLIN *asclin)
2085 {
2086 return asclin->FLAGS.B.RR;
2087 }
2088
2089
2090 IFX_INLINE boolean IfxAsclin_getTransmissionCompletedFlagStatus(Ifx_ASCLIN *asclin)
2091 {
2092 return asclin->FLAGS.B.TC;
2093 }
2094
2095
2096 IFX_INLINE boolean IfxAsclin_getTransmitSignalStatus(Ifx_ASCLIN *asclin)
2097 {
2098 return asclin->IOCR.B.TXM;
2099 }
2100
2101
2102 IFX_INLINE uint8 IfxAsclin_getTxFifoFillLevel(Ifx_ASCLIN *asclin)
2103 {
2104 return asclin->TXFIFOCON.B.FILL;
2105 }
2106
2107
2108 IFX_INLINE boolean IfxAsclin_getTxFifoFillLevelFlagStatus(Ifx_ASCLIN *asclin)
2109 {
2110 return asclin->FLAGS.B.TFL;
2111 }
2112
2113
2114 IFX_INLINE uint8 IfxAsclin_getTxFifoInletWidth(Ifx_ASCLIN *asclin)
2115 {
2116 return asclin->TXFIFOCON.B.INW;
2117 }
2118
2119
2120 IFX_INLINE boolean IfxAsclin_getTxFifoOverflowFlagStatus(Ifx_ASCLIN *asclin)
2121 {
2122 return asclin->FLAGS.B.TFO;
2123 }
2124
2125
2126 IFX_INLINE boolean IfxAsclin_getTxHeaderEndFlagStatus(Ifx_ASCLIN *asclin)
2127 {
2128 return asclin->FLAGS.B.TH;
2129 }
2130
2131
2132 IFX_INLINE boolean IfxAsclin_getTxResponseEndFlagStatus(Ifx_ASCLIN *asclin)
2133 {
2134 return asclin->FLAGS.B.TR;
2135 }
2136
2137
2138 IFX_INLINE void IfxAsclin_initCtsPin(const IfxAsclin_Cts_In *cts, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
2139 {
2140 if (cts->pin.port != NULL_PTR)
2141 {
2142 IfxPort_setPinModeInput(cts->pin.port, cts->pin.pinIndex, inputMode);
2143 IfxPort_setPinPadDriver(cts->pin.port, cts->pin.pinIndex, padDriver);
2144 IfxAsclin_enableCts(cts->module, TRUE);
2145 IfxAsclin_setCtsInput(cts->module, (IfxAsclin_CtsInputSelect)cts->select);
2146 }
2147 }
2148
2149
2150 IFX_INLINE void IfxAsclin_initRtsPin(const IfxAsclin_Rts_Out *rts, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
2151 {
2152 IfxPort_setPinModeOutput(rts->pin.port, rts->pin.pinIndex, outputMode, rts->select);
2153 IfxPort_setPinPadDriver(rts->pin.port, rts->pin.pinIndex, padDriver);
2154 }
2155
2156
2157 IFX_INLINE void IfxAsclin_initRxPin(const IfxAsclin_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
2158 {
2159 if (rx->pin.port != NULL_PTR)
2160 {
2161 IfxPort_setPinModeInput(rx->pin.port, rx->pin.pinIndex, inputMode);
2162 IfxPort_setPinPadDriver(rx->pin.port, rx->pin.pinIndex, padDriver);
2163 IfxAsclin_setRxInput(rx->module, (IfxAsclin_RxInputSelect)rx->select);
2164 }
2165 }
2166
2167
2168 IFX_INLINE void IfxAsclin_initSclkPin(const IfxAsclin_Sclk_Out *sclk, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
2169 {
2170 IfxPort_setPinModeOutput(sclk->pin.port, sclk->pin.pinIndex, outputMode, sclk->select);
2171 IfxPort_setPinPadDriver(sclk->pin.port, sclk->pin.pinIndex, padDriver);
2172 }
2173
2174
2175 IFX_INLINE void IfxAsclin_initSlsoPin(const IfxAsclin_Slso_Out *slso, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
2176 {
2177 IfxPort_setPinModeOutput(slso->pin.port, slso->pin.pinIndex, outputMode, slso->select);
2178 IfxPort_setPinPadDriver(slso->pin.port, slso->pin.pinIndex, padDriver);
2179 }
2180
2181
2182 IFX_INLINE void IfxAsclin_initTxPin(const IfxAsclin_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
2183 {
2184 IfxPort_setPinModeOutput(tx->pin.port, tx->pin.pinIndex, outputMode, tx->select);
2185 IfxPort_setPinPadDriver(tx->pin.port, tx->pin.pinIndex, padDriver);
2186 }
2187
2188
2189 IFX_INLINE boolean IfxAsclin_isModuleSuspended(Ifx_ASCLIN *asclin)
2190 {
2191 Ifx_ASCLIN_OCS ocs;
2192
2193 // read the status
2194 ocs.U = asclin->OCS.U;
2195
2196 // return the status
2197 return ocs.B.SUSSTA;
2198 }
2199
2200
2201 IFX_INLINE uint32 IfxAsclin_readRxData(Ifx_ASCLIN *asclin)
2202 {
2203 return asclin->RXDATA.U;
2204 }
2205
2206
2207 IFX_INLINE void IfxAsclin_setBrdLowerlimt(Ifx_ASCLIN *asclin, uint8 limit)
2208 {
2209 asclin->BRD.B.LOWERLIMIT = limit;
2210 }
2211
2212
2213 IFX_INLINE void IfxAsclin_setBrdUpperlimt(Ifx_ASCLIN *asclin, uint8 limit)
2214 {
2215 asclin->BRD.B.UPPERLIMIT = limit;
2216 }
2217
2218
2219 IFX_INLINE void IfxAsclin_setChecksumInjection(Ifx_ASCLIN *asclin, IfxAsclin_ChecksumInjection csi)
2220 {
2221 asclin->LIN.CON.B.CSI = csi;
2222 }
2223
2224
2225 IFX_INLINE void IfxAsclin_setChecksumMode(Ifx_ASCLIN *asclin, IfxAsclin_Checksum mode)
2226 {
2227 asclin->DATCON.B.CSM = mode;
2228 }
2229
2230
2231 IFX_INLINE void IfxAsclin_setClockPolarity(Ifx_ASCLIN *asclin, IfxAsclin_ClockPolarity cpol)
2232 {
2233 asclin->IOCR.B.CPOL = cpol;
2234 }
2235
2236
2237 IFX_INLINE void IfxAsclin_setCtsInput(Ifx_ASCLIN *asclin, IfxAsclin_CtsInputSelect ctsi)
2238 {
2239 asclin->IOCR.B.CTS = ctsi;
2240 }
2241
2242
2243 IFX_INLINE void IfxAsclin_setDataLength(Ifx_ASCLIN *asclin, IfxAsclin_DataLength length)
2244 {
2245 asclin->DATCON.B.DATLEN = length;
2246 }
2247
2248
2249 IFX_INLINE void IfxAsclin_setDenominator(Ifx_ASCLIN *asclin, uint16 denominator)
2250 {
2251 asclin->BRG.B.DENOMINATOR = denominator;
2252 }
2253
2254
2255 IFX_INLINE void IfxAsclin_setDisableModuleRequest(Ifx_ASCLIN *asclin)
2256 {
2257 asclin->CLC.B.DISR = 1;
2258 }
2259
2260
2261 IFX_INLINE void IfxAsclin_setEnableModuleRequest(Ifx_ASCLIN *asclin)
2262 {
2263 asclin->CLC.B.DISR = 0;
2264 }
2265
2266
2267 IFX_INLINE void IfxAsclin_setFilterDepth(Ifx_ASCLIN *asclin, uint8 depth)
2268 {
2269 asclin->IOCR.B.DEPTH = __minu(depth, 63);
2270 }
2271
2272
2273 IFX_INLINE void IfxAsclin_setFrameMode(Ifx_ASCLIN *asclin, IfxAsclin_FrameMode mode)
2274 {
2275 asclin->FRAMECON.B.MODE = mode;
2276 }
2277
2278
2279 IFX_INLINE void IfxAsclin_setHeaderResponseSelect(Ifx_ASCLIN *asclin, IfxAsclin_HeaderResponseSelect type)
2280 {
2281 asclin->DATCON.B.HO = type;
2282 }
2283
2284
2285 IFX_INLINE void IfxAsclin_setIdleDelay(Ifx_ASCLIN *asclin, IfxAsclin_IdleDelay delay)
2286 {
2287 asclin->FRAMECON.B.IDLE = delay;
2288 }
2289
2290
2291 IFX_INLINE void IfxAsclin_setKernelResetOne(Ifx_ASCLIN *asclin)
2292 {
2293 asclin->KRST1.B.RST = 1;
2294 }
2295
2296
2297 IFX_INLINE void IfxAsclin_setKernelResetZero(Ifx_ASCLIN *asclin)
2298 {
2299 asclin->KRST0.B.RST = 1;
2300 }
2301
2302
2303 IFX_INLINE void IfxAsclin_setLeadDelay(Ifx_ASCLIN *asclin, IfxAsclin_LeadDelay delay)
2304 {
2305 asclin->FRAMECON.B.LEAD = delay;
2306 }
2307
2308
2309 IFX_INLINE void IfxAsclin_setLinBreakLength(Ifx_ASCLIN *asclin, uint8 length)
2310 {
2311 asclin->LIN.BTIMER.B.BREAK = length;
2312 }
2313
2314
2315 IFX_INLINE void IfxAsclin_setLinHeaderTimeout(Ifx_ASCLIN *asclin, uint8 timeout)
2316 {
2317 asclin->LIN.HTIMER.B.HEADER = timeout;
2318 }
2319
2320
2321 IFX_INLINE void IfxAsclin_setLinMode(Ifx_ASCLIN *asclin, IfxAsclin_LinMode mode)
2322 {
2323 asclin->LIN.CON.B.MS = mode;
2324 }
2325
2326
2327 IFX_INLINE void IfxAsclin_setLinResponseTimeoutMode(Ifx_ASCLIN *asclin, IfxAsclin_LinResponseTimeoutMode mode)
2328 {
2329 asclin->DATCON.B.RM = mode;
2330 }
2331
2332
2333 IFX_INLINE void IfxAsclin_setLinResponseTimeoutThreshold(Ifx_ASCLIN *asclin, uint16 threshold)
2334 {
2335 asclin->DATCON.B.RESPONSE = __minu(threshold, 256);
2336 }
2337
2338
2339 IFX_INLINE void IfxAsclin_setNumerator(Ifx_ASCLIN *asclin, uint16 numerator)
2340 {
2341 asclin->BRG.B.NUMERATOR = numerator;
2342 }
2343
2344
2345 IFX_INLINE void IfxAsclin_setOversampling(Ifx_ASCLIN *asclin, IfxAsclin_OversamplingFactor ovsFactor)
2346 {
2347 asclin->BITCON.B.OVERSAMPLING = ovsFactor;
2348 }
2349
2350
2351 IFX_INLINE void IfxAsclin_setParityType(Ifx_ASCLIN *asclin, IfxAsclin_ParityType type)
2352 {
2353 asclin->FRAMECON.B.ODD = type;
2354 }
2355
2356
2357 IFX_INLINE void IfxAsclin_setPrescaler(Ifx_ASCLIN *asclin, uint16 prescaler)
2358 {
2359 asclin->BITCON.B.PRESCALER = prescaler - 1;
2360 }
2361
2362
2363 IFX_INLINE void IfxAsclin_setRtsCtsPolarity(Ifx_ASCLIN *asclin, IfxAsclin_RtsCtsPolarity rcpol)
2364 {
2365 asclin->IOCR.B.RCPOL = rcpol;
2366 }
2367
2368
2369 IFX_INLINE void IfxAsclin_setRxBufferMode(Ifx_ASCLIN *asclin, IfxAsclin_ReceiveBufferMode mode)
2370 {
2371 asclin->RXFIFOCON.B.BUF = mode;
2372 }
2373
2374
2375 IFX_INLINE void IfxAsclin_setRxFifoInterruptLevel(Ifx_ASCLIN *asclin, IfxAsclin_RxFifoInterruptLevel level)
2376 {
2377 asclin->RXFIFOCON.B.INTLEVEL = __minu(level, 15);
2378 }
2379
2380
2381 IFX_INLINE void IfxAsclin_setRxFifoInterruptMode(Ifx_ASCLIN *asclin, IfxAsclin_FifoInterruptMode mode)
2382 {
2383 asclin->RXFIFOCON.B.FM = mode;
2384 }
2385
2386
2387 IFX_INLINE void IfxAsclin_setRxFifoOutletWidth(Ifx_ASCLIN *asclin, IfxAsclin_RxFifoOutletWidth width)
2388 {
2389 asclin->RXFIFOCON.B.OUTW = width;
2390 }
2391
2392
2393 IFX_INLINE void IfxAsclin_setRxInput(Ifx_ASCLIN *asclin, IfxAsclin_RxInputSelect alti)
2394 {
2395 asclin->IOCR.B.ALTI = alti;
2396 }
2397
2398
2399 IFX_INLINE void IfxAsclin_setSampleMode(Ifx_ASCLIN *asclin, IfxAsclin_SamplesPerBit medianFilter)
2400 {
2401 asclin->BITCON.B.SM = medianFilter;
2402 }
2403
2404
2405 IFX_INLINE void IfxAsclin_setSamplePointPosition(Ifx_ASCLIN *asclin, IfxAsclin_SamplePointPosition spPosition)
2406 {
2407 asclin->BITCON.B.SAMPLEPOINT = __minu(spPosition, asclin->BITCON.B.OVERSAMPLING);
2408 }
2409
2410
2411 IFX_INLINE void IfxAsclin_setShiftDirection(Ifx_ASCLIN *asclin, IfxAsclin_ShiftDirection dir)
2412 {
2413 asclin->FRAMECON.B.MSB = dir;
2414 }
2415
2416
2417 IFX_INLINE void IfxAsclin_setSlavePolarity(Ifx_ASCLIN *asclin, IfxAsclin_SlavePolarity spol)
2418 {
2419 asclin->IOCR.B.SPOL = spol;
2420 }
2421
2422
2423 IFX_INLINE void IfxAsclin_setSleepMode(Ifx_ASCLIN *asclin, IfxAsclin_SleepMode mode)
2424 {
2425 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
2426 IfxScuWdt_clearCpuEndinit(passwd);
2427 asclin->CLC.B.EDIS = mode;
2428 IfxScuWdt_setCpuEndinit(passwd);
2429 }
2430
2431
2432 IFX_INLINE void IfxAsclin_setStopBit(Ifx_ASCLIN *asclin, IfxAsclin_StopBit stopBit)
2433 {
2434 asclin->FRAMECON.B.STOP = stopBit;
2435 }
2436
2437
2438 IFX_INLINE void IfxAsclin_setSuspendMode(Ifx_ASCLIN *asclin, IfxAsclin_SuspendMode mode)
2439 {
2440 Ifx_ASCLIN_OCS ocs;
2441
2442 // remove protection and configure the suspend mode.
2443 ocs.B.SUS_P = 1;
2444 ocs.B.SUS = mode;
2445 asclin->OCS.U = ocs.U;
2446 }
2447
2448
2449 IFX_INLINE void IfxAsclin_setTransmitHeaderRequestFlag(Ifx_ASCLIN *asclin)
2450 {
2451 asclin->FLAGSSET.B.THRQS = 1;
2452 }
2453
2454
2455 IFX_INLINE void IfxAsclin_setTransmitResponseRequestFlag(Ifx_ASCLIN *asclin)
2456 {
2457 asclin->FLAGSSET.B.TRRQS = 1;
2458 }
2459
2460
2461 IFX_INLINE void IfxAsclin_setTransmitWakeRequestFlag(Ifx_ASCLIN *asclin)
2462 {
2463 asclin->FLAGSSET.B.TWRQS = 1;
2464 }
2465
2466
2467 IFX_INLINE void IfxAsclin_setTxFifoInletWidth(Ifx_ASCLIN *asclin, IfxAsclin_TxFifoInletWidth width)
2468 {
2469 asclin->TXFIFOCON.B.INW = width;
2470 }
2471
2472
2473 IFX_INLINE void IfxAsclin_setTxFifoInterruptLevel(Ifx_ASCLIN *asclin, IfxAsclin_TxFifoInterruptLevel level)
2474 {
2475 asclin->TXFIFOCON.B.INTLEVEL = __minu(level, 15);
2476 }
2477
2478
2479 IFX_INLINE void IfxAsclin_setTxFifoInterruptMode(Ifx_ASCLIN *asclin, IfxAsclin_FifoInterruptMode mode)
2480 {
2481 asclin->TXFIFOCON.B.FM = mode;
2482 }
2483
2484
2485 IFX_INLINE void IfxAsclin_writeTxData(Ifx_ASCLIN *asclin, uint32 data)
2486 {
2487 asclin->TXDATA.U = data;
2488 }
2489
2490
2491 IFX_INLINE uint16 IfxAsclin_getAllErrorFlagsStatus(Ifx_ASCLIN *asclin)
2492 {
2493 return (uint16)(asclin->FLAGS.U >> 16);
2494 }
2495
2496
2497 #endif /* IFXASCLIN_H */
IfxAsclin_SamplePointPosition_13
sample point position at 13
Definition: IfxAsclin.h:344
IfxAsclin_getAddress
IFX_EXTERN Ifx_ASCLIN * IfxAsclin_getAddress(IfxAsclin_Index asclin)
API to get the address for ASCLIN HW module register memory map.
Definition: IfxAsclin.c:79
IfxAsclin_TxFifoInterruptLevel_15
TX FIFO level 15.
Definition: IfxAsclin.h:450
IfxAsclin_OversamplingFactor_5
oversampling factor 5
Definition: IfxAsclin.h:237
IfxAsclin_Cts_In
CTS pin mapping structure.
Definition: IfxAsclin_PinMap.h:56
IfxAsclin_RxFifoInterruptLevel_7
RX FIFO level 7.
Definition: IfxAsclin.h:289
IfxAsclin_enableFallingEdgeDetectedFlag
IFX_INLINE void IfxAsclin_enableFallingEdgeDetectedFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables falling edge detected flag.
Definition: IfxAsclin.h:1790
IfxAsclin_SuspendMode_hard
Hard Suspend.
Definition: IfxAsclin.h:415
IfxAsclin_write32
IFX_EXTERN uint32 IfxAsclin_write32(Ifx_ASCLIN *asclin, uint32 *data, uint32 count)
Writes data up to 32 bits.
Definition: IfxAsclin.c:462
IfxAsclin_SamplePointPosition_12
sample point position at 12
Definition: IfxAsclin.h:343
IfxAsclin_setLinResponseTimeoutMode
IFX_INLINE void IfxAsclin_setLinResponseTimeoutMode(Ifx_ASCLIN *asclin, IfxAsclin_LinResponseTimeoutMode mode)
Sets the LIN response timeout mode.
Definition: IfxAsclin.h:2327
IfxAsclin_getLinAutoBaudDetectionErrorFlagStatus
IFX_INLINE boolean IfxAsclin_getLinAutoBaudDetectionErrorFlagStatus(Ifx_ASCLIN *asclin)
Returns the LIN auto baudrate detection error flag status.
Definition: IfxAsclin.h:1994
IfxAsclin_setNumerator
IFX_INLINE void IfxAsclin_setNumerator(Ifx_ASCLIN *asclin, uint16 numerator)
Sets the numerator of the fractional divider.
Definition: IfxAsclin.h:2339
IfxAsclin_Tx_Out
TX pin mapping structure.
Definition: IfxAsclin_PinMap.h:96
IfxAsclin_IdleDelay_3
idle delay in 3 bit times
Definition: IfxAsclin.h:190
IfxAsclin_ClockPolarity_idleLow
idle low
Definition: IfxAsclin.h:102
IfxAsclin_IdleDelay_0
idle delay in 0 bit times
Definition: IfxAsclin.h:187
IfxAsclin_RtsCtsPolarity_activeHigh
ready/clear are active-high
Definition: IfxAsclin.h:274
IfxAsclin_getIndex
IFX_EXTERN IfxAsclin_Index IfxAsclin_getIndex(Ifx_ASCLIN *asclin)
API to get the resource index of the ASCLIN specified.
Definition: IfxAsclin.c:121
IfxAsclin_ReceiveBufferMode
IfxAsclin_ReceiveBufferMode
Receive buffer mode Definition in Ifx_ASCLIN.RXFIFOCON.B.BUF.
Definition: IfxAsclin.h:263
IfxAsclin_RxFifoInterruptLevel_8
RX FIFO level 8.
Definition: IfxAsclin.h:290
IfxAsclin_getResponseTimeoutFlagStatus
IFX_INLINE boolean IfxAsclin_getResponseTimeoutFlagStatus(Ifx_ASCLIN *asclin)
Returns the response timeout flag status.
Definition: IfxAsclin.h:2042
IfxAsclin_getModuleStatus
IFX_INLINE boolean IfxAsclin_getModuleStatus(Ifx_ASCLIN *asclin)
Returns the module status.
Definition: IfxAsclin.h:2012
IfxAsclin_initCtsPin
IFX_INLINE void IfxAsclin_initCtsPin(const IfxAsclin_Cts_In *cts, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a CTS input.
Definition: IfxAsclin.h:2138
IfxAsclin_DataLength_6
number of bits per transfer 5
Definition: IfxAsclin.h:137
IfxAsclin_getCollisionDetectionErrorFlagStatus
IFX_INLINE boolean IfxAsclin_getCollisionDetectionErrorFlagStatus(Ifx_ASCLIN *asclin)
Returns the collision detection error flag status.
Definition: IfxAsclin.h:1964
IfxAsclin_clearKernelResetStatus
IFX_INLINE void IfxAsclin_clearKernelResetStatus(Ifx_ASCLIN *asclin)
Clears the kernel reset status.
Definition: IfxAsclin.h:1652
IfxAsclin_SamplePointPosition_1
sample point position at 1
Definition: IfxAsclin.h:332
IfxAsclin_OversamplingFactor_16
oversampling factor 16
Definition: IfxAsclin.h:248
IfxAsclin_getShiftFrequency
IFX_EXTERN float32 IfxAsclin_getShiftFrequency(Ifx_ASCLIN *asclin)
Returns the SHIFT frequency.
Definition: IfxAsclin.c:153
IfxAsclin_TxFifoInterruptLevel_6
TX FIFO level 6.
Definition: IfxAsclin.h:441
IfxAsclin_setIdleDelay
IFX_INLINE void IfxAsclin_setIdleDelay(Ifx_ASCLIN *asclin, IfxAsclin_IdleDelay delay)
Sets the idle delay.
Definition: IfxAsclin.h:2285
IfxAsclin_ReceiveBufferMode_rxFifo
RxFIFO mode.
Definition: IfxAsclin.h:265
IfxAsclin_resetModule
IFX_EXTERN void IfxAsclin_resetModule(Ifx_ASCLIN *asclin)
resets Asclin kernel
Definition: IfxAsclin.c:300
IfxAsclin_initSlsoPin
IFX_INLINE void IfxAsclin_initSlsoPin(const IfxAsclin_Slso_Out *slso, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a SLSO output.
Definition: IfxAsclin.h:2175
IfxAsclin_setSleepMode
IFX_INLINE void IfxAsclin_setSleepMode(Ifx_ASCLIN *asclin, IfxAsclin_SleepMode mode)
Sets the sensitivity of the module to sleep signal.
Definition: IfxAsclin.h:2423
IfxAsclin_getTxFifoFillLevelFlagStatus
IFX_INLINE boolean IfxAsclin_getTxFifoFillLevelFlagStatus(Ifx_ASCLIN *asclin)
Returns the Tx FIFO level flag status.
Definition: IfxAsclin.h:2108
IfxAsclin_ShiftDirection_lsbFirst
LSB first.
Definition: IfxAsclin.h:364
IfxAsclin_TxFifoInterruptLevel_0
TX FIFO level 0.
Definition: IfxAsclin.h:435
IfxAsclin_read32
IFX_EXTERN uint32 IfxAsclin_read32(Ifx_ASCLIN *asclin, uint32 *data, uint32 count)
Reads data up to 32 bits.
Definition: IfxAsclin.c:272
IfxAsclin_Status_configurationError
Configuration error.
Definition: IfxAsclin.h:391
IfxAsclin_StopBit_6
number of stop bits 6
Definition: IfxAsclin.h:406
IfxAsclin_getSrcPointerEr
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxAsclin_getSrcPointerEr(Ifx_ASCLIN *asclin)
Returns the SRC pointer for ERR.
Definition: IfxAsclin.c:159
IfxAsclin_ClockPolarity_idleHigh
idle high
Definition: IfxAsclin.h:103
IfxAsclin_CtsInputSelect_3
CTS input pin 3.
Definition: IfxAsclin.h:124
IfxAsclin_RxFifoInterruptLevel_11
RX FIFO level 11.
Definition: IfxAsclin.h:293
IfxAsclin_Sclk_Out
SCLK pin mapping structure.
Definition: IfxAsclin_PinMap.h:80
IfxAsclin_getRxFifoUnderflowFlagStatus
IFX_INLINE boolean IfxAsclin_getRxFifoUnderflowFlagStatus(Ifx_ASCLIN *asclin)
Returns the Rx FIFO underflow flag status.
Definition: IfxAsclin.h:2072
IfxAsclin_ShiftDirection_msbFirst
MSB first.
Definition: IfxAsclin.h:365
IfxAsclin_DataLength_2
number of bits per transfer 1
Definition: IfxAsclin.h:133
IfxAsclin_enableCollisionDetectionErrorFlag
IFX_INLINE void IfxAsclin_enableCollisionDetectionErrorFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables LIN collision detection error flag.
Definition: IfxAsclin.h:1778
IfxAsclin_TxFifoInterruptLevel_9
TX FIFO level 9.
Definition: IfxAsclin.h:444
IfxAsclin_clearTxFifoFillLevelFlag
IFX_INLINE void IfxAsclin_clearTxFifoFillLevelFlag(Ifx_ASCLIN *asclin)
Clears the Tx FIFO level flag.
Definition: IfxAsclin.h:1730
IfxAsclin_SamplePointPosition_14
sample point position at 14
Definition: IfxAsclin.h:345
IfxAsclin_getTxFifoOverflowFlagStatus
IFX_INLINE boolean IfxAsclin_getTxFifoOverflowFlagStatus(Ifx_ASCLIN *asclin)
Returns the Tx FIFO overflow flag status.
Definition: IfxAsclin.h:2120
IfxAsclin_SamplesPerBit
IfxAsclin_SamplesPerBit
Number of samples per bit, sample mode/medianfilter Definition in Ifx_ASCLIN.BITCON.B.SM.
Definition: IfxAsclin.h:352
IfxAsclin_TxFifoInterruptLevel_7
TX FIFO level 7.
Definition: IfxAsclin.h:442
IfxAsclin_FifoInterruptMode_single
Single Move Mode.
Definition: IfxAsclin.h:156
IfxAsclin_getOvsFrequency
IFX_EXTERN float32 IfxAsclin_getOvsFrequency(Ifx_ASCLIN *asclin)
Returns the OVS frequency.
Definition: IfxAsclin.c:141
IfxAsclin_TxFifoInterruptLevel_1
TX FIFO level 1.
Definition: IfxAsclin.h:436
IfxAsclin_ClockSource_ascFastClock
f asclinf wiil be supplied
Definition: IfxAsclin.h:112
IfxAsclin_enableModule
IFX_EXTERN void IfxAsclin_enableModule(Ifx_ASCLIN *asclin)
Enables the module.
Definition: IfxAsclin.c:70
IfxAsclin_getFaFrequency
IFX_EXTERN float32 IfxAsclin_getFaFrequency(Ifx_ASCLIN *asclin)
Returns the ASCLIN module FA frequency in Hz.
Definition: IfxAsclin.c:96
IfxAsclin_TxFifoInterruptLevel_5
TX FIFO level 5.
Definition: IfxAsclin.h:440
IfxAsclin_getFallingEdgeDetectedFlagStatus
IFX_INLINE boolean IfxAsclin_getFallingEdgeDetectedFlagStatus(Ifx_ASCLIN *asclin)
Returns the falling edge detected flag status.
Definition: IfxAsclin.h:1970
IfxAsclin_setLinHeaderTimeout
IFX_INLINE void IfxAsclin_setLinHeaderTimeout(Ifx_ASCLIN *asclin, uint8 timeout)
Sets the LIN header timeout.
Definition: IfxAsclin.h:2315
IfxAsclin_SamplePointPosition_5
sample point position at 5
Definition: IfxAsclin.h:336
IfxAsclin_RxFifoOutletWidth
IfxAsclin_RxFifoOutletWidth
Defines the number of bytes read from the Rx FIFO with one FPI bus read Definition in Ifx_ASCLIN...
Definition: IfxAsclin.h:304
IfxAsclin_LeadDelay_3
lead delay in 3 bit times
Definition: IfxAsclin.h:206
IfxAsclin_SamplePointPosition_4
sample point position at 4
Definition: IfxAsclin.h:335
IfxAsclin_SamplePointPosition_15
sample point position at 15
Definition: IfxAsclin.h:346
IfxAsclin_getLinParityErrorFlagStatus
IFX_INLINE boolean IfxAsclin_getLinParityErrorFlagStatus(Ifx_ASCLIN *asclin)
Returns the LIN parity error flag status.
Definition: IfxAsclin.h:2006
IfxAsclin_flushTxFifo
IFX_INLINE void IfxAsclin_flushTxFifo(Ifx_ASCLIN *asclin)
Flushes (empties) the Tx FIFO.
Definition: IfxAsclin.h:1940
IfxAsclin_CtsInputSelect_2
CTS input pin 2.
Definition: IfxAsclin.h:123
IfxAsclin_RxFifoOutletWidth_0
number of bytes 0
Definition: IfxAsclin.h:306
IfxAsclin_clearTxResponseEndFlag
IFX_INLINE void IfxAsclin_clearTxResponseEndFlag(Ifx_ASCLIN *asclin)
Clears the transmit response end flag.
Definition: IfxAsclin.h:1748
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:140
IfxAsclin_Index
IfxAsclin_Index
List of the available Asclin resources.
Definition: IfxAsclin_cfg.h:77
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxAsclin_RxFifoInterruptLevel_1
RX FIFO level 1.
Definition: IfxAsclin.h:283
IfxAsclin_OversamplingFactor_13
oversampling factor 13
Definition: IfxAsclin.h:245
IfxAsclin_IdleDelay_4
idle delay in 4 bit times
Definition: IfxAsclin.h:191
IfxAsclin_enableRxResponseEndFlag
IFX_INLINE void IfxAsclin_enableRxResponseEndFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables receive response end flag.
Definition: IfxAsclin.h:1892
float32
float float32
Definition: Platform_Types.h:170
IfxAsclin_Cts_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxAsclin_PinMap.h:59
IfxAsclin_Slso_Out
SLSO pin mapping structure.
Definition: IfxAsclin_PinMap.h:88
IfxAsclin_setRxFifoInterruptMode
IFX_INLINE void IfxAsclin_setRxFifoInterruptMode(Ifx_ASCLIN *asclin, IfxAsclin_FifoInterruptMode mode)
Selects the Rx FIFO interupt generation mode.
Definition: IfxAsclin.h:2381
IfxAsclin_initRxPin
IFX_INLINE void IfxAsclin_initRxPin(const IfxAsclin_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a RX input.
Definition: IfxAsclin.h:2157
IfxAsclin_setDenominator
IFX_INLINE void IfxAsclin_setDenominator(Ifx_ASCLIN *asclin, uint16 denominator)
Sets the denominator of the fractional divider.
Definition: IfxAsclin.h:2249
IfxAsclin_RxFifoInterruptLevel_5
RX FIFO level 5.
Definition: IfxAsclin.h:287
IfxAsclin_OversamplingFactor_7
oversampling factor 7
Definition: IfxAsclin.h:239
IfxAsclin_StopBit_3
number of stop bits 3
Definition: IfxAsclin.h:403
IfxAsclin_setBrdUpperlimt
IFX_INLINE void IfxAsclin_setBrdUpperlimt(Ifx_ASCLIN *asclin, uint8 limit)
Sets the baudrate detection&#39;s upper limit.
Definition: IfxAsclin.h:2213
IfxAsclin_SuspendMode_none
No suspend.
Definition: IfxAsclin.h:414
IfxAsclin_Rts_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxAsclin_PinMap.h:76
IfxAsclin_getRxFifoOutletWidth
IFX_INLINE uint8 IfxAsclin_getRxFifoOutletWidth(Ifx_ASCLIN *asclin)
Returns the receive FIFO inlet width.
Definition: IfxAsclin.h:2060
IfxAsclin_getTxFifoInletWidth
IFX_INLINE uint8 IfxAsclin_getTxFifoInletWidth(Ifx_ASCLIN *asclin)
Returns the transmit FIFO inlet width.
Definition: IfxAsclin.h:2114
__minu
uint32 __minu(uint32, uint32) __attribute__((intrinsic_pseudo(3
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:322
IfxAsclin_StopBit
IfxAsclin_StopBit
ASC and LIN mode: number of stop bits (0 is not allowed), SPI mode: trailing delay. Definition in Ifx_ASCLIN.FRAMECON.B.STOP.
Definition: IfxAsclin.h:398
IfxAsclin_DataLength_12
number of bits per transfer 11
Definition: IfxAsclin.h:143
IfxAsclin_clearAllFlags
IFX_INLINE void IfxAsclin_clearAllFlags(Ifx_ASCLIN *asclin)
clears all the flags
Definition: IfxAsclin.h:1616
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxAsclin_DataLength_4
number of bits per transfer 3
Definition: IfxAsclin.h:135
IfxAsclin_RxInputSelect
IfxAsclin_RxInputSelect
Alternate input selection for Rx signal. Definition in Ifx_ASCLIN.IOCR.B.ALTI.
Definition: IfxAsclin.h:315
IfxAsclin_Checksum
IfxAsclin_Checksum
Defines if the classic or the enhanced checksum will be calculated by the checksum block...
Definition: IfxAsclin.h:81
IfxAsclin_RxFifoInterruptLevel_13
RX FIFO level 13.
Definition: IfxAsclin.h:295
IfxAsclin_RxFifoInterruptLevel_16
RX FIFO level 16.
Definition: IfxAsclin.h:298
IfxSrc.h
SRC basic functionality.
IfxAsclin_LinMode
IfxAsclin_LinMode
Configures if the module in LIN mode operates as master or slave Definition in Ifx_ASCLIN.LIN.CON.B.MS.
Definition: IfxAsclin.h:216
IfxAsclin_DataLength_16
number of bits per transfer 15
Definition: IfxAsclin.h:147
IfxAsclin_TxFifoInterruptLevel_8
TX FIFO level 8.
Definition: IfxAsclin.h:443
IfxAsclin_LinResponseTimeoutMode
IfxAsclin_LinResponseTimeoutMode
Defines the timeout threshold of RESPOSE bit is for LIN response timeout or LIN frame timeout...
Definition: IfxAsclin.h:225
IfxCpu_Intrinsics.h
IfxAsclin_ChecksumInjection_written
checksum byte is written
Definition: IfxAsclin.h:93
IfxAsclin_getReceiveSignalStatus
IFX_INLINE boolean IfxAsclin_getReceiveSignalStatus(Ifx_ASCLIN *asclin)
Returns the received signal status.
Definition: IfxAsclin.h:2036
IfxAsclin_clearLinAutoBaudDetectionErrorFlag
IFX_INLINE void IfxAsclin_clearLinAutoBaudDetectionErrorFlag(Ifx_ASCLIN *asclin)
Clears the auto baudrate detection error flag.
Definition: IfxAsclin.h:1658
IfxAsclin_OversamplingFactor_11
oversampling factor 11
Definition: IfxAsclin.h:243
IfxAsclin_LeadDelay_2
lead delay in 2 bit times
Definition: IfxAsclin.h:205
IfxAsclin_clearRxFifoFillLevelFlag
IFX_INLINE void IfxAsclin_clearRxFifoFillLevelFlag(Ifx_ASCLIN *asclin)
Clears the Rx FIFO level flag.
Definition: IfxAsclin.h:1694
IfxAsclin_HeaderResponseSelect
IfxAsclin_HeaderResponseSelect
Defines if LIN frame shall consist of a header and response or of a header only. Definition in Ifx_AS...
Definition: IfxAsclin.h:174
IfxAsclin_DataLength_1
number of bits per transfer 0
Definition: IfxAsclin.h:132
IfxAsclin_setLinBreakLength
IFX_INLINE void IfxAsclin_setLinBreakLength(Ifx_ASCLIN *asclin, uint8 length)
Sets the LIN break length.
Definition: IfxAsclin.h:2309
IfxAsclin_PinMap.h
ASCLIN I/O map.
IfxAsclin_OversamplingFactor_15
oversampling factor 15
Definition: IfxAsclin.h:247
IfxAsclin_RxFifoInterruptLevel
IfxAsclin_RxFifoInterruptLevel
Defines the filling level that triggers a drain (RX) interrupt or DMA access Definition in Ifx_ASCLIN...
Definition: IfxAsclin.h:281
IfxAsclin_LinResponseTimeoutMode_frameTimeout
timeout threshold is for frame
Definition: IfxAsclin.h:227
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxAsclin_enableCollisionDetection
IFX_INLINE void IfxAsclin_enableCollisionDetection(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the collision detection.
Definition: IfxAsclin.h:1772
IfxAsclin_clearRxFifoUnderflowFlag
IFX_INLINE void IfxAsclin_clearRxFifoUnderflowFlag(Ifx_ASCLIN *asclin)
Clears the Rx FIFO underflow flag.
Definition: IfxAsclin.h:1706
IfxPort_setPinModeInput
IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode.
Definition: IfxPort.h:669
IfxAsclin_RxFifoInterruptLevel_14
RX FIFO level 14.
Definition: IfxAsclin.h:296
IfxAsclin_TxFifoInletWidth_3
number of bytes 3
Definition: IfxAsclin.h:427
IfxAsclin_setParityType
IFX_INLINE void IfxAsclin_setParityType(Ifx_ASCLIN *asclin, IfxAsclin_ParityType type)
Sets the parity type.
Definition: IfxAsclin.h:2351
IfxAsclin_enableRxFifoFillLevelFlag
IFX_INLINE void IfxAsclin_enableRxFifoFillLevelFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Rx FIFO level flag.
Definition: IfxAsclin.h:1862
IfxAsclin_setBitTiming
IFX_EXTERN boolean IfxAsclin_setBitTiming(Ifx_ASCLIN *asclin, float32 baudrate, IfxAsclin_OversamplingFactor oversampling, IfxAsclin_SamplePointPosition samplepoint, IfxAsclin_SamplesPerBit medianFilter)
Set the bit timing.
Definition: IfxAsclin.c:331
IfxAsclin_setTransmitHeaderRequestFlag
IFX_INLINE void IfxAsclin_setTransmitHeaderRequestFlag(Ifx_ASCLIN *asclin)
Sets the transmit header request flag.
Definition: IfxAsclin.h:2449
IfxAsclin_DataLength_11
number of bits per transfer 10
Definition: IfxAsclin.h:142
IfxAsclin_setRxFifoOutletWidth
IFX_INLINE void IfxAsclin_setRxFifoOutletWidth(Ifx_ASCLIN *asclin, IfxAsclin_RxFifoOutletWidth width)
Sets the receive FIFO outlet width.
Definition: IfxAsclin.h:2387
IfxAsclin_setKernelResetZero
IFX_INLINE void IfxAsclin_setKernelResetZero(Ifx_ASCLIN *asclin)
Sets the kernel reset of the KRST0.
Definition: IfxAsclin.h:2297
IfxAsclin_ChecksumInjection_notWritten
checksum byte is not written
Definition: IfxAsclin.h:92
IfxAsclin_TxFifoInterruptLevel
IfxAsclin_TxFifoInterruptLevel
Defines the filling level that triggers a refill (TX) interrupt or DMA access Definition in Ifx_ASCLI...
Definition: IfxAsclin.h:433
IfxAsclin_IdleDelay_2
idle delay in 2 bit times
Definition: IfxAsclin.h:189
IfxAsclin_RxFifoInterruptLevel_9
RX FIFO level 9.
Definition: IfxAsclin.h:291
IfxAsclin_SamplePointPosition_10
sample point position at 10
Definition: IfxAsclin.h:341
IfxAsclin_enableParityErrorFlag
IFX_INLINE void IfxAsclin_enableParityErrorFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables parity error flag.
Definition: IfxAsclin.h:1844
IfxAsclin_ParityType_odd
odd parity
Definition: IfxAsclin.h:257
IfxScuWdt.h
SCU basic functionality.
IfxAsclin_Cts_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxAsclin_PinMap.h:60
IfxAsclin_DataLength_9
number of bits per transfer 8
Definition: IfxAsclin.h:140
IfxAsclin_getTxHeaderEndFlagStatus
IFX_INLINE boolean IfxAsclin_getTxHeaderEndFlagStatus(Ifx_ASCLIN *asclin)
Returns the transmit header end flag status.
Definition: IfxAsclin.h:2126
IfxAsclin_CtsInputSelect_1
CTS input pin 1.
Definition: IfxAsclin.h:122
IfxAsclin_DataLength_10
number of bits per transfer 9
Definition: IfxAsclin.h:141
IfxAsclin_enableTxFifoOverflowFlag
IFX_INLINE void IfxAsclin_enableTxFifoOverflowFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Tx FIFO overflow flag.
Definition: IfxAsclin.h:1916
IfxAsclin_getSrcPointerTx
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxAsclin_getSrcPointerTx(Ifx_ASCLIN *asclin)
Returns the SRC pointer for Tx.
Definition: IfxAsclin.c:225
IfxAsclin_SlavePolarity_idlehigh
idle high
Definition: IfxAsclin.h:375
IfxAsclin_setClockPolarity
IFX_INLINE void IfxAsclin_setClockPolarity(Ifx_ASCLIN *asclin, IfxAsclin_ClockPolarity cpol)
Selects the clock polarity.
Definition: IfxAsclin.h:2231
IfxAsclin_enableRaisingEdgeDetectedFlag
IFX_INLINE void IfxAsclin_enableRaisingEdgeDetectedFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables raising edge detected flag.
Definition: IfxAsclin.h:1850
IfxAsclin_clearParityErrorFlag
IFX_INLINE void IfxAsclin_clearParityErrorFlag(Ifx_ASCLIN *asclin)
Clears the parity error flag.
Definition: IfxAsclin.h:1676
IfxAsclin_enableCts
IFX_INLINE void IfxAsclin_enableCts(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables CTS.
Definition: IfxAsclin.h:1784
IfxAsclin_OversamplingFactor
IfxAsclin_OversamplingFactor
Defines the bit length in ticks in the range of 1 to 16. The lengths of 1 to 3 are not allowed Defini...
Definition: IfxAsclin.h:234
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxAsclin_enableHardwareChecksum
IFX_INLINE void IfxAsclin_enableHardwareChecksum(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the hardware checksum.
Definition: IfxAsclin.h:1802
IfxAsclin_getRxResponseEndFlagStatus
IFX_INLINE boolean IfxAsclin_getRxResponseEndFlagStatus(Ifx_ASCLIN *asclin)
Returns the receive response end flag status.
Definition: IfxAsclin.h:2084
IfxAsclin_setChecksumInjection
IFX_INLINE void IfxAsclin_setChecksumInjection(Ifx_ASCLIN *asclin, IfxAsclin_ChecksumInjection csi)
Sets the checksum injection.
Definition: IfxAsclin.h:2219
IfxAsclin_ReceiveBufferMode_rxBuffer
single stage Rx buffer
Definition: IfxAsclin.h:266
IfxAsclin_SuspendMode
IfxAsclin_SuspendMode
OCDS Suspend Control (OCDS.SUS)
Definition: IfxAsclin.h:412
IfxAsclin_setRxBufferMode
IFX_INLINE void IfxAsclin_setRxBufferMode(Ifx_ASCLIN *asclin, IfxAsclin_ReceiveBufferMode mode)
Sets the receive buffer mode.
Definition: IfxAsclin.h:2369
IfxAsclin_Status_noError
No error.
Definition: IfxAsclin.h:392
IfxAsclin_DataLength_5
number of bits per transfer 4
Definition: IfxAsclin.h:136
IfxAsclin_SamplePointPosition_9
sample point position at 9
Definition: IfxAsclin.h:340
IfxAsclin_RxFifoOutletWidth_1
number of bytes 1
Definition: IfxAsclin.h:307
IfxAsclin_RxFifoOutletWidth_3
number of bytes 3
Definition: IfxAsclin.h:309
IfxAsclin_HeaderResponseSelect_headerAndResponse
header and response expected
Definition: IfxAsclin.h:176
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxAsclin_OversamplingFactor_9
oversampling factor 9
Definition: IfxAsclin.h:241
IfxAsclin_getRxFifoFillLevelFlagStatus
IFX_INLINE boolean IfxAsclin_getRxFifoFillLevelFlagStatus(Ifx_ASCLIN *asclin)
Returns the Rx FIFO level flag status.
Definition: IfxAsclin.h:2054
IfxAsclin_LeadDelay
IfxAsclin_LeadDelay
Defines the leading delay in bit times in SPI mode. ASC mode: not applicable. LIN mode: delay between...
Definition: IfxAsclin.h:201
IfxAsclin_enableFrameErrorFlag
IFX_INLINE void IfxAsclin_enableFrameErrorFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables frame error flag.
Definition: IfxAsclin.h:1796
IfxAsclin_FrameMode
IfxAsclin_FrameMode
Defines the basic operating mode of the module. Changing the mode must be done by switching first to ...
Definition: IfxAsclin.h:163
IfxAsclin_clearRxFifoOverflowFlag
IFX_INLINE void IfxAsclin_clearRxFifoOverflowFlag(Ifx_ASCLIN *asclin)
Clears the Rx FIFO overflow flag.
Definition: IfxAsclin.h:1700
IfxAsclin_IdleDelay
IfxAsclin_IdleDelay
Defines the duration of the IDLE delay in bit times. SPI mode: this is the idle time between the fram...
Definition: IfxAsclin.h:185
IfxAsclin_DataLength_3
number of bits per transfer 2
Definition: IfxAsclin.h:134
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxAsclin_setRxInput
IFX_INLINE void IfxAsclin_setRxInput(Ifx_ASCLIN *asclin, IfxAsclin_RxInputSelect alti)
Selects the alternate input for Rx signal.
Definition: IfxAsclin.h:2393
IfxAsclin_TxFifoInterruptLevel_14
TX FIFO level 14.
Definition: IfxAsclin.h:449
IfxAsclin_Rx_In
RX pin mapping structure.
Definition: IfxAsclin_PinMap.h:64
IfxAsclin_setRxFifoInterruptLevel
IFX_INLINE void IfxAsclin_setRxFifoInterruptLevel(Ifx_ASCLIN *asclin, IfxAsclin_RxFifoInterruptLevel level)
Sets the Tx FIFO interrupt level.
Definition: IfxAsclin.h:2375
IfxAsclin_setRtsCtsPolarity
IFX_INLINE void IfxAsclin_setRtsCtsPolarity(Ifx_ASCLIN *asclin, IfxAsclin_RtsCtsPolarity rcpol)
Selects the RTS/CTS polarity.
Definition: IfxAsclin.h:2363
IfxAsclin_clearRxHeaderEndFlag
IFX_INLINE void IfxAsclin_clearRxHeaderEndFlag(Ifx_ASCLIN *asclin)
Clears the receive header end flag.
Definition: IfxAsclin.h:1712
IfxAsclin_setChecksumMode
IFX_INLINE void IfxAsclin_setChecksumMode(Ifx_ASCLIN *asclin, IfxAsclin_Checksum mode)
Sets the checksum mode.
Definition: IfxAsclin.h:2225
IfxAsclin_ClockSource
IfxAsclin_ClockSource
Selection of clock source Definition in Ifx_ASCLIN.CSR.B.CLKSEL.
Definition: IfxAsclin.h:109
IfxAsclin_DataLength
IfxAsclin_DataLength
Number of bits per transfer Definition in Ifx_ASCLIN.FRAMECON.B.DATALEN.
Definition: IfxAsclin.h:130
IfxAsclin_SamplePointPosition_2
sample point position at 2
Definition: IfxAsclin.h:333
IfxAsclin_clearFrameErrorFlag
IFX_INLINE void IfxAsclin_clearFrameErrorFlag(Ifx_ASCLIN *asclin)
Clears the frame error flag.
Definition: IfxAsclin.h:1640
IfxAsclin_LeadDelay_0
lead delay in 0 bit times
Definition: IfxAsclin.h:203
IfxAsclin_setSampleMode
IFX_INLINE void IfxAsclin_setSampleMode(Ifx_ASCLIN *asclin, IfxAsclin_SamplesPerBit medianFilter)
Sets the sample mode (number of samples per bit / median filter)
Definition: IfxAsclin.h:2399
IfxAsclin_enableHeaderTimeoutFlag
IFX_INLINE void IfxAsclin_enableHeaderTimeoutFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables header timeout flag.
Definition: IfxAsclin.h:1808
IfxAsclin_ChecksumInjection
IfxAsclin_ChecksumInjection
Defines if the received checksum byte is written into the RXFifo or not. Definition in Ifx_ASCLIN...
Definition: IfxAsclin.h:90
IfxAsclin_getKernelResetStatus
IFX_INLINE boolean IfxAsclin_getKernelResetStatus(Ifx_ASCLIN *asclin)
Returns the kernel reset status.
Definition: IfxAsclin.h:1988
IfxAsclin_Rts_Out
RTS pin mapping structure.
Definition: IfxAsclin_PinMap.h:72
IfxAsclin_enableAscErrorFlags
IFX_EXTERN void IfxAsclin_enableAscErrorFlags(Ifx_ASCLIN *asclin, boolean parEnable, boolean rfoEnable)
Enables the ASC error interrupt Flags.
Definition: IfxAsclin.c:63
IfxAsclin_setLeadDelay
IFX_INLINE void IfxAsclin_setLeadDelay(Ifx_ASCLIN *asclin, IfxAsclin_LeadDelay delay)
Sets the lead delay.
Definition: IfxAsclin.h:2303
IfxAsclin_setLinResponseTimeoutThreshold
IFX_INLINE void IfxAsclin_setLinResponseTimeoutThreshold(Ifx_ASCLIN *asclin, uint16 threshold)
Sets the LIN response timeout threshold.
Definition: IfxAsclin.h:2333
IfxAsclin_setPrescaler
IFX_INLINE void IfxAsclin_setPrescaler(Ifx_ASCLIN *asclin, uint16 prescaler)
Sets the division ratio of the predivider (prescaler)
Definition: IfxAsclin.h:2357
IfxAsclin_RxInputSelect_2
alternate input selection 2
Definition: IfxAsclin.h:319
IfxAsclin_IdleDelay_5
idle delay in 5 bit times
Definition: IfxAsclin.h:192
IfxAsclin_getLinChecksumErrorFlagStatus
IFX_INLINE boolean IfxAsclin_getLinChecksumErrorFlagStatus(Ifx_ASCLIN *asclin)
Returns the LIN checksum error flag status.
Definition: IfxAsclin.h:2000
IfxAsclin_OversamplingFactor_10
oversampling factor 10
Definition: IfxAsclin.h:242
IfxAsclin_LeadDelay_6
lead delay in 6 bit times
Definition: IfxAsclin.h:209
IfxAsclin_setTransmitWakeRequestFlag
IFX_INLINE void IfxAsclin_setTransmitWakeRequestFlag(Ifx_ASCLIN *asclin)
Sets the transmission wake request flag.
Definition: IfxAsclin.h:2461
IfxAsclin_TxFifoInletWidth_2
number of bytes 2
Definition: IfxAsclin.h:426
IfxAsclin_SlavePolarity
IfxAsclin_SlavePolarity
Defines the idle level of the SLSO signal, which is the level. Outside the data transmission, leading and trailing time intervals. Definition in Ifx_ASCLIN.IOCR.B.SPOL.
Definition: IfxAsclin.h:372
IfxAsclin_setHeaderResponseSelect
IFX_INLINE void IfxAsclin_setHeaderResponseSelect(Ifx_ASCLIN *asclin, IfxAsclin_HeaderResponseSelect type)
Sets the header response selection.
Definition: IfxAsclin.h:2279
IfxAsclin_StopBit_0
number of stop bits 0
Definition: IfxAsclin.h:400
IfxAsclin_getTxResponseEndFlagStatus
IFX_INLINE boolean IfxAsclin_getTxResponseEndFlagStatus(Ifx_ASCLIN *asclin)
Returns the transmit response end flag status.
Definition: IfxAsclin.h:2132
IfxAsclin_clearHeaderTimeoutFlag
IFX_INLINE void IfxAsclin_clearHeaderTimeoutFlag(Ifx_ASCLIN *asclin)
Clears the header timeout flag.
Definition: IfxAsclin.h:1646
IfxAsclin_HeaderResponseSelect_headerOnly
header only expected
Definition: IfxAsclin.h:177
IfxAsclin_ParityType_even
even parity
Definition: IfxAsclin.h:256
IfxAsclin_Cts_In::module
Ifx_ASCLIN * module
Base address.
Definition: IfxAsclin_PinMap.h:58
IfxAsclin_enableRxFifoOverflowFlag
IFX_INLINE void IfxAsclin_enableRxFifoOverflowFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Rx FIFO overflow flag.
Definition: IfxAsclin.h:1874
IfxAsclin_StopBit_5
number of stop bits 5
Definition: IfxAsclin.h:405
IfxAsclin_getTxFifoFillLevel
IFX_INLINE uint8 IfxAsclin_getTxFifoFillLevel(Ifx_ASCLIN *asclin)
Returns the current filling level of Tx FIFO.
Definition: IfxAsclin.h:2102
IfxAsclin_SamplePointPosition
IfxAsclin_SamplePointPosition
Sample point position Definition in Ifx_ASCLIN.BITCON.B.SAMPLEPOINT.
Definition: IfxAsclin.h:330
IfxAsclin_FifoInterruptMode
IfxAsclin_FifoInterruptMode
Defines the interrupt generation modes of Tx FIFO and Rx FIFO Definition in Ifx_ASCLIN.RXFIFOCON.B.FM and Ifx_ASCLIN.TXFIFOCON.B.FM.
Definition: IfxAsclin.h:153
IfxAsclin_enableAutoBaudrateDetection
IFX_INLINE void IfxAsclin_enableAutoBaudrateDetection(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the auto baudrate detection.
Definition: IfxAsclin.h:1760
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:249
IfxAsclin_enableLinParityErrorFlag
IFX_INLINE void IfxAsclin_enableLinParityErrorFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables LIN parity error flag.
Definition: IfxAsclin.h:1826
IfxAsclin_setBaudrateBitFields
IFX_EXTERN void IfxAsclin_setBaudrateBitFields(Ifx_ASCLIN *asclin, uint16 prescaler, uint16 numerator, uint16 denominator, IfxAsclin_OversamplingFactor oversampling)
Sets the baudrate bit fields.
Definition: IfxAsclin.c:319
IfxAsclin_SamplesPerBit_three
three samples per bit
Definition: IfxAsclin.h:355
IfxAsclin_ClockPolarity
IfxAsclin_ClockPolarity
CPOL defines the idle level of the clock signal in the SPI mode. Idle level is the level outside the ...
Definition: IfxAsclin.h:100
IfxAsclin_RxFifoInterruptLevel_6
RX FIFO level 6.
Definition: IfxAsclin.h:288
IfxAsclin_RxFifoInterruptLevel_15
RX FIFO level 15.
Definition: IfxAsclin.h:297
IfxAsclin_setLinMode
IFX_INLINE void IfxAsclin_setLinMode(Ifx_ASCLIN *asclin, IfxAsclin_LinMode mode)
Sets the LIN mode of operation.
Definition: IfxAsclin.h:2321
IfxAsclin_DataLength_14
number of bits per transfer 13
Definition: IfxAsclin.h:145
IfxAsclin_getSrcPointerRx
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxAsclin_getSrcPointerRx(Ifx_ASCLIN *asclin)
Returns the SRC pointer for Rx.
Definition: IfxAsclin.c:192
IfxAsclin_flushRxFifo
IFX_INLINE void IfxAsclin_flushRxFifo(Ifx_ASCLIN *asclin)
Flushes (empties) the Rx FIFO.
Definition: IfxAsclin.h:1934
IfxAsclin_SlavePolarity_idleLow
idle low
Definition: IfxAsclin.h:374
IfxAsclin_IdleDelay_1
idle delay in 1 bit times
Definition: IfxAsclin.h:188
IfxAsclin_enableLinAutoBaudDetectionErrorFlag
IFX_INLINE void IfxAsclin_enableLinAutoBaudDetectionErrorFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables LIN auto baudrate detection error flag.
Definition: IfxAsclin.h:1814
IfxAsclin_TxFifoInterruptLevel_2
TX FIFO level 2.
Definition: IfxAsclin.h:437
IfxAsclin_FrameMode_lin
lin mode
Definition: IfxAsclin.h:168
IfxAsclin_LinResponseTimeoutMode_responseTimeout
timeout threshold is for reponse
Definition: IfxAsclin.h:228
IfxAsclin_enableTransmissionCompletedFlag
IFX_INLINE void IfxAsclin_enableTransmissionCompletedFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables transmission completed flag.
Definition: IfxAsclin.h:1898
IfxAsclin_initSclkPin
IFX_INLINE void IfxAsclin_initSclkPin(const IfxAsclin_Sclk_Out *sclk, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a SCLK output.
Definition: IfxAsclin.h:2168
IfxAsclin_clearCollisionDetectionErrorFlag
IFX_INLINE void IfxAsclin_clearCollisionDetectionErrorFlag(Ifx_ASCLIN *asclin)
Clears the collision detection error flag.
Definition: IfxAsclin.h:1628
IfxAsclin_RxInputSelect_5
alternate input selection 5
Definition: IfxAsclin.h:322
IfxAsclin_RxInputSelect_4
alternate input selection 4
Definition: IfxAsclin.h:321
IfxAsclin_TxFifoInletWidth
IfxAsclin_TxFifoInletWidth
Defines the number of bytes written to the Tx FIFO with one FPI bus write Definition in Ifx_ASCLIN...
Definition: IfxAsclin.h:422
IfxAsclin_Checksum_classic
classic checksum
Definition: IfxAsclin.h:83
IfxAsclin_read8
IFX_EXTERN uint32 IfxAsclin_read8(Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
Reads data up to 8 bits.
Definition: IfxAsclin.c:286
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:151
IfxAsclin_SamplePointPosition_3
sample point position at 3
Definition: IfxAsclin.h:334
IfxAsclin_setSuspendMode
IFX_INLINE void IfxAsclin_setSuspendMode(Ifx_ASCLIN *asclin, IfxAsclin_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and...
Definition: IfxAsclin.h:2438
IfxAsclin_readRxData
IFX_INLINE uint32 IfxAsclin_readRxData(Ifx_ASCLIN *asclin)
Definition: IfxAsclin.h:2201
IfxAsclin_enableParity
IFX_INLINE void IfxAsclin_enableParity(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the parity bit attachment to tha data bits.
Definition: IfxAsclin.h:1838
IfxAsclin_LeadDelay_5
lead delay in 5 bit times
Definition: IfxAsclin.h:208
IfxAsclin_StopBit_7
number of stop bits 7
Definition: IfxAsclin.h:407
IfxAsclin_clearLinParityErrorFlag
IFX_INLINE void IfxAsclin_clearLinParityErrorFlag(Ifx_ASCLIN *asclin)
Clears the LIN parity error flag.
Definition: IfxAsclin.h:1670
IfxAsclin_ClockSource_ascSlowClock
f asclins will be supplied
Definition: IfxAsclin.h:113
IfxAsclin_getRxFifoFillLevel
IFX_INLINE uint8 IfxAsclin_getRxFifoFillLevel(Ifx_ASCLIN *asclin)
Returns the current filling level of Tx FIFO.
Definition: IfxAsclin.h:2048
IfxAsclin_enableRxHeaderEndFlag
IFX_INLINE void IfxAsclin_enableRxHeaderEndFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables receive header end flag.
Definition: IfxAsclin.h:1886
IfxAsclin_CtsInputSelect_0
CTS input pin 0.
Definition: IfxAsclin.h:121
IfxAsclin_enableRxFifoUnderflowFlag
IFX_INLINE void IfxAsclin_enableRxFifoUnderflowFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Rx FIFO underflow flag.
Definition: IfxAsclin.h:1880
IfxAsclin_CtsInputSelect
IfxAsclin_CtsInputSelect
CTS input pin selection Definition in Ifx_ASCLIN.IOCR.B.CTS.
Definition: IfxAsclin.h:119
IfxAsclin_disableAllFlags
IFX_INLINE void IfxAsclin_disableAllFlags(Ifx_ASCLIN *asclin)
disables all flags
Definition: IfxAsclin.h:1754
IfxAsclin_IdleDelay_7
idle delay in 7 bit times
Definition: IfxAsclin.h:194
IfxAsclin_TxFifoInterruptLevel_10
TX FIFO level 10.
Definition: IfxAsclin.h:445
IfxAsclin_initTxPin
IFX_INLINE void IfxAsclin_initTxPin(const IfxAsclin_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a TX output.
Definition: IfxAsclin.h:2182
IfxAsclin_write16
IFX_EXTERN uint32 IfxAsclin_write16(Ifx_ASCLIN *asclin, uint16 *data, uint32 count)
Writes data up to 16 bits.
Definition: IfxAsclin.c:448
IfxAsclin_LeadDelay_7
lead delay in 7 bit times
Definition: IfxAsclin.h:210
IfxAsclin_clearRxResponseEndFlag
IFX_INLINE void IfxAsclin_clearRxResponseEndFlag(Ifx_ASCLIN *asclin)
Clears the receive response end flag.
Definition: IfxAsclin.h:1718
IfxAsclin_TxFifoInletWidth_0
number of bytes 0
Definition: IfxAsclin.h:424
IfxAsclin_setTxFifoInletWidth
IFX_INLINE void IfxAsclin_setTxFifoInletWidth(Ifx_ASCLIN *asclin, IfxAsclin_TxFifoInletWidth width)
Sets the transmit FIFO inlet width.
Definition: IfxAsclin.h:2467
IfxAsclin_OversamplingFactor_6
oversampling factor 6
Definition: IfxAsclin.h:238
IfxAsclin_write8
IFX_EXTERN uint32 IfxAsclin_write8(Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
Writes data up to 8 bits.
Definition: IfxAsclin.c:476
IfxAsclin_setSlavePolarity
IFX_INLINE void IfxAsclin_setSlavePolarity(Ifx_ASCLIN *asclin, IfxAsclin_SlavePolarity spol)
Selects the slave polarity.
Definition: IfxAsclin.h:2417
IfxAsclin_SamplePointPosition_11
sample point position at 11
Definition: IfxAsclin.h:342
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxAsclin_enableLoopBackMode
IFX_INLINE void IfxAsclin_enableLoopBackMode(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the loop back mode.
Definition: IfxAsclin.h:1832
IfxAsclin_enableTxFifoOutlet
IFX_INLINE void IfxAsclin_enableTxFifoOutlet(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the transmit FIFO outlet to allow transmission.
Definition: IfxAsclin.h:1910
IfxAsclin_SuspendMode_soft
Soft Suspend.
Definition: IfxAsclin.h:416
IfxAsclin_RxFifoOutletWidth_2
number of bytes 2
Definition: IfxAsclin.h:308
IfxAsclin_setFrameMode
IFX_INLINE void IfxAsclin_setFrameMode(Ifx_ASCLIN *asclin, IfxAsclin_FrameMode mode)
Selects the module&#39;s mode of operation.
Definition: IfxAsclin.h:2273
IfxAsclin_getRxFifoOverflowFlagStatus
IFX_INLINE boolean IfxAsclin_getRxFifoOverflowFlagStatus(Ifx_ASCLIN *asclin)
Returns the Rx FIFO overflow flag status.
Definition: IfxAsclin.h:2066
IfxAsclin_clearTxHeaderEndFlag
IFX_INLINE void IfxAsclin_clearTxHeaderEndFlag(Ifx_ASCLIN *asclin)
Clears the transmit header end flag.
Definition: IfxAsclin.h:1742
IfxAsclin_RxFifoInterruptLevel_10
RX FIFO level 10.
Definition: IfxAsclin.h:292
IfxAsclin_RxFifoInterruptLevel_4
RX FIFO level 4.
Definition: IfxAsclin.h:286
IfxAsclin_DataLength_13
number of bits per transfer 12
Definition: IfxAsclin.h:144
IfxAsclin_enableResponseTimeoutFlag
IFX_INLINE void IfxAsclin_enableResponseTimeoutFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables response timeout flag.
Definition: IfxAsclin.h:1856
IfxAsclin_IdleDelay_6
idle delay in 6 bit times
Definition: IfxAsclin.h:193
IfxAsclin_ShiftDirection
IfxAsclin_ShiftDirection
SPI mode: defines the shift direction of the shift register. ASC and LIN mode: should be set to 0...
Definition: IfxAsclin.h:362
IfxAsclin_FrameMode_spi
spi mode
Definition: IfxAsclin.h:167
IfxAsclin_enableBreakDetectedFlag
IFX_INLINE void IfxAsclin_enableBreakDetectedFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables break detected flag.
Definition: IfxAsclin.h:1766
IfxAsclin_initRtsPin
IFX_INLINE void IfxAsclin_initRtsPin(const IfxAsclin_Rts_Out *rts, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a RTS output.
Definition: IfxAsclin.h:2150
IfxAsclin_clearRaisingEdgeDetectedFlag
IFX_INLINE void IfxAsclin_clearRaisingEdgeDetectedFlag(Ifx_ASCLIN *asclin)
Clears the raising edge detected flag.
Definition: IfxAsclin.h:1682
IfxAsclin_StopBit_1
number of stop bits 1
Definition: IfxAsclin.h:401
IfxAsclin_RxInputSelect_6
alternate input selection 6
Definition: IfxAsclin.h:323
IfxAsclin_getClockStatus
IFX_INLINE boolean IfxAsclin_getClockStatus(Ifx_ASCLIN *asclin)
Returns the clock status.
Definition: IfxAsclin.h:1958
IfxAsclin_RxInputSelect_0
alternate input selection 0
Definition: IfxAsclin.h:317
IfxAsclin_LinMode_slave
operates in slave mode
Definition: IfxAsclin.h:218
IfxAsclin_LinMode_master
operates in master mode
Definition: IfxAsclin.h:219
IfxScuCcu.h
SCU basic functionality.
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:81
IfxAsclin_LeadDelay_1
lead delay in 1 bit times
Definition: IfxAsclin.h:204
IfxAsclin_cfg.h
ASCLIN on-chip implementation data.
IfxAsclin_RxFifoInterruptLevel_12
RX FIFO level 12.
Definition: IfxAsclin.h:294
IfxAsclin_getBreakDetectedFlagStatus
IFX_INLINE boolean IfxAsclin_getBreakDetectedFlagStatus(Ifx_ASCLIN *asclin)
Returns the break detected flag status.
Definition: IfxAsclin.h:1946
IfxAsclin_setFilterDepth
IFX_INLINE void IfxAsclin_setFilterDepth(Ifx_ASCLIN *asclin, uint8 depth)
Sets digital glitch filter depth.
Definition: IfxAsclin.h:2267
enable
void enable
Definition: IfxCpu_IntrinsicsDcc.h:477
IfxAsclin_enableLinChecksumErrorFlag
IFX_INLINE void IfxAsclin_enableLinChecksumErrorFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables LIN checksum error flag.
Definition: IfxAsclin.h:1820
IfxAsclin_FifoInterruptMode_combined
Combined Move Mode.
Definition: IfxAsclin.h:155
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:248
IfxAsclin_enableRxFifoInlet
IFX_INLINE void IfxAsclin_enableRxFifoInlet(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the receive FIFO outlet to allow filling of Rx FIFO through shift register...
Definition: IfxAsclin.h:1868
IfxAsclin_SamplePointPosition_6
sample point position at 6
Definition: IfxAsclin.h:337
IfxAsclin_SamplePointPosition_8
sample point position at 8
Definition: IfxAsclin.h:339
IfxAsclin_TxFifoInterruptLevel_11
TX FIFO level 11.
Definition: IfxAsclin.h:446
IfxAsclin_setTxFifoInterruptMode
IFX_INLINE void IfxAsclin_setTxFifoInterruptMode(Ifx_ASCLIN *asclin, IfxAsclin_FifoInterruptMode mode)
Selects the Tx FIFO interupt generation mode.
Definition: IfxAsclin.h:2479
IfxAsclin_RtsCtsPolarity_activeLow
ready/clear are active-low
Definition: IfxAsclin.h:275
IfxAsclin_setTransmitResponseRequestFlag
IFX_INLINE void IfxAsclin_setTransmitResponseRequestFlag(Ifx_ASCLIN *asclin)
Sets the transmit response request flag.
Definition: IfxAsclin.h:2455
IfxAsclin_DataLength_15
number of bits per transfer 14
Definition: IfxAsclin.h:146
IfxAsclin_isModuleSuspended
IFX_INLINE boolean IfxAsclin_isModuleSuspended(Ifx_ASCLIN *asclin)
Returns the module&#39;s suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspende...
Definition: IfxAsclin.h:2189
IfxAsclin_disableModule
IFX_EXTERN void IfxAsclin_disableModule(Ifx_ASCLIN *asclin)
Disables the module.
Definition: IfxAsclin.c:54
IfxAsclin_StopBit_2
number of stop bits 2
Definition: IfxAsclin.h:402
IfxAsclin_getAllErrorFlagsStatus
IFX_INLINE uint16 IfxAsclin_getAllErrorFlagsStatus(Ifx_ASCLIN *asclin)
Returns the status of all error flags.
Definition: IfxAsclin.h:2491
IfxAsclin_writeTxData
IFX_INLINE void IfxAsclin_writeTxData(Ifx_ASCLIN *asclin, uint32 data)
Definition: IfxAsclin.h:2485
IfxAsclin_ClockSource_noClock
no clock will be supplied
Definition: IfxAsclin.h:111
IfxAsclin_enableTxHeaderEndFlag
IFX_INLINE void IfxAsclin_enableTxHeaderEndFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables transmit header end flag.
Definition: IfxAsclin.h:1922
IfxAsclin_FrameMode_asc
asc mode
Definition: IfxAsclin.h:166
IfxAsclin_getHeaderTimeoutFlagStatus
IFX_INLINE boolean IfxAsclin_getHeaderTimeoutFlagStatus(Ifx_ASCLIN *asclin)
Returns the header timeout flag status.
Definition: IfxAsclin.h:1982
IfxAsclin_TxFifoInterruptLevel_4
TX FIFO level 4.
Definition: IfxAsclin.h:439
IfxAsclin_setSamplePointPosition
IFX_INLINE void IfxAsclin_setSamplePointPosition(Ifx_ASCLIN *asclin, IfxAsclin_SamplePointPosition spPosition)
Sets the sampling point position.
Definition: IfxAsclin.h:2405
IfxAsclin_setEnableModuleRequest
IFX_INLINE void IfxAsclin_setEnableModuleRequest(Ifx_ASCLIN *asclin)
Sets the enable module request.
Definition: IfxAsclin.h:2261
IfxAsclin_getTransmissionCompletedFlagStatus
IFX_INLINE boolean IfxAsclin_getTransmissionCompletedFlagStatus(Ifx_ASCLIN *asclin)
Returns the transmission pending flag status.
Definition: IfxAsclin.h:2090
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxAsclin_setCtsInput
IFX_INLINE void IfxAsclin_setCtsInput(Ifx_ASCLIN *asclin, IfxAsclin_CtsInputSelect ctsi)
Selects the CTS input pin.
Definition: IfxAsclin.h:2237
IfxAsclin_RxInputSelect_1
alternate input selection 1
Definition: IfxAsclin.h:318
IfxAsclin_LeadDelay_4
lead delay in 4 bit times
Definition: IfxAsclin.h:207
IfxAsclin_TxFifoInletWidth_1
number of bytes 1
Definition: IfxAsclin.h:425
IfxAsclin_clearLinChecksumErrorFlag
IFX_INLINE void IfxAsclin_clearLinChecksumErrorFlag(Ifx_ASCLIN *asclin)
Clears the LIN checksum error flag.
Definition: IfxAsclin.h:1664
IfxAsclin_RxInputSelect_3
alternate input selection 3
Definition: IfxAsclin.h:320
IfxAsclin_ParityType
IfxAsclin_ParityType
Type of parity bit attached to data bits Definition in Ifx_ASCLIN.FRAMECON.B.ODD. ...
Definition: IfxAsclin.h:254
IfxAsclin_setOversampling
IFX_INLINE void IfxAsclin_setOversampling(Ifx_ASCLIN *asclin, IfxAsclin_OversamplingFactor ovsFactor)
Sets the division ratio of the baudrate post divider.
Definition: IfxAsclin.h:2345
IfxAsclin_setKernelResetOne
IFX_INLINE void IfxAsclin_setKernelResetOne(Ifx_ASCLIN *asclin)
Sets the kernal reset of the KRST1.
Definition: IfxAsclin.h:2291
IfxAsclin_read16
IFX_EXTERN uint32 IfxAsclin_read16(Ifx_ASCLIN *asclin, uint16 *data, uint32 count)
Reads data up to 16 bits.
Definition: IfxAsclin.c:258
IfxAsclin_RxInputSelect_7
alternate input selection 7
Definition: IfxAsclin.h:324
IfxAsclin_getRxHeaderEndFlagStatus
IFX_INLINE boolean IfxAsclin_getRxHeaderEndFlagStatus(Ifx_ASCLIN *asclin)
Returns the receive header end flag status.
Definition: IfxAsclin.h:2078
IfxAsclin_RxFifoInterruptLevel_3
RX FIFO level 3.
Definition: IfxAsclin.h:285
IfxAsclin_clearTransmissionCompletedFlag
IFX_INLINE void IfxAsclin_clearTransmissionCompletedFlag(Ifx_ASCLIN *asclin)
Clears the transmission pending flag.
Definition: IfxAsclin.h:1724
IfxAsclin_FrameMode_initialise
initialise mode
Definition: IfxAsclin.h:165
IfxAsclin_enableTxResponseEndFlag
IFX_INLINE void IfxAsclin_enableTxResponseEndFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables transmit response end flag.
Definition: IfxAsclin.h:1928
IfxAsclin_DataLength_8
number of bits per transfer 7
Definition: IfxAsclin.h:139
IfxAsclin_OversamplingFactor_4
oversampling factor 4
Definition: IfxAsclin.h:236
IfxAsclin_setBrdLowerlimt
IFX_INLINE void IfxAsclin_setBrdLowerlimt(Ifx_ASCLIN *asclin, uint8 limit)
Sets the baudrate detection&#39;s lower limit.
Definition: IfxAsclin.h:2207
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxAsclin_SamplesPerBit_one
one sample per bit
Definition: IfxAsclin.h:354
IfxAsclin_SleepMode_disable
disables sleep mode
Definition: IfxAsclin.h:384
IfxAsclin_FifoInterruptMode_batch
Batch Move Mode.
Definition: IfxAsclin.h:157
IfxAsclin_getClockSource
IFX_INLINE uint8 IfxAsclin_getClockSource(Ifx_ASCLIN *asclin)
Returns the clock source.
Definition: IfxAsclin.h:1952
IfxAsclin_SleepMode_enable
enables sleep mode
Definition: IfxAsclin.h:383
IfxAsclin_clearFallingEdgeDetectedFlag
IFX_INLINE void IfxAsclin_clearFallingEdgeDetectedFlag(Ifx_ASCLIN *asclin)
Clears the falling edge detected flag.
Definition: IfxAsclin.h:1634
IfxAsclin_DataLength_7
number of bits per transfer 6
Definition: IfxAsclin.h:138
IfxAsclin_setStopBit
IFX_INLINE void IfxAsclin_setStopBit(Ifx_ASCLIN *asclin, IfxAsclin_StopBit stopBit)
Sets the number of stop bits.
Definition: IfxAsclin.h:2432
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxAsclin_setShiftDirection
IFX_INLINE void IfxAsclin_setShiftDirection(Ifx_ASCLIN *asclin, IfxAsclin_ShiftDirection dir)
Sets the shift direction.
Definition: IfxAsclin.h:2411
IfxAsclin_getPrescaler
IFX_INLINE uint16 IfxAsclin_getPrescaler(Ifx_ASCLIN *asclin)
Returns the division ratio of the predivider (prescaler)
Definition: IfxAsclin.h:2024
IfxAsclin_TxFifoInterruptLevel_13
TX FIFO level 13.
Definition: IfxAsclin.h:448
IfxAsclin_RxFifoInterruptLevel_2
RX FIFO level 2.
Definition: IfxAsclin.h:284
IfxAsclin_OversamplingFactor_8
oversampling factor 8
Definition: IfxAsclin.h:240
IfxAsclin_getFrameErrorFlagStatus
IFX_INLINE boolean IfxAsclin_getFrameErrorFlagStatus(Ifx_ASCLIN *asclin)
Returns the frame error flag status.
Definition: IfxAsclin.h:1976
IfxAsclin_OversamplingFactor_12
oversampling factor 12
Definition: IfxAsclin.h:244
IfxAsclin_setDisableModuleRequest
IFX_INLINE void IfxAsclin_setDisableModuleRequest(Ifx_ASCLIN *asclin)
Sets the disable module request.
Definition: IfxAsclin.h:2255
IfxAsclin_SamplePointPosition_7
sample point position at 7
Definition: IfxAsclin.h:338
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:675
IfxAsclin_clearBreakDetectedFlag
IFX_INLINE void IfxAsclin_clearBreakDetectedFlag(Ifx_ASCLIN *asclin)
Clears the break detected flag.
Definition: IfxAsclin.h:1622
IfxAsclin_Checksum_enhanced
enhanced checksum
Definition: IfxAsclin.h:84
IfxAsclin_getTransmitSignalStatus
IFX_INLINE boolean IfxAsclin_getTransmitSignalStatus(Ifx_ASCLIN *asclin)
Returns the transmit signal status.
Definition: IfxAsclin.h:2096
IfxAsclin_enableTxFifoFillLevelFlag
IFX_INLINE void IfxAsclin_enableTxFifoFillLevelFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Tx FIFO level flag.
Definition: IfxAsclin.h:1904
IfxAsclin_TxFifoInterruptLevel_12
TX FIFO level 12.
Definition: IfxAsclin.h:447
IfxAsclin_clearTxFifoOverflowFlag
IFX_INLINE void IfxAsclin_clearTxFifoOverflowFlag(Ifx_ASCLIN *asclin)
Clears the Tx FIFO overflow flag.
Definition: IfxAsclin.h:1736
IfxAsclin_Status
IfxAsclin_Status
Error status.
Definition: IfxAsclin.h:389
IfxAsclin_StopBit_4
number of stop bits 4
Definition: IfxAsclin.h:404
IfxAsclin_getPdFrequency
IFX_EXTERN float32 IfxAsclin_getPdFrequency(Ifx_ASCLIN *asclin)
Returns the PD frequency.
Definition: IfxAsclin.c:147
IfxAsclin_SleepMode
IfxAsclin_SleepMode
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_ASCLIN.CLC.B.EDIS.
Definition: IfxAsclin.h:381
IfxAsclin_OversamplingFactor_14
oversampling factor 14
Definition: IfxAsclin.h:246
IfxAsclin_getRaisingEdgeDetectedFlagStatus
IFX_INLINE boolean IfxAsclin_getRaisingEdgeDetectedFlagStatus(Ifx_ASCLIN *asclin)
Returns the raising edge detected flag status.
Definition: IfxAsclin.h:2030
IfxAsclin_clearResponseTimeoutFlag
IFX_INLINE void IfxAsclin_clearResponseTimeoutFlag(Ifx_ASCLIN *asclin)
Clears the response timeout flag.
Definition: IfxAsclin.h:1688
IfxAsclin_setDataLength
IFX_INLINE void IfxAsclin_setDataLength(Ifx_ASCLIN *asclin, IfxAsclin_DataLength length)
Sets the data length (number of bits per transfer)
Definition: IfxAsclin.h:2243
IfxAsclin_TxFifoInterruptLevel_3
TX FIFO level 3.
Definition: IfxAsclin.h:438
IfxAsclin_RtsCtsPolarity
IfxAsclin_RtsCtsPolarity
Polarity of the RTS and CTS signals Definition in Ifx_ASCLIN.IOCR.B.RCPOL.
Definition: IfxAsclin.h:272
IfxAsclin_getParityErrorFlagStatus
IFX_INLINE boolean IfxAsclin_getParityErrorFlagStatus(Ifx_ASCLIN *asclin)
Returns the parity error flag status.
Definition: IfxAsclin.h:2018
IfxAsclin_setClockSource
IFX_EXTERN void IfxAsclin_setClockSource(Ifx_ASCLIN *asclin, IfxAsclin_ClockSource clockSource)
Sets the clock source.
Definition: IfxAsclin.c:430
IfxAsclin_setTxFifoInterruptLevel
IFX_INLINE void IfxAsclin_setTxFifoInterruptLevel(Ifx_ASCLIN *asclin, IfxAsclin_TxFifoInterruptLevel level)
Sets the Tx FIFO interrupt level.
Definition: IfxAsclin.h:2473


iLLD_TC38A: IfxAsclin_Asc.c Source File

  • Asclin
  • Asc
IfxAsclin_Asc.c
Go to the documentation of this file.
1 /**
2 * \file IfxAsclin_Asc.c
3 * \brief ASCLIN ASC details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxAsclin_Asc.h"
47 #include "string.h"
48
49 /******************************************************************************/
50 /*-------------------------Function Implementations---------------------------*/
51 /******************************************************************************/
52
53 uint8 IfxAsclin_Asc_blockingRead(IfxAsclin_Asc *asclin)
54 {
55 Ifx_SizeT count = 1;
56 uint8 data;
57
58 while (IfxAsclin_Asc_read(asclin, &data, &count, TIME_INFINITE) != TRUE)
59 {}
60
61 return data;
62 }
63
64
65 boolean IfxAsclin_Asc_blockingWrite(IfxAsclin_Asc *asclin, uint8 data)
66 {
67 Ifx_SizeT count = 1;
68
69 return IfxAsclin_Asc_write(asclin, &data, &count, TIME_INFINITE);
70 }
71
72
73 boolean IfxAsclin_Asc_canReadCount(IfxAsclin_Asc *asclin, Ifx_SizeT count, Ifx_TickTime timeout)
74 {
75 return Ifx_Fifo_canReadCount(asclin->rx, count, timeout);
76 }
77
78
79 boolean IfxAsclin_Asc_canWriteCount(IfxAsclin_Asc *asclin, Ifx_SizeT count, Ifx_TickTime timeout)
80 {
81 return Ifx_Fifo_canWriteCount(asclin->tx, count, timeout);
82 }
83
84
85 void IfxAsclin_Asc_clearRx(IfxAsclin_Asc *asclin)
86 {
87 IfxAsclin_flushRxFifo(asclin->asclin);
88 Ifx_Fifo_clear(asclin->rx);
89 }
90
91
92 void IfxAsclin_Asc_clearTx(IfxAsclin_Asc *asclin)
93 {
94 Ifx_Fifo_clear(asclin->tx);
95 IfxAsclin_flushTxFifo(asclin->asclin);
96 }
97
98
99 void IfxAsclin_Asc_disableModule(IfxAsclin_Asc *asclin)
100 {
101 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
102 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
103 IfxScuWdt_clearCpuEndinit(psw); /* clearing the endinit protection */
104 IfxAsclin_setDisableModuleRequest(asclinSFR); /* disabling the module */
105 IfxScuWdt_setCpuEndinit(psw); /* setting the endinit protection back on */
106 }
107
108
109 boolean IfxAsclin_Asc_flushTx(IfxAsclin_Asc *asclin, Ifx_TickTime timeout)
110 {
111 Ifx_TickTime deadline = IfxStm_getDeadLine(timeout);
112 boolean result;
113
114 /* Flush the software FIFO */
115 result = Ifx_Fifo_flush(asclin->tx, timeout);
116
117 if (result)
118 {
119 /* Flush the hardware FIFO (wait until all bytes have been transmitted) */
120 do
121 {
122 result = IfxAsclin_getTxFifoFillLevel(asclin->asclin) == 0;
123 } while (!result && !IfxStm_isDeadLine(deadline));
124 }
125
126 return result;
127 }
128
129
130 sint32 IfxAsclin_Asc_getReadCount(IfxAsclin_Asc *asclin)
131 {
132 return Ifx_Fifo_readCount(asclin->rx);
133 }
134
135
136 IfxStdIf_DPipe_ReadEvent IfxAsclin_Asc_getReadEvent(IfxAsclin_Asc *asclin)
137 {
138 return &asclin->rx->eventWriter;
139 }
140
141
142 uint32 IfxAsclin_Asc_getSendCount(IfxAsclin_Asc *asclin)
143 {
144 return asclin->sendCount;
145 }
146
147
148 Ifx_TickTime IfxAsclin_Asc_getTxTimeStamp(IfxAsclin_Asc *asclin)
149 {
150 return asclin->txTimestamp;
151 }
152
153
154 sint32 IfxAsclin_Asc_getWriteCount(IfxAsclin_Asc *asclin)
155 {
156 return Ifx_Fifo_writeCount(asclin->tx);
157 }
158
159
160 IfxStdIf_DPipe_WriteEvent IfxAsclin_Asc_getWriteEvent(IfxAsclin_Asc *asclin)
161 {
162 return &asclin->tx->eventWriter;
163 }
164
165
166 IfxAsclin_Status IfxAsclin_Asc_initModule(IfxAsclin_Asc *asclin, const IfxAsclin_Asc_Config *config)
167 {
168 Ifx_ASCLIN *asclinSFR = config->asclin; /* pointer to ASCLIN registers*/
169 IfxAsclin_Status status = IfxAsclin_Status_noError;
170
171 asclin->asclin = asclinSFR; /* adding register pointer to module handler*/
172
173 IfxAsclin_enableModule(asclinSFR); /* enabling the module*/
174 IfxAsclin_setClockSource(asclinSFR, IfxAsclin_ClockSource_noClock); /* disabling the clock*/
175 IfxAsclin_setFrameMode(asclinSFR, IfxAsclin_FrameMode_initialise); /* setting the module in Initialise mode*/
176 IfxAsclin_setPrescaler(asclinSFR, config->baudrate.prescaler); /* sets the prescaler */
177 IfxAsclin_setClockSource(asclinSFR, config->clockSource); /* temporary set the clock source for baudrate configuration*/
178 status = (IfxAsclin_Status)IfxAsclin_setBitTiming(asclinSFR, /* setting the baudrate bit fields to generate the required baudrate*/
179 config->baudrate.baudrate,
180 config->baudrate.oversampling,
181 config->bitTiming.samplePointPosition,
182 config->bitTiming.medianFilter);
183 IfxAsclin_setClockSource(asclinSFR, IfxAsclin_ClockSource_noClock); /* disabling the clock again*/
184
185 IfxAsclin_enableLoopBackMode(asclinSFR, config->loopBack); /* selecting the loopback mode */
186 IfxAsclin_enableParity(asclinSFR, config->frame.parityBit); /* setting parity enable */
187 IfxAsclin_setParityType(asclinSFR, config->frame.parityType); /* setting parity type (odd/even)*/
188 IfxAsclin_setStopBit(asclinSFR, config->frame.stopBit); /* setting the stop bit */
189 IfxAsclin_setShiftDirection(asclinSFR, config->frame.shiftDir); /* setting the shift direction */
190 IfxAsclin_setDataLength(asclinSFR, config->frame.dataLength); /* setting the data length */
191 IfxAsclin_setTxFifoInletWidth(asclinSFR, config->fifo.inWidth); /* setting Tx FIFO inlet width */
192 IfxAsclin_setRxFifoOutletWidth(asclinSFR, config->fifo.outWidth); /* setting Rx FIFO outlet width */
193 IfxAsclin_setIdleDelay(asclinSFR, config->frame.idleDelay); /* setting idle delay */
194 IfxAsclin_setTxFifoInterruptLevel(asclinSFR, config->fifo.txFifoInterruptLevel); /* setting Tx FIFO level at which a Tx interrupt will be triggered*/
195 IfxAsclin_setRxFifoInterruptLevel(asclinSFR, config->fifo.rxFifoInterruptLevel); /* setting Rx FIFO interrupt level at which a Rx interrupt will be triggered*/
196 IfxAsclin_setTxFifoInterruptMode(asclinSFR, config->fifo.txFifoInterruptMode); /* setting Tx FIFO interrupt generation mode */
197 IfxAsclin_setRxFifoInterruptMode(asclinSFR, config->fifo.rxFifoInterruptMode); /* setting Rx FIFO interrupt generation mode */
198 IfxAsclin_setFrameMode(asclinSFR, config->frame.frameMode); /* selecting the frame mode*/
199
200 /* Pin mapping */
201 const IfxAsclin_Asc_Pins *pins = config->pins;
202
203 if (pins != NULL_PTR)
204 {
205 IfxAsclin_Cts_In *cts = pins->cts;
206
207 if (cts != NULL_PTR)
208 {
209 IfxAsclin_initCtsPin(cts, pins->ctsMode, pins->pinDriver);
210 }
211
212 IfxAsclin_Rx_In *rx = pins->rx;
213
214 if (rx != NULL_PTR)
215 {
216 IfxAsclin_initRxPin(rx, pins->rxMode, pins->pinDriver);
217 }
218
219 IfxAsclin_Rts_Out *rts = pins->rts;
220
221 if (rts != NULL_PTR)
222 {
223 IfxAsclin_initRtsPin(rts, pins->rtsMode, pins->pinDriver);
224 }
225
226 IfxAsclin_Tx_Out *tx = pins->tx;
227
228 if (tx != NULL_PTR)
229 {
230 IfxAsclin_initTxPin(tx, pins->txMode, pins->pinDriver);
231 }
232 }
233
234 IfxAsclin_setClockSource(asclinSFR, config->clockSource); /* select the clock source*/
235
236 IfxAsclin_disableAllFlags(asclinSFR); /* disable all flags */
237 IfxAsclin_clearAllFlags(asclinSFR); /* clear all flags */
238
239 /* HW error flags */
240 asclin->errorFlags.ALL = 0;
241
242 if (config->errorFlags.flags.parityError)
243 {
244 IfxAsclin_enableParityErrorFlag(asclinSFR, TRUE);
245 }
246
247 if (config->errorFlags.flags.frameError)
248 {
249 IfxAsclin_enableFrameErrorFlag(asclinSFR, TRUE);
250 }
251
252 if (config->errorFlags.flags.rxFifoOverflow)
253 {
254 IfxAsclin_enableRxFifoOverflowFlag(asclinSFR, TRUE);
255 }
256
257 if (config->errorFlags.flags.rxFifoUnderflow)
258 {
259 IfxAsclin_enableRxFifoUnderflowFlag(asclinSFR, TRUE);
260 }
261
262 if (config->errorFlags.flags.txFifoOverflow)
263 {
264 IfxAsclin_enableTxFifoOverflowFlag(asclinSFR, TRUE);
265 }
266
267 /* transmission flags */
268 asclin->rxSwFifoOverflow = FALSE;
269 asclin->txInProgress = FALSE;
270
271 /* Buffer mode */
272 Ifx_SizeT elementSize;
273 asclin->dataBufferMode = config->dataBufferMode;
274 asclin->txTimestamp = 0;
275 asclin->sendCount = 0;
276
277 switch (asclin->dataBufferMode)
278 {
279 case Ifx_DataBufferMode_normal:
280 elementSize = 1;
281 break;
282 case Ifx_DataBufferMode_timeStampSingle:
283 elementSize = sizeof(Ifx_DataBufferMode_TimeStampSingle);
284 break;
285 default:
286 elementSize = 0;
287 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
288 break;
289 }
290
291 /* SW Fifos */
292 if (config->txBuffer != NULL_PTR)
293 {
294 asclin->tx = Ifx_Fifo_init(config->txBuffer, config->txBufferSize, elementSize);
295 }
296 else
297 {
298 asclin->tx = Ifx_Fifo_create(config->txBufferSize, elementSize);
299 }
300
301 if (config->rxBuffer != NULL_PTR)
302 {
303 asclin->rx = Ifx_Fifo_init(config->rxBuffer, config->rxBufferSize, elementSize);
304 }
305 else
306 {
307 asclin->rx = Ifx_Fifo_create(config->rxBufferSize, elementSize);
308 }
309
310 /* initialising the interrupts */
311 IfxSrc_Tos tos = config->interrupt.typeOfService;
312
313 if ((config->interrupt.rxPriority > 0) || (tos == IfxSrc_Tos_dma))
314 {
315 volatile Ifx_SRC_SRCR *src;
316 src = IfxAsclin_getSrcPointerRx(asclinSFR);
317 IfxSrc_init(src, tos, config->interrupt.rxPriority);
318 IfxAsclin_enableRxFifoFillLevelFlag(asclinSFR, TRUE);
319 IfxSrc_enable(src);
320 }
321
322 if ((config->interrupt.txPriority > 0) || (tos == IfxSrc_Tos_dma))
323 {
324 volatile Ifx_SRC_SRCR *src;
325 src = IfxAsclin_getSrcPointerTx(asclinSFR);
326 IfxSrc_init(src, tos, config->interrupt.txPriority);
327 IfxAsclin_enableTxFifoFillLevelFlag(asclinSFR, TRUE);
328 IfxSrc_enable(src);
329 }
330
331 if (config->interrupt.erPriority > 0) /*These interrupts are not serviced by dma*/
332 {
333 volatile Ifx_SRC_SRCR *src;
334 src = IfxAsclin_getSrcPointerEr(asclinSFR);
335 IfxSrc_init(src, tos, config->interrupt.erPriority);
336 IfxAsclin_enableParityErrorFlag(asclinSFR, TRUE);
337 IfxSrc_enable(src);
338 }
339
340 /* enable transfers */
341 IfxAsclin_enableRxFifoInlet(asclinSFR, TRUE); // enabling Rx FIFO for recieving
342 IfxAsclin_enableTxFifoOutlet(asclinSFR, TRUE); // enabling Tx FIFO for transmitting
343
344 IfxAsclin_flushRxFifo(asclinSFR); // flushing Rx FIFO
345 IfxAsclin_flushTxFifo(asclinSFR); // flushing Tx FIFO
346
347 return status;
348 }
349
350
351 void IfxAsclin_Asc_initModuleConfig(IfxAsclin_Asc_Config *config, Ifx_ASCLIN *asclin)
352 {
353 config->asclin = asclin;
354
355 /* loop back disabled */
356 config->loopBack = FALSE; /* no loop back*/
357
358 /* Default values for baudrate */
359 config->clockSource = IfxAsclin_ClockSource_ascFastClock; /* Asclin fast clock, fasclinf*/
360 config->baudrate.prescaler = 1; /* default prescaler*/
361 config->baudrate.baudrate = 115200; /* default baudrate (the fractional dividier setup will be calculated in initModule*/
362 config->baudrate.oversampling = IfxAsclin_OversamplingFactor_4; /* default oversampling factor*/
363
364 /* Default Values for Bit Timings */
365 config->bitTiming.medianFilter = IfxAsclin_SamplesPerBit_one; /* one sample per bit*/
366 config->bitTiming.samplePointPosition = IfxAsclin_SamplePointPosition_3; /* sample point position at 3*/
367 /* Default Values for Frame Control */
368 config->frame.idleDelay = IfxAsclin_IdleDelay_0; /* no idle delay*/
369 config->frame.stopBit = IfxAsclin_StopBit_1; /* one stop bit*/
370 config->frame.frameMode = IfxAsclin_FrameMode_asc; /* ASC mode*/
371 config->frame.shiftDir = IfxAsclin_ShiftDirection_lsbFirst; /* shift diection LSB first*/
372 config->frame.parityBit = FALSE; /* disable parity*/
373 config->frame.parityType = IfxAsclin_ParityType_even; /* even parity (if parity enabled)*/
374 config->frame.dataLength = IfxAsclin_DataLength_8; /* number of bits per transfer 8*/
375
376 /* Default Values for Fifo Control */
377 config->fifo.inWidth = IfxAsclin_TxFifoInletWidth_1; /* 8-bit wide write*/
378 config->fifo.outWidth = IfxAsclin_RxFifoOutletWidth_1; /* 8-bit wide read*/
379 config->fifo.txFifoInterruptLevel = IfxAsclin_TxFifoInterruptLevel_0; /* txFifoInterruptLevel = 0. optimised to write upto 16 bytes at a time */
380 config->fifo.rxFifoInterruptLevel = IfxAsclin_RxFifoInterruptLevel_1;
381 config->fifo.buffMode = IfxAsclin_ReceiveBufferMode_rxFifo; /* RxFIFO*/
382 config->fifo.txFifoInterruptMode = IfxAsclin_FifoInterruptMode_combined;
383 config->fifo.rxFifoInterruptMode = IfxAsclin_FifoInterruptMode_combined;
384
385 /* Default Values for Interrupt Config */
386 config->interrupt.rxPriority = 0; /* receive interrupt priority 0*/
387 config->interrupt.txPriority = 0; /* transmit interrupt priority 0*/
388 config->interrupt.erPriority = 0; /* error interrupt priority 0*/
389 config->interrupt.typeOfService = IfxSrc_Tos_cpu0; /* type of service CPU0*/
390
391 /* Enable error flags */
392 config->errorFlags.ALL = ~0; /* all error flags enabled*/
393
394 /* init pointers */
395 config->pins = NULL_PTR; /* pins to null pointer*/
396 config->rxBuffer = NULL_PTR; /* Rx Fifo buffer*/
397 config->txBuffer = NULL_PTR; /* Tx Fifo buffer*/
398
399 config->txBufferSize = 0; /* Rx Fifo buffer size*/
400 config->rxBufferSize = 0; /* Rx Fifo buffer size*/
401
402 config->dataBufferMode = Ifx_DataBufferMode_normal;
403 }
404
405
406 void IfxAsclin_Asc_initiateTransmission(IfxAsclin_Asc *asclin)
407 {
408 if (asclin->txInProgress == FALSE) /* Send first byte: send init */
409 {
410 if (Ifx_Fifo_isEmpty(asclin->tx) == FALSE)
411 {
412 uint8 data;
413 asclin->txInProgress = TRUE;
414
415 switch (asclin->dataBufferMode)
416 {
417 case Ifx_DataBufferMode_normal:
418 {
419 Ifx_Fifo_read(asclin->tx, &data, 1, TIME_NULL);
420 }
421 break;
422 case Ifx_DataBufferMode_timeStampSingle:
423 {
424 Ifx_DataBufferMode_TimeStampSingle packedData;
425 Ifx_Fifo_read(asclin->tx, &packedData, sizeof(packedData), TIME_NULL);
426 data = packedData.data;
427 }
428 break;
429 }
430
431 IfxAsclin_write8(asclin->asclin, &data, 1);
432 }
433 }
434 }
435
436
437 void IfxAsclin_Asc_isrError(IfxAsclin_Asc *asclin)
438 {
439 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
440
441 /* store all the flags in the variable */
442 if (IfxAsclin_getParityErrorFlagStatus(asclinSFR))
443 {
444 IfxAsclin_clearParityErrorFlag(asclinSFR);
445 asclin->errorFlags.flags.parityError = 1;
446 }
447
448 if (IfxAsclin_getFrameErrorFlagStatus(asclinSFR))
449 {
450 IfxAsclin_clearFrameErrorFlag(asclinSFR);
451 asclin->errorFlags.flags.frameError = 1;
452 }
453
454 if (IfxAsclin_getRxFifoOverflowFlagStatus(asclinSFR))
455 {
456 IfxAsclin_clearRxFifoOverflowFlag(asclinSFR);
457 asclin->errorFlags.flags.rxFifoOverflow = 1;
458 }
459
460 if (IfxAsclin_getRxFifoUnderflowFlagStatus(asclinSFR))
461 {
462 IfxAsclin_clearRxFifoUnderflowFlag(asclinSFR);
463 asclin->errorFlags.flags.rxFifoUnderflow = 1;
464 }
465
466 if (IfxAsclin_getTxFifoOverflowFlagStatus(asclinSFR))
467 {
468 IfxAsclin_clearTxFifoOverflowFlag(asclinSFR);
469 asclin->errorFlags.flags.txFifoOverflow = 1;
470 }
471 }
472
473
474 void IfxAsclin_Asc_isrReceive(IfxAsclin_Asc *asclin)
475 {
476 uint8 ascData[16]; /*FIFO size is 16 bytes*/
477
478 switch (asclin->dataBufferMode)
479 {
480 case Ifx_DataBufferMode_normal:
481 {
482 uint8 count;
483 count = IfxAsclin_getRxFifoFillLevel(asclin->asclin);
484 IfxAsclin_read8(asclin->asclin, &ascData[0], count);
485
486 if (Ifx_Fifo_write(asclin->rx, &ascData[0], count, TIME_NULL) != 0)
487 {
488 /* Receive buffer is full, data is discard */
489 asclin->rxSwFifoOverflow = TRUE;
490 }
491
492 break;
493 }
494 case Ifx_DataBufferMode_timeStampSingle:
495 {
496 Ifx_DataBufferMode_TimeStampSingle packedData;
497
498 while (IfxAsclin_getRxFifoFillLevel(asclin->asclin) > 0)
499 {
500 packedData.timestamp = IfxStm_now();
501 IfxAsclin_read8(asclin->asclin, &ascData[0], 1);
502 packedData.data = ascData[0];
503
504 if (Ifx_Fifo_write(asclin->rx, &packedData, sizeof(packedData), TIME_NULL) != 0)
505 {
506 /* Receive buffer is full, data is discard */
507 asclin->rxSwFifoOverflow = TRUE;
508 }
509 }
510 }
511 break;
512 }
513 }
514
515
516 void IfxAsclin_Asc_isrTransmit(IfxAsclin_Asc *asclin)
517 {
518 asclin->txTimestamp = IfxStm_now();
519 asclin->sendCount++;
520
521 if (Ifx_Fifo_isEmpty(asclin->tx) == FALSE)
522 {
523 switch (asclin->dataBufferMode)
524 {
525 case Ifx_DataBufferMode_normal:
526 {
527 uint8 ascData[16];
528 uint16 count = 0, i_count = 0;
529 volatile uint8 hw_tx_fill_level = 0;
530
531 count = Ifx_Fifo_readCount(asclin->tx); /*SW FIFO fill level*/
532
533 hw_tx_fill_level = IfxAsclin_getTxFifoFillLevel(asclin->asclin);
534
535 i_count = (16 - hw_tx_fill_level);
536
537 if (i_count > count)
538 {
539 i_count = count;
540 }
541
542 Ifx_Fifo_read(asclin->tx, &ascData[0], i_count, TIME_NULL);
543 IfxAsclin_write8(asclin->asclin, &ascData[0], i_count);
544 }
545 break;
546
547 case Ifx_DataBufferMode_timeStampSingle:
548 {
549 Ifx_DataBufferMode_TimeStampSingle packedData;
550 uint8 ascData;
551
552 Ifx_Fifo_read(asclin->tx, &packedData, sizeof(packedData), TIME_NULL);
553
554 ascData = packedData.data;
555 IfxAsclin_write8(asclin->asclin, &ascData, 1);
556 }
557 break;
558 }
559 }
560 else
561 {
562 /* Transmit buffer is empty */
563 asclin->txInProgress = FALSE;
564 }
565 }
566
567
568 boolean IfxAsclin_Asc_read(IfxAsclin_Asc *asclin, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
569 {
570 Ifx_SizeT left = Ifx_Fifo_read(asclin->rx, data, *count, timeout);
571
572 *count -= left;
573
574 return left == 0;
575 }
576
577
578 void IfxAsclin_Asc_resetSendCount(IfxAsclin_Asc *asclin)
579 {
580 asclin->sendCount = 0;
581 }
582
583
584 boolean IfxAsclin_Asc_stdIfDPipeInit(IfxStdIf_DPipe *stdif, IfxAsclin_Asc *asclin)
585 {
586 /* Ensure the stdif is reset to zeros */
587 memset(stdif, 0, sizeof(IfxStdIf_DPipe));
588
589 /* Set the API link */
590 stdif->driver = asclin;
591 stdif->write = (IfxStdIf_DPipe_Write) & IfxAsclin_Asc_write;
592 stdif->read = (IfxStdIf_DPipe_Read) & IfxAsclin_Asc_read;
593 stdif->getReadCount = (IfxStdIf_DPipe_GetReadCount) & IfxAsclin_Asc_getReadCount;
594 stdif->getReadEvent = (IfxStdIf_DPipe_GetReadEvent) & IfxAsclin_Asc_getReadEvent;
595 stdif->getWriteCount = (IfxStdIf_DPipe_GetWriteCount) & IfxAsclin_Asc_getWriteCount;
596 stdif->getWriteEvent = (IfxStdIf_DPipe_GetWriteEvent) & IfxAsclin_Asc_getWriteEvent;
597 stdif->canReadCount = (IfxStdIf_DPipe_CanReadCount) & IfxAsclin_Asc_canReadCount;
598 stdif->canWriteCount = (IfxStdIf_DPipe_CanWriteCount) & IfxAsclin_Asc_canWriteCount;
599 stdif->flushTx = (IfxStdIf_DPipe_FlushTx) & IfxAsclin_Asc_flushTx;
600 stdif->clearTx = (IfxStdIf_DPipe_ClearTx) & IfxAsclin_Asc_clearTx;
601 stdif->clearRx = (IfxStdIf_DPipe_ClearRx) & IfxAsclin_Asc_clearRx;
602 stdif->onReceive = (IfxStdIf_DPipe_OnReceive) & IfxAsclin_Asc_isrReceive;
603 stdif->onTransmit = (IfxStdIf_DPipe_OnTransmit) & IfxAsclin_Asc_isrTransmit;
604 stdif->onError = (IfxStdIf_DPipe_OnError) & IfxAsclin_Asc_isrError;
605 stdif->getSendCount = (IfxStdIf_DPipe_GetSendCount) & IfxAsclin_Asc_getSendCount;
606 stdif->getTxTimeStamp = (IfxStdIf_DPipe_GetTxTimeStamp) & IfxAsclin_Asc_getTxTimeStamp;
607 stdif->resetSendCount = (IfxStdIf_DPipe_ResetSendCount) & IfxAsclin_Asc_resetSendCount;
608 stdif->txDisabled = FALSE;
609 return TRUE;
610 }
611
612
613 boolean IfxAsclin_Asc_write(IfxAsclin_Asc *asclin, const void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
614 {
615 Ifx_SizeT left;
616 boolean result = TRUE;
617 boolean tx_status = asclin->txInProgress;
618 uint16 tx_fifo_size = (uint16)asclin->tx->size;
619
620 if (*count != 0)
621 {
622 if ((!tx_status) && (*count > tx_fifo_size)) /*Transmission not initialised and data size is greater than S/W FIFO*/
623 {
624 Ifx_Fifo_write(asclin->tx, data, tx_fifo_size, timeout); /*Fill upto the S/W FIFO size and initiate transmission*/
625 IfxAsclin_Asc_initiateTransmission(asclin);
626
627 left = Ifx_Fifo_write(asclin->tx, (((const uint8 *)data) + tx_fifo_size), (*count) - tx_fifo_size, timeout);
628 IfxAsclin_Asc_initiateTransmission(asclin); /*Will initiate transmission only if txInProgress is False, otherwise interrupts will continue to push data to H/W FIFO*/
629 }
630
631 else
632 {
633 left = Ifx_Fifo_write(asclin->tx, data, *count, timeout);
634 IfxAsclin_Asc_initiateTransmission(asclin);
635 }
636
637 *count -= left;
638 result = left == 0;
639 }
640
641 return result;
642 }
IfxAsclin_Asc_Config::baudrate
IfxAsclin_Asc_BaudRate baudrate
structure for baudrate
Definition: IfxAsclin_Asc.h:360
IfxStdIf_DPipe_::resetSendCount
IfxStdIf_DPipe_ResetSendCount resetSendCount
Definition: IfxStdIf_DPipe.h:253
IfxStdIf_DPipe_::canWriteCount
IfxStdIf_DPipe_CanWriteCount canWriteCount
Definition: IfxStdIf_DPipe.h:243
IfxStdIf_DPipe_ResetSendCount
void(* IfxStdIf_DPipe_ResetSendCount)(IfxStdIf_InterfaceDriver stdIf)
Reset the sendCount counter.
Definition: IfxStdIf_DPipe.h:226
IfxAsclin_Asc_Config::rxBufferSize
Ifx_SizeT rxBufferSize
Size of the rx buffer.
Definition: IfxAsclin_Asc.h:374
IfxAsclin_Asc.h
ASCLIN ASC details.
IfxAsclin_Cts_In
CTS pin mapping structure.
Definition: IfxAsclin_PinMap.h:56
IfxAsclin_Asc_isrError
void IfxAsclin_Asc_isrError(IfxAsclin_Asc *asclin)
ISR error routine.
Definition: IfxAsclin_Asc.c:437
IfxAsclin_Asc_FifoControl::rxFifoInterruptMode
IfxAsclin_FifoInterruptMode rxFifoInterruptMode
RXFIFOCON.FM, Rx FIFO interrupt generation mode.
Definition: IfxAsclin_Asc.h:287
IfxAsclin_Asc_getReadCount
sint32 IfxAsclin_Asc_getReadCount(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:130
IfxStdIf_DPipe_::txDisabled
boolean txDisabled
If disabled is set to TRUE, the output is disabled, else enabled.
Definition: IfxStdIf_DPipe.h:233
Ifx_TickTime
sint64 Ifx_TickTime
Time in ticks.
Definition: Ifx_Types.h:76
Ifx_Fifo_write
Ifx_SizeT Ifx_Fifo_write(Ifx_Fifo *fifo, const void *data, Ifx_SizeT count, Ifx_TickTime timeout)
Write data into a fifo.
Definition: Ifx_Fifo.c:366
IfxAsclin_Tx_Out
TX pin mapping structure.
Definition: IfxAsclin_PinMap.h:96
IfxAsclin_IdleDelay_0
idle delay in 0 bit times
Definition: IfxAsclin.h:187
IfxAsclin_Asc_Config::frame
IfxAsclin_Asc_FrameControl frame
structure for frame control
Definition: IfxAsclin_Asc.h:362
IfxAsclin_initCtsPin
IFX_INLINE void IfxAsclin_initCtsPin(const IfxAsclin_Cts_In *cts, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a CTS input.
Definition: IfxAsclin.h:2138
IfxStdIf_DPipe_::getTxTimeStamp
IfxStdIf_DPipe_GetTxTimeStamp getTxTimeStamp
Definition: IfxStdIf_DPipe.h:252
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxStdIf_DPipe_::onTransmit
IfxStdIf_DPipe_OnTransmit onTransmit
Definition: IfxStdIf_DPipe.h:248
IfxStdIf_DPipe_
Standard interface object.
Definition: IfxStdIf_DPipe.h:230
IfxAsclin_Asc_getWriteEvent
IfxStdIf_DPipe_WriteEvent IfxAsclin_Asc_getWriteEvent(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:160
IfxAsclin_Asc_Config::rxBuffer
void * rxBuffer
The buffer parameter must point on a free memory location where the buffer object will be Initialised...
Definition: IfxAsclin_Asc.h:375
IfxAsclin_setIdleDelay
IFX_INLINE void IfxAsclin_setIdleDelay(Ifx_ASCLIN *asclin, IfxAsclin_IdleDelay delay)
Sets the idle delay.
Definition: IfxAsclin.h:2285
IfxAsclin_ReceiveBufferMode_rxFifo
RxFIFO mode.
Definition: IfxAsclin.h:265
IfxAsclin_ShiftDirection_lsbFirst
LSB first.
Definition: IfxAsclin.h:364
IfxAsclin_Asc
Module Handle.
Definition: IfxAsclin_Asc.h:342
IfxAsclin_TxFifoInterruptLevel_0
TX FIFO level 0.
Definition: IfxAsclin.h:435
Ifx_Fifo_canReadCount
boolean Ifx_Fifo_canReadCount(Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if the required number of bytes are available in the buffer.
Definition: Ifx_Fifo.c:136
IfxAsclin_Asc_BitTimingControl::medianFilter
IfxAsclin_SamplesPerBit medianFilter
BITCON.SM, number of samples per bit (1 or 3), sample mode/median filter.
Definition: IfxAsclin_Asc.h:273
IfxAsclin_getSrcPointerEr
volatile Ifx_SRC_SRCR * IfxAsclin_getSrcPointerEr(Ifx_ASCLIN *asclin)
Returns the SRC pointer for ERR.
Definition: IfxAsclin.c:159
IfxAsclin_Asc_getTxTimeStamp
Ifx_TickTime IfxAsclin_Asc_getTxTimeStamp(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:148
IfxAsclin_getRxFifoUnderflowFlagStatus
IFX_INLINE boolean IfxAsclin_getRxFifoUnderflowFlagStatus(Ifx_ASCLIN *asclin)
Returns the Rx FIFO underflow flag status.
Definition: IfxAsclin.h:2072
IfxStdIf_DPipe_::getWriteEvent
IfxStdIf_DPipe_GetWriteEvent getWriteEvent
Definition: IfxStdIf_DPipe.h:241
Ifx_DataBufferMode_TimeStampSingle::data
uint8 data
Definition: Ifx_Types.h:149
IfxStdIf_DPipe_::getWriteCount
IfxStdIf_DPipe_GetWriteCount getWriteCount
Definition: IfxStdIf_DPipe.h:240
IfxAsclin_getTxFifoOverflowFlagStatus
IFX_INLINE boolean IfxAsclin_getTxFifoOverflowFlagStatus(Ifx_ASCLIN *asclin)
Returns the Tx FIFO overflow flag status.
Definition: IfxAsclin.h:2120
IfxAsclin_Asc_Config::clockSource
IfxAsclin_ClockSource clockSource
CSR.CLKSEL, clock source selection.
Definition: IfxAsclin_Asc.h:366
IfxAsclin_Asc_initModule
IfxAsclin_Status IfxAsclin_Asc_initModule(IfxAsclin_Asc *asclin, const IfxAsclin_Asc_Config *config)
Initialises the module.
Definition: IfxAsclin_Asc.c:166
IfxAsclin_Asc_getSendCount
uint32 IfxAsclin_Asc_getSendCount(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:142
IfxStdIf_DPipe_GetSendCount
uint32(* IfxStdIf_DPipe_GetSendCount)(IfxStdIf_InterfaceDriver stdIf)
Returns number of bytes send.
Definition: IfxStdIf_DPipe.h:128
IfxAsclin_ClockSource_ascFastClock
f asclinf wiil be supplied
Definition: IfxAsclin.h:112
IfxAsclin_Asc_initiateTransmission
void IfxAsclin_Asc_initiateTransmission(IfxAsclin_Asc *asclin)
Initiate the data transmission.
Definition: IfxAsclin_Asc.c:406
IfxAsclin_enableModule
void IfxAsclin_enableModule(Ifx_ASCLIN *asclin)
Enables the module.
Definition: IfxAsclin.c:70
memset
void * memset(void *s, int c, syze_t n)
IfxStdIf_DPipe_OnTransmit
void(* IfxStdIf_DPipe_OnTransmit)(IfxStdIf_InterfaceDriver stdIf)
handler called on transmit event
Definition: IfxStdIf_DPipe.h:212
IfxAsclin_Asc_getReadEvent
IfxStdIf_DPipe_ReadEvent IfxAsclin_Asc_getReadEvent(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:136
IfxAsclin_Asc_FifoControl::inWidth
IfxAsclin_TxFifoInletWidth inWidth
TXFIFOCON.INW, transmit FIFO inlet width.
Definition: IfxAsclin_Asc.h:281
IfxAsclin_Asc_FifoControl::txFifoInterruptLevel
IfxAsclin_TxFifoInterruptLevel txFifoInterruptLevel
TXFIFOCON.INTLEVEL, Tx FIFO interrupt level.
Definition: IfxAsclin_Asc.h:283
IfxAsclin_Asc_Pins::cts
IFX_CONST IfxAsclin_Cts_In * cts
ASC clear to send (CTS) pin.
Definition: IfxAsclin_Asc.h:317
IfxStm_getDeadLine
IFX_INLINE sint64 IfxStm_getDeadLine(sint64 timeout)
Get the deadline value.
Definition: IfxStm.h:746
IfxAsclin_Asc_isrReceive
void IfxAsclin_Asc_isrReceive(IfxAsclin_Asc *asclin)
ISR receive routine.
Definition: IfxAsclin_Asc.c:474
IfxAsclin_flushTxFifo
IFX_INLINE void IfxAsclin_flushTxFifo(Ifx_ASCLIN *asclin)
Flushes (empties) the Tx FIFO.
Definition: IfxAsclin.h:1940
IfxAsclin_Asc_BaudRate::baudrate
float32 baudrate
value of the required baudrate
Definition: IfxAsclin_Asc.h:264
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxStdIf_DPipe_::onError
IfxStdIf_DPipe_OnError onError
Definition: IfxStdIf_DPipe.h:249
IfxAsclin_RxFifoInterruptLevel_1
RX FIFO level 1.
Definition: IfxAsclin.h:283
IfxAsclin_Asc_Config::fifo
IfxAsclin_Asc_FifoControl fifo
structure for FIFO control
Definition: IfxAsclin_Asc.h:363
IfxAsclin_Asc_ErrorFlags::parityError
uint8 parityError
parity error
Definition: IfxAsclin_Asc.h:251
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
Ifx_DataBufferMode_normal
normal mode, each received byte is moved to the rx fifo
Definition: Ifx_Types.h:163
IfxAsclin_setRxFifoInterruptMode
IFX_INLINE void IfxAsclin_setRxFifoInterruptMode(Ifx_ASCLIN *asclin, IfxAsclin_FifoInterruptMode mode)
Selects the Rx FIFO interupt generation mode.
Definition: IfxAsclin.h:2381
IfxAsclin_initRxPin
IFX_INLINE void IfxAsclin_initRxPin(const IfxAsclin_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a RX input.
Definition: IfxAsclin.h:2157
IfxAsclin_Asc_getWriteCount
sint32 IfxAsclin_Asc_getWriteCount(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:154
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
IfxStdIf_DPipe_::read
IfxStdIf_DPipe_Read read
Definition: IfxStdIf_DPipe.h:237
IfxAsclin_Asc_Pins::ctsMode
IfxPort_InputMode ctsMode
Cts pin as input.
Definition: IfxAsclin_Asc.h:318
Ifx_Fifo_init
Ifx_Fifo * Ifx_Fifo_init(void *buffer, Ifx_SizeT size, Ifx_SizeT elementSize)
Initialize the FIFO buffer object.
Definition: Ifx_Fifo.c:91
IfxAsclin_Asc_BaudRate::prescaler
uint16 prescaler
BITCON.PRESCALER, the division ratio of the predevider.
Definition: IfxAsclin_Asc.h:265
IfxAsclin_Asc::sendCount
volatile uint32 sendCount
Number of byte that are send out, this value is reset with the function Asc_If_resetSendCount() ...
Definition: IfxAsclin_Asc.h:351
IfxAsclin_clearAllFlags
IFX_INLINE void IfxAsclin_clearAllFlags(Ifx_ASCLIN *asclin)
clears all the flags
Definition: IfxAsclin.h:1616
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
Ifx_DataBufferMode_timeStampSingle
Single byte type stamp mode. The rx fifo is filled in with Ifx_DataBufferMode_TimeStampSingle items...
Definition: Ifx_Types.h:164
IfxAsclin_Asc_isrTransmit
void IfxAsclin_Asc_isrTransmit(IfxAsclin_Asc *asclin)
ISR transmit routine.
Definition: IfxAsclin_Asc.c:516
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxAsclin_Asc_FrameControl::dataLength
IfxAsclin_DataLength dataLength
DATCON.DATALENGTH, data length, number of bits per transfer.
Definition: IfxAsclin_Asc.h:299
Ifx_DataBufferMode_TimeStampSingle
Definition: Ifx_Types.h:146
IfxAsclin_Asc_FifoControl::buffMode
IfxAsclin_ReceiveBufferMode buffMode
RXFIFOCON.BUFF, receive buffer mode (Rx FIFO or Rx buffer)
Definition: IfxAsclin_Asc.h:285
IfxAsclin_Asc_FifoControl::outWidth
IfxAsclin_RxFifoOutletWidth outWidth
RXFIFOCON.OTW, receive FIFO oulet width.
Definition: IfxAsclin_Asc.h:282
IfxAsclin_Asc_Config::interrupt
IfxAsclin_Asc_InterruptConfig interrupt
structure for interrupt configuration
Definition: IfxAsclin_Asc.h:364
IfxStdIf_DPipe_::getSendCount
IfxStdIf_DPipe_GetSendCount getSendCount
Definition: IfxStdIf_DPipe.h:251
IfxStdIf_DPipe_::canReadCount
IfxStdIf_DPipe_CanReadCount canReadCount
Definition: IfxStdIf_DPipe.h:242
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxAsclin_Asc::errorFlags
IfxAsclin_Asc_ErrorFlagsUnion errorFlags
error reported by ASCLIN during runtime (written by IfxAsclin_Asc_isrError)
Definition: IfxAsclin_Asc.h:349
IfxStdIf_DPipe_CanWriteCount
boolean(* IfxStdIf_DPipe_CanWriteCount)(IfxStdIf_InterfaceDriver stdIf, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if there is enough free space to write the data in the buffer.
Definition: IfxStdIf_DPipe.h:174
IfxStdIf_DPipe_::write
IfxStdIf_DPipe_Write write
Definition: IfxStdIf_DPipe.h:236
IfxAsclin_clearRxFifoUnderflowFlag
IFX_INLINE void IfxAsclin_clearRxFifoUnderflowFlag(Ifx_ASCLIN *asclin)
Clears the Rx FIFO underflow flag.
Definition: IfxAsclin.h:1706
IfxAsclin_setParityType
IFX_INLINE void IfxAsclin_setParityType(Ifx_ASCLIN *asclin, IfxAsclin_ParityType type)
Sets the parity type.
Definition: IfxAsclin.h:2351
TIME_NULL
#define TIME_NULL
Definition: Ifx_Types.h:78
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxAsclin_enableRxFifoFillLevelFlag
IFX_INLINE void IfxAsclin_enableRxFifoFillLevelFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Rx FIFO level flag.
Definition: IfxAsclin.h:1862
IfxAsclin_setBitTiming
boolean IfxAsclin_setBitTiming(Ifx_ASCLIN *asclin, float32 baudrate, IfxAsclin_OversamplingFactor oversampling, IfxAsclin_SamplePointPosition samplepoint, IfxAsclin_SamplesPerBit medianFilter)
Set the bit timing.
Definition: IfxAsclin.c:331
IfxAsclin_setRxFifoOutletWidth
IFX_INLINE void IfxAsclin_setRxFifoOutletWidth(Ifx_ASCLIN *asclin, IfxAsclin_RxFifoOutletWidth width)
Sets the receive FIFO outlet width.
Definition: IfxAsclin.h:2387
IfxAsclin_Asc_Pins::pinDriver
IfxPort_PadDriver pinDriver
pad driver
Definition: IfxAsclin_Asc.h:325
IfxAsclin_enableParityErrorFlag
IFX_INLINE void IfxAsclin_enableParityErrorFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables parity error flag.
Definition: IfxAsclin.h:1844
IfxAsclin_Asc_InterruptConfig::typeOfService
IfxSrc_Tos typeOfService
type of interrupt service
Definition: IfxAsclin_Asc.h:310
Ifx_Fifo_read
Ifx_SizeT Ifx_Fifo_read(Ifx_Fifo *fifo, void *data, Ifx_SizeT count, Ifx_TickTime timeout)
Read data from a fifo and remove them from the buffer.
Definition: Ifx_Fifo.c:208
IfxAsclin_Asc_BaudRate::oversampling
IfxAsclin_OversamplingFactor oversampling
BITCON.OVERSAMPLING, division ratio of the baudrate post devider.
Definition: IfxAsclin_Asc.h:266
IfxAsclin_enableTxFifoOverflowFlag
IFX_INLINE void IfxAsclin_enableTxFifoOverflowFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Tx FIFO overflow flag.
Definition: IfxAsclin.h:1916
IfxAsclin_Asc::txInProgress
volatile boolean txInProgress
Ongoing transfer. Will be set by IfxAsclin_Asc_initiateTransmission, and cleared by IfxAsclin_Asc_isr...
Definition: IfxAsclin_Asc.h:347
IfxAsclin_getSrcPointerTx
volatile Ifx_SRC_SRCR * IfxAsclin_getSrcPointerTx(Ifx_ASCLIN *asclin)
Returns the SRC pointer for Tx.
Definition: IfxAsclin.c:225
IfxAsclin_Asc_Config::loopBack
boolean loopBack
IOCR.LB, loop back mode selection, 0 for disable, 1 for enable.
Definition: IfxAsclin_Asc.h:380
IfxAsclin_clearParityErrorFlag
IFX_INLINE void IfxAsclin_clearParityErrorFlag(Ifx_ASCLIN *asclin)
Clears the parity error flag.
Definition: IfxAsclin.h:1676
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxStdIf_DPipe_GetWriteEvent
IfxStdIf_DPipe_WriteEvent(* IfxStdIf_DPipe_GetWriteEvent)(IfxStdIf_InterfaceDriver stdIf)
Returns write event object.
Definition: IfxStdIf_DPipe.h:152
IfxAsclin_Asc_FrameControl::frameMode
IfxAsclin_FrameMode frameMode
FRAMECON.MODE, mode of operation of the module.
Definition: IfxAsclin_Asc.h:296
Ifx_Fifo_canWriteCount
boolean Ifx_Fifo_canWriteCount(Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if there is enough free space to write the data in the buffer.
Definition: Ifx_Fifo.c:296
IfxAsclin_Status_noError
No error.
Definition: IfxAsclin.h:392
IfxStdIf_DPipe_GetReadEvent
IfxStdIf_DPipe_ReadEvent(* IfxStdIf_DPipe_GetReadEvent)(IfxStdIf_InterfaceDriver stdIf)
Returns read event object.
Definition: IfxStdIf_DPipe.h:120
IfxAsclin_RxFifoOutletWidth_1
number of bytes 1
Definition: IfxAsclin.h:307
IfxStdIf_DPipe_::flushTx
IfxStdIf_DPipe_FlushTx flushTx
Definition: IfxStdIf_DPipe.h:244
IfxStm_now
IFX_INLINE sint64 IfxStm_now(void)
Returns the STM counter value.
Definition: IfxStm.h:733
IfxAsclin_Asc_Pins::rts
IFX_CONST IfxAsclin_Rts_Out * rts
ASC (request to send) RTS pin.
Definition: IfxAsclin_Asc.h:321
IfxAsclin_enableFrameErrorFlag
IFX_INLINE void IfxAsclin_enableFrameErrorFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables frame error flag.
Definition: IfxAsclin.h:1796
IfxAsclin_clearRxFifoOverflowFlag
IFX_INLINE void IfxAsclin_clearRxFifoOverflowFlag(Ifx_ASCLIN *asclin)
Clears the Rx FIFO overflow flag.
Definition: IfxAsclin.h:1700
_Fifo::eventWriter
volatile boolean eventWriter
event set by the reader to signal the writer that the required free space are available in the buffer...
Definition: Ifx_Fifo.h:79
IfxStm_isDeadLine
IFX_INLINE boolean IfxStm_isDeadLine(sint64 deadLine)
Checked if deadline has occured.
Definition: IfxStm.h:763
IfxAsclin_Rx_In
RX pin mapping structure.
Definition: IfxAsclin_PinMap.h:64
IfxAsclin_setRxFifoInterruptLevel
IFX_INLINE void IfxAsclin_setRxFifoInterruptLevel(Ifx_ASCLIN *asclin, IfxAsclin_RxFifoInterruptLevel level)
Sets the Tx FIFO interrupt level.
Definition: IfxAsclin.h:2375
IfxAsclin_Asc_FifoControl::rxFifoInterruptLevel
IfxAsclin_RxFifoInterruptLevel rxFifoInterruptLevel
RXFIFOCON.INTLEVEL, Rx FIFO interrupt level.
Definition: IfxAsclin_Asc.h:284
IfxAsclin_clearFrameErrorFlag
IFX_INLINE void IfxAsclin_clearFrameErrorFlag(Ifx_ASCLIN *asclin)
Clears the frame error flag.
Definition: IfxAsclin.h:1640
IfxStdIf_DPipe_::onReceive
IfxStdIf_DPipe_OnReceive onReceive
Definition: IfxStdIf_DPipe.h:247
IfxAsclin_Asc_blockingRead
uint8 IfxAsclin_Asc_blockingRead(IfxAsclin_Asc *asclin)
Reads data from the Rx FIFO.
Definition: IfxAsclin_Asc.c:53
IfxAsclin_Asc_FrameControl::idleDelay
IfxAsclin_IdleDelay idleDelay
FRAMECON.IDLE, idle delay.
Definition: IfxAsclin_Asc.h:294
IfxAsclin_Rts_Out
RTS pin mapping structure.
Definition: IfxAsclin_PinMap.h:72
IfxSrc_Tos_dma
DMA interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:69
IfxStdIf_DPipe_Write
boolean(* IfxStdIf_DPipe_Write)(IfxStdIf_InterfaceDriver stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Write binary data into the IfxStdIf_DPipe.
Definition: IfxStdIf_DPipe.h:89
IfxAsclin_Asc::asclin
Ifx_ASCLIN * asclin
pointer to ASCLIN registers
Definition: IfxAsclin_Asc.h:344
IfxAsclin_setPrescaler
IFX_INLINE void IfxAsclin_setPrescaler(Ifx_ASCLIN *asclin, uint16 prescaler)
Sets the division ratio of the predivider (prescaler)
Definition: IfxAsclin.h:2357
IfxAsclin_Asc_Pins::rxMode
IfxPort_InputMode rxMode
Rx pin as input.
Definition: IfxAsclin_Asc.h:320
IfxAsclin_Asc_stdIfDPipeInit
boolean IfxAsclin_Asc_stdIfDPipeInit(IfxStdIf_DPipe *stdif, IfxAsclin_Asc *asclin)
Initialize the standard interface to the device driver.
Definition: IfxAsclin_Asc.c:584
IfxAsclin_Asc_Pins::txMode
IfxPort_OutputMode txMode
Tx as output.
Definition: IfxAsclin_Asc.h:324
IfxStdIf_DPipe_OnReceive
void(* IfxStdIf_DPipe_OnReceive)(IfxStdIf_InterfaceDriver stdIf)
handler called on reveive event
Definition: IfxStdIf_DPipe.h:205
IfxAsclin_ParityType_even
even parity
Definition: IfxAsclin.h:256
IfxStdIf_DPipe_::driver
IfxStdIf_InterfaceDriver driver
Pointer to the specific driver object.
Definition: IfxStdIf_DPipe.h:232
IfxAsclin_enableRxFifoOverflowFlag
IFX_INLINE void IfxAsclin_enableRxFifoOverflowFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Rx FIFO overflow flag.
Definition: IfxAsclin.h:1874
Ifx_Fifo_flush
IFX_INLINE boolean Ifx_Fifo_flush(Ifx_Fifo *fifo, Ifx_TickTime timeout)
Empty the fifo.
Definition: Ifx_Fifo.h:186
IfxAsclin_getTxFifoFillLevel
IFX_INLINE uint8 IfxAsclin_getTxFifoFillLevel(Ifx_ASCLIN *asclin)
Returns the current filling level of Tx FIFO.
Definition: IfxAsclin.h:2102
IfxAsclin_Asc_Config::bitTiming
IfxAsclin_Asc_BitTimingControl bitTiming
structure for bit timings
Definition: IfxAsclin_Asc.h:361
IfxAsclin_Asc_resetSendCount
void IfxAsclin_Asc_resetSendCount(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:578
IfxAsclin_Asc_Config::pins
IFX_CONST IfxAsclin_Asc_Pins * pins
structure for ASC pins
Definition: IfxAsclin_Asc.h:365
IfxStdIf_DPipe_CanReadCount
boolean(* IfxStdIf_DPipe_CanReadCount)(IfxStdIf_InterfaceDriver stdIf, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if the required number of bytes are available for read in the buffer.
Definition: IfxStdIf_DPipe.h:163
IfxAsclin_Asc_BitTimingControl::samplePointPosition
IfxAsclin_SamplePointPosition samplePointPosition
BITCON.SAMPLEPOINT, sample point position.
Definition: IfxAsclin_Asc.h:274
Ifx_Fifo_create
Ifx_Fifo * Ifx_Fifo_create(Ifx_SizeT size, Ifx_SizeT elementSize)
Create a Fifo object.
Definition: Ifx_Fifo.c:68
IfxAsclin_Asc_clearRx
void IfxAsclin_Asc_clearRx(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:85
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:68
Ifx_DataBufferMode_TimeStampSingle::timestamp
Ifx_TickTime timestamp
Definition: Ifx_Types.h:148
IfxAsclin_getSrcPointerRx
volatile Ifx_SRC_SRCR * IfxAsclin_getSrcPointerRx(Ifx_ASCLIN *asclin)
Returns the SRC pointer for Rx.
Definition: IfxAsclin.c:192
IfxAsclin_Asc_Config
Configuration structure of the module.
Definition: IfxAsclin_Asc.h:357
IfxAsclin_flushRxFifo
IFX_INLINE void IfxAsclin_flushRxFifo(Ifx_ASCLIN *asclin)
Flushes (empties) the Rx FIFO.
Definition: IfxAsclin.h:1934
Ifx_Fifo_readCount
IFX_INLINE Ifx_SizeT Ifx_Fifo_readCount(Ifx_Fifo *fifo)
Returns the size of the data in the buffer in bytes.
Definition: Ifx_Fifo.h:203
IfxAsclin_Asc::tx
Ifx_Fifo * tx
Transmit FIFO buffer.
Definition: IfxAsclin_Asc.h:345
IfxStdIf_DPipe_::getReadEvent
IfxStdIf_DPipe_GetReadEvent getReadEvent
Definition: IfxStdIf_DPipe.h:239
Ifx_Fifo_clear
void Ifx_Fifo_clear(Ifx_Fifo *fifo)
Clear fifo contents.
Definition: Ifx_Fifo.c:259
IfxAsclin_Asc_InterruptConfig::txPriority
uint16 txPriority
transmit interrupt priority
Definition: IfxAsclin_Asc.h:307
IfxAsclin_Asc_ErrorFlagsUnion::flags
IfxAsclin_Asc_ErrorFlags flags
Definition: IfxAsclin_Asc.h:335
_Fifo::size
Ifx_SizeT size
multiple of 8 bit, max 0xFFF8
Definition: Ifx_Fifo.h:76
IfxAsclin_read8
uint32 IfxAsclin_read8(Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
Reads data up to 8 bits.
Definition: IfxAsclin.c:286
IfxAsclin_SamplePointPosition_3
sample point position at 3
Definition: IfxAsclin.h:334
IfxAsclin_Asc_canWriteCount
boolean IfxAsclin_Asc_canWriteCount(IfxAsclin_Asc *asclin, Ifx_SizeT count, Ifx_TickTime timeout)
Definition: IfxAsclin_Asc.c:79
Ifx_Fifo_writeCount
IFX_INLINE Ifx_SizeT Ifx_Fifo_writeCount(Ifx_Fifo *fifo)
Returns the free size in bytes.
Definition: Ifx_Fifo.h:219
IfxStdIf_DPipe_GetWriteCount
sint32(* IfxStdIf_DPipe_GetWriteCount)(IfxStdIf_InterfaceDriver stdIf)
Returns the number of free bytes (free space) in the tx buffer.
Definition: IfxStdIf_DPipe.h:144
IfxAsclin_enableParity
IFX_INLINE void IfxAsclin_enableParity(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the parity bit attachment to tha data bits.
Definition: IfxAsclin.h:1838
IfxAsclin_Asc_initModuleConfig
void IfxAsclin_Asc_initModuleConfig(IfxAsclin_Asc_Config *config, Ifx_ASCLIN *asclin)
Fills the config structure with default values.
Definition: IfxAsclin_Asc.c:351
IfxAsclin_getRxFifoFillLevel
IFX_INLINE uint8 IfxAsclin_getRxFifoFillLevel(Ifx_ASCLIN *asclin)
Returns the current filling level of Tx FIFO.
Definition: IfxAsclin.h:2048
IfxAsclin_Asc_write
boolean IfxAsclin_Asc_write(IfxAsclin_Asc *asclin, const void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Definition: IfxAsclin_Asc.c:613
IfxAsclin_Asc_FrameControl::shiftDir
IfxAsclin_ShiftDirection shiftDir
FRAMECON.MSB, shift direction.
Definition: IfxAsclin_Asc.h:297
IfxAsclin_Asc_ErrorFlags::rxFifoUnderflow
uint8 rxFifoUnderflow
receive FIFO underflow error
Definition: IfxAsclin_Asc.h:254
IfxAsclin_Asc_FrameControl::parityType
IfxAsclin_ParityType parityType
FRAMECON.ODD, parity type (even or odd)
Definition: IfxAsclin_Asc.h:298
IfxAsclin_enableRxFifoUnderflowFlag
IFX_INLINE void IfxAsclin_enableRxFifoUnderflowFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Rx FIFO underflow flag.
Definition: IfxAsclin.h:1880
IfxAsclin_disableAllFlags
IFX_INLINE void IfxAsclin_disableAllFlags(Ifx_ASCLIN *asclin)
disables all flags
Definition: IfxAsclin.h:1754
IfxAsclin_Asc_Pins::rx
IFX_CONST IfxAsclin_Rx_In * rx
ASC Rx pin.
Definition: IfxAsclin_Asc.h:319
IfxAsclin_initTxPin
IFX_INLINE void IfxAsclin_initTxPin(const IfxAsclin_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a TX output.
Definition: IfxAsclin.h:2182
IfxAsclin_Asc_flushTx
boolean IfxAsclin_Asc_flushTx(IfxAsclin_Asc *asclin, Ifx_TickTime timeout)
Definition: IfxAsclin_Asc.c:109
IfxAsclin_Asc_ErrorFlags::txFifoOverflow
uint8 txFifoOverflow
transmit FIFO overflow error
Definition: IfxAsclin_Asc.h:255
IfxAsclin_setTxFifoInletWidth
IFX_INLINE void IfxAsclin_setTxFifoInletWidth(Ifx_ASCLIN *asclin, IfxAsclin_TxFifoInletWidth width)
Sets the transmit FIFO inlet width.
Definition: IfxAsclin.h:2467
IfxAsclin_write8
uint32 IfxAsclin_write8(Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
Writes data up to 8 bits.
Definition: IfxAsclin.c:476
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxAsclin_Asc_FrameControl::parityBit
boolean parityBit
FRAMECON.PEN, parity enable.
Definition: IfxAsclin_Asc.h:300
IfxAsclin_enableLoopBackMode
IFX_INLINE void IfxAsclin_enableLoopBackMode(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the loop back mode.
Definition: IfxAsclin.h:1832
IfxStdIf_DPipe_::getReadCount
IfxStdIf_DPipe_GetReadCount getReadCount
Definition: IfxStdIf_DPipe.h:238
IfxAsclin_enableTxFifoOutlet
IFX_INLINE void IfxAsclin_enableTxFifoOutlet(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the transmit FIFO outlet to allow transmission.
Definition: IfxAsclin.h:1910
IfxAsclin_Asc_Pins::rtsMode
IfxPort_OutputMode rtsMode
Rts as output.
Definition: IfxAsclin_Asc.h:322
IfxStdIf_DPipe_FlushTx
boolean(* IfxStdIf_DPipe_FlushTx)(IfxStdIf_InterfaceDriver stdIf, Ifx_TickTime timeout)
Flush the transmit buffer by transmitting all data.
Definition: IfxStdIf_DPipe.h:183
IfxStdIf_DPipe_::clearRx
IfxStdIf_DPipe_ClearRx clearRx
Definition: IfxStdIf_DPipe.h:246
IfxAsclin_setFrameMode
IFX_INLINE void IfxAsclin_setFrameMode(Ifx_ASCLIN *asclin, IfxAsclin_FrameMode mode)
Selects the module&#39;s mode of operation.
Definition: IfxAsclin.h:2273
IfxAsclin_getRxFifoOverflowFlagStatus
IFX_INLINE boolean IfxAsclin_getRxFifoOverflowFlagStatus(Ifx_ASCLIN *asclin)
Returns the Rx FIFO overflow flag status.
Definition: IfxAsclin.h:2066
IfxAsclin_Asc_ErrorFlagsUnion::ALL
uint8 ALL
Definition: IfxAsclin_Asc.h:334
IfxAsclin_Asc_InterruptConfig::erPriority
uint16 erPriority
error interrupt priority
Definition: IfxAsclin_Asc.h:309
TIME_INFINITE
#define TIME_INFINITE
Definition: Ifx_Types.h:77
IfxAsclin_Asc_Pins::tx
IFX_CONST IfxAsclin_Tx_Out * tx
ASC Tx pin.
Definition: IfxAsclin_Asc.h:323
IfxAsclin_Asc_clearTx
void IfxAsclin_Asc_clearTx(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:92
IfxAsclin_Asc_blockingWrite
boolean IfxAsclin_Asc_blockingWrite(IfxAsclin_Asc *asclin, uint8 data)
Writes data into the Tx FIFO.
Definition: IfxAsclin_Asc.c:65
IfxAsclin_Asc_Config::txBuffer
void * txBuffer
The buffer parameter must point on a free memory location where the buffer object will be Initialised...
Definition: IfxAsclin_Asc.h:369
IfxAsclin_initRtsPin
IFX_INLINE void IfxAsclin_initRtsPin(const IfxAsclin_Rts_Out *rts, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a RTS output.
Definition: IfxAsclin.h:2150
IfxAsclin_StopBit_1
number of stop bits 1
Definition: IfxAsclin.h:401
IfxAsclin_Asc_InterruptConfig::rxPriority
uint16 rxPriority
receive interrupt priority
Definition: IfxAsclin_Asc.h:308
IfxStdIf_DPipe_Read
boolean(* IfxStdIf_DPipe_Read)(IfxStdIf_InterfaceDriver stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Read data from the IfxStdIf_DPipe object.
Definition: IfxStdIf_DPipe.h:104
sint32
long sint32
Definition: Platform_Types.h:134
IfxStdIf_DPipe_WriteEvent
volatile boolean * IfxStdIf_DPipe_WriteEvent
Definition: IfxStdIf_DPipe.h:70
Ifx_Fifo_isEmpty
IFX_INLINE boolean Ifx_Fifo_isEmpty(Ifx_Fifo *fifo)
Indicates if the fifo is empty.
Definition: Ifx_Fifo.h:232
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxStdIf_DPipe_GetReadCount
sint32(* IfxStdIf_DPipe_GetReadCount)(IfxStdIf_InterfaceDriver stdIf)
Returns the number of bytes in the rx buffer.
Definition: IfxStdIf_DPipe.h:112
IfxAsclin_FifoInterruptMode_combined
Combined Move Mode.
Definition: IfxAsclin.h:155
IfxAsclin_Asc::txTimestamp
volatile Ifx_TickTime txTimestamp
Time stamp of the latest send byte.
Definition: IfxAsclin_Asc.h:352
IfxAsclin_enableRxFifoInlet
IFX_INLINE void IfxAsclin_enableRxFifoInlet(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the receive FIFO outlet to allow filling of Rx FIFO through shift register...
Definition: IfxAsclin.h:1868
IfxStdIf_DPipe_GetTxTimeStamp
Ifx_TickTime(* IfxStdIf_DPipe_GetTxTimeStamp)(IfxStdIf_InterfaceDriver stdIf)
Returns the time stamp of the last transmit data.
Definition: IfxStdIf_DPipe.h:136
IfxAsclin_setTxFifoInterruptMode
IFX_INLINE void IfxAsclin_setTxFifoInterruptMode(Ifx_ASCLIN *asclin, IfxAsclin_FifoInterruptMode mode)
Selects the Tx FIFO interupt generation mode.
Definition: IfxAsclin.h:2479
IfxAsclin_Asc_FrameControl::stopBit
IfxAsclin_StopBit stopBit
FRAMECON.STOP, number of stop bits.
Definition: IfxAsclin_Asc.h:295
IfxAsclin_ClockSource_noClock
no clock will be supplied
Definition: IfxAsclin.h:111
IfxStdIf_DPipe_ClearTx
void(* IfxStdIf_DPipe_ClearTx)(IfxStdIf_InterfaceDriver stdIf)
Clears the TX buffer by removing all data.
Definition: IfxStdIf_DPipe.h:197
IfxAsclin_FrameMode_asc
asc mode
Definition: IfxAsclin.h:166
IfxStdIf_DPipe_OnError
void(* IfxStdIf_DPipe_OnError)(IfxStdIf_InterfaceDriver stdIf)
handler called on error event
Definition: IfxStdIf_DPipe.h:219
IfxAsclin_Asc_Config::txBufferSize
Ifx_SizeT txBufferSize
Size of the tx buffer.
Definition: IfxAsclin_Asc.h:368
IfxAsclin_Asc_Pins
Structure for ASC pin configuration.
Definition: IfxAsclin_Asc.h:315
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxAsclin_Asc_FifoControl::txFifoInterruptMode
IfxAsclin_FifoInterruptMode txFifoInterruptMode
TXFIFOCON.FM, Tx FIFO interrupt generation mode.
Definition: IfxAsclin_Asc.h:286
IfxAsclin_TxFifoInletWidth_1
number of bytes 1
Definition: IfxAsclin.h:425
IfxAsclin_Asc::rxSwFifoOverflow
volatile boolean rxSwFifoOverflow
Will be set by IfxAsclin_Asc_isrReceive if the SW Fifo overflowed.
Definition: IfxAsclin_Asc.h:348
IfxAsclin_Asc_read
boolean IfxAsclin_Asc_read(IfxAsclin_Asc *asclin, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Definition: IfxAsclin_Asc.c:568
IfxAsclin_FrameMode_initialise
initialise mode
Definition: IfxAsclin.h:165
IfxAsclin_DataLength_8
number of bits per transfer 7
Definition: IfxAsclin.h:139
IfxAsclin_OversamplingFactor_4
oversampling factor 4
Definition: IfxAsclin.h:236
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxAsclin_SamplesPerBit_one
one sample per bit
Definition: IfxAsclin.h:354
IfxStdIf_DPipe_::clearTx
IfxStdIf_DPipe_ClearTx clearTx
Definition: IfxStdIf_DPipe.h:245
IfxAsclin_Asc::rx
Ifx_Fifo * rx
Receive FIFO buffer.
Definition: IfxAsclin_Asc.h:346
IfxAsclin_setStopBit
IFX_INLINE void IfxAsclin_setStopBit(Ifx_ASCLIN *asclin, IfxAsclin_StopBit stopBit)
Sets the number of stop bits.
Definition: IfxAsclin.h:2432
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxAsclin_Asc_ErrorFlags::frameError
uint8 frameError
transmit complete/pending error
Definition: IfxAsclin_Asc.h:252
IfxAsclin_setShiftDirection
IFX_INLINE void IfxAsclin_setShiftDirection(Ifx_ASCLIN *asclin, IfxAsclin_ShiftDirection dir)
Sets the shift direction.
Definition: IfxAsclin.h:2411
IfxAsclin_getFrameErrorFlagStatus
IFX_INLINE boolean IfxAsclin_getFrameErrorFlagStatus(Ifx_ASCLIN *asclin)
Returns the frame error flag status.
Definition: IfxAsclin.h:1976
IfxAsclin_setDisableModuleRequest
IFX_INLINE void IfxAsclin_setDisableModuleRequest(Ifx_ASCLIN *asclin)
Sets the disable module request.
Definition: IfxAsclin.h:2255
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxStdIf_DPipe_ReadEvent
volatile boolean * IfxStdIf_DPipe_ReadEvent
Definition: IfxStdIf_DPipe.h:71
IfxAsclin_enableTxFifoFillLevelFlag
IFX_INLINE void IfxAsclin_enableTxFifoFillLevelFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Tx FIFO level flag.
Definition: IfxAsclin.h:1904
IfxAsclin_Asc_disableModule
void IfxAsclin_Asc_disableModule(IfxAsclin_Asc *asclin)
Disables the module.
Definition: IfxAsclin_Asc.c:99
IfxAsclin_Asc_ErrorFlags::rxFifoOverflow
uint8 rxFifoOverflow
receive FIFO overflow error
Definition: IfxAsclin_Asc.h:253
IfxAsclin_clearTxFifoOverflowFlag
IFX_INLINE void IfxAsclin_clearTxFifoOverflowFlag(Ifx_ASCLIN *asclin)
Clears the Tx FIFO overflow flag.
Definition: IfxAsclin.h:1736
IfxAsclin_Status
IfxAsclin_Status
Error status.
Definition: IfxAsclin.h:389
IfxAsclin_setDataLength
IFX_INLINE void IfxAsclin_setDataLength(Ifx_ASCLIN *asclin, IfxAsclin_DataLength length)
Sets the data length (number of bits per transfer)
Definition: IfxAsclin.h:2243
IfxStdIf_DPipe_ClearRx
void(* IfxStdIf_DPipe_ClearRx)(IfxStdIf_InterfaceDriver stdIf)
Clears the RX buffer by removing all data.
Definition: IfxStdIf_DPipe.h:190
IfxAsclin_getParityErrorFlagStatus
IFX_INLINE boolean IfxAsclin_getParityErrorFlagStatus(Ifx_ASCLIN *asclin)
Returns the parity error flag status.
Definition: IfxAsclin.h:2018
IfxAsclin_setClockSource
void IfxAsclin_setClockSource(Ifx_ASCLIN *asclin, IfxAsclin_ClockSource clockSource)
Sets the clock source.
Definition: IfxAsclin.c:430
IfxAsclin_setTxFifoInterruptLevel
IFX_INLINE void IfxAsclin_setTxFifoInterruptLevel(Ifx_ASCLIN *asclin, IfxAsclin_TxFifoInterruptLevel level)
Sets the Tx FIFO interrupt level.
Definition: IfxAsclin.h:2473
IfxAsclin_Asc::dataBufferMode
Ifx_DataBufferMode dataBufferMode
Rx buffer mode.
Definition: IfxAsclin_Asc.h:350
IfxAsclin_Asc_canReadCount
boolean IfxAsclin_Asc_canReadCount(IfxAsclin_Asc *asclin, Ifx_SizeT count, Ifx_TickTime timeout)
Definition: IfxAsclin_Asc.c:73


iLLD_TC38A: IfxAsclin_Asc.h Source File

  • Asclin
  • Asc
IfxAsclin_Asc.h
Go to the documentation of this file.
1 /**
2 * \file IfxAsclin_Asc.h
3 * \brief ASCLIN ASC details
4 * \ingroup IfxLld_Asclin
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Asclin_Asc_Usage How to use the ASCLIN ASC Interface driver?
42 * \ingroup IfxLld_Asclin
43 *
44 * The ASC interface driver provides a default ASCLIN configuration for asynchronous serial communication in 8bit mode, and a set of data transfer routines.
45 *
46 * Data transfers are buffered by the hardware based FIFOs, and in addition by software based FIFOs with a configurable size. Incoming and outgoing data is transfered in background from/to the ASCLIN peripheral by interrupt service handlers, which are part of this driver as well. This allows a nonblocking communication without stalling the thread(s) from where data is sent and received.
47 *
48 * In the following sections it will be described, how to integrate the driver into the application framework.
49 *
50 * \section IfxLld_Asclin_Asc_Preparation Preparation
51 * \subsection IfxLld_Asclin_Asc_Include Include Files
52 *
53 * Include following header file into your C code:
54 * \code
55 * #include <Asclin/Asc/IfxAsclin_Asc.h>
56 * \endcode
57 *
58 * \subsection IfxLld_Asclin_Asc_Variables Variables
59 *
60 * Declare the ASC handle and the FIFOs as global variables in your C code:
61 *
62 * \code
63 * // used globally
64 * static IfxAsclin_Asc asc;
65 *
66 * #define ASC_TX_BUFFER_SIZE 64
67 * static uint8 ascTxBuffer[ASC_TX_BUFFER_SIZE + sizeof(Ifx_Fifo) + 8];
68 *
69 * #define ASC_RX_BUFFER_SIZE 64
70 * static uint8 ascRxBuffer[ASC_RX_BUFFER_SIZE + sizeof(Ifx_Fifo) + 8];
71 * \endcode
72 *
73 * As you can see above, the transfer buffers allocate not only memory for the data itself, but also for FIFO runtime variables. 8 bytes have to be added to ensure a proper circular buffer handling independent from the address to which the buffers have been located.
74 *
75 * \subsection IfxLld_Asclin_Asc_Interrupt Interrupt Handler Installation
76 *
77 * See also \ref IfxLld_Cpu_Irq_Usage
78 *
79 * Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:
80 * \code
81 * // priorities are normally defined in Ifx_IntPrioDef.h
82 * #define IFX_INTPRIO_ASCLIN0_TX 1
83 * #define IFX_INTPRIO_ASCLIN0_RX 2
84 * #define IFX_INTPRIO_ASCLIN0_ER 3
85 * \endcode
86 *
87 * Add the interrupt service routines to your C code. They have to call the ASC interrupt handlers by passing the asc handle:
88 * \code
89 * IFX_INTERRUPT(asclin0TxISR, 0, IFX_INTPRIO_ASCLIN0_TX)
90 * {
91 * IfxAsclin_Asc_isrTransmit(&asc);
92 * }
93 *
94 * IFX_INTERRUPT(asclin0RxISR, 0, IFX_INTPRIO_ASCLIN0_RX)
95 * {
96 * IfxAsclin_Asc_isrReceive(&asc);
97 * }
98 *
99 * IFX_INTERRUPT(asclin0ErISR, 0, IFX_INTPRIO_ASCLIN0_ER)
100 * {
101 * IfxAsclin_Asc_isrError(&asc);
102 * }
103 * \endcode
104 *
105 * Finally install the interrupt handlers in your initialisation function:
106 * \code
107 * // install interrupt handlers
108 * IfxCpu_Irq_installInterruptHandler(&asclin0TxISR, IFX_INTPRIO_ASCLIN0_TX);
109 * IfxCpu_Irq_installInterruptHandler(&asclin0RxISR, IFX_INTPRIO_ASCLIN0_RX);
110 * IfxCpu_Irq_installInterruptHandler(&asclin0ErISR, IFX_INTPRIO_ASCLIN0_ER);
111 * IfxCpu_enableInterrupts();
112 * \endcode
113 *
114 * \subsection IfxLld_Asclin_Asc_Init Module Initialisation
115 *
116 * The module initialisation can be done in the same function. Here an example:
117 * \code
118 * // create module config
119 * IfxAsclin_Asc_Config ascConfig;
120 * IfxAsclin_Asc_initModuleConfig(&ascConfig, &MODULE_ASCLIN0);
121 *
122 * // set the desired baudrate
123 * ascConfig.baudrate.prescaler = 1;
124 * ascConfig.baudrate.baudrate = 1000000; // FDR values will be calculated in initModule
125 *
126 * // ISR priorities and interrupt target
127 * ascConfig.interrupt.txPriority = IFX_INTPRIO_ASCLIN0_TX;
128 * ascConfig.interrupt.rxPriority = IFX_INTPRIO_ASCLIN0_RX;
129 * ascConfig.interrupt.erPriority = IFX_INTPRIO_ASCLIN0_ER;
130 * ascConfig.interrupt.typeOfService = IfxCpu_Irq_getTos(IfxCpu_getCoreIndex());
131 *
132 * // FIFO configuration
133 * ascConfig.txBuffer = &ascTxBuffer;
134 * ascConfig.txBufferSize = ASC_TX_BUFFER_SIZE;
135 *
136 * ascConfig.rxBuffer = &ascRxBuffer;
137 * ascConfig.rxBufferSize = ASC_RX_BUFFER_SIZE;
138 *
139 * // pin configuration
140 * const IfxAsclin_Asc_Pins pins = {
141 * NULL, IfxPort_InputMode_pullUp, // CTS pin not used
142 * &IfxAsclin0_RXA_P14_1_IN, IfxPort_InputMode_pullUp, // Rx pin
143 * NULL, IfxPort_OutputMode_pushPull, // RTS pin not used
144 * &IfxAsclin0_TX_P14_0_OUT, IfxPort_OutputMode_pushPull, // Tx pin
145 * IfxPort_PadDriver_cmosAutomotiveSpeed1
146 * };
147 * ascConfig.pins = &pins;
148 *
149 * // initialize module
150 * //IfxAsclin_Asc asc; // defined globally
151 * IfxAsclin_Asc_initModule(&asc, &ascConfig);
152 * \endcode
153 *
154 * The ASC is ready for use now!
155 *
156 *
157 * \section IfxLld_Asclin_Asc_DataTransfers Data Transfers
158 *
159 * \subsection IfxLld_Asclin_Asc_DataSimple Simple Transfers
160 *
161 * The ASC driver provides simple to use transfer functions, which are blocking.
162 *
163 * This means: you can send as much data as you want without taking care for the fill state of the FIFO. If the FIFO is full, the blocking function will wait until the next byte has been transfered to ASCLIN before putting the new byte into the FIFO:
164 * \code
165 * // send 3 bytes
166 * IfxAsclin_Asc_blockingWrite(&asc, 0x01);
167 * IfxAsclin_Asc_blockingWrite(&asc, 0x02);
168 * IfxAsclin_Asc_blockingWrite(&asc, 0x03);
169 * \endcode
170 *
171 * A simple to use receive function is available as well. If no data is in the receive FIFO, it will wait until the next byte has been received:
172 * \code
173 * // receive a byte
174 * uint8 data = IfxAsclin_Asc_blockingRead(&asc);
175 * \endcode
176 *
177 *
178 * \subsection IfxLld_Asclin_Asc_DataStream Streamed Transfers
179 *
180 * Streamed transfers are handled faster by the ASC driver and therefore they are recommended whenever a large bulk of data should be sent. Here an example:
181 * \code
182 * uint8 txData[9] = { 0x49, 0x6e, 0x66, 0x69, 0x6e, 0x65, 0x6f, 0x6e, 0x0a };
183 * {
184 * Ifx_SizeT count = 9;
185 * IfxAsclin_Asc_write(&asc, txData, &count, TIME_INFINITE);
186 * }
187 * \endcode
188 *
189 *
190 * Data can be received the following way:
191 * \code
192 * uint8 rxData[5];
193 *
194 * {
195 * // wait until 5 bytes have been received
196 * Ifx_SizeT count = 5;
197 * IfxAsclin_Asc_read(&asc, rxData, &count, TIME_INFINITE);
198 * }
199 * \endcode
200 *
201 * Or alternatively with:
202 * \code
203 * uint8 rxData[5];
204 *
205 * {
206 * // how many bytes have been received?
207 * Ifx_SizeT count = IfxAsclin_Asc_getReadCount(&asc);
208 *
209 * // limit to our buffer size
210 * count = count < 5 ? count : 5;
211 *
212 * // transfer received data into buffer
213 * IfxAsclin_Asc_read(&asc, rxData, &count, TIME_INFINITE);
214 * }
215 * \endcode
216 *
217 * \defgroup IfxLld_Asclin_Asc ASC
218 * \ingroup IfxLld_Asclin
219 * \defgroup IfxLld_Asclin_Asc_DataStructures Data Structures
220 * \ingroup IfxLld_Asclin_Asc
221 * \defgroup IfxLld_Asclin_Asc_InterruptFunctions Interrupt Functions
222 * \ingroup IfxLld_Asclin_Asc
223 * \defgroup IfxLld_Asclin_Asc_SimpleCom Simple Communication
224 * \ingroup IfxLld_Asclin_Asc
225 * \defgroup IfxLld_Asclin_Asc_StreamCom Stream based Communication (STDIO)
226 * \ingroup IfxLld_Asclin_Asc
227 * \defgroup IfxLld_Asclin_Asc_ModuleFunctions Module Functions
228 * \ingroup IfxLld_Asclin_Asc
229 */
230
231 #ifndef IFXASCLIN_ASC_H
232 #define IFXASCLIN_ASC_H 1
233
234 /******************************************************************************/
235 /*----------------------------------Includes----------------------------------*/
236 /******************************************************************************/
237
238 #include "Asclin/Std/IfxAsclin.h"
239 #include "_Lib/DataHandling/Ifx_Fifo.h"
240 #include "Stm/Std/IfxStm.h"
241 #include "StdIf/IfxStdIf_DPipe.h"
242
243 /******************************************************************************/
244 /*-----------------------------Data Structures--------------------------------*/
245 /******************************************************************************/
246
247 /** \brief Structure for Error Flags
248 */
249 typedef struct
250 {
251 uint8 parityError : 1; /**< \brief parity error */
252 uint8 frameError : 1; /**< \brief transmit complete/pending error */
253 uint8 rxFifoOverflow : 1; /**< \brief receive FIFO overflow error */
254 uint8 rxFifoUnderflow : 1; /**< \brief receive FIFO underflow error */
255 uint8 txFifoOverflow : 1; /**< \brief transmit FIFO overflow error */
256 } IfxAsclin_Asc_ErrorFlags;
257
258 /** \addtogroup IfxLld_Asclin_Asc_DataStructures
259 * \{ */
260 /** \brief Structure for baudrate
261 */
262 typedef struct
263 {
264 float32 baudrate; /**< \brief value of the required baudrate */
265 uint16 prescaler; /**< \brief BITCON.PRESCALER, the division ratio of the predevider */
266 IfxAsclin_OversamplingFactor oversampling; /**< \brief BITCON.OVERSAMPLING, division ratio of the baudrate post devider */
267 } IfxAsclin_Asc_BaudRate;
268
269 /** \brief Structure for bit timings
270 */
271 typedef struct
272 {
273 IfxAsclin_SamplesPerBit medianFilter; /**< \brief BITCON.SM, number of samples per bit (1 or 3), sample mode/median filter */
274 IfxAsclin_SamplePointPosition samplePointPosition; /**< \brief BITCON.SAMPLEPOINT, sample point position */
275 } IfxAsclin_Asc_BitTimingControl;
276
277 /** \brief Structure for FIFO control
278 */
279 typedef struct
280 {
281 IfxAsclin_TxFifoInletWidth inWidth; /**< \brief TXFIFOCON.INW, transmit FIFO inlet width */
282 IfxAsclin_RxFifoOutletWidth outWidth; /**< \brief RXFIFOCON.OTW, receive FIFO oulet width */
283 IfxAsclin_TxFifoInterruptLevel txFifoInterruptLevel; /**< \brief TXFIFOCON.INTLEVEL, Tx FIFO interrupt level */
284 IfxAsclin_RxFifoInterruptLevel rxFifoInterruptLevel; /**< \brief RXFIFOCON.INTLEVEL, Rx FIFO interrupt level */
285 IfxAsclin_ReceiveBufferMode buffMode; /**< \brief RXFIFOCON.BUFF, receive buffer mode (Rx FIFO or Rx buffer) */
286 IfxAsclin_FifoInterruptMode txFifoInterruptMode; /**< \brief TXFIFOCON.FM, Tx FIFO interrupt generation mode */
287 IfxAsclin_FifoInterruptMode rxFifoInterruptMode; /**< \brief RXFIFOCON.FM, Rx FIFO interrupt generation mode */
288 } IfxAsclin_Asc_FifoControl;
289
290 /** \brief Structure for frame control
291 */
292 typedef struct
293 {
294 IfxAsclin_IdleDelay idleDelay; /**< \brief FRAMECON.IDLE, idle delay */
295 IfxAsclin_StopBit stopBit; /**< \brief FRAMECON.STOP, number of stop bits */
296 IfxAsclin_FrameMode frameMode; /**< \brief FRAMECON.MODE, mode of operation of the module */
297 IfxAsclin_ShiftDirection shiftDir; /**< \brief FRAMECON.MSB, shift direction */
298 IfxAsclin_ParityType parityType; /**< \brief FRAMECON.ODD, parity type (even or odd) */
299 IfxAsclin_DataLength dataLength; /**< \brief DATCON.DATALENGTH, data length, number of bits per transfer */
300 boolean parityBit; /**< \brief FRAMECON.PEN, parity enable */
301 } IfxAsclin_Asc_FrameControl;
302
303 /** \brief Structure for interrupt configuration
304 */
305 typedef struct
306 {
307 uint16 txPriority; /**< \brief transmit interrupt priority */
308 uint16 rxPriority; /**< \brief receive interrupt priority */
309 uint16 erPriority; /**< \brief error interrupt priority */
310 IfxSrc_Tos typeOfService; /**< \brief type of interrupt service */
311 } IfxAsclin_Asc_InterruptConfig;
312
313 /** \brief Structure for ASC pin configuration
314 */
315 typedef struct
316 {
317 IFX_CONST IfxAsclin_Cts_In *cts; /**< \brief ASC clear to send (CTS) pin */
318 IfxPort_InputMode ctsMode; /**< \brief Cts pin as input */
319 IFX_CONST IfxAsclin_Rx_In *rx; /**< \brief ASC Rx pin */
320 IfxPort_InputMode rxMode; /**< \brief Rx pin as input */
321 IFX_CONST IfxAsclin_Rts_Out *rts; /**< \brief ASC (request to send) RTS pin */
322 IfxPort_OutputMode rtsMode; /**< \brief Rts as output */
323 IFX_CONST IfxAsclin_Tx_Out *tx; /**< \brief ASC Tx pin */
324 IfxPort_OutputMode txMode; /**< \brief Tx as output */
325 IfxPort_PadDriver pinDriver; /**< \brief pad driver */
326 } IfxAsclin_Asc_Pins;
327
328 /** \} */
329
330 /** \brief This union contains the error flags. In addition it allows to write and read to/from all flags as once via the ALL member.
331 */
332 typedef union
333 {
334 uint8 ALL;
335 IfxAsclin_Asc_ErrorFlags flags;
336 } IfxAsclin_Asc_ErrorFlagsUnion;
337
338 /** \addtogroup IfxLld_Asclin_Asc_DataStructures
339 * \{ */
340 /** \brief Module Handle
341 */
342 typedef struct
343 {
344 Ifx_ASCLIN *asclin; /**< \brief pointer to ASCLIN registers */
345 Ifx_Fifo *tx; /**< \brief Transmit FIFO buffer */
346 Ifx_Fifo *rx; /**< \brief Receive FIFO buffer */
347 volatile boolean txInProgress; /**< \brief Ongoing transfer. Will be set by IfxAsclin_Asc_initiateTransmission, and cleared by IfxAsclin_Asc_isrTransmit */
348 volatile boolean rxSwFifoOverflow; /**< \brief Will be set by IfxAsclin_Asc_isrReceive if the SW Fifo overflowed */
349 IfxAsclin_Asc_ErrorFlagsUnion errorFlags; /**< \brief error reported by ASCLIN during runtime (written by IfxAsclin_Asc_isrError) */
350 Ifx_DataBufferMode dataBufferMode; /**< \brief Rx buffer mode */
351 volatile uint32 sendCount; /**< \brief Number of byte that are send out, this value is reset with the function Asc_If_resetSendCount() */
352 volatile Ifx_TickTime txTimestamp; /**< \brief Time stamp of the latest send byte */
353 } IfxAsclin_Asc;
354
355 /** \brief Configuration structure of the module
356 */
357 typedef struct
358 {
359 Ifx_ASCLIN *asclin; /**< \brief pointer to ASCLIN registers */
360 IfxAsclin_Asc_BaudRate baudrate; /**< \brief structure for baudrate */
361 IfxAsclin_Asc_BitTimingControl bitTiming; /**< \brief structure for bit timings */
362 IfxAsclin_Asc_FrameControl frame; /**< \brief structure for frame control */
363 IfxAsclin_Asc_FifoControl fifo; /**< \brief structure for FIFO control */
364 IfxAsclin_Asc_InterruptConfig interrupt; /**< \brief structure for interrupt configuration */
365 IFX_CONST IfxAsclin_Asc_Pins *pins; /**< \brief structure for ASC pins */
366 IfxAsclin_ClockSource clockSource; /**< \brief CSR.CLKSEL, clock source selection */
367 IfxAsclin_Asc_ErrorFlagsUnion errorFlags; /**< \brief structure for error flags */
368 Ifx_SizeT txBufferSize; /**< \brief Size of the tx buffer */
369 void *txBuffer; /**< \brief The buffer parameter must point on a free memory location where the buffer object will be Initialised.
370 *
371 * The Size of this area must be at least equals to "txBufferSize + sizeof(Ifx_Fifo) + 8". Not tacking this in account may result in unpredictable behavior.
372 *
373 * If set to NULL_PTR, the buffer will be allocated dynamically according to txBufferSize */
374 Ifx_SizeT rxBufferSize; /**< \brief Size of the rx buffer */
375 void *rxBuffer; /**< \brief The buffer parameter must point on a free memory location where the buffer object will be Initialised.
376 *
377 * The Size of this area must be at least equals to "rxBufferSize + sizeof(Ifx_Fifo) + 8". Not tacking this in account may result in unpredictable behavior.
378 *
379 * If set to NULL, the buffer will be allocated dynamically according to rxBufferSize */
380 boolean loopBack; /**< \brief IOCR.LB, loop back mode selection, 0 for disable, 1 for enable */
381 Ifx_DataBufferMode dataBufferMode; /**< \brief Rx buffer mode */
382 } IfxAsclin_Asc_Config;
383
384 /** \} */
385
386 /** \addtogroup IfxLld_Asclin_Asc_InterruptFunctions
387 * \{ */
388
389 /******************************************************************************/
390 /*-------------------------Global Function Prototypes-------------------------*/
391 /******************************************************************************/
392
393 /** \brief ISR error routine.
394 * \see IfxSdtIf_DPipe_OnError
395 *
396 * Currently it only stores error flags in the handle (asclin->errorFlags) whenever an error happened.
397 * The user software could react on these flags, e.g. it could re-initialize the module.
398 * \param asclin module handler
399 * \return None
400 */
401 IFX_EXTERN void IfxAsclin_Asc_isrError(IfxAsclin_Asc *asclin);
402
403 /** \brief ISR receive routine
404 * \see IfxSdtIf_DPipe_OnReceive
405 * \param asclin module handler
406 * \return None
407 */
408 IFX_EXTERN void IfxAsclin_Asc_isrReceive(IfxAsclin_Asc *asclin);
409
410 /** \brief ISR transmit routine
411 * \see IfxSdtIf_DPipe_OnTransmit
412 * \param asclin module handler
413 * \return None
414 */
415 IFX_EXTERN void IfxAsclin_Asc_isrTransmit(IfxAsclin_Asc *asclin);
416
417 /** \} */
418
419 /** \addtogroup IfxLld_Asclin_Asc_SimpleCom
420 * \{ */
421
422 /******************************************************************************/
423 /*-------------------------Global Function Prototypes-------------------------*/
424 /******************************************************************************/
425
426 /** \brief Reads data from the Rx FIFO
427 * \param asclin module handle
428 * \return number of received data words
429 *
430 * A coding example can be found in \ref IfxLld_Asclin_Asc_Usage
431 *
432 */
433 IFX_EXTERN uint8 IfxAsclin_Asc_blockingRead(IfxAsclin_Asc *asclin);
434
435 /** \brief Writes data into the Tx FIFO
436 * \param asclin module handle
437 * \param data the data byte which should be sent
438 * \return Returns TRUE if data could be written
439 *
440 * A coding example can be found in \ref IfxLld_Asclin_Asc_Usage
441 *
442 */
443 IFX_EXTERN boolean IfxAsclin_Asc_blockingWrite(IfxAsclin_Asc *asclin, uint8 data);
444
445 /** \} */
446
447 /** \addtogroup IfxLld_Asclin_Asc_StreamCom
448 * \{ */
449
450 /******************************************************************************/
451 /*-------------------------Global Function Prototypes-------------------------*/
452 /******************************************************************************/
453
454 /** \brief \see IfxStdIf_DPipe_CanReadCount
455 * \param asclin module handle
456 * \param count Count of data which should be checked (in bytes)
457 * \param timeout in system timer ticks
458 * \return Returns TRUE if at least count bytes are available for read in the rx buffer, if not the Event is armed to be set when the buffer count is bigger or equal to the requested count.
459 */
460 IFX_EXTERN boolean IfxAsclin_Asc_canReadCount(IfxAsclin_Asc *asclin, Ifx_SizeT count, Ifx_TickTime timeout);
461
462 /** \brief \see IfxStdIf_DPipe_CanWriteCount
463 * \param asclin module handle
464 * \param count Count of data which should be checked (in bytes)
465 * \param timeout in system timer ticks
466 * \return Returns TRUE if at least count bytes can be written to the tx buffer, if not the Event is armed to be set when the buffer free count is bigger or equal to the requested count
467 */
468 IFX_EXTERN boolean IfxAsclin_Asc_canWriteCount(IfxAsclin_Asc *asclin, Ifx_SizeT count, Ifx_TickTime timeout);
469
470 /** \brief \see IfxStdIf_DPipe_ClearRx
471 * \param asclin module handle
472 * \return None
473 */
474 IFX_EXTERN void IfxAsclin_Asc_clearRx(IfxAsclin_Asc *asclin);
475
476 /** \brief \see IfxStdIf_DPipe_ClearTx
477 * \param asclin module handle
478 * \return None
479 */
480 IFX_EXTERN void IfxAsclin_Asc_clearTx(IfxAsclin_Asc *asclin);
481
482 /** \brief \see IfxStdIf_DPipe_FlushTx
483 * \param asclin module handle
484 * \param timeout in system timer ticks
485 * \return Returns TRUE if the FIFO is empty
486 */
487 IFX_EXTERN boolean IfxAsclin_Asc_flushTx(IfxAsclin_Asc *asclin, Ifx_TickTime timeout);
488
489 /** \brief \see IfxStdIf_DPipe_GetReadCount
490 * \param asclin module handle
491 * \return The number of bytes in the rx buffer
492 */
493 IFX_EXTERN sint32 IfxAsclin_Asc_getReadCount(IfxAsclin_Asc *asclin);
494
495 /** \brief \see IIfxStdIf_DPipe_GetReadEvent
496 * \param asclin module handle
497 * \return Read event object
498 */
499 IFX_EXTERN IfxStdIf_DPipe_ReadEvent IfxAsclin_Asc_getReadEvent(IfxAsclin_Asc *asclin);
500
501 /** \brief \see IfxStdIf_DPipe_GetSendCount
502 * \param asclin module handle
503 * \return number of bytes send
504 */
505 IFX_EXTERN uint32 IfxAsclin_Asc_getSendCount(IfxAsclin_Asc *asclin);
506
507 /** \brief \see IfxStdIf_DPipe_GetTxTimeStamp
508 * \param asclin module handle
509 * \return Time in ticks
510 */
511 IFX_EXTERN Ifx_TickTime IfxAsclin_Asc_getTxTimeStamp(IfxAsclin_Asc *asclin);
512
513 /** \brief \see IfxStdIf_DPipe_GetWriteCount
514 * \param asclin module handle
515 * \return The number of free bytes in the tx buffer
516 */
517 IFX_EXTERN sint32 IfxAsclin_Asc_getWriteCount(IfxAsclin_Asc *asclin);
518
519 /** \brief \see IIfxStdIf_DPipe_GetWriteEvent
520 * \param asclin module handle
521 * \return Write event object
522 */
523 IFX_EXTERN IfxStdIf_DPipe_WriteEvent IfxAsclin_Asc_getWriteEvent(IfxAsclin_Asc *asclin);
524
525 /** \brief \see IfxStdIf_DPipe_Read
526 * \param asclin module handle
527 * \param data Pointer to the start of data
528 * \param count Pointer to the count of data (in bytes).
529 * \param timeout in system timer ticks
530 * \return Returns TRUE if all items could be read\n
531 * Returns FALSE if not all the items could be read
532 *
533 * A coding example can be found in \ref IfxLld_Asclin_Asc_Usage
534 *
535 */
536 IFX_EXTERN boolean IfxAsclin_Asc_read(IfxAsclin_Asc *asclin, void *data, Ifx_SizeT *count, Ifx_TickTime timeout);
537
538 /** \brief \see IfxStdIf_DPipe_ResetSendCount
539 * \param asclin module handle
540 * \return None
541 */
542 IFX_EXTERN void IfxAsclin_Asc_resetSendCount(IfxAsclin_Asc *asclin);
543
544 /** \brief \see IfxStdIf_DPipe_Write
545 * \param asclin module handle
546 * \param data Pointer to the start of data
547 * \param count Pointer to the count of data (in bytes).
548 * \param timeout in system timer ticks
549 * \return Returns TRUE if all items could be written\n
550 * Returns FALSE if not all the items could be written
551 *
552 * A coding example can be found in \ref IfxLld_Asclin_Asc_Usage
553 *
554 */
555 IFX_EXTERN boolean IfxAsclin_Asc_write(IfxAsclin_Asc *asclin, const void *data, Ifx_SizeT *count, Ifx_TickTime timeout);
556
557 /** \} */
558
559 /** \addtogroup IfxLld_Asclin_Asc_ModuleFunctions
560 * \{ */
561
562 /******************************************************************************/
563 /*-------------------------Global Function Prototypes-------------------------*/
564 /******************************************************************************/
565
566 /** \brief Disables the module
567 * \param asclin module handle
568 * \return None
569 */
570 IFX_EXTERN void IfxAsclin_Asc_disableModule(IfxAsclin_Asc *asclin);
571
572 /** \brief Initialises the module
573 * \param asclin module handle
574 * \param config predefined configuration structure of the module
575 * \return Status
576 *
577 * A coding example can be found in \ref IfxLld_Asclin_Asc_Usage
578 *
579 */
580 IFX_EXTERN IfxAsclin_Status IfxAsclin_Asc_initModule(IfxAsclin_Asc *asclin, const IfxAsclin_Asc_Config *config);
581
582 /** \brief Fills the config structure with default values
583 * \param config configuration structure of the module
584 * \param asclin pointer to ASCLIN registers
585 * \return None
586 *
587 * A coding example can be found in \ref IfxLld_Asclin_Asc_Usage
588 *
589 */
590 IFX_EXTERN void IfxAsclin_Asc_initModuleConfig(IfxAsclin_Asc_Config *config, Ifx_ASCLIN *asclin);
591
592 /** \} */
593
594 /******************************************************************************/
595 /*-------------------------Global Function Prototypes-------------------------*/
596 /******************************************************************************/
597
598 /** \brief Initiate the data transmission
599 * \param asclin module handle
600 * \return None
601 *
602 * A coding example can be found in \ref IfxLld_Asclin_Asc_Usage
603 *
604 */
605 IFX_EXTERN void IfxAsclin_Asc_initiateTransmission(IfxAsclin_Asc *asclin);
606
607 /** \brief Initialize the standard interface to the device driver
608 * \param stdif standard interface object, will be initialized by the function
609 * \param asclin device driver object used by the standard interface. must be initialised separately
610 * \return TRUE on success, else FALSE
611 */
612 IFX_EXTERN boolean IfxAsclin_Asc_stdIfDPipeInit(IfxStdIf_DPipe *stdif, IfxAsclin_Asc *asclin);
613
614 #endif /* IFXASCLIN_ASC_H */
IfxAsclin_Asc_Config::baudrate
IfxAsclin_Asc_BaudRate baudrate
structure for baudrate
Definition: IfxAsclin_Asc.h:360
IfxAsclin_Asc_Config::rxBufferSize
Ifx_SizeT rxBufferSize
Size of the rx buffer.
Definition: IfxAsclin_Asc.h:374
IfxAsclin_Cts_In
CTS pin mapping structure.
Definition: IfxAsclin_PinMap.h:56
IfxAsclin_Asc_isrError
IFX_EXTERN void IfxAsclin_Asc_isrError(IfxAsclin_Asc *asclin)
ISR error routine.
Definition: IfxAsclin_Asc.c:437
IfxAsclin_Asc_FifoControl::rxFifoInterruptMode
IfxAsclin_FifoInterruptMode rxFifoInterruptMode
RXFIFOCON.FM, Rx FIFO interrupt generation mode.
Definition: IfxAsclin_Asc.h:287
IfxAsclin_Asc_getReadCount
IFX_EXTERN sint32 IfxAsclin_Asc_getReadCount(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:130
Ifx_TickTime
sint64 Ifx_TickTime
Time in ticks.
Definition: Ifx_Types.h:76
IfxAsclin_Tx_Out
TX pin mapping structure.
Definition: IfxAsclin_PinMap.h:96
IfxAsclin_Asc_Config::frame
IfxAsclin_Asc_FrameControl frame
structure for frame control
Definition: IfxAsclin_Asc.h:362
IfxAsclin_ReceiveBufferMode
IfxAsclin_ReceiveBufferMode
Receive buffer mode Definition in Ifx_ASCLIN.RXFIFOCON.B.BUF.
Definition: IfxAsclin.h:263
Ifx_DataBufferMode
Ifx_DataBufferMode
Definition: Ifx_Types.h:161
IfxStdIf_DPipe_
Standard interface object.
Definition: IfxStdIf_DPipe.h:230
IfxStm.h
STM basic functionality.
IfxAsclin_Asc_getWriteEvent
IFX_EXTERN IfxStdIf_DPipe_WriteEvent IfxAsclin_Asc_getWriteEvent(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:160
IfxAsclin_Asc_Config::rxBuffer
void * rxBuffer
The buffer parameter must point on a free memory location where the buffer object will be Initialised...
Definition: IfxAsclin_Asc.h:375
IfxAsclin_Asc
Module Handle.
Definition: IfxAsclin_Asc.h:342
IfxAsclin_Asc_BitTimingControl::medianFilter
IfxAsclin_SamplesPerBit medianFilter
BITCON.SM, number of samples per bit (1 or 3), sample mode/median filter.
Definition: IfxAsclin_Asc.h:273
IfxAsclin_Asc_getTxTimeStamp
IFX_EXTERN Ifx_TickTime IfxAsclin_Asc_getTxTimeStamp(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:148
IfxAsclin_Asc_Config::clockSource
IfxAsclin_ClockSource clockSource
CSR.CLKSEL, clock source selection.
Definition: IfxAsclin_Asc.h:366
IfxAsclin_SamplesPerBit
IfxAsclin_SamplesPerBit
Number of samples per bit, sample mode/medianfilter Definition in Ifx_ASCLIN.BITCON.B.SM.
Definition: IfxAsclin.h:352
IfxAsclin_Asc_initModule
IFX_EXTERN IfxAsclin_Status IfxAsclin_Asc_initModule(IfxAsclin_Asc *asclin, const IfxAsclin_Asc_Config *config)
Initialises the module.
Definition: IfxAsclin_Asc.c:166
IfxAsclin_Asc_getSendCount
IFX_EXTERN uint32 IfxAsclin_Asc_getSendCount(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:142
IfxAsclin_Asc_getReadEvent
IFX_EXTERN IfxStdIf_DPipe_ReadEvent IfxAsclin_Asc_getReadEvent(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:136
IfxAsclin_Asc_FifoControl::inWidth
IfxAsclin_TxFifoInletWidth inWidth
TXFIFOCON.INW, transmit FIFO inlet width.
Definition: IfxAsclin_Asc.h:281
IfxAsclin_Asc_FifoControl::txFifoInterruptLevel
IfxAsclin_TxFifoInterruptLevel txFifoInterruptLevel
TXFIFOCON.INTLEVEL, Tx FIFO interrupt level.
Definition: IfxAsclin_Asc.h:283
IfxAsclin_Asc_Pins::cts
IFX_CONST IfxAsclin_Cts_In * cts
ASC clear to send (CTS) pin.
Definition: IfxAsclin_Asc.h:317
IfxAsclin_RxFifoOutletWidth
IfxAsclin_RxFifoOutletWidth
Defines the number of bytes read from the Rx FIFO with one FPI bus read Definition in Ifx_ASCLIN...
Definition: IfxAsclin.h:304
IfxAsclin_Asc_isrReceive
IFX_EXTERN void IfxAsclin_Asc_isrReceive(IfxAsclin_Asc *asclin)
ISR receive routine.
Definition: IfxAsclin_Asc.c:474
IfxAsclin_Asc_BaudRate::baudrate
float32 baudrate
value of the required baudrate
Definition: IfxAsclin_Asc.h:264
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:140
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxAsclin_Asc_stdIfDPipeInit
IFX_EXTERN boolean IfxAsclin_Asc_stdIfDPipeInit(IfxStdIf_DPipe *stdif, IfxAsclin_Asc *asclin)
Initialize the standard interface to the device driver.
Definition: IfxAsclin_Asc.c:584
IfxAsclin_Asc_Config::fifo
IfxAsclin_Asc_FifoControl fifo
structure for FIFO control
Definition: IfxAsclin_Asc.h:363
IfxAsclin_Asc_ErrorFlags::parityError
uint8 parityError
parity error
Definition: IfxAsclin_Asc.h:251
float32
float float32
Definition: Platform_Types.h:170
IfxAsclin_Asc_getWriteCount
IFX_EXTERN sint32 IfxAsclin_Asc_getWriteCount(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:154
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
IfxAsclin_Asc_Pins::ctsMode
IfxPort_InputMode ctsMode
Cts pin as input.
Definition: IfxAsclin_Asc.h:318
IfxAsclin_StopBit
IfxAsclin_StopBit
ASC and LIN mode: number of stop bits (0 is not allowed), SPI mode: trailing delay. Definition in Ifx_ASCLIN.FRAMECON.B.STOP.
Definition: IfxAsclin.h:398
IfxAsclin_Asc_BaudRate::prescaler
uint16 prescaler
BITCON.PRESCALER, the division ratio of the predevider.
Definition: IfxAsclin_Asc.h:265
IfxAsclin_Asc::sendCount
volatile uint32 sendCount
Number of byte that are send out, this value is reset with the function Asc_If_resetSendCount() ...
Definition: IfxAsclin_Asc.h:351
IfxAsclin_Asc_InterruptConfig
Structure for interrupt configuration.
Definition: IfxAsclin_Asc.h:305
IfxAsclin_Asc_isrTransmit
IFX_EXTERN void IfxAsclin_Asc_isrTransmit(IfxAsclin_Asc *asclin)
ISR transmit routine.
Definition: IfxAsclin_Asc.c:516
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxAsclin_Asc_FrameControl::dataLength
IfxAsclin_DataLength dataLength
DATCON.DATALENGTH, data length, number of bits per transfer.
Definition: IfxAsclin_Asc.h:299
IfxAsclin_Asc_FifoControl::buffMode
IfxAsclin_ReceiveBufferMode buffMode
RXFIFOCON.BUFF, receive buffer mode (Rx FIFO or Rx buffer)
Definition: IfxAsclin_Asc.h:285
IfxAsclin_Asc_FifoControl::outWidth
IfxAsclin_RxFifoOutletWidth outWidth
RXFIFOCON.OTW, receive FIFO oulet width.
Definition: IfxAsclin_Asc.h:282
IfxAsclin_Asc_Config::interrupt
IfxAsclin_Asc_InterruptConfig interrupt
structure for interrupt configuration
Definition: IfxAsclin_Asc.h:364
IfxAsclin_RxFifoInterruptLevel
IfxAsclin_RxFifoInterruptLevel
Defines the filling level that triggers a drain (RX) interrupt or DMA access Definition in Ifx_ASCLIN...
Definition: IfxAsclin.h:281
IfxAsclin_Asc_ErrorFlagsUnion
This union contains the error flags. In addition it allows to write and read to/from all flags as onc...
Definition: IfxAsclin_Asc.h:332
IfxAsclin_Asc::errorFlags
IfxAsclin_Asc_ErrorFlagsUnion errorFlags
error reported by ASCLIN during runtime (written by IfxAsclin_Asc_isrError)
Definition: IfxAsclin_Asc.h:349
IfxAsclin_Asc_Pins::pinDriver
IfxPort_PadDriver pinDriver
pad driver
Definition: IfxAsclin_Asc.h:325
IfxAsclin_TxFifoInterruptLevel
IfxAsclin_TxFifoInterruptLevel
Defines the filling level that triggers a refill (TX) interrupt or DMA access Definition in Ifx_ASCLI...
Definition: IfxAsclin.h:433
IfxAsclin_Asc_BitTimingControl
Structure for bit timings.
Definition: IfxAsclin_Asc.h:271
IfxAsclin_Asc_InterruptConfig::typeOfService
IfxSrc_Tos typeOfService
type of interrupt service
Definition: IfxAsclin_Asc.h:310
IfxAsclin_Asc_BaudRate::oversampling
IfxAsclin_OversamplingFactor oversampling
BITCON.OVERSAMPLING, division ratio of the baudrate post devider.
Definition: IfxAsclin_Asc.h:266
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxAsclin_Asc::txInProgress
volatile boolean txInProgress
Ongoing transfer. Will be set by IfxAsclin_Asc_initiateTransmission, and cleared by IfxAsclin_Asc_isr...
Definition: IfxAsclin_Asc.h:347
IfxAsclin_Asc_Config::loopBack
boolean loopBack
IOCR.LB, loop back mode selection, 0 for disable, 1 for enable.
Definition: IfxAsclin_Asc.h:380
IfxAsclin_OversamplingFactor
IfxAsclin_OversamplingFactor
Defines the bit length in ticks in the range of 1 to 16. The lengths of 1 to 3 are not allowed Defini...
Definition: IfxAsclin.h:234
IfxAsclin_Asc_FrameControl::frameMode
IfxAsclin_FrameMode frameMode
FRAMECON.MODE, mode of operation of the module.
Definition: IfxAsclin_Asc.h:296
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
Ifx_Fifo.h
FIFO buffer functions.
IfxAsclin_Asc_BaudRate
Structure for baudrate.
Definition: IfxAsclin_Asc.h:262
IfxAsclin_Asc_Pins::rts
IFX_CONST IfxAsclin_Rts_Out * rts
ASC (request to send) RTS pin.
Definition: IfxAsclin_Asc.h:321
IfxAsclin_FrameMode
IfxAsclin_FrameMode
Defines the basic operating mode of the module. Changing the mode must be done by switching first to ...
Definition: IfxAsclin.h:163
IfxAsclin_IdleDelay
IfxAsclin_IdleDelay
Defines the duration of the IDLE delay in bit times. SPI mode: this is the idle time between the fram...
Definition: IfxAsclin.h:185
IfxAsclin_Rx_In
RX pin mapping structure.
Definition: IfxAsclin_PinMap.h:64
IfxAsclin_Asc_initiateTransmission
IFX_EXTERN void IfxAsclin_Asc_initiateTransmission(IfxAsclin_Asc *asclin)
Initiate the data transmission.
Definition: IfxAsclin_Asc.c:406
IfxAsclin_ClockSource
IfxAsclin_ClockSource
Selection of clock source Definition in Ifx_ASCLIN.CSR.B.CLKSEL.
Definition: IfxAsclin.h:109
IfxAsclin_DataLength
IfxAsclin_DataLength
Number of bits per transfer Definition in Ifx_ASCLIN.FRAMECON.B.DATALEN.
Definition: IfxAsclin.h:130
IfxAsclin_Asc_FifoControl::rxFifoInterruptLevel
IfxAsclin_RxFifoInterruptLevel rxFifoInterruptLevel
RXFIFOCON.INTLEVEL, Rx FIFO interrupt level.
Definition: IfxAsclin_Asc.h:284
IfxAsclin_Asc_blockingRead
IFX_EXTERN uint8 IfxAsclin_Asc_blockingRead(IfxAsclin_Asc *asclin)
Reads data from the Rx FIFO.
Definition: IfxAsclin_Asc.c:53
IfxAsclin_Asc_FrameControl::idleDelay
IfxAsclin_IdleDelay idleDelay
FRAMECON.IDLE, idle delay.
Definition: IfxAsclin_Asc.h:294
IfxAsclin_Rts_Out
RTS pin mapping structure.
Definition: IfxAsclin_PinMap.h:72
IfxAsclin_Asc::asclin
Ifx_ASCLIN * asclin
pointer to ASCLIN registers
Definition: IfxAsclin_Asc.h:344
IfxAsclin_Asc_Pins::rxMode
IfxPort_InputMode rxMode
Rx pin as input.
Definition: IfxAsclin_Asc.h:320
IfxAsclin_Asc_Pins::txMode
IfxPort_OutputMode txMode
Tx as output.
Definition: IfxAsclin_Asc.h:324
_Fifo
Definition: Ifx_Fifo.h:70
IfxAsclin_Asc_Config::bitTiming
IfxAsclin_Asc_BitTimingControl bitTiming
structure for bit timings
Definition: IfxAsclin_Asc.h:361
IfxAsclin_SamplePointPosition
IfxAsclin_SamplePointPosition
Sample point position Definition in Ifx_ASCLIN.BITCON.B.SAMPLEPOINT.
Definition: IfxAsclin.h:330
IfxAsclin_Asc_resetSendCount
IFX_EXTERN void IfxAsclin_Asc_resetSendCount(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:578
IfxAsclin_Asc_Config::pins
IFX_CONST IfxAsclin_Asc_Pins * pins
structure for ASC pins
Definition: IfxAsclin_Asc.h:365
IfxAsclin_FifoInterruptMode
IfxAsclin_FifoInterruptMode
Defines the interrupt generation modes of Tx FIFO and Rx FIFO Definition in Ifx_ASCLIN.RXFIFOCON.B.FM and Ifx_ASCLIN.TXFIFOCON.B.FM.
Definition: IfxAsclin.h:153
IfxAsclin_Asc_BitTimingControl::samplePointPosition
IfxAsclin_SamplePointPosition samplePointPosition
BITCON.SAMPLEPOINT, sample point position.
Definition: IfxAsclin_Asc.h:274
IfxAsclin_Asc_ErrorFlags
Structure for Error Flags.
Definition: IfxAsclin_Asc.h:249
IfxAsclin_Asc_clearRx
IFX_EXTERN void IfxAsclin_Asc_clearRx(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:85
IfxAsclin_Asc_Config
Configuration structure of the module.
Definition: IfxAsclin_Asc.h:357
IfxAsclin_Asc::tx
Ifx_Fifo * tx
Transmit FIFO buffer.
Definition: IfxAsclin_Asc.h:345
IfxStdIf_DPipe.h
Standard interface: Data Pipe.
IfxAsclin_Asc_FrameControl
Structure for frame control.
Definition: IfxAsclin_Asc.h:292
IfxAsclin_Asc_InterruptConfig::txPriority
uint16 txPriority
transmit interrupt priority
Definition: IfxAsclin_Asc.h:307
IfxAsclin_Asc_ErrorFlagsUnion::flags
IfxAsclin_Asc_ErrorFlags flags
Definition: IfxAsclin_Asc.h:335
IfxAsclin_TxFifoInletWidth
IfxAsclin_TxFifoInletWidth
Defines the number of bytes written to the Tx FIFO with one FPI bus write Definition in Ifx_ASCLIN...
Definition: IfxAsclin.h:422
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:151
IfxAsclin_Asc_canWriteCount
IFX_EXTERN boolean IfxAsclin_Asc_canWriteCount(IfxAsclin_Asc *asclin, Ifx_SizeT count, Ifx_TickTime timeout)
Definition: IfxAsclin_Asc.c:79
IfxAsclin_Asc_initModuleConfig
IFX_EXTERN void IfxAsclin_Asc_initModuleConfig(IfxAsclin_Asc_Config *config, Ifx_ASCLIN *asclin)
Fills the config structure with default values.
Definition: IfxAsclin_Asc.c:351
IfxAsclin_Asc_write
IFX_EXTERN boolean IfxAsclin_Asc_write(IfxAsclin_Asc *asclin, const void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Definition: IfxAsclin_Asc.c:613
IfxAsclin_Asc_FrameControl::shiftDir
IfxAsclin_ShiftDirection shiftDir
FRAMECON.MSB, shift direction.
Definition: IfxAsclin_Asc.h:297
IfxAsclin_Asc_ErrorFlags::rxFifoUnderflow
uint8 rxFifoUnderflow
receive FIFO underflow error
Definition: IfxAsclin_Asc.h:254
IfxAsclin_Asc_FifoControl
Structure for FIFO control.
Definition: IfxAsclin_Asc.h:279
IfxAsclin_Asc_FrameControl::parityType
IfxAsclin_ParityType parityType
FRAMECON.ODD, parity type (even or odd)
Definition: IfxAsclin_Asc.h:298
IfxAsclin_Asc_Pins::rx
IFX_CONST IfxAsclin_Rx_In * rx
ASC Rx pin.
Definition: IfxAsclin_Asc.h:319
IfxAsclin_Asc_flushTx
IFX_EXTERN boolean IfxAsclin_Asc_flushTx(IfxAsclin_Asc *asclin, Ifx_TickTime timeout)
Definition: IfxAsclin_Asc.c:109
IfxAsclin_Asc_ErrorFlags::txFifoOverflow
uint8 txFifoOverflow
transmit FIFO overflow error
Definition: IfxAsclin_Asc.h:255
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxAsclin_Asc_FrameControl::parityBit
boolean parityBit
FRAMECON.PEN, parity enable.
Definition: IfxAsclin_Asc.h:300
IfxAsclin_Asc_Pins::rtsMode
IfxPort_OutputMode rtsMode
Rts as output.
Definition: IfxAsclin_Asc.h:322
IfxAsclin_Asc_ErrorFlagsUnion::ALL
uint8 ALL
Definition: IfxAsclin_Asc.h:334
IfxAsclin_Asc_InterruptConfig::erPriority
uint16 erPriority
error interrupt priority
Definition: IfxAsclin_Asc.h:309
IfxAsclin_Asc_Pins::tx
IFX_CONST IfxAsclin_Tx_Out * tx
ASC Tx pin.
Definition: IfxAsclin_Asc.h:323
IfxAsclin_Asc_clearTx
IFX_EXTERN void IfxAsclin_Asc_clearTx(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:92
IfxAsclin_ShiftDirection
IfxAsclin_ShiftDirection
SPI mode: defines the shift direction of the shift register. ASC and LIN mode: should be set to 0...
Definition: IfxAsclin.h:362
IfxAsclin_Asc_blockingWrite
IFX_EXTERN boolean IfxAsclin_Asc_blockingWrite(IfxAsclin_Asc *asclin, uint8 data)
Writes data into the Tx FIFO.
Definition: IfxAsclin_Asc.c:65
IfxAsclin_Asc_Config::txBuffer
void * txBuffer
The buffer parameter must point on a free memory location where the buffer object will be Initialised...
Definition: IfxAsclin_Asc.h:369
IfxAsclin_Asc_InterruptConfig::rxPriority
uint16 rxPriority
receive interrupt priority
Definition: IfxAsclin_Asc.h:308
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:81
sint32
long sint32
Definition: Platform_Types.h:134
IfxStdIf_DPipe_WriteEvent
volatile boolean * IfxStdIf_DPipe_WriteEvent
Definition: IfxStdIf_DPipe.h:70
IfxAsclin_Asc::txTimestamp
volatile Ifx_TickTime txTimestamp
Time stamp of the latest send byte.
Definition: IfxAsclin_Asc.h:352
IfxAsclin_Asc_FrameControl::stopBit
IfxAsclin_StopBit stopBit
FRAMECON.STOP, number of stop bits.
Definition: IfxAsclin_Asc.h:295
IfxAsclin_Asc_Config::txBufferSize
Ifx_SizeT txBufferSize
Size of the tx buffer.
Definition: IfxAsclin_Asc.h:368
IfxAsclin_Asc_Pins
Structure for ASC pin configuration.
Definition: IfxAsclin_Asc.h:315
IfxAsclin_Asc_FifoControl::txFifoInterruptMode
IfxAsclin_FifoInterruptMode txFifoInterruptMode
TXFIFOCON.FM, Tx FIFO interrupt generation mode.
Definition: IfxAsclin_Asc.h:286
IfxAsclin_ParityType
IfxAsclin_ParityType
Type of parity bit attached to data bits Definition in Ifx_ASCLIN.FRAMECON.B.ODD. ...
Definition: IfxAsclin.h:254
IfxAsclin_Asc::rxSwFifoOverflow
volatile boolean rxSwFifoOverflow
Will be set by IfxAsclin_Asc_isrReceive if the SW Fifo overflowed.
Definition: IfxAsclin_Asc.h:348
IfxAsclin_Asc_read
IFX_EXTERN boolean IfxAsclin_Asc_read(IfxAsclin_Asc *asclin, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Definition: IfxAsclin_Asc.c:568
IfxAsclin.h
ASCLIN basic functionality.
IfxAsclin_Asc::rx
Ifx_Fifo * rx
Receive FIFO buffer.
Definition: IfxAsclin_Asc.h:346
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxAsclin_Asc_ErrorFlags::frameError
uint8 frameError
transmit complete/pending error
Definition: IfxAsclin_Asc.h:252
IfxStdIf_DPipe_ReadEvent
volatile boolean * IfxStdIf_DPipe_ReadEvent
Definition: IfxStdIf_DPipe.h:71
IfxAsclin_Asc_disableModule
IFX_EXTERN void IfxAsclin_Asc_disableModule(IfxAsclin_Asc *asclin)
Disables the module.
Definition: IfxAsclin_Asc.c:99
IfxAsclin_Asc_ErrorFlags::rxFifoOverflow
uint8 rxFifoOverflow
receive FIFO overflow error
Definition: IfxAsclin_Asc.h:253
IfxAsclin_Status
IfxAsclin_Status
Error status.
Definition: IfxAsclin.h:389
IfxAsclin_Asc::dataBufferMode
Ifx_DataBufferMode dataBufferMode
Rx buffer mode.
Definition: IfxAsclin_Asc.h:350
IfxAsclin_Asc_canReadCount
IFX_EXTERN boolean IfxAsclin_Asc_canReadCount(IfxAsclin_Asc *asclin, Ifx_SizeT count, Ifx_TickTime timeout)
Definition: IfxAsclin_Asc.c:73


iLLD_TC38A: IfxAsclin_Lin.c Source File

  • Asclin
  • Lin
IfxAsclin_Lin.c
Go to the documentation of this file.
1 /**
2 * \file IfxAsclin_Lin.c
3 * \brief ASCLIN LIN details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 */
43
44 /******************************************************************************/
45 /*----------------------------------Includes----------------------------------*/
46 /******************************************************************************/
47
48 #include "IfxAsclin_Lin.h"
49
50 /******************************************************************************/
51 /*-------------------------Function Implementations---------------------------*/
52 /******************************************************************************/
53
54 void IfxAsclin_Lin_checkForReceivedHeaderFlags(IfxAsclin_Lin *asclin)
55 {
56 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
57
58 /* check Rx header end acknowledgement */
59 if (IfxAsclin_getRxHeaderEndFlagStatus(asclinSFR)) /* RHE flag*/
60 {
61 IfxAsclin_clearRxHeaderEndFlag(asclinSFR);
62 asclin->acknowledgmentFlags.rxHeaderEnd = 1;
63 }
64
65 /* check for Rx header error flags */
66 if (IfxAsclin_getHeaderTimeoutFlagStatus(asclinSFR)) /* HT flag*/
67 {
68 IfxAsclin_clearHeaderTimeoutFlag(asclinSFR);
69 asclin->errorFlagsStatus.headerTimeout = 1;
70 }
71
72 if (IfxAsclin_getCollisionDetectionErrorFlagStatus(asclinSFR)) /* CE flag*/
73 {
74 IfxAsclin_clearCollisionDetectionErrorFlag(asclinSFR);
75 asclin->errorFlagsStatus.collisionDetectionError = 1;
76 }
77
78 if (IfxAsclin_getFrameErrorFlagStatus(asclinSFR)) /* FE flag*/
79 {
80 IfxAsclin_clearFrameErrorFlag(asclinSFR);
81 asclin->errorFlagsStatus.frameError = 1;
82 }
83
84 if (IfxAsclin_getLinAutoBaudDetectionErrorFlagStatus(asclinSFR)) /* LA flag*/
85 {
86 IfxAsclin_clearLinAutoBaudDetectionErrorFlag(asclinSFR);
87 asclin->errorFlagsStatus.linAutobaudDetectionError = 1;
88 }
89
90 if (IfxAsclin_getLinParityErrorFlagStatus(asclinSFR)) /* LP flag*/
91 {
92 IfxAsclin_clearLinParityErrorFlag(asclinSFR);
93 asclin->errorFlagsStatus.linParityError = 1;
94 }
95 }
96
97
98 void IfxAsclin_Lin_checkForReceivedResponseFlags(IfxAsclin_Lin *asclin)
99 {
100 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
101
102 /* check Rx response end acknowledgement*/
103 if (IfxAsclin_getRxResponseEndFlagStatus(asclinSFR))
104 {
105 IfxAsclin_clearRxResponseEndFlag(asclinSFR);
106 asclin->acknowledgmentFlags.rxResponseEnd = 1;
107 }
108
109 /* check for Rx response error flags */
110 if (IfxAsclin_getRxFifoOverflowFlagStatus(asclinSFR)) /* RFO flag*/
111 {
112 IfxAsclin_clearRxFifoOverflowFlag(asclinSFR);
113 asclin->errorFlagsStatus.rxFifoOverflow = 1;
114 }
115
116 if (IfxAsclin_getCollisionDetectionErrorFlagStatus(asclinSFR)) /* CE flag*/
117 {
118 IfxAsclin_clearCollisionDetectionErrorFlag(asclinSFR);
119 asclin->errorFlagsStatus.collisionDetectionError = 1;
120 }
121
122 if (IfxAsclin_getFrameErrorFlagStatus(asclinSFR)) /* FE flag*/
123 {
124 IfxAsclin_clearFrameErrorFlag(asclinSFR);
125 asclin->errorFlagsStatus.frameError = 1;
126 }
127
128 if (IfxAsclin_getLinChecksumErrorFlagStatus(asclinSFR)) /* LC flag*/
129 {
130 IfxAsclin_clearLinChecksumErrorFlag(asclinSFR);
131 asclin->errorFlagsStatus.linChecksumError = 1;
132 }
133
134 if (IfxAsclin_getResponseTimeoutFlagStatus(asclinSFR)) /* RT flag*/
135 {
136 IfxAsclin_clearResponseTimeoutFlag(asclinSFR);
137 asclin->errorFlagsStatus.responseTimeout = 1;
138 }
139
140 if ((asclin->linMode == IfxAsclin_LinMode_slave) && (IfxAsclin_getBreakDetectedFlagStatus(asclinSFR))) /* BD flag only in slave mode*/
141 {
142 IfxAsclin_clearBreakDetectedFlag(asclinSFR);
143 asclin->errorFlagsStatus.breakDetected = 1;
144 }
145 }
146
147
148 void IfxAsclin_Lin_checkForTransmittedHeaderFlags(IfxAsclin_Lin *asclin)
149 {
150 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
151
152 /* check Tx header end acknowledgement */
153 if (IfxAsclin_getTxHeaderEndFlagStatus(asclinSFR)) /* THE flag*/
154 {
155 IfxAsclin_clearTxHeaderEndFlag(asclinSFR);
156 asclin->acknowledgmentFlags.txHeaderEnd = 1;
157 }
158
159 /* check for Tx header error flags */
160 if (IfxAsclin_getHeaderTimeoutFlagStatus(asclinSFR)) /* HT flag*/
161 {
162 IfxAsclin_clearHeaderTimeoutFlag(asclinSFR);
163 asclin->errorFlagsStatus.headerTimeout = 1;
164 }
165
166 if (IfxAsclin_getCollisionDetectionErrorFlagStatus(asclinSFR)) /* CE flag*/
167 {
168 IfxAsclin_clearCollisionDetectionErrorFlag(asclinSFR);
169 asclin->errorFlagsStatus.collisionDetectionError = 1;
170 }
171
172 if (IfxAsclin_getFrameErrorFlagStatus(asclinSFR)) /* FE flag*/
173 {
174 IfxAsclin_clearFrameErrorFlag(asclinSFR);
175 asclin->errorFlagsStatus.frameError = 1;
176 }
177
178 if (IfxAsclin_getLinParityErrorFlagStatus(asclinSFR)) /* LP flag*/
179 {
180 IfxAsclin_clearLinParityErrorFlag(asclinSFR);
181 asclin->errorFlagsStatus.linParityError = 1;
182 }
183 }
184
185
186 void IfxAsclin_Lin_checkForTransmittedResponseFlags(IfxAsclin_Lin *asclin)
187 {
188 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
189
190 /* check Tx response end acknowledgement */
191 if (IfxAsclin_getTxResponseEndFlagStatus(asclinSFR)) /* TRE flag*/
192 {
193 IfxAsclin_clearTxResponseEndFlag(asclinSFR);
194 asclin->acknowledgmentFlags.txResponseEnd = 1;
195 }
196
197 /* check for Tx response error flags */
198 if (IfxAsclin_getTxFifoOverflowFlagStatus(asclinSFR)) /* TFO flag*/
199 {
200 IfxAsclin_clearTxFifoOverflowFlag(asclinSFR);
201 asclin->errorFlagsStatus.txFifoOverflow = 1;
202 }
203
204 if (IfxAsclin_getCollisionDetectionErrorFlagStatus(asclinSFR)) /* CE flag*/
205 {
206 IfxAsclin_clearCollisionDetectionErrorFlag(asclinSFR);
207 asclin->errorFlagsStatus.collisionDetectionError = 1;
208 }
209
210 if (IfxAsclin_getResponseTimeoutFlagStatus(asclinSFR)) /* RT flag*/
211 {
212 IfxAsclin_clearResponseTimeoutFlag(asclinSFR);
213 asclin->errorFlagsStatus.responseTimeout = 1;
214 }
215
216 if ((asclin->linMode == IfxAsclin_LinMode_slave) && (IfxAsclin_getBreakDetectedFlagStatus(asclinSFR))) /* BD flag only in slave mode*/
217 {
218 IfxAsclin_clearBreakDetectedFlag(asclinSFR);
219 asclin->errorFlagsStatus.breakDetected = 1;
220 }
221 }
222
223
224 void IfxAsclin_Lin_clearFlagsStatus(IfxAsclin_Lin *asclin)
225 {
226 /*clear acknowledgement flags status */
227 asclin->acknowledgmentFlags.txHeaderEnd = 0;
228 asclin->acknowledgmentFlags.rxHeaderEnd = 0;
229 asclin->acknowledgmentFlags.txResponseEnd = 0;
230 asclin->acknowledgmentFlags.rxResponseEnd = 0;
231 asclin->acknowledgmentFlags.txCompleted = 0;
232
233 /* clear error flags status*/
234 asclin->errorFlagsStatus.headerTimeout = 0;
235 asclin->errorFlagsStatus.collisionDetectionError = 0;
236 asclin->errorFlagsStatus.frameError = 0;
237 asclin->errorFlagsStatus.responseTimeout = 0;
238 asclin->errorFlagsStatus.linParityError = 0;
239 asclin->errorFlagsStatus.breakDetected = 0;
240 asclin->errorFlagsStatus.linAutobaudDetectionError = 0;
241 asclin->errorFlagsStatus.linChecksumError = 0;
242 asclin->errorFlagsStatus.txFifoOverflow = 0;
243 asclin->errorFlagsStatus.rxFifoOverflow = 0;
244 }
245
246
247 void IfxAsclin_Lin_disableModule(IfxAsclin_Lin *asclin)
248 {
249 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
250 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
251 IfxScuWdt_clearCpuEndinit(psw); /* clearing the endinit protection*/
252 IfxAsclin_setDisableModuleRequest(asclinSFR); /* disabling the module*/
253 IfxScuWdt_setCpuEndinit(psw); /* setting the endinit protection back on*/
254 }
255
256
257 void IfxAsclin_Lin_ignoreHeader(IfxAsclin_Lin *asclin)
258 {
259 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
260 IfxAsclin_enableRxFifoInlet(asclinSFR, FALSE); /* disable Rx FIFO*/
261 IfxAsclin_setHeaderResponseSelect(asclinSFR, IfxAsclin_HeaderResponseSelect_headerOnly); /* set header only mode*/
262 IfxAsclin_clearAllFlags(asclinSFR); /* clear all flags*/
263 }
264
265
266 IfxAsclin_Status IfxAsclin_Lin_initModule(IfxAsclin_Lin *asclin, const IfxAsclin_Lin_Config *config)
267 {
268 Ifx_ASCLIN *asclinSFR = config->asclin; /* pointer to ASCLIN registers */
269 IfxAsclin_Status status = IfxAsclin_Status_noError;
270
271 asclin->asclin = asclinSFR; /* adding register pointer to module handler*/
272 IfxAsclin_enableModule(asclinSFR); /* enabling the module*/
273
274 /* mode initialisation */
275 IfxAsclin_setClockSource(asclinSFR, IfxAsclin_ClockSource_noClock); /* disabling the clock*/
276 IfxAsclin_setFrameMode(asclinSFR, IfxAsclin_FrameMode_initialise); /* setting the module in Initialise mode*/
277 IfxAsclin_setClockSource(asclinSFR, config->clockSource); /* setting the clock source*/
278
279 /* lin mode initialisation */
280 IfxAsclin_setClockSource(asclinSFR, IfxAsclin_ClockSource_noClock); /* disabling the clock*/
281 IfxAsclin_setFrameMode(asclinSFR, config->frameMode); /* setting the module in Lin mode*/
282 IfxAsclin_setLinMode(asclinSFR, config->linMode); /* configuring lin mode of operation (master/slave)*/
283 IfxAsclin_setRxInput(asclinSFR, config->alti); /* selecting the Rx(alternate) input pin*/
284 IfxAsclin_setPrescaler(asclinSFR, config->btc.prescaler); /* setting the prescaler*/
285 IfxAsclin_setClockSource(asclinSFR, config->clockSource); /* setting the clock source*/
286
287 /* baudrate generation in both modes */
288 status = (IfxAsclin_Status)IfxAsclin_setBitTiming(asclinSFR, config->brg.baudrate,
289 config->btc.oversampling,
290 config->bsc.samplePointPosition,
291 config->bsc.medianFilter); /* setting the baudrate bit fields to generate the required baudrate*/
292
293 IfxAsclin_setClockSource(asclinSFR, IfxAsclin_ClockSource_noClock); /* disabling the clock again*/
294
295 /* auto baud rate detection in slave mode */
296 if (config->linMode == IfxAsclin_LinMode_slave)
297 {
298 IfxAsclin_enableAutoBaudrateDetection(asclinSFR, config->brd.abd); /* setting the auto baudrate detection (enable/disable)*/
299 IfxAsclin_setBrdUpperlimt(asclinSFR, config->brd.upperLimit); /* setting the upper limit for abd*/
300 IfxAsclin_setBrdLowerlimt(asclinSFR, config->brd.lowerLimit); /* setting the lower limit for abd*/
301 }
302
303 /* frame control initialisation */
304 IfxAsclin_enableParity(asclinSFR, config->frame.parityEnable); /* setting parity (enable/disable)*/
305 IfxAsclin_setParityType(asclinSFR, config->frame.parityType); /* setting parity type (odd/even)*/
306 IfxAsclin_setStopBit(asclinSFR, config->frame.stopBit); /* setting the stop bit*/
307 IfxAsclin_enableCollisionDetection(asclinSFR, config->frame.collisionDetectionEnable); /* setting collision detection (enable/disable)*/
308 IfxAsclin_setShiftDirection(asclinSFR, config->frame.shiftDir); /* setting the shift direction*/
309
310 /* data control initialisation */
311 IfxAsclin_setDataLength(asclinSFR, config->data.dataLength); /* setting the number of bytes to be transfered*/
312 IfxAsclin_setHeaderResponseSelect(asclinSFR, config->data.headerOnly); /* setting the header only or header and response mode*/
313 IfxAsclin_setLinResponseTimeoutMode(asclinSFR, config->data.responseTimeoutMode); /* setting the response timeout mode (frame/response)*/
314 IfxAsclin_setChecksumMode(asclinSFR, config->data.checksum); /* setting the checksum mode (classic/enhanced)*/
315 IfxAsclin_setLinResponseTimeoutThreshold(asclinSFR, config->data.responseTimeout); /* setting the lin response timeout threshold*/
316
317 /* lin control initialisation */
318 IfxAsclin_enableHardwareChecksum(asclinSFR, config->lin.csEnable); /* setting the hardware checksum (enable/disable)*/
319 IfxAsclin_setChecksumInjection(asclinSFR, config->lin.csi); /* setting checksum injection*/
320
321 /* master specific initialisation */
322 if (config->linMode == IfxAsclin_LinMode_master)
323 {
324 IfxAsclin_setIdleDelay(asclinSFR, config->frame.idleDelay); /* setting idle delay for master*/
325 IfxAsclin_setLeadDelay(asclinSFR, config->frame.leadDelay); /* setting lead delay for master mode*/
326 IfxAsclin_setLinBreakLength(asclinSFR, config->lin.breakLength); /* setting the break generation length*/
327 IfxAsclin_setLinHeaderTimeout(asclinSFR, config->lin.headerTimeout); /* setting the header timeout value for master*/
328 asclin->receiveIdEnable = config->receiveIdEnable; /* echoing the selection of receiving Id in its own Rx FIFO*/
329 }
330
331 /* slave specific initialisation */
332 if (config->linMode == IfxAsclin_LinMode_slave)
333 {
334 IfxAsclin_setIdleDelay(asclinSFR, config->frame.idleDelay); /* setting idle delay for slave */
335 IfxAsclin_setLeadDelay(asclinSFR, config->frame.leadDelay); /* setting lead delay for slave mode */
336 IfxAsclin_setLinBreakLength(asclinSFR, config->lin.breakLength); /* setting the break detection length */
337 IfxAsclin_setLinHeaderTimeout(asclinSFR, config->lin.headerTimeout); /* setting the header timeout value for slave*/
338 }
339
340 /* fifo control initialisation */
341 IfxAsclin_setTxFifoInletWidth(asclinSFR, config->fifo.inWidth); /* setting Tx FIFO inlet width*/
342 IfxAsclin_setRxFifoOutletWidth(asclinSFR, config->fifo.outWidth); /* setting Rx FIFO outlet width*/
343 IfxAsclin_setRxBufferMode(asclinSFR, config->fifo.buffMode); /* setting Rx FIFO mode*/
344 IfxAsclin_enableTxFifoOutlet(asclinSFR, FALSE); /* disabling Rx FIFO for recieving*/
345 IfxAsclin_enableRxFifoInlet(asclinSFR, FALSE); /* disabling Tx FIFO for transmitting*/
346 IfxAsclin_flushRxFifo(asclinSFR); /* flushing Rx FIFO*/
347 IfxAsclin_flushTxFifo(asclinSFR); /* flushing Tx FIFO*/
348
349 IfxAsclin_disableAllFlags(asclinSFR); /* disable all flags*/
350 IfxAsclin_clearAllFlags(asclinSFR); /* clear all flags*/
351
352 /* Initialising the Interrupts */
353 asclin->isInterruptMode = config->isInterruptMode;
354 IfxSrc_Tos tos = config->interrupt.typeOfService;
355
356 if (config->isInterruptMode)
357 {
358 Ifx_ASCLIN_FLAGSENABLE flagsenable;
359 flagsenable.U = asclinSFR->FLAGSENABLE.U;
360
361 if ((config->interrupt.rxPriority > 0) || (tos == IfxSrc_Tos_dma))
362 {
363 volatile Ifx_SRC_SRCR *src;
364 src = IfxAsclin_getSrcPointerRx(asclinSFR);
365 IfxSrc_init(src, tos, config->interrupt.rxPriority);
366
367 flagsenable.B.RHE = config->interrupt.enabledInterrupt.rxReceivedHeader;
368 flagsenable.B.RRE = config->interrupt.enabledInterrupt.rxReceivedResponse;
369
370 IfxSrc_enable(src);
371 }
372
373 if ((config->interrupt.txPriority > 0) || (tos == IfxSrc_Tos_dma))
374 {
375 volatile Ifx_SRC_SRCR *src;
376 src = IfxAsclin_getSrcPointerTx(asclinSFR);
377 IfxSrc_init(src, tos, config->interrupt.txPriority);
378
379 flagsenable.B.THE = config->interrupt.enabledInterrupt.txTransmittedHeader;
380 flagsenable.B.TRE = config->interrupt.enabledInterrupt.txTransmittedResponse;
381
382 IfxSrc_enable(src);
383 }
384
385 if (config->interrupt.exPriority > 0) /*These interrupts are not serviced by dma*/
386 {
387 volatile Ifx_SRC_SRCR *src;
388 src = IfxAsclin_getSrcPointerEr(asclinSFR);
389 IfxSrc_init(src, tos, config->interrupt.exPriority);
390
391 flagsenable.B.BDE = config->interrupt.enabledInterrupt.exBreakDetected;
392 flagsenable.B.TCE = config->interrupt.enabledInterrupt.exTransmissionCompleted;
393
394 flagsenable.B.CEE = config->interrupt.enabledInterrupt.exCollisionDetectionError;
395 flagsenable.B.FEE = config->interrupt.enabledInterrupt.exFramingError;
396 flagsenable.B.HTE = config->interrupt.enabledInterrupt.exHeaderTimeout;
397 flagsenable.B.LAE = config->interrupt.enabledInterrupt.exLinAutobaudDetectionError;
398 flagsenable.B.LCE = config->interrupt.enabledInterrupt.exLinChecksumError;
399 flagsenable.B.LPE = config->interrupt.enabledInterrupt.exLinParityError;
400 flagsenable.B.RFOE = config->interrupt.enabledInterrupt.exReceiveFIFOOverflow;
401 flagsenable.B.RTE = config->interrupt.enabledInterrupt.exResponseTimeout;
402 flagsenable.B.TFOE = config->interrupt.enabledInterrupt.exTransmitFIFOOverflow;
403
404 IfxSrc_enable(src);
405 }
406
407 /*Update FLAGSENABLE register in one shot*/
408 asclinSFR->FLAGSENABLE.U = flagsenable.U;
409 }
410
411 /* Pin mapping*/
412 const IfxAsclin_Lin_Pins *pins = config->pins;
413
414 if (pins != NULL_PTR)
415 {
416 IfxAsclin_Rx_In *rx = pins->rx;
417
418 if (rx != NULL_PTR)
419 {
420 IfxAsclin_initRxPin(rx, pins->rxMode, pins->pinDriver);
421 }
422
423 IfxAsclin_Tx_Out *tx = pins->tx;
424
425 if (tx != NULL_PTR)
426 {
427 IfxAsclin_initTxPin(tx, pins->txMode, pins->pinDriver);
428 }
429 }
430
431 IfxAsclin_setClockSource(asclinSFR, config->clockSource); /* setting the clock source*/
432
433 asclin->linMode = config->linMode; /* echoing the mode of operation to module handler*/
434
435 return status;
436 }
437
438
439 void IfxAsclin_Lin_initModuleConfig(IfxAsclin_Lin_Config *config, Ifx_ASCLIN *asclin)
440 {
441 config->asclin = asclin;
442 config->frameMode = IfxAsclin_FrameMode_lin; /* LIN mode*/
443 config->linMode = IfxAsclin_LinMode_master; /* Lin Master mode*/
444 config->clockSource = IfxAsclin_ClockSource_ascFastClock; /* Asclin fast clock, fasclinf*/
445 config->alti = IfxAsclin_RxInputSelect_0; /* alternate input 0;*/
446
447 /* Default values for baudrate */
448 config->brg.baudrate = 19200.0; /* default baudrate (the fractional dividier setup will be calculated in initModule)*/
449 /* Default Values for Bit Timings */
450 config->btc.prescaler = 4; /* default prescaler*/
451 config->btc.oversampling = IfxAsclin_OversamplingFactor_16; /* default oversampling factor*/
452 /* Default Values for Bit sampling */
453 config->bsc.filterDepth = 24U; /* digital glitch filter depth 24*/
454 config->bsc.medianFilter = IfxAsclin_SamplesPerBit_one; /* one sample per bit*/
455 config->bsc.samplePointPosition = IfxAsclin_SamplePointPosition_3; /* sample point position at 3*/
456 /* Default Values for Frame Control */
457 config->frame.parityEnable = FALSE; /* disable parity*/
458 config->frame.parityType = IfxAsclin_ParityType_even; /* even parity (if parity enabled) */
459 config->frame.stopBit = IfxAsclin_StopBit_1; /* one stop bit */
460 config->frame.shiftDir = IfxAsclin_ShiftDirection_lsbFirst; /* shift diection LSB first */
461 config->frame.collisionDetectionEnable = FALSE;
462 /* Default Values for Data Control */
463 config->data.dataLength = IfxAsclin_DataLength_8; /* number of bytes of the response */
464 config->data.headerOnly = IfxAsclin_HeaderResponseSelect_headerAndResponse; /* header and response */
465 config->data.responseTimeoutMode = IfxAsclin_LinResponseTimeoutMode_frameTimeout; /* frame timeout */
466 config->data.checksum = IfxAsclin_Checksum_enhanced; /* enhanced checksum */
467 config->data.responseTimeout = 255;
468 /* Default Values for fifo Control */
469 config->fifo.outWidth = IfxAsclin_RxFifoOutletWidth_1; /* 8-bit wide read */
470 config->fifo.inWidth = IfxAsclin_TxFifoInletWidth_1; /* 8-bit wide write */
471 config->fifo.buffMode = IfxAsclin_ReceiveBufferMode_rxFifo; /* RxFIFO */
472 /* Default Values for Lin Control */
473 config->lin.csEnable = TRUE; /* checksum enable */
474 config->lin.csi = IfxAsclin_ChecksumInjection_written; /* 8-bit wide write */
475
476 /* Default Values for Interrupt Config */
477 config->interrupt.rxPriority = 0; /* receive interrupt priority 0*/
478 config->interrupt.txPriority = 0; /* transmit interrupt priority 0*/
479 config->interrupt.exPriority = 0; /* error interrupt priority 0*/
480 config->interrupt.typeOfService = IfxSrc_Tos_cpu0; /* type of service CPU0*/
481 config->isInterruptMode = FALSE; /* default is in polling mode*/
482
483 /* configuration for master mode */
484 {
485 config->receiveIdEnable = FALSE; /* receive Id in Rx Fifo after sending */
486 config->frame.idleDelay = IfxAsclin_IdleDelay_2; /* idle dalay 2 bits */
487 config->frame.leadDelay = IfxAsclin_LeadDelay_1; /*lead delay in master 1 bit */
488 /* Default Values for Lin Control */
489 config->lin.breakLength = 13; /* break generation length 13 */
490 config->lin.headerTimeout = 56; /* header timeout value in master 56 */
491 }
492
493 /*configuration for enabling interrupts*/
494 {
495 config->interrupt.enabledInterrupt.rxReceivedHeader = FALSE;
496 config->interrupt.enabledInterrupt.rxReceivedResponse = FALSE;
497 config->interrupt.enabledInterrupt.txTransmittedHeader = FALSE;
498 config->interrupt.enabledInterrupt.txTransmittedResponse = FALSE;
499 config->interrupt.enabledInterrupt.exBreakDetected = FALSE;
500 config->interrupt.enabledInterrupt.exTransmissionCompleted = FALSE;
501 config->interrupt.enabledInterrupt.exHeaderTimeout = FALSE;
502 config->interrupt.enabledInterrupt.exResponseTimeout = FALSE;
503 config->interrupt.enabledInterrupt.exLinParityError = FALSE;
504 config->interrupt.enabledInterrupt.exLinAutobaudDetectionError = FALSE;
505 config->interrupt.enabledInterrupt.exLinChecksumError = FALSE;
506 config->interrupt.enabledInterrupt.exFramingError = FALSE;
507 config->interrupt.enabledInterrupt.exCollisionDetectionError = FALSE;
508 config->interrupt.enabledInterrupt.exReceiveFIFOOverflow = FALSE;
509 config->interrupt.enabledInterrupt.exTransmitFIFOOverflow = FALSE;
510 }
511
512 config->pins = NULL_PTR; /* pins to null pointer*/
513 }
514
515
516 void IfxAsclin_Lin_receiveHeader(IfxAsclin_Lin *asclin, uint8 *id)
517 {
518 boolean result = 0;
519 IfxAsclin_Lin_prepareHeaderReception(asclin); /* prepare for header reception */
520 result |= IfxAsclin_Lin_waitForReceivedHeader(asclin); /* wait until receive header end acknowledgemnet*/
521
522 if (result == 1)
523 {
524 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
525 }
526 else
527 {
528 IfxAsclin_Lin_readHeader(asclin, id); /*read the ID byte*/
529 }
530 }
531
532
533 void IfxAsclin_Lin_receiveResponse(IfxAsclin_Lin *asclin, uint8 *data, uint32 length)
534 {
535 boolean result = 0;
536 IfxAsclin_Lin_prepareResponseReception(asclin, length); /* prepare the response reception */
537 result |= IfxAsclin_Lin_waitForReceivedResponse(asclin); /* wait until receive response end acknowledgemnet or an error is occured*/
538
539 if (result == 1)
540 {
541 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
542 }
543 else
544 {
545 IfxAsclin_Lin_readResponse(asclin, data, length); /* read the data bytes */
546 }
547 }
548
549
550 void IfxAsclin_Lin_sendHeader(IfxAsclin_Lin *asclin, uint8 *id)
551 {
552 boolean result = 0;
553 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
554 IfxAsclin_clearAllFlags(asclinSFR); /* clearing all flags*/
555
556 if (asclin->receiveIdEnable) /* if receiving the sent id byte into its own Rx FIFO is selected*/
557 {
558 IfxAsclin_flushRxFifo(asclinSFR); /* flushing Rx FIFO*/
559 IfxAsclin_enableRxFifoInlet(asclinSFR, TRUE); /* enabling Rx FIFO */
560 }
561 else
562 {
563 IfxAsclin_enableRxFifoInlet(asclinSFR, FALSE); /* disabling Rx FIFO */
564 }
565
566 IfxAsclin_flushTxFifo(asclinSFR); /* flushing Tx FIFO */
567 IfxAsclin_enableTxFifoOutlet(asclinSFR, TRUE); /* enabling Tx FIFO for transmitting*/
568 IfxAsclin_write8(asclinSFR, id, 1U); /* writing the ID byte */
569 IfxAsclin_setTransmitHeaderRequestFlag(asclinSFR); /* setting THRQS flag */
570
571 if (asclin->isInterruptMode == FALSE) /*Only for Polling Mode*/
572 {
573 result |= IfxAsclin_Lin_waitForTransmittedHeader(asclin); /* waiting until transmit header end acknowledgemnet */
574
575 if (result == 1)
576 {
577 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
578 }
579 }
580 else
581 {
582 IfxAsclin_Lin_clearFlagsStatus(asclin);
583 asclin->linFrameData.flags.txHeaderInProgress = TRUE;
584 asclin->linFrameData.flags.txHeaderErrorOccurred = FALSE;
585 }
586 }
587
588
589 void IfxAsclin_Lin_sendResponse(IfxAsclin_Lin *asclin, uint8 *data, uint32 length)
590 {
591 boolean result = 0;
592 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
593 IfxAsclin_setDataLength(asclinSFR, (IfxAsclin_DataLength)(length - 1)); /* set number of bytes to be transfered */
594 IfxAsclin_clearAllFlags(asclinSFR); /* clear all flags */
595 IfxAsclin_flushTxFifo(asclinSFR); /* flushing Tx FIFO */
596 IfxAsclin_enableRxFifoInlet(asclinSFR, FALSE); /* disable Rx FIFO */
597 IfxAsclin_enableTxFifoOutlet(asclinSFR, TRUE); /* enable Tx FIFO for transmitting */
598 IfxAsclin_write8(asclinSFR, data, length); /* write the data bytes; */
599 IfxAsclin_setTransmitResponseRequestFlag(asclinSFR); /* set TRRQS flag */
600 result |= IfxAsclin_Lin_waitForTransmittedResponse(asclin); /* wait until transmit response end acknowledgemnet */
601
602 if (result == 1)
603 {
604 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
605 }
606 }
607
608
609 boolean IfxAsclin_Lin_waitForReceivedHeader(IfxAsclin_Lin *asclin)
610 {
611 boolean result = 0;
612 IfxAsclin_Lin_clearFlagsStatus(asclin); /* clear all aknowledgement and error flags status */
613
614 /* wait until receive header end acknowledgemnet has been detected */
615 while (asclin->acknowledgmentFlags.rxHeaderEnd != 1)
616 {
617 IfxAsclin_Lin_checkForReceivedHeaderFlags(asclin);
618
619 if ((asclin->errorFlagsStatus.headerTimeout == 1)
620 || (asclin->errorFlagsStatus.collisionDetectionError == 1)
621 || (asclin->errorFlagsStatus.frameError == 1)
622 || (asclin->errorFlagsStatus.linAutobaudDetectionError == 1)
623 || (asclin->errorFlagsStatus.linParityError == 1))
624 {
625 result = 1;
626 break;
627 }
628 }
629
630 return result;
631 }
632
633
634 boolean IfxAsclin_Lin_waitForReceivedResponse(IfxAsclin_Lin *asclin)
635 {
636 boolean result = 0;
637 IfxAsclin_Lin_clearFlagsStatus(asclin); /* clear all aknowledgement and error flags status */
638
639 /* wait until receive response end acknowledgemnet has been detected */
640 while (asclin->acknowledgmentFlags.rxResponseEnd != 1)
641 {
642 IfxAsclin_Lin_checkForReceivedResponseFlags(asclin);
643
644 if ((asclin->errorFlagsStatus.rxFifoOverflow == 1)
645 || (asclin->errorFlagsStatus.collisionDetectionError == 1)
646 || (asclin->errorFlagsStatus.frameError == 1)
647 || (asclin->errorFlagsStatus.linChecksumError == 1)
648 || (asclin->errorFlagsStatus.responseTimeout == 1)
649 || (asclin->errorFlagsStatus.breakDetected == 1))
650 {
651 result = 1;
652 break;
653 }
654 }
655
656 return result;
657 }
658
659
660 boolean IfxAsclin_Lin_waitForTransmittedHeader(IfxAsclin_Lin *asclin)
661 {
662 boolean result = 0;
663 IfxAsclin_Lin_clearFlagsStatus(asclin); /* clear all aknowledgement and error flags status */
664
665 /* wait until transmit header end acknowledgemnet has been detected */
666 while (asclin->acknowledgmentFlags.txHeaderEnd != 1)
667 {
668 IfxAsclin_Lin_checkForTransmittedHeaderFlags(asclin);
669
670 if ((asclin->errorFlagsStatus.headerTimeout == 1)
671 || (asclin->errorFlagsStatus.collisionDetectionError == 1)
672 || (asclin->errorFlagsStatus.frameError == 1)
673 || (asclin->errorFlagsStatus.linParityError == 1))
674 {
675 result = 1;
676 break;
677 }
678 }
679
680 return result;
681 }
682
683
684 boolean IfxAsclin_Lin_waitForTransmittedResponse(IfxAsclin_Lin *asclin)
685 {
686 boolean result = 0;
687 IfxAsclin_Lin_clearFlagsStatus(asclin); /* clear all aknowledgement and error flags status */
688
689 /* wait until transmit response end acknowledgemnet has been detected */
690 while (asclin->acknowledgmentFlags.txResponseEnd != 1)
691 {
692 IfxAsclin_Lin_checkForTransmittedResponseFlags(asclin);
693
694 if ((asclin->errorFlagsStatus.txFifoOverflow == 1)
695 || (asclin->errorFlagsStatus.collisionDetectionError == 1)
696 || (asclin->errorFlagsStatus.responseTimeout == 1)
697 || (asclin->errorFlagsStatus.breakDetected == 1))
698 {
699 result = 1;
700 break;
701 }
702 }
703
704 return result;
705 }
706
707
708 void IfxAsclin_Lin_isrError(IfxAsclin_Lin *asclin)
709 {
710 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
711
712 /* store and clear the flags*/
713 if (IfxAsclin_getLinParityErrorFlagStatus(asclinSFR))
714 {
715 IfxAsclin_clearLinParityErrorFlag(asclinSFR);
716 asclin->errorFlagsStatus.linParityError = 1;
717 }
718
719 if (IfxAsclin_getFrameErrorFlagStatus(asclinSFR))
720 {
721 IfxAsclin_clearFrameErrorFlag(asclinSFR);
722 asclin->errorFlagsStatus.frameError = 1;
723 }
724
725 if (IfxAsclin_getRxFifoOverflowFlagStatus(asclinSFR))
726 {
727 IfxAsclin_clearRxFifoOverflowFlag(asclinSFR);
728 asclin->errorFlagsStatus.rxFifoOverflow = 1;
729 }
730
731 if (IfxAsclin_getTxFifoOverflowFlagStatus(asclinSFR))
732 {
733 IfxAsclin_clearTxFifoOverflowFlag(asclinSFR);
734 asclin->errorFlagsStatus.txFifoOverflow = 1;
735 }
736
737 if (IfxAsclin_getHeaderTimeoutFlagStatus(asclinSFR))
738 {
739 IfxAsclin_clearHeaderTimeoutFlag(asclinSFR);
740 asclin->errorFlagsStatus.headerTimeout = 1;
741 }
742
743 if (IfxAsclin_getResponseTimeoutFlagStatus(asclinSFR))
744 {
745 IfxAsclin_clearResponseTimeoutFlag(asclinSFR);
746 asclin->errorFlagsStatus.responseTimeout = 1;
747 }
748
749 if (IfxAsclin_getBreakDetectedFlagStatus(asclinSFR))
750 {
751 IfxAsclin_clearBreakDetectedFlag(asclinSFR);
752 asclin->errorFlagsStatus.breakDetected = 1;
753 }
754
755 if (IfxAsclin_getLinAutoBaudDetectionErrorFlagStatus(asclinSFR))
756 {
757 IfxAsclin_clearLinAutoBaudDetectionErrorFlag(asclinSFR);
758 asclin->errorFlagsStatus.linAutobaudDetectionError = 1;
759 }
760
761 if (IfxAsclin_getLinChecksumErrorFlagStatus(asclinSFR))
762 {
763 IfxAsclin_clearLinChecksumErrorFlag(asclinSFR);
764 asclin->errorFlagsStatus.linChecksumError = 1;
765 }
766
767 if (IfxAsclin_getCollisionDetectionErrorFlagStatus(asclinSFR))
768 {
769 IfxAsclin_clearCollisionDetectionErrorFlag(asclinSFR);
770 asclin->errorFlagsStatus.collisionDetectionError = 1;
771 }
772
773 if (IfxAsclin_getTransmissionCompletedFlagStatus(asclinSFR))
774 {
775 IfxAsclin_clearTransmissionCompletedFlag(asclinSFR);
776 asclin->acknowledgmentFlags.txCompleted = 1;
777 }
778
779 /*Update acknowledgment flags*/
780 if ((asclin->linFrameData.flags.txHeaderInProgress == 1)
781 && ((asclin->errorFlagsStatus.headerTimeout == 1)
782 || (asclin->errorFlagsStatus.collisionDetectionError == 1)
783 || (asclin->errorFlagsStatus.frameError == 1)
784 || (asclin->errorFlagsStatus.linParityError == 1)))
785 {
786 asclin->linFrameData.flags.txHeaderErrorOccurred = TRUE;
787 asclin->acknowledgmentFlags.txHeaderEnd = 1;
788 asclin->linFrameData.flags.txHeaderInProgress = FALSE;
789 }
790
791 if ((asclin->linFrameData.flags.txResponseInProgress == 1)
792 && ((asclin->errorFlagsStatus.txFifoOverflow == 1)
793 || (asclin->errorFlagsStatus.collisionDetectionError == 1)
794 || (asclin->errorFlagsStatus.responseTimeout == 1)
795 || (asclin->errorFlagsStatus.breakDetected == 1)))
796 {
797 asclin->linFrameData.flags.txResponseErrorOccurred = TRUE;
798 asclin->acknowledgmentFlags.txResponseEnd = 1;
799 asclin->linFrameData.flags.txResponseInProgress = FALSE;
800 }
801
802 if ((asclin->linFrameData.flags.rxHeaderInProgress == 1)
803 && ((asclin->errorFlagsStatus.rxFifoOverflow == 1)
804 || (asclin->errorFlagsStatus.headerTimeout == 1)
805 || (asclin->errorFlagsStatus.collisionDetectionError == 1)
806 || (asclin->errorFlagsStatus.frameError == 1)
807 || (asclin->errorFlagsStatus.linAutobaudDetectionError == 1)
808 || (asclin->errorFlagsStatus.linParityError == 1)))
809 {
810 asclin->linFrameData.flags.rxHeaderErrorOccurred = TRUE;
811 asclin->acknowledgmentFlags.rxHeaderEnd = 1;
812 asclin->linFrameData.flags.rxHeaderInProgress = FALSE;
813 }
814
815 if ((asclin->linFrameData.flags.rxResponseInProgress == 1)
816 && ((asclin->errorFlagsStatus.rxFifoOverflow == 1)
817 || (asclin->errorFlagsStatus.collisionDetectionError == 1)
818 || (asclin->errorFlagsStatus.frameError == 1)
819 || (asclin->errorFlagsStatus.linChecksumError == 1)
820 || (asclin->errorFlagsStatus.responseTimeout == 1)
821 || (asclin->errorFlagsStatus.breakDetected == 1)))
822 {
823 asclin->linFrameData.flags.rxResponseErrorOccurred = TRUE;
824 asclin->acknowledgmentFlags.rxResponseEnd = 1;
825 asclin->linFrameData.flags.rxResponseInProgress = FALSE;
826 }
827 }
828
829
830 void IfxAsclin_Lin_isrReceive(IfxAsclin_Lin *asclin)
831 {
832 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
833
834 if (IfxAsclin_getRxHeaderEndFlagStatus(asclinSFR))
835 {
836 IfxAsclin_clearRxHeaderEndFlag(asclinSFR);
837 IfxAsclin_Lin_readHeader(asclin, &(asclin->linFrameData.headerID)); /*read the ID byte*/
838 asclin->acknowledgmentFlags.rxHeaderEnd = 1;
839 asclin->linFrameData.flags.rxHeaderInProgress = FALSE;
840 asclinSFR->TXFIFOCON.B.ENO = 0; /*TX FIFO Outlet is disabled*/
841 }
842
843 if (IfxAsclin_getRxResponseEndFlagStatus(asclinSFR))
844 {
845 IfxAsclin_clearRxResponseEndFlag(asclinSFR);
846 IfxAsclin_Lin_readResponse(asclin, &(asclin->linFrameData.rxResponseData[0]), (asclin->linFrameData.rxResponseLength)); /* read the data bytes */
847 asclin->acknowledgmentFlags.rxResponseEnd = 1;
848 asclin->linFrameData.flags.rxResponseInProgress = FALSE;
849 }
850 }
851
852
853 void IfxAsclin_Lin_isrTransmit(IfxAsclin_Lin *asclin)
854 {
855 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
856
857 /* clear H/w Flag and update S/w Flags */
858 if (IfxAsclin_getTxHeaderEndFlagStatus(asclinSFR))
859 {
860 IfxAsclin_clearTxHeaderEndFlag(asclinSFR);
861 asclin->acknowledgmentFlags.txHeaderEnd = 1;
862 asclin->linFrameData.flags.txHeaderInProgress = FALSE;
863 }
864
865 if (IfxAsclin_getTxResponseEndFlagStatus(asclinSFR))
866 {
867 IfxAsclin_clearTxResponseEndFlag(asclinSFR);
868 asclin->acknowledgmentFlags.txResponseEnd = 1;
869 asclin->linFrameData.flags.txResponseInProgress = FALSE;
870 }
871 }
872
873
874 void IfxAsclin_Lin_sendFrame(IfxAsclin_Lin *asclin, IfxAsclin_Lin_PduType *pduptr)
875 {
876 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
877 IfxAsclin_setChecksumMode(asclinSFR, pduptr->checksumMode); /* setting the checksum mode (classic/enhanced)*/
878 asclin->linFrameData.headerID = pduptr->pid;
879
880 if (pduptr->direction == IfxAsclin_Lin_Direction_TransmitHeader)
881 {
882 asclin->linFrameData.flags.txSendResponse = FALSE;
883 asclin->linFrameData.txResponseLength = 0;
884 asclin->linFrameData.flags.txSendHeaderOnly = TRUE;
885
886 /*Enable Interrupt flags for Header Transmission*/
887 Ifx_ASCLIN_FLAGSENABLE flagsenable;
888 flagsenable.U = asclinSFR->FLAGSENABLE.U;
889 flagsenable.B.THE = 1;
890 flagsenable.B.HTE = 1;
891 flagsenable.B.CEE = 1;
892 flagsenable.B.FEE = 1;
893 flagsenable.B.LPE = 1;
894 asclinSFR->FLAGSENABLE.U = flagsenable.U;
895
896 IfxAsclin_Lin_sendHeader(asclin, &(pduptr->pid));
897 }
898
899 else if ((pduptr->direction == IfxAsclin_Lin_Direction_TransmitHeaderAndResponse) || (pduptr->direction == IfxAsclin_Lin_Direction_TransmitHeaderAndReceiveResponse))
900 {
901 IfxAsclin_setDataLength(asclinSFR, (IfxAsclin_DataLength)(pduptr->dataLength - 1)); /* set number of bytes to be transfered */
902
903 /*Configure RXFIFO*/
904 Ifx_ASCLIN_RXFIFOCON rxfifocon;
905 rxfifocon.U = asclinSFR->RXFIFOCON.U;
906
907 rxfifocon.B.BUF = 0; /*RX in FIFO Mode*/
908 rxfifocon.B.FLUSH = 1; /*Empty Rx Fifo*/
909 rxfifocon.B.ENI = 1; /*RX FIFO Inlet is enabled*/
910
911 asclinSFR->RXFIFOCON.U = rxfifocon.U;
912
913 /*Configure TXFIFO*/
914 Ifx_ASCLIN_TXFIFOCON txfifocon;
915 txfifocon.U = asclinSFR->TXFIFOCON.U;
916
917 txfifocon.B.FLUSH = 1; /*Empty Tx Fifo*/
918 txfifocon.B.ENO = 1; /*TX FIFO Outlet is enabled*/
919
920 asclinSFR->TXFIFOCON.U = txfifocon.U;
921
922 /*Clear interrupt event flags*/
923 IfxAsclin_clearAllFlags(asclinSFR); /* clearing all flags*/
924 IfxAsclin_Lin_clearFlagsStatus(asclin);
925
926 Ifx_ASCLIN_FLAGSENABLE flagsenable;
927 flagsenable.U = asclinSFR->FLAGSENABLE.U;
928
929 if (pduptr->direction == IfxAsclin_Lin_Direction_TransmitHeaderAndResponse)
930 {
931 /*Enable Tx interrupts*/
932 flagsenable.B.THE = 1;
933 flagsenable.B.TRE = 1;
934 flagsenable.B.HTE = 1;
935
936 /*Enable Ex interrupts*/
937 flagsenable.B.TFOE = 1;
938 flagsenable.B.CEE = 1;
939 flagsenable.B.FEE = 1;
940 flagsenable.B.RTE = 1;
941 flagsenable.B.LPE = 1;
942 flagsenable.B.BDE = 1;
943
944 asclin->linFrameData.flags.txSendResponse = TRUE;
945 asclin->linFrameData.flags.txSendHeaderOnly = FALSE;
946 asclin->linFrameData.txResponseLength = pduptr->dataLength;
947
948 asclin->linFrameData.flags.txHeaderInProgress = TRUE;
949 asclin->linFrameData.flags.txHeaderErrorOccurred = FALSE;
950 asclin->linFrameData.flags.txResponseInProgress = TRUE;
951 asclin->linFrameData.flags.txResponseErrorOccurred = FALSE;
952 }
953 else if (pduptr->direction == IfxAsclin_Lin_Direction_TransmitHeaderAndReceiveResponse)
954 {
955 /*Enable Rx interrupts*/
956 flagsenable.B.RRE = 1;
957 flagsenable.B.THE = 1;
958 flagsenable.B.RHE = 1;
959 flagsenable.B.HTE = 1;
960
961 /*Enable Ex interrupts*/
962 flagsenable.B.RFOE = 1;
963 flagsenable.B.CEE = 1;
964 flagsenable.B.FEE = 1;
965 flagsenable.B.RTE = 1;
966 flagsenable.B.LCE = 1;
967 flagsenable.B.BDE = 1;
968
969 asclinSFR->RXFIFOCON.B.ENI = 1; /*RX FIFO Inlet is enabled*/
970
971 asclin->linFrameData.flags.txSendResponse = TRUE;
972 asclin->linFrameData.flags.txSendHeaderOnly = FALSE;
973 asclin->linFrameData.rxResponseLength = pduptr->dataLength;
974 asclin->linFrameData.flags.txHeaderInProgress = TRUE;
975 asclin->linFrameData.flags.txHeaderErrorOccurred = FALSE;
976 asclin->linFrameData.flags.rxResponseInProgress = TRUE;
977 asclin->linFrameData.flags.rxResponseErrorOccurred = FALSE;
978 }
979
980 asclinSFR->FLAGSENABLE.U = flagsenable.U;
981
982 IfxAsclin_write8(asclinSFR, &(pduptr->pid), 1U); /* writing the ID byte */
983
984 if (pduptr->direction == IfxAsclin_Lin_Direction_TransmitHeaderAndResponse)
985 {
986 IfxAsclin_write8(asclinSFR, pduptr->dataPtr, pduptr->dataLength); /* writing data bytes */
987
988 Ifx_ASCLIN_FLAGSSET flagsset;
989 flagsset.U = asclinSFR->FLAGSSET.U;
990
991 flagsset.B.THRQS = 1;
992 flagsset.B.TRRQS = 1;
993
994 asclinSFR->FLAGSSET.U = flagsset.U;
995 }
996
997 else if (pduptr->direction == IfxAsclin_Lin_Direction_TransmitHeaderAndReceiveResponse)
998 {
999 //asclinSFR->RXFIFOCON.B.ENI = 1; /*RX FIFO Inlet is enabled*/
1000 asclinSFR->FLAGSSET.B.THRQS = 1;
1001 }
1002 }
1003 }
IfxAsclin_Lin_sendResponse
void IfxAsclin_Lin_sendResponse(IfxAsclin_Lin *asclin, uint8 *data, uint32 length)
sends the response
Definition: IfxAsclin_Lin.c:589
IfxAsclin_Lin_FrameControl::stopBit
IfxAsclin_StopBit stopBit
FRAMECON.STOP, number of stop bits.
Definition: IfxAsclin_Lin.h:475
IfxAsclin_Lin_EnabledInterrupts::exResponseTimeout
uint16 exResponseTimeout
Response Timeout.
Definition: IfxAsclin_Lin.h:355
IfxAsclin_Lin_InterruptConfig::txPriority
uint16 txPriority
transmit interrupt priority
Definition: IfxAsclin_Lin.h:497
IfxAsclin_setLinResponseTimeoutMode
IFX_INLINE void IfxAsclin_setLinResponseTimeoutMode(Ifx_ASCLIN *asclin, IfxAsclin_LinResponseTimeoutMode mode)
Sets the LIN response timeout mode.
Definition: IfxAsclin.h:2327
IfxAsclin_getLinAutoBaudDetectionErrorFlagStatus
IFX_INLINE boolean IfxAsclin_getLinAutoBaudDetectionErrorFlagStatus(Ifx_ASCLIN *asclin)
Returns the LIN auto baudrate detection error flag status.
Definition: IfxAsclin.h:1994
IfxAsclin_Lin_Config::clockSource
IfxAsclin_ClockSource clockSource
CSR.CLKSEL, clock source selection.
Definition: IfxAsclin_Lin.h:556
IfxAsclin_Lin_sendFrame
void IfxAsclin_Lin_sendFrame(IfxAsclin_Lin *asclin, IfxAsclin_Lin_PduType *pduptr)
This API must be used in interrupt mode. It can be used to 1.Send Header 2.Send both Header and Respo...
Definition: IfxAsclin_Lin.c:874
IfxAsclin_Tx_Out
TX pin mapping structure.
Definition: IfxAsclin_PinMap.h:96
IfxAsclin_getResponseTimeoutFlagStatus
IFX_INLINE boolean IfxAsclin_getResponseTimeoutFlagStatus(Ifx_ASCLIN *asclin)
Returns the response timeout flag status.
Definition: IfxAsclin.h:2042
IfxAsclin_Lin_AcknowledgementFlags::txCompleted
uint8 txCompleted
transmission completed
Definition: IfxAsclin_Lin.h:393
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxAsclin_Lin_ErrorFlags::linAutobaudDetectionError
uint8 linAutobaudDetectionError
lin autobaud detection error
Definition: IfxAsclin_Lin.h:453
IfxAsclin_getCollisionDetectionErrorFlagStatus
IFX_INLINE boolean IfxAsclin_getCollisionDetectionErrorFlagStatus(Ifx_ASCLIN *asclin)
Returns the collision detection error flag status.
Definition: IfxAsclin.h:1964
IfxAsclin_Lin_InterruptConfig::rxPriority
uint16 rxPriority
receive interrupt priority
Definition: IfxAsclin_Lin.h:498
IfxAsclin_Lin_BaudrateDetection::upperLimit
uint8 upperLimit
BRD.UPPERLIMIT, auto baudrate detection upperlimit.
Definition: IfxAsclin_Lin.h:402
IfxAsclin_Lin_Config::fifo
IfxAsclin_Lin_FifoControl fifo
structure for FIFO control
Definition: IfxAsclin_Lin.h:552
IfxAsclin_OversamplingFactor_16
oversampling factor 16
Definition: IfxAsclin.h:248
IfxAsclin_Lin_FrameControlFlags::txSendHeaderOnly
uint16 txSendHeaderOnly
Flag indicating that only Header is transmitted.
Definition: IfxAsclin_Lin.h:369
IfxAsclin_setIdleDelay
IFX_INLINE void IfxAsclin_setIdleDelay(Ifx_ASCLIN *asclin, IfxAsclin_IdleDelay delay)
Sets the idle delay.
Definition: IfxAsclin.h:2285
IfxAsclin_ReceiveBufferMode_rxFifo
RxFIFO mode.
Definition: IfxAsclin.h:265
IfxAsclin_ShiftDirection_lsbFirst
LSB first.
Definition: IfxAsclin.h:364
IfxAsclin_Lin_EnabledInterrupts::exLinChecksumError
uint16 exLinChecksumError
Lin Checksum Error.
Definition: IfxAsclin_Lin.h:358
IfxAsclin_getSrcPointerEr
volatile Ifx_SRC_SRCR * IfxAsclin_getSrcPointerEr(Ifx_ASCLIN *asclin)
Returns the SRC pointer for ERR.
Definition: IfxAsclin.c:159
IfxAsclin_Lin_EnabledInterrupts::rxReceivedHeader
uint16 rxReceivedHeader
Received Header.
Definition: IfxAsclin_Lin.h:348
IfxAsclin_Lin_BitTimingControl::prescaler
uint16 prescaler
BITCON.PRESCALER, predivider to generate the baud rate.
Definition: IfxAsclin_Lin.h:429
IfxAsclin_Lin_Direction_TransmitHeaderAndReceiveResponse
Transmit Header and Receive Response.
Definition: IfxAsclin_Lin.h:333
IfxAsclin_Lin_BaudrateGeneration::baudrate
float32 baudrate
value of the required baudrate
Definition: IfxAsclin_Lin.h:411
IfxAsclin_getTxFifoOverflowFlagStatus
IFX_INLINE boolean IfxAsclin_getTxFifoOverflowFlagStatus(Ifx_ASCLIN *asclin)
Returns the Tx FIFO overflow flag status.
Definition: IfxAsclin.h:2120
IfxAsclin_Lin_receiveHeader
void IfxAsclin_Lin_receiveHeader(IfxAsclin_Lin *asclin, uint8 *id)
Receives the header.
Definition: IfxAsclin_Lin.c:516
IfxAsclin_Lin_readResponse
IFX_INLINE void IfxAsclin_Lin_readResponse(IfxAsclin_Lin *asclin, uint8 *data, uint32 length)
Reads the response.
Definition: IfxAsclin_Lin.h:850
IfxAsclin_Lin_ErrorFlags::collisionDetectionError
uint8 collisionDetectionError
collision detection error
Definition: IfxAsclin_Lin.h:455
IfxAsclin_Lin_FrameControl::shiftDir
IfxAsclin_ShiftDirection shiftDir
FRAMECON.MSB, shift direction.
Definition: IfxAsclin_Lin.h:477
IfxAsclin_ClockSource_ascFastClock
f asclinf wiil be supplied
Definition: IfxAsclin.h:112
IfxAsclin_enableModule
void IfxAsclin_enableModule(Ifx_ASCLIN *asclin)
Enables the module.
Definition: IfxAsclin.c:70
IfxAsclin_Lin_PduType::dataLength
uint8 dataLength
Length of LIN Response.
Definition: IfxAsclin_Lin.h:568
IfxAsclin_Lin_Pins::pinDriver
IfxPort_PadDriver pinDriver
pad driver
Definition: IfxAsclin_Lin.h:522
IfxAsclin_Lin_receiveResponse
void IfxAsclin_Lin_receiveResponse(IfxAsclin_Lin *asclin, uint8 *data, uint32 length)
Receives the response.
Definition: IfxAsclin_Lin.c:533
IfxAsclin_setLinHeaderTimeout
IFX_INLINE void IfxAsclin_setLinHeaderTimeout(Ifx_ASCLIN *asclin, uint8 timeout)
Sets the LIN header timeout.
Definition: IfxAsclin.h:2315
IfxAsclin_getLinParityErrorFlagStatus
IFX_INLINE boolean IfxAsclin_getLinParityErrorFlagStatus(Ifx_ASCLIN *asclin)
Returns the LIN parity error flag status.
Definition: IfxAsclin.h:2006
IfxAsclin_Lin_PduType::checksumMode
IfxAsclin_Checksum checksumMode
LIN Checksum Mode.
Definition: IfxAsclin_Lin.h:571
IfxAsclin_Lin_checkForTransmittedHeaderFlags
void IfxAsclin_Lin_checkForTransmittedHeaderFlags(IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for transmitted header
Definition: IfxAsclin_Lin.c:148
IfxAsclin_flushTxFifo
IFX_INLINE void IfxAsclin_flushTxFifo(Ifx_ASCLIN *asclin)
Flushes (empties) the Tx FIFO.
Definition: IfxAsclin.h:1940
IfxAsclin_Lin_ErrorFlags::breakDetected
uint8 breakDetected
break detected
Definition: IfxAsclin_Lin.h:451
IfxAsclin_Lin::isInterruptMode
boolean isInterruptMode
Value to indicate if APIs work in Polling mode or Interrupt mode.
Definition: IfxAsclin_Lin.h:537
IfxAsclin_clearTxResponseEndFlag
IFX_INLINE void IfxAsclin_clearTxResponseEndFlag(Ifx_ASCLIN *asclin)
Clears the transmit response end flag.
Definition: IfxAsclin.h:1748
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxAsclin_Lin_Pins
Structure for LIN pin configuration.
Definition: IfxAsclin_Lin.h:516
IfxAsclin_Lin_ErrorFlags::headerTimeout
uint8 headerTimeout
header timeout
Definition: IfxAsclin_Lin.h:449
IfxAsclin_Lin_checkForReceivedResponseFlags
void IfxAsclin_Lin_checkForReceivedResponseFlags(IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for received response
Definition: IfxAsclin_Lin.c:98
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
IfxAsclin_initRxPin
IFX_INLINE void IfxAsclin_initRxPin(const IfxAsclin_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a RX input.
Definition: IfxAsclin.h:2157
IfxAsclin_setBrdUpperlimt
IFX_INLINE void IfxAsclin_setBrdUpperlimt(Ifx_ASCLIN *asclin, uint8 limit)
Sets the baudrate detection&#39;s upper limit.
Definition: IfxAsclin.h:2213
IfxAsclin_Lin::receiveIdEnable
boolean receiveIdEnable
setting to receive Id in Rx Fifo after sending it
Definition: IfxAsclin_Lin.h:536
IfxAsclin_Lin_DataControl::dataLength
IfxAsclin_DataLength dataLength
DATCON.DATALENGTH, data length, number of bits per transfer.
Definition: IfxAsclin_Lin.h:437
IfxAsclin_clearAllFlags
IFX_INLINE void IfxAsclin_clearAllFlags(Ifx_ASCLIN *asclin)
clears all the flags
Definition: IfxAsclin.h:1616
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxAsclin_Lin_ErrorFlags::responseTimeout
uint8 responseTimeout
response timeout
Definition: IfxAsclin_Lin.h:450
IfxAsclin_Lin_EnabledInterrupts::exTransmitFIFOOverflow
uint16 exTransmitFIFOOverflow
Transmit FIFO Overflow.
Definition: IfxAsclin_Lin.h:362
IfxAsclin_Lin_ignoreHeader
void IfxAsclin_Lin_ignoreHeader(IfxAsclin_Lin *asclin)
Ignores the latest header.
Definition: IfxAsclin_Lin.c:257
IfxAsclin_Lin_Config::frame
IfxAsclin_Lin_FrameControl frame
structure for frame control
Definition: IfxAsclin_Lin.h:551
IfxAsclin_Lin_FifoControl::outWidth
IfxAsclin_RxFifoOutletWidth outWidth
RXFIFOCON.OTW, receive FIFO oulet width.
Definition: IfxAsclin_Lin.h:466
IfxAsclin_Lin_EnabledInterrupts::txTransmittedResponse
uint16 txTransmittedResponse
Transmitted Response.
Definition: IfxAsclin_Lin.h:351
IfxAsclin_Lin_initModule
IfxAsclin_Status IfxAsclin_Lin_initModule(IfxAsclin_Lin *asclin, const IfxAsclin_Lin_Config *config)
Initialises the module.
Definition: IfxAsclin_Lin.c:266
IfxAsclin_Lin::acknowledgmentFlags
IfxAsclin_Lin_AcknowledgementFlags acknowledgmentFlags
structure for acknowledgement flags
Definition: IfxAsclin_Lin.h:534
IfxAsclin_Lin_isrTransmit
void IfxAsclin_Lin_isrTransmit(IfxAsclin_Lin *asclin)
ISR transmit routine.
Definition: IfxAsclin_Lin.c:853
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxAsclin_ChecksumInjection_written
checksum byte is written
Definition: IfxAsclin.h:93
IfxAsclin_Lin_BitSamplingControl::filterDepth
uint8 filterDepth
IOCR.DEPTH, digital glitch filter depth.
Definition: IfxAsclin_Lin.h:420
IfxAsclin_Lin_PduType::direction
IfxAsclin_Lin_Direction direction
Direction Control (Tx Header only, Tx both Header and Response, Tx Header and Rx Response) ...
Definition: IfxAsclin_Lin.h:570
IfxAsclin_clearLinAutoBaudDetectionErrorFlag
IFX_INLINE void IfxAsclin_clearLinAutoBaudDetectionErrorFlag(Ifx_ASCLIN *asclin)
Clears the auto baudrate detection error flag.
Definition: IfxAsclin.h:1658
IfxAsclin_Lin_Pins::rx
IFX_CONST IfxAsclin_Rx_In * rx
LIN Rx pin.
Definition: IfxAsclin_Lin.h:518
IfxAsclin_Lin_FrameControlFlags::rxResponseErrorOccurred
uint16 rxResponseErrorOccurred
Flag to indicate error occurred during reception of Response.
Definition: IfxAsclin_Lin.h:378
IfxAsclin_setLinBreakLength
IFX_INLINE void IfxAsclin_setLinBreakLength(Ifx_ASCLIN *asclin, uint8 length)
Sets the LIN break length.
Definition: IfxAsclin.h:2309
IfxAsclin_LinResponseTimeoutMode_frameTimeout
timeout threshold is for frame
Definition: IfxAsclin.h:227
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxAsclin_enableCollisionDetection
IFX_INLINE void IfxAsclin_enableCollisionDetection(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the collision detection.
Definition: IfxAsclin.h:1772
IfxAsclin_Lin_InterruptConfig::exPriority
uint16 exPriority
error interrupt priority
Definition: IfxAsclin_Lin.h:499
IfxAsclin_Lin_FrameControlFlags::txResponseErrorOccurred
uint16 txResponseErrorOccurred
Flag to indicate error occurred during transmission of Response.
Definition: IfxAsclin_Lin.h:376
IfxAsclin_Lin_prepareHeaderReception
IFX_INLINE void IfxAsclin_Lin_prepareHeaderReception(IfxAsclin_Lin *asclin)
Prepares the module to receive the header.
Definition: IfxAsclin_Lin.h:822
IfxAsclin_Lin_EnabledInterrupts::txTransmittedHeader
uint16 txTransmittedHeader
Transmitted Header.
Definition: IfxAsclin_Lin.h:350
IfxAsclin_setParityType
IFX_INLINE void IfxAsclin_setParityType(Ifx_ASCLIN *asclin, IfxAsclin_ParityType type)
Sets the parity type.
Definition: IfxAsclin.h:2351
IfxAsclin_Lin_FrameDataControl::rxResponseLength
uint8 rxResponseLength
Length of received response.
Definition: IfxAsclin_Lin.h:489
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxAsclin_setBitTiming
boolean IfxAsclin_setBitTiming(Ifx_ASCLIN *asclin, float32 baudrate, IfxAsclin_OversamplingFactor oversampling, IfxAsclin_SamplePointPosition samplepoint, IfxAsclin_SamplesPerBit medianFilter)
Set the bit timing.
Definition: IfxAsclin.c:331
IfxAsclin_setTransmitHeaderRequestFlag
IFX_INLINE void IfxAsclin_setTransmitHeaderRequestFlag(Ifx_ASCLIN *asclin)
Sets the transmit header request flag.
Definition: IfxAsclin.h:2449
IfxAsclin_Lin_EnabledInterrupts::exLinAutobaudDetectionError
uint16 exLinAutobaudDetectionError
Lin Autobaud Detection Error.
Definition: IfxAsclin_Lin.h:357
IfxAsclin_Lin::linFrameData
IfxAsclin_Lin_FrameDataControl linFrameData
Structure for Lin Frame Data and Control.
Definition: IfxAsclin_Lin.h:532
IfxAsclin_setRxFifoOutletWidth
IFX_INLINE void IfxAsclin_setRxFifoOutletWidth(Ifx_ASCLIN *asclin, IfxAsclin_RxFifoOutletWidth width)
Sets the receive FIFO outlet width.
Definition: IfxAsclin.h:2387
IfxAsclin_Lin_waitForReceivedHeader
boolean IfxAsclin_Lin_waitForReceivedHeader(IfxAsclin_Lin *asclin)
waits until receive header end acknowledgemnet or an error has been detected
Definition: IfxAsclin_Lin.c:609
IfxAsclin_IdleDelay_2
idle delay in 2 bit times
Definition: IfxAsclin.h:189
IfxAsclin_Lin_ErrorFlags::frameError
uint8 frameError
frame error
Definition: IfxAsclin_Lin.h:448
IfxAsclin_Lin_Pins::tx
IFX_CONST IfxAsclin_Tx_Out * tx
LIN Tx pin.
Definition: IfxAsclin_Lin.h:520
IfxAsclin_getTxHeaderEndFlagStatus
IFX_INLINE boolean IfxAsclin_getTxHeaderEndFlagStatus(Ifx_ASCLIN *asclin)
Returns the transmit header end flag status.
Definition: IfxAsclin.h:2126
IfxAsclin_getSrcPointerTx
volatile Ifx_SRC_SRCR * IfxAsclin_getSrcPointerTx(Ifx_ASCLIN *asclin)
Returns the SRC pointer for Tx.
Definition: IfxAsclin.c:225
IfxAsclin_Lin_Config::bsc
IfxAsclin_Lin_BitSamplingControl bsc
structure for bit sampling
Definition: IfxAsclin_Lin.h:550
IfxAsclin_Lin_Config::brg
IfxAsclin_Lin_BaudrateGeneration brg
structure for baudrate generation
Definition: IfxAsclin_Lin.h:547
IfxAsclin_Lin_FrameControlFlags::rxHeaderInProgress
uint16 rxHeaderInProgress
Flag to indicate Header reception is initiated and is in progress.
Definition: IfxAsclin_Lin.h:373
IfxAsclin_Lin_Pins::txMode
IfxPort_OutputMode txMode
tx as output
Definition: IfxAsclin_Lin.h:521
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxAsclin_enableHardwareChecksum
IFX_INLINE void IfxAsclin_enableHardwareChecksum(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the hardware checksum.
Definition: IfxAsclin.h:1802
IfxAsclin_getRxResponseEndFlagStatus
IFX_INLINE boolean IfxAsclin_getRxResponseEndFlagStatus(Ifx_ASCLIN *asclin)
Returns the receive response end flag status.
Definition: IfxAsclin.h:2084
IfxAsclin_Lin_EnabledInterrupts::exTransmissionCompleted
uint16 exTransmissionCompleted
Transmission Completed.
Definition: IfxAsclin_Lin.h:353
IfxAsclin_Lin_FrameControl::parityType
IfxAsclin_ParityType parityType
FRAMECON.ODD, parity type (even or odd)
Definition: IfxAsclin_Lin.h:476
IfxAsclin_Lin_ErrorFlags::linParityError
uint8 linParityError
lin parity error
Definition: IfxAsclin_Lin.h:452
IfxAsclin_setChecksumInjection
IFX_INLINE void IfxAsclin_setChecksumInjection(Ifx_ASCLIN *asclin, IfxAsclin_ChecksumInjection csi)
Sets the checksum injection.
Definition: IfxAsclin.h:2219
IfxAsclin_setRxBufferMode
IFX_INLINE void IfxAsclin_setRxBufferMode(Ifx_ASCLIN *asclin, IfxAsclin_ReceiveBufferMode mode)
Sets the receive buffer mode.
Definition: IfxAsclin.h:2369
IfxAsclin_Status_noError
No error.
Definition: IfxAsclin.h:392
IfxAsclin_Lin_AcknowledgementFlags::txResponseEnd
uint8 txResponseEnd
transmit response end
Definition: IfxAsclin_Lin.h:390
IfxAsclin_RxFifoOutletWidth_1
number of bytes 1
Definition: IfxAsclin.h:307
IfxAsclin_HeaderResponseSelect_headerAndResponse
header and response expected
Definition: IfxAsclin.h:176
IfxAsclin_Lin_EnabledInterrupts::exBreakDetected
uint16 exBreakDetected
Break Detected.
Definition: IfxAsclin_Lin.h:352
IfxAsclin_Lin_EnabledInterrupts::exHeaderTimeout
uint16 exHeaderTimeout
Header Timeout.
Definition: IfxAsclin_Lin.h:354
IfxAsclin_Lin_DataControl::responseTimeout
uint16 responseTimeout
DATCON.RESPONSE, timeout limit.
Definition: IfxAsclin_Lin.h:441
IfxAsclin_Lin_FrameControlFlags::txSendResponse
uint16 txSendResponse
Flag to indicate Response is transmitted.
Definition: IfxAsclin_Lin.h:370
IfxAsclin_clearRxFifoOverflowFlag
IFX_INLINE void IfxAsclin_clearRxFifoOverflowFlag(Ifx_ASCLIN *asclin)
Clears the Rx FIFO overflow flag.
Definition: IfxAsclin.h:1700
IfxAsclin_setRxInput
IFX_INLINE void IfxAsclin_setRxInput(Ifx_ASCLIN *asclin, IfxAsclin_RxInputSelect alti)
Selects the alternate input for Rx signal.
Definition: IfxAsclin.h:2393
IfxAsclin_Lin_PduType::pid
uint8 pid
PID of LIN Header.
Definition: IfxAsclin_Lin.h:567
IfxAsclin_Rx_In
RX pin mapping structure.
Definition: IfxAsclin_PinMap.h:64
IfxAsclin_clearRxHeaderEndFlag
IFX_INLINE void IfxAsclin_clearRxHeaderEndFlag(Ifx_ASCLIN *asclin)
Clears the receive header end flag.
Definition: IfxAsclin.h:1712
IfxAsclin_Lin_initModuleConfig
void IfxAsclin_Lin_initModuleConfig(IfxAsclin_Lin_Config *config, Ifx_ASCLIN *asclin)
Fills the config structure with default values.
Definition: IfxAsclin_Lin.c:439
IfxAsclin_Lin_FrameControlFlags::rxHeaderErrorOccurred
uint16 rxHeaderErrorOccurred
Flag to indicate error occurred during reception of Header.
Definition: IfxAsclin_Lin.h:377
IfxAsclin_Lin_ErrorFlags::txFifoOverflow
uint8 txFifoOverflow
transmit FIFO overflow error
Definition: IfxAsclin_Lin.h:457
IfxAsclin_setChecksumMode
IFX_INLINE void IfxAsclin_setChecksumMode(Ifx_ASCLIN *asclin, IfxAsclin_Checksum mode)
Sets the checksum mode.
Definition: IfxAsclin.h:2225
IfxAsclin_DataLength
IfxAsclin_DataLength
Number of bits per transfer Definition in Ifx_ASCLIN.FRAMECON.B.DATALEN.
Definition: IfxAsclin.h:130
IfxAsclin_Lin_Config::btc
IfxAsclin_Lin_BitTimingControl btc
structure for bit timings
Definition: IfxAsclin_Lin.h:549
IfxAsclin_clearFrameErrorFlag
IFX_INLINE void IfxAsclin_clearFrameErrorFlag(Ifx_ASCLIN *asclin)
Clears the frame error flag.
Definition: IfxAsclin.h:1640
IfxAsclin_Lin_FrameDataControl::txResponseLength
uint8 txResponseLength
Length of transmitted response.
Definition: IfxAsclin_Lin.h:488
IfxAsclin_Lin_ErrorFlags::linChecksumError
uint8 linChecksumError
lin checksum error
Definition: IfxAsclin_Lin.h:454
IfxAsclin_Lin_BaudrateDetection::lowerLimit
uint8 lowerLimit
BRD.LOWERLIMIT, auto baudrate detection lowerlimit.
Definition: IfxAsclin_Lin.h:401
IfxAsclin_Lin_Config::pins
IFX_CONST IfxAsclin_Lin_Pins * pins
structure for LIN pins
Definition: IfxAsclin_Lin.h:555
IfxAsclin_setLeadDelay
IFX_INLINE void IfxAsclin_setLeadDelay(Ifx_ASCLIN *asclin, IfxAsclin_LeadDelay delay)
Sets the lead delay.
Definition: IfxAsclin.h:2303
IfxSrc_Tos_dma
DMA interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:69
IfxAsclin_Lin_FrameDataControl::flags
IfxAsclin_Lin_FrameControlFlags flags
LIN frame control flags.
Definition: IfxAsclin_Lin.h:490
IfxAsclin_setLinResponseTimeoutThreshold
IFX_INLINE void IfxAsclin_setLinResponseTimeoutThreshold(Ifx_ASCLIN *asclin, uint16 threshold)
Sets the LIN response timeout threshold.
Definition: IfxAsclin.h:2333
IfxAsclin_setPrescaler
IFX_INLINE void IfxAsclin_setPrescaler(Ifx_ASCLIN *asclin, uint16 prescaler)
Sets the division ratio of the predivider (prescaler)
Definition: IfxAsclin.h:2357
IfxAsclin_getLinChecksumErrorFlagStatus
IFX_INLINE boolean IfxAsclin_getLinChecksumErrorFlagStatus(Ifx_ASCLIN *asclin)
Returns the LIN checksum error flag status.
Definition: IfxAsclin.h:2000
IfxAsclin_Lin_isrError
void IfxAsclin_Lin_isrError(IfxAsclin_Lin *asclin)
ISR error routine.
Definition: IfxAsclin_Lin.c:708
IfxAsclin_Lin_checkForTransmittedResponseFlags
void IfxAsclin_Lin_checkForTransmittedResponseFlags(IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for transmitted response
Definition: IfxAsclin_Lin.c:186
IfxAsclin_setHeaderResponseSelect
IFX_INLINE void IfxAsclin_setHeaderResponseSelect(Ifx_ASCLIN *asclin, IfxAsclin_HeaderResponseSelect type)
Sets the header response selection.
Definition: IfxAsclin.h:2279
IfxAsclin_Lin_Config::frameMode
IfxAsclin_FrameMode frameMode
FRAMECON.MODE, mode of operation of the module (ASC, SPI, LIN)
Definition: IfxAsclin_Lin.h:545
IfxAsclin_getTxResponseEndFlagStatus
IFX_INLINE boolean IfxAsclin_getTxResponseEndFlagStatus(Ifx_ASCLIN *asclin)
Returns the transmit response end flag status.
Definition: IfxAsclin.h:2132
IfxAsclin_HeaderResponseSelect_headerOnly
header only expected
Definition: IfxAsclin.h:177
IfxAsclin_clearHeaderTimeoutFlag
IFX_INLINE void IfxAsclin_clearHeaderTimeoutFlag(Ifx_ASCLIN *asclin)
Clears the header timeout flag.
Definition: IfxAsclin.h:1646
IfxAsclin_ParityType_even
even parity
Definition: IfxAsclin.h:256
IfxAsclin_enableAutoBaudrateDetection
IFX_INLINE void IfxAsclin_enableAutoBaudrateDetection(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the auto baudrate detection.
Definition: IfxAsclin.h:1760
IfxAsclin_Lin_Config::brd
IfxAsclin_Lin_BaudrateDetection brd
structure for baudrate detection
Definition: IfxAsclin_Lin.h:548
IfxAsclin_Lin_prepareResponseReception
IFX_INLINE void IfxAsclin_Lin_prepareResponseReception(IfxAsclin_Lin *asclin, uint32 length)
Prepares the module to Receive the response.
Definition: IfxAsclin_Lin.h:832
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:68
IfxAsclin_setLinMode
IFX_INLINE void IfxAsclin_setLinMode(Ifx_ASCLIN *asclin, IfxAsclin_LinMode mode)
Sets the LIN mode of operation.
Definition: IfxAsclin.h:2321
IfxAsclin_Lin_Config::interrupt
IfxAsclin_Lin_InterruptConfig interrupt
structure for lin interrupt configuration
Definition: IfxAsclin_Lin.h:558
IfxAsclin_getSrcPointerRx
volatile Ifx_SRC_SRCR * IfxAsclin_getSrcPointerRx(Ifx_ASCLIN *asclin)
Returns the SRC pointer for Rx.
Definition: IfxAsclin.c:192
IfxAsclin_Lin_FrameDataControl::rxResponseData
uint8 rxResponseData[8]
Array to store received response data.
Definition: IfxAsclin_Lin.h:486
IfxAsclin_Lin_BitSamplingControl::samplePointPosition
IfxAsclin_SamplePointPosition samplePointPosition
BITCON.SAMPLEPOINT, sample point position.
Definition: IfxAsclin_Lin.h:422
IfxAsclin_flushRxFifo
IFX_INLINE void IfxAsclin_flushRxFifo(Ifx_ASCLIN *asclin)
Flushes (empties) the Rx FIFO.
Definition: IfxAsclin.h:1934
IfxAsclin_Lin_Pins::rxMode
IfxPort_InputMode rxMode
rx pin as input
Definition: IfxAsclin_Lin.h:519
IfxAsclin_Lin_Config
Configuration structure of the module.
Definition: IfxAsclin_Lin.h:542
IfxAsclin_Lin_InterruptConfig::typeOfService
IfxSrc_Tos typeOfService
type of interrupt service
Definition: IfxAsclin_Lin.h:500
IfxAsclin_FrameMode_lin
lin mode
Definition: IfxAsclin.h:168
IfxAsclin_Lin::asclin
Ifx_ASCLIN * asclin
pointer to ASCLIN registers
Definition: IfxAsclin_Lin.h:531
IfxAsclin_Lin_InterruptConfig::enabledInterrupt
IfxAsclin_Lin_EnabledInterrupts enabledInterrupt
Interrupts which have to be enabled during initialisation as configured by application. Does not reflect current status of FLAGSENABLE register.
Definition: IfxAsclin_Lin.h:501
IfxAsclin_clearCollisionDetectionErrorFlag
IFX_INLINE void IfxAsclin_clearCollisionDetectionErrorFlag(Ifx_ASCLIN *asclin)
Clears the collision detection error flag.
Definition: IfxAsclin.h:1628
IfxAsclin_Lin_Direction_TransmitHeader
Transmit Header.
Definition: IfxAsclin_Lin.h:331
IfxAsclin_Lin_waitForReceivedResponse
boolean IfxAsclin_Lin_waitForReceivedResponse(IfxAsclin_Lin *asclin)
waits until receive response end acknowledgemnet or an error has been detected
Definition: IfxAsclin_Lin.c:634
IfxAsclin_Lin_ErrorFlags::rxFifoOverflow
uint8 rxFifoOverflow
receive FIFO overflow error
Definition: IfxAsclin_Lin.h:456
IfxAsclin_SamplePointPosition_3
sample point position at 3
Definition: IfxAsclin.h:334
IfxAsclin_Lin_BitTimingControl::oversampling
IfxAsclin_OversamplingFactor oversampling
BITCON.OVERSAMPLING, postdivider, used for oversampling.
Definition: IfxAsclin_Lin.h:430
IfxAsclin_enableParity
IFX_INLINE void IfxAsclin_enableParity(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the parity bit attachment to tha data bits.
Definition: IfxAsclin.h:1838
IfxAsclin_Lin_BaudrateDetection::abd
boolean abd
LINCON.ABD, autobaud detection enable.
Definition: IfxAsclin_Lin.h:400
IfxAsclin_clearLinParityErrorFlag
IFX_INLINE void IfxAsclin_clearLinParityErrorFlag(Ifx_ASCLIN *asclin)
Clears the LIN parity error flag.
Definition: IfxAsclin.h:1670
IfxAsclin_disableAllFlags
IFX_INLINE void IfxAsclin_disableAllFlags(Ifx_ASCLIN *asclin)
disables all flags
Definition: IfxAsclin.h:1754
IfxAsclin_Lin_disableModule
void IfxAsclin_Lin_disableModule(IfxAsclin_Lin *asclin)
Disables the module.
Definition: IfxAsclin_Lin.c:247
IfxAsclin_Lin_sendHeader
void IfxAsclin_Lin_sendHeader(IfxAsclin_Lin *asclin, uint8 *id)
Sends the header.
Definition: IfxAsclin_Lin.c:550
IfxAsclin_initTxPin
IFX_INLINE void IfxAsclin_initTxPin(const IfxAsclin_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a TX output.
Definition: IfxAsclin.h:2182
IfxAsclin_clearRxResponseEndFlag
IFX_INLINE void IfxAsclin_clearRxResponseEndFlag(Ifx_ASCLIN *asclin)
Clears the receive response end flag.
Definition: IfxAsclin.h:1718
IfxAsclin_setTxFifoInletWidth
IFX_INLINE void IfxAsclin_setTxFifoInletWidth(Ifx_ASCLIN *asclin, IfxAsclin_TxFifoInletWidth width)
Sets the transmit FIFO inlet width.
Definition: IfxAsclin.h:2467
IfxAsclin_write8
uint32 IfxAsclin_write8(Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
Writes data up to 8 bits.
Definition: IfxAsclin.c:476
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxAsclin_Lin_AcknowledgementFlags::rxHeaderEnd
uint8 rxHeaderEnd
receive header end
Definition: IfxAsclin_Lin.h:391
IfxAsclin_enableTxFifoOutlet
IFX_INLINE void IfxAsclin_enableTxFifoOutlet(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the transmit FIFO outlet to allow transmission.
Definition: IfxAsclin.h:1910
IfxAsclin_Lin_EnabledInterrupts::rxReceivedResponse
uint16 rxReceivedResponse
Received Response.
Definition: IfxAsclin_Lin.h:349
IfxAsclin_Lin_FrameControlFlags::rxResponseInProgress
uint16 rxResponseInProgress
Flag to indicate Response reception is initiated and is in progress.
Definition: IfxAsclin_Lin.h:374
IfxAsclin_setFrameMode
IFX_INLINE void IfxAsclin_setFrameMode(Ifx_ASCLIN *asclin, IfxAsclin_FrameMode mode)
Selects the module&#39;s mode of operation.
Definition: IfxAsclin.h:2273
IfxAsclin_Lin_FrameControl::parityEnable
boolean parityEnable
FRAMECON.PEN, parity enable.
Definition: IfxAsclin_Lin.h:478
IfxAsclin_getRxFifoOverflowFlagStatus
IFX_INLINE boolean IfxAsclin_getRxFifoOverflowFlagStatus(Ifx_ASCLIN *asclin)
Returns the Rx FIFO overflow flag status.
Definition: IfxAsclin.h:2066
IfxAsclin_clearTxHeaderEndFlag
IFX_INLINE void IfxAsclin_clearTxHeaderEndFlag(Ifx_ASCLIN *asclin)
Clears the transmit header end flag.
Definition: IfxAsclin.h:1742
IfxAsclin_Lin_Config::data
IfxAsclin_Lin_DataControl data
structure for data control
Definition: IfxAsclin_Lin.h:553
IfxAsclin_Lin_FrameControl::leadDelay
IfxAsclin_LeadDelay leadDelay
FRAMECON.LEAD, lead delay.
Definition: IfxAsclin_Lin.h:474
IfxAsclin_Lin::errorFlagsStatus
IfxAsclin_Lin_ErrorFlags errorFlagsStatus
structure for error flags status
Definition: IfxAsclin_Lin.h:535
IfxAsclin_StopBit_1
number of stop bits 1
Definition: IfxAsclin.h:401
IfxAsclin_Lin_FrameDataControl::headerID
uint8 headerID
header ID
Definition: IfxAsclin_Lin.h:487
IfxAsclin_Lin_FrameControlFlags::txHeaderErrorOccurred
uint16 txHeaderErrorOccurred
Flag to indicate error occurred during transmission of Header.
Definition: IfxAsclin_Lin.h:375
IfxAsclin_RxInputSelect_0
alternate input selection 0
Definition: IfxAsclin.h:317
IfxAsclin_LinMode_slave
operates in slave mode
Definition: IfxAsclin.h:218
IfxAsclin_Lin_Config::lin
IfxAsclin_Lin_LinControl lin
structure for lin control
Definition: IfxAsclin_Lin.h:554
IfxAsclin_LinMode_master
operates in master mode
Definition: IfxAsclin.h:219
IfxAsclin_LeadDelay_1
lead delay in 1 bit times
Definition: IfxAsclin.h:204
IfxAsclin_Lin_EnabledInterrupts::exCollisionDetectionError
uint16 exCollisionDetectionError
Collision Detection Error.
Definition: IfxAsclin_Lin.h:360
IfxAsclin_getBreakDetectedFlagStatus
IFX_INLINE boolean IfxAsclin_getBreakDetectedFlagStatus(Ifx_ASCLIN *asclin)
Returns the break detected flag status.
Definition: IfxAsclin.h:1946
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxAsclin_Lin_LinControl::csEnable
boolean csEnable
LINCON.CSEN, hardware checksum generation and checking.
Definition: IfxAsclin_Lin.h:508
IfxAsclin_enableRxFifoInlet
IFX_INLINE void IfxAsclin_enableRxFifoInlet(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the receive FIFO outlet to allow filling of Rx FIFO through shift register...
Definition: IfxAsclin.h:1868
IfxAsclin_setTransmitResponseRequestFlag
IFX_INLINE void IfxAsclin_setTransmitResponseRequestFlag(Ifx_ASCLIN *asclin)
Sets the transmit response request flag.
Definition: IfxAsclin.h:2455
IfxAsclin_Lin_DataControl::headerOnly
IfxAsclin_HeaderResponseSelect headerOnly
DATCON.HO, Lin frame with header and response or header only.
Definition: IfxAsclin_Lin.h:438
IfxAsclin_Lin_isrReceive
void IfxAsclin_Lin_isrReceive(IfxAsclin_Lin *asclin)
ISR receive routine.
Definition: IfxAsclin_Lin.c:830
IfxAsclin_ClockSource_noClock
no clock will be supplied
Definition: IfxAsclin.h:111
IfxAsclin_Lin.h
ASCLIN LIN details.
IfxAsclin_Lin_waitForTransmittedResponse
boolean IfxAsclin_Lin_waitForTransmittedResponse(IfxAsclin_Lin *asclin)
waits until transmit response end acknowledgemnet or an error has been detected
Definition: IfxAsclin_Lin.c:684
IfxAsclin_getHeaderTimeoutFlagStatus
IFX_INLINE boolean IfxAsclin_getHeaderTimeoutFlagStatus(Ifx_ASCLIN *asclin)
Returns the header timeout flag status.
Definition: IfxAsclin.h:1982
IfxAsclin_Lin_checkForReceivedHeaderFlags
void IfxAsclin_Lin_checkForReceivedHeaderFlags(IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for received header
Definition: IfxAsclin_Lin.c:54
IfxAsclin_Lin_DataControl::checksum
IfxAsclin_Checksum checksum
DATCON.CSM, checksum mode (classic or enhanced)
Definition: IfxAsclin_Lin.h:440
IfxAsclin_Lin_Direction_TransmitHeaderAndResponse
Transmit both Header and Response.
Definition: IfxAsclin_Lin.h:332
IfxAsclin_getTransmissionCompletedFlagStatus
IFX_INLINE boolean IfxAsclin_getTransmissionCompletedFlagStatus(Ifx_ASCLIN *asclin)
Returns the transmission pending flag status.
Definition: IfxAsclin.h:2090
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxAsclin_Lin
Definition: IfxAsclin_Lin.h:529
IfxAsclin_TxFifoInletWidth_1
number of bytes 1
Definition: IfxAsclin.h:425
IfxAsclin_clearLinChecksumErrorFlag
IFX_INLINE void IfxAsclin_clearLinChecksumErrorFlag(Ifx_ASCLIN *asclin)
Clears the LIN checksum error flag.
Definition: IfxAsclin.h:1664
IfxAsclin_Lin_clearFlagsStatus
void IfxAsclin_Lin_clearFlagsStatus(IfxAsclin_Lin *asclin)
clears the flags status structures
Definition: IfxAsclin_Lin.c:224
IfxAsclin_Lin_AcknowledgementFlags::txHeaderEnd
uint8 txHeaderEnd
transmit header end
Definition: IfxAsclin_Lin.h:389
IfxAsclin_Lin_readHeader
IFX_INLINE void IfxAsclin_Lin_readHeader(IfxAsclin_Lin *asclin, uint8 *id)
Reads the header.
Definition: IfxAsclin_Lin.h:843
IfxAsclin_getRxHeaderEndFlagStatus
IFX_INLINE boolean IfxAsclin_getRxHeaderEndFlagStatus(Ifx_ASCLIN *asclin)
Returns the receive header end flag status.
Definition: IfxAsclin.h:2078
IfxAsclin_Lin_Config::alti
IfxAsclin_RxInputSelect alti
IOCR.ALTI, Rx input (alternate input) pin selection.
Definition: IfxAsclin_Lin.h:557
IfxAsclin_Lin::linMode
IfxAsclin_LinMode linMode
LINCON.MS, lin mode of operation (master or slave)
Definition: IfxAsclin_Lin.h:533
IfxAsclin_clearTransmissionCompletedFlag
IFX_INLINE void IfxAsclin_clearTransmissionCompletedFlag(Ifx_ASCLIN *asclin)
Clears the transmission pending flag.
Definition: IfxAsclin.h:1724
IfxAsclin_Lin_FrameControl::idleDelay
IfxAsclin_IdleDelay idleDelay
FRAMECON.IDLE, idle delay.
Definition: IfxAsclin_Lin.h:473
IfxAsclin_FrameMode_initialise
initialise mode
Definition: IfxAsclin.h:165
IfxAsclin_DataLength_8
number of bits per transfer 7
Definition: IfxAsclin.h:139
IfxAsclin_Lin_LinControl::csi
IfxAsclin_ChecksumInjection csi
LINCON.CSI, checksum injection (not written or written) into RxFIFO.
Definition: IfxAsclin_Lin.h:509
IfxAsclin_setBrdLowerlimt
IFX_INLINE void IfxAsclin_setBrdLowerlimt(Ifx_ASCLIN *asclin, uint8 limit)
Sets the baudrate detection&#39;s lower limit.
Definition: IfxAsclin.h:2207
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxAsclin_SamplesPerBit_one
one sample per bit
Definition: IfxAsclin.h:354
IfxAsclin_Lin_FrameControl::collisionDetectionEnable
boolean collisionDetectionEnable
FRAMECON.CEN, collision detection enable.
Definition: IfxAsclin_Lin.h:479
IfxAsclin_Lin_waitForTransmittedHeader
boolean IfxAsclin_Lin_waitForTransmittedHeader(IfxAsclin_Lin *asclin)
waits until transmit header end acknowledgemnet or an error has been detected
Definition: IfxAsclin_Lin.c:660
IfxAsclin_setStopBit
IFX_INLINE void IfxAsclin_setStopBit(Ifx_ASCLIN *asclin, IfxAsclin_StopBit stopBit)
Sets the number of stop bits.
Definition: IfxAsclin.h:2432
IfxAsclin_Lin_EnabledInterrupts::exReceiveFIFOOverflow
uint16 exReceiveFIFOOverflow
Receive FIFO Overflow.
Definition: IfxAsclin_Lin.h:361
IfxAsclin_Lin_AcknowledgementFlags::rxResponseEnd
uint8 rxResponseEnd
receive response end
Definition: IfxAsclin_Lin.h:392
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxAsclin_Lin_EnabledInterrupts::exLinParityError
uint16 exLinParityError
Lin Parity Error.
Definition: IfxAsclin_Lin.h:356
IfxAsclin_setShiftDirection
IFX_INLINE void IfxAsclin_setShiftDirection(Ifx_ASCLIN *asclin, IfxAsclin_ShiftDirection dir)
Sets the shift direction.
Definition: IfxAsclin.h:2411
IfxAsclin_Lin_DataControl::responseTimeoutMode
IfxAsclin_LinResponseTimeoutMode responseTimeoutMode
DATCON.RM, response mode (response or frame timeout threshold)
Definition: IfxAsclin_Lin.h:439
IfxAsclin_getFrameErrorFlagStatus
IFX_INLINE boolean IfxAsclin_getFrameErrorFlagStatus(Ifx_ASCLIN *asclin)
Returns the frame error flag status.
Definition: IfxAsclin.h:1976
IfxAsclin_setDisableModuleRequest
IFX_INLINE void IfxAsclin_setDisableModuleRequest(Ifx_ASCLIN *asclin)
Sets the disable module request.
Definition: IfxAsclin.h:2255
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxAsclin_clearBreakDetectedFlag
IFX_INLINE void IfxAsclin_clearBreakDetectedFlag(Ifx_ASCLIN *asclin)
Clears the break detected flag.
Definition: IfxAsclin.h:1622
IfxAsclin_Checksum_enhanced
enhanced checksum
Definition: IfxAsclin.h:84
IfxAsclin_clearTxFifoOverflowFlag
IFX_INLINE void IfxAsclin_clearTxFifoOverflowFlag(Ifx_ASCLIN *asclin)
Clears the Tx FIFO overflow flag.
Definition: IfxAsclin.h:1736
IfxAsclin_Status
IfxAsclin_Status
Error status.
Definition: IfxAsclin.h:389
IfxAsclin_Lin_BitSamplingControl::medianFilter
IfxAsclin_SamplesPerBit medianFilter
BITCON.SM, no. of samples per bit 1 or 3.
Definition: IfxAsclin_Lin.h:421
IfxAsclin_Lin_FrameControlFlags::txResponseInProgress
uint16 txResponseInProgress
Flag to indicate Response transmission is initiated and is in progress.
Definition: IfxAsclin_Lin.h:372
IfxAsclin_Lin_LinControl::breakLength
uint8 breakLength
LINBTIMER.BREAK, break pulse generation and detection length.
Definition: IfxAsclin_Lin.h:510
IfxAsclin_Lin_PduType
Structure to hold Lin Pdu data.
Definition: IfxAsclin_Lin.h:565
IfxAsclin_Lin_FrameControlFlags::txHeaderInProgress
uint16 txHeaderInProgress
Flag to indicate Header transmission is initiated and is in progress.
Definition: IfxAsclin_Lin.h:371
IfxAsclin_clearResponseTimeoutFlag
IFX_INLINE void IfxAsclin_clearResponseTimeoutFlag(Ifx_ASCLIN *asclin)
Clears the response timeout flag.
Definition: IfxAsclin.h:1688
IfxAsclin_Lin_PduType::dataPtr
uint8 * dataPtr
Pointer for LIN Response data.
Definition: IfxAsclin_Lin.h:569
IfxAsclin_Lin_FifoControl::buffMode
IfxAsclin_ReceiveBufferMode buffMode
RXFIFOCON.BUF, receive buffer mode (RXFIFO or RXBuffer)
Definition: IfxAsclin_Lin.h:464
IfxAsclin_setDataLength
IFX_INLINE void IfxAsclin_setDataLength(Ifx_ASCLIN *asclin, IfxAsclin_DataLength length)
Sets the data length (number of bits per transfer)
Definition: IfxAsclin.h:2243
IfxAsclin_Lin_EnabledInterrupts::exFramingError
uint16 exFramingError
Framing Error.
Definition: IfxAsclin_Lin.h:359
IfxAsclin_setClockSource
void IfxAsclin_setClockSource(Ifx_ASCLIN *asclin, IfxAsclin_ClockSource clockSource)
Sets the clock source.
Definition: IfxAsclin.c:430
IfxAsclin_Lin_FifoControl::inWidth
IfxAsclin_TxFifoInletWidth inWidth
TXFIFOCON.INW, transmit FIFO inlet width.
Definition: IfxAsclin_Lin.h:465


iLLD_TC38A: IfxAsclin_Lin.h Source File

  • Asclin
  • Lin
IfxAsclin_Lin.h
Go to the documentation of this file.
1 /**
2 * \file IfxAsclin_Lin.h
3 * \brief ASCLIN LIN details
4 * \ingroup IfxLld_Asclin
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 *
43 * \defgroup IfxLld_Asclin_Lin_Usage How to use the ASCLIN LIN Interface driver?
44 * \ingroup IfxLld_Asclin
45 *
46 * The LIN interface driver provides a default ASCLIN configuration for asynchronous serial communication in 8bit mode, and a set of data transfer routines.
47 * It supports all four elementary LIN transactions in polling mode.
48 * TxH - Transmission of Header
49 * TxR - Transmission of Response
50 * RxH - Reception of Header
51 * RxR - Reception of Response
52 *
53 * The driver also provides a LIN Master to be configured in Interrupt mode. In interrupt mode, following Lin frame transactions are provided.
54 * 1.Transmit Header only.
55 * 2.Transmit both Header and Response.
56 * 3.Transmit Header and Receive Response.
57 *
58 * In the following sections it will be described, how to integrate the driver into the application framework.
59 *
60 * \section IfxLld_Asclin_Lin_Preparation Preparation
61 * \subsection IfxLld_Asclin_Lin_Include Include Files
62 *
63 * Include following header file into your C code:
64 * \code
65 * #include <Asclin/Lin/IfxAsclin_Lin.h>
66 * \endcode
67 *
68 * \subsection IfxLld_Asclin_Lin_Variables Variables
69 *
70 * Declare the LIN handle as global variable in your C code:
71 *
72 * \code
73 * // used globally
74 * static IfxAsclin_Lin linMaster;
75 * static IfxAsclin_Lin linSlave;
76 * \endcode
77 *
78 * \subsection IfxLld_Asclin_Lin_Interrupt Interrupt Handler Installation
79 *
80 * Define priorities for the Interrrupt handlers.
81 * \code
82 *
83 * #define IFX_INTPRIO_ASCLIN1_RX 4 // Define the LIN1 receive interrupt priority.
84 * #define IFX_INTPRIO_ASCLIN1_TX 8 // Define the LIN1 transmit interrupt priority.
85 * #define IFX_INTPRIO_ASCLIN1_EX 12 // Define the LIN1 error interrupt priority.
86 *
87 * \endcode
88 *
89 * Add the interrupt service routines to your C code. They have to call the LIN interrupt handlers by passing the lin handle:
90 * \code
91 * IFX_INTERRUPT(ISR_Lin1_rx, 0, IFX_INTPRIO_ASCLIN1_RX);
92 * IFX_INTERRUPT(ISR_Lin1_tx, 0, IFX_INTPRIO_ASCLIN1_TX);
93 * IFX_INTERRUPT(ISR_Lin1_ex, 0, IFX_INTPRIO_ASCLIN1_EX);
94 *
95 * void ISR_Lin1_rx(void)
96 * {
97 * IfxAsclin_Lin_isrReceive(&linMaster);
98 * }
99 * void ISR_Lin1_tx(void)
100 * {
101 * IfxAsclin_Lin_isrTransmit(&linMaster);
102 * }
103 * void ISR_Lin1_ex(void)
104 * {
105 * IfxAsclin_Lin_isrError(&linMaster);
106 * }
107 * \endcode
108 *
109 * \subsection IfxLld_Asclin_Lin_Init Module Initialisation
110 *
111 * The module can be initialised as either Master or Slave. Here an example:
112 *
113 * \subsection IfxLld_Asclin_Lin_Init_Master Module Initialisation as Master
114 *
115 * \code
116 * // create module config
117 * IfxAsclin_Lin_Config linMasterConfig;
118 * IfxAsclin_Lin_initModuleConfig(&linMasterConfig, &MODULE_ASCLIN1);
119 *
120 * // set the lin mode of operation
121 * linMasterConfig.linMode = IfxAsclin_LinMode_master;
122 *
123 * // set the desired baudrate
124 * linMasterConfig.btc.prescaler = 4;
125 * linMasterConfig.brg.baudrate = 19200; // FDR values will be calculated in initModule
126 *
127 * // pin configuration
128 * const IfxAsclin_Lin_Pins pins = {
129 * &IfxAsclin1_RXB_P15_5_IN, IfxPort_InputMode_pullUp, // Rx pin
130 * &IfxAsclin1_TX_P15_4_OUT, IfxPort_OutputMode_pushPull, // Tx pin
131 * IfxPort_PadDriver_cmosAutomotiveSpeed1
132 * };
133 * linMasterConfig.pins = &pins;
134 *
135 * //Lin Master Interrupt Config. Only needed for interrupt mode.
136 * linConfig.isInterruptMode = TRUE;
137 * linConfig.interrupt.rxPriority = ISR_PRIORITY(INTERRUPT_LIN1_RX);
138 * linConfig.interrupt.txPriority = ISR_PRIORITY(INTERRUPT_LIN1_TX);
139 * linConfig.interrupt.exPriority = ISR_PRIORITY(INTERRUPT_LIN1_EX);
140 *
141 * //Optionally, if any interrupt has to be enabled during initialisation it can be done as follows.
142 * //Otherwise the driver will enable required interrupts during run time.
143 *
144 * linConfig.interrupt.enabledInterrupt.exCollisionDetectionError = TRUE; //This is optional example.
145 *
146 * linConfig.lin.csi = FALSE;//checksum injection not written into RxFIFO
147 *
148 * // initialize module
149 * IfxAsclin_Lin_initModule(&linMaster, &linMasterConfig);
150 * \endcode
151 *
152 * \subsection IfxLld_Asclin_Lin_Init_Slave Module Initialisation as Slave
153 *
154 * \code
155 * // create module config
156 * IfxAsclin_Lin_Config linSlaveConfig;
157 * IfxAsclin_Lin_initModuleConfig(&linSlaveConfig, &MODULE_ASCLIN1);
158 *
159 * // set the lin mode of operation
160 * linSlaveConfig.linMode = IfxAsclin_LinMode_slave;
161 *
162 * // set the desired baudrate
163 * linSlaveConfig.btc.prescaler = 4;
164 * linSlaveConfig.brg.baudrate = 19200; // FDR values will be calculated in initModule
165 *
166 * // choose the auto baudrate detection configuration
167 * linSlaveConfig.brd.abd = FALSE;
168 * linSlaveConfig.brd.lowerLimit = 0x4;
169 * linSlaveConfig.brd.upperLimit = 0xF0;
170 *
171 * // pin configuration
172 * const IfxAsclin_Lin_Pins pins = {
173 * &IfxAsclin1_RXB_P15_5_IN, IfxPort_InputMode_pullUp, // Rx pin
174 * &IfxAsclin1_TX_P15_4_OUT, IfxPort_OutputMode_pushPull, // Tx pin
175 * IfxPort_PadDriver_cmosAutomotiveSpeed1
176 * };
177 * linSlaveConfig.pins = &pins;
178 *
179 *
180 *
181 * // initialize module
182 * //IfxAsclin_Lin linSlave; // defined globally
183 * IfxAsclin_Lin_initModule(&linSlave, &linSlaveConfig);
184 * \endcode
185 *
186 * The LIN is ready for use now!
187 *
188 * \section IfxLld_Asclin_Lin_DataTransfers Data Transfers
189 *
190 * \subsection IfxLld_Asclin_Lin_DataMaster Master Transfers
191 *
192 * The LIN driver provides all three master elementary transfers.
193 *
194 * This means: you can send a header and based on the id byte, after transmission of header
195 * you can send or receive response and also can ignore the header based on the id:
196 * \code
197 * // set the id bytes
198 * uint8 txId = 0x80; // for sending respose after header
199 * uint8 rxId = 0xC1; // for receiving respose after header
200 *
201 * // prepare transmit bytes incase of sending response
202 * uint8 txData[8] = { 1, 2, 3, 4, 5, 6, 7, 8 };
203 *
204 * // prepare receive buffer incase of receiving response
205 * uint8 rxData[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
206 *
207 * uint32 size = 8;
208 *
209 * //Polling mode APIs
210 * //send response case
211 * IfxAsclin_Lin_sendHeader(&linMaster, &txId);
212 *
213 * if (lin.acknowledgmentFlags.txHeaderEnd == 1) // if the header is been transmitted succesfully
214 * {
215 * IfxAsclin_Lin_sendResponse(&linMaster, txData, size);
216 * }
217 *
218 * //receive response case
219 * IfxAsclin_Lin_sendHeader(&linMaster, &rxId);
220 *
221 * if (lin.acknowledgmentFlags.txHeaderEnd == 1) // if the header is been transmitted succesfully
222 * {
223 * IfxAsclin_Lin_receiveResponse(&linMaster, rxData, size);
224 * }
225 *
226 * //Interrupt mode APIs
227 * IfxAsclin_Lin_PduType pdu;
228 * pdu.pid = 0x42;
229 * pdu.checksumMode = IfxAsclin_Checksum_enhanced;
230 * pdu.dataLength = 8;
231 * pdu.direction = IfxAsclin_Lin_Direction_TransmitHeaderAndResponse; //Transmits both Header and Response
232 * pdu.dataPtr = &txData[0];
233 * IfxAsclin_Lin_sendFrame(&linMaster,&pdu);
234 * //Here Poll for linMaster.acknowledgmentFlags.txResponseEnd to detect end of transmission of frame.
235 *
236 * pdu.pid = 0xC4;
237 * pdu.direction = IfxAsclin_Lin_Direction_TransmitHeaderAndReceiveResponse; //Transmits Header and expects slave to respond
238 * IfxAsclin_Lin_sendFrame(&linMaster,&pdu);
239 * //Here Poll for linMaster.acknowledgmentFlags.rxResponseEnd
240 * //linMaster.linFrameData.rxResponseData[8] will have received response data if slave replies.
241 *
242 * \endcode
243 *
244 *
245 * \subsection IfxLld_Asclin_Lin_DataSlave Slave Transfers
246 *
247 * Same as master the LIN driver provides all three slave elemnatry tranfers.
248 *
249 * This means: you can receive a header and based on the id byte received,
250 * you can send or receive response and can also ignore the header based on the id:
251 * \code
252 * uint8 id; // for storing received id byte
253 *
254 * // prepare transmit bytes incase of sending response
255 * uint8 txData[8] = { 1, 2, 3, 4, 5, 6, 7, 8 };
256 *
257 * // prepare receive buffer incase of receiving response
258 * uint8 rxData[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
259 *
260 * uint32 size = 8;
261 *
262 * // receive header
263 * IfxAsclin_Lin_receiveHeader(&linSlave, &id);
264 *
265 * // if data is requsted by master
266 * if(id == txId)
267 * {
268 * IfxAsclin_Lin_sendResponse(&linSlave, txData, size); // send response
269 * }
270 *
271 * // if header is follwed by response
272 * else if(id == rxId)
273 * {
274 * IfxAsclin_Lin_receiveResponse(&linSlave, rxData, size); // receive response
275 * }
276 *
277 * // if header is not for this slave
278 * else
279 * {
280 * IfxAsclin_Lin_ignoreHeader(&linSlave);
281 * }
282 * \endcode
283 *
284 * \defgroup IfxLld_Asclin_Lin LIN
285 * \ingroup IfxLld_Asclin
286 * \defgroup IfxLld_Asclin_Lin_DataStructures Data Structures
287 * \ingroup IfxLld_Asclin_Lin
288 * \defgroup IfxLld_Asclin_Lin_ElementaryTransactions Elementary Transactions
289 * \ingroup IfxLld_Asclin_Lin
290 * \defgroup IfxLld_Asclin_Lin_ModuleFunctions Module Functions
291 * \ingroup IfxLld_Asclin_Lin
292 * \defgroup IfxLld_Asclin_Lin_errorHandlingFunctions Error Handling Functions
293 * \ingroup IfxLld_Asclin_Lin
294 * \defgroup IfxLld_Asclin_Lin_InterruptFunctions Interrupt Functions
295 * \ingroup IfxLld_Asclin_Lin
296 * \defgroup IfxLld_Asclin_Lin_Enumerations Enumerations
297 * \ingroup IfxLld_Asclin_Lin
298 */
299
300 #ifndef IFXASCLIN_LIN_H
301 #define IFXASCLIN_LIN_H 1
302
303 /******************************************************************************/
304 /*----------------------------------Includes----------------------------------*/
305 /******************************************************************************/
306
307 #include "Asclin/Std/IfxAsclin.h"
308 #include "_Utilities/Ifx_Assert.h"
309
310 /******************************************************************************/
311 /*-----------------------------------Macros-----------------------------------*/
312 /******************************************************************************/
313
314 #define IFXASCLIN_LIN_SEND_RESPONSE (0x80)
315
316 #define IFXASCLIN_LIN_RECEIVE_RESPONSE (0xC1)
317
318 /******************************************************************************/
319 /*--------------------------------Enumerations--------------------------------*/
320 /******************************************************************************/
321
322 /** \addtogroup IfxLld_Asclin_Lin_Enumerations
323 * \{ */
324 /** \brief Defines the type of Lin Master Frame.
325 * (Transmit Header only) or
326 * (Transmit Header and Response) or
327 * (Transmit Header and Receive Response).
328 */
329 typedef enum
330 {
331 IfxAsclin_Lin_Direction_TransmitHeader = 0, /**< \brief Transmit Header */
332 IfxAsclin_Lin_Direction_TransmitHeaderAndResponse = 1, /**< \brief Transmit both Header and Response */
333 IfxAsclin_Lin_Direction_TransmitHeaderAndReceiveResponse = 2 /**< \brief Transmit Header and Receive Response */
334 } IfxAsclin_Lin_Direction;
335
336 /** \} */
337
338 /******************************************************************************/
339 /*-----------------------------Data Structures--------------------------------*/
340 /******************************************************************************/
341
342 /** \addtogroup IfxLld_Asclin_Lin_DataStructures
343 * \{ */
344 /** \brief Structure to store interrupts which are enabled during initialisation.
345 */
346 typedef struct
347 {
348 uint16 rxReceivedHeader : 1; /**< \brief Received Header */
349 uint16 rxReceivedResponse : 1; /**< \brief Received Response */
350 uint16 txTransmittedHeader : 1; /**< \brief Transmitted Header */
351 uint16 txTransmittedResponse : 1; /**< \brief Transmitted Response */
352 uint16 exBreakDetected : 1; /**< \brief Break Detected */
353 uint16 exTransmissionCompleted : 1; /**< \brief Transmission Completed */
354 uint16 exHeaderTimeout : 1; /**< \brief Header Timeout */
355 uint16 exResponseTimeout : 1; /**< \brief Response Timeout */
356 uint16 exLinParityError : 1; /**< \brief Lin Parity Error */
357 uint16 exLinAutobaudDetectionError : 1; /**< \brief Lin Autobaud Detection Error */
358 uint16 exLinChecksumError : 1; /**< \brief Lin Checksum Error */
359 uint16 exFramingError : 1; /**< \brief Framing Error */
360 uint16 exCollisionDetectionError : 1; /**< \brief Collision Detection Error */
361 uint16 exReceiveFIFOOverflow : 1; /**< \brief Receive FIFO Overflow */
362 uint16 exTransmitFIFOOverflow : 1; /**< \brief Transmit FIFO Overflow */
363 } IfxAsclin_Lin_EnabledInterrupts;
364
365 /** \brief Structure for Lin Frame Control flags
366 */
367 typedef struct
368 {
369 uint16 txSendHeaderOnly : 1; /**< \brief Flag indicating that only Header is transmitted */
370 uint16 txSendResponse : 1; /**< \brief Flag to indicate Response is transmitted */
371 uint16 txHeaderInProgress : 1; /**< \brief Flag to indicate Header transmission is initiated and is in progress */
372 uint16 txResponseInProgress : 1; /**< \brief Flag to indicate Response transmission is initiated and is in progress */
373 uint16 rxHeaderInProgress : 1; /**< \brief Flag to indicate Header reception is initiated and is in progress */
374 uint16 rxResponseInProgress : 1; /**< \brief Flag to indicate Response reception is initiated and is in progress */
375 uint16 txHeaderErrorOccurred : 1; /**< \brief Flag to indicate error occurred during transmission of Header */
376 uint16 txResponseErrorOccurred : 1; /**< \brief Flag to indicate error occurred during transmission of Response */
377 uint16 rxHeaderErrorOccurred : 1; /**< \brief Flag to indicate error occurred during reception of Header */
378 uint16 rxResponseErrorOccurred : 1; /**< \brief Flag to indicate error occurred during reception of Response */
379 } IfxAsclin_Lin_FrameControlFlags;
380
381 /** \} */
382
383 /** \addtogroup IfxLld_Asclin_Lin_DataStructures
384 * \{ */
385 /** \brief Structure for Acknowledgement Flags
386 */
387 typedef struct
388 {
389 uint8 txHeaderEnd : 1; /**< \brief transmit header end */
390 uint8 txResponseEnd : 1; /**< \brief transmit response end */
391 uint8 rxHeaderEnd : 1; /**< \brief receive header end */
392 uint8 rxResponseEnd : 1; /**< \brief receive response end */
393 uint8 txCompleted : 1; /**< \brief transmission completed */
394 } IfxAsclin_Lin_AcknowledgementFlags;
395
396 /** \brief Structure for Baudrate Detection
397 */
398 typedef struct
399 {
400 boolean abd; /**< \brief LINCON.ABD, autobaud detection enable */
401 uint8 lowerLimit; /**< \brief BRD.LOWERLIMIT, auto baudrate detection lowerlimit */
402 uint8 upperLimit; /**< \brief BRD.UPPERLIMIT, auto baudrate detection upperlimit */
403 uint8 measured; /**< \brief BRD.MEASURED, measured time interval between the
404 * first and the fifth falling edge of the sync byte */
405 } IfxAsclin_Lin_BaudrateDetection;
406
407 /** \brief Structure for Baudrate Generation
408 */
409 typedef struct
410 {
411 float32 baudrate; /**< \brief value of the required baudrate */
412 uint16 numerator; /**< \brief BRG.NUMERATOR, defines the numerator of fractional divider */
413 uint16 denominator; /**< \brief BRG.DENOMINATOR, defines the denominator of fractional divider */
414 } IfxAsclin_Lin_BaudrateGeneration;
415
416 /** \brief Structure for Bit Sampling
417 */
418 typedef struct
419 {
420 uint8 filterDepth; /**< \brief IOCR.DEPTH, digital glitch filter depth */
421 IfxAsclin_SamplesPerBit medianFilter; /**< \brief BITCON.SM, no. of samples per bit 1 or 3 */
422 IfxAsclin_SamplePointPosition samplePointPosition; /**< \brief BITCON.SAMPLEPOINT, sample point position */
423 } IfxAsclin_Lin_BitSamplingControl;
424
425 /** \brief Structure for Bit Timing
426 */
427 typedef struct
428 {
429 uint16 prescaler; /**< \brief BITCON.PRESCALER, predivider to generate the baud rate */
430 IfxAsclin_OversamplingFactor oversampling; /**< \brief BITCON.OVERSAMPLING, postdivider, used for oversampling */
431 } IfxAsclin_Lin_BitTimingControl;
432
433 /** \brief Structure for Data Control
434 */
435 typedef struct
436 {
437 IfxAsclin_DataLength dataLength; /**< \brief DATCON.DATALENGTH, data length, number of bits per transfer */
438 IfxAsclin_HeaderResponseSelect headerOnly; /**< \brief DATCON.HO, Lin frame with header and response or header only */
439 IfxAsclin_LinResponseTimeoutMode responseTimeoutMode; /**< \brief DATCON.RM, response mode (response or frame timeout threshold) */
440 IfxAsclin_Checksum checksum; /**< \brief DATCON.CSM, checksum mode (classic or enhanced) */
441 uint16 responseTimeout; /**< \brief DATCON.RESPONSE, timeout limit */
442 } IfxAsclin_Lin_DataControl;
443
444 /** \brief Structure for Error Flags
445 */
446 typedef struct
447 {
448 uint8 frameError : 1; /**< \brief frame error */
449 uint8 headerTimeout : 1; /**< \brief header timeout */
450 uint8 responseTimeout : 1; /**< \brief response timeout */
451 uint8 breakDetected : 1; /**< \brief break detected */
452 uint8 linParityError : 1; /**< \brief lin parity error */
453 uint8 linAutobaudDetectionError : 1; /**< \brief lin autobaud detection error */
454 uint8 linChecksumError : 1; /**< \brief lin checksum error */
455 uint8 collisionDetectionError : 1; /**< \brief collision detection error */
456 uint8 rxFifoOverflow : 1; /**< \brief receive FIFO overflow error */
457 uint8 txFifoOverflow : 1; /**< \brief transmit FIFO overflow error */
458 } IfxAsclin_Lin_ErrorFlags;
459
460 /** \brief Structure for FIFO Control
461 */
462 typedef struct
463 {
464 IfxAsclin_ReceiveBufferMode buffMode; /**< \brief RXFIFOCON.BUF, receive buffer mode (RXFIFO or RXBuffer) */
465 IfxAsclin_TxFifoInletWidth inWidth; /**< \brief TXFIFOCON.INW, transmit FIFO inlet width */
466 IfxAsclin_RxFifoOutletWidth outWidth; /**< \brief RXFIFOCON.OTW, receive FIFO oulet width */
467 } IfxAsclin_Lin_FifoControl;
468
469 /** \brief Structure for Frame Control
470 */
471 typedef struct
472 {
473 IfxAsclin_IdleDelay idleDelay; /**< \brief FRAMECON.IDLE, idle delay */
474 IfxAsclin_LeadDelay leadDelay; /**< \brief FRAMECON.LEAD, lead delay */
475 IfxAsclin_StopBit stopBit; /**< \brief FRAMECON.STOP, number of stop bits */
476 IfxAsclin_ParityType parityType; /**< \brief FRAMECON.ODD, parity type (even or odd) */
477 IfxAsclin_ShiftDirection shiftDir; /**< \brief FRAMECON.MSB, shift direction */
478 boolean parityEnable; /**< \brief FRAMECON.PEN, parity enable */
479 boolean collisionDetectionEnable; /**< \brief FRAMECON.CEN, collision detection enable */
480 } IfxAsclin_Lin_FrameControl;
481
482 /** \brief Structure for Frame Data and Control flags
483 */
484 typedef struct
485 {
486 uint8 rxResponseData[8]; /**< \brief Array to store received response data */
487 uint8 headerID; /**< \brief header ID */
488 uint8 txResponseLength; /**< \brief Length of transmitted response */
489 uint8 rxResponseLength; /**< \brief Length of received response */
490 IfxAsclin_Lin_FrameControlFlags flags; /**< \brief LIN frame control flags */
491 } IfxAsclin_Lin_FrameDataControl;
492
493 /** \brief Structure for LIN Interrupt Configuration
494 */
495 typedef struct
496 {
497 uint16 txPriority; /**< \brief transmit interrupt priority */
498 uint16 rxPriority; /**< \brief receive interrupt priority */
499 uint16 exPriority; /**< \brief error interrupt priority */
500 IfxSrc_Tos typeOfService; /**< \brief type of interrupt service */
501 IfxAsclin_Lin_EnabledInterrupts enabledInterrupt; /**< \brief Interrupts which have to be enabled during initialisation as configured by application. Does not reflect current status of FLAGSENABLE register. */
502 } IfxAsclin_Lin_InterruptConfig;
503
504 /** \brief Structure for lin Control
505 */
506 typedef struct
507 {
508 boolean csEnable; /**< \brief LINCON.CSEN, hardware checksum generation and checking */
509 IfxAsclin_ChecksumInjection csi; /**< \brief LINCON.CSI, checksum injection (not written or written) into RxFIFO */
510 uint8 breakLength; /**< \brief LINBTIMER.BREAK, break pulse generation and detection length */
511 uint8 headerTimeout; /**< \brief LINHTIMER.HEADER, header timeout threshold value */
512 } IfxAsclin_Lin_LinControl;
513
514 /** \brief Structure for LIN pin configuration
515 */
516 typedef struct
517 {
518 IFX_CONST IfxAsclin_Rx_In *rx; /**< \brief LIN Rx pin */
519 IfxPort_InputMode rxMode; /**< \brief rx pin as input */
520 IFX_CONST IfxAsclin_Tx_Out *tx; /**< \brief LIN Tx pin */
521 IfxPort_OutputMode txMode; /**< \brief tx as output */
522 IfxPort_PadDriver pinDriver; /**< \brief pad driver */
523 } IfxAsclin_Lin_Pins;
524
525 /** \} */
526
527 /** \addtogroup IfxLld_Asclin_Lin_DataStructures
528 * \{ */
529 typedef struct
530 {
531 Ifx_ASCLIN *asclin; /**< \brief pointer to ASCLIN registers */
532 IfxAsclin_Lin_FrameDataControl linFrameData; /**< \brief Structure for Lin Frame Data and Control */
533 IfxAsclin_LinMode linMode; /**< \brief LINCON.MS, lin mode of operation (master or slave) */
534 IfxAsclin_Lin_AcknowledgementFlags acknowledgmentFlags; /**< \brief structure for acknowledgement flags */
535 IfxAsclin_Lin_ErrorFlags errorFlagsStatus; /**< \brief structure for error flags status */
536 boolean receiveIdEnable; /**< \brief setting to receive Id in Rx Fifo after sending it */
537 boolean isInterruptMode; /**< \brief Value to indicate if APIs work in Polling mode or Interrupt mode */
538 } IfxAsclin_Lin;
539
540 /** \brief Configuration structure of the module
541 */
542 typedef struct
543 {
544 Ifx_ASCLIN *asclin; /**< \brief pointer to ASCLIN registers */
545 IfxAsclin_FrameMode frameMode; /**< \brief FRAMECON.MODE, mode of operation of the module (ASC, SPI, LIN) */
546 IfxAsclin_LinMode linMode; /**< \brief LINCON.MS, lin mode of operation (master or slave) */
547 IfxAsclin_Lin_BaudrateGeneration brg; /**< \brief structure for baudrate generation */
548 IfxAsclin_Lin_BaudrateDetection brd; /**< \brief structure for baudrate detection */
549 IfxAsclin_Lin_BitTimingControl btc; /**< \brief structure for bit timings */
550 IfxAsclin_Lin_BitSamplingControl bsc; /**< \brief structure for bit sampling */
551 IfxAsclin_Lin_FrameControl frame; /**< \brief structure for frame control */
552 IfxAsclin_Lin_FifoControl fifo; /**< \brief structure for FIFO control */
553 IfxAsclin_Lin_DataControl data; /**< \brief structure for data control */
554 IfxAsclin_Lin_LinControl lin; /**< \brief structure for lin control */
555 IFX_CONST IfxAsclin_Lin_Pins *pins; /**< \brief structure for LIN pins */
556 IfxAsclin_ClockSource clockSource; /**< \brief CSR.CLKSEL, clock source selection */
557 IfxAsclin_RxInputSelect alti; /**< \brief IOCR.ALTI, Rx input (alternate input) pin selection */
558 IfxAsclin_Lin_InterruptConfig interrupt; /**< \brief structure for lin interrupt configuration */
559 boolean isInterruptMode; /**< \brief flag to indicate Interrupt Mode (TRUE) or Polling Mode (FALSE) */
560 boolean receiveIdEnable; /**< \brief setting to receive Id in Rx Fifo after sending it */
561 } IfxAsclin_Lin_Config;
562
563 /** \brief Structure to hold Lin Pdu data
564 */
565 typedef struct
566 {
567 uint8 pid; /**< \brief PID of LIN Header */
568 uint8 dataLength; /**< \brief Length of LIN Response */
569 uint8 *dataPtr; /**< \brief Pointer for LIN Response data */
570 IfxAsclin_Lin_Direction direction; /**< \brief Direction Control (Tx Header only, Tx both Header and Response, Tx Header and Rx Response) */
571 IfxAsclin_Checksum checksumMode; /**< \brief LIN Checksum Mode */
572 } IfxAsclin_Lin_PduType;
573
574 /** \} */
575
576 /** \addtogroup IfxLld_Asclin_Lin_ElementaryTransactions
577 * \{ */
578
579 /******************************************************************************/
580 /*-------------------------Inline Function Prototypes-------------------------*/
581 /******************************************************************************/
582
583 /** \brief Prepares the module to receive the header
584 * \param asclin module handle
585 * \return None
586 *
587 * A coding example can be found in \ref IfxLld_Asclin_Lin_Usage
588 *
589 */
590 IFX_INLINE void IfxAsclin_Lin_prepareHeaderReception(IfxAsclin_Lin *asclin);
591
592 /** \brief Prepares the module to Receive the response
593 * \param asclin module handle
594 * \param length count of data (in bytes).
595 * \return None
596 *
597 * A coding example can be found in \ref IfxLld_Asclin_Lin_Usage
598 *
599 */
600 IFX_INLINE void IfxAsclin_Lin_prepareResponseReception(IfxAsclin_Lin *asclin, uint32 length);
601
602 /** \brief Reads the header
603 * \param asclin module handle
604 * \param id the id byte which should be received
605 * \return None
606 *
607 * A coding example can be found in \ref IfxLld_Asclin_Lin_Usage
608 *
609 */
610 IFX_INLINE void IfxAsclin_Lin_readHeader(IfxAsclin_Lin *asclin, uint8 *id);
611
612 /** \brief Reads the response
613 * \param asclin module handle
614 * \param data Pointer to the start of data which should be received
615 * \param length count of data (in bytes).
616 * \return None
617 *
618 * A coding example can be found in \ref IfxLld_Asclin_Lin_Usage
619 *
620 */
621 IFX_INLINE void IfxAsclin_Lin_readResponse(IfxAsclin_Lin *asclin, uint8 *data, uint32 length);
622
623 /******************************************************************************/
624 /*-------------------------Global Function Prototypes-------------------------*/
625 /******************************************************************************/
626
627 /** \brief Ignores the latest header
628 * \param asclin module handle
629 * \return None
630 *
631 * A coding example can be found in \ref IfxLld_Asclin_Lin_Usage
632 *
633 */
634 IFX_EXTERN void IfxAsclin_Lin_ignoreHeader(IfxAsclin_Lin *asclin);
635
636 /** \brief Receives the header
637 * \param asclin module handle
638 * \param id the id byte which should be received
639 * \return None
640 *
641 * A coding example can be found in \ref IfxLld_Asclin_Lin_Usage
642 *
643 */
644 IFX_EXTERN void IfxAsclin_Lin_receiveHeader(IfxAsclin_Lin *asclin, uint8 *id);
645
646 /** \brief Receives the response
647 * \param asclin module handle
648 * \param data Pointer to the start of data which should be received
649 * \param length count of data (in bytes).
650 * \return None
651 *
652 * A coding example can be found in \ref IfxLld_Asclin_Lin_Usage
653 *
654 */
655 IFX_EXTERN void IfxAsclin_Lin_receiveResponse(IfxAsclin_Lin *asclin, uint8 *data, uint32 length);
656
657 /** \brief Sends the header
658 * \param asclin module handle
659 * \param id the id byte which should be sent
660 * \return None
661 *
662 * A coding example of send header in polling mode can be found in \ref IfxLld_Asclin_Lin_Usage. For interrupt mode, this fuction is internally used by IfxAsclin_Lin_sendFrame API and the the polling part is bypassed.
663 *
664 */
665 IFX_EXTERN void IfxAsclin_Lin_sendHeader(IfxAsclin_Lin *asclin, uint8 *id);
666
667 /** \brief sends the response
668 * \param asclin module handle
669 * \param data Pointer to the start of data which should be sent
670 * \param length count of data (in bytes).
671 * \return None
672 *
673 * A coding example can be found in \ref IfxLld_Asclin_Lin_Usage
674 *
675 */
676 IFX_EXTERN void IfxAsclin_Lin_sendResponse(IfxAsclin_Lin *asclin, uint8 *data, uint32 length);
677
678 /** \} */
679
680 /** \addtogroup IfxLld_Asclin_Lin_ModuleFunctions
681 * \{ */
682
683 /******************************************************************************/
684 /*-------------------------Global Function Prototypes-------------------------*/
685 /******************************************************************************/
686
687 /** \brief Disables the module
688 * \param asclin module handle
689 * \return None
690 */
691 IFX_EXTERN void IfxAsclin_Lin_disableModule(IfxAsclin_Lin *asclin);
692
693 /** \brief Initialises the module
694 * \param asclin module handle
695 * \param config predefined configuration structure of the module
696 * \return Status
697 *
698 * A coding example can be found in \ref IfxLld_Asclin_Lin_Usage
699 *
700 */
701 IFX_EXTERN IfxAsclin_Status IfxAsclin_Lin_initModule(IfxAsclin_Lin *asclin, const IfxAsclin_Lin_Config *config);
702
703 /** \brief Fills the config structure with default values
704 * \param config predefined configuration structure of the module
705 * \param asclin pointer to ASCLIN registers
706 * \return None
707 *
708 * A coding example can be found in \ref IfxLld_Asclin_Lin_Usage
709 *
710 */
711 IFX_EXTERN void IfxAsclin_Lin_initModuleConfig(IfxAsclin_Lin_Config *config, Ifx_ASCLIN *asclin);
712
713 /** \brief This API must be used in interrupt mode. It can be used to
714 * 1.Send Header
715 * 2.Send both Header and Response
716 * 3.Send Header and Receive Response
717 * \param asclin asclin module handle
718 * \param pduptr lin pdu configuration
719 * \return None
720 *
721 * A coding example of sendFrame in interrupt mode can be found in \ref IfxLld_Asclin_Lin_Usage.
722 *
723 */
724 IFX_EXTERN void IfxAsclin_Lin_sendFrame(IfxAsclin_Lin *asclin, IfxAsclin_Lin_PduType *pduptr);
725
726 /** \} */
727
728 /** \addtogroup IfxLld_Asclin_Lin_errorHandlingFunctions
729 * \{ */
730
731 /******************************************************************************/
732 /*-------------------------Global Function Prototypes-------------------------*/
733 /******************************************************************************/
734
735 /** \brief checks for acknowledgement and error flags for received header
736 * \param asclin module handle
737 * \return None
738 */
739 IFX_EXTERN void IfxAsclin_Lin_checkForReceivedHeaderFlags(IfxAsclin_Lin *asclin);
740
741 /** \brief checks for acknowledgement and error flags for received response
742 * \param asclin module handle
743 * \return None
744 */
745 IFX_EXTERN void IfxAsclin_Lin_checkForReceivedResponseFlags(IfxAsclin_Lin *asclin);
746
747 /** \brief checks for acknowledgement and error flags for transmitted header
748 * \param asclin module handle
749 * \return None
750 */
751 IFX_EXTERN void IfxAsclin_Lin_checkForTransmittedHeaderFlags(IfxAsclin_Lin *asclin);
752
753 /** \brief checks for acknowledgement and error flags for transmitted response
754 * \param asclin module handle
755 * \return None
756 */
757 IFX_EXTERN void IfxAsclin_Lin_checkForTransmittedResponseFlags(IfxAsclin_Lin *asclin);
758
759 /** \brief clears the flags status structures
760 * \param asclin module handle
761 * \return None
762 */
763 IFX_EXTERN void IfxAsclin_Lin_clearFlagsStatus(IfxAsclin_Lin *asclin);
764
765 /** \brief waits until receive header end acknowledgemnet or an error has been detected
766 * \param asclin module handle
767 * \return Result, TRUE: if error, FALSE: is no error
768 */
769 IFX_EXTERN boolean IfxAsclin_Lin_waitForReceivedHeader(IfxAsclin_Lin *asclin);
770
771 /** \brief waits until receive response end acknowledgemnet or an error has been detected
772 * \param asclin module handle
773 * \return Result, TRUE: if error, FALSE: is no error
774 */
775 IFX_EXTERN boolean IfxAsclin_Lin_waitForReceivedResponse(IfxAsclin_Lin *asclin);
776
777 /** \brief waits until transmit header end acknowledgemnet or an error has been detected
778 * \param asclin module handle
779 * \return Result, TRUE: if error, FALSE: is no error
780 */
781 IFX_EXTERN boolean IfxAsclin_Lin_waitForTransmittedHeader(IfxAsclin_Lin *asclin);
782
783 /** \brief waits until transmit response end acknowledgemnet or an error has been detected
784 * \param asclin module handle
785 * \return Result, TRUE: if error, FALSE: is no error
786 */
787 IFX_EXTERN boolean IfxAsclin_Lin_waitForTransmittedResponse(IfxAsclin_Lin *asclin);
788
789 /** \} */
790
791 /** \addtogroup IfxLld_Asclin_Lin_InterruptFunctions
792 * \{ */
793
794 /******************************************************************************/
795 /*-------------------------Global Function Prototypes-------------------------*/
796 /******************************************************************************/
797
798 /** \brief ISR error routine.
799 * \param asclin module handle
800 * \return None
801 */
802 IFX_EXTERN void IfxAsclin_Lin_isrError(IfxAsclin_Lin *asclin);
803
804 /** \brief ISR receive routine.
805 * \param asclin module handle
806 * \return None
807 */
808 IFX_EXTERN void IfxAsclin_Lin_isrReceive(IfxAsclin_Lin *asclin);
809
810 /** \brief ISR transmit routine.
811 * \param asclin module handle
812 * \return None
813 */
814 IFX_EXTERN void IfxAsclin_Lin_isrTransmit(IfxAsclin_Lin *asclin);
815
816 /** \} */
817
818 /******************************************************************************/
819 /*---------------------Inline Function Implementations------------------------*/
820 /******************************************************************************/
821
822 IFX_INLINE void IfxAsclin_Lin_prepareHeaderReception(IfxAsclin_Lin *asclin)
823 {
824 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
825 IfxAsclin_clearAllFlags(asclinSFR); /* clearing all flags*/
826 IfxAsclin_flushRxFifo(asclinSFR); /* flushing Rx FIFO*/
827 IfxAsclin_enableTxFifoOutlet(asclinSFR, FALSE); /* enabling Tx FIFO for transmitting*/
828 IfxAsclin_enableRxFifoInlet(asclinSFR, TRUE); /* enabling Rx FIFO for receiving*/
829 }
830
831
832 IFX_INLINE void IfxAsclin_Lin_prepareResponseReception(IfxAsclin_Lin *asclin, uint32 length)
833 {
834 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
835 IfxAsclin_setDataLength(asclinSFR, (IfxAsclin_DataLength)(length - 1)); /* set number of bytes to be received*/
836 IfxAsclin_clearAllFlags(asclinSFR); /* clear all flags */
837 IfxAsclin_flushRxFifo(asclinSFR); /* flushing Rx FIFO */
838 IfxAsclin_enableTxFifoOutlet(asclinSFR, FALSE); /* enable Tx FIFO for transmitting */
839 IfxAsclin_enableRxFifoInlet(asclinSFR, TRUE); /* enable Rx FIFO for receiving */
840 }
841
842
843 IFX_INLINE void IfxAsclin_Lin_readHeader(IfxAsclin_Lin *asclin, uint8 *id)
844 {
845 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
846 IfxAsclin_read8(asclinSFR, id, 1U); /*reading the ID byte*/
847 }
848
849
850 IFX_INLINE void IfxAsclin_Lin_readResponse(IfxAsclin_Lin *asclin, uint8 *data, uint32 length)
851 {
852 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
853 IfxAsclin_read8(asclinSFR, data, length); /* read the data bytes; */
854 }
855
856
857 #endif /* IFXASCLIN_LIN_H */
IfxAsclin_Lin_sendResponse
IFX_EXTERN void IfxAsclin_Lin_sendResponse(IfxAsclin_Lin *asclin, uint8 *data, uint32 length)
sends the response
Definition: IfxAsclin_Lin.c:589
IfxAsclin_Lin_FrameControl::stopBit
IfxAsclin_StopBit stopBit
FRAMECON.STOP, number of stop bits.
Definition: IfxAsclin_Lin.h:475
IfxAsclin_Lin_EnabledInterrupts::exResponseTimeout
uint16 exResponseTimeout
Response Timeout.
Definition: IfxAsclin_Lin.h:355
IfxAsclin_Lin_InterruptConfig::txPriority
uint16 txPriority
transmit interrupt priority
Definition: IfxAsclin_Lin.h:497
IfxAsclin_Lin_Config::clockSource
IfxAsclin_ClockSource clockSource
CSR.CLKSEL, clock source selection.
Definition: IfxAsclin_Lin.h:556
IfxAsclin_Lin_sendFrame
IFX_EXTERN void IfxAsclin_Lin_sendFrame(IfxAsclin_Lin *asclin, IfxAsclin_Lin_PduType *pduptr)
This API must be used in interrupt mode. It can be used to 1.Send Header 2.Send both Header and Respo...
Definition: IfxAsclin_Lin.c:874
IfxAsclin_Tx_Out
TX pin mapping structure.
Definition: IfxAsclin_PinMap.h:96
IfxAsclin_Lin_DataControl
Structure for Data Control.
Definition: IfxAsclin_Lin.h:435
IfxAsclin_ReceiveBufferMode
IfxAsclin_ReceiveBufferMode
Receive buffer mode Definition in Ifx_ASCLIN.RXFIFOCON.B.BUF.
Definition: IfxAsclin.h:263
IfxAsclin_Lin_AcknowledgementFlags::txCompleted
uint8 txCompleted
transmission completed
Definition: IfxAsclin_Lin.h:393
IfxAsclin_Lin_ErrorFlags::linAutobaudDetectionError
uint8 linAutobaudDetectionError
lin autobaud detection error
Definition: IfxAsclin_Lin.h:453
IfxAsclin_Lin_InterruptConfig::rxPriority
uint16 rxPriority
receive interrupt priority
Definition: IfxAsclin_Lin.h:498
IfxAsclin_Lin_BaudrateDetection::upperLimit
uint8 upperLimit
BRD.UPPERLIMIT, auto baudrate detection upperlimit.
Definition: IfxAsclin_Lin.h:402
IfxAsclin_Lin_Config::fifo
IfxAsclin_Lin_FifoControl fifo
structure for FIFO control
Definition: IfxAsclin_Lin.h:552
IfxAsclin_Lin_FrameControlFlags::txSendHeaderOnly
uint16 txSendHeaderOnly
Flag indicating that only Header is transmitted.
Definition: IfxAsclin_Lin.h:369
IfxAsclin_Lin_EnabledInterrupts::exLinChecksumError
uint16 exLinChecksumError
Lin Checksum Error.
Definition: IfxAsclin_Lin.h:358
IfxAsclin_Lin_EnabledInterrupts::rxReceivedHeader
uint16 rxReceivedHeader
Received Header.
Definition: IfxAsclin_Lin.h:348
IfxAsclin_Lin_BitTimingControl::prescaler
uint16 prescaler
BITCON.PRESCALER, predivider to generate the baud rate.
Definition: IfxAsclin_Lin.h:429
IfxAsclin_Lin_Direction_TransmitHeaderAndReceiveResponse
Transmit Header and Receive Response.
Definition: IfxAsclin_Lin.h:333
IfxAsclin_Lin_BaudrateGeneration::baudrate
float32 baudrate
value of the required baudrate
Definition: IfxAsclin_Lin.h:411
IfxAsclin_Lin_receiveHeader
IFX_EXTERN void IfxAsclin_Lin_receiveHeader(IfxAsclin_Lin *asclin, uint8 *id)
Receives the header.
Definition: IfxAsclin_Lin.c:516
IfxAsclin_Lin_readResponse
IFX_INLINE void IfxAsclin_Lin_readResponse(IfxAsclin_Lin *asclin, uint8 *data, uint32 length)
Reads the response.
Definition: IfxAsclin_Lin.h:850
IfxAsclin_Lin_ErrorFlags::collisionDetectionError
uint8 collisionDetectionError
collision detection error
Definition: IfxAsclin_Lin.h:455
IfxAsclin_SamplesPerBit
IfxAsclin_SamplesPerBit
Number of samples per bit, sample mode/medianfilter Definition in Ifx_ASCLIN.BITCON.B.SM.
Definition: IfxAsclin.h:352
IfxAsclin_Lin_FrameControl::shiftDir
IfxAsclin_ShiftDirection shiftDir
FRAMECON.MSB, shift direction.
Definition: IfxAsclin_Lin.h:477
IfxAsclin_Lin_BaudrateGeneration::numerator
uint16 numerator
BRG.NUMERATOR, defines the numerator of fractional divider.
Definition: IfxAsclin_Lin.h:412
IfxAsclin_Lin_PduType::dataLength
uint8 dataLength
Length of LIN Response.
Definition: IfxAsclin_Lin.h:568
IfxAsclin_Lin_Pins::pinDriver
IfxPort_PadDriver pinDriver
pad driver
Definition: IfxAsclin_Lin.h:522
IfxAsclin_Lin_receiveResponse
IFX_EXTERN void IfxAsclin_Lin_receiveResponse(IfxAsclin_Lin *asclin, uint8 *data, uint32 length)
Receives the response.
Definition: IfxAsclin_Lin.c:533
IfxAsclin_RxFifoOutletWidth
IfxAsclin_RxFifoOutletWidth
Defines the number of bytes read from the Rx FIFO with one FPI bus read Definition in Ifx_ASCLIN...
Definition: IfxAsclin.h:304
IfxAsclin_Lin_FifoControl
Structure for FIFO Control.
Definition: IfxAsclin_Lin.h:462
IfxAsclin_Lin_PduType::checksumMode
IfxAsclin_Checksum checksumMode
LIN Checksum Mode.
Definition: IfxAsclin_Lin.h:571
IfxAsclin_Lin_checkForTransmittedHeaderFlags
IFX_EXTERN void IfxAsclin_Lin_checkForTransmittedHeaderFlags(IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for transmitted header
Definition: IfxAsclin_Lin.c:148
IfxAsclin_Lin_ErrorFlags::breakDetected
uint8 breakDetected
break detected
Definition: IfxAsclin_Lin.h:451
IfxAsclin_Lin::isInterruptMode
boolean isInterruptMode
Value to indicate if APIs work in Polling mode or Interrupt mode.
Definition: IfxAsclin_Lin.h:537
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:140
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxAsclin_Lin_Pins
Structure for LIN pin configuration.
Definition: IfxAsclin_Lin.h:516
IfxAsclin_Lin_ErrorFlags::headerTimeout
uint8 headerTimeout
header timeout
Definition: IfxAsclin_Lin.h:449
IfxAsclin_Lin_checkForReceivedResponseFlags
IFX_EXTERN void IfxAsclin_Lin_checkForReceivedResponseFlags(IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for received response
Definition: IfxAsclin_Lin.c:98
float32
float float32
Definition: Platform_Types.h:170
Ifx_Assert.h
Assert functions.
IfxAsclin_Lin::receiveIdEnable
boolean receiveIdEnable
setting to receive Id in Rx Fifo after sending it
Definition: IfxAsclin_Lin.h:536
IfxAsclin_Lin_FrameControl
Structure for Frame Control.
Definition: IfxAsclin_Lin.h:471
IfxAsclin_Lin_DataControl::dataLength
IfxAsclin_DataLength dataLength
DATCON.DATALENGTH, data length, number of bits per transfer.
Definition: IfxAsclin_Lin.h:437
IfxAsclin_StopBit
IfxAsclin_StopBit
ASC and LIN mode: number of stop bits (0 is not allowed), SPI mode: trailing delay. Definition in Ifx_ASCLIN.FRAMECON.B.STOP.
Definition: IfxAsclin.h:398
IfxAsclin_clearAllFlags
IFX_INLINE void IfxAsclin_clearAllFlags(Ifx_ASCLIN *asclin)
clears all the flags
Definition: IfxAsclin.h:1616
IfxAsclin_Lin_ErrorFlags::responseTimeout
uint8 responseTimeout
response timeout
Definition: IfxAsclin_Lin.h:450
IfxAsclin_Lin_EnabledInterrupts::exTransmitFIFOOverflow
uint16 exTransmitFIFOOverflow
Transmit FIFO Overflow.
Definition: IfxAsclin_Lin.h:362
IfxAsclin_RxInputSelect
IfxAsclin_RxInputSelect
Alternate input selection for Rx signal. Definition in Ifx_ASCLIN.IOCR.B.ALTI.
Definition: IfxAsclin.h:315
IfxAsclin_Lin_ignoreHeader
IFX_EXTERN void IfxAsclin_Lin_ignoreHeader(IfxAsclin_Lin *asclin)
Ignores the latest header.
Definition: IfxAsclin_Lin.c:257
IfxAsclin_Checksum
IfxAsclin_Checksum
Defines if the classic or the enhanced checksum will be calculated by the checksum block...
Definition: IfxAsclin.h:81
IfxAsclin_Lin_Config::frame
IfxAsclin_Lin_FrameControl frame
structure for frame control
Definition: IfxAsclin_Lin.h:551
IfxAsclin_Lin_FifoControl::outWidth
IfxAsclin_RxFifoOutletWidth outWidth
RXFIFOCON.OTW, receive FIFO oulet width.
Definition: IfxAsclin_Lin.h:466
IfxAsclin_Lin_EnabledInterrupts::txTransmittedResponse
uint16 txTransmittedResponse
Transmitted Response.
Definition: IfxAsclin_Lin.h:351
IfxAsclin_Lin_initModule
IFX_EXTERN IfxAsclin_Status IfxAsclin_Lin_initModule(IfxAsclin_Lin *asclin, const IfxAsclin_Lin_Config *config)
Initialises the module.
Definition: IfxAsclin_Lin.c:266
IfxAsclin_LinMode
IfxAsclin_LinMode
Configures if the module in LIN mode operates as master or slave Definition in Ifx_ASCLIN.LIN.CON.B.MS.
Definition: IfxAsclin.h:216
IfxAsclin_Lin::acknowledgmentFlags
IfxAsclin_Lin_AcknowledgementFlags acknowledgmentFlags
structure for acknowledgement flags
Definition: IfxAsclin_Lin.h:534
IfxAsclin_Lin_isrTransmit
IFX_EXTERN void IfxAsclin_Lin_isrTransmit(IfxAsclin_Lin *asclin)
ISR transmit routine.
Definition: IfxAsclin_Lin.c:853
IfxAsclin_LinResponseTimeoutMode
IfxAsclin_LinResponseTimeoutMode
Defines the timeout threshold of RESPOSE bit is for LIN response timeout or LIN frame timeout...
Definition: IfxAsclin.h:225
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxAsclin_Lin_BitSamplingControl::filterDepth
uint8 filterDepth
IOCR.DEPTH, digital glitch filter depth.
Definition: IfxAsclin_Lin.h:420
IfxAsclin_Lin_PduType::direction
IfxAsclin_Lin_Direction direction
Direction Control (Tx Header only, Tx both Header and Response, Tx Header and Rx Response) ...
Definition: IfxAsclin_Lin.h:570
IfxAsclin_Lin_Pins::rx
IFX_CONST IfxAsclin_Rx_In * rx
LIN Rx pin.
Definition: IfxAsclin_Lin.h:518
IfxAsclin_Lin_FrameControlFlags::rxResponseErrorOccurred
uint16 rxResponseErrorOccurred
Flag to indicate error occurred during reception of Response.
Definition: IfxAsclin_Lin.h:378
IfxAsclin_HeaderResponseSelect
IfxAsclin_HeaderResponseSelect
Defines if LIN frame shall consist of a header and response or of a header only. Definition in Ifx_AS...
Definition: IfxAsclin.h:174
IfxAsclin_Lin_ErrorFlags
Structure for Error Flags.
Definition: IfxAsclin_Lin.h:446
IfxAsclin_Lin_InterruptConfig::exPriority
uint16 exPriority
error interrupt priority
Definition: IfxAsclin_Lin.h:499
IfxAsclin_Lin_prepareHeaderReception
IFX_INLINE void IfxAsclin_Lin_prepareHeaderReception(IfxAsclin_Lin *asclin)
Prepares the module to receive the header.
Definition: IfxAsclin_Lin.h:822
IfxAsclin_Lin_FrameControlFlags::txResponseErrorOccurred
uint16 txResponseErrorOccurred
Flag to indicate error occurred during transmission of Response.
Definition: IfxAsclin_Lin.h:376
IfxAsclin_Lin_EnabledInterrupts::txTransmittedHeader
uint16 txTransmittedHeader
Transmitted Header.
Definition: IfxAsclin_Lin.h:350
IfxAsclin_Lin_FrameDataControl::rxResponseLength
uint8 rxResponseLength
Length of received response.
Definition: IfxAsclin_Lin.h:489
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxAsclin_Lin_BaudrateDetection::measured
uint8 measured
BRD.MEASURED, measured time interval between the first and the fifth falling edge of the sync byte...
Definition: IfxAsclin_Lin.h:403
IfxAsclin_Lin_EnabledInterrupts::exLinAutobaudDetectionError
uint16 exLinAutobaudDetectionError
Lin Autobaud Detection Error.
Definition: IfxAsclin_Lin.h:357
IfxAsclin_Lin::linFrameData
IfxAsclin_Lin_FrameDataControl linFrameData
Structure for Lin Frame Data and Control.
Definition: IfxAsclin_Lin.h:532
IfxAsclin_Lin_waitForReceivedHeader
IFX_EXTERN boolean IfxAsclin_Lin_waitForReceivedHeader(IfxAsclin_Lin *asclin)
waits until receive header end acknowledgemnet or an error has been detected
Definition: IfxAsclin_Lin.c:609
IfxAsclin_Lin_ErrorFlags::frameError
uint8 frameError
frame error
Definition: IfxAsclin_Lin.h:448
IfxAsclin_Lin_Pins::tx
IFX_CONST IfxAsclin_Tx_Out * tx
LIN Tx pin.
Definition: IfxAsclin_Lin.h:520
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxAsclin_Lin_Config::bsc
IfxAsclin_Lin_BitSamplingControl bsc
structure for bit sampling
Definition: IfxAsclin_Lin.h:550
IfxAsclin_Lin_Config::brg
IfxAsclin_Lin_BaudrateGeneration brg
structure for baudrate generation
Definition: IfxAsclin_Lin.h:547
IfxAsclin_Lin_FrameControlFlags::rxHeaderInProgress
uint16 rxHeaderInProgress
Flag to indicate Header reception is initiated and is in progress.
Definition: IfxAsclin_Lin.h:373
IfxAsclin_Lin_Pins::txMode
IfxPort_OutputMode txMode
tx as output
Definition: IfxAsclin_Lin.h:521
IfxAsclin_OversamplingFactor
IfxAsclin_OversamplingFactor
Defines the bit length in ticks in the range of 1 to 16. The lengths of 1 to 3 are not allowed Defini...
Definition: IfxAsclin.h:234
IfxAsclin_Lin_EnabledInterrupts::exTransmissionCompleted
uint16 exTransmissionCompleted
Transmission Completed.
Definition: IfxAsclin_Lin.h:353
IfxAsclin_Lin_FrameControl::parityType
IfxAsclin_ParityType parityType
FRAMECON.ODD, parity type (even or odd)
Definition: IfxAsclin_Lin.h:476
IfxAsclin_Lin_ErrorFlags::linParityError
uint8 linParityError
lin parity error
Definition: IfxAsclin_Lin.h:452
IfxAsclin_Lin_AcknowledgementFlags::txResponseEnd
uint8 txResponseEnd
transmit response end
Definition: IfxAsclin_Lin.h:390
IfxAsclin_Lin_BitTimingControl
Structure for Bit Timing.
Definition: IfxAsclin_Lin.h:427
IfxAsclin_Lin_EnabledInterrupts::exBreakDetected
uint16 exBreakDetected
Break Detected.
Definition: IfxAsclin_Lin.h:352
IfxAsclin_Lin_EnabledInterrupts::exHeaderTimeout
uint16 exHeaderTimeout
Header Timeout.
Definition: IfxAsclin_Lin.h:354
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxAsclin_Lin_DataControl::responseTimeout
uint16 responseTimeout
DATCON.RESPONSE, timeout limit.
Definition: IfxAsclin_Lin.h:441
IfxAsclin_Lin_FrameControlFlags::txSendResponse
uint16 txSendResponse
Flag to indicate Response is transmitted.
Definition: IfxAsclin_Lin.h:370
IfxAsclin_LeadDelay
IfxAsclin_LeadDelay
Defines the leading delay in bit times in SPI mode. ASC mode: not applicable. LIN mode: delay between...
Definition: IfxAsclin.h:201
IfxAsclin_FrameMode
IfxAsclin_FrameMode
Defines the basic operating mode of the module. Changing the mode must be done by switching first to ...
Definition: IfxAsclin.h:163
IfxAsclin_IdleDelay
IfxAsclin_IdleDelay
Defines the duration of the IDLE delay in bit times. SPI mode: this is the idle time between the fram...
Definition: IfxAsclin.h:185
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxAsclin_Lin_PduType::pid
uint8 pid
PID of LIN Header.
Definition: IfxAsclin_Lin.h:567
IfxAsclin_Rx_In
RX pin mapping structure.
Definition: IfxAsclin_PinMap.h:64
IfxAsclin_Lin_initModuleConfig
IFX_EXTERN void IfxAsclin_Lin_initModuleConfig(IfxAsclin_Lin_Config *config, Ifx_ASCLIN *asclin)
Fills the config structure with default values.
Definition: IfxAsclin_Lin.c:439
IfxAsclin_Lin_FrameControlFlags::rxHeaderErrorOccurred
uint16 rxHeaderErrorOccurred
Flag to indicate error occurred during reception of Header.
Definition: IfxAsclin_Lin.h:377
IfxAsclin_Lin_ErrorFlags::txFifoOverflow
uint8 txFifoOverflow
transmit FIFO overflow error
Definition: IfxAsclin_Lin.h:457
IfxAsclin_ClockSource
IfxAsclin_ClockSource
Selection of clock source Definition in Ifx_ASCLIN.CSR.B.CLKSEL.
Definition: IfxAsclin.h:109
IfxAsclin_DataLength
IfxAsclin_DataLength
Number of bits per transfer Definition in Ifx_ASCLIN.FRAMECON.B.DATALEN.
Definition: IfxAsclin.h:130
IfxAsclin_Lin_Config::btc
IfxAsclin_Lin_BitTimingControl btc
structure for bit timings
Definition: IfxAsclin_Lin.h:549
IfxAsclin_Lin_LinControl
Structure for lin Control.
Definition: IfxAsclin_Lin.h:506
IfxAsclin_ChecksumInjection
IfxAsclin_ChecksumInjection
Defines if the received checksum byte is written into the RXFifo or not. Definition in Ifx_ASCLIN...
Definition: IfxAsclin.h:90
IfxAsclin_Lin_FrameDataControl::txResponseLength
uint8 txResponseLength
Length of transmitted response.
Definition: IfxAsclin_Lin.h:488
IfxAsclin_Lin_ErrorFlags::linChecksumError
uint8 linChecksumError
lin checksum error
Definition: IfxAsclin_Lin.h:454
IfxAsclin_Lin_BaudrateDetection::lowerLimit
uint8 lowerLimit
BRD.LOWERLIMIT, auto baudrate detection lowerlimit.
Definition: IfxAsclin_Lin.h:401
IfxAsclin_Lin_Config::pins
IFX_CONST IfxAsclin_Lin_Pins * pins
structure for LIN pins
Definition: IfxAsclin_Lin.h:555
IfxAsclin_Lin_FrameDataControl::flags
IfxAsclin_Lin_FrameControlFlags flags
LIN frame control flags.
Definition: IfxAsclin_Lin.h:490
IfxAsclin_Lin_isrError
IFX_EXTERN void IfxAsclin_Lin_isrError(IfxAsclin_Lin *asclin)
ISR error routine.
Definition: IfxAsclin_Lin.c:708
IfxAsclin_Lin_checkForTransmittedResponseFlags
IFX_EXTERN void IfxAsclin_Lin_checkForTransmittedResponseFlags(IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for transmitted response
Definition: IfxAsclin_Lin.c:186
IfxAsclin_Lin_Config::frameMode
IfxAsclin_FrameMode frameMode
FRAMECON.MODE, mode of operation of the module (ASC, SPI, LIN)
Definition: IfxAsclin_Lin.h:545
IfxAsclin_SamplePointPosition
IfxAsclin_SamplePointPosition
Sample point position Definition in Ifx_ASCLIN.BITCON.B.SAMPLEPOINT.
Definition: IfxAsclin.h:330
IfxAsclin_Lin_Config::brd
IfxAsclin_Lin_BaudrateDetection brd
structure for baudrate detection
Definition: IfxAsclin_Lin.h:548
IfxAsclin_Lin_prepareResponseReception
IFX_INLINE void IfxAsclin_Lin_prepareResponseReception(IfxAsclin_Lin *asclin, uint32 length)
Prepares the module to Receive the response.
Definition: IfxAsclin_Lin.h:832
IfxAsclin_Lin_Config::interrupt
IfxAsclin_Lin_InterruptConfig interrupt
structure for lin interrupt configuration
Definition: IfxAsclin_Lin.h:558
IfxAsclin_Lin_BitSamplingControl::samplePointPosition
IfxAsclin_SamplePointPosition samplePointPosition
BITCON.SAMPLEPOINT, sample point position.
Definition: IfxAsclin_Lin.h:422
IfxAsclin_Lin_FrameDataControl
Structure for Frame Data and Control flags.
Definition: IfxAsclin_Lin.h:484
IfxAsclin_flushRxFifo
IFX_INLINE void IfxAsclin_flushRxFifo(Ifx_ASCLIN *asclin)
Flushes (empties) the Rx FIFO.
Definition: IfxAsclin.h:1934
IfxAsclin_Lin_BaudrateGeneration
Structure for Baudrate Generation.
Definition: IfxAsclin_Lin.h:409
IfxAsclin_Lin_Pins::rxMode
IfxPort_InputMode rxMode
rx pin as input
Definition: IfxAsclin_Lin.h:519
IfxAsclin_Lin_Config
Configuration structure of the module.
Definition: IfxAsclin_Lin.h:542
IfxAsclin_Lin_InterruptConfig::typeOfService
IfxSrc_Tos typeOfService
type of interrupt service
Definition: IfxAsclin_Lin.h:500
IfxAsclin_Lin_InterruptConfig
Structure for LIN Interrupt Configuration.
Definition: IfxAsclin_Lin.h:495
IfxAsclin_Lin::asclin
Ifx_ASCLIN * asclin
pointer to ASCLIN registers
Definition: IfxAsclin_Lin.h:531
IfxAsclin_Lin_InterruptConfig::enabledInterrupt
IfxAsclin_Lin_EnabledInterrupts enabledInterrupt
Interrupts which have to be enabled during initialisation as configured by application. Does not reflect current status of FLAGSENABLE register.
Definition: IfxAsclin_Lin.h:501
IfxAsclin_Lin_Direction_TransmitHeader
Transmit Header.
Definition: IfxAsclin_Lin.h:331
IfxAsclin_TxFifoInletWidth
IfxAsclin_TxFifoInletWidth
Defines the number of bytes written to the Tx FIFO with one FPI bus write Definition in Ifx_ASCLIN...
Definition: IfxAsclin.h:422
IfxAsclin_Lin_waitForReceivedResponse
IFX_EXTERN boolean IfxAsclin_Lin_waitForReceivedResponse(IfxAsclin_Lin *asclin)
waits until receive response end acknowledgemnet or an error has been detected
Definition: IfxAsclin_Lin.c:634
IfxAsclin_read8
uint32 IfxAsclin_read8(Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
Reads data up to 8 bits.
Definition: IfxAsclin.c:286
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:151
IfxAsclin_Lin_ErrorFlags::rxFifoOverflow
uint8 rxFifoOverflow
receive FIFO overflow error
Definition: IfxAsclin_Lin.h:456
IfxAsclin_Lin_BitTimingControl::oversampling
IfxAsclin_OversamplingFactor oversampling
BITCON.OVERSAMPLING, postdivider, used for oversampling.
Definition: IfxAsclin_Lin.h:430
IfxAsclin_Lin_BaudrateDetection::abd
boolean abd
LINCON.ABD, autobaud detection enable.
Definition: IfxAsclin_Lin.h:400
IfxAsclin_Lin_Direction
IfxAsclin_Lin_Direction
Defines the type of Lin Master Frame. (Transmit Header only) or (Transmit Header and Response) or (Tr...
Definition: IfxAsclin_Lin.h:329
IfxAsclin_Lin_disableModule
IFX_EXTERN void IfxAsclin_Lin_disableModule(IfxAsclin_Lin *asclin)
Disables the module.
Definition: IfxAsclin_Lin.c:247
IfxAsclin_Lin_sendHeader
IFX_EXTERN void IfxAsclin_Lin_sendHeader(IfxAsclin_Lin *asclin, uint8 *id)
Sends the header.
Definition: IfxAsclin_Lin.c:550
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxAsclin_Lin_BaudrateGeneration::denominator
uint16 denominator
BRG.DENOMINATOR, defines the denominator of fractional divider.
Definition: IfxAsclin_Lin.h:413
IfxAsclin_Lin_AcknowledgementFlags::rxHeaderEnd
uint8 rxHeaderEnd
receive header end
Definition: IfxAsclin_Lin.h:391
IfxAsclin_enableTxFifoOutlet
IFX_INLINE void IfxAsclin_enableTxFifoOutlet(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the transmit FIFO outlet to allow transmission.
Definition: IfxAsclin.h:1910
IfxAsclin_Lin_EnabledInterrupts::rxReceivedResponse
uint16 rxReceivedResponse
Received Response.
Definition: IfxAsclin_Lin.h:349
IfxAsclin_Lin_FrameControlFlags::rxResponseInProgress
uint16 rxResponseInProgress
Flag to indicate Response reception is initiated and is in progress.
Definition: IfxAsclin_Lin.h:374
IfxAsclin_Lin_FrameControl::parityEnable
boolean parityEnable
FRAMECON.PEN, parity enable.
Definition: IfxAsclin_Lin.h:478
IfxAsclin_Lin_Config::data
IfxAsclin_Lin_DataControl data
structure for data control
Definition: IfxAsclin_Lin.h:553
IfxAsclin_Lin_FrameControl::leadDelay
IfxAsclin_LeadDelay leadDelay
FRAMECON.LEAD, lead delay.
Definition: IfxAsclin_Lin.h:474
IfxAsclin_Lin::errorFlagsStatus
IfxAsclin_Lin_ErrorFlags errorFlagsStatus
structure for error flags status
Definition: IfxAsclin_Lin.h:535
IfxAsclin_ShiftDirection
IfxAsclin_ShiftDirection
SPI mode: defines the shift direction of the shift register. ASC and LIN mode: should be set to 0...
Definition: IfxAsclin.h:362
IfxAsclin_Lin_FrameDataControl::headerID
uint8 headerID
header ID
Definition: IfxAsclin_Lin.h:487
IfxAsclin_Lin_FrameControlFlags::txHeaderErrorOccurred
uint16 txHeaderErrorOccurred
Flag to indicate error occurred during transmission of Header.
Definition: IfxAsclin_Lin.h:375
IfxAsclin_Lin_Config::lin
IfxAsclin_Lin_LinControl lin
structure for lin control
Definition: IfxAsclin_Lin.h:554
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:81
IfxAsclin_Lin_EnabledInterrupts::exCollisionDetectionError
uint16 exCollisionDetectionError
Collision Detection Error.
Definition: IfxAsclin_Lin.h:360
IfxAsclin_Lin_LinControl::csEnable
boolean csEnable
LINCON.CSEN, hardware checksum generation and checking.
Definition: IfxAsclin_Lin.h:508
IfxAsclin_enableRxFifoInlet
IFX_INLINE void IfxAsclin_enableRxFifoInlet(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the receive FIFO outlet to allow filling of Rx FIFO through shift register...
Definition: IfxAsclin.h:1868
IfxAsclin_Lin_BitSamplingControl
Structure for Bit Sampling.
Definition: IfxAsclin_Lin.h:418
IfxAsclin_Lin_DataControl::headerOnly
IfxAsclin_HeaderResponseSelect headerOnly
DATCON.HO, Lin frame with header and response or header only.
Definition: IfxAsclin_Lin.h:438
IfxAsclin_Lin_isrReceive
IFX_EXTERN void IfxAsclin_Lin_isrReceive(IfxAsclin_Lin *asclin)
ISR receive routine.
Definition: IfxAsclin_Lin.c:830
IfxAsclin_Lin_waitForTransmittedResponse
IFX_EXTERN boolean IfxAsclin_Lin_waitForTransmittedResponse(IfxAsclin_Lin *asclin)
waits until transmit response end acknowledgemnet or an error has been detected
Definition: IfxAsclin_Lin.c:684
IfxAsclin_Lin_EnabledInterrupts
Structure to store interrupts which are enabled during initialisation.
Definition: IfxAsclin_Lin.h:346
IfxAsclin_Lin_checkForReceivedHeaderFlags
IFX_EXTERN void IfxAsclin_Lin_checkForReceivedHeaderFlags(IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for received header
Definition: IfxAsclin_Lin.c:54
IfxAsclin_Lin_DataControl::checksum
IfxAsclin_Checksum checksum
DATCON.CSM, checksum mode (classic or enhanced)
Definition: IfxAsclin_Lin.h:440
IfxAsclin_Lin_Direction_TransmitHeaderAndResponse
Transmit both Header and Response.
Definition: IfxAsclin_Lin.h:332
IfxAsclin_Lin
Definition: IfxAsclin_Lin.h:529
IfxAsclin_ParityType
IfxAsclin_ParityType
Type of parity bit attached to data bits Definition in Ifx_ASCLIN.FRAMECON.B.ODD. ...
Definition: IfxAsclin.h:254
IfxAsclin_Lin_clearFlagsStatus
IFX_EXTERN void IfxAsclin_Lin_clearFlagsStatus(IfxAsclin_Lin *asclin)
clears the flags status structures
Definition: IfxAsclin_Lin.c:224
IfxAsclin_Lin_AcknowledgementFlags::txHeaderEnd
uint8 txHeaderEnd
transmit header end
Definition: IfxAsclin_Lin.h:389
IfxAsclin_Lin_readHeader
IFX_INLINE void IfxAsclin_Lin_readHeader(IfxAsclin_Lin *asclin, uint8 *id)
Reads the header.
Definition: IfxAsclin_Lin.h:843
IfxAsclin_Lin_Config::alti
IfxAsclin_RxInputSelect alti
IOCR.ALTI, Rx input (alternate input) pin selection.
Definition: IfxAsclin_Lin.h:557
IfxAsclin_Lin_AcknowledgementFlags
Structure for Acknowledgement Flags.
Definition: IfxAsclin_Lin.h:387
IfxAsclin_Lin::linMode
IfxAsclin_LinMode linMode
LINCON.MS, lin mode of operation (master or slave)
Definition: IfxAsclin_Lin.h:533
IfxAsclin_Lin_FrameControl::idleDelay
IfxAsclin_IdleDelay idleDelay
FRAMECON.IDLE, idle delay.
Definition: IfxAsclin_Lin.h:473
IfxAsclin_Lin_LinControl::csi
IfxAsclin_ChecksumInjection csi
LINCON.CSI, checksum injection (not written or written) into RxFIFO.
Definition: IfxAsclin_Lin.h:509
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxAsclin.h
ASCLIN basic functionality.
IfxAsclin_Lin_FrameControl::collisionDetectionEnable
boolean collisionDetectionEnable
FRAMECON.CEN, collision detection enable.
Definition: IfxAsclin_Lin.h:479
IfxAsclin_Lin_waitForTransmittedHeader
IFX_EXTERN boolean IfxAsclin_Lin_waitForTransmittedHeader(IfxAsclin_Lin *asclin)
waits until transmit header end acknowledgemnet or an error has been detected
Definition: IfxAsclin_Lin.c:660
IfxAsclin_Lin_EnabledInterrupts::exReceiveFIFOOverflow
uint16 exReceiveFIFOOverflow
Receive FIFO Overflow.
Definition: IfxAsclin_Lin.h:361
IfxAsclin_Lin_AcknowledgementFlags::rxResponseEnd
uint8 rxResponseEnd
receive response end
Definition: IfxAsclin_Lin.h:392
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxAsclin_Lin_EnabledInterrupts::exLinParityError
uint16 exLinParityError
Lin Parity Error.
Definition: IfxAsclin_Lin.h:356
IfxAsclin_Lin_FrameControlFlags
Structure for Lin Frame Control flags.
Definition: IfxAsclin_Lin.h:367
IfxAsclin_Lin_DataControl::responseTimeoutMode
IfxAsclin_LinResponseTimeoutMode responseTimeoutMode
DATCON.RM, response mode (response or frame timeout threshold)
Definition: IfxAsclin_Lin.h:439
IfxAsclin_Lin_BaudrateDetection
Structure for Baudrate Detection.
Definition: IfxAsclin_Lin.h:398
IfxAsclin_Status
IfxAsclin_Status
Error status.
Definition: IfxAsclin.h:389
IfxAsclin_Lin_BitSamplingControl::medianFilter
IfxAsclin_SamplesPerBit medianFilter
BITCON.SM, no. of samples per bit 1 or 3.
Definition: IfxAsclin_Lin.h:421
IfxAsclin_Lin_FrameControlFlags::txResponseInProgress
uint16 txResponseInProgress
Flag to indicate Response transmission is initiated and is in progress.
Definition: IfxAsclin_Lin.h:372
IfxAsclin_Lin_LinControl::breakLength
uint8 breakLength
LINBTIMER.BREAK, break pulse generation and detection length.
Definition: IfxAsclin_Lin.h:510
IfxAsclin_Lin_PduType
Structure to hold Lin Pdu data.
Definition: IfxAsclin_Lin.h:565
IfxAsclin_Lin_FrameControlFlags::txHeaderInProgress
uint16 txHeaderInProgress
Flag to indicate Header transmission is initiated and is in progress.
Definition: IfxAsclin_Lin.h:371
IfxAsclin_Lin_PduType::dataPtr
uint8 * dataPtr
Pointer for LIN Response data.
Definition: IfxAsclin_Lin.h:569
IfxAsclin_Lin_FifoControl::buffMode
IfxAsclin_ReceiveBufferMode buffMode
RXFIFOCON.BUF, receive buffer mode (RXFIFO or RXBuffer)
Definition: IfxAsclin_Lin.h:464
IfxAsclin_setDataLength
IFX_INLINE void IfxAsclin_setDataLength(Ifx_ASCLIN *asclin, IfxAsclin_DataLength length)
Sets the data length (number of bits per transfer)
Definition: IfxAsclin.h:2243
IfxAsclin_Lin_EnabledInterrupts::exFramingError
uint16 exFramingError
Framing Error.
Definition: IfxAsclin_Lin.h:359
IfxAsclin_Lin_FifoControl::inWidth
IfxAsclin_TxFifoInletWidth inWidth
TXFIFOCON.INW, transmit FIFO inlet width.
Definition: IfxAsclin_Lin.h:465


iLLD_TC38A: IfxAsclin_PinMap.c Source File

  • _PinMap
IfxAsclin_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxAsclin_PinMap.c
3 * \brief ASCLIN I/O map
4 * \ingroup IfxLld_Asclin
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "IfxAsclin_PinMap.h"
44
45 IfxAsclin_Cts_In IfxAsclin0_CTSA_P14_9_IN = {&MODULE_ASCLIN0, {&MODULE_P14, 9}, Ifx_RxSel_a};
46 IfxAsclin_Cts_In IfxAsclin1_CTSA_P20_7_IN = {&MODULE_ASCLIN1, {&MODULE_P20, 7}, Ifx_RxSel_a};
47 IfxAsclin_Cts_In IfxAsclin1_CTSB_P32_4_IN = {&MODULE_ASCLIN1, {&MODULE_P32, 4}, Ifx_RxSel_b};
48 IfxAsclin_Cts_In IfxAsclin2_CTSA_P10_7_IN = {&MODULE_ASCLIN2, {&MODULE_P10, 7}, Ifx_RxSel_a};
49 IfxAsclin_Cts_In IfxAsclin2_CTSB_P33_5_IN = {&MODULE_ASCLIN2, {&MODULE_P33, 5}, Ifx_RxSel_b};
50 IfxAsclin_Cts_In IfxAsclin3_CTSA_P00_12_IN = {&MODULE_ASCLIN3, {&MODULE_P00,12}, Ifx_RxSel_a};
51 IfxAsclin_Rts_Out IfxAsclin0_RTS_P14_7_OUT = {&MODULE_ASCLIN0, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt2};
52 IfxAsclin_Rts_Out IfxAsclin1_RTS_P20_6_OUT = {&MODULE_ASCLIN1, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt2};
53 IfxAsclin_Rts_Out IfxAsclin1_RTS_P23_1_OUT = {&MODULE_ASCLIN1, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt2};
54 IfxAsclin_Rts_Out IfxAsclin2_RTS_P10_8_OUT = {&MODULE_ASCLIN2, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt2};
55 IfxAsclin_Rts_Out IfxAsclin2_RTS_P33_4_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt2};
56 IfxAsclin_Rts_Out IfxAsclin3_RTS_P00_9_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt3};
57 IfxAsclin_Rx_In IfxAsclin0_RXA_P14_1_IN = {&MODULE_ASCLIN0, {&MODULE_P14, 1}, Ifx_RxSel_a};
58 IfxAsclin_Rx_In IfxAsclin0_RXB_P15_3_IN = {&MODULE_ASCLIN0, {&MODULE_P15, 3}, Ifx_RxSel_b};
59 IfxAsclin_Rx_In IfxAsclin0_RXC_P01_8_IN = {&MODULE_ASCLIN0, {&MODULE_P01, 8}, Ifx_RxSel_c};
60 IfxAsclin_Rx_In IfxAsclin0_RXD_P33_10_IN = {&MODULE_ASCLIN0, {&MODULE_P33,10}, Ifx_RxSel_d};
61 IfxAsclin_Rx_In IfxAsclin0_RXE_P13_11_IN = {&MODULE_ASCLIN0, {&MODULE_P13,11}, Ifx_RxSel_e};
62 IfxAsclin_Rx_In IfxAsclin10_RXA_P00_4_IN = {&MODULE_ASCLIN10, {&MODULE_P00, 4}, Ifx_RxSel_a};
63 IfxAsclin_Rx_In IfxAsclin10_RXB_P00_8_IN = {&MODULE_ASCLIN10, {&MODULE_P00, 8}, Ifx_RxSel_b};
64 IfxAsclin_Rx_In IfxAsclin10_RXC_P13_0_IN = {&MODULE_ASCLIN10, {&MODULE_P13, 0}, Ifx_RxSel_c};
65 IfxAsclin_Rx_In IfxAsclin10_RXD_P13_1_IN = {&MODULE_ASCLIN10, {&MODULE_P13, 1}, Ifx_RxSel_d};
66 IfxAsclin_Rx_In IfxAsclin11_RXA_P10_0_IN = {&MODULE_ASCLIN11, {&MODULE_P10, 0}, Ifx_RxSel_a};
67 IfxAsclin_Rx_In IfxAsclin11_RXB_P10_4_IN = {&MODULE_ASCLIN11, {&MODULE_P10, 4}, Ifx_RxSel_b};
68 IfxAsclin_Rx_In IfxAsclin11_RXC_P21_0_IN = {&MODULE_ASCLIN11, {&MODULE_P21, 0}, Ifx_RxSel_c};
69 IfxAsclin_Rx_In IfxAsclin11_RXD_P21_1_IN = {&MODULE_ASCLIN11, {&MODULE_P21, 1}, Ifx_RxSel_d};
70 IfxAsclin_Rx_In IfxAsclin11_RXE_P21_2_IN = {&MODULE_ASCLIN11, {&MODULE_P21, 2}, Ifx_RxSel_e};
71 IfxAsclin_Rx_In IfxAsclin11_RXF_P21_5_IN = {&MODULE_ASCLIN11, {&MODULE_P21, 5}, Ifx_RxSel_f};
72 IfxAsclin_Rx_In IfxAsclin12_RXA_P00_3_IN = {&MODULE_ASCLIN12, {&MODULE_P00, 3}, Ifx_RxSel_a};
73 IfxAsclin_Rx_In IfxAsclin12_RXB_P00_5_IN = {&MODULE_ASCLIN12, {&MODULE_P00, 5}, Ifx_RxSel_b};
74 IfxAsclin_Rx_In IfxAsclin13_RXA_P00_9_IN = {&MODULE_ASCLIN13, {&MODULE_P00, 9}, Ifx_RxSel_a};
75 IfxAsclin_Rx_In IfxAsclin13_RXB_P00_11_IN = {&MODULE_ASCLIN13, {&MODULE_P00,11}, Ifx_RxSel_b};
76 IfxAsclin_Rx_In IfxAsclin14_RXA_P33_3_IN = {&MODULE_ASCLIN14, {&MODULE_P33, 3}, Ifx_RxSel_a};
77 IfxAsclin_Rx_In IfxAsclin14_RXB_P33_4_IN = {&MODULE_ASCLIN14, {&MODULE_P33, 4}, Ifx_RxSel_b};
78 IfxAsclin_Rx_In IfxAsclin15_RXA_P32_4_IN = {&MODULE_ASCLIN15, {&MODULE_P32, 4}, Ifx_RxSel_a};
79 IfxAsclin_Rx_In IfxAsclin15_RXB_P32_7_IN = {&MODULE_ASCLIN15, {&MODULE_P32, 7}, Ifx_RxSel_b};
80 IfxAsclin_Rx_In IfxAsclin16_RXA_P23_5_IN = {&MODULE_ASCLIN16, {&MODULE_P23, 5}, Ifx_RxSel_a};
81 IfxAsclin_Rx_In IfxAsclin16_RXB_P23_7_IN = {&MODULE_ASCLIN16, {&MODULE_P23, 7}, Ifx_RxSel_b};
82 IfxAsclin_Rx_In IfxAsclin17_RXA_P22_11_IN = {&MODULE_ASCLIN17, {&MODULE_P22,11}, Ifx_RxSel_a};
83 IfxAsclin_Rx_In IfxAsclin17_RXB_P21_0_IN = {&MODULE_ASCLIN17, {&MODULE_P21, 0}, Ifx_RxSel_b};
84 IfxAsclin_Rx_In IfxAsclin18_RXA_P21_1_IN = {&MODULE_ASCLIN18, {&MODULE_P21, 1}, Ifx_RxSel_a};
85 IfxAsclin_Rx_In IfxAsclin18_RXB_P21_4_IN = {&MODULE_ASCLIN18, {&MODULE_P21, 4}, Ifx_RxSel_b};
86 IfxAsclin_Rx_In IfxAsclin19_RXA_P15_6_IN = {&MODULE_ASCLIN19, {&MODULE_P15, 6}, Ifx_RxSel_a};
87 IfxAsclin_Rx_In IfxAsclin19_RXB_P15_7_IN = {&MODULE_ASCLIN19, {&MODULE_P15, 7}, Ifx_RxSel_b};
88 IfxAsclin_Rx_In IfxAsclin1_RXA_P15_1_IN = {&MODULE_ASCLIN1, {&MODULE_P15, 1}, Ifx_RxSel_a};
89 IfxAsclin_Rx_In IfxAsclin1_RXB_P15_5_IN = {&MODULE_ASCLIN1, {&MODULE_P15, 5}, Ifx_RxSel_b};
90 IfxAsclin_Rx_In IfxAsclin1_RXC_P20_9_IN = {&MODULE_ASCLIN1, {&MODULE_P20, 9}, Ifx_RxSel_c};
91 IfxAsclin_Rx_In IfxAsclin1_RXD_P14_8_IN = {&MODULE_ASCLIN1, {&MODULE_P14, 8}, Ifx_RxSel_d};
92 IfxAsclin_Rx_In IfxAsclin1_RXE_P11_10_IN = {&MODULE_ASCLIN1, {&MODULE_P11,10}, Ifx_RxSel_e};
93 IfxAsclin_Rx_In IfxAsclin1_RXF_P33_13_IN = {&MODULE_ASCLIN1, {&MODULE_P33,13}, Ifx_RxSel_f};
94 IfxAsclin_Rx_In IfxAsclin1_RXG_P02_3_IN = {&MODULE_ASCLIN1, {&MODULE_P02, 3}, Ifx_RxSel_g};
95 IfxAsclin_Rx_In IfxAsclin20_RXA_P14_7_IN = {&MODULE_ASCLIN20, {&MODULE_P14, 7}, Ifx_RxSel_a};
96 IfxAsclin_Rx_In IfxAsclin20_RXB_P14_9_IN = {&MODULE_ASCLIN20, {&MODULE_P14, 9}, Ifx_RxSel_b};
97 IfxAsclin_Rx_In IfxAsclin21_RXA_P13_0_IN = {&MODULE_ASCLIN21, {&MODULE_P13, 0}, Ifx_RxSel_a};
98 IfxAsclin_Rx_In IfxAsclin21_RXB_P13_3_IN = {&MODULE_ASCLIN21, {&MODULE_P13, 3}, Ifx_RxSel_b};
99 IfxAsclin_Rx_In IfxAsclin22_RXA_P10_4_IN = {&MODULE_ASCLIN22, {&MODULE_P10, 4}, Ifx_RxSel_a};
100 IfxAsclin_Rx_In IfxAsclin22_RXB_P10_5_IN = {&MODULE_ASCLIN22, {&MODULE_P10, 5}, Ifx_RxSel_b};
101 IfxAsclin_Rx_In IfxAsclin23_RXA_P10_6_IN = {&MODULE_ASCLIN23, {&MODULE_P10, 6}, Ifx_RxSel_a};
102 IfxAsclin_Rx_In IfxAsclin23_RXB_P10_7_IN = {&MODULE_ASCLIN23, {&MODULE_P10, 7}, Ifx_RxSel_b};
103 IfxAsclin_Rx_In IfxAsclin2_RXA_P14_3_IN = {&MODULE_ASCLIN2, {&MODULE_P14, 3}, Ifx_RxSel_a};
104 IfxAsclin_Rx_In IfxAsclin2_RXB_P02_1_IN = {&MODULE_ASCLIN2, {&MODULE_P02, 1}, Ifx_RxSel_b};
105 IfxAsclin_Rx_In IfxAsclin2_RXC_P02_10_IN = {&MODULE_ASCLIN2, {&MODULE_P02,10}, Ifx_RxSel_c};
106 IfxAsclin_Rx_In IfxAsclin2_RXD_P10_6_IN = {&MODULE_ASCLIN2, {&MODULE_P10, 6}, Ifx_RxSel_d};
107 IfxAsclin_Rx_In IfxAsclin2_RXE_P33_8_IN = {&MODULE_ASCLIN2, {&MODULE_P33, 8}, Ifx_RxSel_e};
108 IfxAsclin_Rx_In IfxAsclin2_RXF_P32_6_IN = {&MODULE_ASCLIN2, {&MODULE_P32, 6}, Ifx_RxSel_f};
109 IfxAsclin_Rx_In IfxAsclin2_RXG_P02_0_IN = {&MODULE_ASCLIN2, {&MODULE_P02, 0}, Ifx_RxSel_g};
110 IfxAsclin_Rx_In IfxAsclin3_RXA_P15_7_IN = {&MODULE_ASCLIN3, {&MODULE_P15, 7}, Ifx_RxSel_a};
111 IfxAsclin_Rx_In IfxAsclin3_RXB_P11_0_IN = {&MODULE_ASCLIN3, {&MODULE_P11, 0}, Ifx_RxSel_b};
112 IfxAsclin_Rx_In IfxAsclin3_RXC_P20_3_IN = {&MODULE_ASCLIN3, {&MODULE_P20, 3}, Ifx_RxSel_c};
113 IfxAsclin_Rx_In IfxAsclin3_RXD_P32_2_IN = {&MODULE_ASCLIN3, {&MODULE_P32, 2}, Ifx_RxSel_d};
114 IfxAsclin_Rx_In IfxAsclin3_RXE_P00_1_IN = {&MODULE_ASCLIN3, {&MODULE_P00, 1}, Ifx_RxSel_e};
115 IfxAsclin_Rx_In IfxAsclin3_RXF_P21_6_IN = {&MODULE_ASCLIN3, {&MODULE_P21, 6}, Ifx_RxSel_f};
116 IfxAsclin_Rx_In IfxAsclin3_RXG_P21_2_IN = {&MODULE_ASCLIN3, {&MODULE_P21, 2}, Ifx_RxSel_g};
117 IfxAsclin_Rx_In IfxAsclin3_RXG_P21_3_IN = {&MODULE_ASCLIN3, {&MODULE_P21, 3}, Ifx_RxSel_g};
118 IfxAsclin_Rx_In IfxAsclin3_RXH_P13_12_IN = {&MODULE_ASCLIN3, {&MODULE_P13,12}, Ifx_RxSel_h};
119 IfxAsclin_Rx_In IfxAsclin4_RXA_P00_12_IN = {&MODULE_ASCLIN4, {&MODULE_P00,12}, Ifx_RxSel_a};
120 IfxAsclin_Rx_In IfxAsclin4_RXB_P34_2_IN = {&MODULE_ASCLIN4, {&MODULE_P34, 2}, Ifx_RxSel_b};
121 IfxAsclin_Rx_In IfxAsclin4_RXC_P22_6_IN = {&MODULE_ASCLIN4, {&MODULE_P22, 6}, Ifx_RxSel_c};
122 IfxAsclin_Rx_In IfxAsclin4_RXD_P22_9_IN = {&MODULE_ASCLIN4, {&MODULE_P22, 9}, Ifx_RxSel_d};
123 IfxAsclin_Rx_In IfxAsclin5_RXA_P00_6_IN = {&MODULE_ASCLIN5, {&MODULE_P00, 6}, Ifx_RxSel_a};
124 IfxAsclin_Rx_In IfxAsclin5_RXB_P33_4_IN = {&MODULE_ASCLIN5, {&MODULE_P33, 4}, Ifx_RxSel_b};
125 IfxAsclin_Rx_In IfxAsclin5_RXC_P22_3_IN = {&MODULE_ASCLIN5, {&MODULE_P22, 3}, Ifx_RxSel_c};
126 IfxAsclin_Rx_In IfxAsclin5_RXD_P14_15_IN = {&MODULE_ASCLIN5, {&MODULE_P14,15}, Ifx_RxSel_d};
127 IfxAsclin_Rx_In IfxAsclin6_RXA_P23_3_IN = {&MODULE_ASCLIN6, {&MODULE_P23, 3}, Ifx_RxSel_a};
128 IfxAsclin_Rx_In IfxAsclin6_RXB_P01_0_IN = {&MODULE_ASCLIN6, {&MODULE_P01, 0}, Ifx_RxSel_b};
129 IfxAsclin_Rx_In IfxAsclin6_RXC_P32_6_IN = {&MODULE_ASCLIN6, {&MODULE_P32, 6}, Ifx_RxSel_c};
130 IfxAsclin_Rx_In IfxAsclin6_RXD_P10_9_IN = {&MODULE_ASCLIN6, {&MODULE_P10, 9}, Ifx_RxSel_d};
131 IfxAsclin_Rx_In IfxAsclin6_RXE_P22_0_IN = {&MODULE_ASCLIN6, {&MODULE_P22, 0}, Ifx_RxSel_e};
132 IfxAsclin_Rx_In IfxAsclin6_RXF_P23_1_IN = {&MODULE_ASCLIN6, {&MODULE_P23, 1}, Ifx_RxSel_f};
133 IfxAsclin_Rx_In IfxAsclin7_RXA_P14_15_IN = {&MODULE_ASCLIN7, {&MODULE_P14,15}, Ifx_RxSel_a};
134 IfxAsclin_Rx_In IfxAsclin7_RXB_P01_8_IN = {&MODULE_ASCLIN7, {&MODULE_P01, 8}, Ifx_RxSel_b};
135 IfxAsclin_Rx_In IfxAsclin7_RXC_P23_2_IN = {&MODULE_ASCLIN7, {&MODULE_P23, 2}, Ifx_RxSel_c};
136 IfxAsclin_Rx_In IfxAsclin7_RXD_P13_11_IN = {&MODULE_ASCLIN7, {&MODULE_P13,11}, Ifx_RxSel_d};
137 IfxAsclin_Rx_In IfxAsclin7_RXE_P22_1_IN = {&MODULE_ASCLIN7, {&MODULE_P22, 1}, Ifx_RxSel_e};
138 IfxAsclin_Rx_In IfxAsclin7_RXF_P22_4_IN = {&MODULE_ASCLIN7, {&MODULE_P22, 4}, Ifx_RxSel_f};
139 IfxAsclin_Rx_In IfxAsclin8_RXA_P02_9_IN = {&MODULE_ASCLIN8, {&MODULE_P02, 9}, Ifx_RxSel_a};
140 IfxAsclin_Rx_In IfxAsclin8_RXB_P02_10_IN = {&MODULE_ASCLIN8, {&MODULE_P02,10}, Ifx_RxSel_b};
141 IfxAsclin_Rx_In IfxAsclin8_RXC_P33_1_IN = {&MODULE_ASCLIN8, {&MODULE_P33, 1}, Ifx_RxSel_c};
142 IfxAsclin_Rx_In IfxAsclin8_RXD_P33_6_IN = {&MODULE_ASCLIN8, {&MODULE_P33, 6}, Ifx_RxSel_d};
143 IfxAsclin_Rx_In IfxAsclin8_RXE_P34_5_IN = {&MODULE_ASCLIN8, {&MODULE_P34, 5}, Ifx_RxSel_e};
144 IfxAsclin_Rx_In IfxAsclin9_RXA_P01_5_IN = {&MODULE_ASCLIN9, {&MODULE_P01, 5}, Ifx_RxSel_a};
145 IfxAsclin_Rx_In IfxAsclin9_RXB_P01_7_IN = {&MODULE_ASCLIN9, {&MODULE_P01, 7}, Ifx_RxSel_b};
146 IfxAsclin_Rx_In IfxAsclin9_RXC_P14_7_IN = {&MODULE_ASCLIN9, {&MODULE_P14, 7}, Ifx_RxSel_c};
147 IfxAsclin_Rx_In IfxAsclin9_RXD_P14_9_IN = {&MODULE_ASCLIN9, {&MODULE_P14, 9}, Ifx_RxSel_d};
148 IfxAsclin_Rx_In IfxAsclin9_RXE_P20_6_IN = {&MODULE_ASCLIN9, {&MODULE_P20, 6}, Ifx_RxSel_e};
149 IfxAsclin_Rx_In IfxAsclin9_RXF_P20_7_IN = {&MODULE_ASCLIN9, {&MODULE_P20, 7}, Ifx_RxSel_f};
150 IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P14_0_OUT = {&MODULE_ASCLIN0, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt6};
151 IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P15_2_OUT = {&MODULE_ASCLIN0, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt6};
152 IfxAsclin_Sclk_Out IfxAsclin10_SCLK_P13_2_OUT = {&MODULE_ASCLIN10, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt2};
153 IfxAsclin_Sclk_Out IfxAsclin11_SCLK_P21_3_OUT = {&MODULE_ASCLIN11, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt2};
154 IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P15_0_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt6};
155 IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P20_10_OUT = {&MODULE_ASCLIN1, {&MODULE_P20,10}, IfxPort_OutputIdx_alt6};
156 IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_11_OUT = {&MODULE_ASCLIN1, {&MODULE_P33,11}, IfxPort_OutputIdx_alt2};
157 IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_12_OUT = {&MODULE_ASCLIN1, {&MODULE_P33,12}, IfxPort_OutputIdx_alt4};
158 IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P02_4_OUT = {&MODULE_ASCLIN2, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt2};
159 IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P10_6_OUT = {&MODULE_ASCLIN2, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt2};
160 IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P14_2_OUT = {&MODULE_ASCLIN2, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt6};
161 IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_7_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt2};
162 IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_9_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt4};
163 IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_0_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt2};
164 IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_2_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt2};
165 IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P11_1_OUT = {&MODULE_ASCLIN3, {&MODULE_P11, 1}, IfxPort_OutputIdx_alt2};
166 IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P11_4_OUT = {&MODULE_ASCLIN3, {&MODULE_P11, 4}, IfxPort_OutputIdx_alt2};
167 IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_6_OUT = {&MODULE_ASCLIN3, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt6};
168 IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_8_OUT = {&MODULE_ASCLIN3, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt6};
169 IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P20_0_OUT = {&MODULE_ASCLIN3, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt3};
170 IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_5_OUT = {&MODULE_ASCLIN3, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt2};
171 IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_7_OUT = {&MODULE_ASCLIN3, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt3};
172 IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P32_3_OUT = {&MODULE_ASCLIN3, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt4};
173 IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P33_2_OUT = {&MODULE_ASCLIN3, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt2};
174 IfxAsclin_Sclk_Out IfxAsclin4_SCLK_P00_10_OUT = {&MODULE_ASCLIN4, {&MODULE_P00,10}, IfxPort_OutputIdx_alt2};
175 IfxAsclin_Sclk_Out IfxAsclin4_SCLK_P22_7_OUT = {&MODULE_ASCLIN4, {&MODULE_P22, 7}, IfxPort_OutputIdx_alt2};
176 IfxAsclin_Sclk_Out IfxAsclin4_SCLK_P34_3_OUT = {&MODULE_ASCLIN4, {&MODULE_P34, 3}, IfxPort_OutputIdx_alt2};
177 IfxAsclin_Sclk_Out IfxAsclin5_SCLK_P14_12_OUT = {&MODULE_ASCLIN5, {&MODULE_P14,12}, IfxPort_OutputIdx_alt2};
178 IfxAsclin_Sclk_Out IfxAsclin5_SCLK_P22_8_OUT = {&MODULE_ASCLIN5, {&MODULE_P22, 8}, IfxPort_OutputIdx_alt2};
179 IfxAsclin_Sclk_Out IfxAsclin5_SCLK_P33_3_OUT = {&MODULE_ASCLIN5, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt2};
180 IfxAsclin_Sclk_Out IfxAsclin6_SCLK_P02_14_OUT = {&MODULE_ASCLIN6, {&MODULE_P02,14}, IfxPort_OutputIdx_alt2};
181 IfxAsclin_Sclk_Out IfxAsclin6_SCLK_P10_11_OUT = {&MODULE_ASCLIN6, {&MODULE_P10,11}, IfxPort_OutputIdx_alt2};
182 IfxAsclin_Sclk_Out IfxAsclin6_SCLK_P23_1_OUT = {&MODULE_ASCLIN6, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt7};
183 IfxAsclin_Sclk_Out IfxAsclin7_SCLK_P01_10_OUT = {&MODULE_ASCLIN7, {&MODULE_P01,10}, IfxPort_OutputIdx_alt2};
184 IfxAsclin_Sclk_Out IfxAsclin7_SCLK_P13_13_OUT = {&MODULE_ASCLIN7, {&MODULE_P13,13}, IfxPort_OutputIdx_alt2};
185 IfxAsclin_Sclk_Out IfxAsclin7_SCLK_P14_12_OUT = {&MODULE_ASCLIN7, {&MODULE_P14,12}, IfxPort_OutputIdx_alt3};
186 IfxAsclin_Sclk_Out IfxAsclin8_SCLK_P02_8_OUT = {&MODULE_ASCLIN8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt3};
187 IfxAsclin_Sclk_Out IfxAsclin9_SCLK_P01_6_OUT = {&MODULE_ASCLIN9, {&MODULE_P01, 6}, IfxPort_OutputIdx_alt3};
188 IfxAsclin_Slso_Out IfxAsclin10_SLSO_P13_3_OUT = {&MODULE_ASCLIN10, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt2};
189 IfxAsclin_Slso_Out IfxAsclin11_SLSO_P21_4_OUT = {&MODULE_ASCLIN11, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt2};
190 IfxAsclin_Slso_Out IfxAsclin1_SLSO_P14_3_OUT = {&MODULE_ASCLIN1, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt4};
191 IfxAsclin_Slso_Out IfxAsclin1_SLSO_P20_8_OUT = {&MODULE_ASCLIN1, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt2};
192 IfxAsclin_Slso_Out IfxAsclin1_SLSO_P33_10_OUT = {&MODULE_ASCLIN1, {&MODULE_P33,10}, IfxPort_OutputIdx_alt4};
193 IfxAsclin_Slso_Out IfxAsclin2_SLSO_P02_3_OUT = {&MODULE_ASCLIN2, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt2};
194 IfxAsclin_Slso_Out IfxAsclin2_SLSO_P10_5_OUT = {&MODULE_ASCLIN2, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt6};
195 IfxAsclin_Slso_Out IfxAsclin2_SLSO_P33_6_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt2};
196 IfxAsclin_Slso_Out IfxAsclin3_SLSO_P00_3_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt2};
197 IfxAsclin_Slso_Out IfxAsclin3_SLSO_P12_1_OUT = {&MODULE_ASCLIN3, {&MODULE_P12, 1}, IfxPort_OutputIdx_alt2};
198 IfxAsclin_Slso_Out IfxAsclin3_SLSO_P14_3_OUT = {&MODULE_ASCLIN3, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt5};
199 IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_2_OUT = {&MODULE_ASCLIN3, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt2};
200 IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_6_OUT = {&MODULE_ASCLIN3, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt2};
201 IfxAsclin_Slso_Out IfxAsclin3_SLSO_P33_1_OUT = {&MODULE_ASCLIN3, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt2};
202 IfxAsclin_Slso_Out IfxAsclin4_SLSO_P00_11_OUT = {&MODULE_ASCLIN4, {&MODULE_P00,11}, IfxPort_OutputIdx_alt2};
203 IfxAsclin_Slso_Out IfxAsclin4_SLSO_P22_11_OUT = {&MODULE_ASCLIN4, {&MODULE_P22,11}, IfxPort_OutputIdx_alt2};
204 IfxAsclin_Slso_Out IfxAsclin4_SLSO_P22_4_OUT = {&MODULE_ASCLIN4, {&MODULE_P22, 4}, IfxPort_OutputIdx_alt2};
205 IfxAsclin_Slso_Out IfxAsclin4_SLSO_P34_4_OUT = {&MODULE_ASCLIN4, {&MODULE_P34, 4}, IfxPort_OutputIdx_alt2};
206 IfxAsclin_Slso_Out IfxAsclin5_SLSO_P14_8_OUT = {&MODULE_ASCLIN5, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt2};
207 IfxAsclin_Slso_Out IfxAsclin5_SLSO_P33_5_OUT = {&MODULE_ASCLIN5, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt7};
208 IfxAsclin_Slso_Out IfxAsclin6_SLSO_P02_12_OUT = {&MODULE_ASCLIN6, {&MODULE_P02,12}, IfxPort_OutputIdx_alt4};
209 IfxAsclin_Slso_Out IfxAsclin6_SLSO_P10_13_OUT = {&MODULE_ASCLIN6, {&MODULE_P10,13}, IfxPort_OutputIdx_alt2};
210 IfxAsclin_Slso_Out IfxAsclin6_SLSO_P23_4_OUT = {&MODULE_ASCLIN6, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt2};
211 IfxAsclin_Slso_Out IfxAsclin7_SLSO_P01_11_OUT = {&MODULE_ASCLIN7, {&MODULE_P01,11}, IfxPort_OutputIdx_alt2};
212 IfxAsclin_Slso_Out IfxAsclin7_SLSO_P13_15_OUT = {&MODULE_ASCLIN7, {&MODULE_P13,15}, IfxPort_OutputIdx_alt2};
213 IfxAsclin_Slso_Out IfxAsclin7_SLSO_P14_8_OUT = {&MODULE_ASCLIN7, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt3};
214 IfxAsclin_Slso_Out IfxAsclin8_SLSO_P02_11_OUT = {&MODULE_ASCLIN8, {&MODULE_P02,11}, IfxPort_OutputIdx_alt3};
215 IfxAsclin_Slso_Out IfxAsclin9_SLSO_P01_4_OUT = {&MODULE_ASCLIN9, {&MODULE_P01, 4}, IfxPort_OutputIdx_alt3};
216 IfxAsclin_Tx_Out IfxAsclin0_TX_P01_13_OUT = {&MODULE_ASCLIN0, {&MODULE_P01,13}, IfxPort_OutputIdx_alt2};
217 IfxAsclin_Tx_Out IfxAsclin0_TX_P13_10_OUT = {&MODULE_ASCLIN0, {&MODULE_P13,10}, IfxPort_OutputIdx_alt2};
218 IfxAsclin_Tx_Out IfxAsclin0_TX_P14_0_OUT = {&MODULE_ASCLIN0, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt2};
219 IfxAsclin_Tx_Out IfxAsclin0_TX_P14_1_OUT = {&MODULE_ASCLIN0, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt2};
220 IfxAsclin_Tx_Out IfxAsclin0_TX_P15_2_OUT = {&MODULE_ASCLIN0, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt2};
221 IfxAsclin_Tx_Out IfxAsclin0_TX_P15_3_OUT = {&MODULE_ASCLIN0, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt2};
222 IfxAsclin_Tx_Out IfxAsclin0_TX_P33_9_OUT = {&MODULE_ASCLIN0, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt6};
223 IfxAsclin_Tx_Out IfxAsclin10_TX_P00_8_OUT = {&MODULE_ASCLIN10, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt3};
224 IfxAsclin_Tx_Out IfxAsclin10_TX_P13_0_OUT = {&MODULE_ASCLIN10, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt2};
225 IfxAsclin_Tx_Out IfxAsclin11_TX_P10_0_OUT = {&MODULE_ASCLIN11, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt2};
226 IfxAsclin_Tx_Out IfxAsclin11_TX_P21_0_OUT = {&MODULE_ASCLIN11, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt2};
227 IfxAsclin_Tx_Out IfxAsclin11_TX_P21_5_OUT = {&MODULE_ASCLIN11, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt3};
228 IfxAsclin_Tx_Out IfxAsclin12_TX_P00_3_OUT = {&MODULE_ASCLIN12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt3};
229 IfxAsclin_Tx_Out IfxAsclin12_TX_P01_6_OUT = {&MODULE_ASCLIN12, {&MODULE_P01, 6}, IfxPort_OutputIdx_alt2};
230 IfxAsclin_Tx_Out IfxAsclin13_TX_P00_10_OUT = {&MODULE_ASCLIN13, {&MODULE_P00,10}, IfxPort_OutputIdx_alt3};
231 IfxAsclin_Tx_Out IfxAsclin13_TX_P00_11_OUT = {&MODULE_ASCLIN13, {&MODULE_P00,11}, IfxPort_OutputIdx_alt3};
232 IfxAsclin_Tx_Out IfxAsclin14_TX_P33_2_OUT = {&MODULE_ASCLIN14, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt7};
233 IfxAsclin_Tx_Out IfxAsclin14_TX_P33_3_OUT = {&MODULE_ASCLIN14, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt7};
234 IfxAsclin_Tx_Out IfxAsclin15_TX_P32_7_OUT = {&MODULE_ASCLIN15, {&MODULE_P32, 7}, IfxPort_OutputIdx_alt4};
235 IfxAsclin_Tx_Out IfxAsclin15_TX_P33_0_OUT = {&MODULE_ASCLIN15, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt4};
236 IfxAsclin_Tx_Out IfxAsclin16_TX_P23_6_OUT = {&MODULE_ASCLIN16, {&MODULE_P23, 6}, IfxPort_OutputIdx_alt2};
237 IfxAsclin_Tx_Out IfxAsclin16_TX_P23_7_OUT = {&MODULE_ASCLIN16, {&MODULE_P23, 7}, IfxPort_OutputIdx_alt2};
238 IfxAsclin_Tx_Out IfxAsclin17_TX_P22_11_OUT = {&MODULE_ASCLIN17, {&MODULE_P22,11}, IfxPort_OutputIdx_alt3};
239 IfxAsclin_Tx_Out IfxAsclin17_TX_P22_7_OUT = {&MODULE_ASCLIN17, {&MODULE_P22, 7}, IfxPort_OutputIdx_alt3};
240 IfxAsclin_Tx_Out IfxAsclin18_TX_P21_3_OUT = {&MODULE_ASCLIN18, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt3};
241 IfxAsclin_Tx_Out IfxAsclin18_TX_P21_4_OUT = {&MODULE_ASCLIN18, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt3};
242 IfxAsclin_Tx_Out IfxAsclin19_TX_P15_4_OUT = {&MODULE_ASCLIN19, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt4};
243 IfxAsclin_Tx_Out IfxAsclin19_TX_P15_7_OUT = {&MODULE_ASCLIN19, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt4};
244 IfxAsclin_Tx_Out IfxAsclin1_TX_P02_2_OUT = {&MODULE_ASCLIN1, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt2};
245 IfxAsclin_Tx_Out IfxAsclin1_TX_P11_12_OUT = {&MODULE_ASCLIN1, {&MODULE_P11,12}, IfxPort_OutputIdx_alt2};
246 IfxAsclin_Tx_Out IfxAsclin1_TX_P14_10_OUT = {&MODULE_ASCLIN1, {&MODULE_P14,10}, IfxPort_OutputIdx_alt4};
247 IfxAsclin_Tx_Out IfxAsclin1_TX_P14_15_OUT = {&MODULE_ASCLIN1, {&MODULE_P14,15}, IfxPort_OutputIdx_alt2};
248 IfxAsclin_Tx_Out IfxAsclin1_TX_P15_0_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt2};
249 IfxAsclin_Tx_Out IfxAsclin1_TX_P15_1_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt2};
250 IfxAsclin_Tx_Out IfxAsclin1_TX_P15_4_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt2};
251 IfxAsclin_Tx_Out IfxAsclin1_TX_P15_5_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt2};
252 IfxAsclin_Tx_Out IfxAsclin1_TX_P20_10_OUT = {&MODULE_ASCLIN1, {&MODULE_P20,10}, IfxPort_OutputIdx_alt2};
253 IfxAsclin_Tx_Out IfxAsclin1_TX_P33_12_OUT = {&MODULE_ASCLIN1, {&MODULE_P33,12}, IfxPort_OutputIdx_alt2};
254 IfxAsclin_Tx_Out IfxAsclin1_TX_P33_13_OUT = {&MODULE_ASCLIN1, {&MODULE_P33,13}, IfxPort_OutputIdx_alt2};
255 IfxAsclin_Tx_Out IfxAsclin20_TX_P14_7_OUT = {&MODULE_ASCLIN20, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt7};
256 IfxAsclin_Tx_Out IfxAsclin20_TX_P14_8_OUT = {&MODULE_ASCLIN20, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt7};
257 IfxAsclin_Tx_Out IfxAsclin21_TX_P13_2_OUT = {&MODULE_ASCLIN21, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt7};
258 IfxAsclin_Tx_Out IfxAsclin21_TX_P13_3_OUT = {&MODULE_ASCLIN21, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt6};
259 IfxAsclin_Tx_Out IfxAsclin22_TX_P10_0_OUT = {&MODULE_ASCLIN22, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt6};
260 IfxAsclin_Tx_Out IfxAsclin22_TX_P10_4_OUT = {&MODULE_ASCLIN22, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt2};
261 IfxAsclin_Tx_Out IfxAsclin23_TX_P10_7_OUT = {&MODULE_ASCLIN23, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt2};
262 IfxAsclin_Tx_Out IfxAsclin23_TX_P10_8_OUT = {&MODULE_ASCLIN23, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt4};
263 IfxAsclin_Tx_Out IfxAsclin2_TX_P02_0_OUT = {&MODULE_ASCLIN2, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt2};
264 IfxAsclin_Tx_Out IfxAsclin2_TX_P02_9_OUT = {&MODULE_ASCLIN2, {&MODULE_P02, 9}, IfxPort_OutputIdx_alt2};
265 IfxAsclin_Tx_Out IfxAsclin2_TX_P10_5_OUT = {&MODULE_ASCLIN2, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt2};
266 IfxAsclin_Tx_Out IfxAsclin2_TX_P14_2_OUT = {&MODULE_ASCLIN2, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt2};
267 IfxAsclin_Tx_Out IfxAsclin2_TX_P14_3_OUT = {&MODULE_ASCLIN2, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt2};
268 IfxAsclin_Tx_Out IfxAsclin2_TX_P32_5_OUT = {&MODULE_ASCLIN2, {&MODULE_P32, 5}, IfxPort_OutputIdx_alt2};
269 IfxAsclin_Tx_Out IfxAsclin2_TX_P33_8_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt2};
270 IfxAsclin_Tx_Out IfxAsclin2_TX_P33_9_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt2};
271 IfxAsclin_Tx_Out IfxAsclin3_TX_P00_0_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt3};
272 IfxAsclin_Tx_Out IfxAsclin3_TX_P00_1_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt2};
273 IfxAsclin_Tx_Out IfxAsclin3_TX_P11_0_OUT = {&MODULE_ASCLIN3, {&MODULE_P11, 0}, IfxPort_OutputIdx_alt2};
274 IfxAsclin_Tx_Out IfxAsclin3_TX_P11_1_OUT = {&MODULE_ASCLIN3, {&MODULE_P11, 1}, IfxPort_OutputIdx_alt3};
275 IfxAsclin_Tx_Out IfxAsclin3_TX_P13_9_OUT = {&MODULE_ASCLIN3, {&MODULE_P13, 9}, IfxPort_OutputIdx_alt2};
276 IfxAsclin_Tx_Out IfxAsclin3_TX_P15_6_OUT = {&MODULE_ASCLIN3, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt2};
277 IfxAsclin_Tx_Out IfxAsclin3_TX_P15_7_OUT = {&MODULE_ASCLIN3, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt2};
278 IfxAsclin_Tx_Out IfxAsclin3_TX_P20_0_OUT = {&MODULE_ASCLIN3, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt2};
279 IfxAsclin_Tx_Out IfxAsclin3_TX_P20_3_OUT = {&MODULE_ASCLIN3, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt2};
280 IfxAsclin_Tx_Out IfxAsclin3_TX_P21_7_OUT = {&MODULE_ASCLIN3, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt2};
281 IfxAsclin_Tx_Out IfxAsclin3_TX_P22_0_OUT = {&MODULE_ASCLIN3, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt2};
282 IfxAsclin_Tx_Out IfxAsclin3_TX_P22_1_OUT = {&MODULE_ASCLIN3, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt2};
283 IfxAsclin_Tx_Out IfxAsclin3_TX_P32_2_OUT = {&MODULE_ASCLIN3, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt2};
284 IfxAsclin_Tx_Out IfxAsclin3_TX_P32_3_OUT = {&MODULE_ASCLIN3, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt2};
285 IfxAsclin_Tx_Out IfxAsclin4_TX_P00_9_OUT = {&MODULE_ASCLIN4, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt5};
286 IfxAsclin_Tx_Out IfxAsclin4_TX_P22_10_OUT = {&MODULE_ASCLIN4, {&MODULE_P22,10}, IfxPort_OutputIdx_alt2};
287 IfxAsclin_Tx_Out IfxAsclin4_TX_P22_5_OUT = {&MODULE_ASCLIN4, {&MODULE_P22, 5}, IfxPort_OutputIdx_alt2};
288 IfxAsclin_Tx_Out IfxAsclin4_TX_P34_1_OUT = {&MODULE_ASCLIN4, {&MODULE_P34, 1}, IfxPort_OutputIdx_alt2};
289 IfxAsclin_Tx_Out IfxAsclin5_TX_P00_7_OUT = {&MODULE_ASCLIN5, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt2};
290 IfxAsclin_Tx_Out IfxAsclin5_TX_P14_14_OUT = {&MODULE_ASCLIN5, {&MODULE_P14,14}, IfxPort_OutputIdx_alt2};
291 IfxAsclin_Tx_Out IfxAsclin5_TX_P22_2_OUT = {&MODULE_ASCLIN5, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt2};
292 IfxAsclin_Tx_Out IfxAsclin5_TX_P33_0_OUT = {&MODULE_ASCLIN5, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt2};
293 IfxAsclin_Tx_Out IfxAsclin6_TX_P01_1_OUT = {&MODULE_ASCLIN6, {&MODULE_P01, 1}, IfxPort_OutputIdx_alt4};
294 IfxAsclin_Tx_Out IfxAsclin6_TX_P02_15_OUT = {&MODULE_ASCLIN6, {&MODULE_P02,15}, IfxPort_OutputIdx_alt4};
295 IfxAsclin_Tx_Out IfxAsclin6_TX_P10_10_OUT = {&MODULE_ASCLIN6, {&MODULE_P10,10}, IfxPort_OutputIdx_alt2};
296 IfxAsclin_Tx_Out IfxAsclin6_TX_P22_0_OUT = {&MODULE_ASCLIN6, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt7};
297 IfxAsclin_Tx_Out IfxAsclin6_TX_P23_5_OUT = {&MODULE_ASCLIN6, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt2};
298 IfxAsclin_Tx_Out IfxAsclin6_TX_P32_7_OUT = {&MODULE_ASCLIN6, {&MODULE_P32, 7}, IfxPort_OutputIdx_alt2};
299 IfxAsclin_Tx_Out IfxAsclin7_TX_P01_12_OUT = {&MODULE_ASCLIN7, {&MODULE_P01,12}, IfxPort_OutputIdx_alt2};
300 IfxAsclin_Tx_Out IfxAsclin7_TX_P01_9_OUT = {&MODULE_ASCLIN7, {&MODULE_P01, 9}, IfxPort_OutputIdx_alt2};
301 IfxAsclin_Tx_Out IfxAsclin7_TX_P13_12_OUT = {&MODULE_ASCLIN7, {&MODULE_P13,12}, IfxPort_OutputIdx_alt2};
302 IfxAsclin_Tx_Out IfxAsclin7_TX_P14_14_OUT = {&MODULE_ASCLIN7, {&MODULE_P14,14}, IfxPort_OutputIdx_alt3};
303 IfxAsclin_Tx_Out IfxAsclin7_TX_P22_1_OUT = {&MODULE_ASCLIN7, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt7};
304 IfxAsclin_Tx_Out IfxAsclin7_TX_P23_3_OUT = {&MODULE_ASCLIN7, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt2};
305 IfxAsclin_Tx_Out IfxAsclin8_TX_P02_9_OUT = {&MODULE_ASCLIN8, {&MODULE_P02, 9}, IfxPort_OutputIdx_alt3};
306 IfxAsclin_Tx_Out IfxAsclin8_TX_P33_7_OUT = {&MODULE_ASCLIN8, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt4};
307 IfxAsclin_Tx_Out IfxAsclin8_TX_P34_5_OUT = {&MODULE_ASCLIN8, {&MODULE_P34, 5}, IfxPort_OutputIdx_alt2};
308 IfxAsclin_Tx_Out IfxAsclin9_TX_P01_7_OUT = {&MODULE_ASCLIN9, {&MODULE_P01, 7}, IfxPort_OutputIdx_alt3};
309 IfxAsclin_Tx_Out IfxAsclin9_TX_P14_7_OUT = {&MODULE_ASCLIN9, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt4};
310 IfxAsclin_Tx_Out IfxAsclin9_TX_P20_7_OUT = {&MODULE_ASCLIN9, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt2};
311
312
313 const IfxAsclin_Cts_In *IfxAsclin_Cts_In_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS] = {
314 {
315 &IfxAsclin0_CTSA_P14_9_IN,
316 NULL_PTR
317 },
318 {
319 &IfxAsclin1_CTSA_P20_7_IN,
320 &IfxAsclin1_CTSB_P32_4_IN
321 },
322 {
323 &IfxAsclin2_CTSA_P10_7_IN,
324 &IfxAsclin2_CTSB_P33_5_IN
325 },
326 {
327 &IfxAsclin3_CTSA_P00_12_IN,
328 NULL_PTR
329 },
330 {
331 NULL_PTR,
332 NULL_PTR
333 },
334 {
335 NULL_PTR,
336 NULL_PTR
337 },
338 {
339 NULL_PTR,
340 NULL_PTR
341 },
342 {
343 NULL_PTR,
344 NULL_PTR
345 },
346 {
347 NULL_PTR,
348 NULL_PTR
349 },
350 {
351 NULL_PTR,
352 NULL_PTR
353 },
354 {
355 NULL_PTR,
356 NULL_PTR
357 },
358 {
359 NULL_PTR,
360 NULL_PTR
361 },
362 {
363 NULL_PTR,
364 NULL_PTR
365 },
366 {
367 NULL_PTR,
368 NULL_PTR
369 },
370 {
371 NULL_PTR,
372 NULL_PTR
373 },
374 {
375 NULL_PTR,
376 NULL_PTR
377 },
378 {
379 NULL_PTR,
380 NULL_PTR
381 },
382 {
383 NULL_PTR,
384 NULL_PTR
385 },
386 {
387 NULL_PTR,
388 NULL_PTR
389 },
390 {
391 NULL_PTR,
392 NULL_PTR
393 },
394 {
395 NULL_PTR,
396 NULL_PTR
397 },
398 {
399 NULL_PTR,
400 NULL_PTR
401 },
402 {
403 NULL_PTR,
404 NULL_PTR
405 },
406 {
407 NULL_PTR,
408 NULL_PTR
409 }
410 };
411
412 const IfxAsclin_Rts_Out *IfxAsclin_Rts_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS] = {
413 {
414 &IfxAsclin0_RTS_P14_7_OUT,
415 NULL_PTR
416 },
417 {
418 &IfxAsclin1_RTS_P20_6_OUT,
419 &IfxAsclin1_RTS_P23_1_OUT
420 },
421 {
422 &IfxAsclin2_RTS_P10_8_OUT,
423 &IfxAsclin2_RTS_P33_4_OUT
424 },
425 {
426 &IfxAsclin3_RTS_P00_9_OUT,
427 NULL_PTR
428 },
429 {
430 NULL_PTR,
431 NULL_PTR
432 },
433 {
434 NULL_PTR,
435 NULL_PTR
436 },
437 {
438 NULL_PTR,
439 NULL_PTR
440 },
441 {
442 NULL_PTR,
443 NULL_PTR
444 },
445 {
446 NULL_PTR,
447 NULL_PTR
448 },
449 {
450 NULL_PTR,
451 NULL_PTR
452 },
453 {
454 NULL_PTR,
455 NULL_PTR
456 },
457 {
458 NULL_PTR,
459 NULL_PTR
460 },
461 {
462 NULL_PTR,
463 NULL_PTR
464 },
465 {
466 NULL_PTR,
467 NULL_PTR
468 },
469 {
470 NULL_PTR,
471 NULL_PTR
472 },
473 {
474 NULL_PTR,
475 NULL_PTR
476 },
477 {
478 NULL_PTR,
479 NULL_PTR
480 },
481 {
482 NULL_PTR,
483 NULL_PTR
484 },
485 {
486 NULL_PTR,
487 NULL_PTR
488 },
489 {
490 NULL_PTR,
491 NULL_PTR
492 },
493 {
494 NULL_PTR,
495 NULL_PTR
496 },
497 {
498 NULL_PTR,
499 NULL_PTR
500 },
501 {
502 NULL_PTR,
503 NULL_PTR
504 },
505 {
506 NULL_PTR,
507 NULL_PTR
508 }
509 };
510
511 const IfxAsclin_Rx_In *IfxAsclin_Rx_In_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS] = {
512 {
513 &IfxAsclin0_RXA_P14_1_IN,
514 &IfxAsclin0_RXB_P15_3_IN,
515 &IfxAsclin0_RXC_P01_8_IN,
516 &IfxAsclin0_RXD_P33_10_IN,
517 &IfxAsclin0_RXE_P13_11_IN,
518 NULL_PTR,
519 NULL_PTR,
520 NULL_PTR
521 },
522 {
523 &IfxAsclin1_RXA_P15_1_IN,
524 &IfxAsclin1_RXB_P15_5_IN,
525 &IfxAsclin1_RXC_P20_9_IN,
526 &IfxAsclin1_RXD_P14_8_IN,
527 &IfxAsclin1_RXE_P11_10_IN,
528 &IfxAsclin1_RXF_P33_13_IN,
529 &IfxAsclin1_RXG_P02_3_IN,
530 NULL_PTR
531 },
532 {
533 &IfxAsclin2_RXA_P14_3_IN,
534 &IfxAsclin2_RXB_P02_1_IN,
535 &IfxAsclin2_RXC_P02_10_IN,
536 &IfxAsclin2_RXD_P10_6_IN,
537 &IfxAsclin2_RXE_P33_8_IN,
538 &IfxAsclin2_RXF_P32_6_IN,
539 &IfxAsclin2_RXG_P02_0_IN,
540 NULL_PTR
541 },
542 {
543 &IfxAsclin3_RXA_P15_7_IN,
544 &IfxAsclin3_RXB_P11_0_IN,
545 &IfxAsclin3_RXC_P20_3_IN,
546 &IfxAsclin3_RXD_P32_2_IN,
547 &IfxAsclin3_RXE_P00_1_IN,
548 &IfxAsclin3_RXF_P21_6_IN,
549 &IfxAsclin3_RXG_P21_2_IN,
550 &IfxAsclin3_RXH_P13_12_IN
551 },
552 {
553 &IfxAsclin4_RXA_P00_12_IN,
554 &IfxAsclin4_RXB_P34_2_IN,
555 &IfxAsclin4_RXC_P22_6_IN,
556 &IfxAsclin4_RXD_P22_9_IN,
557 NULL_PTR,
558 NULL_PTR,
559 NULL_PTR,
560 NULL_PTR
561 },
562 {
563 &IfxAsclin5_RXA_P00_6_IN,
564 &IfxAsclin5_RXB_P33_4_IN,
565 &IfxAsclin5_RXC_P22_3_IN,
566 &IfxAsclin5_RXD_P14_15_IN,
567 NULL_PTR,
568 NULL_PTR,
569 NULL_PTR,
570 NULL_PTR
571 },
572 {
573 &IfxAsclin6_RXA_P23_3_IN,
574 &IfxAsclin6_RXB_P01_0_IN,
575 &IfxAsclin6_RXC_P32_6_IN,
576 &IfxAsclin6_RXD_P10_9_IN,
577 &IfxAsclin6_RXE_P22_0_IN,
578 &IfxAsclin6_RXF_P23_1_IN,
579 NULL_PTR,
580 NULL_PTR
581 },
582 {
583 &IfxAsclin7_RXA_P14_15_IN,
584 &IfxAsclin7_RXB_P01_8_IN,
585 &IfxAsclin7_RXC_P23_2_IN,
586 &IfxAsclin7_RXD_P13_11_IN,
587 &IfxAsclin7_RXE_P22_1_IN,
588 &IfxAsclin7_RXF_P22_4_IN,
589 NULL_PTR,
590 NULL_PTR
591 },
592 {
593 &IfxAsclin8_RXA_P02_9_IN,
594 &IfxAsclin8_RXB_P02_10_IN,
595 &IfxAsclin8_RXC_P33_1_IN,
596 &IfxAsclin8_RXD_P33_6_IN,
597 &IfxAsclin8_RXE_P34_5_IN,
598 NULL_PTR,
599 NULL_PTR,
600 NULL_PTR
601 },
602 {
603 &IfxAsclin9_RXA_P01_5_IN,
604 &IfxAsclin9_RXB_P01_7_IN,
605 &IfxAsclin9_RXC_P14_7_IN,
606 &IfxAsclin9_RXD_P14_9_IN,
607 &IfxAsclin9_RXE_P20_6_IN,
608 &IfxAsclin9_RXF_P20_7_IN,
609 NULL_PTR,
610 NULL_PTR
611 },
612 {
613 &IfxAsclin10_RXA_P00_4_IN,
614 &IfxAsclin10_RXB_P00_8_IN,
615 &IfxAsclin10_RXC_P13_0_IN,
616 &IfxAsclin10_RXD_P13_1_IN,
617 NULL_PTR,
618 NULL_PTR,
619 NULL_PTR,
620 NULL_PTR
621 },
622 {
623 &IfxAsclin11_RXA_P10_0_IN,
624 &IfxAsclin11_RXB_P10_4_IN,
625 &IfxAsclin11_RXC_P21_0_IN,
626 &IfxAsclin11_RXD_P21_1_IN,
627 &IfxAsclin11_RXE_P21_2_IN,
628 &IfxAsclin11_RXF_P21_5_IN,
629 NULL_PTR,
630 NULL_PTR
631 },
632 {
633 &IfxAsclin12_RXA_P00_3_IN,
634 &IfxAsclin12_RXB_P00_5_IN,
635 NULL_PTR,
636 NULL_PTR,
637 NULL_PTR,
638 NULL_PTR,
639 NULL_PTR,
640 NULL_PTR
641 },
642 {
643 &IfxAsclin13_RXA_P00_9_IN,
644 &IfxAsclin13_RXB_P00_11_IN,
645 NULL_PTR,
646 NULL_PTR,
647 NULL_PTR,
648 NULL_PTR,
649 NULL_PTR,
650 NULL_PTR
651 },
652 {
653 &IfxAsclin14_RXA_P33_3_IN,
654 &IfxAsclin14_RXB_P33_4_IN,
655 NULL_PTR,
656 NULL_PTR,
657 NULL_PTR,
658 NULL_PTR,
659 NULL_PTR,
660 NULL_PTR
661 },
662 {
663 &IfxAsclin15_RXA_P32_4_IN,
664 &IfxAsclin15_RXB_P32_7_IN,
665 NULL_PTR,
666 NULL_PTR,
667 NULL_PTR,
668 NULL_PTR,
669 NULL_PTR,
670 NULL_PTR
671 },
672 {
673 &IfxAsclin16_RXA_P23_5_IN,
674 &IfxAsclin16_RXB_P23_7_IN,
675 NULL_PTR,
676 NULL_PTR,
677 NULL_PTR,
678 NULL_PTR,
679 NULL_PTR,
680 NULL_PTR
681 },
682 {
683 &IfxAsclin17_RXA_P22_11_IN,
684 &IfxAsclin17_RXB_P21_0_IN,
685 NULL_PTR,
686 NULL_PTR,
687 NULL_PTR,
688 NULL_PTR,
689 NULL_PTR,
690 NULL_PTR
691 },
692 {
693 &IfxAsclin18_RXA_P21_1_IN,
694 &IfxAsclin18_RXB_P21_4_IN,
695 NULL_PTR,
696 NULL_PTR,
697 NULL_PTR,
698 NULL_PTR,
699 NULL_PTR,
700 NULL_PTR
701 },
702 {
703 &IfxAsclin19_RXA_P15_6_IN,
704 &IfxAsclin19_RXB_P15_7_IN,
705 NULL_PTR,
706 NULL_PTR,
707 NULL_PTR,
708 NULL_PTR,
709 NULL_PTR,
710 NULL_PTR
711 },
712 {
713 &IfxAsclin20_RXA_P14_7_IN,
714 &IfxAsclin20_RXB_P14_9_IN,
715 NULL_PTR,
716 NULL_PTR,
717 NULL_PTR,
718 NULL_PTR,
719 NULL_PTR,
720 NULL_PTR
721 },
722 {
723 &IfxAsclin21_RXA_P13_0_IN,
724 &IfxAsclin21_RXB_P13_3_IN,
725 NULL_PTR,
726 NULL_PTR,
727 NULL_PTR,
728 NULL_PTR,
729 NULL_PTR,
730 NULL_PTR
731 },
732 {
733 &IfxAsclin22_RXA_P10_4_IN,
734 &IfxAsclin22_RXB_P10_5_IN,
735 NULL_PTR,
736 NULL_PTR,
737 NULL_PTR,
738 NULL_PTR,
739 NULL_PTR,
740 NULL_PTR
741 },
742 {
743 &IfxAsclin23_RXA_P10_6_IN,
744 &IfxAsclin23_RXB_P10_7_IN,
745 NULL_PTR,
746 NULL_PTR,
747 NULL_PTR,
748 NULL_PTR,
749 NULL_PTR,
750 NULL_PTR
751 }
752 };
753
754 const IfxAsclin_Sclk_Out *IfxAsclin_Sclk_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS] = {
755 {
756 &IfxAsclin0_SCLK_P14_0_OUT,
757 &IfxAsclin0_SCLK_P15_2_OUT,
758 NULL_PTR,
759 NULL_PTR,
760 NULL_PTR,
761 NULL_PTR,
762 NULL_PTR,
763 NULL_PTR,
764 NULL_PTR,
765 NULL_PTR,
766 NULL_PTR
767 },
768 {
769 &IfxAsclin1_SCLK_P15_0_OUT,
770 &IfxAsclin1_SCLK_P20_10_OUT,
771 &IfxAsclin1_SCLK_P33_11_OUT,
772 &IfxAsclin1_SCLK_P33_12_OUT,
773 NULL_PTR,
774 NULL_PTR,
775 NULL_PTR,
776 NULL_PTR,
777 NULL_PTR,
778 NULL_PTR,
779 NULL_PTR
780 },
781 {
782 &IfxAsclin2_SCLK_P02_4_OUT,
783 &IfxAsclin2_SCLK_P10_6_OUT,
784 &IfxAsclin2_SCLK_P14_2_OUT,
785 &IfxAsclin2_SCLK_P33_7_OUT,
786 &IfxAsclin2_SCLK_P33_9_OUT,
787 NULL_PTR,
788 NULL_PTR,
789 NULL_PTR,
790 NULL_PTR,
791 NULL_PTR,
792 NULL_PTR
793 },
794 {
795 &IfxAsclin3_SCLK_P00_0_OUT,
796 &IfxAsclin3_SCLK_P00_2_OUT,
797 &IfxAsclin3_SCLK_P11_1_OUT,
798 &IfxAsclin3_SCLK_P11_4_OUT,
799 &IfxAsclin3_SCLK_P15_6_OUT,
800 &IfxAsclin3_SCLK_P15_8_OUT,
801 &IfxAsclin3_SCLK_P20_0_OUT,
802 &IfxAsclin3_SCLK_P21_5_OUT,
803 &IfxAsclin3_SCLK_P21_7_OUT,
804 &IfxAsclin3_SCLK_P32_3_OUT,
805 &IfxAsclin3_SCLK_P33_2_OUT
806 },
807 {
808 &IfxAsclin4_SCLK_P00_10_OUT,
809 &IfxAsclin4_SCLK_P22_7_OUT,
810 &IfxAsclin4_SCLK_P34_3_OUT,
811 NULL_PTR,
812 NULL_PTR,
813 NULL_PTR,
814 NULL_PTR,
815 NULL_PTR,
816 NULL_PTR,
817 NULL_PTR,
818 NULL_PTR
819 },
820 {
821 &IfxAsclin5_SCLK_P14_12_OUT,
822 &IfxAsclin5_SCLK_P22_8_OUT,
823 &IfxAsclin5_SCLK_P33_3_OUT,
824 NULL_PTR,
825 NULL_PTR,
826 NULL_PTR,
827 NULL_PTR,
828 NULL_PTR,
829 NULL_PTR,
830 NULL_PTR,
831 NULL_PTR
832 },
833 {
834 &IfxAsclin6_SCLK_P02_14_OUT,
835 &IfxAsclin6_SCLK_P10_11_OUT,
836 &IfxAsclin6_SCLK_P23_1_OUT,
837 NULL_PTR,
838 NULL_PTR,
839 NULL_PTR,
840 NULL_PTR,
841 NULL_PTR,
842 NULL_PTR,
843 NULL_PTR,
844 NULL_PTR
845 },
846 {
847 &IfxAsclin7_SCLK_P01_10_OUT,
848 &IfxAsclin7_SCLK_P13_13_OUT,
849 &IfxAsclin7_SCLK_P14_12_OUT,
850 NULL_PTR,
851 NULL_PTR,
852 NULL_PTR,
853 NULL_PTR,
854 NULL_PTR,
855 NULL_PTR,
856 NULL_PTR,
857 NULL_PTR
858 },
859 {
860 &IfxAsclin8_SCLK_P02_8_OUT,
861 NULL_PTR,
862 NULL_PTR,
863 NULL_PTR,
864 NULL_PTR,
865 NULL_PTR,
866 NULL_PTR,
867 NULL_PTR,
868 NULL_PTR,
869 NULL_PTR,
870 NULL_PTR
871 },
872 {
873 &IfxAsclin9_SCLK_P01_6_OUT,
874 NULL_PTR,
875 NULL_PTR,
876 NULL_PTR,
877 NULL_PTR,
878 NULL_PTR,
879 NULL_PTR,
880 NULL_PTR,
881 NULL_PTR,
882 NULL_PTR,
883 NULL_PTR
884 },
885 {
886 &IfxAsclin10_SCLK_P13_2_OUT,
887 NULL_PTR,
888 NULL_PTR,
889 NULL_PTR,
890 NULL_PTR,
891 NULL_PTR,
892 NULL_PTR,
893 NULL_PTR,
894 NULL_PTR,
895 NULL_PTR,
896 NULL_PTR
897 },
898 {
899 &IfxAsclin11_SCLK_P21_3_OUT,
900 NULL_PTR,
901 NULL_PTR,
902 NULL_PTR,
903 NULL_PTR,
904 NULL_PTR,
905 NULL_PTR,
906 NULL_PTR,
907 NULL_PTR,
908 NULL_PTR,
909 NULL_PTR
910 },
911 {
912 NULL_PTR,
913 NULL_PTR,
914 NULL_PTR,
915 NULL_PTR,
916 NULL_PTR,
917 NULL_PTR,
918 NULL_PTR,
919 NULL_PTR,
920 NULL_PTR,
921 NULL_PTR,
922 NULL_PTR
923 },
924 {
925 NULL_PTR,
926 NULL_PTR,
927 NULL_PTR,
928 NULL_PTR,
929 NULL_PTR,
930 NULL_PTR,
931 NULL_PTR,
932 NULL_PTR,
933 NULL_PTR,
934 NULL_PTR,
935 NULL_PTR
936 },
937 {
938 NULL_PTR,
939 NULL_PTR,
940 NULL_PTR,
941 NULL_PTR,
942 NULL_PTR,
943 NULL_PTR,
944 NULL_PTR,
945 NULL_PTR,
946 NULL_PTR,
947 NULL_PTR,
948 NULL_PTR
949 },
950 {
951 NULL_PTR,
952 NULL_PTR,
953 NULL_PTR,
954 NULL_PTR,
955 NULL_PTR,
956 NULL_PTR,
957 NULL_PTR,
958 NULL_PTR,
959 NULL_PTR,
960 NULL_PTR,
961 NULL_PTR
962 },
963 {
964 NULL_PTR,
965 NULL_PTR,
966 NULL_PTR,
967 NULL_PTR,
968 NULL_PTR,
969 NULL_PTR,
970 NULL_PTR,
971 NULL_PTR,
972 NULL_PTR,
973 NULL_PTR,
974 NULL_PTR
975 },
976 {
977 NULL_PTR,
978 NULL_PTR,
979 NULL_PTR,
980 NULL_PTR,
981 NULL_PTR,
982 NULL_PTR,
983 NULL_PTR,
984 NULL_PTR,
985 NULL_PTR,
986 NULL_PTR,
987 NULL_PTR
988 },
989 {
990 NULL_PTR,
991 NULL_PTR,
992 NULL_PTR,
993 NULL_PTR,
994 NULL_PTR,
995 NULL_PTR,
996 NULL_PTR,
997 NULL_PTR,
998 NULL_PTR,
999 NULL_PTR,
1000 NULL_PTR
1001 },
1002 {
1003 NULL_PTR,
1004 NULL_PTR,
1005 NULL_PTR,
1006 NULL_PTR,
1007 NULL_PTR,
1008 NULL_PTR,
1009 NULL_PTR,
1010 NULL_PTR,
1011 NULL_PTR,
1012 NULL_PTR,
1013 NULL_PTR
1014 },
1015 {
1016 NULL_PTR,
1017 NULL_PTR,
1018 NULL_PTR,
1019 NULL_PTR,
1020 NULL_PTR,
1021 NULL_PTR,
1022 NULL_PTR,
1023 NULL_PTR,
1024 NULL_PTR,
1025 NULL_PTR,
1026 NULL_PTR
1027 },
1028 {
1029 NULL_PTR,
1030 NULL_PTR,
1031 NULL_PTR,
1032 NULL_PTR,
1033 NULL_PTR,
1034 NULL_PTR,
1035 NULL_PTR,
1036 NULL_PTR,
1037 NULL_PTR,
1038 NULL_PTR,
1039 NULL_PTR
1040 },
1041 {
1042 NULL_PTR,
1043 NULL_PTR,
1044 NULL_PTR,
1045 NULL_PTR,
1046 NULL_PTR,
1047 NULL_PTR,
1048 NULL_PTR,
1049 NULL_PTR,
1050 NULL_PTR,
1051 NULL_PTR,
1052 NULL_PTR
1053 },
1054 {
1055 NULL_PTR,
1056 NULL_PTR,
1057 NULL_PTR,
1058 NULL_PTR,
1059 NULL_PTR,
1060 NULL_PTR,
1061 NULL_PTR,
1062 NULL_PTR,
1063 NULL_PTR,
1064 NULL_PTR,
1065 NULL_PTR
1066 }
1067 };
1068
1069 const IfxAsclin_Slso_Out *IfxAsclin_Slso_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS] = {
1070 {
1071 NULL_PTR,
1072 NULL_PTR,
1073 NULL_PTR,
1074 NULL_PTR,
1075 NULL_PTR,
1076 NULL_PTR
1077 },
1078 {
1079 &IfxAsclin1_SLSO_P14_3_OUT,
1080 &IfxAsclin1_SLSO_P20_8_OUT,
1081 &IfxAsclin1_SLSO_P33_10_OUT,
1082 NULL_PTR,
1083 NULL_PTR,
1084 NULL_PTR
1085 },
1086 {
1087 &IfxAsclin2_SLSO_P02_3_OUT,
1088 &IfxAsclin2_SLSO_P10_5_OUT,
1089 &IfxAsclin2_SLSO_P33_6_OUT,
1090 NULL_PTR,
1091 NULL_PTR,
1092 NULL_PTR
1093 },
1094 {
1095 &IfxAsclin3_SLSO_P00_3_OUT,
1096 &IfxAsclin3_SLSO_P12_1_OUT,
1097 &IfxAsclin3_SLSO_P14_3_OUT,
1098 &IfxAsclin3_SLSO_P21_2_OUT,
1099 &IfxAsclin3_SLSO_P21_6_OUT,
1100 &IfxAsclin3_SLSO_P33_1_OUT
1101 },
1102 {
1103 &IfxAsclin4_SLSO_P00_11_OUT,
1104 &IfxAsclin4_SLSO_P22_4_OUT,
1105 &IfxAsclin4_SLSO_P22_11_OUT,
1106 &IfxAsclin4_SLSO_P34_4_OUT,
1107 NULL_PTR,
1108 NULL_PTR
1109 },
1110 {
1111 &IfxAsclin5_SLSO_P14_8_OUT,
1112 &IfxAsclin5_SLSO_P33_5_OUT,
1113 NULL_PTR,
1114 NULL_PTR,
1115 NULL_PTR,
1116 NULL_PTR
1117 },
1118 {
1119 &IfxAsclin6_SLSO_P02_12_OUT,
1120 &IfxAsclin6_SLSO_P10_13_OUT,
1121 &IfxAsclin6_SLSO_P23_4_OUT,
1122 NULL_PTR,
1123 NULL_PTR,
1124 NULL_PTR
1125 },
1126 {
1127 &IfxAsclin7_SLSO_P01_11_OUT,
1128 &IfxAsclin7_SLSO_P13_15_OUT,
1129 &IfxAsclin7_SLSO_P14_8_OUT,
1130 NULL_PTR,
1131 NULL_PTR,
1132 NULL_PTR
1133 },
1134 {
1135 &IfxAsclin8_SLSO_P02_11_OUT,
1136 NULL_PTR,
1137 NULL_PTR,
1138 NULL_PTR,
1139 NULL_PTR,
1140 NULL_PTR
1141 },
1142 {
1143 &IfxAsclin9_SLSO_P01_4_OUT,
1144 NULL_PTR,
1145 NULL_PTR,
1146 NULL_PTR,
1147 NULL_PTR,
1148 NULL_PTR
1149 },
1150 {
1151 &IfxAsclin10_SLSO_P13_3_OUT,
1152 NULL_PTR,
1153 NULL_PTR,
1154 NULL_PTR,
1155 NULL_PTR,
1156 NULL_PTR
1157 },
1158 {
1159 &IfxAsclin11_SLSO_P21_4_OUT,
1160 NULL_PTR,
1161 NULL_PTR,
1162 NULL_PTR,
1163 NULL_PTR,
1164 NULL_PTR
1165 },
1166 {
1167 NULL_PTR,
1168 NULL_PTR,
1169 NULL_PTR,
1170 NULL_PTR,
1171 NULL_PTR,
1172 NULL_PTR
1173 },
1174 {
1175 NULL_PTR,
1176 NULL_PTR,
1177 NULL_PTR,
1178 NULL_PTR,
1179 NULL_PTR,
1180 NULL_PTR
1181 },
1182 {
1183 NULL_PTR,
1184 NULL_PTR,
1185 NULL_PTR,
1186 NULL_PTR,
1187 NULL_PTR,
1188 NULL_PTR
1189 },
1190 {
1191 NULL_PTR,
1192 NULL_PTR,
1193 NULL_PTR,
1194 NULL_PTR,
1195 NULL_PTR,
1196 NULL_PTR
1197 },
1198 {
1199 NULL_PTR,
1200 NULL_PTR,
1201 NULL_PTR,
1202 NULL_PTR,
1203 NULL_PTR,
1204 NULL_PTR
1205 },
1206 {
1207 NULL_PTR,
1208 NULL_PTR,
1209 NULL_PTR,
1210 NULL_PTR,
1211 NULL_PTR,
1212 NULL_PTR
1213 },
1214 {
1215 NULL_PTR,
1216 NULL_PTR,
1217 NULL_PTR,
1218 NULL_PTR,
1219 NULL_PTR,
1220 NULL_PTR
1221 },
1222 {
1223 NULL_PTR,
1224 NULL_PTR,
1225 NULL_PTR,
1226 NULL_PTR,
1227 NULL_PTR,
1228 NULL_PTR
1229 },
1230 {
1231 NULL_PTR,
1232 NULL_PTR,
1233 NULL_PTR,
1234 NULL_PTR,
1235 NULL_PTR,
1236 NULL_PTR
1237 },
1238 {
1239 NULL_PTR,
1240 NULL_PTR,
1241 NULL_PTR,
1242 NULL_PTR,
1243 NULL_PTR,
1244 NULL_PTR
1245 },
1246 {
1247 NULL_PTR,
1248 NULL_PTR,
1249 NULL_PTR,
1250 NULL_PTR,
1251 NULL_PTR,
1252 NULL_PTR
1253 },
1254 {
1255 NULL_PTR,
1256 NULL_PTR,
1257 NULL_PTR,
1258 NULL_PTR,
1259 NULL_PTR,
1260 NULL_PTR
1261 }
1262 };
1263
1264 const IfxAsclin_Tx_Out *IfxAsclin_Tx_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS] = {
1265 {
1266 &IfxAsclin0_TX_P01_13_OUT,
1267 &IfxAsclin0_TX_P13_10_OUT,
1268 &IfxAsclin0_TX_P14_0_OUT,
1269 &IfxAsclin0_TX_P14_1_OUT,
1270 &IfxAsclin0_TX_P15_2_OUT,
1271 &IfxAsclin0_TX_P15_3_OUT,
1272 &IfxAsclin0_TX_P33_9_OUT,
1273 NULL_PTR,
1274 NULL_PTR,
1275 NULL_PTR,
1276 NULL_PTR,
1277 NULL_PTR,
1278 NULL_PTR,
1279 NULL_PTR
1280 },
1281 {
1282 &IfxAsclin1_TX_P02_2_OUT,
1283 &IfxAsclin1_TX_P11_12_OUT,
1284 &IfxAsclin1_TX_P14_10_OUT,
1285 &IfxAsclin1_TX_P14_15_OUT,
1286 &IfxAsclin1_TX_P15_0_OUT,
1287 &IfxAsclin1_TX_P15_1_OUT,
1288 &IfxAsclin1_TX_P15_4_OUT,
1289 &IfxAsclin1_TX_P15_5_OUT,
1290 &IfxAsclin1_TX_P20_10_OUT,
1291 &IfxAsclin1_TX_P33_12_OUT,
1292 &IfxAsclin1_TX_P33_13_OUT,
1293 NULL_PTR,
1294 NULL_PTR,
1295 NULL_PTR
1296 },
1297 {
1298 &IfxAsclin2_TX_P02_0_OUT,
1299 &IfxAsclin2_TX_P02_9_OUT,
1300 &IfxAsclin2_TX_P10_5_OUT,
1301 &IfxAsclin2_TX_P14_2_OUT,
1302 &IfxAsclin2_TX_P14_3_OUT,
1303 &IfxAsclin2_TX_P32_5_OUT,
1304 &IfxAsclin2_TX_P33_8_OUT,
1305 &IfxAsclin2_TX_P33_9_OUT,
1306 NULL_PTR,
1307 NULL_PTR,
1308 NULL_PTR,
1309 NULL_PTR,
1310 NULL_PTR,
1311 NULL_PTR
1312 },
1313 {
1314 &IfxAsclin3_TX_P00_0_OUT,
1315 &IfxAsclin3_TX_P00_1_OUT,
1316 &IfxAsclin3_TX_P11_0_OUT,
1317 &IfxAsclin3_TX_P11_1_OUT,
1318 &IfxAsclin3_TX_P13_9_OUT,
1319 &IfxAsclin3_TX_P15_6_OUT,
1320 &IfxAsclin3_TX_P15_7_OUT,
1321 &IfxAsclin3_TX_P20_0_OUT,
1322 &IfxAsclin3_TX_P20_3_OUT,
1323 &IfxAsclin3_TX_P21_7_OUT,
1324 &IfxAsclin3_TX_P22_0_OUT,
1325 &IfxAsclin3_TX_P22_1_OUT,
1326 &IfxAsclin3_TX_P32_2_OUT,
1327 &IfxAsclin3_TX_P32_3_OUT
1328 },
1329 {
1330 &IfxAsclin4_TX_P00_9_OUT,
1331 &IfxAsclin4_TX_P22_5_OUT,
1332 &IfxAsclin4_TX_P22_10_OUT,
1333 &IfxAsclin4_TX_P34_1_OUT,
1334 NULL_PTR,
1335 NULL_PTR,
1336 NULL_PTR,
1337 NULL_PTR,
1338 NULL_PTR,
1339 NULL_PTR,
1340 NULL_PTR,
1341 NULL_PTR,
1342 NULL_PTR,
1343 NULL_PTR
1344 },
1345 {
1346 &IfxAsclin5_TX_P00_7_OUT,
1347 &IfxAsclin5_TX_P14_14_OUT,
1348 &IfxAsclin5_TX_P22_2_OUT,
1349 &IfxAsclin5_TX_P33_0_OUT,
1350 NULL_PTR,
1351 NULL_PTR,
1352 NULL_PTR,
1353 NULL_PTR,
1354 NULL_PTR,
1355 NULL_PTR,
1356 NULL_PTR,
1357 NULL_PTR,
1358 NULL_PTR,
1359 NULL_PTR
1360 },
1361 {
1362 &IfxAsclin6_TX_P01_1_OUT,
1363 &IfxAsclin6_TX_P02_15_OUT,
1364 &IfxAsclin6_TX_P10_10_OUT,
1365 &IfxAsclin6_TX_P22_0_OUT,
1366 &IfxAsclin6_TX_P23_5_OUT,
1367 &IfxAsclin6_TX_P32_7_OUT,
1368 NULL_PTR,
1369 NULL_PTR,
1370 NULL_PTR,
1371 NULL_PTR,
1372 NULL_PTR,
1373 NULL_PTR,
1374 NULL_PTR,
1375 NULL_PTR
1376 },
1377 {
1378 &IfxAsclin7_TX_P01_9_OUT,
1379 &IfxAsclin7_TX_P01_12_OUT,
1380 &IfxAsclin7_TX_P13_12_OUT,
1381 &IfxAsclin7_TX_P14_14_OUT,
1382 &IfxAsclin7_TX_P22_1_OUT,
1383 &IfxAsclin7_TX_P23_3_OUT,
1384 NULL_PTR,
1385 NULL_PTR,
1386 NULL_PTR,
1387 NULL_PTR,
1388 NULL_PTR,
1389 NULL_PTR,
1390 NULL_PTR,
1391 NULL_PTR
1392 },
1393 {
1394 &IfxAsclin8_TX_P02_9_OUT,
1395 &IfxAsclin8_TX_P33_7_OUT,
1396 &IfxAsclin8_TX_P34_5_OUT,
1397 NULL_PTR,
1398 NULL_PTR,
1399 NULL_PTR,
1400 NULL_PTR,
1401 NULL_PTR,
1402 NULL_PTR,
1403 NULL_PTR,
1404 NULL_PTR,
1405 NULL_PTR,
1406 NULL_PTR,
1407 NULL_PTR
1408 },
1409 {
1410 &IfxAsclin9_TX_P01_7_OUT,
1411 &IfxAsclin9_TX_P14_7_OUT,
1412 &IfxAsclin9_TX_P20_7_OUT,
1413 NULL_PTR,
1414 NULL_PTR,
1415 NULL_PTR,
1416 NULL_PTR,
1417 NULL_PTR,
1418 NULL_PTR,
1419 NULL_PTR,
1420 NULL_PTR,
1421 NULL_PTR,
1422 NULL_PTR,
1423 NULL_PTR
1424 },
1425 {
1426 &IfxAsclin10_TX_P00_8_OUT,
1427 &IfxAsclin10_TX_P13_0_OUT,
1428 NULL_PTR,
1429 NULL_PTR,
1430 NULL_PTR,
1431 NULL_PTR,
1432 NULL_PTR,
1433 NULL_PTR,
1434 NULL_PTR,
1435 NULL_PTR,
1436 NULL_PTR,
1437 NULL_PTR,
1438 NULL_PTR,
1439 NULL_PTR
1440 },
1441 {
1442 &IfxAsclin11_TX_P10_0_OUT,
1443 &IfxAsclin11_TX_P21_0_OUT,
1444 &IfxAsclin11_TX_P21_5_OUT,
1445 NULL_PTR,
1446 NULL_PTR,
1447 NULL_PTR,
1448 NULL_PTR,
1449 NULL_PTR,
1450 NULL_PTR,
1451 NULL_PTR,
1452 NULL_PTR,
1453 NULL_PTR,
1454 NULL_PTR,
1455 NULL_PTR
1456 },
1457 {
1458 &IfxAsclin12_TX_P00_3_OUT,
1459 &IfxAsclin12_TX_P01_6_OUT,
1460 NULL_PTR,
1461 NULL_PTR,
1462 NULL_PTR,
1463 NULL_PTR,
1464 NULL_PTR,
1465 NULL_PTR,
1466 NULL_PTR,
1467 NULL_PTR,
1468 NULL_PTR,
1469 NULL_PTR,
1470 NULL_PTR,
1471 NULL_PTR
1472 },
1473 {
1474 &IfxAsclin13_TX_P00_10_OUT,
1475 &IfxAsclin13_TX_P00_11_OUT,
1476 NULL_PTR,
1477 NULL_PTR,
1478 NULL_PTR,
1479 NULL_PTR,
1480 NULL_PTR,
1481 NULL_PTR,
1482 NULL_PTR,
1483 NULL_PTR,
1484 NULL_PTR,
1485 NULL_PTR,
1486 NULL_PTR,
1487 NULL_PTR
1488 },
1489 {
1490 &IfxAsclin14_TX_P33_2_OUT,
1491 &IfxAsclin14_TX_P33_3_OUT,
1492 NULL_PTR,
1493 NULL_PTR,
1494 NULL_PTR,
1495 NULL_PTR,
1496 NULL_PTR,
1497 NULL_PTR,
1498 NULL_PTR,
1499 NULL_PTR,
1500 NULL_PTR,
1501 NULL_PTR,
1502 NULL_PTR,
1503 NULL_PTR
1504 },
1505 {
1506 &IfxAsclin15_TX_P32_7_OUT,
1507 &IfxAsclin15_TX_P33_0_OUT,
1508 NULL_PTR,
1509 NULL_PTR,
1510 NULL_PTR,
1511 NULL_PTR,
1512 NULL_PTR,
1513 NULL_PTR,
1514 NULL_PTR,
1515 NULL_PTR,
1516 NULL_PTR,
1517 NULL_PTR,
1518 NULL_PTR,
1519 NULL_PTR
1520 },
1521 {
1522 &IfxAsclin16_TX_P23_6_OUT,
1523 &IfxAsclin16_TX_P23_7_OUT,
1524 NULL_PTR,
1525 NULL_PTR,
1526 NULL_PTR,
1527 NULL_PTR,
1528 NULL_PTR,
1529 NULL_PTR,
1530 NULL_PTR,
1531 NULL_PTR,
1532 NULL_PTR,
1533 NULL_PTR,
1534 NULL_PTR,
1535 NULL_PTR
1536 },
1537 {
1538 &IfxAsclin17_TX_P22_7_OUT,
1539 &IfxAsclin17_TX_P22_11_OUT,
1540 NULL_PTR,
1541 NULL_PTR,
1542 NULL_PTR,
1543 NULL_PTR,
1544 NULL_PTR,
1545 NULL_PTR,
1546 NULL_PTR,
1547 NULL_PTR,
1548 NULL_PTR,
1549 NULL_PTR,
1550 NULL_PTR,
1551 NULL_PTR
1552 },
1553 {
1554 &IfxAsclin18_TX_P21_3_OUT,
1555 &IfxAsclin18_TX_P21_4_OUT,
1556 NULL_PTR,
1557 NULL_PTR,
1558 NULL_PTR,
1559 NULL_PTR,
1560 NULL_PTR,
1561 NULL_PTR,
1562 NULL_PTR,
1563 NULL_PTR,
1564 NULL_PTR,
1565 NULL_PTR,
1566 NULL_PTR,
1567 NULL_PTR
1568 },
1569 {
1570 &IfxAsclin19_TX_P15_4_OUT,
1571 &IfxAsclin19_TX_P15_7_OUT,
1572 NULL_PTR,
1573 NULL_PTR,
1574 NULL_PTR,
1575 NULL_PTR,
1576 NULL_PTR,
1577 NULL_PTR,
1578 NULL_PTR,
1579 NULL_PTR,
1580 NULL_PTR,
1581 NULL_PTR,
1582 NULL_PTR,
1583 NULL_PTR
1584 },
1585 {
1586 &IfxAsclin20_TX_P14_7_OUT,
1587 &IfxAsclin20_TX_P14_8_OUT,
1588 NULL_PTR,
1589 NULL_PTR,
1590 NULL_PTR,
1591 NULL_PTR,
1592 NULL_PTR,
1593 NULL_PTR,
1594 NULL_PTR,
1595 NULL_PTR,
1596 NULL_PTR,
1597 NULL_PTR,
1598 NULL_PTR,
1599 NULL_PTR
1600 },
1601 {
1602 &IfxAsclin21_TX_P13_2_OUT,
1603 &IfxAsclin21_TX_P13_3_OUT,
1604 NULL_PTR,
1605 NULL_PTR,
1606 NULL_PTR,
1607 NULL_PTR,
1608 NULL_PTR,
1609 NULL_PTR,
1610 NULL_PTR,
1611 NULL_PTR,
1612 NULL_PTR,
1613 NULL_PTR,
1614 NULL_PTR,
1615 NULL_PTR
1616 },
1617 {
1618 &IfxAsclin22_TX_P10_0_OUT,
1619 &IfxAsclin22_TX_P10_4_OUT,
1620 NULL_PTR,
1621 NULL_PTR,
1622 NULL_PTR,
1623 NULL_PTR,
1624 NULL_PTR,
1625 NULL_PTR,
1626 NULL_PTR,
1627 NULL_PTR,
1628 NULL_PTR,
1629 NULL_PTR,
1630 NULL_PTR,
1631 NULL_PTR
1632 },
1633 {
1634 &IfxAsclin23_TX_P10_7_OUT,
1635 &IfxAsclin23_TX_P10_8_OUT,
1636 NULL_PTR,
1637 NULL_PTR,
1638 NULL_PTR,
1639 NULL_PTR,
1640 NULL_PTR,
1641 NULL_PTR,
1642 NULL_PTR,
1643 NULL_PTR,
1644 NULL_PTR,
1645 NULL_PTR,
1646 NULL_PTR,
1647 NULL_PTR
1648 }
1649 };
IfxAsclin7_SLSO_P14_8_OUT
IfxAsclin_Slso_Out IfxAsclin7_SLSO_P14_8_OUT
Definition: IfxAsclin_PinMap.c:213
IfxAsclin4_SCLK_P22_7_OUT
IfxAsclin_Sclk_Out IfxAsclin4_SCLK_P22_7_OUT
Definition: IfxAsclin_PinMap.c:175
IfxAsclin1_TX_P33_13_OUT
IfxAsclin_Tx_Out IfxAsclin1_TX_P33_13_OUT
Definition: IfxAsclin_PinMap.c:254
IfxAsclin8_TX_P02_9_OUT
IfxAsclin_Tx_Out IfxAsclin8_TX_P02_9_OUT
Definition: IfxAsclin_PinMap.c:305
IfxAsclin_Cts_In
CTS pin mapping structure.
Definition: IfxAsclin_PinMap.h:56
IfxAsclin6_RXA_P23_3_IN
IfxAsclin_Rx_In IfxAsclin6_RXA_P23_3_IN
Definition: IfxAsclin_PinMap.c:127
IfxAsclin14_RXA_P33_3_IN
IfxAsclin_Rx_In IfxAsclin14_RXA_P33_3_IN
Definition: IfxAsclin_PinMap.c:76
IfxAsclin6_TX_P23_5_OUT
IfxAsclin_Tx_Out IfxAsclin6_TX_P23_5_OUT
Definition: IfxAsclin_PinMap.c:297
IfxAsclin_Slso_Out_pinTable
const IfxAsclin_Slso_Out * IfxAsclin_Slso_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS]
Definition: IfxAsclin_PinMap.c:1069
IfxAsclin16_RXB_P23_7_IN
IfxAsclin_Rx_In IfxAsclin16_RXB_P23_7_IN
Definition: IfxAsclin_PinMap.c:81
IfxAsclin7_RXF_P22_4_IN
IfxAsclin_Rx_In IfxAsclin7_RXF_P22_4_IN
Definition: IfxAsclin_PinMap.c:138
IfxAsclin_Tx_Out
TX pin mapping structure.
Definition: IfxAsclin_PinMap.h:96
IfxAsclin1_SCLK_P20_10_OUT
IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P20_10_OUT
Definition: IfxAsclin_PinMap.c:155
IfxAsclin3_SLSO_P21_2_OUT
IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_2_OUT
Definition: IfxAsclin_PinMap.c:199
IfxAsclin23_RXB_P10_7_IN
IfxAsclin_Rx_In IfxAsclin23_RXB_P10_7_IN
Definition: IfxAsclin_PinMap.c:102
IfxAsclin5_TX_P33_0_OUT
IfxAsclin_Tx_Out IfxAsclin5_TX_P33_0_OUT
Definition: IfxAsclin_PinMap.c:292
IfxAsclin3_TX_P20_3_OUT
IfxAsclin_Tx_Out IfxAsclin3_TX_P20_3_OUT
Definition: IfxAsclin_PinMap.c:279
Ifx_RxSel_e
Definition: Ifx_Types.h:133
IfxAsclin4_SCLK_P00_10_OUT
IfxAsclin_Sclk_Out IfxAsclin4_SCLK_P00_10_OUT
Definition: IfxAsclin_PinMap.c:174
IfxAsclin11_SCLK_P21_3_OUT
IfxAsclin_Sclk_Out IfxAsclin11_SCLK_P21_3_OUT
Definition: IfxAsclin_PinMap.c:153
IfxAsclin3_TX_P21_7_OUT
IfxAsclin_Tx_Out IfxAsclin3_TX_P21_7_OUT
Definition: IfxAsclin_PinMap.c:280
IfxAsclin7_TX_P14_14_OUT
IfxAsclin_Tx_Out IfxAsclin7_TX_P14_14_OUT
Definition: IfxAsclin_PinMap.c:302
IfxAsclin4_SCLK_P34_3_OUT
IfxAsclin_Sclk_Out IfxAsclin4_SCLK_P34_3_OUT
Definition: IfxAsclin_PinMap.c:176
Ifx_RxSel_d
Definition: Ifx_Types.h:132
IfxAsclin8_RXC_P33_1_IN
IfxAsclin_Rx_In IfxAsclin8_RXC_P33_1_IN
Definition: IfxAsclin_PinMap.c:141
IfxAsclin18_RXA_P21_1_IN
IfxAsclin_Rx_In IfxAsclin18_RXA_P21_1_IN
Definition: IfxAsclin_PinMap.c:84
IfxAsclin2_SLSO_P33_6_OUT
IfxAsclin_Slso_Out IfxAsclin2_SLSO_P33_6_OUT
Definition: IfxAsclin_PinMap.c:195
IfxAsclin1_TX_P20_10_OUT
IfxAsclin_Tx_Out IfxAsclin1_TX_P20_10_OUT
Definition: IfxAsclin_PinMap.c:252
IfxAsclin8_SLSO_P02_11_OUT
IfxAsclin_Slso_Out IfxAsclin8_SLSO_P02_11_OUT
Definition: IfxAsclin_PinMap.c:214
IfxAsclin2_TX_P14_3_OUT
IfxAsclin_Tx_Out IfxAsclin2_TX_P14_3_OUT
Definition: IfxAsclin_PinMap.c:267
IfxAsclin7_SLSO_P13_15_OUT
IfxAsclin_Slso_Out IfxAsclin7_SLSO_P13_15_OUT
Definition: IfxAsclin_PinMap.c:212
IfxAsclin3_RXG_P21_3_IN
IfxAsclin_Rx_In IfxAsclin3_RXG_P21_3_IN
Definition: IfxAsclin_PinMap.c:117
IfxAsclin6_SLSO_P02_12_OUT
IfxAsclin_Slso_Out IfxAsclin6_SLSO_P02_12_OUT
Definition: IfxAsclin_PinMap.c:208
IfxAsclin19_TX_P15_4_OUT
IfxAsclin_Tx_Out IfxAsclin19_TX_P15_4_OUT
Definition: IfxAsclin_PinMap.c:242
IfxAsclin0_TX_P13_10_OUT
IfxAsclin_Tx_Out IfxAsclin0_TX_P13_10_OUT
Definition: IfxAsclin_PinMap.c:217
IfxAsclin_Rx_In_pinTable
const IfxAsclin_Rx_In * IfxAsclin_Rx_In_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS]
Definition: IfxAsclin_PinMap.c:511
IfxAsclin0_RXA_P14_1_IN
IfxAsclin_Rx_In IfxAsclin0_RXA_P14_1_IN
Definition: IfxAsclin_PinMap.c:57
IfxAsclin6_TX_P01_1_OUT
IfxAsclin_Tx_Out IfxAsclin6_TX_P01_1_OUT
Definition: IfxAsclin_PinMap.c:293
IfxAsclin23_TX_P10_7_OUT
IfxAsclin_Tx_Out IfxAsclin23_TX_P10_7_OUT
Definition: IfxAsclin_PinMap.c:261
IfxAsclin0_TX_P01_13_OUT
IfxAsclin_Tx_Out IfxAsclin0_TX_P01_13_OUT
Definition: IfxAsclin_PinMap.c:216
IfxAsclin4_SLSO_P00_11_OUT
IfxAsclin_Slso_Out IfxAsclin4_SLSO_P00_11_OUT
Definition: IfxAsclin_PinMap.c:202
IfxAsclin1_RXB_P15_5_IN
IfxAsclin_Rx_In IfxAsclin1_RXB_P15_5_IN
Definition: IfxAsclin_PinMap.c:89
IfxAsclin1_SCLK_P33_11_OUT
IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_11_OUT
Definition: IfxAsclin_PinMap.c:156
IfxAsclin11_RXE_P21_2_IN
IfxAsclin_Rx_In IfxAsclin11_RXE_P21_2_IN
Definition: IfxAsclin_PinMap.c:70
IfxAsclin17_RXB_P21_0_IN
IfxAsclin_Rx_In IfxAsclin17_RXB_P21_0_IN
Definition: IfxAsclin_PinMap.c:83
IfxAsclin2_RXB_P02_1_IN
IfxAsclin_Rx_In IfxAsclin2_RXB_P02_1_IN
Definition: IfxAsclin_PinMap.c:104
IfxAsclin1_TX_P15_4_OUT
IfxAsclin_Tx_Out IfxAsclin1_TX_P15_4_OUT
Definition: IfxAsclin_PinMap.c:250
Ifx_RxSel_g
Definition: Ifx_Types.h:135
IfxAsclin_Sclk_Out
SCLK pin mapping structure.
Definition: IfxAsclin_PinMap.h:80
IfxAsclin1_CTSB_P32_4_IN
IfxAsclin_Cts_In IfxAsclin1_CTSB_P32_4_IN
Definition: IfxAsclin_PinMap.c:47
IfxAsclin1_TX_P02_2_OUT
IfxAsclin_Tx_Out IfxAsclin1_TX_P02_2_OUT
Definition: IfxAsclin_PinMap.c:244
IfxAsclin14_TX_P33_3_OUT
IfxAsclin_Tx_Out IfxAsclin14_TX_P33_3_OUT
Definition: IfxAsclin_PinMap.c:233
IfxAsclin1_TX_P14_15_OUT
IfxAsclin_Tx_Out IfxAsclin1_TX_P14_15_OUT
Definition: IfxAsclin_PinMap.c:247
IfxAsclin3_TX_P00_0_OUT
IfxAsclin_Tx_Out IfxAsclin3_TX_P00_0_OUT
Definition: IfxAsclin_PinMap.c:271
IfxAsclin9_RXF_P20_7_IN
IfxAsclin_Rx_In IfxAsclin9_RXF_P20_7_IN
Definition: IfxAsclin_PinMap.c:149
IfxAsclin1_SCLK_P15_0_OUT
IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P15_0_OUT
Definition: IfxAsclin_PinMap.c:154
IfxAsclin2_RXG_P02_0_IN
IfxAsclin_Rx_In IfxAsclin2_RXG_P02_0_IN
Definition: IfxAsclin_PinMap.c:109
IfxAsclin15_RXA_P32_4_IN
IfxAsclin_Rx_In IfxAsclin15_RXA_P32_4_IN
Definition: IfxAsclin_PinMap.c:78
IfxAsclin4_SLSO_P22_4_OUT
IfxAsclin_Slso_Out IfxAsclin4_SLSO_P22_4_OUT
Definition: IfxAsclin_PinMap.c:204
IfxAsclin3_SLSO_P12_1_OUT
IfxAsclin_Slso_Out IfxAsclin3_SLSO_P12_1_OUT
Definition: IfxAsclin_PinMap.c:197
IfxAsclin1_TX_P33_12_OUT
IfxAsclin_Tx_Out IfxAsclin1_TX_P33_12_OUT
Definition: IfxAsclin_PinMap.c:253
IfxAsclin6_TX_P10_10_OUT
IfxAsclin_Tx_Out IfxAsclin6_TX_P10_10_OUT
Definition: IfxAsclin_PinMap.c:295
IfxAsclin2_RXA_P14_3_IN
IfxAsclin_Rx_In IfxAsclin2_RXA_P14_3_IN
Definition: IfxAsclin_PinMap.c:103
IfxAsclin3_SCLK_P11_4_OUT
IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P11_4_OUT
Definition: IfxAsclin_PinMap.c:166
IfxAsclin2_CTSA_P10_7_IN
IfxAsclin_Cts_In IfxAsclin2_CTSA_P10_7_IN
Definition: IfxAsclin_PinMap.c:48
IfxAsclin15_TX_P33_0_OUT
IfxAsclin_Tx_Out IfxAsclin15_TX_P33_0_OUT
Definition: IfxAsclin_PinMap.c:235
IfxAsclin21_TX_P13_3_OUT
IfxAsclin_Tx_Out IfxAsclin21_TX_P13_3_OUT
Definition: IfxAsclin_PinMap.c:258
IfxAsclin7_SCLK_P13_13_OUT
IfxAsclin_Sclk_Out IfxAsclin7_SCLK_P13_13_OUT
Definition: IfxAsclin_PinMap.c:184
IfxAsclin1_TX_P15_1_OUT
IfxAsclin_Tx_Out IfxAsclin1_TX_P15_1_OUT
Definition: IfxAsclin_PinMap.c:249
IfxAsclin1_RXG_P02_3_IN
IfxAsclin_Rx_In IfxAsclin1_RXG_P02_3_IN
Definition: IfxAsclin_PinMap.c:94
IfxAsclin2_TX_P32_5_OUT
IfxAsclin_Tx_Out IfxAsclin2_TX_P32_5_OUT
Definition: IfxAsclin_PinMap.c:268
IfxAsclin7_SCLK_P01_10_OUT
IfxAsclin_Sclk_Out IfxAsclin7_SCLK_P01_10_OUT
Definition: IfxAsclin_PinMap.c:183
IfxPort_OutputIdx_alt2
Definition: IfxPort.h:130
IfxAsclin7_SCLK_P14_12_OUT
IfxAsclin_Sclk_Out IfxAsclin7_SCLK_P14_12_OUT
Definition: IfxAsclin_PinMap.c:185
IfxAsclin10_TX_P00_8_OUT
IfxAsclin_Tx_Out IfxAsclin10_TX_P00_8_OUT
Definition: IfxAsclin_PinMap.c:223
IfxAsclin_Slso_Out
SLSO pin mapping structure.
Definition: IfxAsclin_PinMap.h:88
Ifx_RxSel_a
Definition: Ifx_Types.h:129
IfxAsclin10_SCLK_P13_2_OUT
IfxAsclin_Sclk_Out IfxAsclin10_SCLK_P13_2_OUT
Definition: IfxAsclin_PinMap.c:152
IfxAsclin1_RXE_P11_10_IN
IfxAsclin_Rx_In IfxAsclin1_RXE_P11_10_IN
Definition: IfxAsclin_PinMap.c:92
IfxAsclin1_TX_P11_12_OUT
IfxAsclin_Tx_Out IfxAsclin1_TX_P11_12_OUT
Definition: IfxAsclin_PinMap.c:245
IfxAsclin_Sclk_Out_pinTable
const IfxAsclin_Sclk_Out * IfxAsclin_Sclk_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS]
Definition: IfxAsclin_PinMap.c:754
IfxAsclin4_TX_P22_10_OUT
IfxAsclin_Tx_Out IfxAsclin4_TX_P22_10_OUT
Definition: IfxAsclin_PinMap.c:286
IfxAsclin6_SCLK_P02_14_OUT
IfxAsclin_Sclk_Out IfxAsclin6_SCLK_P02_14_OUT
Definition: IfxAsclin_PinMap.c:180
IfxAsclin3_SCLK_P11_1_OUT
IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P11_1_OUT
Definition: IfxAsclin_PinMap.c:165
IfxAsclin1_RTS_P23_1_OUT
IfxAsclin_Rts_Out IfxAsclin1_RTS_P23_1_OUT
Definition: IfxAsclin_PinMap.c:53
IfxAsclin9_SLSO_P01_4_OUT
IfxAsclin_Slso_Out IfxAsclin9_SLSO_P01_4_OUT
Definition: IfxAsclin_PinMap.c:215
IfxAsclin2_SCLK_P02_4_OUT
IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P02_4_OUT
Definition: IfxAsclin_PinMap.c:158
IfxAsclin17_TX_P22_11_OUT
IfxAsclin_Tx_Out IfxAsclin17_TX_P22_11_OUT
Definition: IfxAsclin_PinMap.c:238
IfxAsclin23_RXA_P10_6_IN
IfxAsclin_Rx_In IfxAsclin23_RXA_P10_6_IN
Definition: IfxAsclin_PinMap.c:101
IfxAsclin4_SLSO_P22_11_OUT
IfxAsclin_Slso_Out IfxAsclin4_SLSO_P22_11_OUT
Definition: IfxAsclin_PinMap.c:203
IfxAsclin3_SCLK_P21_5_OUT
IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_5_OUT
Definition: IfxAsclin_PinMap.c:170
IfxAsclin3_TX_P20_0_OUT
IfxAsclin_Tx_Out IfxAsclin3_TX_P20_0_OUT
Definition: IfxAsclin_PinMap.c:278
IfxAsclin1_SLSO_P14_3_OUT
IfxAsclin_Slso_Out IfxAsclin1_SLSO_P14_3_OUT
Definition: IfxAsclin_PinMap.c:190
IfxAsclin7_TX_P01_12_OUT
IfxAsclin_Tx_Out IfxAsclin7_TX_P01_12_OUT
Definition: IfxAsclin_PinMap.c:299
IfxAsclin5_SCLK_P14_12_OUT
IfxAsclin_Sclk_Out IfxAsclin5_SCLK_P14_12_OUT
Definition: IfxAsclin_PinMap.c:177
IfxAsclin5_TX_P22_2_OUT
IfxAsclin_Tx_Out IfxAsclin5_TX_P22_2_OUT
Definition: IfxAsclin_PinMap.c:291
IfxAsclin9_RXD_P14_9_IN
IfxAsclin_Rx_In IfxAsclin9_RXD_P14_9_IN
Definition: IfxAsclin_PinMap.c:147
IfxAsclin0_TX_P14_0_OUT
IfxAsclin_Tx_Out IfxAsclin0_TX_P14_0_OUT
Definition: IfxAsclin_PinMap.c:218
IfxAsclin21_RXA_P13_0_IN
IfxAsclin_Rx_In IfxAsclin21_RXA_P13_0_IN
Definition: IfxAsclin_PinMap.c:97
IfxAsclin0_CTSA_P14_9_IN
IfxAsclin_Cts_In IfxAsclin0_CTSA_P14_9_IN
Definition: IfxAsclin_PinMap.c:45
IfxAsclin1_SCLK_P33_12_OUT
IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_12_OUT
Definition: IfxAsclin_PinMap.c:157
IfxAsclin0_RXC_P01_8_IN
IfxAsclin_Rx_In IfxAsclin0_RXC_P01_8_IN
Definition: IfxAsclin_PinMap.c:59
IfxAsclin3_SCLK_P00_2_OUT
IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_2_OUT
Definition: IfxAsclin_PinMap.c:164
IfxAsclin10_TX_P13_0_OUT
IfxAsclin_Tx_Out IfxAsclin10_TX_P13_0_OUT
Definition: IfxAsclin_PinMap.c:224
IfxAsclin2_RTS_P10_8_OUT
IfxAsclin_Rts_Out IfxAsclin2_RTS_P10_8_OUT
Definition: IfxAsclin_PinMap.c:54
IfxAsclin22_TX_P10_4_OUT
IfxAsclin_Tx_Out IfxAsclin22_TX_P10_4_OUT
Definition: IfxAsclin_PinMap.c:260
IfxAsclin_PinMap.h
ASCLIN I/O map.
Ifx_RxSel_h
Definition: Ifx_Types.h:136
IfxAsclin2_SLSO_P02_3_OUT
IfxAsclin_Slso_Out IfxAsclin2_SLSO_P02_3_OUT
Definition: IfxAsclin_PinMap.c:193
IfxAsclin_Rts_Out_pinTable
const IfxAsclin_Rts_Out * IfxAsclin_Rts_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS]
Definition: IfxAsclin_PinMap.c:412
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS
#define IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS
Definition: IfxAsclin_PinMap.h:376
Ifx_RxSel_b
Definition: Ifx_Types.h:130
IfxAsclin11_RXC_P21_0_IN
IfxAsclin_Rx_In IfxAsclin11_RXC_P21_0_IN
Definition: IfxAsclin_PinMap.c:68
IfxAsclin3_SCLK_P20_0_OUT
IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P20_0_OUT
Definition: IfxAsclin_PinMap.c:169
IfxAsclin2_RXD_P10_6_IN
IfxAsclin_Rx_In IfxAsclin2_RXD_P10_6_IN
Definition: IfxAsclin_PinMap.c:106
IfxAsclin8_TX_P34_5_OUT
IfxAsclin_Tx_Out IfxAsclin8_TX_P34_5_OUT
Definition: IfxAsclin_PinMap.c:307
IfxAsclin2_TX_P33_8_OUT
IfxAsclin_Tx_Out IfxAsclin2_TX_P33_8_OUT
Definition: IfxAsclin_PinMap.c:269
IfxAsclin11_SLSO_P21_4_OUT
IfxAsclin_Slso_Out IfxAsclin11_SLSO_P21_4_OUT
Definition: IfxAsclin_PinMap.c:189
IfxAsclin18_TX_P21_3_OUT
IfxAsclin_Tx_Out IfxAsclin18_TX_P21_3_OUT
Definition: IfxAsclin_PinMap.c:240
IfxAsclin9_RXA_P01_5_IN
IfxAsclin_Rx_In IfxAsclin9_RXA_P01_5_IN
Definition: IfxAsclin_PinMap.c:144
IfxAsclin3_SLSO_P21_6_OUT
IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_6_OUT
Definition: IfxAsclin_PinMap.c:200
IfxAsclin4_RXC_P22_6_IN
IfxAsclin_Rx_In IfxAsclin4_RXC_P22_6_IN
Definition: IfxAsclin_PinMap.c:121
IfxAsclin20_TX_P14_7_OUT
IfxAsclin_Tx_Out IfxAsclin20_TX_P14_7_OUT
Definition: IfxAsclin_PinMap.c:255
IfxAsclin2_RTS_P33_4_OUT
IfxAsclin_Rts_Out IfxAsclin2_RTS_P33_4_OUT
Definition: IfxAsclin_PinMap.c:55
IfxAsclin9_TX_P14_7_OUT
IfxAsclin_Tx_Out IfxAsclin9_TX_P14_7_OUT
Definition: IfxAsclin_PinMap.c:309
IfxAsclin3_RTS_P00_9_OUT
IfxAsclin_Rts_Out IfxAsclin3_RTS_P00_9_OUT
Definition: IfxAsclin_PinMap.c:56
IfxAsclin5_RXB_P33_4_IN
IfxAsclin_Rx_In IfxAsclin5_RXB_P33_4_IN
Definition: IfxAsclin_PinMap.c:124
IfxAsclin1_TX_P15_0_OUT
IfxAsclin_Tx_Out IfxAsclin1_TX_P15_0_OUT
Definition: IfxAsclin_PinMap.c:248
IfxPort_OutputIdx_alt6
Definition: IfxPort.h:134
IfxAsclin11_TX_P10_0_OUT
IfxAsclin_Tx_Out IfxAsclin11_TX_P10_0_OUT
Definition: IfxAsclin_PinMap.c:225
IfxAsclin9_RXE_P20_6_IN
IfxAsclin_Rx_In IfxAsclin9_RXE_P20_6_IN
Definition: IfxAsclin_PinMap.c:148
IfxAsclin1_RTS_P20_6_OUT
IfxAsclin_Rts_Out IfxAsclin1_RTS_P20_6_OUT
Definition: IfxAsclin_PinMap.c:52
IfxAsclin5_TX_P14_14_OUT
IfxAsclin_Tx_Out IfxAsclin5_TX_P14_14_OUT
Definition: IfxAsclin_PinMap.c:290
IfxAsclin8_SCLK_P02_8_OUT
IfxAsclin_Sclk_Out IfxAsclin8_SCLK_P02_8_OUT
Definition: IfxAsclin_PinMap.c:186
IfxAsclin16_TX_P23_7_OUT
IfxAsclin_Tx_Out IfxAsclin16_TX_P23_7_OUT
Definition: IfxAsclin_PinMap.c:237
IfxAsclin4_RXA_P00_12_IN
IfxAsclin_Rx_In IfxAsclin4_RXA_P00_12_IN
Definition: IfxAsclin_PinMap.c:119
IfxAsclin3_RXH_P13_12_IN
IfxAsclin_Rx_In IfxAsclin3_RXH_P13_12_IN
Definition: IfxAsclin_PinMap.c:118
IfxAsclin6_TX_P32_7_OUT
IfxAsclin_Tx_Out IfxAsclin6_TX_P32_7_OUT
Definition: IfxAsclin_PinMap.c:298
IfxAsclin3_TX_P11_0_OUT
IfxAsclin_Tx_Out IfxAsclin3_TX_P11_0_OUT
Definition: IfxAsclin_PinMap.c:273
IfxAsclin15_TX_P32_7_OUT
IfxAsclin_Tx_Out IfxAsclin15_TX_P32_7_OUT
Definition: IfxAsclin_PinMap.c:234
IfxAsclin14_RXB_P33_4_IN
IfxAsclin_Rx_In IfxAsclin14_RXB_P33_4_IN
Definition: IfxAsclin_PinMap.c:77
IfxAsclin18_TX_P21_4_OUT
IfxAsclin_Tx_Out IfxAsclin18_TX_P21_4_OUT
Definition: IfxAsclin_PinMap.c:241
IfxAsclin5_SLSO_P14_8_OUT
IfxAsclin_Slso_Out IfxAsclin5_SLSO_P14_8_OUT
Definition: IfxAsclin_PinMap.c:206
IfxAsclin3_SCLK_P00_0_OUT
IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_0_OUT
Definition: IfxAsclin_PinMap.c:163
IfxAsclin7_RXD_P13_11_IN
IfxAsclin_Rx_In IfxAsclin7_RXD_P13_11_IN
Definition: IfxAsclin_PinMap.c:136
IfxPort_OutputIdx_alt3
Definition: IfxPort.h:131
IfxAsclin12_RXA_P00_3_IN
IfxAsclin_Rx_In IfxAsclin12_RXA_P00_3_IN
Definition: IfxAsclin_PinMap.c:72
IfxAsclin6_TX_P22_0_OUT
IfxAsclin_Tx_Out IfxAsclin6_TX_P22_0_OUT
Definition: IfxAsclin_PinMap.c:296
IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS
#define IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS
Definition: IfxAsclin_PinMap.h:377
IfxAsclin2_SCLK_P33_7_OUT
IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_7_OUT
Definition: IfxAsclin_PinMap.c:161
IfxAsclin16_TX_P23_6_OUT
IfxAsclin_Tx_Out IfxAsclin16_TX_P23_6_OUT
Definition: IfxAsclin_PinMap.c:236
IfxAsclin4_RXD_P22_9_IN
IfxAsclin_Rx_In IfxAsclin4_RXD_P22_9_IN
Definition: IfxAsclin_PinMap.c:122
IfxAsclin13_TX_P00_10_OUT
IfxAsclin_Tx_Out IfxAsclin13_TX_P00_10_OUT
Definition: IfxAsclin_PinMap.c:230
IfxAsclin_Rx_In
RX pin mapping structure.
Definition: IfxAsclin_PinMap.h:64
IfxAsclin5_SCLK_P33_3_OUT
IfxAsclin_Sclk_Out IfxAsclin5_SCLK_P33_3_OUT
Definition: IfxAsclin_PinMap.c:179
IfxAsclin13_RXA_P00_9_IN
IfxAsclin_Rx_In IfxAsclin13_RXA_P00_9_IN
Definition: IfxAsclin_PinMap.c:74
IfxAsclin5_RXC_P22_3_IN
IfxAsclin_Rx_In IfxAsclin5_RXC_P22_3_IN
Definition: IfxAsclin_PinMap.c:125
IfxAsclin3_SCLK_P33_2_OUT
IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P33_2_OUT
Definition: IfxAsclin_PinMap.c:173
IfxAsclin21_TX_P13_2_OUT
IfxAsclin_Tx_Out IfxAsclin21_TX_P13_2_OUT
Definition: IfxAsclin_PinMap.c:257
IfxAsclin11_TX_P21_5_OUT
IfxAsclin_Tx_Out IfxAsclin11_TX_P21_5_OUT
Definition: IfxAsclin_PinMap.c:227
IfxAsclin4_RXB_P34_2_IN
IfxAsclin_Rx_In IfxAsclin4_RXB_P34_2_IN
Definition: IfxAsclin_PinMap.c:120
IfxAsclin3_TX_P11_1_OUT
IfxAsclin_Tx_Out IfxAsclin3_TX_P11_1_OUT
Definition: IfxAsclin_PinMap.c:274
IfxAsclin3_TX_P13_9_OUT
IfxAsclin_Tx_Out IfxAsclin3_TX_P13_9_OUT
Definition: IfxAsclin_PinMap.c:275
IfxAsclin7_RXA_P14_15_IN
IfxAsclin_Rx_In IfxAsclin7_RXA_P14_15_IN
Definition: IfxAsclin_PinMap.c:133
IfxAsclin10_RXA_P00_4_IN
IfxAsclin_Rx_In IfxAsclin10_RXA_P00_4_IN
Definition: IfxAsclin_PinMap.c:62
IfxAsclin6_RXB_P01_0_IN
IfxAsclin_Rx_In IfxAsclin6_RXB_P01_0_IN
Definition: IfxAsclin_PinMap.c:128
IfxAsclin3_RXE_P00_1_IN
IfxAsclin_Rx_In IfxAsclin3_RXE_P00_1_IN
Definition: IfxAsclin_PinMap.c:114
IfxAsclin3_RXC_P20_3_IN
IfxAsclin_Rx_In IfxAsclin3_RXC_P20_3_IN
Definition: IfxAsclin_PinMap.c:112
IfxAsclin_Rts_Out
RTS pin mapping structure.
Definition: IfxAsclin_PinMap.h:72
IfxAsclin22_RXA_P10_4_IN
IfxAsclin_Rx_In IfxAsclin22_RXA_P10_4_IN
Definition: IfxAsclin_PinMap.c:99
IfxAsclin9_RXB_P01_7_IN
IfxAsclin_Rx_In IfxAsclin9_RXB_P01_7_IN
Definition: IfxAsclin_PinMap.c:145
Ifx_RxSel_c
Definition: Ifx_Types.h:131
IfxAsclin2_SCLK_P14_2_OUT
IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P14_2_OUT
Definition: IfxAsclin_PinMap.c:160
IfxAsclin1_SLSO_P20_8_OUT
IfxAsclin_Slso_Out IfxAsclin1_SLSO_P20_8_OUT
Definition: IfxAsclin_PinMap.c:191
IfxAsclin23_TX_P10_8_OUT
IfxAsclin_Tx_Out IfxAsclin23_TX_P10_8_OUT
Definition: IfxAsclin_PinMap.c:262
IfxAsclin6_SCLK_P10_11_OUT
IfxAsclin_Sclk_Out IfxAsclin6_SCLK_P10_11_OUT
Definition: IfxAsclin_PinMap.c:181
IfxAsclin5_TX_P00_7_OUT
IfxAsclin_Tx_Out IfxAsclin5_TX_P00_7_OUT
Definition: IfxAsclin_PinMap.c:289
IfxAsclin7_TX_P01_9_OUT
IfxAsclin_Tx_Out IfxAsclin7_TX_P01_9_OUT
Definition: IfxAsclin_PinMap.c:300
IfxAsclin7_RXC_P23_2_IN
IfxAsclin_Rx_In IfxAsclin7_RXC_P23_2_IN
Definition: IfxAsclin_PinMap.c:135
IfxAsclin22_TX_P10_0_OUT
IfxAsclin_Tx_Out IfxAsclin22_TX_P10_0_OUT
Definition: IfxAsclin_PinMap.c:259
IfxAsclin6_RXF_P23_1_IN
IfxAsclin_Rx_In IfxAsclin6_RXF_P23_1_IN
Definition: IfxAsclin_PinMap.c:132
IfxAsclin1_RXF_P33_13_IN
IfxAsclin_Rx_In IfxAsclin1_RXF_P33_13_IN
Definition: IfxAsclin_PinMap.c:93
IfxAsclin1_CTSA_P20_7_IN
IfxAsclin_Cts_In IfxAsclin1_CTSA_P20_7_IN
Definition: IfxAsclin_PinMap.c:46
IfxAsclin7_TX_P23_3_OUT
IfxAsclin_Tx_Out IfxAsclin7_TX_P23_3_OUT
Definition: IfxAsclin_PinMap.c:304
IfxAsclin3_RXG_P21_2_IN
IfxAsclin_Rx_In IfxAsclin3_RXG_P21_2_IN
Definition: IfxAsclin_PinMap.c:116
IfxAsclin3_TX_P32_3_OUT
IfxAsclin_Tx_Out IfxAsclin3_TX_P32_3_OUT
Definition: IfxAsclin_PinMap.c:284
IfxAsclin6_SCLK_P23_1_OUT
IfxAsclin_Sclk_Out IfxAsclin6_SCLK_P23_1_OUT
Definition: IfxAsclin_PinMap.c:182
IfxAsclin21_RXB_P13_3_IN
IfxAsclin_Rx_In IfxAsclin21_RXB_P13_3_IN
Definition: IfxAsclin_PinMap.c:98
IfxAsclin2_TX_P10_5_OUT
IfxAsclin_Tx_Out IfxAsclin2_TX_P10_5_OUT
Definition: IfxAsclin_PinMap.c:265
IfxAsclin4_SLSO_P34_4_OUT
IfxAsclin_Slso_Out IfxAsclin4_SLSO_P34_4_OUT
Definition: IfxAsclin_PinMap.c:205
IfxAsclin3_SLSO_P14_3_OUT
IfxAsclin_Slso_Out IfxAsclin3_SLSO_P14_3_OUT
Definition: IfxAsclin_PinMap.c:198
IfxAsclin20_RXA_P14_7_IN
IfxAsclin_Rx_In IfxAsclin20_RXA_P14_7_IN
Definition: IfxAsclin_PinMap.c:95
IfxAsclin9_SCLK_P01_6_OUT
IfxAsclin_Sclk_Out IfxAsclin9_SCLK_P01_6_OUT
Definition: IfxAsclin_PinMap.c:187
IfxAsclin0_SCLK_P14_0_OUT
IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P14_0_OUT
Definition: IfxAsclin_PinMap.c:150
IfxAsclin19_RXB_P15_7_IN
IfxAsclin_Rx_In IfxAsclin19_RXB_P15_7_IN
Definition: IfxAsclin_PinMap.c:87
IfxAsclin9_TX_P01_7_OUT
IfxAsclin_Tx_Out IfxAsclin9_TX_P01_7_OUT
Definition: IfxAsclin_PinMap.c:308
IfxAsclin6_SLSO_P10_13_OUT
IfxAsclin_Slso_Out IfxAsclin6_SLSO_P10_13_OUT
Definition: IfxAsclin_PinMap.c:209
IfxAsclin11_TX_P21_0_OUT
IfxAsclin_Tx_Out IfxAsclin11_TX_P21_0_OUT
Definition: IfxAsclin_PinMap.c:226
IfxAsclin3_RXB_P11_0_IN
IfxAsclin_Rx_In IfxAsclin3_RXB_P11_0_IN
Definition: IfxAsclin_PinMap.c:111
IfxAsclin12_TX_P01_6_OUT
IfxAsclin_Tx_Out IfxAsclin12_TX_P01_6_OUT
Definition: IfxAsclin_PinMap.c:229
IfxAsclin10_RXB_P00_8_IN
IfxAsclin_Rx_In IfxAsclin10_RXB_P00_8_IN
Definition: IfxAsclin_PinMap.c:63
IfxAsclin1_RXD_P14_8_IN
IfxAsclin_Rx_In IfxAsclin1_RXD_P14_8_IN
Definition: IfxAsclin_PinMap.c:91
IfxAsclin10_RXC_P13_0_IN
IfxAsclin_Rx_In IfxAsclin10_RXC_P13_0_IN
Definition: IfxAsclin_PinMap.c:64
IfxAsclin3_CTSA_P00_12_IN
IfxAsclin_Cts_In IfxAsclin3_CTSA_P00_12_IN
Definition: IfxAsclin_PinMap.c:50
IfxAsclin1_RXA_P15_1_IN
IfxAsclin_Rx_In IfxAsclin1_RXA_P15_1_IN
Definition: IfxAsclin_PinMap.c:88
IfxAsclin0_TX_P33_9_OUT
IfxAsclin_Tx_Out IfxAsclin0_TX_P33_9_OUT
Definition: IfxAsclin_PinMap.c:222
IfxAsclin1_TX_P14_10_OUT
IfxAsclin_Tx_Out IfxAsclin1_TX_P14_10_OUT
Definition: IfxAsclin_PinMap.c:246
IfxAsclin5_RXD_P14_15_IN
IfxAsclin_Rx_In IfxAsclin5_RXD_P14_15_IN
Definition: IfxAsclin_PinMap.c:126
IfxPort_OutputIdx_alt4
Definition: IfxPort.h:132
IfxAsclin7_SLSO_P01_11_OUT
IfxAsclin_Slso_Out IfxAsclin7_SLSO_P01_11_OUT
Definition: IfxAsclin_PinMap.c:211
IfxAsclin3_SLSO_P33_1_OUT
IfxAsclin_Slso_Out IfxAsclin3_SLSO_P33_1_OUT
Definition: IfxAsclin_PinMap.c:201
IFXASCLIN_PINMAP_NUM_MODULES
#define IFXASCLIN_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxAsclin_PinMap.h:371
IfxAsclin2_SCLK_P10_6_OUT
IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P10_6_OUT
Definition: IfxAsclin_PinMap.c:159
IfxAsclin2_TX_P14_2_OUT
IfxAsclin_Tx_Out IfxAsclin2_TX_P14_2_OUT
Definition: IfxAsclin_PinMap.c:266
IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS
#define IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS
Definition: IfxAsclin_PinMap.h:372
IfxAsclin8_RXB_P02_10_IN
IfxAsclin_Rx_In IfxAsclin8_RXB_P02_10_IN
Definition: IfxAsclin_PinMap.c:140
IfxAsclin3_TX_P32_2_OUT
IfxAsclin_Tx_Out IfxAsclin3_TX_P32_2_OUT
Definition: IfxAsclin_PinMap.c:283
IfxAsclin10_SLSO_P13_3_OUT
IfxAsclin_Slso_Out IfxAsclin10_SLSO_P13_3_OUT
Definition: IfxAsclin_PinMap.c:188
IfxAsclin2_CTSB_P33_5_IN
IfxAsclin_Cts_In IfxAsclin2_CTSB_P33_5_IN
Definition: IfxAsclin_PinMap.c:49
IfxAsclin18_RXB_P21_4_IN
IfxAsclin_Rx_In IfxAsclin18_RXB_P21_4_IN
Definition: IfxAsclin_PinMap.c:85
IfxAsclin20_TX_P14_8_OUT
IfxAsclin_Tx_Out IfxAsclin20_TX_P14_8_OUT
Definition: IfxAsclin_PinMap.c:256
IfxAsclin7_TX_P13_12_OUT
IfxAsclin_Tx_Out IfxAsclin7_TX_P13_12_OUT
Definition: IfxAsclin_PinMap.c:301
IfxAsclin0_RTS_P14_7_OUT
IfxAsclin_Rts_Out IfxAsclin0_RTS_P14_7_OUT
Definition: IfxAsclin_PinMap.c:51
IfxPort_OutputIdx_alt7
Definition: IfxPort.h:135
IfxAsclin20_RXB_P14_9_IN
IfxAsclin_Rx_In IfxAsclin20_RXB_P14_9_IN
Definition: IfxAsclin_PinMap.c:96
Ifx_RxSel_f
Definition: Ifx_Types.h:134
IfxAsclin2_SLSO_P10_5_OUT
IfxAsclin_Slso_Out IfxAsclin2_SLSO_P10_5_OUT
Definition: IfxAsclin_PinMap.c:194
IfxAsclin8_RXA_P02_9_IN
IfxAsclin_Rx_In IfxAsclin8_RXA_P02_9_IN
Definition: IfxAsclin_PinMap.c:139
IfxAsclin19_RXA_P15_6_IN
IfxAsclin_Rx_In IfxAsclin19_RXA_P15_6_IN
Definition: IfxAsclin_PinMap.c:86
IfxAsclin0_RXE_P13_11_IN
IfxAsclin_Rx_In IfxAsclin0_RXE_P13_11_IN
Definition: IfxAsclin_PinMap.c:61
IfxAsclin5_SLSO_P33_5_OUT
IfxAsclin_Slso_Out IfxAsclin5_SLSO_P33_5_OUT
Definition: IfxAsclin_PinMap.c:207
IfxAsclin11_RXF_P21_5_IN
IfxAsclin_Rx_In IfxAsclin11_RXF_P21_5_IN
Definition: IfxAsclin_PinMap.c:71
IfxAsclin2_RXC_P02_10_IN
IfxAsclin_Rx_In IfxAsclin2_RXC_P02_10_IN
Definition: IfxAsclin_PinMap.c:105
IfxAsclin2_RXE_P33_8_IN
IfxAsclin_Rx_In IfxAsclin2_RXE_P33_8_IN
Definition: IfxAsclin_PinMap.c:107
IfxAsclin14_TX_P33_2_OUT
IfxAsclin_Tx_Out IfxAsclin14_TX_P33_2_OUT
Definition: IfxAsclin_PinMap.c:232
IfxAsclin11_RXB_P10_4_IN
IfxAsclin_Rx_In IfxAsclin11_RXB_P10_4_IN
Definition: IfxAsclin_PinMap.c:67
IfxAsclin5_SCLK_P22_8_OUT
IfxAsclin_Sclk_Out IfxAsclin5_SCLK_P22_8_OUT
Definition: IfxAsclin_PinMap.c:178
IfxAsclin3_RXD_P32_2_IN
IfxAsclin_Rx_In IfxAsclin3_RXD_P32_2_IN
Definition: IfxAsclin_PinMap.c:113
IfxAsclin3_SCLK_P15_6_OUT
IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_6_OUT
Definition: IfxAsclin_PinMap.c:167
IfxAsclin7_RXE_P22_1_IN
IfxAsclin_Rx_In IfxAsclin7_RXE_P22_1_IN
Definition: IfxAsclin_PinMap.c:137
IfxAsclin8_RXD_P33_6_IN
IfxAsclin_Rx_In IfxAsclin8_RXD_P33_6_IN
Definition: IfxAsclin_PinMap.c:142
IfxAsclin0_TX_P14_1_OUT
IfxAsclin_Tx_Out IfxAsclin0_TX_P14_1_OUT
Definition: IfxAsclin_PinMap.c:219
IfxAsclin3_TX_P00_1_OUT
IfxAsclin_Tx_Out IfxAsclin3_TX_P00_1_OUT
Definition: IfxAsclin_PinMap.c:272
IfxAsclin4_TX_P22_5_OUT
IfxAsclin_Tx_Out IfxAsclin4_TX_P22_5_OUT
Definition: IfxAsclin_PinMap.c:287
IfxAsclin0_SCLK_P15_2_OUT
IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P15_2_OUT
Definition: IfxAsclin_PinMap.c:151
IfxAsclin8_TX_P33_7_OUT
IfxAsclin_Tx_Out IfxAsclin8_TX_P33_7_OUT
Definition: IfxAsclin_PinMap.c:306
IfxAsclin2_RXF_P32_6_IN
IfxAsclin_Rx_In IfxAsclin2_RXF_P32_6_IN
Definition: IfxAsclin_PinMap.c:108
IfxAsclin17_RXA_P22_11_IN
IfxAsclin_Rx_In IfxAsclin17_RXA_P22_11_IN
Definition: IfxAsclin_PinMap.c:82
IfxAsclin4_TX_P34_1_OUT
IfxAsclin_Tx_Out IfxAsclin4_TX_P34_1_OUT
Definition: IfxAsclin_PinMap.c:288
IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS
#define IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS
Definition: IfxAsclin_PinMap.h:375
IfxAsclin13_RXB_P00_11_IN
IfxAsclin_Rx_In IfxAsclin13_RXB_P00_11_IN
Definition: IfxAsclin_PinMap.c:75
IfxAsclin0_RXD_P33_10_IN
IfxAsclin_Rx_In IfxAsclin0_RXD_P33_10_IN
Definition: IfxAsclin_PinMap.c:60
IfxAsclin13_TX_P00_11_OUT
IfxAsclin_Tx_Out IfxAsclin13_TX_P00_11_OUT
Definition: IfxAsclin_PinMap.c:231
IfxAsclin_Tx_Out_pinTable
const IfxAsclin_Tx_Out * IfxAsclin_Tx_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS]
Definition: IfxAsclin_PinMap.c:1264
IfxAsclin3_SLSO_P00_3_OUT
IfxAsclin_Slso_Out IfxAsclin3_SLSO_P00_3_OUT
Definition: IfxAsclin_PinMap.c:196
IfxAsclin2_TX_P33_9_OUT
IfxAsclin_Tx_Out IfxAsclin2_TX_P33_9_OUT
Definition: IfxAsclin_PinMap.c:270
IfxAsclin2_TX_P02_9_OUT
IfxAsclin_Tx_Out IfxAsclin2_TX_P02_9_OUT
Definition: IfxAsclin_PinMap.c:264
IfxAsclin_Cts_In_pinTable
const IfxAsclin_Cts_In * IfxAsclin_Cts_In_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS]
Definition: IfxAsclin_PinMap.c:313
IfxAsclin6_TX_P02_15_OUT
IfxAsclin_Tx_Out IfxAsclin6_TX_P02_15_OUT
Definition: IfxAsclin_PinMap.c:294
IfxAsclin0_RXB_P15_3_IN
IfxAsclin_Rx_In IfxAsclin0_RXB_P15_3_IN
Definition: IfxAsclin_PinMap.c:58
IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS
#define IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS
Definition: IfxAsclin_PinMap.h:373
IfxAsclin6_SLSO_P23_4_OUT
IfxAsclin_Slso_Out IfxAsclin6_SLSO_P23_4_OUT
Definition: IfxAsclin_PinMap.c:210
IfxAsclin15_RXB_P32_7_IN
IfxAsclin_Rx_In IfxAsclin15_RXB_P32_7_IN
Definition: IfxAsclin_PinMap.c:79
IfxAsclin4_TX_P00_9_OUT
IfxAsclin_Tx_Out IfxAsclin4_TX_P00_9_OUT
Definition: IfxAsclin_PinMap.c:285
IfxAsclin5_RXA_P00_6_IN
IfxAsclin_Rx_In IfxAsclin5_RXA_P00_6_IN
Definition: IfxAsclin_PinMap.c:123
IfxAsclin11_RXD_P21_1_IN
IfxAsclin_Rx_In IfxAsclin11_RXD_P21_1_IN
Definition: IfxAsclin_PinMap.c:69
IfxAsclin2_SCLK_P33_9_OUT
IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_9_OUT
Definition: IfxAsclin_PinMap.c:162
IfxAsclin3_SCLK_P15_8_OUT
IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_8_OUT
Definition: IfxAsclin_PinMap.c:168
IfxPort_OutputIdx_alt5
Definition: IfxPort.h:133
IfxAsclin12_RXB_P00_5_IN
IfxAsclin_Rx_In IfxAsclin12_RXB_P00_5_IN
Definition: IfxAsclin_PinMap.c:73
IfxAsclin6_RXE_P22_0_IN
IfxAsclin_Rx_In IfxAsclin6_RXE_P22_0_IN
Definition: IfxAsclin_PinMap.c:131
IfxAsclin3_RXA_P15_7_IN
IfxAsclin_Rx_In IfxAsclin3_RXA_P15_7_IN
Definition: IfxAsclin_PinMap.c:110
IfxAsclin2_TX_P02_0_OUT
IfxAsclin_Tx_Out IfxAsclin2_TX_P02_0_OUT
Definition: IfxAsclin_PinMap.c:263
IfxAsclin6_RXC_P32_6_IN
IfxAsclin_Rx_In IfxAsclin6_RXC_P32_6_IN
Definition: IfxAsclin_PinMap.c:129
IfxAsclin3_TX_P22_0_OUT
IfxAsclin_Tx_Out IfxAsclin3_TX_P22_0_OUT
Definition: IfxAsclin_PinMap.c:281
IfxAsclin3_SCLK_P21_7_OUT
IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_7_OUT
Definition: IfxAsclin_PinMap.c:171
IfxAsclin12_TX_P00_3_OUT
IfxAsclin_Tx_Out IfxAsclin12_TX_P00_3_OUT
Definition: IfxAsclin_PinMap.c:228
IfxAsclin17_TX_P22_7_OUT
IfxAsclin_Tx_Out IfxAsclin17_TX_P22_7_OUT
Definition: IfxAsclin_PinMap.c:239
IfxAsclin0_TX_P15_3_OUT
IfxAsclin_Tx_Out IfxAsclin0_TX_P15_3_OUT
Definition: IfxAsclin_PinMap.c:221
IfxAsclin6_RXD_P10_9_IN
IfxAsclin_Rx_In IfxAsclin6_RXD_P10_9_IN
Definition: IfxAsclin_PinMap.c:130
IfxAsclin7_RXB_P01_8_IN
IfxAsclin_Rx_In IfxAsclin7_RXB_P01_8_IN
Definition: IfxAsclin_PinMap.c:134
IfxAsclin7_TX_P22_1_OUT
IfxAsclin_Tx_Out IfxAsclin7_TX_P22_1_OUT
Definition: IfxAsclin_PinMap.c:303
IfxAsclin19_TX_P15_7_OUT
IfxAsclin_Tx_Out IfxAsclin19_TX_P15_7_OUT
Definition: IfxAsclin_PinMap.c:243
IfxAsclin1_RXC_P20_9_IN
IfxAsclin_Rx_In IfxAsclin1_RXC_P20_9_IN
Definition: IfxAsclin_PinMap.c:90
IfxAsclin3_SCLK_P32_3_OUT
IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P32_3_OUT
Definition: IfxAsclin_PinMap.c:172
IfxAsclin0_TX_P15_2_OUT
IfxAsclin_Tx_Out IfxAsclin0_TX_P15_2_OUT
Definition: IfxAsclin_PinMap.c:220
IfxAsclin8_RXE_P34_5_IN
IfxAsclin_Rx_In IfxAsclin8_RXE_P34_5_IN
Definition: IfxAsclin_PinMap.c:143
IfxAsclin16_RXA_P23_5_IN
IfxAsclin_Rx_In IfxAsclin16_RXA_P23_5_IN
Definition: IfxAsclin_PinMap.c:80
IfxAsclin3_TX_P22_1_OUT
IfxAsclin_Tx_Out IfxAsclin3_TX_P22_1_OUT
Definition: IfxAsclin_PinMap.c:282
IfxAsclin10_RXD_P13_1_IN
IfxAsclin_Rx_In IfxAsclin10_RXD_P13_1_IN
Definition: IfxAsclin_PinMap.c:65
IfxAsclin1_SLSO_P33_10_OUT
IfxAsclin_Slso_Out IfxAsclin1_SLSO_P33_10_OUT
Definition: IfxAsclin_PinMap.c:192
IfxAsclin3_TX_P15_6_OUT
IfxAsclin_Tx_Out IfxAsclin3_TX_P15_6_OUT
Definition: IfxAsclin_PinMap.c:276
IfxAsclin9_TX_P20_7_OUT
IfxAsclin_Tx_Out IfxAsclin9_TX_P20_7_OUT
Definition: IfxAsclin_PinMap.c:310
IfxAsclin11_RXA_P10_0_IN
IfxAsclin_Rx_In IfxAsclin11_RXA_P10_0_IN
Definition: IfxAsclin_PinMap.c:66
IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS
#define IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS
Definition: IfxAsclin_PinMap.h:374
IfxAsclin1_TX_P15_5_OUT
IfxAsclin_Tx_Out IfxAsclin1_TX_P15_5_OUT
Definition: IfxAsclin_PinMap.c:251
IfxAsclin3_RXF_P21_6_IN
IfxAsclin_Rx_In IfxAsclin3_RXF_P21_6_IN
Definition: IfxAsclin_PinMap.c:115
IfxAsclin9_RXC_P14_7_IN
IfxAsclin_Rx_In IfxAsclin9_RXC_P14_7_IN
Definition: IfxAsclin_PinMap.c:146
IfxAsclin22_RXB_P10_5_IN
IfxAsclin_Rx_In IfxAsclin22_RXB_P10_5_IN
Definition: IfxAsclin_PinMap.c:100
IfxAsclin3_TX_P15_7_OUT
IfxAsclin_Tx_Out IfxAsclin3_TX_P15_7_OUT
Definition: IfxAsclin_PinMap.c:277


iLLD_TC38A: IfxAsclin_PinMap.h Source File

  • _PinMap
IfxAsclin_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxAsclin_PinMap.h
3 * \brief ASCLIN I/O map
4 * \ingroup IfxLld_Asclin
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Asclin_pinmap ASCLIN Pin Mapping
42 * \ingroup IfxLld_Asclin
43 */
44
45 #ifndef IFXASCLIN_PINMAP_H
46 #define IFXASCLIN_PINMAP_H
47
48 #include <IfxAsclin_reg.h>
49 #include <_Impl/IfxAsclin_cfg.h>
50 #include <Port/Std/IfxPort.h>
51
52 /** \addtogroup IfxLld_Asclin_pinmap
53 * \{ */
54
55 /** \brief CTS pin mapping structure */
56 typedef const struct
57 {
58 Ifx_ASCLIN* module; /**< \brief Base address */
59 IfxPort_Pin pin; /**< \brief Port pin */
60 Ifx_RxSel select; /**< \brief Input multiplexer value */
61 } IfxAsclin_Cts_In;
62
63 /** \brief RX pin mapping structure */
64 typedef const struct
65 {
66 Ifx_ASCLIN* module; /**< \brief Base address */
67 IfxPort_Pin pin; /**< \brief Port pin */
68 Ifx_RxSel select; /**< \brief Input multiplexer value */
69 } IfxAsclin_Rx_In;
70
71 /** \brief RTS pin mapping structure */
72 typedef const struct
73 {
74 Ifx_ASCLIN* module; /**< \brief Base address */
75 IfxPort_Pin pin; /**< \brief Port pin */
76 IfxPort_OutputIdx select; /**< \brief Port control code */
77 } IfxAsclin_Rts_Out;
78
79 /** \brief SCLK pin mapping structure */
80 typedef const struct
81 {
82 Ifx_ASCLIN* module; /**< \brief Base address */
83 IfxPort_Pin pin; /**< \brief Port pin */
84 IfxPort_OutputIdx select; /**< \brief Port control code */
85 } IfxAsclin_Sclk_Out;
86
87 /** \brief SLSO pin mapping structure */
88 typedef const struct
89 {
90 Ifx_ASCLIN* module; /**< \brief Base address */
91 IfxPort_Pin pin; /**< \brief Port pin */
92 IfxPort_OutputIdx select; /**< \brief Port control code */
93 } IfxAsclin_Slso_Out;
94
95 /** \brief TX pin mapping structure */
96 typedef const struct
97 {
98 Ifx_ASCLIN* module; /**< \brief Base address */
99 IfxPort_Pin pin; /**< \brief Port pin */
100 IfxPort_OutputIdx select; /**< \brief Port control code */
101 } IfxAsclin_Tx_Out;
102
103 IFX_EXTERN IfxAsclin_Cts_In IfxAsclin0_CTSA_P14_9_IN; /**< \brief Clear to send input */
104 IFX_EXTERN IfxAsclin_Cts_In IfxAsclin1_CTSA_P20_7_IN; /**< \brief Clear to send input */
105 IFX_EXTERN IfxAsclin_Cts_In IfxAsclin1_CTSB_P32_4_IN; /**< \brief Clear to send input */
106 IFX_EXTERN IfxAsclin_Cts_In IfxAsclin2_CTSA_P10_7_IN; /**< \brief Clear to send input */
107 IFX_EXTERN IfxAsclin_Cts_In IfxAsclin2_CTSB_P33_5_IN; /**< \brief Clear to send input */
108 IFX_EXTERN IfxAsclin_Cts_In IfxAsclin3_CTSA_P00_12_IN; /**< \brief Clear to send input */
109 IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin0_RTS_P14_7_OUT; /**< \brief Ready to send output */
110 IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin1_RTS_P20_6_OUT; /**< \brief Ready to send output */
111 IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin1_RTS_P23_1_OUT; /**< \brief Ready to send output */
112 IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin2_RTS_P10_8_OUT; /**< \brief Ready to send output */
113 IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin2_RTS_P33_4_OUT; /**< \brief Ready to send output */
114 IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin3_RTS_P00_9_OUT; /**< \brief Ready to send output */
115 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin0_RXA_P14_1_IN; /**< \brief Receive input */
116 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin0_RXB_P15_3_IN; /**< \brief Receive input */
117 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin0_RXC_P01_8_IN; /**< \brief Receive input */
118 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin0_RXD_P33_10_IN; /**< \brief Receive input */
119 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin0_RXE_P13_11_IN; /**< \brief Receive input */
120 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin10_RXA_P00_4_IN; /**< \brief Receive input */
121 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin10_RXB_P00_8_IN; /**< \brief Receive input */
122 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin10_RXC_P13_0_IN; /**< \brief Receive input */
123 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin10_RXD_P13_1_IN; /**< \brief Receive input */
124 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin11_RXA_P10_0_IN; /**< \brief Receive input */
125 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin11_RXB_P10_4_IN; /**< \brief Receive input */
126 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin11_RXC_P21_0_IN; /**< \brief Receive input */
127 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin11_RXD_P21_1_IN; /**< \brief Receive input */
128 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin11_RXE_P21_2_IN; /**< \brief Receive input */
129 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin11_RXF_P21_5_IN; /**< \brief Receive input */
130 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin12_RXA_P00_3_IN; /**< \brief Receive input */
131 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin12_RXB_P00_5_IN; /**< \brief Receive input */
132 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin13_RXA_P00_9_IN; /**< \brief Receive input */
133 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin13_RXB_P00_11_IN; /**< \brief Receive input */
134 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin14_RXA_P33_3_IN; /**< \brief Receive input */
135 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin14_RXB_P33_4_IN; /**< \brief Receive input */
136 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin15_RXA_P32_4_IN; /**< \brief Receive input */
137 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin15_RXB_P32_7_IN; /**< \brief Receive input */
138 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin16_RXA_P23_5_IN; /**< \brief Receive input */
139 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin16_RXB_P23_7_IN; /**< \brief Receive input */
140 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin17_RXA_P22_11_IN; /**< \brief Receive input */
141 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin17_RXB_P21_0_IN; /**< \brief Receive input */
142 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin18_RXA_P21_1_IN; /**< \brief Receive input */
143 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin18_RXB_P21_4_IN; /**< \brief Receive input */
144 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin19_RXA_P15_6_IN; /**< \brief Receive input */
145 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin19_RXB_P15_7_IN; /**< \brief Receive input */
146 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXA_P15_1_IN; /**< \brief Receive input */
147 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXB_P15_5_IN; /**< \brief Receive input */
148 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXC_P20_9_IN; /**< \brief Receive input */
149 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXD_P14_8_IN; /**< \brief Receive input */
150 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXE_P11_10_IN; /**< \brief Receive input */
151 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXF_P33_13_IN; /**< \brief Receive input */
152 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXG_P02_3_IN; /**< \brief Receive input */
153 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin20_RXA_P14_7_IN; /**< \brief Receive input */
154 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin20_RXB_P14_9_IN; /**< \brief Receive input */
155 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin21_RXA_P13_0_IN; /**< \brief Receive input */
156 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin21_RXB_P13_3_IN; /**< \brief Receive input */
157 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin22_RXA_P10_4_IN; /**< \brief Receive input */
158 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin22_RXB_P10_5_IN; /**< \brief Receive input */
159 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin23_RXA_P10_6_IN; /**< \brief Receive input */
160 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin23_RXB_P10_7_IN; /**< \brief Receive input */
161 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXA_P14_3_IN; /**< \brief Receive input */
162 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXB_P02_1_IN; /**< \brief Receive input */
163 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXC_P02_10_IN; /**< \brief Receive input */
164 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXD_P10_6_IN; /**< \brief Receive input */
165 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXE_P33_8_IN; /**< \brief Receive input */
166 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXF_P32_6_IN; /**< \brief Receive input */
167 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXG_P02_0_IN; /**< \brief Receive input */
168 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXA_P15_7_IN; /**< \brief Receive input */
169 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXB_P11_0_IN; /**< \brief Receive input */
170 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXC_P20_3_IN; /**< \brief Receive input */
171 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXD_P32_2_IN; /**< \brief Receive input */
172 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXE_P00_1_IN; /**< \brief Receive input */
173 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXF_P21_6_IN; /**< \brief Receive input */
174 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXG_P21_2_IN; /**< \brief Differential Receive input (low active) */
175 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXG_P21_3_IN; /**< \brief Differential Receive input (high active) */
176 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXH_P13_12_IN; /**< \brief Receive input */
177 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin4_RXA_P00_12_IN; /**< \brief Receive input */
178 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin4_RXB_P34_2_IN; /**< \brief Receive input */
179 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin4_RXC_P22_6_IN; /**< \brief Receive input */
180 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin4_RXD_P22_9_IN; /**< \brief Receive input */
181 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin5_RXA_P00_6_IN; /**< \brief Receive input */
182 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin5_RXB_P33_4_IN; /**< \brief Receive input */
183 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin5_RXC_P22_3_IN; /**< \brief Receive input */
184 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin5_RXD_P14_15_IN; /**< \brief Receive input */
185 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin6_RXA_P23_3_IN; /**< \brief Receive input */
186 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin6_RXB_P01_0_IN; /**< \brief Receive input */
187 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin6_RXC_P32_6_IN; /**< \brief Receive input */
188 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin6_RXD_P10_9_IN; /**< \brief Receive input */
189 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin6_RXE_P22_0_IN; /**< \brief Receive input */
190 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin6_RXF_P23_1_IN; /**< \brief Receive input */
191 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin7_RXA_P14_15_IN; /**< \brief Receive input */
192 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin7_RXB_P01_8_IN; /**< \brief Receive input */
193 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin7_RXC_P23_2_IN; /**< \brief Receive input */
194 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin7_RXD_P13_11_IN; /**< \brief Receive input */
195 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin7_RXE_P22_1_IN; /**< \brief Receive input */
196 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin7_RXF_P22_4_IN; /**< \brief Receive input */
197 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin8_RXA_P02_9_IN; /**< \brief Receive input */
198 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin8_RXB_P02_10_IN; /**< \brief Receive input */
199 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin8_RXC_P33_1_IN; /**< \brief Receive input */
200 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin8_RXD_P33_6_IN; /**< \brief Receive input */
201 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin8_RXE_P34_5_IN; /**< \brief Receive input */
202 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin9_RXA_P01_5_IN; /**< \brief Receive input */
203 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin9_RXB_P01_7_IN; /**< \brief Receive input */
204 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin9_RXC_P14_7_IN; /**< \brief Receive input */
205 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin9_RXD_P14_9_IN; /**< \brief Receive input */
206 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin9_RXE_P20_6_IN; /**< \brief Receive input */
207 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin9_RXF_P20_7_IN; /**< \brief Receive input */
208 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P14_0_OUT; /**< \brief Shift clock output */
209 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P15_2_OUT; /**< \brief Shift clock output */
210 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin10_SCLK_P13_2_OUT; /**< \brief Shift clock output */
211 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin11_SCLK_P21_3_OUT; /**< \brief Shift clock output */
212 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P15_0_OUT; /**< \brief Shift clock output */
213 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P20_10_OUT; /**< \brief Shift clock output */
214 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_11_OUT; /**< \brief Shift clock output */
215 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_12_OUT; /**< \brief Shift clock output */
216 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P02_4_OUT; /**< \brief Shift clock output */
217 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P10_6_OUT; /**< \brief Shift clock output */
218 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P14_2_OUT; /**< \brief Shift clock output */
219 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_7_OUT; /**< \brief Shift clock output */
220 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_9_OUT; /**< \brief Shift clock output */
221 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_0_OUT; /**< \brief Shift clock output */
222 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_2_OUT; /**< \brief Shift clock output */
223 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P11_1_OUT; /**< \brief Shift clock output */
224 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P11_4_OUT; /**< \brief Shift clock output */
225 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_6_OUT; /**< \brief Shift clock output */
226 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_8_OUT; /**< \brief Shift clock output */
227 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P20_0_OUT; /**< \brief Shift clock output */
228 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_5_OUT; /**< \brief Shift clock output */
229 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_7_OUT; /**< \brief Shift clock output */
230 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P32_3_OUT; /**< \brief Shift clock output */
231 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P33_2_OUT; /**< \brief Shift clock output */
232 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin4_SCLK_P00_10_OUT; /**< \brief Shift clock output */
233 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin4_SCLK_P22_7_OUT; /**< \brief Shift clock output */
234 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin4_SCLK_P34_3_OUT; /**< \brief Shift clock output */
235 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin5_SCLK_P14_12_OUT; /**< \brief Shift clock output */
236 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin5_SCLK_P22_8_OUT; /**< \brief Shift clock output */
237 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin5_SCLK_P33_3_OUT; /**< \brief Shift clock output */
238 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin6_SCLK_P02_14_OUT; /**< \brief Shift clock output */
239 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin6_SCLK_P10_11_OUT; /**< \brief Shift clock output */
240 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin6_SCLK_P23_1_OUT; /**< \brief Shift clock output */
241 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin7_SCLK_P01_10_OUT; /**< \brief Shift clock output */
242 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin7_SCLK_P13_13_OUT; /**< \brief Shift clock output */
243 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin7_SCLK_P14_12_OUT; /**< \brief Shift clock output */
244 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin8_SCLK_P02_8_OUT; /**< \brief Shift clock output */
245 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin9_SCLK_P01_6_OUT; /**< \brief Shift clock output */
246 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin10_SLSO_P13_3_OUT; /**< \brief Slave select signal output */
247 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin11_SLSO_P21_4_OUT; /**< \brief Slave select signal output */
248 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin1_SLSO_P14_3_OUT; /**< \brief Slave select signal output */
249 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin1_SLSO_P20_8_OUT; /**< \brief Slave select signal output */
250 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin1_SLSO_P33_10_OUT; /**< \brief Slave select signal output */
251 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin2_SLSO_P02_3_OUT; /**< \brief Slave select signal output */
252 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin2_SLSO_P10_5_OUT; /**< \brief Slave select signal output */
253 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin2_SLSO_P33_6_OUT; /**< \brief Slave select signal output */
254 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P00_3_OUT; /**< \brief Slave select signal output */
255 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P12_1_OUT; /**< \brief Slave select signal output */
256 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P14_3_OUT; /**< \brief Slave select signal output */
257 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_2_OUT; /**< \brief Slave select signal output */
258 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_6_OUT; /**< \brief Slave select signal output */
259 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P33_1_OUT; /**< \brief Slave select signal output */
260 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin4_SLSO_P00_11_OUT; /**< \brief Slave select signal output */
261 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin4_SLSO_P22_11_OUT; /**< \brief Slave select signal output */
262 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin4_SLSO_P22_4_OUT; /**< \brief Slave select signal output */
263 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin4_SLSO_P34_4_OUT; /**< \brief Slave select signal output */
264 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin5_SLSO_P14_8_OUT; /**< \brief Slave select signal output */
265 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin5_SLSO_P33_5_OUT; /**< \brief Slave select signal output */
266 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin6_SLSO_P02_12_OUT; /**< \brief Slave select signal output */
267 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin6_SLSO_P10_13_OUT; /**< \brief Slave select signal output */
268 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin6_SLSO_P23_4_OUT; /**< \brief Slave select signal output */
269 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin7_SLSO_P01_11_OUT; /**< \brief Slave select signal output */
270 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin7_SLSO_P13_15_OUT; /**< \brief Slave select signal output */
271 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin7_SLSO_P14_8_OUT; /**< \brief Slave select signal output */
272 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin8_SLSO_P02_11_OUT; /**< \brief Slave select signal output */
273 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin9_SLSO_P01_4_OUT; /**< \brief Slave select signal output */
274 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P01_13_OUT; /**< \brief Transmit output */
275 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P13_10_OUT; /**< \brief Transmit output */
276 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P14_0_OUT; /**< \brief Transmit output */
277 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P14_1_OUT; /**< \brief Transmit output */
278 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P15_2_OUT; /**< \brief Transmit output */
279 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P15_3_OUT; /**< \brief Transmit output */
280 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P33_9_OUT; /**< \brief Transmit output */
281 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin10_TX_P00_8_OUT; /**< \brief Transmit output */
282 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin10_TX_P13_0_OUT; /**< \brief Transmit output */
283 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin11_TX_P10_0_OUT; /**< \brief Transmit output */
284 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin11_TX_P21_0_OUT; /**< \brief Transmit output */
285 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin11_TX_P21_5_OUT; /**< \brief Transmit output */
286 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin12_TX_P00_3_OUT; /**< \brief Transmit output */
287 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin12_TX_P01_6_OUT; /**< \brief Transmit output */
288 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin13_TX_P00_10_OUT; /**< \brief Transmit output */
289 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin13_TX_P00_11_OUT; /**< \brief Transmit output */
290 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin14_TX_P33_2_OUT; /**< \brief Transmit output */
291 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin14_TX_P33_3_OUT; /**< \brief Transmit output */
292 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin15_TX_P32_7_OUT; /**< \brief Transmit output */
293 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin15_TX_P33_0_OUT; /**< \brief Transmit output */
294 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin16_TX_P23_6_OUT; /**< \brief Transmit output */
295 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin16_TX_P23_7_OUT; /**< \brief Transmit output */
296 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin17_TX_P22_11_OUT; /**< \brief Transmit output */
297 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin17_TX_P22_7_OUT; /**< \brief Transmit output */
298 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin18_TX_P21_3_OUT; /**< \brief Transmit output */
299 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin18_TX_P21_4_OUT; /**< \brief Transmit output */
300 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin19_TX_P15_4_OUT; /**< \brief Transmit output */
301 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin19_TX_P15_7_OUT; /**< \brief Transmit output */
302 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P02_2_OUT; /**< \brief Transmit output */
303 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P11_12_OUT; /**< \brief Transmit output */
304 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P14_10_OUT; /**< \brief Transmit output */
305 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P14_15_OUT; /**< \brief Transmit output */
306 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_0_OUT; /**< \brief Transmit output */
307 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_1_OUT; /**< \brief Transmit output */
308 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_4_OUT; /**< \brief Transmit output */
309 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_5_OUT; /**< \brief Transmit output */
310 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P20_10_OUT; /**< \brief Transmit output */
311 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P33_12_OUT; /**< \brief Transmit output */
312 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P33_13_OUT; /**< \brief Transmit output */
313 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin20_TX_P14_7_OUT; /**< \brief Transmit output */
314 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin20_TX_P14_8_OUT; /**< \brief Transmit output */
315 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin21_TX_P13_2_OUT; /**< \brief Transmit output */
316 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin21_TX_P13_3_OUT; /**< \brief Transmit output */
317 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin22_TX_P10_0_OUT; /**< \brief Transmit output */
318 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin22_TX_P10_4_OUT; /**< \brief Transmit output */
319 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin23_TX_P10_7_OUT; /**< \brief Transmit output */
320 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin23_TX_P10_8_OUT; /**< \brief Transmit output */
321 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P02_0_OUT; /**< \brief Transmit output */
322 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P02_9_OUT; /**< \brief Transmit output */
323 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P10_5_OUT; /**< \brief Transmit output */
324 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P14_2_OUT; /**< \brief Transmit output */
325 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P14_3_OUT; /**< \brief Transmit output */
326 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P32_5_OUT; /**< \brief Transmit output */
327 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P33_8_OUT; /**< \brief Transmit output */
328 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P33_9_OUT; /**< \brief Transmit output */
329 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P00_0_OUT; /**< \brief Transmit output */
330 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P00_1_OUT; /**< \brief Transmit output */
331 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P11_0_OUT; /**< \brief Transmit output */
332 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P11_1_OUT; /**< \brief Transmit output */
333 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P13_9_OUT; /**< \brief Transmit output */
334 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P15_6_OUT; /**< \brief Transmit output */
335 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P15_7_OUT; /**< \brief Transmit output */
336 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P20_0_OUT; /**< \brief Transmit output */
337 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P20_3_OUT; /**< \brief Transmit output */
338 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P21_7_OUT; /**< \brief Transmit output */
339 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P22_0_OUT; /**< \brief Differential Transmit output (low active) */
340 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P22_1_OUT; /**< \brief Differential Transmit output (high active) */
341 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P32_2_OUT; /**< \brief Transmit output */
342 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P32_3_OUT; /**< \brief Transmit output */
343 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin4_TX_P00_9_OUT; /**< \brief Transmit output */
344 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin4_TX_P22_10_OUT; /**< \brief Transmit output */
345 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin4_TX_P22_5_OUT; /**< \brief Transmit output */
346 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin4_TX_P34_1_OUT; /**< \brief Transmit output */
347 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin5_TX_P00_7_OUT; /**< \brief Transmit output */
348 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin5_TX_P14_14_OUT; /**< \brief Transmit output */
349 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin5_TX_P22_2_OUT; /**< \brief Transmit output */
350 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin5_TX_P33_0_OUT; /**< \brief Transmit output */
351 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin6_TX_P01_1_OUT; /**< \brief Transmit output */
352 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin6_TX_P02_15_OUT; /**< \brief Transmit output */
353 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin6_TX_P10_10_OUT; /**< \brief Transmit output */
354 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin6_TX_P22_0_OUT; /**< \brief Transmit output */
355 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin6_TX_P23_5_OUT; /**< \brief Transmit output */
356 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin6_TX_P32_7_OUT; /**< \brief Transmit output */
357 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin7_TX_P01_12_OUT; /**< \brief Transmit output */
358 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin7_TX_P01_9_OUT; /**< \brief Transmit output */
359 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin7_TX_P13_12_OUT; /**< \brief Transmit output */
360 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin7_TX_P14_14_OUT; /**< \brief Transmit output */
361 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin7_TX_P22_1_OUT; /**< \brief Transmit output */
362 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin7_TX_P23_3_OUT; /**< \brief Transmit output */
363 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin8_TX_P02_9_OUT; /**< \brief Transmit output */
364 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin8_TX_P33_7_OUT; /**< \brief Transmit output */
365 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin8_TX_P34_5_OUT; /**< \brief Transmit output */
366 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin9_TX_P01_7_OUT; /**< \brief Transmit output */
367 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin9_TX_P14_7_OUT; /**< \brief Transmit output */
368 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin9_TX_P20_7_OUT; /**< \brief Transmit output */
369
370 /** \brief Table dimensions */
371 #define IFXASCLIN_PINMAP_NUM_MODULES 24
372 #define IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS 2
373 #define IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS 2
374 #define IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS 8
375 #define IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS 11
376 #define IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS 6
377 #define IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS 14
378
379
380 /** \brief IfxAsclin_Cts_In table */
381 IFX_EXTERN const IfxAsclin_Cts_In *IfxAsclin_Cts_In_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS];
382
383 /** \brief IfxAsclin_Rts_Out table */
384 IFX_EXTERN const IfxAsclin_Rts_Out *IfxAsclin_Rts_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS];
385
386 /** \brief IfxAsclin_Rx_In table */
387 IFX_EXTERN const IfxAsclin_Rx_In *IfxAsclin_Rx_In_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS];
388
389 /** \brief IfxAsclin_Sclk_Out table */
390 IFX_EXTERN const IfxAsclin_Sclk_Out *IfxAsclin_Sclk_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS];
391
392 /** \brief IfxAsclin_Slso_Out table */
393 IFX_EXTERN const IfxAsclin_Slso_Out *IfxAsclin_Slso_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS];
394
395 /** \brief IfxAsclin_Tx_Out table */
396 IFX_EXTERN const IfxAsclin_Tx_Out *IfxAsclin_Tx_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS];
397
398 /** \} */
399
400 #endif /* IFXASCLIN_PINMAP_H */
IfxAsclin2_CTSB_P33_5_IN
IFX_EXTERN IfxAsclin_Cts_In IfxAsclin2_CTSB_P33_5_IN
Clear to send input.
Definition: IfxAsclin_PinMap.h:107
IfxAsclin5_SCLK_P33_3_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin5_SCLK_P33_3_OUT
Shift clock output.
Definition: IfxAsclin_PinMap.h:237
IfxAsclin_Cts_In
CTS pin mapping structure.
Definition: IfxAsclin_PinMap.h:56
IfxAsclin0_SCLK_P14_0_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P14_0_OUT
Shift clock output.
Definition: IfxAsclin_PinMap.h:208
IfxAsclin3_TX_P32_2_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P32_2_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:341
IfxAsclin_Tx_Out
TX pin mapping structure.
Definition: IfxAsclin_PinMap.h:96
IfxAsclin3_TX_P15_7_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P15_7_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:335
IfxAsclin8_SCLK_P02_8_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin8_SCLK_P02_8_OUT
Shift clock output.
Definition: IfxAsclin_PinMap.h:244
IfxAsclin10_RXD_P13_1_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin10_RXD_P13_1_IN
Receive input.
Definition: IfxAsclin_PinMap.h:123
IfxAsclin5_RXC_P22_3_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin5_RXC_P22_3_IN
Receive input.
Definition: IfxAsclin_PinMap.h:183
IfxAsclin10_RXB_P00_8_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin10_RXB_P00_8_IN
Receive input.
Definition: IfxAsclin_PinMap.h:121
IfxAsclin3_TX_P15_6_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P15_6_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:334
IfxAsclin1_CTSB_P32_4_IN
IFX_EXTERN IfxAsclin_Cts_In IfxAsclin1_CTSB_P32_4_IN
Clear to send input.
Definition: IfxAsclin_PinMap.h:105
IfxAsclin2_RXA_P14_3_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXA_P14_3_IN
Receive input.
Definition: IfxAsclin_PinMap.h:161
IfxAsclin5_TX_P33_0_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin5_TX_P33_0_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:350
IfxAsclin21_TX_P13_3_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin21_TX_P13_3_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:316
IfxAsclin3_RXE_P00_1_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXE_P00_1_IN
Receive input.
Definition: IfxAsclin_PinMap.h:172
IfxAsclin5_RXA_P00_6_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin5_RXA_P00_6_IN
Receive input.
Definition: IfxAsclin_PinMap.h:181
IfxAsclin6_RXC_P32_6_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin6_RXC_P32_6_IN
Receive input.
Definition: IfxAsclin_PinMap.h:187
IfxAsclin0_SCLK_P15_2_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P15_2_OUT
Shift clock output.
Definition: IfxAsclin_PinMap.h:209
IfxAsclin21_RXB_P13_3_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin21_RXB_P13_3_IN
Receive input.
Definition: IfxAsclin_PinMap.h:156
IfxAsclin4_SLSO_P00_11_OUT
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin4_SLSO_P00_11_OUT
Slave select signal output.
Definition: IfxAsclin_PinMap.h:260
IfxAsclin14_RXA_P33_3_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin14_RXA_P33_3_IN
Receive input.
Definition: IfxAsclin_PinMap.h:134
IfxAsclin0_RXC_P01_8_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin0_RXC_P01_8_IN
Receive input.
Definition: IfxAsclin_PinMap.h:117
IfxAsclin4_SLSO_P22_4_OUT
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin4_SLSO_P22_4_OUT
Slave select signal output.
Definition: IfxAsclin_PinMap.h:262
IfxAsclin3_RXC_P20_3_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXC_P20_3_IN
Receive input.
Definition: IfxAsclin_PinMap.h:170
IfxAsclin7_SLSO_P14_8_OUT
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin7_SLSO_P14_8_OUT
Slave select signal output.
Definition: IfxAsclin_PinMap.h:271
IfxAsclin7_TX_P23_3_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin7_TX_P23_3_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:362
IfxAsclin17_TX_P22_7_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin17_TX_P22_7_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:297
IfxAsclin2_RXC_P02_10_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXC_P02_10_IN
Receive input.
Definition: IfxAsclin_PinMap.h:163
IfxAsclin15_TX_P33_0_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin15_TX_P33_0_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:293
IfxAsclin_Sclk_Out
SCLK pin mapping structure.
Definition: IfxAsclin_PinMap.h:80
IfxAsclin13_RXB_P00_11_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin13_RXB_P00_11_IN
Receive input.
Definition: IfxAsclin_PinMap.h:133
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:126
IfxAsclin6_TX_P23_5_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin6_TX_P23_5_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:355
IfxAsclin1_TX_P33_12_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P33_12_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:311
IfxAsclin11_RXB_P10_4_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin11_RXB_P10_4_IN
Receive input.
Definition: IfxAsclin_PinMap.h:125
IfxAsclin7_TX_P01_12_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin7_TX_P01_12_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:357
IfxAsclin23_TX_P10_7_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin23_TX_P10_7_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:319
IfxAsclin7_SLSO_P13_15_OUT
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin7_SLSO_P13_15_OUT
Slave select signal output.
Definition: IfxAsclin_PinMap.h:270
IfxAsclin0_RTS_P14_7_OUT
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin0_RTS_P14_7_OUT
Ready to send output.
Definition: IfxAsclin_PinMap.h:109
IfxAsclin2_CTSA_P10_7_IN
IFX_EXTERN IfxAsclin_Cts_In IfxAsclin2_CTSA_P10_7_IN
Clear to send input.
Definition: IfxAsclin_PinMap.h:106
IfxAsclin5_RXB_P33_4_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin5_RXB_P33_4_IN
Receive input.
Definition: IfxAsclin_PinMap.h:182
IfxAsclin13_RXA_P00_9_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin13_RXA_P00_9_IN
Receive input.
Definition: IfxAsclin_PinMap.h:132
IfxAsclin3_SCLK_P21_5_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_5_OUT
Shift clock output.
Definition: IfxAsclin_PinMap.h:228
IfxAsclin13_TX_P00_11_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin13_TX_P00_11_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:289
IfxAsclin16_TX_P23_6_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin16_TX_P23_6_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:294
IfxAsclin4_SLSO_P34_4_OUT
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin4_SLSO_P34_4_OUT
Slave select signal output.
Definition: IfxAsclin_PinMap.h:263
IfxAsclin8_RXC_P33_1_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin8_RXC_P33_1_IN
Receive input.
Definition: IfxAsclin_PinMap.h:199
IfxAsclin3_RXG_P21_2_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXG_P21_2_IN
Differential Receive input (low active)
Definition: IfxAsclin_PinMap.h:174
IfxAsclin2_RTS_P33_4_OUT
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin2_RTS_P33_4_OUT
Ready to send output.
Definition: IfxAsclin_PinMap.h:113
IfxAsclin6_SCLK_P02_14_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin6_SCLK_P02_14_OUT
Shift clock output.
Definition: IfxAsclin_PinMap.h:238
IfxAsclin22_RXA_P10_4_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin22_RXA_P10_4_IN
Receive input.
Definition: IfxAsclin_PinMap.h:157
IfxAsclin1_SLSO_P14_3_OUT
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin1_SLSO_P14_3_OUT
Slave select signal output.
Definition: IfxAsclin_PinMap.h:248
IfxAsclin8_TX_P33_7_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin8_TX_P33_7_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:364
IfxAsclin6_SCLK_P10_11_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin6_SCLK_P10_11_OUT
Shift clock output.
Definition: IfxAsclin_PinMap.h:239
IfxAsclin11_TX_P21_0_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin11_TX_P21_0_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:284
IfxAsclin5_SLSO_P14_8_OUT
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin5_SLSO_P14_8_OUT
Slave select signal output.
Definition: IfxAsclin_PinMap.h:264
IfxAsclin_Rx_In_pinTable
IFX_EXTERN const IfxAsclin_Rx_In * IfxAsclin_Rx_In_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS]
IfxAsclin_Rx_In table.
Definition: IfxAsclin_PinMap.h:387
IfxAsclin11_TX_P10_0_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin11_TX_P10_0_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:283
IfxAsclin4_SCLK_P34_3_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin4_SCLK_P34_3_OUT
Shift clock output.
Definition: IfxAsclin_PinMap.h:234
IfxAsclin7_RXD_P13_11_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin7_RXD_P13_11_IN
Receive input.
Definition: IfxAsclin_PinMap.h:194
IfxAsclin12_RXB_P00_5_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin12_RXB_P00_5_IN
Receive input.
Definition: IfxAsclin_PinMap.h:131
IfxAsclin0_RXB_P15_3_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin0_RXB_P15_3_IN
Receive input.
Definition: IfxAsclin_PinMap.h:116
IfxAsclin1_SLSO_P33_10_OUT
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin1_SLSO_P33_10_OUT
Slave select signal output.
Definition: IfxAsclin_PinMap.h:250
IfxAsclin_Cts_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxAsclin_PinMap.h:59
IfxAsclin_Slso_Out
SLSO pin mapping structure.
Definition: IfxAsclin_PinMap.h:88
IfxAsclin5_TX_P00_7_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin5_TX_P00_7_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:347
IfxAsclin23_TX_P10_8_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin23_TX_P10_8_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:320
IfxAsclin9_RXB_P01_7_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin9_RXB_P01_7_IN
Receive input.
Definition: IfxAsclin_PinMap.h:203
IfxAsclin17_RXA_P22_11_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin17_RXA_P22_11_IN
Receive input.
Definition: IfxAsclin_PinMap.h:140
IfxAsclin18_RXA_P21_1_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin18_RXA_P21_1_IN
Receive input.
Definition: IfxAsclin_PinMap.h:142
IfxAsclin6_SLSO_P02_12_OUT
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin6_SLSO_P02_12_OUT
Slave select signal output.
Definition: IfxAsclin_PinMap.h:266
IfxAsclin_Rts_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxAsclin_PinMap.h:76
IfxAsclin5_SCLK_P22_8_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin5_SCLK_P22_8_OUT
Shift clock output.
Definition: IfxAsclin_PinMap.h:236
IfxAsclin7_SCLK_P01_10_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin7_SCLK_P01_10_OUT
Shift clock output.
Definition: IfxAsclin_PinMap.h:241
IfxAsclin11_SLSO_P21_4_OUT
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin11_SLSO_P21_4_OUT
Slave select signal output.
Definition: IfxAsclin_PinMap.h:247
IfxAsclin1_TX_P14_10_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P14_10_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:304
IfxAsclin0_CTSA_P14_9_IN
IFX_EXTERN IfxAsclin_Cts_In IfxAsclin0_CTSA_P14_9_IN
Clear to send input.
Definition: IfxAsclin_PinMap.h:103
IfxAsclin3_TX_P22_0_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P22_0_OUT
Differential Transmit output (low active)
Definition: IfxAsclin_PinMap.h:339
IfxAsclin1_RTS_P23_1_OUT
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin1_RTS_P23_1_OUT
Ready to send output.
Definition: IfxAsclin_PinMap.h:111
IfxAsclin7_SLSO_P01_11_OUT
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin7_SLSO_P01_11_OUT
Slave select signal output.
Definition: IfxAsclin_PinMap.h:269
IfxAsclin0_RXD_P33_10_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin0_RXD_P33_10_IN
Receive input.
Definition: IfxAsclin_PinMap.h:118
IfxAsclin9_TX_P14_7_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin9_TX_P14_7_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:367
IfxAsclin0_TX_P01_13_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P01_13_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:274
IfxAsclin3_TX_P00_0_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P00_0_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:329
IfxAsclin4_SCLK_P22_7_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin4_SCLK_P22_7_OUT
Shift clock output.
Definition: IfxAsclin_PinMap.h:233
IfxAsclin3_SCLK_P32_3_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P32_3_OUT
Shift clock output.
Definition: IfxAsclin_PinMap.h:230
IfxAsclin21_TX_P13_2_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin21_TX_P13_2_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:315
IfxAsclin6_TX_P01_1_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin6_TX_P01_1_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:351
IfxAsclin10_SLSO_P13_3_OUT
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin10_SLSO_P13_3_OUT
Slave select signal output.
Definition: IfxAsclin_PinMap.h:246
IfxAsclin_Cts_In_pinTable
IFX_EXTERN const IfxAsclin_Cts_In * IfxAsclin_Cts_In_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS]
IfxAsclin_Cts_In table.
Definition: IfxAsclin_PinMap.h:381
IfxAsclin19_RXA_P15_6_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin19_RXA_P15_6_IN
Receive input.
Definition: IfxAsclin_PinMap.h:144
IfxAsclin6_TX_P10_10_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin6_TX_P10_10_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:353
IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS
#define IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS
Definition: IfxAsclin_PinMap.h:376
IfxAsclin1_TX_P15_5_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_5_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:309
IfxAsclin8_TX_P02_9_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin8_TX_P02_9_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:363
IfxAsclin3_SLSO_P12_1_OUT
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P12_1_OUT
Slave select signal output.
Definition: IfxAsclin_PinMap.h:255
IfxAsclin4_TX_P34_1_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin4_TX_P34_1_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:346
IfxAsclin10_SCLK_P13_2_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin10_SCLK_P13_2_OUT
Shift clock output.
Definition: IfxAsclin_PinMap.h:210
IfxAsclin2_SCLK_P33_7_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_7_OUT
Shift clock output.
Definition: IfxAsclin_PinMap.h:219
IfxAsclin2_SLSO_P02_3_OUT
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin2_SLSO_P02_3_OUT
Slave select signal output.
Definition: IfxAsclin_PinMap.h:251
IfxAsclin12_RXA_P00_3_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin12_RXA_P00_3_IN
Receive input.
Definition: IfxAsclin_PinMap.h:130
IfxAsclin_Cts_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxAsclin_PinMap.h:60
IfxAsclin2_TX_P32_5_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P32_5_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:326
IfxAsclin1_TX_P15_0_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_0_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:306
IfxAsclin1_CTSA_P20_7_IN
IFX_EXTERN IfxAsclin_Cts_In IfxAsclin1_CTSA_P20_7_IN
Clear to send input.
Definition: IfxAsclin_PinMap.h:104
IfxAsclin15_RXA_P32_4_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin15_RXA_P32_4_IN
Receive input.
Definition: IfxAsclin_PinMap.h:136
IfxAsclin20_RXA_P14_7_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin20_RXA_P14_7_IN
Receive input.
Definition: IfxAsclin_PinMap.h:153
IfxAsclin5_SLSO_P33_5_OUT
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin5_SLSO_P33_5_OUT
Slave select signal output.
Definition: IfxAsclin_PinMap.h:265
IfxAsclin5_RXD_P14_15_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin5_RXD_P14_15_IN
Receive input.
Definition: IfxAsclin_PinMap.h:184
IfxAsclin6_RXB_P01_0_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin6_RXB_P01_0_IN
Receive input.
Definition: IfxAsclin_PinMap.h:186
IfxAsclin1_TX_P02_2_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P02_2_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:302
IfxAsclin1_TX_P15_4_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_4_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:308
IfxAsclin10_RXC_P13_0_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin10_RXC_P13_0_IN
Receive input.
Definition: IfxAsclin_PinMap.h:122
IfxAsclin2_TX_P02_9_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P02_9_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:322
IfxAsclin9_SLSO_P01_4_OUT
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin9_SLSO_P01_4_OUT
Slave select signal output.
Definition: IfxAsclin_PinMap.h:273
IfxAsclin2_SCLK_P14_2_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P14_2_OUT
Shift clock output.
Definition: IfxAsclin_PinMap.h:218
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxAsclin5_TX_P14_14_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin5_TX_P14_14_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:348
IfxAsclin2_SLSO_P10_5_OUT
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin2_SLSO_P10_5_OUT
Slave select signal output.
Definition: IfxAsclin_PinMap.h:252
IfxAsclin3_RXB_P11_0_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXB_P11_0_IN
Receive input.
Definition: IfxAsclin_PinMap.h:169
IfxAsclin7_RXE_P22_1_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin7_RXE_P22_1_IN
Receive input.
Definition: IfxAsclin_PinMap.h:195
IfxAsclin_Sclk_Out_pinTable
IFX_EXTERN const IfxAsclin_Sclk_Out * IfxAsclin_Sclk_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS]
IfxAsclin_Sclk_Out table.
Definition: IfxAsclin_PinMap.h:390
IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS
#define IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS
Definition: IfxAsclin_PinMap.h:377
IfxAsclin11_RXA_P10_0_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin11_RXA_P10_0_IN
Receive input.
Definition: IfxAsclin_PinMap.h:124
IfxAsclin6_RXF_P23_1_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin6_RXF_P23_1_IN
Receive input.
Definition: IfxAsclin_PinMap.h:190
IfxAsclin7_RXA_P14_15_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin7_RXA_P14_15_IN
Receive input.
Definition: IfxAsclin_PinMap.h:191
IfxAsclin9_RXE_P20_6_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin9_RXE_P20_6_IN
Receive input.
Definition: IfxAsclin_PinMap.h:206
IfxAsclin_Rx_In
RX pin mapping structure.
Definition: IfxAsclin_PinMap.h:64
IfxAsclin2_TX_P33_9_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P33_9_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:328
IfxAsclin4_SCLK_P00_10_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin4_SCLK_P00_10_OUT
Shift clock output.
Definition: IfxAsclin_PinMap.h:232
IfxAsclin0_TX_P14_1_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P14_1_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:277
IfxAsclin22_RXB_P10_5_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin22_RXB_P10_5_IN
Receive input.
Definition: IfxAsclin_PinMap.h:158
IfxAsclin7_SCLK_P14_12_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin7_SCLK_P14_12_OUT
Shift clock output.
Definition: IfxAsclin_PinMap.h:243
IfxAsclin2_RXB_P02_1_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXB_P02_1_IN
Receive input.
Definition: IfxAsclin_PinMap.h:162
IfxAsclin11_TX_P21_5_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin11_TX_P21_5_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:285
IfxAsclin7_RXC_P23_2_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin7_RXC_P23_2_IN
Receive input.
Definition: IfxAsclin_PinMap.h:193
IfxAsclin6_RXD_P10_9_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin6_RXD_P10_9_IN
Receive input.
Definition: IfxAsclin_PinMap.h:188
IfxAsclin1_SCLK_P33_11_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_11_OUT
Shift clock output.
Definition: IfxAsclin_PinMap.h:214
IfxAsclin2_TX_P10_5_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P10_5_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:323
IfxAsclin2_TX_P14_2_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P14_2_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:324
IfxAsclin1_TX_P33_13_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P33_13_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:312
IfxAsclin6_SLSO_P10_13_OUT
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin6_SLSO_P10_13_OUT
Slave select signal output.
Definition: IfxAsclin_PinMap.h:267
IfxAsclin12_TX_P00_3_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin12_TX_P00_3_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:286
IfxAsclin14_TX_P33_3_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin14_TX_P33_3_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:291
IfxAsclin_Rts_Out
RTS pin mapping structure.
Definition: IfxAsclin_PinMap.h:72
IfxAsclin8_TX_P34_5_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin8_TX_P34_5_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:365
IfxAsclin2_SCLK_P02_4_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P02_4_OUT
Shift clock output.
Definition: IfxAsclin_PinMap.h:216
IfxAsclin3_SCLK_P20_0_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P20_0_OUT
Shift clock output.
Definition: IfxAsclin_PinMap.h:227
IfxAsclin9_RXF_P20_7_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin9_RXF_P20_7_IN
Receive input.
Definition: IfxAsclin_PinMap.h:207
IfxAsclin1_SCLK_P20_10_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P20_10_OUT
Shift clock output.
Definition: IfxAsclin_PinMap.h:213
IfxAsclin1_TX_P11_12_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P11_12_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:303
IfxAsclin3_SCLK_P33_2_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P33_2_OUT
Shift clock output.
Definition: IfxAsclin_PinMap.h:231
IfxAsclin_Cts_In::module
Ifx_ASCLIN * module
Base address.
Definition: IfxAsclin_PinMap.h:58
IfxAsclin2_TX_P33_8_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P33_8_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:327
IfxAsclin9_SCLK_P01_6_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin9_SCLK_P01_6_OUT
Shift clock output.
Definition: IfxAsclin_PinMap.h:245
IfxAsclin6_TX_P22_0_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin6_TX_P22_0_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:354
IfxAsclin_Tx_Out_pinTable
IFX_EXTERN const IfxAsclin_Tx_Out * IfxAsclin_Tx_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS]
IfxAsclin_Tx_Out table.
Definition: IfxAsclin_PinMap.h:396
IfxAsclin3_RXA_P15_7_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXA_P15_7_IN
Receive input.
Definition: IfxAsclin_PinMap.h:168
IfxAsclin13_TX_P00_10_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin13_TX_P00_10_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:288
IfxAsclin9_RXC_P14_7_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin9_RXC_P14_7_IN
Receive input.
Definition: IfxAsclin_PinMap.h:204
IfxAsclin0_TX_P13_10_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P13_10_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:275
IfxAsclin4_SLSO_P22_11_OUT
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin4_SLSO_P22_11_OUT
Slave select signal output.
Definition: IfxAsclin_PinMap.h:261
IfxAsclin3_SLSO_P21_2_OUT
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_2_OUT
Slave select signal output.
Definition: IfxAsclin_PinMap.h:257
IfxAsclin1_TX_P14_15_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P14_15_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:305
IfxAsclin1_RXD_P14_8_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXD_P14_8_IN
Receive input.
Definition: IfxAsclin_PinMap.h:149
IfxAsclin3_SCLK_P00_0_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_0_OUT
Shift clock output.
Definition: IfxAsclin_PinMap.h:221
IfxAsclin3_TX_P21_7_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P21_7_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:338
IfxAsclin3_SCLK_P15_6_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_6_OUT
Shift clock output.
Definition: IfxAsclin_PinMap.h:225
IfxAsclin0_RXA_P14_1_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin0_RXA_P14_1_IN
Receive input.
Definition: IfxAsclin_PinMap.h:115
IfxAsclin2_RXE_P33_8_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXE_P33_8_IN
Receive input.
Definition: IfxAsclin_PinMap.h:165
IfxAsclin16_RXB_P23_7_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin16_RXB_P23_7_IN
Receive input.
Definition: IfxAsclin_PinMap.h:139
IfxAsclin1_RXF_P33_13_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXF_P33_13_IN
Receive input.
Definition: IfxAsclin_PinMap.h:151
IfxAsclin2_SCLK_P10_6_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P10_6_OUT
Shift clock output.
Definition: IfxAsclin_PinMap.h:217
IfxAsclin7_TX_P01_9_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin7_TX_P01_9_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:358
IfxAsclin1_TX_P15_1_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_1_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:307
IfxAsclin3_TX_P20_0_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P20_0_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:336
IfxAsclin1_RXA_P15_1_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXA_P15_1_IN
Receive input.
Definition: IfxAsclin_PinMap.h:146
IfxAsclin9_TX_P01_7_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin9_TX_P01_7_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:366
IfxAsclin14_TX_P33_2_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin14_TX_P33_2_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:290
IfxAsclin1_RXB_P15_5_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXB_P15_5_IN
Receive input.
Definition: IfxAsclin_PinMap.h:147
IfxAsclin8_RXD_P33_6_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin8_RXD_P33_6_IN
Receive input.
Definition: IfxAsclin_PinMap.h:200
IfxAsclin4_RXC_P22_6_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin4_RXC_P22_6_IN
Receive input.
Definition: IfxAsclin_PinMap.h:179
IfxAsclin17_RXB_P21_0_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin17_RXB_P21_0_IN
Receive input.
Definition: IfxAsclin_PinMap.h:141
IfxAsclin1_SLSO_P20_8_OUT
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin1_SLSO_P20_8_OUT
Slave select signal output.
Definition: IfxAsclin_PinMap.h:249
IfxAsclin10_TX_P00_8_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin10_TX_P00_8_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:281
IFXASCLIN_PINMAP_NUM_MODULES
#define IFXASCLIN_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxAsclin_PinMap.h:371
IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS
#define IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS
Definition: IfxAsclin_PinMap.h:372
IfxAsclin20_TX_P14_8_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin20_TX_P14_8_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:314
IfxAsclin3_RXH_P13_12_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXH_P13_12_IN
Receive input.
Definition: IfxAsclin_PinMap.h:176
IfxAsclin3_CTSA_P00_12_IN
IFX_EXTERN IfxAsclin_Cts_In IfxAsclin3_CTSA_P00_12_IN
Clear to send input.
Definition: IfxAsclin_PinMap.h:108
IfxAsclin3_TX_P11_0_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P11_0_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:331
IfxAsclin0_TX_P15_2_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P15_2_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:278
IfxAsclin3_SLSO_P21_6_OUT
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_6_OUT
Slave select signal output.
Definition: IfxAsclin_PinMap.h:258
IfxAsclin6_RXA_P23_3_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin6_RXA_P23_3_IN
Receive input.
Definition: IfxAsclin_PinMap.h:185
IfxAsclin9_TX_P20_7_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin9_TX_P20_7_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:368
IfxAsclin18_TX_P21_3_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin18_TX_P21_3_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:298
IfxAsclin9_RXA_P01_5_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin9_RXA_P01_5_IN
Receive input.
Definition: IfxAsclin_PinMap.h:202
IfxAsclin3_RXF_P21_6_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXF_P21_6_IN
Receive input.
Definition: IfxAsclin_PinMap.h:173
IfxAsclin3_TX_P20_3_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P20_3_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:337
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:246
IfxAsclin22_TX_P10_0_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin22_TX_P10_0_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:317
IfxAsclin3_SCLK_P00_2_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_2_OUT
Shift clock output.
Definition: IfxAsclin_PinMap.h:222
IfxAsclin18_RXB_P21_4_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin18_RXB_P21_4_IN
Receive input.
Definition: IfxAsclin_PinMap.h:143
IfxAsclin12_TX_P01_6_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin12_TX_P01_6_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:287
IfxAsclin5_TX_P22_2_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin5_TX_P22_2_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:349
IfxAsclin6_RXE_P22_0_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin6_RXE_P22_0_IN
Receive input.
Definition: IfxAsclin_PinMap.h:189
IfxAsclin0_RXE_P13_11_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin0_RXE_P13_11_IN
Receive input.
Definition: IfxAsclin_PinMap.h:119
IfxAsclin1_RXE_P11_10_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXE_P11_10_IN
Receive input.
Definition: IfxAsclin_PinMap.h:150
IfxAsclin3_SCLK_P15_8_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_8_OUT
Shift clock output.
Definition: IfxAsclin_PinMap.h:226
IfxAsclin_Rts_Out_pinTable
IFX_EXTERN const IfxAsclin_Rts_Out * IfxAsclin_Rts_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS]
IfxAsclin_Rts_Out table.
Definition: IfxAsclin_PinMap.h:384
IfxAsclin17_TX_P22_11_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin17_TX_P22_11_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:296
IfxAsclin7_TX_P14_14_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin7_TX_P14_14_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:360
IfxAsclin6_TX_P32_7_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin6_TX_P32_7_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:356
Ifx_RxSel
Ifx_RxSel
input multiplexer definition used in PinMaps
Definition: Ifx_Types.h:127
IfxAsclin8_RXE_P34_5_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin8_RXE_P34_5_IN
Receive input.
Definition: IfxAsclin_PinMap.h:201
IfxAsclin5_SCLK_P14_12_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin5_SCLK_P14_12_OUT
Shift clock output.
Definition: IfxAsclin_PinMap.h:235
IfxAsclin15_TX_P32_7_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin15_TX_P32_7_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:292
IfxAsclin3_TX_P00_1_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P00_1_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:330
IfxAsclin7_SCLK_P13_13_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin7_SCLK_P13_13_OUT
Shift clock output.
Definition: IfxAsclin_PinMap.h:242
IfxAsclin2_TX_P02_0_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P02_0_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:321
IfxAsclin19_TX_P15_4_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin19_TX_P15_4_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:300
IfxAsclin11_RXF_P21_5_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin11_RXF_P21_5_IN
Receive input.
Definition: IfxAsclin_PinMap.h:129
IfxAsclin7_RXB_P01_8_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin7_RXB_P01_8_IN
Receive input.
Definition: IfxAsclin_PinMap.h:192
IfxAsclin2_SLSO_P33_6_OUT
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin2_SLSO_P33_6_OUT
Slave select signal output.
Definition: IfxAsclin_PinMap.h:253
IfxAsclin8_RXB_P02_10_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin8_RXB_P02_10_IN
Receive input.
Definition: IfxAsclin_PinMap.h:198
IfxAsclin8_RXA_P02_9_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin8_RXA_P02_9_IN
Receive input.
Definition: IfxAsclin_PinMap.h:197
IfxAsclin4_RXA_P00_12_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin4_RXA_P00_12_IN
Receive input.
Definition: IfxAsclin_PinMap.h:177
IfxAsclin1_RXC_P20_9_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXC_P20_9_IN
Receive input.
Definition: IfxAsclin_PinMap.h:148
IfxAsclin3_TX_P11_1_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P11_1_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:332
IfxAsclin20_RXB_P14_9_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin20_RXB_P14_9_IN
Receive input.
Definition: IfxAsclin_PinMap.h:154
IfxAsclin3_TX_P13_9_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P13_9_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:333
IfxAsclin_cfg.h
ASCLIN on-chip implementation data.
IfxAsclin9_RXD_P14_9_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin9_RXD_P14_9_IN
Receive input.
Definition: IfxAsclin_PinMap.h:205
IfxAsclin7_TX_P22_1_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin7_TX_P22_1_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:361
IfxAsclin11_RXC_P21_0_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin11_RXC_P21_0_IN
Receive input.
Definition: IfxAsclin_PinMap.h:126
IfxAsclin3_SLSO_P33_1_OUT
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P33_1_OUT
Slave select signal output.
Definition: IfxAsclin_PinMap.h:259
IfxAsclin11_RXE_P21_2_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin11_RXE_P21_2_IN
Receive input.
Definition: IfxAsclin_PinMap.h:128
IfxAsclin3_SLSO_P14_3_OUT
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P14_3_OUT
Slave select signal output.
Definition: IfxAsclin_PinMap.h:256
IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS
#define IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS
Definition: IfxAsclin_PinMap.h:375
IfxAsclin1_RTS_P20_6_OUT
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin1_RTS_P20_6_OUT
Ready to send output.
Definition: IfxAsclin_PinMap.h:110
IfxAsclin2_TX_P14_3_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P14_3_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:325
IfxAsclin7_TX_P13_12_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin7_TX_P13_12_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:359
IfxAsclin2_RTS_P10_8_OUT
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin2_RTS_P10_8_OUT
Ready to send output.
Definition: IfxAsclin_PinMap.h:112
IfxAsclin3_SCLK_P21_7_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_7_OUT
Shift clock output.
Definition: IfxAsclin_PinMap.h:229
IfxAsclin23_RXB_P10_7_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin23_RXB_P10_7_IN
Receive input.
Definition: IfxAsclin_PinMap.h:160
IfxAsclin6_SLSO_P23_4_OUT
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin6_SLSO_P23_4_OUT
Slave select signal output.
Definition: IfxAsclin_PinMap.h:268
IfxAsclin15_RXB_P32_7_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin15_RXB_P32_7_IN
Receive input.
Definition: IfxAsclin_PinMap.h:137
IfxAsclin3_SLSO_P00_3_OUT
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P00_3_OUT
Slave select signal output.
Definition: IfxAsclin_PinMap.h:254
IfxAsclin2_RXF_P32_6_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXF_P32_6_IN
Receive input.
Definition: IfxAsclin_PinMap.h:166
IfxAsclin3_RXD_P32_2_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXD_P32_2_IN
Receive input.
Definition: IfxAsclin_PinMap.h:171
IfxAsclin0_TX_P15_3_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P15_3_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:279
IfxAsclin2_SCLK_P33_9_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_9_OUT
Shift clock output.
Definition: IfxAsclin_PinMap.h:220
IfxAsclin20_TX_P14_7_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin20_TX_P14_7_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:313
IfxAsclin10_RXA_P00_4_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin10_RXA_P00_4_IN
Receive input.
Definition: IfxAsclin_PinMap.h:120
IfxAsclin6_SCLK_P23_1_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin6_SCLK_P23_1_OUT
Shift clock output.
Definition: IfxAsclin_PinMap.h:240
IfxAsclin7_RXF_P22_4_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin7_RXF_P22_4_IN
Receive input.
Definition: IfxAsclin_PinMap.h:196
IfxAsclin3_TX_P32_3_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P32_3_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:342
IfxAsclin2_RXD_P10_6_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXD_P10_6_IN
Receive input.
Definition: IfxAsclin_PinMap.h:164
IfxAsclin3_SCLK_P11_4_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P11_4_OUT
Shift clock output.
Definition: IfxAsclin_PinMap.h:224
IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS
#define IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS
Definition: IfxAsclin_PinMap.h:373
IfxAsclin4_TX_P22_5_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin4_TX_P22_5_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:345
IfxAsclin1_SCLK_P15_0_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P15_0_OUT
Shift clock output.
Definition: IfxAsclin_PinMap.h:212
IfxAsclin4_RXB_P34_2_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin4_RXB_P34_2_IN
Receive input.
Definition: IfxAsclin_PinMap.h:178
IfxAsclin19_RXB_P15_7_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin19_RXB_P15_7_IN
Receive input.
Definition: IfxAsclin_PinMap.h:145
IfxAsclin14_RXB_P33_4_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin14_RXB_P33_4_IN
Receive input.
Definition: IfxAsclin_PinMap.h:135
IfxAsclin22_TX_P10_4_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin22_TX_P10_4_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:318
IfxAsclin19_TX_P15_7_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin19_TX_P15_7_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:301
IfxAsclin6_TX_P02_15_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin6_TX_P02_15_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:352
IfxAsclin4_TX_P22_10_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin4_TX_P22_10_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:344
IfxAsclin3_RTS_P00_9_OUT
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin3_RTS_P00_9_OUT
Ready to send output.
Definition: IfxAsclin_PinMap.h:114
IfxAsclin0_TX_P33_9_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P33_9_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:280
IfxAsclin3_SCLK_P11_1_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P11_1_OUT
Shift clock output.
Definition: IfxAsclin_PinMap.h:223
IfxAsclin11_RXD_P21_1_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin11_RXD_P21_1_IN
Receive input.
Definition: IfxAsclin_PinMap.h:127
IfxAsclin3_RXG_P21_3_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXG_P21_3_IN
Differential Receive input (high active)
Definition: IfxAsclin_PinMap.h:175
IfxAsclin23_RXA_P10_6_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin23_RXA_P10_6_IN
Receive input.
Definition: IfxAsclin_PinMap.h:159
IfxAsclin4_RXD_P22_9_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin4_RXD_P22_9_IN
Receive input.
Definition: IfxAsclin_PinMap.h:180
IfxAsclin3_TX_P22_1_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P22_1_OUT
Differential Transmit output (high active)
Definition: IfxAsclin_PinMap.h:340
IfxAsclin21_RXA_P13_0_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin21_RXA_P13_0_IN
Receive input.
Definition: IfxAsclin_PinMap.h:155
IfxAsclin16_TX_P23_7_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin16_TX_P23_7_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:295
IfxAsclin8_SLSO_P02_11_OUT
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin8_SLSO_P02_11_OUT
Slave select signal output.
Definition: IfxAsclin_PinMap.h:272
IfxAsclin4_TX_P00_9_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin4_TX_P00_9_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:343
IfxAsclin0_TX_P14_0_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P14_0_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:276
IfxAsclin16_RXA_P23_5_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin16_RXA_P23_5_IN
Receive input.
Definition: IfxAsclin_PinMap.h:138
IfxAsclin1_SCLK_P33_12_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_12_OUT
Shift clock output.
Definition: IfxAsclin_PinMap.h:215
IfxAsclin1_RXG_P02_3_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXG_P02_3_IN
Receive input.
Definition: IfxAsclin_PinMap.h:152
IfxAsclin1_TX_P20_10_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P20_10_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:310
IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS
#define IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS
Definition: IfxAsclin_PinMap.h:374
IfxAsclin11_SCLK_P21_3_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin11_SCLK_P21_3_OUT
Shift clock output.
Definition: IfxAsclin_PinMap.h:211
IfxAsclin18_TX_P21_4_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin18_TX_P21_4_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:299
IfxPort.h
PORT basic functionality.
IfxAsclin_Slso_Out_pinTable
IFX_EXTERN const IfxAsclin_Slso_Out * IfxAsclin_Slso_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS]
IfxAsclin_Slso_Out table.
Definition: IfxAsclin_PinMap.h:393
IfxAsclin2_RXG_P02_0_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXG_P02_0_IN
Receive input.
Definition: IfxAsclin_PinMap.h:167
IfxAsclin10_TX_P13_0_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin10_TX_P13_0_OUT
Transmit output.
Definition: IfxAsclin_PinMap.h:282


iLLD_TC38A: IfxAsclin_Spi.c Source File

  • Asclin
  • Spi
IfxAsclin_Spi.c
Go to the documentation of this file.
1 /**
2 * \file IfxAsclin_Spi.c
3 * \brief ASCLIN SPI details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 */
43
44 /******************************************************************************/
45 /*----------------------------------Includes----------------------------------*/
46 /******************************************************************************/
47
48 #include "IfxAsclin_Spi.h"
49
50 /******************************************************************************/
51 /*-----------------------Private Function Prototypes--------------------------*/
52 /******************************************************************************/
53
54 /**
55 * \param asclin module handle
56 * \return status of the on going job
57 */
58 IFX_STATIC IfxAsclin_Spi_Status IfxAsclin_Spi_lock(IfxAsclin_Spi *asclin);
59
60 /**
61 * \param asclin module handle
62 * \return None
63 */
64 IFX_STATIC void IfxAsclin_Spi_unlock(IfxAsclin_Spi *asclin);
65
66 /******************************************************************************/
67 /*-------------------------Function Implementations---------------------------*/
68 /******************************************************************************/
69
70 void IfxAsclin_Spi_disableModule(IfxAsclin_Spi *asclin)
71 {
72 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler */
73 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
74 IfxScuWdt_clearCpuEndinit(psw); /* clearing the endinit protection*/
75 IfxAsclin_setDisableModuleRequest(asclinSFR); /* disabling the module */
76 IfxScuWdt_setCpuEndinit(psw); /* setting the endinit protection back on */
77 }
78
79
80 IfxAsclin_Spi_Status IfxAsclin_Spi_exchange(IfxAsclin_Spi *asclin, void *src, void *dest, uint32 count)
81 {
82 IfxAsclin_Spi_Status status = IfxAsclin_Spi_lock(asclin); /* lock the driver until the communication is done */
83
84 if (status == IfxAsclin_Spi_Status_ok)
85 {
86 asclin->transferInProgress = 1; /* setting transfer in progress status */
87 asclin->txJob.data = src; /* data to be transmitted */
88 asclin->txJob.pending = count; /* count of Tx data */
89 asclin->rxJob.data = dest; /* empty buffer to receive data */
90 asclin->rxJob.pending = count; /* count of Rx data */
91
92 IfxAsclin_Spi_write(asclin); /* write data into Tx fifo */
93 }
94
95 return status;
96 }
97
98
99 IfxAsclin_Spi_Status IfxAsclin_Spi_getStatus(IfxAsclin_Spi *asclin)
100 {
101 IfxAsclin_Spi_Status status = IfxAsclin_Spi_Status_ok;
102
103 if ((asclin->transferInProgress != 0) || (asclin->sending != 0))
104 {
105 status = IfxAsclin_Spi_Status_busy;
106 }
107
108 return status;
109 }
110
111
112 IfxAsclin_Status IfxAsclin_Spi_initModule(IfxAsclin_Spi *asclin, const IfxAsclin_Spi_Config *config)
113 {
114 Ifx_ASCLIN *asclinSFR = config->asclin; /* pointer to ASCLIN registers */
115 IfxAsclin_Status status = IfxAsclin_Status_noError;
116
117 asclin->asclin = asclinSFR; /* adding register pointer to module handler*/
118 IfxAsclin_enableModule(asclinSFR); /* enabling the module */
119
120 /* mode initialisation */
121 IfxAsclin_setClockSource(asclinSFR, IfxAsclin_ClockSource_noClock); /* disabling the clock */
122 IfxAsclin_setFrameMode(asclinSFR, IfxAsclin_FrameMode_initialise); /* setting the module in Initialise mode */
123 IfxAsclin_setClockSource(asclinSFR, config->clockSource); /* setting the clock source */
124
125 /* spi mode initialisation */
126 IfxAsclin_setClockSource(asclinSFR, IfxAsclin_ClockSource_noClock); /* disabling the clock */
127 IfxAsclin_setFrameMode(asclinSFR, config->frameMode); /* setting the module in Spi mode */
128 IfxAsclin_setPrescaler(asclinSFR, config->baudrate.prescaler); /* setting the prescaler*/
129 IfxAsclin_setClockSource(asclinSFR, config->clockSource); /* setting the clock source */
130
131 IfxAsclin_SamplePointPosition samplePointPosition = (IfxAsclin_SamplePointPosition)((config->baudrate.oversampling + 1) / 2); /* sample point position at half of oversampling factor */
132
133 /* baudrate generation */
134 status = (IfxAsclin_Status)IfxAsclin_setBitTiming(asclinSFR, config->baudrate.baudrate,
135 config->baudrate.oversampling,
136 samplePointPosition,
137 config->bitSampling.medianFilter); /* setting the baudrate bit fields to generate the required baudrate */
138
139 IfxAsclin_setClockSource(asclinSFR, IfxAsclin_ClockSource_noClock); /* disabling the clock again */
140
141 /* input output control initialisation */
142 IfxAsclin_setRxInput(asclinSFR, config->inputOutput.alti); /* selecting the Rx(alternate) input pin */
143 IfxAsclin_setClockPolarity(asclinSFR, config->inputOutput.cpol); /* setting the clock polarity */
144 IfxAsclin_setSlavePolarity(asclinSFR, config->inputOutput.spol); /* setting the slave polarity */
145 IfxAsclin_enableLoopBackMode(asclinSFR, config->inputOutput.loopBack); /* selecting loopbak (enable/disable) */
146
147 /* frame control initialisation */
148 IfxAsclin_setIdleDelay(asclinSFR, config->frame.idleDelay); /* setting idle delay */
149 IfxAsclin_setLeadDelay(asclinSFR, config->frame.leadDelay); /* setting lead delay */
150 IfxAsclin_setStopBit(asclinSFR, config->frame.stopBit); /* setting the stop bit (trail delay) */
151 IfxAsclin_setShiftDirection(asclinSFR, config->frame.shiftDir); /* setting the shift direction */
152
153 /* data control initialisation */
154 IfxAsclin_setDataLength(asclinSFR, config->dataLength); /* setting the number of bytes to be transfered */
155
156 /* fifo control initialisation */
157 /* set the FIFO widths based on the supplied datalength */
158 if (config->dataLength <= 8)
159 {
160 IfxAsclin_setTxFifoInletWidth(asclinSFR, IfxAsclin_TxFifoInletWidth_1); /* setting Tx FIFO inlet width to 1 byte */
161 IfxAsclin_setRxFifoOutletWidth(asclinSFR, IfxAsclin_RxFifoOutletWidth_1); /* setting Rx FIFO outlet width to 1 byte */
162 asclin->dataWidth = 1; /* echo the data width to module handle*/
163 }
164
165 else
166 {
167 IfxAsclin_setTxFifoInletWidth(asclinSFR, IfxAsclin_TxFifoInletWidth_2); /* setting Tx FIFO inlet width to 2 bytes */
168 IfxAsclin_setRxFifoOutletWidth(asclinSFR, IfxAsclin_RxFifoOutletWidth_2); /* setting Rx FIFO outlet width to 2 bytes */
169 asclin->dataWidth = 2; /* echo the data width to module handle*/
170 }
171
172 IfxAsclin_setRxBufferMode(asclinSFR, config->fifo.buffMode); /* setting Rx FIFO mode */
173 IfxAsclin_setTxFifoInterruptLevel(asclinSFR, config->fifo.txFifoInterruptLevel); /* setting Tx FIFO level at which a Tx interrupt will be triggered */
174 IfxAsclin_setRxFifoInterruptLevel(asclinSFR, config->fifo.rxFifoInterruptLevel); /* setting Rx FIFO interrupt level at which a Rx interrupt will be triggered */
175 IfxAsclin_setTxFifoInterruptMode(asclinSFR, config->fifo.txFifoInterruptMode); /* setting Tx FIFO interrupt generation mode */
176 IfxAsclin_setRxFifoInterruptMode(asclinSFR, config->fifo.rxFifoInterruptMode); /* setting Rx FIFO interrupt generation mode */
177 IfxAsclin_flushRxFifo(asclinSFR); /* flushing Rx FIFO */
178 IfxAsclin_flushTxFifo(asclinSFR); /* flushing Tx FIFO */
179
180 IfxAsclin_disableAllFlags(asclinSFR); /* disable all flags */
181 IfxAsclin_clearAllFlags(asclinSFR); /* clear all flags */
182
183 /* initialising the interrupts */
184 IfxSrc_Tos tos = config->interrupt.typeOfService;
185
186 if ((config->interrupt.rxPriority > 0) || (tos == IfxSrc_Tos_dma))
187 {
188 volatile Ifx_SRC_SRCR *src;
189 src = IfxAsclin_getSrcPointerRx(asclinSFR);
190 IfxSrc_init(src, tos, config->interrupt.rxPriority);
191 IfxAsclin_enableRxFifoFillLevelFlag(asclinSFR, TRUE);
192 IfxSrc_enable(src);
193 }
194
195 if ((config->interrupt.txPriority > 0) || (tos == IfxSrc_Tos_dma))
196 {
197 volatile Ifx_SRC_SRCR *src;
198 src = IfxAsclin_getSrcPointerTx(asclinSFR);
199 IfxSrc_init(src, tos, config->interrupt.txPriority);
200 IfxAsclin_enableTxFifoFillLevelFlag(asclinSFR, TRUE);
201 IfxSrc_enable(src);
202 }
203
204 if (config->interrupt.erPriority > 0) /*These interrupts are not serviced by dma*/
205 {
206 volatile Ifx_SRC_SRCR *src;
207 src = IfxAsclin_getSrcPointerEr(asclinSFR);
208 IfxSrc_init(src, tos, config->interrupt.erPriority);
209 IfxAsclin_enableFrameErrorFlag(asclinSFR, TRUE);
210 IfxSrc_enable(src);
211 }
212
213 /* Pin mapping */
214 const IfxAsclin_Spi_Pins *pins = config->pins;
215
216 if (pins != NULL_PTR)
217 {
218 IfxAsclin_Sclk_Out *sclk = pins->sclk;
219
220 if (sclk != NULL_PTR)
221 {
222 IfxAsclin_initSclkPin(sclk, pins->sclkMode, pins->pinDriver);
223 }
224
225 IfxAsclin_Rx_In *rx = pins->rx;
226
227 if (rx != NULL_PTR)
228 {
229 IfxAsclin_initRxPin(rx, pins->rxMode, pins->pinDriver);
230 }
231
232 IfxAsclin_Tx_Out *tx = pins->tx;
233
234 if (tx != NULL_PTR)
235 {
236 IfxAsclin_initTxPin(tx, pins->txMode, pins->pinDriver);
237 }
238
239 IfxAsclin_Slso_Out *slso = pins->slso;
240
241 if (slso != NULL_PTR)
242 {
243 IfxAsclin_initSlsoPin(slso, pins->slsoMode, pins->pinDriver);
244 }
245 }
246
247 IfxAsclin_enableParity(asclinSFR, FALSE); /* no parity */
248
249 IfxAsclin_setClockSource(asclinSFR, config->clockSource); /* setting the clock source*/
250
251 asclin->sending = 0;
252 IfxAsclin_enableTxFifoOutlet(asclinSFR, TRUE); /* disabling Rx FIFO for recieving */
253 IfxAsclin_enableRxFifoInlet(asclinSFR, TRUE); /* disabling Tx FIFO for transmitting */
254
255 return status;
256 }
257
258
259 void IfxAsclin_Spi_initModuleConfig(IfxAsclin_Spi_Config *config, Ifx_ASCLIN *asclin)
260 {
261 const IfxAsclin_Spi_Config defaultConfig = {
262 .asclin = NULL_PTR, /* will be initialized below */
263
264 .frameMode = IfxAsclin_FrameMode_spi, /* SPI mode */
265 .clockSource = IfxAsclin_ClockSource_ascFastClock, /* Asclin fast clock, fasclinf*/
266
267 /* Default values for input output control */
268 .inputOutput = {
269 .alti = IfxAsclin_RxInputSelect_0, /* alternate input 0; */
270 .cpol = IfxAsclin_ClockPolarity_idleLow, /* CPOL active low */
271 .spol = IfxAsclin_SlavePolarity_idlehigh, /* SPOL active high */
272 .loopBack = FALSE, /* no loop back */
273 },
274
275 /* Default values for baudrate */
276 .baudrate = {
277 .baudrate = 100000.0, /* default baudrate (the fractional dividier setup will be calculated in initModule) */
278 .prescaler = 2, /* default prescaler */
279 .oversampling = IfxAsclin_OversamplingFactor_8, /* default oversampling factor */
280 },
281
282 /* Default Values for Bit sampling */
283 .bitSampling = {
284 .medianFilter = IfxAsclin_SamplesPerBit_one, /* one sample per bit */
285 },
286
287 /* Default Values for Frame Control */
288 .frame = {
289 .idleDelay = IfxAsclin_IdleDelay_0, /* no idle delay */
290 .leadDelay = IfxAsclin_LeadDelay_1, /* one lead bit */
291 .stopBit = IfxAsclin_StopBit_1, /* one stop bit (trail delay) */
292 .shiftDir = IfxAsclin_ShiftDirection_lsbFirst, /* shift direction LSB first */
293 },
294
295 /* Default Values for Data Control*/
296 .dataLength = IfxAsclin_DataLength_8, /* number of bits per transfer 8*/
297
298 /* Default Values for fifo Control */
299 .fifo = {
300 .outWidth = IfxAsclin_RxFifoOutletWidth_1, /* 8-bit wide read */
301 .inWidth = IfxAsclin_TxFifoInletWidth_1, /*8-bit wide write */
302 .buffMode = IfxAsclin_ReceiveBufferMode_rxFifo, /* RxFIFO */
303 .txFifoInterruptLevel = IfxAsclin_TxFifoInterruptLevel_15, /* Tx FIFO interrupt level */
304 .rxFifoInterruptLevel = IfxAsclin_RxFifoInterruptLevel_1, /* Rx FIFO interrupt level */
305 .txFifoInterruptMode = IfxAsclin_FifoInterruptMode_combined, /* Tx FIFO interrupt generation mode */
306 .rxFifoInterruptMode = IfxAsclin_FifoInterruptMode_combined, /* Rx FIFO interrupt generation mode */
307 },
308
309 /* Default Values for Interrupt Config */
310 .interrupt = {
311 .rxPriority = 0, /* receive interrupt priority 0 */
312 .txPriority = 0, /* transmit interrupt priority 0 */
313 .erPriority = 0, /* error interrupt priority 0 */
314 .typeOfService = IfxSrc_Tos_cpu0, /* type of service CPU0 */
315 },
316
317 .pins = NULL_PTR, /* pins to null pointer */
318 };
319
320 /* Default Configuration */
321 *config = defaultConfig;
322 /* take over module pointer */
323 config->asclin = asclin;
324 }
325
326
327 void IfxAsclin_Spi_isrError(IfxAsclin_Spi *asclin)
328 {
329 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler */
330
331 /* store all the flags in the variable */
332 if (IfxAsclin_getFrameErrorFlagStatus(asclinSFR))
333 {
334 IfxAsclin_clearFrameErrorFlag(asclinSFR);
335 asclin->errorFlags.frameError = 1;
336 }
337
338 if (IfxAsclin_getRxFifoOverflowFlagStatus(asclinSFR))
339 {
340 IfxAsclin_clearRxFifoOverflowFlag(asclinSFR);
341 asclin->errorFlags.rxFifoOverflow = 1;
342 }
343
344 if (IfxAsclin_getRxFifoUnderflowFlagStatus(asclinSFR))
345 {
346 IfxAsclin_clearRxFifoUnderflowFlag(asclinSFR);
347 asclin->errorFlags.rxFifoUnderflow = 1;
348 }
349
350 if (IfxAsclin_getTxFifoOverflowFlagStatus(asclinSFR))
351 {
352 IfxAsclin_clearTxFifoOverflowFlag(asclinSFR);
353 asclin->errorFlags.txFifoOverflow = 1;
354 }
355 }
356
357
358 void IfxAsclin_Spi_isrReceive(IfxAsclin_Spi *asclin)
359 {
360 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
361 IfxAsclin_clearRxFifoFillLevelFlag(asclinSFR); /* clear the interrupt flag */
362 IfxAsclin_Spi_read(asclin); /* read the remaining data */
363 }
364
365
366 void IfxAsclin_Spi_isrTransmit(IfxAsclin_Spi *asclin)
367 {
368 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler */
369 IfxAsclin_clearTxFifoFillLevelFlag(asclinSFR); /* clear the interrupt flag */
370 IfxAsclin_Spi_write(asclin); /* write the remaining data */
371 }
372
373
374 IFX_STATIC IfxAsclin_Spi_Status IfxAsclin_Spi_lock(IfxAsclin_Spi *asclin)
375 {
376 sint32 sending = __swap((void *)&asclin->sending, 1UL);
377 return (sending == 0) ? IfxAsclin_Spi_Status_ok : IfxAsclin_Spi_Status_busy;
378 }
379
380
381 void IfxAsclin_Spi_read(IfxAsclin_Spi *asclin)
382 {
383 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler */
384 IfxAsclin_Spi_Job *job = &asclin->rxJob; /* getting the rxJob structure from module handler */
385
386 uint32 count = (uint32)IfxAsclin_getRxFifoFillLevel(asclinSFR); /* get the readable count of Rx fifo */
387 count = __min(job->pending, count); /* check for the end of the data */
388
389 if (job->data == NULL_PTR) /* incase of no data to be received (only transmit case) */
390 {
391 uint32 i;
392 job->pending = job->pending - count; /* discount the current reading count from job pending */
393
394 for (i = 0; i < count; i++)
395 {
396 IfxAsclin_readRxData(asclinSFR); /* do dummy reads */
397 }
398 }
399 else if (job->pending > 0)
400 {
401 job->pending = job->pending - count; /* discount the current reading count from job pending */
402
403 /* read data up to the count based on the out width */
404 switch (asclin->dataWidth)
405 {
406 case 1: /* in case of 8 bit wide */
407 IfxAsclin_read8(asclinSFR, job->data, count); /* reading from Rx FIFO */
408 job->data = &(((uint8 *)job->data)[count]); /* pointing to the remaining data */
409 break;
410
411 case 2: /* in case of 16 bit wide*/
412 IfxAsclin_read16(asclinSFR, job->data, count); /* reading from Rx FIFO */
413 job->data = &(((uint16 *)job->data)[count]); /* pointing to the remaining data */
414 break;
415 }
416 }
417
418 if (job->pending == 0)
419 {
420 asclin->transferInProgress = 0; /* clearing the transfer in progress status */
421 IfxAsclin_Spi_unlock(asclin); /* unlock the driver */
422 }
423 }
424
425
426 IFX_STATIC void IfxAsclin_Spi_unlock(IfxAsclin_Spi *asclin)
427 {
428 asclin->sending = 0UL;
429 }
430
431
432 void IfxAsclin_Spi_write(IfxAsclin_Spi *asclin)
433 {
434 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler */
435 IfxAsclin_Spi_Job *job = &asclin->txJob; /* getting the txJob structure from module handler */
436
437 if (job->pending)
438 {
439 boolean interruptState = IfxCpu_disableInterrupts();
440
441 uint32 count = (uint32)(16 - IfxAsclin_getTxFifoFillLevel(asclinSFR)); /* getting the fillable count of the Tx Fifo */
442 count = __min(job->pending, count); /* checking for the end of the data */
443
444 if (job->data == NULL_PTR) /* incase of no data to be transmitted (only receive case) */
445 {
446 uint32 i;
447 job->pending = job->pending - count; /* discount the current filling count from job pending */
448
449 for (i = 0; i < count; i++)
450 {
451 IfxAsclin_writeTxData(asclinSFR, ~0); /* write all 1's */
452 }
453 }
454 else
455 {
456 job->pending = job->pending - count; /* discount the current filling count from job pending */
457
458 /* write data up to the count based on the in width */
459 switch (asclin->dataWidth)
460 {
461 case 1: /* in case of 8 bit wide */
462 IfxAsclin_write8(asclinSFR, job->data, count); /* writing to Tx FIFO */
463 job->data = &(((uint8 *)job->data)[count]); /* pointing to the remaining data */
464 break;
465
466 case 2: /* in case of 16 bit wide*/
467 IfxAsclin_write16(asclinSFR, job->data, count); /* writing to Tx FIFO */
468 job->data = &(((uint16 *)job->data)[count]); /* pointing to the remaining data */
469 break;
470 }
471 }
472
473 IfxCpu_restoreInterrupts(interruptState);
474 }
475 }
IfxAsclin_Spi_FrameControl::idleDelay
IfxAsclin_IdleDelay idleDelay
FRAMECON.IDLE, idle delay.
Definition: IfxAsclin_Spi.h:287
IfxAsclin_TxFifoInterruptLevel_15
TX FIFO level 15.
Definition: IfxAsclin.h:450
IfxAsclin_Spi_Pins::sclkMode
IfxPort_OutputMode sclkMode
sclk as output
Definition: IfxAsclin_Spi.h:326
IfxAsclin_Tx_Out
TX pin mapping structure.
Definition: IfxAsclin_PinMap.h:96
IfxAsclin_ClockPolarity_idleLow
idle low
Definition: IfxAsclin.h:102
IfxAsclin_Spi_exchange
IfxAsclin_Spi_Status IfxAsclin_Spi_exchange(IfxAsclin_Spi *asclin, void *src, void *dest, uint32 count)
starts the data exchange
Definition: IfxAsclin_Spi.c:80
IfxAsclin_IdleDelay_0
idle delay in 0 bit times
Definition: IfxAsclin.h:187
IfxAsclin_Spi_BitSamplingControl::medianFilter
IfxAsclin_SamplesPerBit medianFilter
BITCON.SM, no. of samples per bit 1 or 3.
Definition: IfxAsclin_Spi.h:257
IfxAsclin_Spi_Status
IfxAsclin_Spi_Status
Enumeration for job status.
Definition: IfxAsclin_Spi.h:231
IfxAsclin_Spi_isrReceive
void IfxAsclin_Spi_isrReceive(IfxAsclin_Spi *asclin)
ISR receive routine.
Definition: IfxAsclin_Spi.c:358
IfxAsclin_Spi_Pins::sclk
IFX_CONST IfxAsclin_Sclk_Out * sclk
SPI clock select pin.
Definition: IfxAsclin_Spi.h:325
IfxAsclin_setIdleDelay
IFX_INLINE void IfxAsclin_setIdleDelay(Ifx_ASCLIN *asclin, IfxAsclin_IdleDelay delay)
Sets the idle delay.
Definition: IfxAsclin.h:2285
IfxAsclin_ReceiveBufferMode_rxFifo
RxFIFO mode.
Definition: IfxAsclin.h:265
IfxAsclin_Spi_Job
Structure for data transfer jobs.
Definition: IfxAsclin_Spi.h:315
IfxAsclin_initSlsoPin
IFX_INLINE void IfxAsclin_initSlsoPin(const IfxAsclin_Slso_Out *slso, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a SLSO output.
Definition: IfxAsclin.h:2175
IfxAsclin_ShiftDirection_lsbFirst
LSB first.
Definition: IfxAsclin.h:364
IfxAsclin_Spi_FrameControl::stopBit
IfxAsclin_StopBit stopBit
FRAMECON.STOP, number of stop bits.
Definition: IfxAsclin_Spi.h:288
IfxAsclin_Spi_InputOutputControl::cpol
IfxAsclin_ClockPolarity cpol
IOCR.CPOL clock polarity selection.
Definition: IfxAsclin_Spi.h:298
IfxAsclin_getSrcPointerEr
volatile Ifx_SRC_SRCR * IfxAsclin_getSrcPointerEr(Ifx_ASCLIN *asclin)
Returns the SRC pointer for ERR.
Definition: IfxAsclin.c:159
IfxAsclin_Sclk_Out
SCLK pin mapping structure.
Definition: IfxAsclin_PinMap.h:80
IfxAsclin_Spi_Job::data
void * data
pointer to user data
Definition: IfxAsclin_Spi.h:317
IfxAsclin_getRxFifoUnderflowFlagStatus
IFX_INLINE boolean IfxAsclin_getRxFifoUnderflowFlagStatus(Ifx_ASCLIN *asclin)
Returns the Rx FIFO underflow flag status.
Definition: IfxAsclin.h:2072
IfxAsclin_Spi
Module handle.
Definition: IfxAsclin_Spi.h:342
IfxAsclin_clearTxFifoFillLevelFlag
IFX_INLINE void IfxAsclin_clearTxFifoFillLevelFlag(Ifx_ASCLIN *asclin)
Clears the Tx FIFO level flag.
Definition: IfxAsclin.h:1730
IfxAsclin_Spi_Pins::txMode
IfxPort_OutputMode txMode
tx as output
Definition: IfxAsclin_Spi.h:330
IfxAsclin_Spi_InputOutputControl::loopBack
boolean loopBack
IOCR.LB, loop back mode selection, 0 for disable, 1 for enable.
Definition: IfxAsclin_Spi.h:300
IfxAsclin_getTxFifoOverflowFlagStatus
IFX_INLINE boolean IfxAsclin_getTxFifoOverflowFlagStatus(Ifx_ASCLIN *asclin)
Returns the Tx FIFO overflow flag status.
Definition: IfxAsclin.h:2120
IfxAsclin_ClockSource_ascFastClock
f asclinf wiil be supplied
Definition: IfxAsclin.h:112
IfxAsclin_enableModule
void IfxAsclin_enableModule(Ifx_ASCLIN *asclin)
Enables the module.
Definition: IfxAsclin.c:70
IfxAsclin_Spi_FifoControl::txFifoInterruptMode
IfxAsclin_FifoInterruptMode txFifoInterruptMode
TXFIFOCON.FM, Tx FIFO interrupt generation mode.
Definition: IfxAsclin_Spi.h:279
IfxAsclin_Spi::txJob
IfxAsclin_Spi_Job txJob
structure for Tx job
Definition: IfxAsclin_Spi.h:345
IfxAsclin_flushTxFifo
IFX_INLINE void IfxAsclin_flushTxFifo(Ifx_ASCLIN *asclin)
Flushes (empties) the Tx FIFO.
Definition: IfxAsclin.h:1940
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxAsclin_Spi_Config::baudrate
IfxAsclin_Spi_Baudrate baudrate
structure for baudrate
Definition: IfxAsclin_Spi.h:360
IfxAsclin_Spi_Config::frame
IfxAsclin_Spi_FrameControl frame
structure for frame control
Definition: IfxAsclin_Spi.h:362
IfxAsclin_RxFifoInterruptLevel_1
RX FIFO level 1.
Definition: IfxAsclin.h:283
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
IfxAsclin_Slso_Out
SLSO pin mapping structure.
Definition: IfxAsclin_PinMap.h:88
IfxAsclin_setRxFifoInterruptMode
IFX_INLINE void IfxAsclin_setRxFifoInterruptMode(Ifx_ASCLIN *asclin, IfxAsclin_FifoInterruptMode mode)
Selects the Rx FIFO interupt generation mode.
Definition: IfxAsclin.h:2381
IfxAsclin_initRxPin
IFX_INLINE void IfxAsclin_initRxPin(const IfxAsclin_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a RX input.
Definition: IfxAsclin.h:2157
IfxAsclin_Spi_Status_ok
Definition: IfxAsclin_Spi.h:233
IfxAsclin_Spi_unlock
IFX_STATIC void IfxAsclin_Spi_unlock(IfxAsclin_Spi *asclin)
Definition: IfxAsclin_Spi.c:426
IfxAsclin_clearAllFlags
IFX_INLINE void IfxAsclin_clearAllFlags(Ifx_ASCLIN *asclin)
clears all the flags
Definition: IfxAsclin.h:1616
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxAsclin_Spi_Baudrate::baudrate
float32 baudrate
value of the required baudrate
Definition: IfxAsclin_Spi.h:248
IfxAsclin_Spi_Pins::tx
IFX_CONST IfxAsclin_Tx_Out * tx
SPI Tx pin.
Definition: IfxAsclin_Spi.h:329
IfxAsclin_Spi_Pins
Structure for SPI pin configuration.
Definition: IfxAsclin_Spi.h:323
IfxAsclin_Spi_Pins::pinDriver
IfxPort_PadDriver pinDriver
pad driver
Definition: IfxAsclin_Spi.h:333
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxAsclin_Spi_ErrorFlags::rxFifoOverflow
uint8 rxFifoOverflow
receive FIFO overflow error
Definition: IfxAsclin_Spi.h:265
IfxAsclin_clearRxFifoFillLevelFlag
IFX_INLINE void IfxAsclin_clearRxFifoFillLevelFlag(Ifx_ASCLIN *asclin)
Clears the Rx FIFO level flag.
Definition: IfxAsclin.h:1694
IfxCpu_restoreInterrupts
IFX_INLINE void IfxCpu_restoreInterrupts(boolean enabled)
API to restore global interrupt with that of the passed parameter.
Definition: IfxCpu.h:1026
IfxAsclin_Spi_disableModule
void IfxAsclin_Spi_disableModule(IfxAsclin_Spi *asclin)
Disables the module.
Definition: IfxAsclin_Spi.c:70
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxAsclin_Spi_isrError
void IfxAsclin_Spi_isrError(IfxAsclin_Spi *asclin)
ISR error routine.
Definition: IfxAsclin_Spi.c:327
IfxAsclin_clearRxFifoUnderflowFlag
IFX_INLINE void IfxAsclin_clearRxFifoUnderflowFlag(Ifx_ASCLIN *asclin)
Clears the Rx FIFO underflow flag.
Definition: IfxAsclin.h:1706
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxAsclin_Spi_Baudrate::oversampling
IfxAsclin_OversamplingFactor oversampling
BITCON.OVERSAMPLING, postdivider, used for oversampling.
Definition: IfxAsclin_Spi.h:250
IfxAsclin_enableRxFifoFillLevelFlag
IFX_INLINE void IfxAsclin_enableRxFifoFillLevelFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Rx FIFO level flag.
Definition: IfxAsclin.h:1862
IfxAsclin_setBitTiming
boolean IfxAsclin_setBitTiming(Ifx_ASCLIN *asclin, float32 baudrate, IfxAsclin_OversamplingFactor oversampling, IfxAsclin_SamplePointPosition samplepoint, IfxAsclin_SamplesPerBit medianFilter)
Set the bit timing.
Definition: IfxAsclin.c:331
IfxAsclin_setRxFifoOutletWidth
IFX_INLINE void IfxAsclin_setRxFifoOutletWidth(Ifx_ASCLIN *asclin, IfxAsclin_RxFifoOutletWidth width)
Sets the receive FIFO outlet width.
Definition: IfxAsclin.h:2387
IfxAsclin_Spi_initModule
IfxAsclin_Status IfxAsclin_Spi_initModule(IfxAsclin_Spi *asclin, const IfxAsclin_Spi_Config *config)
Initialises the module.
Definition: IfxAsclin_Spi.c:112
IfxAsclin_Spi_Pins::rx
IFX_CONST IfxAsclin_Rx_In * rx
SPI Rx pin.
Definition: IfxAsclin_Spi.h:327
IfxAsclin_Spi_Config::clockSource
IfxAsclin_ClockSource clockSource
CSR.CLKSEL, clock source selection.
Definition: IfxAsclin_Spi.h:367
IfxAsclin_SlavePolarity_idlehigh
idle high
Definition: IfxAsclin.h:375
IfxAsclin_getSrcPointerTx
volatile Ifx_SRC_SRCR * IfxAsclin_getSrcPointerTx(Ifx_ASCLIN *asclin)
Returns the SRC pointer for Tx.
Definition: IfxAsclin.c:225
IfxAsclin_setClockPolarity
IFX_INLINE void IfxAsclin_setClockPolarity(Ifx_ASCLIN *asclin, IfxAsclin_ClockPolarity cpol)
Selects the clock polarity.
Definition: IfxAsclin.h:2231
IfxAsclin_Spi_ErrorFlags::txFifoOverflow
uint8 txFifoOverflow
transmit FIFO overflow error
Definition: IfxAsclin_Spi.h:267
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxAsclin_setRxBufferMode
IFX_INLINE void IfxAsclin_setRxBufferMode(Ifx_ASCLIN *asclin, IfxAsclin_ReceiveBufferMode mode)
Sets the receive buffer mode.
Definition: IfxAsclin.h:2369
IfxAsclin_Status_noError
No error.
Definition: IfxAsclin.h:392
IfxAsclin_Spi_initModuleConfig
void IfxAsclin_Spi_initModuleConfig(IfxAsclin_Spi_Config *config, Ifx_ASCLIN *asclin)
Fills the configuration structure with default values.
Definition: IfxAsclin_Spi.c:259
IfxAsclin_RxFifoOutletWidth_1
number of bytes 1
Definition: IfxAsclin.h:307
IfxAsclin_Spi_InterruptConfig::erPriority
uint16 erPriority
error interrupt priority
Definition: IfxAsclin_Spi.h:309
IfxAsclin_Spi_Status_busy
Definition: IfxAsclin_Spi.h:234
IfxAsclin_enableFrameErrorFlag
IFX_INLINE void IfxAsclin_enableFrameErrorFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables frame error flag.
Definition: IfxAsclin.h:1796
IfxAsclin_clearRxFifoOverflowFlag
IFX_INLINE void IfxAsclin_clearRxFifoOverflowFlag(Ifx_ASCLIN *asclin)
Clears the Rx FIFO overflow flag.
Definition: IfxAsclin.h:1700
IfxAsclin_setRxInput
IFX_INLINE void IfxAsclin_setRxInput(Ifx_ASCLIN *asclin, IfxAsclin_RxInputSelect alti)
Selects the alternate input for Rx signal.
Definition: IfxAsclin.h:2393
IfxCpu_disableInterrupts
IFX_INLINE boolean IfxCpu_disableInterrupts(void)
API to disable global interrupt and return the previous status.
Definition: IfxCpu.h:749
IfxAsclin_Rx_In
RX pin mapping structure.
Definition: IfxAsclin_PinMap.h:64
IfxAsclin_setRxFifoInterruptLevel
IFX_INLINE void IfxAsclin_setRxFifoInterruptLevel(Ifx_ASCLIN *asclin, IfxAsclin_RxFifoInterruptLevel level)
Sets the Tx FIFO interrupt level.
Definition: IfxAsclin.h:2375
IfxAsclin_Spi_Config::inputOutput
IfxAsclin_Spi_InputOutputControl inputOutput
structure for input output control
Definition: IfxAsclin_Spi.h:359
IfxAsclin_Spi_ErrorFlags::frameError
uint8 frameError
frame error
Definition: IfxAsclin_Spi.h:264
IfxAsclin_Spi::rxJob
IfxAsclin_Spi_Job rxJob
structure for Rx job
Definition: IfxAsclin_Spi.h:346
IfxAsclin_Spi_Config::bitSampling
IfxAsclin_Spi_BitSamplingControl bitSampling
structure for bit sampling
Definition: IfxAsclin_Spi.h:361
IfxAsclin_clearFrameErrorFlag
IFX_INLINE void IfxAsclin_clearFrameErrorFlag(Ifx_ASCLIN *asclin)
Clears the frame error flag.
Definition: IfxAsclin.h:1640
__swap
#define __swap
Definition: IfxCpu_IntrinsicsDcc.h:2085
IfxAsclin_Spi_ErrorFlags::rxFifoUnderflow
uint8 rxFifoUnderflow
receive FIFO underflow error
Definition: IfxAsclin_Spi.h:266
IfxAsclin_Spi_InterruptConfig::typeOfService
IfxSrc_Tos typeOfService
type of interrupt service
Definition: IfxAsclin_Spi.h:310
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:50
IfxAsclin_setLeadDelay
IFX_INLINE void IfxAsclin_setLeadDelay(Ifx_ASCLIN *asclin, IfxAsclin_LeadDelay delay)
Sets the lead delay.
Definition: IfxAsclin.h:2303
IfxSrc_Tos_dma
DMA interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:69
IfxAsclin_setPrescaler
IFX_INLINE void IfxAsclin_setPrescaler(Ifx_ASCLIN *asclin, uint16 prescaler)
Sets the division ratio of the predivider (prescaler)
Definition: IfxAsclin.h:2357
IfxAsclin_Spi_FifoControl::buffMode
IfxAsclin_ReceiveBufferMode buffMode
RXFIFOCON.BUF, receive buffer mode (RXFIFO or RXBuffer)
Definition: IfxAsclin_Spi.h:278
IfxAsclin_TxFifoInletWidth_2
number of bytes 2
Definition: IfxAsclin.h:426
IfxAsclin_Spi_InterruptConfig::txPriority
uint16 txPriority
transmit interrupt priority
Definition: IfxAsclin_Spi.h:307
IfxAsclin_getTxFifoFillLevel
IFX_INLINE uint8 IfxAsclin_getTxFifoFillLevel(Ifx_ASCLIN *asclin)
Returns the current filling level of Tx FIFO.
Definition: IfxAsclin.h:2102
IfxAsclin_SamplePointPosition
IfxAsclin_SamplePointPosition
Sample point position Definition in Ifx_ASCLIN.BITCON.B.SAMPLEPOINT.
Definition: IfxAsclin.h:330
IfxAsclin_Spi.h
ASCLIN SPI details.
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:68
IfxAsclin_Spi_Config::dataLength
IfxAsclin_DataLength dataLength
DATCON.DATALENGTH, data length, number of bits per transfer.
Definition: IfxAsclin_Spi.h:363
IfxAsclin_getSrcPointerRx
volatile Ifx_SRC_SRCR * IfxAsclin_getSrcPointerRx(Ifx_ASCLIN *asclin)
Returns the SRC pointer for Rx.
Definition: IfxAsclin.c:192
IfxAsclin_flushRxFifo
IFX_INLINE void IfxAsclin_flushRxFifo(Ifx_ASCLIN *asclin)
Flushes (empties) the Rx FIFO.
Definition: IfxAsclin.h:1934
IfxAsclin_Spi_InputOutputControl::alti
IfxAsclin_RxInputSelect alti
IOCR.ALTI, Rx input (alternate input) pin selection.
Definition: IfxAsclin_Spi.h:297
IfxAsclin_initSclkPin
IFX_INLINE void IfxAsclin_initSclkPin(const IfxAsclin_Sclk_Out *sclk, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a SCLK output.
Definition: IfxAsclin.h:2168
IfxAsclin_read8
uint32 IfxAsclin_read8(Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
Reads data up to 8 bits.
Definition: IfxAsclin.c:286
IfxAsclin_Spi_FifoControl::rxFifoInterruptMode
IfxAsclin_FifoInterruptMode rxFifoInterruptMode
RXFIFOCON.FM, Rx FIFO interrupt generation mode.
Definition: IfxAsclin_Spi.h:280
IfxAsclin_Spi::transferInProgress
boolean transferInProgress
status of the transfer In progress
Definition: IfxAsclin_Spi.h:350
IfxAsclin_readRxData
IFX_INLINE uint32 IfxAsclin_readRxData(Ifx_ASCLIN *asclin)
Definition: IfxAsclin.h:2201
IfxAsclin_Spi::errorFlags
IfxAsclin_Spi_ErrorFlags errorFlags
structure for error flags status
Definition: IfxAsclin_Spi.h:348
IfxAsclin_enableParity
IFX_INLINE void IfxAsclin_enableParity(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the parity bit attachment to tha data bits.
Definition: IfxAsclin.h:1838
IfxAsclin_Spi_write
void IfxAsclin_Spi_write(IfxAsclin_Spi *asclin)
Writes data into the Tx FIFO based on the inlet width.
Definition: IfxAsclin_Spi.c:432
IfxAsclin_Spi_lock
IFX_STATIC IfxAsclin_Spi_Status IfxAsclin_Spi_lock(IfxAsclin_Spi *asclin)
Definition: IfxAsclin_Spi.c:374
IfxAsclin_getRxFifoFillLevel
IFX_INLINE uint8 IfxAsclin_getRxFifoFillLevel(Ifx_ASCLIN *asclin)
Returns the current filling level of Tx FIFO.
Definition: IfxAsclin.h:2048
IfxAsclin_disableAllFlags
IFX_INLINE void IfxAsclin_disableAllFlags(Ifx_ASCLIN *asclin)
disables all flags
Definition: IfxAsclin.h:1754
IfxAsclin_Spi_FifoControl::rxFifoInterruptLevel
IfxAsclin_RxFifoInterruptLevel rxFifoInterruptLevel
RXFIFOCON.INTLEVEL, Rx FIFO interrupt level.
Definition: IfxAsclin_Spi.h:277
IfxAsclin_initTxPin
IFX_INLINE void IfxAsclin_initTxPin(const IfxAsclin_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a TX output.
Definition: IfxAsclin.h:2182
IfxAsclin_write16
uint32 IfxAsclin_write16(Ifx_ASCLIN *asclin, uint16 *data, uint32 count)
Writes data up to 16 bits.
Definition: IfxAsclin.c:448
IfxAsclin_setTxFifoInletWidth
IFX_INLINE void IfxAsclin_setTxFifoInletWidth(Ifx_ASCLIN *asclin, IfxAsclin_TxFifoInletWidth width)
Sets the transmit FIFO inlet width.
Definition: IfxAsclin.h:2467
IfxAsclin_Spi_InterruptConfig::rxPriority
uint16 rxPriority
receive interrupt priority
Definition: IfxAsclin_Spi.h:308
IfxAsclin_Spi_Config::fifo
IfxAsclin_Spi_FifoControl fifo
structure for FIFO control
Definition: IfxAsclin_Spi.h:364
IfxAsclin_write8
uint32 IfxAsclin_write8(Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
Writes data up to 8 bits.
Definition: IfxAsclin.c:476
IfxAsclin_setSlavePolarity
IFX_INLINE void IfxAsclin_setSlavePolarity(Ifx_ASCLIN *asclin, IfxAsclin_SlavePolarity spol)
Selects the slave polarity.
Definition: IfxAsclin.h:2417
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxAsclin_Spi_FifoControl::txFifoInterruptLevel
IfxAsclin_TxFifoInterruptLevel txFifoInterruptLevel
TXFIFOCON.INTLEVEL, Tx FIFO interrupt level.
Definition: IfxAsclin_Spi.h:275
__min
sint32 __min(sint32, sint32) __attribute__((intrinsic_pseudo(3
IfxAsclin_enableLoopBackMode
IFX_INLINE void IfxAsclin_enableLoopBackMode(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the loop back mode.
Definition: IfxAsclin.h:1832
IfxAsclin_enableTxFifoOutlet
IFX_INLINE void IfxAsclin_enableTxFifoOutlet(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the transmit FIFO outlet to allow transmission.
Definition: IfxAsclin.h:1910
IfxAsclin_RxFifoOutletWidth_2
number of bytes 2
Definition: IfxAsclin.h:308
IfxAsclin_setFrameMode
IFX_INLINE void IfxAsclin_setFrameMode(Ifx_ASCLIN *asclin, IfxAsclin_FrameMode mode)
Selects the module&#39;s mode of operation.
Definition: IfxAsclin.h:2273
IfxAsclin_getRxFifoOverflowFlagStatus
IFX_INLINE boolean IfxAsclin_getRxFifoOverflowFlagStatus(Ifx_ASCLIN *asclin)
Returns the Rx FIFO overflow flag status.
Definition: IfxAsclin.h:2066
IfxAsclin_FrameMode_spi
spi mode
Definition: IfxAsclin.h:167
IfxAsclin_Spi_Pins::rxMode
IfxPort_InputMode rxMode
rx pin as input
Definition: IfxAsclin_Spi.h:328
IfxAsclin_StopBit_1
number of stop bits 1
Definition: IfxAsclin.h:401
IfxAsclin_Spi_Pins::slsoMode
IfxPort_OutputMode slsoMode
slso as output
Definition: IfxAsclin_Spi.h:332
IfxAsclin_RxInputSelect_0
alternate input selection 0
Definition: IfxAsclin.h:317
sint32
long sint32
Definition: Platform_Types.h:134
IfxAsclin_LeadDelay_1
lead delay in 1 bit times
Definition: IfxAsclin.h:204
IfxAsclin_Spi_Config::pins
IFX_CONST IfxAsclin_Spi_Pins * pins
structure for SPI pins
Definition: IfxAsclin_Spi.h:366
IfxAsclin_FifoInterruptMode_combined
Combined Move Mode.
Definition: IfxAsclin.h:155
IfxAsclin_enableRxFifoInlet
IFX_INLINE void IfxAsclin_enableRxFifoInlet(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the receive FIFO outlet to allow filling of Rx FIFO through shift register...
Definition: IfxAsclin.h:1868
IfxAsclin_setTxFifoInterruptMode
IFX_INLINE void IfxAsclin_setTxFifoInterruptMode(Ifx_ASCLIN *asclin, IfxAsclin_FifoInterruptMode mode)
Selects the Tx FIFO interupt generation mode.
Definition: IfxAsclin.h:2479
IfxAsclin_Spi_FrameControl::leadDelay
IfxAsclin_LeadDelay leadDelay
FRAMECON.LEAD, lead delay.
Definition: IfxAsclin_Spi.h:289
IfxAsclin_writeTxData
IFX_INLINE void IfxAsclin_writeTxData(Ifx_ASCLIN *asclin, uint32 data)
Definition: IfxAsclin.h:2485
IfxAsclin_ClockSource_noClock
no clock will be supplied
Definition: IfxAsclin.h:111
IfxAsclin_Spi_Baudrate::prescaler
uint16 prescaler
BITCON.PRESCALER, predivider to generate the baud rate.
Definition: IfxAsclin_Spi.h:249
IfxAsclin_Spi_Config
Configuration structure of the module.
Definition: IfxAsclin_Spi.h:355
IfxAsclin_Spi_InputOutputControl::spol
IfxAsclin_SlavePolarity spol
IOCR.SPOL slave polarity selection.
Definition: IfxAsclin_Spi.h:299
IfxAsclin_Spi_Config::interrupt
IfxAsclin_Spi_InterruptConfig interrupt
structure for interrupt configuration
Definition: IfxAsclin_Spi.h:365
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxAsclin_Spi_FrameControl::shiftDir
IfxAsclin_ShiftDirection shiftDir
FRAMECON.MSB, shift direction.
Definition: IfxAsclin_Spi.h:290
IfxAsclin_TxFifoInletWidth_1
number of bytes 1
Definition: IfxAsclin.h:425
IfxAsclin_read16
uint32 IfxAsclin_read16(Ifx_ASCLIN *asclin, uint16 *data, uint32 count)
Reads data up to 16 bits.
Definition: IfxAsclin.c:258
IfxAsclin_Spi_Config::frameMode
IfxAsclin_FrameMode frameMode
FRAMECON.MODE, mode of operation of the module (ASC, SPI, LIN)
Definition: IfxAsclin_Spi.h:358
IfxAsclin_Spi_isrTransmit
void IfxAsclin_Spi_isrTransmit(IfxAsclin_Spi *asclin)
ISR transmit routine.
Definition: IfxAsclin_Spi.c:366
IfxAsclin_FrameMode_initialise
initialise mode
Definition: IfxAsclin.h:165
IfxAsclin_DataLength_8
number of bits per transfer 7
Definition: IfxAsclin.h:139
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxAsclin_SamplesPerBit_one
one sample per bit
Definition: IfxAsclin.h:354
IfxAsclin_Spi_read
void IfxAsclin_Spi_read(IfxAsclin_Spi *asclin)
Reads data from the Rx FIFO based on the outlet width.
Definition: IfxAsclin_Spi.c:381
IfxAsclin_Spi_getStatus
IfxAsclin_Spi_Status IfxAsclin_Spi_getStatus(IfxAsclin_Spi *asclin)
Definition: IfxAsclin_Spi.c:99
IfxAsclin_Spi::sending
uint32 sending
sending in progress status
Definition: IfxAsclin_Spi.h:347
IfxAsclin_setStopBit
IFX_INLINE void IfxAsclin_setStopBit(Ifx_ASCLIN *asclin, IfxAsclin_StopBit stopBit)
Sets the number of stop bits.
Definition: IfxAsclin.h:2432
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxAsclin_setShiftDirection
IFX_INLINE void IfxAsclin_setShiftDirection(Ifx_ASCLIN *asclin, IfxAsclin_ShiftDirection dir)
Sets the shift direction.
Definition: IfxAsclin.h:2411
IfxAsclin_OversamplingFactor_8
oversampling factor 8
Definition: IfxAsclin.h:240
IfxAsclin_getFrameErrorFlagStatus
IFX_INLINE boolean IfxAsclin_getFrameErrorFlagStatus(Ifx_ASCLIN *asclin)
Returns the frame error flag status.
Definition: IfxAsclin.h:1976
IfxAsclin_setDisableModuleRequest
IFX_INLINE void IfxAsclin_setDisableModuleRequest(Ifx_ASCLIN *asclin)
Sets the disable module request.
Definition: IfxAsclin.h:2255
IfxAsclin_Spi::asclin
Ifx_ASCLIN * asclin
pointer to ASCLIN registers
Definition: IfxAsclin_Spi.h:344
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxAsclin_enableTxFifoFillLevelFlag
IFX_INLINE void IfxAsclin_enableTxFifoFillLevelFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Tx FIFO level flag.
Definition: IfxAsclin.h:1904
IfxAsclin_Spi::dataWidth
uint8 dataWidth
width of the data in bytes
Definition: IfxAsclin_Spi.h:349
IfxAsclin_clearTxFifoOverflowFlag
IFX_INLINE void IfxAsclin_clearTxFifoOverflowFlag(Ifx_ASCLIN *asclin)
Clears the Tx FIFO overflow flag.
Definition: IfxAsclin.h:1736
IfxAsclin_Status
IfxAsclin_Status
Error status.
Definition: IfxAsclin.h:389
IfxAsclin_Spi_Job::pending
uint32 pending
job remaining (count of the data)
Definition: IfxAsclin_Spi.h:318
IfxAsclin_setDataLength
IFX_INLINE void IfxAsclin_setDataLength(Ifx_ASCLIN *asclin, IfxAsclin_DataLength length)
Sets the data length (number of bits per transfer)
Definition: IfxAsclin.h:2243
IfxAsclin_Spi_Pins::slso
IFX_CONST IfxAsclin_Slso_Out * slso
SPI slave select pin.
Definition: IfxAsclin_Spi.h:331
IfxAsclin_setClockSource
void IfxAsclin_setClockSource(Ifx_ASCLIN *asclin, IfxAsclin_ClockSource clockSource)
Sets the clock source.
Definition: IfxAsclin.c:430
IfxAsclin_setTxFifoInterruptLevel
IFX_INLINE void IfxAsclin_setTxFifoInterruptLevel(Ifx_ASCLIN *asclin, IfxAsclin_TxFifoInterruptLevel level)
Sets the Tx FIFO interrupt level.
Definition: IfxAsclin.h:2473


iLLD_TC38A: IfxAsclin_Spi.h Source File

  • Asclin
  • Spi
IfxAsclin_Spi.h
Go to the documentation of this file.
1 /**
2 * \file IfxAsclin_Spi.h
3 * \brief ASCLIN SPI details
4 * \ingroup IfxLld_Asclin
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 *
43 * \defgroup IfxLld_Asclin_Spi_Usage How to use the ASCLIN SPI Interface driver?
44 * \ingroup IfxLld_Asclin
45 *
46 * The SPI interface driver provides a default ASCLIN configuration for synchronous serial communication in 8 and 16 bit mode, and a set of data transfer routines.
47 *
48 * Data transfers are buffered by the hardware based FIFOs. Incoming and outgoing data is transfered in background from/to the ASCLIN peripheral by interrupt service handlers, which are part of this driver as well. This allows a nonblocking communication without stalling the thread(s) from where data is sent and received.
49 *
50 * The SPI interface driver works only as Master
51 *
52 * In the following sections it will be described, how to integrate the driver into the application framework.
53 *
54 * \section IfxLld_Asclin_Spi_Preparation Preparation
55 *
56 * \subsection IfxLld_Asclin_Spi_Include Include Files
57 *
58 * Include following header file into your C code:
59 *
60 * \code
61 * #include <Asclin/Spi/IfxAsclin_Spi.h>
62 * \endcode
63 *
64 * \subsection IfxLld_Asclin_Spi_Variables Variables
65 *
66 * Declare the Spi handle as global variable in your C code:
67 *
68 * \code
69 * // used globally
70 * static IfxAsclin_Spi spi;
71 * \endcode
72 *
73 * In addition, declare global transmit and receive buffers for the data transfers:
74 *
75 * \code
76 * #define SPI_BUFFER_SIZE 8
77 * uint8 spiTxBuffer[SPI_BUFFER_SIZE];
78 * uint8 spiRxBuffer[SPI_BUFFER_SIZE];
79 * \endcode
80 *
81 * \subsection IfxLld_Asclin_Spi_Interrupt Interrupt Handler Installation
82 *
83 * See also \ref IfxLld_Cpu_Irq_Usage
84 *
85 * Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:
86 *
87 * \code
88 * // priorities are normally defined in Ifx_IntPrioDef.h
89 * #define IFX_INTPRIO_ASCLIN1_TX 1
90 * #define IFX_INTPRIO_ASCLIN1_RX 2
91 * #define IFX_INTPRIO_ASCLIN1_ER 3
92 * \endcode
93 *
94 * Add the interrupt service routines to your C code. They have to call the SPI interrupt handlers by passing the spi handle:
95 *
96 * \code
97 * IFX_INTERRUPT(asclin1TxISR, 0, IFX_INTPRIO_ASCLIN1_TX)
98 * {
99 * IfxAsclin_Spi_isrTransmit(&spi);
100 * }
101 *
102 * IFX_INTERRUPT(asclin1RxISR, 0, IFX_INTPRIO_ASCLIN1_RX)
103 * {
104 * IfxAsclin_Spi_isrReceive(&spi);
105 * }
106 *
107 * IFX_INTERRUPT(asclin1ErISR, 0, IFX_INTPRIO_ASCLIN1_ER)
108 * {
109 * IfxAsclin_Spi_isrError(&spi);
110 * }
111 * \endcode
112 *
113 * Finally install the interrupt handlers in your initialisation function:
114 *
115 * \code
116 * // install interrupt handlers
117 * IfxCpu_Irq_installInterruptHandler(&asclin1TxISR, IFX_INTPRIO_ASCLIN1_TX);
118 * IfxCpu_Irq_installInterruptHandler(&asclin1RxISR, IFX_INTPRIO_ASCLIN1_RX);
119 * IfxCpu_Irq_installInterruptHandler(&asclin1ErISR, IFX_INTPRIO_ASCLIN1_ER);
120 * IfxCpu_enableInterrupts();
121 * \endcode
122 *
123 * \subsection IfxLld_Asclin_Spi_Init Module Initialisation
124 *
125 * The module initialisation can be done in the same function. Here an example:
126 *
127 * \code
128 * // create module config
129 * IfxAsclin_Spi_Config spiConfig;
130 * IfxAsclin_Spi_initModuleConfig(&spiConfig, &MODULE_ASCLIN1);
131 *
132 * // set the desired baudrate
133 * spiConfig.baudrate.prescaler = 1;
134 * spiConfig.baudrate.baudrate = 1000000; // FDR values will be calculated in initModule
135 *
136 * // ISR priorities and interrupt target
137 * spiConfig.interrupt.txPriority = IFX_INTPRIO_ASCLIN1_TX; // see also \ref IfxLld_Asclin
138 * spiConfig.interrupt.rxPriority = IFX_INTPRIO_ASCLIN1_RX; // see also \ref IfxLld_Asclin
139 * spiConfig.interrupt.erPriority = IFX_INTPRIO_ASCLIN1_ER; // see also \ref IfxLld_Asclin
140 * spiConfig.interrupt.typeOfService = IfxCpu_Irq_getTos(IfxCpu_getCoreIndex());
141 *
142 * // pin configuration
143 * const IfxAsclin_Spi_Pins pins = {
144 * &IfxAsclin1_SCLK_P15_0_OUT, IfxPort_OutputMode_pushPull, // Clock out pin
145 * &IfxAsclin1_RXA_P15_1_IN, IfxPort_InputMode_pullUp, // Rx pin
146 * &IfxAsclin1_TX_P15_4_OUT, IfxPort_OutputMode_pushPull, // Tx pin
147 * &IfxAsclin1_SLSO_P20_8_OUT, IfxPort_OutputMode_pushPull, // Slave select pin
148 * IfxPort_PadDriver_cmosAutomotiveSpeed1
149 * };
150 * spiConfig.pins = &pins;
151 *
152 * // initialize module
153 * //IfxAsclin_Spi spi; // defined globally
154 * IfxAsclin_Spi_initModule(&spi, &spiConfig);
155 * \endcode
156 *
157 * The SPI is ready for use now!
158 *
159 *
160 * \section IfxLld_Asclin_Spi_DataTransfers Data Transfers
161 *
162 * In following examples we assume, that following buffers are declared globally:
163 *
164 * \code
165 * // load the data buffers
166 * int i;
167 * for (i = 0; i < SPI_BUFFER_SIZE; i++)
168 * {
169 * spiTxBuffer[i] = i + 1;
170 * spiRxBuffer[i] = 0;
171 * }
172 * \endcode
173 *
174 * Sending and Receiving a data stream:
175 *
176 * \code
177 * // wait until transfer of previous data stream is finished
178 * while( IfxAsclin_Spi_getStatus(&spi) == IfxAsclin_Spi_Status_busy );
179 *
180 * // send/receive new stream
181 * IfxAsclin_Spi_exchange(&spi, spiTxBuffer, spiRxBuffer, 8);
182 * \endcode
183 *
184 * Send only, discard received data:
185 *
186 * \code
187 * // wait until transfer of previous data stream is finished
188 * while( IfxAsclin_Spi_getStatus(&spi) == IfxAsclin_Spi_Status_busy );
189 *
190 * // send new stream
191 * IfxAsclin_Spi_exchange(&spi, spiTxBuffer, NULL_PTR, 8);
192 * \endcode
193 *
194 * Receive only, send all 1's
195 *
196 * \code
197 * // wait until transfer of previous data stream is finished
198 * while( IfxAsclin_Spi_getStatus(&spi) == IfxAsclin_Spi_Status_busy );
199 *
200 * // receive new stream
201 * IfxAsclin_Spi_exchange(&spi, NULL_PTR, spiRxBuffer, 8);
202 * \endcode
203 *
204 * \defgroup IfxLld_Asclin_Spi SPI
205 * \ingroup IfxLld_Asclin
206 * \defgroup IfxLld_Asclin_Spi_DataStructures Data Structures
207 * \ingroup IfxLld_Asclin_Spi
208 * \defgroup IfxLld_Asclin_Spi_ModuleFunctions Module Functions
209 * \ingroup IfxLld_Asclin_Spi
210 * \defgroup IfxLld_Asclin_Spi_InterruptFunctions Interrupt Functions
211 * \ingroup IfxLld_Asclin_Spi
212 * \defgroup IfxLld_Asclin_Spi_CommunicationFunctions Communication Functions
213 * \ingroup IfxLld_Asclin_Spi
214 */
215
216 #ifndef IFXASCLIN_SPI_H
217 #define IFXASCLIN_SPI_H 1
218
219 /******************************************************************************/
220 /*----------------------------------Includes----------------------------------*/
221 /******************************************************************************/
222
223 #include "Asclin/Std/IfxAsclin.h"
224
225 /******************************************************************************/
226 /*-------------------------------Enumerations---------------------------------*/
227 /******************************************************************************/
228
229 /** \brief Enumeration for job status
230 */
231 typedef enum
232 {
233 IfxAsclin_Spi_Status_ok = 0,
234 IfxAsclin_Spi_Status_busy = 1,
235 IfxAsclin_Spi_Status_unknown = 2
236 } IfxAsclin_Spi_Status;
237
238 /******************************************************************************/
239 /*-----------------------------Data Structures--------------------------------*/
240 /******************************************************************************/
241
242 /** \addtogroup IfxLld_Asclin_Spi_DataStructures
243 * \{ */
244 /** \brief Structure for Baudrate Generation
245 */
246 typedef struct
247 {
248 float32 baudrate; /**< \brief value of the required baudrate */
249 uint16 prescaler; /**< \brief BITCON.PRESCALER, predivider to generate the baud rate */
250 IfxAsclin_OversamplingFactor oversampling; /**< \brief BITCON.OVERSAMPLING, postdivider, used for oversampling */
251 } IfxAsclin_Spi_Baudrate;
252
253 /** \brief Structure for Bit Sampling
254 */
255 typedef struct
256 {
257 IfxAsclin_SamplesPerBit medianFilter; /**< \brief BITCON.SM, no. of samples per bit 1 or 3 */
258 } IfxAsclin_Spi_BitSamplingControl;
259
260 /** \brief Structure for Error Flags
261 */
262 typedef struct
263 {
264 uint8 frameError : 1; /**< \brief frame error */
265 uint8 rxFifoOverflow : 1; /**< \brief receive FIFO overflow error */
266 uint8 rxFifoUnderflow : 1; /**< \brief receive FIFO underflow error */
267 uint8 txFifoOverflow : 1; /**< \brief transmit FIFO overflow error */
268 } IfxAsclin_Spi_ErrorFlags;
269
270 /** \brief Structure for FIFO Control
271 */
272 typedef struct
273 {
274 IfxAsclin_TxFifoInletWidth inWidth; /**< \brief TXFIFOCON.INW, transmit FIFO inlet width */
275 IfxAsclin_TxFifoInterruptLevel txFifoInterruptLevel; /**< \brief TXFIFOCON.INTLEVEL, Tx FIFO interrupt level */
276 IfxAsclin_RxFifoOutletWidth outWidth; /**< \brief RXFIFOCON.OTW, receive FIFO oulet width */
277 IfxAsclin_RxFifoInterruptLevel rxFifoInterruptLevel; /**< \brief RXFIFOCON.INTLEVEL, Rx FIFO interrupt level */
278 IfxAsclin_ReceiveBufferMode buffMode; /**< \brief RXFIFOCON.BUF, receive buffer mode (RXFIFO or RXBuffer) */
279 IfxAsclin_FifoInterruptMode txFifoInterruptMode; /**< \brief TXFIFOCON.FM, Tx FIFO interrupt generation mode */
280 IfxAsclin_FifoInterruptMode rxFifoInterruptMode; /**< \brief RXFIFOCON.FM, Rx FIFO interrupt generation mode */
281 } IfxAsclin_Spi_FifoControl;
282
283 /** \brief Structure for Frame Control
284 */
285 typedef struct
286 {
287 IfxAsclin_IdleDelay idleDelay; /**< \brief FRAMECON.IDLE, idle delay */
288 IfxAsclin_StopBit stopBit; /**< \brief FRAMECON.STOP, number of stop bits */
289 IfxAsclin_LeadDelay leadDelay; /**< \brief FRAMECON.LEAD, lead delay */
290 IfxAsclin_ShiftDirection shiftDir; /**< \brief FRAMECON.MSB, shift direction */
291 } IfxAsclin_Spi_FrameControl;
292
293 /** \brief Structure for input output control
294 */
295 typedef struct
296 {
297 IfxAsclin_RxInputSelect alti; /**< \brief IOCR.ALTI, Rx input (alternate input) pin selection */
298 IfxAsclin_ClockPolarity cpol; /**< \brief IOCR.CPOL clock polarity selection */
299 IfxAsclin_SlavePolarity spol; /**< \brief IOCR.SPOL slave polarity selection */
300 boolean loopBack; /**< \brief IOCR.LB, loop back mode selection, 0 for disable, 1 for enable */
301 } IfxAsclin_Spi_InputOutputControl;
302
303 /** \brief Structure for interrupt configuration
304 */
305 typedef struct
306 {
307 uint16 txPriority; /**< \brief transmit interrupt priority */
308 uint16 rxPriority; /**< \brief receive interrupt priority */
309 uint16 erPriority; /**< \brief error interrupt priority */
310 IfxSrc_Tos typeOfService; /**< \brief type of interrupt service */
311 } IfxAsclin_Spi_InterruptConfig;
312
313 /** \brief Structure for data transfer jobs
314 */
315 typedef struct
316 {
317 void *data; /**< \brief pointer to user data */
318 uint32 pending; /**< \brief job remaining (count of the data) */
319 } IfxAsclin_Spi_Job;
320
321 /** \brief Structure for SPI pin configuration
322 */
323 typedef struct
324 {
325 IFX_CONST IfxAsclin_Sclk_Out *sclk; /**< \brief SPI clock select pin */
326 IfxPort_OutputMode sclkMode; /**< \brief sclk as output */
327 IFX_CONST IfxAsclin_Rx_In *rx; /**< \brief SPI Rx pin */
328 IfxPort_InputMode rxMode; /**< \brief rx pin as input */
329 IFX_CONST IfxAsclin_Tx_Out *tx; /**< \brief SPI Tx pin */
330 IfxPort_OutputMode txMode; /**< \brief tx as output */
331 IFX_CONST IfxAsclin_Slso_Out *slso; /**< \brief SPI slave select pin */
332 IfxPort_OutputMode slsoMode; /**< \brief slso as output */
333 IfxPort_PadDriver pinDriver; /**< \brief pad driver */
334 } IfxAsclin_Spi_Pins;
335
336 /** \} */
337
338 /** \addtogroup IfxLld_Asclin_Spi_DataStructures
339 * \{ */
340 /** \brief Module handle
341 */
342 typedef struct
343 {
344 Ifx_ASCLIN *asclin; /**< \brief pointer to ASCLIN registers */
345 IfxAsclin_Spi_Job txJob; /**< \brief structure for Tx job */
346 IfxAsclin_Spi_Job rxJob; /**< \brief structure for Rx job */
347 uint32 sending; /**< \brief sending in progress status */
348 IfxAsclin_Spi_ErrorFlags errorFlags; /**< \brief structure for error flags status */
349 uint8 dataWidth; /**< \brief width of the data in bytes */
350 boolean transferInProgress; /**< \brief status of the transfer In progress */
351 } IfxAsclin_Spi;
352
353 /** \brief Configuration structure of the module
354 */
355 typedef struct
356 {
357 Ifx_ASCLIN *asclin; /**< \brief pointer to ASCLIN registers */
358 IfxAsclin_FrameMode frameMode; /**< \brief FRAMECON.MODE, mode of operation of the module (ASC, SPI, LIN) */
359 IfxAsclin_Spi_InputOutputControl inputOutput; /**< \brief structure for input output control */
360 IfxAsclin_Spi_Baudrate baudrate; /**< \brief structure for baudrate */
361 IfxAsclin_Spi_BitSamplingControl bitSampling; /**< \brief structure for bit sampling */
362 IfxAsclin_Spi_FrameControl frame; /**< \brief structure for frame control */
363 IfxAsclin_DataLength dataLength; /**< \brief DATCON.DATALENGTH, data length, number of bits per transfer */
364 IfxAsclin_Spi_FifoControl fifo; /**< \brief structure for FIFO control */
365 IfxAsclin_Spi_InterruptConfig interrupt; /**< \brief structure for interrupt configuration */
366 IFX_CONST IfxAsclin_Spi_Pins *pins; /**< \brief structure for SPI pins */
367 IfxAsclin_ClockSource clockSource; /**< \brief CSR.CLKSEL, clock source selection */
368 } IfxAsclin_Spi_Config;
369
370 /** \} */
371
372 /** \addtogroup IfxLld_Asclin_Spi_ModuleFunctions
373 * \{ */
374
375 /******************************************************************************/
376 /*-------------------------Global Function Prototypes-------------------------*/
377 /******************************************************************************/
378
379 /** \brief Disables the module
380 * \param asclin module handle
381 * \return None
382 */
383 IFX_EXTERN void IfxAsclin_Spi_disableModule(IfxAsclin_Spi *asclin);
384
385 /** \brief Initialises the module
386 * \param asclin module handle
387 * \param config predefined configuration structure of the module
388 * \return Status
389 *
390 * A coding example can be found in \ref IfxLld_Asclin_Spi_Usage
391 *
392 */
393 IFX_EXTERN IfxAsclin_Status IfxAsclin_Spi_initModule(IfxAsclin_Spi *asclin, const IfxAsclin_Spi_Config *config);
394
395 /** \brief Fills the configuration structure with default values
396 * \param config predefined configuration structure of the module
397 * \param asclin pointer to ASCLIN registers
398 * \return None
399 *
400 * A coding example can be found in \ref IfxLld_Asclin_Spi_Usage
401 *
402 */
403 IFX_EXTERN void IfxAsclin_Spi_initModuleConfig(IfxAsclin_Spi_Config *config, Ifx_ASCLIN *asclin);
404
405 /** \} */
406
407 /** \addtogroup IfxLld_Asclin_Spi_InterruptFunctions
408 * \{ */
409
410 /******************************************************************************/
411 /*-------------------------Global Function Prototypes-------------------------*/
412 /******************************************************************************/
413
414 /** \brief ISR error routine.
415 *
416 * Currently it only stores error flags in the handle (asclin->errorFlags) whenever an error happens.
417 * The user software could react on these flags, e.g. re-initialising the module.
418 * \param asclin module handle
419 * \return None
420 */
421 IFX_EXTERN void IfxAsclin_Spi_isrError(IfxAsclin_Spi *asclin);
422
423 /** \brief ISR receive routine
424 * \param asclin module handle
425 * \return None
426 */
427 IFX_EXTERN void IfxAsclin_Spi_isrReceive(IfxAsclin_Spi *asclin);
428
429 /** \brief ISR transmit routine
430 * \param asclin module handle
431 * \return None
432 */
433 IFX_EXTERN void IfxAsclin_Spi_isrTransmit(IfxAsclin_Spi *asclin);
434
435 /** \} */
436
437 /** \addtogroup IfxLld_Asclin_Spi_CommunicationFunctions
438 * \{ */
439
440 /******************************************************************************/
441 /*-------------------------Global Function Prototypes-------------------------*/
442 /******************************************************************************/
443
444 /** \brief starts the data exchange
445 * \param asclin module handle
446 * \param src pointer to transmit data buffer
447 * \param dest pointer to receive data buffer
448 * \param count count of the data
449 * \return status
450 *
451 * A coding example can be found in \ref IfxLld_Asclin_Spi_Usage
452 *
453 */
454 IFX_EXTERN IfxAsclin_Spi_Status IfxAsclin_Spi_exchange(IfxAsclin_Spi *asclin, void *src, void *dest, uint32 count);
455
456 /** \brief Reads data from the Rx FIFO based on the outlet width
457 * \param asclin module handle
458 * \return None
459 */
460 IFX_EXTERN void IfxAsclin_Spi_read(IfxAsclin_Spi *asclin);
461
462 /** \brief Writes data into the Tx FIFO based on the inlet width
463 * \param asclin module handle
464 * \return None
465 */
466 IFX_EXTERN void IfxAsclin_Spi_write(IfxAsclin_Spi *asclin);
467
468 /** \} */
469
470 /******************************************************************************/
471 /*-------------------------Global Function Prototypes-------------------------*/
472 /******************************************************************************/
473
474 /**
475 * \param asclin module handle
476 * \return status of the on going job
477 */
478 IFX_EXTERN IfxAsclin_Spi_Status IfxAsclin_Spi_getStatus(IfxAsclin_Spi *asclin);
479
480 #endif /* IFXASCLIN_SPI_H */
IfxAsclin_Spi_FrameControl::idleDelay
IfxAsclin_IdleDelay idleDelay
FRAMECON.IDLE, idle delay.
Definition: IfxAsclin_Spi.h:287
IfxAsclin_Spi_FifoControl
Structure for FIFO Control.
Definition: IfxAsclin_Spi.h:272
IfxAsclin_Spi_Pins::sclkMode
IfxPort_OutputMode sclkMode
sclk as output
Definition: IfxAsclin_Spi.h:326
IfxAsclin_Tx_Out
TX pin mapping structure.
Definition: IfxAsclin_PinMap.h:96
IfxAsclin_Spi_exchange
IFX_EXTERN IfxAsclin_Spi_Status IfxAsclin_Spi_exchange(IfxAsclin_Spi *asclin, void *src, void *dest, uint32 count)
starts the data exchange
Definition: IfxAsclin_Spi.c:80
IfxAsclin_ReceiveBufferMode
IfxAsclin_ReceiveBufferMode
Receive buffer mode Definition in Ifx_ASCLIN.RXFIFOCON.B.BUF.
Definition: IfxAsclin.h:263
IfxAsclin_Spi_Baudrate
Structure for Baudrate Generation.
Definition: IfxAsclin_Spi.h:246
IfxAsclin_Spi_BitSamplingControl::medianFilter
IfxAsclin_SamplesPerBit medianFilter
BITCON.SM, no. of samples per bit 1 or 3.
Definition: IfxAsclin_Spi.h:257
IfxAsclin_Spi_Status
IfxAsclin_Spi_Status
Enumeration for job status.
Definition: IfxAsclin_Spi.h:231
IfxAsclin_Spi_isrReceive
IFX_EXTERN void IfxAsclin_Spi_isrReceive(IfxAsclin_Spi *asclin)
ISR receive routine.
Definition: IfxAsclin_Spi.c:358
IfxAsclin_Spi_Pins::sclk
IFX_CONST IfxAsclin_Sclk_Out * sclk
SPI clock select pin.
Definition: IfxAsclin_Spi.h:325
IfxAsclin_Spi_Job
Structure for data transfer jobs.
Definition: IfxAsclin_Spi.h:315
IfxAsclin_Spi_FrameControl::stopBit
IfxAsclin_StopBit stopBit
FRAMECON.STOP, number of stop bits.
Definition: IfxAsclin_Spi.h:288
IfxAsclin_Spi_InputOutputControl::cpol
IfxAsclin_ClockPolarity cpol
IOCR.CPOL clock polarity selection.
Definition: IfxAsclin_Spi.h:298
IfxAsclin_Sclk_Out
SCLK pin mapping structure.
Definition: IfxAsclin_PinMap.h:80
IfxAsclin_Spi_Job::data
void * data
pointer to user data
Definition: IfxAsclin_Spi.h:317
IfxAsclin_Spi
Module handle.
Definition: IfxAsclin_Spi.h:342
IfxAsclin_Spi_Pins::txMode
IfxPort_OutputMode txMode
tx as output
Definition: IfxAsclin_Spi.h:330
IfxAsclin_Spi_InputOutputControl::loopBack
boolean loopBack
IOCR.LB, loop back mode selection, 0 for disable, 1 for enable.
Definition: IfxAsclin_Spi.h:300
IfxAsclin_SamplesPerBit
IfxAsclin_SamplesPerBit
Number of samples per bit, sample mode/medianfilter Definition in Ifx_ASCLIN.BITCON.B.SM.
Definition: IfxAsclin.h:352
IfxAsclin_Spi_FifoControl::txFifoInterruptMode
IfxAsclin_FifoInterruptMode txFifoInterruptMode
TXFIFOCON.FM, Tx FIFO interrupt generation mode.
Definition: IfxAsclin_Spi.h:279
IfxAsclin_Spi::txJob
IfxAsclin_Spi_Job txJob
structure for Tx job
Definition: IfxAsclin_Spi.h:345
IfxAsclin_RxFifoOutletWidth
IfxAsclin_RxFifoOutletWidth
Defines the number of bytes read from the Rx FIFO with one FPI bus read Definition in Ifx_ASCLIN...
Definition: IfxAsclin.h:304
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:140
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxAsclin_Spi_Config::baudrate
IfxAsclin_Spi_Baudrate baudrate
structure for baudrate
Definition: IfxAsclin_Spi.h:360
IfxAsclin_Spi_Config::frame
IfxAsclin_Spi_FrameControl frame
structure for frame control
Definition: IfxAsclin_Spi.h:362
float32
float float32
Definition: Platform_Types.h:170
IfxAsclin_Slso_Out
SLSO pin mapping structure.
Definition: IfxAsclin_PinMap.h:88
IfxAsclin_Spi_Status_ok
Definition: IfxAsclin_Spi.h:233
IfxAsclin_StopBit
IfxAsclin_StopBit
ASC and LIN mode: number of stop bits (0 is not allowed), SPI mode: trailing delay. Definition in Ifx_ASCLIN.FRAMECON.B.STOP.
Definition: IfxAsclin.h:398
IfxAsclin_Spi_Baudrate::baudrate
float32 baudrate
value of the required baudrate
Definition: IfxAsclin_Spi.h:248
IfxAsclin_Spi_Pins::tx
IFX_CONST IfxAsclin_Tx_Out * tx
SPI Tx pin.
Definition: IfxAsclin_Spi.h:329
IfxAsclin_RxInputSelect
IfxAsclin_RxInputSelect
Alternate input selection for Rx signal. Definition in Ifx_ASCLIN.IOCR.B.ALTI.
Definition: IfxAsclin.h:315
IfxAsclin_Spi_Pins
Structure for SPI pin configuration.
Definition: IfxAsclin_Spi.h:323
IfxAsclin_Spi_Pins::pinDriver
IfxPort_PadDriver pinDriver
pad driver
Definition: IfxAsclin_Spi.h:333
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxAsclin_Spi_ErrorFlags::rxFifoOverflow
uint8 rxFifoOverflow
receive FIFO overflow error
Definition: IfxAsclin_Spi.h:265
IfxAsclin_Spi_disableModule
IFX_EXTERN void IfxAsclin_Spi_disableModule(IfxAsclin_Spi *asclin)
Disables the module.
Definition: IfxAsclin_Spi.c:70
IfxAsclin_RxFifoInterruptLevel
IfxAsclin_RxFifoInterruptLevel
Defines the filling level that triggers a drain (RX) interrupt or DMA access Definition in Ifx_ASCLIN...
Definition: IfxAsclin.h:281
IfxAsclin_Spi_isrError
IFX_EXTERN void IfxAsclin_Spi_isrError(IfxAsclin_Spi *asclin)
ISR error routine.
Definition: IfxAsclin_Spi.c:327
IfxAsclin_Spi_Baudrate::oversampling
IfxAsclin_OversamplingFactor oversampling
BITCON.OVERSAMPLING, postdivider, used for oversampling.
Definition: IfxAsclin_Spi.h:250
IfxAsclin_TxFifoInterruptLevel
IfxAsclin_TxFifoInterruptLevel
Defines the filling level that triggers a refill (TX) interrupt or DMA access Definition in Ifx_ASCLI...
Definition: IfxAsclin.h:433
IfxAsclin_Spi_initModule
IFX_EXTERN IfxAsclin_Status IfxAsclin_Spi_initModule(IfxAsclin_Spi *asclin, const IfxAsclin_Spi_Config *config)
Initialises the module.
Definition: IfxAsclin_Spi.c:112
IfxAsclin_Spi_InterruptConfig
Structure for interrupt configuration.
Definition: IfxAsclin_Spi.h:305
IfxAsclin_Spi_Pins::rx
IFX_CONST IfxAsclin_Rx_In * rx
SPI Rx pin.
Definition: IfxAsclin_Spi.h:327
IfxAsclin_Spi_Config::clockSource
IfxAsclin_ClockSource clockSource
CSR.CLKSEL, clock source selection.
Definition: IfxAsclin_Spi.h:367
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxAsclin_Spi_ErrorFlags::txFifoOverflow
uint8 txFifoOverflow
transmit FIFO overflow error
Definition: IfxAsclin_Spi.h:267
IfxAsclin_OversamplingFactor
IfxAsclin_OversamplingFactor
Defines the bit length in ticks in the range of 1 to 16. The lengths of 1 to 3 are not allowed Defini...
Definition: IfxAsclin.h:234
IfxAsclin_Spi_initModuleConfig
IFX_EXTERN void IfxAsclin_Spi_initModuleConfig(IfxAsclin_Spi_Config *config, Ifx_ASCLIN *asclin)
Fills the configuration structure with default values.
Definition: IfxAsclin_Spi.c:259
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxAsclin_Spi_InterruptConfig::erPriority
uint16 erPriority
error interrupt priority
Definition: IfxAsclin_Spi.h:309
IfxAsclin_Spi_getStatus
IFX_EXTERN IfxAsclin_Spi_Status IfxAsclin_Spi_getStatus(IfxAsclin_Spi *asclin)
Definition: IfxAsclin_Spi.c:99
IfxAsclin_Spi_Status_busy
Definition: IfxAsclin_Spi.h:234
IfxAsclin_LeadDelay
IfxAsclin_LeadDelay
Defines the leading delay in bit times in SPI mode. ASC mode: not applicable. LIN mode: delay between...
Definition: IfxAsclin.h:201
IfxAsclin_FrameMode
IfxAsclin_FrameMode
Defines the basic operating mode of the module. Changing the mode must be done by switching first to ...
Definition: IfxAsclin.h:163
IfxAsclin_IdleDelay
IfxAsclin_IdleDelay
Defines the duration of the IDLE delay in bit times. SPI mode: this is the idle time between the fram...
Definition: IfxAsclin.h:185
IfxAsclin_Rx_In
RX pin mapping structure.
Definition: IfxAsclin_PinMap.h:64
IfxAsclin_ClockSource
IfxAsclin_ClockSource
Selection of clock source Definition in Ifx_ASCLIN.CSR.B.CLKSEL.
Definition: IfxAsclin.h:109
IfxAsclin_DataLength
IfxAsclin_DataLength
Number of bits per transfer Definition in Ifx_ASCLIN.FRAMECON.B.DATALEN.
Definition: IfxAsclin.h:130
IfxAsclin_Spi_Config::inputOutput
IfxAsclin_Spi_InputOutputControl inputOutput
structure for input output control
Definition: IfxAsclin_Spi.h:359
IfxAsclin_Spi_ErrorFlags::frameError
uint8 frameError
frame error
Definition: IfxAsclin_Spi.h:264
IfxAsclin_Spi::rxJob
IfxAsclin_Spi_Job rxJob
structure for Rx job
Definition: IfxAsclin_Spi.h:346
IfxAsclin_Spi_Config::bitSampling
IfxAsclin_Spi_BitSamplingControl bitSampling
structure for bit sampling
Definition: IfxAsclin_Spi.h:361
IfxAsclin_Spi_ErrorFlags::rxFifoUnderflow
uint8 rxFifoUnderflow
receive FIFO underflow error
Definition: IfxAsclin_Spi.h:266
IfxAsclin_Spi_InterruptConfig::typeOfService
IfxSrc_Tos typeOfService
type of interrupt service
Definition: IfxAsclin_Spi.h:310
IfxAsclin_Spi_FifoControl::buffMode
IfxAsclin_ReceiveBufferMode buffMode
RXFIFOCON.BUF, receive buffer mode (RXFIFO or RXBuffer)
Definition: IfxAsclin_Spi.h:278
IfxAsclin_Spi_FifoControl::outWidth
IfxAsclin_RxFifoOutletWidth outWidth
RXFIFOCON.OTW, receive FIFO oulet width.
Definition: IfxAsclin_Spi.h:276
IfxAsclin_SlavePolarity
IfxAsclin_SlavePolarity
Defines the idle level of the SLSO signal, which is the level. Outside the data transmission, leading and trailing time intervals. Definition in Ifx_ASCLIN.IOCR.B.SPOL.
Definition: IfxAsclin.h:372
IfxAsclin_Spi_InterruptConfig::txPriority
uint16 txPriority
transmit interrupt priority
Definition: IfxAsclin_Spi.h:307
IfxAsclin_FifoInterruptMode
IfxAsclin_FifoInterruptMode
Defines the interrupt generation modes of Tx FIFO and Rx FIFO Definition in Ifx_ASCLIN.RXFIFOCON.B.FM and Ifx_ASCLIN.TXFIFOCON.B.FM.
Definition: IfxAsclin.h:153
IfxAsclin_ClockPolarity
IfxAsclin_ClockPolarity
CPOL defines the idle level of the clock signal in the SPI mode. Idle level is the level outside the ...
Definition: IfxAsclin.h:100
IfxAsclin_Spi_Config::dataLength
IfxAsclin_DataLength dataLength
DATCON.DATALENGTH, data length, number of bits per transfer.
Definition: IfxAsclin_Spi.h:363
IfxAsclin_Spi_InputOutputControl::alti
IfxAsclin_RxInputSelect alti
IOCR.ALTI, Rx input (alternate input) pin selection.
Definition: IfxAsclin_Spi.h:297
IfxAsclin_TxFifoInletWidth
IfxAsclin_TxFifoInletWidth
Defines the number of bytes written to the Tx FIFO with one FPI bus write Definition in Ifx_ASCLIN...
Definition: IfxAsclin.h:422
IfxAsclin_Spi_FifoControl::rxFifoInterruptMode
IfxAsclin_FifoInterruptMode rxFifoInterruptMode
RXFIFOCON.FM, Rx FIFO interrupt generation mode.
Definition: IfxAsclin_Spi.h:280
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:151
IfxAsclin_Spi::transferInProgress
boolean transferInProgress
status of the transfer In progress
Definition: IfxAsclin_Spi.h:350
IfxAsclin_Spi_BitSamplingControl
Structure for Bit Sampling.
Definition: IfxAsclin_Spi.h:255
IfxAsclin_Spi_ErrorFlags
Structure for Error Flags.
Definition: IfxAsclin_Spi.h:262
IfxAsclin_Spi::errorFlags
IfxAsclin_Spi_ErrorFlags errorFlags
structure for error flags status
Definition: IfxAsclin_Spi.h:348
IfxAsclin_Spi_write
IFX_EXTERN void IfxAsclin_Spi_write(IfxAsclin_Spi *asclin)
Writes data into the Tx FIFO based on the inlet width.
Definition: IfxAsclin_Spi.c:432
IfxAsclin_Spi_FifoControl::rxFifoInterruptLevel
IfxAsclin_RxFifoInterruptLevel rxFifoInterruptLevel
RXFIFOCON.INTLEVEL, Rx FIFO interrupt level.
Definition: IfxAsclin_Spi.h:277
IfxAsclin_Spi_InputOutputControl
Structure for input output control.
Definition: IfxAsclin_Spi.h:295
IfxAsclin_Spi_InterruptConfig::rxPriority
uint16 rxPriority
receive interrupt priority
Definition: IfxAsclin_Spi.h:308
IfxAsclin_Spi_Config::fifo
IfxAsclin_Spi_FifoControl fifo
structure for FIFO control
Definition: IfxAsclin_Spi.h:364
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxAsclin_Spi_FifoControl::txFifoInterruptLevel
IfxAsclin_TxFifoInterruptLevel txFifoInterruptLevel
TXFIFOCON.INTLEVEL, Tx FIFO interrupt level.
Definition: IfxAsclin_Spi.h:275
IfxAsclin_ShiftDirection
IfxAsclin_ShiftDirection
SPI mode: defines the shift direction of the shift register. ASC and LIN mode: should be set to 0...
Definition: IfxAsclin.h:362
IfxAsclin_Spi_Pins::rxMode
IfxPort_InputMode rxMode
rx pin as input
Definition: IfxAsclin_Spi.h:328
IfxAsclin_Spi_Pins::slsoMode
IfxPort_OutputMode slsoMode
slso as output
Definition: IfxAsclin_Spi.h:332
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:81
IfxAsclin_Spi_Config::pins
IFX_CONST IfxAsclin_Spi_Pins * pins
structure for SPI pins
Definition: IfxAsclin_Spi.h:366
IfxAsclin_Spi_FrameControl::leadDelay
IfxAsclin_LeadDelay leadDelay
FRAMECON.LEAD, lead delay.
Definition: IfxAsclin_Spi.h:289
IfxAsclin_Spi_Baudrate::prescaler
uint16 prescaler
BITCON.PRESCALER, predivider to generate the baud rate.
Definition: IfxAsclin_Spi.h:249
IfxAsclin_Spi_Status_unknown
Definition: IfxAsclin_Spi.h:235
IfxAsclin_Spi_Config
Configuration structure of the module.
Definition: IfxAsclin_Spi.h:355
IfxAsclin_Spi_InputOutputControl::spol
IfxAsclin_SlavePolarity spol
IOCR.SPOL slave polarity selection.
Definition: IfxAsclin_Spi.h:299
IfxAsclin_Spi_Config::interrupt
IfxAsclin_Spi_InterruptConfig interrupt
structure for interrupt configuration
Definition: IfxAsclin_Spi.h:365
IfxAsclin_Spi_FrameControl::shiftDir
IfxAsclin_ShiftDirection shiftDir
FRAMECON.MSB, shift direction.
Definition: IfxAsclin_Spi.h:290
IfxAsclin_Spi_Config::frameMode
IfxAsclin_FrameMode frameMode
FRAMECON.MODE, mode of operation of the module (ASC, SPI, LIN)
Definition: IfxAsclin_Spi.h:358
IfxAsclin_Spi_isrTransmit
IFX_EXTERN void IfxAsclin_Spi_isrTransmit(IfxAsclin_Spi *asclin)
ISR transmit routine.
Definition: IfxAsclin_Spi.c:366
IfxAsclin_Spi_FifoControl::inWidth
IfxAsclin_TxFifoInletWidth inWidth
TXFIFOCON.INW, transmit FIFO inlet width.
Definition: IfxAsclin_Spi.h:274
IfxAsclin_Spi_read
IFX_EXTERN void IfxAsclin_Spi_read(IfxAsclin_Spi *asclin)
Reads data from the Rx FIFO based on the outlet width.
Definition: IfxAsclin_Spi.c:381
IfxAsclin.h
ASCLIN basic functionality.
IfxAsclin_Spi::sending
uint32 sending
sending in progress status
Definition: IfxAsclin_Spi.h:347
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxAsclin_Spi::asclin
Ifx_ASCLIN * asclin
pointer to ASCLIN registers
Definition: IfxAsclin_Spi.h:344
IfxAsclin_Spi::dataWidth
uint8 dataWidth
width of the data in bytes
Definition: IfxAsclin_Spi.h:349
IfxAsclin_Status
IfxAsclin_Status
Error status.
Definition: IfxAsclin.h:389
IfxAsclin_Spi_Job::pending
uint32 pending
job remaining (count of the data)
Definition: IfxAsclin_Spi.h:318
IfxAsclin_Spi_Pins::slso
IFX_CONST IfxAsclin_Slso_Out * slso
SPI slave select pin.
Definition: IfxAsclin_Spi.h:331
IfxAsclin_Spi_FrameControl
Structure for Frame Control.
Definition: IfxAsclin_Spi.h:285


iLLD_TC38A: IfxAsclin_cfg.c Source File

  • _Impl
IfxAsclin_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxAsclin_cfg.c
3 * \brief ASCLIN on-chip implementation data
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 */
43
44 /******************************************************************************/
45 /*----------------------------------Includes----------------------------------*/
46 /******************************************************************************/
47
48 #include "IfxAsclin_cfg.h"
49
50 /******************************************************************************/
51 /*-----------------------Exported Variables/Constants-------------------------*/
52 /******************************************************************************/
53
54 IFX_CONST IfxModule_IndexMap IfxAsclin_cfg_indexMap[IFXASCLIN_NUM_MODULES] = {
55 {&MODULE_ASCLIN0, (uint32)IfxAsclin_Index_0 },
56 {&MODULE_ASCLIN1, (uint32)IfxAsclin_Index_1 },
57 {&MODULE_ASCLIN2, (uint32)IfxAsclin_Index_2 },
58 {&MODULE_ASCLIN3, (uint32)IfxAsclin_Index_3 },
59 {&MODULE_ASCLIN4, (uint32)IfxAsclin_Index_4 },
60 {&MODULE_ASCLIN5, (uint32)IfxAsclin_Index_5 },
61 {&MODULE_ASCLIN6, (uint32)IfxAsclin_Index_6 },
62 {&MODULE_ASCLIN7, (uint32)IfxAsclin_Index_7 },
63 {&MODULE_ASCLIN8, (uint32)IfxAsclin_Index_8 },
64 {&MODULE_ASCLIN9, (uint32)IfxAsclin_Index_9 },
65 {&MODULE_ASCLIN10, (uint32)IfxAsclin_Index_10},
66 {&MODULE_ASCLIN11, (uint32)IfxAsclin_Index_11},
67 {&MODULE_ASCLIN12, (uint32)IfxAsclin_Index_12},
68 {&MODULE_ASCLIN13, (uint32)IfxAsclin_Index_13},
69 {&MODULE_ASCLIN14, (uint32)IfxAsclin_Index_14},
70 {&MODULE_ASCLIN15, (uint32)IfxAsclin_Index_15},
71 {&MODULE_ASCLIN16, (uint32)IfxAsclin_Index_16},
72 {&MODULE_ASCLIN17, (uint32)IfxAsclin_Index_17},
73 {&MODULE_ASCLIN18, (uint32)IfxAsclin_Index_18},
74 {&MODULE_ASCLIN19, (uint32)IfxAsclin_Index_19},
75 {&MODULE_ASCLIN20, (uint32)IfxAsclin_Index_20},
76 {&MODULE_ASCLIN21, (uint32)IfxAsclin_Index_21},
77 {&MODULE_ASCLIN22, (uint32)IfxAsclin_Index_22},
78 {&MODULE_ASCLIN23, (uint32)IfxAsclin_Index_23}
79 };
IfxAsclin_Index_0
ASCLIN Index 0.
Definition: IfxAsclin_cfg.h:80
IfxAsclin_Index_20
ASCLIN Index 20.
Definition: IfxAsclin_cfg.h:100
IfxAsclin_Index_18
ASCLIN Index 18.
Definition: IfxAsclin_cfg.h:98
IfxAsclin_Index_13
ASCLIN Index 13.
Definition: IfxAsclin_cfg.h:93
IfxAsclin_Index_2
ASCLIN Index 2.
Definition: IfxAsclin_cfg.h:82
IfxAsclin_Index_21
ASCLIN Index 21.
Definition: IfxAsclin_cfg.h:101
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxAsclin_Index_19
ASCLIN Index 19.
Definition: IfxAsclin_cfg.h:99
IfxAsclin_Index_17
ASCLIN Index 17.
Definition: IfxAsclin_cfg.h:97
IfxAsclin_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxAsclin_cfg_indexMap[IFXASCLIN_NUM_MODULES]
Definition: IfxAsclin_cfg.c:54
IFXASCLIN_NUM_MODULES
#define IFXASCLIN_NUM_MODULES
Definition: IfxAsclin_cfg.h:67
IfxAsclin_Index_14
ASCLIN Index 14.
Definition: IfxAsclin_cfg.h:94
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxAsclin_Index_15
ASCLIN Index 15.
Definition: IfxAsclin_cfg.h:95
IfxAsclin_Index_3
ASCLIN Index 3.
Definition: IfxAsclin_cfg.h:83
IfxAsclin_Index_22
ASCLIN Index 22.
Definition: IfxAsclin_cfg.h:102
IfxAsclin_Index_10
ASCLIN Index 10.
Definition: IfxAsclin_cfg.h:90
IfxAsclin_Index_12
ASCLIN Index 12.
Definition: IfxAsclin_cfg.h:92
IfxAsclin_Index_4
ASCLIN Index 4.
Definition: IfxAsclin_cfg.h:84
IfxAsclin_Index_9
ASCLIN Index 9.
Definition: IfxAsclin_cfg.h:89
IfxAsclin_Index_11
ASCLIN Index 11.
Definition: IfxAsclin_cfg.h:91
IfxAsclin_Index_6
ASCLIN Index 6.
Definition: IfxAsclin_cfg.h:86
IfxAsclin_Index_5
ASCLIN Index 5.
Definition: IfxAsclin_cfg.h:85
IfxAsclin_Index_1
ASCLIN Index 1.
Definition: IfxAsclin_cfg.h:81
IfxAsclin_cfg.h
ASCLIN on-chip implementation data.
IfxAsclin_Index_23
ASCLIN Index 23.
Definition: IfxAsclin_cfg.h:103
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:140
IfxAsclin_Index_8
ASCLIN Index 8.
Definition: IfxAsclin_cfg.h:88
IfxAsclin_Index_16
ASCLIN Index 16.
Definition: IfxAsclin_cfg.h:96
IfxAsclin_Index_7
ASCLIN Index 7.
Definition: IfxAsclin_cfg.h:87


iLLD_TC38A: IfxAsclin_cfg.h Source File

  • _Impl
IfxAsclin_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxAsclin_cfg.h
3 * \brief ASCLIN on-chip implementation data
4 * \ingroup IfxLld_Asclin
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 *
43 * \defgroup IfxLld_Asclin ASCLIN
44 * \ingroup IfxLld
45 * \defgroup IfxLld_Asclin_Impl Implementation
46 * \ingroup IfxLld_Asclin
47 * \defgroup IfxLld_Asclin_Std Standard Driver
48 * \ingroup IfxLld_Asclin
49 * \defgroup IfxLld_Asclin_Impl_Enumerations Enumerations
50 * \ingroup IfxLld_Asclin_Impl
51 */
52
53 #ifndef IFXASCLIN_CFG_H
54 #define IFXASCLIN_CFG_H 1
55
56 /******************************************************************************/
57 /*----------------------------------Includes----------------------------------*/
58 /******************************************************************************/
59
60 #include "Cpu/Std/Ifx_Types.h"
61 #include "IfxAsclin_reg.h"
62
63 /******************************************************************************/
64 /*-----------------------------------Macros-----------------------------------*/
65 /******************************************************************************/
66
67 #define IFXASCLIN_NUM_MODULES (24)
68
69 /******************************************************************************/
70 /*--------------------------------Enumerations--------------------------------*/
71 /******************************************************************************/
72
73 /** \addtogroup IfxLld_Asclin_Impl_Enumerations
74 * \{ */
75 /** \brief List of the available Asclin resources
76 */
77 typedef enum
78 {
79 IfxAsclin_Index_none = -1, /**< \brief Not Selected */
80 IfxAsclin_Index_0 = 0, /**< \brief ASCLIN Index 0 */
81 IfxAsclin_Index_1, /**< \brief ASCLIN Index 1 */
82 IfxAsclin_Index_2, /**< \brief ASCLIN Index 2 */
83 IfxAsclin_Index_3, /**< \brief ASCLIN Index 3 */
84 IfxAsclin_Index_4, /**< \brief ASCLIN Index 4 */
85 IfxAsclin_Index_5, /**< \brief ASCLIN Index 5 */
86 IfxAsclin_Index_6, /**< \brief ASCLIN Index 6 */
87 IfxAsclin_Index_7, /**< \brief ASCLIN Index 7 */
88 IfxAsclin_Index_8, /**< \brief ASCLIN Index 8 */
89 IfxAsclin_Index_9, /**< \brief ASCLIN Index 9 */
90 IfxAsclin_Index_10, /**< \brief ASCLIN Index 10 */
91 IfxAsclin_Index_11, /**< \brief ASCLIN Index 11 */
92 IfxAsclin_Index_12, /**< \brief ASCLIN Index 12 */
93 IfxAsclin_Index_13, /**< \brief ASCLIN Index 13 */
94 IfxAsclin_Index_14, /**< \brief ASCLIN Index 14 */
95 IfxAsclin_Index_15, /**< \brief ASCLIN Index 15 */
96 IfxAsclin_Index_16, /**< \brief ASCLIN Index 16 */
97 IfxAsclin_Index_17, /**< \brief ASCLIN Index 17 */
98 IfxAsclin_Index_18, /**< \brief ASCLIN Index 18 */
99 IfxAsclin_Index_19, /**< \brief ASCLIN Index 19 */
100 IfxAsclin_Index_20, /**< \brief ASCLIN Index 20 */
101 IfxAsclin_Index_21, /**< \brief ASCLIN Index 21 */
102 IfxAsclin_Index_22, /**< \brief ASCLIN Index 22 */
103 IfxAsclin_Index_23 /**< \brief ASCLIN Index 23 */
104 } IfxAsclin_Index;
105
106 /** \} */
107
108 /******************************************************************************/
109 /*-------------------Global Exported Variables/Constants----------------------*/
110 /******************************************************************************/
111 IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxAsclin_cfg_indexMap[IFXASCLIN_NUM_MODULES];
112
113 #endif /* IFXASCLIN_CFG_H */
IfxAsclin_Index_0
ASCLIN Index 0.
Definition: IfxAsclin_cfg.h:80
IfxAsclin_Index_20
ASCLIN Index 20.
Definition: IfxAsclin_cfg.h:100
IfxAsclin_Index_18
ASCLIN Index 18.
Definition: IfxAsclin_cfg.h:98
IfxAsclin_Index_13
ASCLIN Index 13.
Definition: IfxAsclin_cfg.h:93
IfxAsclin_Index_2
ASCLIN Index 2.
Definition: IfxAsclin_cfg.h:82
IfxAsclin_cfg_indexMap
IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxAsclin_cfg_indexMap[IFXASCLIN_NUM_MODULES]
Definition: IfxAsclin_cfg.h:111
IfxAsclin_Index_21
ASCLIN Index 21.
Definition: IfxAsclin_cfg.h:101
IfxAsclin_Index
IfxAsclin_Index
List of the available Asclin resources.
Definition: IfxAsclin_cfg.h:77
IfxAsclin_Index_19
ASCLIN Index 19.
Definition: IfxAsclin_cfg.h:99
IfxAsclin_Index_17
ASCLIN Index 17.
Definition: IfxAsclin_cfg.h:97
IFXASCLIN_NUM_MODULES
#define IFXASCLIN_NUM_MODULES
Definition: IfxAsclin_cfg.h:67
IfxAsclin_Index_14
ASCLIN Index 14.
Definition: IfxAsclin_cfg.h:94
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxAsclin_Index_15
ASCLIN Index 15.
Definition: IfxAsclin_cfg.h:95
IfxAsclin_Index_3
ASCLIN Index 3.
Definition: IfxAsclin_cfg.h:83
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxAsclin_Index_22
ASCLIN Index 22.
Definition: IfxAsclin_cfg.h:102
IfxAsclin_Index_10
ASCLIN Index 10.
Definition: IfxAsclin_cfg.h:90
IfxAsclin_Index_12
ASCLIN Index 12.
Definition: IfxAsclin_cfg.h:92
IfxAsclin_Index_none
Not Selected.
Definition: IfxAsclin_cfg.h:79
IfxAsclin_Index_4
ASCLIN Index 4.
Definition: IfxAsclin_cfg.h:84
IfxAsclin_Index_9
ASCLIN Index 9.
Definition: IfxAsclin_cfg.h:89
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxAsclin_Index_11
ASCLIN Index 11.
Definition: IfxAsclin_cfg.h:91
IfxAsclin_Index_6
ASCLIN Index 6.
Definition: IfxAsclin_cfg.h:86
IfxAsclin_Index_5
ASCLIN Index 5.
Definition: IfxAsclin_cfg.h:85
IfxAsclin_Index_1
ASCLIN Index 1.
Definition: IfxAsclin_cfg.h:81
IfxAsclin_Index_23
ASCLIN Index 23.
Definition: IfxAsclin_cfg.h:103
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:140
IfxAsclin_Index_8
ASCLIN Index 8.
Definition: IfxAsclin_cfg.h:88
IfxAsclin_Index_16
ASCLIN Index 16.
Definition: IfxAsclin_cfg.h:96
IfxAsclin_Index_7
ASCLIN Index 7.
Definition: IfxAsclin_cfg.h:87


iLLD_TC38A: IfxCan.c Source File

  • Can
  • Std
IfxCan.c
Go to the documentation of this file.
1 /**
2 * \file IfxCan.c
3 * \brief CAN basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 *
41 */
42
43 /******************************************************************************/
44 /*----------------------------------Includes----------------------------------*/
45 /******************************************************************************/
46
47 #include "IfxCan.h"
48 #include "IfxCan_bf.h"
49
50 /******************************************************************************/
51 /*-------------------------Function Implementations---------------------------*/
52 /******************************************************************************/
53
54 void IfxCan_Node_clearRxBufferNewDataFlag(Ifx_CAN_N *node, IfxCan_RxBufferId rxBufferId)
55 {
56 uint32 value;
57
58 if (rxBufferId < IfxCan_RxBufferId_32)
59 {
60 value = (1U << rxBufferId);
61 node->NDAT1.U = value;
62 }
63 else
64 {
65 value = (1U << (rxBufferId - 32));
66 node->NDAT2.U = value;
67 }
68 }
69
70
71 uint32 IfxCan_Node_getDataLength(IfxCan_DataLengthCode dataLengthCode)
72 {
73 uint32 numBytes;
74
75 if (dataLengthCode <= IfxCan_DataLengthCode_8)
76 {
77 numBytes = (uint32)dataLengthCode;
78 }
79 else if (dataLengthCode <= IfxCan_DataLengthCode_24)
80 {
81 numBytes = ((uint32)dataLengthCode - 6) << 2;
82 }
83 else
84 {
85 numBytes = ((uint32)dataLengthCode - 11) << 4;
86 }
87
88 return (numBytes + 3) >> 2;
89 }
90
91
92 uint32 IfxCan_Node_getDataLengthFromCode(Ifx_CAN_N *node, IfxCan_DataLengthCode dataLengthCode)
93 {
94 uint32 numBytes;
95 IFX_UNUSED_PARAMETER(node);
96
97 if ((dataLengthCode <= IfxCan_DataLengthCode_64) && (dataLengthCode > IfxCan_DataLengthCode_24))
98 {
99 numBytes = ((uint32)dataLengthCode - 11) * 16;
100 }
101 else if ((dataLengthCode <= IfxCan_DataLengthCode_24) && (dataLengthCode > IfxCan_DataLengthCode_8))
102 {
103 numBytes = ((uint32)dataLengthCode - 6) * 4;
104 }
105 else
106 {
107 numBytes = (uint32)dataLengthCode;
108 }
109
110 return (numBytes + 3) / 4;
111 }
112
113
114 Ifx_CAN_EXTMSG *IfxCan_Node_getExtendedFilterElementAddress(uint32 ramBaseAddress, uint16 extendedFilterListStartAddress, uint8 filterNumber)
115 {
116 uint32 extendedFilterElementAddress, filterIndex;
117
118 filterIndex = filterNumber * 8;
119 extendedFilterElementAddress = ramBaseAddress + extendedFilterListStartAddress + filterIndex;
120
121 return (Ifx_CAN_EXTMSG *)extendedFilterElementAddress;
122 }
123
124
125 IfxCan_FrameMode IfxCan_Node_getFrameMode(Ifx_CAN_RXMSG *rxBufferElement)
126 {
127 IfxCan_FrameMode frameMode;
128
129 /* if CAN FD long frame is been selected */
130 if (rxBufferElement->R1.B.FDF)
131 {
132 /* if bitrate switch is been set */
133 if (rxBufferElement->R1.B.BRS)
134 {
135 frameMode = IfxCan_FrameMode_fdLongAndFast;
136 }
137 /* if bitrate switch is not been set */
138 else
139 {
140 frameMode = IfxCan_FrameMode_fdLong;
141 }
142 }
143 /* if CAN FD long frame is not been selected */
144 else
145 {
146 frameMode = IfxCan_FrameMode_standard;
147 }
148
149 return frameMode;
150 }
151
152
153 IfxCan_FrameMode IfxCan_Node_getFrameModeFromTxEventFifo(Ifx_CAN_TXEVENT *txEventFifoElement)
154 {
155 IfxCan_FrameMode frameMode;
156
157 /* if CAN FD long frame is been selected */
158 if (txEventFifoElement->E1.B.FDF)
159 {
160 /* if bitrate switch is been set */
161 if (txEventFifoElement->E1.B.BRS)
162 {
163 frameMode = IfxCan_FrameMode_fdLongAndFast;
164 }
165 /* if bitrate switch is not been set */
166 else
167 {
168 frameMode = IfxCan_FrameMode_fdLong;
169 }
170 }
171 /* if CAN FD long frame is not been selected */
172 else
173 {
174 frameMode = IfxCan_FrameMode_standard;
175 }
176
177 return frameMode;
178 }
179
180
181 uint8 IfxCan_Node_getRxBufferDataFieldSize(Ifx_CAN_N *node)
182 {
183 IfxCan_DataFieldSize sizeCode = (IfxCan_DataFieldSize)node->RX.ESC.B.RBDS;
184
185 uint8 size;
186
187 if (sizeCode < IfxCan_DataFieldSize_32)
188 {
189 size = ((uint8)sizeCode + 2) * 4;
190 }
191 else
192 {
193 size = ((uint8)sizeCode - 3) * 16;
194 }
195
196 return size;
197 }
198
199
200 Ifx_CAN_RXMSG *IfxCan_Node_getRxBufferElementAddress(Ifx_CAN_N *node, uint32 ramBaseAddress, uint16 rxBuffersStartAddress, IfxCan_RxBufferId rxBufferNumber)
201 {
202 uint16 rxBufferIndex, rxBufferSize, numOfDataBytes, numOfconfigBytes = 8;
203
204 numOfDataBytes = IfxCan_Node_getRxBufferDataFieldSize(node);
205 rxBufferSize = numOfconfigBytes + numOfDataBytes;
206 rxBufferIndex = rxBufferSize * ((uint16)rxBufferNumber);
207 uint32 rxBufferElementAddress = ramBaseAddress + rxBuffersStartAddress + rxBufferIndex;
208
209 return (Ifx_CAN_RXMSG *)rxBufferElementAddress;
210 }
211
212
213 uint8 IfxCan_Node_getRxFifo0DataFieldSize(Ifx_CAN_N *node)
214 {
215 IfxCan_DataFieldSize sizeCode = (IfxCan_DataFieldSize)node->RX.ESC.B.F0DS;
216
217 uint8 size;
218
219 if (sizeCode < IfxCan_DataFieldSize_32)
220 {
221 size = ((uint8)sizeCode + 2) * 4;
222 }
223 else
224 {
225 size = ((uint8)sizeCode - 3) * 16;
226 }
227
228 return size;
229 }
230
231
232 Ifx_CAN_RXMSG *IfxCan_Node_getRxFifo0ElementAddress(Ifx_CAN_N *node, uint32 ramBaseAddress, uint16 rxFifo0StartAddress, IfxCan_RxBufferId rxBufferNumber)
233 {
234 uint16 rxFifoElementIndex, rxFifoElementSize, numOfDataBytes, numOfconfigBytes = 8;
235
236 numOfDataBytes = IfxCan_Node_getRxFifo0DataFieldSize(node);
237 rxFifoElementSize = numOfconfigBytes + numOfDataBytes;
238 rxFifoElementIndex = rxFifoElementSize * ((uint16)rxBufferNumber);
239 uint32 rxFifoElementAddress = ramBaseAddress + rxFifo0StartAddress + rxFifoElementIndex;
240
241 return (Ifx_CAN_RXMSG *)rxFifoElementAddress;
242 }
243
244
245 uint8 IfxCan_Node_getRxFifo1DataFieldSize(Ifx_CAN_N *node)
246 {
247 IfxCan_DataFieldSize sizeCode = (IfxCan_DataFieldSize)node->RX.ESC.B.F1DS;
248
249 uint8 size;
250
251 if (sizeCode < IfxCan_DataFieldSize_32)
252 {
253 size = ((uint8)sizeCode + 2) * 4;
254 }
255 else
256 {
257 size = ((uint8)sizeCode - 3) * 16;
258 }
259
260 return size;
261 }
262
263
264 Ifx_CAN_RXMSG *IfxCan_Node_getRxFifo1ElementAddress(Ifx_CAN_N *node, uint32 ramBaseAddress, uint16 rxFifo1StartAddress, IfxCan_RxBufferId rxBufferNumber)
265 {
266 uint16 rxFifoElementIndex, rxFifoElementSize, numOfDataBytes, numOfconfigBytes = 8;
267
268 numOfDataBytes = IfxCan_Node_getRxFifo1DataFieldSize(node);
269 rxFifoElementSize = numOfconfigBytes + numOfDataBytes;
270 rxFifoElementIndex = rxFifoElementSize * ((uint16)rxBufferNumber);
271 uint32 rxFifoElementAddress = ramBaseAddress + rxFifo1StartAddress + rxFifoElementIndex;
272
273 return (Ifx_CAN_RXMSG *)rxFifoElementAddress;
274 }
275
276
277 Ifx_CAN_STDMSG *IfxCan_Node_getStandardFilterElementAddress(uint32 ramBaseAddress, uint16 standardFilterListStartAddress, uint8 filterNumber)
278 {
279 uint32 standardFilterElementAddress, filterIndex;
280
281 filterIndex = filterNumber * 4;
282 standardFilterElementAddress = ramBaseAddress + standardFilterListStartAddress + filterIndex;
283
284 return (Ifx_CAN_STDMSG *)standardFilterElementAddress;
285 }
286
287
288 uint8 IfxCan_Node_getTxBufferDataFieldSize(Ifx_CAN_N *node)
289 {
290 IfxCan_DataFieldSize sizeCode = (IfxCan_DataFieldSize)node->TX.ESC.B.TBDS;
291
292 uint8 size;
293
294 if (sizeCode < IfxCan_DataFieldSize_32)
295 {
296 size = ((uint8)sizeCode + 2) * 4;
297 }
298 else
299 {
300 size = ((uint8)sizeCode - 3) * 16;
301 }
302
303 return size;
304 }
305
306
307 Ifx_CAN_TXMSG *IfxCan_Node_getTxBufferElementAddress(Ifx_CAN_N *node, uint32 ramBaseAddress, uint16 txBuffersStartAddress, IfxCan_TxBufferId txBufferNumber)
308 {
309 uint16 txBufferIndex, txBufferSize, numOfDataBytes, numOfConfigBytes = 8;
310
311 numOfDataBytes = IfxCan_Node_getTxBufferDataFieldSize(node);
312 txBufferSize = numOfConfigBytes + numOfDataBytes;
313 txBufferIndex = txBufferSize * ((uint16)txBufferNumber);
314
315 uint32 txBufferElementAddress = ramBaseAddress + txBuffersStartAddress + txBufferIndex;
316 return (Ifx_CAN_TXMSG *)txBufferElementAddress;
317 }
318
319
320 Ifx_CAN_TXEVENT *IfxCan_Node_getTxEventFifoElementAddress(uint32 ramBaseAddress, uint16 txEventFifoStartAddress, uint8 txEventFifoNumber)
321 {
322 uint32 txEventFifoElementAddress, txEventFifoIndex;
323
324 txEventFifoIndex = txEventFifoNumber * 8;
325 txEventFifoElementAddress = ramBaseAddress + txEventFifoStartAddress + txEventFifoIndex;
326
327 return (Ifx_CAN_TXEVENT *)txEventFifoElementAddress;
328 }
329
330
331 boolean IfxCan_Node_initRxPin(Ifx_CAN_N *node, IfxCan_Rxd_In *rxd, IfxPort_InputMode mode, IfxPort_PadDriver padDriver)
332 {
333 IfxPort_setPinModeInput(rxd->pin.port, rxd->pin.pinIndex, mode);
334 IfxPort_setPinPadDriver(rxd->pin.port, rxd->pin.pinIndex, padDriver);
335 node->NPCR.B.RXSEL = rxd->select;
336
337 return TRUE;
338 }
339
340
341 boolean IfxCan_Node_initTxPin(IfxCan_Txd_Out *txd, IfxPort_OutputMode mode, IfxPort_PadDriver padDriver)
342 {
343 IfxPort_setPinModeOutput(txd->pin.port, txd->pin.pinIndex, mode, txd->select);
344 IfxPort_setPinPadDriver(txd->pin.port, txd->pin.pinIndex, padDriver);
345
346 return TRUE;
347 }
348
349
350 boolean IfxCan_Node_isRxBufferNewDataUpdated(Ifx_CAN_N *node, IfxCan_RxBufferId rxBufferId)
351 {
352 uint32 mask;
353 boolean tempVar;
354
355 if (rxBufferId < IfxCan_RxBufferId_32)
356 {
357 mask = (1U << rxBufferId);
358 tempVar = (boolean)(node->NDAT1.U & mask);
359 return tempVar;
360 }
361 else
362 {
363 mask = (1U << (rxBufferId - 32));
364 tempVar = (boolean)(node->NDAT2.U & mask);
365 return tempVar;
366 }
367 }
368
369
370 void IfxCan_Node_readData(Ifx_CAN_RXMSG *rxBufferElement, IfxCan_DataLengthCode dataLengthCode, uint32 *data)
371 {
372 uint32 i;
373 uint32 *destinationAddress = (uint32 *)rxBufferElement + 2;
374 /* get number of data bytes from data length code (DLC) */
375 uint32 length = IfxCan_Node_getDataLength(dataLengthCode);
376
377 /* read data from the data section of Rx Buffer element */
378 for (i = 0; i < length; i++)
379 {
380 data[i] = destinationAddress[i];
381 }
382 }
383
384
385 void IfxCan_Node_setBitTiming(Ifx_CAN_N *node, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 syncJumpWidth)
386 {
387 sint32 maxBRP = IFX_CAN_N_NBTP_NBRP_MSK + 1;
388 sint32 minBRP = 1;
389 sint32 maxTSEG1 = IFX_CAN_N_NBTP_NTSEG1_MSK + 1;
390 sint32 minTSEG1 = 3;
391 sint32 maxTSEG2 = IFX_CAN_N_NBTP_NTSEG2_MSK + 1;
392 sint32 minTSEG2 = 2;
393 sint32 maxTBAUD = 0;
394 sint32 minTBAUD = 8;
395
396 sint32 tempBRP, tempSJW, tempTSEG1, tempTBAUD;
397 sint32 bestBRP = 1, bestSJW = 1, bestTBAUD = 8, bestTSEG1 = 3, bestTSEG2 = 2;
398 float32 bestError = 0;
399
400 /*
401 * Bit timing & sampling
402 * Tq = (BRP+1)/Fcan if DIV8 = 0
403 * Tq = 8*(BRP+1)/Fcan if DIV8 = 1
404 * TSync = 1.Tq
405 * TSeg1 = (TSEG1+1)*Tq >= 3Tq
406 * TSeg2 = (TSEG2+1)*Tq >= 2Tq
407 * Bit Time = TSync + TSeg1 + TSeg2 >= 8Tq
408 *
409 * Resynchronization:
410 *
411 * Tsjw = (SJW + 1)*Tq
412 * TSeg1 >= Tsjw + Tprop
413 * TSeg2 >= Tsjw
414 */
415
416 /* search for best baudrate */
417 bestError = (float32)baudrate;
418 maxTBAUD = maxTSEG1 + maxTSEG2 + 1;
419
420 for (tempBRP = 1; tempBRP <= maxBRP; tempBRP++)
421 {
422 float32 Fquanta = moduleFreq / tempBRP;
423 tempTBAUD = Fquanta / baudrate;
424
425 if (tempTBAUD == 0)
426 {
427 break; /* to avoid division by 0 */
428 }
429
430 float32 tempBaudrate = Fquanta / tempTBAUD;
431 float32 error = __absf(tempBaudrate - baudrate);
432
433 if (tempTBAUD < minTBAUD)
434 {
435 break; /* below the minimum allowed limits, break is required otherwise TSEG1 and TSEG2 may result in negitive values */
436 }
437
438 if ((tempTBAUD <= maxTBAUD) && (bestError >= error))
439 {
440 bestBRP = tempBRP;
441 bestTBAUD = tempTBAUD;
442 bestError = error;
443
444 if ((tempTBAUD <= 20) && (error < 0.1))
445 {
446 break; /* optimal condition */
447 }
448 }
449 }
450
451 if ((bestBRP == 0) && (tempBRP == (maxBRP + 1)))
452 {
453 bestBRP = maxBRP;
454 bestTBAUD = maxTBAUD;
455
456 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
457 }
458
459 if ((bestBRP == 0) && (tempTBAUD < minTBAUD))
460 {
461 bestBRP = minBRP;
462 bestTBAUD = minTBAUD;
463
464 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
465 }
466
467 /* search for best sample point */
468 bestError = samplePoint * 0.25; /* 25% tolerance in sample point as max error */
469
470 if (bestTBAUD < maxTSEG1)
471 {
472 maxTSEG1 = bestTBAUD;
473 }
474
475 bestTSEG1 = maxTSEG1;
476
477 for (tempTSEG1 = maxTSEG1; tempTSEG1 >= minTSEG1; tempTSEG1--)
478 {
479 sint32 tempSamplePoint = ((tempTSEG1 + 1) * 10000) / bestTBAUD;
480 sint32 error = __abs(tempSamplePoint - samplePoint);
481
482 if (bestError > error)
483 {
484 bestTSEG1 = tempTSEG1;
485 bestError = (float)error;
486 }
487
488 if (tempSamplePoint < samplePoint)
489 {
490 /*least possible error */
491 break; /* least possible error has already occured */
492 }
493 }
494
495 bestTSEG2 = bestTBAUD - bestTSEG1 - 1;
496
497 if (bestTSEG2 > maxTSEG2)
498 {
499 bestTSEG2 = maxTSEG2;
500
501 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
502 }
503
504 if (bestTSEG2 < minTSEG2)
505 {
506 bestTSEG2 = minTSEG2;
507
508 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
509 }
510
511 /* search for best SJW */
512 bestError = 10000;
513
514 for (tempSJW = 1; tempSJW <= bestTSEG2; tempSJW++)
515 {
516 sint32 tempSyncJumpWidth = (tempSJW * 10000) / bestTBAUD;
517 sint32 error = __abs(tempSyncJumpWidth - syncJumpWidth);
518
519 if (bestError > error)
520 {
521 bestSJW = tempSJW;
522 bestError = (float)error;
523 }
524 }
525
526 {
527 node->NBTP.B.NBRP = bestBRP - 1;
528 node->NBTP.B.NSJW = bestSJW - 1;
529 node->NBTP.B.NTSEG1 = bestTSEG1 - 1;
530 node->NBTP.B.NTSEG2 = bestTSEG2 - 1;
531 }
532 }
533
534
535 void IfxCan_Node_setBitTimingValues(Ifx_CAN_N *node, uint16 syncJumpWidth, uint8 timeSegment2, uint8 timeSegment1, uint16 prescaler)
536 {
537 Ifx_CAN_N_NBTP nbtp;
538 nbtp.U = node->NBTP.U;
539 nbtp.B.NSJW = syncJumpWidth;
540 nbtp.B.NTSEG1 = timeSegment1;
541 nbtp.B.NTSEG2 = timeSegment2;
542 nbtp.B.NBRP = prescaler;
543
544 node->NBTP.U = nbtp.U;
545 }
546
547
548 void IfxCan_Node_setFastBitTiming(Ifx_CAN_N *node, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 syncJumpWidth)
549 {
550 sint32 maxBRP = IFX_CAN_N_DBTP_DBRP_MSK + 1;
551 sint32 minBRP = 1;
552 sint32 maxTSEG1 = IFX_CAN_N_DBTP_DTSEG1_MSK + 1;
553 sint32 minTSEG1 = 3;
554 sint32 maxTSEG2 = IFX_CAN_N_DBTP_DTSEG2_MSK + 1;
555 sint32 minTSEG2 = 2;
556 sint32 maxTBAUD = 0;
557 sint32 minTBAUD = 8;
558
559 sint32 tempBRP, tempSJW, tempTSEG1, tempTBAUD;
560 sint32 bestBRP = 1, bestSJW = 1, bestTBAUD = 8, bestTSEG1 = 3, bestTSEG2 = 2;
561 float32 bestError = 0;
562
563 /*
564 * Bit timing & sampling
565 * Tq = (BRP+1)/Fcan if DIV8 = 0
566 * Tq = 8*(BRP+1)/Fcan if DIV8 = 1
567 * TSync = 1.Tq
568 * TSeg1 = (TSEG1+1)*Tq >= 3Tq
569 * TSeg2 = (TSEG2+1)*Tq >= 2Tq
570 * Bit Time = TSync + TSeg1 + TSeg2 >= 8Tq
571 *
572 * Resynchronization:
573 *
574 * Tsjw = (SJW + 1)*Tq
575 * TSeg1 >= Tsjw + Tprop
576 * TSeg2 >= Tsjw
577 */
578
579 /* search for best baudrate */
580 bestError = (float32)baudrate;
581 maxTBAUD = maxTSEG1 + maxTSEG2 + 1;
582
583 for (tempBRP = 1; tempBRP <= maxBRP; tempBRP++)
584 {
585 float32 Fquanta = moduleFreq / tempBRP;
586 tempTBAUD = Fquanta / baudrate;
587
588 if (tempTBAUD == 0)
589 {
590 break; /* to avoid division by 0 */
591 }
592
593 float32 tempBaudrate = Fquanta / tempTBAUD;
594 float32 error = __absf(tempBaudrate - baudrate);
595
596 if (tempTBAUD < minTBAUD)
597 {
598 break; /* below the minimum allowed limits, break is required otherwise TSEG1 and TSEG2 may result in negitive values */
599 }
600
601 if ((tempTBAUD <= maxTBAUD) && (bestError >= error))
602 {
603 bestBRP = tempBRP;
604 bestTBAUD = tempTBAUD;
605 bestError = error;
606
607 if ((tempTBAUD <= 20) && (error < 0.1))
608 {
609 break; /* optimal condition */
610 }
611 }
612 }
613
614 if ((bestBRP == 0) && (tempBRP == (maxBRP + 1)))
615 {
616 bestBRP = maxBRP;
617 bestTBAUD = maxTBAUD;
618
619 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
620 }
621
622 if ((bestBRP == 0) && (tempTBAUD < minTBAUD))
623 {
624 bestBRP = minBRP;
625 bestTBAUD = minTBAUD;
626
627 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
628 }
629
630 /* search for best sample point */
631 bestError = samplePoint * 0.25; /* 25% tolerance in sample point as max error */
632
633 if (bestTBAUD < maxTSEG1)
634 {
635 maxTSEG1 = bestTBAUD;
636 }
637
638 bestTSEG1 = maxTSEG1;
639
640 for (tempTSEG1 = maxTSEG1; tempTSEG1 >= minTSEG1; tempTSEG1--)
641 {
642 sint32 tempSamplePoint = ((tempTSEG1 + 1) * 10000) / bestTBAUD;
643 sint32 error = __abs(tempSamplePoint - samplePoint);
644
645 if (bestError > error)
646 {
647 bestTSEG1 = tempTSEG1;
648 bestError = (float)error;
649 }
650
651 if (tempSamplePoint < samplePoint)
652 {
653 break; /* least possible error has already occured */
654 }
655 }
656
657 bestTSEG2 = bestTBAUD - bestTSEG1 - 1;
658
659 if (bestTSEG2 > maxTSEG2)
660 {
661 bestTSEG2 = maxTSEG2;
662
663 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
664 }
665
666 if (bestTSEG2 < minTSEG2)
667 {
668 bestTSEG2 = minTSEG2;
669
670 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
671 }
672
673 /* search for best SJW */
674 bestError = 10000;
675
676 for (tempSJW = 1; tempSJW <= bestTSEG2; tempSJW++)
677 {
678 sint32 tempSyncJumpWidth = (tempSJW * 10000) / bestTBAUD;
679 sint32 error = __abs(tempSyncJumpWidth - syncJumpWidth);
680
681 if (bestError > error)
682 {
683 bestSJW = tempSJW;
684 bestError = (float)error;
685 }
686 }
687
688 {
689 node->DBTP.B.DBRP = bestBRP - 1;
690 node->DBTP.B.DSJW = bestSJW - 1;
691 node->DBTP.B.DTSEG1 = bestTSEG1 - 1;
692 node->DBTP.B.DTSEG2 = bestTSEG2 - 1;
693 }
694 }
695
696
697 void IfxCan_Node_setFastBitTimingValues(Ifx_CAN_N *node, uint16 syncJumpWidth, uint8 timeSegment2, uint8 timeSegment1, uint16 prescaler)
698 {
699 Ifx_CAN_N_DBTP dbtp;
700 dbtp.U = node->DBTP.U;
701 dbtp.B.DSJW = syncJumpWidth;
702 dbtp.B.DTSEG1 = timeSegment1;
703 dbtp.B.DTSEG2 = timeSegment2;
704 dbtp.B.DBRP = prescaler;
705
706 node->DBTP.U = dbtp.U;
707 }
708
709
710 void IfxCan_Node_setFrameMode(Ifx_CAN_N *node, IfxCan_FrameMode frameMode)
711 {
712 switch (frameMode)
713 {
714 case IfxCan_FrameMode_standard:
715 node->CCCR.B.FDOE = 0;
716 node->CCCR.B.BRSE = 0;
717 break;
718 case IfxCan_FrameMode_fdLong:
719 node->CCCR.B.FDOE = 1;
720 node->CCCR.B.BRSE = 0;
721 break;
722 case IfxCan_FrameMode_fdLongAndFast:
723 node->CCCR.B.FDOE = 1;
724 node->CCCR.B.BRSE = 1;
725 break;
726 }
727 }
728
729
730 void IfxCan_Node_setFrameModeReq(Ifx_CAN_TXMSG *txBufferElement, IfxCan_FrameMode frameMode)
731 {
732 switch (frameMode)
733 {
734 case IfxCan_FrameMode_standard:
735 txBufferElement->T1.B.FDF = 0;
736 txBufferElement->T1.B.BRS = 0;
737 break;
738 case IfxCan_FrameMode_fdLong:
739 txBufferElement->T1.B.FDF = 1;
740 txBufferElement->T1.B.BRS = 0;
741 break;
742 case IfxCan_FrameMode_fdLongAndFast:
743 txBufferElement->T1.B.FDF = 1;
744 txBufferElement->T1.B.BRS = 1;
745 break;
746 }
747 }
748
749
750 void IfxCan_Node_setFrameModeRequest(Ifx_CAN_N *node, Ifx_CAN_TXMSG *txBufferElement, IfxCan_FrameMode frameMode)
751 {
752 IFX_UNUSED_PARAMETER(node);
753
754 switch (frameMode)
755 {
756 case IfxCan_FrameMode_standard:
757 txBufferElement->T1.B.FDF = 0;
758 txBufferElement->T1.B.BRS = 0;
759 break;
760 case IfxCan_FrameMode_fdLong:
761 txBufferElement->T1.B.FDF = 1;
762 txBufferElement->T1.B.BRS = 0;
763 break;
764 case IfxCan_FrameMode_fdLongAndFast:
765 txBufferElement->T1.B.FDF = 1;
766 txBufferElement->T1.B.BRS = 1;
767 break;
768 }
769 }
770
771
772 void IfxCan_Node_setGroupInterruptLine(Ifx_CAN_N *node, IfxCan_InterruptGroup interruptGroup, IfxCan_InterruptLine interruptLine)
773 {
774 if (interruptGroup <= IfxCan_InterruptGroup_loi)
775 {
776 node->GRINT1.U |= (interruptLine) << (interruptGroup * 4);
777 }
778 else
779 {
780 node->GRINT2.U |= (interruptLine) << ((interruptGroup % 8) * 4);
781 }
782 }
783
784
785 void IfxCan_Node_setInterruptLine(Ifx_CAN_N *node, IfxCan_Interrupt interrupt, IfxCan_InterruptLine interruptLine)
786 {
787 switch (interrupt)
788 {
789 case IfxCan_Interrupt_rxFifo0NewMessage:
790 node->GRINT2.B.RXF0N = interruptLine;
791 break;
792 case IfxCan_Interrupt_rxFifo0WatermarkReached:
793 case IfxCan_Interrupt_rxFifo1WatermarkReached:
794 case IfxCan_Interrupt_txEventFifoWatermarkReached:
795 node->GRINT1.B.WATI = interruptLine;
796 break;
797 case IfxCan_Interrupt_rxFifo0Full:
798 node->GRINT2.B.RXF0F = interruptLine;
799 break;
800 case IfxCan_Interrupt_rxFifo0MessageLost:
801 case IfxCan_Interrupt_rxFifo1MessageLost:
802 case IfxCan_Interrupt_txEventFifoEventLost:
803 case IfxCan_Interrupt_timestampWraparound:
804 case IfxCan_Interrupt_errorPassive:
805 case IfxCan_Interrupt_warningStatus:
806 node->GRINT1.B.ALRT = interruptLine;
807 break;
808 case IfxCan_Interrupt_rxFifo1NewMessage:
809 node->GRINT2.B.RXF1N = interruptLine;
810 break;
811 case IfxCan_Interrupt_rxFifo1Full:
812 node->GRINT2.B.RXF1F = interruptLine;
813 break;
814 case IfxCan_Interrupt_highPriorityMessage:
815 node->GRINT1.B.HPE = interruptLine;
816 break;
817 case IfxCan_Interrupt_transmissionCompleted:
818 case IfxCan_Interrupt_transmissionCancellationFinished:
819 node->GRINT2.B.TRACO = interruptLine;
820 break;
821 case IfxCan_Interrupt_txFifoEmpty:
822 node->GRINT2.B.TRAQ = interruptLine;
823 break;
824 case IfxCan_Interrupt_txEventFifoNewEntry:
825 case IfxCan_Interrupt_txEventFifoFull:
826 node->GRINT1.B.TEFIFO = interruptLine;
827 break;
828 case IfxCan_Interrupt_messageRAMAccessFailure:
829 case IfxCan_Interrupt_bitErrorCorrected:
830 case IfxCan_Interrupt_bitErrorUncorrected:
831 case IfxCan_Interrupt_watchdog:
832 node->GRINT1.B.MOER = interruptLine;
833 break;
834 case IfxCan_Interrupt_timeoutOccurred:
835 node->GRINT2.B.RETI = interruptLine;
836 break;
837 case IfxCan_Interrupt_messageStoredToDedicatedRxBuffer:
838 node->GRINT2.B.REINT = interruptLine;
839 break;
840 case IfxCan_Interrupt_errorLoggingOverflow:
841 node->GRINT1.B.SAFE = interruptLine;
842 break;
843 case IfxCan_Interrupt_busOffStatus:
844 node->GRINT1.B.BOFF = interruptLine;
845 break;
846 case IfxCan_Interrupt_protocolErrorArbitration:
847 case IfxCan_Interrupt_protocolErrorData:
848 case IfxCan_Interrupt_AccessToReservedAddress:
849 node->GRINT1.B.LOI = interruptLine;
850 break;
851 default:
852 break;
853 }
854 }
855
856
857 void IfxCan_Node_writeTxBufData(Ifx_CAN_TXMSG *txBufferElement, IfxCan_DataLengthCode dataLengthCode, uint32 *data)
858 {
859 uint32 i;
860
861 uint32 *destinationAddress = (uint32 *)txBufferElement + 2;
862 /* get number of data bytes from data length code (DLC) */
863 uint32 length = IfxCan_Node_getDataLength(dataLengthCode);
864
865 /* write data into the data section of Tx Buffer element */
866 for (i = 0; i < length; i++)
867 {
868 destinationAddress[i] = data[i];
869 }
870 }
871
872
873 void IfxCan_Node_writeData(Ifx_CAN_N *node, Ifx_CAN_TXMSG *txBufferElement, IfxCan_DataLengthCode dataLengthCode, uint32 *data)
874 {
875 IFX_UNUSED_PARAMETER(node);
876 uint32 i;
877
878 uint32 *destinationAddress = (uint32 *)txBufferElement + 2;
879 /* get number of data bytes from data length code (DLC) */
880 uint32 length = IfxCan_Node_getDataLength(dataLengthCode);
881
882 /* write data into the data section of Tx Buffer element */
883 for (i = 0; i < length; i++)
884 {
885 destinationAddress[i] = data[i];
886 }
887 }
888
889
890 void IfxCan_disableModule(Ifx_CAN *can)
891 {
892 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
893 IfxScuWdt_clearCpuEndinit(passwd);
894
895 /*Disable module */
896 can->CLC.B.DISR = 1U;
897
898 /*Wait until module is disabled*/
899 while (IfxCan_isModuleEnabled(can) == TRUE)
900 {}
901
902 IfxScuWdt_setCpuEndinit(passwd);
903 }
904
905
906 void IfxCan_enableModule(Ifx_CAN *can)
907 {
908 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
909 IfxScuWdt_clearCpuEndinit(passwd);
910
911 /*Enable module, disregard Sleep Mode request */
912 can->CLC.B.DISR = 0U;
913
914 /*Wait until module is enabled*/
915 while (IfxCan_isModuleEnabled(can) == FALSE)
916 {}
917
918 IfxScuWdt_setCpuEndinit(passwd);
919 }
920
921
922 Ifx_CAN *IfxCan_getAddress(IfxCan_Index can)
923 {
924 Ifx_CAN *module;
925
926 if (can < IFXCAN_NUM_MODULES)
927 {
928 module = (Ifx_CAN *)IfxCan_cfg_indexMap[can].module;
929 }
930 else
931 {
932 module = NULL_PTR;
933 }
934
935 return module;
936 }
937
938
939 IfxCan_Index IfxCan_getIndex(Ifx_CAN *can)
940 {
941 uint32 index;
942 IfxCan_Index result;
943
944 result = IfxCan_Index_none;
945
946 for (index = 0; index < IFXCAN_NUM_MODULES; index++)
947 {
948 if (IfxCan_cfg_indexMap[index].module == can)
949 {
950 result = (IfxCan_Index)IfxCan_cfg_indexMap[index].index;
951 break;
952 }
953 }
954
955 return result;
956 }
957
958
959 float32 IfxCan_getModuleFrequency(void)
960 {
961 float32 moduleFreq = 0;
962
963 moduleFreq = IfxScuCcu_getMcanFrequency();
964
965 return moduleFreq;
966 }
967
968
969 volatile Ifx_SRC_SRCR *IfxCan_getSrcPointer(Ifx_CAN *can, IfxCan_InterruptLine interruptLine)
970 {
971 IfxCan_Index canIndex = IfxCan_getIndex(can);
972 Ifx_SRC_CAN_CAN *const srcCanBaseAddress[IFXCAN_NUM_MODULES] = {
973 &MODULE_SRC.CAN.CAN[0],
974 &MODULE_SRC.CAN.CAN[1],
975 &MODULE_SRC.CAN.CAN[2],
976 };
977 return &(srcCanBaseAddress[canIndex]->INT[interruptLine]);
978 }
979
980
981 void IfxCan_resetModule(Ifx_CAN *can)
982 {
983 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
984
985 IfxScuWdt_clearCpuEndinit(passwd);
986 can->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
987 can->KRST1.B.RST = 1;
988 IfxScuWdt_setCpuEndinit(passwd);
989
990 while (0 == can->KRST0.B.RSTSTAT) /* Wait until reset is executed */
991
992 {}
993
994 IfxScuWdt_clearCpuEndinit(passwd);
995 can->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
996 IfxScuWdt_setCpuEndinit(passwd);
997 }
998
999
1000 void IfxCan_setClockSource(Ifx_CAN *can, IfxCan_ClockSelect clockSelect, IfxCan_ClockSource clockSource)
1001 {
1002 Ifx_CAN_MCR mcr;
1003
1004 /* enable CCCE and CI */
1005 mcr.U = can->MCR.U;
1006 mcr.B.CCCE = 1;
1007 mcr.B.CI = 1;
1008 can->MCR.U = mcr.U;
1009
1010 /* select clock */
1011 switch (clockSelect)
1012 {
1013 case IfxCan_ClockSelect_0:
1014 mcr.B.CLKSEL0 = clockSource;
1015 break;
1016 case IfxCan_ClockSelect_1:
1017 mcr.B.CLKSEL1 = clockSource;
1018 break;
1019 case IfxCan_ClockSelect_2:
1020 mcr.B.CLKSEL2 = clockSource;
1021 break;
1022 case IfxCan_ClockSelect_3:
1023 mcr.B.CLKSEL3 = clockSource;
1024 break;
1025 }
1026
1027 can->MCR.U = mcr.U;
1028
1029 /* disable CCCE and CI */
1030 mcr.B.CCCE = 0;
1031 mcr.B.CI = 0;
1032 can->MCR.U = mcr.U;
1033 }
1034
1035
1036 uint32 IfxCan_Node_getDataLengthInBytes(IfxCan_DataLengthCode dataLengthCode)
1037 {
1038 uint32 numBytes;
1039
1040 if (dataLengthCode <= IfxCan_DataLengthCode_8)
1041 {
1042 numBytes = (uint32)dataLengthCode;
1043 }
1044 else if (dataLengthCode <= IfxCan_DataLengthCode_24)
1045 {
1046 numBytes = ((uint32)dataLengthCode - 6) << 2;
1047 }
1048 else
1049 {
1050 numBytes = ((uint32)dataLengthCode - 11) << 4;
1051 }
1052
1053 return numBytes;
1054 }
IfxCan_Node_getRxFifo0DataFieldSize
uint8 IfxCan_Node_getRxFifo0DataFieldSize(Ifx_CAN_N *node)
Returns Rx FIFO 0 Data Field Size in bytes.
Definition: IfxCan.c:213
IfxCan_Node_setBitTiming
void IfxCan_Node_setBitTiming(Ifx_CAN_N *node, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 syncJumpWidth)
Calculates and Sets the CAN baudrate for standard frames and arbitration phase of CAND FD frames...
Definition: IfxCan.c:385
IfxCan_Interrupt_rxFifo0MessageLost
Rx FIFO 0 Message Lost Interrupt.
Definition: IfxCan.h:204
IfxCan_Node_getDataLength
uint32 IfxCan_Node_getDataLength(IfxCan_DataLengthCode dataLengthCode)
Converts data length code (DLC) into number of words.
Definition: IfxCan.c:71
IfxCan_Node_getExtendedFilterElementAddress
Ifx_CAN_EXTMSG * IfxCan_Node_getExtendedFilterElementAddress(uint32 ramBaseAddress, uint16 extendedFilterListStartAddress, uint8 filterNumber)
Returns the address of selected extended filter element.
Definition: IfxCan.c:114
IfxCan_Node_getRxBufferElementAddress
Ifx_CAN_RXMSG * IfxCan_Node_getRxBufferElementAddress(Ifx_CAN_N *node, uint32 ramBaseAddress, uint16 rxBuffersStartAddress, IfxCan_RxBufferId rxBufferNumber)
Returns the address of selected Rx buffer element.
Definition: IfxCan.c:200
IfxCan_Index_none
Not Selected.
Definition: IfxCan_cfg.h:85
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxCan_Txd_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxCan_PinMap.h:70
IfxCan_Node_initTxPin
boolean IfxCan_Node_initTxPin(IfxCan_Txd_Out *txd, IfxPort_OutputMode mode, IfxPort_PadDriver padDriver)
Select and initialise the CAN node transmit pin.
Definition: IfxCan.c:341
IfxCan_Node_getStandardFilterElementAddress
Ifx_CAN_STDMSG * IfxCan_Node_getStandardFilterElementAddress(uint32 ramBaseAddress, uint16 standardFilterListStartAddress, uint8 filterNumber)
Returns the address of selected standard filter element.
Definition: IfxCan.c:277
IfxCan_FrameMode_standard
Standard CAN frame (transmit and receive)
Definition: IfxCan.h:180
IfxCan_Interrupt_timeoutOccurred
Timeout Occurred Interrupt.
Definition: IfxCan.h:219
IfxCan_Node_isRxBufferNewDataUpdated
boolean IfxCan_Node_isRxBufferNewDataUpdated(Ifx_CAN_N *node, IfxCan_RxBufferId rxBufferId)
Returns the status of whether the selcted Rx buffer has been updated from new data.
Definition: IfxCan.c:350
IfxCan_Interrupt_rxFifo0Full
Rx FIFO 0 Full Interrupt.
Definition: IfxCan.h:203
IfxCan_Interrupt_AccessToReservedAddress
Access to Reserved Address Interrupt.
Definition: IfxCan.h:230
IfxCan_FrameMode
IfxCan_FrameMode
CAN Frame mode Description in Ifx_CAN.N[x].CCCR.CME, (x= 0 to 3)
Definition: IfxCan.h:178
IfxCan_RxBufferId_32
Rx buffer 32.
Definition: IfxCan.h:346
IfxCan_Interrupt_protocolErrorArbitration
Protocol Error in Arbitration phase Interrupt.
Definition: IfxCan.h:228
IfxCan_Node_getDataLengthFromCode
uint32 IfxCan_Node_getDataLengthFromCode(Ifx_CAN_N *node, IfxCan_DataLengthCode dataLengthCode)
Converts data length code (DLC) into number of data words. This function is deprecated. Use new function IfxCan_Node_getDataLength.
Definition: IfxCan.c:92
IfxCan_Node_setGroupInterruptLine
void IfxCan_Node_setGroupInterruptLine(Ifx_CAN_N *node, IfxCan_InterruptGroup interruptGroup, IfxCan_InterruptLine interruptLine)
Sets the slected interrupt to the selcted interrupt line.
Definition: IfxCan.c:772
IfxCan_Interrupt_messageStoredToDedicatedRxBuffer
Message stored to Dedicated Rx Buffer Interrupt.
Definition: IfxCan.h:220
IfxCan_enableModule
void IfxCan_enableModule(Ifx_CAN *can)
Enables the module (clears the disable request)
Definition: IfxCan.c:906
IfxCan_Interrupt_errorLoggingOverflow
Error Logging Overflow Interrupt.
Definition: IfxCan.h:223
IfxCan_Interrupt_rxFifo0NewMessage
Rx FIFO 0 New Message Interrupt.
Definition: IfxCan.h:201
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:140
IfxCan_Interrupt_warningStatus
Warning Status Interrupt.
Definition: IfxCan.h:225
IfxCan_Node_setFrameMode
void IfxCan_Node_setFrameMode(Ifx_CAN_N *node, IfxCan_FrameMode frameMode)
Enables the CAN frame mode for transmission.
Definition: IfxCan.c:710
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxCan_Node_getRxFifo1ElementAddress
Ifx_CAN_RXMSG * IfxCan_Node_getRxFifo1ElementAddress(Ifx_CAN_N *node, uint32 ramBaseAddress, uint16 rxFifo1StartAddress, IfxCan_RxBufferId rxBufferNumber)
Returns the address of selected Rx FIFO 1 element.
Definition: IfxCan.c:264
float32
float float32
Definition: Platform_Types.h:170
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:322
IfxCan_Node_writeData
void IfxCan_Node_writeData(Ifx_CAN_N *node, Ifx_CAN_TXMSG *txBufferElement, IfxCan_DataLengthCode dataLengthCode, uint32 *data)
Writes Data into Tx buffer element. This function is deprecated. Use new function IfxCan_Node_writeTx...
Definition: IfxCan.c:873
IfxCan_ClockSource
IfxCan_ClockSource
Type of Clock Source selection Description in Ifx_CAN.MCR.CLKSELx, (x = 0,1,2)
Definition: IfxCan.h:106
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxCan_FrameMode_fdLong
CAN FD long frame in transmit and CAN FD long and fast frame in receive.
Definition: IfxCan.h:181
IfxCan_isModuleEnabled
IFX_INLINE boolean IfxCan_isModuleEnabled(Ifx_CAN *can)
Returns the status of module enabled or disabled.
Definition: IfxCan.h:2427
IfxCan_Interrupt_rxFifo1MessageLost
Rx FIFO 1 Message Lost Interrupt.
Definition: IfxCan.h:208
IfxCan_Interrupt_highPriorityMessage
High Priority Message Interrupt.
Definition: IfxCan.h:209
IfxCan_InterruptGroup_loi
Last Error Interrupts.
Definition: IfxCan.h:245
IfxCan_disableModule
void IfxCan_disableModule(Ifx_CAN *can)
Disables the module (sets the disable request)
Definition: IfxCan.c:890
IfxCan_DataLengthCode_64
64 data bytes
Definition: IfxCan.h:148
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxCan_Interrupt_watchdog
Watchdog Interrupt.
Definition: IfxCan.h:227
IfxCan_Interrupt_protocolErrorData
Protocol Error in Data phase Interrupt.
Definition: IfxCan.h:229
IfxPort_setPinModeInput
IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode.
Definition: IfxPort.h:669
IfxCan_Interrupt_messageRAMAccessFailure
Message RAM Access Failure Interrupt.
Definition: IfxCan.h:218
IfxCan_Node_setInterruptLine
void IfxCan_Node_setInterruptLine(Ifx_CAN_N *node, IfxCan_Interrupt interrupt, IfxCan_InterruptLine interruptLine)
Sets the slected interrupt to the selcted interrupt line.
Definition: IfxCan.c:785
IfxCan_ClockSelect_0
clock selection 0
Definition: IfxCan.h:97
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxCan_Node_getDataLengthInBytes
uint32 IfxCan_Node_getDataLengthInBytes(IfxCan_DataLengthCode dataLengthCode)
Converts data length code (DLC) into number of bytes.
Definition: IfxCan.c:1036
IfxCan_Interrupt_txEventFifoFull
Tx Event FIFO Full Interrupt.
Definition: IfxCan.h:215
IfxCan_RxBufferId
IfxCan_RxBufferId
Rx Buffer number.
Definition: IfxCan.h:312
IfxCan_Interrupt_rxFifo1WatermarkReached
Rx FIFO 1 Watermark Reached Interrupt.
Definition: IfxCan.h:206
IfxCan_Node_setFastBitTiming
void IfxCan_Node_setFastBitTiming(Ifx_CAN_N *node, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 syncJumpWidth)
Calulates and Sets the CAN fast baudrate for CAN FD frames data phase.
Definition: IfxCan.c:548
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
__absf
#define __absf
Definition: IfxCpu_IntrinsicsDcc.h:1629
IfxCan_Node_setFrameModeRequest
void IfxCan_Node_setFrameModeRequest(Ifx_CAN_N *node, Ifx_CAN_TXMSG *txBufferElement, IfxCan_FrameMode frameMode)
Sets CAN frame mode request for transmission. This function is deprecated. Use new function IfxCan_No...
Definition: IfxCan.c:750
IfxCan_Interrupt_transmissionCompleted
Transmission Completed Interrupt.
Definition: IfxCan.h:210
IfxCan_Node_getTxBufferElementAddress
Ifx_CAN_TXMSG * IfxCan_Node_getTxBufferElementAddress(Ifx_CAN_N *node, uint32 ramBaseAddress, uint16 txBuffersStartAddress, IfxCan_TxBufferId txBufferNumber)
Returns the address of selected Tx buffer element.
Definition: IfxCan.c:307
IfxCan_Interrupt_bitErrorCorrected
Bit Error Corrected Interrupt.
Definition: IfxCan.h:221
IfxCan_Node_writeTxBufData
void IfxCan_Node_writeTxBufData(Ifx_CAN_TXMSG *txBufferElement, IfxCan_DataLengthCode dataLengthCode, uint32 *data)
Writes Data into Tx buffer element Node_writeTxBufData.
Definition: IfxCan.c:857
IfxCan_Rxd_In
RXD pin mapping structure.
Definition: IfxCan_PinMap.h:56
IfxCan_Rxd_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxCan_PinMap.h:61
IfxCan_DataFieldSize
IfxCan_DataFieldSize
Data Field Size Definition in Ifx_CAN.N[x]TX.ESC.B.TBDS, Ifx_CAN.N[x].RX.ESC.B.RBDS, Ifx_CAN.N[x].RX.ESC.B.FyDS (x= 0,1,2,3; y = 0, 1)
Definition: IfxCan.h:117
IfxCan_Node_getRxFifo1DataFieldSize
uint8 IfxCan_Node_getRxFifo1DataFieldSize(Ifx_CAN_N *node)
Returns Rx FIFO 1 Data Field Size in bytes.
Definition: IfxCan.c:245
IfxCan_Node_readData
void IfxCan_Node_readData(Ifx_CAN_RXMSG *rxBufferElement, IfxCan_DataLengthCode dataLengthCode, uint32 *data)
Reads data from Rx buffer element.
Definition: IfxCan.c:370
IfxCan_TxBufferId
IfxCan_TxBufferId
Tx Buffer number.
Definition: IfxCan.h:435
IfxCan_Interrupt_txEventFifoWatermarkReached
Tx Event FIFO Watermark Reached Interrupt.
Definition: IfxCan.h:214
IfxCan_ClockSelect
IfxCan_ClockSelect
Clock selection option Description in Ifx_CAN.MCR.CLKSELx, (x = 0,1,2)
Definition: IfxCan.h:95
IfxCan_Interrupt_txFifoEmpty
Tx FIFO Empty Interrupt.
Definition: IfxCan.h:212
IfxCan_Interrupt_rxFifo1NewMessage
Rx FIFO 1 New Message Interrupt.
Definition: IfxCan.h:205
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:249
IfxCan_Node_getTxBufferDataFieldSize
uint8 IfxCan_Node_getTxBufferDataFieldSize(Ifx_CAN_N *node)
Returns Tx Buffer Data Field Size in bytes.
Definition: IfxCan.c:288
IfxCan_Interrupt_rxFifo1Full
Rx FIFO 1 Full Interrupt.
Definition: IfxCan.h:207
IfxCan_Interrupt_transmissionCancellationFinished
Transmission Cancellation Finished Interrupt.
Definition: IfxCan.h:211
IfxCan_Node_clearRxBufferNewDataFlag
void IfxCan_Node_clearRxBufferNewDataFlag(Ifx_CAN_N *node, IfxCan_RxBufferId rxBufferId)
Clears the New Data flag of the selected Rx buffer.
Definition: IfxCan.c:54
IfxCan_Interrupt_errorPassive
Error Passive Interrupt.
Definition: IfxCan.h:224
IfxCan_DataLengthCode_8
8 data bytes
Definition: IfxCan.h:141
IfxCan_Txd_Out
TXD pin mapping structure.
Definition: IfxCan_PinMap.h:65
IfxCan_ClockSelect_3
clock selection 3
Definition: IfxCan.h:100
IfxCan_getIndex
IfxCan_Index IfxCan_getIndex(Ifx_CAN *can)
API to get the resource index of the CAN specified.
Definition: IfxCan.c:939
IfxCan_Node_initRxPin
boolean IfxCan_Node_initRxPin(Ifx_CAN_N *node, IfxCan_Rxd_In *rxd, IfxPort_InputMode mode, IfxPort_PadDriver padDriver)
Select and initialise the CAN node receive pin.
Definition: IfxCan.c:331
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:151
IfxScuCcu_getMcanFrequency
float32 IfxScuCcu_getMcanFrequency(void)
API to get MCAN divider frequency. This API returns the based on the divider value in CCUCON register...
Definition: IfxScuCcu.c:276
IfxCan_Node_getFrameMode
IfxCan_FrameMode IfxCan_Node_getFrameMode(Ifx_CAN_RXMSG *rxBufferElement)
Returns CAN frame mode of operation for a received frame.
Definition: IfxCan.c:125
IfxCan_Node_getRxBufferDataFieldSize
uint8 IfxCan_Node_getRxBufferDataFieldSize(Ifx_CAN_N *node)
Returns Rx Buffer Data Field Size in bytes.
Definition: IfxCan.c:181
IfxCan_Interrupt_bitErrorUncorrected
Bit Error Uncorrected Interrupt.
Definition: IfxCan.h:222
IfxCan_ClockSelect_2
clock selection 2
Definition: IfxCan.h:99
boolean
unsigned char boolean
Definition: Platform_Types.h:104
IfxCan.h
CAN basic functionality.
IfxCan_FrameMode_fdLongAndFast
CAN FD long and fast frames (transmit and receive)
Definition: IfxCan.h:182
IfxCan_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxCan_cfg_indexMap[IFXCAN_NUM_MODULES]
Definition: IfxCan_cfg.c:52
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IFXCAN_NUM_MODULES
#define IFXCAN_NUM_MODULES
Number of CAN modules.
Definition: IfxCan_cfg.h:69
IfxCan_resetModule
void IfxCan_resetModule(Ifx_CAN *can)
resets CAN kernel
Definition: IfxCan.c:981
IfxCan_getAddress
Ifx_CAN * IfxCan_getAddress(IfxCan_Index can)
Definition: IfxCan.c:922
IfxCan_Interrupt_timestampWraparound
Timestamp Wraparound Interrupt.
Definition: IfxCan.h:217
__abs
sint32 __abs(sint32) __attribute__((intrinsic_pseudo(1
IfxCan_Node_getFrameModeFromTxEventFifo
IfxCan_FrameMode IfxCan_Node_getFrameModeFromTxEventFifo(Ifx_CAN_TXEVENT *txEventFifoElement)
Returns CAN frame mode of operation for a Tx Event Fifo Element.
Definition: IfxCan.c:153
IfxCan_Interrupt_txEventFifoNewEntry
Tx Event FIFO New Entry Interrupt.
Definition: IfxCan.h:213
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:81
sint32
long sint32
Definition: Platform_Types.h:134
IfxCan_Rxd_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxCan_PinMap.h:60
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxCan_InterruptLine
IfxCan_InterruptLine
Interrupt line number INT_Ox (x= 0 - 15) .
Definition: IfxCan.h:258
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:248
IfxCan_Node_getTxEventFifoElementAddress
Ifx_CAN_TXEVENT * IfxCan_Node_getTxEventFifoElementAddress(uint32 ramBaseAddress, uint16 txEventFifoStartAddress, uint8 txEventFifoNumber)
Returns the address of selected Tx Event Fifo element.
Definition: IfxCan.c:320
IfxCan_DataLengthCode_24
24 data bytes
Definition: IfxCan.h:145
IfxCan_DataLengthCode
IfxCan_DataLengthCode
Data Length code of the Message.
Definition: IfxCan.h:131
IfxCan_Index
IfxCan_Index
List of the available can resources.
Definition: IfxCan_cfg.h:83
IfxCan_Node_setFrameModeReq
void IfxCan_Node_setFrameModeReq(Ifx_CAN_TXMSG *txBufferElement, IfxCan_FrameMode frameMode)
Sets CAN frame mode request for transmission.
Definition: IfxCan.c:730
IfxCan_Node_getRxFifo0ElementAddress
Ifx_CAN_RXMSG * IfxCan_Node_getRxFifo0ElementAddress(Ifx_CAN_N *node, uint32 ramBaseAddress, uint16 rxFifo0StartAddress, IfxCan_RxBufferId rxBufferNumber)
Returns the address of selected Rx FIFO 0 element.
Definition: IfxCan.c:232
IfxCan_InterruptGroup
IfxCan_InterruptGroup
Type of interrupt Definition in Ifx_CAN.GRINT[x] (x= 0 , 1)
Definition: IfxCan.h:236
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxCan_Interrupt_busOffStatus
Bus_Off Status Interrupt.
Definition: IfxCan.h:226
IfxCan_getModuleFrequency
float32 IfxCan_getModuleFrequency(void)
Returns the operatinf frequency of the CAN module.
Definition: IfxCan.c:959
IfxCan_Node_setFastBitTimingValues
void IfxCan_Node_setFastBitTimingValues(Ifx_CAN_N *node, uint16 syncJumpWidth, uint8 timeSegment2, uint8 timeSegment1, uint16 prescaler)
Sets the values of CAN fast baudrate for CAN FD frames data phase.
Definition: IfxCan.c:697
IfxCan_ClockSelect_1
clock selection 1
Definition: IfxCan.h:98
IfxCan_getSrcPointer
volatile Ifx_SRC_SRCR * IfxCan_getSrcPointer(Ifx_CAN *can, IfxCan_InterruptLine interruptLine)
Returns the address of interrupt node source register.
Definition: IfxCan.c:969
IfxCan_Node_setBitTimingValues
void IfxCan_Node_setBitTimingValues(Ifx_CAN_N *node, uint16 syncJumpWidth, uint8 timeSegment2, uint8 timeSegment1, uint16 prescaler)
Sets the values of CAN baudrate for standard frames.
Definition: IfxCan.c:535
TRUE
#define TRUE
Definition: Platform_Types.h:90
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxCan_DataFieldSize_32
32 byte data field
Definition: IfxCan.h:124
IfxCan_Interrupt_rxFifo0WatermarkReached
Rx FIFO 0 Watermark Reached Interrupt.
Definition: IfxCan.h:202
IfxCan_Interrupt
IfxCan_Interrupt
Type of interrupt Definition in Ifx_CAN.N[x].IE, Ifx_CAN.N[x].IR, Ifx_CAN.N[x].ILS, (x= 0 to 3)
Definition: IfxCan.h:199
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:675
IfxCan_Interrupt_txEventFifoEventLost
Tx Event FIFO Event Lost Interrupt.
Definition: IfxCan.h:216
IfxCan_setClockSource
void IfxCan_setClockSource(Ifx_CAN *can, IfxCan_ClockSelect clockSelect, IfxCan_ClockSource clockSource)
sets the clocksource selection
Definition: IfxCan.c:1000


iLLD_TC38A: IfxCan.h Source File

  • Can
  • Std
IfxCan.h
Go to the documentation of this file.
1 /**
2 * \file IfxCan.h
3 * \brief CAN basic functionality
4 * \ingroup IfxLld_Can
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 *
43 *
44 * \defgroup IfxLld_Can_Std_Enum Enumerations
45 * \ingroup IfxLld_Can_Std
46 * \defgroup IfxLld_Can_Std_Data_Structures Data Structures
47 * \ingroup IfxLld_Can_Std
48 * \defgroup IfxLld_Can_Std_Node_Functions Node Functions
49 * \ingroup IfxLld_Can_Std
50 * \defgroup IfxLld_Can_Std_Tx_Element_Functions Tx Element Functions
51 * \ingroup IfxLld_Can_Std
52 * \defgroup IfxLld_Can_Std_Rx_Element_Functions Rx Element Functions
53 * \ingroup IfxLld_Can_Std
54 * \defgroup IfxLld_Can_Std_Filter_Functions Filter Functions
55 * \ingroup IfxLld_Can_Std
56 * \defgroup IfxLld_Can_Std_Interrupt_Functions Interrupt Functions
57 * \ingroup IfxLld_Can_Std
58 * \defgroup IfxLld_Can_Std_Module_Functions Module Functions
59 * \ingroup IfxLld_Can_Std
60 * \defgroup IfxLld_Can_Std_Tx_Event_FIFO_Element_Functions Tx Event FIFO Element Functions
61 * \ingroup IfxLld_Can_Std
62 */
63
64 #ifndef IFXCAN_H
65 #define IFXCAN_H 1
66
67 /******************************************************************************/
68 /*----------------------------------Includes----------------------------------*/
69 /******************************************************************************/
70
71 #include "_Impl/IfxCan_cfg.h"
72 #include "Cpu/Std/IfxCpu_Intrinsics.h"
73 #include "_Utilities/Ifx_Assert.h"
74 #include "_PinMap/IfxCan_PinMap.h"
75 #include "Scu/Std/IfxScuCcu.h"
76 #include "Src/Std/IfxSrc.h"
77
78 /******************************************************************************/
79 /*--------------------------------Enumerations--------------------------------*/
80 /******************************************************************************/
81
82 /** \addtogroup IfxLld_Can_Std_Enum
83 * \{ */
84 /** \brief Status of warning limit for error counters in CAN node
85 */
86 typedef enum
87 {
88 IfxCan_CanNodeErrorWarningLimitStatus_notReached = 0, /**< \brief Error counters are below the warning limit */
89 IfxCan_CanNodeErrorWarningLimitStatus_reached = 1 /**< \brief Error counter reached the warning limit */
90 } IfxCan_CanNodeErrorWarningLimitStatus;
91
92 /** \brief Clock selection option\n
93 * Description in Ifx_CAN.MCR.CLKSELx, (x = 0,1,2)
94 */
95 typedef enum
96 {
97 IfxCan_ClockSelect_0, /**< \brief clock selection 0 */
98 IfxCan_ClockSelect_1, /**< \brief clock selection 1 */
99 IfxCan_ClockSelect_2, /**< \brief clock selection 2 */
100 IfxCan_ClockSelect_3 /**< \brief clock selection 3 */
101 } IfxCan_ClockSelect;
102
103 /** \brief Type of Clock Source selection\n
104 * Description in Ifx_CAN.MCR.CLKSELx, (x = 0,1,2)
105 */
106 typedef enum
107 {
108 IfxCan_ClockSource_noClock = 0, /**< \brief No clock is switched on */
109 IfxCan_ClockSource_asynchronous = 1, /**< \brief The Asynchronous clock source is switched on */
110 IfxCan_ClockSource_synchronous = 2, /**< \brief The Synchronous clock source is switched on */
111 IfxCan_ClockSource_both = 3 /**< \brief Both clock sources are switched on */
112 } IfxCan_ClockSource;
113
114 /** \brief Data Field Size\n
115 * Definition in Ifx_CAN.N[x]TX.ESC.B.TBDS, Ifx_CAN.N[x].RX.ESC.B.RBDS, Ifx_CAN.N[x].RX.ESC.B.FyDS (x= 0,1,2,3; y = 0, 1)
116 */
117 typedef enum
118 {
119 IfxCan_DataFieldSize_8, /**< \brief 8 byte data field */
120 IfxCan_DataFieldSize_12, /**< \brief 12 byte data field */
121 IfxCan_DataFieldSize_16, /**< \brief 16 byte data field */
122 IfxCan_DataFieldSize_20, /**< \brief 20 byte data field */
123 IfxCan_DataFieldSize_24, /**< \brief 24 byte data field */
124 IfxCan_DataFieldSize_32, /**< \brief 32 byte data field */
125 IfxCan_DataFieldSize_48, /**< \brief 48 byte data field */
126 IfxCan_DataFieldSize_64 /**< \brief 64 byte data field */
127 } IfxCan_DataFieldSize;
128
129 /** \brief Data Length code of the Message
130 */
131 typedef enum
132 {
133 IfxCan_DataLengthCode_0, /**< \brief 0 data bytes */
134 IfxCan_DataLengthCode_1, /**< \brief 1 data bytes */
135 IfxCan_DataLengthCode_2, /**< \brief 2 data bytes */
136 IfxCan_DataLengthCode_3, /**< \brief 3 data bytes */
137 IfxCan_DataLengthCode_4, /**< \brief 4 data bytes */
138 IfxCan_DataLengthCode_5, /**< \brief 5 data bytes */
139 IfxCan_DataLengthCode_6, /**< \brief 6 data bytes */
140 IfxCan_DataLengthCode_7, /**< \brief 7 data bytes */
141 IfxCan_DataLengthCode_8, /**< \brief 8 data bytes */
142 IfxCan_DataLengthCode_12, /**< \brief 12 data bytes */
143 IfxCan_DataLengthCode_16, /**< \brief 16 data bytes */
144 IfxCan_DataLengthCode_20, /**< \brief 20 data bytes */
145 IfxCan_DataLengthCode_24, /**< \brief 24 data bytes */
146 IfxCan_DataLengthCode_32, /**< \brief 32 data bytes */
147 IfxCan_DataLengthCode_48, /**< \brief 48 data bytes */
148 IfxCan_DataLengthCode_64 /**< \brief 64 data bytes */
149 } IfxCan_DataLengthCode;
150
151 /** \brief Filter Element Configuration
152 */
153 typedef enum
154 {
155 IfxCan_FilterElementConfiguration_disable, /**< \brief Disable filter element */
156 IfxCan_FilterElementConfiguration_storeInRxFifo0, /**< \brief Store in Rx FIFO 0 if filter matches */
157 IfxCan_FilterElementConfiguration_storeInRxFifo1, /**< \brief Store in Rx FIFO 1 if filter matches */
158 IfxCan_FilterElementConfiguration_rejectId, /**< \brief Reject ID if filter matches */
159 IfxCan_FilterElementConfiguration_setPriority, /**< \brief Set priority if filter matches */
160 IfxCan_FilterElementConfiguration_setPriorityAndStoreInFifo0, /**< \brief Set priority and store in FIFO 0 if filter matches */
161 IfxCan_FilterElementConfiguration_setPriorityAndStoreInFifo1, /**< \brief Set priority and store in FIFO 1 if filter matches */
162 IfxCan_FilterElementConfiguration_storeInRxBuffer /**< \brief Store into Rx Buffer */
163 } IfxCan_FilterElementConfiguration;
164
165 /** \brief Filter Type
166 */
167 typedef enum
168 {
169 IfxCan_FilterType_range, /**< \brief Range filter from SF1ID to SF2ID (SF2ID is greater than SF1ID) */
170 IfxCan_FilterType_dualId, /**< \brief Dual ID filter for SF1ID or SF2ID */
171 IfxCan_FilterType_classic, /**< \brief Classic filter: SF1ID = filter, SF2ID = mask */
172 IfxCan_FilterType_none /**< \brief Reserved */
173 } IfxCan_FilterType;
174
175 /** \brief CAN Frame mode\n
176 * Description in Ifx_CAN.N[x].CCCR.CME, (x= 0 to 3)
177 */
178 typedef enum
179 {
180 IfxCan_FrameMode_standard, /**< \brief Standard CAN frame (transmit and receive) */
181 IfxCan_FrameMode_fdLong, /**< \brief CAN FD long frame in transmit and CAN FD long and fast frame in receive */
182 IfxCan_FrameMode_fdLongAndFast /**< \brief CAN FD long and fast frames (transmit and receive) */
183 } IfxCan_FrameMode;
184
185 /** \brief CAN frame type
186 */
187 typedef enum
188 {
189 IfxCan_FrameType_receive, /**< \brief Data frame is received */
190 IfxCan_FrameType_transmit, /**< \brief Data frame is generated */
191 IfxCan_FrameType_transmitAndReceive, /**< \brief for both transmit and receive frames */
192 IfxCan_FrameType_remoteRequest, /**< \brief Remote request frame is generated */
193 IfxCan_FrameType_remoteAnswer /**< \brief Answer frame is generated on reception of the corresponding remote request */
194 } IfxCan_FrameType;
195
196 /** \brief Type of interrupt\n
197 * Definition in Ifx_CAN.N[x].IE, Ifx_CAN.N[x].IR, Ifx_CAN.N[x].ILS, (x= 0 to 3)
198 */
199 typedef enum
200 {
201 IfxCan_Interrupt_rxFifo0NewMessage, /**< \brief Rx FIFO 0 New Message Interrupt */
202 IfxCan_Interrupt_rxFifo0WatermarkReached, /**< \brief Rx FIFO 0 Watermark Reached Interrupt */
203 IfxCan_Interrupt_rxFifo0Full, /**< \brief Rx FIFO 0 Full Interrupt */
204 IfxCan_Interrupt_rxFifo0MessageLost, /**< \brief Rx FIFO 0 Message Lost Interrupt */
205 IfxCan_Interrupt_rxFifo1NewMessage, /**< \brief Rx FIFO 1 New Message Interrupt */
206 IfxCan_Interrupt_rxFifo1WatermarkReached, /**< \brief Rx FIFO 1 Watermark Reached Interrupt */
207 IfxCan_Interrupt_rxFifo1Full, /**< \brief Rx FIFO 1 Full Interrupt */
208 IfxCan_Interrupt_rxFifo1MessageLost, /**< \brief Rx FIFO 1 Message Lost Interrupt */
209 IfxCan_Interrupt_highPriorityMessage, /**< \brief High Priority Message Interrupt */
210 IfxCan_Interrupt_transmissionCompleted, /**< \brief Transmission Completed Interrupt */
211 IfxCan_Interrupt_transmissionCancellationFinished, /**< \brief Transmission Cancellation Finished Interrupt */
212 IfxCan_Interrupt_txFifoEmpty, /**< \brief Tx FIFO Empty Interrupt */
213 IfxCan_Interrupt_txEventFifoNewEntry, /**< \brief Tx Event FIFO New Entry Interrupt */
214 IfxCan_Interrupt_txEventFifoWatermarkReached, /**< \brief Tx Event FIFO Watermark Reached Interrupt */
215 IfxCan_Interrupt_txEventFifoFull, /**< \brief Tx Event FIFO Full Interrupt */
216 IfxCan_Interrupt_txEventFifoEventLost, /**< \brief Tx Event FIFO Event Lost Interrupt */
217 IfxCan_Interrupt_timestampWraparound, /**< \brief Timestamp Wraparound Interrupt */
218 IfxCan_Interrupt_messageRAMAccessFailure, /**< \brief Message RAM Access Failure Interrupt */
219 IfxCan_Interrupt_timeoutOccurred, /**< \brief Timeout Occurred Interrupt */
220 IfxCan_Interrupt_messageStoredToDedicatedRxBuffer, /**< \brief Message stored to Dedicated Rx Buffer Interrupt */
221 IfxCan_Interrupt_bitErrorCorrected, /**< \brief Bit Error Corrected Interrupt */
222 IfxCan_Interrupt_bitErrorUncorrected, /**< \brief Bit Error Uncorrected Interrupt */
223 IfxCan_Interrupt_errorLoggingOverflow, /**< \brief Error Logging Overflow Interrupt */
224 IfxCan_Interrupt_errorPassive, /**< \brief Error Passive Interrupt */
225 IfxCan_Interrupt_warningStatus, /**< \brief Warning Status Interrupt */
226 IfxCan_Interrupt_busOffStatus, /**< \brief Bus_Off Status Interrupt */
227 IfxCan_Interrupt_watchdog, /**< \brief Watchdog Interrupt */
228 IfxCan_Interrupt_protocolErrorArbitration, /**< \brief Protocol Error in Arbitration phase Interrupt */
229 IfxCan_Interrupt_protocolErrorData, /**< \brief Protocol Error in Data phase Interrupt */
230 IfxCan_Interrupt_AccessToReservedAddress /**< \brief Access to Reserved Address Interrupt */
231 } IfxCan_Interrupt;
232
233 /** \brief Type of interrupt\n
234 * Definition in Ifx_CAN.GRINT[x] (x= 0 , 1)
235 */
236 typedef enum
237 {
238 IfxCan_InterruptGroup_tefifo, /**< \brief Transmit Event FIFO Incidents */
239 IfxCan_InterruptGroup_hpe, /**< \brief High Priority Events */
240 IfxCan_InterruptGroup_wati, /**< \brief Watermark interrupts are mapped here. */
241 IfxCan_InterruptGroup_alrt, /**< \brief Alerts */
242 IfxCan_InterruptGroup_moer, /**< \brief Module errors */
243 IfxCan_InterruptGroup_safe, /**< \brief Safety counter overflow */
244 IfxCan_InterruptGroup_boff, /**< \brief Bus Off */
245 IfxCan_InterruptGroup_loi, /**< \brief Last Error Interrupts */
246 IfxCan_InterruptGroup_reint, /**< \brief Message stored in dedicated receive buffer interrupt (IR.DRX) */
247 IfxCan_InterruptGroup_rxf1f, /**< \brief Receive FIFO1 full interrupt */
248 IfxCan_InterruptGroup_rxf0f, /**< \brief Receive FIFO0 full interrupt */
249 IfxCan_InterruptGroup_rxf1n, /**< \brief Receive FIFO1 new message Interrupt */
250 IfxCan_InterruptGroup_rxf0n, /**< \brief Receive FIFO0 new message Interrupt */
251 IfxCan_InterruptGroup_reti, /**< \brief Receive timeouts */
252 IfxCan_InterruptGroup_traq, /**< \brief Transmission Queue Events */
253 IfxCan_InterruptGroup_traco /**< \brief Interrupts of the transmission control */
254 } IfxCan_InterruptGroup;
255
256 /** \brief Interrupt line number INT_Ox (x= 0 - 15) \n
257 */
258 typedef enum
259 {
260 IfxCan_InterruptLine_0, /**< \brief Interrupt Line 0 */
261 IfxCan_InterruptLine_1, /**< \brief Interrupt Line 1 */
262 IfxCan_InterruptLine_2, /**< \brief Interrupt Line 2 */
263 IfxCan_InterruptLine_3, /**< \brief Interrupt Line 3 */
264 IfxCan_InterruptLine_4, /**< \brief Interrupt Line 4 */
265 IfxCan_InterruptLine_5, /**< \brief Interrupt Line 5 */
266 IfxCan_InterruptLine_6, /**< \brief Interrupt Line 6 */
267 IfxCan_InterruptLine_7, /**< \brief Interrupt Line 7 */
268 IfxCan_InterruptLine_8, /**< \brief Interrupt Line 8 */
269 IfxCan_InterruptLine_9, /**< \brief Interrupt Line 9 */
270 IfxCan_InterruptLine_10, /**< \brief Interrupt Line 10 */
271 IfxCan_InterruptLine_11, /**< \brief Interrupt Line 11 */
272 IfxCan_InterruptLine_12, /**< \brief Interrupt Line 12 */
273 IfxCan_InterruptLine_13, /**< \brief Interrupt Line 13 */
274 IfxCan_InterruptLine_14, /**< \brief Interrupt Line 14 */
275 IfxCan_InterruptLine_15 /**< \brief Interrupt Line 15 */
276 } IfxCan_InterruptLine;
277
278 /** \brief Type of last error to occur on the CAN node
279 */
280 typedef enum
281 {
282 IfxCan_LastErrorCodeType_noError = 0, /**< \brief No Error occured in the recent CAN message transmission or reception. */
283 IfxCan_LastErrorCodeType_stuffError = 1, /**< \brief More than 5 consecutive equal bits recieved in CAN message */
284 IfxCan_LastErrorCodeType_formError = 2, /**< \brief Fixed format part of recieved frame has wrong format */
285 IfxCan_LastErrorCodeType_ackError = 3, /**< \brief No ACK recieved from another node for transmitted CAN message */
286 IfxCan_LastErrorCodeType_bit1Error = 4, /**< \brief Transmitted recessive and read back dominant on the CAN bus. */
287 IfxCan_LastErrorCodeType_bit0Error = 5, /**< \brief Transmitted dominant and read back recessive on the CAN bus. */
288 IfxCan_LastErrorCodeType_crcError = 6, /**< \brief CRC Error */
289 IfxCan_LastErrorCodeType_noCANBusEvent = 7 /**< \brief No CAN bus event occured */
290 } IfxCan_LastErrorCodeType;
291
292 /** \brief Message Id length (Standard / Extended)
293 */
294 typedef enum
295 {
296 IfxCan_MessageIdLength_standard, /**< \brief Standard Message ID */
297 IfxCan_MessageIdLength_extended, /**< \brief Extended Message ID */
298 IfxCan_MessageIdLength_both /**< \brief Both Standard and Extended message IDs */
299 } IfxCan_MessageIdLength;
300
301 /** \brief Indicate the action to be taken with the messages which do not match with any element of the filter.
302 */
303 typedef enum
304 {
305 IfxCan_NonMatchingFrame_acceptToRxFifo0 = 0, /**< \brief Accept the non matching messages into Rx FIFO 0 */
306 IfxCan_NonMatchingFrame_acceptToRxFifo1 = 1, /**< \brief Accepts the non matching messages into Rx FIFO 1 */
307 IfxCan_NonMatchingFrame_reject = 2 /**< \brief Reject the non-matching messages */
308 } IfxCan_NonMatchingFrame;
309
310 /** \brief Rx Buffer number
311 */
312 typedef enum
313 {
314 IfxCan_RxBufferId_0, /**< \brief Rx buffer 0 */
315 IfxCan_RxBufferId_1, /**< \brief Rx buffer 1 */
316 IfxCan_RxBufferId_2, /**< \brief Rx buffer 2 */
317 IfxCan_RxBufferId_3, /**< \brief Rx buffer 3 */
318 IfxCan_RxBufferId_4, /**< \brief Rx buffer 4 */
319 IfxCan_RxBufferId_5, /**< \brief Rx buffer 5 */
320 IfxCan_RxBufferId_6, /**< \brief Rx buffer 6 */
321 IfxCan_RxBufferId_7, /**< \brief Rx buffer 7 */
322 IfxCan_RxBufferId_8, /**< \brief Rx buffer 8 */
323 IfxCan_RxBufferId_9, /**< \brief Rx buffer 9 */
324 IfxCan_RxBufferId_10, /**< \brief Rx buffer 10 */
325 IfxCan_RxBufferId_11, /**< \brief Rx buffer 11 */
326 IfxCan_RxBufferId_12, /**< \brief Rx buffer 12 */
327 IfxCan_RxBufferId_13, /**< \brief Rx buffer 13 */
328 IfxCan_RxBufferId_14, /**< \brief Rx buffer 14 */
329 IfxCan_RxBufferId_15, /**< \brief Rx buffer 15 */
330 IfxCan_RxBufferId_16, /**< \brief Rx buffer 16 */
331 IfxCan_RxBufferId_17, /**< \brief Rx buffer 17 */
332 IfxCan_RxBufferId_18, /**< \brief Rx buffer 18 */
333 IfxCan_RxBufferId_19, /**< \brief Rx buffer 19 */
334 IfxCan_RxBufferId_20, /**< \brief Rx buffer 20 */
335 IfxCan_RxBufferId_21, /**< \brief Rx buffer 21 */
336 IfxCan_RxBufferId_22, /**< \brief Rx buffer 22 */
337 IfxCan_RxBufferId_23, /**< \brief Rx buffer 23 */
338 IfxCan_RxBufferId_24, /**< \brief Rx buffer 24 */
339 IfxCan_RxBufferId_25, /**< \brief Rx buffer 25 */
340 IfxCan_RxBufferId_26, /**< \brief Rx buffer 26 */
341 IfxCan_RxBufferId_27, /**< \brief Rx buffer 27 */
342 IfxCan_RxBufferId_28, /**< \brief Rx buffer 28 */
343 IfxCan_RxBufferId_29, /**< \brief Rx buffer 29 */
344 IfxCan_RxBufferId_30, /**< \brief Rx buffer 30 */
345 IfxCan_RxBufferId_31, /**< \brief Rx buffer 31 */
346 IfxCan_RxBufferId_32, /**< \brief Rx buffer 32 */
347 IfxCan_RxBufferId_33, /**< \brief Rx buffer 33 */
348 IfxCan_RxBufferId_34, /**< \brief Rx buffer 34 */
349 IfxCan_RxBufferId_35, /**< \brief Rx buffer 35 */
350 IfxCan_RxBufferId_36, /**< \brief Rx buffer 36 */
351 IfxCan_RxBufferId_37, /**< \brief Rx buffer 37 */
352 IfxCan_RxBufferId_38, /**< \brief Rx buffer 38 */
353 IfxCan_RxBufferId_39, /**< \brief Rx buffer 39 */
354 IfxCan_RxBufferId_40, /**< \brief Rx buffer 40 */
355 IfxCan_RxBufferId_41, /**< \brief Rx buffer 41 */
356 IfxCan_RxBufferId_42, /**< \brief Rx buffer 42 */
357 IfxCan_RxBufferId_43, /**< \brief Rx buffer 43 */
358 IfxCan_RxBufferId_44, /**< \brief Rx buffer 44 */
359 IfxCan_RxBufferId_45, /**< \brief Rx buffer 45 */
360 IfxCan_RxBufferId_46, /**< \brief Rx buffer 46 */
361 IfxCan_RxBufferId_47, /**< \brief Rx buffer 47 */
362 IfxCan_RxBufferId_48, /**< \brief Rx buffer 48 */
363 IfxCan_RxBufferId_49, /**< \brief Rx buffer 49 */
364 IfxCan_RxBufferId_50, /**< \brief Rx buffer 50 */
365 IfxCan_RxBufferId_51, /**< \brief Rx buffer 51 */
366 IfxCan_RxBufferId_52, /**< \brief Rx buffer 52 */
367 IfxCan_RxBufferId_53, /**< \brief Rx buffer 53 */
368 IfxCan_RxBufferId_54, /**< \brief Rx buffer 54 */
369 IfxCan_RxBufferId_55, /**< \brief Rx buffer 55 */
370 IfxCan_RxBufferId_56, /**< \brief Rx buffer 56 */
371 IfxCan_RxBufferId_57, /**< \brief Rx buffer 57 */
372 IfxCan_RxBufferId_58, /**< \brief Rx buffer 58 */
373 IfxCan_RxBufferId_59, /**< \brief Rx buffer 59 */
374 IfxCan_RxBufferId_60, /**< \brief Rx buffer 60 */
375 IfxCan_RxBufferId_61, /**< \brief Rx buffer 61 */
376 IfxCan_RxBufferId_62, /**< \brief Rx buffer 62 */
377 IfxCan_RxBufferId_63 /**< \brief Rx buffer 63 */
378 } IfxCan_RxBufferId;
379
380 /** \brief Rx FIFO 0/1 operating mode\n
381 * Description in Ifx_CAN.N[x].RXFyC.FyOM, (x= 0 to 3; y = 0, 1)
382 */
383 typedef enum
384 {
385 IfxCan_RxFifoMode_blocking, /**< \brief Blocking mode */
386 IfxCan_RxFifoMode_overwrite /**< \brief Overwrite mode */
387 } IfxCan_RxFifoMode;
388
389 /** \brief Rx Buffers or FIFO 0 or combination Mode of reception
390 */
391 typedef enum
392 {
393 IfxCan_RxMode_dedicatedBuffers, /**< \brief Rx dedicated buffers operation */
394 IfxCan_RxMode_fifo0, /**< \brief Rx FIFO 0 operation */
395 IfxCan_RxMode_fifo1, /**< \brief Rx FIFO 1 operation */
396 IfxCan_RxMode_sharedFifo0, /**< \brief Rx shared dedicated buffers and Rx FIFO 0 operation */
397 IfxCan_RxMode_sharedFifo1, /**< \brief Rx shared dedicated buffers and Rx FIFO 1 operation */
398 IfxCan_RxMode_sharedAll /**< \brief Rx shared dedicated buffers and Rx FIFO 0 and Rx FIFO 1 operation */
399 } IfxCan_RxMode;
400
401 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
402 * Definition in Ifx_CAN.CLC.B.EDIS
403 */
404 typedef enum
405 {
406 IfxCan_SleepMode_enable = 0, /**< \brief enables sleep mode */
407 IfxCan_SleepMode_disable = 1 /**< \brief disables sleep mode */
408 } IfxCan_SleepMode;
409
410 /** \brief CAN API status definition
411 */
412 typedef enum
413 {
414 IfxCan_Status_ok = 0x00000000,
415 IfxCan_Status_notInitialised = 0x00000001,
416 IfxCan_Status_busOff = 0x00000010,
417 IfxCan_Status_notSentBusy = 0x00000020,
418 IfxCan_Status_receiveEmpty = 0x00000040,
419 IfxCan_Status_messageLost = 0x00000080,
420 IfxCan_Status_newData = 0x00000100,
421 IfxCan_Status_newDataButOneLost = 0x00000180
422 } IfxCan_Status;
423
424 /** \brief OCDS Suspend Control (OCDS.SUS)
425 */
426 typedef enum
427 {
428 IfxCan_SuspendMode_none = 0, /**< \brief No suspend */
429 IfxCan_SuspendMode_hard = 1, /**< \brief Hard Suspend */
430 IfxCan_SuspendMode_soft = 2 /**< \brief Soft Suspend */
431 } IfxCan_SuspendMode;
432
433 /** \brief Tx Buffer number
434 */
435 typedef enum
436 {
437 IfxCan_TxBufferId_0, /**< \brief Tx buffer 0 */
438 IfxCan_TxBufferId_1, /**< \brief Tx buffer 1 */
439 IfxCan_TxBufferId_2, /**< \brief Tx buffer 2 */
440 IfxCan_TxBufferId_3, /**< \brief Tx buffer 3 */
441 IfxCan_TxBufferId_4, /**< \brief Tx buffer 4 */
442 IfxCan_TxBufferId_5, /**< \brief Tx buffer 5 */
443 IfxCan_TxBufferId_6, /**< \brief Tx buffer 6 */
444 IfxCan_TxBufferId_7, /**< \brief Tx buffer 7 */
445 IfxCan_TxBufferId_8, /**< \brief Tx buffer 8 */
446 IfxCan_TxBufferId_9, /**< \brief Tx buffer 9 */
447 IfxCan_TxBufferId_10, /**< \brief Tx buffer 10 */
448 IfxCan_TxBufferId_11, /**< \brief Tx buffer 11 */
449 IfxCan_TxBufferId_12, /**< \brief Tx buffer 12 */
450 IfxCan_TxBufferId_13, /**< \brief Tx buffer 13 */
451 IfxCan_TxBufferId_14, /**< \brief Tx buffer 14 */
452 IfxCan_TxBufferId_15, /**< \brief Tx buffer 15 */
453 IfxCan_TxBufferId_16, /**< \brief Tx buffer 16 */
454 IfxCan_TxBufferId_17, /**< \brief Tx buffer 17 */
455 IfxCan_TxBufferId_18, /**< \brief Tx buffer 18 */
456 IfxCan_TxBufferId_19, /**< \brief Tx buffer 19 */
457 IfxCan_TxBufferId_20, /**< \brief Tx buffer 20 */
458 IfxCan_TxBufferId_21, /**< \brief Tx buffer 21 */
459 IfxCan_TxBufferId_22, /**< \brief Tx buffer 22 */
460 IfxCan_TxBufferId_23, /**< \brief Tx buffer 23 */
461 IfxCan_TxBufferId_24, /**< \brief Tx buffer 24 */
462 IfxCan_TxBufferId_25, /**< \brief Tx buffer 25 */
463 IfxCan_TxBufferId_26, /**< \brief Tx buffer 26 */
464 IfxCan_TxBufferId_27, /**< \brief Tx buffer 27 */
465 IfxCan_TxBufferId_28, /**< \brief Tx buffer 28 */
466 IfxCan_TxBufferId_29, /**< \brief Tx buffer 29 */
467 IfxCan_TxBufferId_30, /**< \brief Tx buffer 30 */
468 IfxCan_TxBufferId_31 /**< \brief Tx buffer 31 */
469 } IfxCan_TxBufferId;
470
471 /** \brief Tx FIFO/Queue Mode
472 */
473 typedef enum
474 {
475 IfxCan_TxMode_fifo, /**< \brief Tx FIFO operation */
476 IfxCan_TxMode_queue, /**< \brief Tx Queue operation */
477 IfxCan_TxMode_dedicatedBuffers, /**< \brief Tx dedicated buffers operation */
478 IfxCan_TxMode_sharedFifo, /**< \brief Tx shared dedicated buffers and Tx FIFO operation */
479 IfxCan_TxMode_sharedQueue /**< \brief Tx shared dedicated buffers and Tx Queue operation */
480 } IfxCan_TxMode;
481
482 /** \} */
483
484 /** \brief CAN node Bus Off status
485 */
486 typedef enum
487 {
488 IfxCan_CanNodeBusOffErrorStatus_NoErr = 0, /**< \brief CAN node not in Bus Off state */
489 IfxCan_CanNodeBusOffErrorStatus_BusOffErr = 1 /**< \brief CAN node in Bus Off state */
490 } IfxCan_CanNodeBusOffErrorStatus;
491
492 /** \brief CAN node communication state
493 */
494 typedef enum
495 {
496 IfxCan_CanNodeCommunicationState_synchronize = 0, /**< \brief CAN node is synchronizing on CAN communication */
497 IfxCan_CanNodeCommunicationState_idle = 1, /**< \brief Node is neither receiving nor transmitting */
498 IfxCan_CanNodeCommunicationState_receive = 2, /**< \brief Node is operating as receiver */
499 IfxCan_CanNodeCommunicationState_transmit = 3 /**< \brief Node is operating as transmitter */
500 } IfxCan_CanNodeCommunicationState;
501
502 /******************************************************************************/
503 /*-----------------------------Data Structures--------------------------------*/
504 /******************************************************************************/
505
506 /** \addtogroup IfxLld_Can_Std_Data_Structures
507 * \{ */
508 /** \brief tructure for Filter configuration
509 */
510 typedef struct
511 {
512 uint8 number; /**< \brief Filter Number */
513 IfxCan_FilterElementConfiguration elementConfiguration; /**< \brief *FEC, Filter Element Configuration of (standard / extended ID) filter element */
514 IfxCan_FilterType type; /**< \brief *FT, Filter Type of (standard / extended ID) filter element */
515 uint32 id1; /**< \brief *FID1 First ID of (standard / extended ID) filter element */
516 uint32 id2; /**< \brief *FID2 Second ID of (standard / extended ID) filter element */
517 IfxCan_RxBufferId rxBufferOffset; /**< \brief Rx Buffer number to set the offset to the Rx Buffer Start Address */
518 } IfxCan_Filter;
519
520 /** \brief Configuration for Interrupt groups
521 */
522 typedef struct
523 {
524 IfxCan_InterruptLine interruptLine; /**< \brief Intterupt line to which this interruipt has to be connetced to */
525 Ifx_Priority priority; /**< \brief Priority of the interrupt */
526 IfxSrc_Tos typeOfService; /**< \brief Type of Service */
527 } IfxCan_GroupInterruptConfig;
528
529 /** \brief Structure for CAN Message configuration (transmit/receive)
530 */
531 typedef struct
532 {
533 uint8 bufferNumber; /**< \brief (Tx / Rx) Buffer Element number */
534 uint32 messageId; /**< \brief ID, Identifier */
535 boolean remoteTransmitRequest; /**< \brief RTR, Remote Transmit Request (enable / disable) */
536 IfxCan_MessageIdLength messageIdLength; /**< \brief XTD, Message Id length (Standard / Extended) */
537 boolean errorStateIndicator; /**< \brief ESI, Error State Indicator (enable / disable) */
538 IfxCan_DataLengthCode dataLengthCode; /**< \brief DLC, Data Length Code */
539 IfxCan_FrameMode frameMode; /**< \brief CAN frame mode */
540 boolean txEventFifoControl; /**< \brief EFC, Tx Event FIFO Control (enable / disable) */
541 boolean storeInTxFifoQueue; /**< \brief Write message in Tx FIFO/QUEUE */
542 boolean readFromRxFifo0; /**< \brief Read message from Rx FIFO 0 */
543 boolean readFromRxFifo1; /**< \brief Read message from Rx FIFO 1 */
544 } IfxCan_Message;
545
546 /** \brief Structure for Message RAM configuration
547 */
548 typedef struct
549 {
550 uint32 baseAddress; /**< \brief Message RAM base address of the CAN */
551 uint16 standardFilterListStartAddress; /**< \brief Start address of Standard Message ID filter list (32-bit word address) */
552 uint16 extendedFilterListStartAddress; /**< \brief Start address of Extended Message ID filter list (32-bit word address) */
553 uint16 rxFifo0StartAddress; /**< \brief Start address of Rx FIFO 0 in Message RAM (32-bit word address) */
554 uint16 rxFifo1StartAddress; /**< \brief Start address of Rx FIFO 1 in Message RAM (32-bit word address) */
555 uint16 rxBuffersStartAddress; /**< \brief Start address of Rx Buffers section in the Message RAM (32-bit word address). */
556 uint16 txEventFifoStartAddress; /**< \brief Start address of Tx Event FIFO in Message RAM (32-bit w ord address) */
557 uint16 txBuffersStartAddress; /**< \brief Start address of Tx Buffers section in the Message RAM (32-bit word address). */
558 } IfxCan_MessageRAM;
559
560 /** \} */
561
562 /** \addtogroup IfxLld_Can_Std_Node_Functions
563 * \{ */
564
565 /******************************************************************************/
566 /*-------------------------Inline Function Prototypes-------------------------*/
567 /******************************************************************************/
568
569 /** \brief Disables the configuration change\n
570 * The CPU has no write access to the protected configuration registers
571 * \param node Specifies the pointer to the CAN Node registers
572 * \return None
573 */
574 IFX_INLINE void IfxCan_Node_disableConfigurationChange(Ifx_CAN_N *node);
575
576 /** \brief Enables the configuration change\n
577 * The CPU has write access to the protected configuration registers (while CCCR.INIT = 1)
578 * \param node Specifies the pointer to the CAN Node registers
579 * \return None
580 */
581 IFX_INLINE void IfxCan_Node_enableConfigurationChange(Ifx_CAN_N *node);
582
583 /** \brief Enables the internal Virtual CAN bus loopback mode
584 * \param node Specifies the pointer to the CAN Node registers
585 * \return None
586 */
587 IFX_INLINE void IfxCan_Node_enableLoopbackMode(Ifx_CAN_N *node);
588
589 /** \brief Returns the status of whether the CAN Node is synchronised or not
590 * \param node Specifies the pointer to the CAN Node registers
591 * \return Status TRUE: synchronized, FALSE : Sync in progress
592 */
593 IFX_INLINE boolean IfxCan_Node_isNodeSynchronized(Ifx_CAN_N *node);
594
595 /** \brief Initialises the node\n
596 * 0= Normal Operation\n
597 * 1= Initialization is started
598 * \param node Specifies the pointer to the CAN Node registers
599 * \param enable Enable / Disable choice
600 * \return None
601 */
602 IFX_INLINE void IfxCan_Node_setInitialisation(Ifx_CAN_N *node, boolean enable);
603
604 /** \brief Sets Transceiver Delay Compensation offset
605 * \param node Specifies the pointer to the CAN Node registers
606 * \param delay delay offset value
607 * \return None
608 */
609 IFX_INLINE void IfxCan_Node_setTransceiverDelayCompensationOffset(Ifx_CAN_N *node, uint8 delay);
610
611 /** \brief Get the LEC error status of the CAN node.
612 * \param node Specifies the pointer to CAN node registers
613 * \return LEC error status in CAN node PSR register
614 */
615 IFX_INLINE IfxCan_LastErrorCodeType IfxCan_Node_getLastErroCodeStatus(Ifx_CAN_N *node);
616
617 /** \brief Error Passive status of the CAN node.
618 * TRUE: CAN node in error passive.
619 * FALSE: CAN node not in error passive.
620 * \param node Specifies the pointer to CAN node registers
621 * \return Error Passive error status of CAN node (TRUE/FALSE).
622 */
623 IFX_INLINE boolean IfxCan_Node_isErrorPassive(Ifx_CAN_N *node);
624
625 /** \brief Get the warning status of the CAN node.
626 * \param node Specifies the pointer to CAN node registers
627 * \return Warning status in CAN node
628 */
629 IFX_INLINE IfxCan_CanNodeErrorWarningLimitStatus IfxCan_Node_getWarningStatus(Ifx_CAN_N *node);
630
631 /** \brief Get the Bus Off status of the CAN node.
632 * \param node Specifies the pointer to CAN node registers
633 * \return Bus Off Error status in CAN node
634 */
635 IFX_INLINE IfxCan_CanNodeBusOffErrorStatus IfxCan_Node_getBusOffStatus(Ifx_CAN_N *node);
636
637 /** \brief Get the Activity status of the CAN node.
638 * \param node Specifies the pointer to CAN node registers
639 * \return Activity status of CAN node
640 */
641 IFX_INLINE IfxCan_CanNodeCommunicationState IfxCan_Node_getActivityStatus(Ifx_CAN_N *node);
642
643 /** \brief Get the Error status in data phase of the CAN node in the recent CANFD operation with bit rate switch.
644 * \param node Specifies the pointer to CAN node registers
645 * \return Error status of the recent CAN FD with BRS flag set.
646 */
647 IFX_INLINE IfxCan_LastErrorCodeType IfxCan_Node_getDataPhaseLastErrorCode(Ifx_CAN_N *node);
648
649 /** \brief Protocol Exception Event status
650 * TRUE: Protocol Exception event occured.
651 * FALSE: Protocol Exception event not occured.
652 * \param node Specifies the pointer to CAN node registers
653 * \return Get the Protocol Exception event status (TRUE/FALSE)
654 */
655 IFX_INLINE boolean IfxCan_Node_isProtocolExceptionEventOccured(Ifx_CAN_N *node);
656
657 /** \brief Returns the error status of the recent recieved CAN FD message.
658 * TRUE : Error status indicator is enabled
659 * FALSE: Erro status indicator not enabled.
660 * \param node Specifies the pointer to CAN node registers
661 * \return Error indicator for recent received CAN FD message (TRUE/FALSE)
662 */
663 IFX_INLINE boolean IfxCan_Node_isErrorStatusIndicatorEnabled(Ifx_CAN_N *node);
664
665 /** \brief Bit Rate Switch status of the last recieved CAN FD message.
666 * TRUE: Bit rate switch is enabled.
667 * FALSE: Bit rate switch is disabled.
668 * \param node Specifies the pointer to CAN node registers
669 * \return Bit Rate Switch flag status (TRUE/FALSE)
670 */
671 IFX_INLINE boolean IfxCan_Node_isBitRateSwitchFlagEnabled(Ifx_CAN_N *node);
672
673 /** \brief Return the DLC code corresponding to the data length in bytes
674 * \param dataLength Data length in bytes
675 * \return Data length code
676 */
677 IFX_INLINE IfxCan_DataLengthCode IfxCan_Node_getCodeFromDataLengthInBytes(uint32 dataLength);
678
679 /******************************************************************************/
680 /*-------------------------Global Function Prototypes-------------------------*/
681 /******************************************************************************/
682
683 /** \brief Converts data length code (DLC) into number of words
684 * \param dataLengthCode DLC, Data Length Code
685 * \return Number of data words
686 */
687 IFX_EXTERN uint32 IfxCan_Node_getDataLength(IfxCan_DataLengthCode dataLengthCode);
688
689 /** \brief Converts data length code (DLC) into number of data words.
690 * This function is deprecated. Use new function IfxCan_Node_getDataLength
691 * \param node Specifies the pointer to the CAN Node registers
692 * \param dataLengthCode DLC, Data Length Code
693 * \return Number of data words
694 */
695 IFX_EXTERN uint32 IfxCan_Node_getDataLengthFromCode(Ifx_CAN_N *node, IfxCan_DataLengthCode dataLengthCode);
696
697 /** \brief Returns CAN frame mode of operation for a received frame
698 * \param rxBufferElement Rx Buffer Element
699 * \return CAN frame mode
700 */
701 IFX_EXTERN IfxCan_FrameMode IfxCan_Node_getFrameMode(Ifx_CAN_RXMSG *rxBufferElement);
702
703 /** \brief Select and initialise the CAN node receive pin
704 * \param node Specifies the pointer to the CAN Node registers
705 * \param rxd Rx pin
706 * \param mode Input mode
707 * \param padDriver Pad Driver Configuration
708 * \return TRUE: Returns TRUE if the operation was successful\n
709 * FALSE: Returns FALSE if the operation was errorneous
710 */
711 IFX_EXTERN boolean IfxCan_Node_initRxPin(Ifx_CAN_N *node, IfxCan_Rxd_In *rxd, IfxPort_InputMode mode, IfxPort_PadDriver padDriver);
712
713 /** \brief Select and initialise the CAN node transmit pin
714 * \param txd Tx pin
715 * \param mode Output mode
716 * \param padDriver Pad driver Configuration
717 * \return TRUE: Returns TRUE if the operation was successful\n
718 * FALSE: Returns FALSE if the operation was errorneous
719 */
720 IFX_EXTERN boolean IfxCan_Node_initTxPin(IfxCan_Txd_Out *txd, IfxPort_OutputMode mode, IfxPort_PadDriver padDriver);
721
722 /** \brief Calculates and Sets the CAN baudrate for standard frames and arbitration phase of CAND FD frames
723 * \param node Specifies the pointer to the CAN Node registers
724 * \param moduleFreq Specifies the CAN module frequency
725 * \param baudrate Specifies the baud rate. Unit: baud
726 * \param samplePoint Specifies the sample point. Range = [0, 10000] resp. [0%, 100%] of the total bit time.
727 * \param syncJumpWidth Specifies the re-synchronization jump width
728 * \return None
729 */
730 IFX_EXTERN void IfxCan_Node_setBitTiming(Ifx_CAN_N *node, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 syncJumpWidth);
731
732 /** \brief Sets the values of CAN baudrate for standard frames
733 * \param node Specifies the pointer to the CAN Node registers
734 * \param syncJumpWidth Synchronization Jump Width
735 * \param timeSegment2 Time segment after sample point
736 * \param timeSegment1 Time segment before sample point
737 * \param prescaler Baud Rate Prescaler
738 * \return None
739 */
740 IFX_EXTERN void IfxCan_Node_setBitTimingValues(Ifx_CAN_N *node, uint16 syncJumpWidth, uint8 timeSegment2, uint8 timeSegment1, uint16 prescaler);
741
742 /** \brief Calulates and Sets the CAN fast baudrate for CAN FD frames data phase
743 * \param node Specifies the pointer to the CAN Node registers
744 * \param moduleFreq Specifies the CAN module frequency
745 * \param baudrate Specifies the baud rate. Unit: baud
746 * \param samplePoint Specifies the sample point. Range = [0, 10000] resp. [0%, 100%] of the total bit time.
747 * \param syncJumpWidth Specifies the re-synchronization jump width
748 * \return None
749 */
750 IFX_EXTERN void IfxCan_Node_setFastBitTiming(Ifx_CAN_N *node, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 syncJumpWidth);
751
752 /** \brief Sets the values of CAN fast baudrate for CAN FD frames data phase
753 * \param node Specifies the pointer to the CAN Node registers
754 * \param syncJumpWidth Synchronization Jump Width
755 * \param timeSegment2 Time segment after sample point
756 * \param timeSegment1 Time segment before sample point
757 * \param prescaler Baud Rate Prescaler
758 * \return None
759 */
760 IFX_EXTERN void IfxCan_Node_setFastBitTimingValues(Ifx_CAN_N *node, uint16 syncJumpWidth, uint8 timeSegment2, uint8 timeSegment1, uint16 prescaler);
761
762 /** \brief Enables the CAN frame mode for transmission
763 * \param node Specifies the pointer to the CAN Node registers
764 * \param frameMode CAN frame mode
765 * \return None
766 */
767 IFX_EXTERN void IfxCan_Node_setFrameMode(Ifx_CAN_N *node, IfxCan_FrameMode frameMode);
768
769 /** \brief Sets CAN frame mode request for transmission
770 * \param txBufferElement Tx Buffer Element
771 * \param frameMode CAN frame mode
772 * \return None
773 */
774 IFX_EXTERN void IfxCan_Node_setFrameModeReq(Ifx_CAN_TXMSG *txBufferElement, IfxCan_FrameMode frameMode);
775
776 /** \brief Sets CAN frame mode request for transmission.
777 * This function is deprecated. Use new function IfxCan_Node_setFrameModeReq
778 * \param node Specifies the pointer to the CAN Node registers
779 * \param txBufferElement Tx Buffer Element
780 * \param frameMode CAN frame mode
781 * \return None
782 */
783 IFX_EXTERN void IfxCan_Node_setFrameModeRequest(Ifx_CAN_N *node, Ifx_CAN_TXMSG *txBufferElement, IfxCan_FrameMode frameMode);
784
785 /** \brief Converts data length code (DLC) into number of bytes
786 * \param dataLengthCode Data length code
787 * \return Data length in bytes
788 */
789 IFX_EXTERN uint32 IfxCan_Node_getDataLengthInBytes(IfxCan_DataLengthCode dataLengthCode);
790
791 /** \} */
792
793 /** \addtogroup IfxLld_Can_Std_Tx_Element_Functions
794 * \{ */
795
796 /******************************************************************************/
797 /*-------------------------Inline Function Prototypes-------------------------*/
798 /******************************************************************************/
799
800 /** \brief Returns Tx FIFO/Queue Put Index
801 * \param node Specifies the pointer to the CAN Node registers
802 * \return Tx Buffer Element Number
803 */
804 IFX_INLINE IfxCan_TxBufferId IfxCan_Node_getTxFifoQueuePutIndex(Ifx_CAN_N *node);
805
806 /** \brief Returns the status of whether cancellation is finished on the selected Tx buffer
807 * \param node Specifies the pointer to the CAN Node registers
808 * \param txBufferId Tx Buffer number
809 * \return Status
810 */
811 IFX_INLINE boolean IfxCan_Node_isTxBufferCancellationFinished(Ifx_CAN_N *node, IfxCan_TxBufferId txBufferId);
812
813 /** \brief Returns the status of pending request of the selected Tx buffer
814 * \param node Specifies the pointer to the CAN Node registers
815 * \param txBufferId Tx Buffer number
816 * \return Status
817 */
818 IFX_INLINE boolean IfxCan_Node_isTxBufferRequestPending(Ifx_CAN_N *node, IfxCan_TxBufferId txBufferId);
819
820 /** \brief Returns the status of whether transmission occured on the selected Tx buffer
821 * \param node Specifies the pointer to the CAN Node registers
822 * \param txBufferId Tx Buffer number
823 * \return Status
824 */
825 IFX_INLINE boolean IfxCan_Node_isTxBufferTransmissionOccured(Ifx_CAN_N *node, IfxCan_TxBufferId txBufferId);
826
827 /** \brief Returns the status of Tx Fifo/Queue is full or not
828 * \param node Specifies the pointer to the CAN Node registers
829 * \return Status
830 */
831 IFX_INLINE boolean IfxCan_Node_isTxFifoQueueFull(Ifx_CAN_N *node);
832
833 /** \brief pauses the CAN Node for two CAN bit times before starting the next transmission
834 * \param node Specifies the pointer to the CAN Node registers
835 * \param enable Enable / Disable choice
836 * \return None
837 */
838 IFX_INLINE void IfxCan_Node_pauseTransmission(Ifx_CAN_N *node, boolean enable);
839
840 /** \brief Sets the Data Length Code (DLC) for transmit frame
841 * \param txBufferElement Tx Buffer Element
842 * \param dataLengthCode DLC, data length code
843 * \return None
844 */
845 IFX_INLINE void IfxCan_Node_setDataLength(Ifx_CAN_TXMSG *txBufferElement, IfxCan_DataLengthCode dataLengthCode);
846
847 /** \brief Sets the Data Length Code (DLC) for transmit frame.
848 * This function is deprecated. Use new function IfxCan_Node_setDataLength
849 * \param node Specifies the pointer to the CAN Node registers
850 * \param txBufferElement Tx Buffer Element
851 * \param dataLengthCode DLC, data length code
852 * \return None
853 */
854 IFX_INLINE void IfxCan_Node_setDataLengthCode(Ifx_CAN_N *node, Ifx_CAN_TXMSG *txBufferElement, IfxCan_DataLengthCode dataLengthCode);
855
856 /** \brief Sets the number of dedicated Tx Buffers
857 * \param node Specifies the pointer to the CAN Node registers
858 * \param number Number of Tx Buffers
859 * \return None
860 */
861 IFX_INLINE void IfxCan_Node_setDedicatedTxBuffersNumber(Ifx_CAN_N *node, uint8 number);
862
863 /** \brief Sets the Error State Indicator (ESI) for transmit frame
864 * \param txBufferElement Tx Buffer Element
865 * \param enable Choice (True/ False)
866 * \return None
867 */
868 IFX_INLINE void IfxCan_Node_setErrStateIndicator(Ifx_CAN_TXMSG *txBufferElement, boolean enable);
869
870 /** \brief Sets the Error State Indicator (ESI) for transmit frame.
871 * This function is decprecated. Use new function IfxCan_Node_setErrStateIndicator
872 * \param node Specifies the pointer to the CAN Node registers
873 * \param txBufferElement Tx Buffer Element
874 * \param enable Choice (True/ False)
875 * \return None
876 */
877 IFX_INLINE void IfxCan_Node_setErrorStateIndicator(Ifx_CAN_N *node, Ifx_CAN_TXMSG *txBufferElement, boolean enable);
878
879 /** \brief Sets the Message Marker (MM) for transmit frame
880 * \param txBufferElement Tx Buffer Element
881 * \param bufferId MM, Message Marker , Buffer Id
882 * \return None
883 */
884 IFX_INLINE void IfxCan_Node_setMessageMarker(Ifx_CAN_TXMSG *txBufferElement, IfxCan_TxBufferId bufferId);
885
886 /** \brief Sets the identifier (ID) for transmit frame.
887 * \param txBufferElement Tx Buffer Element
888 * \param messageId Identifier
889 * \param messageIdLength Message Id length (Standard / Extended)
890 * \return None
891 */
892 IFX_INLINE void IfxCan_Node_setMsgId(Ifx_CAN_TXMSG *txBufferElement, uint32 messageId, IfxCan_MessageIdLength messageIdLength);
893
894 /** \brief Sets the identifier (ID) for transmit frame.
895 * This function is deprecated. Use the new function IfxCan_Node_setMsgId
896 * \param node Specifies the pointer to the CAN Node registers
897 * \param txBufferElement Tx Buffer Element
898 * \param messageId Identifier
899 * \param messageIdLength Message Id length (Standard / Extended)
900 * \return None
901 */
902 IFX_INLINE void IfxCan_Node_setMesssageId(Ifx_CAN_N *node, Ifx_CAN_TXMSG *txBufferElement, uint32 messageId, IfxCan_MessageIdLength messageIdLength);
903
904 /** \brief Sets the remote Transmit Request (RTR) for transmit frame
905 * \param txBufferElement Tx Buffer Element
906 * \param enable Choice (True/ False)
907 * \return None
908 */
909 IFX_INLINE void IfxCan_Node_setRemoteTransmitReq(Ifx_CAN_TXMSG *txBufferElement, boolean enable);
910
911 /** \brief Sets the remote Transmit Request (RTR) for transmit frame.
912 * This function is deprecated. Use new function IfxCan_Node_setRemoteTransmitReq
913 * \param node Specifies the pointer to the CAN Node registers
914 * \param txBufferElement Tx Buffer Element
915 * \param enable Choice (True/ False)
916 * \return None
917 */
918 IFX_INLINE void IfxCan_Node_setRemoteTransmitRequest(Ifx_CAN_N *node, Ifx_CAN_TXMSG *txBufferElement, boolean enable);
919
920 /** \brief Sets Transmit FIFO/Queue Mode
921 * \param node Specifies the pointer to the CAN Node registers
922 * \param mode Tx FIFO/Queue Mode
923 * \return None
924 */
925 IFX_INLINE void IfxCan_Node_setTransmitFifoQueueMode(Ifx_CAN_N *node, IfxCan_TxMode mode);
926
927 /** \brief Sets Transmit FIFO/Queue Size
928 * \param node Specifies the pointer to the CAN Node registers
929 * \param number Number of Tx Buffers used for Tx FIFO/Queue
930 * \return None
931 */
932 IFX_INLINE void IfxCan_Node_setTransmitFifoQueueSize(Ifx_CAN_N *node, uint8 number);
933
934 /** \brief Sets the Add Request for the selected Tx buffer
935 * \param node Specifies the pointer to the CAN Node registers
936 * \param txBufferId Tx Buffer number
937 * \return None
938 */
939 IFX_INLINE void IfxCan_Node_setTxBufferAddRequest(Ifx_CAN_N *node, IfxCan_TxBufferId txBufferId);
940
941 /** \brief Sets the Cancellation Request for the selected Tx buffer
942 * \param node Specifies the pointer to the CAN Node registers
943 * \param txBufferId Tx Buffer number
944 * \return None
945 */
946 IFX_INLINE void IfxCan_Node_setTxBufferCancellationRequest(Ifx_CAN_N *node, IfxCan_TxBufferId txBufferId);
947
948 /** \brief Sets Tx Buffer Data Field Size
949 * \param node Specifies the pointer to the CAN Node registers
950 * \param size Tx Buffer Data Field Size
951 * \return None
952 */
953 IFX_INLINE void IfxCan_Node_setTxBufferDataFieldSize(Ifx_CAN_N *node, IfxCan_DataFieldSize size);
954
955 /** \brief Sets the start address of Tx Buffers section in the Message RAM (32-bit word address)
956 * \param node Specifies the pointer to the CAN Node registers
957 * \param address Start address of Tx Buffers in the message RAM
958 * \return None
959 */
960 IFX_INLINE void IfxCan_Node_setTxBuffersStartAddress(Ifx_CAN_N *node, uint16 address);
961
962 /** \brief Sets the Tx Event Fifo Control (EFC) for transmit frame
963 * \param txBufferElement Tx Buffer Element
964 * \param enable Choice (True/ False)
965 * \return None
966 */
967 IFX_INLINE void IfxCan_Node_setTxEventFifoCtrl(Ifx_CAN_TXMSG *txBufferElement, boolean enable);
968
969 /** \brief Sets the Tx Event Fifo Control (EFC) for transmit frame.
970 * This function is deprecated. Use new function IfxCan_Node_setTxEventFifoCtrl
971 * \param node Specifies the pointer to the CAN Node registers
972 * \param txBufferElement Tx Buffer Element
973 * \param enable Choice (True/ False)
974 * \return None
975 */
976 IFX_INLINE void IfxCan_Node_setTxEventFifoControl(Ifx_CAN_N *node, Ifx_CAN_TXMSG *txBufferElement, boolean enable);
977
978 /******************************************************************************/
979 /*-------------------------Global Function Prototypes-------------------------*/
980 /******************************************************************************/
981
982 /** \brief Returns Tx Buffer Data Field Size in bytes
983 * \param node Specifies the pointer to the CAN Node registers
984 * \return Data field size
985 */
986 IFX_EXTERN uint8 IfxCan_Node_getTxBufferDataFieldSize(Ifx_CAN_N *node);
987
988 /** \brief Returns the address of selected Tx buffer element
989 * \param node Specifies the pointer to the CAN Node registers
990 * \param ramBaseAddress Message RAM base address of CAN module
991 * \param txBuffersStartAddress Start address of Tx Buffers section in the Message RAM
992 * \param txBufferNumber Tx buffer element number
993 * \return Tx Buffer Element Address
994 */
995 IFX_EXTERN Ifx_CAN_TXMSG *IfxCan_Node_getTxBufferElementAddress(Ifx_CAN_N *node, uint32 ramBaseAddress, uint16 txBuffersStartAddress, IfxCan_TxBufferId txBufferNumber);
996
997 /** \brief Writes Data into Tx buffer element Node_writeTxBufData
998 * \param txBufferElement Tx Buffer Element
999 * \param dataLengthCode DLC, Data Length Code
1000 * \param data Pointer to data (in words)
1001 * \return None
1002 */
1003 IFX_EXTERN void IfxCan_Node_writeTxBufData(Ifx_CAN_TXMSG *txBufferElement, IfxCan_DataLengthCode dataLengthCode, uint32 *data);
1004
1005 /** \brief Writes Data into Tx buffer element.
1006 * This function is deprecated. Use new function IfxCan_Node_writeTxBufData
1007 * \param node Specifies the pointer to the CAN Node registers
1008 * \param txBufferElement Tx Buffer Element
1009 * \param dataLengthCode DLC, Data Length Code
1010 * \param data Pointer to data (in words)
1011 * \return None
1012 */
1013 IFX_EXTERN void IfxCan_Node_writeData(Ifx_CAN_N *node, Ifx_CAN_TXMSG *txBufferElement, IfxCan_DataLengthCode dataLengthCode, uint32 *data);
1014
1015 /** \} */
1016
1017 /** \addtogroup IfxLld_Can_Std_Rx_Element_Functions
1018 * \{ */
1019
1020 /******************************************************************************/
1021 /*-------------------------Inline Function Prototypes-------------------------*/
1022 /******************************************************************************/
1023
1024 /** \brief Returns the Data Length Code from the received frame
1025 * \param rxBufferElement Rx Buffer Element
1026 * \return Data Length Code
1027 */
1028 IFX_INLINE uint32 IfxCan_Node_getDataLengthCode(Ifx_CAN_RXMSG *rxBufferElement);
1029
1030 /** \brief Returns the identifier (ID) from the received frame
1031 * \param rxBufferElement Rx Buffer Element
1032 * \return Identifier
1033 */
1034 IFX_INLINE uint32 IfxCan_Node_getMesssageId(Ifx_CAN_RXMSG *rxBufferElement);
1035
1036 /** \brief Returns Rx FIFO 0 Fill Level
1037 * \param node Specifies the pointer to the CAN Node registers
1038 * \return Fill level
1039 */
1040 IFX_INLINE uint8 IfxCan_Node_getRxFifo0FillLevel(Ifx_CAN_N *node);
1041
1042 /** \brief Returns Rx FIFO 0 get index
1043 * \param node Specifies the pointer to the CAN Node registers
1044 * \return Rx Buffer Element Number
1045 */
1046 IFX_INLINE IfxCan_RxBufferId IfxCan_Node_getRxFifo0GetIndex(Ifx_CAN_N *node);
1047
1048 /** \brief Returns Rx FIFO 1 Fill Level
1049 * \param node Specifies the pointer to the CAN Node registers
1050 * \return Fill level
1051 */
1052 IFX_INLINE uint8 IfxCan_Node_getRxFifo1FillLevel(Ifx_CAN_N *node);
1053
1054 /** \brief Returns Rx FIFO 1 get index
1055 * \param node Specifies the pointer to the CAN Node registers
1056 * \return Rx Buffer Element Number
1057 */
1058 IFX_INLINE IfxCan_RxBufferId IfxCan_Node_getRxFifo1GetIndex(Ifx_CAN_N *node);
1059
1060 /** \brief Sets Rx Buffer Data Field Size
1061 * \param node Specifies the pointer to the CAN Node registers
1062 * \param size Rx Buffer Data Field Size
1063 * \return None
1064 */
1065 IFX_INLINE void IfxCan_Node_setRxBufferDataFieldSize(Ifx_CAN_N *node, IfxCan_DataFieldSize size);
1066
1067 /** \brief Sets the start address of Rx Buffers section in the Message RAM (32-bit word address)
1068 * \param node Specifies the pointer to the CAN Node registers
1069 * \param address Start address of Rx Buffers in the Message RAM
1070 * \return None
1071 */
1072 IFX_INLINE void IfxCan_Node_setRxBuffersStartAddress(Ifx_CAN_N *node, uint16 address);
1073
1074 /** \brief Sets Rx FIFO 0 Acknowledge Index
1075 * \param node Specifies the pointer to the CAN Node registers
1076 * \param RxBufferNumber Rx buffer element number
1077 * \return None
1078 */
1079 IFX_INLINE void IfxCan_Node_setRxFifo0AcknowledgeIndex(Ifx_CAN_N *node, IfxCan_RxBufferId RxBufferNumber);
1080
1081 /** \brief Sets Rx Buffer Fifo 0 Data Field Size
1082 * \param node Specifies the pointer to the CAN Node registers
1083 * \param size Rx FIFO 0 Data Field Size
1084 * \return None
1085 */
1086 IFX_INLINE void IfxCan_Node_setRxFifo0DataFieldSize(Ifx_CAN_N *node, IfxCan_DataFieldSize size);
1087
1088 /** \brief Sets Rx Buffer Fifo 0 operating mode
1089 * \param node Specifies the pointer to the CAN Node registers
1090 * \param mode Rx FIFO 0 operating Mode
1091 * \return None
1092 */
1093 IFX_INLINE void IfxCan_Node_setRxFifo0OperatingMode(Ifx_CAN_N *node, IfxCan_RxFifoMode mode);
1094
1095 /** \brief Sets Rx FIFO 0 Size
1096 * \param node Specifies the pointer to the CAN Node registers
1097 * \param size Rx FIFO 0 Size
1098 * \return None
1099 */
1100 IFX_INLINE void IfxCan_Node_setRxFifo0Size(Ifx_CAN_N *node, uint8 size);
1101
1102 /** \brief Sets the start address of Rx FIFO 0 section in the Message RAM (32-bit word address)
1103 * \param node Specifies the pointer to the CAN Node registers
1104 * \param address Start address of Rx FIFO 0 in the Message RAM
1105 * \return None
1106 */
1107 IFX_INLINE void IfxCan_Node_setRxFifo0StartAddress(Ifx_CAN_N *node, uint16 address);
1108
1109 /** \brief Sets Rx FIFO 0 Watermark Level
1110 * \param node Specifies the pointer to the CAN Node registers
1111 * \param level Rx FIFO 0 Watermark Level
1112 * \return None
1113 */
1114 IFX_INLINE void IfxCan_Node_setRxFifo0WatermarkLevel(Ifx_CAN_N *node, uint8 level);
1115
1116 /** \brief Sets Rx FIFO 1 Acknowledge Index
1117 * \param node Specifies the pointer to the CAN Node registers
1118 * \param RxBufferNumber Rx buffer element number
1119 * \return None
1120 */
1121 IFX_INLINE void IfxCan_Node_setRxFifo1AcknowledgeIndex(Ifx_CAN_N *node, IfxCan_RxBufferId RxBufferNumber);
1122
1123 /** \brief Sets Rx Buffer Fifo 1 Data Field Size
1124 * \param node Specifies the pointer to the CAN Node registers
1125 * \param size Rx FIFO 1 Data Field Size
1126 * \return None
1127 */
1128 IFX_INLINE void IfxCan_Node_setRxFifo1DataFieldSize(Ifx_CAN_N *node, IfxCan_DataFieldSize size);
1129
1130 /** \brief Sets Rx Buffer Fifo 1 operating mode
1131 * \param node Specifies the pointer to the CAN Node registers
1132 * \param mode Rx FIFO 1 operating Mode
1133 * \return None
1134 */
1135 IFX_INLINE void IfxCan_Node_setRxFifo1OperatingMode(Ifx_CAN_N *node, IfxCan_RxFifoMode mode);
1136
1137 /** \brief Sets Rx FIFO 1 Size
1138 * \param node Specifies the pointer to the CAN Node registers
1139 * \param size Rx FIFO 1 Size
1140 * \return None
1141 */
1142 IFX_INLINE void IfxCan_Node_setRxFifo1Size(Ifx_CAN_N *node, uint8 size);
1143
1144 /** \brief Sets the start address of Rx FIFO 1 section in the Message RAM (32-bit word address)
1145 * \param node Specifies the pointer to the CAN Node registers
1146 * \param address Start address of Rx FIFO 1 in the Message RAM
1147 * \return None
1148 */
1149 IFX_INLINE void IfxCan_Node_setRxFifo1StartAddress(Ifx_CAN_N *node, uint16 address);
1150
1151 /** \brief Sets Rx FIFO 1 Watermark Level
1152 * \param node Specifies the pointer to the CAN Node registers
1153 * \param level Rx FIFO 1 Watermark Level
1154 * \return None
1155 */
1156 IFX_INLINE void IfxCan_Node_setRxFifo1WatermarkLevel(Ifx_CAN_N *node, uint8 level);
1157
1158 /******************************************************************************/
1159 /*-------------------------Global Function Prototypes-------------------------*/
1160 /******************************************************************************/
1161
1162 /** \brief Clears the New Data flag of the selected Rx buffer
1163 * \param node Specifies the pointer to the CAN Node registers
1164 * \param rxBufferId Rx Buffer number
1165 * \return None
1166 */
1167 IFX_EXTERN void IfxCan_Node_clearRxBufferNewDataFlag(Ifx_CAN_N *node, IfxCan_RxBufferId rxBufferId);
1168
1169 /** \brief Returns Rx Buffer Data Field Size in bytes
1170 * \param node Specifies the pointer to the CAN Node registers
1171 * \return Data field size
1172 */
1173 IFX_EXTERN uint8 IfxCan_Node_getRxBufferDataFieldSize(Ifx_CAN_N *node);
1174
1175 /** \brief Returns the address of selected Rx buffer element
1176 * \param node Specifies the pointer to the CAN Node registers
1177 * \param ramBaseAddress Message RAM base address of CAN Module
1178 * \param rxBuffersStartAddress Start address of Rx Buffers section in the Message RAM
1179 * \param rxBufferNumber Rx buffer element number
1180 * \return Rx Buffer Element Address
1181 */
1182 IFX_EXTERN Ifx_CAN_RXMSG *IfxCan_Node_getRxBufferElementAddress(Ifx_CAN_N *node, uint32 ramBaseAddress, uint16 rxBuffersStartAddress, IfxCan_RxBufferId rxBufferNumber);
1183
1184 /** \brief Returns Rx FIFO 0 Data Field Size in bytes
1185 * \param node Specifies the pointer to the CAN Node registers
1186 * \return Data field size
1187 */
1188 IFX_EXTERN uint8 IfxCan_Node_getRxFifo0DataFieldSize(Ifx_CAN_N *node);
1189
1190 /** \brief Returns the address of selected Rx FIFO 0 element
1191 * \param node Specifies the pointer to the CAN Node registers
1192 * \param ramBaseAddress Message RAM base address of CAN Module
1193 * \param rxFifo0StartAddress Start address of Rx FIFO 0 section in the Message RAM
1194 * \param rxBufferNumber Rx buffer element number
1195 * \return Rx FIFO 0 Element Address
1196 */
1197 IFX_EXTERN Ifx_CAN_RXMSG *IfxCan_Node_getRxFifo0ElementAddress(Ifx_CAN_N *node, uint32 ramBaseAddress, uint16 rxFifo0StartAddress, IfxCan_RxBufferId rxBufferNumber);
1198
1199 /** \brief Returns Rx FIFO 1 Data Field Size in bytes
1200 * \param node Specifies the pointer to the CAN Node registers
1201 * \return Data field size
1202 */
1203 IFX_EXTERN uint8 IfxCan_Node_getRxFifo1DataFieldSize(Ifx_CAN_N *node);
1204
1205 /** \brief Returns the address of selected Rx FIFO 1 element
1206 * \param node Specifies the pointer to the CAN Node registers
1207 * \param ramBaseAddress Message RAM base address of CAN Module
1208 * \param rxFifo1StartAddress Start address of Rx FIFO 1 section in the Message RAM
1209 * \param rxBufferNumber Rx buffer element number
1210 * \return Rx FIFO 1 Element Address
1211 */
1212 IFX_EXTERN Ifx_CAN_RXMSG *IfxCan_Node_getRxFifo1ElementAddress(Ifx_CAN_N *node, uint32 ramBaseAddress, uint16 rxFifo1StartAddress, IfxCan_RxBufferId rxBufferNumber);
1213
1214 /** \brief Returns the status of whether the selcted Rx buffer has been updated from new data
1215 * \param node Specifies the pointer to the CAN Node registers
1216 * \param rxBufferId Rx Buffer number
1217 * \return Status
1218 */
1219 IFX_EXTERN boolean IfxCan_Node_isRxBufferNewDataUpdated(Ifx_CAN_N *node, IfxCan_RxBufferId rxBufferId);
1220
1221 /** \brief Reads data from Rx buffer element
1222 * \param rxBufferElement Rx Buffer Element
1223 * \param dataLengthCode DLC, Data Length Code
1224 * \param data Pointer to data (in words)
1225 * \return None
1226 */
1227 IFX_EXTERN void IfxCan_Node_readData(Ifx_CAN_RXMSG *rxBufferElement, IfxCan_DataLengthCode dataLengthCode, uint32 *data);
1228
1229 /** \} */
1230
1231 /** \addtogroup IfxLld_Can_Std_Filter_Functions
1232 * \{ */
1233
1234 /******************************************************************************/
1235 /*-------------------------Inline Function Prototypes-------------------------*/
1236 /******************************************************************************/
1237
1238 /** \brief Disables the selected interrupt
1239 * \param node Specifies the pointer to the CAN Node registers
1240 * \return None
1241 */
1242 IFX_INLINE void IfxCan_Node_acceptRemoteFramesWithStandardId(Ifx_CAN_N *node);
1243
1244 /** \brief Disables the selected interrupt
1245 * \param node Specifies the pointer to the CAN Node registers
1246 * \return None
1247 */
1248 IFX_INLINE void IfxCan_Node_acceptRemoteFrameswithExtendedId(Ifx_CAN_N *node);
1249
1250 /** \brief Configure the filter for non matching frames with extended id.
1251 * \param node Specifies the pointer to the CAN Node registers
1252 * \param filter action to be performed on non matching messages.
1253 * \return None
1254 */
1255 IFX_INLINE void IfxCan_Node_configureExtendedFilterForNonMatchingFrames(Ifx_CAN_N *node, IfxCan_NonMatchingFrame filter);
1256
1257 /** \brief Configure the filter for non matching frames with standard id.
1258 * \param node Specifies the pointer to the CAN Node registers
1259 * \param filter action to be performed on non matching messages.
1260 * \return None
1261 */
1262 IFX_INLINE void IfxCan_Node_configureStandardFilterForNonMatchingFrames(Ifx_CAN_N *node, IfxCan_NonMatchingFrame filter);
1263
1264 /** \brief Reject the remote frames with extended id.
1265 * \param node Specifies the pointer to the CAN Node registers
1266 * \return None
1267 */
1268 IFX_INLINE void IfxCan_Node_rejectRemoteFramesWithExtendedId(Ifx_CAN_N *node);
1269
1270 /** \brief Reject the remote frames with standard id.
1271 * \param node Specifies the pointer to the CAN Node registers
1272 * \return None
1273 */
1274 IFX_INLINE void IfxCan_Node_rejectRemoteFramesWithStandardId(Ifx_CAN_N *node);
1275
1276 /** \brief Sets the Extended Filter Element Configuration
1277 * \param extendedFilterElement Extended Filter Element
1278 * \param filterElementConfiguration Filter Element Configuration
1279 * \return None
1280 */
1281 IFX_INLINE void IfxCan_Node_setExtendedFilterConfiguration(Ifx_CAN_EXTMSG *extendedFilterElement, IfxCan_FilterElementConfiguration filterElementConfiguration);
1282
1283 /** \brief Sets the Extended Filter ID 1 for Extended Filter Element
1284 * \param extendedFilterElement Extended Filter Element
1285 * \param id Filter ID 1
1286 * \return None
1287 */
1288 IFX_INLINE void IfxCan_Node_setExtendedFilterId1(Ifx_CAN_EXTMSG *extendedFilterElement, uint32 id);
1289
1290 /** \brief Sets the Extended Filter ID 2 for Extended Filter Element
1291 * \param extendedFilterElement Extended Filter Element
1292 * \param id Filter ID 2
1293 * \return None
1294 */
1295 IFX_INLINE void IfxCan_Node_setExtendedFilterId2(Ifx_CAN_EXTMSG *extendedFilterElement, uint32 id);
1296
1297 /** \brief Sets the Extended Message ID filter list size
1298 * \param node Specifies the pointer to the CAN Node registers
1299 * \param size Number of Extended Message ID filter elements
1300 * \return None
1301 */
1302 IFX_INLINE void IfxCan_Node_setExtendedFilterListSize(Ifx_CAN_N *node, uint8 size);
1303
1304 /** \brief Sets the start address of Extended Message ID filter list (32-bit word address)
1305 * \param node Specifies the pointer to the CAN Node registers
1306 * \param address Start address of Extended Message ID filter list in the Message RAM
1307 * \return None
1308 */
1309 IFX_INLINE void IfxCan_Node_setExtendedFilterListStartAddress(Ifx_CAN_N *node, uint16 address);
1310
1311 /** \brief Sets the Offset to the Rx Buffer Start Address RXBC.RBSA for storage of a matching message for Extended filter element
1312 * \param extendedFilterElement Extended Filter Element
1313 * \param rxBufferNumber Offset to the Rx Buffer Start Address RXBC.RBSA for storage of a matching message (Rx buffer number)
1314 * \return None
1315 */
1316 IFX_INLINE void IfxCan_Node_setExtendedFilterRxBufferOffset(Ifx_CAN_EXTMSG *extendedFilterElement, IfxCan_RxBufferId rxBufferNumber);
1317
1318 /** \brief Sets the Extended Filter Type for Extended Filter Element
1319 * \param extendedFilterElement Extended Filter Element
1320 * \param filterType Filter Type
1321 * \return None
1322 */
1323 IFX_INLINE void IfxCan_Node_setExtendedFilterType(Ifx_CAN_EXTMSG *extendedFilterElement, IfxCan_FilterType filterType);
1324
1325 /** \brief Sets the Standard Filter Element Configuration
1326 * \param standardFilterElement Standard Filter Element
1327 * \param filterElementConfiguration Filter Element Configuration
1328 * \return None
1329 */
1330 IFX_INLINE void IfxCan_Node_setStandardFilterConfiguration(Ifx_CAN_STDMSG *standardFilterElement, IfxCan_FilterElementConfiguration filterElementConfiguration);
1331
1332 /** \brief Sets the Standard Filter ID 1 for Standard Filter Element
1333 * \param standardFilterElement Standard Filter Element
1334 * \param id Filter ID 1
1335 * \return None
1336 */
1337 IFX_INLINE void IfxCan_Node_setStandardFilterId1(Ifx_CAN_STDMSG *standardFilterElement, uint32 id);
1338
1339 /** \brief Sets the Standard Filter ID 2 for Standard Filter Element
1340 * \param standardFilterElement Standard Filter Element
1341 * \param id Filter ID 2
1342 * \return None
1343 */
1344 IFX_INLINE void IfxCan_Node_setStandardFilterId2(Ifx_CAN_STDMSG *standardFilterElement, uint32 id);
1345
1346 /** \brief Sets the Standard Message ID filter list size
1347 * \param node Specifies the pointer to the CAN Node registers
1348 * \param size Number of Standard Message ID filter elements
1349 * \return None
1350 */
1351 IFX_INLINE void IfxCan_Node_setStandardFilterListSize(Ifx_CAN_N *node, uint8 size);
1352
1353 /** \brief Sets the start address of Standard Message ID filter list (32-bit word address)
1354 * \param node Specifies the pointer to the CAN Node registers
1355 * \param address Start address of Standard Message ID filter in the Message RAM
1356 * \return None
1357 */
1358 IFX_INLINE void IfxCan_Node_setStandardFilterListStartAddress(Ifx_CAN_N *node, uint16 address);
1359
1360 /** \brief Sets the Offset to the Rx Buffer Start Address RXBC.RBSA for storage of a matching message for standard filter element
1361 * \param standardFilterElement Standard Filter Element
1362 * \param rxBufferNumber Offset to the Rx Buffer Start Address RXBC.RBSA for storage of a matching message (Rx buffer number)
1363 * \return None
1364 */
1365 IFX_INLINE void IfxCan_Node_setStandardFilterRxBufferOffset(Ifx_CAN_STDMSG *standardFilterElement, IfxCan_RxBufferId rxBufferNumber);
1366
1367 /** \brief Sets the Standard Filter Type for Standard Filter Element
1368 * \param standardFilterElement Standard Filter Element
1369 * \param filterType Filter Type
1370 * \return None
1371 */
1372 IFX_INLINE void IfxCan_Node_setStandardFilterType(Ifx_CAN_STDMSG *standardFilterElement, IfxCan_FilterType filterType);
1373
1374 /******************************************************************************/
1375 /*-------------------------Global Function Prototypes-------------------------*/
1376 /******************************************************************************/
1377
1378 /** \brief Returns the address of selected extended filter element
1379 * \param ramBaseAddress Message RAM base address of CAN Module
1380 * \param extendedFilterListStartAddress Start address of Extended Message ID filter list (32-bit word address)
1381 * \param filterNumber extended filter element number
1382 * \return Extended Filter Element Address
1383 */
1384 IFX_EXTERN Ifx_CAN_EXTMSG *IfxCan_Node_getExtendedFilterElementAddress(uint32 ramBaseAddress, uint16 extendedFilterListStartAddress, uint8 filterNumber);
1385
1386 /** \brief Returns the address of selected standard filter element
1387 * \param ramBaseAddress Message RAM base address of CAN Module
1388 * \param standardFilterListStartAddress Start address of Standard Message ID filter list (32-bit word address)
1389 * \param filterNumber Standard filter element number
1390 * \return Standard Filter Element Address
1391 */
1392 IFX_EXTERN Ifx_CAN_STDMSG *IfxCan_Node_getStandardFilterElementAddress(uint32 ramBaseAddress, uint16 standardFilterListStartAddress, uint8 filterNumber);
1393
1394 /** \} */
1395
1396 /** \addtogroup IfxLld_Can_Std_Interrupt_Functions
1397 * \{ */
1398
1399 /******************************************************************************/
1400 /*-------------------------Inline Function Prototypes-------------------------*/
1401 /******************************************************************************/
1402
1403 /** \brief Clears the selected interrupt Flag
1404 * \param node Specifies the pointer to the CAN Node registers
1405 * \param interrupt Type of Interrupt
1406 * \return None
1407 */
1408 IFX_INLINE void IfxCan_Node_clearInterruptFlag(Ifx_CAN_N *node, IfxCan_Interrupt interrupt);
1409
1410 /** \brief Disables the selected interrupt
1411 * \param node Specifies the pointer to the CAN Node registers
1412 * \param interrupt Type of Interrupt
1413 * \return None
1414 */
1415 IFX_INLINE void IfxCan_Node_disableInterrupt(Ifx_CAN_N *node, IfxCan_Interrupt interrupt);
1416
1417 /** \brief Disables the Cancellation Finished Interrupt of the selected Tx buffer
1418 * \param node Specifies the pointer to the CAN Node registers
1419 * \param txBufferId Tx Buffer number
1420 * \return None
1421 */
1422 IFX_INLINE void IfxCan_Node_disableTxBufferCancellationFinishedInterrupt(Ifx_CAN_N *node, IfxCan_TxBufferId txBufferId);
1423
1424 /** \brief Disables the Transmission Interrupt of the selected Tx buffer
1425 * \param node Specifies the pointer to the CAN Node registers
1426 * \param txBufferId Tx Buffer number
1427 * \return None
1428 */
1429 IFX_INLINE void IfxCan_Node_disableTxBufferTransmissionInterrupt(Ifx_CAN_N *node, IfxCan_TxBufferId txBufferId);
1430
1431 /** \brief Enables the selected interrupt
1432 * \param node Specifies the pointer to the CAN Node registers
1433 * \param interrupt Type of Interrupt
1434 * \return None
1435 */
1436 IFX_INLINE void IfxCan_Node_enableInterrupt(Ifx_CAN_N *node, IfxCan_Interrupt interrupt);
1437
1438 /** \brief Enables the Cancellation Finished Interrupt of the selected Tx buffer
1439 * \param node Specifies the pointer to the CAN Node registers
1440 * \param txBufferId Tx Buffer number
1441 * \return None
1442 */
1443 IFX_INLINE void IfxCan_Node_enableTxBufferCancellationFinishedInterrupt(Ifx_CAN_N *node, IfxCan_TxBufferId txBufferId);
1444
1445 /** \brief Enables the Transmission Interrupt of the selected Tx buffer
1446 * \param node Specifies the pointer to the CAN Node registers
1447 * \param txBufferId Tx Buffer number
1448 * \return None
1449 */
1450 IFX_INLINE void IfxCan_Node_enableTxBufferTransmissionInterrupt(Ifx_CAN_N *node, IfxCan_TxBufferId txBufferId);
1451
1452 /** \brief Returns the status of selected interrupt flag
1453 * \param node Specifies the pointer to the CAN Node registers
1454 * \param interrupt Type of Interrupt
1455 * \return Status TRUE / FALSE
1456 */
1457 IFX_INLINE boolean IfxCan_Node_getInterruptFlagStatus(Ifx_CAN_N *node, IfxCan_Interrupt interrupt);
1458
1459 /******************************************************************************/
1460 /*-------------------------Global Function Prototypes-------------------------*/
1461 /******************************************************************************/
1462
1463 /** \brief Sets the slected interrupt to the selcted interrupt line
1464 * \param node Specifies the pointer to the CAN Node registers
1465 * \param interruptGroup Type of Interrupt group
1466 * \param interruptLine Interrupt line number
1467 * \return None
1468 */
1469 IFX_EXTERN void IfxCan_Node_setGroupInterruptLine(Ifx_CAN_N *node, IfxCan_InterruptGroup interruptGroup, IfxCan_InterruptLine interruptLine);
1470
1471 /** \brief Sets the slected interrupt to the selcted interrupt line
1472 * \param node Specifies the pointer to the CAN Node registers
1473 * \param interrupt Type of Interrupt
1474 * \param interruptLine Interrupt line number
1475 * \return None
1476 */
1477 IFX_EXTERN void IfxCan_Node_setInterruptLine(Ifx_CAN_N *node, IfxCan_Interrupt interrupt, IfxCan_InterruptLine interruptLine);
1478
1479 /** \} */
1480
1481 /** \addtogroup IfxLld_Can_Std_Module_Functions
1482 * \{ */
1483
1484 /******************************************************************************/
1485 /*-------------------------Inline Function Prototypes-------------------------*/
1486 /******************************************************************************/
1487
1488 /** \brief Returns the base adress of the selected Node of CAN module
1489 * \param can Specifies the pointer to the CAN registers
1490 * \param nodeId Node number of the module
1491 * \return Specifies the pointer to the CAN Node registers
1492 */
1493 IFX_INLINE Ifx_CAN_N *IfxCan_getNodePointer(Ifx_CAN *can, IfxCan_NodeId nodeId);
1494
1495 /** \brief Returns the status of module enabled or disabled
1496 * \param can Specifies the pointer to the CAN registers
1497 * \return Status (TRUE / FALSE)
1498 */
1499 IFX_INLINE boolean IfxCan_isModuleEnabled(Ifx_CAN *can);
1500
1501 /** \brief Returns the module's suspend state.
1502 * TRUE :if module is suspended.
1503 * FALSE:if module is not yet suspended.
1504 * \param can Pointer to CAN module registers
1505 * \return Suspend status (TRUE / FALSE)
1506 */
1507 IFX_INLINE boolean IfxCan_isModuleSuspended(Ifx_CAN *can);
1508
1509 /** \brief Sets the sensitivity of the module to sleep signal
1510 * \param can pointer to CAN registers
1511 * \param mode mode selection (enable/disable)
1512 * \return None
1513 */
1514 IFX_INLINE void IfxCan_setSleepMode(Ifx_CAN *can, IfxCan_SleepMode mode);
1515
1516 /** \brief Set the Module to Hard/Soft suspend mode.
1517 * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
1518 * \param can Pointer to CAN module registers
1519 * \param mode Module suspend mode
1520 * \return None
1521 */
1522 IFX_INLINE void IfxCan_setSuspendMode(Ifx_CAN *can, IfxCan_SuspendMode mode);
1523
1524 /******************************************************************************/
1525 /*-------------------------Global Function Prototypes-------------------------*/
1526 /******************************************************************************/
1527
1528 /** \brief Disables the module (sets the disable request)
1529 * \param can Specifies the pointer to the CAN registers
1530 * \return None
1531 */
1532 IFX_EXTERN void IfxCan_disableModule(Ifx_CAN *can);
1533
1534 /** \brief Enables the module (clears the disable request)
1535 * \param can Specifies the pointer to the CAN registers
1536 * \return None
1537 */
1538 IFX_EXTERN void IfxCan_enableModule(Ifx_CAN *can);
1539
1540 /**
1541 * \param can Module index of the CAN
1542 * \return CAN module register address
1543 */
1544 IFX_EXTERN Ifx_CAN *IfxCan_getAddress(IfxCan_Index can);
1545
1546 /** \brief API to get the resource index of the CAN specified.
1547 * \return can resource index
1548 */
1549 IFX_EXTERN IfxCan_Index IfxCan_getIndex(Ifx_CAN *can);
1550
1551 /** \brief Returns the operatinf frequency of the CAN module
1552 * \return Module Frequency
1553 */
1554 IFX_EXTERN float32 IfxCan_getModuleFrequency(void);
1555
1556 /** \brief resets CAN kernel
1557 * \param can pointer to CAN registers
1558 * \return None
1559 */
1560 IFX_EXTERN void IfxCan_resetModule(Ifx_CAN *can);
1561
1562 /** \brief sets the clocksource selection
1563 * \param can Specifies the pointer to the CAN registers
1564 * \param clockSelect Clock selection option
1565 * \param clockSource Type of Clock Source selection
1566 * \return None
1567 */
1568 IFX_EXTERN void IfxCan_setClockSource(Ifx_CAN *can, IfxCan_ClockSelect clockSelect, IfxCan_ClockSource clockSource);
1569
1570 /** \} */
1571
1572 /** \addtogroup IfxLld_Can_Std_Tx_Event_FIFO_Element_Functions
1573 * \{ */
1574
1575 /******************************************************************************/
1576 /*-------------------------Inline Function Prototypes-------------------------*/
1577 /******************************************************************************/
1578
1579 /** \brief Returns the Bit Rate Switch (BRS) from the Tx Event Fifo element
1580 * \param txEventFifoElement Tx Event FIFO Element
1581 * \return Bit Rate Switch (TRUE/FALSE)
1582 */
1583 IFX_INLINE boolean IfxCan_Node_getBRSFromTxEventFifo(Ifx_CAN_TXEVENT *txEventFifoElement);
1584
1585 /** \brief Returns the Data Length Code from the Tx Event Fifo Element
1586 * \param txEventFifoElement Tx Event Fifo Element
1587 * \return Data Length Code
1588 */
1589 IFX_INLINE uint32 IfxCan_Node_getDLCFromTxEventFifo(Ifx_CAN_TXEVENT *txEventFifoElement);
1590
1591 /** \brief Returns the Error State Indicator (ESI) from the Tx Event Fifo element
1592 * \param txEventFifoElement Tx Event FIFO Element
1593 * \return Error State Indicator
1594 */
1595 IFX_INLINE boolean IfxCan_Node_getESIFromTxEventFifo(Ifx_CAN_TXEVENT *txEventFifoElement);
1596
1597 /** \brief Returns the FD Format (FDF) from the Tx Event Fifo element
1598 * \param txEventFifoElement Tx Event FIFO Element
1599 * \return FD format (TRUE/FALSE)
1600 */
1601 IFX_INLINE boolean IfxCan_Node_getFDFFromTxEventFifo(Ifx_CAN_TXEVENT *txEventFifoElement);
1602
1603 /** \brief Returns the Message Marker (MM) from the Tx Event Fifo element
1604 * \param txEventFifoElement Tx Event FIFO Element
1605 * \return Message Marker
1606 */
1607 IFX_INLINE uint8 IfxCan_Node_getMMFromTxEventFifo(Ifx_CAN_TXEVENT *txEventFifoElement);
1608
1609 /** \brief Returns the identifier (ID) from the Tx Event Fifo element
1610 * \param txEventFifoElement Tx Event FIFO Element
1611 * \return Identifier
1612 */
1613 IFX_INLINE uint32 IfxCan_Node_getMesssageIdFromTxEventFifo(Ifx_CAN_TXEVENT *txEventFifoElement);
1614
1615 /** \brief Returns the Remote Transmission Request Status (RTR) from the Tx Event Fifo element
1616 * \param txEventFifoElement Tx Event FIFO Element
1617 * \return Remote Transmission Request Status
1618 */
1619 IFX_INLINE boolean IfxCan_Node_getRTRFromTxEventFifo(Ifx_CAN_TXEVENT *txEventFifoElement);
1620
1621 /** \brief Returns the Tx Time Stamp (TXTS) from the Tx Event Fifo element
1622 * \param txEventFifoElement Tx Event FIFO Element
1623 * \return Tx Time Stamp
1624 */
1625 IFX_INLINE uint16 IfxCan_Node_getTXTSFromTxEventFifo(Ifx_CAN_TXEVENT *txEventFifoElement);
1626
1627 /** \brief Returns the Tx Event Fifo Acknowledge Index
1628 * \param node Specifies the pointer to the CAN Node registers
1629 * \return Returns Tx Event Fifo Acknowledge Index
1630 */
1631 IFX_INLINE uint8 IfxCan_Node_getTxEventFifoAcknowledgeIndex(Ifx_CAN_N *node);
1632
1633 /** \brief Returns the Tx Event Fifo Fill Level
1634 * \param node Specifies the pointer to the CAN Node registers
1635 * \return Returns Tx Event Fifo Fill Level
1636 */
1637 IFX_INLINE uint8 IfxCan_Node_getTxEventFifoFillLevel(Ifx_CAN_N *node);
1638
1639 /** \brief Returns the Tx Event Fifo Get Index
1640 * \param node Specifies the pointer to the CAN Node registers
1641 * \return Returns Tx Event Fifo Get Index
1642 */
1643 IFX_INLINE uint8 IfxCan_Node_getTxEventFifoGetIndex(Ifx_CAN_N *node);
1644
1645 /** \brief Returns the Tx Event Fifo Put Index
1646 * \param node Specifies the pointer to the CAN Node registers
1647 * \return Returns Tx Event Fifo Put Index
1648 */
1649 IFX_INLINE uint8 IfxCan_Node_getTxEventFifoPutIndex(Ifx_CAN_N *node);
1650
1651 /** \brief Returns Tx Event Fifo Size
1652 * \param node Specifies the pointer to the CAN Node registers
1653 * \return Tx Event Fifo Size
1654 */
1655 IFX_INLINE uint8 IfxCan_Node_getTxEventFifoSize(Ifx_CAN_N *node);
1656
1657 /** \brief Returns Tx Event Fifo Start Address
1658 * \param node Specifies the pointer to the CAN Node registers
1659 * \return Tx Event Fifo Start Address
1660 */
1661 IFX_INLINE uint16 IfxCan_Node_getTxEventFifoStartAddress(Ifx_CAN_N *node);
1662
1663 /** \brief Returns Tx Event Fifo Watermark Level
1664 * \param node Specifies the pointer to the CAN Node registers
1665 * \return Tx Event Fifo Watermark Level
1666 */
1667 IFX_INLINE uint8 IfxCan_Node_getTxEventFifoWatermarkLevel(Ifx_CAN_N *node);
1668
1669 /** \brief Returns the status of Tx Event Fifo Element lost
1670 * \param node Specifies the pointer to the CAN Node registers
1671 * \return Returns status of Tx Event Fifo Element Lost\n
1672 * True : elemnt lost\n
1673 * False : element not lost
1674 */
1675 IFX_INLINE boolean IfxCan_Node_isTxEventFifoElementLost(Ifx_CAN_N *node);
1676
1677 /** \brief Returns the status of Tx Event Fifo Full
1678 * \param node Specifies the pointer to the CAN Node registers
1679 * \return Returns status of Tx Event Fifo Full\n
1680 * True : Fifo full\n
1681 * False : Fifo not full
1682 */
1683 IFX_INLINE boolean IfxCan_Node_isTxEventFifoFull(Ifx_CAN_N *node);
1684
1685 /** \brief Sets Tx Event Fifo Size
1686 * \param node Specifies the pointer to the CAN Node registers
1687 * \param size Tx Event Fifo Size
1688 * \return None
1689 */
1690 IFX_INLINE void IfxCan_Node_setTxEventFifoSize(Ifx_CAN_N *node, uint8 size);
1691
1692 /** \brief Sets Tx Event Fifo Start Address
1693 * \param node Specifies the pointer to the CAN Node registers
1694 * \param address Tx Event Fifo Start Address
1695 * \return None
1696 */
1697 IFX_INLINE void IfxCan_Node_setTxEventFifoStartAddress(Ifx_CAN_N *node, uint16 address);
1698
1699 /** \brief Sets Tx Event Fifo Watermark Level
1700 * \param node Specifies the pointer to the CAN Node registers
1701 * \param level Tx Event Fifo Watermark Level
1702 * \return None
1703 */
1704 IFX_INLINE void IfxCan_Node_setTxEventFifoWatermarkLevel(Ifx_CAN_N *node, uint8 level);
1705
1706 /******************************************************************************/
1707 /*-------------------------Global Function Prototypes-------------------------*/
1708 /******************************************************************************/
1709
1710 /** \brief Returns CAN frame mode of operation for a Tx Event Fifo Element
1711 * \param txEventFifoElement Tx Event Fifo Element
1712 * \return CAN frame mode
1713 */
1714 IFX_EXTERN IfxCan_FrameMode IfxCan_Node_getFrameModeFromTxEventFifo(Ifx_CAN_TXEVENT *txEventFifoElement);
1715
1716 /** \brief Returns the address of selected Tx Event Fifo element
1717 * \param ramBaseAddress Message RAM base address of CAN module
1718 * \param txEventFifoStartAddress Start address of Tx Event Fifo section in the Message RAM
1719 * \param txEventFifoNumber Tx Event Fifo element number
1720 * \return Tx Event Fifo Element Address
1721 */
1722 IFX_EXTERN Ifx_CAN_TXEVENT *IfxCan_Node_getTxEventFifoElementAddress(uint32 ramBaseAddress, uint16 txEventFifoStartAddress, uint8 txEventFifoNumber);
1723
1724 /** \} */
1725
1726 /******************************************************************************/
1727 /*-------------------------Inline Function Prototypes-------------------------*/
1728 /******************************************************************************/
1729
1730 /** \brief CAN frame format of the last received message.
1731 * TRUE: CAN FD frame received
1732 * FALSE: CAN FD frame not received
1733 * \param node Specifies the pointer to CAN node registers
1734 * \return CAN Frame format (TRUE/FALSE)
1735 */
1736 IFX_INLINE boolean IfxCan_Node_isCanFDMsgReceived(Ifx_CAN_N *node);
1737
1738 /******************************************************************************/
1739 /*-------------------------Global Function Prototypes-------------------------*/
1740 /******************************************************************************/
1741
1742 /** \brief Returns the address of interrupt node source register
1743 * \param can Specifies the pointer to the CAN registers
1744 * \param interruptLine Interrupt line number
1745 * \return Address of interrupt node source register
1746 */
1747 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxCan_getSrcPointer(Ifx_CAN *can, IfxCan_InterruptLine interruptLine);
1748
1749 /******************************************************************************/
1750 /*---------------------Inline Function Implementations------------------------*/
1751 /******************************************************************************/
1752
1753 IFX_INLINE void IfxCan_Node_acceptRemoteFramesWithStandardId(Ifx_CAN_N *node)
1754 {
1755 node->GFC.B.RRFS = 0U;
1756 }
1757
1758
1759 IFX_INLINE void IfxCan_Node_acceptRemoteFrameswithExtendedId(Ifx_CAN_N *node)
1760 {
1761 node->GFC.B.RRFE = 0U;
1762 }
1763
1764
1765 IFX_INLINE void IfxCan_Node_clearInterruptFlag(Ifx_CAN_N *node, IfxCan_Interrupt interrupt)
1766 {
1767 uint32 value = (1U << interrupt);
1768 node->IR.U = value;
1769 }
1770
1771
1772 IFX_INLINE void IfxCan_Node_configureExtendedFilterForNonMatchingFrames(Ifx_CAN_N *node, IfxCan_NonMatchingFrame filter)
1773 {
1774 node->GFC.B.ANFE = filter;
1775 }
1776
1777
1778 IFX_INLINE void IfxCan_Node_configureStandardFilterForNonMatchingFrames(Ifx_CAN_N *node, IfxCan_NonMatchingFrame filter)
1779 {
1780 node->GFC.B.ANFS = filter;
1781 }
1782
1783
1784 IFX_INLINE void IfxCan_Node_disableConfigurationChange(Ifx_CAN_N *node)
1785 {
1786 node->CCCR.B.CCE = 0;
1787
1788 while (node->CCCR.B.CCE != 0)
1789 {}
1790
1791 node->CCCR.B.INIT = 0;
1792
1793 while (node->CCCR.B.INIT != 0)
1794 {}
1795 }
1796
1797
1798 IFX_INLINE void IfxCan_Node_disableInterrupt(Ifx_CAN_N *node, IfxCan_Interrupt interrupt)
1799 {
1800 uint32 mask = (1U << interrupt);
1801 node->IE.U = node->IE.U & ~(mask);
1802 }
1803
1804
1805 IFX_INLINE void IfxCan_Node_disableTxBufferCancellationFinishedInterrupt(Ifx_CAN_N *node, IfxCan_TxBufferId txBufferId)
1806 {
1807 uint32 mask = (1U << txBufferId);
1808 node->TX.BCIE.U = node->TX.BCIE.U & ~(mask);
1809 }
1810
1811
1812 IFX_INLINE void IfxCan_Node_disableTxBufferTransmissionInterrupt(Ifx_CAN_N *node, IfxCan_TxBufferId txBufferId)
1813 {
1814 uint32 mask = (1U << txBufferId);
1815 node->TX.BTIE.U = node->TX.BTIE.U & ~(mask);
1816 }
1817
1818
1819 IFX_INLINE void IfxCan_Node_enableConfigurationChange(Ifx_CAN_N *node)
1820 {
1821 Ifx_CAN_N_CCCR cccr;
1822
1823 /* If INIT already set, clear it before setting again. */
1824 /* The module needs some time if INIT was rewritten !*/
1825 if (node->CCCR.B.INIT == 1)
1826 {
1827 node->CCCR.B.CCE = 0;
1828
1829 while (node->CCCR.B.CCE != 0)
1830 {}
1831
1832 node->CCCR.B.INIT = 0;
1833
1834 while (node->CCCR.B.INIT != 0)
1835 {}
1836 }
1837
1838 node->CCCR.B.INIT = 1;
1839
1840 while (node->CCCR.B.INIT != 1)
1841 {}
1842
1843 {
1844 cccr.U = node->CCCR.U;
1845 cccr.B.INIT = 1;
1846 cccr.B.CCE = 1;
1847 node->CCCR.U = cccr.U;
1848 }
1849 }
1850
1851
1852 IFX_INLINE void IfxCan_Node_enableInterrupt(Ifx_CAN_N *node, IfxCan_Interrupt interrupt)
1853 {
1854 uint32 mask = (1U << interrupt);
1855 node->IE.U = node->IE.U | (mask);
1856 }
1857
1858
1859 IFX_INLINE void IfxCan_Node_enableLoopbackMode(Ifx_CAN_N *node)
1860 {
1861 node->NPCR.B.LBM = 1;
1862 }
1863
1864
1865 IFX_INLINE void IfxCan_Node_enableTxBufferCancellationFinishedInterrupt(Ifx_CAN_N *node, IfxCan_TxBufferId txBufferId)
1866 {
1867 uint32 mask = (1U << txBufferId);
1868 node->TX.BCIE.U = node->TX.BCIE.U | (mask);
1869 }
1870
1871
1872 IFX_INLINE void IfxCan_Node_enableTxBufferTransmissionInterrupt(Ifx_CAN_N *node, IfxCan_TxBufferId txBufferId)
1873 {
1874 uint32 mask = (1U << txBufferId);
1875 node->TX.BTIE.U = node->TX.BTIE.U | (mask);
1876 }
1877
1878
1879 IFX_INLINE boolean IfxCan_Node_getBRSFromTxEventFifo(Ifx_CAN_TXEVENT *txEventFifoElement)
1880 {
1881 return txEventFifoElement->E1.B.BRS;
1882 }
1883
1884
1885 IFX_INLINE uint32 IfxCan_Node_getDLCFromTxEventFifo(Ifx_CAN_TXEVENT *txEventFifoElement)
1886 {
1887 return (IfxCan_DataLengthCode)txEventFifoElement->E1.B.DLC;
1888 }
1889
1890
1891 IFX_INLINE uint32 IfxCan_Node_getDataLengthCode(Ifx_CAN_RXMSG *rxBufferElement)
1892 {
1893 return (IfxCan_DataLengthCode)rxBufferElement->R1.B.DLC;
1894 }
1895
1896
1897 IFX_INLINE boolean IfxCan_Node_getESIFromTxEventFifo(Ifx_CAN_TXEVENT *txEventFifoElement)
1898 {
1899 return txEventFifoElement->E0.B.ESI;
1900 }
1901
1902
1903 IFX_INLINE boolean IfxCan_Node_getFDFFromTxEventFifo(Ifx_CAN_TXEVENT *txEventFifoElement)
1904 {
1905 return txEventFifoElement->E1.B.FDF;
1906 }
1907
1908
1909 IFX_INLINE boolean IfxCan_Node_getInterruptFlagStatus(Ifx_CAN_N *node, IfxCan_Interrupt interrupt)
1910 {
1911 uint32 mask = (1U << interrupt);
1912 boolean status = (node->IR.U & mask) != 0;
1913 return status;
1914 }
1915
1916
1917 IFX_INLINE uint8 IfxCan_Node_getMMFromTxEventFifo(Ifx_CAN_TXEVENT *txEventFifoElement)
1918 {
1919 return (uint8)txEventFifoElement->E1.B.MM;
1920 }
1921
1922
1923 IFX_INLINE uint32 IfxCan_Node_getMesssageId(Ifx_CAN_RXMSG *rxBufferElement)
1924 {
1925 /* get identifier extention */
1926 IfxCan_MessageIdLength messageIdLength = (IfxCan_MessageIdLength)rxBufferElement->R0.B.XTD;
1927
1928 /* get identifier */
1929 return rxBufferElement->R0.B.ID >> ((messageIdLength != IfxCan_MessageIdLength_standard) ? 0 : 18);
1930 }
1931
1932
1933 IFX_INLINE uint32 IfxCan_Node_getMesssageIdFromTxEventFifo(Ifx_CAN_TXEVENT *txEventFifoElement)
1934 {
1935 /* get identifier extention */
1936 IfxCan_MessageIdLength messageIdLength = (IfxCan_MessageIdLength)txEventFifoElement->E0.B.XTD;
1937
1938 /* get identifier */
1939 return txEventFifoElement->E0.B.ID >> ((messageIdLength != IfxCan_MessageIdLength_standard) ? 0 : 18);
1940 }
1941
1942
1943 IFX_INLINE boolean IfxCan_Node_getRTRFromTxEventFifo(Ifx_CAN_TXEVENT *txEventFifoElement)
1944 {
1945 return txEventFifoElement->E0.B.RTR;
1946 }
1947
1948
1949 IFX_INLINE uint8 IfxCan_Node_getRxFifo0FillLevel(Ifx_CAN_N *node)
1950 {
1951 return node->RX.F0S.B.F0FL;
1952 }
1953
1954
1955 IFX_INLINE IfxCan_RxBufferId IfxCan_Node_getRxFifo0GetIndex(Ifx_CAN_N *node)
1956 {
1957 return (IfxCan_RxBufferId)node->RX.F0S.B.F0GI;
1958 }
1959
1960
1961 IFX_INLINE uint8 IfxCan_Node_getRxFifo1FillLevel(Ifx_CAN_N *node)
1962 {
1963 return node->RX.F1S.B.F1FL;
1964 }
1965
1966
1967 IFX_INLINE IfxCan_RxBufferId IfxCan_Node_getRxFifo1GetIndex(Ifx_CAN_N *node)
1968 {
1969 return (IfxCan_RxBufferId)node->RX.F1S.B.F1GI;
1970 }
1971
1972
1973 IFX_INLINE uint16 IfxCan_Node_getTXTSFromTxEventFifo(Ifx_CAN_TXEVENT *txEventFifoElement)
1974 {
1975 return (uint16)txEventFifoElement->E1.B.TXTS;
1976 }
1977
1978
1979 IFX_INLINE uint8 IfxCan_Node_getTxEventFifoAcknowledgeIndex(Ifx_CAN_N *node)
1980 {
1981 return (uint8)node->TX.EFA.B.EFAI;
1982 }
1983
1984
1985 IFX_INLINE uint8 IfxCan_Node_getTxEventFifoFillLevel(Ifx_CAN_N *node)
1986 {
1987 return (uint8)node->TX.EFS.B.EFFL;
1988 }
1989
1990
1991 IFX_INLINE uint8 IfxCan_Node_getTxEventFifoGetIndex(Ifx_CAN_N *node)
1992 {
1993 return (uint8)node->TX.EFS.B.EFGI;
1994 }
1995
1996
1997 IFX_INLINE uint8 IfxCan_Node_getTxEventFifoPutIndex(Ifx_CAN_N *node)
1998 {
1999 return (uint8)node->TX.EFS.B.EFPI;
2000 }
2001
2002
2003 IFX_INLINE uint8 IfxCan_Node_getTxEventFifoSize(Ifx_CAN_N *node)
2004 {
2005 return (uint8)node->TX.EFC.B.EFS;
2006 }
2007
2008
2009 IFX_INLINE uint16 IfxCan_Node_getTxEventFifoStartAddress(Ifx_CAN_N *node)
2010 {
2011 return (uint16)node->TX.EFC.B.EFSA;
2012 }
2013
2014
2015 IFX_INLINE uint8 IfxCan_Node_getTxEventFifoWatermarkLevel(Ifx_CAN_N *node)
2016 {
2017 return (uint8)node->TX.EFC.B.EFWM;
2018 }
2019
2020
2021 IFX_INLINE IfxCan_TxBufferId IfxCan_Node_getTxFifoQueuePutIndex(Ifx_CAN_N *node)
2022 {
2023 return (IfxCan_TxBufferId)node->TX.FQS.B.TFQPI;
2024 }
2025
2026
2027 IFX_INLINE boolean IfxCan_Node_isNodeSynchronized(Ifx_CAN_N *node)
2028 {
2029 return (boolean)((node->PSR.B.ACT != 0) ? 1 : 0);
2030 }
2031
2032
2033 IFX_INLINE boolean IfxCan_Node_isTxBufferCancellationFinished(Ifx_CAN_N *node, IfxCan_TxBufferId txBufferId)
2034 {
2035 uint32 mask = (1U << txBufferId);
2036 boolean tempVar = (boolean)(node->TX.BTO.U & mask);
2037 return tempVar;
2038 }
2039
2040
2041 IFX_INLINE boolean IfxCan_Node_isTxBufferRequestPending(Ifx_CAN_N *node, IfxCan_TxBufferId txBufferId)
2042 {
2043 uint32 mask = (1U << txBufferId);
2044 boolean tempVar = (boolean)(node->TX.BRP.U & mask);
2045 return tempVar;
2046 }
2047
2048
2049 IFX_INLINE boolean IfxCan_Node_isTxBufferTransmissionOccured(Ifx_CAN_N *node, IfxCan_TxBufferId txBufferId)
2050 {
2051 uint32 mask = (1U << txBufferId);
2052 return (boolean)(node->TX.BTO.U & mask);
2053 }
2054
2055
2056 IFX_INLINE boolean IfxCan_Node_isTxEventFifoElementLost(Ifx_CAN_N *node)
2057 {
2058 return node->TX.EFS.B.TEFL;
2059 }
2060
2061
2062 IFX_INLINE boolean IfxCan_Node_isTxEventFifoFull(Ifx_CAN_N *node)
2063 {
2064 return node->TX.EFS.B.EFF;
2065 }
2066
2067
2068 IFX_INLINE boolean IfxCan_Node_isTxFifoQueueFull(Ifx_CAN_N *node)
2069 {
2070 return node->TX.FQS.B.TFQF;
2071 }
2072
2073
2074 IFX_INLINE void IfxCan_Node_pauseTransmission(Ifx_CAN_N *node, boolean enable)
2075 {
2076 node->CCCR.B.TXP = enable ? 1 : 0;
2077 }
2078
2079
2080 IFX_INLINE void IfxCan_Node_rejectRemoteFramesWithExtendedId(Ifx_CAN_N *node)
2081 {
2082 node->GFC.B.RRFE = 1U;
2083 }
2084
2085
2086 IFX_INLINE void IfxCan_Node_rejectRemoteFramesWithStandardId(Ifx_CAN_N *node)
2087 {
2088 node->GFC.B.RRFS = 1U;
2089 }
2090
2091
2092 IFX_INLINE void IfxCan_Node_setDataLength(Ifx_CAN_TXMSG *txBufferElement, IfxCan_DataLengthCode dataLengthCode)
2093 {
2094 txBufferElement->T1.B.DLC = dataLengthCode;
2095 }
2096
2097
2098 IFX_INLINE void IfxCan_Node_setDataLengthCode(Ifx_CAN_N *node, Ifx_CAN_TXMSG *txBufferElement, IfxCan_DataLengthCode dataLengthCode)
2099 {
2100 IFX_UNUSED_PARAMETER(node);
2101 txBufferElement->T1.B.DLC = dataLengthCode;
2102 }
2103
2104
2105 IFX_INLINE void IfxCan_Node_setDedicatedTxBuffersNumber(Ifx_CAN_N *node, uint8 number)
2106 {
2107 node->TX.BC.B.NDTB = number;
2108 }
2109
2110
2111 IFX_INLINE void IfxCan_Node_setErrStateIndicator(Ifx_CAN_TXMSG *txBufferElement, boolean enable)
2112 {
2113 txBufferElement->T0.B.ESI = enable ? 1 : 0;
2114 }
2115
2116
2117 IFX_INLINE void IfxCan_Node_setErrorStateIndicator(Ifx_CAN_N *node, Ifx_CAN_TXMSG *txBufferElement, boolean enable)
2118 {
2119 IFX_UNUSED_PARAMETER(node);
2120 txBufferElement->T0.B.ESI = enable ? 1 : 0;
2121 }
2122
2123
2124 IFX_INLINE void IfxCan_Node_setExtendedFilterConfiguration(Ifx_CAN_EXTMSG *extendedFilterElement, IfxCan_FilterElementConfiguration filterElementConfiguration)
2125 {
2126 extendedFilterElement->F0.B.EFEC = filterElementConfiguration;
2127 }
2128
2129
2130 IFX_INLINE void IfxCan_Node_setExtendedFilterId1(Ifx_CAN_EXTMSG *extendedFilterElement, uint32 id)
2131 {
2132 extendedFilterElement->F0.B.EFID1 = id;
2133 }
2134
2135
2136 IFX_INLINE void IfxCan_Node_setExtendedFilterId2(Ifx_CAN_EXTMSG *extendedFilterElement, uint32 id)
2137 {
2138 extendedFilterElement->F1.B.EFID2 = id;
2139 }
2140
2141
2142 IFX_INLINE void IfxCan_Node_setExtendedFilterListSize(Ifx_CAN_N *node, uint8 size)
2143 {
2144 node->XIDFC.B.LSE = size;
2145 }
2146
2147
2148 IFX_INLINE void IfxCan_Node_setExtendedFilterListStartAddress(Ifx_CAN_N *node, uint16 address)
2149 {
2150 node->XIDFC.B.FLESA = address >> 2;
2151 }
2152
2153
2154 IFX_INLINE void IfxCan_Node_setExtendedFilterRxBufferOffset(Ifx_CAN_EXTMSG *extendedFilterElement, IfxCan_RxBufferId rxBufferNumber)
2155 {
2156 extendedFilterElement->F1.B.EFID2 = (uint8)rxBufferNumber;
2157 }
2158
2159
2160 IFX_INLINE void IfxCan_Node_setExtendedFilterType(Ifx_CAN_EXTMSG *extendedFilterElement, IfxCan_FilterType filterType)
2161 {
2162 extendedFilterElement->F1.B.EFT = filterType;
2163 }
2164
2165
2166 IFX_INLINE void IfxCan_Node_setInitialisation(Ifx_CAN_N *node, boolean enable)
2167 {
2168 node->CCCR.B.INIT = enable ? 1 : 0;
2169 }
2170
2171
2172 IFX_INLINE void IfxCan_Node_setMessageMarker(Ifx_CAN_TXMSG *txBufferElement, IfxCan_TxBufferId bufferId)
2173 {
2174 txBufferElement->T1.B.MM = bufferId;
2175 }
2176
2177
2178 IFX_INLINE void IfxCan_Node_setMsgId(Ifx_CAN_TXMSG *txBufferElement, uint32 messageId, IfxCan_MessageIdLength messageIdLength)
2179 {
2180 /* set identifier extention */
2181 txBufferElement->T0.B.XTD = (messageIdLength != IfxCan_MessageIdLength_extended) ? 0 : 1;
2182 /* set identifier */
2183 txBufferElement->T0.B.ID = messageId << ((messageIdLength != IfxCan_MessageIdLength_standard) ? 0 : 18);
2184 }
2185
2186
2187 IFX_INLINE void IfxCan_Node_setMesssageId(Ifx_CAN_N *node, Ifx_CAN_TXMSG *txBufferElement, uint32 messageId, IfxCan_MessageIdLength messageIdLength)
2188 {
2189 IFX_UNUSED_PARAMETER(node);
2190 /* set identifier extention */
2191 txBufferElement->T0.B.XTD = (messageIdLength != IfxCan_MessageIdLength_extended) ? 0 : 1;
2192 /* set identifier */
2193 txBufferElement->T0.B.ID = messageId << ((messageIdLength != IfxCan_MessageIdLength_standard) ? 0 : 18);
2194 }
2195
2196
2197 IFX_INLINE void IfxCan_Node_setRemoteTransmitReq(Ifx_CAN_TXMSG *txBufferElement, boolean enable)
2198 {
2199 txBufferElement->T0.B.RTR = enable ? 1 : 0;
2200 }
2201
2202
2203 IFX_INLINE void IfxCan_Node_setRemoteTransmitRequest(Ifx_CAN_N *node, Ifx_CAN_TXMSG *txBufferElement, boolean enable)
2204 {
2205 IFX_UNUSED_PARAMETER(node);
2206 txBufferElement->T0.B.RTR = enable ? 1 : 0;
2207 }
2208
2209
2210 IFX_INLINE void IfxCan_Node_setRxBufferDataFieldSize(Ifx_CAN_N *node, IfxCan_DataFieldSize size)
2211 {
2212 node->RX.ESC.B.RBDS = size;
2213 }
2214
2215
2216 IFX_INLINE void IfxCan_Node_setRxBuffersStartAddress(Ifx_CAN_N *node, uint16 address)
2217 {
2218 node->RX.BC.B.RBSA = address >> 2;
2219 }
2220
2221
2222 IFX_INLINE void IfxCan_Node_setRxFifo0AcknowledgeIndex(Ifx_CAN_N *node, IfxCan_RxBufferId RxBufferNumber)
2223 {
2224 node->RX.F0A.B.F0AI = RxBufferNumber;
2225 }
2226
2227
2228 IFX_INLINE void IfxCan_Node_setRxFifo0DataFieldSize(Ifx_CAN_N *node, IfxCan_DataFieldSize size)
2229 {
2230 node->RX.ESC.B.F0DS = size;
2231 }
2232
2233
2234 IFX_INLINE void IfxCan_Node_setRxFifo0OperatingMode(Ifx_CAN_N *node, IfxCan_RxFifoMode mode)
2235 {
2236 node->RX.F0C.B.F0OM = mode;
2237 }
2238
2239
2240 IFX_INLINE void IfxCan_Node_setRxFifo0Size(Ifx_CAN_N *node, uint8 size)
2241 {
2242 node->RX.F0C.B.F0S = size;
2243 }
2244
2245
2246 IFX_INLINE void IfxCan_Node_setRxFifo0StartAddress(Ifx_CAN_N *node, uint16 address)
2247 {
2248 node->RX.F0C.B.F0SA = address >> 2;
2249 }
2250
2251
2252 IFX_INLINE void IfxCan_Node_setRxFifo0WatermarkLevel(Ifx_CAN_N *node, uint8 level)
2253 {
2254 node->RX.F0C.B.F0WM = level;
2255 }
2256
2257
2258 IFX_INLINE void IfxCan_Node_setRxFifo1AcknowledgeIndex(Ifx_CAN_N *node, IfxCan_RxBufferId RxBufferNumber)
2259 {
2260 node->RX.F1A.B.F1AI = RxBufferNumber;
2261 }
2262
2263
2264 IFX_INLINE void IfxCan_Node_setRxFifo1DataFieldSize(Ifx_CAN_N *node, IfxCan_DataFieldSize size)
2265 {
2266 node->RX.ESC.B.F1DS = size;
2267 }
2268
2269
2270 IFX_INLINE void IfxCan_Node_setRxFifo1OperatingMode(Ifx_CAN_N *node, IfxCan_RxFifoMode mode)
2271 {
2272 node->RX.F1C.B.F1OM = mode;
2273 }
2274
2275
2276 IFX_INLINE void IfxCan_Node_setRxFifo1Size(Ifx_CAN_N *node, uint8 size)
2277 {
2278 node->RX.F1C.B.F1S = size;
2279 }
2280
2281
2282 IFX_INLINE void IfxCan_Node_setRxFifo1StartAddress(Ifx_CAN_N *node, uint16 address)
2283 {
2284 node->RX.F1C.B.F1SA = address >> 2;
2285 }
2286
2287
2288 IFX_INLINE void IfxCan_Node_setRxFifo1WatermarkLevel(Ifx_CAN_N *node, uint8 level)
2289 {
2290 node->RX.F1C.B.F1WM = level;
2291 }
2292
2293
2294 IFX_INLINE void IfxCan_Node_setStandardFilterConfiguration(Ifx_CAN_STDMSG *standardFilterElement, IfxCan_FilterElementConfiguration filterElementConfiguration)
2295 {
2296 standardFilterElement->S0.B.SFEC = filterElementConfiguration;
2297 }
2298
2299
2300 IFX_INLINE void IfxCan_Node_setStandardFilterId1(Ifx_CAN_STDMSG *standardFilterElement, uint32 id)
2301 {
2302 standardFilterElement->S0.B.SFID1 = id;
2303 }
2304
2305
2306 IFX_INLINE void IfxCan_Node_setStandardFilterId2(Ifx_CAN_STDMSG *standardFilterElement, uint32 id)
2307 {
2308 standardFilterElement->S0.B.SFID2 = id;
2309 }
2310
2311
2312 IFX_INLINE void IfxCan_Node_setStandardFilterListSize(Ifx_CAN_N *node, uint8 size)
2313 {
2314 node->SIDFC.B.LSS = size;
2315 }
2316
2317
2318 IFX_INLINE void IfxCan_Node_setStandardFilterListStartAddress(Ifx_CAN_N *node, uint16 address)
2319 {
2320 node->SIDFC.B.FLSSA = address >> 2;
2321 }
2322
2323
2324 IFX_INLINE void IfxCan_Node_setStandardFilterRxBufferOffset(Ifx_CAN_STDMSG *standardFilterElement, IfxCan_RxBufferId rxBufferNumber)
2325 {
2326 standardFilterElement->S0.B.SFID2 = (uint8)rxBufferNumber;
2327 }
2328
2329
2330 IFX_INLINE void IfxCan_Node_setStandardFilterType(Ifx_CAN_STDMSG *standardFilterElement, IfxCan_FilterType filterType)
2331 {
2332 standardFilterElement->S0.B.SFT = filterType;
2333 }
2334
2335
2336 IFX_INLINE void IfxCan_Node_setTransceiverDelayCompensationOffset(Ifx_CAN_N *node, uint8 delay)
2337 {
2338 /* enable Transceiver Delay Compensation */
2339 node->DBTP.B.TDC = 1;
2340 /* set Transceiver Delay Compensation offset */
2341 node->TDCR.B.TDCO = delay;
2342 }
2343
2344
2345 IFX_INLINE void IfxCan_Node_setTransmitFifoQueueMode(Ifx_CAN_N *node, IfxCan_TxMode mode)
2346 {
2347 if ((mode == IfxCan_TxMode_fifo) || (mode == IfxCan_TxMode_queue))
2348 {
2349 node->TX.BC.B.TFQM = mode;
2350 }
2351 else
2352 {
2353 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE); /* wrong selection */
2354 }
2355 }
2356
2357
2358 IFX_INLINE void IfxCan_Node_setTransmitFifoQueueSize(Ifx_CAN_N *node, uint8 number)
2359 {
2360 node->TX.BC.B.TFQS = number;
2361 }
2362
2363
2364 IFX_INLINE void IfxCan_Node_setTxBufferAddRequest(Ifx_CAN_N *node, IfxCan_TxBufferId txBufferId)
2365 {
2366 uint32 mask = (1U << txBufferId);
2367 node->TX.BAR.U = node->TX.BAR.U | (mask);
2368 }
2369
2370
2371 IFX_INLINE void IfxCan_Node_setTxBufferCancellationRequest(Ifx_CAN_N *node, IfxCan_TxBufferId txBufferId)
2372 {
2373 uint32 mask = (1U << txBufferId);
2374 node->TX.BCR.U = node->TX.BCR.U | (mask);
2375 }
2376
2377
2378 IFX_INLINE void IfxCan_Node_setTxBufferDataFieldSize(Ifx_CAN_N *node, IfxCan_DataFieldSize size)
2379 {
2380 node->TX.ESC.B.TBDS = size;
2381 }
2382
2383
2384 IFX_INLINE void IfxCan_Node_setTxBuffersStartAddress(Ifx_CAN_N *node, uint16 address)
2385 {
2386 node->TX.BC.B.TBSA = address >> 2;
2387 }
2388
2389
2390 IFX_INLINE void IfxCan_Node_setTxEventFifoCtrl(Ifx_CAN_TXMSG *txBufferElement, boolean enable)
2391 {
2392 txBufferElement->T1.B.EFC = enable ? 1 : 0;
2393 }
2394
2395
2396 IFX_INLINE void IfxCan_Node_setTxEventFifoControl(Ifx_CAN_N *node, Ifx_CAN_TXMSG *txBufferElement, boolean enable)
2397 {
2398 IFX_UNUSED_PARAMETER(node);
2399 txBufferElement->T1.B.EFC = enable ? 1 : 0;
2400 }
2401
2402
2403 IFX_INLINE void IfxCan_Node_setTxEventFifoSize(Ifx_CAN_N *node, uint8 size)
2404 {
2405 node->TX.EFC.B.EFS = size;
2406 }
2407
2408
2409 IFX_INLINE void IfxCan_Node_setTxEventFifoStartAddress(Ifx_CAN_N *node, uint16 address)
2410 {
2411 node->TX.EFC.B.EFSA = address >> 2;
2412 }
2413
2414
2415 IFX_INLINE void IfxCan_Node_setTxEventFifoWatermarkLevel(Ifx_CAN_N *node, uint8 level)
2416 {
2417 node->TX.EFC.B.EFWM = level;
2418 }
2419
2420
2421 IFX_INLINE Ifx_CAN_N *IfxCan_getNodePointer(Ifx_CAN *can, IfxCan_NodeId nodeId)
2422 {
2423 return &(can->N[nodeId]);
2424 }
2425
2426
2427 IFX_INLINE boolean IfxCan_isModuleEnabled(Ifx_CAN *can)
2428 {
2429 return can->CLC.B.DISS == 0;
2430 }
2431
2432
2433 IFX_INLINE boolean IfxCan_isModuleSuspended(Ifx_CAN *can)
2434 {
2435 Ifx_CAN_OCS ocs;
2436
2437 // read the status
2438 ocs.U = can->OCS.U;
2439
2440 // return the status
2441 return ocs.B.SUSSTA;
2442 }
2443
2444
2445 IFX_INLINE void IfxCan_setSleepMode(Ifx_CAN *can, IfxCan_SleepMode mode)
2446 {
2447 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
2448 IfxScuWdt_clearCpuEndinit(passwd);
2449 can->CLC.B.EDIS = mode;
2450 IfxScuWdt_setCpuEndinit(passwd);
2451 }
2452
2453
2454 IFX_INLINE void IfxCan_setSuspendMode(Ifx_CAN *can, IfxCan_SuspendMode mode)
2455 {
2456 Ifx_CAN_OCS ocs;
2457
2458 // remove protection and configure the suspend mode.
2459 ocs.B.SUS_P = 1;
2460 ocs.B.SUS = mode;
2461 can->OCS.U = ocs.U;
2462 }
2463
2464
2465 IFX_INLINE IfxCan_LastErrorCodeType IfxCan_Node_getLastErroCodeStatus(Ifx_CAN_N *node)
2466 {
2467 return (IfxCan_LastErrorCodeType)(node->PSR.B.LEC);
2468 }
2469
2470
2471 IFX_INLINE boolean IfxCan_Node_isErrorPassive(Ifx_CAN_N *node)
2472 {
2473 return node->PSR.B.EP;
2474 }
2475
2476
2477 IFX_INLINE IfxCan_CanNodeErrorWarningLimitStatus IfxCan_Node_getWarningStatus(Ifx_CAN_N *node)
2478 {
2479 return (IfxCan_CanNodeErrorWarningLimitStatus)(node->PSR.B.EW);
2480 }
2481
2482
2483 IFX_INLINE IfxCan_CanNodeBusOffErrorStatus IfxCan_Node_getBusOffStatus(Ifx_CAN_N *node)
2484 {
2485 return (IfxCan_CanNodeBusOffErrorStatus)(node->PSR.B.BO);
2486 }
2487
2488
2489 IFX_INLINE IfxCan_CanNodeCommunicationState IfxCan_Node_getActivityStatus(Ifx_CAN_N *node)
2490 {
2491 return (IfxCan_CanNodeCommunicationState)(node->PSR.B.ACT);
2492 }
2493
2494
2495 IFX_INLINE IfxCan_LastErrorCodeType IfxCan_Node_getDataPhaseLastErrorCode(Ifx_CAN_N *node)
2496 {
2497 return (IfxCan_LastErrorCodeType)(node->PSR.B.DLEC);
2498 }
2499
2500
2501 IFX_INLINE boolean IfxCan_Node_isProtocolExceptionEventOccured(Ifx_CAN_N *node)
2502 {
2503 return node->PSR.B.PXE;
2504 }
2505
2506
2507 IFX_INLINE boolean IfxCan_Node_isErrorStatusIndicatorEnabled(Ifx_CAN_N *node)
2508 {
2509 return node->PSR.B.RESI;
2510 }
2511
2512
2513 IFX_INLINE boolean IfxCan_Node_isBitRateSwitchFlagEnabled(Ifx_CAN_N *node)
2514 {
2515 return node->PSR.B.RBRS;
2516 }
2517
2518
2519 IFX_INLINE boolean IfxCan_Node_isCanFDMsgReceived(Ifx_CAN_N *node)
2520 {
2521 return node->PSR.B.RFDF;
2522 }
2523
2524
2525 IFX_INLINE IfxCan_DataLengthCode IfxCan_Node_getCodeFromDataLengthInBytes(uint32 dataLength)
2526 {
2527 uint32 code;
2528
2529 if (dataLength <= 8)
2530 {
2531 code = dataLength;
2532 }
2533 else if (dataLength <= 24)
2534 {
2535 code = (dataLength >> 2) + 6;
2536 }
2537 else
2538 {
2539 code = (dataLength >> 4) + 11;
2540 }
2541
2542 return (IfxCan_DataLengthCode)code;
2543 }
2544
2545
2546 #endif /* IFXCAN_H */
IfxCan_Node_getRxFifo0DataFieldSize
IFX_EXTERN uint8 IfxCan_Node_getRxFifo0DataFieldSize(Ifx_CAN_N *node)
Returns Rx FIFO 0 Data Field Size in bytes.
Definition: IfxCan.c:213
IfxCan_InterruptGroup_hpe
High Priority Events.
Definition: IfxCan.h:239
IfxCan_Node_setRxFifo0StartAddress
IFX_INLINE void IfxCan_Node_setRxFifo0StartAddress(Ifx_CAN_N *node, uint16 address)
Sets the start address of Rx FIFO 0 section in the Message RAM (32-bit word address) ...
Definition: IfxCan.h:2246
IfxCan_Node_getTxEventFifoSize
IFX_INLINE uint8 IfxCan_Node_getTxEventFifoSize(Ifx_CAN_N *node)
Returns Tx Event Fifo Size.
Definition: IfxCan.h:2003
IfxCan_InterruptLine_7
Interrupt Line 7.
Definition: IfxCan.h:267
IfxCan_Node_setBitTiming
IFX_EXTERN void IfxCan_Node_setBitTiming(Ifx_CAN_N *node, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 syncJumpWidth)
Calculates and Sets the CAN baudrate for standard frames and arbitration phase of CAND FD frames...
Definition: IfxCan.c:385
IfxCan_Filter::elementConfiguration
IfxCan_FilterElementConfiguration elementConfiguration
*FEC, Filter Element Configuration of (standard / extended ID) filter element
Definition: IfxCan.h:513
IfxCan_Node_setRemoteTransmitReq
IFX_INLINE void IfxCan_Node_setRemoteTransmitReq(Ifx_CAN_TXMSG *txBufferElement, boolean enable)
Sets the remote Transmit Request (RTR) for transmit frame.
Definition: IfxCan.h:2197
IfxCan_FilterElementConfiguration_storeInRxBuffer
Store into Rx Buffer.
Definition: IfxCan.h:162
IfxCan_Interrupt_rxFifo0MessageLost
Rx FIFO 0 Message Lost Interrupt.
Definition: IfxCan.h:204
IfxCan_InterruptLine_13
Interrupt Line 13.
Definition: IfxCan.h:273
IfxCan_Node_getDataLength
IFX_EXTERN uint32 IfxCan_Node_getDataLength(IfxCan_DataLengthCode dataLengthCode)
Converts data length code (DLC) into number of words.
Definition: IfxCan.c:71
IfxCan_Node_getExtendedFilterElementAddress
IFX_EXTERN Ifx_CAN_EXTMSG * IfxCan_Node_getExtendedFilterElementAddress(uint32 ramBaseAddress, uint16 extendedFilterListStartAddress, uint8 filterNumber)
Returns the address of selected extended filter element.
Definition: IfxCan.c:114
IfxCan_Node_getRxBufferElementAddress
IFX_EXTERN Ifx_CAN_RXMSG * IfxCan_Node_getRxBufferElementAddress(Ifx_CAN_N *node, uint32 ramBaseAddress, uint16 rxBuffersStartAddress, IfxCan_RxBufferId rxBufferNumber)
Returns the address of selected Rx buffer element.
Definition: IfxCan.c:200
IfxCan_LastErrorCodeType_noCANBusEvent
No CAN bus event occured.
Definition: IfxCan.h:289
IfxCan_setSuspendMode
IFX_INLINE void IfxCan_setSuspendMode(Ifx_CAN *can, IfxCan_SuspendMode mode)
Set the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Su...
Definition: IfxCan.h:2454
IfxCan_Node_getFDFFromTxEventFifo
IFX_INLINE boolean IfxCan_Node_getFDFFromTxEventFifo(Ifx_CAN_TXEVENT *txEventFifoElement)
Returns the FD Format (FDF) from the Tx Event Fifo element.
Definition: IfxCan.h:1903
IfxCan_RxBufferId_43
Rx buffer 43.
Definition: IfxCan.h:357
IfxCan_Node_setStandardFilterListSize
IFX_INLINE void IfxCan_Node_setStandardFilterListSize(Ifx_CAN_N *node, uint8 size)
Sets the Standard Message ID filter list size.
Definition: IfxCan.h:2312
IfxCan_Node_getDLCFromTxEventFifo
IFX_INLINE uint32 IfxCan_Node_getDLCFromTxEventFifo(Ifx_CAN_TXEVENT *txEventFifoElement)
Returns the Data Length Code from the Tx Event Fifo Element.
Definition: IfxCan.h:1885
IfxCan_Node_pauseTransmission
IFX_INLINE void IfxCan_Node_pauseTransmission(Ifx_CAN_N *node, boolean enable)
pauses the CAN Node for two CAN bit times before starting the next transmission
Definition: IfxCan.h:2074
IfxCan_CanNodeCommunicationState_idle
Node is neither receiving nor transmitting.
Definition: IfxCan.h:497
IfxCan_Node_setRxFifo1DataFieldSize
IFX_INLINE void IfxCan_Node_setRxFifo1DataFieldSize(Ifx_CAN_N *node, IfxCan_DataFieldSize size)
Sets Rx Buffer Fifo 1 Data Field Size.
Definition: IfxCan.h:2264
IfxCan_Node_setTxEventFifoWatermarkLevel
IFX_INLINE void IfxCan_Node_setTxEventFifoWatermarkLevel(Ifx_CAN_N *node, uint8 level)
Sets Tx Event Fifo Watermark Level.
Definition: IfxCan.h:2415
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxCan_NonMatchingFrame_acceptToRxFifo1
Accepts the non matching messages into Rx FIFO 1.
Definition: IfxCan.h:306
IfxCan_Node_enableConfigurationChange
IFX_INLINE void IfxCan_Node_enableConfigurationChange(Ifx_CAN_N *node)
Enables the configuration change The CPU has write access to the protected configuration registers (w...
Definition: IfxCan.h:1819
IfxCan_MessageRAM::baseAddress
uint32 baseAddress
Message RAM base address of the CAN.
Definition: IfxCan.h:550
IfxCan_CanNodeCommunicationState_transmit
Node is operating as transmitter.
Definition: IfxCan.h:499
IfxCan_Node_initTxPin
IFX_EXTERN boolean IfxCan_Node_initTxPin(IfxCan_Txd_Out *txd, IfxPort_OutputMode mode, IfxPort_PadDriver padDriver)
Select and initialise the CAN node transmit pin.
Definition: IfxCan.c:341
IfxCan_RxBufferId_34
Rx buffer 34.
Definition: IfxCan.h:348
IfxCan_LastErrorCodeType_bit0Error
Transmitted dominant and read back recessive on the CAN bus.
Definition: IfxCan.h:287
IfxCan_Node_getStandardFilterElementAddress
IFX_EXTERN Ifx_CAN_STDMSG * IfxCan_Node_getStandardFilterElementAddress(uint32 ramBaseAddress, uint16 standardFilterListStartAddress, uint8 filterNumber)
Returns the address of selected standard filter element.
Definition: IfxCan.c:277
IfxCan_Node_isErrorPassive
IFX_INLINE boolean IfxCan_Node_isErrorPassive(Ifx_CAN_N *node)
Error Passive status of the CAN node. TRUE: CAN node in error passive. FALSE: CAN node not in error p...
Definition: IfxCan.h:2471
IfxCan_Node_setStandardFilterListStartAddress
IFX_INLINE void IfxCan_Node_setStandardFilterListStartAddress(Ifx_CAN_N *node, uint16 address)
Sets the start address of Standard Message ID filter list (32-bit word address)
Definition: IfxCan.h:2318
IfxCan_InterruptGroup_tefifo
Transmit Event FIFO Incidents.
Definition: IfxCan.h:238
IfxCan_Node_getDataLengthCode
IFX_INLINE uint32 IfxCan_Node_getDataLengthCode(Ifx_CAN_RXMSG *rxBufferElement)
Returns the Data Length Code from the received frame.
Definition: IfxCan.h:1891
IfxCan_RxBufferId_14
Rx buffer 14.
Definition: IfxCan.h:328
IfxCan_FrameMode_standard
Standard CAN frame (transmit and receive)
Definition: IfxCan.h:180
IfxCan_Node_getTxEventFifoPutIndex
IFX_INLINE uint8 IfxCan_Node_getTxEventFifoPutIndex(Ifx_CAN_N *node)
Returns the Tx Event Fifo Put Index.
Definition: IfxCan.h:1997
IfxCan_Status_messageLost
Definition: IfxCan.h:419
IfxCan_Interrupt_timeoutOccurred
Timeout Occurred Interrupt.
Definition: IfxCan.h:219
IfxCan_Node_getRxFifo0GetIndex
IFX_INLINE IfxCan_RxBufferId IfxCan_Node_getRxFifo0GetIndex(Ifx_CAN_N *node)
Returns Rx FIFO 0 get index.
Definition: IfxCan.h:1955
IfxCan_Node_isRxBufferNewDataUpdated
IFX_EXTERN boolean IfxCan_Node_isRxBufferNewDataUpdated(Ifx_CAN_N *node, IfxCan_RxBufferId rxBufferId)
Returns the status of whether the selcted Rx buffer has been updated from new data.
Definition: IfxCan.c:350
IfxCan_RxBufferId_42
Rx buffer 42.
Definition: IfxCan.h:356
IfxCan_MessageRAM::txBuffersStartAddress
uint16 txBuffersStartAddress
Start address of Tx Buffers section in the Message RAM (32-bit word address).
Definition: IfxCan.h:557
IfxCan_Interrupt_rxFifo0Full
Rx FIFO 0 Full Interrupt.
Definition: IfxCan.h:203
IfxCan_RxBufferId_41
Rx buffer 41.
Definition: IfxCan.h:355
IfxCan_Interrupt_AccessToReservedAddress
Access to Reserved Address Interrupt.
Definition: IfxCan.h:230
IfxCan_Node_enableTxBufferCancellationFinishedInterrupt
IFX_INLINE void IfxCan_Node_enableTxBufferCancellationFinishedInterrupt(Ifx_CAN_N *node, IfxCan_TxBufferId txBufferId)
Enables the Cancellation Finished Interrupt of the selected Tx buffer.
Definition: IfxCan.h:1865
IfxCan_Node_acceptRemoteFrameswithExtendedId
IFX_INLINE void IfxCan_Node_acceptRemoteFrameswithExtendedId(Ifx_CAN_N *node)
Disables the selected interrupt.
Definition: IfxCan.h:1759
IfxCan_RxBufferId_48
Rx buffer 48.
Definition: IfxCan.h:362
IfxCan_DataLengthCode_6
6 data bytes
Definition: IfxCan.h:139
IfxCan_DataLengthCode_12
12 data bytes
Definition: IfxCan.h:142
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:100
IfxCan_RxBufferId_60
Rx buffer 60.
Definition: IfxCan.h:374
IfxCan_Node_setMsgId
IFX_INLINE void IfxCan_Node_setMsgId(Ifx_CAN_TXMSG *txBufferElement, uint32 messageId, IfxCan_MessageIdLength messageIdLength)
Sets the identifier (ID) for transmit frame.
Definition: IfxCan.h:2178
IfxCan_TxBufferId_18
Tx buffer 18.
Definition: IfxCan.h:455
IfxCan_Node_setRemoteTransmitRequest
IFX_INLINE void IfxCan_Node_setRemoteTransmitRequest(Ifx_CAN_N *node, Ifx_CAN_TXMSG *txBufferElement, boolean enable)
Sets the remote Transmit Request (RTR) for transmit frame. This function is deprecated. Use new function IfxCan_Node_setRemoteTransmitReq.
Definition: IfxCan.h:2203
IfxCan_TxBufferId_14
Tx buffer 14.
Definition: IfxCan.h:451
IfxCan_Node_getRxFifo1FillLevel
IFX_INLINE uint8 IfxCan_Node_getRxFifo1FillLevel(Ifx_CAN_N *node)
Returns Rx FIFO 1 Fill Level.
Definition: IfxCan.h:1961
IfxCan_RxMode_dedicatedBuffers
Rx dedicated buffers operation.
Definition: IfxCan.h:393
IfxCan_Node_setTxBufferAddRequest
IFX_INLINE void IfxCan_Node_setTxBufferAddRequest(Ifx_CAN_N *node, IfxCan_TxBufferId txBufferId)
Sets the Add Request for the selected Tx buffer.
Definition: IfxCan.h:2364
IfxCan_Node_setTransmitFifoQueueMode
IFX_INLINE void IfxCan_Node_setTransmitFifoQueueMode(Ifx_CAN_N *node, IfxCan_TxMode mode)
Sets Transmit FIFO/Queue Mode.
Definition: IfxCan.h:2345
IfxCan_Status_newData
Definition: IfxCan.h:420
IfxCan_RxBufferId_23
Rx buffer 23.
Definition: IfxCan.h:337
IfxCan_TxBufferId_30
Tx buffer 30.
Definition: IfxCan.h:467
IfxCan_FrameMode
IfxCan_FrameMode
CAN Frame mode Description in Ifx_CAN.N[x].CCCR.CME, (x= 0 to 3)
Definition: IfxCan.h:178
IfxCan_TxBufferId_12
Tx buffer 12.
Definition: IfxCan.h:449
IfxCan_FilterType_range
Range filter from SF1ID to SF2ID (SF2ID is greater than SF1ID)
Definition: IfxCan.h:169
IfxCan_Node_getRTRFromTxEventFifo
IFX_INLINE boolean IfxCan_Node_getRTRFromTxEventFifo(Ifx_CAN_TXEVENT *txEventFifoElement)
Returns the Remote Transmission Request Status (RTR) from the Tx Event Fifo element.
Definition: IfxCan.h:1943
IfxCan_RxBufferId_32
Rx buffer 32.
Definition: IfxCan.h:346
IfxCan_MessageIdLength_standard
Standard Message ID.
Definition: IfxCan.h:296
IfxCan_InterruptLine_0
Interrupt Line 0.
Definition: IfxCan.h:260
IfxCan_Message::readFromRxFifo0
boolean readFromRxFifo0
Read message from Rx FIFO 0.
Definition: IfxCan.h:542
IfxCan_Interrupt_protocolErrorArbitration
Protocol Error in Arbitration phase Interrupt.
Definition: IfxCan.h:228
IfxCan_Message::errorStateIndicator
boolean errorStateIndicator
ESI, Error State Indicator (enable / disable)
Definition: IfxCan.h:537
IfxCan_Node_getDataLengthFromCode
IFX_EXTERN uint32 IfxCan_Node_getDataLengthFromCode(Ifx_CAN_N *node, IfxCan_DataLengthCode dataLengthCode)
Converts data length code (DLC) into number of data words. This function is deprecated. Use new function IfxCan_Node_getDataLength.
Definition: IfxCan.c:92
IfxCan_Node_setGroupInterruptLine
IFX_EXTERN void IfxCan_Node_setGroupInterruptLine(Ifx_CAN_N *node, IfxCan_InterruptGroup interruptGroup, IfxCan_InterruptLine interruptLine)
Sets the slected interrupt to the selcted interrupt line.
Definition: IfxCan.c:772
IfxCan_Node_setTxEventFifoCtrl
IFX_INLINE void IfxCan_Node_setTxEventFifoCtrl(Ifx_CAN_TXMSG *txBufferElement, boolean enable)
Sets the Tx Event Fifo Control (EFC) for transmit frame.
Definition: IfxCan.h:2390
IfxCan_Status_receiveEmpty
Definition: IfxCan.h:418
IfxCan_RxBufferId_36
Rx buffer 36.
Definition: IfxCan.h:350
IfxCan_RxBufferId_18
Rx buffer 18.
Definition: IfxCan.h:332
IfxCan_SleepMode
IfxCan_SleepMode
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_CAN.CLC.B.EDIS.
Definition: IfxCan.h:404
IfxCan_Node_setTransmitFifoQueueSize
IFX_INLINE void IfxCan_Node_setTransmitFifoQueueSize(Ifx_CAN_N *node, uint8 number)
Sets Transmit FIFO/Queue Size.
Definition: IfxCan.h:2358
IfxCan_RxBufferId_9
Rx buffer 9.
Definition: IfxCan.h:323
IfxCan_FilterElementConfiguration_storeInRxFifo0
Store in Rx FIFO 0 if filter matches.
Definition: IfxCan.h:156
IfxCan_MessageIdLength_extended
Extended Message ID.
Definition: IfxCan.h:297
IfxCan_InterruptLine_3
Interrupt Line 3.
Definition: IfxCan.h:263
IfxCan_Node_getCodeFromDataLengthInBytes
IFX_INLINE IfxCan_DataLengthCode IfxCan_Node_getCodeFromDataLengthInBytes(uint32 dataLength)
Return the DLC code corresponding to the data length in bytes.
Definition: IfxCan.h:2525
IfxCan_Interrupt_messageStoredToDedicatedRxBuffer
Message stored to Dedicated Rx Buffer Interrupt.
Definition: IfxCan.h:220
IfxCan_CanNodeBusOffErrorStatus_BusOffErr
CAN node in Bus Off state.
Definition: IfxCan.h:489
IfxCan_FrameType
IfxCan_FrameType
CAN frame type.
Definition: IfxCan.h:187
IfxCan_enableModule
IFX_EXTERN void IfxCan_enableModule(Ifx_CAN *can)
Enables the module (clears the disable request)
Definition: IfxCan.c:906
IfxCan_LastErrorCodeType_formError
Fixed format part of recieved frame has wrong format.
Definition: IfxCan.h:284
IfxCan_RxBufferId_54
Rx buffer 54.
Definition: IfxCan.h:368
IfxCan_Message::messageIdLength
IfxCan_MessageIdLength messageIdLength
XTD, Message Id length (Standard / Extended)
Definition: IfxCan.h:536
IfxCan_Interrupt_errorLoggingOverflow
Error Logging Overflow Interrupt.
Definition: IfxCan.h:223
IfxCan_Interrupt_rxFifo0NewMessage
Rx FIFO 0 New Message Interrupt.
Definition: IfxCan.h:201
IfxCan_TxBufferId_13
Tx buffer 13.
Definition: IfxCan.h:450
IfxCan_Node_enableLoopbackMode
IFX_INLINE void IfxCan_Node_enableLoopbackMode(Ifx_CAN_N *node)
Enables the internal Virtual CAN bus loopback mode.
Definition: IfxCan.h:1859
IfxCan_FilterElementConfiguration_rejectId
Reject ID if filter matches.
Definition: IfxCan.h:158
IfxCan_TxMode_fifo
Tx FIFO operation.
Definition: IfxCan.h:475
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:140
IfxCan_Interrupt_warningStatus
Warning Status Interrupt.
Definition: IfxCan.h:225
IfxCan_Node_setFrameMode
IFX_EXTERN void IfxCan_Node_setFrameMode(Ifx_CAN_N *node, IfxCan_FrameMode frameMode)
Enables the CAN frame mode for transmission.
Definition: IfxCan.c:710
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxCan_Node_getRxFifo1ElementAddress
IFX_EXTERN Ifx_CAN_RXMSG * IfxCan_Node_getRxFifo1ElementAddress(Ifx_CAN_N *node, uint32 ramBaseAddress, uint16 rxFifo1StartAddress, IfxCan_RxBufferId rxBufferNumber)
Returns the address of selected Rx FIFO 1 element.
Definition: IfxCan.c:264
IfxCan_DataLengthCode_2
2 data bytes
Definition: IfxCan.h:135
IfxCan_Node_setTxBufferDataFieldSize
IFX_INLINE void IfxCan_Node_setTxBufferDataFieldSize(Ifx_CAN_N *node, IfxCan_DataFieldSize size)
Sets Tx Buffer Data Field Size.
Definition: IfxCan.h:2378
IfxCan_GroupInterruptConfig::typeOfService
IfxSrc_Tos typeOfService
Type of Service.
Definition: IfxCan.h:526
IfxCan_RxBufferId_8
Rx buffer 8.
Definition: IfxCan.h:322
IfxCan_TxBufferId_24
Tx buffer 24.
Definition: IfxCan.h:461
float32
float float32
Definition: Platform_Types.h:170
IfxCan_RxBufferId_57
Rx buffer 57.
Definition: IfxCan.h:371
IfxCan_Node_getLastErroCodeStatus
IFX_INLINE IfxCan_LastErrorCodeType IfxCan_Node_getLastErroCodeStatus(Ifx_CAN_N *node)
Get the LEC error status of the CAN node.
Definition: IfxCan.h:2465
IfxCan_MessageRAM::txEventFifoStartAddress
uint16 txEventFifoStartAddress
Start address of Tx Event FIFO in Message RAM (32-bit w ord address)
Definition: IfxCan.h:556
IfxCan_Message::dataLengthCode
IfxCan_DataLengthCode dataLengthCode
DLC, Data Length Code.
Definition: IfxCan.h:538
IfxCan_GroupInterruptConfig
Configuration for Interrupt groups.
Definition: IfxCan.h:522
Ifx_Assert.h
Assert functions.
IfxCan_Node_isBitRateSwitchFlagEnabled
IFX_INLINE boolean IfxCan_Node_isBitRateSwitchFlagEnabled(Ifx_CAN_N *node)
Bit Rate Switch status of the last recieved CAN FD message. TRUE: Bit rate switch is enabled...
Definition: IfxCan.h:2513
IfxCan_Node_getMMFromTxEventFifo
IFX_INLINE uint8 IfxCan_Node_getMMFromTxEventFifo(Ifx_CAN_TXEVENT *txEventFifoElement)
Returns the Message Marker (MM) from the Tx Event Fifo element.
Definition: IfxCan.h:1917
IfxCan_RxBufferId_47
Rx buffer 47.
Definition: IfxCan.h:361
IfxCan_FilterType_classic
Classic filter: SF1ID = filter, SF2ID = mask.
Definition: IfxCan.h:171
IfxCan_InterruptGroup_moer
Module errors.
Definition: IfxCan.h:242
IfxCan_RxBufferId_21
Rx buffer 21.
Definition: IfxCan.h:335
IfxCan_Node_disableConfigurationChange
IFX_INLINE void IfxCan_Node_disableConfigurationChange(Ifx_CAN_N *node)
Disables the configuration change The CPU has no write access to the protected configuration register...
Definition: IfxCan.h:1784
IfxCan_Node_writeData
IFX_EXTERN void IfxCan_Node_writeData(Ifx_CAN_N *node, Ifx_CAN_TXMSG *txBufferElement, IfxCan_DataLengthCode dataLengthCode, uint32 *data)
Writes Data into Tx buffer element. This function is deprecated. Use new function IfxCan_Node_writeTx...
Definition: IfxCan.c:873
IfxCan_TxBufferId_4
Tx buffer 4.
Definition: IfxCan.h:441
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxCan_ClockSource
IfxCan_ClockSource
Type of Clock Source selection Description in Ifx_CAN.MCR.CLKSELx, (x = 0,1,2)
Definition: IfxCan.h:106
IfxCan_Node_setRxFifo0Size
IFX_INLINE void IfxCan_Node_setRxFifo0Size(Ifx_CAN_N *node, uint8 size)
Sets Rx FIFO 0 Size.
Definition: IfxCan.h:2240
IfxCan_CanNodeBusOffErrorStatus
IfxCan_CanNodeBusOffErrorStatus
CAN node Bus Off status.
Definition: IfxCan.h:486
IfxCan_Node_rejectRemoteFramesWithStandardId
IFX_INLINE void IfxCan_Node_rejectRemoteFramesWithStandardId(Ifx_CAN_N *node)
Reject the remote frames with standard id.
Definition: IfxCan.h:2086
IfxCan_FrameMode_fdLong
CAN FD long frame in transmit and CAN FD long and fast frame in receive.
Definition: IfxCan.h:181
IfxCan_RxMode_sharedFifo0
Rx shared dedicated buffers and Rx FIFO 0 operation.
Definition: IfxCan.h:396
IfxCan_isModuleEnabled
IFX_INLINE boolean IfxCan_isModuleEnabled(Ifx_CAN *can)
Returns the status of module enabled or disabled.
Definition: IfxCan.h:2427
IfxCan_Node_rejectRemoteFramesWithExtendedId
IFX_INLINE void IfxCan_Node_rejectRemoteFramesWithExtendedId(Ifx_CAN_N *node)
Reject the remote frames with extended id.
Definition: IfxCan.h:2080
IfxCan_Node_getTxEventFifoAcknowledgeIndex
IFX_INLINE uint8 IfxCan_Node_getTxEventFifoAcknowledgeIndex(Ifx_CAN_N *node)
Returns the Tx Event Fifo Acknowledge Index.
Definition: IfxCan.h:1979
IfxSrc.h
SRC basic functionality.
IfxCan_TxBufferId_29
Tx buffer 29.
Definition: IfxCan.h:466
IfxCan_Interrupt_rxFifo1MessageLost
Rx FIFO 1 Message Lost Interrupt.
Definition: IfxCan.h:208
IfxCan_Interrupt_highPriorityMessage
High Priority Message Interrupt.
Definition: IfxCan.h:209
IfxCan_Node_setExtendedFilterRxBufferOffset
IFX_INLINE void IfxCan_Node_setExtendedFilterRxBufferOffset(Ifx_CAN_EXTMSG *extendedFilterElement, IfxCan_RxBufferId rxBufferNumber)
Sets the Offset to the Rx Buffer Start Address RXBC.RBSA for storage of a matching message for Extend...
Definition: IfxCan.h:2154
IfxCan_InterruptGroup_loi
Last Error Interrupts.
Definition: IfxCan.h:245
IfxCan_Node_setErrStateIndicator
IFX_INLINE void IfxCan_Node_setErrStateIndicator(Ifx_CAN_TXMSG *txBufferElement, boolean enable)
Sets the Error State Indicator (ESI) for transmit frame.
Definition: IfxCan.h:2111
IfxCan_SuspendMode_soft
Soft Suspend.
Definition: IfxCan.h:430
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxCpu_Intrinsics.h
IfxCan_TxBufferId_0
Tx buffer 0.
Definition: IfxCan.h:437
IfxCan_Node_disableTxBufferCancellationFinishedInterrupt
IFX_INLINE void IfxCan_Node_disableTxBufferCancellationFinishedInterrupt(Ifx_CAN_N *node, IfxCan_TxBufferId txBufferId)
Disables the Cancellation Finished Interrupt of the selected Tx buffer.
Definition: IfxCan.h:1805
IfxCan_NodeId
IfxCan_NodeId
CAN Node number.
Definition: IfxCan_cfg.h:93
IfxCan_FilterElementConfiguration
IfxCan_FilterElementConfiguration
Filter Element Configuration.
Definition: IfxCan.h:153
IfxCan_Node_setTxBuffersStartAddress
IFX_INLINE void IfxCan_Node_setTxBuffersStartAddress(Ifx_CAN_N *node, uint16 address)
Sets the start address of Tx Buffers section in the Message RAM (32-bit word address) ...
Definition: IfxCan.h:2384
IfxCan_Node_setTxEventFifoStartAddress
IFX_INLINE void IfxCan_Node_setTxEventFifoStartAddress(Ifx_CAN_N *node, uint16 address)
Sets Tx Event Fifo Start Address.
Definition: IfxCan.h:2409
IfxCan_disableModule
IFX_EXTERN void IfxCan_disableModule(Ifx_CAN *can)
Disables the module (sets the disable request)
Definition: IfxCan.c:890
IfxCan_DataLengthCode_64
64 data bytes
Definition: IfxCan.h:148
IfxCan_InterruptLine_4
Interrupt Line 4.
Definition: IfxCan.h:264
IfxCan_RxBufferId_56
Rx buffer 56.
Definition: IfxCan.h:370
IfxCan_DataLengthCode_3
3 data bytes
Definition: IfxCan.h:136
IfxCan_RxBufferId_62
Rx buffer 62.
Definition: IfxCan.h:376
IfxCan_RxBufferId_20
Rx buffer 20.
Definition: IfxCan.h:334
IfxCan_Interrupt_watchdog
Watchdog Interrupt.
Definition: IfxCan.h:227
IfxCan_Interrupt_protocolErrorData
Protocol Error in Data phase Interrupt.
Definition: IfxCan.h:229
IfxCan_Node_getBRSFromTxEventFifo
IFX_INLINE boolean IfxCan_Node_getBRSFromTxEventFifo(Ifx_CAN_TXEVENT *txEventFifoElement)
Returns the Bit Rate Switch (BRS) from the Tx Event Fifo element.
Definition: IfxCan.h:1879
IfxCan_RxBufferId_55
Rx buffer 55.
Definition: IfxCan.h:369
IfxCan_SleepMode_disable
disables sleep mode
Definition: IfxCan.h:407
IfxCan_TxMode
IfxCan_TxMode
Tx FIFO/Queue Mode.
Definition: IfxCan.h:473
IfxCan_Interrupt_messageRAMAccessFailure
Message RAM Access Failure Interrupt.
Definition: IfxCan.h:218
IfxCan_RxBufferId_30
Rx buffer 30.
Definition: IfxCan.h:344
IfxCan_Node_setInterruptLine
IFX_EXTERN void IfxCan_Node_setInterruptLine(Ifx_CAN_N *node, IfxCan_Interrupt interrupt, IfxCan_InterruptLine interruptLine)
Sets the slected interrupt to the selcted interrupt line.
Definition: IfxCan.c:785
IfxCan_Node_isTxBufferRequestPending
IFX_INLINE boolean IfxCan_Node_isTxBufferRequestPending(Ifx_CAN_N *node, IfxCan_TxBufferId txBufferId)
Returns the status of pending request of the selected Tx buffer.
Definition: IfxCan.h:2041
IfxCan_ClockSelect_0
clock selection 0
Definition: IfxCan.h:97
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxCan_TxBufferId_15
Tx buffer 15.
Definition: IfxCan.h:452
IfxCan_RxBufferId_40
Rx buffer 40.
Definition: IfxCan.h:354
IfxCan_Node_configureExtendedFilterForNonMatchingFrames
IFX_INLINE void IfxCan_Node_configureExtendedFilterForNonMatchingFrames(Ifx_CAN_N *node, IfxCan_NonMatchingFrame filter)
Configure the filter for non matching frames with extended id.
Definition: IfxCan.h:1772
IfxCan_Message::remoteTransmitRequest
boolean remoteTransmitRequest
RTR, Remote Transmit Request (enable / disable)
Definition: IfxCan.h:535
IfxCan_MessageRAM::extendedFilterListStartAddress
uint16 extendedFilterListStartAddress
Start address of Extended Message ID filter list (32-bit word address)
Definition: IfxCan.h:552
IfxCan_SuspendMode
IfxCan_SuspendMode
OCDS Suspend Control (OCDS.SUS)
Definition: IfxCan.h:426
IfxCan_InterruptGroup_traco
Interrupts of the transmission control.
Definition: IfxCan.h:253
IfxCan_Node_getDataLengthInBytes
IFX_EXTERN uint32 IfxCan_Node_getDataLengthInBytes(IfxCan_DataLengthCode dataLengthCode)
Converts data length code (DLC) into number of bytes.
Definition: IfxCan.c:1036
IfxCan_Node_disableInterrupt
IFX_INLINE void IfxCan_Node_disableInterrupt(Ifx_CAN_N *node, IfxCan_Interrupt interrupt)
Disables the selected interrupt.
Definition: IfxCan.h:1798
IfxCan_Interrupt_txEventFifoFull
Tx Event FIFO Full Interrupt.
Definition: IfxCan.h:215
IfxCan_RxBufferId_51
Rx buffer 51.
Definition: IfxCan.h:365
IfxCan_MessageIdLength
IfxCan_MessageIdLength
Message Id length (Standard / Extended)
Definition: IfxCan.h:294
IfxCan_InterruptLine_11
Interrupt Line 11.
Definition: IfxCan.h:271
IfxCan_RxBufferId
IfxCan_RxBufferId
Rx Buffer number.
Definition: IfxCan.h:312
IfxCan_Node_setRxFifo1Size
IFX_INLINE void IfxCan_Node_setRxFifo1Size(Ifx_CAN_N *node, uint8 size)
Sets Rx FIFO 1 Size.
Definition: IfxCan.h:2276
IfxCan_Node_getRxFifo0FillLevel
IFX_INLINE uint8 IfxCan_Node_getRxFifo0FillLevel(Ifx_CAN_N *node)
Returns Rx FIFO 0 Fill Level.
Definition: IfxCan.h:1949
IfxCan_Interrupt_rxFifo1WatermarkReached
Rx FIFO 1 Watermark Reached Interrupt.
Definition: IfxCan.h:206
IfxCan_Message::messageId
uint32 messageId
ID, Identifier.
Definition: IfxCan.h:534
IfxCan_RxBufferId_38
Rx buffer 38.
Definition: IfxCan.h:352
IfxCan_TxBufferId_27
Tx buffer 27.
Definition: IfxCan.h:464
IfxCan_Node_setFastBitTiming
IFX_EXTERN void IfxCan_Node_setFastBitTiming(Ifx_CAN_N *node, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 syncJumpWidth)
Calulates and Sets the CAN fast baudrate for CAN FD frames data phase.
Definition: IfxCan.c:548
IfxCan_TxBufferId_7
Tx buffer 7.
Definition: IfxCan.h:444
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxCan_DataFieldSize_64
64 byte data field
Definition: IfxCan.h:126
IfxCan_TxBufferId_25
Tx buffer 25.
Definition: IfxCan.h:462
IfxCan_TxBufferId_16
Tx buffer 16.
Definition: IfxCan.h:453
IfxCan_RxBufferId_1
Rx buffer 1.
Definition: IfxCan.h:315
IfxCan_TxMode_sharedFifo
Tx shared dedicated buffers and Tx FIFO operation.
Definition: IfxCan.h:478
IfxCan_Status_ok
Definition: IfxCan.h:414
IfxCan_Node_setInitialisation
IFX_INLINE void IfxCan_Node_setInitialisation(Ifx_CAN_N *node, boolean enable)
Initialises the node 0= Normal Operation 1= Initialization is started.
Definition: IfxCan.h:2166
IfxCan_RxBufferId_53
Rx buffer 53.
Definition: IfxCan.h:367
IfxCan_RxMode_sharedFifo1
Rx shared dedicated buffers and Rx FIFO 1 operation.
Definition: IfxCan.h:397
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxCan_Node_setExtendedFilterListSize
IFX_INLINE void IfxCan_Node_setExtendedFilterListSize(Ifx_CAN_N *node, uint8 size)
Sets the Extended Message ID filter list size.
Definition: IfxCan.h:2142
IfxCan_Node_setFrameModeRequest
IFX_EXTERN void IfxCan_Node_setFrameModeRequest(Ifx_CAN_N *node, Ifx_CAN_TXMSG *txBufferElement, IfxCan_FrameMode frameMode)
Sets CAN frame mode request for transmission. This function is deprecated. Use new function IfxCan_No...
Definition: IfxCan.c:750
IfxCan_Interrupt_transmissionCompleted
Transmission Completed Interrupt.
Definition: IfxCan.h:210
IfxCan_RxBufferId_24
Rx buffer 24.
Definition: IfxCan.h:338
IfxCan_cfg.h
CAN on-chip implementation data.
IfxCan_Node_isTxBufferTransmissionOccured
IFX_INLINE boolean IfxCan_Node_isTxBufferTransmissionOccured(Ifx_CAN_N *node, IfxCan_TxBufferId txBufferId)
Returns the status of whether transmission occured on the selected Tx buffer.
Definition: IfxCan.h:2049
IfxCan_Node_getTxBufferElementAddress
IFX_EXTERN Ifx_CAN_TXMSG * IfxCan_Node_getTxBufferElementAddress(Ifx_CAN_N *node, uint32 ramBaseAddress, uint16 txBuffersStartAddress, IfxCan_TxBufferId txBufferNumber)
Returns the address of selected Tx buffer element.
Definition: IfxCan.c:307
IfxCan_RxFifoMode
IfxCan_RxFifoMode
Rx FIFO 0/1 operating mode Description in Ifx_CAN.N[x].RXFyC.FyOM, (x= 0 to 3; y = 0...
Definition: IfxCan.h:383
IfxCan_Status_notSentBusy
Definition: IfxCan.h:417
IfxCan_RxBufferId_16
Rx buffer 16.
Definition: IfxCan.h:330
IfxCan_TxBufferId_19
Tx buffer 19.
Definition: IfxCan.h:456
IfxCan_Interrupt_bitErrorCorrected
Bit Error Corrected Interrupt.
Definition: IfxCan.h:221
IfxCan_Node_setExtendedFilterId1
IFX_INLINE void IfxCan_Node_setExtendedFilterId1(Ifx_CAN_EXTMSG *extendedFilterElement, uint32 id)
Sets the Extended Filter ID 1 for Extended Filter Element.
Definition: IfxCan.h:2130
IfxCan_Node_writeTxBufData
IFX_EXTERN void IfxCan_Node_writeTxBufData(Ifx_CAN_TXMSG *txBufferElement, IfxCan_DataLengthCode dataLengthCode, uint32 *data)
Writes Data into Tx buffer element Node_writeTxBufData.
Definition: IfxCan.c:857
IfxCan_InterruptGroup_boff
Bus Off.
Definition: IfxCan.h:244
IfxCan_InterruptGroup_traq
Transmission Queue Events.
Definition: IfxCan.h:252
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxCan_LastErrorCodeType_noError
No Error occured in the recent CAN message transmission or reception.
Definition: IfxCan.h:282
IfxCan_RxBufferId_27
Rx buffer 27.
Definition: IfxCan.h:341
IfxCan_Rxd_In
RXD pin mapping structure.
Definition: IfxCan_PinMap.h:56
IfxCan_RxBufferId_10
Rx buffer 10.
Definition: IfxCan.h:324
IfxCan_RxBufferId_12
Rx buffer 12.
Definition: IfxCan.h:326
IfxCan_Node_setTxBufferCancellationRequest
IFX_INLINE void IfxCan_Node_setTxBufferCancellationRequest(Ifx_CAN_N *node, IfxCan_TxBufferId txBufferId)
Sets the Cancellation Request for the selected Tx buffer.
Definition: IfxCan.h:2371
IfxCan_ClockSource_noClock
No clock is switched on.
Definition: IfxCan.h:108
IfxCan_LastErrorCodeType_ackError
No ACK recieved from another node for transmitted CAN message.
Definition: IfxCan.h:285
IfxCan_DataFieldSize
IfxCan_DataFieldSize
Data Field Size Definition in Ifx_CAN.N[x]TX.ESC.B.TBDS, Ifx_CAN.N[x].RX.ESC.B.RBDS, Ifx_CAN.N[x].RX.ESC.B.FyDS (x= 0,1,2,3; y = 0, 1)
Definition: IfxCan.h:117
IfxCan_getSrcPointer
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxCan_getSrcPointer(Ifx_CAN *can, IfxCan_InterruptLine interruptLine)
Returns the address of interrupt node source register.
Definition: IfxCan.c:969
IfxCan_Node_getRxFifo1GetIndex
IFX_INLINE IfxCan_RxBufferId IfxCan_Node_getRxFifo1GetIndex(Ifx_CAN_N *node)
Returns Rx FIFO 1 get index.
Definition: IfxCan.h:1967
IfxCan_CanNodeErrorWarningLimitStatus_notReached
Error counters are below the warning limit.
Definition: IfxCan.h:88
IfxCan_Status_notInitialised
Definition: IfxCan.h:415
IfxCan_ClockSource_synchronous
The Synchronous clock source is switched on.
Definition: IfxCan.h:110
IfxCan_LastErrorCodeType_bit1Error
Transmitted recessive and read back dominant on the CAN bus.
Definition: IfxCan.h:286
IfxCan_RxBufferId_59
Rx buffer 59.
Definition: IfxCan.h:373
IfxCan_Node_getRxFifo1DataFieldSize
IFX_EXTERN uint8 IfxCan_Node_getRxFifo1DataFieldSize(Ifx_CAN_N *node)
Returns Rx FIFO 1 Data Field Size in bytes.
Definition: IfxCan.c:245
IfxCan_InterruptGroup_rxf0f
Receive FIFO0 full interrupt.
Definition: IfxCan.h:248
IfxCan_Node_setTxEventFifoControl
IFX_INLINE void IfxCan_Node_setTxEventFifoControl(Ifx_CAN_N *node, Ifx_CAN_TXMSG *txBufferElement, boolean enable)
Sets the Tx Event Fifo Control (EFC) for transmit frame. This function is deprecated. Use new function IfxCan_Node_setTxEventFifoCtrl.
Definition: IfxCan.h:2396
IfxCan_Node_readData
IFX_EXTERN void IfxCan_Node_readData(Ifx_CAN_RXMSG *rxBufferElement, IfxCan_DataLengthCode dataLengthCode, uint32 *data)
Reads data from Rx buffer element.
Definition: IfxCan.c:370
IfxCan_TxBufferId_3
Tx buffer 3.
Definition: IfxCan.h:440
IfxCan_FilterType_none
Reserved.
Definition: IfxCan.h:172
IfxCan_Node_getActivityStatus
IFX_INLINE IfxCan_CanNodeCommunicationState IfxCan_Node_getActivityStatus(Ifx_CAN_N *node)
Get the Activity status of the CAN node.
Definition: IfxCan.h:2489
IfxCan_RxBufferId_63
Rx buffer 63.
Definition: IfxCan.h:377
IfxCan_InterruptLine_2
Interrupt Line 2.
Definition: IfxCan.h:262
IfxCan_InterruptGroup_reti
Receive timeouts.
Definition: IfxCan.h:251
IfxCan_DataLengthCode_16
16 data bytes
Definition: IfxCan.h:143
IfxCan_SuspendMode_hard
Hard Suspend.
Definition: IfxCan.h:429
IfxCan_TxBufferId
IfxCan_TxBufferId
Tx Buffer number.
Definition: IfxCan.h:435
IfxCan_RxBufferId_26
Rx buffer 26.
Definition: IfxCan.h:340
IfxCan_Node_isTxEventFifoElementLost
IFX_INLINE boolean IfxCan_Node_isTxEventFifoElementLost(Ifx_CAN_N *node)
Returns the status of Tx Event Fifo Element lost.
Definition: IfxCan.h:2056
IfxCan_MessageRAM::rxFifo0StartAddress
uint16 rxFifo0StartAddress
Start address of Rx FIFO 0 in Message RAM (32-bit word address)
Definition: IfxCan.h:553
IfxCan_RxBufferId_29
Rx buffer 29.
Definition: IfxCan.h:343
IfxCan_Node_setRxFifo1OperatingMode
IFX_INLINE void IfxCan_Node_setRxFifo1OperatingMode(Ifx_CAN_N *node, IfxCan_RxFifoMode mode)
Sets Rx Buffer Fifo 1 operating mode.
Definition: IfxCan.h:2270
IfxCan_TxMode_dedicatedBuffers
Tx dedicated buffers operation.
Definition: IfxCan.h:477
IfxCan_Interrupt_txEventFifoWatermarkReached
Tx Event FIFO Watermark Reached Interrupt.
Definition: IfxCan.h:214
IfxCan_TxBufferId_21
Tx buffer 21.
Definition: IfxCan.h:458
IfxCan_RxMode_fifo1
Rx FIFO 1 operation.
Definition: IfxCan.h:395
IfxCan_CanNodeErrorWarningLimitStatus
IfxCan_CanNodeErrorWarningLimitStatus
Status of warning limit for error counters in CAN node.
Definition: IfxCan.h:86
IfxCan_TxBufferId_17
Tx buffer 17.
Definition: IfxCan.h:454
IfxCan_Node_setExtendedFilterId2
IFX_INLINE void IfxCan_Node_setExtendedFilterId2(Ifx_CAN_EXTMSG *extendedFilterElement, uint32 id)
Sets the Extended Filter ID 2 for Extended Filter Element.
Definition: IfxCan.h:2136
IfxCan_Node_setMessageMarker
IFX_INLINE void IfxCan_Node_setMessageMarker(Ifx_CAN_TXMSG *txBufferElement, IfxCan_TxBufferId bufferId)
Sets the Message Marker (MM) for transmit frame.
Definition: IfxCan.h:2172
IfxCan_ClockSelect
IfxCan_ClockSelect
Clock selection option Description in Ifx_CAN.MCR.CLKSELx, (x = 0,1,2)
Definition: IfxCan.h:95
IfxCan_Interrupt_txFifoEmpty
Tx FIFO Empty Interrupt.
Definition: IfxCan.h:212
IfxCan_SleepMode_enable
enables sleep mode
Definition: IfxCan.h:406
IfxCan_Interrupt_rxFifo1NewMessage
Rx FIFO 1 New Message Interrupt.
Definition: IfxCan.h:205
IfxCan_Node_isErrorStatusIndicatorEnabled
IFX_INLINE boolean IfxCan_Node_isErrorStatusIndicatorEnabled(Ifx_CAN_N *node)
Returns the error status of the recent recieved CAN FD message. TRUE : Error status indicator is enab...
Definition: IfxCan.h:2507
IfxCan_Message::txEventFifoControl
boolean txEventFifoControl
EFC, Tx Event FIFO Control (enable / disable)
Definition: IfxCan.h:540
IfxCan_TxBufferId_28
Tx buffer 28.
Definition: IfxCan.h:465
IfxCan_Status_busOff
Definition: IfxCan.h:416
IfxCan_DataLengthCode_32
32 data bytes
Definition: IfxCan.h:146
IfxCan_Node_getTxBufferDataFieldSize
IFX_EXTERN uint8 IfxCan_Node_getTxBufferDataFieldSize(Ifx_CAN_N *node)
Returns Tx Buffer Data Field Size in bytes.
Definition: IfxCan.c:288
IfxCan_Interrupt_rxFifo1Full
Rx FIFO 1 Full Interrupt.
Definition: IfxCan.h:207
IfxCan_Node_setMesssageId
IFX_INLINE void IfxCan_Node_setMesssageId(Ifx_CAN_N *node, Ifx_CAN_TXMSG *txBufferElement, uint32 messageId, IfxCan_MessageIdLength messageIdLength)
Sets the identifier (ID) for transmit frame. This function is deprecated. Use the new function IfxCan...
Definition: IfxCan.h:2187
IfxCan_InterruptGroup_rxf0n
Receive FIFO0 new message Interrupt.
Definition: IfxCan.h:250
IfxCan_Interrupt_transmissionCancellationFinished
Transmission Cancellation Finished Interrupt.
Definition: IfxCan.h:211
IfxCan_setSleepMode
IFX_INLINE void IfxCan_setSleepMode(Ifx_CAN *can, IfxCan_SleepMode mode)
Sets the sensitivity of the module to sleep signal.
Definition: IfxCan.h:2445
IfxCan_DataFieldSize_12
12 byte data field
Definition: IfxCan.h:120
IfxCan_Node_getBusOffStatus
IFX_INLINE IfxCan_CanNodeBusOffErrorStatus IfxCan_Node_getBusOffStatus(Ifx_CAN_N *node)
Get the Bus Off status of the CAN node.
Definition: IfxCan.h:2483
IfxCan_RxBufferId_5
Rx buffer 5.
Definition: IfxCan.h:319
IfxCan_Node_clearRxBufferNewDataFlag
IFX_EXTERN void IfxCan_Node_clearRxBufferNewDataFlag(Ifx_CAN_N *node, IfxCan_RxBufferId rxBufferId)
Clears the New Data flag of the selected Rx buffer.
Definition: IfxCan.c:54
IfxCan_Interrupt_errorPassive
Error Passive Interrupt.
Definition: IfxCan.h:224
IfxCan_DataLengthCode_8
8 data bytes
Definition: IfxCan.h:141
IfxCan_Txd_Out
TXD pin mapping structure.
Definition: IfxCan_PinMap.h:65
IfxCan_DataLengthCode_4
4 data bytes
Definition: IfxCan.h:137
IfxCan_FilterElementConfiguration_setPriorityAndStoreInFifo1
Set priority and store in FIFO 1 if filter matches.
Definition: IfxCan.h:161
IfxCan_Node_getESIFromTxEventFifo
IFX_INLINE boolean IfxCan_Node_getESIFromTxEventFifo(Ifx_CAN_TXEVENT *txEventFifoElement)
Returns the Error State Indicator (ESI) from the Tx Event Fifo element.
Definition: IfxCan.h:1897
IfxCan_FilterElementConfiguration_setPriorityAndStoreInFifo0
Set priority and store in FIFO 0 if filter matches.
Definition: IfxCan.h:160
IfxCan_TxBufferId_8
Tx buffer 8.
Definition: IfxCan.h:445
IfxCan_Message::storeInTxFifoQueue
boolean storeInTxFifoQueue
Write message in Tx FIFO/QUEUE.
Definition: IfxCan.h:541
IfxCan_Node_getTXTSFromTxEventFifo
IFX_INLINE uint16 IfxCan_Node_getTXTSFromTxEventFifo(Ifx_CAN_TXEVENT *txEventFifoElement)
Returns the Tx Time Stamp (TXTS) from the Tx Event Fifo element.
Definition: IfxCan.h:1973
IfxCan_TxBufferId_6
Tx buffer 6.
Definition: IfxCan.h:443
IfxCan_Node_setRxFifo1AcknowledgeIndex
IFX_INLINE void IfxCan_Node_setRxFifo1AcknowledgeIndex(Ifx_CAN_N *node, IfxCan_RxBufferId RxBufferNumber)
Sets Rx FIFO 1 Acknowledge Index.
Definition: IfxCan.h:2258
IfxCan_ClockSelect_3
clock selection 3
Definition: IfxCan.h:100
IfxCan_TxBufferId_23
Tx buffer 23.
Definition: IfxCan.h:460
IfxCan_getIndex
IFX_EXTERN IfxCan_Index IfxCan_getIndex(Ifx_CAN *can)
API to get the resource index of the CAN specified.
Definition: IfxCan.c:939
IfxCan_Node_setDataLength
IFX_INLINE void IfxCan_Node_setDataLength(Ifx_CAN_TXMSG *txBufferElement, IfxCan_DataLengthCode dataLengthCode)
Sets the Data Length Code (DLC) for transmit frame.
Definition: IfxCan.h:2092
IfxCan_Node_setExtendedFilterType
IFX_INLINE void IfxCan_Node_setExtendedFilterType(Ifx_CAN_EXTMSG *extendedFilterElement, IfxCan_FilterType filterType)
Sets the Extended Filter Type for Extended Filter Element.
Definition: IfxCan.h:2160
IfxCan_InterruptLine_9
Interrupt Line 9.
Definition: IfxCan.h:269
IfxCan_Node_getTxEventFifoFillLevel
IFX_INLINE uint8 IfxCan_Node_getTxEventFifoFillLevel(Ifx_CAN_N *node)
Returns the Tx Event Fifo Fill Level.
Definition: IfxCan.h:1985
IfxCan_InterruptLine_12
Interrupt Line 12.
Definition: IfxCan.h:272
IfxCan_Node_initRxPin
IFX_EXTERN boolean IfxCan_Node_initRxPin(Ifx_CAN_N *node, IfxCan_Rxd_In *rxd, IfxPort_InputMode mode, IfxPort_PadDriver padDriver)
Select and initialise the CAN node receive pin.
Definition: IfxCan.c:331
IfxCan_FilterType
IfxCan_FilterType
Filter Type.
Definition: IfxCan.h:167
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:151
IfxCan_RxBufferId_58
Rx buffer 58.
Definition: IfxCan.h:372
IfxCan_DataFieldSize_20
20 byte data field
Definition: IfxCan.h:122
IfxCan_Node_getFrameMode
IFX_EXTERN IfxCan_FrameMode IfxCan_Node_getFrameMode(Ifx_CAN_RXMSG *rxBufferElement)
Returns CAN frame mode of operation for a received frame.
Definition: IfxCan.c:125
IfxCan_Node_setStandardFilterConfiguration
IFX_INLINE void IfxCan_Node_setStandardFilterConfiguration(Ifx_CAN_STDMSG *standardFilterElement, IfxCan_FilterElementConfiguration filterElementConfiguration)
Sets the Standard Filter Element Configuration.
Definition: IfxCan.h:2294
IfxCan_Message
Structure for CAN Message configuration (transmit/receive)
Definition: IfxCan.h:531
IfxCan_Node_setExtendedFilterListStartAddress
IFX_INLINE void IfxCan_Node_setExtendedFilterListStartAddress(Ifx_CAN_N *node, uint16 address)
Sets the start address of Extended Message ID filter list (32-bit word address)
Definition: IfxCan.h:2148
IfxCan_RxBufferId_13
Rx buffer 13.
Definition: IfxCan.h:327
IfxCan_Node_setRxFifo0OperatingMode
IFX_INLINE void IfxCan_Node_setRxFifo0OperatingMode(Ifx_CAN_N *node, IfxCan_RxFifoMode mode)
Sets Rx Buffer Fifo 0 operating mode.
Definition: IfxCan.h:2234
IfxCan_NonMatchingFrame_reject
Reject the non-matching messages.
Definition: IfxCan.h:307
IfxCan_FilterElementConfiguration_disable
Disable filter element.
Definition: IfxCan.h:155
IfxCan_Node_isTxEventFifoFull
IFX_INLINE boolean IfxCan_Node_isTxEventFifoFull(Ifx_CAN_N *node)
Returns the status of Tx Event Fifo Full.
Definition: IfxCan.h:2062
IfxCan_Node_getRxBufferDataFieldSize
IFX_EXTERN uint8 IfxCan_Node_getRxBufferDataFieldSize(Ifx_CAN_N *node)
Returns Rx Buffer Data Field Size in bytes.
Definition: IfxCan.c:181
IfxCan_Interrupt_bitErrorUncorrected
Bit Error Uncorrected Interrupt.
Definition: IfxCan.h:222
IfxCan_PinMap.h
CAN I/O map.
boolean
unsigned char boolean
Definition: Platform_Types.h:104
IfxCan_ClockSelect_2
clock selection 2
Definition: IfxCan.h:99
IfxCan_CanNodeBusOffErrorStatus_NoErr
CAN node not in Bus Off state.
Definition: IfxCan.h:488
IfxCan_Message::readFromRxFifo1
boolean readFromRxFifo1
Read message from Rx FIFO 1.
Definition: IfxCan.h:543
IfxCan_NonMatchingFrame
IfxCan_NonMatchingFrame
Indicate the action to be taken with the messages which do not match with any element of the filter...
Definition: IfxCan.h:303
IfxCan_LastErrorCodeType_stuffError
More than 5 consecutive equal bits recieved in CAN message.
Definition: IfxCan.h:283
IfxCan_RxBufferId_28
Rx buffer 28.
Definition: IfxCan.h:342
IfxCan_LastErrorCodeType
IfxCan_LastErrorCodeType
Type of last error to occur on the CAN node.
Definition: IfxCan.h:280
IfxCan_Node_clearInterruptFlag
IFX_INLINE void IfxCan_Node_clearInterruptFlag(Ifx_CAN_N *node, IfxCan_Interrupt interrupt)
Clears the selected interrupt Flag.
Definition: IfxCan.h:1765
IfxCan_Node_getWarningStatus
IFX_INLINE IfxCan_CanNodeErrorWarningLimitStatus IfxCan_Node_getWarningStatus(Ifx_CAN_N *node)
Get the warning status of the CAN node.
Definition: IfxCan.h:2477
IfxCan_TxMode_sharedQueue
Tx shared dedicated buffers and Tx Queue operation.
Definition: IfxCan.h:479
IfxCan_Node_setRxFifo1WatermarkLevel
IFX_INLINE void IfxCan_Node_setRxFifo1WatermarkLevel(Ifx_CAN_N *node, uint8 level)
Sets Rx FIFO 1 Watermark Level.
Definition: IfxCan.h:2288
IfxCan_Node_setStandardFilterId2
IFX_INLINE void IfxCan_Node_setStandardFilterId2(Ifx_CAN_STDMSG *standardFilterElement, uint32 id)
Sets the Standard Filter ID 2 for Standard Filter Element.
Definition: IfxCan.h:2306
IfxCan_isModuleSuspended
IFX_INLINE boolean IfxCan_isModuleSuspended(Ifx_CAN *can)
Returns the module&#39;s suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspende...
Definition: IfxCan.h:2433
IfxCan_Node_setRxFifo0DataFieldSize
IFX_INLINE void IfxCan_Node_setRxFifo0DataFieldSize(Ifx_CAN_N *node, IfxCan_DataFieldSize size)
Sets Rx Buffer Fifo 0 Data Field Size.
Definition: IfxCan.h:2228
IfxCan_MessageRAM::standardFilterListStartAddress
uint16 standardFilterListStartAddress
Start address of Standard Message ID filter list (32-bit word address)
Definition: IfxCan.h:551
IfxCan_CanNodeCommunicationState_receive
Node is operating as receiver.
Definition: IfxCan.h:498
IfxCan_Node_isNodeSynchronized
IFX_INLINE boolean IfxCan_Node_isNodeSynchronized(Ifx_CAN_N *node)
Returns the status of whether the CAN Node is synchronised or not.
Definition: IfxCan.h:2027
IfxCan_DataFieldSize_24
24 byte data field
Definition: IfxCan.h:123
IfxCan_MessageRAM::rxBuffersStartAddress
uint16 rxBuffersStartAddress
Start address of Rx Buffers section in the Message RAM (32-bit word address).
Definition: IfxCan.h:555
IfxCan_MessageRAM
Structure for Message RAM configuration.
Definition: IfxCan.h:548
IfxCan_FrameMode_fdLongAndFast
CAN FD long and fast frames (transmit and receive)
Definition: IfxCan.h:182
IfxCan_RxMode
IfxCan_RxMode
Rx Buffers or FIFO 0 or combination Mode of reception.
Definition: IfxCan.h:391
IfxCan_RxBufferId_19
Rx buffer 19.
Definition: IfxCan.h:333
IfxCan_InterruptLine_1
Interrupt Line 1.
Definition: IfxCan.h:261
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxCan_CanNodeCommunicationState_synchronize
CAN node is synchronizing on CAN communication.
Definition: IfxCan.h:496
IfxCan_TxBufferId_2
Tx buffer 2.
Definition: IfxCan.h:439
IfxCan_TxBufferId_5
Tx buffer 5.
Definition: IfxCan.h:442
IfxCan_RxBufferId_52
Rx buffer 52.
Definition: IfxCan.h:366
IfxCan_Node_getInterruptFlagStatus
IFX_INLINE boolean IfxCan_Node_getInterruptFlagStatus(Ifx_CAN_N *node, IfxCan_Interrupt interrupt)
Returns the status of selected interrupt flag.
Definition: IfxCan.h:1909
IfxCan_TxBufferId_1
Tx buffer 1.
Definition: IfxCan.h:438
IfxCan_resetModule
IFX_EXTERN void IfxCan_resetModule(Ifx_CAN *can)
resets CAN kernel
Definition: IfxCan.c:981
IfxCan_Node_getTxEventFifoGetIndex
IFX_INLINE uint8 IfxCan_Node_getTxEventFifoGetIndex(Ifx_CAN_N *node)
Returns the Tx Event Fifo Get Index.
Definition: IfxCan.h:1991
IfxCan_TxBufferId_10
Tx buffer 10.
Definition: IfxCan.h:447
IfxCan_Node_isCanFDMsgReceived
IFX_INLINE boolean IfxCan_Node_isCanFDMsgReceived(Ifx_CAN_N *node)
CAN frame format of the last received message. TRUE: CAN FD frame received FALSE: CAN FD frame not re...
Definition: IfxCan.h:2519
IfxCan_getAddress
IFX_EXTERN Ifx_CAN * IfxCan_getAddress(IfxCan_Index can)
Definition: IfxCan.c:922
IfxCan_InterruptGroup_safe
Safety counter overflow.
Definition: IfxCan.h:243
IfxCan_GroupInterruptConfig::priority
Ifx_Priority priority
Priority of the interrupt.
Definition: IfxCan.h:525
IfxCan_InterruptLine_15
Interrupt Line 15.
Definition: IfxCan.h:275
IfxCan_RxBufferId_6
Rx buffer 6.
Definition: IfxCan.h:320
IfxCan_Node_setRxBuffersStartAddress
IFX_INLINE void IfxCan_Node_setRxBuffersStartAddress(Ifx_CAN_N *node, uint16 address)
Sets the start address of Rx Buffers section in the Message RAM (32-bit word address) ...
Definition: IfxCan.h:2216
IfxCan_Status_newDataButOneLost
Definition: IfxCan.h:421
IfxCan_RxBufferId_45
Rx buffer 45.
Definition: IfxCan.h:359
IfxCan_RxBufferId_49
Rx buffer 49.
Definition: IfxCan.h:363
IfxCan_Node_isProtocolExceptionEventOccured
IFX_INLINE boolean IfxCan_Node_isProtocolExceptionEventOccured(Ifx_CAN_N *node)
Protocol Exception Event status TRUE: Protocol Exception event occured. FALSE: Protocol Exception eve...
Definition: IfxCan.h:2501
IfxCan_FilterElementConfiguration_setPriority
Set priority if filter matches.
Definition: IfxCan.h:159
IfxCan_DataLengthCode_1
1 data bytes
Definition: IfxCan.h:134
IfxCan_FrameType_transmitAndReceive
for both transmit and receive frames
Definition: IfxCan.h:191
IfxCan_InterruptGroup_wati
Watermark interrupts are mapped here.
Definition: IfxCan.h:240
IfxCan_InterruptLine_6
Interrupt Line 6.
Definition: IfxCan.h:266
IfxCan_Interrupt_timestampWraparound
Timestamp Wraparound Interrupt.
Definition: IfxCan.h:217
IfxCan_Filter::id2
uint32 id2
*FID2 Second ID of (standard / extended ID) filter element
Definition: IfxCan.h:516
IfxCan_FrameType_remoteRequest
Remote request frame is generated.
Definition: IfxCan.h:192
IfxCan_Filter::rxBufferOffset
IfxCan_RxBufferId rxBufferOffset
Rx Buffer number to set the offset to the Rx Buffer Start Address.
Definition: IfxCan.h:517
IfxCan_Node_getFrameModeFromTxEventFifo
IFX_EXTERN IfxCan_FrameMode IfxCan_Node_getFrameModeFromTxEventFifo(Ifx_CAN_TXEVENT *txEventFifoElement)
Returns CAN frame mode of operation for a Tx Event Fifo Element.
Definition: IfxCan.c:153
IfxCan_FilterType_dualId
Dual ID filter for SF1ID or SF2ID.
Definition: IfxCan.h:170
IfxCan_MessageIdLength_both
Both Standard and Extended message IDs.
Definition: IfxCan.h:298
IfxCan_Interrupt_txEventFifoNewEntry
Tx Event FIFO New Entry Interrupt.
Definition: IfxCan.h:213
IfxCan_GroupInterruptConfig::interruptLine
IfxCan_InterruptLine interruptLine
Intterupt line to which this interruipt has to be connetced to.
Definition: IfxCan.h:524
IfxCan_RxFifoMode_blocking
Blocking mode.
Definition: IfxCan.h:385
IfxCan_TxBufferId_31
Tx buffer 31.
Definition: IfxCan.h:468
IfxCan_InterruptGroup_alrt
Alerts.
Definition: IfxCan.h:241
IfxCan_RxBufferId_37
Rx buffer 37.
Definition: IfxCan.h:351
IfxScuCcu.h
SCU basic functionality.
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:81
IfxCan_Node_setRxFifo0AcknowledgeIndex
IFX_INLINE void IfxCan_Node_setRxFifo0AcknowledgeIndex(Ifx_CAN_N *node, IfxCan_RxBufferId RxBufferNumber)
Sets Rx FIFO 0 Acknowledge Index.
Definition: IfxCan.h:2222
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxCan_RxMode_fifo0
Rx FIFO 0 operation.
Definition: IfxCan.h:394
enable
void enable
Definition: IfxCpu_IntrinsicsDcc.h:477
IfxCan_FrameType_remoteAnswer
Answer frame is generated on reception of the corresponding remote request.
Definition: IfxCan.h:193
IfxCan_FilterElementConfiguration_storeInRxFifo1
Store in Rx FIFO 1 if filter matches.
Definition: IfxCan.h:157
IfxCan_InterruptLine
IfxCan_InterruptLine
Interrupt line number INT_Ox (x= 0 - 15) .
Definition: IfxCan.h:258
IfxCan_Filter::type
IfxCan_FilterType type
*FT, Filter Type of (standard / extended ID) filter element
Definition: IfxCan.h:514
IfxCan_InterruptLine_10
Interrupt Line 10.
Definition: IfxCan.h:270
IfxCan_TxBufferId_20
Tx buffer 20.
Definition: IfxCan.h:457
IfxCan_TxBufferId_9
Tx buffer 9.
Definition: IfxCan.h:446
IfxCan_MessageRAM::rxFifo1StartAddress
uint16 rxFifo1StartAddress
Start address of Rx FIFO 1 in Message RAM (32-bit word address)
Definition: IfxCan.h:554
IfxCan_Node_getTxEventFifoStartAddress
IFX_INLINE uint16 IfxCan_Node_getTxEventFifoStartAddress(Ifx_CAN_N *node)
Returns Tx Event Fifo Start Address.
Definition: IfxCan.h:2009
IfxCan_LastErrorCodeType_crcError
CRC Error.
Definition: IfxCan.h:288
IfxCan_Node_setRxFifo1StartAddress
IFX_INLINE void IfxCan_Node_setRxFifo1StartAddress(Ifx_CAN_N *node, uint16 address)
Sets the start address of Rx FIFO 1 section in the Message RAM (32-bit word address) ...
Definition: IfxCan.h:2282
IfxCan_CanNodeCommunicationState
IfxCan_CanNodeCommunicationState
CAN node communication state.
Definition: IfxCan.h:494
IfxCan_FrameType_transmit
Data frame is generated.
Definition: IfxCan.h:190
IfxCan_ClockSource_asynchronous
The Asynchronous clock source is switched on.
Definition: IfxCan.h:109
IfxCan_ClockSource_both
Both clock sources are switched on.
Definition: IfxCan.h:111
IfxCan_Node_getMesssageId
IFX_INLINE uint32 IfxCan_Node_getMesssageId(Ifx_CAN_RXMSG *rxBufferElement)
Returns the identifier (ID) from the received frame.
Definition: IfxCan.h:1923
IfxCan_Node_enableInterrupt
IFX_INLINE void IfxCan_Node_enableInterrupt(Ifx_CAN_N *node, IfxCan_Interrupt interrupt)
Enables the selected interrupt.
Definition: IfxCan.h:1852
IfxCan_Node_getTxEventFifoElementAddress
IFX_EXTERN Ifx_CAN_TXEVENT * IfxCan_Node_getTxEventFifoElementAddress(uint32 ramBaseAddress, uint16 txEventFifoStartAddress, uint8 txEventFifoNumber)
Returns the address of selected Tx Event Fifo element.
Definition: IfxCan.c:320
IfxCan_Node_setStandardFilterRxBufferOffset
IFX_INLINE void IfxCan_Node_setStandardFilterRxBufferOffset(Ifx_CAN_STDMSG *standardFilterElement, IfxCan_RxBufferId rxBufferNumber)
Sets the Offset to the Rx Buffer Start Address RXBC.RBSA for storage of a matching message for standa...
Definition: IfxCan.h:2324
IfxCan_Node_setDedicatedTxBuffersNumber
IFX_INLINE void IfxCan_Node_setDedicatedTxBuffersNumber(Ifx_CAN_N *node, uint8 number)
Sets the number of dedicated Tx Buffers.
Definition: IfxCan.h:2105
IfxCan_RxBufferId_25
Rx buffer 25.
Definition: IfxCan.h:339
IfxCan_InterruptGroup_rxf1f
Receive FIFO1 full interrupt.
Definition: IfxCan.h:247
IfxCan_RxFifoMode_overwrite
Overwrite mode.
Definition: IfxCan.h:386
IfxCan_NonMatchingFrame_acceptToRxFifo0
Accept the non matching messages into Rx FIFO 0.
Definition: IfxCan.h:305
IfxCan_InterruptLine_8
Interrupt Line 8.
Definition: IfxCan.h:268
IfxCan_RxBufferId_15
Rx buffer 15.
Definition: IfxCan.h:329
IfxCan_Status
IfxCan_Status
CAN API status definition.
Definition: IfxCan.h:412
IfxCan_DataFieldSize_16
16 byte data field
Definition: IfxCan.h:121
IfxCan_InterruptLine_14
Interrupt Line 14.
Definition: IfxCan.h:274
IfxCan_RxBufferId_3
Rx buffer 3.
Definition: IfxCan.h:317
IfxCan_Node_getMesssageIdFromTxEventFifo
IFX_INLINE uint32 IfxCan_Node_getMesssageIdFromTxEventFifo(Ifx_CAN_TXEVENT *txEventFifoElement)
Returns the identifier (ID) from the Tx Event Fifo element.
Definition: IfxCan.h:1933
IfxCan_RxBufferId_61
Rx buffer 61.
Definition: IfxCan.h:375
IfxCan_DataLengthCode_24
24 data bytes
Definition: IfxCan.h:145
IfxCan_FrameType_receive
Data frame is received.
Definition: IfxCan.h:189
IfxCan_RxBufferId_31
Rx buffer 31.
Definition: IfxCan.h:345
IfxCan_DataLengthCode
IfxCan_DataLengthCode
Data Length code of the Message.
Definition: IfxCan.h:131
IfxCan_Index
IfxCan_Index
List of the available can resources.
Definition: IfxCan_cfg.h:83
IfxCan_RxBufferId_44
Rx buffer 44.
Definition: IfxCan.h:358
IfxCan_Node_setFrameModeReq
IFX_EXTERN void IfxCan_Node_setFrameModeReq(Ifx_CAN_TXMSG *txBufferElement, IfxCan_FrameMode frameMode)
Sets CAN frame mode request for transmission.
Definition: IfxCan.c:730
IfxCan_Node_setRxBufferDataFieldSize
IFX_INLINE void IfxCan_Node_setRxBufferDataFieldSize(Ifx_CAN_N *node, IfxCan_DataFieldSize size)
Sets Rx Buffer Data Field Size.
Definition: IfxCan.h:2210
IfxCan_Node_getRxFifo0ElementAddress
IFX_EXTERN Ifx_CAN_RXMSG * IfxCan_Node_getRxFifo0ElementAddress(Ifx_CAN_N *node, uint32 ramBaseAddress, uint16 rxFifo0StartAddress, IfxCan_RxBufferId rxBufferNumber)
Returns the address of selected Rx FIFO 0 element.
Definition: IfxCan.c:232
IfxCan_RxBufferId_35
Rx buffer 35.
Definition: IfxCan.h:349
IfxCan_InterruptGroup
IfxCan_InterruptGroup
Type of interrupt Definition in Ifx_CAN.GRINT[x] (x= 0 , 1)
Definition: IfxCan.h:236
IfxCan_Node_enableTxBufferTransmissionInterrupt
IFX_INLINE void IfxCan_Node_enableTxBufferTransmissionInterrupt(Ifx_CAN_N *node, IfxCan_TxBufferId txBufferId)
Enables the Transmission Interrupt of the selected Tx buffer.
Definition: IfxCan.h:1872
IfxCan_Node_setErrorStateIndicator
IFX_INLINE void IfxCan_Node_setErrorStateIndicator(Ifx_CAN_N *node, Ifx_CAN_TXMSG *txBufferElement, boolean enable)
Sets the Error State Indicator (ESI) for transmit frame. This function is decprecated. Use new function IfxCan_Node_setErrStateIndicator.
Definition: IfxCan.h:2117
IfxCan_RxBufferId_46
Rx buffer 46.
Definition: IfxCan.h:360
IfxCan_SuspendMode_none
No suspend.
Definition: IfxCan.h:428
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxCan_DataLengthCode_48
48 data bytes
Definition: IfxCan.h:147
IfxCan_Node_setRxFifo0WatermarkLevel
IFX_INLINE void IfxCan_Node_setRxFifo0WatermarkLevel(Ifx_CAN_N *node, uint8 level)
Sets Rx FIFO 0 Watermark Level.
Definition: IfxCan.h:2252
IfxCan_Node_setTransceiverDelayCompensationOffset
IFX_INLINE void IfxCan_Node_setTransceiverDelayCompensationOffset(Ifx_CAN_N *node, uint8 delay)
Sets Transceiver Delay Compensation offset.
Definition: IfxCan.h:2336
IfxCan_Interrupt_busOffStatus
Bus_Off Status Interrupt.
Definition: IfxCan.h:226
IfxCan_Node_isTxFifoQueueFull
IFX_INLINE boolean IfxCan_Node_isTxFifoQueueFull(Ifx_CAN_N *node)
Returns the status of Tx Fifo/Queue is full or not.
Definition: IfxCan.h:2068
IfxCan_TxBufferId_26
Tx buffer 26.
Definition: IfxCan.h:463
IfxCan_Node_acceptRemoteFramesWithStandardId
IFX_INLINE void IfxCan_Node_acceptRemoteFramesWithStandardId(Ifx_CAN_N *node)
Disables the selected interrupt.
Definition: IfxCan.h:1753
IfxCan_RxBufferId_7
Rx buffer 7.
Definition: IfxCan.h:321
IfxCan_Node_configureStandardFilterForNonMatchingFrames
IFX_INLINE void IfxCan_Node_configureStandardFilterForNonMatchingFrames(Ifx_CAN_N *node, IfxCan_NonMatchingFrame filter)
Configure the filter for non matching frames with standard id.
Definition: IfxCan.h:1778
IfxCan_RxBufferId_50
Rx buffer 50.
Definition: IfxCan.h:364
IfxCan_getModuleFrequency
IFX_EXTERN float32 IfxCan_getModuleFrequency(void)
Returns the operatinf frequency of the CAN module.
Definition: IfxCan.c:959
IfxCan_RxBufferId_33
Rx buffer 33.
Definition: IfxCan.h:347
IfxCan_DataLengthCode_0
0 data bytes
Definition: IfxCan.h:133
IfxCan_RxMode_sharedAll
Rx shared dedicated buffers and Rx FIFO 0 and Rx FIFO 1 operation.
Definition: IfxCan.h:398
IfxCan_Node_setFastBitTimingValues
IFX_EXTERN void IfxCan_Node_setFastBitTimingValues(Ifx_CAN_N *node, uint16 syncJumpWidth, uint8 timeSegment2, uint8 timeSegment1, uint16 prescaler)
Sets the values of CAN fast baudrate for CAN FD frames data phase.
Definition: IfxCan.c:697
IfxCan_CanNodeErrorWarningLimitStatus_reached
Error counter reached the warning limit.
Definition: IfxCan.h:89
IfxCan_ClockSelect_1
clock selection 1
Definition: IfxCan.h:98
IfxCan_RxBufferId_17
Rx buffer 17.
Definition: IfxCan.h:331
IfxCan_DataLengthCode_20
20 data bytes
Definition: IfxCan.h:144
IfxCan_DataLengthCode_5
5 data bytes
Definition: IfxCan.h:138
IfxCan_Node_setBitTimingValues
IFX_EXTERN void IfxCan_Node_setBitTimingValues(Ifx_CAN_N *node, uint16 syncJumpWidth, uint8 timeSegment2, uint8 timeSegment1, uint16 prescaler)
Sets the values of CAN baudrate for standard frames.
Definition: IfxCan.c:535
IfxCan_Filter::number
uint8 number
Filter Number.
Definition: IfxCan.h:512
IfxCan_RxBufferId_2
Rx buffer 2.
Definition: IfxCan.h:316
IfxCan_Node_disableTxBufferTransmissionInterrupt
IFX_INLINE void IfxCan_Node_disableTxBufferTransmissionInterrupt(Ifx_CAN_N *node, IfxCan_TxBufferId txBufferId)
Disables the Transmission Interrupt of the selected Tx buffer.
Definition: IfxCan.h:1812
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
IfxCan_getNodePointer
IFX_INLINE Ifx_CAN_N * IfxCan_getNodePointer(Ifx_CAN *can, IfxCan_NodeId nodeId)
Returns the base adress of the selected Node of CAN module.
Definition: IfxCan.h:2421
IfxCan_Node_setStandardFilterId1
IFX_INLINE void IfxCan_Node_setStandardFilterId1(Ifx_CAN_STDMSG *standardFilterElement, uint32 id)
Sets the Standard Filter ID 1 for Standard Filter Element.
Definition: IfxCan.h:2300
IfxCan_RxBufferId_4
Rx buffer 4.
Definition: IfxCan.h:318
IfxCan_DataLengthCode_7
7 data bytes
Definition: IfxCan.h:140
IfxCan_Filter
tructure for Filter configuration
Definition: IfxCan.h:510
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxCan_DataFieldSize_32
32 byte data field
Definition: IfxCan.h:124
IfxCan_Node_getTxEventFifoWatermarkLevel
IFX_INLINE uint8 IfxCan_Node_getTxEventFifoWatermarkLevel(Ifx_CAN_N *node)
Returns Tx Event Fifo Watermark Level.
Definition: IfxCan.h:2015
IfxCan_Interrupt_rxFifo0WatermarkReached
Rx FIFO 0 Watermark Reached Interrupt.
Definition: IfxCan.h:202
IfxCan_DataFieldSize_8
8 byte data field
Definition: IfxCan.h:119
IfxCan_Interrupt
IfxCan_Interrupt
Type of interrupt Definition in Ifx_CAN.N[x].IE, Ifx_CAN.N[x].IR, Ifx_CAN.N[x].ILS, (x= 0 to 3)
Definition: IfxCan.h:199
IfxCan_InterruptLine_5
Interrupt Line 5.
Definition: IfxCan.h:265
IfxCan_RxBufferId_22
Rx buffer 22.
Definition: IfxCan.h:336
IfxCan_InterruptGroup_reint
Message stored in dedicated receive buffer interrupt (IR.DRX)
Definition: IfxCan.h:246
IfxCan_Node_setDataLengthCode
IFX_INLINE void IfxCan_Node_setDataLengthCode(Ifx_CAN_N *node, Ifx_CAN_TXMSG *txBufferElement, IfxCan_DataLengthCode dataLengthCode)
Sets the Data Length Code (DLC) for transmit frame. This function is deprecated. Use new function Ifx...
Definition: IfxCan.h:2098
IfxCan_Node_setExtendedFilterConfiguration
IFX_INLINE void IfxCan_Node_setExtendedFilterConfiguration(Ifx_CAN_EXTMSG *extendedFilterElement, IfxCan_FilterElementConfiguration filterElementConfiguration)
Sets the Extended Filter Element Configuration.
Definition: IfxCan.h:2124
IfxCan_Node_setTxEventFifoSize
IFX_INLINE void IfxCan_Node_setTxEventFifoSize(Ifx_CAN_N *node, uint8 size)
Sets Tx Event Fifo Size.
Definition: IfxCan.h:2403
IfxCan_TxBufferId_11
Tx buffer 11.
Definition: IfxCan.h:448
IfxCan_TxBufferId_22
Tx buffer 22.
Definition: IfxCan.h:459
IfxCan_InterruptGroup_rxf1n
Receive FIFO1 new message Interrupt.
Definition: IfxCan.h:249
IfxCan_Message::frameMode
IfxCan_FrameMode frameMode
CAN frame mode.
Definition: IfxCan.h:539
IfxCan_Interrupt_txEventFifoEventLost
Tx Event FIFO Event Lost Interrupt.
Definition: IfxCan.h:216
IfxCan_RxBufferId_0
Rx buffer 0.
Definition: IfxCan.h:314
IfxCan_Node_getDataPhaseLastErrorCode
IFX_INLINE IfxCan_LastErrorCodeType IfxCan_Node_getDataPhaseLastErrorCode(Ifx_CAN_N *node)
Get the Error status in data phase of the CAN node in the recent CANFD operation with bit rate switch...
Definition: IfxCan.h:2495
IfxCan_RxBufferId_11
Rx buffer 11.
Definition: IfxCan.h:325
IfxCan_setClockSource
IFX_EXTERN void IfxCan_setClockSource(Ifx_CAN *can, IfxCan_ClockSelect clockSelect, IfxCan_ClockSource clockSource)
sets the clocksource selection
Definition: IfxCan.c:1000
IfxCan_TxMode_queue
Tx Queue operation.
Definition: IfxCan.h:476
IfxCan_Message::bufferNumber
uint8 bufferNumber
(Tx / Rx) Buffer Element number
Definition: IfxCan.h:533
IfxCan_Node_setStandardFilterType
IFX_INLINE void IfxCan_Node_setStandardFilterType(Ifx_CAN_STDMSG *standardFilterElement, IfxCan_FilterType filterType)
Sets the Standard Filter Type for Standard Filter Element.
Definition: IfxCan.h:2330
IfxCan_Filter::id1
uint32 id1
*FID1 First ID of (standard / extended ID) filter element
Definition: IfxCan.h:515
IfxCan_Node_getTxFifoQueuePutIndex
IFX_INLINE IfxCan_TxBufferId IfxCan_Node_getTxFifoQueuePutIndex(Ifx_CAN_N *node)
Returns Tx FIFO/Queue Put Index.
Definition: IfxCan.h:2021
IfxCan_Node_isTxBufferCancellationFinished
IFX_INLINE boolean IfxCan_Node_isTxBufferCancellationFinished(Ifx_CAN_N *node, IfxCan_TxBufferId txBufferId)
Returns the status of whether cancellation is finished on the selected Tx buffer. ...
Definition: IfxCan.h:2033
IfxCan_RxBufferId_39
Rx buffer 39.
Definition: IfxCan.h:353
IfxCan_DataFieldSize_48
48 byte data field
Definition: IfxCan.h:125


iLLD_TC38A: IfxCan_Can.c Source File

  • Can
  • Can
IfxCan_Can.c
Go to the documentation of this file.
1 /**
2 * \file IfxCan_Can.c
3 * \brief CAN CAN details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 *
41 */
42
43 /******************************************************************************/
44 /*----------------------------------Includes----------------------------------*/
45 /******************************************************************************/
46
47 #include "IfxCan_Can.h"
48
49 /******************************************************************************/
50 /*-------------------------Function Implementations---------------------------*/
51 /******************************************************************************/
52
53 void IfxCan_Can_initMessage(IfxCan_Message *message)
54 {
55 const IfxCan_Message defaultMessage = {
56 .bufferNumber = 0,
57 .messageId = 0x0,
58 .remoteTransmitRequest = 0,
59 .messageIdLength = IfxCan_MessageIdLength_standard,
60 .errorStateIndicator = 0,
61 .dataLengthCode = IfxCan_DataLengthCode_8,
62 .frameMode = IfxCan_FrameMode_standard,
63 .txEventFifoControl = 0,
64 .storeInTxFifoQueue = FALSE,
65 .readFromRxFifo0 = FALSE,
66 .readFromRxFifo1 = FALSE
67 };
68
69 /* Default Configuration */
70 *message = defaultMessage;
71 }
72
73
74 void IfxCan_Can_initModule(IfxCan_Can *can, IfxCan_Can_Config *config)
75 {
76 can->can = config->can;
77
78 // if module is not enebled
79 if (IfxCan_isModuleEnabled(can->can) != TRUE)
80 {
81 // Enable module, disregard Sleep Mode request
82 IfxCan_enableModule(can->can);
83 }
84 }
85
86
87 void IfxCan_Can_initModuleConfig(IfxCan_Can_Config *config, Ifx_CAN *can)
88 {
89 const IfxCan_Can_Config defaultConfig = {
90 .can = NULL_PTR
91 };
92
93 /* Default Configuration */
94 *config = defaultConfig;
95
96 /* take over module pointer */
97 config->can = can;
98 }
99
100
101 boolean IfxCan_Can_initNode(IfxCan_Can_Node *node, const IfxCan_Can_NodeConfig *config)
102 {
103 Ifx_CAN *canSfr = config->can;
104 node->can = canSfr;
105 boolean status = 0;
106
107 Ifx_CAN_N *nodeSfr = IfxCan_getNodePointer(canSfr, config->nodeId);
108 node->node = nodeSfr;
109
110 node->messageRAM = config->messageRAM;
111
112 /* initialise the clock for the selected node */
113 IfxCan_ClockSelect clockSelect = (IfxCan_ClockSelect)config->nodeId;
114 IfxCan_setClockSource(canSfr, clockSelect, config->clockSource);
115
116 /* enable configuration change CCCR.CCE = 1, CCCR.INIT = 1 */
117 IfxCan_Node_enableConfigurationChange(nodeSfr);
118
119 float32 moduleFreq = IfxCan_getModuleFrequency();
120
121 /* set baudrate */
122 if (config->calculateBitTimingValues)
123 {
124 IfxCan_Node_setBitTiming(nodeSfr, moduleFreq, config->baudRate.baudrate, config->baudRate.samplePoint, config->baudRate.syncJumpWidth);
125 }
126 else
127 {
128 IfxCan_Node_setBitTimingValues(nodeSfr, config->baudRate.syncJumpWidth, config->baudRate.timeSegment2, config->baudRate.timeSegment1, config->baudRate.prescaler);
129 }
130
131 /* for CAN FD frames, set fast baudrate */
132 if (config->frame.mode != IfxCan_FrameMode_standard)
133 {
134 if (config->calculateBitTimingValues)
135 {
136 IfxCan_Node_setFastBitTiming(nodeSfr, moduleFreq, config->fastBaudRate.baudrate, config->fastBaudRate.samplePoint, config->fastBaudRate.syncJumpWidth);
137 }
138 else
139 {
140 IfxCan_Node_setFastBitTimingValues(nodeSfr, config->baudRate.syncJumpWidth, config->baudRate.timeSegment2, config->baudRate.timeSegment1, config->baudRate.prescaler);
141 }
142
143 /* set transceiver delay compensation offset */
144 if (config->fastBaudRate.tranceiverDelayOffset != 0)
145 {
146 IfxCan_Node_setTransceiverDelayCompensationOffset(nodeSfr, config->fastBaudRate.tranceiverDelayOffset);
147 }
148 }
149
150 /* transmit frame configuration */
151
152 if ((config->frame.type == IfxCan_FrameType_transmit) ||
153 (config->frame.type == IfxCan_FrameType_transmitAndReceive) ||
154 (config->frame.type == IfxCan_FrameType_remoteRequest) ||
155 (config->frame.type == IfxCan_FrameType_remoteAnswer))
156 {
157 uint32 id; /* used for enabling transmit interrupts for individual Tx buffers */
158
159 /* set Tx element data field size */
160 IfxCan_Node_setTxBufferDataFieldSize(nodeSfr, config->txConfig.txBufferDataFieldSize);
161
162 /* set Tx buffers start address in the Message RAM */
163 IfxCan_Node_setTxBuffersStartAddress(nodeSfr, config->messageRAM.txBuffersStartAddress);
164
165 if ((config->txConfig.txMode == IfxCan_TxMode_dedicatedBuffers) ||
166 (config->txConfig.txMode == IfxCan_TxMode_sharedFifo) ||
167 (config->txConfig.txMode == IfxCan_TxMode_sharedQueue))
168 {
169 /* dedicated TX buffers operation */
170 /* select number of Tx buffers */
171 IfxCan_Node_setDedicatedTxBuffersNumber(nodeSfr, config->txConfig.dedicatedTxBuffersNumber);
172
173 /* shared operation */
174 if ((config->txConfig.txMode == IfxCan_TxMode_sharedFifo) || (config->txConfig.txMode == IfxCan_TxMode_sharedQueue))
175 {
176 if (config->txConfig.txMode == IfxCan_TxMode_sharedFifo)
177 {
178 /* set Tx FIFO mode */
179 IfxCan_Node_setTransmitFifoQueueMode(nodeSfr, IfxCan_TxMode_fifo);
180 }
181
182 if (config->txConfig.txMode == IfxCan_TxMode_sharedQueue)
183 {
184 /* set Tx Queue mode */
185 IfxCan_Node_setTransmitFifoQueueMode(nodeSfr, IfxCan_TxMode_queue);
186 }
187
188 /* select number of Tx buffers to be used as Tx FIFO/Queue */
189 IfxCan_Node_setTransmitFifoQueueSize(nodeSfr, config->txConfig.txFifoQueueSize);
190 }
191
192 /* enable transmission interrupt on selected buffers */
193 for (id = 0; id < (config->txConfig.dedicatedTxBuffersNumber + config->txConfig.txFifoQueueSize); ++id)
194 {
195 IfxCan_Node_enableTxBufferTransmissionInterrupt(nodeSfr, (IfxCan_TxBufferId)id);
196 }
197 }
198
199 /* TX FIFO/Queue operation */
200 else if ((config->txConfig.txMode == IfxCan_TxMode_fifo) || (config->txConfig.txMode == IfxCan_TxMode_queue))
201 {
202 /* set Tx FIFO/Queue mode */
203 IfxCan_Node_setTransmitFifoQueueMode(nodeSfr, config->txConfig.txMode);
204
205 /* select number of Tx buffers to be used as Tx FIFO/Queue */
206 IfxCan_Node_setTransmitFifoQueueSize(nodeSfr, config->txConfig.txFifoQueueSize);
207
208 /* enable transmission interrupt on selected buffers */
209 for (id = 0; id < config->txConfig.txFifoQueueSize; ++id)
210 {
211 IfxCan_Node_enableTxBufferTransmissionInterrupt(nodeSfr, (IfxCan_TxBufferId)id);
212 }
213 }
214 /* wrong selection */
215 else
216 {
217 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, 0);
218 }
219
220 /* set the Tx event fifo size and start address if selected */
221 if ((config->txConfig.txEventFifoSize > 0) && (config->txConfig.txEventFifoSize <= 32))
222 {
223 IfxCan_Node_setTxEventFifoStartAddress(nodeSfr, config->messageRAM.txEventFifoStartAddress);
224 IfxCan_Node_setTxEventFifoSize(nodeSfr, config->txConfig.txEventFifoSize);
225 }
226 else /* maximum number of configurable Tx Event FIFO elements is 32 */
227 {
228 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->txConfig.txEventFifoSize <= 32);
229 }
230
231 /* enable CAN frame mode of transmission Standard or CAN FD Long or FD Long and Fast frames*/
232 IfxCan_Node_setFrameMode(nodeSfr, config->frame.mode);
233 }
234
235 /* receive frame configuration */
236
237 if ((config->frame.type == IfxCan_FrameType_receive) ||
238 (config->frame.type == IfxCan_FrameType_transmitAndReceive) ||
239 (config->frame.type == IfxCan_FrameType_remoteAnswer))
240 {
241 if ((config->rxConfig.rxMode == IfxCan_RxMode_dedicatedBuffers) ||
242 (config->rxConfig.rxMode == IfxCan_RxMode_sharedFifo0) ||
243 (config->rxConfig.rxMode == IfxCan_RxMode_sharedFifo1) ||
244 (config->rxConfig.rxMode == IfxCan_RxMode_sharedAll))
245 {
246 /* set Rx buffer data length */
247 IfxCan_Node_setRxBufferDataFieldSize(nodeSfr, config->rxConfig.rxBufferDataFieldSize);
248
249 /* set Rx buffers start address in the Message RAM */
250 IfxCan_Node_setRxBuffersStartAddress(nodeSfr, config->messageRAM.rxBuffersStartAddress);
251 }
252
253 if ((config->rxConfig.rxMode == IfxCan_RxMode_fifo0) ||
254 (config->rxConfig.rxMode == IfxCan_RxMode_sharedFifo0) ||
255 (config->rxConfig.rxMode == IfxCan_RxMode_sharedAll))
256 {
257 /* set Rx FIFO 0 data length */
258 IfxCan_Node_setRxFifo0DataFieldSize(nodeSfr, config->rxConfig.rxFifo0DataFieldSize);
259
260 /* set Rx FIFO 0 start address in the Message RAM */
261 IfxCan_Node_setRxFifo0StartAddress(nodeSfr, config->messageRAM.rxFifo0StartAddress);
262
263 /* set Rx FIFO 0 size */
264 IfxCan_Node_setRxFifo0Size(nodeSfr, config->rxConfig.rxFifo0Size);
265
266 /* set Rx FIFO 0 operating mode */
267 IfxCan_Node_setRxFifo0OperatingMode(nodeSfr, config->rxConfig.rxFifo0OperatingMode);
268
269 /* set Rx FIFO 0 watermark level */
270 IfxCan_Node_setRxFifo0WatermarkLevel(nodeSfr, config->rxConfig.rxFifo0WatermarkLevel);
271 }
272
273 if ((config->rxConfig.rxMode == IfxCan_RxMode_fifo1) ||
274 (config->rxConfig.rxMode == IfxCan_RxMode_sharedFifo1) ||
275 (config->rxConfig.rxMode == IfxCan_RxMode_sharedAll))
276 {
277 /* set Rx FIFO 1 data length */
278 IfxCan_Node_setRxFifo1DataFieldSize(nodeSfr, config->rxConfig.rxFifo1DataFieldSize);
279
280 /* set Rx FIFO 1 start address in the Message RAM */
281 IfxCan_Node_setRxFifo1StartAddress(nodeSfr, config->messageRAM.rxFifo1StartAddress);
282
283 /* set Rx FIFO 1 size */
284 IfxCan_Node_setRxFifo1Size(nodeSfr, config->rxConfig.rxFifo1Size);
285
286 /* set Rx FIFO 1 operating mode */
287 IfxCan_Node_setRxFifo1OperatingMode(nodeSfr, config->rxConfig.rxFifo1OperatingMode);
288
289 /* set Rx FIFO 1 watermark level */
290 IfxCan_Node_setRxFifo1WatermarkLevel(nodeSfr, config->rxConfig.rxFifo1WatermarkLevel);
291 }
292
293 /* enable CAN frame mode of transmission */
294 IfxCan_Node_setFrameMode(nodeSfr, config->frame.mode);
295
296 /* filter configuration */
297
298 if ((config->filterConfig.messageIdLength == IfxCan_MessageIdLength_standard) ||
299 (config->filterConfig.messageIdLength == IfxCan_MessageIdLength_both))
300 {
301 IfxCan_Node_setStandardFilterListStartAddress(nodeSfr, config->messageRAM.standardFilterListStartAddress);
302 IfxCan_Node_setStandardFilterListSize(nodeSfr, config->filterConfig.standardListSize);
303 IfxCan_Node_configureStandardFilterForNonMatchingFrames(nodeSfr, config->filterConfig.standardFilterForNonMatchingFrames);
304
305 if (config->filterConfig.rejectRemoteFramesWithStandardId == 1U)
306 {
307 IfxCan_Node_rejectRemoteFramesWithStandardId(nodeSfr);
308 }
309 }
310
311 if ((config->filterConfig.messageIdLength == IfxCan_MessageIdLength_extended) ||
312 (config->filterConfig.messageIdLength == IfxCan_MessageIdLength_both))
313 {
314 IfxCan_Node_setExtendedFilterListStartAddress(nodeSfr, config->messageRAM.extendedFilterListStartAddress);
315 IfxCan_Node_setExtendedFilterListSize(nodeSfr, config->filterConfig.extendedListSize);
316 IfxCan_Node_configureExtendedFilterForNonMatchingFrames(nodeSfr, config->filterConfig.extendedFilterForNonMatchingFrames);
317
318 if (config->filterConfig.rejectRemoteFramesWithExtendedId == 1U)
319 {
320 IfxCan_Node_rejectRemoteFramesWithExtendedId(nodeSfr);
321 }
322 }
323 }
324
325 /* pins initialisation */
326
327 if (config->pins != NULL_PTR)
328 {
329 if (config->pins->txPin != NULL_PTR)
330 {
331 status |= (IfxCan_Node_initTxPin(config->pins->txPin, config->pins->txPinMode, config->pins->padDriver));
332 }
333
334 if (config->pins->rxPin != NULL_PTR)
335 {
336 status |= (IfxCan_Node_initRxPin(nodeSfr, config->pins->rxPin, config->pins->rxPinMode, config->pins->padDriver));
337 }
338 }
339
340 /* enable internal virtual CAN bus loopback mode if selected */
341 if (config->busLoopbackEnabled)
342 {
343 IfxCan_Node_enableLoopbackMode(nodeSfr);
344 }
345
346 // interrupt groups configuration
347 volatile Ifx_SRC_SRCR *srcPointer;
348
349 if ((config->interruptConfig.tefifo.priority > 0) || (config->interruptConfig.tefifo.typeOfService == IfxSrc_Tos_dma))
350 {
351 IfxCan_Node_setGroupInterruptLine(nodeSfr, IfxCan_InterruptGroup_tefifo, config->interruptConfig.tefifo.interruptLine);
352 srcPointer = IfxCan_getSrcPointer(config->can, config->interruptConfig.tefifo.interruptLine);
353 IfxSrc_init(srcPointer, config->interruptConfig.tefifo.typeOfService, config->interruptConfig.tefifo.priority);
354 IfxSrc_enable(srcPointer);
355 }
356
357 if ((config->interruptConfig.hpe.priority > 0) || (config->interruptConfig.hpe.typeOfService == IfxSrc_Tos_dma))
358 {
359 IfxCan_Node_setGroupInterruptLine(nodeSfr, IfxCan_InterruptGroup_hpe, config->interruptConfig.hpe.interruptLine);
360 srcPointer = IfxCan_getSrcPointer(config->can, config->interruptConfig.hpe.interruptLine);
361 IfxSrc_init(srcPointer, config->interruptConfig.hpe.typeOfService, config->interruptConfig.hpe.priority);
362 IfxSrc_enable(srcPointer);
363 }
364
365 if ((config->interruptConfig.wati.priority > 0) || (config->interruptConfig.wati.typeOfService == IfxSrc_Tos_dma))
366 {
367 IfxCan_Node_setGroupInterruptLine(nodeSfr, IfxCan_InterruptGroup_wati, config->interruptConfig.wati.interruptLine);
368 srcPointer = IfxCan_getSrcPointer(config->can, config->interruptConfig.wati.interruptLine);
369 IfxSrc_init(srcPointer, config->interruptConfig.wati.typeOfService, config->interruptConfig.wati.priority);
370 IfxSrc_enable(srcPointer);
371 }
372
373 if ((config->interruptConfig.alrt.priority > 0) || (config->interruptConfig.alrt.typeOfService == IfxSrc_Tos_dma))
374 {
375 IfxCan_Node_setGroupInterruptLine(nodeSfr, IfxCan_InterruptGroup_alrt, config->interruptConfig.alrt.interruptLine);
376 srcPointer = IfxCan_getSrcPointer(config->can, config->interruptConfig.alrt.interruptLine);
377 IfxSrc_init(srcPointer, config->interruptConfig.alrt.typeOfService, config->interruptConfig.alrt.priority);
378 IfxSrc_enable(srcPointer);
379 }
380
381 if ((config->interruptConfig.moer.priority > 0) || (config->interruptConfig.moer.typeOfService == IfxSrc_Tos_dma))
382 {
383 IfxCan_Node_setGroupInterruptLine(nodeSfr, IfxCan_InterruptGroup_moer, config->interruptConfig.moer.interruptLine);
384 srcPointer = IfxCan_getSrcPointer(config->can, config->interruptConfig.moer.interruptLine);
385 IfxSrc_init(srcPointer, config->interruptConfig.moer.typeOfService, config->interruptConfig.moer.priority);
386 IfxSrc_enable(srcPointer);
387 }
388
389 if ((config->interruptConfig.safe.priority > 0) || (config->interruptConfig.safe.typeOfService == IfxSrc_Tos_dma))
390 {
391 IfxCan_Node_setGroupInterruptLine(nodeSfr, IfxCan_InterruptGroup_safe, config->interruptConfig.safe.interruptLine);
392 srcPointer = IfxCan_getSrcPointer(config->can, config->interruptConfig.safe.interruptLine);
393 IfxSrc_init(srcPointer, config->interruptConfig.safe.typeOfService, config->interruptConfig.safe.priority);
394 IfxSrc_enable(srcPointer);
395 }
396
397 if ((config->interruptConfig.boff.priority > 0) || (config->interruptConfig.boff.typeOfService == IfxSrc_Tos_dma))
398 {
399 IfxCan_Node_setGroupInterruptLine(nodeSfr, IfxCan_InterruptGroup_boff, config->interruptConfig.boff.interruptLine);
400 srcPointer = IfxCan_getSrcPointer(config->can, config->interruptConfig.boff.interruptLine);
401 IfxSrc_init(srcPointer, config->interruptConfig.boff.typeOfService, config->interruptConfig.boff.priority);
402 IfxSrc_enable(srcPointer);
403 }
404
405 if ((config->interruptConfig.loi.priority > 0) || (config->interruptConfig.loi.typeOfService == IfxSrc_Tos_dma))
406 {
407 IfxCan_Node_setGroupInterruptLine(nodeSfr, IfxCan_InterruptGroup_loi, config->interruptConfig.loi.interruptLine);
408 srcPointer = IfxCan_getSrcPointer(config->can, config->interruptConfig.loi.interruptLine);
409 IfxSrc_init(srcPointer, config->interruptConfig.loi.typeOfService, config->interruptConfig.loi.priority);
410 IfxSrc_enable(srcPointer);
411 }
412
413 if ((config->interruptConfig.reint.priority > 0) || (config->interruptConfig.reint.typeOfService == IfxSrc_Tos_dma))
414 {
415 IfxCan_Node_setGroupInterruptLine(nodeSfr, IfxCan_InterruptGroup_reint, config->interruptConfig.reint.interruptLine);
416 srcPointer = IfxCan_getSrcPointer(config->can, config->interruptConfig.reint.interruptLine);
417 IfxSrc_init(srcPointer, config->interruptConfig.reint.typeOfService, config->interruptConfig.reint.priority);
418 IfxSrc_enable(srcPointer);
419 }
420
421 if ((config->interruptConfig.rxf1f.priority > 0) || (config->interruptConfig.rxf1f.typeOfService == IfxSrc_Tos_dma))
422 {
423 IfxCan_Node_setGroupInterruptLine(nodeSfr, IfxCan_InterruptGroup_rxf1f, config->interruptConfig.rxf1f.interruptLine);
424 srcPointer = IfxCan_getSrcPointer(config->can, config->interruptConfig.rxf1f.interruptLine);
425 IfxSrc_init(srcPointer, config->interruptConfig.rxf1f.typeOfService, config->interruptConfig.rxf1f.priority);
426 IfxSrc_enable(srcPointer);
427 }
428
429 if ((config->interruptConfig.rxf0f.priority > 0) || (config->interruptConfig.rxf0f.typeOfService == IfxSrc_Tos_dma))
430 {
431 IfxCan_Node_setGroupInterruptLine(nodeSfr, IfxCan_InterruptGroup_rxf0f, config->interruptConfig.rxf0f.interruptLine);
432 srcPointer = IfxCan_getSrcPointer(config->can, config->interruptConfig.rxf0f.interruptLine);
433 IfxSrc_init(srcPointer, config->interruptConfig.rxf0f.typeOfService, config->interruptConfig.rxf0f.priority);
434 IfxSrc_enable(srcPointer);
435 }
436
437 if ((config->interruptConfig.rxf1n.priority > 0) || (config->interruptConfig.rxf1f.typeOfService == IfxSrc_Tos_dma))
438 {
439 IfxCan_Node_setGroupInterruptLine(nodeSfr, IfxCan_InterruptGroup_rxf1n, config->interruptConfig.rxf1n.interruptLine);
440 srcPointer = IfxCan_getSrcPointer(config->can, config->interruptConfig.rxf1n.interruptLine);
441 IfxSrc_init(srcPointer, config->interruptConfig.rxf1n.typeOfService, config->interruptConfig.rxf1n.priority);
442 IfxSrc_enable(srcPointer);
443 }
444
445 if ((config->interruptConfig.rxf0n.priority > 0) || (config->interruptConfig.rxf0n.typeOfService == IfxSrc_Tos_dma))
446 {
447 IfxCan_Node_setGroupInterruptLine(nodeSfr, IfxCan_InterruptGroup_rxf0n, config->interruptConfig.rxf0n.interruptLine);
448 srcPointer = IfxCan_getSrcPointer(config->can, config->interruptConfig.rxf0n.interruptLine);
449 IfxSrc_init(srcPointer, config->interruptConfig.rxf0n.typeOfService, config->interruptConfig.rxf0n.priority);
450 IfxSrc_enable(srcPointer);
451 }
452
453 if ((config->interruptConfig.reti.priority > 0) || (config->interruptConfig.reti.typeOfService == IfxSrc_Tos_dma))
454 {
455 IfxCan_Node_setGroupInterruptLine(nodeSfr, IfxCan_InterruptGroup_reti, config->interruptConfig.reti.interruptLine);
456 srcPointer = IfxCan_getSrcPointer(config->can, config->interruptConfig.reti.interruptLine);
457 IfxSrc_init(srcPointer, config->interruptConfig.reti.typeOfService, config->interruptConfig.reti.priority);
458 IfxSrc_enable(srcPointer);
459 }
460
461 if ((config->interruptConfig.traq.priority > 0) || (config->interruptConfig.traq.typeOfService == IfxSrc_Tos_dma))
462 {
463 IfxCan_Node_setGroupInterruptLine(nodeSfr, IfxCan_InterruptGroup_traq, config->interruptConfig.traq.interruptLine);
464 srcPointer = IfxCan_getSrcPointer(config->can, config->interruptConfig.traq.interruptLine);
465 IfxSrc_init(srcPointer, config->interruptConfig.traq.typeOfService, config->interruptConfig.traq.priority);
466 IfxSrc_enable(srcPointer);
467 }
468
469 if ((config->interruptConfig.traco.priority > 0) || (config->interruptConfig.traco.typeOfService == IfxSrc_Tos_dma))
470 {
471 IfxCan_Node_setGroupInterruptLine(nodeSfr, IfxCan_InterruptGroup_traco, config->interruptConfig.traco.interruptLine);
472 srcPointer = IfxCan_getSrcPointer(config->can, config->interruptConfig.traco.interruptLine);
473 IfxSrc_init(srcPointer, config->interruptConfig.traco.typeOfService, config->interruptConfig.traco.priority);
474 IfxSrc_enable(srcPointer);
475 }
476
477 /* enable the selected interrupts */
478 if (config->interruptConfig.rxFifo0NewMessageEnabled)
479 {
480 IfxCan_Node_enableInterrupt(nodeSfr, IfxCan_Interrupt_rxFifo0NewMessage);
481 }
482
483 if (config->interruptConfig.rxFifo0WatermarkEnabled)
484 {
485 IfxCan_Node_enableInterrupt(nodeSfr, IfxCan_Interrupt_rxFifo0WatermarkReached);
486 }
487
488 if (config->interruptConfig.rxFifo0FullEnabled)
489 {
490 IfxCan_Node_enableInterrupt(nodeSfr, IfxCan_Interrupt_rxFifo0Full);
491 }
492
493 if (config->interruptConfig.rxFifo0MessageLostEnabled)
494 {
495 IfxCan_Node_enableInterrupt(nodeSfr, IfxCan_Interrupt_rxFifo0MessageLost);
496 }
497
498 if (config->interruptConfig.rxFifo1NewMessageEnabled)
499 {
500 IfxCan_Node_enableInterrupt(nodeSfr, IfxCan_Interrupt_rxFifo1NewMessage);
501 }
502
503 if (config->interruptConfig.rxFifo1WatermarkEnabled)
504 {
505 IfxCan_Node_enableInterrupt(nodeSfr, IfxCan_Interrupt_rxFifo1WatermarkReached);
506 }
507
508 if (config->interruptConfig.rxFifo1FullEnabled)
509 {
510 IfxCan_Node_enableInterrupt(nodeSfr, IfxCan_Interrupt_rxFifo1Full);
511 }
512
513 if (config->interruptConfig.rxFifo1MessageLostEnabled)
514 {
515 IfxCan_Node_enableInterrupt(nodeSfr, IfxCan_Interrupt_rxFifo1MessageLost);
516 }
517
518 if (config->interruptConfig.highPriorityMessageEnabled)
519 {
520 IfxCan_Node_enableInterrupt(nodeSfr, IfxCan_Interrupt_highPriorityMessage);
521 }
522
523 if (config->interruptConfig.transmissionCompletedEnabled)
524 {
525 IfxCan_Node_enableInterrupt(nodeSfr, IfxCan_Interrupt_transmissionCompleted);
526 }
527
528 if (config->interruptConfig.transmissionCancellationFinishedEnabled)
529 {
530 IfxCan_Node_enableInterrupt(nodeSfr, IfxCan_Interrupt_transmissionCancellationFinished);
531 }
532
533 if (config->interruptConfig.txFifoEmptyEnabled)
534 {
535 IfxCan_Node_enableInterrupt(nodeSfr, IfxCan_Interrupt_txFifoEmpty);
536 }
537
538 if (config->interruptConfig.txEventFifoNewEntryEnabled)
539 {
540 IfxCan_Node_enableInterrupt(nodeSfr, IfxCan_Interrupt_txEventFifoNewEntry);
541 }
542
543 if (config->interruptConfig.txEventFifoWatermarkEnabled)
544 {
545 IfxCan_Node_enableInterrupt(nodeSfr, IfxCan_Interrupt_txEventFifoWatermarkReached);
546 }
547
548 if (config->interruptConfig.txEventFifoFullEnabled)
549 {
550 IfxCan_Node_enableInterrupt(nodeSfr, IfxCan_Interrupt_txEventFifoFull);
551 }
552
553 if (config->interruptConfig.txEventFifoEventLostEnabled)
554 {
555 IfxCan_Node_enableInterrupt(nodeSfr, IfxCan_Interrupt_txEventFifoEventLost);
556 }
557
558 if (config->interruptConfig.timestampWraparoundEnabled)
559 {
560 IfxCan_Node_enableInterrupt(nodeSfr, IfxCan_Interrupt_timestampWraparound);
561 }
562
563 if (config->interruptConfig.messageRAMAccessFailureEnabled)
564 {
565 IfxCan_Node_enableInterrupt(nodeSfr, IfxCan_Interrupt_messageRAMAccessFailure);
566 }
567
568 if (config->interruptConfig.timeoutOccurredEnabled)
569 {
570 IfxCan_Node_enableInterrupt(nodeSfr, IfxCan_Interrupt_timeoutOccurred);
571 }
572
573 if (config->interruptConfig.messageStoredToDedicatedRxBufferEnabled)
574 {
575 IfxCan_Node_enableInterrupt(nodeSfr, IfxCan_Interrupt_messageStoredToDedicatedRxBuffer);
576 }
577
578 if (config->interruptConfig.errorLoggingOverflowEnabled)
579 {
580 IfxCan_Node_enableInterrupt(nodeSfr, IfxCan_Interrupt_errorLoggingOverflow);
581 }
582
583 if (config->interruptConfig.errorPassiveEnabled)
584 {
585 IfxCan_Node_enableInterrupt(nodeSfr, IfxCan_Interrupt_errorPassive);
586 }
587
588 if (config->interruptConfig.warningStatusEnabled)
589 {
590 IfxCan_Node_enableInterrupt(nodeSfr, IfxCan_Interrupt_warningStatus);
591 }
592
593 if (config->interruptConfig.busOffStatusEnabled)
594 {
595 IfxCan_Node_enableInterrupt(nodeSfr, IfxCan_Interrupt_busOffStatus);
596 }
597
598 if (config->interruptConfig.watchdogEnabled)
599 {
600 IfxCan_Node_enableInterrupt(nodeSfr, IfxCan_Interrupt_watchdog);
601 }
602
603 if (config->interruptConfig.protocolErrorArbitrationEnabled)
604 {
605 IfxCan_Node_enableInterrupt(nodeSfr, IfxCan_Interrupt_protocolErrorArbitration);
606 }
607
608 if (config->interruptConfig.protocolErrorDataEnabled)
609 {
610 IfxCan_Node_enableInterrupt(nodeSfr, IfxCan_Interrupt_protocolErrorData);
611 }
612
613 /* disable configuration change CCCR.CCE = 0 */
614 IfxCan_Node_disableConfigurationChange(nodeSfr);
615
616 return status;
617 }
618
619
620 void IfxCan_Can_initNodeConfig(IfxCan_Can_NodeConfig *config, IfxCan_Can *can)
621 {
622 const IfxCan_Can_NodeConfig defaultConfig = {
623 .can = NULL_PTR,
624 .nodeId = IfxCan_NodeId_0,
625 .clockSource = IfxCan_ClockSource_both,
626 .frame = {
627 .type = IfxCan_FrameType_receive,
628 .mode = IfxCan_FrameMode_standard
629 },
630 .baudRate = {
631 .baudrate = 500000,
632 .samplePoint = 8000,
633 .syncJumpWidth = 3,
634 .prescaler = 0,
635 .timeSegment1 = 3,
636 .timeSegment2 = 10
637 },
638 .fastBaudRate = {
639 .baudrate = 1000000,
640 .samplePoint = 8000,
641 .syncJumpWidth = 3,
642 .prescaler = 1,
643 .timeSegment1 = 3,
644 .timeSegment2 = 10,
645 .tranceiverDelayOffset = 0
646 },
647 .txConfig = {
648 .txMode = IfxCan_TxMode_dedicatedBuffers,
649 .dedicatedTxBuffersNumber = 2,
650 .txFifoQueueSize = 0,
651 .txBufferDataFieldSize = IfxCan_DataFieldSize_8,
652 .txEventFifoSize = 0
653 },
654 .filterConfig = {
655 .messageIdLength = IfxCan_MessageIdLength_standard,
656 .standardListSize = 2,
657 .extendedListSize = 0,
658 .rejectRemoteFramesWithStandardId = 0,
659 .rejectRemoteFramesWithExtendedId = 0,
660 .standardFilterForNonMatchingFrames = IfxCan_NonMatchingFrame_acceptToRxFifo0,
661 .extendedFilterForNonMatchingFrames = IfxCan_NonMatchingFrame_acceptToRxFifo0
662 },
663 .rxConfig = {
664 .rxMode = IfxCan_RxMode_dedicatedBuffers,
665 .rxBufferDataFieldSize = IfxCan_DataFieldSize_8,
666 .rxFifo0DataFieldSize = IfxCan_DataFieldSize_8,
667 .rxFifo1DataFieldSize = IfxCan_DataFieldSize_8,
668 .rxFifo0OperatingMode = IfxCan_RxFifoMode_blocking,
669 .rxFifo1OperatingMode = IfxCan_RxFifoMode_blocking,
670 .rxFifo0WatermarkLevel = 0,
671 .rxFifo1WatermarkLevel = 0,
672 .rxFifo0Size = 0,
673 .rxFifo1Size = 0
674 },
675 .messageRAM = {
676 .baseAddress = (uint32)&MODULE_CAN0,
677 .standardFilterListStartAddress = 0x0,
678 .extendedFilterListStartAddress = 0x80,
679 .rxFifo0StartAddress = 0x100,
680 .rxFifo1StartAddress = 0x200,
681 .rxBuffersStartAddress = 0x300,
682 .txEventFifoStartAddress = 0x400,
683 .txBuffersStartAddress = 0x440
684 },
685 .interruptConfig = {
686 .rxFifo0NewMessageEnabled = FALSE,
687 .rxFifo0WatermarkEnabled = FALSE,
688 .rxFifo0FullEnabled = FALSE,
689 .rxFifo0MessageLostEnabled = FALSE,
690 .rxFifo1NewMessageEnabled = FALSE,
691 .rxFifo1WatermarkEnabled = FALSE,
692 .rxFifo1FullEnabled = FALSE,
693 .rxFifo1MessageLostEnabled = FALSE,
694 .highPriorityMessageEnabled = FALSE,
695 .transmissionCompletedEnabled = FALSE,
696 .transmissionCancellationFinishedEnabled = FALSE,
697 .txFifoEmptyEnabled = FALSE,
698 .txEventFifoNewEntryEnabled = FALSE,
699 .txEventFifoWatermarkEnabled = FALSE,
700 .txEventFifoFullEnabled = FALSE,
701 .txEventFifoEventLostEnabled = FALSE,
702 .timestampWraparoundEnabled = FALSE,
703 .messageRAMAccessFailureEnabled = FALSE,
704 .timeoutOccurredEnabled = FALSE,
705 .messageStoredToDedicatedRxBufferEnabled = FALSE,
706 .errorLoggingOverflowEnabled = FALSE,
707 .errorPassiveEnabled = FALSE,
708 .warningStatusEnabled = FALSE,
709 .busOffStatusEnabled = FALSE,
710 .watchdogEnabled = FALSE,
711 .protocolErrorArbitrationEnabled = FALSE,
712 .protocolErrorDataEnabled = FALSE,
713 .tefifo = {
714 .interruptLine = IfxCan_InterruptLine_0,
715 .priority = 0,
716 .typeOfService = IfxSrc_Tos_cpu0
717 },
718 .hpe = {
719 .interruptLine = IfxCan_InterruptLine_0,
720 .priority = 0,
721 .typeOfService = IfxSrc_Tos_cpu0
722 },
723 .wati = {
724 .interruptLine = IfxCan_InterruptLine_0,
725 .priority = 0,
726 .typeOfService = IfxSrc_Tos_cpu0
727 },
728 .alrt = {
729 .interruptLine = IfxCan_InterruptLine_0,
730 .priority = 0,
731 .typeOfService = IfxSrc_Tos_cpu0
732 },
733 .moer = {
734 .interruptLine = IfxCan_InterruptLine_0,
735 .priority = 0,
736 .typeOfService = IfxSrc_Tos_cpu0
737 },
738 .safe = {
739 .interruptLine = IfxCan_InterruptLine_0,
740 .priority = 0,
741 .typeOfService = IfxSrc_Tos_cpu0
742 },
743 .boff = {
744 .interruptLine = IfxCan_InterruptLine_0,
745 .priority = 0,
746 .typeOfService = IfxSrc_Tos_cpu0
747 },
748 .loi = {
749 .interruptLine = IfxCan_InterruptLine_0,
750 .priority = 0,
751 .typeOfService = IfxSrc_Tos_cpu0
752 },
753 .reint = {
754 .interruptLine = IfxCan_InterruptLine_0,
755 .priority = 0,
756 .typeOfService = IfxSrc_Tos_cpu0
757 },
758 .rxf1f = {
759 .interruptLine = IfxCan_InterruptLine_0,
760 .priority = 0,
761 .typeOfService = IfxSrc_Tos_cpu0
762 },
763 .rxf0f = {
764 .interruptLine = IfxCan_InterruptLine_0,
765 .priority = 0,
766 .typeOfService = IfxSrc_Tos_cpu0
767 },
768 .rxf1n = {
769 .interruptLine = IfxCan_InterruptLine_0,
770 .priority = 0,
771 .typeOfService = IfxSrc_Tos_cpu0
772 },
773 .rxf0n = {
774 .interruptLine = IfxCan_InterruptLine_0,
775 .priority = 0,
776 .typeOfService = IfxSrc_Tos_cpu0
777 },
778 .reti = {
779 .interruptLine = IfxCan_InterruptLine_0,
780 .priority = 0,
781 .typeOfService = IfxSrc_Tos_cpu0
782 },
783 .traq = {
784 .interruptLine = IfxCan_InterruptLine_0,
785 .priority = 0,
786 .typeOfService = IfxSrc_Tos_cpu0
787 },
788 .traco = {
789 .interruptLine = IfxCan_InterruptLine_0,
790 .priority = 0,
791 .typeOfService = IfxSrc_Tos_cpu0
792 }
793 },
794 .pins = NULL_PTR,
795 .busLoopbackEnabled = FALSE,
796 .calculateBitTimingValues = TRUE
797 };
798
799 /* Default Configuration */
800 *config = defaultConfig;
801
802 /* take over module pointer */
803 config->can = can->can;
804 }
805
806
807 void IfxCan_Can_readMessage(IfxCan_Can_Node *node, IfxCan_Message *message, uint32 *data)
808 {
809 IfxCan_RxBufferId bufferId = IfxCan_RxBufferId_0;
810 Ifx_CAN_RXMSG *rxBufferElement;
811
812 if ((message->readFromRxFifo0) || (message->readFromRxFifo1))
813 {
814 if (message->readFromRxFifo0)
815 {
816 /* get the Tx FIFO 0 ELement address */
817 bufferId = IfxCan_Node_getRxFifo0GetIndex(node->node);
818 rxBufferElement = IfxCan_Node_getRxFifo0ElementAddress(node->node, node->messageRAM.baseAddress, node->messageRAM.rxFifo0StartAddress, bufferId);
819 }
820 else
821 {
822 /* get the Tx FIFO 1 ELement address */
823 bufferId = IfxCan_Node_getRxFifo1GetIndex(node->node);
824 rxBufferElement = IfxCan_Node_getRxFifo1ElementAddress(node->node, node->messageRAM.baseAddress, node->messageRAM.rxFifo1StartAddress, bufferId);
825 }
826 }
827 else
828 {
829 /* get the Rx Bufer ELement address */
830 bufferId = (IfxCan_RxBufferId)message->bufferNumber;
831 rxBufferElement = IfxCan_Node_getRxBufferElementAddress(node->node, node->messageRAM.baseAddress, node->messageRAM.rxBuffersStartAddress, bufferId);
832 }
833
834 /*get message ID */
835 message->messageId = IfxCan_Node_getMesssageId(rxBufferElement);
836
837 /* get data length code*/
838 message->dataLengthCode = (IfxCan_DataLengthCode)IfxCan_Node_getDataLengthCode(rxBufferElement);
839
840 /* get CAN frame mode of operation */
841 message->frameMode = IfxCan_Node_getFrameMode(rxBufferElement);
842
843 /* read data */
844 IfxCan_Node_readData(rxBufferElement, message->dataLengthCode, data);
845
846 /* write acknowledgement index incase of FIFO */
847 if (message->readFromRxFifo0)
848 {
849 IfxCan_Node_setRxFifo0AcknowledgeIndex(node->node, bufferId);
850 }
851 else if (message->readFromRxFifo1)
852 {
853 IfxCan_Node_setRxFifo1AcknowledgeIndex(node->node, bufferId);
854 }
855
856 /* clear newdata flag after reading */
857 IfxCan_Node_clearRxBufferNewDataFlag(node->node, bufferId);
858 }
859
860
861 IfxCan_Status IfxCan_Can_sendMessage(IfxCan_Can_Node *node, IfxCan_Message *message, uint32 *data)
862 {
863 IfxCan_Status status = IfxCan_Status_ok;
864
865 IfxCan_TxBufferId bufferId = IfxCan_TxBufferId_0;
866
867 if (!message->storeInTxFifoQueue)
868 {
869 bufferId = (IfxCan_TxBufferId)message->bufferNumber;
870 }
871 else
872 {
873 bufferId = IfxCan_Node_getTxFifoQueuePutIndex(node->node);
874 }
875
876 if (IfxCan_Can_isTxBufferRequestPending(node, bufferId) == 1)
877 { /* previous message was not transferred, e.g. due to busy bus, BUS-OFF or others */
878 status = IfxCan_Status_notSentBusy;
879 }
880 else
881 {
882 /* get the Tx Bufer ELement address */
883 Ifx_CAN_TXMSG *txBufferElement = IfxCan_Node_getTxBufferElementAddress(node->node, node->messageRAM.baseAddress, node->messageRAM.txBuffersStartAddress, bufferId);
884
885 /*set message Id (ID and XTD) */
886 IfxCan_Node_setMsgId(txBufferElement, message->messageId, message->messageIdLength);
887
888 /* set TX FIFO Event control (EFC) and Message Marker (MM) if Tx Event Fifo is chosen */
889 if (message->txEventFifoControl == TRUE)
890 {
891 IfxCan_Node_setTxEventFifoCtrl(txBufferElement, message->txEventFifoControl);
892 IfxCan_Node_setMessageMarker(txBufferElement, bufferId);
893 }
894
895 /* set Remote Transmit request if selected (RTR)*/
896 IfxCan_Node_setRemoteTransmitReq(txBufferElement, message->remoteTransmitRequest);
897
898 /* set Error State Indicator if selected (ESI)*/
899 if ((message->frameMode == IfxCan_FrameMode_fdLong) || (message->frameMode == IfxCan_FrameMode_fdLongAndFast))
900 {
901 IfxCan_Node_setErrStateIndicator(txBufferElement, message->errorStateIndicator);
902 }
903
904 /* set data length code (DLC) */
905 IfxCan_Node_setDataLength(txBufferElement, message->dataLengthCode);
906
907 /* write data (DBx) */
908 IfxCan_Node_writeTxBufData(txBufferElement, message->dataLengthCode, data);
909
910 /* set CAN frame mode request (FDF and BRS) */
911 IfxCan_Node_setFrameModeReq(txBufferElement, message->frameMode);
912
913 /*set transmit request */
914 IfxCan_Node_setTxBufferAddRequest(node->node, bufferId);
915 }
916
917 return status;
918 }
919
920
921 void IfxCan_Can_setExtendedFilter(IfxCan_Can_Node *node, IfxCan_Filter *filter)
922 {
923 /* get the Extended filter element address */
924 Ifx_CAN_EXTMSG *extendedFilterElement = IfxCan_Node_getExtendedFilterElementAddress(node->messageRAM.baseAddress, node->messageRAM.extendedFilterListStartAddress, filter->number);
925
926 /* enable configuration change CCCR.CCE = 1, CCCR.INIT = 1 */
927 IfxCan_Node_enableConfigurationChange(node->node);
928
929 if (filter->elementConfiguration != IfxCan_FilterElementConfiguration_storeInRxBuffer)
930 {
931 IfxCan_Node_setExtendedFilterId2(extendedFilterElement, filter->id2);
932 }
933 else
934 {
935 IfxCan_Node_setExtendedFilterRxBufferOffset(extendedFilterElement, filter->rxBufferOffset);
936 }
937
938 IfxCan_Node_setExtendedFilterId1(extendedFilterElement, filter->id1);
939 IfxCan_Node_setExtendedFilterConfiguration(extendedFilterElement, filter->elementConfiguration);
940 IfxCan_Node_setExtendedFilterType(extendedFilterElement, filter->type);
941
942 /* disable configuration change CCCR.CCE = 0, CCCR.INIT = 0 */
943 IfxCan_Node_disableConfigurationChange(node->node);
944 }
945
946
947 void IfxCan_Can_setStandardFilter(IfxCan_Can_Node *node, IfxCan_Filter *filter)
948 {
949 /* get the standard filter element address */
950 Ifx_CAN_STDMSG *standardFilterElement = IfxCan_Node_getStandardFilterElementAddress(node->messageRAM.baseAddress, node->messageRAM.standardFilterListStartAddress, filter->number);
951
952 /* enable configuration change CCCR.CCE = 1, CCCR.INIT = 1 */
953 IfxCan_Node_enableConfigurationChange(node->node);
954
955 if (filter->elementConfiguration != IfxCan_FilterElementConfiguration_storeInRxBuffer)
956 {
957 IfxCan_Node_setStandardFilterId2(standardFilterElement, filter->id2);
958 }
959 else
960 {
961 IfxCan_Node_setStandardFilterRxBufferOffset(standardFilterElement, filter->rxBufferOffset);
962 }
963
964 IfxCan_Node_setStandardFilterId1(standardFilterElement, filter->id1);
965 IfxCan_Node_setStandardFilterConfiguration(standardFilterElement, filter->elementConfiguration);
966 IfxCan_Node_setStandardFilterType(standardFilterElement, filter->type);
967
968 /* disable configuration change CCCR.CCE = 0, CCCR.INIT = 0 */
969 IfxCan_Node_disableConfigurationChange(node->node);
970 }
IfxCan_Can_InterruptConfig::reti
IfxCan_GroupInterruptConfig reti
Configuration for Receive Timeouts interrupts.
Definition: IfxCan_Can.h:650
IfxCan_InterruptGroup_hpe
High Priority Events.
Definition: IfxCan.h:239
IfxCan_Can_InterruptConfig::tefifo
IfxCan_GroupInterruptConfig tefifo
Configuration for Transmit Event FIFO Incidents interrupts.
Definition: IfxCan_Can.h:637
IfxCan_Node_setRxFifo0StartAddress
IFX_INLINE void IfxCan_Node_setRxFifo0StartAddress(Ifx_CAN_N *node, uint16 address)
Sets the start address of Rx FIFO 0 section in the Message RAM (32-bit word address) ...
Definition: IfxCan.h:2246
IfxCan_Can_InterruptConfig::rxFifo0WatermarkEnabled
boolean rxFifo0WatermarkEnabled
Rx Fifo 0 Watermark Interrupt enable/Disable.
Definition: IfxCan_Can.h:611
IfxCan_Node_setBitTiming
void IfxCan_Node_setBitTiming(Ifx_CAN_N *node, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 syncJumpWidth)
Calculates and Sets the CAN baudrate for standard frames and arbitration phase of CAND FD frames...
Definition: IfxCan.c:385
IfxCan_Filter::elementConfiguration
IfxCan_FilterElementConfiguration elementConfiguration
*FEC, Filter Element Configuration of (standard / extended ID) filter element
Definition: IfxCan.h:513
IfxCan_Node_setRemoteTransmitReq
IFX_INLINE void IfxCan_Node_setRemoteTransmitReq(Ifx_CAN_TXMSG *txBufferElement, boolean enable)
Sets the remote Transmit Request (RTR) for transmit frame.
Definition: IfxCan.h:2197
IfxCan_Can_RxConfig::rxFifo0WatermarkLevel
uint8 rxFifo0WatermarkLevel
Rx FIFO 0 watermark level.
Definition: IfxCan_Can.h:676
IfxCan_FilterElementConfiguration_storeInRxBuffer
Store into Rx Buffer.
Definition: IfxCan.h:162
IfxCan_Can_initNode
boolean IfxCan_Can_initNode(IfxCan_Can_Node *node, const IfxCan_Can_NodeConfig *config)
Initialises the CAN Node.
Definition: IfxCan_Can.c:101
IfxCan_Interrupt_rxFifo0MessageLost
Rx FIFO 0 Message Lost Interrupt.
Definition: IfxCan.h:204
IfxCan_Node_getExtendedFilterElementAddress
Ifx_CAN_EXTMSG * IfxCan_Node_getExtendedFilterElementAddress(uint32 ramBaseAddress, uint16 extendedFilterListStartAddress, uint8 filterNumber)
Returns the address of selected extended filter element.
Definition: IfxCan.c:114
IfxCan_Node_getRxBufferElementAddress
Ifx_CAN_RXMSG * IfxCan_Node_getRxBufferElementAddress(Ifx_CAN_N *node, uint32 ramBaseAddress, uint16 rxBuffersStartAddress, IfxCan_RxBufferId rxBufferNumber)
Returns the address of selected Rx buffer element.
Definition: IfxCan.c:200
IfxCan_Node_setStandardFilterListSize
IFX_INLINE void IfxCan_Node_setStandardFilterListSize(Ifx_CAN_N *node, uint8 size)
Sets the Standard Message ID filter list size.
Definition: IfxCan.h:2312
IfxCan_Node_setRxFifo1DataFieldSize
IFX_INLINE void IfxCan_Node_setRxFifo1DataFieldSize(Ifx_CAN_N *node, IfxCan_DataFieldSize size)
Sets Rx Buffer Fifo 1 Data Field Size.
Definition: IfxCan.h:2264
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxCan_Node_enableConfigurationChange
IFX_INLINE void IfxCan_Node_enableConfigurationChange(Ifx_CAN_N *node)
Enables the configuration change The CPU has write access to the protected configuration registers (w...
Definition: IfxCan.h:1819
IfxCan_MessageRAM::baseAddress
uint32 baseAddress
Message RAM base address of the CAN.
Definition: IfxCan.h:550
IfxCan_Can_BaudRate::prescaler
uint16 prescaler
Baud Rate Prescaler.
Definition: IfxCan_Can.h:567
IfxCan_Can_InterruptConfig::rxFifo0FullEnabled
boolean rxFifo0FullEnabled
Rx Fifo 0 Full Interrupt enable/Disable.
Definition: IfxCan_Can.h:612
IfxCan_Node_initTxPin
boolean IfxCan_Node_initTxPin(IfxCan_Txd_Out *txd, IfxPort_OutputMode mode, IfxPort_PadDriver padDriver)
Select and initialise the CAN node transmit pin.
Definition: IfxCan.c:341
IfxCan_Can::can
Ifx_CAN * can
Specifies the pointer to the CAN registers.
Definition: IfxCan_Can.h:701
IfxCan_Node_getStandardFilterElementAddress
Ifx_CAN_STDMSG * IfxCan_Node_getStandardFilterElementAddress(uint32 ramBaseAddress, uint16 standardFilterListStartAddress, uint8 filterNumber)
Returns the address of selected standard filter element.
Definition: IfxCan.c:277
IfxCan_Can_InterruptConfig::watchdogEnabled
boolean watchdogEnabled
Watchdog Interrupt enable/Disable.
Definition: IfxCan_Can.h:634
IfxCan_Node_setStandardFilterListStartAddress
IFX_INLINE void IfxCan_Node_setStandardFilterListStartAddress(Ifx_CAN_N *node, uint16 address)
Sets the start address of Standard Message ID filter list (32-bit word address)
Definition: IfxCan.h:2318
IfxCan_InterruptGroup_tefifo
Transmit Event FIFO Incidents.
Definition: IfxCan.h:238
IfxCan_Node_getDataLengthCode
IFX_INLINE uint32 IfxCan_Node_getDataLengthCode(Ifx_CAN_RXMSG *rxBufferElement)
Returns the Data Length Code from the received frame.
Definition: IfxCan.h:1891
IfxCan_FrameMode_standard
Standard CAN frame (transmit and receive)
Definition: IfxCan.h:180
IfxCan_Can_FilterConfig::rejectRemoteFramesWithStandardId
boolean rejectRemoteFramesWithStandardId
set whether to reject the remote frames with standard id.
Definition: IfxCan_Can.h:592
IfxCan_Interrupt_timeoutOccurred
Timeout Occurred Interrupt.
Definition: IfxCan.h:219
IfxCan_Can
Module handle.
Definition: IfxCan_Can.h:699
IfxCan_Node_getRxFifo0GetIndex
IFX_INLINE IfxCan_RxBufferId IfxCan_Node_getRxFifo0GetIndex(Ifx_CAN_N *node)
Returns Rx FIFO 0 get index.
Definition: IfxCan.h:1955
IfxCan_MessageRAM::txBuffersStartAddress
uint16 txBuffersStartAddress
Start address of Tx Buffers section in the Message RAM (32-bit word address).
Definition: IfxCan.h:557
IfxCan_Interrupt_rxFifo0Full
Rx FIFO 0 Full Interrupt.
Definition: IfxCan.h:203
IfxCan_Can_InterruptConfig::traq
IfxCan_GroupInterruptConfig traq
Configuration for Transmission Queue Events interrupts.
Definition: IfxCan_Can.h:651
IfxCan_Can_NodeConfig::clockSource
IfxCan_ClockSource clockSource
Clock source.
Definition: IfxCan_Can.h:727
IfxCan_Can_isTxBufferRequestPending
IFX_INLINE boolean IfxCan_Can_isTxBufferRequestPending(IfxCan_Can_Node *node, IfxCan_TxBufferId txBufferId)
Returns the status of pending request of the selected Tx buffer.
Definition: IfxCan_Can.h:960
IfxCan_Node_setMsgId
IFX_INLINE void IfxCan_Node_setMsgId(Ifx_CAN_TXMSG *txBufferElement, uint32 messageId, IfxCan_MessageIdLength messageIdLength)
Sets the identifier (ID) for transmit frame.
Definition: IfxCan.h:2178
IfxCan_RxMode_dedicatedBuffers
Rx dedicated buffers operation.
Definition: IfxCan.h:393
IfxCan_Node_setTxBufferAddRequest
IFX_INLINE void IfxCan_Node_setTxBufferAddRequest(Ifx_CAN_N *node, IfxCan_TxBufferId txBufferId)
Sets the Add Request for the selected Tx buffer.
Definition: IfxCan.h:2364
IfxCan_Node_setTransmitFifoQueueMode
IFX_INLINE void IfxCan_Node_setTransmitFifoQueueMode(Ifx_CAN_N *node, IfxCan_TxMode mode)
Sets Transmit FIFO/Queue Mode.
Definition: IfxCan.h:2345
IfxCan_Can_InterruptConfig::highPriorityMessageEnabled
boolean highPriorityMessageEnabled
High Priority Message Interrupt enable/Disable.
Definition: IfxCan_Can.h:618
IfxCan_MessageIdLength_standard
Standard Message ID.
Definition: IfxCan.h:296
IfxCan_InterruptLine_0
Interrupt Line 0.
Definition: IfxCan.h:260
IfxCan_Message::readFromRxFifo0
boolean readFromRxFifo0
Read message from Rx FIFO 0.
Definition: IfxCan.h:542
IfxCan_Interrupt_protocolErrorArbitration
Protocol Error in Arbitration phase Interrupt.
Definition: IfxCan.h:228
IfxCan_Message::errorStateIndicator
boolean errorStateIndicator
ESI, Error State Indicator (enable / disable)
Definition: IfxCan.h:537
IfxCan_Node_setGroupInterruptLine
void IfxCan_Node_setGroupInterruptLine(Ifx_CAN_N *node, IfxCan_InterruptGroup interruptGroup, IfxCan_InterruptLine interruptLine)
Sets the slected interrupt to the selcted interrupt line.
Definition: IfxCan.c:772
IfxCan_Node_setTxEventFifoCtrl
IFX_INLINE void IfxCan_Node_setTxEventFifoCtrl(Ifx_CAN_TXMSG *txBufferElement, boolean enable)
Sets the Tx Event Fifo Control (EFC) for transmit frame.
Definition: IfxCan.h:2390
IfxCan_Node_setTransmitFifoQueueSize
IFX_INLINE void IfxCan_Node_setTransmitFifoQueueSize(Ifx_CAN_N *node, uint8 number)
Sets Transmit FIFO/Queue Size.
Definition: IfxCan.h:2358
IfxCan_MessageIdLength_extended
Extended Message ID.
Definition: IfxCan.h:297
IfxCan_Can_BaudRate::syncJumpWidth
uint16 syncJumpWidth
Synchronization Jump Width.
Definition: IfxCan_Can.h:566
IfxCan_Interrupt_messageStoredToDedicatedRxBuffer
Message stored to Dedicated Rx Buffer Interrupt.
Definition: IfxCan.h:220
IfxCan_enableModule
void IfxCan_enableModule(Ifx_CAN *can)
Enables the module (clears the disable request)
Definition: IfxCan.c:906
IfxCan_Message::messageIdLength
IfxCan_MessageIdLength messageIdLength
XTD, Message Id length (Standard / Extended)
Definition: IfxCan.h:536
IfxCan_Interrupt_errorLoggingOverflow
Error Logging Overflow Interrupt.
Definition: IfxCan.h:223
IfxCan_Interrupt_rxFifo0NewMessage
Rx FIFO 0 New Message Interrupt.
Definition: IfxCan.h:201
IfxCan_Node_enableLoopbackMode
IFX_INLINE void IfxCan_Node_enableLoopbackMode(Ifx_CAN_N *node)
Enables the internal Virtual CAN bus loopback mode.
Definition: IfxCan.h:1859
IfxCan_TxMode_fifo
Tx FIFO operation.
Definition: IfxCan.h:475
IfxCan_Can_RxConfig::rxFifo0DataFieldSize
IfxCan_DataFieldSize rxFifo0DataFieldSize
Rx FIFO 0 Data Field Size.
Definition: IfxCan_Can.h:672
IfxCan_Interrupt_warningStatus
Warning Status Interrupt.
Definition: IfxCan.h:225
IfxCan_Can_TxConfig::dedicatedTxBuffersNumber
uint8 dedicatedTxBuffersNumber
Number of Dedicated Transmit Buffers.
Definition: IfxCan_Can.h:687
IfxCan_Node_setFrameMode
void IfxCan_Node_setFrameMode(Ifx_CAN_N *node, IfxCan_FrameMode frameMode)
Enables the CAN frame mode for transmission.
Definition: IfxCan.c:710
IfxCan_Can_InterruptConfig::busOffStatusEnabled
boolean busOffStatusEnabled
Bus_Off Status Interrupt enable/Disable.
Definition: IfxCan_Can.h:633
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxCan_Node_getRxFifo1ElementAddress
Ifx_CAN_RXMSG * IfxCan_Node_getRxFifo1ElementAddress(Ifx_CAN_N *node, uint32 ramBaseAddress, uint16 rxFifo1StartAddress, IfxCan_RxBufferId rxBufferNumber)
Returns the address of selected Rx FIFO 1 element.
Definition: IfxCan.c:264
IfxCan_Node_setTxBufferDataFieldSize
IFX_INLINE void IfxCan_Node_setTxBufferDataFieldSize(Ifx_CAN_N *node, IfxCan_DataFieldSize size)
Sets Tx Buffer Data Field Size.
Definition: IfxCan.h:2378
IfxCan_GroupInterruptConfig::typeOfService
IfxSrc_Tos typeOfService
Type of Service.
Definition: IfxCan.h:526
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
float32
float float32
Definition: Platform_Types.h:170
IfxCan_MessageRAM::txEventFifoStartAddress
uint16 txEventFifoStartAddress
Start address of Tx Event FIFO in Message RAM (32-bit w ord address)
Definition: IfxCan.h:556
IfxCan_Message::dataLengthCode
IfxCan_DataLengthCode dataLengthCode
DLC, Data Length Code.
Definition: IfxCan.h:538
IfxCan_Can_InterruptConfig::rxf1f
IfxCan_GroupInterruptConfig rxf1f
Configuration for Receive FIFO1 full interrupts.
Definition: IfxCan_Can.h:646
IfxCan_Can_RxConfig::rxFifo1DataFieldSize
IfxCan_DataFieldSize rxFifo1DataFieldSize
Rx FIFO 1 Data Field Size.
Definition: IfxCan_Can.h:673
IfxCan_InterruptGroup_moer
Module errors.
Definition: IfxCan.h:242
IfxCan_Can_sendMessage
IfxCan_Status IfxCan_Can_sendMessage(IfxCan_Can_Node *node, IfxCan_Message *message, uint32 *data)
Transmits the CAN message.
Definition: IfxCan_Can.c:861
IfxCan_Can_InterruptConfig::rxFifo1WatermarkEnabled
boolean rxFifo1WatermarkEnabled
Rx FIFO 1 Watermark Reached Interrupt enable/Disable.
Definition: IfxCan_Can.h:615
IfxCan_Can_initMessage
void IfxCan_Can_initMessage(IfxCan_Message *message)
Initialises the message frame with defualt values.
Definition: IfxCan_Can.c:53
IfxCan_Node_disableConfigurationChange
IFX_INLINE void IfxCan_Node_disableConfigurationChange(Ifx_CAN_N *node)
Disables the configuration change The CPU has no write access to the protected configuration register...
Definition: IfxCan.h:1784
IfxCan_Can_NodeConfig::fastBaudRate
IfxCan_Can_FastBaudRate fastBaudRate
Structure for fast baudrate.
Definition: IfxCan_Can.h:730
IfxCan_Can_RxConfig::rxFifo0Size
uint8 rxFifo0Size
Rx FIFO 0 Size.
Definition: IfxCan_Can.h:678
IfxCan_Can_InterruptConfig::timestampWraparoundEnabled
boolean timestampWraparoundEnabled
Timestamp Wraparound Interrupt enable/Disable.
Definition: IfxCan_Can.h:626
IfxCan_Node_setRxFifo0Size
IFX_INLINE void IfxCan_Node_setRxFifo0Size(Ifx_CAN_N *node, uint8 size)
Sets Rx FIFO 0 Size.
Definition: IfxCan.h:2240
IfxCan_Node_rejectRemoteFramesWithStandardId
IFX_INLINE void IfxCan_Node_rejectRemoteFramesWithStandardId(Ifx_CAN_N *node)
Reject the remote frames with standard id.
Definition: IfxCan.h:2086
IfxCan_FrameMode_fdLong
CAN FD long frame in transmit and CAN FD long and fast frame in receive.
Definition: IfxCan.h:181
IfxCan_RxMode_sharedFifo0
Rx shared dedicated buffers and Rx FIFO 0 operation.
Definition: IfxCan.h:396
IfxCan_isModuleEnabled
IFX_INLINE boolean IfxCan_isModuleEnabled(Ifx_CAN *can)
Returns the status of module enabled or disabled.
Definition: IfxCan.h:2427
IfxCan_Node_rejectRemoteFramesWithExtendedId
IFX_INLINE void IfxCan_Node_rejectRemoteFramesWithExtendedId(Ifx_CAN_N *node)
Reject the remote frames with extended id.
Definition: IfxCan.h:2080
IfxCan_Interrupt_rxFifo1MessageLost
Rx FIFO 1 Message Lost Interrupt.
Definition: IfxCan.h:208
IfxCan_Interrupt_highPriorityMessage
High Priority Message Interrupt.
Definition: IfxCan.h:209
IfxCan_Node_setExtendedFilterRxBufferOffset
IFX_INLINE void IfxCan_Node_setExtendedFilterRxBufferOffset(Ifx_CAN_EXTMSG *extendedFilterElement, IfxCan_RxBufferId rxBufferNumber)
Sets the Offset to the Rx Buffer Start Address RXBC.RBSA for storage of a matching message for Extend...
Definition: IfxCan.h:2154
IfxCan_Can_InterruptConfig::rxf0f
IfxCan_GroupInterruptConfig rxf0f
Configuration for Receive FIFO0 full interrupts.
Definition: IfxCan_Can.h:647
IfxCan_InterruptGroup_loi
Last Error Interrupts.
Definition: IfxCan.h:245
IfxCan_Node_setErrStateIndicator
IFX_INLINE void IfxCan_Node_setErrStateIndicator(Ifx_CAN_TXMSG *txBufferElement, boolean enable)
Sets the Error State Indicator (ESI) for transmit frame.
Definition: IfxCan.h:2111
IfxCan_Can_Frame::type
IfxCan_FrameType type
Specifies the frame type.
Definition: IfxCan_Can.h:602
IfxCan_TxBufferId_0
Tx buffer 0.
Definition: IfxCan.h:437
IfxCan_Can_NodeConfig::nodeId
IfxCan_NodeId nodeId
Specifies the Node number of the MCan.
Definition: IfxCan_Can.h:726
IfxCan_Node_setTxBuffersStartAddress
IFX_INLINE void IfxCan_Node_setTxBuffersStartAddress(Ifx_CAN_N *node, uint16 address)
Sets the start address of Tx Buffers section in the Message RAM (32-bit word address) ...
Definition: IfxCan.h:2384
IfxCan_Node_setTxEventFifoStartAddress
IFX_INLINE void IfxCan_Node_setTxEventFifoStartAddress(Ifx_CAN_N *node, uint16 address)
Sets Tx Event Fifo Start Address.
Definition: IfxCan.h:2409
IfxCan_Can_RxConfig::rxFifo1WatermarkLevel
uint8 rxFifo1WatermarkLevel
Rx FIFO 1 watermark level.
Definition: IfxCan_Can.h:677
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxCan_Interrupt_watchdog
Watchdog Interrupt.
Definition: IfxCan.h:227
IfxCan_Can_RxConfig::rxBufferDataFieldSize
IfxCan_DataFieldSize rxBufferDataFieldSize
Rx Buffer Data Field Size.
Definition: IfxCan_Can.h:671
IfxCan_Can_InterruptConfig::rxFifo1NewMessageEnabled
boolean rxFifo1NewMessageEnabled
Rx FIFO 1 New Message Interrupt enable/Disable.
Definition: IfxCan_Can.h:614
IfxCan_Interrupt_protocolErrorData
Protocol Error in Data phase Interrupt.
Definition: IfxCan.h:229
IfxCan_Can_FilterConfig::rejectRemoteFramesWithExtendedId
boolean rejectRemoteFramesWithExtendedId
set whether to reject the remote frames with extended id.
Definition: IfxCan_Can.h:593
IfxCan_Can_InterruptConfig::txEventFifoNewEntryEnabled
boolean txEventFifoNewEntryEnabled
Tx Event FIFO New Entry Interrupt enable/Disable.
Definition: IfxCan_Can.h:622
IfxCan_Interrupt_messageRAMAccessFailure
Message RAM Access Failure Interrupt.
Definition: IfxCan.h:218
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxCan_Can_initNodeConfig
void IfxCan_Can_initNodeConfig(IfxCan_Can_NodeConfig *config, IfxCan_Can *can)
Fills the configuration stucture of the Node with default values.
Definition: IfxCan_Can.c:620
IfxCan_Can_InterruptConfig::rxFifo0MessageLostEnabled
boolean rxFifo0MessageLostEnabled
Rx FIFO 0 Message Lost Interrupt enable/Disable.
Definition: IfxCan_Can.h:613
IfxCan_Node_configureExtendedFilterForNonMatchingFrames
IFX_INLINE void IfxCan_Node_configureExtendedFilterForNonMatchingFrames(Ifx_CAN_N *node, IfxCan_NonMatchingFrame filter)
Configure the filter for non matching frames with extended id.
Definition: IfxCan.h:1772
IfxCan_Message::remoteTransmitRequest
boolean remoteTransmitRequest
RTR, Remote Transmit Request (enable / disable)
Definition: IfxCan.h:535
IfxCan_MessageRAM::extendedFilterListStartAddress
uint16 extendedFilterListStartAddress
Start address of Extended Message ID filter list (32-bit word address)
Definition: IfxCan.h:552
IfxCan_InterruptGroup_traco
Interrupts of the transmission control.
Definition: IfxCan.h:253
IfxCan_Can_BaudRate::timeSegment1
uint8 timeSegment1
Time segment before sample point.
Definition: IfxCan_Can.h:568
IfxCan_Interrupt_txEventFifoFull
Tx Event FIFO Full Interrupt.
Definition: IfxCan.h:215
IfxCan_Can_NodeConfig::filterConfig
IfxCan_Can_FilterConfig filterConfig
Structure for Acceptance filter configuration.
Definition: IfxCan_Can.h:732
IfxCan_RxBufferId
IfxCan_RxBufferId
Rx Buffer number.
Definition: IfxCan.h:312
IfxCan_Node_setRxFifo1Size
IFX_INLINE void IfxCan_Node_setRxFifo1Size(Ifx_CAN_N *node, uint8 size)
Sets Rx FIFO 1 Size.
Definition: IfxCan.h:2276
IfxCan_Can_InterruptConfig::rxf1n
IfxCan_GroupInterruptConfig rxf1n
Configuration for Receive FIFO1 new message interrupts.
Definition: IfxCan_Can.h:648
IfxCan_Interrupt_rxFifo1WatermarkReached
Rx FIFO 1 Watermark Reached Interrupt.
Definition: IfxCan.h:206
IfxCan_Message::messageId
uint32 messageId
ID, Identifier.
Definition: IfxCan.h:534
IfxCan_Can_InterruptConfig::warningStatusEnabled
boolean warningStatusEnabled
Warning Status Interrupt enable/Disable.
Definition: IfxCan_Can.h:632
IfxCan_Node_setFastBitTiming
void IfxCan_Node_setFastBitTiming(Ifx_CAN_N *node, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 syncJumpWidth)
Calulates and Sets the CAN fast baudrate for CAN FD frames data phase.
Definition: IfxCan.c:548
IfxCan_Can_setExtendedFilter
void IfxCan_Can_setExtendedFilter(IfxCan_Can_Node *node, IfxCan_Filter *filter)
Sets the Extended Filter element configuration.
Definition: IfxCan_Can.c:921
IfxCan_TxMode_sharedFifo
Tx shared dedicated buffers and Tx FIFO operation.
Definition: IfxCan.h:478
IfxCan_Status_ok
Definition: IfxCan.h:414
IfxCan_Can_NodeConfig::busLoopbackEnabled
boolean busLoopbackEnabled
Internal Virtual CAN bus loopback mode enable / disable choice.
Definition: IfxCan_Can.h:737
IfxCan_RxMode_sharedFifo1
Rx shared dedicated buffers and Rx FIFO 1 operation.
Definition: IfxCan.h:397
IfxCan_Can_InterruptConfig::transmissionCompletedEnabled
boolean transmissionCompletedEnabled
Transmission Completed Interrupt enable/Disable.
Definition: IfxCan_Can.h:619
IfxCan_Node_setExtendedFilterListSize
IFX_INLINE void IfxCan_Node_setExtendedFilterListSize(Ifx_CAN_N *node, uint8 size)
Sets the Extended Message ID filter list size.
Definition: IfxCan.h:2142
IfxCan_Interrupt_transmissionCompleted
Transmission Completed Interrupt.
Definition: IfxCan.h:210
IfxCan_Node_getTxBufferElementAddress
Ifx_CAN_TXMSG * IfxCan_Node_getTxBufferElementAddress(Ifx_CAN_N *node, uint32 ramBaseAddress, uint16 txBuffersStartAddress, IfxCan_TxBufferId txBufferNumber)
Returns the address of selected Tx buffer element.
Definition: IfxCan.c:307
IfxCan_NodeId_0
Node Id 0.
Definition: IfxCan_cfg.h:96
IfxCan_Status_notSentBusy
Definition: IfxCan.h:417
IfxCan_Can_NodeConfig::pins
IFX_CONST IfxCan_Can_Pins * pins
structure for CAN pins
Definition: IfxCan_Can.h:736
IfxCan_Node_setExtendedFilterId1
IFX_INLINE void IfxCan_Node_setExtendedFilterId1(Ifx_CAN_EXTMSG *extendedFilterElement, uint32 id)
Sets the Extended Filter ID 1 for Extended Filter Element.
Definition: IfxCan.h:2130
IfxCan_Node_writeTxBufData
void IfxCan_Node_writeTxBufData(Ifx_CAN_TXMSG *txBufferElement, IfxCan_DataLengthCode dataLengthCode, uint32 *data)
Writes Data into Tx buffer element Node_writeTxBufData.
Definition: IfxCan.c:857
IfxCan_InterruptGroup_boff
Bus Off.
Definition: IfxCan.h:244
IfxCan_InterruptGroup_traq
Transmission Queue Events.
Definition: IfxCan.h:252
IfxCan_Can_readMessage
void IfxCan_Can_readMessage(IfxCan_Can_Node *node, IfxCan_Message *message, uint32 *data)
Reads the CAN received message.
Definition: IfxCan_Can.c:807
IfxCan_Can_InterruptConfig::rxFifo0NewMessageEnabled
boolean rxFifo0NewMessageEnabled
Rx FIFO 0 New Message Interrupt enable/Disable.
Definition: IfxCan_Can.h:610
IfxCan_Can_InterruptConfig::transmissionCancellationFinishedEnabled
boolean transmissionCancellationFinishedEnabled
Transmission Cancellation Finished Interrupt enable/Disable.
Definition: IfxCan_Can.h:620
IfxCan_Node_getRxFifo1GetIndex
IFX_INLINE IfxCan_RxBufferId IfxCan_Node_getRxFifo1GetIndex(Ifx_CAN_N *node)
Returns Rx FIFO 1 get index.
Definition: IfxCan.h:1967
IfxCan_Can_BaudRate::baudrate
uint32 baudrate
Specifies the baud rate. Unit: baud.
Definition: IfxCan_Can.h:564
IfxCan_Can_Node::messageRAM
IfxCan_MessageRAM messageRAM
Structure for Message RAM.
Definition: IfxCan_Can.h:718
IfxCan_Can_InterruptConfig::rxFifo1FullEnabled
boolean rxFifo1FullEnabled
Rx FIFO 1 Full Interrupt enable/Disable.
Definition: IfxCan_Can.h:616
IfxCan_Can_TxConfig::txEventFifoSize
uint8 txEventFifoSize
Transmit Event FIFO Size.
Definition: IfxCan_Can.h:690
IfxCan_InterruptGroup_rxf0f
Receive FIFO0 full interrupt.
Definition: IfxCan.h:248
IfxSrc_Tos_dma
DMA interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:69
IfxCan_Node_readData
void IfxCan_Node_readData(Ifx_CAN_RXMSG *rxBufferElement, IfxCan_DataLengthCode dataLengthCode, uint32 *data)
Reads data from Rx buffer element.
Definition: IfxCan.c:370
IfxCan_Can_TxConfig::txMode
IfxCan_TxMode txMode
Tx FIFO/Queue Mode.
Definition: IfxCan_Can.h:686
IfxCan_Can_InterruptConfig::safe
IfxCan_GroupInterruptConfig safe
Configuration for Safety counter overflow interrupt.
Definition: IfxCan_Can.h:642
IfxCan_Can_InterruptConfig::alrt
IfxCan_GroupInterruptConfig alrt
Configuration for Alerts interrupts.
Definition: IfxCan_Can.h:640
IfxCan_Can_TxConfig::txBufferDataFieldSize
IfxCan_DataFieldSize txBufferDataFieldSize
Tx Buffer Data Field Size.
Definition: IfxCan_Can.h:689
IfxCan_InterruptGroup_reti
Receive timeouts.
Definition: IfxCan.h:251
IfxCan_TxBufferId
IfxCan_TxBufferId
Tx Buffer number.
Definition: IfxCan.h:435
IfxCan_MessageRAM::rxFifo0StartAddress
uint16 rxFifo0StartAddress
Start address of Rx FIFO 0 in Message RAM (32-bit word address)
Definition: IfxCan.h:553
IfxCan_Node_setRxFifo1OperatingMode
IFX_INLINE void IfxCan_Node_setRxFifo1OperatingMode(Ifx_CAN_N *node, IfxCan_RxFifoMode mode)
Sets Rx Buffer Fifo 1 operating mode.
Definition: IfxCan.h:2270
IfxCan_TxMode_dedicatedBuffers
Tx dedicated buffers operation.
Definition: IfxCan.h:477
IfxCan_Interrupt_txEventFifoWatermarkReached
Tx Event FIFO Watermark Reached Interrupt.
Definition: IfxCan.h:214
IfxCan_RxMode_fifo1
Rx FIFO 1 operation.
Definition: IfxCan.h:395
IfxCan_Node_setExtendedFilterId2
IFX_INLINE void IfxCan_Node_setExtendedFilterId2(Ifx_CAN_EXTMSG *extendedFilterElement, uint32 id)
Sets the Extended Filter ID 2 for Extended Filter Element.
Definition: IfxCan.h:2136
IfxCan_Node_setMessageMarker
IFX_INLINE void IfxCan_Node_setMessageMarker(Ifx_CAN_TXMSG *txBufferElement, IfxCan_TxBufferId bufferId)
Sets the Message Marker (MM) for transmit frame.
Definition: IfxCan.h:2172
IfxCan_ClockSelect
IfxCan_ClockSelect
Clock selection option Description in Ifx_CAN.MCR.CLKSELx, (x = 0,1,2)
Definition: IfxCan.h:95
IfxCan_Interrupt_txFifoEmpty
Tx FIFO Empty Interrupt.
Definition: IfxCan.h:212
IfxCan_Interrupt_rxFifo1NewMessage
Rx FIFO 1 New Message Interrupt.
Definition: IfxCan.h:205
IfxCan_Message::txEventFifoControl
boolean txEventFifoControl
EFC, Tx Event FIFO Control (enable / disable)
Definition: IfxCan.h:540
IfxCan_Can_BaudRate::timeSegment2
uint8 timeSegment2
Time segment after sample point.
Definition: IfxCan_Can.h:569
IfxCan_Interrupt_rxFifo1Full
Rx FIFO 1 Full Interrupt.
Definition: IfxCan.h:207
IfxCan_InterruptGroup_rxf0n
Receive FIFO0 new message Interrupt.
Definition: IfxCan.h:250
IfxCan_Can_RxConfig::rxMode
IfxCan_RxMode rxMode
Rx Buffers or FIFO 0 or combination Mode of reception.
Definition: IfxCan_Can.h:670
IfxCan_Can_Pins::txPinMode
IfxPort_OutputMode txPinMode
Specifies the transmit pin output mode IfxPort_OutputMode_pushPull.
Definition: IfxCan_Can.h:660
IfxCan_Can_InterruptConfig::timeoutOccurredEnabled
boolean timeoutOccurredEnabled
Timeout Occurred Interrupt enable/Disable.
Definition: IfxCan_Can.h:628
IfxCan_Interrupt_transmissionCancellationFinished
Transmission Cancellation Finished Interrupt.
Definition: IfxCan.h:211
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:68
IfxCan_Node_clearRxBufferNewDataFlag
void IfxCan_Node_clearRxBufferNewDataFlag(Ifx_CAN_N *node, IfxCan_RxBufferId rxBufferId)
Clears the New Data flag of the selected Rx buffer.
Definition: IfxCan.c:54
IfxCan_Interrupt_errorPassive
Error Passive Interrupt.
Definition: IfxCan.h:224
IfxCan_DataLengthCode_8
8 data bytes
Definition: IfxCan.h:141
IfxCan_Can_FilterConfig::standardFilterForNonMatchingFrames
IfxCan_NonMatchingFrame standardFilterForNonMatchingFrames
action to be taken on the frames with ids, which are not matching with the standard filter...
Definition: IfxCan_Can.h:594
IfxCan_Can_InterruptConfig::txEventFifoFullEnabled
boolean txEventFifoFullEnabled
Tx Event FIFO Full Interrupt enable/Disable.
Definition: IfxCan_Can.h:624
IfxCan_Message::storeInTxFifoQueue
boolean storeInTxFifoQueue
Write message in Tx FIFO/QUEUE.
Definition: IfxCan.h:541
IfxCan_Node_setRxFifo1AcknowledgeIndex
IFX_INLINE void IfxCan_Node_setRxFifo1AcknowledgeIndex(Ifx_CAN_N *node, IfxCan_RxBufferId RxBufferNumber)
Sets Rx FIFO 1 Acknowledge Index.
Definition: IfxCan.h:2258
IfxCan_Can_RxConfig::rxFifo1OperatingMode
IfxCan_RxFifoMode rxFifo1OperatingMode
Rx FIFO 1 operating mode.
Definition: IfxCan_Can.h:675
IfxCan_Node_setDataLength
IFX_INLINE void IfxCan_Node_setDataLength(Ifx_CAN_TXMSG *txBufferElement, IfxCan_DataLengthCode dataLengthCode)
Sets the Data Length Code (DLC) for transmit frame.
Definition: IfxCan.h:2092
IfxCan_Can_NodeConfig::baudRate
IfxCan_Can_BaudRate baudRate
Structure for nominal baudrate.
Definition: IfxCan_Can.h:729
IfxCan_Can_InterruptConfig::errorPassiveEnabled
boolean errorPassiveEnabled
Error Passive Interrupt enable/Disable.
Definition: IfxCan_Can.h:631
IfxCan_Node_setExtendedFilterType
IFX_INLINE void IfxCan_Node_setExtendedFilterType(Ifx_CAN_EXTMSG *extendedFilterElement, IfxCan_FilterType filterType)
Sets the Extended Filter Type for Extended Filter Element.
Definition: IfxCan.h:2160
IfxCan_Node_initRxPin
boolean IfxCan_Node_initRxPin(Ifx_CAN_N *node, IfxCan_Rxd_In *rxd, IfxPort_InputMode mode, IfxPort_PadDriver padDriver)
Select and initialise the CAN node receive pin.
Definition: IfxCan.c:331
IfxCan_Can.h
CAN CAN details.
IfxCan_Can_BaudRate::samplePoint
uint16 samplePoint
Specifies the baud rate. Unit: baud.
Definition: IfxCan_Can.h:565
IfxCan_Can_RxConfig::rxFifo1Size
uint8 rxFifo1Size
Rx FIFO 1 Size.
Definition: IfxCan_Can.h:679
IfxCan_Node_getFrameMode
IfxCan_FrameMode IfxCan_Node_getFrameMode(Ifx_CAN_RXMSG *rxBufferElement)
Returns CAN frame mode of operation for a received frame.
Definition: IfxCan.c:125
IfxCan_Node_setStandardFilterConfiguration
IFX_INLINE void IfxCan_Node_setStandardFilterConfiguration(Ifx_CAN_STDMSG *standardFilterElement, IfxCan_FilterElementConfiguration filterElementConfiguration)
Sets the Standard Filter Element Configuration.
Definition: IfxCan.h:2294
IfxCan_Message
Structure for CAN Message configuration (transmit/receive)
Definition: IfxCan.h:531
IfxCan_Node_setExtendedFilterListStartAddress
IFX_INLINE void IfxCan_Node_setExtendedFilterListStartAddress(Ifx_CAN_N *node, uint16 address)
Sets the start address of Extended Message ID filter list (32-bit word address)
Definition: IfxCan.h:2148
IfxCan_Node_setRxFifo0OperatingMode
IFX_INLINE void IfxCan_Node_setRxFifo0OperatingMode(Ifx_CAN_N *node, IfxCan_RxFifoMode mode)
Sets Rx Buffer Fifo 0 operating mode.
Definition: IfxCan.h:2234
IfxCan_Can_InterruptConfig::errorLoggingOverflowEnabled
boolean errorLoggingOverflowEnabled
Error Logging Overflow Interrupt enable/Disable.
Definition: IfxCan_Can.h:630
IfxCan_Message::readFromRxFifo1
boolean readFromRxFifo1
Read message from Rx FIFO 1.
Definition: IfxCan.h:543
IfxCan_Can_InterruptConfig::txEventFifoEventLostEnabled
boolean txEventFifoEventLostEnabled
Tx Event FIFO Event Lost Interrupt enable/Disable.
Definition: IfxCan_Can.h:625
IfxCan_Can_FastBaudRate::tranceiverDelayOffset
uint8 tranceiverDelayOffset
transceiver delay compensation offset
Definition: IfxCan_Can.h:582
IfxCan_TxMode_sharedQueue
Tx shared dedicated buffers and Tx Queue operation.
Definition: IfxCan.h:479
IfxCan_Can_RxConfig::rxFifo0OperatingMode
IfxCan_RxFifoMode rxFifo0OperatingMode
Rx FIFO 0 operating mode.
Definition: IfxCan_Can.h:674
IfxCan_Node_setRxFifo1WatermarkLevel
IFX_INLINE void IfxCan_Node_setRxFifo1WatermarkLevel(Ifx_CAN_N *node, uint8 level)
Sets Rx FIFO 1 Watermark Level.
Definition: IfxCan.h:2288
IfxCan_Node_setStandardFilterId2
IFX_INLINE void IfxCan_Node_setStandardFilterId2(Ifx_CAN_STDMSG *standardFilterElement, uint32 id)
Sets the Standard Filter ID 2 for Standard Filter Element.
Definition: IfxCan.h:2306
IfxCan_Node_setRxFifo0DataFieldSize
IFX_INLINE void IfxCan_Node_setRxFifo0DataFieldSize(Ifx_CAN_N *node, IfxCan_DataFieldSize size)
Sets Rx Buffer Fifo 0 Data Field Size.
Definition: IfxCan.h:2228
IfxCan_MessageRAM::standardFilterListStartAddress
uint16 standardFilterListStartAddress
Start address of Standard Message ID filter list (32-bit word address)
Definition: IfxCan.h:551
IfxCan_MessageRAM::rxBuffersStartAddress
uint16 rxBuffersStartAddress
Start address of Rx Buffers section in the Message RAM (32-bit word address).
Definition: IfxCan.h:555
IfxCan_Can_InterruptConfig::loi
IfxCan_GroupInterruptConfig loi
Configuration for Last Error interrupts.
Definition: IfxCan_Can.h:644
IfxCan_FrameMode_fdLongAndFast
CAN FD long and fast frames (transmit and receive)
Definition: IfxCan.h:182
IfxCan_Can_Node
Node handle.
Definition: IfxCan_Can.h:713
IfxCan_Can_Pins::rxPin
IfxCan_Rxd_In * rxPin
Specifies the receive pin.
Definition: IfxCan_Can.h:661
IfxCan_Can_FilterConfig::messageIdLength
IfxCan_MessageIdLength messageIdLength
Message Id length (Standard / Extended)
Definition: IfxCan_Can.h:589
IfxCan_Can_InterruptConfig::protocolErrorDataEnabled
boolean protocolErrorDataEnabled
Protocol Error in Data phase Interrupt enable/Disable.
Definition: IfxCan_Can.h:636
IfxCan_Can_InterruptConfig::reint
IfxCan_GroupInterruptConfig reint
Configuration for iMessage stored in dedicated receive buffer interrupts.
Definition: IfxCan_Can.h:645
IfxCan_InterruptGroup_safe
Safety counter overflow.
Definition: IfxCan.h:243
IfxCan_GroupInterruptConfig::priority
Ifx_Priority priority
Priority of the interrupt.
Definition: IfxCan.h:525
IfxCan_Node_setRxBuffersStartAddress
IFX_INLINE void IfxCan_Node_setRxBuffersStartAddress(Ifx_CAN_N *node, uint16 address)
Sets the start address of Rx Buffers section in the Message RAM (32-bit word address) ...
Definition: IfxCan.h:2216
IfxCan_FrameType_transmitAndReceive
for both transmit and receive frames
Definition: IfxCan.h:191
IfxCan_Can_FilterConfig::extendedFilterForNonMatchingFrames
IfxCan_NonMatchingFrame extendedFilterForNonMatchingFrames
action to be taken on the frames with ids, which are not matching with the extended filter...
Definition: IfxCan_Can.h:595
IfxCan_InterruptGroup_wati
Watermark interrupts are mapped here.
Definition: IfxCan.h:240
IfxCan_Interrupt_timestampWraparound
Timestamp Wraparound Interrupt.
Definition: IfxCan.h:217
IfxCan_Filter::id2
uint32 id2
*FID2 Second ID of (standard / extended ID) filter element
Definition: IfxCan.h:516
IfxCan_FrameType_remoteRequest
Remote request frame is generated.
Definition: IfxCan.h:192
IfxCan_Filter::rxBufferOffset
IfxCan_RxBufferId rxBufferOffset
Rx Buffer number to set the offset to the Rx Buffer Start Address.
Definition: IfxCan.h:517
IfxCan_Can_Frame::mode
IfxCan_FrameMode mode
Specifies the frame mode.
Definition: IfxCan_Can.h:603
IfxCan_Can_InterruptConfig::protocolErrorArbitrationEnabled
boolean protocolErrorArbitrationEnabled
Protocol Error in Arbitration phase Interrupt enable/Disable.
Definition: IfxCan_Can.h:635
IfxCan_MessageIdLength_both
Both Standard and Extended message IDs.
Definition: IfxCan.h:298
IfxCan_Can_InterruptConfig::messageRAMAccessFailureEnabled
boolean messageRAMAccessFailureEnabled
Message RAM Access Failure Interrupt enable/Disable.
Definition: IfxCan_Can.h:627
IfxCan_Can_InterruptConfig::boff
IfxCan_GroupInterruptConfig boff
Configuration for Bus Off interrupt.
Definition: IfxCan_Can.h:643
IfxCan_Interrupt_txEventFifoNewEntry
Tx Event FIFO New Entry Interrupt.
Definition: IfxCan.h:213
IfxCan_GroupInterruptConfig::interruptLine
IfxCan_InterruptLine interruptLine
Intterupt line to which this interruipt has to be connetced to.
Definition: IfxCan.h:524
IfxCan_RxFifoMode_blocking
Blocking mode.
Definition: IfxCan.h:385
IfxCan_InterruptGroup_alrt
Alerts.
Definition: IfxCan.h:241
IfxCan_Node_setRxFifo0AcknowledgeIndex
IFX_INLINE void IfxCan_Node_setRxFifo0AcknowledgeIndex(Ifx_CAN_N *node, IfxCan_RxBufferId RxBufferNumber)
Sets Rx FIFO 0 Acknowledge Index.
Definition: IfxCan.h:2222
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxCan_Can_Config
Configuration Structure of the Module.
Definition: IfxCan_Can.h:706
IfxCan_RxMode_fifo0
Rx FIFO 0 operation.
Definition: IfxCan.h:394
IfxCan_Can_InterruptConfig::hpe
IfxCan_GroupInterruptConfig hpe
Configuration for High Priority Events interrupts.
Definition: IfxCan_Can.h:638
IfxCan_FrameType_remoteAnswer
Answer frame is generated on reception of the corresponding remote request.
Definition: IfxCan.h:193
IfxCan_Filter::type
IfxCan_FilterType type
*FT, Filter Type of (standard / extended ID) filter element
Definition: IfxCan.h:514
IfxCan_MessageRAM::rxFifo1StartAddress
uint16 rxFifo1StartAddress
Start address of Rx FIFO 1 in Message RAM (32-bit word address)
Definition: IfxCan.h:554
IfxCan_Can_NodeConfig::calculateBitTimingValues
boolean calculateBitTimingValues
Enable / Disable auto calculation of bit timing values for selected CAN node.
Definition: IfxCan_Can.h:738
IfxCan_Node_setRxFifo1StartAddress
IFX_INLINE void IfxCan_Node_setRxFifo1StartAddress(Ifx_CAN_N *node, uint16 address)
Sets the start address of Rx FIFO 1 section in the Message RAM (32-bit word address) ...
Definition: IfxCan.h:2282
IfxCan_FrameType_transmit
Data frame is generated.
Definition: IfxCan.h:190
IfxCan_Can_InterruptConfig::moer
IfxCan_GroupInterruptConfig moer
Configuration for Module errors interrupts.
Definition: IfxCan_Can.h:641
IfxCan_ClockSource_both
Both clock sources are switched on.
Definition: IfxCan.h:111
IfxCan_Can_InterruptConfig::traco
IfxCan_GroupInterruptConfig traco
Configuration for interrupts of the transmission control.
Definition: IfxCan_Can.h:652
IfxCan_Node_getMesssageId
IFX_INLINE uint32 IfxCan_Node_getMesssageId(Ifx_CAN_RXMSG *rxBufferElement)
Returns the identifier (ID) from the received frame.
Definition: IfxCan.h:1923
IfxCan_Node_enableInterrupt
IFX_INLINE void IfxCan_Node_enableInterrupt(Ifx_CAN_N *node, IfxCan_Interrupt interrupt)
Enables the selected interrupt.
Definition: IfxCan.h:1852
IfxCan_Can_Pins::rxPinMode
IfxPort_InputMode rxPinMode
Specifies the receive pin as input mode IfxPort_InputMode_noPullDevice.
Definition: IfxCan_Can.h:662
IfxCan_Can_NodeConfig::frame
IfxCan_Can_Frame frame
Structure for Frame Configuration.
Definition: IfxCan_Can.h:728
IfxCan_Node_setStandardFilterRxBufferOffset
IFX_INLINE void IfxCan_Node_setStandardFilterRxBufferOffset(Ifx_CAN_STDMSG *standardFilterElement, IfxCan_RxBufferId rxBufferNumber)
Sets the Offset to the Rx Buffer Start Address RXBC.RBSA for storage of a matching message for standa...
Definition: IfxCan.h:2324
IfxCan_Node_setDedicatedTxBuffersNumber
IFX_INLINE void IfxCan_Node_setDedicatedTxBuffersNumber(Ifx_CAN_N *node, uint8 number)
Sets the number of dedicated Tx Buffers.
Definition: IfxCan.h:2105
IfxCan_InterruptGroup_rxf1f
Receive FIFO1 full interrupt.
Definition: IfxCan.h:247
IfxCan_Can_FilterConfig::standardListSize
uint8 standardListSize
List Size Standard.
Definition: IfxCan_Can.h:590
IfxCan_NonMatchingFrame_acceptToRxFifo0
Accept the non matching messages into Rx FIFO 0.
Definition: IfxCan.h:305
IfxCan_Status
IfxCan_Status
CAN API status definition.
Definition: IfxCan.h:412
IfxCan_FrameType_receive
Data frame is received.
Definition: IfxCan.h:189
IfxCan_DataLengthCode
IfxCan_DataLengthCode
Data Length code of the Message.
Definition: IfxCan.h:131
IfxCan_Can_Node::node
Ifx_CAN_N * node
Specifies the pointer to the CAN Node registers.
Definition: IfxCan_Can.h:716
IfxCan_Node_setFrameModeReq
void IfxCan_Node_setFrameModeReq(Ifx_CAN_TXMSG *txBufferElement, IfxCan_FrameMode frameMode)
Sets CAN frame mode request for transmission.
Definition: IfxCan.c:730
IfxCan_Node_setRxBufferDataFieldSize
IFX_INLINE void IfxCan_Node_setRxBufferDataFieldSize(Ifx_CAN_N *node, IfxCan_DataFieldSize size)
Sets Rx Buffer Data Field Size.
Definition: IfxCan.h:2210
IfxCan_Node_getRxFifo0ElementAddress
Ifx_CAN_RXMSG * IfxCan_Node_getRxFifo0ElementAddress(Ifx_CAN_N *node, uint32 ramBaseAddress, uint16 rxFifo0StartAddress, IfxCan_RxBufferId rxBufferNumber)
Returns the address of selected Rx FIFO 0 element.
Definition: IfxCan.c:232
IfxCan_Node_enableTxBufferTransmissionInterrupt
IFX_INLINE void IfxCan_Node_enableTxBufferTransmissionInterrupt(Ifx_CAN_N *node, IfxCan_TxBufferId txBufferId)
Enables the Transmission Interrupt of the selected Tx buffer.
Definition: IfxCan.h:1872
IfxCan_Can_Pins::padDriver
IfxPort_PadDriver padDriver
Pad driver IfxPort_PadDriver_cmosAutomotiveSpeed2.
Definition: IfxCan_Can.h:663
IfxCan_Node_setRxFifo0WatermarkLevel
IFX_INLINE void IfxCan_Node_setRxFifo0WatermarkLevel(Ifx_CAN_N *node, uint8 level)
Sets Rx FIFO 0 Watermark Level.
Definition: IfxCan.h:2252
IfxCan_Node_setTransceiverDelayCompensationOffset
IFX_INLINE void IfxCan_Node_setTransceiverDelayCompensationOffset(Ifx_CAN_N *node, uint8 delay)
Sets Transceiver Delay Compensation offset.
Definition: IfxCan.h:2336
IfxCan_Interrupt_busOffStatus
Bus_Off Status Interrupt.
Definition: IfxCan.h:226
IfxCan_Node_configureStandardFilterForNonMatchingFrames
IFX_INLINE void IfxCan_Node_configureStandardFilterForNonMatchingFrames(Ifx_CAN_N *node, IfxCan_NonMatchingFrame filter)
Configure the filter for non matching frames with standard id.
Definition: IfxCan.h:1778
IfxCan_Can_TxConfig::txFifoQueueSize
uint8 txFifoQueueSize
Transmit FIFO/Queue Size.
Definition: IfxCan_Can.h:688
IfxCan_getModuleFrequency
float32 IfxCan_getModuleFrequency(void)
Returns the operatinf frequency of the CAN module.
Definition: IfxCan.c:959
IfxCan_RxMode_sharedAll
Rx shared dedicated buffers and Rx FIFO 0 and Rx FIFO 1 operation.
Definition: IfxCan.h:398
IfxCan_Node_setFastBitTimingValues
void IfxCan_Node_setFastBitTimingValues(Ifx_CAN_N *node, uint16 syncJumpWidth, uint8 timeSegment2, uint8 timeSegment1, uint16 prescaler)
Sets the values of CAN fast baudrate for CAN FD frames data phase.
Definition: IfxCan.c:697
IfxCan_Can_initModule
void IfxCan_Can_initModule(IfxCan_Can *can, IfxCan_Can_Config *config)
Initialises the CAN Module.
Definition: IfxCan_Can.c:74
IfxCan_Can_FilterConfig::extendedListSize
uint8 extendedListSize
List Size Extended.
Definition: IfxCan_Can.h:591
IfxCan_Can_InterruptConfig::messageStoredToDedicatedRxBufferEnabled
boolean messageStoredToDedicatedRxBufferEnabled
Message stored to Dedicated Rx Buffer Interrupt enable/Disable.
Definition: IfxCan_Can.h:629
IfxCan_getSrcPointer
volatile Ifx_SRC_SRCR * IfxCan_getSrcPointer(Ifx_CAN *can, IfxCan_InterruptLine interruptLine)
Returns the address of interrupt node source register.
Definition: IfxCan.c:969
IfxCan_Can_NodeConfig::interruptConfig
IfxCan_Can_InterruptConfig interruptConfig
Structure for Interrupt configuration.
Definition: IfxCan_Can.h:735
IfxCan_Node_setBitTimingValues
void IfxCan_Node_setBitTimingValues(Ifx_CAN_N *node, uint16 syncJumpWidth, uint8 timeSegment2, uint8 timeSegment1, uint16 prescaler)
Sets the values of CAN baudrate for standard frames.
Definition: IfxCan.c:535
IfxCan_Can_InterruptConfig::txEventFifoWatermarkEnabled
boolean txEventFifoWatermarkEnabled
Tx Event FIFO Watermark Reached Interrupt enable/Disable.
Definition: IfxCan_Can.h:623
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxCan_Filter::number
uint8 number
Filter Number.
Definition: IfxCan.h:512
IfxCan_getNodePointer
IFX_INLINE Ifx_CAN_N * IfxCan_getNodePointer(Ifx_CAN *can, IfxCan_NodeId nodeId)
Returns the base adress of the selected Node of CAN module.
Definition: IfxCan.h:2421
IfxCan_Can_InterruptConfig::wati
IfxCan_GroupInterruptConfig wati
Configuration for Watermark interrupts.
Definition: IfxCan_Can.h:639
IfxCan_Node_setStandardFilterId1
IFX_INLINE void IfxCan_Node_setStandardFilterId1(Ifx_CAN_STDMSG *standardFilterElement, uint32 id)
Sets the Standard Filter ID 1 for Standard Filter Element.
Definition: IfxCan.h:2300
IfxCan_Can_NodeConfig::txConfig
IfxCan_Can_TxConfig txConfig
Structure for Tx handle Configuration.
Definition: IfxCan_Can.h:731
IfxCan_Filter
tructure for Filter configuration
Definition: IfxCan.h:510
IfxCan_Interrupt_rxFifo0WatermarkReached
Rx FIFO 0 Watermark Reached Interrupt.
Definition: IfxCan.h:202
IfxCan_DataFieldSize_8
8 byte data field
Definition: IfxCan.h:119
IfxCan_Can_Pins::txPin
IfxCan_Txd_Out * txPin
Specifies the transmit pin.
Definition: IfxCan_Can.h:659
IfxCan_InterruptGroup_reint
Message stored in dedicated receive buffer interrupt (IR.DRX)
Definition: IfxCan.h:246
IfxCan_Can_InterruptConfig::rxFifo1MessageLostEnabled
boolean rxFifo1MessageLostEnabled
Rx FIFO 1 Message Lost Interrupt enable/Disable.
Definition: IfxCan_Can.h:617
IfxCan_Node_setExtendedFilterConfiguration
IFX_INLINE void IfxCan_Node_setExtendedFilterConfiguration(Ifx_CAN_EXTMSG *extendedFilterElement, IfxCan_FilterElementConfiguration filterElementConfiguration)
Sets the Extended Filter Element Configuration.
Definition: IfxCan.h:2124
IfxCan_Node_setTxEventFifoSize
IFX_INLINE void IfxCan_Node_setTxEventFifoSize(Ifx_CAN_N *node, uint8 size)
Sets Tx Event Fifo Size.
Definition: IfxCan.h:2403
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxCan_Can_InterruptConfig::rxf0n
IfxCan_GroupInterruptConfig rxf0n
Configuration for Receive FIFO0 new message interrupts.
Definition: IfxCan_Can.h:649
IfxCan_InterruptGroup_rxf1n
Receive FIFO1 new message Interrupt.
Definition: IfxCan.h:249
IfxCan_Can_initModuleConfig
void IfxCan_Can_initModuleConfig(IfxCan_Can_Config *config, Ifx_CAN *can)
Fills the configuration stucture of the CAN Module with default values.
Definition: IfxCan_Can.c:87
IfxCan_Message::frameMode
IfxCan_FrameMode frameMode
CAN frame mode.
Definition: IfxCan.h:539
IfxCan_Interrupt_txEventFifoEventLost
Tx Event FIFO Event Lost Interrupt.
Definition: IfxCan.h:216
IfxCan_RxBufferId_0
Rx buffer 0.
Definition: IfxCan.h:314
IfxCan_Can_NodeConfig::rxConfig
IfxCan_Can_RxConfig rxConfig
Structure for Rx handle Configuration.
Definition: IfxCan_Can.h:733
IfxCan_Can_InterruptConfig::txFifoEmptyEnabled
boolean txFifoEmptyEnabled
Tx FIFO Empty Interrupt enable/Disable.
Definition: IfxCan_Can.h:621
IfxCan_Can_setStandardFilter
void IfxCan_Can_setStandardFilter(IfxCan_Can_Node *node, IfxCan_Filter *filter)
Sets the Standard Filter element configuration.
Definition: IfxCan_Can.c:947
IfxCan_setClockSource
void IfxCan_setClockSource(Ifx_CAN *can, IfxCan_ClockSelect clockSelect, IfxCan_ClockSource clockSource)
sets the clocksource selection
Definition: IfxCan.c:1000
IfxCan_TxMode_queue
Tx Queue operation.
Definition: IfxCan.h:476
IfxCan_Message::bufferNumber
uint8 bufferNumber
(Tx / Rx) Buffer Element number
Definition: IfxCan.h:533
IfxCan_Node_setStandardFilterType
IFX_INLINE void IfxCan_Node_setStandardFilterType(Ifx_CAN_STDMSG *standardFilterElement, IfxCan_FilterType filterType)
Sets the Standard Filter Type for Standard Filter Element.
Definition: IfxCan.h:2330
IfxCan_Filter::id1
uint32 id1
*FID1 First ID of (standard / extended ID) filter element
Definition: IfxCan.h:515
IfxCan_Node_getTxFifoQueuePutIndex
IFX_INLINE IfxCan_TxBufferId IfxCan_Node_getTxFifoQueuePutIndex(Ifx_CAN_N *node)
Returns Tx FIFO/Queue Put Index.
Definition: IfxCan.h:2021
IfxCan_Can_NodeConfig
Configuration Structure of the Node.
Definition: IfxCan_Can.h:723


iLLD_TC38A: IfxCan_Can.h Source File

  • Can
  • Can
IfxCan_Can.h
Go to the documentation of this file.
1 /**
2 * \file IfxCan_Can.h
3 * \brief CAN CAN details
4 * \ingroup IfxLld_Can
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 * \defgroup IfxLld_Can_Can_Usage How to use the CAN Interface driver?
43 * \ingroup IfxLld_Can
44 *
45 * The CAN interface driver provides a default configuration for various modes.
46 *
47 * In the following sections it will be described, how to integrate the driver into the application framework.
48 *
49 * \section IfxLld_Can_Can_Preparation Preparation
50 * \subsection IfxLld_Can_Can_Include Include Files
51 *
52 * Include following header file into your C code:
53 * \code
54 * #include <Can/Can/IfxCan_Can.h>
55 * \endcode
56 *
57 * \subsection IfxLld_Can_Can_Variables Variables
58 *
59 * Declare the CAN handles as global variables in your C code:
60 * \code
61 *
62 * #define TESTED_NODES 2
63 * #define NODE0_RAM_OFFSET 0x0
64 * #define NODE1_RAM_OFFSET 0x1000
65 *
66 * // CAN handle
67 * IfxCan_Can can;
68 *
69 * // CAN Node handles
70 * IfxCan_Can_Node canNode[TESTED_NODES];
71 *
72 * // data buffers
73 * uint32 txData[2];
74 * uint32 rxData[2];
75 *
76 * \endcode
77 *
78 * \subsection IfxLld_Can_Can_Init Module Initialisation
79 *
80 * The module initialisation can be done as followed:
81 * \code
82 * // create module configuration
83 * IfxCan_Can_Config canConfig;
84 * IfxCan_Can_initModuleConfig(&canConfig, &MODULE_CAN0);
85 *
86 * // choose the interrupt groups configuration
87 * // Tx interrupts
88 * canConfig.traco.priority = 10;
89 * canConfig.traco.typeOfService = IfxSrc_Tos_cpu0;
90 * canConfig.traco.interruptLine = IfxCan_InterruptLine_0;
91 *
92 * // Rx interrupts
93 * canConfig.reint.priority = 11;
94 * canConfig.reint.typeOfService = IfxSrc_Tos_cpu0;
95 * canConfig.reint.interruptLine = IfxCan_InterruptLine_1;
96 *
97 * // initialize module
98 * // IfxCan_Can can; // defined globally
99 * IfxCan_Can_initModule(&can, &canConfig);
100 * \endcode
101 *
102 * Note: Application should explicitly configure the system DMA, if system DMA is selected as the service provider for the interrupt.
103 *
104 * \subsection IfxLld_Can_Can_Init_Node Node Initialisation
105 *
106 * The Node initialisation can be done as followed:
107 * \code
108 * // create node configuration
109 *
110 * // Node 0 as receive node
111 * {
112 * IfxCan_Can_NodeConfig nodeConfig;
113 * IfxCan_Can_initNodeConfig(&nodeConfig, &can);
114 *
115 * // initialize Node 0
116 * nodeConfig.nodeId = IfxCan_NodeId_0;
117 * nodeConfig.clockSource = IfxCan_ClockSource_both;
118 *
119 * nodeConfig.frame.type = IfxCan_FrameType_receive;
120 *
121 * nodeConfig.filterConfig.standardListSize = 2;
122 *
123 * nodeConfig.messageRAM.standardFilterListStartAddress = 0x100;
124 * nodeConfig.messageRAM.rxBuffersStartAddress = 0x200;
125 * nodeConfig.messageRAM.baseAddress = MODULE_CAN0_RAM + NODE0_RAM_OFFSET;
126 *
127 * // enable the required interrupts with respective to group interrupts configuration at module level
128 * nodeConfig.interruptConfig.messageStoredToDedicatedRxBufferEnabled = TRUE;
129 *
130 * // initialize Node 0
131 * IfxCan_Can_initNode(&canNode[0], &nodeConfig);
132 * }
133 *
134 * // Node 1 as transmit node
135 * {
136 * IfxCan_Can_NodeConfig nodeConfig;
137 * IfxCan_Can_initNodeConfig(&nodeConfig, &can);
138 *
139 * nodeConfig.nodeId = IfxCan_NodeId_1;
140 * nodeConfig.clockSource = IfxCan_ClockSource_both;
141 *
142 * nodeConfig.frame.type = IfxCan_FrameType_transmit;
143 *
144 * nodeConfig.txConfig.dedicatedTxBuffersNumber = 2;
145 *
146 * nodeConfig.messageRAM.txBuffersStartAddress = 0x400;
147 * nodeConfig.messageRAM.baseAddress = MODULE_CAN0_RAM + NODE1_RAM_OFFSET;
148 *
149 * // enable the required interrupts with respective to group interrupts configuration at module level
150 * nodeConfig.interruptConfig.transmissionCompletedEnabled = TRUE;
151 *
152 * // initialize Node 1;
153 * IfxCan_Can_initNode(&canNode[1], &nodeConfig);
154 * }
155 * \endcode
156 *
157 * \subsection IfxLld_Can_Can_filter Filter Initialisation
158 *
159 * The filters can be set as following, number of filters can be chosen from nodeConfig.filterConfig.standardListSize or nodeConfig.filterConfig.extendedListSize\n
160 * based on the type of filter in the receive node configuration
161 *
162 * \code
163 * // set filters
164 *
165 * // set filter for Rx Buffer 0
166 * {
167 * // Initialize the filter structure
168 * IfxCan_Filter filter;
169 *
170 * filter.number = 0;
171 * filter.elementConfiguration = IfxCan_FilterElementConfiguration_storeInRxBuffer;
172 * filter.id1 = 0x00;
173 * filter.rxBufferOffset = IfxCan_RxBufferId_0;
174 *
175 * IfxCan_Can_setStandardFilter(&canNode[0], &filter);
176 * }
177 *
178 * // set filter for rxBuffer 1
179 * {
180 * IfxCan_Filter filter;
181 *
182 * filter.number = 1;
183 * filter.elementConfiguration = IfxCan_FilterElementConfiguration_storeInRxBuffer;
184 * filter.id1 = 0x7ff;
185 * filter.rxBufferOffset = IfxCan_RxBufferId_1;
186 *
187 * IfxCan_Can_setStandardFilter(&canNode[0], &filter);
188 * }
189 * \endcode
190 *
191 * \subsection IfxLld_Can_Can_Synch Nodes Synchronization
192 * wait until the Node (M_CAN) is synchronised
193 *
194 * \code
195 * while (IfxCan_Can_isNodeSynchronized(&canNode[0]) != TRUE);
196 * while (IfxCan_Can_isNodeSynchronized(&canNode[1]) != TRUE);
197 * \endcode
198 *
199 * The CAN is ready for use now!
200 *
201 * \section IfxLld_Can_Can_StandardDataTransfers Standard Data Transfers
202 *
203 * The CAN driver provides simple to use transfer functions
204 *
205 * Data can be sent by the following way:
206 * \code
207 *
208 * //data that needs to be transmitted
209 * txData[0] = 0xC0CAC01A;
210 * txData[1] = 0xBA5EBA11;
211 *
212 * // Initialise the message strcture with defualt values
213 * IfxCan_Message txMsg;
214 * IfxCan_Can_initMessage(&txMsg);
215 *
216 * // change the relevent members of message structure
217 * txMsg.bufferNumber = 0;
218 * txMsg.messageId = 0x0;
219 *
220 * // Transmit Data
221 * while( IfxCan_Can_sendMessage(&canNode[1], &txMsg, txData) == IfxCan_Status_notSentBusy );
222 * \endcode
223 *
224 * Data can be received by the following way:
225 * \code
226 * // Receiving Data
227 *
228 * // will be replaced by the received values
229 * rxData[0] = 0xdeadbeef;
230 * rxData[1] = 0xdeadbeef;
231 *
232 * // Initialise the message structure with default values, will be replaced by the received values
233 * IfxCan_Message rxMsg;
234 * IfxCan_Can_initMessage(&rxMsg);
235 *
236 * // specify the rx buffer number where the data will be received based on the filter configuration
237 * rxMsg.bufferNumber = 0;
238 *
239 * // wait until node receives the data
240 * while ((IfxCan_Can_isNewDataReceived(&canNode[0], (IfxCan_RxBufferId)rxMsg.bufferNumber)) == 0)
241 * { }
242 *
243 * // read message
244 * IfxCan_Can_readMessage(&canNode[0], &rxMsg, rxData);
245 *
246 * // data is now available at rxData[0] and rxData[1]
247 * \endcode
248 *
249 * \section IfxLld_Can_Can_FDTransfers FD Transfers
250 *
251 * CAN driver supports FD transfers both long frame trasfers and long & fast frame transfers,
252 * FD transfers has to be selected in the node initialisation phase
253 *
254 * define data buffers globally
255 *
256 * \code
257 * uint32 txData[16];
258 * uint32 rxData[16];
259 * \endcode
260 *
261 * FD initialisation can be done as followed at node level after initialising the module
262 * please refer to Module Initialisation subsection previously
263 *
264 * \code
265 * // create node configuration
266 *
267 * // Node 0 as receive node
268 * {
269 * IfxCan_Can_NodeConfig nodeConfig;
270 * IfxCan_Can_initNodeConfig(&nodeConfig, &can);
271 *
272 * // initialize Node 0
273 * nodeConfig.nodeId = IfxCan_NodeId_0;
274 * nodeConfig.clockSource = IfxCan_ClockSource_both;
275 *
276 * nodeConfig.frame.type = IfxCan_FrameType_receive;
277 * nodeConfig.frame.mode = IfxCan_FrameMode_fdLong; // incase of long and fast frames choose IfxCan_FrameMode_fdLongAndFast
278 *
279 * nodeConfig.rxConfig.rxBufferDataFieldSize = IfxCan_DataFieldSize_64; // choose the data field size to allocate rx elements in th emessage RAM
280 * // this is not the data length (DLC) of the message
281 *
282 * nodeConfig.filterConfig.standardListSize = 2;
283 *
284 * nodeConfig.messageRAM.standardFilterListStartAddress = 0x100;
285 * nodeConfig.messageRAM.rxBuffersStartAddress = 0x200;
286 * nodeConfig.messageRAM.baseAddress = MODULE_CAN0_RAM + NODE0_RAM_OFFSET;
287 *
288 * // initialize Node 0
289 * IfxCan_Can_initNode(&canNode[0], &nodeConfig);
290 * }
291 *
292 * // Node 1 as transmit node
293 * {
294 * IfxCan_Can_NodeConfig nodeConfig;
295 * IfxCan_Can_initNodeConfig(&nodeConfig, &can);
296 *
297 * nodeConfig.nodeId = IfxCan_NodeId_1;
298 * nodeConfig.clockSource = IfxCan_ClockSource_both;
299 *
300 * nodeConfig.frame.type = IfxCan_FrameType_transmit;
301 * nodeConfig.frame.mode = IfxCan_FrameMode_fdLong; // incase of long and fast frames choose IfxCan_FrameMode_fdLongAndFast
302 * // it can also be standard frame when the receive node is configured into FD mode
303 *
304 * nodeConfig.txConfig.dedicatedTxBuffersNumber = 2;
305 * nodeConfig.txConfig.txBufferDataFieldSize = IfxCan_DataFieldSize_64; // choose the data field size to allocate tx elements in the message RAM
306 * // this is not the data length (DLC) of the message
307 *
308 * nodeConfig.messageRAM.txBuffersStartAddress = 0x400;
309 * nodeConfig.messageRAM.baseAddress = MODULE_CAN0_RAM + NODE1_RAM_OFFSET;
310 *
311 * // initialize Node 1;
312 * IfxCan_Can_initNode(&canNode[1], &nodeConfig);
313 * }
314 * \endcode
315 *
316 * filter configuration can be set using IfxCan_Can_setStandardFilter function, please refer to Filter Initialisation subsection previously
317 *
318 * then wait for the nodes to be synchronized, before sending and receiving, please refer to Nodes Synchronization subsection previously
319 *
320 * data can be sent and received similarly as standard data transfers except the FD configuration,
321 * choose the FD related configuration accordingly in the message structure before sending and receiving
322 *
323 * transmit example
324 *
325 * \code
326 * //data that needs to be transmitted
327 * int i;
328 * for (i = 0; i<8; i++)
329 * {
330 * // uint32 txData[16]; //defined globally
331 * txData[i] = 0x11223300 + i;
332 * }
333 *
334 * // Initialise the message structure with defualt values
335 * IfxCan_Message txMsg;
336 * IfxCan_Can_initMessage(&txMsg);
337 *
338 * // change the relevent members of the message structure
339 * txMsg.bufferNumber = 1;
340 * txMsg.messageId = 0x7ff;
341 * txMsg.dataLengthCode = IfxCan_DataLengthCode_32; // accordingly txData array is loaded upto txData[8]
342 * // so it doesn't always have to be 64 bytes, it can be changed in the run time
343 * txMsg.frameMode = IfxCan_FrameMode_fdLong;
344 *
345 * // Transmit Data
346 * while( IfxCan_Can_sendMessage(&canNode[1], &txMsg, txData) == IfxCan_Status_notSentBusy );
347 * \endcode
348 *
349 * Receiving Data
350 *
351 * \code
352 * // Initialise the message structure with default values, will be replaced by the received values
353 * IfxCan_Message rxMsg;
354 * IfxCan_initMessage(&rxMsg);
355 *
356 * // specify the rx buffer number where the data will be received
357 * rxMsg.bufferNumber = 1; // choose the buffer number based on the filter configuration an message ID of the TX message
358 *
359 * // wait until node receives the data
360 * while ((IfxCan_Can_isNewDataReceived(&canNode[0], (IfxCan_RxBufferId)rxMsg.bufferNumber)) == 0)
361 * { }
362 *
363 * // read message
364 * // uint32 rxData[16] // defined globally
365 * IfxCan_Can_readMessage(&canNode[0], &rxMsg, rxData);
366 *
367 * // data is now available at rxData
368 * \endcode
369 *
370 * \section IfxLld_Can_Can_FifoStandardTransfers FIFO Standard Transfers
371 *
372 * CAN driver supports FIFO transfers for both standard and FD data,
373 * FIFO transfers has to be selected in the node initialisation phase
374 *
375 * FIFO initialisation can be done as followed at node level after initialising the module
376 * please refer to Module Initialisation subsection previously
377 *
378 * \code
379 * // create node configuration
380 *
381 * // Node 0 as receive node
382 * {
383 * IfxCan_Can_NodeConfig nodeConfig;
384 * IfxCan_Can_initNodeConfig(&nodeConfig, &can);
385 *
386 * // initialize Node 0
387 * nodeConfig.nodeId = IfxCan_NodeId_0;
388 * nodeConfig.clockSource = IfxCan_ClockSource_both;
389 * nodeConfig.frame.type = IfxCan_FrameType_receive;
390 *
391 * nodeConfig.filterConfig.standardListSize = 2;
392 *
393 * nodeConfig.rxConfig.rxMode = IfxCan_RxMode_sharedFifo0; // see the Rx mode optins to select between Rx buffers and Rx fifos or the combination
394 * nodeConfig.rxConfig.rxFifo0Size = 64;
395 *
396 * nodeConfig.messageRAM.standardFilterListStartAddress = 0x100;
397 * nodeConfig.messageRAM.rxBuffersStartAddress = 0x200;
398 * nodeConfig.messageRAM.rxFifo0StartAddress = 0x300;
399 * nodeConfig.messageRAM.baseAddress = MODULE_CAN0_RAM + NODE0_RAM_OFFSET;
400 *
401 * // initialize Node 0
402 * IfxCan_Can_initNode(&canNode[0], &nodeConfig);
403 * }
404 *
405 * // Node 1 as transmit node
406 * {
407 * IfxCan_Can_NodeConfig nodeConfig;
408 * IfxCan_Can_initNodeConfig(&nodeConfig, &can);
409 *
410 * nodeConfig.nodeId = IfxCan_NodeId_1;
411 * nodeConfig.clockSource = IfxCan_ClockSource_both;
412 *
413 * nodeConfig.frame.type = IfxCan_FrameType_transmit;
414 *
415 * nodeConfig.txConfig.txMode = IfxCan_TxMode_fifo; // see the Rx mode optins to select between Tx buffers and Tx fifo/Queue or the combination
416 * nodeConfig.txConfig.dedicatedTxBuffersNumber = 0; // since Tx mode is chosen as only FIFO
417 * nodeConfig.txConfig.txFifoQueueSize = 32;
418 *
419 * nodeConfig.messageRAM.txBuffersStartAddress = 0x400;
420 * nodeConfig.messageRAM.baseAddress = MODULE_CAN0_RAM + NODE1_RAM_OFFSET;
421 *
422 * // initialize Node 1;
423 * IfxCan_Can_initNode(&canNode[1], &nodeConfig);
424 * }
425 * \endcode
426 *
427 * filter configuration can be set using IfxCan_Can_setStandardFilter function,\n
428 * filter configuration example for FIFO transfers,\n
429 * here one filter is set for Rx FIFO and one for RX Buffers because Rx Mode is chosen as sharedFifo0 in nodeConfig.rxConfig of receive node
430 * \code
431 * // set filters
432 *
433 * // set filter for Rx FIFO 0
434 * {
435 * // Initialize the filter structure
436 * IfxCan_Filter filter;
437 *
438 * filter.number = 0;
439 * filter.elementConfiguration = IfxCan_FilterElementConfiguration_storeInRxFifo1;
440 * filter.type = IfxCan_FilterType_range;
441 * filter.id1 = 0x00;
442 * filter.id2 = 0x00;
443 *
444 * IfxCan_Can_setStandardFilter(&canNode[0], &filter);
445 * }
446 *
447 * // set filter for rxBuffer 0
448 * {
449 * IfxCan_Filter filter;
450 *
451 * filter.number = 1;
452 * filter.elementConfiguration = IfxCan_FilterElementConfiguration_storeInRxBuffer;
453 * filter.id1 = 0x7f;
454 * filter.rxBufferOffset = IfxCan_RxBufferId_0;
455 *
456 * IfxCan_Can_setStandardFilter(&canNode[0], &filter);
457 * }
458 * \endcode
459 *
460 * wait for the nodes to be synchronized, before sending and receiving, please refer to Nodes Synchronization subsection previously
461 *
462 * data can be sent and received similarly as standard data transfers except the FIFO configuration,
463 * choose the FIFO related configuration accordingly in the message structure before sending and receiving
464 *
465 * transmit and receive example
466 *
467 * \code
468 * //data that needs to be transmitted
469 * txData[0] = 0x55555555;
470 * txData[1] = 0xAAAAAAAA;
471 *
472 * // will be replaced by the received values
473 * rxData[0] = 0xdeadbeef;
474 * rxData[1] = 0xdeadbeef;
475 *
476 * // Initialise the tx message structure with defualt values
477 * IfxCan_Message txMsg;
478 * IfxCan_Can_initMessage(&txMsg);
479 *
480 * // change the relevant members of transmit message structure
481 * txMsg.messageId = 0x0; // since the tx mode is configured as FIFO the ID should be constant for all the messages
482 * // if the tx mode is configured as Queue then the ID can be changed during run time
483 * txMsg.storeInTxFifoQueue = TRUE; // enable writing the data into FIFO/Queue,
484 * // this will enable the sendMessage API to get the next Tx element based on the put index of the Tx FIFO
485 *
486 * // Initialise the rx message structure with defualt values
487 * IfxCan_Message rxMsg;
488 * IfxCan_Can_initMessage(&rxMsg);
489 *
490 * // change the relevant members of receive message structure
491 * rxMsg.readFromRxFifo0 = TRUE; // enable reading the data from Rx FIFO 0
492 * // this will enable the readMessage API to get the next Rx element based on the get index of Rx FIFO 0
493 *
494 * // send and receive through FIFO
495 * uint32 i = 0;
496 *
497 * // #define FIFO_LENGTH 20 // define globally
498 * for (i = 0; i < FIFO_LENGTH; ++i)
499 * {
500 * // Transmit Data
501 * if (IfxCan_Can_isTxFifoQueueFull(&canNode[1]) != TRUE)
502 * {
503 * while( IfxCan_Can_sendMessage(&canNode[1], &txMsg, txData) == IfxCan_Status_notSentBusy );
504 * }
505 *
506 * // Receive Data
507 * // wait until RX FIFO 0 receives new data
508 * while(IfxCan_Can_getRxFifo0FillLevel(&canNode[0]) == 0);
509 *
510 * if (IfxCan_Can_getRxFifo0FillLevel(&canNode[0]) > 0)
511 * {
512 * // read message
513 * IfxCan_Can_readMessage(&canNode[0], &rxMsg, rxData);
514 * }
515 *
516 * // data is now available at rxData[0] and rxData[1]
517 * result |= clib_trace(rxData[0], txData[0]);
518 * result |= clib_trace(rxData[1], txData[1]);
519 *
520 * txData[0]++;
521 * txData[1]++;
522 * }
523 * \endcode
524 *
525 * \section IfxLld_Can_Can_FifoFDTransfers FIFO FD Transfers
526 *
527 * FD transfers through FIFO is similar to FIFO standard transfers except the FD configuration
528 * please refer to FD transfers section and FIFO Standard transfers section, and choose the FD configuration accordingly
529 *
530 * \defgroup IfxLld_Can_Can CAN Interface Driver
531 * \ingroup IfxLld_Can
532 * \defgroup IfxLld_Can_Can_Data_Structures Data Structures
533 * \ingroup IfxLld_Can_Can
534 * \defgroup IfxLld_Can_Can_Module_Initialize_Functions Module Initialize Functions
535 * \ingroup IfxLld_Can_Can
536 * \defgroup IfxLld_Can_Can_Data_Transfer_Functions Data Transfer Functions
537 * \ingroup IfxLld_Can_Can
538 * \defgroup IfxLld_Can_Can_Filter_Configuration_Functions Filter Configuration Functions
539 * \ingroup IfxLld_Can_Can
540 * \defgroup IfxLld_Can_Can_Node_Initialize_Functions Node Initialize Functions
541 * \ingroup IfxLld_Can_Can
542 */
543
544 #ifndef IFXCAN_CAN_H
545 #define IFXCAN_CAN_H 1
546
547 /******************************************************************************/
548 /*----------------------------------Includes----------------------------------*/
549 /******************************************************************************/
550
551 #include "Can/Std/IfxCan.h"
552 #include "Scu/Std/IfxScuWdt.h"
553
554 /******************************************************************************/
555 /*-----------------------------Data Structures--------------------------------*/
556 /******************************************************************************/
557
558 /** \addtogroup IfxLld_Can_Can_Data_Structures
559 * \{ */
560 /** \brief Structure for nominal baudrate
561 */
562 typedef struct
563 {
564 uint32 baudrate; /**< \brief Specifies the baud rate. Unit: baud */
565 uint16 samplePoint; /**< \brief Specifies the baud rate. Unit: baud */
566 uint16 syncJumpWidth; /**< \brief Synchronization Jump Width */
567 uint16 prescaler; /**< \brief Baud Rate Prescaler */
568 uint8 timeSegment1; /**< \brief Time segment before sample point */
569 uint8 timeSegment2; /**< \brief Time segment after sample point */
570 } IfxCan_Can_BaudRate;
571
572 /** \brief Structure for fast baudrate
573 */
574 typedef struct
575 {
576 uint32 baudrate; /**< \brief Specifies the baud rate. Unit: baud */
577 uint16 samplePoint; /**< \brief Specifies the baud rate. Unit: baud */
578 uint16 syncJumpWidth; /**< \brief Synchronization Jump Width */
579 uint16 prescaler; /**< \brief Baud Rate Prescaler */
580 uint8 timeSegment1; /**< \brief Time segment before sample point */
581 uint8 timeSegment2; /**< \brief Time segment after sample point */
582 uint8 tranceiverDelayOffset; /**< \brief transceiver delay compensation offset */
583 } IfxCan_Can_FastBaudRate;
584
585 /** \brief Structure for Acceptance filter configuration
586 */
587 typedef struct
588 {
589 IfxCan_MessageIdLength messageIdLength; /**< \brief Message Id length (Standard / Extended) */
590 uint8 standardListSize; /**< \brief List Size Standard */
591 uint8 extendedListSize; /**< \brief List Size Extended */
592 boolean rejectRemoteFramesWithStandardId; /**< \brief set whether to reject the remote frames with standard id. */
593 boolean rejectRemoteFramesWithExtendedId; /**< \brief set whether to reject the remote frames with extended id. */
594 IfxCan_NonMatchingFrame standardFilterForNonMatchingFrames; /**< \brief action to be taken on the frames with ids, which are not matching with the standard filter. */
595 IfxCan_NonMatchingFrame extendedFilterForNonMatchingFrames; /**< \brief action to be taken on the frames with ids, which are not matching with the extended filter. */
596 } IfxCan_Can_FilterConfig;
597
598 /** \brief Structure for Frame Configuration
599 */
600 typedef struct
601 {
602 IfxCan_FrameType type; /**< \brief Specifies the frame type */
603 IfxCan_FrameMode mode; /**< \brief Specifies the frame mode */
604 } IfxCan_Can_Frame;
605
606 /** \brief Structure for Interrupt configuration
607 */
608 typedef struct
609 {
610 boolean rxFifo0NewMessageEnabled; /**< \brief Rx FIFO 0 New Message Interrupt enable/Disable */
611 boolean rxFifo0WatermarkEnabled; /**< \brief Rx Fifo 0 Watermark Interrupt enable/Disable */
612 boolean rxFifo0FullEnabled; /**< \brief Rx Fifo 0 Full Interrupt enable/Disable */
613 boolean rxFifo0MessageLostEnabled; /**< \brief Rx FIFO 0 Message Lost Interrupt enable/Disable */
614 boolean rxFifo1NewMessageEnabled; /**< \brief Rx FIFO 1 New Message Interrupt enable/Disable */
615 boolean rxFifo1WatermarkEnabled; /**< \brief Rx FIFO 1 Watermark Reached Interrupt enable/Disable */
616 boolean rxFifo1FullEnabled; /**< \brief Rx FIFO 1 Full Interrupt enable/Disable */
617 boolean rxFifo1MessageLostEnabled; /**< \brief Rx FIFO 1 Message Lost Interrupt enable/Disable */
618 boolean highPriorityMessageEnabled; /**< \brief High Priority Message Interrupt enable/Disable */
619 boolean transmissionCompletedEnabled; /**< \brief Transmission Completed Interrupt enable/Disable */
620 boolean transmissionCancellationFinishedEnabled; /**< \brief Transmission Cancellation Finished Interrupt enable/Disable */
621 boolean txFifoEmptyEnabled; /**< \brief Tx FIFO Empty Interrupt enable/Disable */
622 boolean txEventFifoNewEntryEnabled; /**< \brief Tx Event FIFO New Entry Interrupt enable/Disable */
623 boolean txEventFifoWatermarkEnabled; /**< \brief Tx Event FIFO Watermark Reached Interrupt enable/Disable */
624 boolean txEventFifoFullEnabled; /**< \brief Tx Event FIFO Full Interrupt enable/Disable */
625 boolean txEventFifoEventLostEnabled; /**< \brief Tx Event FIFO Event Lost Interrupt enable/Disable */
626 boolean timestampWraparoundEnabled; /**< \brief Timestamp Wraparound Interrupt enable/Disable */
627 boolean messageRAMAccessFailureEnabled; /**< \brief Message RAM Access Failure Interrupt enable/Disable */
628 boolean timeoutOccurredEnabled; /**< \brief Timeout Occurred Interrupt enable/Disable */
629 boolean messageStoredToDedicatedRxBufferEnabled; /**< \brief Message stored to Dedicated Rx Buffer Interrupt enable/Disable */
630 boolean errorLoggingOverflowEnabled; /**< \brief Error Logging Overflow Interrupt enable/Disable */
631 boolean errorPassiveEnabled; /**< \brief Error Passive Interrupt enable/Disable */
632 boolean warningStatusEnabled; /**< \brief Warning Status Interrupt enable/Disable */
633 boolean busOffStatusEnabled; /**< \brief Bus_Off Status Interrupt enable/Disable */
634 boolean watchdogEnabled; /**< \brief Watchdog Interrupt enable/Disable */
635 boolean protocolErrorArbitrationEnabled; /**< \brief Protocol Error in Arbitration phase Interrupt enable/Disable */
636 boolean protocolErrorDataEnabled; /**< \brief Protocol Error in Data phase Interrupt enable/Disable */
637 IfxCan_GroupInterruptConfig tefifo; /**< \brief Configuration for Transmit Event FIFO Incidents interrupts */
638 IfxCan_GroupInterruptConfig hpe; /**< \brief Configuration for High Priority Events interrupts */
639 IfxCan_GroupInterruptConfig wati; /**< \brief Configuration for Watermark interrupts */
640 IfxCan_GroupInterruptConfig alrt; /**< \brief Configuration for Alerts interrupts */
641 IfxCan_GroupInterruptConfig moer; /**< \brief Configuration for Module errors interrupts */
642 IfxCan_GroupInterruptConfig safe; /**< \brief Configuration for Safety counter overflow interrupt */
643 IfxCan_GroupInterruptConfig boff; /**< \brief Configuration for Bus Off interrupt */
644 IfxCan_GroupInterruptConfig loi; /**< \brief Configuration for Last Error interrupts */
645 IfxCan_GroupInterruptConfig reint; /**< \brief Configuration for iMessage stored in dedicated receive buffer interrupts */
646 IfxCan_GroupInterruptConfig rxf1f; /**< \brief Configuration for Receive FIFO1 full interrupts */
647 IfxCan_GroupInterruptConfig rxf0f; /**< \brief Configuration for Receive FIFO0 full interrupts */
648 IfxCan_GroupInterruptConfig rxf1n; /**< \brief Configuration for Receive FIFO1 new message interrupts */
649 IfxCan_GroupInterruptConfig rxf0n; /**< \brief Configuration for Receive FIFO0 new message interrupts */
650 IfxCan_GroupInterruptConfig reti; /**< \brief Configuration for Receive Timeouts interrupts */
651 IfxCan_GroupInterruptConfig traq; /**< \brief Configuration for Transmission Queue Events interrupts */
652 IfxCan_GroupInterruptConfig traco; /**< \brief Configuration for interrupts of the transmission control */
653 } IfxCan_Can_InterruptConfig;
654
655 /** \brief Structure for CAN pin configuration
656 */
657 typedef struct
658 {
659 IfxCan_Txd_Out *txPin; /**< \brief Specifies the transmit pin */
660 IfxPort_OutputMode txPinMode; /**< \brief Specifies the transmit pin output mode IfxPort_OutputMode_pushPull */
661 IfxCan_Rxd_In *rxPin; /**< \brief Specifies the receive pin */
662 IfxPort_InputMode rxPinMode; /**< \brief Specifies the receive pin as input mode IfxPort_InputMode_noPullDevice */
663 IfxPort_PadDriver padDriver; /**< \brief Pad driver IfxPort_PadDriver_cmosAutomotiveSpeed2 */
664 } IfxCan_Can_Pins;
665
666 /** \brief Structure for Rx handle Configuration
667 */
668 typedef struct
669 {
670 IfxCan_RxMode rxMode; /**< \brief Rx Buffers or FIFO 0 or combination Mode of reception */
671 IfxCan_DataFieldSize rxBufferDataFieldSize; /**< \brief Rx Buffer Data Field Size */
672 IfxCan_DataFieldSize rxFifo0DataFieldSize; /**< \brief Rx FIFO 0 Data Field Size */
673 IfxCan_DataFieldSize rxFifo1DataFieldSize; /**< \brief Rx FIFO 1 Data Field Size */
674 IfxCan_RxFifoMode rxFifo0OperatingMode; /**< \brief Rx FIFO 0 operating mode */
675 IfxCan_RxFifoMode rxFifo1OperatingMode; /**< \brief Rx FIFO 1 operating mode */
676 uint8 rxFifo0WatermarkLevel; /**< \brief Rx FIFO 0 watermark level */
677 uint8 rxFifo1WatermarkLevel; /**< \brief Rx FIFO 1 watermark level */
678 uint8 rxFifo0Size; /**< \brief Rx FIFO 0 Size */
679 uint8 rxFifo1Size; /**< \brief Rx FIFO 1 Size */
680 } IfxCan_Can_RxConfig;
681
682 /** \brief Structure for Tx handle Configuration
683 */
684 typedef struct
685 {
686 IfxCan_TxMode txMode; /**< \brief Tx FIFO/Queue Mode */
687 uint8 dedicatedTxBuffersNumber; /**< \brief Number of Dedicated Transmit Buffers */
688 uint8 txFifoQueueSize; /**< \brief Transmit FIFO/Queue Size */
689 IfxCan_DataFieldSize txBufferDataFieldSize; /**< \brief Tx Buffer Data Field Size */
690 uint8 txEventFifoSize; /**< \brief Transmit Event FIFO Size */
691 } IfxCan_Can_TxConfig;
692
693 /** \} */
694
695 /** \addtogroup IfxLld_Can_Can_Data_Structures
696 * \{ */
697 /** \brief Module handle
698 */
699 typedef struct
700 {
701 Ifx_CAN *can; /**< \brief Specifies the pointer to the CAN registers */
702 } IfxCan_Can;
703
704 /** \brief Configuration Structure of the Module
705 */
706 typedef struct
707 {
708 Ifx_CAN *can; /**< \brief Specifies the pointer to the CAN registers */
709 } IfxCan_Can_Config;
710
711 /** \brief Node handle
712 */
713 typedef struct
714 {
715 Ifx_CAN *can; /**< \brief Specifies the pointer to the CAN registers */
716 Ifx_CAN_N *node; /**< \brief Specifies the pointer to the CAN Node registers */
717 IfxCan_FrameMode frameMode; /**< \brief Specifies the selected frame mode */
718 IfxCan_MessageRAM messageRAM; /**< \brief Structure for Message RAM */
719 } IfxCan_Can_Node;
720
721 /** \brief Configuration Structure of the Node
722 */
723 typedef struct
724 {
725 Ifx_CAN *can; /**< \brief Specifies the pointer to the CAN registers */
726 IfxCan_NodeId nodeId; /**< \brief Specifies the Node number of the MCan */
727 IfxCan_ClockSource clockSource; /**< \brief Clock source */
728 IfxCan_Can_Frame frame; /**< \brief Structure for Frame Configuration */
729 IfxCan_Can_BaudRate baudRate; /**< \brief Structure for nominal baudrate */
730 IfxCan_Can_FastBaudRate fastBaudRate; /**< \brief Structure for fast baudrate */
731 IfxCan_Can_TxConfig txConfig; /**< \brief Structure for Tx handle Configuration */
732 IfxCan_Can_FilterConfig filterConfig; /**< \brief Structure for Acceptance filter configuration */
733 IfxCan_Can_RxConfig rxConfig; /**< \brief Structure for Rx handle Configuration */
734 IfxCan_MessageRAM messageRAM; /**< \brief Structure for Message RAM */
735 IfxCan_Can_InterruptConfig interruptConfig; /**< \brief Structure for Interrupt configuration */
736 IFX_CONST IfxCan_Can_Pins *pins; /**< \brief structure for CAN pins */
737 boolean busLoopbackEnabled; /**< \brief Internal Virtual CAN bus loopback mode enable / disable choice */
738 boolean calculateBitTimingValues; /**< \brief Enable / Disable auto calculation of bit timing values for selected CAN node */
739 } IfxCan_Can_NodeConfig;
740
741 /** \} */
742
743 /** \addtogroup IfxLld_Can_Can_Module_Initialize_Functions
744 * \{ */
745
746 /******************************************************************************/
747 /*-------------------------Global Function Prototypes-------------------------*/
748 /******************************************************************************/
749
750 /** \brief Initialises the CAN Module
751 * \param can Specifies the module handle
752 * \param config Configuration structure of the module
753 * \return None
754 *
755 * A coding example can be found in \ref IfxLld_Can_Can_Usage
756 *
757 */
758 IFX_EXTERN void IfxCan_Can_initModule(IfxCan_Can *can, IfxCan_Can_Config *config);
759
760 /** \brief Fills the configuration stucture of the CAN Module with default values
761 * \param config Configuration structure to be filled with default values
762 * \param can Specifies the pointer to the CAN registers
763 * \return None
764 *
765 * A coding example can be found in \ref IfxLld_Can_Can_Usage
766 *
767 */
768 IFX_EXTERN void IfxCan_Can_initModuleConfig(IfxCan_Can_Config *config, Ifx_CAN *can);
769
770 /** \} */
771
772 /** \addtogroup IfxLld_Can_Can_Data_Transfer_Functions
773 * \{ */
774
775 /******************************************************************************/
776 /*-------------------------Inline Function Prototypes-------------------------*/
777 /******************************************************************************/
778
779 /** \brief Returns Rx FIFO 1 Fill Level
780 * \param node CAN Node handle
781 * \return Fill level
782 *
783 * A coding example can be found in \ref IfxLld_Can_Can_Usage
784 *
785 */
786 IFX_INLINE uint8 IfxCan_Can_getRxFifo0FillLevel(IfxCan_Can_Node *node);
787
788 /** \brief Returns Rx FIFO 1 Fill Level
789 * \param node CAN Node handle
790 * \return Fill level
791 *
792 * A coding example can be found in \ref IfxLld_Can_Can_Usage
793 *
794 */
795 IFX_INLINE uint8 IfxCan_Can_getRxFifo1FillLevel(IfxCan_Can_Node *node);
796
797 /** \brief Returns the status of whether the selcted Rx buffer has been updated from new data
798 * \param node CAN Node handle
799 * \param rxBufferId Rx Buffer number
800 * \return Status
801 *
802 * A coding example can be found in \ref IfxLld_Can_Can_Usage
803 *
804 */
805 IFX_INLINE boolean IfxCan_Can_isNewDataReceived(IfxCan_Can_Node *node, IfxCan_RxBufferId rxBufferId);
806
807 /** \brief Returns the status of whether Tx Fifo/Queue is full or not
808 * \param node CAN Node handle
809 * \return Status
810 *
811 * A coding example can be found in \ref IfxLld_Can_Can_Usage
812 *
813 */
814 IFX_INLINE boolean IfxCan_Can_isTxFifoQueueFull(IfxCan_Can_Node *node);
815
816 /******************************************************************************/
817 /*-------------------------Global Function Prototypes-------------------------*/
818 /******************************************************************************/
819
820 /** \brief Initialises the message frame with defualt values
821 * \param message Structure for CAN Message
822 * \return None
823 *
824 * A coding example can be found in \ref IfxLld_Can_Can_Usage
825 *
826 */
827 IFX_EXTERN void IfxCan_Can_initMessage(IfxCan_Message *message);
828
829 /** \brief Reads the CAN received message
830 * \param node CAN Node handle
831 * \param message Structure for Message configuration filled with dummy values and will be relpaced by read values. see IfxCan_Can_initMessage
832 * \param data Pointer to data (in words)
833 * \return None
834 *
835 * A coding example can be found in \ref IfxLld_Can_Can_Usage
836 *
837 */
838 IFX_EXTERN void IfxCan_Can_readMessage(IfxCan_Can_Node *node, IfxCan_Message *message, uint32 *data);
839
840 /** \brief Transmits the CAN message
841 * \param node CAN Node handle
842 * \param message Structure for Message configuration. see IfxCan_Can_initMessage
843 * \param data Pointer to data (in words)
844 * \return status
845 *
846 * A coding example can be found in \ref IfxLld_Can_Can_Usage
847 *
848 */
849 IFX_EXTERN IfxCan_Status IfxCan_Can_sendMessage(IfxCan_Can_Node *node, IfxCan_Message *message, uint32 *data);
850
851 /** \} */
852
853 /** \addtogroup IfxLld_Can_Can_Filter_Configuration_Functions
854 * \{ */
855
856 /******************************************************************************/
857 /*-------------------------Global Function Prototypes-------------------------*/
858 /******************************************************************************/
859
860 /** \brief Sets the Extended Filter element configuration
861 * \param node CAN Node handle
862 * \param filter Structure for Filter Configuration
863 * \return None
864 *
865 * A coding example can be found in \ref IfxLld_Can_Can_Usage
866 *
867 */
868 IFX_EXTERN void IfxCan_Can_setExtendedFilter(IfxCan_Can_Node *node, IfxCan_Filter *filter);
869
870 /** \brief Sets the Standard Filter element configuration
871 * \param node CAN Node handle
872 * \param filter Structure for Filter Configuration
873 * \return None
874 *
875 * A coding example can be found in \ref IfxLld_Can_Can_Usage
876 *
877 */
878 IFX_EXTERN void IfxCan_Can_setStandardFilter(IfxCan_Can_Node *node, IfxCan_Filter *filter);
879
880 /** \} */
881
882 /** \addtogroup IfxLld_Can_Can_Node_Initialize_Functions
883 * \{ */
884
885 /******************************************************************************/
886 /*-------------------------Inline Function Prototypes-------------------------*/
887 /******************************************************************************/
888
889 /** \brief Returns the status of whether the NODE is synchronised or not
890 * \param node CAN Node handle
891 * \return Status TRUE: synchronized, FALSE : Sync in progress
892 *
893 * A coding example can be found in \ref IfxLld_Can_Can_Usage
894 *
895 */
896 IFX_INLINE boolean IfxCan_Can_isNodeSynchronized(IfxCan_Can_Node *node);
897
898 /** \brief Returns the status of pending request of the selected Tx buffer
899 * \param node CAN Node handle
900 * \param txBufferId Tx Buffer number
901 * \return Status
902 */
903 IFX_INLINE boolean IfxCan_Can_isTxBufferRequestPending(IfxCan_Can_Node *node, IfxCan_TxBufferId txBufferId);
904
905 /******************************************************************************/
906 /*-------------------------Global Function Prototypes-------------------------*/
907 /******************************************************************************/
908
909 /** \brief Initialises the CAN Node
910 * \param node CAN Node handle
911 * \param config Configuration structure of the Node
912 * \return TRUE: Returns TRUE if the operation was successful\n
913 * FALSE: Returns FALSE if the operation was errorneous
914 *
915 * A coding example can be found in \ref IfxLld_Can_Can_Usage
916 *
917 */
918 IFX_EXTERN boolean IfxCan_Can_initNode(IfxCan_Can_Node *node, const IfxCan_Can_NodeConfig *config);
919
920 /** \brief Fills the configuration stucture of the Node with default values
921 * \param config Configuration structure of the Node
922 * \param can Specifies the module handle
923 * \return None
924 *
925 * A coding example can be found in \ref IfxLld_Can_Can_Usage
926 *
927 */
928 IFX_EXTERN void IfxCan_Can_initNodeConfig(IfxCan_Can_NodeConfig *config, IfxCan_Can *can);
929
930 /** \} */
931
932 /******************************************************************************/
933 /*---------------------Inline Function Implementations------------------------*/
934 /******************************************************************************/
935
936 IFX_INLINE uint8 IfxCan_Can_getRxFifo0FillLevel(IfxCan_Can_Node *node)
937 {
938 return IfxCan_Node_getRxFifo0FillLevel(node->node);
939 }
940
941
942 IFX_INLINE uint8 IfxCan_Can_getRxFifo1FillLevel(IfxCan_Can_Node *node)
943 {
944 return IfxCan_Node_getRxFifo1FillLevel(node->node);
945 }
946
947
948 IFX_INLINE boolean IfxCan_Can_isNewDataReceived(IfxCan_Can_Node *node, IfxCan_RxBufferId rxBufferId)
949 {
950 return IfxCan_Node_isRxBufferNewDataUpdated(node->node, rxBufferId);
951 }
952
953
954 IFX_INLINE boolean IfxCan_Can_isNodeSynchronized(IfxCan_Can_Node *node)
955 {
956 return IfxCan_Node_isNodeSynchronized(node->node);
957 }
958
959
960 IFX_INLINE boolean IfxCan_Can_isTxBufferRequestPending(IfxCan_Can_Node *node, IfxCan_TxBufferId txBufferId)
961 {
962 return IfxCan_Node_isTxBufferRequestPending(node->node, txBufferId);
963 }
964
965
966 IFX_INLINE boolean IfxCan_Can_isTxFifoQueueFull(IfxCan_Can_Node *node)
967 {
968 return IfxCan_Node_isTxFifoQueueFull(node->node);
969 }
970
971
972 #endif /* IFXCAN_CAN_H */
IfxCan_Can_InterruptConfig::reti
IfxCan_GroupInterruptConfig reti
Configuration for Receive Timeouts interrupts.
Definition: IfxCan_Can.h:650
IfxCan_Can_InterruptConfig::tefifo
IfxCan_GroupInterruptConfig tefifo
Configuration for Transmit Event FIFO Incidents interrupts.
Definition: IfxCan_Can.h:637
IfxCan_Can_InterruptConfig::rxFifo0WatermarkEnabled
boolean rxFifo0WatermarkEnabled
Rx Fifo 0 Watermark Interrupt enable/Disable.
Definition: IfxCan_Can.h:611
IfxCan_Can_getRxFifo1FillLevel
IFX_INLINE uint8 IfxCan_Can_getRxFifo1FillLevel(IfxCan_Can_Node *node)
Returns Rx FIFO 1 Fill Level.
Definition: IfxCan_Can.h:942
IfxCan_Can_RxConfig::rxFifo0WatermarkLevel
uint8 rxFifo0WatermarkLevel
Rx FIFO 0 watermark level.
Definition: IfxCan_Can.h:676
IfxCan_Can_initNode
IFX_EXTERN boolean IfxCan_Can_initNode(IfxCan_Can_Node *node, const IfxCan_Can_NodeConfig *config)
Initialises the CAN Node.
Definition: IfxCan_Can.c:101
IfxCan_Can_BaudRate::prescaler
uint16 prescaler
Baud Rate Prescaler.
Definition: IfxCan_Can.h:567
IfxCan_Can_InterruptConfig::rxFifo0FullEnabled
boolean rxFifo0FullEnabled
Rx Fifo 0 Full Interrupt enable/Disable.
Definition: IfxCan_Can.h:612
IfxCan_Can::can
Ifx_CAN * can
Specifies the pointer to the CAN registers.
Definition: IfxCan_Can.h:701
IfxCan_Can_InterruptConfig::watchdogEnabled
boolean watchdogEnabled
Watchdog Interrupt enable/Disable.
Definition: IfxCan_Can.h:634
IfxCan_Can_FilterConfig::rejectRemoteFramesWithStandardId
boolean rejectRemoteFramesWithStandardId
set whether to reject the remote frames with standard id.
Definition: IfxCan_Can.h:592
IfxCan_Can
Module handle.
Definition: IfxCan_Can.h:699
IfxCan_Node_isRxBufferNewDataUpdated
boolean IfxCan_Node_isRxBufferNewDataUpdated(Ifx_CAN_N *node, IfxCan_RxBufferId rxBufferId)
Returns the status of whether the selcted Rx buffer has been updated from new data.
Definition: IfxCan.c:350
IfxCan_Can_InterruptConfig::traq
IfxCan_GroupInterruptConfig traq
Configuration for Transmission Queue Events interrupts.
Definition: IfxCan_Can.h:651
IfxCan_Can_NodeConfig::clockSource
IfxCan_ClockSource clockSource
Clock source.
Definition: IfxCan_Can.h:727
IfxCan_Can_isTxBufferRequestPending
IFX_INLINE boolean IfxCan_Can_isTxBufferRequestPending(IfxCan_Can_Node *node, IfxCan_TxBufferId txBufferId)
Returns the status of pending request of the selected Tx buffer.
Definition: IfxCan_Can.h:960
IfxCan_Node_getRxFifo1FillLevel
IFX_INLINE uint8 IfxCan_Node_getRxFifo1FillLevel(Ifx_CAN_N *node)
Returns Rx FIFO 1 Fill Level.
Definition: IfxCan.h:1961
IfxCan_Can_InterruptConfig::highPriorityMessageEnabled
boolean highPriorityMessageEnabled
High Priority Message Interrupt enable/Disable.
Definition: IfxCan_Can.h:618
IfxCan_FrameMode
IfxCan_FrameMode
CAN Frame mode Description in Ifx_CAN.N[x].CCCR.CME, (x= 0 to 3)
Definition: IfxCan.h:178
IfxCan_Can_BaudRate::syncJumpWidth
uint16 syncJumpWidth
Synchronization Jump Width.
Definition: IfxCan_Can.h:566
IfxCan_Can_Pins
Structure for CAN pin configuration.
Definition: IfxCan_Can.h:657
IfxCan_Can_isNodeSynchronized
IFX_INLINE boolean IfxCan_Can_isNodeSynchronized(IfxCan_Can_Node *node)
Returns the status of whether the NODE is synchronised or not.
Definition: IfxCan_Can.h:954
IfxCan_FrameType
IfxCan_FrameType
CAN frame type.
Definition: IfxCan.h:187
IfxCan_Can_RxConfig::rxFifo0DataFieldSize
IfxCan_DataFieldSize rxFifo0DataFieldSize
Rx FIFO 0 Data Field Size.
Definition: IfxCan_Can.h:672
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:140
IfxCan_Can_TxConfig::dedicatedTxBuffersNumber
uint8 dedicatedTxBuffersNumber
Number of Dedicated Transmit Buffers.
Definition: IfxCan_Can.h:687
IfxCan_Can_InterruptConfig::busOffStatusEnabled
boolean busOffStatusEnabled
Bus_Off Status Interrupt enable/Disable.
Definition: IfxCan_Can.h:633
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxCan_Can_FastBaudRate
Structure for fast baudrate.
Definition: IfxCan_Can.h:574
IfxCan_GroupInterruptConfig
Configuration for Interrupt groups.
Definition: IfxCan.h:522
IfxCan_Can_InterruptConfig::rxf1f
IfxCan_GroupInterruptConfig rxf1f
Configuration for Receive FIFO1 full interrupts.
Definition: IfxCan_Can.h:646
IfxCan_Can_RxConfig::rxFifo1DataFieldSize
IfxCan_DataFieldSize rxFifo1DataFieldSize
Rx FIFO 1 Data Field Size.
Definition: IfxCan_Can.h:673
IfxCan_Can_sendMessage
IFX_EXTERN IfxCan_Status IfxCan_Can_sendMessage(IfxCan_Can_Node *node, IfxCan_Message *message, uint32 *data)
Transmits the CAN message.
Definition: IfxCan_Can.c:861
IfxCan_Can_InterruptConfig::rxFifo1WatermarkEnabled
boolean rxFifo1WatermarkEnabled
Rx FIFO 1 Watermark Reached Interrupt enable/Disable.
Definition: IfxCan_Can.h:615
IfxCan_Can_initMessage
IFX_EXTERN void IfxCan_Can_initMessage(IfxCan_Message *message)
Initialises the message frame with defualt values.
Definition: IfxCan_Can.c:53
IfxCan_Can_NodeConfig::fastBaudRate
IfxCan_Can_FastBaudRate fastBaudRate
Structure for fast baudrate.
Definition: IfxCan_Can.h:730
IfxCan_Can_RxConfig::rxFifo0Size
uint8 rxFifo0Size
Rx FIFO 0 Size.
Definition: IfxCan_Can.h:678
IfxCan_Can_InterruptConfig::timestampWraparoundEnabled
boolean timestampWraparoundEnabled
Timestamp Wraparound Interrupt enable/Disable.
Definition: IfxCan_Can.h:626
IfxCan_ClockSource
IfxCan_ClockSource
Type of Clock Source selection Description in Ifx_CAN.MCR.CLKSELx, (x = 0,1,2)
Definition: IfxCan.h:106
IfxCan_Can_Frame
Structure for Frame Configuration.
Definition: IfxCan_Can.h:600
IfxCan_Can_InterruptConfig::rxf0f
IfxCan_GroupInterruptConfig rxf0f
Configuration for Receive FIFO0 full interrupts.
Definition: IfxCan_Can.h:647
IfxCan_Can_Frame::type
IfxCan_FrameType type
Specifies the frame type.
Definition: IfxCan_Can.h:602
IfxCan_Can_NodeConfig::nodeId
IfxCan_NodeId nodeId
Specifies the Node number of the MCan.
Definition: IfxCan_Can.h:726
IfxCan_NodeId
IfxCan_NodeId
CAN Node number.
Definition: IfxCan_cfg.h:93
IfxCan_Can_FilterConfig
Structure for Acceptance filter configuration.
Definition: IfxCan_Can.h:587
IfxCan_Can_Node::frameMode
IfxCan_FrameMode frameMode
Specifies the selected frame mode.
Definition: IfxCan_Can.h:717
IfxCan_Can_RxConfig::rxFifo1WatermarkLevel
uint8 rxFifo1WatermarkLevel
Rx FIFO 1 watermark level.
Definition: IfxCan_Can.h:677
IfxCan_Can_RxConfig::rxBufferDataFieldSize
IfxCan_DataFieldSize rxBufferDataFieldSize
Rx Buffer Data Field Size.
Definition: IfxCan_Can.h:671
IfxCan_Can_InterruptConfig::rxFifo1NewMessageEnabled
boolean rxFifo1NewMessageEnabled
Rx FIFO 1 New Message Interrupt enable/Disable.
Definition: IfxCan_Can.h:614
IfxCan_Can_FilterConfig::rejectRemoteFramesWithExtendedId
boolean rejectRemoteFramesWithExtendedId
set whether to reject the remote frames with extended id.
Definition: IfxCan_Can.h:593
IfxCan_TxMode
IfxCan_TxMode
Tx FIFO/Queue Mode.
Definition: IfxCan.h:473
IfxCan_Can_InterruptConfig::txEventFifoNewEntryEnabled
boolean txEventFifoNewEntryEnabled
Tx Event FIFO New Entry Interrupt enable/Disable.
Definition: IfxCan_Can.h:622
IfxCan_Node_isTxBufferRequestPending
IFX_INLINE boolean IfxCan_Node_isTxBufferRequestPending(Ifx_CAN_N *node, IfxCan_TxBufferId txBufferId)
Returns the status of pending request of the selected Tx buffer.
Definition: IfxCan.h:2041
IfxCan_Can_initNodeConfig
IFX_EXTERN void IfxCan_Can_initNodeConfig(IfxCan_Can_NodeConfig *config, IfxCan_Can *can)
Fills the configuration stucture of the Node with default values.
Definition: IfxCan_Can.c:620
IfxCan_Can_InterruptConfig::rxFifo0MessageLostEnabled
boolean rxFifo0MessageLostEnabled
Rx FIFO 0 Message Lost Interrupt enable/Disable.
Definition: IfxCan_Can.h:613
IfxCan_Can_BaudRate::timeSegment1
uint8 timeSegment1
Time segment before sample point.
Definition: IfxCan_Can.h:568
IfxCan_Can_NodeConfig::filterConfig
IfxCan_Can_FilterConfig filterConfig
Structure for Acceptance filter configuration.
Definition: IfxCan_Can.h:732
IfxScuWdt.h
SCU basic functionality.
IfxCan_MessageIdLength
IfxCan_MessageIdLength
Message Id length (Standard / Extended)
Definition: IfxCan.h:294
IfxCan_RxBufferId
IfxCan_RxBufferId
Rx Buffer number.
Definition: IfxCan.h:312
IfxCan_Can_isTxFifoQueueFull
IFX_INLINE boolean IfxCan_Can_isTxFifoQueueFull(IfxCan_Can_Node *node)
Returns the status of whether Tx Fifo/Queue is full or not.
Definition: IfxCan_Can.h:966
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxCan_Node_getRxFifo0FillLevel
IFX_INLINE uint8 IfxCan_Node_getRxFifo0FillLevel(Ifx_CAN_N *node)
Returns Rx FIFO 0 Fill Level.
Definition: IfxCan.h:1949
IfxCan_Can_InterruptConfig::rxf1n
IfxCan_GroupInterruptConfig rxf1n
Configuration for Receive FIFO1 new message interrupts.
Definition: IfxCan_Can.h:648
IfxCan_Can_InterruptConfig::warningStatusEnabled
boolean warningStatusEnabled
Warning Status Interrupt enable/Disable.
Definition: IfxCan_Can.h:632
IfxCan_Can_setExtendedFilter
IFX_EXTERN void IfxCan_Can_setExtendedFilter(IfxCan_Can_Node *node, IfxCan_Filter *filter)
Sets the Extended Filter element configuration.
Definition: IfxCan_Can.c:921
IfxCan_Can_NodeConfig::busLoopbackEnabled
boolean busLoopbackEnabled
Internal Virtual CAN bus loopback mode enable / disable choice.
Definition: IfxCan_Can.h:737
IfxCan_Can_InterruptConfig::transmissionCompletedEnabled
boolean transmissionCompletedEnabled
Transmission Completed Interrupt enable/Disable.
Definition: IfxCan_Can.h:619
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxCan_RxFifoMode
IfxCan_RxFifoMode
Rx FIFO 0/1 operating mode Description in Ifx_CAN.N[x].RXFyC.FyOM, (x= 0 to 3; y = 0...
Definition: IfxCan.h:383
IfxCan_Can_BaudRate
Structure for nominal baudrate.
Definition: IfxCan_Can.h:562
IfxCan_Can_NodeConfig::pins
IFX_CONST IfxCan_Can_Pins * pins
structure for CAN pins
Definition: IfxCan_Can.h:736
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxCan_Can_readMessage
IFX_EXTERN void IfxCan_Can_readMessage(IfxCan_Can_Node *node, IfxCan_Message *message, uint32 *data)
Reads the CAN received message.
Definition: IfxCan_Can.c:807
IfxCan_Rxd_In
RXD pin mapping structure.
Definition: IfxCan_PinMap.h:56
IfxCan_Can_InterruptConfig::rxFifo0NewMessageEnabled
boolean rxFifo0NewMessageEnabled
Rx FIFO 0 New Message Interrupt enable/Disable.
Definition: IfxCan_Can.h:610
IfxCan_Can_InterruptConfig::transmissionCancellationFinishedEnabled
boolean transmissionCancellationFinishedEnabled
Transmission Cancellation Finished Interrupt enable/Disable.
Definition: IfxCan_Can.h:620
IfxCan_DataFieldSize
IfxCan_DataFieldSize
Data Field Size Definition in Ifx_CAN.N[x]TX.ESC.B.TBDS, Ifx_CAN.N[x].RX.ESC.B.RBDS, Ifx_CAN.N[x].RX.ESC.B.FyDS (x= 0,1,2,3; y = 0, 1)
Definition: IfxCan.h:117
IfxCan_Can_isNewDataReceived
IFX_INLINE boolean IfxCan_Can_isNewDataReceived(IfxCan_Can_Node *node, IfxCan_RxBufferId rxBufferId)
Returns the status of whether the selcted Rx buffer has been updated from new data.
Definition: IfxCan_Can.h:948
IfxCan_Can_BaudRate::baudrate
uint32 baudrate
Specifies the baud rate. Unit: baud.
Definition: IfxCan_Can.h:564
IfxCan_Can_Node::messageRAM
IfxCan_MessageRAM messageRAM
Structure for Message RAM.
Definition: IfxCan_Can.h:718
IfxCan_Can_InterruptConfig::rxFifo1FullEnabled
boolean rxFifo1FullEnabled
Rx FIFO 1 Full Interrupt enable/Disable.
Definition: IfxCan_Can.h:616
IfxCan_Can_TxConfig::txEventFifoSize
uint8 txEventFifoSize
Transmit Event FIFO Size.
Definition: IfxCan_Can.h:690
IfxCan_Can_TxConfig::txMode
IfxCan_TxMode txMode
Tx FIFO/Queue Mode.
Definition: IfxCan_Can.h:686
IfxCan_Can_InterruptConfig::safe
IfxCan_GroupInterruptConfig safe
Configuration for Safety counter overflow interrupt.
Definition: IfxCan_Can.h:642
IfxCan_Can_TxConfig::txBufferDataFieldSize
IfxCan_DataFieldSize txBufferDataFieldSize
Tx Buffer Data Field Size.
Definition: IfxCan_Can.h:689
IfxCan_Can_InterruptConfig::alrt
IfxCan_GroupInterruptConfig alrt
Configuration for Alerts interrupts.
Definition: IfxCan_Can.h:640
IfxCan_TxBufferId
IfxCan_TxBufferId
Tx Buffer number.
Definition: IfxCan.h:435
IfxCan_Can_BaudRate::timeSegment2
uint8 timeSegment2
Time segment after sample point.
Definition: IfxCan_Can.h:569
IfxCan_Can_RxConfig::rxMode
IfxCan_RxMode rxMode
Rx Buffers or FIFO 0 or combination Mode of reception.
Definition: IfxCan_Can.h:670
IfxCan_Can_Pins::txPinMode
IfxPort_OutputMode txPinMode
Specifies the transmit pin output mode IfxPort_OutputMode_pushPull.
Definition: IfxCan_Can.h:660
IfxCan_Can_RxConfig
Structure for Rx handle Configuration.
Definition: IfxCan_Can.h:668
IfxCan_Can_InterruptConfig::timeoutOccurredEnabled
boolean timeoutOccurredEnabled
Timeout Occurred Interrupt enable/Disable.
Definition: IfxCan_Can.h:628
IfxCan_Txd_Out
TXD pin mapping structure.
Definition: IfxCan_PinMap.h:65
IfxCan_Can_FilterConfig::standardFilterForNonMatchingFrames
IfxCan_NonMatchingFrame standardFilterForNonMatchingFrames
action to be taken on the frames with ids, which are not matching with the standard filter...
Definition: IfxCan_Can.h:594
IfxCan_Can_InterruptConfig::txEventFifoFullEnabled
boolean txEventFifoFullEnabled
Tx Event FIFO Full Interrupt enable/Disable.
Definition: IfxCan_Can.h:624
IfxCan_Can_RxConfig::rxFifo1OperatingMode
IfxCan_RxFifoMode rxFifo1OperatingMode
Rx FIFO 1 operating mode.
Definition: IfxCan_Can.h:675
IfxCan_Can_NodeConfig::baudRate
IfxCan_Can_BaudRate baudRate
Structure for nominal baudrate.
Definition: IfxCan_Can.h:729
IfxCan_Can_TxConfig
Structure for Tx handle Configuration.
Definition: IfxCan_Can.h:684
IfxCan_Can_InterruptConfig::errorPassiveEnabled
boolean errorPassiveEnabled
Error Passive Interrupt enable/Disable.
Definition: IfxCan_Can.h:631
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:151
IfxCan_Can_BaudRate::samplePoint
uint16 samplePoint
Specifies the baud rate. Unit: baud.
Definition: IfxCan_Can.h:565
IfxCan_Can_RxConfig::rxFifo1Size
uint8 rxFifo1Size
Rx FIFO 1 Size.
Definition: IfxCan_Can.h:679
IfxCan_Message
Structure for CAN Message configuration (transmit/receive)
Definition: IfxCan.h:531
IfxCan_Can_InterruptConfig::errorLoggingOverflowEnabled
boolean errorLoggingOverflowEnabled
Error Logging Overflow Interrupt enable/Disable.
Definition: IfxCan_Can.h:630
IfxCan_NonMatchingFrame
IfxCan_NonMatchingFrame
Indicate the action to be taken with the messages which do not match with any element of the filter...
Definition: IfxCan.h:303
IfxCan_Can_InterruptConfig::txEventFifoEventLostEnabled
boolean txEventFifoEventLostEnabled
Tx Event FIFO Event Lost Interrupt enable/Disable.
Definition: IfxCan_Can.h:625
IfxCan_Can_FastBaudRate::tranceiverDelayOffset
uint8 tranceiverDelayOffset
transceiver delay compensation offset
Definition: IfxCan_Can.h:582
IfxCan_Can_getRxFifo0FillLevel
IFX_INLINE uint8 IfxCan_Can_getRxFifo0FillLevel(IfxCan_Can_Node *node)
Returns Rx FIFO 1 Fill Level.
Definition: IfxCan_Can.h:936
IfxCan.h
CAN basic functionality.
IfxCan_Can_RxConfig::rxFifo0OperatingMode
IfxCan_RxFifoMode rxFifo0OperatingMode
Rx FIFO 0 operating mode.
Definition: IfxCan_Can.h:674
IfxCan_Node_isNodeSynchronized
IFX_INLINE boolean IfxCan_Node_isNodeSynchronized(Ifx_CAN_N *node)
Returns the status of whether the CAN Node is synchronised or not.
Definition: IfxCan.h:2027
IfxCan_Can_InterruptConfig::loi
IfxCan_GroupInterruptConfig loi
Configuration for Last Error interrupts.
Definition: IfxCan_Can.h:644
IfxCan_MessageRAM
Structure for Message RAM configuration.
Definition: IfxCan.h:548
IfxCan_RxMode
IfxCan_RxMode
Rx Buffers or FIFO 0 or combination Mode of reception.
Definition: IfxCan.h:391
IfxCan_Can_Node
Node handle.
Definition: IfxCan_Can.h:713
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxCan_Can_Pins::rxPin
IfxCan_Rxd_In * rxPin
Specifies the receive pin.
Definition: IfxCan_Can.h:661
IfxCan_Can_FilterConfig::messageIdLength
IfxCan_MessageIdLength messageIdLength
Message Id length (Standard / Extended)
Definition: IfxCan_Can.h:589
IfxCan_Can_InterruptConfig::protocolErrorDataEnabled
boolean protocolErrorDataEnabled
Protocol Error in Data phase Interrupt enable/Disable.
Definition: IfxCan_Can.h:636
IfxCan_Can_InterruptConfig::reint
IfxCan_GroupInterruptConfig reint
Configuration for iMessage stored in dedicated receive buffer interrupts.
Definition: IfxCan_Can.h:645
IfxCan_Can_FilterConfig::extendedFilterForNonMatchingFrames
IfxCan_NonMatchingFrame extendedFilterForNonMatchingFrames
action to be taken on the frames with ids, which are not matching with the extended filter...
Definition: IfxCan_Can.h:595
IfxCan_Can_Frame::mode
IfxCan_FrameMode mode
Specifies the frame mode.
Definition: IfxCan_Can.h:603
IfxCan_Can_InterruptConfig::protocolErrorArbitrationEnabled
boolean protocolErrorArbitrationEnabled
Protocol Error in Arbitration phase Interrupt enable/Disable.
Definition: IfxCan_Can.h:635
IfxCan_Can_InterruptConfig::messageRAMAccessFailureEnabled
boolean messageRAMAccessFailureEnabled
Message RAM Access Failure Interrupt enable/Disable.
Definition: IfxCan_Can.h:627
IfxCan_Can_InterruptConfig::boff
IfxCan_GroupInterruptConfig boff
Configuration for Bus Off interrupt.
Definition: IfxCan_Can.h:643
IfxCan_Can_InterruptConfig
Structure for Interrupt configuration.
Definition: IfxCan_Can.h:608
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:81
IfxCan_Can_Config
Configuration Structure of the Module.
Definition: IfxCan_Can.h:706
IfxCan_Can_InterruptConfig::hpe
IfxCan_GroupInterruptConfig hpe
Configuration for High Priority Events interrupts.
Definition: IfxCan_Can.h:638
IfxCan_Can_NodeConfig::calculateBitTimingValues
boolean calculateBitTimingValues
Enable / Disable auto calculation of bit timing values for selected CAN node.
Definition: IfxCan_Can.h:738
IfxCan_Can_InterruptConfig::moer
IfxCan_GroupInterruptConfig moer
Configuration for Module errors interrupts.
Definition: IfxCan_Can.h:641
IfxCan_Can_InterruptConfig::traco
IfxCan_GroupInterruptConfig traco
Configuration for interrupts of the transmission control.
Definition: IfxCan_Can.h:652
IfxCan_Can_Pins::rxPinMode
IfxPort_InputMode rxPinMode
Specifies the receive pin as input mode IfxPort_InputMode_noPullDevice.
Definition: IfxCan_Can.h:662
IfxCan_Can_NodeConfig::frame
IfxCan_Can_Frame frame
Structure for Frame Configuration.
Definition: IfxCan_Can.h:728
IfxCan_Can_FilterConfig::standardListSize
uint8 standardListSize
List Size Standard.
Definition: IfxCan_Can.h:590
IfxCan_Status
IfxCan_Status
CAN API status definition.
Definition: IfxCan.h:412
IfxCan_Can_Node::node
Ifx_CAN_N * node
Specifies the pointer to the CAN Node registers.
Definition: IfxCan_Can.h:716
IfxCan_Can_Pins::padDriver
IfxPort_PadDriver padDriver
Pad driver IfxPort_PadDriver_cmosAutomotiveSpeed2.
Definition: IfxCan_Can.h:663
IfxCan_Node_isTxFifoQueueFull
IFX_INLINE boolean IfxCan_Node_isTxFifoQueueFull(Ifx_CAN_N *node)
Returns the status of Tx Fifo/Queue is full or not.
Definition: IfxCan.h:2068
IfxCan_Can_TxConfig::txFifoQueueSize
uint8 txFifoQueueSize
Transmit FIFO/Queue Size.
Definition: IfxCan_Can.h:688
IfxCan_Can_initModule
IFX_EXTERN void IfxCan_Can_initModule(IfxCan_Can *can, IfxCan_Can_Config *config)
Initialises the CAN Module.
Definition: IfxCan_Can.c:74
IfxCan_Can_FilterConfig::extendedListSize
uint8 extendedListSize
List Size Extended.
Definition: IfxCan_Can.h:591
IfxCan_Can_InterruptConfig::messageStoredToDedicatedRxBufferEnabled
boolean messageStoredToDedicatedRxBufferEnabled
Message stored to Dedicated Rx Buffer Interrupt enable/Disable.
Definition: IfxCan_Can.h:629
IfxCan_Can_NodeConfig::interruptConfig
IfxCan_Can_InterruptConfig interruptConfig
Structure for Interrupt configuration.
Definition: IfxCan_Can.h:735
IfxCan_Can_InterruptConfig::txEventFifoWatermarkEnabled
boolean txEventFifoWatermarkEnabled
Tx Event FIFO Watermark Reached Interrupt enable/Disable.
Definition: IfxCan_Can.h:623
IfxCan_Can_InterruptConfig::wati
IfxCan_GroupInterruptConfig wati
Configuration for Watermark interrupts.
Definition: IfxCan_Can.h:639
IfxCan_Can_NodeConfig::txConfig
IfxCan_Can_TxConfig txConfig
Structure for Tx handle Configuration.
Definition: IfxCan_Can.h:731
IfxCan_Filter
tructure for Filter configuration
Definition: IfxCan.h:510
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxCan_Can_Pins::txPin
IfxCan_Txd_Out * txPin
Specifies the transmit pin.
Definition: IfxCan_Can.h:659
IfxCan_Can_InterruptConfig::rxFifo1MessageLostEnabled
boolean rxFifo1MessageLostEnabled
Rx FIFO 1 Message Lost Interrupt enable/Disable.
Definition: IfxCan_Can.h:617
IfxCan_Can_InterruptConfig::rxf0n
IfxCan_GroupInterruptConfig rxf0n
Configuration for Receive FIFO0 new message interrupts.
Definition: IfxCan_Can.h:649
IfxCan_Can_initModuleConfig
IFX_EXTERN void IfxCan_Can_initModuleConfig(IfxCan_Can_Config *config, Ifx_CAN *can)
Fills the configuration stucture of the CAN Module with default values.
Definition: IfxCan_Can.c:87
IfxCan_Can_NodeConfig::rxConfig
IfxCan_Can_RxConfig rxConfig
Structure for Rx handle Configuration.
Definition: IfxCan_Can.h:733
IfxCan_Can_InterruptConfig::txFifoEmptyEnabled
boolean txFifoEmptyEnabled
Tx FIFO Empty Interrupt enable/Disable.
Definition: IfxCan_Can.h:621
IfxCan_Can_setStandardFilter
IFX_EXTERN void IfxCan_Can_setStandardFilter(IfxCan_Can_Node *node, IfxCan_Filter *filter)
Sets the Standard Filter element configuration.
Definition: IfxCan_Can.c:947
IfxCan_Can_NodeConfig
Configuration Structure of the Node.
Definition: IfxCan_Can.h:723


iLLD_TC38A: IfxCan_PinMap.c Source File

  • _PinMap
IfxCan_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxCan_PinMap.c
3 * \brief CAN I/O map
4 * \ingroup IfxLld_Can
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "IfxCan_PinMap.h"
44
45 IfxCan_Rxd_In IfxCan_RXD00A_P02_1_IN = {&MODULE_CAN0, IfxCan_NodeId_0, {&MODULE_P02, 1}, Ifx_RxSel_a};
46 IfxCan_Rxd_In IfxCan_RXD00B_P20_7_IN = {&MODULE_CAN0, IfxCan_NodeId_0, {&MODULE_P20, 7}, Ifx_RxSel_b};
47 IfxCan_Rxd_In IfxCan_RXD00C_P12_0_IN = {&MODULE_CAN0, IfxCan_NodeId_0, {&MODULE_P12, 0}, Ifx_RxSel_c};
48 IfxCan_Rxd_In IfxCan_RXD00D_P33_12_IN = {&MODULE_CAN0, IfxCan_NodeId_0, {&MODULE_P33,12}, Ifx_RxSel_d};
49 IfxCan_Rxd_In IfxCan_RXD00E_P33_7_IN = {&MODULE_CAN0, IfxCan_NodeId_0, {&MODULE_P33, 7}, Ifx_RxSel_e};
50 IfxCan_Rxd_In IfxCan_RXD00F_P01_8_IN = {&MODULE_CAN0, IfxCan_NodeId_0, {&MODULE_P01, 8}, Ifx_RxSel_f};
51 IfxCan_Rxd_In IfxCan_RXD00G_P34_2_IN = {&MODULE_CAN0, IfxCan_NodeId_0, {&MODULE_P34, 2}, Ifx_RxSel_g};
52 IfxCan_Rxd_In IfxCan_RXD00H_P02_14_IN = {&MODULE_CAN0, IfxCan_NodeId_0, {&MODULE_P02,14}, Ifx_RxSel_h};
53 IfxCan_Rxd_In IfxCan_RXD01A_P15_3_IN = {&MODULE_CAN0, IfxCan_NodeId_1, {&MODULE_P15, 3}, Ifx_RxSel_a};
54 IfxCan_Rxd_In IfxCan_RXD01B_P14_1_IN = {&MODULE_CAN0, IfxCan_NodeId_1, {&MODULE_P14, 1}, Ifx_RxSel_b};
55 IfxCan_Rxd_In IfxCan_RXD01C_P01_4_IN = {&MODULE_CAN0, IfxCan_NodeId_1, {&MODULE_P01, 4}, Ifx_RxSel_c};
56 IfxCan_Rxd_In IfxCan_RXD01D_P33_10_IN = {&MODULE_CAN0, IfxCan_NodeId_1, {&MODULE_P33,10}, Ifx_RxSel_d};
57 IfxCan_Rxd_In IfxCan_RXD01E_P02_10_IN = {&MODULE_CAN0, IfxCan_NodeId_1, {&MODULE_P02,10}, Ifx_RxSel_e};
58 IfxCan_Rxd_In IfxCan_RXD02A_P15_1_IN = {&MODULE_CAN0, IfxCan_NodeId_2, {&MODULE_P15, 1}, Ifx_RxSel_a};
59 IfxCan_Rxd_In IfxCan_RXD02B_P02_3_IN = {&MODULE_CAN0, IfxCan_NodeId_2, {&MODULE_P02, 3}, Ifx_RxSel_b};
60 IfxCan_Rxd_In IfxCan_RXD02C_P32_6_IN = {&MODULE_CAN0, IfxCan_NodeId_2, {&MODULE_P32, 6}, Ifx_RxSel_c};
61 IfxCan_Rxd_In IfxCan_RXD02D_P14_8_IN = {&MODULE_CAN0, IfxCan_NodeId_2, {&MODULE_P14, 8}, Ifx_RxSel_d};
62 IfxCan_Rxd_In IfxCan_RXD02E_P10_2_IN = {&MODULE_CAN0, IfxCan_NodeId_2, {&MODULE_P10, 2}, Ifx_RxSel_e};
63 IfxCan_Rxd_In IfxCan_RXD03A_P00_3_IN = {&MODULE_CAN0, IfxCan_NodeId_3, {&MODULE_P00, 3}, Ifx_RxSel_a};
64 IfxCan_Rxd_In IfxCan_RXD03B_P32_2_IN = {&MODULE_CAN0, IfxCan_NodeId_3, {&MODULE_P32, 2}, Ifx_RxSel_b};
65 IfxCan_Rxd_In IfxCan_RXD03C_P20_0_IN = {&MODULE_CAN0, IfxCan_NodeId_3, {&MODULE_P20, 0}, Ifx_RxSel_c};
66 IfxCan_Rxd_In IfxCan_RXD03D_P11_10_IN = {&MODULE_CAN0, IfxCan_NodeId_3, {&MODULE_P11,10}, Ifx_RxSel_d};
67 IfxCan_Rxd_In IfxCan_RXD03E_P20_9_IN = {&MODULE_CAN0, IfxCan_NodeId_3, {&MODULE_P20, 9}, Ifx_RxSel_e};
68 IfxCan_Rxd_In IfxCan_RXD03F_P01_0_IN = {&MODULE_CAN0, IfxCan_NodeId_3, {&MODULE_P01, 0}, Ifx_RxSel_f};
69 IfxCan_Rxd_In IfxCan_RXD10A_P00_1_IN = {&MODULE_CAN1, IfxCan_NodeId_0, {&MODULE_P00, 1}, Ifx_RxSel_a};
70 IfxCan_Rxd_In IfxCan_RXD10B_P14_7_IN = {&MODULE_CAN1, IfxCan_NodeId_0, {&MODULE_P14, 7}, Ifx_RxSel_b};
71 IfxCan_Rxd_In IfxCan_RXD10C_P23_0_IN = {&MODULE_CAN1, IfxCan_NodeId_0, {&MODULE_P23, 0}, Ifx_RxSel_c};
72 IfxCan_Rxd_In IfxCan_RXD10D_P13_1_IN = {&MODULE_CAN1, IfxCan_NodeId_0, {&MODULE_P13, 1}, Ifx_RxSel_d};
73 IfxCan_Rxd_In IfxCan_RXD11A_P02_4_IN = {&MODULE_CAN1, IfxCan_NodeId_1, {&MODULE_P02, 4}, Ifx_RxSel_a};
74 IfxCan_Rxd_In IfxCan_RXD11B_P00_5_IN = {&MODULE_CAN1, IfxCan_NodeId_1, {&MODULE_P00, 5}, Ifx_RxSel_b};
75 IfxCan_Rxd_In IfxCan_RXD11C_P23_7_IN = {&MODULE_CAN1, IfxCan_NodeId_1, {&MODULE_P23, 7}, Ifx_RxSel_c};
76 IfxCan_Rxd_In IfxCan_RXD11D_P11_7_IN = {&MODULE_CAN1, IfxCan_NodeId_1, {&MODULE_P11, 7}, Ifx_RxSel_d};
77 IfxCan_Rxd_In IfxCan_RXD12A_P20_6_IN = {&MODULE_CAN1, IfxCan_NodeId_2, {&MODULE_P20, 6}, Ifx_RxSel_a};
78 IfxCan_Rxd_In IfxCan_RXD12B_P10_8_IN = {&MODULE_CAN1, IfxCan_NodeId_2, {&MODULE_P10, 8}, Ifx_RxSel_b};
79 IfxCan_Rxd_In IfxCan_RXD12C_P23_3_IN = {&MODULE_CAN1, IfxCan_NodeId_2, {&MODULE_P23, 3}, Ifx_RxSel_c};
80 IfxCan_Rxd_In IfxCan_RXD12D_P11_8_IN = {&MODULE_CAN1, IfxCan_NodeId_2, {&MODULE_P11, 8}, Ifx_RxSel_d};
81 IfxCan_Rxd_In IfxCan_RXD13A_P14_7_IN = {&MODULE_CAN1, IfxCan_NodeId_3, {&MODULE_P14, 7}, Ifx_RxSel_a};
82 IfxCan_Rxd_In IfxCan_RXD13B_P33_5_IN = {&MODULE_CAN1, IfxCan_NodeId_3, {&MODULE_P33, 5}, Ifx_RxSel_b};
83 IfxCan_Rxd_In IfxCan_RXD13C_P22_5_IN = {&MODULE_CAN1, IfxCan_NodeId_3, {&MODULE_P22, 5}, Ifx_RxSel_c};
84 IfxCan_Rxd_In IfxCan_RXD13D_P11_13_IN = {&MODULE_CAN1, IfxCan_NodeId_3, {&MODULE_P11,13}, Ifx_RxSel_d};
85 IfxCan_Rxd_In IfxCan_RXD20A_P10_5_IN = {&MODULE_CAN2, IfxCan_NodeId_0, {&MODULE_P10, 5}, Ifx_RxSel_a};
86 IfxCan_Rxd_In IfxCan_RXD20B_P10_8_IN = {&MODULE_CAN2, IfxCan_NodeId_0, {&MODULE_P10, 8}, Ifx_RxSel_b};
87 IfxCan_Rxd_In IfxCan_RXD20C_P34_2_IN = {&MODULE_CAN2, IfxCan_NodeId_0, {&MODULE_P34, 2}, Ifx_RxSel_c};
88 IfxCan_Rxd_In IfxCan_RXD20D_P02_14_IN = {&MODULE_CAN2, IfxCan_NodeId_0, {&MODULE_P02,14}, Ifx_RxSel_d};
89 IfxCan_Rxd_In IfxCan_RXD20E_P01_8_IN = {&MODULE_CAN2, IfxCan_NodeId_0, {&MODULE_P01, 8}, Ifx_RxSel_e};
90 IfxCan_Rxd_In IfxCan_RXD20F_P11_14_IN = {&MODULE_CAN2, IfxCan_NodeId_0, {&MODULE_P11,14}, Ifx_RxSel_f};
91 IfxCan_Rxd_In IfxCan_RXD21A_P00_3_IN = {&MODULE_CAN2, IfxCan_NodeId_1, {&MODULE_P00, 3}, Ifx_RxSel_a};
92 IfxCan_Rxd_In IfxCan_RXD21B_P13_12_IN = {&MODULE_CAN2, IfxCan_NodeId_1, {&MODULE_P13,12}, Ifx_RxSel_b};
93 IfxCan_Rxd_In IfxCan_RXD21C_P20_0_IN = {&MODULE_CAN2, IfxCan_NodeId_1, {&MODULE_P20, 0}, Ifx_RxSel_c};
94 IfxCan_Rxd_In IfxCan_RXD21D_P32_2_IN = {&MODULE_CAN2, IfxCan_NodeId_1, {&MODULE_P32, 2}, Ifx_RxSel_d};
95 IfxCan_Rxd_In IfxCan_RXD21E_P01_0_IN = {&MODULE_CAN2, IfxCan_NodeId_1, {&MODULE_P01, 0}, Ifx_RxSel_e};
96 IfxCan_Rxd_In IfxCan_RXD21F_P22_7_IN = {&MODULE_CAN2, IfxCan_NodeId_1, {&MODULE_P22, 7}, Ifx_RxSel_f};
97 IfxCan_Rxd_In IfxCan_RXD22A_P33_13_IN = {&MODULE_CAN2, IfxCan_NodeId_2, {&MODULE_P33,13}, Ifx_RxSel_a};
98 IfxCan_Rxd_In IfxCan_RXD22B_P32_7_IN = {&MODULE_CAN2, IfxCan_NodeId_2, {&MODULE_P32, 7}, Ifx_RxSel_b};
99 IfxCan_Rxd_In IfxCan_RXD22C_P23_6_IN = {&MODULE_CAN2, IfxCan_NodeId_2, {&MODULE_P23, 6}, Ifx_RxSel_c};
100 IfxCan_Rxd_In IfxCan_RXD22D_P14_14_IN = {&MODULE_CAN2, IfxCan_NodeId_2, {&MODULE_P14,14}, Ifx_RxSel_d};
101 IfxCan_Rxd_In IfxCan_RXD22E_P22_9_IN = {&MODULE_CAN2, IfxCan_NodeId_2, {&MODULE_P22, 9}, Ifx_RxSel_e};
102 IfxCan_Rxd_In IfxCan_RXD23A_P14_10_IN = {&MODULE_CAN2, IfxCan_NodeId_3, {&MODULE_P14,10}, Ifx_RxSel_a};
103 IfxCan_Rxd_In IfxCan_RXD23B_P23_3_IN = {&MODULE_CAN2, IfxCan_NodeId_3, {&MODULE_P23, 3}, Ifx_RxSel_b};
104 IfxCan_Rxd_In IfxCan_RXD23C_P14_15_IN = {&MODULE_CAN2, IfxCan_NodeId_3, {&MODULE_P14,15}, Ifx_RxSel_c};
105 IfxCan_Rxd_In IfxCan_RXD23D_P13_5_IN = {&MODULE_CAN2, IfxCan_NodeId_3, {&MODULE_P13, 5}, Ifx_RxSel_d};
106 IfxCan_Rxd_In IfxCan_RXD23E_P22_11_IN = {&MODULE_CAN2, IfxCan_NodeId_3, {&MODULE_P22,11}, Ifx_RxSel_e};
107 IfxCan_Txd_Out IfxCan_TXD00_P01_13_OUT = {&MODULE_CAN0, IfxCan_NodeId_0, {&MODULE_P01,13}, IfxPort_OutputIdx_alt4};
108 IfxCan_Txd_Out IfxCan_TXD00_P02_0_OUT = {&MODULE_CAN0, IfxCan_NodeId_0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt5};
109 IfxCan_Txd_Out IfxCan_TXD00_P02_13_OUT = {&MODULE_CAN0, IfxCan_NodeId_0, {&MODULE_P02,13}, IfxPort_OutputIdx_alt4};
110 IfxCan_Txd_Out IfxCan_TXD00_P12_1_OUT = {&MODULE_CAN0, IfxCan_NodeId_0, {&MODULE_P12, 1}, IfxPort_OutputIdx_alt5};
111 IfxCan_Txd_Out IfxCan_TXD00_P20_8_OUT = {&MODULE_CAN0, IfxCan_NodeId_0, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt5};
112 IfxCan_Txd_Out IfxCan_TXD00_P33_13_OUT = {&MODULE_CAN0, IfxCan_NodeId_0, {&MODULE_P33,13}, IfxPort_OutputIdx_alt5};
113 IfxCan_Txd_Out IfxCan_TXD00_P33_8_OUT = {&MODULE_CAN0, IfxCan_NodeId_0, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt5};
114 IfxCan_Txd_Out IfxCan_TXD00_P34_1_OUT = {&MODULE_CAN0, IfxCan_NodeId_0, {&MODULE_P34, 1}, IfxPort_OutputIdx_alt4};
115 IfxCan_Txd_Out IfxCan_TXD01_P01_3_OUT = {&MODULE_CAN0, IfxCan_NodeId_1, {&MODULE_P01, 3}, IfxPort_OutputIdx_alt5};
116 IfxCan_Txd_Out IfxCan_TXD01_P02_9_OUT = {&MODULE_CAN0, IfxCan_NodeId_1, {&MODULE_P02, 9}, IfxPort_OutputIdx_alt5};
117 IfxCan_Txd_Out IfxCan_TXD01_P14_0_OUT = {&MODULE_CAN0, IfxCan_NodeId_1, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt5};
118 IfxCan_Txd_Out IfxCan_TXD01_P15_2_OUT = {&MODULE_CAN0, IfxCan_NodeId_1, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt5};
119 IfxCan_Txd_Out IfxCan_TXD01_P33_9_OUT = {&MODULE_CAN0, IfxCan_NodeId_1, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt5};
120 IfxCan_Txd_Out IfxCan_TXD02_P02_2_OUT = {&MODULE_CAN0, IfxCan_NodeId_2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt5};
121 IfxCan_Txd_Out IfxCan_TXD02_P10_3_OUT = {&MODULE_CAN0, IfxCan_NodeId_2, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt6};
122 IfxCan_Txd_Out IfxCan_TXD02_P14_10_OUT = {&MODULE_CAN0, IfxCan_NodeId_2, {&MODULE_P14,10}, IfxPort_OutputIdx_alt5};
123 IfxCan_Txd_Out IfxCan_TXD02_P15_0_OUT = {&MODULE_CAN0, IfxCan_NodeId_2, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt5};
124 IfxCan_Txd_Out IfxCan_TXD02_P32_5_OUT = {&MODULE_CAN0, IfxCan_NodeId_2, {&MODULE_P32, 5}, IfxPort_OutputIdx_alt6};
125 IfxCan_Txd_Out IfxCan_TXD03_P00_2_OUT = {&MODULE_CAN0, IfxCan_NodeId_3, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt5};
126 IfxCan_Txd_Out IfxCan_TXD03_P01_2_OUT = {&MODULE_CAN0, IfxCan_NodeId_3, {&MODULE_P01, 2}, IfxPort_OutputIdx_alt3};
127 IfxCan_Txd_Out IfxCan_TXD03_P11_12_OUT = {&MODULE_CAN0, IfxCan_NodeId_3, {&MODULE_P11,12}, IfxPort_OutputIdx_alt5};
128 IfxCan_Txd_Out IfxCan_TXD03_P20_10_OUT = {&MODULE_CAN0, IfxCan_NodeId_3, {&MODULE_P20,10}, IfxPort_OutputIdx_alt5};
129 IfxCan_Txd_Out IfxCan_TXD03_P20_3_OUT = {&MODULE_CAN0, IfxCan_NodeId_3, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt5};
130 IfxCan_Txd_Out IfxCan_TXD03_P32_3_OUT = {&MODULE_CAN0, IfxCan_NodeId_3, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt5};
131 IfxCan_Txd_Out IfxCan_TXD10_P00_0_OUT = {&MODULE_CAN1, IfxCan_NodeId_0, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt5};
132 IfxCan_Txd_Out IfxCan_TXD10_P13_0_OUT = {&MODULE_CAN1, IfxCan_NodeId_0, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt7};
133 IfxCan_Txd_Out IfxCan_TXD10_P14_9_OUT = {&MODULE_CAN1, IfxCan_NodeId_0, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt4};
134 IfxCan_Txd_Out IfxCan_TXD10_P23_1_OUT = {&MODULE_CAN1, IfxCan_NodeId_0, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt5};
135 IfxCan_Txd_Out IfxCan_TXD11_P00_4_OUT = {&MODULE_CAN1, IfxCan_NodeId_1, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt3};
136 IfxCan_Txd_Out IfxCan_TXD11_P02_5_OUT = {&MODULE_CAN1, IfxCan_NodeId_1, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt2};
137 IfxCan_Txd_Out IfxCan_TXD11_P11_0_OUT = {&MODULE_CAN1, IfxCan_NodeId_1, {&MODULE_P11, 0}, IfxPort_OutputIdx_alt5};
138 IfxCan_Txd_Out IfxCan_TXD11_P23_6_OUT = {&MODULE_CAN1, IfxCan_NodeId_1, {&MODULE_P23, 6}, IfxPort_OutputIdx_alt5};
139 IfxCan_Txd_Out IfxCan_TXD12_P10_7_OUT = {&MODULE_CAN1, IfxCan_NodeId_2, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt6};
140 IfxCan_Txd_Out IfxCan_TXD12_P11_1_OUT = {&MODULE_CAN1, IfxCan_NodeId_2, {&MODULE_P11, 1}, IfxPort_OutputIdx_alt5};
141 IfxCan_Txd_Out IfxCan_TXD12_P20_7_OUT = {&MODULE_CAN1, IfxCan_NodeId_2, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt5};
142 IfxCan_Txd_Out IfxCan_TXD12_P23_2_OUT = {&MODULE_CAN1, IfxCan_NodeId_2, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt5};
143 IfxCan_Txd_Out IfxCan_TXD13_P11_4_OUT = {&MODULE_CAN1, IfxCan_NodeId_3, {&MODULE_P11, 4}, IfxPort_OutputIdx_alt5};
144 IfxCan_Txd_Out IfxCan_TXD13_P14_6_OUT = {&MODULE_CAN1, IfxCan_NodeId_3, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt4};
145 IfxCan_Txd_Out IfxCan_TXD13_P22_4_OUT = {&MODULE_CAN1, IfxCan_NodeId_3, {&MODULE_P22, 4}, IfxPort_OutputIdx_alt6};
146 IfxCan_Txd_Out IfxCan_TXD13_P33_4_OUT = {&MODULE_CAN1, IfxCan_NodeId_3, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt7};
147 IfxCan_Txd_Out IfxCan_TXD20_P01_13_OUT = {&MODULE_CAN2, IfxCan_NodeId_0, {&MODULE_P01,13}, IfxPort_OutputIdx_alt5};
148 IfxCan_Txd_Out IfxCan_TXD20_P02_13_OUT = {&MODULE_CAN2, IfxCan_NodeId_0, {&MODULE_P02,13}, IfxPort_OutputIdx_alt5};
149 IfxCan_Txd_Out IfxCan_TXD20_P10_6_OUT = {&MODULE_CAN2, IfxCan_NodeId_0, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt5};
150 IfxCan_Txd_Out IfxCan_TXD20_P10_7_OUT = {&MODULE_CAN2, IfxCan_NodeId_0, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt5};
151 IfxCan_Txd_Out IfxCan_TXD20_P11_5_OUT = {&MODULE_CAN2, IfxCan_NodeId_0, {&MODULE_P11, 5}, IfxPort_OutputIdx_alt5};
152 IfxCan_Txd_Out IfxCan_TXD20_P34_1_OUT = {&MODULE_CAN2, IfxCan_NodeId_0, {&MODULE_P34, 1}, IfxPort_OutputIdx_alt5};
153 IfxCan_Txd_Out IfxCan_TXD21_P00_2_OUT = {&MODULE_CAN2, IfxCan_NodeId_1, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt3};
154 IfxCan_Txd_Out IfxCan_TXD21_P01_2_OUT = {&MODULE_CAN2, IfxCan_NodeId_1, {&MODULE_P01, 2}, IfxPort_OutputIdx_alt5};
155 IfxCan_Txd_Out IfxCan_TXD21_P13_9_OUT = {&MODULE_CAN2, IfxCan_NodeId_1, {&MODULE_P13, 9}, IfxPort_OutputIdx_alt5};
156 IfxCan_Txd_Out IfxCan_TXD21_P20_3_OUT = {&MODULE_CAN2, IfxCan_NodeId_1, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt6};
157 IfxCan_Txd_Out IfxCan_TXD21_P22_6_OUT = {&MODULE_CAN2, IfxCan_NodeId_1, {&MODULE_P22, 6}, IfxPort_OutputIdx_alt5};
158 IfxCan_Txd_Out IfxCan_TXD21_P32_3_OUT = {&MODULE_CAN2, IfxCan_NodeId_1, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt6};
159 IfxCan_Txd_Out IfxCan_TXD22_P14_13_OUT = {&MODULE_CAN2, IfxCan_NodeId_2, {&MODULE_P14,13}, IfxPort_OutputIdx_alt5};
160 IfxCan_Txd_Out IfxCan_TXD22_P22_8_OUT = {&MODULE_CAN2, IfxCan_NodeId_2, {&MODULE_P22, 8}, IfxPort_OutputIdx_alt5};
161 IfxCan_Txd_Out IfxCan_TXD22_P23_5_OUT = {&MODULE_CAN2, IfxCan_NodeId_2, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt6};
162 IfxCan_Txd_Out IfxCan_TXD22_P32_6_OUT = {&MODULE_CAN2, IfxCan_NodeId_2, {&MODULE_P32, 6}, IfxPort_OutputIdx_alt5};
163 IfxCan_Txd_Out IfxCan_TXD22_P33_12_OUT = {&MODULE_CAN2, IfxCan_NodeId_2, {&MODULE_P33,12}, IfxPort_OutputIdx_alt5};
164 IfxCan_Txd_Out IfxCan_TXD23_P13_4_OUT = {&MODULE_CAN2, IfxCan_NodeId_3, {&MODULE_P13, 4}, IfxPort_OutputIdx_alt7};
165 IfxCan_Txd_Out IfxCan_TXD23_P14_14_OUT = {&MODULE_CAN2, IfxCan_NodeId_3, {&MODULE_P14,14}, IfxPort_OutputIdx_alt5};
166 IfxCan_Txd_Out IfxCan_TXD23_P14_9_OUT = {&MODULE_CAN2, IfxCan_NodeId_3, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt2};
167 IfxCan_Txd_Out IfxCan_TXD23_P22_10_OUT = {&MODULE_CAN2, IfxCan_NodeId_3, {&MODULE_P22,10}, IfxPort_OutputIdx_alt5};
168 IfxCan_Txd_Out IfxCan_TXD23_P23_2_OUT = {&MODULE_CAN2, IfxCan_NodeId_3, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt4};
169
170
171 const IfxCan_Rxd_In *IfxCan_Rxd_In_pinTable[IFXCAN_PINMAP_NUM_MODULES][IFXCAN_PINMAP_NUM_NODES][IFXCAN_PINMAP_RXD_IN_NUM_ITEMS] = {
172 {
173 {
174 &IfxCan_RXD00A_P02_1_IN,
175 &IfxCan_RXD00B_P20_7_IN,
176 &IfxCan_RXD00C_P12_0_IN,
177 &IfxCan_RXD00D_P33_12_IN,
178 &IfxCan_RXD00E_P33_7_IN,
179 &IfxCan_RXD00F_P01_8_IN,
180 &IfxCan_RXD00G_P34_2_IN,
181 &IfxCan_RXD00H_P02_14_IN
182 },
183 {
184 &IfxCan_RXD01A_P15_3_IN,
185 &IfxCan_RXD01B_P14_1_IN,
186 &IfxCan_RXD01C_P01_4_IN,
187 &IfxCan_RXD01D_P33_10_IN,
188 &IfxCan_RXD01E_P02_10_IN,
189 NULL_PTR,
190 NULL_PTR,
191 NULL_PTR
192 },
193 {
194 &IfxCan_RXD02A_P15_1_IN,
195 &IfxCan_RXD02B_P02_3_IN,
196 &IfxCan_RXD02C_P32_6_IN,
197 &IfxCan_RXD02D_P14_8_IN,
198 &IfxCan_RXD02E_P10_2_IN,
199 NULL_PTR,
200 NULL_PTR,
201 NULL_PTR
202 },
203 {
204 &IfxCan_RXD03A_P00_3_IN,
205 &IfxCan_RXD03B_P32_2_IN,
206 &IfxCan_RXD03C_P20_0_IN,
207 &IfxCan_RXD03D_P11_10_IN,
208 &IfxCan_RXD03E_P20_9_IN,
209 &IfxCan_RXD03F_P01_0_IN,
210 NULL_PTR,
211 NULL_PTR
212 }
213 },
214 {
215 {
216 &IfxCan_RXD10A_P00_1_IN,
217 &IfxCan_RXD10B_P14_7_IN,
218 &IfxCan_RXD10C_P23_0_IN,
219 &IfxCan_RXD10D_P13_1_IN,
220 NULL_PTR,
221 NULL_PTR,
222 NULL_PTR,
223 NULL_PTR
224 },
225 {
226 &IfxCan_RXD11A_P02_4_IN,
227 &IfxCan_RXD11B_P00_5_IN,
228 &IfxCan_RXD11C_P23_7_IN,
229 &IfxCan_RXD11D_P11_7_IN,
230 NULL_PTR,
231 NULL_PTR,
232 NULL_PTR,
233 NULL_PTR
234 },
235 {
236 &IfxCan_RXD12A_P20_6_IN,
237 &IfxCan_RXD12B_P10_8_IN,
238 &IfxCan_RXD12C_P23_3_IN,
239 &IfxCan_RXD12D_P11_8_IN,
240 NULL_PTR,
241 NULL_PTR,
242 NULL_PTR,
243 NULL_PTR
244 },
245 {
246 &IfxCan_RXD13A_P14_7_IN,
247 &IfxCan_RXD13B_P33_5_IN,
248 &IfxCan_RXD13C_P22_5_IN,
249 &IfxCan_RXD13D_P11_13_IN,
250 NULL_PTR,
251 NULL_PTR,
252 NULL_PTR,
253 NULL_PTR
254 }
255 },
256 {
257 {
258 &IfxCan_RXD20A_P10_5_IN,
259 &IfxCan_RXD20B_P10_8_IN,
260 &IfxCan_RXD20C_P34_2_IN,
261 &IfxCan_RXD20D_P02_14_IN,
262 &IfxCan_RXD20E_P01_8_IN,
263 &IfxCan_RXD20F_P11_14_IN,
264 NULL_PTR,
265 NULL_PTR
266 },
267 {
268 &IfxCan_RXD21A_P00_3_IN,
269 &IfxCan_RXD21B_P13_12_IN,
270 &IfxCan_RXD21C_P20_0_IN,
271 &IfxCan_RXD21D_P32_2_IN,
272 &IfxCan_RXD21E_P01_0_IN,
273 &IfxCan_RXD21F_P22_7_IN,
274 NULL_PTR,
275 NULL_PTR
276 },
277 {
278 &IfxCan_RXD22A_P33_13_IN,
279 &IfxCan_RXD22B_P32_7_IN,
280 &IfxCan_RXD22C_P23_6_IN,
281 &IfxCan_RXD22D_P14_14_IN,
282 &IfxCan_RXD22E_P22_9_IN,
283 NULL_PTR,
284 NULL_PTR,
285 NULL_PTR
286 },
287 {
288 &IfxCan_RXD23A_P14_10_IN,
289 &IfxCan_RXD23B_P23_3_IN,
290 &IfxCan_RXD23C_P14_15_IN,
291 &IfxCan_RXD23D_P13_5_IN,
292 &IfxCan_RXD23E_P22_11_IN,
293 NULL_PTR,
294 NULL_PTR,
295 NULL_PTR
296 }
297 }
298 };
299
300 const IfxCan_Txd_Out *IfxCan_Txd_Out_pinTable[IFXCAN_PINMAP_NUM_MODULES][IFXCAN_PINMAP_NUM_NODES][IFXCAN_PINMAP_TXD_OUT_NUM_ITEMS] = {
301 {
302 {
303 &IfxCan_TXD00_P01_13_OUT,
304 &IfxCan_TXD00_P02_0_OUT,
305 &IfxCan_TXD00_P02_13_OUT,
306 &IfxCan_TXD00_P12_1_OUT,
307 &IfxCan_TXD00_P20_8_OUT,
308 &IfxCan_TXD00_P33_8_OUT,
309 &IfxCan_TXD00_P33_13_OUT,
310 &IfxCan_TXD00_P34_1_OUT
311 },
312 {
313 &IfxCan_TXD01_P01_3_OUT,
314 &IfxCan_TXD01_P02_9_OUT,
315 &IfxCan_TXD01_P14_0_OUT,
316 &IfxCan_TXD01_P15_2_OUT,
317 &IfxCan_TXD01_P33_9_OUT,
318 NULL_PTR,
319 NULL_PTR,
320 NULL_PTR
321 },
322 {
323 &IfxCan_TXD02_P02_2_OUT,
324 &IfxCan_TXD02_P10_3_OUT,
325 &IfxCan_TXD02_P14_10_OUT,
326 &IfxCan_TXD02_P15_0_OUT,
327 &IfxCan_TXD02_P32_5_OUT,
328 NULL_PTR,
329 NULL_PTR,
330 NULL_PTR
331 },
332 {
333 &IfxCan_TXD03_P00_2_OUT,
334 &IfxCan_TXD03_P01_2_OUT,
335 &IfxCan_TXD03_P11_12_OUT,
336 &IfxCan_TXD03_P20_3_OUT,
337 &IfxCan_TXD03_P20_10_OUT,
338 &IfxCan_TXD03_P32_3_OUT,
339 NULL_PTR,
340 NULL_PTR
341 }
342 },
343 {
344 {
345 &IfxCan_TXD10_P00_0_OUT,
346 &IfxCan_TXD10_P13_0_OUT,
347 &IfxCan_TXD10_P14_9_OUT,
348 &IfxCan_TXD10_P23_1_OUT,
349 NULL_PTR,
350 NULL_PTR,
351 NULL_PTR,
352 NULL_PTR
353 },
354 {
355 &IfxCan_TXD11_P00_4_OUT,
356 &IfxCan_TXD11_P02_5_OUT,
357 &IfxCan_TXD11_P11_0_OUT,
358 &IfxCan_TXD11_P23_6_OUT,
359 NULL_PTR,
360 NULL_PTR,
361 NULL_PTR,
362 NULL_PTR
363 },
364 {
365 &IfxCan_TXD12_P10_7_OUT,
366 &IfxCan_TXD12_P11_1_OUT,
367 &IfxCan_TXD12_P20_7_OUT,
368 &IfxCan_TXD12_P23_2_OUT,
369 NULL_PTR,
370 NULL_PTR,
371 NULL_PTR,
372 NULL_PTR
373 },
374 {
375 &IfxCan_TXD13_P11_4_OUT,
376 &IfxCan_TXD13_P14_6_OUT,
377 &IfxCan_TXD13_P22_4_OUT,
378 &IfxCan_TXD13_P33_4_OUT,
379 NULL_PTR,
380 NULL_PTR,
381 NULL_PTR,
382 NULL_PTR
383 }
384 },
385 {
386 {
387 &IfxCan_TXD20_P01_13_OUT,
388 &IfxCan_TXD20_P02_13_OUT,
389 &IfxCan_TXD20_P10_6_OUT,
390 &IfxCan_TXD20_P10_7_OUT,
391 &IfxCan_TXD20_P11_5_OUT,
392 &IfxCan_TXD20_P34_1_OUT,
393 NULL_PTR,
394 NULL_PTR
395 },
396 {
397 &IfxCan_TXD21_P00_2_OUT,
398 &IfxCan_TXD21_P01_2_OUT,
399 &IfxCan_TXD21_P13_9_OUT,
400 &IfxCan_TXD21_P20_3_OUT,
401 &IfxCan_TXD21_P22_6_OUT,
402 &IfxCan_TXD21_P32_3_OUT,
403 NULL_PTR,
404 NULL_PTR
405 },
406 {
407 &IfxCan_TXD22_P14_13_OUT,
408 &IfxCan_TXD22_P22_8_OUT,
409 &IfxCan_TXD22_P23_5_OUT,
410 &IfxCan_TXD22_P32_6_OUT,
411 &IfxCan_TXD22_P33_12_OUT,
412 NULL_PTR,
413 NULL_PTR,
414 NULL_PTR
415 },
416 {
417 &IfxCan_TXD23_P13_4_OUT,
418 &IfxCan_TXD23_P14_9_OUT,
419 &IfxCan_TXD23_P14_14_OUT,
420 &IfxCan_TXD23_P22_10_OUT,
421 &IfxCan_TXD23_P23_2_OUT,
422 NULL_PTR,
423 NULL_PTR,
424 NULL_PTR
425 }
426 }
427 };
IfxCan_TXD00_P20_8_OUT
IfxCan_Txd_Out IfxCan_TXD00_P20_8_OUT
Definition: IfxCan_PinMap.c:111
IfxCan_TXD00_P01_13_OUT
IfxCan_Txd_Out IfxCan_TXD00_P01_13_OUT
Definition: IfxCan_PinMap.c:107
IfxCan_RXD11B_P00_5_IN
IfxCan_Rxd_In IfxCan_RXD11B_P00_5_IN
Definition: IfxCan_PinMap.c:74
IfxCan_TXD00_P02_0_OUT
IfxCan_Txd_Out IfxCan_TXD00_P02_0_OUT
Definition: IfxCan_PinMap.c:108
Ifx_RxSel_e
Definition: Ifx_Types.h:133
Ifx_RxSel_d
Definition: Ifx_Types.h:132
IfxCan_RXD23C_P14_15_IN
IfxCan_Rxd_In IfxCan_RXD23C_P14_15_IN
Definition: IfxCan_PinMap.c:104
IFXCAN_PINMAP_RXD_IN_NUM_ITEMS
#define IFXCAN_PINMAP_RXD_IN_NUM_ITEMS
Definition: IfxCan_PinMap.h:201
IfxCan_TXD21_P32_3_OUT
IfxCan_Txd_Out IfxCan_TXD21_P32_3_OUT
Definition: IfxCan_PinMap.c:158
IfxCan_RXD10C_P23_0_IN
IfxCan_Rxd_In IfxCan_RXD10C_P23_0_IN
Definition: IfxCan_PinMap.c:71
IfxCan_RXD11A_P02_4_IN
IfxCan_Rxd_In IfxCan_RXD11A_P02_4_IN
Definition: IfxCan_PinMap.c:73
IfxCan_TXD23_P22_10_OUT
IfxCan_Txd_Out IfxCan_TXD23_P22_10_OUT
Definition: IfxCan_PinMap.c:167
IfxCan_RXD02E_P10_2_IN
IfxCan_Rxd_In IfxCan_RXD02E_P10_2_IN
Definition: IfxCan_PinMap.c:62
Ifx_RxSel_g
Definition: Ifx_Types.h:135
IfxCan_TXD01_P02_9_OUT
IfxCan_Txd_Out IfxCan_TXD01_P02_9_OUT
Definition: IfxCan_PinMap.c:116
IfxCan_RXD23A_P14_10_IN
IfxCan_Rxd_In IfxCan_RXD23A_P14_10_IN
Definition: IfxCan_PinMap.c:102
IfxCan_RXD13A_P14_7_IN
IfxCan_Rxd_In IfxCan_RXD13A_P14_7_IN
Definition: IfxCan_PinMap.c:81
IfxCan_NodeId_1
Node Id 1.
Definition: IfxCan_cfg.h:97
IfxCan_RXD03B_P32_2_IN
IfxCan_Rxd_In IfxCan_RXD03B_P32_2_IN
Definition: IfxCan_PinMap.c:64
IfxCan_RXD00D_P33_12_IN
IfxCan_Rxd_In IfxCan_RXD00D_P33_12_IN
Definition: IfxCan_PinMap.c:48
IfxCan_TXD20_P34_1_OUT
IfxCan_Txd_Out IfxCan_TXD20_P34_1_OUT
Definition: IfxCan_PinMap.c:152
IfxCan_RXD02A_P15_1_IN
IfxCan_Rxd_In IfxCan_RXD02A_P15_1_IN
Definition: IfxCan_PinMap.c:58
IfxCan_TXD13_P22_4_OUT
IfxCan_Txd_Out IfxCan_TXD13_P22_4_OUT
Definition: IfxCan_PinMap.c:145
IfxCan_Rxd_In_pinTable
const IfxCan_Rxd_In * IfxCan_Rxd_In_pinTable[IFXCAN_PINMAP_NUM_MODULES][IFXCAN_PINMAP_NUM_NODES][IFXCAN_PINMAP_RXD_IN_NUM_ITEMS]
Definition: IfxCan_PinMap.c:171
IfxPort_OutputIdx_alt2
Definition: IfxPort.h:130
IfxCan_TXD23_P14_14_OUT
IfxCan_Txd_Out IfxCan_TXD23_P14_14_OUT
Definition: IfxCan_PinMap.c:165
IfxCan_RXD03E_P20_9_IN
IfxCan_Rxd_In IfxCan_RXD03E_P20_9_IN
Definition: IfxCan_PinMap.c:67
Ifx_RxSel_a
Definition: Ifx_Types.h:129
IfxCan_RXD10B_P14_7_IN
IfxCan_Rxd_In IfxCan_RXD10B_P14_7_IN
Definition: IfxCan_PinMap.c:70
IfxCan_RXD21C_P20_0_IN
IfxCan_Rxd_In IfxCan_RXD21C_P20_0_IN
Definition: IfxCan_PinMap.c:93
IfxCan_TXD21_P20_3_OUT
IfxCan_Txd_Out IfxCan_TXD21_P20_3_OUT
Definition: IfxCan_PinMap.c:156
IfxCan_RXD03A_P00_3_IN
IfxCan_Rxd_In IfxCan_RXD03A_P00_3_IN
Definition: IfxCan_PinMap.c:63
IfxCan_TXD11_P02_5_OUT
IfxCan_Txd_Out IfxCan_TXD11_P02_5_OUT
Definition: IfxCan_PinMap.c:136
IfxCan_TXD11_P00_4_OUT
IfxCan_Txd_Out IfxCan_TXD11_P00_4_OUT
Definition: IfxCan_PinMap.c:135
IfxCan_RXD03D_P11_10_IN
IfxCan_Rxd_In IfxCan_RXD03D_P11_10_IN
Definition: IfxCan_PinMap.c:66
IfxCan_TXD23_P14_9_OUT
IfxCan_Txd_Out IfxCan_TXD23_P14_9_OUT
Definition: IfxCan_PinMap.c:166
IfxCan_RXD03C_P20_0_IN
IfxCan_Rxd_In IfxCan_RXD03C_P20_0_IN
Definition: IfxCan_PinMap.c:65
IfxCan_Txd_Out_pinTable
const IfxCan_Txd_Out * IfxCan_Txd_Out_pinTable[IFXCAN_PINMAP_NUM_MODULES][IFXCAN_PINMAP_NUM_NODES][IFXCAN_PINMAP_TXD_OUT_NUM_ITEMS]
Definition: IfxCan_PinMap.c:300
IfxCan_TXD12_P10_7_OUT
IfxCan_Txd_Out IfxCan_TXD12_P10_7_OUT
Definition: IfxCan_PinMap.c:139
IfxCan_TXD11_P23_6_OUT
IfxCan_Txd_Out IfxCan_TXD11_P23_6_OUT
Definition: IfxCan_PinMap.c:138
Ifx_RxSel_h
Definition: Ifx_Types.h:136
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
Ifx_RxSel_b
Definition: Ifx_Types.h:130
IfxCan_RXD12B_P10_8_IN
IfxCan_Rxd_In IfxCan_RXD12B_P10_8_IN
Definition: IfxCan_PinMap.c:78
IfxCan_TXD02_P10_3_OUT
IfxCan_Txd_Out IfxCan_TXD02_P10_3_OUT
Definition: IfxCan_PinMap.c:121
IfxCan_TXD01_P33_9_OUT
IfxCan_Txd_Out IfxCan_TXD01_P33_9_OUT
Definition: IfxCan_PinMap.c:119
IfxCan_TXD03_P20_3_OUT
IfxCan_Txd_Out IfxCan_TXD03_P20_3_OUT
Definition: IfxCan_PinMap.c:129
IfxCan_RXD20B_P10_8_IN
IfxCan_Rxd_In IfxCan_RXD20B_P10_8_IN
Definition: IfxCan_PinMap.c:86
IfxCan_RXD10D_P13_1_IN
IfxCan_Rxd_In IfxCan_RXD10D_P13_1_IN
Definition: IfxCan_PinMap.c:72
IfxCan_RXD11C_P23_7_IN
IfxCan_Rxd_In IfxCan_RXD11C_P23_7_IN
Definition: IfxCan_PinMap.c:75
IfxCan_TXD10_P13_0_OUT
IfxCan_Txd_Out IfxCan_TXD10_P13_0_OUT
Definition: IfxCan_PinMap.c:132
IfxCan_TXD10_P00_0_OUT
IfxCan_Txd_Out IfxCan_TXD10_P00_0_OUT
Definition: IfxCan_PinMap.c:131
IfxPort_OutputIdx_alt6
Definition: IfxPort.h:134
IfxCan_RXD10A_P00_1_IN
IfxCan_Rxd_In IfxCan_RXD10A_P00_1_IN
Definition: IfxCan_PinMap.c:69
IfxCan_TXD02_P14_10_OUT
IfxCan_Txd_Out IfxCan_TXD02_P14_10_OUT
Definition: IfxCan_PinMap.c:122
IfxCan_NodeId_3
Node Id 3.
Definition: IfxCan_cfg.h:99
IfxCan_RXD20C_P34_2_IN
IfxCan_Rxd_In IfxCan_RXD20C_P34_2_IN
Definition: IfxCan_PinMap.c:87
IfxCan_TXD20_P10_7_OUT
IfxCan_Txd_Out IfxCan_TXD20_P10_7_OUT
Definition: IfxCan_PinMap.c:150
IfxCan_TXD13_P14_6_OUT
IfxCan_Txd_Out IfxCan_TXD13_P14_6_OUT
Definition: IfxCan_PinMap.c:144
IfxCan_TXD00_P34_1_OUT
IfxCan_Txd_Out IfxCan_TXD00_P34_1_OUT
Definition: IfxCan_PinMap.c:114
IfxCan_RXD00E_P33_7_IN
IfxCan_Rxd_In IfxCan_RXD00E_P33_7_IN
Definition: IfxCan_PinMap.c:49
IfxCan_RXD00A_P02_1_IN
IfxCan_Rxd_In IfxCan_RXD00A_P02_1_IN
Definition: IfxCan_PinMap.c:45
IfxCan_RXD22E_P22_9_IN
IfxCan_Rxd_In IfxCan_RXD22E_P22_9_IN
Definition: IfxCan_PinMap.c:101
IfxCan_NodeId_0
Node Id 0.
Definition: IfxCan_cfg.h:96
IfxCan_TXD02_P02_2_OUT
IfxCan_Txd_Out IfxCan_TXD02_P02_2_OUT
Definition: IfxCan_PinMap.c:120
IfxPort_OutputIdx_alt3
Definition: IfxPort.h:131
IfxCan_Rxd_In
RXD pin mapping structure.
Definition: IfxCan_PinMap.h:56
IfxCan_RXD02C_P32_6_IN
IfxCan_Rxd_In IfxCan_RXD02C_P32_6_IN
Definition: IfxCan_PinMap.c:60
IfxCan_RXD21E_P01_0_IN
IfxCan_Rxd_In IfxCan_RXD21E_P01_0_IN
Definition: IfxCan_PinMap.c:95
IfxCan_RXD21B_P13_12_IN
IfxCan_Rxd_In IfxCan_RXD21B_P13_12_IN
Definition: IfxCan_PinMap.c:92
IfxCan_TXD00_P33_8_OUT
IfxCan_Txd_Out IfxCan_TXD00_P33_8_OUT
Definition: IfxCan_PinMap.c:113
IfxCan_TXD02_P15_0_OUT
IfxCan_Txd_Out IfxCan_TXD02_P15_0_OUT
Definition: IfxCan_PinMap.c:123
IfxCan_RXD00F_P01_8_IN
IfxCan_Rxd_In IfxCan_RXD00F_P01_8_IN
Definition: IfxCan_PinMap.c:50
IfxCan_RXD20F_P11_14_IN
IfxCan_Rxd_In IfxCan_RXD20F_P11_14_IN
Definition: IfxCan_PinMap.c:90
IfxCan_RXD01A_P15_3_IN
IfxCan_Rxd_In IfxCan_RXD01A_P15_3_IN
Definition: IfxCan_PinMap.c:53
IfxCan_TXD21_P13_9_OUT
IfxCan_Txd_Out IfxCan_TXD21_P13_9_OUT
Definition: IfxCan_PinMap.c:155
IfxCan_RXD22C_P23_6_IN
IfxCan_Rxd_In IfxCan_RXD22C_P23_6_IN
Definition: IfxCan_PinMap.c:99
IfxCan_TXD12_P20_7_OUT
IfxCan_Txd_Out IfxCan_TXD12_P20_7_OUT
Definition: IfxCan_PinMap.c:141
IfxCan_RXD01E_P02_10_IN
IfxCan_Rxd_In IfxCan_RXD01E_P02_10_IN
Definition: IfxCan_PinMap.c:57
IfxCan_RXD20D_P02_14_IN
IfxCan_Rxd_In IfxCan_RXD20D_P02_14_IN
Definition: IfxCan_PinMap.c:88
IfxCan_RXD01C_P01_4_IN
IfxCan_Rxd_In IfxCan_RXD01C_P01_4_IN
Definition: IfxCan_PinMap.c:55
Ifx_RxSel_c
Definition: Ifx_Types.h:131
IfxCan_RXD21F_P22_7_IN
IfxCan_Rxd_In IfxCan_RXD21F_P22_7_IN
Definition: IfxCan_PinMap.c:96
IfxCan_TXD03_P20_10_OUT
IfxCan_Txd_Out IfxCan_TXD03_P20_10_OUT
Definition: IfxCan_PinMap.c:128
IfxCan_RXD21A_P00_3_IN
IfxCan_Rxd_In IfxCan_RXD21A_P00_3_IN
Definition: IfxCan_PinMap.c:91
IfxCan_TXD21_P00_2_OUT
IfxCan_Txd_Out IfxCan_TXD21_P00_2_OUT
Definition: IfxCan_PinMap.c:153
IfxCan_RXD23B_P23_3_IN
IfxCan_Rxd_In IfxCan_RXD23B_P23_3_IN
Definition: IfxCan_PinMap.c:103
IfxCan_RXD01B_P14_1_IN
IfxCan_Rxd_In IfxCan_RXD01B_P14_1_IN
Definition: IfxCan_PinMap.c:54
IfxCan_TXD03_P01_2_OUT
IfxCan_Txd_Out IfxCan_TXD03_P01_2_OUT
Definition: IfxCan_PinMap.c:126
IfxCan_RXD22B_P32_7_IN
IfxCan_Rxd_In IfxCan_RXD22B_P32_7_IN
Definition: IfxCan_PinMap.c:98
IfxCan_TXD22_P22_8_OUT
IfxCan_Txd_Out IfxCan_TXD22_P22_8_OUT
Definition: IfxCan_PinMap.c:160
IfxCan_NodeId_2
Node Id 2.
Definition: IfxCan_cfg.h:98
IfxCan_Txd_Out
TXD pin mapping structure.
Definition: IfxCan_PinMap.h:65
IfxCan_RXD23D_P13_5_IN
IfxCan_Rxd_In IfxCan_RXD23D_P13_5_IN
Definition: IfxCan_PinMap.c:105
IfxCan_RXD20E_P01_8_IN
IfxCan_Rxd_In IfxCan_RXD20E_P01_8_IN
Definition: IfxCan_PinMap.c:89
IfxCan_TXD20_P11_5_OUT
IfxCan_Txd_Out IfxCan_TXD20_P11_5_OUT
Definition: IfxCan_PinMap.c:151
IfxCan_TXD12_P23_2_OUT
IfxCan_Txd_Out IfxCan_TXD12_P23_2_OUT
Definition: IfxCan_PinMap.c:142
IfxPort_OutputIdx_alt4
Definition: IfxPort.h:132
IfxCan_TXD13_P33_4_OUT
IfxCan_Txd_Out IfxCan_TXD13_P33_4_OUT
Definition: IfxCan_PinMap.c:146
IfxCan_RXD02B_P02_3_IN
IfxCan_Rxd_In IfxCan_RXD02B_P02_3_IN
Definition: IfxCan_PinMap.c:59
IfxCan_RXD00B_P20_7_IN
IfxCan_Rxd_In IfxCan_RXD00B_P20_7_IN
Definition: IfxCan_PinMap.c:46
IfxCan_TXD01_P14_0_OUT
IfxCan_Txd_Out IfxCan_TXD01_P14_0_OUT
Definition: IfxCan_PinMap.c:117
IfxCan_TXD23_P13_4_OUT
IfxCan_Txd_Out IfxCan_TXD23_P13_4_OUT
Definition: IfxCan_PinMap.c:164
IfxCan_RXD13B_P33_5_IN
IfxCan_Rxd_In IfxCan_RXD13B_P33_5_IN
Definition: IfxCan_PinMap.c:82
IfxCan_PinMap.h
CAN I/O map.
IfxPort_OutputIdx_alt7
Definition: IfxPort.h:135
Ifx_RxSel_f
Definition: Ifx_Types.h:134
IfxCan_TXD00_P02_13_OUT
IfxCan_Txd_Out IfxCan_TXD00_P02_13_OUT
Definition: IfxCan_PinMap.c:109
IfxCan_TXD20_P02_13_OUT
IfxCan_Txd_Out IfxCan_TXD20_P02_13_OUT
Definition: IfxCan_PinMap.c:148
IFXCAN_PINMAP_NUM_NODES
#define IFXCAN_PINMAP_NUM_NODES
Definition: IfxCan_PinMap.h:200
IfxCan_RXD02D_P14_8_IN
IfxCan_Rxd_In IfxCan_RXD02D_P14_8_IN
Definition: IfxCan_PinMap.c:61
IfxCan_RXD01D_P33_10_IN
IfxCan_Rxd_In IfxCan_RXD01D_P33_10_IN
Definition: IfxCan_PinMap.c:56
IfxCan_TXD11_P11_0_OUT
IfxCan_Txd_Out IfxCan_TXD11_P11_0_OUT
Definition: IfxCan_PinMap.c:137
IfxCan_TXD01_P15_2_OUT
IfxCan_Txd_Out IfxCan_TXD01_P15_2_OUT
Definition: IfxCan_PinMap.c:118
IfxCan_RXD20A_P10_5_IN
IfxCan_Rxd_In IfxCan_RXD20A_P10_5_IN
Definition: IfxCan_PinMap.c:85
IfxCan_RXD12A_P20_6_IN
IfxCan_Rxd_In IfxCan_RXD12A_P20_6_IN
Definition: IfxCan_PinMap.c:77
IfxCan_RXD23E_P22_11_IN
IfxCan_Rxd_In IfxCan_RXD23E_P22_11_IN
Definition: IfxCan_PinMap.c:106
IfxCan_TXD10_P23_1_OUT
IfxCan_Txd_Out IfxCan_TXD10_P23_1_OUT
Definition: IfxCan_PinMap.c:134
IfxCan_TXD22_P33_12_OUT
IfxCan_Txd_Out IfxCan_TXD22_P33_12_OUT
Definition: IfxCan_PinMap.c:163
IfxCan_TXD03_P00_2_OUT
IfxCan_Txd_Out IfxCan_TXD03_P00_2_OUT
Definition: IfxCan_PinMap.c:125
IFXCAN_PINMAP_TXD_OUT_NUM_ITEMS
#define IFXCAN_PINMAP_TXD_OUT_NUM_ITEMS
Definition: IfxCan_PinMap.h:202
IfxCan_TXD12_P11_1_OUT
IfxCan_Txd_Out IfxCan_TXD12_P11_1_OUT
Definition: IfxCan_PinMap.c:140
IfxCan_RXD12C_P23_3_IN
IfxCan_Rxd_In IfxCan_RXD12C_P23_3_IN
Definition: IfxCan_PinMap.c:79
IfxCan_TXD03_P32_3_OUT
IfxCan_Txd_Out IfxCan_TXD03_P32_3_OUT
Definition: IfxCan_PinMap.c:130
IfxCan_TXD00_P12_1_OUT
IfxCan_Txd_Out IfxCan_TXD00_P12_1_OUT
Definition: IfxCan_PinMap.c:110
IfxCan_RXD00H_P02_14_IN
IfxCan_Rxd_In IfxCan_RXD00H_P02_14_IN
Definition: IfxCan_PinMap.c:52
IfxCan_TXD22_P23_5_OUT
IfxCan_Txd_Out IfxCan_TXD22_P23_5_OUT
Definition: IfxCan_PinMap.c:161
IfxCan_TXD00_P33_13_OUT
IfxCan_Txd_Out IfxCan_TXD00_P33_13_OUT
Definition: IfxCan_PinMap.c:112
IfxCan_RXD21D_P32_2_IN
IfxCan_Rxd_In IfxCan_RXD21D_P32_2_IN
Definition: IfxCan_PinMap.c:94
IfxCan_TXD21_P22_6_OUT
IfxCan_Txd_Out IfxCan_TXD21_P22_6_OUT
Definition: IfxCan_PinMap.c:157
IfxCan_RXD13D_P11_13_IN
IfxCan_Rxd_In IfxCan_RXD13D_P11_13_IN
Definition: IfxCan_PinMap.c:84
IfxCan_RXD22A_P33_13_IN
IfxCan_Rxd_In IfxCan_RXD22A_P33_13_IN
Definition: IfxCan_PinMap.c:97
IfxCan_TXD21_P01_2_OUT
IfxCan_Txd_Out IfxCan_TXD21_P01_2_OUT
Definition: IfxCan_PinMap.c:154
IfxPort_OutputIdx_alt5
Definition: IfxPort.h:133
IfxCan_TXD10_P14_9_OUT
IfxCan_Txd_Out IfxCan_TXD10_P14_9_OUT
Definition: IfxCan_PinMap.c:133
IfxCan_RXD00G_P34_2_IN
IfxCan_Rxd_In IfxCan_RXD00G_P34_2_IN
Definition: IfxCan_PinMap.c:51
IfxCan_TXD20_P10_6_OUT
IfxCan_Txd_Out IfxCan_TXD20_P10_6_OUT
Definition: IfxCan_PinMap.c:149
IfxCan_RXD11D_P11_7_IN
IfxCan_Rxd_In IfxCan_RXD11D_P11_7_IN
Definition: IfxCan_PinMap.c:76
IfxCan_TXD20_P01_13_OUT
IfxCan_Txd_Out IfxCan_TXD20_P01_13_OUT
Definition: IfxCan_PinMap.c:147
IfxCan_RXD13C_P22_5_IN
IfxCan_Rxd_In IfxCan_RXD13C_P22_5_IN
Definition: IfxCan_PinMap.c:83
IfxCan_TXD02_P32_5_OUT
IfxCan_Txd_Out IfxCan_TXD02_P32_5_OUT
Definition: IfxCan_PinMap.c:124
IfxCan_TXD01_P01_3_OUT
IfxCan_Txd_Out IfxCan_TXD01_P01_3_OUT
Definition: IfxCan_PinMap.c:115
IfxCan_TXD13_P11_4_OUT
IfxCan_Txd_Out IfxCan_TXD13_P11_4_OUT
Definition: IfxCan_PinMap.c:143
IfxCan_TXD03_P11_12_OUT
IfxCan_Txd_Out IfxCan_TXD03_P11_12_OUT
Definition: IfxCan_PinMap.c:127
IfxCan_TXD23_P23_2_OUT
IfxCan_Txd_Out IfxCan_TXD23_P23_2_OUT
Definition: IfxCan_PinMap.c:168
IfxCan_TXD22_P14_13_OUT
IfxCan_Txd_Out IfxCan_TXD22_P14_13_OUT
Definition: IfxCan_PinMap.c:159
IfxCan_RXD12D_P11_8_IN
IfxCan_Rxd_In IfxCan_RXD12D_P11_8_IN
Definition: IfxCan_PinMap.c:80
IfxCan_RXD22D_P14_14_IN
IfxCan_Rxd_In IfxCan_RXD22D_P14_14_IN
Definition: IfxCan_PinMap.c:100
IFXCAN_PINMAP_NUM_MODULES
#define IFXCAN_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxCan_PinMap.h:199
IfxCan_RXD03F_P01_0_IN
IfxCan_Rxd_In IfxCan_RXD03F_P01_0_IN
Definition: IfxCan_PinMap.c:68
IfxCan_RXD00C_P12_0_IN
IfxCan_Rxd_In IfxCan_RXD00C_P12_0_IN
Definition: IfxCan_PinMap.c:47
IfxCan_TXD22_P32_6_OUT
IfxCan_Txd_Out IfxCan_TXD22_P32_6_OUT
Definition: IfxCan_PinMap.c:162


iLLD_TC38A: IfxCan_PinMap.h Source File

  • _PinMap
IfxCan_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxCan_PinMap.h
3 * \brief CAN I/O map
4 * \ingroup IfxLld_Can
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Can_pinmap CAN Pin Mapping
42 * \ingroup IfxLld_Can
43 */
44
45 #ifndef IFXCAN_PINMAP_H
46 #define IFXCAN_PINMAP_H
47
48 #include <IfxCan_reg.h>
49 #include <_Impl/IfxCan_cfg.h>
50 #include <Port/Std/IfxPort.h>
51
52 /** \addtogroup IfxLld_Can_pinmap
53 * \{ */
54
55 /** \brief RXD pin mapping structure */
56 typedef const struct
57 {
58 Ifx_CAN* module; /**< \brief Base address */
59 IfxCan_NodeId nodeId; /**< \brief Node ID */
60 IfxPort_Pin pin; /**< \brief Port pin */
61 Ifx_RxSel select; /**< \brief Input multiplexer value */
62 } IfxCan_Rxd_In;
63
64 /** \brief TXD pin mapping structure */
65 typedef const struct
66 {
67 Ifx_CAN* module; /**< \brief Base address */
68 IfxCan_NodeId nodeId; /**< \brief Node ID */
69 IfxPort_Pin pin; /**< \brief Port pin */
70 IfxPort_OutputIdx select; /**< \brief Port control code */
71 } IfxCan_Txd_Out;
72
73 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD00A_P02_1_IN; /**< \brief CAN receive input node 0 */
74 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD00B_P20_7_IN; /**< \brief CAN receive input node 0 */
75 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD00C_P12_0_IN; /**< \brief CAN receive input node 0 */
76 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD00D_P33_12_IN; /**< \brief CAN receive input node 0 */
77 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD00E_P33_7_IN; /**< \brief CAN receive input node 0 */
78 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD00F_P01_8_IN; /**< \brief CAN receive input node 0 */
79 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD00G_P34_2_IN; /**< \brief CAN receive input node 0 */
80 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD00H_P02_14_IN; /**< \brief CAN receive input node 0 */
81 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD01A_P15_3_IN; /**< \brief CAN receive input node 1 */
82 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD01B_P14_1_IN; /**< \brief CAN receive input node 1 */
83 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD01C_P01_4_IN; /**< \brief CAN receive input node 1 */
84 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD01D_P33_10_IN; /**< \brief CAN receive input node 1 */
85 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD01E_P02_10_IN; /**< \brief CAN receive input node 1 */
86 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD02A_P15_1_IN; /**< \brief CAN receive input node 2 */
87 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD02B_P02_3_IN; /**< \brief CAN receive input node 2 */
88 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD02C_P32_6_IN; /**< \brief CAN receive input node 2 */
89 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD02D_P14_8_IN; /**< \brief CAN receive input node 2 */
90 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD02E_P10_2_IN; /**< \brief CAN receive input node 2 */
91 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD03A_P00_3_IN; /**< \brief CAN receive input node 3 */
92 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD03B_P32_2_IN; /**< \brief CAN receive input node 3 */
93 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD03C_P20_0_IN; /**< \brief CAN receive input node 3 */
94 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD03D_P11_10_IN; /**< \brief CAN receive input node 3 */
95 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD03E_P20_9_IN; /**< \brief CAN receive input node 3 */
96 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD03F_P01_0_IN; /**< \brief CAN receive input node 3 */
97 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD10A_P00_1_IN; /**< \brief CAN receive input node 0 */
98 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD10B_P14_7_IN; /**< \brief CAN receive input node 0 */
99 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD10C_P23_0_IN; /**< \brief CAN receive input node 0 */
100 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD10D_P13_1_IN; /**< \brief CAN receive input node 0 */
101 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD11A_P02_4_IN; /**< \brief CAN receive input node 1 */
102 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD11B_P00_5_IN; /**< \brief CAN receive input node 1 */
103 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD11C_P23_7_IN; /**< \brief CAN receive input node 1 */
104 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD11D_P11_7_IN; /**< \brief CAN receive input node 1 */
105 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD12A_P20_6_IN; /**< \brief CAN receive input node 2 */
106 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD12B_P10_8_IN; /**< \brief CAN receive input node 2 */
107 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD12C_P23_3_IN; /**< \brief CAN receive input node 2 */
108 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD12D_P11_8_IN; /**< \brief CAN receive input node 2 */
109 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD13A_P14_7_IN; /**< \brief CAN receive input node 3 */
110 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD13B_P33_5_IN; /**< \brief CAN receive input node 3 */
111 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD13C_P22_5_IN; /**< \brief CAN receive input node 3 */
112 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD13D_P11_13_IN; /**< \brief CAN receive input node 3 */
113 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD20A_P10_5_IN; /**< \brief CAN receive input node 0 */
114 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD20B_P10_8_IN; /**< \brief CAN receive input node 0 */
115 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD20C_P34_2_IN; /**< \brief CAN receive input node 0 */
116 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD20D_P02_14_IN; /**< \brief CAN receive input node 0 */
117 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD20E_P01_8_IN; /**< \brief CAN receive input node 0 */
118 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD20F_P11_14_IN; /**< \brief CAN receive input node 0 */
119 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD21A_P00_3_IN; /**< \brief CAN receive input node 1 */
120 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD21B_P13_12_IN; /**< \brief CAN receive input node 1 */
121 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD21C_P20_0_IN; /**< \brief CAN receive input node 1 */
122 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD21D_P32_2_IN; /**< \brief CAN receive input node 1 */
123 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD21E_P01_0_IN; /**< \brief CAN receive input node 1 */
124 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD21F_P22_7_IN; /**< \brief CAN receive input node 1 */
125 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD22A_P33_13_IN; /**< \brief CAN receive input node 2 */
126 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD22B_P32_7_IN; /**< \brief CAN receive input node 2 */
127 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD22C_P23_6_IN; /**< \brief CAN receive input node 2 */
128 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD22D_P14_14_IN; /**< \brief CAN receive input node 2 */
129 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD22E_P22_9_IN; /**< \brief CAN receive input node 2 */
130 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD23A_P14_10_IN; /**< \brief CAN receive input node 3 */
131 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD23B_P23_3_IN; /**< \brief CAN receive input node 3 */
132 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD23C_P14_15_IN; /**< \brief CAN receive input node 3 */
133 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD23D_P13_5_IN; /**< \brief CAN receive input node 3 */
134 IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD23E_P22_11_IN; /**< \brief CAN receive input node 3 */
135 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD00_P01_13_OUT; /**< \brief CAN transmit output node 0 */
136 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD00_P02_0_OUT; /**< \brief CAN transmit output node 0 */
137 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD00_P02_13_OUT; /**< \brief CAN transmit output node 0 */
138 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD00_P12_1_OUT; /**< \brief CAN transmit output node 0 */
139 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD00_P20_8_OUT; /**< \brief CAN transmit output node 0 */
140 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD00_P33_13_OUT; /**< \brief CAN transmit output node 0 */
141 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD00_P33_8_OUT; /**< \brief CAN transmit output node 0 */
142 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD00_P34_1_OUT; /**< \brief CAN transmit output node 0 */
143 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD01_P01_3_OUT; /**< \brief CAN transmit output node 1 */
144 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD01_P02_9_OUT; /**< \brief CAN transmit output node 1 */
145 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD01_P14_0_OUT; /**< \brief CAN transmit output node 1 */
146 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD01_P15_2_OUT; /**< \brief CAN transmit output node 1 */
147 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD01_P33_9_OUT; /**< \brief CAN transmit output node 1 */
148 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD02_P02_2_OUT; /**< \brief CAN transmit output node 2 */
149 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD02_P10_3_OUT; /**< \brief CAN transmit output node 2 */
150 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD02_P14_10_OUT; /**< \brief CAN transmit output node 2 */
151 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD02_P15_0_OUT; /**< \brief CAN transmit output node 2 */
152 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD02_P32_5_OUT; /**< \brief CAN transmit output node 2 */
153 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD03_P00_2_OUT; /**< \brief CAN transmit output node 3 */
154 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD03_P01_2_OUT; /**< \brief CAN transmit output node 3 */
155 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD03_P11_12_OUT; /**< \brief CAN transmit output node 3 */
156 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD03_P20_10_OUT; /**< \brief CAN transmit output node 3 */
157 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD03_P20_3_OUT; /**< \brief CAN transmit output node 3 */
158 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD03_P32_3_OUT; /**< \brief CAN transmit output node 3 */
159 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD10_P00_0_OUT; /**< \brief CAN transmit output node 0 */
160 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD10_P13_0_OUT; /**< \brief CAN transmit output node 0 */
161 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD10_P14_9_OUT; /**< \brief CAN transmit output node 0 */
162 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD10_P23_1_OUT; /**< \brief CAN transmit output node 0 */
163 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD11_P00_4_OUT; /**< \brief CAN transmit output node 1 */
164 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD11_P02_5_OUT; /**< \brief CAN transmit output node 1 */
165 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD11_P11_0_OUT; /**< \brief CAN transmit output node 1 */
166 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD11_P23_6_OUT; /**< \brief CAN transmit output node 1 */
167 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD12_P10_7_OUT; /**< \brief CAN transmit output node 2 */
168 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD12_P11_1_OUT; /**< \brief CAN transmit output node 2 */
169 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD12_P20_7_OUT; /**< \brief CAN transmit output node 2 */
170 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD12_P23_2_OUT; /**< \brief CAN transmit output node 2 */
171 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD13_P11_4_OUT; /**< \brief CAN transmit output node 3 */
172 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD13_P14_6_OUT; /**< \brief CAN transmit output node 3 */
173 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD13_P22_4_OUT; /**< \brief CAN transmit output node 3 */
174 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD13_P33_4_OUT; /**< \brief CAN transmit output node 3 */
175 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD20_P01_13_OUT; /**< \brief CAN transmit output node 0 */
176 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD20_P02_13_OUT; /**< \brief CAN transmit output node 0 */
177 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD20_P10_6_OUT; /**< \brief CAN transmit output node 0 */
178 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD20_P10_7_OUT; /**< \brief CAN transmit output node 0 */
179 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD20_P11_5_OUT; /**< \brief CAN transmit output node 0 */
180 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD20_P34_1_OUT; /**< \brief CAN transmit output node 0 */
181 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD21_P00_2_OUT; /**< \brief CAN transmit output node 1 */
182 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD21_P01_2_OUT; /**< \brief CAN transmit output node 1 */
183 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD21_P13_9_OUT; /**< \brief CAN transmit output node 1 */
184 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD21_P20_3_OUT; /**< \brief CAN transmit output node 1 */
185 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD21_P22_6_OUT; /**< \brief CAN transmit output node 1 */
186 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD21_P32_3_OUT; /**< \brief CAN transmit output node 1 */
187 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD22_P14_13_OUT; /**< \brief CAN transmit output node 2 */
188 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD22_P22_8_OUT; /**< \brief CAN transmit output node 2 */
189 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD22_P23_5_OUT; /**< \brief CAN transmit output node 2 */
190 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD22_P32_6_OUT; /**< \brief CAN transmit output node 2 */
191 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD22_P33_12_OUT; /**< \brief CAN transmit output node 2 */
192 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD23_P13_4_OUT; /**< \brief CAN transmit output node 3 */
193 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD23_P14_14_OUT; /**< \brief CAN transmit output node 3 */
194 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD23_P14_9_OUT; /**< \brief CAN transmit output node 3 */
195 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD23_P22_10_OUT; /**< \brief CAN transmit output node 3 */
196 IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD23_P23_2_OUT; /**< \brief CAN transmit output node 3 */
197
198 /** \brief Table dimensions */
199 #define IFXCAN_PINMAP_NUM_MODULES 3
200 #define IFXCAN_PINMAP_NUM_NODES 4
201 #define IFXCAN_PINMAP_RXD_IN_NUM_ITEMS 8
202 #define IFXCAN_PINMAP_TXD_OUT_NUM_ITEMS 8
203
204
205 /** \brief IfxCan_Rxd_In table */
206 IFX_EXTERN const IfxCan_Rxd_In *IfxCan_Rxd_In_pinTable[IFXCAN_PINMAP_NUM_MODULES][IFXCAN_PINMAP_NUM_NODES][IFXCAN_PINMAP_RXD_IN_NUM_ITEMS];
207
208 /** \brief IfxCan_Txd_Out table */
209 IFX_EXTERN const IfxCan_Txd_Out *IfxCan_Txd_Out_pinTable[IFXCAN_PINMAP_NUM_MODULES][IFXCAN_PINMAP_NUM_NODES][IFXCAN_PINMAP_TXD_OUT_NUM_ITEMS];
210
211 /** \} */
212
213 #endif /* IFXCAN_PINMAP_H */
IfxCan_RXD21E_P01_0_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD21E_P01_0_IN
CAN receive input node 1.
Definition: IfxCan_PinMap.h:123
IfxCan_TXD02_P02_2_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD02_P02_2_OUT
CAN transmit output node 2.
Definition: IfxCan_PinMap.h:148
IfxCan_TXD02_P10_3_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD02_P10_3_OUT
CAN transmit output node 2.
Definition: IfxCan_PinMap.h:149
IfxCan_TXD02_P14_10_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD02_P14_10_OUT
CAN transmit output node 2.
Definition: IfxCan_PinMap.h:150
IfxCan_RXD03E_P20_9_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD03E_P20_9_IN
CAN receive input node 3.
Definition: IfxCan_PinMap.h:95
IfxCan_TXD03_P11_12_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD03_P11_12_OUT
CAN transmit output node 3.
Definition: IfxCan_PinMap.h:155
IfxCan_RXD00B_P20_7_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD00B_P20_7_IN
CAN receive input node 0.
Definition: IfxCan_PinMap.h:74
IfxCan_RXD00H_P02_14_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD00H_P02_14_IN
CAN receive input node 0.
Definition: IfxCan_PinMap.h:80
IfxCan_RXD01E_P02_10_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD01E_P02_10_IN
CAN receive input node 1.
Definition: IfxCan_PinMap.h:85
IFXCAN_PINMAP_RXD_IN_NUM_ITEMS
#define IFXCAN_PINMAP_RXD_IN_NUM_ITEMS
Definition: IfxCan_PinMap.h:201
IfxCan_TXD01_P01_3_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD01_P01_3_OUT
CAN transmit output node 1.
Definition: IfxCan_PinMap.h:143
IfxCan_RXD01A_P15_3_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD01A_P15_3_IN
CAN receive input node 1.
Definition: IfxCan_PinMap.h:81
IfxCan_TXD20_P02_13_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD20_P02_13_OUT
CAN transmit output node 0.
Definition: IfxCan_PinMap.h:176
IfxCan_Txd_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxCan_PinMap.h:70
IfxCan_TXD00_P20_8_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD00_P20_8_OUT
CAN transmit output node 0.
Definition: IfxCan_PinMap.h:139
IfxCan_RXD12B_P10_8_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD12B_P10_8_IN
CAN receive input node 2.
Definition: IfxCan_PinMap.h:106
IfxCan_TXD22_P32_6_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD22_P32_6_OUT
CAN transmit output node 2.
Definition: IfxCan_PinMap.h:190
IfxCan_TXD22_P22_8_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD22_P22_8_OUT
CAN transmit output node 2.
Definition: IfxCan_PinMap.h:188
IfxCan_RXD03D_P11_10_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD03D_P11_10_IN
CAN receive input node 3.
Definition: IfxCan_PinMap.h:94
IfxCan_RXD22A_P33_13_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD22A_P33_13_IN
CAN receive input node 2.
Definition: IfxCan_PinMap.h:125
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:126
IfxCan_RXD13B_P33_5_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD13B_P33_5_IN
CAN receive input node 3.
Definition: IfxCan_PinMap.h:110
IfxCan_RXD12D_P11_8_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD12D_P11_8_IN
CAN receive input node 2.
Definition: IfxCan_PinMap.h:108
IfxCan_RXD10B_P14_7_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD10B_P14_7_IN
CAN receive input node 0.
Definition: IfxCan_PinMap.h:98
IfxCan_TXD23_P14_9_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD23_P14_9_OUT
CAN transmit output node 3.
Definition: IfxCan_PinMap.h:194
IfxCan_RXD11A_P02_4_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD11A_P02_4_IN
CAN receive input node 1.
Definition: IfxCan_PinMap.h:101
IfxCan_TXD02_P32_5_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD02_P32_5_OUT
CAN transmit output node 2.
Definition: IfxCan_PinMap.h:152
IfxCan_TXD10_P13_0_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD10_P13_0_OUT
CAN transmit output node 0.
Definition: IfxCan_PinMap.h:160
IfxCan_TXD00_P02_0_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD00_P02_0_OUT
CAN transmit output node 0.
Definition: IfxCan_PinMap.h:136
IfxCan_RXD20A_P10_5_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD20A_P10_5_IN
CAN receive input node 0.
Definition: IfxCan_PinMap.h:113
IfxCan_TXD21_P13_9_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD21_P13_9_OUT
CAN transmit output node 1.
Definition: IfxCan_PinMap.h:183
IfxCan_TXD03_P20_3_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD03_P20_3_OUT
CAN transmit output node 3.
Definition: IfxCan_PinMap.h:157
IfxCan_RXD11C_P23_7_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD11C_P23_7_IN
CAN receive input node 1.
Definition: IfxCan_PinMap.h:103
IfxCan_Rxd_In::module
Ifx_CAN * module
Base address.
Definition: IfxCan_PinMap.h:58
IfxCan_RXD20F_P11_14_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD20F_P11_14_IN
CAN receive input node 0.
Definition: IfxCan_PinMap.h:118
IfxCan_TXD12_P10_7_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD12_P10_7_OUT
CAN transmit output node 2.
Definition: IfxCan_PinMap.h:167
IfxCan_TXD10_P14_9_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD10_P14_9_OUT
CAN transmit output node 0.
Definition: IfxCan_PinMap.h:161
IfxCan_RXD11D_P11_7_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD11D_P11_7_IN
CAN receive input node 1.
Definition: IfxCan_PinMap.h:104
IfxCan_NodeId
IfxCan_NodeId
CAN Node number.
Definition: IfxCan_cfg.h:93
IfxCan_RXD00E_P33_7_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD00E_P33_7_IN
CAN receive input node 0.
Definition: IfxCan_PinMap.h:77
IfxCan_RXD23E_P22_11_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD23E_P22_11_IN
CAN receive input node 3.
Definition: IfxCan_PinMap.h:134
IfxCan_TXD00_P01_13_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD00_P01_13_OUT
CAN transmit output node 0.
Definition: IfxCan_PinMap.h:135
IfxCan_TXD03_P20_10_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD03_P20_10_OUT
CAN transmit output node 3.
Definition: IfxCan_PinMap.h:156
IfxCan_RXD23D_P13_5_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD23D_P13_5_IN
CAN receive input node 3.
Definition: IfxCan_PinMap.h:133
IfxCan_TXD03_P00_2_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD03_P00_2_OUT
CAN transmit output node 3.
Definition: IfxCan_PinMap.h:153
IfxCan_TXD10_P00_0_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD10_P00_0_OUT
CAN transmit output node 0.
Definition: IfxCan_PinMap.h:159
IfxCan_TXD22_P23_5_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD22_P23_5_OUT
CAN transmit output node 2.
Definition: IfxCan_PinMap.h:189
IfxCan_TXD00_P12_1_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD00_P12_1_OUT
CAN transmit output node 0.
Definition: IfxCan_PinMap.h:138
IfxCan_TXD13_P11_4_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD13_P11_4_OUT
CAN transmit output node 3.
Definition: IfxCan_PinMap.h:171
IfxCan_TXD01_P15_2_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD01_P15_2_OUT
CAN transmit output node 1.
Definition: IfxCan_PinMap.h:146
IfxCan_Rxd_In::nodeId
IfxCan_NodeId nodeId
Node ID.
Definition: IfxCan_PinMap.h:59
IfxCan_TXD10_P23_1_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD10_P23_1_OUT
CAN transmit output node 0.
Definition: IfxCan_PinMap.h:162
IfxCan_RXD01C_P01_4_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD01C_P01_4_IN
CAN receive input node 1.
Definition: IfxCan_PinMap.h:83
IfxCan_RXD11B_P00_5_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD11B_P00_5_IN
CAN receive input node 1.
Definition: IfxCan_PinMap.h:102
IfxCan_RXD10C_P23_0_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD10C_P23_0_IN
CAN receive input node 0.
Definition: IfxCan_PinMap.h:99
IfxCan_TXD00_P34_1_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD00_P34_1_OUT
CAN transmit output node 0.
Definition: IfxCan_PinMap.h:142
IfxCan_TXD21_P32_3_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD21_P32_3_OUT
CAN transmit output node 1.
Definition: IfxCan_PinMap.h:186
IfxCan_TXD23_P13_4_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD23_P13_4_OUT
CAN transmit output node 3.
Definition: IfxCan_PinMap.h:192
IfxCan_RXD20E_P01_8_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD20E_P01_8_IN
CAN receive input node 0.
Definition: IfxCan_PinMap.h:117
IfxCan_RXD02A_P15_1_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD02A_P15_1_IN
CAN receive input node 2.
Definition: IfxCan_PinMap.h:86
IfxCan_RXD21F_P22_7_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD21F_P22_7_IN
CAN receive input node 1.
Definition: IfxCan_PinMap.h:124
IfxCan_RXD10A_P00_1_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD10A_P00_1_IN
CAN receive input node 0.
Definition: IfxCan_PinMap.h:97
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxCan_cfg.h
CAN on-chip implementation data.
IfxCan_TXD01_P02_9_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD01_P02_9_OUT
CAN transmit output node 1.
Definition: IfxCan_PinMap.h:144
IfxCan_TXD01_P33_9_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD01_P33_9_OUT
CAN transmit output node 1.
Definition: IfxCan_PinMap.h:147
IfxCan_Rxd_In
RXD pin mapping structure.
Definition: IfxCan_PinMap.h:56
IfxCan_RXD02E_P10_2_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD02E_P10_2_IN
CAN receive input node 2.
Definition: IfxCan_PinMap.h:90
IfxCan_RXD10D_P13_1_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD10D_P13_1_IN
CAN receive input node 0.
Definition: IfxCan_PinMap.h:100
IfxCan_Rxd_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxCan_PinMap.h:61
IfxCan_TXD13_P14_6_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD13_P14_6_OUT
CAN transmit output node 3.
Definition: IfxCan_PinMap.h:172
IfxCan_RXD00G_P34_2_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD00G_P34_2_IN
CAN receive input node 0.
Definition: IfxCan_PinMap.h:79
IfxCan_TXD23_P23_2_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD23_P23_2_OUT
CAN transmit output node 3.
Definition: IfxCan_PinMap.h:196
IfxCan_RXD13A_P14_7_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD13A_P14_7_IN
CAN receive input node 3.
Definition: IfxCan_PinMap.h:109
IfxCan_TXD20_P10_6_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD20_P10_6_OUT
CAN transmit output node 0.
Definition: IfxCan_PinMap.h:177
IfxCan_TXD23_P14_14_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD23_P14_14_OUT
CAN transmit output node 3.
Definition: IfxCan_PinMap.h:193
IfxCan_TXD02_P15_0_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD02_P15_0_OUT
CAN transmit output node 2.
Definition: IfxCan_PinMap.h:151
IfxCan_TXD01_P14_0_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD01_P14_0_OUT
CAN transmit output node 1.
Definition: IfxCan_PinMap.h:145
IfxCan_RXD13D_P11_13_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD13D_P11_13_IN
CAN receive input node 3.
Definition: IfxCan_PinMap.h:112
IfxCan_TXD12_P20_7_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD12_P20_7_OUT
CAN transmit output node 2.
Definition: IfxCan_PinMap.h:169
IfxCan_TXD11_P23_6_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD11_P23_6_OUT
CAN transmit output node 1.
Definition: IfxCan_PinMap.h:166
IfxCan_TXD00_P02_13_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD00_P02_13_OUT
CAN transmit output node 0.
Definition: IfxCan_PinMap.h:137
IfxCan_RXD22D_P14_14_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD22D_P14_14_IN
CAN receive input node 2.
Definition: IfxCan_PinMap.h:128
IfxCan_RXD22E_P22_9_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD22E_P22_9_IN
CAN receive input node 2.
Definition: IfxCan_PinMap.h:129
IfxCan_RXD20D_P02_14_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD20D_P02_14_IN
CAN receive input node 0.
Definition: IfxCan_PinMap.h:116
IfxCan_TXD21_P20_3_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD21_P20_3_OUT
CAN transmit output node 1.
Definition: IfxCan_PinMap.h:184
IfxCan_RXD00F_P01_8_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD00F_P01_8_IN
CAN receive input node 0.
Definition: IfxCan_PinMap.h:78
IfxCan_RXD22B_P32_7_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD22B_P32_7_IN
CAN receive input node 2.
Definition: IfxCan_PinMap.h:126
IfxCan_TXD20_P10_7_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD20_P10_7_OUT
CAN transmit output node 0.
Definition: IfxCan_PinMap.h:178
IfxCan_Txd_Out
TXD pin mapping structure.
Definition: IfxCan_PinMap.h:65
IfxCan_Rxd_In_pinTable
IFX_EXTERN const IfxCan_Rxd_In * IfxCan_Rxd_In_pinTable[IFXCAN_PINMAP_NUM_MODULES][IFXCAN_PINMAP_NUM_NODES][IFXCAN_PINMAP_RXD_IN_NUM_ITEMS]
IfxCan_Rxd_In table.
Definition: IfxCan_PinMap.h:206
IfxCan_RXD21A_P00_3_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD21A_P00_3_IN
CAN receive input node 1.
Definition: IfxCan_PinMap.h:119
IfxCan_TXD21_P00_2_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD21_P00_2_OUT
CAN transmit output node 1.
Definition: IfxCan_PinMap.h:181
IfxCan_RXD22C_P23_6_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD22C_P23_6_IN
CAN receive input node 2.
Definition: IfxCan_PinMap.h:127
IfxCan_RXD23C_P14_15_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD23C_P14_15_IN
CAN receive input node 3.
Definition: IfxCan_PinMap.h:132
IfxCan_RXD01D_P33_10_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD01D_P33_10_IN
CAN receive input node 1.
Definition: IfxCan_PinMap.h:84
IfxCan_TXD13_P22_4_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD13_P22_4_OUT
CAN transmit output node 3.
Definition: IfxCan_PinMap.h:173
IfxCan_RXD12A_P20_6_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD12A_P20_6_IN
CAN receive input node 2.
Definition: IfxCan_PinMap.h:105
IfxCan_TXD22_P14_13_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD22_P14_13_OUT
CAN transmit output node 2.
Definition: IfxCan_PinMap.h:187
IfxCan_TXD11_P00_4_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD11_P00_4_OUT
CAN transmit output node 1.
Definition: IfxCan_PinMap.h:163
IfxCan_RXD13C_P22_5_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD13C_P22_5_IN
CAN receive input node 3.
Definition: IfxCan_PinMap.h:111
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:246
IfxCan_TXD12_P11_1_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD12_P11_1_OUT
CAN transmit output node 2.
Definition: IfxCan_PinMap.h:168
IfxCan_RXD02C_P32_6_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD02C_P32_6_IN
CAN receive input node 2.
Definition: IfxCan_PinMap.h:88
IfxCan_TXD20_P11_5_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD20_P11_5_OUT
CAN transmit output node 0.
Definition: IfxCan_PinMap.h:179
IfxCan_TXD12_P23_2_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD12_P23_2_OUT
CAN transmit output node 2.
Definition: IfxCan_PinMap.h:170
IFXCAN_PINMAP_NUM_NODES
#define IFXCAN_PINMAP_NUM_NODES
Definition: IfxCan_PinMap.h:200
IfxCan_RXD21C_P20_0_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD21C_P20_0_IN
CAN receive input node 1.
Definition: IfxCan_PinMap.h:121
Ifx_RxSel
Ifx_RxSel
input multiplexer definition used in PinMaps
Definition: Ifx_Types.h:127
IfxCan_Txd_Out_pinTable
IFX_EXTERN const IfxCan_Txd_Out * IfxCan_Txd_Out_pinTable[IFXCAN_PINMAP_NUM_MODULES][IFXCAN_PINMAP_NUM_NODES][IFXCAN_PINMAP_TXD_OUT_NUM_ITEMS]
IfxCan_Txd_Out table.
Definition: IfxCan_PinMap.h:209
IfxCan_TXD11_P11_0_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD11_P11_0_OUT
CAN transmit output node 1.
Definition: IfxCan_PinMap.h:165
IfxCan_RXD01B_P14_1_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD01B_P14_1_IN
CAN receive input node 1.
Definition: IfxCan_PinMap.h:82
IfxCan_RXD03F_P01_0_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD03F_P01_0_IN
CAN receive input node 3.
Definition: IfxCan_PinMap.h:96
IfxCan_RXD00D_P33_12_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD00D_P33_12_IN
CAN receive input node 0.
Definition: IfxCan_PinMap.h:76
IfxCan_RXD02D_P14_8_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD02D_P14_8_IN
CAN receive input node 2.
Definition: IfxCan_PinMap.h:89
IfxCan_RXD03B_P32_2_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD03B_P32_2_IN
CAN receive input node 3.
Definition: IfxCan_PinMap.h:92
IFXCAN_PINMAP_TXD_OUT_NUM_ITEMS
#define IFXCAN_PINMAP_TXD_OUT_NUM_ITEMS
Definition: IfxCan_PinMap.h:202
IfxCan_RXD03A_P00_3_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD03A_P00_3_IN
CAN receive input node 3.
Definition: IfxCan_PinMap.h:91
IfxCan_Rxd_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxCan_PinMap.h:60
IfxCan_TXD00_P33_13_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD00_P33_13_OUT
CAN transmit output node 0.
Definition: IfxCan_PinMap.h:140
IfxCan_RXD21D_P32_2_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD21D_P32_2_IN
CAN receive input node 1.
Definition: IfxCan_PinMap.h:122
IfxCan_RXD03C_P20_0_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD03C_P20_0_IN
CAN receive input node 3.
Definition: IfxCan_PinMap.h:93
IfxCan_TXD11_P02_5_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD11_P02_5_OUT
CAN transmit output node 1.
Definition: IfxCan_PinMap.h:164
IfxCan_TXD00_P33_8_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD00_P33_8_OUT
CAN transmit output node 0.
Definition: IfxCan_PinMap.h:141
IfxCan_TXD21_P22_6_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD21_P22_6_OUT
CAN transmit output node 1.
Definition: IfxCan_PinMap.h:185
IfxCan_TXD23_P22_10_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD23_P22_10_OUT
CAN transmit output node 3.
Definition: IfxCan_PinMap.h:195
IfxCan_RXD23A_P14_10_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD23A_P14_10_IN
CAN receive input node 3.
Definition: IfxCan_PinMap.h:130
IfxCan_TXD21_P01_2_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD21_P01_2_OUT
CAN transmit output node 1.
Definition: IfxCan_PinMap.h:182
IfxCan_RXD12C_P23_3_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD12C_P23_3_IN
CAN receive input node 2.
Definition: IfxCan_PinMap.h:107
IfxCan_TXD20_P34_1_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD20_P34_1_OUT
CAN transmit output node 0.
Definition: IfxCan_PinMap.h:180
IfxCan_RXD00C_P12_0_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD00C_P12_0_IN
CAN receive input node 0.
Definition: IfxCan_PinMap.h:75
IfxCan_TXD13_P33_4_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD13_P33_4_OUT
CAN transmit output node 3.
Definition: IfxCan_PinMap.h:174
IfxCan_RXD20B_P10_8_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD20B_P10_8_IN
CAN receive input node 0.
Definition: IfxCan_PinMap.h:114
IfxCan_RXD23B_P23_3_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD23B_P23_3_IN
CAN receive input node 3.
Definition: IfxCan_PinMap.h:131
IfxCan_TXD03_P32_3_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD03_P32_3_OUT
CAN transmit output node 3.
Definition: IfxCan_PinMap.h:158
IfxCan_TXD22_P33_12_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD22_P33_12_OUT
CAN transmit output node 2.
Definition: IfxCan_PinMap.h:191
IfxCan_RXD21B_P13_12_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD21B_P13_12_IN
CAN receive input node 1.
Definition: IfxCan_PinMap.h:120
IFXCAN_PINMAP_NUM_MODULES
#define IFXCAN_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxCan_PinMap.h:199
IfxCan_TXD03_P01_2_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD03_P01_2_OUT
CAN transmit output node 3.
Definition: IfxCan_PinMap.h:154
IfxCan_TXD20_P01_13_OUT
IFX_EXTERN IfxCan_Txd_Out IfxCan_TXD20_P01_13_OUT
CAN transmit output node 0.
Definition: IfxCan_PinMap.h:175
IfxCan_RXD20C_P34_2_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD20C_P34_2_IN
CAN receive input node 0.
Definition: IfxCan_PinMap.h:115
IfxCan_RXD02B_P02_3_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD02B_P02_3_IN
CAN receive input node 2.
Definition: IfxCan_PinMap.h:87
IfxCan_RXD00A_P02_1_IN
IFX_EXTERN IfxCan_Rxd_In IfxCan_RXD00A_P02_1_IN
CAN receive input node 0.
Definition: IfxCan_PinMap.h:73
IfxPort.h
PORT basic functionality.


iLLD_TC38A: IfxCan_cfg.c Source File

  • _Impl
IfxCan_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxCan_cfg.c
3 * \brief CAN on-chip implementation data
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxCan_cfg.h"
47
48 /******************************************************************************/
49 /*-----------------------Exported Variables/Constants-------------------------*/
50 /******************************************************************************/
51
52 IFX_CONST IfxModule_IndexMap IfxCan_cfg_indexMap[IFXCAN_NUM_MODULES] = {
53 {&MODULE_CAN0, (uint32)IfxCan_Index_0},
54 {&MODULE_CAN1, (uint32)IfxCan_Index_1},
55 {&MODULE_CAN2, (uint32)IfxCan_Index_2}
56 };
IfxCan_Index_2
CAN index 2.
Definition: IfxCan_cfg.h:88
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxCan_cfg.h
CAN on-chip implementation data.
IfxCan_Index_0
CAN index 0.
Definition: IfxCan_cfg.h:86
IfxCan_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxCan_cfg_indexMap[IFXCAN_NUM_MODULES]
Definition: IfxCan_cfg.c:52
IFXCAN_NUM_MODULES
#define IFXCAN_NUM_MODULES
Number of CAN modules.
Definition: IfxCan_cfg.h:69
IfxCan_Index_1
CAN index 1.
Definition: IfxCan_cfg.h:87
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:140


iLLD_TC38A: IfxCan_cfg.h Source File

  • _Impl
IfxCan_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxCan_cfg.h
3 * \brief CAN on-chip implementation data
4 * \ingroup IfxLld_Can
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 *
43 * \defgroup IfxLld_Can CAN
44 * \ingroup IfxLld
45 * \defgroup IfxLld_Can_Impl Implementation Interface
46 * \ingroup IfxLld_Can
47 * \defgroup IfxLld_Can_Std Standard Interface
48 * \ingroup IfxLld_Can
49 * \defgroup IfxLld_Can_Impl_Enum Enumerations
50 * \ingroup IfxLld_Can_Impl
51 */
52
53 #ifndef IFXCAN_CFG_H
54 #define IFXCAN_CFG_H 1
55
56 /******************************************************************************/
57 /*----------------------------------Includes----------------------------------*/
58 /******************************************************************************/
59
60 #include "Cpu/Std/Ifx_Types.h"
61 #include "IfxCan_reg.h"
62
63 /******************************************************************************/
64 /*-----------------------------------Macros-----------------------------------*/
65 /******************************************************************************/
66
67 /** \brief Number of CAN modules
68 */
69 #define IFXCAN_NUM_MODULES (3)
70
71 /** \brief Number of nodes per each CAN module
72 */
73 #define IFXCAN_NUM_NODES 4
74
75 /******************************************************************************/
76 /*--------------------------------Enumerations--------------------------------*/
77 /******************************************************************************/
78
79 /** \addtogroup IfxLld_Can_Impl_Enum
80 * \{ */
81 /** \brief List of the available can resources
82 */
83 typedef enum
84 {
85 IfxCan_Index_none = -1, /**< \brief Not Selected */
86 IfxCan_Index_0 = 0, /**< \brief CAN index 0 */
87 IfxCan_Index_1, /**< \brief CAN index 1 */
88 IfxCan_Index_2 /**< \brief CAN index 2 */
89 } IfxCan_Index;
90
91 /** \brief CAN Node number
92 */
93 typedef enum
94 {
95 IfxCan_NodeId_none = -1, /**< \brief None of the CAN Nodes */
96 IfxCan_NodeId_0, /**< \brief Node Id 0 */
97 IfxCan_NodeId_1, /**< \brief Node Id 1 */
98 IfxCan_NodeId_2, /**< \brief Node Id 2 */
99 IfxCan_NodeId_3 /**< \brief Node Id 3 */
100 } IfxCan_NodeId;
101
102 /** \} */
103
104 /******************************************************************************/
105 /*-------------------Global Exported Variables/Constants----------------------*/
106 /******************************************************************************/
107
108 IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxCan_cfg_indexMap[IFXCAN_NUM_MODULES];
109
110 #endif /* IFXCAN_CFG_H */
IfxCan_Index_2
CAN index 2.
Definition: IfxCan_cfg.h:88
IfxCan_Index_none
Not Selected.
Definition: IfxCan_cfg.h:85
IfxCan_NodeId_1
Node Id 1.
Definition: IfxCan_cfg.h:97
IfxCan_NodeId
IfxCan_NodeId
CAN Node number.
Definition: IfxCan_cfg.h:93
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxCan_NodeId_3
Node Id 3.
Definition: IfxCan_cfg.h:99
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxCan_Index_0
CAN index 0.
Definition: IfxCan_cfg.h:86
IfxCan_NodeId_0
Node Id 0.
Definition: IfxCan_cfg.h:96
IfxCan_NodeId_2
Node Id 2.
Definition: IfxCan_cfg.h:98
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IFXCAN_NUM_MODULES
#define IFXCAN_NUM_MODULES
Number of CAN modules.
Definition: IfxCan_cfg.h:69
IfxCan_Index_1
CAN index 1.
Definition: IfxCan_cfg.h:87
IfxCan_NodeId_none
None of the CAN Nodes.
Definition: IfxCan_cfg.h:95
IfxCan_Index
IfxCan_Index
List of the available can resources.
Definition: IfxCan_cfg.h:83
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:140
IfxCan_cfg_indexMap
IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxCan_cfg_indexMap[IFXCAN_NUM_MODULES]
Definition: IfxCan_cfg.h:108


iLLD_TC38A: IfxCcu6.c Source File

  • Ccu6
  • Std
IfxCcu6.c
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6.c
3 * \brief CCU6 basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 *
41 */
42
43 /******************************************************************************/
44 /*----------------------------------Includes----------------------------------*/
45 /******************************************************************************/
46
47 #include "IfxCcu6.h"
48
49 /******************************************************************************/
50 /*-------------------------Function Implementations---------------------------*/
51 /******************************************************************************/
52
53 void IfxCcu6_connectTrigger(Ifx_CCU6 *ccu6, IfxCcu6_TrigOut outputLine, IfxCcu6_TrigSel selectedTrigger)
54 {
55 unsigned mosel = ccu6->MOSEL.U;
56 uint16 shift = (uint16)outputLine;
57 uint16 data = 2 * selectedTrigger;
58
59 if (ccu6 == &MODULE_CCU61)
60 {
61 data = data + 1;
62 }
63
64 mosel = ccu6->MOSEL.U;
65 __ldmst_c(&mosel, (0x7U << shift), (data << shift));
66 ccu6->MOSEL.U = mosel;
67 }
68
69
70 void IfxCcu6_disableModulationOutput(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut)
71 {
72 uint32 shift, mask;
73
74 if (timer != IfxCcu6_TimerId_t13)
75 {
76 if (channelOut != IfxCcu6_ChannelOut_cout3)
77 {
78 shift = channelOut;
79 mask = (1 << shift);
80 ccu6->MODCTR.U = ccu6->MODCTR.U & ~(mask);
81 }
82 else
83 {}
84 }
85 else
86 {
87 if (channelOut != IfxCcu6_ChannelOut_cout3)
88 {
89 shift = channelOut + 8;
90 mask = (1 << shift);
91 ccu6->MODCTR.U = ccu6->MODCTR.U & ~(mask);
92 }
93 else
94 {
95 ccu6->MODCTR.B.ECT13O = FALSE;
96 }
97 }
98 }
99
100
101 void IfxCcu6_disableModule(Ifx_CCU6 *ccu6)
102 {
103 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
104 IfxScuWdt_clearCpuEndinit(passwd);
105 ccu6->CLC.U = 0x00000001;
106 IfxScuWdt_setCpuEndinit(passwd);
107
108 /* Wait until module is disabled */
109 while (IfxCcu6_isModuleEnabled(ccu6) == TRUE)
110 {}
111 }
112
113
114 void IfxCcu6_enableModulationOutput(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut)
115 {
116 uint32 shift, mask;
117
118 if (timer != IfxCcu6_TimerId_t13)
119 {
120 if (channelOut != IfxCcu6_ChannelOut_cout3)
121 {
122 shift = channelOut;
123 mask = (1 << shift);
124 ccu6->MODCTR.U = ccu6->MODCTR.U | (mask);
125 }
126 else
127 {}
128 }
129 else
130 {
131 if (channelOut != IfxCcu6_ChannelOut_cout3)
132 {
133 shift = channelOut + 8;
134 mask = (1 << shift);
135 ccu6->MODCTR.U = ccu6->MODCTR.U | (mask);
136 }
137 else
138 {
139 ccu6->MODCTR.B.ECT13O = TRUE;
140 }
141 }
142 }
143
144
145 void IfxCcu6_enableModule(Ifx_CCU6 *ccu6)
146 {
147 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
148 IfxScuWdt_clearCpuEndinit(passwd);
149 ccu6->CLC.B.DISR = 0U; /* Enable module */
150 IfxScuWdt_setCpuEndinit(passwd);
151
152 /* Wait until module is enabled */
153 while (IfxCcu6_isModuleEnabled(ccu6) == FALSE)
154 {}
155 }
156
157
158 Ifx_CCU6 *IfxCcu6_getAddress(IfxCcu6_Index ccu6)
159 {
160 Ifx_CCU6 *module;
161
162 if (ccu6 < IFXCCU6_NUM_MODULES)
163 {
164 module = (Ifx_CCU6 *)IfxCcu6_cfg_indexMap[ccu6].module;
165 }
166 else
167 {
168 module = NULL_PTR;
169 }
170
171 return module;
172 }
173
174
175 uint32 IfxCcu6_getCaptureRegisterValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
176 {
177 return ccu6->CC6R[channel].U;
178 }
179
180
181 uint32 IfxCcu6_getCaptureShadowRegisterValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
182 {
183 return ccu6->CC6SR[channel].U;
184 }
185
186
187 IfxCcu6_Index IfxCcu6_getIndex(Ifx_CCU6 *ccu6)
188 {
189 uint32 index;
190 IfxCcu6_Index result;
191
192 result = IfxCcu6_Index_none;
193
194 for (index = 0; index < IFXCCU6_NUM_MODULES; index++)
195 {
196 if (IfxCcu6_cfg_indexMap[index].module == ccu6)
197 {
198 result = (IfxCcu6_Index)IfxCcu6_cfg_indexMap[index].index;
199 break;
200 }
201 }
202
203 return result;
204 }
205
206
207 volatile Ifx_SRC_SRCR *IfxCcu6_getSrcAddress(Ifx_CCU6 *ccu6, IfxCcu6_ServiceRequest serviceRequest)
208 {
209 sint32 moduleIdx = IfxCcu6_getIndex(ccu6);
210 volatile Ifx_SRC_SRCR *srcr;
211
212 srcr = &(MODULE_SRC.CCU6.CCU[moduleIdx].SR[0]);
213
214 return &(srcr[serviceRequest]);
215 }
216
217
218 uint32 IfxCcu6_readTimer(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
219 {
220 uint32 result = 0;
221
222 if (timer != IfxCcu6_TimerId_t13)
223 {
224 result = ccu6->T12.U;
225 }
226 else
227 {
228 result = ccu6->T13.U;
229 }
230
231 return result;
232 }
233
234
235 void IfxCcu6_resetModule(Ifx_CCU6 *ccu6)
236 {
237 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
238
239 IfxScuWdt_clearCpuEndinit(passwd);
240 ccu6->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
241 ccu6->KRST1.B.RST = 1;
242 IfxScuWdt_setCpuEndinit(passwd);
243
244 while (0 == ccu6->KRST0.B.RSTSTAT) /* Wait until reset is executed */
245
246 {}
247
248 IfxScuWdt_clearCpuEndinit(passwd);
249 ccu6->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
250 IfxScuWdt_setCpuEndinit(passwd);
251 }
252
253
254 void IfxCcu6_routeInterruptNode(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source, IfxCcu6_ServiceRequest serviceRequest)
255 {
256 if ((source == IfxCcu6_InterruptSource_cc60RisingEdge) || (source == IfxCcu6_InterruptSource_cc60FallingEdge))
257 {
258 ccu6->INP.B.INPCC60 = serviceRequest;
259 }
260 else if ((source == IfxCcu6_InterruptSource_cc61RisingEdge) || (source == IfxCcu6_InterruptSource_cc61FallingEdge))
261 {
262 ccu6->INP.B.INPCC61 = serviceRequest;
263 }
264 else if ((source == IfxCcu6_InterruptSource_cc62RisingEdge) || (source == IfxCcu6_InterruptSource_cc62FallingEdge))
265 {
266 ccu6->INP.B.INPCC62 = serviceRequest;
267 }
268 else if ((source == IfxCcu6_InterruptSource_correctHallEvent))
269 {
270 ccu6->INP.B.INPCHE = serviceRequest;
271 }
272 else if ((source == IfxCcu6_InterruptSource_trap) || (source == IfxCcu6_InterruptSource_wrongHallEvent))
273 {
274 ccu6->INP.B.INPERR = serviceRequest;
275 }
276 else if ((source == IfxCcu6_InterruptSource_t12OneMatch) || (source == IfxCcu6_InterruptSource_t12PeriodMatch))
277 {
278 ccu6->INP.B.INPT12 = serviceRequest;
279 }
280 else if ((source == IfxCcu6_InterruptSource_t13CompareMatch) || (source == IfxCcu6_InterruptSource_t13PeriodMatch))
281 {
282 ccu6->INP.B.INPT13 = serviceRequest;
283 }
284 else
285 {
286 __debug();
287 }
288 }
289
290
291 void IfxCcu6_setOutputPassiveLevel(Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut, boolean state)
292 {
293 if (channelOut != IfxCcu6_ChannelOut_cout3)
294 {
295 uint32 shift = channelOut;
296 uint32 mask = (1 << shift);
297 ccu6->PSLR.U = (ccu6->PSLR.U & ~mask) | ((uint32)state << shift);
298 }
299 else
300 {
301 ccu6->PSLR.B.PSL63 = state;
302 }
303 }
304
305
306 void IfxCcu6_setT12CaptureCompareState(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, IfxCcu6_CaptureCompareState state)
307 {
308 uint32 mask = (0x0101U << channel);
309 uint32 mode;
310
311 if (state == IfxCcu6_CaptureCompareState_set)
312 {
313 mode = 0x0001U;
314 ccu6->CMPMODIF.U = (ccu6->CMPMODIF.U & ~mask) | (mode << channel);
315 }
316
317 if (state == IfxCcu6_CaptureCompareState_clear)
318 {
319 mode = 0x0100U;
320 ccu6->CMPMODIF.U = (ccu6->CMPMODIF.U & ~mask) | (mode << channel);
321 }
322
323 if (state == IfxCcu6_CaptureCompareState_toggle)
324 {
325 mode = 0x0101U;
326 ccu6->CMPMODIF.U = (ccu6->CMPMODIF.U & ~mask) | (mode << channel);
327 }
328 }
329
330
331 void IfxCcu6_setT12CompareValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, uint16 value)
332 {
333 ccu6->CC6SR[channel].B.CCS = value;
334 }
335
336
337 float32 IfxCcu6_setT12Frequency(Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period, IfxCcu6_T12CountMode countMode)
338 {
339 uint16 prescaler;
340 float32 freqCC6 = IfxScuCcu_getSpbFrequency();
341 uint16 divFactor = freqCC6 / frequency;
342
343 for (prescaler = 0; prescaler < 16; prescaler++)
344 {
345 divFactor = divFactor / 2;
346
347 if (divFactor == (uint8)0)
348 {
349 break;
350 }
351 }
352
353 if (prescaler < 16)
354 {
355 uint16 periodVal;
356 boolean additionalPrescaler;
357 IfxCcu6_TimerInputClock clockInput;
358
359 periodVal = (uint16)((countMode != IfxCcu6_T12CountMode_edgeAligned) ? ((period / 2) - 1) : (period - 1));
360 IfxCcu6_setT12PeriodValue(ccu6, periodVal);
361 IfxCcu6_enableShadowTransfer(ccu6, TRUE, FALSE);
362
363 clockInput = (IfxCcu6_TimerInputClock)(prescaler & 0x7U);
364 IfxCcu6_setInputClockFrequency(ccu6, IfxCcu6_TimerId_t12, clockInput);
365
366 additionalPrescaler = ((prescaler & 0x8U) != 0);
367
368 if (additionalPrescaler)
369 {
370 IfxCcu6_enableAdditionalPrescaler(ccu6, IfxCcu6_TimerId_t12);
371 }
372
373 IfxCcu6_setT12CountMode(ccu6, countMode);
374
375 frequency = freqCC6 / (0x1u << prescaler); // Frequency = FREQ_CCU6 / (2 ^ prescaler)
376 }
377 else
378 {
379 frequency = 0;
380 }
381
382 return frequency;
383 }
384
385
386 void IfxCcu6_setT12InputSignal(Ifx_CCU6 *ccu6, IfxCcu6_T12hr_In *extInput)
387 {
388 ccu6->PISEL2.B.T12EXT = extInput->select >= Ifx_RxSel_e;
389 ccu6->PISEL0.B.IST12HR = extInput->select;
390
391 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, extInput->module == ccu6);
392 }
393
394
395 void IfxCcu6_setT13CaptureCompareState(Ifx_CCU6 *ccu6, IfxCcu6_CaptureCompareState state)
396 {
397 uint32 shift = 6;
398 uint32 mask = (0x0101U << shift);
399 uint32 mode;
400
401 if (state == IfxCcu6_CaptureCompareState_set)
402 {
403 mode = 0x0001U;
404 ccu6->CMPMODIF.U = (ccu6->CMPMODIF.U & ~mask) | (mode << shift);
405 }
406
407 if (state == IfxCcu6_CaptureCompareState_clear)
408 {
409 mode = 0x0100U;
410 ccu6->CMPMODIF.U = (ccu6->CMPMODIF.U & ~mask) | (mode << shift);
411 }
412
413 if (state == IfxCcu6_CaptureCompareState_toggle)
414 {
415 mode = 0x0101U;
416 ccu6->CMPMODIF.U = (ccu6->CMPMODIF.U & ~mask) | (mode << shift);
417 }
418 }
419
420
421 float32 IfxCcu6_setT13Frequency(Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period)
422 {
423 uint16 prescaler;
424 float32 freqCC6 = IfxScuCcu_getSpbFrequency();
425 uint16 divFactor = freqCC6 / frequency;
426
427 for (prescaler = 0; prescaler < 16; prescaler++)
428 {
429 divFactor = divFactor / 2;
430
431 if (divFactor == (uint8)0)
432 {
433 break;
434 }
435 }
436
437 if (prescaler < 16)
438 {
439 uint16 periodVal;
440 boolean additionalPrescaler;
441 IfxCcu6_TimerInputClock clockInput;
442
443 periodVal = (uint16)(period - 1);
444 IfxCcu6_setT13PeriodValue(ccu6, periodVal);
445 IfxCcu6_enableShadowTransfer(ccu6, FALSE, TRUE);
446
447 clockInput = (IfxCcu6_TimerInputClock)(prescaler & 0x7U);
448 IfxCcu6_setInputClockFrequency(ccu6, IfxCcu6_TimerId_t13, clockInput);
449
450 additionalPrescaler = ((prescaler & 0x8U) != 0);
451
452 if (additionalPrescaler)
453 {
454 IfxCcu6_enableAdditionalPrescaler(ccu6, IfxCcu6_TimerId_t13);
455 }
456
457 frequency = freqCC6 / (0x1u << prescaler); // Frequency = FREQ_CCU6 / (2 ^ prescaler)
458 }
459 else
460 {
461 /** \retval IfxCcu6_Stat_wrongPwmFreq if the T12 prescaler can't fulfill the
462 * required frequency */
463 frequency = 0;
464 }
465
466 return frequency;
467 }
468
469
470 void IfxCcu6_setT13InputSignal(Ifx_CCU6 *ccu6, IfxCcu6_T13hr_In *extInput)
471 {
472 ccu6->PISEL2.B.T13EXT = extInput->select >= Ifx_RxSel_e;
473 ccu6->PISEL2.B.IST13HR = extInput->select;
474
475 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, extInput->module == ccu6);
476 }
IfxCcu6_enableAdditionalPrescaler
IFX_INLINE void IfxCcu6_enableAdditionalPrescaler(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Enables the additional prescaler of 1/256 can be enabled for the prescaler of T12 or T13 to support h...
Definition: IfxCcu6.h:1522
IfxCcu6_Index_none
Not Selected.
Definition: IfxCcu6_cfg.h:82
IfxScuCcu_getSpbFrequency
float32 IfxScuCcu_getSpbFrequency(void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider...
Definition: IfxScuCcu.c:479
Ifx_RxSel_e
Definition: Ifx_Types.h:133
IfxCcu6_getSrcAddress
volatile Ifx_SRC_SRCR * IfxCcu6_getSrcAddress(Ifx_CCU6 *ccu6, IfxCcu6_ServiceRequest serviceRequest)
Returns the service request register.
Definition: IfxCcu6.c:207
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxCcu6_Index
IfxCcu6_Index
List of the available CCU6 resources.
Definition: IfxCcu6_cfg.h:80
IfxCcu6_InterruptSource_cc62FallingEdge
Capture compare match falling edge interrupt enable for channel CC62.
Definition: IfxCcu6.h:191
IfxCcu6_T12CountMode_edgeAligned
T12 always counts up and continues counting from zero after reaching the period value.
Definition: IfxCcu6.h:299
IfxCcu6_InterruptSource_t13PeriodMatch
Interrupt enable for T13 period-match.
Definition: IfxCcu6.h:196
IfxCcu6_InterruptSource
IfxCcu6_InterruptSource
Interrupt source selection Description in Ifx_CCU.IEN.
Definition: IfxCcu6.h:179
IfxCcu6_InterruptSource_wrongHallEvent
Interrupt enable for wrong hall event.
Definition: IfxCcu6.h:199
IfxCcu6_getCaptureShadowRegisterValue
uint32 IfxCcu6_getCaptureShadowRegisterValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the capture shadow register value of the selected channel.
Definition: IfxCcu6.c:181
IfxCcu6_InterruptSource_t13CompareMatch
Interrupt enable for T13 compare-match.
Definition: IfxCcu6.h:195
IfxCcu6_InterruptSource_trap
Interrupt enable for trap flag.
Definition: IfxCcu6.h:197
IfxCcu6_CaptureCompareState_clear
Bit CC6xST is cleared.
Definition: IfxCcu6.h:104
IfxCcu6_ChannelOut
IfxCcu6_ChannelOut
Capture compare output pins.
Definition: IfxCcu6.h:110
IfxCcu6_InterruptSource_cc60RisingEdge
Capture compare match rising edge interrupt enable for channel CC60.
Definition: IfxCcu6.h:181
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxCcu6_InterruptSource_cc61FallingEdge
Capture compare match falling edge interrupt enable for channel CC61.
Definition: IfxCcu6.h:187
float32
float float32
Definition: Platform_Types.h:170
__ldmst_c
IFX_INLINE void __ldmst_c(volatile void *address, unsigned mask, unsigned value)
Definition: IfxCpu_Intrinsics.h:108
IfxCcu6_InterruptSource_cc60FallingEdge
Capture compare match falling edge interrupt enable for channel CC60.
Definition: IfxCcu6.h:183
IfxCcu6_T12hr_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxCcu6_PinMap.h:116
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxCcu6_getAddress
Ifx_CCU6 * IfxCcu6_getAddress(IfxCcu6_Index ccu6)
Returns the module index of the selected CCU6 module.
Definition: IfxCcu6.c:158
IfxCcu6_routeInterruptNode
void IfxCcu6_routeInterruptNode(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source, IfxCcu6_ServiceRequest serviceRequest)
Routes the interrupt node pointer to the selected service requests.
Definition: IfxCcu6.c:254
IfxCcu6_TimerId_t13
Timer 13.
Definition: IfxCcu6.h:337
IfxCcu6_InterruptSource_cc61RisingEdge
Capture compare match rising edge interrupt enable for channel CC61.
Definition: IfxCcu6.h:185
IfxCcu6_disableModule
void IfxCcu6_disableModule(Ifx_CCU6 *ccu6)
Disables the selected CCU6 kernel.
Definition: IfxCcu6.c:101
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxCcu6_setT12Frequency
float32 IfxCcu6_setT12Frequency(Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period, IfxCcu6_T12CountMode countMode)
Sets the frequency and clock input of the Timer 12. Caution: If desired frequency cannot achieved (by...
Definition: IfxCcu6.c:337
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxCcu6_enableShadowTransfer
IFX_INLINE void IfxCcu6_enableShadowTransfer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Enables shadow transfers of the timers (T12, T13 individually or together based on the selection) ...
Definition: IfxCcu6.h:1603
IfxCcu6_T12hr_In::module
Ifx_CCU6 * module
Base address.
Definition: IfxCcu6_PinMap.h:114
IfxCcu6_CaptureCompareState_toggle
Bit CC6xST is toggled.
Definition: IfxCcu6.h:105
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxCcu6_TimerId_t12
Timer 12.
Definition: IfxCcu6.h:336
IfxCcu6_CaptureCompareState_set
Bit CC6xST is set.
Definition: IfxCcu6.h:103
IfxCcu6_ChannelOut_cout3
CC63 compare output COUT3.
Definition: IfxCcu6.h:118
IfxCcu6_setT13InputSignal
void IfxCcu6_setT13InputSignal(Ifx_CCU6 *ccu6, IfxCcu6_T13hr_In *extInput)
selects the actual input signal for the timer inputs.
Definition: IfxCcu6.c:470
IfxCcu6_setT12CountMode
IFX_INLINE void IfxCcu6_setT12CountMode(Ifx_CCU6 *ccu6, IfxCcu6_T12CountMode mode)
Definition: IfxCcu6.h:2079
IfxCcu6_readTimer
uint32 IfxCcu6_readTimer(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Returns the current value of the timer register.
Definition: IfxCcu6.c:218
IfxCcu6_T12Channel
IfxCcu6_T12Channel
Capture compare channel of Timer12.
Definition: IfxCcu6.h:258
IfxCcu6_InterruptSource_t12OneMatch
Interrupt enable for T12 one-match.
Definition: IfxCcu6.h:193
IfxCcu6.h
CCU6 basic functionality.
IFXCCU6_NUM_MODULES
#define IFXCCU6_NUM_MODULES
Definition: IfxCcu6_cfg.h:66
IfxCcu6_ServiceRequest
IfxCcu6_ServiceRequest
Selection of service request outputs.
Definition: IfxCcu6.h:230
IfxCcu6_TimerId
IfxCcu6_TimerId
Timer number ( T12 / T13 )
Definition: IfxCcu6.h:334
IfxCcu6_isModuleEnabled
IFX_INLINE boolean IfxCcu6_isModuleEnabled(Ifx_CCU6 *ccu6)
Returns the status of module enabled or disabled.
Definition: IfxCcu6.h:1914
__debug
void __debug(void) __attribute__((intrinsic_function(0x103
IfxCcu6_T12CountMode
IfxCcu6_T12CountMode
Operating mode of Timer 12 Definition in Ifx_CCU.TCTR0.B.CTM.
Definition: IfxCcu6.h:297
IfxCcu6_setT12CompareValue
void IfxCcu6_setT12CompareValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, uint16 value)
Sets the 16-bit compare value of Timer12 (writes into shadow registers)
Definition: IfxCcu6.c:331
IfxCcu6_disableModulationOutput
void IfxCcu6_disableModulationOutput(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut)
Disables the modulation of the corresponding output signal by PWM pattern generated by the timers T12...
Definition: IfxCcu6.c:70
IfxCcu6_setT12CaptureCompareState
void IfxCcu6_setT12CaptureCompareState(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, IfxCcu6_CaptureCompareState state)
Sets software-control (independent set and clear conditions) for the Timer12 channel state bits CC6xS...
Definition: IfxCcu6.c:306
IfxCcu6_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxCcu6_cfg_indexMap[IFXCCU6_NUM_MODULES]
Definition: IfxCcu6_cfg.c:58
IfxCcu6_T12hr_In
T12HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:112
IfxCcu6_T13hr_In
T13HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:120
IfxCcu6_getIndex
IfxCcu6_Index IfxCcu6_getIndex(Ifx_CCU6 *ccu6)
Returns CCU6 index.
Definition: IfxCcu6.c:187
u
uint32 min u
Definition: IfxCpu_IntrinsicsDcc.h:143
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxCcu6_setInputClockFrequency
IFX_INLINE void IfxCcu6_setInputClockFrequency(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_TimerInputClock frequency)
Sets the input clock for timers (T12 or T13)
Definition: IfxCcu6.h:2000
IfxCcu6_connectTrigger
void IfxCcu6_connectTrigger(Ifx_CCU6 *ccu6, IfxCcu6_TrigOut outputLine, IfxCcu6_TrigSel selectedTrigger)
Definition: IfxCcu6.c:53
IfxCcu6_InterruptSource_t12PeriodMatch
Interrupt enable for T12 period-match.
Definition: IfxCcu6.h:194
sint32
long sint32
Definition: Platform_Types.h:134
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxCcu6_InterruptSource_correctHallEvent
Interrupt enable for correct hall event.
Definition: IfxCcu6.h:198
IfxCcu6_InterruptSource_cc62RisingEdge
Capture compare match rising edge interrupt enable for channel CC62.
Definition: IfxCcu6.h:189
IfxCcu6_setT12InputSignal
void IfxCcu6_setT12InputSignal(Ifx_CCU6 *ccu6, IfxCcu6_T12hr_In *extInput)
selects the actual input signal for the timer inputs.
Definition: IfxCcu6.c:386
IfxCcu6_setOutputPassiveLevel
void IfxCcu6_setOutputPassiveLevel(Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut, boolean state)
Sets the passive state level of the PWM outputs of the module.
Definition: IfxCcu6.c:291
IfxCcu6_TrigSel
IfxCcu6_TrigSel
Definition: IfxCcu6_cfg.h:94
IfxCcu6_setT13CaptureCompareState
void IfxCcu6_setT13CaptureCompareState(Ifx_CCU6 *ccu6, IfxCcu6_CaptureCompareState state)
Sets software-control (independent set and clear conditions) for the Timer13 channel state bits CC63S...
Definition: IfxCcu6.c:395
IfxCcu6_CaptureCompareState
IfxCcu6_CaptureCompareState
capture/compare state to set / clear the CC6xST-bits
Definition: IfxCcu6.h:101
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxCcu6_TrigOut
IfxCcu6_TrigOut
Definition: IfxCcu6_cfg.h:87
IfxCcu6_setT12PeriodValue
IFX_INLINE void IfxCcu6_setT12PeriodValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the period value that leads Timer12 counter value to a period-match.
Definition: IfxCcu6.h:2091
IfxCcu6_resetModule
void IfxCcu6_resetModule(Ifx_CCU6 *ccu6)
Definition: IfxCcu6.c:235
TRUE
#define TRUE
Definition: Platform_Types.h:90
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
IfxCcu6_setT13PeriodValue
IFX_INLINE void IfxCcu6_setT13PeriodValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the period value that leads Timer13 counter value to a period-match.
Definition: IfxCcu6.h:2109
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxCcu6_enableModule
void IfxCcu6_enableModule(Ifx_CCU6 *ccu6)
Enables the selected CCU6 kernel.
Definition: IfxCcu6.c:145
IfxCcu6_TimerInputClock
IfxCcu6_TimerInputClock
Selects the input clock for timers (T12 or T13) that is derived from the peripheral clock according t...
Definition: IfxCcu6.h:343
IfxCcu6_enableModulationOutput
void IfxCcu6_enableModulationOutput(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut)
Enables the modulation of the corresponding output signal by PWM pattern generated by the timers T12 ...
Definition: IfxCcu6.c:114
IfxCcu6_getCaptureRegisterValue
uint32 IfxCcu6_getCaptureRegisterValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the capture register value of the selected channel.
Definition: IfxCcu6.c:175
IfxCcu6_setT13Frequency
float32 IfxCcu6_setT13Frequency(Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period)
Sets the frequency and clock input of the Timer 13 Caution: If desired frequency cannot achieved (by ...
Definition: IfxCcu6.c:421


iLLD_TC38A: IfxCcu6.h Source File

  • Ccu6
  • Std
IfxCcu6.h
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6.h
3 * \brief CCU6 basic functionality
4 * \ingroup IfxLld_Ccu6
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 * \defgroup IfxLld_Ccu6_Std_Enum Enumerations
43 * \ingroup IfxLld_Ccu6_Std
44 * \defgroup IfxLld_Ccu6_Std_Operative Operative Functions
45 * \ingroup IfxLld_Ccu6_Std
46 * \defgroup IfxLld_Ccu6_Std_Utility Utility Functions
47 * \ingroup IfxLld_Ccu6_Std
48 * \defgroup IfxLld_Ccu6_Std_Configuration Configuration Functions
49 * \ingroup IfxLld_Ccu6_Std
50 * \defgroup IfxLld_Ccu6_Std_IO IO Pin Configuration Functions
51 * \ingroup IfxLld_Ccu6_Std
52 */
53
54 #ifndef IFXCCU6_H
55 #define IFXCCU6_H 1
56
57 /******************************************************************************/
58 /*----------------------------------Includes----------------------------------*/
59 /******************************************************************************/
60
61 #include "_Impl/IfxCcu6_cfg.h"
62 #include "Src/Std/IfxSrc.h"
63 #include "Cpu/Std/IfxCpu_Intrinsics.h"
64 #include "Scu/Std/IfxScuWdt.h"
65 #include "Scu/Std/IfxScuCcu.h"
66 #include "_Utilities/Ifx_Assert.h"
67 #include "_PinMap/IfxCcu6_PinMap.h"
68
69 /******************************************************************************/
70 /*--------------------------------Enumerations--------------------------------*/
71 /******************************************************************************/
72
73 /** \addtogroup IfxLld_Ccu6_Std_Enum
74 * \{ */
75 /** \brief Input selection, ( CC6x capture input / CTRAP input / CCPOSx input )\n
76 * Definition in Ifx_CCU.PISEL0
77 */
78 typedef enum
79 {
80 IfxCcu6_CaptureCompareInput_cC60 = IFX_CCU6_PISEL0_ISCC60_OFF, /**< \brief CC60 capture input */
81 IfxCcu6_CaptureCompareInput_cC61 = IFX_CCU6_PISEL0_ISCC61_OFF, /**< \brief CC61 capture input */
82 IfxCcu6_CaptureCompareInput_cC62 = IFX_CCU6_PISEL0_ISCC62_OFF, /**< \brief CC62 capture input */
83 IfxCcu6_CaptureCompareInput_cTRAP = IFX_CCU6_PISEL0_ISTRP_OFF, /**< \brief CTRAP input */
84 IfxCcu6_CaptureCompareInput_cCPOS0 = IFX_CCU6_PISEL0_ISPOS0_OFF, /**< \brief CCPOS0 input */
85 IfxCcu6_CaptureCompareInput_cCPOS1 = IFX_CCU6_PISEL0_ISPOS1_OFF, /**< \brief CCPOS1 input */
86 IfxCcu6_CaptureCompareInput_cCPOS2 = IFX_CCU6_PISEL0_ISPOS2_OFF /**< \brief CCPOS2 input */
87 } IfxCcu6_CaptureCompareInput;
88
89 /** \brief Selection of actual input signal for the capture compare inputs
90 */
91 typedef enum
92 {
93 IfxCcu6_CaptureCompareInputSignal_a = 0, /**< \brief defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input. */
94 IfxCcu6_CaptureCompareInputSignal_b = 1, /**< \brief defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input. */
95 IfxCcu6_CaptureCompareInputSignal_c = 2, /**< \brief defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input. */
96 IfxCcu6_CaptureCompareInputSignal_d = 3 /**< \brief defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input. */
97 } IfxCcu6_CaptureCompareInputSignal;
98
99 /** \brief capture/compare state to set / clear the CC6xST-bits
100 */
101 typedef enum
102 {
103 IfxCcu6_CaptureCompareState_set = 0, /**< \brief Bit CC6xST is set */
104 IfxCcu6_CaptureCompareState_clear = 1, /**< \brief Bit CC6xST is cleared */
105 IfxCcu6_CaptureCompareState_toggle = 2 /**< \brief Bit CC6xST is toggled */
106 } IfxCcu6_CaptureCompareState;
107
108 /** \brief Capture compare output pins
109 */
110 typedef enum
111 {
112 IfxCcu6_ChannelOut_cc0 = 0, /**< \brief CC60 compare output CC0 */
113 IfxCcu6_ChannelOut_cout0 = 1, /**< \brief CC60 compare output COUT0 */
114 IfxCcu6_ChannelOut_cc1 = 2, /**< \brief CC61 compare output CC1 */
115 IfxCcu6_ChannelOut_cout1 = 3, /**< \brief CC61 compare output COUT1 */
116 IfxCcu6_ChannelOut_cc2 = 4, /**< \brief CC62 compare output CC2 */
117 IfxCcu6_ChannelOut_cout2 = 5, /**< \brief CC62 compare output COUT2 */
118 IfxCcu6_ChannelOut_cout3 = 6 /**< \brief CC63 compare output COUT3 */
119 } IfxCcu6_ChannelOut;
120
121 /** \brief Defines the input event leading to a counting action of the timer (T12 / T13)\n
122 * Definition in Ifx_CCU.PISEL2.B.ISCNT12 / Ifx_CCU.PISEL2.B.ISCNT13
123 */
124 typedef enum
125 {
126 IfxCcu6_CountingInputMode_internal = 0, /**< \brief The T1x prescaler generates the counting events,
127 * Bit TCTR4.T1xCNT is not taken into account. */
128 IfxCcu6_CountingInputMode_manual = 1, /**< \brief Bit TCTR4.T1xCNT written with 1 is a counting
129 * event. The T1x prescaler is not taken into account */
130 IfxCcu6_CountingInputMode_externalRising = 2, /**< \brief The timer T1x is counting each rising edge
131 * detected in the selected T1xHR signal */
132 IfxCcu6_CountingInputMode_externalFalling = 3 /**< \brief The timer T1x is counting each falling edge
133 * detected in the selected T1xHR signal */
134 } IfxCcu6_CountingInputMode;
135
136 /** \brief Controls whether the source signal for the sampling of the Hall input pattern (selected by HSYNC) is delayed by the Dead-Time Counter 0\n
137 * Definition in Ifx_CCU.T12MSEL.B.DBYP
138 */
139 typedef enum
140 {
141 IfxCcu6_DelayBypass_notActive = 0, /**< \brief Dead-Time Counter 0 is generating a delay after
142 * the source signal becomes active */
143 IfxCcu6_DelayBypass_active = 1 /**< \brief Dead-Time Counter 0 is not used for a delay */
144 } IfxCcu6_DelayBypass;
145
146 /** \brief Defines the event of signal T1xHR that can set the run bit T1xR by HW\n
147 * Definition in Ifx_CCU.TCTR2.B.T12RSEL / IIfx_CCU.TCTR2.B.T13RSEL
148 */
149 typedef enum
150 {
151 IfxCcu6_ExternalTriggerMode_disable = 0, /**< \brief The external setting of T1xR is disabled */
152 IfxCcu6_ExternalTriggerMode_risingEdge = 1, /**< \brief Bit T1xR is set if a rising edge of signal T1xHR is
153 * detected. */
154 IfxCcu6_ExternalTriggerMode_fallingEdge = 2, /**< \brief Bit T1xR is set if a falling edge of signal T1xHR is
155 * detected. */
156 IfxCcu6_ExternalTriggerMode_anyEdge = 3 /**< \brief Bit T1xR is set if an edge of signal T1xHR is
157 * detected */
158 } IfxCcu6_ExternalTriggerMode;
159
160 /** \brief Defines the source for the sampling of the Hall input pattern and the comparison to the current and the expected Hall pattern bit fields\n
161 * Definition in Ifx_CCU.T12MSEL.HSYNC
162 */
163 typedef enum
164 {
165 IfxCcu6_HallSensorTriggerMode_permanentCheck = 0, /**< \brief Any edge at any of the inputs CCPOSx, independent from any PWM
166 * signal */
167 IfxCcu6_HallSensorTriggerMode_cM63 = 1, /**< \brief A T13 Compare-Match */
168 IfxCcu6_HallSensorTriggerMode_t13PM = 2, /**< \brief A T13 Period-Match */
169 IfxCcu6_HallSensorTriggerMode_off = 3, /**< \brief Hall sampling triggered by HW sources is switched off */
170 IfxCcu6_HallSensorTriggerMode_t12PMCountingUp = 4, /**< \brief A T12 Period-Match while counting up (T12_PM and CDIR = 0) */
171 IfxCcu6_HallSensorTriggerMode_t12OMCountingDown = 5, /**< \brief A T12 One-Match while counting down (T12_PM and CDIR = 1) */
172 IfxCcu6_HallSensorTriggerMode_cM61CountingUp = 6, /**< \brief A T12 Compare-Match of compare channel CC61 while counting up (CM_61 and CDIR = 0) */
173 IfxCcu6_HallSensorTriggerMode_cM61CountingDown = 7 /**< \brief A T12 Compare-Match of compare channel CC61 while counting down (CM_61 and CDIR = 1) */
174 } IfxCcu6_HallSensorTriggerMode;
175
176 /** \brief Interrupt source selection
177 * Description in Ifx_CCU.IEN
178 */
179 typedef enum
180 {
181 IfxCcu6_InterruptSource_cc60RisingEdge = IFX_CCU6_IS_ICC60R_OFF, /**< \brief Capture compare match rising edge interrupt
182 * enable for channel CC60 */
183 IfxCcu6_InterruptSource_cc60FallingEdge = IFX_CCU6_IS_ICC60F_OFF, /**< \brief Capture compare match falling edge interrupt
184 * enable for channel CC60 */
185 IfxCcu6_InterruptSource_cc61RisingEdge = IFX_CCU6_IS_ICC61R_OFF, /**< \brief Capture compare match rising edge interrupt
186 * enable for channel CC61 */
187 IfxCcu6_InterruptSource_cc61FallingEdge = IFX_CCU6_IS_ICC61F_OFF, /**< \brief Capture compare match falling edge interrupt
188 * enable for channel CC61 */
189 IfxCcu6_InterruptSource_cc62RisingEdge = IFX_CCU6_IS_ICC62R_OFF, /**< \brief Capture compare match rising edge interrupt
190 * enable for channel CC62 */
191 IfxCcu6_InterruptSource_cc62FallingEdge = IFX_CCU6_IS_ICC62F_OFF, /**< \brief Capture compare match falling edge interrupt
192 * enable for channel CC62 */
193 IfxCcu6_InterruptSource_t12OneMatch = IFX_CCU6_IS_T12OM_OFF, /**< \brief Interrupt enable for T12 one-match */
194 IfxCcu6_InterruptSource_t12PeriodMatch = IFX_CCU6_IS_T12PM_OFF, /**< \brief Interrupt enable for T12 period-match */
195 IfxCcu6_InterruptSource_t13CompareMatch = IFX_CCU6_IS_T13CM_OFF, /**< \brief Interrupt enable for T13 compare-match */
196 IfxCcu6_InterruptSource_t13PeriodMatch = IFX_CCU6_IS_T13PM_OFF, /**< \brief Interrupt enable for T13 period-match */
197 IfxCcu6_InterruptSource_trap = IFX_CCU6_IS_TRPF_OFF, /**< \brief Interrupt enable for trap flag */
198 IfxCcu6_InterruptSource_correctHallEvent = IFX_CCU6_IS_CHE_OFF, /**< \brief Interrupt enable for correct hall event */
199 IfxCcu6_InterruptSource_wrongHallEvent = IFX_CCU6_IS_WHE_OFF /**< \brief Interrupt enable for wrong hall event */
200 } IfxCcu6_InterruptSource;
201
202 /** \brief Selection of the trigger request source (next multi-channel event) for the shadow transfer MCM_ST from MCMPS to MCMP\n
203 * Definition in Ifx_CCU.MCMCTR.B.SWSEL
204 */
205 typedef enum
206 {
207 IfxCcu6_MultiChannelSwitchingSelect_noEvent = 0, /**< \brief No trigger request will be generated */
208 IfxCcu6_MultiChannelSwitchingSelect_correctHallEvent = 1, /**< \brief Correct Hall pattern detected (CM_CHE) */
209 IfxCcu6_MultiChannelSwitchingSelect_t13PeriodMatch = 2, /**< \brief T13 period-match detected (while counting up) */
210 IfxCcu6_MultiChannelSwitchingSelect_t12OneMatch = 3, /**< \brief T12 one-match (while counting down) */
211 IfxCcu6_MultiChannelSwitchingSelect_t12Channel1CompareMatch = 4, /**< \brief T12 channel 1 compare-match detected (phase
212 * delay function) */
213 IfxCcu6_MultiChannelSwitchingSelect_t12PeriodMatch = 5 /**< \brief T12 period match detected (while counting up) */
214 } IfxCcu6_MultiChannelSwitchingSelect;
215
216 /** \brief Selection of the synchronization mechanism for the shadow transfer event MCM_ST\n
217 * Definition in Ifx_CCU.MCMCTR.B.SWSYN
218 */
219 typedef enum
220 {
221 IfxCcu6_MultiChannelSwitchingSync_direct = 0, /**< \brief Direct, the trigger event immediately leads to the
222 * shadow transfer */
223 IfxCcu6_MultiChannelSwitchingSync_t13ZeroMatch = 1, /**< \brief A T13 zero-match triggers the shadow transfer */
224 IfxCcu6_MultiChannelSwitchingSync_t12ZeroMatch = 2 /**< \brief A T12 zero-match (while counting up) triggers the
225 * shadow transfer */
226 } IfxCcu6_MultiChannelSwitchingSync;
227
228 /** \brief Selection of service request outputs
229 */
230 typedef enum
231 {
232 IfxCcu6_ServiceRequest_0 = 0, /**< \brief Service request output SR0 */
233 IfxCcu6_ServiceRequest_1, /**< \brief Service request output SR1 */
234 IfxCcu6_ServiceRequest_2, /**< \brief Service request output SR2 */
235 IfxCcu6_ServiceRequest_3 /**< \brief Service request output SR3 */
236 } IfxCcu6_ServiceRequest;
237
238 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
239 * Definition in Ifx_CCU6.CLC.B.EDIS
240 */
241 typedef enum
242 {
243 IfxCcu6_SleepMode_enable = 0, /**< \brief enables sleep mode */
244 IfxCcu6_SleepMode_disable = 1 /**< \brief disables sleep mode */
245 } IfxCcu6_SleepMode;
246
247 /** \brief OCDS Suspend Control (OCDS.SUS)
248 */
249 typedef enum
250 {
251 IfxCcu6_SuspendMode_none = 0, /**< \brief No suspend */
252 IfxCcu6_SuspendMode_hard = 1, /**< \brief Hard Suspend */
253 IfxCcu6_SuspendMode_soft = 2 /**< \brief Soft Suspend */
254 } IfxCcu6_SuspendMode;
255
256 /** \brief Capture compare channel of Timer12
257 */
258 typedef enum
259 {
260 IfxCcu6_T12Channel_0 = 0, /**< \brief T12 channel CC60 */
261 IfxCcu6_T12Channel_1, /**< \brief T12 channel CC61 */
262 IfxCcu6_T12Channel_2 /**< \brief T12 channel CC62 */
263 } IfxCcu6_T12Channel;
264
265 /** \brief The operating mode for the T12 channels are defined by the bit fields Ifx_CCU.T12MSEL.MSEL6x.
266 */
267 typedef enum
268 {
269 IfxCcu6_T12ChannelMode_off = 0, /**< \brief Capture/Compare modes switched off */
270 IfxCcu6_T12ChannelMode_compareMode = 1, /**< \brief Compare mode */
271 IfxCcu6_T12ChannelMode_doubleRegisterCaptureRisingAndFalling = 4, /**< \brief CC6xIN rising edge: T12 stored in CC6xR, falling edge: T12 stored in CC6xSR */
272 IfxCcu6_T12ChannelMode_doubleRegisterCaptureRising = 5, /**< \brief CC6xIN rising edge: CC6nSR stored in CC6xR, falling edge: T12 stored in CC6xSR */
273 IfxCcu6_T12ChannelMode_doubleRegisterCaptureFalling = 6, /**< \brief CC6xIN rising edge: CC6nSR stored in CC6xR, falling edge: T12 stored in CC6xSR */
274 IfxCcu6_T12ChannelMode_doubleRegisterCaptureAny = 7, /**< \brief CC6xIN any active edge: CC6nSR stored in CC6xR, any active edge: T12 stored in CC6xSR */
275 IfxCcu6_T12ChannelMode_hallSensor = 8, /**< \brief Hall Sensor Mode, In order to properly enable this mode, all three MSEL6x fields have to be
276 * programmed to Hall Sensor mode */
277 IfxCcu6_T12ChannelMode_hysteresisLikecompare = 9, /**< \brief Hysteresis-like compare mode */
278 IfxCcu6_T12ChannelMode_multiInputCaptureRisingAndFalling = 10, /**< \brief CC6xIN rising edge: T12 stored in CC6xR, CCPOSx falling edge: T12 stored in CC6xSR */
279 IfxCcu6_T12ChannelMode_multiInputCaptureFallingAndRising = 11, /**< \brief CC6xIN falling edge: T12 stored in CC6xR, CCPOSx rising edge: T12 stored in CC6xSR */
280 IfxCcu6_T12ChannelMode_multiInputCaptureBothRising = 12, /**< \brief CC6xIN rising edge: T12 stored in CC6xR, CCPOSx rising edge: T12 stored in CC6xSR */
281 IfxCcu6_T12ChannelMode_multiInputCaptureBothFalling = 13, /**< \brief CC6xIN falling edge: T12 stored in CC6xR, CCPOSx falling edge: T12 stored in CC6xSR */
282 IfxCcu6_T12ChannelMode_multiInputCaptureAny = 14 /**< \brief CC6xIN any active edge : T12 stored in CC6xR, CCPOSx any active edge: T12 stored in CC6xSR */
283 } IfxCcu6_T12ChannelMode;
284
285 /** \brief Counting direction of Timer12\n
286 * Definition in Ifx_CCU.TCTR0.B.CDIR
287 */
288 typedef enum
289 {
290 IfxCcu6_T12CountDirection_up = 0, /**< \brief Counting up */
291 IfxCcu6_T12CountDirection_down = 1 /**< \brief Counting down */
292 } IfxCcu6_T12CountDirection;
293
294 /** \brief Operating mode of Timer 12\n
295 * Definition in Ifx_CCU.TCTR0.B.CTM
296 */
297 typedef enum
298 {
299 IfxCcu6_T12CountMode_edgeAligned = 0, /**< \brief T12 always counts up and continues counting
300 * from zero after reaching the period value. */
301 IfxCcu6_T12CountMode_centerAligned = 1 /**< \brief T12 counts down after detecting a period-match
302 * and counts up after detecting a one-match. */
303 } IfxCcu6_T12CountMode;
304
305 /** \brief Delivers additional information to control the automatic set of bit T13R in the case that the trigger action defined by T13 trigger event control (T13TEC) is detected.\n
306 * Definition in Ifx_CCU.TCTR2.B.T13TED
307 */
308 typedef enum
309 {
310 IfxCcu6_T13TriggerDirection_noAction = 0, /**< \brief no action */
311 IfxCcu6_T13TriggerDirection_onT12CountingUp = 1, /**< \brief while T12 is counting up */
312 IfxCcu6_T13TriggerDirection_onT12CountingDown = 2, /**< \brief while T12 is counting down */
313 IfxCcu6_T13TriggerDirection_anyT12 = 3 /**< \brief independent on the count direction of T12 */
314 } IfxCcu6_T13TriggerDirection;
315
316 /** \brief Selects the trigger event to start T13 (automatic set of T13R for synchronization to T12 compare signals)\n
317 * Definition in Ifx_CCU.TCTR2.B.T13TEC
318 */
319 typedef enum
320 {
321 IfxCcu6_T13TriggerEvent_noAction = 0, /**< \brief no action */
322 IfxCcu6_T13TriggerEvent_onCC60RCompare = 1, /**< \brief set T13R on a T12 compare event on channel 0 */
323 IfxCcu6_T13TriggerEvent_onCC61RCompare = 2, /**< \brief set T13R on a T12 compare event on channel 1 */
324 IfxCcu6_T13TriggerEvent_onCC62RCompare = 3, /**< \brief set T13R on a T12 compare event on channel 2 */
325 IfxCcu6_T13TriggerEvent_onAnyT12Compare = 4, /**< \brief set T13R on any T12 compare event (ch. 0, 1, 2) */
326 IfxCcu6_T13TriggerEvent_onT12Period = 5, /**< \brief set T13R upon a period-match of T12 */
327 IfxCcu6_T13TriggerEvent_onT12Zero = 6, /**< \brief set T13R upon a zero-match of T12 (while
328 * counting up) */
329 IfxCcu6_T13TriggerEvent_onCCPOSxEdge = 7 /**< \brief set T13R on any edge of inputs CCPOSx */
330 } IfxCcu6_T13TriggerEvent;
331
332 /** \brief Timer number ( T12 / T13 )
333 */
334 typedef enum
335 {
336 IfxCcu6_TimerId_t12 = 0, /**< \brief Timer 12 */
337 IfxCcu6_TimerId_t13 = 1 /**< \brief Timer 13 */
338 } IfxCcu6_TimerId;
339
340 /** \brief Selects the input clock for timers (T12 or T13) that is derived from the peripheral clock according to the equation\n
341 * Definition in Ifx_CCU.TCTR0.B.T12CLK / Ifx_CCU.TCTR0.B.T13CLK
342 */
343 typedef enum
344 {
345 IfxCcu6_TimerInputClock_fcc6 = 0, /**< \brief fcc6 */
346 IfxCcu6_TimerInputClock_fcc6By2 = 1, /**< \brief fcc6 / 2 */
347 IfxCcu6_TimerInputClock_fcc6By4 = 2, /**< \brief fcc6 / 4 */
348 IfxCcu6_TimerInputClock_fcc6By8 = 3, /**< \brief fcc6 / 8 */
349 IfxCcu6_TimerInputClock_fcc6By16 = 4, /**< \brief fcc6 / 16 */
350 IfxCcu6_TimerInputClock_fcc6By32 = 5, /**< \brief fcc6 / 32 */
351 IfxCcu6_TimerInputClock_fcc6By64 = 6, /**< \brief fcc6 / 64 */
352 IfxCcu6_TimerInputClock_fcc6By128 = 7 /**< \brief fcc6 / 128 */
353 } IfxCcu6_TimerInputClock;
354
355 /** \brief Selection of actual input signal for the timer inputs
356 */
357 typedef enum
358 {
359 IfxCcu6_TimerInputSignal_a = 0, /**< \brief defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input. */
360 IfxCcu6_TimerInputSignal_b = 1, /**< \brief defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input. */
361 IfxCcu6_TimerInputSignal_c = 2, /**< \brief defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input. */
362 IfxCcu6_TimerInputSignal_d = 3, /**< \brief defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input. */
363 IfxCcu6_TimerInputSignal_e = 0, /**< \brief defines the input signal used as T1xHR input. */
364 IfxCcu6_TimerInputSignal_f = 1, /**< \brief defines the input signal used as T1xHR input. */
365 IfxCcu6_TimerInputSignal_g = 2, /**< \brief defines the input signal used as T1xHR input. */
366 IfxCcu6_TimerInputSignal_h = 3 /**< \brief defines the input signal used as T1xHR input. */
367 } IfxCcu6_TimerInputSignal;
368
369 /** \brief Timer (T12 / T13) run status\n
370 * Definition in Ifx_CCU.TCTR0.B.T12R and Ifx_CCU.TCTR0.B.T13R
371 */
372 typedef enum
373 {
374 IfxCcu6_TimerRunStatus_stopped = 0, /**< \brief Timer T1x is stopped. */
375 IfxCcu6_TimerRunStatus_running = 1 /**< \brief Timer T1x is running. */
376 } IfxCcu6_TimerRunStatus;
377
378 /** \brief Defines how the trap flag TRPF can be cleared after the trap input condition is no longer valid (either by CTRAP = 1 or by TRPPEN = 0)\n
379 * Definition in Ifx_CCU.TRPCTR.B.TRPM2
380 */
381 typedef enum
382 {
383 IfxCcu6_TrapMode_automatic = 0, /**< \brief Bit TRPF is cleared by HW */
384 IfxCcu6_TrapMode_manual = 1 /**< \brief Bit TRPF stays 0, It has to be cleared by SW by writing
385 * ISR.RTRPF = 1 */
386 } IfxCcu6_TrapMode;
387
388 /** \brief Defines the behavior of the selected outputs when leaving the trap state, after the trap condition has become inactive again\n
389 * Definition in Ifx_CCU.TRPCTR.B.TRPMx (x = 0, 1)
390 */
391 typedef enum
392 {
393 IfxCcu6_TrapState_t12Sync = 0, /**< \brief The trap state is left when a zero-match
394 * of T12 (while counting up) is detected */
395 IfxCcu6_TrapState_t13Sync = 1, /**< \brief The trap state is left when a zeromatch
396 * of T13 is detected */
397 IfxCcu6_TrapState_immediate = 3 /**< \brief The trap state is left immediately without any synchronization to T12 or T13 */
398 } IfxCcu6_TrapState;
399
400 /** \} */
401
402 /** \addtogroup IfxLld_Ccu6_Std_Operative
403 * \{ */
404
405 /******************************************************************************/
406 /*-------------------------Inline Function Prototypes-------------------------*/
407 /******************************************************************************/
408
409 /** \brief Clears the counters of the Timers (T12, T13 individually or together based on the selection)
410 * \param ccu6 Pointer to the base of CCU6 registers
411 * \param t12 Timer12 choice (enable / disable)
412 * \param t13 Timer13 choice (enable / disable)
413 * \return None
414 */
415 IFX_INLINE void IfxCcu6_clearCounter(Ifx_CCU6 *ccu6, boolean t12, boolean t13);
416
417 /** \brief Clears all the three dead-time counter channels to zero.
418 * \param ccu6 Pointer to the base of CCU6 registers
419 * \return None
420 */
421 IFX_INLINE void IfxCcu6_clearDeadTimeCounters(Ifx_CCU6 *ccu6);
422
423 /** \brief Clears the selected interrupt flag
424 * \param ccu6 Pointer to the base of CCU6 registers
425 * \param source Interrupt source selection
426 * \return None
427 */
428 IFX_INLINE void IfxCcu6_clearInterruptStatusFlag(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source);
429
430 /** \brief Clears the T12 One notification
431 * \param ccu6 Pointer to the base of CCU6 registers
432 * \return None
433 */
434 IFX_INLINE void IfxCcu6_clearT12OneNotification(Ifx_CCU6 *ccu6);
435
436 /** \brief Clears the T12 period notification
437 * \param ccu6 Pointer to the base of CCU6 registers
438 * \return None
439 */
440 IFX_INLINE void IfxCcu6_clearT12PeriodNotification(Ifx_CCU6 *ccu6);
441
442 /** \brief Clears the T13 compare notification
443 * \param ccu6 Pointer to the base of CCU6 registers
444 * \return None
445 */
446 IFX_INLINE void IfxCcu6_clearT13CompareNotification(Ifx_CCU6 *ccu6);
447
448 /** \brief Returns the Timer pointer
449 * \param ccu6 Pointer to the base of CCU6 registers
450 * \return Timer pointer
451 */
452 IFX_INLINE volatile uint32 *IfxCcu6_getT12TimerPointer(Ifx_CCU6 *ccu6);
453
454 /** \brief Returns the status of module enabled or disabled
455 * \param ccu6 Pointer to the base of CCU6 registers
456 * \return Status (TRUE / FALSE)
457 */
458 IFX_INLINE boolean IfxCcu6_isModuleEnabled(Ifx_CCU6 *ccu6);
459
460 /** \brief Returns the status of T12 one notification
461 * \param ccu6 Pointer to the base of CCU6 registers
462 * \return Status (TRUE / FALSE)
463 */
464 IFX_INLINE boolean IfxCcu6_isT12OneNotification(Ifx_CCU6 *ccu6);
465
466 /** \brief Returns the status of T12 period notification
467 * \param ccu6 Pointer to the base of CCU6 registers
468 * \return Status (TRUE / FALSE)
469 */
470 IFX_INLINE boolean IfxCcu6_isT12PeriodNotification(Ifx_CCU6 *ccu6);
471
472 /** \brief Returns the status of T13 compare notification
473 * \param ccu6 Pointer to the base of CCU6 registers
474 * \return Status (TRUE / FALSE)
475 */
476 IFX_INLINE boolean IfxCcu6_isT13CompareNotification(Ifx_CCU6 *ccu6);
477
478 /** \brief Sets the input event leading to a counting action of Timers (T12 / T13).
479 * \param ccu6 Pointer to the base of CCU6 registers
480 * \param timer Timer selection, ( Timer12 / Timer13 )
481 * \param mode Input event leading to a counting action of the timer (T12 / T13)
482 * \return None
483 */
484 IFX_INLINE void IfxCcu6_setCountingInputMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_CountingInputMode mode);
485
486 /** \brief Sets the current hall pattern for the multichannel mode (writes into shadow register)
487 * \param ccu6 Pointer to the base of CCU6 registers
488 * \param pattern Current hall pattern
489 * \return None
490 */
491 IFX_INLINE void IfxCcu6_setCurrentHallPattern(Ifx_CCU6 *ccu6, uint8 pattern);
492
493 /** \brief Sets the delay between switching from the passive state to the active state of the selected outputs (dead time)
494 * \param ccu6 Pointer to the base of CCU6 registers
495 * \param value Value of the dead time to be induced
496 * \return None
497 */
498 IFX_INLINE void IfxCcu6_setDeadTimeValue(Ifx_CCU6 *ccu6, uint8 value);
499
500 /** \brief Sets the expected hall pattern for the multichannel mode (writes into shadow register)
501 * \param ccu6 Pointer to the base of CCU6 registers
502 * \param pattern Expected hall pattern
503 * \return None
504 */
505 IFX_INLINE void IfxCcu6_setExpectedHallPattern(Ifx_CCU6 *ccu6, uint8 pattern);
506
507 /** \brief Sets the event of signal T1xHR that can set the run bit T1xR by HW
508 * \param ccu6 Pointer to the base of CCU6 registers
509 * \param timer Timer selection, ( Timer12 / Timer13 )
510 * \param mode External trigger mode
511 * \return None
512 */
513 IFX_INLINE void IfxCcu6_setExternalRunMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ExternalTriggerMode mode);
514
515 /** \brief Sets source for the sampling of the Hall input pattern and the comparison to the current and the expected Hall pattern bit fields
516 * \param ccu6 Pointer to the base of CCU6 registers
517 * \param mode Hall sensor input trigger event
518 * \return None
519 */
520 IFX_INLINE void IfxCcu6_setHallSensorTriggerMode(Ifx_CCU6 *ccu6, IfxCcu6_HallSensorTriggerMode mode);
521
522 /** \brief Sets the input clock for timers (T12 or T13)
523 * \param ccu6 Pointer to the base of CCU6 registers
524 * \param timer Timer selection, ( Timer12 / Timer13 )
525 * \param frequency Input clock for timers (T12 or T13)
526 * \return None
527 */
528 IFX_INLINE void IfxCcu6_setInputClockFrequency(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_TimerInputClock frequency);
529
530 /** \brief Sets the selected interrupt flag
531 * \param ccu6 Pointer to the base of CCU6 registers
532 * \param source Interrupt source selection
533 * \return None
534 */
535 IFX_INLINE void IfxCcu6_setInterruptStatusFlag(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source);
536
537 /** \brief Sets the output pattern for the multichannel mode (writes into shadow register)
538 * \param ccu6 Pointer to the base of CCU6 registers
539 * \param pattern Output pattern for the multichannel mode.
540 * \return None
541 */
542 IFX_INLINE void IfxCcu6_setMultiChannelPwmPattern(Ifx_CCU6 *ccu6, uint8 pattern);
543
544 /** \brief Sets the trigger request source (next multi-channel event) for the shadow transfer MCM_ST from MCMPS to MCMP
545 * \param ccu6 Pointer to the base of CCU6 registers
546 * \param mode Trigger request source (next multi-channel event) for the shadow transfer MCM_ST
547 * \return None
548 */
549 IFX_INLINE void IfxCcu6_setMultiChannelSwitchingMode(Ifx_CCU6 *ccu6, IfxCcu6_MultiChannelSwitchingSelect mode);
550
551 /** \brief Sets the synchronization mechanism of the shadow transfer event MCM_ST\n
552 * if it has been requested before (flag R set by an event selected by SWSEL) and if MCMEN = 1
553 * \param ccu6 Pointer to the base of CCU6 registers
554 * \param sync Synchronization mechanism of the shadow transfer event MCM_ST
555 * \return None
556 */
557 IFX_INLINE void IfxCcu6_setMultiChannelSwitchingSync(Ifx_CCU6 *ccu6, IfxCcu6_MultiChannelSwitchingSync sync);
558
559 /** \brief Sets the state of the corresponding compare channel, that is considered to be the passive state
560 * \param ccu6 Pointer to the base of CCU6 registers
561 * \param channelOut Capture compare output selection
562 * \param state FALSE: passive state when CC6xST == 0\n
563 * TRUE : passive state when CC6xST == 1
564 * \return None
565 */
566 IFX_INLINE void IfxCcu6_setOutputPassiveState(Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut, boolean state);
567
568 /** \brief Enables / Disables the single shot mode of Timers (T12, T13 individually or together based on the selection)
569 * \param ccu6 Pointer to the base of CCU6 registers
570 * \param t12 Timer12 choice (enable / disable)
571 * \param t13 Timer13 choice (enable / disable)
572 * \return None
573 */
574 IFX_INLINE void IfxCcu6_setSingleShotModeEnable(Ifx_CCU6 *ccu6, boolean t12, boolean t13);
575
576 /** \brief Sets the operating mode of the Timer12 capture/compare channels
577 * \param ccu6 Pointer to the base of CCU6 registers
578 * \param channel Timer12 Capture compare channel number
579 * \param mode The operating mode for the T12 channels
580 * \return None
581 */
582 IFX_INLINE void IfxCcu6_setT12ChannelMode(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, IfxCcu6_T12ChannelMode mode);
583
584 /**
585 * \param ccu6 Pointer to the base of CCU6 registers
586 * \param mode Operating mode of Timer 12
587 * \return None
588 */
589 IFX_INLINE void IfxCcu6_setT12CountMode(Ifx_CCU6 *ccu6, IfxCcu6_T12CountMode mode);
590
591 /** \brief Sets the 16-bit counter value of Timer12
592 * \param ccu6 Pointer to the base of CCU6 registers
593 * \param value Counter value
594 * \return None
595 */
596 IFX_INLINE void IfxCcu6_setT12CounterValue(Ifx_CCU6 *ccu6, uint16 value);
597
598 /** \brief Sets the period value that leads Timer12 counter value to a period-match
599 * \param ccu6 Pointer to the base of CCU6 registers
600 * \param value Period value
601 * \return None
602 */
603 IFX_INLINE void IfxCcu6_setT12PeriodValue(Ifx_CCU6 *ccu6, uint16 value);
604
605 /** \brief Sets the 16-bit compare value of Timer13 (writes into shadow register)
606 * \param ccu6 Pointer to the base of CCU6 registers
607 * \param value Compare value
608 * \return None
609 */
610 IFX_INLINE void IfxCcu6_setT13CompareValue(Ifx_CCU6 *ccu6, uint16 value);
611
612 /** \brief Sets the 16-bit counter value of Timer13
613 * \param ccu6 Pointer to the base of CCU6 registers
614 * \param value counter value
615 * \return None
616 */
617 IFX_INLINE void IfxCcu6_setT13CounterValue(Ifx_CCU6 *ccu6, uint16 value);
618
619 /** \brief Sets the period value that leads Timer13 counter value to a period-match
620 * \param ccu6 Pointer to the base of CCU6 registers
621 * \param value period value
622 * \return None
623 */
624 IFX_INLINE void IfxCcu6_setT13PeriodValue(Ifx_CCU6 *ccu6, uint16 value);
625
626 /** \brief Sets the Timer13 trigger event direction
627 * \param ccu6 Pointer to the base of CCU6 registers
628 * \param direction T13 trigger event direction
629 * \return None
630 */
631 IFX_INLINE void IfxCcu6_setT13TriggerEventDirection(Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerDirection direction);
632
633 /** \brief Sets the trigger event to start Timer13 (automatic set of T13R for synchronization to Timer12 compare signals)
634 * \param ccu6 Pointer to the base of CCU6 registers
635 * \param mode The trigger event to start T13
636 * \return None
637 */
638 IFX_INLINE void IfxCcu6_setT13TriggerEventMode(Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerEvent mode);
639
640 /** \brief Sets the mode of clearing the trap flag TRPF after the trap input condition is no longer valid
641 * \param ccu6 Pointer to the base of CCU6 registers
642 * \param mode Trap mode selection
643 * \return None
644 */
645 IFX_INLINE void IfxCcu6_setTrapMode(Ifx_CCU6 *ccu6, IfxCcu6_TrapMode mode);
646
647 /** \brief Sets behaviour of the selected outputs when leaving the trap state after the trap condition has become inactive again.
648 * \param ccu6 Pointer to the base of CCU6 registers
649 * \param state Trap state selection
650 * \return None
651 */
652 IFX_INLINE void IfxCcu6_setTrapState(Ifx_CCU6 *ccu6, IfxCcu6_TrapState state);
653
654 /** \brief starts the timers (T12, T13 individually or together based on the selection)
655 * \param ccu6 Pointer to the base of CCU6 registers
656 * \param t12 Timer12 start choice (enable / disable)
657 * \param t13 Timer13 start choice (enable / disable)
658 * \return None
659 */
660 IFX_INLINE void IfxCcu6_startTimer(Ifx_CCU6 *ccu6, boolean t12, boolean t13);
661
662 /** \brief starts the timers (T12, T13 individually or together based on the selection)
663 * \param ccu6 Pointer to the base of CCU6 registers
664 * \param t12 Timer12 stop choice (enable / disable)
665 * \param t13 Timer13 stop choice (enable / disable)
666 * \return None
667 */
668 IFX_INLINE void IfxCcu6_stopTimer(Ifx_CCU6 *ccu6, boolean t12, boolean t13);
669
670 /** \brief Updates the hall pattern (current hall, expected hall, moduleation output), in a single write
671 * \param ccu6 Pointer to the base of CCU6 registers
672 * \param currentHall Current hall pattern
673 * \param expectedHall Expected hall pattern
674 * \param output Output pattern for the multichannel mode.
675 * \return None
676 */
677 IFX_INLINE void IfxCcu6_updateHallPattern(Ifx_CCU6 *ccu6, uint8 currentHall, uint8 expectedHall, uint8 output);
678
679 /******************************************************************************/
680 /*-------------------------Global Function Prototypes-------------------------*/
681 /******************************************************************************/
682
683 /**
684 * \param ccu6 Specifies Ccu6 module
685 * \param outputLine Output Line
686 * \param selectedTrigger Trigger selection
687 * \return None
688 */
689 IFX_EXTERN void IfxCcu6_connectTrigger(Ifx_CCU6 *ccu6, IfxCcu6_TrigOut outputLine, IfxCcu6_TrigSel selectedTrigger);
690
691 /** \brief Routes the interrupt node pointer to the selected service requests
692 * \param ccu6 Pointer to the base of CCU6 registers
693 * \param source Interrupt source selection
694 * \param serviceRequest Selection of service request outputs
695 * \return None
696 */
697 IFX_EXTERN void IfxCcu6_routeInterruptNode(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source, IfxCcu6_ServiceRequest serviceRequest);
698
699 /** \brief Sets the passive state level of the PWM outputs of the module
700 * \param ccu6 Pointer to the base of CCU6 registers
701 * \param channelOut Capture compare output selection
702 * \param state FALSE: The passive level is 0.
703 * TRUE : The passive level is 1.
704 * \return None
705 */
706 IFX_EXTERN void IfxCcu6_setOutputPassiveLevel(Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut, boolean state);
707
708 /** \brief Sets software-control (independent set and clear conditions) for the Timer12 channel state bits CC6xST (x=0,1,2)
709 * \param ccu6 Pointer to the base of CCU6 registers
710 * \param channel Timer12 Capture compare channel number
711 * \param state capture/compare state selection (set / clear / toggle)
712 * \return None
713 */
714 IFX_EXTERN void IfxCcu6_setT12CaptureCompareState(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, IfxCcu6_CaptureCompareState state);
715
716 /** \brief Sets the 16-bit compare value of Timer12 (writes into shadow registers)
717 * \param ccu6 Pointer to the base of CCU6 registers
718 * \param channel Timer12 Capture compare channel number
719 * \param value Compare value
720 * \return None
721 */
722 IFX_EXTERN void IfxCcu6_setT12CompareValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, uint16 value);
723
724 /** \brief Sets the frequency and clock input of the Timer 12.
725 * Caution: If desired frequency cannot achieved (by successive divisions by 2) :
726 * Then the nearest frequency value is set ( >= desired value)
727 * The resulting frequency is captured in the handler element : CaptureFrequency.
728 * \param ccu6 Pointer to the base of CCU6 registers
729 * \param frequency Requested timer frequency in Hz
730 * \param period period value to be configured
731 * \param countMode Counting mode of Timer12
732 * \return Zero, if the function failed to fulfill requested frequency and resolution\n
733 * Positive, if the function can find settings close to the requested frequency and resolution above the requested
734 */
735 IFX_EXTERN float32 IfxCcu6_setT12Frequency(Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period, IfxCcu6_T12CountMode countMode);
736
737 /** \brief selects the actual input signal for the timer inputs.
738 * \param ccu6 Pointer to the base of CCU6 registers
739 * \param extInput External input signal for the Timer 12
740 * \return None
741 */
742 IFX_EXTERN void IfxCcu6_setT12InputSignal(Ifx_CCU6 *ccu6, IfxCcu6_T12hr_In *extInput);
743
744 /** \brief Sets software-control (independent set and clear conditions) for the Timer13 channel state bits CC63ST
745 * \param ccu6 Pointer to the base of CCU6 registers
746 * \param state capture/compare state selection (set / clear / toggle)
747 * \return None
748 */
749 IFX_EXTERN void IfxCcu6_setT13CaptureCompareState(Ifx_CCU6 *ccu6, IfxCcu6_CaptureCompareState state);
750
751 /** \brief Sets the frequency and clock input of the Timer 13
752 * Caution: If desired frequency cannot achieved (by successive divisions by 2) :
753 * Then the nearest frequency value is set ( >= desired value)
754 * The resulting frequency is captured in the handler element : captureFrequency.
755 * \param ccu6 Pointer to the base of CCU6 registers
756 * \param frequency Requested timer frequency in Hz
757 * \param period period value to be configured
758 * \return Zero, if the function failed to fulfill requested frequency and resolution\n
759 * Positive, if the function can find settings close to the requested frequency and resolution above the requested
760 */
761 IFX_EXTERN float32 IfxCcu6_setT13Frequency(Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period);
762
763 /** \brief selects the actual input signal for the timer inputs.
764 * \param ccu6 Pointer to the base of CCU6 registers
765 * \param extInput External input signal for the Timer 13
766 * \return None
767 */
768 IFX_EXTERN void IfxCcu6_setT13InputSignal(Ifx_CCU6 *ccu6, IfxCcu6_T13hr_In *extInput);
769
770 /** \} */
771
772 /** \addtogroup IfxLld_Ccu6_Std_Utility
773 * \{ */
774
775 /******************************************************************************/
776 /*-------------------------Inline Function Prototypes-------------------------*/
777 /******************************************************************************/
778
779 /** \brief Indicate the status of the dead time generation for each compare channel (0, 1, 2) of timer T12
780 * \param ccu6 Pointer to the base of CCU6 registers
781 * \param channel Timer12 Capture compare channel number
782 * \return Status TRUE or FALSE
783 */
784 IFX_INLINE boolean IfxCcu6_getDeadTimeStatus(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel);
785
786 /** \brief Returns the value of the input Hall pattern of the Timer12 capture/compare channels CC6POS6x (x = 0, 1, 2)\n
787 * that has been compared to the current and expected value
788 * \param ccu6 Pointer to the base of CCU6 registers
789 * \param channel Timer12 Capture compare channel number
790 * \return Status\n
791 * TRUE : The input CCPOSx has been sampled as 0\n
792 * FALSE : The input CCPOSx has been sampled as 1
793 */
794 IFX_INLINE boolean IfxCcu6_getHallPatternSampleState(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel);
795
796 /** \brief Gets the status of the selected interrupt flag
797 * \param ccu6 Pointer to the base of CCU6 registers
798 * \param source Interrupt source selection
799 * \return Status (TRUE / FALSE)
800 */
801 IFX_INLINE boolean IfxCcu6_getInterruptStatusFlag(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source);
802
803 /** \brief indicates if the multi-channel mode functionality is available
804 * \param ccu6 Pointer to the base of CCU6 registers
805 * \return Status (TRUE / FALSE)
806 */
807 IFX_INLINE boolean IfxCcu6_getMultiChannelModeAvailabilityStatus(Ifx_CCU6 *ccu6);
808
809 /** \brief Gets the status of the shadow transfer request from MCMPS to MCMP
810 * \param ccu6 Pointer to the base of CCU6 registers
811 * \return Status\n
812 * FALSE: A shadow transfer MCM_ST is not requested\n
813 * TRUE: A shadow transfer MCM_ST is requested, but has not yet been executed
814 */
815 IFX_INLINE boolean IfxCcu6_getMultiChannelPWMPatternShadowTransferStatus(Ifx_CCU6 *ccu6);
816
817 /** \brief Returns the Timer (T12 / T13) shadow transfer enable status
818 * \param ccu6 Pointer to the base of CCU6 registers
819 * \param timer Timer selection, ( Timer12 / Timer13 )
820 * \return Status (TRUE: enable / FALSE: disable)
821 */
822 IFX_INLINE boolean IfxCcu6_getShadowTransferStatus(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer);
823
824 /** \brief Returns the state of the Timer12 capture/compare channels CC6xST (x = 0, 1, 2)
825 * \param ccu6 Pointer to the base of CCU6 registers
826 * \param channel Timer12 Capture compare channel number
827 * \return Status TRUE or FALSE
828 */
829 IFX_INLINE boolean IfxCcu6_getT12CaptureCompareState(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel);
830
831 /** \brief Returns the current counting direction of Timer12
832 * \param ccu6 Pointer to the base of CCU6 registers
833 * \return direction (up / down)
834 */
835 IFX_INLINE IfxCcu6_T12CountDirection IfxCcu6_getT12CountDirection(Ifx_CCU6 *ccu6);
836
837 /** \brief Returns the state of the Timer13 capture/compare channel CC63ST
838 * \param ccu6 Pointer to the base of CCU6 registers
839 * \return Status TRUE or FALSE
840 */
841 IFX_INLINE boolean IfxCcu6_getT13CaptureCompareState(Ifx_CCU6 *ccu6);
842
843 /** \brief indicates the Timer blocks (T12 / T13) availability
844 * \param ccu6 Pointer to the base of CCU6 registers
845 * \param timer Timer selection, ( Timer12 / Timer13 )
846 * \return Status (TRUE / FALSE)
847 */
848 IFX_INLINE boolean IfxCcu6_getTimerAvailabilityStatus(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer);
849
850 /** \brief Returns the Timer (T12 / T13) run status
851 * \param ccu6 Pointer to the base of CCU6 registers
852 * \param timer Timer selection, ( Timer12 / Timer13 )
853 * \return Status (stopped / running)
854 */
855 IFX_INLINE IfxCcu6_TimerRunStatus IfxCcu6_getTimerRunStatus(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer);
856
857 /** \brief Returns the module's suspend state.
858 * TRUE :if module is suspended.
859 * FALSE:if module is not yet suspended.
860 * \param ccu6 Pointer to CCU6 module registers
861 * \return Suspend status (TRUE / FALSE)
862 */
863 IFX_INLINE boolean IfxCcu6_isModuleSuspended(Ifx_CCU6 *ccu6);
864
865 /** \brief Configure the Module to Hard/Soft suspend mode.
866 * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
867 * \param ccu6 Pointer to CCU6 module registers
868 * \param mode Module suspend mode
869 * \return None
870 */
871 IFX_INLINE void IfxCcu6_setSuspendMode(Ifx_CCU6 *ccu6, IfxCcu6_SuspendMode mode);
872
873 /******************************************************************************/
874 /*-------------------------Global Function Prototypes-------------------------*/
875 /******************************************************************************/
876
877 /** \brief Returns the module index of the selected CCU6 module
878 * \param ccu6 Pointer to CCU6 module registers
879 * \return CCU6 module register address
880 */
881 IFX_EXTERN Ifx_CCU6 *IfxCcu6_getAddress(IfxCcu6_Index ccu6);
882
883 /** \brief Returns the capture register value of the selected channel
884 * \param ccu6 Pointer to the base of CCU6 registers
885 * \param channel Timer12 Capture compare channel number
886 * \return current value of the capture register of a selected channel
887 */
888 IFX_EXTERN uint32 IfxCcu6_getCaptureRegisterValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel);
889
890 /** \brief Returns the capture shadow register value of the selected channel
891 * \param ccu6 Pointer to the base of CCU6 registers
892 * \param channel Timer12 Capture compare channel number
893 * \return current value of the capture shadow register of a selected channel
894 */
895 IFX_EXTERN uint32 IfxCcu6_getCaptureShadowRegisterValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel);
896
897 /** \brief Returns CCU6 index
898 * \param ccu6 Specifies the pointer to the base of CCU6 registers
899 * \return Returns index. returns -1 in case of unknown index
900 */
901 IFX_EXTERN IfxCcu6_Index IfxCcu6_getIndex(Ifx_CCU6 *ccu6);
902
903 /** \brief Returns the service request register
904 * \param ccu6 Specifies Ccu6 module
905 * \param serviceRequest Selection of service request outputs
906 * \return The service request register
907 */
908 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxCcu6_getSrcAddress(Ifx_CCU6 *ccu6, IfxCcu6_ServiceRequest serviceRequest);
909
910 /** \brief Returns the current value of the timer register
911 * \param ccu6 Pointer to the base of CCU6 registers
912 * \param timer Timer selection, ( Timer12 / Timer13 )
913 * \return current value of the timer register
914 */
915 IFX_EXTERN uint32 IfxCcu6_readTimer(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer);
916
917 /** \} */
918
919 /** \addtogroup IfxLld_Ccu6_Std_Configuration
920 * \{ */
921
922 /******************************************************************************/
923 /*-------------------------Inline Function Prototypes-------------------------*/
924 /******************************************************************************/
925
926 /** \brief Clears all Interrupt flags
927 * \param ccu6 Pointer to the base of CCU6 registers
928 * \return None
929 */
930 IFX_INLINE void IfxCcu6_clearAllInterruptStatusFlags(Ifx_CCU6 *ccu6);
931
932 /** \brief Disables the additional prescaler of 1/256 can be enabled for the prescaler of T12 or T13 to support higher clock frequencies
933 * \param ccu6 Pointer to the base of CCU6 registers
934 * \param timer Timer selection, ( Timer12 / Timer13 )
935 * \return None
936 */
937 IFX_INLINE void IfxCcu6_disableAdditionalPrescaler(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer);
938
939 /** \brief Disables the dead time generation for each compare channel (0, 1, 2) of Timer12
940 * \param ccu6 Pointer to the base of CCU6 registers
941 * \param channel Timer12 Capture compare channel number
942 * \return None
943 */
944 IFX_INLINE void IfxCcu6_disableDeadTime(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel);
945
946 /** \brief Disables the delay of the source signal for the sampling of the Hall input pattern (selected by HSYNC)
947 * \param ccu6 Pointer to the base of CCU6 registers
948 * \return None
949 */
950 IFX_INLINE void IfxCcu6_disableDelayBypass(Ifx_CCU6 *ccu6);
951
952 /** \brief Disables the selected interrupt
953 * \param ccu6 Pointer to the base of CCU6 registers
954 * \param source Interrupt source selection
955 * \return None
956 */
957 IFX_INLINE void IfxCcu6_disableInterrupt(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source);
958
959 /** \brief Sets multi channel mode unavailable, A write access to MCMOUTS is ignored
960 * \param ccu6 Pointer to the base of CCU6 registers
961 * \return None
962 */
963 IFX_INLINE void IfxCcu6_disableMultiChannelMode(Ifx_CCU6 *ccu6);
964
965 /** \brief Disables shadow transfers of the timers (T12, T13 individually or together based on the selection)
966 * \param ccu6 Pointer to the base of CCU6 registers
967 * \param t12 Timer12 choice (enable / disable)
968 * \param t13 Timer13 choice (enable / disable)
969 * \return None
970 */
971 IFX_INLINE void IfxCcu6_disableShadowTransfer(Ifx_CCU6 *ccu6, boolean t12, boolean t13);
972
973 /** \brief Disables the single shot-mode of Timers (T12 T13).
974 * \param ccu6 Pointer to the base of CCU6 registers
975 * \param timer Timer selection, ( Timer12 / Timer13 )
976 * \return None
977 */
978 IFX_INLINE void IfxCcu6_disableSingleShotMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer);
979
980 /** \brief Disables the Inversion of T13 signal for the modulation of the CC6x and COUT6x (x = 0, 1, 2) signals\n
981 * T13 output CC63_O is equal to CC63ST
982 * \param ccu6 Pointer to the base of CCU6 registers
983 * \return None
984 */
985 IFX_INLINE void IfxCcu6_disableT13InvertedModulation(Ifx_CCU6 *ccu6);
986
987 /** \brief Sets Timer12 block unavailable, A write access to T12PR is ignored
988 * \param ccu6 Pointer to the base of CCU6 registers
989 * \param timer Timer selection, ( Timer12 / Timer13 )
990 * \return None
991 */
992 IFX_INLINE void IfxCcu6_disableTimer(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer);
993
994 /** \brief Disables the trap functionality for the corresponding output signals
995 * \param ccu6 Pointer to the base of CCU6 registers
996 * \param channelOut Capture compare output selection
997 * \return None
998 */
999 IFX_INLINE void IfxCcu6_disableTrap(Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut);
1000
1001 /** \brief Disables the input (pin) function for the trap generation
1002 * \param ccu6 Pointer to the base of CCU6 registers
1003 * \return None
1004 */
1005 IFX_INLINE void IfxCcu6_disableTrapPin(Ifx_CCU6 *ccu6);
1006
1007 /** \brief Enables the additional prescaler of 1/256 can be enabled for the prescaler of T12 or T13 to support higher clock frequencies
1008 * \param ccu6 Pointer to the base of CCU6 registers
1009 * \param timer Timer selection, ( Timer12 / Timer13 )
1010 * \return None
1011 */
1012 IFX_INLINE void IfxCcu6_enableAdditionalPrescaler(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer);
1013
1014 /** \brief Sets the single shot-mode of Timers (T12, T13).
1015 * \param ccu6 Pointer to the base of CCU6 registers
1016 * \param t12 Timer12 choice (enable / disable)
1017 * \param t13 Timer13 choice (enable / disable)
1018 * \return None
1019 */
1020 IFX_INLINE void IfxCcu6_enableCountEvent(Ifx_CCU6 *ccu6, boolean t12, boolean t13);
1021
1022 /** \brief Enables the dead time generation for each compare channel (0, 1, 2) of Timer12
1023 * \param ccu6 Pointer to the base of CCU6 registers
1024 * \param channel Timer12 Capture compare channel number
1025 * \return None
1026 */
1027 IFX_INLINE void IfxCcu6_enableDeadTime(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel);
1028
1029 /** \brief Enables the delay of the source signal for the sampling of the Hall input pattern (selected by HSYNC) by the Dead-Time Counter 0
1030 * \param ccu6 Pointer to the base of CCU6 registers
1031 * \return None
1032 */
1033 IFX_INLINE void IfxCcu6_enableDelayBypass(Ifx_CCU6 *ccu6);
1034
1035 /** \brief Sets HP_ST immediately to update bit fields EXPH and CURH by EXPHS and CURHS
1036 * \param ccu6 Pointer to the base of CCU6 registers
1037 * \return None
1038 */
1039 IFX_INLINE void IfxCcu6_enableHallPatternShadowTransfer(Ifx_CCU6 *ccu6);
1040
1041 /** \brief Enables the selected interrupt
1042 * \param ccu6 Pointer to the base of CCU6 registers
1043 * \param source Interrupt source selection
1044 * \return None
1045 */
1046 IFX_INLINE void IfxCcu6_enableInterrupt(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source);
1047
1048 /** \brief Sets multi channel mode available, A write access to MCMOUTS is executed
1049 * \param ccu6 Pointer to the base of CCU6 registers
1050 * \return None
1051 */
1052 IFX_INLINE void IfxCcu6_enableMultiChannelMode(Ifx_CCU6 *ccu6);
1053
1054 /** \brief Enables the Multi Channel Mode Availability
1055 * \param ccu6 Pointer to the base of CCU6 registers
1056 * \return None
1057 */
1058 IFX_INLINE void IfxCcu6_enableMultiChannelModeAvailability(Ifx_CCU6 *ccu6);
1059
1060 /** \brief Sets MCM_ST immediately to update bit field MCMP by the value of MCMPS.
1061 * \param ccu6 Pointer to the base of CCU6 registers
1062 * \return None
1063 */
1064 IFX_INLINE void IfxCcu6_enableMultiChannelPwmPatternShadowTransfer(Ifx_CCU6 *ccu6);
1065
1066 /** \brief Enables the shadow transfer T12_ST if flag MCMOUT.R is set or\n
1067 * becomes set while a T12 one match is detected while counting down
1068 * \param ccu6 Pointer to the base of CCU6 registers
1069 * \return None
1070 */
1071 IFX_INLINE void IfxCcu6_enableMultiChannelT12DowncountingShadowTransfer(Ifx_CCU6 *ccu6);
1072
1073 /** \brief Enables the shadow transfer T12_ST if flag MCMOUT.R is set or\n
1074 * becomes set while a T12 period match is detected while counting up
1075 * \param ccu6 Pointer to the base of CCU6 registers
1076 * \return None
1077 */
1078 IFX_INLINE void IfxCcu6_enableMultiChannelT12UpcountingShadowTransfer(Ifx_CCU6 *ccu6);
1079
1080 /** \brief Enables the shadow transfer T13_ST if flag MCMOUT.R is set or\n
1081 * becomes set while a T13 period match is detected
1082 * \param ccu6 Pointer to the base of CCU6 registers
1083 * \return None
1084 */
1085 IFX_INLINE void IfxCcu6_enableMultiChannelT13UpcountingShadowTransfer(Ifx_CCU6 *ccu6);
1086
1087 /** \brief Enables shadow transfers of the timers (T12, T13 individually or together based on the selection)
1088 * \param ccu6 Pointer to the base of CCU6 registers
1089 * \param t12 Timer12 choice (enable / disable)
1090 * \param t13 Timer13 choice (enable / disable)
1091 * \return None
1092 */
1093 IFX_INLINE void IfxCcu6_enableShadowTransfer(Ifx_CCU6 *ccu6, boolean t12, boolean t13);
1094
1095 /** \brief Enables the single shot-mode of Timers (T12 T13).
1096 * \param ccu6 Pointer to the base of CCU6 registers
1097 * \param timer Timer selection, ( Timer12 / Timer13 )
1098 * \return None
1099 */
1100 IFX_INLINE void IfxCcu6_enableSingleShotMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer);
1101
1102 /** \brief Enables the Inversion of T13 signal for the modulation of the CC6x and COUT6x (x = 0, 1, 2) signals\n
1103 * T13 output CC63_O is equal to CC63ST.
1104 * \param ccu6 Pointer to the base of CCU6 registers
1105 * \return None
1106 */
1107 IFX_INLINE void IfxCcu6_enableT13InvertedModulation(Ifx_CCU6 *ccu6);
1108
1109 /** \brief Sets Timer12 block available, A write access to T12PR is executed
1110 * \param ccu6 Pointer to the base of CCU6 registers
1111 * \param timer Timer selection, ( Timer12 / Timer13 )
1112 * \return None
1113 */
1114 IFX_INLINE void IfxCcu6_enableTimer(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer);
1115
1116 /** \brief Enables the trap functionality for the corresponding output signals
1117 * \param ccu6 Pointer to the base of CCU6 registers
1118 * \param channelOut Capture compare output selection
1119 * \return None
1120 */
1121 IFX_INLINE void IfxCcu6_enableTrap(Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut);
1122
1123 /** \brief Enables the input (pin) function for the trap generation
1124 * \param ccu6 Pointer to the base of CCU6 registers
1125 * \return None
1126 */
1127 IFX_INLINE void IfxCcu6_enableTrapPin(Ifx_CCU6 *ccu6);
1128
1129 /** \brief selects the actual input signal for the capture compare inputs.
1130 * \param ccu6 Pointer to the base of CCU6 registers
1131 * \param input Input selection, ( CC6x capture input / CTRAP input / CCPOSx input )
1132 * \param signal selection of actual input signal for the module inputs
1133 * \return None
1134 */
1135 IFX_INLINE void IfxCcu6_setCaptureCompareInputSignal(Ifx_CCU6 *ccu6, IfxCcu6_CaptureCompareInput input, IfxCcu6_CaptureCompareInputSignal signal);
1136
1137 /******************************************************************************/
1138 /*-------------------------Global Function Prototypes-------------------------*/
1139 /******************************************************************************/
1140
1141 /** \brief Disables the modulation of the corresponding output signal by PWM pattern generated by the timers T12 and T13.
1142 * \param ccu6 Pointer to the base of CCU6 registers
1143 * \param timer Timer selection, ( Timer12 / Timer13 )
1144 * \param channelOut Capture compare output selection
1145 * \return None
1146 */
1147 IFX_EXTERN void IfxCcu6_disableModulationOutput(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut);
1148
1149 /** \brief Disables the selected CCU6 kernel
1150 * \param ccu6 Pointer to the base of CCU6 registers
1151 * \return None
1152 */
1153 IFX_EXTERN void IfxCcu6_disableModule(Ifx_CCU6 *ccu6);
1154
1155 /** \brief Enables the modulation of the corresponding output signal by PWM pattern generated by the timers T12 and T13.
1156 * \param ccu6 Pointer to the base of CCU6 registers
1157 * \param timer Timer selection, ( Timer12 / Timer13 )
1158 * \param channelOut Capture compare output selection
1159 * \return None
1160 */
1161 IFX_EXTERN void IfxCcu6_enableModulationOutput(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut);
1162
1163 /** \brief Enables the selected CCU6 kernel
1164 * \param ccu6 Pointer to the base of CCU6 registers
1165 * \return None
1166 */
1167 IFX_EXTERN void IfxCcu6_enableModule(Ifx_CCU6 *ccu6);
1168
1169 /** \} */
1170
1171 /** \addtogroup IfxLld_Ccu6_Std_IO
1172 * \{ */
1173
1174 /******************************************************************************/
1175 /*-------------------------Inline Function Prototypes-------------------------*/
1176 /******************************************************************************/
1177
1178 /** \brief Initialises a CC60 input pin
1179 * \param cc60In CC60 capture input CC60IN
1180 * \param inputMode The pin input mode which should be configured
1181 * \return None
1182 */
1183 IFX_INLINE void IfxCcu6_initCc60InPin(const IfxCcu6_Cc60in_In *cc60In, IfxPort_InputMode inputMode);
1184
1185 /** \brief Initialises a CC60 output pin
1186 * \param cc60Out CC60 compare output CC0
1187 * \param outputMode The pin output mode which should be configured
1188 * \param padDriver The pad driver mode which should be configured
1189 * \return None
1190 */
1191 IFX_INLINE void IfxCcu6_initCc60OutPin(const IfxCcu6_Cc60_Out *cc60Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
1192
1193 /** \brief Initialises a CC61 input pin
1194 * \param cc61In CC61 capture input CC61IN
1195 * \param inputMode The pin input mode which should be configured
1196 * \return None
1197 */
1198 IFX_INLINE void IfxCcu6_initCc61InPin(const IfxCcu6_Cc61in_In *cc61In, IfxPort_InputMode inputMode);
1199
1200 /** \brief Initialises a CC61 output pin
1201 * \param cc61Out CC61 compare output CC1
1202 * \param outputMode The pin output mode which should be configured
1203 * \param padDriver The pad driver mode which should be configured
1204 * \return None
1205 */
1206 IFX_INLINE void IfxCcu6_initCc61OutPin(const IfxCcu6_Cc61_Out *cc61Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
1207
1208 /** \brief Initialises a CC62 input pin
1209 * \param cc62In CC62 capture input CC62IN
1210 * \param inputMode The pin input mode which should be configured
1211 * \return None
1212 */
1213 IFX_INLINE void IfxCcu6_initCc62InPin(const IfxCcu6_Cc62in_In *cc62In, IfxPort_InputMode inputMode);
1214
1215 /** \brief Initialises a CC62 output pin
1216 * \param cc62Out CC62 compare output CC2
1217 * \param outputMode The pin output mode which should be configured
1218 * \param padDriver The pad driver mode which should be configured
1219 * \return None
1220 */
1221 IFX_INLINE void IfxCcu6_initCc62OutPin(const IfxCcu6_Cc62_Out *cc62Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
1222
1223 /** \brief Initialises a CCPOS0 input pin
1224 * \param ccpos0 CC60 capture input CCPOS0
1225 * \param inputMode The pin input mode which should be configured
1226 * \return None
1227 */
1228 IFX_INLINE void IfxCcu6_initCcpos0Pin(const IfxCcu6_Ccpos0_In *ccpos0, IfxPort_InputMode inputMode);
1229
1230 /** \brief Initialises a CCPOS1 input pin
1231 * \param ccpos1 CC61 capture input CCPOS1
1232 * \param inputMode The pin input mode which should be configured
1233 * \return None
1234 */
1235 IFX_INLINE void IfxCcu6_initCcpos1Pin(const IfxCcu6_Ccpos1_In *ccpos1, IfxPort_InputMode inputMode);
1236
1237 /** \brief Initialises a CCPOS0 input pin
1238 * \param ccpos2 CC62 capture input CCPOS2
1239 * \param inputMode The pin input mode which should be configured
1240 * \return None
1241 */
1242 IFX_INLINE void IfxCcu6_initCcpos2Pin(const IfxCcu6_Ccpos2_In *ccpos2, IfxPort_InputMode inputMode);
1243
1244 /** \brief Initialises a COUT60 output pin
1245 * \param cout60 CC60 compare output COUT0
1246 * \param outputMode The pin output mode which should be configured
1247 * \param padDriver The pad driver mode which should be configured
1248 * \return None
1249 */
1250 IFX_INLINE void IfxCcu6_initCout60Pin(const IfxCcu6_Cout60_Out *cout60, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
1251
1252 /** \brief Initialises a COUT61 output pin
1253 * \param cout61 CC61 compare output COUT1
1254 * \param outputMode The pin output mode which should be configured
1255 * \param padDriver The pad driver mode which should be configured
1256 * \return None
1257 */
1258 IFX_INLINE void IfxCcu6_initCout61Pin(const IfxCcu6_Cout61_Out *cout61, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
1259
1260 /** \brief Initialises a COUT62 output pin
1261 * \param cout62 CC62 compare output COUT2
1262 * \param outputMode The pin output mode which should be configured
1263 * \param padDriver The pad driver mode which should be configured
1264 * \return None
1265 */
1266 IFX_INLINE void IfxCcu6_initCout62Pin(const IfxCcu6_Cout62_Out *cout62, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
1267
1268 /** \brief Initialises a COUT63 output pin
1269 * \param cout63 CC63 compare output COUT3
1270 * \param outputMode The pin output mode which should be configured
1271 * \param padDriver The pad driver mode which should be configured
1272 * \return None
1273 */
1274 IFX_INLINE void IfxCcu6_initCout63Pin(const IfxCcu6_Cout63_Out *cout63, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
1275
1276 /** \brief Initialises a CTRAP input pin
1277 * \param ctrap CTRAP input
1278 * \param inputMode The pin input mode which should be configured
1279 * \return None
1280 */
1281 IFX_INLINE void IfxCcu6_initCtrapPin(const IfxCcu6_Ctrap_In *ctrap, IfxPort_InputMode inputMode);
1282
1283 /** \brief Initialises a T12HR input pin
1284 * \param t12hrIn Timer 12 HR input T12HR
1285 * \param inputMode The pin input mode which should be configured
1286 * \return None
1287 */
1288 IFX_INLINE void IfxCcu6_initT12hrPin(const IfxCcu6_T12hr_In *t12hrIn, IfxPort_InputMode inputMode);
1289
1290 /** \brief Initialises a T13HR input pin
1291 * \param t13hrIn Timer 12 HR input T12HR
1292 * \param inputMode The pin input mode which should be configured
1293 * \return None
1294 */
1295 IFX_INLINE void IfxCcu6_initT13hrPin(const IfxCcu6_T13hr_In *t13hrIn, IfxPort_InputMode inputMode);
1296
1297 /** \} */
1298
1299 /******************************************************************************/
1300 /*-------------------------Inline Function Prototypes-------------------------*/
1301 /******************************************************************************/
1302
1303 /** \brief Provides functionality for both setting of CC60 pin direction as input and configuring pad driver
1304 * \param cc60In CC60 capture input CC60IN
1305 * \param inputMode The pin input mode which should be configured
1306 * \param padDriver Pad Driver
1307 * \return None
1308 */
1309 IFX_INLINE void IfxCcu6_initCc60InPinWithPadLevel(const IfxCcu6_Cc60in_In *cc60In, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
1310
1311 /** \brief Provides functionality for both setting of CC61 pin direction as input and configuring pad driver
1312 * \param cc61In CC61 capture input CC61IN
1313 * \param inputMode The pin input mode which should be configured
1314 * \param padDriver Pad Driver
1315 * \return None
1316 */
1317 IFX_INLINE void IfxCcu6_initCc61InPinWithPadLevel(const IfxCcu6_Cc61in_In *cc61In, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
1318
1319 /** \brief Provides functionality for both setting of CC62 pin direction as input and configuring pad driver
1320 * \param cc62In CC62 capture input CC62IN
1321 * \param inputMode The pin input mode which should be configured
1322 * \param padDriver Pad Driver
1323 * \return None
1324 */
1325 IFX_INLINE void IfxCcu6_initCc62InPinWithPadLevel(const IfxCcu6_Cc62in_In *cc62In, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
1326
1327 /** \brief Provides functionality for both setting of CCPOS0 pin direction as input and configuring pad driver
1328 * \param ccpos0 CC60 capture input CCPOS0
1329 * \param inputMode The pin input mode which should be configured
1330 * \param padDriver Pad Driver
1331 * \return None
1332 */
1333 IFX_INLINE void IfxCcu6_initCcpos0PinWithPadLevel(const IfxCcu6_Ccpos0_In *ccpos0, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
1334
1335 /** \brief Provides functionality for both setting of CCPOS1 pin direction as input and configuring pad driver
1336 * \param ccpos1 CC61 capture input CCPOS1
1337 * \param inputMode The pin input mode which should be configured
1338 * \param padDriver Pad Driver
1339 * \return None
1340 */
1341 IFX_INLINE void IfxCcu6_initCcpos1PinWithPadLevel(const IfxCcu6_Ccpos1_In *ccpos1, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
1342
1343 /** \brief Provides functionality for both setting of CCPOS2 pin direction as input and configuring pad driver
1344 * \param ccpos2 CC62 capture input CCPOS2
1345 * \param inputMode The pin input mode which should be configured
1346 * \param padDriver Pad Driver
1347 * \return None
1348 */
1349 IFX_INLINE void IfxCcu6_initCcpos2PinWithPadLevel(const IfxCcu6_Ccpos2_In *ccpos2, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
1350
1351 /** \brief Provides functionality for both setting of CTRAP pin direction as input and configuring pad driver
1352 * \param ctrap CTRAP input
1353 * \param inputMode The pin input mode which should be configured
1354 * \param padDriver Pad Driver
1355 * \return None
1356 */
1357 IFX_INLINE void IfxCcu6_initCtrapPinWithPadLevel(const IfxCcu6_Ctrap_In *ctrap, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
1358
1359 /** \brief Provides functionality for both setting of T12HR pin direction as input and configuring pad driver
1360 * \param t12hrIn Timer 12 HR input T12HR
1361 * \param inputMode The pin input mode which should be configured
1362 * \param padDriver Pad driver
1363 * \return None
1364 */
1365 IFX_INLINE void IfxCcu6_initT12hrPinWithPadLevel(const IfxCcu6_T12hr_In *t12hrIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
1366
1367 /** \brief Provides functionality for both setting of T13HR pin direction as input and configuring pad driver
1368 * \param t13hrIn Timer 13 HR input T13HR
1369 * \param inputMode The pin input mode which should be configured
1370 * \param padDriver Pad Driver
1371 * \return None
1372 */
1373 IFX_INLINE void IfxCcu6_initT13hrPinWithPadLevel(const IfxCcu6_T13hr_In *t13hrIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
1374
1375 /** \brief Sets the sensitivity of the module to sleep signal
1376 * \param ccu6 pointer to CCU6 registers
1377 * \param mode mode selection (enable/disable)
1378 * \return None
1379 */
1380 IFX_INLINE void IfxCcu6_setSleepMode(Ifx_CCU6 *ccu6, IfxCcu6_SleepMode mode);
1381
1382 /******************************************************************************/
1383 /*-------------------------Global Function Prototypes-------------------------*/
1384 /******************************************************************************/
1385
1386 /**
1387 * \param ccu6 pointer to ccu6 registers
1388 * \return None
1389 */
1390 IFX_EXTERN void IfxCcu6_resetModule(Ifx_CCU6 *ccu6);
1391
1392 /******************************************************************************/
1393 /*---------------------Inline Function Implementations------------------------*/
1394 /******************************************************************************/
1395
1396 IFX_INLINE void IfxCcu6_clearAllInterruptStatusFlags(Ifx_CCU6 *ccu6)
1397 {
1398 ccu6->ISR.U = 0xFFFF;
1399 }
1400
1401
1402 IFX_INLINE void IfxCcu6_clearCounter(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
1403 {
1404 Ifx_CCU6_TCTR4 tctr4;
1405 tctr4.U = 0;
1406 tctr4.B.T12RES = t12;
1407 tctr4.B.T13RES = t13;
1408 ccu6->TCTR4.U = tctr4.U;
1409 }
1410
1411
1412 IFX_INLINE void IfxCcu6_clearDeadTimeCounters(Ifx_CCU6 *ccu6)
1413 {
1414 ccu6->TCTR4.B.DTRES = TRUE;
1415 }
1416
1417
1418 IFX_INLINE void IfxCcu6_clearInterruptStatusFlag(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
1419 {
1420 uint32 mask = (1U << source);
1421 ccu6->ISR.U = mask;
1422 }
1423
1424
1425 IFX_INLINE void IfxCcu6_clearT12OneNotification(Ifx_CCU6 *ccu6)
1426 {
1427 ccu6->ISR.B.RT12OM = 1;
1428 }
1429
1430
1431 IFX_INLINE void IfxCcu6_clearT12PeriodNotification(Ifx_CCU6 *ccu6)
1432 {
1433 ccu6->ISR.B.RT12PM = 1;
1434 }
1435
1436
1437 IFX_INLINE void IfxCcu6_clearT13CompareNotification(Ifx_CCU6 *ccu6)
1438 {
1439 ccu6->ISR.B.RT13CM = 1;
1440 }
1441
1442
1443 IFX_INLINE void IfxCcu6_disableAdditionalPrescaler(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
1444 {
1445 uint32 shift = ((timer * 8) + 3);
1446 uint32 mask = (1U << shift);
1447 ccu6->TCTR0.U = ccu6->TCTR0.U & ~(mask);
1448 }
1449
1450
1451 IFX_INLINE void IfxCcu6_disableDeadTime(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
1452 {
1453 uint32 shift = (8 + channel);
1454 uint32 mask = (1 << shift);
1455 ccu6->T12DTC.U = ccu6->T12DTC.U & ~(mask);
1456 }
1457
1458
1459 IFX_INLINE void IfxCcu6_disableDelayBypass(Ifx_CCU6 *ccu6)
1460 {
1461 ccu6->T12MSEL.B.DBYP = FALSE;
1462 }
1463
1464
1465 IFX_INLINE void IfxCcu6_disableInterrupt(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
1466 {
1467 uint32 mask = (1U << source);
1468 ccu6->IEN.U = ccu6->IEN.U & ~(mask);
1469 }
1470
1471
1472 IFX_INLINE void IfxCcu6_disableMultiChannelMode(Ifx_CCU6 *ccu6)
1473 {
1474 ccu6->MODCTR.B.MCMEN = FALSE;
1475 }
1476
1477
1478 IFX_INLINE void IfxCcu6_disableShadowTransfer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
1479 {
1480 Ifx_CCU6_TCTR4 tctr4;
1481 tctr4.U = 0;
1482 tctr4.B.T12STD = t12;
1483 tctr4.B.T13STD = t13;
1484 ccu6->TCTR4.U = tctr4.U;
1485 }
1486
1487
1488 IFX_INLINE void IfxCcu6_disableSingleShotMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
1489 {
1490 uint32 mask = (1U << timer);
1491 ccu6->TCTR2.U = ccu6->TCTR2.U & ~(mask);
1492 }
1493
1494
1495 IFX_INLINE void IfxCcu6_disableT13InvertedModulation(Ifx_CCU6 *ccu6)
1496 {
1497 ccu6->CMPSTAT.B.T13IM = FALSE;
1498 }
1499
1500
1501 IFX_INLINE void IfxCcu6_disableTimer(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
1502 {
1503 uint32 mask = (1U << timer);
1504 ccu6->MCFG.U = ccu6->MCFG.U & ~(mask);
1505 }
1506
1507
1508 IFX_INLINE void IfxCcu6_disableTrap(Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut)
1509 {
1510 uint32 shift = (8 + channelOut); // offset at location TRPCTR.8 for output CC60
1511 uint32 mask = (1U << shift);
1512 ccu6->TRPCTR.U = ccu6->TRPCTR.U & ~(mask);
1513 }
1514
1515
1516 IFX_INLINE void IfxCcu6_disableTrapPin(Ifx_CCU6 *ccu6)
1517 {
1518 ccu6->TRPCTR.B.TRPPEN = FALSE;
1519 }
1520
1521
1522 IFX_INLINE void IfxCcu6_enableAdditionalPrescaler(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
1523 {
1524 uint32 shift = ((timer * 8) + 3);
1525 uint32 mask = (1U << shift);
1526 ccu6->TCTR0.U = ccu6->TCTR0.U | (mask);
1527 }
1528
1529
1530 IFX_INLINE void IfxCcu6_enableCountEvent(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
1531 {
1532 Ifx_CCU6_TCTR4 tctr4;
1533 tctr4.U = 0;
1534 tctr4.B.T12CNT = t12;
1535 tctr4.B.T13CNT = t13;
1536 ccu6->TCTR4.U = tctr4.U;
1537 }
1538
1539
1540 IFX_INLINE void IfxCcu6_enableDeadTime(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
1541 {
1542 uint32 shift = (8 + channel);
1543 uint32 mask = (1 << shift);
1544 ccu6->T12DTC.U = ccu6->T12DTC.U | (mask);
1545 }
1546
1547
1548 IFX_INLINE void IfxCcu6_enableDelayBypass(Ifx_CCU6 *ccu6)
1549 {
1550 ccu6->T12MSEL.B.DBYP = TRUE;
1551 }
1552
1553
1554 IFX_INLINE void IfxCcu6_enableHallPatternShadowTransfer(Ifx_CCU6 *ccu6)
1555 {
1556 ccu6->MCMOUTS.B.STRHP = TRUE;
1557 }
1558
1559
1560 IFX_INLINE void IfxCcu6_enableInterrupt(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
1561 {
1562 uint32 mask = (1U << source);
1563 ccu6->IEN.U = ccu6->IEN.U | (mask);
1564 }
1565
1566
1567 IFX_INLINE void IfxCcu6_enableMultiChannelMode(Ifx_CCU6 *ccu6)
1568 {
1569 ccu6->MODCTR.B.MCMEN = TRUE;
1570 }
1571
1572
1573 IFX_INLINE void IfxCcu6_enableMultiChannelModeAvailability(Ifx_CCU6 *ccu6)
1574 {
1575 ccu6->MCFG.B.MCM = 1;
1576 }
1577
1578
1579 IFX_INLINE void IfxCcu6_enableMultiChannelPwmPatternShadowTransfer(Ifx_CCU6 *ccu6)
1580 {
1581 ccu6->MCMOUTS.B.STRMCM = TRUE;
1582 }
1583
1584
1585 IFX_INLINE void IfxCcu6_enableMultiChannelT12DowncountingShadowTransfer(Ifx_CCU6 *ccu6)
1586 {
1587 ccu6->MCMCTR.B.STE12D = TRUE;
1588 }
1589
1590
1591 IFX_INLINE void IfxCcu6_enableMultiChannelT12UpcountingShadowTransfer(Ifx_CCU6 *ccu6)
1592 {
1593 ccu6->MCMCTR.B.STE12U = TRUE;
1594 }
1595
1596
1597 IFX_INLINE void IfxCcu6_enableMultiChannelT13UpcountingShadowTransfer(Ifx_CCU6 *ccu6)
1598 {
1599 ccu6->MCMCTR.B.STE13U = TRUE;
1600 }
1601
1602
1603 IFX_INLINE void IfxCcu6_enableShadowTransfer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
1604 {
1605 Ifx_CCU6_TCTR4 tctr4;
1606 tctr4.U = 0;
1607 tctr4.B.T12STR = t12;
1608 tctr4.B.T13STR = t13;
1609 ccu6->TCTR4.U = tctr4.U;
1610 }
1611
1612
1613 IFX_INLINE void IfxCcu6_enableSingleShotMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
1614 {
1615 uint32 mask = (1U << timer);
1616 ccu6->TCTR2.U = ccu6->TCTR2.U | (mask);
1617 }
1618
1619
1620 IFX_INLINE void IfxCcu6_enableT13InvertedModulation(Ifx_CCU6 *ccu6)
1621 {
1622 ccu6->CMPSTAT.B.T13IM = TRUE;
1623 }
1624
1625
1626 IFX_INLINE void IfxCcu6_enableTimer(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
1627 {
1628 uint32 mask = (1U << timer);
1629 ccu6->MCFG.U = ccu6->MCFG.U | (mask);
1630 }
1631
1632
1633 IFX_INLINE void IfxCcu6_enableTrap(Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut)
1634 {
1635 uint32 shift = (8 + channelOut); // offset at location TRPCTR.8 for output CC60
1636 uint32 mask = (1U << shift);
1637 ccu6->TRPCTR.U = ccu6->TRPCTR.U | (mask);
1638 }
1639
1640
1641 IFX_INLINE void IfxCcu6_enableTrapPin(Ifx_CCU6 *ccu6)
1642 {
1643 ccu6->TRPCTR.B.TRPPEN = TRUE;
1644 }
1645
1646
1647 IFX_INLINE boolean IfxCcu6_getDeadTimeStatus(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
1648 {
1649 uint32 shift = (12 + channel);
1650 uint32 mask = 1 << shift;
1651 return (ccu6->T12DTC.U & mask) ? TRUE : FALSE;
1652 }
1653
1654
1655 IFX_INLINE boolean IfxCcu6_getHallPatternSampleState(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
1656 {
1657 uint32 shift = (channel + 3);
1658 uint32 mask = (1U << shift);
1659 return (ccu6->CMPSTAT.U & mask) ? TRUE : FALSE;
1660 }
1661
1662
1663 IFX_INLINE boolean IfxCcu6_getInterruptStatusFlag(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
1664 {
1665 uint32 shift = (1U << source);
1666 return (ccu6->IS.U & shift) ? TRUE : FALSE;
1667 }
1668
1669
1670 IFX_INLINE boolean IfxCcu6_getMultiChannelModeAvailabilityStatus(Ifx_CCU6 *ccu6)
1671 {
1672 return ccu6->MCFG.B.MCM != 0;
1673 }
1674
1675
1676 IFX_INLINE boolean IfxCcu6_getMultiChannelPWMPatternShadowTransferStatus(Ifx_CCU6 *ccu6)
1677 {
1678 return ccu6->MCMOUT.B.R != 0;
1679 }
1680
1681
1682 IFX_INLINE boolean IfxCcu6_getShadowTransferStatus(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
1683 {
1684 uint32 shift = ((timer * 8) + 5);
1685 uint32 mask = (1U << shift);
1686 return (ccu6->TCTR0.U & mask) ? TRUE : FALSE;
1687 }
1688
1689
1690 IFX_INLINE boolean IfxCcu6_getT12CaptureCompareState(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
1691 {
1692 uint32 mask = (1U << channel);
1693 return (ccu6->CMPSTAT.U & mask) ? TRUE : FALSE;
1694 }
1695
1696
1697 IFX_INLINE IfxCcu6_T12CountDirection IfxCcu6_getT12CountDirection(Ifx_CCU6 *ccu6)
1698 {
1699 return (IfxCcu6_T12CountDirection)((ccu6->TCTR0.B.CDIR) ? TRUE : FALSE);
1700 }
1701
1702
1703 IFX_INLINE volatile uint32 *IfxCcu6_getT12TimerPointer(Ifx_CCU6 *ccu6)
1704 {
1705 return (volatile uint32 *)&ccu6->T12PR;
1706 }
1707
1708
1709 IFX_INLINE boolean IfxCcu6_getT13CaptureCompareState(Ifx_CCU6 *ccu6)
1710 {
1711 return ccu6->CMPSTAT.B.CC63ST != 0;
1712 }
1713
1714
1715 IFX_INLINE boolean IfxCcu6_getTimerAvailabilityStatus(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
1716 {
1717 uint32 mask = (1U << timer);
1718 return (ccu6->MCFG.U & mask) ? TRUE : FALSE;
1719 }
1720
1721
1722 IFX_INLINE IfxCcu6_TimerRunStatus IfxCcu6_getTimerRunStatus(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
1723 {
1724 uint32 shift = ((timer * 8) + 4);
1725 uint32 mask = (1U << shift);
1726 return (IfxCcu6_TimerRunStatus)((ccu6->TCTR0.U & mask) ? TRUE : FALSE);
1727 }
1728
1729
1730 IFX_INLINE void IfxCcu6_initCc60InPin(const IfxCcu6_Cc60in_In *cc60In, IfxPort_InputMode inputMode)
1731 {
1732 IfxPort_setPinModeInput(cc60In->pin.port, cc60In->pin.pinIndex, inputMode);
1733 IfxCcu6_setCaptureCompareInputSignal(cc60In->module, IfxCcu6_CaptureCompareInput_cC60, (IfxCcu6_CaptureCompareInputSignal)cc60In->select);
1734 }
1735
1736
1737 IFX_INLINE void IfxCcu6_initCc60InPinWithPadLevel(const IfxCcu6_Cc60in_In *cc60In, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
1738 {
1739 IfxPort_setPinModeInput(cc60In->pin.port, cc60In->pin.pinIndex, inputMode);
1740 IfxPort_setPinPadDriver(cc60In->pin.port, cc60In->pin.pinIndex, padDriver);
1741 IfxCcu6_setCaptureCompareInputSignal(cc60In->module, IfxCcu6_CaptureCompareInput_cC60, (IfxCcu6_CaptureCompareInputSignal)cc60In->select);
1742 }
1743
1744
1745 IFX_INLINE void IfxCcu6_initCc60OutPin(const IfxCcu6_Cc60_Out *cc60Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
1746 {
1747 IfxPort_setPinModeOutput(cc60Out->pin.port, cc60Out->pin.pinIndex, outputMode, cc60Out->select);
1748 IfxPort_setPinPadDriver(cc60Out->pin.port, cc60Out->pin.pinIndex, padDriver);
1749 }
1750
1751
1752 IFX_INLINE void IfxCcu6_initCc61InPin(const IfxCcu6_Cc61in_In *cc61In, IfxPort_InputMode inputMode)
1753 {
1754 IfxPort_setPinModeInput(cc61In->pin.port, cc61In->pin.pinIndex, inputMode);
1755 IfxCcu6_setCaptureCompareInputSignal(cc61In->module, IfxCcu6_CaptureCompareInput_cC61, (IfxCcu6_CaptureCompareInputSignal)cc61In->select);
1756 }
1757
1758
1759 IFX_INLINE void IfxCcu6_initCc61InPinWithPadLevel(const IfxCcu6_Cc61in_In *cc61In, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
1760 {
1761 IfxPort_setPinModeInput(cc61In->pin.port, cc61In->pin.pinIndex, inputMode);
1762 IfxPort_setPinPadDriver(cc61In->pin.port, cc61In->pin.pinIndex, padDriver);
1763 IfxCcu6_setCaptureCompareInputSignal(cc61In->module, IfxCcu6_CaptureCompareInput_cC61, (IfxCcu6_CaptureCompareInputSignal)cc61In->select);
1764 }
1765
1766
1767 IFX_INLINE void IfxCcu6_initCc61OutPin(const IfxCcu6_Cc61_Out *cc61Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
1768 {
1769 IfxPort_setPinModeOutput(cc61Out->pin.port, cc61Out->pin.pinIndex, outputMode, cc61Out->select);
1770 IfxPort_setPinPadDriver(cc61Out->pin.port, cc61Out->pin.pinIndex, padDriver);
1771 }
1772
1773
1774 IFX_INLINE void IfxCcu6_initCc62InPin(const IfxCcu6_Cc62in_In *cc62In, IfxPort_InputMode inputMode)
1775 {
1776 IfxPort_setPinModeInput(cc62In->pin.port, cc62In->pin.pinIndex, inputMode);
1777 IfxCcu6_setCaptureCompareInputSignal(cc62In->module, IfxCcu6_CaptureCompareInput_cC62, (IfxCcu6_CaptureCompareInputSignal)cc62In->select);
1778 }
1779
1780
1781 IFX_INLINE void IfxCcu6_initCc62InPinWithPadLevel(const IfxCcu6_Cc62in_In *cc62In, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
1782 {
1783 IfxPort_setPinModeInput(cc62In->pin.port, cc62In->pin.pinIndex, inputMode);
1784 IfxPort_setPinPadDriver(cc62In->pin.port, cc62In->pin.pinIndex, padDriver);
1785 IfxCcu6_setCaptureCompareInputSignal(cc62In->module, IfxCcu6_CaptureCompareInput_cC62, (IfxCcu6_CaptureCompareInputSignal)cc62In->select);
1786 }
1787
1788
1789 IFX_INLINE void IfxCcu6_initCc62OutPin(const IfxCcu6_Cc62_Out *cc62Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
1790 {
1791 IfxPort_setPinModeOutput(cc62Out->pin.port, cc62Out->pin.pinIndex, outputMode, cc62Out->select);
1792 IfxPort_setPinPadDriver(cc62Out->pin.port, cc62Out->pin.pinIndex, padDriver);
1793 }
1794
1795
1796 IFX_INLINE void IfxCcu6_initCcpos0Pin(const IfxCcu6_Ccpos0_In *ccpos0, IfxPort_InputMode inputMode)
1797 {
1798 IfxPort_setPinModeInput(ccpos0->pin.port, ccpos0->pin.pinIndex, inputMode);
1799 IfxCcu6_setCaptureCompareInputSignal(ccpos0->module, IfxCcu6_CaptureCompareInput_cCPOS0, (IfxCcu6_CaptureCompareInputSignal)ccpos0->select);
1800 }
1801
1802
1803 IFX_INLINE void IfxCcu6_initCcpos0PinWithPadLevel(const IfxCcu6_Ccpos0_In *ccpos0, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
1804 {
1805 IfxPort_setPinModeInput(ccpos0->pin.port, ccpos0->pin.pinIndex, inputMode);
1806 IfxPort_setPinPadDriver(ccpos0->pin.port, ccpos0->pin.pinIndex, padDriver);
1807 IfxCcu6_setCaptureCompareInputSignal(ccpos0->module, IfxCcu6_CaptureCompareInput_cCPOS0, (IfxCcu6_CaptureCompareInputSignal)ccpos0->select);
1808 }
1809
1810
1811 IFX_INLINE void IfxCcu6_initCcpos1Pin(const IfxCcu6_Ccpos1_In *ccpos1, IfxPort_InputMode inputMode)
1812 {
1813 IfxPort_setPinModeInput(ccpos1->pin.port, ccpos1->pin.pinIndex, inputMode);
1814 IfxCcu6_setCaptureCompareInputSignal(ccpos1->module, IfxCcu6_CaptureCompareInput_cCPOS1, (IfxCcu6_CaptureCompareInputSignal)ccpos1->select);
1815 }
1816
1817
1818 IFX_INLINE void IfxCcu6_initCcpos1PinWithPadLevel(const IfxCcu6_Ccpos1_In *ccpos1, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
1819 {
1820 IfxPort_setPinModeInput(ccpos1->pin.port, ccpos1->pin.pinIndex, inputMode);
1821 IfxPort_setPinPadDriver(ccpos1->pin.port, ccpos1->pin.pinIndex, padDriver);
1822 IfxCcu6_setCaptureCompareInputSignal(ccpos1->module, IfxCcu6_CaptureCompareInput_cCPOS1, (IfxCcu6_CaptureCompareInputSignal)ccpos1->select);
1823 }
1824
1825
1826 IFX_INLINE void IfxCcu6_initCcpos2Pin(const IfxCcu6_Ccpos2_In *ccpos2, IfxPort_InputMode inputMode)
1827 {
1828 IfxPort_setPinModeInput(ccpos2->pin.port, ccpos2->pin.pinIndex, inputMode);
1829 IfxCcu6_setCaptureCompareInputSignal(ccpos2->module, IfxCcu6_CaptureCompareInput_cCPOS2, (IfxCcu6_CaptureCompareInputSignal)ccpos2->select);
1830 }
1831
1832
1833 IFX_INLINE void IfxCcu6_initCcpos2PinWithPadLevel(const IfxCcu6_Ccpos2_In *ccpos2, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
1834 {
1835 IfxPort_setPinModeInput(ccpos2->pin.port, ccpos2->pin.pinIndex, inputMode);
1836 IfxPort_setPinPadDriver(ccpos2->pin.port, ccpos2->pin.pinIndex, padDriver);
1837 IfxCcu6_setCaptureCompareInputSignal(ccpos2->module, IfxCcu6_CaptureCompareInput_cCPOS2, (IfxCcu6_CaptureCompareInputSignal)ccpos2->select);
1838 }
1839
1840
1841 IFX_INLINE void IfxCcu6_initCout60Pin(const IfxCcu6_Cout60_Out *cout60, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
1842 {
1843 IfxPort_setPinModeOutput(cout60->pin.port, cout60->pin.pinIndex, outputMode, cout60->select);
1844 IfxPort_setPinPadDriver(cout60->pin.port, cout60->pin.pinIndex, padDriver);
1845 }
1846
1847
1848 IFX_INLINE void IfxCcu6_initCout61Pin(const IfxCcu6_Cout61_Out *cout61, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
1849 {
1850 IfxPort_setPinModeOutput(cout61->pin.port, cout61->pin.pinIndex, outputMode, cout61->select);
1851 IfxPort_setPinPadDriver(cout61->pin.port, cout61->pin.pinIndex, padDriver);
1852 }
1853
1854
1855 IFX_INLINE void IfxCcu6_initCout62Pin(const IfxCcu6_Cout62_Out *cout62, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
1856 {
1857 IfxPort_setPinModeOutput(cout62->pin.port, cout62->pin.pinIndex, outputMode, cout62->select);
1858 IfxPort_setPinPadDriver(cout62->pin.port, cout62->pin.pinIndex, padDriver);
1859 }
1860
1861
1862 IFX_INLINE void IfxCcu6_initCout63Pin(const IfxCcu6_Cout63_Out *cout63, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
1863 {
1864 IfxPort_setPinModeOutput(cout63->pin.port, cout63->pin.pinIndex, outputMode, cout63->select);
1865 IfxPort_setPinPadDriver(cout63->pin.port, cout63->pin.pinIndex, padDriver);
1866 }
1867
1868
1869 IFX_INLINE void IfxCcu6_initCtrapPin(const IfxCcu6_Ctrap_In *ctrap, IfxPort_InputMode inputMode)
1870 {
1871 IfxPort_setPinModeInput(ctrap->pin.port, ctrap->pin.pinIndex, inputMode);
1872 IfxCcu6_setCaptureCompareInputSignal(ctrap->module, IfxCcu6_CaptureCompareInput_cTRAP, (IfxCcu6_CaptureCompareInputSignal)ctrap->select);
1873 }
1874
1875
1876 IFX_INLINE void IfxCcu6_initCtrapPinWithPadLevel(const IfxCcu6_Ctrap_In *ctrap, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
1877 {
1878 IfxPort_setPinModeInput(ctrap->pin.port, ctrap->pin.pinIndex, inputMode);
1879 IfxPort_setPinPadDriver(ctrap->pin.port, ctrap->pin.pinIndex, padDriver);
1880 IfxCcu6_setCaptureCompareInputSignal(ctrap->module, IfxCcu6_CaptureCompareInput_cTRAP, (IfxCcu6_CaptureCompareInputSignal)ctrap->select);
1881 }
1882
1883
1884 IFX_INLINE void IfxCcu6_initT12hrPin(const IfxCcu6_T12hr_In *t12hrIn, IfxPort_InputMode inputMode)
1885 {
1886 IfxPort_setPinModeInput(t12hrIn->pin.port, t12hrIn->pin.pinIndex, inputMode);
1887 IfxCcu6_setT12InputSignal(t12hrIn->module, t12hrIn);
1888 }
1889
1890
1891 IFX_INLINE void IfxCcu6_initT12hrPinWithPadLevel(const IfxCcu6_T12hr_In *t12hrIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
1892 {
1893 IfxPort_setPinModeInput(t12hrIn->pin.port, t12hrIn->pin.pinIndex, inputMode);
1894 IfxPort_setPinPadDriver(t12hrIn->pin.port, t12hrIn->pin.pinIndex, padDriver);
1895 IfxCcu6_setT12InputSignal(t12hrIn->module, t12hrIn);
1896 }
1897
1898
1899 IFX_INLINE void IfxCcu6_initT13hrPin(const IfxCcu6_T13hr_In *t13hrIn, IfxPort_InputMode inputMode)
1900 {
1901 IfxPort_setPinModeInput(t13hrIn->pin.port, t13hrIn->pin.pinIndex, inputMode);
1902 IfxCcu6_setT13InputSignal(t13hrIn->module, t13hrIn);
1903 }
1904
1905
1906 IFX_INLINE void IfxCcu6_initT13hrPinWithPadLevel(const IfxCcu6_T13hr_In *t13hrIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
1907 {
1908 IfxPort_setPinModeInput(t13hrIn->pin.port, t13hrIn->pin.pinIndex, inputMode);
1909 IfxPort_setPinPadDriver(t13hrIn->pin.port, t13hrIn->pin.pinIndex, padDriver);
1910 IfxCcu6_setT13InputSignal(t13hrIn->module, t13hrIn);
1911 }
1912
1913
1914 IFX_INLINE boolean IfxCcu6_isModuleEnabled(Ifx_CCU6 *ccu6)
1915 {
1916 return ccu6->CLC.B.DISS == 0;
1917 }
1918
1919
1920 IFX_INLINE boolean IfxCcu6_isModuleSuspended(Ifx_CCU6 *ccu6)
1921 {
1922 Ifx_CCU6_OCS ocs;
1923
1924 // read the status
1925 ocs.U = ccu6->OCS.U;
1926
1927 // return the status
1928 return ocs.B.SUSSTA;
1929 }
1930
1931
1932 IFX_INLINE boolean IfxCcu6_isT12OneNotification(Ifx_CCU6 *ccu6)
1933 {
1934 return ccu6->IS.B.T12OM != 0;
1935 }
1936
1937
1938 IFX_INLINE boolean IfxCcu6_isT12PeriodNotification(Ifx_CCU6 *ccu6)
1939 {
1940 return ccu6->IS.B.T12PM != 0;
1941 }
1942
1943
1944 IFX_INLINE boolean IfxCcu6_isT13CompareNotification(Ifx_CCU6 *ccu6)
1945 {
1946 return ccu6->IS.B.T13CM != 0;
1947 }
1948
1949
1950 IFX_INLINE void IfxCcu6_setCaptureCompareInputSignal(Ifx_CCU6 *ccu6, IfxCcu6_CaptureCompareInput input, IfxCcu6_CaptureCompareInputSignal signal)
1951 {
1952 uint32 shift = (uint32)input;
1953 uint32 mask = (0x3U << shift);
1954 ccu6->PISEL0.U = (ccu6->PISEL0.U & ~mask) | ((uint32)signal << shift);
1955 }
1956
1957
1958 IFX_INLINE void IfxCcu6_setCountingInputMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_CountingInputMode mode)
1959 {
1960 uint32 shift = ((timer * 2) + 2);
1961 uint32 mask = (0x3U << shift);
1962 ccu6->PISEL2.U = (ccu6->PISEL2.U & ~mask) | ((uint32)mode << shift);
1963 }
1964
1965
1966 IFX_INLINE void IfxCcu6_setCurrentHallPattern(Ifx_CCU6 *ccu6, uint8 pattern)
1967 {
1968 ccu6->MCMOUTS.B.CURHS = pattern;
1969 }
1970
1971
1972 IFX_INLINE void IfxCcu6_setDeadTimeValue(Ifx_CCU6 *ccu6, uint8 value)
1973 {
1974 ccu6->T12DTC.B.DTM = value;
1975 }
1976
1977
1978 IFX_INLINE void IfxCcu6_setExpectedHallPattern(Ifx_CCU6 *ccu6, uint8 pattern)
1979 {
1980 ccu6->MCMOUTS.B.EXPHS = pattern;
1981 }
1982
1983
1984 IFX_INLINE void IfxCcu6_setExternalRunMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ExternalTriggerMode mode)
1985 {
1986 uint32 shift = ((timer * 2) + 8);
1987 uint32 mask = (0x3U << shift);
1988 ccu6->TCTR2.U = (ccu6->TCTR2.U & ~mask) | ((uint32)mode << shift);
1989 }
1990
1991
1992 IFX_INLINE void IfxCcu6_setHallSensorTriggerMode(Ifx_CCU6 *ccu6, IfxCcu6_HallSensorTriggerMode mode)
1993 {
1994 uint32 shift = 12;
1995 uint32 mask = (0x7U << shift);
1996 ccu6->T12MSEL.U = (ccu6->T12MSEL.U & ~mask) | ((uint32)mode << shift);
1997 }
1998
1999
2000 IFX_INLINE void IfxCcu6_setInputClockFrequency(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_TimerInputClock frequency)
2001 {
2002 uint32 shift = (timer * 8);
2003 uint32 mask = (0x7U << shift);
2004 ccu6->TCTR0.U = (ccu6->TCTR0.U & ~mask) | ((uint32)frequency << shift);
2005 }
2006
2007
2008 IFX_INLINE void IfxCcu6_setInterruptStatusFlag(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
2009 {
2010 uint32 mask = (1U << source);
2011 ccu6->ISS.U = ccu6->ISS.U | (mask);
2012 }
2013
2014
2015 IFX_INLINE void IfxCcu6_setMultiChannelPwmPattern(Ifx_CCU6 *ccu6, uint8 pattern)
2016 {
2017 ccu6->MCMOUTS.B.MCMPS = pattern;
2018 }
2019
2020
2021 IFX_INLINE void IfxCcu6_setMultiChannelSwitchingMode(Ifx_CCU6 *ccu6, IfxCcu6_MultiChannelSwitchingSelect mode)
2022 {
2023 ccu6->MCMCTR.B.SWSEL = mode;
2024 }
2025
2026
2027 IFX_INLINE void IfxCcu6_setMultiChannelSwitchingSync(Ifx_CCU6 *ccu6, IfxCcu6_MultiChannelSwitchingSync sync)
2028 {
2029 ccu6->MCMCTR.B.SWSYN = sync;
2030 }
2031
2032
2033 IFX_INLINE void IfxCcu6_setOutputPassiveState(Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut, boolean state)
2034 {
2035 uint32 shift = (channelOut + 8); // offset at location CC60PS
2036 uint32 mask = (1U << shift);
2037 ccu6->CMPSTAT.U = (ccu6->CMPSTAT.U & ~mask) | ((uint32)state << shift);
2038 }
2039
2040
2041 IFX_INLINE void IfxCcu6_setSingleShotModeEnable(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
2042 {
2043 Ifx_CCU6_TCTR2 tctr2;
2044 tctr2.U = ccu6->TCTR2.U;
2045 tctr2.B.T12SSC = t12;
2046 tctr2.B.T13SSC = t13;
2047 ccu6->TCTR2.U = tctr2.U;
2048 }
2049
2050
2051 IFX_INLINE void IfxCcu6_setSleepMode(Ifx_CCU6 *ccu6, IfxCcu6_SleepMode mode)
2052 {
2053 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
2054 IfxScuWdt_clearCpuEndinit(passwd);
2055 ccu6->CLC.B.EDIS = mode;
2056 IfxScuWdt_setCpuEndinit(passwd);
2057 }
2058
2059
2060 IFX_INLINE void IfxCcu6_setSuspendMode(Ifx_CCU6 *ccu6, IfxCcu6_SuspendMode mode)
2061 {
2062 Ifx_CCU6_OCS ocs;
2063
2064 // remove protection and configure the suspend mode.
2065 ocs.B.SUS_P = 1;
2066 ocs.B.SUS = mode;
2067 ccu6->OCS.U = ocs.U;
2068 }
2069
2070
2071 IFX_INLINE void IfxCcu6_setT12ChannelMode(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, IfxCcu6_T12ChannelMode mode)
2072 {
2073 uint32 shift = (4 * channel);
2074 uint32 mask = (0xFU << shift);
2075 ccu6->T12MSEL.U = (ccu6->T12MSEL.U & ~mask) | ((uint32)mode << shift);
2076 }
2077
2078
2079 IFX_INLINE void IfxCcu6_setT12CountMode(Ifx_CCU6 *ccu6, IfxCcu6_T12CountMode mode)
2080 {
2081 ccu6->TCTR0.B.CTM = mode;
2082 }
2083
2084
2085 IFX_INLINE void IfxCcu6_setT12CounterValue(Ifx_CCU6 *ccu6, uint16 value)
2086 {
2087 ccu6->T12.B.T12CV = value;
2088 }
2089
2090
2091 IFX_INLINE void IfxCcu6_setT12PeriodValue(Ifx_CCU6 *ccu6, uint16 value)
2092 {
2093 ccu6->T12PR.B.T12PV = value;
2094 }
2095
2096
2097 IFX_INLINE void IfxCcu6_setT13CompareValue(Ifx_CCU6 *ccu6, uint16 value)
2098 {
2099 ccu6->CC63SR.B.CCS = value;
2100 }
2101
2102
2103 IFX_INLINE void IfxCcu6_setT13CounterValue(Ifx_CCU6 *ccu6, uint16 value)
2104 {
2105 ccu6->T13.B.T13CV = value;
2106 }
2107
2108
2109 IFX_INLINE void IfxCcu6_setT13PeriodValue(Ifx_CCU6 *ccu6, uint16 value)
2110 {
2111 ccu6->T13PR.B.T13PV = value;
2112 }
2113
2114
2115 IFX_INLINE void IfxCcu6_setT13TriggerEventDirection(Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerDirection direction)
2116 {
2117 ccu6->TCTR2.B.T13TED = direction;
2118 }
2119
2120
2121 IFX_INLINE void IfxCcu6_setT13TriggerEventMode(Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerEvent mode)
2122 {
2123 ccu6->TCTR2.B.T13TEC = mode;
2124 }
2125
2126
2127 IFX_INLINE void IfxCcu6_setTrapMode(Ifx_CCU6 *ccu6, IfxCcu6_TrapMode mode)
2128 {
2129 ccu6->TRPCTR.B.TRPM2 = mode;
2130 }
2131
2132
2133 IFX_INLINE void IfxCcu6_setTrapState(Ifx_CCU6 *ccu6, IfxCcu6_TrapState state)
2134 {
2135 uint32 mask = 0x3U;
2136 ccu6->TRPCTR.U = (ccu6->TRPCTR.U & ~mask) | ((uint32)state);
2137 }
2138
2139
2140 IFX_INLINE void IfxCcu6_startTimer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
2141 {
2142 Ifx_CCU6_TCTR4 tctr4;
2143 tctr4.U = 0;
2144 tctr4.B.T12RS = t12;
2145 tctr4.B.T13RS = t13;
2146 ccu6->TCTR4.U = tctr4.U;
2147 }
2148
2149
2150 IFX_INLINE void IfxCcu6_stopTimer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
2151 {
2152 Ifx_CCU6_TCTR4 tctr4;
2153 tctr4.U = 0;
2154 tctr4.B.T12RR = t12;
2155 tctr4.B.T13RR = t13;
2156 ccu6->TCTR4.U = tctr4.U;
2157 }
2158
2159
2160 IFX_INLINE void IfxCcu6_updateHallPattern(Ifx_CCU6 *ccu6, uint8 currentHall, uint8 expectedHall, uint8 output)
2161 {
2162 Ifx_CCU6_MCMOUTS mcmouts;
2163 mcmouts.U = ccu6->MCMOUTS.U;
2164
2165 mcmouts.B.CURHS = currentHall;
2166 mcmouts.B.EXPHS = expectedHall;
2167 mcmouts.B.MCMPS = output;
2168
2169 ccu6->MCMOUTS.U = mcmouts.U;
2170 }
2171
2172
2173 #endif /* IFXCCU6_H */
IfxCcu6_enableDelayBypass
IFX_INLINE void IfxCcu6_enableDelayBypass(Ifx_CCU6 *ccu6)
Enables the delay of the source signal for the sampling of the Hall input pattern (selected by HSYNC)...
Definition: IfxCcu6.h:1548
IfxCcu6_CaptureCompareInput_cC62
CC62 capture input.
Definition: IfxCcu6.h:82
IfxCcu6_resetModule
IFX_EXTERN void IfxCcu6_resetModule(Ifx_CCU6 *ccu6)
Definition: IfxCcu6.c:235
IfxCcu6_SuspendMode
IfxCcu6_SuspendMode
OCDS Suspend Control (OCDS.SUS)
Definition: IfxCcu6.h:249
IfxCcu6_HallSensorTriggerMode_permanentCheck
Any edge at any of the inputs CCPOSx, independent from any PWM signal.
Definition: IfxCcu6.h:165
IfxCcu6_TimerInputSignal
IfxCcu6_TimerInputSignal
Selection of actual input signal for the timer inputs.
Definition: IfxCcu6.h:357
IfxCcu6_Cc60in_In
CC60IN pin mapping structure.
Definition: IfxCcu6_PinMap.h:56
IfxCcu6_Cc61in_In
CC61IN pin mapping structure.
Definition: IfxCcu6_PinMap.h:64
IfxCcu6_stopTimer
IFX_INLINE void IfxCcu6_stopTimer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
starts the timers (T12, T13 individually or together based on the selection)
Definition: IfxCcu6.h:2150
IfxCcu6_Cc62in_In
CC62IN pin mapping structure.
Definition: IfxCcu6_PinMap.h:72
IfxCcu6_ServiceRequest_3
Service request output SR3.
Definition: IfxCcu6.h:235
IfxCcu6_setMultiChannelPwmPattern
IFX_INLINE void IfxCcu6_setMultiChannelPwmPattern(Ifx_CCU6 *ccu6, uint8 pattern)
Sets the output pattern for the multichannel mode (writes into shadow register)
Definition: IfxCcu6.h:2015
IfxCcu6_ExternalTriggerMode_disable
The external setting of T1xR is disabled.
Definition: IfxCcu6.h:151
IfxCcu6_initCc60InPinWithPadLevel
IFX_INLINE void IfxCcu6_initCc60InPinWithPadLevel(const IfxCcu6_Cc60in_In *cc60In, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CC60 pin direction as input and configuring pad driver...
Definition: IfxCcu6.h:1737
IfxCcu6_enableAdditionalPrescaler
IFX_INLINE void IfxCcu6_enableAdditionalPrescaler(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Enables the additional prescaler of 1/256 can be enabled for the prescaler of T12 or T13 to support h...
Definition: IfxCcu6.h:1522
IfxCcu6_disableAdditionalPrescaler
IFX_INLINE void IfxCcu6_disableAdditionalPrescaler(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Disables the additional prescaler of 1/256 can be enabled for the prescaler of T12 or T13 to support ...
Definition: IfxCcu6.h:1443
IfxCcu6_disableTrapPin
IFX_INLINE void IfxCcu6_disableTrapPin(Ifx_CCU6 *ccu6)
Disables the input (pin) function for the trap generation.
Definition: IfxCcu6.h:1516
IfxCcu6_ChannelOut_cout1
CC61 compare output COUT1.
Definition: IfxCcu6.h:115
IfxCcu6_clearCounter
IFX_INLINE void IfxCcu6_clearCounter(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Clears the counters of the Timers (T12, T13 individually or together based on the selection) ...
Definition: IfxCcu6.h:1402
IfxCcu6_setExternalRunMode
IFX_INLINE void IfxCcu6_setExternalRunMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ExternalTriggerMode mode)
Sets the event of signal T1xHR that can set the run bit T1xR by HW.
Definition: IfxCcu6.h:1984
IfxCcu6_clearT13CompareNotification
IFX_INLINE void IfxCcu6_clearT13CompareNotification(Ifx_CCU6 *ccu6)
Clears the T13 compare notification.
Definition: IfxCcu6.h:1437
IfxCcu6_getSrcAddress
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxCcu6_getSrcAddress(Ifx_CCU6 *ccu6, IfxCcu6_ServiceRequest serviceRequest)
Returns the service request register.
Definition: IfxCcu6.c:207
IfxCcu6_Cc62_Out
CC62 pin mapping structure.
Definition: IfxCcu6_PinMap.h:144
IfxCcu6_Cc60in_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxCcu6_PinMap.h:59
IfxCcu6_T12ChannelMode_multiInputCaptureAny
CC6xIN any active edge : T12 stored in CC6xR, CCPOSx any active edge: T12 stored in CC6xSR...
Definition: IfxCcu6.h:282
IfxCcu6_Ccpos1_In
CCPOS1 pin mapping structure.
Definition: IfxCcu6_PinMap.h:88
IfxCcu6_clearAllInterruptStatusFlags
IFX_INLINE void IfxCcu6_clearAllInterruptStatusFlags(Ifx_CCU6 *ccu6)
Clears all Interrupt flags.
Definition: IfxCcu6.h:1396
IfxCcu6_Index
IfxCcu6_Index
List of the available CCU6 resources.
Definition: IfxCcu6_cfg.h:80
IfxCcu6_TimerInputClock_fcc6By64
fcc6 / 64
Definition: IfxCcu6.h:351
IfxCcu6_initCcpos0PinWithPadLevel
IFX_INLINE void IfxCcu6_initCcpos0PinWithPadLevel(const IfxCcu6_Ccpos0_In *ccpos0, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CCPOS0 pin direction as input and configuring pad driver...
Definition: IfxCcu6.h:1803
IfxCcu6_enableDeadTime
IFX_INLINE void IfxCcu6_enableDeadTime(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Enables the dead time generation for each compare channel (0, 1, 2) of Timer12.
Definition: IfxCcu6.h:1540
IfxCcu6_InterruptSource_cc62FallingEdge
Capture compare match falling edge interrupt enable for channel CC62.
Definition: IfxCcu6.h:191
IfxCcu6_T12CountMode_edgeAligned
T12 always counts up and continues counting from zero after reaching the period value.
Definition: IfxCcu6.h:299
IfxCcu6_InterruptSource_t13PeriodMatch
Interrupt enable for T13 period-match.
Definition: IfxCcu6.h:196
IfxCcu6_MultiChannelSwitchingSelect_t12PeriodMatch
T12 period match detected (while counting up)
Definition: IfxCcu6.h:213
IfxCcu6_initCc60InPin
IFX_INLINE void IfxCcu6_initCc60InPin(const IfxCcu6_Cc60in_In *cc60In, IfxPort_InputMode inputMode)
Initialises a CC60 input pin.
Definition: IfxCcu6.h:1730
IfxCcu6_getDeadTimeStatus
IFX_INLINE boolean IfxCcu6_getDeadTimeStatus(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Indicate the status of the dead time generation for each compare channel (0, 1, 2) of timer T12...
Definition: IfxCcu6.h:1647
IfxCcu6_T13TriggerEvent_onCCPOSxEdge
set T13R on any edge of inputs CCPOSx
Definition: IfxCcu6.h:329
IfxCcu6_InterruptSource
IfxCcu6_InterruptSource
Interrupt source selection Description in Ifx_CCU.IEN.
Definition: IfxCcu6.h:179
IfxCcu6_InterruptSource_wrongHallEvent
Interrupt enable for wrong hall event.
Definition: IfxCcu6.h:199
IfxCcu6_MultiChannelSwitchingSelect
IfxCcu6_MultiChannelSwitchingSelect
Selection of the trigger request source (next multi-channel event) for the shadow transfer MCM_ST fro...
Definition: IfxCcu6.h:205
IfxCcu6_TrapMode_manual
Bit TRPF stays 0, It has to be cleared by SW by writing ISR.RTRPF = 1.
Definition: IfxCcu6.h:384
IfxCcu6_getCaptureShadowRegisterValue
IFX_EXTERN uint32 IfxCcu6_getCaptureShadowRegisterValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the capture shadow register value of the selected channel.
Definition: IfxCcu6.c:181
IfxCcu6_disableDeadTime
IFX_INLINE void IfxCcu6_disableDeadTime(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Disables the dead time generation for each compare channel (0, 1, 2) of Timer12.
Definition: IfxCcu6.h:1451
IfxCcu6_Cout63_Out
COUT63 pin mapping structure.
Definition: IfxCcu6_PinMap.h:176
IfxCcu6_setT13TriggerEventMode
IFX_INLINE void IfxCcu6_setT13TriggerEventMode(Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerEvent mode)
Sets the trigger event to start Timer13 (automatic set of T13R for synchronization to Timer12 compare...
Definition: IfxCcu6.h:2121
IfxCcu6_Cc60_Out
CC60 pin mapping structure.
Definition: IfxCcu6_PinMap.h:128
IfxCcu6_InterruptSource_t13CompareMatch
Interrupt enable for T13 compare-match.
Definition: IfxCcu6.h:195
IfxCcu6_HallSensorTriggerMode_cM61CountingUp
A T12 Compare-Match of compare channel CC61 while counting up (CM_61 and CDIR = 0) ...
Definition: IfxCcu6.h:172
IfxCcu6_InterruptSource_trap
Interrupt enable for trap flag.
Definition: IfxCcu6.h:197
IfxCcu6_enableTimer
IFX_INLINE void IfxCcu6_enableTimer(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Sets Timer12 block available, A write access to T12PR is executed.
Definition: IfxCcu6.h:1626
IfxCcu6_setCaptureCompareInputSignal
IFX_INLINE void IfxCcu6_setCaptureCompareInputSignal(Ifx_CCU6 *ccu6, IfxCcu6_CaptureCompareInput input, IfxCcu6_CaptureCompareInputSignal signal)
selects the actual input signal for the capture compare inputs.
Definition: IfxCcu6.h:1950
IfxCcu6_T12ChannelMode_multiInputCaptureRisingAndFalling
CC6xIN rising edge: T12 stored in CC6xR, CCPOSx falling edge: T12 stored in CC6xSR.
Definition: IfxCcu6.h:278
IfxCcu6_setT12ChannelMode
IFX_INLINE void IfxCcu6_setT12ChannelMode(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, IfxCcu6_T12ChannelMode mode)
Sets the operating mode of the Timer12 capture/compare channels.
Definition: IfxCcu6.h:2071
IfxCcu6_CaptureCompareState_clear
Bit CC6xST is cleared.
Definition: IfxCcu6.h:104
IfxCcu6_ChannelOut
IfxCcu6_ChannelOut
Capture compare output pins.
Definition: IfxCcu6.h:110
IfxCcu6_TrapMode_automatic
Bit TRPF is cleared by HW.
Definition: IfxCcu6.h:383
IfxCcu6_enableMultiChannelT13UpcountingShadowTransfer
IFX_INLINE void IfxCcu6_enableMultiChannelT13UpcountingShadowTransfer(Ifx_CCU6 *ccu6)
Enables the shadow transfer T13_ST if flag MCMOUT.R is set or becomes set while a T13 period match is...
Definition: IfxCcu6.h:1597
IfxCcu6_InterruptSource_cc60RisingEdge
Capture compare match rising edge interrupt enable for channel CC60.
Definition: IfxCcu6.h:181
IfxCcu6_disableInterrupt
IFX_INLINE void IfxCcu6_disableInterrupt(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Disables the selected interrupt.
Definition: IfxCcu6.h:1465
IfxCcu6_disableMultiChannelMode
IFX_INLINE void IfxCcu6_disableMultiChannelMode(Ifx_CCU6 *ccu6)
Sets multi channel mode unavailable, A write access to MCMOUTS is ignored.
Definition: IfxCcu6.h:1472
IfxCcu6_TimerRunStatus_stopped
Timer T1x is stopped.
Definition: IfxCcu6.h:374
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:140
IfxCcu6_CaptureCompareInput_cTRAP
CTRAP input.
Definition: IfxCcu6.h:83
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxCcu6_Ctrap_In
CTRAP pin mapping structure.
Definition: IfxCcu6_PinMap.h:104
IfxCcu6_ServiceRequest_2
Service request output SR2.
Definition: IfxCcu6.h:234
IfxCcu6_InterruptSource_cc61FallingEdge
Capture compare match falling edge interrupt enable for channel CC61.
Definition: IfxCcu6.h:187
IfxCcu6_CaptureCompareInputSignal
IfxCcu6_CaptureCompareInputSignal
Selection of actual input signal for the capture compare inputs.
Definition: IfxCcu6.h:91
IfxCcu6_getT12CaptureCompareState
IFX_INLINE boolean IfxCcu6_getT12CaptureCompareState(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the state of the Timer12 capture/compare channels CC6xST (x = 0, 1, 2)
Definition: IfxCcu6.h:1690
float32
float float32
Definition: Platform_Types.h:170
IfxCcu6_MultiChannelSwitchingSelect_t12OneMatch
T12 one-match (while counting down)
Definition: IfxCcu6.h:210
IfxCcu6_HallSensorTriggerMode_t12PMCountingUp
A T12 Period-Match while counting up (T12_PM and CDIR = 0)
Definition: IfxCcu6.h:170
IfxCcu6_MultiChannelSwitchingSync_direct
Direct, the trigger event immediately leads to the shadow transfer.
Definition: IfxCcu6.h:221
Ifx_Assert.h
Assert functions.
IfxCcu6_TimerInputSignal_a
defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input.
Definition: IfxCcu6.h:359
IfxCcu6_SleepMode_enable
enables sleep mode
Definition: IfxCcu6.h:243
IfxCcu6_InterruptSource_cc60FallingEdge
Capture compare match falling edge interrupt enable for channel CC60.
Definition: IfxCcu6.h:183
IfxCcu6_setDeadTimeValue
IFX_INLINE void IfxCcu6_setDeadTimeValue(Ifx_CCU6 *ccu6, uint8 value)
Sets the delay between switching from the passive state to the active state of the selected outputs (...
Definition: IfxCcu6.h:1972
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:322
IfxCcu6_Cc60in_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxCcu6_PinMap.h:60
IfxCcu6_HallSensorTriggerMode
IfxCcu6_HallSensorTriggerMode
Defines the source for the sampling of the Hall input pattern and the comparison to the current and t...
Definition: IfxCcu6.h:163
IfxCcu6_T13TriggerEvent_onT12Period
set T13R upon a period-match of T12
Definition: IfxCcu6.h:326
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxCcu6_initCc62OutPin
IFX_INLINE void IfxCcu6_initCc62OutPin(const IfxCcu6_Cc62_Out *cc62Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC62 output pin.
Definition: IfxCcu6.h:1789
IfxCcu6_T12CountDirection
IfxCcu6_T12CountDirection
Counting direction of Timer12 Definition in Ifx_CCU.TCTR0.B.CDIR.
Definition: IfxCcu6.h:288
IfxCcu6_getShadowTransferStatus
IFX_INLINE boolean IfxCcu6_getShadowTransferStatus(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Returns the Timer (T12 / T13) shadow transfer enable status.
Definition: IfxCcu6.h:1682
IfxSrc.h
SRC basic functionality.
IfxCcu6_initCout61Pin
IFX_INLINE void IfxCcu6_initCout61Pin(const IfxCcu6_Cout61_Out *cout61, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT61 output pin.
Definition: IfxCcu6.h:1848
IfxCcu6_getAddress
IFX_EXTERN Ifx_CCU6 * IfxCcu6_getAddress(IfxCcu6_Index ccu6)
Returns the module index of the selected CCU6 module.
Definition: IfxCcu6.c:158
IfxCcu6_MultiChannelSwitchingSelect_t13PeriodMatch
T13 period-match detected (while counting up)
Definition: IfxCcu6.h:209
IfxCcu6_CaptureCompareInputSignal_a
defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input.
Definition: IfxCcu6.h:93
IfxCcu6_routeInterruptNode
IFX_EXTERN void IfxCcu6_routeInterruptNode(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source, IfxCcu6_ServiceRequest serviceRequest)
Routes the interrupt node pointer to the selected service requests.
Definition: IfxCcu6.c:254
IfxCcu6_enableMultiChannelMode
IFX_INLINE void IfxCcu6_enableMultiChannelMode(Ifx_CCU6 *ccu6)
Sets multi channel mode available, A write access to MCMOUTS is executed.
Definition: IfxCcu6.h:1567
IfxCcu6_T13TriggerDirection
IfxCcu6_T13TriggerDirection
Delivers additional information to control the automatic set of bit T13R in the case that the trigger...
Definition: IfxCcu6.h:308
IfxCcu6_T12CountMode_centerAligned
T12 counts down after detecting a period-match and counts up after detecting a one-match.
Definition: IfxCcu6.h:301
IfxCcu6_TimerInputSignal_c
defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input.
Definition: IfxCcu6.h:361
IfxCcu6_initCc61InPinWithPadLevel
IFX_INLINE void IfxCcu6_initCc61InPinWithPadLevel(const IfxCcu6_Cc61in_In *cc61In, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CC61 pin direction as input and configuring pad driver...
Definition: IfxCcu6.h:1759
IfxCcu6_initCc62InPin
IFX_INLINE void IfxCcu6_initCc62InPin(const IfxCcu6_Cc62in_In *cc62In, IfxPort_InputMode inputMode)
Initialises a CC62 input pin.
Definition: IfxCcu6.h:1774
IfxCpu_Intrinsics.h
IfxCcu6_T13TriggerEvent_onCC60RCompare
set T13R on a T12 compare event on channel 0
Definition: IfxCcu6.h:322
IfxCcu6_TimerId_t13
Timer 13.
Definition: IfxCcu6.h:337
IfxCcu6_ChannelOut_cc1
CC61 compare output CC1.
Definition: IfxCcu6.h:114
IfxCcu6_disableTimer
IFX_INLINE void IfxCcu6_disableTimer(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Sets Timer12 block unavailable, A write access to T12PR is ignored.
Definition: IfxCcu6.h:1501
IfxCcu6_InterruptSource_cc61RisingEdge
Capture compare match rising edge interrupt enable for channel CC61.
Definition: IfxCcu6.h:185
IfxCcu6_getTimerAvailabilityStatus
IFX_INLINE boolean IfxCcu6_getTimerAvailabilityStatus(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
indicates the Timer blocks (T12 / T13) availability
Definition: IfxCcu6.h:1715
IfxCcu6_setSingleShotModeEnable
IFX_INLINE void IfxCcu6_setSingleShotModeEnable(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Enables / Disables the single shot mode of Timers (T12, T13 individually or together based on the sel...
Definition: IfxCcu6.h:2041
IfxCcu6_disableModule
IFX_EXTERN void IfxCcu6_disableModule(Ifx_CCU6 *ccu6)
Disables the selected CCU6 kernel.
Definition: IfxCcu6.c:101
IfxCcu6_HallSensorTriggerMode_cM63
A T13 Compare-Match.
Definition: IfxCcu6.h:167
IfxCcu6_CaptureCompareInputSignal_b
defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input.
Definition: IfxCcu6.h:94
IfxCcu6_setTrapState
IFX_INLINE void IfxCcu6_setTrapState(Ifx_CCU6 *ccu6, IfxCcu6_TrapState state)
Sets behaviour of the selected outputs when leaving the trap state after the trap condition has becom...
Definition: IfxCcu6.h:2133
IfxCcu6_disableSingleShotMode
IFX_INLINE void IfxCcu6_disableSingleShotMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Disables the single shot-mode of Timers (T12 T13).
Definition: IfxCcu6.h:1488
IfxCcu6_ExternalTriggerMode_anyEdge
Bit T1xR is set if an edge of signal T1xHR is detected.
Definition: IfxCcu6.h:156
IfxCcu6_Cc60_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxCcu6_PinMap.h:132
IfxCcu6_isT13CompareNotification
IFX_INLINE boolean IfxCcu6_isT13CompareNotification(Ifx_CCU6 *ccu6)
Returns the status of T13 compare notification.
Definition: IfxCcu6.h:1944
IfxCcu6_setT12CounterValue
IFX_INLINE void IfxCcu6_setT12CounterValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit counter value of Timer12.
Definition: IfxCcu6.h:2085
IfxCcu6_setT12Frequency
IFX_EXTERN float32 IfxCcu6_setT12Frequency(Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period, IfxCcu6_T12CountMode countMode)
Sets the frequency and clock input of the Timer 12. Caution: If desired frequency cannot achieved (by...
Definition: IfxCcu6.c:337
IfxPort_setPinModeInput
IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode.
Definition: IfxPort.h:669
IfxCcu6_T12ChannelMode_compareMode
Compare mode.
Definition: IfxCcu6.h:270
IfxCcu6_TimerInputSignal_h
defines the input signal used as T1xHR input.
Definition: IfxCcu6.h:366
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxCcu6_enableShadowTransfer
IFX_INLINE void IfxCcu6_enableShadowTransfer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Enables shadow transfers of the timers (T12, T13 individually or together based on the selection) ...
Definition: IfxCcu6.h:1603
IfxCcu6_setHallSensorTriggerMode
IFX_INLINE void IfxCcu6_setHallSensorTriggerMode(Ifx_CCU6 *ccu6, IfxCcu6_HallSensorTriggerMode mode)
Sets source for the sampling of the Hall input pattern and the comparison to the current and the expe...
Definition: IfxCcu6.h:1992
IfxCcu6_SleepMode
IfxCcu6_SleepMode
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_CCU6.CLC.B.EDIS.
Definition: IfxCcu6.h:241
IfxCcu6_getHallPatternSampleState
IFX_INLINE boolean IfxCcu6_getHallPatternSampleState(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the value of the input Hall pattern of the Timer12 capture/compare channels CC6POS6x (x = 0...
Definition: IfxCcu6.h:1655
IfxScuWdt.h
SCU basic functionality.
IfxCcu6_Cc60in_In::module
Ifx_CCU6 * module
Base address.
Definition: IfxCcu6_PinMap.h:58
IfxCcu6_setInterruptStatusFlag
IFX_INLINE void IfxCcu6_setInterruptStatusFlag(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Sets the selected interrupt flag.
Definition: IfxCcu6.h:2008
IfxCcu6_initCout60Pin
IFX_INLINE void IfxCcu6_initCout60Pin(const IfxCcu6_Cout60_Out *cout60, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT60 output pin.
Definition: IfxCcu6.h:1841
IfxCcu6_getT12CountDirection
IFX_INLINE IfxCcu6_T12CountDirection IfxCcu6_getT12CountDirection(Ifx_CCU6 *ccu6)
Returns the current counting direction of Timer12.
Definition: IfxCcu6.h:1697
IfxCcu6_T12ChannelMode_multiInputCaptureBothRising
CC6xIN rising edge: T12 stored in CC6xR, CCPOSx rising edge: T12 stored in CC6xSR.
Definition: IfxCcu6.h:280
IfxCcu6_T12ChannelMode_multiInputCaptureBothFalling
CC6xIN falling edge: T12 stored in CC6xR, CCPOSx falling edge: T12 stored in CC6xSR.
Definition: IfxCcu6.h:281
IfxCcu6_CaptureCompareState_toggle
Bit CC6xST is toggled.
Definition: IfxCcu6.h:105
IfxCcu6_TimerRunStatus
IfxCcu6_TimerRunStatus
Timer (T12 / T13) run status Definition in Ifx_CCU.TCTR0.B.T12R and Ifx_CCU.TCTR0.B.T13R.
Definition: IfxCcu6.h:372
IfxCcu6_setSleepMode
IFX_INLINE void IfxCcu6_setSleepMode(Ifx_CCU6 *ccu6, IfxCcu6_SleepMode mode)
Sets the sensitivity of the module to sleep signal.
Definition: IfxCcu6.h:2051
IfxCcu6_T12ChannelMode_doubleRegisterCaptureRisingAndFalling
CC6xIN rising edge: T12 stored in CC6xR, falling edge: T12 stored in CC6xSR.
Definition: IfxCcu6.h:271
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxCcu6_MultiChannelSwitchingSync_t13ZeroMatch
A T13 zero-match triggers the shadow transfer.
Definition: IfxCcu6.h:223
IfxCcu6_TimerInputSignal_e
defines the input signal used as T1xHR input.
Definition: IfxCcu6.h:363
IfxCcu6_Cout62_Out
COUT62 pin mapping structure.
Definition: IfxCcu6_PinMap.h:168
IfxCcu6_CaptureCompareInput_cCPOS1
CCPOS1 input.
Definition: IfxCcu6.h:85
IfxCcu6_CaptureCompareInput_cC61
CC61 capture input.
Definition: IfxCcu6.h:81
IfxCcu6_CountingInputMode_externalRising
The timer T1x is counting each rising edge detected in the selected T1xHR signal. ...
Definition: IfxCcu6.h:130
IfxCcu6_HallSensorTriggerMode_cM61CountingDown
A T12 Compare-Match of compare channel CC61 while counting down (CM_61 and CDIR = 1) ...
Definition: IfxCcu6.h:173
IfxCcu6_TimerInputSignal_f
defines the input signal used as T1xHR input.
Definition: IfxCcu6.h:364
IfxCcu6_enableSingleShotMode
IFX_INLINE void IfxCcu6_enableSingleShotMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Enables the single shot-mode of Timers (T12 T13).
Definition: IfxCcu6.h:1613
IfxCcu6_Ccpos0_In
CCPOS0 pin mapping structure.
Definition: IfxCcu6_PinMap.h:80
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxCcu6_T13TriggerDirection_anyT12
independent on the count direction of T12
Definition: IfxCcu6.h:313
IfxCcu6_enableInterrupt
IFX_INLINE void IfxCcu6_enableInterrupt(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Enables the selected interrupt.
Definition: IfxCcu6.h:1560
IfxCcu6_T13TriggerEvent_onT12Zero
set T13R upon a zero-match of T12 (while counting up)
Definition: IfxCcu6.h:327
IfxCcu6_T13TriggerEvent_onCC62RCompare
set T13R on a T12 compare event on channel 2
Definition: IfxCcu6.h:324
IfxCcu6_ChannelOut_cc0
CC60 compare output CC0.
Definition: IfxCcu6.h:112
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxCcu6_ChannelOut_cout2
CC62 compare output COUT2.
Definition: IfxCcu6.h:117
IfxCcu6_TimerInputClock_fcc6By128
fcc6 / 128
Definition: IfxCcu6.h:352
IfxCcu6_CountingInputMode
IfxCcu6_CountingInputMode
Defines the input event leading to a counting action of the timer (T12 / T13) Definition in Ifx_CCU...
Definition: IfxCcu6.h:124
IfxCcu6_TimerInputClock_fcc6By16
fcc6 / 16
Definition: IfxCcu6.h:349
IfxCcu6_TimerId_t12
Timer 12.
Definition: IfxCcu6.h:336
IfxCcu6_CaptureCompareInput_cCPOS2
CCPOS2 input.
Definition: IfxCcu6.h:86
IfxCcu6_cfg.h
CCU6 on-chip implementation data.
IfxCcu6_TrapState_t13Sync
The trap state is left when a zeromatch of T13 is detected.
Definition: IfxCcu6.h:395
IfxCcu6_setTrapMode
IFX_INLINE void IfxCcu6_setTrapMode(Ifx_CCU6 *ccu6, IfxCcu6_TrapMode mode)
Sets the mode of clearing the trap flag TRPF after the trap input condition is no longer valid...
Definition: IfxCcu6.h:2127
IfxCcu6_setMultiChannelSwitchingMode
IFX_INLINE void IfxCcu6_setMultiChannelSwitchingMode(Ifx_CCU6 *ccu6, IfxCcu6_MultiChannelSwitchingSelect mode)
Sets the trigger request source (next multi-channel event) for the shadow transfer MCM_ST from MCMPS ...
Definition: IfxCcu6.h:2021
IfxCcu6_ExternalTriggerMode_risingEdge
Bit T1xR is set if a rising edge of signal T1xHR is detected.
Definition: IfxCcu6.h:152
IfxCcu6_TimerInputSignal_g
defines the input signal used as T1xHR input.
Definition: IfxCcu6.h:365
IfxCcu6_CaptureCompareState_set
Bit CC6xST is set.
Definition: IfxCcu6.h:103
IfxCcu6_getT13CaptureCompareState
IFX_INLINE boolean IfxCcu6_getT13CaptureCompareState(Ifx_CCU6 *ccu6)
Returns the state of the Timer13 capture/compare channel CC63ST.
Definition: IfxCcu6.h:1709
IfxCcu6_ChannelOut_cout3
CC63 compare output COUT3.
Definition: IfxCcu6.h:118
IfxCcu6_T12CountDirection_down
Counting down.
Definition: IfxCcu6.h:291
IfxCcu6_setT13InputSignal
IFX_EXTERN void IfxCcu6_setT13InputSignal(Ifx_CCU6 *ccu6, IfxCcu6_T13hr_In *extInput)
selects the actual input signal for the timer inputs.
Definition: IfxCcu6.c:470
IfxCcu6_isModuleSuspended
IFX_INLINE boolean IfxCcu6_isModuleSuspended(Ifx_CCU6 *ccu6)
Returns the module&#39;s suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspende...
Definition: IfxCcu6.h:1920
IfxCcu6_setT12CountMode
IFX_INLINE void IfxCcu6_setT12CountMode(Ifx_CCU6 *ccu6, IfxCcu6_T12CountMode mode)
Definition: IfxCcu6.h:2079
IfxCcu6_TimerInputClock_fcc6By32
fcc6 / 32
Definition: IfxCcu6.h:350
IfxCcu6_T13TriggerDirection_noAction
no action
Definition: IfxCcu6.h:310
IfxCcu6_readTimer
IFX_EXTERN uint32 IfxCcu6_readTimer(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Returns the current value of the timer register.
Definition: IfxCcu6.c:218
IfxCcu6_Cout60_Out
COUT60 pin mapping structure.
Definition: IfxCcu6_PinMap.h:152
IfxCcu6_HallSensorTriggerMode_off
Hall sampling triggered by HW sources is switched off.
Definition: IfxCcu6.h:169
IfxCcu6_initCc60OutPin
IFX_INLINE void IfxCcu6_initCc60OutPin(const IfxCcu6_Cc60_Out *cc60Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC60 output pin.
Definition: IfxCcu6.h:1745
IfxCcu6_enableMultiChannelModeAvailability
IFX_INLINE void IfxCcu6_enableMultiChannelModeAvailability(Ifx_CCU6 *ccu6)
Enables the Multi Channel Mode Availability.
Definition: IfxCcu6.h:1573
IfxCcu6_T12Channel
IfxCcu6_T12Channel
Capture compare channel of Timer12.
Definition: IfxCcu6.h:258
IfxCcu6_InterruptSource_t12OneMatch
Interrupt enable for T12 one-match.
Definition: IfxCcu6.h:193
IfxCcu6_T12ChannelMode
IfxCcu6_T12ChannelMode
The operating mode for the T12 channels are defined by the bit fields Ifx_CCU.T12MSEL.MSEL6x.
Definition: IfxCcu6.h:267
IfxCcu6_initCc61InPin
IFX_INLINE void IfxCcu6_initCc61InPin(const IfxCcu6_Cc61in_In *cc61In, IfxPort_InputMode inputMode)
Initialises a CC61 input pin.
Definition: IfxCcu6.h:1752
IfxCcu6_enableMultiChannelPwmPatternShadowTransfer
IFX_INLINE void IfxCcu6_enableMultiChannelPwmPatternShadowTransfer(Ifx_CCU6 *ccu6)
Sets MCM_ST immediately to update bit field MCMP by the value of MCMPS.
Definition: IfxCcu6.h:1579
IfxCcu6_PinMap.h
CCU6 I/O map.
IfxCcu6_enableHallPatternShadowTransfer
IFX_INLINE void IfxCcu6_enableHallPatternShadowTransfer(Ifx_CCU6 *ccu6)
Sets HP_ST immediately to update bit fields EXPH and CURH by EXPHS and CURHS.
Definition: IfxCcu6.h:1554
IfxCcu6_disableT13InvertedModulation
IFX_INLINE void IfxCcu6_disableT13InvertedModulation(Ifx_CCU6 *ccu6)
Disables the Inversion of T13 signal for the modulation of the CC6x and COUT6x (x = 0...
Definition: IfxCcu6.h:1495
IfxCcu6_MultiChannelSwitchingSelect_correctHallEvent
Correct Hall pattern detected (CM_CHE)
Definition: IfxCcu6.h:208
IfxCcu6_T13TriggerEvent_onCC61RCompare
set T13R on a T12 compare event on channel 1
Definition: IfxCcu6.h:323
IfxCcu6_ServiceRequest
IfxCcu6_ServiceRequest
Selection of service request outputs.
Definition: IfxCcu6.h:230
IfxCcu6_T13TriggerEvent
IfxCcu6_T13TriggerEvent
Selects the trigger event to start T13 (automatic set of T13R for synchronization to T12 compare sign...
Definition: IfxCcu6.h:319
IfxCcu6_CountingInputMode_internal
The T1x prescaler generates the counting events, Bit TCTR4.T1xCNT is not taken into account...
Definition: IfxCcu6.h:126
IfxCcu6_TimerId
IfxCcu6_TimerId
Timer number ( T12 / T13 )
Definition: IfxCcu6.h:334
IfxCcu6_T13TriggerEvent_onAnyT12Compare
set T13R on any T12 compare event (ch. 0, 1, 2)
Definition: IfxCcu6.h:325
IfxCcu6_isModuleEnabled
IFX_INLINE boolean IfxCcu6_isModuleEnabled(Ifx_CCU6 *ccu6)
Returns the status of module enabled or disabled.
Definition: IfxCcu6.h:1914
IfxCcu6_T12ChannelMode_doubleRegisterCaptureRising
CC6xIN rising edge: CC6nSR stored in CC6xR, falling edge: T12 stored in CC6xSR.
Definition: IfxCcu6.h:272
IfxCcu6_T12ChannelMode_off
Capture/Compare modes switched off.
Definition: IfxCcu6.h:269
IfxCcu6_initT13hrPinWithPadLevel
IFX_INLINE void IfxCcu6_initT13hrPinWithPadLevel(const IfxCcu6_T13hr_In *t13hrIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of T13HR pin direction as input and configuring pad driver...
Definition: IfxCcu6.h:1906
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:249
IfxCcu6_TrapState_t12Sync
The trap state is left when a zero-match of T12 (while counting up) is detected.
Definition: IfxCcu6.h:393
IfxCcu6_getMultiChannelPWMPatternShadowTransferStatus
IFX_INLINE boolean IfxCcu6_getMultiChannelPWMPatternShadowTransferStatus(Ifx_CCU6 *ccu6)
Gets the status of the shadow transfer request from MCMPS to MCMP.
Definition: IfxCcu6.h:1676
IfxCcu6_initCtrapPinWithPadLevel
IFX_INLINE void IfxCcu6_initCtrapPinWithPadLevel(const IfxCcu6_Ctrap_In *ctrap, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CTRAP pin direction as input and configuring pad driver...
Definition: IfxCcu6.h:1876
IfxCcu6_DelayBypass_active
Dead-Time Counter 0 is not used for a delay.
Definition: IfxCcu6.h:143
IfxCcu6_T13TriggerDirection_onT12CountingUp
while T12 is counting up
Definition: IfxCcu6.h:311
IfxCcu6_clearInterruptStatusFlag
IFX_INLINE void IfxCcu6_clearInterruptStatusFlag(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Clears the selected interrupt flag.
Definition: IfxCcu6.h:1418
IfxCcu6_getInterruptStatusFlag
IFX_INLINE boolean IfxCcu6_getInterruptStatusFlag(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Gets the status of the selected interrupt flag.
Definition: IfxCcu6.h:1663
IfxCcu6_enableCountEvent
IFX_INLINE void IfxCcu6_enableCountEvent(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Sets the single shot-mode of Timers (T12, T13).
Definition: IfxCcu6.h:1530
IfxCcu6_TimerInputClock_fcc6By4
fcc6 / 4
Definition: IfxCcu6.h:347
IfxCcu6_T12ChannelMode_doubleRegisterCaptureFalling
CC6xIN rising edge: CC6nSR stored in CC6xR, falling edge: T12 stored in CC6xSR.
Definition: IfxCcu6.h:273
IfxCcu6_initCcpos2Pin
IFX_INLINE void IfxCcu6_initCcpos2Pin(const IfxCcu6_Ccpos2_In *ccpos2, IfxPort_InputMode inputMode)
Initialises a CCPOS0 input pin.
Definition: IfxCcu6.h:1826
IfxCcu6_HallSensorTriggerMode_t13PM
A T13 Period-Match.
Definition: IfxCcu6.h:168
IfxCcu6_SuspendMode_hard
Hard Suspend.
Definition: IfxCcu6.h:252
IfxCcu6_initT12hrPin
IFX_INLINE void IfxCcu6_initT12hrPin(const IfxCcu6_T12hr_In *t12hrIn, IfxPort_InputMode inputMode)
Initialises a T12HR input pin.
Definition: IfxCcu6.h:1884
IfxCcu6_T12CountMode
IfxCcu6_T12CountMode
Operating mode of Timer 12 Definition in Ifx_CCU.TCTR0.B.CTM.
Definition: IfxCcu6.h:297
IfxCcu6_setSuspendMode
IFX_INLINE void IfxCcu6_setSuspendMode(Ifx_CCU6 *ccu6, IfxCcu6_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and...
Definition: IfxCcu6.h:2060
IfxCcu6_setT12CompareValue
IFX_EXTERN void IfxCcu6_setT12CompareValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, uint16 value)
Sets the 16-bit compare value of Timer12 (writes into shadow registers)
Definition: IfxCcu6.c:331
IfxCcu6_Cc61_Out
CC61 pin mapping structure.
Definition: IfxCcu6_PinMap.h:136
IfxCcu6_setCurrentHallPattern
IFX_INLINE void IfxCcu6_setCurrentHallPattern(Ifx_CCU6 *ccu6, uint8 pattern)
Sets the current hall pattern for the multichannel mode (writes into shadow register) ...
Definition: IfxCcu6.h:1966
IfxCcu6_TimerInputClock_fcc6By2
fcc6 / 2
Definition: IfxCcu6.h:346
IfxCcu6_ChannelOut_cc2
CC62 compare output CC2.
Definition: IfxCcu6.h:116
IfxCcu6_enableTrapPin
IFX_INLINE void IfxCcu6_enableTrapPin(Ifx_CCU6 *ccu6)
Enables the input (pin) function for the trap generation.
Definition: IfxCcu6.h:1641
IfxCcu6_disableModulationOutput
IFX_EXTERN void IfxCcu6_disableModulationOutput(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut)
Disables the modulation of the corresponding output signal by PWM pattern generated by the timers T12...
Definition: IfxCcu6.c:70
IfxCcu6_MultiChannelSwitchingSelect_t12Channel1CompareMatch
T12 channel 1 compare-match detected (phase delay function)
Definition: IfxCcu6.h:211
IfxCcu6_clearT12OneNotification
IFX_INLINE void IfxCcu6_clearT12OneNotification(Ifx_CCU6 *ccu6)
Clears the T12 One notification.
Definition: IfxCcu6.h:1425
IfxCcu6_disableTrap
IFX_INLINE void IfxCcu6_disableTrap(Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut)
Disables the trap functionality for the corresponding output signals.
Definition: IfxCcu6.h:1508
IfxCcu6_TrapState
IfxCcu6_TrapState
Defines the behavior of the selected outputs when leaving the trap state, after the trap condition ha...
Definition: IfxCcu6.h:391
IfxCcu6_setT12CaptureCompareState
IFX_EXTERN void IfxCcu6_setT12CaptureCompareState(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, IfxCcu6_CaptureCompareState state)
Sets software-control (independent set and clear conditions) for the Timer12 channel state bits CC6xS...
Definition: IfxCcu6.c:306
IfxCcu6_setCountingInputMode
IFX_INLINE void IfxCcu6_setCountingInputMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_CountingInputMode mode)
Sets the input event leading to a counting action of Timers (T12 / T13).
Definition: IfxCcu6.h:1958
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:151
IfxCcu6_CountingInputMode_manual
Bit TCTR4.T1xCNT written with 1 is a counting event. The T1x prescaler is not taken into account...
Definition: IfxCcu6.h:128
IfxCcu6_TimerInputClock_fcc6By8
fcc6 / 8
Definition: IfxCcu6.h:348
IfxCcu6_setT13CounterValue
IFX_INLINE void IfxCcu6_setT13CounterValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit counter value of Timer13.
Definition: IfxCcu6.h:2103
IfxCcu6_ExternalTriggerMode
IfxCcu6_ExternalTriggerMode
Defines the event of signal T1xHR that can set the run bit T1xR by HW Definition in Ifx_CCU...
Definition: IfxCcu6.h:149
IfxCcu6_DelayBypass_notActive
Dead-Time Counter 0 is generating a delay after the source signal becomes active. ...
Definition: IfxCcu6.h:141
IfxCcu6_ChannelOut_cout0
CC60 compare output COUT0.
Definition: IfxCcu6.h:113
IfxCcu6_SuspendMode_none
No suspend.
Definition: IfxCcu6.h:251
IfxCcu6_T12hr_In
T12HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:112
IfxCcu6_enableT13InvertedModulation
IFX_INLINE void IfxCcu6_enableT13InvertedModulation(Ifx_CCU6 *ccu6)
Enables the Inversion of T13 signal for the modulation of the CC6x and COUT6x (x = 0...
Definition: IfxCcu6.h:1620
IfxCcu6_initCcpos2PinWithPadLevel
IFX_INLINE void IfxCcu6_initCcpos2PinWithPadLevel(const IfxCcu6_Ccpos2_In *ccpos2, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CCPOS2 pin direction as input and configuring pad driver...
Definition: IfxCcu6.h:1833
IfxCcu6_T13hr_In
T13HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:120
IfxCcu6_T13TriggerEvent_noAction
no action
Definition: IfxCcu6.h:321
IfxCcu6_TrapMode
IfxCcu6_TrapMode
Defines how the trap flag TRPF can be cleared after the trap input condition is no longer valid (eith...
Definition: IfxCcu6.h:381
IfxCcu6_MultiChannelSwitchingSync_t12ZeroMatch
A T12 zero-match (while counting up) triggers the shadow transfer.
Definition: IfxCcu6.h:224
IfxCcu6_initT13hrPin
IFX_INLINE void IfxCcu6_initT13hrPin(const IfxCcu6_T13hr_In *t13hrIn, IfxPort_InputMode inputMode)
Initialises a T13HR input pin.
Definition: IfxCcu6.h:1899
IfxCcu6_getIndex
IFX_EXTERN IfxCcu6_Index IfxCcu6_getIndex(Ifx_CCU6 *ccu6)
Returns CCU6 index.
Definition: IfxCcu6.c:187
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxCcu6_T12ChannelMode_doubleRegisterCaptureAny
CC6xIN any active edge: CC6nSR stored in CC6xR, any active edge: T12 stored in CC6xSR.
Definition: IfxCcu6.h:274
IfxCcu6_T12ChannelMode_multiInputCaptureFallingAndRising
CC6xIN falling edge: T12 stored in CC6xR, CCPOSx rising edge: T12 stored in CC6xSR.
Definition: IfxCcu6.h:279
IfxCcu6_updateHallPattern
IFX_INLINE void IfxCcu6_updateHallPattern(Ifx_CCU6 *ccu6, uint8 currentHall, uint8 expectedHall, uint8 output)
Updates the hall pattern (current hall, expected hall, moduleation output), in a single write...
Definition: IfxCcu6.h:2160
IfxCcu6_setInputClockFrequency
IFX_INLINE void IfxCcu6_setInputClockFrequency(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_TimerInputClock frequency)
Sets the input clock for timers (T12 or T13)
Definition: IfxCcu6.h:2000
IfxCcu6_setExpectedHallPattern
IFX_INLINE void IfxCcu6_setExpectedHallPattern(Ifx_CCU6 *ccu6, uint8 pattern)
Sets the expected hall pattern for the multichannel mode (writes into shadow register) ...
Definition: IfxCcu6.h:1978
IfxCcu6_connectTrigger
IFX_EXTERN void IfxCcu6_connectTrigger(Ifx_CCU6 *ccu6, IfxCcu6_TrigOut outputLine, IfxCcu6_TrigSel selectedTrigger)
Definition: IfxCcu6.c:53
IfxCcu6_isT12PeriodNotification
IFX_INLINE boolean IfxCcu6_isT12PeriodNotification(Ifx_CCU6 *ccu6)
Returns the status of T12 period notification.
Definition: IfxCcu6.h:1938
IfxCcu6_initCc62InPinWithPadLevel
IFX_INLINE void IfxCcu6_initCc62InPinWithPadLevel(const IfxCcu6_Cc62in_In *cc62In, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CC62 pin direction as input and configuring pad driver...
Definition: IfxCcu6.h:1781
IfxCcu6_InterruptSource_t12PeriodMatch
Interrupt enable for T12 period-match.
Definition: IfxCcu6.h:194
IfxCcu6_T12Channel_0
T12 channel CC60.
Definition: IfxCcu6.h:260
IfxCcu6_enableMultiChannelT12DowncountingShadowTransfer
IFX_INLINE void IfxCcu6_enableMultiChannelT12DowncountingShadowTransfer(Ifx_CCU6 *ccu6)
Enables the shadow transfer T12_ST if flag MCMOUT.R is set or becomes set while a T12 one match is de...
Definition: IfxCcu6.h:1585
IfxCcu6_T12Channel_1
T12 channel CC61.
Definition: IfxCcu6.h:261
IfxScuCcu.h
SCU basic functionality.
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:81
IfxCcu6_ServiceRequest_1
Service request output SR1.
Definition: IfxCcu6.h:233
IfxCcu6_isT12OneNotification
IFX_INLINE boolean IfxCcu6_isT12OneNotification(Ifx_CCU6 *ccu6)
Returns the status of T12 one notification.
Definition: IfxCcu6.h:1932
IfxCcu6_InterruptSource_correctHallEvent
Interrupt enable for correct hall event.
Definition: IfxCcu6.h:198
IfxCcu6_DelayBypass
IfxCcu6_DelayBypass
Controls whether the source signal for the sampling of the Hall input pattern (selected by HSYNC) is ...
Definition: IfxCcu6.h:139
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:248
IfxCcu6_clearDeadTimeCounters
IFX_INLINE void IfxCcu6_clearDeadTimeCounters(Ifx_CCU6 *ccu6)
Clears all the three dead-time counter channels to zero.
Definition: IfxCcu6.h:1412
IfxCcu6_initCout63Pin
IFX_INLINE void IfxCcu6_initCout63Pin(const IfxCcu6_Cout63_Out *cout63, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT63 output pin.
Definition: IfxCcu6.h:1862
IfxCcu6_InterruptSource_cc62RisingEdge
Capture compare match rising edge interrupt enable for channel CC62.
Definition: IfxCcu6.h:189
IfxCcu6_T13TriggerDirection_onT12CountingDown
while T12 is counting down
Definition: IfxCcu6.h:312
IfxCcu6_setT12InputSignal
IFX_EXTERN void IfxCcu6_setT12InputSignal(Ifx_CCU6 *ccu6, IfxCcu6_T12hr_In *extInput)
selects the actual input signal for the timer inputs.
Definition: IfxCcu6.c:386
IfxCcu6_initCtrapPin
IFX_INLINE void IfxCcu6_initCtrapPin(const IfxCcu6_Ctrap_In *ctrap, IfxPort_InputMode inputMode)
Initialises a CTRAP input pin.
Definition: IfxCcu6.h:1869
IfxCcu6_T12Channel_2
T12 channel CC62.
Definition: IfxCcu6.h:262
IfxCcu6_setOutputPassiveLevel
IFX_EXTERN void IfxCcu6_setOutputPassiveLevel(Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut, boolean state)
Sets the passive state level of the PWM outputs of the module.
Definition: IfxCcu6.c:291
IfxCcu6_CountingInputMode_externalFalling
The timer T1x is counting each falling edge detected in the selected T1xHR signal.
Definition: IfxCcu6.h:132
IfxCcu6_getT12TimerPointer
IFX_INLINE volatile uint32 * IfxCcu6_getT12TimerPointer(Ifx_CCU6 *ccu6)
Returns the Timer pointer.
Definition: IfxCcu6.h:1703
IfxCcu6_TrigSel
IfxCcu6_TrigSel
Definition: IfxCcu6_cfg.h:94
IfxCcu6_ExternalTriggerMode_fallingEdge
Bit T1xR is set if a falling edge of signal T1xHR is detected.
Definition: IfxCcu6.h:154
IfxCcu6_SleepMode_disable
disables sleep mode
Definition: IfxCcu6.h:244
IfxCcu6_TrapState_immediate
The trap state is left immediately without any synchronization to T12 or T13.
Definition: IfxCcu6.h:397
IfxCcu6_clearT12PeriodNotification
IFX_INLINE void IfxCcu6_clearT12PeriodNotification(Ifx_CCU6 *ccu6)
Clears the T12 period notification.
Definition: IfxCcu6.h:1431
IfxCcu6_TimerRunStatus_running
Timer T1x is running.
Definition: IfxCcu6.h:375
IfxCcu6_T12CountDirection_up
Counting up.
Definition: IfxCcu6.h:290
IfxCcu6_disableShadowTransfer
IFX_INLINE void IfxCcu6_disableShadowTransfer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Disables shadow transfers of the timers (T12, T13 individually or together based on the selection) ...
Definition: IfxCcu6.h:1478
IfxCcu6_setT13CaptureCompareState
IFX_EXTERN void IfxCcu6_setT13CaptureCompareState(Ifx_CCU6 *ccu6, IfxCcu6_CaptureCompareState state)
Sets software-control (independent set and clear conditions) for the Timer13 channel state bits CC63S...
Definition: IfxCcu6.c:395
IfxCcu6_Ccpos2_In
CCPOS2 pin mapping structure.
Definition: IfxCcu6_PinMap.h:96
IfxCcu6_setT13TriggerEventDirection
IFX_INLINE void IfxCcu6_setT13TriggerEventDirection(Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerDirection direction)
Sets the Timer13 trigger event direction.
Definition: IfxCcu6.h:2115
IfxCcu6_initT12hrPinWithPadLevel
IFX_INLINE void IfxCcu6_initT12hrPinWithPadLevel(const IfxCcu6_T12hr_In *t12hrIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of T12HR pin direction as input and configuring pad driver...
Definition: IfxCcu6.h:1891
IfxCcu6_Cout61_Out
COUT61 pin mapping structure.
Definition: IfxCcu6_PinMap.h:160
IfxCcu6_initCcpos0Pin
IFX_INLINE void IfxCcu6_initCcpos0Pin(const IfxCcu6_Ccpos0_In *ccpos0, IfxPort_InputMode inputMode)
Initialises a CCPOS0 input pin.
Definition: IfxCcu6.h:1796
IfxCcu6_initCout62Pin
IFX_INLINE void IfxCcu6_initCout62Pin(const IfxCcu6_Cout62_Out *cout62, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT62 output pin.
Definition: IfxCcu6.h:1855
IfxCcu6_setMultiChannelSwitchingSync
IFX_INLINE void IfxCcu6_setMultiChannelSwitchingSync(Ifx_CCU6 *ccu6, IfxCcu6_MultiChannelSwitchingSync sync)
Sets the synchronization mechanism of the shadow transfer event MCM_ST if it has been requested befor...
Definition: IfxCcu6.h:2027
IfxCcu6_CaptureCompareInputSignal_c
defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input.
Definition: IfxCcu6.h:95
IfxCcu6_setT13CompareValue
IFX_INLINE void IfxCcu6_setT13CompareValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit compare value of Timer13 (writes into shadow register)
Definition: IfxCcu6.h:2097
IfxCcu6_CaptureCompareState
IfxCcu6_CaptureCompareState
capture/compare state to set / clear the CC6xST-bits
Definition: IfxCcu6.h:101
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxCcu6_CaptureCompareInputSignal_d
defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input.
Definition: IfxCcu6.h:96
IfxCcu6_enableMultiChannelT12UpcountingShadowTransfer
IFX_INLINE void IfxCcu6_enableMultiChannelT12UpcountingShadowTransfer(Ifx_CCU6 *ccu6)
Enables the shadow transfer T12_ST if flag MCMOUT.R is set or becomes set while a T12 period match is...
Definition: IfxCcu6.h:1591
IfxCcu6_getTimerRunStatus
IFX_INLINE IfxCcu6_TimerRunStatus IfxCcu6_getTimerRunStatus(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Returns the Timer (T12 / T13) run status.
Definition: IfxCcu6.h:1722
IfxCcu6_CaptureCompareInput_cC60
CC60 capture input.
Definition: IfxCcu6.h:80
IfxCcu6_TrigOut
IfxCcu6_TrigOut
Definition: IfxCcu6_cfg.h:87
IfxCcu6_setT12PeriodValue
IFX_INLINE void IfxCcu6_setT12PeriodValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the period value that leads Timer12 counter value to a period-match.
Definition: IfxCcu6.h:2091
IfxCcu6_MultiChannelSwitchingSync
IfxCcu6_MultiChannelSwitchingSync
Selection of the synchronization mechanism for the shadow transfer event MCM_ST Definition in Ifx_CCU...
Definition: IfxCcu6.h:219
IfxCcu6_TimerInputClock_fcc6
fcc6
Definition: IfxCcu6.h:345
IfxCcu6_TimerInputSignal_d
defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input.
Definition: IfxCcu6.h:362
IfxCcu6_startTimer
IFX_INLINE void IfxCcu6_startTimer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
starts the timers (T12, T13 individually or together based on the selection)
Definition: IfxCcu6.h:2140
IfxCcu6_initCcpos1Pin
IFX_INLINE void IfxCcu6_initCcpos1Pin(const IfxCcu6_Ccpos1_In *ccpos1, IfxPort_InputMode inputMode)
Initialises a CCPOS1 input pin.
Definition: IfxCcu6.h:1811
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxCcu6_getMultiChannelModeAvailabilityStatus
IFX_INLINE boolean IfxCcu6_getMultiChannelModeAvailabilityStatus(Ifx_CCU6 *ccu6)
indicates if the multi-channel mode functionality is available
Definition: IfxCcu6.h:1670
IfxCcu6_SuspendMode_soft
Soft Suspend.
Definition: IfxCcu6.h:253
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
IfxCcu6_setT13PeriodValue
IFX_INLINE void IfxCcu6_setT13PeriodValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the period value that leads Timer13 counter value to a period-match.
Definition: IfxCcu6.h:2109
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxCcu6_initCc61OutPin
IFX_INLINE void IfxCcu6_initCc61OutPin(const IfxCcu6_Cc61_Out *cc61Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC61 output pin.
Definition: IfxCcu6.h:1767
IfxCcu6_TimerInputSignal_b
defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input.
Definition: IfxCcu6.h:360
IfxCcu6_MultiChannelSwitchingSelect_noEvent
No trigger request will be generated.
Definition: IfxCcu6.h:207
IfxCcu6_initCcpos1PinWithPadLevel
IFX_INLINE void IfxCcu6_initCcpos1PinWithPadLevel(const IfxCcu6_Ccpos1_In *ccpos1, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CCPOS1 pin direction as input and configuring pad driver...
Definition: IfxCcu6.h:1818
IfxCcu6_HallSensorTriggerMode_t12OMCountingDown
A T12 One-Match while counting down (T12_PM and CDIR = 1)
Definition: IfxCcu6.h:171
IfxCcu6_enableTrap
IFX_INLINE void IfxCcu6_enableTrap(Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut)
Enables the trap functionality for the corresponding output signals.
Definition: IfxCcu6.h:1633
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:675
IfxCcu6_disableDelayBypass
IFX_INLINE void IfxCcu6_disableDelayBypass(Ifx_CCU6 *ccu6)
Disables the delay of the source signal for the sampling of the Hall input pattern (selected by HSYNC...
Definition: IfxCcu6.h:1459
IfxCcu6_enableModule
IFX_EXTERN void IfxCcu6_enableModule(Ifx_CCU6 *ccu6)
Enables the selected CCU6 kernel.
Definition: IfxCcu6.c:145
IfxCcu6_T12ChannelMode_hallSensor
Hall Sensor Mode, In order to properly enable this mode, all three MSEL6x fields have to be programme...
Definition: IfxCcu6.h:275
IfxCcu6_TimerInputClock
IfxCcu6_TimerInputClock
Selects the input clock for timers (T12 or T13) that is derived from the peripheral clock according t...
Definition: IfxCcu6.h:343
IfxCcu6_enableModulationOutput
IFX_EXTERN void IfxCcu6_enableModulationOutput(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut)
Enables the modulation of the corresponding output signal by PWM pattern generated by the timers T12 ...
Definition: IfxCcu6.c:114
IfxCcu6_T12ChannelMode_hysteresisLikecompare
Hysteresis-like compare mode.
Definition: IfxCcu6.h:277
IfxCcu6_getCaptureRegisterValue
IFX_EXTERN uint32 IfxCcu6_getCaptureRegisterValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the capture register value of the selected channel.
Definition: IfxCcu6.c:175
IfxCcu6_setT13Frequency
IFX_EXTERN float32 IfxCcu6_setT13Frequency(Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period)
Sets the frequency and clock input of the Timer 13 Caution: If desired frequency cannot achieved (by ...
Definition: IfxCcu6.c:421
IfxCcu6_ServiceRequest_0
Service request output SR0.
Definition: IfxCcu6.h:232
IfxCcu6_setOutputPassiveState
IFX_INLINE void IfxCcu6_setOutputPassiveState(Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut, boolean state)
Sets the state of the corresponding compare channel, that is considered to be the passive state...
Definition: IfxCcu6.h:2033
IfxCcu6_CaptureCompareInput
IfxCcu6_CaptureCompareInput
Input selection, ( CC6x capture input / CTRAP input / CCPOSx input ) Definition in Ifx_CCU...
Definition: IfxCcu6.h:78
IfxCcu6_CaptureCompareInput_cCPOS0
CCPOS0 input.
Definition: IfxCcu6.h:84


iLLD_TC38A: IfxCcu6_Icu.c Source File

  • Ccu6
  • Icu
IfxCcu6_Icu.c
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6_Icu.c
3 * \brief CCU6 ICU details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 *
41 */
42
43 /******************************************************************************/
44 /*----------------------------------Includes----------------------------------*/
45 /******************************************************************************/
46
47 #include "IfxCcu6_Icu.h"
48
49 /******************************************************************************/
50 /*-------------------------Function Implementations---------------------------*/
51 /******************************************************************************/
52
53 uint32 IfxCcu6_Icu_getTimeStamp(IfxCcu6_Icu_Channel *channel)
54 {
55 uint32 timeStamp = 0;
56
57 timeStamp = IfxCcu6_getCaptureShadowRegisterValue(channel->ccu6, channel->channelId);
58
59 return timeStamp;
60 }
61
62
63 void IfxCcu6_Icu_initChannel(IfxCcu6_Icu_Channel *channel, const IfxCcu6_Icu_ChannelConfig *channelConfig)
64 {
65 channel->ccu6 = channelConfig->ccu6;
66
67 /* -- capture input initialisation -- */
68
69 const IfxCcu6_Icu_Pins *pins = channelConfig->pins;
70
71 if (pins != NULL_PTR)
72 {
73 IfxCcu6_Cc60in_In *cc60In = pins->cc60In;
74
75 if (cc60In != NULL_PTR)
76 {
77 IfxCcu6_initCc60InPinWithPadLevel(cc60In, pins->cc6xInputMode, pins->pinDriver);
78 }
79
80 IfxCcu6_Cc61in_In *cc61In = pins->cc61In;
81
82 if (cc61In != NULL_PTR)
83 {
84 IfxCcu6_initCc61InPinWithPadLevel(cc61In, pins->cc6xInputMode, pins->pinDriver);
85 }
86
87 IfxCcu6_Cc62in_In *cc62In = pins->cc62In;
88
89 if (cc62In != NULL_PTR)
90 {
91 IfxCcu6_initCc62InPinWithPadLevel(cc62In, pins->cc6xInputMode, pins->pinDriver);
92 }
93
94 if (channelConfig->multiInputCaptureEnabled)
95 {
96 IfxCcu6_Ccpos0_In *ccpos0 = pins->ccpos0;
97
98 if (ccpos0 != NULL_PTR)
99 {
100 IfxCcu6_initCcpos0PinWithPadLevel(ccpos0, pins->ccposxInputMode, pins->pinDriver);
101 }
102
103 IfxCcu6_Ccpos1_In *ccpos1 = pins->ccpos1;
104
105 if (ccpos1 != NULL_PTR)
106 {
107 IfxCcu6_initCcpos1PinWithPadLevel(ccpos1, pins->ccposxInputMode, pins->pinDriver);
108 }
109
110 IfxCcu6_Ccpos2_In *ccpos2 = pins->ccpos2;
111
112 if (ccpos2 != NULL_PTR)
113 {
114 IfxCcu6_initCcpos2PinWithPadLevel(ccpos2, pins->ccposxInputMode, pins->pinDriver);
115 }
116 }
117
118 IfxCcu6_T12hr_In *t12hr = pins->t12hr;
119
120 if (t12hr != NULL_PTR)
121 {
122 IfxCcu6_initT12hrPinWithPadLevel(t12hr, pins->t1xhrInputMode, pins->pinDriver);
123 }
124
125 IfxCcu6_T13hr_In *t13hr = pins->t13hr;
126
127 if (t13hr != NULL_PTR)
128 {
129 IfxCcu6_initT13hrPinWithPadLevel(t13hr, pins->t1xhrInputMode, pins->pinDriver);
130 }
131 }
132
133 /* -- interrupt initialisation -- */
134
135 if (channelConfig->interrupt1.priority > 0)
136 {
137 IfxCcu6_enableInterrupt(channelConfig->ccu6, channelConfig->interrupt1.source);
138 IfxCcu6_routeInterruptNode(channelConfig->ccu6, channelConfig->interrupt1.source, channelConfig->interrupt1.serviceRequest);
139
140 volatile Ifx_SRC_SRCR *src;
141 src = IfxCcu6_getSrcAddress(channelConfig->ccu6, channelConfig->interrupt1.serviceRequest);
142 IfxSrc_init(src, channelConfig->interrupt1.typeOfService, channelConfig->interrupt1.priority);
143 IfxSrc_enable(src);
144 }
145
146 if (channelConfig->interrupt2.priority > 0)
147 {
148 IfxCcu6_enableInterrupt(channelConfig->ccu6, channelConfig->interrupt2.source);
149 IfxCcu6_routeInterruptNode(channelConfig->ccu6, channelConfig->interrupt2.source, channelConfig->interrupt2.serviceRequest);
150
151 volatile Ifx_SRC_SRCR *src;
152 src = IfxCcu6_getSrcAddress(channelConfig->ccu6, channelConfig->interrupt2.serviceRequest);
153 IfxSrc_init(src, channelConfig->interrupt2.typeOfService, channelConfig->interrupt2.priority);
154 IfxSrc_enable(src);
155 }
156
157 if (channelConfig->interrupt3.priority > 0)
158 {
159 IfxCcu6_enableInterrupt(channelConfig->ccu6, channelConfig->interrupt3.source);
160 IfxCcu6_routeInterruptNode(channelConfig->ccu6, channelConfig->interrupt3.source, channelConfig->interrupt3.serviceRequest);
161
162 volatile Ifx_SRC_SRCR *src;
163 src = IfxCcu6_getSrcAddress(channelConfig->ccu6, channelConfig->interrupt3.serviceRequest);
164 IfxSrc_init(src, channelConfig->interrupt3.typeOfService, channelConfig->interrupt3.priority);
165 IfxSrc_enable(src);
166 }
167
168 if (channelConfig->interrupt4.priority > 0)
169 {
170 IfxCcu6_enableInterrupt(channelConfig->ccu6, channelConfig->interrupt4.source);
171 IfxCcu6_routeInterruptNode(channelConfig->ccu6, channelConfig->interrupt4.source, channelConfig->interrupt4.serviceRequest);
172
173 volatile Ifx_SRC_SRCR *src;
174 src = IfxCcu6_getSrcAddress(channelConfig->ccu6, channelConfig->interrupt4.serviceRequest);
175 IfxSrc_init(src, channelConfig->interrupt4.typeOfService, channelConfig->interrupt4.priority);
176 IfxSrc_enable(src);
177 }
178
179 channel->trigger = channelConfig->trigger;
180 channel->channelId = channelConfig->channelId;
181 channel->channelMode = channelConfig->channelMode;
182
183 #if IFX_CFG_USE_STANDARD_INTERFACE
184 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (uint32)icu == ((uint32)&icu->base));
185 icu->base.functions.startCapture = (Icu_StartCapture) & IfxCcu6_Icu_startCapture;
186 icu->base.functions.stopCapture = (Icu_StopCapture) & IfxCcu6_Icu_stopCapture;
187 icu->base.functions.getTimeStamp = (Icu_GetTimeStamp) & IfxCcu6_Icu_getTimeStamp;
188 #endif
189 }
190
191
192 void IfxCcu6_Icu_initChannelConfig(IfxCcu6_Icu_ChannelConfig *channelConfig, Ifx_CCU6 *ccu6)
193 {
194 channelConfig->ccu6 = ccu6;
195
196 channelConfig->channelId = IfxCcu6_T12Channel_0; // default channel 0
197 channelConfig->channelMode = IfxCcu6_T12ChannelMode_doubleRegisterCaptureRising; // default CC6xIN rising edge
198
199 channelConfig->interrupt1.source = IfxCcu6_InterruptSource_cc60RisingEdge;
200 channelConfig->interrupt1.serviceRequest = IfxCcu6_ServiceRequest_0;
201 channelConfig->interrupt1.priority = 0; // interrupt priority 0
202 channelConfig->interrupt1.typeOfService = IfxSrc_Tos_cpu0; // type of service CPU0
203
204 channelConfig->interrupt2.source = IfxCcu6_InterruptSource_cc60FallingEdge;
205 channelConfig->interrupt2.serviceRequest = IfxCcu6_ServiceRequest_1;
206 channelConfig->interrupt2.priority = 0; // interrupt priority 0
207 channelConfig->interrupt2.typeOfService = IfxSrc_Tos_cpu0; // type of service CPU0
208
209 channelConfig->interrupt3.source = IfxCcu6_InterruptSource_cc61RisingEdge;
210 channelConfig->interrupt3.serviceRequest = IfxCcu6_ServiceRequest_2;
211 channelConfig->interrupt3.priority = 0; // interrupt priority 0
212 channelConfig->interrupt3.typeOfService = IfxSrc_Tos_cpu0; // type of service CPU0
213
214 channelConfig->interrupt4.source = IfxCcu6_InterruptSource_trap;
215 channelConfig->interrupt4.serviceRequest = IfxCcu6_ServiceRequest_3;
216 channelConfig->interrupt4.priority = 0; // interrupt priority 0
217 channelConfig->interrupt4.typeOfService = IfxSrc_Tos_cpu0; // type of service CPU0
218
219 channelConfig->trigger.extInputTrigger = channelConfig->timer.trigger.t12ExtInputTrigger;
220 channelConfig->trigger.extInputTriggerMode = channelConfig->timer.trigger.extInputTriggerMode;
221
222 channelConfig->pins = NULL_PTR;
223
224 channelConfig->multiInputCaptureEnabled = FALSE;
225 }
226
227
228 void IfxCcu6_Icu_initModule(IfxCcu6_Icu *icu, const IfxCcu6_Icu_Config *config)
229 {
230 Ifx_CCU6 *ccu6SFR = config->ccu6; // pointer to CCU6 registers
231 icu->ccu6 = ccu6SFR; // adding register pointer to module handler
232
233 /* -- hardware module initialisation -- */
234
235 // enable module if it hasn't been enabled by any other interface //
236 if (IfxCcu6_isModuleEnabled(ccu6SFR) == FALSE)
237 {
238 IfxCcu6_enableModule(ccu6SFR);
239 }
240
241 /* -- timer initialisation -- */
242
243 // enable Timer12 if it hasn't been enabled by any other interface //
244 if (IfxCcu6_getTimerAvailabilityStatus(ccu6SFR, IfxCcu6_TimerId_t12) == FALSE)
245 {
246 IfxCcu6_enableTimer(ccu6SFR, IfxCcu6_TimerId_t12);
247 }
248
249 // clock initialization //
250
251 Ifx_TimerValue period = config->period;
252
253 if (config->clock.extClockEnabled) // if external source is selected as reference
254 {
255 // input signal selection
256 if (config->clock.extClockInput != NULL_PTR)
257 {
258 IfxCcu6_setT12InputSignal(config->ccu6, config->clock.extClockInput);
259 }
260
261 // counting input mode selection
262 IfxCcu6_setCountingInputMode(ccu6SFR, IfxCcu6_TimerId_t12, config->clock.countingInputMode);
263
264 // countining mode selection
265 IfxCcu6_setT12CountMode(ccu6SFR, config->countMode);
266
267 // period selection for center aligned mode
268 if (config->countMode == IfxCcu6_T12CountMode_centerAligned)
269 {
270 period = (period / 2) - 1;
271 }
272
273 // period setting
274 IfxCcu6_setT12PeriodValue(ccu6SFR, (uint16)period);
275
276 // frequency is meaningless here : set to 0
277 icu->captureFrequency = 0;
278 }
279 else // if internal clock is selected as reference
280 {
281 // in case of in sync with T13, T12 runs at same frequency as T13
282 icu->captureFrequency = IfxCcu6_setT12Frequency(ccu6SFR, config->frequency, period, config->countMode);
283 }
284
285 // counter initialisation //
286
287 IfxCcu6_setT12CounterValue(ccu6SFR, config->counterValue);
288 }
289
290
291 void IfxCcu6_Icu_initModuleConfig(IfxCcu6_Icu_Config *config, Ifx_CCU6 *ccu6)
292 {
293 config->ccu6 = ccu6;
294
295 config->frequency = 400000;
296 config->period = 0xFFFE; /* max(uint16) - 1 */
297
298 config->clock.extClockEnabled = FALSE;
299 config->clock.extClockInput = NULL_PTR;
300 config->clock.countingInputMode = IfxCcu6_CountingInputMode_internal;
301
302 config->countMode = IfxCcu6_T12CountMode_edgeAligned;
303 config->counterValue = 0;
304 }
305
306
307 void IfxCcu6_Icu_startCapture(IfxCcu6_Icu_Channel *channel)
308 {
309 if (IfxCcu6_getTimerRunStatus(channel->ccu6, IfxCcu6_TimerId_t12) != IfxCcu6_TimerRunStatus_running)
310 {
311 // enable shadow transfer
312 IfxCcu6_enableShadowTransfer(channel->ccu6, TRUE, FALSE);
313
314 // start the timer
315 if (channel->trigger.extInputTrigger != NULL_PTR)
316 {
317 // external input setting
318 IfxCcu6_setExternalRunMode(channel->ccu6, IfxCcu6_TimerId_t12, channel->trigger.extInputTriggerMode);
319 IfxCcu6_setT12InputSignal(channel->ccu6, channel->trigger.extInputTrigger);
320 }
321 else
322 {
323 // internal start
324 IfxCcu6_startTimer(channel->ccu6, TRUE, FALSE);
325 }
326 }
327
328 // enable capture mode
329 IfxCcu6_setT12ChannelMode(channel->ccu6, channel->channelId, channel->channelMode);
330 }
331
332
333 void IfxCcu6_Icu_stopCapture(IfxCcu6_Icu_Channel *channel)
334 {
335 // disable shadow transfer
336 IfxCcu6_disableShadowTransfer(channel->ccu6, TRUE, FALSE);
337
338 // disable capture mode
339 IfxCcu6_setT12ChannelMode(channel->ccu6, channel->channelId, IfxCcu6_T12ChannelMode_off);
340
341 // remove the external input
342 IfxCcu6_setExternalRunMode(channel->ccu6, IfxCcu6_TimerId_t12, IfxCcu6_ExternalTriggerMode_disable);
343
344 // stop the timer
345 IfxCcu6_stopTimer(channel->ccu6, TRUE, FALSE);
346 }
IfxCcu6_Cc60in_In
CC60IN pin mapping structure.
Definition: IfxCcu6_PinMap.h:56
IfxCcu6_Cc61in_In
CC61IN pin mapping structure.
Definition: IfxCcu6_PinMap.h:64
IfxCcu6_stopTimer
IFX_INLINE void IfxCcu6_stopTimer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
starts the timers (T12, T13 individually or together based on the selection)
Definition: IfxCcu6.h:2150
IfxCcu6_Cc62in_In
CC62IN pin mapping structure.
Definition: IfxCcu6_PinMap.h:72
IfxCcu6_ServiceRequest_3
Service request output SR3.
Definition: IfxCcu6.h:235
IfxCcu6_Icu_Channel::channelId
IfxCcu6_T12Channel channelId
Capture compare channel of the Timer12.
Definition: IfxCcu6_Icu.h:309
IfxCcu6_ExternalTriggerMode_disable
The external setting of T1xR is disabled.
Definition: IfxCcu6.h:151
IfxCcu6_Icu_TriggerConfig::extInputTrigger
IfxCcu6_T12hr_In * extInputTrigger
External input signal selection for timer.
Definition: IfxCcu6_Icu.h:286
IfxCcu6_initCc60InPinWithPadLevel
IFX_INLINE void IfxCcu6_initCc60InPinWithPadLevel(const IfxCcu6_Cc60in_In *cc60In, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CC60 pin direction as input and configuring pad driver...
Definition: IfxCcu6.h:1737
IfxCcu6_Icu_ChannelConfig::interrupt3
IfxCcu6_Icu_InterruptConfig interrupt3
Structure for third interrupt configuration.
Definition: IfxCcu6_Icu.h:323
IfxCcu6_setExternalRunMode
IFX_INLINE void IfxCcu6_setExternalRunMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ExternalTriggerMode mode)
Sets the event of signal T1xHR that can set the run bit T1xR by HW.
Definition: IfxCcu6.h:1984
IfxCcu6_Icu_ChannelConfig
Configuration structure of the channel.
Definition: IfxCcu6_Icu.h:315
IfxCcu6_getSrcAddress
volatile Ifx_SRC_SRCR * IfxCcu6_getSrcAddress(Ifx_CCU6 *ccu6, IfxCcu6_ServiceRequest serviceRequest)
Returns the service request register.
Definition: IfxCcu6.c:207
IfxCcu6_Icu_Pins::ccposxInputMode
IfxPort_InputMode ccposxInputMode
The CCPOSx pin input mode which should be configured.
Definition: IfxCcu6_Icu.h:275
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxCcu6_Icu_Channel::channelMode
IfxCcu6_T12ChannelMode channelMode
The operating mode for the T12 channel.
Definition: IfxCcu6_Icu.h:310
IfxCcu6_Ccpos1_In
CCPOS1 pin mapping structure.
Definition: IfxCcu6_PinMap.h:88
IfxCcu6_Icu_Config::countMode
IfxCcu6_T12CountMode countMode
Operating mode of Timer 12.
Definition: IfxCcu6_Icu.h:339
IfxCcu6_initCcpos0PinWithPadLevel
IFX_INLINE void IfxCcu6_initCcpos0PinWithPadLevel(const IfxCcu6_Ccpos0_In *ccpos0, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CCPOS0 pin direction as input and configuring pad driver...
Definition: IfxCcu6.h:1803
IfxCcu6_T12CountMode_edgeAligned
T12 always counts up and continues counting from zero after reaching the period value.
Definition: IfxCcu6.h:299
IfxCcu6_Icu_ChannelConfig::pins
IfxCcu6_Icu_Pins * pins
Structure for capture input pins.
Definition: IfxCcu6_Icu.h:326
IfxCcu6_Icu_ChannelConfig::interrupt2
IfxCcu6_Icu_InterruptConfig interrupt2
Structure for second interrupt configuration.
Definition: IfxCcu6_Icu.h:322
IfxCcu6_getCaptureShadowRegisterValue
uint32 IfxCcu6_getCaptureShadowRegisterValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the capture shadow register value of the selected channel.
Definition: IfxCcu6.c:181
IfxCcu6_Icu_Channel
Channel handle.
Definition: IfxCcu6_Icu.h:304
IfxCcu6_InterruptSource_trap
Interrupt enable for trap flag.
Definition: IfxCcu6.h:197
IfxCcu6_enableTimer
IFX_INLINE void IfxCcu6_enableTimer(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Sets Timer12 block available, A write access to T12PR is executed.
Definition: IfxCcu6.h:1626
IfxCcu6_Icu_Channel::ccu6
Ifx_CCU6 * ccu6
Pointer to the base of CCU6 registers.
Definition: IfxCcu6_Icu.h:307
IfxCcu6_Timer_TriggerConfig::t12ExtInputTrigger
IfxCcu6_T12hr_In * t12ExtInputTrigger
External input signal selection for timer 12.
Definition: IfxCcu6_Timer.h:272
IfxCcu6_setT12ChannelMode
IFX_INLINE void IfxCcu6_setT12ChannelMode(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, IfxCcu6_T12ChannelMode mode)
Sets the operating mode of the Timer12 capture/compare channels.
Definition: IfxCcu6.h:2071
IfxCcu6_Icu_Config::period
Ifx_TimerValue period
PWM period in ticks.
Definition: IfxCcu6_Icu.h:337
IfxCcu6_Icu_ChannelConfig::interrupt4
IfxCcu6_Icu_InterruptConfig interrupt4
Structure for fourth interrupt configuration.
Definition: IfxCcu6_Icu.h:324
IfxCcu6_Icu_Pins::cc62In
IFX_CONST IfxCcu6_Cc62in_In * cc62In
CC62 input signal.
Definition: IfxCcu6_Icu.h:270
IfxCcu6_InterruptSource_cc60RisingEdge
Capture compare match rising edge interrupt enable for channel CC60.
Definition: IfxCcu6.h:181
IfxCcu6_Icu_ChannelConfig::multiInputCaptureEnabled
boolean multiInputCaptureEnabled
Choice of multi input capture.
Definition: IfxCcu6_Icu.h:327
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxCcu6_Icu_Pins::t1xhrInputMode
IfxPort_InputMode t1xhrInputMode
The T1xHR pin input mode which should be configured.
Definition: IfxCcu6_Icu.h:278
IfxCcu6_ServiceRequest_2
Service request output SR2.
Definition: IfxCcu6.h:234
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
IfxCcu6_InterruptSource_cc60FallingEdge
Capture compare match falling edge interrupt enable for channel CC60.
Definition: IfxCcu6.h:183
IfxCcu6_Timer::trigger
IfxCcu6_Timer_TriggerConfig trigger
Structure for trigger configuration.
Definition: IfxCcu6_Timer.h:298
IfxCcu6_Icu_Clock::extClockInput
IfxCcu6_T12hr_In * extClockInput
External input signal selection for timer 12.
Definition: IfxCcu6_Icu.h:250
IfxCcu6_Icu_initChannelConfig
void IfxCcu6_Icu_initChannelConfig(IfxCcu6_Icu_ChannelConfig *channelConfig, Ifx_CCU6 *ccu6)
Fills the channel config structure with default values.
Definition: IfxCcu6_Icu.c:192
IfxCcu6_Icu_initChannel
void IfxCcu6_Icu_initChannel(IfxCcu6_Icu_Channel *channel, const IfxCcu6_Icu_ChannelConfig *channelConfig)
Initialises the channel.
Definition: IfxCcu6_Icu.c:63
IfxCcu6_routeInterruptNode
void IfxCcu6_routeInterruptNode(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source, IfxCcu6_ServiceRequest serviceRequest)
Routes the interrupt node pointer to the selected service requests.
Definition: IfxCcu6.c:254
IfxCcu6_Icu_Pins::t12hr
IFX_CONST IfxCcu6_T12hr_In * t12hr
T12HR input signal.
Definition: IfxCcu6_Icu.h:276
IfxCcu6_T12CountMode_centerAligned
T12 counts down after detecting a period-match and counts up after detecting a one-match.
Definition: IfxCcu6.h:301
IfxCcu6_Icu_Pins::t13hr
IFX_CONST IfxCcu6_T13hr_In * t13hr
T13HR input signal.
Definition: IfxCcu6_Icu.h:277
Icu_StartCapture
void(* Icu_StartCapture)(Icu *handle)
Definition: Icu.h:51
IfxCcu6_initCc61InPinWithPadLevel
IFX_INLINE void IfxCcu6_initCc61InPinWithPadLevel(const IfxCcu6_Cc61in_In *cc61In, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CC61 pin direction as input and configuring pad driver...
Definition: IfxCcu6.h:1759
IfxCcu6_Icu_Config
Configuration structure of the module.
Definition: IfxCcu6_Icu.h:333
IfxCcu6_InterruptSource_cc61RisingEdge
Capture compare match rising edge interrupt enable for channel CC61.
Definition: IfxCcu6.h:185
IfxCcu6_getTimerAvailabilityStatus
IFX_INLINE boolean IfxCcu6_getTimerAvailabilityStatus(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
indicates the Timer blocks (T12 / T13) availability
Definition: IfxCcu6.h:1715
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxCcu6_setT12CounterValue
IFX_INLINE void IfxCcu6_setT12CounterValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit counter value of Timer12.
Definition: IfxCcu6.h:2085
IfxCcu6_setT12Frequency
float32 IfxCcu6_setT12Frequency(Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period, IfxCcu6_T12CountMode countMode)
Sets the frequency and clock input of the Timer 12. Caution: If desired frequency cannot achieved (by...
Definition: IfxCcu6.c:337
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxCcu6_enableShadowTransfer
IFX_INLINE void IfxCcu6_enableShadowTransfer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Enables shadow transfers of the timers (T12, T13 individually or together based on the selection) ...
Definition: IfxCcu6.h:1603
IfxCcu6_Icu_Pins::cc60In
IFX_CONST IfxCcu6_Cc60in_In * cc60In
CC60 input signal.
Definition: IfxCcu6_Icu.h:268
IfxCcu6_Icu
Module handle.
Definition: IfxCcu6_Icu.h:296
IfxCcu6_Icu_Config::frequency
float32 frequency
Specify expected PWM frequency in Hertz.
Definition: IfxCcu6_Icu.h:336
IfxCcu6_Ccpos0_In
CCPOS0 pin mapping structure.
Definition: IfxCcu6_PinMap.h:80
IfxCcu6_Icu_Config::clock
IfxCcu6_Icu_Clock clock
Structure for clock configuration.
Definition: IfxCcu6_Icu.h:338
IfxCcu6_enableInterrupt
IFX_INLINE void IfxCcu6_enableInterrupt(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Enables the selected interrupt.
Definition: IfxCcu6.h:1560
IfxCcu6_Icu_TriggerConfig::extInputTriggerMode
IfxCcu6_ExternalTriggerMode extInputTriggerMode
Event of signal T12HR that can set the run bit T12R by HW.
Definition: IfxCcu6_Icu.h:287
IfxCcu6_TimerId_t12
Timer 12.
Definition: IfxCcu6.h:336
IfxCcu6_setT12CountMode
IFX_INLINE void IfxCcu6_setT12CountMode(Ifx_CCU6 *ccu6, IfxCcu6_T12CountMode mode)
Definition: IfxCcu6.h:2079
IfxCcu6_Icu_Pins::ccpos1
IFX_CONST IfxCcu6_Ccpos1_In * ccpos1
CCPOS2 input signal.
Definition: IfxCcu6_Icu.h:272
IfxCcu6_CountingInputMode_internal
The T1x prescaler generates the counting events, Bit TCTR4.T1xCNT is not taken into account...
Definition: IfxCcu6.h:126
IfxCcu6_isModuleEnabled
IFX_INLINE boolean IfxCcu6_isModuleEnabled(Ifx_CCU6 *ccu6)
Returns the status of module enabled or disabled.
Definition: IfxCcu6.h:1914
IfxCcu6_T12ChannelMode_doubleRegisterCaptureRising
CC6xIN rising edge: CC6nSR stored in CC6xR, falling edge: T12 stored in CC6xSR.
Definition: IfxCcu6.h:272
IfxCcu6_T12ChannelMode_off
Capture/Compare modes switched off.
Definition: IfxCcu6.h:269
IfxCcu6_Icu.h
CCU6 ICU details.
IfxCcu6_initT13hrPinWithPadLevel
IFX_INLINE void IfxCcu6_initT13hrPinWithPadLevel(const IfxCcu6_T13hr_In *t13hrIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of T13HR pin direction as input and configuring pad driver...
Definition: IfxCcu6.h:1906
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:68
IfxCcu6_Icu_getTimeStamp
uint32 IfxCcu6_Icu_getTimeStamp(IfxCcu6_Icu_Channel *channel)
Returns the cuurent value stored in the Compare Shadow register (current time stamp) ...
Definition: IfxCcu6_Icu.c:53
IfxCcu6_Icu_Clock::extClockEnabled
boolean extClockEnabled
external clock enable / disable selection
Definition: IfxCcu6_Icu.h:249
IfxCcu6_Icu_Pins::ccpos0
IFX_CONST IfxCcu6_Ccpos0_In * ccpos0
CCPOS0 input signal.
Definition: IfxCcu6_Icu.h:271
IfxCcu6_Icu_stopCapture
void IfxCcu6_Icu_stopCapture(IfxCcu6_Icu_Channel *channel)
Stops the input capture.
Definition: IfxCcu6_Icu.c:333
IfxCcu6_setCountingInputMode
IFX_INLINE void IfxCcu6_setCountingInputMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_CountingInputMode mode)
Sets the input event leading to a counting action of Timers (T12 / T13).
Definition: IfxCcu6.h:1958
IfxCcu6_Icu_Channel::trigger
IfxCcu6_Icu_TriggerConfig trigger
Structure for trigger configuration.
Definition: IfxCcu6_Icu.h:308
IfxCcu6_Icu_initModule
void IfxCcu6_Icu_initModule(IfxCcu6_Icu *icu, const IfxCcu6_Icu_Config *config)
Initialises the module with default configuration.
Definition: IfxCcu6_Icu.c:228
IfxCcu6_T12hr_In
T12HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:112
IfxCcu6_initCcpos2PinWithPadLevel
IFX_INLINE void IfxCcu6_initCcpos2PinWithPadLevel(const IfxCcu6_Ccpos2_In *ccpos2, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CCPOS2 pin direction as input and configuring pad driver...
Definition: IfxCcu6.h:1833
IfxCcu6_T13hr_In
T13HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:120
IfxCcu6_Icu_Pins::pinDriver
IfxPort_PadDriver pinDriver
Pad Driver.
Definition: IfxCcu6_Icu.h:279
IfxCcu6_Icu_InterruptConfig::source
IfxCcu6_InterruptSource source
Interrupt source selection.
Definition: IfxCcu6_Icu.h:258
uint16
unsigned short uint16
Definition: Platform_Types.h:112
Icu_StopCapture
void(* Icu_StopCapture)(Icu *handle)
Definition: Icu.h:52
IfxCcu6_Icu_initModuleConfig
void IfxCcu6_Icu_initModuleConfig(IfxCcu6_Icu_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values.
Definition: IfxCcu6_Icu.c:291
IfxCcu6_Icu_InterruptConfig::typeOfService
IfxSrc_Tos typeOfService
type of interrupt service
Definition: IfxCcu6_Icu.h:261
IfxCcu6_initCc62InPinWithPadLevel
IFX_INLINE void IfxCcu6_initCc62InPinWithPadLevel(const IfxCcu6_Cc62in_In *cc62In, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CC62 pin direction as input and configuring pad driver...
Definition: IfxCcu6.h:1781
IfxCcu6_T12Channel_0
T12 channel CC60.
Definition: IfxCcu6.h:260
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxCcu6_ServiceRequest_1
Service request output SR1.
Definition: IfxCcu6.h:233
IfxCcu6_Icu_ChannelConfig::interrupt1
IfxCcu6_Icu_InterruptConfig interrupt1
Structure for first interrupt configuration.
Definition: IfxCcu6_Icu.h:321
IfxCcu6_Icu_Pins::ccpos2
IFX_CONST IfxCcu6_Ccpos2_In * ccpos2
CCPOS2 input signal.
Definition: IfxCcu6_Icu.h:273
IfxCcu6_Icu_Pins::cc6xInputMode
IfxPort_InputMode cc6xInputMode
The CC6x pin input mode which should be configured.
Definition: IfxCcu6_Icu.h:274
IfxCcu6_setT12InputSignal
void IfxCcu6_setT12InputSignal(Ifx_CCU6 *ccu6, IfxCcu6_T12hr_In *extInput)
selects the actual input signal for the timer inputs.
Definition: IfxCcu6.c:386
IfxCcu6_Icu_Config::counterValue
uint16 counterValue
16-bit counter value of Timer12
Definition: IfxCcu6_Icu.h:340
IfxCcu6_TimerRunStatus_running
Timer T1x is running.
Definition: IfxCcu6.h:375
IfxCcu6_disableShadowTransfer
IFX_INLINE void IfxCcu6_disableShadowTransfer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Disables shadow transfers of the timers (T12, T13 individually or together based on the selection) ...
Definition: IfxCcu6.h:1478
IfxCcu6_Timer_TriggerConfig::extInputTriggerMode
IfxCcu6_ExternalTriggerMode extInputTriggerMode
Event of signal T1xHR that can set the run bit T1xR by HW.
Definition: IfxCcu6_Timer.h:274
IfxCcu6_Ccpos2_In
CCPOS2 pin mapping structure.
Definition: IfxCcu6_PinMap.h:96
IfxCcu6_initT12hrPinWithPadLevel
IFX_INLINE void IfxCcu6_initT12hrPinWithPadLevel(const IfxCcu6_T12hr_In *t12hrIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of T12HR pin direction as input and configuring pad driver...
Definition: IfxCcu6.h:1891
IfxCcu6_Icu_InterruptConfig::priority
uint16 priority
Interrupt priority.
Definition: IfxCcu6_Icu.h:260
IfxCcu6_getTimerRunStatus
IFX_INLINE IfxCcu6_TimerRunStatus IfxCcu6_getTimerRunStatus(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Returns the Timer (T12 / T13) run status.
Definition: IfxCcu6.h:1722
IfxCcu6_Icu_ChannelConfig::timer
IfxCcu6_Timer timer
Timer handle.
Definition: IfxCcu6_Icu.h:328
IfxCcu6_setT12PeriodValue
IFX_INLINE void IfxCcu6_setT12PeriodValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the period value that leads Timer12 counter value to a period-match.
Definition: IfxCcu6.h:2091
IfxCcu6_Icu_Pins::cc61In
IFX_CONST IfxCcu6_Cc61in_In * cc61In
CC61 input signal.
Definition: IfxCcu6_Icu.h:269
IfxCcu6_startTimer
IFX_INLINE void IfxCcu6_startTimer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
starts the timers (T12, T13 individually or together based on the selection)
Definition: IfxCcu6.h:2140
TRUE
#define TRUE
Definition: Platform_Types.h:90
Icu_GetTimeStamp
void(* Icu_GetTimeStamp)(Icu *handle)
Definition: Icu.h:53
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
IfxCcu6_initCcpos1PinWithPadLevel
IFX_INLINE void IfxCcu6_initCcpos1PinWithPadLevel(const IfxCcu6_Ccpos1_In *ccpos1, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CCPOS1 pin direction as input and configuring pad driver...
Definition: IfxCcu6.h:1818
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxCcu6_enableModule
void IfxCcu6_enableModule(Ifx_CCU6 *ccu6)
Enables the selected CCU6 kernel.
Definition: IfxCcu6.c:145
IfxCcu6_Icu_Clock::countingInputMode
IfxCcu6_CountingInputMode countingInputMode
Input event leading to a counting action of the timer T12.
Definition: IfxCcu6_Icu.h:251
IfxCcu6_Icu_InterruptConfig::serviceRequest
IfxCcu6_ServiceRequest serviceRequest
Selection of service request outputs.
Definition: IfxCcu6_Icu.h:259
IfxCcu6_Icu_Pins
Structure for capture input pins.
Definition: IfxCcu6_Icu.h:266
IfxCcu6_ServiceRequest_0
Service request output SR0.
Definition: IfxCcu6.h:232
IfxCcu6_Icu::captureFrequency
float32 captureFrequency
Configured CCU6 capture frequency ( set to 0 for external counting mode)
Definition: IfxCcu6_Icu.h:299
IfxCcu6_Icu_startCapture
void IfxCcu6_Icu_startCapture(IfxCcu6_Icu_Channel *channel)
Starts the input capture.
Definition: IfxCcu6_Icu.c:307


iLLD_TC38A: IfxCcu6_Icu.h Source File

  • Ccu6
  • Icu
IfxCcu6_Icu.h
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6_Icu.h
3 * \brief CCU6 ICU details
4 * \ingroup IfxLld_Ccu6
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 * \defgroup IfxLld_Ccu6_Icu_Usage How to use the CCU6 ICU Interface driver?
43 * \ingroup IfxLld_Ccu6_Icu
44 *
45 * The ICU interface driver provides a default CCU6 configuration for capturing the input from the selected channel
46 *
47 * User can select the various configuration options that hardware allows
48 *
49 * In the following sections it will be described, how to integrate the driver into the application framework.
50 *
51 *
52 * \section IfxLld_Ccu6_Icu_Preparation Preparation
53 *
54 *
55 * \subsection IfxLld_Ccu6_Icu_Include Include Files
56 *
57 * Include following header file into your C code:
58 *
59 * \code
60 * #include <Ccu6/Icu/IfxCcu6_Icu.h>
61 * \endcode
62 *
63 * \subsection IfxLld_Ccu6_Icu_Variables Variables
64 *
65 * Declare the ICU handle and channel handle as global variables in your C code:
66 *
67 * \code
68 * // used globally
69 * static IfxCcu6_Icu icu;
70 * static IfxCcu6_IcuChannel icuChannel;
71 * \endcode
72 *
73 * \subsection IfxLld_Ccu6_Icu_Interrupt Interrupt Handler Installation
74 *
75 * See also \ref IfxLld_Cpu_Irq_Usage
76 *
77 * Define priority for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:
78 *
79 * \code
80 * // priorities are normally defined in Ifx_IntPrioDef.h
81 * #define IFX_INTPRIO_CCU6 1
82 * \endcode
83 *
84 * Add the interrupt service routine to your C code.
85 *
86 * \code
87 * IFX_INTERRUPT(ccu60ISR_Icu, 0, IFX_INTPRIO_CCU6)
88 * {
89 * //user code
90 * }
91 * \endcode
92 *
93 * Finally install the interrupt handlers in your initialisation function:
94 *
95 * \code
96 * // install interrupt handlers
97 * IfxCpu_Irq_installInterruptHandler(&ccu60ISR_Icu, IFX_INTPRIO_CCU6);
98 * IfxCpu_enableInterrupts();
99 * \endcode
100 *
101 * \subsection IfxLld_Ccu6_Icu_Init Module Initialisation
102 *
103 * The module can be initialised in two ways, as a stand alone driver or in conjunction with Timer driver
104 * The module initialisation can be done in the same function. Here an example:
105 *
106 * \code
107 * // ---- when not using inconjunction with Timer driver ---- //
108 * // create configuration
109 * IfxCcu6_Icu_Config icuConfig;
110 * IfxCcu6_Icu_initModuleConfig(&icuConfig, &MODULE_CCU60);
111 *
112 * // configure the frequency of the timer in case of internal start
113 * icuConfig.frequency = 400000;
114 *
115 * // configure the period of the timer
116 * icuConfig.period = 100;
117 *
118 * // configure the clock for internal mode
119 * icuConfig.clock.extClockEnabled = FALSE;
120 * icuConfig.clock.extClockInput = NULL_PTR;
121 * icuConfig.clock.countingInputMode = IfxCcu6_CountingInputMode_internal;
122 *
123 * // configure count operation
124 * icuConfig.countMode = IfxCcu6_T12CountMode_edgeAligned;
125 * icuConfig.counterValue = 0;
126 *
127 * // initialize the module
128 * IfxCcu6_Icu_initModule(&icu, &icuConfig);
129 * // -------------------------------------------------------- //
130 *
131 * // ---- when not using inconjunction with Timer driver ---- //
132 * // after initialising the timer
133 * IfxCcu6_Timer timer;
134 * IfxCcu6_TimerConfig timerConfig;
135 * IfxCcu6_Timer_initModule(&timer, &timerConfig); // e.g. Timer 12 is specified previously in timerConfig.
136 * // -------------------------------------------------------- //
137 *
138 * // create Icu channel config
139 * IfxCcu6_Icu_channelConfig icuChannelConfig;
140 * IfxCcu6_Icu_initChannelConfig(&icuChannelConfig, &MODULE_CCU60);
141 *
142 * // ---- when using inconjunction with Timer driver ---- //
143 * icuChannelConfig.timer = (Timer*)&timer;
144 * // ---------------------------------------------------- //
145 *
146 * // configure the channel
147 * icuChannelConfig.channelNumber = IfxCcu6_T12Channel_0;
148 * icuChannelConfig.channelMode = IfxCcu6_T12ChannelMode_doubleRegisterCaptureRising;
149 *
150 * // configure the interrupts
151 * icuChannelConfig.interrupt1.interruptSource = IfxCcu6_InterruptSource_cc60RisingEdge;
152 * icuChannelConfig.interrupt1.serviceRequest = IfxCcu6_ServiceRequest_2;
153 * icuChannelConfig.interrupt1.priority = IFX_INTRPRIO_CCU6;
154 * icuChannelConfig.interrupt1.typeOfService = IfxSrc_Tos_cpu0;
155 *
156 * // ---- when not using inconjunction with Timer driver ---- //
157 * // configure input and output triggers
158 * icuChannelConfig.trigger.extInputTrigger = IfxCcu60_T12HRB_P00_7_IN;
159 * icuChannelConfig.trigger.extInputTriggerMode = IfxCcu6_ExternalTriggerMode_risingEdge;
160 * // -------------------------------------------------------- //
161 *
162 * // pin configuration, in case of multi input capture mode select the respective CC6xIn and CCPOSxIn pins of the selected channel
163 * const IfxCcu6_Icu_Pins pins = {
164 * IfxCcu60_CC60INA_P02_0_IN, // CC60In pin
165 * NULL, // CC61In pin not used
166 * NULL, // CC62In pin not used
167 * NULL, // CCPOS0In pin not used
168 * NULL, // CCPOS1In pin not used
169 * NULL, // CCPOS2In pin not used
170 * IfxPort_InputMode_pullUp,
171 * IfxPort_InputMode_pullUp
172 * };
173 * IcuConfig.pins = &pins;
174 *
175 * // configure multi input capture mode
176 * icuChannelConfig->multiInputCaptureEnabled = FALSE;
177 *
178 * // initialize the channel
179 * IfxCcu6_Icu_initChannel(&icuChannel, &icuChannelConfig);
180 * \endcode
181 *
182 *
183 * The Icu is ready for use now!
184 *
185 *
186 * \section IfxLld_Ccu6_Icu_Control Control
187 *
188 *
189 * The ICU driver provides simple to use Capture Control functions
190 *
191 * This means: you can start and stop the capture process, and you can also get a time stamp at any point of time during the capture process
192 *
193 * Start Capture
194 *
195 * \code
196 * IfxCcu6_Icu_startCapture(&icuChannel);
197 * \endcode
198 *
199 * Stop Capture
200 *
201 * \code
202 * IfxCcu6_Icu_stopCapture(&icuChannel);
203 * \endcode
204 *
205 * Get time stamp at any point of time during the capture process
206 * (can also be used in ISR)
207 *
208 * \code
209 * // assumed to be declared globally
210 * // uint32 timeStamp[100] = 0;
211 *
212 * // store the time stamp in an array
213 * timeStamp[i] = IfxCcu6_Icu_getTimeStamp(&icuChannel);
214 * \endcode
215 *
216 * \defgroup IfxLld_Ccu6_Icu ICU Interface driver
217 * \ingroup IfxLld_Ccu6
218 * \defgroup IfxLld_Ccu6_Icu_DataStructures Data Structures
219 * \ingroup IfxLld_Ccu6_Icu
220 * \defgroup IfxLld_Ccu6_Icu_Module_Initialize_Functions Module Initialize Functions
221 * \ingroup IfxLld_Ccu6_Icu
222 * \defgroup IfxLld_Ccu6_Icu_Capture_Control_Functions Capture Control Functions
223 * \ingroup IfxLld_Ccu6_Icu
224 * \defgroup IfxLld_Ccu6_Icu_Channel_Initialize_Functions Channel Initialize Functions
225 * \ingroup IfxLld_Ccu6_Icu
226 */
227
228 #ifndef IFXCCU6_ICU_H
229 #define IFXCCU6_ICU_H 1
230
231 /******************************************************************************/
232 /*----------------------------------Includes----------------------------------*/
233 /******************************************************************************/
234
235 #include "Ccu6/Std/IfxCcu6.h"
236 #include "If/Ccu6If/Icu.h"
237 #include "Ccu6/Timer/IfxCcu6_Timer.h"
238
239 /******************************************************************************/
240 /*-----------------------------Data Structures--------------------------------*/
241 /******************************************************************************/
242
243 /** \addtogroup IfxLld_Ccu6_Icu_DataStructures
244 * \{ */
245 /** \brief Structure for clock configuration
246 */
247 typedef struct
248 {
249 boolean extClockEnabled; /**< \brief external clock enable / disable selection */
250 IfxCcu6_T12hr_In *extClockInput; /**< \brief External input signal selection for timer 12 */
251 IfxCcu6_CountingInputMode countingInputMode; /**< \brief Input event leading to a counting action of the timer T12 */
252 } IfxCcu6_Icu_Clock;
253
254 /** \brief Structure for interrupt configuration
255 */
256 typedef struct
257 {
258 IfxCcu6_InterruptSource source; /**< \brief Interrupt source selection */
259 IfxCcu6_ServiceRequest serviceRequest; /**< \brief Selection of service request outputs */
260 uint16 priority; /**< \brief Interrupt priority */
261 IfxSrc_Tos typeOfService; /**< \brief type of interrupt service */
262 } IfxCcu6_Icu_InterruptConfig;
263
264 /** \brief Structure for capture input pins
265 */
266 typedef struct
267 {
268 IFX_CONST IfxCcu6_Cc60in_In *cc60In; /**< \brief CC60 input signal */
269 IFX_CONST IfxCcu6_Cc61in_In *cc61In; /**< \brief CC61 input signal */
270 IFX_CONST IfxCcu6_Cc62in_In *cc62In; /**< \brief CC62 input signal */
271 IFX_CONST IfxCcu6_Ccpos0_In *ccpos0; /**< \brief CCPOS0 input signal */
272 IFX_CONST IfxCcu6_Ccpos1_In *ccpos1; /**< \brief CCPOS2 input signal */
273 IFX_CONST IfxCcu6_Ccpos2_In *ccpos2; /**< \brief CCPOS2 input signal */
274 IfxPort_InputMode cc6xInputMode; /**< \brief The CC6x pin input mode which should be configured */
275 IfxPort_InputMode ccposxInputMode; /**< \brief The CCPOSx pin input mode which should be configured */
276 IFX_CONST IfxCcu6_T12hr_In *t12hr; /**< \brief T12HR input signal */
277 IFX_CONST IfxCcu6_T13hr_In *t13hr; /**< \brief T13HR input signal */
278 IfxPort_InputMode t1xhrInputMode; /**< \brief The T1xHR pin input mode which should be configured */
279 IfxPort_PadDriver pinDriver; /**< \brief Pad Driver */
280 } IfxCcu6_Icu_Pins;
281
282 /** \brief Configuration structure for external triggers
283 */
284 typedef struct
285 {
286 IfxCcu6_T12hr_In *extInputTrigger; /**< \brief External input signal selection for timer */
287 IfxCcu6_ExternalTriggerMode extInputTriggerMode; /**< \brief Event of signal T12HR that can set the run bit T12R by HW */
288 } IfxCcu6_Icu_TriggerConfig;
289
290 /** \} */
291
292 /** \addtogroup IfxLld_Ccu6_Icu_DataStructures
293 * \{ */
294 /** \brief Module handle
295 */
296 typedef struct
297 {
298 Ifx_CCU6 *ccu6; /**< \brief Pointer to the base of CCU6 registers */
299 float32 captureFrequency; /**< \brief Configured CCU6 capture frequency ( set to 0 for external counting mode) */
300 } IfxCcu6_Icu;
301
302 /** \brief Channel handle
303 */
304 typedef struct
305 {
306 Icu base; /**< \brief Base ICU object */
307 Ifx_CCU6 *ccu6; /**< \brief Pointer to the base of CCU6 registers */
308 IfxCcu6_Icu_TriggerConfig trigger; /**< \brief Structure for trigger configuration */
309 IfxCcu6_T12Channel channelId; /**< \brief Capture compare channel of the Timer12 */
310 IfxCcu6_T12ChannelMode channelMode; /**< \brief The operating mode for the T12 channel */
311 } IfxCcu6_Icu_Channel;
312
313 /** \brief Configuration structure of the channel
314 */
315 typedef struct
316 {
317 Icu_Config base; /**< \brief Base configuration */
318 Ifx_CCU6 *ccu6; /**< \brief Pointer to the base of CCU6 registers */
319 IfxCcu6_T12Channel channelId; /**< \brief Capture compare channel of the Timer12 */
320 IfxCcu6_T12ChannelMode channelMode; /**< \brief The operating mode for the T12 channel */
321 IfxCcu6_Icu_InterruptConfig interrupt1; /**< \brief Structure for first interrupt configuration */
322 IfxCcu6_Icu_InterruptConfig interrupt2; /**< \brief Structure for second interrupt configuration */
323 IfxCcu6_Icu_InterruptConfig interrupt3; /**< \brief Structure for third interrupt configuration */
324 IfxCcu6_Icu_InterruptConfig interrupt4; /**< \brief Structure for fourth interrupt configuration */
325 IfxCcu6_Icu_TriggerConfig trigger; /**< \brief Structure for trigger configuration */
326 IfxCcu6_Icu_Pins *pins; /**< \brief Structure for capture input pins */
327 boolean multiInputCaptureEnabled; /**< \brief Choice of multi input capture */
328 IfxCcu6_Timer timer; /**< \brief Timer handle */
329 } IfxCcu6_Icu_ChannelConfig;
330
331 /** \brief Configuration structure of the module
332 */
333 typedef struct
334 {
335 Ifx_CCU6 *ccu6; /**< \brief Pointer to the base of CCU6 registers */
336 float32 frequency; /**< \brief Specify expected PWM frequency in Hertz */
337 Ifx_TimerValue period; /**< \brief PWM period in ticks */
338 IfxCcu6_Icu_Clock clock; /**< \brief Structure for clock configuration */
339 IfxCcu6_T12CountMode countMode; /**< \brief Operating mode of Timer 12 */
340 uint16 counterValue; /**< \brief 16-bit counter value of Timer12 */
341 } IfxCcu6_Icu_Config;
342
343 /** \} */
344
345 /** \addtogroup IfxLld_Ccu6_Icu_Module_Initialize_Functions
346 * \{ */
347
348 /******************************************************************************/
349 /*-------------------------Global Function Prototypes-------------------------*/
350 /******************************************************************************/
351
352 /** \brief Initialises the module with default configuration
353 * \param icu Module handle
354 * \param config Configuration structure of the module
355 * \return None
356 *
357 * A coding example can be found in \ref IfxLld_Ccu6_Icu_Usage
358 *
359 */
360 IFX_EXTERN void IfxCcu6_Icu_initModule(IfxCcu6_Icu *icu, const IfxCcu6_Icu_Config *config);
361
362 /** \brief Fills the config structure with default values
363 * \param config Configuration structure of the module
364 * \param ccu6 Pointer to the base of CCU6 registers
365 * \return None
366 *
367 * A coding example can be found in \ref IfxLld_Ccu6_Icu_Usage
368 *
369 */
370 IFX_EXTERN void IfxCcu6_Icu_initModuleConfig(IfxCcu6_Icu_Config *config, Ifx_CCU6 *ccu6);
371
372 /** \} */
373
374 /** \addtogroup IfxLld_Ccu6_Icu_Capture_Control_Functions
375 * \{ */
376
377 /******************************************************************************/
378 /*-------------------------Global Function Prototypes-------------------------*/
379 /******************************************************************************/
380
381 /** \brief Returns the cuurent value stored in the Compare Shadow register (current time stamp)
382 * \param channel Channel handle
383 * \return timeStamp (cuurent CC6xSR register value)
384 *
385 * A coding example can be found in \ref IfxLld_Ccu6_Icu_Usage
386 *
387 */
388 IFX_EXTERN uint32 IfxCcu6_Icu_getTimeStamp(IfxCcu6_Icu_Channel *channel);
389
390 /** \brief Starts the input capture
391 * \param channel Channel handle
392 * \return None
393 *
394 * A coding example can be found in \ref IfxLld_Ccu6_Icu_Usage
395 *
396 */
397 IFX_EXTERN void IfxCcu6_Icu_startCapture(IfxCcu6_Icu_Channel *channel);
398
399 /** \brief Stops the input capture
400 * \param channel Channel handle
401 * \return None
402 *
403 * A coding example can be found in \ref IfxLld_Ccu6_Icu_Usage
404 *
405 */
406 IFX_EXTERN void IfxCcu6_Icu_stopCapture(IfxCcu6_Icu_Channel *channel);
407
408 /** \} */
409
410 /** \addtogroup IfxLld_Ccu6_Icu_Channel_Initialize_Functions
411 * \{ */
412
413 /******************************************************************************/
414 /*-------------------------Global Function Prototypes-------------------------*/
415 /******************************************************************************/
416
417 /** \brief Initialises the channel
418 * \param channel Channel handle
419 * \param channelConfig Configuration structure of the channel
420 * \return None
421 *
422 * A coding example can be found in \ref IfxLld_Ccu6_Icu_Usage
423 *
424 */
425 IFX_EXTERN void IfxCcu6_Icu_initChannel(IfxCcu6_Icu_Channel *channel, const IfxCcu6_Icu_ChannelConfig *channelConfig);
426
427 /** \brief Fills the channel config structure with default values
428 * \param channelConfig Configuration structure of the channel
429 * \param ccu6 Pointer to the base of CCU6 registers
430 * \return None
431 *
432 * A coding example can be found in \ref IfxLld_Ccu6_Icu_Usage
433 *
434 */
435 IFX_EXTERN void IfxCcu6_Icu_initChannelConfig(IfxCcu6_Icu_ChannelConfig *channelConfig, Ifx_CCU6 *ccu6);
436
437 /** \} */
438
439 #endif /* IFXCCU6_ICU_H */
IfxCcu6_Cc60in_In
CC60IN pin mapping structure.
Definition: IfxCcu6_PinMap.h:56
IfxCcu6_Cc61in_In
CC61IN pin mapping structure.
Definition: IfxCcu6_PinMap.h:64
IfxCcu6_Cc62in_In
CC62IN pin mapping structure.
Definition: IfxCcu6_PinMap.h:72
IfxCcu6_Icu_Channel::channelId
IfxCcu6_T12Channel channelId
Capture compare channel of the Timer12.
Definition: IfxCcu6_Icu.h:309
IfxCcu6_Icu_TriggerConfig::extInputTrigger
IfxCcu6_T12hr_In * extInputTrigger
External input signal selection for timer.
Definition: IfxCcu6_Icu.h:286
Icu.h
ICU interface.
IfxCcu6_Icu_ChannelConfig::interrupt3
IfxCcu6_Icu_InterruptConfig interrupt3
Structure for third interrupt configuration.
Definition: IfxCcu6_Icu.h:323
IfxCcu6_Icu_ChannelConfig
Configuration structure of the channel.
Definition: IfxCcu6_Icu.h:315
Icu_Config
Configuration structure of the Icu interface.
Definition: Icu.h:72
IfxCcu6_Icu_Pins::ccposxInputMode
IfxPort_InputMode ccposxInputMode
The CCPOSx pin input mode which should be configured.
Definition: IfxCcu6_Icu.h:275
IfxCcu6_Icu_Channel::channelMode
IfxCcu6_T12ChannelMode channelMode
The operating mode for the T12 channel.
Definition: IfxCcu6_Icu.h:310
IfxCcu6_Ccpos1_In
CCPOS1 pin mapping structure.
Definition: IfxCcu6_PinMap.h:88
IfxCcu6_Icu_Config::countMode
IfxCcu6_T12CountMode countMode
Operating mode of Timer 12.
Definition: IfxCcu6_Icu.h:339
IfxCcu6_InterruptSource
IfxCcu6_InterruptSource
Interrupt source selection Description in Ifx_CCU.IEN.
Definition: IfxCcu6.h:179
IfxCcu6_Timer.h
CCU6 TIMER details.
IfxCcu6_Icu_ChannelConfig::pins
IfxCcu6_Icu_Pins * pins
Structure for capture input pins.
Definition: IfxCcu6_Icu.h:326
IfxCcu6_Icu_ChannelConfig::interrupt2
IfxCcu6_Icu_InterruptConfig interrupt2
Structure for second interrupt configuration.
Definition: IfxCcu6_Icu.h:322
IfxCcu6_Icu_Channel
Channel handle.
Definition: IfxCcu6_Icu.h:304
IfxCcu6_Icu::ccu6
Ifx_CCU6 * ccu6
Pointer to the base of CCU6 registers.
Definition: IfxCcu6_Icu.h:298
IfxCcu6_Icu_Config::period
Ifx_TimerValue period
PWM period in ticks.
Definition: IfxCcu6_Icu.h:337
IfxCcu6_Icu_Channel::base
Icu base
Base ICU object.
Definition: IfxCcu6_Icu.h:306
IfxCcu6_Icu_ChannelConfig::interrupt4
IfxCcu6_Icu_InterruptConfig interrupt4
Structure for fourth interrupt configuration.
Definition: IfxCcu6_Icu.h:324
IfxCcu6_Icu_Pins::cc62In
IFX_CONST IfxCcu6_Cc62in_In * cc62In
CC62 input signal.
Definition: IfxCcu6_Icu.h:270
IfxCcu6_Icu_ChannelConfig::multiInputCaptureEnabled
boolean multiInputCaptureEnabled
Choice of multi input capture.
Definition: IfxCcu6_Icu.h:327
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxCcu6_Icu_Pins::t1xhrInputMode
IfxPort_InputMode t1xhrInputMode
The T1xHR pin input mode which should be configured.
Definition: IfxCcu6_Icu.h:278
float32
float float32
Definition: Platform_Types.h:170
IfxCcu6_Icu_Clock::extClockInput
IfxCcu6_T12hr_In * extClockInput
External input signal selection for timer 12.
Definition: IfxCcu6_Icu.h:250
IfxCcu6_Icu_initChannelConfig
IFX_EXTERN void IfxCcu6_Icu_initChannelConfig(IfxCcu6_Icu_ChannelConfig *channelConfig, Ifx_CCU6 *ccu6)
Fills the channel config structure with default values.
Definition: IfxCcu6_Icu.c:192
IfxCcu6_Icu_initChannel
IFX_EXTERN void IfxCcu6_Icu_initChannel(IfxCcu6_Icu_Channel *channel, const IfxCcu6_Icu_ChannelConfig *channelConfig)
Initialises the channel.
Definition: IfxCcu6_Icu.c:63
IfxCcu6_Icu_Pins::t12hr
IFX_CONST IfxCcu6_T12hr_In * t12hr
T12HR input signal.
Definition: IfxCcu6_Icu.h:276
IfxCcu6_Icu_Pins::t13hr
IFX_CONST IfxCcu6_T13hr_In * t13hr
T13HR input signal.
Definition: IfxCcu6_Icu.h:277
IfxCcu6_Icu_Config
Configuration structure of the module.
Definition: IfxCcu6_Icu.h:333
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxCcu6_Timer
Module handle.
Definition: IfxCcu6_Timer.h:293
IfxCcu6_Icu_Pins::cc60In
IFX_CONST IfxCcu6_Cc60in_In * cc60In
CC60 input signal.
Definition: IfxCcu6_Icu.h:268
IfxCcu6_Icu
Module handle.
Definition: IfxCcu6_Icu.h:296
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxCcu6_Icu_Config::frequency
float32 frequency
Specify expected PWM frequency in Hertz.
Definition: IfxCcu6_Icu.h:336
IfxCcu6_Ccpos0_In
CCPOS0 pin mapping structure.
Definition: IfxCcu6_PinMap.h:80
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxCcu6_Icu_Config::clock
IfxCcu6_Icu_Clock clock
Structure for clock configuration.
Definition: IfxCcu6_Icu.h:338
IfxCcu6_Icu_TriggerConfig::extInputTriggerMode
IfxCcu6_ExternalTriggerMode extInputTriggerMode
Event of signal T12HR that can set the run bit T12R by HW.
Definition: IfxCcu6_Icu.h:287
IfxCcu6_CountingInputMode
IfxCcu6_CountingInputMode
Defines the input event leading to a counting action of the timer (T12 / T13) Definition in Ifx_CCU...
Definition: IfxCcu6.h:124
IfxCcu6_T12Channel
IfxCcu6_T12Channel
Capture compare channel of Timer12.
Definition: IfxCcu6.h:258
IfxCcu6_T12ChannelMode
IfxCcu6_T12ChannelMode
The operating mode for the T12 channels are defined by the bit fields Ifx_CCU.T12MSEL.MSEL6x.
Definition: IfxCcu6.h:267
IfxCcu6_Icu_Pins::ccpos1
IFX_CONST IfxCcu6_Ccpos1_In * ccpos1
CCPOS2 input signal.
Definition: IfxCcu6_Icu.h:272
IfxCcu6.h
CCU6 basic functionality.
IfxCcu6_ServiceRequest
IfxCcu6_ServiceRequest
Selection of service request outputs.
Definition: IfxCcu6.h:230
IfxCcu6_T12CountMode
IfxCcu6_T12CountMode
Operating mode of Timer 12 Definition in Ifx_CCU.TCTR0.B.CTM.
Definition: IfxCcu6.h:297
IfxCcu6_Icu_getTimeStamp
IFX_EXTERN uint32 IfxCcu6_Icu_getTimeStamp(IfxCcu6_Icu_Channel *channel)
Returns the cuurent value stored in the Compare Shadow register (current time stamp) ...
Definition: IfxCcu6_Icu.c:53
IfxCcu6_Icu_Clock::extClockEnabled
boolean extClockEnabled
external clock enable / disable selection
Definition: IfxCcu6_Icu.h:249
IfxCcu6_Icu_Pins::ccpos0
IFX_CONST IfxCcu6_Ccpos0_In * ccpos0
CCPOS0 input signal.
Definition: IfxCcu6_Icu.h:271
IfxCcu6_Icu_stopCapture
IFX_EXTERN void IfxCcu6_Icu_stopCapture(IfxCcu6_Icu_Channel *channel)
Stops the input capture.
Definition: IfxCcu6_Icu.c:333
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:151
IfxCcu6_ExternalTriggerMode
IfxCcu6_ExternalTriggerMode
Defines the event of signal T1xHR that can set the run bit T1xR by HW Definition in Ifx_CCU...
Definition: IfxCcu6.h:149
IfxCcu6_Icu_Channel::trigger
IfxCcu6_Icu_TriggerConfig trigger
Structure for trigger configuration.
Definition: IfxCcu6_Icu.h:308
IfxCcu6_Icu_initModule
IFX_EXTERN void IfxCcu6_Icu_initModule(IfxCcu6_Icu *icu, const IfxCcu6_Icu_Config *config)
Initialises the module with default configuration.
Definition: IfxCcu6_Icu.c:228
IfxCcu6_T12hr_In
T12HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:112
IfxCcu6_T13hr_In
T13HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:120
IfxCcu6_Icu_Pins::pinDriver
IfxPort_PadDriver pinDriver
Pad Driver.
Definition: IfxCcu6_Icu.h:279
IfxCcu6_Icu_InterruptConfig::source
IfxCcu6_InterruptSource source
Interrupt source selection.
Definition: IfxCcu6_Icu.h:258
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxCcu6_Icu_initModuleConfig
IFX_EXTERN void IfxCcu6_Icu_initModuleConfig(IfxCcu6_Icu_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values.
Definition: IfxCcu6_Icu.c:291
IfxCcu6_Icu_InterruptConfig::typeOfService
IfxSrc_Tos typeOfService
type of interrupt service
Definition: IfxCcu6_Icu.h:261
IfxCcu6_Icu_InterruptConfig
Structure for interrupt configuration.
Definition: IfxCcu6_Icu.h:256
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:81
IfxCcu6_Icu_ChannelConfig::interrupt1
IfxCcu6_Icu_InterruptConfig interrupt1
Structure for first interrupt configuration.
Definition: IfxCcu6_Icu.h:321
IfxCcu6_Icu_TriggerConfig
Configuration structure for external triggers.
Definition: IfxCcu6_Icu.h:284
IfxCcu6_Icu_Pins::ccpos2
IFX_CONST IfxCcu6_Ccpos2_In * ccpos2
CCPOS2 input signal.
Definition: IfxCcu6_Icu.h:273
IfxCcu6_Icu_Pins::cc6xInputMode
IfxPort_InputMode cc6xInputMode
The CC6x pin input mode which should be configured.
Definition: IfxCcu6_Icu.h:274
IfxCcu6_Icu_Config::counterValue
uint16 counterValue
16-bit counter value of Timer12
Definition: IfxCcu6_Icu.h:340
IfxCcu6_Icu_Clock
Structure for clock configuration.
Definition: IfxCcu6_Icu.h:247
Icu_s
Structure of the Icu interface.
Definition: Icu.h:63
IfxCcu6_Ccpos2_In
CCPOS2 pin mapping structure.
Definition: IfxCcu6_PinMap.h:96
IfxCcu6_Icu_InterruptConfig::priority
uint16 priority
Interrupt priority.
Definition: IfxCcu6_Icu.h:260
IfxCcu6_Icu_ChannelConfig::timer
IfxCcu6_Timer timer
Timer handle.
Definition: IfxCcu6_Icu.h:328
IfxCcu6_Icu_Pins::cc61In
IFX_CONST IfxCcu6_Cc61in_In * cc61In
CC61 input signal.
Definition: IfxCcu6_Icu.h:269
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
IfxCcu6_Icu_ChannelConfig::base
Icu_Config base
Base configuration.
Definition: IfxCcu6_Icu.h:317
IfxCcu6_Icu_Clock::countingInputMode
IfxCcu6_CountingInputMode countingInputMode
Input event leading to a counting action of the timer T12.
Definition: IfxCcu6_Icu.h:251
IfxCcu6_Icu_InterruptConfig::serviceRequest
IfxCcu6_ServiceRequest serviceRequest
Selection of service request outputs.
Definition: IfxCcu6_Icu.h:259
IfxCcu6_Icu_Pins
Structure for capture input pins.
Definition: IfxCcu6_Icu.h:266
IfxCcu6_Icu::captureFrequency
float32 captureFrequency
Configured CCU6 capture frequency ( set to 0 for external counting mode)
Definition: IfxCcu6_Icu.h:299
IfxCcu6_Icu_startCapture
IFX_EXTERN void IfxCcu6_Icu_startCapture(IfxCcu6_Icu_Channel *channel)
Starts the input capture.
Definition: IfxCcu6_Icu.c:307


iLLD_TC38A: IfxCcu6_PinMap.c Source File

  • _PinMap
IfxCcu6_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6_PinMap.c
3 * \brief CCU6 I/O map
4 * \ingroup IfxLld_Ccu6
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "IfxCcu6_PinMap.h"
44
45 IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_0_OUT = {&MODULE_CCU60, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt7};
46 IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_6_OUT = {&MODULE_CCU60, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt7};
47 IfxCcu6_Cc60_Out IfxCcu60_CC60_P11_12_OUT = {&MODULE_CCU60, {&MODULE_P11,12}, IfxPort_OutputIdx_alt7};
48 IfxCcu6_Cc60_Out IfxCcu60_CC60_P15_6_OUT = {&MODULE_CCU60, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt7};
49 IfxCcu6_Cc60_Out IfxCcu60_CC60_P34_2_OUT = {&MODULE_CCU60, {&MODULE_P34, 2}, IfxPort_OutputIdx_alt7};
50 IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_1_OUT = {&MODULE_CCU61, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt7};
51 IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_7_OUT = {&MODULE_CCU61, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt7};
52 IfxCcu6_Cc60_Out IfxCcu61_CC60_P20_8_OUT = {&MODULE_CCU61, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt7};
53 IfxCcu6_Cc60_Out IfxCcu61_CC60_P33_13_OUT = {&MODULE_CCU61, {&MODULE_P33,13}, IfxPort_OutputIdx_alt7};
54 IfxCcu6_Cc60in_In IfxCcu60_CC60INA_P02_0_IN = {&MODULE_CCU60, {&MODULE_P02, 0}, Ifx_RxSel_a};
55 IfxCcu6_Cc60in_In IfxCcu60_CC60INB_P00_1_IN = {&MODULE_CCU60, {&MODULE_P00, 1}, Ifx_RxSel_b};
56 IfxCcu6_Cc60in_In IfxCcu60_CC60INC_P02_6_IN = {&MODULE_CCU60, {&MODULE_P02, 6}, Ifx_RxSel_c};
57 IfxCcu6_Cc60in_In IfxCcu61_CC60INA_P00_1_IN = {&MODULE_CCU61, {&MODULE_P00, 1}, Ifx_RxSel_a};
58 IfxCcu6_Cc60in_In IfxCcu61_CC60INB_P02_0_IN = {&MODULE_CCU61, {&MODULE_P02, 0}, Ifx_RxSel_b};
59 IfxCcu6_Cc60in_In IfxCcu61_CC60INC_P00_7_IN = {&MODULE_CCU61, {&MODULE_P00, 7}, Ifx_RxSel_c};
60 IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_2_OUT = {&MODULE_CCU60, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt7};
61 IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_7_OUT = {&MODULE_CCU60, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt7};
62 IfxCcu6_Cc61_Out IfxCcu60_CC61_P11_11_OUT = {&MODULE_CCU60, {&MODULE_P11,11}, IfxPort_OutputIdx_alt7};
63 IfxCcu6_Cc61_Out IfxCcu60_CC61_P15_5_OUT = {&MODULE_CCU60, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt7};
64 IfxCcu6_Cc61_Out IfxCcu60_CC61_P34_4_OUT = {&MODULE_CCU60, {&MODULE_P34, 4}, IfxPort_OutputIdx_alt7};
65 IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_3_OUT = {&MODULE_CCU61, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt7};
66 IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_8_OUT = {&MODULE_CCU61, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt7};
67 IfxCcu6_Cc61_Out IfxCcu61_CC61_P20_9_OUT = {&MODULE_CCU61, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt7};
68 IfxCcu6_Cc61_Out IfxCcu61_CC61_P33_11_OUT = {&MODULE_CCU61, {&MODULE_P33,11}, IfxPort_OutputIdx_alt7};
69 IfxCcu6_Cc61in_In IfxCcu60_CC61INA_P02_2_IN = {&MODULE_CCU60, {&MODULE_P02, 2}, Ifx_RxSel_a};
70 IfxCcu6_Cc61in_In IfxCcu60_CC61INB_P00_3_IN = {&MODULE_CCU60, {&MODULE_P00, 3}, Ifx_RxSel_b};
71 IfxCcu6_Cc61in_In IfxCcu60_CC61INC_P02_7_IN = {&MODULE_CCU60, {&MODULE_P02, 7}, Ifx_RxSel_c};
72 IfxCcu6_Cc61in_In IfxCcu61_CC61INA_P00_3_IN = {&MODULE_CCU61, {&MODULE_P00, 3}, Ifx_RxSel_a};
73 IfxCcu6_Cc61in_In IfxCcu61_CC61INB_P02_2_IN = {&MODULE_CCU61, {&MODULE_P02, 2}, Ifx_RxSel_b};
74 IfxCcu6_Cc61in_In IfxCcu61_CC61INC_P00_8_IN = {&MODULE_CCU61, {&MODULE_P00, 8}, Ifx_RxSel_c};
75 IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_4_OUT = {&MODULE_CCU60, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt7};
76 IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_8_OUT = {&MODULE_CCU60, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt7};
77 IfxCcu6_Cc62_Out IfxCcu60_CC62_P11_10_OUT = {&MODULE_CCU60, {&MODULE_P11,10}, IfxPort_OutputIdx_alt7};
78 IfxCcu6_Cc62_Out IfxCcu60_CC62_P15_4_OUT = {&MODULE_CCU60, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt7};
79 IfxCcu6_Cc62_Out IfxCcu60_CC62_P33_14_OUT = {&MODULE_CCU60, {&MODULE_P33,14}, IfxPort_OutputIdx_alt7};
80 IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_5_OUT = {&MODULE_CCU61, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt7};
81 IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_9_OUT = {&MODULE_CCU61, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt7};
82 IfxCcu6_Cc62_Out IfxCcu61_CC62_P20_10_OUT = {&MODULE_CCU61, {&MODULE_P20,10}, IfxPort_OutputIdx_alt7};
83 IfxCcu6_Cc62_Out IfxCcu61_CC62_P33_9_OUT = {&MODULE_CCU61, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt7};
84 IfxCcu6_Cc62in_In IfxCcu60_CC62INA_P02_4_IN = {&MODULE_CCU60, {&MODULE_P02, 4}, Ifx_RxSel_a};
85 IfxCcu6_Cc62in_In IfxCcu60_CC62INB_P00_5_IN = {&MODULE_CCU60, {&MODULE_P00, 5}, Ifx_RxSel_b};
86 IfxCcu6_Cc62in_In IfxCcu60_CC62INC_P02_8_IN = {&MODULE_CCU60, {&MODULE_P02, 8}, Ifx_RxSel_c};
87 IfxCcu6_Cc62in_In IfxCcu61_CC62INA_P00_5_IN = {&MODULE_CCU61, {&MODULE_P00, 5}, Ifx_RxSel_a};
88 IfxCcu6_Cc62in_In IfxCcu61_CC62INB_P02_4_IN = {&MODULE_CCU61, {&MODULE_P02, 4}, Ifx_RxSel_b};
89 IfxCcu6_Cc62in_In IfxCcu61_CC62INC_P00_9_IN = {&MODULE_CCU61, {&MODULE_P00, 9}, Ifx_RxSel_c};
90 IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0A_P02_6_IN = {&MODULE_CCU60, {&MODULE_P02, 6}, Ifx_RxSel_a};
91 IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0C_P10_4_IN = {&MODULE_CCU60, {&MODULE_P10, 4}, Ifx_RxSel_c};
92 IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0D_P40_0_IN = {&MODULE_CCU60, {&MODULE_P40, 0}, Ifx_RxSel_d};
93 IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0A_P00_7_IN = {&MODULE_CCU61, {&MODULE_P00, 7}, Ifx_RxSel_a};
94 IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0C_P33_7_IN = {&MODULE_CCU61, {&MODULE_P33, 7}, Ifx_RxSel_c};
95 IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0D_P40_5_IN = {&MODULE_CCU61, {&MODULE_P40, 5}, Ifx_RxSel_d};
96 IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1A_P02_7_IN = {&MODULE_CCU60, {&MODULE_P02, 7}, Ifx_RxSel_a};
97 IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1B_P40_1_IN = {&MODULE_CCU60, {&MODULE_P40, 1}, Ifx_RxSel_b};
98 IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1C_P10_7_IN = {&MODULE_CCU60, {&MODULE_P10, 7}, Ifx_RxSel_c};
99 IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1D_P40_2_IN = {&MODULE_CCU60, {&MODULE_P40, 2}, Ifx_RxSel_d};
100 IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1A_P00_8_IN = {&MODULE_CCU61, {&MODULE_P00, 8}, Ifx_RxSel_a};
101 IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1B_P40_6_IN = {&MODULE_CCU61, {&MODULE_P40, 6}, Ifx_RxSel_b};
102 IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1C_P33_6_IN = {&MODULE_CCU61, {&MODULE_P33, 6}, Ifx_RxSel_c};
103 IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1D_P40_7_IN = {&MODULE_CCU61, {&MODULE_P40, 7}, Ifx_RxSel_d};
104 IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2A_P02_8_IN = {&MODULE_CCU60, {&MODULE_P02, 8}, Ifx_RxSel_a};
105 IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2B_P40_3_IN = {&MODULE_CCU60, {&MODULE_P40, 3}, Ifx_RxSel_b};
106 IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2C_P10_8_IN = {&MODULE_CCU60, {&MODULE_P10, 8}, Ifx_RxSel_c};
107 IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2D_P40_4_IN = {&MODULE_CCU60, {&MODULE_P40, 4}, Ifx_RxSel_d};
108 IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2A_P00_9_IN = {&MODULE_CCU61, {&MODULE_P00, 9}, Ifx_RxSel_a};
109 IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2B_P40_8_IN = {&MODULE_CCU61, {&MODULE_P40, 8}, Ifx_RxSel_b};
110 IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2C_P33_5_IN = {&MODULE_CCU61, {&MODULE_P33, 5}, Ifx_RxSel_c};
111 IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2D_P40_9_IN = {&MODULE_CCU61, {&MODULE_P40, 9}, Ifx_RxSel_d};
112 IfxCcu6_Cout60_Out IfxCcu60_COUT60_P02_1_OUT = {&MODULE_CCU60, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt7};
113 IfxCcu6_Cout60_Out IfxCcu60_COUT60_P11_9_OUT = {&MODULE_CCU60, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt7};
114 IfxCcu6_Cout60_Out IfxCcu60_COUT60_P15_7_OUT = {&MODULE_CCU60, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt7};
115 IfxCcu6_Cout60_Out IfxCcu60_COUT60_P34_3_OUT = {&MODULE_CCU60, {&MODULE_P34, 3}, IfxPort_OutputIdx_alt7};
116 IfxCcu6_Cout60_Out IfxCcu61_COUT60_P00_2_OUT = {&MODULE_CCU61, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt7};
117 IfxCcu6_Cout60_Out IfxCcu61_COUT60_P20_11_OUT = {&MODULE_CCU61, {&MODULE_P20,11}, IfxPort_OutputIdx_alt7};
118 IfxCcu6_Cout60_Out IfxCcu61_COUT60_P33_12_OUT = {&MODULE_CCU61, {&MODULE_P33,12}, IfxPort_OutputIdx_alt7};
119 IfxCcu6_Cout61_Out IfxCcu60_COUT61_P02_3_OUT = {&MODULE_CCU60, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt7};
120 IfxCcu6_Cout61_Out IfxCcu60_COUT61_P11_6_OUT = {&MODULE_CCU60, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt7};
121 IfxCcu6_Cout61_Out IfxCcu60_COUT61_P15_8_OUT = {&MODULE_CCU60, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt7};
122 IfxCcu6_Cout61_Out IfxCcu60_COUT61_P34_5_OUT = {&MODULE_CCU60, {&MODULE_P34, 5}, IfxPort_OutputIdx_alt7};
123 IfxCcu6_Cout61_Out IfxCcu61_COUT61_P00_4_OUT = {&MODULE_CCU61, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt7};
124 IfxCcu6_Cout61_Out IfxCcu61_COUT61_P20_12_OUT = {&MODULE_CCU61, {&MODULE_P20,12}, IfxPort_OutputIdx_alt7};
125 IfxCcu6_Cout61_Out IfxCcu61_COUT61_P33_10_OUT = {&MODULE_CCU61, {&MODULE_P33,10}, IfxPort_OutputIdx_alt7};
126 IfxCcu6_Cout62_Out IfxCcu60_COUT62_P02_5_OUT = {&MODULE_CCU60, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt7};
127 IfxCcu6_Cout62_Out IfxCcu60_COUT62_P11_3_OUT = {&MODULE_CCU60, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt7};
128 IfxCcu6_Cout62_Out IfxCcu60_COUT62_P14_0_OUT = {&MODULE_CCU60, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt7};
129 IfxCcu6_Cout62_Out IfxCcu60_COUT62_P33_15_OUT = {&MODULE_CCU60, {&MODULE_P33,15}, IfxPort_OutputIdx_alt7};
130 IfxCcu6_Cout62_Out IfxCcu61_COUT62_P00_6_OUT = {&MODULE_CCU61, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt7};
131 IfxCcu6_Cout62_Out IfxCcu61_COUT62_P20_13_OUT = {&MODULE_CCU61, {&MODULE_P20,13}, IfxPort_OutputIdx_alt7};
132 IfxCcu6_Cout62_Out IfxCcu61_COUT62_P33_8_OUT = {&MODULE_CCU61, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt7};
133 IfxCcu6_Cout63_Out IfxCcu60_COUT63_P00_0_OUT = {&MODULE_CCU60, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt7};
134 IfxCcu6_Cout63_Out IfxCcu60_COUT63_P11_2_OUT = {&MODULE_CCU60, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt7};
135 IfxCcu6_Cout63_Out IfxCcu60_COUT63_P14_1_OUT = {&MODULE_CCU60, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt7};
136 IfxCcu6_Cout63_Out IfxCcu60_COUT63_P32_4_OUT = {&MODULE_CCU60, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt7};
137 IfxCcu6_Cout63_Out IfxCcu60_COUT63_P34_1_OUT = {&MODULE_CCU60, {&MODULE_P34, 1}, IfxPort_OutputIdx_alt7};
138 IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_10_OUT = {&MODULE_CCU61, {&MODULE_P00,10}, IfxPort_OutputIdx_alt7};
139 IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_12_OUT = {&MODULE_CCU61, {&MODULE_P00,12}, IfxPort_OutputIdx_alt7};
140 IfxCcu6_Cout63_Out IfxCcu61_COUT63_P20_7_OUT = {&MODULE_CCU61, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt7};
141 IfxCcu6_Ctrap_In IfxCcu60_CTRAPA_P00_11_IN = {&MODULE_CCU60, {&MODULE_P00,11}, Ifx_RxSel_a};
142 IfxCcu6_Ctrap_In IfxCcu61_CTRAPA_P00_0_IN = {&MODULE_CCU61, {&MODULE_P00, 0}, Ifx_RxSel_a};
143 IfxCcu6_Ctrap_In IfxCcu61_CTRAPC_P33_4_IN = {&MODULE_CCU61, {&MODULE_P33, 4}, Ifx_RxSel_c};
144 IfxCcu6_T12hr_In IfxCcu60_T12HRB_P00_7_IN = {&MODULE_CCU60, {&MODULE_P00, 7}, Ifx_RxSel_b};
145 IfxCcu6_T12hr_In IfxCcu60_T12HRC_P00_9_IN = {&MODULE_CCU60, {&MODULE_P00, 9}, Ifx_RxSel_c};
146 IfxCcu6_T12hr_In IfxCcu60_T12HRE_P00_0_IN = {&MODULE_CCU60, {&MODULE_P00, 0}, Ifx_RxSel_e};
147 IfxCcu6_T12hr_In IfxCcu61_T12HRB_P02_6_IN = {&MODULE_CCU61, {&MODULE_P02, 6}, Ifx_RxSel_b};
148 IfxCcu6_T12hr_In IfxCcu61_T12HRC_P02_8_IN = {&MODULE_CCU61, {&MODULE_P02, 8}, Ifx_RxSel_c};
149 IfxCcu6_T12hr_In IfxCcu61_T12HRE_P00_11_IN = {&MODULE_CCU61, {&MODULE_P00,11}, Ifx_RxSel_e};
150 IfxCcu6_T13hr_In IfxCcu60_T13HRB_P00_8_IN = {&MODULE_CCU60, {&MODULE_P00, 8}, Ifx_RxSel_b};
151 IfxCcu6_T13hr_In IfxCcu60_T13HRC_P00_9_IN = {&MODULE_CCU60, {&MODULE_P00, 9}, Ifx_RxSel_c};
152 IfxCcu6_T13hr_In IfxCcu61_T13HRB_P02_7_IN = {&MODULE_CCU61, {&MODULE_P02, 7}, Ifx_RxSel_b};
153 IfxCcu6_T13hr_In IfxCcu61_T13HRC_P02_8_IN = {&MODULE_CCU61, {&MODULE_P02, 8}, Ifx_RxSel_c};
154
155
156 const IfxCcu6_Cc60_Out *IfxCcu6_Cc60_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS] = {
157 {
158 &IfxCcu60_CC60_P02_0_OUT,
159 &IfxCcu60_CC60_P02_6_OUT,
160 &IfxCcu60_CC60_P11_12_OUT,
161 &IfxCcu60_CC60_P15_6_OUT,
162 &IfxCcu60_CC60_P34_2_OUT
163 },
164 {
165 &IfxCcu61_CC60_P00_1_OUT,
166 &IfxCcu61_CC60_P00_7_OUT,
167 &IfxCcu61_CC60_P20_8_OUT,
168 &IfxCcu61_CC60_P33_13_OUT,
169 NULL_PTR
170 }
171 };
172
173 const IfxCcu6_Cc60in_In *IfxCcu6_Cc60in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS] = {
174 {
175 &IfxCcu60_CC60INA_P02_0_IN,
176 &IfxCcu60_CC60INB_P00_1_IN,
177 &IfxCcu60_CC60INC_P02_6_IN
178 },
179 {
180 &IfxCcu61_CC60INA_P00_1_IN,
181 &IfxCcu61_CC60INB_P02_0_IN,
182 &IfxCcu61_CC60INC_P00_7_IN
183 }
184 };
185
186 const IfxCcu6_Cc61_Out *IfxCcu6_Cc61_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS] = {
187 {
188 &IfxCcu60_CC61_P02_2_OUT,
189 &IfxCcu60_CC61_P02_7_OUT,
190 &IfxCcu60_CC61_P11_11_OUT,
191 &IfxCcu60_CC61_P15_5_OUT,
192 &IfxCcu60_CC61_P34_4_OUT
193 },
194 {
195 &IfxCcu61_CC61_P00_3_OUT,
196 &IfxCcu61_CC61_P00_8_OUT,
197 &IfxCcu61_CC61_P20_9_OUT,
198 &IfxCcu61_CC61_P33_11_OUT,
199 NULL_PTR
200 }
201 };
202
203 const IfxCcu6_Cc61in_In *IfxCcu6_Cc61in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS] = {
204 {
205 &IfxCcu60_CC61INA_P02_2_IN,
206 &IfxCcu60_CC61INB_P00_3_IN,
207 &IfxCcu60_CC61INC_P02_7_IN
208 },
209 {
210 &IfxCcu61_CC61INA_P00_3_IN,
211 &IfxCcu61_CC61INB_P02_2_IN,
212 &IfxCcu61_CC61INC_P00_8_IN
213 }
214 };
215
216 const IfxCcu6_Cc62_Out *IfxCcu6_Cc62_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS] = {
217 {
218 &IfxCcu60_CC62_P02_4_OUT,
219 &IfxCcu60_CC62_P02_8_OUT,
220 &IfxCcu60_CC62_P11_10_OUT,
221 &IfxCcu60_CC62_P15_4_OUT,
222 &IfxCcu60_CC62_P33_14_OUT
223 },
224 {
225 &IfxCcu61_CC62_P00_5_OUT,
226 &IfxCcu61_CC62_P00_9_OUT,
227 &IfxCcu61_CC62_P20_10_OUT,
228 &IfxCcu61_CC62_P33_9_OUT,
229 NULL_PTR
230 }
231 };
232
233 const IfxCcu6_Cc62in_In *IfxCcu6_Cc62in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS] = {
234 {
235 &IfxCcu60_CC62INA_P02_4_IN,
236 &IfxCcu60_CC62INB_P00_5_IN,
237 &IfxCcu60_CC62INC_P02_8_IN
238 },
239 {
240 &IfxCcu61_CC62INA_P00_5_IN,
241 &IfxCcu61_CC62INB_P02_4_IN,
242 &IfxCcu61_CC62INC_P00_9_IN
243 }
244 };
245
246 const IfxCcu6_Ccpos0_In *IfxCcu6_Ccpos0_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS] = {
247 {
248 &IfxCcu60_CCPOS0A_P02_6_IN,
249 NULL_PTR,
250 &IfxCcu60_CCPOS0C_P10_4_IN,
251 &IfxCcu60_CCPOS0D_P40_0_IN
252 },
253 {
254 &IfxCcu61_CCPOS0A_P00_7_IN,
255 NULL_PTR,
256 &IfxCcu61_CCPOS0C_P33_7_IN,
257 &IfxCcu61_CCPOS0D_P40_5_IN
258 }
259 };
260
261 const IfxCcu6_Ccpos1_In *IfxCcu6_Ccpos1_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS] = {
262 {
263 &IfxCcu60_CCPOS1A_P02_7_IN,
264 &IfxCcu60_CCPOS1B_P40_1_IN,
265 &IfxCcu60_CCPOS1C_P10_7_IN,
266 &IfxCcu60_CCPOS1D_P40_2_IN
267 },
268 {
269 &IfxCcu61_CCPOS1A_P00_8_IN,
270 &IfxCcu61_CCPOS1B_P40_6_IN,
271 &IfxCcu61_CCPOS1C_P33_6_IN,
272 &IfxCcu61_CCPOS1D_P40_7_IN
273 }
274 };
275
276 const IfxCcu6_Ccpos2_In *IfxCcu6_Ccpos2_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS] = {
277 {
278 &IfxCcu60_CCPOS2A_P02_8_IN,
279 &IfxCcu60_CCPOS2B_P40_3_IN,
280 &IfxCcu60_CCPOS2C_P10_8_IN,
281 &IfxCcu60_CCPOS2D_P40_4_IN
282 },
283 {
284 &IfxCcu61_CCPOS2A_P00_9_IN,
285 &IfxCcu61_CCPOS2B_P40_8_IN,
286 &IfxCcu61_CCPOS2C_P33_5_IN,
287 &IfxCcu61_CCPOS2D_P40_9_IN
288 }
289 };
290
291 const IfxCcu6_Cout60_Out *IfxCcu6_Cout60_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS] = {
292 {
293 &IfxCcu60_COUT60_P02_1_OUT,
294 &IfxCcu60_COUT60_P11_9_OUT,
295 &IfxCcu60_COUT60_P15_7_OUT,
296 &IfxCcu60_COUT60_P34_3_OUT
297 },
298 {
299 &IfxCcu61_COUT60_P00_2_OUT,
300 &IfxCcu61_COUT60_P20_11_OUT,
301 &IfxCcu61_COUT60_P33_12_OUT,
302 NULL_PTR
303 }
304 };
305
306 const IfxCcu6_Cout61_Out *IfxCcu6_Cout61_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS] = {
307 {
308 &IfxCcu60_COUT61_P02_3_OUT,
309 &IfxCcu60_COUT61_P11_6_OUT,
310 &IfxCcu60_COUT61_P15_8_OUT,
311 &IfxCcu60_COUT61_P34_5_OUT
312 },
313 {
314 &IfxCcu61_COUT61_P00_4_OUT,
315 &IfxCcu61_COUT61_P20_12_OUT,
316 &IfxCcu61_COUT61_P33_10_OUT,
317 NULL_PTR
318 }
319 };
320
321 const IfxCcu6_Cout62_Out *IfxCcu6_Cout62_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS] = {
322 {
323 &IfxCcu60_COUT62_P02_5_OUT,
324 &IfxCcu60_COUT62_P11_3_OUT,
325 &IfxCcu60_COUT62_P14_0_OUT,
326 &IfxCcu60_COUT62_P33_15_OUT
327 },
328 {
329 &IfxCcu61_COUT62_P00_6_OUT,
330 &IfxCcu61_COUT62_P20_13_OUT,
331 &IfxCcu61_COUT62_P33_8_OUT,
332 NULL_PTR
333 }
334 };
335
336 const IfxCcu6_Cout63_Out *IfxCcu6_Cout63_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS] = {
337 {
338 &IfxCcu60_COUT63_P00_0_OUT,
339 &IfxCcu60_COUT63_P11_2_OUT,
340 &IfxCcu60_COUT63_P14_1_OUT,
341 &IfxCcu60_COUT63_P32_4_OUT,
342 &IfxCcu60_COUT63_P34_1_OUT
343 },
344 {
345 &IfxCcu61_COUT63_P00_10_OUT,
346 &IfxCcu61_COUT63_P00_12_OUT,
347 &IfxCcu61_COUT63_P20_7_OUT,
348 NULL_PTR,
349 NULL_PTR
350 }
351 };
352
353 const IfxCcu6_Ctrap_In *IfxCcu6_Ctrap_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS] = {
354 {
355 &IfxCcu60_CTRAPA_P00_11_IN,
356 NULL_PTR,
357 NULL_PTR
358 },
359 {
360 &IfxCcu61_CTRAPA_P00_0_IN,
361 NULL_PTR,
362 &IfxCcu61_CTRAPC_P33_4_IN
363 }
364 };
365
366 const IfxCcu6_T12hr_In *IfxCcu6_T12hr_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS] = {
367 {
368 NULL_PTR,
369 &IfxCcu60_T12HRB_P00_7_IN,
370 &IfxCcu60_T12HRC_P00_9_IN,
371 NULL_PTR,
372 &IfxCcu60_T12HRE_P00_0_IN
373 },
374 {
375 NULL_PTR,
376 &IfxCcu61_T12HRB_P02_6_IN,
377 &IfxCcu61_T12HRC_P02_8_IN,
378 NULL_PTR,
379 &IfxCcu61_T12HRE_P00_11_IN
380 }
381 };
382
383 const IfxCcu6_T13hr_In *IfxCcu6_T13hr_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS] = {
384 {
385 NULL_PTR,
386 &IfxCcu60_T13HRB_P00_8_IN,
387 &IfxCcu60_T13HRC_P00_9_IN
388 },
389 {
390 NULL_PTR,
391 &IfxCcu61_T13HRB_P02_7_IN,
392 &IfxCcu61_T13HRC_P02_8_IN
393 }
394 };
IfxCcu6_Cc60in_In
CC60IN pin mapping structure.
Definition: IfxCcu6_PinMap.h:56
IfxCcu6_Cc61in_In
CC61IN pin mapping structure.
Definition: IfxCcu6_PinMap.h:64
IfxCcu61_CCPOS1A_P00_8_IN
IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1A_P00_8_IN
Definition: IfxCcu6_PinMap.c:100
IfxCcu6_Cc62in_In
CC62IN pin mapping structure.
Definition: IfxCcu6_PinMap.h:72
IfxCcu60_CCPOS2D_P40_4_IN
IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2D_P40_4_IN
Definition: IfxCcu6_PinMap.c:107
IfxCcu61_COUT62_P00_6_OUT
IfxCcu6_Cout62_Out IfxCcu61_COUT62_P00_6_OUT
Definition: IfxCcu6_PinMap.c:130
IfxCcu60_CTRAPA_P00_11_IN
IfxCcu6_Ctrap_In IfxCcu60_CTRAPA_P00_11_IN
Definition: IfxCcu6_PinMap.c:141
IfxCcu60_COUT62_P02_5_OUT
IfxCcu6_Cout62_Out IfxCcu60_COUT62_P02_5_OUT
Definition: IfxCcu6_PinMap.c:126
IfxCcu60_T13HRB_P00_8_IN
IfxCcu6_T13hr_In IfxCcu60_T13HRB_P00_8_IN
Definition: IfxCcu6_PinMap.c:150
Ifx_RxSel_e
Definition: Ifx_Types.h:133
IfxCcu60_COUT62_P33_15_OUT
IfxCcu6_Cout62_Out IfxCcu60_COUT62_P33_15_OUT
Definition: IfxCcu6_PinMap.c:129
Ifx_RxSel_d
Definition: Ifx_Types.h:132
IfxCcu61_CC62_P33_9_OUT
IfxCcu6_Cc62_Out IfxCcu61_CC62_P33_9_OUT
Definition: IfxCcu6_PinMap.c:83
IfxCcu6_Cc62_Out
CC62 pin mapping structure.
Definition: IfxCcu6_PinMap.h:144
IfxCcu6_Ccpos1_In
CCPOS1 pin mapping structure.
Definition: IfxCcu6_PinMap.h:88
IfxCcu60_CC61INB_P00_3_IN
IfxCcu6_Cc61in_In IfxCcu60_CC61INB_P00_3_IN
Definition: IfxCcu6_PinMap.c:70
IfxCcu6_Ccpos2_In_pinTable
const IfxCcu6_Ccpos2_In * IfxCcu6_Ccpos2_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS]
Definition: IfxCcu6_PinMap.c:276
IfxCcu61_CC62_P00_9_OUT
IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_9_OUT
Definition: IfxCcu6_PinMap.c:81
IfxCcu61_CC62INB_P02_4_IN
IfxCcu6_Cc62in_In IfxCcu61_CC62INB_P02_4_IN
Definition: IfxCcu6_PinMap.c:88
IfxCcu60_CCPOS1C_P10_7_IN
IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1C_P10_7_IN
Definition: IfxCcu6_PinMap.c:98
IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS
#define IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:306
IfxCcu60_CC61INA_P02_2_IN
IfxCcu6_Cc61in_In IfxCcu60_CC61INA_P02_2_IN
Definition: IfxCcu6_PinMap.c:69
IfxCcu61_COUT60_P00_2_OUT
IfxCcu6_Cout60_Out IfxCcu61_COUT60_P00_2_OUT
Definition: IfxCcu6_PinMap.c:116
IfxCcu60_CC62INC_P02_8_IN
IfxCcu6_Cc62in_In IfxCcu60_CC62INC_P02_8_IN
Definition: IfxCcu6_PinMap.c:86
IfxCcu60_COUT63_P11_2_OUT
IfxCcu6_Cout63_Out IfxCcu60_COUT63_P11_2_OUT
Definition: IfxCcu6_PinMap.c:134
IfxCcu61_T12HRB_P02_6_IN
IfxCcu6_T12hr_In IfxCcu61_T12HRB_P02_6_IN
Definition: IfxCcu6_PinMap.c:147
IfxCcu6_Cout60_Out_pinTable
const IfxCcu6_Cout60_Out * IfxCcu6_Cout60_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS]
Definition: IfxCcu6_PinMap.c:291
IfxCcu6_Cc62_Out_pinTable
const IfxCcu6_Cc62_Out * IfxCcu6_Cc62_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS]
Definition: IfxCcu6_PinMap.c:216
IfxCcu6_Cout63_Out
COUT63 pin mapping structure.
Definition: IfxCcu6_PinMap.h:176
IfxCcu60_CC60_P34_2_OUT
IfxCcu6_Cc60_Out IfxCcu60_CC60_P34_2_OUT
Definition: IfxCcu6_PinMap.c:49
IfxCcu6_Cc60_Out
CC60 pin mapping structure.
Definition: IfxCcu6_PinMap.h:128
IfxCcu60_CC60_P02_0_OUT
IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_0_OUT
Definition: IfxCcu6_PinMap.c:45
IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:296
IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:310
IfxCcu61_CC62_P20_10_OUT
IfxCcu6_Cc62_Out IfxCcu61_CC62_P20_10_OUT
Definition: IfxCcu6_PinMap.c:82
IfxCcu6_Ctrap_In
CTRAP pin mapping structure.
Definition: IfxCcu6_PinMap.h:104
IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS
#define IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:297
Ifx_RxSel_a
Definition: Ifx_Types.h:129
IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:302
IfxCcu6_Ccpos1_In_pinTable
const IfxCcu6_Ccpos1_In * IfxCcu6_Ccpos1_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS]
Definition: IfxCcu6_PinMap.c:261
IfxCcu60_CC61_P02_2_OUT
IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_2_OUT
Definition: IfxCcu6_PinMap.c:60
IfxCcu60_CC61INC_P02_7_IN
IfxCcu6_Cc61in_In IfxCcu60_CC61INC_P02_7_IN
Definition: IfxCcu6_PinMap.c:71
IfxCcu60_CCPOS2A_P02_8_IN
IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2A_P02_8_IN
Definition: IfxCcu6_PinMap.c:104
IfxCcu6_Ctrap_In_pinTable
const IfxCcu6_Ctrap_In * IfxCcu6_Ctrap_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS]
Definition: IfxCcu6_PinMap.c:353
IfxCcu61_CCPOS2D_P40_9_IN
IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2D_P40_9_IN
Definition: IfxCcu6_PinMap.c:111
IfxCcu60_CC60INC_P02_6_IN
IfxCcu6_Cc60in_In IfxCcu60_CC60INC_P02_6_IN
Definition: IfxCcu6_PinMap.c:56
IfxCcu61_CCPOS2B_P40_8_IN
IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2B_P40_8_IN
Definition: IfxCcu6_PinMap.c:109
IfxCcu60_CCPOS0A_P02_6_IN
IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0A_P02_6_IN
Definition: IfxCcu6_PinMap.c:90
IfxCcu61_CC61INB_P02_2_IN
IfxCcu6_Cc61in_In IfxCcu61_CC61INB_P02_2_IN
Definition: IfxCcu6_PinMap.c:73
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxCcu60_CC62_P33_14_OUT
IfxCcu6_Cc62_Out IfxCcu60_CC62_P33_14_OUT
Definition: IfxCcu6_PinMap.c:79
IfxCcu61_CC61INC_P00_8_IN
IfxCcu6_Cc61in_In IfxCcu61_CC61INC_P00_8_IN
Definition: IfxCcu6_PinMap.c:74
Ifx_RxSel_b
Definition: Ifx_Types.h:130
IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:301
IfxCcu61_CTRAPA_P00_0_IN
IfxCcu6_Ctrap_In IfxCcu61_CTRAPA_P00_0_IN
Definition: IfxCcu6_PinMap.c:142
IfxCcu60_CCPOS1A_P02_7_IN
IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1A_P02_7_IN
Definition: IfxCcu6_PinMap.c:96
IfxCcu60_T12HRB_P00_7_IN
IfxCcu6_T12hr_In IfxCcu60_T12HRB_P00_7_IN
Definition: IfxCcu6_PinMap.c:144
IfxCcu60_CC61_P02_7_OUT
IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_7_OUT
Definition: IfxCcu6_PinMap.c:61
IfxCcu61_COUT60_P33_12_OUT
IfxCcu6_Cout60_Out IfxCcu61_COUT60_P33_12_OUT
Definition: IfxCcu6_PinMap.c:118
IfxCcu60_CC61_P11_11_OUT
IfxCcu6_Cc61_Out IfxCcu60_CC61_P11_11_OUT
Definition: IfxCcu6_PinMap.c:62
IfxCcu6_Cc61in_In_pinTable
const IfxCcu6_Cc61in_In * IfxCcu6_Cc61in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS]
Definition: IfxCcu6_PinMap.c:203
IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS
#define IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:295
IfxCcu60_COUT60_P11_9_OUT
IfxCcu6_Cout60_Out IfxCcu60_COUT60_P11_9_OUT
Definition: IfxCcu6_PinMap.c:113
IfxCcu60_T13HRC_P00_9_IN
IfxCcu6_T13hr_In IfxCcu60_T13HRC_P00_9_IN
Definition: IfxCcu6_PinMap.c:151
IfxCcu6_Cout62_Out
COUT62 pin mapping structure.
Definition: IfxCcu6_PinMap.h:168
IfxCcu61_COUT61_P20_12_OUT
IfxCcu6_Cout61_Out IfxCcu61_COUT61_P20_12_OUT
Definition: IfxCcu6_PinMap.c:124
IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS
#define IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:305
IfxCcu60_COUT63_P14_1_OUT
IfxCcu6_Cout63_Out IfxCcu60_COUT63_P14_1_OUT
Definition: IfxCcu6_PinMap.c:135
IfxCcu6_Ccpos0_In
CCPOS0 pin mapping structure.
Definition: IfxCcu6_PinMap.h:80
IfxCcu61_CC60_P33_13_OUT
IfxCcu6_Cc60_Out IfxCcu61_CC60_P33_13_OUT
Definition: IfxCcu6_PinMap.c:53
IfxCcu61_CC62_P00_5_OUT
IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_5_OUT
Definition: IfxCcu6_PinMap.c:80
IfxCcu60_CC60_P02_6_OUT
IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_6_OUT
Definition: IfxCcu6_PinMap.c:46
IfxCcu61_CC61_P00_3_OUT
IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_3_OUT
Definition: IfxCcu6_PinMap.c:65
IfxCcu60_COUT62_P14_0_OUT
IfxCcu6_Cout62_Out IfxCcu60_COUT62_P14_0_OUT
Definition: IfxCcu6_PinMap.c:128
IfxCcu60_COUT63_P00_0_OUT
IfxCcu6_Cout63_Out IfxCcu60_COUT63_P00_0_OUT
Definition: IfxCcu6_PinMap.c:133
IfxCcu61_CC60INC_P00_7_IN
IfxCcu6_Cc60in_In IfxCcu61_CC60INC_P00_7_IN
Definition: IfxCcu6_PinMap.c:59
IfxCcu60_CC60INA_P02_0_IN
IfxCcu6_Cc60in_In IfxCcu60_CC60INA_P02_0_IN
Definition: IfxCcu6_PinMap.c:54
IfxCcu60_T12HRC_P00_9_IN
IfxCcu6_T12hr_In IfxCcu60_T12HRC_P00_9_IN
Definition: IfxCcu6_PinMap.c:145
IfxCcu60_CC62_P02_4_OUT
IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_4_OUT
Definition: IfxCcu6_PinMap.c:75
IfxCcu61_CC60INB_P02_0_IN
IfxCcu6_Cc60in_In IfxCcu61_CC60INB_P02_0_IN
Definition: IfxCcu6_PinMap.c:58
IfxCcu60_T12HRE_P00_0_IN
IfxCcu6_T12hr_In IfxCcu60_T12HRE_P00_0_IN
Definition: IfxCcu6_PinMap.c:146
IfxCcu60_COUT60_P02_1_OUT
IfxCcu6_Cout60_Out IfxCcu60_COUT60_P02_1_OUT
Definition: IfxCcu6_PinMap.c:112
IfxCcu6_Ccpos0_In_pinTable
const IfxCcu6_Ccpos0_In * IfxCcu6_Ccpos0_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS]
Definition: IfxCcu6_PinMap.c:246
IfxCcu60_CC62_P15_4_OUT
IfxCcu6_Cc62_Out IfxCcu60_CC62_P15_4_OUT
Definition: IfxCcu6_PinMap.c:78
IfxCcu6_Cout62_Out_pinTable
const IfxCcu6_Cout62_Out * IfxCcu6_Cout62_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS]
Definition: IfxCcu6_PinMap.c:321
IfxCcu61_CCPOS0C_P33_7_IN
IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0C_P33_7_IN
Definition: IfxCcu6_PinMap.c:94
IfxCcu6_Cout60_Out
COUT60 pin mapping structure.
Definition: IfxCcu6_PinMap.h:152
IfxCcu60_COUT62_P11_3_OUT
IfxCcu6_Cout62_Out IfxCcu60_COUT62_P11_3_OUT
Definition: IfxCcu6_PinMap.c:127
IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:309
Ifx_RxSel_c
Definition: Ifx_Types.h:131
IfxCcu60_CCPOS0C_P10_4_IN
IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0C_P10_4_IN
Definition: IfxCcu6_PinMap.c:91
IfxCcu61_COUT63_P20_7_OUT
IfxCcu6_Cout63_Out IfxCcu61_COUT63_P20_7_OUT
Definition: IfxCcu6_PinMap.c:140
IfxCcu61_CC61INA_P00_3_IN
IfxCcu6_Cc61in_In IfxCcu61_CC61INA_P00_3_IN
Definition: IfxCcu6_PinMap.c:72
IfxCcu6_PinMap.h
CCU6 I/O map.
IfxCcu61_COUT63_P00_12_OUT
IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_12_OUT
Definition: IfxCcu6_PinMap.c:139
IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS
#define IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:299
IfxCcu60_COUT60_P34_3_OUT
IfxCcu6_Cout60_Out IfxCcu60_COUT60_P34_3_OUT
Definition: IfxCcu6_PinMap.c:115
IfxCcu6_T12hr_In_pinTable
const IfxCcu6_T12hr_In * IfxCcu6_T12hr_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS]
Definition: IfxCcu6_PinMap.c:366
IfxCcu60_COUT61_P11_6_OUT
IfxCcu6_Cout61_Out IfxCcu60_COUT61_P11_6_OUT
Definition: IfxCcu6_PinMap.c:120
IfxCcu61_CCPOS0D_P40_5_IN
IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0D_P40_5_IN
Definition: IfxCcu6_PinMap.c:95
IfxCcu61_CCPOS1C_P33_6_IN
IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1C_P33_6_IN
Definition: IfxCcu6_PinMap.c:102
IfxCcu61_CC61_P33_11_OUT
IfxCcu6_Cc61_Out IfxCcu61_CC61_P33_11_OUT
Definition: IfxCcu6_PinMap.c:68
IfxCcu61_CC60_P00_7_OUT
IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_7_OUT
Definition: IfxCcu6_PinMap.c:51
IfxCcu61_T12HRC_P02_8_IN
IfxCcu6_T12hr_In IfxCcu61_T12HRC_P02_8_IN
Definition: IfxCcu6_PinMap.c:148
IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:298
IfxCcu60_COUT61_P02_3_OUT
IfxCcu6_Cout61_Out IfxCcu60_COUT61_P02_3_OUT
Definition: IfxCcu6_PinMap.c:119
IfxCcu6_Cc61_Out
CC61 pin mapping structure.
Definition: IfxCcu6_PinMap.h:136
IfxCcu61_CC60INA_P00_1_IN
IfxCcu6_Cc60in_In IfxCcu61_CC60INA_P00_1_IN
Definition: IfxCcu6_PinMap.c:57
IfxCcu60_CCPOS1B_P40_1_IN
IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1B_P40_1_IN
Definition: IfxCcu6_PinMap.c:97
IfxCcu61_CCPOS2A_P00_9_IN
IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2A_P00_9_IN
Definition: IfxCcu6_PinMap.c:108
IfxCcu61_CC62INC_P00_9_IN
IfxCcu6_Cc62in_In IfxCcu61_CC62INC_P00_9_IN
Definition: IfxCcu6_PinMap.c:89
IfxCcu6_Cc60in_In_pinTable
const IfxCcu6_Cc60in_In * IfxCcu6_Cc60in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS]
Definition: IfxCcu6_PinMap.c:173
IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:308
IfxCcu61_CC60_P00_1_OUT
IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_1_OUT
Definition: IfxCcu6_PinMap.c:50
IfxCcu6_T12hr_In
T12HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:112
IfxCcu61_CCPOS0A_P00_7_IN
IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0A_P00_7_IN
Definition: IfxCcu6_PinMap.c:93
IfxCcu6_T13hr_In
T13HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:120
IfxCcu6_Cout63_Out_pinTable
const IfxCcu6_Cout63_Out * IfxCcu6_Cout63_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS]
Definition: IfxCcu6_PinMap.c:336
IfxPort_OutputIdx_alt7
Definition: IfxPort.h:135
IfxCcu61_COUT62_P33_8_OUT
IfxCcu6_Cout62_Out IfxCcu61_COUT62_P33_8_OUT
Definition: IfxCcu6_PinMap.c:132
IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS
#define IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:307
IfxCcu60_CC61_P34_4_OUT
IfxCcu6_Cc61_Out IfxCcu60_CC61_P34_4_OUT
Definition: IfxCcu6_PinMap.c:64
IfxCcu60_CC62_P02_8_OUT
IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_8_OUT
Definition: IfxCcu6_PinMap.c:76
IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:303
IfxCcu60_CCPOS2C_P10_8_IN
IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2C_P10_8_IN
Definition: IfxCcu6_PinMap.c:106
IfxCcu60_CC60_P11_12_OUT
IfxCcu6_Cc60_Out IfxCcu60_CC60_P11_12_OUT
Definition: IfxCcu6_PinMap.c:47
IfxCcu61_T13HRC_P02_8_IN
IfxCcu6_T13hr_In IfxCcu61_T13HRC_P02_8_IN
Definition: IfxCcu6_PinMap.c:153
IfxCcu61_CCPOS2C_P33_5_IN
IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2C_P33_5_IN
Definition: IfxCcu6_PinMap.c:110
IfxCcu61_T13HRB_P02_7_IN
IfxCcu6_T13hr_In IfxCcu61_T13HRB_P02_7_IN
Definition: IfxCcu6_PinMap.c:152
IfxCcu6_Cout61_Out_pinTable
const IfxCcu6_Cout61_Out * IfxCcu6_Cout61_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS]
Definition: IfxCcu6_PinMap.c:306
IfxCcu61_CC60_P20_8_OUT
IfxCcu6_Cc60_Out IfxCcu61_CC60_P20_8_OUT
Definition: IfxCcu6_PinMap.c:52
IfxCcu60_CC62INB_P00_5_IN
IfxCcu6_Cc62in_In IfxCcu60_CC62INB_P00_5_IN
Definition: IfxCcu6_PinMap.c:85
IfxCcu61_COUT62_P20_13_OUT
IfxCcu6_Cout62_Out IfxCcu61_COUT62_P20_13_OUT
Definition: IfxCcu6_PinMap.c:131
IfxCcu6_Cc62in_In_pinTable
const IfxCcu6_Cc62in_In * IfxCcu6_Cc62in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS]
Definition: IfxCcu6_PinMap.c:233
IfxCcu6_T13hr_In_pinTable
const IfxCcu6_T13hr_In * IfxCcu6_T13hr_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS]
Definition: IfxCcu6_PinMap.c:383
IfxCcu60_CC62INA_P02_4_IN
IfxCcu6_Cc62in_In IfxCcu60_CC62INA_P02_4_IN
Definition: IfxCcu6_PinMap.c:84
IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:300
IfxCcu60_COUT61_P15_8_OUT
IfxCcu6_Cout61_Out IfxCcu60_COUT61_P15_8_OUT
Definition: IfxCcu6_PinMap.c:121
IfxCcu60_CCPOS0D_P40_0_IN
IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0D_P40_0_IN
Definition: IfxCcu6_PinMap.c:92
IfxCcu61_CCPOS1B_P40_6_IN
IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1B_P40_6_IN
Definition: IfxCcu6_PinMap.c:101
IfxCcu60_CC60INB_P00_1_IN
IfxCcu6_Cc60in_In IfxCcu60_CC60INB_P00_1_IN
Definition: IfxCcu6_PinMap.c:55
IFXCCU6_PINMAP_NUM_MODULES
#define IFXCCU6_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxCcu6_PinMap.h:294
IfxCcu60_COUT63_P32_4_OUT
IfxCcu6_Cout63_Out IfxCcu60_COUT63_P32_4_OUT
Definition: IfxCcu6_PinMap.c:136
IfxCcu6_Ccpos2_In
CCPOS2 pin mapping structure.
Definition: IfxCcu6_PinMap.h:96
IfxCcu61_COUT61_P00_4_OUT
IfxCcu6_Cout61_Out IfxCcu61_COUT61_P00_4_OUT
Definition: IfxCcu6_PinMap.c:123
IfxCcu6_Cout61_Out
COUT61 pin mapping structure.
Definition: IfxCcu6_PinMap.h:160
IfxCcu61_CC61_P00_8_OUT
IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_8_OUT
Definition: IfxCcu6_PinMap.c:66
IfxCcu61_CC62INA_P00_5_IN
IfxCcu6_Cc62in_In IfxCcu61_CC62INA_P00_5_IN
Definition: IfxCcu6_PinMap.c:87
IfxCcu60_COUT61_P34_5_OUT
IfxCcu6_Cout61_Out IfxCcu60_COUT61_P34_5_OUT
Definition: IfxCcu6_PinMap.c:122
IfxCcu60_CC62_P11_10_OUT
IfxCcu6_Cc62_Out IfxCcu60_CC62_P11_10_OUT
Definition: IfxCcu6_PinMap.c:77
IfxCcu61_CTRAPC_P33_4_IN
IfxCcu6_Ctrap_In IfxCcu61_CTRAPC_P33_4_IN
Definition: IfxCcu6_PinMap.c:143
IfxCcu61_COUT63_P00_10_OUT
IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_10_OUT
Definition: IfxCcu6_PinMap.c:138
IfxCcu6_Cc60_Out_pinTable
const IfxCcu6_Cc60_Out * IfxCcu6_Cc60_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS]
Definition: IfxCcu6_PinMap.c:156
IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS
#define IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:304
IfxCcu61_CCPOS1D_P40_7_IN
IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1D_P40_7_IN
Definition: IfxCcu6_PinMap.c:103
IfxCcu61_COUT60_P20_11_OUT
IfxCcu6_Cout60_Out IfxCcu61_COUT60_P20_11_OUT
Definition: IfxCcu6_PinMap.c:117
IfxCcu61_CC61_P20_9_OUT
IfxCcu6_Cc61_Out IfxCcu61_CC61_P20_9_OUT
Definition: IfxCcu6_PinMap.c:67
IfxCcu60_COUT63_P34_1_OUT
IfxCcu6_Cout63_Out IfxCcu60_COUT63_P34_1_OUT
Definition: IfxCcu6_PinMap.c:137
IfxCcu60_COUT60_P15_7_OUT
IfxCcu6_Cout60_Out IfxCcu60_COUT60_P15_7_OUT
Definition: IfxCcu6_PinMap.c:114
IfxCcu60_CC61_P15_5_OUT
IfxCcu6_Cc61_Out IfxCcu60_CC61_P15_5_OUT
Definition: IfxCcu6_PinMap.c:63
IfxCcu60_CC60_P15_6_OUT
IfxCcu6_Cc60_Out IfxCcu60_CC60_P15_6_OUT
Definition: IfxCcu6_PinMap.c:48
IfxCcu60_CCPOS1D_P40_2_IN
IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1D_P40_2_IN
Definition: IfxCcu6_PinMap.c:99
IfxCcu61_COUT61_P33_10_OUT
IfxCcu6_Cout61_Out IfxCcu61_COUT61_P33_10_OUT
Definition: IfxCcu6_PinMap.c:125
IfxCcu61_T12HRE_P00_11_IN
IfxCcu6_T12hr_In IfxCcu61_T12HRE_P00_11_IN
Definition: IfxCcu6_PinMap.c:149
IfxCcu6_Cc61_Out_pinTable
const IfxCcu6_Cc61_Out * IfxCcu6_Cc61_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS]
Definition: IfxCcu6_PinMap.c:186
IfxCcu60_CCPOS2B_P40_3_IN
IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2B_P40_3_IN
Definition: IfxCcu6_PinMap.c:105


iLLD_TC38A: IfxCcu6_PinMap.h Source File

  • _PinMap
IfxCcu6_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6_PinMap.h
3 * \brief CCU6 I/O map
4 * \ingroup IfxLld_Ccu6
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Ccu6_pinmap CCU6 Pin Mapping
42 * \ingroup IfxLld_Ccu6
43 */
44
45 #ifndef IFXCCU6_PINMAP_H
46 #define IFXCCU6_PINMAP_H
47
48 #include <IfxCcu6_reg.h>
49 #include <_Impl/IfxCcu6_cfg.h>
50 #include <Port/Std/IfxPort.h>
51
52 /** \addtogroup IfxLld_Ccu6_pinmap
53 * \{ */
54
55 /** \brief CC60IN pin mapping structure */
56 typedef const struct
57 {
58 Ifx_CCU6* module; /**< \brief Base address */
59 IfxPort_Pin pin; /**< \brief Port pin */
60 Ifx_RxSel select; /**< \brief Input multiplexer value */
61 } IfxCcu6_Cc60in_In;
62
63 /** \brief CC61IN pin mapping structure */
64 typedef const struct
65 {
66 Ifx_CCU6* module; /**< \brief Base address */
67 IfxPort_Pin pin; /**< \brief Port pin */
68 Ifx_RxSel select; /**< \brief Input multiplexer value */
69 } IfxCcu6_Cc61in_In;
70
71 /** \brief CC62IN pin mapping structure */
72 typedef const struct
73 {
74 Ifx_CCU6* module; /**< \brief Base address */
75 IfxPort_Pin pin; /**< \brief Port pin */
76 Ifx_RxSel select; /**< \brief Input multiplexer value */
77 } IfxCcu6_Cc62in_In;
78
79 /** \brief CCPOS0 pin mapping structure */
80 typedef const struct
81 {
82 Ifx_CCU6* module; /**< \brief Base address */
83 IfxPort_Pin pin; /**< \brief Port pin */
84 Ifx_RxSel select; /**< \brief Input multiplexer value */
85 } IfxCcu6_Ccpos0_In;
86
87 /** \brief CCPOS1 pin mapping structure */
88 typedef const struct
89 {
90 Ifx_CCU6* module; /**< \brief Base address */
91 IfxPort_Pin pin; /**< \brief Port pin */
92 Ifx_RxSel select; /**< \brief Input multiplexer value */
93 } IfxCcu6_Ccpos1_In;
94
95 /** \brief CCPOS2 pin mapping structure */
96 typedef const struct
97 {
98 Ifx_CCU6* module; /**< \brief Base address */
99 IfxPort_Pin pin; /**< \brief Port pin */
100 Ifx_RxSel select; /**< \brief Input multiplexer value */
101 } IfxCcu6_Ccpos2_In;
102
103 /** \brief CTRAP pin mapping structure */
104 typedef const struct
105 {
106 Ifx_CCU6* module; /**< \brief Base address */
107 IfxPort_Pin pin; /**< \brief Port pin */
108 Ifx_RxSel select; /**< \brief Input multiplexer value */
109 } IfxCcu6_Ctrap_In;
110
111 /** \brief T12HR pin mapping structure */
112 typedef const struct
113 {
114 Ifx_CCU6* module; /**< \brief Base address */
115 IfxPort_Pin pin; /**< \brief Port pin */
116 Ifx_RxSel select; /**< \brief Input multiplexer value */
117 } IfxCcu6_T12hr_In;
118
119 /** \brief T13HR pin mapping structure */
120 typedef const struct
121 {
122 Ifx_CCU6* module; /**< \brief Base address */
123 IfxPort_Pin pin; /**< \brief Port pin */
124 Ifx_RxSel select; /**< \brief Input multiplexer value */
125 } IfxCcu6_T13hr_In;
126
127 /** \brief CC60 pin mapping structure */
128 typedef const struct
129 {
130 Ifx_CCU6* module; /**< \brief Base address */
131 IfxPort_Pin pin; /**< \brief Port pin */
132 IfxPort_OutputIdx select; /**< \brief Port control code */
133 } IfxCcu6_Cc60_Out;
134
135 /** \brief CC61 pin mapping structure */
136 typedef const struct
137 {
138 Ifx_CCU6* module; /**< \brief Base address */
139 IfxPort_Pin pin; /**< \brief Port pin */
140 IfxPort_OutputIdx select; /**< \brief Port control code */
141 } IfxCcu6_Cc61_Out;
142
143 /** \brief CC62 pin mapping structure */
144 typedef const struct
145 {
146 Ifx_CCU6* module; /**< \brief Base address */
147 IfxPort_Pin pin; /**< \brief Port pin */
148 IfxPort_OutputIdx select; /**< \brief Port control code */
149 } IfxCcu6_Cc62_Out;
150
151 /** \brief COUT60 pin mapping structure */
152 typedef const struct
153 {
154 Ifx_CCU6* module; /**< \brief Base address */
155 IfxPort_Pin pin; /**< \brief Port pin */
156 IfxPort_OutputIdx select; /**< \brief Port control code */
157 } IfxCcu6_Cout60_Out;
158
159 /** \brief COUT61 pin mapping structure */
160 typedef const struct
161 {
162 Ifx_CCU6* module; /**< \brief Base address */
163 IfxPort_Pin pin; /**< \brief Port pin */
164 IfxPort_OutputIdx select; /**< \brief Port control code */
165 } IfxCcu6_Cout61_Out;
166
167 /** \brief COUT62 pin mapping structure */
168 typedef const struct
169 {
170 Ifx_CCU6* module; /**< \brief Base address */
171 IfxPort_Pin pin; /**< \brief Port pin */
172 IfxPort_OutputIdx select; /**< \brief Port control code */
173 } IfxCcu6_Cout62_Out;
174
175 /** \brief COUT63 pin mapping structure */
176 typedef const struct
177 {
178 Ifx_CCU6* module; /**< \brief Base address */
179 IfxPort_Pin pin; /**< \brief Port pin */
180 IfxPort_OutputIdx select; /**< \brief Port control code */
181 } IfxCcu6_Cout63_Out;
182
183 IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_0_OUT; /**< \brief T12 PWM channel 60 */
184 IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_6_OUT; /**< \brief T12 PWM channel 60 */
185 IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P11_12_OUT; /**< \brief T12 PWM channel 60 */
186 IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P15_6_OUT; /**< \brief T12 PWM channel 60 */
187 IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P34_2_OUT; /**< \brief T12 PWM channel 60 */
188 IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_1_OUT; /**< \brief T12 PWM channel 60 */
189 IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_7_OUT; /**< \brief T12 PWM channel 60 */
190 IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P20_8_OUT; /**< \brief T12 PWM channel 60 */
191 IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P33_13_OUT; /**< \brief T12 PWM channel 60 */
192 IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu60_CC60INA_P02_0_IN; /**< \brief T12 capture input 60 */
193 IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu60_CC60INB_P00_1_IN; /**< \brief T12 capture input 60 */
194 IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu60_CC60INC_P02_6_IN; /**< \brief T12 capture input 60 */
195 IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu61_CC60INA_P00_1_IN; /**< \brief T12 capture input 60 */
196 IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu61_CC60INB_P02_0_IN; /**< \brief T12 capture input 60 */
197 IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu61_CC60INC_P00_7_IN; /**< \brief T12 capture input 60 */
198 IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_2_OUT; /**< \brief T12 PWM channel 61 */
199 IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_7_OUT; /**< \brief T12 PWM channel 61 */
200 IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P11_11_OUT; /**< \brief T12 PWM channel 61 */
201 IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P15_5_OUT; /**< \brief T12 PWM channel 61 */
202 IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P34_4_OUT; /**< \brief T12 PWM channel 61 */
203 IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_3_OUT; /**< \brief T12 PWM channel 61 */
204 IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_8_OUT; /**< \brief T12 PWM channel 61 */
205 IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P20_9_OUT; /**< \brief T12 PWM channel 61 */
206 IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P33_11_OUT; /**< \brief T12 PWM channel 61 */
207 IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu60_CC61INA_P02_2_IN; /**< \brief T12 capture input 61 */
208 IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu60_CC61INB_P00_3_IN; /**< \brief T12 capture input 61 */
209 IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu60_CC61INC_P02_7_IN; /**< \brief T12 capture input 61 */
210 IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu61_CC61INA_P00_3_IN; /**< \brief T12 capture input 61 */
211 IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu61_CC61INB_P02_2_IN; /**< \brief T12 capture input 61 */
212 IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu61_CC61INC_P00_8_IN; /**< \brief T12 capture input 61 */
213 IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_4_OUT; /**< \brief T12 PWM channel 62 */
214 IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_8_OUT; /**< \brief T12 PWM channel 62 */
215 IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P11_10_OUT; /**< \brief T12 PWM channel 62 */
216 IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P15_4_OUT; /**< \brief T12 PWM channel 62 */
217 IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P33_14_OUT; /**< \brief T12 PWM channel 62 */
218 IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_5_OUT; /**< \brief T12 PWM channel 62 */
219 IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_9_OUT; /**< \brief T12 PWM channel 62 */
220 IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P20_10_OUT; /**< \brief T12 PWM channel 62 */
221 IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P33_9_OUT; /**< \brief T12 PWM channel 62 */
222 IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu60_CC62INA_P02_4_IN; /**< \brief T12 capture input 62 */
223 IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu60_CC62INB_P00_5_IN; /**< \brief T12 capture input 62 */
224 IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu60_CC62INC_P02_8_IN; /**< \brief T12 capture input 62 */
225 IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu61_CC62INA_P00_5_IN; /**< \brief T12 capture input 62 */
226 IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu61_CC62INB_P02_4_IN; /**< \brief T12 capture input 62 */
227 IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu61_CC62INC_P00_9_IN; /**< \brief T12 capture input 62 */
228 IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0A_P02_6_IN; /**< \brief Hall capture input 0 */
229 IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0C_P10_4_IN; /**< \brief Hall capture input 0 */
230 IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0D_P40_0_IN; /**< \brief Hall capture input 0 */
231 IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0A_P00_7_IN; /**< \brief Hall capture input 0 */
232 IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0C_P33_7_IN; /**< \brief Hall capture input 0 */
233 IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0D_P40_5_IN; /**< \brief Hall capture input 0 */
234 IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1A_P02_7_IN; /**< \brief Hall capture input 1 */
235 IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1B_P40_1_IN; /**< \brief Hall capture input 1 */
236 IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1C_P10_7_IN; /**< \brief Hall capture input 1 */
237 IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1D_P40_2_IN; /**< \brief Hall capture input 1 */
238 IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1A_P00_8_IN; /**< \brief Hall capture input 1 */
239 IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1B_P40_6_IN; /**< \brief Hall capture input 1 */
240 IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1C_P33_6_IN; /**< \brief Hall capture input 1 */
241 IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1D_P40_7_IN; /**< \brief Hall capture input 1 */
242 IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2A_P02_8_IN; /**< \brief Hall capture input 2 */
243 IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2B_P40_3_IN; /**< \brief Hall capture input 2 */
244 IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2C_P10_8_IN; /**< \brief Hall capture input 2 */
245 IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2D_P40_4_IN; /**< \brief Hall capture input 2 */
246 IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2A_P00_9_IN; /**< \brief Hall capture input 2 */
247 IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2B_P40_8_IN; /**< \brief Hall capture input 2 */
248 IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2C_P33_5_IN; /**< \brief Hall capture input 2 */
249 IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2D_P40_9_IN; /**< \brief Hall capture input 2 */
250 IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P02_1_OUT; /**< \brief T12 PWM channel 60 */
251 IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P11_9_OUT; /**< \brief T12 PWM channel 60 */
252 IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P15_7_OUT; /**< \brief T12 PWM channel 60 */
253 IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P34_3_OUT; /**< \brief T12 PWM channel 60 */
254 IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu61_COUT60_P00_2_OUT; /**< \brief T12 PWM channel 60 */
255 IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu61_COUT60_P20_11_OUT; /**< \brief T12 PWM channel 60 */
256 IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu61_COUT60_P33_12_OUT; /**< \brief T12 PWM channel 60 */
257 IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P02_3_OUT; /**< \brief T12 PWM channel 61 */
258 IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P11_6_OUT; /**< \brief T12 PWM channel 61 */
259 IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P15_8_OUT; /**< \brief T12 PWM channel 61 */
260 IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P34_5_OUT; /**< \brief T12 PWM channel 61 */
261 IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu61_COUT61_P00_4_OUT; /**< \brief T12 PWM channel 61 */
262 IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu61_COUT61_P20_12_OUT; /**< \brief T12 PWM channel 61 */
263 IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu61_COUT61_P33_10_OUT; /**< \brief T12 PWM channel 61 */
264 IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P02_5_OUT; /**< \brief T12 PWM channel 62 */
265 IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P11_3_OUT; /**< \brief T12 PWM channel 62 */
266 IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P14_0_OUT; /**< \brief T12 PWM channel 62 */
267 IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P33_15_OUT; /**< \brief T12 PWM channel 62 */
268 IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu61_COUT62_P00_6_OUT; /**< \brief T12 PWM channel 62 */
269 IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu61_COUT62_P20_13_OUT; /**< \brief T12 PWM channel 62 */
270 IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu61_COUT62_P33_8_OUT; /**< \brief T12 PWM channel 62 */
271 IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P00_0_OUT; /**< \brief T13 PWM channel 63 */
272 IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P11_2_OUT; /**< \brief T13 PWM channel 63 */
273 IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P14_1_OUT; /**< \brief T13 PWM channel 63 */
274 IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P32_4_OUT; /**< \brief T13 PWM channel 63 */
275 IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P34_1_OUT; /**< \brief T13 PWM channel 63 */
276 IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_10_OUT; /**< \brief T13 PWM channel 63 */
277 IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_12_OUT; /**< \brief T13 PWM channel 63 */
278 IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu61_COUT63_P20_7_OUT; /**< \brief T13 PWM channel 63 */
279 IFX_EXTERN IfxCcu6_Ctrap_In IfxCcu60_CTRAPA_P00_11_IN; /**< \brief Trap input capture */
280 IFX_EXTERN IfxCcu6_Ctrap_In IfxCcu61_CTRAPA_P00_0_IN; /**< \brief Trap input capture */
281 IFX_EXTERN IfxCcu6_Ctrap_In IfxCcu61_CTRAPC_P33_4_IN; /**< \brief Trap input capture */
282 IFX_EXTERN IfxCcu6_T12hr_In IfxCcu60_T12HRB_P00_7_IN; /**< \brief External timer start 12 */
283 IFX_EXTERN IfxCcu6_T12hr_In IfxCcu60_T12HRC_P00_9_IN; /**< \brief External timer start 12 */
284 IFX_EXTERN IfxCcu6_T12hr_In IfxCcu60_T12HRE_P00_0_IN; /**< \brief External timer start 12 */
285 IFX_EXTERN IfxCcu6_T12hr_In IfxCcu61_T12HRB_P02_6_IN; /**< \brief External timer start 12 */
286 IFX_EXTERN IfxCcu6_T12hr_In IfxCcu61_T12HRC_P02_8_IN; /**< \brief External timer start 12 */
287 IFX_EXTERN IfxCcu6_T12hr_In IfxCcu61_T12HRE_P00_11_IN; /**< \brief External timer start 12 */
288 IFX_EXTERN IfxCcu6_T13hr_In IfxCcu60_T13HRB_P00_8_IN; /**< \brief External timer start 13 */
289 IFX_EXTERN IfxCcu6_T13hr_In IfxCcu60_T13HRC_P00_9_IN; /**< \brief External timer start 13 */
290 IFX_EXTERN IfxCcu6_T13hr_In IfxCcu61_T13HRB_P02_7_IN; /**< \brief External timer start 13 */
291 IFX_EXTERN IfxCcu6_T13hr_In IfxCcu61_T13HRC_P02_8_IN; /**< \brief External timer start 13 */
292
293 /** \brief Table dimensions */
294 #define IFXCCU6_PINMAP_NUM_MODULES 2
295 #define IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS 5
296 #define IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS 3
297 #define IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS 5
298 #define IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS 3
299 #define IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS 5
300 #define IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS 3
301 #define IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS 4
302 #define IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS 4
303 #define IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS 4
304 #define IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS 4
305 #define IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS 4
306 #define IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS 4
307 #define IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS 5
308 #define IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS 3
309 #define IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS 5
310 #define IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS 3
311
312
313 /** \brief IfxCcu6_Cc60_Out table */
314 IFX_EXTERN const IfxCcu6_Cc60_Out *IfxCcu6_Cc60_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS];
315
316 /** \brief IfxCcu6_Cc60in_In table */
317 IFX_EXTERN const IfxCcu6_Cc60in_In *IfxCcu6_Cc60in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS];
318
319 /** \brief IfxCcu6_Cc61_Out table */
320 IFX_EXTERN const IfxCcu6_Cc61_Out *IfxCcu6_Cc61_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS];
321
322 /** \brief IfxCcu6_Cc61in_In table */
323 IFX_EXTERN const IfxCcu6_Cc61in_In *IfxCcu6_Cc61in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS];
324
325 /** \brief IfxCcu6_Cc62_Out table */
326 IFX_EXTERN const IfxCcu6_Cc62_Out *IfxCcu6_Cc62_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS];
327
328 /** \brief IfxCcu6_Cc62in_In table */
329 IFX_EXTERN const IfxCcu6_Cc62in_In *IfxCcu6_Cc62in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS];
330
331 /** \brief IfxCcu6_Ccpos0_In table */
332 IFX_EXTERN const IfxCcu6_Ccpos0_In *IfxCcu6_Ccpos0_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS];
333
334 /** \brief IfxCcu6_Ccpos1_In table */
335 IFX_EXTERN const IfxCcu6_Ccpos1_In *IfxCcu6_Ccpos1_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS];
336
337 /** \brief IfxCcu6_Ccpos2_In table */
338 IFX_EXTERN const IfxCcu6_Ccpos2_In *IfxCcu6_Ccpos2_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS];
339
340 /** \brief IfxCcu6_Cout60_Out table */
341 IFX_EXTERN const IfxCcu6_Cout60_Out *IfxCcu6_Cout60_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS];
342
343 /** \brief IfxCcu6_Cout61_Out table */
344 IFX_EXTERN const IfxCcu6_Cout61_Out *IfxCcu6_Cout61_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS];
345
346 /** \brief IfxCcu6_Cout62_Out table */
347 IFX_EXTERN const IfxCcu6_Cout62_Out *IfxCcu6_Cout62_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS];
348
349 /** \brief IfxCcu6_Cout63_Out table */
350 IFX_EXTERN const IfxCcu6_Cout63_Out *IfxCcu6_Cout63_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS];
351
352 /** \brief IfxCcu6_Ctrap_In table */
353 IFX_EXTERN const IfxCcu6_Ctrap_In *IfxCcu6_Ctrap_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS];
354
355 /** \brief IfxCcu6_T12hr_In table */
356 IFX_EXTERN const IfxCcu6_T12hr_In *IfxCcu6_T12hr_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS];
357
358 /** \brief IfxCcu6_T13hr_In table */
359 IFX_EXTERN const IfxCcu6_T13hr_In *IfxCcu6_T13hr_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS];
360
361 /** \} */
362
363 #endif /* IFXCCU6_PINMAP_H */
IfxCcu6_Cc60in_In
CC60IN pin mapping structure.
Definition: IfxCcu6_PinMap.h:56
IfxCcu6_Cc61in_In
CC61IN pin mapping structure.
Definition: IfxCcu6_PinMap.h:64
IfxCcu6_Cc62in_In
CC62IN pin mapping structure.
Definition: IfxCcu6_PinMap.h:72
IfxCcu61_CCPOS2B_P40_8_IN
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2B_P40_8_IN
Hall capture input 2.
Definition: IfxCcu6_PinMap.h:247
IfxCcu60_CC60_P34_2_OUT
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P34_2_OUT
T12 PWM channel 60.
Definition: IfxCcu6_PinMap.h:187
IfxCcu60_CCPOS1C_P10_7_IN
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1C_P10_7_IN
Hall capture input 1.
Definition: IfxCcu6_PinMap.h:236
IfxCcu60_COUT60_P34_3_OUT
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P34_3_OUT
T12 PWM channel 60.
Definition: IfxCcu6_PinMap.h:253
IfxCcu61_CCPOS1A_P00_8_IN
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1A_P00_8_IN
Hall capture input 1.
Definition: IfxCcu6_PinMap.h:238
IfxCcu6_Cc62_Out
CC62 pin mapping structure.
Definition: IfxCcu6_PinMap.h:144
IfxCcu60_CC61INB_P00_3_IN
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu60_CC61INB_P00_3_IN
T12 capture input 61.
Definition: IfxCcu6_PinMap.h:208
IfxCcu6_Cc60in_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxCcu6_PinMap.h:59
IfxCcu60_T13HRB_P00_8_IN
IFX_EXTERN IfxCcu6_T13hr_In IfxCcu60_T13HRB_P00_8_IN
External timer start 13.
Definition: IfxCcu6_PinMap.h:288
IfxCcu6_Ccpos1_In
CCPOS1 pin mapping structure.
Definition: IfxCcu6_PinMap.h:88
IfxCcu61_CC62_P33_9_OUT
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P33_9_OUT
T12 PWM channel 62.
Definition: IfxCcu6_PinMap.h:221
IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS
#define IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:306
IfxCcu61_COUT60_P20_11_OUT
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu61_COUT60_P20_11_OUT
T12 PWM channel 60.
Definition: IfxCcu6_PinMap.h:255
IfxCcu60_COUT60_P02_1_OUT
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P02_1_OUT
T12 PWM channel 60.
Definition: IfxCcu6_PinMap.h:250
IfxCcu61_CC61_P00_8_OUT
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_8_OUT
T12 PWM channel 61.
Definition: IfxCcu6_PinMap.h:204
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:126
IfxCcu6_Cc61_Out_pinTable
IFX_EXTERN const IfxCcu6_Cc61_Out * IfxCcu6_Cc61_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS]
IfxCcu6_Cc61_Out table.
Definition: IfxCcu6_PinMap.h:320
IfxCcu60_CCPOS2D_P40_4_IN
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2D_P40_4_IN
Hall capture input 2.
Definition: IfxCcu6_PinMap.h:245
IfxCcu6_Cout63_Out
COUT63 pin mapping structure.
Definition: IfxCcu6_PinMap.h:176
IfxCcu60_T12HRE_P00_0_IN
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu60_T12HRE_P00_0_IN
External timer start 12.
Definition: IfxCcu6_PinMap.h:284
IfxCcu60_COUT61_P02_3_OUT
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P02_3_OUT
T12 PWM channel 61.
Definition: IfxCcu6_PinMap.h:257
IfxCcu61_CC62_P00_9_OUT
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_9_OUT
T12 PWM channel 62.
Definition: IfxCcu6_PinMap.h:219
IfxCcu6_Cc60_Out
CC60 pin mapping structure.
Definition: IfxCcu6_PinMap.h:128
IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:296
IfxCcu60_CC62INC_P02_8_IN
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu60_CC62INC_P02_8_IN
T12 capture input 62.
Definition: IfxCcu6_PinMap.h:224
IfxCcu6_Ccpos1_In_pinTable
IFX_EXTERN const IfxCcu6_Ccpos1_In * IfxCcu6_Ccpos1_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS]
IfxCcu6_Ccpos1_In table.
Definition: IfxCcu6_PinMap.h:335
IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:310
IfxCcu60_COUT60_P15_7_OUT
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P15_7_OUT
T12 PWM channel 60.
Definition: IfxCcu6_PinMap.h:252
IfxCcu60_CCPOS2C_P10_8_IN
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2C_P10_8_IN
Hall capture input 2.
Definition: IfxCcu6_PinMap.h:244
IfxCcu60_CC61_P02_2_OUT
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_2_OUT
T12 PWM channel 61.
Definition: IfxCcu6_PinMap.h:198
IfxCcu6_Ctrap_In
CTRAP pin mapping structure.
Definition: IfxCcu6_PinMap.h:104
IfxCcu60_CC62INB_P00_5_IN
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu60_CC62INB_P00_5_IN
T12 capture input 62.
Definition: IfxCcu6_PinMap.h:223
IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS
#define IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:297
IfxCcu61_CCPOS2A_P00_9_IN
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2A_P00_9_IN
Hall capture input 2.
Definition: IfxCcu6_PinMap.h:246
IfxCcu6_T13hr_In_pinTable
IFX_EXTERN const IfxCcu6_T13hr_In * IfxCcu6_T13hr_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS]
IfxCcu6_T13hr_In table.
Definition: IfxCcu6_PinMap.h:359
IfxCcu60_CCPOS1B_P40_1_IN
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1B_P40_1_IN
Hall capture input 1.
Definition: IfxCcu6_PinMap.h:235
IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:302
IfxCcu61_CTRAPC_P33_4_IN
IFX_EXTERN IfxCcu6_Ctrap_In IfxCcu61_CTRAPC_P33_4_IN
Trap input capture.
Definition: IfxCcu6_PinMap.h:281
IfxCcu60_COUT60_P11_9_OUT
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P11_9_OUT
T12 PWM channel 60.
Definition: IfxCcu6_PinMap.h:251
IfxCcu60_CC60INC_P02_6_IN
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu60_CC60INC_P02_6_IN
T12 capture input 60.
Definition: IfxCcu6_PinMap.h:194
IfxCcu60_CC62_P15_4_OUT
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P15_4_OUT
T12 PWM channel 62.
Definition: IfxCcu6_PinMap.h:216
IfxCcu6_Cc60in_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxCcu6_PinMap.h:60
IfxCcu61_COUT62_P00_6_OUT
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu61_COUT62_P00_6_OUT
T12 PWM channel 62.
Definition: IfxCcu6_PinMap.h:268
IfxCcu60_CC62_P02_4_OUT
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_4_OUT
T12 PWM channel 62.
Definition: IfxCcu6_PinMap.h:213
IfxCcu6_T12hr_In_pinTable
IFX_EXTERN const IfxCcu6_T12hr_In * IfxCcu6_T12hr_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS]
IfxCcu6_T12hr_In table.
Definition: IfxCcu6_PinMap.h:356
IfxCcu61_CCPOS2C_P33_5_IN
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2C_P33_5_IN
Hall capture input 2.
Definition: IfxCcu6_PinMap.h:248
IfxCcu60_CC61_P11_11_OUT
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P11_11_OUT
T12 PWM channel 61.
Definition: IfxCcu6_PinMap.h:200
IfxCcu6_Ccpos2_In_pinTable
IFX_EXTERN const IfxCcu6_Ccpos2_In * IfxCcu6_Ccpos2_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS]
IfxCcu6_Ccpos2_In table.
Definition: IfxCcu6_PinMap.h:338
IfxCcu60_CC60_P02_6_OUT
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_6_OUT
T12 PWM channel 60.
Definition: IfxCcu6_PinMap.h:184
IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:301
IfxCcu6_Cc60_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxCcu6_PinMap.h:132
IfxCcu61_T12HRB_P02_6_IN
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu61_T12HRB_P02_6_IN
External timer start 12.
Definition: IfxCcu6_PinMap.h:285
IfxCcu61_COUT62_P33_8_OUT
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu61_COUT62_P33_8_OUT
T12 PWM channel 62.
Definition: IfxCcu6_PinMap.h:270
IfxCcu61_CCPOS1D_P40_7_IN
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1D_P40_7_IN
Hall capture input 1.
Definition: IfxCcu6_PinMap.h:241
IfxCcu61_CC60_P33_13_OUT
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P33_13_OUT
T12 PWM channel 60.
Definition: IfxCcu6_PinMap.h:191
IfxCcu6_Cc60in_In::module
Ifx_CCU6 * module
Base address.
Definition: IfxCcu6_PinMap.h:58
IfxCcu61_T12HRE_P00_11_IN
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu61_T12HRE_P00_11_IN
External timer start 12.
Definition: IfxCcu6_PinMap.h:287
IfxCcu60_T12HRC_P00_9_IN
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu60_T12HRC_P00_9_IN
External timer start 12.
Definition: IfxCcu6_PinMap.h:283
IfxCcu61_CC62INC_P00_9_IN
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu61_CC62INC_P00_9_IN
T12 capture input 62.
Definition: IfxCcu6_PinMap.h:227
IfxCcu61_CCPOS0A_P00_7_IN
IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0A_P00_7_IN
Hall capture input 0.
Definition: IfxCcu6_PinMap.h:231
IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS
#define IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:295
IfxCcu61_COUT63_P00_10_OUT
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_10_OUT
T13 PWM channel 63.
Definition: IfxCcu6_PinMap.h:276
IfxCcu6_Cout62_Out
COUT62 pin mapping structure.
Definition: IfxCcu6_PinMap.h:168
IfxCcu61_COUT63_P20_7_OUT
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu61_COUT63_P20_7_OUT
T13 PWM channel 63.
Definition: IfxCcu6_PinMap.h:278
IfxCcu60_CC60_P02_0_OUT
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_0_OUT
T12 PWM channel 60.
Definition: IfxCcu6_PinMap.h:183
IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS
#define IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:305
IfxCcu6_Ccpos0_In
CCPOS0 pin mapping structure.
Definition: IfxCcu6_PinMap.h:80
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxCcu60_CC61INA_P02_2_IN
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu60_CC61INA_P02_2_IN
T12 capture input 61.
Definition: IfxCcu6_PinMap.h:207
IfxCcu60_COUT63_P00_0_OUT
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P00_0_OUT
T13 PWM channel 63.
Definition: IfxCcu6_PinMap.h:271
IfxCcu61_CCPOS0C_P33_7_IN
IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0C_P33_7_IN
Hall capture input 0.
Definition: IfxCcu6_PinMap.h:232
IfxCcu61_CC61INB_P02_2_IN
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu61_CC61INB_P02_2_IN
T12 capture input 61.
Definition: IfxCcu6_PinMap.h:211
IfxCcu60_CC62_P02_8_OUT
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_8_OUT
T12 PWM channel 62.
Definition: IfxCcu6_PinMap.h:214
IfxCcu61_COUT60_P00_2_OUT
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu61_COUT60_P00_2_OUT
T12 PWM channel 60.
Definition: IfxCcu6_PinMap.h:254
IfxCcu60_CC61_P15_5_OUT
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P15_5_OUT
T12 PWM channel 61.
Definition: IfxCcu6_PinMap.h:201
IfxCcu60_COUT63_P34_1_OUT
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P34_1_OUT
T13 PWM channel 63.
Definition: IfxCcu6_PinMap.h:275
IfxCcu6_cfg.h
CCU6 on-chip implementation data.
IfxCcu60_CC60INB_P00_1_IN
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu60_CC60INB_P00_1_IN
T12 capture input 60.
Definition: IfxCcu6_PinMap.h:193
IfxCcu60_CC61_P34_4_OUT
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P34_4_OUT
T12 PWM channel 61.
Definition: IfxCcu6_PinMap.h:202
IfxCcu60_CCPOS2A_P02_8_IN
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2A_P02_8_IN
Hall capture input 2.
Definition: IfxCcu6_PinMap.h:242
IfxCcu60_CC62_P33_14_OUT
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P33_14_OUT
T12 PWM channel 62.
Definition: IfxCcu6_PinMap.h:217
IfxCcu6_Cc62_Out_pinTable
IFX_EXTERN const IfxCcu6_Cc62_Out * IfxCcu6_Cc62_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS]
IfxCcu6_Cc62_Out table.
Definition: IfxCcu6_PinMap.h:326
IfxCcu6_Cout60_Out
COUT60 pin mapping structure.
Definition: IfxCcu6_PinMap.h:152
IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:309
IfxCcu60_COUT61_P15_8_OUT
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P15_8_OUT
T12 PWM channel 61.
Definition: IfxCcu6_PinMap.h:259
IfxCcu61_CC60_P20_8_OUT
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P20_8_OUT
T12 PWM channel 60.
Definition: IfxCcu6_PinMap.h:190
IfxCcu6_Cout63_Out_pinTable
IFX_EXTERN const IfxCcu6_Cout63_Out * IfxCcu6_Cout63_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS]
IfxCcu6_Cout63_Out table.
Definition: IfxCcu6_PinMap.h:350
IfxCcu61_COUT60_P33_12_OUT
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu61_COUT60_P33_12_OUT
T12 PWM channel 60.
Definition: IfxCcu6_PinMap.h:256
IfxCcu60_T12HRB_P00_7_IN
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu60_T12HRB_P00_7_IN
External timer start 12.
Definition: IfxCcu6_PinMap.h:282
IfxCcu60_CTRAPA_P00_11_IN
IFX_EXTERN IfxCcu6_Ctrap_In IfxCcu60_CTRAPA_P00_11_IN
Trap input capture.
Definition: IfxCcu6_PinMap.h:279
IfxCcu60_COUT62_P02_5_OUT
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P02_5_OUT
T12 PWM channel 62.
Definition: IfxCcu6_PinMap.h:264
IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS
#define IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:299
IfxCcu60_CCPOS0C_P10_4_IN
IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0C_P10_4_IN
Hall capture input 0.
Definition: IfxCcu6_PinMap.h:229
IfxCcu61_CC62_P00_5_OUT
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_5_OUT
T12 PWM channel 62.
Definition: IfxCcu6_PinMap.h:218
IfxCcu61_CCPOS1B_P40_6_IN
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1B_P40_6_IN
Hall capture input 1.
Definition: IfxCcu6_PinMap.h:239
IfxCcu61_CC60INB_P02_0_IN
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu61_CC60INB_P02_0_IN
T12 capture input 60.
Definition: IfxCcu6_PinMap.h:196
IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:298
IfxCcu6_Cc61_Out
CC61 pin mapping structure.
Definition: IfxCcu6_PinMap.h:136
IfxCcu61_CC61INA_P00_3_IN
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu61_CC61INA_P00_3_IN
T12 capture input 61.
Definition: IfxCcu6_PinMap.h:210
IfxCcu6_Cc60_Out_pinTable
IFX_EXTERN const IfxCcu6_Cc60_Out * IfxCcu6_Cc60_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS]
IfxCcu6_Cc60_Out table.
Definition: IfxCcu6_PinMap.h:314
IfxCcu61_CCPOS1C_P33_6_IN
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1C_P33_6_IN
Hall capture input 1.
Definition: IfxCcu6_PinMap.h:240
IfxCcu61_CC61_P00_3_OUT
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_3_OUT
T12 PWM channel 61.
Definition: IfxCcu6_PinMap.h:203
IfxCcu61_COUT63_P00_12_OUT
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_12_OUT
T13 PWM channel 63.
Definition: IfxCcu6_PinMap.h:277
IfxCcu61_CCPOS0D_P40_5_IN
IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0D_P40_5_IN
Hall capture input 0.
Definition: IfxCcu6_PinMap.h:233
IfxCcu60_CC60_P15_6_OUT
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P15_6_OUT
T12 PWM channel 60.
Definition: IfxCcu6_PinMap.h:186
IfxCcu60_CC61INC_P02_7_IN
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu60_CC61INC_P02_7_IN
T12 capture input 61.
Definition: IfxCcu6_PinMap.h:209
IfxCcu60_COUT61_P11_6_OUT
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P11_6_OUT
T12 PWM channel 61.
Definition: IfxCcu6_PinMap.h:258
IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:308
IfxCcu60_CCPOS0D_P40_0_IN
IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0D_P40_0_IN
Hall capture input 0.
Definition: IfxCcu6_PinMap.h:230
IfxCcu6_T12hr_In
T12HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:112
IfxCcu6_Cout60_Out_pinTable
IFX_EXTERN const IfxCcu6_Cout60_Out * IfxCcu6_Cout60_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS]
IfxCcu6_Cout60_Out table.
Definition: IfxCcu6_PinMap.h:341
IfxCcu6_T13hr_In
T13HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:120
IfxCcu61_T12HRC_P02_8_IN
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu61_T12HRC_P02_8_IN
External timer start 12.
Definition: IfxCcu6_PinMap.h:286
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:246
IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS
#define IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:307
IfxCcu61_COUT61_P00_4_OUT
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu61_COUT61_P00_4_OUT
T12 PWM channel 61.
Definition: IfxCcu6_PinMap.h:261
IfxCcu60_T13HRC_P00_9_IN
IFX_EXTERN IfxCcu6_T13hr_In IfxCcu60_T13HRC_P00_9_IN
External timer start 13.
Definition: IfxCcu6_PinMap.h:289
IfxCcu6_Ctrap_In_pinTable
IFX_EXTERN const IfxCcu6_Ctrap_In * IfxCcu6_Ctrap_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS]
IfxCcu6_Ctrap_In table.
Definition: IfxCcu6_PinMap.h:353
IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:303
IfxCcu60_COUT62_P33_15_OUT
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P33_15_OUT
T12 PWM channel 62.
Definition: IfxCcu6_PinMap.h:267
Ifx_RxSel
Ifx_RxSel
input multiplexer definition used in PinMaps
Definition: Ifx_Types.h:127
IfxCcu61_CC61INC_P00_8_IN
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu61_CC61INC_P00_8_IN
T12 capture input 61.
Definition: IfxCcu6_PinMap.h:212
IfxCcu60_CC60_P11_12_OUT
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P11_12_OUT
T12 PWM channel 60.
Definition: IfxCcu6_PinMap.h:185
IfxCcu61_CC60_P00_1_OUT
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_1_OUT
T12 PWM channel 60.
Definition: IfxCcu6_PinMap.h:188
IfxCcu60_CCPOS1A_P02_7_IN
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1A_P02_7_IN
Hall capture input 1.
Definition: IfxCcu6_PinMap.h:234
IfxCcu61_CC60_P00_7_OUT
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_7_OUT
T12 PWM channel 60.
Definition: IfxCcu6_PinMap.h:189
IfxCcu60_COUT63_P11_2_OUT
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P11_2_OUT
T13 PWM channel 63.
Definition: IfxCcu6_PinMap.h:272
IfxCcu60_COUT63_P32_4_OUT
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P32_4_OUT
T13 PWM channel 63.
Definition: IfxCcu6_PinMap.h:274
IfxCcu61_T13HRC_P02_8_IN
IFX_EXTERN IfxCcu6_T13hr_In IfxCcu61_T13HRC_P02_8_IN
External timer start 13.
Definition: IfxCcu6_PinMap.h:291
IfxCcu60_CC62INA_P02_4_IN
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu60_CC62INA_P02_4_IN
T12 capture input 62.
Definition: IfxCcu6_PinMap.h:222
IfxCcu61_CTRAPA_P00_0_IN
IFX_EXTERN IfxCcu6_Ctrap_In IfxCcu61_CTRAPA_P00_0_IN
Trap input capture.
Definition: IfxCcu6_PinMap.h:280
IfxCcu61_COUT61_P20_12_OUT
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu61_COUT61_P20_12_OUT
T12 PWM channel 61.
Definition: IfxCcu6_PinMap.h:262
IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:300
IfxCcu6_Cc60in_In_pinTable
IFX_EXTERN const IfxCcu6_Cc60in_In * IfxCcu6_Cc60in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS]
IfxCcu6_Cc60in_In table.
Definition: IfxCcu6_PinMap.h:317
IfxCcu60_CC62_P11_10_OUT
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P11_10_OUT
T12 PWM channel 62.
Definition: IfxCcu6_PinMap.h:215
IfxCcu60_CC60INA_P02_0_IN
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu60_CC60INA_P02_0_IN
T12 capture input 60.
Definition: IfxCcu6_PinMap.h:192
IfxCcu6_Ccpos0_In_pinTable
IFX_EXTERN const IfxCcu6_Ccpos0_In * IfxCcu6_Ccpos0_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS]
IfxCcu6_Ccpos0_In table.
Definition: IfxCcu6_PinMap.h:332
IfxCcu61_CC62INA_P00_5_IN
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu61_CC62INA_P00_5_IN
T12 capture input 62.
Definition: IfxCcu6_PinMap.h:225
IfxCcu61_CCPOS2D_P40_9_IN
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2D_P40_9_IN
Hall capture input 2.
Definition: IfxCcu6_PinMap.h:249
IfxCcu61_CC60INA_P00_1_IN
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu61_CC60INA_P00_1_IN
T12 capture input 60.
Definition: IfxCcu6_PinMap.h:195
IFXCCU6_PINMAP_NUM_MODULES
#define IFXCCU6_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxCcu6_PinMap.h:294
IfxCcu6_Cc61in_In_pinTable
IFX_EXTERN const IfxCcu6_Cc61in_In * IfxCcu6_Cc61in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS]
IfxCcu6_Cc61in_In table.
Definition: IfxCcu6_PinMap.h:323
IfxCcu6_Ccpos2_In
CCPOS2 pin mapping structure.
Definition: IfxCcu6_PinMap.h:96
IfxCcu6_Cout61_Out
COUT61 pin mapping structure.
Definition: IfxCcu6_PinMap.h:160
IfxCcu61_COUT61_P33_10_OUT
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu61_COUT61_P33_10_OUT
T12 PWM channel 61.
Definition: IfxCcu6_PinMap.h:263
IfxCcu60_COUT62_P14_0_OUT
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P14_0_OUT
T12 PWM channel 62.
Definition: IfxCcu6_PinMap.h:266
IfxCcu61_CC60INC_P00_7_IN
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu61_CC60INC_P00_7_IN
T12 capture input 60.
Definition: IfxCcu6_PinMap.h:197
IfxCcu60_CCPOS1D_P40_2_IN
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1D_P40_2_IN
Hall capture input 1.
Definition: IfxCcu6_PinMap.h:237
IfxCcu60_COUT62_P11_3_OUT
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P11_3_OUT
T12 PWM channel 62.
Definition: IfxCcu6_PinMap.h:265
IfxCcu61_CC62_P20_10_OUT
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P20_10_OUT
T12 PWM channel 62.
Definition: IfxCcu6_PinMap.h:220
IfxCcu60_CCPOS2B_P40_3_IN
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2B_P40_3_IN
Hall capture input 2.
Definition: IfxCcu6_PinMap.h:243
IfxCcu60_CCPOS0A_P02_6_IN
IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0A_P02_6_IN
Hall capture input 0.
Definition: IfxCcu6_PinMap.h:228
IfxCcu60_CC61_P02_7_OUT
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_7_OUT
T12 PWM channel 61.
Definition: IfxCcu6_PinMap.h:199
IfxCcu61_CC62INB_P02_4_IN
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu61_CC62INB_P02_4_IN
T12 capture input 62.
Definition: IfxCcu6_PinMap.h:226
IfxCcu6_Cc62in_In_pinTable
IFX_EXTERN const IfxCcu6_Cc62in_In * IfxCcu6_Cc62in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS]
IfxCcu6_Cc62in_In table.
Definition: IfxCcu6_PinMap.h:329
IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS
#define IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:304
IfxCcu60_COUT61_P34_5_OUT
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P34_5_OUT
T12 PWM channel 61.
Definition: IfxCcu6_PinMap.h:260
IfxCcu61_T13HRB_P02_7_IN
IFX_EXTERN IfxCcu6_T13hr_In IfxCcu61_T13HRB_P02_7_IN
External timer start 13.
Definition: IfxCcu6_PinMap.h:290
IfxCcu6_Cout62_Out_pinTable
IFX_EXTERN const IfxCcu6_Cout62_Out * IfxCcu6_Cout62_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS]
IfxCcu6_Cout62_Out table.
Definition: IfxCcu6_PinMap.h:347
IfxCcu61_COUT62_P20_13_OUT
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu61_COUT62_P20_13_OUT
T12 PWM channel 62.
Definition: IfxCcu6_PinMap.h:269
IfxCcu60_COUT63_P14_1_OUT
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P14_1_OUT
T13 PWM channel 63.
Definition: IfxCcu6_PinMap.h:273
IfxCcu61_CC61_P33_11_OUT
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P33_11_OUT
T12 PWM channel 61.
Definition: IfxCcu6_PinMap.h:206
IfxCcu61_CC61_P20_9_OUT
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P20_9_OUT
T12 PWM channel 61.
Definition: IfxCcu6_PinMap.h:205
IfxCcu6_Cout61_Out_pinTable
IFX_EXTERN const IfxCcu6_Cout61_Out * IfxCcu6_Cout61_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS]
IfxCcu6_Cout61_Out table.
Definition: IfxCcu6_PinMap.h:344
IfxPort.h
PORT basic functionality.


iLLD_TC38A: IfxCcu6_PwmBc.c Source File

  • Ccu6
  • PwmBc
IfxCcu6_PwmBc.c
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6_PwmBc.c
3 * \brief CCU6 PWMBC details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 *
41 */
42
43 /******************************************************************************/
44 /*----------------------------------Includes----------------------------------*/
45 /******************************************************************************/
46
47 #include "IfxCcu6_PwmBc.h"
48
49 /******************************************************************************/
50 /*-------------------------Function Implementations---------------------------*/
51 /******************************************************************************/
52
53 uint32 IfxCcu6_PwmBc_getMotorSpeed(IfxCcu6_PwmBc *pwmBc)
54 {
55 uint32 currentTime, previousTime;
56 float32 speed;
57
58 currentTime = IfxCcu6_getCaptureRegisterValue(pwmBc->ccu6, IfxCcu6_T12Channel_0);
59 previousTime = IfxCcu6_getCaptureShadowRegisterValue(pwmBc->ccu6, IfxCcu6_T12Channel_0);
60
61 // TODO -- FIX IT --
62 speed = (currentTime - previousTime) * (6 / (pwmBc->base.t13Frequency));
63 speed = speed * 60 * 100000; //convertion to RPM (minutes),
64 return speed;
65 }
66
67
68 void IfxCcu6_PwmBc_initModule(IfxCcu6_PwmBc *pwmBc, const IfxCcu6_PwmBc_Config *config)
69 {
70 Ifx_CCU6 *ccu6SFR = config->ccu6; // pointer to CCU6 registers
71 pwmBc->ccu6 = ccu6SFR; // adding register pointer to module handler
72
73 /* -- hardware module initialisation -- */
74
75 // enable module if it hasn't been enabled by any other interface //
76 if (IfxCcu6_isModuleEnabled(ccu6SFR) == FALSE)
77 {
78 IfxCcu6_enableModule(ccu6SFR);
79 }
80
81 /* -- Timer13 initialisation -- */
82
83 // enable Timer13 if it hasn't been enabled by any other interface //
84 if (IfxCcu6_getTimerAvailabilityStatus(ccu6SFR, IfxCcu6_TimerId_t13) == FALSE)
85 {
86 IfxCcu6_enableTimer(ccu6SFR, IfxCcu6_TimerId_t13);
87 }
88
89 // clock initialisation //
90 pwmBc->base.t13Frequency = IfxCcu6_setT13Frequency(ccu6SFR, config->base.t13Frequency, config->base.t13Period);
91
92 // duty cycle initialisation //
93
94 IfxCcu6_setT13CounterValue(ccu6SFR, config->timer13.counterValue);
95
96 IfxCcu6_setT13CompareValue(ccu6SFR, config->timer13.compareValue);
97
98 // if Timer 13 start is in sync with Timer 12 //
99
100 if (config->trigger.t13InSyncWithT12)
101 {
102 IfxCcu6_setT13TriggerEventMode(ccu6SFR, config->timer13.t12SyncEvent);
103 IfxCcu6_setT13TriggerEventDirection(ccu6SFR, config->timer13.t12SyncDirection);
104 }
105
106 /* -- Timer12 initialisation -- */
107
108 // enable Timer12 if it hasn't been enabled by any other interface //
109 if (IfxCcu6_getTimerAvailabilityStatus(ccu6SFR, IfxCcu6_TimerId_t12) == FALSE)
110 {
111 IfxCcu6_enableTimer(ccu6SFR, IfxCcu6_TimerId_t12);
112 }
113
114 // clock initialisation //
115
116 IfxCcu6_setT12Frequency(ccu6SFR, config->base.t12Frequency, config->base.t12Period, config->timer12.countMode);
117
118 // duty cycle initialisation //
119
120 IfxCcu6_setT12CounterValue(ccu6SFR, config->timer12.counterValue);
121
122 // hall effect noise filter initialisation
123 if (config->base.noiseFilter)
124 {
125 IfxCcu6_setDeadTimeValue(ccu6SFR, (uint8)config->base.noiseFilter);
126 IfxCcu6_enableDeadTime(ccu6SFR, IfxCcu6_T12Channel_0);
127 IfxCcu6_disableDelayBypass(ccu6SFR);
128 }
129
130 // channel initialisation for hall sensor mode ( for Brush Less DC motor)
131 IfxCcu6_setT12ChannelMode(ccu6SFR, IfxCcu6_T12Channel_0, IfxCcu6_T12ChannelMode_hallSensor);
132 IfxCcu6_setT12ChannelMode(ccu6SFR, IfxCcu6_T12Channel_1, IfxCcu6_T12ChannelMode_hallSensor);
133 IfxCcu6_setT12ChannelMode(ccu6SFR, IfxCcu6_T12Channel_2, IfxCcu6_T12ChannelMode_hallSensor);
134
135 // phase delay initialisation
136 IfxCcu6_setT12CompareValue(ccu6SFR, IfxCcu6_T12Channel_1, (uint16)config->base.phaseDelay);
137
138 // multichannel control / output pattern control initialisation
139 IfxCcu6_setMultiChannelSwitchingMode(ccu6SFR, config->multiChannelControl.switchingSelect);
140 IfxCcu6_setMultiChannelSwitchingSync(ccu6SFR, config->multiChannelControl.switchingSync);
141
142 /* -- output path initialisation -- */
143
144 //enable Timer13 modulation output path for all T12 channel outs//
145
146 IfxCcu6_enableModulationOutput(ccu6SFR, IfxCcu6_TimerId_t13, IfxCcu6_ChannelOut_cc0);
147 IfxCcu6_enableModulationOutput(ccu6SFR, IfxCcu6_TimerId_t13, IfxCcu6_ChannelOut_cc1);
148 IfxCcu6_enableModulationOutput(ccu6SFR, IfxCcu6_TimerId_t13, IfxCcu6_ChannelOut_cc2);
149
150 if (config->pins->cout63 != NULL_PTR)
151 {
152 IfxCcu6_enableModulationOutput(ccu6SFR, IfxCcu6_TimerId_t13, IfxCcu6_ChannelOut_cout3);
153 }
154
155 // output passive logic configuration //
156 //TODO check correct polarity:
157
158 IfxCcu6_setOutputPassiveState(ccu6SFR, IfxCcu6_ChannelOut_cc0, config->base.activeState);
159 IfxCcu6_setOutputPassiveState(ccu6SFR, IfxCcu6_ChannelOut_cc1, config->base.activeState);
160 IfxCcu6_setOutputPassiveState(ccu6SFR, IfxCcu6_ChannelOut_cc2, config->base.activeState);
161
162 if (config->pins->cout63 != NULL_PTR)
163
164 {
165 IfxCcu6_setOutputPassiveState(ccu6SFR, IfxCcu6_ChannelOut_cout3, config->base.activeState);
166 }
167
168 /* -- Pin mapping -- */
169
170 const IfxCcu6_PwmBc_Pins *pins = config->pins;
171
172 if (pins != NULL_PTR)
173 {
174 // modulation output pins
175
176 IfxCcu6_Cc60_Out *cc60Out = pins->cc60Out;
177
178 if (cc60Out != NULL_PTR)
179 {
180 IfxCcu6_initCc60OutPin(cc60Out, pins->outputMode, pins->pinDriver);
181 }
182
183 IfxCcu6_Cc61_Out *cc61Out = pins->cc61Out;
184
185 if (cc61Out != NULL_PTR)
186 {
187 IfxCcu6_initCc61OutPin(cc61Out, pins->outputMode, pins->pinDriver);
188 }
189
190 IfxCcu6_Cc62_Out *cc62Out = pins->cc62Out;
191
192 if (cc62Out != NULL_PTR)
193 {
194 IfxCcu6_initCc62OutPin(cc62Out, pins->outputMode, pins->pinDriver);
195 }
196
197 IfxCcu6_Cout60_Out *cout60 = pins->cout60;
198
199 if (cout60 != NULL_PTR)
200 {
201 IfxCcu6_initCout60Pin(cout60, pins->outputMode, pins->pinDriver);
202 }
203
204 IfxCcu6_Cout61_Out *cout61 = pins->cout61;
205
206 if (cout61 != NULL_PTR)
207 {
208 IfxCcu6_initCout61Pin(cout61, pins->outputMode, pins->pinDriver);
209 }
210
211 IfxCcu6_Cout62_Out *cout62 = pins->cout62;
212
213 if (cout62 != NULL_PTR)
214 {
215 IfxCcu6_initCout62Pin(cout62, pins->outputMode, pins->pinDriver);
216 }
217
218 IfxCcu6_Cout63_Out *cout63 = pins->cout63;
219
220 if (cout63 != NULL_PTR)
221 {
222 IfxCcu6_initCout63Pin(cout63, pins->outputMode, pins->pinDriver);
223 }
224
225 // hall sensor input pins
226
227 IfxCcu6_Ccpos0_In *ccpos0 = pins->ccpos0;
228
229 if (ccpos0 != NULL_PTR)
230 {
231 IfxCcu6_initCcpos0Pin(ccpos0, pins->inputMode);
232 }
233
234 IfxCcu6_Ccpos1_In *ccpos1 = pins->ccpos1;
235
236 if (ccpos1 != NULL_PTR)
237 {
238 IfxCcu6_initCcpos1Pin(ccpos1, pins->inputMode);
239 }
240
241 IfxCcu6_Ccpos2_In *ccpos2 = pins->ccpos2;
242
243 if (ccpos2 != NULL_PTR)
244 {
245 IfxCcu6_initCcpos2Pin(ccpos2, pins->inputMode);
246 }
247
248 IfxCcu6_T12hr_In *t12hr = pins->t12hr;
249
250 if (t12hr != NULL_PTR)
251 {
252 IfxCcu6_initT12hrPin(t12hr, pins->t1xhrInputMode);
253 }
254
255 IfxCcu6_T13hr_In *t13hr = pins->t13hr;
256
257 if (t13hr != NULL_PTR)
258 {
259 IfxCcu6_initT13hrPin(t13hr, pins->t1xhrInputMode);
260 }
261 }
262
263 /* -- hall pattern configuration (when to start the hall pattern evaluation) -- */
264
265 IfxCcu6_setHallSensorTriggerMode(ccu6SFR, config->hallSyncEvent);
266
267 /* -- interrupt initialisation -- */
268
269 if (config->interrupt1.priority > 0)
270 {
271 IfxCcu6_enableInterrupt(config->ccu6, config->interrupt1.source);
272 IfxCcu6_routeInterruptNode(config->ccu6, config->interrupt1.source, config->interrupt1.serviceRequest);
273
274 volatile Ifx_SRC_SRCR *src;
275 src = IfxCcu6_getSrcAddress(config->ccu6, config->interrupt1.serviceRequest);
276 IfxSrc_init(src, config->interrupt1.typeOfService, config->interrupt1.priority);
277 IfxSrc_enable(src);
278 }
279
280 if (config->interrupt2.priority > 0)
281 {
282 IfxCcu6_enableInterrupt(config->ccu6, config->interrupt2.source);
283 IfxCcu6_routeInterruptNode(config->ccu6, config->interrupt2.source, config->interrupt2.serviceRequest);
284
285 volatile Ifx_SRC_SRCR *src;
286 src = IfxCcu6_getSrcAddress(config->ccu6, config->interrupt2.serviceRequest);
287 IfxSrc_init(src, config->interrupt2.typeOfService, config->interrupt2.priority);
288 IfxSrc_enable(src);
289 }
290
291 if (config->interrupt3.priority > 0)
292 {
293 IfxCcu6_enableInterrupt(config->ccu6, config->interrupt3.source);
294 IfxCcu6_routeInterruptNode(config->ccu6, config->interrupt3.source, config->interrupt3.serviceRequest);
295
296 volatile Ifx_SRC_SRCR *src;
297 src = IfxCcu6_getSrcAddress(config->ccu6, config->interrupt3.serviceRequest);
298 IfxSrc_init(src, config->interrupt3.typeOfService, config->interrupt3.priority);
299 IfxSrc_enable(src);
300 }
301
302 if (config->interrupt4.priority > 0)
303 {
304 IfxCcu6_enableInterrupt(config->ccu6, config->interrupt4.source);
305 IfxCcu6_routeInterruptNode(config->ccu6, config->interrupt4.source, config->interrupt4.serviceRequest);
306
307 volatile Ifx_SRC_SRCR *src;
308 src = IfxCcu6_getSrcAddress(config->ccu6, config->interrupt4.serviceRequest);
309 IfxSrc_init(src, config->interrupt4.typeOfService, config->interrupt4.priority);
310 IfxSrc_enable(src);
311 }
312
313 /* -- output trigger initialisation --*/
314
315 if (config->trigger.outputTriggerEnabled)
316 {
317 IfxCcu6_connectTrigger(ccu6SFR, config->trigger.outputLine, config->trigger.outputTrigger);
318 }
319
320 pwmBc->trigger = config->trigger;
321 pwmBc->hallPatternIndex = 0;
322
323 #if IFX_CFG_USE_STANDARD_INTERFACE
324 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (uint32)pwmBc == ((uint32)&pwmBc->base));
325 pwmBc->base.functions.start = (PwmBc_Start) & IfxCcu6_PwmBc_start;
326 pwmBc->base.functions.stop = (PwmBc_Stop) & IfxCcu6_PwmBc_stop;
327 pwmBc->base.functions.updateHallPattern = (PwmBc_UpdateHallPattern) & IfxCcu6_PwmBc_updateHallPattern;
328 pwmBc->base.functions.getMotorSpeed = (PwmBc_GetMotorSpeed) & IfxCcu6_PwmBc_getMotorSpeed;
329 #endif
330 }
331
332
333 void IfxCcu6_PwmBc_initModuleConfig(IfxCcu6_PwmBc_Config *config, Ifx_CCU6 *ccu6)
334 {
335 const IfxCcu6_PwmBc_Config defaultConfig = {
336 .base = {
337 .t12Frequency = 400000,
338 .t12Period = 100,
339 .t13Frequency = 400000,
340 .t13Period = 100,
341 .phaseDelay = 20,
342 .noiseFilter = 10,
343 .activeState = Ifx_ActiveState_high,
344 },
345
346 .ccu6 = NULL_PTR, // will be initialized below
347
348 .timer12 = {
349 .countMode = IfxCcu6_T12CountMode_edgeAligned,
350 .counterValue = 0,
351 },
352
353 .timer13 = {
354 .counterValue = 0,
355 .compareValue = 0,
356 .t12SyncEvent = IfxCcu6_T13TriggerEvent_noAction,
357 .t12SyncDirection = IfxCcu6_T13TriggerDirection_noAction,
358 },
359
360 .hallSyncEvent = IfxCcu6_HallSensorTriggerMode_t13PM,
361
362 .hallPatternIndex = 0,
363
364 .multiChannelControl = {
365 .switchingSelect = IfxCcu6_MultiChannelSwitchingSelect_t12Channel1CompareMatch,
366 .switchingSync = IfxCcu6_MultiChannelSwitchingSync_t13ZeroMatch,
367 },
368
369 .pins = NULL_PTR,
370
371 .interrupt1 = {
372 .source = IfxCcu6_InterruptSource_t12PeriodMatch,
373 .serviceRequest = IfxCcu6_ServiceRequest_0,
374 .priority = 0, // interrupt priority 0
375 .typeOfService = IfxSrc_Tos_cpu0, // type of service CPU0
376 },
377
378 .interrupt2 = {
379 .source = IfxCcu6_InterruptSource_t13PeriodMatch,
380 .serviceRequest = IfxCcu6_ServiceRequest_1,
381 .priority = 0, // interrupt priority 0
382 .typeOfService = IfxSrc_Tos_cpu0, // type of service CPU0
383 },
384
385 .interrupt3 = {
386 .source = IfxCcu6_InterruptSource_t12OneMatch,
387 .serviceRequest = IfxCcu6_ServiceRequest_2,
388 .priority = 0, // interrupt priority 0
389 .typeOfService = IfxSrc_Tos_cpu0, // type of service CPU0
390 },
391
392 .interrupt4 = {
393 .source = IfxCcu6_InterruptSource_trap,
394 .serviceRequest = IfxCcu6_ServiceRequest_3,
395 .priority = 0, // interrupt priority 0
396 .typeOfService = IfxSrc_Tos_cpu0, // type of service CPU0
397 },
398
399 .trigger = {
400 .t12ExtInputTrigger = NULL_PTR,
401 .t12ExtInputTriggerMode = IfxCcu6_ExternalTriggerMode_risingEdge,
402 .t13ExtInputTrigger = NULL_PTR,
403 .t13ExtInputTriggerMode = IfxCcu6_ExternalTriggerMode_risingEdge,
404 .t13InSyncWithT12 = FALSE,
405
406 .outputTriggerEnabled = TRUE,
407 .outputLine = IfxCcu6_TrigOut_0,
408 .outputTrigger = IfxCcu6_TrigSel_cout63,
409 },
410 };
411
412 /* Default Configuration */
413 *config = defaultConfig;
414
415 /* take over module pointer */
416 config->ccu6 = ccu6;
417 }
418
419
420 void IfxCcu6_PwmBc_start(IfxCcu6_PwmBc *pwmBc)
421 {
422 // enable shadow transfers
423 IfxCcu6_enableShadowTransfer(pwmBc->ccu6, TRUE, TRUE);
424
425 // internal start
426 if ((pwmBc->trigger.t13ExtInputTrigger == NULL_PTR) && (pwmBc->trigger.t12ExtInputTrigger == NULL_PTR))
427 {
428 // if T13 start is in sync with T12 start the T12
429 if (pwmBc->trigger.t13InSyncWithT12)
430 {
431 IfxCcu6_startTimer(pwmBc->ccu6, TRUE, FALSE);
432 }
433 else // start both timers
434 {
435 IfxCcu6_startTimer(pwmBc->ccu6, TRUE, TRUE);
436 }
437 }
438
439 // external start
440 else
441 {
442 // if T13 start is not in sync with T12
443 if (!(pwmBc->trigger.t13InSyncWithT12))
444 {
445 // T13 external start if selected
446 if (pwmBc->trigger.t13ExtInputTrigger != NULL_PTR)
447 {
448 IfxCcu6_setExternalRunMode(pwmBc->ccu6, IfxCcu6_TimerId_t13, pwmBc->trigger.t13ExtInputTriggerMode);
449 IfxCcu6_setT13InputSignal(pwmBc->ccu6, pwmBc->trigger.t13ExtInputTrigger);
450 }
451 else // internal start of T13 alone
452 {
453 IfxCcu6_startTimer(pwmBc->ccu6, FALSE, TRUE);
454 }
455 }
456 else
457 {}
458
459 // T12 external start if selected
460 if (pwmBc->trigger.t12ExtInputTrigger != NULL_PTR)
461 {
462 IfxCcu6_setExternalRunMode(pwmBc->ccu6, IfxCcu6_TimerId_t12, pwmBc->trigger.t12ExtInputTriggerMode);
463 IfxCcu6_setT12InputSignal(pwmBc->ccu6, pwmBc->trigger.t12ExtInputTrigger);
464 }
465 else // internal start of T12 alone
466 {
467 IfxCcu6_startTimer(pwmBc->ccu6, TRUE, FALSE);
468 }
469 }
470 }
471
472
473 void IfxCcu6_PwmBc_stop(IfxCcu6_PwmBc *pwmBc)
474 {
475 IfxCcu6_disableShadowTransfer(pwmBc->ccu6, TRUE, TRUE);
476
477 // if T13 start is in sync with T12, remove sync trigger
478 if (pwmBc->trigger.t13InSyncWithT12)
479 {
480 IfxCcu6_setT13TriggerEventMode(pwmBc->ccu6, IfxCcu6_T13TriggerEvent_noAction);
481 IfxCcu6_setT13TriggerEventDirection(pwmBc->ccu6, IfxCcu6_T13TriggerDirection_noAction);
482 }
483
484 // remove external triggers if any
485 if ((pwmBc->trigger.t13ExtInputTrigger != NULL_PTR) || (pwmBc->trigger.t12ExtInputTrigger != NULL_PTR))
486 {
487 if (pwmBc->trigger.t13ExtInputTrigger != NULL_PTR)
488 {
489 IfxCcu6_setExternalRunMode(pwmBc->ccu6, IfxCcu6_TimerId_t13, IfxCcu6_ExternalTriggerMode_disable);
490 }
491 else
492 {
493 IfxCcu6_setExternalRunMode(pwmBc->ccu6, IfxCcu6_TimerId_t12, IfxCcu6_ExternalTriggerMode_disable);
494 }
495 }
496 else
497 {}
498
499 // stop both timers
500 IfxCcu6_stopTimer(pwmBc->ccu6, TRUE, TRUE);
501
502 //disable Timer13 modulation output path for all T12 channel outs//
503
504 IfxCcu6_disableModulationOutput(pwmBc->ccu6, IfxCcu6_TimerId_t13, IfxCcu6_ChannelOut_cc0);
505 IfxCcu6_disableModulationOutput(pwmBc->ccu6, IfxCcu6_TimerId_t13, IfxCcu6_ChannelOut_cc1);
506 IfxCcu6_disableModulationOutput(pwmBc->ccu6, IfxCcu6_TimerId_t13, IfxCcu6_ChannelOut_cc2);
507 IfxCcu6_disableModulationOutput(pwmBc->ccu6, IfxCcu6_TimerId_t13, IfxCcu6_ChannelOut_cout3);
508 }
509
510
511 void IfxCcu6_PwmBc_updateHallPattern(IfxCcu6_PwmBc *pwmBc, uint8 controlTable[6][3])
512 {
513 uint8 index = pwmBc->hallPatternIndex;
514
515 IfxCcu6_updateHallPattern(pwmBc->ccu6, controlTable[index][0], controlTable[index][1], controlTable[index][2]);
516
517 index++;
518
519 if (index >= 6)
520 {
521 index = 0;
522 }
523
524 pwmBc->hallPatternIndex = index;
525 }
Ifx_ActiveState_high
The signal is high active.
Definition: Ifx_Types.h:116
IfxCcu6_PwmBc_Timer13::compareValue
uint16 compareValue
16-bit comapre value of Timer12
Definition: IfxCcu6_PwmBc.h:323
IfxCcu6_stopTimer
IFX_INLINE void IfxCcu6_stopTimer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
starts the timers (T12, T13 individually or together based on the selection)
Definition: IfxCcu6.h:2150
IfxCcu6_ServiceRequest_3
Service request output SR3.
Definition: IfxCcu6.h:235
IfxCcu6_ExternalTriggerMode_disable
The external setting of T1xR is disabled.
Definition: IfxCcu6.h:151
IfxCcu6_PwmBc_Config::interrupt2
IfxCcu6_PwmBc_InterruptConfig interrupt2
Structure for second interrupt configuration.
Definition: IfxCcu6_PwmBc.h:369
IfxCcu6_PwmBc_getMotorSpeed
uint32 IfxCcu6_PwmBc_getMotorSpeed(IfxCcu6_PwmBc *pwmBc)
returns the current motor speed
Definition: IfxCcu6_PwmBc.c:53
IfxCcu6_setExternalRunMode
IFX_INLINE void IfxCcu6_setExternalRunMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ExternalTriggerMode mode)
Sets the event of signal T1xHR that can set the run bit T1xR by HW.
Definition: IfxCcu6.h:1984
PwmHl_s::t13Frequency
float32 t13Frequency
Actual timer13 frequency.
Definition: PwmHl.h:67
IfxCcu6_getSrcAddress
volatile Ifx_SRC_SRCR * IfxCcu6_getSrcAddress(Ifx_CCU6 *ccu6, IfxCcu6_ServiceRequest serviceRequest)
Returns the service request register.
Definition: IfxCcu6.c:207
IfxCcu6_Cc62_Out
CC62 pin mapping structure.
Definition: IfxCcu6_PinMap.h:144
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxCcu6_PwmBc_Config
Configuration structure of the module.
Definition: IfxCcu6_PwmBc.h:358
IfxCcu6_Ccpos1_In
CCPOS1 pin mapping structure.
Definition: IfxCcu6_PinMap.h:88
PwmHl_Config::phaseDelay
Ifx_TimerValue phaseDelay
Specify the ticks before before updating each ouput hall pattern.
Definition: PwmHl.h:81
IfxCcu6_enableDeadTime
IFX_INLINE void IfxCcu6_enableDeadTime(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Enables the dead time generation for each compare channel (0, 1, 2) of Timer12.
Definition: IfxCcu6.h:1540
IfxCcu6_PwmBc_Pins
Structure for CCU6 output pin configuration.
Definition: IfxCcu6_PwmBc.h:290
IfxCcu6_T12CountMode_edgeAligned
T12 always counts up and continues counting from zero after reaching the period value.
Definition: IfxCcu6.h:299
IfxCcu6_InterruptSource_t13PeriodMatch
Interrupt enable for T13 period-match.
Definition: IfxCcu6.h:196
IfxCcu6_PwmBc_Pins::outputMode
IfxPort_OutputMode outputMode
The pin output mode which should be configured.
Definition: IfxCcu6_PwmBc.h:302
IfxCcu6_PwmBc_Pins::t1xhrInputMode
IfxPort_InputMode t1xhrInputMode
The T1xHR pin input mode which should be configured.
Definition: IfxCcu6_PwmBc.h:307
IfxCcu6_PwmBc::base
PwmHl base
Base PWMHL object.
Definition: IfxCcu6_PwmBc.h:350
IfxCcu6_getCaptureShadowRegisterValue
uint32 IfxCcu6_getCaptureShadowRegisterValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the capture shadow register value of the selected channel.
Definition: IfxCcu6.c:181
IfxCcu6_PwmBc_InterruptConfig::source
IfxCcu6_InterruptSource source
Interrupt source selection.
Definition: IfxCcu6_PwmBc.h:274
IfxCcu6_PwmBc_Pins::pinDriver
IfxPort_PadDriver pinDriver
pad driver
Definition: IfxCcu6_PwmBc.h:303
IfxCcu6_Cout63_Out
COUT63 pin mapping structure.
Definition: IfxCcu6_PinMap.h:176
IfxCcu6_PwmBc_Timer13::counterValue
uint16 counterValue
16-bit counter value of Timer13
Definition: IfxCcu6_PwmBc.h:322
IfxCcu6_setT13TriggerEventMode
IFX_INLINE void IfxCcu6_setT13TriggerEventMode(Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerEvent mode)
Sets the trigger event to start Timer13 (automatic set of T13R for synchronization to Timer12 compare...
Definition: IfxCcu6.h:2121
IfxCcu6_Cc60_Out
CC60 pin mapping structure.
Definition: IfxCcu6_PinMap.h:128
IfxCcu6_InterruptSource_trap
Interrupt enable for trap flag.
Definition: IfxCcu6.h:197
IfxCcu6_PwmBc_MultiChannelControl::switchingSync
IfxCcu6_MultiChannelSwitchingSync switchingSync
Synchronization selection for the shadow transfer event MCM_ST.
Definition: IfxCcu6_PwmBc.h:285
IfxCcu6_enableTimer
IFX_INLINE void IfxCcu6_enableTimer(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Sets Timer12 block available, A write access to T12PR is executed.
Definition: IfxCcu6.h:1626
IfxCcu6_setT12ChannelMode
IFX_INLINE void IfxCcu6_setT12ChannelMode(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, IfxCcu6_T12ChannelMode mode)
Sets the operating mode of the Timer12 capture/compare channels.
Definition: IfxCcu6.h:2071
PwmHl_Config::t12Frequency
float32 t12Frequency
Specify expected T12 PWM frequency in Hertz.
Definition: PwmHl.h:77
IfxCcu6_PwmBc_InterruptConfig::typeOfService
IfxSrc_Tos typeOfService
type of interrupt service
Definition: IfxCcu6_PwmBc.h:277
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxCcu6_ServiceRequest_2
Service request output SR2.
Definition: IfxCcu6.h:234
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
float32
float float32
Definition: Platform_Types.h:170
PwmHl_Config::activeState
Ifx_ActiveState activeState
Active state select for PWM output. Active high means that the PWM edge is rising at the elapsed of w...
Definition: PwmHl.h:84
IfxCcu6_setDeadTimeValue
IFX_INLINE void IfxCcu6_setDeadTimeValue(Ifx_CCU6 *ccu6, uint8 value)
Sets the delay between switching from the passive state to the active state of the selected outputs (...
Definition: IfxCcu6.h:1972
IfxCcu6_initCc62OutPin
IFX_INLINE void IfxCcu6_initCc62OutPin(const IfxCcu6_Cc62_Out *cc62Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC62 output pin.
Definition: IfxCcu6.h:1789
IfxCcu6_initCout61Pin
IFX_INLINE void IfxCcu6_initCout61Pin(const IfxCcu6_Cout61_Out *cout61, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT61 output pin.
Definition: IfxCcu6.h:1848
IfxCcu6_PwmBc_Pins::cout61
IFX_CONST IfxCcu6_Cout61_Out * cout61
CC61 compare output COUT1.
Definition: IfxCcu6_PwmBc.h:296
IfxCcu6_routeInterruptNode
void IfxCcu6_routeInterruptNode(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source, IfxCcu6_ServiceRequest serviceRequest)
Routes the interrupt node pointer to the selected service requests.
Definition: IfxCcu6.c:254
IfxCcu6_PwmBc::ccu6
Ifx_CCU6 * ccu6
Pointer to the base of CCU6 registers.
Definition: IfxCcu6_PwmBc.h:351
IfxCcu6_PwmBc_Pins::t13hr
IFX_CONST IfxCcu6_T13hr_In * t13hr
T13HR input signal.
Definition: IfxCcu6_PwmBc.h:306
IfxCcu6_TimerId_t13
Timer 13.
Definition: IfxCcu6.h:337
IfxCcu6_PwmBc_Pins::cc61Out
IFX_CONST IfxCcu6_Cc61_Out * cc61Out
CC61 compare output CC1.
Definition: IfxCcu6_PwmBc.h:293
IfxCcu6_ChannelOut_cc1
CC61 compare output CC1.
Definition: IfxCcu6.h:114
IfxCcu6_getTimerAvailabilityStatus
IFX_INLINE boolean IfxCcu6_getTimerAvailabilityStatus(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
indicates the Timer blocks (T12 / T13) availability
Definition: IfxCcu6.h:1715
IfxCcu6_PwmBc_TriggerConfig::outputTriggerEnabled
boolean outputTriggerEnabled
Output trigger connection to VADC enable / disable choice.
Definition: IfxCcu6_PwmBc.h:337
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxCcu6_PwmBc_Config::timer12
IfxCcu6_PwmBc_Timer12 timer12
Structure for Timer 12.
Definition: IfxCcu6_PwmBc.h:362
IfxCcu6_PwmBc_Config::interrupt4
IfxCcu6_PwmBc_InterruptConfig interrupt4
Structure for fourth interrupt configuration.
Definition: IfxCcu6_PwmBc.h:371
IfxCcu6_setT12CounterValue
IFX_INLINE void IfxCcu6_setT12CounterValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit counter value of Timer12.
Definition: IfxCcu6.h:2085
IfxCcu6_setT12Frequency
float32 IfxCcu6_setT12Frequency(Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period, IfxCcu6_T12CountMode countMode)
Sets the frequency and clock input of the Timer 12. Caution: If desired frequency cannot achieved (by...
Definition: IfxCcu6.c:337
IfxCcu6_PwmBc::hallPatternIndex
uint8 hallPatternIndex
Hall pattern index of motor control table.
Definition: IfxCcu6_PwmBc.h:353
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxCcu6_PwmBc_Timer12::countMode
IfxCcu6_T12CountMode countMode
Operating mode of Timer 12.
Definition: IfxCcu6_PwmBc.h:314
IfxCcu6_enableShadowTransfer
IFX_INLINE void IfxCcu6_enableShadowTransfer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Enables shadow transfers of the timers (T12, T13 individually or together based on the selection) ...
Definition: IfxCcu6.h:1603
IfxCcu6_setHallSensorTriggerMode
IFX_INLINE void IfxCcu6_setHallSensorTriggerMode(Ifx_CCU6 *ccu6, IfxCcu6_HallSensorTriggerMode mode)
Sets source for the sampling of the Hall input pattern and the comparison to the current and the expe...
Definition: IfxCcu6.h:1992
IfxCcu6_PwmBc_Config::hallSyncEvent
IfxCcu6_HallSensorTriggerMode hallSyncEvent
Hall pattern evaluation trigger selection (HSYNC)
Definition: IfxCcu6_PwmBc.h:365
IfxCcu6_PwmBc_stop
void IfxCcu6_PwmBc_stop(IfxCcu6_PwmBc *pwmBc)
Stops the Hall sensored based PWM.
Definition: IfxCcu6_PwmBc.c:473
IfxCcu6_initCout60Pin
IFX_INLINE void IfxCcu6_initCout60Pin(const IfxCcu6_Cout60_Out *cout60, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT60 output pin.
Definition: IfxCcu6.h:1841
IfxCcu6_PwmBc_Pins::ccpos1
IFX_CONST IfxCcu6_Ccpos1_In * ccpos1
CCPOS2 input signal.
Definition: IfxCcu6_PwmBc.h:300
IfxCcu6_MultiChannelSwitchingSync_t13ZeroMatch
A T13 zero-match triggers the shadow transfer.
Definition: IfxCcu6.h:223
IfxCcu6_Cout62_Out
COUT62 pin mapping structure.
Definition: IfxCcu6_PinMap.h:168
IfxCcu6_PwmBc_Timer13::t12SyncDirection
IfxCcu6_T13TriggerDirection t12SyncDirection
Additional information to control trigger event selection.
Definition: IfxCcu6_PwmBc.h:325
IfxCcu6_PwmBc_Config::base
PwmHl_Config base
Base configuration.
Definition: IfxCcu6_PwmBc.h:360
IfxCcu6_PwmBc_MultiChannelControl::switchingSelect
IfxCcu6_MultiChannelSwitchingSelect switchingSelect
Trigger request source (next multi-channel event) for the shadow transfer MCM_ST from MCMPS to MCMP...
Definition: IfxCcu6_PwmBc.h:284
IfxCcu6_Ccpos0_In
CCPOS0 pin mapping structure.
Definition: IfxCcu6_PinMap.h:80
IfxCcu6_PwmBc_Pins::cc62Out
IFX_CONST IfxCcu6_Cc62_Out * cc62Out
CC62 compare output CC2.
Definition: IfxCcu6_PwmBc.h:294
PwmHl_Config::noiseFilter
Ifx_TimerValue noiseFilter
Specify hall sensor noise filter.
Definition: PwmHl.h:82
IfxCcu6_PwmBc_start
void IfxCcu6_PwmBc_start(IfxCcu6_PwmBc *pwmBc)
Starts the Hall sensored based PWM.
Definition: IfxCcu6_PwmBc.c:420
IfxCcu6_enableInterrupt
IFX_INLINE void IfxCcu6_enableInterrupt(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Enables the selected interrupt.
Definition: IfxCcu6.h:1560
IfxCcu6_PwmBc_initModule
void IfxCcu6_PwmBc_initModule(IfxCcu6_PwmBc *pwmBc, const IfxCcu6_PwmBc_Config *config)
Initialises the module with default configuration.
Definition: IfxCcu6_PwmBc.c:68
IfxCcu6_ChannelOut_cc0
CC60 compare output CC0.
Definition: IfxCcu6.h:112
IfxCcu6_TimerId_t12
Timer 12.
Definition: IfxCcu6.h:336
IfxCcu6_setMultiChannelSwitchingMode
IFX_INLINE void IfxCcu6_setMultiChannelSwitchingMode(Ifx_CCU6 *ccu6, IfxCcu6_MultiChannelSwitchingSelect mode)
Sets the trigger request source (next multi-channel event) for the shadow transfer MCM_ST from MCMPS ...
Definition: IfxCcu6.h:2021
IfxCcu6_ExternalTriggerMode_risingEdge
Bit T1xR is set if a rising edge of signal T1xHR is detected.
Definition: IfxCcu6.h:152
IfxCcu6_PwmBc.h
CCU6 PWMBC details.
IfxCcu6_ChannelOut_cout3
CC63 compare output COUT3.
Definition: IfxCcu6.h:118
IfxCcu6_setT13InputSignal
void IfxCcu6_setT13InputSignal(Ifx_CCU6 *ccu6, IfxCcu6_T13hr_In *extInput)
selects the actual input signal for the timer inputs.
Definition: IfxCcu6.c:470
IfxCcu6_T13TriggerDirection_noAction
no action
Definition: IfxCcu6.h:310
IfxCcu6_Cout60_Out
COUT60 pin mapping structure.
Definition: IfxCcu6_PinMap.h:152
IfxCcu6_initCc60OutPin
IFX_INLINE void IfxCcu6_initCc60OutPin(const IfxCcu6_Cc60_Out *cc60Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC60 output pin.
Definition: IfxCcu6.h:1745
IfxCcu6_InterruptSource_t12OneMatch
Interrupt enable for T12 one-match.
Definition: IfxCcu6.h:193
IfxCcu6_PwmBc_Pins::inputMode
IfxPort_InputMode inputMode
The CCPOSx pin input mode which should be configured.
Definition: IfxCcu6_PwmBc.h:304
IfxCcu6_PwmBc_Pins::t12hr
IFX_CONST IfxCcu6_T12hr_In * t12hr
T12HR input signal.
Definition: IfxCcu6_PwmBc.h:305
IfxCcu6_PwmBc_initModuleConfig
void IfxCcu6_PwmBc_initModuleConfig(IfxCcu6_PwmBc_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values.
Definition: IfxCcu6_PwmBc.c:333
IfxCcu6_PwmBc_InterruptConfig::serviceRequest
IfxCcu6_ServiceRequest serviceRequest
Selection of service request outputs.
Definition: IfxCcu6_PwmBc.h:275
IfxCcu6_PwmBc_TriggerConfig::outputLine
IfxCcu6_TrigOut outputLine
Trigger out selection.
Definition: IfxCcu6_PwmBc.h:338
IfxCcu6_isModuleEnabled
IFX_INLINE boolean IfxCcu6_isModuleEnabled(Ifx_CCU6 *ccu6)
Returns the status of module enabled or disabled.
Definition: IfxCcu6.h:1914
IfxCcu6_PwmBc_Config::trigger
IfxCcu6_PwmBc_TriggerConfig trigger
Structure for trigger configuration.
Definition: IfxCcu6_PwmBc.h:372
IfxCcu6_TrigOut_0
Output Trigger Select for CCU6061 TRIG0.
Definition: IfxCcu6_cfg.h:89
IfxCcu6_PwmBc_Pins::ccpos0
IFX_CONST IfxCcu6_Ccpos0_In * ccpos0
CCPOS0 input signal.
Definition: IfxCcu6_PwmBc.h:299
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:68
IfxCcu6_initCcpos2Pin
IFX_INLINE void IfxCcu6_initCcpos2Pin(const IfxCcu6_Ccpos2_In *ccpos2, IfxPort_InputMode inputMode)
Initialises a CCPOS0 input pin.
Definition: IfxCcu6.h:1826
IfxCcu6_HallSensorTriggerMode_t13PM
A T13 Period-Match.
Definition: IfxCcu6.h:168
IfxCcu6_initT12hrPin
IFX_INLINE void IfxCcu6_initT12hrPin(const IfxCcu6_T12hr_In *t12hrIn, IfxPort_InputMode inputMode)
Initialises a T12HR input pin.
Definition: IfxCcu6.h:1884
IfxCcu6_setT12CompareValue
void IfxCcu6_setT12CompareValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, uint16 value)
Sets the 16-bit compare value of Timer12 (writes into shadow registers)
Definition: IfxCcu6.c:331
IfxCcu6_Cc61_Out
CC61 pin mapping structure.
Definition: IfxCcu6_PinMap.h:136
IfxCcu6_ChannelOut_cc2
CC62 compare output CC2.
Definition: IfxCcu6.h:116
IfxCcu6_disableModulationOutput
void IfxCcu6_disableModulationOutput(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut)
Disables the modulation of the corresponding output signal by PWM pattern generated by the timers T12...
Definition: IfxCcu6.c:70
IfxCcu6_MultiChannelSwitchingSelect_t12Channel1CompareMatch
T12 channel 1 compare-match detected (phase delay function)
Definition: IfxCcu6.h:211
IfxCcu6_PwmBc_TriggerConfig::t12ExtInputTriggerMode
IfxCcu6_ExternalTriggerMode t12ExtInputTriggerMode
Event of signal T12HR that can set the run bit T12R by HW.
Definition: IfxCcu6_PwmBc.h:333
IfxCcu6_PwmBc_TriggerConfig::t13ExtInputTrigger
IfxCcu6_T13hr_In * t13ExtInputTrigger
External input signal selection for timer 13.
Definition: IfxCcu6_PwmBc.h:334
IfxCcu6_PwmBc_Pins::ccpos2
IFX_CONST IfxCcu6_Ccpos2_In * ccpos2
CCPOS2 input signal.
Definition: IfxCcu6_PwmBc.h:301
IfxCcu6_setT13CounterValue
IFX_INLINE void IfxCcu6_setT13CounterValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit counter value of Timer13.
Definition: IfxCcu6.h:2103
IfxCcu6_PwmBc_InterruptConfig::priority
uint16 priority
Interrupt priority.
Definition: IfxCcu6_PwmBc.h:276
IfxCcu6_PwmBc_Timer13::t12SyncEvent
IfxCcu6_T13TriggerEvent t12SyncEvent
T12 sync trigger event to start T13.
Definition: IfxCcu6_PwmBc.h:324
IfxCcu6_PwmBc_Config::interrupt1
IfxCcu6_PwmBc_InterruptConfig interrupt1
Structure for first interrupt configuration.
Definition: IfxCcu6_PwmBc.h:368
IfxCcu6_T12hr_In
T12HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:112
IfxCcu6_T13hr_In
T13HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:120
IfxCcu6_T13TriggerEvent_noAction
no action
Definition: IfxCcu6.h:321
IfxCcu6_initT13hrPin
IFX_INLINE void IfxCcu6_initT13hrPin(const IfxCcu6_T13hr_In *t13hrIn, IfxPort_InputMode inputMode)
Initialises a T13HR input pin.
Definition: IfxCcu6.h:1899
IfxCcu6_TrigSel_cout63
Definition: IfxCcu6_cfg.h:96
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxCcu6_updateHallPattern
IFX_INLINE void IfxCcu6_updateHallPattern(Ifx_CCU6 *ccu6, uint8 currentHall, uint8 expectedHall, uint8 output)
Updates the hall pattern (current hall, expected hall, moduleation output), in a single write...
Definition: IfxCcu6.h:2160
IfxCcu6_connectTrigger
void IfxCcu6_connectTrigger(Ifx_CCU6 *ccu6, IfxCcu6_TrigOut outputLine, IfxCcu6_TrigSel selectedTrigger)
Definition: IfxCcu6.c:53
IfxCcu6_InterruptSource_t12PeriodMatch
Interrupt enable for T12 period-match.
Definition: IfxCcu6.h:194
IfxCcu6_T12Channel_0
T12 channel CC60.
Definition: IfxCcu6.h:260
IfxCcu6_PwmBc
Module handle.
Definition: IfxCcu6_PwmBc.h:348
IfxCcu6_T12Channel_1
T12 channel CC61.
Definition: IfxCcu6.h:261
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxCcu6_ServiceRequest_1
Service request output SR1.
Definition: IfxCcu6.h:233
PwmHl_Config::t12Period
Ifx_TimerValue t12Period
Specify expected T12 PWM period in ticks.
Definition: PwmHl.h:78
IfxCcu6_initCout63Pin
IFX_INLINE void IfxCcu6_initCout63Pin(const IfxCcu6_Cout63_Out *cout63, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT63 output pin.
Definition: IfxCcu6.h:1862
PwmHl_Config::t13Period
Ifx_TimerValue t13Period
Specify expected T13 PWM period in ticks.
Definition: PwmHl.h:80
IfxCcu6_PwmBc_TriggerConfig::t13ExtInputTriggerMode
IfxCcu6_ExternalTriggerMode t13ExtInputTriggerMode
Event of signal T13HR that can set the run bit T13R by HW.
Definition: IfxCcu6_PwmBc.h:335
IfxCcu6_setT12InputSignal
void IfxCcu6_setT12InputSignal(Ifx_CCU6 *ccu6, IfxCcu6_T12hr_In *extInput)
selects the actual input signal for the timer inputs.
Definition: IfxCcu6.c:386
IfxCcu6_T12Channel_2
T12 channel CC62.
Definition: IfxCcu6.h:262
IfxCcu6_PwmBc_Pins::cc60Out
IFX_CONST IfxCcu6_Cc60_Out * cc60Out
CC60 compare output CC0.
Definition: IfxCcu6_PwmBc.h:292
IfxCcu6_PwmBc_Config::pins
IfxCcu6_PwmBc_Pins * pins
Structure for CCU6 output pin configuration.
Definition: IfxCcu6_PwmBc.h:367
IfxCcu6_disableShadowTransfer
IFX_INLINE void IfxCcu6_disableShadowTransfer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Disables shadow transfers of the timers (T12, T13 individually or together based on the selection) ...
Definition: IfxCcu6.h:1478
IfxCcu6_PwmBc_Config::timer13
IfxCcu6_PwmBc_Timer13 timer13
Structure for Timer 13.
Definition: IfxCcu6_PwmBc.h:363
IfxCcu6_Ccpos2_In
CCPOS2 pin mapping structure.
Definition: IfxCcu6_PinMap.h:96
IfxCcu6_setT13TriggerEventDirection
IFX_INLINE void IfxCcu6_setT13TriggerEventDirection(Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerDirection direction)
Sets the Timer13 trigger event direction.
Definition: IfxCcu6.h:2115
IfxCcu6_PwmBc_TriggerConfig::t13InSyncWithT12
boolean t13InSyncWithT12
Selection of Timer 13 start in sync with T12.
Definition: IfxCcu6_PwmBc.h:336
IfxCcu6_initCcpos0Pin
IFX_INLINE void IfxCcu6_initCcpos0Pin(const IfxCcu6_Ccpos0_In *ccpos0, IfxPort_InputMode inputMode)
Initialises a CCPOS0 input pin.
Definition: IfxCcu6.h:1796
IfxCcu6_Cout61_Out
COUT61 pin mapping structure.
Definition: IfxCcu6_PinMap.h:160
IfxCcu6_initCout62Pin
IFX_INLINE void IfxCcu6_initCout62Pin(const IfxCcu6_Cout62_Out *cout62, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT62 output pin.
Definition: IfxCcu6.h:1855
IfxCcu6_setMultiChannelSwitchingSync
IFX_INLINE void IfxCcu6_setMultiChannelSwitchingSync(Ifx_CCU6 *ccu6, IfxCcu6_MultiChannelSwitchingSync sync)
Sets the synchronization mechanism of the shadow transfer event MCM_ST if it has been requested befor...
Definition: IfxCcu6.h:2027
IfxCcu6_setT13CompareValue
IFX_INLINE void IfxCcu6_setT13CompareValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit compare value of Timer13 (writes into shadow register)
Definition: IfxCcu6.h:2097
IfxCcu6_PwmBc_Config::interrupt3
IfxCcu6_PwmBc_InterruptConfig interrupt3
Structure for third interrupt configuration.
Definition: IfxCcu6_PwmBc.h:370
IfxCcu6_PwmBc_Config::multiChannelControl
IfxCcu6_PwmBc_MultiChannelControl multiChannelControl
Structure for multichannel mode control.
Definition: IfxCcu6_PwmBc.h:366
IfxCcu6_PwmBc_Pins::cout62
IFX_CONST IfxCcu6_Cout62_Out * cout62
CC62 compare output COUT2.
Definition: IfxCcu6_PwmBc.h:297
IfxCcu6_startTimer
IFX_INLINE void IfxCcu6_startTimer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
starts the timers (T12, T13 individually or together based on the selection)
Definition: IfxCcu6.h:2140
IfxCcu6_initCcpos1Pin
IFX_INLINE void IfxCcu6_initCcpos1Pin(const IfxCcu6_Ccpos1_In *ccpos1, IfxPort_InputMode inputMode)
Initialises a CCPOS1 input pin.
Definition: IfxCcu6.h:1811
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxCcu6_PwmBc_Pins::cout63
IFX_CONST IfxCcu6_Cout63_Out * cout63
CC63 compare output COUT3.
Definition: IfxCcu6_PwmBc.h:298
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxCcu6_initCc61OutPin
IFX_INLINE void IfxCcu6_initCc61OutPin(const IfxCcu6_Cc61_Out *cc61Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC61 output pin.
Definition: IfxCcu6.h:1767
IfxCcu6_PwmBc_TriggerConfig::outputTrigger
IfxCcu6_TrigSel outputTrigger
Trigger selection.
Definition: IfxCcu6_PwmBc.h:339
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxCcu6_PwmBc_Pins::cout60
IFX_CONST IfxCcu6_Cout60_Out * cout60
CC60 compare output COUT0.
Definition: IfxCcu6_PwmBc.h:295
IfxCcu6_disableDelayBypass
IFX_INLINE void IfxCcu6_disableDelayBypass(Ifx_CCU6 *ccu6)
Disables the delay of the source signal for the sampling of the Hall input pattern (selected by HSYNC...
Definition: IfxCcu6.h:1459
IfxCcu6_enableModule
void IfxCcu6_enableModule(Ifx_CCU6 *ccu6)
Enables the selected CCU6 kernel.
Definition: IfxCcu6.c:145
IfxCcu6_T12ChannelMode_hallSensor
Hall Sensor Mode, In order to properly enable this mode, all three MSEL6x fields have to be programme...
Definition: IfxCcu6.h:275
IfxCcu6_enableModulationOutput
void IfxCcu6_enableModulationOutput(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut)
Enables the modulation of the corresponding output signal by PWM pattern generated by the timers T12 ...
Definition: IfxCcu6.c:114
IfxCcu6_PwmBc_TriggerConfig::t12ExtInputTrigger
IfxCcu6_T12hr_In * t12ExtInputTrigger
External input signal selection for timer 12.
Definition: IfxCcu6_PwmBc.h:332
IfxCcu6_getCaptureRegisterValue
uint32 IfxCcu6_getCaptureRegisterValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the capture register value of the selected channel.
Definition: IfxCcu6.c:175
IfxCcu6_setT13Frequency
float32 IfxCcu6_setT13Frequency(Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period)
Sets the frequency and clock input of the Timer 13 Caution: If desired frequency cannot achieved (by ...
Definition: IfxCcu6.c:421
IfxCcu6_PwmBc_updateHallPattern
void IfxCcu6_PwmBc_updateHallPattern(IfxCcu6_PwmBc *pwmBc, uint8 controlTable[6][3])
Updates the Hall pattern.
Definition: IfxCcu6_PwmBc.c:511
IfxCcu6_ServiceRequest_0
Service request output SR0.
Definition: IfxCcu6.h:232
IfxCcu6_setOutputPassiveState
IFX_INLINE void IfxCcu6_setOutputPassiveState(Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut, boolean state)
Sets the state of the corresponding compare channel, that is considered to be the passive state...
Definition: IfxCcu6.h:2033


iLLD_TC38A: IfxCcu6_PwmBc.h Source File

  • Ccu6
  • PwmBc
IfxCcu6_PwmBc.h
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6_PwmBc.h
3 * \brief CCU6 PWMBC details
4 * \ingroup IfxLld_Ccu6
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 * \defgroup IfxLld_Ccu6_PwmBc_Usage How to use the CCU6 PWMBC Interface driver?
43 * \ingroup IfxLld_Ccu6_PwmBc
44 *
45 * The PWMBC interface driver provides a default CCU6 configuration specifically for running a Brush Less DC Motor using hall sensor inputs, by utilising both the timers
46 *
47 * After evaluating the hall input pattern at every T13 period match, new out pattern is given to the module after the phase delay at the T13 zero match
48 *
49 * User has to prepare the control table for the respective motor he/she is using,
50 *
51 * In the following sections it will be described, how to integrate the driver into the application framework.
52 *
53 *
54 * \section IfxLld_Ccu6_PwmBc_Preparation Preparation
55 *
56 *
57 * \subsection IfxLld_Ccu6_PwmBc_Include Include Files
58 *
59 * Include following header file into your C code:
60 * \code
61 * #include <Ccu6/PwmBc/IfxCcu6_PwmBc.h>
62 * \endcode
63 *
64 * \subsection IfxLld_Ccu6_PwmBc_Variables Variables
65 *
66 * Declare the PWMBC handle and the motor control table as global variables in your C code:
67 *
68 * \code
69 * // used globally
70 * static IfxCcu6_PwmBc pwmBc;
71 * // prepare the control table
72 * uint8 controlTable[6][3] = {{1, 5, 17} ,
73 * {2, 3, 36} ,
74 * {3, 1, 6} ,
75 * {4, 6, 18} ,
76 * {5, 4, 24} ,
77 * {6, 2, 9}};
78 * // to store value of the speed
79 * uint32 speed = 0;
80 * \endcode
81 *
82 * \subsection IfxLld_Ccu6_PwmBc_Interrupt Interrupt Handler Installation
83 *
84 * See also \ref IfxLld_Cpu_Irq_Usage
85 *
86 * Define priority for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:
87 * \code
88 * // priorities are normally defined in Ifx_IntPrioDef.h
89 * #define IFX_INTPRIO_CCU6 1
90 * \endcode
91 *
92 * Add the interrupt service routine to your C code.
93 * \code
94 * IFX_INTERRUPT(ccu60ISR_PwmBc, 0, IFX_INTPRIO_CCU6)
95 * {
96 * //user code
97 * }
98 * \endcode
99 *
100 * Finally install the interrupt handlers in your initialisation function:
101 * \code
102 * // install interrupt handlers
103 * IfxCpu_Irq_installInterruptHandler(&ccu60ISR_PwmBc, IFX_INTPRIO_CCU6);
104 * IfxCpu_enableInterrupts();
105 * \endcode
106 *
107 * \subsection IfxLld_Ccu6_PwmBc_Init Module Initialisation
108 *
109 * The module initialisation can be done in the same function. Here an example:
110 *
111 * \code
112 * // create configuration
113 * IfxCcu6_PwmBc_Config pwmBcConfig;
114 * IfxCcu6_PwmBc_initModuleConfig(&pwmBcConfig, &MODULE_CCU60);
115 *
116 * // configure the frequencies of both the timers
117 * pwmBcConfig.base.t12Frequency = 400000;
118 * pwmBcConfig.base.t13Frequency = 400000;
119 *
120 * // configure the periods of both the timers
121 * pwmBcConfig.base.t12Period = 100;
122 * pwmBcConfig.base.t13Period = 100;
123 *
124 * // configure the phase delay and noise filter for hall input
125 * pwmBcConfig.base.phaseDelay = 20;
126 * pwmBcConfig.base.noiseFilter = 10;
127 *
128 * // select the active state of the output
129 * pwmBcConfig.base.activeState = Ifx_ActiveState_high;
130 *
131 * // configure timer12
132 * pwmBcConfig.timer12.countMode = IfxCcu6_T12CountMode_edgeAligned;
133 * pwmBcConfig.timer12.counterValue = 0;
134 *
135 * // configure timer13
136 * pwmBcConfig.timer13.counterValue = 0;
137 * pwmBcConfig.timer13.compareValue = 100;
138 * // configure the syncronisation, in case of sync start with T12
139 * pwmBcConfig.timer13.t12SyncEvent = IfxCcu6_T13TriggerEvent_onCC60RCompare;
140 * pwmBcConfig.timer13.t12SyncDirection = IfxCcu6_T13TriggerDirection_onT12CountingUp;
141 *
142 * // configure hall sync event that starts the hall input pattern evaluation
143 * pwmBcConfig.hallSyncEvent = IfxCcu6_HallSensorTriggerMode_t13PM,
144 *
145 * // configure multi channel control
146 * pwmBcConfig.multiChannelControl.switchingSelect = IfxCcu6_MultiChannelSwitchingSelect_t12Channel1CompareMatch,
147 * pwmBcConfig.multiChannelControl.switchingSync = IfxCcu6_MultiChannelSwitchingSync_t13ZeroMatch,
148 *
149 * // pin configuration
150 * const IfxCcu6_PwmBc_Pins pins = {
151 * IfxCcu60_CC60_P02_0_OUT, // CC60Out pin
152 * IfxCcu60_CC61_P02_2_OUT, // CC61Out pin
153 * IfxCcu60_CC62_P02_4_OUT, // CC62Out pin
154 * IfxCcu60_COUT60_P02_1_OUT, // COUT60 pin
155 * IfxCcu60_COUT60_P02_3_OUT, // COUT61 pin
156 * IfxCcu60_COUT60_P02_5_OUT, // COUT62 pin
157 * NULL, // COUT63 pin not used
158 *
159 * IfxCcu60_COUT60_P02_6_OUT // CCPOS0In pin
160 * IfxCcu60_COUT60_P02_7_OUT // CCPOS1In pin
161 * IfxCcu60_COUT60_P02_8_OUT // CCPOS2In pin
162 *
163 * IfxPort_OutputMode_pushPull,
164 * IfxPort_PadDriver_cmosAutomotiveSpeed1,
165 * IfxPort_InputMode_pullUp
166 * };
167 * pwmBcConfig.pins = &pins;
168 *
169 * // configure the interrupts
170 * pwmBcConfig.interrupt1.interruptSource = IfxCcu6_InterruptSource_cc61FallingEdge;
171 * pwmBcConfig.interrupt1.serviceRequest = IfxCcu6_ServiceRequest_2;
172 * pwmBcConfig.interrupt1.priority = IFX_INTRPRIO_CCU6;
173 * pwmBcConfig.interrupt1.typeOfService = IfxSrc_Tos_cpu0;
174 *
175 * // configure input and output triggers
176 * pwmBcConfig.trigger.t12ExtInputTrigger = NULL_PTR;
177 * pwmBcConfig.trigger.t12ExtInputTriggerMode = IfxCcu6_ExternalTriggerMode_risingEdge;
178 * pwmBcConfig.trigger.t13ExtInputTrigger = NULL_PTR;
179 * pwmBcConfig.trigger.t13ExtInputTriggerMode = IfxCcu6_ExternalTriggerMode_risingEdge;
180 * pwmBcConfig.trigger.t13InSyncWithT12 = FALSE;
181 *
182 * pwmBcConfig.trigger.outputTriggerEnabled = TRUE;
183 * pwmBcConfig.trigger.outputLine = IfxCcu6_TrigOut_0;
184 * pwmBcConfig.trigger.outputTrigger = IfxCcu6_TrigSel_cout63;
185 *
186 *
187 * // initialize the module
188 * IfxCcu6_PwmBc_initModule(&pwmBc, &pwmBcConfig);
189 * \endcode
190 *
191 *
192 * The PwmBc is ready for use now!
193 *
194 *
195 * \section IfxLld_Ccu6_PwmBc_ModulationControl Modulation Control
196 *
197 *
198 * The PWMBC driver provides simple to use Motor Control functions
199 *
200 * This means: you can start, stop, the BLDC motor once the module is initialised with the appropriate configuration
201 * You can optionally get the speed of the motor at any point of time
202 *
203 * Start the motor
204 *
205 * \code
206 * IfxCcu6_PwmBc_start(&pwmBc);
207 * \endcode
208 *
209 * Stop the motor
210 *
211 * \code
212 * IfxCcu6_PwmBc_stop(&pwmBc);
213 * \endcode
214 *
215 * Update the output pattern
216 *
217 * \code
218 * // prepare the control table
219 * // assumed to be declared globally
220 * uint8 controlTable[6][3] = {{1, 5, 17} ,
221 * {2, 3, 36} ,
222 * {3, 1, 6} ,
223 * {4, 6, 18} ,
224 * {5, 4, 24} ,
225 * {6, 2, 9}};
226 *
227 * // update the output pattern
228 * IfxCcu6_PwmBc_updateHallPattern(&pwmBc, controlTable[6][3]);
229 * \endcode
230 *
231 * Get the current motor speed
232 * (can also be called in ISR)
233 *
234 * \code
235 * // assumed to be declared globally
236 * uint32 speed = 0;
237 *
238 * // get the current motor speed
239 * speed = IfxCcu6_PwmBc_getMotorSpeed(&pwmBc);
240 * \endcode
241 *
242 * \defgroup IfxLld_Ccu6_PwmBc PWMBC Interface driver
243 * \ingroup IfxLld_Ccu6
244 * \defgroup IfxLld_Ccu6_PwmBc_DataStructures Data Structures
245 * \ingroup IfxLld_Ccu6_PwmBc
246 * \defgroup IfxLld_Ccu6_PwmBc_Module_Initialize_Functions Module Initialize Functions
247 * \ingroup IfxLld_Ccu6_PwmBc
248 * \defgroup IfxLld_Ccu6_PwmBc_Modulation_Control_Functions Modulation Control Functions
249 * \ingroup IfxLld_Ccu6_PwmBc
250 * \defgroup IfxLld_Ccu6_PwmBc_Hall_Pattern_Functions Hall Pattern Functions
251 * \ingroup IfxLld_Ccu6_PwmBc
252 */
253
254 #ifndef IFXCCU6_PWMBC_H
255 #define IFXCCU6_PWMBC_H 1
256
257 /******************************************************************************/
258 /*----------------------------------Includes----------------------------------*/
259 /******************************************************************************/
260
261 #include "Ccu6/Std/IfxCcu6.h"
262 #include "If/Ccu6If/PwmHl.h"
263
264 /******************************************************************************/
265 /*-----------------------------Data Structures--------------------------------*/
266 /******************************************************************************/
267
268 /** \addtogroup IfxLld_Ccu6_PwmBc_DataStructures
269 * \{ */
270 /** \brief Structure for interrupt configuration
271 */
272 typedef struct
273 {
274 IfxCcu6_InterruptSource source; /**< \brief Interrupt source selection */
275 IfxCcu6_ServiceRequest serviceRequest; /**< \brief Selection of service request outputs */
276 uint16 priority; /**< \brief Interrupt priority */
277 IfxSrc_Tos typeOfService; /**< \brief type of interrupt service */
278 } IfxCcu6_PwmBc_InterruptConfig;
279
280 /** \brief Structure for multichannel mode control
281 */
282 typedef struct
283 {
284 IfxCcu6_MultiChannelSwitchingSelect switchingSelect; /**< \brief Trigger request source (next multi-channel event) for the shadow transfer MCM_ST from MCMPS to MCMP */
285 IfxCcu6_MultiChannelSwitchingSync switchingSync; /**< \brief Synchronization selection for the shadow transfer event MCM_ST */
286 } IfxCcu6_PwmBc_MultiChannelControl;
287
288 /** \brief Structure for CCU6 output pin configuration
289 */
290 typedef struct
291 {
292 IFX_CONST IfxCcu6_Cc60_Out *cc60Out; /**< \brief CC60 compare output CC0 */
293 IFX_CONST IfxCcu6_Cc61_Out *cc61Out; /**< \brief CC61 compare output CC1 */
294 IFX_CONST IfxCcu6_Cc62_Out *cc62Out; /**< \brief CC62 compare output CC2 */
295 IFX_CONST IfxCcu6_Cout60_Out *cout60; /**< \brief CC60 compare output COUT0 */
296 IFX_CONST IfxCcu6_Cout61_Out *cout61; /**< \brief CC61 compare output COUT1 */
297 IFX_CONST IfxCcu6_Cout62_Out *cout62; /**< \brief CC62 compare output COUT2 */
298 IFX_CONST IfxCcu6_Cout63_Out *cout63; /**< \brief CC63 compare output COUT3 */
299 IFX_CONST IfxCcu6_Ccpos0_In *ccpos0; /**< \brief CCPOS0 input signal */
300 IFX_CONST IfxCcu6_Ccpos1_In *ccpos1; /**< \brief CCPOS2 input signal */
301 IFX_CONST IfxCcu6_Ccpos2_In *ccpos2; /**< \brief CCPOS2 input signal */
302 IfxPort_OutputMode outputMode; /**< \brief The pin output mode which should be configured */
303 IfxPort_PadDriver pinDriver; /**< \brief pad driver */
304 IfxPort_InputMode inputMode; /**< \brief The CCPOSx pin input mode which should be configured */
305 IFX_CONST IfxCcu6_T12hr_In *t12hr; /**< \brief T12HR input signal */
306 IFX_CONST IfxCcu6_T13hr_In *t13hr; /**< \brief T13HR input signal */
307 IfxPort_InputMode t1xhrInputMode; /**< \brief The T1xHR pin input mode which should be configured */
308 } IfxCcu6_PwmBc_Pins;
309
310 /** \brief Structure for Timer 12
311 */
312 typedef struct
313 {
314 IfxCcu6_T12CountMode countMode; /**< \brief Operating mode of Timer 12 */
315 uint16 counterValue; /**< \brief 16-bit counter value of Timer12 */
316 } IfxCcu6_PwmBc_Timer12;
317
318 /** \brief Structure for Timer 13
319 */
320 typedef struct
321 {
322 uint16 counterValue; /**< \brief 16-bit counter value of Timer13 */
323 uint16 compareValue; /**< \brief 16-bit comapre value of Timer12 */
324 IfxCcu6_T13TriggerEvent t12SyncEvent; /**< \brief T12 sync trigger event to start T13 */
325 IfxCcu6_T13TriggerDirection t12SyncDirection; /**< \brief Additional information to control trigger event selection */
326 } IfxCcu6_PwmBc_Timer13;
327
328 /** \brief Configuration structure for external triggers
329 */
330 typedef struct
331 {
332 IfxCcu6_T12hr_In *t12ExtInputTrigger; /**< \brief External input signal selection for timer 12 */
333 IfxCcu6_ExternalTriggerMode t12ExtInputTriggerMode; /**< \brief Event of signal T12HR that can set the run bit T12R by HW */
334 IfxCcu6_T13hr_In *t13ExtInputTrigger; /**< \brief External input signal selection for timer 13 */
335 IfxCcu6_ExternalTriggerMode t13ExtInputTriggerMode; /**< \brief Event of signal T13HR that can set the run bit T13R by HW */
336 boolean t13InSyncWithT12; /**< \brief Selection of Timer 13 start in sync with T12 */
337 boolean outputTriggerEnabled; /**< \brief Output trigger connection to VADC enable / disable choice */
338 IfxCcu6_TrigOut outputLine; /**< \brief Trigger out selection */
339 IfxCcu6_TrigSel outputTrigger; /**< \brief Trigger selection */
340 } IfxCcu6_PwmBc_TriggerConfig;
341
342 /** \} */
343
344 /** \addtogroup IfxLld_Ccu6_PwmBc_DataStructures
345 * \{ */
346 /** \brief Module handle
347 */
348 typedef struct
349 {
350 PwmHl base; /**< \brief Base PWMHL object */
351 Ifx_CCU6 *ccu6; /**< \brief Pointer to the base of CCU6 registers */
352 IfxCcu6_PwmBc_TriggerConfig trigger; /**< \brief Structure for trigger configuration */
353 uint8 hallPatternIndex; /**< \brief Hall pattern index of motor control table */
354 } IfxCcu6_PwmBc;
355
356 /** \brief Configuration structure of the module
357 */
358 typedef struct
359 {
360 PwmHl_Config base; /**< \brief Base configuration */
361 Ifx_CCU6 *ccu6; /**< \brief Pointer to the base of CCU6 registers */
362 IfxCcu6_PwmBc_Timer12 timer12; /**< \brief Structure for Timer 12 */
363 IfxCcu6_PwmBc_Timer13 timer13; /**< \brief Structure for Timer 13 */
364 uint8 hallPatternIndex; /**< \brief Hall pattern index of motor control table */
365 IfxCcu6_HallSensorTriggerMode hallSyncEvent; /**< \brief Hall pattern evaluation trigger selection (HSYNC) */
366 IfxCcu6_PwmBc_MultiChannelControl multiChannelControl; /**< \brief Structure for multichannel mode control */
367 IfxCcu6_PwmBc_Pins *pins; /**< \brief Structure for CCU6 output pin configuration */
368 IfxCcu6_PwmBc_InterruptConfig interrupt1; /**< \brief Structure for first interrupt configuration */
369 IfxCcu6_PwmBc_InterruptConfig interrupt2; /**< \brief Structure for second interrupt configuration */
370 IfxCcu6_PwmBc_InterruptConfig interrupt3; /**< \brief Structure for third interrupt configuration */
371 IfxCcu6_PwmBc_InterruptConfig interrupt4; /**< \brief Structure for fourth interrupt configuration */
372 IfxCcu6_PwmBc_TriggerConfig trigger; /**< \brief Structure for trigger configuration */
373 } IfxCcu6_PwmBc_Config;
374
375 /** \} */
376
377 /** \addtogroup IfxLld_Ccu6_PwmBc_Module_Initialize_Functions
378 * \{ */
379
380 /******************************************************************************/
381 /*-------------------------Global Function Prototypes-------------------------*/
382 /******************************************************************************/
383
384 /** \brief Initialises the module with default configuration
385 * \param pwmBc Module handle
386 * \param config Configuration structure of the module
387 * \return None
388 *
389 * A coding example can be found in \ref IfxLld_Ccu6_PwmBc_Usage
390 *
391 */
392 IFX_EXTERN void IfxCcu6_PwmBc_initModule(IfxCcu6_PwmBc *pwmBc, const IfxCcu6_PwmBc_Config *config);
393
394 /** \brief Fills the config structure with default values
395 * \param config Configuration structure of the module
396 * \param ccu6 Pointer to the base of CCU6 registers
397 * \return None
398 *
399 * A coding example can be found in \ref IfxLld_Ccu6_PwmBc_Usage
400 *
401 */
402 IFX_EXTERN void IfxCcu6_PwmBc_initModuleConfig(IfxCcu6_PwmBc_Config *config, Ifx_CCU6 *ccu6);
403
404 /** \} */
405
406 /** \addtogroup IfxLld_Ccu6_PwmBc_Modulation_Control_Functions
407 * \{ */
408
409 /******************************************************************************/
410 /*-------------------------Global Function Prototypes-------------------------*/
411 /******************************************************************************/
412
413 /** \brief Starts the Hall sensored based PWM
414 * \param pwmBc Module handle
415 * \return None
416 *
417 * A coding example can be found in \ref IfxLld_Ccu6_PwmBc_Usage
418 *
419 */
420 IFX_EXTERN void IfxCcu6_PwmBc_start(IfxCcu6_PwmBc *pwmBc);
421
422 /** \brief Stops the Hall sensored based PWM
423 * \param pwmBc Module handle
424 * \return None
425 *
426 * A coding example can be found in \ref IfxLld_Ccu6_PwmBc_Usage
427 *
428 */
429 IFX_EXTERN void IfxCcu6_PwmBc_stop(IfxCcu6_PwmBc *pwmBc);
430
431 /** \} */
432
433 /** \addtogroup IfxLld_Ccu6_PwmBc_Hall_Pattern_Functions
434 * \{ */
435
436 /******************************************************************************/
437 /*-------------------------Global Function Prototypes-------------------------*/
438 /******************************************************************************/
439
440 /** \brief returns the current motor speed
441 * \param pwmBc Module handle
442 * \return speed
443 *
444 * A coding example can be found in \ref IfxLld_Ccu6_PwmBc_Usage
445 *
446 */
447 IFX_EXTERN uint32 IfxCcu6_PwmBc_getMotorSpeed(IfxCcu6_PwmBc *pwmBc);
448
449 /** \brief Updates the Hall pattern
450 * \param pwmBc Module handle
451 * \param controlTable Motor Control table
452 * \return None
453 *
454 * A coding example can be found in \ref IfxLld_Ccu6_PwmBc_Usage
455 *
456 */
457 IFX_EXTERN void IfxCcu6_PwmBc_updateHallPattern(IfxCcu6_PwmBc * pwmBc, uint8 controlTable[6][3]);
458
459 /** \} */
460
461 #endif /* IFXCCU6_PWMBC_H */
IfxCcu6_PwmBc_Timer13::compareValue
uint16 compareValue
16-bit comapre value of Timer12
Definition: IfxCcu6_PwmBc.h:323
IfxCcu6_PwmBc_Config::interrupt2
IfxCcu6_PwmBc_InterruptConfig interrupt2
Structure for second interrupt configuration.
Definition: IfxCcu6_PwmBc.h:369
IfxCcu6_PwmBc_getMotorSpeed
IFX_EXTERN uint32 IfxCcu6_PwmBc_getMotorSpeed(IfxCcu6_PwmBc *pwmBc)
returns the current motor speed
Definition: IfxCcu6_PwmBc.c:53
IfxCcu6_Cc62_Out
CC62 pin mapping structure.
Definition: IfxCcu6_PinMap.h:144
IfxCcu6_PwmBc_Config
Configuration structure of the module.
Definition: IfxCcu6_PwmBc.h:358
IfxCcu6_Ccpos1_In
CCPOS1 pin mapping structure.
Definition: IfxCcu6_PinMap.h:88
IfxCcu6_PwmBc_Pins
Structure for CCU6 output pin configuration.
Definition: IfxCcu6_PwmBc.h:290
IfxCcu6_PwmBc_Pins::outputMode
IfxPort_OutputMode outputMode
The pin output mode which should be configured.
Definition: IfxCcu6_PwmBc.h:302
IfxCcu6_InterruptSource
IfxCcu6_InterruptSource
Interrupt source selection Description in Ifx_CCU.IEN.
Definition: IfxCcu6.h:179
IfxCcu6_MultiChannelSwitchingSelect
IfxCcu6_MultiChannelSwitchingSelect
Selection of the trigger request source (next multi-channel event) for the shadow transfer MCM_ST fro...
Definition: IfxCcu6.h:205
IfxCcu6_PwmBc_Pins::t1xhrInputMode
IfxPort_InputMode t1xhrInputMode
The T1xHR pin input mode which should be configured.
Definition: IfxCcu6_PwmBc.h:307
IfxCcu6_PwmBc::base
PwmHl base
Base PWMHL object.
Definition: IfxCcu6_PwmBc.h:350
IfxCcu6_PwmBc_InterruptConfig::source
IfxCcu6_InterruptSource source
Interrupt source selection.
Definition: IfxCcu6_PwmBc.h:274
IfxCcu6_PwmBc_Pins::pinDriver
IfxPort_PadDriver pinDriver
pad driver
Definition: IfxCcu6_PwmBc.h:303
IfxCcu6_Cout63_Out
COUT63 pin mapping structure.
Definition: IfxCcu6_PinMap.h:176
IfxCcu6_PwmBc_Timer12::counterValue
uint16 counterValue
16-bit counter value of Timer12
Definition: IfxCcu6_PwmBc.h:315
IfxCcu6_Cc60_Out
CC60 pin mapping structure.
Definition: IfxCcu6_PinMap.h:128
IfxCcu6_PwmBc_InterruptConfig
Structure for interrupt configuration.
Definition: IfxCcu6_PwmBc.h:272
IfxCcu6_PwmBc_MultiChannelControl::switchingSync
IfxCcu6_MultiChannelSwitchingSync switchingSync
Synchronization selection for the shadow transfer event MCM_ST.
Definition: IfxCcu6_PwmBc.h:285
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:140
IfxCcu6_PwmBc_InterruptConfig::typeOfService
IfxSrc_Tos typeOfService
type of interrupt service
Definition: IfxCcu6_PwmBc.h:277
uint32
unsigned long uint32
Definition: Platform_Types.h:116
PwmHl_Config
Configuration structure of the TPwm interface.
Definition: PwmHl.h:75
IfxCcu6_HallSensorTriggerMode
IfxCcu6_HallSensorTriggerMode
Defines the source for the sampling of the Hall input pattern and the comparison to the current and t...
Definition: IfxCcu6.h:163
IfxCcu6_PwmBc_Pins::cout61
IFX_CONST IfxCcu6_Cout61_Out * cout61
CC61 compare output COUT1.
Definition: IfxCcu6_PwmBc.h:296
IfxCcu6_T13TriggerDirection
IfxCcu6_T13TriggerDirection
Delivers additional information to control the automatic set of bit T13R in the case that the trigger...
Definition: IfxCcu6.h:308
IfxCcu6_PwmBc_Timer12
Structure for Timer 12.
Definition: IfxCcu6_PwmBc.h:312
IfxCcu6_PwmBc_Timer13
Structure for Timer 13.
Definition: IfxCcu6_PwmBc.h:320
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxCcu6_PwmBc::ccu6
Ifx_CCU6 * ccu6
Pointer to the base of CCU6 registers.
Definition: IfxCcu6_PwmBc.h:351
IfxCcu6_PwmBc_Pins::t13hr
IFX_CONST IfxCcu6_T13hr_In * t13hr
T13HR input signal.
Definition: IfxCcu6_PwmBc.h:306
IfxCcu6_PwmBc_Pins::cc61Out
IFX_CONST IfxCcu6_Cc61_Out * cc61Out
CC61 compare output CC1.
Definition: IfxCcu6_PwmBc.h:293
PwmHl.h
Multi-channels, dual-complementary PWM interface.
IfxCcu6_PwmBc_TriggerConfig::outputTriggerEnabled
boolean outputTriggerEnabled
Output trigger connection to VADC enable / disable choice.
Definition: IfxCcu6_PwmBc.h:337
IfxCcu6_PwmBc_Config::timer12
IfxCcu6_PwmBc_Timer12 timer12
Structure for Timer 12.
Definition: IfxCcu6_PwmBc.h:362
IfxCcu6_PwmBc_Config::interrupt4
IfxCcu6_PwmBc_InterruptConfig interrupt4
Structure for fourth interrupt configuration.
Definition: IfxCcu6_PwmBc.h:371
IfxCcu6_PwmBc::hallPatternIndex
uint8 hallPatternIndex
Hall pattern index of motor control table.
Definition: IfxCcu6_PwmBc.h:353
PwmHl_s
Structure of the TPwm interface.
Definition: PwmHl.h:63
IfxCcu6_PwmBc_Timer12::countMode
IfxCcu6_T12CountMode countMode
Operating mode of Timer 12.
Definition: IfxCcu6_PwmBc.h:314
IfxCcu6_PwmBc_Config::hallSyncEvent
IfxCcu6_HallSensorTriggerMode hallSyncEvent
Hall pattern evaluation trigger selection (HSYNC)
Definition: IfxCcu6_PwmBc.h:365
IfxCcu6_PwmBc_stop
IFX_EXTERN void IfxCcu6_PwmBc_stop(IfxCcu6_PwmBc *pwmBc)
Stops the Hall sensored based PWM.
Definition: IfxCcu6_PwmBc.c:473
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxCcu6_PwmBc_Pins::ccpos1
IFX_CONST IfxCcu6_Ccpos1_In * ccpos1
CCPOS2 input signal.
Definition: IfxCcu6_PwmBc.h:300
IfxCcu6_Cout62_Out
COUT62 pin mapping structure.
Definition: IfxCcu6_PinMap.h:168
IfxCcu6_PwmBc_Timer13::t12SyncDirection
IfxCcu6_T13TriggerDirection t12SyncDirection
Additional information to control trigger event selection.
Definition: IfxCcu6_PwmBc.h:325
IfxCcu6_PwmBc_Config::base
PwmHl_Config base
Base configuration.
Definition: IfxCcu6_PwmBc.h:360
IfxCcu6_PwmBc_MultiChannelControl::switchingSelect
IfxCcu6_MultiChannelSwitchingSelect switchingSelect
Trigger request source (next multi-channel event) for the shadow transfer MCM_ST from MCMPS to MCMP...
Definition: IfxCcu6_PwmBc.h:284
IfxCcu6_Ccpos0_In
CCPOS0 pin mapping structure.
Definition: IfxCcu6_PinMap.h:80
IfxCcu6_PwmBc_Pins::cc62Out
IFX_CONST IfxCcu6_Cc62_Out * cc62Out
CC62 compare output CC2.
Definition: IfxCcu6_PwmBc.h:294
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxCcu6_PwmBc_start
IFX_EXTERN void IfxCcu6_PwmBc_start(IfxCcu6_PwmBc *pwmBc)
Starts the Hall sensored based PWM.
Definition: IfxCcu6_PwmBc.c:420
IfxCcu6_PwmBc_initModule
IFX_EXTERN void IfxCcu6_PwmBc_initModule(IfxCcu6_PwmBc *pwmBc, const IfxCcu6_PwmBc_Config *config)
Initialises the module with default configuration.
Definition: IfxCcu6_PwmBc.c:68
IfxCcu6_Cout60_Out
COUT60 pin mapping structure.
Definition: IfxCcu6_PinMap.h:152
IfxCcu6_PwmBc_TriggerConfig
Configuration structure for external triggers.
Definition: IfxCcu6_PwmBc.h:330
IfxCcu6.h
CCU6 basic functionality.
IfxCcu6_PwmBc_Pins::inputMode
IfxPort_InputMode inputMode
The CCPOSx pin input mode which should be configured.
Definition: IfxCcu6_PwmBc.h:304
IfxCcu6_ServiceRequest
IfxCcu6_ServiceRequest
Selection of service request outputs.
Definition: IfxCcu6.h:230
IfxCcu6_T13TriggerEvent
IfxCcu6_T13TriggerEvent
Selects the trigger event to start T13 (automatic set of T13R for synchronization to T12 compare sign...
Definition: IfxCcu6.h:319
IfxCcu6_PwmBc_Pins::t12hr
IFX_CONST IfxCcu6_T12hr_In * t12hr
T12HR input signal.
Definition: IfxCcu6_PwmBc.h:305
IfxCcu6_PwmBc_initModuleConfig
IFX_EXTERN void IfxCcu6_PwmBc_initModuleConfig(IfxCcu6_PwmBc_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values.
Definition: IfxCcu6_PwmBc.c:333
IfxCcu6_PwmBc_InterruptConfig::serviceRequest
IfxCcu6_ServiceRequest serviceRequest
Selection of service request outputs.
Definition: IfxCcu6_PwmBc.h:275
IfxCcu6_PwmBc_TriggerConfig::outputLine
IfxCcu6_TrigOut outputLine
Trigger out selection.
Definition: IfxCcu6_PwmBc.h:338
IfxCcu6_PwmBc::trigger
IfxCcu6_PwmBc_TriggerConfig trigger
Structure for trigger configuration.
Definition: IfxCcu6_PwmBc.h:352
IfxCcu6_PwmBc_Pins::ccpos0
IFX_CONST IfxCcu6_Ccpos0_In * ccpos0
CCPOS0 input signal.
Definition: IfxCcu6_PwmBc.h:299
IfxCcu6_T12CountMode
IfxCcu6_T12CountMode
Operating mode of Timer 12 Definition in Ifx_CCU.TCTR0.B.CTM.
Definition: IfxCcu6.h:297
IfxCcu6_Cc61_Out
CC61 pin mapping structure.
Definition: IfxCcu6_PinMap.h:136
IfxCcu6_PwmBc_TriggerConfig::t12ExtInputTriggerMode
IfxCcu6_ExternalTriggerMode t12ExtInputTriggerMode
Event of signal T12HR that can set the run bit T12R by HW.
Definition: IfxCcu6_PwmBc.h:333
IfxCcu6_PwmBc_TriggerConfig::t13ExtInputTrigger
IfxCcu6_T13hr_In * t13ExtInputTrigger
External input signal selection for timer 13.
Definition: IfxCcu6_PwmBc.h:334
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:151
IfxCcu6_PwmBc_Pins::ccpos2
IFX_CONST IfxCcu6_Ccpos2_In * ccpos2
CCPOS2 input signal.
Definition: IfxCcu6_PwmBc.h:301
IfxCcu6_ExternalTriggerMode
IfxCcu6_ExternalTriggerMode
Defines the event of signal T1xHR that can set the run bit T1xR by HW Definition in Ifx_CCU...
Definition: IfxCcu6.h:149
IfxCcu6_PwmBc_InterruptConfig::priority
uint16 priority
Interrupt priority.
Definition: IfxCcu6_PwmBc.h:276
IfxCcu6_PwmBc_Timer13::t12SyncEvent
IfxCcu6_T13TriggerEvent t12SyncEvent
T12 sync trigger event to start T13.
Definition: IfxCcu6_PwmBc.h:324
IfxCcu6_PwmBc_Config::interrupt1
IfxCcu6_PwmBc_InterruptConfig interrupt1
Structure for first interrupt configuration.
Definition: IfxCcu6_PwmBc.h:368
IfxCcu6_T12hr_In
T12HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:112
IfxCcu6_T13hr_In
T13HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:120
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxCcu6_PwmBc_MultiChannelControl
Structure for multichannel mode control.
Definition: IfxCcu6_PwmBc.h:282
IfxCcu6_PwmBc
Module handle.
Definition: IfxCcu6_PwmBc.h:348
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:81
IfxCcu6_PwmBc_TriggerConfig::t13ExtInputTriggerMode
IfxCcu6_ExternalTriggerMode t13ExtInputTriggerMode
Event of signal T13HR that can set the run bit T13R by HW.
Definition: IfxCcu6_PwmBc.h:335
IfxCcu6_PwmBc_Pins::cc60Out
IFX_CONST IfxCcu6_Cc60_Out * cc60Out
CC60 compare output CC0.
Definition: IfxCcu6_PwmBc.h:292
IfxCcu6_TrigSel
IfxCcu6_TrigSel
Definition: IfxCcu6_cfg.h:94
IfxCcu6_PwmBc_Config::pins
IfxCcu6_PwmBc_Pins * pins
Structure for CCU6 output pin configuration.
Definition: IfxCcu6_PwmBc.h:367
IfxCcu6_PwmBc_Config::timer13
IfxCcu6_PwmBc_Timer13 timer13
Structure for Timer 13.
Definition: IfxCcu6_PwmBc.h:363
IfxCcu6_Ccpos2_In
CCPOS2 pin mapping structure.
Definition: IfxCcu6_PinMap.h:96
IfxCcu6_PwmBc_TriggerConfig::t13InSyncWithT12
boolean t13InSyncWithT12
Selection of Timer 13 start in sync with T12.
Definition: IfxCcu6_PwmBc.h:336
IfxCcu6_Cout61_Out
COUT61 pin mapping structure.
Definition: IfxCcu6_PinMap.h:160
IfxCcu6_PwmBc_Config::interrupt3
IfxCcu6_PwmBc_InterruptConfig interrupt3
Structure for third interrupt configuration.
Definition: IfxCcu6_PwmBc.h:370
IfxCcu6_TrigOut
IfxCcu6_TrigOut
Definition: IfxCcu6_cfg.h:87
IfxCcu6_PwmBc_Config::multiChannelControl
IfxCcu6_PwmBc_MultiChannelControl multiChannelControl
Structure for multichannel mode control.
Definition: IfxCcu6_PwmBc.h:366
IfxCcu6_MultiChannelSwitchingSync
IfxCcu6_MultiChannelSwitchingSync
Selection of the synchronization mechanism for the shadow transfer event MCM_ST Definition in Ifx_CCU...
Definition: IfxCcu6.h:219
IfxCcu6_PwmBc_Pins::cout62
IFX_CONST IfxCcu6_Cout62_Out * cout62
CC62 compare output COUT2.
Definition: IfxCcu6_PwmBc.h:297
IfxCcu6_PwmBc_Pins::cout63
IFX_CONST IfxCcu6_Cout63_Out * cout63
CC63 compare output COUT3.
Definition: IfxCcu6_PwmBc.h:298
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxCcu6_PwmBc_TriggerConfig::outputTrigger
IfxCcu6_TrigSel outputTrigger
Trigger selection.
Definition: IfxCcu6_PwmBc.h:339
IfxCcu6_PwmBc_Pins::cout60
IFX_CONST IfxCcu6_Cout60_Out * cout60
CC60 compare output COUT0.
Definition: IfxCcu6_PwmBc.h:295
IfxCcu6_PwmBc_TriggerConfig::t12ExtInputTrigger
IfxCcu6_T12hr_In * t12ExtInputTrigger
External input signal selection for timer 12.
Definition: IfxCcu6_PwmBc.h:332
IfxCcu6_PwmBc_updateHallPattern
IFX_EXTERN void IfxCcu6_PwmBc_updateHallPattern(IfxCcu6_PwmBc *pwmBc, uint8 controlTable[6][3])
Updates the Hall pattern.
Definition: IfxCcu6_PwmBc.c:511


iLLD_TC38A: IfxCcu6_PwmHl.c Source File

  • Ccu6
  • PwmHl
IfxCcu6_PwmHl.c
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6_PwmHl.c
3 * \brief CCU6 PWMHL details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxCcu6_PwmHl.h"
47 #include "_Utilities/Ifx_Assert.h"
48 #include "stddef.h"
49 #include "string.h"
50
51 /** \addtogroup IfxLld_Ccu6_PwmHl_StdIf_Functions
52 * \{ */
53
54 /******************************************************************************/
55 /*-----------------------Private Function Prototypes--------------------------*/
56 /******************************************************************************/
57
58 /** \brief Turn-off the complementary PWM generation mode.
59 *
60 * \note The changes are not applied until Timer->applyUpdate() is called.
61 * \note This function will set the ON time to ZERO, overriding previous call to
62 * IfxCcu6_PwmHl_setOnTime().
63 * \note This function will disable PWM in all channels, overriding previous call to
64 * IfxCcu6_PwmHl_setupChannels().
65 * \param driver CCU6 PWM driver
66 * \return None
67 */
68 IFX_STATIC void IfxCcu6_PwmHl_disable(IfxCcu6_PwmHl *driver);
69
70 /** \brief Turn-on the complementary PWM generation mode.
71 *
72 * \note The changes are not applied until Timer->applyUpdate() is called.
73 * \note This function will disable PWM in all channels, overriding previous call to
74 * IfxCcu6_PwmHl_setupChannels().
75 * \param driver CCU6 PWM driver
76 * \return None
77 */
78 IFX_STATIC void IfxCcu6_PwmHl_enable(IfxCcu6_PwmHl *driver);
79
80 /** \brief Sets up the output pins
81 * \param module Pointer to register base
82 * \param config CCU6 : PWM HL configuration
83 * \return None
84 */
85 IFX_STATIC void IfxCcu6_PwmHl_setOutputPins(Ifx_CCU6 *module, const IfxCcu6_PwmHl_Config *config);
86
87 /** \brief Updates the x output duty cycle in center aligned and center aligned inverted modes
88 * \param driver CCU6 PWM driver
89 * \param tOn T on
90 * \return None
91 */
92 IFX_STATIC void IfxCcu6_PwmHl_updateCenterAligned(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn);
93
94 /** \brief Updates the x output duty cycle in edge aligned modes (left and right aligned)
95 * \param driver CCU6 PWM driver
96 * \param tOn T on
97 * \return None
98 */
99 IFX_STATIC void IfxCcu6_PwmHl_updateEdgeAligned(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn);
100
101 /** \brief Set the outputs to inactive
102 * \param driver CCU6 PWM driver
103 * \param tOn T on
104 * \return None
105 */
106 IFX_STATIC void IfxCcu6_PwmHl_updateOff(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn);
107
108 /** \} */
109
110 /******************************************************************************/
111 /*------------------------Private Variables/Constants-------------------------*/
112 /******************************************************************************/
113
114 IFX_STATIC IFX_CONST IfxCcu6_PwmHl_Mode IfxCcu6_PwmHl_modes[Ifx_Pwm_Mode_off + 1] = {
115 {Ifx_Pwm_Mode_centerAligned, FALSE, &IfxCcu6_PwmHl_updateCenterAligned},
116 {Ifx_Pwm_Mode_centerAlignedInverted, TRUE, &IfxCcu6_PwmHl_updateCenterAligned},
117 {Ifx_Pwm_Mode_leftAligned, FALSE, &IfxCcu6_PwmHl_updateEdgeAligned },
118 {Ifx_Pwm_Mode_rightAligned, TRUE, &IfxCcu6_PwmHl_updateEdgeAligned },
119 {Ifx_Pwm_Mode_off, FALSE, &IfxCcu6_PwmHl_updateOff }
120 };
121
122 /******************************************************************************/
123 /*-------------------------Function Implementations---------------------------*/
124 /******************************************************************************/
125
126 IFX_STATIC void IfxCcu6_PwmHl_disable(IfxCcu6_PwmHl *driver)
127 {
128 IfxCcu6_TimerWithTrigger *timer = driver->timer;
129 Ifx_CCU6 *module = timer->ccu6;
130 Ifx_CCU6_CMPSTAT cmpstat;
131
132 Ifx_TimerValue tOn[3] = {0, 0, 0};
133 IfxCcu6_PwmHl_setOnTime(driver, tOn);
134
135 /** - All TOP and BOTTOM channel (COUTx) states equals CC6xST */
136 cmpstat.U = 0;
137 //cmpstat.B.T13IM = 0;
138 //cmpstat.B.COUT63PS = 0;
139 //cmpstat.B.CC60PS = 0;
140 //cmpstat.B.CC61PS = 0;
141 //cmpstat.B.CC62PS = 0;
142 //cmpstat.B.COUT60PS = 0;
143 //cmpstat.B.COUT61PS = 0;
144 //cmpstat.B.COUT62PS = 0;
145 module->CMPSTAT.U = cmpstat.U;
146
147 {
148 /* set all into stuck-states */
149 //boolean active[6] = {TRUE, TRUE, TRUE, TRUE, TRUE, TRUE};
150 boolean active[6] = {FALSE, FALSE, FALSE, FALSE, FALSE, FALSE};
151 boolean stuckState[6] = {FALSE, FALSE, FALSE, FALSE, FALSE, FALSE};
152 IfxCcu6_PwmHl_setupChannels(driver, active, stuckState);
153 }
154 }
155
156
157 IFX_STATIC void IfxCcu6_PwmHl_enable(IfxCcu6_PwmHl *driver)
158 {
159 IfxCcu6_TimerWithTrigger *timer = (IfxCcu6_TimerWithTrigger *)driver->timer;
160 Ifx_CCU6 *module = timer->ccu6;
161 /** - All TOP and BOTTOM channel (COUTx) states equals CC6xST */
162 Ifx_CCU6_CMPSTAT cmpstat;
163 cmpstat.U = 0;
164 //cmpstat.B.T13IM = 0;
165 //cmpstat.B.COUT63PS = 0;
166 //cmpstat.B.CC60PS = 0;
167 //cmpstat.B.CC61PS = 0;
168 //cmpstat.B.CC62PS = 0;
169 cmpstat.B.COUT60PS = 1;
170 cmpstat.B.COUT61PS = 1;
171 cmpstat.B.COUT62PS = 1;
172
173 module->CMPSTAT.U = cmpstat.U;
174 {
175 /* set all into non stuck-states */
176 boolean active[6] = {TRUE, TRUE, TRUE, TRUE, TRUE, TRUE};
177 boolean stuckState[6] = {FALSE, FALSE, FALSE, FALSE, FALSE, FALSE};
178 IfxCcu6_PwmHl_setupChannels(driver, active, stuckState);
179 }
180 }
181
182
183 float32 IfxCcu6_PwmHl_getDeadtime(IfxCcu6_PwmHl *driver)
184 {
185 return IfxStdIf_Timer_tickToS(driver->timer->base.clockFreq, driver->base.deadtime);
186 }
187
188
189 float32 IfxCcu6_PwmHl_getMinPulse(IfxCcu6_PwmHl *driver)
190 {
191 return IfxStdIf_Timer_tickToS(driver->timer->base.clockFreq, driver->base.minPulse - driver->base.deadtime);
192 }
193
194
195 Ifx_Pwm_Mode IfxCcu6_PwmHl_getMode(IfxCcu6_PwmHl *driver)
196 {
197 return driver->base.mode;
198 }
199
200
201 boolean IfxCcu6_PwmHl_init(IfxCcu6_PwmHl *driver, const IfxCcu6_PwmHl_Config *config)
202 {
203 boolean result = TRUE;
204
205 IfxCcu6_TimerWithTrigger *timer = config->timer;
206 Ifx_CCU6 *module = timer->ccu6;
207
208 driver->base.mode = Ifx_Pwm_Mode_init;
209 driver->timer = timer;
210 driver->base.setMode = 0;
211 driver->base.inverted = FALSE;
212 driver->base.ccxActiveState = config->base.ccxActiveState;
213 driver->base.coutxActiveState = config->base.coutxActiveState;
214
215 driver->base.channelCount = __minu(config->base.channelCount, IFXCCU6_PWMHL_MAX_CHANNELS);
216
217 IfxCcu6_PwmHl_setDeadtime(driver, config->base.deadtime);
218 IfxCcu6_PwmHl_setMinPulse(driver, config->base.minPulse);
219
220 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->base.channelCount == IFXCCU6_PWMHL_MAX_CHANNELS);
221 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->timer->base.countDir == IfxStdIf_Timer_CountDir_upAndDown);
222
223 unsigned int passiveState;
224 Ifx_CCU6_PSLR pslr;
225 Ifx_CCU6_MODCTR modctr;
226 Ifx_CCU6_MCMOUTS mcmouts;
227 Ifx_CCU6_MCMCTR mcmctr;
228
229 /** - All T12 channels (0,1,2) are set in compare mode */
230
231 IfxCcu6_setT12ChannelMode(module, IfxCcu6_T12Channel_0, IfxCcu6_T12ChannelMode_compareMode);
232 IfxCcu6_setT12ChannelMode(module, IfxCcu6_T12Channel_1, IfxCcu6_T12ChannelMode_compareMode);
233 IfxCcu6_setT12ChannelMode(module, IfxCcu6_T12Channel_2, IfxCcu6_T12ChannelMode_compareMode);
234
235 /** - Enable T12 modulation mode */
236 modctr.U = module->MODCTR.U;
237 modctr.B.MCMEN = 1;
238 modctr.B.T12MODEN = 0x3FU;
239 module->MODCTR.U = modctr.U;
240
241 IfxCcu6_setMultiChannelSwitchingMode(module, IfxCcu6_MultiChannelSwitchingSelect_t12PeriodMatch);
242
243 IfxCcu6_setMultiChannelSwitchingSync(module, IfxCcu6_MultiChannelSwitchingSync_t12ZeroMatch);
244
245 mcmctr.U = module->MCMCTR.U;
246 mcmctr.B.STE12D = FALSE;
247 mcmctr.B.STE12U = FALSE;
248 mcmctr.B.STE13U = FALSE;
249 module->MCMCTR.U = mcmctr.U;
250
251 IfxCcu6_enableDeadTime(module, IfxCcu6_T12Channel_0);
252 IfxCcu6_enableDeadTime(module, IfxCcu6_T12Channel_1);
253 IfxCcu6_enableDeadTime(module, IfxCcu6_T12Channel_2);
254
255 /* Configure the passive state */
256 pslr.B.PSL = 0;
257 passiveState = (config->base.ccxActiveState == Ifx_ActiveState_high) ? 0 : 1;
258 pslr.B.PSL |= (passiveState << 0);
259 pslr.B.PSL |= (passiveState << 2);
260 pslr.B.PSL |= (passiveState << 4);
261
262 passiveState = (config->base.coutxActiveState == Ifx_ActiveState_high) ? 0 : 1;
263 pslr.B.PSL |= (passiveState << 1);
264 pslr.B.PSL |= (passiveState << 3);
265 pslr.B.PSL |= (passiveState << 5);
266
267 module->PSLR.B.PSL = pslr.B.PSL;
268
269 IfxCcu6_PwmHl_setMode(driver, Ifx_Pwm_Mode_off);
270
271 Ifx_TimerValue tOn[IFXCCU6_PWMHL_MAX_CHANNELS] = {0};
272 IfxCcu6_PwmHl_updateOff(driver, tOn); /* tOn do not need defined values */
273
274 mcmouts.U = module->MCMOUTS.U;
275 mcmouts.B.MCMPS = 0x3F;
276 mcmouts.B.STRMCM = 1;
277 module->MCMOUTS.U = mcmouts.U;
278
279 IfxCcu6_PwmHl_setOutputPins(module, config);
280
281 //config->base.emergencyEnabled;
282
283 /* Transfer the shadow registers */
284 IfxCcu6_TimerWithTrigger_applyUpdate(driver->timer);
285
286 return result;
287 }
288
289
290 void IfxCcu6_PwmHl_initConfig(IfxCcu6_PwmHl_Config *config)
291 {
292 IfxStdIf_PwmHl_initConfig(&config->base);
293 config->timer = NULL_PTR;
294 config->cc0 = NULL_PTR;
295 config->cc1 = NULL_PTR;
296 config->cc2 = NULL_PTR;
297 config->cout0 = NULL_PTR;
298 config->cout1 = NULL_PTR;
299 config->cout2 = NULL_PTR;
300 }
301
302
303 boolean IfxCcu6_PwmHl_setDeadtime(IfxCcu6_PwmHl *driver, float32 deadtime)
304 {
305 Ifx_TimerValue value = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, deadtime);
306
307 driver->base.deadtime = __minu(__minu(value, driver->timer->base.period / 2), 255);
308
309 IfxCcu6_setDeadTimeValue(driver->timer->ccu6, (uint8)driver->base.deadtime);
310 return TRUE;
311 }
312
313
314 boolean IfxCcu6_PwmHl_setMinPulse(IfxCcu6_PwmHl *driver, float32 minPulse)
315 {
316 Ifx_TimerValue value = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, minPulse);
317
318 driver->base.minPulse = value + driver->base.deadtime;
319 driver->base.maxPulse = driver->timer->base.period - driver->base.minPulse;
320
321 return TRUE;
322 }
323
324
325 boolean IfxCcu6_PwmHl_setMode(IfxCcu6_PwmHl *driver, Ifx_Pwm_Mode mode)
326 {
327 boolean result = TRUE;
328 IfxCcu6_PwmHl_Base *base = &driver->base;
329
330 if (base->mode != mode)
331 {
332 if ((mode > Ifx_Pwm_Mode_off) || (IfxCcu6_PwmHl_modes[mode].update == NULL_PTR))
333 {
334 mode = Ifx_Pwm_Mode_off;
335 result = FALSE;
336 }
337
338 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, mode == IfxCcu6_PwmHl_modes[mode].mode);
339
340 base->mode = mode;
341 driver->update = IfxCcu6_PwmHl_modes[mode].update;
342
343 if (base->mode == Ifx_Pwm_Mode_off)
344 {
345 IfxCcu6_PwmHl_disable(driver);
346 }
347 else
348 {
349 IfxCcu6_PwmHl_enable(driver);
350 }
351 }
352
353 return result;
354 }
355
356
357 void IfxCcu6_PwmHl_setOnTime(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
358 {
359 // Period = 12
360 // Ton = 2
361 // Center-aligned (the CCx equals CC6xST):
362 // T12PR = (Period/2)-1
363 // T12 = 0 1 2 3 4 5 6 5 4 3 2 1 0 1 2 3
364 // CC6xR = (Period - Ton) / 2 = 5
365 // CC6xST = 1 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0
366 // Right-aligned (the CCx equals CC6xST):
367 // T12PR = (Period-1)
368 // T12 = 0 1 2 3 4 5 6 7 8 9 10 11 0 1 2 3
369 // CC6xR = (Period - Ton) = 10
370 // CC6xST = 1 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0
371 // Left-aligned (the CCx equals ~CC6xST):
372 // T12PR = (Period-1)
373 // T12 = 0 1 2 3 4 5 6 7 8 9 10 11 0 1 2 3
374 // CC6xR = Ton = 2
375 // CC6xST = 1 0 0 1 1 1 1 1 1 1 1 1 1 0 0 0
376 IfxCcu6_TimerWithTrigger *timer = (IfxCcu6_TimerWithTrigger *)driver->timer;
377 Ifx_CCU6 *module = timer->ccu6;
378 int i;
379 int channels = driver->base.channelCount;
380 Ifx_TimerValue period = driver->timer->base.period;
381
382 for (i = 0; i < channels; i++)
383 {
384 Ifx_TimerValue cmp;
385 Ifx_TimerValue tOnX = tOn[i];
386
387 if (tOnX < driver->base.minPulse)
388 {
389 tOnX = 0;
390 }
391 else if (tOnX > driver->base.maxPulse)
392 {
393 tOnX = period;
394 }
395 else
396 {}
397
398 cmp = (period - tOnX);
399 cmp = cmp >> ((driver->base.mode == Ifx_Pwm_Mode_centerAligned) ? 1 : 0);
400 IfxCcu6_setT12CompareValue(module, (IfxCcu6_T12Channel)i, (uint16)cmp);
401 }
402 }
403
404
405 IFX_STATIC void IfxCcu6_PwmHl_setOutputPins(Ifx_CCU6 *module, const IfxCcu6_PwmHl_Config *config)
406 {
407 IFX_UNUSED_PARAMETER(module->CLC.U != (uint32)0)
408
409 if (config->cc0 != NULL_PTR)
410 {
411 IfxCcu6_initCc60OutPin(config->cc0, config->base.outputMode, config->base.outputDriver);
412 }
413
414 if (config->cc1 != NULL_PTR)
415 {
416 IfxCcu6_initCc61OutPin(config->cc1, config->base.outputMode, config->base.outputDriver);
417 }
418
419 if (config->cc2 != NULL_PTR)
420 {
421 IfxCcu6_initCc62OutPin(config->cc2, config->base.outputMode, config->base.outputDriver);
422 }
423
424 if (config->cout0 != NULL_PTR)
425 {
426 IfxCcu6_initCout60Pin(config->cout0, config->base.outputMode, config->base.outputDriver);
427 }
428
429 if (config->cout1 != NULL_PTR)
430 {
431 IfxCcu6_initCout61Pin(config->cout1, config->base.outputMode, config->base.outputDriver);
432 }
433
434 if (config->cout2 != NULL_PTR)
435 {
436 IfxCcu6_initCout62Pin(config->cout2, config->base.outputMode, config->base.outputDriver);
437 }
438 }
439
440
441 void IfxCcu6_PwmHl_setupChannels(IfxCcu6_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
442 {
443 IfxCcu6_TimerWithTrigger *timer = driver->timer;
444 Ifx_CCU6 *module = timer->ccu6;
445 {
446 uint8 pattern;
447
448 pattern = 0;
449 pattern |= ((activeCh[0] != FALSE) ? 1 : 0) << 0;
450 pattern |= ((activeCh[1] != FALSE) ? 1 : 0) << 1;
451 pattern |= ((activeCh[2] != FALSE) ? 1 : 0) << 2;
452 pattern |= ((activeCh[3] != FALSE) ? 1 : 0) << 3;
453 pattern |= ((activeCh[4] != FALSE) ? 1 : 0) << 4;
454 pattern |= ((activeCh[5] != FALSE) ? 1 : 0) << 5;
455
456 IfxCcu6_setMultiChannelPwmPattern(module, pattern);
457 }
458 {
459 Ifx_CCU6_PSLR pslr;
460 pslr.U = module->PSLR.U;
461 pslr.B.PSL = 0;
462
463 // top:
464 pslr.B.PSL |= ((activeCh[0] == FALSE) ? ((stuckSt[0] == FALSE) ? 0 : 1) : 0) << 0;
465 pslr.B.PSL |= ((activeCh[2] == FALSE) ? ((stuckSt[2] == FALSE) ? 0 : 1) : 0) << 2;
466 pslr.B.PSL |= ((activeCh[4] == FALSE) ? ((stuckSt[4] == FALSE) ? 0 : 1) : 0) << 4;
467
468 // bottom:
469 pslr.B.PSL |= ((activeCh[1] == FALSE) ? ((stuckSt[1] == FALSE) ? 0 : 1) : 0) << 1;
470 pslr.B.PSL |= ((activeCh[3] == FALSE) ? ((stuckSt[3] == FALSE) ? 0 : 1) : 0) << 3;
471 pslr.B.PSL |= ((activeCh[5] == FALSE) ? ((stuckSt[5] == FALSE) ? 0 : 1) : 0) << 5;
472 module->PSLR.U = pslr.U;
473 }
474 }
475
476
477 boolean IfxCcu6_PwmHl_stdIfPwmHlInit(IfxStdIf_PwmHl *stdif, IfxCcu6_PwmHl *driver)
478 {
479 /* Ensure the stdif is reset to zeros */
480 memset(stdif, 0, sizeof(IfxStdIf_PwmHl));
481
482 /* *INDENT-OFF* Note: this file was indented manually by the author. */
483 /* Set the API link */
484 stdif->driver = driver;
485 stdif->setDeadtime = (IfxStdIf_PwmHl_SetDeadtime )&IfxCcu6_PwmHl_setDeadtime;
486 stdif->getDeadtime = (IfxStdIf_PwmHl_GetDeadtime )&IfxCcu6_PwmHl_getDeadtime;
487 stdif->setMinPulse = (IfxStdIf_PwmHl_SetMinPulse )&IfxCcu6_PwmHl_setMinPulse;
488 stdif->getMinPulse = (IfxStdIf_PwmHl_GetMinPulse )&IfxCcu6_PwmHl_getMinPulse;
489 stdif->getMode = (IfxStdIf_PwmHl_GetMode )&IfxCcu6_PwmHl_getMode;
490 stdif->setMode = (IfxStdIf_PwmHl_SetMode )&IfxCcu6_PwmHl_setMode;
491 stdif->setOnTime = (IfxStdIf_PwmHl_SetOnTime )&IfxCcu6_PwmHl_setOnTime;
492 stdif->setupChannels = (IfxStdIf_PwmHl_SetupChannels)&IfxCcu6_PwmHl_setupChannels;
493 IfxCcu6_TimerWithTrigger_stdIfTimerInit(&stdif->timer, driver->timer);
494 /* *INDENT-ON* */
495
496 return TRUE;
497 }
498
499
500 IFX_STATIC void IfxCcu6_PwmHl_updateCenterAligned(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
501 {
502 IfxCcu6_PwmHl_setOnTime(driver, tOn);
503 }
504
505
506 IFX_STATIC void IfxCcu6_PwmHl_updateEdgeAligned(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
507 {
508 IfxCcu6_PwmHl_setOnTime(driver, tOn);
509 }
510
511
512 IFX_STATIC void IfxCcu6_PwmHl_updateOff(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
513 {
514 /* Nothing to do */
515 IFX_UNUSED_PARAMETER(driver)
516 IFX_UNUSED_PARAMETER(tOn)
517 }
Ifx_ActiveState_high
The signal is high active.
Definition: Ifx_Types.h:116
IfxCcu6_PwmHl_Base::coutxActiveState
Ifx_ActiveState coutxActiveState
Bottom PWM active state.
Definition: IfxCcu6_PwmHl.h:104
IfxStdIf_PwmHl_::timer
IfxStdIf_Timer timer
Timer related standard interface.
Definition: IfxStdIf_PwmHl.h:196
IfxCcu6_TimerWithTrigger::base
IfxCcu6_TimerWithTrigger_Base base
Timer base structure.
Definition: IfxCcu6_TimerWithTrigger.h:89
Ifx_Pwm_Mode
Ifx_Pwm_Mode
Definition: Ifx_Types.h:175
IfxCcu6_PwmHl_updateOff
IFX_STATIC void IfxCcu6_PwmHl_updateOff(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Set the outputs to inactive.
Definition: IfxCcu6_PwmHl.c:512
IfxCcu6_setMultiChannelPwmPattern
IFX_INLINE void IfxCcu6_setMultiChannelPwmPattern(Ifx_CCU6 *ccu6, uint8 pattern)
Sets the output pattern for the multichannel mode (writes into shadow register)
Definition: IfxCcu6.h:2015
IfxCcu6_PwmHl_getMode
Ifx_Pwm_Mode IfxCcu6_PwmHl_getMode(IfxCcu6_PwmHl *driver)
Returns Pwm mode.
Definition: IfxCcu6_PwmHl.c:195
IfxCcu6_PwmHl_Base
Multi-channels PWM object definition (channels only)
Definition: IfxCcu6_PwmHl.h:96
IfxCcu6_PwmHl_Config::cc2
IfxCcu6_Cc62_Out * cc2
CC2 channel used.
Definition: IfxCcu6_PwmHl.h:121
IfxCcu6_PwmHl_getDeadtime
float32 IfxCcu6_PwmHl_getDeadtime(IfxCcu6_PwmHl *driver)
Returns the dead time.
Definition: IfxCcu6_PwmHl.c:183
IfxStdIf_PwmHl_::setupChannels
IfxStdIf_PwmHl_SetupChannels setupChannels
IfxStdIf_PwmHl_SetupChannels.
Definition: IfxStdIf_PwmHl.h:194
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxStdIf_PwmHl_::getMinPulse
IfxStdIf_PwmHl_GetMinPulse getMinPulse
IfxStdIf_PwmHl_GetMinPulse.
Definition: IfxStdIf_PwmHl.h:188
IfxCcu6_PwmHl_s
CCU6 PWM driver.
Definition: IfxCcu6_PwmHl.h:138
IfxCcu6_PwmHl_setOutputPins
IFX_STATIC void IfxCcu6_PwmHl_setOutputPins(Ifx_CCU6 *module, const IfxCcu6_PwmHl_Config *config)
Sets up the output pins.
Definition: IfxCcu6_PwmHl.c:405
IfxStdIf_PwmHl_::getDeadtime
IfxStdIf_PwmHl_GetDeadtime getDeadtime
IfxStdIf_PwmHl_GetDeadtime.
Definition: IfxStdIf_PwmHl.h:185
IfxCcu6_enableDeadTime
IFX_INLINE void IfxCcu6_enableDeadTime(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Enables the dead time generation for each compare channel (0, 1, 2) of Timer12.
Definition: IfxCcu6.h:1540
IfxCcu6_MultiChannelSwitchingSelect_t12PeriodMatch
T12 period match detected (while counting up)
Definition: IfxCcu6.h:213
IfxCcu6_PwmHl.h
CCU6 PWMHL details.
IfxCcu6_PwmHl_Config::cout1
IfxCcu6_Cout61_Out * cout1
COUT1 channel used.
Definition: IfxCcu6_PwmHl.h:123
IfxCcu6_PwmHl_Config::cc0
IfxCcu6_Cc60_Out * cc0
CC0 channel used.
Definition: IfxCcu6_PwmHl.h:119
Ifx_Pwm_Mode_centerAligned
Center aligned mode.
Definition: Ifx_Types.h:177
IfxCcu6_TimerWithTrigger_Base::countDir
IfxStdIf_Timer_CountDir countDir
Timer counting mode.
Definition: IfxCcu6_TimerWithTrigger.h:80
memset
void * memset(void *s, int c, syze_t n)
IfxStdIf_Timer_tickToS
IFX_INLINE float32 IfxStdIf_Timer_tickToS(float32 clockFreq, Ifx_TimerValue ticks)
Convert timer ticks to seconds.
Definition: IfxStdIf_Timer.h:435
IfxStdIf_PwmHl_SetupChannels
void(* IfxStdIf_PwmHl_SetupChannels)(IfxStdIf_InterfaceDriver stdIf, boolean *activeCh, boolean *stuckSt)
Set channels which are generating PWM or in "stuck-at" state.
Definition: IfxStdIf_PwmHl.h:175
IfxCcu6_setT12ChannelMode
IFX_INLINE void IfxCcu6_setT12ChannelMode(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, IfxCcu6_T12ChannelMode mode)
Sets the operating mode of the Timer12 capture/compare channels.
Definition: IfxCcu6.h:2071
IfxCcu6_PwmHl_Mode
Structure for PWM configuration.
Definition: IfxCcu6_PwmHl.h:129
IfxCcu6_PwmHl_getMinPulse
float32 IfxCcu6_PwmHl_getMinPulse(IfxCcu6_PwmHl *driver)
Returns the minimum pulse.
Definition: IfxCcu6_PwmHl.c:189
IfxStdIf_PwmHl_GetMode
Ifx_Pwm_Mode(* IfxStdIf_PwmHl_GetMode)(IfxStdIf_InterfaceDriver stdIf)
Return the PWM mode.
Definition: IfxStdIf_PwmHl.h:125
IfxStdIf_PwmHl_initConfig
void IfxStdIf_PwmHl_initConfig(IfxStdIf_PwmHl_Config *config)
Definition: IfxStdIf_PwmHl.c:45
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxStdIf_Timer_sToTick
IFX_INLINE Ifx_TimerValue IfxStdIf_Timer_sToTick(float32 clockFreq, float32 seconds)
Convert seconds to timer ticks.
Definition: IfxStdIf_Timer.h:446
float32
float float32
Definition: Platform_Types.h:170
IfxCcu6_PwmHl_s::base
IfxCcu6_PwmHl_Base base
Multi-channels PWM object definition (channels only)
Definition: IfxCcu6_PwmHl.h:140
Ifx_Assert.h
Assert functions.
IfxCcu6_TimerWithTrigger
CCU6 Timer interface.
Definition: IfxCcu6_TimerWithTrigger.h:87
IfxCcu6_setDeadTimeValue
IFX_INLINE void IfxCcu6_setDeadTimeValue(Ifx_CCU6 *ccu6, uint8 value)
Sets the delay between switching from the passive state to the active state of the selected outputs (...
Definition: IfxCcu6.h:1972
__minu
uint32 __minu(uint32, uint32) __attribute__((intrinsic_pseudo(3
IfxCcu6_PwmHl_init
boolean IfxCcu6_PwmHl_init(IfxCcu6_PwmHl *driver, const IfxCcu6_PwmHl_Config *config)
Initializes the timer object.
Definition: IfxCcu6_PwmHl.c:201
IfxCcu6_initCc62OutPin
IFX_INLINE void IfxCcu6_initCc62OutPin(const IfxCcu6_Cc62_Out *cc62Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC62 output pin.
Definition: IfxCcu6.h:1789
IfxCcu6_PwmHl_updateEdgeAligned
IFX_STATIC void IfxCcu6_PwmHl_updateEdgeAligned(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in edge aligned modes (left and right aligned)
Definition: IfxCcu6_PwmHl.c:506
IfxCcu6_initCout61Pin
IFX_INLINE void IfxCcu6_initCout61Pin(const IfxCcu6_Cout61_Out *cout61, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT61 output pin.
Definition: IfxCcu6.h:1848
IfxCcu6_PwmHl_setMode
boolean IfxCcu6_PwmHl_setMode(IfxCcu6_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate()
Definition: IfxCcu6_PwmHl.c:325
IfxCcu6_PwmHl_Base::inverted
boolean inverted
Flag indicating the center aligned inverted mode (TRUE)
Definition: IfxCcu6_PwmHl.h:105
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxCcu6_PwmHl_stdIfPwmHlInit
boolean IfxCcu6_PwmHl_stdIfPwmHlInit(IfxStdIf_PwmHl *stdif, IfxCcu6_PwmHl *driver)
Initialises the statndard interface Pwm.
Definition: IfxCcu6_PwmHl.c:477
IfxStdIf_PwmHl_Config::deadtime
float32 deadtime
Dead time between the top and bottom channels in seconds.
Definition: IfxStdIf_PwmHl.h:202
IfxCcu6_T12ChannelMode_compareMode
Compare mode.
Definition: IfxCcu6.h:270
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxStdIf_PwmHl_::driver
IfxStdIf_InterfaceDriver driver
Interface driver object.
Definition: IfxStdIf_PwmHl.h:181
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxCcu6_initCout60Pin
IFX_INLINE void IfxCcu6_initCout60Pin(const IfxCcu6_Cout60_Out *cout60, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT60 output pin.
Definition: IfxCcu6.h:1841
IfxCcu6_PwmHl_Base::ccxActiveState
Ifx_ActiveState ccxActiveState
Top PWM active state.
Definition: IfxCcu6_PwmHl.h:103
IfxCcu6_PwmHl_modes
IFX_STATIC IFX_CONST IfxCcu6_PwmHl_Mode IfxCcu6_PwmHl_modes[Ifx_Pwm_Mode_off+1]
Definition: IfxCcu6_PwmHl.c:114
IfxStdIf_Timer_CountDir_upAndDown
Timer is counting up and down.
Definition: IfxStdIf_Timer.h:88
IfxCcu6_PwmHl_updateCenterAligned
IFX_STATIC void IfxCcu6_PwmHl_updateCenterAligned(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in center aligned and center aligned inverted modes.
Definition: IfxCcu6_PwmHl.c:500
IfxCcu6_TimerWithTrigger_Base::clockFreq
float32 clockFreq
Timer input clock frequency (cached value)
Definition: IfxCcu6_TimerWithTrigger.h:79
Ifx_Pwm_Mode_leftAligned
Left aligned mode. The PWM period starts with a rising edge.
Definition: Ifx_Types.h:179
IfxCcu6_PwmHl_s::timer
IfxCcu6_TimerWithTrigger * timer
Pointer to the linked timer object.
Definition: IfxCcu6_PwmHl.h:141
IfxStdIf_PwmHl_GetMinPulse
float32(* IfxStdIf_PwmHl_GetMinPulse)(IfxStdIf_InterfaceDriver stdIf)
Return the minimum pulse time in s.
Definition: IfxStdIf_PwmHl.h:117
IfxCcu6_TimerWithTrigger_Base::period
Ifx_TimerValue period
Timer period in ticks (cached value)
Definition: IfxCcu6_TimerWithTrigger.h:77
IfxStdIf_PwmHl_Config::outputDriver
IfxPort_PadDriver outputDriver
Output pad driver of ccx and coutx pins.
Definition: IfxStdIf_PwmHl.h:208
IfxStdIf_PwmHl_Config::ccxActiveState
Ifx_ActiveState ccxActiveState
Top PWM active state.
Definition: IfxStdIf_PwmHl.h:211
Ifx_Pwm_Mode_init
Initialisation mode, do not use at run time.
Definition: Ifx_Types.h:182
IfxCcu6_PwmHl_Config::cout2
IfxCcu6_Cout62_Out * cout2
COUT2 channel used.
Definition: IfxCcu6_PwmHl.h:124
IfxCcu6_PwmHl_Config
CCU6: PWM HL configuration.
Definition: IfxCcu6_PwmHl.h:115
IfxCcu6_PwmHl_Base::maxPulse
Ifx_TimerValue maxPulse
internal parameter
Definition: IfxCcu6_PwmHl.h:100
IfxCcu6_setMultiChannelSwitchingMode
IFX_INLINE void IfxCcu6_setMultiChannelSwitchingMode(Ifx_CCU6 *ccu6, IfxCcu6_MultiChannelSwitchingSelect mode)
Sets the trigger request source (next multi-channel event) for the shadow transfer MCM_ST from MCMPS ...
Definition: IfxCcu6.h:2021
IfxCcu6_PwmHl_Config::base
IfxStdIf_PwmHl_Config base
PWM HL standard interface configuration.
Definition: IfxCcu6_PwmHl.h:117
IfxStdIf_PwmHl_
Standard interface object.
Definition: IfxStdIf_PwmHl.h:179
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:50
Ifx_Pwm_Mode_off
All switch open.
Definition: Ifx_Types.h:181
IfxCcu6_initCc60OutPin
IFX_INLINE void IfxCcu6_initCc60OutPin(const IfxCcu6_Cc60_Out *cc60Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC60 output pin.
Definition: IfxCcu6.h:1745
IfxCcu6_T12Channel
IfxCcu6_T12Channel
Capture compare channel of Timer12.
Definition: IfxCcu6.h:258
IfxStdIf_PwmHl_::setOnTime
IfxStdIf_PwmHl_SetOnTime setOnTime
IfxStdIf_PwmHl_SetOnTime.
Definition: IfxStdIf_PwmHl.h:191
IfxStdIf_PwmHl_SetMinPulse
boolean(* IfxStdIf_PwmHl_SetMinPulse)(IfxStdIf_InterfaceDriver stdIf, float32 minPulse)
Set the minimum pulse time in s.
Definition: IfxStdIf_PwmHl.h:109
IfxCcu6_PwmHl_Base::minPulse
Ifx_TimerValue minPulse
minimum pulse that is output, shorter pulse time will be output as 0% duty cycle
Definition: IfxCcu6_PwmHl.h:99
IfxCcu6_PwmHl_disable
IFX_STATIC void IfxCcu6_PwmHl_disable(IfxCcu6_PwmHl *driver)
Turn-off the complementary PWM generation mode.
Definition: IfxCcu6_PwmHl.c:126
IfxCcu6_PwmHl_s::update
IfxCcu6_PwmHl_Update update
Update function for actual selected mode.
Definition: IfxCcu6_PwmHl.h:142
IfxStdIf_PwmHl_Config::minPulse
float32 minPulse
Min pulse allowed as active state for the top and bottom PWM in seconds.
Definition: IfxStdIf_PwmHl.h:203
Ifx_Pwm_Mode_centerAlignedInverted
Center aligned inverted aligned mode.
Definition: Ifx_Types.h:178
IfxCcu6_PwmHl_setOnTime
void IfxCcu6_PwmHl_setOnTime(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Sets the ON time Assign the ON time to the TOP channels. The ON time of the BOTTOM channels are compl...
Definition: IfxCcu6_PwmHl.c:357
IfxStdIf_PwmHl_::setMode
IfxStdIf_PwmHl_SetMode setMode
IfxStdIf_PwmHl_SetMode.
Definition: IfxStdIf_PwmHl.h:190
Ifx_Pwm_Mode_rightAligned
Right aligned mode. The PWM period starts with a falling edge.
Definition: Ifx_Types.h:180
IfxStdIf_PwmHl_Config::outputMode
IfxPort_OutputMode outputMode
Output mode of ccx and coutx pins.
Definition: IfxStdIf_PwmHl.h:207
IfxCcu6_setT12CompareValue
void IfxCcu6_setT12CompareValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, uint16 value)
Sets the 16-bit compare value of Timer12 (writes into shadow registers)
Definition: IfxCcu6.c:331
IfxCcu6_PwmHl_initConfig
void IfxCcu6_PwmHl_initConfig(IfxCcu6_PwmHl_Config *config)
Initialize the configuration structure to default.
Definition: IfxCcu6_PwmHl.c:290
IfxCcu6_PwmHl_Base::mode
Ifx_Pwm_Mode mode
actual PWM mode
Definition: IfxCcu6_PwmHl.h:101
IfxStdIf_PwmHl_SetDeadtime
boolean(* IfxStdIf_PwmHl_SetDeadtime)(IfxStdIf_InterfaceDriver stdIf, float32 deadtime)
Set the dead time in s.
Definition: IfxStdIf_PwmHl.h:86
IfxCcu6_PwmHl_Config::cout0
IfxCcu6_Cout60_Out * cout0
COUT0 channel used.
Definition: IfxCcu6_PwmHl.h:122
IfxCcu6_MultiChannelSwitchingSync_t12ZeroMatch
A T12 zero-match (while counting up) triggers the shadow transfer.
Definition: IfxCcu6.h:224
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxStdIf_PwmHl_Config::channelCount
uint8 channelCount
Number of PWM channels, one channel is made of a top and bottom channel.
Definition: IfxStdIf_PwmHl.h:204
IfxCcu6_PwmHl_enable
IFX_STATIC void IfxCcu6_PwmHl_enable(IfxCcu6_PwmHl *driver)
Turn-on the complementary PWM generation mode.
Definition: IfxCcu6_PwmHl.c:157
IfxCcu6_T12Channel_0
T12 channel CC60.
Definition: IfxCcu6.h:260
IfxStdIf_PwmHl_::setMinPulse
IfxStdIf_PwmHl_SetMinPulse setMinPulse
IfxStdIf_PwmHl_SetMinPulse.
Definition: IfxStdIf_PwmHl.h:187
IfxCcu6_T12Channel_1
T12 channel CC61.
Definition: IfxCcu6.h:261
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxCcu6_PwmHl_setDeadtime
boolean IfxCcu6_PwmHl_setDeadtime(IfxCcu6_PwmHl *driver, float32 deadtime)
Sets the dead time.
Definition: IfxCcu6_PwmHl.c:303
IfxStdIf_PwmHl_SetOnTime
void(* IfxStdIf_PwmHl_SetOnTime)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue *tOn)
Set the pwm ON time.
Definition: IfxStdIf_PwmHl.h:140
IfxCcu6_PwmHl_Config::cc1
IfxCcu6_Cc61_Out * cc1
CC1 channel used.
Definition: IfxCcu6_PwmHl.h:120
IfxCcu6_T12Channel_2
T12 channel CC62.
Definition: IfxCcu6.h:262
IfxStdIf_PwmHl_::getMode
IfxStdIf_PwmHl_GetMode getMode
IfxStdIf_PwmHl_GetMode.
Definition: IfxStdIf_PwmHl.h:189
IfxCcu6_PwmHl_setMinPulse
boolean IfxCcu6_PwmHl_setMinPulse(IfxCcu6_PwmHl *driver, float32 minPulse)
Sets the minimum pulse.
Definition: IfxCcu6_PwmHl.c:314
IfxCcu6_initCout62Pin
IFX_INLINE void IfxCcu6_initCout62Pin(const IfxCcu6_Cout62_Out *cout62, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT62 output pin.
Definition: IfxCcu6.h:1855
IfxCcu6_setMultiChannelSwitchingSync
IFX_INLINE void IfxCcu6_setMultiChannelSwitchingSync(Ifx_CCU6 *ccu6, IfxCcu6_MultiChannelSwitchingSync sync)
Sets the synchronization mechanism of the shadow transfer event MCM_ST if it has been requested befor...
Definition: IfxCcu6.h:2027
IfxStdIf_PwmHl_GetDeadtime
float32(* IfxStdIf_PwmHl_GetDeadtime)(IfxStdIf_InterfaceDriver stdIf)
Return the dead time in s.
Definition: IfxStdIf_PwmHl.h:94
IfxStdIf_PwmHl_::setDeadtime
IfxStdIf_PwmHl_SetDeadtime setDeadtime
IfxStdIf_PwmHl_SetDeadtime.
Definition: IfxStdIf_PwmHl.h:184
IfxCcu6_TimerWithTrigger_applyUpdate
void IfxCcu6_TimerWithTrigger_applyUpdate(IfxCcu6_TimerWithTrigger *driver)
Enable the transfer of the shadow registers.
Definition: IfxCcu6_TimerWithTrigger.c:87
TRUE
#define TRUE
Definition: Platform_Types.h:90
IFXCCU6_PWMHL_MAX_CHANNELS
#define IFXCCU6_PWMHL_MAX_CHANNELS
Maximal number of channels handled by the driver. One channel has a top and bottom pwm output...
Definition: IfxCcu6_PwmHl.h:78
IfxStdIf_PwmHl_Config::coutxActiveState
Ifx_ActiveState coutxActiveState
Bottom PWM active state.
Definition: IfxStdIf_PwmHl.h:212
IfxCcu6_PwmHl_Base::channelCount
uint8 channelCount
Number of PWM channels, one channel is made of a top and bottom channel.
Definition: IfxCcu6_PwmHl.h:106
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxCcu6_initCc61OutPin
IFX_INLINE void IfxCcu6_initCc61OutPin(const IfxCcu6_Cc61_Out *cc61Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC61 output pin.
Definition: IfxCcu6.h:1767
IfxCcu6_PwmHl_setupChannels
void IfxCcu6_PwmHl_setupChannels(IfxCcu6_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set channels which are generating PWM or in "stuck-at" state.
Definition: IfxCcu6_PwmHl.c:441
IfxCcu6_PwmHl_Base::setMode
sint8 setMode
A non zero flag indicates that the PWM mode is being modified.
Definition: IfxCcu6_PwmHl.h:102
IfxStdIf_PwmHl_SetMode
boolean(* IfxStdIf_PwmHl_SetMode)(IfxStdIf_InterfaceDriver stdIf, Ifx_Pwm_Mode mode)
Set the pwm mode.
Definition: IfxStdIf_PwmHl.h:133
IfxCcu6_TimerWithTrigger_stdIfTimerInit
boolean IfxCcu6_TimerWithTrigger_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxCcu6_TimerWithTrigger *driver)
Initializes the standard interface timer.
Definition: IfxCcu6_TimerWithTrigger.c:335
IfxCcu6_PwmHl_Base::deadtime
Ifx_TimerValue deadtime
Dead time between the top and bottom channel in ticks.
Definition: IfxCcu6_PwmHl.h:98
IfxCcu6_TimerWithTrigger::ccu6
Ifx_CCU6 * ccu6
CCU6 module used for the timer functionality.
Definition: IfxCcu6_TimerWithTrigger.h:90


iLLD_TC38A: IfxCcu6_PwmHl.h Source File

  • Ccu6
  • PwmHl
IfxCcu6_PwmHl.h
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6_PwmHl.h
3 * \brief CCU6 PWMHL details
4 * \ingroup IfxLld_Ccu6
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Ccu6_PwmHl_Usage How to use the CCU6 PWM Driver
42 * \ingroup IfxLld_Ccu6_PwmHl
43 *
44 * This driver implements the PWM functionalities as defined by \ref library_srvsw_stdif_pwmhl.
45 * The user is free to use either the driver specific APIs below or to used the \ref library_srvsw_stdif_pwmhl "standard interface APIs".
46 *
47 * \section Specific Specific implementation
48 * \todo add documentation
49 *
50 * For a detailed configuration of the microcontroller, see \ref IfxCcu6_PwmHl_init().
51 *
52 * \defgroup IfxLld_Ccu6_PwmHl PWM Interface Driver
53 * \ingroup IfxLld_Ccu6
54 * \defgroup IfxLld_Ccu6_PwmHl_DataStructures Data Structures
55 * \ingroup IfxLld_Ccu6_PwmHl
56 * \defgroup IfxLld_Ccu6_PwmHl_PwmHl_Functions PwmHl Functions
57 * \ingroup IfxLld_Ccu6_PwmHl
58 * \defgroup IfxLld_Ccu6_PwmHl_StdIf_Functions StdIf Functions
59 * \ingroup IfxLld_Ccu6_PwmHl
60 */
61
62 #ifndef IFXCCU6_PWMHL_H
63 #define IFXCCU6_PWMHL_H 1
64
65 /******************************************************************************/
66 /*----------------------------------Includes----------------------------------*/
67 /******************************************************************************/
68
69 #include "StdIf/IfxStdIf_PwmHl.h"
70 #include "Ccu6/TimerWithTrigger/IfxCcu6_TimerWithTrigger.h"
71
72 /******************************************************************************/
73 /*-----------------------------------Macros-----------------------------------*/
74 /******************************************************************************/
75
76 /** \brief Maximal number of channels handled by the driver. One channel has a top and bottom pwm output
77 */
78 #define IFXCCU6_PWMHL_MAX_CHANNELS (3)
79
80 /******************************************************************************/
81 /*------------------------------Type Definitions------------------------------*/
82 /******************************************************************************/
83
84 typedef struct IfxCcu6_PwmHl_s IfxCcu6_PwmHl;
85
86 typedef void (*IfxCcu6_PwmHl_Update)(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn);
87
88 /******************************************************************************/
89 /*-----------------------------Data Structures--------------------------------*/
90 /******************************************************************************/
91
92 /** \addtogroup IfxLld_Ccu6_PwmHl_DataStructures
93 * \{ */
94 /** \brief Multi-channels PWM object definition (channels only)
95 */
96 typedef struct
97 {
98 Ifx_TimerValue deadtime; /**< \brief Dead time between the top and bottom channel in ticks */
99 Ifx_TimerValue minPulse; /**< \brief minimum pulse that is output, shorter pulse time will be output as 0% duty cycle */
100 Ifx_TimerValue maxPulse; /**< \brief internal parameter */
101 Ifx_Pwm_Mode mode; /**< \brief actual PWM mode */
102 sint8 setMode; /**< \brief A non zero flag indicates that the PWM mode is being modified */
103 Ifx_ActiveState ccxActiveState; /**< \brief Top PWM active state */
104 Ifx_ActiveState coutxActiveState; /**< \brief Bottom PWM active state */
105 boolean inverted; /**< \brief Flag indicating the center aligned inverted mode (TRUE) */
106 uint8 channelCount; /**< \brief Number of PWM channels, one channel is made of a top and bottom channel */
107 } IfxCcu6_PwmHl_Base;
108
109 /** \} */
110
111 /** \addtogroup IfxLld_Ccu6_PwmHl_DataStructures
112 * \{ */
113 /** \brief CCU6: PWM HL configuration
114 */
115 typedef struct
116 {
117 IfxStdIf_PwmHl_Config base; /**< \brief PWM HL standard interface configuration */
118 IfxCcu6_TimerWithTrigger *timer; /**< \brief Pointer to the linked timer object */
119 IfxCcu6_Cc60_Out *cc0; /**< \brief CC0 channel used */
120 IfxCcu6_Cc61_Out *cc1; /**< \brief CC1 channel used */
121 IfxCcu6_Cc62_Out *cc2; /**< \brief CC2 channel used */
122 IfxCcu6_Cout60_Out *cout0; /**< \brief COUT0 channel used */
123 IfxCcu6_Cout61_Out *cout1; /**< \brief COUT1 channel used */
124 IfxCcu6_Cout62_Out *cout2; /**< \brief COUT2 channel used */
125 } IfxCcu6_PwmHl_Config;
126
127 /** \brief Structure for PWM configuration
128 */
129 typedef struct
130 {
131 Ifx_Pwm_Mode mode; /**< \brief pwm mode */
132 boolean inverted; /**< \brief Inverted configuration for the selected mode */
133 IfxCcu6_PwmHl_Update update; /**< \brief update call back function for the selected mode */
134 } IfxCcu6_PwmHl_Mode;
135
136 /** \brief CCU6 PWM driver
137 */
138 struct IfxCcu6_PwmHl_s
139 {
140 IfxCcu6_PwmHl_Base base; /**< \brief Multi-channels PWM object definition (channels only) */
141 IfxCcu6_TimerWithTrigger *timer; /**< \brief Pointer to the linked timer object */
142 IfxCcu6_PwmHl_Update update; /**< \brief Update function for actual selected mode */
143 };
144
145 /** \} */
146
147 /** \addtogroup IfxLld_Ccu6_PwmHl_PwmHl_Functions
148 * \{ */
149
150 /******************************************************************************/
151 /*-------------------------Global Function Prototypes-------------------------*/
152 /******************************************************************************/
153
154 /** \brief Initializes the timer object
155 * \note To ensure that the channels counter are reset by the timer and do not overflow, leading to random signal on the output, the timer must be started before the call to this function.
156 * Initialise the CCU6 module for PWM generation of high- and low switches usage, e.g.
157 * - electric motor drive
158 * - half-bridge switches
159 *
160 * It is assumed that the whole CCU6 module is only used for purposes mentioned at the
161 * IfxCcu6_PwmHl API. No part of CCU6 module is used for other purpose.
162 *
163 * The timer used should configure the T12 as PWM base timer and T13 as trigger.
164 * \param driver CCU6 PWM driver
165 * \param config CCU6 : PWM HL configuration
166 * \return TRUE on success else FALSE
167 */
168 IFX_EXTERN boolean IfxCcu6_PwmHl_init(IfxCcu6_PwmHl *driver, const IfxCcu6_PwmHl_Config *config);
169
170 /** \brief Initialize the configuration structure to default
171 * \param config Channel configuration. This parameter is Initialised by the function
172 * \return None
173 */
174 IFX_EXTERN void IfxCcu6_PwmHl_initConfig(IfxCcu6_PwmHl_Config *config);
175
176 /** \} */
177
178 /** \addtogroup IfxLld_Ccu6_PwmHl_StdIf_Functions
179 * \{ */
180
181 /******************************************************************************/
182 /*-------------------------Inline Function Prototypes-------------------------*/
183 /******************************************************************************/
184
185 /** \brief Inverts the active state
186 * \param activeState Active state
187 * \return State
188 */
189 IFX_INLINE Ifx_ActiveState IfxCcu6_PwmHl_invertActiveState(Ifx_ActiveState activeState);
190
191 /******************************************************************************/
192 /*-------------------------Global Function Prototypes-------------------------*/
193 /******************************************************************************/
194
195 /** \brief Returns the dead time
196 * \param driver CCU6 PWM driver
197 * \return Dead Time
198 *
199 * \see IfxStdIf_PwmHl_GetDeadtime
200 *
201 */
202 IFX_EXTERN float32 IfxCcu6_PwmHl_getDeadtime(IfxCcu6_PwmHl *driver);
203
204 /** \brief Returns the minimum pulse
205 * \param driver CCU6 PWM driver
206 * \return Min Pulse
207 *
208 * \see IfxStdIf_PwmHl_GetMinPulse
209 *
210 */
211 IFX_EXTERN float32 IfxCcu6_PwmHl_getMinPulse(IfxCcu6_PwmHl *driver);
212
213 /** \brief Returns Pwm mode
214 * \param driver CCU6 PWM driver
215 * \return Pwm mode
216 *
217 * \see IfxStdIf_PwmHl_GetMode
218 *
219 */
220 IFX_EXTERN Ifx_Pwm_Mode IfxCcu6_PwmHl_getMode(IfxCcu6_PwmHl *driver);
221
222 /** \brief Sets the dead time
223 * \note The changes are not applied until Timer->applyUpdate() is called.
224 * \param driver CCU6 PWM driver
225 * \param deadtime Dead time value
226 * \return TRUE on success else FALSE
227 *
228 * \see IfxStdIf_PwmHl_SetDeadtime
229 *
230 */
231 IFX_EXTERN boolean IfxCcu6_PwmHl_setDeadtime(IfxCcu6_PwmHl *driver, float32 deadtime);
232
233 /** \brief Sets the minimum pulse
234 * \param driver CCU6 PWM driver
235 * \param minPulse Minimum pulse
236 * \return TRUE on success else FALSE
237 *
238 * \see IfxStdIf_PwmHl_SetMinPulse
239 *
240 */
241 IFX_EXTERN boolean IfxCcu6_PwmHl_setMinPulse(IfxCcu6_PwmHl *driver, float32 minPulse);
242
243 /** \brief Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate()
244 * \param driver CCU6 PWM driver
245 * \param mode Pwm mode
246 * \return TRUE on success else FALSE
247 *
248 * \see IfxStdIf_PwmHl_SetMode
249 *
250 */
251 IFX_EXTERN boolean IfxCcu6_PwmHl_setMode(IfxCcu6_PwmHl *driver, Ifx_Pwm_Mode mode);
252
253 /** \brief Sets the ON time
254 * Assign the ON time to the TOP channels.
255 * The ON time of the BOTTOM channels are complementary.
256 *
257 * \note The changes are not applied until Timer->applyUpdate() is called.
258 * \param driver CCU6 PWM driver
259 * \param tOn ON time
260 * \return None
261 *
262 * \see IfxStdIf_PwmHl_SetOnTime
263 *
264 */
265 IFX_EXTERN void IfxCcu6_PwmHl_setOnTime(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn);
266
267 /** \brief Set channels which are generating PWM or in "stuck-at" state.
268 *
269 * \note The values for the parameters are arranged as follows:
270 * index = 0 --> phase 0 top
271 * index = 1 --> phase 0 bottom
272 * index = 2 --> phase 1 top
273 * index = 3 --> phase 1 bottom
274 * index = 4 --> phase 2 top
275 * index = 5 --> phase 2 bottom
276 * \param driver CCU6 PWM driver
277 * \param activeCh Pointer to boolean array containing values for PWM channels.
278 * If FALSE, the channel will be in stuck-at state, else the channel will generate PWM.
279 * \param stuckSt Pointer to boolean array containing values for active channels.
280 * If FALSE, the stuck-at state is passive level, else the stuck-at state is active level.
281 * \return None
282 *
283 * \see IfxStdIf_PwmHl_SetupChannels
284 *
285 */
286 IFX_EXTERN void IfxCcu6_PwmHl_setupChannels(IfxCcu6_PwmHl *driver, boolean *activeCh, boolean *stuckSt);
287
288 /** \brief Initialises the statndard interface Pwm
289 * \param stdif Standard interface object, will be initialized by the function
290 * \param driver Interface driver to be used by the standard interface. must be initialised separately
291 * \return TRUE on success else FALSE
292 */
293 IFX_EXTERN boolean IfxCcu6_PwmHl_stdIfPwmHlInit(IfxStdIf_PwmHl *stdif, IfxCcu6_PwmHl *driver);
294
295 /** \} */
296
297 /******************************************************************************/
298 /*---------------------Inline Function Implementations------------------------*/
299 /******************************************************************************/
300
301 IFX_INLINE Ifx_ActiveState IfxCcu6_PwmHl_invertActiveState(Ifx_ActiveState activeState)
302 {
303 return activeState == Ifx_ActiveState_low ? Ifx_ActiveState_high : Ifx_ActiveState_low;
304 }
305
306
307 #endif /* IFXCCU6_PWMHL_H */
Ifx_ActiveState_high
The signal is high active.
Definition: Ifx_Types.h:116
IfxCcu6_PwmHl_Base::coutxActiveState
Ifx_ActiveState coutxActiveState
Bottom PWM active state.
Definition: IfxCcu6_PwmHl.h:104
Ifx_Pwm_Mode
Ifx_Pwm_Mode
Definition: Ifx_Types.h:175
IfxCcu6_PwmHl_getMode
IFX_EXTERN Ifx_Pwm_Mode IfxCcu6_PwmHl_getMode(IfxCcu6_PwmHl *driver)
Returns Pwm mode.
Definition: IfxCcu6_PwmHl.c:195
IfxCcu6_PwmHl_Base
Multi-channels PWM object definition (channels only)
Definition: IfxCcu6_PwmHl.h:96
Ifx_ActiveState_low
The signal is low active.
Definition: Ifx_Types.h:115
IfxCcu6_PwmHl_Config::cc2
IfxCcu6_Cc62_Out * cc2
CC2 channel used.
Definition: IfxCcu6_PwmHl.h:121
IfxCcu6_PwmHl_getDeadtime
IFX_EXTERN float32 IfxCcu6_PwmHl_getDeadtime(IfxCcu6_PwmHl *driver)
Returns the dead time.
Definition: IfxCcu6_PwmHl.c:183
IfxCcu6_Cc62_Out
CC62 pin mapping structure.
Definition: IfxCcu6_PinMap.h:144
IfxCcu6_PwmHl_s
CCU6 PWM driver.
Definition: IfxCcu6_PwmHl.h:138
IfxCcu6_PwmHl_Config::cout1
IfxCcu6_Cout61_Out * cout1
COUT1 channel used.
Definition: IfxCcu6_PwmHl.h:123
IfxCcu6_Cc60_Out
CC60 pin mapping structure.
Definition: IfxCcu6_PinMap.h:128
IfxCcu6_PwmHl_Config::cc0
IfxCcu6_Cc60_Out * cc0
CC0 channel used.
Definition: IfxCcu6_PwmHl.h:119
IfxCcu6_PwmHl_Mode
Structure for PWM configuration.
Definition: IfxCcu6_PwmHl.h:129
IfxCcu6_PwmHl_getMinPulse
IFX_EXTERN float32 IfxCcu6_PwmHl_getMinPulse(IfxCcu6_PwmHl *driver)
Returns the minimum pulse.
Definition: IfxCcu6_PwmHl.c:189
float32
float float32
Definition: Platform_Types.h:170
IfxCcu6_PwmHl_s::base
IfxCcu6_PwmHl_Base base
Multi-channels PWM object definition (channels only)
Definition: IfxCcu6_PwmHl.h:140
IfxCcu6_TimerWithTrigger
CCU6 Timer interface.
Definition: IfxCcu6_TimerWithTrigger.h:87
IfxCcu6_PwmHl_init
IFX_EXTERN boolean IfxCcu6_PwmHl_init(IfxCcu6_PwmHl *driver, const IfxCcu6_PwmHl_Config *config)
Initializes the timer object.
Definition: IfxCcu6_PwmHl.c:201
IfxCcu6_PwmHl_setMode
IFX_EXTERN boolean IfxCcu6_PwmHl_setMode(IfxCcu6_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate()
Definition: IfxCcu6_PwmHl.c:325
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:113
IfxCcu6_PwmHl_Base::inverted
boolean inverted
Flag indicating the center aligned inverted mode (TRUE)
Definition: IfxCcu6_PwmHl.h:105
IfxCcu6_PwmHl_stdIfPwmHlInit
IFX_EXTERN boolean IfxCcu6_PwmHl_stdIfPwmHlInit(IfxStdIf_PwmHl *stdif, IfxCcu6_PwmHl *driver)
Initialises the statndard interface Pwm.
Definition: IfxCcu6_PwmHl.c:477
IfxCcu6_PwmHl_invertActiveState
IFX_INLINE Ifx_ActiveState IfxCcu6_PwmHl_invertActiveState(Ifx_ActiveState activeState)
Inverts the active state.
Definition: IfxCcu6_PwmHl.h:301
IfxCcu6_PwmHl_Base::ccxActiveState
Ifx_ActiveState ccxActiveState
Top PWM active state.
Definition: IfxCcu6_PwmHl.h:103
IfxCcu6_Cout62_Out
COUT62 pin mapping structure.
Definition: IfxCcu6_PinMap.h:168
IfxCcu6_TimerWithTrigger.h
CCU6 TIMERWITHTRIGGER details.
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxCcu6_PwmHl_Config::timer
IfxCcu6_TimerWithTrigger * timer
Pointer to the linked timer object.
Definition: IfxCcu6_PwmHl.h:118
IfxCcu6_PwmHl_Update
void(* IfxCcu6_PwmHl_Update)(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Definition: IfxCcu6_PwmHl.h:86
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxCcu6_PwmHl_Config::cout2
IfxCcu6_Cout62_Out * cout2
COUT2 channel used.
Definition: IfxCcu6_PwmHl.h:124
IfxCcu6_PwmHl_Config
CCU6: PWM HL configuration.
Definition: IfxCcu6_PwmHl.h:115
IfxStdIf_PwmHl_Config
Multi-channels PWM object configuration.
Definition: IfxStdIf_PwmHl.h:200
IfxCcu6_PwmHl_Base::maxPulse
Ifx_TimerValue maxPulse
internal parameter
Definition: IfxCcu6_PwmHl.h:100
IfxCcu6_PwmHl_Config::base
IfxStdIf_PwmHl_Config base
PWM HL standard interface configuration.
Definition: IfxCcu6_PwmHl.h:117
IfxCcu6_Cout60_Out
COUT60 pin mapping structure.
Definition: IfxCcu6_PinMap.h:152
IfxStdIf_PwmHl_
Standard interface object.
Definition: IfxStdIf_PwmHl.h:179
IfxCcu6_PwmHl_Base::minPulse
Ifx_TimerValue minPulse
minimum pulse that is output, shorter pulse time will be output as 0% duty cycle
Definition: IfxCcu6_PwmHl.h:99
IfxCcu6_PwmHl_Mode::update
IfxCcu6_PwmHl_Update update
update call back function for the selected mode
Definition: IfxCcu6_PwmHl.h:133
IfxCcu6_PwmHl_setOnTime
IFX_EXTERN void IfxCcu6_PwmHl_setOnTime(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Sets the ON time Assign the ON time to the TOP channels. The ON time of the BOTTOM channels are compl...
Definition: IfxCcu6_PwmHl.c:357
IfxCcu6_Cc61_Out
CC61 pin mapping structure.
Definition: IfxCcu6_PinMap.h:136
IfxStdIf_PwmHl.h
Standard interface: Multi-channels, dual-complementary PWM interface.
IfxCcu6_PwmHl_initConfig
IFX_EXTERN void IfxCcu6_PwmHl_initConfig(IfxCcu6_PwmHl_Config *config)
Initialize the configuration structure to default.
Definition: IfxCcu6_PwmHl.c:290
IfxCcu6_PwmHl_Base::mode
Ifx_Pwm_Mode mode
actual PWM mode
Definition: IfxCcu6_PwmHl.h:101
IfxCcu6_PwmHl_Config::cout0
IfxCcu6_Cout60_Out * cout0
COUT0 channel used.
Definition: IfxCcu6_PwmHl.h:122
IfxCcu6_PwmHl_setDeadtime
IFX_EXTERN boolean IfxCcu6_PwmHl_setDeadtime(IfxCcu6_PwmHl *driver, float32 deadtime)
Sets the dead time.
Definition: IfxCcu6_PwmHl.c:303
IfxCcu6_PwmHl_Config::cc1
IfxCcu6_Cc61_Out * cc1
CC1 channel used.
Definition: IfxCcu6_PwmHl.h:120
IfxCcu6_PwmHl_setMinPulse
IFX_EXTERN boolean IfxCcu6_PwmHl_setMinPulse(IfxCcu6_PwmHl *driver, float32 minPulse)
Sets the minimum pulse.
Definition: IfxCcu6_PwmHl.c:314
IfxCcu6_Cout61_Out
COUT61 pin mapping structure.
Definition: IfxCcu6_PinMap.h:160
IfxCcu6_PwmHl_Base::channelCount
uint8 channelCount
Number of PWM channels, one channel is made of a top and bottom channel.
Definition: IfxCcu6_PwmHl.h:106
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
uint8
unsigned char uint8
Definition: Platform_Types.h:108
sint8
signed char sint8
Definition: Platform_Types.h:125
IfxCcu6_PwmHl_setupChannels
IFX_EXTERN void IfxCcu6_PwmHl_setupChannels(IfxCcu6_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set channels which are generating PWM or in "stuck-at" state.
Definition: IfxCcu6_PwmHl.c:441
IfxCcu6_PwmHl_Base::setMode
sint8 setMode
A non zero flag indicates that the PWM mode is being modified.
Definition: IfxCcu6_PwmHl.h:102
IfxCcu6_PwmHl_Base::deadtime
Ifx_TimerValue deadtime
Dead time between the top and bottom channel in ticks.
Definition: IfxCcu6_PwmHl.h:98


iLLD_TC38A: IfxCcu6_TPwm.c Source File

  • Ccu6
  • TPwm
IfxCcu6_TPwm.c
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6_TPwm.c
3 * \brief CCU6 TPWM details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 *
41 */
42
43 /******************************************************************************/
44 /*----------------------------------Includes----------------------------------*/
45 /******************************************************************************/
46
47 #include "IfxCcu6_TPwm.h"
48
49 /******************************************************************************/
50 /*-------------------------Function Implementations---------------------------*/
51 /******************************************************************************/
52
53 void IfxCcu6_TPwm_initModule(IfxCcu6_TPwm *tPwm, const IfxCcu6_TPwm_Config *config)
54 {
55 Ifx_CCU6 *ccu6SFR = config->ccu6; // pointer to CCU6 registers
56 tPwm->ccu6 = ccu6SFR; // adding register pointer to module handler
57
58 /* -- hardware module initialisation -- */
59
60 // enable module if it hasn't been enabled by any other interface //
61 if (IfxCcu6_isModuleEnabled(ccu6SFR) == FALSE)
62 {
63 IfxCcu6_enableModule(ccu6SFR);
64 }
65
66 /* -- timer initialisation -- */
67
68 // Timer 13 initialisation //
69
70 if (config->timer == IfxCcu6_TimerId_t13)
71 {
72 // enable Timer13 if it hasn't been enabled by any other interface //
73 if (IfxCcu6_getTimerAvailabilityStatus(ccu6SFR, IfxCcu6_TimerId_t13) == FALSE)
74 {
75 IfxCcu6_enableTimer(ccu6SFR, IfxCcu6_TimerId_t13);
76 }
77
78 // clock initialisation //
79
80 if (config->clock.t13ExtClockEnabled) // if external source is selected as reference
81 {
82 // input signal selection
83 if (config->clock.t13ExtClockInput != NULL_PTR)
84 {
85 IfxCcu6_setT13InputSignal(config->ccu6, config->clock.t13ExtClockInput);
86 }
87
88 // counting input mode selection
89 IfxCcu6_setCountingInputMode(ccu6SFR, IfxCcu6_TimerId_t13, config->clock.t13countingInputMode);
90
91 // period setting
92 IfxCcu6_setT13PeriodValue(ccu6SFR, (uint16)config->base.period);
93 }
94 else // if internal clock is selected as reference
95 {
96 IfxCcu6_setT13Frequency(ccu6SFR, config->base.frequency, config->base.period);
97 }
98
99 // duty cycle initialisation //
100
101 IfxCcu6_setT13CounterValue(ccu6SFR, config->timer13.counterValue);
102
103 IfxCcu6_setT13CompareValue(ccu6SFR, config->timer13.compareValue);
104
105 // if Timer 13 start is in sync with Timer 12 //
106 if (config->trigger.t13InSyncWithT12)
107 {
108 IfxCcu6_setT13TriggerEventMode(ccu6SFR, config->timer13.t12SyncEvent);
109 IfxCcu6_setT13TriggerEventDirection(ccu6SFR, config->timer13.t12SyncDirection);
110 }
111 }
112 else
113 {}
114
115 // Timer 12 initialisation //
116
117 if ((config->timer == IfxCcu6_TimerId_t12) || (config->trigger.t13InSyncWithT12))
118 {
119 Ifx_TimerValue period = config->base.period;
120 Ifx_TimerValue compareValue = config->timer12.compareValue;
121
122 // enable Timer12 if it hasn't been enabled by any other interface //
123 if (IfxCcu6_getTimerAvailabilityStatus(ccu6SFR, IfxCcu6_TimerId_t12) == FALSE)
124 {
125 IfxCcu6_enableTimer(ccu6SFR, IfxCcu6_TimerId_t12);
126 }
127
128 // if Timer 13 start is in sync with Timer 12 //
129 if ((config->trigger.t13InSyncWithT12) && (config->base.waitingTime != 0))
130 {
131 // if in sync with T12 period match
132 if (config->timer13.t12SyncEvent == IfxCcu6_T13TriggerEvent_onT12Period)
133 {
134 period = config->base.waitingTime; // waiting time as period
135 }
136 else if (config->timer13.t12SyncEvent != IfxCcu6_T13TriggerEvent_noAction)
137 {
138 compareValue = config->base.waitingTime; // waiting time as compare value
139 period = config->base.activeCount;
140 }
141 }
142 else
143 {
144 // configuration error
145 }
146
147 // clock initialisation //
148
149 if (config->clock.t12ExtClockEnabled) // if external source is selected as reference
150 {
151 // input signal selection
152 if (config->clock.t12ExtClockInput != NULL_PTR)
153 {
154 IfxCcu6_setT12InputSignal(config->ccu6, config->clock.t12ExtClockInput);
155 }
156
157 // counting input mode selection
158 IfxCcu6_setCountingInputMode(ccu6SFR, IfxCcu6_TimerId_t12, config->clock.t12countingInputMode);
159
160 // countining mode selection
161 IfxCcu6_setT12CountMode(ccu6SFR, config->timer12.countMode);
162
163 // period selection for center aligned mode
164 if (config->timer12.countMode == IfxCcu6_T12CountMode_centerAligned)
165 {
166 period = (period / 2) - 1;
167 }
168
169 // period setting
170 IfxCcu6_setT12PeriodValue(ccu6SFR, (uint16)period);
171 }
172 else // if internal clock is selected as reference
173 {
174 // in case of in sync with T13 T12 runs at same frequency as T13
175 IfxCcu6_setT12Frequency(ccu6SFR, config->base.frequency, period, config->timer12.countMode);
176 }
177
178 // duty cycle initialisation //
179
180 IfxCcu6_setT12CounterValue(ccu6SFR, config->timer12.counterValue);
181
182 IfxCcu6_setT12ChannelMode(ccu6SFR, config->timer12.channelId, config->timer12.channelMode);
183
184 IfxCcu6_setT12CompareValue(ccu6SFR, config->timer12.channelId, (uint16)compareValue);
185
186 // dead time injection if selected
187 if (config->timer12.deadTimeValue)
188 {
189 IfxCcu6_setDeadTimeValue(ccu6SFR, config->timer12.deadTimeValue);
190 IfxCcu6_enableDeadTime(ccu6SFR, config->timer12.channelId);
191 }
192 }
193 else
194 {}
195
196 /* -- output path initialisation -- */
197
198 //enable modulation output path //
199 IfxCcu6_enableModulationOutput(ccu6SFR, config->timer, config->channelOut);
200
201 // output passive logic configuration //
202 //TODO check correct polarity:
203 IfxCcu6_setOutputPassiveState(ccu6SFR, config->channelOut, config->base.activeState);
204
205 /* -- Pin mapping -- */
206
207 const IfxCcu6_TPwm_Pins *pins = config->pins;
208
209 if (pins != NULL_PTR)
210 {
211 IfxCcu6_Cc60_Out *cc60Out = pins->cc60Out;
212
213 if (cc60Out != NULL_PTR)
214 {
215 IfxCcu6_initCc60OutPin(cc60Out, pins->outputMode, pins->pinDriver);
216 }
217
218 IfxCcu6_Cc61_Out *cc61Out = pins->cc61Out;
219
220 if (cc61Out != NULL_PTR)
221 {
222 IfxCcu6_initCc61OutPin(cc61Out, pins->outputMode, pins->pinDriver);
223 }
224
225 IfxCcu6_Cc62_Out *cc62Out = pins->cc62Out;
226
227 if (cc62Out != NULL_PTR)
228 {
229 IfxCcu6_initCc62OutPin(cc62Out, pins->outputMode, pins->pinDriver);
230 }
231
232 IfxCcu6_Cout60_Out *cout60 = pins->cout60;
233
234 if (cout60 != NULL_PTR)
235 {
236 IfxCcu6_initCout60Pin(cout60, pins->outputMode, pins->pinDriver);
237 }
238
239 IfxCcu6_Cout61_Out *cout61 = pins->cout61;
240
241 if (cout61 != NULL_PTR)
242 {
243 IfxCcu6_initCout61Pin(cout61, pins->outputMode, pins->pinDriver);
244 }
245
246 IfxCcu6_Cout62_Out *cout62 = pins->cout62;
247
248 if (cout62 != NULL_PTR)
249 {
250 IfxCcu6_initCout62Pin(cout62, pins->outputMode, pins->pinDriver);
251 }
252
253 IfxCcu6_Cout63_Out *cout63 = pins->cout63;
254
255 if (cout63 != NULL_PTR)
256 {
257 IfxCcu6_initCout63Pin(cout63, pins->outputMode, pins->pinDriver);
258 }
259
260 IfxCcu6_T12hr_In *t12hr = pins->t12hr;
261
262 if (t12hr != NULL_PTR)
263 {
264 IfxCcu6_initT12hrPin(t12hr, pins->t1xhrInputMode);
265 }
266
267 IfxCcu6_T13hr_In *t13hr = pins->t13hr;
268
269 if (t13hr != NULL_PTR)
270 {
271 IfxCcu6_initT13hrPin(t13hr, pins->t1xhrInputMode);
272 }
273 }
274
275 /* -- interrupt initialisation -- */
276
277 if (config->interrupt1.priority > 0)
278 {
279 IfxCcu6_enableInterrupt(config->ccu6, config->interrupt1.source);
280 IfxCcu6_routeInterruptNode(config->ccu6, config->interrupt1.source, config->interrupt1.serviceRequest);
281
282 volatile Ifx_SRC_SRCR *src;
283 src = IfxCcu6_getSrcAddress(config->ccu6, config->interrupt1.serviceRequest);
284 IfxSrc_init(src, config->interrupt1.typeOfService, config->interrupt1.priority);
285 IfxSrc_enable(src);
286 }
287
288 if (config->interrupt2.priority > 0)
289 {
290 IfxCcu6_enableInterrupt(config->ccu6, config->interrupt2.source);
291 IfxCcu6_routeInterruptNode(config->ccu6, config->interrupt2.source, config->interrupt2.serviceRequest);
292
293 volatile Ifx_SRC_SRCR *src;
294 src = IfxCcu6_getSrcAddress(config->ccu6, config->interrupt2.serviceRequest);
295 IfxSrc_init(src, config->interrupt2.typeOfService, config->interrupt2.priority);
296 IfxSrc_enable(src);
297 }
298
299 if (config->interrupt3.priority > 0)
300 {
301 IfxCcu6_enableInterrupt(config->ccu6, config->interrupt3.source);
302 IfxCcu6_routeInterruptNode(config->ccu6, config->interrupt3.source, config->interrupt3.serviceRequest);
303
304 volatile Ifx_SRC_SRCR *src;
305 src = IfxCcu6_getSrcAddress(config->ccu6, config->interrupt3.serviceRequest);
306 IfxSrc_init(src, config->interrupt3.typeOfService, config->interrupt3.priority);
307 IfxSrc_enable(src);
308 }
309
310 if (config->interrupt4.priority > 0)
311 {
312 IfxCcu6_enableInterrupt(config->ccu6, config->interrupt4.source);
313 IfxCcu6_routeInterruptNode(config->ccu6, config->interrupt4.source, config->interrupt4.serviceRequest);
314
315 volatile Ifx_SRC_SRCR *src;
316 src = IfxCcu6_getSrcAddress(config->ccu6, config->interrupt4.serviceRequest);
317 IfxSrc_init(src, config->interrupt4.typeOfService, config->interrupt4.priority);
318 IfxSrc_enable(src);
319 }
320
321 /* -- output trigger initialisation --*/
322
323 if (config->trigger.outputTriggerEnabled)
324 {
325 IfxCcu6_connectTrigger(ccu6SFR, config->trigger.outputLine, config->trigger.outputTrigger);
326 }
327
328 tPwm->timer = config->timer;
329 tPwm->channelOut = config->channelOut;
330 tPwm->trigger = config->trigger;
331
332 #if IFX_CFG_USE_STANDARD_INTERFACE
333 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (uint32)tPwm == ((uint32)&tPwm->base));
334 tPwm->base.functions.start = (TPwm_Start) & IfxCcu6_TPwm_start;
335 tPwm->base.functions.pause = (TPwm_Pause) & IfxCcu6_TPwm_pause;
336 tPwm->base.functions.resume = (TPwm_Resume) & IfxCcu6_TPwm_resume;
337 tPwm->base.functions.stop = (TPwm_Stop) & IfxCcu6_TPwm_stop;
338 #endif
339 }
340
341
342 void IfxCcu6_TPwm_initModuleConfig(IfxCcu6_TPwm_Config *config, Ifx_CCU6 *ccu6)
343 {
344 const IfxCcu6_TPwm_Config defaultConfig = {
345 .base = {
346 .frequency = 400000,
347 .waitingTime = 20,
348 .activeCount = 0,
349 .period = 100,
350 .activeState = Ifx_ActiveState_high,
351 },
352
353 .ccu6 = NULL_PTR, // will be initialized below
354
355 .timer = IfxCcu6_TimerId_t13,
356
357 .clock = {
358 .t12ExtClockEnabled = FALSE,
359 .t12ExtClockInput = NULL_PTR,
360 .t12countingInputMode = IfxCcu6_CountingInputMode_internal,
361
362 .t13ExtClockEnabled = FALSE,
363 .t13ExtClockInput = NULL_PTR,
364 .t13countingInputMode = IfxCcu6_CountingInputMode_internal,
365 },
366
367 .timer12 = {
368 .channelId = IfxCcu6_T12Channel_0,
369 .channelMode = IfxCcu6_T12ChannelMode_compareMode,
370 .countMode = IfxCcu6_T12CountMode_edgeAligned,
371 .counterValue = 0,
372 .deadTimeValue = 0,
373 .compareValue = 0,
374 },
375
376 .timer13 = {
377 .counterValue = 0,
378 .compareValue = 0,
379 .t12SyncEvent = IfxCcu6_T13TriggerEvent_onCC60RCompare,
380 .t12SyncDirection = IfxCcu6_T13TriggerDirection_onT12CountingUp,
381 },
382
383 .channelOut = IfxCcu6_ChannelOut_cout3,
384
385 .pins = NULL_PTR,
386
387 .interrupt1 = {
388 .source = IfxCcu6_InterruptSource_t12PeriodMatch,
389 .serviceRequest = IfxCcu6_ServiceRequest_0,
390 .priority = 0, // interrupt priority 0
391 .typeOfService = IfxSrc_Tos_cpu0, // type of service CPU0
392 },
393
394 .interrupt2 = {
395 .source = IfxCcu6_InterruptSource_t13PeriodMatch,
396 .serviceRequest = IfxCcu6_ServiceRequest_1,
397 .priority = 0, // interrupt priority 0
398 .typeOfService = IfxSrc_Tos_cpu0, // type of service CPU0
399 },
400
401 .interrupt3 = {
402 .source = IfxCcu6_InterruptSource_t12OneMatch,
403 .serviceRequest = IfxCcu6_ServiceRequest_2,
404 .priority = 0, // interrupt priority 0
405 .typeOfService = IfxSrc_Tos_cpu0, // type of service CPU0
406 },
407
408 .interrupt4 = {
409 .source = IfxCcu6_InterruptSource_trap,
410 .serviceRequest = IfxCcu6_ServiceRequest_3,
411 .priority = 0, // interrupt priority 0
412 .typeOfService = IfxSrc_Tos_cpu0, // type of service CPU0
413 },
414
415 .trigger = {
416 .t12ExtInputTrigger = NULL_PTR,
417 .t13ExtInputTrigger = NULL_PTR,
418 .extInputTriggerMode = IfxCcu6_ExternalTriggerMode_risingEdge,
419 .t13InSyncWithT12 = TRUE,
420
421 .outputTriggerEnabled = TRUE,
422 .outputLine = IfxCcu6_TrigOut_0,
423 .outputTrigger = IfxCcu6_TrigSel_cout63,
424 },
425 };
426
427 /* Default Configuration */
428 *config = defaultConfig;
429
430 /* take over module pointer */
431 config->ccu6 = ccu6;
432 }
433
434
435 void IfxCcu6_TPwm_pause(IfxCcu6_TPwm *tPwm)
436 {
437 IfxCcu6_disableModulationOutput(tPwm->ccu6, tPwm->timer, tPwm->channelOut);
438 }
439
440
441 void IfxCcu6_TPwm_resume(IfxCcu6_TPwm *tPwm)
442 {
443 IfxCcu6_enableModulationOutput(tPwm->ccu6, tPwm->timer, tPwm->channelOut);
444 }
445
446
447 void IfxCcu6_TPwm_start(IfxCcu6_TPwm *tPwm)
448 {
449 // Timer 13 modulation //
450
451 if (tPwm->timer == IfxCcu6_TimerId_t13)
452 {
453 // enable shadow transfer
454 IfxCcu6_enableShadowTransfer(tPwm->ccu6, FALSE, TRUE);
455
456 // start Timer 13 when not in sync with Timer 12
457 if (!(tPwm->trigger.t13InSyncWithT12))
458 {
459 if (tPwm->trigger.t13ExtInputTrigger != NULL_PTR)
460 {
461 // external start
462 IfxCcu6_setExternalRunMode(tPwm->ccu6, IfxCcu6_TimerId_t13, tPwm->trigger.extInputTriggerMode);
463 IfxCcu6_setT13InputSignal(tPwm->ccu6, tPwm->trigger.t13ExtInputTrigger);
464 }
465 else
466 {
467 // internal start
468 IfxCcu6_startTimer(tPwm->ccu6, FALSE, TRUE);
469 }
470 }
471 else
472 {}
473 }
474 else
475 {}
476
477 // Timer 12 alone for modulation or when in sync with Timer 13 //
478
479 if ((tPwm->timer == IfxCcu6_TimerId_t12) || (tPwm->trigger.t13InSyncWithT12))
480 {
481 // enable shadow transfer
482 IfxCcu6_enableShadowTransfer(tPwm->ccu6, TRUE, FALSE);
483
484 //start Timer 12
485 if (tPwm->trigger.t12ExtInputTrigger != NULL_PTR)
486 {
487 // external start
488 IfxCcu6_setExternalRunMode(tPwm->ccu6, IfxCcu6_TimerId_t12, tPwm->trigger.extInputTriggerMode);
489 IfxCcu6_setT12InputSignal(tPwm->ccu6, tPwm->trigger.t12ExtInputTrigger);
490 }
491 else
492 {
493 // internal start
494 IfxCcu6_startTimer(tPwm->ccu6, TRUE, FALSE);
495 }
496 }
497 else
498 {}
499 }
500
501
502 void IfxCcu6_TPwm_stop(IfxCcu6_TPwm *tPwm)
503 {
504 // Timer 13 modulation //
505
506 if ((tPwm->timer == IfxCcu6_TimerId_t13) || (tPwm->trigger.t13InSyncWithT12))
507 {
508 // disable shadow transfer
509 IfxCcu6_disableShadowTransfer(tPwm->ccu6, FALSE, TRUE);
510
511 // remove external input trigger if any
512 if (tPwm->trigger.t13ExtInputTrigger != NULL_PTR)
513 {
514 IfxCcu6_setExternalRunMode(tPwm->ccu6, IfxCcu6_TimerId_t13, IfxCcu6_ExternalTriggerMode_disable);
515 }
516
517 // remove the sync with Timer 12
518 if (tPwm->trigger.t13InSyncWithT12)
519 {
520 IfxCcu6_setT13TriggerEventMode(tPwm->ccu6, IfxCcu6_T13TriggerEvent_noAction);
521 IfxCcu6_setT13TriggerEventDirection(tPwm->ccu6, IfxCcu6_T13TriggerDirection_noAction);
522 }
523
524 // stop Timer 13
525 IfxCcu6_stopTimer(tPwm->ccu6, FALSE, TRUE);
526 }
527
528 // Timer 12 modulation //
529
530 else
531 {
532 // disable shadow transfer
533 IfxCcu6_disableShadowTransfer(tPwm->ccu6, TRUE, FALSE);
534
535 // remove external input trigger if any
536 if (tPwm->trigger.t12ExtInputTrigger != NULL_PTR)
537 {
538 IfxCcu6_setExternalRunMode(tPwm->ccu6, IfxCcu6_TimerId_t12, IfxCcu6_ExternalTriggerMode_disable);
539 }
540
541 // stop Timer 12
542 IfxCcu6_stopTimer(tPwm->ccu6, TRUE, FALSE);
543 }
544
545 // disable the modulation
546 IfxCcu6_disableModulationOutput(tPwm->ccu6, tPwm->timer, tPwm->channelOut);
547 }
Ifx_ActiveState_high
The signal is high active.
Definition: Ifx_Types.h:116
IfxCcu6_stopTimer
IFX_INLINE void IfxCcu6_stopTimer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
starts the timers (T12, T13 individually or together based on the selection)
Definition: IfxCcu6.h:2150
IfxCcu6_ServiceRequest_3
Service request output SR3.
Definition: IfxCcu6.h:235
IfxCcu6_ExternalTriggerMode_disable
The external setting of T1xR is disabled.
Definition: IfxCcu6.h:151
IfxCcu6_TPwm_TriggerConfig::outputTriggerEnabled
boolean outputTriggerEnabled
Output trigger connection to VADC enable / disable choice.
Definition: IfxCcu6_TPwm.h:299
IfxCcu6_TPwm
Module handle.
Definition: IfxCcu6_TPwm.h:310
IfxCcu6_setExternalRunMode
IFX_INLINE void IfxCcu6_setExternalRunMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ExternalTriggerMode mode)
Sets the event of signal T1xHR that can set the run bit T1xR by HW.
Definition: IfxCcu6.h:1984
IfxCcu6_getSrcAddress
volatile Ifx_SRC_SRCR * IfxCcu6_getSrcAddress(Ifx_CCU6 *ccu6, IfxCcu6_ServiceRequest serviceRequest)
Returns the service request register.
Definition: IfxCcu6.c:207
IfxCcu6_TPwm_Clock::t12ExtClockEnabled
boolean t12ExtClockEnabled
Timer 12 external clock enable / disable selection.
Definition: IfxCcu6_TPwm.h:231
IfxCcu6_Cc62_Out
CC62 pin mapping structure.
Definition: IfxCcu6_PinMap.h:144
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxCcu6_TPwm_Config::pins
IfxCcu6_TPwm_Pins * pins
Structure for CCU6 output pin configuration.
Definition: IfxCcu6_TPwm.h:330
IfxCcu6_enableDeadTime
IFX_INLINE void IfxCcu6_enableDeadTime(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Enables the dead time generation for each compare channel (0, 1, 2) of Timer12.
Definition: IfxCcu6.h:1540
IfxCcu6_T12CountMode_edgeAligned
T12 always counts up and continues counting from zero after reaching the period value.
Definition: IfxCcu6.h:299
IfxCcu6_InterruptSource_t13PeriodMatch
Interrupt enable for T13 period-match.
Definition: IfxCcu6.h:196
IfxCcu6_TPwm_Clock::t12ExtClockInput
IfxCcu6_T12hr_In * t12ExtClockInput
External input signal selection for timer 12.
Definition: IfxCcu6_TPwm.h:232
TPwm_Pause
void(* TPwm_Pause)(TPwm *handle)
Definition: TPwm.h:52
IfxCcu6_TPwm_Config::ccu6
Ifx_CCU6 * ccu6
Pointer to the base of CCU6 registers.
Definition: IfxCcu6_TPwm.h:324
IfxCcu6_TPwm_Config::timer12
IfxCcu6_TPwm_Timer12 timer12
Structure for Timer 12.
Definition: IfxCcu6_TPwm.h:327
IfxCcu6_Cout63_Out
COUT63 pin mapping structure.
Definition: IfxCcu6_PinMap.h:176
IfxCcu6_setT13TriggerEventMode
IFX_INLINE void IfxCcu6_setT13TriggerEventMode(Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerEvent mode)
Sets the trigger event to start Timer13 (automatic set of T13R for synchronization to Timer12 compare...
Definition: IfxCcu6.h:2121
IfxCcu6_Cc60_Out
CC60 pin mapping structure.
Definition: IfxCcu6_PinMap.h:128
IfxCcu6_InterruptSource_trap
Interrupt enable for trap flag.
Definition: IfxCcu6.h:197
IfxCcu6_enableTimer
IFX_INLINE void IfxCcu6_enableTimer(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Sets Timer12 block available, A write access to T12PR is executed.
Definition: IfxCcu6.h:1626
IfxCcu6_setT12ChannelMode
IFX_INLINE void IfxCcu6_setT12ChannelMode(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, IfxCcu6_T12ChannelMode mode)
Sets the operating mode of the Timer12 capture/compare channels.
Definition: IfxCcu6.h:2071
IfxCcu6_TPwm_TriggerConfig::extInputTriggerMode
IfxCcu6_ExternalTriggerMode extInputTriggerMode
Event of signal T1xHR that can set the run bit T1xR by HW.
Definition: IfxCcu6_TPwm.h:297
IfxCcu6_TPwm_InterruptConfig::priority
uint16 priority
Interrupt priority.
Definition: IfxCcu6_TPwm.h:245
IfxCcu6_TPwm_InterruptConfig::source
IfxCcu6_InterruptSource source
Interrupt source selection.
Definition: IfxCcu6_TPwm.h:243
TPwm_Config::activeState
Ifx_ActiveState activeState
Active state select for PWM output. Active high means that the PWM edge is rising at the elapsed of w...
Definition: TPwm.h:81
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxCcu6_TPwm_InterruptConfig::typeOfService
IfxSrc_Tos typeOfService
type of interrupt service
Definition: IfxCcu6_TPwm.h:246
IfxCcu6_ServiceRequest_2
Service request output SR2.
Definition: IfxCcu6.h:234
IfxCcu6_TPwm_Pins::t13hr
IFX_CONST IfxCcu6_T13hr_In * t13hr
T13HR input signal.
Definition: IfxCcu6_TPwm.h:263
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
IfxCcu6_TPwm_TriggerConfig::t13InSyncWithT12
boolean t13InSyncWithT12
Selection of Timer 13 start in sync with T12.
Definition: IfxCcu6_TPwm.h:298
IfxCcu6_setDeadTimeValue
IFX_INLINE void IfxCcu6_setDeadTimeValue(Ifx_CCU6 *ccu6, uint8 value)
Sets the delay between switching from the passive state to the active state of the selected outputs (...
Definition: IfxCcu6.h:1972
IfxCcu6_T13TriggerEvent_onT12Period
set T13R upon a period-match of T12
Definition: IfxCcu6.h:326
IfxCcu6_initCc62OutPin
IFX_INLINE void IfxCcu6_initCc62OutPin(const IfxCcu6_Cc62_Out *cc62Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC62 output pin.
Definition: IfxCcu6.h:1789
IfxCcu6_TPwm_InterruptConfig::serviceRequest
IfxCcu6_ServiceRequest serviceRequest
Selection of service request outputs.
Definition: IfxCcu6_TPwm.h:244
IfxCcu6_initCout61Pin
IFX_INLINE void IfxCcu6_initCout61Pin(const IfxCcu6_Cout61_Out *cout61, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT61 output pin.
Definition: IfxCcu6.h:1848
IfxCcu6_routeInterruptNode
void IfxCcu6_routeInterruptNode(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source, IfxCcu6_ServiceRequest serviceRequest)
Routes the interrupt node pointer to the selected service requests.
Definition: IfxCcu6.c:254
IfxCcu6_T12CountMode_centerAligned
T12 counts down after detecting a period-match and counts up after detecting a one-match.
Definition: IfxCcu6.h:301
IfxCcu6_T13TriggerEvent_onCC60RCompare
set T13R on a T12 compare event on channel 0
Definition: IfxCcu6.h:322
IfxCcu6_TimerId_t13
Timer 13.
Definition: IfxCcu6.h:337
IfxCcu6_TPwm_Clock::t13countingInputMode
IfxCcu6_CountingInputMode t13countingInputMode
Input event leading to a counting action of the timer T13.
Definition: IfxCcu6_TPwm.h:236
IfxCcu6_getTimerAvailabilityStatus
IFX_INLINE boolean IfxCcu6_getTimerAvailabilityStatus(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
indicates the Timer blocks (T12 / T13) availability
Definition: IfxCcu6.h:1715
TPwm_Start
void(* TPwm_Start)(TPwm *handle)
Definition: TPwm.h:51
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxCcu6_setT12CounterValue
IFX_INLINE void IfxCcu6_setT12CounterValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit counter value of Timer12.
Definition: IfxCcu6.h:2085
IfxCcu6_setT12Frequency
float32 IfxCcu6_setT12Frequency(Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period, IfxCcu6_T12CountMode countMode)
Sets the frequency and clock input of the Timer 12. Caution: If desired frequency cannot achieved (by...
Definition: IfxCcu6.c:337
IfxCcu6_T12ChannelMode_compareMode
Compare mode.
Definition: IfxCcu6.h:270
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxCcu6_enableShadowTransfer
IFX_INLINE void IfxCcu6_enableShadowTransfer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Enables shadow transfers of the timers (T12, T13 individually or together based on the selection) ...
Definition: IfxCcu6.h:1603
IfxCcu6_TPwm_Config::timer
IfxCcu6_TimerId timer
Timer number (T12 / T13)
Definition: IfxCcu6_TPwm.h:325
IfxCcu6_TPwm_Config::clock
IfxCcu6_TPwm_Clock clock
Structure for clock configuration.
Definition: IfxCcu6_TPwm.h:326
IfxCcu6_initCout60Pin
IFX_INLINE void IfxCcu6_initCout60Pin(const IfxCcu6_Cout60_Out *cout60, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT60 output pin.
Definition: IfxCcu6.h:1841
IfxCcu6_TPwm_pause
void IfxCcu6_TPwm_pause(IfxCcu6_TPwm *tPwm)
Pauses the triggered PWM.
Definition: IfxCcu6_TPwm.c:435
IfxCcu6_Cout62_Out
COUT62 pin mapping structure.
Definition: IfxCcu6_PinMap.h:168
IfxCcu6_TPwm_Config::interrupt2
IfxCcu6_TPwm_InterruptConfig interrupt2
Structure for second interrupt configuration.
Definition: IfxCcu6_TPwm.h:332
IfxCcu6_TPwm_Timer13::counterValue
uint16 counterValue
16-bit counter value of Timer13
Definition: IfxCcu6_TPwm.h:285
IfxCcu6_TPwm_Pins::outputMode
IfxPort_OutputMode outputMode
The pin output mode which should be configured.
Definition: IfxCcu6_TPwm.h:260
IfxCcu6_TPwm_TriggerConfig::t12ExtInputTrigger
IfxCcu6_T12hr_In * t12ExtInputTrigger
External trigger input signal selection to start the timer 12.
Definition: IfxCcu6_TPwm.h:295
IfxCcu6_enableInterrupt
IFX_INLINE void IfxCcu6_enableInterrupt(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Enables the selected interrupt.
Definition: IfxCcu6.h:1560
IfxCcu6_TPwm_resume
void IfxCcu6_TPwm_resume(IfxCcu6_TPwm *tPwm)
Resumes the triggered PWM.
Definition: IfxCcu6_TPwm.c:441
IfxCcu6_TPwm_initModule
void IfxCcu6_TPwm_initModule(IfxCcu6_TPwm *tPwm, const IfxCcu6_TPwm_Config *config)
Initialises the module with default configuration.
Definition: IfxCcu6_TPwm.c:53
IfxCcu6_TPwm_Pins::cc62Out
IFX_CONST IfxCcu6_Cc62_Out * cc62Out
CC62 compare output CC2.
Definition: IfxCcu6_TPwm.h:255
IfxCcu6_TimerId_t12
Timer 12.
Definition: IfxCcu6.h:336
IfxCcu6_TPwm.h
CCU6 TPWM details.
TPwm_Config::activeCount
Ifx_TimerValue activeCount
Specify active PWM period (TCOUNT)
Definition: TPwm.h:79
IfxCcu6_TPwm_Config::interrupt3
IfxCcu6_TPwm_InterruptConfig interrupt3
Structure for third interrupt configuration.
Definition: IfxCcu6_TPwm.h:333
IfxCcu6_TPwm_Clock::t12countingInputMode
IfxCcu6_CountingInputMode t12countingInputMode
Input event leading to a counting action of the timer T12.
Definition: IfxCcu6_TPwm.h:233
IfxCcu6_TPwm_Timer12::channelId
IfxCcu6_T12Channel channelId
Capture compare channel of the Timer12.
Definition: IfxCcu6_TPwm.h:272
IfxCcu6_ExternalTriggerMode_risingEdge
Bit T1xR is set if a rising edge of signal T1xHR is detected.
Definition: IfxCcu6.h:152
IfxCcu6_ChannelOut_cout3
CC63 compare output COUT3.
Definition: IfxCcu6.h:118
IfxCcu6_setT13InputSignal
void IfxCcu6_setT13InputSignal(Ifx_CCU6 *ccu6, IfxCcu6_T13hr_In *extInput)
selects the actual input signal for the timer inputs.
Definition: IfxCcu6.c:470
IfxCcu6_setT12CountMode
IFX_INLINE void IfxCcu6_setT12CountMode(Ifx_CCU6 *ccu6, IfxCcu6_T12CountMode mode)
Definition: IfxCcu6.h:2079
IfxCcu6_T13TriggerDirection_noAction
no action
Definition: IfxCcu6.h:310
IfxCcu6_TPwm_Clock::t13ExtClockEnabled
boolean t13ExtClockEnabled
Timer 13 external clock enable / disable selection.
Definition: IfxCcu6_TPwm.h:234
IfxCcu6_Cout60_Out
COUT60 pin mapping structure.
Definition: IfxCcu6_PinMap.h:152
IfxCcu6_initCc60OutPin
IFX_INLINE void IfxCcu6_initCc60OutPin(const IfxCcu6_Cc60_Out *cc60Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC60 output pin.
Definition: IfxCcu6.h:1745
IfxCcu6_InterruptSource_t12OneMatch
Interrupt enable for T12 one-match.
Definition: IfxCcu6.h:193
IfxCcu6_TPwm_Timer13::t12SyncDirection
IfxCcu6_T13TriggerDirection t12SyncDirection
Additional information to control trigger event selection.
Definition: IfxCcu6_TPwm.h:288
IfxCcu6_CountingInputMode_internal
The T1x prescaler generates the counting events, Bit TCTR4.T1xCNT is not taken into account...
Definition: IfxCcu6.h:126
IfxCcu6_TPwm_Pins::cc61Out
IFX_CONST IfxCcu6_Cc61_Out * cc61Out
CC61 compare output CC1.
Definition: IfxCcu6_TPwm.h:254
IfxCcu6_TPwm_start
void IfxCcu6_TPwm_start(IfxCcu6_TPwm *tPwm)
Starts the triggered PWM.
Definition: IfxCcu6_TPwm.c:447
IfxCcu6_isModuleEnabled
IFX_INLINE boolean IfxCcu6_isModuleEnabled(Ifx_CCU6 *ccu6)
Returns the status of module enabled or disabled.
Definition: IfxCcu6.h:1914
IfxCcu6_TPwm::base
TPwm base
Base TPWM object.
Definition: IfxCcu6_TPwm.h:312
IfxCcu6_TrigOut_0
Output Trigger Select for CCU6061 TRIG0.
Definition: IfxCcu6_cfg.h:89
IfxCcu6_T13TriggerDirection_onT12CountingUp
while T12 is counting up
Definition: IfxCcu6.h:311
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:68
IfxCcu6_TPwm_Config
Configuration structure of the module.
Definition: IfxCcu6_TPwm.h:321
IfxCcu6_TPwm_Config::timer13
IfxCcu6_TPwm_Timer13 timer13
Structure for Timer 13.
Definition: IfxCcu6_TPwm.h:328
IfxCcu6_initT12hrPin
IFX_INLINE void IfxCcu6_initT12hrPin(const IfxCcu6_T12hr_In *t12hrIn, IfxPort_InputMode inputMode)
Initialises a T12HR input pin.
Definition: IfxCcu6.h:1884
IfxCcu6_TPwm_TriggerConfig::outputTrigger
IfxCcu6_TrigSel outputTrigger
Output Trigger selection.
Definition: IfxCcu6_TPwm.h:301
IfxCcu6_setT12CompareValue
void IfxCcu6_setT12CompareValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, uint16 value)
Sets the 16-bit compare value of Timer12 (writes into shadow registers)
Definition: IfxCcu6.c:331
IfxCcu6_Cc61_Out
CC61 pin mapping structure.
Definition: IfxCcu6_PinMap.h:136
IfxCcu6_TPwm_Pins::cc60Out
IFX_CONST IfxCcu6_Cc60_Out * cc60Out
CC60 compare output CC0.
Definition: IfxCcu6_TPwm.h:253
IfxCcu6_disableModulationOutput
void IfxCcu6_disableModulationOutput(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut)
Disables the modulation of the corresponding output signal by PWM pattern generated by the timers T12...
Definition: IfxCcu6.c:70
IfxCcu6_TPwm_stop
void IfxCcu6_TPwm_stop(IfxCcu6_TPwm *tPwm)
Stops the triggered PWM.
Definition: IfxCcu6_TPwm.c:502
TPwm_Config::frequency
float32 frequency
Specify expected PWM frequency in Hertz.
Definition: TPwm.h:77
IfxCcu6_setCountingInputMode
IFX_INLINE void IfxCcu6_setCountingInputMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_CountingInputMode mode)
Sets the input event leading to a counting action of Timers (T12 / T13).
Definition: IfxCcu6.h:1958
IfxCcu6_TPwm_Timer12::deadTimeValue
uint8 deadTimeValue
Value of the dead time to be induced.
Definition: IfxCcu6_TPwm.h:276
IfxCcu6_TPwm_Clock::t13ExtClockInput
IfxCcu6_T13hr_In * t13ExtClockInput
External input signal selection for timer 13.
Definition: IfxCcu6_TPwm.h:235
IfxCcu6_setT13CounterValue
IFX_INLINE void IfxCcu6_setT13CounterValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit counter value of Timer13.
Definition: IfxCcu6.h:2103
TPwm_Config::period
Ifx_TimerValue period
Specify expected PWM period in ticks.
Definition: TPwm.h:80
IfxCcu6_TPwm_initModuleConfig
void IfxCcu6_TPwm_initModuleConfig(IfxCcu6_TPwm_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values.
Definition: IfxCcu6_TPwm.c:342
IfxCcu6_TPwm_Timer13::compareValue
uint16 compareValue
16-bit comapre value of Timer12
Definition: IfxCcu6_TPwm.h:286
IfxCcu6_T12hr_In
T12HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:112
IfxCcu6_TPwm_Pins::cout62
IFX_CONST IfxCcu6_Cout62_Out * cout62
CC62 compare output COUT2.
Definition: IfxCcu6_TPwm.h:258
IfxCcu6_T13hr_In
T13HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:120
IfxCcu6_T13TriggerEvent_noAction
no action
Definition: IfxCcu6.h:321
IfxCcu6_initT13hrPin
IFX_INLINE void IfxCcu6_initT13hrPin(const IfxCcu6_T13hr_In *t13hrIn, IfxPort_InputMode inputMode)
Initialises a T13HR input pin.
Definition: IfxCcu6.h:1899
IfxCcu6_TrigSel_cout63
Definition: IfxCcu6_cfg.h:96
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxCcu6_TPwm_Timer13::t12SyncEvent
IfxCcu6_T13TriggerEvent t12SyncEvent
T12 sync trigger event to start T13.
Definition: IfxCcu6_TPwm.h:287
IfxCcu6_TPwm_Timer12::channelMode
IfxCcu6_T12ChannelMode channelMode
The operating mode for the T12 channel.
Definition: IfxCcu6_TPwm.h:273
IfxCcu6_TPwm_Pins::cout60
IFX_CONST IfxCcu6_Cout60_Out * cout60
CC60 compare output COUT0.
Definition: IfxCcu6_TPwm.h:256
IfxCcu6_connectTrigger
void IfxCcu6_connectTrigger(Ifx_CCU6 *ccu6, IfxCcu6_TrigOut outputLine, IfxCcu6_TrigSel selectedTrigger)
Definition: IfxCcu6.c:53
TPwm_Config::waitingTime
Ifx_TimerValue waitingTime
Specify the expected ticks before timer starts (TWAIT)
Definition: TPwm.h:78
IfxCcu6_InterruptSource_t12PeriodMatch
Interrupt enable for T12 period-match.
Definition: IfxCcu6.h:194
IfxCcu6_T12Channel_0
T12 channel CC60.
Definition: IfxCcu6.h:260
IfxCcu6_TPwm_Pins::cout61
IFX_CONST IfxCcu6_Cout61_Out * cout61
CC61 compare output COUT1.
Definition: IfxCcu6_TPwm.h:257
IfxCcu6_TPwm_Pins::cout63
IFX_CONST IfxCcu6_Cout63_Out * cout63
CC63 compare output COUT3.
Definition: IfxCcu6_TPwm.h:259
IfxCcu6_TPwm_Config::base
TPwm_Config base
Base configuration.
Definition: IfxCcu6_TPwm.h:323
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxCcu6_ServiceRequest_1
Service request output SR1.
Definition: IfxCcu6.h:233
IfxCcu6_initCout63Pin
IFX_INLINE void IfxCcu6_initCout63Pin(const IfxCcu6_Cout63_Out *cout63, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT63 output pin.
Definition: IfxCcu6.h:1862
IfxCcu6_TPwm_Pins::pinDriver
IfxPort_PadDriver pinDriver
pad driver
Definition: IfxCcu6_TPwm.h:261
IfxCcu6_setT12InputSignal
void IfxCcu6_setT12InputSignal(Ifx_CCU6 *ccu6, IfxCcu6_T12hr_In *extInput)
selects the actual input signal for the timer inputs.
Definition: IfxCcu6.c:386
IfxCcu6_TPwm_Pins::t1xhrInputMode
IfxPort_InputMode t1xhrInputMode
The T1xHR pin input mode which should be configured.
Definition: IfxCcu6_TPwm.h:264
IfxCcu6_TPwm_Pins::t12hr
IFX_CONST IfxCcu6_T12hr_In * t12hr
T12HR input signal.
Definition: IfxCcu6_TPwm.h:262
IfxCcu6_TPwm_Config::channelOut
IfxCcu6_ChannelOut channelOut
Capture compare output pin selection.
Definition: IfxCcu6_TPwm.h:329
IfxCcu6_disableShadowTransfer
IFX_INLINE void IfxCcu6_disableShadowTransfer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Disables shadow transfers of the timers (T12, T13 individually or together based on the selection) ...
Definition: IfxCcu6.h:1478
IfxCcu6_setT13TriggerEventDirection
IFX_INLINE void IfxCcu6_setT13TriggerEventDirection(Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerDirection direction)
Sets the Timer13 trigger event direction.
Definition: IfxCcu6.h:2115
IfxCcu6_TPwm_Config::interrupt1
IfxCcu6_TPwm_InterruptConfig interrupt1
Structure for first interrupt configuration.
Definition: IfxCcu6_TPwm.h:331
IfxCcu6_Cout61_Out
COUT61 pin mapping structure.
Definition: IfxCcu6_PinMap.h:160
IfxCcu6_initCout62Pin
IFX_INLINE void IfxCcu6_initCout62Pin(const IfxCcu6_Cout62_Out *cout62, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT62 output pin.
Definition: IfxCcu6.h:1855
IfxCcu6_setT13CompareValue
IFX_INLINE void IfxCcu6_setT13CompareValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit compare value of Timer13 (writes into shadow register)
Definition: IfxCcu6.h:2097
IfxCcu6_TPwm_TriggerConfig::outputLine
IfxCcu6_TrigOut outputLine
Trigger out selection.
Definition: IfxCcu6_TPwm.h:300
IfxCcu6_TPwm_Config::trigger
IfxCcu6_TPwm_TriggerConfig trigger
Structure for trigger configuration.
Definition: IfxCcu6_TPwm.h:335
IfxCcu6_setT12PeriodValue
IFX_INLINE void IfxCcu6_setT12PeriodValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the period value that leads Timer12 counter value to a period-match.
Definition: IfxCcu6.h:2091
IfxCcu6_startTimer
IFX_INLINE void IfxCcu6_startTimer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
starts the timers (T12, T13 individually or together based on the selection)
Definition: IfxCcu6.h:2140
TRUE
#define TRUE
Definition: Platform_Types.h:90
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
IfxCcu6_setT13PeriodValue
IFX_INLINE void IfxCcu6_setT13PeriodValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the period value that leads Timer13 counter value to a period-match.
Definition: IfxCcu6.h:2109
IfxCcu6_initCc61OutPin
IFX_INLINE void IfxCcu6_initCc61OutPin(const IfxCcu6_Cc61_Out *cc61Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC61 output pin.
Definition: IfxCcu6.h:1767
IfxCcu6_TPwm_Timer12::countMode
IfxCcu6_T12CountMode countMode
Operating mode of Timer 12.
Definition: IfxCcu6_TPwm.h:274
IfxCcu6_TPwm_TriggerConfig::t13ExtInputTrigger
IfxCcu6_T13hr_In * t13ExtInputTrigger
External trigger input signal selection to start the timer 13.
Definition: IfxCcu6_TPwm.h:296
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxCcu6_TPwm_Config::interrupt4
IfxCcu6_TPwm_InterruptConfig interrupt4
Structure for fourth interrupt configuration.
Definition: IfxCcu6_TPwm.h:334
IfxCcu6_enableModule
void IfxCcu6_enableModule(Ifx_CCU6 *ccu6)
Enables the selected CCU6 kernel.
Definition: IfxCcu6.c:145
TPwm_Resume
void(* TPwm_Resume)(TPwm *handle)
Definition: TPwm.h:53
IfxCcu6_enableModulationOutput
void IfxCcu6_enableModulationOutput(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut)
Enables the modulation of the corresponding output signal by PWM pattern generated by the timers T12 ...
Definition: IfxCcu6.c:114
IfxCcu6_setT13Frequency
float32 IfxCcu6_setT13Frequency(Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period)
Sets the frequency and clock input of the Timer 13 Caution: If desired frequency cannot achieved (by ...
Definition: IfxCcu6.c:421
TPwm_Stop
void(* TPwm_Stop)(TPwm *handle)
Definition: TPwm.h:54
IfxCcu6_ServiceRequest_0
Service request output SR0.
Definition: IfxCcu6.h:232
IfxCcu6_setOutputPassiveState
IFX_INLINE void IfxCcu6_setOutputPassiveState(Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut, boolean state)
Sets the state of the corresponding compare channel, that is considered to be the passive state...
Definition: IfxCcu6.h:2033
IfxCcu6_TPwm_Pins
Structure for CCU6 output pin configuration.
Definition: IfxCcu6_TPwm.h:251


iLLD_TC38A: IfxCcu6_TPwm.h Source File

  • Ccu6
  • TPwm
IfxCcu6_TPwm.h
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6_TPwm.h
3 * \brief CCU6 TPWM details
4 * \ingroup IfxLld_Ccu6
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 * \defgroup IfxLld_Ccu6_TPwm_Usage How to use the CCU6 TPWM Interface driver?
43 * \ingroup IfxLld_Ccu6_TPwm
44 *
45 * The TPWM interface driver provides a default CCU6 configuration for PWM modulation output through the selected timer block.
46 *
47 * User can select the various configuration options that hardware allows
48 *
49 * In the following sections it will be described, how to integrate the driver into the application framework.
50 *
51 *
52 * \section IfxLld_Ccu6_TPwm_Preparation Preparation
53 *
54 *
55 * \subsection IfxLld_Ccu6_TPwm_Include Include Files
56 *
57 * Include following header file into your C code:
58 * \code
59 * #include <Ccu6/TPwm/IfxCcu6_TPwm.h>
60 * \endcode
61 *
62 * \subsection IfxLld_Ccu6_TPwm_Variables Variables
63 *
64 * Declare the TPWM handle as global variable in your C code:
65 *
66 * \code
67 * // used globally
68 * static IfxCcu6_TPwm tPwm;
69 * \endcode
70 *
71 * \subsection IfxLld_Ccu6_TPwm_Interrupt Interrupt Handler Installation
72 *
73 * See also \ref IfxLld_Cpu_Irq_Usage
74 *
75 * Define priority for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:
76 * \code
77 * // priorities are normally defined in Ifx_IntPrioDef.h
78 * #define IFX_INTPRIO_CCU6 1
79 * \endcode
80 *
81 * Add the interrupt service routine to your C code.
82 * \code
83 * IFX_INTERRUPT(ccu60ISR_TPwm, 0, IFX_INTPRIO_CCU6)
84 * {
85 * //user code
86 * }
87 * \endcode
88 *
89 * Finally install the interrupt handlers in your initialisation function:
90 * \code
91 * // install interrupt handlers
92 * IfxCpu_Irq_installInterruptHandler(&ccu60ISR_TPwm, IFX_INTPRIO_CCU6);
93 * IfxCpu_enableInterrupts();
94 * \endcode
95 *
96 * \subsection IfxLld_Ccu6_TPwm_Init Module Initialisation
97 *
98 * The module initialisation can be done in the same function. Here an example:
99 * \code
100 * // create configuration
101 * IfxCcu6_TPwm_Config tPwmConfig;
102 * IfxCcu6_TPwm_initModuleConfig(&tPwmConfig, &MODULE_CCU60);
103 *
104 * // configure the frequency of the timer in case of internal start
105 * // this frequency will be set for the timer block selected later
106 * tPwmConfig.base.frequency = 400000;
107 *
108 * // configure the period of the timer
109 * tPwmConfig.base.period = 100;
110 *
111 * // configure the waiting time in case of delayed T13 start in sync with T12
112 * tPwmConfig.base.waitingTime = 20;
113 *
114 * // select the active state of the output
115 * tPwmConfig.base.activeState = Ifx_ActiveState_high;
116 *
117 * // select the timer through which PWM is to be generated
118 * tPwmConfig.timer = IfxCcu6_TimerId_t13;
119 *
120 * // configure the clock for internal mode
121 * tPwmConfig.clock.t13ExtClockEnabled = FALSE;
122 * tPwmConfig.clock.t13ExtClockInput = NULL_PTR;
123 * tPwmConfig.clock.t13countingInputMode = IfxCcu6_CountingInputMode_internal;
124 *
125 * // configure the selcted timer block
126 * tPwmConfig.timer13.counterValue = 0;
127 * tPwmConfig.timer13.compareValue = 100;
128 * // configure the syncronisation, in case of sync start with T12
129 * tPwmConfig.timer13.t12SyncEvent = IfxCcu6_T13TriggerEvent_onCC60RCompare;
130 * tPwmConfig.timer13.t12SyncDirection = IfxCcu6_T13TriggerDirection_onT12CountingUp;
131 *
132 * //select the channel out for modulation
133 * tPwmConfig.channelOut = IfxCcu6_ChannelOut_cout3;
134 *
135 * // pin configuration
136 * const IfxCcu6_TPwm_Pins pins = {
137 * NULL, // CC60Out pin not used
138 * NULL, // CC61Out pin not used
139 * NULL, // CC62Out pin not used
140 * NULL, // COUT60 pin not used
141 * NULL, // COUT61 pin not used
142 * NULL, // COUT62 pin not used
143 * IfxCcu60_COUT63_P00_0_OUT, // COUT63 pin
144 * IfxPort_OutputMode_pushPull,
145 * IfxPort_PadDriver_cmosAutomotiveSpeed1
146 * };
147 * tPwmConfig.pins = &pins;
148 *
149 * // configure the interrupts
150 * tPwmConfig.interrupt1.interruptSource = IfxCcu6_InterruptSource_t13CompareMatch;
151 * tPwmConfig.interrupt1.serviceRequest = IfxCcu6_ServiceRequest_2;
152 * tPwmConfig.interrupt1.priority = IFX_INTPRIO_CCU6;
153 * tPwmConfig.interrupt1.typeOfService = IfxSrc_Tos_cpu0;
154 *
155 * // configure input and output triggers
156 * tPwmConfig.trigger.t12ExtInputTrigger = IfxCcu60_T12HRB_P00_7_IN;
157 * tPwmConfig.trigger.t13ExtInputTrigger = NULL_PTR;
158 * tPwmConfig.trigger.extInputTriggerMode = IfxCcu6_ExternalTriggerMode_risingEdge;
159 * tPwmConfig.trigger.t13InSyncWithT12 = TRUE;
160 *
161 * tPwmConfig.trigger.outputTriggerEnabled = TRUE;
162 * tPwmConfig.trigger.outputLine = IfxCcu6_TrigOut_0;
163 * tPwmConfig.trigger.outputTrigger = IfxCcu6_TrigSel_cout63;
164 *
165 *
166 * // initialize the module
167 * IfxCcu6_TPwm_initModule(&tPwm, &tPwmConfig);
168 * \endcode
169 *
170 *
171 * The TPWM is ready for use now!
172 *
173 *
174 * \section IfxLld_Ccu6_TPwm_ModulationControl Modulation Control
175 *
176 *
177 * The TPWM driver provides simple to use Modulation Control functions
178 *
179 * This means: you can start, stop, pause and resume the modulation once the module is initialised with the appropriate configuration
180 *
181 * Start the modulation
182 * \code
183 * IfxCcu6_TPwm_start(&tPwm);
184 * \endcode
185 *
186 * Stop the modulation
187 * \code
188 * IfxCcu6_TPwm_stop(&tPwm);
189 * \endcode
190 *
191 * Pause the modulation
192 * \code
193 * IfxCcu6_TPwm_pause(&tPwm);
194 * \endcode
195 *
196 * Resume the modulation
197 * \code
198 * IfxCcu6_TPwm_resume(&tPwm);
199 * \endcode
200 *
201 * \defgroup IfxLld_Ccu6_TPwm TPWM Interface driver
202 * \ingroup IfxLld_Ccu6
203 * \defgroup IfxLld_Ccu6_TPwm_DataStructures Data Structures
204 * \ingroup IfxLld_Ccu6_TPwm
205 * \defgroup IfxLld_Ccu6_TPwm_Module_Initialize_Functions Module Initialize Functions
206 * \ingroup IfxLld_Ccu6_TPwm
207 * \defgroup IfxLld_Ccu6_TPwm_Modultion_Control_Functions Modultion Control Functions
208 * \ingroup IfxLld_Ccu6_TPwm
209 */
210
211 #ifndef IFXCCU6_TPWM_H
212 #define IFXCCU6_TPWM_H 1
213
214 /******************************************************************************/
215 /*----------------------------------Includes----------------------------------*/
216 /******************************************************************************/
217
218 #include "Ccu6/Std/IfxCcu6.h"
219 #include "If/Ccu6If/TPwm.h"
220
221 /******************************************************************************/
222 /*-----------------------------Data Structures--------------------------------*/
223 /******************************************************************************/
224
225 /** \addtogroup IfxLld_Ccu6_TPwm_DataStructures
226 * \{ */
227 /** \brief Structure for clock configuration
228 */
229 typedef struct
230 {
231 boolean t12ExtClockEnabled; /**< \brief Timer 12 external clock enable / disable selection */
232 IfxCcu6_T12hr_In *t12ExtClockInput; /**< \brief External input signal selection for timer 12 */
233 IfxCcu6_CountingInputMode t12countingInputMode; /**< \brief Input event leading to a counting action of the timer T12 */
234 boolean t13ExtClockEnabled; /**< \brief Timer 13 external clock enable / disable selection */
235 IfxCcu6_T13hr_In *t13ExtClockInput; /**< \brief External input signal selection for timer 13 */
236 IfxCcu6_CountingInputMode t13countingInputMode; /**< \brief Input event leading to a counting action of the timer T13 */
237 } IfxCcu6_TPwm_Clock;
238
239 /** \brief Structure for interrupt configuration
240 */
241 typedef struct
242 {
243 IfxCcu6_InterruptSource source; /**< \brief Interrupt source selection */
244 IfxCcu6_ServiceRequest serviceRequest; /**< \brief Selection of service request outputs */
245 uint16 priority; /**< \brief Interrupt priority */
246 IfxSrc_Tos typeOfService; /**< \brief type of interrupt service */
247 } IfxCcu6_TPwm_InterruptConfig;
248
249 /** \brief Structure for CCU6 output pin configuration
250 */
251 typedef struct
252 {
253 IFX_CONST IfxCcu6_Cc60_Out *cc60Out; /**< \brief CC60 compare output CC0 */
254 IFX_CONST IfxCcu6_Cc61_Out *cc61Out; /**< \brief CC61 compare output CC1 */
255 IFX_CONST IfxCcu6_Cc62_Out *cc62Out; /**< \brief CC62 compare output CC2 */
256 IFX_CONST IfxCcu6_Cout60_Out *cout60; /**< \brief CC60 compare output COUT0 */
257 IFX_CONST IfxCcu6_Cout61_Out *cout61; /**< \brief CC61 compare output COUT1 */
258 IFX_CONST IfxCcu6_Cout62_Out *cout62; /**< \brief CC62 compare output COUT2 */
259 IFX_CONST IfxCcu6_Cout63_Out *cout63; /**< \brief CC63 compare output COUT3 */
260 IfxPort_OutputMode outputMode; /**< \brief The pin output mode which should be configured */
261 IfxPort_PadDriver pinDriver; /**< \brief pad driver */
262 IFX_CONST IfxCcu6_T12hr_In *t12hr; /**< \brief T12HR input signal */
263 IFX_CONST IfxCcu6_T13hr_In *t13hr; /**< \brief T13HR input signal */
264 IfxPort_InputMode t1xhrInputMode; /**< \brief The T1xHR pin input mode which should be configured */
265 } IfxCcu6_TPwm_Pins;
266
267 /** \brief Structure for Timer 12
268 */
269 typedef struct
270 {
271 IfxCcu6_TimerInputClock clockInput; /**< \brief Input clock selection (prescaler) */
272 IfxCcu6_T12Channel channelId; /**< \brief Capture compare channel of the Timer12 */
273 IfxCcu6_T12ChannelMode channelMode; /**< \brief The operating mode for the T12 channel */
274 IfxCcu6_T12CountMode countMode; /**< \brief Operating mode of Timer 12 */
275 uint16 counterValue; /**< \brief 16-bit counter value of Timer12 */
276 uint8 deadTimeValue; /**< \brief Value of the dead time to be induced */
277 uint16 compareValue; /**< \brief 16-bit comapre value of Timer12 */
278 } IfxCcu6_TPwm_Timer12;
279
280 /** \brief Structure for Timer 13
281 */
282 typedef struct
283 {
284 IfxCcu6_TimerInputClock clockInput; /**< \brief Input clock selection (prescaler) */
285 uint16 counterValue; /**< \brief 16-bit counter value of Timer13 */
286 uint16 compareValue; /**< \brief 16-bit comapre value of Timer12 */
287 IfxCcu6_T13TriggerEvent t12SyncEvent; /**< \brief T12 sync trigger event to start T13 */
288 IfxCcu6_T13TriggerDirection t12SyncDirection; /**< \brief Additional information to control trigger event selection */
289 } IfxCcu6_TPwm_Timer13;
290
291 /** \brief Configuration structure for external triggers
292 */
293 typedef struct
294 {
295 IfxCcu6_T12hr_In *t12ExtInputTrigger; /**< \brief External trigger input signal selection to start the timer 12 */
296 IfxCcu6_T13hr_In *t13ExtInputTrigger; /**< \brief External trigger input signal selection to start the timer 13 */
297 IfxCcu6_ExternalTriggerMode extInputTriggerMode; /**< \brief Event of signal T1xHR that can set the run bit T1xR by HW */
298 boolean t13InSyncWithT12; /**< \brief Selection of Timer 13 start in sync with T12 */
299 boolean outputTriggerEnabled; /**< \brief Output trigger connection to VADC enable / disable choice */
300 IfxCcu6_TrigOut outputLine; /**< \brief Trigger out selection */
301 IfxCcu6_TrigSel outputTrigger; /**< \brief Output Trigger selection */
302 } IfxCcu6_TPwm_TriggerConfig;
303
304 /** \} */
305
306 /** \addtogroup IfxLld_Ccu6_TPwm_DataStructures
307 * \{ */
308 /** \brief Module handle
309 */
310 typedef struct
311 {
312 TPwm base; /**< \brief Base TPWM object */
313 Ifx_CCU6 *ccu6; /**< \brief Pointer to the base of CCU6 registers */
314 IfxCcu6_TimerId timer; /**< \brief Timer number (T12 / T13) */
315 IfxCcu6_ChannelOut channelOut; /**< \brief Capture compare output pin selection */
316 IfxCcu6_TPwm_TriggerConfig trigger; /**< \brief Structure for trigger configuration */
317 } IfxCcu6_TPwm;
318
319 /** \brief Configuration structure of the module
320 */
321 typedef struct
322 {
323 TPwm_Config base; /**< \brief Base configuration */
324 Ifx_CCU6 *ccu6; /**< \brief Pointer to the base of CCU6 registers */
325 IfxCcu6_TimerId timer; /**< \brief Timer number (T12 / T13) */
326 IfxCcu6_TPwm_Clock clock; /**< \brief Structure for clock configuration */
327 IfxCcu6_TPwm_Timer12 timer12; /**< \brief Structure for Timer 12 */
328 IfxCcu6_TPwm_Timer13 timer13; /**< \brief Structure for Timer 13 */
329 IfxCcu6_ChannelOut channelOut; /**< \brief Capture compare output pin selection */
330 IfxCcu6_TPwm_Pins *pins; /**< \brief Structure for CCU6 output pin configuration */
331 IfxCcu6_TPwm_InterruptConfig interrupt1; /**< \brief Structure for first interrupt configuration */
332 IfxCcu6_TPwm_InterruptConfig interrupt2; /**< \brief Structure for second interrupt configuration */
333 IfxCcu6_TPwm_InterruptConfig interrupt3; /**< \brief Structure for third interrupt configuration */
334 IfxCcu6_TPwm_InterruptConfig interrupt4; /**< \brief Structure for fourth interrupt configuration */
335 IfxCcu6_TPwm_TriggerConfig trigger; /**< \brief Structure for trigger configuration */
336 } IfxCcu6_TPwm_Config;
337
338 /** \} */
339
340 /** \addtogroup IfxLld_Ccu6_TPwm_Module_Initialize_Functions
341 * \{ */
342
343 /******************************************************************************/
344 /*-------------------------Global Function Prototypes-------------------------*/
345 /******************************************************************************/
346
347 /** \brief Fills the config structure with default values
348 * \param config Configuration structure of the module
349 * \param ccu6 Pointer to the base of CCU6 registers
350 * \return None
351 *
352 * A coding example can be found in \ref IfxLld_Ccu6_TPwm_Usage
353 *
354 */
355 IFX_EXTERN void IfxCcu6_TPwm_initModuleConfig(IfxCcu6_TPwm_Config *config, Ifx_CCU6 *ccu6);
356
357 /** \} */
358
359 /** \addtogroup IfxLld_Ccu6_TPwm_Modultion_Control_Functions
360 * \{ */
361
362 /******************************************************************************/
363 /*-------------------------Global Function Prototypes-------------------------*/
364 /******************************************************************************/
365
366 /** \brief Initialises the module with default configuration
367 * \param tPwm Module handle
368 * \param config Configuration structure of the module
369 * \return None
370 *
371 * A coding example can be found in \ref IfxLld_Ccu6_TPwm_Usage
372 *
373 */
374 IFX_EXTERN void IfxCcu6_TPwm_initModule(IfxCcu6_TPwm *tPwm, const IfxCcu6_TPwm_Config *config);
375
376 /** \brief Pauses the triggered PWM
377 * \param tPwm Module handle
378 * \return None
379 *
380 * A coding example can be found in \ref IfxLld_Ccu6_TPwm_Usage
381 *
382 */
383 IFX_EXTERN void IfxCcu6_TPwm_pause(IfxCcu6_TPwm *tPwm);
384
385 /** \brief Resumes the triggered PWM
386 * \param tPwm Module handle
387 * \return None
388 *
389 * A coding example can be found in \ref IfxLld_Ccu6_TPwm_Usage
390 *
391 */
392 IFX_EXTERN void IfxCcu6_TPwm_resume(IfxCcu6_TPwm *tPwm);
393
394 /** \brief Starts the triggered PWM
395 * \param tPwm Module handle
396 * \return None
397 *
398 * A coding example can be found in \ref IfxLld_Ccu6_TPwm_Usage
399 *
400 */
401 IFX_EXTERN void IfxCcu6_TPwm_start(IfxCcu6_TPwm *tPwm);
402
403 /** \brief Stops the triggered PWM
404 * \param tPwm Module handle
405 * \return None
406 *
407 * A coding example can be found in \ref IfxLld_Ccu6_TPwm_Usage
408 *
409 */
410 IFX_EXTERN void IfxCcu6_TPwm_stop(IfxCcu6_TPwm *tPwm);
411
412 /** \} */
413
414 #endif /* IFXCCU6_TPWM_H */
IfxCcu6_TPwm_InterruptConfig
Structure for interrupt configuration.
Definition: IfxCcu6_TPwm.h:241
IfxCcu6_TPwm_TriggerConfig
Configuration structure for external triggers.
Definition: IfxCcu6_TPwm.h:293
IfxCcu6_TPwm_TriggerConfig::outputTriggerEnabled
boolean outputTriggerEnabled
Output trigger connection to VADC enable / disable choice.
Definition: IfxCcu6_TPwm.h:299
IfxCcu6_TPwm
Module handle.
Definition: IfxCcu6_TPwm.h:310
IfxCcu6_TPwm_Clock::t12ExtClockEnabled
boolean t12ExtClockEnabled
Timer 12 external clock enable / disable selection.
Definition: IfxCcu6_TPwm.h:231
IfxCcu6_Cc62_Out
CC62 pin mapping structure.
Definition: IfxCcu6_PinMap.h:144
IfxCcu6_TPwm_Config::pins
IfxCcu6_TPwm_Pins * pins
Structure for CCU6 output pin configuration.
Definition: IfxCcu6_TPwm.h:330
IfxCcu6_InterruptSource
IfxCcu6_InterruptSource
Interrupt source selection Description in Ifx_CCU.IEN.
Definition: IfxCcu6.h:179
IfxCcu6_TPwm_Clock::t12ExtClockInput
IfxCcu6_T12hr_In * t12ExtClockInput
External input signal selection for timer 12.
Definition: IfxCcu6_TPwm.h:232
IfxCcu6_TPwm::ccu6
Ifx_CCU6 * ccu6
Pointer to the base of CCU6 registers.
Definition: IfxCcu6_TPwm.h:313
IfxCcu6_TPwm_Config::timer12
IfxCcu6_TPwm_Timer12 timer12
Structure for Timer 12.
Definition: IfxCcu6_TPwm.h:327
IfxCcu6_Cout63_Out
COUT63 pin mapping structure.
Definition: IfxCcu6_PinMap.h:176
IfxCcu6_Cc60_Out
CC60 pin mapping structure.
Definition: IfxCcu6_PinMap.h:128
IfxCcu6_ChannelOut
IfxCcu6_ChannelOut
Capture compare output pins.
Definition: IfxCcu6.h:110
IfxCcu6_TPwm_TriggerConfig::extInputTriggerMode
IfxCcu6_ExternalTriggerMode extInputTriggerMode
Event of signal T1xHR that can set the run bit T1xR by HW.
Definition: IfxCcu6_TPwm.h:297
IfxCcu6_TPwm_InterruptConfig::priority
uint16 priority
Interrupt priority.
Definition: IfxCcu6_TPwm.h:245
IfxCcu6_TPwm_InterruptConfig::source
IfxCcu6_InterruptSource source
Interrupt source selection.
Definition: IfxCcu6_TPwm.h:243
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:140
IfxCcu6_TPwm_InterruptConfig::typeOfService
IfxSrc_Tos typeOfService
type of interrupt service
Definition: IfxCcu6_TPwm.h:246
IfxCcu6_TPwm_Pins::t13hr
IFX_CONST IfxCcu6_T13hr_In * t13hr
T13HR input signal.
Definition: IfxCcu6_TPwm.h:263
IfxCcu6_TPwm_TriggerConfig::t13InSyncWithT12
boolean t13InSyncWithT12
Selection of Timer 13 start in sync with T12.
Definition: IfxCcu6_TPwm.h:298
IfxCcu6_TPwm_InterruptConfig::serviceRequest
IfxCcu6_ServiceRequest serviceRequest
Selection of service request outputs.
Definition: IfxCcu6_TPwm.h:244
TPwm_Config
Configuration structure of the TPwm interface.
Definition: TPwm.h:75
IfxCcu6_T13TriggerDirection
IfxCcu6_T13TriggerDirection
Delivers additional information to control the automatic set of bit T13R in the case that the trigger...
Definition: IfxCcu6.h:308
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxCcu6_TPwm_Clock::t13countingInputMode
IfxCcu6_CountingInputMode t13countingInputMode
Input event leading to a counting action of the timer T13.
Definition: IfxCcu6_TPwm.h:236
IfxCcu6_TPwm::timer
IfxCcu6_TimerId timer
Timer number (T12 / T13)
Definition: IfxCcu6_TPwm.h:314
IfxCcu6_TPwm_Config::clock
IfxCcu6_TPwm_Clock clock
Structure for clock configuration.
Definition: IfxCcu6_TPwm.h:326
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxCcu6_TPwm_pause
IFX_EXTERN void IfxCcu6_TPwm_pause(IfxCcu6_TPwm *tPwm)
Pauses the triggered PWM.
Definition: IfxCcu6_TPwm.c:435
IfxCcu6_Cout62_Out
COUT62 pin mapping structure.
Definition: IfxCcu6_PinMap.h:168
IfxCcu6_TPwm_Config::interrupt2
IfxCcu6_TPwm_InterruptConfig interrupt2
Structure for second interrupt configuration.
Definition: IfxCcu6_TPwm.h:332
IfxCcu6_TPwm_Timer12::counterValue
uint16 counterValue
16-bit counter value of Timer12
Definition: IfxCcu6_TPwm.h:275
IfxCcu6_TPwm_Pins::outputMode
IfxPort_OutputMode outputMode
The pin output mode which should be configured.
Definition: IfxCcu6_TPwm.h:260
IfxCcu6_TPwm_TriggerConfig::t12ExtInputTrigger
IfxCcu6_T12hr_In * t12ExtInputTrigger
External trigger input signal selection to start the timer 12.
Definition: IfxCcu6_TPwm.h:295
IfxCcu6_TPwm_Clock
Structure for clock configuration.
Definition: IfxCcu6_TPwm.h:229
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxCcu6_TPwm_resume
IFX_EXTERN void IfxCcu6_TPwm_resume(IfxCcu6_TPwm *tPwm)
Resumes the triggered PWM.
Definition: IfxCcu6_TPwm.c:441
IfxCcu6_TPwm_initModule
IFX_EXTERN void IfxCcu6_TPwm_initModule(IfxCcu6_TPwm *tPwm, const IfxCcu6_TPwm_Config *config)
Initialises the module with default configuration.
Definition: IfxCcu6_TPwm.c:53
IfxCcu6_CountingInputMode
IfxCcu6_CountingInputMode
Defines the input event leading to a counting action of the timer (T12 / T13) Definition in Ifx_CCU...
Definition: IfxCcu6.h:124
IfxCcu6_TPwm_Pins::cc62Out
IFX_CONST IfxCcu6_Cc62_Out * cc62Out
CC62 compare output CC2.
Definition: IfxCcu6_TPwm.h:255
IfxCcu6_TPwm_Config::interrupt3
IfxCcu6_TPwm_InterruptConfig interrupt3
Structure for third interrupt configuration.
Definition: IfxCcu6_TPwm.h:333
IfxCcu6_TPwm_Clock::t12countingInputMode
IfxCcu6_CountingInputMode t12countingInputMode
Input event leading to a counting action of the timer T12.
Definition: IfxCcu6_TPwm.h:233
IfxCcu6_TPwm_Timer12::channelId
IfxCcu6_T12Channel channelId
Capture compare channel of the Timer12.
Definition: IfxCcu6_TPwm.h:272
IfxCcu6_TPwm_Clock::t13ExtClockEnabled
boolean t13ExtClockEnabled
Timer 13 external clock enable / disable selection.
Definition: IfxCcu6_TPwm.h:234
IfxCcu6_Cout60_Out
COUT60 pin mapping structure.
Definition: IfxCcu6_PinMap.h:152
IfxCcu6_T12Channel
IfxCcu6_T12Channel
Capture compare channel of Timer12.
Definition: IfxCcu6.h:258
IfxCcu6_T12ChannelMode
IfxCcu6_T12ChannelMode
The operating mode for the T12 channels are defined by the bit fields Ifx_CCU.T12MSEL.MSEL6x.
Definition: IfxCcu6.h:267
IfxCcu6_TPwm_Timer13::t12SyncDirection
IfxCcu6_T13TriggerDirection t12SyncDirection
Additional information to control trigger event selection.
Definition: IfxCcu6_TPwm.h:288
IfxCcu6.h
CCU6 basic functionality.
TPwm.h
TPWM interface.
IfxCcu6_ServiceRequest
IfxCcu6_ServiceRequest
Selection of service request outputs.
Definition: IfxCcu6.h:230
IfxCcu6_T13TriggerEvent
IfxCcu6_T13TriggerEvent
Selects the trigger event to start T13 (automatic set of T13R for synchronization to T12 compare sign...
Definition: IfxCcu6.h:319
IfxCcu6_TPwm_Pins::cc61Out
IFX_CONST IfxCcu6_Cc61_Out * cc61Out
CC61 compare output CC1.
Definition: IfxCcu6_TPwm.h:254
IfxCcu6_TPwm_start
IFX_EXTERN void IfxCcu6_TPwm_start(IfxCcu6_TPwm *tPwm)
Starts the triggered PWM.
Definition: IfxCcu6_TPwm.c:447
IfxCcu6_TimerId
IfxCcu6_TimerId
Timer number ( T12 / T13 )
Definition: IfxCcu6.h:334
IfxCcu6_TPwm::base
TPwm base
Base TPWM object.
Definition: IfxCcu6_TPwm.h:312
IfxCcu6_TPwm_Config
Configuration structure of the module.
Definition: IfxCcu6_TPwm.h:321
IfxCcu6_TPwm_Config::timer13
IfxCcu6_TPwm_Timer13 timer13
Structure for Timer 13.
Definition: IfxCcu6_TPwm.h:328
IfxCcu6_T12CountMode
IfxCcu6_T12CountMode
Operating mode of Timer 12 Definition in Ifx_CCU.TCTR0.B.CTM.
Definition: IfxCcu6.h:297
IfxCcu6_TPwm_TriggerConfig::outputTrigger
IfxCcu6_TrigSel outputTrigger
Output Trigger selection.
Definition: IfxCcu6_TPwm.h:301
IfxCcu6_Cc61_Out
CC61 pin mapping structure.
Definition: IfxCcu6_PinMap.h:136
IfxCcu6_TPwm_Pins::cc60Out
IFX_CONST IfxCcu6_Cc60_Out * cc60Out
CC60 compare output CC0.
Definition: IfxCcu6_TPwm.h:253
TPwm_s
Structure of the TPwm interface.
Definition: TPwm.h:65
IfxCcu6_TPwm_stop
IFX_EXTERN void IfxCcu6_TPwm_stop(IfxCcu6_TPwm *tPwm)
Stops the triggered PWM.
Definition: IfxCcu6_TPwm.c:502
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:151
IfxCcu6_TPwm_Timer12::deadTimeValue
uint8 deadTimeValue
Value of the dead time to be induced.
Definition: IfxCcu6_TPwm.h:276
IfxCcu6_TPwm_Clock::t13ExtClockInput
IfxCcu6_T13hr_In * t13ExtClockInput
External input signal selection for timer 13.
Definition: IfxCcu6_TPwm.h:235
IfxCcu6_ExternalTriggerMode
IfxCcu6_ExternalTriggerMode
Defines the event of signal T1xHR that can set the run bit T1xR by HW Definition in Ifx_CCU...
Definition: IfxCcu6.h:149
IfxCcu6_TPwm_initModuleConfig
IFX_EXTERN void IfxCcu6_TPwm_initModuleConfig(IfxCcu6_TPwm_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values.
Definition: IfxCcu6_TPwm.c:342
IfxCcu6_TPwm_Timer12::compareValue
uint16 compareValue
16-bit comapre value of Timer12
Definition: IfxCcu6_TPwm.h:277
IfxCcu6_T12hr_In
T12HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:112
IfxCcu6_TPwm_Pins::cout62
IFX_CONST IfxCcu6_Cout62_Out * cout62
CC62 compare output COUT2.
Definition: IfxCcu6_TPwm.h:258
IfxCcu6_T13hr_In
T13HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:120
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxCcu6_TPwm_Timer13::t12SyncEvent
IfxCcu6_T13TriggerEvent t12SyncEvent
T12 sync trigger event to start T13.
Definition: IfxCcu6_TPwm.h:287
IfxCcu6_TPwm_Timer12::channelMode
IfxCcu6_T12ChannelMode channelMode
The operating mode for the T12 channel.
Definition: IfxCcu6_TPwm.h:273
IfxCcu6_TPwm_Pins::cout60
IFX_CONST IfxCcu6_Cout60_Out * cout60
CC60 compare output COUT0.
Definition: IfxCcu6_TPwm.h:256
IfxCcu6_TPwm_Pins::cout61
IFX_CONST IfxCcu6_Cout61_Out * cout61
CC61 compare output COUT1.
Definition: IfxCcu6_TPwm.h:257
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:81
IfxCcu6_TPwm_Pins::cout63
IFX_CONST IfxCcu6_Cout63_Out * cout63
CC63 compare output COUT3.
Definition: IfxCcu6_TPwm.h:259
IfxCcu6_TPwm_Config::base
TPwm_Config base
Base configuration.
Definition: IfxCcu6_TPwm.h:323
IfxCcu6_TPwm_Timer12::clockInput
IfxCcu6_TimerInputClock clockInput
Input clock selection (prescaler)
Definition: IfxCcu6_TPwm.h:271
IfxCcu6_TPwm_Pins::pinDriver
IfxPort_PadDriver pinDriver
pad driver
Definition: IfxCcu6_TPwm.h:261
IfxCcu6_TPwm_Timer12
Structure for Timer 12.
Definition: IfxCcu6_TPwm.h:269
IfxCcu6_TPwm_Timer13
Structure for Timer 13.
Definition: IfxCcu6_TPwm.h:282
IfxCcu6_TPwm_Pins::t1xhrInputMode
IfxPort_InputMode t1xhrInputMode
The T1xHR pin input mode which should be configured.
Definition: IfxCcu6_TPwm.h:264
IfxCcu6_TPwm_Pins::t12hr
IFX_CONST IfxCcu6_T12hr_In * t12hr
T12HR input signal.
Definition: IfxCcu6_TPwm.h:262
IfxCcu6_TrigSel
IfxCcu6_TrigSel
Definition: IfxCcu6_cfg.h:94
IfxCcu6_TPwm::channelOut
IfxCcu6_ChannelOut channelOut
Capture compare output pin selection.
Definition: IfxCcu6_TPwm.h:315
IfxCcu6_TPwm_Config::interrupt1
IfxCcu6_TPwm_InterruptConfig interrupt1
Structure for first interrupt configuration.
Definition: IfxCcu6_TPwm.h:331
IfxCcu6_Cout61_Out
COUT61 pin mapping structure.
Definition: IfxCcu6_PinMap.h:160
IfxCcu6_TPwm_TriggerConfig::outputLine
IfxCcu6_TrigOut outputLine
Trigger out selection.
Definition: IfxCcu6_TPwm.h:300
IfxCcu6_TrigOut
IfxCcu6_TrigOut
Definition: IfxCcu6_cfg.h:87
IfxCcu6_TPwm::trigger
IfxCcu6_TPwm_TriggerConfig trigger
Structure for trigger configuration.
Definition: IfxCcu6_TPwm.h:316
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxCcu6_TPwm_Timer12::countMode
IfxCcu6_T12CountMode countMode
Operating mode of Timer 12.
Definition: IfxCcu6_TPwm.h:274
IfxCcu6_TPwm_TriggerConfig::t13ExtInputTrigger
IfxCcu6_T13hr_In * t13ExtInputTrigger
External trigger input signal selection to start the timer 13.
Definition: IfxCcu6_TPwm.h:296
IfxCcu6_TPwm_Config::interrupt4
IfxCcu6_TPwm_InterruptConfig interrupt4
Structure for fourth interrupt configuration.
Definition: IfxCcu6_TPwm.h:334
IfxCcu6_TimerInputClock
IfxCcu6_TimerInputClock
Selects the input clock for timers (T12 or T13) that is derived from the peripheral clock according t...
Definition: IfxCcu6.h:343
IfxCcu6_TPwm_Pins
Structure for CCU6 output pin configuration.
Definition: IfxCcu6_TPwm.h:251


iLLD_TC38A: IfxCcu6_Timer.c Source File

  • Ccu6
  • Timer
IfxCcu6_Timer.c
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6_Timer.c
3 * \brief CCU6 TIMER details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 *
41 */
42
43 /******************************************************************************/
44 /*----------------------------------Includes----------------------------------*/
45 /******************************************************************************/
46
47 #include "IfxCcu6_Timer.h"
48
49 /******************************************************************************/
50 /*-------------------------Function Implementations---------------------------*/
51 /******************************************************************************/
52
53 void IfxCcu6_Timer_countOneStep(IfxCcu6_Timer *timer)
54 {
55 if (timer->timer == IfxCcu6_TimerId_t13)
56 {
57 // enable shadow transfer
58 IfxCcu6_enableShadowTransfer(timer->ccu6, FALSE, TRUE);
59
60 // enable manual counting mode
61 IfxCcu6_setCountingInputMode(timer->ccu6, IfxCcu6_TimerId_t13, IfxCcu6_CountingInputMode_manual);
62 IfxCcu6_enableCountEvent(timer->ccu6, FALSE, TRUE);
63 }
64 else if (timer->timer == IfxCcu6_TimerId_t12)
65 {
66 // enable shadow transfer
67 IfxCcu6_enableShadowTransfer(timer->ccu6, TRUE, FALSE);
68
69 // enable manual counting mode
70 IfxCcu6_setCountingInputMode(timer->ccu6, IfxCcu6_TimerId_t12, IfxCcu6_CountingInputMode_manual);
71 IfxCcu6_enableCountEvent(timer->ccu6, TRUE, FALSE);
72 }
73 }
74
75
76 void IfxCcu6_Timer_initModule(IfxCcu6_Timer *timer, const IfxCcu6_Timer_Config *config)
77 {
78 Ifx_CCU6 *ccu6SFR = config->ccu6; // pointer to CCU6 registers
79 timer->ccu6 = ccu6SFR; // adding register pointer to module handler
80
81 /* -- hardware module initialisation -- */
82
83 // enable module if it hasn't been enabled by any other interface //
84 if (IfxCcu6_isModuleEnabled(ccu6SFR) == FALSE)
85 {
86 IfxCcu6_enableModule(ccu6SFR);
87 }
88
89 /* -- timer initialisation -- */
90
91 // Timer 13 initialisation //
92
93 if ((config->timer == IfxCcu6_TimerId_t13) || (config->synchronousOperation))
94 {
95 // enable Timer13 if it hasn't been enabled by any other interface //
96 if (IfxCcu6_getTimerAvailabilityStatus(ccu6SFR, IfxCcu6_TimerId_t13) == FALSE)
97 {
98 IfxCcu6_enableTimer(ccu6SFR, IfxCcu6_TimerId_t13);
99 }
100
101 // clock initialisation //
102
103 if (config->clock.t13ExtClockEnabled) // if external source is selected as reference
104 {
105 // input signal selection
106 if (config->clock.t13ExtClockInput != NULL_PTR)
107 {
108 IfxCcu6_setT13InputSignal(config->ccu6, config->clock.t13ExtClockInput);
109 }
110
111 // counting input mode selection
112 IfxCcu6_setCountingInputMode(ccu6SFR, IfxCcu6_TimerId_t13, config->clock.t13countingInputMode);
113
114 // period setting
115 IfxCcu6_setT13PeriodValue(ccu6SFR, (uint16)config->base.t13Period);
116 }
117 else // if internal clock is selected as reference
118 {
119 IfxCcu6_setT13Frequency(ccu6SFR, config->base.t13Frequency, config->base.t13Period);
120 }
121
122 // counter initialisation //
123
124 IfxCcu6_setT13CounterValue(ccu6SFR, config->timer13.counterValue);
125
126 // if Timer 13 start is in sync with Timer 12 //
127 if ((config->trigger.t13InSyncWithT12) && (!(config->synchronousOperation)))
128 {
129 IfxCcu6_setT13TriggerEventMode(ccu6SFR, config->timer13.t12SyncEvent);
130 IfxCcu6_setT13TriggerEventDirection(ccu6SFR, config->timer13.t12SyncDirection);
131 }
132 }
133 else
134 {}
135
136 // Timer 12 initialisation //
137
138 if ((config->timer == IfxCcu6_TimerId_t12) || (config->trigger.t13InSyncWithT12) || (config->synchronousOperation))
139 {
140 Ifx_TimerValue period = config->base.t12Period;
141
142 // enable Timer12 if it hasn't been enabled by any other interface //
143 if (IfxCcu6_getTimerAvailabilityStatus(ccu6SFR, IfxCcu6_TimerId_t12) == FALSE)
144 {
145 IfxCcu6_enableTimer(ccu6SFR, IfxCcu6_TimerId_t12);
146 }
147
148 // if Timer 13 start is in sync with Timer 12 //
149 if ((config->trigger.t13InSyncWithT12) && (!(config->synchronousOperation)) && (config->base.waitingTime != 0))
150 {
151 // if in sync with T12 period match (only period match is allowed in this interface because T12 is only in counter mode)
152 if (config->timer13.t12SyncEvent == IfxCcu6_T13TriggerEvent_onT12Period)
153 {
154 period = config->base.waitingTime; // waiting time as period
155 }
156 }
157 else
158 {
159 // configuration error
160 }
161
162 // clock initialisation //
163
164 if (config->clock.t12ExtClockEnabled) // if external source is selected as reference
165 {
166 // input signal selection
167 if (config->clock.t12ExtClockInput != NULL_PTR)
168 {
169 IfxCcu6_setT12InputSignal(config->ccu6, config->clock.t12ExtClockInput);
170 }
171
172 // counting input mode selection
173 IfxCcu6_setCountingInputMode(ccu6SFR, IfxCcu6_TimerId_t12, config->clock.t12countingInputMode);
174
175 // countining mode selection
176 IfxCcu6_setT12CountMode(ccu6SFR, config->timer12.countMode);
177
178 // period selection for center aligned mode
179 if (config->timer12.countMode == IfxCcu6_T12CountMode_centerAligned)
180 {
181 period = (period / 2) - 1;
182 }
183
184 // period setting
185 IfxCcu6_setT12PeriodValue(ccu6SFR, (uint16)period);
186 }
187 else // if internal clock is selected as reference
188 {
189 // in case of in sync with T13, T12 runs at same frequency as T13
190 IfxCcu6_setT12Frequency(ccu6SFR, config->base.t12Frequency, period, config->timer12.countMode);
191 }
192
193 // counter initialisation //
194
195 IfxCcu6_setT12CounterValue(ccu6SFR, config->timer12.counterValue);
196 }
197
198 /* -- Pin mapping -- */
199
200 const IfxCcu6_Timer_Pins *pins = config->pins;
201
202 if (pins != NULL_PTR)
203 {
204 IfxCcu6_T12hr_In *t12hr = pins->t12hr;
205
206 if (t12hr != NULL_PTR)
207 {
208 IfxCcu6_initT12hrPin(t12hr, pins->t1xhrInputMode);
209 }
210
211 IfxCcu6_T13hr_In *t13hr = pins->t13hr;
212
213 if (t13hr != NULL_PTR)
214 {
215 IfxCcu6_initT13hrPin(t13hr, pins->t1xhrInputMode);
216 }
217 }
218
219 /* -- interrupt initialisation -- */
220
221 if (config->interrupt1.priority > 0)
222 {
223 IfxCcu6_enableInterrupt(config->ccu6, config->interrupt1.source);
224 IfxCcu6_routeInterruptNode(config->ccu6, config->interrupt1.source, config->interrupt1.serviceRequest);
225
226 volatile Ifx_SRC_SRCR *src;
227 src = IfxCcu6_getSrcAddress(config->ccu6, config->interrupt1.serviceRequest);
228 IfxSrc_init(src, config->interrupt1.typeOfService, config->interrupt1.priority);
229 IfxSrc_enable(src);
230 }
231
232 if (config->interrupt2.priority > 0)
233 {
234 IfxCcu6_enableInterrupt(config->ccu6, config->interrupt2.source);
235 IfxCcu6_routeInterruptNode(config->ccu6, config->interrupt2.source, config->interrupt2.serviceRequest);
236
237 volatile Ifx_SRC_SRCR *src;
238 src = IfxCcu6_getSrcAddress(config->ccu6, config->interrupt2.serviceRequest);
239 IfxSrc_init(src, config->interrupt2.typeOfService, config->interrupt2.priority);
240 IfxSrc_enable(src);
241 }
242
243 if (config->interrupt3.priority > 0)
244 {
245 IfxCcu6_enableInterrupt(config->ccu6, config->interrupt3.source);
246 IfxCcu6_routeInterruptNode(config->ccu6, config->interrupt3.source, config->interrupt3.serviceRequest);
247
248 volatile Ifx_SRC_SRCR *src;
249 src = IfxCcu6_getSrcAddress(config->ccu6, config->interrupt3.serviceRequest);
250 IfxSrc_init(src, config->interrupt3.typeOfService, config->interrupt3.priority);
251 IfxSrc_enable(src);
252 }
253
254 if (config->interrupt4.priority > 0)
255 {
256 IfxCcu6_enableInterrupt(config->ccu6, config->interrupt4.source);
257 IfxCcu6_routeInterruptNode(config->ccu6, config->interrupt4.source, config->interrupt4.serviceRequest);
258
259 volatile Ifx_SRC_SRCR *src;
260 src = IfxCcu6_getSrcAddress(config->ccu6, config->interrupt4.serviceRequest);
261 IfxSrc_init(src, config->interrupt4.typeOfService, config->interrupt4.priority);
262 IfxSrc_enable(src);
263 }
264
265 timer->timer = config->timer;
266 timer->trigger = config->trigger;
267
268 #if IFX_CFG_USE_STANDARD_INTERFACE
269 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (uint32)timer == ((uint32)&timer->base));
270 timer->base.functions.start = (Timer_Start) & IfxCcu6_Timer_start;
271 timer->base.functions.stop = (Timer_Stop) & IfxCcu6_Timer_stop;
272 timer->base.functions.synchronousStart = (Timer_SynchronousStart) & IfxCcu6_Timer_synchronousStart;
273 timer->base.functions.synchronousStop = (Timer_SynchronousStop) & IfxCcu6_Timer_synchronousStop;
274 timer->base.functions.countOneStep = (Timer_CountOneStep) & IfxCcu6_Timer_countOneStep;
275 timer->base.functions.startSingleShotMode = (Timer_StartSingleShotMode) & IfxCcu6_Timer_startSingleShotMode;
276 #endif
277 }
278
279
280 void IfxCcu6_Timer_initModuleConfig(IfxCcu6_Timer_Config *config, Ifx_CCU6 *ccu6)
281 {
282 const IfxCcu6_Timer_Config defaultConfig = {
283 .base = {
284 .t12Frequency = 400000,
285 .t12Period = 100,
286 .t13Frequency = 400000,
287 .t13Period = 100,
288 .waitingTime = 20,
289 .activeCount = 0,
290 },
291
292 .ccu6 = NULL_PTR, // will be initialized below
293
294 .timer = IfxCcu6_TimerId_t13,
295 .synchronousOperation = FALSE,
296
297 .pins = NULL_PTR,
298
299 .clock = {
300 .t12ExtClockEnabled = FALSE,
301 .t12ExtClockInput = NULL_PTR,
302 .t12countingInputMode = IfxCcu6_CountingInputMode_internal,
303
304 .t13ExtClockEnabled = FALSE,
305 .t13ExtClockInput = NULL_PTR,
306 .t13countingInputMode = IfxCcu6_CountingInputMode_internal,
307 },
308
309 .timer12 = {
310 .countMode = IfxCcu6_T12CountMode_edgeAligned,
311 .counterValue = 0,
312 },
313
314 .timer13 = {
315 .counterValue = 0,
316 .t12SyncEvent = IfxCcu6_T13TriggerEvent_onCC60RCompare,
317 .t12SyncDirection = IfxCcu6_T13TriggerDirection_onT12CountingUp,
318 },
319
320 .interrupt1 = {
321 .source = IfxCcu6_InterruptSource_t12PeriodMatch,
322 .serviceRequest = IfxCcu6_ServiceRequest_0,
323 .priority = 0, // interrupt priority 0
324 .typeOfService = IfxSrc_Tos_cpu0, // type of service CPU0
325 },
326
327 .interrupt2 = {
328 .source = IfxCcu6_InterruptSource_t13PeriodMatch,
329 .serviceRequest = IfxCcu6_ServiceRequest_1,
330 .priority = 0, // interrupt priority 0
331 .typeOfService = IfxSrc_Tos_cpu0, // type of service CPU0
332 },
333
334 .interrupt3 = {
335 .source = IfxCcu6_InterruptSource_t12OneMatch,
336 .serviceRequest = IfxCcu6_ServiceRequest_2,
337 .priority = 0, // interrupt priority 0
338 .typeOfService = IfxSrc_Tos_cpu0, // type of service CPU0
339 },
340
341 .interrupt4 = {
342 .source = IfxCcu6_InterruptSource_trap,
343 .serviceRequest = IfxCcu6_ServiceRequest_3,
344 .priority = 0, // interrupt priority 0
345 .typeOfService = IfxSrc_Tos_cpu0, // type of service CPU0
346 },
347
348 .trigger = {
349 .t12ExtInputTrigger = NULL_PTR,
350 .t13ExtInputTrigger = NULL_PTR,
351 .extInputTriggerMode = IfxCcu6_ExternalTriggerMode_risingEdge,
352 .t13InSyncWithT12 = TRUE,
353 },
354 };
355
356 /* Default Configuration */
357 *config = defaultConfig;
358
359 /* take over module pointer */
360 config->ccu6 = ccu6;
361 }
362
363
364 void IfxCcu6_Timer_start(IfxCcu6_Timer *timer)
365 {
366 // Timer 13 start //
367
368 if (timer->timer == IfxCcu6_TimerId_t13)
369 {
370 // enable shadow transfer
371 IfxCcu6_enableShadowTransfer(timer->ccu6, FALSE, TRUE);
372
373 // start Timer 13 when not in sync with timer12
374 if (!(timer->trigger.t13InSyncWithT12))
375 {
376 if (timer->trigger.t13ExtInputTrigger != NULL_PTR)
377 {
378 // external start
379 IfxCcu6_setExternalRunMode(timer->ccu6, IfxCcu6_TimerId_t13, timer->trigger.extInputTriggerMode);
380 IfxCcu6_setT13InputSignal(timer->ccu6, timer->trigger.t13ExtInputTrigger);
381 }
382 else
383 {
384 // internal start
385 IfxCcu6_startTimer(timer->ccu6, FALSE, TRUE);
386 }
387 }
388 else
389 {}
390 }
391 else
392 {}
393
394 // Timer 12 start alone or when in sync with Timer 13 //
395
396 if ((timer->timer == IfxCcu6_TimerId_t12) || (timer->trigger.t13InSyncWithT12))
397 {
398 // enable shadow transfer
399 IfxCcu6_enableShadowTransfer(timer->ccu6, TRUE, FALSE);
400
401 //start Timer 12
402 if (timer->trigger.t12ExtInputTrigger != NULL_PTR)
403 {
404 // external start
405 IfxCcu6_setExternalRunMode(timer->ccu6, IfxCcu6_TimerId_t12, timer->trigger.extInputTriggerMode);
406 IfxCcu6_setT12InputSignal(timer->ccu6, timer->trigger.t12ExtInputTrigger);
407 }
408 else
409 {
410 // internal start
411 IfxCcu6_startTimer(timer->ccu6, TRUE, FALSE);
412 }
413 }
414 else
415 {}
416 }
417
418
419 void IfxCcu6_Timer_startSingleShotMode(IfxCcu6_Timer *timer)
420 {
421 // Timer 13 start //
422
423 if (timer->timer == IfxCcu6_TimerId_t13)
424 {
425 // enable shadow transfer
426 IfxCcu6_enableShadowTransfer(timer->ccu6, FALSE, TRUE);
427
428 //enable single shot mode
429 IfxCcu6_enableSingleShotMode(timer->ccu6, IfxCcu6_TimerId_t13);
430
431 // start Timer 13 when not in sync with timer12
432 if (!(timer->trigger.t13InSyncWithT12))
433 {
434 if (timer->trigger.t13ExtInputTrigger != NULL_PTR)
435 {
436 // external start
437 IfxCcu6_setExternalRunMode(timer->ccu6, IfxCcu6_TimerId_t13, timer->trigger.extInputTriggerMode);
438 IfxCcu6_setT13InputSignal(timer->ccu6, timer->trigger.t13ExtInputTrigger);
439 }
440 else
441 {
442 // internal start
443 IfxCcu6_startTimer(timer->ccu6, FALSE, TRUE);
444 }
445 }
446 else
447 {}
448 }
449 else
450 {}
451
452 // Timer 12 start alone or when in sync with Timer 13 //
453
454 if ((timer->timer == IfxCcu6_TimerId_t12) || (timer->trigger.t13InSyncWithT12))
455 {
456 // enable shadow transfer
457 IfxCcu6_enableShadowTransfer(timer->ccu6, TRUE, FALSE);
458
459 //enable single shot mode
460 IfxCcu6_enableSingleShotMode(timer->ccu6, IfxCcu6_TimerId_t12);
461
462 if (timer->trigger.t12ExtInputTrigger != NULL_PTR)
463 {
464 // external start
465 IfxCcu6_setExternalRunMode(timer->ccu6, IfxCcu6_TimerId_t12, timer->trigger.extInputTriggerMode);
466 IfxCcu6_setT12InputSignal(timer->ccu6, timer->trigger.t12ExtInputTrigger);
467 }
468 else
469 {
470 // internal start
471 IfxCcu6_startTimer(timer->ccu6, TRUE, FALSE);
472 }
473 }
474 else
475 {}
476 }
477
478
479 void IfxCcu6_Timer_stop(IfxCcu6_Timer *timer)
480 {
481 // Timer 13 stop //
482
483 if ((timer->timer == IfxCcu6_TimerId_t13) || (timer->trigger.t13InSyncWithT12))
484 {
485 // disable shadow transfer
486 IfxCcu6_disableShadowTransfer(timer->ccu6, FALSE, TRUE);
487
488 // remove external input trigger if any
489 if (timer->trigger.t13ExtInputTrigger != NULL_PTR)
490 {
491 IfxCcu6_setExternalRunMode(timer->ccu6, IfxCcu6_TimerId_t13, IfxCcu6_ExternalTriggerMode_disable);
492 }
493
494 // remove the sync with Timer 12
495 if (timer->trigger.t13InSyncWithT12)
496 {
497 IfxCcu6_setT13TriggerEventMode(timer->ccu6, IfxCcu6_T13TriggerEvent_noAction);
498 IfxCcu6_setT13TriggerEventDirection(timer->ccu6, IfxCcu6_T13TriggerDirection_noAction);
499 }
500
501 // stop Timer 13
502 IfxCcu6_stopTimer(timer->ccu6, FALSE, TRUE);
503 }
504
505 // Timer 12 stop //
506
507 else
508 {
509 // disable shadow transfer
510 IfxCcu6_disableShadowTransfer(timer->ccu6, TRUE, FALSE);
511
512 // remove external input trigger if any
513 if (timer->trigger.t12ExtInputTrigger != NULL_PTR)
514 {
515 IfxCcu6_setExternalRunMode(timer->ccu6, IfxCcu6_TimerId_t12, IfxCcu6_ExternalTriggerMode_disable);
516 }
517
518 // stop Timer 12
519 IfxCcu6_stopTimer(timer->ccu6, TRUE, FALSE);
520 }
521 }
522
523
524 void IfxCcu6_Timer_synchronousStart(IfxCcu6_Timer *timer)
525 {
526 // enable shadow transfer
527 IfxCcu6_enableShadowTransfer(timer->ccu6, TRUE, TRUE);
528
529 // only internal synchronous start is possible
530 IfxCcu6_startTimer(timer->ccu6, TRUE, TRUE);
531 }
532
533
534 void IfxCcu6_Timer_synchronousStop(IfxCcu6_Timer *timer)
535 {
536 // disable shadow transfer
537 IfxCcu6_disableShadowTransfer(timer->ccu6, TRUE, TRUE);
538
539 // only internal synchronous stop is possible
540 IfxCcu6_stopTimer(timer->ccu6, TRUE, TRUE);
541 }
IfxCcu6_stopTimer
IFX_INLINE void IfxCcu6_stopTimer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
starts the timers (T12, T13 individually or together based on the selection)
Definition: IfxCcu6.h:2150
IfxCcu6_ServiceRequest_3
Service request output SR3.
Definition: IfxCcu6.h:235
IfxCcu6_Timer_synchronousStart
void IfxCcu6_Timer_synchronousStart(IfxCcu6_Timer *timer)
Starts both the timers together.
Definition: IfxCcu6_Timer.c:524
IfxCcu6_Timer_Config::pins
IfxCcu6_Timer_Pins * pins
Structure for CCU6 output pin configuration.
Definition: IfxCcu6_Timer.h:317
Timer_StartSingleShotMode
void(* Timer_StartSingleShotMode)(Timer *handle)
Definition: Timer.h:56
IfxCcu6_ExternalTriggerMode_disable
The external setting of T1xR is disabled.
Definition: IfxCcu6.h:151
IfxCcu6_Timer_Config::interrupt1
IfxCcu6_Timer_InterruptConfig interrupt1
Structure for first interrupt configuration.
Definition: IfxCcu6_Timer.h:312
Timer_CountOneStep
void(* Timer_CountOneStep)(Timer *handle)
Definition: Timer.h:55
IfxCcu6_setExternalRunMode
IFX_INLINE void IfxCcu6_setExternalRunMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ExternalTriggerMode mode)
Sets the event of signal T1xHR that can set the run bit T1xR by HW.
Definition: IfxCcu6.h:1984
IfxCcu6_getSrcAddress
volatile Ifx_SRC_SRCR * IfxCcu6_getSrcAddress(Ifx_CCU6 *ccu6, IfxCcu6_ServiceRequest serviceRequest)
Returns the service request register.
Definition: IfxCcu6.c:207
IfxCcu6_Timer_Clock::t13ExtClockEnabled
boolean t13ExtClockEnabled
Timer 13 external clock enable / disable selection.
Definition: IfxCcu6_Timer.h:236
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxCcu6_T12CountMode_edgeAligned
T12 always counts up and continues counting from zero after reaching the period value.
Definition: IfxCcu6.h:299
IfxCcu6_InterruptSource_t13PeriodMatch
Interrupt enable for T13 period-match.
Definition: IfxCcu6.h:196
IfxCcu6_Timer_Config::interrupt4
IfxCcu6_Timer_InterruptConfig interrupt4
Structure for fourth interrupt configuration.
Definition: IfxCcu6_Timer.h:315
IfxCcu6_Timer.h
CCU6 TIMER details.
IfxCcu6_setT13TriggerEventMode
IFX_INLINE void IfxCcu6_setT13TriggerEventMode(Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerEvent mode)
Sets the trigger event to start Timer13 (automatic set of T13R for synchronization to Timer12 compare...
Definition: IfxCcu6.h:2121
Timer_Start
void(* Timer_Start)(Timer *handle)
Definition: Timer.h:51
IfxCcu6_Timer_Clock::t13ExtClockInput
IfxCcu6_T13hr_In * t13ExtClockInput
External input signal selection for timer 13.
Definition: IfxCcu6_Timer.h:237
IfxCcu6_InterruptSource_trap
Interrupt enable for trap flag.
Definition: IfxCcu6.h:197
IfxCcu6_enableTimer
IFX_INLINE void IfxCcu6_enableTimer(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Sets Timer12 block available, A write access to T12PR is executed.
Definition: IfxCcu6.h:1626
IfxCcu6_Timer_TriggerConfig::t12ExtInputTrigger
IfxCcu6_T12hr_In * t12ExtInputTrigger
External input signal selection for timer 12.
Definition: IfxCcu6_Timer.h:272
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxCcu6_ServiceRequest_2
Service request output SR2.
Definition: IfxCcu6.h:234
IfxCcu6_Timer_countOneStep
void IfxCcu6_Timer_countOneStep(IfxCcu6_Timer *timer)
Counts the timer one step.
Definition: IfxCcu6_Timer.c:53
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
IfxCcu6_Timer_Timer12::countMode
IfxCcu6_T12CountMode countMode
Operating mode of Timer 12.
Definition: IfxCcu6_Timer.h:255
IfxCcu6_Timer_Config::trigger
IfxCcu6_Timer_TriggerConfig trigger
Structure for trigger configuration.
Definition: IfxCcu6_Timer.h:316
Timer_Config::t12Frequency
float32 t12Frequency
Specify expected T12 PWM frequency in Hertz.
Definition: Timer.h:83
IfxCcu6_T13TriggerEvent_onT12Period
set T13R upon a period-match of T12
Definition: IfxCcu6.h:326
IfxCcu6_Timer_InterruptConfig::source
IfxCcu6_InterruptSource source
Interrupt source selection.
Definition: IfxCcu6_Timer.h:245
IfxCcu6_routeInterruptNode
void IfxCcu6_routeInterruptNode(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source, IfxCcu6_ServiceRequest serviceRequest)
Routes the interrupt node pointer to the selected service requests.
Definition: IfxCcu6.c:254
IfxCcu6_T12CountMode_centerAligned
T12 counts down after detecting a period-match and counts up after detecting a one-match.
Definition: IfxCcu6.h:301
IfxCcu6_Timer_Config
Configuration structure of the module.
Definition: IfxCcu6_Timer.h:303
IfxCcu6_T13TriggerEvent_onCC60RCompare
set T13R on a T12 compare event on channel 0
Definition: IfxCcu6.h:322
IfxCcu6_TimerId_t13
Timer 13.
Definition: IfxCcu6.h:337
IfxCcu6_getTimerAvailabilityStatus
IFX_INLINE boolean IfxCcu6_getTimerAvailabilityStatus(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
indicates the Timer blocks (T12 / T13) availability
Definition: IfxCcu6.h:1715
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxCcu6_Timer
Module handle.
Definition: IfxCcu6_Timer.h:293
IfxCcu6_Timer_Pins::t1xhrInputMode
IfxPort_InputMode t1xhrInputMode
The T1xHR pin input mode which should be configured.
Definition: IfxCcu6_Timer.h:286
IfxCcu6_setT12CounterValue
IFX_INLINE void IfxCcu6_setT12CounterValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit counter value of Timer12.
Definition: IfxCcu6.h:2085
IfxCcu6_setT12Frequency
float32 IfxCcu6_setT12Frequency(Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period, IfxCcu6_T12CountMode countMode)
Sets the frequency and clock input of the Timer 12. Caution: If desired frequency cannot achieved (by...
Definition: IfxCcu6.c:337
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxCcu6_enableShadowTransfer
IFX_INLINE void IfxCcu6_enableShadowTransfer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Enables shadow transfers of the timers (T12, T13 individually or together based on the selection) ...
Definition: IfxCcu6.h:1603
IfxCcu6_Timer_Config::timer12
IfxCcu6_Timer_Timer12 timer12
Structure for Timer 12.
Definition: IfxCcu6_Timer.h:310
IfxCcu6_Timer_startSingleShotMode
void IfxCcu6_Timer_startSingleShotMode(IfxCcu6_Timer *timer)
Starts the single shot mode of the timer.
Definition: IfxCcu6_Timer.c:419
Timer_Stop
void(* Timer_Stop)(Timer *handle)
Definition: Timer.h:52
Timer_SynchronousStop
void(* Timer_SynchronousStop)(Timer *handle)
Definition: Timer.h:54
IfxCcu6_Timer_stop
void IfxCcu6_Timer_stop(IfxCcu6_Timer *timer)
Stops the timer.
Definition: IfxCcu6_Timer.c:479
IfxCcu6_Timer::timer
IfxCcu6_TimerId timer
Timer number (T12 / T13)
Definition: IfxCcu6_Timer.h:297
IfxCcu6_enableSingleShotMode
IFX_INLINE void IfxCcu6_enableSingleShotMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Enables the single shot-mode of Timers (T12 T13).
Definition: IfxCcu6.h:1613
IfxCcu6_enableInterrupt
IFX_INLINE void IfxCcu6_enableInterrupt(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Enables the selected interrupt.
Definition: IfxCcu6.h:1560
IfxCcu6_Timer_Pins::t13hr
IFX_CONST IfxCcu6_T13hr_In * t13hr
T13HR input signal.
Definition: IfxCcu6_Timer.h:285
IfxCcu6_TimerId_t12
Timer 12.
Definition: IfxCcu6.h:336
IfxCcu6_Timer_Timer13::t12SyncEvent
IfxCcu6_T13TriggerEvent t12SyncEvent
T12 sync trigger event to start T13.
Definition: IfxCcu6_Timer.h:264
IfxCcu6_Timer_synchronousStop
void IfxCcu6_Timer_synchronousStop(IfxCcu6_Timer *timer)
Starts both the timers together.
Definition: IfxCcu6_Timer.c:534
IfxCcu6_ExternalTriggerMode_risingEdge
Bit T1xR is set if a rising edge of signal T1xHR is detected.
Definition: IfxCcu6.h:152
IfxCcu6_setT13InputSignal
void IfxCcu6_setT13InputSignal(Ifx_CCU6 *ccu6, IfxCcu6_T13hr_In *extInput)
selects the actual input signal for the timer inputs.
Definition: IfxCcu6.c:470
IfxCcu6_setT12CountMode
IFX_INLINE void IfxCcu6_setT12CountMode(Ifx_CCU6 *ccu6, IfxCcu6_T12CountMode mode)
Definition: IfxCcu6.h:2079
IfxCcu6_T13TriggerDirection_noAction
no action
Definition: IfxCcu6.h:310
IfxCcu6_Timer_InterruptConfig::serviceRequest
IfxCcu6_ServiceRequest serviceRequest
Selection of service request outputs.
Definition: IfxCcu6_Timer.h:246
IfxCcu6_InterruptSource_t12OneMatch
Interrupt enable for T12 one-match.
Definition: IfxCcu6.h:193
Timer_Config::t12Period
Ifx_TimerValue t12Period
Specify expected T12 PWM period in ticks.
Definition: Timer.h:84
Timer_SynchronousStart
void(* Timer_SynchronousStart)(Timer *handle)
Definition: Timer.h:53
IfxCcu6_Timer_Clock::t12ExtClockInput
IfxCcu6_T12hr_In * t12ExtClockInput
External input signal selection for timer 12.
Definition: IfxCcu6_Timer.h:234
IfxCcu6_CountingInputMode_internal
The T1x prescaler generates the counting events, Bit TCTR4.T1xCNT is not taken into account...
Definition: IfxCcu6.h:126
IfxCcu6_Timer_Clock::t12countingInputMode
IfxCcu6_CountingInputMode t12countingInputMode
Input event leading to a counting action of the timer T12.
Definition: IfxCcu6_Timer.h:235
IfxCcu6_isModuleEnabled
IFX_INLINE boolean IfxCcu6_isModuleEnabled(Ifx_CCU6 *ccu6)
Returns the status of module enabled or disabled.
Definition: IfxCcu6.h:1914
IfxCcu6_T13TriggerDirection_onT12CountingUp
while T12 is counting up
Definition: IfxCcu6.h:311
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:68
IfxCcu6_enableCountEvent
IFX_INLINE void IfxCcu6_enableCountEvent(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Sets the single shot-mode of Timers (T12, T13).
Definition: IfxCcu6.h:1530
IfxCcu6_Timer_Pins::t12hr
IFX_CONST IfxCcu6_T12hr_In * t12hr
T12HR input signal.
Definition: IfxCcu6_Timer.h:284
IfxCcu6_initT12hrPin
IFX_INLINE void IfxCcu6_initT12hrPin(const IfxCcu6_T12hr_In *t12hrIn, IfxPort_InputMode inputMode)
Initialises a T12HR input pin.
Definition: IfxCcu6.h:1884
IfxCcu6_Timer::ccu6
Ifx_CCU6 * ccu6
Pointer to the base of CCU6 registers.
Definition: IfxCcu6_Timer.h:296
IfxCcu6_Timer_Config::interrupt3
IfxCcu6_Timer_InterruptConfig interrupt3
Structure for third interrupt configuration.
Definition: IfxCcu6_Timer.h:314
Timer_Config::t13Frequency
float32 t13Frequency
Specify expected T13 PWM frequency in Hertz.
Definition: Timer.h:85
Timer_Config::t13Period
Ifx_TimerValue t13Period
Specify expected T13 PWM period in ticks.
Definition: Timer.h:86
IfxCcu6_setCountingInputMode
IFX_INLINE void IfxCcu6_setCountingInputMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_CountingInputMode mode)
Sets the input event leading to a counting action of Timers (T12 / T13).
Definition: IfxCcu6.h:1958
IfxCcu6_Timer_start
void IfxCcu6_Timer_start(IfxCcu6_Timer *timer)
Starts the timer.
Definition: IfxCcu6_Timer.c:364
IfxCcu6_CountingInputMode_manual
Bit TCTR4.T1xCNT written with 1 is a counting event. The T1x prescaler is not taken into account...
Definition: IfxCcu6.h:128
IfxCcu6_Timer_TriggerConfig::t13ExtInputTrigger
IfxCcu6_T13hr_In * t13ExtInputTrigger
External input signal selection for timer 13.
Definition: IfxCcu6_Timer.h:273
IfxCcu6_setT13CounterValue
IFX_INLINE void IfxCcu6_setT13CounterValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit counter value of Timer13.
Definition: IfxCcu6.h:2103
IfxCcu6_Timer::base
Timer base
Base Timer object.
Definition: IfxCcu6_Timer.h:295
IfxCcu6_Timer_Clock::t12ExtClockEnabled
boolean t12ExtClockEnabled
Timer 12 external clock enable / disable selection.
Definition: IfxCcu6_Timer.h:233
IfxCcu6_T12hr_In
T12HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:112
IfxCcu6_T13hr_In
T13HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:120
IfxCcu6_T13TriggerEvent_noAction
no action
Definition: IfxCcu6.h:321
IfxCcu6_initT13hrPin
IFX_INLINE void IfxCcu6_initT13hrPin(const IfxCcu6_T13hr_In *t13hrIn, IfxPort_InputMode inputMode)
Initialises a T13HR input pin.
Definition: IfxCcu6.h:1899
IfxCcu6_Timer_TriggerConfig::t13InSyncWithT12
boolean t13InSyncWithT12
Selection of Timer 13 start in sync with T12.
Definition: IfxCcu6_Timer.h:275
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxCcu6_Timer_Config::interrupt2
IfxCcu6_Timer_InterruptConfig interrupt2
Structure for second interrupt configuration.
Definition: IfxCcu6_Timer.h:313
IfxCcu6_Timer_Pins
Structure for CCU6 output pin configuration.
Definition: IfxCcu6_Timer.h:282
IfxCcu6_Timer_Config::synchronousOperation
boolean synchronousOperation
Synchronous operation selection (starting / stopping both the timers at the same time) ...
Definition: IfxCcu6_Timer.h:308
IfxCcu6_InterruptSource_t12PeriodMatch
Interrupt enable for T12 period-match.
Definition: IfxCcu6.h:194
IfxCcu6_Timer_Config::timer13
IfxCcu6_Timer_Timer13 timer13
Structure for Timer 13.
Definition: IfxCcu6_Timer.h:311
IfxCcu6_Timer_Timer13::t12SyncDirection
IfxCcu6_T13TriggerDirection t12SyncDirection
Additional information to control trigger event selection.
Definition: IfxCcu6_Timer.h:265
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxCcu6_ServiceRequest_1
Service request output SR1.
Definition: IfxCcu6.h:233
IfxCcu6_Timer_initModule
void IfxCcu6_Timer_initModule(IfxCcu6_Timer *timer, const IfxCcu6_Timer_Config *config)
Initialises the module with default configuration.
Definition: IfxCcu6_Timer.c:76
IfxCcu6_Timer_initModuleConfig
void IfxCcu6_Timer_initModuleConfig(IfxCcu6_Timer_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values.
Definition: IfxCcu6_Timer.c:280
IfxCcu6_setT12InputSignal
void IfxCcu6_setT12InputSignal(Ifx_CCU6 *ccu6, IfxCcu6_T12hr_In *extInput)
selects the actual input signal for the timer inputs.
Definition: IfxCcu6.c:386
IfxCcu6_Timer_Config::base
Timer_Config base
Base configuration.
Definition: IfxCcu6_Timer.h:305
IfxCcu6_disableShadowTransfer
IFX_INLINE void IfxCcu6_disableShadowTransfer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Disables shadow transfers of the timers (T12, T13 individually or together based on the selection) ...
Definition: IfxCcu6.h:1478
IfxCcu6_Timer_TriggerConfig::extInputTriggerMode
IfxCcu6_ExternalTriggerMode extInputTriggerMode
Event of signal T1xHR that can set the run bit T1xR by HW.
Definition: IfxCcu6_Timer.h:274
IfxCcu6_setT13TriggerEventDirection
IFX_INLINE void IfxCcu6_setT13TriggerEventDirection(Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerDirection direction)
Sets the Timer13 trigger event direction.
Definition: IfxCcu6.h:2115
IfxCcu6_Timer_Clock::t13countingInputMode
IfxCcu6_CountingInputMode t13countingInputMode
Input event leading to a counting action of the timer T13.
Definition: IfxCcu6_Timer.h:238
IfxCcu6_setT12PeriodValue
IFX_INLINE void IfxCcu6_setT12PeriodValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the period value that leads Timer12 counter value to a period-match.
Definition: IfxCcu6.h:2091
IfxCcu6_Timer_Config::clock
IfxCcu6_Timer_Clock clock
Structure for clock configuration.
Definition: IfxCcu6_Timer.h:309
IfxCcu6_startTimer
IFX_INLINE void IfxCcu6_startTimer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
starts the timers (T12, T13 individually or together based on the selection)
Definition: IfxCcu6.h:2140
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxCcu6_Timer_InterruptConfig::typeOfService
IfxSrc_Tos typeOfService
type of interrupt service
Definition: IfxCcu6_Timer.h:248
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
IfxCcu6_Timer_Timer13::counterValue
uint16 counterValue
16-bit counter value of Timer13
Definition: IfxCcu6_Timer.h:263
IfxCcu6_setT13PeriodValue
IFX_INLINE void IfxCcu6_setT13PeriodValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the period value that leads Timer13 counter value to a period-match.
Definition: IfxCcu6.h:2109
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxCcu6_enableModule
void IfxCcu6_enableModule(Ifx_CCU6 *ccu6)
Enables the selected CCU6 kernel.
Definition: IfxCcu6.c:145
Timer_Config::waitingTime
Ifx_TimerValue waitingTime
Specify the expected ticks before timer starts (TWAIT)
Definition: Timer.h:87
IfxCcu6_Timer_InterruptConfig::priority
uint16 priority
Interrupt priority.
Definition: IfxCcu6_Timer.h:247
IfxCcu6_setT13Frequency
float32 IfxCcu6_setT13Frequency(Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period)
Sets the frequency and clock input of the Timer 13 Caution: If desired frequency cannot achieved (by ...
Definition: IfxCcu6.c:421
IfxCcu6_ServiceRequest_0
Service request output SR0.
Definition: IfxCcu6.h:232


iLLD_TC38A: IfxCcu6_Timer.h Source File

  • Ccu6
  • Timer
IfxCcu6_Timer.h
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6_Timer.h
3 * \brief CCU6 TIMER details
4 * \ingroup IfxLld_Ccu6
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 * \defgroup IfxLld_Ccu6_Timer_Usage How to use the CCU6 TIMER Interface driver?
43 * \ingroup IfxLld_Ccu6_Timer
44 *
45 * The TIMER interface driver provides a default CCU6 configuration for runnung the selected timer block.
46 *
47 * User can select the various configuration options that hardware allows
48 *
49 * In the following sections it will be described, how to integrate the driver into the application framework.
50 *
51 *
52 * \section IfxLld_Ccu6_Timer_Preparation Preparation
53 *
54 *
55 * \subsection IfxLld_Ccu6_Timer_Include Include Files
56 *
57 * Include following header file into your C code:
58 *
59 * \code
60 * #include <Ccu6/Timer/IfxCcu6_Timer.h>
61 * \endcode
62 *
63 * \subsection IfxLld_Ccu6_Timer_Variables Variables
64 *
65 * Declare the TIMER handle as global variable in your C code:
66 *
67 * \code
68 * // used globally
69 * static IfxCcu6_Timer timer;
70 * \endcode
71 *
72 * \subsection IfxLld_Ccu6_Timer_Interrupt Interrupt Handler Installation
73 *
74 * See also \ref IfxLld_Cpu_Irq_Usage
75 *
76 * Define priority for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:
77 *
78 * \code
79 * // priorities are normally defined in Ifx_IntPrioDef.h
80 * #define IFX_INTPRIO_CCU6 1
81 * \endcode
82 *
83 * Add the interrupt service routine to your C code.
84 *
85 * \code
86 * IFX_INTERRUPT(ccu60ISR_Timer, 0, IFX_INTPRIO_CCU6)
87 * {
88 * //user code
89 * }
90 * \endcode
91 *
92 * Finally install the interrupt handlers in your initialisation function:
93 *
94 * \code
95 * // install interrupt handlers
96 * IfxCpu_Irq_installInterruptHandler(&ccu60ISR_Timer, IFX_INTPRIO_CCU6);
97 * IfxCpu_enableInterrupts();
98 * \endcode
99 *
100 * \subsection IfxLld_Ccu6_Timer_Init Module Initialisation
101 *
102 * The module initialisation can be done in the same function. Here an example:
103 *
104 * \code
105 * // create configuration
106 * IfxCcu6_Timer_Config timerConfig;
107 * IfxCcu6_Timer_initModuleConfig(&timerConfig, &MODULE_CCU60);
108 *
109 * // configure the frequency of the timer in case of internal start
110 * // this frequency will be set for the timer block selected later
111 * timerConfig.base.frequency = 400000;
112 *
113 * // configure the period of the timer
114 * timerConfig.base.period = 100;
115 *
116 * // configure the waiting time in case of delayed T13 start in sync with T12
117 * timerConfig.base.waitingTime = 0;
118 *
119 * // select the timer that needs to be started
120 * timerConfig.timer = IfxCcu6_TimerId_t12;
121 *
122 * // select the synchronous operation if both timers need to be start at the same time
123 * // previous selection of timer block can be ignored in this mode
124 * timerConfig.synchronousOperation = TRUE;
125 *
126 * // configure the clock for internal mode
127 * timerConfig.clock.t12ExtClockEnabled = FALSE;
128 * timerConfig.clock.t12ExtClockInput = NULL_PTR;
129 * timerConfig.clock.t12countingInputMode = IfxCcu6_CountingInputMode_internal;
130 *
131 * // configure the selcted timer block
132 * timerConfig.timer12.countMode = IfxCcu6_T12CountMode_edgeAligned;
133 * timerConfig.timer12.counterValue = 0;
134 *
135 * // configure the interrupts
136 * timerConfig.interrupt1.interruptSource = IfxCcu6_InterruptSource_t12PeriodMatch;
137 * timerConfig.interrupt1.serviceRequest = IfxCcu6_ServiceRequest_2;
138 * timerConfig.interrupt1.priority = IFX_INTRPRIO_CCU6;
139 * timerConfig.interrupt1.typeOfService = IfxSrc_Tos_cpu0;
140 *
141 * // configure input and output triggers
142 * timerConfig.trigger.t12ExtInputTrigger = IfxCcu60_T12HRB_P00_7_IN;
143 * timerConfig.trigger.t13ExtInputTrigger = NULL_PTR;
144 * timerConfig.trigger.extInputTriggerMode = IfxCcu6_ExternalTriggerMode_risingEdge;
145 * timerConfig.trigger.t13InSyncWithT12 = FALSE;
146 *
147 * // initialize the module
148 * IfxCcu6_Timer_initModule(&timer, &timerConfig);
149 * \endcode
150 *
151 *
152 * The Timer is ready for use now!
153 *
154 *
155 * \section IfxLld_Ccu6_Timer_Control Control
156 *
157 *
158 * The TIMER driver provides simple to use timer Control functions
159 *
160 * This means: In addition to start and stop a single timer, you can start and stop both the timer blocks at the same time
161 * you can also run the timer in single shot mode and finally you an manually make the timer count each step
162 *
163 * Start the timer
164 *
165 * \code
166 * IfxCcu6_Timer_start(&timer);
167 * \endcode
168 *
169 * Stop the timer
170 *
171 * \code
172 * IfxCcu6_Timer_stop(&timer);
173 * \endcode
174 *
175 * Start both the timers synchronously, when the synchronousOperation mode is selected in the configuration
176 *
177 * \code
178 * IfxCcu6_Timer_synchronousStart(&timer);
179 * \endcode
180 *
181 * Stop both the timers synchronously, when the synchronousOperation mode is selected in the configuration
182 *
183 * \code
184 * IfxCcu6_Timer_synchronousStop(&timer);
185 * \endcode
186 *
187 * Start the selected timer in single shot mode
188 *
189 * \code
190 * IfxCcu6_Timer_startSingleShotMode(&timer);
191 * \endcode
192 *
193 * Make the timer count each step manually
194 *
195 * \code
196 * uint8 i;
197 * for (i=0; i<50; i++)
198 * {
199 * IfxCcu6_Timer_countOneStep(&timer);
200 * }
201 * \endcode
202 *
203 * \defgroup IfxLld_Ccu6_Timer TIMER Interface driver
204 * \ingroup IfxLld_Ccu6
205 * \defgroup IfxLld_Ccu6_Timer_DataStructures Data Structures
206 * \ingroup IfxLld_Ccu6_Timer
207 * \defgroup IfxLld_Ccu6_Timer_Module_Initialize_Functions Module Initialize Functions
208 * \ingroup IfxLld_Ccu6_Timer
209 * \defgroup IfxLld_Ccu6_Timer_Timer_Control_Functions Timer Control Functions
210 * \ingroup IfxLld_Ccu6_Timer
211 */
212
213 #ifndef IFXCCU6_TIMER_H
214 #define IFXCCU6_TIMER_H 1
215
216 /******************************************************************************/
217 /*----------------------------------Includes----------------------------------*/
218 /******************************************************************************/
219
220 #include "Ccu6/Std/IfxCcu6.h"
221 #include "If/Ccu6If/Timer.h"
222
223 /******************************************************************************/
224 /*-----------------------------Data Structures--------------------------------*/
225 /******************************************************************************/
226
227 /** \addtogroup IfxLld_Ccu6_Timer_DataStructures
228 * \{ */
229 /** \brief Structure for clock configuration
230 */
231 typedef struct
232 {
233 boolean t12ExtClockEnabled; /**< \brief Timer 12 external clock enable / disable selection */
234 IfxCcu6_T12hr_In *t12ExtClockInput; /**< \brief External input signal selection for timer 12 */
235 IfxCcu6_CountingInputMode t12countingInputMode; /**< \brief Input event leading to a counting action of the timer T12 */
236 boolean t13ExtClockEnabled; /**< \brief Timer 13 external clock enable / disable selection */
237 IfxCcu6_T13hr_In *t13ExtClockInput; /**< \brief External input signal selection for timer 13 */
238 IfxCcu6_CountingInputMode t13countingInputMode; /**< \brief Input event leading to a counting action of the timer T13 */
239 } IfxCcu6_Timer_Clock;
240
241 /** \brief Structure for interrupt configuration
242 */
243 typedef struct
244 {
245 IfxCcu6_InterruptSource source; /**< \brief Interrupt source selection */
246 IfxCcu6_ServiceRequest serviceRequest; /**< \brief Selection of service request outputs */
247 uint16 priority; /**< \brief Interrupt priority */
248 IfxSrc_Tos typeOfService; /**< \brief type of interrupt service */
249 } IfxCcu6_Timer_InterruptConfig;
250
251 /** \brief Structure for Timer 12
252 */
253 typedef struct
254 {
255 IfxCcu6_T12CountMode countMode; /**< \brief Operating mode of Timer 12 */
256 uint16 counterValue; /**< \brief 16-bit counter value of Timer12 */
257 } IfxCcu6_Timer_Timer12;
258
259 /** \brief Structure for Timer 13
260 */
261 typedef struct
262 {
263 uint16 counterValue; /**< \brief 16-bit counter value of Timer13 */
264 IfxCcu6_T13TriggerEvent t12SyncEvent; /**< \brief T12 sync trigger event to start T13 */
265 IfxCcu6_T13TriggerDirection t12SyncDirection; /**< \brief Additional information to control trigger event selection */
266 } IfxCcu6_Timer_Timer13;
267
268 /** \brief Configuration structure for external triggers
269 */
270 typedef struct
271 {
272 IfxCcu6_T12hr_In *t12ExtInputTrigger; /**< \brief External input signal selection for timer 12 */
273 IfxCcu6_T13hr_In *t13ExtInputTrigger; /**< \brief External input signal selection for timer 13 */
274 IfxCcu6_ExternalTriggerMode extInputTriggerMode; /**< \brief Event of signal T1xHR that can set the run bit T1xR by HW */
275 boolean t13InSyncWithT12; /**< \brief Selection of Timer 13 start in sync with T12 */
276 } IfxCcu6_Timer_TriggerConfig;
277
278 /** \} */
279
280 /** \brief Structure for CCU6 output pin configuration
281 */
282 typedef struct
283 {
284 IFX_CONST IfxCcu6_T12hr_In *t12hr; /**< \brief T12HR input signal */
285 IFX_CONST IfxCcu6_T13hr_In *t13hr; /**< \brief T13HR input signal */
286 IfxPort_InputMode t1xhrInputMode; /**< \brief The T1xHR pin input mode which should be configured */
287 } IfxCcu6_Timer_Pins;
288
289 /** \addtogroup IfxLld_Ccu6_Timer_DataStructures
290 * \{ */
291 /** \brief Module handle
292 */
293 typedef struct
294 {
295 Timer base; /**< \brief Base Timer object */
296 Ifx_CCU6 *ccu6; /**< \brief Pointer to the base of CCU6 registers */
297 IfxCcu6_TimerId timer; /**< \brief Timer number (T12 / T13) */
298 IfxCcu6_Timer_TriggerConfig trigger; /**< \brief Structure for trigger configuration */
299 } IfxCcu6_Timer;
300
301 /** \brief Configuration structure of the module
302 */
303 typedef struct
304 {
305 Timer_Config base; /**< \brief Base configuration */
306 Ifx_CCU6 *ccu6; /**< \brief Pointer to the base of CCU6 registers */
307 IfxCcu6_TimerId timer; /**< \brief Timer number (T12 / T13) */
308 boolean synchronousOperation; /**< \brief Synchronous operation selection (starting / stopping both the timers at the same time) */
309 IfxCcu6_Timer_Clock clock; /**< \brief Structure for clock configuration */
310 IfxCcu6_Timer_Timer12 timer12; /**< \brief Structure for Timer 12 */
311 IfxCcu6_Timer_Timer13 timer13; /**< \brief Structure for Timer 13 */
312 IfxCcu6_Timer_InterruptConfig interrupt1; /**< \brief Structure for first interrupt configuration */
313 IfxCcu6_Timer_InterruptConfig interrupt2; /**< \brief Structure for second interrupt configuration */
314 IfxCcu6_Timer_InterruptConfig interrupt3; /**< \brief Structure for third interrupt configuration */
315 IfxCcu6_Timer_InterruptConfig interrupt4; /**< \brief Structure for fourth interrupt configuration */
316 IfxCcu6_Timer_TriggerConfig trigger; /**< \brief Structure for trigger configuration */
317 IfxCcu6_Timer_Pins *pins; /**< \brief Structure for CCU6 output pin configuration */
318 } IfxCcu6_Timer_Config;
319
320 /** \} */
321
322 /** \addtogroup IfxLld_Ccu6_Timer_Module_Initialize_Functions
323 * \{ */
324
325 /******************************************************************************/
326 /*-------------------------Global Function Prototypes-------------------------*/
327 /******************************************************************************/
328
329 /** \brief Initialises the module with default configuration
330 * \param timer Module handle
331 * \param config Configuration structure of the module
332 * \return None
333 *
334 * A coding example can be found in \ref IfxLld_Ccu6_Timer_Usage
335 *
336 */
337 IFX_EXTERN void IfxCcu6_Timer_initModule(IfxCcu6_Timer *timer, const IfxCcu6_Timer_Config *config);
338
339 /** \brief Fills the config structure with default values
340 * \param config Configuration structure of the module
341 * \param ccu6 Pointer to the base of CCU6 registers
342 * \return None
343 *
344 * A coding example can be found in \ref IfxLld_Ccu6_Timer_Usage
345 *
346 */
347 IFX_EXTERN void IfxCcu6_Timer_initModuleConfig(IfxCcu6_Timer_Config *config, Ifx_CCU6 *ccu6);
348
349 /** \} */
350
351 /** \addtogroup IfxLld_Ccu6_Timer_Timer_Control_Functions
352 * \{ */
353
354 /******************************************************************************/
355 /*-------------------------Global Function Prototypes-------------------------*/
356 /******************************************************************************/
357
358 /** \brief Counts the timer one step
359 * \param timer Module handle
360 * \return None
361 *
362 * A coding example can be found in \ref IfxLld_Ccu6_Timer_Usage
363 *
364 */
365 IFX_EXTERN void IfxCcu6_Timer_countOneStep(IfxCcu6_Timer *timer);
366
367 /** \brief Starts the timer
368 * \param timer Module handle
369 * \return None
370 *
371 * A coding example can be found in \ref IfxLld_Ccu6_Timer_Usage
372 *
373 */
374 IFX_EXTERN void IfxCcu6_Timer_start(IfxCcu6_Timer *timer);
375
376 /** \brief Starts the single shot mode of the timer
377 * \param timer Module handle
378 * \return None
379 *
380 * A coding example can be found in \ref IfxLld_Ccu6_Timer_Usage
381 *
382 */
383 IFX_EXTERN void IfxCcu6_Timer_startSingleShotMode(IfxCcu6_Timer *timer);
384
385 /** \brief Stops the timer
386 * \param timer Module handle
387 * \return None
388 *
389 * A coding example can be found in \ref IfxLld_Ccu6_Timer_Usage
390 *
391 */
392 IFX_EXTERN void IfxCcu6_Timer_stop(IfxCcu6_Timer *timer);
393
394 /** \brief Starts both the timers together
395 * \param timer Module handle
396 * \return None
397 *
398 * A coding example can be found in \ref IfxLld_Ccu6_Timer_Usage
399 *
400 */
401 IFX_EXTERN void IfxCcu6_Timer_synchronousStart(IfxCcu6_Timer *timer);
402
403 /** \brief Starts both the timers together
404 * \param timer Module handle
405 * \return None
406 *
407 * A coding example can be found in \ref IfxLld_Ccu6_Timer_Usage
408 *
409 */
410 IFX_EXTERN void IfxCcu6_Timer_synchronousStop(IfxCcu6_Timer *timer);
411
412 /** \} */
413
414 #endif /* IFXCCU6_TIMER_H */
IfxCcu6_Timer_synchronousStart
IFX_EXTERN void IfxCcu6_Timer_synchronousStart(IfxCcu6_Timer *timer)
Starts both the timers together.
Definition: IfxCcu6_Timer.c:524
IfxCcu6_Timer_Config::pins
IfxCcu6_Timer_Pins * pins
Structure for CCU6 output pin configuration.
Definition: IfxCcu6_Timer.h:317
IfxCcu6_Timer_InterruptConfig
Structure for interrupt configuration.
Definition: IfxCcu6_Timer.h:243
IfxCcu6_Timer_Config::interrupt1
IfxCcu6_Timer_InterruptConfig interrupt1
Structure for first interrupt configuration.
Definition: IfxCcu6_Timer.h:312
IfxCcu6_Timer_Clock
Structure for clock configuration.
Definition: IfxCcu6_Timer.h:231
IfxCcu6_Timer_Clock::t13ExtClockEnabled
boolean t13ExtClockEnabled
Timer 13 external clock enable / disable selection.
Definition: IfxCcu6_Timer.h:236
IfxCcu6_Timer_Config::interrupt4
IfxCcu6_Timer_InterruptConfig interrupt4
Structure for fourth interrupt configuration.
Definition: IfxCcu6_Timer.h:315
IfxCcu6_InterruptSource
IfxCcu6_InterruptSource
Interrupt source selection Description in Ifx_CCU.IEN.
Definition: IfxCcu6.h:179
IfxCcu6_Timer_Clock::t13ExtClockInput
IfxCcu6_T13hr_In * t13ExtClockInput
External input signal selection for timer 13.
Definition: IfxCcu6_Timer.h:237
IfxCcu6_Timer_TriggerConfig::t12ExtInputTrigger
IfxCcu6_T12hr_In * t12ExtInputTrigger
External input signal selection for timer 12.
Definition: IfxCcu6_Timer.h:272
IfxCcu6_Timer_countOneStep
IFX_EXTERN void IfxCcu6_Timer_countOneStep(IfxCcu6_Timer *timer)
Counts the timer one step.
Definition: IfxCcu6_Timer.c:53
IfxCcu6_Timer_Timer12::countMode
IfxCcu6_T12CountMode countMode
Operating mode of Timer 12.
Definition: IfxCcu6_Timer.h:255
IfxCcu6_Timer::trigger
IfxCcu6_Timer_TriggerConfig trigger
Structure for trigger configuration.
Definition: IfxCcu6_Timer.h:298
IfxCcu6_Timer_InterruptConfig::source
IfxCcu6_InterruptSource source
Interrupt source selection.
Definition: IfxCcu6_Timer.h:245
IfxCcu6_T13TriggerDirection
IfxCcu6_T13TriggerDirection
Delivers additional information to control the automatic set of bit T13R in the case that the trigger...
Definition: IfxCcu6.h:308
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxCcu6_Timer_Config
Configuration structure of the module.
Definition: IfxCcu6_Timer.h:303
IfxCcu6_Timer
Module handle.
Definition: IfxCcu6_Timer.h:293
IfxCcu6_Timer_Pins::t1xhrInputMode
IfxPort_InputMode t1xhrInputMode
The T1xHR pin input mode which should be configured.
Definition: IfxCcu6_Timer.h:286
Timer_Config
Configuration structure of the Timer interface.
Definition: Timer.h:81
IfxCcu6_Timer_Config::timer12
IfxCcu6_Timer_Timer12 timer12
Structure for Timer 12.
Definition: IfxCcu6_Timer.h:310
IfxCcu6_Timer_startSingleShotMode
IFX_EXTERN void IfxCcu6_Timer_startSingleShotMode(IfxCcu6_Timer *timer)
Starts the single shot mode of the timer.
Definition: IfxCcu6_Timer.c:419
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxCcu6_Timer_stop
IFX_EXTERN void IfxCcu6_Timer_stop(IfxCcu6_Timer *timer)
Stops the timer.
Definition: IfxCcu6_Timer.c:479
IfxCcu6_Timer::timer
IfxCcu6_TimerId timer
Timer number (T12 / T13)
Definition: IfxCcu6_Timer.h:297
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxCcu6_Timer_Pins::t13hr
IFX_CONST IfxCcu6_T13hr_In * t13hr
T13HR input signal.
Definition: IfxCcu6_Timer.h:285
IfxCcu6_CountingInputMode
IfxCcu6_CountingInputMode
Defines the input event leading to a counting action of the timer (T12 / T13) Definition in Ifx_CCU...
Definition: IfxCcu6.h:124
IfxCcu6_Timer_Timer13::t12SyncEvent
IfxCcu6_T13TriggerEvent t12SyncEvent
T12 sync trigger event to start T13.
Definition: IfxCcu6_Timer.h:264
IfxCcu6_Timer_synchronousStop
IFX_EXTERN void IfxCcu6_Timer_synchronousStop(IfxCcu6_Timer *timer)
Starts both the timers together.
Definition: IfxCcu6_Timer.c:534
Timer.h
Timer interface.
Timer_s
Structure of the Timer interface.
Definition: Timer.h:69
IfxCcu6_Timer_InterruptConfig::serviceRequest
IfxCcu6_ServiceRequest serviceRequest
Selection of service request outputs.
Definition: IfxCcu6_Timer.h:246
IfxCcu6.h
CCU6 basic functionality.
IfxCcu6_ServiceRequest
IfxCcu6_ServiceRequest
Selection of service request outputs.
Definition: IfxCcu6.h:230
IfxCcu6_T13TriggerEvent
IfxCcu6_T13TriggerEvent
Selects the trigger event to start T13 (automatic set of T13R for synchronization to T12 compare sign...
Definition: IfxCcu6.h:319
IfxCcu6_Timer_Clock::t12ExtClockInput
IfxCcu6_T12hr_In * t12ExtClockInput
External input signal selection for timer 12.
Definition: IfxCcu6_Timer.h:234
IfxCcu6_Timer_Timer12
Structure for Timer 12.
Definition: IfxCcu6_Timer.h:253
IfxCcu6_Timer_Timer13
Structure for Timer 13.
Definition: IfxCcu6_Timer.h:261
IfxCcu6_TimerId
IfxCcu6_TimerId
Timer number ( T12 / T13 )
Definition: IfxCcu6.h:334
IfxCcu6_Timer_Clock::t12countingInputMode
IfxCcu6_CountingInputMode t12countingInputMode
Input event leading to a counting action of the timer T12.
Definition: IfxCcu6_Timer.h:235
IfxCcu6_Timer_Pins::t12hr
IFX_CONST IfxCcu6_T12hr_In * t12hr
T12HR input signal.
Definition: IfxCcu6_Timer.h:284
IfxCcu6_T12CountMode
IfxCcu6_T12CountMode
Operating mode of Timer 12 Definition in Ifx_CCU.TCTR0.B.CTM.
Definition: IfxCcu6.h:297
IfxCcu6_Timer::ccu6
Ifx_CCU6 * ccu6
Pointer to the base of CCU6 registers.
Definition: IfxCcu6_Timer.h:296
IfxCcu6_Timer_Config::interrupt3
IfxCcu6_Timer_InterruptConfig interrupt3
Structure for third interrupt configuration.
Definition: IfxCcu6_Timer.h:314
IfxCcu6_Timer_start
IFX_EXTERN void IfxCcu6_Timer_start(IfxCcu6_Timer *timer)
Starts the timer.
Definition: IfxCcu6_Timer.c:364
IfxCcu6_Timer_TriggerConfig::t13ExtInputTrigger
IfxCcu6_T13hr_In * t13ExtInputTrigger
External input signal selection for timer 13.
Definition: IfxCcu6_Timer.h:273
IfxCcu6_ExternalTriggerMode
IfxCcu6_ExternalTriggerMode
Defines the event of signal T1xHR that can set the run bit T1xR by HW Definition in Ifx_CCU...
Definition: IfxCcu6.h:149
IfxCcu6_Timer::base
Timer base
Base Timer object.
Definition: IfxCcu6_Timer.h:295
IfxCcu6_Timer_Clock::t12ExtClockEnabled
boolean t12ExtClockEnabled
Timer 12 external clock enable / disable selection.
Definition: IfxCcu6_Timer.h:233
IfxCcu6_T12hr_In
T12HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:112
IfxCcu6_T13hr_In
T13HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:120
IfxCcu6_Timer_TriggerConfig::t13InSyncWithT12
boolean t13InSyncWithT12
Selection of Timer 13 start in sync with T12.
Definition: IfxCcu6_Timer.h:275
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxCcu6_Timer_Config::interrupt2
IfxCcu6_Timer_InterruptConfig interrupt2
Structure for second interrupt configuration.
Definition: IfxCcu6_Timer.h:313
IfxCcu6_Timer_Pins
Structure for CCU6 output pin configuration.
Definition: IfxCcu6_Timer.h:282
IfxCcu6_Timer_Config::synchronousOperation
boolean synchronousOperation
Synchronous operation selection (starting / stopping both the timers at the same time) ...
Definition: IfxCcu6_Timer.h:308
IfxCcu6_Timer_Config::timer13
IfxCcu6_Timer_Timer13 timer13
Structure for Timer 13.
Definition: IfxCcu6_Timer.h:311
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:81
IfxCcu6_Timer_Timer13::t12SyncDirection
IfxCcu6_T13TriggerDirection t12SyncDirection
Additional information to control trigger event selection.
Definition: IfxCcu6_Timer.h:265
IfxCcu6_Timer_initModule
IFX_EXTERN void IfxCcu6_Timer_initModule(IfxCcu6_Timer *timer, const IfxCcu6_Timer_Config *config)
Initialises the module with default configuration.
Definition: IfxCcu6_Timer.c:76
IfxCcu6_Timer_initModuleConfig
IFX_EXTERN void IfxCcu6_Timer_initModuleConfig(IfxCcu6_Timer_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values.
Definition: IfxCcu6_Timer.c:280
IfxCcu6_Timer_Config::base
Timer_Config base
Base configuration.
Definition: IfxCcu6_Timer.h:305
IfxCcu6_Timer_TriggerConfig::extInputTriggerMode
IfxCcu6_ExternalTriggerMode extInputTriggerMode
Event of signal T1xHR that can set the run bit T1xR by HW.
Definition: IfxCcu6_Timer.h:274
IfxCcu6_Timer_Clock::t13countingInputMode
IfxCcu6_CountingInputMode t13countingInputMode
Input event leading to a counting action of the timer T13.
Definition: IfxCcu6_Timer.h:238
IfxCcu6_Timer_Config::clock
IfxCcu6_Timer_Clock clock
Structure for clock configuration.
Definition: IfxCcu6_Timer.h:309
IfxCcu6_Timer_InterruptConfig::typeOfService
IfxSrc_Tos typeOfService
type of interrupt service
Definition: IfxCcu6_Timer.h:248
IfxCcu6_Timer_Timer12::counterValue
uint16 counterValue
16-bit counter value of Timer12
Definition: IfxCcu6_Timer.h:256
IfxCcu6_Timer_TriggerConfig
Configuration structure for external triggers.
Definition: IfxCcu6_Timer.h:270
IfxCcu6_Timer_InterruptConfig::priority
uint16 priority
Interrupt priority.
Definition: IfxCcu6_Timer.h:247


iLLD_TC38A: IfxCcu6_TimerWithTrigger.c Source File

  • Ccu6
  • TimerWithTrigger
IfxCcu6_TimerWithTrigger.c
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6_TimerWithTrigger.c
3 * \brief CCU6 TIMERWITHTRIGGER details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxCcu6_TimerWithTrigger.h"
47 #include "_Utilities/Ifx_Assert.h"
48 #include "stddef.h"
49 #include "string.h"
50
51 /******************************************************************************/
52 /*-------------------------Function Implementations---------------------------*/
53 /******************************************************************************/
54
55 boolean IfxCcu6_TimerWithTrigger_acknowledgeTimerIrq(IfxCcu6_TimerWithTrigger *driver)
56 {
57 boolean event;
58 event = IfxCcu6_isT12OneNotification(driver->ccu6);
59
60 if (event)
61 {
62 IfxCcu6_clearT12OneNotification(driver->ccu6);
63 }
64 else
65 {}
66
67 return event;
68 }
69
70
71 boolean IfxCcu6_TimerWithTrigger_acknowledgeTriggerIrq(IfxCcu6_TimerWithTrigger *driver)
72 {
73 boolean event;
74 event = IfxCcu6_isT13CompareNotification(driver->ccu6);
75
76 if (event)
77 {
78 IfxCcu6_clearT13CompareNotification(driver->ccu6);
79 }
80 else
81 {}
82
83 return event;
84 }
85
86
87 void IfxCcu6_TimerWithTrigger_applyUpdate(IfxCcu6_TimerWithTrigger *driver)
88 {
89 IfxCcu6_enableShadowTransfer(driver->ccu6, TRUE, TRUE);
90 }
91
92
93 void IfxCcu6_TimerWithTrigger_disableUpdate(IfxCcu6_TimerWithTrigger *driver)
94 {
95 IFX_UNUSED_PARAMETER(driver)
96 }
97
98
99 float32 IfxCcu6_TimerWithTrigger_getFrequency(IfxCcu6_TimerWithTrigger *driver)
100 {
101 return 1.0 / IfxStdIf_Timer_tickToS(driver->base.clockFreq, driver->base.period);
102 }
103
104
105 float32 IfxCcu6_TimerWithTrigger_getInputFrequency(IfxCcu6_TimerWithTrigger *driver)
106 {
107 return driver->base.clockFreq;
108 }
109
110
111 Ifx_TimerValue IfxCcu6_TimerWithTrigger_getPeriod(IfxCcu6_TimerWithTrigger *driver)
112 {
113 return driver->base.period;
114 }
115
116
117 volatile uint32 *IfxCcu6_TimerWithTrigger_getPointer(IfxCcu6_TimerWithTrigger *driver)
118 {
119 return IfxCcu6_getT12TimerPointer(driver->ccu6);
120 }
121
122
123 float32 IfxCcu6_TimerWithTrigger_getResolution(IfxCcu6_TimerWithTrigger *driver)
124 {
125 return 1.0 / driver->base.clockFreq;
126 }
127
128
129 boolean IfxCcu6_TimerWithTrigger_init(IfxCcu6_TimerWithTrigger *driver, IfxCcu6_TimerWithTrigger_Config *config)
130 {
131 boolean result = TRUE;
132 IfxCcu6_TimerWithTrigger_Base *base = &driver->base;
133 Ifx_CCU6 *module;
134
135 driver->ccu6 = config->ccu6;
136 module = driver->ccu6;
137
138 base->triggerEnabled = config->base.trigger.enabled;
139
140 /** - Enable/initialise the CCU6 if it has not been enabled. See IfxCcu6_isModuleEnabled() */
141 if (IfxCcu6_isModuleEnabled(module) == FALSE)
142 {
143 IfxCcu6_enableModule(module);
144 }
145
146 /* Initialize the timer part */
147 IfxCcu6_setT12CountMode(module, (config->base.countDir == IfxStdIf_Timer_CountDir_upAndDown) ? IfxCcu6_T12CountMode_centerAligned : IfxCcu6_T12CountMode_edgeAligned);
148
149 driver->base.countDir = config->base.countDir;
150
151 uint16 prescaler;
152 float32 freqT12 = 0, periodT12;
153 float32 freqCC6 = (float32)IfxScuCcu_getSpbFrequency();
154
155 for (prescaler = 0; prescaler < 16; prescaler++)
156 {
157 freqT12 = freqCC6 / (1U << prescaler);
158 periodT12 = freqT12 / config->base.frequency;
159
160 if ((periodT12 <= 16386.0) && (periodT12 > config->base.minResolution))
161 {
162 break;
163 }
164 }
165
166 if (prescaler < 16)
167 {
168 Ifx_CCU6_TCTR0 tctr0;
169 tctr0.U = module->TCTR0.U;
170 tctr0.B.T12CLK = (prescaler & 0x7U);
171 tctr0.B.T12PRE = ((prescaler & 0x8U) != 0);
172 module->TCTR0.U = tctr0.U;
173 }
174 else
175 {
176 /** \retval IfxCcu6_Stat_wrongPwmFreq if the T12 prescaler can't fulfill the
177 * required frequency */
178 result = FALSE;
179 }
180
181 IfxCcu6_TimerWithTrigger_updateInputFrequency(driver);
182
183 if ((config->base.minResolution > 0) && ((1.0 / base->clockFreq) > config->base.minResolution))
184 {
185 result = FALSE;
186 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
187 }
188 else
189 {}
190
191 IfxCcu6_TimerWithTrigger_setFrequency(driver, config->base.frequency);
192 /* Initialize the trigger part */
193
194 /** - The T13 is used to generate additional PWM for internal trigger purpose (e.g.
195 * ADC) or external trigger purpose (e.g. sensor synchronisation). */
196
197 if (base->triggerEnabled)
198 {
199 Ifx_CCU6_TCTR0 tctr0 = module->TCTR0;
200 module->TCTR0.B.T13CLK = tctr0.B.T12CLK;
201 module->TCTR0.B.T13PRE = tctr0.B.T12PRE;
202 IfxCcu6_setT13PeriodValue(module, (uint16)(base->period - 1));
203
204 module->MODCTR.B.T13MODEN = 0;
205 IfxCcu6_enableModulationOutput(module, IfxCcu6_TimerId_t13, IfxCcu6_ChannelOut_cout3);
206
207 IfxCcu6_setOutputPassiveLevel(module, IfxCcu6_ChannelOut_cout3, config->base.trigger.risingEdgeAtPeriod);
208
209 IfxCcu6_setSingleShotModeEnable(module, FALSE, TRUE);
210
211 IfxCcu6_setT13TriggerEventMode(module, IfxCcu6_T13TriggerEvent_onT12Zero);
212 IfxCcu6_setT13TriggerEventDirection(module, IfxCcu6_T13TriggerDirection_onT12CountingUp);
213
214 if (config->base.trigger.outputEnabled)
215 {
216 if (config->triggerOut != NULL_PTR)
217 {
218 /*Initialize the port */
219 IfxCcu6_initCout63Pin(config->triggerOut, config->base.trigger.outputMode, config->base.trigger.outputDriver);
220 }
221 else
222 {
223 result = FALSE;
224 }
225 }
226 else
227 {}
228
229 IfxCcu6_TimerWithTrigger_setTrigger(driver, config->base.trigger.triggerPoint);
230 }
231 else
232 {}
233
234 /* Interrupt configuration */
235 {
236 boolean timerHasIrq = config->base.isrPriority > 0;
237 boolean triggerHasIrq = (config->base.trigger.isrPriority > 0) && base->triggerEnabled;
238
239 if (timerHasIrq || triggerHasIrq)
240 {
241 volatile Ifx_SRC_SRCR *src;
242
243 IfxCcu6_clearInterruptStatusFlag(module, IfxCcu6_InterruptSource_t12PeriodMatch);
244 IfxCcu6_clearInterruptStatusFlag(module, IfxCcu6_InterruptSource_t12OneMatch);
245 IfxCcu6_clearInterruptStatusFlag(module, IfxCcu6_InterruptSource_t13CompareMatch);
246
247 if (timerHasIrq)
248 {
249 if (config->base.countDir == IfxStdIf_Timer_CountDir_upAndDown)
250 {
251 IfxCcu6_enableInterrupt(module, IfxCcu6_InterruptSource_t12OneMatch); /* full period */
252 }
253 else
254 {
255 IfxCcu6_enableInterrupt(module, IfxCcu6_InterruptSource_t12PeriodMatch); /* half-period*/
256 }
257
258 module->INP.B.INPT12 = config->serviceReqNrPeriod;
259 src = IfxCcu6_getSrcAddress(module, config->serviceReqNrPeriod);
260 IfxSrc_init(src, config->base.isrProvider, config->base.isrPriority);
261 IfxSrc_enable(src);
262 }
263
264 if (triggerHasIrq)
265 {
266 IfxCcu6_enableInterrupt(module, IfxCcu6_InterruptSource_t13CompareMatch); /* trigger event */
267 module->INP.B.INPT13 = config->serviceReqNrTrigger;
268
269 src = IfxCcu6_getSrcAddress(module, config->serviceReqNrTrigger);
270 IfxSrc_init(src, config->base.trigger.isrProvider, config->base.trigger.isrPriority);
271 IfxSrc_enable(src);
272 }
273 }
274 }
275
276 /* Transfer the shadow registers */
277 IfxCcu6_TimerWithTrigger_applyUpdate(driver);
278 return result;
279 }
280
281
282 void IfxCcu6_TimerWithTrigger_initConfig(IfxCcu6_TimerWithTrigger_Config *config, Ifx_CCU6 *ccu6)
283 {
284 IfxStdIf_Timer_initConfig(&config->base);
285 config->ccu6 = ccu6;
286 config->serviceReqNrPeriod = IfxCcu6_ServiceRequest_0;
287 config->serviceReqNrTrigger = IfxCcu6_ServiceRequest_1;
288 config->triggerOut = NULL_PTR;
289 }
290
291
292 void IfxCcu6_TimerWithTrigger_run(IfxCcu6_TimerWithTrigger *driver)
293 {
294 IfxCcu6_startTimer(driver->ccu6, TRUE, FALSE);
295 }
296
297
298 boolean IfxCcu6_TimerWithTrigger_setFrequency(IfxCcu6_TimerWithTrigger *driver, float32 frequency)
299 {
300 Ifx_TimerValue period = IfxStdIf_Timer_sToTick(driver->base.clockFreq, 1.0 / frequency);
301
302 return IfxCcu6_TimerWithTrigger_setPeriod(driver, period);
303 }
304
305
306 boolean IfxCcu6_TimerWithTrigger_setPeriod(IfxCcu6_TimerWithTrigger *driver, Ifx_TimerValue period)
307 {
308 driver->base.period = period;
309 IfxCcu6_setT12PeriodValue(driver->ccu6, (uint16)((driver->ccu6->TCTR0.B.CTM == 1) ?
310 ((period / 2) - 1) : (period - 1)));
311
312 return TRUE;
313 }
314
315
316 void IfxCcu6_TimerWithTrigger_setSingleMode(IfxCcu6_TimerWithTrigger *driver, boolean enabled)
317 {
318 if (enabled)
319 {
320 IfxCcu6_enableSingleShotMode(driver->ccu6, IfxCcu6_TimerId_t12);
321 }
322 else
323 {
324 IfxCcu6_disableSingleShotMode(driver->ccu6, IfxCcu6_TimerId_t12);
325 }
326 }
327
328
329 void IfxCcu6_TimerWithTrigger_setTrigger(IfxCcu6_TimerWithTrigger *driver, Ifx_TimerValue triggerPoint)
330 {
331 driver->ccu6->CC63SR.U = triggerPoint;
332 }
333
334
335 boolean IfxCcu6_TimerWithTrigger_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxCcu6_TimerWithTrigger *driver)
336 {
337 /* Ensure the stdif is reset to zeros */
338 memset(stdif, 0, sizeof(IfxStdIf_Timer));
339
340 /* *INDENT-OFF* Note: this file was indented manually by the author. */
341 /* Set the API link */
342 stdif->driver = driver;
343 stdif->getFrequency =(IfxStdIf_Timer_GetFrequency )&IfxCcu6_TimerWithTrigger_getFrequency;
344 stdif->getPeriod =(IfxStdIf_Timer_GetPeriod )&IfxCcu6_TimerWithTrigger_getPeriod;
345 stdif->getResolution =(IfxStdIf_Timer_GetResolution )&IfxCcu6_TimerWithTrigger_getResolution;
346 stdif->setFrequency =(IfxStdIf_Timer_SetFrequency )&IfxCcu6_TimerWithTrigger_setFrequency;
347 stdif->updateInputFrequency =(IfxStdIf_Timer_UpdateInputFrequency)&IfxCcu6_TimerWithTrigger_updateInputFrequency;
348 stdif->applyUpdate =(IfxStdIf_Timer_ApplyUpdate )&IfxCcu6_TimerWithTrigger_applyUpdate;
349 stdif->disableUpdate =(IfxStdIf_Timer_DisableUpdate )&IfxCcu6_TimerWithTrigger_disableUpdate;
350 stdif->getInputFrequency =(IfxStdIf_Timer_GetInputFrequency )&IfxCcu6_TimerWithTrigger_getInputFrequency;
351 stdif->run =(IfxStdIf_Timer_Run )&IfxCcu6_TimerWithTrigger_run;
352 stdif->setPeriod =(IfxStdIf_Timer_SetPeriod )&IfxCcu6_TimerWithTrigger_setPeriod;
353 stdif->setSingleMode =(IfxStdIf_Timer_SetSingleMode )&IfxCcu6_TimerWithTrigger_setSingleMode;
354 stdif->setTrigger =(IfxStdIf_Timer_SetTrigger )&IfxCcu6_TimerWithTrigger_setTrigger;
355 stdif->stop =(IfxStdIf_Timer_Stop )&IfxCcu6_TimerWithTrigger_stop;
356 stdif->ackTimerIrq =(IfxStdIf_Timer_AckTimerIrq )&IfxCcu6_TimerWithTrigger_acknowledgeTimerIrq;
357 stdif->ackTriggerIrq =(IfxStdIf_Timer_AckTriggerIrq )&IfxCcu6_TimerWithTrigger_acknowledgeTriggerIrq;
358 /* *INDENT-ON* */
359
360 return TRUE;
361 }
362
363
364 void IfxCcu6_TimerWithTrigger_stop(IfxCcu6_TimerWithTrigger *driver)
365 {
366 IfxCcu6_stopTimer(driver->ccu6, TRUE, TRUE);
367 }
368
369
370 void IfxCcu6_TimerWithTrigger_updateInputFrequency(IfxCcu6_TimerWithTrigger *driver)
371 {
372 uint16 prescaler;
373 prescaler = driver->ccu6->TCTR0.B.T12CLK;
374
375 driver->base.clockFreq = IfxScuCcu_getSpbFrequency() / (1U << prescaler);
376 }
IfxCcu6_TimerWithTrigger_Config::base
IfxStdIf_Timer_Config base
Standard interface timer configuration.
Definition: IfxCcu6_TimerWithTrigger.h:97
IfxCcu6_stopTimer
IFX_INLINE void IfxCcu6_stopTimer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
starts the timers (T12, T13 individually or together based on the selection)
Definition: IfxCcu6.h:2150
IfxCcu6_TimerWithTrigger::base
IfxCcu6_TimerWithTrigger_Base base
Timer base structure.
Definition: IfxCcu6_TimerWithTrigger.h:89
IfxCcu6_TimerWithTrigger_setPeriod
boolean IfxCcu6_TimerWithTrigger_setPeriod(IfxCcu6_TimerWithTrigger *driver, Ifx_TimerValue period)
Sets the period for the timer.
Definition: IfxCcu6_TimerWithTrigger.c:306
IfxCcu6_TimerWithTrigger_disableUpdate
void IfxCcu6_TimerWithTrigger_disableUpdate(IfxCcu6_TimerWithTrigger *driver)
Disables the upadte This function is has an empty body as the updated is disabled automatically after...
Definition: IfxCcu6_TimerWithTrigger.c:93
IfxCcu6_clearT13CompareNotification
IFX_INLINE void IfxCcu6_clearT13CompareNotification(Ifx_CCU6 *ccu6)
Clears the T13 compare notification.
Definition: IfxCcu6.h:1437
IfxScuCcu_getSpbFrequency
float32 IfxScuCcu_getSpbFrequency(void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider...
Definition: IfxScuCcu.c:479
IfxStdIf_Timer_Config::isrProvider
IfxSrc_Tos isrProvider
Interrupt service provider for the timer interrupt.
Definition: IfxStdIf_Timer.h:276
IfxCcu6_getSrcAddress
volatile Ifx_SRC_SRCR * IfxCcu6_getSrcAddress(Ifx_CCU6 *ccu6, IfxCcu6_ServiceRequest serviceRequest)
Returns the service request register.
Definition: IfxCcu6.c:207
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxStdIf_Timer_GetFrequency
float32(* IfxStdIf_Timer_GetFrequency)(IfxStdIf_InterfaceDriver stdIf)
Return the timer frequency in Hz.
Definition: IfxStdIf_Timer.h:99
IfxCcu6_TimerWithTrigger_acknowledgeTriggerIrq
boolean IfxCcu6_TimerWithTrigger_acknowledgeTriggerIrq(IfxCcu6_TimerWithTrigger *driver)
Returns the trigger event.
Definition: IfxCcu6_TimerWithTrigger.c:71
IfxCcu6_T12CountMode_edgeAligned
T12 always counts up and continues counting from zero after reaching the period value.
Definition: IfxCcu6.h:299
IfxCcu6_TimerWithTrigger_Config::serviceReqNrPeriod
IfxCcu6_ServiceRequest serviceReqNrPeriod
Service request used for the period.
Definition: IfxCcu6_TimerWithTrigger.h:100
IfxStdIf_Timer_AckTriggerIrq
boolean(* IfxStdIf_Timer_AckTriggerIrq)(IfxStdIf_InterfaceDriver stdIf)
Return the trigger interrupt flag and reset it.
Definition: IfxStdIf_Timer.h:233
IfxStdIf_Timer_UpdateInputFrequency
void(* IfxStdIf_Timer_UpdateInputFrequency)(IfxStdIf_InterfaceDriver stdIf)
Indicates the stdIf that the imput frequency has changed and that it should be taken in account...
Definition: IfxStdIf_Timer.h:131
IfxCcu6_setT13TriggerEventMode
IFX_INLINE void IfxCcu6_setT13TriggerEventMode(Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerEvent mode)
Sets the trigger event to start Timer13 (automatic set of T13R for synchronization to Timer12 compare...
Definition: IfxCcu6.h:2121
IfxStdIf_Timer_::stop
IfxStdIf_Timer_Stop stop
Definition: IfxStdIf_Timer.h:253
IfxStdIf_Timer_::setSingleMode
IfxStdIf_Timer_SetSingleMode setSingleMode
Definition: IfxStdIf_Timer.h:251
IfxCcu6_InterruptSource_t13CompareMatch
Interrupt enable for T13 compare-match.
Definition: IfxCcu6.h:195
IfxStdIf_Timer_::driver
IfxStdIf_InterfaceDriver driver
Interface driver object.
Definition: IfxStdIf_Timer.h:239
IfxCcu6_TimerWithTrigger_Base::countDir
IfxStdIf_Timer_CountDir countDir
Timer counting mode.
Definition: IfxCcu6_TimerWithTrigger.h:80
memset
void * memset(void *s, int c, syze_t n)
IfxStdIf_Timer_tickToS
IFX_INLINE float32 IfxStdIf_Timer_tickToS(float32 clockFreq, Ifx_TimerValue ticks)
Convert timer ticks to seconds.
Definition: IfxStdIf_Timer.h:435
IfxStdIf_Timer_TrigConfig::outputDriver
IfxPort_PadDriver outputDriver
Output pad driver.
Definition: IfxStdIf_Timer.h:266
IfxCcu6_TimerWithTrigger_getPointer
volatile uint32 * IfxCcu6_TimerWithTrigger_getPointer(IfxCcu6_TimerWithTrigger *driver)
Returns the pointer to timer channel.
Definition: IfxCcu6_TimerWithTrigger.c:117
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxStdIf_Timer_SetFrequency
boolean(* IfxStdIf_Timer_SetFrequency)(IfxStdIf_InterfaceDriver stdIf, float32 frequency)
Set the timer frequency in Hz.
Definition: IfxStdIf_Timer.h:125
IfxStdIf_Timer_sToTick
IFX_INLINE Ifx_TimerValue IfxStdIf_Timer_sToTick(float32 clockFreq, float32 seconds)
Convert seconds to timer ticks.
Definition: IfxStdIf_Timer.h:446
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
float32
float float32
Definition: Platform_Types.h:170
IfxCcu6_TimerWithTrigger_getResolution
float32 IfxCcu6_TimerWithTrigger_getResolution(IfxCcu6_TimerWithTrigger *driver)
Returns the resolution.
Definition: IfxCcu6_TimerWithTrigger.c:123
IfxStdIf_Timer_
Standard interface object.
Definition: IfxStdIf_Timer.h:237
Ifx_Assert.h
Assert functions.
IfxCcu6_TimerWithTrigger_setSingleMode
void IfxCcu6_TimerWithTrigger_setSingleMode(IfxCcu6_TimerWithTrigger *driver, boolean enabled)
Sets the single shot mode of the timer.
Definition: IfxCcu6_TimerWithTrigger.c:316
IfxCcu6_TimerWithTrigger
CCU6 Timer interface.
Definition: IfxCcu6_TimerWithTrigger.h:87
IfxStdIf_Timer_::getFrequency
IfxStdIf_Timer_GetFrequency getFrequency
Definition: IfxStdIf_Timer.h:240
IfxCcu6_T12CountMode_centerAligned
T12 counts down after detecting a period-match and counts up after detecting a one-match.
Definition: IfxCcu6.h:301
IfxStdIf_Timer_GetResolution
float32(* IfxStdIf_Timer_GetResolution)(IfxStdIf_InterfaceDriver stdIf)
Return the timer resolution in seconds.
Definition: IfxStdIf_Timer.h:111
IfxCcu6_TimerId_t13
Timer 13.
Definition: IfxCcu6.h:337
IfxCcu6_setSingleShotModeEnable
IFX_INLINE void IfxCcu6_setSingleShotModeEnable(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Enables / Disables the single shot mode of Timers (T12, T13 individually or together based on the sel...
Definition: IfxCcu6.h:2041
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxCcu6_TimerWithTrigger_getFrequency
float32 IfxCcu6_TimerWithTrigger_getFrequency(IfxCcu6_TimerWithTrigger *driver)
Returns the frequency.
Definition: IfxCcu6_TimerWithTrigger.c:99
IfxCcu6_disableSingleShotMode
IFX_INLINE void IfxCcu6_disableSingleShotMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Disables the single shot-mode of Timers (T12 T13).
Definition: IfxCcu6.h:1488
IfxCcu6_isT13CompareNotification
IFX_INLINE boolean IfxCcu6_isT13CompareNotification(Ifx_CCU6 *ccu6)
Returns the status of T13 compare notification.
Definition: IfxCcu6.h:1944
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxCcu6_enableShadowTransfer
IFX_INLINE void IfxCcu6_enableShadowTransfer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Enables shadow transfers of the timers (T12, T13 individually or together based on the selection) ...
Definition: IfxCcu6.h:1603
IfxCcu6_TimerWithTrigger_acknowledgeTimerIrq
boolean IfxCcu6_TimerWithTrigger_acknowledgeTimerIrq(IfxCcu6_TimerWithTrigger *driver)
Returns the timer event.
Definition: IfxCcu6_TimerWithTrigger.c:55
IfxStdIf_Timer_Config::isrPriority
Ifx_Priority isrPriority
Interrupt isrPriority of the timer interrupt, if 0 the interrupt is disable.
Definition: IfxStdIf_Timer.h:275
IfxStdIf_Timer_CountDir_upAndDown
Timer is counting up and down.
Definition: IfxStdIf_Timer.h:88
IfxCcu6_TimerWithTrigger.h
CCU6 TIMERWITHTRIGGER details.
IfxCcu6_enableSingleShotMode
IFX_INLINE void IfxCcu6_enableSingleShotMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Enables the single shot-mode of Timers (T12 T13).
Definition: IfxCcu6.h:1613
IfxCcu6_TimerWithTrigger_Base::clockFreq
float32 clockFreq
Timer input clock frequency (cached value)
Definition: IfxCcu6_TimerWithTrigger.h:79
IfxCcu6_enableInterrupt
IFX_INLINE void IfxCcu6_enableInterrupt(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Enables the selected interrupt.
Definition: IfxCcu6.h:1560
IfxCcu6_T13TriggerEvent_onT12Zero
set T13R upon a zero-match of T12 (while counting up)
Definition: IfxCcu6.h:327
IfxStdIf_Timer_::disableUpdate
IfxStdIf_Timer_DisableUpdate disableUpdate
Definition: IfxStdIf_Timer.h:247
IfxCcu6_TimerWithTrigger_Base::period
Ifx_TimerValue period
Timer period in ticks (cached value)
Definition: IfxCcu6_TimerWithTrigger.h:77
IfxCcu6_TimerWithTrigger_setTrigger
void IfxCcu6_TimerWithTrigger_setTrigger(IfxCcu6_TimerWithTrigger *driver, Ifx_TimerValue triggerPoint)
Sets the trigger.
Definition: IfxCcu6_TimerWithTrigger.c:329
IfxCcu6_TimerId_t12
Timer 12.
Definition: IfxCcu6.h:336
IfxCcu6_TimerWithTrigger_getInputFrequency
float32 IfxCcu6_TimerWithTrigger_getInputFrequency(IfxCcu6_TimerWithTrigger *driver)
Returns the Input frequncy.
Definition: IfxCcu6_TimerWithTrigger.c:105
IfxCcu6_ChannelOut_cout3
CC63 compare output COUT3.
Definition: IfxCcu6.h:118
IfxCcu6_setT12CountMode
IFX_INLINE void IfxCcu6_setT12CountMode(Ifx_CCU6 *ccu6, IfxCcu6_T12CountMode mode)
Definition: IfxCcu6.h:2079
IfxStdIf_Timer_GetInputFrequency
float32(* IfxStdIf_Timer_GetInputFrequency)(IfxStdIf_InterfaceDriver stdIf)
Return the timer input frequency in Hz.
Definition: IfxStdIf_Timer.h:175
IfxStdIf_Timer_SetTrigger
void(* IfxStdIf_Timer_SetTrigger)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue triggerPoint)
Set trigger point.
Definition: IfxStdIf_Timer.h:215
IfxCcu6_InterruptSource_t12OneMatch
Interrupt enable for T12 one-match.
Definition: IfxCcu6.h:193
IfxStdIf_Timer_Config::countDir
IfxStdIf_Timer_CountDir countDir
Timer counting mode.
Definition: IfxStdIf_Timer.h:279
IfxStdIf_Timer_TrigConfig::risingEdgeAtPeriod
boolean risingEdgeAtPeriod
Set the clock signal polarity, if TRUE, the rising edge is at the period, else at the trigger offset...
Definition: IfxStdIf_Timer.h:267
IfxCcu6_isModuleEnabled
IFX_INLINE boolean IfxCcu6_isModuleEnabled(Ifx_CCU6 *ccu6)
Returns the status of module enabled or disabled.
Definition: IfxCcu6.h:1914
IfxCcu6_T13TriggerDirection_onT12CountingUp
while T12 is counting up
Definition: IfxCcu6.h:311
IfxCcu6_clearInterruptStatusFlag
IFX_INLINE void IfxCcu6_clearInterruptStatusFlag(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Clears the selected interrupt flag.
Definition: IfxCcu6.h:1418
IfxStdIf_Timer_initConfig
void IfxStdIf_Timer_initConfig(IfxStdIf_Timer_Config *config)
Definition: IfxStdIf_Timer.c:45
IfxCcu6_TimerWithTrigger_Base
Structure for the timer base.
Definition: IfxCcu6_TimerWithTrigger.h:75
IfxStdIf_Timer_::getInputFrequency
IfxStdIf_Timer_GetInputFrequency getInputFrequency
Definition: IfxStdIf_Timer.h:248
IfxCcu6_TimerWithTrigger_run
void IfxCcu6_TimerWithTrigger_run(IfxCcu6_TimerWithTrigger *driver)
Runs the timer.
Definition: IfxCcu6_TimerWithTrigger.c:292
IfxCcu6_clearT12OneNotification
IFX_INLINE void IfxCcu6_clearT12OneNotification(Ifx_CCU6 *ccu6)
Clears the T12 One notification.
Definition: IfxCcu6.h:1425
IfxCcu6_TimerWithTrigger_stop
void IfxCcu6_TimerWithTrigger_stop(IfxCcu6_TimerWithTrigger *driver)
Stops the timer.
Definition: IfxCcu6_TimerWithTrigger.c:364
IfxStdIf_Timer_TrigConfig::triggerPoint
Ifx_TimerValue triggerPoint
Trigger point in timer ticks.
Definition: IfxStdIf_Timer.h:262
IfxStdIf_Timer_::setTrigger
IfxStdIf_Timer_SetTrigger setTrigger
Definition: IfxStdIf_Timer.h:252
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxStdIf_Timer_::setFrequency
IfxStdIf_Timer_SetFrequency setFrequency
Definition: IfxStdIf_Timer.h:244
IfxStdIf_Timer_::run
IfxStdIf_Timer_Run run
Definition: IfxStdIf_Timer.h:249
IfxStdIf_Timer_::updateInputFrequency
IfxStdIf_Timer_UpdateInputFrequency updateInputFrequency
Definition: IfxStdIf_Timer.h:245
IfxCcu6_InterruptSource_t12PeriodMatch
Interrupt enable for T12 period-match.
Definition: IfxCcu6.h:194
IfxStdIf_Timer_GetPeriod
Ifx_TimerValue(* IfxStdIf_Timer_GetPeriod)(IfxStdIf_InterfaceDriver stdIf)
Return the timer period in ticks.
Definition: IfxStdIf_Timer.h:105
IfxCcu6_TimerWithTrigger_getPeriod
Ifx_TimerValue IfxCcu6_TimerWithTrigger_getPeriod(IfxCcu6_TimerWithTrigger *driver)
Returns the period of the timer.
Definition: IfxCcu6_TimerWithTrigger.c:111
IfxStdIf_Timer_DisableUpdate
void(* IfxStdIf_Timer_DisableUpdate)(IfxStdIf_InterfaceDriver stdIf)
Disable updates.
Definition: IfxStdIf_Timer.h:169
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxCcu6_ServiceRequest_1
Service request output SR1.
Definition: IfxCcu6.h:233
IfxCcu6_TimerWithTrigger_initConfig
void IfxCcu6_TimerWithTrigger_initConfig(IfxCcu6_TimerWithTrigger_Config *config, Ifx_CCU6 *ccu6)
Initializes the configuration structure to default.
Definition: IfxCcu6_TimerWithTrigger.c:282
IfxCcu6_isT12OneNotification
IFX_INLINE boolean IfxCcu6_isT12OneNotification(Ifx_CCU6 *ccu6)
Returns the status of T12 one notification.
Definition: IfxCcu6.h:1932
IfxStdIf_Timer_::setPeriod
IfxStdIf_Timer_SetPeriod setPeriod
Definition: IfxStdIf_Timer.h:250
IfxCcu6_initCout63Pin
IFX_INLINE void IfxCcu6_initCout63Pin(const IfxCcu6_Cout63_Out *cout63, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT63 output pin.
Definition: IfxCcu6.h:1862
IfxStdIf_Timer_::ackTriggerIrq
IfxStdIf_Timer_AckTriggerIrq ackTriggerIrq
Definition: IfxStdIf_Timer.h:255
IfxStdIf_Timer_Config::frequency
float32 frequency
PWM frequency in Hz. This parameter is only used to initialise the timer structure. An additional cell is required to build the timer.
Definition: IfxStdIf_Timer.h:274
IfxStdIf_Timer_ApplyUpdate
void(* IfxStdIf_Timer_ApplyUpdate)(IfxStdIf_InterfaceDriver stdIf)
Apply requested updates.
Definition: IfxStdIf_Timer.h:152
IfxCcu6_setOutputPassiveLevel
void IfxCcu6_setOutputPassiveLevel(Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut, boolean state)
Sets the passive state level of the PWM outputs of the module.
Definition: IfxCcu6.c:291
IfxCcu6_getT12TimerPointer
IFX_INLINE volatile uint32 * IfxCcu6_getT12TimerPointer(Ifx_CCU6 *ccu6)
Returns the Timer pointer.
Definition: IfxCcu6.h:1703
IfxCcu6_TimerWithTrigger_Config
Configuration structure for T12 and T13 Timer.
Definition: IfxCcu6_TimerWithTrigger.h:95
IfxStdIf_Timer_Run
void(* IfxStdIf_Timer_Run)(IfxStdIf_InterfaceDriver stdIf)
Immediately start the timer.
Definition: IfxStdIf_Timer.h:184
IfxCcu6_TimerWithTrigger_Base::triggerEnabled
boolean triggerEnabled
If TRUE, the trigger functionality is Initialised.
Definition: IfxCcu6_TimerWithTrigger.h:78
IfxCcu6_TimerWithTrigger_Config::serviceReqNrTrigger
IfxCcu6_ServiceRequest serviceReqNrTrigger
Service request used for the Trigger.
Definition: IfxCcu6_TimerWithTrigger.h:101
IfxStdIf_Timer_::getResolution
IfxStdIf_Timer_GetResolution getResolution
Definition: IfxStdIf_Timer.h:242
IfxStdIf_Timer_Config::trigger
IfxStdIf_Timer_TrigConfig trigger
Trigger configuration.
Definition: IfxStdIf_Timer.h:278
IfxCcu6_setT13TriggerEventDirection
IFX_INLINE void IfxCcu6_setT13TriggerEventDirection(Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerDirection direction)
Sets the Timer13 trigger event direction.
Definition: IfxCcu6.h:2115
IfxCcu6_TimerWithTrigger_setFrequency
boolean IfxCcu6_TimerWithTrigger_setFrequency(IfxCcu6_TimerWithTrigger *driver, float32 frequency)
Sets the frequency.
Definition: IfxCcu6_TimerWithTrigger.c:298
IfxCcu6_setT12PeriodValue
IFX_INLINE void IfxCcu6_setT12PeriodValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the period value that leads Timer12 counter value to a period-match.
Definition: IfxCcu6.h:2091
IfxCcu6_TimerWithTrigger_applyUpdate
void IfxCcu6_TimerWithTrigger_applyUpdate(IfxCcu6_TimerWithTrigger *driver)
Enable the transfer of the shadow registers.
Definition: IfxCcu6_TimerWithTrigger.c:87
IfxCcu6_TimerWithTrigger_init
boolean IfxCcu6_TimerWithTrigger_init(IfxCcu6_TimerWithTrigger *driver, IfxCcu6_TimerWithTrigger_Config *config)
Initialises the timer object T12 is configured as timer, T13 is optionally configured as trigger T12C...
Definition: IfxCcu6_TimerWithTrigger.c:129
IfxCcu6_startTimer
IFX_INLINE void IfxCcu6_startTimer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
starts the timers (T12, T13 individually or together based on the selection)
Definition: IfxCcu6.h:2140
IfxCcu6_TimerWithTrigger_Config::triggerOut
IfxCcu6_Cout63_Out * triggerOut
Definition: IfxCcu6_TimerWithTrigger.h:99
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxStdIf_Timer_Stop
void(* IfxStdIf_Timer_Stop)(IfxStdIf_InterfaceDriver stdIf)
Immediately stops the timer.
Definition: IfxStdIf_Timer.h:221
IfxStdIf_Timer_::applyUpdate
IfxStdIf_Timer_ApplyUpdate applyUpdate
Definition: IfxStdIf_Timer.h:246
IfxStdIf_Timer_AckTimerIrq
boolean(* IfxStdIf_Timer_AckTimerIrq)(IfxStdIf_InterfaceDriver stdIf)
Return the timer interrupt flag and reset it.
Definition: IfxStdIf_Timer.h:227
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
IfxStdIf_Timer_TrigConfig::enabled
boolean enabled
If true, the trigger functionality is Initialised, else ignored.
Definition: IfxStdIf_Timer.h:261
IfxCcu6_setT13PeriodValue
IFX_INLINE void IfxCcu6_setT13PeriodValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the period value that leads Timer13 counter value to a period-match.
Definition: IfxCcu6.h:2109
IfxStdIf_Timer_TrigConfig::outputEnabled
boolean outputEnabled
If TRUE, the output pin is enabled, else disabled. In case the output is disabled, the output pin is not initialized.
Definition: IfxStdIf_Timer.h:268
IfxStdIf_Timer_SetPeriod
boolean(* IfxStdIf_Timer_SetPeriod)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue period)
Set the timer period.
Definition: IfxStdIf_Timer.h:194
IfxStdIf_Timer_Config::minResolution
float32 minResolution
Minimum resolution of the timer in seconds. if 0, this parameter is ignored. If the configuration doe...
Definition: IfxStdIf_Timer.h:277
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxCcu6_TimerWithTrigger_stdIfTimerInit
boolean IfxCcu6_TimerWithTrigger_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxCcu6_TimerWithTrigger *driver)
Initializes the standard interface timer.
Definition: IfxCcu6_TimerWithTrigger.c:335
IfxStdIf_Timer_TrigConfig::outputMode
IfxPort_OutputMode outputMode
Output mode.
Definition: IfxStdIf_Timer.h:265
IfxStdIf_Timer_::ackTimerIrq
IfxStdIf_Timer_AckTimerIrq ackTimerIrq
Definition: IfxStdIf_Timer.h:254
IfxStdIf_Timer_SetSingleMode
void(* IfxStdIf_Timer_SetSingleMode)(IfxStdIf_InterfaceDriver stdIf, boolean enabled)
Stop timer at the end of the period.
Definition: IfxStdIf_Timer.h:203
IfxCcu6_enableModule
void IfxCcu6_enableModule(Ifx_CCU6 *ccu6)
Enables the selected CCU6 kernel.
Definition: IfxCcu6.c:145
IfxStdIf_Timer_::getPeriod
IfxStdIf_Timer_GetPeriod getPeriod
Definition: IfxStdIf_Timer.h:241
IfxCcu6_enableModulationOutput
void IfxCcu6_enableModulationOutput(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut)
Enables the modulation of the corresponding output signal by PWM pattern generated by the timers T12 ...
Definition: IfxCcu6.c:114
IfxCcu6_TimerWithTrigger_updateInputFrequency
void IfxCcu6_TimerWithTrigger_updateInputFrequency(IfxCcu6_TimerWithTrigger *driver)
Updates the input frequency.
Definition: IfxCcu6_TimerWithTrigger.c:370
IfxCcu6_TimerWithTrigger::ccu6
Ifx_CCU6 * ccu6
CCU6 module used for the timer functionality.
Definition: IfxCcu6_TimerWithTrigger.h:90
IfxCcu6_ServiceRequest_0
Service request output SR0.
Definition: IfxCcu6.h:232


iLLD_TC38A: IfxCcu6_TimerWithTrigger.h Source File

  • Ccu6
  • TimerWithTrigger
IfxCcu6_TimerWithTrigger.h
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6_TimerWithTrigger.h
3 * \brief CCU6 TIMERWITHTRIGGER details
4 * \ingroup IfxLld_Ccu6
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Ccu6_TimerWithTrigger_Usage How to use the CCU6 TimerWithTrigger Interface driver?
42 * \ingroup IfxLld_Ccu6_TimerWithTrigger
43 * This driver implements the timer functionalities as defined by \ref library_srvsw_stdif_timer.
44 * The user is free to use either the driver specific APIs below or to used the \ref library_srvsw_stdif_timer "standard interface APIs".
45 *
46 * \defgroup IfxLld_Ccu6_TimerWithTrigger TimerWithTrigger Interface driver
47 * \ingroup IfxLld_Ccu6
48 * \defgroup IfxLld_Ccu6_TimerWithTrigger_Data_Structures Data Structures
49 * \ingroup IfxLld_Ccu6_TimerWithTrigger
50 * \defgroup IfxLld_Ccu6_TimerWithTrigger_Timer_StdIf_Functions Timer StdIf Functions
51 * \ingroup IfxLld_Ccu6_TimerWithTrigger
52 * \defgroup IfxLld_Ccu6_TimerWithTrigger_Timer_Functions Timer Functions
53 * \ingroup IfxLld_Ccu6_TimerWithTrigger
54 */
55
56 #ifndef IFXCCU6_TIMERWITHTRIGGER_H
57 #define IFXCCU6_TIMERWITHTRIGGER_H 1
58
59 /******************************************************************************/
60 /*----------------------------------Includes----------------------------------*/
61 /******************************************************************************/
62
63 #include "_PinMap/IfxCcu6_PinMap.h"
64 #include "Ccu6/Std/IfxCcu6.h"
65 #include "StdIf/IfxStdIf_Timer.h"
66
67 /******************************************************************************/
68 /*-----------------------------Data Structures--------------------------------*/
69 /******************************************************************************/
70
71 /** \addtogroup IfxLld_Ccu6_TimerWithTrigger_Data_Structures
72 * \{ */
73 /** \brief Structure for the timer base
74 */
75 typedef struct
76 {
77 Ifx_TimerValue period; /**< \brief Timer period in ticks (cached value) */
78 boolean triggerEnabled; /**< \brief If TRUE, the trigger functionality is Initialised */
79 float32 clockFreq; /**< \brief Timer input clock frequency (cached value) */
80 IfxStdIf_Timer_CountDir countDir; /**< \brief Timer counting mode */
81 } IfxCcu6_TimerWithTrigger_Base;
82
83 /** \} */
84
85 /** \brief CCU6 Timer interface
86 */
87 typedef struct
88 {
89 IfxCcu6_TimerWithTrigger_Base base; /**< \brief Timer base structure */
90 Ifx_CCU6 *ccu6; /**< \brief CCU6 module used for the timer functionality */
91 } IfxCcu6_TimerWithTrigger;
92
93 /** \brief Configuration structure for T12 and T13 Timer
94 */
95 typedef struct
96 {
97 IfxStdIf_Timer_Config base; /**< \brief Standard interface timer configuration */
98 Ifx_CCU6 *ccu6; /**< \brief CCU6 module used for the timer functionality */
99 IfxCcu6_Cout63_Out *triggerOut;
100 IfxCcu6_ServiceRequest serviceReqNrPeriod; /**< \brief Service request used for the period */
101 IfxCcu6_ServiceRequest serviceReqNrTrigger; /**< \brief Service request used for the Trigger */
102 } IfxCcu6_TimerWithTrigger_Config;
103
104 /** \addtogroup IfxLld_Ccu6_TimerWithTrigger_Timer_StdIf_Functions
105 * \{ */
106
107 /******************************************************************************/
108 /*-------------------------Global Function Prototypes-------------------------*/
109 /******************************************************************************/
110
111 /** \brief Returns the timer event
112 * \param driver CCU6 Timer interface Handle
113 * \return Timer event
114 *
115 * \see IfxStdIf_Timer_AckTimerIrq
116 *
117 */
118 IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_acknowledgeTimerIrq(IfxCcu6_TimerWithTrigger *driver);
119
120 /** \brief Returns the trigger event
121 * \param driver CCU6 Timer interface Handle
122 * \return Timer event
123 *
124 * \see IfxStdIf_Timer_AckTriggerIrq
125 *
126 */
127 IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_acknowledgeTriggerIrq(IfxCcu6_TimerWithTrigger *driver);
128
129 /** \brief Enable the transfer of the shadow registers
130 * \param driver CCU6 Timer interface Handle
131 * \return None
132 *
133 * \see IfxStdIf_Timer_ApplyUpdate
134 *
135 */
136 IFX_EXTERN void IfxCcu6_TimerWithTrigger_applyUpdate(IfxCcu6_TimerWithTrigger *driver);
137
138 /** \brief Disables the upadte\n
139 * This function is has an empty body as the updated is disabled automatically after the shadow transfer
140 * \param driver CCU6 Timer interface Handle
141 * \return None
142 *
143 * \see IfxStdIf_Timer_DisableUpdate
144 *
145 */
146 IFX_EXTERN void IfxCcu6_TimerWithTrigger_disableUpdate(IfxCcu6_TimerWithTrigger *driver);
147
148 /** \brief Returns the frequency
149 * \param driver CCU6 Timer interface Handle
150 * \return Frequency
151 *
152 * \see IfxStdIf_Timer_GetFrequency
153 *
154 */
155 IFX_EXTERN float32 IfxCcu6_TimerWithTrigger_getFrequency(IfxCcu6_TimerWithTrigger *driver);
156
157 /** \brief Returns the Input frequncy
158 * \param driver CCU6 Timer interface Handle
159 * \return Frequency
160 *
161 * \see IfxStdIf_Timer_GetInputFrequency
162 *
163 */
164 IFX_EXTERN float32 IfxCcu6_TimerWithTrigger_getInputFrequency(IfxCcu6_TimerWithTrigger *driver);
165
166 /** \brief Returns the period of the timer
167 * \param driver CCU6 Timer interface Handle
168 * \return Period
169 *
170 * \see IfxStdIf_Timer_GetPeriod
171 *
172 */
173 IFX_EXTERN Ifx_TimerValue IfxCcu6_TimerWithTrigger_getPeriod(IfxCcu6_TimerWithTrigger *driver);
174
175 /** \brief Returns the resolution
176 * \param driver CCU6 Timer interface Handle
177 * \return Resolution
178 *
179 * \see IfxStdIf_Timer_GetResolution
180 *
181 */
182 IFX_EXTERN float32 IfxCcu6_TimerWithTrigger_getResolution(IfxCcu6_TimerWithTrigger *driver);
183
184 /** \brief Runs the timer
185 * \param driver CCU6 Timer interface Handle
186 * \return None
187 *
188 * \see IfxStdIf_Timer_Run
189 *
190 */
191 IFX_EXTERN void IfxCcu6_TimerWithTrigger_run(IfxCcu6_TimerWithTrigger *driver);
192
193 /** \brief Sets the frequency
194 * \param driver CCU6 Timer interface Handle
195 * \param frequency Frequency
196 * \return TRUE on success else FALSE
197 *
198 * \see IfxStdIf_Timer_SetFrequency
199 *
200 */
201 IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_setFrequency(IfxCcu6_TimerWithTrigger *driver, float32 frequency);
202
203 /** \brief Sets the period for the timer
204 * \param driver CCU6 Timer interface Handle
205 * \param period Period value
206 * \return TRUE on success else FALSE
207 *
208 * \see IfxStdIf_Timer_SetPeriod
209 *
210 */
211 IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_setPeriod(IfxCcu6_TimerWithTrigger *driver, Ifx_TimerValue period);
212
213 /** \brief Sets the single shot mode of the timer
214 * \param driver CCU6 Timer interface Handle
215 * \param enabled If TRUE, sets the single shot mode
216 * \return None
217 *
218 * \see IfxStdIf_Timer_SetSingleMode
219 *
220 */
221 IFX_EXTERN void IfxCcu6_TimerWithTrigger_setSingleMode(IfxCcu6_TimerWithTrigger *driver, boolean enabled);
222
223 /** \brief Sets the trigger
224 * \param driver CCU6 Timer interface Handle
225 * \param triggerPoint Trigger point value
226 * \return None
227 *
228 * \see IfxStdIf_Timer_SetTrigger
229 *
230 */
231 IFX_EXTERN void IfxCcu6_TimerWithTrigger_setTrigger(IfxCcu6_TimerWithTrigger *driver, Ifx_TimerValue triggerPoint);
232
233 /** \brief Initializes the standard interface timer
234 * \param stdif Standard interface object, will be initialized by the function
235 * \param driver CCU6 Timer interface Handle
236 * \return TRUE on success else FALSE
237 */
238 IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxCcu6_TimerWithTrigger *driver);
239
240 /** \brief Stops the timer
241 * \param driver CCU6 Timer interface Handle
242 * \return None
243 *
244 * \see IfxStdIf_Timer_Stop
245 *
246 */
247 IFX_EXTERN void IfxCcu6_TimerWithTrigger_stop(IfxCcu6_TimerWithTrigger *driver);
248
249 /** \brief Updates the input frequency
250 * \param driver CCU6 Timer interface Handle
251 * \return None
252 *
253 * \see IfxStdIf_Timer_UpdateInputFrequency
254 *
255 */
256 IFX_EXTERN void IfxCcu6_TimerWithTrigger_updateInputFrequency(IfxCcu6_TimerWithTrigger *driver);
257
258 /** \} */
259
260 /** \addtogroup IfxLld_Ccu6_TimerWithTrigger_Timer_Functions
261 * \{ */
262
263 /******************************************************************************/
264 /*-------------------------Global Function Prototypes-------------------------*/
265 /******************************************************************************/
266
267 /** \brief Returns the pointer to timer channel
268 * \param driver CCU6 Timer interface Handle
269 * \return Pointer
270 *
271 * \see IfxStdIf_Timer_DisableUpdate
272 *
273 */
274 IFX_EXTERN volatile uint32 *IfxCcu6_TimerWithTrigger_getPointer(IfxCcu6_TimerWithTrigger *driver);
275
276 /** \brief Initialises the timer object\n
277 * T12 is configured as timer, T13 is optionally configured as trigger\n
278 * T12CLK, T12PRE and T12PR are chosen to achieve maximum PWM resolution\n
279 * Note: To achieve maximum PWM resolution, the requested T12 frequency should be the\n
280 * lowest PWM frequency.\n
281 * \param driver CCU6 Timer interface Handle
282 * \param config Configuration structure for Timer
283 * \return TRUE on success else FALSE
284 */
285 IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_init(IfxCcu6_TimerWithTrigger *driver, IfxCcu6_TimerWithTrigger_Config *config);
286
287 /** \brief Initializes the configuration structure to default
288 * \param config Configuration structure for Timer
289 * \param ccu6 Pointer to CCU6 module
290 * \return None
291 */
292 IFX_EXTERN void IfxCcu6_TimerWithTrigger_initConfig(IfxCcu6_TimerWithTrigger_Config *config, Ifx_CCU6 *ccu6);
293
294 /** \} */
295
296 #endif /* IFXCCU6_TIMERWITHTRIGGER_H */
IfxCcu6_TimerWithTrigger_Config::base
IfxStdIf_Timer_Config base
Standard interface timer configuration.
Definition: IfxCcu6_TimerWithTrigger.h:97
IfxCcu6_TimerWithTrigger::base
IfxCcu6_TimerWithTrigger_Base base
Timer base structure.
Definition: IfxCcu6_TimerWithTrigger.h:89
IfxCcu6_TimerWithTrigger_setPeriod
IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_setPeriod(IfxCcu6_TimerWithTrigger *driver, Ifx_TimerValue period)
Sets the period for the timer.
Definition: IfxCcu6_TimerWithTrigger.c:306
IfxCcu6_TimerWithTrigger_disableUpdate
IFX_EXTERN void IfxCcu6_TimerWithTrigger_disableUpdate(IfxCcu6_TimerWithTrigger *driver)
Disables the upadte This function is has an empty body as the updated is disabled automatically after...
Definition: IfxCcu6_TimerWithTrigger.c:93
IfxCcu6_TimerWithTrigger_acknowledgeTriggerIrq
IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_acknowledgeTriggerIrq(IfxCcu6_TimerWithTrigger *driver)
Returns the trigger event.
Definition: IfxCcu6_TimerWithTrigger.c:71
IfxCcu6_TimerWithTrigger_Config::serviceReqNrPeriod
IfxCcu6_ServiceRequest serviceReqNrPeriod
Service request used for the period.
Definition: IfxCcu6_TimerWithTrigger.h:100
IfxCcu6_Cout63_Out
COUT63 pin mapping structure.
Definition: IfxCcu6_PinMap.h:176
IfxCcu6_TimerWithTrigger_Base::countDir
IfxStdIf_Timer_CountDir countDir
Timer counting mode.
Definition: IfxCcu6_TimerWithTrigger.h:80
IfxCcu6_TimerWithTrigger_getPointer
IFX_EXTERN volatile uint32 * IfxCcu6_TimerWithTrigger_getPointer(IfxCcu6_TimerWithTrigger *driver)
Returns the pointer to timer channel.
Definition: IfxCcu6_TimerWithTrigger.c:117
uint32
unsigned long uint32
Definition: Platform_Types.h:116
float32
float float32
Definition: Platform_Types.h:170
IfxCcu6_TimerWithTrigger_getResolution
IFX_EXTERN float32 IfxCcu6_TimerWithTrigger_getResolution(IfxCcu6_TimerWithTrigger *driver)
Returns the resolution.
Definition: IfxCcu6_TimerWithTrigger.c:123
IfxStdIf_Timer_
Standard interface object.
Definition: IfxStdIf_Timer.h:237
IfxCcu6_TimerWithTrigger_setSingleMode
IFX_EXTERN void IfxCcu6_TimerWithTrigger_setSingleMode(IfxCcu6_TimerWithTrigger *driver, boolean enabled)
Sets the single shot mode of the timer.
Definition: IfxCcu6_TimerWithTrigger.c:316
IfxCcu6_TimerWithTrigger
CCU6 Timer interface.
Definition: IfxCcu6_TimerWithTrigger.h:87
IfxCcu6_TimerWithTrigger_getFrequency
IFX_EXTERN float32 IfxCcu6_TimerWithTrigger_getFrequency(IfxCcu6_TimerWithTrigger *driver)
Returns the frequency.
Definition: IfxCcu6_TimerWithTrigger.c:99
IfxStdIf_Timer_Config
Timer configuration.
Definition: IfxStdIf_Timer.h:272
IfxCcu6_TimerWithTrigger_acknowledgeTimerIrq
IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_acknowledgeTimerIrq(IfxCcu6_TimerWithTrigger *driver)
Returns the timer event.
Definition: IfxCcu6_TimerWithTrigger.c:55
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxCcu6_TimerWithTrigger_Base::clockFreq
float32 clockFreq
Timer input clock frequency (cached value)
Definition: IfxCcu6_TimerWithTrigger.h:79
IfxCcu6_TimerWithTrigger_Base::period
Ifx_TimerValue period
Timer period in ticks (cached value)
Definition: IfxCcu6_TimerWithTrigger.h:77
IfxCcu6_TimerWithTrigger_setTrigger
IFX_EXTERN void IfxCcu6_TimerWithTrigger_setTrigger(IfxCcu6_TimerWithTrigger *driver, Ifx_TimerValue triggerPoint)
Sets the trigger.
Definition: IfxCcu6_TimerWithTrigger.c:329
IfxCcu6_TimerWithTrigger_getInputFrequency
IFX_EXTERN float32 IfxCcu6_TimerWithTrigger_getInputFrequency(IfxCcu6_TimerWithTrigger *driver)
Returns the Input frequncy.
Definition: IfxCcu6_TimerWithTrigger.c:105
IfxCcu6_PinMap.h
CCU6 I/O map.
IfxCcu6.h
CCU6 basic functionality.
IfxCcu6_ServiceRequest
IfxCcu6_ServiceRequest
Selection of service request outputs.
Definition: IfxCcu6.h:230
IfxCcu6_TimerWithTrigger_Base
Structure for the timer base.
Definition: IfxCcu6_TimerWithTrigger.h:75
IfxStdIf_Timer.h
Standard interface: Timer.
IfxCcu6_TimerWithTrigger_run
IFX_EXTERN void IfxCcu6_TimerWithTrigger_run(IfxCcu6_TimerWithTrigger *driver)
Runs the timer.
Definition: IfxCcu6_TimerWithTrigger.c:292
IfxStdIf_Timer_CountDir
IfxStdIf_Timer_CountDir
Timer increment direction.
Definition: IfxStdIf_Timer.h:85
IfxCcu6_TimerWithTrigger_stop
IFX_EXTERN void IfxCcu6_TimerWithTrigger_stop(IfxCcu6_TimerWithTrigger *driver)
Stops the timer.
Definition: IfxCcu6_TimerWithTrigger.c:364
IfxCcu6_TimerWithTrigger_getPeriod
IFX_EXTERN Ifx_TimerValue IfxCcu6_TimerWithTrigger_getPeriod(IfxCcu6_TimerWithTrigger *driver)
Returns the period of the timer.
Definition: IfxCcu6_TimerWithTrigger.c:111
IfxCcu6_TimerWithTrigger_initConfig
IFX_EXTERN void IfxCcu6_TimerWithTrigger_initConfig(IfxCcu6_TimerWithTrigger_Config *config, Ifx_CCU6 *ccu6)
Initializes the configuration structure to default.
Definition: IfxCcu6_TimerWithTrigger.c:282
IfxCcu6_TimerWithTrigger_Config
Configuration structure for T12 and T13 Timer.
Definition: IfxCcu6_TimerWithTrigger.h:95
IfxCcu6_TimerWithTrigger_Base::triggerEnabled
boolean triggerEnabled
If TRUE, the trigger functionality is Initialised.
Definition: IfxCcu6_TimerWithTrigger.h:78
IfxCcu6_TimerWithTrigger_Config::serviceReqNrTrigger
IfxCcu6_ServiceRequest serviceReqNrTrigger
Service request used for the Trigger.
Definition: IfxCcu6_TimerWithTrigger.h:101
IfxCcu6_TimerWithTrigger_setFrequency
IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_setFrequency(IfxCcu6_TimerWithTrigger *driver, float32 frequency)
Sets the frequency.
Definition: IfxCcu6_TimerWithTrigger.c:298
IfxCcu6_TimerWithTrigger_applyUpdate
IFX_EXTERN void IfxCcu6_TimerWithTrigger_applyUpdate(IfxCcu6_TimerWithTrigger *driver)
Enable the transfer of the shadow registers.
Definition: IfxCcu6_TimerWithTrigger.c:87
IfxCcu6_TimerWithTrigger_init
IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_init(IfxCcu6_TimerWithTrigger *driver, IfxCcu6_TimerWithTrigger_Config *config)
Initialises the timer object T12 is configured as timer, T13 is optionally configured as trigger T12C...
Definition: IfxCcu6_TimerWithTrigger.c:129
IfxCcu6_TimerWithTrigger_Config::triggerOut
IfxCcu6_Cout63_Out * triggerOut
Definition: IfxCcu6_TimerWithTrigger.h:99
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
IfxCcu6_TimerWithTrigger_stdIfTimerInit
IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxCcu6_TimerWithTrigger *driver)
Initializes the standard interface timer.
Definition: IfxCcu6_TimerWithTrigger.c:335
IfxCcu6_TimerWithTrigger_updateInputFrequency
IFX_EXTERN void IfxCcu6_TimerWithTrigger_updateInputFrequency(IfxCcu6_TimerWithTrigger *driver)
Updates the input frequency.
Definition: IfxCcu6_TimerWithTrigger.c:370
IfxCcu6_TimerWithTrigger::ccu6
Ifx_CCU6 * ccu6
CCU6 module used for the timer functionality.
Definition: IfxCcu6_TimerWithTrigger.h:90


iLLD_TC38A: IfxCcu6_cfg.c Source File

  • _Impl
IfxCcu6_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6_cfg.c
3 * \brief CCU6 on-chip implementation data
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxCcu6_cfg.h"
47
48 /******************************************************************************/
49 /*----------------------------------Macros------------------------------------*/
50 /******************************************************************************/
51
52 #define IFXCCU6_EMPTY_OUTPUT_SLOT (0, 0, IfxPort_OutputIdx_alt7)
53
54 /******************************************************************************/
55 /*-----------------------Exported Variables/Constants-------------------------*/
56 /******************************************************************************/
57
58 IFX_CONST IfxModule_IndexMap IfxCcu6_cfg_indexMap[IFXCCU6_NUM_MODULES] = {
59 {&MODULE_CCU60, IfxCcu6_Index_0},
60 {&MODULE_CCU61, IfxCcu6_Index_1}
61 };
IfxCcu6_Index_1
CCU6 index 1.
Definition: IfxCcu6_cfg.h:84
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxCcu6_cfg.h
CCU6 on-chip implementation data.
IFXCCU6_NUM_MODULES
#define IFXCCU6_NUM_MODULES
Definition: IfxCcu6_cfg.h:66
IfxCcu6_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxCcu6_cfg_indexMap[IFXCCU6_NUM_MODULES]
Definition: IfxCcu6_cfg.c:58
IfxCcu6_Index_0
CCU6 index 0.
Definition: IfxCcu6_cfg.h:83
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:140


iLLD_TC38A: IfxCcu6_cfg.h Source File

  • _Impl
IfxCcu6_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6_cfg.h
3 * \brief CCU6 on-chip implementation data
4 * \ingroup IfxLld_Ccu6
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Ccu6 CCU6
42 * \ingroup IfxLld
43 * \defgroup IfxLld_Ccu6_Impl Implementation
44 * \ingroup IfxLld_Ccu6
45 * \defgroup IfxLld_Ccu6_Std Standard Driver
46 * \ingroup IfxLld_Ccu6
47 * \defgroup IfxLld_Ccu6_Impl_Enumerations Enumerations
48 * \ingroup IfxLld_Ccu6_Impl
49 */
50
51 #ifndef IFXCCU6_CFG_H
52 #define IFXCCU6_CFG_H 1
53
54 /******************************************************************************/
55 /*----------------------------------Includes----------------------------------*/
56 /******************************************************************************/
57
58 #include "Cpu/Std/Ifx_Types.h"
59 #include "IfxCcu6_reg.h"
60 #include "IfxCcu6_bf.h"
61
62 /******************************************************************************/
63 /*-----------------------------------Macros-----------------------------------*/
64 /******************************************************************************/
65
66 #define IFXCCU6_NUM_MODULES (2)
67
68 #define IFXCCU6_NUM_SERVICE_REQUESTS (4)
69
70 #define IFXCCU6_NUM_T12_CHANNELS (3)
71
72 #define IFXCCU6_NUM_T13_CHANNELS (1)
73
74 /******************************************************************************/
75 /*-------------------------------Enumerations---------------------------------*/
76 /******************************************************************************/
77
78 /** \brief List of the available CCU6 resources
79 */
80 typedef enum
81 {
82 IfxCcu6_Index_none = -1, /**< \brief Not Selected */
83 IfxCcu6_Index_0 = 0, /**< \brief CCU6 index 0 */
84 IfxCcu6_Index_1 /**< \brief CCU6 index 1 */
85 } IfxCcu6_Index;
86
87 typedef enum
88 {
89 IfxCcu6_TrigOut_0 = IFX_CCU6_MOSEL_TRIG0SEL_OFF, /**< \brief Output Trigger Select for CCU6061 TRIG0 */
90 IfxCcu6_TrigOut_1 = IFX_CCU6_MOSEL_TRIG1SEL_OFF, /**< \brief Output Trigger Select for CCU6061 TRIG1 */
91 IfxCcu6_TrigOut_2 = IFX_CCU6_MOSEL_TRIG2SEL_OFF /**< \brief Output Trigger Select for CCU6061 TRIG2 */
92 } IfxCcu6_TrigOut;
93
94 typedef enum
95 {
96 IfxCcu6_TrigSel_cout63 = 0,
97 IfxCcu6_TrigSel_cc60 = 1,
98 IfxCcu6_TrigSel_cc61 = 1,
99 IfxCcu6_TrigSel_cc62 = 1,
100 IfxCcu6_TrigSel_sr1 = 2,
101 IfxCcu6_TrigSel_sr3 = 3
102 } IfxCcu6_TrigSel;
103
104 /******************************************************************************/
105 /*-------------------Global Exported Variables/Constants----------------------*/
106 /******************************************************************************/
107
108 IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxCcu6_cfg_indexMap[IFXCCU6_NUM_MODULES];
109
110 #endif /* IFXCCU6_CFG_H */
IfxCcu6_Index_none
Not Selected.
Definition: IfxCcu6_cfg.h:82
IfxCcu6_Index
IfxCcu6_Index
List of the available CCU6 resources.
Definition: IfxCcu6_cfg.h:80
IfxCcu6_Index_1
CCU6 index 1.
Definition: IfxCcu6_cfg.h:84
IfxCcu6_TrigOut_2
Output Trigger Select for CCU6061 TRIG2.
Definition: IfxCcu6_cfg.h:91
IfxCcu6_cfg_indexMap
IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxCcu6_cfg_indexMap[IFXCCU6_NUM_MODULES]
Definition: IfxCcu6_cfg.h:108
IfxCcu6_TrigSel_sr1
Definition: IfxCcu6_cfg.h:100
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxCcu6_TrigSel_cc62
Definition: IfxCcu6_cfg.h:99
IFXCCU6_NUM_MODULES
#define IFXCCU6_NUM_MODULES
Definition: IfxCcu6_cfg.h:66
IfxCcu6_TrigSel_sr3
Definition: IfxCcu6_cfg.h:101
IfxCcu6_TrigOut_0
Output Trigger Select for CCU6061 TRIG0.
Definition: IfxCcu6_cfg.h:89
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxCcu6_TrigSel_cc60
Definition: IfxCcu6_cfg.h:97
IfxCcu6_TrigSel_cc61
Definition: IfxCcu6_cfg.h:98
IfxCcu6_Index_0
CCU6 index 0.
Definition: IfxCcu6_cfg.h:83
IfxCcu6_TrigSel_cout63
Definition: IfxCcu6_cfg.h:96
IfxCcu6_TrigSel
IfxCcu6_TrigSel
Definition: IfxCcu6_cfg.h:94
IfxCcu6_TrigOut_1
Output Trigger Select for CCU6061 TRIG1.
Definition: IfxCcu6_cfg.h:90
IfxCcu6_TrigOut
IfxCcu6_TrigOut
Definition: IfxCcu6_cfg.h:87
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:140


iLLD_TC38A: IfxConvctrl.c Source File

  • Convctrl
  • Std
IfxConvctrl.c
Go to the documentation of this file.
1 /**
2 * \file IfxConvctrl.c
3 * \brief CONVCTRL basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxConvctrl.h"
47
48 /******************************************************************************/
49 /*-------------------------Function Implementations---------------------------*/
50 /******************************************************************************/
51
52 void IfxConvctrl_resetModule(Ifx_CONVERTER *convctrl)
53 {
54 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
55 IfxScuWdt_clearCpuEndinit(passwd);
56 convctrl->KRST1.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
57 convctrl->KRST0.B.RST = 1;
58 IfxScuWdt_setCpuEndinit(passwd);
59
60 while (convctrl->KRST0.B.RSTSTAT == 0)
61 {
62 /* Wait until reset is executed */
63 }
64
65 passwd = IfxScuWdt_getCpuWatchdogPassword();
66 IfxScuWdt_clearCpuEndinit(passwd);
67 convctrl->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
68 IfxScuWdt_setCpuEndinit(passwd);
69 }
IfxConvctrl_resetModule
void IfxConvctrl_resetModule(Ifx_CONVERTER *convctrl)
Definition: IfxConvctrl.c:52
IfxConvctrl.h
CONVCTRL basic functionality.
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613


iLLD_TC38A: IfxConvctrl.h Source File

  • Convctrl
  • Std
IfxConvctrl.h
Go to the documentation of this file.
1 /**
2 * \file IfxConvctrl.h
3 * \brief CONVCTRL basic functionality
4 * \ingroup IfxLld_Convctrl
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Convctrl_Std_ConfigurationFunctions Configuration Functions
42 * \ingroup IfxLld_Convctrl_Std
43 * \defgroup IfxLld_Convctrl_Std_Initialization Initialization Functions
44 * \ingroup IfxLld_Convctrl_Std
45 * \defgroup IfxLld_Convctrl_Std_Enumerations Enums
46 * \ingroup IfxLld_Convctrl_Std
47 */
48
49 #ifndef IFXCONVCTRL_H
50 #define IFXCONVCTRL_H 1
51
52 /******************************************************************************/
53 /*----------------------------------Includes----------------------------------*/
54 /******************************************************************************/
55
56 #include "_Impl/IfxConvctrl_cfg.h"
57 #include "IfxConverter_reg.h"
58 #include "Cpu/Std/IfxCpu_Intrinsics.h"
59 #include "_Utilities/Ifx_Assert.h"
60 #include "IfxConverter_bf.h"
61 #include "Scu/Std/IfxScuCcu.h"
62 #include "Scu/Std/IfxScuWdt.h"
63
64 /******************************************************************************/
65 /*--------------------------------Enumerations--------------------------------*/
66 /******************************************************************************/
67
68 /** \addtogroup IfxLld_Convctrl_Std_Enumerations
69 * \{ */
70 /** \brief Prescaling factor between the peripheral clock and the phase synchronization signal.To be filled in PHSCFG.B.PHSDIV
71 */
72 typedef enum
73 {
74 IfxConvctrl_PhaseSynchronizerDivider_off = 0, /**< \brief Off, the phase synchronization signal is constantly active */
75 IfxConvctrl_PhaseSynchronizerDivider_2 = 1, /**< \brief The phase synchronization signal is generated at fPER / 2 */
76 IfxConvctrl_PhaseSynchronizerDivider_3 = 2, /**< \brief The phase synchronization signal is generated at fPER / 3 */
77 IfxConvctrl_PhaseSynchronizerDivider_4 = 3, /**< \brief The phase synchronization signal is generated at fPER / 4 */
78 IfxConvctrl_PhaseSynchronizerDivider_5 = 4, /**< \brief The phase synchronization signal is generated at fPER / 5 */
79 IfxConvctrl_PhaseSynchronizerDivider_6 = 5, /**< \brief The phase synchronization signal is generated at fPER / 6 */
80 IfxConvctrl_PhaseSynchronizerDivider_7 = 6, /**< \brief The phase synchronization signal is generated at fPER / 7 */
81 IfxConvctrl_PhaseSynchronizerDivider_8 = 7, /**< \brief The phase synchronization signal is generated at fPER / 8 */
82 IfxConvctrl_PhaseSynchronizerDivider_9 = 8, /**< \brief The phase synchronization signal is generated at fPER / 9 */
83 IfxConvctrl_PhaseSynchronizerDivider_10 = 9, /**< \brief The phase synchronization signal is generated at fPER / 10 */
84 IfxConvctrl_PhaseSynchronizerDivider_11 = 10, /**< \brief The phase synchronization signal is generated at fPER / 11 */
85 IfxConvctrl_PhaseSynchronizerDivider_12 = 11, /**< \brief The phase synchronization signal is generated at fPER / 12 */
86 IfxConvctrl_PhaseSynchronizerDivider_13 = 12, /**< \brief The phase synchronization signal is generated at fPER / 13 */
87 IfxConvctrl_PhaseSynchronizerDivider_14 = 13, /**< \brief The phase synchronization signal is generated at fPER / 14 */
88 IfxConvctrl_PhaseSynchronizerDivider_15 = 14, /**< \brief The phase synchronization signal is generated at fPER / 15 */
89 IfxConvctrl_PhaseSynchronizerDivider_16 = 15 /**< \brief The phase synchronization signal is generated at fPER / 15 */
90 } IfxConvctrl_PhaseSynchronizerDivider;
91
92 /** \brief Modes of sensitivity to the suspend signal coming from the OCDS Trigger Switch (OTGS).
93 * To be filled in OCS.B.SUS
94 */
95 typedef enum
96 {
97 IfxConvctrl_SuspendMode_noSuspend = 0, /**< \brief Module will not suspent */
98 IfxConvctrl_SuspendMode_1 = 1, /**< \brief Suspend Mode 1 : Stop generating synchronization pulses */
99 IfxConvctrl_SuspendMode_2 = 2 /**< \brief Disable the Phase Synchronizer */
100 } IfxConvctrl_SuspendMode;
101
102 /** \} */
103
104 /** \addtogroup IfxLld_Convctrl_Std_ConfigurationFunctions
105 * \{ */
106
107 /******************************************************************************/
108 /*-------------------------Inline Function Prototypes-------------------------*/
109 /******************************************************************************/
110
111 /** \brief This will disable all the Converter Controller Alarms(from reaching out of module) in addition to clearing the ALF flag.
112 * \param convctrl Pointer to Converter Controller SFRs
113 * \return None
114 */
115 IFX_INLINE void IfxConvctrl_clearAlarmFlag(Ifx_CONVERTER *convctrl);
116
117 /** \brief Access to all CONVCTRL registers is enabled.
118 * \param convctrl Pointer to Converter Controller SFRs
119 * \return None
120 */
121 IFX_INLINE void IfxConvctrl_enableConfigurationAccess(Ifx_CONVERTER *convctrl);
122
123 /** \brief Enables the module clock, thereby enabling the module
124 * \param convctrl Pointer to Converter Controller SFRs
125 * \return None
126 */
127 IFX_INLINE void IfxConvctrl_enableModule(Ifx_CONVERTER *convctrl);
128
129 /** \brief Introducing fault in the Down Counter
130 * \param convctrl Pointer to Converter Controller SFRs
131 * \return None
132 */
133 IFX_INLINE void IfxConvctrl_injectCounterFault(Ifx_CONVERTER *convctrl);
134
135 /** \brief Introducing fault in Phase Synchronizer Divider(PHSDIV)
136 * \param convctrl Pointer to Converter Controller SFRs
137 * \return None
138 */
139 IFX_INLINE void IfxConvctrl_injectPhaseSyncDividerFault(Ifx_CONVERTER *convctrl);
140
141 /**
142 * \param convctrl Pointer to Converter Controller SFRs
143 * \return TRUE - Safety problem has been detected
144 * FALSE - No error indicated
145 */
146 IFX_INLINE boolean IfxConvctrl_isErrorDetected(Ifx_CONVERTER *convctrl);
147
148 /**
149 * \param convctrl Pointer to Converter Controller SFRs
150 */
151 IFX_INLINE boolean IfxConvctrl_isModuleSuspended(Ifx_CONVERTER *convctrl);
152
153 /**
154 * \param convctrl Pointer to Converter Controller SFRs
155 * \return None
156 */
157 IFX_INLINE void IfxConvctrl_lockConfigurationAccess(Ifx_CONVERTER *convctrl);
158
159 /** \brief Set the Phase Synchronizer Divider value
160 * \param convctrl Pointer to Converter Controller SFRs
161 * \param dividerValue Phase Synchronizer divider value
162 * \return None
163 */
164 IFX_INLINE void IfxConvctrl_setDividerValue(Ifx_CONVERTER *convctrl, IfxConvctrl_PhaseSynchronizerDivider dividerValue);
165
166 /** \brief Configure the suspend mode
167 * \param convctrl Pointer to Converter Controller SFRs
168 * \param mode Suspend Modes
169 * \return None
170 */
171 IFX_INLINE void IfxConvctrl_setSuspendMode(Ifx_CONVERTER *convctrl, IfxConvctrl_SuspendMode mode);
172
173 /******************************************************************************/
174 /*-------------------------Global Function Prototypes-------------------------*/
175 /******************************************************************************/
176
177 /**
178 * \param convctrl Pointer to Converter Controller SFRs
179 * \return None
180 */
181 IFX_EXTERN void IfxConvctrl_resetModule(Ifx_CONVERTER *convctrl);
182
183 /** \} */
184
185 /** \addtogroup IfxLld_Convctrl_Std_Initialization
186 * \{ */
187
188 /******************************************************************************/
189 /*-------------------------Inline Function Prototypes-------------------------*/
190 /******************************************************************************/
191
192 /**
193 * \param convctrl Pointer to Converter Controller SFRs
194 * \param divisionFactor Prescaling factor between the peripheral clock and the phase synchronization signal.
195 * \return None
196 */
197 IFX_INLINE void IfxConvctrl_initializeModule(Ifx_CONVERTER *convctrl, IfxConvctrl_PhaseSynchronizerDivider divisionFactor);
198
199 /** \} */
200
201 /******************************************************************************/
202 /*---------------------Inline Function Implementations------------------------*/
203 /******************************************************************************/
204
205 IFX_INLINE void IfxConvctrl_clearAlarmFlag(Ifx_CONVERTER *convctrl)
206 {
207 convctrl->PHSSFTY.B.ALFCLR = 1;
208 }
209
210
211 IFX_INLINE void IfxConvctrl_enableConfigurationAccess(Ifx_CONVERTER *convctrl)
212 {
213 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
214 IfxScuWdt_clearCpuEndinit(passwd);
215
216 convctrl->CCCTRL.B.TC = 0xB;
217
218 IfxScuWdt_setCpuEndinit(passwd);
219 }
220
221
222 IFX_INLINE void IfxConvctrl_enableModule(Ifx_CONVERTER *convctrl)
223 {
224 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
225
226 IfxScuWdt_clearCpuEndinit(passwd);
227 convctrl->CLC.U = 0x00000000;
228 IfxScuWdt_setCpuEndinit(passwd);
229 }
230
231
232 IFX_INLINE void IfxConvctrl_initializeModule(Ifx_CONVERTER *convctrl, IfxConvctrl_PhaseSynchronizerDivider divisionFactor)
233 {
234 IfxConvctrl_enableModule(convctrl);
235 IfxConvctrl_enableConfigurationAccess(convctrl);
236 IfxConvctrl_setDividerValue(convctrl, divisionFactor);
237 IfxConvctrl_lockConfigurationAccess(convctrl);
238 }
239
240
241 IFX_INLINE void IfxConvctrl_injectCounterFault(Ifx_CONVERTER *convctrl)
242 {
243 /*Writing 0 into FICN0 and 1 into FICN1 simultaneously*/
244
245 Ifx_CONVERTER_PHSSFTY phssfty;
246 phssfty.U = convctrl->PHSSFTY.U;
247
248 phssfty.B.FICN0 = 0;
249 phssfty.B.FICN1 = 1;
250
251 convctrl->PHSSFTY.U = phssfty.U;
252 }
253
254
255 IFX_INLINE void IfxConvctrl_injectPhaseSyncDividerFault(Ifx_CONVERTER *convctrl)
256 {
257 /*Writing 0 into FIPD0 and 1 into FIPD1 simultaneously*/
258
259 Ifx_CONVERTER_PHSSFTY phssfty;
260 phssfty.U = convctrl->PHSSFTY.U;
261
262 phssfty.B.FIPD0 = 0;
263 phssfty.B.FIPD1 = 1;
264
265 convctrl->PHSSFTY.U = phssfty.U;
266 }
267
268
269 IFX_INLINE boolean IfxConvctrl_isErrorDetected(Ifx_CONVERTER *convctrl)
270 {
271 return convctrl->PHSSFTY.B.ALF;
272 }
273
274
275 IFX_INLINE boolean IfxConvctrl_isModuleSuspended(Ifx_CONVERTER *convctrl)
276 {
277 return convctrl->OCS.B.SUSSTA;
278 }
279
280
281 IFX_INLINE void IfxConvctrl_lockConfigurationAccess(Ifx_CONVERTER *convctrl)
282 {
283 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
284 IfxScuWdt_clearCpuEndinit(passwd);
285
286 convctrl->CCCTRL.B.TC = 0x0;
287
288 IfxScuWdt_setCpuEndinit(passwd);
289 }
290
291
292 IFX_INLINE void IfxConvctrl_setDividerValue(Ifx_CONVERTER *convctrl, IfxConvctrl_PhaseSynchronizerDivider dividerValue)
293 {
294 Ifx_CONVERTER_PHSCFG phscfg;
295
296 phscfg.U = convctrl->PHSCFG.U;
297
298 phscfg.B.PDWC = 1; /*Enabling write access to Phase Synchronizer Divider(PHSDIV) */
299
300 phscfg.B.PHSDIV = dividerValue;
301
302 convctrl->PHSCFG.U = phscfg.U;
303 }
304
305
306 IFX_INLINE void IfxConvctrl_setSuspendMode(Ifx_CONVERTER *convctrl, IfxConvctrl_SuspendMode mode)
307 {
308 Ifx_CONVERTER_OCS ocs;
309
310 ocs.U = convctrl->OCS.U;
311 /* remove protection and configure the suspend mode */
312 ocs.B.SUS_P = 1;
313 ocs.B.SUS = mode;
314 convctrl->OCS.U = ocs.U;
315 }
316
317
318 #endif /* IFXCONVCTRL_H */
IfxConvctrl_PhaseSynchronizerDivider_7
The phase synchronization signal is generated at fPER / 7.
Definition: IfxConvctrl.h:80
IfxConvctrl_PhaseSynchronizerDivider
IfxConvctrl_PhaseSynchronizerDivider
Prescaling factor between the peripheral clock and the phase synchronization signal.To be filled in PHSCFG.B.PHSDIV.
Definition: IfxConvctrl.h:72
IfxConvctrl_PhaseSynchronizerDivider_11
The phase synchronization signal is generated at fPER / 11.
Definition: IfxConvctrl.h:84
IfxConvctrl_SuspendMode_2
Disable the Phase Synchronizer.
Definition: IfxConvctrl.h:99
IfxConvctrl_injectPhaseSyncDividerFault
IFX_INLINE void IfxConvctrl_injectPhaseSyncDividerFault(Ifx_CONVERTER *convctrl)
Introducing fault in Phase Synchronizer Divider(PHSDIV)
Definition: IfxConvctrl.h:255
IfxConvctrl_resetModule
IFX_EXTERN void IfxConvctrl_resetModule(Ifx_CONVERTER *convctrl)
Definition: IfxConvctrl.c:52
IfxConvctrl_setDividerValue
IFX_INLINE void IfxConvctrl_setDividerValue(Ifx_CONVERTER *convctrl, IfxConvctrl_PhaseSynchronizerDivider dividerValue)
Set the Phase Synchronizer Divider value.
Definition: IfxConvctrl.h:292
Ifx_Assert.h
Assert functions.
IfxConvctrl_PhaseSynchronizerDivider_off
Off, the phase synchronization signal is constantly active.
Definition: IfxConvctrl.h:74
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxCpu_Intrinsics.h
IfxConvctrl_PhaseSynchronizerDivider_10
The phase synchronization signal is generated at fPER / 10.
Definition: IfxConvctrl.h:83
IfxConvctrl_SuspendMode_1
Suspend Mode 1 : Stop generating synchronization pulses.
Definition: IfxConvctrl.h:98
IfxConvctrl_PhaseSynchronizerDivider_16
The phase synchronization signal is generated at fPER / 15.
Definition: IfxConvctrl.h:89
IfxScuWdt.h
SCU basic functionality.
IfxConvctrl_lockConfigurationAccess
IFX_INLINE void IfxConvctrl_lockConfigurationAccess(Ifx_CONVERTER *convctrl)
Definition: IfxConvctrl.h:281
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxConvctrl_initializeModule
IFX_INLINE void IfxConvctrl_initializeModule(Ifx_CONVERTER *convctrl, IfxConvctrl_PhaseSynchronizerDivider divisionFactor)
Definition: IfxConvctrl.h:232
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxConvctrl_PhaseSynchronizerDivider_5
The phase synchronization signal is generated at fPER / 5.
Definition: IfxConvctrl.h:78
IfxConvctrl_PhaseSynchronizerDivider_12
The phase synchronization signal is generated at fPER / 12.
Definition: IfxConvctrl.h:85
IfxConvctrl_PhaseSynchronizerDivider_8
The phase synchronization signal is generated at fPER / 8.
Definition: IfxConvctrl.h:81
IfxConvctrl_injectCounterFault
IFX_INLINE void IfxConvctrl_injectCounterFault(Ifx_CONVERTER *convctrl)
Introducing fault in the Down Counter.
Definition: IfxConvctrl.h:241
IfxConvctrl_PhaseSynchronizerDivider_4
The phase synchronization signal is generated at fPER / 4.
Definition: IfxConvctrl.h:77
IfxConvctrl_PhaseSynchronizerDivider_3
The phase synchronization signal is generated at fPER / 3.
Definition: IfxConvctrl.h:76
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxConvctrl_PhaseSynchronizerDivider_2
The phase synchronization signal is generated at fPER / 2.
Definition: IfxConvctrl.h:75
IfxConvctrl_enableConfigurationAccess
IFX_INLINE void IfxConvctrl_enableConfigurationAccess(Ifx_CONVERTER *convctrl)
Access to all CONVCTRL registers is enabled.
Definition: IfxConvctrl.h:211
IfxConvctrl_isErrorDetected
IFX_INLINE boolean IfxConvctrl_isErrorDetected(Ifx_CONVERTER *convctrl)
Definition: IfxConvctrl.h:269
IfxScuCcu.h
SCU basic functionality.
IfxConvctrl_setSuspendMode
IFX_INLINE void IfxConvctrl_setSuspendMode(Ifx_CONVERTER *convctrl, IfxConvctrl_SuspendMode mode)
Configure the suspend mode.
Definition: IfxConvctrl.h:306
IfxConvctrl_PhaseSynchronizerDivider_13
The phase synchronization signal is generated at fPER / 13.
Definition: IfxConvctrl.h:86
IfxConvctrl_SuspendMode_noSuspend
Module will not suspent.
Definition: IfxConvctrl.h:97
IfxConvctrl_PhaseSynchronizerDivider_9
The phase synchronization signal is generated at fPER / 9.
Definition: IfxConvctrl.h:82
IfxConvctrl_enableModule
IFX_INLINE void IfxConvctrl_enableModule(Ifx_CONVERTER *convctrl)
Enables the module clock, thereby enabling the module.
Definition: IfxConvctrl.h:222
IfxConvctrl_cfg.h
CONVCTRL on-chip implementation data.
IfxConvctrl_SuspendMode
IfxConvctrl_SuspendMode
Modes of sensitivity to the suspend signal coming from the OCDS Trigger Switch (OTGS). To be filled in OCS.B.SUS.
Definition: IfxConvctrl.h:95
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxConvctrl_PhaseSynchronizerDivider_6
The phase synchronization signal is generated at fPER / 6.
Definition: IfxConvctrl.h:79
IfxConvctrl_clearAlarmFlag
IFX_INLINE void IfxConvctrl_clearAlarmFlag(Ifx_CONVERTER *convctrl)
This will disable all the Converter Controller Alarms(from reaching out of module) in addition to cle...
Definition: IfxConvctrl.h:205
IfxConvctrl_PhaseSynchronizerDivider_15
The phase synchronization signal is generated at fPER / 15.
Definition: IfxConvctrl.h:88
IfxConvctrl_PhaseSynchronizerDivider_14
The phase synchronization signal is generated at fPER / 14.
Definition: IfxConvctrl.h:87
IfxConvctrl_isModuleSuspended
IFX_INLINE boolean IfxConvctrl_isModuleSuspended(Ifx_CONVERTER *convctrl)
Definition: IfxConvctrl.h:275


iLLD_TC38A: IfxConvctrl_cfg.h Source File

  • _Impl
IfxConvctrl_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxConvctrl_cfg.h
3 * \brief CONVCTRL on-chip implementation data
4 * \ingroup IfxLld_Convctrl
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Convctrl CONVCTRL
42 * \ingroup IfxLld
43 * \defgroup IfxLld_Convctrl_Impl Implementation
44 * \ingroup IfxLld_Convctrl
45 * \defgroup IfxLld_Convctrl_Std Standard Driver
46 * \ingroup IfxLld_Convctrl
47 */
48
49 #ifndef IFXCONVCTRL_CFG_H
50 #define IFXCONVCTRL_CFG_H 1
51
52 /******************************************************************************/
53 /*----------------------------------Includes----------------------------------*/
54 /******************************************************************************/
55
56 #endif /* IFXCONVCTRL_CFG_H */


iLLD_TC38A: IfxCpu.c Source File

  • Cpu
  • Std
IfxCpu.c
Go to the documentation of this file.
1 /**
2 * \file IfxCpu.c
3 * \brief CPU basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 *
41 */
42
43 /******************************************************************************/
44 /*----------------------------------Includes----------------------------------*/
45 /******************************************************************************/
46
47 #include "IfxCpu.h"
48 #include "Pms/Std/IfxPmsPm.h"
49
50 /******************************************************************************/
51 /*-------------------------Function Implementations---------------------------*/
52 /******************************************************************************/
53
54 boolean IfxCpu_acquireMutex(IfxCpu_mutexLock *lock)
55 {
56 boolean retVal;
57 volatile uint32 spinLockVal;
58
59 retVal = FALSE;
60
61 spinLockVal = 1UL;
62 spinLockVal =
63 (uint32)__cmpAndSwap(((unsigned int *)lock), spinLockVal, 0);
64
65 /* Check if the SpinLock WAS set before the attempt to acquire spinlock */
66 if (spinLockVal == 0)
67 {
68 retVal = TRUE;
69 }
70
71 return retVal;
72 }
73
74
75 void IfxCpu_disableOverlayBlock(IfxCpu_ResourceCpu cpu, uint16 overlayBlock)
76 {
77 Ifx_CPU *ovcSfrBase = NULL_PTR;
78
79 Ifx_SCU_OVCCON ovccon;
80 Ifx_SCU_OVCENABLE ovcenable;
81 uint16 safetyWdtPw = IfxScuWdt_getSafetyWatchdogPassword();
82 IfxScuWdt_clearSafetyEndinit(safetyWdtPw);
83 ovccon.U = MODULE_SCU.OVCCON.U;
84 ovcenable.U = MODULE_SCU.OVCENABLE.U;
85
86 /* Disable Overlay in SCU */
87 switch (cpu)
88 {
89 case IfxCpu_ResourceCpu_1:
90 ovcSfrBase = &MODULE_CPU1;
91 ovcenable.B.OVEN1 = 0;
92 ovccon.B.CSEL1 = 0;
93 break;
94 case IfxCpu_ResourceCpu_2:
95 ovcSfrBase = &MODULE_CPU2;
96 ovcenable.B.OVEN2 = 0;
97 ovccon.B.CSEL2 = 0;
98 break;
99
100 case IfxCpu_ResourceCpu_3:
101 ovcSfrBase = &MODULE_CPU3;
102 ovcenable.B.OVEN3 = 0;
103 ovccon.B.CSEL3 = 0;
104 break;
105 default:
106 ovcSfrBase = &MODULE_CPU0;
107 ovcenable.B.OVEN0 = 0;
108 ovccon.B.CSEL0 = 0;
109 break;
110 }
111
112 ovccon.B.OVSTP = 1;
113 ovccon.B.DCINVAL = 1;
114 MODULE_SCU.OVCCON.U = ovccon.U;
115 MODULE_SCU.OVCENABLE.U = ovcenable.U;
116 IfxScuWdt_setSafetyEndinit(safetyWdtPw);
117
118 ovcSfrBase->BLK[overlayBlock].RABR.U = 0;
119 ovcSfrBase->BLK[overlayBlock].OTAR.U = 0;
120 ovcSfrBase->BLK[overlayBlock].OMASK.U = 0;
121 }
122
123
124 void IfxCpu_enableOverlayBlock(IfxCpu_ResourceCpu cpu, uint16 overlayBlock, IfxCpu_OverlayMemorySelect overlayMemorySelect, IfxCpu_OverlayAddressMask overlayAddressMask, uint32 targetBaseAddress, uint32 overlayBaseAddress)
125 {
126 Ifx_CPU *ovcSfrBase = NULL_PTR;
127
128 switch (cpu)
129 {
130 case IfxCpu_ResourceCpu_1:
131 ovcSfrBase = &MODULE_CPU1;
132 break;
133 case IfxCpu_ResourceCpu_2:
134 ovcSfrBase = &MODULE_CPU2;
135 break;
136
137 case IfxCpu_ResourceCpu_3:
138 ovcSfrBase = &MODULE_CPU3;
139 break;
140
141 default:
142 ovcSfrBase = &MODULE_CPU0;
143 break;
144 }
145
146 /* Select overlay Block */
147 ovcSfrBase->OSEL.U |= 1 << overlayBlock;
148
149 /* Configure ovcBlock */
150 Ifx_CPU_BLK_RABR rabr;
151 Ifx_CPU_BLK_OTAR otar;
152 rabr.U = 0;
153 rabr.B.OMEM = overlayMemorySelect;
154 rabr.B.OBASE = overlayBaseAddress >> 5;
155
156 otar.U = 0;
157 otar.B.TBASE = targetBaseAddress >> 5;
158
159 ovcSfrBase->BLK[overlayBlock].RABR.U = rabr.U;
160 ovcSfrBase->BLK[overlayBlock].OTAR.U = otar.U;
161 ovcSfrBase->BLK[overlayBlock].OMASK.U = ((overlayAddressMask << 5) & 0x0001FFE0);
162
163 /* Enable Overlay in SCU */
164 uint16 safetyWdtPw = IfxScuWdt_getSafetyWatchdogPassword();
165 IfxScuWdt_clearSafetyEndinit(safetyWdtPw);
166 Ifx_SCU_OVCCON ovccon;
167 ovccon.U = MODULE_SCU.OVCCON.U;
168
169 switch (cpu)
170 {
171 case IfxCpu_ResourceCpu_1:
172 MODULE_SCU.OVCENABLE.B.OVEN1 = 1;
173 ovccon.B.CSEL1 = 1;
174 break;
175 case IfxCpu_ResourceCpu_2:
176 MODULE_SCU.OVCENABLE.B.OVEN2 = 1;
177 ovccon.B.CSEL2 = 1;
178 break;
179 case IfxCpu_ResourceCpu_3:
180 MODULE_SCU.OVCENABLE.B.OVEN3 = 1;
181 ovccon.B.CSEL3 = 1;
182 break;
183 default:
184 MODULE_SCU.OVCENABLE.B.OVEN0 = 1;
185 ovccon.B.CSEL0 = 1;
186 break;
187 }
188
189 ovccon.B.OVSTRT = 1;
190 MODULE_SCU.OVCCON.U = ovccon.U;
191 IfxScuWdt_setSafetyEndinit(safetyWdtPw);
192 }
193
194
195 IfxCpu_CoreMode IfxCpu_getCoreMode(Ifx_CPU *cpu)
196 {
197 IfxCpu_CoreMode cpuMode;
198 Ifx_CPU_DBGSR dbgsr;
199 IfxCpu_ResourceCpu index = IfxCpu_getIndex(cpu);
200
201 volatile Ifx_SCU_PMCSR0 *pmcsr_val0;
202 volatile Ifx_SCU_PMCSR1 *pmcsr_val1;
203 volatile Ifx_SCU_PMCSR2 *pmcsr_val2;
204 volatile Ifx_SCU_PMCSR3 *pmcsr_val3;
205 cpuMode = IfxCpu_CoreMode_unknown;
206
207 /*get the DBGSR.HALT status */
208 /*Check if the request is done for same cpu as the host for this call */
209 if (IfxCpu_getCoreIndex() != index)
210 { /*status request is for other cpu than the host */
211 dbgsr = cpu->DBGSR;
212 }
213 else
214 { /*status request is for same cpu as the host */
215 dbgsr.U = __mfcr(CPU_DBGSR);
216 }
217
218 /*Check if the requested CPU is in DBG HALT mode */
219 if (dbgsr.B.HALT == (uint32)IfxCpu_DBGST_HALT_halt)
220 { /*CPU is in DBG HALT mode */
221 cpuMode = IfxCpu_CoreMode_halt;
222 }
223 else
224 {
225 if (dbgsr.B.HALT == (uint32)IfxCpu_DBGST_HALT_run)
226 { /*CPU is in DBG RUNNING mode now check PMCSR status */
227 switch (index)
228 {
229 case IfxCpu_ResourceCpu_0:
230
231 pmcsr_val0 = &MODULE_SCU.PMCSR0;
232
233 if (pmcsr_val0->B.PMST == (uint32)IfxCpu_PMCSR_PMST_normalMode)
234 { /*Cpu is in normal run mode */
235 cpuMode = IfxCpu_CoreMode_run;
236 }
237 else
238 { /*Cpu is not in run mode */
239 if (pmcsr_val0->B.PMST == (uint32)IfxCpu_PMCSR_PMST_idleMode)
240 { /*Cpu is in idle mode */
241 cpuMode = IfxCpu_CoreMode_idle;
242 }
243 }
244
245 break;
246 case IfxCpu_ResourceCpu_1:
247
248 pmcsr_val1 = &MODULE_SCU.PMCSR1;
249
250 if (pmcsr_val1->B.PMST == (uint32)IfxCpu_PMCSR_PMST_normalMode)
251 { /*Cpu is in normal run mode */
252 cpuMode = IfxCpu_CoreMode_run;
253 }
254 else
255 { /*Cpu is not in run mode */
256 if (pmcsr_val1->B.PMST == (uint32)IfxCpu_PMCSR_PMST_idleMode)
257 { /*Cpu is in idle mode */
258 cpuMode = IfxCpu_CoreMode_idle;
259 }
260 }
261
262 break;
263 case IfxCpu_ResourceCpu_2:
264
265 pmcsr_val2 = &MODULE_SCU.PMCSR2;
266
267 if (pmcsr_val2->B.PMST == (uint32)IfxCpu_PMCSR_PMST_normalMode)
268 { /*Cpu is in normal run mode */
269 cpuMode = IfxCpu_CoreMode_run;
270 }
271 else
272 { /*Cpu is not in run mode */
273 if (pmcsr_val2->B.PMST == (uint32)IfxCpu_PMCSR_PMST_idleMode)
274 { /*Cpu is in idle mode */
275 cpuMode = IfxCpu_CoreMode_idle;
276 }
277 }
278
279 break;
280 case IfxCpu_ResourceCpu_3:
281
282 pmcsr_val3 = &MODULE_SCU.PMCSR3;
283
284 if (pmcsr_val3->B.PMST == (uint32)IfxCpu_PMCSR_PMST_normalMode)
285 { /*Cpu is in normal run mode */
286 cpuMode = IfxCpu_CoreMode_run;
287 }
288 else
289 { /*Cpu is not in run mode */
290 if (pmcsr_val3->B.PMST == (uint32)IfxCpu_PMCSR_PMST_idleMode)
291 { /*Cpu is in idle mode */
292 cpuMode = IfxCpu_CoreMode_idle;
293 }
294 }
295
296 break;
297 default:
298 /* Invalid core selected */
299 break;
300 }
301 }
302 }
303
304 return cpuMode;
305 }
306
307
308 IfxCpu_ResourceCpu IfxCpu_getIndex(Ifx_CPU *cpu)
309 {
310 IfxCpu_ResourceCpu result;
311 uint32 index;
312 result = IfxCpu_ResourceCpu_none;
313
314 for (index = 0; index < IFXCPU_NUM_MODULES; index++)
315 {
316 if (IfxCpu_cfg_indexMap[index].module == cpu)
317 {
318 result = (IfxCpu_ResourceCpu)IfxCpu_cfg_indexMap[index].index;
319 break;
320 }
321 }
322
323 return result;
324 }
325
326
327 uint32 IfxCpu_getRandomValue(uint32 *seed)
328 {
329 /*************************************************************************
330 * the choice of a and m is important for a long period of the LCG
331 * with a = 279470273 and
332 * m = 4294967291
333 * a maximum period of 2^32-5 is given
334 * values for a:
335 * 0x5EB0A82F = 1588635695
336 * 0x48E7211F = 1223106847
337 * 0x10a860c1 = 279470273
338 ***************************************************************************/
339 uint32 x = *seed;
340
341 /* a seed of 0 is not allowed, and therefore will be changed to a valid value */
342 if (x == 0)
343 {
344 x = 42;
345 }
346
347 uint32 a = 0x10a860c1; // 279470273
348 uint32 m = 0xfffffffb; // 4294967291
349 uint32 result;
350
351 //__asm(a,m,x,tmp1,tmp2 );
352 //EhEl = a * x;
353 //result = e14 % m;
354 // %0 result
355 // %1 a
356 // %2 x
357 // %3 m
358 result = IfxCpu_getRandomVal(a, x, m);
359
360 *seed = result; // to simplify seed passing
361
362 return result;
363 }
364
365
366 uint32 IfxCpu_getRandomValueWithinRange(uint32 *seed, uint32 min, uint32 max)
367 {
368 uint32 new_value = IfxCpu_getRandomValue(seed);
369
370 /* swap min/max if required */
371 if (min > max)
372 {
373 unsigned swap = max;
374 max = min;
375 min = swap;
376 }
377
378 /* special case */
379 if ((min == 0) && (max == 0xffffffff))
380 {
381 return new_value;
382 }
383
384 /* return value within range */
385 return (new_value % (max - min + 1)) + min;
386 }
387
388
389 void IfxCpu_releaseMutex(IfxCpu_mutexLock *lock)
390 {
391 /*Reset the SpinLock*/
392 *lock = 0;
393 }
394
395
396 void IfxCpu_resetSpinLock(IfxCpu_spinLock *lock)
397 {
398 /*Reset the SpinLock*/
399 *lock = 0;
400 }
401
402
403 boolean IfxCpu_setCoreMode(Ifx_CPU *cpu, IfxCpu_CoreMode mode)
404 {
405 IfxCpu_ResourceCpu cpuIndex;
406 cpuIndex = IfxCpu_getIndex(cpu);
407 return IfxPmsPm_setCoreMode(cpuIndex, mode);
408 }
409
410
411 boolean IfxCpu_setProgramCounter(Ifx_CPU *cpu, uint32 programCounter)
412 {
413 boolean retVal = TRUE;
414
415 if (cpu == IfxCpu_getAddress(IfxCpu_getCoreIndex()))
416 {
417 retVal = FALSE;
418 }
419 else
420 {
421 cpu->PC.B.PC = programCounter >> 1;
422 }
423
424 return retVal;
425 }
426
427
428 boolean IfxCpu_setSpinLock(IfxCpu_spinLock *lock, uint32 timeoutCount)
429 {
430 boolean retVal;
431 volatile uint32 spinLockVal;
432
433 retVal = FALSE;
434
435 do
436 {
437 spinLockVal = 1UL;
438 spinLockVal =
439 (uint32)__cmpAndSwap(((unsigned int *)lock), spinLockVal, 0);
440
441 /* Check if the SpinLock WAS set before the attempt to acquire spinlock */
442 if (spinLockVal == 0)
443 {
444 retVal = TRUE;
445 }
446 else
447 {
448 timeoutCount--;
449 }
450 } while ((retVal == FALSE) && (timeoutCount > 0));
451
452 return retVal;
453 }
454
455
456 boolean IfxCpu_startCore(Ifx_CPU *cpu, uint32 programCounter)
457 {
458 boolean retVal = TRUE;
459
460 /* Set the PC */
461 retVal &= IfxCpu_setProgramCounter(cpu, programCounter);
462
463 /* release boot halt mode if required */
464 {
465 Ifx_CPU_SYSCON syscon;
466 syscon = cpu->SYSCON;
467
468 if (syscon.B.BHALT)
469 {
470 syscon.B.BHALT = 0; cpu->SYSCON = syscon;
471 }
472 }
473
474 return retVal;
475 }
476
477
478 boolean IfxCpu_waitEvent(IfxCpu_syncEvent *event, uint32 timeoutMilliSec)
479 {
480 volatile uint32 *sync = (volatile uint32 *)IFXCPU_GLB_ADDR_DSPR(__mfcr(CPU_CORE_ID), event);
481
482 boolean errorcnt = 0U;
483 /* Divide with 1000, gives the count value equivalent to milliseconds */
484 uint32 stmCount = (uint32)((IfxScuCcu_getStmFrequency() / 1000) * timeoutMilliSec);
485 uint32 stmCountBegin = STM0_TIM0.U;
486
487 while ((*sync & IFXCPU_CFG_ALLCORE_DONE) != IFXCPU_CFG_ALLCORE_DONE)
488 {
489 __nop();
490
491 if ((uint32)(STM0_TIM0.U - stmCountBegin) >= stmCount)
492 {
493 errorcnt = 1;
494 break;
495 }
496
497 /* There is no need to check overflow of the STM timer.
498 * When counter after overflow subtracted with counter before overflow,
499 * the subtraction result will be as expected, as long as both are unsigned 32 bits
500 * eg: stmCountBegin= 0xFFFFFFFE (before overflow)
501 * stmCountNow = 0x00000002 (before overflow)
502 * diff= stmCountNow - stmCountBegin = 4 as expected.*/
503 }
504
505 return errorcnt;
506 }
507
508
509 void IfxCpu_emitEvent(IfxCpu_syncEvent *event)
510 {
511 Ifx__imaskldmst(event, 1, __mfcr(CPU_CORE_ID), 1);
512 }
513
514
515 void IfxCpu_triggerCpuReset(IfxCpu_ResourceCpu coreIndex)
516 {
517 if (coreIndex != IfxCpu_getCoreIndex())
518 {
519 uint16 password = IfxScuWdt_getGlobalEndinitPassword();
520 Ifx_CPU *cpu = IfxCpu_getAddress(coreIndex);
521 IfxScuWdt_clearGlobalEndinit(password);
522 cpu->KRST0.B.RST = 1;
523 cpu->KRST1.B.RST = 1;
524 IfxScuWdt_setGlobalEndinit(password);
525 }
526
527 else
528
529 {
530 //Do nothing because one cannot set the endinit back from the same CPU which is reset
531 }
532 }
533
534
535 IfxCpu_ResetStatus IfxCpu_getCpuResetStatus(IfxCpu_ResourceCpu coreIndex)
536 {
537 Ifx_CPU *cpu = IfxCpu_getAddress(coreIndex);
538 IfxCpu_ResetStatus status = (IfxCpu_ResetStatus)cpu->KRST0.B.RSTSTAT;
539 cpu->KRSTCLR.B.CLR = 1;
540 return status;
541 }
542
543
544 void IfxCpu_setAllIdleExceptMasterCpu(IfxCpu_ResourceCpu masterCpu)
545 {
546 uint16 endinitSfty_pw;
547 endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPasswordInline();
548 IfxScuWdt_clearSafetyEndinitInline(endinitSfty_pw);
549
550 switch (masterCpu)
551 {
552 case IfxCpu_ResourceCpu_0:
553 SCU_PMCSR1.B.REQSLP = 0x1;
554
555 while (SCU_PMSTAT0.B.CPU1)
556 {}
557
558 SCU_PMCSR2.B.REQSLP = 0x1;
559
560 while (SCU_PMSTAT0.B.CPU2)
561 {}
562
563 SCU_PMCSR3.B.REQSLP = 0x1;
564
565 while (SCU_PMSTAT0.B.CPU3)
566 {}
567
568 break;
569
570 case IfxCpu_ResourceCpu_1:
571 SCU_PMCSR0.B.REQSLP = 0x1;
572
573 while (SCU_PMSTAT0.B.CPU0)
574 {}
575
576 SCU_PMCSR2.B.REQSLP = 0x1;
577
578 while (SCU_PMSTAT0.B.CPU2)
579 {}
580
581 SCU_PMCSR3.B.REQSLP = 0x1;
582
583 while (SCU_PMSTAT0.B.CPU3)
584 {}
585
586 break;
587
588 case IfxCpu_ResourceCpu_2:
589 SCU_PMCSR0.B.REQSLP = 0x1;
590
591 while (SCU_PMSTAT0.B.CPU0)
592 {}
593
594 SCU_PMCSR1.B.REQSLP = 0x1;
595
596 while (SCU_PMSTAT0.B.CPU1)
597 {}
598
599 SCU_PMCSR3.B.REQSLP = 0x1;
600
601 while (SCU_PMSTAT0.B.CPU3)
602 {}
603
604 break;
605
606 case IfxCpu_ResourceCpu_3:
607 SCU_PMCSR0.B.REQSLP = 0x1;
608
609 while (SCU_PMSTAT0.B.CPU0)
610 {}
611
612 SCU_PMCSR1.B.REQSLP = 0x1;
613
614 while (SCU_PMSTAT0.B.CPU1)
615 {}
616
617 SCU_PMCSR2.B.REQSLP = 0x1;
618
619 while (SCU_PMSTAT0.B.CPU2)
620 {}
621
622 break;
623 default:
624 /* Invalid core selected */
625 break;
626 }
627
628 IfxScuWdt_setSafetyEndinitInline(endinitSfty_pw);
629 }
630
631
632 void IfxCpu_disableInterruptsAllExceptMaster(IfxCpu_ResourceCpu masterCpu)
633 {
634 uint16 password = IfxScuWdt_getGlobalEndinitPassword();
635 IfxScuWdt_clearGlobalEndinit(password);
636
637 switch (masterCpu)
638 {
639 case IfxCpu_ResourceCpu_0:
640 CPU1_ICR.B.IE = 0;
641
642 while (CPU1_ICR.B.IE)
643 {}
644
645 CPU2_ICR.B.IE = 0;
646
647 while (CPU2_ICR.B.IE)
648 {}
649
650 CPU3_ICR.B.IE = 0;
651
652 while (CPU3_ICR.B.IE)
653 {}
654
655 break;
656
657 case IfxCpu_ResourceCpu_1:
658 CPU0_ICR.B.IE = 0;
659
660 while (CPU0_ICR.B.IE)
661 {}
662
663 CPU2_ICR.B.IE = 0;
664
665 while (CPU2_ICR.B.IE)
666 {}
667
668 CPU3_ICR.B.IE = 0;
669
670 while (CPU3_ICR.B.IE)
671 {}
672
673 break;
674
675 case IfxCpu_ResourceCpu_2:
676 CPU0_ICR.B.IE = 0;
677
678 while (CPU0_ICR.B.IE)
679 {}
680
681 CPU1_ICR.B.IE = 0;
682
683 while (CPU1_ICR.B.IE)
684 {}
685
686 CPU3_ICR.B.IE = 0;
687
688 while (CPU3_ICR.B.IE)
689 {}
690
691 break;
692
693 case IfxCpu_ResourceCpu_3:
694 CPU0_ICR.B.IE = 0;
695
696 while (CPU0_ICR.B.IE)
697 {}
698
699 CPU1_ICR.B.IE = 0;
700
701 while (CPU1_ICR.B.IE)
702 {}
703
704 CPU2_ICR.B.IE = 0;
705
706 while (CPU2_ICR.B.IE)
707 {}
708
709 break;
710 default:
711 /* Invalid core selected */
712 break;
713 }
714
715 IfxScuWdt_setGlobalEndinit(password);
716 }
IfxScuWdt_setSafetyEndinitInline
IFX_INLINE void IfxScuWdt_setSafetyEndinitInline(uint16 password)
SCUWDT Inline API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.h:689
IfxScuWdt_getSafetyWatchdogPasswordInline
IFX_INLINE uint16 IfxScuWdt_getSafetyWatchdogPasswordInline(void)
SCUWDT Inline API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.h:641
IfxScuWdt_clearGlobalEndinit
void IfxScuWdt_clearGlobalEndinit(uint16 password)
API to Clear global ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:255
IfxCpu_getAddress
IFX_INLINE Ifx_CPU * IfxCpu_getAddress(IfxCpu_ResourceCpu cpu)
API to get the address for CPU HW module register memory map.
Definition: IfxCpu.h:834
IfxCpu_setCoreMode
boolean IfxCpu_setCoreMode(Ifx_CPU *cpu, IfxCpu_CoreMode mode)
API to set mode of the CPU.
Definition: IfxCpu.c:403
IfxCpu_DBGST_HALT_halt
Definition: IfxCpu_cfg.h:119
IfxCpu_getRandomValueWithinRange
uint32 IfxCpu_getRandomValueWithinRange(uint32 *seed, uint32 min, uint32 max)
API to get random value with in the range.
Definition: IfxCpu.c:366
IfxCpu_acquireMutex
boolean IfxCpu_acquireMutex(IfxCpu_mutexLock *lock)
API to acquire the mutex (binary semaphore).
Definition: IfxCpu.c:54
IfxScuWdt_clearSafetyEndinitInline
IFX_INLINE void IfxScuWdt_clearSafetyEndinitInline(uint16 password)
SCUWDT Inline API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.h:581
Ifx__imaskldmst
asm volatile void Ifx__imaskldmst(void *a, sint32 b, sint32 p, const sint32 w)
Definition: IfxCpu_IntrinsicsDcc.h:436
IfxCpu_CoreMode_idle
Definition: IfxCpu.h:133
IfxCpu_emitEvent
void IfxCpu_emitEvent(IfxCpu_syncEvent *event)
This function sets a bit corresponding to the core in the event.
Definition: IfxCpu.c:509
IFXCPU_CFG_ALLCORE_DONE
#define IFXCPU_CFG_ALLCORE_DONE
All cores (coreIDs) mask. This macro can be defined by the user according to the number of core being...
Definition: IfxCpu_cfg.h:95
IfxCpu_OverlayAddressMask
IfxCpu_OverlayAddressMask
Overlay Address Mask: determines the overlay block size and the bits used for address comparison and ...
Definition: IfxCpu.h:149
__mfcr
sint32 __mfcr(const uint32) __attribute__((intrinsic_function(0x101
IfxCpu_ResourceCpu_none
None of the CPU.
Definition: IfxCpu_cfg.h:163
IfxScuWdt_setGlobalEndinit
void IfxScuWdt_setGlobalEndinit(uint16 password)
API to set global ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:619
IfxCpu_triggerCpuReset
void IfxCpu_triggerCpuReset(IfxCpu_ResourceCpu coreIndex)
To request reset of a particular core, given by coreId.
Definition: IfxCpu.c:515
IfxCpu_syncEvent
unsigned int IfxCpu_syncEvent
Event used for synchronisation.
Definition: IfxCpu.h:119
IfxCpu_getRandomVal
asm volatile uint32 IfxCpu_getRandomVal(uint32 a, uint32 x, uint32 m)
Generate the Random value.
Definition: IfxCpu_IntrinsicsDcc.h:1534
__nop
void __nop(void) __attribute__((intrinsic_function(0x103
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxCpu_CoreMode
IfxCpu_CoreMode
Enumeration for the Cpu mode.
Definition: IfxCpu.h:129
IfxCpu_waitEvent
boolean IfxCpu_waitEvent(IfxCpu_syncEvent *event, uint32 timeoutMilliSec)
This function waits till all the cores have set their corresponding bits in the event. This function along with IfxCpu_emitEvent() are used to achieve the synchronisation between the configured cores. By default "IFXCPU_CFG_ALLCORE_DONE" macro defined for all the cores. In case the user wants to check for synchronisation among the required cores, the macro can be redefined with the value accroing to the CORE_ID register. The IfxCpu_emitEvent() is to be used in the Main functions of the Cores where the user wants to check for synchronisation.
Definition: IfxCpu.c:478
IfxCpu_getRandomValue
uint32 IfxCpu_getRandomValue(uint32 *seed)
API to get random value.
Definition: IfxCpu.c:327
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxScuCcu_getStmFrequency
IFX_INLINE float32 IfxScuCcu_getStmFrequency(void)
API to get STM divider frequency. This API returns the based on the divider value in CCUCON register ...
Definition: IfxScuCcu.h:1673
IfxCpu_PMCSR_PMST_normalMode
Definition: IfxCpu_cfg.h:148
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxCpu_getCpuResetStatus
IfxCpu_ResetStatus IfxCpu_getCpuResetStatus(IfxCpu_ResourceCpu coreIndex)
Retrieve the cause of reset(no reset, hardware(SMU) or software) since last clear by reading KRST0...
Definition: IfxCpu.c:535
IfxCpu_releaseMutex
void IfxCpu_releaseMutex(IfxCpu_mutexLock *lock)
API to unlock the mutex .
Definition: IfxCpu.c:389
IfxCpu_PMCSR_PMST_idleMode
Definition: IfxCpu_cfg.h:150
IfxScuWdt_clearSafetyEndinit
void IfxScuWdt_clearSafetyEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:305
IfxCpu_DBGST_HALT_run
Definition: IfxCpu_cfg.h:118
IfxCpu_ResourceCpu
IfxCpu_ResourceCpu
List of the available CPU resources.
Definition: IfxCpu_cfg.h:157
IfxCpu_disableInterruptsAllExceptMaster
void IfxCpu_disableInterruptsAllExceptMaster(IfxCpu_ResourceCpu masterCpu)
Disables interrupts for all CPUs except the Master CPU,index of which is given as the parameter...
Definition: IfxCpu.c:632
IfxCpu_ResetStatus
IfxCpu_ResetStatus
Definition: IfxCpu.h:177
max
sint32 max
Definition: IfxCpu_IntrinsicsDcc.h:149
IfxCpu_ResourceCpu_2
CPU 2.
Definition: IfxCpu_cfg.h:161
IfxPmsPm.h
PMS basic functionality.
IfxScuWdt_getGlobalEndinitPassword
uint16 IfxScuWdt_getGlobalEndinitPassword(void)
API to fetch current password of global endinit Watchdog module.
Definition: IfxScuWdt.c:363
IfxCpu_getIndex
IfxCpu_ResourceCpu IfxCpu_getIndex(Ifx_CPU *cpu)
API to get current mode of CPU.
Definition: IfxCpu.c:308
IFXCPU_GLB_ADDR_DSPR
#define IFXCPU_GLB_ADDR_DSPR(cpu, address)
Convert local DSPR address to global DSPR address which can be accessed from the SRI bus...
Definition: IfxCpu.h:90
IfxCpu_mutexLock
unsigned int IfxCpu_mutexLock
Lock type Mutex lock.
Definition: IfxCpu.h:115
IfxCpu_OverlayMemorySelect
IfxCpu_OverlayMemorySelect
Selects overlay memory used for redirection.
Definition: IfxCpu.h:168
IfxPmsPm_setCoreMode
boolean IfxPmsPm_setCoreMode(IfxCpu_ResourceCpu cpuIndex, IfxCpu_CoreMode mode)
Set core mode(Idle/Run)
Definition: IfxPmsPm.c:152
IfxCpu_spinLock
unsigned int IfxCpu_spinLock
Lock type Spin lock.
Definition: IfxCpu.h:111
IfxCpu_getCoreMode
IfxCpu_CoreMode IfxCpu_getCoreMode(Ifx_CPU *cpu)
API to get current mode of CPU.
Definition: IfxCpu.c:195
IfxCpu_startCore
boolean IfxCpu_startCore(Ifx_CPU *cpu, uint32 programCounter)
API to set the program counter for the CPU specified and start the CPU.
Definition: IfxCpu.c:456
IfxCpu_setAllIdleExceptMasterCpu
void IfxCpu_setAllIdleExceptMasterCpu(IfxCpu_ResourceCpu masterCpu)
Sets all CPUs to Idle mode except the Master CPU,index of which is given as the parameter.
Definition: IfxCpu.c:544
IfxCpu.h
CPU basic functionality.
IfxCpu_disableOverlayBlock
void IfxCpu_disableOverlayBlock(IfxCpu_ResourceCpu cpu, uint16 overlayBlock)
This function disables the overlay memory.
Definition: IfxCpu.c:75
IfxCpu_ResourceCpu_3
CPU 3.
Definition: IfxCpu_cfg.h:162
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxCpu_setSpinLock
boolean IfxCpu_setSpinLock(IfxCpu_spinLock *lock, uint32 timeoutCount)
API to lock the resource in spin mode with the given timeout.
Definition: IfxCpu.c:428
IfxScuWdt_setSafetyEndinit
void IfxScuWdt_setSafetyEndinit(uint16 password)
SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:668
IfxCpu_CoreMode_unknown
Definition: IfxCpu.h:136
IfxCpu_enableOverlayBlock
void IfxCpu_enableOverlayBlock(IfxCpu_ResourceCpu cpu, uint16 overlayBlock, IfxCpu_OverlayMemorySelect overlayMemorySelect, IfxCpu_OverlayAddressMask overlayAddressMask, uint32 targetBaseAddress, uint32 overlayBaseAddress)
This function configures and enables the overlay memory. Note: The data overlay provides the capabili...
Definition: IfxCpu.c:124
IfxScuWdt_getSafetyWatchdogPassword
uint16 IfxScuWdt_getSafetyWatchdogPassword(void)
SCUWDT API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.c:393
IfxCpu_ResourceCpu_0
CPU 0.
Definition: IfxCpu_cfg.h:159
IfxCpu_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxCpu_cfg_indexMap[IFXCPU_NUM_MODULES]
Definition: IfxCpu_cfg.c:52
IfxCpu_getCoreIndex
IFX_INLINE IfxCpu_ResourceCpu IfxCpu_getCoreIndex(void)
API to get cpu index of the caller CPU. Note: This api can be used whereever cpu no/index is needed...
Definition: IfxCpu.h:871
min
sint32 min
Definition: IfxCpu_IntrinsicsDcc.h:131
__cmpAndSwap
#define __cmpAndSwap
Definition: IfxCpu_IntrinsicsDcc.h:2089
IfxCpu_CoreMode_run
Definition: IfxCpu.h:132
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxCpu_setProgramCounter
boolean IfxCpu_setProgramCounter(Ifx_CPU *cpu, uint32 programCounter)
API to set the program counter for the CPU specified.
Definition: IfxCpu.c:411
IfxCpu_CoreMode_halt
Definition: IfxCpu.h:131
IFXCPU_NUM_MODULES
#define IFXCPU_NUM_MODULES
CPU count.
Definition: IfxCpu_cfg.h:65
IfxCpu_resetSpinLock
void IfxCpu_resetSpinLock(IfxCpu_spinLock *lock)
API to unlock the resource .
Definition: IfxCpu.c:396
IfxCpu_ResourceCpu_1
CPU 1.
Definition: IfxCpu_cfg.h:160


iLLD_TC38A: IfxCpu.h Source File

  • Cpu
  • Std
IfxCpu.h
Go to the documentation of this file.
1 /**
2 * \file IfxCpu.h
3 * \brief CPU basic functionality
4 * \ingroup IfxLld_Cpu
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 * \defgroup IfxLld_Cpu_Std_Core Cpu Core Functions
43 * \ingroup IfxLld_Cpu_Std
44 * \defgroup IfxLld_Cpu_Std_Interrupt Interrupt Utility Functions
45 * \ingroup IfxLld_Cpu_Std
46 * \defgroup IfxLld_Cpu_Std_Cache Cache Management Functions
47 * \ingroup IfxLld_Cpu_Std
48 * \defgroup IfxLld_Cpu_Std_PerformanceCounter Performance Counter Functions
49 * \ingroup IfxLld_Cpu_Std
50 * \defgroup IfxLld_Cpu_Std_Synchronization Synchronization Functions
51 * \ingroup IfxLld_Cpu_Std
52 * \defgroup IfxLld_Cpu_Std_Utility Cpu Utility Functions
53 * \ingroup IfxLld_Cpu_Std
54 * \defgroup IfxLld_Cpu_Std_Enum Enumerations
55 * \ingroup IfxLld_Cpu_Std
56 * \defgroup IfxLld_Cpu_Std_DataStructures Data Structures
57 * \ingroup IfxLld_Cpu_Std
58 */
59
60 #ifndef IFXCPU_H
61 #define IFXCPU_H 1
62
63 /******************************************************************************/
64 /*----------------------------------Includes----------------------------------*/
65 /******************************************************************************/
66
67 #include "_Impl/IfxCpu_cfg.h"
68 #include "IfxSrc_reg.h"
69 #include "IfxScu_reg.h"
70 #include "IfxStm_reg.h"
71 #include "_Impl/IfxScu_cfg.h"
72 #include "_Utilities/Ifx_Assert.h"
73 #include "Scu/Std/IfxScuWdt.h"
74 #include "Scu/Std/IfxScuCcu.h"
75
76 /******************************************************************************/
77 /*-----------------------------------Macros-----------------------------------*/
78 /******************************************************************************/
79
80 /** \brief Convert local DSPR address to global DSPR address which can be accessed from the SRI bus.
81 * Use this macro to convert a local DSPR address (in segment 0xd00.....) to
82 * a global DSPR address (in segment 0x700....., 0x600....., 0x500..... downwards) depending on
83 * the CPU number.
84 * Example usage:
85 * \code
86 * dmaChConfig.sourceAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &sourceBuffer[i][0]);
87 * dmaChConfig.destinationAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &destinationBuffer[i][0]);
88 * \endcode
89 */
90 #define IFXCPU_GLB_ADDR_DSPR(cpu, address) ((((((unsigned)(address) & 0xF0000000) == 0xD0000000) ? ((((unsigned)(address) & 0x000fffff) | 0x70000000) - ((cpu) * 0x10000000)) : (unsigned)(address))))
91
92 /** \brief Convert local PSPR address to global PSPR address which can be accessed from the SRI bus.
93 * Use this macro to convert a local PSPR address (in segment 0xc......) to
94 * a global PSPR address (in segment 0x701....., 0x601....., 0x501..... downwards) depending on
95 * the CPU number.
96 *
97 * Example usage:
98 * \code
99 * dmaChConfig.sourceAddress = IFXCPU_GLB_ADDR_PSPR(IfxCpu_getCoreId(), &sourceBufferInPsprMemory);
100 * dmaChConfig.destinationAddress = IFXCPU_GLB_ADDR_PSPR(IfxCpu_getCoreId(), &destinationBufferInPsprMemory);
101 * \endcode
102 */
103 #define IFXCPU_GLB_ADDR_PSPR(cpu, address) ((((unsigned)(address) & 0x000fffff) | 0x70100000) - ((cpu) * 0x10000000))
104
105 /******************************************************************************/
106 /*------------------------------Type Definitions------------------------------*/
107 /******************************************************************************/
108
109 /** \brief Lock type Spin lock
110 */
111 typedef unsigned int IfxCpu_spinLock;
112
113 /** \brief Lock type Mutex lock
114 */
115 typedef unsigned int IfxCpu_mutexLock;
116
117 /** \brief Event used for synchronisation.
118 */
119 typedef unsigned int IfxCpu_syncEvent;
120
121 /******************************************************************************/
122 /*--------------------------------Enumerations--------------------------------*/
123 /******************************************************************************/
124
125 /** \addtogroup IfxLld_Cpu_Std_Enum
126 * \{ */
127 /** \brief Enumeration for the Cpu mode
128 */
129 typedef enum
130 {
131 IfxCpu_CoreMode_halt,
132 IfxCpu_CoreMode_run,
133 IfxCpu_CoreMode_idle,
134 IfxCpu_CoreMode_sleep,
135 IfxCpu_CoreMode_stby,
136 IfxCpu_CoreMode_unknown
137 } IfxCpu_CoreMode;
138
139 /** \brief Performance conunter modes
140 */
141 typedef enum
142 {
143 IfxCpu_CounterMode_normal = 0, /**< \brief Normal counter mode:the counter increments on their respective triggers */
144 IfxCpu_CounterMode_task = 1 /**< \brief Normal counter mode:additional gating control from the debug unit which allows the data gathered in the performance counters to be filtered by some specific criteria */
145 } IfxCpu_CounterMode;
146
147 /** \brief Overlay Address Mask: determines the overlay block size and the bits used for address comparison and translation
148 */
149 typedef enum
150 {
151 IfxCpu_OverlayAddressMask_32byte = 0xFFF, /**< \brief 32 byte block size Mask */
152 IfxCpu_OverlayAddressMask_64byte = 0xFFE, /**< \brief 64 byte block size Mask */
153 IfxCpu_OverlayAddressMask_128byte = 0xFFC, /**< \brief 128 byte block size Mask */
154 IfxCpu_OverlayAddressMask_256byte = 0xFF8, /**< \brief 256 byte block size Mask */
155 IfxCpu_OverlayAddressMask_512byte = 0xFF0, /**< \brief 512 byte block size Mask */
156 IfxCpu_OverlayAddressMask_1KB = 0xFE0, /**< \brief 1K byte block size Mask */
157 IfxCpu_OverlayAddressMask_2KB = 0xFC0, /**< \brief 2K byte block size Mask */
158 IfxCpu_OverlayAddressMask_4KB = 0xF80, /**< \brief 4K byte block size Mask */
159 IfxCpu_OverlayAddressMask_8KB = 0xF00, /**< \brief 8K byte block size Mask */
160 IfxCpu_OverlayAddressMask_16KB = 0xE00, /**< \brief 16K byte block size Mask */
161 IfxCpu_OverlayAddressMask_32KB = 0xC00, /**< \brief 32K byte block size Mask */
162 IfxCpu_OverlayAddressMask_64KB = 0x800, /**< \brief 64K byte block size Mask */
163 IfxCpu_OverlayAddressMask_128KB = 0x0 /**< \brief 128K byte block size Mask */
164 } IfxCpu_OverlayAddressMask;
165
166 /** \brief Selects overlay memory used for redirection
167 */
168 typedef enum
169 {
170 IfxCpu_OverlayMemorySelect_core0DsprPspr = 0, /**< \brief Redirection to Core 0 DSPR/PSPR memory */
171 IfxCpu_OverlayMemorySelect_core1DsprPspr = 1, /**< \brief Redirection to Core 1 DSPR/PSPR memory */
172 IfxCpu_OverlayMemorySelect_core2DsprPspr = 2, /**< \brief Redirection to Core 2 DSPR/PSPR memory */
173 IfxCpu_OverlayMemorySelect_core3DsprPspr = 3, /**< \brief Redirection to Core 3 DSPR/PSPR memory */
174 IfxCpu_OverlayMemorySelect_lmu = 8 /**< \brief Redirection to LMU memory */
175 } IfxCpu_OverlayMemorySelect;
176
177 typedef enum
178 {
179 IfxCpu_ResetStatus_notCpuReset = 0, /**< \brief No Kernel Reset was executed */
180 IfxCpu_ResetStatus_cpuResetBySmu = 1, /**< \brief Kernel reset was requested by hardware since last clear (SMU) */
181 IfxCpu_ResetStatus_cpuResetBySw = 2 /**< \brief Kernel reset was requested by software since last clear (by writing KRST0.RST=1 and KRST1.RST=1) */
182 } IfxCpu_ResetStatus;
183
184 /** \} */
185
186 /******************************************************************************/
187 /*-----------------------------Data Structures--------------------------------*/
188 /******************************************************************************/
189
190 /** \addtogroup IfxLld_Cpu_Std_DataStructures
191 * \{ */
192 /** \brief counter
193 */
194 typedef struct
195 {
196 uint32 counter; /**< \brief Counter value */
197 boolean overlfow; /**< \brief sticky overlfow */
198 } IfxCpu_Counter;
199
200 /** \} */
201
202 /** \addtogroup IfxLld_Cpu_Std_DataStructures
203 * \{ */
204 /** \brief Performance counter result
205 */
206 typedef struct
207 {
208 IfxCpu_Counter instruction; /**< \brief Instruction counter */
209 IfxCpu_Counter clock; /**< \brief CPU clock counter */
210 IfxCpu_Counter counter1; /**< \brief Multi counter 1 */
211 IfxCpu_Counter counter2; /**< \brief Multi counter 2 */
212 IfxCpu_Counter counter3; /**< \brief Multi counter 3 */
213 } IfxCpu_Perf;
214
215 /** \} */
216
217 /** \addtogroup IfxLld_Cpu_Std_Core
218 * \{ */
219
220 /******************************************************************************/
221 /*-------------------------Inline Function Prototypes-------------------------*/
222 /******************************************************************************/
223
224 /** \brief API to get the address for CPU HW module register memory map
225 * \param cpu Resource index of the CPU
226 * \return CPU module register address
227 */
228 IFX_INLINE Ifx_CPU *IfxCpu_getAddress(IfxCpu_ResourceCpu cpu);
229
230 /** \brief API to get core id of the CPU of the caller.
231 * Caution: Core id of the cpu's may not be continguous and shouldn't be used to index cpu.
232 * Use IfxCpu_getCoreIndex() to get cpu no.
233 * \return Resource index of the CPU.
234 */
235 IFX_INLINE IfxCpu_Id IfxCpu_getCoreId(void);
236
237 /** \brief API to get cpu index of the caller CPU.
238 * Note: This api can be used whereever cpu no/index is needed.
239 * \return Resource index of the CPU.
240 */
241 IFX_INLINE IfxCpu_ResourceCpu IfxCpu_getCoreIndex(void);
242
243 /** \brief API to initialize the context save area of the CPU where this is called.
244 *
245 * This API can initialize the CSA of the host CPU where this API is called. This API
246 * shall not be used to initialize the CSA of another CPU
247 * \param csaBegin Pointer to start of context save area
248 * \param csaEnd Pointer to end of context save area
249 * \return None
250 */
251 IFX_INLINE void IfxCpu_initCSA(uint32 *csaBegin, uint32 *csaEnd);
252
253 /** \brief Set/Clear safety task identifier (PSW.S) on current CPU
254 * \return None
255 */
256 IFX_INLINE void IfxCpu_setSafetyTaskIdentifier(boolean safetyId);
257
258 /** \brief Triggers Software Reset
259 * \return None
260 */
261 IFX_INLINE void IfxCpu_triggerSwReset(void);
262
263 /******************************************************************************/
264 /*-------------------------Global Function Prototypes-------------------------*/
265 /******************************************************************************/
266
267 /** \brief API to get current mode of CPU
268 * \param cpu Pointer to the CPU HW module (register memory map)
269 * \return Current mode of the CPU
270 */
271 IFX_EXTERN IfxCpu_CoreMode IfxCpu_getCoreMode(Ifx_CPU *cpu);
272
273 /** \brief API to get current mode of CPU
274 * \param cpu Pointer to the CPU HW module (register memory map)
275 * \return Resource index of the CPU
276 */
277 IFX_EXTERN IfxCpu_ResourceCpu IfxCpu_getIndex(Ifx_CPU *cpu);
278
279 /** \brief API to set mode of the CPU
280 * \param cpu Pointer to the CPU HW module (register memory map)
281 * \param mode CPU mode to be set by this API
282 * \return Success status of the activity (setting the core mode).
283 * \retval TRUE: If the activity successfully be performed.
284 * \retval FALSE: If the activity can't be performed.
285 */
286 IFX_EXTERN boolean IfxCpu_setCoreMode(Ifx_CPU *cpu, IfxCpu_CoreMode mode);
287
288 /** \brief API to set the program counter for the CPU specified.
289 * \param cpu Pointer to the CPU HW module (register memory map)
290 * \param programCounter Program counter value to be set
291 * \return success status of the activity (setting program counter value).
292 * \retval TRUE: If the activity successfully be performed.
293 * \retval FALSE: If the activity can't be performed
294 */
295 IFX_EXTERN boolean IfxCpu_setProgramCounter(Ifx_CPU *cpu, uint32 programCounter);
296
297 /** \brief API to set the program counter for the CPU specified and start the CPU
298 * \param cpu Pointer to the CPU HW module (register memory map)
299 * \param programCounter Program counter value to start the CPU
300 * \return success status of the activity (setting program counter value).
301 * \retval TRUE: If the activity successfully be performed.
302 * \retval FALSE: If the activity can't be performed
303 */
304 IFX_EXTERN boolean IfxCpu_startCore(Ifx_CPU *cpu, uint32 programCounter);
305
306 /** \brief To request reset of a particular core, given by coreId
307 * \return None
308 */
309 IFX_EXTERN void IfxCpu_triggerCpuReset(IfxCpu_ResourceCpu coreIndex);
310
311 /** \brief Retrieve the cause of reset(no reset, hardware(SMU) or software) since last clear by reading KRST0.RSTSTAT and clear it.
312 */
313 IFX_EXTERN IfxCpu_ResetStatus IfxCpu_getCpuResetStatus(IfxCpu_ResourceCpu coreIndex);
314
315 /** \} */
316
317 /** \addtogroup IfxLld_Cpu_Std_Interrupt
318 * \{ */
319
320 /******************************************************************************/
321 /*-------------------------Inline Function Prototypes-------------------------*/
322 /******************************************************************************/
323
324 /** \brief API to get the status of global interrupt enable (ICR.IE) for the CPU which calls this API
325 * This API provides the status of CPU where this API is called
326 * \return Status of global interrupt enable bit.
327 * \retval TRUE: Global interrupts enabled.
328 * \retval FALSE: Global interrupts disabled
329 */
330 IFX_INLINE boolean IfxCpu_areInterruptsEnabled(void);
331
332 /** \brief API to disable global interrupt and return the previous status.
333 *
334 * This API can be used only to disable the global interrupts of caller CPU. It cannot be
335 * used for this activity towards other CPUs
336 * \return Previous status of global interrupt enable bit.
337 * \retval TRUE: Previously, global interrupts enabled.
338 * \retval FALSE: Previously, global interrupts disabled
339 */
340 IFX_INLINE boolean IfxCpu_disableInterrupts(void);
341
342 /** \brief API to enable global interrupt.
343 * This API simply enables the global interrupt.
344 * \return None
345 */
346 IFX_INLINE void IfxCpu_enableInterrupts(void);
347
348 /** \brief Disable the Global Interrupt
349 * \return None
350 */
351 IFX_INLINE void IfxCpu_forceDisableInterrupts(void);
352
353 /** \brief API to restore global interrupt with that of the passed parameter.
354 *
355 * This API can be used only to disable the global interrupts of caller CPU. It cannot be
356 * used for this activity towards other CPUs
357 * \param enabled Previous status of the global interrupt enable bit
358 * \return None
359 */
360 IFX_INLINE void IfxCpu_restoreInterrupts(boolean enabled);
361
362 /** \} */
363
364 /** \addtogroup IfxLld_Cpu_Std_Cache
365 * \{ */
366
367 /******************************************************************************/
368 /*-------------------------Inline Function Prototypes-------------------------*/
369 /******************************************************************************/
370
371 /** \brief API to enable/ disable the data cacheability for selected segments
372 * With this API cacheability for one or more segment can be enabled/disabled for the CPU core where this API is called.
373 * \Note This API is to be called only if the PCACHE or DCACHE are not enabled before
374 * \param segmentNumberMask Mask where bitfield 0 represents segment 0 and bitfield 16 represent segment F.
375 * \param enable TRUE: to enable the cacheability for selected segment, FALSE: to disable.
376 * \return None
377 */
378 IFX_INLINE void IfxCpu_enableSegmentSpecificDataAccessCacheability(uint16 segmentNumberMask, boolean enable);
379
380 /** \brief API to enable/ disable the instruction cacheability for selected segments
381 * With this API cacheability for one or more segment can be enabled/disabled for the CPU core where this API is called.
382 * \Note This API is to be called only if the PCACHE or DCACHE are not enabled before
383 * \param segmentNumberMask Mask where bitfield 0 represents segment 0 and bitfield 16 represent segment F.
384 * \param enable TRUE: to enable the cacheability for selected segment, FALSE: to disable.
385 * \return None
386 */
387 IFX_INLINE void IfxCpu_enableSegmentSpecificInstructionAccessCacheability(uint16 segmentNumberMask, boolean enable);
388
389 /** \brief API to invalidate the program cache
390 * \return None
391 */
392 IFX_INLINE void IfxCpu_invalidateProgramCache(void);
393
394 /** \brief API to determine if an address is in a cachable or non-cachable Flash/LMU section
395 * \param address Address
396 * \return Status TRUE/FALSE
397 */
398 IFX_INLINE boolean IfxCpu_isAddressCachable(void *address);
399
400 /** \brief API to enable or bypass the data cache for the CPU which calls this API.
401 *
402 * This API can be used only to enable or bypass the data cache of caller CPU. It cannot be
403 * used for this activity towards other CPUs
404 * \param enable Command to enable or bypass the data cache
405 * TRUE: Enable the data cache.
406 * FALSE: Bypass the data cache.
407 * \return None
408 */
409 IFX_INLINE void IfxCpu_setDataCache(boolean enable);
410
411 /** \brief API to enable or bypass the program cache for the CPU which calls this API.
412 *
413 * This API can be used only to enable or bypass the program cache of caller CPU. It cannot be
414 * used for this activity towards other CPUs
415 * \param enable Command to enable or bypass the program cache.
416 * TRUE: Enable the program cache.
417 * FALSE: Bypass the program cache
418 * \return None
419 */
420 IFX_INLINE void IfxCpu_setProgramCache(boolean enable);
421
422 /** \} */
423
424 /** \addtogroup IfxLld_Cpu_Std_PerformanceCounter
425 * \{ */
426
427 /******************************************************************************/
428 /*-------------------------Inline Function Prototypes-------------------------*/
429 /******************************************************************************/
430
431 /** \brief API to read the clock counter for the CPU which calls this API.
432 *
433 * This API can be used to read clock counter of only the caller CPU. It cannot be
434 * used for this activity towards other CPUs.
435 * \return Counter value. 0 to 0x7FFFFFFF.
436 */
437 IFX_INLINE uint32 IfxCpu_getClockCounter(void);
438
439 /** \brief API to get sticky overflow bit of clock counter for the CPU, which calls this API.
440 *
441 * This API can be used to get sticky overflow bit of clock counter of only the caller CPU.
442 * It cannot be used for this activity towards other CPUs.
443 * This API also clears the sticky overflow after the read. While reading the sticky bit this API disables
444 * the counter for short time. (otherwise sticky bit cannot be cleared). This API shall be used after
445 * reading the counter
446 * \return Status of sticky overflow bit.
447 * \retval TRUE: Sticky overflow bit is set.
448 * \retval FALSE: Sticky overflow bit is reset
449 */
450 IFX_INLINE boolean IfxCpu_getClockCounterStickyOverflow(void);
451
452 /** \brief API to read the instruction counter for the CPU which calls this API.
453 *
454 * This API can be used to read instruction counter of only the caller CPU. It cannot be
455 * used for this activity towards other CPUs
456 * \return Counter value. 0 to 0x7FFFFFFF.
457 */
458 IFX_INLINE uint32 IfxCpu_getInstructionCounter(void);
459
460 /** \brief API to get sticky overflow bit of Instruction counter for the CPU, which calls this API.
461 *
462 * This API can be used to get sticky overflow bit of Instruction counter of only the caller CPU.
463 * It cannot be used for this activity towards other CPUs.
464 * This API also clears the sticky overflow after the read. While reading the sticky bit this API disables
465 * the counter for short time. (otherwise sticky bit cannot be cleared). This API shall be used after
466 * reading the counter
467 * \return Status of sticky overflow bit.
468 * \retval TRUE: Sticky overflow bit is set.
469 * \retval FALSE: Sticky overflow bit is reset
470 */
471 IFX_INLINE boolean IfxCpu_getInstructionCounterStickyOverflow(void);
472
473 /** \brief API to read the performance counter for the CPU which calls this API.
474 * \param address Address
475 * \return counter value
476 */
477 IFX_INLINE uint32 IfxCpu_getPerformanceCounter(uint16 address);
478
479 /** \brief API to get sticky overflow bit of performance counter for the CPU, which calls this API.
480 * This is generic function to get sticky overflow bit of any performance counters
481 * \param address Address
482 * \return Status
483 */
484 IFX_INLINE boolean IfxCpu_getPerformanceCounterStickyOverflow(uint16 address);
485
486 /** \brief Reset and start instruction, clock and multi counters
487 *
488 * Reset and start CCNT, ICNT, M1CNT, M2CNT, M3CNT. the overflow bits are cleared.
489 * \param mode Counter mode
490 * \return None
491 */
492 IFX_INLINE void IfxCpu_resetAndStartCounters(IfxCpu_CounterMode mode);
493
494 /** \brief API to enable or disable performance counter for the CPU which calls this API.
495 *
496 * This API can be used to enable or disable performance counter of only the caller CPU. It cannot be
497 * used for this activity towards other CPUs.
498 * \param enable enable Command to enable or disable the performance counter.
499 * TRUE: Enable the performance counter.
500 * FALSE: Disable the performance counter
501 * \return None
502 */
503 IFX_INLINE void IfxCpu_setPerformanceCountersEnableBit(uint32 enable);
504
505 #if !((defined(__cplusplus)) && (defined(__TASKING__)))
506 /** \brief Stop instruction and clock counters, return their values
507 *
508 * Stop CCNT, ICNT, M1CNT, M2CNT, M3CNT and return their values;
509 * \Note The CCTRL is reset to 0, for more accurate measurements and has to be initialized again before strating the next performance measurement.
510 * \return Performance counter result
511 */
512 IFX_INLINE IfxCpu_Perf IfxCpu_stopCounters(void);
513 #endif
514
515 /** \brief API to update clock counter for the CPU which calls this API.
516 *
517 * This API can be used to update clock counter of only the caller CPU. It cannot be
518 * used for this activity towards other CPUs.
519 * \param count Counter value to be updated. 0 to 0x7FFFFFFF
520 * \return None
521 */
522 IFX_INLINE void IfxCpu_updateClockCounter(uint32 count);
523
524 /** \brief API to update Instruction counter for the CPU which calls this API.
525 *
526 * This API can be used to update Instruction counter of only the caller CPU. It cannot be
527 * used for this activity towards other CPUs.
528 * \param count Counter value to be updated. 0 to 0x7FFFFFFF
529 * \return None
530 */
531 IFX_INLINE void IfxCpu_updateInstructionCounter(uint32 count);
532
533 /** \brief API to update performance counter for the CPU which calls this API.
534 * This is generic function to update any of the performance counters
535 * \param address Address
536 * \param count Count
537 * \return None
538 */
539 IFX_INLINE void IfxCpu_updatePerformanceCounter(uint32 address, uint32 count);
540
541 /** \} */
542
543 /** \addtogroup IfxLld_Cpu_Std_Synchronization
544 * \{ */
545
546 /******************************************************************************/
547 /*-------------------------Global Function Prototypes-------------------------*/
548 /******************************************************************************/
549
550 /** \brief API to acquire the mutex (binary semaphore).
551 *
552 * This API can be used to acquire/get the mutex.
553 * \param lock lock pointer
554 * \return TRUE : lock acquired successfully. FALSE: Failed to acquire the lock
555 *
556 * \code
557 * IfxCpu_mutexLock resourceLock;
558 * boolean flag = IfxCpu_acquireMutex(&resourceLock);
559 * if (flag){
560 * // critical section
561 * IfxCpu_releaseMutex(&resourceLock);
562 * }
563 * \endcode
564 *
565 */
566 IFX_EXTERN boolean IfxCpu_acquireMutex(IfxCpu_mutexLock *lock);
567
568 /** \brief API to unlock the mutex .
569 *
570 * This API can be used to unlock the previously acquired mutex
571 * \param lock lock pointer
572 * \return None
573 *
574 * \code
575 * IfxCpu_mutexLock resourceLock;
576 * boolean flag = IfxCpu_acquireMutex(&resourceLock);
577 * if (flag){
578 * // critical section
579 * IfxCpu_releaseMutex(&resourceLock);
580 * }
581 * \endcode
582 *
583 */
584 IFX_EXTERN void IfxCpu_releaseMutex(IfxCpu_mutexLock *lock);
585
586 /** \brief API to unlock the resource .
587 *
588 * This API can be used to unlock the previously acquired lock
589 * \param lock lock pointer
590 * \return None
591 */
592 IFX_EXTERN void IfxCpu_resetSpinLock(IfxCpu_spinLock *lock);
593
594 /** \brief API to lock the resource in spin mode with the given timeout.
595 *
596 * This API can be used to spin lock for the lock for the given timeout period.
597 * \param lock lock pointer
598 * \param timeoutCount loop counter value used for timeout to acquire lock
599 * \return TRUE : lock acquired successfully. FALSE: Failed to acquire the lock
600 *
601 * \code
602 * IfxCpu_spinLock resourceLock;
603 * boolean flag = IfxCpu_setSpinLock(&resourceLock, 0xFFFF);
604 * if (flag){
605 * // critical section
606 * IfxCpu_resetSpinLock(&resourceLock);
607 * }
608 * \endcode
609 *
610 */
611 IFX_EXTERN boolean IfxCpu_setSpinLock(IfxCpu_spinLock *lock, uint32 timeoutCount);
612
613 /** \} */
614
615 /** \addtogroup IfxLld_Cpu_Std_Utility
616 * \{ */
617
618 /******************************************************************************/
619 /*-------------------------Global Function Prototypes-------------------------*/
620 /******************************************************************************/
621
622 /** \brief This function disables the overlay memory.
623 * \param cpu Core no
624 * \param overlayBlock Overlay Block
625 * \return None
626 */
627 IFX_EXTERN void IfxCpu_disableOverlayBlock(IfxCpu_ResourceCpu cpu, uint16 overlayBlock);
628
629 /** \brief This function configures and enables the overlay memory.
630 * Note:
631 * The data overlay provides the capability to redirect selected data accesses to the Overlay memory. Data accesses made by the TriCore to Program Flash, Online Data Acquisition space, or EBU space can be redirected. Overlay memory may be located in the Local Memory (if present), in the Emulation Memory (Emulation Device only), or in the EBU space,or in the DPSR/PSPR memory.
632 *
633 * How the overlay Memory works?
634 * Any data access to segment 8 or segment A is checked against all the activated overlay blocks. For each activated overlay block, address bits 27..5 are compared with the target base address , and this bit-wise comparison is qualified by the content of address mask. Address bits participate in the comparison if the corresponding mask bits are set to one. The access is redirected, if all the address bits selected by mask equal to the corresponding bits in target address.
635 * The address for redirection is constructed as follows:
636 * 1. Address bits 31..22 are set according to the overlay memory selection and the cache-ability of the original address.
637 * 2. For address bits 21..5:
638 * - If the corresponding address mask bit is set, the address bit value is taken from overlay base address .
639 * - If the corresponding address mask bit is cleared, the address bit value is taken from the original address.
640 * 3. Address bits 4..0 are always taken directly from the original address.
641 * If there is no redirection, the original address is used to perform the access.
642 * Target address ranges for activated overlay blocks should not overlap or an exception may occur.
643 * \param cpu Core no
644 * \param overlayBlock Overlay Block
645 * \param overlayMemorySelect Overlay Memory Select
646 * \param overlayAddressMask overlay Address Mask
647 * \param targetBaseAddress Target Base address (i.e Source address to be re-directed)
648 * \param overlayBaseAddress Overlay or Re-directed Base address (Bits 21..5 of the base address the overlay memory block in the overlay memory)
649 * \return None
650 */
651 IFX_EXTERN void IfxCpu_enableOverlayBlock(IfxCpu_ResourceCpu cpu, uint16 overlayBlock, IfxCpu_OverlayMemorySelect overlayMemorySelect, IfxCpu_OverlayAddressMask overlayAddressMask, uint32 targetBaseAddress, uint32 overlayBaseAddress);
652
653 /** \brief API to get random value
654 * \param seed Pointer to seed value
655 * \return random value
656 */
657 IFX_EXTERN uint32 IfxCpu_getRandomValue(uint32 *seed);
658
659 /** \brief API to get random value with in the range
660 * \param seed Pointer to seed value
661 * \param min minimum range value
662 * \param max maximum range value
663 * \return random value
664 */
665 IFX_EXTERN uint32 IfxCpu_getRandomValueWithinRange(uint32 *seed, uint32 min, uint32 max);
666
667 /** \brief This function waits till all the cores have set their corresponding bits in the event. This function along with
668 * IfxCpu_emitEvent() are used to achieve the synchronisation between the configured cores. By default
669 * "IFXCPU_CFG_ALLCORE_DONE" macro defined for all the cores. In case the user wants to check for
670 * synchronisation among the required cores, the macro can be redefined with the value accroing to the
671 * CORE_ID register.
672 * The IfxCpu_emitEvent() is to be used in the Main functions of the Cores where the user wants to check for synchronisation.
673 *
674 * e.g:
675 * 1. Check for synchronisation between core 0 and core 5
676 * # define 0x41U
677 * 2. Check for synchronisation between core 0 to core 5
678 * # define 0x5FU
679 *
680 * Note:
681 * Core id values read from CORE_ID register will be as shown below. The value indicates the position of the bit needs to be set while building the macro.
682 * Core 0: 0
683 * Core 1: 1
684 * Core 2: 2
685 * Core 3: 3
686 * Core 4: 4
687 * Core 5: 6
688 * \param event Synchronous Event
689 * \param timeoutMilliSec timeout in millisec
690 * \return Error condition
691 *
692 * The functions IfxCpu_waitEvent and IfxCpu_emitEvent are used to achieve synchronisation between all cores (i.e individual cores wait till all cores have reached the synchronisation point). The IfxCpu_waitEvent returns 1 incase a timeout occurs.
693 *
694 * \code
695 * // Global variable. preferably located in shared memory.
696 * IfxCpu_syncEvent event;
697 * boolean errorVal;
698 *
699 * // Below code should be repeated in Each core
700 *
701 * // Upon reaching Synchonisation point
702 * IfxCpu_emitEvent(&event);
703 * errorVal = IfxCpu_waitEvent(&event, timeoutMilliSec); // timeoutMilliSec is timeout value to wait
704 *
705 * \endcode
706 *
707 */
708 IFX_EXTERN boolean IfxCpu_waitEvent(IfxCpu_syncEvent *event, uint32 timeoutMilliSec);
709
710 /** \brief This function sets a bit corresponding to the core in the event.
711 * \param event Synchronous Event
712 * \return None
713 *
714 * A coding example can be found in \ref IfxCpu_waitEvent
715 *
716 */
717 IFX_EXTERN void IfxCpu_emitEvent(IfxCpu_syncEvent *event);
718
719 /** \} */
720
721 /******************************************************************************/
722 /*-------------------------Global Function Prototypes-------------------------*/
723 /******************************************************************************/
724
725 /** \brief Sets all CPUs to Idle mode except the Master CPU,index of which is given as the parameter
726 * \param masterCpu Master CPU Index- All except this will be set to Idle Mode
727 * \return None
728 */
729 IFX_EXTERN void IfxCpu_setAllIdleExceptMasterCpu(IfxCpu_ResourceCpu masterCpu);
730
731 /** \brief Disables interrupts for all CPUs except the Master CPU,index of which is given as the parameter
732 * \param masterCpu Master CPU Index- All except this will have their interrupts disabled
733 * \return None
734 */
735 IFX_EXTERN void IfxCpu_disableInterruptsAllExceptMaster(IfxCpu_ResourceCpu masterCpu);
736
737 /******************************************************************************/
738 /*---------------------Inline Function Implementations------------------------*/
739 /******************************************************************************/
740
741 IFX_INLINE boolean IfxCpu_areInterruptsEnabled(void)
742 {
743 Ifx_CPU_ICR reg;
744 reg.U = __mfcr(CPU_ICR);
745 return reg.B.IE != 0;
746 }
747
748
749 IFX_INLINE boolean IfxCpu_disableInterrupts(void)
750 {
751 boolean enabled;
752 enabled = IfxCpu_areInterruptsEnabled();
753 __disable();
754 __nop();
755 return enabled;
756 }
757
758
759 IFX_INLINE void IfxCpu_enableInterrupts(void)
760 {
761 __enable();
762 }
763
764
765 IFX_INLINE void IfxCpu_enableSegmentSpecificDataAccessCacheability(uint16 segmentNumberMask, boolean enable)
766 {
767 uint32 cpu_pmaVal;
768 uint16 checkRestrictionMask;
769 uint32 coreIndex = IfxCpu_getCoreIndex();
770 uint16 wdtPassword = IfxScuWdt_getCpuWatchdogPasswordInline(&MODULE_SCU.WDTCPU[coreIndex]);
771
772 /*resolve the restrictions*/
773 /*In PMA0 Segment-C and Segment[7-CoreID] must have the same value */
774 checkRestrictionMask = ((uint16)1 << (7 - coreIndex)) | ((uint16)1 << 0xC);
775
776 if ((segmentNumberMask & checkRestrictionMask) != 0)
777 {
778 segmentNumberMask |= checkRestrictionMask;
779 }
780
781 cpu_pmaVal = __mfcr(CPU_PMA0); /* Read the CPU_PMA0 */
782
783 cpu_pmaVal = enable ? (cpu_pmaVal | segmentNumberMask) : (cpu_pmaVal & ~segmentNumberMask); /* enable or disable the corresponding bitfield */
784
785 /*The CPU_PMA registers are ENDINIT protected*/
786 IfxScuWdt_clearCpuEndinitInline(&MODULE_SCU.WDTCPU[coreIndex], wdtPassword);
787 /*When changing the value of the CPU_PMAx registers both the instruction and data caches should be invalidated*/
788 /*Write to PMA0 register for selecting the cacheability for data cache*/
789 __dsync(); /* DSYNC instruction should be executed immediately prior to the MTCR*/
790 __mtcr(CPU_PMA0, cpu_pmaVal);
791 __isync(); /* ISYNC instruction executed immediately following MTCR */
792 IfxScuWdt_setCpuEndinitInline(&MODULE_SCU.WDTCPU[coreIndex], wdtPassword);
793 }
794
795
796 IFX_INLINE void IfxCpu_enableSegmentSpecificInstructionAccessCacheability(uint16 segmentNumberMask, boolean enable)
797 {
798 uint32 cpu_pmaVal;
799 uint16 checkRestrictionMask;
800 uint32 coreIndex = IfxCpu_getCoreIndex();
801 uint16 wdtPassword = IfxScuWdt_getCpuWatchdogPasswordInline(&MODULE_SCU.WDTCPU[coreIndex]);
802
803 /*resolve the restrictions*/
804 /*In PMA1 Segment-D and Segment[7-CoreID] must have the same value */
805 checkRestrictionMask = ((uint16)1 << (7 - coreIndex)) | ((uint16)1 << 0xD);
806
807 if ((segmentNumberMask & checkRestrictionMask) != 0)
808 {
809 segmentNumberMask |= checkRestrictionMask;
810 }
811
812 cpu_pmaVal = __mfcr(CPU_PMA1); /* Read the CPU_PMA1 */
813
814 cpu_pmaVal = enable ? (cpu_pmaVal | segmentNumberMask) : (cpu_pmaVal & ~segmentNumberMask); /* enable or disable the corresponding bitfield */
815
816 /*The CPU_PMA registers are ENDINIT protected*/
817 IfxScuWdt_clearCpuEndinitInline(&MODULE_SCU.WDTCPU[coreIndex], wdtPassword);
818 /*When changing the value of the CPU_PMAx registers both the instruction and data caches should be invalidated*/
819 /*Write to PMA1 register for selecting the cacheability for data cache*/
820 __dsync(); /* DSYNC instruction should be executed immediately prior to the MTCR */
821 __mtcr(CPU_PMA1, cpu_pmaVal);
822 __isync(); /* ISYNC instruction executed immediately following MTCR */
823 IfxScuWdt_setCpuEndinitInline(&MODULE_SCU.WDTCPU[coreIndex], wdtPassword);
824 }
825
826
827 IFX_INLINE void IfxCpu_forceDisableInterrupts(void)
828 {
829 __disable();
830 __nop();
831 }
832
833
834 IFX_INLINE Ifx_CPU *IfxCpu_getAddress(IfxCpu_ResourceCpu cpu)
835 {
836 Ifx_CPU *module;
837
838 if (cpu < IfxCpu_ResourceCpu_none)
839 {
840 module = (Ifx_CPU *)IfxCpu_cfg_indexMap[cpu].module;
841 }
842 else
843 {
844 module = NULL_PTR;
845 }
846
847 return module;
848 }
849
850
851 IFX_INLINE uint32 IfxCpu_getClockCounter(void)
852 {
853 return IfxCpu_getPerformanceCounter(CPU_CCNT);
854 }
855
856
857 IFX_INLINE boolean IfxCpu_getClockCounterStickyOverflow(void)
858 {
859 return IfxCpu_getPerformanceCounterStickyOverflow(CPU_CCNT);
860 }
861
862
863 IFX_INLINE IfxCpu_Id IfxCpu_getCoreId(void)
864 {
865 Ifx_CPU_CORE_ID reg;
866 reg.U = __mfcr(CPU_CORE_ID);
867 return (IfxCpu_Id)reg.B.CORE_ID;
868 }
869
870
871 IFX_INLINE IfxCpu_ResourceCpu IfxCpu_getCoreIndex(void)
872 {
873 Ifx_CPU_CORE_ID reg;
874 reg.U = __mfcr(CPU_CORE_ID);
875 return (IfxCpu_ResourceCpu)reg.B.CORE_ID;
876 }
877
878
879 IFX_INLINE uint32 IfxCpu_getInstructionCounter(void)
880 {
881 return IfxCpu_getPerformanceCounter(CPU_ICNT);
882 }
883
884
885 IFX_INLINE boolean IfxCpu_getInstructionCounterStickyOverflow(void)
886 {
887 return IfxCpu_getPerformanceCounterStickyOverflow(CPU_ICNT);
888 }
889
890
891 IFX_INLINE uint32 IfxCpu_getPerformanceCounter(uint16 address)
892 {
893 Ifx_CPU_CCNT ccnt;
894
895 if (address == CPU_CCNT)
896 {
897 ccnt.U = __mfcr(CPU_CCNT);
898 }
899 else if (address == CPU_ICNT)
900 {
901 ccnt.U = __mfcr(CPU_ICNT);
902 }
903 else if (address == CPU_M1CNT)
904 {
905 ccnt.U = __mfcr(CPU_M1CNT);
906 }
907 else if (address == CPU_M2CNT)
908 {
909 ccnt.U = __mfcr(CPU_M2CNT);
910 }
911 else if (address == CPU_M3CNT)
912 {
913 ccnt.U = __mfcr(CPU_M3CNT);
914 }
915
916 return ccnt.B.COUNTVALUE;
917 }
918
919
920 IFX_INLINE boolean IfxCpu_getPerformanceCounterStickyOverflow(uint16 address)
921 {
922 Ifx_CPU_CCNT ccnt;
923
924 if (address == CPU_CCNT)
925 {
926 ccnt.U = __mfcr(CPU_CCNT);
927 }
928 else if (address == CPU_ICNT)
929 {
930 ccnt.U = __mfcr(CPU_ICNT);
931 }
932 else if (address == CPU_M1CNT)
933 {
934 ccnt.U = __mfcr(CPU_M1CNT);
935 }
936 else if (address == CPU_M2CNT)
937 {
938 ccnt.U = __mfcr(CPU_M2CNT);
939 }
940 else if (address == CPU_M3CNT)
941 {
942 ccnt.U = __mfcr(CPU_M3CNT);
943 }
944
945 return ccnt.B.SOVF;
946 }
947
948
949 IFX_INLINE void IfxCpu_initCSA(uint32 *csaBegin, uint32 *csaEnd)
950 {
951 uint32 k;
952 uint32 nxt_cxi_val = 0;
953 uint32 *prvCsa = 0U;
954 uint32 *nxtCsa = csaBegin;
955 uint32 numOfCsa = (((uint32)csaEnd - (uint32)csaBegin) / 64U);
956
957 for (k = 0; k < numOfCsa; k++)
958 {
959 nxt_cxi_val = ((uint32)nxtCsa & (0XFU << 28)) >> 12 | ((uint32)nxtCsa & (0XFFFFU << 6)) >> 6;
960
961 if (k == 0)
962 {
963 __mtcr(CPU_FCX, nxt_cxi_val); /* store the new pcxi value to LCX */
964 }
965 else
966 {
967 *prvCsa = nxt_cxi_val; /* Store null pointer in last CSA (= very first time!) */
968 }
969
970 if (k == (numOfCsa - 3U))
971 {
972 __mtcr(CPU_LCX, nxt_cxi_val); /* Last but 2 context save area is pointed in LCX to know if there is CSA depletion */
973 }
974
975 prvCsa = (uint32 *)nxtCsa;
976 nxtCsa += 16; /* next CSA */
977 }
978
979 *prvCsa = 0;
980 }
981
982
983 IFX_INLINE void IfxCpu_invalidateProgramCache(void)
984 {
985 uint16 cpuWdtPassword = IfxScuWdt_getCpuWatchdogPassword();
986 {
987 IfxScuWdt_clearCpuEndinit(cpuWdtPassword);
988 Ifx_CPU_PCON1 pcon1;
989 pcon1.U = __mfcr(CPU_PCON1);
990 pcon1.B.PCINV = 1;
991 __mtcr(CPU_PCON1, pcon1.U);
992 IfxScuWdt_setCpuEndinit(cpuWdtPassword);
993 }
994 }
995
996
997 IFX_INLINE boolean IfxCpu_isAddressCachable(void *address)
998 {
999 uint8 segment = (uint32)address >> 24;
1000 return ((segment == IFXCPU_CACHABLE_FLASH_SEGMENT) || (segment == IFXCPU_CACHABLE_LMU_SEGMENT)) ? TRUE : FALSE;
1001 }
1002
1003
1004 IFX_INLINE void IfxCpu_resetAndStartCounters(IfxCpu_CounterMode mode)
1005 {
1006 Ifx_CPU_CCTRL cctrl;
1007 cctrl.U = __mfcr(CPU_CCTRL);
1008 /*Disable the counters */
1009 cctrl.B.CE = 0;
1010 __mtcr(CPU_CCTRL, cctrl.U);
1011
1012 /* reset the counters */
1013 __mtcr(CPU_CCNT, 0);
1014 __mtcr(CPU_ICNT, 0);
1015 __mtcr(CPU_M1CNT, 0);
1016 __mtcr(CPU_M2CNT, 0);
1017 __mtcr(CPU_M3CNT, 0);
1018
1019 /*Enable the counters, set the counter mode */
1020 cctrl.B.CE = 1;
1021 cctrl.B.CM = mode;
1022 __mtcr(CPU_CCTRL, cctrl.U);
1023 }
1024
1025
1026 IFX_INLINE void IfxCpu_restoreInterrupts(boolean enabled)
1027 {
1028 if (enabled != FALSE)
1029 {
1030 __enable();
1031 }
1032 }
1033
1034
1035 IFX_INLINE void IfxCpu_setDataCache(boolean enable)
1036 {
1037 uint32 coreIndex = IfxCpu_getCoreIndex();
1038 uint16 wdtPassword = IfxScuWdt_getCpuWatchdogPasswordInline(&MODULE_SCU.WDTCPU[coreIndex]);
1039 /*PCACHE enable steps */
1040 { /* Step 1: Set PCBYP to 0 if cache is enabled */
1041 IfxScuWdt_clearCpuEndinitInline(&MODULE_SCU.WDTCPU[coreIndex], wdtPassword);
1042 Ifx_CPU_DCON0 dcon0;
1043 dcon0.U = 0;
1044 dcon0.B.DCBYP = enable ? 0 : 1; /*depending on the enable bypas bit is reset/set */
1045 __mtcr(CPU_DCON0, dcon0.U);
1046 IfxScuWdt_setCpuEndinitInline(&MODULE_SCU.WDTCPU[coreIndex], wdtPassword);
1047 }
1048 /* Step 2: Call Isync */
1049 __isync();
1050 }
1051
1052
1053 IFX_INLINE void IfxCpu_setPerformanceCountersEnableBit(uint32 enable)
1054 {
1055 Ifx_CPU_CCTRL cctrl;
1056 cctrl.U = __mfcr(CPU_CCTRL);
1057 cctrl.B.CE = enable;
1058 __mtcr(CPU_CCTRL, cctrl.U);
1059 }
1060
1061
1062 IFX_INLINE void IfxCpu_setProgramCache(boolean enable)
1063 {
1064 if (enable)
1065 { /* Step 3: Initiate invalidation of current cache contents if any */
1066 Ifx_CPU_PCON1 pcon1;
1067 pcon1.U = 0;
1068 pcon1.B.PCINV = 1;
1069 __mtcr(CPU_PCON1, pcon1.U);
1070 }
1071
1072 uint32 coreIndex = IfxCpu_getCoreIndex();
1073 uint16 wdtPassword = IfxScuWdt_getCpuWatchdogPasswordInline(&MODULE_SCU.WDTCPU[coreIndex]);
1074 /*PCACHE enable steps */
1075 { /* Step 1: Set PCBYP to 0 if cache is enabled */
1076 IfxScuWdt_clearCpuEndinitInline(&MODULE_SCU.WDTCPU[coreIndex], wdtPassword);
1077 Ifx_CPU_PCON0 pcon0;
1078 pcon0.U = 0;
1079 pcon0.B.PCBYP = enable ? 0 : 1; /*depending on the enable bypass bit is reset/set */
1080 __mtcr(CPU_PCON0, pcon0.U);
1081 IfxScuWdt_setCpuEndinitInline(&MODULE_SCU.WDTCPU[coreIndex], wdtPassword);
1082 }
1083 /* Step 2: Call Isync */
1084 __isync();
1085 }
1086
1087
1088 IFX_INLINE void IfxCpu_setSafetyTaskIdentifier(boolean safetyId)
1089 {
1090 Ifx_CPU_PSW psw;
1091 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (safetyId == 0 || safetyId == 1));
1092 psw.U = __mfcr(CPU_PSW);
1093 psw.B.S = safetyId;
1094 __mtcr(CPU_PSW, (uint32)psw.U);
1095 }
1096
1097
1098 #if !((defined(__cplusplus)) && (defined(__TASKING__)))
1099 IFX_INLINE IfxCpu_Perf IfxCpu_stopCounters(void)
1100 {
1101 IfxCpu_Perf result;
1102 /*Disable the counters, reset the control reg */
1103 /* Use inline assembly to ensure constant implementation, and execution of the measurement routines */
1104 __stopPerfCounters();
1105
1106 Ifx_CPU_CCNT ccnt;
1107 ccnt.U = __mfcr(CPU_CCNT);
1108 result.clock.counter = ccnt.B.COUNTVALUE;
1109 result.clock.overlfow = ccnt.B.SOVF;
1110
1111 Ifx_CPU_ICNT icnt;
1112 icnt.U = __mfcr(CPU_ICNT);
1113 result.instruction.counter = icnt.B.COUNTVALUE;
1114 result.instruction.overlfow = icnt.B.SOVF;
1115
1116 Ifx_CPU_M1CNT m1cnt;
1117 m1cnt.U = __mfcr(CPU_M1CNT);
1118 result.counter1.counter = m1cnt.B.COUNTVALUE;
1119 result.counter1.overlfow = m1cnt.B.SOVF;
1120
1121 Ifx_CPU_M2CNT m2cnt;
1122 m2cnt.U = __mfcr(CPU_M2CNT);
1123 result.counter2.counter = m2cnt.B.COUNTVALUE;
1124 result.counter2.overlfow = m2cnt.B.SOVF;
1125
1126 Ifx_CPU_M3CNT m3cnt;
1127 m3cnt.U = __mfcr(CPU_M3CNT);
1128 result.counter3.counter = m3cnt.B.COUNTVALUE;
1129 result.counter3.overlfow = m3cnt.B.SOVF;
1130
1131 return result;
1132 }
1133 #endif
1134
1135
1136 IFX_INLINE void IfxCpu_triggerSwReset(void)
1137 {
1138 MODULE_SCU.SWRSTCON.B.SWRSTREQ = 1;
1139
1140 /* Wait till reset */
1141 while (1)
1142 {}
1143 }
1144
1145
1146 IFX_INLINE void IfxCpu_updateClockCounter(uint32 count)
1147 {
1148 IfxCpu_updatePerformanceCounter(CPU_CCNT, count);
1149 }
1150
1151
1152 IFX_INLINE void IfxCpu_updateInstructionCounter(uint32 count)
1153 {
1154 IfxCpu_updatePerformanceCounter(CPU_ICNT, count);
1155 }
1156
1157
1158 IFX_INLINE void IfxCpu_updatePerformanceCounter(uint32 address, uint32 count)
1159 {
1160 IFX_UNUSED_PARAMETER(address);
1161 Ifx_CPU_CCTRL cctrl;
1162 boolean enableBit;
1163 /*Disable the counters */
1164 cctrl.U = __mfcr(CPU_CCTRL);
1165 enableBit = cctrl.B.CE;
1166 cctrl.B.CE = 0;
1167 __mtcr(CPU_CCTRL, cctrl.U);
1168
1169 /*Update the counter value */
1170 count &= ~(1U << 31); /*clear sticky overflow bit if set */
1171 __mtcr(address, count);
1172
1173 /*restore the enable bit */
1174 cctrl.B.CE = enableBit;
1175 __mtcr(CPU_CCTRL, cctrl.U);
1176 }
1177
1178
1179 #endif /* IFXCPU_H */
IfxCpu_OverlayAddressMask_32byte
32 byte block size Mask
Definition: IfxCpu.h:151
__mtcr
void __mtcr(const uint32, sint32) __attribute__((intrinsic_function(0x102
IfxCpu_OverlayAddressMask_64byte
64 byte block size Mask
Definition: IfxCpu.h:152
__disable
void __disable(void) __attribute__((intrinsic_function(0x103
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxCpu_getAddress
IFX_INLINE Ifx_CPU * IfxCpu_getAddress(IfxCpu_ResourceCpu cpu)
API to get the address for CPU HW module register memory map.
Definition: IfxCpu.h:834
IfxCpu_setCoreMode
IFX_EXTERN boolean IfxCpu_setCoreMode(Ifx_CPU *cpu, IfxCpu_CoreMode mode)
API to set mode of the CPU.
Definition: IfxCpu.c:403
IfxCpu_initCSA
IFX_INLINE void IfxCpu_initCSA(uint32 *csaBegin, uint32 *csaEnd)
API to initialize the context save area of the CPU where this is called.
Definition: IfxCpu.h:949
IfxCpu_getRandomValueWithinRange
IFX_EXTERN uint32 IfxCpu_getRandomValueWithinRange(uint32 *seed, uint32 min, uint32 max)
API to get random value with in the range.
Definition: IfxCpu.c:366
IfxCpu_OverlayMemorySelect_lmu
Redirection to LMU memory.
Definition: IfxCpu.h:174
IfxCpu_acquireMutex
IFX_EXTERN boolean IfxCpu_acquireMutex(IfxCpu_mutexLock *lock)
API to acquire the mutex (binary semaphore).
Definition: IfxCpu.c:54
IfxCpu_OverlayAddressMask_128KB
128K byte block size Mask
Definition: IfxCpu.h:163
IfxCpu_CoreMode_idle
Definition: IfxCpu.h:133
IfxCpu_emitEvent
IFX_EXTERN void IfxCpu_emitEvent(IfxCpu_syncEvent *event)
This function sets a bit corresponding to the core in the event.
Definition: IfxCpu.c:509
IfxCpu_OverlayAddressMask
IfxCpu_OverlayAddressMask
Overlay Address Mask: determines the overlay block size and the bits used for address comparison and ...
Definition: IfxCpu.h:149
__mfcr
sint32 __mfcr(const uint32) __attribute__((intrinsic_function(0x101
IfxCpu_ResourceCpu_none
None of the CPU.
Definition: IfxCpu_cfg.h:163
IfxCpu_triggerCpuReset
IFX_EXTERN void IfxCpu_triggerCpuReset(IfxCpu_ResourceCpu coreIndex)
To request reset of a particular core, given by coreId.
Definition: IfxCpu.c:515
IfxCpu_OverlayAddressMask_16KB
16K byte block size Mask
Definition: IfxCpu.h:160
IfxCpu_stopCounters
IFX_INLINE IfxCpu_Perf IfxCpu_stopCounters(void)
Stop instruction and clock counters, return their values.
Definition: IfxCpu.h:1099
IfxCpu_getClockCounter
IFX_INLINE uint32 IfxCpu_getClockCounter(void)
API to read the clock counter for the CPU which calls this API.
Definition: IfxCpu.h:851
IfxCpu_syncEvent
unsigned int IfxCpu_syncEvent
Event used for synchronisation.
Definition: IfxCpu.h:119
IfxScuWdt_clearCpuEndinitInline
IFX_INLINE void IfxScuWdt_clearCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, uint16 password)
SCUWDT Inline API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.h:548
IfxCpu_Perf
Performance counter result.
Definition: IfxCpu.h:206
IfxCpu_disableInterruptsAllExceptMaster
IFX_EXTERN void IfxCpu_disableInterruptsAllExceptMaster(IfxCpu_ResourceCpu masterCpu)
Disables interrupts for all CPUs except the Master CPU,index of which is given as the parameter...
Definition: IfxCpu.c:632
IfxCpu_OverlayAddressMask_4KB
4K byte block size Mask
Definition: IfxCpu.h:158
IfxScuWdt_getCpuWatchdogPasswordInline
IFX_INLINE uint16 IfxScuWdt_getCpuWatchdogPasswordInline(Ifx_SCU_WDTCPU *watchdog)
SCUWDT Inline API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.h:604
IfxCpu_getInstructionCounterStickyOverflow
IFX_INLINE boolean IfxCpu_getInstructionCounterStickyOverflow(void)
API to get sticky overflow bit of Instruction counter for the CPU, which calls this API...
Definition: IfxCpu.h:885
IfxCpu_getPerformanceCounterStickyOverflow
IFX_INLINE boolean IfxCpu_getPerformanceCounterStickyOverflow(uint16 address)
API to get sticky overflow bit of performance counter for the CPU, which calls this API...
Definition: IfxCpu.h:920
__nop
void __nop(void) __attribute__((intrinsic_function(0x103
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxCpu_enableInterrupts
IFX_INLINE void IfxCpu_enableInterrupts(void)
API to enable global interrupt. This API simply enables the global interrupt.
Definition: IfxCpu.h:759
IfxCpu_setProgramCache
IFX_INLINE void IfxCpu_setProgramCache(boolean enable)
API to enable or bypass the program cache for the CPU which calls this API.
Definition: IfxCpu.h:1062
IfxCpu_setDataCache
IFX_INLINE void IfxCpu_setDataCache(boolean enable)
API to enable or bypass the data cache for the CPU which calls this API.
Definition: IfxCpu.h:1035
Ifx_Assert.h
Assert functions.
IfxCpu_CoreMode
IfxCpu_CoreMode
Enumeration for the Cpu mode.
Definition: IfxCpu.h:129
IfxCpu_updateClockCounter
IFX_INLINE void IfxCpu_updateClockCounter(uint32 count)
API to update clock counter for the CPU which calls this API.
Definition: IfxCpu.h:1146
IfxCpu_waitEvent
IFX_EXTERN boolean IfxCpu_waitEvent(IfxCpu_syncEvent *event, uint32 timeoutMilliSec)
This function waits till all the cores have set their corresponding bits in the event. This function along with IfxCpu_emitEvent() are used to achieve the synchronisation between the configured cores. By default "IFXCPU_CFG_ALLCORE_DONE" macro defined for all the cores. In case the user wants to check for synchronisation among the required cores, the macro can be redefined with the value accroing to the CORE_ID register. The IfxCpu_emitEvent() is to be used in the Main functions of the Cores where the user wants to check for synchronisation.
Definition: IfxCpu.c:478
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
__isync
void __isync(void) __attribute__((intrinsic_function(0x103
IfxCpu_getRandomValue
IFX_EXTERN uint32 IfxCpu_getRandomValue(uint32 *seed)
API to get random value.
Definition: IfxCpu.c:327
IfxCpu_Perf::instruction
IfxCpu_Counter instruction
Instruction counter.
Definition: IfxCpu.h:208
IfxCpu_ResetStatus_cpuResetBySmu
Kernel reset was requested by hardware since last clear (SMU)
Definition: IfxCpu.h:180
IfxCpu_restoreInterrupts
IFX_INLINE void IfxCpu_restoreInterrupts(boolean enabled)
API to restore global interrupt with that of the passed parameter.
Definition: IfxCpu.h:1026
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxCpu_Perf::counter2
IfxCpu_Counter counter2
Multi counter 2.
Definition: IfxCpu.h:211
FALSE
#define FALSE
Definition: Platform_Types.h:93
__stopPerfCounters
#define __stopPerfCounters
Definition: IfxCpu_IntrinsicsDcc.h:2097
IfxCpu_OverlayMemorySelect_core2DsprPspr
Redirection to Core 2 DSPR/PSPR memory.
Definition: IfxCpu.h:172
IfxCpu_getCpuResetStatus
IFX_EXTERN IfxCpu_ResetStatus IfxCpu_getCpuResetStatus(IfxCpu_ResourceCpu coreIndex)
Retrieve the cause of reset(no reset, hardware(SMU) or software) since last clear by reading KRST0...
Definition: IfxCpu.c:535
IfxCpu_Perf::clock
IfxCpu_Counter clock
CPU clock counter.
Definition: IfxCpu.h:209
IfxCpu_OverlayMemorySelect_core0DsprPspr
Redirection to Core 0 DSPR/PSPR memory.
Definition: IfxCpu.h:170
IfxCpu_CoreMode_sleep
Definition: IfxCpu.h:134
IfxCpu_enableSegmentSpecificDataAccessCacheability
IFX_INLINE void IfxCpu_enableSegmentSpecificDataAccessCacheability(uint16 segmentNumberMask, boolean enable)
API to enable/ disable the data cacheability for selected segments With this API cacheability for one...
Definition: IfxCpu.h:765
IfxCpu_releaseMutex
IFX_EXTERN void IfxCpu_releaseMutex(IfxCpu_mutexLock *lock)
API to unlock the mutex .
Definition: IfxCpu.c:389
IfxScuWdt.h
SCU basic functionality.
IfxCpu_invalidateProgramCache
IFX_INLINE void IfxCpu_invalidateProgramCache(void)
API to invalidate the program cache.
Definition: IfxCpu.h:983
IfxCpu_ResourceCpu
IfxCpu_ResourceCpu
List of the available CPU resources.
Definition: IfxCpu_cfg.h:157
IfxCpu_Id
IfxCpu_Id
List of the available CPU ids.
Definition: IfxCpu_cfg.h:124
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxCpu_CoreMode_stby
Definition: IfxCpu.h:135
IfxCpu_ResetStatus
IfxCpu_ResetStatus
Definition: IfxCpu.h:177
IfxCpu_OverlayAddressMask_1KB
1K byte block size Mask
Definition: IfxCpu.h:156
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxCpu_disableInterrupts
IFX_INLINE boolean IfxCpu_disableInterrupts(void)
API to disable global interrupt and return the previous status.
Definition: IfxCpu.h:749
IfxCpu_OverlayAddressMask_8KB
8K byte block size Mask
Definition: IfxCpu.h:159
IfxCpu_setSafetyTaskIdentifier
IFX_INLINE void IfxCpu_setSafetyTaskIdentifier(boolean safetyId)
Set/Clear safety task identifier (PSW.S) on current CPU.
Definition: IfxCpu.h:1088
IfxCpu_OverlayAddressMask_64KB
64K byte block size Mask
Definition: IfxCpu.h:162
IfxCpu_OverlayMemorySelect_core1DsprPspr
Redirection to Core 1 DSPR/PSPR memory.
Definition: IfxCpu.h:171
max
sint32 max
Definition: IfxCpu_IntrinsicsDcc.h:149
IfxCpu_OverlayAddressMask_2KB
2K byte block size Mask
Definition: IfxCpu.h:157
IfxScu_cfg.h
SCU on-chip implementation data.
IfxCpu_OverlayAddressMask_256byte
256 byte block size Mask
Definition: IfxCpu.h:154
IfxCpu_enableSegmentSpecificInstructionAccessCacheability
IFX_INLINE void IfxCpu_enableSegmentSpecificInstructionAccessCacheability(uint16 segmentNumberMask, boolean enable)
API to enable/ disable the instruction cacheability for selected segments With this API cacheability ...
Definition: IfxCpu.h:796
IfxCpu_getClockCounterStickyOverflow
IFX_INLINE boolean IfxCpu_getClockCounterStickyOverflow(void)
API to get sticky overflow bit of clock counter for the CPU, which calls this API.
Definition: IfxCpu.h:857
IfxCpu_getIndex
IFX_EXTERN IfxCpu_ResourceCpu IfxCpu_getIndex(Ifx_CPU *cpu)
API to get current mode of CPU.
Definition: IfxCpu.c:308
IfxCpu_setAllIdleExceptMasterCpu
IFX_EXTERN void IfxCpu_setAllIdleExceptMasterCpu(IfxCpu_ResourceCpu masterCpu)
Sets all CPUs to Idle mode except the Master CPU,index of which is given as the parameter.
Definition: IfxCpu.c:544
IfxCpu_mutexLock
unsigned int IfxCpu_mutexLock
Lock type Mutex lock.
Definition: IfxCpu.h:115
IFXCPU_CACHABLE_LMU_SEGMENT
#define IFXCPU_CACHABLE_LMU_SEGMENT
Segment number of cachable LMU region.
Definition: IfxCpu_cfg.h:73
IfxCpu_OverlayMemorySelect
IfxCpu_OverlayMemorySelect
Selects overlay memory used for redirection.
Definition: IfxCpu.h:168
IfxCpu_triggerSwReset
IFX_INLINE void IfxCpu_triggerSwReset(void)
Triggers Software Reset.
Definition: IfxCpu.h:1136
IfxCpu_setPerformanceCountersEnableBit
IFX_INLINE void IfxCpu_setPerformanceCountersEnableBit(uint32 enable)
API to enable or disable performance counter for the CPU which calls this API.
Definition: IfxCpu.h:1053
IfxCpu_spinLock
unsigned int IfxCpu_spinLock
Lock type Spin lock.
Definition: IfxCpu.h:111
__dsync
void __dsync(void) __attribute__((intrinsic_function(0x103
IfxCpu_isAddressCachable
IFX_INLINE boolean IfxCpu_isAddressCachable(void *address)
API to determine if an address is in a cachable or non-cachable Flash/LMU section.
Definition: IfxCpu.h:997
IfxCpu_CounterMode_task
Normal counter mode:additional gating control from the debug unit which allows the data gathered in t...
Definition: IfxCpu.h:144
IfxCpu_getCoreMode
IFX_EXTERN IfxCpu_CoreMode IfxCpu_getCoreMode(Ifx_CPU *cpu)
API to get current mode of CPU.
Definition: IfxCpu.c:195
IfxCpu_startCore
IFX_EXTERN boolean IfxCpu_startCore(Ifx_CPU *cpu, uint32 programCounter)
API to set the program counter for the CPU specified and start the CPU.
Definition: IfxCpu.c:456
IfxCpu_resetAndStartCounters
IFX_INLINE void IfxCpu_resetAndStartCounters(IfxCpu_CounterMode mode)
Reset and start instruction, clock and multi counters.
Definition: IfxCpu.h:1004
IfxCpu_Perf::counter1
IfxCpu_Counter counter1
Multi counter 1.
Definition: IfxCpu.h:210
IfxCpu_Counter
counter
Definition: IfxCpu.h:194
IfxCpu_OverlayAddressMask_128byte
128 byte block size Mask
Definition: IfxCpu.h:153
IfxCpu_ResetStatus_notCpuReset
No Kernel Reset was executed.
Definition: IfxCpu.h:179
IfxCpu_disableOverlayBlock
IFX_EXTERN void IfxCpu_disableOverlayBlock(IfxCpu_ResourceCpu cpu, uint16 overlayBlock)
This function disables the overlay memory.
Definition: IfxCpu.c:75
IfxScuWdt_setCpuEndinitInline
IFX_INLINE void IfxScuWdt_setCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, uint16 password)
SCUWDT Inline API to Set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.h:656
IfxCpu_getInstructionCounter
IFX_INLINE uint32 IfxCpu_getInstructionCounter(void)
API to read the instruction counter for the CPU which calls this API.
Definition: IfxCpu.h:879
uint16
unsigned short uint16
Definition: Platform_Types.h:112
__enable
void __enable(void) __attribute__((intrinsic_function(0x103
IfxCpu_setSpinLock
IFX_EXTERN boolean IfxCpu_setSpinLock(IfxCpu_spinLock *lock, uint32 timeoutCount)
API to lock the resource in spin mode with the given timeout.
Definition: IfxCpu.c:428
IfxCpu_Perf::counter3
IfxCpu_Counter counter3
Multi counter 3.
Definition: IfxCpu.h:212
IfxCpu_Counter::counter
uint32 counter
Counter value.
Definition: IfxCpu.h:196
IfxCpu_OverlayAddressMask_32KB
32K byte block size Mask
Definition: IfxCpu.h:161
IfxCpu_CoreMode_unknown
Definition: IfxCpu.h:136
IfxCpu_enableOverlayBlock
IFX_EXTERN void IfxCpu_enableOverlayBlock(IfxCpu_ResourceCpu cpu, uint16 overlayBlock, IfxCpu_OverlayMemorySelect overlayMemorySelect, IfxCpu_OverlayAddressMask overlayAddressMask, uint32 targetBaseAddress, uint32 overlayBaseAddress)
This function configures and enables the overlay memory. Note: The data overlay provides the capabili...
Definition: IfxCpu.c:124
IfxScuCcu.h
SCU basic functionality.
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxCpu_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxCpu_cfg_indexMap[IFXCPU_NUM_MODULES]
Definition: IfxCpu_cfg.c:52
enable
void enable
Definition: IfxCpu_IntrinsicsDcc.h:477
IfxCpu_getCoreIndex
IFX_INLINE IfxCpu_ResourceCpu IfxCpu_getCoreIndex(void)
API to get cpu index of the caller CPU. Note: This api can be used whereever cpu no/index is needed...
Definition: IfxCpu.h:871
IfxCpu_areInterruptsEnabled
IFX_INLINE boolean IfxCpu_areInterruptsEnabled(void)
API to get the status of global interrupt enable (ICR.IE) for the CPU which calls this API This API p...
Definition: IfxCpu.h:741
min
sint32 min
Definition: IfxCpu_IntrinsicsDcc.h:131
IfxCpu_updateInstructionCounter
IFX_INLINE void IfxCpu_updateInstructionCounter(uint32 count)
API to update Instruction counter for the CPU which calls this API.
Definition: IfxCpu.h:1152
IfxCpu_OverlayAddressMask_512byte
512 byte block size Mask
Definition: IfxCpu.h:155
IfxCpu_getCoreId
IFX_INLINE IfxCpu_Id IfxCpu_getCoreId(void)
API to get core id of the CPU of the caller. Caution: Core id of the cpu&#39;s may not be continguous and...
Definition: IfxCpu.h:863
IFXCPU_CACHABLE_FLASH_SEGMENT
#define IFXCPU_CACHABLE_FLASH_SEGMENT
Segment number of cachable flash region.
Definition: IfxCpu_cfg.h:69
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxCpu_CounterMode_normal
Normal counter mode:the counter increments on their respective triggers.
Definition: IfxCpu.h:143
IfxCpu_OverlayMemorySelect_core3DsprPspr
Redirection to Core 3 DSPR/PSPR memory.
Definition: IfxCpu.h:173
IfxCpu_CoreMode_run
Definition: IfxCpu.h:132
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxCpu_setProgramCounter
IFX_EXTERN boolean IfxCpu_setProgramCounter(Ifx_CPU *cpu, uint32 programCounter)
API to set the program counter for the CPU specified.
Definition: IfxCpu.c:411
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
IfxCpu_cfg.h
CPU on-chip implementation data.
IfxCpu_CoreMode_halt
Definition: IfxCpu.h:131
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxCpu_Counter::overlfow
boolean overlfow
sticky overlfow
Definition: IfxCpu.h:197
IfxCpu_CounterMode
IfxCpu_CounterMode
Performance conunter modes.
Definition: IfxCpu.h:141
IfxCpu_updatePerformanceCounter
IFX_INLINE void IfxCpu_updatePerformanceCounter(uint32 address, uint32 count)
API to update performance counter for the CPU which calls this API. This is generic function to updat...
Definition: IfxCpu.h:1158
IfxCpu_ResetStatus_cpuResetBySw
Kernel reset was requested by software since last clear (by writing KRST0.RST=1 and KRST1...
Definition: IfxCpu.h:181
IfxCpu_resetSpinLock
IFX_EXTERN void IfxCpu_resetSpinLock(IfxCpu_spinLock *lock)
API to unlock the resource .
Definition: IfxCpu.c:396
IfxCpu_forceDisableInterrupts
IFX_INLINE void IfxCpu_forceDisableInterrupts(void)
Disable the Global Interrupt.
Definition: IfxCpu.h:827
IfxCpu_getPerformanceCounter
IFX_INLINE uint32 IfxCpu_getPerformanceCounter(uint16 address)
API to read the performance counter for the CPU which calls this API.
Definition: IfxCpu.h:891


iLLD_TC38A: IfxCpu_Intrinsics.h Source File

  • Cpu
  • Std
IfxCpu_Intrinsics.h
Go to the documentation of this file.
1 /**
2 * \file IfxCpu_Intrinsics.h
3 * \ingroup IfxLld_Cpu_Intrinsics Intrinsics
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 * \defgroup IfxLld_Cpu_Intrinsics Intrinsics
41 * \ingroup IfxLld_Cpu_Std
42 *
43 */
44 #ifndef IFXCPU_INTRINSICS_H
45 #define IFXCPU_INTRINSICS_H
46 /******************************************************************************/
47 #include "Ifx_Types.h"
48
49 #if defined(__DCC__)
50 #include "IfxCpu_IntrinsicsDcc.h"
51
52 #elif defined(__HIGHTEC__)
53 #include "IfxCpu_IntrinsicsGnuc.h"
54
55 #elif defined(__TASKING__)
56 #include "IfxCpu_IntrinsicsTasking.h"
57
58 #elif defined(__ghs__)
59 #include "IfxCpu_IntrinsicsGhs.h"
60
61 #else
62 #error Compiler unsupported
63 #endif
64
65 #define IFX_ALIGN_8 (1) // Align on 8 bit Boundary
66 #define IFX_ALIGN_16 (2) // Align on 16 bit Boundary
67 #define IFX_ALIGN_32 (4) // Align on 32 bit Boundary
68 #define IFX_ALIGN_64 (8) // Align on 64 bit Boundary
69 #define IFX_ALIGN_128 (16) // Align on 128 bit Boundary
70 #define IFX_ALIGN_256 (32) // Align on 256 bit Boundary
71
72 #define Ifx_AlignOn256(Size) ((((Size) + (IFX_ALIGN_256 - 1)) & (~(IFX_ALIGN_256 - 1))))
73 #define Ifx_AlignOn128(Size) ((((Size) + (IFX_ALIGN_128 - 1)) & (~(IFX_ALIGN_128 - 1))))
74 #define Ifx_AlignOn64(Size) ((((Size) + (IFX_ALIGN_64 - 1)) & (~(IFX_ALIGN_64 - 1))))
75 #define Ifx_AlignOn32(Size) ((((Size) + (IFX_ALIGN_32 - 1)) & (~(IFX_ALIGN_32 - 1))))
76 #define Ifx_AlignOn16(Size) ((((Size) + (IFX_ALIGN_16 - 1)) & (~(IFX_ALIGN_16 - 1))))
77 #define Ifx_AlignOn8(Size) ((((Size) + (IFX_ALIGN_8 - 1)) & (~(IFX_ALIGN_8 - 1))))
78
79 #define Ifx_COUNTOF(x) (sizeof(x) / sizeof(x[0]))
80
81 //______________________________________________________________________________
82
83 /** Convert context pointer to address pointer
84 * \param[in] cx context pointer
85 * \return address pointer
86 */
87 IFX_INLINE void *__cx_to_addr(uint32 cx)
88 {
89 uint32 seg_nr = __extru(cx, 16, 4);
90 return (void *)__insert(seg_nr << 28, cx, 6, 16);
91 }
92
93
94 /** Convert address pointer to context pointer
95 * \param[in] addr address pointer
96 * \return context pointer
97 */
98 IFX_INLINE uint32 __addr_to_cx(void *addr)
99 {
100 uint32 seg_nr, seg_idx;
101 seg_nr = __extru((int)addr, 28, 4) << 16;
102 seg_idx = __extru((int)addr, 6, 16);
103 return seg_nr | seg_idx;
104 }
105
106
107 /******************************************************************************/
108 IFX_INLINE void __ldmst_c(volatile void *address, unsigned mask, unsigned value)
109 {
110 *(volatile uint32 *)address = (*(volatile uint32 *)address & ~(mask)) | (mask & value);
111 }
112
113
114 /** 32bit load operation
115 */
116 IFX_INLINE uint32 __ld32(void *addr)
117 {
118 return *(volatile uint32 *)addr;
119 }
120
121
122 /** 32bit store operation
123 */
124 IFX_INLINE void __st32(void *addr, uint32 value)
125 {
126 *(volatile uint32 *)addr = value;
127 }
128
129
130 /** 64bit load operation
131 */
132 IFX_INLINE uint64 __ld64(void *addr)
133 {
134 return *(volatile uint64 *)addr;
135 }
136
137
138 /** 64bit store operation
139 */
140 IFX_INLINE void __st64(void *addr, uint64 value)
141 {
142 *(volatile uint64 *)addr = value;
143 }
144
145
146 /** 64bit load operation which returns the lower and upper 32bit word
147 */
148 IFX_INLINE void __ld64_lu(void *addr, uint32 *valueLower, uint32 *valueUpper)
149 {
150 register uint64 value;
151 value = __ld64(addr);
152 *valueLower = (uint32)value;
153 *valueUpper = (uint32)(value >> 32);
154 }
155
156
157 /** 64bit store operation which stores a lower and upper 32bit word
158 */
159 IFX_INLINE void __st64_lu(void *addr, uint32 valueLower, uint32 valueUpper)
160 {
161 register uint64 value = ((uint64)valueUpper << 32) | valueLower;
162 __st64(addr, value);
163 }
164
165
166 /******************************************************************************/
167 #endif /* IFXCPU_INTRINSICS_H */
IfxCpu_IntrinsicsDcc.h
__st64
IFX_INLINE void __st64(void *addr, uint64 value)
Definition: IfxCpu_Intrinsics.h:140
__addr_to_cx
IFX_INLINE uint32 __addr_to_cx(void *addr)
Definition: IfxCpu_Intrinsics.h:98
__st32
IFX_INLINE void __st32(void *addr, uint32 value)
Definition: IfxCpu_Intrinsics.h:124
__ld64_lu
IFX_INLINE void __ld64_lu(void *addr, uint32 *valueLower, uint32 *valueUpper)
Definition: IfxCpu_Intrinsics.h:148
uint32
unsigned long uint32
Definition: Platform_Types.h:116
__ldmst_c
IFX_INLINE void __ldmst_c(volatile void *address, unsigned mask, unsigned value)
Definition: IfxCpu_Intrinsics.h:108
uint64
unsigned long long uint64
Definition: Platform_Types.h:121
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxCpu_IntrinsicsGhs.h
IfxCpu_IntrinsicsGnuc.h
__st64_lu
IFX_INLINE void __st64_lu(void *addr, uint32 valueLower, uint32 valueUpper)
Definition: IfxCpu_Intrinsics.h:159
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
__insert
uint32 __insert(uint32, uint32, uint32, const uint32) __attribute__((intrinsic_function(0x109
__extru
uint32 __extru(uint32, uint32, const uint32) __attribute__((intrinsic_function(0x108
IfxCpu_IntrinsicsTasking.h
__ld64
IFX_INLINE uint64 __ld64(void *addr)
Definition: IfxCpu_Intrinsics.h:132
__ld32
IFX_INLINE uint32 __ld32(void *addr)
Definition: IfxCpu_Intrinsics.h:116
__cx_to_addr
IFX_INLINE void * __cx_to_addr(uint32 cx)
Definition: IfxCpu_Intrinsics.h:87


iLLD_TC38A: IfxCpu_IntrinsicsDcc.h Source File

  • Cpu
  • Std
IfxCpu_IntrinsicsDcc.h
Go to the documentation of this file.
1 /**
2 * \file IfxCpu_IntrinsicsDcc.h
3 * \version iLLD_1_0_1_12_0
4 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
5 *
6 *
7 *
8 * IMPORTANT NOTICE
9 *
10 * Use of this file is subject to the terms of use agreed between (i) you or
11 * the company in which ordinary course of business you are acting and (ii)
12 * Infineon Technologies AG or its licensees. If and as long as no such terms
13 * of use are agreed, use of this file is subject to following:
14 *
15 * Boost Software License - Version 1.0 - August 17th, 2003
16 *
17 * Permission is hereby granted, free of charge, to any person or organization
18 * obtaining a copy of the software and accompanying documentation covered by
19 * this license (the "Software") to use, reproduce, display, distribute,
20 * execute, and transmit the Software, and to prepare derivative works of the
21 * Software, and to permit third-parties to whom the Software is furnished to
22 * do so, all subject to the following:
23 *
24 * The copyright notices in the Software and this entire statement, including
25 * the above license grant, this restriction and the following disclaimer, must
26 * be included in all copies of the Software, in whole or in part, and all
27 * derivative works of the Software, unless such copies or derivative works are
28 * solely in the form of machine-executable object code generated by a source
29 * language processor.
30 *
31 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
32 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
33 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
34 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
35 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
36 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
37 * DEALINGS IN THE SOFTWARE.
38 *
39 * \defgroup IfxLld_Cpu_Intrinsics_Dcc intrinsics for DCC compiler
40 * \ingroup IfxLld_Cpu_Intrinsics
41 *
42 */
43 #ifndef IFXCPU_INTRINSICSDCC_H
44 #define IFXCPU_INTRINSICSDCC_H
45 /******************************************************************************/
46 #include "Ifx_Types.h"
47
48 /******************************************************************************/
49 /* *INDENT-OFF* */
50 /** \defgroup IfxLld_Cpu_Intrinsics_Dcc_min_smax Minimum and Maximum of (Short) Integers
51 These intrinsic functions return the minimum or maximum of a signed integer, unsigned integer or short integer.
52 * \ingroup IfxLld_Cpu_Intrinsics_Dcc
53 * \{
54 */
55
56 /** Function call without return
57 */
58 asm volatile void Ifx__non_return_call(void (*fun)(void))
59 {
60 % reg fun
61 ji fun
62 }
63
64 /** Jump and link
65 */
66 asm volatile void Ifx__jump_and_link(void (*fun)(void))
67 {
68 % reg fun
69 jli fun
70 }
71
72 /** \} */
73
74 asm volatile void Ifx__moveToDataParam0(unsigned int var)
75 {
76 % reg var
77 ! "%d4"
78 mov %d4, var
79 }
80
81 asm volatile void Ifx__moveToDataParamRet(unsigned int var)
82 {
83 % reg var
84 ! "%d2"
85 mov %d2, var
86 }
87
88 asm volatile unsigned int Ifx__getDataParamRet(void)
89 {
90 ! "%d2"
91 mov %d2, %d2
92 }
93
94 asm volatile void Ifx__moveToAddrParam0(const void *var)
95 {
96 % reg var
97 ! "%a4"
98 mov.aa %a4, var
99 }
100
101 IFX_INLINE void Ifx__jumpToFunction(const void *fun)
102 {
103 Ifx__non_return_call((void (*)(void))fun);
104 }
105
106 IFX_INLINE void Ifx__jumpToFunctionWithLink(const void *fun)
107 {
108 Ifx__jump_and_link((void (*)(void))fun);
109 }
110
111 asm volatile void Ifx__jumpBackToLink(void)
112 {
113 ! "%a11"
114 ji %a11
115 }
116
117 /** \defgroup IfxLld_Cpu_Intrinsics_Dcc_any_type Cross type arithmetic operation
118 *
119 * Macro compatible with float, fix point, signed integer and unsigned integer
120 *
121 * \ingroup IfxLld_Cpu_Intrinsics_Dcc
122 * \{
123 */
124 #define Ifx__minX(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
125 #define Ifx__maxX(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
126 #define Ifx__saturateX(X,Min,Max) ( Ifx__minX(Ifx__maxX(X, Min), Max) )
127 #define Ifx__checkrangeX(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
128
129 /** Return minimum of two integers
130 */
131 extern sint32 __min( sint32, sint32) __attribute__((intrinsic_pseudo(3, "min") ));
132
133 #define Ifx__min __min
134
135 /** Return minimum of two short integers
136 */
137 extern sint32 __mins( sint32, sint32) __attribute__((intrinsic_function(0x10b, 0, "min.h") ));
138
139 #define Ifx__mins __mins
140
141 /** Return minimum of two unsigned integers
142 */
143 extern uint32 __minu( uint32, uint32) __attribute__((intrinsic_pseudo(3, "min.u") ));
144
145 #define Ifx__minu __minu
146
147 /** Return maximum of two integers
148 */
149 extern sint32 __max( sint32, sint32) __attribute__((intrinsic_pseudo(3, "max") ));
150
151 #define Ifx__max __max
152
153 /** Return maximum of two short integers
154 */
155 extern uint32 __maxs( uint32, uint32) __attribute__((intrinsic_function(0x10b, 0, "max.h") ));
156
157 #define Ifx__maxs __maxs
158
159 /** Return maximum of two unsigned integers
160 */
161 extern uint32 __maxu( uint32, uint32) __attribute__((intrinsic_pseudo(3, "max.u") ));
162
163 #define Ifx__maxu __maxu
164
165 /** \} */
166
167 /** \defgroup intrinsicstasking_float Floating point operation
168 * \ingroup IfxLld_Cpu_Intrinsics_Dcc
169 * \{
170 */
171 #define Ifx__saturate(X,Min,Max) ( __minf(__maxf(X, Min), Max) )
172
173 #define Ifx__sqrf(X) ((X) * (X))
174 #define Ifx__sqrtf(X) sqrtf(X)
175 #define Ifx__checkrange(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
176
177 #define Ifx__roundf(X) ((((X) - (sint32)(X)) > 0.5) ? (1 + (sint32)(X)) : ((sint32)(X)))
178 #define Ifx__absf(X) ( ((X) < 0.0) ? -(X) : (X) )
179 #define Ifx__minf(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
180 #define Ifx__maxf(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
181 #define Ifx__saturatef(X,Min,Max) ( __minf(__maxf(X, Min), Max) )
182 #define Ifx__checkrangef(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
183
184 #define Ifx__abs_stdreal(X) ( ((X) > 0.0) ? (X) : -(X) )
185 #define Ifx__min_stdreal(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
186 #define Ifx__max_stdreal(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
187 #define Ifx__saturate_stdreal(X,Min,Max) ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )
188
189 #define Ifx__neqf(X,Y) ( ((X) > (Y)) || ((X) < (Y)) ) /**< X != Y */
190 #define Ifx__leqf(X,Y) ( !((X) > (Y)) ) /**< X <= Y */
191 #define Ifx__geqf(X,Y) ( !((X) < (Y)) ) /**< X >= Y */
192 /** \} */
193
194 /** \defgroup IfxLld_Cpu_Intrinsics_Dcc_fractional Fractional Arithmetic Support
195 The next table provides an overview of intrinsic functions to convert fractional values. Note that the
196 TASKING VX-toolset C compiler for TriCore fully supports the fractional type so normally you should not
197 need these intrinsic functions (except for __mulfractlong). For compatibility reasons the TASKING C
198 compiler does support these functions.
199 * \ingroup IfxLld_Cpu_Intrinsics_Dcc
200 * \{
201 */
202
203 /** Count the consecutive number of bits that have the same value as bit 15 of an sfract
204 */
205 asm short Ifx__clssf(sfract a)
206 {
207 % reg a
208 ! "%d2"
209 sh a,a,16
210 cls %d2, a
211 }
212
213 /** Convert float to fract
214 */
215 asm fract Ifx__float_to_fract(float a)
216 {
217 % reg a
218 ! "%d2", "%d3"
219 mov %d3, 0
220 ftoq31 %d2, a, %d3
221 }
222
223 /** \brief Convert fract to float
224 */
225 asm float Ifx__fract_to_float(fract a)
226 {
227 % reg a
228 ! "%d2", "%d3"
229 mov %d3, 0
230 q31tof %d2, a, %d3
231 }
232
233 /** Convert __laccum to fract
234 */
235 asm fract Ifx__getfract(laccum a)
236 {
237 % reg a
238 ! "%d2"
239 dextr %d2, a!H, a!L, 17
240 }
241
242 /** Multiply-add with rounding. Returns the rounded result of ( a + b * c )
243 */
244 #ifdef INTRINSIC_WORKAROUND
245 extern sfract __mac_r_sf(sfract a, sfract b, sfract c);
246 #else
247 asm sfract Ifx__mac_r_sf(sfract a, sfract b, sfract c)
248 {
249 % reg a, b, c
250 ! "%d2"
251 maddrs.q %d2, a, bU, cU, 1
252 }
253 #endif
254
255 /** Multiply-add sfract. Returns ( a + b * c )
256 */
257 #ifdef INTRINSIC_WORKAROUND
258 extern sfract __mac_sf(sfract a, sfract b, sfract c);
259 #else
260 asm sfract Ifx__mac_sf(sfract a, sfract b, sfract c)
261 {
262 % reg a, b, c
263 ! "%d2"
264 madds.q %d2, a, bU, cU, 1
265 }
266 #endif
267
268 /** Integer part of the multiplication of a fract and a fract
269 */
270 asm long Ifx__mulfractfract(fract a, fract b)
271 {
272 % reg a, b
273 ! "%d2"
274 mul.q %d2, a, b, 1
275 }
276
277 /** Integer part of the multiplication of a fract and a long
278 */
279 asm long Ifx__mulfractlong(fract a, long b)
280 {
281 % reg a, b
282 ! "%d2"
283 mul.q %d2, a, b, 1
284 }
285
286 /** Convert fract to sfract
287 */
288 asm sfract Ifx__round16(fract a)
289 {
290 % reg a
291 ! "%d2"
292 mov.u %d2, 0x8000
293 adds %d2, a
294 extr %d2,%d2,0x10,0x10
295 }
296
297 #define Ifx__fract_to_sfract Ifx__round16
298
299 /** Convert float to sfract
300 */
301 IFX_INLINE sfract __float_to_sfract(float a)
302 {
303 fract tmp = Ifx__float_to_fract(a);
304 return Ifx__fract_to_sfract(tmp);
305 }
306
307 /** Convert signed short to sfract
308 */
309 asm sfract Ifx__s16_to_sfract(short a)
310 {
311 % reg a
312 ! "%d2"
313 sh %d2, a, 16
314 sh %d2, %d2, -16
315 }
316
317 /** Convert sfract to signed short
318 */
319 asm short Ifx__sfract_to_s16(sfract a)
320 {
321 % reg a
322 sh a, a, 16
323 sh %d2, a, -16
324 }
325
326 /** Convert sfract to uint16
327 */
328 asm volatile uint16 Ifx__sfract_to_u16(sfract a)
329 {
330 % reg a
331 ! "%d2"
332 sh a, a, 16
333 sh %d2, a, -16
334 }
335
336 /** Left/right shift of an __laccum
337 */
338 asm laccum Ifx__shaaccum(laccum a, sint32 b)
339 {
340 % lab L0, L1; reg a, b
341 ! "%d2", "%d3"
342 jge b, 0, L0
343 sha %d3, a!L, b
344 rsub b, b, 0
345 dextr %d2, a!H, a!L, b
346 j L1
347 L0:
348 dextr %d2, a!H, a!L, b
349 sha %d2, a!L, b
350 L1:
351 }
352
353 /** Left/right shift of an fract
354 */
355 #ifdef INTRINSIC_WORKAROUND
356 extern fract __shafracts(fract a, sint32 b);
357 #else
358 asm fract Ifx__shafracts(fract a, sint32 b)
359 {
360 % reg a, b
361 ! "%d2"
362 shas %d2, a, b
363 }
364 #endif
365
366 /** Left/right shift of an sfract
367 */
368 #ifdef INTRINSIC_WORKAROUND
369 extern sfract __shasfracts(sfract a, sint32 b);
370 #else
371 asm sfract Ifx__shasfracts(sfract a, sint32 b)
372 {
373 % reg a, b
374 ! "%d2"
375 shas %d2, a, b
376 }
377 #endif
378
379 /** Convert uint16 to sfract
380 */
381 asm sfract Ifx__u16_to_sfract(uint16 a)
382 {
383 % reg a
384 ! "%d2"
385 sh %d2, a, 16
386 sh %d2, %d2, -16
387 }
388
389 /** \} */
390
391 /** \defgroup IfxLld_Cpu_Intrinsics_Dcc_insert Insert / Extract Bit-fields and Bits
392 * \ingroup IfxLld_Cpu_Intrinsics_Dcc
393 * \{
394 */
395
396 /** Extract a bit-field (bit pos to bit pos+width) from value
397 */
398 extern sint32 __extr( sint32, uint32, const uint32) __attribute__((intrinsic_function(0x108, 0, "extr") ));
399
400 #define Ifx__extr __extr
401
402 /** Same as __extr() but return bit-field as unsigned integer
403 */
404 extern uint32 __extru( uint32, uint32, const uint32) __attribute__((intrinsic_function(0x108, 0, "extr.u") ));
405
406 #define Ifx__extru __extru
407
408 /** Load a single bit.
409 */
410 #define Ifx__getbit( address, bitoffset ) __extru( *(address), bitoffset, 1 )
411
412 /** Return trg but replace trgbit by srcbit in src.
413 */
414 extern uint32 __ins( uint32, const uint32, uint32, const uint32) __attribute__((intrinsic_function(0x121, 0, "ins.t") ));
415
416 #define Ifx__ins __ins
417
418 /** Extract bit-field (width w bits starting at bit 0) from a and insert it in
419 * b at position p.
420 */
421 extern uint32 __insert( uint32, uint32, uint32, const uint32) __attribute__((intrinsic_function(0x109, 0, "insert") ));
422
423 #define Ifx__insert __insert
424
425 /** Return trg but replace trgbit by inverse of srcbit in src.
426 */
427 extern uint32 __insn( uint32, const uint32, uint32, const uint32) __attribute__((intrinsic_function(0x121, 0, "insn.t") ));
428
429 #define Ifx__insn __insn
430
431 /** Atomic load-modify-store.
432 */
433 #ifdef INTRINSIC_WORKAROUND
434 extern void __imaskldmst(void* a, sint32 b, sint32 p, const sint32 w);
435 #else
436 asm volatile void Ifx__imaskldmst(void* a, sint32 b, sint32 p, const sint32 w)
437 {
438 % reg a, b, p; con w
439 ! "%d2", "%d3"
440 imask %e2, b, p, w
441 ldmst [a]0, %e2
442 }
443 #endif
444
445 /** Store a single bit.
446 */
447 #define Ifx__putbit(value,address,bitoffset) Ifx__imaskldmst(address,value,bitoffset,1)
448
449 /** \} */
450
451 /** \defgroup IfxLld_Cpu_Intrinsics_Dcc_interrupt_handling Interrupt Handling
452 The next table provides an overview of the intrinsic functions to read or set interrupt handling.
453 * \ingroup IfxLld_Cpu_Intrinsics_Dcc
454 * \{
455 */
456
457 /** Set CPU priority number [0..255] (or [0..1023] for TriCore 1.6.x) and enable interrupts immediately at function entry
458 */
459 extern void __bisr( const uint32) __attribute__((intrinsic_function(0x100, 0, "bisr") ));
460
461 #define Ifx__bisr __bisr
462
463 /** Disable interrupts. Only supported for TriCore1
464 */
465 extern void __disable( void) __attribute__((intrinsic_function(0x103, 0, "disable") ));
466
467 #define Ifx__disable __disable
468
469 /** Disable interrupts and return previous interrupt state (enabled or disabled). Direct supported for TriCore1.6. Emulated on TC1.3.1
470 */
471 #if defined INTRINSIC_WORKAROUND
472 extern sint32 __disable_and_save(void);
473 #endif
474
475 /** Enable interrupts immediately at function entry
476 */
477 extern void __enable( void) __attribute__((intrinsic_function(0x103, 0, "enable") ));
478
479 #define Ifx__enable __enable
480
481 /** Restore interrupt state. Direct supported for TriCore1.6. Emulated on TC1.3.1
482 */
483 extern void __restore( sint32) __attribute__((intrinsic_function(0x104, 0, "restore") ));
484
485 #define Ifx__restore __restore
486
487 /** Call a system call function number
488 */
489 extern void __syscall( const uint32) __attribute__((intrinsic_function(0x100, 0, "syscall") ));
490
491 #define Ifx__syscall __syscall
492
493 /** \} */
494
495 /** \defgroup IfxLld_Cpu_Intrinsics_Dcc_miscellaneous Miscellaneous Intrinsic Functions
496 * \ingroup IfxLld_Cpu_Intrinsics_Dcc
497 * \{
498 */
499
500 /** Write back and invalidate cache address "p". Generates CACHEA.WI [Ab].
501 */
502 extern void __cacheawi( void*) __attribute__((intrinsic_function(0x110, 0, "cachea.wi") ));
503
504 #define Ifx__cacheawi __cacheawi
505
506 /** Write back and invalidate cache address \"p\" and return post incremented
507 * value of \"p\". Generates CACHEA.WI [Ab+].
508 */
509 asm volatile uint8* Ifx__cacheawi_bo_post_inc(uint8* p)
510 {
511 % reg p
512 !
513 cachea.wi [p + ]0
514 mov.aa %a2, p
515 }
516
517 /** Write back and invalidate cache index "p". Generates CACHEI.WI [Ab].
518 */
519 asm volatile void Ifx__cacheiwi(uint8* p)
520 {
521 % reg p
522 !
523 cachei.wi [p]
524 }
525
526 /** Initialize a circular pointer with a dynamically allocated buffer at run-time.
527 */
528 asm circ_t __initcirc(void* buf, uint16 bufsize, uint16 byteindex)
529 {
530 % reg buf, bufsize, byteindex
531 ! "%a2", "%a3"
532 lea %a2, [buf]0
533 extr.u bufsize, bufsize, 0, 16
534 insert bufsize, byteindex, bufsize, 16, 16
535 mov.a %a3, bufsize
536 }
537
538 /** Multiply two 32-bit numbers to an intermediate 64-bit result, and scale
539 * back the result to 32 bits. To scale back the result, 32 bits are extracted
540 * from the intermediate 64-bit result: bit 63-offset to bit 31-offset.
541 */
542 asm volatile sint32 Ifx__mulsc(sint32 a, sint32 b, sint32 offset)
543 {
544 % reg a, b, offset
545 ! "%d2", "%d3"
546 mul %e2, a, b
547 dextr %d2, %d3, %d2, offset
548 }
549
550 /** Rotate operand left count times. The bits that are shifted out are inserted at the right side (bit 31 is shifted to bit 0).
551 */
552 asm volatile uint32 Ifx__rol(uint32 operand, uint32 count)
553 {
554 % reg operand, count
555 ! "%d2"
556 dextr %d2, operand, operand, count
557 }
558
559 /** Rotate operand right count times. The bits that are shifted out are inserted at the left side (bit 0 is shifted to bit 31).
560 */
561 asm volatile uint32 Ifx__ror(uint32 operand, uint32 count)
562 {
563 % reg operand, count
564 ! "%d2"
565 rsub count, count, 0
566 dextr %d2, operand, operand, count
567 }
568
569 /** \} */
570
571 /** \defgroup IfxLld_Cpu_Intrinsics_Dcc_packed Packed Data Type Support
572 The next table provides an overview of the intrinsic functions for initialization of packed data type.
573 * \ingroup IfxLld_Cpu_Intrinsics_Dcc
574 * \{
575 */
576
577 /** Absolute value of __packb
578 */
579 asm __packb Ifx__absb(__packb a)
580 {
581 % reg a
582 ! "%d2"
583 abs.b %d2, a
584 }
585
586 /** Absolute value of __packhw
587 */
588 asm __packhw Ifx__absh(__packhw a)
589 {
590 % reg a
591 ! "%d2"
592 abs.h %d2, a
593 }
594
595 /** Absolute value of __packhw using saturation
596 */
597 asm __packhw Ifx__abssh(__packhw a)
598 {
599 % reg a
600 ! "%d2"
601 abss.h %d2, a
602 }
603
604 /** \brief Extract first byte from a __packb
605 */
606 asm sint8 Ifx__extractbyte1(__packb a)
607 {
608 % reg a
609 ! "%d2"
610 extr %d2, a, 0, 8
611 }
612
613 /** \brief Extract second byte from a __packb
614 */
615 asm sint8 Ifx__extractbyte2(__packb a)
616 {
617 % reg a
618 ! "%d2"
619 extr %d2, a, 8, 8
620 }
621
622 /** \brief Extract third byte from a __packb
623 */
624 asm sint8 Ifx__extractbyte3(__packb a)
625 {
626 % reg a
627 ! "%d2"
628 extr %d2, a, 16, 8
629 }
630
631 /** \brief Extract fourth byte from a __packb
632 */
633 asm sint8 Ifx__extractbyte4(__packb a)
634 {
635 % reg a
636 ! "%d2"
637 extr %d2, a, 24, 8
638 }
639
640 /** \brief Extract first short from a __packhw
641 */
642 asm short Ifx__extracthw1(__packhw a)
643 {
644 % reg a
645 ! "%d2"
646 extr %d2, a, 0, 16
647 }
648
649 /** \brief Extract second short from a __packhw
650 */
651 asm short Ifx__extracthw2(__packhw a)
652 {
653 % reg a
654 ! "%d2"
655 extr %d2, a, 16, 16
656 }
657
658 /** Extract first unsigned byte from a __packb
659 */
660 asm volatile uint8 Ifx__extractubyte1(__upackb a)
661 {
662 % reg a
663 ! "%d2"
664 extr %d2, a, 0, 8
665 }
666
667 /** Extract second unsigned byte from a __packb
668 */
669 asm volatile uint8 Ifx__extractubyte2(__upackb a)
670 {
671 % reg a
672 ! "%d2"
673 extr %d2, a, 8, 8
674 }
675
676 /** Extract third unsigned byte from a __packb
677 */
678 asm volatile uint8 Ifx__extractubyte3(__upackb a)
679 {
680 % reg a
681 ! "%d2"
682 extr %d2, a, 16, 8
683 }
684
685 /** Extract fourth unsigned byte from a __packb
686 */
687 asm volatile uint8 Ifx__extractubyte4(__upackb a)
688 {
689 % reg a
690 ! "%d2"
691 extr %d2, a, 24, 8
692 }
693
694 /** Extract first uint16 from a __packhw
695 */
696 asm volatile uint16 Ifx__extractuhw1(__upackhw a)
697 {
698 % reg a
699 ! "%d2"
700 extr %d2, a, 0, 16
701 }
702
703 /** Extract second uint16 from a __packhw
704 */
705 asm volatile uint16 Ifx__extractuhw2(__upackhw a)
706 {
707 % reg a
708 ! "%d2"
709 extr %d2, a, 16, 16
710 }
711
712 /** Extract first byte from a __packb
713 */
714 asm sint8 Ifx__getbyte1(__packb* a)
715 {
716 % reg a
717 ! "%d2"
718 ld.w %d2, [a]
719 extr %d2, %d2, 0, 8
720 }
721
722 /** Extract second byte from a __packb
723 */
724 asm sint8 Ifx__getbyte2(__packb* a)
725 {
726 % reg a
727 ! "%d2"
728 ld.w %d2, [a]
729 extr %d2, %d2, 8, 8
730 }
731
732 /** Extract third byte from a __packb
733 */
734 asm sint8 Ifx__getbyte3(__packb* a)
735 {
736 % reg a
737 ! "%d2"
738 ld.w %d2, [a]
739 extr %d2, %d2, 16, 8
740 }
741
742 /** Extract fourth byte from a __packb
743 */
744 asm sint8 Ifx__getbyte4(__packb* a)
745 {
746 % reg a
747 ! "%d2"
748 ld.w %d2, [a]
749 extr %d2, %d2, 24, 8
750 }
751
752 /** Extract first short from a __packhw
753 */
754 asm short Ifx__gethw1(__packhw* a)
755 {
756 % reg a
757 ! "%d2"
758 ld.w %d2, [a]
759 extr %d2, %d2, 0, 16
760 }
761
762 /** Extract second short from a __packhw
763 */
764 asm short Ifx__gethw2(__packhw* a)
765 {
766 % reg a
767 ! "%d2"
768 ld.w %d2, [a]
769 extr %d2, %d2, 16, 16
770 }
771
772 /** Extract first unsigned byte from a __packb
773 */
774 asm volatile uint8 Ifx__getubyte1(__upackb* a)
775 {
776 % reg a
777 ! "%d2"
778 ld.w %d2, [a]
779 extr %d2, %d2, 0, 8
780 }
781
782 /** Extract second unsigned byte from a __packb
783 */
784 asm volatile uint8 Ifx__getubyte2(__upackb* a)
785 {
786 % reg a
787 ! "%d2"
788 ld.w %d2, [a]
789 extr %d2, %d2, 8, 8
790 }
791
792 /** Extract third unsigned byte from a __packb
793 */
794 asm volatile uint8 Ifx__getubyte3(__upackb* a)
795 {
796 % reg a
797 ! "%d2"
798 ld.w %d2, [a]
799 extr %d2, %d2, 16, 8
800 }
801
802 /** Extract fourth unsigned byte from a __packb
803 */
804 asm volatile uint8 Ifx__getubyte4(__upackb* a)
805 {
806 % reg a
807 ! "%d2"
808 ld.w %d2, [a]
809 extr %d2, %d2, 24, 8
810 }
811
812 /** Extract first uint16 from a __packhw
813 */
814 asm volatile uint16 Ifx__getuhw1(__upackhw* a)
815 {
816 % reg a
817 ! "%d2"
818 ld.w %d2, [a]
819 extr %d2, %d2, 0, 16
820 }
821
822 /** Extract second uint16 from a __packhw
823 */
824 asm volatile uint16 Ifx__getuhw2(__upackhw* a)
825 {
826 % reg a
827 ! "%d2"
828 ld.w %d2, [a]
829 extr %d2, %d2, 16, 16
830 }
831
832 /** Initialize __packb with four integers
833 */
834 asm __packb Ifx__initpackb(sint32 a, sint32 b, sint32 c, sint32 d)
835 {
836 % reg a, b, c, d
837 ! "%d2"
838 insert c, c, d, 8, 8
839 insert d, a, b, 8, 8
840 insert %d2, d, c, 16, 16
841 }
842
843 /** Initialize __packb with a long integer
844 */
845 asm __packb Ifx__initpackbl(long a)
846 {
847 % reg a
848 ! "%d2"
849 mov %d2, a
850 }
851
852 /** \brief Initialize __packhw with two integers
853 */
854 asm __packhw Ifx__initpackhw(short a, short b)
855 {
856 % reg a, b
857 ! "%d2"
858 insert %d2, a, b, 16, 16
859 }
860
861 /** Initialize __packhw with a long integer
862 */
863 asm __packhw Ifx__initpackhwl(long a)
864 {
865 % reg a
866 ! "%d2"
867 mov %d2, a
868 }
869
870 /** Initialize __packb with four unsigned integers
871 */
872 asm __upackb Ifx__initupackb( uint32 a, uint32 b, uint32 c, uint32 d)
873 {
874 % reg a, b, c, d
875 ! "%d2"
876 insert c, c, d, 8, 8
877 insert a, a, b, 8, 8
878 insert %d2, a, c, 16, 16
879 }
880
881 /** Initialize __packhw with two unsigned integers
882 */
883 asm __upackhw Ifx__initupackhw( uint16 a, uint16 b)
884 {
885 % reg a, b
886 ! "%d2"
887 insert %d2, a, b, 16, 16
888 }
889
890 /** \brief Insert sint8 into first byte of a __packb
891 */
892 asm __packb Ifx__insertbyte1(__packb a, sint8 b)
893 {
894 % reg a, b
895 ! "%d2"
896 insert %d2, a, b, 0, 8
897 }
898
899 /** \brief Insert sint8 into second byte of a __packb
900 */
901 asm __packb Ifx__insertbyte2(__packb a, sint8 b)
902 {
903 % reg a, b
904 ! "%d2"
905 insert %d2, a, b, 8, 8
906 }
907
908 /** \brief Insert sint8 into third byte of a __packb
909 */
910 asm __packb Ifx__insertbyte3(__packb a, sint8 b)
911 {
912 % reg a, b
913 ! "%d2"
914 insert %d2, a, b, 16, 8
915 }
916
917 /** \brief Insert sint8 into fourth byte of a __packb
918 */
919 asm __packb Ifx__insertbyte4(__packb a, sint8 b)
920 {
921 % reg a, b
922 ! "%d2"
923 insert %d2, a, b, 24, 8
924 }
925
926 /** Insert short into first halfword of a __packhw
927 */
928 asm __packhw Ifx__inserthw1(__packhw a, short b)
929 {
930 % reg a, b
931 ! "%d2"
932 insert %d2, a, b, 0, 16
933 }
934
935 /** Insert short into second halfword of a __packhw
936 */
937 asm __packhw Ifx__inserthw2(__packhw a, short b)
938 {
939 % reg a, b
940 ! "%d2"
941 insert %d2, a, b, 16, 16
942 }
943
944 /** \brief Insert uint8 into first unsigned byte of a __packb
945 */
946 asm __upackb Ifx__insertubyte1( __upackb a, uint8 b)
947 {
948 % reg a, b
949 ! "%d2"
950 insert %d2, a, b, 0, 8
951 }
952
953 /** \brief Insert uint8 into second unsigned byte of a __packb
954 */
955 asm __upackb Ifx__insertubyte2( __upackb a, uint8 b)
956 {
957 % reg a, b
958 ! "%d2"
959 insert %d2, a, b, 8, 8
960 }
961
962 /** \brief Insert uint8 into third unsigned byte of a __packb
963 */
964 asm __upackb Ifx__insertubyte3( __upackb a, uint8 b)
965 {
966 % reg a, b
967 ! "%d2"
968 insert %d2, a, b, 16, 8
969 }
970
971 /** \brief Insert uint8 into fourth unsigned byte of a __packb
972 */
973 asm __upackb Ifx__insertubyte4( __upackb a, uint8 b)
974 {
975 % reg a, b
976 ! "%d2"
977 insert %d2, a, b, 24, 8
978 }
979
980 /** Insert uint16 into first halfword of a __upackhw
981 */
982 asm __upackhw Ifx__insertuhw1( __upackhw a, uint16 b)
983 {
984 % reg a, b
985 ! "%d2"
986 insert %d2, a, b, 0, 16
987 }
988
989 /** Insert uint16 into second halfword of a __upackhw
990 */
991 asm __upackhw Ifx__insertuhw2( __upackhw a, uint16 b)
992 {
993 % reg a, b
994 ! "%d2"
995 insert %d2, a, b, 16, 16
996 }
997
998 /** Minimum of two __packb values
999 */
1000 #ifdef INTRINSIC_WORKAROUND
1001 extern __packb __minb(__packb a, __packb b);
1002 #else
1003 asm __packb Ifx__minb(__packb a, __packb b)
1004 {
1005 % reg a, b
1006 ! "%d2"
1007 min.b %d2, a, b
1008 }
1009 #endif
1010
1011 /** Minimum of two __upackb values
1012 */
1013 asm __upackb Ifx__minbu( __upackb a, __upackb b)
1014 {
1015 % reg a, b
1016 ! "%d2"
1017 min.bu %d2, a, b
1018 }
1019
1020 /** Minimum of two __packhw values
1021 */
1022 asm __packhw Ifx__minh(__packhw a, __packhw b)
1023 {
1024 % reg a, b
1025 ! "%d2"
1026 min.h %d2, a, b
1027 }
1028
1029 /** Minimum of two __upackhw values
1030 */
1031 asm __upackhw Ifx__minhu( __upackhw a, __upackhw b)
1032 {
1033 % reg a, b
1034 ! "%d2"
1035 min.hu %d2, a, b
1036 }
1037
1038 /** Insert sint8 into first byte of a __packb
1039 */
1040 asm volatile void Ifx__setbyte1(__packb* a, sint8 b)
1041 {
1042 % reg a, b
1043 ! "%d2"
1044 ld.w %d2, [a]
1045 insert %d2, %d2, b, 0, 8
1046 st.w [a], %d2
1047 }
1048
1049 /** Insert sint8 into second byte of a __packb
1050 */
1051 asm volatile void Ifx__setbyte2(__packb* a, sint8 b)
1052 {
1053 % reg a, b
1054 ! "%d2"
1055 ld.w %d2, [a]
1056 insert %d2, %d2, b, 8, 8
1057 st.w [a], %d2
1058 }
1059
1060 /** Insert sint8 into third byte of a __packb
1061 */
1062 asm volatile void Ifx__setbyte3(__packb* a, sint8 b)
1063 {
1064 % reg a, b
1065 ! "%d2"
1066 ld.w %d2, [a]
1067 insert %d2, %d2, b, 16, 8
1068 st.w [a], %d2
1069 }
1070
1071 /** Insert sint8 into fourth byte of a __packb
1072 */
1073 asm volatile void Ifx__setbyte4(__packb* a, sint8 b)
1074 {
1075 % reg a, b
1076 ! "%d2"
1077 ld.w %d2, [a]
1078 insert %d2, %d2, b, 24, 8
1079 st.w [a], %d2
1080 }
1081
1082 /** Insert short into first halfword of a __packhw
1083 */
1084 asm volatile void Ifx__sethw1(__packhw* a, short b)
1085 {
1086 % reg a, b
1087 ! "%d2"
1088 ld.w %d2, [a]
1089 insert %d2, %d2, b, 0, 16
1090 st.w [a], %d2
1091 }
1092
1093 /** Insert short into second halfword of a __packhw
1094 */
1095 asm volatile void Ifx__sethw2(__packhw* a, short b)
1096 {
1097 % reg a, b
1098 ! "%d2"
1099 ld.w %d2, [a]
1100 insert %d2, %d2, b, 16, 16
1101 st.w [a], %d2
1102 }
1103
1104 /** Insert uint8 into first byte of a __upackb
1105 */
1106 asm volatile void Ifx__setubyte1(__upackb* a, uint8 b)
1107 {
1108 % reg a, b
1109 ! "%d2"
1110 ld.w %d2, [a]
1111 insert %d2, %d2, b, 0, 8
1112 st.w [a], %d2
1113 }
1114
1115 /** Insert uint8 into second byte of a __upackb
1116 */
1117 asm volatile void Ifx__setubyte2(__upackb* a, uint8 b)
1118 {
1119 % reg a, b
1120 ! "%d2"
1121 ld.w %d2, [a]
1122 insert %d2, %d2, b, 8, 8
1123 st.w [a], %d2
1124 }
1125
1126 /** Insert uint8 into third byte of a __upackb
1127 */
1128 asm volatile void Ifx__setubyte3(__upackb* a, uint8 b)
1129 {
1130 % reg a, b
1131 ! "%d2"
1132 ld.w %d2, [a]
1133 insert %d2, %d2, b, 16, 8
1134 st.w [a], %d2
1135 }
1136
1137 /** Insert uint8 into fourth byte of a __upackb
1138 */
1139 asm volatile void Ifx__setubyte4(__upackb* a, uint8 b)
1140 {
1141 % reg a, b
1142 ! "%d2"
1143 ld.w %d2, [a]
1144 insert %d2, %d2, b, 24, 8
1145 st.w [a], %d2
1146 }
1147
1148 /** Insert uint16 into first halfword of a __upackhw
1149 */
1150 asm volatile void Ifx__setuhw1(__upackhw* a, uint16 b)
1151 {
1152 % reg a, b
1153 ! "%d2"
1154 ld.w %d2, [a]
1155 insert %d2, %d2, b, 0, 16
1156 st.w [a], %d2
1157 }
1158
1159 /** Insert uint16 into second halfword of a __upackhw
1160 */
1161 asm volatile void Ifx__setuhw2(__upackhw* a, uint16 b)
1162 {
1163 % reg a, b
1164 ! "%d2"
1165 ld.w %d2, [a]
1166 insert %d2, %d2, b, 16, 16
1167 st.w [a], %d2
1168 }
1169
1170 /** \} */
1171
1172 /** \defgroup IfxLld_Cpu_Intrinsics_Dcc_register Register Handling
1173 The next table provides an overview of the intrinsic functions that you can use to access control registers.
1174 * \ingroup IfxLld_Cpu_Intrinsics_Dcc
1175 * \{
1176 */
1177
1178 /** Return absolute value
1179 */
1180 extern sint32 __abs( sint32) __attribute__((intrinsic_pseudo(1, "abs") ));
1181
1182 #define Ifx__abs __abs
1183
1184 /** Return absolue difference of two integers
1185 */
1186 extern sint32 __absdif( sint32, sint32) __attribute__((intrinsic_pseudo(1, "absdif") ));
1187
1188 #define Ifx__absdif __absdif
1189
1190 /** Return absolute value with saturation
1191 */
1192 extern sint32 __abss( sint32) __attribute__((intrinsic_pseudo(1, "abss") ));
1193
1194 #define Ifx__abss __abss
1195
1196 /** Count leading ones in int
1197 */
1198 extern sint32 __clo( sint32) __attribute__((intrinsic_pseudo(1, "clo") ));
1199
1200 #define Ifx__clo __clo
1201
1202 /** Count number of redundant sign bits (all consecutive bits with the same value as bit 31
1203 */
1204 extern sint32 __cls( sint32) __attribute__((intrinsic_pseudo(1, "cls") ));
1205
1206 #define Ifx__cls __cls
1207
1208 /** Count leading zeros in int
1209 */
1210 extern sint32 __clz( sint32) __attribute__((intrinsic_pseudo(1, "clz") ));
1211
1212 #define Ifx__clz __clz
1213
1214 /** Return absolute double precision floating-point value
1215 */
1216 asm double Ifx__fabs(double d)
1217 {
1218 % reg d
1219 ! "%d2"
1220 insert %d2, d, 0, 31, 1
1221 }
1222
1223 /** Return absolute floating-point value
1224 */
1225 asm float Ifx__fabsf(float f)
1226 {
1227 % reg f
1228 ! "%d2"
1229 insert %d2, f, 0, 31, 1
1230 }
1231
1232 /** Move contents of the addressed core SFR into a data register
1233 */
1234 extern sint32 __mfcr( const uint32) __attribute__((intrinsic_function(0x101, 0, "mfcr") ));
1235
1236 #define Ifx__mfcr __mfcr
1237
1238 /** Move contents of a data register (second sint32) to the addressed core SFR (first sint32)
1239 */
1240 extern void __mtcr( const uint32, sint32) __attribute__((intrinsic_function(0x102, 0, "mtcr") ));
1241
1242 #define Ifx__mtcr __mtcr
1243
1244 /** Return parity
1245 */
1246 asm volatile sint32 Ifx__parity(sint32 a)
1247 {
1248 % reg a
1249 ! "%d2"
1250 parity %d2, a
1251 }
1252
1253 /** Return saturated byte
1254 */
1255 asm sint8 Ifx__satb(sint32 a)
1256 {
1257 % reg a
1258 ! "%d2"
1259 sat.b %d2, a
1260 }
1261
1262 /** Return saturated unsigned byte
1263 */
1264 asm volatile uint8 Ifx__satbu(sint32 a)
1265 {
1266 % reg a
1267 ! "%d2"
1268 sat.bu %d2, a
1269 }
1270
1271 /** Return saturated halfword
1272 */
1273 asm short Ifx__sath(sint32 a)
1274 {
1275 % reg a
1276 ! "%d2"
1277 sat.h %d2, a
1278 }
1279
1280 /** Return saturated unsignedhalfword
1281 */
1282 asm volatile uint16 Ifx__sathu(sint32 a)
1283 {
1284 % reg a
1285 ! "%d2"
1286 sat.hu %d2, a
1287 }
1288
1289 /** \} */
1290
1291 /** \defgroup IfxLld_Cpu_Intrinsics_Dcc_saturation Saturation Arithmetic Support
1292 These intrinsics support saturation arithmetic
1293 * \ingroup IfxLld_Cpu_Intrinsics_Dcc
1294 * \{
1295 */
1296 /** add signed with saturation
1297 */
1298 extern sint32 __adds( sint32, sint32) __attribute__((intrinsic_pseudo(1, "adds") ));
1299
1300 #define Ifx__adds __adds
1301
1302 /** add unsigned with saturation
1303 */
1304 asm volatile uint32 Ifx__addsu(uint32 a, uint32 b)
1305 {
1306 % reg a, b
1307 ! "%d2"
1308 adds.u %d2, a, b
1309 }
1310
1311 /** substract signed with saturation
1312 */
1313 asm volatile sint32 Ifx__subs(sint32 a, sint32 b)
1314 {
1315 % reg a, b
1316 ! "%d2"
1317 subs %d2, a, b
1318 }
1319
1320 /** substract unsigned with saturation
1321 */
1322 asm volatile uint32 Ifx__subsu(uint32 a, uint32 b)
1323 {
1324 % reg a, b
1325 ! "%d2"
1326 subs.u %d2, a, b
1327 }
1328
1329 /** \} */
1330
1331 /** \defgroup IfxLld_Cpu_Intrinsics_Dcc_single_assembly Insert Single Assembly Instruction
1332 The next table provides an overview of the intrinsic functions that you can use to insert a single assembly
1333 instruction.You can also use inline assembly but these intrinsics provide a shorthand for frequently used
1334 assembly instructions.
1335 * \ingroup IfxLld_Cpu_Intrinsics_Dcc
1336 * \{
1337 */
1338
1339 /** Insert DEBUG instruction
1340 */
1341 extern void __debug( void) __attribute__((intrinsic_function(0x103, 0, "debug") ));
1342
1343 #define Ifx__debug __debug
1344
1345 /** Insert DSYNC instruction
1346 */
1347 extern void __dsync( void) __attribute__((intrinsic_function(0x103, 0, "dsync") ));
1348
1349 #define Ifx__dsync __dsync
1350
1351 /** Insert ISYNC instruction
1352 */
1353 extern void __isync( void) __attribute__((intrinsic_function(0x103, 0, "isync") ));
1354
1355 #define Ifx__isync __isync
1356
1357 /** Insert LDMST instruction. Note that all operands must be word-aligned.
1358 */
1359 #ifdef INTRINSIC_WORKAROUND
1360 #define __ldmst __ldmst_c
1361 #else
1362 asm volatile void Ifx__ldmst(volatile void *address, uint32 mask, uint32 value)
1363 {
1364 %reg address, mask, value;
1365 !"%d2", "%d3"
1366 mov %d3, mask
1367 mov %d2, value
1368 ldmst [address],%e2
1369 }
1370
1371 #endif
1372
1373 extern void __scheduling_barrier( void) __attribute__((intrinsic_function(9, 4, "$$sb") ));
1374 #define Ifx__mem_barrier __scheduling_barrier
1375
1376 /** Insert NOP instruction
1377 */
1378 extern void __nop( void) __attribute__((intrinsic_function(0x103, 0, "nop") ));
1379
1380 #define Ifx__nop __nop
1381
1382 #define Ifx__NOP __nops
1383
1384 /** Insert a loop over n NOP instruction
1385 */
1386 asm volatile void Ifx__nops(uint32 cnt)
1387 {
1388 % reg cnt;lab L0;
1389 ! "%a2"
1390 mov %a2,cnt
1391 add.a %a2, -1
1392 L0:
1393 nop
1394 loop %a2, L0
1395 }
1396
1397 /** Insert a loop over n times 1000 NOP instruction
1398 */
1399 asm volatile void Ifx__nops1000(uint32 x)
1400 {
1401 % reg x;
1402 lab L0, L1
1403 ! "%a2", "%a3"
1404 mov.a %a2, x
1405 L1:
1406 lea %a3, 999
1407 L0:
1408 nop
1409 nop
1410 loop %a3, L0
1411 loop %a2, L1
1412 }
1413
1414 /** Insert RSLCX instruction
1415 */
1416 extern void __rslcx( void) __attribute__((intrinsic_function(0x103, 0, "rslcx") ));
1417
1418 #define Ifx__rslcx
1419
1420 /** Insert SVLCX instruction
1421 */
1422 extern void __svlcx( void) __attribute__((intrinsic_function(0x103, 0, "svlcx") ));
1423
1424 #define Ifx__svlcx
1425
1426 /** Insert SWAP instruction. Note that all operands must be word-aligned.
1427 */
1428 #ifdef INTRINSIC_WORKAROUND
1429 extern uint32 __swap(void* place, uint32 value);
1430 #else
1431 asm volatile uint32 Ifx__swap(void* place, uint32 value)
1432 {
1433 % reg place, value
1434 ! "%d2"
1435 mov %d2, value
1436 swap.w [place], %d2
1437 }
1438 #endif
1439
1440 // FIXME
1441 asm volatile unsigned int Ifx__cmpAndSwap(unsigned int *address, unsigned long value, unsigned long CmpVal)
1442 {
1443 %reg value, address, CmpVal
1444 ! "%d2", "%d3"
1445 mov %d2,value
1446 mov %d3,CmpVal
1447 cmpswap.w [address], %e2
1448 }
1449 /** \} */
1450
1451 /** Insert n NOP instruction
1452 */
1453 //#info "NOP: Feature not yet implemented."
1454
1455 #define Ifx__setareg(areg,val) ___setareg(areg,val)
1456 /* we need to use a15 for the address register and not direct that the compiler this will not remove */
1457 #define ___setareg(areg,val) \
1458 { __asm ("#$$bp"); \
1459 __asm (" movh.a\t %a15,"#val"@ha\n"); \
1460 __asm (" lea\t %a15,[%a15]"#val"@l\n"); \
1461 __asm (" mov.aa %"#areg", %a15\n"); \
1462 __asm ("#$$ep"); }
1463
1464 /* FIXME check that the compiler take in account that d0 is used by the inline function */
1465 asm volatile void Ifx__stopPerfCounters(void)
1466 {
1467 ! "%d0"
1468 mov %d0,0
1469 mtcr 0xFC00,%d0
1470 isync
1471 }
1472
1473 /** \brief Convert a fixpoint value to float32
1474 *
1475 * This function converts a value from a fixpoint format to a float32 format.
1476 *
1477 *
1478 * \param value value to be converted.
1479 * \param shift position of the fix point. Range = [-256, 255] => (Qx.y format where x = shift+1).
1480 *
1481 * \return Returns the converted value in the float32 format.
1482 *
1483 */
1484 asm float Ifx__fixpoint_to_float32(fract value, sint32 shift)
1485 {
1486 % reg value, shift
1487 ! "%d2"
1488 q31tof %d2, value, shift
1489 }
1490
1491 asm volatile void* Ifx__getA11(void)
1492 {
1493 ! "%a11", "%a2"
1494 mov.aa %a2, %a11
1495 }
1496
1497 asm void Ifx__setStackPointer(void *stackAddr)
1498 {
1499 % reg stackAddr
1500 ! "%a10"
1501 mov.aa %a10, stackAddr
1502 }
1503
1504 asm volatile unsigned int Ifx__crc32(uint32 b,uint32 a)
1505 {
1506 % reg b, a
1507 ! "%d2"
1508 CRC32B.W %d2, b, a
1509 }
1510
1511 IFX_INLINE unsigned int IfxCpu_calculateCrc32(uint32 *startaddress, uint8 length)
1512 {
1513 uint32 returnvalue = 0; /* set seed value to 0 */
1514 for (;length > 0; length--)
1515 {
1516 /* calculate the CRC over all data */
1517 returnvalue = Ifx__crc32(returnvalue,*startaddress);
1518 startaddress++;
1519 }
1520 return returnvalue;
1521 }
1522
1523 /** \brief Generate the Random value
1524 *
1525 * This function generates the random value by taking a valid seed and limits.
1526 *
1527 * \param a lower limit.
1528 * \param x valid seed value.
1529 * \param m upper limit.
1530 *
1531 * \return Returns the random value.
1532 *
1533 */
1534 asm volatile uint32 IfxCpu_getRandomVal(uint32 a, uint32 x, uint32 m)
1535 {
1536 % reg a,x,m; lab cmp_m, sub_m, done;
1537 ! "%d4","%d5","%d6","%d0","%d1","%d2"
1538 mul.u %e4,a,x /* d5 = Eh; d4 = El */
1539 mov %d0,%d4 /* e0 = El */
1540 mov %d1, 0
1541 madd.u %e4,%e0,%d5,5 /* e4 = El + 5 * d5 */
1542 cmp_m:
1543 jge.u %d4,m,sub_m
1544 jz %d5,done
1545 sub_m:
1546 subx %d4,%d4,m /* e4=e4-m */
1547 subc %d5,%d5,%d1 /* d5=d5-0 */
1548 loopu cmp_m
1549 done:
1550 mov %d2,%d4
1551 }
1552
1553 /* Macros for backward compatibility of the intrinsics*/
1554 /******************************************************************************/
1555 #ifndef IFX_CFG_DISABLE_DEFAULT_INTRINSICS
1556 #ifndef __non_return_call
1557 #define __non_return_call Ifx__non_return_call
1558 #endif
1559
1560 #ifndef __jump_and_link
1561 #define __jump_and_link Ifx__jump_and_link
1562 #endif
1563
1564 #ifndef __moveToDataParam0
1565 #define __moveToDataParam0 Ifx__moveToDataParam0
1566 #endif
1567
1568 #ifndef __moveToDataParamRet
1569 #define __moveToDataParamRet Ifx__moveToDataParamRet
1570 #endif
1571
1572 #ifndef __getDataParamRet
1573 #define __getDataParamRet Ifx__getDataParamRet
1574 #endif
1575
1576 #ifndef __moveToAddrParam0
1577 #define __moveToAddrParam0 Ifx__moveToAddrParam0
1578 #endif
1579
1580 #ifndef __jumpToFunction
1581 #define __jumpToFunction Ifx__jumpToFunction
1582 #endif
1583
1584 #ifndef __jumpToFunctionWithLink
1585 #define __jumpToFunctionWithLink Ifx__jumpToFunctionWithLink
1586 #endif
1587
1588 #ifndef __jumpBackToLink
1589 #define __jumpBackToLink Ifx__jumpBackToLink
1590 #endif
1591
1592 #ifndef __minX
1593 #define __minX Ifx__minX
1594 #endif
1595
1596 #ifndef __maxX
1597 #define __maxX Ifx__maxX
1598 #endif
1599
1600 #ifndef __saturateX
1601 #define __saturateX Ifx__saturateX
1602 #endif
1603
1604 #ifndef __checkrangeX
1605 #define __checkrangeX Ifx__checkrangeX
1606 #endif
1607
1608 #ifndef __saturate
1609 #define __saturate Ifx__saturate
1610 #endif
1611
1612 #ifndef __sqrf
1613 #define __sqrf Ifx__sqrf
1614 #endif
1615
1616 #ifndef __sqrtf
1617 #define __sqrtf Ifx__sqrtf
1618 #endif
1619
1620 #ifndef __checkrange
1621 #define __checkrange Ifx__checkrange
1622 #endif
1623
1624 #ifndef __roundf
1625 #define __roundf Ifx__roundf
1626 #endif
1627
1628 #ifndef __absf
1629 #define __absf Ifx__absf
1630 #endif
1631
1632 #ifndef __minf
1633 #define __minf Ifx__minf
1634 #endif
1635
1636 #ifndef __maxf
1637 #define __maxf Ifx__maxf
1638 #endif
1639
1640 #ifndef __saturatef
1641 #define __saturatef Ifx__saturatef
1642 #endif
1643
1644 #ifndef __checkrangef
1645 #define __checkrangef Ifx__checkrangef
1646 #endif
1647
1648 #ifndef __abs_stdreal
1649 #define __abs_stdreal Ifx__abs_stdreal
1650 #endif
1651
1652 #ifndef __min_stdreal
1653 #define __min_stdreal Ifx__min_stdreal
1654 #endif
1655
1656 #ifndef __max_stdreal
1657 #define __max_stdreal Ifx__max_stdreal
1658 #endif
1659
1660 #ifndef __saturate_stdreal
1661 #define __saturate_stdreal Ifx__saturate_stdreal
1662 #endif
1663
1664 #ifndef __neqf
1665 #define __neqf Ifx__neqf
1666 #endif
1667
1668 #ifndef __leqf
1669 #define __leqf Ifx__leqf
1670 #endif
1671
1672 #ifndef __geqf
1673 #define __geqf Ifx__geqf
1674 #endif
1675
1676 #ifndef __clssf
1677 #define __clssf Ifx__clssf
1678 #endif
1679
1680 #ifndef __float_to_fract
1681 #define __float_to_fract Ifx__float_to_fract
1682 #endif
1683
1684 #ifndef __fract_to_float
1685 #define __fract_to_float Ifx__fract_to_float
1686 #endif
1687
1688 #ifndef __getfract
1689 #define __getfract Ifx__getfract
1690 #endif
1691
1692 #ifndef __mac_r_sf
1693 #define __mac_r_sf Ifx__mac_r_sf
1694 #endif
1695
1696 #ifndef __mac_sf
1697 #define __mac_sf Ifx__mac_sf
1698 #endif
1699
1700 #ifndef __mulfractfract
1701 #define __mulfractfract Ifx__mulfractfract
1702 #endif
1703
1704 #ifndef __mulfractlong
1705 #define __mulfractlong Ifx__mulfractlong
1706 #endif
1707
1708 #ifndef __round16
1709 #define __round16 Ifx__round16
1710 #endif
1711
1712 #ifndef __fract_to_sfract
1713 #define __fract_to_sfract Ifx__fract_to_sfract
1714 #endif
1715
1716 #ifndef __round16
1717 #define __round16 Ifx__round16
1718 #endif
1719
1720 #ifndef __s16_to_sfract
1721 #define __s16_to_sfract Ifx__s16_to_sfract
1722 #endif
1723
1724 #ifndef __sfract_to_s16
1725 #define __sfract_to_s16 Ifx__sfract_to_s16
1726 #endif
1727
1728 #ifndef __sfract_to_u16
1729 #define __sfract_to_u16 Ifx__sfract_to_u16
1730 #endif
1731
1732 #ifndef __shaaccum
1733 #define __shaaccum Ifx__shaaccum
1734 #endif
1735
1736 #ifndef __shafracts
1737 #define __shafracts Ifx__shafracts
1738 #endif
1739
1740 #ifndef __shasfracts
1741 #define __shasfracts Ifx__shasfracts
1742 #endif
1743
1744 #ifndef __u16_to_sfract
1745 #define __u16_to_sfract Ifx__u16_to_sfract
1746 #endif
1747
1748 #ifndef __getbit
1749 #define __getbit Ifx__getbit
1750 #endif
1751
1752 #ifndef __imaskldmst
1753 #define __imaskldmst Ifx__imaskldmst
1754 #endif
1755
1756 #ifndef __putbit
1757 #define __putbit Ifx__putbit
1758 #endif
1759
1760 #ifndef __cacheawi_bo_post_inc
1761 #define __cacheawi_bo_post_inc Ifx__cacheawi_bo_post_inc
1762 #endif
1763
1764 #ifndef __cacheiwi
1765 #define __cacheiwi Ifx__cacheiwi
1766 #endif
1767
1768 #ifndef __mulsc
1769 #define __mulsc Ifx__mulsc
1770 #endif
1771
1772 #ifndef __rol
1773 #define __rol Ifx__rol
1774 #endif
1775
1776 #ifndef __ror
1777 #define __ror Ifx__ror
1778 #endif
1779
1780 #ifndef __absb
1781 #define __absb Ifx__absb
1782 #endif
1783
1784 #ifndef __absh
1785 #define __absh Ifx__absh
1786 #endif
1787
1788 #ifndef __abssh
1789 #define __abssh Ifx__abssh
1790 #endif
1791
1792 #ifndef __extractbyte1
1793 #define __extractbyte1 Ifx__extractbyte1
1794 #endif
1795
1796 #ifndef __extractbyte2
1797 #define __extractbyte2 Ifx__extractbyte2
1798 #endif
1799
1800 #ifndef __extractbyte3
1801 #define __extractbyte3 Ifx__extractbyte3
1802 #endif
1803
1804 #ifndef __extractbyte4
1805 #define __extractbyte4 Ifx__extractbyte4
1806 #endif
1807
1808 #ifndef __extracthw1
1809 #define __extracthw1 Ifx__extracthw1
1810 #endif
1811
1812 #ifndef __extracthw2
1813 #define __extracthw2 Ifx__extracthw2
1814 #endif
1815
1816 #ifndef __extractubyte1
1817 #define __extractubyte1 Ifx__extractubyte1
1818 #endif
1819
1820 #ifndef __extractubyte2
1821 #define __extractubyte2 Ifx__extractubyte2
1822 #endif
1823
1824 #ifndef __extractubyte3
1825 #define __extractubyte3 Ifx__extractubyte3
1826 #endif
1827
1828 #ifndef __extractubyte4
1829 #define __extractubyte4 Ifx__extractubyte4
1830 #endif
1831
1832 #ifndef __extractuhw1
1833 #define __extractuhw1 Ifx__extractuhw1
1834 #endif
1835
1836 #ifndef __extractuhw2
1837 #define __extractuhw2 Ifx__extractuhw2
1838 #endif
1839
1840 #ifndef __getbyte1
1841 #define __getbyte1 Ifx__getbyte1
1842 #endif
1843
1844 #ifndef __getbyte2
1845 #define __getbyte2 Ifx__getbyte2
1846 #endif
1847
1848 #ifndef __getbyte3
1849 #define __getbyte3 Ifx__getbyte3
1850 #endif
1851
1852 #ifndef __getbyte4
1853 #define __getbyte4 Ifx__getbyte4
1854 #endif
1855
1856 #ifndef __gethw1
1857 #define __gethw1 Ifx__gethw1
1858 #endif
1859
1860 #ifndef __gethw2
1861 #define __gethw2 Ifx__gethw2
1862 #endif
1863
1864 #ifndef __getubyte1
1865 #define __getubyte1 Ifx__getubyte1
1866 #endif
1867
1868 #ifndef __getubyte2
1869 #define __getubyte2 Ifx__getubyte2
1870 #endif
1871
1872 #ifndef __getubyte3
1873 #define __getubyte3 Ifx__getubyte3
1874 #endif
1875
1876 #ifndef __getubyte4
1877 #define __getubyte4 Ifx__getubyte4
1878 #endif
1879
1880 #ifndef __getuhw1
1881 #define __getuhw1 Ifx__getuhw1
1882 #endif
1883
1884 #ifndef __getuhw2
1885 #define __getuhw2 Ifx__getuhw2
1886 #endif
1887
1888 #ifndef __initpackb
1889 #define __initpackb Ifx__initpackb
1890 #endif
1891
1892 #ifndef __initpackbl
1893 #define __initpackbl Ifx__initpackbl
1894 #endif
1895
1896 #ifndef __initpackhw
1897 #define __initpackhw Ifx__initpackhw
1898 #endif
1899
1900 #ifndef __initpackhwl
1901 #define __initpackhwl Ifx__initpackhwl
1902 #endif
1903
1904 #ifndef __initupackb
1905 #define __initupackb Ifx__initupackb
1906 #endif
1907
1908 #ifndef __initupackhw
1909 #define __initupackhw Ifx__initupackhw
1910 #endif
1911
1912 #ifndef __insertbyte1
1913 #define __insertbyte1 Ifx__insertbyte1
1914 #endif
1915
1916 #ifndef __insertbyte2
1917 #define __insertbyte2 Ifx__insertbyte2
1918 #endif
1919
1920 #ifndef __insertbyte3
1921 #define __insertbyte3 Ifx__insertbyte3
1922 #endif
1923
1924 #ifndef __insertbyte4
1925 #define __insertbyte4 Ifx__insertbyte4
1926 #endif
1927
1928 #ifndef __inserthw1
1929 #define __inserthw1 Ifx__inserthw1
1930 #endif
1931
1932 #ifndef __inserthw2
1933 #define __inserthw2 Ifx__inserthw2
1934 #endif
1935
1936 #ifndef __insertubyte1
1937 #define __insertubyte1 Ifx__insertubyte1
1938 #endif
1939
1940 #ifndef __insertubyte2
1941 #define __insertubyte2 Ifx__insertubyte2
1942 #endif
1943
1944 #ifndef __insertubyte3
1945 #define __insertubyte3 Ifx__insertubyte3
1946 #endif
1947
1948 #ifndef __insertubyte4
1949 #define __insertubyte4 Ifx__insertubyte4
1950 #endif
1951
1952 #ifndef __insertuhw1
1953 #define __insertuhw1 Ifx__insertuhw1
1954 #endif
1955
1956 #ifndef __insertuhw2
1957 #define __insertuhw2 Ifx__insertuhw2
1958 #endif
1959
1960 #ifndef __minb
1961 #define __minb Ifx__minb
1962 #endif
1963
1964 #ifndef __minbu
1965 #define __minbu Ifx__minbu
1966 #endif
1967
1968 #ifndef __minh
1969 #define __minh Ifx__minh
1970 #endif
1971
1972 #ifndef __minhu
1973 #define __minhu Ifx__minhu
1974 #endif
1975
1976 #ifndef __setbyte1
1977 #define __setbyte1 Ifx__setbyte1
1978 #endif
1979
1980 #ifndef __setbyte2
1981 #define __setbyte2 Ifx__setbyte2
1982 #endif
1983
1984 #ifndef __setbyte3
1985 #define __setbyte3 Ifx__setbyte3
1986 #endif
1987
1988 #ifndef __setbyte4
1989 #define __setbyte4 Ifx__setbyte4
1990 #endif
1991
1992 #ifndef __sethw1
1993 #define __sethw1 Ifx__sethw1
1994 #endif
1995
1996 #ifndef __sethw2
1997 #define __sethw2 Ifx__sethw2
1998 #endif
1999
2000 #ifndef __setubyte1
2001 #define __setubyte1 Ifx__setubyte1
2002 #endif
2003
2004 #ifndef __setubyte2
2005 #define __setubyte2 Ifx__setubyte2
2006 #endif
2007
2008 #ifndef __setubyte3
2009 #define __setubyte3 Ifx__setubyte3
2010 #endif
2011
2012 #ifndef __setubyte4
2013 #define __setubyte4 Ifx__setubyte4
2014 #endif
2015
2016 #ifndef __setuhw1
2017 #define __setuhw1 Ifx__setuhw1
2018 #endif
2019
2020 #ifndef __setuhw2
2021 #define __setuhw2 Ifx__setuhw2
2022 #endif
2023
2024 #ifndef __fabs
2025 #define __fabs Ifx__fabs
2026 #endif
2027
2028 #ifndef __fabsf
2029 #define __fabsf Ifx__fabsf
2030 #endif
2031
2032 #ifndef __parity
2033 #define __parity Ifx__parity
2034 #endif
2035
2036 #ifndef __satb
2037 #define __satb Ifx__satb
2038 #endif
2039
2040 #ifndef __satbu
2041 #define __satbu Ifx__satbu
2042 #endif
2043
2044 #ifndef __sath
2045 #define __sath Ifx__sath
2046 #endif
2047
2048 #ifndef __sathu
2049 #define __sathu Ifx__sathu
2050 #endif
2051
2052 #ifndef __addsu
2053 #define __addsu Ifx__addsu
2054 #endif
2055
2056 #ifndef __subs
2057 #define __subs Ifx__subs
2058 #endif
2059
2060 #ifndef __subsu
2061 #define __subsu Ifx__subsu
2062 #endif
2063
2064 #ifndef __ldmst
2065 #define __ldmst Ifx__ldmst
2066 #endif
2067
2068 #ifndef __mem_barrier
2069 #define __mem_barrier Ifx__mem_barrier
2070 #endif
2071
2072 #if ((!defined(NOP)) && (!defined(IFX_CFG_DISABLE_DEFAULT_INTRINSICS)))
2073 #define NOP Ifx__NOP
2074 #endif
2075
2076 #ifndef __nops
2077 #define __nops Ifx__nops
2078 #endif
2079
2080 #ifndef __nops1000
2081 #define __nops1000 Ifx__nops1000
2082 #endif
2083
2084 #ifndef __swap
2085 #define __swap Ifx__swap
2086 #endif
2087
2088 #ifndef __cmpAndSwap
2089 #define __cmpAndSwap Ifx__cmpAndSwap
2090 #endif
2091
2092 #ifndef __setareg
2093 #define __setareg Ifx__setareg
2094 #endif
2095
2096 #ifndef __stopPerfCounters
2097 #define __stopPerfCounters Ifx__stopPerfCounters
2098 #endif
2099
2100 #ifndef __fixpoint_to_float32
2101 #define __fixpoint_to_float32 Ifx__fixpoint_to_float32
2102 #endif
2103
2104 #ifndef __getA11
2105 #define __getA11 Ifx__getA11
2106 #endif
2107
2108 #ifndef __setStackPointer
2109 #define __setStackPointer Ifx__setStackPointer
2110 #endif
2111
2112 #if ((!defined(__crc32)) && (!defined(IFX_CFG_DISABLE_DEFAULT_INTRINSICS)))
2113 #define __crc32 Ifx__crc32
2114 #endif
2115
2116 #endif
2117 /******************************************************************************/
2118 /* *INDENT-ON* */
2119 /******************************************************************************/
2120 #endif /* IFXCPU_INTRINSICSDCC_H */
Ifx__absb
asm __packb Ifx__absb(__packb a)
Definition: IfxCpu_IntrinsicsDcc.h:579
__shasfracts
#define __shasfracts
Definition: IfxCpu_IntrinsicsDcc.h:1741
Ifx__minh
asm __packhw Ifx__minh(__packhw a, __packhw b)
Definition: IfxCpu_IntrinsicsDcc.h:1022
Ifx__mulfractlong
asm long Ifx__mulfractlong(fract a, long b)
Definition: IfxCpu_IntrinsicsDcc.h:279
Ifx__moveToDataParam0
asm volatile void Ifx__moveToDataParam0(unsigned int var)
Definition: IfxCpu_IntrinsicsDcc.h:74
IfxCpu_calculateCrc32
IFX_INLINE unsigned int IfxCpu_calculateCrc32(uint32 *startaddress, uint8 length)
Definition: IfxCpu_IntrinsicsDcc.h:1511
__mtcr
void __mtcr(const uint32, sint32) __attribute__((intrinsic_function(0x102
__clz
sint32 __clz(sint32) __attribute__((intrinsic_pseudo(1
Ifx__extracthw2
asm short Ifx__extracthw2(__packhw a)
Extract second short from a __packhw.
Definition: IfxCpu_IntrinsicsDcc.h:651
__disable
void __disable(void) __attribute__((intrinsic_function(0x103
Ifx__nops
asm volatile void Ifx__nops(uint32 cnt)
Definition: IfxCpu_IntrinsicsDcc.h:1386
cls
sint32 cls
Definition: IfxCpu_IntrinsicsDcc.h:1204
Ifx__insertbyte1
asm __packb Ifx__insertbyte1(__packb a, sint8 b)
Insert sint8 into first byte of a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:892
Ifx__shaaccum
asm laccum Ifx__shaaccum(laccum a, sint32 b)
Definition: IfxCpu_IntrinsicsDcc.h:338
abs
sint32 abs
Definition: IfxCpu_IntrinsicsDcc.h:1180
Ifx__non_return_call
asm volatile void Ifx__non_return_call(void(*fun)(void))
Definition: IfxCpu_IntrinsicsDcc.h:58
Ifx__u16_to_sfract
asm sfract Ifx__u16_to_sfract(uint16 a)
Definition: IfxCpu_IntrinsicsDcc.h:381
Ifx__cacheawi_bo_post_inc
asm volatile uint8 * Ifx__cacheawi_bo_post_inc(uint8 *p)
Definition: IfxCpu_IntrinsicsDcc.h:509
Ifx__sfract_to_u16
asm volatile uint16 Ifx__sfract_to_u16(sfract a)
Definition: IfxCpu_IntrinsicsDcc.h:328
Ifx__imaskldmst
asm volatile void Ifx__imaskldmst(void *a, sint32 b, sint32 p, const sint32 w)
Definition: IfxCpu_IntrinsicsDcc.h:436
__adds
sint32 __adds(sint32, sint32) __attribute__((intrinsic_pseudo(1
Ifx__abssh
asm __packhw Ifx__abssh(__packhw a)
Definition: IfxCpu_IntrinsicsDcc.h:597
__mins
sint32 __mins(sint32, sint32) __attribute__((intrinsic_function(0x10b
__packb
long __packb
Definition: Ifx_TypesDcc.h:47
__float_to_sfract
IFX_INLINE sfract __float_to_sfract(float a)
Definition: IfxCpu_IntrinsicsDcc.h:301
Ifx__extractbyte2
asm sint8 Ifx__extractbyte2(__packb a)
Extract second byte from a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:615
sfract
short sfract
Definition: Ifx_TypesDcc.h:45
__mfcr
sint32 __mfcr(const uint32) __attribute__((intrinsic_function(0x101
Ifx__minhu
asm __upackhw Ifx__minhu(__upackhw a, __upackhw b)
Definition: IfxCpu_IntrinsicsDcc.h:1031
Ifx__cacheiwi
asm volatile void Ifx__cacheiwi(uint8 *p)
Definition: IfxCpu_IntrinsicsDcc.h:519
Ifx__getubyte3
asm volatile uint8 Ifx__getubyte3(__upackb *a)
Definition: IfxCpu_IntrinsicsDcc.h:794
Ifx__getbyte2
asm sint8 Ifx__getbyte2(__packb *a)
Definition: IfxCpu_IntrinsicsDcc.h:724
__mac_r_sf
#define __mac_r_sf
Definition: IfxCpu_IntrinsicsDcc.h:1693
Ifx__insertbyte2
asm __packb Ifx__insertbyte2(__packb a, sint8 b)
Insert sint8 into second byte of a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:901
Ifx__setubyte4
asm volatile void Ifx__setubyte4(__upackb *a, uint8 b)
Definition: IfxCpu_IntrinsicsDcc.h:1139
IfxCpu_getRandomVal
asm volatile uint32 IfxCpu_getRandomVal(uint32 a, uint32 x, uint32 m)
Generate the Random value.
Definition: IfxCpu_IntrinsicsDcc.h:1534
Ifx__mulfractfract
asm long Ifx__mulfractfract(fract a, fract b)
Definition: IfxCpu_IntrinsicsDcc.h:270
__clo
sint32 __clo(sint32) __attribute__((intrinsic_pseudo(1
__nop
void __nop(void) __attribute__((intrinsic_function(0x103
Ifx__fract_to_sfract
#define Ifx__fract_to_sfract
Definition: IfxCpu_IntrinsicsDcc.h:297
Ifx__setubyte3
asm volatile void Ifx__setubyte3(__upackb *a, uint8 b)
Definition: IfxCpu_IntrinsicsDcc.h:1128
uint32
unsigned long uint32
Definition: Platform_Types.h:116
Ifx__initpackb
asm __packb Ifx__initpackb(sint32 a, sint32 b, sint32 c, sint32 d)
Definition: IfxCpu_IntrinsicsDcc.h:834
Ifx__setubyte1
asm volatile void Ifx__setubyte1(__upackb *a, uint8 b)
Definition: IfxCpu_IntrinsicsDcc.h:1106
Ifx__setbyte3
asm volatile void Ifx__setbyte3(__packb *a, sint8 b)
Definition: IfxCpu_IntrinsicsDcc.h:1062
Ifx__clssf
asm short Ifx__clssf(sfract a)
Definition: IfxCpu_IntrinsicsDcc.h:205
__upackhw
unsigned long __upackhw
Definition: Ifx_TypesDcc.h:50
__minu
uint32 __minu(uint32, uint32) __attribute__((intrinsic_pseudo(3
Ifx__setubyte2
asm volatile void Ifx__setubyte2(__upackb *a, uint8 b)
Definition: IfxCpu_IntrinsicsDcc.h:1117
Ifx__getA11
asm volatile void * Ifx__getA11(void)
Definition: IfxCpu_IntrinsicsDcc.h:1491
__ins
uint32 __ins(uint32, const uint32, uint32, const uint32) __attribute__((intrinsic_function(0x121
__isync
void __isync(void) __attribute__((intrinsic_function(0x103
Ifx__extractuhw2
asm volatile uint16 Ifx__extractuhw2(__upackhw a)
Definition: IfxCpu_IntrinsicsDcc.h:705
Ifx__extractbyte4
asm sint8 Ifx__extractbyte4(__packb a)
Extract fourth byte from a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:633
mtcr
void mtcr
Definition: IfxCpu_IntrinsicsDcc.h:1240
Ifx__s16_to_sfract
asm sfract Ifx__s16_to_sfract(short a)
Definition: IfxCpu_IntrinsicsDcc.h:309
Ifx__shafracts
asm fract Ifx__shafracts(fract a, sint32 b)
Definition: IfxCpu_IntrinsicsDcc.h:358
Ifx__fract_to_float
asm float Ifx__fract_to_float(fract a)
Convert fract to float.
Definition: IfxCpu_IntrinsicsDcc.h:225
Ifx__initpackhwl
asm __packhw Ifx__initpackhwl(long a)
Definition: IfxCpu_IntrinsicsDcc.h:863
Ifx__extractbyte3
asm sint8 Ifx__extractbyte3(__packb a)
Extract third byte from a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:624
Ifx__extractubyte3
asm volatile uint8 Ifx__extractubyte3(__upackb a)
Definition: IfxCpu_IntrinsicsDcc.h:678
Ifx__getfract
asm fract Ifx__getfract(laccum a)
Definition: IfxCpu_IntrinsicsDcc.h:235
Ifx__sethw1
asm volatile void Ifx__sethw1(__packhw *a, short b)
Definition: IfxCpu_IntrinsicsDcc.h:1084
Ifx__initupackb
asm __upackb Ifx__initupackb(uint32 a, uint32 b, uint32 c, uint32 d)
Definition: IfxCpu_IntrinsicsDcc.h:872
circ_t
unsigned long long circ_t
Definition: Ifx_TypesDcc.h:52
Ifx__sethw2
asm volatile void Ifx__sethw2(__packhw *a, short b)
Definition: IfxCpu_IntrinsicsDcc.h:1095
Ifx__insertubyte2
asm __upackb Ifx__insertubyte2(__upackb a, uint8 b)
Insert uint8 into second unsigned byte of a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:955
Ifx__swap
asm volatile uint32 Ifx__swap(void *place, uint32 value)
Definition: IfxCpu_IntrinsicsDcc.h:1431
Ifx__setStackPointer
asm void Ifx__setStackPointer(void *stackAddr)
Definition: IfxCpu_IntrinsicsDcc.h:1497
Ifx__getuhw2
asm volatile uint16 Ifx__getuhw2(__upackhw *a)
Definition: IfxCpu_IntrinsicsDcc.h:824
Ifx__satb
asm sint8 Ifx__satb(sint32 a)
Definition: IfxCpu_IntrinsicsDcc.h:1255
__maxs
uint32 __maxs(uint32, uint32) __attribute__((intrinsic_function(0x10b
Ifx__mulsc
asm volatile sint32 Ifx__mulsc(sint32 a, sint32 b, sint32 offset)
Definition: IfxCpu_IntrinsicsDcc.h:542
abss
sint32 abss
Definition: IfxCpu_IntrinsicsDcc.h:1192
__packhw
long __packhw
Definition: Ifx_TypesDcc.h:49
Ifx__gethw1
asm short Ifx__gethw1(__packhw *a)
Definition: IfxCpu_IntrinsicsDcc.h:754
Ifx__round16
asm sfract Ifx__round16(fract a)
Definition: IfxCpu_IntrinsicsDcc.h:288
fract
long fract
Definition: Ifx_TypesDcc.h:44
__max
sint32 __max(sint32, sint32) __attribute__((intrinsic_pseudo(3
Ifx__insertubyte4
asm __upackb Ifx__insertubyte4(__upackb a, uint8 b)
Insert uint8 into fourth unsigned byte of a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:973
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
laccum
long long laccum
Definition: Ifx_TypesDcc.h:46
Ifx__getubyte4
asm volatile uint8 Ifx__getubyte4(__upackb *a)
Definition: IfxCpu_IntrinsicsDcc.h:804
__cls
sint32 __cls(sint32) __attribute__((intrinsic_pseudo(1
__swap
#define __swap
Definition: IfxCpu_IntrinsicsDcc.h:2085
Ifx__rol
asm volatile uint32 Ifx__rol(uint32 operand, uint32 count)
Definition: IfxCpu_IntrinsicsDcc.h:552
Ifx__insertbyte3
asm __packb Ifx__insertbyte3(__packb a, sint8 b)
Insert sint8 into third byte of a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:910
Ifx__extractubyte4
asm volatile uint8 Ifx__extractubyte4(__upackb a)
Definition: IfxCpu_IntrinsicsDcc.h:687
Ifx__setbyte2
asm volatile void Ifx__setbyte2(__packb *a, sint8 b)
Definition: IfxCpu_IntrinsicsDcc.h:1051
adds
sint32 adds
Definition: IfxCpu_IntrinsicsDcc.h:1298
Ifx__setuhw2
asm volatile void Ifx__setuhw2(__upackhw *a, uint16 b)
Definition: IfxCpu_IntrinsicsDcc.h:1161
__shafracts
#define __shafracts
Definition: IfxCpu_IntrinsicsDcc.h:1737
__minb
#define __minb
Definition: IfxCpu_IntrinsicsDcc.h:1961
__imaskldmst
#define __imaskldmst
Definition: IfxCpu_IntrinsicsDcc.h:1753
Ifx__minbu
asm __upackb Ifx__minbu(__upackb a, __upackb b)
Definition: IfxCpu_IntrinsicsDcc.h:1013
Ifx__fixpoint_to_float32
asm float Ifx__fixpoint_to_float32(fract value, sint32 shift)
Convert a fixpoint value to float32.
Definition: IfxCpu_IntrinsicsDcc.h:1484
Ifx__shasfracts
asm sfract Ifx__shasfracts(sfract a, sint32 b)
Definition: IfxCpu_IntrinsicsDcc.h:371
Ifx__subs
asm volatile sint32 Ifx__subs(sint32 a, sint32 b)
Definition: IfxCpu_IntrinsicsDcc.h:1313
Ifx__stopPerfCounters
asm volatile void Ifx__stopPerfCounters(void)
Definition: IfxCpu_IntrinsicsDcc.h:1465
__syscall
void __syscall(const uint32) __attribute__((intrinsic_function(0x100
Ifx__inserthw1
asm __packhw Ifx__inserthw1(__packhw a, short b)
Definition: IfxCpu_IntrinsicsDcc.h:928
Ifx__minb
asm __packb Ifx__minb(__packb a, __packb b)
Definition: IfxCpu_IntrinsicsDcc.h:1003
Ifx__satbu
asm volatile uint8 Ifx__satbu(sint32 a)
Definition: IfxCpu_IntrinsicsDcc.h:1264
__upackb
unsigned long __upackb
Definition: Ifx_TypesDcc.h:48
Ifx__moveToDataParamRet
asm volatile void Ifx__moveToDataParamRet(unsigned int var)
Definition: IfxCpu_IntrinsicsDcc.h:81
Ifx__absh
asm __packhw Ifx__absh(__packhw a)
Definition: IfxCpu_IntrinsicsDcc.h:588
__abss
sint32 __abss(sint32) __attribute__((intrinsic_pseudo(1
Ifx__fabsf
asm float Ifx__fabsf(float f)
Definition: IfxCpu_IntrinsicsDcc.h:1225
Ifx__gethw2
asm short Ifx__gethw2(__packhw *a)
Definition: IfxCpu_IntrinsicsDcc.h:764
__dsync
void __dsync(void) __attribute__((intrinsic_function(0x103
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
__debug
void __debug(void) __attribute__((intrinsic_function(0x103
Ifx__getubyte1
asm volatile uint8 Ifx__getubyte1(__upackb *a)
Definition: IfxCpu_IntrinsicsDcc.h:774
__insert
uint32 __insert(uint32, uint32, uint32, const uint32) __attribute__((intrinsic_function(0x109
Ifx__ldmst
asm volatile void Ifx__ldmst(volatile void *address, uint32 mask, uint32 value)
Definition: IfxCpu_IntrinsicsDcc.h:1362
Ifx__extractuhw1
asm volatile uint16 Ifx__extractuhw1(__upackhw a)
Definition: IfxCpu_IntrinsicsDcc.h:696
__extru
uint32 __extru(uint32, uint32, const uint32) __attribute__((intrinsic_function(0x108
__insn
uint32 __insn(uint32, const uint32, uint32, const uint32) __attribute__((intrinsic_function(0x121
__extr
sint32 __extr(sint32, uint32, const uint32) __attribute__((intrinsic_function(0x108
__disable_and_save
#define __disable_and_save
Definition: IfxCpu_IntrinsicsGnuc.h:1880
Ifx__parity
asm volatile sint32 Ifx__parity(sint32 a)
Definition: IfxCpu_IntrinsicsDcc.h:1246
Ifx__getbyte3
asm sint8 Ifx__getbyte3(__packb *a)
Definition: IfxCpu_IntrinsicsDcc.h:734
Ifx__inserthw2
asm __packhw Ifx__inserthw2(__packhw a, short b)
Definition: IfxCpu_IntrinsicsDcc.h:937
Ifx__getbyte4
asm sint8 Ifx__getbyte4(__packb *a)
Definition: IfxCpu_IntrinsicsDcc.h:744
__scheduling_barrier
void __scheduling_barrier(void) __attribute__((intrinsic_function(9
Ifx__nops1000
asm volatile void Ifx__nops1000(uint32 x)
Definition: IfxCpu_IntrinsicsDcc.h:1399
Ifx__extractubyte1
asm volatile uint8 Ifx__extractubyte1(__upackb a)
Definition: IfxCpu_IntrinsicsDcc.h:660
uint16
unsigned short uint16
Definition: Platform_Types.h:112
__min
sint32 __min(sint32, sint32) __attribute__((intrinsic_pseudo(3
__enable
void __enable(void) __attribute__((intrinsic_function(0x103
__bisr
void __bisr(const uint32) __attribute__((intrinsic_function(0x100
Ifx__mac_sf
asm sfract Ifx__mac_sf(sfract a, sfract b, sfract c)
Definition: IfxCpu_IntrinsicsDcc.h:260
Ifx__getDataParamRet
asm volatile unsigned int Ifx__getDataParamRet(void)
Definition: IfxCpu_IntrinsicsDcc.h:88
Ifx__moveToAddrParam0
asm volatile void Ifx__moveToAddrParam0(const void *var)
Definition: IfxCpu_IntrinsicsDcc.h:94
__restore
void __restore(sint32) __attribute__((intrinsic_function(0x104
Ifx__addsu
asm volatile uint32 Ifx__addsu(uint32 a, uint32 b)
Definition: IfxCpu_IntrinsicsDcc.h:1304
Ifx__subsu
asm volatile uint32 Ifx__subsu(uint32 a, uint32 b)
Definition: IfxCpu_IntrinsicsDcc.h:1322
__abs
sint32 __abs(sint32) __attribute__((intrinsic_pseudo(1
Ifx__setbyte4
asm volatile void Ifx__setbyte4(__packb *a, sint8 b)
Definition: IfxCpu_IntrinsicsDcc.h:1073
__maxu
uint32 __maxu(uint32, uint32) __attribute__((intrinsic_pseudo(3
__svlcx
void __svlcx(void) __attribute__((intrinsic_function(0x103
sint32
long sint32
Definition: Platform_Types.h:134
Ifx__setbyte1
asm volatile void Ifx__setbyte1(__packb *a, sint8 b)
Definition: IfxCpu_IntrinsicsDcc.h:1040
Ifx__insertubyte1
asm __upackb Ifx__insertubyte1(__upackb a, uint8 b)
Insert uint8 into first unsigned byte of a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:946
Ifx__ror
asm volatile uint32 Ifx__ror(uint32 operand, uint32 count)
Definition: IfxCpu_IntrinsicsDcc.h:561
Ifx__cmpAndSwap
asm volatile unsigned int Ifx__cmpAndSwap(unsigned int *address, unsigned long value, unsigned long CmpVal)
Definition: IfxCpu_IntrinsicsDcc.h:1441
Ifx__jumpToFunction
IFX_INLINE void Ifx__jumpToFunction(const void *fun)
Definition: IfxCpu_IntrinsicsDcc.h:101
min
sint32 min
Definition: IfxCpu_IntrinsicsDcc.h:131
__rslcx
void __rslcx(void) __attribute__((intrinsic_function(0x103
Ifx__initpackhw
asm __packhw Ifx__initpackhw(short a, short b)
Initialize __packhw with two integers.
Definition: IfxCpu_IntrinsicsDcc.h:854
Ifx__insertuhw2
asm __upackhw Ifx__insertuhw2(__upackhw a, uint16 b)
Definition: IfxCpu_IntrinsicsDcc.h:991
Ifx__getubyte2
asm volatile uint8 Ifx__getubyte2(__upackb *a)
Definition: IfxCpu_IntrinsicsDcc.h:784
Ifx__extractubyte2
asm volatile uint8 Ifx__extractubyte2(__upackb a)
Definition: IfxCpu_IntrinsicsDcc.h:669
__absdif
sint32 __absdif(sint32, sint32) __attribute__((intrinsic_pseudo(1
Ifx__insertubyte3
asm __upackb Ifx__insertubyte3(__upackb a, uint8 b)
Insert uint8 into third unsigned byte of a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:964
Ifx__mac_r_sf
asm sfract Ifx__mac_r_sf(sfract a, sfract b, sfract c)
Definition: IfxCpu_IntrinsicsDcc.h:247
Ifx__extracthw1
asm short Ifx__extracthw1(__packhw a)
Extract first short from a __packhw.
Definition: IfxCpu_IntrinsicsDcc.h:642
Ifx__initpackbl
asm __packb Ifx__initpackbl(long a)
Definition: IfxCpu_IntrinsicsDcc.h:845
Ifx__fabs
asm double Ifx__fabs(double d)
Definition: IfxCpu_IntrinsicsDcc.h:1216
isync
void isync
Definition: IfxCpu_IntrinsicsDcc.h:1353
Ifx__sath
asm short Ifx__sath(sint32 a)
Definition: IfxCpu_IntrinsicsDcc.h:1273
Ifx__initupackhw
asm __upackhw Ifx__initupackhw(uint16 a, uint16 b)
Definition: IfxCpu_IntrinsicsDcc.h:883
Ifx__sathu
asm volatile uint16 Ifx__sathu(sint32 a)
Definition: IfxCpu_IntrinsicsDcc.h:1282
nop
void nop
Definition: IfxCpu_IntrinsicsDcc.h:1378
Ifx__jump_and_link
asm volatile void Ifx__jump_and_link(void(*fun)(void))
Definition: IfxCpu_IntrinsicsDcc.h:66
Ifx__jumpBackToLink
asm volatile void Ifx__jumpBackToLink(void)
Definition: IfxCpu_IntrinsicsDcc.h:111
Ifx__extractbyte1
asm sint8 Ifx__extractbyte1(__packb a)
Extract first byte from a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:606
uint8
unsigned char uint8
Definition: Platform_Types.h:108
__initcirc
asm circ_t __initcirc(void *buf, uint16 bufsize, uint16 byteindex)
Definition: IfxCpu_IntrinsicsDcc.h:528
Ifx__insertuhw1
asm __upackhw Ifx__insertuhw1(__upackhw a, uint16 b)
Definition: IfxCpu_IntrinsicsDcc.h:982
sint8
signed char sint8
Definition: Platform_Types.h:125
Ifx__jumpToFunctionWithLink
IFX_INLINE void Ifx__jumpToFunctionWithLink(const void *fun)
Definition: IfxCpu_IntrinsicsDcc.h:106
Ifx__insertbyte4
asm __packb Ifx__insertbyte4(__packb a, sint8 b)
Insert sint8 into fourth byte of a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:919
Ifx__getbyte1
asm sint8 Ifx__getbyte1(__packb *a)
Definition: IfxCpu_IntrinsicsDcc.h:714
Ifx__getuhw1
asm volatile uint16 Ifx__getuhw1(__upackhw *a)
Definition: IfxCpu_IntrinsicsDcc.h:814
__cacheawi
void __cacheawi(void *) __attribute__((intrinsic_function(0x110
__mac_sf
#define __mac_sf
Definition: IfxCpu_IntrinsicsDcc.h:1697
Ifx__float_to_fract
asm fract Ifx__float_to_fract(float a)
Definition: IfxCpu_IntrinsicsDcc.h:215
insert
uint32 insert
Definition: IfxCpu_IntrinsicsDcc.h:421
Ifx__setuhw1
asm volatile void Ifx__setuhw1(__upackhw *a, uint16 b)
Definition: IfxCpu_IntrinsicsDcc.h:1150
extr
sint32 extr
Definition: IfxCpu_IntrinsicsDcc.h:398
Ifx__crc32
asm volatile unsigned int Ifx__crc32(uint32 b, uint32 a)
Definition: IfxCpu_IntrinsicsDcc.h:1504
Ifx__sfract_to_s16
asm short Ifx__sfract_to_s16(sfract a)
Definition: IfxCpu_IntrinsicsDcc.h:319


iLLD_TC38A: IfxCpu_IntrinsicsGhs.h Source File

  • Cpu
  • Std
IfxCpu_IntrinsicsGhs.h
Go to the documentation of this file.
1 /**
2 * \file IfxCpu_IntrinsicsGhs.h
3 *
4 * \version iLLD_1_0_1_12_0
5 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
6 *
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 * \defgroup IfxLld_Cpu_Intrinsics_Ghs Intrinsics for GNU compiler
41 * \ingroup IfxLld_Cpu_Intrinsics
42 *
43 */
44
45 #ifndef IFXCPU_INTRINSICSGHS_H
46 #define IFXCPU_INTRINSICSGHS_H
47
48 /******************************************************************************/
49 #include "Ifx_Types.h"
50 #include <intrinsics.h>
51
52 /******************************************************************************/
53 /* *INDENT-OFF* */
54 #define STRINGIFY(x) #x
55
56 typedef void (*voidfunc)();
57
58 /** Function call without return
59 */
60 #define Ifx__non_return_call(fun) __asm__ volatile ("ji %0"::"a"(fun))
61
62 /** Jump and link
63 */
64 IFX_INLINE void Ifx__jump_and_link(void (*fun)(void))
65 {
66 __asm__ volatile ("jli %0"::"a"(fun));
67 }
68
69 IFX_INLINE void Ifx__moveToDataParam0(unsigned int var)
70 {
71 __asm__ volatile ("mov\t d4, %0"::"d"(var));
72 }
73
74 IFX_INLINE void Ifx__moveToDataParamRet(unsigned int var)
75 {
76 __asm__ volatile ("mov\t d2, %0"::"d"(var));
77 }
78
79 IFX_INLINE unsigned int Ifx__getDataParamRet(void)
80 {
81 unsigned int var;
82 __asm__ volatile (" mov\t %0, d2":"=d"(var));
83 return var;
84 }
85
86 IFX_INLINE void Ifx__moveToAddrParam0(const void *var)
87 {
88 __asm__ volatile ("mov.aa\t a4, %0"::"a"(var));
89 }
90
91 IFX_INLINE void Ifx__jumpToFunction(void (*fun)(void))
92 {
93 Ifx__non_return_call(fun);
94 }
95
96 IFX_INLINE void Ifx__jumpToFunctionWithLink(void (*fun)(void))
97 {
98 Ifx__jump_and_link(fun);
99 }
100
101 IFX_INLINE void Ifx__jumpBackToLink(void)
102 {
103 __asm__ volatile ("ji a11");
104 }
105
106 /** Insert a memory barrier
107 */
108 #define Ifx__mem_barrier __asm__ volatile("":::"memory");
109
110 /** \defgroup IfxLld_Cpu_Intrinsics_Ghs_any_type Cross type arithmetic operation
111 *
112 * Macro compatible with float, fix point, signed integer and unsigned integer
113 *
114 * \ingroup IfxLld_Cpu_Intrinsics_Ghs
115 * \{
116 */
117 #define Ifx__minX(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
118 #define Ifx__maxX(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
119 #define Ifx__saturateX(X,Min,Max) ( Ifx__minX(Ifx__maxX(X, Min), Max) )
120 #define Ifx__checkrangeX(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
121 /** \} */
122
123 /** \defgroup IfxLld_Cpu_Intrinsics_Ghs_singed_integer Signed integer operation
124 * \ingroup IfxLld_Cpu_Intrinsics_Ghs
125 * \{
126 */
127 #define Ifx__saturate(X,Min,Max) ( __min(__max(X, Min), Max) )
128 /** \} */
129
130 /** \defgroup IfxLld_Cpu_Intrinsics_Ghs_unsinged_integer Unsigned integer operation
131 * \ingroup IfxLld_Cpu_Intrinsics_Ghs
132 * \{
133 */
134 #define Ifx__saturateu(X,Min,Max) ( __minu(__maxu(X, Min), Max) )
135 /** \} */
136
137 /** \defgroup intrinsicsghs_float Floating point operation
138 * \ingroup IfxLld_Cpu_Intrinsics_Ghs
139 * \{
140 */
141
142 #define Ifx__sqrf(X) ((X) * (X))
143 #define Ifx__sqrtf(X) sqrtf(X)
144 #define Ifx__checkrange(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
145
146 #define Ifx__roundf(X) ((((X) - (sint32)(X)) > 0.5) ? (1 + (sint32)(X)) : ((sint32)(X)))
147 #define Ifx__absf(X) ( ((X) < 0.0) ? -(X) : (X) )
148 #define Ifx__minf(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
149 #define Ifx__maxf(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
150 #define Ifx__saturatef(X,Min,Max) ( Ifx__minf(Ifx__maxf(X, Min), Max) )
151 #define Ifx__checkrangef(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
152
153 #define Ifx__abs_stdreal(X) ( ((X) > 0.0) ? (X) : -(X) )
154 #define Ifx__min_stdreal(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
155 #define Ifx__max_stdreal(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
156 #define Ifx__saturate_stdreal(X,Min,Max) ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )
157
158 #define Ifx__neqf(X,Y) ( ((X) > (Y)) || ((X) < (Y)) ) /**< X != Y */
159 #define Ifx__leqf(X,Y) ( !((X) > (Y)) ) /**< X <= Y */
160 #define Ifx__geqf(X,Y) ( !((X) < (Y)) ) /**< X >= Y */
161 /** \} */
162
163 /** \defgroup IfxLld_Cpu_Intrinsics_Ghsfractional Fractional Arithmetic Support
164 The next table provides an overview of intrinsic functions to convert fractional values. Note that the
165 TASKING VX-toolset C compiler for TriCore fully supports the fractional type so normally you should not
166 need these intrinsic functions (except for __mulfractlong). For compatibility reasons the TASKING C
167 compiler does support these functions.
168 * \ingroup IfxLld_Cpu_Intrinsics_Ghs
169 * \{
170 */
171
172 /** Count the consecutive number of bits that have the same value as bit 15 of an sfract
173 */
174 IFX_INLINE sint16 Ifx__clssf(sfract a)
175 {
176 sint16 res;
177 __asm__ volatile ("sh %1,%1,16 \n\
178 cls %0,%1":"=d"(res):"d"(a):"memory");
179 return res;
180 }
181
182 /** Convert fract to float
183 */
184 IFX_INLINE float Ifx__fract_to_float(fract a)
185 {
186 float res;
187 __asm__ volatile ("q31tof %0,%1,%2":"=d"(res):"d"(a), "d"(0):"memory");
188 return res;
189 }
190
191 /** Convert float to fract
192 */
193 IFX_INLINE fract Ifx__float_to_fract(float a)
194 {
195 fract res;
196 __asm__ volatile ("ftoq31 %0,%1,%2":"=d"(res):"d"(a), "d"(0):"memory");
197 return res;
198 }
199
200 /** Convert laccum to fract
201 */
202 IFX_INLINE fract Ifx__getfract(laccum a)
203 {
204 fract res;
205 __asm__ volatile ("dextr %0,%H1,%L1,0x11":"=&d" (res):"d" (a):"memory");
206 return res;
207 }
208
209 /** Multiply-add with rounding. Returns the rounded result of ( a + b * c )
210 */
211 IFX_INLINE sfract Ifx__mac_r_sf(sfract a, sfract b, sfract c)
212 {
213 sfract res;
214 __asm__ volatile ("sh %1,%1,16 \n\
215 maddrs.q %0,%1,%2L,%3L,1 \n\
216 sh %0,%0,-16":"=d"(res):"d"(a), "d"(b), "d"(c):"memory");
217 return res;
218 }
219
220 /** Multiply-add sfract. Returns ( a + b * c )
221 */
222 IFX_INLINE sfract Ifx__mac_sf(sfract a, sfract b, sfract c)
223 {
224 sfract res;
225 __asm__ volatile ("sh %1,%1,16 \n\
226 madds.q %0,%1,%2L,%3L,1 \n\
227 sh %0,%0,-16":"=d"(res):"d"(a), "d"(b), "d"(c):"memory");
228 return res;
229 }
230
231 /** Integer part of the multiplication of a fract and a fract
232 */
233 IFX_INLINE long Ifx__mulfractfract(fract a, fract b)
234 {
235 long res;
236 __asm__ volatile ("mul.q %0,%1,%2,1":"=d"(res):"d"(a), "d"(b):"memory");
237 return res;
238 }
239
240 /** Integer part of the multiplication of a fract and a long
241 */
242 IFX_INLINE long Ifx__mulfractlong(fract a, long b)
243 {
244 long res;
245 __asm__ volatile ("mul.q %0,%1,%2,1":"=d"(res):"d"(a), "d"(b):"memory");
246 return res;
247 }
248
249 /** Convert fract to sfract
250 */
251 IFX_INLINE sfract Ifx__round16(fract a)
252 {
253 sfract res;
254 __asm__ volatile ("mov.u %0,0x8000 \n\
255 adds %0,%1 \n\
256 extr %0,%0,0x10,0x10 "
257 :"=&d"(res):"d"(a):"memory");
258 return res;
259 }
260
261 #define Ifx__fract_to_sfract Ifx__round16
262
263 /** Convert float to sfract
264 */
265 IFX_INLINE sfract Ifx__float_to_sfract(float a)
266 {
267 fract tmp = Ifx__float_to_fract(a);
268 return Ifx__fract_to_sfract(tmp);
269 }
270
271 /** Convert signed sint16 to sfract
272 */
273 IFX_INLINE sfract Ifx__s16_to_sfract(sint16 a)
274 {
275 sfract res;
276 __asm__ volatile ("sh %0,%1,16 \n\
277 sh %0,%0,-16":"=d"(res):"d"(a):"memory");
278 return res;
279 }
280
281 /** Convert sfract to sint16
282 */
283 IFX_INLINE sint16 Ifx__sfract_to_s16(sfract a)
284 {
285 sint16 res;
286 __asm__ volatile ("sh %1,%1,16 \n\
287 sh %0,%1,-16":"=d"(res):"d"(a):"memory");
288 return res;
289 }
290
291 /** Convert sfract to uint16
292 */
293 IFX_INLINE uint16 Ifx__sfract_to_u16(sfract a)
294 {
295 uint16 res;
296 __asm__ volatile ("sh %1,%1,16 \n\
297 sh %0,%1,-16":"=d"(res):"d"(a):"memory");
298 return res;
299 }
300
301 /** Left/right shift of an __laccum
302 */
303 __asm__ laccum Ifx__shaaccum(laccum a, sint32 b)
304 {
305 % lab L0, L1; reg a, b
306 ! "%d2", "%d3"
307 jge b, 0, L0
308 sha %d3, a!L, b
309 rsub b, b, 0
310 dextr %d2, a!H, a!L, b
311 j L1
312 L0:
313 dextr %d2, a!H, a!L, b
314 sha %d2, a!L, b
315 L1:
316 }
317
318 /** Left/right shift of an fract
319 */
320 IFX_INLINE fract Ifx__shafracts(fract a, sint32 b)
321 {
322 fract res;
323 __asm__ volatile ("shas %0,%1,%2":"=d"(res):"d"(a), "d"(b):"memory");
324 return res;
325 }
326
327 /** Left/right shift of an sfract
328 */
329 IFX_INLINE sfract Ifx__shasfracts(sfract a, sint32 b)
330 {
331 sfract res;
332 __asm__ volatile ("sh %1,%1,16 \n\
333 shas %0,%1,%2 \n\
334 sh %0,%0,-16":"=d"(res):"d"(a), "d"(b):"memory");
335 return res;
336 }
337
338 /** Convert uint16 to sfract
339 */
340 IFX_INLINE sfract Ifx__u16_to_sfract(uint16 a)
341 {
342 sfract res;
343 __asm__ volatile ("sh %0,%1,16 \n\
344 sh %0,%0,-16":"=d"(res):"d"(a):"memory");
345 return res;
346 }
347
348 /** \} */
349
350 /** \defgroup IfxLld_Cpu_Intrinsics_Ghsinsert Insert / Extract Bit-fields and Bits
351 * \ingroup IfxLld_Cpu_Intrinsics_Ghs
352 * \{
353 */
354
355 /** Extract a bit-field (bit pos to bit pos+width) from value
356 */
357 IFX_INLINE sint32 Ifx__extr(sint32 a, uint32 p, uint32 w)
358 {
359 sint32 res;
360 __asm__ volatile ("mov d14,%2 \n\
361 mov d15,%3 \n\
362 extr %0,%1,e14"
363 : "=d" (res) : "d" (a), "d" (p), "d" (w):"d14", "d15");
364 return res;
365 }
366
367 /** Same as __extr() but return bit-field as unsigned integer
368 */
369 IFX_INLINE uint32 Ifx__extru(uint32 a, uint32 p, uint32 w)
370 {
371 uint32 res;
372 __asm__ volatile ("mov d14,%2 \n\
373 mov d15,%3 \n\
374 extr.u %0,%1,e14"\
375 : "=d" (res) : "d" (a), "d" (p), "d" (w):"d14", "d15");
376 return res;
377 }
378
379 /** Load a single bit.
380 */
381 //#define __getbit(address,bitoffset ) __extru( *(address), bitoffset, 1 )
382 #define Ifx__getbit(address, bitoffset) ((*(address) & (1U << (bitoffset))) != 0)
383
384 /** Atomic load-modify-store.
385 */
386 #define Ifx__imaskldmst(address, value, bitoffset, bits) __imaskldmst((int *)address, value, bitoffset, bits)
387
388 /** Extract bit-field (width bits starting at bit 0) from src and insert it in trg at pos.
389 */
390 IFX_INLINE sint32 Ifx__insert(sint32 a, sint32 b, sint32 p, const sint32 w)
391 {
392 sint32 res;
393 __asm__ volatile ("mov d14,%3 \n\
394 mov d15,%4 \n\
395 insert %0,%1,%2,e14"
396 :"=d"(res):"d"(a), "d"(b), "d"(p), "d"(w):"d14", "d15");
397 return res;
398 }
399
400 /** Store a single bit.
401 */
402 #define Ifx__putbit(value,address,bitoffset ) Ifx__imaskldmst(address, value, bitoffset,1)
403
404 /** \} */
405
406 /** \defgroup IfxLld_Cpu_Intrinsics_Ghsinterrupt_handling Interrupt Handling
407 The next table provides an overview of the intrinsic functions to read or set interrupt handling.
408 * \ingroup IfxLld_Cpu_Intrinsics_Ghs
409 * \{
410 */
411
412 /** \} */
413
414 /** \defgroup IfxLld_Cpu_Intrinsics_Ghsmiscellaneous Miscellaneous Intrinsic Functions
415 * \ingroup IfxLld_Cpu_Intrinsics_Ghs
416 * \{
417 */
418
419 /** Write back and invalidate cache address "p". Generates CACHEA.WI [Ab].
420 */
421 IFX_INLINE void Ifx__cacheawi(uint8* p)
422 {
423 __asm__ volatile("cachea.wi [%0]0"::"a"(p));
424 }
425 /** Write back and invalidate cache index "p". Generates CACHEI.WI [Ab].
426 */
427 IFX_INLINE void Ifx__cacheiwi(uint8* p)
428 {
429 __asm__ volatile("cachei.wi [%0]0"::"a"(p));
430 }
431
432 /** Write back and invalidate cache address \"p\" and return post incremented
433 * value of \"p\". Generates CACHEA.WI [Ab+].
434 */
435 IFX_INLINE uint8* Ifx__cacheawi_bo_post_inc(uint8* p)
436 {
437 __asm__ volatile("cachea.wi [%0+]0"::"a"(p));
438 return p;
439 }
440
441 /** Multiply two 32-bit numbers to an intermediate 64-bit result, and scale
442 * back the result to 32 bits. To scale back the result, 32 bits are extracted
443 * from the intermediate 64-bit result: bit 63-offset to bit 31-offset.
444 */
445 IFX_INLINE sint32 Ifx__mulsc(sint32 a, sint32 b, sint32 offset)
446 {
447 sint32 res;
448 __asm__ volatile("mul e12,%1,%2 \n\
449 dextr %0,d13,d12,%3"
450 :"=d"(res):"d"(a), "d"(b), "d"(offset):"d12", "d13");
451 return res;
452 }
453
454 /** Rotate operand left count times. The bits that are shifted out are inserted at the right side (bit 31 is shifted to bit 0).
455 */
456 IFX_INLINE uint32 Ifx__rol(uint32 operand, uint32 count)
457 {
458 uint32 res;
459 __asm__ volatile("dextr %0,%1,%1,%2":"=d"(res):"d"(operand), "d"(count):"memory");
460 return res;
461 }
462
463 /** Rotate operand right count times. The bits that are shifted out are inserted at the left side (bit 0 is shifted to bit 31).
464 */
465 IFX_INLINE uint32 Ifx__ror(uint32 operand, uint32 count)
466 {
467 uint32 res;
468 __asm__ volatile("rsub %2,%2,0 \n\
469 dextr %0,%1,%1,%2"
470 :"=d"(res):"d"(operand), "d"(count):"memory");
471 return res;
472 }
473 /** \} */
474
475 /** \defgroup IfxLld_Cpu_Intrinsics_Ghspacked Packed Data Type Support
476 The next table provides an overview of the intrinsic functions for initialization of packed data type.
477 * \ingroup IfxLld_Cpu_Intrinsics_Ghs
478 * \{
479 */
480
481 /** Extract first byte from a __packb
482 */
483 IFX_INLINE sint8 Ifx__extractbyte1(__packb a)
484 {
485 sint8 res;
486 __asm__ volatile ("extr %0,%1,0,8"
487 :"=d"(res):"d"(a):"memory");
488 return res;
489 }
490
491 /** Extract second byte from a __packb
492 */
493 IFX_INLINE sint8 Ifx__extractbyte2(__packb a)
494 {
495 sint8 res;
496 __asm__ volatile ("extr %0,%1,8,8"
497 :"=d"(res):"d"(a):"memory");
498 return res;
499 }
500
501 /** Extract third byte from a __packb
502 */
503 IFX_INLINE sint8 Ifx__extractbyte3(__packb a)
504 {
505 sint8 res;
506 __asm__ volatile ("extr %0,%1,16,8"
507 :"=d"(res):"d"(a):"memory");
508 return res;
509 }
510
511 /** Extract fourth byte from a __packb
512 */
513 IFX_INLINE sint8 Ifx__extractbyte4(__packb a)
514 {
515 sint8 res;
516 __asm__ volatile ("extr %0,%1,24,8"
517 :"=d"(res):"d"(a):"memory");
518 return res;
519 }
520
521 /** Extract first sint16 from a __packhw
522 */
523 IFX_INLINE sint16 Ifx__extracthw1(__packhw a)
524 {
525 sint16 res;
526 __asm__ volatile ("extr %0,%1,0,16"
527 :"=d"(res):"d"(a):"memory");
528 return res;
529 }
530
531 /** Extract second sint16 from a __packhw
532 */
533 IFX_INLINE sint16 Ifx__extracthw2(__packhw a)
534 {
535 sint16 res;
536 __asm__ volatile ("extr %0,%1,16,16"
537 :"=d"(res):"d"(a):"memory");
538 return res;
539 }
540
541 /** Extract first uint8 from a __packb
542 */
543 IFX_INLINE uint8 Ifx__extractubyte1(__upackb a)
544 {
545 uint8 res;
546 __asm__ volatile ("extr %0,%1,0,8"
547 :"=d"(res):"d"(a):"memory");
548 return res;
549 }
550
551 /** Extract second uint8 from a __packb
552 */
553 IFX_INLINE uint8 Ifx__extractubyte2(__upackb a)
554 {
555 uint8 res;
556 __asm__ volatile ("extr %0,%1,8,8"
557 :"=d"(res):"d"(a):"memory");
558 return res;
559 }
560
561 /** Extract third uint8 from a __packb
562 */
563 IFX_INLINE uint8 Ifx__extractubyte3(__upackb a)
564 {
565 uint8 res;
566 __asm__ volatile ("extr %0,%1,16,8"
567 :"=d"(res):"d"(a):"memory");
568 return res;
569 }
570
571 /** Extract fourth uint8 from a __packb
572 */
573 IFX_INLINE uint8 Ifx__extractubyte4(__upackb a)
574 {
575 uint8 res;
576 __asm__ volatile ("extr %0,%1,24,8"
577 :"=d"(res):"d"(a):"memory");
578 return res;
579 }
580
581 /** Extract first uint16 from a __packhw
582 */
583 IFX_INLINE uint16 Ifx__extractuhw1(__upackhw a)
584 {
585 uint16 res;
586 __asm__ volatile ("extr %0,%1,0,16"
587 :"=d"(res):"d"(a):"memory");
588 return res;
589 }
590
591 /** Extract second uint16 from a __packhw
592 */
593 IFX_INLINE uint16 Ifx__extractuhw2(__upackhw a)
594 {
595 uint16 res;
596 __asm__ volatile ("extr %0,%1,16,16"
597 :"=d"(res):"d"(a):"memory");
598 return res;
599 }
600
601 /** Extract first byte from a __packb
602 */
603 IFX_INLINE sint8 Ifx__getbyte1(__packb* a)
604 {
605 sint8 res;
606 __asm__ volatile ("ld.w %0,[%1]0 \n\
607 extr %0,%0,0,8"
608 :"=d"(res):"a"(a):"memory");
609 return res;
610
611 }
612
613 /** Extract second byte from a __packb
614 */
615 IFX_INLINE sint8 Ifx__getbyte2(__packb* a)
616 {
617 sint8 res;
618 __asm__ volatile ("ld.w %0,[%1]0 \n\
619 extr %0,%0,8,8"
620 :"=d"(res):"a"(a):"memory");
621 return res;
622
623 }
624
625 /** Extract third byte from a __packb
626 */
627 IFX_INLINE sint8 Ifx__getbyte3(__packb* a)
628 {
629 sint8 res;
630 __asm__ volatile ("ld.w %0,[%1]0 \n\
631 extr %0,%0,16,8"
632 :"=d"(res):"a"(a):"memory");
633 return res;
634
635 }
636
637 /** Extract fourth byte from a __packb
638 */
639 IFX_INLINE sint8 Ifx__getbyte4(__packb* a)
640 {
641 sint8 res;
642 __asm__ volatile ("ld.w %0,[%1]0 \n\
643 extr %0,%0,24,8"
644 :"=d"(res):"a"(a):"memory");
645 return res;
646
647 }
648
649 /** Extract first sint16 from a __packhw
650 */
651 IFX_INLINE sint16 Ifx__gethw1(__packhw* a)
652 {
653 sint16 res;
654 __asm__ volatile ("ld.w %0,[%1]0 \n\
655 extr %0,%0,0,16"
656 :"=d"(res):"a"(a):"memory");
657 return res;
658 }
659 /** Extract second sint16 from a __packhw
660 */
661 IFX_INLINE sint16 Ifx__gethw2(__packhw* a)
662 {
663 sint16 res;
664 __asm__ volatile ("ld.w %0,[%1]0 \n\
665 extr %0,%0,16,16"
666 :"=d"(res):"a"(a):"memory");
667 return res;
668 }
669
670 /** Extract first uint8 from a __packb
671 */
672 IFX_INLINE uint8 Ifx__getubyte1(__upackb* a)
673 {
674 uint8 res;
675 __asm__ volatile ("ld.w %0,[%1]0 \n\
676 extr %0,%0,0,8"
677 :"=d"(res):"a"(a):"memory");
678 return res;
679 }
680
681 /** Extract second uint8 from a __packb
682 */
683 IFX_INLINE uint8 Ifx__getubyte2(__upackb* a)
684 {
685 uint8 res;
686 __asm__ volatile ("ld.w %0,[%1]0 \n\
687 extr %0,%0,8,8"
688 :"=d"(res):"a"(a):"memory");
689 return res;
690 }
691
692 /** Extract third uint8 from a __packb
693 */
694 IFX_INLINE uint8 Ifx__getubyte3(__upackb* a)
695 {
696 uint8 res;
697 __asm__ volatile ("ld.w %0,[%1]0 \n\
698 extr %0,%0,16,8"
699 :"=d"(res):"a"(a):"memory");
700 return res;
701 }
702
703 /** Extract fourth uint8 from a __packb
704 */
705 IFX_INLINE uint8 Ifx__getubyte4(__upackb* a)
706 {
707 uint8 res;
708 __asm__ volatile ("ld.w %0,[%1]0 \n\
709 extr %0,%0,24,8"
710 :"=d"(res):"a"(a):"memory");
711 return res;
712 }
713
714 /** Extract first uint16 from a __packhw
715 */
716 IFX_INLINE uint16 Ifx__getuhw1(__upackhw* a)
717 {
718 uint16 res;
719 __asm__ volatile ("ld.w %0,[%1]0 \n\
720 extr %0,%0,0,16"
721 :"=d"(res):"a"(a):"memory");
722 return res;
723 }
724
725 /** Extract second uint16 from a __packhw
726 */
727 IFX_INLINE uint16 Ifx__getuhw2(__upackhw* a)
728 {
729 uint16 res;
730 __asm__ volatile ("ld.w %0,[%1]0 \n\
731 extr %0,%0,16,16"
732 :"=d"(res):"a"(a):"memory");
733 return res;
734 }
735
736 /** Initialize __packb with four integers
737 */
738 IFX_INLINE __packb Ifx__initpackb(sint32 a, sint32 b, sint32 c, sint32 d)
739 {
740 __packb res;
741 __asm__ volatile ("insert %3,%3,%4,8,8 \n\
742 insert %4,%1,%2,8,8 \n\
743 insert %0,%4,%3,16,16 "
744 :"=d"(res):"d"(a), "d"(b), "d"(c), "d"(d):"memory");
745 return res;
746 }
747
748 /** Initialize __packb with a long integer
749 */
750 IFX_INLINE __packb Ifx__initpackbl(long a)
751 {
752 return (__packb) a;
753 }
754
755 /** Initialize __packhw with two integers
756 */
757 IFX_INLINE __packhw Ifx__initpackhw(sint16 a, sint16 b)
758 {
759 __packhw res;
760 __asm__ volatile ("insert %0,%1,%2,16,16"
761 :"=d"(res):"d"(a), "d"(b):"memory");
762 return res;
763 }
764
765 /** Initialize __packhw with a long integer
766 */
767 IFX_INLINE __packhw Ifx__initpackhwl(long a)
768 {
769 return a;
770 }
771
772 /** Initialize __packb with four unsigned integers
773 */
774 IFX_INLINE __upackb Ifx__initupackb( uint32 a, uint32 b, uint32 c, uint32 d)
775 {
776 __upackb res;
777 __asm__ volatile ("insert %3,%3,%4,8,8 \n\
778 insert %1,%1,%2,8,8 \n\
779 insert %0,%1,%3,16,16"
780 :"=d"(res):"d"(a), "d"(b), "d"(c), "d"(d):"memory");
781 return res;
782 }
783
784 /** Initialize __packhw with two unsigned integers
785 */
786 IFX_INLINE __upackhw Ifx__initupackhw( uint16 a, uint16 b)
787 {
788 __upackhw res;
789 __asm__ volatile ("insert %0,%1,%2,16,16"
790 :"=d"(res):"d"(a), "d"(b):"memory");
791 return res;
792 }
793
794 /** Insert sint8 into first byte of a __packb
795 */
796 IFX_INLINE __packb Ifx__insertbyte1(__packb a, sint8 b)
797 {
798 __packb res;
799 __asm__ volatile ("insert %0,%1,%2,0,8"
800 :"=d"(res):"d"(a), "d"(b):"memory");
801 return res;
802 }
803
804 /** Insert sint8 into second byte of a __packb
805 */
806 IFX_INLINE __packb Ifx__insertbyte2(__packb a, sint8 b)
807 {
808 __packb res;
809 __asm__ volatile ("insert %0,%1,%2,8,8"
810 :"=d"(res):"d"(a), "d"(b):"memory");
811 return res;
812 }
813
814 /** Insert sint8 into third byte of a __packb
815 */
816 IFX_INLINE __packb Ifx__insertbyte3(__packb a, sint8 b)
817 {
818 __packb res;
819 __asm__ volatile ("insert %0,%1,%2,16,8"
820 :"=d"(res):"d"(a), "d"(b):"memory");
821 return res;
822 }
823
824 /** Insert sint8 into fourth byte of a __packb
825 */
826 IFX_INLINE __packb Ifx__insertbyte4(__packb a, sint8 b)
827 {
828 __packb res;
829 __asm__ volatile ("insert %0,%1,%2,24,8"
830 :"=d"(res):"d"(a), "d"(b):"memory");
831 return res;
832 }
833
834 /** Insert sint8 into first uint8 of a __packb
835 */
836 IFX_INLINE __upackb Ifx__insertubyte1( __upackb a, uint8 b)
837 {
838 __upackb res;
839 __asm__ volatile ("insert %0,%1,%2,0,8"
840 :"=d"(res):"d"(a), "d"(b):"memory");
841 return res;
842 }
843
844 /** Insert sint8 into second uint8 of a __packb
845 */
846 IFX_INLINE __upackb Ifx__insertubyte2( __upackb a, uint8 b)
847 {
848 __upackb res;
849 __asm__ volatile ("insert %0,%1,%2,8,8"
850 :"=d"(res):"d"(a), "d"(b):"memory");
851 return res;
852 }
853
854 /** Insert sint8 into third uint8 of a __packb
855 */
856 IFX_INLINE __upackb Ifx__insertubyte3( __upackb a, uint8 b)
857 {
858 __upackb res;
859 __asm__ volatile ("insert %0,%1,%2,16,8"
860 :"=d"(res):"d"(a), "d"(b):"memory");
861 return res;
862 }
863
864 /** Insert sint8 into fourth uint8 of a __packb
865 */
866 IFX_INLINE __upackb Ifx__insertubyte4( __upackb a, uint8 b)
867 {
868 __upackb res;
869 __asm__ volatile ("insert %0,%1,%2,24,8"
870 :"=d"(res):"d"(a), "d"(b):"memory");
871 return res;
872 }
873
874 /** Insert sint16 into first halfword of a __packhw
875 */
876 IFX_INLINE __packhw Ifx__inserthw1(__packhw a, sint16 b)
877 {
878 __packhw res;
879 __asm__ volatile ("insert %0,%1,%2,0,16"
880 :"=d"(res):"d"(a), "d"(b):"memory");
881 return res;
882 }
883
884 /** Insert sint16 into second halfword of a __packhw
885 */
886 IFX_INLINE __packhw Ifx__inserthw2(__packhw a, sint16 b)
887 {
888 __packhw res;
889 __asm__ volatile ("insert %0,%1,%2,16,16"
890 :"=d"(res):"d"(a), "d"(b):"memory");
891 return res;
892 }
893
894 /** Insert uint16 into first halfword of a __upackhw
895 */
896 IFX_INLINE __upackhw Ifx__insertuhw1( __upackhw a, uint16 b)
897 {
898 __upackhw res;
899 __asm__ volatile ("insert %0,%1,%2,0,16"
900 :"=d"(res):"d"(a), "d"(b):"memory");
901 return res;
902 }
903
904 /** Insert uint16 into second halfword of a __upackhw
905 */
906 IFX_INLINE __upackhw Ifx__insertuhw2( __upackhw a, uint16 b)
907 {
908 __upackhw res;
909 __asm__ volatile ("insert %0,%1,%2,16,16"
910 :"=d"(res):"d"(a), "d"(b):"memory");
911 return res;
912 }
913
914 /** Insert sint8 into first byte of a __packb
915 */
916 IFX_INLINE void Ifx__setbyte1(__packb* a, sint8 b)
917 {
918 __asm__ volatile ("ld.w d15,[%0] \n\
919 insert d15,d15,%1,0,8 \n\
920 st.w [%0],d15"
921 ::"a"(a), "d"(b):"d15", "memory");
922 }
923
924 /** Insert sint8 into second byte of a __packb
925 */
926 IFX_INLINE void Ifx__setbyte2(__packb* a, sint8 b)
927 {
928 __asm__ volatile ("ld.w d15,[%0] \n\
929 insert d15,d15,%1,8,8 \n\
930 st.w [%0],d15"
931 ::"a"(a), "d"(b):"d15", "memory");
932 }
933
934 /** Insert sint8 into third byte of a __packb
935 */
936 IFX_INLINE void Ifx__setbyte3(__packb* a, sint8 b)
937 {
938 __asm__ volatile ("ld.w d15,[%0] \n\
939 insert d15,d15,%1,16,8 \n\
940 st.w [%0],d15"
941 ::"a"(a), "d"(b):"d15", "memory");
942 }
943
944 /** Insert sint8 into fourth byte of a __packb
945 */
946 IFX_INLINE void Ifx__setbyte4(__packb* a, sint8 b)
947 {
948 __asm__ volatile ("ld.w d15,[%0] \n\
949 insert d15,d15,%1,24,8 \n\
950 st.w [%0],d15"
951 ::"a"(a), "d"(b):"d15", "memory");
952 }
953
954 /** Insert sint16 into first halfword of a __packhw
955 */
956 IFX_INLINE void Ifx__sethw1(__packhw* a, sint16 b)
957 {
958 __asm__ volatile ("ld.w d15,[%0] \n\
959 insert d15,d15,%1,0,16 \n\
960 st.w [%0],d15"
961 ::"a"(a), "d"(b):"d15", "memory");
962 }
963
964 /** Insert sint16 into second halfword of a __packhw
965 */
966 IFX_INLINE void Ifx__sethw2(__packhw* a, sint16 b)
967 {
968 __asm__ volatile ("ld.w d15,[%0] \n\
969 insert d15,d15,%1,16,16 \n\
970 st.w [%0],d15"
971 ::"a"(a), "d"(b):"d15", "memory");
972 }
973
974 /** Insert uint8 into first byte of a __upackb
975 */
976 IFX_INLINE void Ifx__setubyte1(__upackb* a, uint8 b)
977 {
978 __asm__ volatile ("ld.w d15,[%0] \n\
979 insert d15,d15,%1,0,8 \n\
980 st.w [%0],d15"
981 ::"a"(a), "d"(b):"d15", "memory");
982 }
983
984 /** Insert uint8 into second byte of a __upackb
985 */
986 IFX_INLINE void Ifx__setubyte2(__upackb* a, uint8 b)
987 {
988 __asm__ volatile ("ld.w d15,[%0] \n\
989 insert d15,d15,%1,8,8 \n\
990 st.w [%0],d15"
991 ::"a"(a), "d"(b):"d15", "memory");
992 }
993
994 /** Insert uint8 into third byte of a __upackb
995 */
996 IFX_INLINE void Ifx__setubyte3(__upackb* a, uint8 b)
997 {
998 __asm__ volatile ("ld.w d15,[%0] \n\
999 insert d15,d15,%1,16,8 \n\
1000 st.w [%0],d15"
1001 ::"a"(a), "d"(b):"d15", "memory");
1002 }
1003
1004 /** Insert uint8 into fourth byte of a __upackb
1005 */
1006 IFX_INLINE void Ifx__setubyte4(__upackb* a, uint8 b)
1007 {
1008 __asm__ volatile ("ld.w d15,[%0] \n\
1009 insert d15,d15,%1,24,8 \n\
1010 st.w [%0],d15"
1011 ::"a"(a), "d"(b):"d15", "memory");
1012 }
1013
1014 /** Insert uint16 into first halfword of a __upackhw
1015 */
1016 IFX_INLINE void Ifx__setuhw1(__upackhw* a, uint16 b)
1017 {
1018 __asm__ volatile ("ld.w d15,[%0] \n\
1019 insert d15,d15,%1,0,16 \n\
1020 st.w [%0],d15"
1021 ::"a"(a), "d"(b):"d15", "memory");
1022 }
1023
1024 /** Insert uint16 into second halfword of a __upackhw
1025 */
1026 IFX_INLINE void Ifx__setuhw2(__upackhw* a, uint16 b)
1027 {
1028 __asm__ volatile ("ld.w d15,[%0] \n\
1029 insert d15,d15,%1,16,16 \n\
1030 st.w [%0],d15"
1031 ::"a"(a), "d"(b):"d15", "memory");
1032 }
1033
1034 /** \} */
1035
1036 /** \defgroup IfxLld_Cpu_Intrinsics_Ghssingle_assembly Insert Single Assembly Instruction
1037 The next table provides an overview of the intrinsic functions that you can use to insert a single assembly
1038 instruction.You can also use inline assembly but these intrinsics provide a shorthand for frequently used
1039 assembly instructions.
1040 * \ingroup IfxLld_Cpu_Intrinsics_Ghs
1041 * \{
1042 */
1043
1044 /** Insert LDMST instruction. Note that all operands must be word-aligned.
1045 */
1046 IFX_INLINE void Ifx__ldmst(volatile void* address, uint32 mask, uint32 value)
1047 {
1048 __asm__ volatile("ldmst [%0]0,%1"
1049 ::"a"(address), "e"((long long)mask<<32 | value));
1050 }
1051
1052 /** Insert a loop over cnt NOP instruction
1053 */
1054 IFX_INLINE void Ifx__nops(void* cnt)
1055 {
1056 __asm__ volatile ("0: nop \n\
1057 loop %0,0b"
1058 ::"a"(((sint8*)cnt)-1));
1059 }
1060
1061 /** Insert SWAP instruction. Note that all operands must be word-aligned.
1062 */
1063 IFX_INLINE uint32 Ifx__swap(void* place, uint32 value)
1064 {
1065 uint32 res;
1066 __asm__ volatile("swap.w [%1]0,%2":"=d"(res):"a"(place), "0"(value));
1067 return res;
1068 }
1069
1070 /** Insert n NOP instruction
1071 */
1072 #define Ifx__NOP(n) __asm(".rept " #n "\n\tnop\n\t.endr\n")
1073
1074 /** \} */
1075
1076 /* FIXME use inline instead of #define */
1077 /*#define __extru(src,start,size) \
1078 ({ sint32 res; asm volatile (" extr.u\t %0,%1,%2,%3" : "=d" (res) : \
1079 "d" (src),"i" (start),"i" (size) : "memory"); res; })*/
1080
1081 /* FIXME use inline instead of #define */
1082 #define Ifx__setareg(areg,val) \
1083 { uint32 reg_val= (uint32)val; \
1084 asm volatile (" mov.a\t %"#areg",%0"::"d"(reg_val)); }
1085
1086 /**__mtcr (CPU_CCTRL, 0);
1087 */
1088 IFX_INLINE void Ifx__stopPerfCounters(void)
1089 {
1090 __asm__ volatile("mov d0,0\n\
1091 mtcr 0xFC00,d0\n\
1092 isync\n"
1093 : : :"d0"); /* FIXME check that the parameter d0 is understood by the compiler as a register used by the inline */
1094 }
1095
1096 /** \brief This function is a implementation of a binary semaphore using compare and swap instruction
1097 * \param address address of resource.
1098 * \param value This variable is updated with status of address
1099 * \param condition if the value of address matches with the value of condition, then swap of value & address occurs.
1100 *
1101 */
1102 IFX_INLINE unsigned int Ifx__cmpAndSwap (unsigned int volatile *address,
1103 unsigned int value, unsigned int condition)
1104 {
1105 unsigned long long reg64
1106 = value | (unsigned long long) condition << 32;
1107
1108 __asm__ __volatile__ ("cmpswap.w [%[addr]]0, %A[reg]"
1109 : [reg] "+d" (reg64)
1110 : [addr] "a" (address)
1111 : "memory");
1112 return reg64;
1113 }
1114
1115 /** \brief Convert a fixpoint value to float32
1116 *
1117 * This function converts a value from a fixpoint format to a float32 format.
1118 *
1119 *
1120 * \param value value to be converted.
1121 * \param shift position of the fix point. Range = [-256, 255] => (Qx.y format where x = shift+1).
1122 *
1123 * \return Returns the converted value in the float32 format.
1124 *
1125 */
1126 IFX_INLINE float32 Ifx__fixpoint_to_float32(fract value, sint32 shift)
1127 {
1128 float32 result;
1129
1130 __asm__ volatile("q31tof %0, %1, %2": "=d" (result) : "d" (value), "d" (shift));
1131 return result;
1132 }
1133
1134 IFX_INLINE void* Ifx__getA11(void)
1135 {
1136 uint32 *res;
1137 __asm__ volatile ("mov.aa %0, a11": "=a" (res) : :"a11");
1138 return res;
1139 }
1140
1141 IFX_INLINE void Ifx__setStackPointer(void *stackAddr)
1142 {
1143 __asm__ volatile ("mov.aa a10, %0": : "a" (stackAddr));
1144 }
1145
1146 IFX_INLINE uint32 IfxCpu_calculateCrc32(uint32 *startaddress, uint8 length)
1147 {
1148 uint32 returnvalue = 0; /* set seed value to 0 */
1149 for (;length > 0; length--)
1150 {
1151 /* calculate the CRC over all data */
1152 __asm__ ("CRC32B.W %0,%0,%1" : "+d" (returnvalue) : "d" (*startaddress));
1153 startaddress++;
1154 }
1155 return returnvalue;
1156 }
1157
1158 IFX_INLINE uint32 IfxCpu_getRandomVal(uint32 a, uint32 x, uint32 m)
1159 {
1160 uint32 result;
1161 __asm(" mul.u %%e14,%1,%2 # d15 = Eh; d14 = El \n"
1162 " mov %%d12,%%d14 # e12 = El \n"
1163 " mov %%d13, 0 # \n"
1164 " madd.u %%e14,%%e12,%%d15, 5 # e14 = El + 5 * d15 \n"
1165 " cmp_m_%=: jge.u %%d14,%3,sub_m_%= # \n"
1166 " jz %%d15,done_%= # \n"
1167 " sub_m_%=: subx %%d14,%%d14,%3 # e12=e12-m \n"
1168 " subc %%d15,%%d15,%%d13 # d13=d13-0 \n"
1169 " loopu cmp_m_%= # \n"
1170 " done_%=: mov %0,%%d14 # \n"
1171 : "=d"(result) : "d"(a), "d"(x), "d"(m) : "d12","d13","d14","d15");
1172 return result;
1173 }
1174
1175 /* compiler don't know this instruction
1176 IFX_INLINE sint32 Ifx__popcnt(sint32 a)
1177 {
1178 sint32 res;
1179 __asm__ volatile ("popcnt %0,%1":"=d"(res):"d"(a));
1180 return res;
1181 }*/
1182
1183 /** Invalidate cache address "p". Generates CACHEA.I [Ab].
1184 */
1185 IFX_INLINE void Ifx__cacheai(uint8* p)
1186 {
1187 __asm__ volatile("cachea.i [%0]0"::"a"(p));
1188 }
1189
1190 /* Macros for backward compatibility of the intrinsics*/
1191 /******************************************************************************/
1192 #ifndef IFX_CFG_DISABLE_DEFAULT_INTRINSICS
1193 #ifndef __non_return_call
1194 #define __non_return_call Ifx__non_return_call
1195 #endif
1196
1197 #ifndef __jump_and_link
1198 #define __jump_and_link Ifx__jump_and_link
1199 #endif
1200
1201 #ifndef __moveToDataParam0
1202 #define __moveToDataParam0 Ifx__moveToDataParam0
1203 #endif
1204
1205 #ifndef __moveToDataParamRet
1206 #define __moveToDataParamRet Ifx__moveToDataParamRet
1207 #endif
1208
1209 #ifndef __getDataParamRet
1210 #define __getDataParamRet Ifx__getDataParamRet
1211 #endif
1212
1213 #ifndef __moveToAddrParam0
1214 #define __moveToAddrParam0 Ifx__moveToAddrParam0
1215 #endif
1216
1217 #ifndef __jumpToFunction
1218 #define __jumpToFunction Ifx__jumpToFunction
1219 #endif
1220
1221 #ifndef __jumpToFunctionWithLink
1222 #define __jumpToFunctionWithLink Ifx__jumpToFunctionWithLink
1223 #endif
1224
1225 #ifndef __jumpBackToLink
1226 #define __jumpBackToLink Ifx__jumpBackToLink
1227 #endif
1228
1229 #ifndef __mem_barrier
1230 #define __mem_barrier Ifx__mem_barrier
1231 #endif
1232
1233 #ifndef __minX
1234 #define __minX Ifx__minX
1235 #endif
1236
1237 #ifndef __maxX
1238 #define __maxX Ifx__maxX
1239 #endif
1240
1241 #ifndef __saturateX
1242 #define __saturateX Ifx__saturateX
1243 #endif
1244
1245 #ifndef __checkrangeX
1246 #define __checkrangeX Ifx__checkrangeX
1247 #endif
1248
1249 #ifndef __saturate
1250 #define __saturate Ifx__saturate
1251 #endif
1252
1253 #ifndef __saturateu
1254 #define __saturateu Ifx__saturateu
1255 #endif
1256
1257 #ifndef __sqrf
1258 #define __sqrf Ifx__sqrf
1259 #endif
1260
1261 #ifndef __sqrtf
1262 #define __sqrtf Ifx__sqrtf
1263 #endif
1264
1265 #ifndef __checkrange
1266 #define __checkrange Ifx__checkrange
1267 #endif
1268
1269 #ifndef __roundf
1270 #define __roundf Ifx__roundf
1271 #endif
1272
1273 #ifndef __absf
1274 #define __absf Ifx__absf
1275 #endif
1276
1277 #ifndef __minf
1278 #define __minf Ifx__minf
1279 #endif
1280
1281 #ifndef __maxf
1282 #define __maxf Ifx__maxf
1283 #endif
1284
1285 #ifndef __saturatef
1286 #define __saturatef Ifx__saturatef
1287 #endif
1288
1289 #ifndef __checkrangef
1290 #define __checkrangef Ifx__checkrangef
1291 #endif
1292
1293 #ifndef __abs_stdreal
1294 #define __abs_stdreal Ifx__abs_stdreal
1295 #endif
1296
1297 #ifndef __min_stdreal
1298 #define __min_stdreal Ifx__min_stdreal
1299 #endif
1300
1301 #ifndef __max_stdreal
1302 #define __max_stdreal Ifx__max_stdreal
1303 #endif
1304
1305 #ifndef __saturate_stdreal
1306 #define __saturate_stdreal Ifx__saturate_stdreal
1307 #endif
1308
1309 #ifndef __neqf
1310 #define __neqf Ifx__neqf
1311 #endif
1312
1313 #ifndef __leqf
1314 #define __leqf Ifx__leqf
1315 #endif
1316
1317 #ifndef __geqf
1318 #define __geqf Ifx__geqf
1319 #endif
1320
1321 #ifndef __clssf
1322 #define __clssf Ifx__clssf
1323 #endif
1324
1325 #ifndef __fract_to_float
1326 #define __fract_to_float Ifx__fract_to_float
1327 #endif
1328
1329 #ifndef __float_to_fract
1330 #define __float_to_fract Ifx__float_to_fract
1331 #endif
1332
1333 #ifndef __getfract
1334 #define __getfract Ifx__getfract
1335 #endif
1336
1337 #ifndef __mac_r_sf
1338 #define __mac_r_sf Ifx__mac_r_sf
1339 #endif
1340
1341 #ifndef __mac_sf
1342 #define __mac_sf Ifx__mac_sf
1343 #endif
1344
1345 #ifndef __mulfractfract
1346 #define __mulfractfract Ifx__mulfractfract
1347 #endif
1348
1349 #ifndef __mulfractlong
1350 #define __mulfractlong Ifx__mulfractlong
1351 #endif
1352
1353 #ifndef __round16
1354 #define __round16 Ifx__round16
1355 #endif
1356
1357 #ifndef __fract_to_sfract
1358 #define __fract_to_sfract Ifx__fract_to_sfract
1359 #endif
1360
1361 #ifndef __float_to_sfract
1362 #define __float_to_sfract Ifx__float_to_sfract
1363 #endif
1364
1365 #ifndef __s16_to_sfract
1366 #define __s16_to_sfract Ifx__s16_to_sfract
1367 #endif
1368
1369 #ifndef __sfract_to_s16
1370 #define __sfract_to_s16 Ifx__sfract_to_s16
1371 #endif
1372
1373 #ifndef __sfract_to_u16
1374 #define __sfract_to_u16 Ifx__sfract_to_u16
1375 #endif
1376
1377 #ifndef __shaaccum
1378 #define __shaaccum Ifx__shaaccum
1379 #endif
1380
1381 #ifndef __shafracts
1382 #define __shafracts Ifx__shafracts
1383 #endif
1384
1385 #ifndef __shasfracts
1386 #define __shasfracts Ifx__shasfracts
1387 #endif
1388
1389 #ifndef __u16_to_sfract
1390 #define __u16_to_sfract Ifx__u16_to_sfract
1391 #endif
1392
1393 #ifndef __extr
1394 #define __extr Ifx__extr
1395 #endif
1396
1397 #ifndef __extru
1398 #define __extru Ifx__extru
1399 #endif
1400
1401 #ifndef __getbit
1402 #define __getbit Ifx__getbit
1403 #endif
1404
1405 #ifndef __insert
1406 #define __insert Ifx__insert
1407 #endif
1408
1409 #ifndef __putbit
1410 #define __putbit Ifx__putbit
1411 #endif
1412
1413 #ifndef __cacheawi
1414 #define __cacheawi Ifx__cacheawi
1415 #endif
1416
1417 #ifndef __cacheiwi
1418 #define __cacheiwi Ifx__cacheiwi
1419 #endif
1420
1421 #ifndef __cacheawi_bo_post_inc
1422 #define __cacheawi_bo_post_inc Ifx__cacheawi_bo_post_inc
1423 #endif
1424
1425 #ifndef __mulsc
1426 #define __mulsc Ifx__mulsc
1427 #endif
1428
1429 #ifndef __rol
1430 #define __rol Ifx__rol
1431 #endif
1432
1433 #ifndef __ror
1434 #define __ror Ifx__ror
1435 #endif
1436
1437 #ifndef __extractbyte1
1438 #define __extractbyte1 Ifx__extractbyte1
1439 #endif
1440
1441 #ifndef __extractbyte2
1442 #define __extractbyte2 Ifx__extractbyte2
1443 #endif
1444
1445 #ifndef __extractbyte3
1446 #define __extractbyte3 Ifx__extractbyte3
1447 #endif
1448
1449 #ifndef __extractbyte4
1450 #define __extractbyte4 Ifx__extractbyte4
1451 #endif
1452
1453 #ifndef __extracthw1
1454 #define __extracthw1 Ifx__extracthw1
1455 #endif
1456
1457 #ifndef __extracthw2
1458 #define __extracthw2 Ifx__extracthw2
1459 #endif
1460
1461 #ifndef __extractubyte1
1462 #define __extractubyte1 Ifx__extractubyte1
1463 #endif
1464
1465 #ifndef __extractubyte2
1466 #define __extractubyte2 Ifx__extractubyte2
1467 #endif
1468
1469 #ifndef __extractubyte3
1470 #define __extractubyte3 Ifx__extractubyte3
1471 #endif
1472
1473 #ifndef __extractubyte4
1474 #define __extractubyte4 Ifx__extractubyte4
1475 #endif
1476
1477 #ifndef __extractuhw1
1478 #define __extractuhw1 Ifx__extractuhw1
1479 #endif
1480
1481 #ifndef __extractuhw2
1482 #define __extractuhw2 Ifx__extractuhw2
1483 #endif
1484
1485 #ifndef __getbyte1
1486 #define __getbyte1 Ifx__getbyte1
1487 #endif
1488
1489 #ifndef __getbyte2
1490 #define __getbyte2 Ifx__getbyte2
1491 #endif
1492
1493 #ifndef __getbyte3
1494 #define __getbyte3 Ifx__getbyte3
1495 #endif
1496
1497 #ifndef __getbyte4
1498 #define __getbyte4 Ifx__getbyte4
1499 #endif
1500
1501 #ifndef __gethw1
1502 #define __gethw1 Ifx__gethw1
1503 #endif
1504
1505 #ifndef __gethw2
1506 #define __gethw2 Ifx__gethw2
1507 #endif
1508
1509 #ifndef __getubyte1
1510 #define __getubyte1 Ifx__getubyte1
1511 #endif
1512
1513 #ifndef __getubyte2
1514 #define __getubyte2 Ifx__getubyte2
1515 #endif
1516
1517 #ifndef __getubyte3
1518 #define __getubyte3 Ifx__getubyte3
1519 #endif
1520
1521 #ifndef __getubyte4
1522 #define __getubyte4 Ifx__getubyte4
1523 #endif
1524
1525 #ifndef __getuhw1
1526 #define __getuhw1 Ifx__getuhw1
1527 #endif
1528
1529 #ifndef __getuhw2
1530 #define __getuhw2 Ifx__getuhw2
1531 #endif
1532
1533 #ifndef __initpackb
1534 #define __initpackb Ifx__initpackb
1535 #endif
1536
1537 #ifndef __initpackbl
1538 #define __initpackbl Ifx__initpackbl
1539 #endif
1540
1541 #ifndef __initpackhw
1542 #define __initpackhw Ifx__initpackhw
1543 #endif
1544
1545 #ifndef __initpackhwl
1546 #define __initpackhwl Ifx__initpackhwl
1547 #endif
1548
1549 #ifndef __initupackb
1550 #define __initupackb Ifx__initupackb
1551 #endif
1552
1553 #ifndef __initupackhw
1554 #define __initupackhw Ifx__initupackhw
1555 #endif
1556
1557 #ifndef __insertbyte1
1558 #define __insertbyte1 Ifx__insertbyte1
1559 #endif
1560
1561 #ifndef __insertbyte2
1562 #define __insertbyte2 Ifx__insertbyte2
1563 #endif
1564
1565 #ifndef __insertbyte3
1566 #define __insertbyte3 Ifx__insertbyte3
1567 #endif
1568
1569 #ifndef __insertbyte4
1570 #define __insertbyte4 Ifx__insertbyte4
1571 #endif
1572
1573 #ifndef __insertubyte1
1574 #define __insertubyte1 Ifx__insertubyte1
1575 #endif
1576
1577 #ifndef __insertubyte2
1578 #define __insertubyte2 Ifx__insertubyte2
1579 #endif
1580
1581 #ifndef __insertubyte3
1582 #define __insertubyte3 Ifx__insertubyte3
1583 #endif
1584
1585 #ifndef __insertubyte4
1586 #define __insertubyte4 Ifx__insertubyte4
1587 #endif
1588
1589 #ifndef __inserthw1
1590 #define __inserthw1 Ifx__inserthw1
1591 #endif
1592
1593 #ifndef __inserthw2
1594 #define __inserthw2 Ifx__inserthw2
1595 #endif
1596
1597 #ifndef __insertuhw1
1598 #define __insertuhw1 Ifx__insertuhw1
1599 #endif
1600
1601 #ifndef __insertuhw2
1602 #define __insertuhw2 Ifx__insertuhw2
1603 #endif
1604
1605 #ifndef __setbyte1
1606 #define __setbyte1 Ifx__setbyte1
1607 #endif
1608
1609 #ifndef __setbyte2
1610 #define __setbyte2 Ifx__setbyte2
1611 #endif
1612
1613 #ifndef __setbyte3
1614 #define __setbyte3 Ifx__setbyte3
1615 #endif
1616
1617 #ifndef __setbyte4
1618 #define __setbyte4 Ifx__setbyte4
1619 #endif
1620
1621 #ifndef __sethw1
1622 #define __sethw1 Ifx__sethw1
1623 #endif
1624
1625 #ifndef __sethw2
1626 #define __sethw2 Ifx__sethw2
1627 #endif
1628
1629 #ifndef __setubyte1
1630 #define __setubyte1 Ifx__setubyte1
1631 #endif
1632
1633 #ifndef __setubyte2
1634 #define __setubyte2 Ifx__setubyte2
1635 #endif
1636
1637 #ifndef __setubyte3
1638 #define __setubyte3 Ifx__setubyte3
1639 #endif
1640
1641 #ifndef __setubyte4
1642 #define __setubyte4 Ifx__setubyte4
1643 #endif
1644
1645 #ifndef __setuhw1
1646 #define __setuhw1 Ifx__setuhw1
1647 #endif
1648
1649 #ifndef __setuhw2
1650 #define __setuhw2 Ifx__setuhw2
1651 #endif
1652
1653 #ifndef __ldmst
1654 #define __ldmst Ifx__ldmst
1655 #endif
1656
1657 #ifndef __nops
1658 #define __nops Ifx__nops
1659 #endif
1660
1661 #ifndef __swap
1662 #define __swap Ifx__swap
1663 #endif
1664
1665 #if ((!defined(NOP)) && (!defined(IFX_CFG_DISABLE_DEFAULT_INTRINSICS)))
1666 #define NOP Ifx__NOP
1667 #endif
1668
1669 #ifndef __setareg
1670 #define __setareg Ifx__setareg
1671 #endif
1672
1673 #ifndef __stopPerfCounters
1674 #define __stopPerfCounters Ifx__stopPerfCounters
1675 #endif
1676
1677 #ifndef __cmpAndSwap
1678 #define __cmpAndSwap Ifx__cmpAndSwap
1679 #endif
1680
1681 #ifndef __fixpoint_to_float32
1682 #define __fixpoint_to_float32 Ifx__fixpoint_to_float32
1683 #endif
1684
1685 #ifndef __getA11
1686 #define __getA11 Ifx__getA11
1687 #endif
1688
1689 #ifndef __setStackPointer
1690 #define __setStackPointer Ifx__setStackPointer
1691 #endif
1692
1693 #ifndef __popcnt
1694 #define __popcnt Ifx__popcnt
1695 #endif
1696
1697 #ifndef __cacheai
1698 #define __cacheai Ifx__cacheai
1699 #endif
1700
1701 #endif
1702 /******************************************************************************/
1703 /* *INDENT-ON* */
1704 /******************************************************************************/
1705 #endif /* IFXCPU_INTRINSICSGHS_H */
Ifx__ldmst
IFX_INLINE void Ifx__ldmst(volatile void *address, uint32 mask, uint32 value)
Definition: IfxCpu_IntrinsicsGhs.h:1046
Ifx__sethw2
IFX_INLINE void Ifx__sethw2(__packhw *a, sint16 b)
Definition: IfxCpu_IntrinsicsGhs.h:966
Ifx__inserthw2
IFX_INLINE __packhw Ifx__inserthw2(__packhw a, sint16 b)
Definition: IfxCpu_IntrinsicsGhs.h:886
Ifx__mulfractlong
IFX_INLINE long Ifx__mulfractlong(fract a, long b)
Definition: IfxCpu_IntrinsicsGhs.h:242
Ifx__inserthw1
IFX_INLINE __packhw Ifx__inserthw1(__packhw a, sint16 b)
Definition: IfxCpu_IntrinsicsGhs.h:876
Ifx__fract_to_sfract
#define Ifx__fract_to_sfract
Definition: IfxCpu_IntrinsicsGhs.h:261
Ifx__getubyte2
IFX_INLINE uint8 Ifx__getubyte2(__upackb *a)
Definition: IfxCpu_IntrinsicsGhs.h:683
Ifx__shafracts
IFX_INLINE fract Ifx__shafracts(fract a, sint32 b)
Definition: IfxCpu_IntrinsicsGhs.h:320
Ifx__extractbyte1
IFX_INLINE sint8 Ifx__extractbyte1(__packb a)
Definition: IfxCpu_IntrinsicsGhs.h:483
Ifx__mulsc
IFX_INLINE sint32 Ifx__mulsc(sint32 a, sint32 b, sint32 offset)
Definition: IfxCpu_IntrinsicsGhs.h:445
__packb
long __packb
Definition: Ifx_TypesDcc.h:47
Ifx__insertbyte4
IFX_INLINE __packb Ifx__insertbyte4(__packb a, sint8 b)
Definition: IfxCpu_IntrinsicsGhs.h:826
Ifx__setStackPointer
IFX_INLINE void Ifx__setStackPointer(void *stackAddr)
Definition: IfxCpu_IntrinsicsGhs.h:1141
Ifx__extractbyte3
IFX_INLINE sint8 Ifx__extractbyte3(__packb a)
Definition: IfxCpu_IntrinsicsGhs.h:503
Ifx__insertuhw2
IFX_INLINE __upackhw Ifx__insertuhw2(__upackhw a, uint16 b)
Definition: IfxCpu_IntrinsicsGhs.h:906
Ifx__initpackhwl
IFX_INLINE __packhw Ifx__initpackhwl(long a)
Definition: IfxCpu_IntrinsicsGhs.h:767
Ifx__insertubyte4
IFX_INLINE __upackb Ifx__insertubyte4(__upackb a, uint8 b)
Definition: IfxCpu_IntrinsicsGhs.h:866
Ifx__insertbyte1
IFX_INLINE __packb Ifx__insertbyte1(__packb a, sint8 b)
Definition: IfxCpu_IntrinsicsGhs.h:796
Ifx__setubyte3
IFX_INLINE void Ifx__setubyte3(__upackb *a, uint8 b)
Definition: IfxCpu_IntrinsicsGhs.h:996
Ifx__ror
IFX_INLINE uint32 Ifx__ror(uint32 operand, uint32 count)
Definition: IfxCpu_IntrinsicsGhs.h:465
sfract
short sfract
Definition: Ifx_TypesDcc.h:45
Ifx__jump_and_link
IFX_INLINE void Ifx__jump_and_link(void(*fun)(void))
Definition: IfxCpu_IntrinsicsGhs.h:64
Ifx__float_to_fract
IFX_INLINE fract Ifx__float_to_fract(float a)
Definition: IfxCpu_IntrinsicsGhs.h:193
Ifx__insertubyte3
IFX_INLINE __upackb Ifx__insertubyte3(__upackb a, uint8 b)
Definition: IfxCpu_IntrinsicsGhs.h:856
Ifx__insert
IFX_INLINE sint32 Ifx__insert(sint32 a, sint32 b, sint32 p, const sint32 w)
Definition: IfxCpu_IntrinsicsGhs.h:390
__asm__
#define __asm__
Definition: Ifx_TypesTasking.h:45
Ifx__gethw2
IFX_INLINE sint16 Ifx__gethw2(__packhw *a)
Definition: IfxCpu_IntrinsicsGhs.h:661
uint32
unsigned long uint32
Definition: Platform_Types.h:116
Ifx__extractuhw2
IFX_INLINE uint16 Ifx__extractuhw2(__upackhw a)
Definition: IfxCpu_IntrinsicsGhs.h:593
float32
float float32
Definition: Platform_Types.h:170
Ifx__getubyte1
IFX_INLINE uint8 Ifx__getubyte1(__upackb *a)
Definition: IfxCpu_IntrinsicsGhs.h:672
Ifx__jumpToFunctionWithLink
IFX_INLINE void Ifx__jumpToFunctionWithLink(void(*fun)(void))
Definition: IfxCpu_IntrinsicsGhs.h:96
IfxCpu_calculateCrc32
IFX_INLINE uint32 IfxCpu_calculateCrc32(uint32 *startaddress, uint8 length)
Definition: IfxCpu_IntrinsicsGhs.h:1146
__upackhw
unsigned long __upackhw
Definition: Ifx_TypesDcc.h:50
Ifx__mac_r_sf
IFX_INLINE sfract Ifx__mac_r_sf(sfract a, sfract b, sfract c)
Definition: IfxCpu_IntrinsicsGhs.h:211
Ifx__getDataParamRet
IFX_INLINE unsigned int Ifx__getDataParamRet(void)
Definition: IfxCpu_IntrinsicsGhs.h:79
Ifx__insertubyte2
IFX_INLINE __upackb Ifx__insertubyte2(__upackb a, uint8 b)
Definition: IfxCpu_IntrinsicsGhs.h:846
Ifx__extractbyte2
IFX_INLINE sint8 Ifx__extractbyte2(__packb a)
Definition: IfxCpu_IntrinsicsGhs.h:493
Ifx__moveToDataParamRet
IFX_INLINE void Ifx__moveToDataParamRet(unsigned int var)
Definition: IfxCpu_IntrinsicsGhs.h:74
Ifx__getbyte2
IFX_INLINE sint8 Ifx__getbyte2(__packb *a)
Definition: IfxCpu_IntrinsicsGhs.h:615
Ifx__insertbyte2
IFX_INLINE __packb Ifx__insertbyte2(__packb a, sint8 b)
Definition: IfxCpu_IntrinsicsGhs.h:806
Ifx__sethw1
IFX_INLINE void Ifx__sethw1(__packhw *a, sint16 b)
Definition: IfxCpu_IntrinsicsGhs.h:956
Ifx__non_return_call
#define Ifx__non_return_call(fun)
Definition: IfxCpu_IntrinsicsGhs.h:60
Ifx__u16_to_sfract
IFX_INLINE sfract Ifx__u16_to_sfract(uint16 a)
Definition: IfxCpu_IntrinsicsGhs.h:340
Ifx__fixpoint_to_float32
IFX_INLINE float32 Ifx__fixpoint_to_float32(fract value, sint32 shift)
Convert a fixpoint value to float32.
Definition: IfxCpu_IntrinsicsGhs.h:1126
Ifx__float_to_sfract
IFX_INLINE sfract Ifx__float_to_sfract(float a)
Definition: IfxCpu_IntrinsicsGhs.h:265
Ifx__initpackhw
IFX_INLINE __packhw Ifx__initpackhw(sint16 a, sint16 b)
Definition: IfxCpu_IntrinsicsGhs.h:757
Ifx__setbyte4
IFX_INLINE void Ifx__setbyte4(__packb *a, sint8 b)
Definition: IfxCpu_IntrinsicsGhs.h:946
Ifx__setbyte3
IFX_INLINE void Ifx__setbyte3(__packb *a, sint8 b)
Definition: IfxCpu_IntrinsicsGhs.h:936
sint16
short sint16
Definition: Platform_Types.h:129
Ifx__gethw1
IFX_INLINE sint16 Ifx__gethw1(__packhw *a)
Definition: IfxCpu_IntrinsicsGhs.h:651
Ifx__round16
IFX_INLINE sfract Ifx__round16(fract a)
Definition: IfxCpu_IntrinsicsGhs.h:251
Ifx__setubyte1
IFX_INLINE void Ifx__setubyte1(__upackb *a, uint8 b)
Definition: IfxCpu_IntrinsicsGhs.h:976
Ifx__sfract_to_u16
IFX_INLINE uint16 Ifx__sfract_to_u16(sfract a)
Definition: IfxCpu_IntrinsicsGhs.h:293
Ifx__initupackb
IFX_INLINE __upackb Ifx__initupackb(uint32 a, uint32 b, uint32 c, uint32 d)
Definition: IfxCpu_IntrinsicsGhs.h:774
Ifx__shasfracts
IFX_INLINE sfract Ifx__shasfracts(sfract a, sint32 b)
Definition: IfxCpu_IntrinsicsGhs.h:329
__packhw
long __packhw
Definition: Ifx_TypesDcc.h:49
Ifx__extractubyte4
IFX_INLINE uint8 Ifx__extractubyte4(__upackb a)
Definition: IfxCpu_IntrinsicsGhs.h:573
fract
long fract
Definition: Ifx_TypesDcc.h:44
Ifx__moveToAddrParam0
IFX_INLINE void Ifx__moveToAddrParam0(const void *var)
Definition: IfxCpu_IntrinsicsGhs.h:86
Ifx__getubyte4
IFX_INLINE uint8 Ifx__getubyte4(__upackb *a)
Definition: IfxCpu_IntrinsicsGhs.h:705
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
laccum
long long laccum
Definition: Ifx_TypesDcc.h:46
Ifx__cacheawi_bo_post_inc
IFX_INLINE uint8 * Ifx__cacheawi_bo_post_inc(uint8 *p)
Definition: IfxCpu_IntrinsicsGhs.h:435
Ifx__extractubyte3
IFX_INLINE uint8 Ifx__extractubyte3(__upackb a)
Definition: IfxCpu_IntrinsicsGhs.h:563
Ifx__getbyte3
IFX_INLINE sint8 Ifx__getbyte3(__packb *a)
Definition: IfxCpu_IntrinsicsGhs.h:627
Ifx__setubyte4
IFX_INLINE void Ifx__setubyte4(__upackb *a, uint8 b)
Definition: IfxCpu_IntrinsicsGhs.h:1006
IfxCpu_getRandomVal
IFX_INLINE uint32 IfxCpu_getRandomVal(uint32 a, uint32 x, uint32 m)
Definition: IfxCpu_IntrinsicsGhs.h:1158
Ifx__extractbyte4
IFX_INLINE sint8 Ifx__extractbyte4(__packb a)
Definition: IfxCpu_IntrinsicsGhs.h:513
Ifx__extractubyte2
IFX_INLINE uint8 Ifx__extractubyte2(__upackb a)
Definition: IfxCpu_IntrinsicsGhs.h:553
Ifx__jumpToFunction
IFX_INLINE void Ifx__jumpToFunction(void(*fun)(void))
Definition: IfxCpu_IntrinsicsGhs.h:91
__upackb
unsigned long __upackb
Definition: Ifx_TypesDcc.h:48
Ifx__extru
IFX_INLINE uint32 Ifx__extru(uint32 a, uint32 p, uint32 w)
Definition: IfxCpu_IntrinsicsGhs.h:369
Ifx__getA11
IFX_INLINE void * Ifx__getA11(void)
Definition: IfxCpu_IntrinsicsGhs.h:1134
Ifx__setbyte1
IFX_INLINE void Ifx__setbyte1(__packb *a, sint8 b)
Definition: IfxCpu_IntrinsicsGhs.h:916
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
Ifx__getbyte4
IFX_INLINE sint8 Ifx__getbyte4(__packb *a)
Definition: IfxCpu_IntrinsicsGhs.h:639
Ifx__shaaccum
__asm__ laccum Ifx__shaaccum(laccum a, sint32 b)
Definition: IfxCpu_IntrinsicsGhs.h:303
Ifx__cacheai
IFX_INLINE void Ifx__cacheai(uint8 *p)
Definition: IfxCpu_IntrinsicsGhs.h:1185
Ifx__insertubyte1
IFX_INLINE __upackb Ifx__insertubyte1(__upackb a, uint8 b)
Definition: IfxCpu_IntrinsicsGhs.h:836
Ifx__cacheawi
IFX_INLINE void Ifx__cacheawi(uint8 *p)
Definition: IfxCpu_IntrinsicsGhs.h:421
Ifx__jumpBackToLink
IFX_INLINE void Ifx__jumpBackToLink(void)
Definition: IfxCpu_IntrinsicsGhs.h:101
Ifx__swap
IFX_INLINE uint32 Ifx__swap(void *place, uint32 value)
Definition: IfxCpu_IntrinsicsGhs.h:1063
Ifx__s16_to_sfract
IFX_INLINE sfract Ifx__s16_to_sfract(sint16 a)
Definition: IfxCpu_IntrinsicsGhs.h:273
Ifx__getuhw2
IFX_INLINE uint16 Ifx__getuhw2(__upackhw *a)
Definition: IfxCpu_IntrinsicsGhs.h:727
Ifx__setuhw1
IFX_INLINE void Ifx__setuhw1(__upackhw *a, uint16 b)
Definition: IfxCpu_IntrinsicsGhs.h:1016
Ifx__cmpAndSwap
IFX_INLINE unsigned int Ifx__cmpAndSwap(unsigned int volatile *address, unsigned int value, unsigned int condition)
This function is a implementation of a binary semaphore using compare and swap instruction.
Definition: IfxCpu_IntrinsicsGhs.h:1102
Ifx__fract_to_float
IFX_INLINE float Ifx__fract_to_float(fract a)
Definition: IfxCpu_IntrinsicsGhs.h:184
uint16
unsigned short uint16
Definition: Platform_Types.h:112
Ifx__insertuhw1
IFX_INLINE __upackhw Ifx__insertuhw1(__upackhw a, uint16 b)
Definition: IfxCpu_IntrinsicsGhs.h:896
Ifx__extractubyte1
IFX_INLINE uint8 Ifx__extractubyte1(__upackb a)
Definition: IfxCpu_IntrinsicsGhs.h:543
Ifx__setuhw2
IFX_INLINE void Ifx__setuhw2(__upackhw *a, uint16 b)
Definition: IfxCpu_IntrinsicsGhs.h:1026
Ifx__getbyte1
IFX_INLINE sint8 Ifx__getbyte1(__packb *a)
Definition: IfxCpu_IntrinsicsGhs.h:603
Ifx__initpackbl
IFX_INLINE __packb Ifx__initpackbl(long a)
Definition: IfxCpu_IntrinsicsGhs.h:750
Ifx__initpackb
IFX_INLINE __packb Ifx__initpackb(sint32 a, sint32 b, sint32 c, sint32 d)
Definition: IfxCpu_IntrinsicsGhs.h:738
Ifx__clssf
IFX_INLINE sint16 Ifx__clssf(sfract a)
Definition: IfxCpu_IntrinsicsGhs.h:174
sint32
long sint32
Definition: Platform_Types.h:134
Ifx__extractuhw1
IFX_INLINE uint16 Ifx__extractuhw1(__upackhw a)
Definition: IfxCpu_IntrinsicsGhs.h:583
Ifx__mulfractfract
IFX_INLINE long Ifx__mulfractfract(fract a, fract b)
Definition: IfxCpu_IntrinsicsGhs.h:233
Ifx__setbyte2
IFX_INLINE void Ifx__setbyte2(__packb *a, sint8 b)
Definition: IfxCpu_IntrinsicsGhs.h:926
Ifx__extracthw2
IFX_INLINE sint16 Ifx__extracthw2(__packhw a)
Definition: IfxCpu_IntrinsicsGhs.h:533
Ifx__mac_sf
IFX_INLINE sfract Ifx__mac_sf(sfract a, sfract b, sfract c)
Definition: IfxCpu_IntrinsicsGhs.h:222
Ifx__extracthw1
IFX_INLINE sint16 Ifx__extracthw1(__packhw a)
Definition: IfxCpu_IntrinsicsGhs.h:523
Ifx__rol
IFX_INLINE uint32 Ifx__rol(uint32 operand, uint32 count)
Definition: IfxCpu_IntrinsicsGhs.h:456
Ifx__initupackhw
IFX_INLINE __upackhw Ifx__initupackhw(uint16 a, uint16 b)
Definition: IfxCpu_IntrinsicsGhs.h:786
Ifx__getfract
IFX_INLINE fract Ifx__getfract(laccum a)
Definition: IfxCpu_IntrinsicsGhs.h:202
Ifx__sfract_to_s16
IFX_INLINE sint16 Ifx__sfract_to_s16(sfract a)
Definition: IfxCpu_IntrinsicsGhs.h:283
Ifx__insertbyte3
IFX_INLINE __packb Ifx__insertbyte3(__packb a, sint8 b)
Definition: IfxCpu_IntrinsicsGhs.h:816
Ifx__cacheiwi
IFX_INLINE void Ifx__cacheiwi(uint8 *p)
Definition: IfxCpu_IntrinsicsGhs.h:427
uint8
unsigned char uint8
Definition: Platform_Types.h:108
Ifx__setubyte2
IFX_INLINE void Ifx__setubyte2(__upackb *a, uint8 b)
Definition: IfxCpu_IntrinsicsGhs.h:986
sint8
signed char sint8
Definition: Platform_Types.h:125
Ifx__getubyte3
IFX_INLINE uint8 Ifx__getubyte3(__upackb *a)
Definition: IfxCpu_IntrinsicsGhs.h:694
voidfunc
void(* voidfunc)()
Definition: IfxCpu_IntrinsicsGhs.h:56
Ifx__extr
IFX_INLINE sint32 Ifx__extr(sint32 a, uint32 p, uint32 w)
Definition: IfxCpu_IntrinsicsGhs.h:357
Ifx__nops
IFX_INLINE void Ifx__nops(void *cnt)
Definition: IfxCpu_IntrinsicsGhs.h:1054
Ifx__getuhw1
IFX_INLINE uint16 Ifx__getuhw1(__upackhw *a)
Definition: IfxCpu_IntrinsicsGhs.h:716
Ifx__stopPerfCounters
IFX_INLINE void Ifx__stopPerfCounters(void)
Definition: IfxCpu_IntrinsicsGhs.h:1088
Ifx__moveToDataParam0
IFX_INLINE void Ifx__moveToDataParam0(unsigned int var)
Definition: IfxCpu_IntrinsicsGhs.h:69


iLLD_TC38A: IfxCpu_IntrinsicsGnuc.h Source File

  • Cpu
  • Std
IfxCpu_IntrinsicsGnuc.h
Go to the documentation of this file.
1 /**
2 * \file IfxCpu_IntrinsicsGnuc.h
3 *
4 * \version iLLD_1_0_1_12_0
5 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
6 *
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 * \defgroup IfxLld_Cpu_Intrinsics_Gnuc Intrinsics for GNU compiler
41 * \ingroup IfxLld_Cpu_Intrinsics
42 *
43 */
44
45 #ifndef IFXCPU_INTRINSICSGNUC_H
46 #define IFXCPU_INTRINSICSGNUC_H
47
48 /* old style intrinsics handling for AGENtiX environment */
49 #if defined(SCTB_EMBEDDED)
50 # define IFXCPU_INTRINSICSGNUC_USE_MACHINE_INTRINSICS 0
51 #else
52 # define IFXCPU_INTRINSICSGNUC_USE_MACHINE_INTRINSICS 1
53 #endif
54
55 /******************************************************************************/
56 #include "Ifx_Types.h"
57
58 #if IFXCPU_INTRINSICSGNUC_USE_MACHINE_INTRINSICS
59 #include "machine/intrinsics.h"
60 #endif
61
62 /******************************************************************************/
63 /* *INDENT-OFF* */
64 #define STRINGIFY(x) #x
65
66 /** Function call without return
67 */
68 #define Ifx__non_return_call(fun) __asm__ volatile ("ji %0"::"a"(fun))
69
70 /** Jump and link
71 */
72 IFX_INLINE void Ifx__jump_and_link(void (*fun)(void))
73 {
74 __asm__ volatile ("jli %0"::"a"(fun));
75 }
76
77 IFX_INLINE void Ifx__moveToDataParam0(unsigned int var)
78 {
79 __asm__ volatile ("mov\t %%d4, %0"::"d"(var));
80 }
81
82 IFX_INLINE void Ifx__moveToDataParamRet(unsigned int var)
83 {
84 __asm__ volatile ("mov\t %%d2, %0"::"d"(var));
85 }
86
87 IFX_INLINE unsigned int Ifx__getDataParamRet(void)
88 {
89 unsigned int var;
90 __asm__ volatile (" mov\t %0, %%d2":"=d"(var));
91 return var;
92 }
93
94 IFX_INLINE void Ifx__moveToAddrParam0(const void *var)
95 {
96 __asm__ volatile ("mov.aa\t %%a4, %0"::"a"(var));
97 }
98
99 IFX_INLINE void Ifx__jumpToFunction(const void *fun)
100 {
101 Ifx__non_return_call(fun);
102 }
103
104 IFX_INLINE void Ifx__jumpToFunctionWithLink(const void *fun)
105 {
106 Ifx__jump_and_link((void (*)(void))fun);
107 }
108
109 IFX_INLINE void Ifx__jumpBackToLink(void)
110 {
111 __asm__ volatile ("ji %a11");
112 }
113 /** \defgroup IfxLld_Cpu_Intrinsics_Gnuc_any_type Cross type arithmetic operation
114 *
115 * Macro compatible with float, fix point, signed integer and unsigned integer
116 *
117 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
118 * \{
119 */
120 #define Ifx__minX(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
121 #define Ifx__maxX(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
122 #define Ifx__saturateX(X,Min,Max) ( Ifx__minX(Ifx__maxX(X, Min), Max) )
123 #define Ifx__checkrangeX(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
124 /** \} */
125
126 /** \defgroup IfxLld_Cpu_Intrinsics_Gnuc_singed_integer Signed integer operation
127 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
128 * \{
129 */
130 #define Ifx__saturate(X,Min,Max) ( Ifx__min(Ifx__max(X, Min), Max) )
131 /** \} */
132
133 /** \defgroup IfxLld_Cpu_Intrinsics_Gnuc_unsinged_integer Unsigned integer operation
134 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
135 * \{
136 */
137 #define Ifx__saturateu(X,Min,Max) ( Ifx__minu(Ifx__maxu(X, Min), Max) )
138 /** \} */
139
140 /** \defgroup IfxLld_Cpu_Intrinsics_Gnucmin_max Minimum and Maximum of (sint16) Integers
141 These intrinsic functions return the minimum or maximum of a sint16, uint16 or sint16
142 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
143 * \{
144 */
145
146 /** Return maximum of two integers
147 */
148 IFX_INLINE sint32 Ifx__max(sint32 a, sint32 b)
149 {
150 sint32 res;
151 __asm__ volatile ("max %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
152 return res;
153 }
154
155 /** Return maximum of two sint16
156 */
157 IFX_INLINE sint32 Ifx__maxs(sint16 a, sint16 b)
158 {
159 sint32 res;
160 __asm__ volatile ("max.h %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
161 return res;
162 }
163 /** Return maximum of two unsigned integers
164 */
165 IFX_INLINE uint32 Ifx__maxu(uint32 a, uint32 b)
166 {
167 uint32 res;
168 __asm__ volatile ("max.u %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
169 return res;
170 }
171
172 /** Return minimum of two integers
173 */
174 IFX_INLINE sint32 Ifx__min(sint32 a, sint32 b)
175 {
176 sint32 res;
177 __asm__ volatile ("min %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
178 return res;
179 }
180
181 /** Return minimum of two sint16
182 */
183 IFX_INLINE sint16 Ifx__mins(sint16 a, sint16 b)
184 {
185 sint16 res;
186 __asm__ volatile ("min.h %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
187 return res;
188 }
189
190 /** Return minimum of two unsigned integers
191 */
192 IFX_INLINE uint32 Ifx__minu(uint32 a, uint32 b)
193 {
194 uint32 res;
195 __asm__ volatile ("min.u %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
196 return res;
197 }
198
199 /** \} */
200
201 /** \defgroup intrinsicsgnuc_float Floating point operation
202 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
203 * \{
204 */
205
206 #define Ifx__sqrf(X) ((X) * (X))
207 #define Ifx__sqrtf(X) sqrtf(X)
208 #define Ifx__checkrange(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
209
210 #define Ifx__roundf(X) ((((X) - (sint32)(X)) > 0.5) ? (1 + (sint32)(X)) : ((sint32)(X)))
211 #define Ifx__absf(X) ( ((X) < 0.0) ? -(X) : (X) )
212 #define Ifx__minf(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
213 #define Ifx__maxf(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
214 #define Ifx__saturatef(X,Min,Max) ( Ifx__minf(Ifx__maxf(X, Min), Max) )
215 #define Ifx__checkrangef(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
216
217 #define Ifx__abs_stdreal(X) ( ((X) > 0.0) ? (X) : -(X) )
218 #define Ifx__min_stdreal(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
219 #define Ifx__max_stdreal(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
220 #define Ifx__saturate_stdreal(X,Min,Max) ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )
221
222 #define Ifx__neqf(X,Y) ( ((X) > (Y)) || ((X) < (Y)) ) /**< X != Y */
223 #define Ifx__leqf(X,Y) ( !((X) > (Y)) ) /**< X <= Y */
224 #define Ifx__geqf(X,Y) ( !((X) < (Y)) ) /**< X >= Y */
225 /** \} */
226
227 /** \defgroup IfxLld_Cpu_Intrinsics_Gnucfractional Fractional Arithmetic Support
228 The next table provides an overview of intrinsic functions to convert fractional values. Note that the
229 TASKING VX-toolset C compiler for TriCore fully supports the fractional type so normally you should not
230 need these intrinsic functions (except for __mulfractlong). For compatibility reasons the TASKING C
231 compiler does support these functions.
232 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
233 * \{
234 */
235
236 /** Count the consecutive number of bits that have the same value as bit 15 of an sfract
237 */
238 IFX_INLINE sint16 Ifx__clssf(sfract a)
239 {
240 sint16 res;
241 __asm__ volatile ("sh %1,%1,16 \n\
242 cls %0,%1":"=d"(res):"d"(a):"memory");
243 return res;
244 }
245
246 /** Convert fract to float
247 */
248 IFX_INLINE float Ifx__fract_to_float(fract a)
249 {
250 float res;
251 __asm__ volatile ("q31tof %0,%1,%2":"=d"(res):"d"(a), "d"(0):"memory");
252 return res;
253 }
254
255 /** Convert float to fract
256 */
257 IFX_INLINE fract Ifx__float_to_fract(float a)
258 {
259 fract res;
260 __asm__ volatile ("ftoq31 %0,%1,%2":"=d"(res):"d"(a), "d"(0):"memory");
261 return res;
262 }
263
264 /** Convert fract to sfract
265 */
266 IFX_INLINE sfract Ifx__fract_to_sfract(fract a)
267 {
268 sfract res;
269 __asm__ volatile ("mov.u %0,0x8000 \n\
270 adds %0,%1 \n\
271 extr %0,%0,0x10,0x10 "
272 :"=&d"(res):"d"(a):"memory");
273 return res;
274 }
275
276 /** Convert float to sfract
277 */
278 IFX_INLINE sfract Ifx__float_to_sfract(float a)
279 {
280 fract tmp = Ifx__float_to_fract(a);
281 return Ifx__fract_to_sfract(tmp);
282 }
283
284 /** Convert laccum to fract
285 */
286 IFX_INLINE fract Ifx__getfract(laccum a)
287 {
288 fract res;
289 __asm__ volatile ("dextr %0,%H1,%L1,0x11":"=&d" (res):"d" (a):"memory");
290 return res;
291 }
292
293 /** Multiply-add with rounding. Returns the rounded result of ( a + b * c )
294 */
295 IFX_INLINE sfract Ifx__mac_r_sf(sfract a, sfract b, sfract c)
296 {
297 sfract res;
298 __asm__ volatile ("sh %1,%1,16 \n\
299 maddrs.q %0,%1,%2L,%3L,1 \n\
300 sh %0,%0,-16":"=d"(res):"d"(a), "d"(b), "d"(c):"memory");
301 return res;
302 }
303
304 /** Multiply-add sfract. Returns ( a + b * c )
305 */
306 IFX_INLINE sfract Ifx__mac_sf(sfract a, sfract b, sfract c)
307 {
308 sfract res;
309 __asm__ volatile ("sh %1,%1,16 \n\
310 madds.q %0,%1,%2L,%3L,1 \n\
311 sh %0,%0,-16":"=d"(res):"d"(a), "d"(b), "d"(c):"memory");
312 return res;
313 }
314
315 /** Integer part of the multiplication of a fract and a fract
316 */
317 IFX_INLINE long Ifx__mulfractfract(fract a, fract b)
318 {
319 long res;
320 __asm__ volatile ("mul.q %0,%1,%2,1":"=d"(res):"d"(a), "d"(b):"memory");
321 return res;
322 }
323
324 /** Integer part of the multiplication of a fract and a long
325 */
326 IFX_INLINE long Ifx__mulfractlong(fract a, long b)
327 {
328 long res;
329 __asm__ volatile ("mul.q %0,%1,%2,1":"=d"(res):"d"(a), "d"(b):"memory");
330 return res;
331 }
332
333 /** Convert fract to sfract
334 */
335 IFX_INLINE sfract Ifx__round16(fract a)
336 {
337 sfract res;
338 __asm__ volatile ("mov.u %0,0x8000 \n\
339 adds %0,%1 \n\
340 insert %0,%0,0,0,0x10 \n\
341 sh %0,%0,-16"
342 :"=&d"(res):"d"(a):"memory");
343 return res;
344 }
345
346 /** Convert signed sint16 to sfract
347 */
348 IFX_INLINE sfract Ifx__s16_to_sfract(sint16 a)
349 {
350 sfract res;
351 __asm__ volatile ("sh %0,%1,16 \n\
352 sh %0,%1,-16":"=d"(res):"d"(a):"memory");
353 return res;
354 }
355
356 /** Convert sfract to sint16
357 */
358 IFX_INLINE sint16 Ifx__sfract_to_s16(sfract a)
359 {
360 sint16 res;
361 __asm__ volatile ("sh %1,%1,16 \n\
362 sh %0,%1,-16":"=d"(res):"d"(a):"memory");
363 return res;
364 }
365
366 /** Convert sfract to uint16
367 */
368 IFX_INLINE uint16 Ifx__sfract_to_u16(sfract a)
369 {
370 uint16 res;
371 __asm__ volatile ("sh %1,%1,16 \n\
372 sh %0,%1,-16":"=d"(res):"d"(a):"memory");
373 return res;
374 }
375
376 /** Left/right shift of an laccum
377 */
378 IFX_INLINE laccum Ifx__shaaccum(laccum a, sint32 b)
379 {
380 laccum res;
381 __asm__ volatile ("jge %2,0,0f \n\
382 sha %H0,%H1,%2 \n\
383 rsub %2,%2,0 \n\
384 dextr %L0,%H1,%L1,%2 \n\
385 j 1f \n\
386 0:dextr %H0,%H1,%L1,%2 \n\
387 sha %L0,%L1,%2 \n\
388 1:"
389 :"=d"(res):"d"(a), "d"(b):"memory");
390 return res;
391 }
392
393 /** Left/right shift of an fract
394 */
395 IFX_INLINE fract Ifx__shafracts(fract a, sint32 b)
396 {
397 fract res;
398 __asm__ volatile ("shas %0,%1,%2":"=d"(res):"d"(a), "d"(b):"memory");
399 return res;
400 }
401
402 /** Left/right shift of an sfract
403 */
404 IFX_INLINE sfract Ifx__shasfracts(sfract a, sint32 b)
405 {
406 sfract res;
407 __asm__ volatile ("shas %0,%1,%2":"=d"(res):"d"(a), "d"(b):"memory");
408 return res;
409 }
410
411 /** Convert uint16 to sfract
412 */
413 IFX_INLINE sfract Ifx__u16_to_sfract(uint16 a)
414 {
415 sfract res;
416 __asm__ volatile ("sh %0,%1,16 \n\
417 sh %0,%1,-16":"=d"(res):"d"(a):"memory");
418 return res;
419 }
420
421 /** \} */
422
423 /** \defgroup IfxLld_Cpu_Intrinsics_Gnucinsert Insert / Extract Bit-fields and Bits
424 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
425 * \{
426 */
427
428 /** Extract a bit-field (bit pos to bit pos+width) from value
429 */
430 IFX_INLINE sint32 Ifx__extr(sint32 a, uint32 p, uint32 w)
431 {
432 sint32 res;
433 __asm__ volatile ("mov %%d14,%2 \n\
434 mov %%d15,%3 \n\
435 extr %0,%1,%%e14"
436 : "=d" (res) : "d" (a), "d" (p), "d" (w):"d14", "d15");
437 return res;
438 }
439
440 /** Same as __extr() but return bit-field as unsigned integer
441 */
442 IFX_INLINE uint32 Ifx__extru(uint32 a, uint32 p, uint32 w)
443 {
444 uint32 res;
445 __asm__ volatile ("mov %%d14,%2 \n\
446 mov %%d15,%3 \n\
447 extr.u %0,%1,%%e14"
448 : "=d" (res) : "d" (a), "d" (p), "d" (w):"d14", "d15");
449 return res;
450 }
451
452 /** Load a single bit.
453 */
454 //#define __getbit(address,bitoffset ) __extru( *(address), bitoffset, 1 )
455 #define Ifx__getbit(address, bitoffset) ((*(address) & (1U << (bitoffset))) != 0)
456
457 /** Atomic load-modify-store.
458 */
459 #define Ifx__imaskldmst(address, value, bitoffset, bits) \
460 {long long tmp;\
461 __asm__("imask %A0,%1,%2,%3"\
462 :"=d"((long long)tmp)\
463 :"d"(value),"d"(bitoffset),"i"(bits): "memory");\
464 __asm__("ldmst [%0]0,%A1"::"a"(address),"d"(tmp): "memory");}
465
466 /** Return trg but replace trgbit by srcbit in src.
467 */
468 IFX_INLINE sint32 Ifx__ins(sint32 trg, const sint32 trgbit, sint32 src, const sint32 srcbit)
469 {
470 sint32 res;
471 __asm__ volatile ("ins.t %0,%1,%2,%3,%4":"=d"(res):"d"(trg), "i"(trgbit), "d"(src), "i"(srcbit));
472 return res;
473 }
474
475 /** Extract bit-field (width bits starting at bit 0) from src and insert it in trg at pos.
476 */
477 IFX_INLINE sint32 Ifx__insert(sint32 a, sint32 b, sint32 p, const sint32 w)
478 {
479 sint32 res;
480 __asm__ volatile ("mov %%d14,%3 \n\
481 mov %%d15,%4 \n\
482 insert %0,%1,%2,%%e14"
483 :"=d"(res):"d"(a), "d"(b), "d"(p), "d"(w):"d14", "d15");
484 return res;
485 }
486
487 /** Return trg but replace trgbit by inverse of srcbit in src.
488 */
489 IFX_INLINE sint32 Ifx__insn(sint32 trg, const sint32 trgbit, sint32 src, const sint32 srcbit)
490 {
491 sint32 res;
492 __asm__ volatile ("insn.t %0,%1,%2,%3,%4":"=d"(res):"d"(trg), "i"(trgbit), "d"(src), "i"(srcbit));
493 return res;
494 }
495
496 /** Store a single bit.
497 */
498 #define Ifx__putbit(value,address,bitoffset ) Ifx__imaskldmst(address, value, bitoffset,1)
499
500 /** \} */
501
502 /** \defgroup IfxLld_Cpu_Intrinsics_Gnucinterrupt_handling Interrupt Handling
503 The next table provides an overview of the intrinsic functions to read or set interrupt handling.
504 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
505 * \{
506 */
507
508 #if !IFXCPU_INTRINSICSGNUC_USE_MACHINE_INTRINSICS
509 /** Set CPU priority number [0..255] (or [0..1023] for TriCore 1.6.x) and enable interrupts immediately at function entry
510 */
511 #define Ifx__bisr(intlvl) __asm__ volatile ("bisr "#intlvl : : : "memory")
512 #endif
513
514 /** Disable interrupts. Only supported for TriCore1
515 */
516 #define Ifx__disable() __asm__ volatile ("disable" : : : "memory")
517
518 /** Disable interrupts and return previous interrupt state (enabled or disabled). Direct supported for TriCore1.6. Emulated on TC1.3.1
519 */
520 IFX_INLINE sint32 Ifx__disable_and_save(void)
521 {
522 sint32 res;
523 __asm__ volatile("disable %0":"=d"(res));
524 return res;
525 }
526
527 /** Enable interrupts immediately at function entry
528 */
529 #define Ifx__enable() __asm__ volatile ("enable" : : : "memory")
530
531 /** Restore interrupt state. Direct supported for TriCore1.6. Emulated on TC1.3.1
532 */
533 IFX_INLINE void Ifx__restore(sint32 ie)
534 {
535 __asm__ volatile ("restore %0"::"d"(ie));
536 }
537
538 #if !IFXCPU_INTRINSICSGNUC_USE_MACHINE_INTRINSICS
539 /** Call a system call function number
540 */
541 #define Ifx__syscall(svcno) __tric_syscall(svcno)
542 #define Ifx__tric_syscall(svcno) __asm__ volatile ("syscall "STRINGIFY(svcno) : : : "memory")
543 #endif
544
545 /** \} */
546
547 /** \defgroup IfxLld_Cpu_Intrinsics_Gnucmiscellaneous Miscellaneous Intrinsic Functions
548 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
549 * \{
550 */
551
552 /** Write back and invalidate cache address "p". Generates CACHEA.WI [Ab].
553 */
554 IFX_INLINE void Ifx__cacheawi(uint8* p)
555 {
556 __asm__ volatile("cachea.wi [%0]0"::"a"(p));
557 }
558 /** Write back and invalidate cache index "p". Generates CACHEI.WI [Ab].
559 */
560 IFX_INLINE void Ifx__cacheiwi(uint8* p)
561 {
562 __asm__ volatile("cachei.wi [%0]0"::"a"(p));
563 }
564
565 /** Write back and invalidate cache address \"p\" and return post incremented
566 * value of \"p\". Generates CACHEA.WI [Ab+].
567 */
568 IFX_INLINE uint8* Ifx__cacheawi_bo_post_inc(uint8* p)
569 {
570 __asm__ volatile("cachea.wi [%0+]0"::"a"(p));
571 return p;
572 }
573
574 /** Multiply two 32-bit numbers to an intermediate 64-bit result, and scale
575 * back the result to 32 bits. To scale back the result, 32 bits are extracted
576 * from the intermediate 64-bit result: bit 63-offset to bit 31-offset.
577 */
578 IFX_INLINE sint32 Ifx__mulsc(sint32 a, sint32 b, sint32 offset)
579 {
580 sint32 res;
581 __asm__ volatile("mul %%e12,%1,%2 \n\
582 dextr %0,%%d13,%%d12,%3"
583 :"=d"(res):"d"(a), "d"(b), "d"(offset):"d12", "d13");
584 return res;
585 }
586
587 /** Rotate operand left count times. The bits that are shifted out are inserted at the right side (bit 31 is shifted to bit 0).
588 */
589 IFX_INLINE uint32 Ifx__rol(uint32 operand, uint32 count)
590 {
591 uint32 res;
592 __asm__ volatile("dextr %0,%1,%1,%2":"=d"(res):"d"(operand), "d"(count):"memory");
593 return res;
594 }
595
596 /** Rotate operand right count times. The bits that are shifted out are inserted at the left side (bit 0 is shifted to bit 31).
597 */
598 IFX_INLINE uint32 Ifx__ror(uint32 operand, uint32 count)
599 {
600 uint32 res;
601 __asm__ volatile("rsub %2,%2,0 \n\
602 dextr %0,%1,%1,%2"
603 :"=d"(res):"d"(operand), "d"(count):"memory");
604 return res;
605 }
606 /** \} */
607
608 /** \defgroup IfxLld_Cpu_Intrinsics_Gnucpacked Packed Data Type Support
609 The next table provides an overview of the intrinsic functions for initialization of packed data type.
610 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
611 * \{
612 */
613
614 /** Absolute value of __packb
615 */
616 IFX_INLINE __packb Ifx__absb(__packb a)
617 {
618 __packb res;
619 __asm__ volatile ("abs.b %0,%1"
620 :"=d"(res):"d"(a):"memory");
621 return res;
622 }
623
624 /** Absolute value of __packhw
625 */
626 IFX_INLINE __packhw Ifx__absh(__packhw a)
627 {
628 __packhw res;
629 __asm__ volatile ("abs.h %0,%1"
630 :"=d"(res):"d"(a):"memory");
631 return res;
632 }
633
634 /** Absolute value of __packhw using saturation
635 */
636 IFX_INLINE __packhw Ifx__abssh(__packhw a)
637 {
638 __packb res;
639 __asm__ volatile ("abss.h %0,%1"
640 :"=d"(res):"d"(a):"memory");
641 return res;
642 }
643
644 /** Extract first byte from a __packb
645 */
646 IFX_INLINE sint8 Ifx__extractbyte1(__packb a)
647 {
648 sint8 res;
649 __asm__ volatile ("extr %0,%1,0,8"
650 :"=d"(res):"d"(a):"memory");
651 return res;
652 }
653
654 /** Extract second byte from a __packb
655 */
656 IFX_INLINE sint8 Ifx__extractbyte2(__packb a)
657 {
658 sint8 res;
659 __asm__ volatile ("extr %0,%1,8,8"
660 :"=d"(res):"d"(a):"memory");
661 return res;
662 }
663
664 /** Extract third byte from a __packb
665 */
666 IFX_INLINE sint8 Ifx__extractbyte3(__packb a)
667 {
668 sint8 res;
669 __asm__ volatile ("extr %0,%1,16,8"
670 :"=d"(res):"d"(a):"memory");
671 return res;
672 }
673
674 /** Extract fourth byte from a __packb
675 */
676 IFX_INLINE sint8 Ifx__extractbyte4(__packb a)
677 {
678 sint8 res;
679 __asm__ volatile ("extr %0,%1,24,8"
680 :"=d"(res):"d"(a):"memory");
681 return res;
682 }
683
684 /** Extract first sint16 from a __packhw
685 */
686 IFX_INLINE sint16 Ifx__extracthw1(__packhw a)
687 {
688 sint16 res;
689 __asm__ volatile ("extr %0,%1,0,16"
690 :"=d"(res):"d"(a):"memory");
691 return res;
692 }
693
694 /** Extract second sint16 from a __packhw
695 */
696 IFX_INLINE sint16 Ifx__extracthw2(__packhw a)
697 {
698 sint16 res;
699 __asm__ volatile ("extr %0,%1,16,16"
700 :"=d"(res):"d"(a):"memory");
701 return res;
702 }
703
704 /** Extract first uint8 from a __packb
705 */
706 IFX_INLINE uint8 Ifx__extractubyte1(__upackb a)
707 {
708 uint8 res;
709 __asm__ volatile ("extr %0,%1,0,8"
710 :"=d"(res):"d"(a):"memory");
711 return res;
712 }
713
714 /** Extract second uint8 from a __packb
715 */
716 IFX_INLINE uint8 Ifx__extractubyte2(__upackb a)
717 {
718 uint8 res;
719 __asm__ volatile ("extr %0,%1,8,8"
720 :"=d"(res):"d"(a):"memory");
721 return res;
722 }
723
724 /** Extract third uint8 from a __packb
725 */
726 IFX_INLINE uint8 Ifx__extractubyte3(__upackb a)
727 {
728 uint8 res;
729 __asm__ volatile ("extr %0,%1,16,8"
730 :"=d"(res):"d"(a):"memory");
731 return res;
732 }
733
734 /** Extract fourth uint8 from a __packb
735 */
736 IFX_INLINE uint8 Ifx__extractubyte4(__upackb a)
737 {
738 uint8 res;
739 __asm__ volatile ("extr %0,%1,24,8"
740 :"=d"(res):"d"(a):"memory");
741 return res;
742 }
743
744 /** Extract first uint16 from a __packhw
745 */
746 IFX_INLINE uint16 Ifx__extractuhw1(__upackhw a)
747 {
748 uint16 res;
749 __asm__ volatile ("extr %0,%1,0,16"
750 :"=d"(res):"d"(a):"memory");
751 return res;
752 }
753
754 /** Extract second uint16 from a __packhw
755 */
756 IFX_INLINE uint16 Ifx__extractuhw2(__upackhw a)
757 {
758 uint16 res;
759 __asm__ volatile ("extr %0,%1,16,16"
760 :"=d"(res):"d"(a):"memory");
761 return res;
762 }
763
764 /** Extract first byte from a __packb
765 */
766 IFX_INLINE sint8 Ifx__getbyte1(__packb* a)
767 {
768 sint8 res;
769 __asm__ volatile ("ld.w %0,[%1]0 \n\
770 extr %0,%0,0,8"
771 :"=d"(res):"a"(a):"memory");
772 return res;
773
774 }
775
776 /** Extract second byte from a __packb
777 */
778 IFX_INLINE sint8 Ifx__getbyte2(__packb* a)
779 {
780 sint8 res;
781 __asm__ volatile ("ld.w %0,[%1]0 \n\
782 extr %0,%0,8,8"
783 :"=d"(res):"a"(a):"memory");
784 return res;
785
786 }
787
788 /** Extract third byte from a __packb
789 */
790 IFX_INLINE sint8 Ifx__getbyte3(__packb* a)
791 {
792 sint8 res;
793 __asm__ volatile ("ld.w %0,[%1]0 \n\
794 extr %0,%0,16,8"
795 :"=d"(res):"a"(a):"memory");
796 return res;
797
798 }
799
800 /** Extract fourth byte from a __packb
801 */
802 IFX_INLINE sint8 Ifx__getbyte4(__packb* a)
803 {
804 sint8 res;
805 __asm__ volatile ("ld.w %0,[%1]0 \n\
806 extr %0,%0,24,8"
807 :"=d"(res):"a"(a):"memory");
808 return res;
809
810 }
811
812 /** Extract first sint16 from a __packhw
813 */
814 IFX_INLINE sint16 Ifx__gethw1(__packhw* a)
815 {
816 sint16 res;
817 __asm__ volatile ("ld.w %0,[%1]0 \n\
818 extr %0,%0,0,16"
819 :"=d"(res):"a"(a):"memory");
820 return res;
821 }
822 /** Extract second sint16 from a __packhw
823 */
824 IFX_INLINE sint16 Ifx__gethw2(__packhw* a)
825 {
826 sint16 res;
827 __asm__ volatile ("ld.w %0,[%1]0 \n\
828 extr %0,%0,16,16"
829 :"=d"(res):"a"(a):"memory");
830 return res;
831 }
832
833 /** Extract first uint8 from a __packb
834 */
835 IFX_INLINE uint8 Ifx__getubyte1(__upackb* a)
836 {
837 uint8 res;
838 __asm__ volatile ("ld.w %0,[%1]0 \n\
839 extr %0,%0,0,8"
840 :"=d"(res):"a"(a):"memory");
841 return res;
842 }
843
844 /** Extract second uint8 from a __packb
845 */
846 IFX_INLINE uint8 Ifx__getubyte2(__upackb* a)
847 {
848 uint8 res;
849 __asm__ volatile ("ld.w %0,[%1]0 \n\
850 extr %0,%0,8,8"
851 :"=d"(res):"a"(a):"memory");
852 return res;
853 }
854
855 /** Extract third uint8 from a __packb
856 */
857 IFX_INLINE uint8 Ifx__getubyte3(__upackb* a)
858 {
859 uint8 res;
860 __asm__ volatile ("ld.w %0,[%1]0 \n\
861 extr %0,%0,16,8"
862 :"=d"(res):"a"(a):"memory");
863 return res;
864 }
865
866 /** Extract fourth uint8 from a __packb
867 */
868 IFX_INLINE uint8 Ifx__getubyte4(__upackb* a)
869 {
870 uint8 res;
871 __asm__ volatile ("ld.w %0,[%1]0 \n\
872 extr %0,%0,24,8"
873 :"=d"(res):"a"(a):"memory");
874 return res;
875 }
876
877 /** Extract first uint16 from a __packhw
878 */
879 IFX_INLINE uint16 Ifx__getuhw1(__upackhw* a)
880 {
881 uint16 res;
882 __asm__ volatile ("ld.w %0,[%1]0 \n\
883 extr %0,%0,0,16"
884 :"=d"(res):"a"(a):"memory");
885 return res;
886 }
887
888 /** Extract second uint16 from a __packhw
889 */
890 IFX_INLINE uint16 Ifx__getuhw2(__upackhw* a)
891 {
892 uint16 res;
893 __asm__ volatile ("ld.w %0,[%1]0 \n\
894 extr %0,%0,16,16"
895 :"=d"(res):"a"(a):"memory");
896 return res;
897 }
898
899 /** Initialize __packb with four integers
900 */
901 IFX_INLINE __packb Ifx__initpackb(sint32 a, sint32 b, sint32 c, sint32 d)
902 {
903 __packb res;
904 __asm__ volatile ("insert %3,%3,%4,8,8 \n\
905 insert %4,%1,%2,8,8 \n\
906 insert %0,%4,%3,16,16 "
907 :"=d"(res):"d"(a), "d"(b), "d"(c), "d"(d):"memory");
908 return res;
909 }
910
911 /** Initialize __packb with a long integer
912 */
913 IFX_INLINE __packb Ifx__initpackbl(long a)
914 {
915 return (__packb) a;
916 }
917
918 /** Initialize __packhw with two integers
919 */
920 IFX_INLINE __packhw Ifx__initpackhw(sint16 a, sint16 b)
921 {
922 __packhw res;
923 __asm__ volatile ("insert %0,%1,%2,16,16"
924 :"=d"(res):"d"(a), "d"(b):"memory");
925 return res;
926 }
927
928 /** Initialize __packhw with a long integer
929 */
930 IFX_INLINE __packhw Ifx__initpackhwl(long a)
931 {
932 return a;
933 }
934
935 /** Initialize __packb with four unsigned integers
936 */
937 IFX_INLINE __upackb Ifx__initupackb( uint32 a, uint32 b, uint32 c, uint32 d)
938 {
939 __upackb res;
940 __asm__ volatile ("insert %3,%3,%4,8,8 \n\
941 insert %1,%1,%2,8,8 \n\
942 insert %0,%1,%3,16,16"
943 :"=d"(res):"d"(a), "d"(b), "d"(c), "d"(d):"memory");
944 return res;
945 }
946
947 /** Initialize __packhw with two unsigned integers
948 */
949 IFX_INLINE __upackhw Ifx__initupackhw( uint16 a, uint16 b)
950 {
951 __upackhw res;
952 __asm__ volatile ("insert %0,%1,%2,16,16"
953 :"=d"(res):"d"(a), "d"(b):"memory");
954 return res;
955 }
956
957 /** Insert sint8 into first byte of a __packb
958 */
959 IFX_INLINE __packb Ifx__insertbyte1(__packb a, sint8 b)
960 {
961 __packb res;
962 __asm__ volatile ("insert %0,%1,%2,0,8"
963 :"=d"(res):"d"(a), "d"(b):"memory");
964 return res;
965 }
966
967 /** Insert sint8 into second byte of a __packb
968 */
969 IFX_INLINE __packb Ifx__insertbyte2(__packb a, sint8 b)
970 {
971 __packb res;
972 __asm__ volatile ("insert %0,%1,%2,8,8"
973 :"=d"(res):"d"(a), "d"(b):"memory");
974 return res;
975 }
976
977 /** Insert sint8 into third byte of a __packb
978 */
979 IFX_INLINE __packb Ifx__insertbyte3(__packb a, sint8 b)
980 {
981 __packb res;
982 __asm__ volatile ("insert %0,%1,%2,16,8"
983 :"=d"(res):"d"(a), "d"(b):"memory");
984 return res;
985 }
986
987 /** Insert sint8 into fourth byte of a __packb
988 */
989 IFX_INLINE __packb Ifx__insertbyte4(__packb a, sint8 b)
990 {
991 __packb res;
992 __asm__ volatile ("insert %0,%1,%2,24,8"
993 :"=d"(res):"d"(a), "d"(b):"memory");
994 return res;
995 }
996
997 /** Insert sint8 into first uint8 of a __packb
998 */
999 IFX_INLINE __upackb Ifx__insertubyte1( __upackb a, uint8 b)
1000 {
1001 __upackb res;
1002 __asm__ volatile ("insert %0,%1,%2,0,8"
1003 :"=d"(res):"d"(a), "d"(b):"memory");
1004 return res;
1005 }
1006
1007 /** Insert sint8 into second uint8 of a __packb
1008 */
1009 IFX_INLINE __upackb Ifx__insertubyte2( __upackb a, uint8 b)
1010 {
1011 __upackb res;
1012 __asm__ volatile ("insert %0,%1,%2,8,8"
1013 :"=d"(res):"d"(a), "d"(b):"memory");
1014 return res;
1015 }
1016
1017 /** Insert sint8 into third uint8 of a __packb
1018 */
1019 IFX_INLINE __upackb Ifx__insertubyte3( __upackb a, uint8 b)
1020 {
1021 __upackb res;
1022 __asm__ volatile ("insert %0,%1,%2,16,8"
1023 :"=d"(res):"d"(a), "d"(b):"memory");
1024 return res;
1025 }
1026
1027 /** Insert sint8 into fourth uint8 of a __packb
1028 */
1029 IFX_INLINE __upackb Ifx__insertubyte4( __upackb a, uint8 b)
1030 {
1031 __upackb res;
1032 __asm__ volatile ("insert %0,%1,%2,24,8"
1033 :"=d"(res):"d"(a), "d"(b):"memory");
1034 return res;
1035 }
1036
1037 /** Insert sint16 into first halfword of a __packhw
1038 */
1039 IFX_INLINE __packhw Ifx__inserthw1(__packhw a, sint16 b)
1040 {
1041 __packhw res;
1042 __asm__ volatile ("insert %0,%1,%2,0,16"
1043 :"=d"(res):"d"(a), "d"(b):"memory");
1044 return res;
1045 }
1046
1047 /** Insert sint16 into second halfword of a __packhw
1048 */
1049 IFX_INLINE __packhw Ifx__inserthw2(__packhw a, sint16 b)
1050 {
1051 __packhw res;
1052 __asm__ volatile ("insert %0,%1,%2,16,16"
1053 :"=d"(res):"d"(a), "d"(b):"memory");
1054 return res;
1055 }
1056
1057 /** Insert uint16 into first halfword of a __upackhw
1058 */
1059 IFX_INLINE __upackhw Ifx__insertuhw1( __upackhw a, uint16 b)
1060 {
1061 __upackhw res;
1062 __asm__ volatile ("insert %0,%1,%2,0,16"
1063 :"=d"(res):"d"(a), "d"(b):"memory");
1064 return res;
1065 }
1066
1067 /** Insert uint16 into second halfword of a __upackhw
1068 */
1069 IFX_INLINE __upackhw Ifx__insertuhw2( __upackhw a, uint16 b)
1070 {
1071 __upackhw res;
1072 __asm__ volatile ("insert %0,%1,%2,16,16"
1073 :"=d"(res):"d"(a), "d"(b):"memory");
1074 return res;
1075 }
1076
1077 /** Minimum of two __packb values
1078 */
1079 IFX_INLINE __packb Ifx__minb(__packb a, __packb b)
1080 {
1081 __packb res;
1082 __asm__ volatile ("min.b %0,%1,%2"
1083 :"=d"(res):"d"(a), "d"(b):"memory");
1084 return res;
1085 }
1086
1087 /** Minimum of two __upackb values
1088 */
1089 IFX_INLINE __upackb Ifx__minbu( __upackb a, __upackb b)
1090 {
1091 __upackb res;
1092 __asm__ volatile ("min.bu %0,%1,%2"
1093 :"=d"(res):"d"(a), "d"(b):"memory");
1094 return res;
1095 }
1096
1097 /** Minimum of two __packhw values
1098 */
1099 IFX_INLINE __packhw Ifx__minh(__packhw a, __packhw b)
1100 {
1101 __packhw res;
1102 __asm__ volatile ("min.h %0,%1,%2"
1103 :"=d"(res):"d"(a), "d"(b):"memory");
1104 return res;
1105 }
1106
1107 /** Minimum of two __upackhw values
1108 */
1109 IFX_INLINE __upackhw Ifx__minhu( __upackhw a, __upackhw b)
1110 {
1111 __upackhw res;
1112 __asm__ volatile ("min.hu %0,%1,%2"
1113 :"=d"(res):"d"(a), "d"(b):"memory");
1114 return res;
1115 }
1116
1117 /** Insert sint8 into first byte of a __packb
1118 */
1119 IFX_INLINE void Ifx__setbyte1(__packb* a, sint8 b)
1120 {
1121 __asm__ volatile ("ld.w %%d15,[%0] \n\
1122 insert %%d15,%%d15,%1,0,8 \n\
1123 st.w [%0],%%d15"
1124 ::"a"(a), "d"(b):"d15", "memory");
1125 }
1126
1127 /** Insert sint8 into second byte of a __packb
1128 */
1129 IFX_INLINE void Ifx__setbyte2(__packb* a, sint8 b)
1130 {
1131 __asm__ volatile ("ld.w %%d15,[%0] \n\
1132 insert %%d15,%%d15,%1,8,8 \n\
1133 st.w [%0],%%d15"
1134 ::"a"(a), "d"(b):"d15", "memory");
1135 }
1136
1137 /** Insert sint8 into third byte of a __packb
1138 */
1139 IFX_INLINE void Ifx__setbyte3(__packb* a, sint8 b)
1140 {
1141 __asm__ volatile ("ld.w %%d15,[%0] \n\
1142 insert %%d15,%%d15,%1,16,8 \n\
1143 st.w [%0],%%d15"
1144 ::"a"(a), "d"(b):"d15", "memory");
1145 }
1146
1147 /** Insert sint8 into fourth byte of a __packb
1148 */
1149 IFX_INLINE void Ifx__setbyte4(__packb* a, sint8 b)
1150 {
1151 __asm__ volatile ("ld.w %%d15,[%0] \n\
1152 insert %%d15,%%d15,%1,24,8 \n\
1153 st.w [%0],%%d15"
1154 ::"a"(a), "d"(b):"d15", "memory");
1155 }
1156
1157 /** Insert sint16 into first halfword of a __packhw
1158 */
1159 IFX_INLINE void Ifx__sethw1(__packhw* a, sint16 b)
1160 {
1161 __asm__ volatile ("ld.w %%d15,[%0] \n\
1162 insert %%d15,%%d15,%1,0,16 \n\
1163 st.w [%0],%%d15"
1164 ::"a"(a), "d"(b):"d15", "memory");
1165 }
1166
1167 /** Insert sint16 into second halfword of a __packhw
1168 */
1169 IFX_INLINE void Ifx__sethw2(__packhw* a, sint16 b)
1170 {
1171 __asm__ volatile ("ld.w %%d15,[%0] \n\
1172 insert %%d15,%%d15,%1,16,16 \n\
1173 st.w [%0],%%d15"
1174 ::"a"(a), "d"(b):"d15", "memory");
1175 }
1176
1177 /** Insert uint8 into first byte of a __upackb
1178 */
1179 IFX_INLINE void Ifx__setubyte1(__upackb* a, uint8 b)
1180 {
1181 __asm__ volatile ("ld.w %%d15,[%0] \n\
1182 insert %%d15,%%d15,%1,0,8 \n\
1183 st.w [%0],%%d15"
1184 ::"a"(a), "d"(b):"d15", "memory");
1185 }
1186
1187 /** Insert uint8 into second byte of a __upackb
1188 */
1189 IFX_INLINE void Ifx__setubyte2(__upackb* a, uint8 b)
1190 {
1191 __asm__ volatile ("ld.w %%d15,[%0] \n\
1192 insert %%d15,%%d15,%1,8,8 \n\
1193 st.w [%0],%%d15"
1194 ::"a"(a), "d"(b):"d15", "memory");
1195 }
1196
1197 /** Insert uint8 into third byte of a __upackb
1198 */
1199 IFX_INLINE void Ifx__setubyte3(__upackb* a, uint8 b)
1200 {
1201 __asm__ volatile ("ld.w %%d15,[%0] \n\
1202 insert %%d15,%%d15,%1,16,8 \n\
1203 st.w [%0],%%d15"
1204 ::"a"(a), "d"(b):"d15", "memory");
1205 }
1206
1207 /** Insert uint8 into fourth byte of a __upackb
1208 */
1209 IFX_INLINE void Ifx__setubyte4(__upackb* a, uint8 b)
1210 {
1211 __asm__ volatile ("ld.w %%d15,[%0] \n\
1212 insert %%d15,%%d15,%1,24,8 \n\
1213 st.w [%0],%%d15"
1214 ::"a"(a), "d"(b):"d15", "memory");
1215 }
1216
1217 /** Insert uint16 into first halfword of a __upackhw
1218 */
1219 IFX_INLINE void Ifx__setuhw1(__upackhw* a, uint16 b)
1220 {
1221 __asm__ volatile ("ld.w %%d15,[%0] \n\
1222 insert %%d15,%%d15,%1,0,16 \n\
1223 st.w [%0],%%d15"
1224 ::"a"(a), "d"(b):"d15", "memory");
1225 }
1226
1227 /** Insert uint16 into second halfword of a __upackhw
1228 */
1229 IFX_INLINE void Ifx__setuhw2(__upackhw* a, uint16 b)
1230 {
1231 __asm__ volatile ("ld.w %%d15,[%0] \n\
1232 insert %%d15,%%d15,%1,16,16 \n\
1233 st.w [%0],%%d15"
1234 ::"a"(a), "d"(b):"d15", "memory");
1235 }
1236
1237 /** \} */
1238
1239 /** \defgroup IfxLld_Cpu_Intrinsics_Gnucregister Register Handling
1240 The next table provides an overview of the intrinsic functions that you can use to access control registers.
1241 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
1242 * \{
1243 */
1244
1245 /** Return absolute value
1246 */
1247 #define Ifx__abs(a) __builtin_abs(a)
1248
1249 /** Return absolue difference of two integers
1250 */
1251 IFX_INLINE sint32 Ifx__absdif(sint32 a, sint32 b)
1252 {
1253 sint32 res;
1254 __asm__ volatile ("absdif %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
1255 return res;
1256 }
1257
1258 /** Return absolute value with saturation
1259 */
1260 IFX_INLINE sint32 Ifx__abss(sint32 a)
1261 {
1262 sint32 res;
1263 __asm__ volatile ("abss %0, %1": "=d" (res) : "d" (a));
1264 return res;
1265 }
1266
1267 /** Count leading ones in int
1268 */
1269 IFX_INLINE sint32 Ifx__clo(sint32 a)
1270 {
1271 sint32 res;
1272 __asm__ volatile ("clo %0,%1":"=d"(res):"d"(a));
1273 return res;
1274 }
1275
1276 /** Count number of redundant sign bits (all consecutive bits with the same value as bit 31
1277 */
1278 IFX_INLINE sint32 Ifx__cls(sint32 a)
1279 {
1280 sint32 res;
1281 __asm__ volatile ("cls %0,%1":"=d"(res):"d"(a));
1282 return res;
1283 }
1284
1285 /** Count leading zeros in int
1286 */
1287 #define Ifx__clz(a) __builtin_clz(a)
1288
1289 /** Return absolute double precision floating-point value
1290 */
1291 IFX_INLINE double Ifx__fabs(double d)
1292 {
1293 double res;
1294 __asm__ volatile ("insert %0,%1,0,31,1": "=d" (res) : "d" (d):"memory");
1295 return res;
1296 }
1297
1298 /** Return absolute floating-point value
1299 */
1300 IFX_INLINE float Ifx__fabsf(float f)
1301 {
1302 float res;
1303 __asm__ volatile ("insert %0,%1,0,31,1": "=d" (res) : "d" (f):"memory");
1304 return res;
1305 }
1306
1307 #if !IFXCPU_INTRINSICSGNUC_USE_MACHINE_INTRINSICS
1308 /** Move contents of the addressed core SFR into a data register
1309 */
1310 #define Ifx__mfcr(regaddr) \
1311 ({ sint32 res; __asm__ volatile ("mfcr %0,%1": "=d" (res) :"i"(regaddr): "memory"); res; })
1312
1313 //({ sint32 res; __asm__ volatile ("mfcr %0,"#regaddr : "=d" (res) : : "memory"); res; })
1314
1315 /** Move contents of a data register (second int) to the addressed core SFR (first int)
1316 */
1317 #define Ifx__mtcr(regaddr,val) __asm__ volatile ("mtcr %0,%1\n\tisync"::"i"(regaddr),"d"(val):"memory")
1318 #endif
1319
1320 /** Return parity
1321 */
1322 IFX_INLINE sint32 Ifx__parity(sint32 a)
1323 {
1324 sint32 res;
1325 __asm__ volatile ("parity %0,%1": "=d" (res) : "d" (a):"memory");
1326 return res;
1327 }
1328
1329 /** Return saturated byte
1330 */
1331 IFX_INLINE sint8 Ifx__satb(sint32 a)
1332 {
1333 sint8 res;
1334 __asm__ volatile ("sat.b %0,%1":"=d"(res):"d"(a));
1335 return res;
1336 }
1337
1338 /** Return saturated uint8
1339 */
1340 IFX_INLINE uint8 Ifx__satbu(sint32 a)
1341 {
1342 uint8 res;
1343 __asm__ volatile ("sat.bu %0,%1":"=d"(res):"d"(a));
1344 return res;
1345 }
1346
1347 /** Return saturated halfword
1348 */
1349 IFX_INLINE sint16 Ifx__sath(sint32 a)
1350 {
1351 sint8 res;
1352 __asm__ volatile ("sat.h %0,%1":"=d"(res):"d"(a));
1353 return res;
1354 }
1355
1356 /** Return saturated unsigned halfword
1357 */
1358 IFX_INLINE uint16 Ifx__sathu(sint32 a)
1359 {
1360 sint8 res;
1361 __asm__ volatile ("sat.hu %0,%1":"=d"(res):"d"(a));
1362 return res;
1363 }
1364
1365 /** \} */
1366
1367 /** \defgroup IfxLld_Cpu_Intrinsics_Gnucsaturation Saturation Arithmetic Support
1368 These intrinsics support saturation arithmetic
1369 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
1370 * \{
1371 */
1372
1373 /** add signed with saturation
1374 */
1375 IFX_INLINE sint32 Ifx__adds(sint32 a, sint32 b)
1376 {
1377 sint32 res;
1378 __asm__ volatile ("adds %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
1379 return res;
1380 }
1381
1382 /** add unsigned with saturation
1383 */
1384 IFX_INLINE uint32 Ifx__addsu(uint32 a, uint32 b)
1385 {
1386 uint32 res;
1387 __asm__ volatile ("adds.u %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
1388 return res;
1389 }
1390
1391 /** substract signed with saturation
1392 */
1393 IFX_INLINE sint32 Ifx__subs(sint32 a, sint32 b)
1394 {
1395 sint32 res;
1396 __asm__ volatile ("subs %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
1397 return res;
1398 }
1399
1400 /** substract unsigned with saturation
1401 */
1402 IFX_INLINE uint32 Ifx__subsu(uint32 a, uint32 b)
1403 {
1404 uint32 res;
1405 __asm__ volatile ("subs.u %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
1406 return res;
1407 }
1408
1409 /** \} */
1410
1411 /** \defgroup IfxLld_Cpu_Intrinsics_Gnucsingle_assembly Insert Single Assembly Instruction
1412 The next table provides an overview of the intrinsic functions that you can use to insert a single assembly
1413 instruction.You can also use inline assembly but these intrinsics provide a shorthand for frequently used
1414 assembly instructions.
1415 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
1416 * \{
1417 */
1418
1419 /** Insert DEBUG instruction
1420 */
1421 IFX_INLINE void Ifx__debug(void)
1422 {
1423 __asm__ volatile ("debug" : : : "memory");
1424 }
1425
1426 /** Insert a memory barrier
1427 */
1428 #define Ifx__mem_barrier __asm__ volatile("":::"memory");
1429
1430 /** Insert DSYNC instruction
1431 */
1432 IFX_INLINE void Ifx__dsync(void)
1433 {
1434 __asm__ volatile ("dsync" : : : "memory");
1435 }
1436
1437 /** Insert ISYNC instruction
1438 */
1439 IFX_INLINE void Ifx__isync(void)
1440 {
1441 __asm__ volatile ("isync" : : : "memory");
1442 }
1443
1444 /** Insert LDMST instruction. Note that all operands must be word-aligned.
1445 */
1446 IFX_INLINE void Ifx__ldmst(volatile void* address, uint32 mask, uint32 value)
1447 {
1448 __asm__ volatile("mov %H2,%1 \n\
1449 ldmst [%0]0,%A2"
1450 ::"a"(address), "d"(mask), "d"((long long)value));
1451 }
1452
1453 /** Insert NOP instruction
1454 */
1455 IFX_INLINE void Ifx__nop(void)
1456 {
1457 __asm__ volatile ("nop" : : : "memory");
1458 }
1459
1460 /** Insert a loop over cnt NOP instruction
1461 */
1462 IFX_INLINE void Ifx__nops(void* cnt)
1463 {
1464 __asm__ volatile ("0: nop \n\
1465 loop %0,0b"
1466 ::"a"(((sint8*)cnt)-1));
1467 }
1468
1469 /** Insert RSLCX instruction
1470 */
1471 IFX_INLINE void Ifx__rslcx(void)
1472 {
1473 __asm__ volatile ("rslcx" : : : "memory");
1474 }
1475
1476 /** Insert SVLCX instruction
1477 */
1478 IFX_INLINE void Ifx__svlcx(void)
1479 {
1480 __asm__ volatile ("svlcx" : : : "memory");
1481 }
1482
1483 /** Insert SWAP instruction. Note that all operands must be word-aligned.
1484 */
1485 IFX_INLINE uint32 Ifx__swap(void* place, uint32 value)
1486 {
1487 uint32 res;
1488 __asm__ volatile("swap.w [%1]0,%2":"=d"(res):"a"(place), "0"(value));
1489 return res;
1490 }
1491
1492 /** Insert n NOP instruction
1493 */
1494 #define Ifx__NOP(n) __asm(".rept " #n "\n\tnop\n\t.endr\n")
1495
1496 /** \} */
1497
1498 /* FIXME use inline instead of #define */
1499 #define Ifx__setareg(areg,val) \
1500 { uint32 reg_val= (uint32)val; \
1501 __asm__ volatile (" mov.a\t %%"#areg",%0"::"d"(reg_val)); }
1502
1503 /**__mtcr (CPU_CCTRL, 0);
1504 */
1505 IFX_INLINE void Ifx__stopPerfCounters(void)
1506 {
1507 __asm__ volatile("mov %%d0,0\n\
1508 mtcr 0xFC00,%%d0\n\
1509 isync\n"
1510 : : :"d0"); /* FIXME check that the parameter d0 is understood by the compiler as a register used by the inline */
1511 }
1512
1513 /** \brief This function is a implementation of a binary semaphore using compare and swap instruction
1514 * \param address address of resource.
1515 * \param value This variable is updated with status of address
1516 * \param condition if the value of address matches with the value of condition, then swap of value & address occurs.
1517 *
1518 */
1519 IFX_INLINE unsigned int Ifx__cmpAndSwap (unsigned int volatile *address,
1520 unsigned int value, unsigned int condition)
1521 {
1522 /* Gnu C compiler with Tricore 1.6 support is required to use cmpswap instruction */
1523 __extension__ unsigned long long reg64
1524 = value | (unsigned long long) condition << 32;
1525
1526 __asm__ __volatile__ ("cmpswap.w [%[addr]]0, %A[reg]"
1527 : [reg] "+d" (reg64)
1528 : [addr] "a" (address)
1529 : "memory");
1530 return reg64;
1531 }
1532
1533 /** \brief Convert a fixpoint value to float32
1534 *
1535 * This function converts a value from a fixpoint format to a float32 format.
1536 *
1537 *
1538 * \param value value to be converted.
1539 * \param shift position of the fix point. Range = [-256, 255] => (Qx.y format where x = shift+1).
1540 *
1541 * \return Returns the converted value in the float32 format.
1542 *
1543 */
1544 IFX_INLINE float32 Ifx__fixpoint_to_float32(fract value, sint32 shift)
1545 {
1546 float32 result;
1547
1548 __asm__ volatile("q31tof %0, %1, %2": "=d" (result) : "d" (value), "d" (shift));
1549 return result;
1550 }
1551
1552 IFX_INLINE void* Ifx__getA11(void)
1553 {
1554 uint32 *res;
1555 __asm__ volatile ("mov.aa %0, %%a11": "=a" (res) : :"a11");
1556 return res;
1557 }
1558
1559 IFX_INLINE void Ifx__setStackPointer(void *stackAddr)
1560 {
1561 __asm__ volatile ("mov.aa %%a10, %0": : "a" (stackAddr) :"a10");
1562 }
1563
1564 IFX_INLINE uint32 Ifx__crc32(uint32 b, uint32 a)
1565 {
1566 uint32 returnvalue = 0; /* set value to 0 */
1567
1568 __asm__ volatile ("CRC32B.W %0,%1,%2" : "=d" (returnvalue) : "d"(b), "d"(a));
1569
1570 return returnvalue;
1571 }
1572
1573 IFX_INLINE uint32 IfxCpu_calculateCrc32(uint32 *startaddress, uint8 length)
1574 {
1575 uint32 returnvalue = 0; /* set seed value to 0 */
1576 for (;length > 0; length--)
1577 {
1578 /* calculate the CRC over all data */
1579 __asm__ ("CRC32B.W %0,%0,%1" : "+d" (returnvalue) : "d" (*startaddress));
1580 startaddress++;
1581 }
1582 return returnvalue;
1583 }
1584
1585 IFX_INLINE uint32 IfxCpu_getRandomVal(uint32 a, uint32 x, uint32 m)
1586 {
1587 uint32 result;
1588 __asm(" mul.u %%e14,%1,%2 # d15 = Eh; d14 = El \n"
1589 " mov %%d12,%%d14 # e12 = El \n"
1590 " mov %%d13, 0 # \n"
1591 " madd.u %%e14,%%e12,%%d15, 5 # e14 = El + 5 * d15 \n"
1592 " cmp_m_%=: jge.u %%d14,%3,sub_m_%= # \n"
1593 " jz %%d15,done_%= # \n"
1594 " sub_m_%=: subx %%d14,%%d14,%3 # e12=e12-m \n"
1595 " subc %%d15,%%d15,%%d13 # d13=d13-0 \n"
1596 " loopu cmp_m_%= # \n"
1597 " done_%=: mov %0,%%d14 # \n"
1598 : "=d"(result) : "d"(a), "d"(x), "d"(m) : "d12","d13","d14","d15");
1599 return result;
1600 }
1601
1602 IFX_INLINE sint32 Ifx__popcnt(sint32 a)
1603 {
1604 sint32 res;
1605 __asm__ volatile ("popcnt.w %0,%1":"=d"(res):"d"(a));
1606 return res;
1607 }
1608
1609 /** Invalidate cache address "p". Generates CACHEA.I [Ab].
1610 */
1611 IFX_INLINE void Ifx__cacheai(uint8* p)
1612 {
1613 __asm__ volatile("cachea.i [%0]0"::"a"(p));
1614 }
1615
1616 /* Macros for backward compatibility of the intrinsics*/
1617 /******************************************************************************/
1618 #ifndef IFX_CFG_DISABLE_DEFAULT_INTRINSICS
1619 #ifndef __non_return_call
1620 #define __non_return_call Ifx__non_return_call
1621 #endif
1622
1623 #ifndef __jump_and_link
1624 #define __jump_and_link Ifx__jump_and_link
1625 #endif
1626
1627 #ifndef __moveToDataParam0
1628 #define __moveToDataParam0 Ifx__moveToDataParam0
1629 #endif
1630
1631 #ifndef __moveToDataParamRet
1632 #define __moveToDataParamRet Ifx__moveToDataParamRet
1633 #endif
1634
1635 #ifndef __getDataParamRet
1636 #define __getDataParamRet Ifx__getDataParamRet
1637 #endif
1638
1639 #ifndef __moveToAddrParam0
1640 #define __moveToAddrParam0 Ifx__moveToAddrParam0
1641 #endif
1642
1643 #ifndef __jumpToFunction
1644 #define __jumpToFunction Ifx__jumpToFunction
1645 #endif
1646
1647 #ifndef __jumpToFunctionWithLink
1648 #define __jumpToFunctionWithLink Ifx__jumpToFunctionWithLink
1649 #endif
1650
1651 #ifndef __jumpBackToLink
1652 #define __jumpBackToLink Ifx__jumpBackToLink
1653 #endif
1654
1655 #ifndef __minX
1656 #define __minX Ifx__minX
1657 #endif
1658
1659 #ifndef __maxX
1660 #define __maxX Ifx__maxX
1661 #endif
1662
1663 #ifndef __saturateX
1664 #define __saturateX Ifx__saturateX
1665 #endif
1666
1667 #ifndef __checkrangeX
1668 #define __checkrangeX Ifx__checkrangeX
1669 #endif
1670
1671 #ifndef __saturate
1672 #define __saturate Ifx__saturate
1673 #endif
1674
1675 #ifndef __saturateu
1676 #define __saturateu Ifx__saturateu
1677 #endif
1678
1679 #ifndef __max
1680 #define __max Ifx__max
1681 #endif
1682
1683 #ifndef __maxs
1684 #define __maxs Ifx__maxs
1685 #endif
1686
1687 #ifndef __maxu
1688 #define __maxu Ifx__maxu
1689 #endif
1690
1691 #ifndef __min
1692 #define __min Ifx__min
1693 #endif
1694
1695 #ifndef __mins
1696 #define __mins Ifx__mins
1697 #endif
1698
1699 #ifndef __minu
1700 #define __minu Ifx__minu
1701 #endif
1702
1703 #ifndef __sqrtf
1704 #define __sqrtf Ifx__sqrtf
1705 #endif
1706
1707 #ifndef __sqrf
1708 #define __sqrf Ifx__sqrf
1709 #endif
1710
1711 #ifndef __checkrange
1712 #define __checkrange Ifx__checkrange
1713 #endif
1714
1715 #ifndef __roundf
1716 #define __roundf Ifx__roundf
1717 #endif
1718
1719 #ifndef __absf
1720 #define __absf Ifx__absf
1721 #endif
1722
1723 #ifndef __saturatef
1724 #define __saturatef Ifx__saturatef
1725 #endif
1726
1727 #ifndef __minf
1728 #define __minf Ifx__minf
1729 #endif
1730
1731 #ifndef __maxf
1732 #define __maxf Ifx__maxf
1733 #endif
1734
1735 #ifndef __checkrangef
1736 #define __checkrangef Ifx__checkrangef
1737 #endif
1738
1739 #ifndef __abs_stdreal
1740 #define __abs_stdreal Ifx__abs_stdreal
1741 #endif
1742
1743 #ifndef __saturate_stdreal
1744 #define __saturate_stdreal Ifx__saturate_stdreal
1745 #endif
1746
1747 #ifndef __min_stdreal
1748 #define __min_stdreal Ifx__min_stdreal
1749 #endif
1750
1751 #ifndef __max_stdreal
1752 #define __max_stdreal Ifx__max_stdreal
1753 #endif
1754
1755 #ifndef __neqf
1756 #define __neqf Ifx__neqf
1757 #endif
1758
1759 #ifndef __leqf
1760 #define __leqf Ifx__leqf
1761 #endif
1762
1763 #ifndef __geqf
1764 #define __geqf Ifx__geqf
1765 #endif
1766
1767 #ifndef __clssf
1768 #define __clssf Ifx__clssf
1769 #endif
1770
1771 #ifndef __fract_to_float
1772 #define __fract_to_float Ifx__fract_to_float
1773 #endif
1774
1775 #ifndef __fract_to_sfract
1776 #define __fract_to_sfract Ifx__fract_to_sfract
1777 #endif
1778
1779 #ifndef __float_to_sfract
1780 #define __float_to_sfract Ifx__float_to_sfract
1781 #endif
1782
1783 #ifndef __float_to_fract
1784 #define __float_to_fract Ifx__float_to_fract
1785 #endif
1786
1787 #ifndef __getfract
1788 #define __getfract Ifx__getfract
1789 #endif
1790
1791 #ifndef __mac_r_sf
1792 #define __mac_r_sf Ifx__mac_r_sf
1793 #endif
1794
1795 #ifndef __mac_sf
1796 #define __mac_sf Ifx__mac_sf
1797 #endif
1798
1799 #ifndef __mulfractfract
1800 #define __mulfractfract Ifx__mulfractfract
1801 #endif
1802
1803 #ifndef __mulfractlong
1804 #define __mulfractlong Ifx__mulfractlong
1805 #endif
1806
1807 #ifndef __round16
1808 #define __round16 Ifx__round16
1809 #endif
1810
1811 #ifndef __s16_to_sfract
1812 #define __s16_to_sfract Ifx__s16_to_sfract
1813 #endif
1814
1815 #ifndef __sfract_to_s16
1816 #define __sfract_to_s16 Ifx__sfract_to_s16
1817 #endif
1818
1819 #ifndef __sfract_to_u16
1820 #define __sfract_to_u16 Ifx__sfract_to_u16
1821 #endif
1822
1823 #ifndef __shaaccum
1824 #define __shaaccum Ifx__shaaccum
1825 #endif
1826
1827 #ifndef __shafracts
1828 #define __shafracts Ifx__shafracts
1829 #endif
1830
1831 #ifndef __shasfracts
1832 #define __shasfracts Ifx__shasfracts
1833 #endif
1834
1835 #ifndef __u16_to_sfract
1836 #define __u16_to_sfract Ifx__u16_to_sfract
1837 #endif
1838
1839 #ifndef __extr
1840 #define __extr Ifx__extr
1841 #endif
1842
1843 #ifndef __extru
1844 #define __extru Ifx__extru
1845 #endif
1846
1847 #ifndef __getbit
1848 #define __getbit Ifx__getbit
1849 #endif
1850
1851 #ifndef __ins
1852 #define __ins Ifx__ins
1853 #endif
1854
1855 #ifndef __insert
1856 #define __insert Ifx__insert
1857 #endif
1858
1859 #ifndef __insn
1860 #define __insn Ifx__insn
1861 #endif
1862
1863 #ifndef __putbit
1864 #define __putbit Ifx__putbit
1865 #endif
1866
1867 #ifndef __imaskldmst
1868 #define __imaskldmst Ifx__imaskldmst
1869 #endif
1870
1871 #ifndef __bisr
1872 #define __bisr Ifx__bisr
1873 #endif
1874
1875 #ifndef __disable
1876 #define __disable Ifx__disable
1877 #endif
1878
1879 #ifndef __disable_and_save
1880 #define __disable_and_save Ifx__disable_and_save
1881 #endif
1882
1883 #ifndef __enable
1884 #define __enable Ifx__enable
1885 #endif
1886
1887 #ifndef __restore
1888 #define __restore Ifx__restore
1889 #endif
1890
1891 #ifndef __syscall
1892 #define __syscall Ifx__syscall
1893 #endif
1894
1895 #ifndef __tric_syscall
1896 #define __tric_syscall Ifx__tric_syscall
1897 #endif
1898
1899 #ifndef __cacheawi
1900 #define __cacheawi Ifx__cacheawi
1901 #endif
1902
1903 #ifndef __cacheiwi
1904 #define __cacheiwi Ifx__cacheiwi
1905 #endif
1906
1907 #ifndef __cacheawi_bo_post_inc
1908 #define __cacheawi_bo_post_inc Ifx__cacheawi_bo_post_inc
1909 #endif
1910
1911 #ifndef __mulsc
1912 #define __mulsc Ifx__mulsc
1913 #endif
1914
1915 #ifndef __rol
1916 #define __rol Ifx__rol
1917 #endif
1918
1919 #ifndef __ror
1920 #define __ror Ifx__ror
1921 #endif
1922
1923 #ifndef __extractbyte1
1924 #define __extractbyte1 Ifx__extractbyte1
1925 #endif
1926
1927 #ifndef __extractbyte2
1928 #define __extractbyte2 Ifx__extractbyte2
1929 #endif
1930
1931 #ifndef __extractbyte3
1932 #define __extractbyte3 Ifx__extractbyte3
1933 #endif
1934
1935 #ifndef __extractbyte4
1936 #define __extractbyte4 Ifx__extractbyte4
1937 #endif
1938
1939 #ifndef __extracthw1
1940 #define __extracthw1 Ifx__extracthw1
1941 #endif
1942
1943 #ifndef __extracthw2
1944 #define __extracthw2 Ifx__extracthw2
1945 #endif
1946
1947 #ifndef __extractubyte1
1948 #define __extractubyte1 Ifx__extractubyte1
1949 #endif
1950
1951 #ifndef __extractubyte2
1952 #define __extractubyte2 Ifx__extractubyte2
1953 #endif
1954
1955 #ifndef __extractubyte3
1956 #define __extractubyte3 Ifx__extractubyte3
1957 #endif
1958
1959 #ifndef __extractubyte4
1960 #define __extractubyte4 Ifx__extractubyte4
1961 #endif
1962
1963 #ifndef __extractuhw1
1964 #define __extractuhw1 Ifx__extractuhw1
1965 #endif
1966
1967 #ifndef __extractuhw2
1968 #define __extractuhw2 Ifx__extractuhw2
1969 #endif
1970
1971 #ifndef __getbyte1
1972 #define __getbyte1 Ifx__getbyte1
1973 #endif
1974
1975 #ifndef __getbyte2
1976 #define __getbyte2 Ifx__getbyte2
1977 #endif
1978
1979 #ifndef __getbyte3
1980 #define __getbyte3 Ifx__getbyte3
1981 #endif
1982
1983 #ifndef __getbyte4
1984 #define __getbyte4 Ifx__getbyte4
1985 #endif
1986
1987 #ifndef __gethw1
1988 #define __gethw1 Ifx__gethw1
1989 #endif
1990
1991 #ifndef __gethw2
1992 #define __gethw2 Ifx__gethw2
1993 #endif
1994
1995 #ifndef __getubyte1
1996 #define __getubyte1 Ifx__getubyte1
1997 #endif
1998
1999 #ifndef __getubyte2
2000 #define __getubyte2 Ifx__getubyte2
2001 #endif
2002
2003 #ifndef __getubyte3
2004 #define __getubyte3 Ifx__getubyte3
2005 #endif
2006
2007 #ifndef __getubyte4
2008 #define __getubyte4 Ifx__getubyte4
2009 #endif
2010
2011 #ifndef __getuhw1
2012 #define __getuhw1 Ifx__getuhw1
2013 #endif
2014
2015 #ifndef __getuhw2
2016 #define __getuhw2 Ifx__getuhw2
2017 #endif
2018
2019 #ifndef __setbyte1
2020 #define __setbyte1 Ifx__setbyte1
2021 #endif
2022
2023 #ifndef __setbyte2
2024 #define __setbyte2 Ifx__setbyte2
2025 #endif
2026
2027 #ifndef __setbyte3
2028 #define __setbyte3 Ifx__setbyte3
2029 #endif
2030
2031 #ifndef __setbyte4
2032 #define __setbyte4 Ifx__setbyte4
2033 #endif
2034
2035 #ifndef __sethw1
2036 #define __sethw1 Ifx__sethw1
2037 #endif
2038
2039 #ifndef __sethw2
2040 #define __sethw2 Ifx__sethw2
2041 #endif
2042
2043 #ifndef __setubyte1
2044 #define __setubyte1 Ifx__setubyte1
2045 #endif
2046
2047 #ifndef __setubyte2
2048 #define __setubyte2 Ifx__setubyte2
2049 #endif
2050
2051 #ifndef __setubyte3
2052 #define __setubyte3 Ifx__setubyte3
2053 #endif
2054
2055 #ifndef __setubyte4
2056 #define __setubyte4 Ifx__setubyte4
2057 #endif
2058
2059 #ifndef __setuhw1
2060 #define __setuhw1 Ifx__setuhw1
2061 #endif
2062
2063 #ifndef __setuhw2
2064 #define __setuhw2 Ifx__setuhw2
2065 #endif
2066
2067 #ifndef __minhu
2068 #define __minhu Ifx__minhu
2069 #endif
2070
2071 #ifndef __minh
2072 #define __minh Ifx__minh
2073 #endif
2074
2075 #ifndef __minbu
2076 #define __minbu Ifx__minbu
2077 #endif
2078
2079 #ifndef __minb
2080 #define __minb Ifx__minb
2081 #endif
2082
2083 #ifndef __insertuhw2
2084 #define __insertuhw2 Ifx__insertuhw2
2085 #endif
2086
2087 #ifndef __insertuhw1
2088 #define __insertuhw1 Ifx__insertuhw1
2089 #endif
2090
2091 #ifndef __inserthw2
2092 #define __inserthw2 Ifx__inserthw2
2093 #endif
2094
2095 #ifndef __inserthw1
2096 #define __inserthw1 Ifx__inserthw1
2097 #endif
2098
2099 #ifndef __insertubyte4
2100 #define __insertubyte4 Ifx__insertubyte4
2101 #endif
2102
2103 #ifndef __insertubyte3
2104 #define __insertubyte3 Ifx__insertubyte3
2105 #endif
2106
2107 #ifndef __insertubyte2
2108 #define __insertubyte2 Ifx__insertubyte2
2109 #endif
2110
2111 #ifndef __insertubyte1
2112 #define __insertubyte1 Ifx__insertubyte1
2113 #endif
2114
2115 #ifndef __insertbyte4
2116 #define __insertbyte4 Ifx__insertbyte4
2117 #endif
2118
2119 #ifndef __insertbyte3
2120 #define __insertbyte3 Ifx__insertbyte3
2121 #endif
2122
2123 #ifndef __insertbyte2
2124 #define __insertbyte2 Ifx__insertbyte2
2125 #endif
2126
2127 #ifndef __insertbyte1
2128 #define __insertbyte1 Ifx__insertbyte1
2129 #endif
2130
2131 #ifndef __initupackhw
2132 #define __initupackhw Ifx__initupackhw
2133 #endif
2134
2135 #ifndef __initupackb
2136 #define __initupackb Ifx__initupackb
2137 #endif
2138
2139 #ifndef __initpackhwl
2140 #define __initpackhwl Ifx__initpackhwl
2141 #endif
2142
2143 #ifndef __initpackhw
2144 #define __initpackhw Ifx__initpackhw
2145 #endif
2146
2147 #ifndef __initpackbl
2148 #define __initpackbl Ifx__initpackbl
2149 #endif
2150
2151 #ifndef __initpackb
2152 #define __initpackb Ifx__initpackb
2153 #endif
2154
2155 #ifndef __absb
2156 #define __absb Ifx__absb
2157 #endif
2158
2159 #ifndef __absh
2160 #define __absh Ifx__absh
2161 #endif
2162
2163 #ifndef __abssh
2164 #define __abssh Ifx__abssh
2165 #endif
2166
2167
2168 #ifndef __abs
2169 #define __abs Ifx__abs
2170 #endif
2171
2172 #ifndef __absdif
2173 #define __absdif Ifx__absdif
2174 #endif
2175
2176 #ifndef __abss
2177 #define __abss Ifx__abss
2178 #endif
2179
2180 #ifndef __clo
2181 #define __clo Ifx__clo
2182 #endif
2183
2184 #ifndef __cls
2185 #define __cls Ifx__cls
2186 #endif
2187
2188 #ifndef __clz
2189 #define __clz Ifx__clz
2190 #endif
2191
2192 #ifndef __fabs
2193 #define __fabs Ifx__fabs
2194 #endif
2195
2196 #ifndef __fabsf
2197 #define __fabsf Ifx__fabsf
2198 #endif
2199
2200 #ifndef __mfcr
2201 #define __mfcr Ifx__mfcr
2202 #endif
2203
2204 #ifndef __mtcr
2205 #define __mtcr Ifx__mtcr
2206 #endif
2207
2208 #ifndef __parity
2209 #define __parity Ifx__parity
2210 #endif
2211
2212 #ifndef __satb
2213 #define __satb Ifx__satb
2214 #endif
2215
2216 #ifndef __satbu
2217 #define __satbu Ifx__satbu
2218 #endif
2219
2220 #ifndef __sath
2221 #define __sath Ifx__sath
2222 #endif
2223
2224 #ifndef __sathu
2225 #define __sathu Ifx__sathu
2226 #endif
2227
2228 #ifndef __adds
2229 #define __adds Ifx__adds
2230 #endif
2231
2232 #ifndef __addsu
2233 #define __addsu Ifx__addsu
2234 #endif
2235
2236 #ifndef __subs
2237 #define __subs Ifx__subs
2238 #endif
2239
2240 #ifndef __subsu
2241 #define __subsu Ifx__subsu
2242 #endif
2243
2244 #ifndef __debug
2245 #define __debug Ifx__debug
2246 #endif
2247
2248 #ifndef __mem_barrier
2249 #define __mem_barrier Ifx__mem_barrier
2250 #endif
2251
2252 #ifndef __dsync
2253 #define __dsync Ifx__dsync
2254 #endif
2255
2256 #ifndef __isync
2257 #define __isync Ifx__isync
2258 #endif
2259
2260 #ifndef __ldmst
2261 #define __ldmst Ifx__ldmst
2262 #endif
2263
2264 #ifndef __nop
2265 #define __nop Ifx__nop
2266 #endif
2267
2268 #ifndef __nops
2269 #define __nops Ifx__nops
2270 #endif
2271
2272 #ifndef __rslcx
2273 #define __rslcx Ifx__rslcx
2274 #endif
2275
2276 #ifndef __svlcx
2277 #define __svlcx Ifx__svlcx
2278 #endif
2279
2280 #ifndef __swap
2281 #define __swap Ifx__swap
2282 #endif
2283
2284 #if ((!defined(NOP)) && (!defined(IFX_CFG_DISABLE_DEFAULT_INTRINSICS)))
2285 #define NOP Ifx__NOP
2286 #endif
2287
2288 #ifndef __setareg
2289 #define __setareg Ifx__setareg
2290 #endif
2291
2292 #ifndef __stopPerfCounters
2293 #define __stopPerfCounters Ifx__stopPerfCounters
2294 #endif
2295
2296 #ifndef __cmpAndSwap
2297 #define __cmpAndSwap Ifx__cmpAndSwap
2298 #endif
2299
2300 #ifndef __fixpoint_to_float32
2301 #define __fixpoint_to_float32 Ifx__fixpoint_to_float32
2302 #endif
2303
2304 #ifndef __getA11
2305 #define __getA11 Ifx__getA11
2306 #endif
2307
2308 #ifndef __setStackPointer
2309 #define __setStackPointer Ifx__setStackPointer
2310 #endif
2311
2312 #if ((!defined(__crc32)) && (!defined(IFX_CFG_DISABLE_DEFAULT_INTRINSICS)))
2313 #define __crc32 Ifx__crc32
2314 #endif
2315
2316 #ifndef __popcnt
2317 #define __popcnt Ifx__popcnt
2318 #endif
2319
2320 #ifndef __cacheai
2321 #define __cacheai Ifx__cacheai
2322 #endif
2323
2324 #endif
2325 /******************************************************************************/
2326 /* *INDENT-ON* */
2327 /******************************************************************************/
2328 #endif /* IFXCPU_INTRINSICSGNUC_H */
Ifx__sathu
IFX_INLINE uint16 Ifx__sathu(sint32 a)
Definition: IfxCpu_IntrinsicsGnuc.h:1358
Ifx__setbyte3
IFX_INLINE void Ifx__setbyte3(__packb *a, sint8 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1139
Ifx__initupackb
IFX_INLINE __upackb Ifx__initupackb(uint32 a, uint32 b, uint32 c, uint32 d)
Definition: IfxCpu_IntrinsicsGnuc.h:937
Ifx__restore
IFX_INLINE void Ifx__restore(sint32 ie)
Definition: IfxCpu_IntrinsicsGnuc.h:533
Ifx__parity
IFX_INLINE sint32 Ifx__parity(sint32 a)
Definition: IfxCpu_IntrinsicsGnuc.h:1322
Ifx__extru
IFX_INLINE uint32 Ifx__extru(uint32 a, uint32 p, uint32 w)
Definition: IfxCpu_IntrinsicsGnuc.h:442
Ifx__insertubyte1
IFX_INLINE __upackb Ifx__insertubyte1(__upackb a, uint8 b)
Definition: IfxCpu_IntrinsicsGnuc.h:999
Ifx__getbyte2
IFX_INLINE sint8 Ifx__getbyte2(__packb *a)
Definition: IfxCpu_IntrinsicsGnuc.h:778
Ifx__setuhw2
IFX_INLINE void Ifx__setuhw2(__upackhw *a, uint16 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1229
Ifx__extractubyte4
IFX_INLINE uint8 Ifx__extractubyte4(__upackb a)
Definition: IfxCpu_IntrinsicsGnuc.h:736
Ifx__subsu
IFX_INLINE uint32 Ifx__subsu(uint32 a, uint32 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1402
Ifx__shaaccum
IFX_INLINE laccum Ifx__shaaccum(laccum a, sint32 b)
Definition: IfxCpu_IntrinsicsGnuc.h:378
Ifx__satb
IFX_INLINE sint8 Ifx__satb(sint32 a)
Definition: IfxCpu_IntrinsicsGnuc.h:1331
__packb
long __packb
Definition: Ifx_TypesDcc.h:47
Ifx__u16_to_sfract
IFX_INLINE sfract Ifx__u16_to_sfract(uint16 a)
Definition: IfxCpu_IntrinsicsGnuc.h:413
Ifx__insertuhw1
IFX_INLINE __upackhw Ifx__insertuhw1(__upackhw a, uint16 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1059
Ifx__float_to_sfract
IFX_INLINE sfract Ifx__float_to_sfract(float a)
Definition: IfxCpu_IntrinsicsGnuc.h:278
Ifx__swap
IFX_INLINE uint32 Ifx__swap(void *place, uint32 value)
Definition: IfxCpu_IntrinsicsGnuc.h:1485
Ifx__minu
IFX_INLINE uint32 Ifx__minu(uint32 a, uint32 b)
Definition: IfxCpu_IntrinsicsGnuc.h:192
Ifx__min
IFX_INLINE sint32 Ifx__min(sint32 a, sint32 b)
Definition: IfxCpu_IntrinsicsGnuc.h:174
sfract
short sfract
Definition: Ifx_TypesDcc.h:45
Ifx__getubyte3
IFX_INLINE uint8 Ifx__getubyte3(__upackb *a)
Definition: IfxCpu_IntrinsicsGnuc.h:857
Ifx__initpackhwl
IFX_INLINE __packhw Ifx__initpackhwl(long a)
Definition: IfxCpu_IntrinsicsGnuc.h:930
Ifx__setbyte4
IFX_INLINE void Ifx__setbyte4(__packb *a, sint8 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1149
Ifx__insertbyte3
IFX_INLINE __packb Ifx__insertbyte3(__packb a, sint8 b)
Definition: IfxCpu_IntrinsicsGnuc.h:979
Ifx__subs
IFX_INLINE sint32 Ifx__subs(sint32 a, sint32 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1393
IfxCpu_getRandomVal
IFX_INLINE uint32 IfxCpu_getRandomVal(uint32 a, uint32 x, uint32 m)
Definition: IfxCpu_IntrinsicsGnuc.h:1585
Ifx__crc32
IFX_INLINE uint32 Ifx__crc32(uint32 b, uint32 a)
Definition: IfxCpu_IntrinsicsGnuc.h:1564
Ifx__svlcx
IFX_INLINE void Ifx__svlcx(void)
Definition: IfxCpu_IntrinsicsGnuc.h:1478
Ifx__round16
IFX_INLINE sfract Ifx__round16(fract a)
Definition: IfxCpu_IntrinsicsGnuc.h:335
Ifx__shasfracts
IFX_INLINE sfract Ifx__shasfracts(sfract a, sint32 b)
Definition: IfxCpu_IntrinsicsGnuc.h:404
Ifx__sath
IFX_INLINE sint16 Ifx__sath(sint32 a)
Definition: IfxCpu_IntrinsicsGnuc.h:1349
__asm__
#define __asm__
Definition: Ifx_TypesTasking.h:45
Ifx__absdif
IFX_INLINE sint32 Ifx__absdif(sint32 a, sint32 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1251
Ifx__jump_and_link
IFX_INLINE void Ifx__jump_and_link(void(*fun)(void))
Definition: IfxCpu_IntrinsicsGnuc.h:72
Ifx__extracthw2
IFX_INLINE sint16 Ifx__extracthw2(__packhw a)
Definition: IfxCpu_IntrinsicsGnuc.h:696
uint32
unsigned long uint32
Definition: Platform_Types.h:116
Ifx__getuhw1
IFX_INLINE uint16 Ifx__getuhw1(__upackhw *a)
Definition: IfxCpu_IntrinsicsGnuc.h:879
Ifx__extractubyte3
IFX_INLINE uint8 Ifx__extractubyte3(__upackb a)
Definition: IfxCpu_IntrinsicsGnuc.h:726
Ifx__nops
IFX_INLINE void Ifx__nops(void *cnt)
Definition: IfxCpu_IntrinsicsGnuc.h:1462
Ifx__setbyte1
IFX_INLINE void Ifx__setbyte1(__packb *a, sint8 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1119
Ifx__inserthw2
IFX_INLINE __packhw Ifx__inserthw2(__packhw a, sint16 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1049
float32
float float32
Definition: Platform_Types.h:170
Ifx__cacheawi_bo_post_inc
IFX_INLINE uint8 * Ifx__cacheawi_bo_post_inc(uint8 *p)
Definition: IfxCpu_IntrinsicsGnuc.h:568
Ifx__extractubyte1
IFX_INLINE uint8 Ifx__extractubyte1(__upackb a)
Definition: IfxCpu_IntrinsicsGnuc.h:706
Ifx__adds
IFX_INLINE sint32 Ifx__adds(sint32 a, sint32 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1375
Ifx__sfract_to_u16
IFX_INLINE uint16 Ifx__sfract_to_u16(sfract a)
Definition: IfxCpu_IntrinsicsGnuc.h:368
__upackhw
unsigned long __upackhw
Definition: Ifx_TypesDcc.h:50
Ifx__debug
IFX_INLINE void Ifx__debug(void)
Definition: IfxCpu_IntrinsicsGnuc.h:1421
Ifx__getubyte1
IFX_INLINE uint8 Ifx__getubyte1(__upackb *a)
Definition: IfxCpu_IntrinsicsGnuc.h:835
Ifx__extr
IFX_INLINE sint32 Ifx__extr(sint32 a, uint32 p, uint32 w)
Definition: IfxCpu_IntrinsicsGnuc.h:430
Ifx__getubyte4
IFX_INLINE uint8 Ifx__getubyte4(__upackb *a)
Definition: IfxCpu_IntrinsicsGnuc.h:868
Ifx__insertubyte3
IFX_INLINE __upackb Ifx__insertubyte3(__upackb a, uint8 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1019
Ifx__absh
IFX_INLINE __packhw Ifx__absh(__packhw a)
Definition: IfxCpu_IntrinsicsGnuc.h:626
Ifx__ldmst
IFX_INLINE void Ifx__ldmst(volatile void *address, uint32 mask, uint32 value)
Definition: IfxCpu_IntrinsicsGnuc.h:1446
Ifx__getfract
IFX_INLINE fract Ifx__getfract(laccum a)
Definition: IfxCpu_IntrinsicsGnuc.h:286
Ifx__insertuhw2
IFX_INLINE __upackhw Ifx__insertuhw2(__upackhw a, uint16 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1069
Ifx__rslcx
IFX_INLINE void Ifx__rslcx(void)
Definition: IfxCpu_IntrinsicsGnuc.h:1471
Ifx__minbu
IFX_INLINE __upackb Ifx__minbu(__upackb a, __upackb b)
Definition: IfxCpu_IntrinsicsGnuc.h:1089
Ifx__satbu
IFX_INLINE uint8 Ifx__satbu(sint32 a)
Definition: IfxCpu_IntrinsicsGnuc.h:1340
Ifx__minb
IFX_INLINE __packb Ifx__minb(__packb a, __packb b)
Definition: IfxCpu_IntrinsicsGnuc.h:1079
Ifx__mac_r_sf
IFX_INLINE sfract Ifx__mac_r_sf(sfract a, sfract b, sfract c)
Definition: IfxCpu_IntrinsicsGnuc.h:295
Ifx__jumpToFunctionWithLink
IFX_INLINE void Ifx__jumpToFunctionWithLink(const void *fun)
Definition: IfxCpu_IntrinsicsGnuc.h:104
Ifx__insertubyte4
IFX_INLINE __upackb Ifx__insertubyte4(__upackb a, uint8 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1029
Ifx__initpackbl
IFX_INLINE __packb Ifx__initpackbl(long a)
Definition: IfxCpu_IntrinsicsGnuc.h:913
sint16
short sint16
Definition: Platform_Types.h:129
IfxCpu_calculateCrc32
IFX_INLINE uint32 IfxCpu_calculateCrc32(uint32 *startaddress, uint8 length)
Definition: IfxCpu_IntrinsicsGnuc.h:1573
Ifx__setbyte2
IFX_INLINE void Ifx__setbyte2(__packb *a, sint8 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1129
__packhw
long __packhw
Definition: Ifx_TypesDcc.h:49
Ifx__cacheai
IFX_INLINE void Ifx__cacheai(uint8 *p)
Definition: IfxCpu_IntrinsicsGnuc.h:1611
Ifx__maxu
IFX_INLINE uint32 Ifx__maxu(uint32 a, uint32 b)
Definition: IfxCpu_IntrinsicsGnuc.h:165
fract
long fract
Definition: Ifx_TypesDcc.h:44
Ifx__gethw1
IFX_INLINE sint16 Ifx__gethw1(__packhw *a)
Definition: IfxCpu_IntrinsicsGnuc.h:814
Ifx__shafracts
IFX_INLINE fract Ifx__shafracts(fract a, sint32 b)
Definition: IfxCpu_IntrinsicsGnuc.h:395
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
laccum
long long laccum
Definition: Ifx_TypesDcc.h:46
Ifx__insertbyte2
IFX_INLINE __packb Ifx__insertbyte2(__packb a, sint8 b)
Definition: IfxCpu_IntrinsicsGnuc.h:969
Ifx__extractbyte2
IFX_INLINE sint8 Ifx__extractbyte2(__packb a)
Definition: IfxCpu_IntrinsicsGnuc.h:656
Ifx__abss
IFX_INLINE sint32 Ifx__abss(sint32 a)
Definition: IfxCpu_IntrinsicsGnuc.h:1260
Ifx__extractbyte4
IFX_INLINE sint8 Ifx__extractbyte4(__packb a)
Definition: IfxCpu_IntrinsicsGnuc.h:676
Ifx__extractubyte2
IFX_INLINE uint8 Ifx__extractubyte2(__upackb a)
Definition: IfxCpu_IntrinsicsGnuc.h:716
Ifx__setubyte4
IFX_INLINE void Ifx__setubyte4(__upackb *a, uint8 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1209
Ifx__abssh
IFX_INLINE __packhw Ifx__abssh(__packhw a)
Definition: IfxCpu_IntrinsicsGnuc.h:636
Ifx__initpackb
IFX_INLINE __packb Ifx__initpackb(sint32 a, sint32 b, sint32 c, sint32 d)
Definition: IfxCpu_IntrinsicsGnuc.h:901
Ifx__max
IFX_INLINE sint32 Ifx__max(sint32 a, sint32 b)
Definition: IfxCpu_IntrinsicsGnuc.h:148
Ifx__maxs
IFX_INLINE sint32 Ifx__maxs(sint16 a, sint16 b)
Definition: IfxCpu_IntrinsicsGnuc.h:157
Ifx__non_return_call
#define Ifx__non_return_call(fun)
Definition: IfxCpu_IntrinsicsGnuc.h:68
Ifx__getuhw2
IFX_INLINE uint16 Ifx__getuhw2(__upackhw *a)
Definition: IfxCpu_IntrinsicsGnuc.h:890
Ifx__clssf
IFX_INLINE sint16 Ifx__clssf(sfract a)
Definition: IfxCpu_IntrinsicsGnuc.h:238
__upackb
unsigned long __upackb
Definition: Ifx_TypesDcc.h:48
Ifx__insertubyte2
IFX_INLINE __upackb Ifx__insertubyte2(__upackb a, uint8 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1009
Ifx__extractuhw2
IFX_INLINE uint16 Ifx__extractuhw2(__upackhw a)
Definition: IfxCpu_IntrinsicsGnuc.h:756
Ifx__addsu
IFX_INLINE uint32 Ifx__addsu(uint32 a, uint32 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1384
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
Ifx__dsync
IFX_INLINE void Ifx__dsync(void)
Definition: IfxCpu_IntrinsicsGnuc.h:1432
Ifx__sethw1
IFX_INLINE void Ifx__sethw1(__packhw *a, sint16 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1159
Ifx__initupackhw
IFX_INLINE __upackhw Ifx__initupackhw(uint16 a, uint16 b)
Definition: IfxCpu_IntrinsicsGnuc.h:949
Ifx__disable_and_save
IFX_INLINE sint32 Ifx__disable_and_save(void)
Definition: IfxCpu_IntrinsicsGnuc.h:520
Ifx__moveToDataParam0
IFX_INLINE void Ifx__moveToDataParam0(unsigned int var)
Definition: IfxCpu_IntrinsicsGnuc.h:77
Ifx__getbyte3
IFX_INLINE sint8 Ifx__getbyte3(__packb *a)
Definition: IfxCpu_IntrinsicsGnuc.h:790
Ifx__getbyte1
IFX_INLINE sint8 Ifx__getbyte1(__packb *a)
Definition: IfxCpu_IntrinsicsGnuc.h:766
Ifx__isync
IFX_INLINE void Ifx__isync(void)
Definition: IfxCpu_IntrinsicsGnuc.h:1439
Ifx__setuhw1
IFX_INLINE void Ifx__setuhw1(__upackhw *a, uint16 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1219
Ifx__insert
IFX_INLINE sint32 Ifx__insert(sint32 a, sint32 b, sint32 p, const sint32 w)
Definition: IfxCpu_IntrinsicsGnuc.h:477
Ifx__minhu
IFX_INLINE __upackhw Ifx__minhu(__upackhw a, __upackhw b)
Definition: IfxCpu_IntrinsicsGnuc.h:1109
Ifx__fabsf
IFX_INLINE float Ifx__fabsf(float f)
Definition: IfxCpu_IntrinsicsGnuc.h:1300
Ifx__inserthw1
IFX_INLINE __packhw Ifx__inserthw1(__packhw a, sint16 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1039
Ifx__mins
IFX_INLINE sint16 Ifx__mins(sint16 a, sint16 b)
Definition: IfxCpu_IntrinsicsGnuc.h:183
Ifx__sfract_to_s16
IFX_INLINE sint16 Ifx__sfract_to_s16(sfract a)
Definition: IfxCpu_IntrinsicsGnuc.h:358
Ifx__mulfractlong
IFX_INLINE long Ifx__mulfractlong(fract a, long b)
Definition: IfxCpu_IntrinsicsGnuc.h:326
Ifx__fixpoint_to_float32
IFX_INLINE float32 Ifx__fixpoint_to_float32(fract value, sint32 shift)
Convert a fixpoint value to float32.
Definition: IfxCpu_IntrinsicsGnuc.h:1544
Ifx__cacheiwi
IFX_INLINE void Ifx__cacheiwi(uint8 *p)
Definition: IfxCpu_IntrinsicsGnuc.h:560
Ifx__setubyte3
IFX_INLINE void Ifx__setubyte3(__upackb *a, uint8 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1199
Ifx__cacheawi
IFX_INLINE void Ifx__cacheawi(uint8 *p)
Definition: IfxCpu_IntrinsicsGnuc.h:554
uint16
unsigned short uint16
Definition: Platform_Types.h:112
Ifx__fract_to_sfract
IFX_INLINE sfract Ifx__fract_to_sfract(fract a)
Definition: IfxCpu_IntrinsicsGnuc.h:266
Ifx__cmpAndSwap
IFX_INLINE unsigned int Ifx__cmpAndSwap(unsigned int volatile *address, unsigned int value, unsigned int condition)
This function is a implementation of a binary semaphore using compare and swap instruction.
Definition: IfxCpu_IntrinsicsGnuc.h:1519
Ifx__insertbyte1
IFX_INLINE __packb Ifx__insertbyte1(__packb a, sint8 b)
Definition: IfxCpu_IntrinsicsGnuc.h:959
Ifx__initpackhw
IFX_INLINE __packhw Ifx__initpackhw(sint16 a, sint16 b)
Definition: IfxCpu_IntrinsicsGnuc.h:920
Ifx__float_to_fract
IFX_INLINE fract Ifx__float_to_fract(float a)
Definition: IfxCpu_IntrinsicsGnuc.h:257
Ifx__cls
IFX_INLINE sint32 Ifx__cls(sint32 a)
Definition: IfxCpu_IntrinsicsGnuc.h:1278
Ifx__stopPerfCounters
IFX_INLINE void Ifx__stopPerfCounters(void)
Definition: IfxCpu_IntrinsicsGnuc.h:1505
Ifx__mulfractfract
IFX_INLINE long Ifx__mulfractfract(fract a, fract b)
Definition: IfxCpu_IntrinsicsGnuc.h:317
Ifx__jumpToFunction
IFX_INLINE void Ifx__jumpToFunction(const void *fun)
Definition: IfxCpu_IntrinsicsGnuc.h:99
Ifx__moveToAddrParam0
IFX_INLINE void Ifx__moveToAddrParam0(const void *var)
Definition: IfxCpu_IntrinsicsGnuc.h:94
Ifx__mulsc
IFX_INLINE sint32 Ifx__mulsc(sint32 a, sint32 b, sint32 offset)
Definition: IfxCpu_IntrinsicsGnuc.h:578
Ifx__getubyte2
IFX_INLINE uint8 Ifx__getubyte2(__upackb *a)
Definition: IfxCpu_IntrinsicsGnuc.h:846
sint32
long sint32
Definition: Platform_Types.h:134
Ifx__clo
IFX_INLINE sint32 Ifx__clo(sint32 a)
Definition: IfxCpu_IntrinsicsGnuc.h:1269
Ifx__getDataParamRet
IFX_INLINE unsigned int Ifx__getDataParamRet(void)
Definition: IfxCpu_IntrinsicsGnuc.h:87
Ifx__popcnt
IFX_INLINE sint32 Ifx__popcnt(sint32 a)
Definition: IfxCpu_IntrinsicsGnuc.h:1602
Ifx__getbyte4
IFX_INLINE sint8 Ifx__getbyte4(__packb *a)
Definition: IfxCpu_IntrinsicsGnuc.h:802
Ifx__setubyte1
IFX_INLINE void Ifx__setubyte1(__upackb *a, uint8 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1179
Ifx__nop
IFX_INLINE void Ifx__nop(void)
Definition: IfxCpu_IntrinsicsGnuc.h:1455
Ifx__jumpBackToLink
IFX_INLINE void Ifx__jumpBackToLink(void)
Definition: IfxCpu_IntrinsicsGnuc.h:109
Ifx__ins
IFX_INLINE sint32 Ifx__ins(sint32 trg, const sint32 trgbit, sint32 src, const sint32 srcbit)
Definition: IfxCpu_IntrinsicsGnuc.h:468
Ifx__moveToDataParamRet
IFX_INLINE void Ifx__moveToDataParamRet(unsigned int var)
Definition: IfxCpu_IntrinsicsGnuc.h:82
Ifx__insn
IFX_INLINE sint32 Ifx__insn(sint32 trg, const sint32 trgbit, sint32 src, const sint32 srcbit)
Definition: IfxCpu_IntrinsicsGnuc.h:489
Ifx__extractuhw1
IFX_INLINE uint16 Ifx__extractuhw1(__upackhw a)
Definition: IfxCpu_IntrinsicsGnuc.h:746
Ifx__rol
IFX_INLINE uint32 Ifx__rol(uint32 operand, uint32 count)
Definition: IfxCpu_IntrinsicsGnuc.h:589
Ifx__ror
IFX_INLINE uint32 Ifx__ror(uint32 operand, uint32 count)
Definition: IfxCpu_IntrinsicsGnuc.h:598
Ifx__getA11
IFX_INLINE void * Ifx__getA11(void)
Definition: IfxCpu_IntrinsicsGnuc.h:1552
Ifx__mac_sf
IFX_INLINE sfract Ifx__mac_sf(sfract a, sfract b, sfract c)
Definition: IfxCpu_IntrinsicsGnuc.h:306
Ifx__s16_to_sfract
IFX_INLINE sfract Ifx__s16_to_sfract(sint16 a)
Definition: IfxCpu_IntrinsicsGnuc.h:348
Ifx__insertbyte4
IFX_INLINE __packb Ifx__insertbyte4(__packb a, sint8 b)
Definition: IfxCpu_IntrinsicsGnuc.h:989
uint8
unsigned char uint8
Definition: Platform_Types.h:108
Ifx__extractbyte1
IFX_INLINE sint8 Ifx__extractbyte1(__packb a)
Definition: IfxCpu_IntrinsicsGnuc.h:646
Ifx__gethw2
IFX_INLINE sint16 Ifx__gethw2(__packhw *a)
Definition: IfxCpu_IntrinsicsGnuc.h:824
sint8
signed char sint8
Definition: Platform_Types.h:125
Ifx__setStackPointer
IFX_INLINE void Ifx__setStackPointer(void *stackAddr)
Definition: IfxCpu_IntrinsicsGnuc.h:1559
Ifx__absb
IFX_INLINE __packb Ifx__absb(__packb a)
Definition: IfxCpu_IntrinsicsGnuc.h:616
Ifx__extractbyte3
IFX_INLINE sint8 Ifx__extractbyte3(__packb a)
Definition: IfxCpu_IntrinsicsGnuc.h:666
Ifx__sethw2
IFX_INLINE void Ifx__sethw2(__packhw *a, sint16 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1169
Ifx__fract_to_float
IFX_INLINE float Ifx__fract_to_float(fract a)
Definition: IfxCpu_IntrinsicsGnuc.h:248
Ifx__setubyte2
IFX_INLINE void Ifx__setubyte2(__upackb *a, uint8 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1189
Ifx__minh
IFX_INLINE __packhw Ifx__minh(__packhw a, __packhw b)
Definition: IfxCpu_IntrinsicsGnuc.h:1099
Ifx__extracthw1
IFX_INLINE sint16 Ifx__extracthw1(__packhw a)
Definition: IfxCpu_IntrinsicsGnuc.h:686
Ifx__fabs
IFX_INLINE double Ifx__fabs(double d)
Definition: IfxCpu_IntrinsicsGnuc.h:1291


iLLD_TC38A: IfxCpu_IntrinsicsTasking.h Source File

  • Cpu
  • Std
IfxCpu_IntrinsicsTasking.h
Go to the documentation of this file.
1 /**
2 * \file IfxCpu_IntrinsicsTasking.h
3 *
4 * \version iLLD_1_0_1_12_0
5 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
6 *
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 * \defgroup IfxLld_Cpu_Intrinsics_Tasking Intrinsics for TASKING compiler
41 * \ingroup IfxLld_Cpu_Intrinsics
42 *
43 */
44 #ifndef IFXCPU_INTRINSICSTASKING_H
45 #define IFXCPU_INTRINSICSTASKING_H
46 /******************************************************************************/
47 #include "Ifx_Types.h"
48 /******************************************************************************/
49 /* *INDENT-OFF* */
50
51 #ifndef __cplusplus
52 /** Function call without return
53 */
54 #define Ifx__non_return_call(fun) __asm("\tji %0"::"a"(fun))
55
56 /** Jump and link
57 */
58 IFX_INLINE void Ifx__jump_and_link(void (*fun)(void))
59 {
60 __asm("jli %0"::"a"(fun));
61 }
62
63 IFX_INLINE void Ifx__moveToDataParam0(unsigned int var)
64 {
65 __asm("mov d4, %0"::"d"(var));
66 }
67
68 IFX_INLINE void Ifx__moveToAddrParam0(const void *var)
69 {
70 __asm("mov.aa a4, %0"::"a"(var));
71 }
72
73 IFX_INLINE unsigned int Ifx__getDataParamRet(void)
74 {
75 unsigned int var;
76 __asm(" mov\t %0, d2":"=d"(var));
77 return var;
78 }
79
80 IFX_INLINE void Ifx__moveToDataParamRet(unsigned int var)
81 {
82 __asm("mov d2, %0"::"d"(var));
83 }
84
85 IFX_INLINE void Ifx__jumpToFunction(const void *fun)
86 {
87 Ifx__non_return_call(fun);
88 }
89
90 IFX_INLINE void Ifx__jumpToFunctionWithLink(const void *fun)
91 {
92 Ifx__jump_and_link((void (*)(void))fun);
93 }
94
95 IFX_INLINE void Ifx__jumpBackToLink(void)
96 {
97 __asm("ji a11");
98 }
99 #endif
100 /** \defgroup IfxLld_Cpu_Intrinsics_Tasking_any_type Cross type arithmetic operation
101 *
102 * Macro compatible with float, fix point, signed integer and unsigned integer
103 *
104 * \ingroup IfxLld_Cpu_Intrinsics_Tasking
105 * \{
106 */
107 #define Ifx__minX(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
108 #define Ifx__maxX(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
109 #define Ifx__saturateX(X,Min,Max) ( Ifx__minX(Ifx__maxX(X, Min), Max) )
110 #define Ifx__checkrangeX(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
111 /** \} */
112
113 /** \defgroup IfxLld_Cpu_Intrinsics_Tasking_singed_integer Signed integer operation
114 * \ingroup IfxLld_Cpu_Intrinsics_Tasking
115 * \{
116 */
117 #define Ifx__saturate(X,Min,Max) ( __min(__max(X, Min), Max) )
118 /** \} */
119
120 /** \defgroup IfxLld_Cpu_Intrinsics_Tasking_unsinged_integer Unsigned integer operation
121 * \ingroup IfxLld_Cpu_Intrinsics_Tasking
122 * \{
123 */
124 #define Ifx__saturateu(X,Min,Max) ( __minu(__maxu(X, Min), Max) )
125 /** \} */
126
127 /** \defgroup IfxLld_Cpu_Intrinsics_Tasking_float Floating point operation
128 * \ingroup IfxLld_Cpu_Intrinsics_Tasking
129 * \{
130 */
131 #define Ifx__checkrange(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
132
133 #define Ifx__sqrf(X) ((X) * (X))
134 #define Ifx__sqrtf(X) sqrtf(X)
135
136 #define Ifx__roundf(X) ((((X) - (int)(X)) > 0.5) ? (1 + (int)(X)) : ((int)(X)))
137 #define Ifx__absf(X) ( ((X) < 0.0) ? -(X) : (X) )
138 #define Ifx__minf(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
139 #define Ifx__maxf(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
140 #define Ifx__saturatef(X,Min,Max) ( Ifx__minf(_Ifx_maxf(X, Min), Max) )
141 #define Ifx__checkrangef(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
142
143 #define Ifx__abs_stdreal(X) ( ((X) > 0.0) ? (X) : -(X) )
144 #define Ifx__min_stdreal(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
145 #define Ifx__max_stdreal(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
146 #define Ifx__saturate_stdreal(X,Min,Max) ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )
147
148 #define Ifx__neqf(X,Y) ( ((X) > (Y)) || ((X) < (Y)) ) /**< X != Y */
149 #define Ifx__leqf(X,Y) ( !((X) > (Y)) ) /**< X <= Y */
150 #define Ifx__geqf(X,Y) ( !((X) < (Y)) ) /**< X >= Y */
151 /** \} */
152 /** \defgroup IfxLld_Cpu_Intrinsics_Tasking_fractional Fractional Arithmetic Support
153 The next table provides an overview of intrinsic functions to convert fractional values. Note that the
154 TASKING VX-toolset C compiler for TriCore fully supports the fractional type so normally you should not
155 need these intrinsic functions (except for __mulfractlong). For compatibility reasons the TASKING C
156 compiler does support these functions.
157 * \ingroup IfxLld_Cpu_Intrinsics_Tasking
158 * \{
159 */
160 #define Ifx__fract_to_float(value) ((float)(value))
161
162 #define Ifx__mulfractlong __mulfractlong
163
164 #define Ifx__mulfractfract(fractvalue1,fractvalue2) ((fractvalue1)*(fractvalue2))
165
166 /** \} */
167
168 /** \defgroup IfxLld_Cpu_Intrinsics_Tasking_insert Insert / Extract Bit-fields and Bits
169 * \ingroup IfxLld_Cpu_Intrinsics_Tasking
170 * \{
171 */
172
173 #define Ifx__extru(a, p, w) __extru(a,p,w)
174
175 #define Ifx__extr(a, p, w) __extr(a,p,w)
176
177 #define Ifx__imaskldmst(a, v, b, p) __imaskldmst((int*)a, v, b, p)
178
179 #define Ifx__insert(a,b,p,w) __insert(a,b,p,w)
180
181 /** \} */
182
183 /** \defgroup IfxLld_Cpu_Intrinsics_Tasking_interrupt_handling Interrupt Handling
184 The next table provides an overview of the intrinsic functions to read or set interrupt handling.
185 * \ingroup IfxLld_Cpu_Intrinsics_Tasking
186 * \{
187 */
188 #define Ifx__disable_and_save __disable_and_save
189
190 #define Ifx__restore __restore
191
192 /** \} */
193
194 /** \defgroup IfxLld_Cpu_Intrinsics_Tasking_miscellaneous Miscellaneous Intrinsic Functions
195 * \ingroup IfxLld_Cpu_Intrinsics_Tasking
196 * \{
197 */
198
199 /** \} */
200
201 /** \defgroup IfxLld_Cpu_Intrinsics_Tasking_packed Packed Data Type Support
202 The next table provides an overview of the intrinsic functions for initialization of packed data type.
203 * \ingroup IfxLld_Cpu_Intrinsics_Tasking
204 * \{
205 */
206
207 /** \} */
208
209 #ifndef __cplusplus
210 /** \defgroup IfxLld_Cpu_Intrinsics_Tasking_register Register Handling
211 The next table provides an overview of the intrinsic functions that you can use to access control registers.
212 * \ingroup IfxLld_Cpu_Intrinsics_Tasking
213 * \{
214 */
215 #define Ifx__mtcr_no_isync(reg, val) \
216 __asm("mtcr %0,%1"::"i"(reg),"d"(val));
217
218 /** \} */
219
220 /** \defgroup IfxLld_Cpu_Intrinsics_Tasking_saturation Saturation Arithmetic Support
221 These intrinsics support saturation arithmetic
222 * \ingroup IfxLld_Cpu_Intrinsics_Tasking
223 * \{
224 */
225
226 #define Ifx__adds(a,b) ((__sat int)(a)+(__sat int)(b))
227
228 #define Ifx__addsu(a,b) ((__sat unsigned int)(a)+(__sat unsigned int)(b))
229
230 #define Ifx__subs(a,b) ((__sat int)(a)-(__sat int)(b))
231
232 #define Ifx__subsu(a,b) ((__sat unsigned int )(a)-(__sat unsigned int )(b))
233
234 /** \} */
235
236 /** \defgroup IfxLld_Cpu_Intrinsics_Tasking_single_assembly Insert Single Assembly Instruction
237 The next table provides an overview of the intrinsic functions that you can use to insert a single assembly
238 instruction.You can also use inline assembly but these intrinsics provide a shorthand for frequently used
239 assembly instructions.
240 * \ingroup IfxLld_Cpu_Intrinsics_Tasking
241 * \{
242 */
243
244 IFX_INLINE void Ifx__nops(void* cnt)
245 {
246 __asm("nop16 \n\t"
247 "loop %0,*-2"
248 ::"a"(((char*)cnt) - 1));
249 }
250
251 #define Ifx__NOP(n) __asm(".DUP " #n "\n\tnop16\n\t.ENDM\n")
252
253 /** Insert a memory barrier
254 */
255 #define Ifx__mem_barrier __asm("":::"memory");
256
257 #if CPU_NO_LDMST
258 IFX_INLINE void Ifx__ldmstC(volatile void *addr, uint32 mask, uint32 data)
259 {
260 *(volatile uint32 *)addr = (*(volatile uint32 *)addr & ~mask) | (mask & data);
261 }
262
263 #define Ifx__ldmst(a,b,c) Ifx__ldmstC(a,b,c)
264 #else
265
266 IFX_INLINE void Ifx__ldmstAsm(volatile void *addr, uint32 mask, uint32 data)
267 {
268 __asm("\tmov d3, %1 \n"
269 "\tmov d2, %2 \n"
270 "\tldmst [%0],e2"
271 ::"a"(addr), "d"(mask), "d"(data):"d2", "d3");
272
273 }
274
275 /** Convert float to fract
276 */
277 IFX_INLINE fract Ifx__float_to_fract(float a)
278 {
279 fract res;
280 __asm("ftoq31 %0,%1,%2":"=d"(res):"d"(a), "d"(0):"memory");
281 return res;
282 }
283
284 #define Ifx__fract_to_sfract __round16
285
286 /** Convert float to sfract
287 */
288 IFX_INLINE sfract Ifx__float_to_sfract(float a)
289 {
290 fract tmp = Ifx__float_to_fract(a);
291 return Ifx__fract_to_sfract(tmp);
292 }
293
294 #define Ifx__ldmst(addr, mask, data) Ifx__ldmstAsm(addr, mask, data)
295 #endif
296
297 IFX_INLINE void Ifx__stopPerfCounters(void)
298 { //__mtcr (CPU_CCTRL, 0);
299 __asm(
300 " mov d0,#0\n"
301 " mtcr #0xFC00,d0\n"
302 " isync\n"
303 :::"d0");
304 }
305
306 /** \} */
307
308 /* FIXME use inline instead of #define */
309 /* FIXME is it really required to have #define __setareg(areg,val) ___setareg(areg,val) or can __setareg() implemented directly */
310 #define Ifx___setareg(areg,val) \
311 { __asm (" movh.a\t "#areg",#@his("#val")\n lea\t "#areg",["#areg"]@los("#val")"); }
312 #define Ifx__setareg(areg,val) Ifx___setareg(areg,val)
313
314 /** \brief This function is a implementation of a binary semaphore using compare and swap instruction
315 * \param address address of resource.
316 * \param value This variable is updated with status of address
317 * \param condition if the value of address matches with the value of condition, then swap of value & address occurs.
318 *
319 */
320 #define Ifx__cmpAndSwap(address,value,condition) \
321 __cmpswapw((address), ((unsigned long)value), (condition) )
322
323 /** \brief Convert a fixpoint value to float32
324 *
325 * This function converts a value from a fixpoint format to a float32 format.
326 *
327 *
328 * \param value value to be converted.
329 * \param shift position of the fix point. Range = [-256, 255] => (Qx.y format where x = shift+1).
330 *
331 * \return Returns the converted value in the float32 format.
332 *
333 */
334 IFX_INLINE float32 Ifx__fixpoint_to_float32(fract value, sint32 shift)
335 {
336 float32 result;
337
338 __asm(
339 " q31tof\t%0, %1, %2 \n"
340 : "=d" (result)
341 : "d" (value), "d" (shift));
342 return result;
343 }
344
345 IFX_INLINE void* Ifx__getA11(void)
346 {
347 unsigned int *res;
348 __asm("mov.aa %0, a11": "=a" (res) : :"a11");
349 return res;
350 }
351
352 IFX_INLINE void Ifx__setStackPointer(void *stackAddr)
353 {
354 __asm("mov.aa a10, %0": : "a" (stackAddr) :"a10");
355 }
356
357 IFX_INLINE uint32 IfxCpu_calculateCrc32(uint32 *startaddress, uint8 length)
358 {
359 uint32 returnvalue;
360 __asm("MOV d0, #0x0"); /* set seed value to 0 */
361 for (;length > 0; length--)
362 {
363 /*calculate the CRC over all data */
364 __asm("MOV d1,%0" : : "d" (*startaddress));
365 __asm("CRC32B.W d0,d0,d1");
366 startaddress++;
367 }
368 __asm("MOV %0,d0" : "=d" (returnvalue)); /* return result of CRC*/
369 return returnvalue;
370 }
371
372 IFX_INLINE uint32 IfxCpu_getRandomVal(uint32 a, uint32 x, uint32 m)
373 {
374 uint32 result;
375 __asm(" mul.u e14,%1,%2 ; d15 = Eh; d14 = El \n"
376 " mov d12,d14 ; e12 = El \n"
377 " mov d13,#0 ; \n"
378 " madd.u e14,e12,d15,#5 ; e14 = El + 5 * d15 \n"
379 " 1: jge.u d14,%3,2n ; \n"
380 " jz d15,3n ; \n"
381 " 2: subx d14,d14,%3 ; e12=e12-m \n"
382 " subc d15,d15,d13 ; d13=d13-0 \n"
383 " loopu 1p ; \n"
384 " 3: mov %0,d14 ; \n"
385 : "=d"(result) : "d"(a), "d"(x), "d"(m) : "e14","e12");
386 return result;
387 }
388
389 IFX_INLINE sint32 Ifx__popcnt(sint32 a)
390 {
391 sint32 res;
392 __asm("popcnt.w %0,%1":"=d"(res):"d"(a));
393 return res;
394 }
395 #endif
396
397 /* Macros for backward compatibility of the intrinsics*/
398 /******************************************************************************/
399 #ifndef IFX_CFG_DISABLE_DEFAULT_INTRINSICS
400 #ifndef __non_return_call
401 #define __non_return_call Ifx__non_return_call
402 #endif
403
404 #ifndef __jump_and_link
405 #define __jump_and_link Ifx__jump_and_link
406 #endif
407
408 #ifndef __moveToDataParam0
409 #define __moveToDataParam0 Ifx__moveToDataParam0
410 #endif
411
412 #ifndef __moveToAddrParam0
413 #define __moveToAddrParam0 Ifx__moveToAddrParam0
414 #endif
415
416 #ifndef __getDataParamRet
417 #define __getDataParamRet Ifx__getDataParamRet
418 #endif
419
420 #ifndef __moveToDataParamRet
421 #define __moveToDataParamRet Ifx__moveToDataParamRet
422 #endif
423
424 #ifndef __jumpToFunction
425 #define __jumpToFunction Ifx__jumpToFunction
426 #endif
427
428 #ifndef __jumpToFunctionWithLink
429 #define __jumpToFunctionWithLink Ifx__jumpToFunctionWithLink
430 #endif
431
432 #ifndef __jumpBackToLink
433 #define __jumpBackToLink Ifx__jumpBackToLink
434 #endif
435
436 #ifndef __minX
437 #define __minX Ifx__minX
438 #endif
439
440 #ifndef __maxX
441 #define __maxX Ifx__maxX
442 #endif
443
444 #ifndef __saturateX
445 #define __saturateX Ifx__saturateX
446 #endif
447
448 #ifndef __checkrangeX
449 #define __checkrangeX Ifx__checkrangeX
450 #endif
451
452 #ifndef __saturate
453 #define __saturate Ifx__saturate
454 #endif
455
456 #ifndef __saturateu
457 #define __saturateu Ifx__saturateu
458 #endif
459
460 #ifndef __checkrange
461 #define __checkrange Ifx__checkrange
462 #endif
463
464 #ifndef __sqrtf
465 #define __sqrtf Ifx__sqrtf
466 #endif
467
468 #ifndef __sqrf
469 #define __sqrf Ifx__sqrf
470 #endif
471
472 #ifndef __roundf
473 #define __roundf Ifx__roundf
474 #endif
475
476 #ifndef __absf
477 #define __absf Ifx__absf
478 #endif
479
480 #ifndef __maxf
481 #define __maxf Ifx__maxf
482 #endif
483
484 #ifndef __saturatef
485 #define __saturatef Ifx__saturatef
486 #endif
487
488 #ifndef __minf
489 #define __minf Ifx__minf
490 #endif
491
492 #ifndef __checkrangef
493 #define __checkrangef Ifx__checkrangef
494 #endif
495
496 #ifndef __abs_stdreal
497 #define __abs_stdreal Ifx__abs_stdreal
498 #endif
499
500 #ifndef __saturate_stdreal
501 #define __saturate_stdreal Ifx__saturate_stdreal
502 #endif
503
504 #ifndef __min_stdreal
505 #define __min_stdreal Ifx__min_stdreal
506 #endif
507
508 #ifndef __max_stdreal
509 #define __max_stdreal Ifx__max_stdreal
510 #endif
511
512 #ifndef __neqf
513 #define __neqf Ifx__neqf
514 #endif
515
516 #ifndef __leqf
517 #define __leqf Ifx__leqf
518 #endif
519
520 #ifndef __geqf
521 #define __geqf Ifx__geqf
522 #endif
523
524 #ifndef __fract_to_float
525 #define __fract_to_float Ifx__fract_to_float
526 #endif
527
528 #ifndef __mulfractlong
529 #define __mulfractlong Ifx__mulfractlong
530 #endif
531
532 #ifndef __mulfractfract
533 #define __mulfractfract Ifx__mulfractfract
534 #endif
535
536 #ifndef __disable_and_save
537 #define __disable_and_save Ifx__disable_and_save
538 #endif
539
540 #ifndef __restore
541 #define __restore Ifx__restore
542 #endif
543
544 #ifndef __mtcr_no_isync
545 #define __mtcr_no_isync Ifx__mtcr_no_isync
546 #endif
547
548 #ifndef __adds
549 #define __adds Ifx__adds
550 #endif
551
552 #ifndef __addsu
553 #define __addsu Ifx__addsu
554 #endif
555
556 #ifndef __subs
557 #define __subs Ifx__subs
558 #endif
559
560 #ifndef __subsu
561 #define __subsu Ifx__subsu
562 #endif
563
564 #ifndef __nops
565 #define __nops Ifx__nops
566 #endif
567
568 #if ((!defined(NOP)) && (!defined(IFX_CFG_DISABLE_DEFAULT_INTRINSICS)))
569 #define NOP Ifx__NOP
570 #endif
571
572 #ifndef __mem_barrier
573 #define __mem_barrier Ifx__mem_barrier
574 #endif
575
576 #ifndef __ldmst
577 #define __ldmst Ifx__ldmst
578 #endif
579
580 #ifndef __ldmstC
581 #define __ldmstC Ifx__ldmstC
582 #endif
583
584 #ifndef __float_to_sfract
585 #define __float_to_sfract Ifx__float_to_sfract
586 #endif
587
588 #ifndef __float_to_fract
589 #define __float_to_fract Ifx__float_to_fract
590 #endif
591
592 #ifndef __fract_to_sfract
593 #define __fract_to_sfract Ifx__fract_to_sfract
594 #endif
595
596 #ifndef __ldmstAsm
597 #define __ldmstAsm Ifx__ldmstAsm
598 #endif
599
600 #ifndef __stopPerfCounters
601 #define __stopPerfCounters Ifx__stopPerfCounters
602 #endif
603
604 #ifndef __setareg
605 #define __setareg Ifx__setareg
606 #endif
607
608 #ifndef ___setareg
609 #define ___setareg Ifx___setareg
610 #endif
611
612 #ifndef __cmpAndSwap
613 #define __cmpAndSwap Ifx__cmpAndSwap
614 #endif
615
616 #ifndef __fixpoint_to_float32
617 #define __fixpoint_to_float32 Ifx__fixpoint_to_float32
618 #endif
619
620 #ifndef __getA11
621 #define __getA11 Ifx__getA11
622 #endif
623
624 #ifndef __setStackPointer
625 #define __setStackPointer Ifx__setStackPointer
626 #endif
627
628 #ifndef __popcnt
629 #define __popcnt Ifx__popcnt
630 #endif
631
632 #endif
633 /******************************************************************************/
634 /* *INDENT-ON* */
635 /******************************************************************************/
636 #endif /* IFXCPU_INTRINSICSTASKING_H */
Ifx__moveToDataParam0
IFX_INLINE void Ifx__moveToDataParam0(unsigned int var)
Definition: IfxCpu_IntrinsicsTasking.h:63
Ifx__jumpToFunctionWithLink
IFX_INLINE void Ifx__jumpToFunctionWithLink(const void *fun)
Definition: IfxCpu_IntrinsicsTasking.h:90
Ifx__stopPerfCounters
IFX_INLINE void Ifx__stopPerfCounters(void)
Definition: IfxCpu_IntrinsicsTasking.h:297
sfract
short sfract
Definition: Ifx_TypesDcc.h:45
IfxCpu_getRandomVal
IFX_INLINE uint32 IfxCpu_getRandomVal(uint32 a, uint32 x, uint32 m)
Definition: IfxCpu_IntrinsicsTasking.h:372
uint32
unsigned long uint32
Definition: Platform_Types.h:116
float32
float float32
Definition: Platform_Types.h:170
Ifx__jumpBackToLink
IFX_INLINE void Ifx__jumpBackToLink(void)
Definition: IfxCpu_IntrinsicsTasking.h:95
Ifx__getA11
IFX_INLINE void * Ifx__getA11(void)
Definition: IfxCpu_IntrinsicsTasking.h:345
fract
long fract
Definition: Ifx_TypesDcc.h:44
Ifx__jumpToFunction
IFX_INLINE void Ifx__jumpToFunction(const void *fun)
Definition: IfxCpu_IntrinsicsTasking.h:85
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
Ifx__moveToDataParamRet
IFX_INLINE void Ifx__moveToDataParamRet(unsigned int var)
Definition: IfxCpu_IntrinsicsTasking.h:80
IfxCpu_calculateCrc32
IFX_INLINE uint32 IfxCpu_calculateCrc32(uint32 *startaddress, uint8 length)
Definition: IfxCpu_IntrinsicsTasking.h:357
Ifx__fract_to_sfract
#define Ifx__fract_to_sfract
Definition: IfxCpu_IntrinsicsTasking.h:284
Ifx__non_return_call
#define Ifx__non_return_call(fun)
Definition: IfxCpu_IntrinsicsTasking.h:54
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
Ifx__nops
IFX_INLINE void Ifx__nops(void *cnt)
Definition: IfxCpu_IntrinsicsTasking.h:244
Ifx__fixpoint_to_float32
IFX_INLINE float32 Ifx__fixpoint_to_float32(fract value, sint32 shift)
Convert a fixpoint value to float32.
Definition: IfxCpu_IntrinsicsTasking.h:334
Ifx__float_to_fract
IFX_INLINE fract Ifx__float_to_fract(float a)
Definition: IfxCpu_IntrinsicsTasking.h:277
Ifx__ldmstAsm
IFX_INLINE void Ifx__ldmstAsm(volatile void *addr, uint32 mask, uint32 data)
Definition: IfxCpu_IntrinsicsTasking.h:266
sint32
long sint32
Definition: Platform_Types.h:134
Ifx__getDataParamRet
IFX_INLINE unsigned int Ifx__getDataParamRet(void)
Definition: IfxCpu_IntrinsicsTasking.h:73
Ifx__moveToAddrParam0
IFX_INLINE void Ifx__moveToAddrParam0(const void *var)
Definition: IfxCpu_IntrinsicsTasking.h:68
Ifx__popcnt
IFX_INLINE sint32 Ifx__popcnt(sint32 a)
Definition: IfxCpu_IntrinsicsTasking.h:389
Ifx__float_to_sfract
IFX_INLINE sfract Ifx__float_to_sfract(float a)
Definition: IfxCpu_IntrinsicsTasking.h:288
Ifx__jump_and_link
IFX_INLINE void Ifx__jump_and_link(void(*fun)(void))
Definition: IfxCpu_IntrinsicsTasking.h:58
uint8
unsigned char uint8
Definition: Platform_Types.h:108
Ifx__setStackPointer
IFX_INLINE void Ifx__setStackPointer(void *stackAddr)
Definition: IfxCpu_IntrinsicsTasking.h:352


iLLD_TC38A: IfxCpu_Irq.c Source File

  • Cpu
  • Irq
IfxCpu_Irq.c
Go to the documentation of this file.
1 /**
2 * \file IfxCpu_Irq.c
3 * \brief This file contains the APIs for Interrupt related functions.
4 *
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 */
43
44 /*******************************************************************************
45 ** Includes **
46 *******************************************************************************/
47 #include "Cpu/Irq/IfxCpu_Irq.h"
48 #include "Tricore/Compilers/Compilers.h"
49 #include "Cpu/Std/IfxCpu_Intrinsics.h"
50 #include "IfxCpu_reg.h"
51
52 /*******************************************************************************
53 ** Private macros **
54 *******************************************************************************/
55
56 /*******************************************************************************
57 ** Global variables/constants **
58 *******************************************************************************/
59 #if defined(IFX_USE_SW_MANAGED_INT)
60
61 typedef void (*Ifx_Isr)(void);
62
63 BEGIN_DATA_SECTION(.bss_cpu0)
64 static Ifx_Isr IfxCpu_Irq_swIntVector0[256];
65 END_DATA_SECTION
66
67 BEGIN_DATA_SECTION(.bss_cpu1)
68 static Ifx_Isr IfxCpu_Irq_swIntVector1[256];
69 END_DATA_SECTION
70
71 BEGIN_DATA_SECTION(.bss_cpu2)
72 static Ifx_Isr IfxCpu_Irq_swIntVector2[256];
73 END_DATA_SECTION
74
75 BEGIN_DATA_SECTION(.bss_cpu3)
76 static Ifx_Isr IfxCpu_Irq_swIntVector3[256];
77 END_DATA_SECTION
78
79 #ifndef IFX_CFG_CPU_IRQ_DEBUG
80 #define IFX_CFG_CPU_IRQ_DEBUG __debug()
81 #endif
82
83 #endif /*defined(IFX_USE_SW_MANAGED_INT) */
84
85 /*******************************************************************************
86 ** Global Function definitions **
87 *******************************************************************************/
88 #if defined(IFX_USE_SW_MANAGED_INT)
89
90 /** \brief API to install the interrupt service routine for Software Managed Interrupts.
91 *
92 */
93 void IfxCpu_Irq_installInterruptHandler(void *isrFuncPointer, uint32 serviceReqPrioNumber)
94 {
95 switch (IfxCpu_Irq_getTos(IfxCpu_getCoreIndex()))
96 {
97 case IfxSrc_Tos_cpu0:
98 IfxCpu_Irq_swIntVector0[serviceReqPrioNumber] = (Ifx_Isr)isrFuncPointer;
99 break;
100 case IfxSrc_Tos_cpu1:
101 IfxCpu_Irq_swIntVector1[serviceReqPrioNumber] = (Ifx_Isr)isrFuncPointer;
102 break;
103 case IfxSrc_Tos_cpu2:
104 IfxCpu_Irq_swIntVector2[serviceReqPrioNumber] = (Ifx_Isr)isrFuncPointer;
105 break;
106 case IfxSrc_Tos_cpu3:
107 IfxCpu_Irq_swIntVector3[serviceReqPrioNumber] = (Ifx_Isr)isrFuncPointer;
108 break;
109 case IfxSrc_Tos_dma:
110 break;
111 default:
112 break;
113 }
114 }
115
116
117 /** SW managed Interrupt vector tables
118 *
119 * These are vector tables with single entry for Software Managed Interrupts defined for each core.
120 * This function need to be located at boundary 0xXFE0 where (X=1,3,5 and so on). For the software managed
121 * interrupts to work correctly, the BIV must be set to address of this function.
122 *
123 */
124 IFX_INTERRUPT_INTERNAL(IfxCpu_Irq_intVecTable0, 0, 255)
125 {
126 Ifx_CPU_ICR icr;
127
128 icr.U = __mfcr(CPU_ICR); /*Fetch the ICR value */
129
130 /*Call the ISR */
131 if(IfxCpu_Irq_swIntVector0[icr.B.CCPN])
132 {
133 IfxCpu_Irq_swIntVector0[icr.B.CCPN]();
134 }
135 else
136 {
137 IFX_CFG_CPU_IRQ_DEBUG;
138 }
139 }
140
141 IFX_INTERRUPT_INTERNAL(IfxCpu_Irq_intVecTable1, 1, 255)
142 {
143 Ifx_CPU_ICR icr;
144
145 icr.U = __mfcr(CPU_ICR); /*Fetch the ICR value */
146
147 /*Call the ISR */
148 if(IfxCpu_Irq_swIntVector1[icr.B.CCPN])
149 {
150 IfxCpu_Irq_swIntVector1[icr.B.CCPN]();
151 }
152 else
153 {
154 IFX_CFG_CPU_IRQ_DEBUG;
155 }
156 }
157
158 IFX_INTERRUPT_INTERNAL(IfxCpu_Irq_intVecTable2, 2, 255)
159 {
160 Ifx_CPU_ICR icr;
161
162 icr.U = __mfcr(CPU_ICR); /*Fetch the ICR value */
163
164 /*Call the ISR */
165 if(IfxCpu_Irq_swIntVector2[icr.B.CCPN])
166 {
167 IfxCpu_Irq_swIntVector2[icr.B.CCPN]();
168 }
169 else
170 {
171 IFX_CFG_CPU_IRQ_DEBUG;
172 }
173 }
174
175 IFX_INTERRUPT_INTERNAL(IfxCpu_Irq_intVecTable3, 3, 255)
176 {
177 Ifx_CPU_ICR icr;
178
179 icr.U = __mfcr(CPU_ICR); /*Fetch the ICR value */
180
181 /*Call the ISR */
182 if(IfxCpu_Irq_swIntVector3[icr.B.CCPN])
183 {
184 IfxCpu_Irq_swIntVector3[icr.B.CCPN]();
185 }
186 else
187 {
188 IFX_CFG_CPU_IRQ_DEBUG;
189 }
190 }
191
192
193 #endif /*defined(IFX_USE_SW_MANAGED_INT) */
194
195 /** \brief API to get type of service of the caller CPU.
196 *
197 */
198 IfxSrc_Tos IfxCpu_Irq_getTos(IfxCpu_ResourceCpu coreId)
199 {
200 const IfxSrc_Tos tos[IFXCPU_NUM_MODULES] = {
201 IfxSrc_Tos_cpu0, IfxSrc_Tos_cpu1,
202 IfxSrc_Tos_cpu2, IfxSrc_Tos_cpu3,
203 };
204
205 return tos[coreId];
206 }
IfxSrc_Tos_cpu1
CPU1 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:70
IfxCpu_Irq_getTos
IfxSrc_Tos IfxCpu_Irq_getTos(IfxCpu_ResourceCpu coreId)
API to get type of service of the caller CPU.
Definition: IfxCpu_Irq.c:198
__mfcr
sint32 __mfcr(const uint32) __attribute__((intrinsic_function(0x101
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxCpu_Intrinsics.h
IfxCpu_ResourceCpu
IfxCpu_ResourceCpu
List of the available CPU resources.
Definition: IfxCpu_cfg.h:157
IfxSrc_Tos_dma
DMA interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:69
IfxSrc_Tos_cpu2
CPU2 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:71
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:68
IFX_INTERRUPT_INTERNAL
#define IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio)
Definition: CompilerDcc.h:124
IfxSrc_Tos_cpu3
CPU3 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:72
Compilers.h
IfxCpu_getCoreIndex
IFX_INLINE IfxCpu_ResourceCpu IfxCpu_getCoreIndex(void)
API to get cpu index of the caller CPU. Note: This api can be used whereever cpu no/index is needed...
Definition: IfxCpu.h:871
IfxCpu_Irq.h
This file contains the APIs for Interrupt related functions.
IFXCPU_NUM_MODULES
#define IFXCPU_NUM_MODULES
CPU count.
Definition: IfxCpu_cfg.h:65


iLLD_TC38A: IfxCpu_Irq.h Source File

  • Cpu
  • Irq
IfxCpu_Irq.h
Go to the documentation of this file.
1 /**
2 * \file IfxCpu_Irq.h
3 * \brief This file contains the APIs for Interrupt related functions.
4 *
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Cpu_Irq Interrupt Functions
42 * \ingroup IfxLld_Cpu
43 *
44 * \defgroup IfxLld_Cpu_Irq_Usage How to define Interrupts?
45 * \ingroup IfxLld_Cpu_Irq
46 *
47 */
48 #ifndef IFXCPU_IRQ_H_
49 #define IFXCPU_IRQ_H_
50
51 /*******************************************************************************
52 ** Includes **
53 *******************************************************************************/
54 #include "Ifx_Cfg.h"
55 #include "Cpu/Std/Ifx_Types.h"
56 #include "Cpu/Std/IfxCpu.h"
57 #include "Src/Std/IfxSrc.h"
58 /*******************************************************************************
59 ** Type definitions **
60 *******************************************************************************/
61
62 /*******************************************************************************
63 ** Global Exported variables/constants **
64 *******************************************************************************/
65
66 /*******************************************************************************
67 ** Global Exported macros/inlines/function ptototypes **
68 *******************************************************************************/
69
70 #if defined(IFX_USE_SW_MANAGED_INT)
71 /** \addtogroup IfxLld_Cpu_Irq_Usage
72 * \{ */
73 /** \brief API for Interrupt handler install for SW Managed interrupts.
74 * This API installs the isr to SW interrupt vector.
75 * This must be used only when IFX_USE_SW_MANAGED_INT is defined in Ifx_Cfg.h
76 *
77 * \param isrFuncPointer pointer to ISR function.
78 * \param serviceReqPrioNumber ISR priority.
79 */
80
81 IFX_EXTERN void IfxCpu_Irq_installInterruptHandler(void *isrFuncPointer, uint32 serviceReqPrioNumber);
82
83 IFX_INLINE void interruptHandlerInstall(uint32 srpn, uint32 addr)
84 {
85 IfxCpu_Irq_installInterruptHandler((void *)addr, srpn);
86 }
87
88
89 /** \} */
90 #endif /*defined(IFX_USE_SW_MANAGED_INT) */
91
92 /** \addtogroup IfxLld_Cpu_Irq_Usage
93 * \{ */
94 /** \brief API to get type of service of the caller CPU.
95 * \param coreId core id of the core
96 * \return type of service for the corresponding CPU.
97 */
98 IFX_EXTERN IfxSrc_Tos IfxCpu_Irq_getTos(IfxCpu_ResourceCpu coreId);
99
100 /** \} */
101
102 /*Documentation */
103 /** \addtogroup IfxLld_Cpu_Irq_Usage
104 * \{
105 *
106 * This page describes how to use interrupts with application framework.\n
107 *
108 * \section IfxLld_Cpu_Irq_Terminology Interrupts Terminology:
109 * \subsection IfxLld_Cpu_Irq_HWManaged Hardware Managed Interrupt Mechanism.
110 * Hardware managed interrupts have static interrupt vector which are defined for each priority separately.
111 * These vectors have jump instruction to the interrupt handler.
112 *
113 * Advantages:\n
114 * This mechanism has less interrupt latency time.
115 *
116 * \subsection IfxLld_Cpu_Irq_SWManaged Software Managed Interrupt Mechanism.
117 * Software managed interrupts have single interrupt vector statically defined at vector position 255.
118 * This address is assigned to BIV during startup.\n
119 * For Tricore, this vector position is important, because whenever an interrupt occurs, with whichever priority,
120 * the execution control jumps to this vector position. The code at this vector position will:\n
121 * 1) fetch the priority of the targetted interrupt.\n
122 * 2) fetch the interrupt handler defined for this priority (this is done by Interrupt handler installation. Refer
123 * \ref IfxLld_Cpu_Irq_Step4\n
124 * 3) Then call the handler as notmal function call.
125 *
126 * Advantages:\n
127 * This kind of mechanism is useful when project wants to change the handler for an interrupt during runtime.
128 *
129 * Disadvantages:\n
130 * This mechanism has more interrupt latency time.
131 *
132 * of the interrupt and in tand jumps to the function
133 *
134 * \section IfxLld_Cpu_Irq_Steps Steps to use Interrupt Mechanism.
135 * Dependency: Ifx_Compilers, Ifx_Cpu, Ifx_Src, IfxCpu_Irq\n
136 * Following are the steps to use interrupt mechanism.
137 *
138 * \section IfxLld_Cpu_Irq_Step1 Step1: Define Interrupt priorities.
139 * Define priorities of all interrupts with names corresponding to their functionality. It is recommended to define
140 * such priority definitions in single header file, because it is easy to detect if ISR priorities are conflicting.
141 * In Tricore architecture, two Isrs can't have same priority at same point of time.
142 * \note These defines shall be defined without brackets surrounding priority number. (eg. #define PRIO (10) is not allowed)
143 *
144 * In a user defined file eg. Ifx_IntPrioDef.h, placed in folder: 0_AppSw/Tricore/DemoApp:
145 * \code
146 * //file: Ifx_IntPrioDef.h.
147 * #define IFX_INTPRIO_FUNCT1 1
148 * #define IFX_INTPRIO_FUNCT2 2
149 * #define IFX_INTPRIO_FUNCT3 5
150 * #define IFX_INTPRIO_STM0 8
151 * #define IFX_INTPRIO_ADC_FUNC1 10
152 * //etc.
153 * \endcode
154 *
155 * \note !! IMPORTANT !!\n As explained above, the definition with closing bracket around priority number as,
156 * #define IFX_INTPRIO_FUNCT1 (1) will cause compilation error. Because linker sections which are constructed
157 * using such information will also get these brackets included. Which look like ".intvec_tc0_(1)" instead of the
158 * expected ".intvec_tc0_1"\n
159 * Linker sections' definitions are predefined statically in .lsl file,
160 * for all 255 interrupts, with the format ".intvec_tc<vector number>_<interrupt priority>".
161 *
162 * \section IfxLld_Cpu_Irq_Step2 Step2: Define Type of interrupt mechanism.
163 * \subsection IfxLld_Cpu_Irq_HWManaged_Usage To use Hardware Managed Interrupt Mechanism.
164 * Refer \ref IfxLld_Cpu_Irq_HWManaged
165 * If project is designed for hardware managed interrupts, this feature is enabled at the file Ifx_Cfg.h, at path:
166 * 0_Src/0_AppSw/Config/Common/, as shown below. IFX_USE_SW_MANAGED_INT definition must be undefined (i.e. the
167 * statement "#define IFX_USE_SW_MANAGED_INT" shall be commented as below).
168 *
169 * \code
170 * //file: Ifx_Cfg.h
171 *
172 * //#define IFX_USE_SW_MANAGED_INT
173 *
174 * \endcode
175 *
176 * \subsection IfxLld_Cpu_Irq_SWManaged_Usage To use Software Managed Interrupt Mechanism.
177 * Refer \ref IfxLld_Cpu_Irq_SWManaged
178 * If project is designed for software managed interrupts, this feature is enabled at the file Ifx_Cfg.h, at path:
179 * 0_Src/0_AppSw/Config/Common/, as shown below.
180 * IFX_USE_SW_MANAGED_INT definition must be defined.
181 *
182 * \code
183 * //file: Ifx_Cfg.h
184 *
185 * #define IFX_USE_SW_MANAGED_INT
186 *
187 * \endcode
188 *
189 * Software managed interrupts must also install the "Interrupt Handlers" Refer \ref IfxLld_Cpu_Irq_Step4
190 *
191 * \section IfxLld_Cpu_Irq_Step3 Step3: How to define an Interrupt Service routine?
192 * Interrupt service routines or interrupt handlers are defined in driver specific files or application specific
193 * files.
194 *
195 * \code
196 * //file usercode1.c
197 * #include "Compilers.h" // to get the compiler abstracted macros for interrupt definition
198 * #include "Ifx_IntPrioDef.h" // to get the priority numbers
199 *
200 * //define an ISR with name Isr_Stm0 with priority defined by IFX_INTPRIO_STM0
201 * IFX_INTERRUPT (Isr_Stm0, 0, IFX_INTPRIO_STM0)
202 * {
203 * //Isr code here
204 * }
205 * \endcode
206 *
207 * \code
208 * //file usercode2.c
209 * #include "Compilers.h" // to get the compiler abstracted macros for interrupt definition
210 * #include "Ifx_IntPrioDef.h" // to get the priority numbers
211 *
212 * //define an ISR with name Isr_Adc_fun1 with priority defined by IFX_INTPRIO_ADC_FUNC1
213 * IFX_INTERRUPT (Isr_Adc_fun1, 0, IFX_INTPRIO_ADC_FUNC1)
214 * {
215 * //Isr code here
216 * }
217 * \endcode
218 *
219 * \section IfxLld_Cpu_Irq_Step4 Step4: How to install Interrupt Service routine/handler?
220 * This step is not required for HW managed interrupts.\n
221 * Interrupt service routines or interrupt handlers are installed in driver specific files or application specific
222 * files
223 *
224 * \code
225 * //file usermain.c
226 * #include "IfxCpu_Irq.h"
227 * #include "Ifx_IntPrioDef.h" // to get the priority numbers
228 *
229 * void userfunction_init(void)
230 * {
231 * //code for user function init
232 * // :
233 * // :
234 * IfxCpu_Irq_installInterruptHandler (Isr_Stm0, IFX_INTPRIO_STM0);
235 * IfxCpu_Irq_installInterruptHandler (Isr_Adc_fun1, IFX_INTPRIO_ADC_FUNC1);
236 *
237 * // :
238 * }
239 *
240 * \endcode
241 *
242 * \section IfxLld_Cpu_Irq_Step5 Step5: Managing the Service Request Node.
243 * For the interrupt to get activated, interrupt triggers are needed. These triggers are activated by peripheral modules
244 * and corresponding service request node must be\n
245 * 1) Configured with correct priority number\n
246 * 2) The request node must be enabled\n
247 * Refer to \ref IfxLld_Src_Usage
248 */
249
250 /** \} */
251 #endif /* IFXCPU_IRQ_H_ */
IfxCpu_Irq_getTos
IFX_EXTERN IfxSrc_Tos IfxCpu_Irq_getTos(IfxCpu_ResourceCpu coreId)
API to get type of service of the caller CPU.
Definition: IfxCpu_Irq.c:198
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxSrc.h
SRC basic functionality.
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxCpu_ResourceCpu
IfxCpu_ResourceCpu
List of the available CPU resources.
Definition: IfxCpu_cfg.h:157
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxCpu.h
CPU basic functionality.


iLLD_TC38A: IfxCpu_Trap.c Source File

  • Cpu
  • Trap
IfxCpu_Trap.c
Go to the documentation of this file.
1 /**
2 * \file IfxCpu_Trap.c
3 * \brief This file contains the APIs for Trap related functions.
4 *
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 */
43
44 /*******************************************************************************
45 ** Includes **
46 *******************************************************************************/
47 #include "IfxCpu_Trap.h"
48 #include "Cpu/Std/IfxCpu.h"
49 #include "Cpu/Std/IfxCpu_Intrinsics.h"
50 #include "IfxCpu_reg.h"
51 #include "Ifx_Cfg.h"
52 #ifdef IFX_CFG_EXTEND_TRAP_HOOKS
53 #include "Ifx_Cfg_Trap.h"
54 #endif
55
56 /******************************************************************************/
57 /* Macros */
58 /******************************************************************************/
59 /** \brief Configuration for CpuX enable.
60 *
61 */
62 #ifndef IFX_CFG_CPU_TRAP_TSR_HOOK
63 # define IFX_CFG_CPU_TRAP_TSR_HOOK(trapWatch) /**< By default macro is empty*/
64 #endif
65 #ifndef IFX_CFG_CPU_TRAP_SYSCALL_CPU0_HOOK
66 # define IFX_CFG_CPU_TRAP_SYSCALL_CPU0_HOOK(trapWatch) ((void)trapWatch) /**< By default macro is empty*/
67 #endif
68 #ifndef IFX_CFG_CPU_TRAP_SYSCALL_CPU1_HOOK
69 # define IFX_CFG_CPU_TRAP_SYSCALL_CPU1_HOOK(trapWatch) ((void)trapWatch) /**< By default macro is empty*/
70 #endif
71 #ifndef IFX_CFG_CPU_TRAP_SYSCALL_CPU2_HOOK
72 # define IFX_CFG_CPU_TRAP_SYSCALL_CPU2_HOOK(trapWatch) ((void)trapWatch) /**< By default macro is empty*/
73 #endif
74 #ifndef IFX_CFG_CPU_TRAP_SYSCALL_CPU3_HOOK
75 # define IFX_CFG_CPU_TRAP_SYSCALL_CPU3_HOOK(trapWatch) ((void)trapWatch) /**< By default macro is empty*/
76 #endif
77 #ifndef IFX_CFG_CPU_TRAP_SYSCALL_CPU4_HOOK
78 # define IFX_CFG_CPU_TRAP_SYSCALL_CPU4_HOOK(trapWatch) ((void)trapWatch) /**< By default macro is empty*/
79 #endif
80 #ifndef IFX_CFG_CPU_TRAP_SYSCALL_CPU5_HOOK
81 # define IFX_CFG_CPU_TRAP_SYSCALL_CPU5_HOOK(trapWatch) ((void)trapWatch) /**< By default macro is empty*/
82 #endif
83 #ifndef IFX_CFG_CPU_TRAP_NMI_HOOK
84 # define IFX_CFG_CPU_TRAP_NMI_HOOK(trapWatch) ((void)trapWatch) /**< By default NMI macro is empty*/
85 #endif
86 #ifndef IFX_CFG_CPU_TRAP_MME_HOOK
87 # define IFX_CFG_CPU_TRAP_MME_HOOK(trapWatch) ((void)trapWatch) /**< By default memory Management Error macro is empty*/
88 #endif
89 #ifndef IFX_CFG_CPU_TRAP_IPE_HOOK
90 # define IFX_CFG_CPU_TRAP_IPE_HOOK(trapWatch) ((void)trapWatch) /**< By default internal Protection Error macro is empty*/
91 #endif
92 #ifndef IFX_CFG_CPU_TRAP_IE_HOOK
93 # define IFX_CFG_CPU_TRAP_IE_HOOK(trapWatch) ((void)trapWatch) /**< By default instruction Error macro is empty*/
94 #endif
95 #ifndef IFX_CFG_CPU_TRAP_CME_HOOK
96 # define IFX_CFG_CPU_TRAP_CME_HOOK(trapWatch) ((void)trapWatch) /**< By default context Management Error macro is empty*/
97 #endif
98 #ifndef IFX_CFG_CPU_TRAP_BE_HOOK
99 # define IFX_CFG_CPU_TRAP_BE_HOOK(trapWatch) ((void)trapWatch) /**< By default bus Error macro is empty*/
100 #endif
101 #ifndef IFX_CFG_CPU_TRAP_ASSERT_HOOK
102 # define IFX_CFG_CPU_TRAP_ASSERT_HOOK(trapWatch) ((void)trapWatch) /**< By default assertion is empty*/
103 #endif
104
105 #ifndef IFX_CFG_CPU_TRAP_DEBUG
106 #define IFX_CFG_CPU_TRAP_DEBUG __debug()
107 #endif
108 /*******************************************************************************
109 ** variables **
110 *******************************************************************************/
111
112 /*******************************************************************************
113 ** Function definitions **
114 *******************************************************************************/
115 IFX_INLINE IfxCpu_Trap IfxCpu_Trap_extractTrapInfo(uint8 trapClass, uint32 tin)
116 {
117 IfxCpu_Trap trapInfo;
118 trapInfo.tAddr = (unsigned int)__getA11();
119 trapInfo.tClass = trapClass;
120 trapInfo.tId = tin;
121 trapInfo.tCpu = IfxCpu_getCoreId();
122 return trapInfo;
123 }
124
125
126 void IfxCpu_Trap_memoryManagementError(uint32 tin)
127 {
128 volatile IfxCpu_Trap trapWatch;
129 trapWatch = IfxCpu_Trap_extractTrapInfo(IfxCpu_Trap_Class_memoryManagement, tin);
130 IFX_CFG_CPU_TRAP_MME_HOOK(trapWatch);
131 IFX_CFG_CPU_TRAP_DEBUG;
132 __asm("rslcx"); /* Restore lower context before returning. lower context was stored in the trap vector */
133 __asm("rfe");
134 }
135
136
137 void IfxCpu_Trap_internalProtectionError(uint32 tin)
138 {
139 volatile IfxCpu_Trap trapWatch;
140 trapWatch = IfxCpu_Trap_extractTrapInfo(IfxCpu_Trap_Class_internalProtection, tin);
141 IFX_CFG_CPU_TRAP_IPE_HOOK(trapWatch);
142 IFX_CFG_CPU_TRAP_DEBUG;
143 __asm("rslcx"); /* Restore lower context before returning. lower context was stored in the trap vector */
144 __asm("rfe");
145 }
146
147
148 void IfxCpu_Trap_instructionError(uint32 tin)
149 {
150 volatile IfxCpu_Trap trapWatch;
151 trapWatch = IfxCpu_Trap_extractTrapInfo(IfxCpu_Trap_Class_instructionErrors, tin);
152 IFX_CFG_CPU_TRAP_IE_HOOK(trapWatch);
153 IFX_CFG_CPU_TRAP_DEBUG;
154 __asm("rslcx"); /* Restore lower context before returning. lower context was stored in the trap vector */
155 __asm("rfe");
156 }
157
158
159 void IfxCpu_Trap_contextManagementError(uint32 tin)
160 {
161 volatile IfxCpu_Trap trapWatch;
162 trapWatch = IfxCpu_Trap_extractTrapInfo(IfxCpu_Trap_Class_contextManagement, tin);
163 IFX_CFG_CPU_TRAP_CME_HOOK(trapWatch);
164 IFX_CFG_CPU_TRAP_DEBUG;
165 __asm("rslcx"); /* Restore lower context before returning. lower context was stored in the trap vector */
166 __asm("rfe");
167 }
168
169
170 void IfxCpu_Trap_busError(uint32 tin)
171 {
172 volatile IfxCpu_Trap trapWatch;
173 trapWatch = IfxCpu_Trap_extractTrapInfo(IfxCpu_Trap_Class_bus, tin);
174 IFX_CFG_CPU_TRAP_BE_HOOK(trapWatch);
175 IFX_CFG_CPU_TRAP_DEBUG;
176 __asm("rslcx"); /* Restore lower context before returning. lower context was stored in the trap vector */
177 __asm("rfe");
178 }
179
180
181 void IfxCpu_Trap_assertion(uint32 tin)
182 {
183 volatile IfxCpu_Trap trapWatch;
184 trapWatch = IfxCpu_Trap_extractTrapInfo(IfxCpu_Trap_Class_assertion, tin);
185 IFX_CFG_CPU_TRAP_ASSERT_HOOK(trapWatch);
186 IFX_CFG_CPU_TRAP_DEBUG;
187 __asm("rslcx"); /* Restore lower context before returning. lower context was stored in the trap vector */
188 __asm("rfe");
189 }
190
191
192 void IfxCpu_Trap_systemCall_Cpu0(uint32 tin)
193 {
194 volatile IfxCpu_Trap trapWatch;
195 trapWatch = IfxCpu_Trap_extractTrapInfo(IfxCpu_Trap_Class_systemCall, tin);
196 IFX_CFG_CPU_TRAP_SYSCALL_CPU0_HOOK(trapWatch);
197 __asm("rslcx"); /* Restore lower context before returning. lower context was stored in the trap vector */
198 __asm("rfe");
199 }
200
201 #if IFXCPU_NUM_MODULES >= 2
202 void IfxCpu_Trap_systemCall_Cpu1(uint32 tin)
203 {
204 volatile IfxCpu_Trap trapWatch;
205 trapWatch = IfxCpu_Trap_extractTrapInfo(IfxCpu_Trap_Class_systemCall, tin);
206 IFX_CFG_CPU_TRAP_SYSCALL_CPU1_HOOK(trapWatch);
207 __asm("rslcx"); /* Restore lower context before returning. lower context was stored in the trap vector */
208 __asm("rfe");
209 }
210 #endif
211
212 #if IFXCPU_NUM_MODULES >= 3
213 void IfxCpu_Trap_systemCall_Cpu2(uint32 tin)
214 {
215 volatile IfxCpu_Trap trapWatch;
216 trapWatch = IfxCpu_Trap_extractTrapInfo(IfxCpu_Trap_Class_systemCall, tin);
217 IFX_CFG_CPU_TRAP_SYSCALL_CPU2_HOOK(trapWatch);
218 __asm("rslcx"); /* Restore lower context before returning. lower context was stored in the trap vector */
219 __asm("rfe");
220 }
221 #endif
222
223 #if IFXCPU_NUM_MODULES >= 4
224 void IfxCpu_Trap_systemCall_Cpu3(uint32 tin)
225 {
226 volatile IfxCpu_Trap trapWatch;
227 trapWatch = IfxCpu_Trap_extractTrapInfo(IfxCpu_Trap_Class_systemCall, tin);
228 IFX_CFG_CPU_TRAP_SYSCALL_CPU3_HOOK(trapWatch);
229 __asm("rslcx"); /* Restore lower context before returning. lower context was stored in the trap vector */
230 __asm("rfe");
231 }
232 #endif
233
234 #if IFXCPU_NUM_MODULES >= 5
235 void IfxCpu_Trap_systemCall_Cpu4(uint32 tin)
236 {
237 volatile IfxCpu_Trap trapWatch;
238 trapWatch = IfxCpu_Trap_extractTrapInfo(IfxCpu_Trap_Class_systemCall, tin);
239 IFX_CFG_CPU_TRAP_SYSCALL_CPU4_HOOK(trapWatch);
240 __asm("rslcx"); /* Restore lower context before returning. lower context was stored in the trap vector */
241 __asm("rfe");
242 }
243 #endif
244
245 #if IFXCPU_NUM_MODULES >= 6
246 void IfxCpu_Trap_systemCall_Cpu5(uint32 tin)
247 {
248 volatile IfxCpu_Trap trapWatch;
249 trapWatch = IfxCpu_Trap_extractTrapInfo(IfxCpu_Trap_Class_systemCall, tin);
250 IFX_CFG_CPU_TRAP_SYSCALL_CPU5_HOOK(trapWatch);
251 __asm("rslcx"); /* Restore lower context before returning. lower context was stored in the trap vector */
252 __asm("rfe");
253 }
254 #endif
255
256 void IfxCpu_Trap_nonMaskableInterrupt(uint32 tin)
257 {
258 volatile IfxCpu_Trap trapWatch;
259 trapWatch = IfxCpu_Trap_extractTrapInfo(IfxCpu_Trap_Class_nonMaskableInterrupt, tin);
260 IFX_CFG_CPU_TRAP_NMI_HOOK(trapWatch);
261 __asm("rslcx"); /* Restore lower context before returning. lower context was stored in the trap vector */
262 __asm("rfe");
263 }
264
265
266 #if defined(__HIGHTEC__)
267 #pragma section
268 #pragma section ".traptab_cpu0" awx
269 #pragma GCC optimize ("O2")
270 #endif
271 #if defined(__DCC__)
272 #pragma section
273 #pragma section CODE ".traptab_cpu0" X
274 #endif
275 #if defined(__TASKING__)
276 #pragma protect on
277 #pragma section code "traptab_cpu0"
278 #endif
279 #if defined(__ghs__)
280 #pragma ghs section
281 #pragma ghs section text=".traptab_cpu0"
282 #endif
283 void IfxCpu_Trap_vectorTable0(void)
284 {
285 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_memoryManagementError);
286 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_internalProtectionError);
287 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_instructionError);
288 IfxCpu_Tsr_CallCSATSR(IfxCpu_Trap_contextManagementError);
289 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_busError);
290 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_assertion);
291 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_systemCall_Cpu0);
292 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_nonMaskableInterrupt);
293 }
294
295
296 #if IFXCPU_NUM_MODULES >= 2
297 #if defined(__HIGHTEC__)
298 #pragma section
299 #pragma section ".traptab_cpu1" awx
300 #endif
301 #if defined(__DCC__)
302 #pragma section
303 #pragma section CODE ".traptab_cpu1" X
304 #endif
305 #if defined(__TASKING__)
306 #pragma section code "traptab_cpu1"
307 #endif
308 #if defined(__ghs__)
309 #pragma ghs section
310 #pragma ghs section text=".traptab_cpu1"
311 #endif
312 void IfxCpu_Trap_vectorTable1(void)
313 {
314 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_memoryManagementError);
315 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_internalProtectionError);
316 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_instructionError);
317 IfxCpu_Tsr_CallCSATSR(IfxCpu_Trap_contextManagementError);
318 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_busError);
319 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_assertion);
320 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_systemCall_Cpu1);
321 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_nonMaskableInterrupt);
322 }
323
324
325 #endif
326
327 #if IFXCPU_NUM_MODULES >= 3
328 #if defined(__HIGHTEC__)
329 #pragma section
330 #pragma section ".traptab_cpu2" awx
331 #endif
332 #if defined(__DCC__)
333 #pragma section
334 #pragma section CODE ".traptab_cpu2" X
335 #endif
336 #if defined(__TASKING__)
337 #pragma section code "traptab_cpu2"
338 #endif
339 #if defined(__ghs__)
340 #pragma ghs section
341 #pragma ghs section text=".traptab_cpu2"
342 #endif
343
344 void IfxCpu_Trap_vectorTable2(void)
345 {
346 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_memoryManagementError);
347 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_internalProtectionError);
348 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_instructionError);
349 IfxCpu_Tsr_CallCSATSR(IfxCpu_Trap_contextManagementError);
350 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_busError);
351 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_assertion);
352 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_systemCall_Cpu2);
353 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_nonMaskableInterrupt);
354 }
355
356
357 #endif
358
359 #if IFXCPU_NUM_MODULES >= 4
360 #if defined(__HIGHTEC__)
361 #pragma section
362 #pragma section ".traptab_cpu3" awx
363 #endif
364 #if defined(__DCC__)
365 #pragma section
366 #pragma section CODE ".traptab_cpu3" X
367 #endif
368 #if defined(__TASKING__)
369 #pragma section code "traptab_cpu3"
370 #endif
371 #if defined(__ghs__)
372 #pragma ghs section
373 #pragma ghs section text=".traptab_cpu3"
374 #endif
375
376
377 void IfxCpu_Trap_vectorTable3(void)
378 {
379 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_memoryManagementError);
380 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_internalProtectionError);
381 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_instructionError);
382 IfxCpu_Tsr_CallCSATSR(IfxCpu_Trap_contextManagementError);
383 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_busError);
384 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_assertion);
385 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_systemCall_Cpu3);
386 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_nonMaskableInterrupt);
387 }
388
389
390 #endif
391
392 #if IFXCPU_NUM_MODULES >= 5
393 #if defined(__HIGHTEC__)
394 #pragma section
395 #pragma section ".traptab_cpu4" awx
396 #endif
397 #if defined(__DCC__)
398 #pragma section
399 #pragma section CODE ".traptab_cpu4" X
400 #endif
401 #if defined(__TASKING__)
402 #pragma section code "traptab_cpu4"
403 #endif
404 #if defined(__ghs__)
405 #pragma ghs section
406 #pragma ghs section text=".traptab_cpu4"
407 #endif
408
409 void IfxCpu_Trap_vectorTable4(void)
410 {
411 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_memoryManagementError);
412 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_internalProtectionError);
413 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_instructionError);
414 IfxCpu_Tsr_CallCSATSR(IfxCpu_Trap_contextManagementError);
415 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_busError);
416 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_assertion);
417 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_systemCall_Cpu4);
418 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_nonMaskableInterrupt);
419 }
420
421
422 #endif
423
424 #if IFXCPU_NUM_MODULES >= 6
425 #if defined(__HIGHTEC__)
426 #pragma section
427 #pragma section ".traptab_cpu5" awx
428 #endif
429 #if defined(__DCC__)
430 #pragma section
431 #pragma section CODE ".traptab_cpu5" X
432 #endif
433 #if defined(__TASKING__)
434 #pragma section code "traptab_cpu5"
435 #endif
436 #if defined(__ghs__)
437 #pragma ghs section
438 #pragma ghs section text=".traptab_cpu5"
439 #endif
440
441 void IfxCpu_Trap_vectorTable5(void)
442 {
443 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_memoryManagementError);
444 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_internalProtectionError);
445 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_instructionError);
446 IfxCpu_Tsr_CallCSATSR(IfxCpu_Trap_contextManagementError);
447 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_busError);
448 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_assertion);
449 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_systemCall_Cpu5);
450 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_nonMaskableInterrupt);
451 }
452
453
454 #endif
455
456 #if defined(__HIGHTEC__)
457 #pragma section
458 #endif
459 #if defined(__DCC__)
460 #pragma section
461 #endif
462 #if defined(__DCC__)
463 #pragma interrupt IfxInterruptEx
464 #endif
465 #if defined(__TASKING__)
466 #pragma endprotect
467 #endif
468 #if defined(__ghs__)
469 #pragma ghs section
470 #endif
IfxCpu_Trap::tAddr
unsigned int tAddr
Definition: IfxCpu_Trap.h:185
IFX_CFG_CPU_TRAP_SYSCALL_CPU4_HOOK
#define IFX_CFG_CPU_TRAP_SYSCALL_CPU4_HOOK(trapWatch)
Definition: IfxCpu_Trap.c:78
IfxCpu_Trap_Class_contextManagement
Definition: IfxCpu_Trap.h:76
IfxCpu_Trap_systemCall_Cpu0
void IfxCpu_Trap_systemCall_Cpu0(uint32 tin)
Definition: IfxCpu_Trap.c:192
IfxCpu_Trap_assertion
void IfxCpu_Trap_assertion(uint32 tin)
Definition: IfxCpu_Trap.c:181
IFX_CFG_CPU_TRAP_SYSCALL_CPU1_HOOK
#define IFX_CFG_CPU_TRAP_SYSCALL_CPU1_HOOK(trapWatch)
Definition: IfxCpu_Trap.c:69
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxCpu_Trap_busError
void IfxCpu_Trap_busError(uint32 tin)
Definition: IfxCpu_Trap.c:170
IfxCpu_Trap_instructionError
void IfxCpu_Trap_instructionError(uint32 tin)
Definition: IfxCpu_Trap.c:148
IFX_CFG_CPU_TRAP_NMI_HOOK
#define IFX_CFG_CPU_TRAP_NMI_HOOK(trapWatch)
Definition: IfxCpu_Trap.c:84
IFX_CFG_CPU_TRAP_CME_HOOK
#define IFX_CFG_CPU_TRAP_CME_HOOK(trapWatch)
Definition: IfxCpu_Trap.c:96
IfxCpu_Trap_contextManagementError
void IfxCpu_Trap_contextManagementError(uint32 tin)
Definition: IfxCpu_Trap.c:159
IfxCpu_Trap_Class_instructionErrors
Definition: IfxCpu_Trap.h:75
IfxCpu_Intrinsics.h
IfxCpu_Trap.h
IFX_CFG_CPU_TRAP_IE_HOOK
#define IFX_CFG_CPU_TRAP_IE_HOOK(trapWatch)
Definition: IfxCpu_Trap.c:93
IFX_CFG_CPU_TRAP_SYSCALL_CPU0_HOOK
#define IFX_CFG_CPU_TRAP_SYSCALL_CPU0_HOOK(trapWatch)
Definition: IfxCpu_Trap.c:66
IfxCpu_Trap_Class_memoryManagement
Definition: IfxCpu_Trap.h:73
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxCpu_Trap_Class_systemCall
Definition: IfxCpu_Trap.h:79
IFX_CFG_CPU_TRAP_MME_HOOK
#define IFX_CFG_CPU_TRAP_MME_HOOK(trapWatch)
Definition: IfxCpu_Trap.c:87
IFX_CFG_CPU_TRAP_DEBUG
#define IFX_CFG_CPU_TRAP_DEBUG
Definition: IfxCpu_Trap.c:106
IfxCpu_Trap::tId
unsigned int tId
Definition: IfxCpu_Trap.h:186
IfxCpu_Trap_Class_nonMaskableInterrupt
Definition: IfxCpu_Trap.h:80
IfxCpu_Trap_nonMaskableInterrupt
void IfxCpu_Trap_nonMaskableInterrupt(uint32 tin)
Definition: IfxCpu_Trap.c:256
IfxCpu_Trap_internalProtectionError
void IfxCpu_Trap_internalProtectionError(uint32 tin)
Definition: IfxCpu_Trap.c:137
__getA11
#define __getA11
Definition: IfxCpu_IntrinsicsDcc.h:2105
IfxCpu_Trap_vectorTable0
void IfxCpu_Trap_vectorTable0(void)
Definition: IfxCpu_Trap.c:283
IfxCpu.h
CPU basic functionality.
IfxCpu_Trap_Class_bus
Definition: IfxCpu_Trap.h:77
IfxCpu_Trap_extractTrapInfo
IFX_INLINE IfxCpu_Trap IfxCpu_Trap_extractTrapInfo(uint8 trapClass, uint32 tin)
Definition: IfxCpu_Trap.c:115
IFX_CFG_CPU_TRAP_SYSCALL_CPU5_HOOK
#define IFX_CFG_CPU_TRAP_SYSCALL_CPU5_HOOK(trapWatch)
Definition: IfxCpu_Trap.c:81
IFX_CFG_CPU_TRAP_BE_HOOK
#define IFX_CFG_CPU_TRAP_BE_HOOK(trapWatch)
Definition: IfxCpu_Trap.c:99
IfxCpu_Trap::tCpu
unsigned int tCpu
Definition: IfxCpu_Trap.h:188
IFX_CFG_CPU_TRAP_ASSERT_HOOK
#define IFX_CFG_CPU_TRAP_ASSERT_HOOK(trapWatch)
Definition: IfxCpu_Trap.c:102
IfxCpu_Trap::tClass
unsigned int tClass
Definition: IfxCpu_Trap.h:187
IfxCpu_Trap_Class_internalProtection
Definition: IfxCpu_Trap.h:74
IfxCpu_Trap
Structure to contain the trap information.
Definition: IfxCpu_Trap.h:183
IfxCpu_getCoreId
IFX_INLINE IfxCpu_Id IfxCpu_getCoreId(void)
API to get core id of the CPU of the caller. Caution: Core id of the cpu&#39;s may not be continguous and...
Definition: IfxCpu.h:863
IfxCpu_Trap_memoryManagementError
void IfxCpu_Trap_memoryManagementError(uint32 tin)
Definition: IfxCpu_Trap.c:126
IFX_CFG_CPU_TRAP_SYSCALL_CPU3_HOOK
#define IFX_CFG_CPU_TRAP_SYSCALL_CPU3_HOOK(trapWatch)
Definition: IfxCpu_Trap.c:75
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IFX_CFG_CPU_TRAP_IPE_HOOK
#define IFX_CFG_CPU_TRAP_IPE_HOOK(trapWatch)
Definition: IfxCpu_Trap.c:90
IfxCpu_Trap_Class_assertion
Definition: IfxCpu_Trap.h:78
IFX_CFG_CPU_TRAP_SYSCALL_CPU2_HOOK
#define IFX_CFG_CPU_TRAP_SYSCALL_CPU2_HOOK(trapWatch)
Definition: IfxCpu_Trap.c:72


iLLD_TC38A: IfxCpu_Trap.h Source File

  • Cpu
  • Trap
IfxCpu_Trap.h
Go to the documentation of this file.
1 /**
2 * \file IfxCpu_Trap.c
3 * \brief This file contains the APIs for Trap related functions.
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 *
41 * \defgroup IfxLld_Cpu_Trap Trap Functions
42 * \ingroup IfxLld_Cpu
43 *
44 * \defgroup IfxLld_Cpu_Trap_Hooks Trap Function Hooks
45 * \ingroup IfxLld_Cpu_Trap
46 *
47 * \defgroup IfxLld_Cpu_Trap_Usage How to use the Trap Function Hooks?
48 * \ingroup IfxLld_Cpu_Trap
49 *
50 */
51
52 #ifndef IFXCPU_TRAPS_H_
53 #define IFXCPU_TRAPS_H_
54
55 /*******************************************************************************
56 ** Includes **
57 *******************************************************************************/
58 #include "Cpu/Std/Ifx_Types.h"
59 #include "Cpu/Std/IfxCpu_Intrinsics.h"
60 #include "Ifx_Cfg.h"
61
62 /*******************************************************************************
63 ** Type definitions **
64 *******************************************************************************/
65 /** \addtogroup IfxLld_Cpu_Trap_Hooks
66 * \{ */
67
68 /** \brief Enum for available Trap classes.
69 *
70 */
71 typedef enum
72 {
73 IfxCpu_Trap_Class_memoryManagement = 0U,
74 IfxCpu_Trap_Class_internalProtection = 1U,
75 IfxCpu_Trap_Class_instructionErrors = 2U,
76 IfxCpu_Trap_Class_contextManagement = 3U,
77 IfxCpu_Trap_Class_bus = 4U,
78 IfxCpu_Trap_Class_assertion = 5U,
79 IfxCpu_Trap_Class_systemCall = 6U,
80 IfxCpu_Trap_Class_nonMaskableInterrupt = 7U
81 } IfxCpu_Trap_Class;
82
83 /** \brief Enum for available Identification numbers under Memory Management Trap.
84 *
85 */
86 typedef enum
87 {
88 IfxCpu_Trap_MemoryManagement_Id_virtualAddressFill = 0U,
89 IfxCpu_Trap_MemoryManagement_Id_virtualAddressProtection = 1U,
90 } IfxCpu_Trap_MemoryManagement_Id;
91
92 /** \brief Enum for available Identification numbers under Internal Protection Trap.
93 *
94 */
95 typedef enum
96 {
97 IfxCpu_Trap_InternalProtection_Id_privilegeViolation = 1U,
98 IfxCpu_Trap_InternalProtection_Id_memoryProtectionRead = 2U,
99 IfxCpu_Trap_InternalProtection_Id_memoryProtectionWrite = 3U,
100 IfxCpu_Trap_InternalProtection_Id_memoryProtectionExecute = 4U,
101 IfxCpu_Trap_InternalProtection_Id_memoryProtectionPeripheralAccess = 5U,
102 IfxCpu_Trap_InternalProtection_Id_memoryProtectionNullAddress = 6U,
103 IfxCpu_Trap_InternalProtection_Id_globalRegisterWriteProtection = 7U,
104 } IfxCpu_Trap_InternalProtection_Id;
105
106 /** \brief Enum for available Identification numbers under Instruction Errors Trap.
107 *
108 */
109 typedef enum
110 {
111 IfxCpu_Trap_InstructionErrors_Id_illegalOpcode = 1U,
112 IfxCpu_Trap_InstructionErrors_Id_unimplementedOpcode = 2U,
113 IfxCpu_Trap_InstructionErrors_Id_invalidOperand = 3U,
114 IfxCpu_Trap_InstructionErrors_Id_dataAddressAlignment = 4U,
115 IfxCpu_Trap_InstructionErrors_Id_invalidMemoryAddress = 5U,
116 } IfxCpu_Trap_InstructionErrors_Id;
117
118 /** \brief Enum for available Identification numbers under Context Management Trap.
119 *
120 */
121 typedef enum
122 {
123 IfxCpu_Trap_ContextManagement_Id_freeContextListDepletion = 1U,
124 IfxCpu_Trap_ContextManagement_Id_callDepthOverflow = 2U,
125 IfxCpu_Trap_ContextManagement_Id_callDepthUnderflow = 3U,
126 IfxCpu_Trap_ContextManagement_Id_freeContextListUnderflow = 4U,
127 IfxCpu_Trap_ContextManagement_Id_callStackUnderflow = 5U,
128 IfxCpu_Trap_ContextManagement_Id_contextType = 6U,
129 IfxCpu_Trap_ContextManagement_Id_nestingError = 7U,
130 } IfxCpu_Trap_ContextManagement_Id;
131
132 /** \brief Enum for available Identification numbers under Bus Trap.
133 *
134 */
135 typedef enum
136 {
137 IfxCpu_Trap_Bus_Id_programFetchSynchronousError = 1U,
138 IfxCpu_Trap_Bus_Id_dataAccessSynchronousError = 2U,
139 IfxCpu_Trap_Bus_Id_dataAccessAsynchronousError = 3U,
140 IfxCpu_Trap_Bus_Id_CoprocessorTrapAsynchronousError = 4U,
141 IfxCpu_Trap_Bus_Id_programMemoryIntegrityError = 5U,
142 IfxCpu_Trap_Bus_Id_dataMemoryIntegrityError = 6U,
143 IfxCpu_Trap_Bus_Id_temporalAsynchronousError = 7U,
144 } IfxCpu_Trap_Bus_Id;
145
146 /** \brief Enum for available Identification numbers under Assertion Trap.
147 *
148 */
149 typedef enum
150 {
151 IfxCpu_Trap_Assertion_Id_arithmeticOverflow = 1U,
152 IfxCpu_Trap_Assertion_Id_stickyArithmeticOverflow = 2U,
153 } IfxCpu_Trap_Assertion_Id;
154
155 /** \brief Type for Identification numbers under SystemCall Trap.
156 *
157 */
158 typedef sint32 IfxCpu_Trap_SystemCall_Id;
159
160 /** \brief Type for Identification number for Non Maskable Interrupt Trap.
161 *
162 */
163 typedef sint32 IfxCpu_Trap_NonMaskableInterrupt_Id;
164
165 /** \brief Union to abstract Identification numbers under Traps.
166 *
167 */
168 typedef union
169 {
170 IfxCpu_Trap_MemoryManagement_Id memoryManagement;
171 IfxCpu_Trap_InternalProtection_Id internalProtection;
172 IfxCpu_Trap_InstructionErrors_Id instructionErrors;
173 IfxCpu_Trap_ContextManagement_Id contextManagement;
174 IfxCpu_Trap_Bus_Id bus;
175 IfxCpu_Trap_Assertion_Id assertion;
176 IfxCpu_Trap_SystemCall_Id systemCall;
177 IfxCpu_Trap_NonMaskableInterrupt_Id nonMaskableInterrupt;
178 } IfxCpu_Trap_Id;
179
180 /** \brief Structure to contain the trap information.
181 *
182 */
183 typedef struct
184 {
185 unsigned int tAddr;
186 unsigned int tId : 8;
187 unsigned int tClass : 8;
188 unsigned int tCpu : 3;
189 } IfxCpu_Trap;
190
191 /*******************************************************************************
192 ** Global Exported variables/constants **
193 *******************************************************************************/
194
195 /*******************************************************************************
196 ** Global Exported macros/inlines/function ptototypes **
197 *******************************************************************************/
198 /** \brief Macro to define the trap vector table.
199 * This macro is provided to define the trap vector table in the frameowrk. User shall not use
200 * this macro.
201 * Refer to the documentation to extend the trap with hook functions. \ref IfxLld_Cpu_Trap_Usage
202 */
203 #if defined(__HIGHTEC__)
204 #define __ALIGN_TRAP_TAB__ __asm(" .align 5");
205 #define IfxCpu_Tsr_CallTSR(serviceRoutine) \
206 { \
207 __ALIGN_TRAP_TAB__; \
208 __asm("svlcx\n"); \
209 __asm("mov\t %d4, %d15"); \
210 __asm("ji\t %0" : : "a" (serviceRoutine)); \
211 __asm("rfe"); \
212 }
213 #elif defined(__ghs__)
214 #define __ALIGN_TRAP_TAB__ __asm(" .align 32");
215 #define IfxCpu_Tsr_CallTSR(serviceRoutine) \
216 { \
217 __ALIGN_TRAP_TAB__; \
218 __asm("svlcx\n"); \
219 __asm("mov\t d4, d15"); \
220 __asm("ji\t %0" : : "a" (serviceRoutine)); \
221 __asm("rfe"); \
222 }
223 #elif defined(__DCC__)
224 #define IfxCpu_Tsr_CallTSR(serviceRoutine) \
225 { \
226 __ALIGN_TRAP_TAB__; \
227 __asm("\n#$$bp\n"); \
228 __asm("svlcx\n"); \
229 __asm(" movh.a\t %a15,"#serviceRoutine "@ha\n"); \
230 __asm(" lea\t %a15,[%a15]"#serviceRoutine "@l\n"); \
231 __asm(" mov\t %d4,%d15\n"); \
232 __asm(" ji\t %a15\n"); \
233 __asm(" rfe"); \
234 __asm("#$$ep"); \
235 }
236 #define __ALIGN_TRAP_TAB__ __asm(" .align 5");
237 #elif defined(__TASKING__)
238 #define IfxCpu_Tsr_CallTSR(serviceRoutine) \
239 { \
240 __ALIGN_TRAP_TAB__; \
241 __asm("svlcx\n\tmov\td4,d15\n\tji\t%0\n" : : "a" (serviceRoutine) : "d4", "d15"); \
242 }
243 #define __ALIGN_TRAP_TAB__ __asm(" .align 32");
244 #endif
245
246 #if defined(__HIGHTEC__)
247 #define __ALIGN_TRAP_TAB__ __asm(" .align 5");
248 #define IfxCpu_Tsr_CallCSATSR(serviceRoutine) \
249 { \
250 __ALIGN_TRAP_TAB__; \
251 __asm("mov\t %d4, %d15"); \
252 __asm("ji\t %0" : : "a" (serviceRoutine)); \
253 __asm("rfe"); \
254 }
255 #elif defined(__ghs__)
256 #define __ALIGN_TRAP_TAB__ __asm(" .align 32");
257 #define IfxCpu_Tsr_CallCSATSR(serviceRoutine) \
258 { \
259 __ALIGN_TRAP_TAB__; \
260 __asm("mov\t d4, d15"); \
261 __asm("ji\t %0" : : "a" (serviceRoutine)); \
262 __asm("rfe"); \
263 }
264 #elif defined(__DCC__)
265 #define IfxCpu_Tsr_CallCSATSR(serviceRoutine) \
266 { \
267 __ALIGN_TRAP_TAB__; \
268 __asm("\n#$$bp\n"); \
269 __asm("movh.a\t %a15,"#serviceRoutine "@ha\n"); \
270 __asm(" lea\t %a15,[%a15]"#serviceRoutine "@l\n"); \
271 __asm(" mov\t %d4,%d15\n"); \
272 __asm(" ji\t %a15\n"); \
273 __asm(" rfe"); \
274 __asm("#$$ep"); \
275 }
276 #define __ALIGN_TRAP_TAB__ __asm(" .align 5");
277 #elif defined(__TASKING__)
278 #define IfxCpu_Tsr_CallCSATSR(serviceRoutine) \
279 { \
280 __ALIGN_TRAP_TAB__; \
281 __asm("mov\td4,d15\n\tji\t%0\n" : : "a" (serviceRoutine) : "d4", "d15"); \
282 }
283 #define __ALIGN_TRAP_TAB__ __asm(" .align 32");
284 #endif
285
286 /** \} */
287
288 /*Documentation */
289 /** \addtogroup IfxLld_Cpu_Trap_Usage
290 * \{
291 *
292 * This page describes how to use the trap function hooks with application framework.\n
293 * Framework has built in Trap Service Routines, which has minimal set of debug information.
294 * The execution of trap service is as below,\n
295 * 1) When a trap occurs, a variable "trapInfo" is updated with the information:\n
296 * a. Which CPU caused this trap,\n
297 * b. What is the trap address, trap class and\n
298 * c. What is the trap identification number\n
299 * 2) Call to a configurable hook function, passing structure trapInfo as parameter.\n
300 * 3) Then debug instruction executed.\n
301 * 4) Returning from the trap. (This instruction is not reached if debugger is connected because of
302 * "debug" instruction before)\n
303 * For normal cases during development, where user works with debugger, user can watch the structure variable
304 * "trapInfo" in the debugger.
305 *
306 * In case, user wants to make use of the information of trap for further processing,\n
307 * extend the traps, using the hook functions provided.
308 *
309 * \section IfxLld_Cpu_Trap_Hooks Extending the traps with hook functions.
310 *
311 * If the trap extensions are to be extended, it is very important to enable this feature. By default this
312 * feature is disabled.
313 *
314 * \subsection IfxLld_Cpu_Trap_Hooks_EnableExtn How to enable the trap extension feature?
315 * To extend the trap hook functions user must enable this feature by defining the macro
316 * "IFX_CFG_EXTEND_TRAP_HOOKS" in Ifx_Cfg.h, as shown below.
317 * \code
318 * //file: Ifx_Cfg.h
319 *
320 * #define IFX_CFG_EXTEND_TRAP_HOOKS
321 *
322 * \endcode
323 * Now the compiler will accept the further configurations to extend the hooks.\n
324 * Ifx_Cfg_Trap.h file shall be used to extend the traps. This provides two kind of hook functions.
325 * ie. Hook for error traps and hooks (per CPU available) for system calls.
326 *
327 * \subsection IfxLld_Cpu_Trap_ErrorHooks Extending the "Error traps" with hook function.
328 * Error trap occurs as a result of an error event such as an instruction error, memory-management error
329 * or an illegal access.\n
330 * To extend the error traps, following steps are to be followed:\n
331 * \subsubsection IfxLld_Cpu_Trap_ErrorHooksStep1 Step1: Define a routine to substitute the hook for error traps.
332 * This definition shall be as user defined code (Generally in DemoApps folder).\n
333 * Considerations:\n
334 * 1. Format: IFX_INLINE void <trap extension name>(IfxCpu_Trap trapInfo)
335 * \note Define such a routine with the consideration that the trap extension hook is not a function. In case
336 * of context management error, this extension itself will not call any other function.
337 *
338 * 2. Use the information trapInfo, which is available as parameter passed to this hook and process further.
339 * Example code in a user defined file eg. Ifx_TrapExtension.h,
340 * \code
341 * //Example "inlined" function for trap Extension Hook.
342 * IFX_INLINE myTrapExtensionHook(IfxCpu_Trap trapInfo)
343 * {
344 * switch (trapInfo.tClass)
345 * {
346 * case IfxCpu_Trap_Class_memoryManagement:
347 * {
348 * //user code: Function calls allowed.
349 * break;
350 * }
351 * case IfxCpu_Trap_Class_internalProtection:
352 * {
353 * //user code: Function calls allowed.
354 * break;
355 * }
356 * case IfxCpu_Trap_Class_instructionErrors:
357 * {
358 * //user code: Function calls allowed.
359 * break;
360 * }
361 * case IfxCpu_Trap_Class_contextManagement:
362 * {
363 * //user code: Function calls NOT allowed.
364 * break;
365 * }
366 * case IfxCpu_Trap_Class_bus:
367 * {
368 * //user code: Function calls allowed.
369 * break;
370 * }
371 * case IfxCpu_Trap_Class_assertion:
372 * {
373 * //user code: Function calls allowed.
374 * break;
375 * }
376 * case IfxCpu_Trap_Class_nonMaskableInterrupt:
377 * {
378 * //user code: Function calls allowed.
379 * break;
380 * }
381 * case default:
382 * {
383 * break;
384 * }
385 * }
386 * }
387 * \endcode
388 * \note The error trap functions execute the debug instruction immediately after returning from extension hooks.
389 *
390 * \subsubsection IfxLld_Cpu_Trap_ErrorHooksStep2 Step2: Configure error trap hook extension function.
391 * Configure error trap hook extension function as defined above to the macro as below:
392 * \note Configuration of hook extension is available in Ifx_Cfg_Trap.h
393 *
394 * \code
395 * //file: Ifx_Cfg_Trap.h
396 *
397 * #include "Ifx_TrapExtension.h" //Assuming this is the file name as in above example
398 *
399 * #define IFX_CFG_CPU_TRAP_TSR_HOOK(trapInfo) myTrapExtensionHook(trapInfo) //This is INLINE function.
400 *
401 * \endcode
402 * \note The exten hooks are effective only if the feature is enabled.
403 *
404 * \subsection IfxLld_Cpu_Trap_SysCallHooks Extending the cpu specific "system call" hook functions.
405 * Tricore architecture provides the system call trap which is executed by software trigger. The instruction "syscall"
406 * triggers this trap. Please refer Tricore architecture manual for more details.\n
407 * IfxCpu_trap driver provide hook function for each CPU separately. To extend System Call trap following steps
408 * are to be followed:\n
409 * \subsubsection IfxLld_Cpu_Trap_SysCallHooksStep1 Step1: Define routine/s to substitute the hook/s for System Call trap.
410 * This definition shall be as user defined code (Generally in DemoApps folder).\n
411 * Considerations:\n
412 * 1. Format: void <syscall function name>(IfxCpu_Trap trapInfo)
413 * It is allowed to define this trap extension as function definition, because this trap is not triggered due to any error.
414 * Depending on the application requirement, define single or per CPU instance of the extension.
415 *
416 * 2. Use the information trapInfo which is available as parameter passed to this hook and process further. The parameter
417 * passed, with syscall instruction, will be trap identification number (refer to Tricore architecture manual for more details).
418 * \note To hook extension, information about trap identification number is available through parameter "trapInfo".
419 *
420 * Example code in a user defined file eg. Ifx_TrapExtension.h,
421 * \code
422 * //Example function for System Call Extension Hook.
423 * IFX_INLINE mySysCallExtensionHook(IfxCpu_Trap trapInfo)
424 * {
425 * switch (trapInfo.tId)
426 * {
427 * case 0:
428 * {
429 * //user code: Function calls allowed.
430 * break;
431 * }
432 * case 1:
433 * {
434 * //user code: Function calls allowed.
435 * break;
436 * }
437 * // and so on..
438 * case default:
439 * {
440 * break;
441 * }
442 * }
443 * }
444 * \endcode
445 *
446 * \subsubsection IfxLld_Cpu_Trap_SysCallHooksStep2 Step2: Configure the extension function.\n
447 * Configure the hook extension function defined above, to the macro as below:
448 * \note Configuration of hook extension is available in Ifx_Cfg_Trap.h
449 * \code
450 * //file: Ifx_Cfg_Trap.h
451 *
452 * #include "Ifx_TrapExtension.h" //Assuming this is the file name as in above example
453 *
454 * #define IFXCPU_TRAP_CFG_SYSCALL_CPU0_HOOK(trapInfo) mySysCallExtensionHook(trapInfo)
455 *
456 * #define IFXCPU_TRAP_CFG_SYSCALL_CPU1_HOOK(trapInfo) // Not used in this example
457 *
458 * #define IFXCPU_TRAP_CFG_SYSCALL_CPU2_HOOK(trapInfo) // Not used in this example
459 *
460 * #define IFXCPU_TRAP_CFG_SYSCALL_CPU3_HOOK(trapInfo) // Not used in this example
461 *
462 * #define IFXCPU_TRAP_CFG_SYSCALL_CPU4_HOOK(trapInfo) // Not used in this example
463 *
464 * #define IFXCPU_TRAP_CFG_SYSCALL_CPU5_HOOK(trapInfo) // Not used in this example
465 *
466 * \endcode
467 *
468 * \note The exten hooks are effective only if this feature is enabled.
469 *
470 */
471 /** \} */
472
473 #endif /* IFXCPU_TRAPS_H_ */
IfxCpu_Trap_Bus_Id_dataAccessAsynchronousError
Definition: IfxCpu_Trap.h:139
IfxCpu_Trap_InstructionErrors_Id_dataAddressAlignment
Definition: IfxCpu_Trap.h:114
IfxCpu_Trap::tAddr
unsigned int tAddr
Definition: IfxCpu_Trap.h:185
IfxCpu_Trap_MemoryManagement_Id_virtualAddressFill
Definition: IfxCpu_Trap.h:88
IfxCpu_Trap_Bus_Id_CoprocessorTrapAsynchronousError
Definition: IfxCpu_Trap.h:140
IfxCpu_Trap_Class_contextManagement
Definition: IfxCpu_Trap.h:76
IfxCpu_Trap_InternalProtection_Id_memoryProtectionRead
Definition: IfxCpu_Trap.h:98
IfxCpu_Trap_ContextManagement_Id_freeContextListUnderflow
Definition: IfxCpu_Trap.h:126
IfxCpu_Trap_MemoryManagement_Id
IfxCpu_Trap_MemoryManagement_Id
Enum for available Identification numbers under Memory Management Trap.
Definition: IfxCpu_Trap.h:86
IfxCpu_Trap_Assertion_Id_stickyArithmeticOverflow
Definition: IfxCpu_Trap.h:152
IfxCpu_Trap_InternalProtection_Id_memoryProtectionPeripheralAccess
Definition: IfxCpu_Trap.h:101
IfxCpu_Trap_ContextManagement_Id_contextType
Definition: IfxCpu_Trap.h:128
IfxCpu_Trap_Bus_Id_programFetchSynchronousError
Definition: IfxCpu_Trap.h:137
IfxCpu_Trap_Class_instructionErrors
Definition: IfxCpu_Trap.h:75
IfxCpu_Intrinsics.h
IfxCpu_Trap_Id::internalProtection
IfxCpu_Trap_InternalProtection_Id internalProtection
Definition: IfxCpu_Trap.h:171
IfxCpu_Trap_Class
IfxCpu_Trap_Class
Enum for available Trap classes.
Definition: IfxCpu_Trap.h:71
IfxCpu_Trap_ContextManagement_Id_callDepthUnderflow
Definition: IfxCpu_Trap.h:125
IfxCpu_Trap_ContextManagement_Id_freeContextListDepletion
Definition: IfxCpu_Trap.h:123
IfxCpu_Trap_ContextManagement_Id
IfxCpu_Trap_ContextManagement_Id
Enum for available Identification numbers under Context Management Trap.
Definition: IfxCpu_Trap.h:121
IfxCpu_Trap_InstructionErrors_Id_illegalOpcode
Definition: IfxCpu_Trap.h:111
IfxCpu_Trap_Id::memoryManagement
IfxCpu_Trap_MemoryManagement_Id memoryManagement
Definition: IfxCpu_Trap.h:170
IfxCpu_Trap_InstructionErrors_Id
IfxCpu_Trap_InstructionErrors_Id
Enum for available Identification numbers under Instruction Errors Trap.
Definition: IfxCpu_Trap.h:109
IfxCpu_Trap_Bus_Id
IfxCpu_Trap_Bus_Id
Enum for available Identification numbers under Bus Trap.
Definition: IfxCpu_Trap.h:135
IfxCpu_Trap_Class_memoryManagement
Definition: IfxCpu_Trap.h:73
IfxCpu_Trap_InternalProtection_Id_memoryProtectionNullAddress
Definition: IfxCpu_Trap.h:102
IfxCpu_Trap_Class_systemCall
Definition: IfxCpu_Trap.h:79
IfxCpu_Trap_Bus_Id_dataMemoryIntegrityError
Definition: IfxCpu_Trap.h:142
IfxCpu_Trap_InternalProtection_Id_memoryProtectionExecute
Definition: IfxCpu_Trap.h:100
IfxCpu_Trap_InstructionErrors_Id_unimplementedOpcode
Definition: IfxCpu_Trap.h:112
IfxCpu_Trap_Bus_Id_dataAccessSynchronousError
Definition: IfxCpu_Trap.h:138
IfxCpu_Trap_InternalProtection_Id
IfxCpu_Trap_InternalProtection_Id
Enum for available Identification numbers under Internal Protection Trap.
Definition: IfxCpu_Trap.h:95
IfxCpu_Trap_Bus_Id_temporalAsynchronousError
Definition: IfxCpu_Trap.h:143
IfxCpu_Trap::tId
unsigned int tId
Definition: IfxCpu_Trap.h:186
IfxCpu_Trap_Class_nonMaskableInterrupt
Definition: IfxCpu_Trap.h:80
IfxCpu_Trap_Id::contextManagement
IfxCpu_Trap_ContextManagement_Id contextManagement
Definition: IfxCpu_Trap.h:173
IfxCpu_Trap_InstructionErrors_Id_invalidOperand
Definition: IfxCpu_Trap.h:113
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxCpu_Trap_NonMaskableInterrupt_Id
sint32 IfxCpu_Trap_NonMaskableInterrupt_Id
Type for Identification number for Non Maskable Interrupt Trap.
Definition: IfxCpu_Trap.h:163
IfxCpu_Trap_InternalProtection_Id_globalRegisterWriteProtection
Definition: IfxCpu_Trap.h:103
IfxCpu_Trap_Assertion_Id_arithmeticOverflow
Definition: IfxCpu_Trap.h:151
IfxCpu_Trap_ContextManagement_Id_callDepthOverflow
Definition: IfxCpu_Trap.h:124
IfxCpu_Trap_InternalProtection_Id_memoryProtectionWrite
Definition: IfxCpu_Trap.h:99
IfxCpu_Trap_Class_bus
Definition: IfxCpu_Trap.h:77
IfxCpu_Trap_ContextManagement_Id_callStackUnderflow
Definition: IfxCpu_Trap.h:127
IfxCpu_Trap::tCpu
unsigned int tCpu
Definition: IfxCpu_Trap.h:188
IfxCpu_Trap_InstructionErrors_Id_invalidMemoryAddress
Definition: IfxCpu_Trap.h:115
IfxCpu_Trap_Id::instructionErrors
IfxCpu_Trap_InstructionErrors_Id instructionErrors
Definition: IfxCpu_Trap.h:172
sint32
long sint32
Definition: Platform_Types.h:134
IfxCpu_Trap::tClass
unsigned int tClass
Definition: IfxCpu_Trap.h:187
IfxCpu_Trap_Class_internalProtection
Definition: IfxCpu_Trap.h:74
IfxCpu_Trap_SystemCall_Id
sint32 IfxCpu_Trap_SystemCall_Id
Type for Identification numbers under SystemCall Trap.
Definition: IfxCpu_Trap.h:158
IfxCpu_Trap
Structure to contain the trap information.
Definition: IfxCpu_Trap.h:183
IfxCpu_Trap_ContextManagement_Id_nestingError
Definition: IfxCpu_Trap.h:129
IfxCpu_Trap_Id::nonMaskableInterrupt
IfxCpu_Trap_NonMaskableInterrupt_Id nonMaskableInterrupt
Definition: IfxCpu_Trap.h:177
IfxCpu_Trap_MemoryManagement_Id_virtualAddressProtection
Definition: IfxCpu_Trap.h:89
IfxCpu_Trap_Assertion_Id
IfxCpu_Trap_Assertion_Id
Enum for available Identification numbers under Assertion Trap.
Definition: IfxCpu_Trap.h:149
IfxCpu_Trap_Id::bus
IfxCpu_Trap_Bus_Id bus
Definition: IfxCpu_Trap.h:174
IfxCpu_Trap_InternalProtection_Id_privilegeViolation
Definition: IfxCpu_Trap.h:97
IfxCpu_Trap_Id::systemCall
IfxCpu_Trap_SystemCall_Id systemCall
Definition: IfxCpu_Trap.h:176
IfxCpu_Trap_Id
Union to abstract Identification numbers under Traps.
Definition: IfxCpu_Trap.h:168
IfxCpu_Trap_Class_assertion
Definition: IfxCpu_Trap.h:78
IfxCpu_Trap_Id::assertion
IfxCpu_Trap_Assertion_Id assertion
Definition: IfxCpu_Trap.h:175
IfxCpu_Trap_Bus_Id_programMemoryIntegrityError
Definition: IfxCpu_Trap.h:141


iLLD_TC38A: IfxCpu_cfg.c Source File

  • _Impl
IfxCpu_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxCpu_cfg.c
3 * \brief CPU on-chip implementation data
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxCpu_cfg.h"
47
48 /******************************************************************************/
49 /*-----------------------Exported Variables/Constants-------------------------*/
50 /******************************************************************************/
51
52 IFX_CONST IfxModule_IndexMap IfxCpu_cfg_indexMap[IFXCPU_NUM_MODULES] = {
53 {&MODULE_CPU0, (uint32)IfxCpu_ResourceCpu_0},
54 {&MODULE_CPU1, (uint32)IfxCpu_ResourceCpu_1},
55 {&MODULE_CPU2, (uint32)IfxCpu_ResourceCpu_2},
56 {&MODULE_CPU3, (uint32)IfxCpu_ResourceCpu_3}
57 };
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxCpu_ResourceCpu_2
CPU 2.
Definition: IfxCpu_cfg.h:161
IfxCpu_ResourceCpu_3
CPU 3.
Definition: IfxCpu_cfg.h:162
IfxCpu_ResourceCpu_0
CPU 0.
Definition: IfxCpu_cfg.h:159
IfxCpu_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxCpu_cfg_indexMap[IFXCPU_NUM_MODULES]
Definition: IfxCpu_cfg.c:52
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:140
IfxCpu_cfg.h
CPU on-chip implementation data.
IFXCPU_NUM_MODULES
#define IFXCPU_NUM_MODULES
CPU count.
Definition: IfxCpu_cfg.h:65
IfxCpu_ResourceCpu_1
CPU 1.
Definition: IfxCpu_cfg.h:160


iLLD_TC38A: IfxCpu_cfg.h Source File

  • _Impl
IfxCpu_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxCpu_cfg.h
3 * \brief CPU on-chip implementation data
4 * \ingroup IfxLld_Cpu
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Cpu CPU
42 * \ingroup IfxLld
43 * \defgroup IfxLld_Cpu_Impl Implementation
44 * \ingroup IfxLld_Cpu
45 * \defgroup IfxLld_Cpu_Std Standard Driver
46 * \ingroup IfxLld_Cpu
47 */
48
49 #ifndef IFXCPU_CFG_H
50 #define IFXCPU_CFG_H 1
51
52 /******************************************************************************/
53 /*----------------------------------Includes----------------------------------*/
54 /******************************************************************************/
55
56 #include "Cpu/Std/IfxCpu_Intrinsics.h"
57 #include "IfxCpu_reg.h"
58
59 /******************************************************************************/
60 /*-----------------------------------Macros-----------------------------------*/
61 /******************************************************************************/
62
63 /** \brief CPU count
64 */
65 #define IFXCPU_NUM_MODULES (4)
66
67 /** \brief Segment number of cachable flash region
68 */
69 #define IFXCPU_CACHABLE_FLASH_SEGMENT (8)
70
71 /** \brief Segment number of cachable LMU region
72 */
73 #define IFXCPU_CACHABLE_LMU_SEGMENT (9)
74
75 /** \brief All cores (coreIDs) mask. This macro can be defined by the user according to the number of core being enabled.
76 * So that can be used for syncronisation among multiple cores. In case user didn't define this macro, by default this
77 * mask will be generated for all the available cores of the device.
78 * e.g:
79 * 1. Check for synchronisation between core 0 and core 5
80 * # define 0x41U
81 * 2. Check for synchronisation between core 0 to core 5
82 * # define 0x5FU
83 *
84 * Note:
85 * Core id values read from CORE_ID register will be as shown below. The value
86 * indicates the position of the bit needs to be set while building the macro.
87 * Core 0: 0
88 * Core 1: 1
89 * Core 2: 2
90 * Core 3: 3
91 * Core 4: 4
92 * Core 5: 6
93 */
94 #ifndef IFXCPU_CFG_ALLCORE_DONE
95 #define IFXCPU_CFG_ALLCORE_DONE (0xF)
96 #endif
97
98 /** \brief
99 */
100 #ifndef IFXCPU_ALLCORE_DONE
101 #define IFXCPU_ALLCORE_DONE IFXCPU_CFG_ALLCORE_DONE
102 #else
103 #ifdef __TASKING__
104 # pragma message("IFXCPU_ALLCORE_DONE macro is going to be deprecated. Use IFXCPU_CFG_ALLCORE_DONE instead.")
105 #else
106 # warning IFXCPU_ALLCORE_DONE macro is going to be deprecated. Use IFXCPU_CFG_ALLCORE_DONE instead.
107 #endif
108 #endif
109
110 /******************************************************************************/
111 /*-------------------------------Enumerations---------------------------------*/
112 /******************************************************************************/
113
114 /** \brief Halt status
115 */
116 typedef enum
117 {
118 IfxCpu_DBGST_HALT_run = 0,
119 IfxCpu_DBGST_HALT_halt = 1
120 } IfxCpu_DBGST_HALT;
121
122 /** \brief List of the available CPU ids
123 */
124 typedef enum
125 {
126 IfxCpu_Id_0 = 0, /**< \brief CPU 0 */
127 IfxCpu_Id_1 = 1, /**< \brief CPU 1 */
128 IfxCpu_Id_2 = 2, /**< \brief CPU 2 */
129 IfxCpu_Id_3 = 3, /**< \brief CPU 3 */
130 IfxCpu_Id_none /**< \brief None of the CPU */
131 } IfxCpu_Id;
132
133 /** \brief List of the available CPU resources
134 */
135 typedef enum
136 {
137 IfxCpu_Index_0 = 0, /**< \brief CPU 0 */
138 IfxCpu_Index_1 = 1, /**< \brief CPU 1 */
139 IfxCpu_Index_2 = 2, /**< \brief CPU 2 */
140 IfxCpu_Index_3 = 3, /**< \brief CPU 3 */
141 IfxCpu_Index_none /**< \brief None of the CPU */
142 } IfxCpu_Index;
143
144 /** \brief Power management status
145 */
146 typedef enum
147 {
148 IfxCpu_PMCSR_PMST_normalMode = 1,
149 IfxCpu_PMCSR_PMST_idleModeRequest = 2,
150 IfxCpu_PMCSR_PMST_idleMode = 3,
151 IfxCpu_PMCSR_PMST_sleepModeRequest = 4,
152 IfxCpu_PMCSR_PMST_standbyModeRequest = 6
153 } IfxCpu_PMCSR_PMST;
154
155 /** \brief List of the available CPU resources
156 */
157 typedef enum
158 {
159 IfxCpu_ResourceCpu_0 = IfxCpu_Index_0, /**< \brief CPU 0 */
160 IfxCpu_ResourceCpu_1 = IfxCpu_Index_1, /**< \brief CPU 1 */
161 IfxCpu_ResourceCpu_2 = IfxCpu_Index_2, /**< \brief CPU 2 */
162 IfxCpu_ResourceCpu_3 = IfxCpu_Index_3, /**< \brief CPU 3 */
163 IfxCpu_ResourceCpu_none = IfxCpu_Index_none /**< \brief None of the CPU */
164 } IfxCpu_ResourceCpu;
165
166 /******************************************************************************/
167 /*-------------------Global Exported Variables/Constants----------------------*/
168 /******************************************************************************/
169
170 IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxCpu_cfg_indexMap[IFXCPU_NUM_MODULES];
171
172 #endif /* IFXCPU_CFG_H */
IfxCpu_Id_none
None of the CPU.
Definition: IfxCpu_cfg.h:130
IfxCpu_DBGST_HALT_halt
Definition: IfxCpu_cfg.h:119
IfxCpu_cfg_indexMap
IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxCpu_cfg_indexMap[IFXCPU_NUM_MODULES]
Definition: IfxCpu_cfg.h:170
IfxCpu_Index_0
CPU 0.
Definition: IfxCpu_cfg.h:137
IfxCpu_ResourceCpu_none
None of the CPU.
Definition: IfxCpu_cfg.h:163
IfxCpu_Index_1
CPU 1.
Definition: IfxCpu_cfg.h:138
IfxCpu_Id_2
CPU 2.
Definition: IfxCpu_cfg.h:128
IfxCpu_PMCSR_PMST
IfxCpu_PMCSR_PMST
Power management status.
Definition: IfxCpu_cfg.h:146
IfxCpu_PMCSR_PMST_sleepModeRequest
Definition: IfxCpu_cfg.h:151
IfxCpu_Intrinsics.h
IfxCpu_DBGST_HALT
IfxCpu_DBGST_HALT
Halt status.
Definition: IfxCpu_cfg.h:116
IfxCpu_PMCSR_PMST_normalMode
Definition: IfxCpu_cfg.h:148
IfxCpu_Id_0
CPU 0.
Definition: IfxCpu_cfg.h:126
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxCpu_PMCSR_PMST_idleMode
Definition: IfxCpu_cfg.h:150
IfxCpu_DBGST_HALT_run
Definition: IfxCpu_cfg.h:118
IfxCpu_ResourceCpu
IfxCpu_ResourceCpu
List of the available CPU resources.
Definition: IfxCpu_cfg.h:157
IfxCpu_Id
IfxCpu_Id
List of the available CPU ids.
Definition: IfxCpu_cfg.h:124
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxCpu_Id_1
CPU 1.
Definition: IfxCpu_cfg.h:127
IfxCpu_PMCSR_PMST_standbyModeRequest
Definition: IfxCpu_cfg.h:152
IfxCpu_Index_2
CPU 2.
Definition: IfxCpu_cfg.h:139
IfxCpu_ResourceCpu_2
CPU 2.
Definition: IfxCpu_cfg.h:161
IfxCpu_PMCSR_PMST_idleModeRequest
Definition: IfxCpu_cfg.h:149
IfxCpu_Index_none
None of the CPU.
Definition: IfxCpu_cfg.h:141
IfxCpu_ResourceCpu_3
CPU 3.
Definition: IfxCpu_cfg.h:162
IfxCpu_Id_3
CPU 3.
Definition: IfxCpu_cfg.h:129
IfxCpu_Index_3
CPU 3.
Definition: IfxCpu_cfg.h:140
IfxCpu_ResourceCpu_0
CPU 0.
Definition: IfxCpu_cfg.h:159
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:140
IFXCPU_NUM_MODULES
#define IFXCPU_NUM_MODULES
CPU count.
Definition: IfxCpu_cfg.h:65
IfxCpu_Index
IfxCpu_Index
List of the available CPU resources.
Definition: IfxCpu_cfg.h:135
IfxCpu_ResourceCpu_1
CPU 1.
Definition: IfxCpu_cfg.h:160


iLLD_TC38A: IfxDma.c Source File

  • Dma
  • Std
IfxDma.c
Go to the documentation of this file.
1 /**
2 * \file IfxDma.c
3 * \brief DMA basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxDma.h"
IfxDma.h
DMA basic functionality.


iLLD_TC38A: IfxDma.h Source File

  • Dma
  • Std
IfxDma.h
Go to the documentation of this file.
1 /**
2 * \file IfxDma.h
3 * \brief DMA basic functionality
4 * \ingroup IfxLld_Dma
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Dma_Std_Enum Enumerations
42 * \ingroup IfxLld_Dma_Std
43 * \defgroup IfxLld_Dma_Std_Reset Reset Functions
44 * \ingroup IfxLld_Dma_Std
45 * \defgroup IfxLld_Dma_Std_Channel_Transaction Channel Transaction Functions
46 * \ingroup IfxLld_Dma_Std
47 * \defgroup IfxLld_Dma_Std_Move_Engine Move Engine functions
48 * \ingroup IfxLld_Dma_Std
49 * \defgroup IfxLld_Dma_Std_Channel_Configure Channel configuration Functions
50 * \ingroup IfxLld_Dma_Std
51 * \defgroup IfxLld_Dma_Std_Channel_Halt Channel Halt Functions
52 * \ingroup IfxLld_Dma_Std
53 * \defgroup IfxLld_Dma_Std_Double_Buffer Double Buffer functions
54 * \ingroup IfxLld_Dma_Std
55 * \defgroup IfxLld_Dma_Std_Interrupts Interrupt functions
56 * \ingroup IfxLld_Dma_Std
57 */
58
59 #ifndef IFXDMA_H
60 #define IFXDMA_H 1
61
62 /******************************************************************************/
63 /*----------------------------------Includes----------------------------------*/
64 /******************************************************************************/
65
66 #include "_Impl/IfxDma_cfg.h"
67 #include "IfxDma_bf.h"
68 #include "Cpu/Std/IfxCpu_Intrinsics.h"
69 #include "IfxDma_reg.h"
70 #include "Src/Std/IfxSrc.h"
71 #include "Scu/Std/IfxScuWdt.h"
72 #include "Scu/Std/IfxScuCcu.h"
73
74 /******************************************************************************/
75 /*--------------------------------Enumerations--------------------------------*/
76 /******************************************************************************/
77
78 /** \addtogroup IfxLld_Dma_Std_Enum
79 * \{ */
80 /** \brief Bus Master Mode definition
81 * Definition in Ifx_DMA.MODE[4].B.MODE
82 */
83 typedef enum
84 {
85 IfxDma_BusMasterMode_user = 0, /**< \brief Selected hardware resource performs Bus access in user mode */
86 IfxDma_BusMasterMode_supervisor = 1 /**< \brief Selected hardware resource performs Bus access in supervisor mode */
87 } IfxDma_BusMasterMode;
88
89 /** \brief Channel Bus Priority definition
90 */
91 typedef enum
92 {
93 IfxDma_ChannelBusPriority_low = 0, /**< \brief low priority */
94 IfxDma_ChannelBusPriority_medium = 1, /**< \brief medium priority */
95 IfxDma_ChannelBusPriority_high = 2 /**< \brief high priority */
96 } IfxDma_ChannelBusPriority;
97
98 /** \brief DMA circular buffer (wrap around) definition
99 * Definition in Ifx_DMA.CH[64].ADICR.B.CBLS and Ifx_DMA.CH[64].ADICR.B.CBLD
100 */
101 typedef enum
102 {
103 IfxDma_ChannelIncrementCircular_none = 0, /**< \brief no circular buffer operation */
104 IfxDma_ChannelIncrementCircular_2 = 1, /**< \brief circular buffer size is 2 byte */
105 IfxDma_ChannelIncrementCircular_4 = 2, /**< \brief circular buffer size is 4 byte */
106 IfxDma_ChannelIncrementCircular_8 = 3, /**< \brief circular buffer size is 8 byte */
107 IfxDma_ChannelIncrementCircular_16 = 4, /**< \brief circular buffer size is 16 byte */
108 IfxDma_ChannelIncrementCircular_32 = 5, /**< \brief circular buffer size is 32 byte */
109 IfxDma_ChannelIncrementCircular_64 = 6, /**< \brief circular buffer size is 64 byte */
110 IfxDma_ChannelIncrementCircular_128 = 7, /**< \brief circular buffer size is 128 byte */
111 IfxDma_ChannelIncrementCircular_256 = 8, /**< \brief circular buffer size is 256 byte */
112 IfxDma_ChannelIncrementCircular_512 = 9, /**< \brief circular buffer size is 512 byte */
113 IfxDma_ChannelIncrementCircular_1024 = 10, /**< \brief circular buffer size is 1024 byte */
114 IfxDma_ChannelIncrementCircular_2048 = 11, /**< \brief circular buffer size is 2048 byte */
115 IfxDma_ChannelIncrementCircular_4096 = 12, /**< \brief circular buffer size is 4096 byte */
116 IfxDma_ChannelIncrementCircular_8192 = 13, /**< \brief circular buffer size is 8192 byte */
117 IfxDma_ChannelIncrementCircular_16384 = 14, /**< \brief circular buffer size is 16384 byte */
118 IfxDma_ChannelIncrementCircular_32768 = 15 /**< \brief circular buffer size is 32768 byte */
119 } IfxDma_ChannelIncrementCircular;
120
121 /** \brief DMA incrementation direction definition
122 * Definition in Ifx_DMA.CH[64].ADICR.B.INCS
123 */
124 typedef enum
125 {
126 IfxDma_ChannelIncrementDirection_negative = 0, /**< \brief pointer is decremented */
127 IfxDma_ChannelIncrementDirection_positive = 1 /**< \brief pointer is incremented */
128 } IfxDma_ChannelIncrementDirection;
129
130 /** \brief DMA incrementation definition
131 * Definition in Ifx_DMA.CH[64].ADICR.B.SMF
132 */
133 typedef enum
134 {
135 IfxDma_ChannelIncrementStep_1 = 0, /**< \brief increment by 1 width */
136 IfxDma_ChannelIncrementStep_2 = 1, /**< \brief increment by 2 width */
137 IfxDma_ChannelIncrementStep_4 = 2, /**< \brief increment by 4 width */
138 IfxDma_ChannelIncrementStep_8 = 3, /**< \brief increment by 8 width */
139 IfxDma_ChannelIncrementStep_16 = 4, /**< \brief increment by 16 width */
140 IfxDma_ChannelIncrementStep_32 = 5, /**< \brief increment by 32 width */
141 IfxDma_ChannelIncrementStep_64 = 6, /**< \brief increment by 64 width */
142 IfxDma_ChannelIncrementStep_128 = 7 /**< \brief increment by 128 width */
143 } IfxDma_ChannelIncrementStep;
144
145 /** \brief Channel Transfer Interrupt generation mechanism.
146 * Definition in Ifx_DMA.CH[64].ADICR.B.INTCT (bit 0)
147 */
148 typedef enum
149 {
150 IfxDma_ChannelInterruptControl_thresholdLimitMatch = 0, /**< \brief interrupt when transfer count (TCOUNT) equals the threshold limit (IRDV) */
151 IfxDma_ChannelInterruptControl_transferCountDecremented = 1 /**< \brief interrupt when transfer count (TCOUNT) is decremented */
152 } IfxDma_ChannelInterruptControl;
153
154 /** \brief DMA transfer definition
155 * Definition in Ifx_DMA.ME0.CHCR.B.BLKM and Ifx_DMA.ME1.CHCR.B.BLKM
156 */
157 typedef enum
158 {
159 IfxDma_ChannelMove_1 = 0, /**< \brief 1 DMA move per DMA transfer */
160 IfxDma_ChannelMove_2 = 1, /**< \brief 2 DMA move per DMA transfer */
161 IfxDma_ChannelMove_4 = 2, /**< \brief 4 DMA move per DMA transfer */
162 IfxDma_ChannelMove_8 = 3, /**< \brief 8 DMA move per DMA transfer */
163 IfxDma_ChannelMove_16 = 4, /**< \brief 16 DMA move per DMA transfer */
164 IfxDma_ChannelMove_3 = 5, /**< \brief 3 DMA move per DMA transfer */
165 IfxDma_ChannelMove_5 = 6, /**< \brief 5 DMA move per DMA transfer */
166 IfxDma_ChannelMove_9 = 7 /**< \brief 9 DMA move per DMA transfer */
167 } IfxDma_ChannelMove;
168
169 /** \brief DMA move size definition
170 * Definition in Ifx_DMA.ME0.CHCR.B.CHDW and Ifx_DMA.ME1.CHCR.B.CHDW
171 */
172 typedef enum
173 {
174 IfxDma_ChannelMoveSize_8bit = 0, /**< \brief 1 DMA move is 8 bit wide */
175 IfxDma_ChannelMoveSize_16bit = 1, /**< \brief 1 DMA move is 16 bit wide */
176 IfxDma_ChannelMoveSize_32bit = 2, /**< \brief 1 DMA move is 32 bit wide */
177 IfxDma_ChannelMoveSize_64bit = 3, /**< \brief 1 DMA move is 64 bit wide */
178 IfxDma_ChannelMoveSize_128bit = 4, /**< \brief 1 DMA move is 128 bit wide */
179 IfxDma_ChannelMoveSize_256bit = 5 /**< \brief 1 DMA move is 256 bit wide */
180 } IfxDma_ChannelMoveSize;
181
182 /** \brief DMA operation mode
183 * Definition in Ifx_DMA.ME0.CHCR.B.CHMODE and Ifx_DMA.ME1.CHCR.B.CHMODE
184 */
185 typedef enum
186 {
187 IfxDma_ChannelOperationMode_single = 0, /**< \brief channel disabled after transaction */
188 IfxDma_ChannelOperationMode_continuous = 1 /**< \brief channel stays enabled after transaction */
189 } IfxDma_ChannelOperationMode;
190
191 /** \brief Pattern detection selection
192 * Definition in Ifx_DMA.ME0.CHCR.B.PATSEL and Ifx_DMA.ME1.CHCR.B.PATSEL
193 */
194 typedef enum
195 {
196 IfxDma_ChannelPattern_0_disable = 0, /**< \brief Pattern detect 0 disabled */
197 IfxDma_ChannelPattern_0_mode1 = 1, /**< \brief Compare match configuration 1 : pattern compare of MExR.RD[0] to PAT0[0] masked by PAT0[2] */
198 IfxDma_ChannelPattern_0_mode2 = 2, /**< \brief Compare match configuration 2 : pattern compare of MExR.RD[0] to PAT0[1] masked by PAT0[3] */
199 IfxDma_ChannelPattern_0_mode3 = 3, /**< \brief Compare match configuration 3 : pattern compare of MExR.RD[0] to PAT0[0] masked by PAT0[2] of actual DMA read move and pattern compare of MExR.RD[0] to PAT0[1] masked by PAT0[3] of previous DMA read move */
200 IfxDma_ChannelPattern_1_disable = 4, /**< \brief Pattern detect 1 disabled */
201 IfxDma_ChannelPattern_1_mode1 = 5, /**< \brief Compare match configuration 1 : pattern compare of MExR.RD[0] to PAT1[0] masked by PAT1[2] */
202 IfxDma_ChannelPattern_1_mode2 = 6, /**< \brief Compare match configuration 2 : pattern compare of MExR.RD[0] to PAT1[1] masked by PAT1[3] */
203 IfxDma_ChannelPattern_1_mode3 = 7 /**< \brief Compare match configuration 3 : pattern compare of MExR.RD[0] to PAT1[0] masked by PAT1[2] of actual DMA read move and pattern compare of MExR.RD[0] to PAT1[1] masked by PAT1[3] of previous DMA read move */
204 } IfxDma_ChannelPattern;
205
206 /** \brief Channel Priority definition
207 */
208 typedef enum
209 {
210 IfxDma_ChannelPriority_low = 0, /**< \brief low priority */
211 IfxDma_ChannelPriority_medium = 1, /**< \brief medium priority */
212 IfxDma_ChannelPriority_high = 2 /**< \brief high priority */
213 } IfxDma_ChannelPriority;
214
215 /** \brief DMA request mode
216 * Definition in Ifx_DMA.ME0.CHCR.B.RROAT and Ifx_DMA.ME1.CHCR.B.RROAT
217 */
218 typedef enum
219 {
220 IfxDma_ChannelRequestMode_oneTransferPerRequest = 0, /**< \brief a request initiates a single transfer */
221 IfxDma_ChannelRequestMode_completeTransactionPerRequest = 1 /**< \brief a request initiates a complete transaction */
222 } IfxDma_ChannelRequestMode;
223
224 /** \brief DMA request selection
225 * Definition in Ifx_DMA.ME0.CHCR.B.PRSEL and Ifx_DMA.ME1.CHCR.B.PRSEL
226 */
227 typedef enum
228 {
229 IfxDma_ChannelRequestSource_peripheral = 0, /**< \brief Transfer Request via Hardware Trigger */
230 IfxDma_ChannelRequestSource_daisyChain = 1 /**< \brief Transfer Request via next (higher priority) channel */
231 } IfxDma_ChannelRequestSource;
232
233 /** \brief shadow definition definition
234 * Definition in Ifx_DMA.CH[64].ADICR.B.SHCT
235 */
236 typedef enum
237 {
238 IfxDma_ChannelShadow_none = 0, /**< \brief shadow address register not used. Source and destination address register are written directly */
239 IfxDma_ChannelShadow_src = 1, /**< \brief Shadow address register used for source address buffering. When writing to SADRmx, the address is buffered in SHADRmx and transferred to SADRmx with the start of the next DMA transaction */
240 IfxDma_ChannelShadow_dst = 2, /**< \brief Shadow address register used for destination address buffering. When writing to DADRmx, the address is buffered in SHADRmx and transferred to DADRmx with the start of the next DMA transaction */
241 IfxDma_ChannelShadow_srcDirectWrite = 5, /**< \brief Shadow address used for source buffering. When writing to SADRz, the address is buffered in SHADRz and transferred to SADRz with the start of the next DMA transaction */
242 IfxDma_ChannelShadow_dstDirectWrite = 6, /**< \brief Shadow address used for destination buffering. When writing to DADRz, the address is buffered in SHADRz and transferred to DADRz with the start of the next DMA transaction */
243 IfxDma_ChannelShadow_doubleSourceBufferingSwSwitch = 8, /**< \brief Software switch only. Shadow address used for double buffering */
244 IfxDma_ChannelShadow_doubleSourceBufferingHwSwSwitch = 9, /**< \brief Automatic Hardware and Software switch. Shadow address used for double buffering */
245 IfxDma_ChannelShadow_doubleDestinationBufferingSwSwitch = 10, /**< \brief Software switch only. Shadow address used for double buffering */
246 IfxDma_ChannelShadow_doubleDestinationBufferingHwSwSwitch = 11, /**< \brief Automatic Hardware and Software switch. Shadow address used for double buffering */
247 IfxDma_ChannelShadow_linkedList = 12, /**< \brief The DMA controller reads a DMA channel transaction control set and overwrites 8 X words in the corresponding DMARAM channel z */
248 IfxDma_ChannelShadow_accumulatedLinkedList = 13, /**< \brief The DMA controller reads a DMA channel transaction control set and overwrites 6 X words in the corresponding DMARAM channel z */
249 IfxDma_ChannelShadow_safeLinkedList = 14, /**< \brief The DMA controller reads a DMA channel transaction control set. The Linked List only proceeds with the next DMA transaction if the existing SDCRC checksum matches the expected SDCRC checksum in the loaded from the new DMA transaction control set */
250 IfxDma_ChannelShadow_conditionalLinkedList = 15 /**< \brief Shadow address register (MExSHADR) and source and destination address CRC register (MExSDCRC) are used as address pointers to a Linked List. The selection of the address pointer is determined by DMA channel pattern detection conditions */
251 } IfxDma_ChannelShadow;
252
253 typedef enum
254 {
255 IfxDma_HardwareResourcePartition_0 = 0, /**< \brief "Set of DMA channels are associated with hardware resource partition " + str(x) */
256 IfxDma_HardwareResourcePartition_1, /**< \brief "Set of DMA channels are associated with hardware resource partition " + str(x) */
257 IfxDma_HardwareResourcePartition_2, /**< \brief "Set of DMA channels are associated with hardware resource partition " + str(x) */
258 IfxDma_HardwareResourcePartition_3 /**< \brief "Set of DMA channels are associated with hardware resource partition " + str(x) */
259 } IfxDma_HardwareResourcePartition;
260
261 /** \brief DMA move engine definition
262 */
263 typedef enum
264 {
265 IfxDma_MoveEngine_0 = 0, /**< \brief first move engine */
266 IfxDma_MoveEngine_1 = 1 /**< \brief second move engine */
267 } IfxDma_MoveEngine;
268
269 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
270 * Definition in Ifx_DMA.CLC.B.EDIS
271 */
272 typedef enum
273 {
274 IfxDma_SleepMode_enable = 0, /**< \brief enables sleep mode */
275 IfxDma_SleepMode_disable = 1 /**< \brief disables sleep mode */
276 } IfxDma_SleepMode;
277
278 /** \} */
279
280 /** \addtogroup IfxLld_Dma_Std_Reset
281 * \{ */
282
283 /******************************************************************************/
284 /*-------------------------Inline Function Prototypes-------------------------*/
285 /******************************************************************************/
286
287 /** \brief Return the status of a DMA channel (reset / not reset)
288 * This API needs to be used after the IfxDma_resetChannel()
289 * \param dma pointer to DMA module
290 * \param channelId DMA channel number
291 * \return TRUE if the channel is reset
292 * FALSE if the channel is not reset
293 *
294 * \code
295 * // check whether the channel is reset or not and also the hardware trigger disabled
296 *
297 * if (IfxDma_isChannelReset(chn[0].dma, chn[0].channelId) &&
298 * (!IfxDma_isChannelTransactionEnabled(chn[0].dma, chn[0].channelId))) {
299 * // Dma is out of RESET and there is no hardware request enabled
300 * IfxDma_Dma_startChannelTransaction(&chn[0]);
301 * }
302 * \endcode
303 *
304 */
305 IFX_INLINE boolean IfxDma_isChannelReset(Ifx_DMA *dma, IfxDma_ChannelId channelId);
306
307 /** \brief Reset the channel
308 * \param dma pointer to DMA module
309 * \param channelId DMA channel number
310 * \return None
311 *
312 * \code
313 * // Apply reset to the channel
314 * IfxDma_resetChannel(chn[0].dma, chn[0].channelId);
315 * \endcode
316 *
317 */
318 IFX_INLINE void IfxDma_resetChannel(Ifx_DMA *dma, IfxDma_ChannelId channelId);
319
320 /** \} */
321
322 /** \addtogroup IfxLld_Dma_Std_Channel_Transaction
323 * \{ */
324
325 /******************************************************************************/
326 /*-------------------------Inline Function Prototypes-------------------------*/
327 /******************************************************************************/
328
329 /** \brief Clear the channel transaction request lost flag status
330 * \param dma pointer to DMA module
331 * \param channelId DMA channel number
332 * \return None
333 *
334 * \code
335 * // Clear the channel transaction request lost flag status
336 * IfxDma_clearChannelTransactionRequestLost(chn[0].dma, chn[0].channelId);
337 * \endcode
338 *
339 */
340 IFX_INLINE void IfxDma_clearChannelTransactionRequestLost(Ifx_DMA *dma, IfxDma_ChannelId channelId);
341
342 /** \brief Disable a DMA channel hardware transaction request
343 * \param dma pointer to DMA module
344 * \param channelId DMA channel number
345 * \return None
346 *
347 * A coding example can be found in \ref IfxDma_enableChannelTransaction
348 *
349 */
350 IFX_INLINE void IfxDma_disableChannelTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId);
351
352 /** \brief Disable the generation of a channel transaction lost error interrupt
353 * \param dma pointer to DMA module
354 * \param channelId DMA channel number
355 * \return None
356 *
357 * \code
358 * // Disable the transaction request lost interrupt for given channel
359 * IfxDma_disableChannelTransactionLostError(chn[0].dma, chn[0].channelId);
360 * \endcode
361 *
362 */
363 IFX_INLINE void IfxDma_disableChannelTransactionLostError(Ifx_DMA *dma, IfxDma_ChannelId channelId);
364
365 /** \brief Enable a DMA channel hardware transaction request
366 * \param dma pointer to DMA module
367 * \param channelId DMA channel number
368 * \return None
369 *
370 * \code
371 * unsigned *src = (unsigned *)((unsigned)&SRC_DMACH0.U + 4*NUM_CHANNELS);
372 * for(int chn=0; chn<NUM_CHANNELS; ++chn, ++src) {
373 * IfxSrc_setRequest(src);
374 * }
375 *
376 * // Do not restrict the hardware triggering to only one transaction
377 *
378 * IfxDma_setChannelContinuousMode(chn[0].dma, chn[0].channelId);
379 * IfxDma_setChannelContinuousMode(chn[1].dma, chn[1].channelId);
380 * IfxDma_setChannelContinuousMode(chn[2].dma, chn[2].channelId);
381 *
382 * // Check for end of transaction
383 *
384 * while(!(IfxDma_getAndClearChannelInterrupt(chn[0].dma, chn[0].channelId)));
385 *
386 * // Enable the hardware trigger for channel 3
387 * IfxDma_enableChannelTransaction(chn[3].dma, chn[3].channelId);
388 *
389 * // Disable the hardware trigger for channel 2
390 * IfxDma_disableChannelTransaction(chn[2].dma, chn[2].channelId);
391 * // Hardware triggers for second time
392 *
393 * unsigned *SRc = (unsigned *)((unsigned)&SRC_DMACH0.U + 4*NUM_CHANNELS);
394 * for(int chn=0; chn<NUM_CHANNELS; ++chn, ++src) {
395 * IfxSrc_setRequest(src);
396 * }
397 *
398 * // Restrict the hardware triggering to only one transaction
399 * IfxDma_setChannelSingleMode(chn[0].dma, chn[0].channelId);
400 * IfxDma_setChannelSingleMode(chn[1].dma, chn[1].channelId);
401 * \endcode
402 *
403 */
404 IFX_INLINE void IfxDma_enableChannelTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId);
405
406 /** \brief Enable the generation of a channel transaction lost error interrupt
407 * \param dma pointer to DMA module
408 * \param channelId DMA channel number
409 * \return None
410 *
411 * \code
412 * // Enable the transaction request lost interrupt for given channel
413 * IfxDma_enableChannelTransactionLostError(chn[0].dma, chn[0].channelId);
414 * \endcode
415 *
416 */
417 IFX_INLINE void IfxDma_enableChannelTransactionLostError(Ifx_DMA *dma, IfxDma_ChannelId channelId);
418
419 /** \brief Check the channel transaction request lost flag status
420 * \param dma pointer to DMA module
421 * \param channelId DMA channel number
422 * \return TRUE if the TRL is set
423 * FALSE if the TRL is not set
424 *
425 * \code
426 * boolean trlFlag;
427 *
428 * // Check whether the channel transaction request lost flag is set or not
429 * trlFlag = IfxDma_getChannelTransactionRequestLost(chn[0].dma, chn[0].channelId));
430 * \endcode
431 *
432 */
433 IFX_INLINE boolean IfxDma_getChannelTransactionRequestLost(Ifx_DMA *dma, IfxDma_ChannelId channelId);
434
435 /** \brief Converts DMA circular range to circular code
436 * \param range DMA circular range
437 * \return DMA circular code
438 */
439 IFX_INLINE IfxDma_ChannelIncrementCircular IfxDma_getCircularRangeCode(uint16 range);
440
441 /** \brief Return the hardware transaction request status of a DMA channel
442 * \param dma pointer to DMA module
443 * \param channelId DMA channel number
444 * \return TRUE if the hardware transaction request is enabled
445 * FALSE if the hardware transaction request is disabled
446 *
447 * A coding example can be found in \ref IfxDma_isChannelReset
448 *
449 */
450 IFX_INLINE boolean IfxDma_isChannelTransactionEnabled(Ifx_DMA *dma, IfxDma_ChannelId channelId);
451
452 /** \brief Return the status of a DMA channel (transaction pending)
453 * \param dma pointer to DMA module
454 * \param channelId DMA channel number
455 * \return TRUE if a transaction request for the given channel is pending
456 *
457 * \code
458 * // check for the channel request pending with the channel
459 * if (IfxDma_isChannelTransactionPending(chn[0].dma, chn[0].channelId) == TRUE) {
460 * // There is channel request pending for channel 0
461 * result |= 0;
462 * }
463 * \endcode
464 *
465 */
466 IFX_INLINE boolean IfxDma_isChannelTransactionPending(Ifx_DMA *dma, IfxDma_ChannelId channelId);
467
468 /** \brief Sets the sensitivity of the module to sleep signal
469 * \param dma pointer to DMA registers
470 * \param mode mode selection (enable/disable)
471 * \return None
472 */
473 IFX_INLINE void IfxDma_setSleepMode(Ifx_DMA *dma, IfxDma_SleepMode mode);
474
475 /** \brief Request a DMA channel transaction
476 * \param dma pointer to DMA module
477 * \param channelId DMA channel number
478 * \return None
479 *
480 * A coding example can be found in \ref IfxDma_Dma_startChannelTransaction
481 *
482 */
483 IFX_INLINE void IfxDma_startChannelTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId);
484
485 /** \} */
486
487 /** \addtogroup IfxLld_Dma_Std_Move_Engine
488 * \{ */
489
490 /******************************************************************************/
491 /*-------------------------Inline Function Prototypes-------------------------*/
492 /******************************************************************************/
493
494 /** \brief Clear the DMA error status flags
495 * \param dma pointer to DMA module
496 * \param moveEngine pointer to the DMA move engine
497 * \param mask value holds the bits to clear or mask
498 * \return None
499 *
500 * \code
501 * // Clear the status of the error flags (as defined in _Impl/IfxDma_cfg.h)
502 * IfxDma_clearErrorFlags(chn[0].dma,IfxDma_MoveEngine_1,
503 * IFXDMA_ERROR_S | // move engine source error
504 * IFXDMA_ERROR_D | // move engine destination error
505 * IFXDMA_ERROR_SPB | // bus error on SPB
506 * IFXDMA_ERROR_SRI | // bus error on SRI
507 * IFXDMA_ERROR_RAM | // RAM error
508 * IFXDMA_ERROR_SLL | // safe linked list CRC checksum error
509 * IFXDMA_ERROR_DLL); // failed linked list load error
510 * \endcode
511 *
512 */
513 IFX_INLINE void IfxDma_clearErrorFlags(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine, uint32 mask);
514
515 /** \brief Disable the generation of a Move engine destination error interrupt
516 * \param dma pointer to DMA module
517 * \param moveEngine pointer to the DMA move engine
518 * \return None
519 *
520 * A coding example can be found in \ref IfxDma_disableMoveEngineSourceError
521 *
522 */
523 IFX_INLINE void IfxDma_disableMoveEngineDestinationError(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine);
524
525 /** \brief Disable the generation of a Move engine source error interrupt
526 * \param dma pointer to DMA module
527 * \param moveEngine pointer to the DMA move engine
528 * \return None
529 *
530 * \code
531 * // Disable the move engine source and destination move errors
532 * IfxDma_disableMoveEngineSourceError(chn[0].dma,IfxDma_MoveEngine_1);
533 * IfxDma_disableMoveEngineDestinationError(chn[0].dma,IfxDma_MoveEngine_1);
534 * \endcode
535 *
536 */
537 IFX_INLINE void IfxDma_disableMoveEngineSourceError(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine);
538
539 /** \brief Enable the generation of a Move engine destination error interrupt
540 * \param dma pointer to DMA module
541 * \param moveEngine pointer to the DMA move engine
542 * \return None
543 *
544 * A coding example can be found in \ref IfxDma_enableMoveEngineSourceError
545 *
546 */
547 IFX_INLINE void IfxDma_enableMoveEngineDestinationError(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine);
548
549 /** \brief Enable the generation of a Move engine source error interrupt
550 * \param dma pointer to DMA module
551 * \param moveEngine pointer to the DMA move engine
552 * \return None
553 *
554 * \code
555 * // Enable the move engine source and destination move errors
556 * IfxDma_enableMoveEngineSourceError(chn[0].dma,IfxDma_MoveEngine_1);
557 * IfxDma_enableMoveEngineDestinationError(chn[0].dma,IfxDma_MoveEngine_1);
558 * \endcode
559 *
560 */
561 IFX_INLINE void IfxDma_enableMoveEngineSourceError(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine);
562
563 /** \brief Return the DMA error status flags
564 * \param dma pointer to DMA module
565 * \param moveEngine pointer to the DMA move engine
566 * \return the content of the DMA.ERRSR register
567 *
568 * \code
569 * uint32 errorFlags = 0;
570 *
571 * // Get the status of the error flags of move engine
572 * errorFlags = IfxDma_getErrorFlags(chn[0].dma,IfxDma_MoveEngine_1);
573 *
574 * if( errorFlags & IFXDMA_ERROR_S ) { // move engine source error
575 * }
576 *
577 * if( errorFlags & IFXDMA_ERROR_D ) { // move engine destination error
578 * // ...
579 * }
580 *
581 * if( errorFlags & IFXDMA_ERROR_SPB ) { // bus error on SPB
582 * // ...
583 * }
584 *
585 * if( errorFlags & IFXDMA_ERROR_SRI ) { // bus error on SRI
586 * // ...
587 * }
588 *
589 * if( errorFlags & IFXDMA_ERROR_RAM ) { // RAM error
590 * // ...
591 * }
592 *
593 * if( errorFlags & IFXDMA_ERROR_SLL ) { // safe linked list CRC checksum error
594 * // ...
595 * }
596 *
597 * if( errorFlags & IFXDMA_ERROR_DLL ) { // failed linked list load error
598 * // ...
599 * }
600 * \endcode
601 *
602 */
603 IFX_INLINE uint32 IfxDma_getErrorFlags(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine);
604
605 /** \} */
606
607 /** \addtogroup IfxLld_Dma_Std_Channel_Configure
608 * \{ */
609
610 /******************************************************************************/
611 /*-------------------------Inline Function Prototypes-------------------------*/
612 /******************************************************************************/
613
614 /** \brief Get a channel source address
615 * \param dma pointer to DMA module
616 * \param channelId DMA channel number
617 * \return Actual channel destination address
618 *
619 * \code
620 * uint32 destAddr = IfxDma_getChannelDestinationAddress(chn[2].dma, chn[2].channelId);
621 *
622 * \endcode
623 *
624 */
625 IFX_INLINE uint32 IfxDma_getChannelDestinationAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId);
626
627 /** \brief Get a channel source address
628 * \param dma pointer to DMA module
629 * \param channelId DMA channel number
630 * \return Actual channel source address
631 *
632 * \code
633 * uint32 sourceAddr = IfxDma_getChannelSourceAddress(chn[2].dma, chn[2].channelId);
634 * \endcode
635 *
636 */
637 IFX_INLINE uint32 IfxDma_getChannelSourceAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId);
638
639 /** \brief Return the DMA channel suspend Mode status
640 * \param dma pointer to DMA module
641 * \param channelId DMA channel number
642 * \return Channel Suspend Mode or Frozen State Active status (1- DMA channel is in channel suspend mode or frozen state)
643 */
644 IFX_INLINE boolean IfxDma_getChannelSuspendModeStatus(Ifx_DMA *dma, IfxDma_ChannelId channelId);
645
646 /** \brief Return remaining DMA transfer count
647 * \param dma pointer to DMA module
648 * \param channelId DMA channel number
649 * \return Remaining DMA transfer count
650 *
651 * \code
652 * // Wait till transfer count (TCOUNT) becomes 0
653 *
654 * bool notFinished;
655 * do {
656 * notFinished = false;
657 * if( IfxDma_getChannelTransferCount(chn[0].dma, chn[0].channelId) ) {
658 * notFinished = true;
659 * break;
660 * }
661 * } while( notFinished );
662 * \endcode
663 *
664 */
665 IFX_INLINE uint32 IfxDma_getChannelTransferCount(Ifx_DMA *dma, IfxDma_ChannelId channelId);
666
667 /** \brief get the time stamp
668 * \param dma pointer to DMA module
669 * \return the current time stamp
670 *
671 * \code
672 * uint32 timestamp = IfxDma_getTimestamp(chn[0].dma);
673 * \endcode
674 *
675 */
676 IFX_INLINE uint32 IfxDma_getTimestamp(Ifx_DMA *dma);
677
678 /** \brief Configure the move count for each DMA channel transfer
679 * \param dma pointer to DMA module
680 * \param channelId DMA channel number
681 * \param blockMode value holds the number of moves with in a DMA transfer
682 * \return None
683 *
684 * A coding example can be found in \ref IfxDma_setChannelTransferCount
685 *
686 */
687 IFX_INLINE void IfxDma_setChannelBlockMode(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelMove blockMode);
688
689 /** \brief Configure a DMA channel to "continous transaction mode"
690 * After a transaction, the hardware request transaction remain enabled
691 * \param dma pointer to DMA module
692 * \param channelId DMA channel number
693 * \return None
694 *
695 * A coding example can be found in \ref IfxDma_enableChannelTransaction
696 *
697 */
698 IFX_INLINE void IfxDma_setChannelContinuousMode(Ifx_DMA *dma, IfxDma_ChannelId channelId);
699
700 /** \brief Configure the destination address
701 * \param dma pointer to DMA module
702 * \param channelId DMA channel number
703 * \param address is the Initial address of the destination pointer
704 * \return None
705 *
706 * A coding example can be found in \ref IfxDma_setChannelSourceAddress
707 *
708 */
709 IFX_INLINE void IfxDma_setChannelDestinationAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId, void *address);
710
711 /** \brief Configure a DMA channel destination pointer
712 * \param dma pointer to DMA module
713 * \param channelId DMA channel number
714 * \param incStep Specifies the pointer incrementation step
715 * \param direction Specifies the incrementation direction
716 * \param size Specifies the size of the circular buffer
717 * \return None
718 *
719 * A coding example can be found in \ref IfxDma_setChannelSourceIncrementStep
720 *
721 */
722 IFX_INLINE void IfxDma_setChannelDestinationIncrementStep(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size);
723
724 /** \brief Configure a DMA channel move
725 * \param dma pointer to DMA module
726 * \param channelId DMA channel number
727 * \param moveSize value holds the opcode or size of data of individual moves with in a DMA transfer
728 * \return None
729 *
730 * A coding example can be found in \ref IfxDma_setChannelTransferCount
731 *
732 */
733 IFX_INLINE void IfxDma_setChannelMoveSize(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelMoveSize moveSize);
734
735 /** \brief Configure a DMA channel shadow pointer
736 * \param dma pointer to DMA module
737 * \param channelId DMA channel number
738 * \param shadow Specifies the shadow pointer
739 * \return None
740 *
741 * \code
742 * // Push the shadow mode into double buffer
743 * IfxDma_setChannelShadow(chn[0].dma, chn[0].channelId,
744 * IfxDma_ChannelShadow_doubleSourceBufferingSwSwitch);
745 * \endcode
746 *
747 */
748 IFX_INLINE void IfxDma_setChannelShadow(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelShadow shadow);
749
750 /** \brief Configure a DMA channel to "single transaction mode"
751 * After a transaction, the hardware request transaction is disabled, and must be set by software again
752 * \param dma pointer to DMA module
753 * \param channelId DMA channel number
754 * \return None
755 *
756 * A coding example can be found in \ref IfxDma_enableChannelTransaction
757 *
758 */
759 IFX_INLINE void IfxDma_setChannelSingleMode(Ifx_DMA *dma, IfxDma_ChannelId channelId);
760
761 /** \brief Configure a DMA channel to "single transaction mode"
762 * One transfer request starts a complete DMA transaction
763 * \param dma pointer to DMA module
764 * \param channelId DMA channel number
765 * \return None
766 *
767 * A coding example can be found in \ref IfxDma_setChannelTransferCount
768 *
769 */
770 IFX_INLINE void IfxDma_setChannelSingleTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId);
771
772 /** \brief Configure a DMA channel to "single transfer mode"
773 * A transfer request is required for each transfer
774 * \param dma pointer to DMA module
775 * \param channelId DMA channel number
776 * \return None
777 *
778 * A coding example can be found in \ref IfxDma_setChannelTransferCount
779 *
780 */
781 IFX_INLINE void IfxDma_setChannelSingleTransfer(Ifx_DMA *dma, IfxDma_ChannelId channelId);
782
783 /** \brief Configure the source address
784 * \param dma pointer to DMA module
785 * \param channelId DMA channel number
786 * \param address is the Initial address of the source pointer
787 * \return None
788 *
789 * \code
790 * // Check for the end of current transaction and before trigger the channel request for
791 * // for another channel, re configure the source and destination addresses
792 *
793 * while(!(IfxDma_getAndClearChannelInterrupt(chn[1].dma, chn[1].channelId)));
794 *
795 * // Re-Program the source address for the channel 2
796 * IfxDma_setChannelSourceAddress(chn[2].dma, chn[2].channelId,Sadr);
797 *
798 * // Re-Program the destination address for channel 2
799 * IfxDma_setChannelDestinationAddress(chn[2].dma, chn[2].channelId,Dadr);
800 *
801 * // Start DMA transaction for channel 2
802 * IfxDma_Dma_startChannelTransaction(&chn[2]);
803 * \endcode
804 *
805 */
806 IFX_INLINE void IfxDma_setChannelSourceAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId, const void *address);
807
808 /** \brief Configure a DMA channel source pointer
809 * \param dma pointer to DMA module
810 * \param channelId DMA channel number
811 * \param incStep Specifies the pointer incrementation step
812 * \param direction Specifies the incrementation direction
813 * \param size Specifies the size of the circular buffer
814 * \return None
815 *
816 * \code
817 * // Re-program the source and destination circular buffer control fields
818 * IfxDma_setChannelSourceIncrementStep(chn[0].dma, chn[0].channelId, IfxDma_ChannelIncrementStep_2, IfxDma_ChannelIncrementDirection_negative, IfxDma_ChannelIncrementCircular_16);
819 *
820 * IfxDma_setChannelDestinationIncrementStep(chn[0].dma, chn[0].channelId, IfxDma_ChannelIncrementStep_2, IfxDma_ChannelIncrementDirection_negative, IfxDma_ChannelIncrementCircular_16);
821 * \endcode
822 *
823 */
824 IFX_INLINE void IfxDma_setChannelSourceIncrementStep(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size);
825
826 /** \brief Configure a DMA channel suspend enable
827 * \param dma pointer to DMA module
828 * \param channelId DMA channel number
829 * \param enable enable (1) / disable (0)
830 * \return None
831 */
832 IFX_INLINE void IfxDma_setChannelSuspendEnable(Ifx_DMA *dma, IfxDma_ChannelId channelId, boolean enable);
833
834 /** \brief Configure the move count of a DMA channel transaction
835 * \param dma pointer to DMA module
836 * \param channelId DMA channel number
837 * \param transferCount value holds the DMA transfers within a transaction (1..16383; 0 handled like 1 transaction)
838 * \return None
839 *
840 * \code
841 * // Start DMA transaction
842 * IfxDma_Dma_startChannelTransaction(&chn[0]);
843 *
844 * // Wait till end of transaction
845 * while(!(IfxDma_getAndClearChannelInterrupt(chn[0].dma, chn[0].channelId)));
846 *
847 * // Change the TREL configuration for channel 1
848 * IfxDma_setChannelTransferCount(chn[1].dma, chn[1].channelId,0x6);
849 *
850 * // Change the BLKM configuration for channel 1
851 * IfxDma_setChannelBlockMode(chn[1].dma, chn[1].channelId,IfxDma_ChannelMove_3);
852 *
853 * // Change the Move size configuration for channel 1
854 * IfxDma_setChannelMoveSize(chn[1].dma, chn[1].channelId,IfxDma_ChannelMoveSize_64bit);
855 *
856 * // Pull down the channel pending request after the first transfer is initiated
857 * IfxDma_setChannelSingleTransfer(chn[1].dma, chn[1].channelId);
858 *
859 * // Pull down the channel pending request after the transaction gets over
860 * IfxDma_setChannelSingleTransaction(chn[2].dma, chn[2].channelId);
861 *
862 * // Start DMA transaction
863 * IfxDma_Dma_startChannelTransaction(&chn[1]);
864 *
865 * // Start DMA transaction
866 * IfxDma_Dma_startChannelTransaction(&chn[2]);
867 * \endcode
868 *
869 */
870 IFX_INLINE void IfxDma_setChannelTransferCount(Ifx_DMA *dma, IfxDma_ChannelId channelId, uint32 transferCount);
871
872 /** \brief Configure the shadow pointer register to read only
873 * \param dma pointer to DMA module
874 * \param channelId DMA channel number
875 * \return None
876 *
877 * \code
878 * // Disable the shadow mode to come out of double buffer mode
879 * IfxDma_writeChannelShadowDisable(chn[0].dma, chn[0].channelId);
880 * \endcode
881 *
882 */
883 IFX_INLINE void IfxDma_writeChannelShadowDisable(Ifx_DMA *dma, IfxDma_ChannelId channelId);
884
885 /** \brief Configure the shadow pointer register to write-able
886 * \param dma pointer to DMA module
887 * \param channelId DMA channel number
888 * \return None
889 *
890 * \code
891 * // Enable the shadow mode to come out of double buffer mode
892 * IfxDma_writeChannelShadowEnable(chn[0].dma, chn[0].channelId);
893 * \endcode
894 *
895 */
896 IFX_INLINE void IfxDma_writeChannelShadowEnable(Ifx_DMA *dma, IfxDma_ChannelId channelId);
897
898 /** \} */
899
900 /** \addtogroup IfxLld_Dma_Std_Channel_Halt
901 * \{ */
902
903 /******************************************************************************/
904 /*-------------------------Inline Function Prototypes-------------------------*/
905 /******************************************************************************/
906
907 /** \brief Clear channel halt request and aknowledgement
908 * \param dma pointer to DMA module
909 * \param channelId DMA channel number
910 * \return None
911 *
912 * \code
913 * // Quit the halt mode of operation
914 * IfxDma_clearChannelHalt(chn[0].dma, chn[0].channelId);
915 * \endcode
916 *
917 */
918 IFX_INLINE void IfxDma_clearChannelHalt(Ifx_DMA *dma, IfxDma_ChannelId channelId);
919
920 /** \brief Get channel halt aknowledgement
921 * \param dma pointer to DMA module
922 * \param channelId DMA channel number
923 * \return halt aknowledgement
924 *
925 * \code
926 * // Check for the channel halt aknowledgement
927 * while(!(IfxDma_getChannelHalt(chn[0].dma, chn[0].channelId)));
928 * \endcode
929 *
930 */
931 IFX_INLINE boolean IfxDma_getChannelHalt(Ifx_DMA *dma, IfxDma_ChannelId channelId);
932
933 /** \brief setting channel halt request
934 * \param dma pointer to DMA module
935 * \param channelId DMA channel number
936 * \return None
937 *
938 * \code
939 * // Halt the channel processing
940 * IfxDma_setChannelHalt(chn[0].dma,chn[0].channelId);
941 * \endcode
942 *
943 */
944 IFX_INLINE void IfxDma_setChannelHalt(Ifx_DMA *dma, IfxDma_ChannelId channelId);
945
946 /** \} */
947
948 /** \addtogroup IfxLld_Dma_Std_Double_Buffer
949 * \{ */
950
951 /******************************************************************************/
952 /*-------------------------Inline Function Prototypes-------------------------*/
953 /******************************************************************************/
954
955 /** \brief get information on buffer being read by software and clear the notification flag
956 * \param dma pointer to DMA module
957 * \param channelId DMA channel number
958 * \return TRUE if one of the buffers is being read by software
959 * FALSE if one of the buffers is already read by software
960 *
961 * \code
962 * // Check the buffer being read (Double buffer operation mode)
963 * while(!(IfxDma_getDoubleBufferRead(chn[0].dma, chn[0].channelId)));
964 * \endcode
965 *
966 */
967 IFX_INLINE boolean IfxDma_getDoubleBufferRead(Ifx_DMA *dma, IfxDma_ChannelId channelId);
968
969 /** \brief get Double buffer selection
970 * \param dma pointer to DMA module
971 * \param channelId channelId DMA channel number
972 * \return TRUE if buffer 1 is being filled
973 * FALSE if buffer 0 is being filled
974 *
975 * \code
976 * boolean buffer_being_filled;
977 *
978 * // Check the buffer being filled (Double buffer operation mode)
979 * buffer_being_filled = IfxDma_getDoubleBufferSelection(chn[0].dma, chn[0].channelId));
980 * \endcode
981 *
982 */
983 IFX_INLINE boolean IfxDma_getDoubleBufferSelection(Ifx_DMA *dma, IfxDma_ChannelId channelId);
984
985 /** \brief keeps the double buffer active
986 * \param dma pointer to DMA module
987 * \param channelId DMA channel number
988 * \return None
989 *
990 * \code
991 * IfxDma_keepDoubleBufferActive(chn[0].dma, chn[0].channelId);
992 * \endcode
993 *
994 */
995 IFX_INLINE void IfxDma_keepDoubleBufferActive(Ifx_DMA *dma, IfxDma_ChannelId channelId);
996
997 /** \brief Double buffer switch application
998 * \param dma pointer to DMA module
999 * \param channelId DMA channel number
1000 * \return None
1001 *
1002 * \code
1003 * // Apply software buffer switch
1004 * IfxDma_switchDoubleBuffer(chn[0].dma, chn[0].channelId);
1005 * \endcode
1006 *
1007 */
1008 IFX_INLINE void IfxDma_switchDoubleBuffer(Ifx_DMA *dma, IfxDma_ChannelId channelId);
1009
1010 /** \} */
1011
1012 /** \addtogroup IfxLld_Dma_Std_Interrupts
1013 * \{ */
1014
1015 /******************************************************************************/
1016 /*-------------------------Inline Function Prototypes-------------------------*/
1017 /******************************************************************************/
1018
1019 /** \brief Clear a channel transfer interrupt flag
1020 * \param dma pointer to DMA module
1021 * \param channelId channel for which the interrupt flag should be cleared
1022 * \return None
1023 *
1024 * see Dma.INTSR
1025 *
1026 */
1027 IFX_INLINE void IfxDma_clearChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId);
1028
1029 /** \brief Disable channel interrupt trigger
1030 * \param dma pointer to DMA module
1031 * \param channelId DMA channel number
1032 * \return None
1033 *
1034 * \code
1035 * IfxDma_disableChannelInterrupt(chn[0].dma, chn[0].channelId);
1036 * \endcode
1037 *
1038 */
1039 IFX_INLINE void IfxDma_disableChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId);
1040
1041 /** \brief Enable channel interrupt trigger
1042 * \param dma pointer to DMA module
1043 * \param channelId DMA channel number
1044 * \return None
1045 *
1046 * \code
1047 * IfxDma_enableChannelInterrupt(chn[0].dma, chn[0].channelId);
1048 * \endcode
1049 *
1050 */
1051 IFX_INLINE void IfxDma_enableChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId);
1052
1053 /** \brief Return and clear a channel transfer interrupt flag
1054 * The flag is automatically cleared with the call to this function
1055 * \param dma pointer to DMA module
1056 * \param channelId DMA channel number
1057 * \return TRUE if the interrupt flag is set
1058 * FALSE if the interrupt flag is not set
1059 *
1060 * \code
1061 * // wait for the end of transaction for intended channel by checking the channel interrupt flag
1062 * // and clear it once it is set and checked
1063 *
1064 * // Wait till end of the transaction
1065 * while(!(IfxDma_getAndClearChannelInterrupt(chn[2].dma, chn[2].channelId)));
1066 * \endcode
1067 *
1068 */
1069 IFX_INLINE boolean IfxDma_getAndClearChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId);
1070
1071 /** \brief Returns and clears the pattern detection interrupt flag
1072 * \param dma pointer to DMA module
1073 * \param channelId DMA channel number
1074 * \return TRUE if pattern detection for a given channel is found
1075 * FALSE if pattern detection for a given channel is not found
1076 *
1077 * \code
1078 * // wait till pattern match is found for given channel
1079 * // and clear it once it is set and checked
1080 *
1081 * // Wait for the pattern detection
1082 * while(!(IfxDma_getAndClearChannelPatternDetectionInterrupt(chn[0].dma, chn[0].channelId)));
1083 * \endcode
1084 *
1085 */
1086 IFX_INLINE boolean IfxDma_getAndClearChannelPatternDetectionInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId);
1087
1088 /** \brief Returns and clears the status of channel wrap destination buffer interrupt trigger flag
1089 * \param dma pointer to DMA module
1090 * \param channelId DMA channel number
1091 * \return TRUE if wrap destination buffer interrupt trigger flag is set
1092 * FALSE if wrap destination buffer interrupt trigger flag is not set or get cleared already
1093 *
1094 * \code
1095 * // wait for the destination buffer wrap interrupt flag
1096 * // and clear it once it is set and checked
1097 * boolean destinationWrapFlag;
1098 *
1099 * destinationWrapFlag = IfxDma_getAndClearChannelWrapDestinationBufferInterrupt(chn[0].dma, chn[0].channelId);
1100 * \endcode
1101 *
1102 */
1103 IFX_INLINE boolean IfxDma_getAndClearChannelWrapDestinationBufferInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId);
1104
1105 /** \brief Returns and clears the status of channel wrap source buffer interrupt trigger flag
1106 * \param dma pointer to DMA module
1107 * \param channelId DMA channel number
1108 * \return TRUE if wrap source buffer interrupt trigger flag is set
1109 * FALSE if wrap source buffer interrupt trigger flag is not set or get cleared already
1110 *
1111 * \code
1112 * // wait for the source buffer wrap interrupt flag
1113 * // and clear it once it is set and checked
1114 * boolean sourceWrapFlag;
1115 *
1116 * sourceWrapFlag = IfxDma_getAndClearChannelWrapSourceBufferInterrupt(chn[0].dma, chn[0].channelId);
1117 * \endcode
1118 *
1119 */
1120 IFX_INLINE boolean IfxDma_getAndClearChannelWrapSourceBufferInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId);
1121
1122 /** \brief Return a channel transfer interrupt flag
1123 * \param dma pointer to DMA module
1124 * \param channelId channel for which the interrupt flag should be returned
1125 * \return TRUE if the interrupt flag is set
1126 * FALSE if the interrupt flag is not set
1127 *
1128 * see Dma.INTSR
1129 *
1130 */
1131 IFX_INLINE boolean IfxDma_getChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId);
1132
1133 /** \brief Returns whether the old value of pattern detection corresponding pattern comparison operation found a pattern match in previous DMA * read move or not
1134 * \param dma pointer to DMA module
1135 * \param channelId DMA channel number
1136 * \return TRUE if corresponding pattern comparison operation found a pattern match in previous DMA read move or not
1137 * FALSE if corresponding pattern comparison operation did not find a pattern match in previous DMA read move
1138 *
1139 * \code
1140 * boolean patternDetectOldVal;
1141 *
1142 * // Check the old value of the pattern detection
1143 * patternDetectOldVal = IfxDma_getChannelPatternDetectionOldValue(chn[0].dma, chn[0].channelId);
1144 * \endcode
1145 *
1146 */
1147 IFX_INLINE boolean IfxDma_getChannelPatternDetectionOldValue(Ifx_DMA *dma, IfxDma_ChannelId channelId);
1148
1149 /** \brief Returns the SRC pointer for given DMA channel
1150 * \param dma pointer to DMA module
1151 * \param channelId DMA channel number
1152 * \return SRC pointer for given DMA channel
1153 *
1154 * \code
1155 *
1156 * \endcode
1157 *
1158 */
1159 IFX_INLINE volatile Ifx_SRC_SRCR *IfxDma_getSrcPointer(Ifx_DMA *dma, IfxDma_ChannelId channelId);
1160
1161 /** \brief Setting of channel interrupt service request by software
1162 * \param dma pointer to DMA module
1163 * \param channelId DMA channel number
1164 * \return None
1165 *
1166 * \code
1167 * // Set the channel interrupt service request through software
1168 * IfxDma_setChannelInterruptServiceRequest(chn[0].dma, chn[0].channelId);
1169 * \endcode
1170 *
1171 */
1172 IFX_INLINE void IfxDma_setChannelInterruptServiceRequest(Ifx_DMA *dma, IfxDma_ChannelId channelId);
1173
1174 /** \} */
1175
1176 /******************************************************************************/
1177 /*-------------------------Inline Function Prototypes-------------------------*/
1178 /******************************************************************************/
1179
1180 /** \brief Enable the Swap Data CRC Byte order
1181 * \param dma pointer to DMA module
1182 * \param channelId DMA channel number
1183 * \return None
1184 *
1185 * \code
1186 * // Enable the Swap Data CRC Byte order
1187 * IfxDma_enableSwapDataByte(chn[0].dma, chn[0].channelId);
1188 * \endcode
1189 *
1190 */
1191 IFX_INLINE void IfxDma_enableSwapDataByte(Ifx_DMA *dma, IfxDma_ChannelId channelId);
1192
1193 /** \brief Configure the hardware resource partition
1194 * \param dma pointer to DMA module
1195 * \param channelId DMA channel number
1196 * \param resourcePartition Hardware resource partition
1197 * \return None
1198 *
1199 * \code
1200 * // Set the required hardware resource partition
1201 * IfxDma_setChannelHardwareResourcePartition(chn[0].dma, chn[0].channelId,setChannelHardwareResourcePartition);
1202 * \endcode
1203 *
1204 */
1205 IFX_INLINE void IfxDma_setChannelHardwareResourcePartition(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_HardwareResourcePartition resourcePartition);
1206
1207 /** \brief Sets the Interrupt control value
1208 * \param dma pointer to DMA module
1209 * \param channelId DMA channel number
1210 * \param value Interrupt control value
1211 * \return None
1212 */
1213 IFX_INLINE void IfxDma_setInterruptControlValue(Ifx_DMA *dma, IfxDma_ChannelId channelId, uint8 value);
1214
1215 /** \brief Sets the Circular Buffer Destination Length
1216 * \param dma pointer to DMA module
1217 * \param channelId DMA channel number
1218 * \param length Circular Buffer Destination Length
1219 * \return None
1220 */
1221 IFX_INLINE void IfxDma_setCircularBufferDestinationLength(Ifx_DMA *dma, IfxDma_ChannelId channelId, uint16 length);
1222
1223 /** \brief Sets the Circular Buffer Source Length
1224 * \param dma pointer to DMA module
1225 * \param channelId DMA channel number
1226 * \param length Circular Buffer Source Length
1227 * \return None
1228 */
1229 IFX_INLINE void IfxDma_setCircularBufferSourceLength(Ifx_DMA *dma, IfxDma_ChannelId channelId, uint16 length);
1230
1231 /** \brief Enable the Source Circular Buffer
1232 * \param dma pointer to DMA module
1233 * \param channelId DMA channel number
1234 * \return None
1235 */
1236 IFX_INLINE void IfxDma_enableSourceCircularBuffer(Ifx_DMA *dma, IfxDma_ChannelId channelId);
1237
1238 /** \brief Enable the Destination Circular Buffer
1239 * \param dma pointer to DMA module
1240 * \param channelId DMA channel number
1241 * \return None
1242 */
1243 IFX_INLINE void IfxDma_enableDestinationCircularBuffer(Ifx_DMA *dma, IfxDma_ChannelId channelId);
1244
1245 /** \brief Returns the Data CRC
1246 * \param dma pointer to DMA module
1247 * \param channelId DMA channel number
1248 * \return The Data CRC value
1249 */
1250 IFX_INLINE uint32 IfxDma_getDataCRC(Ifx_DMA *dma, IfxDma_ChannelId channelId);
1251
1252 /** \brief Returns the Source and Destination CRC
1253 * \param dma pointer to DMA module
1254 * \param channelId DMA channel number
1255 * \return The source and destination CRC values
1256 */
1257 IFX_INLINE uint32 IfxDma_getSourceAndDestinationCRC(Ifx_DMA *dma, IfxDma_ChannelId channelId);
1258
1259 /** \brief Returns the ERR pointer
1260 * \param dma pointer to DMA module
1261 * \param resourcePartition Hardware resource partition
1262 * \return ERR pointer for given DMA resource Partition
1263 */
1264 IFX_INLINE volatile Ifx_SRC_SRCR *IfxDma_getErrPointer(Ifx_DMA *dma, IfxDma_HardwareResourcePartition resourcePartition);
1265
1266 /******************************************************************************/
1267 /*---------------------Inline Function Implementations------------------------*/
1268 /******************************************************************************/
1269
1270 IFX_INLINE void IfxDma_clearChannelHalt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1271 {
1272 dma->TSR[channelId].B.HLTCLR = 1;
1273 }
1274
1275
1276 IFX_INLINE void IfxDma_clearChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1277 {
1278 dma->CH[channelId].CHCSR.B.CICH = 1;
1279 }
1280
1281
1282 IFX_INLINE void IfxDma_clearChannelTransactionRequestLost(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1283 {
1284 dma->TSR[channelId].B.CTL = 1;
1285 }
1286
1287
1288 IFX_INLINE void IfxDma_clearErrorFlags(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine, uint32 mask)
1289 {
1290 if (moveEngine == IfxDma_MoveEngine_1)
1291 {
1292 dma->ME1.CLRE.U = mask;
1293 }
1294 else
1295 {
1296 dma->ME0.CLRE.U = mask;
1297 }
1298 }
1299
1300
1301 IFX_INLINE void IfxDma_disableChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1302 {
1303 dma->CH[channelId].ADICR.B.INTCT &= ~(1 << 1); // TODO: should we define a special bitmask for this bit manipulation?
1304 }
1305
1306
1307 IFX_INLINE void IfxDma_disableChannelTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1308 {
1309 dma->TSR[channelId].B.DCH = 1;
1310 }
1311
1312
1313 IFX_INLINE void IfxDma_disableChannelTransactionLostError(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1314 {
1315 dma->TSR[channelId].B.ETRL = 0;
1316 }
1317
1318
1319 IFX_INLINE void IfxDma_disableMoveEngineDestinationError(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
1320 {
1321 if (moveEngine == IfxDma_MoveEngine_1)
1322 {
1323 dma->ME1.EER.B.EDER = 0;
1324 }
1325 else
1326 {
1327 dma->ME0.EER.B.EDER = 0;
1328 }
1329 }
1330
1331
1332 IFX_INLINE void IfxDma_disableMoveEngineSourceError(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
1333 {
1334 if (moveEngine == IfxDma_MoveEngine_1)
1335 {
1336 dma->ME1.EER.B.ESER = 0;
1337 }
1338 else
1339 {
1340 dma->ME0.EER.B.ESER = 0;
1341 }
1342 }
1343
1344
1345 IFX_INLINE void IfxDma_enableChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1346 {
1347 dma->CH[channelId].ADICR.B.INTCT |= (1 << 1); // TODO: should we define a special bitmask for this bit manipulation?
1348 }
1349
1350
1351 IFX_INLINE void IfxDma_enableChannelTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1352 {
1353 dma->TSR[channelId].B.ECH = 1;
1354 }
1355
1356
1357 IFX_INLINE void IfxDma_enableChannelTransactionLostError(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1358 {
1359 dma->TSR[channelId].B.ETRL = 1;
1360 }
1361
1362
1363 IFX_INLINE void IfxDma_enableMoveEngineDestinationError(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
1364 {
1365 if (moveEngine == IfxDma_MoveEngine_1)
1366 {
1367 dma->ME1.EER.B.EDER = 1;
1368 }
1369 else
1370 {
1371 dma->ME0.EER.B.EDER = 1;
1372 }
1373 }
1374
1375
1376 IFX_INLINE void IfxDma_enableMoveEngineSourceError(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
1377 {
1378 if (moveEngine == IfxDma_MoveEngine_1)
1379 {
1380 dma->ME1.EER.B.ESER = 1;
1381 }
1382 else
1383 {
1384 dma->ME0.EER.B.ESER = 1;
1385 }
1386 }
1387
1388
1389 IFX_INLINE boolean IfxDma_getAndClearChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1390 {
1391 boolean result;
1392
1393 result = dma->CH[channelId].CHCSR.B.ICH != 0;
1394
1395 if (result == 1)
1396 {
1397 dma->CH[channelId].CHCSR.B.CICH = TRUE;
1398 }
1399
1400 return result;
1401 }
1402
1403
1404 IFX_INLINE boolean IfxDma_getAndClearChannelPatternDetectionInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1405 {
1406 boolean result;
1407
1408 result = dma->CH[channelId].CHCSR.B.IPM != 0;
1409
1410 if (result == 1)
1411 {
1412 dma->CH[channelId].CHCSR.B.CICH = TRUE;
1413 }
1414
1415 return result;
1416 }
1417
1418
1419 IFX_INLINE boolean IfxDma_getAndClearChannelWrapDestinationBufferInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1420 {
1421 boolean result;
1422
1423 result = dma->CH[channelId].CHCSR.B.WRPD != 0;
1424
1425 if (result == 1)
1426 {
1427 dma->CH[channelId].CHCSR.B.CWRP = TRUE;
1428 }
1429
1430 return result;
1431 }
1432
1433
1434 IFX_INLINE boolean IfxDma_getAndClearChannelWrapSourceBufferInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1435 {
1436 boolean result;
1437
1438 result = dma->CH[channelId].CHCSR.B.WRPS != 0;
1439
1440 if (result == 1)
1441 {
1442 dma->CH[channelId].CHCSR.B.CWRP = TRUE;
1443 }
1444
1445 return result;
1446 }
1447
1448
1449 IFX_INLINE uint32 IfxDma_getChannelDestinationAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1450 {
1451 return dma->CH[channelId].DADR.U;
1452 }
1453
1454
1455 IFX_INLINE boolean IfxDma_getChannelHalt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1456 {
1457 return dma->TSR[channelId].B.HLTACK != 0;
1458 }
1459
1460
1461 IFX_INLINE boolean IfxDma_getChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1462 {
1463 boolean result;
1464
1465 result = dma->CH[channelId].CHCSR.B.ICH;
1466
1467 return result;
1468 }
1469
1470
1471 IFX_INLINE boolean IfxDma_getChannelPatternDetectionOldValue(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1472 {
1473 return dma->CH[channelId].CHCSR.B.LXO != 0;
1474 }
1475
1476
1477 IFX_INLINE uint32 IfxDma_getChannelSourceAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1478 {
1479 return dma->CH[channelId].SADR.U;
1480 }
1481
1482
1483 IFX_INLINE boolean IfxDma_getChannelSuspendModeStatus(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1484 {
1485 return dma->SUSACR[channelId].B.SUSAC;
1486 }
1487
1488
1489 IFX_INLINE boolean IfxDma_getChannelTransactionRequestLost(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1490 {
1491 return dma->TSR[channelId].B.TRL != 0;
1492 }
1493
1494
1495 IFX_INLINE uint32 IfxDma_getChannelTransferCount(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1496 {
1497 return dma->CH[channelId].CHCSR.B.TCOUNT;
1498 }
1499
1500
1501 IFX_INLINE IfxDma_ChannelIncrementCircular IfxDma_getCircularRangeCode(uint16 range)
1502 {
1503 return (IfxDma_ChannelIncrementCircular)(31 - __clz((uint32)range));
1504 }
1505
1506
1507 IFX_INLINE boolean IfxDma_getDoubleBufferRead(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1508 {
1509 boolean result;
1510
1511 result = dma->CH[channelId].CHCSR.B.FROZEN != 0;
1512
1513 if (result == 1)
1514 {
1515 dma->CH[channelId].CHCSR.B.FROZEN = FALSE;
1516 }
1517
1518 return result;
1519 }
1520
1521
1522 IFX_INLINE boolean IfxDma_getDoubleBufferSelection(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1523 {
1524 return dma->CH[channelId].CHCSR.B.BUFFER != 0;
1525 }
1526
1527
1528 IFX_INLINE uint32 IfxDma_getErrorFlags(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
1529 {
1530 if (moveEngine == IfxDma_MoveEngine_1)
1531 {
1532 return dma->ME1.ERRSR.U;
1533 }
1534 else
1535 {
1536 return dma->ME0.ERRSR.U;
1537 }
1538 }
1539
1540
1541 IFX_INLINE volatile Ifx_SRC_SRCR *IfxDma_getSrcPointer(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1542 {
1543 IFX_UNUSED_PARAMETER(dma);
1544 // only a single DMA available, therefore no check for the dma pointer required
1545 return &MODULE_SRC.DMA.DMA[0].CH[channelId];
1546 }
1547
1548
1549 IFX_INLINE uint32 IfxDma_getTimestamp(Ifx_DMA *dma)
1550 {
1551 return dma->TIME.U;
1552 }
1553
1554
1555 IFX_INLINE boolean IfxDma_isChannelReset(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1556 {
1557 return dma->TSR[channelId].B.RST == 0;
1558 }
1559
1560
1561 IFX_INLINE boolean IfxDma_isChannelTransactionEnabled(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1562 {
1563 return dma->TSR[channelId].B.HTRE != 0;
1564 }
1565
1566
1567 IFX_INLINE boolean IfxDma_isChannelTransactionPending(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1568 {
1569 return dma->TSR[channelId].B.CH != 0;
1570 }
1571
1572
1573 IFX_INLINE void IfxDma_keepDoubleBufferActive(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1574 {
1575 dma->CH[channelId].CHCSR.U = 0U << IFX_DMA_CH_CHCSR_FROZEN_OFF;
1576 }
1577
1578
1579 IFX_INLINE void IfxDma_resetChannel(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1580 {
1581 dma->TSR[channelId].B.RST = 1;
1582 }
1583
1584
1585 IFX_INLINE void IfxDma_setChannelBlockMode(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelMove blockMode)
1586 {
1587 dma->CH[channelId].CHCFGR.B.BLKM = blockMode;
1588 }
1589
1590
1591 IFX_INLINE void IfxDma_setChannelContinuousMode(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1592 {
1593 dma->CH[channelId].CHCFGR.B.CHMODE = 1;
1594 }
1595
1596
1597 IFX_INLINE void IfxDma_setChannelDestinationAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId, void *address)
1598 {
1599 dma->CH[channelId].DADR.U = (uint32)address;
1600 }
1601
1602
1603 IFX_INLINE void IfxDma_setChannelDestinationIncrementStep(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size)
1604 {
1605 Ifx_DMA_CH_ADICR adicr;
1606 adicr.U = dma->CH[channelId].ADICR.U;
1607 adicr.B.DMF = incStep;
1608 adicr.B.INCD = direction;
1609 adicr.B.CBLD = size;
1610 dma->CH[channelId].ADICR.U = adicr.U;
1611 }
1612
1613
1614 IFX_INLINE void IfxDma_setChannelHalt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1615 {
1616 dma->TSR[channelId].B.HLTREQ = 1;
1617 }
1618
1619
1620 IFX_INLINE void IfxDma_setChannelInterruptServiceRequest(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1621 {
1622 dma->CH[channelId].CHCSR.B.SIT = 1;
1623 }
1624
1625
1626 IFX_INLINE void IfxDma_setChannelMoveSize(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelMoveSize moveSize)
1627 {
1628 dma->CH[channelId].CHCFGR.B.CHDW = moveSize;
1629 }
1630
1631
1632 IFX_INLINE void IfxDma_setChannelShadow(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelShadow shadow)
1633 {
1634 dma->CH[channelId].ADICR.B.SHCT = shadow;
1635 }
1636
1637
1638 IFX_INLINE void IfxDma_setChannelSingleMode(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1639 {
1640 dma->CH[channelId].CHCFGR.B.CHMODE = 0;
1641 }
1642
1643
1644 IFX_INLINE void IfxDma_setChannelSingleTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1645 {
1646 dma->CH[channelId].CHCFGR.B.RROAT = 1;
1647 }
1648
1649
1650 IFX_INLINE void IfxDma_setChannelSingleTransfer(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1651 {
1652 dma->CH[channelId].CHCFGR.B.RROAT = 0;
1653 }
1654
1655
1656 IFX_INLINE void IfxDma_setChannelSourceAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId, const void *address)
1657 {
1658 dma->CH[channelId].SADR.U = (uint32)address;
1659 }
1660
1661
1662 IFX_INLINE void IfxDma_setChannelSourceIncrementStep(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size)
1663 {
1664 Ifx_DMA_CH_ADICR adicr;
1665 adicr.U = dma->CH[channelId].ADICR.U;
1666 adicr.B.SMF = incStep;
1667 adicr.B.INCS = direction;
1668 adicr.B.CBLS = size;
1669 dma->CH[channelId].ADICR.U = adicr.U;
1670 }
1671
1672
1673 IFX_INLINE void IfxDma_setChannelSuspendEnable(Ifx_DMA *dma, IfxDma_ChannelId channelId, boolean enable)
1674 {
1675 dma->SUSENR[channelId].B.SUSEN = enable;
1676 }
1677
1678
1679 IFX_INLINE void IfxDma_setChannelTransferCount(Ifx_DMA *dma, IfxDma_ChannelId channelId, uint32 transferCount)
1680 {
1681 dma->CH[channelId].CHCFGR.B.TREL = transferCount;
1682 }
1683
1684
1685 IFX_INLINE void IfxDma_setSleepMode(Ifx_DMA *dma, IfxDma_SleepMode mode)
1686 {
1687 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
1688 IfxScuWdt_clearCpuEndinit(passwd);
1689 dma->CLC.B.EDIS = mode;
1690 IfxScuWdt_setCpuEndinit(passwd);
1691 }
1692
1693
1694 IFX_INLINE void IfxDma_startChannelTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1695 {
1696 dma->CH[channelId].CHCSR.B.SCH = 1;
1697 }
1698
1699
1700 IFX_INLINE void IfxDma_switchDoubleBuffer(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1701 {
1702 dma->CH[channelId].CHCSR.B.SWB = 1;
1703 }
1704
1705
1706 IFX_INLINE void IfxDma_writeChannelShadowDisable(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1707 {
1708 dma->CH[channelId].ADICR.B.SHCT &= ~(3 << 2);
1709 }
1710
1711
1712 IFX_INLINE void IfxDma_writeChannelShadowEnable(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1713 {
1714 dma->CH[channelId].ADICR.B.SHCT |= (1 << 2);
1715 dma->CH[channelId].ADICR.B.SHCT &= ~(1 << 3);
1716 }
1717
1718
1719 IFX_INLINE void IfxDma_enableSwapDataByte(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1720 {
1721 dma->CH[channelId].CHCFGR.B.SWAP = 1;
1722 }
1723
1724
1725 IFX_INLINE void IfxDma_setChannelHardwareResourcePartition(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_HardwareResourcePartition resourcePartition)
1726 {
1727 uint16 endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPasswordInline();
1728 IfxScuWdt_clearSafetyEndinitInline(endinitSfty_pw);
1729 dma->HRR[channelId].B.HRP = resourcePartition;
1730 IfxScuWdt_setSafetyEndinitInline(endinitSfty_pw);
1731 }
1732
1733
1734 IFX_INLINE void IfxDma_setInterruptControlValue(Ifx_DMA *dma, IfxDma_ChannelId channelId, uint8 value)
1735 {
1736 dma->CH[channelId].ADICR.B.INTCT = value;
1737 }
1738
1739
1740 IFX_INLINE void IfxDma_setCircularBufferDestinationLength(Ifx_DMA *dma, IfxDma_ChannelId channelId, uint16 length)
1741 {
1742 dma->CH[channelId].ADICR.B.CBLD = length;
1743 }
1744
1745
1746 IFX_INLINE void IfxDma_setCircularBufferSourceLength(Ifx_DMA *dma, IfxDma_ChannelId channelId, uint16 length)
1747 {
1748 dma->CH[channelId].ADICR.B.CBLS = length;
1749 }
1750
1751
1752 IFX_INLINE void IfxDma_enableSourceCircularBuffer(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1753 {
1754 dma->CH[channelId].ADICR.B.SCBE = 0x1U;
1755 }
1756
1757
1758 IFX_INLINE void IfxDma_enableDestinationCircularBuffer(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1759 {
1760 dma->CH[channelId].ADICR.B.DCBE = 0x1U;
1761 }
1762
1763
1764 IFX_INLINE uint32 IfxDma_getDataCRC(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1765 {
1766 return dma->CH[channelId].RDCRCR.U;
1767 }
1768
1769
1770 IFX_INLINE uint32 IfxDma_getSourceAndDestinationCRC(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1771 {
1772 return dma->CH[channelId].SDCRCR.U;
1773 }
1774
1775
1776 IFX_INLINE volatile Ifx_SRC_SRCR *IfxDma_getErrPointer(Ifx_DMA *dma, IfxDma_HardwareResourcePartition resourcePartition)
1777 {
1778 IFX_UNUSED_PARAMETER(dma);
1779 return &MODULE_SRC.DMA.DMA[0].ERR[resourcePartition];
1780 }
1781
1782
1783 #endif /* IFXDMA_H */
IfxDma_ChannelBusPriority_high
high priority
Definition: IfxDma.h:95
IfxScuWdt_setSafetyEndinitInline
IFX_INLINE void IfxScuWdt_setSafetyEndinitInline(uint16 password)
SCUWDT Inline API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.h:689
IfxDma_SleepMode_disable
disables sleep mode
Definition: IfxDma.h:275
IfxDma_ChannelId
IfxDma_ChannelId
DMA channel resources definition.
Definition: IfxDma_cfg.h:102
IfxScuWdt_getSafetyWatchdogPasswordInline
IFX_INLINE uint16 IfxScuWdt_getSafetyWatchdogPasswordInline(void)
SCUWDT Inline API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.h:641
IfxDma_ChannelPattern_1_mode3
Compare match configuration 3 : pattern compare of MExR.RD[0] to PAT1[0] masked by PAT1[2] of actual ...
Definition: IfxDma.h:203
IfxDma_MoveEngine
IfxDma_MoveEngine
DMA move engine definition.
Definition: IfxDma.h:263
IfxDma_ChannelShadow_accumulatedLinkedList
The DMA controller reads a DMA channel transaction control set and overwrites 6 X words in the corres...
Definition: IfxDma.h:248
IfxDma_BusMasterMode_user
Selected hardware resource performs Bus access in user mode.
Definition: IfxDma.h:85
IfxDma_clearChannelTransactionRequestLost
IFX_INLINE void IfxDma_clearChannelTransactionRequestLost(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Clear the channel transaction request lost flag status.
Definition: IfxDma.h:1282
IfxDma_ChannelMove_9
9 DMA move per DMA transfer
Definition: IfxDma.h:166
IfxDma_ChannelIncrementDirection
IfxDma_ChannelIncrementDirection
DMA incrementation direction definition Definition in Ifx_DMA.CH[64].ADICR.B.INCS.
Definition: IfxDma.h:124
__clz
sint32 __clz(sint32) __attribute__((intrinsic_pseudo(1
IfxDma_ChannelOperationMode_continuous
channel stays enabled after transaction
Definition: IfxDma.h:188
IfxDma_setSleepMode
IFX_INLINE void IfxDma_setSleepMode(Ifx_DMA *dma, IfxDma_SleepMode mode)
Sets the sensitivity of the module to sleep signal.
Definition: IfxDma.h:1685
IfxDma_setChannelHardwareResourcePartition
IFX_INLINE void IfxDma_setChannelHardwareResourcePartition(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_HardwareResourcePartition resourcePartition)
Configure the hardware resource partition.
Definition: IfxDma.h:1725
IfxDma_getTimestamp
IFX_INLINE uint32 IfxDma_getTimestamp(Ifx_DMA *dma)
get the time stamp
Definition: IfxDma.h:1549
IfxDma_SleepMode
IfxDma_SleepMode
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_DMA.CLC.B.EDIS.
Definition: IfxDma.h:272
IfxScuWdt_clearSafetyEndinitInline
IFX_INLINE void IfxScuWdt_clearSafetyEndinitInline(uint16 password)
SCUWDT Inline API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.h:581
IfxDma_ChannelIncrementStep_2
increment by 2 width
Definition: IfxDma.h:136
IfxDma_ChannelMove
IfxDma_ChannelMove
DMA transfer definition Definition in Ifx_DMA.ME0.CHCR.B.BLKM and Ifx_DMA.ME1.CHCR.B.BLKM.
Definition: IfxDma.h:157
IfxDma_setChannelSuspendEnable
IFX_INLINE void IfxDma_setChannelSuspendEnable(Ifx_DMA *dma, IfxDma_ChannelId channelId, boolean enable)
Configure a DMA channel suspend enable.
Definition: IfxDma.h:1673
IfxDma_setChannelSourceAddress
IFX_INLINE void IfxDma_setChannelSourceAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId, const void *address)
Configure the source address.
Definition: IfxDma.h:1656
IfxDma_setChannelBlockMode
IFX_INLINE void IfxDma_setChannelBlockMode(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelMove blockMode)
Configure the move count for each DMA channel transfer.
Definition: IfxDma.h:1585
IfxDma_enableMoveEngineSourceError
IFX_INLINE void IfxDma_enableMoveEngineSourceError(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
Enable the generation of a Move engine source error interrupt.
Definition: IfxDma.h:1376
IfxDma_ChannelIncrementCircular_16
circular buffer size is 16 byte
Definition: IfxDma.h:107
IfxDma_ChannelIncrementCircular_32
circular buffer size is 32 byte
Definition: IfxDma.h:108
IfxDma_ChannelMoveSize_16bit
1 DMA move is 16 bit wide
Definition: IfxDma.h:175
IfxDma_ChannelMoveSize_8bit
1 DMA move is 8 bit wide
Definition: IfxDma.h:174
IfxDma_getChannelDestinationAddress
IFX_INLINE uint32 IfxDma_getChannelDestinationAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Get a channel source address.
Definition: IfxDma.h:1449
IfxDma_disableChannelTransactionLostError
IFX_INLINE void IfxDma_disableChannelTransactionLostError(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Disable the generation of a channel transaction lost error interrupt.
Definition: IfxDma.h:1313
IfxDma_ChannelIncrementCircular_8
circular buffer size is 8 byte
Definition: IfxDma.h:106
IfxDma_ChannelIncrementCircular_256
circular buffer size is 256 byte
Definition: IfxDma.h:111
IfxDma_ChannelIncrementStep_128
increment by 128 width
Definition: IfxDma.h:142
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxDma_ChannelShadow_doubleDestinationBufferingHwSwSwitch
Automatic Hardware and Software switch. Shadow address used for double buffering. ...
Definition: IfxDma.h:246
IfxDma_isChannelTransactionPending
IFX_INLINE boolean IfxDma_isChannelTransactionPending(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return the status of a DMA channel (transaction pending)
Definition: IfxDma.h:1567
IfxDma_getChannelInterrupt
IFX_INLINE boolean IfxDma_getChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return a channel transfer interrupt flag.
Definition: IfxDma.h:1461
IfxDma_setChannelDestinationIncrementStep
IFX_INLINE void IfxDma_setChannelDestinationIncrementStep(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size)
Configure a DMA channel destination pointer.
Definition: IfxDma.h:1603
IfxDma_ChannelIncrementCircular_512
circular buffer size is 512 byte
Definition: IfxDma.h:112
IfxDma_ChannelMove_8
8 DMA move per DMA transfer
Definition: IfxDma.h:162
IfxDma_ChannelInterruptControl_thresholdLimitMatch
interrupt when transfer count (TCOUNT) equals the threshold limit (IRDV)
Definition: IfxDma.h:150
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxDma_enableSwapDataByte
IFX_INLINE void IfxDma_enableSwapDataByte(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Enable the Swap Data CRC Byte order.
Definition: IfxDma.h:1719
IfxDma_enableChannelTransaction
IFX_INLINE void IfxDma_enableChannelTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Enable a DMA channel hardware transaction request.
Definition: IfxDma.h:1351
IfxDma_clearErrorFlags
IFX_INLINE void IfxDma_clearErrorFlags(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine, uint32 mask)
Clear the DMA error status flags.
Definition: IfxDma.h:1288
IfxSrc.h
SRC basic functionality.
IfxDma_startChannelTransaction
IFX_INLINE void IfxDma_startChannelTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Request a DMA channel transaction.
Definition: IfxDma.h:1694
IfxDma_switchDoubleBuffer
IFX_INLINE void IfxDma_switchDoubleBuffer(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Double buffer switch application.
Definition: IfxDma.h:1700
IfxDma_ChannelIncrementStep_16
increment by 16 width
Definition: IfxDma.h:139
IfxDma_ChannelIncrementCircular_128
circular buffer size is 128 byte
Definition: IfxDma.h:110
IfxDma_ChannelBusPriority_low
low priority
Definition: IfxDma.h:93
IfxCpu_Intrinsics.h
IfxDma_ChannelShadow
IfxDma_ChannelShadow
shadow definition definition Definition in Ifx_DMA.CH[64].ADICR.B.SHCT
Definition: IfxDma.h:236
IfxDma_writeChannelShadowDisable
IFX_INLINE void IfxDma_writeChannelShadowDisable(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure the shadow pointer register to read only.
Definition: IfxDma.h:1706
IfxDma_enableChannelTransactionLostError
IFX_INLINE void IfxDma_enableChannelTransactionLostError(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Enable the generation of a channel transaction lost error interrupt.
Definition: IfxDma.h:1357
IfxDma_ChannelPriority
IfxDma_ChannelPriority
Channel Priority definition.
Definition: IfxDma.h:208
IfxDma_ChannelMoveSize_128bit
1 DMA move is 128 bit wide
Definition: IfxDma.h:178
IfxDma_enableMoveEngineDestinationError
IFX_INLINE void IfxDma_enableMoveEngineDestinationError(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
Enable the generation of a Move engine destination error interrupt.
Definition: IfxDma.h:1363
IfxDma_setChannelSourceIncrementStep
IFX_INLINE void IfxDma_setChannelSourceIncrementStep(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size)
Configure a DMA channel source pointer.
Definition: IfxDma.h:1662
IfxDma_setChannelSingleMode
IFX_INLINE void IfxDma_setChannelSingleMode(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure a DMA channel to "single transaction mode" After a transaction, the hardware request transa...
Definition: IfxDma.h:1638
IfxDma_BusMasterMode_supervisor
Selected hardware resource performs Bus access in supervisor mode.
Definition: IfxDma.h:86
IfxDma_getErrPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxDma_getErrPointer(Ifx_DMA *dma, IfxDma_HardwareResourcePartition resourcePartition)
Returns the ERR pointer.
Definition: IfxDma.h:1776
IfxDma_getDoubleBufferSelection
IFX_INLINE boolean IfxDma_getDoubleBufferSelection(Ifx_DMA *dma, IfxDma_ChannelId channelId)
get Double buffer selection
Definition: IfxDma.h:1522
IfxDma_ChannelMove_3
3 DMA move per DMA transfer
Definition: IfxDma.h:164
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxDma_getAndClearChannelInterrupt
IFX_INLINE boolean IfxDma_getAndClearChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return and clear a channel transfer interrupt flag The flag is automatically cleared with the call to...
Definition: IfxDma.h:1389
IfxDma_enableDestinationCircularBuffer
IFX_INLINE void IfxDma_enableDestinationCircularBuffer(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Enable the Destination Circular Buffer.
Definition: IfxDma.h:1758
IfxScuWdt.h
SCU basic functionality.
IfxDma_getAndClearChannelWrapDestinationBufferInterrupt
IFX_INLINE boolean IfxDma_getAndClearChannelWrapDestinationBufferInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns and clears the status of channel wrap destination buffer interrupt trigger flag...
Definition: IfxDma.h:1419
IfxDma_ChannelShadow_doubleSourceBufferingHwSwSwitch
Automatic Hardware and Software switch. Shadow address used for double buffering. ...
Definition: IfxDma.h:244
IfxDma_ChannelRequestSource
IfxDma_ChannelRequestSource
DMA request selection Definition in Ifx_DMA.ME0.CHCR.B.PRSEL and Ifx_DMA.ME1.CHCR.B.PRSEL.
Definition: IfxDma.h:227
IfxDma_setChannelSingleTransaction
IFX_INLINE void IfxDma_setChannelSingleTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure a DMA channel to "single transaction mode" One transfer request starts a complete DMA trans...
Definition: IfxDma.h:1644
IfxDma_ChannelShadow_none
shadow address register not used. Source and destination address register are written directly ...
Definition: IfxDma.h:238
IfxDma_isChannelReset
IFX_INLINE boolean IfxDma_isChannelReset(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return the status of a DMA channel (reset / not reset) This API needs to be used after the IfxDma_res...
Definition: IfxDma.h:1555
IfxDma_getSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxDma_getSrcPointer(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns the SRC pointer for given DMA channel.
Definition: IfxDma.h:1541
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxDma_disableMoveEngineSourceError
IFX_INLINE void IfxDma_disableMoveEngineSourceError(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
Disable the generation of a Move engine source error interrupt.
Definition: IfxDma.h:1332
IfxDma_setCircularBufferDestinationLength
IFX_INLINE void IfxDma_setCircularBufferDestinationLength(Ifx_DMA *dma, IfxDma_ChannelId channelId, uint16 length)
Sets the Circular Buffer Destination Length.
Definition: IfxDma.h:1740
IfxDma_BusMasterMode
IfxDma_BusMasterMode
Bus Master Mode definition Definition in Ifx_DMA.MODE[4].B.MODE.
Definition: IfxDma.h:83
IfxDma_setChannelShadow
IFX_INLINE void IfxDma_setChannelShadow(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelShadow shadow)
Configure a DMA channel shadow pointer.
Definition: IfxDma.h:1632
IfxDma_setChannelSingleTransfer
IFX_INLINE void IfxDma_setChannelSingleTransfer(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure a DMA channel to "single transfer mode" A transfer request is required for each transfer...
Definition: IfxDma.h:1650
IfxDma_cfg.h
DMA on-chip implementation data.
IfxDma_ChannelRequestMode
IfxDma_ChannelRequestMode
DMA request mode Definition in Ifx_DMA.ME0.CHCR.B.RROAT and Ifx_DMA.ME1.CHCR.B.RROAT.
Definition: IfxDma.h:218
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxDma_getChannelPatternDetectionOldValue
IFX_INLINE boolean IfxDma_getChannelPatternDetectionOldValue(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns whether the old value of pattern detection corresponding pattern comparison operation found a...
Definition: IfxDma.h:1471
IfxDma_ChannelMove_1
1 DMA move per DMA transfer
Definition: IfxDma.h:159
IfxDma_ChannelMoveSize_32bit
1 DMA move is 32 bit wide
Definition: IfxDma.h:176
IfxDma_ChannelShadow_srcDirectWrite
Shadow address used for source buffering. When writing to SADRz, the address is buffered in SHADRz an...
Definition: IfxDma.h:241
IfxDma_ChannelShadow_doubleSourceBufferingSwSwitch
Software switch only. Shadow address used for double buffering.
Definition: IfxDma.h:243
IfxDma_HardwareResourcePartition_2
"Set of DMA channels are associated with hardware resource partition " + str(x)
Definition: IfxDma.h:257
IfxDma_ChannelRequestSource_peripheral
Transfer Request via Hardware Trigger.
Definition: IfxDma.h:229
IfxDma_ChannelShadow_safeLinkedList
The DMA controller reads a DMA channel transaction control set. The Linked List only proceeds with th...
Definition: IfxDma.h:249
IfxDma_MoveEngine_1
second move engine
Definition: IfxDma.h:266
IfxDma_ChannelShadow_conditionalLinkedList
Shadow address register (MExSHADR) and source and destination address CRC register (MExSDCRC) are use...
Definition: IfxDma.h:250
IfxDma_setChannelContinuousMode
IFX_INLINE void IfxDma_setChannelContinuousMode(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure a DMA channel to "continous transaction mode" After a transaction, the hardware request tra...
Definition: IfxDma.h:1591
IfxDma_ChannelIncrementStep_1
increment by 1 width
Definition: IfxDma.h:135
IfxDma_ChannelIncrementCircular_64
circular buffer size is 64 byte
Definition: IfxDma.h:109
IfxDma_ChannelShadow_dst
Shadow address register used for destination address buffering. When writing to DADRmx, the address is buffered in SHADRmx and transferred to DADRmx with the start of the next DMA transaction.
Definition: IfxDma.h:240
IfxDma_ChannelIncrementCircular_2048
circular buffer size is 2048 byte
Definition: IfxDma.h:114
IfxDma_ChannelPattern_0_mode1
Compare match configuration 1 : pattern compare of MExR.RD[0] to PAT0[0] masked by PAT0[2]...
Definition: IfxDma.h:197
IfxDma_ChannelInterruptControl
IfxDma_ChannelInterruptControl
Channel Transfer Interrupt generation mechanism. Definition in Ifx_DMA.CH[64].ADICR.B.INTCT (bit 0)
Definition: IfxDma.h:148
IfxDma_HardwareResourcePartition_0
"Set of DMA channels are associated with hardware resource partition " + str(x)
Definition: IfxDma.h:255
IfxDma_setCircularBufferSourceLength
IFX_INLINE void IfxDma_setCircularBufferSourceLength(Ifx_DMA *dma, IfxDma_ChannelId channelId, uint16 length)
Sets the Circular Buffer Source Length.
Definition: IfxDma.h:1746
IfxDma_setChannelHalt
IFX_INLINE void IfxDma_setChannelHalt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
setting channel halt request
Definition: IfxDma.h:1614
IfxDma_writeChannelShadowEnable
IFX_INLINE void IfxDma_writeChannelShadowEnable(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure the shadow pointer register to write-able.
Definition: IfxDma.h:1712
IfxDma_ChannelRequestMode_oneTransferPerRequest
a request initiates a single transfer
Definition: IfxDma.h:220
IfxDma_ChannelIncrementCircular_4
circular buffer size is 4 byte
Definition: IfxDma.h:105
IfxDma_ChannelPattern
IfxDma_ChannelPattern
Pattern detection selection Definition in Ifx_DMA.ME0.CHCR.B.PATSEL and Ifx_DMA.ME1.CHCR.B.PATSEL.
Definition: IfxDma.h:194
IfxDma_ChannelIncrementStep_4
increment by 4 width
Definition: IfxDma.h:137
IfxDma_ChannelInterruptControl_transferCountDecremented
interrupt when transfer count (TCOUNT) is decremented
Definition: IfxDma.h:151
IfxDma_ChannelBusPriority_medium
medium priority
Definition: IfxDma.h:94
IfxDma_ChannelBusPriority
IfxDma_ChannelBusPriority
Channel Bus Priority definition.
Definition: IfxDma.h:91
IfxDma_getSourceAndDestinationCRC
IFX_INLINE uint32 IfxDma_getSourceAndDestinationCRC(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns the Source and Destination CRC.
Definition: IfxDma.h:1770
IfxDma_enableSourceCircularBuffer
IFX_INLINE void IfxDma_enableSourceCircularBuffer(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Enable the Source Circular Buffer.
Definition: IfxDma.h:1752
IfxDma_getChannelTransactionRequestLost
IFX_INLINE boolean IfxDma_getChannelTransactionRequestLost(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Check the channel transaction request lost flag status.
Definition: IfxDma.h:1489
IfxDma_disableChannelTransaction
IFX_INLINE void IfxDma_disableChannelTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Disable a DMA channel hardware transaction request.
Definition: IfxDma.h:1307
IfxDma_getAndClearChannelWrapSourceBufferInterrupt
IFX_INLINE boolean IfxDma_getAndClearChannelWrapSourceBufferInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns and clears the status of channel wrap source buffer interrupt trigger flag.
Definition: IfxDma.h:1434
IfxDma_ChannelIncrementCircular_4096
circular buffer size is 4096 byte
Definition: IfxDma.h:115
IfxDma_ChannelIncrementCircular_1024
circular buffer size is 1024 byte
Definition: IfxDma.h:113
IfxDma_getDoubleBufferRead
IFX_INLINE boolean IfxDma_getDoubleBufferRead(Ifx_DMA *dma, IfxDma_ChannelId channelId)
get information on buffer being read by software and clear the notification flag
Definition: IfxDma.h:1507
IfxDma_ChannelOperationMode_single
channel disabled after transaction
Definition: IfxDma.h:187
IfxDma_ChannelPattern_0_mode2
Compare match configuration 2 : pattern compare of MExR.RD[0] to PAT0[1] masked by PAT0[3]...
Definition: IfxDma.h:198
IfxDma_ChannelIncrementCircular_8192
circular buffer size is 8192 byte
Definition: IfxDma.h:116
IfxDma_MoveEngine_0
first move engine
Definition: IfxDma.h:265
IfxDma_getAndClearChannelPatternDetectionInterrupt
IFX_INLINE boolean IfxDma_getAndClearChannelPatternDetectionInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns and clears the pattern detection interrupt flag.
Definition: IfxDma.h:1404
IfxDma_enableChannelInterrupt
IFX_INLINE void IfxDma_enableChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Enable channel interrupt trigger.
Definition: IfxDma.h:1345
IfxDma_ChannelMove_2
2 DMA move per DMA transfer
Definition: IfxDma.h:160
IfxDma_setChannelTransferCount
IFX_INLINE void IfxDma_setChannelTransferCount(Ifx_DMA *dma, IfxDma_ChannelId channelId, uint32 transferCount)
Configure the move count of a DMA channel transaction.
Definition: IfxDma.h:1679
IfxDma_keepDoubleBufferActive
IFX_INLINE void IfxDma_keepDoubleBufferActive(Ifx_DMA *dma, IfxDma_ChannelId channelId)
keeps the double buffer active
Definition: IfxDma.h:1573
IfxDma_resetChannel
IFX_INLINE void IfxDma_resetChannel(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Reset the channel.
Definition: IfxDma.h:1579
IfxDma_ChannelMoveSize_256bit
1 DMA move is 256 bit wide
Definition: IfxDma.h:179
IfxDma_getErrorFlags
IFX_INLINE uint32 IfxDma_getErrorFlags(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
Return the DMA error status flags.
Definition: IfxDma.h:1528
IfxDma_ChannelIncrementDirection_positive
pointer is incremented
Definition: IfxDma.h:127
IfxDma_HardwareResourcePartition
IfxDma_HardwareResourcePartition
Definition: IfxDma.h:253
IfxDma_ChannelMove_4
4 DMA move per DMA transfer
Definition: IfxDma.h:161
IfxDma_setInterruptControlValue
IFX_INLINE void IfxDma_setInterruptControlValue(Ifx_DMA *dma, IfxDma_ChannelId channelId, uint8 value)
Sets the Interrupt control value.
Definition: IfxDma.h:1734
IfxDma_SleepMode_enable
enables sleep mode
Definition: IfxDma.h:274
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxDma_disableChannelInterrupt
IFX_INLINE void IfxDma_disableChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Disable channel interrupt trigger.
Definition: IfxDma.h:1301
IfxDma_ChannelMove_16
16 DMA move per DMA transfer
Definition: IfxDma.h:163
IfxDma_clearChannelInterrupt
IFX_INLINE void IfxDma_clearChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Clear a channel transfer interrupt flag.
Definition: IfxDma.h:1276
IfxDma_getCircularRangeCode
IFX_INLINE IfxDma_ChannelIncrementCircular IfxDma_getCircularRangeCode(uint16 range)
Converts DMA circular range to circular code.
Definition: IfxDma.h:1501
IfxDma_ChannelIncrementCircular
IfxDma_ChannelIncrementCircular
DMA circular buffer (wrap around) definition Definition in Ifx_DMA.CH[64].ADICR.B.CBLS and Ifx_DMA.CH[64].ADICR.B.CBLD.
Definition: IfxDma.h:101
IfxDma_ChannelIncrementCircular_32768
circular buffer size is 32768 byte
Definition: IfxDma.h:118
IfxDma_ChannelPriority_medium
medium priority
Definition: IfxDma.h:211
IfxScuCcu.h
SCU basic functionality.
IfxDma_setChannelDestinationAddress
IFX_INLINE void IfxDma_setChannelDestinationAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId, void *address)
Configure the destination address.
Definition: IfxDma.h:1597
IfxDma_clearChannelHalt
IFX_INLINE void IfxDma_clearChannelHalt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Clear channel halt request and aknowledgement.
Definition: IfxDma.h:1270
IfxDma_isChannelTransactionEnabled
IFX_INLINE boolean IfxDma_isChannelTransactionEnabled(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return the hardware transaction request status of a DMA channel.
Definition: IfxDma.h:1561
enable
void enable
Definition: IfxCpu_IntrinsicsDcc.h:477
IfxDma_ChannelPattern_0_disable
Pattern detect 0 disabled.
Definition: IfxDma.h:196
IfxDma_getChannelHalt
IFX_INLINE boolean IfxDma_getChannelHalt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Get channel halt aknowledgement.
Definition: IfxDma.h:1455
IfxDma_ChannelIncrementCircular_16384
circular buffer size is 16384 byte
Definition: IfxDma.h:117
IfxDma_setChannelMoveSize
IFX_INLINE void IfxDma_setChannelMoveSize(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelMoveSize moveSize)
Configure a DMA channel move.
Definition: IfxDma.h:1626
IfxDma_getChannelSourceAddress
IFX_INLINE uint32 IfxDma_getChannelSourceAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Get a channel source address.
Definition: IfxDma.h:1477
IfxDma_ChannelPriority_high
high priority
Definition: IfxDma.h:212
IfxDma_ChannelIncrementStep_8
increment by 8 width
Definition: IfxDma.h:138
IfxDma_ChannelShadow_src
Shadow address register used for source address buffering. When writing to SADRmx, the address is buffered in SHADRmx and transferred to SADRmx with the start of the next DMA transaction.
Definition: IfxDma.h:239
IfxDma_ChannelIncrementDirection_negative
pointer is decremented
Definition: IfxDma.h:126
IfxDma_ChannelPattern_0_mode3
Compare match configuration 3 : pattern compare of MExR.RD[0] to PAT0[0] masked by PAT0[2] of actual ...
Definition: IfxDma.h:199
IfxDma_ChannelIncrementStep_32
increment by 32 width
Definition: IfxDma.h:140
IfxDma_ChannelRequestSource_daisyChain
Transfer Request via next (higher priority) channel.
Definition: IfxDma.h:230
IfxDma_HardwareResourcePartition_1
"Set of DMA channels are associated with hardware resource partition " + str(x)
Definition: IfxDma.h:256
IfxDma_ChannelIncrementStep_64
increment by 64 width
Definition: IfxDma.h:141
IfxDma_ChannelMoveSize
IfxDma_ChannelMoveSize
DMA move size definition Definition in Ifx_DMA.ME0.CHCR.B.CHDW and Ifx_DMA.ME1.CHCR.B.CHDW.
Definition: IfxDma.h:172
IfxDma_getChannelTransferCount
IFX_INLINE uint32 IfxDma_getChannelTransferCount(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return remaining DMA transfer count.
Definition: IfxDma.h:1495
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxDma_ChannelPattern_1_mode2
Compare match configuration 2 : pattern compare of MExR.RD[0] to PAT1[1] masked by PAT1[3]...
Definition: IfxDma.h:202
IfxDma_setChannelInterruptServiceRequest
IFX_INLINE void IfxDma_setChannelInterruptServiceRequest(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Setting of channel interrupt service request by software.
Definition: IfxDma.h:1620
IfxDma_ChannelOperationMode
IfxDma_ChannelOperationMode
DMA operation mode Definition in Ifx_DMA.ME0.CHCR.B.CHMODE and Ifx_DMA.ME1.CHCR.B.CHMODE.
Definition: IfxDma.h:185
IfxDma_HardwareResourcePartition_3
"Set of DMA channels are associated with hardware resource partition " + str(x)
Definition: IfxDma.h:258
IfxDma_ChannelMove_5
5 DMA move per DMA transfer
Definition: IfxDma.h:165
IfxDma_ChannelPattern_1_disable
Pattern detect 1 disabled.
Definition: IfxDma.h:200
IfxDma_ChannelPattern_1_mode1
Compare match configuration 1 : pattern compare of MExR.RD[0] to PAT1[0] masked by PAT1[2]...
Definition: IfxDma.h:201
IfxDma_ChannelShadow_linkedList
The DMA controller reads a DMA channel transaction control set and overwrites 8 X words in the corres...
Definition: IfxDma.h:247
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxDma_getDataCRC
IFX_INLINE uint32 IfxDma_getDataCRC(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns the Data CRC.
Definition: IfxDma.h:1764
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
IfxDma_getChannelSuspendModeStatus
IFX_INLINE boolean IfxDma_getChannelSuspendModeStatus(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return the DMA channel suspend Mode status.
Definition: IfxDma.h:1483
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxDma_ChannelPriority_low
low priority
Definition: IfxDma.h:210
IfxDma_disableMoveEngineDestinationError
IFX_INLINE void IfxDma_disableMoveEngineDestinationError(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
Disable the generation of a Move engine destination error interrupt.
Definition: IfxDma.h:1319
IfxDma_ChannelIncrementCircular_2
circular buffer size is 2 byte
Definition: IfxDma.h:104
IfxDma_ChannelShadow_dstDirectWrite
Shadow address used for destination buffering. When writing to DADRz, the address is buffered in SHAD...
Definition: IfxDma.h:242
IfxDma_ChannelRequestMode_completeTransactionPerRequest
a request initiates a complete transaction
Definition: IfxDma.h:221
IfxDma_ChannelMoveSize_64bit
1 DMA move is 64 bit wide
Definition: IfxDma.h:177
IfxDma_ChannelShadow_doubleDestinationBufferingSwSwitch
Software switch only. Shadow address used for double buffering.
Definition: IfxDma.h:245
IfxDma_ChannelIncrementCircular_none
no circular buffer operation
Definition: IfxDma.h:103
IfxDma_ChannelIncrementStep
IfxDma_ChannelIncrementStep
DMA incrementation definition Definition in Ifx_DMA.CH[64].ADICR.B.SMF.
Definition: IfxDma.h:133


iLLD_TC38A: IfxDma_Dma.c Source File

  • Dma
  • Dma
IfxDma_Dma.c
Go to the documentation of this file.
1 /**
2 * \file IfxDma_Dma.c
3 * \brief DMA DMA details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxDma_Dma.h"
47
48 /******************************************************************************/
49 /*-----------------------Private Function Prototypes--------------------------*/
50 /******************************************************************************/
51
52 /** \brief local function to copy a transaction set into DMA channel SFRs or memory location (for linked lists)
53 * \param channel Specifies the pointer to DMA channel registers
54 * \param config pointer to the DMA default channel configuration structure
55 * \return None
56 */
57 IFX_STATIC void IfxDma_Dma_configureTransactionSet(Ifx_DMA_CH *channel, const IfxDma_Dma_ChannelConfig *config);
58
59 /******************************************************************************/
60 /*-------------------------Function Implementations---------------------------*/
61 /******************************************************************************/
62
63 IFX_STATIC void IfxDma_Dma_configureTransactionSet(Ifx_DMA_CH *channel, const IfxDma_Dma_ChannelConfig *config)
64 {
65 /* shadow address shall be 32-Byte Aligned */
66 {
67 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, ((config->shadowAddress & 0x1F) == 0U));
68 }
69
70 {
71 Ifx_DMA_CH_CHCFGR chcfgr;
72 chcfgr.U = 0;
73 chcfgr.B.TREL = config->transferCount;
74 chcfgr.B.BLKM = config->blockMode;
75 chcfgr.B.RROAT = config->requestMode;
76 chcfgr.B.CHMODE = config->operationMode;
77 chcfgr.B.CHDW = config->moveSize;
78 chcfgr.B.PRSEL = config->requestSource;
79 chcfgr.B.PATSEL = config->pattern;
80
81 channel->CHCFGR.U = chcfgr.U;
82 }
83
84 {
85 Ifx_DMA_CH_ADICR adicr;
86 adicr.U = 0;
87 adicr.B.SMF = config->sourceAddressIncrementStep;
88 adicr.B.INCS = config->sourceAddressIncrementDirection;
89 adicr.B.CBLS = config->sourceAddressCircularRange;
90 adicr.B.SCBE = config->sourceCircularBufferEnabled;
91 adicr.B.DMF = config->destinationAddressIncrementStep;
92 adicr.B.INCD = config->destinationAddressIncrementDirection;
93 adicr.B.CBLD = config->destinationAddressCircularRange;
94 adicr.B.DCBE = config->destinationCircularBufferEnabled;
95 adicr.B.SHCT = config->shadowControl;
96 adicr.B.STAMP = config->timestampEnabled;
97 adicr.B.WRPSE = config->wrapSourceInterruptEnabled;
98 adicr.B.WRPDE = config->wrapDestinationInterruptEnabled;
99 adicr.B.INTCT = (config->channelInterruptEnabled ? 2 : 0) | (config->channelInterruptControl ? 1 : 0);
100 adicr.B.IRDV = config->interruptRaiseThreshold;
101 //enter also the circular buffer enable bits
102
103 channel->ADICR.U = adicr.U;
104 }
105 {
106 Ifx_DMA_TSR tsr;
107 tsr.U = config->module->dma->TSR[config->channelId].U;
108 tsr.B.ETRL = config->transactionRequestLostInterruptEnabled;
109
110 config->module->dma->TSR[config->channelId].U = tsr.U;
111 }
112 channel->SADR.U = config->sourceAddress;
113 channel->DADR.U = config->destinationAddress;
114 channel->SDCRCR.U = config->sourceDestinationAddressCrc;
115 channel->RDCRCR.U = config->readDataCrc;
116
117 // write not allowed if SHCT=1 or SHCT=2
118 if ((config->shadowControl != IfxDma_ChannelShadow_none) &&
119 (config->shadowControl != IfxDma_ChannelShadow_src) &&
120 (config->shadowControl != IfxDma_ChannelShadow_dst))
121 {
122 channel->SHADR.U = config->shadowAddress;
123 }
124 }
125
126
127 void IfxDma_Dma_createModuleHandle(IfxDma_Dma *dmaHandle, Ifx_DMA *dma)
128 {
129 dmaHandle->dma = dma;
130 }
131
132
133 void IfxDma_Dma_deInitChannel(IfxDma_Dma *dma, IfxDma_ChannelId channel)
134 {
135 if (IfxDma_isChannelTransactionEnabled(dma->dma, channel))
136 {
137 IfxDma_disableChannelTransaction(dma->dma, channel);
138 }
139
140 IfxDma_resetChannel(dma->dma, channel);
141
142 while (!(IfxDma_isChannelReset(dma->dma, channel)))
143 {}
144 }
145
146
147 void IfxDma_Dma_initChannel(IfxDma_Dma_Channel *channel, const IfxDma_Dma_ChannelConfig *config)
148 {
149 Ifx_DMA *dma = config->module->dma;
150
151 channel->dma = dma;
152 channel->channelId = config->channelId;
153 channel->channel = &dma->CH[config->channelId];
154
155 IfxDma_Dma_configureTransactionSet(channel->channel, config);
156
157 {
158 Ifx_DMA_TSR tsr;
159 tsr.U = 0;
160
161 if (config->hardwareRequestEnabled)
162 {
163 tsr.B.ECH = 1;
164 }
165 else
166 {
167 tsr.B.DCH = 1;
168 }
169
170 dma->TSR[channel->channelId].U = tsr.U;
171 }
172
173 if (config->channelInterruptPriority > 0)
174 {
175 volatile Ifx_SRC_SRCR *src = IfxDma_getSrcPointer(channel->dma, channel->channelId);
176 IfxSrc_init(src, config->channelInterruptTypeOfService, config->channelInterruptPriority);
177 IfxSrc_enable(src);
178 }
179 }
180
181
182 void IfxDma_Dma_initChannelConfig(IfxDma_Dma_ChannelConfig *config, IfxDma_Dma *dma)
183 {
184 const IfxDma_Dma_ChannelConfig defaultConfig = {
185 .module = NULL_PTR,
186 .channelId = IfxDma_ChannelId_0,
187 .sourceAddress = 0,
188 .destinationAddress = 0,
189 .shadowAddress = 0,
190 .readDataCrc = 0,
191 .sourceDestinationAddressCrc = 0,
192 .transferCount = 0,
193 .blockMode = IfxDma_ChannelMove_1,
194 .requestMode = IfxDma_ChannelRequestMode_oneTransferPerRequest,
195 .operationMode = IfxDma_ChannelOperationMode_single,
196 .moveSize = IfxDma_ChannelMoveSize_8bit,
197 .pattern = IfxDma_ChannelPattern_0_disable,
198 .requestSource = IfxDma_ChannelRequestSource_peripheral,
199 .busPriority = IfxDma_ChannelBusPriority_medium,
200 .hardwareRequestEnabled = FALSE,
201 .sourceAddressIncrementStep = IfxDma_ChannelIncrementStep_1,
202 .sourceAddressIncrementDirection = IfxDma_ChannelIncrementDirection_positive,
203 .sourceAddressCircularRange = IfxDma_ChannelIncrementCircular_32768,
204 .destinationAddressIncrementStep = IfxDma_ChannelIncrementStep_1,
205 .destinationAddressIncrementDirection = IfxDma_ChannelIncrementDirection_positive,
206 .destinationAddressCircularRange = IfxDma_ChannelIncrementCircular_32768,
207 .shadowControl = IfxDma_ChannelShadow_none,
208 .sourceCircularBufferEnabled = FALSE,
209 .destinationCircularBufferEnabled = FALSE,
210 .timestampEnabled = FALSE,
211 .wrapSourceInterruptEnabled = FALSE,
212 .wrapDestinationInterruptEnabled = FALSE,
213 .channelInterruptEnabled = FALSE,
214 .channelInterruptControl = IfxDma_ChannelInterruptControl_thresholdLimitMatch,
215 .interruptRaiseThreshold = 0,
216 .transactionRequestLostInterruptEnabled = FALSE,
217 .channelInterruptPriority = 0,
218 .channelInterruptTypeOfService = IfxSrc_Tos_cpu0
219 };
220
221 /* Default Configuration */
222 *config = defaultConfig;
223
224 /* take over module pointer */
225 config->module = dma;
226 }
227
228
229 void IfxDma_Dma_initLinkedListEntry(void *ptrToAddress, const IfxDma_Dma_ChannelConfig *config)
230 {
231 IfxDma_Dma_configureTransactionSet((Ifx_DMA_CH *)ptrToAddress, config);
232 }
233
234
235 void IfxDma_Dma_initModule(IfxDma_Dma *dma, const IfxDma_Dma_Config *config)
236 {
237 dma->dma = config->dma;
238 }
239
240
241 void IfxDma_Dma_initModuleConfig(IfxDma_Dma_Config *config, Ifx_DMA *dma)
242 {
243 config->dma = dma;
244 }
IfxDma_Dma_Config
Configuration data structure of the Module.
Definition: IfxDma_Dma.h:520
IfxDma_ChannelId
IfxDma_ChannelId
DMA channel resources definition.
Definition: IfxDma_cfg.h:102
IfxDma_Dma_ChannelConfig::moveSize
IfxDma_ChannelMoveSize moveSize
Read/write data size.
Definition: IfxDma_Dma.h:493
IfxDma_Dma_initModuleConfig
void IfxDma_Dma_initModuleConfig(IfxDma_Dma_Config *config, Ifx_DMA *dma)
initialize the DMA module configuration
Definition: IfxDma_Dma.c:241
IfxDma_Dma_ChannelConfig::sourceAddressCircularRange
IfxDma_ChannelIncrementCircular sourceAddressCircularRange
Determines which part of the source address remains unchanged and therby not updated after each move...
Definition: IfxDma_Dma.h:500
IfxDma_Dma_ChannelConfig::channelId
IfxDma_ChannelId channelId
Specifies the channel being used.
Definition: IfxDma_Dma.h:483
IfxDma_Dma_ChannelConfig::readDataCrc
uint32 readDataCrc
Checksum for read data of the channel.
Definition: IfxDma_Dma.h:487
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxDma_Dma_ChannelConfig::sourceAddressIncrementStep
IfxDma_ChannelIncrementStep sourceAddressIncrementStep
Describes the address offset with which the source address should be modified after each move...
Definition: IfxDma_Dma.h:498
IfxDma_Dma_ChannelConfig::destinationAddressIncrementStep
IfxDma_ChannelIncrementStep destinationAddressIncrementStep
Describes the address offset with which the destination address should be modified after each move...
Definition: IfxDma_Dma.h:501
IfxDma_Dma_initChannelConfig
void IfxDma_Dma_initChannelConfig(IfxDma_Dma_ChannelConfig *config, IfxDma_Dma *dma)
initialize the DMA module channel configuration
Definition: IfxDma_Dma.c:182
IfxDma_ChannelMoveSize_8bit
1 DMA move is 8 bit wide
Definition: IfxDma.h:174
IfxDma_Dma.h
DMA DMA details.
IfxDma_Dma_ChannelConfig::sourceAddress
uint32 sourceAddress
Source address for the DMA channel.
Definition: IfxDma_Dma.h:484
IfxDma_Dma_initModule
void IfxDma_Dma_initModule(IfxDma_Dma *dma, const IfxDma_Dma_Config *config)
Initialize the DMA module.
Definition: IfxDma_Dma.c:235
IfxDma_Dma_ChannelConfig::blockMode
IfxDma_ChannelMove blockMode
Number of moves in a transfer.
Definition: IfxDma_Dma.h:490
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
IfxDma_Dma_ChannelConfig::sourceCircularBufferEnabled
boolean sourceCircularBufferEnabled
Enables/Disables the source circular buffering.
Definition: IfxDma_Dma.h:505
IfxDma_Dma_ChannelConfig::timestampEnabled
boolean timestampEnabled
Enables/Disables the appendage of the time stamp after end of the last DMA move in a transaction...
Definition: IfxDma_Dma.h:507
IfxDma_ChannelInterruptControl_thresholdLimitMatch
interrupt when transfer count (TCOUNT) equals the threshold limit (IRDV)
Definition: IfxDma.h:150
IfxDma_Dma_ChannelConfig::destinationCircularBufferEnabled
boolean destinationCircularBufferEnabled
Enables/Disables the destination circular buffering.
Definition: IfxDma_Dma.h:506
IfxDma_Dma_ChannelConfig::interruptRaiseThreshold
uint8 interruptRaiseThreshold
The value of the transferCount at which the interrupt should be raised.
Definition: IfxDma_Dma.h:512
IfxDma_Dma_ChannelConfig::hardwareRequestEnabled
boolean hardwareRequestEnabled
Enabling channel transaction via hardware request.
Definition: IfxDma_Dma.h:497
IfxDma_Dma_ChannelConfig::wrapSourceInterruptEnabled
boolean wrapSourceInterruptEnabled
An interrupt should be triggered whenever source address is wrapped.
Definition: IfxDma_Dma.h:508
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxDma_Dma_deInitChannel
void IfxDma_Dma_deInitChannel(IfxDma_Dma *dma, IfxDma_ChannelId channel)
de-initialize the DMA channel
Definition: IfxDma_Dma.c:133
IfxDma_Dma_Channel::channel
Ifx_DMA_CH * channel
Specifies the pointer to DMA channel registers.
Definition: IfxDma_Dma.h:475
IfxDma_Dma_ChannelConfig::channelInterruptPriority
Ifx_Priority channelInterruptPriority
Priority of the channel interrupt trigger.
Definition: IfxDma_Dma.h:514
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxDma_Dma_initLinkedListEntry
void IfxDma_Dma_initLinkedListEntry(void *ptrToAddress, const IfxDma_Dma_ChannelConfig *config)
linked list functionality within the DMA module
Definition: IfxDma_Dma.c:229
IfxDma_ChannelShadow_none
shadow address register not used. Source and destination address register are written directly ...
Definition: IfxDma.h:238
IfxDma_isChannelReset
IFX_INLINE boolean IfxDma_isChannelReset(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return the status of a DMA channel (reset / not reset) This API needs to be used after the IfxDma_res...
Definition: IfxDma.h:1555
IfxDma_getSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxDma_getSrcPointer(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns the SRC pointer for given DMA channel.
Definition: IfxDma.h:1541
IfxDma_Dma_ChannelConfig::sourceAddressIncrementDirection
IfxDma_ChannelIncrementDirection sourceAddressIncrementDirection
Decides whether the source address offset after each move should be added or decremented from the exi...
Definition: IfxDma_Dma.h:499
IfxDma_ChannelMove_1
1 DMA move per DMA transfer
Definition: IfxDma.h:159
IfxDma_Dma_ChannelConfig::transferCount
uint16 transferCount
Number of transfers in a transaction.
Definition: IfxDma_Dma.h:489
IfxDma_ChannelRequestSource_peripheral
Transfer Request via Hardware Trigger.
Definition: IfxDma.h:229
IfxDma_Dma_ChannelConfig::pattern
IfxDma_ChannelPattern pattern
Pattern selection operation modes.
Definition: IfxDma_Dma.h:494
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:50
IfxDma_Dma::dma
Ifx_DMA * dma
Specifies the pointer to the DMA registers.
Definition: IfxDma_Dma.h:462
IfxDma_ChannelIncrementStep_1
increment by 1 width
Definition: IfxDma.h:135
IfxDma_ChannelShadow_dst
Shadow address register used for destination address buffering. When writing to DADRmx, the address is buffered in SHADRmx and transferred to DADRmx with the start of the next DMA transaction.
Definition: IfxDma.h:240
IfxDma_Dma_configureTransactionSet
IFX_STATIC void IfxDma_Dma_configureTransactionSet(Ifx_DMA_CH *channel, const IfxDma_Dma_ChannelConfig *config)
local function to copy a transaction set into DMA channel SFRs or memory location (for linked lists) ...
Definition: IfxDma_Dma.c:63
IfxDma_ChannelRequestMode_oneTransferPerRequest
a request initiates a single transfer
Definition: IfxDma.h:220
IfxDma_Dma_createModuleHandle
void IfxDma_Dma_createModuleHandle(IfxDma_Dma *dmaHandle, Ifx_DMA *dma)
initializes a DMA module handle based on the current configuration. Can be used in code where it&#39;s en...
Definition: IfxDma_Dma.c:127
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:68
IfxDma_ChannelId_0
Ifx_DMA Channel 0.
Definition: IfxDma_cfg.h:105
IfxDma_ChannelBusPriority_medium
medium priority
Definition: IfxDma.h:94
IfxDma_Dma_ChannelConfig::sourceDestinationAddressCrc
uint32 sourceDestinationAddressCrc
Checksum for source and destination address of channel.
Definition: IfxDma_Dma.h:488
IfxDma_Dma
DMA base address data structure (Module handle)
Definition: IfxDma_Dma.h:460
IfxDma_Dma_ChannelConfig::transactionRequestLostInterruptEnabled
boolean transactionRequestLostInterruptEnabled
Enables/Disables the channel transaction request lost interrupt.
Definition: IfxDma_Dma.h:513
IfxDma_disableChannelTransaction
IFX_INLINE void IfxDma_disableChannelTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Disable a DMA channel hardware transaction request.
Definition: IfxDma.h:1307
IfxDma_ChannelOperationMode_single
channel disabled after transaction
Definition: IfxDma.h:187
IfxDma_Dma_ChannelConfig::wrapDestinationInterruptEnabled
boolean wrapDestinationInterruptEnabled
An interrupt should be triggered whenever destination address is wrapped.
Definition: IfxDma_Dma.h:509
IfxDma_resetChannel
IFX_INLINE void IfxDma_resetChannel(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Reset the channel.
Definition: IfxDma.h:1579
IfxDma_Dma_ChannelConfig::operationMode
IfxDma_ChannelOperationMode operationMode
keep enable/disable the hardware channel request after a transaction
Definition: IfxDma_Dma.h:492
IfxDma_ChannelIncrementDirection_positive
pointer is incremented
Definition: IfxDma.h:127
IfxDma_Dma_ChannelConfig
Configuration data structure of the channel.
Definition: IfxDma_Dma.h:480
IfxDma_Dma_initChannel
void IfxDma_Dma_initChannel(IfxDma_Dma_Channel *channel, const IfxDma_Dma_ChannelConfig *config)
initialize the DMA channel
Definition: IfxDma_Dma.c:147
IfxDma_Dma_ChannelConfig::shadowAddress
uint32 shadowAddress
Initial content of shadow address for the DMA channel.
Definition: IfxDma_Dma.h:486
IfxDma_ChannelIncrementCircular_32768
circular buffer size is 32768 byte
Definition: IfxDma.h:118
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxDma_isChannelTransactionEnabled
IFX_INLINE boolean IfxDma_isChannelTransactionEnabled(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return the hardware transaction request status of a DMA channel.
Definition: IfxDma.h:1561
IfxDma_ChannelPattern_0_disable
Pattern detect 0 disabled.
Definition: IfxDma.h:196
IfxDma_Dma_ChannelConfig::shadowControl
IfxDma_ChannelShadow shadowControl
selects the shadow transfer mode
Definition: IfxDma_Dma.h:504
IfxDma_Dma_ChannelConfig::destinationAddress
uint32 destinationAddress
Destination address for the DMA channel.
Definition: IfxDma_Dma.h:485
IfxDma_ChannelShadow_src
Shadow address register used for source address buffering. When writing to SADRmx, the address is buffered in SHADRmx and transferred to SADRmx with the start of the next DMA transaction.
Definition: IfxDma.h:239
IfxDma_Dma_ChannelConfig::requestMode
IfxDma_ChannelRequestMode requestMode
A service request initiates a single transfer, or the complete transaction.
Definition: IfxDma_Dma.h:491
IfxDma_Dma_ChannelConfig::destinationAddressCircularRange
IfxDma_ChannelIncrementCircular destinationAddressCircularRange
Determines which part of the destination address remains unchanged and therby not updated after each ...
Definition: IfxDma_Dma.h:503
IfxDma_Dma_ChannelConfig::destinationAddressIncrementDirection
IfxDma_ChannelIncrementDirection destinationAddressIncrementDirection
Decides whether the destination address offset after each move should be added or decremented from th...
Definition: IfxDma_Dma.h:502
IfxDma_Dma_ChannelConfig::requestSource
IfxDma_ChannelRequestSource requestSource
Request of channel transfer through hardware or daisy chain. channel transfer complete interrupt of p...
Definition: IfxDma_Dma.h:495
IfxDma_Dma_ChannelConfig::channelInterruptEnabled
boolean channelInterruptEnabled
The channel transfer interrupt should be triggered. See also channelInterruptControl.
Definition: IfxDma_Dma.h:510
IfxDma_Dma_Channel
Channel handle.
Definition: IfxDma_Dma.h:471
IfxDma_Dma_ChannelConfig::module
IfxDma_Dma * module
Specifies pointer to the IfxDma_Dma module handle.
Definition: IfxDma_Dma.h:482
IfxDma_Dma_ChannelConfig::channelInterruptControl
IfxDma_ChannelInterruptControl channelInterruptControl
The channel transfer interrupt can either be triggered depending on the interruptRaiseThreshold, or each time the transaction count is decremented.
Definition: IfxDma_Dma.h:511
IfxDma_Dma_ChannelConfig::channelInterruptTypeOfService
IfxSrc_Tos channelInterruptTypeOfService
Interrupt service provider.
Definition: IfxDma_Dma.h:515
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271


iLLD_TC38A: IfxDma_Dma.h Source File

  • Dma
  • Dma
IfxDma_Dma.h
Go to the documentation of this file.
1 /**
2 * \file IfxDma_Dma.h
3 * \brief DMA DMA details
4 * \ingroup IfxLld_Dma
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Dma_Dma_Usage How to use the DMA Interface driver?
42 * \ingroup IfxLld_Dma
43 *
44 * The DMA interface driver provides a default configuration for data moves without intervention of the CPU or other on chip devices.
45 *
46 * In the following sections it will be described, how to integrate the driver into the application framework for different use cases.
47 *
48 * \section IfxLld_Dma_Dma_Preparation Preparation
49 * \subsection IfxLld_Dma_Dma_Include Include Files
50 *
51 * Include following header file into your C code:
52 *
53 * \code
54 * #include <Dma/Dma/IfxDma_Dma.h>
55 * #include <Vadc/Adc/IfxVadc_Adc.h>
56 *
57 * \endcode
58 *
59 *
60 * \subsection IfxLld_Dma_Dma_Module Module initialisation
61 *
62 * Declare the dma handle as a global variable:
63 *
64 * \code
65 * // DMA handle
66 * IfxDma_Dma dma;
67 * \endcode
68 *
69 * Initialize the DMA with following code:
70 * \code
71 * // create module config
72 * IfxDma_Dma_Config dmaConfig;
73 * IfxDma_Dma_initModuleConfig(&dmaConfig, &MODULE_DMA);
74 *
75 * // initialize module
76 * // IfxDma_Dma dma; // declared globally
77 * IfxDma_Dma_initModule(&dma, &dmaConfig);
78 * \endcode
79 *
80 * This only has to be done once in the application.
81 *
82 * The "IfxDma_Dma dma" handle should either be declared as a global variable (as shown in this example),
83 * or it can be created locally if desired:
84 *
85 * \code
86 * IfxDma_Dma dma;
87 * IfxDma_Dma_createModuleHandle(&dma, &MODULE_DMA);
88 * \endcode
89 *
90 * \subsection IfxLld_Dma_Dma_Simple Memory-to-Memory Transfers
91 *
92 * A large amount of data should be copied between SRI based memories, e.g. from Flash into the DSPR
93 * of the current CPU. It's recommended to use 256 bit moves for this purpose for best performance.
94 *
95 * This requires, that source and target locations are 256 bit (32 byte) aligned. With the GCC compiler
96 * this can be achieved by adding __attribute__ ((aligned(64))) to the arrays:
97 *
98 * \code
99 * #define MEMORY_TRANSFER_NUM_WORDS 1024
100 * uint32 __attribute__ ((aligned(64))) memoryDestination[MEMORY_TRANSFER_NUM_WORDS];
101 * \endcode
102 *
103 * Channel configuration and handling for the data move:
104 * \code
105 * // construct the channel configuration
106 * IfxDma_Dma_ChannelConfig chnCfg;
107 * IfxDma_Dma_initChannelConfig(&chnCfg, &dma);
108 *
109 * // select DMA channel which should be used
110 * chnCfg.channelId = IfxDma_ChannelId_0;
111 *
112 * // source and destination address
113 * chnCfg.sourceAddress = (uint32)0x80000000; // somewhere in flash section, here: start of PFlash (only for demo)
114 * chnCfg.destinationAddress = (uint32)memoryDestination;
115 *
116 * // move size, transfer count and request/operation mode
117 * chnCfg.moveSize = IfxDma_ChannelMoveSize_256bit;
118 * chnCfg.transferCount = (4 * MEMORY_TRANSFER_NUM_WORDS) / 32; // e.g. 1024 words require 128 * 256 bit moves
119 * chnCfg.requestMode = IfxDma_ChannelRequestMode_completeTransactionPerRequest;
120 * chnCfg.operationMode = IfxDma_ChannelOperationMode_continuous;
121 *
122 * // transfer configuration into DMA channel registers
123 * IfxDma_Dma_Channel chn;
124 * IfxDma_Dma_initChannel(&chn, &chnCfg);
125 *
126 * // start transfer and wait until it's finished
127 * IfxDma_Dma_startChannelTransaction(&chn);
128 * while( IfxDma_Dma_isChannelTransactionPending(&chn) == TRUE );
129 * \endcode
130 *
131 *
132 * \subsection IfxLld_Dma_Dma_Peripheral Peripheral-to-Memory Transfers
133 *
134 * The content of 8 ADC result registers should be transfered to a memory location in DSPR whenever
135 * an VADC autoscan has been finished. After the DMA transaction, an interrupt should be triggered
136 * so that the CPU can process the conversion results.
137 *
138 * We use following global variables:
139 * \code
140 * // buffer for autoscanned conversion result values
141 * #define NUM_SCANNED_CHANNELS 8
142 * static uint16 vadcResultBuffer[NUM_SCANNED_CHANNELS];
143 *
144 * // VADC handle
145 * IfxVadc_Adc vadc;
146 *
147 * // VADC group handle
148 * static IfxVadc_Adc_Group adcGroup;
149 *
150 * // DMA channel handle
151 * static IfxDma_Dma_Channel dmaChn;
152 * \endcode
153 *
154 *
155 * Create an interrupt handler for the DMA channel request:
156 * \code
157 * // priorities are normally defined in Ifx_IntPrioDef.h
158 * #define IFX_INTPRIO_DMA_CH0 1
159 *
160 * IFX_INTERRUPT(dmaCh0ISR, 0, IFX_INTPRIO_DMA_CH0)
161 * {
162 * // ...
163 * // do something with the conversion results in vadcResultBuffer[]
164 * // ...
165 *
166 * // re-init DMA channel destination address
167 * IfxDma_Dma_setChannelDestinationAddress(&dmaChn, ADDR_CPU_DSPR(IfxCpu_getCoreId(), &vadcResultBuffer[0]));
168 *
169 * // start new transaction
170 * IfxDma_Dma_setChannelTransferCount(&dmaChn, NUM_SCANNED_CHANNELS);
171 *
172 * {
173 * uint32 channels = 0xff; // all 8 channels
174 * uint32 mask = 0xff; // modify the selection of all channels
175 *
176 * // configure autoscan (single shot, not continuous scan)
177 * IfxVadc_Adc_setScan(&adcGroup, channels, mask);
178 * }
179 * }
180 * \endcode
181 *
182 * ADC configuration:
183 * \code
184 * // create configuration
185 * IfxVadc_Adc_Config adcConfig;
186 * IfxVadc_Adc_initModuleConfig(&adcConfig, &MODULE_VADC);
187 *
188 * adcConfig.startupCalibration = TRUE;
189 *
190 * // initialize module
191 * // IfxVadc_Adc vadc; // declared globally
192 * IfxVadc_Adc_initModule(&vadc, &adcConfig);
193 *
194 * // create group config
195 * IfxVadc_Adc_GroupConfig adcGroupConfig;
196 * IfxVadc_Adc_initGroupConfig(&adcGroupConfig, &vadc);
197 *
198 * // initialize the group
199 * //IfxVadc_Adc_Group adcGroup; // defined globally
200 * adcGroupConfig.groupId = IfxVadc_GroupId_0;
201 * adcGroupConfig.master = adcGroupConfig.groupId;
202 *
203 * // enable all arbiter request sources
204 * adcGroupConfig.arbiter.requestSlotQueueEnabled = TRUE; // enable Queue mode
205 * adcGroupConfig.arbiter.requestSlotScanEnabled = TRUE; // enable Scan mode
206 * adcGroupConfig.arbiter.requestSlotBackgroundScanEnabled = TRUE; // enable Background scan
207 *
208 * // enable all gates in "always" mode (no edge detection)
209 * adcGroupConfig.queueRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
210 * adcGroupConfig.scanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
211 * adcGroupConfig.backgroundScanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
212 *
213 * IfxVadc_Adc_initGroup(&adcGroup, &adcGroupConfig);
214 *
215 * {
216 * // create channel config
217 * IfxVadc_Adc_ChannelConfig adcChannelConfig;
218 * IfxVadc_Adc_initChannelConfig(&adcChannelConfig, &adcGroup);
219 *
220 * // initialize the channels
221 * for(int i=0; i<NUM_SCANNED_CHANNELS; ++i) {
222 * adcChannelConfig.channelId = (IfxVadc_ChannelId)i;
223 * adcChannelConfig.resultRegister = IfxVadc_ChannelResult_0;
224 *
225 * // initialize the channel
226 * IfxVadc_Adc_Channel adcChannel;
227 * IfxVadc_Adc_initChannel(&adcChannel, &adcChannelConfig);
228 *
229 * IfxVadc_Adc_configureWaitForReadMode(&adcChannel, TRUE);
230 * }
231 * }
232 * adcGroup.group->RCR[0].B.SRGEN = 1; // interrupt when new result is available
233 *
234 * // send service request to DMA Channel 0
235 * IfxSrc_init((Ifx_SRC_SRCR*)&MODULE_SRC.VADC.G[0], IfxSrc_Tos_dma, 0);
236 * IfxSrc_enable((Ifx_SRC_SRCR*)&MODULE_SRC.VADC.G[0]);
237 * \endcode
238 *
239 * And finally the DMA channel configuration
240 * \code
241 * // create module config
242 * IfxDma_Dma_Config dmaConfig;
243 * IfxDma_Dma_initModuleConfig(&dmaConfig, &MODULE_DMA);
244 *
245 * // initialize module
246 * IfxDma_Dma dma;
247 * IfxDma_Dma_initModule(&dma, &dmaConfig);
248 *
249 * {
250 * // construct the channel configuration
251 * IfxDma_Dma_ChannelConfig chnCfg;
252 * IfxDma_Dma_initChannelConfig(&chnCfg, &dma);
253 *
254 * // select DMA channel which should be used
255 * chnCfg.channelId = IfxDma_ChannelId_0;
256 * chnCfg.hardwareRequestEnabled = TRUE; // will be triggered from VADC service request
257 *
258 * // interrupt configuration
259 * chnCfg.channelInterruptEnabled = TRUE; // service request from DMA after all words have been transfered
260 * chnCfg.channelInterruptPriority = IFX_INTPRIO_DMA_CH0;
261 * chnCfg.channelInterruptTypeOfService = IfxCpu_Irq_getTos(IfxCpu_getCoreIndex());
262 *
263 * // source and destination address
264 * chnCfg.sourceAddress = (uint32)&adcGroup.group->RES[0]; // first result register
265 * chnCfg.sourceCircularBufferEnabled = TRUE;
266 * chnCfg.sourceAddressCircularRange = IfxDma_ChannelIncrementCircular_1; // keep this address
267 *
268 * chnCfg.destinationAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &vadcResultBuffer[0]); // move into result buffer
269 * chnCfg.destinationAddressIncrementStep = IfxDma_ChannelIncrementStep_1; // increment once (=2 bytes) with each write
270 *
271 * // move size, transfer count and request/operation mode
272 * chnCfg.moveSize = IfxDma_ChannelMoveSize_16bit;
273 * chnCfg.transferCount = NUM_SCANNED_CHANNELS; // for the scanned channels
274 * chnCfg.requestMode = IfxDma_ChannelRequestMode_oneTransferPerRequest;
275 * chnCfg.operationMode = IfxDma_ChannelOperationMode_continuous; // hw request enable remains set after transaction
276 *
277 *
278 * // transfer configuration into DMA channel registers
279 * // IfxDma_Dma_Channel dmaChn; // declared globally
280 * IfxDma_Dma_initChannel(&dmaChn, &chnCfg);
281 *
282 * // configure IRQ handler which will be called after all result registers have been transfered
283 * IfxCpu_Irq_installInterruptHandler(&dmaCh0ISR, IFX_INTPRIO_DMA_CH0);
284 *
285 * // enable CPU interrupts
286 * IfxCpu_enableInterrupts();
287 * }
288 * \endcode
289 *
290 * In order to start the initial channel conversions, use:
291 * \code
292 * {
293 * uint32 channels = 0xff; // all 8 channels
294 * uint32 mask = 0xff; // modify the selection of all channels
295 *
296 * // configure and start autoscan (single shot, not continuous mode)
297 * IfxVadc_Adc_setScan(&adcGroup, channels, mask);
298 * }
299 * \endcode
300 *
301 * DMA will transfer the results to DSPR during the autoscan (whenever a new result is availale), and
302 * invoke the dmaCh0ISR function once all channels have been converted.
303 *
304 * The ISR will re-configure the DMA channel and re-start the autoscan.
305 *
306 *
307 * \subsection IfxLld_Dma_Dma_LinkedList Linked Lists
308 *
309 * Linked lists allow to initiate multiple DMA transactions from independent transaction sets which are
310 * typically stored in a DSPR memory location, and fetched and executed from the DMA channel without
311 * further CPU interaction.
312 *
313 * Following example demonstrates, how 5 different transactions can be initiated from a single request.
314 * We copy the data of 5 CAN message objects to a DSPR location.
315 *
316 * Includes and global variables:
317 * \code
318 * #include <Dma/Dma/IfxDma_Dma.h>
319 * #include <Scu/Std/IfxScuWdt.h>
320 * #include <IfxCan_reg.h>
321 *
322 * // DMA channel handle
323 * IfxDma_Dma_Channel chn;
324 *
325 * // Linked List storage
326 * // IMPORTANT: it has to be aligned to an 256bit address, otherwise DMA can't read it
327 * #define NUM_LINKED_LIST_ITEMS 5
328 * IFX_ALIGN(256) Ifx_DMA_CH linkedList[NUM_LINKED_LIST_ITEMS] ;
329 *
330 * // transfer these values to various CAN_MODATA[LH] registers via linked lists
331 * #define NUM_TRANSFERED_WORDS 2
332 * uint32 sourceBuffer[NUM_LINKED_LIST_ITEMS][NUM_TRANSFERED_WORDS];
333 *
334 * const uint32 destinationAddresses[NUM_LINKED_LIST_ITEMS] = {
335 * (uint32)&CAN_MODATAL0,
336 * (uint32)&CAN_MODATAL1,
337 * (uint32)&CAN_MODATAL2,
338 * (uint32)&CAN_MODATAL3,
339 * (uint32)&CAN_MODATAL4,
340 * };
341 * \endcode
342 *
343 * Following code to prepare CAN for this demo:
344 * \code
345 * // enable CAN (no Ifx LLD available yet)
346 * {
347 * uint32 passwd = IfxScuWdt_getCpuWatchdogPassword();
348 * IfxScuWdt_clearCpuEndinit(passwd);
349 *
350 * CAN_CLC.U = 0x0100;
351 * if( CAN_CLC.U ); // synch access
352 *
353 * // select f_clc as kernel clock
354 * CAN_MCR.B.CLKSEL = 1;
355 *
356 * // configure fractional divider
357 * CAN_FDR.U = 0x43ff;
358 *
359 * // wait until RAM has been initialized
360 * while( CAN_PANCTR.B.BUSY );
361 *
362 * IfxScuWdt_setCpuEndinit(passwd);
363 * }
364 * \endcode
365 *
366 *
367 * Build a linked list
368 * \code
369 * // create module config
370 * IfxDma_Dma_Config dmaConfig;
371 * IfxDma_Dma_initModuleConfig(&dmaConfig, &MODULE_DMA);
372 *
373 * // initialize module
374 * IfxDma_Dma dma;
375 * IfxDma_Dma_initModule(&dma, &dmaConfig);
376 *
377 * // initial channel configuration
378 * IfxDma_Dma_ChannelConfig cfg;
379 * IfxDma_Dma_initChannelConfig(&cfg, &dma);
380 *
381 * // following settings are used by all transactions
382 * cfg.transferCount = NUM_TRANSFERED_WORDS;
383 * cfg.requestMode = IfxDma_ChannelRequestMode_completeTransactionPerRequest;
384 * cfg.moveSize = IfxDma_ChannelMoveSize_32bit;
385 * cfg.shadowControl = IfxDma_ChannelShadow_linkedList;
386 *
387 * // generate linked list items
388 * for(int i=0; i<NUM_LINKED_LIST_ITEMS; ++i) {
389 * cfg.sourceAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &sourceBuffer[i]);
390 * cfg.destinationAddress = destinationAddresses[i];
391 *
392 * // address to next transaction set
393 * cfg.shadowAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), (uint32)&linkedList[(i + 1) % NUM_LINKED_LIST_ITEMS]);
394 *
395 * // transfer first transaction set into DMA channel
396 * if( i == 0 ) {
397 * IfxDma_Dma_initChannel(&chn, &cfg);
398 * }
399 *
400 * // transfer into linked list storage
401 * IfxDma_Dma_initLinkedListEntry((void *)&linkedList[i], &cfg);
402 *
403 * if( i == 0 ) {
404 * // - trigger channel interrupt once the first transaction set has been loaded (again) into DMA channel
405 * linkedList[i].CHCSR.B.SIT = 1;
406 * } else {
407 * // - activate SCH (transaction request) for each entry, except for the first one (linked list terminated here)
408 * linkedList[i].CHCSR.B.SCH = 1;
409 * }
410 * }
411 * \endcode
412 *
413 * The transfer can be started via software with:
414 * \code
415 * // clear service request flag
416 * (IfxDma_Dma_getSrcPointer(&chn))->B.CLRR = 1;
417 *
418 * // start linked list transaction
419 * IfxDma_Dma_startChannelTransaction(&chn);
420 *
421 * // wait for service request which is triggered at the end of linked list transfers
422 * while( !(IfxDma_Dma_getSrcPointer(&chn))->B.SRR );
423 * \endcode
424 *
425 * In order to synchronize with the end of linked list operations, it's recommended to poll the service request flag (triggered via linkedList[NUM_LINKED_LIST_ITEMS-1].CHCSR.B.SIT after the last word has been transfered), and not the transaction count as shown before, because a linked list will initiate multiple transactions.
426 *
427 * \defgroup IfxLld_Dma_Dma DMA
428 * \ingroup IfxLld_Dma
429 * \defgroup IfxLld_Dma_Dma_Data_Structures Data Structures
430 * \ingroup IfxLld_Dma_Dma
431 * \defgroup IfxLld_Dma_Dma_Module_Initialize Module Initialization
432 * \ingroup IfxLld_Dma_Dma
433 * \defgroup IfxLld_Dma_Dma_Channel_Initialize Channel Initialization
434 * \ingroup IfxLld_Dma_Dma
435 * \defgroup IfxLld_Dma_Dma_Linked_List Linked Lists
436 * \ingroup IfxLld_Dma_Dma
437 * \defgroup IfxLld_Dma_Dma_Channel_Transaction_Initiate Channel Transactions
438 * \ingroup IfxLld_Dma_Dma
439 */
440
441 #ifndef IFXDMA_DMA_H
442 #define IFXDMA_DMA_H 1
443
444 /******************************************************************************/
445 /*----------------------------------Includes----------------------------------*/
446 /******************************************************************************/
447
448 #include "_Impl/IfxDma_cfg.h"
449 #include "Dma/Std/IfxDma.h"
450 #include "Cpu/Std/IfxCpu.h"
451
452 /******************************************************************************/
453 /*-----------------------------Data Structures--------------------------------*/
454 /******************************************************************************/
455
456 /** \addtogroup IfxLld_Dma_Dma_Data_Structures
457 * \{ */
458 /** \brief DMA base address data structure (Module handle)
459 */
460 typedef struct
461 {
462 Ifx_DMA *dma; /**< \brief Specifies the pointer to the DMA registers */
463 } IfxDma_Dma;
464
465 /** \} */
466
467 /** \addtogroup IfxLld_Dma_Dma_Data_Structures
468 * \{ */
469 /** \brief Channel handle
470 */
471 typedef struct
472 {
473 Ifx_DMA *dma; /**< \brief Specifies the pointer to the DMA registers */
474 IfxDma_ChannelId channelId; /**< \brief Specifies the DMA channel */
475 Ifx_DMA_CH *channel; /**< \brief Specifies the pointer to DMA channel registers */
476 } IfxDma_Dma_Channel;
477
478 /** \brief Configuration data structure of the channel
479 */
480 typedef struct
481 {
482 IfxDma_Dma *module; /**< \brief Specifies pointer to the IfxDma_Dma module handle */
483 IfxDma_ChannelId channelId; /**< \brief Specifies the channel being used */
484 uint32 sourceAddress; /**< \brief Source address for the DMA channel */
485 uint32 destinationAddress; /**< \brief Destination address for the DMA channel */
486 uint32 shadowAddress; /**< \brief Initial content of shadow address for the DMA channel */
487 uint32 readDataCrc; /**< \brief Checksum for read data of the channel */
488 uint32 sourceDestinationAddressCrc; /**< \brief Checksum for source and destination address of channel */
489 uint16 transferCount; /**< \brief Number of transfers in a transaction */
490 IfxDma_ChannelMove blockMode; /**< \brief Number of moves in a transfer */
491 IfxDma_ChannelRequestMode requestMode; /**< \brief A service request initiates a single transfer, or the complete transaction */
492 IfxDma_ChannelOperationMode operationMode; /**< \brief keep enable/disable the hardware channel request after a transaction */
493 IfxDma_ChannelMoveSize moveSize; /**< \brief Read/write data size */
494 IfxDma_ChannelPattern pattern; /**< \brief Pattern selection operation modes */
495 IfxDma_ChannelRequestSource requestSource; /**< \brief Request of channel transfer through hardware or daisy chain. channel transfer complete interrupt of previous channel will trigger the next channel request */
496 IfxDma_ChannelBusPriority busPriority; /**< \brief Bus priority selection */
497 boolean hardwareRequestEnabled; /**< \brief Enabling channel transaction via hardware request */
498 IfxDma_ChannelIncrementStep sourceAddressIncrementStep; /**< \brief Describes the address offset with which the source address should be modified after each move */
499 IfxDma_ChannelIncrementDirection sourceAddressIncrementDirection; /**< \brief Decides whether the source address offset after each move should be added or decremented from the exisiting address */
500 IfxDma_ChannelIncrementCircular sourceAddressCircularRange; /**< \brief Determines which part of the source address remains unchanged and therby not updated after each move */
501 IfxDma_ChannelIncrementStep destinationAddressIncrementStep; /**< \brief Describes the address offset with which the destination address should be modified after each move */
502 IfxDma_ChannelIncrementDirection destinationAddressIncrementDirection; /**< \brief Decides whether the destination address offset after each move should be added or decremented from the exisiting address */
503 IfxDma_ChannelIncrementCircular destinationAddressCircularRange; /**< \brief Determines which part of the destination address remains unchanged and therby not updated after each move */
504 IfxDma_ChannelShadow shadowControl; /**< \brief selects the shadow transfer mode */
505 boolean sourceCircularBufferEnabled; /**< \brief Enables/Disables the source circular buffering */
506 boolean destinationCircularBufferEnabled; /**< \brief Enables/Disables the destination circular buffering */
507 boolean timestampEnabled; /**< \brief Enables/Disables the appendage of the time stamp after end of the last DMA move in a transaction */
508 boolean wrapSourceInterruptEnabled; /**< \brief An interrupt should be triggered whenever source address is wrapped */
509 boolean wrapDestinationInterruptEnabled; /**< \brief An interrupt should be triggered whenever destination address is wrapped */
510 boolean channelInterruptEnabled; /**< \brief The channel transfer interrupt should be triggered. See also channelInterruptControl */
511 IfxDma_ChannelInterruptControl channelInterruptControl; /**< \brief The channel transfer interrupt can either be triggered depending on the interruptRaiseThreshold, or each time the transaction count is decremented */
512 uint8 interruptRaiseThreshold; /**< \brief The value of the transferCount at which the interrupt should be raised */
513 boolean transactionRequestLostInterruptEnabled; /**< \brief Enables/Disables the channel transaction request lost interrupt */
514 Ifx_Priority channelInterruptPriority; /**< \brief Priority of the channel interrupt trigger */
515 IfxSrc_Tos channelInterruptTypeOfService; /**< \brief Interrupt service provider */
516 } IfxDma_Dma_ChannelConfig;
517
518 /** \brief Configuration data structure of the Module
519 */
520 typedef struct
521 {
522 Ifx_DMA *dma; /**< \brief Specifies the pointer to the DMA registers */
523 } IfxDma_Dma_Config;
524
525 /** \} */
526
527 /** \addtogroup IfxLld_Dma_Dma_Module_Initialize
528 * \{ */
529
530 /******************************************************************************/
531 /*-------------------------Global Function Prototypes-------------------------*/
532 /******************************************************************************/
533
534 /** \brief initializes a DMA module handle based on the current configuration.
535 * Can be used in code where it's ensure that the DMA module is already initialized, and a DMA handle isn't globally available.
536 * \param dmaHandle pointer to the DMA module handle
537 * \param dma pointer to the DMA registers
538 * \return None
539 *
540 * \code
541 * IfxDma_Dma dma;
542 * IfxDma_Dma_createModuleHandle(&dma, &MODULE_DMA);
543 * \endcode
544 *
545 */
546 IFX_EXTERN void IfxDma_Dma_createModuleHandle(IfxDma_Dma *dmaHandle, Ifx_DMA *dma);
547
548 /** \brief de-initialize the DMA channel
549 * \param dma pointer to the DMA module handle
550 * \param channel the DMA channel ID
551 * \return None
552 */
553 IFX_EXTERN void IfxDma_Dma_deInitChannel(IfxDma_Dma *dma, IfxDma_ChannelId channel);
554
555 /** \brief Initialize the DMA module
556 * \param dma pointer to the DMA module handle
557 * \param config Pointer to configuration structure of the DMA module
558 * \return None
559 *
560 * See \ref IfxLld_Dma_Dma_Simple
561 *
562 */
563 IFX_EXTERN void IfxDma_Dma_initModule(IfxDma_Dma *dma, const IfxDma_Dma_Config *config);
564
565 /** \brief initialize the DMA module configuration
566 * \param config Pointer to configuration structure of the DMA module
567 * \param dma pointer to the DMA registers
568 * \return None
569 *
570 * See \ref IfxLld_Dma_Dma_Simple
571 *
572 */
573 IFX_EXTERN void IfxDma_Dma_initModuleConfig(IfxDma_Dma_Config *config, Ifx_DMA *dma);
574
575 /** \} */
576
577 /** \addtogroup IfxLld_Dma_Dma_Channel_Initialize
578 * \{ */
579
580 /******************************************************************************/
581 /*-------------------------Global Function Prototypes-------------------------*/
582 /******************************************************************************/
583
584 /** \brief initialize the DMA channel
585 * \param channel pointer to the DMA base address and channel ID
586 * \param config pointer to the DMA default channel configuration structure
587 * \return None
588 *
589 * See \ref IfxLld_Dma_Dma_Simple
590 *
591 */
592 IFX_EXTERN void IfxDma_Dma_initChannel(IfxDma_Dma_Channel *channel, const IfxDma_Dma_ChannelConfig *config);
593
594 /** \brief initialize the DMA module channel configuration
595 * \param config pointer to the DMA default channel configuration structure
596 * \param dma pointer to the DMA module handle
597 * \return None
598 *
599 * See \ref IfxLld_Dma_Dma_Simple
600 *
601 */
602 IFX_EXTERN void IfxDma_Dma_initChannelConfig(IfxDma_Dma_ChannelConfig *config, IfxDma_Dma *dma);
603
604 /** \} */
605
606 /** \addtogroup IfxLld_Dma_Dma_Linked_List
607 * \{ */
608
609 /******************************************************************************/
610 /*-------------------------Inline Function Prototypes-------------------------*/
611 /******************************************************************************/
612
613 /** \brief Returns the SRC pointer for given DMA channel
614 * \param channel pointer to the DMA base address and channel ID
615 * \return SRC pointer for given DMA channel
616 */
617 IFX_INLINE volatile Ifx_SRC_SRCR *IfxDma_Dma_getSrcPointer(IfxDma_Dma_Channel *channel);
618
619 /******************************************************************************/
620 /*-------------------------Global Function Prototypes-------------------------*/
621 /******************************************************************************/
622
623 /** \brief linked list functionality within the DMA module
624 * \param ptrToAddress pointer to the memory location where the linked list entry should be stored
625 * \param config pointer to the DMA default channel configuration structure
626 * \return None
627 *
628 * See \ref IfxLld_Dma_Dma_LinkedList
629 *
630 */
631 IFX_EXTERN void IfxDma_Dma_initLinkedListEntry(void *ptrToAddress, const IfxDma_Dma_ChannelConfig *config);
632
633 /** \} */
634
635 /** \addtogroup IfxLld_Dma_Dma_Channel_Transaction_Initiate
636 * \{ */
637
638 /******************************************************************************/
639 /*-------------------------Inline Function Prototypes-------------------------*/
640 /******************************************************************************/
641
642 /** \brief Clear a channel transfer interrupt flag
643 * \param channel pointer to the DMA base address and channel ID
644 * \return None
645 */
646 IFX_INLINE void IfxDma_Dma_clearChannelInterrupt(IfxDma_Dma_Channel *channel);
647
648 /** \brief Return and clear a channel transfer interrupt flag
649 * The flag is automatically cleared with the call to this function
650 * \param channel pointer to the DMA base address and channel ID
651 * \return TRUE if the interrupt flag is set
652 * FALSE if the interrupt flag is not set
653 */
654 IFX_INLINE boolean IfxDma_Dma_getAndClearChannelInterrupt(IfxDma_Dma_Channel *channel);
655
656 /** \brief Return a channel transfer interrupt flag
657 * \param channel pointer to the DMA base address and channel ID
658 * \return TRUE if the interrupt flag is set
659 * FALSE if the interrupt flag is not set
660 */
661 IFX_INLINE boolean IfxDma_Dma_getChannelInterrupt(IfxDma_Dma_Channel *channel);
662
663 /** \brief Poll for an ongoing transaction
664 * \param channel pointer to the DMA base address and channel ID
665 * \return TRUE if a transaction request for the given channel is pending
666 *
667 * See \ref IfxLld_Dma_Dma_Simple
668 *
669 */
670 IFX_INLINE boolean IfxDma_Dma_isChannelTransactionPending(IfxDma_Dma_Channel *channel);
671
672 /** \brief Re-initialize the destination address after a transaction
673 * \param channel pointer to the DMA base address and channel ID
674 * \param address is the Initial address of the destination pointer
675 * \return None
676 *
677 * See \ref IfxLld_Dma_Dma_Simple
678 *
679 */
680 IFX_INLINE void IfxDma_Dma_setChannelDestinationAddress(IfxDma_Dma_Channel *channel, uint32 address);
681
682 /** \brief Re-initialize the source address after a transaction
683 * \param channel pointer to the DMA base address and channel ID
684 * \param address is the Initial address of the source pointer
685 * \return None
686 *
687 * See \ref IfxLld_Dma_Dma_Simple
688 *
689 */
690 IFX_INLINE void IfxDma_Dma_setChannelSourceAddress(IfxDma_Dma_Channel *channel, uint32 address);
691
692 /** \brief Re-initialize the transfer count after a transaction
693 * \param channel pointer to the DMA base address and channel ID
694 * \param transferCount value holds the DMA transfers within a transaction (1..16383; 0 handled like 1 transaction)
695 * \return None
696 *
697 * See \ref IfxLld_Dma_Dma_Simple
698 *
699 */
700 IFX_INLINE void IfxDma_Dma_setChannelTransferCount(IfxDma_Dma_Channel *channel, uint32 transferCount);
701
702 /** \brief initiate the DMA move transaction
703 * \param channel pointer to the DMA base address and channel ID
704 * \return None
705 *
706 * See \ref IfxLld_Dma_Dma_Simple
707 *
708 */
709 IFX_INLINE void IfxDma_Dma_startChannelTransaction(IfxDma_Dma_Channel *channel);
710
711 /** \} */
712
713 /******************************************************************************/
714 /*---------------------Inline Function Implementations------------------------*/
715 /******************************************************************************/
716
717 IFX_INLINE void IfxDma_Dma_clearChannelInterrupt(IfxDma_Dma_Channel *channel)
718 {
719 IfxDma_clearChannelInterrupt(channel->dma, channel->channelId);
720 }
721
722
723 IFX_INLINE boolean IfxDma_Dma_getAndClearChannelInterrupt(IfxDma_Dma_Channel *channel)
724 {
725 return IfxDma_getAndClearChannelInterrupt(channel->dma, channel->channelId);
726 }
727
728
729 IFX_INLINE boolean IfxDma_Dma_getChannelInterrupt(IfxDma_Dma_Channel *channel)
730 {
731 return IfxDma_getChannelInterrupt(channel->dma, channel->channelId);
732 }
733
734
735 IFX_INLINE volatile Ifx_SRC_SRCR *IfxDma_Dma_getSrcPointer(IfxDma_Dma_Channel *channel)
736 {
737 return IfxDma_getSrcPointer(channel->dma, channel->channelId);
738 }
739
740
741 IFX_INLINE boolean IfxDma_Dma_isChannelTransactionPending(IfxDma_Dma_Channel *channel)
742 {
743 return IfxDma_isChannelTransactionPending(channel->dma, channel->channelId);
744 }
745
746
747 IFX_INLINE void IfxDma_Dma_setChannelDestinationAddress(IfxDma_Dma_Channel *channel, uint32 address)
748 {
749 IfxDma_setChannelDestinationAddress(channel->dma, channel->channelId, (void *)address);
750 }
751
752
753 IFX_INLINE void IfxDma_Dma_setChannelSourceAddress(IfxDma_Dma_Channel *channel, uint32 address)
754 {
755 IfxDma_setChannelSourceAddress(channel->dma, channel->channelId, (void *)address);
756 }
757
758
759 IFX_INLINE void IfxDma_Dma_setChannelTransferCount(IfxDma_Dma_Channel *channel, uint32 transferCount)
760 {
761 IfxDma_setChannelTransferCount(channel->dma, channel->channelId, transferCount);
762 }
763
764
765 IFX_INLINE void IfxDma_Dma_startChannelTransaction(IfxDma_Dma_Channel *channel)
766 {
767 IfxDma_startChannelTransaction(channel->dma, channel->channelId);
768 }
769
770
771 #endif /* IFXDMA_DMA_H */
IfxDma_Dma_Config
Configuration data structure of the Module.
Definition: IfxDma_Dma.h:520
IfxDma_ChannelId
IfxDma_ChannelId
DMA channel resources definition.
Definition: IfxDma_cfg.h:102
IfxDma_Dma_ChannelConfig::moveSize
IfxDma_ChannelMoveSize moveSize
Read/write data size.
Definition: IfxDma_Dma.h:493
IfxDma_ChannelIncrementDirection
IfxDma_ChannelIncrementDirection
DMA incrementation direction definition Definition in Ifx_DMA.CH[64].ADICR.B.INCS.
Definition: IfxDma.h:124
IfxDma_Dma_setChannelSourceAddress
IFX_INLINE void IfxDma_Dma_setChannelSourceAddress(IfxDma_Dma_Channel *channel, uint32 address)
Re-initialize the source address after a transaction.
Definition: IfxDma_Dma.h:753
IfxDma_Dma_initModuleConfig
IFX_EXTERN void IfxDma_Dma_initModuleConfig(IfxDma_Dma_Config *config, Ifx_DMA *dma)
initialize the DMA module configuration
Definition: IfxDma_Dma.c:241
IfxDma_Dma_ChannelConfig::sourceAddressCircularRange
IfxDma_ChannelIncrementCircular sourceAddressCircularRange
Determines which part of the source address remains unchanged and therby not updated after each move...
Definition: IfxDma_Dma.h:500
IfxDma_Dma_Channel::channelId
IfxDma_ChannelId channelId
Specifies the DMA channel.
Definition: IfxDma_Dma.h:474
IfxDma_Dma_ChannelConfig::readDataCrc
uint32 readDataCrc
Checksum for read data of the channel.
Definition: IfxDma_Dma.h:487
IfxDma_Dma_clearChannelInterrupt
IFX_INLINE void IfxDma_Dma_clearChannelInterrupt(IfxDma_Dma_Channel *channel)
Clear a channel transfer interrupt flag.
Definition: IfxDma_Dma.h:717
IfxDma_ChannelMove
IfxDma_ChannelMove
DMA transfer definition Definition in Ifx_DMA.ME0.CHCR.B.BLKM and Ifx_DMA.ME1.CHCR.B.BLKM.
Definition: IfxDma.h:157
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:100
IfxDma_setChannelSourceAddress
IFX_INLINE void IfxDma_setChannelSourceAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId, const void *address)
Configure the source address.
Definition: IfxDma.h:1656
IfxDma_Dma_ChannelConfig::sourceAddressIncrementStep
IfxDma_ChannelIncrementStep sourceAddressIncrementStep
Describes the address offset with which the source address should be modified after each move...
Definition: IfxDma_Dma.h:498
IfxDma_Dma_ChannelConfig::destinationAddressIncrementStep
IfxDma_ChannelIncrementStep destinationAddressIncrementStep
Describes the address offset with which the destination address should be modified after each move...
Definition: IfxDma_Dma.h:501
IfxDma_Dma_initChannelConfig
IFX_EXTERN void IfxDma_Dma_initChannelConfig(IfxDma_Dma_ChannelConfig *config, IfxDma_Dma *dma)
initialize the DMA module channel configuration
Definition: IfxDma_Dma.c:182
IfxDma_Dma_setChannelTransferCount
IFX_INLINE void IfxDma_Dma_setChannelTransferCount(IfxDma_Dma_Channel *channel, uint32 transferCount)
Re-initialize the transfer count after a transaction.
Definition: IfxDma_Dma.h:759
IfxDma.h
DMA basic functionality.
IfxDma_Dma_ChannelConfig::sourceAddress
uint32 sourceAddress
Source address for the DMA channel.
Definition: IfxDma_Dma.h:484
IfxDma_Dma_initModule
IFX_EXTERN void IfxDma_Dma_initModule(IfxDma_Dma *dma, const IfxDma_Dma_Config *config)
Initialize the DMA module.
Definition: IfxDma_Dma.c:235
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxDma_Dma_ChannelConfig::blockMode
IfxDma_ChannelMove blockMode
Number of moves in a transfer.
Definition: IfxDma_Dma.h:490
IfxDma_isChannelTransactionPending
IFX_INLINE boolean IfxDma_isChannelTransactionPending(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return the status of a DMA channel (transaction pending)
Definition: IfxDma.h:1567
IfxDma_getChannelInterrupt
IFX_INLINE boolean IfxDma_getChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return a channel transfer interrupt flag.
Definition: IfxDma.h:1461
IfxDma_Dma_ChannelConfig::sourceCircularBufferEnabled
boolean sourceCircularBufferEnabled
Enables/Disables the source circular buffering.
Definition: IfxDma_Dma.h:505
IfxDma_Dma_ChannelConfig::timestampEnabled
boolean timestampEnabled
Enables/Disables the appendage of the time stamp after end of the last DMA move in a transaction...
Definition: IfxDma_Dma.h:507
IfxDma_startChannelTransaction
IFX_INLINE void IfxDma_startChannelTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Request a DMA channel transaction.
Definition: IfxDma.h:1694
IfxDma_Dma_ChannelConfig::destinationCircularBufferEnabled
boolean destinationCircularBufferEnabled
Enables/Disables the destination circular buffering.
Definition: IfxDma_Dma.h:506
IfxDma_Dma_isChannelTransactionPending
IFX_INLINE boolean IfxDma_Dma_isChannelTransactionPending(IfxDma_Dma_Channel *channel)
Poll for an ongoing transaction.
Definition: IfxDma_Dma.h:741
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxDma_ChannelShadow
IfxDma_ChannelShadow
shadow definition definition Definition in Ifx_DMA.CH[64].ADICR.B.SHCT
Definition: IfxDma.h:236
IfxDma_Dma_ChannelConfig::interruptRaiseThreshold
uint8 interruptRaiseThreshold
The value of the transferCount at which the interrupt should be raised.
Definition: IfxDma_Dma.h:512
IfxDma_Dma_ChannelConfig::hardwareRequestEnabled
boolean hardwareRequestEnabled
Enabling channel transaction via hardware request.
Definition: IfxDma_Dma.h:497
IfxDma_Dma_ChannelConfig::wrapSourceInterruptEnabled
boolean wrapSourceInterruptEnabled
An interrupt should be triggered whenever source address is wrapped.
Definition: IfxDma_Dma.h:508
IfxDma_Dma_deInitChannel
IFX_EXTERN void IfxDma_Dma_deInitChannel(IfxDma_Dma *dma, IfxDma_ChannelId channel)
de-initialize the DMA channel
Definition: IfxDma_Dma.c:133
IfxDma_Dma_Channel::channel
Ifx_DMA_CH * channel
Specifies the pointer to DMA channel registers.
Definition: IfxDma_Dma.h:475
IfxDma_Dma_ChannelConfig::channelInterruptPriority
Ifx_Priority channelInterruptPriority
Priority of the channel interrupt trigger.
Definition: IfxDma_Dma.h:514
IfxDma_getAndClearChannelInterrupt
IFX_INLINE boolean IfxDma_getAndClearChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return and clear a channel transfer interrupt flag The flag is automatically cleared with the call to...
Definition: IfxDma.h:1389
IfxDma_Dma_getChannelInterrupt
IFX_INLINE boolean IfxDma_Dma_getChannelInterrupt(IfxDma_Dma_Channel *channel)
Return a channel transfer interrupt flag.
Definition: IfxDma_Dma.h:729
IfxDma_ChannelRequestSource
IfxDma_ChannelRequestSource
DMA request selection Definition in Ifx_DMA.ME0.CHCR.B.PRSEL and Ifx_DMA.ME1.CHCR.B.PRSEL.
Definition: IfxDma.h:227
IfxDma_Dma_initLinkedListEntry
IFX_EXTERN void IfxDma_Dma_initLinkedListEntry(void *ptrToAddress, const IfxDma_Dma_ChannelConfig *config)
linked list functionality within the DMA module
Definition: IfxDma_Dma.c:229
IfxDma_getSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxDma_getSrcPointer(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns the SRC pointer for given DMA channel.
Definition: IfxDma.h:1541
IfxDma_cfg.h
DMA on-chip implementation data.
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxDma_Dma_ChannelConfig::sourceAddressIncrementDirection
IfxDma_ChannelIncrementDirection sourceAddressIncrementDirection
Decides whether the source address offset after each move should be added or decremented from the exi...
Definition: IfxDma_Dma.h:499
IfxDma_ChannelRequestMode
IfxDma_ChannelRequestMode
DMA request mode Definition in Ifx_DMA.ME0.CHCR.B.RROAT and Ifx_DMA.ME1.CHCR.B.RROAT.
Definition: IfxDma.h:218
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxDma_Dma_ChannelConfig::transferCount
uint16 transferCount
Number of transfers in a transaction.
Definition: IfxDma_Dma.h:489
IfxDma_Dma_ChannelConfig::pattern
IfxDma_ChannelPattern pattern
Pattern selection operation modes.
Definition: IfxDma_Dma.h:494
IfxDma_Dma::dma
Ifx_DMA * dma
Specifies the pointer to the DMA registers.
Definition: IfxDma_Dma.h:462
IfxDma_ChannelInterruptControl
IfxDma_ChannelInterruptControl
Channel Transfer Interrupt generation mechanism. Definition in Ifx_DMA.CH[64].ADICR.B.INTCT (bit 0)
Definition: IfxDma.h:148
IfxDma_Dma_createModuleHandle
IFX_EXTERN void IfxDma_Dma_createModuleHandle(IfxDma_Dma *dmaHandle, Ifx_DMA *dma)
initializes a DMA module handle based on the current configuration. Can be used in code where it&#39;s en...
Definition: IfxDma_Dma.c:127
IfxDma_ChannelPattern
IfxDma_ChannelPattern
Pattern detection selection Definition in Ifx_DMA.ME0.CHCR.B.PATSEL and Ifx_DMA.ME1.CHCR.B.PATSEL.
Definition: IfxDma.h:194
IfxDma_Dma_ChannelConfig::sourceDestinationAddressCrc
uint32 sourceDestinationAddressCrc
Checksum for source and destination address of channel.
Definition: IfxDma_Dma.h:488
IfxDma_ChannelBusPriority
IfxDma_ChannelBusPriority
Channel Bus Priority definition.
Definition: IfxDma.h:91
IfxDma_Dma
DMA base address data structure (Module handle)
Definition: IfxDma_Dma.h:460
IfxDma_Dma_setChannelDestinationAddress
IFX_INLINE void IfxDma_Dma_setChannelDestinationAddress(IfxDma_Dma_Channel *channel, uint32 address)
Re-initialize the destination address after a transaction.
Definition: IfxDma_Dma.h:747
IfxDma_Dma_ChannelConfig::transactionRequestLostInterruptEnabled
boolean transactionRequestLostInterruptEnabled
Enables/Disables the channel transaction request lost interrupt.
Definition: IfxDma_Dma.h:513
IfxDma_Dma_ChannelConfig::wrapDestinationInterruptEnabled
boolean wrapDestinationInterruptEnabled
An interrupt should be triggered whenever destination address is wrapped.
Definition: IfxDma_Dma.h:509
IfxDma_setChannelTransferCount
IFX_INLINE void IfxDma_setChannelTransferCount(Ifx_DMA *dma, IfxDma_ChannelId channelId, uint32 transferCount)
Configure the move count of a DMA channel transaction.
Definition: IfxDma.h:1679
IfxCpu.h
CPU basic functionality.
IfxDma_Dma_ChannelConfig::operationMode
IfxDma_ChannelOperationMode operationMode
keep enable/disable the hardware channel request after a transaction
Definition: IfxDma_Dma.h:492
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxDma_Dma_ChannelConfig
Configuration data structure of the channel.
Definition: IfxDma_Dma.h:480
IfxDma_Dma_getAndClearChannelInterrupt
IFX_INLINE boolean IfxDma_Dma_getAndClearChannelInterrupt(IfxDma_Dma_Channel *channel)
Return and clear a channel transfer interrupt flag The flag is automatically cleared with the call to...
Definition: IfxDma_Dma.h:723
IfxDma_clearChannelInterrupt
IFX_INLINE void IfxDma_clearChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Clear a channel transfer interrupt flag.
Definition: IfxDma.h:1276
IfxDma_Dma_initChannel
IFX_EXTERN void IfxDma_Dma_initChannel(IfxDma_Dma_Channel *channel, const IfxDma_Dma_ChannelConfig *config)
initialize the DMA channel
Definition: IfxDma_Dma.c:147
IfxDma_ChannelIncrementCircular
IfxDma_ChannelIncrementCircular
DMA circular buffer (wrap around) definition Definition in Ifx_DMA.CH[64].ADICR.B.CBLS and Ifx_DMA.CH[64].ADICR.B.CBLD.
Definition: IfxDma.h:101
IfxDma_Dma_ChannelConfig::shadowAddress
uint32 shadowAddress
Initial content of shadow address for the DMA channel.
Definition: IfxDma_Dma.h:486
IfxDma_setChannelDestinationAddress
IFX_INLINE void IfxDma_setChannelDestinationAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId, void *address)
Configure the destination address.
Definition: IfxDma.h:1597
IfxDma_Dma_ChannelConfig::shadowControl
IfxDma_ChannelShadow shadowControl
selects the shadow transfer mode
Definition: IfxDma_Dma.h:504
IfxDma_Dma_ChannelConfig::destinationAddress
uint32 destinationAddress
Destination address for the DMA channel.
Definition: IfxDma_Dma.h:485
IfxDma_Dma_ChannelConfig::requestMode
IfxDma_ChannelRequestMode requestMode
A service request initiates a single transfer, or the complete transaction.
Definition: IfxDma_Dma.h:491
IfxDma_Dma_ChannelConfig::destinationAddressCircularRange
IfxDma_ChannelIncrementCircular destinationAddressCircularRange
Determines which part of the destination address remains unchanged and therby not updated after each ...
Definition: IfxDma_Dma.h:503
IfxDma_ChannelMoveSize
IfxDma_ChannelMoveSize
DMA move size definition Definition in Ifx_DMA.ME0.CHCR.B.CHDW and Ifx_DMA.ME1.CHCR.B.CHDW.
Definition: IfxDma.h:172
IfxDma_Dma_ChannelConfig::destinationAddressIncrementDirection
IfxDma_ChannelIncrementDirection destinationAddressIncrementDirection
Decides whether the destination address offset after each move should be added or decremented from th...
Definition: IfxDma_Dma.h:502
IfxDma_Dma_getSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxDma_Dma_getSrcPointer(IfxDma_Dma_Channel *channel)
Returns the SRC pointer for given DMA channel.
Definition: IfxDma_Dma.h:735
IfxDma_Dma_startChannelTransaction
IFX_INLINE void IfxDma_Dma_startChannelTransaction(IfxDma_Dma_Channel *channel)
initiate the DMA move transaction
Definition: IfxDma_Dma.h:765
IfxDma_ChannelOperationMode
IfxDma_ChannelOperationMode
DMA operation mode Definition in Ifx_DMA.ME0.CHCR.B.CHMODE and Ifx_DMA.ME1.CHCR.B.CHMODE.
Definition: IfxDma.h:185
IfxDma_Dma_ChannelConfig::requestSource
IfxDma_ChannelRequestSource requestSource
Request of channel transfer through hardware or daisy chain. channel transfer complete interrupt of p...
Definition: IfxDma_Dma.h:495
IfxDma_Dma_ChannelConfig::channelInterruptEnabled
boolean channelInterruptEnabled
The channel transfer interrupt should be triggered. See also channelInterruptControl.
Definition: IfxDma_Dma.h:510
IfxDma_Dma_Channel
Channel handle.
Definition: IfxDma_Dma.h:471
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxDma_Dma_ChannelConfig::module
IfxDma_Dma * module
Specifies pointer to the IfxDma_Dma module handle.
Definition: IfxDma_Dma.h:482
IfxDma_Dma_ChannelConfig::channelInterruptControl
IfxDma_ChannelInterruptControl channelInterruptControl
The channel transfer interrupt can either be triggered depending on the interruptRaiseThreshold, or each time the transaction count is decremented.
Definition: IfxDma_Dma.h:511
IfxDma_Dma_ChannelConfig::channelInterruptTypeOfService
IfxSrc_Tos channelInterruptTypeOfService
Interrupt service provider.
Definition: IfxDma_Dma.h:515
IfxDma_Dma_ChannelConfig::busPriority
IfxDma_ChannelBusPriority busPriority
Bus priority selection.
Definition: IfxDma_Dma.h:496
IfxDma_ChannelIncrementStep
IfxDma_ChannelIncrementStep
DMA incrementation definition Definition in Ifx_DMA.CH[64].ADICR.B.SMF.
Definition: IfxDma.h:133


iLLD_TC38A: IfxDma_cfg.c Source File

  • _Impl
IfxDma_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxDma_cfg.c
3 * \brief DMA on-chip implementation data
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxDma_cfg.h"
IfxDma_cfg.h
DMA on-chip implementation data.


iLLD_TC38A: IfxDma_cfg.h Source File

  • _Impl
IfxDma_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxDma_cfg.h
3 * \brief DMA on-chip implementation data
4 * \ingroup IfxLld_Dma
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Dma DMA
42 * \ingroup IfxLld
43 * \defgroup IfxLld_Dma_Impl Implementation
44 * \ingroup IfxLld_Dma
45 * \defgroup IfxLld_Dma_Std Standard Driver
46 * \ingroup IfxLld_Dma
47 */
48
49 #ifndef IFXDMA_CFG_H
50 #define IFXDMA_CFG_H 1
51
52 /******************************************************************************/
53 /*----------------------------------Includes----------------------------------*/
54 /******************************************************************************/
55
56 #include "Cpu/Std/Ifx_Types.h"
57
58 /******************************************************************************/
59 /*-----------------------------------Macros-----------------------------------*/
60 /******************************************************************************/
61
62 /** \brief Number of channels
63 */
64 #define IFXDMA_NUM_CHANNELS 128
65
66 /** \brief Error mask for move engine source error
67 */
68 #define IFXDMA_ERROR_S (IFX_DMA_ME_CLRE_CSER_MSK << IFX_DMA_ME_CLRE_CSER_OFF)
69
70 /** \brief Error mask for move engine destination error
71 */
72 #define IFXDMA_ERROR_D (IFX_DMA_ME_CLRE_CDER_MSK << IFX_DMA_ME_CLRE_CDER_OFF)
73
74 /** \brief Error mask for bus error on SPB
75 */
76 #define IFXDMA_ERROR_SPB (IFX_DMA_ME_CLRE_CSPBER_MSK << IFX_DMA_ME_CLRE_CSPBER_OFF)
77
78 /** \brief Error mask for bus error on SRI
79 */
80 #define IFXDMA_ERROR_SRI (IFX_DMA_ME_CLRE_CSRIER_MSK << IFX_DMA_ME_CLRE_CSRIER_OFF)
81
82 /** \brief Error mask for RAM error
83 */
84 #define IFXDMA_ERROR_RAM (IFX_DMA_ME_CLRE_CRAMER_MSK << IFX_DMA_ME_CLRE_CRAMER_OFF)
85
86 /** \brief Error mask for SLL (safe linked list CRC checksum) error
87 */
88 #define IFXDMA_ERROR_SLL (IFX_DMA_ME_CLRE_CSLLER_MSK << IFX_DMA_ME_CLRE_CSLLER_OFF)
89
90 /** \brief Error mask for DLL (failed linked list load) error
91 */
92 #define IFXDMA_ERROR_DLL (IFX_DMA_ME_CLRE_CDLLER_MSK << IFX_DMA_ME_CLRE_CDLLER_OFF)
93
94 #define IFXDMA_NUM_MODULES (1)
95
96 /******************************************************************************/
97 /*-------------------------------Enumerations---------------------------------*/
98 /******************************************************************************/
99
100 /** \brief DMA channel resources definition
101 */
102 typedef enum
103 {
104 IfxDma_ChannelId_none = -1, /**< \brief None of the Ifx_DMA Channels */
105 IfxDma_ChannelId_0 = 0, /**< \brief Ifx_DMA Channel 0 */
106 IfxDma_ChannelId_1, /**< \brief Ifx_DMA Channel 1 */
107 IfxDma_ChannelId_2, /**< \brief Ifx_DMA Channel 2 */
108 IfxDma_ChannelId_3, /**< \brief Ifx_DMA Channel 3 */
109 IfxDma_ChannelId_4, /**< \brief Ifx_DMA Channel 4 */
110 IfxDma_ChannelId_5, /**< \brief Ifx_DMA Channel 5 */
111 IfxDma_ChannelId_6, /**< \brief Ifx_DMA Channel 6 */
112 IfxDma_ChannelId_7, /**< \brief Ifx_DMA Channel 7 */
113 IfxDma_ChannelId_8, /**< \brief Ifx_DMA Channel 8 */
114 IfxDma_ChannelId_9, /**< \brief Ifx_DMA Channel 9 */
115 IfxDma_ChannelId_10, /**< \brief Ifx_DMA Channel 10 */
116 IfxDma_ChannelId_11, /**< \brief Ifx_DMA Channel 11 */
117 IfxDma_ChannelId_12, /**< \brief Ifx_DMA Channel 12 */
118 IfxDma_ChannelId_13, /**< \brief Ifx_DMA Channel 13 */
119 IfxDma_ChannelId_14, /**< \brief Ifx_DMA Channel 14 */
120 IfxDma_ChannelId_15, /**< \brief Ifx_DMA Channel 15 */
121 IfxDma_ChannelId_16, /**< \brief Ifx_DMA Channel 16 */
122 IfxDma_ChannelId_17, /**< \brief Ifx_DMA Channel 17 */
123 IfxDma_ChannelId_18, /**< \brief Ifx_DMA Channel 18 */
124 IfxDma_ChannelId_19, /**< \brief Ifx_DMA Channel 19 */
125 IfxDma_ChannelId_20, /**< \brief Ifx_DMA Channel 20 */
126 IfxDma_ChannelId_21, /**< \brief Ifx_DMA Channel 21 */
127 IfxDma_ChannelId_22, /**< \brief Ifx_DMA Channel 22 */
128 IfxDma_ChannelId_23, /**< \brief Ifx_DMA Channel 23 */
129 IfxDma_ChannelId_24, /**< \brief Ifx_DMA Channel 24 */
130 IfxDma_ChannelId_25, /**< \brief Ifx_DMA Channel 25 */
131 IfxDma_ChannelId_26, /**< \brief Ifx_DMA Channel 26 */
132 IfxDma_ChannelId_27, /**< \brief Ifx_DMA Channel 27 */
133 IfxDma_ChannelId_28, /**< \brief Ifx_DMA Channel 28 */
134 IfxDma_ChannelId_29, /**< \brief Ifx_DMA Channel 29 */
135 IfxDma_ChannelId_30, /**< \brief Ifx_DMA Channel 30 */
136 IfxDma_ChannelId_31, /**< \brief Ifx_DMA Channel 31 */
137 IfxDma_ChannelId_32, /**< \brief Ifx_DMA Channel 32 */
138 IfxDma_ChannelId_33, /**< \brief Ifx_DMA Channel 33 */
139 IfxDma_ChannelId_34, /**< \brief Ifx_DMA Channel 34 */
140 IfxDma_ChannelId_35, /**< \brief Ifx_DMA Channel 35 */
141 IfxDma_ChannelId_36, /**< \brief Ifx_DMA Channel 36 */
142 IfxDma_ChannelId_37, /**< \brief Ifx_DMA Channel 37 */
143 IfxDma_ChannelId_38, /**< \brief Ifx_DMA Channel 38 */
144 IfxDma_ChannelId_39, /**< \brief Ifx_DMA Channel 39 */
145 IfxDma_ChannelId_40, /**< \brief Ifx_DMA Channel 40 */
146 IfxDma_ChannelId_41, /**< \brief Ifx_DMA Channel 41 */
147 IfxDma_ChannelId_42, /**< \brief Ifx_DMA Channel 42 */
148 IfxDma_ChannelId_43, /**< \brief Ifx_DMA Channel 43 */
149 IfxDma_ChannelId_44, /**< \brief Ifx_DMA Channel 44 */
150 IfxDma_ChannelId_45, /**< \brief Ifx_DMA Channel 45 */
151 IfxDma_ChannelId_46, /**< \brief Ifx_DMA Channel 46 */
152 IfxDma_ChannelId_47, /**< \brief Ifx_DMA Channel 47 */
153 IfxDma_ChannelId_48, /**< \brief Ifx_DMA Channel 48 */
154 IfxDma_ChannelId_49, /**< \brief Ifx_DMA Channel 49 */
155 IfxDma_ChannelId_50, /**< \brief Ifx_DMA Channel 50 */
156 IfxDma_ChannelId_51, /**< \brief Ifx_DMA Channel 51 */
157 IfxDma_ChannelId_52, /**< \brief Ifx_DMA Channel 52 */
158 IfxDma_ChannelId_53, /**< \brief Ifx_DMA Channel 53 */
159 IfxDma_ChannelId_54, /**< \brief Ifx_DMA Channel 54 */
160 IfxDma_ChannelId_55, /**< \brief Ifx_DMA Channel 55 */
161 IfxDma_ChannelId_56, /**< \brief Ifx_DMA Channel 56 */
162 IfxDma_ChannelId_57, /**< \brief Ifx_DMA Channel 57 */
163 IfxDma_ChannelId_58, /**< \brief Ifx_DMA Channel 58 */
164 IfxDma_ChannelId_59, /**< \brief Ifx_DMA Channel 59 */
165 IfxDma_ChannelId_60, /**< \brief Ifx_DMA Channel 60 */
166 IfxDma_ChannelId_61, /**< \brief Ifx_DMA Channel 61 */
167 IfxDma_ChannelId_62, /**< \brief Ifx_DMA Channel 62 */
168 IfxDma_ChannelId_63, /**< \brief Ifx_DMA Channel 63 */
169 IfxDma_ChannelId_64, /**< \brief Ifx_DMA Channel 64 */
170 IfxDma_ChannelId_65, /**< \brief Ifx_DMA Channel 65 */
171 IfxDma_ChannelId_66, /**< \brief Ifx_DMA Channel 66 */
172 IfxDma_ChannelId_67, /**< \brief Ifx_DMA Channel 67 */
173 IfxDma_ChannelId_68, /**< \brief Ifx_DMA Channel 68 */
174 IfxDma_ChannelId_69, /**< \brief Ifx_DMA Channel 69 */
175 IfxDma_ChannelId_70, /**< \brief Ifx_DMA Channel 70 */
176 IfxDma_ChannelId_71, /**< \brief Ifx_DMA Channel 71 */
177 IfxDma_ChannelId_72, /**< \brief Ifx_DMA Channel 72 */
178 IfxDma_ChannelId_73, /**< \brief Ifx_DMA Channel 73 */
179 IfxDma_ChannelId_74, /**< \brief Ifx_DMA Channel 74 */
180 IfxDma_ChannelId_75, /**< \brief Ifx_DMA Channel 75 */
181 IfxDma_ChannelId_76, /**< \brief Ifx_DMA Channel 76 */
182 IfxDma_ChannelId_77, /**< \brief Ifx_DMA Channel 77 */
183 IfxDma_ChannelId_78, /**< \brief Ifx_DMA Channel 78 */
184 IfxDma_ChannelId_79, /**< \brief Ifx_DMA Channel 79 */
185 IfxDma_ChannelId_80, /**< \brief Ifx_DMA Channel 80 */
186 IfxDma_ChannelId_81, /**< \brief Ifx_DMA Channel 81 */
187 IfxDma_ChannelId_82, /**< \brief Ifx_DMA Channel 82 */
188 IfxDma_ChannelId_83, /**< \brief Ifx_DMA Channel 83 */
189 IfxDma_ChannelId_84, /**< \brief Ifx_DMA Channel 84 */
190 IfxDma_ChannelId_85, /**< \brief Ifx_DMA Channel 85 */
191 IfxDma_ChannelId_86, /**< \brief Ifx_DMA Channel 86 */
192 IfxDma_ChannelId_87, /**< \brief Ifx_DMA Channel 87 */
193 IfxDma_ChannelId_88, /**< \brief Ifx_DMA Channel 88 */
194 IfxDma_ChannelId_89, /**< \brief Ifx_DMA Channel 89 */
195 IfxDma_ChannelId_90, /**< \brief Ifx_DMA Channel 90 */
196 IfxDma_ChannelId_91, /**< \brief Ifx_DMA Channel 91 */
197 IfxDma_ChannelId_92, /**< \brief Ifx_DMA Channel 92 */
198 IfxDma_ChannelId_93, /**< \brief Ifx_DMA Channel 93 */
199 IfxDma_ChannelId_94, /**< \brief Ifx_DMA Channel 94 */
200 IfxDma_ChannelId_95, /**< \brief Ifx_DMA Channel 95 */
201 IfxDma_ChannelId_96, /**< \brief Ifx_DMA Channel 96 */
202 IfxDma_ChannelId_97, /**< \brief Ifx_DMA Channel 97 */
203 IfxDma_ChannelId_98, /**< \brief Ifx_DMA Channel 98 */
204 IfxDma_ChannelId_99, /**< \brief Ifx_DMA Channel 99 */
205 IfxDma_ChannelId_100, /**< \brief Ifx_DMA Channel 100 */
206 IfxDma_ChannelId_101, /**< \brief Ifx_DMA Channel 101 */
207 IfxDma_ChannelId_102, /**< \brief Ifx_DMA Channel 102 */
208 IfxDma_ChannelId_103, /**< \brief Ifx_DMA Channel 103 */
209 IfxDma_ChannelId_104, /**< \brief Ifx_DMA Channel 104 */
210 IfxDma_ChannelId_105, /**< \brief Ifx_DMA Channel 105 */
211 IfxDma_ChannelId_106, /**< \brief Ifx_DMA Channel 106 */
212 IfxDma_ChannelId_107, /**< \brief Ifx_DMA Channel 107 */
213 IfxDma_ChannelId_108, /**< \brief Ifx_DMA Channel 108 */
214 IfxDma_ChannelId_109, /**< \brief Ifx_DMA Channel 109 */
215 IfxDma_ChannelId_110, /**< \brief Ifx_DMA Channel 110 */
216 IfxDma_ChannelId_111, /**< \brief Ifx_DMA Channel 111 */
217 IfxDma_ChannelId_112, /**< \brief Ifx_DMA Channel 112 */
218 IfxDma_ChannelId_113, /**< \brief Ifx_DMA Channel 113 */
219 IfxDma_ChannelId_114, /**< \brief Ifx_DMA Channel 114 */
220 IfxDma_ChannelId_115, /**< \brief Ifx_DMA Channel 115 */
221 IfxDma_ChannelId_116, /**< \brief Ifx_DMA Channel 116 */
222 IfxDma_ChannelId_117, /**< \brief Ifx_DMA Channel 117 */
223 IfxDma_ChannelId_118, /**< \brief Ifx_DMA Channel 118 */
224 IfxDma_ChannelId_119, /**< \brief Ifx_DMA Channel 119 */
225 IfxDma_ChannelId_120, /**< \brief Ifx_DMA Channel 120 */
226 IfxDma_ChannelId_121, /**< \brief Ifx_DMA Channel 121 */
227 IfxDma_ChannelId_122, /**< \brief Ifx_DMA Channel 122 */
228 IfxDma_ChannelId_123, /**< \brief Ifx_DMA Channel 123 */
229 IfxDma_ChannelId_124, /**< \brief Ifx_DMA Channel 124 */
230 IfxDma_ChannelId_125, /**< \brief Ifx_DMA Channel 125 */
231 IfxDma_ChannelId_126, /**< \brief Ifx_DMA Channel 126 */
232 IfxDma_ChannelId_127 /**< \brief Ifx_DMA Channel 127 */
233 } IfxDma_ChannelId;
234
235 #endif /* IFXDMA_CFG_H */
IfxDma_ChannelId_108
Ifx_DMA Channel 108.
Definition: IfxDma_cfg.h:213
IfxDma_ChannelId_98
Ifx_DMA Channel 98.
Definition: IfxDma_cfg.h:203
IfxDma_ChannelId_120
Ifx_DMA Channel 120.
Definition: IfxDma_cfg.h:225
IfxDma_ChannelId
IfxDma_ChannelId
DMA channel resources definition.
Definition: IfxDma_cfg.h:102
IfxDma_ChannelId_5
Ifx_DMA Channel 5.
Definition: IfxDma_cfg.h:110
IfxDma_ChannelId_47
Ifx_DMA Channel 47.
Definition: IfxDma_cfg.h:152
IfxDma_ChannelId_60
Ifx_DMA Channel 60.
Definition: IfxDma_cfg.h:165
IfxDma_ChannelId_1
Ifx_DMA Channel 1.
Definition: IfxDma_cfg.h:106
IfxDma_ChannelId_29
Ifx_DMA Channel 29.
Definition: IfxDma_cfg.h:134
IfxDma_ChannelId_73
Ifx_DMA Channel 73.
Definition: IfxDma_cfg.h:178
IfxDma_ChannelId_64
Ifx_DMA Channel 64.
Definition: IfxDma_cfg.h:169
IfxDma_ChannelId_88
Ifx_DMA Channel 88.
Definition: IfxDma_cfg.h:193
IfxDma_ChannelId_10
Ifx_DMA Channel 10.
Definition: IfxDma_cfg.h:115
IfxDma_ChannelId_3
Ifx_DMA Channel 3.
Definition: IfxDma_cfg.h:108
IfxDma_ChannelId_117
Ifx_DMA Channel 117.
Definition: IfxDma_cfg.h:222
IfxDma_ChannelId_90
Ifx_DMA Channel 90.
Definition: IfxDma_cfg.h:195
IfxDma_ChannelId_62
Ifx_DMA Channel 62.
Definition: IfxDma_cfg.h:167
IfxDma_ChannelId_85
Ifx_DMA Channel 85.
Definition: IfxDma_cfg.h:190
IfxDma_ChannelId_43
Ifx_DMA Channel 43.
Definition: IfxDma_cfg.h:148
IfxDma_ChannelId_56
Ifx_DMA Channel 56.
Definition: IfxDma_cfg.h:161
IfxDma_ChannelId_84
Ifx_DMA Channel 84.
Definition: IfxDma_cfg.h:189
IfxDma_ChannelId_114
Ifx_DMA Channel 114.
Definition: IfxDma_cfg.h:219
IfxDma_ChannelId_45
Ifx_DMA Channel 45.
Definition: IfxDma_cfg.h:150
IfxDma_ChannelId_13
Ifx_DMA Channel 13.
Definition: IfxDma_cfg.h:118
IfxDma_ChannelId_100
Ifx_DMA Channel 100.
Definition: IfxDma_cfg.h:205
IfxDma_ChannelId_70
Ifx_DMA Channel 70.
Definition: IfxDma_cfg.h:175
IfxDma_ChannelId_96
Ifx_DMA Channel 96.
Definition: IfxDma_cfg.h:201
IfxDma_ChannelId_24
Ifx_DMA Channel 24.
Definition: IfxDma_cfg.h:129
IfxDma_ChannelId_105
Ifx_DMA Channel 105.
Definition: IfxDma_cfg.h:210
IfxDma_ChannelId_109
Ifx_DMA Channel 109.
Definition: IfxDma_cfg.h:214
IfxDma_ChannelId_101
Ifx_DMA Channel 101.
Definition: IfxDma_cfg.h:206
IfxDma_ChannelId_68
Ifx_DMA Channel 68.
Definition: IfxDma_cfg.h:173
IfxDma_ChannelId_94
Ifx_DMA Channel 94.
Definition: IfxDma_cfg.h:199
IfxDma_ChannelId_118
Ifx_DMA Channel 118.
Definition: IfxDma_cfg.h:223
IfxDma_ChannelId_116
Ifx_DMA Channel 116.
Definition: IfxDma_cfg.h:221
IfxDma_ChannelId_83
Ifx_DMA Channel 83.
Definition: IfxDma_cfg.h:188
IfxDma_ChannelId_26
Ifx_DMA Channel 26.
Definition: IfxDma_cfg.h:131
IfxDma_ChannelId_42
Ifx_DMA Channel 42.
Definition: IfxDma_cfg.h:147
IfxDma_ChannelId_97
Ifx_DMA Channel 97.
Definition: IfxDma_cfg.h:202
IfxDma_ChannelId_59
Ifx_DMA Channel 59.
Definition: IfxDma_cfg.h:164
IfxDma_ChannelId_77
Ifx_DMA Channel 77.
Definition: IfxDma_cfg.h:182
IfxDma_ChannelId_78
Ifx_DMA Channel 78.
Definition: IfxDma_cfg.h:183
IfxDma_ChannelId_119
Ifx_DMA Channel 119.
Definition: IfxDma_cfg.h:224
IfxDma_ChannelId_21
Ifx_DMA Channel 21.
Definition: IfxDma_cfg.h:126
IfxDma_ChannelId_76
Ifx_DMA Channel 76.
Definition: IfxDma_cfg.h:181
IfxDma_ChannelId_41
Ifx_DMA Channel 41.
Definition: IfxDma_cfg.h:146
IfxDma_ChannelId_127
Ifx_DMA Channel 127.
Definition: IfxDma_cfg.h:232
IfxDma_ChannelId_95
Ifx_DMA Channel 95.
Definition: IfxDma_cfg.h:200
IfxDma_ChannelId_40
Ifx_DMA Channel 40.
Definition: IfxDma_cfg.h:145
IfxDma_ChannelId_111
Ifx_DMA Channel 111.
Definition: IfxDma_cfg.h:216
IfxDma_ChannelId_30
Ifx_DMA Channel 30.
Definition: IfxDma_cfg.h:135
IfxDma_ChannelId_6
Ifx_DMA Channel 6.
Definition: IfxDma_cfg.h:111
IfxDma_ChannelId_44
Ifx_DMA Channel 44.
Definition: IfxDma_cfg.h:149
IfxDma_ChannelId_66
Ifx_DMA Channel 66.
Definition: IfxDma_cfg.h:171
IfxDma_ChannelId_91
Ifx_DMA Channel 91.
Definition: IfxDma_cfg.h:196
IfxDma_ChannelId_124
Ifx_DMA Channel 124.
Definition: IfxDma_cfg.h:229
IfxDma_ChannelId_7
Ifx_DMA Channel 7.
Definition: IfxDma_cfg.h:112
IfxDma_ChannelId_16
Ifx_DMA Channel 16.
Definition: IfxDma_cfg.h:121
IfxDma_ChannelId_125
Ifx_DMA Channel 125.
Definition: IfxDma_cfg.h:230
IfxDma_ChannelId_22
Ifx_DMA Channel 22.
Definition: IfxDma_cfg.h:127
IfxDma_ChannelId_106
Ifx_DMA Channel 106.
Definition: IfxDma_cfg.h:211
IfxDma_ChannelId_49
Ifx_DMA Channel 49.
Definition: IfxDma_cfg.h:154
IfxDma_ChannelId_87
Ifx_DMA Channel 87.
Definition: IfxDma_cfg.h:192
IfxDma_ChannelId_72
Ifx_DMA Channel 72.
Definition: IfxDma_cfg.h:177
IfxDma_ChannelId_104
Ifx_DMA Channel 104.
Definition: IfxDma_cfg.h:209
IfxDma_ChannelId_69
Ifx_DMA Channel 69.
Definition: IfxDma_cfg.h:174
IfxDma_ChannelId_28
Ifx_DMA Channel 28.
Definition: IfxDma_cfg.h:133
IfxDma_ChannelId_33
Ifx_DMA Channel 33.
Definition: IfxDma_cfg.h:138
IfxDma_ChannelId_86
Ifx_DMA Channel 86.
Definition: IfxDma_cfg.h:191
IfxDma_ChannelId_31
Ifx_DMA Channel 31.
Definition: IfxDma_cfg.h:136
IfxDma_ChannelId_37
Ifx_DMA Channel 37.
Definition: IfxDma_cfg.h:142
IfxDma_ChannelId_113
Ifx_DMA Channel 113.
Definition: IfxDma_cfg.h:218
IfxDma_ChannelId_48
Ifx_DMA Channel 48.
Definition: IfxDma_cfg.h:153
IfxDma_ChannelId_107
Ifx_DMA Channel 107.
Definition: IfxDma_cfg.h:212
IfxDma_ChannelId_67
Ifx_DMA Channel 67.
Definition: IfxDma_cfg.h:172
IfxDma_ChannelId_32
Ifx_DMA Channel 32.
Definition: IfxDma_cfg.h:137
IfxDma_ChannelId_46
Ifx_DMA Channel 46.
Definition: IfxDma_cfg.h:151
IfxDma_ChannelId_2
Ifx_DMA Channel 2.
Definition: IfxDma_cfg.h:107
IfxDma_ChannelId_58
Ifx_DMA Channel 58.
Definition: IfxDma_cfg.h:163
IfxDma_ChannelId_122
Ifx_DMA Channel 122.
Definition: IfxDma_cfg.h:227
IfxDma_ChannelId_15
Ifx_DMA Channel 15.
Definition: IfxDma_cfg.h:120
IfxDma_ChannelId_0
Ifx_DMA Channel 0.
Definition: IfxDma_cfg.h:105
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxDma_ChannelId_75
Ifx_DMA Channel 75.
Definition: IfxDma_cfg.h:180
IfxDma_ChannelId_93
Ifx_DMA Channel 93.
Definition: IfxDma_cfg.h:198
IfxDma_ChannelId_79
Ifx_DMA Channel 79.
Definition: IfxDma_cfg.h:184
IfxDma_ChannelId_27
Ifx_DMA Channel 27.
Definition: IfxDma_cfg.h:132
IfxDma_ChannelId_34
Ifx_DMA Channel 34.
Definition: IfxDma_cfg.h:139
IfxDma_ChannelId_81
Ifx_DMA Channel 81.
Definition: IfxDma_cfg.h:186
IfxDma_ChannelId_18
Ifx_DMA Channel 18.
Definition: IfxDma_cfg.h:123
IfxDma_ChannelId_92
Ifx_DMA Channel 92.
Definition: IfxDma_cfg.h:197
IfxDma_ChannelId_4
Ifx_DMA Channel 4.
Definition: IfxDma_cfg.h:109
IfxDma_ChannelId_39
Ifx_DMA Channel 39.
Definition: IfxDma_cfg.h:144
IfxDma_ChannelId_65
Ifx_DMA Channel 65.
Definition: IfxDma_cfg.h:170
IfxDma_ChannelId_12
Ifx_DMA Channel 12.
Definition: IfxDma_cfg.h:117
IfxDma_ChannelId_11
Ifx_DMA Channel 11.
Definition: IfxDma_cfg.h:116
IfxDma_ChannelId_110
Ifx_DMA Channel 110.
Definition: IfxDma_cfg.h:215
IfxDma_ChannelId_112
Ifx_DMA Channel 112.
Definition: IfxDma_cfg.h:217
IfxDma_ChannelId_14
Ifx_DMA Channel 14.
Definition: IfxDma_cfg.h:119
IfxDma_ChannelId_71
Ifx_DMA Channel 71.
Definition: IfxDma_cfg.h:176
IfxDma_ChannelId_53
Ifx_DMA Channel 53.
Definition: IfxDma_cfg.h:158
IfxDma_ChannelId_36
Ifx_DMA Channel 36.
Definition: IfxDma_cfg.h:141
IfxDma_ChannelId_80
Ifx_DMA Channel 80.
Definition: IfxDma_cfg.h:185
IfxDma_ChannelId_17
Ifx_DMA Channel 17.
Definition: IfxDma_cfg.h:122
IfxDma_ChannelId_50
Ifx_DMA Channel 50.
Definition: IfxDma_cfg.h:155
IfxDma_ChannelId_74
Ifx_DMA Channel 74.
Definition: IfxDma_cfg.h:179
IfxDma_ChannelId_8
Ifx_DMA Channel 8.
Definition: IfxDma_cfg.h:113
IfxDma_ChannelId_63
Ifx_DMA Channel 63.
Definition: IfxDma_cfg.h:168
IfxDma_ChannelId_52
Ifx_DMA Channel 52.
Definition: IfxDma_cfg.h:157
IfxDma_ChannelId_102
Ifx_DMA Channel 102.
Definition: IfxDma_cfg.h:207
IfxDma_ChannelId_23
Ifx_DMA Channel 23.
Definition: IfxDma_cfg.h:128
IfxDma_ChannelId_20
Ifx_DMA Channel 20.
Definition: IfxDma_cfg.h:125
IfxDma_ChannelId_none
None of the Ifx_DMA Channels.
Definition: IfxDma_cfg.h:104
IfxDma_ChannelId_9
Ifx_DMA Channel 9.
Definition: IfxDma_cfg.h:114
IfxDma_ChannelId_19
Ifx_DMA Channel 19.
Definition: IfxDma_cfg.h:124
IfxDma_ChannelId_121
Ifx_DMA Channel 121.
Definition: IfxDma_cfg.h:226
IfxDma_ChannelId_89
Ifx_DMA Channel 89.
Definition: IfxDma_cfg.h:194
IfxDma_ChannelId_115
Ifx_DMA Channel 115.
Definition: IfxDma_cfg.h:220
IfxDma_ChannelId_126
Ifx_DMA Channel 126.
Definition: IfxDma_cfg.h:231
IfxDma_ChannelId_54
Ifx_DMA Channel 54.
Definition: IfxDma_cfg.h:159
IfxDma_ChannelId_82
Ifx_DMA Channel 82.
Definition: IfxDma_cfg.h:187
IfxDma_ChannelId_35
Ifx_DMA Channel 35.
Definition: IfxDma_cfg.h:140
IfxDma_ChannelId_57
Ifx_DMA Channel 57.
Definition: IfxDma_cfg.h:162
IfxDma_ChannelId_25
Ifx_DMA Channel 25.
Definition: IfxDma_cfg.h:130
IfxDma_ChannelId_103
Ifx_DMA Channel 103.
Definition: IfxDma_cfg.h:208
IfxDma_ChannelId_61
Ifx_DMA Channel 61.
Definition: IfxDma_cfg.h:166
IfxDma_ChannelId_55
Ifx_DMA Channel 55.
Definition: IfxDma_cfg.h:160
IfxDma_ChannelId_38
Ifx_DMA Channel 38.
Definition: IfxDma_cfg.h:143
IfxDma_ChannelId_123
Ifx_DMA Channel 123.
Definition: IfxDma_cfg.h:228
IfxDma_ChannelId_99
Ifx_DMA Channel 99.
Definition: IfxDma_cfg.h:204
IfxDma_ChannelId_51
Ifx_DMA Channel 51.
Definition: IfxDma_cfg.h:156


iLLD_TC38A: IfxDmu_PinMap.c Source File

  • _PinMap
IfxDmu_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxDmu_PinMap.c
3 * \brief DMU I/O map
4 * \ingroup IfxLld_Dmu
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "IfxDmu_PinMap.h"
44
45 IfxDmu_Fdest_In IfxDmu_FDEST_P21_0_IN = {&MODULE_DMU, {&MODULE_P21, 0}, Ifx_RxSel_a};
46
47
48 const IfxDmu_Fdest_In *IfxDmu_Fdest_In_pinTable[IFXDMU_PINMAP_NUM_MODULES][IFXDMU_PINMAP_NUM_0S][IFXDMU_PINMAP_FDEST_IN_NUM_ITEMS] = {
49 {
50 {
51 &IfxDmu_FDEST_P21_0_IN
52 }
53 }
54 };
Ifx_RxSel_a
Definition: Ifx_Types.h:129
IFXDMU_PINMAP_FDEST_IN_NUM_ITEMS
#define IFXDMU_PINMAP_FDEST_IN_NUM_ITEMS
Definition: IfxDmu_PinMap.h:68
IfxDmu_FDEST_P21_0_IN
IfxDmu_Fdest_In IfxDmu_FDEST_P21_0_IN
Definition: IfxDmu_PinMap.c:45
IFXDMU_PINMAP_NUM_MODULES
#define IFXDMU_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxDmu_PinMap.h:66
IfxDmu_Fdest_In
DMU FDEST pin mapping structure.
Definition: IfxDmu_PinMap.h:55
IfxDmu_Fdest_In_pinTable
const IfxDmu_Fdest_In * IfxDmu_Fdest_In_pinTable[IFXDMU_PINMAP_NUM_MODULES][IFXDMU_PINMAP_NUM_0S][IFXDMU_PINMAP_FDEST_IN_NUM_ITEMS]
Definition: IfxDmu_PinMap.c:48
IfxDmu_PinMap.h
DMU I/O map.
IFXDMU_PINMAP_NUM_0S
#define IFXDMU_PINMAP_NUM_0S
Definition: IfxDmu_PinMap.h:67


iLLD_TC38A: IfxDmu_PinMap.h Source File

  • _PinMap
IfxDmu_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxDmu_PinMap.h
3 * \brief DMU I/O map
4 * \ingroup IfxLld_Dmu
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Dmu_pinmap DMU Pin Mapping
42 * \ingroup IfxLld_Dmu
43 */
44
45 #ifndef IFXDMU_PINMAP_H
46 #define IFXDMU_PINMAP_H
47
48 #include <IfxDmu_reg.h>
49 #include <Port/Std/IfxPort.h>
50
51 /** \addtogroup IfxLld_Dmu_pinmap
52 * \{ */
53
54 /** \brief DMU FDEST pin mapping structure */
55 typedef const struct
56 {
57 Ifx_DMU* module; /**< \brief Base address */
58 IfxPort_Pin pin; /**< \brief Port pin */
59 Ifx_RxSel select; /**< \brief Input multiplexer value */
60 } IfxDmu_Fdest_In;
61
62
63 IFX_EXTERN IfxDmu_Fdest_In IfxDmu_FDEST_P21_0_IN; /**< \brief Enter destructive debug mode */
64
65 /** \brief Table dimensions */
66 #define IFXDMU_PINMAP_NUM_MODULES 1
67 #define IFXDMU_PINMAP_NUM_0S 1
68 #define IFXDMU_PINMAP_FDEST_IN_NUM_ITEMS 1
69
70
71 /** \brief IfxDmu_Fdest_In table */
72 IFX_EXTERN const IfxDmu_Fdest_In *IfxDmu_Fdest_In_pinTable[IFXDMU_PINMAP_NUM_MODULES][IFXDMU_PINMAP_NUM_0S][IFXDMU_PINMAP_FDEST_IN_NUM_ITEMS];
73
74 /** \} */
75
76 #endif /* IFXDMU_PINMAP_H */
IfxDmu_Fdest_In::module
Ifx_DMU * module
Base address.
Definition: IfxDmu_PinMap.h:57
IfxDmu_Fdest_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxDmu_PinMap.h:58
IFXDMU_PINMAP_FDEST_IN_NUM_ITEMS
#define IFXDMU_PINMAP_FDEST_IN_NUM_ITEMS
Definition: IfxDmu_PinMap.h:68
IFXDMU_PINMAP_NUM_MODULES
#define IFXDMU_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxDmu_PinMap.h:66
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxDmu_Fdest_In
DMU FDEST pin mapping structure.
Definition: IfxDmu_PinMap.h:55
IfxDmu_Fdest_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxDmu_PinMap.h:59
IfxDmu_Fdest_In_pinTable
IFX_EXTERN const IfxDmu_Fdest_In * IfxDmu_Fdest_In_pinTable[IFXDMU_PINMAP_NUM_MODULES][IFXDMU_PINMAP_NUM_0S][IFXDMU_PINMAP_FDEST_IN_NUM_ITEMS]
IfxDmu_Fdest_In table.
Definition: IfxDmu_PinMap.h:72
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:246
Ifx_RxSel
Ifx_RxSel
input multiplexer definition used in PinMaps
Definition: Ifx_Types.h:127
IfxDmu_FDEST_P21_0_IN
IFX_EXTERN IfxDmu_Fdest_In IfxDmu_FDEST_P21_0_IN
Enter destructive debug mode.
Definition: IfxDmu_PinMap.h:63
IFXDMU_PINMAP_NUM_0S
#define IFXDMU_PINMAP_NUM_0S
Definition: IfxDmu_PinMap.h:67
IfxPort.h
PORT basic functionality.


iLLD_TC38A: IfxDts.c Source File

  • Dts
  • Std
IfxDts.c
Go to the documentation of this file.
1 /**
2 * \file IfxDts.c
3 * \brief DTS basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxDts.h"
IfxDts.h
DTS basic functionality.


iLLD_TC38A: IfxDts.h Source File

  • Dts
  • Std
IfxDts.h
Go to the documentation of this file.
1 /**
2 * \file IfxDts.h
3 * \brief DTS basic functionality
4 * \ingroup IfxLld_Dts
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Dts_Std_Control Control functions
42 * \ingroup IfxLld_Dts_Std
43 * \defgroup IfxLld_Dts_Std_Status Status functions
44 * \ingroup IfxLld_Dts_Std
45 */
46
47 #ifndef IFXDTS_H
48 #define IFXDTS_H 1
49
50 /******************************************************************************/
51 /*----------------------------------Includes----------------------------------*/
52 /******************************************************************************/
53
54 #include "_Impl/IfxDts_cfg.h"
55 #include "IfxPms_reg.h"
56 #include "IfxPms_bf.h"
57 #include "Cpu/Std/IfxCpu_Intrinsics.h"
58 #include "Src/Std/IfxSrc.h"
59 /** \addtogroup IfxLld_Dts_Std_Status
60 * \{ */
61
62 /******************************************************************************/
63 /*-------------------------Inline Function Prototypes-------------------------*/
64 /******************************************************************************/
65
66 /** \brief Gets the Interrupt request source.
67 * \return Address of interrupt request source
68 */
69 IFX_INLINE volatile Ifx_SRC_SRCR *IfxDts_getSrcPointer(void);
70
71 /** \brief Read the temperature measurement result
72 * \return Temperature measurement result
73 */
74 IFX_INLINE uint16 IfxDts_getTemperatureValue(void);
75
76 /** \} */
77
78 /******************************************************************************/
79 /*---------------------Inline Function Implementations------------------------*/
80 /******************************************************************************/
81
82 IFX_INLINE volatile Ifx_SRC_SRCR *IfxDts_getSrcPointer(void)
83 {
84 return &SRC_PMSDTS;
85 }
86
87
88 IFX_INLINE uint16 IfxDts_getTemperatureValue(void)
89 {
90 return (uint16)MODULE_PMS.DTSSTAT.B.RESULT;
91 }
92
93
94 #endif /* IFXDTS_H */
IfxDts_getTemperatureValue
IFX_INLINE uint16 IfxDts_getTemperatureValue(void)
Read the temperature measurement result.
Definition: IfxDts.h:88
IfxSrc.h
SRC basic functionality.
IfxCpu_Intrinsics.h
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxDts_cfg.h
DTS on-chip implementation data.
IfxDts_getSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxDts_getSrcPointer(void)
Gets the Interrupt request source.
Definition: IfxDts.h:82
uint16
unsigned short uint16
Definition: Platform_Types.h:112


iLLD_TC38A: IfxDts_Dts.c Source File

  • Dts
  • Dts
IfxDts_Dts.c
Go to the documentation of this file.
1 /**
2 * \file IfxDts_Dts.c
3 * \brief DTS DTS details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxDts_Dts.h"
47
48 /******************************************************************************/
49 /*-------------------------Function Implementations---------------------------*/
50 /******************************************************************************/
51
52 uint16 IfxDts_Dts_convertFromCelsius(float32 temperatureValue)
53 {
54 sint32 dtsValue = (sint32)(7.505 * (temperatureValue + 273.15));
55
56 if (dtsValue < 0)
57 {
58 dtsValue = 0;
59 }
60 else if (dtsValue > 4095)
61 {
62 dtsValue = 4095;
63 }
64
65 return (uint16)dtsValue;
66 }
67
68
69 float32 IfxDts_Dts_convertToCelsius(uint16 dtsValue)
70 {
71 return (float32)((dtsValue / 7.505) - 273.15);
72 }
73
74
75 void IfxDts_Dts_initModule(const IfxDts_Dts_Config *config)
76 {
77 /* wait for two measurements before enabling the limits */
78 MODULE_PMS.DTSLIM.B.LOWER = 0;
79 MODULE_PMS.DTSLIM.B.UPPER = 4095;
80
81 /* change to the requested limits */
82 MODULE_PMS.DTSLIM.B.LOWER = IfxDts_Dts_convertFromCelsius(config->lowerTemperatureLimit);
83 MODULE_PMS.DTSLIM.B.UPPER = IfxDts_Dts_convertFromCelsius(config->upperTemperatureLimit);
84
85 /* enable DTS IRQ */
86 if (config->isrPriority > 0)
87 {
88 volatile Ifx_SRC_SRCR *src = IfxDts_getSrcPointer();
89 IfxSrc_init(src, config->isrTypeOfService, config->isrPriority);
90 IfxSrc_enable(src);
91 }
92 }
93
94
95 void IfxDts_Dts_initModuleConfig(IfxDts_Dts_Config *config)
96 {
97 config->sensorControlDisabled = FALSE;
98 config->lowerTemperatureLimit = IFXDTS_DEFAULT_TEMPERATURELIMIT_LOW; // Celsius
99 config->upperTemperatureLimit = IFXDTS_DEFAULT_TEMPERATURELIMIT_UPPER; // Celsius
100
101 config->isrTypeOfService = IfxSrc_Tos_cpu0;
102 config->isrPriority = 0;
103 }
IfxDts_Dts_Config::upperTemperatureLimit
float32 upperTemperatureLimit
Specifies the upper temperature limit compared against die temperature in Celsius.
Definition: IfxDts_Dts.h:174
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
float32
float float32
Definition: Platform_Types.h:170
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxDts_Dts_convertToCelsius
float32 IfxDts_Dts_convertToCelsius(uint16 dtsValue)
Converts the measurement value returned from DTS to Celsius.
Definition: IfxDts_Dts.c:69
IfxDts_Dts_Config::isrPriority
uint16 isrPriority
interrupt priority
Definition: IfxDts_Dts.h:177
IfxDts_Dts_Config::lowerTemperatureLimit
float32 lowerTemperatureLimit
Specifies the lower temperature limit compared against die temperature in Celsius.
Definition: IfxDts_Dts.h:171
IfxDts_Dts_Config::isrTypeOfService
IfxSrc_Tos isrTypeOfService
type of interrupt service
Definition: IfxDts_Dts.h:178
IfxDts_Dts_Config::sensorControlDisabled
boolean sensorControlDisabled
MODULE_SCU.DTSCON.SCLK, specifies the control register lock except MODULE_SCU.DTSCON.START.
Definition: IfxDts_Dts.h:170
IFXDTS_DEFAULT_TEMPERATURELIMIT_LOW
#define IFXDTS_DEFAULT_TEMPERATURELIMIT_LOW
Definition: IfxDts_cfg.h:60
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:68
IfxDts_getSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxDts_getSrcPointer(void)
Gets the Interrupt request source.
Definition: IfxDts.h:82
IFXDTS_DEFAULT_TEMPERATURELIMIT_UPPER
#define IFXDTS_DEFAULT_TEMPERATURELIMIT_UPPER
Definition: IfxDts_cfg.h:62
uint16
unsigned short uint16
Definition: Platform_Types.h:112
sint32
long sint32
Definition: Platform_Types.h:134
IfxDts_Dts.h
DTS DTS details.
IfxDts_Dts_convertFromCelsius
uint16 IfxDts_Dts_convertFromCelsius(float32 temperatureValue)
Converts a temperature value in Celsius to DTS value.
Definition: IfxDts_Dts.c:52
IfxDts_Dts_Config
DTS module configuration structure.
Definition: IfxDts_Dts.h:168
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxDts_Dts_initModuleConfig
void IfxDts_Dts_initModuleConfig(IfxDts_Dts_Config *config)
Intialises the module configuration buffer with default configuration.
Definition: IfxDts_Dts.c:95
IfxDts_Dts_initModule
void IfxDts_Dts_initModule(const IfxDts_Dts_Config *config)
Initialise the DTS with supplied configuration.
Definition: IfxDts_Dts.c:75


iLLD_TC38A: IfxDts_Dts.h Source File

  • Dts
  • Dts
IfxDts_Dts.h
Go to the documentation of this file.
1 /**
2 * \file IfxDts_Dts.h
3 * \brief DTS DTS details
4 * \ingroup IfxLld_Dts
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Dts_Dts_Usage How to use the DTS Interface driver?
42 * \ingroup IfxLld_Dts
43 *
44 * DTS gives the die-temperature result which will decoded to standard temperature value. Minimum first two temperature results are to be ignored to get reliable temperature.
45 *
46 * In the following sections it will be described, how to integrate the driver into the application framework.
47 *
48 * \section IfxLld_Dts_Dts_Preparation Preparation
49 * \subsection IfxLld_Dts_Dts_Include Include Files
50 *
51 * Include following header file into your C code:
52 *
53 * \code
54 * #include <Dts/Dts/IfxDts_Dts.h>
55 * \endcode
56 *
57 * \subsection IfxLld_Dts_Dts_Interrupt Interrupt Handler Installation
58 *
59 * See also \ref IfxLld_Cpu_Irq_Usage
60 *
61 * Define priorities for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:
62 * \code
63 * // priorities are normally defined in Ifx_IntPrioDef.h
64 * #define IFX_INTPRIO_DTS 1
65 * \endcode
66 *
67 * Add the interrupt service routine to your C code which should do the error flag handling:
68 * \code
69 * IFX_INTERRUPT(dtsISR, 0, IFX_INTPRIO_DTS)
70 * {
71 * // DTS finished temperature measurement
72 *
73 * uint16 temperatureValue = IfxDts_Dts_getTemperatureValue();
74 * // here we could do something with the value...
75 * }
76 * \endcode
77 *
78 * Finally install the interrupt handler in your initialisation function:
79 * \code
80 * // install interrupt handler
81 * IfxCpu_Irq_installInterruptHandler(&dtsISR, IFX_INTPRIO_DTS);
82 * IfxCpu_enableInterrupts();
83 * \endcode
84 *
85 * \subsection IfxLld_Dts_Dts_Module DTS Module Initialisation
86 *
87 * The module initialisation can be done in the same function:
88 * \code
89 * // Get the default configuration
90 * IfxDts_Dts_Config dtsConfig;
91 * IfxDts_Dts_initModuleConfig(&dtsConfig);
92 *
93 * // Adapt the default configuration if required
94 * dtsConfig.isrPriority = IFX_INTPRIO_DTS;
95 * dtsConfig.isrTypeOfService = IfxCpu_Irq_getTos(IfxCpu_getCoreIndex());
96 * dtsConfig.lowerTemperatureLimit = -35; // SMU alarm if temperature value is below this Celsius value
97 * dtsConfig.upperTemperatureLimit = 150; // SMU alarm if temperature value is above this Celsius value
98 *
99 * // Module initialisation
100 * IfxDts_Dts_initModule(&dtsConfig);
101 * \endcode
102 *
103 * \subsection IfxLld_Dts_Dts_IrqBased IRQ based measurements
104 *
105 * Whenever the interrupt handler is called, a new measurment result is available and could be processed further (e.g. for statistical analysis).
106 *
107 * \code
108 * IFX_INTERRUPT(dtsISR, 0, IFX_INTPRIO_DTS)
109 * {
110 * // DTS finished temperature measurement
111 *
112 * uint16 temperatureValue = IfxDts_Dts_getTemperatureValue();
113 * // here we could do something with the value...
114 * }
115 * \endcode
116 *
117 *
118 * \subsection IfxLld_Dts_Dts_NonIrqBased Measurements without IRQs
119 *
120 * If no interrupt routine should be used, a new measurement result can be requested the following way:
121 *
122 * \code
123 * uint16 temperatureValue = IfxDts_Dts_getTemperatureValue();
124 * \endcode
125 *
126 *
127 * Alternatively (and this is the normal usage), the DTS could be periodically started from a timer routine, e.g. each mS. The conversion itself takes 100 uS maximum.
128 *
129 *
130 * \subsection IfxLld_Dts_Dts_Converted Temperature conversion
131 *
132 * Following function returns the actual temperature in Celsius:
133 *
134 * \code
135 * float32 temperature = IfxDts_Dts_getTemperatureCelsius();
136 * \endcode
137 *
138 * \defgroup IfxLld_Dts_Dts DTS
139 * \ingroup IfxLld_Dts
140 * \defgroup IfxLld_Dts_Dts_Structures Data Structures
141 * \ingroup IfxLld_Dts_Dts
142 * \defgroup IfxLld_Dts_Dts_Module Module Initialisation functions
143 * \ingroup IfxLld_Dts_Dts
144 * \defgroup IfxLld_Dts_Dts_Sensor Sensor Functions
145 * \ingroup IfxLld_Dts_Dts
146 * \defgroup IfxLld_Dts_Dts_Conversion Conversion Functions
147 * \ingroup IfxLld_Dts_Dts
148 */
149
150 #ifndef IFXDTS_DTS_H
151 #define IFXDTS_DTS_H 1
152
153 /******************************************************************************/
154 /*----------------------------------Includes----------------------------------*/
155 /******************************************************************************/
156
157 #include "Dts/Std/IfxDts.h"
158 #include "Cpu/Std/IfxCpu.h"
159
160 /******************************************************************************/
161 /*-----------------------------Data Structures--------------------------------*/
162 /******************************************************************************/
163
164 /** \addtogroup IfxLld_Dts_Dts_Structures
165 * \{ */
166 /** \brief DTS module configuration structure
167 */
168 typedef struct
169 {
170 boolean sensorControlDisabled; /**< \brief MODULE_SCU.DTSCON.SCLK, specifies the control register lock except MODULE_SCU.DTSCON.START. */
171 float32 lowerTemperatureLimit; /**< \brief Specifies the lower temperature limit compared against die temperature in Celsius
172 *
173 * A SMU will be triggered if the measurement result is below this limit */
174 float32 upperTemperatureLimit; /**< \brief Specifies the upper temperature limit compared against die temperature in Celsius.
175 *
176 * A SMU will be triggered if the measurement result is above this limit */
177 uint16 isrPriority; /**< \brief interrupt priority */
178 IfxSrc_Tos isrTypeOfService; /**< \brief type of interrupt service */
179 } IfxDts_Dts_Config;
180
181 /** \} */
182
183 /** \addtogroup IfxLld_Dts_Dts_Module
184 * \{ */
185
186 /******************************************************************************/
187 /*-------------------------Global Function Prototypes-------------------------*/
188 /******************************************************************************/
189
190 /** \brief Initialise the DTS with supplied configuration.
191 * \param config pointer to module configuration structure
192 * \return None
193 *
194 * Usage Example : \ref IfxLld_Dts_Dts_Usage
195 *
196 */
197 IFX_EXTERN void IfxDts_Dts_initModule(const IfxDts_Dts_Config *config);
198
199 /** \brief Intialises the module configuration buffer with default configuration.
200 * \param config pointer to module configuration structure
201 * \return None
202 *
203 * Usage Example : \ref IfxLld_Dts_Dts_Usage
204 *
205 */
206 IFX_EXTERN void IfxDts_Dts_initModuleConfig(IfxDts_Dts_Config *config);
207
208 /** \} */
209
210 /** \addtogroup IfxLld_Dts_Dts_Sensor
211 * \{ */
212
213 /******************************************************************************/
214 /*-------------------------Inline Function Prototypes-------------------------*/
215 /******************************************************************************/
216
217 /** \brief Returns the converted temperature in Celsius
218 * \return The temperature based on the DTS temperature value
219 *
220 * Usage Example : \ref IfxLld_Dts_Dts_Usage
221 *
222 */
223 IFX_INLINE float32 IfxDts_Dts_getTemperatureCelsius(void);
224
225 /** \brief Returns the unconverted temperature measurement result
226 * \return current sensor measured result.
227 *
228 * Usage Example : \ref IfxLld_Dts_Dts_Usage
229 *
230 */
231 IFX_INLINE uint16 IfxDts_Dts_getTemperatureValue(void);
232
233 /** \} */
234
235 /** \addtogroup IfxLld_Dts_Dts_Conversion
236 * \{ */
237
238 /******************************************************************************/
239 /*-------------------------Global Function Prototypes-------------------------*/
240 /******************************************************************************/
241
242 /** \brief Converts a temperature value in Celsius to DTS value
243 * \param temperatureValue the temperature in Celsius
244 * \return the appr. DTS value
245 */
246 IFX_EXTERN uint16 IfxDts_Dts_convertFromCelsius(float32 temperatureValue);
247
248 /** \brief Converts the measurement value returned from DTS to Celsius
249 * \param dtsValue measurement value returned from DTS
250 * \return temperature in Celsius
251 */
252 IFX_EXTERN float32 IfxDts_Dts_convertToCelsius(uint16 dtsValue);
253
254 /** \} */
255
256 /******************************************************************************/
257 /*---------------------Inline Function Implementations------------------------*/
258 /******************************************************************************/
259
260 IFX_INLINE float32 IfxDts_Dts_getTemperatureCelsius(void)
261 {
262 return IfxDts_Dts_convertToCelsius(IfxDts_getTemperatureValue());
263 }
264
265
266 IFX_INLINE uint16 IfxDts_Dts_getTemperatureValue(void)
267 {
268 return (uint16)IfxDts_getTemperatureValue();
269 }
270
271
272 #endif /* IFXDTS_DTS_H */
IfxDts_getTemperatureValue
IFX_INLINE uint16 IfxDts_getTemperatureValue(void)
Read the temperature measurement result.
Definition: IfxDts.h:88
IfxDts_Dts_Config::upperTemperatureLimit
float32 upperTemperatureLimit
Specifies the upper temperature limit compared against die temperature in Celsius.
Definition: IfxDts_Dts.h:174
float32
float float32
Definition: Platform_Types.h:170
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxDts_Dts_convertToCelsius
IFX_EXTERN float32 IfxDts_Dts_convertToCelsius(uint16 dtsValue)
Converts the measurement value returned from DTS to Celsius.
Definition: IfxDts_Dts.c:69
IfxDts_Dts_Config::isrPriority
uint16 isrPriority
interrupt priority
Definition: IfxDts_Dts.h:177
IfxDts_Dts_Config::lowerTemperatureLimit
float32 lowerTemperatureLimit
Specifies the lower temperature limit compared against die temperature in Celsius.
Definition: IfxDts_Dts.h:171
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxDts_Dts_Config::isrTypeOfService
IfxSrc_Tos isrTypeOfService
type of interrupt service
Definition: IfxDts_Dts.h:178
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxDts_Dts_Config::sensorControlDisabled
boolean sensorControlDisabled
MODULE_SCU.DTSCON.SCLK, specifies the control register lock except MODULE_SCU.DTSCON.START.
Definition: IfxDts_Dts.h:170
IfxDts_Dts_getTemperatureValue
IFX_INLINE uint16 IfxDts_Dts_getTemperatureValue(void)
Returns the unconverted temperature measurement result.
Definition: IfxDts_Dts.h:266
IfxDts_Dts_getTemperatureCelsius
IFX_INLINE float32 IfxDts_Dts_getTemperatureCelsius(void)
Returns the converted temperature in Celsius.
Definition: IfxDts_Dts.h:260
IfxCpu.h
CPU basic functionality.
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxDts_Dts_convertFromCelsius
IFX_EXTERN uint16 IfxDts_Dts_convertFromCelsius(float32 temperatureValue)
Converts a temperature value in Celsius to DTS value.
Definition: IfxDts_Dts.c:52
IfxDts_Dts_Config
DTS module configuration structure.
Definition: IfxDts_Dts.h:168
IfxDts.h
DTS basic functionality.
IfxDts_Dts_initModuleConfig
IFX_EXTERN void IfxDts_Dts_initModuleConfig(IfxDts_Dts_Config *config)
Intialises the module configuration buffer with default configuration.
Definition: IfxDts_Dts.c:95
IfxDts_Dts_initModule
IFX_EXTERN void IfxDts_Dts_initModule(const IfxDts_Dts_Config *config)
Initialise the DTS with supplied configuration.
Definition: IfxDts_Dts.c:75


iLLD_TC38A: IfxDts_cfg.h Source File

  • _Impl
IfxDts_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxDts_cfg.h
3 * \brief DTS on-chip implementation data
4 * \ingroup IfxLld_Dts
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Dts DTS
42 * \ingroup IfxLld
43 * \defgroup IfxLld_Dts_Impl Implementation
44 * \ingroup IfxLld_Dts
45 * \defgroup IfxLld_Dts_Std Standard Driver
46 * \ingroup IfxLld_Dts
47 */
48
49 #ifndef IFXDTS_CFG_H
50 #define IFXDTS_CFG_H 1
51
52 /******************************************************************************/
53 /*----------------------------------Includes----------------------------------*/
54 /******************************************************************************/
55
56 /******************************************************************************/
57 /*-----------------------------------Macros-----------------------------------*/
58 /******************************************************************************/
59
60 #define IFXDTS_DEFAULT_TEMPERATURELIMIT_LOW (-40.0)
61
62 #define IFXDTS_DEFAULT_TEMPERATURELIMIT_UPPER (170.0)
63
64 #define IFXDTS_NUM_MODULES (1)
65
66 #endif /* IFXDTS_CFG_H */


iLLD_TC38A: IfxEdsadc.c Source File

  • Edsadc
  • Std
IfxEdsadc.c
Go to the documentation of this file.
1 /**
2 * \file IfxEdsadc.c
3 * \brief EDSADC basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxEdsadc.h"
47
48 /******************************************************************************/
49 /*-------------------------Function Implementations---------------------------*/
50 /******************************************************************************/
51
52 void IfxEdsadc_disableModule(Ifx_EDSADC *edsadc)
53 {
54 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
55 IfxScuWdt_clearCpuEndinit(passwd);
56 edsadc->CLC.B.DISR = 1;
57
58 IfxScuWdt_setCpuEndinit(passwd);
59 }
60
61
62 void IfxEdsadc_enableModule(Ifx_EDSADC *edsadc)
63 {
64 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
65 IfxScuWdt_clearCpuEndinit(passwd);
66 edsadc->CLC.U = 0x00000000;
67
68 if (edsadc->CLC.U)
69 {} /* sync access */
70
71 IfxScuWdt_setCpuEndinit(passwd);
72 }
73
74
75 volatile Ifx_SRC_SRCR *IfxEdsadc_getAuxSrc(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
76 {
77 IFX_UNUSED_PARAMETER(edsadc);
78
79 return &(MODULE_SRC.DSADC.DSADC[channel].SRA);
80 }
81
82
83 float32 IfxEdsadc_getIntegratorOutFreq(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
84 {
85 float32 frequency = IfxEdsadc_getMainCombOutFreq(edsadc, channel);
86
87 frequency = frequency / ((float32)1.0 + edsadc->CH[channel].IWCTR.B.NVALINT);
88 Ifx_EDSADC_CH_FCFGM fcfgm = edsadc->CH[channel].FCFGM;
89
90 if (fcfgm.B.FIR0EN != 0)
91 {
92 frequency = frequency / 2;
93 }
94
95 if (fcfgm.B.FIR1EN != 0)
96 {
97 frequency = frequency / 2;
98 }
99
100 return frequency;
101 }
102
103
104 float32 IfxEdsadc_getMainCombOutFreq(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
105 {
106 float32 frequency = IfxEdsadc_getModulatorClockFreq(edsadc, channel);
107
108 return frequency / ((float32)1.0 + edsadc->CH[channel].FCFGC.B.CFMDF);
109 }
110
111
112 float32 IfxEdsadc_getMainGroupDelay(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
113 {
114 Ifx_EDSADC_CH_FCFGC fcfgc = edsadc->CH[channel].FCFGC;
115 Ifx_EDSADC_CH_FCFGM fcfgm = edsadc->CH[channel].FCFGM;
116 Ifx_EDSADC_CH_DICFG dicfg = edsadc->CH[channel].DICFG;
117 Ifx_EDSADC_CH_IWCTR iwctr = edsadc->CH[channel].IWCTR;
118
119 /* Modulator period */
120 float32 tsMod = 1.0 / IfxEdsadc_getModulatorClockFreq(edsadc, channel);
121
122 /* Decimation factor */
123 uint32 N = fcfgc.B.CFMDF + 1;
124 /* Integration */
125 uint32 X = (dicfg.B.ITRMODE == IfxEdsadc_IntegratorTrigger_bypassed) ? 0 : iwctr.B.NVALINT + 1;
126
127 /* PRE */
128 uint32 PRE = fcfgm.B.PFEN != 0 ? 2 : 1;
129 /* F0 */
130 uint32 F0 = fcfgm.B.FIR0EN != 0 ? 2 : 1;
131 /* F1 */
132 uint32 F1 = (fcfgm.B.FIR1EN != 0) && (fcfgm.B.FIR1DEC != 0) ? 2 : 1;
133
134 /* On-chip modulator delay */
135 float32 onChipModulator = 1.0;
136 /* Input select/adjust unit delay */
137 float32 inputSelectUnit = 0.5;
138 /* CIC3 delay */
139 float32 cic3 = 3.0 * (N * PRE - 1) / 2.0;
140 /* FIR0 */
141 float32 fir0 = (3.5 * N) * PRE;
142 /* FIR1 */
143 float32 fir1 = 13.5 * N * PRE * F0;
144 /* Offset correction/compensation */
145 float32 offsetCorrection = 0;
146 /* Integrator */
147 float32 integrator = (X - 1.0) * N * PRE * F0 * F1 / 2.0;
148
149 return (
150 onChipModulator
151 + inputSelectUnit
152 + cic3
153 + (fcfgm.B.FIR0EN != 0 ? fir0 : 0)
154 + ((fcfgm.B.FIR1EN != 0) && (fcfgm.B.FIR1DEC != 0) ? fir1 : 0)
155 + offsetCorrection
156 + (dicfg.B.ITRMODE != IfxEdsadc_IntegratorTrigger_bypassed ? integrator : 0)
157 ) * tsMod;
158 }
159
160
161 volatile Ifx_SRC_SRCR *IfxEdsadc_getMainSrc(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
162 {
163 IFX_UNUSED_PARAMETER(edsadc);
164 return &(MODULE_SRC.DSADC.DSADC[channel].SRM);
165 }
166
167
168 float32 IfxEdsadc_getModulatorClockFreq(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
169 {
170 float32 sourceFreq = IfxEdsadc_getModulatorInputClockFreq(edsadc);
171
172 return sourceFreq / (((edsadc->CH[channel].MODCFG.B.DIVM + 1) * 2) + 2);
173 }
174
175
176 float32 IfxEdsadc_getModulatorInputClockFreq(Ifx_EDSADC *edsadc)
177 {
178 float32 result;
179
180 IFX_UNUSED_PARAMETER(edsadc);
181
182 #ifdef IFX_CFG_AURIX_SCUCCU_USED
183 result = IfxScuCcu_getSpbFrequency();
184 #else
185 result = IfxScuCcu_getAdcFrequency();
186 #endif
187
188 return result;
189 }
190
191
192 void IfxEdsadc_resetModule(Ifx_EDSADC *edsadc)
193 {
194 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
195
196 IfxScuWdt_clearCpuEndinit(passwd);
197 edsadc->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
198 edsadc->KRST1.B.RST = 1;
199 IfxScuWdt_setCpuEndinit(passwd);
200
201 while (0 == edsadc->KRST0.B.RSTSTAT) /* Wait until reset is executed */
202
203 {}
204
205 IfxScuWdt_clearCpuEndinit(passwd);
206 edsadc->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
207 IfxScuWdt_setCpuEndinit(passwd);
208 }
209
210
211 void IfxEdsadc_setCommonModeVoltage(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, IfxEdsadc_FractionalRefVoltageSelection voltage, IfxEdsadc_FractionalRefVoltage refMode, IfxEdsadc_HalfSupplyVoltage hsvMode, IfxEdsadc_CommonModeHoldVoltage cmhvMode, uint8 positiveInput, uint8 negativeInput)
212 {
213 IFX_UNUSED_PARAMETER(cmhvMode);
214 IFX_UNUSED_PARAMETER(hsvMode);
215
216 Ifx_EDSADC_CH_VCM tempVCM;
217 tempVCM.U = edsadc->CH[channel].VCM.U;
218 tempVCM.B.VREFXSEL = voltage;
219 tempVCM.B.VXON = refMode;
220 tempVCM.U |= positiveInput << IFX_EDSADC_CH_VCM_INPVC0_OFF;
221 tempVCM.U |= negativeInput << IFX_EDSADC_CH_VCM_INNVC0_OFF;
222 edsadc->CH[channel].VCM.U = tempVCM.U;
223 }
224
225
226 void IfxEdsadc_setGainCorrectionFactor(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, uint16 gainFactor, uint8 cicShift)
227 {
228 Ifx_EDSADC_CH_GAINCORR tempGAINCORR;
229
230 tempGAINCORR.U = edsadc->CH[channel].GAINCORR.U;
231 tempGAINCORR.B.GAINFACTOR = gainFactor;
232 tempGAINCORR.B.CICSHIFT = cicShift;
233 edsadc->CH[channel].GAINCORR.U = tempGAINCORR.U;
234 }
235
236
237 void IfxEdsadc_setTimeStampCounter(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, IfxEdsadc_TimeStampCounterClockSelection timeStampCounterClock, IfxEdsadc_TimeStampCounterControl runControl, IfxEdsadc_AnalogMux analogMuxCopy)
238 {
239 Ifx_EDSADC_CH_TSCNT tempTSCNT;
240 tempTSCNT.U = edsadc->CH[channel].TSCNT.U;
241 tempTSCNT.B.TSCLK = timeStampCounterClock;
242 tempTSCNT.B.TSCRUN = runControl;
243 tempTSCNT.B.AMXCOPY = analogMuxCopy;
244 edsadc->CH[channel].TSCNT.U = tempTSCNT.U;
245 }
246
247
248 void IfxEdsadc_setGainControl(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, uint16 gainFactor, uint8 cicShift, uint8 cicDecimationRate)
249 {
250 Ifx_EDSADC_CH_GAINCTR tempGAINCTR;
251
252 tempGAINCTR.U = edsadc->CH[channel].GAINCTR.U;
253 tempGAINCTR.B.GAINFACTOR = gainFactor;
254 tempGAINCTR.B.CICSHIFT = cicShift;
255 tempGAINCTR.B.CICDEC = cicDecimationRate;
256 edsadc->CH[channel].GAINCTR.U = tempGAINCTR.U;
257 }
258
259
260 void IfxEdsadc_setGainCalibration(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, uint16 calFactor, uint16 calTarget)
261 {
262 Ifx_EDSADC_CH_GAINCAL tempGAINCAL;
263 tempGAINCAL.U = edsadc->CH[channel].GAINCAL.U;
264 tempGAINCAL.B.CALFACTOR = calFactor;
265 tempGAINCAL.B.CALTARGET = calTarget;
266 edsadc->CH[channel].GAINCAL.U = tempGAINCAL.U;
267 }
268
269
270 void IfxEdsadc_configureModulator(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, IfxEdsadc_ModulatorConfig *config)
271 {
272 Ifx_EDSADC_CH_MODCFG modcfg;
273
274 modcfg.U = 0;
275
276 modcfg.B.INCFGP = config->positiveInput;
277 modcfg.B.INCFGN = config->negativeInput;
278 modcfg.B.GAINSEL = config->inputGain;
279 modcfg.B.INSEL = config->inputPin;
280 modcfg.B.INMAC = config->inputMuxActionControl;
281 modcfg.B.INMODE = config->triggerEvent;
282 modcfg.B.INCWC = 1; // enable write access for these bitfields
283 modcfg.B.DIVM = config->modulatorClockPeriod;
284 modcfg.B.ACSD = config->analogClockSyncDelay;
285 modcfg.B.DITHEN = config->ditheringEnabled;
286 modcfg.B.IREN = config->integratorResetEnabled;
287 modcfg.B.MMWC = 1; // enable write access for these bitfields
288
289 edsadc->CH[channel].MODCFG.U = modcfg.U;
290 }
IfxScuCcu_getSpbFrequency
float32 IfxScuCcu_getSpbFrequency(void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider...
Definition: IfxScuCcu.c:479
IfxEdsadc_setGainCalibration
void IfxEdsadc_setGainCalibration(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, uint16 calFactor, uint16 calTarget)
Definition: IfxEdsadc.c:260
IfxScuCcu_getAdcFrequency
IFX_INLINE float32 IfxScuCcu_getAdcFrequency(void)
API to get Adc (EVADC, EDSADC) frequency. This API returns the based on the divider value in CCUCON r...
Definition: IfxScuCcu.h:1564
IfxEdsadc_disableModule
void IfxEdsadc_disableModule(Ifx_EDSADC *edsadc)
Disables the module.
Definition: IfxEdsadc.c:52
IfxEdsadc_FractionalRefVoltageSelection
IfxEdsadc_FractionalRefVoltageSelection
Fraction reference voltage selection.
Definition: IfxEdsadc.h:194
IfxEdsadc_setGainControl
void IfxEdsadc_setGainControl(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, uint16 gainFactor, uint8 cicShift, uint8 cicDecimationRate)
Definition: IfxEdsadc.c:248
IfxEdsadc_enableModule
void IfxEdsadc_enableModule(Ifx_EDSADC *edsadc)
Enables the module.
Definition: IfxEdsadc.c:62
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxEdsadc_getModulatorClockFreq
float32 IfxEdsadc_getModulatorClockFreq(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
Get the modulator clock frequency in Hz.
Definition: IfxEdsadc.c:168
float32
float float32
Definition: Platform_Types.h:170
IfxEdsadc_ModulatorConfig::ditheringEnabled
IfxEdsadc_dithering ditheringEnabled
Control the Dithering Function for each modulator.
Definition: IfxEdsadc.h:534
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxEdsadc_FractionalRefVoltage
IfxEdsadc_FractionalRefVoltage
Fractional Reference Voltage Enable.
Definition: IfxEdsadc.h:186
IfxEdsadc.h
EDSADC basic functionality.
IfxEdsadc_getMainSrc
volatile Ifx_SRC_SRCR * IfxEdsadc_getMainSrc(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
Get the interrupt source register for a Main event.
Definition: IfxEdsadc.c:161
IfxEdsadc_ModulatorConfig::analogClockSyncDelay
IfxEdsadc_AnalogClockSyncDelay analogClockSyncDelay
Define the delay in clock cycle after sync signal.
Definition: IfxEdsadc.h:530
IfxEdsadc_ModulatorConfig::negativeInput
IfxEdsadc_InputConfig negativeInput
Modulator configuration of negative input line.
Definition: IfxEdsadc.h:532
IfxEdsadc_TimeStampCounterClockSelection
IfxEdsadc_TimeStampCounterClockSelection
Time Stamp Counter Clock Selection.
Definition: IfxEdsadc.h:451
IfxEdsadc_AnalogMux
IfxEdsadc_AnalogMux
Allows copying of bitfield AMX into bitfield TIMESTAMP.
Definition: IfxEdsadc.h:506
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxEdsadc_ChannelId
IfxEdsadc_ChannelId
Specifies the channel Index.
Definition: IfxEdsadc_cfg.h:70
IfxEdsadc_configureModulator
void IfxEdsadc_configureModulator(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, IfxEdsadc_ModulatorConfig *config)
Set the Modulator configuration.
Definition: IfxEdsadc.c:270
IfxEdsadc_ModulatorConfig::inputMuxActionControl
boolean inputMuxActionControl
Defines the mechanism by which the input multiplexer is controlled.
Definition: IfxEdsadc.h:536
IfxEdsadc_getMainGroupDelay
float32 IfxEdsadc_getMainGroupDelay(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
Estimate the group delay of main-chain filters in seconds.
Definition: IfxEdsadc.c:112
IfxEdsadc_ModulatorConfig::integratorResetEnabled
boolean integratorResetEnabled
Control the modulator overload handling.
Definition: IfxEdsadc.h:535
IfxEdsadc_setTimeStampCounter
void IfxEdsadc_setTimeStampCounter(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, IfxEdsadc_TimeStampCounterClockSelection timeStampCounterClock, IfxEdsadc_TimeStampCounterControl runControl, IfxEdsadc_AnalogMux analogMuxCopy)
Definition: IfxEdsadc.c:237
IfxEdsadc_ModulatorConfig::inputPin
IfxEdsadc_InputPin inputPin
Modulator input pin selection.
Definition: IfxEdsadc.h:533
IfxEdsadc_ModulatorConfig::positiveInput
IfxEdsadc_InputConfig positiveInput
Modulator configuration of positive input line.
Definition: IfxEdsadc.h:531
IfxEdsadc_getIntegratorOutFreq
float32 IfxEdsadc_getIntegratorOutFreq(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
Get the sample frequency of the integrator output in Hz.
Definition: IfxEdsadc.c:83
IfxEdsadc_setCommonModeVoltage
void IfxEdsadc_setCommonModeVoltage(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, IfxEdsadc_FractionalRefVoltageSelection voltage, IfxEdsadc_FractionalRefVoltage refMode, IfxEdsadc_HalfSupplyVoltage hsvMode, IfxEdsadc_CommonModeHoldVoltage cmhvMode, uint8 positiveInput, uint8 negativeInput)
set common mode voltage Parameters
Definition: IfxEdsadc.c:211
IfxEdsadc_CommonModeHoldVoltage
IfxEdsadc_CommonModeHoldVoltage
Common Mode Hold Voltage Enable.
Definition: IfxEdsadc.h:113
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxEdsadc_resetModule
void IfxEdsadc_resetModule(Ifx_EDSADC *edsadc)
resets EDSADC kernel
Definition: IfxEdsadc.c:192
IfxEdsadc_getModulatorInputClockFreq
float32 IfxEdsadc_getModulatorInputClockFreq(Ifx_EDSADC *edsadc)
Get the input frequency of EDSADC in Hz.
Definition: IfxEdsadc.c:176
IfxEdsadc_ModulatorConfig::inputGain
IfxEdsadc_InputGain inputGain
Modulator gain select of analog input path.
Definition: IfxEdsadc.h:529
IfxEdsadc_getAuxSrc
volatile Ifx_SRC_SRCR * IfxEdsadc_getAuxSrc(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
Address/pointer to the interrupt source register.
Definition: IfxEdsadc.c:75
IfxEdsadc_setGainCorrectionFactor
void IfxEdsadc_setGainCorrectionFactor(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, uint16 gainFactor, uint8 cicShift)
configure gain correction
Definition: IfxEdsadc.c:226
IfxEdsadc_ModulatorConfig::modulatorClockPeriod
float32 modulatorClockPeriod
Modulator clock period.
Definition: IfxEdsadc.h:528
IfxEdsadc_getMainCombOutFreq
float32 IfxEdsadc_getMainCombOutFreq(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
Get the sample frequency of the main COMB filter output in Hz.
Definition: IfxEdsadc.c:104
IfxEdsadc_TimeStampCounterControl
IfxEdsadc_TimeStampCounterControl
Timestamp Counter Run Control.
Definition: IfxEdsadc.h:514
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxEdsadc_IntegratorTrigger_bypassed
No integration trigger, integrator bypassed.
Definition: IfxEdsadc.h:297
IfxEdsadc_HalfSupplyVoltage
IfxEdsadc_HalfSupplyVoltage
Half Supply Voltage Enable.
Definition: IfxEdsadc.h:204
IfxEdsadc_ModulatorConfig::triggerEvent
IfxEdsadc_InputMuxControlMode triggerEvent
Defines the condition for a trigger event to control the input multiplexer.
Definition: IfxEdsadc.h:537
IfxEdsadc_ModulatorConfig
Modulator Configuration.
Definition: IfxEdsadc.h:526
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
uint8
unsigned char uint8
Definition: Platform_Types.h:108


iLLD_TC38A: IfxEdsadc.h Source File

  • Edsadc
  • Std
IfxEdsadc.h
Go to the documentation of this file.
1 /**
2 * \file IfxEdsadc.h
3 * \brief EDSADC basic functionality
4 * \ingroup IfxLld_Edsadc
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Edsadc_Std_Enum Enumerations
42 * \ingroup IfxLld_Edsadc_Std
43 * \defgroup IfxLld_Edsadc_Std_Operative Operative Functions
44 * \ingroup IfxLld_Edsadc_Std
45 * \defgroup IfxLld_Edsadc_Std_Support Support Functions
46 * \ingroup IfxLld_Edsadc_Std
47 * \defgroup IfxLld_Edsadc_Std_Interrupt Interrupt Functions
48 * \ingroup IfxLld_Edsadc_Std
49 * \defgroup IfxLld_Edsadc_Std_IO IO Pin Configuration Functions
50 * \ingroup IfxLld_Edsadc_Std
51 */
52
53 #ifndef IFXEDSADC_H
54 #define IFXEDSADC_H 1
55
56 /******************************************************************************/
57 /*----------------------------------Includes----------------------------------*/
58 /******************************************************************************/
59
60 #include "_Impl/IfxEdsadc_cfg.h"
61 #include "Src/Std/IfxSrc.h"
62 #include "Scu/Std/IfxScuCcu.h"
63 #include "_PinMap/IfxEdsadc_PinMap.h"
64 #include "Cpu/Std/IfxCpu_Intrinsics.h"
65 #include "IfxEdsadc_reg.h"
66 #include "IfxEdsadc_bf.h"
67
68 /******************************************************************************/
69 /*--------------------------------Enumerations--------------------------------*/
70 /******************************************************************************/
71
72 /** \addtogroup IfxLld_Edsadc_Std_Enum
73 * \{ */
74 /** \brief Analog Clock Synchronization Delay
75 * Definition in Ifx_DSADC.MODCFG.B.ACSD
76 */
77 typedef enum
78 {
79 IfxEdsadc_AnalogClockSyncDelay_noDelay = 0, /**< \brief no delay */
80 IfxEdsadc_AnalogClockSyncDelay_cycleDelay1 = 1, /**< \brief Delay of 1 Cycle */
81 IfxEdsadc_AnalogClockSyncDelay_cycleDelay2, /**< \brief Delay of 2 Cycle */
82 IfxEdsadc_AnalogClockSyncDelay_cycleDelay3, /**< \brief Delay of 3 Cycle */
83 IfxEdsadc_AnalogClockSyncDelay_cycleDelay4, /**< \brief Delay of 4 Cycle */
84 IfxEdsadc_AnalogClockSyncDelay_cycleDelay5, /**< \brief Delay of 5 Cycle */
85 IfxEdsadc_AnalogClockSyncDelay_cycleDelay6, /**< \brief Delay of 6 Cycle */
86 IfxEdsadc_AnalogClockSyncDelay_cycleDelay7 /**< \brief Delay of 7 Cycle */
87 } IfxEdsadc_AnalogClockSyncDelay;
88
89 /** \brief Service request generation (auxiliary)\n
90 * Definition in Ifx_EDSADC.FCFGM.B.SRGA
91 */
92 typedef enum
93 {
94 IfxEdsadc_AuxServiceRequest_never = 0, /**< \brief Never, service requests disabled */
95 IfxEdsadc_AuxServiceRequest_compEvent = 1, /**< \brief As selected by bitfield ESEL */
96 IfxEdsadc_AuxServiceRequest_timestampEvent = 2, /**< \brief Timestamp Event */
97 IfxEdsadc_AuxServiceRequest_altSource = 3 /**< \brief Alternate source: Capturing of a sign delay value to register CGSYNCx (x = 0 - 5) */
98 } IfxEdsadc_AuxServiceRequest;
99
100 /** \brief Carrier generation mode\n
101 * Definition in Ifx_EDSADC.CGCFG.B.CGMOD
102 */
103 typedef enum
104 {
105 IfxEdsadc_CarrierWaveformMode_stopped = 0, /**< \brief Carrier Generator stopped */
106 IfxEdsadc_CarrierWaveformMode_square = 1, /**< \brief Carrier Generator generates square wave */
107 IfxEdsadc_CarrierWaveformMode_triangle = 2, /**< \brief Carrier Generator generates triangle wave */
108 IfxEdsadc_CarrierWaveformMode_sine = 3 /**< \brief Carrier Generator generates sine wave */
109 } IfxEdsadc_CarrierWaveformMode;
110
111 /** \brief Common Mode Hold Voltage Enable
112 */
113 typedef enum
114 {
115 IfxEdsadc_CommonModeHoldVoltage_disable = 0, /**< \brief VCMH is off */
116 IfxEdsadc_CommonModeHoldVoltage_enable = 1 /**< \brief VCMH is generated */
117 } IfxEdsadc_CommonModeHoldVoltage;
118
119 /** \brief Select the data to be returned when register RESM is read
120 * Definition in Ifx_DSADC.DICFG.B.DRM
121 */
122 typedef enum
123 {
124 IfxEdsadc_DataRead_signOnHighbit = 0, /**< \brief Single: Issue one 16-bit value per read access (sign on high bits) */
125 IfxEdsadc_DataRead_timestampOnHighbit = 1, /**< \brief Single: Issue one 16-bit value per read access (timestamp on high bits) */
126 IfxEdsadc_DataRead_double = 2 /**< \brief Double: Issue two 16-bit values per read access */
127 } IfxEdsadc_DataRead;
128
129 /** \brief Data stream select
130 * Definition in Ifx_DSADC.DICFG.B.DSS
131 */
132 typedef enum
133 {
134 IfxEdsadc_DataStream_onChipModulator = 0, /**< \brief select data stream from on chip modulator */
135 IfxEdsadc_DataStream_doubleDataClockEdge = 3, /**< \brief External modulator, use rising and falling clock edge */
136 IfxEdsadc_DataStream_directFallingClockEdge = 4, /**< \brief External modulator, use each falling clock edge */
137 IfxEdsadc_DataStream_directRisingClockEdge = 5, /**< \brief External modulator, use each rising clock edge */
138 IfxEdsadc_DataStream_secondFallingClockEdge = 6, /**< \brief External modulator, use every 2nd falling clock edge */
139 IfxEdsadc_DataStream_secondRisingClockEdge = 7 /**< \brief External modulator, use every 2nd rising clock edge */
140 } IfxEdsadc_DataStream;
141
142 /** \brief Trimming Value for Dithering function
143 * Definition in Ifx_DSADC.GLOBCFG.B.DITRIM
144 */
145 typedef enum
146 {
147 IfxEdsadc_DitheringIntensity_minimum = 0, /**< \brief Minimum dithering intensity */
148 IfxEdsadc_DitheringIntensity_low = 1, /**< \brief Low dithering intensity */
149 IfxEdsadc_DitheringIntensity_medium = 2, /**< \brief Medium dithering intensity */
150 IfxEdsadc_DitheringIntensity_high = 3 /**< \brief High */
151 } IfxEdsadc_DitheringIntensity;
152
153 /** \brief Define when comparator event is generated
154 * Definition in Ifx_DSADC.FCFGM.B.ESEL
155 */
156 typedef enum
157 {
158 IfxEdsadc_EventSelect_everyNewResult = 0, /**< \brief Always, for each new result value */
159 IfxEdsadc_EventSelect_insideBoundry = 1, /**< \brief If result is inside the boundary band */
160 IfxEdsadc_EventSelect_outsideBoundry = 2 /**< \brief If result is outside the boundary band */
161 } IfxEdsadc_EventSelect;
162
163 /** \brief Defines the duration of the additional filter effect, based on values input to the
164 * filter
165 */
166 typedef enum
167 {
168 IfxEdsadc_FilterRunTimeInputCycle_2 = 0, /**< \brief 2 input cycles */
169 IfxEdsadc_FilterRunTimeInputCycle_4 = 1, /**< \brief 4 input cycles */
170 IfxEdsadc_FilterRunTimeInputCycle_8 = 2, /**< \brief 8 input cycles */
171 IfxEdsadc_FilterRunTimeInputCycle_16 = 3 /**< \brief 16 input cycles */
172 } IfxEdsadc_FilterRunTimeInputCycle;
173
174 /** \brief Specifies Slew Rate Filter Strength
175 */
176 typedef enum
177 {
178 IfxEdsadc_FilterStrength_minimum = 0, /**< \brief Minimum filter effect, early attenuation, linear operation */
179 IfxEdsadc_FilterStrength_weak = 1, /**< \brief Weak filter effect */
180 IfxEdsadc_FilterStrength_medium = 2, /**< \brief Medium filter effect */
181 IfxEdsadc_FilterStrength_maximum = 3 /**< \brief maximum filter effect */
182 } IfxEdsadc_FilterStrength;
183
184 /** \brief Fractional Reference Voltage Enable
185 */
186 typedef enum
187 {
188 IfxEdsadc_FractionalRefVoltage_disable = 0, /**< \brief VREFX is not connected */
189 IfxEdsadc_FractionalRefVoltage_enable = 1 /**< \brief VREFX is connected, value according to VREFXSEL */
190 } IfxEdsadc_FractionalRefVoltage;
191
192 /** \brief Fraction reference voltage selection
193 */
194 typedef enum
195 {
196 IfxEdsadc_FractionalRefVoltageSelection_div2 = 0, /**< \brief VREFX = VAREF / 2 */
197 IfxEdsadc_FractionalRefVoltageSelection_div4 = 1, /**< \brief VREFX = VAREF / 4 */
198 IfxEdsadc_FractionalRefVoltageSelection_div8 = 2, /**< \brief VREFX = VAREF / 8 */
199 IfxEdsadc_FractionalRefVoltageSelection_div16 = 3 /**< \brief VREFX = VAREF / 2 */
200 } IfxEdsadc_FractionalRefVoltageSelection;
201
202 /** \brief Half Supply Voltage Enable
203 */
204 typedef enum
205 {
206 IfxEdsadc_HalfSupplyVoltage_disable = 0, /**< \brief VDDM / 2 is not connected */
207 IfxEdsadc_HalfSupplyVoltage_enable = 1 /**< \brief VDDM / 2 is connected */
208 } IfxEdsadc_HalfSupplyVoltage;
209
210 /** \brief Modulator configuration of positive/negative input line\n
211 * Definition in Ifx_DSADC.MODCFGx.B.INCFGP and Ifx_DSADC.MODCFGx.B.INCFGN
212 */
213 typedef enum
214 {
215 IfxEdsadc_InputConfig_inputPin = 0, /**< \brief Modulator input connected to external pin */
216 IfxEdsadc_InputConfig_supplyVoltage = 1, /**< \brief Modulator input connected to supply voltage V_ddm */
217 IfxEdsadc_InputConfig_commonModeVoltage = 2, /**< \brief Modulator input connected to common mode voltage V_cm */
218 IfxEdsadc_InputConfig_referenceGround = 3 /**< \brief Modulator input connected to reference ground V_ref */
219 } IfxEdsadc_InputConfig;
220
221 /** \brief Demodulator input data source selection\n
222 * Definition in Ifx_EDSADC.DICFG.B.DSRC
223 */
224 typedef enum
225 {
226 IfxEdsadc_InputDataSource_directInputA = 0, /**< \brief External, from input A, direct */
227 IfxEdsadc_InputDataSource_invertedInputA = 1, /**< \brief External, from input A, inverted */
228 IfxEdsadc_InputDataSource_directInputB = 2, /**< \brief External, from input B, direct */
229 IfxEdsadc_InputDataSource_invertedInputB = 3, /**< \brief External, from input B, inverted */
230 IfxEdsadc_InputDataSource_directInputC = 4, /**< \brief External, from input C, direct */
231 IfxEdsadc_InputDataSource_invertedInputC = 5, /**< \brief External, from input C, inverted */
232 IfxEdsadc_InputDataSource_directInputD = 6, /**< \brief External, from input D, direct */
233 IfxEdsadc_InputDataSource_invertedInputD = 7 /**< \brief External, from input D, inverted */
234 } IfxEdsadc_InputDataSource;
235
236 /** \brief Modulator gain select of analog input path\n
237 * Definition in Ifx_DSADC.MODCFGx.B.GAINSEL
238 */
239 typedef enum
240 {
241 IfxEdsadc_InputGain_factor1 = 0, /**< \brief Input gain factor: 1 */
242 IfxEdsadc_InputGain_factor2 = 1, /**< \brief Input gain factor: 2 */
243 IfxEdsadc_InputGain_factor4 = 2, /**< \brief Input gain factor: 4 */
244 IfxEdsadc_InputGain_factor8 = 3, /**< \brief Input gain factor: 8 */
245 IfxEdsadc_InputGain_factor16 = 4 /**< \brief Input gain factor: 16 */
246 } IfxEdsadc_InputGain;
247
248 /** \brief specifies input multiplexer control mode defined in MODULE_EDSADC.MODCFG.B.INMODE
249 */
250 typedef enum
251 {
252 IfxEdsadc_InputMuxControlMode_softwareControl = 0, /**< \brief Trigger Event by software (INMUX follows INSEL) */
253 IfxEdsadc_InputMuxControlMode_fallingEdge = 1, /**< \brief Trigger Event on Falling edge */
254 IfxEdsadc_InputMuxControlMode_risingEdge = 2, /**< \brief Trigger Event on Rising edge */
255 IfxEdsadc_InputMuxControlMode_always = 3 /**< \brief Trigger event on any edge */
256 } IfxEdsadc_InputMuxControlMode;
257
258 /** \brief Modulator input pin selection\n
259 * Definition in Ifx_DSADC.MODCFGx.B.INMUX
260 */
261 typedef enum
262 {
263 IfxEdsadc_InputPin_a = 0, /**< \brief Pin A connected to modulator input */
264 IfxEdsadc_InputPin_b = 1, /**< \brief Pin B connected to modulator input */
265 IfxEdsadc_InputPin_c = 2, /**< \brief Pin C connected to modulator input */
266 IfxEdsadc_InputPin_d = 3 /**< \brief Pin D connected to modulator input */
267 } IfxEdsadc_InputPin;
268
269 /** \brief Controls the data shifter after the integrator that selects the portion of the
270 * integrator data for the result register
271 */
272 typedef enum
273 {
274 IfxEdsadc_IntegrationShiftControl_0 = 0, /**< \brief Integration Shift value */
275 IfxEdsadc_IntegrationShiftControl_1, /**< \brief Integration Shift value */
276 IfxEdsadc_IntegrationShiftControl_2, /**< \brief Integration Shift value */
277 IfxEdsadc_IntegrationShiftControl_3, /**< \brief Integration Shift value */
278 IfxEdsadc_IntegrationShiftControl_4, /**< \brief Integration Shift value */
279 IfxEdsadc_IntegrationShiftControl_5 /**< \brief Integration Shift value */
280 } IfxEdsadc_IntegrationShiftControl;
281
282 /** \brief Integrator window size\n
283 * Definition in Ifx_DSADC.IWCTR.B.IWS
284 */
285 typedef enum
286 {
287 IfxEdsadc_IntegrationWindowSize_internalControl = 0, /**< \brief Internal control: stop integrator after REPVAL+1 integration cycles */
288 IfxEdsadc_IntegrationWindowSize_externalControl = 1 /**< \brief External control: stop integrator when bit INTEN becomes 0 */
289 } IfxEdsadc_IntegrationWindowSize;
290
291 /** \brief Integrator trigger mode\n
292 * NOTE: switch-first to bypassed before using other mode\n
293 * Definition in Ifx_EDSADC.DICFG.B.ITRMODE
294 */
295 typedef enum
296 {
297 IfxEdsadc_IntegratorTrigger_bypassed = 0, /**< \brief No integration trigger, integrator bypassed */
298 IfxEdsadc_IntegratorTrigger_fallingEdge = 1, /**< \brief Trigger event upon a falling edge */
299 IfxEdsadc_IntegratorTrigger_risingEdge = 2, /**< \brief Trigger event upon a rising edge */
300 IfxEdsadc_IntegratorTrigger_alwaysActive = 3 /**< \brief No trigger, integrator active all the time */
301 } IfxEdsadc_IntegratorTrigger;
302
303 /** \brief Service request generation (main chain)\n
304 * Definition in Ifx_EDSADC.FCFGM.B.SRGM
305 */
306 typedef enum
307 {
308 IfxEdsadc_MainServiceRequest_never = 0, /**< \brief Never, service requests disabled */
309 IfxEdsadc_MainServiceRequest_highGateSignal = 1, /**< \brief While gate (selected trigger signal) is high */
310 IfxEdsadc_MainServiceRequest_lowGateSignal = 2, /**< \brief While gate (selected trigger signal) is low */
311 IfxEdsadc_MainServiceRequest_everyNewResult = 3 /**< \brief Always, for each new result value */
312 } IfxEdsadc_MainServiceRequest;
313
314 /** \brief Modulator divider factor for modulator clock\n
315 * Definition in Ifx_EDSADC.MODCFGx.B.DIVM
316 */
317 typedef enum
318 {
319 IfxEdsadc_ModulatorClockDivider_div4 = 0, /**< \brief f_mod = f_clk / 4 */
320 IfxEdsadc_ModulatorClockDivider_div6, /**< \brief f_mod = f_clk / 6 */
321 IfxEdsadc_ModulatorClockDivider_div8, /**< \brief f_mod = f_clk / 8 */
322 IfxEdsadc_ModulatorClockDivider_div10, /**< \brief f_mod = f_clk / 10 */
323 IfxEdsadc_ModulatorClockDivider_div12, /**< \brief f_mod = f_clk / 12 */
324 IfxEdsadc_ModulatorClockDivider_div14, /**< \brief f_mod = f_clk / 14 */
325 IfxEdsadc_ModulatorClockDivider_div16, /**< \brief f_mod = f_clk / 16 */
326 IfxEdsadc_ModulatorClockDivider_div18 /**< \brief f_mod = f_clk / 18 */
327 } IfxEdsadc_ModulatorClockDivider;
328
329 /** \brief Defines the way the modulator clock is generated
330 * Definition in Ifx_DSADC.GLOBCFG.B.USC
331 */
332 typedef enum
333 {
334 IfxEdsadc_ModulatorClockGeneration_syncMode = 0,
335 IfxEdsadc_ModulatorClockGeneration_unsyncMode = 1
336 } IfxEdsadc_ModulatorClockGeneration;
337
338 /** \brief Enable the offset compensation filter
339 * Definition in Ifx_DSADC.FCFGM.B.OCEN
340 */
341 typedef enum
342 {
343 IfxEdsadc_OffsetCompensationFilter_disabled = 0, /**< \brief Offset Compensation filter disabled */
344 IfxEdsadc_OffsetCompensationFilter_enablewithRateA = 1, /**< \brief Enable offset compensation filter, adjust OFFCOMP with rate A */
345 IfxEdsadc_OffsetCompensationFilter_enablewithRateB = 2, /**< \brief Enable offset compensation filter, adjust OFFCOMP with rate B */
346 IfxEdsadc_OffsetCompensationFilter_enablewithRateC = 3, /**< \brief Enable offset compensation filter, adjust OFFCOMP with rate C */
347 IfxEdsadc_OffsetCompensationFilter_enablewithRateD = 4, /**< \brief Enable offset compensation filter, adjust OFFCOMP with rate D */
348 IfxEdsadc_OffsetCompensationFilter_enablewithRateE = 5, /**< \brief Enable offset compensation filter, adjust OFFCOMP with rate E */
349 IfxEdsadc_OffsetCompensationFilter_enablewithRateF = 6, /**< \brief Enable offset compensation filter, adjust OFFCOMP with rate F */
350 IfxEdsadc_OffsetCompensationFilter_enablewithRateG = 7 /**< \brief Enable offset compensation filter, adjust OFFCOMP with rate G */
351 } IfxEdsadc_OffsetCompensationFilter;
352
353 /** \brief Overshoot Compensation Enable.
354 * Defined in fx_DSADC.FCFGM.B.OVCEN
355 */
356 typedef enum
357 {
358 IfxEdsadc_OvershootCompensation_disabled = 0, /**< \brief Disabled, feed FIR filter directly */
359 IfxEdsadc_OvershootCompensation_enabled = 1 /**< \brief Attenuate response to fast edges */
360 } IfxEdsadc_OvershootCompensation;
361
362 /** \brief Rectifier sign source\n
363 * Selects the sign signal that is to be delayed.\n
364 * Definition in Ifx_DSADC.RECT.B.SSRC
365 */
366 typedef enum
367 {
368 IfxEdsadc_RectifierSignSource_onChipGenerator = 0, /**< \brief On-chip carrier generator */
369 IfxEdsadc_RectifierSignSource_nextChannel = 1, /**< \brief Sign of result of next channel */
370 IfxEdsadc_RectifierSignSource_externalA = 2, /**< \brief External sign signal A */
371 IfxEdsadc_RectifierSignSource_externalB = 3 /**< \brief External sign signal B */
372 } IfxEdsadc_RectifierSignSource;
373
374 /** \brief Restart the filter chain when an integration window starts
375 */
376 typedef enum
377 {
378 IfxEdsadc_RestartFilterChain_on = 0,
379 IfxEdsadc_RestartFilterChain_off = 1
380 } IfxEdsadc_RestartFilterChain;
381
382 /** \brief specifies result display mode (signed/unsigned)
383 * Definition in Ifx_DSADC.DICFG.B.RDM
384 */
385 typedef enum
386 {
387 IfxEdsadc_ResultDisplayMode_signed = 0, /**< \brief Signed: result values range from -215 to +215 */
388 IfxEdsadc_ResultDisplayMode_unsigned = 1 /**< \brief Unsigned: result values range from 0 to +216 (shifted by 215) */
389 } IfxEdsadc_ResultDisplayMode;
390
391 /** \brief Demodulator sample clock source select\n
392 * Definition in Ifx_EDSADC.DICFG.B.CSRC
393 */
394 typedef enum
395 {
396 IfxEdsadc_SampleClockSource_internal = 0, /**< \brief Internal clock */
397 IfxEdsadc_SampleClockSource_inputA = 3, /**< \brief External clock, from Input A */
398 IfxEdsadc_SampleClockSource_inputB = 4, /**< \brief External clock, from Input B */
399 IfxEdsadc_SampleClockSource_inputC = 5 /**< \brief External clock, from Input C */
400 } IfxEdsadc_SampleClockSource;
401
402 /** \brief Service request fifo level
403 * Definition in Ifx_EDSADC.RFC.B.SRLVL
404 */
405 typedef enum
406 {
407 IfxEdsadc_ServiceRequestFifolevel_1 = 0, /**< \brief Generate a service request when Fifo contain level 1 Value */
408 IfxEdsadc_ServiceRequestFifolevel_2, /**< \brief Generate a service request when Fifo contain level 2 Value */
409 IfxEdsadc_ServiceRequestFifolevel_3, /**< \brief Generate a service request when Fifo contain level 3 Value */
410 IfxEdsadc_ServiceRequestFifolevel_4 /**< \brief Generate a service request when Fifo contain level 4 Value */
411 } IfxEdsadc_ServiceRequestFifolevel;
412
413 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
414 * Definition in Ifx_EDSADC.CLC.B.EDIS
415 */
416 typedef enum
417 {
418 IfxEdsadc_SleepMode_enable = 0, /**< \brief enables sleep mode */
419 IfxEdsadc_SleepMode_disable = 1 /**< \brief disables sleep mode */
420 } IfxEdsadc_SleepMode;
421
422 /** \brief Defines when the slew rate filter is activated
423 */
424 typedef enum
425 {
426 IfxEdsadc_StepDetectionMode_lastInput = 0, /**< \brief Compare threshold to difference of current and last input */
427 IfxEdsadc_StepDetectionMode_secondlastInput = 1 /**< \brief Compare threshold to difference of current and second-last input */
428 } IfxEdsadc_StepDetectionMode;
429
430 /** \brief Adjusts the analog circuitry to the supply voltage used in the application
431 * system.Defined In defined in MODULE_EDSADC.GLOBCFG.B.SUPLEV
432 */
433 typedef enum
434 {
435 IfxEdsadc_SupplyVoltageLevel_automaticControl = 0, /**< \brief voltage range is controlled by the power supply */
436 IfxEdsadc_SupplyVoltageLevel_upperVoltage = 1, /**< \brief Upper voltage range: assume a 5 V power supply is connected */
437 IfxEdsadc_SupplyVoltageLevel_lowerVoltage = 2 /**< \brief Lower voltage range: assume a 3.3 V power supply is connected */
438 } IfxEdsadc_SupplyVoltageLevel;
439
440 /** \brief OCDS Suspend Control (OCDS.SUS)
441 */
442 typedef enum
443 {
444 IfxEdsadc_SuspendMode_none = 0, /**< \brief No suspend */
445 IfxEdsadc_SuspendMode_hard = 1, /**< \brief Hard Suspend */
446 IfxEdsadc_SuspendMode_soft = 2 /**< \brief Soft Suspend */
447 } IfxEdsadc_SuspendMode;
448
449 /** \brief Time Stamp Counter Clock Selection
450 */
451 typedef enum
452 {
453 IfxEdsadc_TimeStampCounterClockSelection_div1 = 0, /**< \brief fTSTMP = fMOD */
454 IfxEdsadc_TimeStampCounterClockSelection_div2 = 1, /**< \brief fTSTMP = fMOD/2 */
455 IfxEdsadc_TimeStampCounterClockSelection_div4 = 2, /**< \brief fTSTMP = fMOD/4 */
456 IfxEdsadc_TimeStampCounterClockSelection_div8 = 3 /**< \brief fTSTMP = fMOD/8 */
457 } IfxEdsadc_TimeStampCounterClockSelection;
458
459 /** \brief Timestamp trigger mode\n
460 * Definition in Ifx_EDSADC.DICFG.B.TSTRMODE
461 */
462 typedef enum
463 {
464 IfxEdsadc_TimestampTrigger_noTrigger = 0, /**< \brief No timestamp trigger */
465 IfxEdsadc_TimestampTrigger_fallingEdge = 1, /**< \brief Trigger event upon a falling edge */
466 IfxEdsadc_TimestampTrigger_risingEdge = 2, /**< \brief Trigger event upon a rising edge */
467 IfxEdsadc_TimestampTrigger_eachEdge = 3 /**< \brief Trigger event upon each edge */
468 } IfxEdsadc_TimestampTrigger;
469
470 /** \brief Trigger select\n
471 * Definition in Ifx_EDSADC.DICFG.B.TRSEL
472 */
473 typedef enum
474 {
475 IfxEdsadc_TriggerInput_a = 0, /**< \brief GTM EDSADC Trigger 0 */
476 IfxEdsadc_TriggerInput_b = 1, /**< \brief GTM EDSADC Trigger 1 */
477 IfxEdsadc_TriggerInput_c = 2, /**< \brief GTM ADC Trigger 0 */
478 IfxEdsadc_TriggerInput_d = 3, /**< \brief GTM ADC Trigger 1 */
479 IfxEdsadc_TriggerInput_e = 4, /**< \brief Trigger/gate via port input P33.0 */
480 IfxEdsadc_TriggerInput_f = 5, /**< \brief Trigger/gate via port input P33.4 */
481 IfxEdsadc_TriggerInput_g = 6, /**< \brief ERU pattern detection output 0 */
482 IfxEdsadc_TriggerInput_h = 7, /**< \brief Trigger/gate, channel 0,input H */
483 IfxEdsadc_TriggerInput_i = 8, /**< \brief Trigger/gate, channel 0,input I */
484 IfxEdsadc_TriggerInput_j = 9, /**< \brief Trigger/gate, channel 0,input J */
485 IfxEdsadc_TriggerInput_k = 10, /**< \brief GTM ADC Trigger 2 */
486 IfxEdsadc_TriggerInput_l = 11, /**< \brief GTM ADC Trigger 3 */
487 IfxEdsadc_TriggerInput_m = 12, /**< \brief GTM DSADC Trigger 2 */
488 IfxEdsadc_TriggerInput_n = 13, /**< \brief GTM DSADC Trigger 3 */
489 IfxEdsadc_TriggerInput_o = 14, /**< \brief Trigger/gate, channel 0,input O */
490 IfxEdsadc_TriggerInput_p = 15 /**< \brief Trigger/gate, channel 0,input P */
491 } IfxEdsadc_TriggerInput;
492
493 /** \brief Controls the dithering function for each modulator separately
494 * Definition in Ifx_DSADC.MODCFG.B.DITHEN
495 */
496 typedef enum
497 {
498 IfxEdsadc_dithering_disabled = 0, /**< \brief dithering function disabled */
499 IfxEdsadc_dithering_enabled = 1 /**< \brief dithering function enabled */
500 } IfxEdsadc_dithering;
501
502 /** \} */
503
504 /** \brief Allows copying of bitfield AMX into bitfield TIMESTAMP
505 */
506 typedef enum
507 {
508 IfxEdsadc_AnalogMux_doNotCopyAmx = 0, /**< \brief Do not copy, timestamp uses all 16 bits */
509 IfxEdsadc_AnalogMux_copyAmx = 1 /**< \brief Copy AMX to bits TIMESTAMP[15:14], timestamp uses lower 14 bits */
510 } IfxEdsadc_AnalogMux;
511
512 /** \brief Timestamp Counter Run Control
513 */
514 typedef enum
515 {
516 IfxEdsadc_TimeStampCounterControl_off = 0, /**< \brief Timestamp counter is off */
517 IfxEdsadc_TimeStampCounterControl_on = 1 /**< \brief Timestamp counter is counting at the rate selected by bitfield TSCLK */
518 } IfxEdsadc_TimeStampCounterControl;
519
520 /******************************************************************************/
521 /*-----------------------------Data Structures--------------------------------*/
522 /******************************************************************************/
523
524 /** \brief Modulator Configuration
525 */
526 typedef struct
527 {
528 float32 modulatorClockPeriod; /**< \brief Modulator clock period */
529 IfxEdsadc_InputGain inputGain; /**< \brief Modulator gain select of analog input path */
530 IfxEdsadc_AnalogClockSyncDelay analogClockSyncDelay; /**< \brief Define the delay in clock cycle after sync signal */
531 IfxEdsadc_InputConfig positiveInput; /**< \brief Modulator configuration of positive input line */
532 IfxEdsadc_InputConfig negativeInput; /**< \brief Modulator configuration of negative input line */
533 IfxEdsadc_InputPin inputPin; /**< \brief Modulator input pin selection */
534 IfxEdsadc_dithering ditheringEnabled; /**< \brief Control the Dithering Function for each modulator */
535 boolean integratorResetEnabled; /**< \brief Control the modulator overload handling */
536 boolean inputMuxActionControl; /**< \brief Defines the mechanism by which the input multiplexer is controlled */
537 IfxEdsadc_InputMuxControlMode triggerEvent; /**< \brief Defines the condition for a trigger event to control the input multiplexer */
538 } IfxEdsadc_ModulatorConfig;
539
540 /** \addtogroup IfxLld_Edsadc_Std_Operative
541 * \{ */
542
543 /******************************************************************************/
544 /*-------------------------Inline Function Prototypes-------------------------*/
545 /******************************************************************************/
546
547 /** \brief Returns the module's suspend state.
548 * TRUE :if module is suspended.
549 * FALSE:if module is not yet suspended.
550 * \param edsadc Pointer to EDSADC module registers
551 * \return Suspend status (TRUE / FALSE)
552 */
553 IFX_INLINE boolean IfxEdsadc_isModuleSuspended(Ifx_EDSADC *edsadc);
554
555 /** \brief Sets the sensitivity of the module to sleep signal
556 * \param edsadc pointer to EDSADC registers
557 * \param mode mode selection (enable/disable)
558 * \return None
559 */
560 IFX_INLINE void IfxEdsadc_setSleepMode(Ifx_EDSADC *edsadc, IfxEdsadc_SleepMode mode);
561
562 /** \brief Configure the Module to Hard/Soft suspend mode.
563 * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
564 * \param edsadc Pointer to EDSADC module registers
565 * \param mode Module suspend mode
566 * \return None
567 */
568 IFX_INLINE void IfxEdsadc_setSuspendMode(Ifx_EDSADC *edsadc, IfxEdsadc_SuspendMode mode);
569
570 /** \brief Enables the conversion of multiple channels
571 * \param edsadc Pointer to the EDSADC register space
572 * \param modulatorMask the modulator which should be running (bitwise selection)
573 * \param channelMask the channels which should be scanned (bitwise selection)
574 * \return None
575 *
576 * A coding example can be found in \ref IfxLld_Edsadc_Edsadc_Usage
577 *
578 */
579 IFX_INLINE void IfxEdsadc_startScan(Ifx_EDSADC *edsadc, uint32 modulatorMask, uint32 channelMask);
580
581 /** \brief Disables the conversion of multiple channels
582 * \param edsadc Pointer to the EDSADC register space
583 * \param modulatorMask the modulator which should be disabled (bitwise selection)
584 * \return None
585 *
586 * A coding example can be found in \ref IfxLld_Edsadc_Edsadc_Usage
587 *
588 */
589 IFX_INLINE void IfxEdsadc_stopScan(Ifx_EDSADC *edsadc, uint32 modulatorMask);
590
591 /******************************************************************************/
592 /*-------------------------Global Function Prototypes-------------------------*/
593 /******************************************************************************/
594
595 /** \brief Disables the module
596 * \param edsadc Pointer to Module space
597 * \return None
598 */
599 IFX_EXTERN void IfxEdsadc_disableModule(Ifx_EDSADC *edsadc);
600
601 /** \brief Enables the module
602 * \param edsadc Pointer to Module space
603 * \return None
604 */
605 IFX_EXTERN void IfxEdsadc_enableModule(Ifx_EDSADC *edsadc);
606
607 /** \brief resets EDSADC kernel
608 * \param edsadc pointer to EDSADC registers
609 * \return None
610 */
611 IFX_EXTERN void IfxEdsadc_resetModule(Ifx_EDSADC *edsadc);
612
613 /** \} */
614
615 /** \addtogroup IfxLld_Edsadc_Std_Support
616 * \{ */
617
618 /******************************************************************************/
619 /*-------------------------Inline Function Prototypes-------------------------*/
620 /******************************************************************************/
621
622 /** \brief Get the main comb decimation factor
623 * \param edsadc Pointer to the EDSADC register space
624 * \param channel Channel Id
625 * \return the main comb decimation factor
626 */
627 IFX_INLINE uint16 IfxEdsadc_getMainCombDecimation(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel);
628
629 /** \brief Get result from the main chain
630 * \param edsadc Pointer to the EDSADC register space
631 * \param channel Channel Id
632 * \return result from the main chain
633 *
634 * A coding example can be found in \ref IfxLld_Edsadc_Edsadc_Usage
635 *
636 */
637 IFX_INLINE sint16 IfxEdsadc_getMainResult(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel);
638
639 /** \brief Get the subsequent result
640 */
641 IFX_INLINE sint32 IfxEdsadc_getSubsequentResult(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel);
642
643 /** \brief Return TRUE if EDSADC module is enabled
644 * \param edsadc Pointer to the EDSADC register space
645 * \return TRUE if EDSADC module is enabled
646 */
647 IFX_INLINE boolean IfxEdsadc_isModuleEnabled(Ifx_EDSADC *edsadc);
648
649 /** \brief Set the carrier waveform mode
650 * \param edsadc Pointer to the EDSADC register space
651 * \param waveformMode the waveform mode
652 * \return None
653 */
654 IFX_INLINE void IfxEdsadc_setCarrierMode(Ifx_EDSADC *edsadc, IfxEdsadc_CarrierWaveformMode waveformMode);
655
656 /******************************************************************************/
657 /*-------------------------Global Function Prototypes-------------------------*/
658 /******************************************************************************/
659
660 /** \brief Get the sample frequency of the integrator output in Hz
661 * \param edsadc Pointer to the EDSADC register space
662 * \param channel Channel Id
663 * \return frequency in Hz
664 */
665 IFX_EXTERN float32 IfxEdsadc_getIntegratorOutFreq(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel);
666
667 /** \brief Get the sample frequency of the main COMB filter output in Hz
668 * \param edsadc Pointer to the EDSADC register space
669 * \param channel Channel Id
670 * \return frequency in Hz
671 */
672 IFX_EXTERN float32 IfxEdsadc_getMainCombOutFreq(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel);
673
674 /** \brief Estimate the group delay of main-chain filters in seconds
675 * \param edsadc Pointer to the EDSADC register space
676 * \param channel Channel Id
677 * \return delay in seconds
678 */
679 IFX_EXTERN float32 IfxEdsadc_getMainGroupDelay(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel);
680
681 /** \brief Get the modulator clock frequency in Hz
682 * \param edsadc Pointer to the EDSADC register space
683 * \param channel Channel Id
684 * \return frequency in Hz
685 */
686 IFX_EXTERN float32 IfxEdsadc_getModulatorClockFreq(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel);
687
688 /** \brief Get the input frequency of EDSADC in Hz
689 * \param edsadc Pointer to the EDSADC register space
690 * \return frequency in Hz
691 */
692 IFX_EXTERN float32 IfxEdsadc_getModulatorInputClockFreq(Ifx_EDSADC *edsadc);
693
694 /** \} */
695
696 /** \addtogroup IfxLld_Edsadc_Std_Interrupt
697 * \{ */
698
699 /******************************************************************************/
700 /*-------------------------Global Function Prototypes-------------------------*/
701 /******************************************************************************/
702
703 /** \brief Address/pointer to the interrupt source register
704 * \param edsadc Pointer to the EDSADC register space
705 * \param channel Channel Id
706 * \return Address/pointer to the interrupt source register
707 */
708 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxEdsadc_getAuxSrc(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel);
709
710 /** \brief Get the interrupt source register for a Main event
711 * \param edsadc Pointer to the EDSADC register space
712 * \param channel Channel Id
713 * \return Address/pointer to the interrupt source register
714 */
715 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxEdsadc_getMainSrc(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel);
716
717 /** \} */
718
719 /** \addtogroup IfxLld_Edsadc_Std_IO
720 * \{ */
721
722 /******************************************************************************/
723 /*-------------------------Inline Function Prototypes-------------------------*/
724 /******************************************************************************/
725
726 /** \brief Initializes a CGPWM output
727 * \param cgPwm the CGPWM Pin which should be configured
728 * \param pinMode the pin output mode which should be configured
729 * \param padDriver the pad driver mode which should be configured
730 * \return None
731 */
732 IFX_INLINE void IfxEdsadc_initCgPwmPin(const IfxEdsadc_Cgpwm_Out *cgPwm, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver);
733
734 /** \brief Initializes a CIN input
735 * \param cIn the CIN Pin which should be configured
736 * \param cInMode the pin input mode which should be configured
737 * \param padDriver Pad Driver Configuration
738 * \return None
739 */
740 IFX_INLINE void IfxEdsadc_initCinPin(const IfxEdsadc_Cin_In *cIn, IfxPort_InputMode cInMode, IfxPort_PadDriver padDriver);
741
742 /** \brief Initializes a COUT output
743 * \param cout the COUT Pin which should be configured
744 * \param pinMode the pin output mode which should be configured
745 * \param padDriver the pad driver mode which should be configured
746 * \return None
747 */
748 IFX_INLINE void IfxEdsadc_initCoutPin(const IfxEdsadc_Cout_Out *cout, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver);
749
750 /** \brief Initializes a DIN input
751 * \param dIn the DIN Pin which should be configured
752 * \param dInMode the pin input mode which should be configured
753 * \param padDriver Pad Driver Configuration
754 * \return None
755 */
756 IFX_INLINE void IfxEdsadc_initDinPin(const IfxEdsadc_Din_In *dIn, IfxPort_InputMode dInMode, IfxPort_PadDriver padDriver);
757
758 /** \brief Initializes a DS input
759 * \param dsn the DSN Pin which should be configured
760 * \param pinMode the pin input mode which should be configured
761 * \param padDriver Pad Driver Configuration
762 * \return None
763 */
764 IFX_INLINE void IfxEdsadc_initDsnPin(const IfxEdsadc_Dsn_In *dsn, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver);
765
766 /** \brief Initializes a DS input
767 * \param dsp the DSP Pin which should be configured
768 * \param pinMode the pin input mode which should be configured
769 * \param padDriver Pad Driver Configuration
770 * \return None
771 */
772 IFX_INLINE void IfxEdsadc_initDspPin(const IfxEdsadc_Dsp_In *dsp, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver);
773
774 /** \brief Initializes a ITR input
775 * \param itr the ITR Pin which should be configured
776 * \param itrMode the pin input mode which should be configured
777 * \param padDriver Pad Driver Configuration
778 * \return None
779 */
780 IFX_INLINE void IfxEdsadc_initItrPin(const IfxEdsadc_Itr_In *itr, IfxPort_InputMode itrMode, IfxPort_PadDriver padDriver);
781
782 /** \brief Initializes a SG input
783 * \param sg the SG Pin which should be configured
784 * \param pinMode the pin input mode which should be configured
785 * \param padDriver Pad Driver Configuration
786 * \return None
787 */
788 IFX_INLINE void IfxEdsadc_initSgPin(const IfxEdsadc_Sg_In *sg, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver);
789
790 /** \} */
791
792 /******************************************************************************/
793 /*-------------------------Inline Function Prototypes-------------------------*/
794 /******************************************************************************/
795
796 /** \brief Returns the positive input line configuration
797 * \param edsadc Pointer to EDSADC module SFRs
798 * \param channel Channel Number
799 * \return Positive Input Line Configuration
800 */
801 IFX_INLINE uint8 IfxEdsadc_getPositiveInputLineConfiguration(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel);
802
803 /** \brief Returns the negative input line configuration
804 * \param edsadc Pointer to EDSADC module SFRs
805 * \param channel Channel Number
806 * \return Negative Input Line Configuration
807 */
808 IFX_INLINE uint8 IfxEdsadc_getNegativeInputLineConfiguration(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel);
809
810 /** \brief Sets the Offset compensation Value
811 * \param edsadc Pointer to EDSADC module SFRs
812 * \param channel Channel Number to be configured
813 * \param value Value to be set
814 * \return None
815 */
816 IFX_INLINE void IfxEdsadc_setOffsetCompensationValue(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, uint16 value);
817
818 /** \brief Returns the address of the result register
819 * \param edsadc Pointer to EDSADC module SFRs
820 * \param channel Channel Number
821 * \return Address of the result register
822 */
823 IFX_INLINE uint32 *IfxEdsadc_getResultRegisterAddress(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel);
824
825 /******************************************************************************/
826 /*-------------------------Global Function Prototypes-------------------------*/
827 /******************************************************************************/
828
829 /** \brief set common mode voltage Parameters
830 * \param edsadc Pointer to Module space
831 * \param channel specifies channel Id
832 * \param voltage select Fractional reference Voltage
833 * \param refMode Fractional Reference Voltage Enable/ Disable
834 * \param hsvMode Enable / Disable Half Supply Voltage
835 * \param cmhvMode Enable / Disable Common Mode Hold Voltage
836 * \param positiveInput Defines the connection of the respective positive input y to the common mode hold voltage
837 * \param negativeInput Defines the connection of the respective negative input y to the common mode hold voltage.
838 * \return None
839 */
840 IFX_EXTERN void IfxEdsadc_setCommonModeVoltage(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, IfxEdsadc_FractionalRefVoltageSelection voltage, IfxEdsadc_FractionalRefVoltage refMode, IfxEdsadc_HalfSupplyVoltage hsvMode, IfxEdsadc_CommonModeHoldVoltage cmhvMode, uint8 positiveInput, uint8 negativeInput);
841
842 /** \brief configure gain correction
843 * \param edsadc Pointer to the EDSADC register space
844 * \param channel Specifies channel ID
845 * \param gainFactor Multiplication Factor for gain correction
846 * \param cicShift Position of CIC filter output shifter
847 * \return None
848 */
849 IFX_EXTERN void IfxEdsadc_setGainCorrectionFactor(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, uint16 gainFactor, uint8 cicShift);
850
851 /**
852 * \param edsadc Pointer to module space
853 * \param channel specifies channel ID
854 * \param timeStampCounterClock Time Stamp Counter Clock selection
855 * \param runControl TimeStamp Counter Run Control
856 * \param analogMuxCopy Analog MUX Setting Copy Enable
857 * \return None
858 */
859 IFX_EXTERN void IfxEdsadc_setTimeStampCounter(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, IfxEdsadc_TimeStampCounterClockSelection timeStampCounterClock, IfxEdsadc_TimeStampCounterControl runControl, IfxEdsadc_AnalogMux analogMuxCopy);
860
861 /**
862 * \param edsadc Pointer to EDSADC SFRs
863 * \param channel chanel no
864 * \param gainFactor Multiplication Factor for Gain Correction During Calibration
865 * \param cicShift Position of the CIC Filter Output Shifter During Calibration
866 * \param cicDecimationRate Decimation Rate of the CIC Filter During Calibration
867 * \return None
868 */
869 IFX_EXTERN void IfxEdsadc_setGainControl(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, uint16 gainFactor, uint8 cicShift, uint8 cicDecimationRate);
870
871 /**
872 * \param edsadc Pointer to EDSADC module SFRs
873 * \param channel Channel Number to be configured
874 * \param calFactor Multiplication Factor for Gain Calibration
875 * \param calTarget Target Value for Calibrated Fullscale
876 * \return None
877 */
878 IFX_EXTERN void IfxEdsadc_setGainCalibration(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, uint16 calFactor, uint16 calTarget);
879
880 /** \brief Set the Modulator configuration
881 * \param edsadc Pointer to EDSADC module SFRs
882 * \param channel Channel Number to be configured
883 * \param config Modulator Configuration
884 * \return None
885 */
886 IFX_EXTERN void IfxEdsadc_configureModulator(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, IfxEdsadc_ModulatorConfig *config);
887
888 /******************************************************************************/
889 /*---------------------Inline Function Implementations------------------------*/
890 /******************************************************************************/
891
892 IFX_INLINE uint16 IfxEdsadc_getMainCombDecimation(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
893 {
894 return (uint16)(1U + edsadc->CH[channel].FCFGC.B.CFMDF);
895 }
896
897
898 IFX_INLINE sint16 IfxEdsadc_getMainResult(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
899 {
900 return edsadc->CH[channel].RESM.B.RESULTLO;
901 }
902
903
904 IFX_INLINE sint32 IfxEdsadc_getSubsequentResult(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
905 {
906 return (sint32)(edsadc->CH[channel].RESM.U);
907 }
908
909
910 IFX_INLINE void IfxEdsadc_initCgPwmPin(const IfxEdsadc_Cgpwm_Out *cgPwm, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
911 {
912 if (cgPwm->pin.port != NULL_PTR)
913 {
914 IfxPort_setPinModeOutput(cgPwm->pin.port, cgPwm->pin.pinIndex, pinMode, cgPwm->select);
915 IfxPort_setPinPadDriver(cgPwm->pin.port, cgPwm->pin.pinIndex, padDriver);
916 }
917 }
918
919
920 IFX_INLINE void IfxEdsadc_initCinPin(const IfxEdsadc_Cin_In *cIn, IfxPort_InputMode cInMode, IfxPort_PadDriver padDriver)
921 {
922 if (cIn->pin.port != NULL_PTR)
923 {
924 IfxPort_setPinModeInput(cIn->pin.port, cIn->pin.pinIndex, cInMode);
925 IfxPort_setPinPadDriver(cIn->pin.port, cIn->pin.pinIndex, padDriver);
926 }
927 }
928
929
930 IFX_INLINE void IfxEdsadc_initCoutPin(const IfxEdsadc_Cout_Out *cout, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
931 {
932 if (cout->pin.port != NULL_PTR)
933 {
934 IfxPort_setPinModeOutput(cout->pin.port, cout->pin.pinIndex, pinMode, cout->select);
935 IfxPort_setPinPadDriver(cout->pin.port, cout->pin.pinIndex, padDriver);
936 }
937 }
938
939
940 IFX_INLINE void IfxEdsadc_initDinPin(const IfxEdsadc_Din_In *dIn, IfxPort_InputMode dInMode, IfxPort_PadDriver padDriver)
941 {
942 if (dIn->pin.port != NULL_PTR)
943 {
944 IfxPort_setPinModeInput(dIn->pin.port, dIn->pin.pinIndex, dInMode);
945 IfxPort_setPinPadDriver(dIn->pin.port, dIn->pin.pinIndex, padDriver);
946 }
947 }
948
949
950 IFX_INLINE void IfxEdsadc_initDsnPin(const IfxEdsadc_Dsn_In *dsn, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
951 {
952 if (dsn->pin.port != NULL_PTR)
953 {
954 IfxPort_setPinModeInput(dsn->pin.port, dsn->pin.pinIndex, pinMode);
955 IfxPort_setPinPadDriver(dsn->pin.port, dsn->pin.pinIndex, padDriver);
956 }
957 }
958
959
960 IFX_INLINE void IfxEdsadc_initDspPin(const IfxEdsadc_Dsp_In *dsp, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
961 {
962 if (dsp->pin.port != NULL_PTR)
963 {
964 IfxPort_setPinModeInput(dsp->pin.port, dsp->pin.pinIndex, pinMode);
965 IfxPort_setPinPadDriver(dsp->pin.port, dsp->pin.pinIndex, padDriver);
966 }
967 }
968
969
970 IFX_INLINE void IfxEdsadc_initItrPin(const IfxEdsadc_Itr_In *itr, IfxPort_InputMode itrMode, IfxPort_PadDriver padDriver)
971 {
972 if (itr->pin.port != NULL_PTR)
973 {
974 IfxPort_setPinModeInput(itr->pin.port, itr->pin.pinIndex, itrMode);
975 IfxPort_setPinPadDriver(itr->pin.port, itr->pin.pinIndex, padDriver);
976 }
977 }
978
979
980 IFX_INLINE void IfxEdsadc_initSgPin(const IfxEdsadc_Sg_In *sg, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
981 {
982 if (sg->pin.port != NULL_PTR)
983 {
984 IfxPort_setPinModeInput(sg->pin.port, sg->pin.pinIndex, pinMode);
985 IfxPort_setPinPadDriver(sg->pin.port, sg->pin.pinIndex, padDriver);
986 }
987 }
988
989
990 IFX_INLINE boolean IfxEdsadc_isModuleEnabled(Ifx_EDSADC *edsadc)
991 {
992 return edsadc->CLC.B.DISS == 0;
993 }
994
995
996 IFX_INLINE boolean IfxEdsadc_isModuleSuspended(Ifx_EDSADC *edsadc)
997 {
998 boolean status = FALSE;
999
1000 if (edsadc->OCS.B.SUSSTA == 1)
1001 {
1002 status = TRUE;
1003 }
1004 else
1005 {
1006 status = FALSE;
1007 }
1008
1009 return status;
1010 }
1011
1012
1013 IFX_INLINE void IfxEdsadc_setCarrierMode(Ifx_EDSADC *edsadc, IfxEdsadc_CarrierWaveformMode waveformMode)
1014 {
1015 edsadc->CGCFG.B.CGMOD = waveformMode;
1016 }
1017
1018
1019 IFX_INLINE void IfxEdsadc_setSleepMode(Ifx_EDSADC *edsadc, IfxEdsadc_SleepMode mode)
1020 {
1021 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
1022 IfxScuWdt_clearCpuEndinit(passwd);
1023 edsadc->CLC.B.EDIS = mode;
1024 IfxScuWdt_setCpuEndinit(passwd);
1025 }
1026
1027
1028 IFX_INLINE void IfxEdsadc_setSuspendMode(Ifx_EDSADC *edsadc, IfxEdsadc_SuspendMode mode)
1029 {
1030 Ifx_EDSADC_OCS ocs;
1031
1032 ocs.U = edsadc->OCS.U;
1033
1034 // remove protection and configure the suspend mode.
1035 ocs.B.SUS_P = 1;
1036 ocs.B.SUS = mode;
1037 edsadc->OCS.U = ocs.U;
1038 }
1039
1040
1041 IFX_INLINE void IfxEdsadc_startScan(Ifx_EDSADC *edsadc, uint32 modulatorMask, uint32 channelMask)
1042 {
1043 edsadc->GLOBRC.U = edsadc->GLOBRC.U | ((modulatorMask << 16) | (channelMask));
1044 }
1045
1046
1047 IFX_INLINE void IfxEdsadc_stopScan(Ifx_EDSADC *edsadc, uint32 modulatorMask)
1048 {
1049 edsadc->GLOBRC.U &= ~(modulatorMask << 16);
1050 }
1051
1052
1053 IFX_INLINE uint8 IfxEdsadc_getPositiveInputLineConfiguration(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
1054 {
1055 return edsadc->CH[channel].MODCFG.B.INCFGP;
1056 }
1057
1058
1059 IFX_INLINE uint8 IfxEdsadc_getNegativeInputLineConfiguration(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
1060 {
1061 return edsadc->CH[channel].MODCFG.B.INCFGN;
1062 }
1063
1064
1065 IFX_INLINE void IfxEdsadc_setOffsetCompensationValue(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, uint16 value)
1066 {
1067 edsadc->CH[channel].OFFCOMP.B.OFFSET = value;
1068 }
1069
1070
1071 IFX_INLINE uint32 *IfxEdsadc_getResultRegisterAddress(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
1072 {
1073 return (uint32 *)&(edsadc->CH[channel].RESM.U);
1074 }
1075
1076
1077 #endif /* IFXEDSADC_H */
IfxEdsadc_DataRead
IfxEdsadc_DataRead
Select the data to be returned when register RESM is read Definition in Ifx_DSADC.DICFG.B.DRM.
Definition: IfxEdsadc.h:122
IfxEdsadc_TriggerInput_a
GTM EDSADC Trigger 0.
Definition: IfxEdsadc.h:475
IfxEdsadc_SupplyVoltageLevel_automaticControl
voltage range is controlled by the power supply
Definition: IfxEdsadc.h:435
IfxEdsadc_RestartFilterChain
IfxEdsadc_RestartFilterChain
Restart the filter chain when an integration window starts.
Definition: IfxEdsadc.h:376
IfxEdsadc_IntegrationWindowSize_internalControl
Internal control: stop integrator after REPVAL+1 integration cycles.
Definition: IfxEdsadc.h:287
IfxEdsadc_IntegrationWindowSize_externalControl
External control: stop integrator when bit INTEN becomes 0.
Definition: IfxEdsadc.h:288
IfxEdsadc_InputPin_a
Pin A connected to modulator input.
Definition: IfxEdsadc.h:263
IfxEdsadc_TimeStampCounterClockSelection_div2
fTSTMP = fMOD/2
Definition: IfxEdsadc.h:454
IfxEdsadc_MainServiceRequest_never
Never, service requests disabled.
Definition: IfxEdsadc.h:308
IfxEdsadc_TimestampTrigger_fallingEdge
Trigger event upon a falling edge.
Definition: IfxEdsadc.h:465
IfxEdsadc_InputGain_factor16
Input gain factor: 16.
Definition: IfxEdsadc.h:245
IfxEdsadc_FilterStrength_minimum
Minimum filter effect, early attenuation, linear operation.
Definition: IfxEdsadc.h:178
IfxEdsadc_TriggerInput_i
Trigger/gate, channel 0,input I.
Definition: IfxEdsadc.h:483
IfxEdsadc_StepDetectionMode_lastInput
Compare threshold to difference of current and last input.
Definition: IfxEdsadc.h:426
IfxEdsadc_DataStream_onChipModulator
select data stream from on chip modulator
Definition: IfxEdsadc.h:134
IfxEdsadc_SleepMode_enable
enables sleep mode
Definition: IfxEdsadc.h:418
IfxEdsadc_dithering_disabled
dithering function disabled
Definition: IfxEdsadc.h:498
IfxEdsadc_ModulatorClockDivider
IfxEdsadc_ModulatorClockDivider
Modulator divider factor for modulator clock Definition in Ifx_EDSADC.MODCFGx.B.DIVM.
Definition: IfxEdsadc.h:317
IfxEdsadc_SuspendMode_soft
Soft Suspend.
Definition: IfxEdsadc.h:446
IfxEdsadc_Cgpwm_Out
CGPWM pin mapping structure.
Definition: IfxEdsadc_PinMap.h:119
IfxEdsadc_TriggerInput_g
ERU pattern detection output 0.
Definition: IfxEdsadc.h:481
IfxEdsadc_SampleClockSource_inputB
External clock, from Input B.
Definition: IfxEdsadc.h:398
IfxEdsadc_ModulatorClockDivider_div12
f_mod = f_clk / 12
Definition: IfxEdsadc.h:323
IfxEdsadc_IntegrationShiftControl_0
Integration Shift value.
Definition: IfxEdsadc.h:274
IfxEdsadc_InputMuxControlMode_always
Trigger event on any edge.
Definition: IfxEdsadc.h:255
IfxEdsadc_OvershootCompensation_disabled
Disabled, feed FIR filter directly.
Definition: IfxEdsadc.h:358
IfxEdsadc_DataStream_directFallingClockEdge
External modulator, use each falling clock edge.
Definition: IfxEdsadc.h:136
IfxEdsadc_EventSelect_outsideBoundry
If result is outside the boundary band.
Definition: IfxEdsadc.h:160
IfxEdsadc_SleepMode
IfxEdsadc_SleepMode
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_EDSADC.CLC.B.EDIS.
Definition: IfxEdsadc.h:416
IfxEdsadc_Din_In
DIN pin mapping structure.
Definition: IfxEdsadc_PinMap.h:83
IfxEdsadc_RestartFilterChain_off
Definition: IfxEdsadc.h:379
IfxEdsadc_ModulatorClockDivider_div10
f_mod = f_clk / 10
Definition: IfxEdsadc.h:322
IfxEdsadc_Cin_In
CIN pin mapping structure.
Definition: IfxEdsadc_PinMap.h:74
IfxEdsadc_disableModule
IFX_EXTERN void IfxEdsadc_disableModule(Ifx_EDSADC *edsadc)
Disables the module.
Definition: IfxEdsadc.c:52
IfxEdsadc_FractionalRefVoltageSelection
IfxEdsadc_FractionalRefVoltageSelection
Fraction reference voltage selection.
Definition: IfxEdsadc.h:194
IfxEdsadc_Cout_Out
COUT pin mapping structure.
Definition: IfxEdsadc_PinMap.h:144
IfxEdsadc_TriggerInput_l
GTM ADC Trigger 3.
Definition: IfxEdsadc.h:486
IfxEdsadc_InputPin
IfxEdsadc_InputPin
Modulator input pin selection Definition in Ifx_DSADC.MODCFGx.B.INMUX.
Definition: IfxEdsadc.h:261
IfxEdsadc_FractionalRefVoltageSelection_div4
VREFX = VAREF / 4.
Definition: IfxEdsadc.h:197
IfxEdsadc_AnalogClockSyncDelay_cycleDelay2
Delay of 2 Cycle.
Definition: IfxEdsadc.h:81
IfxEdsadc_ModulatorClockDivider_div16
f_mod = f_clk / 16
Definition: IfxEdsadc.h:325
IfxEdsadc_InputPin_b
Pin B connected to modulator input.
Definition: IfxEdsadc.h:264
IfxEdsadc_FractionalRefVoltage_disable
VREFX is not connected.
Definition: IfxEdsadc.h:188
IfxEdsadc_ModulatorClockGeneration
IfxEdsadc_ModulatorClockGeneration
Defines the way the modulator clock is generated Definition in Ifx_DSADC.GLOBCFG.B.USC.
Definition: IfxEdsadc.h:332
IfxEdsadc_InputDataSource
IfxEdsadc_InputDataSource
Demodulator input data source selection Definition in Ifx_EDSADC.DICFG.B.DSRC.
Definition: IfxEdsadc.h:224
IfxEdsadc_TriggerInput_b
GTM EDSADC Trigger 1.
Definition: IfxEdsadc.h:476
IfxEdsadc_enableModule
IFX_EXTERN void IfxEdsadc_enableModule(Ifx_EDSADC *edsadc)
Enables the module.
Definition: IfxEdsadc.c:62
IfxEdsadc_setSuspendMode
IFX_INLINE void IfxEdsadc_setSuspendMode(Ifx_EDSADC *edsadc, IfxEdsadc_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and...
Definition: IfxEdsadc.h:1028
IfxEdsadc_FractionalRefVoltageSelection_div16
VREFX = VAREF / 2.
Definition: IfxEdsadc.h:199
IfxEdsadc_TriggerInput_h
Trigger/gate, channel 0,input H.
Definition: IfxEdsadc.h:482
IfxEdsadc_InputMuxControlMode_softwareControl
Trigger Event by software (INMUX follows INSEL)
Definition: IfxEdsadc.h:252
IfxEdsadc_FilterStrength_maximum
maximum filter effect
Definition: IfxEdsadc.h:181
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:140
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxEdsadc_AnalogClockSyncDelay_cycleDelay5
Delay of 5 Cycle.
Definition: IfxEdsadc.h:84
IfxEdsadc_DataStream_doubleDataClockEdge
External modulator, use rising and falling clock edge.
Definition: IfxEdsadc.h:135
IfxEdsadc_initCgPwmPin
IFX_INLINE void IfxEdsadc_initCgPwmPin(const IfxEdsadc_Cgpwm_Out *cgPwm, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a CGPWM output.
Definition: IfxEdsadc.h:910
IfxEdsadc_InputMuxControlMode
IfxEdsadc_InputMuxControlMode
specifies input multiplexer control mode defined in MODULE_EDSADC.MODCFG.B.INMODE ...
Definition: IfxEdsadc.h:250
IfxEdsadc_getModulatorClockFreq
IFX_EXTERN float32 IfxEdsadc_getModulatorClockFreq(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
Get the modulator clock frequency in Hz.
Definition: IfxEdsadc.c:168
float32
float float32
Definition: Platform_Types.h:170
IfxEdsadc_DataStream_directRisingClockEdge
External modulator, use each rising clock edge.
Definition: IfxEdsadc.h:137
IfxEdsadc_ServiceRequestFifolevel_3
Generate a service request when Fifo contain level 3 Value.
Definition: IfxEdsadc.h:409
IfxEdsadc_TriggerInput_p
Trigger/gate, channel 0,input P.
Definition: IfxEdsadc.h:490
IfxEdsadc_configureModulator
IFX_EXTERN void IfxEdsadc_configureModulator(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, IfxEdsadc_ModulatorConfig *config)
Set the Modulator configuration.
Definition: IfxEdsadc.c:270
IfxEdsadc_StepDetectionMode_secondlastInput
Compare threshold to difference of current and second-last input.
Definition: IfxEdsadc.h:427
IfxEdsadc_initItrPin
IFX_INLINE void IfxEdsadc_initItrPin(const IfxEdsadc_Itr_In *itr, IfxPort_InputMode itrMode, IfxPort_PadDriver padDriver)
Initializes a ITR input.
Definition: IfxEdsadc.h:970
IfxEdsadc_setGainControl
IFX_EXTERN void IfxEdsadc_setGainControl(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, uint16 gainFactor, uint8 cicShift, uint8 cicDecimationRate)
Definition: IfxEdsadc.c:248
IfxEdsadc_IntegratorTrigger_alwaysActive
No trigger, integrator active all the time.
Definition: IfxEdsadc.h:300
IfxEdsadc_SleepMode_disable
disables sleep mode
Definition: IfxEdsadc.h:419
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:322
IfxEdsadc_ModulatorConfig::ditheringEnabled
IfxEdsadc_dithering ditheringEnabled
Control the Dithering Function for each modulator.
Definition: IfxEdsadc.h:534
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxEdsadc_InputDataSource_directInputD
External, from input D, direct.
Definition: IfxEdsadc.h:232
IfxEdsadc_RectifierSignSource_externalB
External sign signal B.
Definition: IfxEdsadc.h:371
IfxEdsadc_initCinPin
IFX_INLINE void IfxEdsadc_initCinPin(const IfxEdsadc_Cin_In *cIn, IfxPort_InputMode cInMode, IfxPort_PadDriver padDriver)
Initializes a CIN input.
Definition: IfxEdsadc.h:920
IfxSrc.h
SRC basic functionality.
IfxEdsadc_DitheringIntensity
IfxEdsadc_DitheringIntensity
Trimming Value for Dithering function Definition in Ifx_DSADC.GLOBCFG.B.DITRIM.
Definition: IfxEdsadc.h:145
IfxEdsadc_MainServiceRequest
IfxEdsadc_MainServiceRequest
Service request generation (main chain) Definition in Ifx_EDSADC.FCFGM.B.SRGM.
Definition: IfxEdsadc.h:306
IfxEdsadc_OffsetCompensationFilter_enablewithRateA
Enable offset compensation filter, adjust OFFCOMP with rate A.
Definition: IfxEdsadc.h:344
IfxEdsadc_EventSelect
IfxEdsadc_EventSelect
Define when comparator event is generated Definition in Ifx_DSADC.FCFGM.B.ESEL.
Definition: IfxEdsadc.h:156
IfxCpu_Intrinsics.h
IfxEdsadc_ServiceRequestFifolevel
IfxEdsadc_ServiceRequestFifolevel
Service request fifo level Definition in Ifx_EDSADC.RFC.B.SRLVL.
Definition: IfxEdsadc.h:405
IfxEdsadc_FractionalRefVoltage
IfxEdsadc_FractionalRefVoltage
Fractional Reference Voltage Enable.
Definition: IfxEdsadc.h:186
IfxEdsadc_DataRead_double
Double: Issue two 16-bit values per read access.
Definition: IfxEdsadc.h:126
IfxEdsadc_TriggerInput_f
Trigger/gate via port input P33.4.
Definition: IfxEdsadc.h:480
IfxEdsadc_SampleClockSource_internal
Internal clock.
Definition: IfxEdsadc.h:396
IfxEdsadc_getNegativeInputLineConfiguration
IFX_INLINE uint8 IfxEdsadc_getNegativeInputLineConfiguration(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
Returns the negative input line configuration.
Definition: IfxEdsadc.h:1059
IfxEdsadc_FilterStrength
IfxEdsadc_FilterStrength
Specifies Slew Rate Filter Strength.
Definition: IfxEdsadc.h:176
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxEdsadc_InputPin_c
Pin C connected to modulator input.
Definition: IfxEdsadc.h:265
IfxEdsadc_InputDataSource_directInputC
External, from input C, direct.
Definition: IfxEdsadc.h:230
IfxEdsadc_ModulatorClockDivider_div8
f_mod = f_clk / 8
Definition: IfxEdsadc.h:321
IfxEdsadc_getMainCombDecimation
IFX_INLINE uint16 IfxEdsadc_getMainCombDecimation(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
Get the main comb decimation factor.
Definition: IfxEdsadc.h:892
IfxEdsadc_InputConfig
IfxEdsadc_InputConfig
Modulator configuration of positive/negative input line Definition in Ifx_DSADC.MODCFGx.B.INCFGP and Ifx_DSADC.MODCFGx.B.INCFGN.
Definition: IfxEdsadc.h:213
IfxEdsadc_getMainSrc
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxEdsadc_getMainSrc(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
Get the interrupt source register for a Main event.
Definition: IfxEdsadc.c:161
IfxPort_setPinModeInput
IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode.
Definition: IfxPort.h:669
IfxEdsadc_InputDataSource_directInputA
External, from input A, direct.
Definition: IfxEdsadc.h:226
IfxEdsadc_ModulatorConfig::analogClockSyncDelay
IfxEdsadc_AnalogClockSyncDelay analogClockSyncDelay
Define the delay in clock cycle after sync signal.
Definition: IfxEdsadc.h:530
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxEdsadc_InputDataSource_invertedInputA
External, from input A, inverted.
Definition: IfxEdsadc.h:227
IfxEdsadc_TriggerInput
IfxEdsadc_TriggerInput
Trigger select Definition in Ifx_EDSADC.DICFG.B.TRSEL.
Definition: IfxEdsadc.h:473
IfxEdsadc_ModulatorConfig::negativeInput
IfxEdsadc_InputConfig negativeInput
Modulator configuration of negative input line.
Definition: IfxEdsadc.h:532
IfxEdsadc_FractionalRefVoltageSelection_div2
VREFX = VAREF / 2.
Definition: IfxEdsadc.h:196
IfxEdsadc_ModulatorClockDivider_div4
f_mod = f_clk / 4
Definition: IfxEdsadc.h:319
IfxEdsadc_IntegrationShiftControl
IfxEdsadc_IntegrationShiftControl
Controls the data shifter after the integrator that selects the portion of the integrator data for th...
Definition: IfxEdsadc.h:272
IfxEdsadc_AnalogMux_copyAmx
Copy AMX to bits TIMESTAMP[15:14], timestamp uses lower 14 bits.
Definition: IfxEdsadc.h:509
IfxEdsadc_FilterRunTimeInputCycle_8
8 input cycles
Definition: IfxEdsadc.h:170
IfxEdsadc_MainServiceRequest_highGateSignal
While gate (selected trigger signal) is high.
Definition: IfxEdsadc.h:309
IfxEdsadc_IntegrationWindowSize
IfxEdsadc_IntegrationWindowSize
Integrator window size Definition in Ifx_DSADC.IWCTR.B.IWS.
Definition: IfxEdsadc.h:285
IfxEdsadc_setOffsetCompensationValue
IFX_INLINE void IfxEdsadc_setOffsetCompensationValue(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, uint16 value)
Sets the Offset compensation Value.
Definition: IfxEdsadc.h:1065
IfxEdsadc_AuxServiceRequest_timestampEvent
Timestamp Event.
Definition: IfxEdsadc.h:96
IfxEdsadc_InputGain
IfxEdsadc_InputGain
Modulator gain select of analog input path Definition in Ifx_DSADC.MODCFGx.B.GAINSEL.
Definition: IfxEdsadc.h:239
IfxEdsadc_AnalogClockSyncDelay_cycleDelay4
Delay of 4 Cycle.
Definition: IfxEdsadc.h:83
IfxEdsadc_TriggerInput_e
Trigger/gate via port input P33.0.
Definition: IfxEdsadc.h:479
IfxEdsadc_TimeStampCounterClockSelection
IfxEdsadc_TimeStampCounterClockSelection
Time Stamp Counter Clock Selection.
Definition: IfxEdsadc.h:451
IfxEdsadc_OvershootCompensation
IfxEdsadc_OvershootCompensation
Overshoot Compensation Enable. Defined in fx_DSADC.FCFGM.B.OVCEN.
Definition: IfxEdsadc.h:356
IfxEdsadc_AnalogMux
IfxEdsadc_AnalogMux
Allows copying of bitfield AMX into bitfield TIMESTAMP.
Definition: IfxEdsadc.h:506
sint16
short sint16
Definition: Platform_Types.h:129
IfxEdsadc_InputDataSource_directInputB
External, from input B, direct.
Definition: IfxEdsadc.h:228
IfxEdsadc_TimeStampCounterControl_on
Timestamp counter is counting at the rate selected by bitfield TSCLK.
Definition: IfxEdsadc.h:517
IfxEdsadc_IntegratorTrigger_fallingEdge
Trigger event upon a falling edge.
Definition: IfxEdsadc.h:298
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxEdsadc_IntegrationShiftControl_5
Integration Shift value.
Definition: IfxEdsadc.h:279
IfxEdsadc_initDinPin
IFX_INLINE void IfxEdsadc_initDinPin(const IfxEdsadc_Din_In *dIn, IfxPort_InputMode dInMode, IfxPort_PadDriver padDriver)
Initializes a DIN input.
Definition: IfxEdsadc.h:940
IfxEdsadc_RectifierSignSource
IfxEdsadc_RectifierSignSource
Rectifier sign source Selects the sign signal that is to be delayed. Definition in Ifx_DSADC...
Definition: IfxEdsadc.h:366
IfxEdsadc_TimeStampCounterClockSelection_div8
fTSTMP = fMOD/8
Definition: IfxEdsadc.h:456
IfxEdsadc_SampleClockSource
IfxEdsadc_SampleClockSource
Demodulator sample clock source select Definition in Ifx_EDSADC.DICFG.B.CSRC.
Definition: IfxEdsadc.h:394
IfxEdsadc_InputMuxControlMode_fallingEdge
Trigger Event on Falling edge.
Definition: IfxEdsadc.h:253
IfxEdsadc_ServiceRequestFifolevel_2
Generate a service request when Fifo contain level 2 Value.
Definition: IfxEdsadc.h:408
IfxEdsadc_ChannelId
IfxEdsadc_ChannelId
Specifies the channel Index.
Definition: IfxEdsadc_cfg.h:70
IfxEdsadc_setGainCalibration
IFX_EXTERN void IfxEdsadc_setGainCalibration(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, uint16 calFactor, uint16 calTarget)
Definition: IfxEdsadc.c:260
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxEdsadc_ModulatorConfig::inputMuxActionControl
boolean inputMuxActionControl
Defines the mechanism by which the input multiplexer is controlled.
Definition: IfxEdsadc.h:536
IfxEdsadc_FilterRunTimeInputCycle_16
16 input cycles
Definition: IfxEdsadc.h:171
IfxEdsadc_InputGain_factor1
Input gain factor: 1.
Definition: IfxEdsadc.h:241
IfxEdsadc_OffsetCompensationFilter_disabled
Offset Compensation filter disabled.
Definition: IfxEdsadc.h:343
IfxEdsadc_FractionalRefVoltageSelection_div8
VREFX = VAREF / 8.
Definition: IfxEdsadc.h:198
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxEdsadc_ResultDisplayMode_signed
Signed: result values range from -215 to +215.
Definition: IfxEdsadc.h:387
IfxEdsadc_DataRead_signOnHighbit
Single: Issue one 16-bit value per read access (sign on high bits)
Definition: IfxEdsadc.h:124
IfxEdsadc_MainServiceRequest_lowGateSignal
While gate (selected trigger signal) is low.
Definition: IfxEdsadc.h:310
IfxEdsadc_OffsetCompensationFilter_enablewithRateG
Enable offset compensation filter, adjust OFFCOMP with rate G.
Definition: IfxEdsadc.h:350
IfxEdsadc_SupplyVoltageLevel_lowerVoltage
Lower voltage range: assume a 3.3 V power supply is connected.
Definition: IfxEdsadc.h:437
IfxEdsadc_dithering_enabled
dithering function enabled
Definition: IfxEdsadc.h:499
IfxEdsadc_AnalogClockSyncDelay_cycleDelay3
Delay of 3 Cycle.
Definition: IfxEdsadc.h:82
IfxEdsadc_InputGain_factor8
Input gain factor: 8.
Definition: IfxEdsadc.h:244
IfxEdsadc_getResultRegisterAddress
IFX_INLINE uint32 * IfxEdsadc_getResultRegisterAddress(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
Returns the address of the result register.
Definition: IfxEdsadc.h:1071
IfxEdsadc_AuxServiceRequest_never
Never, service requests disabled.
Definition: IfxEdsadc.h:94
IfxEdsadc_InputConfig_supplyVoltage
Modulator input connected to supply voltage V_ddm.
Definition: IfxEdsadc.h:216
IfxEdsadc_getSubsequentResult
IFX_INLINE sint32 IfxEdsadc_getSubsequentResult(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
Get the subsequent result.
Definition: IfxEdsadc.h:904
IfxEdsadc_InputGain_factor4
Input gain factor: 4.
Definition: IfxEdsadc.h:243
IfxEdsadc_OffsetCompensationFilter_enablewithRateB
Enable offset compensation filter, adjust OFFCOMP with rate B.
Definition: IfxEdsadc.h:345
IfxEdsadc_getMainGroupDelay
IFX_EXTERN float32 IfxEdsadc_getMainGroupDelay(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
Estimate the group delay of main-chain filters in seconds.
Definition: IfxEdsadc.c:112
IfxEdsadc_setSleepMode
IFX_INLINE void IfxEdsadc_setSleepMode(Ifx_EDSADC *edsadc, IfxEdsadc_SleepMode mode)
Sets the sensitivity of the module to sleep signal.
Definition: IfxEdsadc.h:1019
IfxEdsadc_FilterRunTimeInputCycle
IfxEdsadc_FilterRunTimeInputCycle
Defines the duration of the additional filter effect, based on values input to the filter...
Definition: IfxEdsadc.h:166
IfxEdsadc_SampleClockSource_inputC
External clock, from Input C.
Definition: IfxEdsadc.h:399
IfxEdsadc_RectifierSignSource_externalA
External sign signal A.
Definition: IfxEdsadc.h:370
IfxEdsadc_AnalogClockSyncDelay_cycleDelay1
Delay of 1 Cycle.
Definition: IfxEdsadc.h:80
IfxEdsadc_stopScan
IFX_INLINE void IfxEdsadc_stopScan(Ifx_EDSADC *edsadc, uint32 modulatorMask)
Disables the conversion of multiple channels.
Definition: IfxEdsadc.h:1047
IfxEdsadc_DataStream_secondRisingClockEdge
External modulator, use every 2nd rising clock edge.
Definition: IfxEdsadc.h:139
IfxEdsadc_TriggerInput_k
GTM ADC Trigger 2.
Definition: IfxEdsadc.h:485
IfxEdsadc_AnalogClockSyncDelay_cycleDelay6
Delay of 6 Cycle.
Definition: IfxEdsadc.h:85
IfxEdsadc_TimeStampCounterControl_off
Timestamp counter is off.
Definition: IfxEdsadc.h:516
IfxEdsadc_ModulatorConfig::integratorResetEnabled
boolean integratorResetEnabled
Control the modulator overload handling.
Definition: IfxEdsadc.h:535
IfxEdsadc_IntegrationShiftControl_1
Integration Shift value.
Definition: IfxEdsadc.h:275
IfxEdsadc_IntegrationShiftControl_3
Integration Shift value.
Definition: IfxEdsadc.h:277
IfxEdsadc_EventSelect_everyNewResult
Always, for each new result value.
Definition: IfxEdsadc.h:158
IfxEdsadc_ModulatorConfig::inputPin
IfxEdsadc_InputPin inputPin
Modulator input pin selection.
Definition: IfxEdsadc.h:533
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:249
IfxEdsadc_TimestampTrigger
IfxEdsadc_TimestampTrigger
Timestamp trigger mode Definition in Ifx_EDSADC.DICFG.B.TSTRMODE.
Definition: IfxEdsadc.h:462
IfxEdsadc_Sg_In
SG pin mapping structure.
Definition: IfxEdsadc_PinMap.h:127
IfxEdsadc_ModulatorClockDivider_div14
f_mod = f_clk / 14
Definition: IfxEdsadc.h:324
IfxEdsadc_PinMap.h
EDSADC I/O map.
IfxEdsadc_HalfSupplyVoltage_enable
VDDM / 2 is connected.
Definition: IfxEdsadc.h:207
IfxEdsadc_InputConfig_referenceGround
Modulator input connected to reference ground V_ref.
Definition: IfxEdsadc.h:218
IfxEdsadc_ModulatorConfig::positiveInput
IfxEdsadc_InputConfig positiveInput
Modulator configuration of positive input line.
Definition: IfxEdsadc.h:531
IfxEdsadc_TimeStampCounterClockSelection_div1
fTSTMP = fMOD
Definition: IfxEdsadc.h:453
IfxEdsadc_Cgpwm_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxEdsadc_PinMap.h:123
IfxEdsadc_FilterStrength_medium
Medium filter effect.
Definition: IfxEdsadc.h:180
IfxEdsadc_AuxServiceRequest_compEvent
As selected by bitfield ESEL.
Definition: IfxEdsadc.h:95
IfxEdsadc_Dsn_In
DS negative pin mapping structure.
Definition: IfxEdsadc_PinMap.h:56
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:151
IfxEdsadc_DitheringIntensity_high
High.
Definition: IfxEdsadc.h:150
IfxEdsadc_setCommonModeVoltage
IFX_EXTERN void IfxEdsadc_setCommonModeVoltage(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, IfxEdsadc_FractionalRefVoltageSelection voltage, IfxEdsadc_FractionalRefVoltage refMode, IfxEdsadc_HalfSupplyVoltage hsvMode, IfxEdsadc_CommonModeHoldVoltage cmhvMode, uint8 positiveInput, uint8 negativeInput)
set common mode voltage Parameters
Definition: IfxEdsadc.c:211
IfxEdsadc_isModuleEnabled
IFX_INLINE boolean IfxEdsadc_isModuleEnabled(Ifx_EDSADC *edsadc)
Return TRUE if EDSADC module is enabled.
Definition: IfxEdsadc.h:990
IfxEdsadc_InputGain_factor2
Input gain factor: 2.
Definition: IfxEdsadc.h:242
IfxEdsadc_InputConfig_commonModeVoltage
Modulator input connected to common mode voltage V_cm.
Definition: IfxEdsadc.h:217
IfxEdsadc_getIntegratorOutFreq
IFX_EXTERN float32 IfxEdsadc_getIntegratorOutFreq(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
Get the sample frequency of the integrator output in Hz.
Definition: IfxEdsadc.c:83
IfxEdsadc_SuspendMode
IfxEdsadc_SuspendMode
OCDS Suspend Control (OCDS.SUS)
Definition: IfxEdsadc.h:442
IfxEdsadc_initSgPin
IFX_INLINE void IfxEdsadc_initSgPin(const IfxEdsadc_Sg_In *sg, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a SG input.
Definition: IfxEdsadc.h:980
IfxEdsadc_TriggerInput_c
GTM ADC Trigger 0.
Definition: IfxEdsadc.h:477
IfxEdsadc_TimestampTrigger_eachEdge
Trigger event upon each edge.
Definition: IfxEdsadc.h:467
IfxEdsadc_InputDataSource_invertedInputD
External, from input D, inverted.
Definition: IfxEdsadc.h:233
IfxEdsadc_RectifierSignSource_nextChannel
Sign of result of next channel.
Definition: IfxEdsadc.h:369
IfxEdsadc_AnalogClockSyncDelay_cycleDelay7
Delay of 7 Cycle.
Definition: IfxEdsadc.h:86
IfxEdsadc_RestartFilterChain_on
Definition: IfxEdsadc.h:378
IfxEdsadc_DataStream_secondFallingClockEdge
External modulator, use every 2nd falling clock edge.
Definition: IfxEdsadc.h:138
IfxEdsadc_getPositiveInputLineConfiguration
IFX_INLINE uint8 IfxEdsadc_getPositiveInputLineConfiguration(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
Returns the positive input line configuration.
Definition: IfxEdsadc.h:1053
IfxEdsadc_TriggerInput_n
GTM DSADC Trigger 3.
Definition: IfxEdsadc.h:488
IfxEdsadc_CommonModeHoldVoltage
IfxEdsadc_CommonModeHoldVoltage
Common Mode Hold Voltage Enable.
Definition: IfxEdsadc.h:113
IfxEdsadc_IntegrationShiftControl_2
Integration Shift value.
Definition: IfxEdsadc.h:276
IfxEdsadc_InputDataSource_invertedInputB
External, from input B, inverted.
Definition: IfxEdsadc.h:229
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxEdsadc_initDsnPin
IFX_INLINE void IfxEdsadc_initDsnPin(const IfxEdsadc_Dsn_In *dsn, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a DS input.
Definition: IfxEdsadc.h:950
IfxEdsadc_setCarrierMode
IFX_INLINE void IfxEdsadc_setCarrierMode(Ifx_EDSADC *edsadc, IfxEdsadc_CarrierWaveformMode waveformMode)
Set the carrier waveform mode.
Definition: IfxEdsadc.h:1013
IfxEdsadc_OffsetCompensationFilter
IfxEdsadc_OffsetCompensationFilter
Enable the offset compensation filter Definition in Ifx_DSADC.FCFGM.B.OCEN.
Definition: IfxEdsadc.h:341
IfxEdsadc_IntegratorTrigger_risingEdge
Trigger event upon a rising edge.
Definition: IfxEdsadc.h:299
IfxEdsadc_DataStream
IfxEdsadc_DataStream
Data stream select Definition in Ifx_DSADC.DICFG.B.DSS.
Definition: IfxEdsadc.h:132
IfxEdsadc_CarrierWaveformMode_sine
Carrier Generator generates sine wave.
Definition: IfxEdsadc.h:108
IfxEdsadc_resetModule
IFX_EXTERN void IfxEdsadc_resetModule(Ifx_EDSADC *edsadc)
resets EDSADC kernel
Definition: IfxEdsadc.c:192
IfxEdsadc_FilterRunTimeInputCycle_4
4 input cycles
Definition: IfxEdsadc.h:169
IfxEdsadc_getModulatorInputClockFreq
IFX_EXTERN float32 IfxEdsadc_getModulatorInputClockFreq(Ifx_EDSADC *edsadc)
Get the input frequency of EDSADC in Hz.
Definition: IfxEdsadc.c:176
IfxEdsadc_ModulatorClockDivider_div6
f_mod = f_clk / 6
Definition: IfxEdsadc.h:320
IfxEdsadc_CarrierWaveformMode_triangle
Carrier Generator generates triangle wave.
Definition: IfxEdsadc.h:107
IfxEdsadc_ModulatorConfig::inputGain
IfxEdsadc_InputGain inputGain
Modulator gain select of analog input path.
Definition: IfxEdsadc.h:529
IfxEdsadc_initCoutPin
IFX_INLINE void IfxEdsadc_initCoutPin(const IfxEdsadc_Cout_Out *cout, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a COUT output.
Definition: IfxEdsadc.h:930
IfxEdsadc_FilterStrength_weak
Weak filter effect.
Definition: IfxEdsadc.h:179
IfxEdsadc_ServiceRequestFifolevel_1
Generate a service request when Fifo contain level 1 Value.
Definition: IfxEdsadc.h:407
IfxScuCcu.h
SCU basic functionality.
IfxEdsadc_OffsetCompensationFilter_enablewithRateC
Enable offset compensation filter, adjust OFFCOMP with rate C.
Definition: IfxEdsadc.h:346
IfxEdsadc_TriggerInput_d
GTM ADC Trigger 1.
Definition: IfxEdsadc.h:478
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:81
sint32
long sint32
Definition: Platform_Types.h:134
IfxEdsadc_Dsp_In
DS positive pin mapping structure.
Definition: IfxEdsadc_PinMap.h:65
IfxEdsadc_AnalogClockSyncDelay_noDelay
no delay
Definition: IfxEdsadc.h:79
IfxEdsadc_ModulatorClockGeneration_unsyncMode
Definition: IfxEdsadc.h:335
IfxEdsadc_startScan
IFX_INLINE void IfxEdsadc_startScan(Ifx_EDSADC *edsadc, uint32 modulatorMask, uint32 channelMask)
Enables the conversion of multiple channels.
Definition: IfxEdsadc.h:1041
IfxEdsadc_EventSelect_insideBoundry
If result is inside the boundary band.
Definition: IfxEdsadc.h:159
IfxEdsadc_HalfSupplyVoltage_disable
VDDM / 2 is not connected.
Definition: IfxEdsadc.h:206
IfxEdsadc_getAuxSrc
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxEdsadc_getAuxSrc(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
Address/pointer to the interrupt source register.
Definition: IfxEdsadc.c:75
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:248
IfxEdsadc_ModulatorConfig::modulatorClockPeriod
float32 modulatorClockPeriod
Modulator clock period.
Definition: IfxEdsadc.h:528
IfxEdsadc_Cgpwm_Out::pin
IfxPort_Pin pin
Port pin.
Definition: IfxEdsadc_PinMap.h:122
IfxEdsadc_OffsetCompensationFilter_enablewithRateE
Enable offset compensation filter, adjust OFFCOMP with rate E.
Definition: IfxEdsadc.h:348
IfxEdsadc_ResultDisplayMode_unsigned
Unsigned: result values range from 0 to +216 (shifted by 215)
Definition: IfxEdsadc.h:388
IfxEdsadc_InputPin_d
Pin D connected to modulator input.
Definition: IfxEdsadc.h:266
IfxEdsadc_SupplyVoltageLevel_upperVoltage
Upper voltage range: assume a 5 V power supply is connected.
Definition: IfxEdsadc.h:436
IfxEdsadc_AnalogMux_doNotCopyAmx
Do not copy, timestamp uses all 16 bits.
Definition: IfxEdsadc.h:508
IfxEdsadc_IntegrationShiftControl_4
Integration Shift value.
Definition: IfxEdsadc.h:278
IfxEdsadc_DitheringIntensity_medium
Medium dithering intensity.
Definition: IfxEdsadc.h:149
IfxEdsadc_setTimeStampCounter
IFX_EXTERN void IfxEdsadc_setTimeStampCounter(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, IfxEdsadc_TimeStampCounterClockSelection timeStampCounterClock, IfxEdsadc_TimeStampCounterControl runControl, IfxEdsadc_AnalogMux analogMuxCopy)
Definition: IfxEdsadc.c:237
IfxEdsadc_OvershootCompensation_enabled
Attenuate response to fast edges.
Definition: IfxEdsadc.h:359
IfxEdsadc_dithering
IfxEdsadc_dithering
Controls the dithering function for each modulator separately Definition in Ifx_DSADC.MODCFG.B.DITHEN.
Definition: IfxEdsadc.h:496
IfxEdsadc_getMainCombOutFreq
IFX_EXTERN float32 IfxEdsadc_getMainCombOutFreq(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
Get the sample frequency of the main COMB filter output in Hz.
Definition: IfxEdsadc.c:104
IfxEdsadc_SuspendMode_none
No suspend.
Definition: IfxEdsadc.h:444
IfxEdsadc_CarrierWaveformMode_stopped
Carrier Generator stopped.
Definition: IfxEdsadc.h:105
IfxEdsadc_OffsetCompensationFilter_enablewithRateD
Enable offset compensation filter, adjust OFFCOMP with rate D.
Definition: IfxEdsadc.h:347
IfxEdsadc_OffsetCompensationFilter_enablewithRateF
Enable offset compensation filter, adjust OFFCOMP with rate F.
Definition: IfxEdsadc.h:349
IfxEdsadc_isModuleSuspended
IFX_INLINE boolean IfxEdsadc_isModuleSuspended(Ifx_EDSADC *edsadc)
Returns the module&#39;s suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspende...
Definition: IfxEdsadc.h:996
IfxEdsadc_ModulatorClockGeneration_syncMode
Definition: IfxEdsadc.h:334
IfxEdsadc_TimeStampCounterControl
IfxEdsadc_TimeStampCounterControl
Timestamp Counter Run Control.
Definition: IfxEdsadc.h:514
IfxEdsadc_CommonModeHoldVoltage_disable
VCMH is off.
Definition: IfxEdsadc.h:115
IfxEdsadc_TimeStampCounterClockSelection_div4
fTSTMP = fMOD/4
Definition: IfxEdsadc.h:455
IfxEdsadc_CarrierWaveformMode
IfxEdsadc_CarrierWaveformMode
Carrier generation mode Definition in Ifx_EDSADC.CGCFG.B.CGMOD.
Definition: IfxEdsadc.h:103
IfxEdsadc_SuspendMode_hard
Hard Suspend.
Definition: IfxEdsadc.h:445
IfxEdsadc_ResultDisplayMode
IfxEdsadc_ResultDisplayMode
specifies result display mode (signed/unsigned) Definition in Ifx_DSADC.DICFG.B.RDM ...
Definition: IfxEdsadc.h:385
IfxEdsadc_CommonModeHoldVoltage_enable
VCMH is generated.
Definition: IfxEdsadc.h:116
IfxEdsadc_TriggerInput_j
Trigger/gate, channel 0,input J.
Definition: IfxEdsadc.h:484
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxEdsadc_IntegratorTrigger_bypassed
No integration trigger, integrator bypassed.
Definition: IfxEdsadc.h:297
IfxEdsadc_FractionalRefVoltage_enable
VREFX is connected, value according to VREFXSEL.
Definition: IfxEdsadc.h:189
IfxEdsadc_FilterRunTimeInputCycle_2
2 input cycles
Definition: IfxEdsadc.h:168
IfxEdsadc_CarrierWaveformMode_square
Carrier Generator generates square wave.
Definition: IfxEdsadc.h:106
IfxEdsadc_HalfSupplyVoltage
IfxEdsadc_HalfSupplyVoltage
Half Supply Voltage Enable.
Definition: IfxEdsadc.h:204
IfxEdsadc_InputMuxControlMode_risingEdge
Trigger Event on Rising edge.
Definition: IfxEdsadc.h:254
IfxEdsadc_Itr_In
ITR pin mapping structure.
Definition: IfxEdsadc_PinMap.h:110
IfxEdsadc_ModulatorConfig::triggerEvent
IfxEdsadc_InputMuxControlMode triggerEvent
Defines the condition for a trigger event to control the input multiplexer.
Definition: IfxEdsadc.h:537
IfxEdsadc_setGainCorrectionFactor
IFX_EXTERN void IfxEdsadc_setGainCorrectionFactor(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, uint16 gainFactor, uint8 cicShift)
configure gain correction
Definition: IfxEdsadc.c:226
IfxEdsadc_IntegratorTrigger
IfxEdsadc_IntegratorTrigger
Integrator trigger mode NOTE: switch-first to bypassed before using other mode Definition in Ifx_EDSA...
Definition: IfxEdsadc.h:295
IfxEdsadc_TriggerInput_o
Trigger/gate, channel 0,input O.
Definition: IfxEdsadc.h:489
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxEdsadc_ModulatorClockDivider_div18
f_mod = f_clk / 18
Definition: IfxEdsadc.h:326
IfxEdsadc_ModulatorConfig
Modulator Configuration.
Definition: IfxEdsadc.h:526
IfxEdsadc_SampleClockSource_inputA
External clock, from Input A.
Definition: IfxEdsadc.h:397
IfxEdsadc_DitheringIntensity_minimum
Minimum dithering intensity.
Definition: IfxEdsadc.h:147
IfxEdsadc_StepDetectionMode
IfxEdsadc_StepDetectionMode
Defines when the slew rate filter is activated.
Definition: IfxEdsadc.h:424
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxEdsadc_DataRead_timestampOnHighbit
Single: Issue one 16-bit value per read access (timestamp on high bits)
Definition: IfxEdsadc.h:125
IfxEdsadc_RectifierSignSource_onChipGenerator
On-chip carrier generator.
Definition: IfxEdsadc.h:368
IfxEdsadc_AuxServiceRequest
IfxEdsadc_AuxServiceRequest
Service request generation (auxiliary) Definition in Ifx_EDSADC.FCFGM.B.SRGA.
Definition: IfxEdsadc.h:92
IfxEdsadc_TimestampTrigger_noTrigger
No timestamp trigger.
Definition: IfxEdsadc.h:464
IfxEdsadc_AnalogClockSyncDelay
IfxEdsadc_AnalogClockSyncDelay
Analog Clock Synchronization Delay Definition in Ifx_DSADC.MODCFG.B.ACSD.
Definition: IfxEdsadc.h:77
IfxEdsadc_TimestampTrigger_risingEdge
Trigger event upon a rising edge.
Definition: IfxEdsadc.h:466
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:675
IfxEdsadc_InputDataSource_invertedInputC
External, from input C, inverted.
Definition: IfxEdsadc.h:231
IfxEdsadc_SupplyVoltageLevel
IfxEdsadc_SupplyVoltageLevel
Adjusts the analog circuitry to the supply voltage used in the application system.Defined In defined in MODULE_EDSADC.GLOBCFG.B.SUPLEV.
Definition: IfxEdsadc.h:433
IfxEdsadc_ServiceRequestFifolevel_4
Generate a service request when Fifo contain level 4 Value.
Definition: IfxEdsadc.h:410
IfxEdsadc_TriggerInput_m
GTM DSADC Trigger 2.
Definition: IfxEdsadc.h:487
IfxEdsadc_DitheringIntensity_low
Low dithering intensity.
Definition: IfxEdsadc.h:148
IfxEdsadc_InputConfig_inputPin
Modulator input connected to external pin.
Definition: IfxEdsadc.h:215
IfxEdsadc_getMainResult
IFX_INLINE sint16 IfxEdsadc_getMainResult(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
Get result from the main chain.
Definition: IfxEdsadc.h:898
IfxEdsadc_initDspPin
IFX_INLINE void IfxEdsadc_initDspPin(const IfxEdsadc_Dsp_In *dsp, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a DS input.
Definition: IfxEdsadc.h:960
IfxEdsadc_cfg.h
EDSADC on-chip implementation data.
IfxEdsadc_AuxServiceRequest_altSource
Alternate source: Capturing of a sign delay value to register CGSYNCx (x = 0 - 5) ...
Definition: IfxEdsadc.h:97
IfxEdsadc_MainServiceRequest_everyNewResult
Always, for each new result value.
Definition: IfxEdsadc.h:311


iLLD_TC38A: IfxEdsadc_Edsadc.c Source File

  • Edsadc
  • Edsadc
IfxEdsadc_Edsadc.c
Go to the documentation of this file.
1 /**
2 * \file IfxEdsadc_Edsadc.c
3 * \brief EDSADC EDSADC details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxEdsadc_Edsadc.h"
47
48 /** \addtogroup IfxLld_Edsadc_Edsadc_Module
49 * \{ */
50
51 /******************************************************************************/
52 /*-----------------------Private Function Prototypes--------------------------*/
53 /******************************************************************************/
54
55 /** \brief calculate division factor for modulator clock period
56 * \param sourceFreq Source frequency
57 * \param targetFreq Target frequency
58 * \return division factor
59 */
60 IFX_STATIC sint32 IfxEdsadc_Edsadc_calcDIVM(float32 sourceFreq, float32 *targetFreq);
61
62 /** \} */
63
64 /******************************************************************************/
65 /*-----------------------Private Function Prototypes--------------------------*/
66 /******************************************************************************/
67
68 /** \brief calculate division factor for pwm patteren mode
69 * \param sourceFreq Source Frequency
70 * \param targetFreq Target Frequency
71 * \return Division Factor
72 */
73 IFX_STATIC sint32 IfxEdsadc_Edsadc_calcDIVCG(float32 sourceFreq, float32 *targetFreq);
74
75 /******************************************************************************/
76 /*-------------------------Function Implementations---------------------------*/
77 /******************************************************************************/
78
79 IFX_STATIC sint32 IfxEdsadc_Edsadc_calcDIVM(float32 sourceFreq, float32 *targetFreq)
80 {
81 float32 bestError = 10e6;
82 sint32 bestDiv = 4, i;
83
84 for (i = 4; i <= 32; i += 2)
85 {
86 float32 freq = sourceFreq / i;
87 float32 error = __absf(freq - *targetFreq);
88
89 if (__leqf(error, bestError))
90 {
91 bestError = error;
92 bestDiv = i;
93
94 if (!__neqf(error, 0))
95 {
96 break;
97 }
98 }
99 }
100
101 *targetFreq = sourceFreq / bestDiv;
102
103 return (bestDiv / 2) - 2;
104 }
105
106
107 void IfxEdsadc_Edsadc_initCarrierGen(IfxEdsadc_Edsadc *edsadc, IfxEdsadc_Edsadc_CarrierGenConfig *config)
108 {
109 Ifx_EDSADC_CGCFG cgcfg;
110
111 cgcfg.U = 0;
112
113 float32 sourceFreq = IfxEdsadc_getModulatorInputClockFreq(edsadc->edsadc);
114 float32 targetFreq = config->frequency;
115 cgcfg.B.DIVCG = IfxEdsadc_Edsadc_calcDIVCG(sourceFreq / (32 * 32), &targetFreq);
116 cgcfg.B.SIGPOL = (config->inverted == FALSE) ? 0 : 1;
117 cgcfg.B.BREV = (config->bitReversed == FALSE) ? 0 : 1;
118 cgcfg.B.CGMOD = config->carrierWaveformMode;
119
120 edsadc->edsadc->CGCFG = cgcfg;
121
122 const IfxEdsadc_Cgpwm_Out *pinPos = config->pinPos;
123
124 if (pinPos != NULL_PTR)
125 { /* Initialise positive carrier pin */
126 IfxEdsadc_initCgPwmPin(pinPos, config->pinMode, config->pinDriver);
127 }
128
129 const IfxEdsadc_Cgpwm_Out *pinNeg = config->pinNeg;
130
131 if (pinNeg != NULL_PTR)
132 { /* Initialise negative carrier pin */
133 IfxEdsadc_initCgPwmPin(pinNeg, config->pinMode, config->pinDriver);
134 }
135 }
136
137
138 void IfxEdsadc_Edsadc_initChannel(IfxEdsadc_Edsadc_Channel *channel, const IfxEdsadc_Edsadc_ChannelConfig *config)
139 {
140 Ifx_EDSADC *edsadc = config->module;
141
142 channel->channelId = config->channelId;
143 channel->module = edsadc;
144 channel->channel = (Ifx_EDSADC_CH *)&edsadc->CH[config->channelId];
145
146 IfxEdsadc_Edsadc_initModulator(channel, &config->modulator);
147 IfxEdsadc_Edsadc_initDemodulator(channel, &config->demodulator);
148 IfxEdsadc_Edsadc_initCombFilter(channel, &config->combFilter);
149 IfxEdsadc_Edsadc_initFirFilter(channel, &config->firFilter);
150 IfxEdsadc_Edsadc_initIntegrator(channel, &config->integrator);
151 IfxEdsadc_Edsadc_initRectifier(channel, &config->rectifier);
152 IfxEdsadc_Edsadc_setGainCorrectionFactor(edsadc, channel->channelId, config->gainFactor, config->cicShift);
153
154 IfxEdsadc_Edsadc_initTimeStampCounter(edsadc, channel->channelId, &config->timeStamp);
155 IfxEdsadc_Edsadc_initCommonModeVoltage(edsadc, channel->channelId, &config->commonMode);
156 IfxEdsadc_setGainControl(edsadc, channel->channelId, config->gainCalibrationConfig.gainFactor, config->gainCalibrationConfig.cicShift, config->gainCalibrationConfig.cicDecimationRate);
157 IfxEdsadc_setGainCalibration(edsadc, channel->channelId, config->gainCalibrationConfig.calFactor, config->gainCalibrationConfig.calTarget);
158
159 const IfxEdsadc_Edsadc_ChannelPins *pins = config->channelPins;
160
161 if (pins != NULL_PTR)
162 {
163 const IfxEdsadc_Dsn_In *dsn = pins->dsn;
164
165 if (dsn != NULL_PTR)
166 {
167 IfxEdsadc_initDsnPin(dsn, pins->dsnMode, pins->pinDriver);
168 }
169
170 const IfxEdsadc_Dsp_In *dsp = pins->dsp;
171
172 if (dsp != NULL_PTR)
173 {
174 IfxEdsadc_initDspPin(dsp, pins->dspMode, pins->pinDriver);
175 }
176
177 const IfxEdsadc_Cin_In *cin = pins->cin;
178
179 if (cin != NULL_PTR)
180 {
181 IfxEdsadc_initCinPin(cin, pins->cinMode, pins->pinDriver);
182 }
183
184 const IfxEdsadc_Din_In *din = pins->din;
185
186 if (din != NULL_PTR)
187 {
188 IfxEdsadc_initDinPin(din, pins->dinMode, pins->pinDriver);
189 }
190
191 const IfxEdsadc_Itr_In *itr = pins->itr;
192
193 if (itr != NULL_PTR)
194 {
195 IfxEdsadc_initItrPin(itr, pins->itrMode, pins->pinDriver);
196 }
197 }
198 }
199
200
201 void IfxEdsadc_Edsadc_initChannelConfig(IfxEdsadc_Edsadc_ChannelConfig *config, IfxEdsadc_Edsadc *edsadc)
202 {
203 const IfxEdsadc_Edsadc_ChannelConfig IfxEdsadc_Edsadc_defaultChannelConfig = {
204 .channelId = IfxEdsadc_ChannelId_0,
205 .firFilter = {
206 .serviceRequest = IfxEdsadc_MainServiceRequest_everyNewResult,
207 .auxServiceRequest = IfxEdsadc_AuxServiceRequest_never,
208 .serviceRequestLevel = IfxEdsadc_ServiceRequestFifolevel_1,
209 .eventSelect = IfxEdsadc_EventSelect_everyNewResult,
210 .offsetCompensation = IfxEdsadc_OffsetCompensationFilter_disabled,
211 .fir0Enabled = TRUE,
212 .fir1Enabled = TRUE,
213 .rippleCompensationEnabled = FALSE,
214 .fir1DecimateRate = FALSE,
215 .cicMode = FALSE,
216 .prefilterEnabled = TRUE,
217 .calibrationTrigger = FALSE,
218 .calibrationControl = FALSE,
219 .overshootCompensation = IfxEdsadc_OvershootCompensation_disabled
220 },
221 .modulator = {
222 .modulatorClockFreq = 10.0e6,
223 .inputGain = IfxEdsadc_InputGain_factor1,
224 .analogClockSyncDelay = IfxEdsadc_AnalogClockSyncDelay_noDelay,
225 .positiveInput = IfxEdsadc_InputConfig_inputPin,
226 .negativeInput = IfxEdsadc_InputConfig_inputPin,
227 .inputPin = IfxEdsadc_InputPin_a,
228 .ditheringEnabled = IfxEdsadc_dithering_disabled,
229 .integratorResetEnabled = FALSE,
230 .inputMuxActionControl = FALSE,
231 .triggerEvent = IfxEdsadc_InputMuxControlMode_softwareControl
232 },
233 .demodulator = {
234 .triggerInput = IfxEdsadc_TriggerInput_a,
235 .inputDataSource = IfxEdsadc_InputDataSource_directInputA,
236 .dataStream = IfxEdsadc_DataStream_onChipModulator,
237 .sampleClockSource = IfxEdsadc_SampleClockSource_internal,
238 .integrationTrigger = IfxEdsadc_IntegratorTrigger_bypassed,
239 .timestampTrigger = IfxEdsadc_TimestampTrigger_noTrigger,
240 .dataReadMode = IfxEdsadc_DataRead_timestampOnHighbit,
241 .timeStampMode = FALSE,
242 .resultDisplay = IfxEdsadc_ResultDisplayMode_signed
243 },
244 .integrator = {
245 .windowSize = IfxEdsadc_IntegrationWindowSize_internalControl,
246 .discardCount = 0,
247 .integrationCount = 20,
248 .integrationCycles = 1,
249 .shiftControl = IfxEdsadc_IntegrationShiftControl_0,
250 .fcRestartControl = IfxEdsadc_RestartFilterChain_on
251 },
252 .rectifier = {
253 .signDelay = 0,
254 .signPeriod = 0,
255 .signSource = IfxEdsadc_RectifierSignSource_onChipGenerator,
256 .enabled = FALSE
257 },
258 .combFilter = {
259 .decimationFactor = 36,
260 .startValue = 36
261 },
262 .timeStamp = {
263 .timeStampCounterClock = IfxEdsadc_TimeStampCounterClockSelection_div1,
264 .timeStampCounterRunControl = IfxEdsadc_TimeStampCounterControl_off,
265 .analogMuxCopy = IfxEdsadc_AnalogMux_doNotCopyAmx
266 },
267 .commonMode = {
268 .fractionalRefVoltage = IfxEdsadc_FractionalRefVoltageSelection_div2,
269 .refVoltageEnable = IfxEdsadc_FractionalRefVoltage_disable,
270 .halfSupplyVoltge = IfxEdsadc_HalfSupplyVoltage_disable,
271 .commonModeHoldVoltage = IfxEdsadc_CommonModeHoldVoltage_disable,
272 .positiveInput = 0,
273 .negativeInput = 0
274 },
275 .gainFactor = 8090,
276 .cicShift = 16,
277 .channelPins = NULL_PTR,
278 .gainCalibrationConfig = {
279 .gainFactor = 5759,
280 .cicShift = 27,
281 .cicDecimationRate = 6,
282 .calFactor = 4096,
283 .calTarget = 32000
284 }
285 };
286 *config = IfxEdsadc_Edsadc_defaultChannelConfig;
287
288 if (edsadc != NULL_PTR)
289 {
290 config->module = edsadc->edsadc;
291 }
292 else
293 {
294 config->module = NULL_PTR;
295 }
296 }
297
298
299 void IfxEdsadc_Edsadc_initCombFilter(IfxEdsadc_Edsadc_Channel *channel, const IfxEdsadc_Edsadc_CombFilterConfig *config)
300 {
301 Ifx_EDSADC_CH_FCFGC fcfgc;
302
303 fcfgc.U = 0;
304
305 fcfgc.B.CFMDF = config->decimationFactor - 1;
306 fcfgc.B.CFMSV = config->startValue - 1;
307
308 (channel->channel)->FCFGC = fcfgc;
309 }
310
311
312 void IfxEdsadc_Edsadc_initDemodulator(IfxEdsadc_Edsadc_Channel *channel, const IfxEdsadc_Edsadc_DemodulatorConfig *config)
313 {
314 Ifx_EDSADC_CH_DICFG dicfg;
315
316 dicfg.U = 0;
317
318 dicfg.B.DSS = config->dataStream;
319 dicfg.B.DSRCEX = config->inputDataSource;
320 dicfg.B.DSWC = 1; // enable write access for this bitfield
321
322 dicfg.B.ITRMODE = config->integrationTrigger;
323 dicfg.B.TSTRMODE = config->timestampTrigger;
324 dicfg.B.TRSEL = config->triggerInput;
325 dicfg.B.DRM = config->dataReadMode;
326 dicfg.B.TSM = config->timeStampMode;
327
328 dicfg.B.CSRCEX = config->sampleClockSource;
329 dicfg.B.RDM = config->resultDisplay;
330 dicfg.B.MSWC = 1; // enable write access for these bitfields
331
332 (channel->channel)->DICFG = dicfg;
333 }
334
335
336 void IfxEdsadc_Edsadc_initFirFilter(IfxEdsadc_Edsadc_Channel *channel, const IfxEdsadc_Edsadc_FirFilterConfig *config)
337 {
338 Ifx_EDSADC_CH_FCFGM fcfgm;
339 Ifx_EDSADC_CH_RFC rfc;
340 fcfgm.U = 0;
341 rfc.U = 0;
342
343 fcfgm.B.FIR0EN = (config->fir0Enabled != FALSE) ? 1 : 0;
344 fcfgm.B.FIR1EN = (config->fir1Enabled != FALSE) ? 1 : 0;
345 fcfgm.B.OCEN = (config->offsetCompensation != FALSE) ? 1 : 0;
346 fcfgm.B.OVCEN = config->overshootCompensation;
347 fcfgm.B.FIR1DEC = config->fir1DecimateRate;
348 fcfgm.B.CICMOD = config->cicMode;
349 fcfgm.B.PFEN = config->prefilterEnabled;
350 fcfgm.B.FMWC = 1;
351 fcfgm.B.SRGM = config->serviceRequest;
352 fcfgm.B.SRGA = config->auxServiceRequest;
353 fcfgm.B.ESEL = config->eventSelect;
354 fcfgm.B.CALIB = config->calibrationTrigger;
355 fcfgm.B.AUTOCAL = config->calibrationControl;
356 fcfgm.B.CSRWC = 1;
357
358 (channel->channel)->FCFGM = fcfgm;
359 rfc.B.SRLVL = config->serviceRequestLevel;
360 channel->channel->RFC = rfc;
361 }
362
363
364 void IfxEdsadc_Edsadc_initIntegrator(IfxEdsadc_Edsadc_Channel *channel, const IfxEdsadc_Edsadc_IntegratorConfig *config)
365 {
366 Ifx_EDSADC_CH_IWCTR iwctr;
367
368 iwctr.U = 0;
369
370 iwctr.B.REPVAL = config->integrationCycles - 1;
371 iwctr.B.NVALDIS = config->discardCount;
372 iwctr.B.IWS = config->windowSize;
373 iwctr.B.NVALINT = config->integrationCount - 1;
374 iwctr.B.ISC = config->shiftControl;
375 iwctr.B.FRC = config->fcRestartControl;
376
377 (channel->channel)->IWCTR = iwctr;
378 }
379
380
381 void IfxEdsadc_Edsadc_initModulator(IfxEdsadc_Edsadc_Channel *channel, const IfxEdsadc_Edsadc_ModulatorConfig *config)
382 {
383 Ifx_EDSADC_CH_MODCFG modcfg;
384
385 modcfg.U = 0;
386
387 modcfg.B.INCFGP = config->positiveInput;
388 modcfg.B.INCFGN = config->negativeInput;
389 modcfg.B.GAINSEL = config->inputGain;
390 modcfg.B.INSEL = config->inputPin;
391 modcfg.B.INMAC = config->inputMuxActionControl;
392 modcfg.B.INMODE = config->triggerEvent;
393 modcfg.B.INCWC = 1; // enable write access for these bitfields
394
395 float32 targetFreq = config->modulatorClockFreq;
396 float32 sourceFreq = IfxEdsadc_getModulatorInputClockFreq(channel->module);
397 modcfg.B.DIVM = IfxEdsadc_Edsadc_calcDIVM(sourceFreq, &targetFreq);
398 modcfg.B.ACSD = config->analogClockSyncDelay;
399 modcfg.B.DITHEN = config->ditheringEnabled;
400
401 modcfg.B.IREN = config->integratorResetEnabled;
402 modcfg.B.MMWC = 1; // enable write access for these bitfields
403
404 (channel->channel)->MODCFG = modcfg;
405 }
406
407
408 void IfxEdsadc_Edsadc_initModule(IfxEdsadc_Edsadc *edsadc, IfxEdsadc_Edsadc_Config *config)
409 {
410 Ifx_EDSADC *edsadcSFR = config->edsadc;
411
412 edsadc->edsadc = edsadcSFR;
413
414 {
415 if (edsadcSFR->CLC.U != 0)
416 {
417 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
418 IfxScuWdt_clearCpuEndinit(passwd);
419 edsadcSFR->CLC.U = 0x00000000;
420
421 if (edsadcSFR->CLC.U)
422 {} // sync access
423
424 IfxScuWdt_setCpuEndinit(passwd);
425 }
426
427 {
428 Ifx_EDSADC_GLOBCFG globcfg;
429 globcfg.U = edsadcSFR->GLOBCFG.U;
430
431 globcfg.B.CPWC = 1;
432 globcfg.B.DITRIM = config->ditheringIntensity;
433 globcfg.B.USC = config->modulatorClockMode;
434 globcfg.B.SUPLEV = config->supplyVoltageLevel;
435
436 edsadcSFR->GLOBCFG.U = globcfg.U;
437 }
438 }
439 }
440
441
442 void IfxEdsadc_Edsadc_initModuleConfig(IfxEdsadc_Edsadc_Config *config, Ifx_EDSADC *edsadc)
443 {
444 const IfxEdsadc_Edsadc_Config IfxEdsadc_Edsadc_defaultConfig = {
445 .ditheringIntensity = IfxEdsadc_DitheringIntensity_minimum,
446 .modulatorClockMode = IfxEdsadc_ModulatorClockGeneration_syncMode,
447 .supplyVoltageLevel = IfxEdsadc_SupplyVoltageLevel_automaticControl
448 };
449
450 *config = IfxEdsadc_Edsadc_defaultConfig;
451 config->edsadc = edsadc;
452 }
453
454
455 void IfxEdsadc_Edsadc_initRectifier(IfxEdsadc_Edsadc_Channel *channel, const IfxEdsadc_Edsadc_RectifierConfig *config)
456 {
457 Ifx_EDSADC_CH_RECTCFG rect;
458
459 rect.U = channel->module->CH[channel->channelId].RECTCFG.U;
460 rect.B.RFEN = config->enabled;
461 rect.B.SSRC = config->signSource;
462 (channel->channel)->RECTCFG = rect;
463 (channel->channel)->CGSYNC.B.SDPOS = config->signDelay;
464 (channel->channel)->CGSYNC.B.SDNEG = config->signDelay + (config->signPeriod / 2);
465 }
466
467
468 IFX_STATIC sint32 IfxEdsadc_Edsadc_calcDIVCG(float32 sourceFreq, float32 *targetFreq)
469 {
470 float32 bestError = 10e6;
471 sint32 bestDiv = 2, i;
472
473 for (i = 2; i <= 32; i += 2)
474 {
475 float32 freq = sourceFreq / i;
476 float32 error = __absf(freq - *targetFreq);
477
478 if (__leqf(error, bestError))
479 {
480 bestError = error;
481 bestDiv = i;
482
483 if (!__neqf(error, 0))
484 {
485 break;
486 }
487 }
488 }
489
490 *targetFreq = sourceFreq / bestDiv;
491
492 return (bestDiv / 2) - 1;
493 }
494
495
496 void IfxEdsadc_Edsadc_initCarrierGenConfig(IfxEdsadc_Edsadc_CarrierGenConfig *config)
497 {
498 config->bitReversed = FALSE;
499 config->carrierWaveformMode = IfxEdsadc_CarrierWaveformMode_sine;
500 config->frequency = 10000;
501 config->inverted = FALSE;
502 config->pinDriver = IfxPort_PadDriver_cmosAutomotiveSpeed1;
503 config->pinMode = IfxPort_OutputMode_pushPull;
504 config->pinNeg = NULL_PTR;
505 config->pinPos = NULL_PTR;
506 }
IfxEdsadc_TriggerInput_a
GTM EDSADC Trigger 0.
Definition: IfxEdsadc.h:475
IfxEdsadc_SupplyVoltageLevel_automaticControl
voltage range is controlled by the power supply
Definition: IfxEdsadc.h:435
IfxEdsadc_IntegrationWindowSize_internalControl
Internal control: stop integrator after REPVAL+1 integration cycles.
Definition: IfxEdsadc.h:287
IfxEdsadc_InputPin_a
Pin A connected to modulator input.
Definition: IfxEdsadc.h:263
IfxEdsadc_Edsadc_ModulatorConfig::inputPin
IfxEdsadc_InputPin inputPin
Modulator input pin selection.
Definition: IfxEdsadc_Edsadc.h:268
IfxEdsadc_Edsadc_ChannelConfig::combFilter
IfxEdsadc_Edsadc_CombFilterConfig combFilter
Comb filter configuration structure.
Definition: IfxEdsadc_Edsadc.h:350
IfxEdsadc_Edsadc_ChannelPins::dsp
IFX_CONST IfxEdsadc_Dsp_In * dsp
the DSP Pin which should be configured
Definition: IfxEdsadc_Edsadc.h:185
IfxEdsadc_Edsadc_ChannelConfig::channelPins
IFX_CONST IfxEdsadc_Edsadc_ChannelPins * channelPins
Channel Pins Configuration structure.
Definition: IfxEdsadc_Edsadc.h:355
IfxEdsadc_Edsadc_DemodulatorConfig::resultDisplay
IfxEdsadc_ResultDisplayMode resultDisplay
Result Display Mode (Signed./Unsigned)
Definition: IfxEdsadc_Edsadc.h:224
IfxEdsadc_DataStream_onChipModulator
select data stream from on chip modulator
Definition: IfxEdsadc.h:134
IfxEdsadc_Edsadc_ChannelConfig::demodulator
IfxEdsadc_Edsadc_DemodulatorConfig demodulator
Demodulator configuration structure.
Definition: IfxEdsadc_Edsadc.h:347
IfxEdsadc_Edsadc_FirFilterConfig::eventSelect
IfxEdsadc_EventSelect eventSelect
Defines when a comparator event is generated.
Definition: IfxEdsadc_Edsadc.h:234
__neqf
#define __neqf
Definition: IfxCpu_IntrinsicsDcc.h:1665
IfxEdsadc_dithering_disabled
dithering function disabled
Definition: IfxEdsadc.h:498
IfxEdsadc_setGainCalibration
void IfxEdsadc_setGainCalibration(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, uint16 calFactor, uint16 calTarget)
Definition: IfxEdsadc.c:260
IfxEdsadc_Edsadc_ModulatorConfig::inputMuxActionControl
boolean inputMuxActionControl
Defines the mechanism by which the input multiplexer is controlled.
Definition: IfxEdsadc_Edsadc.h:271
IfxEdsadc_Edsadc_FirFilterConfig::calibrationControl
boolean calibrationControl
Automatic Calibration Control.
Definition: IfxEdsadc_Edsadc.h:243
IfxEdsadc_Cgpwm_Out
CGPWM pin mapping structure.
Definition: IfxEdsadc_PinMap.h:119
IfxEdsadc_Edsadc_ModulatorConfig::inputGain
IfxEdsadc_InputGain inputGain
Modulator gain select of analog input path.
Definition: IfxEdsadc_Edsadc.h:264
IfxEdsadc_Edsadc_CombFilterConfig
Comb filter configuration structure.
Definition: IfxEdsadc_Edsadc.h:192
IfxEdsadc_IntegrationShiftControl_0
Integration Shift value.
Definition: IfxEdsadc.h:274
IfxEdsadc_Edsadc_ChannelConfig::gainCalibrationConfig
IfxEdsadc_Edsadc_GainCalibrationConfig gainCalibrationConfig
Configuration Settings for Gain Calibration.
Definition: IfxEdsadc_Edsadc.h:356
IfxEdsadc_Edsadc_IntegratorConfig::integrationCount
uint16 integrationCount
Number of integrated values after discard step: 1 .. 64.
Definition: IfxEdsadc_Edsadc.h:253
IfxEdsadc_OvershootCompensation_disabled
Disabled, feed FIR filter directly.
Definition: IfxEdsadc.h:358
IfxEdsadc_Edsadc_initCarrierGenConfig
void IfxEdsadc_Edsadc_initCarrierGenConfig(IfxEdsadc_Edsadc_CarrierGenConfig *config)
Definition: IfxEdsadc_Edsadc.c:496
IfxPort_OutputMode_pushPull
Definition: IfxPort.h:142
IfxEdsadc_Edsadc_ChannelConfig::integrator
IfxEdsadc_Edsadc_IntegratorConfig integrator
Integrator configuration structure.
Definition: IfxEdsadc_Edsadc.h:348
IfxEdsadc_Din_In
DIN pin mapping structure.
Definition: IfxEdsadc_PinMap.h:83
IfxEdsadc_Cin_In
CIN pin mapping structure.
Definition: IfxEdsadc_PinMap.h:74
IfxEdsadc_Edsadc_ChannelConfig::commonMode
IfxEdsadc_Edsadc_CommonModeVoltageConfig commonMode
Common Mode Voltage Configuration.
Definition: IfxEdsadc_Edsadc.h:352
IfxEdsadc_Edsadc_Channel
Channel handle structure.
Definition: IfxEdsadc_Edsadc.h:332
IfxEdsadc_Edsadc_initModuleConfig
void IfxEdsadc_Edsadc_initModuleConfig(IfxEdsadc_Edsadc_Config *config, Ifx_EDSADC *edsadc)
Initialise the config struct with default EDSADC configuration.
Definition: IfxEdsadc_Edsadc.c:442
IfxEdsadc_Edsadc_DemodulatorConfig::triggerInput
IfxEdsadc_TriggerInput triggerInput
Trigger selection.
Definition: IfxEdsadc_Edsadc.h:215
IfxEdsadc_setGainControl
void IfxEdsadc_setGainControl(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, uint16 gainFactor, uint8 cicShift, uint8 cicDecimationRate)
Definition: IfxEdsadc.c:248
IfxEdsadc_Edsadc_initChannel
void IfxEdsadc_Edsadc_initChannel(IfxEdsadc_Edsadc_Channel *channel, const IfxEdsadc_Edsadc_ChannelConfig *config)
Initialise a EDSADC channel with the supplied configuration.
Definition: IfxEdsadc_Edsadc.c:138
IfxEdsadc_FractionalRefVoltage_disable
VREFX is not connected.
Definition: IfxEdsadc.h:188
IfxEdsadc_Edsadc_ChannelPins::cinMode
IfxPort_InputMode cinMode
the CIN pin input mode which should be configured
Definition: IfxEdsadc_Edsadc.h:178
IfxEdsadc_Edsadc_ModulatorConfig::triggerEvent
IfxEdsadc_InputMuxControlMode triggerEvent
Defines the condition for a trigger event to control the input multiplexer.
Definition: IfxEdsadc_Edsadc.h:272
IfxEdsadc_Edsadc_CarrierGenConfig::pinPos
IFX_CONST IfxEdsadc_Cgpwm_Out * pinPos
Positive-carrier pin configuration.
Definition: IfxEdsadc_Edsadc.h:322
IfxEdsadc_Edsadc_FirFilterConfig::cicMode
boolean cicMode
CIC Filter mode.
Definition: IfxEdsadc_Edsadc.h:240
IfxEdsadc_InputMuxControlMode_softwareControl
Trigger Event by software (INMUX follows INSEL)
Definition: IfxEdsadc.h:252
IfxEdsadc_Edsadc_CarrierGenConfig::inverted
boolean inverted
Signal polarity (Normal / Inverted) selection.
Definition: IfxEdsadc_Edsadc.h:326
IfxEdsadc_Edsadc_ModulatorConfig::negativeInput
IfxEdsadc_InputConfig negativeInput
Modulator configuration of negative input line.
Definition: IfxEdsadc_Edsadc.h:267
IfxEdsadc_Edsadc_CarrierGenConfig::frequency
float32 frequency
Expected excitation frequency in Hz.
Definition: IfxEdsadc_Edsadc.h:321
IfxEdsadc_Edsadc_ModulatorConfig::integratorResetEnabled
boolean integratorResetEnabled
control the modulator overload handling
Definition: IfxEdsadc_Edsadc.h:270
IfxEdsadc_initCgPwmPin
IFX_INLINE void IfxEdsadc_initCgPwmPin(const IfxEdsadc_Cgpwm_Out *cgPwm, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a CGPWM output.
Definition: IfxEdsadc.h:910
IfxEdsadc_Edsadc_ChannelConfig::timeStamp
IfxEdsadc_Edsadc_TimeStampCounter timeStamp
Configure Time Stamp Counter.
Definition: IfxEdsadc_Edsadc.h:351
float32
float float32
Definition: Platform_Types.h:170
IfxEdsadc_Edsadc_IntegratorConfig::shiftControl
IfxEdsadc_IntegrationShiftControl shiftControl
Integrator shift control.
Definition: IfxEdsadc_Edsadc.h:255
IfxEdsadc_Edsadc_calcDIVCG
IFX_STATIC sint32 IfxEdsadc_Edsadc_calcDIVCG(float32 sourceFreq, float32 *targetFreq)
calculate division factor for pwm patteren mode
Definition: IfxEdsadc_Edsadc.c:468
IfxEdsadc_initItrPin
IFX_INLINE void IfxEdsadc_initItrPin(const IfxEdsadc_Itr_In *itr, IfxPort_InputMode itrMode, IfxPort_PadDriver padDriver)
Initializes a ITR input.
Definition: IfxEdsadc.h:970
IfxEdsadc_Edsadc_ChannelConfig::firFilter
IfxEdsadc_Edsadc_FirFilterConfig firFilter
FIR filters configuration structure.
Definition: IfxEdsadc_Edsadc.h:345
IfxEdsadc_Edsadc::edsadc
Ifx_EDSADC * edsadc
Specifies the pointer to the EDSADC module registers.
Definition: IfxEdsadc_Edsadc.h:313
IfxEdsadc_Edsadc_Config
Clock configuration data structure.
Definition: IfxEdsadc_Edsadc.h:361
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxEdsadc_initCinPin
IFX_INLINE void IfxEdsadc_initCinPin(const IfxEdsadc_Cin_In *cIn, IfxPort_InputMode cInMode, IfxPort_PadDriver padDriver)
Initializes a CIN input.
Definition: IfxEdsadc.h:920
IfxEdsadc_Edsadc_ModulatorConfig
Modulator configuration structure.
Definition: IfxEdsadc_Edsadc.h:261
IfxEdsadc_Edsadc_RectifierConfig::signSource
IfxEdsadc_RectifierSignSource signSource
Rectifier sign source.
Definition: IfxEdsadc_Edsadc.h:281
IfxEdsadc_Edsadc_CombFilterConfig::startValue
uint16 startValue
4 .. decimationFactor
Definition: IfxEdsadc_Edsadc.h:195
IfxEdsadc_SampleClockSource_internal
Internal clock.
Definition: IfxEdsadc.h:396
IfxEdsadc_Edsadc_IntegratorConfig::integrationCycles
uint16 integrationCycles
Number of integration cycles: 1 .. 16. Used only when IfxEdsadc_IntegrationWindowSize_internalControl...
Definition: IfxEdsadc_Edsadc.h:254
IfxEdsadc_Edsadc_DemodulatorConfig::sampleClockSource
IfxEdsadc_SampleClockSource sampleClockSource
Demodulator sample clock source selection.
Definition: IfxEdsadc_Edsadc.h:218
IfxEdsadc_Edsadc_FirFilterConfig
FIR filters configuration structure.
Definition: IfxEdsadc_Edsadc.h:229
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxEdsadc_Edsadc_CarrierGenConfig::carrierWaveformMode
IfxEdsadc_CarrierWaveformMode carrierWaveformMode
Carrier generation mode.
Definition: IfxEdsadc_Edsadc.h:320
IfxEdsadc_Edsadc_initCarrierGen
void IfxEdsadc_Edsadc_initCarrierGen(IfxEdsadc_Edsadc *edsadc, IfxEdsadc_Edsadc_CarrierGenConfig *config)
Initialise the EDSADC carrier generator.
Definition: IfxEdsadc_Edsadc.c:107
IfxEdsadc_Edsadc_FirFilterConfig::fir1DecimateRate
boolean fir1DecimateRate
FIR1 Filter Decimation Rate.
Definition: IfxEdsadc_Edsadc.h:239
IfxEdsadc_Edsadc_IntegratorConfig
Integrator configuration structure.
Definition: IfxEdsadc_Edsadc.h:249
IfxEdsadc_Edsadc_ChannelPins::dinMode
IfxPort_InputMode dinMode
the DIN pin input mode which should be configured
Definition: IfxEdsadc_Edsadc.h:180
IfxEdsadc_InputDataSource_directInputA
External, from input A, direct.
Definition: IfxEdsadc.h:226
IfxEdsadc_Edsadc_ModulatorConfig::ditheringEnabled
IfxEdsadc_dithering ditheringEnabled
Control the Dithering Function for each modulator.
Definition: IfxEdsadc_Edsadc.h:269
IfxEdsadc_Edsadc_DemodulatorConfig::timeStampMode
boolean timeStampMode
FALSE = no timeStamp True = inserts timestamp upon trigger.
Definition: IfxEdsadc_Edsadc.h:222
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxEdsadc_FractionalRefVoltageSelection_div2
VREFX = VAREF / 2.
Definition: IfxEdsadc.h:196
IfxEdsadc_Edsadc_ChannelConfig::rectifier
IfxEdsadc_Edsadc_RectifierConfig rectifier
Rectifier configuration structure.
Definition: IfxEdsadc_Edsadc.h:349
__leqf
#define __leqf
Definition: IfxCpu_IntrinsicsDcc.h:1669
IfxEdsadc_Edsadc_CombFilterConfig::decimationFactor
uint16 decimationFactor
decimation rate of comb filter 4 .. 256
Definition: IfxEdsadc_Edsadc.h:194
IfxEdsadc_Edsadc_RectifierConfig
Rectifier configuration structure.
Definition: IfxEdsadc_Edsadc.h:277
IfxEdsadc_Edsadc_ChannelPins::dsn
IFX_CONST IfxEdsadc_Dsn_In * dsn
the DSN Pin which should be configured
Definition: IfxEdsadc_Edsadc.h:183
IfxEdsadc_Edsadc_DemodulatorConfig::inputDataSource
IfxEdsadc_InputDataSource inputDataSource
Demodulator input data source selection.
Definition: IfxEdsadc_Edsadc.h:216
IfxEdsadc_Edsadc_ChannelConfig::modulator
IfxEdsadc_Edsadc_ModulatorConfig modulator
Modulator configuration structure.
Definition: IfxEdsadc_Edsadc.h:346
IfxEdsadc_Edsadc_ChannelPins::dsnMode
IfxPort_InputMode dsnMode
the DSN pin output mode which should be configured
Definition: IfxEdsadc_Edsadc.h:184
IfxEdsadc_Edsadc_RectifierConfig::enabled
boolean enabled
Rectification enable/disable selection.
Definition: IfxEdsadc_Edsadc.h:282
IfxEdsadc_Edsadc_GainCalibrationConfig::gainFactor
uint16 gainFactor
Multiplication Factor for Gain Correction During Calibration(in GAINCTR register) ...
Definition: IfxEdsadc_Edsadc.h:300
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxEdsadc_initDinPin
IFX_INLINE void IfxEdsadc_initDinPin(const IfxEdsadc_Din_In *dIn, IfxPort_InputMode dInMode, IfxPort_PadDriver padDriver)
Initializes a DIN input.
Definition: IfxEdsadc.h:940
IfxEdsadc_Edsadc_FirFilterConfig::overshootCompensation
IfxEdsadc_OvershootCompensation overshootCompensation
Overshoot Compensation Enable/Disable.
Definition: IfxEdsadc_Edsadc.h:244
IfxEdsadc_Edsadc_ChannelPins::itrMode
IfxPort_InputMode itrMode
the ITR pin input mode which should be configured
Definition: IfxEdsadc_Edsadc.h:182
__absf
#define __absf
Definition: IfxCpu_IntrinsicsDcc.h:1629
IfxEdsadc_Edsadc_initTimeStampCounter
IFX_INLINE void IfxEdsadc_Edsadc_initTimeStampCounter(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, const IfxEdsadc_Edsadc_TimeStampCounter *timeStamp)
Configure Time Stamp Counter.
Definition: IfxEdsadc_Edsadc.h:640
IfxEdsadc_Edsadc_ChannelConfig::gainFactor
uint16 gainFactor
Multiplication Factor for Gain Correction.
Definition: IfxEdsadc_Edsadc.h:353
IfxEdsadc_InputGain_factor1
Input gain factor: 1.
Definition: IfxEdsadc.h:241
IfxEdsadc_OffsetCompensationFilter_disabled
Offset Compensation filter disabled.
Definition: IfxEdsadc.h:343
IfxEdsadc_Edsadc_initCombFilter
void IfxEdsadc_Edsadc_initCombFilter(IfxEdsadc_Edsadc_Channel *channel, const IfxEdsadc_Edsadc_CombFilterConfig *config)
Initialises the comb filter.
Definition: IfxEdsadc_Edsadc.c:299
IfxPort_PadDriver_cmosAutomotiveSpeed1
Speed grade 1.
Definition: IfxPort.h:153
IfxEdsadc_ResultDisplayMode_signed
Signed: result values range from -215 to +215.
Definition: IfxEdsadc.h:387
IfxEdsadc_Edsadc.h
EDSADC EDSADC details.
IfxEdsadc_AuxServiceRequest_never
Never, service requests disabled.
Definition: IfxEdsadc.h:94
IfxEdsadc_Edsadc_IntegratorConfig::discardCount
uint16 discardCount
Number of discarded values to after active trigger: 1 .. 64.
Definition: IfxEdsadc_Edsadc.h:252
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:50
IfxEdsadc_Edsadc_GainCalibrationConfig::calFactor
uint16 calFactor
Multiplication Factor for Gain Calibration.
Definition: IfxEdsadc_Edsadc.h:303
IfxEdsadc_Edsadc_calcDIVM
IFX_STATIC sint32 IfxEdsadc_Edsadc_calcDIVM(float32 sourceFreq, float32 *targetFreq)
calculate division factor for modulator clock period
Definition: IfxEdsadc_Edsadc.c:79
IfxEdsadc_Edsadc_DemodulatorConfig::integrationTrigger
IfxEdsadc_IntegratorTrigger integrationTrigger
Integrator trigger mode selection.
Definition: IfxEdsadc_Edsadc.h:219
IfxEdsadc_Edsadc_CarrierGenConfig::pinNeg
IFX_CONST IfxEdsadc_Cgpwm_Out * pinNeg
Negative-carrier pin configuration.
Definition: IfxEdsadc_Edsadc.h:323
IfxEdsadc_Edsadc_DemodulatorConfig
Demodulator configuration structure.
Definition: IfxEdsadc_Edsadc.h:213
IfxEdsadc_Edsadc_DemodulatorConfig::timestampTrigger
IfxEdsadc_TimestampTrigger timestampTrigger
Timestamp trigger mode selection.
Definition: IfxEdsadc_Edsadc.h:220
IfxEdsadc_Edsadc_CarrierGenConfig::pinMode
IfxPort_OutputMode pinMode
Carrier pins output mode.
Definition: IfxEdsadc_Edsadc.h:324
IfxEdsadc_TimeStampCounterControl_off
Timestamp counter is off.
Definition: IfxEdsadc.h:516
IfxEdsadc_EventSelect_everyNewResult
Always, for each new result value.
Definition: IfxEdsadc.h:158
IfxEdsadc_Edsadc_FirFilterConfig::serviceRequest
IfxEdsadc_MainServiceRequest serviceRequest
Service Request generation for main service request.
Definition: IfxEdsadc_Edsadc.h:231
IfxEdsadc_Edsadc_CarrierGenConfig
Carrier generation configuration structure.
Definition: IfxEdsadc_Edsadc.h:318
IfxEdsadc_Edsadc_FirFilterConfig::fir1Enabled
boolean fir1Enabled
FIR filter 0 enable/disable selection.
Definition: IfxEdsadc_Edsadc.h:237
IfxEdsadc_Edsadc_initDemodulator
void IfxEdsadc_Edsadc_initDemodulator(IfxEdsadc_Edsadc_Channel *channel, const IfxEdsadc_Edsadc_DemodulatorConfig *config)
Initialises the demodulator.
Definition: IfxEdsadc_Edsadc.c:312
IfxEdsadc_Edsadc_CarrierGenConfig::pinDriver
IfxPort_PadDriver pinDriver
Carrier pins pad driver.
Definition: IfxEdsadc_Edsadc.h:325
IfxEdsadc_TimeStampCounterClockSelection_div1
fTSTMP = fMOD
Definition: IfxEdsadc.h:453
IfxEdsadc_Edsadc_FirFilterConfig::fir0Enabled
boolean fir0Enabled
FIR filter 0 enable/disable selection.
Definition: IfxEdsadc_Edsadc.h:236
IfxEdsadc_Edsadc_initModulator
void IfxEdsadc_Edsadc_initModulator(IfxEdsadc_Edsadc_Channel *channel, const IfxEdsadc_Edsadc_ModulatorConfig *config)
Initialises the modulator.
Definition: IfxEdsadc_Edsadc.c:381
IfxEdsadc_Dsn_In
DS negative pin mapping structure.
Definition: IfxEdsadc_PinMap.h:56
IfxEdsadc_Edsadc_RectifierConfig::signPeriod
uint8 signPeriod
Sign period.
Definition: IfxEdsadc_Edsadc.h:280
IfxEdsadc_Edsadc_ChannelPins::dspMode
IfxPort_InputMode dspMode
the DSP pin output mode which should be configured
Definition: IfxEdsadc_Edsadc.h:186
IfxEdsadc_Edsadc_Channel::channel
Ifx_EDSADC_CH * channel
Specifies the pointer to the EDSADC channel registers.
Definition: IfxEdsadc_Edsadc.h:335
IfxEdsadc_Edsadc_GainCalibrationConfig::cicDecimationRate
uint8 cicDecimationRate
Decimation Rate of the CIC Filter During Calibration(GAINCTR register)
Definition: IfxEdsadc_Edsadc.h:302
IfxEdsadc_Edsadc_ModulatorConfig::positiveInput
IfxEdsadc_InputConfig positiveInput
Modulator configuration of positive input line.
Definition: IfxEdsadc_Edsadc.h:266
IfxEdsadc_Edsadc_initChannelConfig
void IfxEdsadc_Edsadc_initChannelConfig(IfxEdsadc_Edsadc_ChannelConfig *config, IfxEdsadc_Edsadc *edsadc)
Initialise the config struct with default EDSADC channel configuration.
Definition: IfxEdsadc_Edsadc.c:201
IfxEdsadc_RestartFilterChain_on
Definition: IfxEdsadc.h:378
IfxEdsadc_Edsadc_ChannelPins
Channel Pins Configuration structure.
Definition: IfxEdsadc_Edsadc.h:175
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxEdsadc_initDsnPin
IFX_INLINE void IfxEdsadc_initDsnPin(const IfxEdsadc_Dsn_In *dsn, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a DS input.
Definition: IfxEdsadc.h:950
IfxEdsadc_Edsadc_IntegratorConfig::fcRestartControl
IfxEdsadc_RestartFilterChain fcRestartControl
Filter Chain Restart Control.
Definition: IfxEdsadc_Edsadc.h:256
IfxEdsadc_Edsadc_CarrierGenConfig::bitReversed
boolean bitReversed
Bit-Reverse PWM Generation (Normal / Bit reverse mode) selection.
Definition: IfxEdsadc_Edsadc.h:327
IfxEdsadc_Edsadc_initFirFilter
void IfxEdsadc_Edsadc_initFirFilter(IfxEdsadc_Edsadc_Channel *channel, const IfxEdsadc_Edsadc_FirFilterConfig *config)
Initialises the fir filter.
Definition: IfxEdsadc_Edsadc.c:336
IfxEdsadc_Edsadc_initIntegrator
void IfxEdsadc_Edsadc_initIntegrator(IfxEdsadc_Edsadc_Channel *channel, const IfxEdsadc_Edsadc_IntegratorConfig *config)
Initialises the integrator.
Definition: IfxEdsadc_Edsadc.c:364
IfxEdsadc_CarrierWaveformMode_sine
Carrier Generator generates sine wave.
Definition: IfxEdsadc.h:108
IfxEdsadc_ChannelId_0
Specifies the channel Index 0.
Definition: IfxEdsadc_cfg.h:72
IfxEdsadc_getModulatorInputClockFreq
float32 IfxEdsadc_getModulatorInputClockFreq(Ifx_EDSADC *edsadc)
Get the input frequency of EDSADC in Hz.
Definition: IfxEdsadc.c:176
IfxEdsadc_Edsadc_ChannelPins::itr
IFX_CONST IfxEdsadc_Itr_In * itr
the ITR Pin which should be configured
Definition: IfxEdsadc_Edsadc.h:181
IfxEdsadc_Edsadc_FirFilterConfig::serviceRequestLevel
IfxEdsadc_ServiceRequestFifolevel serviceRequestLevel
Service Request FIFO Level.
Definition: IfxEdsadc_Edsadc.h:233
IfxEdsadc_ServiceRequestFifolevel_1
Generate a service request when Fifo contain level 1 Value.
Definition: IfxEdsadc.h:407
sint32
long sint32
Definition: Platform_Types.h:134
IfxEdsadc_Dsp_In
DS positive pin mapping structure.
Definition: IfxEdsadc_PinMap.h:65
IfxEdsadc_Edsadc_IntegratorConfig::windowSize
IfxEdsadc_IntegrationWindowSize windowSize
Integrator window size.
Definition: IfxEdsadc_Edsadc.h:251
IfxEdsadc_AnalogClockSyncDelay_noDelay
no delay
Definition: IfxEdsadc.h:79
IfxEdsadc_HalfSupplyVoltage_disable
VDDM / 2 is not connected.
Definition: IfxEdsadc.h:206
IfxEdsadc_Edsadc
EDSADC handle data structure.
Definition: IfxEdsadc_Edsadc.h:311
IfxEdsadc_Edsadc_initRectifier
void IfxEdsadc_Edsadc_initRectifier(IfxEdsadc_Edsadc_Channel *channel, const IfxEdsadc_Edsadc_RectifierConfig *config)
Initialises the rectifier.
Definition: IfxEdsadc_Edsadc.c:455
IfxEdsadc_AnalogMux_doNotCopyAmx
Do not copy, timestamp uses all 16 bits.
Definition: IfxEdsadc.h:508
IfxEdsadc_Edsadc_Channel::channelId
IfxEdsadc_ChannelId channelId
Channel Id.
Definition: IfxEdsadc_Edsadc.h:336
IfxEdsadc_Edsadc_initCommonModeVoltage
IFX_INLINE void IfxEdsadc_Edsadc_initCommonModeVoltage(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, const IfxEdsadc_Edsadc_CommonModeVoltageConfig *commonMode)
initialize common mode voltage configuration
Definition: IfxEdsadc_Edsadc.h:646
IfxEdsadc_Edsadc_Config::modulatorClockMode
IfxEdsadc_ModulatorClockGeneration modulatorClockMode
Defines the way the modulator clock is generated.
Definition: IfxEdsadc_Edsadc.h:365
IfxEdsadc_ModulatorClockGeneration_syncMode
Definition: IfxEdsadc.h:334
IfxEdsadc_Edsadc_ChannelConfig::module
Ifx_EDSADC * module
Specifies the pointer to the EDSADC module registers.
Definition: IfxEdsadc_Edsadc.h:343
IfxEdsadc_CommonModeHoldVoltage_disable
VCMH is off.
Definition: IfxEdsadc.h:115
IfxEdsadc_Edsadc_FirFilterConfig::calibrationTrigger
boolean calibrationTrigger
triggger the calibration
Definition: IfxEdsadc_Edsadc.h:242
IfxEdsadc_Edsadc_initModule
void IfxEdsadc_Edsadc_initModule(IfxEdsadc_Edsadc *edsadc, IfxEdsadc_Edsadc_Config *config)
Initialise the EDSADC with the supplied configuration.
Definition: IfxEdsadc_Edsadc.c:408
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxEdsadc_IntegratorTrigger_bypassed
No integration trigger, integrator bypassed.
Definition: IfxEdsadc.h:297
IfxEdsadc_Edsadc_DemodulatorConfig::dataStream
IfxEdsadc_DataStream dataStream
Data stream select.
Definition: IfxEdsadc_Edsadc.h:217
IfxEdsadc_Itr_In
ITR pin mapping structure.
Definition: IfxEdsadc_PinMap.h:110
IfxEdsadc_Edsadc_setGainCorrectionFactor
IFX_INLINE void IfxEdsadc_Edsadc_setGainCorrectionFactor(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, uint16 gainFactor, uint8 cicShift)
set gain Correction Factor
Definition: IfxEdsadc_Edsadc.h:634
IfxEdsadc_Edsadc_ChannelConfig::cicShift
uint8 cicShift
Position of the CIC Filter Output Shifter.
Definition: IfxEdsadc_Edsadc.h:354
IfxEdsadc_Edsadc_Config::ditheringIntensity
IfxEdsadc_DitheringIntensity ditheringIntensity
Trimming Value for the Dithering Function.
Definition: IfxEdsadc_Edsadc.h:364
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxEdsadc_Edsadc_FirFilterConfig::prefilterEnabled
boolean prefilterEnabled
Enable/Disable the PreFilter.
Definition: IfxEdsadc_Edsadc.h:241
IfxEdsadc_Edsadc_ModulatorConfig::analogClockSyncDelay
IfxEdsadc_AnalogClockSyncDelay analogClockSyncDelay
Define the delay in clock cycle after sync signal.
Definition: IfxEdsadc_Edsadc.h:265
IfxEdsadc_Edsadc_Config::supplyVoltageLevel
IfxEdsadc_SupplyVoltageLevel supplyVoltageLevel
Adjusts the analog circuitry to the supply voltage used in the application system.
Definition: IfxEdsadc_Edsadc.h:366
IfxEdsadc_DitheringIntensity_minimum
Minimum dithering intensity.
Definition: IfxEdsadc.h:147
IfxEdsadc_Edsadc_FirFilterConfig::offsetCompensation
IfxEdsadc_OffsetCompensationFilter offsetCompensation
Offset Compensation Filter enable/disable selection.
Definition: IfxEdsadc_Edsadc.h:235
IfxEdsadc_DataRead_timestampOnHighbit
Single: Issue one 16-bit value per read access (timestamp on high bits)
Definition: IfxEdsadc.h:125
IfxEdsadc_Edsadc_ChannelConfig
Single channel configuration structure.
Definition: IfxEdsadc_Edsadc.h:341
IfxEdsadc_Edsadc_GainCalibrationConfig::cicShift
uint8 cicShift
Definition: IfxEdsadc_Edsadc.h:301
IfxEdsadc_RectifierSignSource_onChipGenerator
On-chip carrier generator.
Definition: IfxEdsadc.h:368
IfxEdsadc_TimestampTrigger_noTrigger
No timestamp trigger.
Definition: IfxEdsadc.h:464
IfxEdsadc_Edsadc_FirFilterConfig::auxServiceRequest
IfxEdsadc_AuxServiceRequest auxServiceRequest
Service Request Generation for Auxiliary Service Request.
Definition: IfxEdsadc_Edsadc.h:232
IfxEdsadc_Edsadc_ChannelPins::din
IFX_CONST IfxEdsadc_Din_In * din
the DIN Pin which should be configured
Definition: IfxEdsadc_Edsadc.h:179
IfxEdsadc_Edsadc_DemodulatorConfig::dataReadMode
IfxEdsadc_DataRead dataReadMode
Selects the data that is returned when register RESMx is read ().
Definition: IfxEdsadc_Edsadc.h:221
IfxEdsadc_Edsadc_ModulatorConfig::modulatorClockFreq
float32 modulatorClockFreq
Modulator clock frequency.
Definition: IfxEdsadc_Edsadc.h:263
IfxEdsadc_InputConfig_inputPin
Modulator input connected to external pin.
Definition: IfxEdsadc.h:215
IfxEdsadc_initDspPin
IFX_INLINE void IfxEdsadc_initDspPin(const IfxEdsadc_Dsp_In *dsp, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a DS input.
Definition: IfxEdsadc.h:960
IfxEdsadc_Edsadc_RectifierConfig::signDelay
uint8 signDelay
Sign delay value.
Definition: IfxEdsadc_Edsadc.h:279
IfxEdsadc_Edsadc_GainCalibrationConfig::calTarget
uint16 calTarget
Target Value for Calibrated Fullscale.
Definition: IfxEdsadc_Edsadc.h:304
IfxEdsadc_Edsadc_ChannelPins::cin
IFX_CONST IfxEdsadc_Cin_In * cin
the CIN Pin which should be configured
Definition: IfxEdsadc_Edsadc.h:177
IfxEdsadc_MainServiceRequest_everyNewResult
Always, for each new result value.
Definition: IfxEdsadc.h:311


iLLD_TC38A: IfxEdsadc_Edsadc.h Source File

  • Edsadc
  • Edsadc
IfxEdsadc_Edsadc.h
Go to the documentation of this file.
1 /**
2 * \file IfxEdsadc_Edsadc.h
3 * \brief EDSADC EDSADC details
4 * \ingroup IfxLld_Edsadc
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Edsadc_Edsadc_Usage How to use the EDSADC Interface driver?
42 * \ingroup IfxLld_Edsadc
43 *
44 * The EDSADC interface driver provides a default EDSADC configuration for converting analog data streams inputs from external modulators via digital input channels, into digital values by using the on-chip demodulator channels.
45 *
46 * In the following sections it will be described, how to integrate the driver into the application framework.
47 *
48 * \section IfxLld_Edsadc_Edsadc_Preparation Preparation
49 * \subsection IfxLld_Edsadc_Edsadc_Include Include Files
50 *
51 * Include following header file into your C code:
52 * \code
53 * #include <Edsadc/Edsadc/IfxEdsadc_Edsadc.h>
54 * \endcode
55 *
56 * \subsection IfxLld_Edsadc_Edsadc_Variables Variables
57 *
58 * Declare the EDSADC channel handle and available channels as global variables in your C code:
59 *
60 * \code
61 * static IfxEdsadc_Edsadc edsadc;
62 * IfxEdsadc_Edsadc_Channel edsadcChannel[IFXEDSADC_NUM_CHANNELS];
63 *
64 * uint8 edsadcChannelAvailable[IFXEDSADC_NUM_CHANNELS] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 };
65 * \endcode
66 *
67 *
68 * \subsection IfxLld_Edsadc_Edsadc_Init Module Initialisation
69 *
70 * The module initialisation can be done in the same function. Here an example:
71 * \code
72 *
73 * // create module config
74 * IfxEdsadc_Edsadc_Config edsadcConfig;
75 * IfxEdsadc_Edsadc_initModuleConfig(&edsadcConfig, &MODULE_EDSADC);
76 *
77 * // initialize module
78 * // IfxEdsadc_Edsadc edsadc; //declared globally
79 * IfxEdsadc_Edsadc_initModule(&edsadc, &edsadcConfig);
80 *
81 * // create channel config
82 * IfxEdsadc_Edsadc_ChannelConfig edsadcChannelConfig;
83 * IfxEdsadc_Edsadc_initChannelConfig(&edsadcChannelConfig, &edsadc);
84 *
85 * // modify default configuration
86 * edsadcChannelConfig.modulator.positiveInput = IfxEdsadc_InputConfig_inputPin;
87 * edsadcChannelConfig.modulator.negativeInput = IfxEdsadc_InputConfig_inputPin;
88 * edsadcChannelConfig.modulator.inputGain = IfxEdsadc_InputGain_factor1;
89 * edsadcChannelConfig.modulator.inputPin = IfxEdsadc_InputPin_a;
90 * edsadcChannelConfig.modulator.modulatorClockFreq = 10.0e6;
91 *
92 * edsadcChannelConfig.combFilter.decimationFactor = 32;
93 * edsadcChannelConfig.combFilter.startValue = 32;
94 *
95 * edsadcChannelConfig.firFilter.fir0Enabled = TRUE;
96 * edsadcChannelConfig.firFilter.fir1Enabled = TRUE;
97 * edsadcChannelConfig.firFilter.offsetCompensation = IfxEdsadc_OffsetCompensationFilter_disabled;
98 * edsadcChannelConfig.firFilter.fir1DecimateRate = TRUE;
99 * edsadcChannelConfig.firFilter.prefilterEnabled = TRUE;
100 *
101 *
102 * // initialize channels
103 * for(int chn=0; chn<IFXEDSADC_NUM_CHANNELS; ++chn) {
104 * if( edsadcChannelAvailable[chn] ) {
105 * edsadcChannelConfig.channelId = (IfxEdsadc_ChannelId)chn;
106 * // Note:CICSHIFT Value has to update according to application need
107 * edsadcChannelConfig.cicShift = 15;
108 * IfxEdsadc_Edsadc_initChannel(&edsadcChannel[chn], &edsadcChannelConfig);
109 * }
110 * }
111 *
112 *
113 * \endcode
114 *
115 * The EDSADC is ready for use now!
116 *
117 *
118 * \section IfxLld_Edsadc_Edsadc_Conversions Conversions
119 *
120 * The EDSADC driver provides simple to use Conversion function,
121 *
122 * \code
123 * // start conversions
124 * IfxEdsadc_Edsadc_startScan(&edsadc, 0x3f, 0x3f);
125 *
126 * // results are now available in IFXEDSADC(ds).CH[x].RESM.B.RESULT (x=0..5)
127 * \endcode
128 *
129 * The converted data can be collected using the following function
130 *
131 * \code
132 * // declared globally
133 * // sint16 result[];
134 * for(int chn=0; chn<IFXEDSADC_NUM_CHANNELS; ++chn) {
135 * if( edsadcChannelAvailable[chn] ) {
136 * result = IfxEdsadc_Edsadc_getMainResult(&edsadcChannel[chn]);
137 * }
138 * }
139 * \endcode
140 *
141 * \defgroup IfxLld_Edsadc_Edsadc EDSADC
142 * \ingroup IfxLld_Edsadc
143 * \defgroup IfxLld_Edsadc_Edsadc_DataStructures Data Structures
144 * \ingroup IfxLld_Edsadc_Edsadc
145 * \defgroup IfxLld_Edsadc_Edsadc_Module Module Functions
146 * \ingroup IfxLld_Edsadc_Edsadc
147 * \defgroup IfxLld_Edsadc_Edsadc_Channel Channel Functions
148 * \ingroup IfxLld_Edsadc_Edsadc
149 * \defgroup IfxLld_Edsadc_Edsadc_Operative Operative Functions
150 * \ingroup IfxLld_Edsadc_Edsadc
151 * \defgroup IfxLld_Edsadc_Edsadc_Results Result Functions
152 * \ingroup IfxLld_Edsadc_Edsadc
153 * \defgroup IfxLld_Edsadc_Edsadc_Interrupt Interrupt Functions
154 * \ingroup IfxLld_Edsadc_Edsadc
155 */
156
157 #ifndef IFXEDSADC_EDSADC_H
158 #define IFXEDSADC_EDSADC_H 1
159
160 /******************************************************************************/
161 /*----------------------------------Includes----------------------------------*/
162 /******************************************************************************/
163
164 #include "Edsadc/Std/IfxEdsadc.h"
165 #include "Scu/Std/IfxScuWdt.h"
166
167 /******************************************************************************/
168 /*-----------------------------Data Structures--------------------------------*/
169 /******************************************************************************/
170
171 /** \addtogroup IfxLld_Edsadc_Edsadc_DataStructures
172 * \{ */
173 /** \brief Channel Pins Configuration structure
174 */
175 typedef struct
176 {
177 IFX_CONST IfxEdsadc_Cin_In *cin; /**< \brief the CIN Pin which should be configured */
178 IfxPort_InputMode cinMode; /**< \brief the CIN pin input mode which should be configured */
179 IFX_CONST IfxEdsadc_Din_In *din; /**< \brief the DIN Pin which should be configured */
180 IfxPort_InputMode dinMode; /**< \brief the DIN pin input mode which should be configured */
181 IFX_CONST IfxEdsadc_Itr_In *itr; /**< \brief the ITR Pin which should be configured */
182 IfxPort_InputMode itrMode; /**< \brief the ITR pin input mode which should be configured */
183 IFX_CONST IfxEdsadc_Dsn_In *dsn; /**< \brief the DSN Pin which should be configured */
184 IfxPort_InputMode dsnMode; /**< \brief the DSN pin output mode which should be configured */
185 IFX_CONST IfxEdsadc_Dsp_In *dsp; /**< \brief the DSP Pin which should be configured */
186 IfxPort_InputMode dspMode; /**< \brief the DSP pin output mode which should be configured */
187 IfxPort_PadDriver pinDriver; /**< \brief Pin Driver Configuration */
188 } IfxEdsadc_Edsadc_ChannelPins;
189
190 /** \brief Comb filter configuration structure
191 */
192 typedef struct
193 {
194 uint16 decimationFactor; /**< \brief decimation rate of comb filter 4 .. 256 */
195 uint16 startValue; /**< \brief 4 .. decimationFactor */
196 } IfxEdsadc_Edsadc_CombFilterConfig;
197
198 /** \brief enable the voltage generators and select which input pins are connected to the common mode hold voltage
199 */
200 typedef struct
201 {
202 IfxEdsadc_FractionalRefVoltageSelection fractionalRefVoltage; /**< \brief Fractional Reference Voltage selection */
203 IfxEdsadc_FractionalRefVoltage refVoltageEnable; /**< \brief Fractional Reference Voltage enable/disable */
204 IfxEdsadc_HalfSupplyVoltage halfSupplyVoltge; /**< \brief Half supply voltage Enable/Disable */
205 IfxEdsadc_CommonModeHoldVoltage commonModeHoldVoltage; /**< \brief Common Mode hold Voltage Enable/ Disable */
206 uint8 positiveInput; /**< \brief Defines the connection of the respective positive input y to the common
207 * mode hold voltage. */
208 uint8 negativeInput; /**< \brief Defines the connection of the respective negative input y to the common mode hold voltage */
209 } IfxEdsadc_Edsadc_CommonModeVoltageConfig;
210
211 /** \brief Demodulator configuration structure
212 */
213 typedef struct
214 {
215 IfxEdsadc_TriggerInput triggerInput; /**< \brief Trigger selection */
216 IfxEdsadc_InputDataSource inputDataSource; /**< \brief Demodulator input data source selection */
217 IfxEdsadc_DataStream dataStream; /**< \brief Data stream select */
218 IfxEdsadc_SampleClockSource sampleClockSource; /**< \brief Demodulator sample clock source selection */
219 IfxEdsadc_IntegratorTrigger integrationTrigger; /**< \brief Integrator trigger mode selection */
220 IfxEdsadc_TimestampTrigger timestampTrigger; /**< \brief Timestamp trigger mode selection */
221 IfxEdsadc_DataRead dataReadMode; /**< \brief Selects the data that is returned when register RESMx is read (). */
222 boolean timeStampMode; /**< \brief FALSE = no timeStamp
223 * True = inserts timestamp upon trigger */
224 IfxEdsadc_ResultDisplayMode resultDisplay; /**< \brief Result Display Mode (Signed./Unsigned) */
225 } IfxEdsadc_Edsadc_DemodulatorConfig;
226
227 /** \brief FIR filters configuration structure
228 */
229 typedef struct
230 {
231 IfxEdsadc_MainServiceRequest serviceRequest; /**< \brief Service Request generation for main service request */
232 IfxEdsadc_AuxServiceRequest auxServiceRequest; /**< \brief Service Request Generation for Auxiliary Service Request */
233 IfxEdsadc_ServiceRequestFifolevel serviceRequestLevel; /**< \brief Service Request FIFO Level */
234 IfxEdsadc_EventSelect eventSelect; /**< \brief Defines when a comparator event is generated. */
235 IfxEdsadc_OffsetCompensationFilter offsetCompensation; /**< \brief Offset Compensation Filter enable/disable selection */
236 boolean fir0Enabled; /**< \brief FIR filter 0 enable/disable selection */
237 boolean fir1Enabled; /**< \brief FIR filter 0 enable/disable selection */
238 boolean rippleCompensationEnabled; /**< \brief Ripple Compensation Enabled */
239 boolean fir1DecimateRate; /**< \brief FIR1 Filter Decimation Rate */
240 boolean cicMode; /**< \brief CIC Filter mode */
241 boolean prefilterEnabled; /**< \brief Enable/Disable the PreFilter */
242 boolean calibrationTrigger; /**< \brief triggger the calibration */
243 boolean calibrationControl; /**< \brief Automatic Calibration Control */
244 IfxEdsadc_OvershootCompensation overshootCompensation; /**< \brief Overshoot Compensation Enable/Disable */
245 } IfxEdsadc_Edsadc_FirFilterConfig;
246
247 /** \brief Integrator configuration structure
248 */
249 typedef struct
250 {
251 IfxEdsadc_IntegrationWindowSize windowSize; /**< \brief Integrator window size */
252 uint16 discardCount; /**< \brief Number of discarded values to after active trigger: 1 .. 64 */
253 uint16 integrationCount; /**< \brief Number of integrated values after discard step: 1 .. 64 */
254 uint16 integrationCycles; /**< \brief Number of integration cycles: 1 .. 16. Used only when \ref IfxEdsadc_IntegrationWindowSize_internalControl */
255 IfxEdsadc_IntegrationShiftControl shiftControl; /**< \brief Integrator shift control */
256 IfxEdsadc_RestartFilterChain fcRestartControl; /**< \brief Filter Chain Restart Control */
257 } IfxEdsadc_Edsadc_IntegratorConfig;
258
259 /** \brief Modulator configuration structure
260 */
261 typedef struct
262 {
263 float32 modulatorClockFreq; /**< \brief Modulator clock frequency */
264 IfxEdsadc_InputGain inputGain; /**< \brief Modulator gain select of analog input path */
265 IfxEdsadc_AnalogClockSyncDelay analogClockSyncDelay; /**< \brief Define the delay in clock cycle after sync signal */
266 IfxEdsadc_InputConfig positiveInput; /**< \brief Modulator configuration of positive input line */
267 IfxEdsadc_InputConfig negativeInput; /**< \brief Modulator configuration of negative input line */
268 IfxEdsadc_InputPin inputPin; /**< \brief Modulator input pin selection */
269 IfxEdsadc_dithering ditheringEnabled; /**< \brief Control the Dithering Function for each modulator */
270 boolean integratorResetEnabled; /**< \brief control the modulator overload handling */
271 boolean inputMuxActionControl; /**< \brief Defines the mechanism by which the input multiplexer is controlled */
272 IfxEdsadc_InputMuxControlMode triggerEvent; /**< \brief Defines the condition for a trigger event to control the input multiplexer */
273 } IfxEdsadc_Edsadc_ModulatorConfig;
274
275 /** \brief Rectifier configuration structure
276 */
277 typedef struct
278 {
279 uint8 signDelay; /**< \brief Sign delay value */
280 uint8 signPeriod; /**< \brief Sign period */
281 IfxEdsadc_RectifierSignSource signSource; /**< \brief Rectifier sign source */
282 boolean enabled; /**< \brief Rectification enable/disable selection */
283 } IfxEdsadc_Edsadc_RectifierConfig;
284
285 /** \brief TimeStamp Counter Configuration
286 */
287 typedef struct
288 {
289 IfxEdsadc_TimeStampCounterClockSelection timeStampCounterClock; /**< \brief Timestamp Counter Clock Selection */
290 IfxEdsadc_TimeStampCounterControl timeStampCounterRunControl;
291 IfxEdsadc_AnalogMux analogMuxCopy; /**< \brief Allows copying of bitfield AMX into bitfield TIMESTAMP */
292 } IfxEdsadc_Edsadc_TimeStampCounter;
293
294 /** \} */
295
296 /** \brief Contains configurations for Gain Calibaration
297 */
298 typedef struct
299 {
300 uint16 gainFactor; /**< \brief Multiplication Factor for Gain Correction During Calibration(in GAINCTR register) */
301 uint8 cicShift;
302 uint8 cicDecimationRate; /**< \brief Decimation Rate of the CIC Filter During Calibration(GAINCTR register) */
303 uint16 calFactor; /**< \brief Multiplication Factor for Gain Calibration */
304 uint16 calTarget; /**< \brief Target Value for Calibrated Fullscale */
305 } IfxEdsadc_Edsadc_GainCalibrationConfig;
306
307 /** \addtogroup IfxLld_Edsadc_Edsadc_DataStructures
308 * \{ */
309 /** \brief EDSADC handle data structure
310 */
311 typedef struct
312 {
313 Ifx_EDSADC *edsadc; /**< \brief Specifies the pointer to the EDSADC module registers */
314 } IfxEdsadc_Edsadc;
315
316 /** \brief Carrier generation configuration structure
317 */
318 typedef struct
319 {
320 IfxEdsadc_CarrierWaveformMode carrierWaveformMode; /**< \brief Carrier generation mode */
321 float32 frequency; /**< \brief Expected excitation frequency in Hz. */
322 IFX_CONST IfxEdsadc_Cgpwm_Out *pinPos; /**< \brief Positive-carrier pin configuration */
323 IFX_CONST IfxEdsadc_Cgpwm_Out *pinNeg; /**< \brief Negative-carrier pin configuration */
324 IfxPort_OutputMode pinMode; /**< \brief Carrier pins output mode */
325 IfxPort_PadDriver pinDriver; /**< \brief Carrier pins pad driver */
326 boolean inverted; /**< \brief Signal polarity (Normal / Inverted) selection */
327 boolean bitReversed; /**< \brief Bit-Reverse PWM Generation (Normal / Bit reverse mode) selection */
328 } IfxEdsadc_Edsadc_CarrierGenConfig;
329
330 /** \brief Channel handle structure
331 */
332 typedef struct
333 {
334 Ifx_EDSADC *module; /**< \brief Specifies the pointer to the EDSADC module registers */
335 Ifx_EDSADC_CH *channel; /**< \brief Specifies the pointer to the EDSADC channel registers */
336 IfxEdsadc_ChannelId channelId; /**< \brief Channel Id */
337 } IfxEdsadc_Edsadc_Channel;
338
339 /** \brief Single channel configuration structure
340 */
341 typedef struct
342 {
343 Ifx_EDSADC *module; /**< \brief Specifies the pointer to the EDSADC module registers */
344 IfxEdsadc_ChannelId channelId; /**< \brief Channel Id */
345 IfxEdsadc_Edsadc_FirFilterConfig firFilter; /**< \brief FIR filters configuration structure */
346 IfxEdsadc_Edsadc_ModulatorConfig modulator; /**< \brief Modulator configuration structure */
347 IfxEdsadc_Edsadc_DemodulatorConfig demodulator; /**< \brief Demodulator configuration structure */
348 IfxEdsadc_Edsadc_IntegratorConfig integrator; /**< \brief Integrator configuration structure */
349 IfxEdsadc_Edsadc_RectifierConfig rectifier; /**< \brief Rectifier configuration structure */
350 IfxEdsadc_Edsadc_CombFilterConfig combFilter; /**< \brief Comb filter configuration structure */
351 IfxEdsadc_Edsadc_TimeStampCounter timeStamp; /**< \brief Configure Time Stamp Counter */
352 IfxEdsadc_Edsadc_CommonModeVoltageConfig commonMode; /**< \brief Common Mode Voltage Configuration */
353 uint16 gainFactor; /**< \brief Multiplication Factor for Gain Correction */
354 uint8 cicShift; /**< \brief Position of the CIC Filter Output Shifter */
355 IFX_CONST IfxEdsadc_Edsadc_ChannelPins *channelPins; /**< \brief Channel Pins Configuration structure */
356 IfxEdsadc_Edsadc_GainCalibrationConfig gainCalibrationConfig; /**< \brief Configuration Settings for Gain Calibration */
357 } IfxEdsadc_Edsadc_ChannelConfig;
358
359 /** \brief Clock configuration data structure
360 */
361 typedef struct
362 {
363 Ifx_EDSADC *edsadc; /**< \brief Specifies the pointer to the EDSADC module registers */
364 IfxEdsadc_DitheringIntensity ditheringIntensity; /**< \brief Trimming Value for the Dithering Function */
365 IfxEdsadc_ModulatorClockGeneration modulatorClockMode; /**< \brief Defines the way the modulator clock is generated. */
366 IfxEdsadc_SupplyVoltageLevel supplyVoltageLevel; /**< \brief Adjusts the analog circuitry to the supply voltage used in the application
367 * system */
368 } IfxEdsadc_Edsadc_Config;
369
370 /** \} */
371
372 /** \addtogroup IfxLld_Edsadc_Edsadc_Module
373 * \{ */
374
375 /******************************************************************************/
376 /*-------------------------Global Function Prototypes-------------------------*/
377 /******************************************************************************/
378
379 /** \brief Initialise the EDSADC carrier generator
380 * \param edsadc pointer to the EDSADC handle (it will be initialized by this function)
381 * \param config pointer to the EDSADC carrier configuration
382 * \return None
383 */
384 IFX_EXTERN void IfxEdsadc_Edsadc_initCarrierGen(IfxEdsadc_Edsadc *edsadc, IfxEdsadc_Edsadc_CarrierGenConfig *config);
385
386 /** \brief Initialises the comb filter
387 * \param channel Pointer to the EDSADC channel handle
388 * \param config pointer to the EDSADC comb filter configuration
389 * \return None
390 */
391 IFX_EXTERN void IfxEdsadc_Edsadc_initCombFilter(IfxEdsadc_Edsadc_Channel *channel, const IfxEdsadc_Edsadc_CombFilterConfig *config);
392
393 /** \brief Initialises the demodulator
394 * \param channel Pointer to the EDSADC channel handle
395 * \param config pointer to the EDSADC demodulator configuration
396 * \return None
397 */
398 IFX_EXTERN void IfxEdsadc_Edsadc_initDemodulator(IfxEdsadc_Edsadc_Channel *channel, const IfxEdsadc_Edsadc_DemodulatorConfig *config);
399
400 /** \brief Initialises the fir filter
401 * \param channel Pointer to the EDSADC channel handle
402 * \param config pointer to the EDSADC fir filter configuration
403 * \return None
404 */
405 IFX_EXTERN void IfxEdsadc_Edsadc_initFirFilter(IfxEdsadc_Edsadc_Channel *channel, const IfxEdsadc_Edsadc_FirFilterConfig *config);
406
407 /** \brief Initialises the integrator
408 * \param channel Pointer to the EDSADC channel handle
409 * \param config pointer to the EDSADC fir integrator configuration
410 * \return None
411 */
412 IFX_EXTERN void IfxEdsadc_Edsadc_initIntegrator(IfxEdsadc_Edsadc_Channel *channel, const IfxEdsadc_Edsadc_IntegratorConfig *config);
413
414 /** \brief Initialises the modulator
415 * \param channel Pointer to the EDSADC channel handle
416 * \param config pointer to the EDSADC modulator configuration
417 * \return None
418 */
419 IFX_EXTERN void IfxEdsadc_Edsadc_initModulator(IfxEdsadc_Edsadc_Channel *channel, const IfxEdsadc_Edsadc_ModulatorConfig *config);
420
421 /** \brief Initialise the EDSADC with the supplied configuration
422 * \param edsadc pointer to the EDSADC handle (it will be initialized by this function)
423 * \param config pointer to the EDSADC module configuration
424 * \return None
425 *
426 * A coding example can be found in \ref IfxLld_Edsadc_Edsadc_Usage
427 *
428 */
429 IFX_EXTERN void IfxEdsadc_Edsadc_initModule(IfxEdsadc_Edsadc *edsadc, IfxEdsadc_Edsadc_Config *config);
430
431 /** \brief Initialise the config struct with default EDSADC configuration
432 * \param config pointer to the EDSADC module configuration
433 * \param edsadc base address of the EDSADC register space
434 * \return None
435 *
436 * A coding example can be found in \ref IfxLld_Edsadc_Edsadc_Usage
437 *
438 */
439 IFX_EXTERN void IfxEdsadc_Edsadc_initModuleConfig(IfxEdsadc_Edsadc_Config *config, Ifx_EDSADC *edsadc);
440
441 /** \brief Initialises the rectifier
442 * \param channel Pointer to the EDSADC channel handle
443 * \param config pointer to the EDSADC fir rectifier configuration
444 * \return None
445 */
446 IFX_EXTERN void IfxEdsadc_Edsadc_initRectifier(IfxEdsadc_Edsadc_Channel *channel, const IfxEdsadc_Edsadc_RectifierConfig *config);
447
448 /** \} */
449
450 /** \addtogroup IfxLld_Edsadc_Edsadc_Channel
451 * \{ */
452
453 /******************************************************************************/
454 /*-------------------------Global Function Prototypes-------------------------*/
455 /******************************************************************************/
456
457 /** \brief Initialise a EDSADC channel with the supplied configuration
458 * \param channel pointer to the EDSADC channel handle (it will be initialized by this function)
459 * \param config pointer to the EDSADCChannel configuration
460 * \return None
461 *
462 * A coding example can be found in \ref IfxLld_Edsadc_Edsadc_Usage
463 *
464 */
465 IFX_EXTERN void IfxEdsadc_Edsadc_initChannel(IfxEdsadc_Edsadc_Channel *channel, const IfxEdsadc_Edsadc_ChannelConfig *config);
466
467 /** \brief Initialise the config struct with default EDSADC channel configuration
468 * \param config pointer to the EDSADC Channel configuration (it will be initialized by this function)
469 * \param edsadc pointer to the EDSADC handle
470 * \return None
471 *
472 * A coding example can be found in \ref IfxLld_Edsadc_Edsadc_Usage
473 *
474 */
475 IFX_EXTERN void IfxEdsadc_Edsadc_initChannelConfig(IfxEdsadc_Edsadc_ChannelConfig *config, IfxEdsadc_Edsadc *edsadc);
476
477 /** \} */
478
479 /** \addtogroup IfxLld_Edsadc_Edsadc_Operative
480 * \{ */
481
482 /******************************************************************************/
483 /*-------------------------Inline Function Prototypes-------------------------*/
484 /******************************************************************************/
485
486 /** \brief Enables the conversion of multiple channels
487 * \param edsadc EDSADC handle
488 * \param modulatorMask the modulator which should be running (bitwise selection)
489 * \param channelMask the channels which should be scanned (bitwise selection)
490 * \return None
491 *
492 * A coding example can be found in \ref IfxLld_Edsadc_Edsadc_Usage
493 *
494 */
495 IFX_INLINE void IfxEdsadc_Edsadc_startScan(IfxEdsadc_Edsadc *edsadc, uint32 modulatorMask, uint32 channelMask);
496
497 /** \brief Disables the conversion of multiple channels
498 * \param edsadc Pointer to the EDSADC handle
499 * \param modulatorMask the modulator which should be running (bitwise selection)
500 * \return None
501 *
502 * A coding example can be found in \ref IfxLld_Edsadc_Edsadc_Usage
503 *
504 */
505 IFX_INLINE void IfxEdsadc_Edsadc_stopScan(IfxEdsadc_Edsadc *edsadc, uint32 modulatorMask);
506
507 /** \} */
508
509 /** \addtogroup IfxLld_Edsadc_Edsadc_Results
510 * \{ */
511
512 /******************************************************************************/
513 /*-------------------------Inline Function Prototypes-------------------------*/
514 /******************************************************************************/
515
516 /** \brief Get result from the main chain
517 * \param channel Pointer to the EDSADC channel handle
518 * \return result from the main chain
519 *
520 * A coding example can be found in \ref IfxLld_Edsadc_Edsadc_Usage
521 *
522 */
523 IFX_INLINE sint16 IfxEdsadc_Edsadc_getMainResult(IfxEdsadc_Edsadc_Channel *channel);
524
525 /** \brief give the subsequent result
526 * \param channel channel ID
527 * \return return the Subsequent Result
528 */
529 IFX_INLINE sint32 IfxEdsadc_Edsadc_getSubsequentResult(IfxEdsadc_Edsadc_Channel *channel);
530
531 /** \} */
532
533 /** \addtogroup IfxLld_Edsadc_Edsadc_Interrupt
534 * \{ */
535
536 /******************************************************************************/
537 /*-------------------------Inline Function Prototypes-------------------------*/
538 /******************************************************************************/
539
540 /** \brief Get the interrupt source register for a Aux event
541 * \param channel Pointer to the EDSADC channel handle
542 * \return Address/pointer to the interrupt source register
543 */
544 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEdsadc_Edsadc_getAuxSrc(IfxEdsadc_Edsadc_Channel *channel);
545
546 /** \brief Get the interrupt source register for a Main event
547 * \param channel Pointer to the EDSADC channel handle
548 * \return Address/pointer to the interrupt source register
549 */
550 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEdsadc_Edsadc_getMainSrc(IfxEdsadc_Edsadc_Channel *channel);
551
552 /** \} */
553
554 /******************************************************************************/
555 /*-------------------------Inline Function Prototypes-------------------------*/
556 /******************************************************************************/
557
558 /** \brief set gain Correction Factor
559 * \param edsadc Pointer to edsadc Module space
560 * \param channel specifies channel number
561 * \param gainFactor Mulitiplication factor for gain correction
562 * \param cicShift Position of CIC filter output shifter
563 * Note:Value has to update according to application need
564 * \return None
565 */
566 IFX_INLINE void IfxEdsadc_Edsadc_setGainCorrectionFactor(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, uint16 gainFactor, uint8 cicShift);
567
568 /** \brief Configure Time Stamp Counter
569 * \param edsadc pointer to Module Space
570 * \param channel specifies channel ID
571 * \param timeStamp specifies the timeStamp Configuration
572 * \return None
573 */
574 IFX_INLINE void IfxEdsadc_Edsadc_initTimeStampCounter(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, const IfxEdsadc_Edsadc_TimeStampCounter *timeStamp);
575
576 /** \brief initialize common mode voltage configuration
577 * \param edsadc pointer to Module space
578 * \param channel channel no
579 * \param commonMode pointer to common mode voltage config structure
580 * \return None
581 */
582 IFX_INLINE void IfxEdsadc_Edsadc_initCommonModeVoltage(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, const IfxEdsadc_Edsadc_CommonModeVoltageConfig *commonMode);
583
584 /******************************************************************************/
585 /*-------------------------Global Function Prototypes-------------------------*/
586 /******************************************************************************/
587
588 /**
589 * \param config Pointer to DSADC Carrier Configuration
590 * \return None
591 */
592 IFX_EXTERN void IfxEdsadc_Edsadc_initCarrierGenConfig(IfxEdsadc_Edsadc_CarrierGenConfig *config);
593
594 /******************************************************************************/
595 /*---------------------Inline Function Implementations------------------------*/
596 /******************************************************************************/
597
598 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEdsadc_Edsadc_getAuxSrc(IfxEdsadc_Edsadc_Channel *channel)
599 {
600 return IfxEdsadc_getAuxSrc(channel->module, channel->channelId);
601 }
602
603
604 IFX_INLINE sint16 IfxEdsadc_Edsadc_getMainResult(IfxEdsadc_Edsadc_Channel *channel)
605 {
606 return IfxEdsadc_getMainResult(channel->module, channel->channelId);
607 }
608
609
610 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEdsadc_Edsadc_getMainSrc(IfxEdsadc_Edsadc_Channel *channel)
611 {
612 return IfxEdsadc_getMainSrc(channel->module, channel->channelId);
613 }
614
615
616 IFX_INLINE sint32 IfxEdsadc_Edsadc_getSubsequentResult(IfxEdsadc_Edsadc_Channel *channel)
617 {
618 return IfxEdsadc_getSubsequentResult(channel->module, channel->channelId);
619 }
620
621
622 IFX_INLINE void IfxEdsadc_Edsadc_startScan(IfxEdsadc_Edsadc *edsadc, uint32 modulatorMask, uint32 channelMask)
623 {
624 IfxEdsadc_startScan(edsadc->edsadc, modulatorMask, channelMask);
625 }
626
627
628 IFX_INLINE void IfxEdsadc_Edsadc_stopScan(IfxEdsadc_Edsadc *edsadc, uint32 modulatorMask)
629 {
630 IfxEdsadc_stopScan(edsadc->edsadc, modulatorMask);
631 }
632
633
634 IFX_INLINE void IfxEdsadc_Edsadc_setGainCorrectionFactor(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, uint16 gainFactor, uint8 cicShift)
635 {
636 IfxEdsadc_setGainCorrectionFactor(edsadc, channel, gainFactor, cicShift);
637 }
638
639
640 IFX_INLINE void IfxEdsadc_Edsadc_initTimeStampCounter(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, const IfxEdsadc_Edsadc_TimeStampCounter *timeStamp)
641 {
642 IfxEdsadc_setTimeStampCounter(edsadc, channel, timeStamp->timeStampCounterClock, timeStamp->timeStampCounterRunControl, timeStamp->analogMuxCopy);
643 }
644
645
646 IFX_INLINE void IfxEdsadc_Edsadc_initCommonModeVoltage(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, const IfxEdsadc_Edsadc_CommonModeVoltageConfig *commonMode)
647 {
648 IfxEdsadc_setCommonModeVoltage(edsadc, channel, commonMode->fractionalRefVoltage, commonMode->refVoltageEnable, commonMode->halfSupplyVoltge, commonMode->commonModeHoldVoltage, commonMode->positiveInput, commonMode->negativeInput);
649 }
650
651
652 #endif /* IFXEDSADC_EDSADC_H */
IfxEdsadc_DataRead
IfxEdsadc_DataRead
Select the data to be returned when register RESM is read Definition in Ifx_DSADC.DICFG.B.DRM.
Definition: IfxEdsadc.h:122
IfxEdsadc_RestartFilterChain
IfxEdsadc_RestartFilterChain
Restart the filter chain when an integration window starts.
Definition: IfxEdsadc.h:376
IfxEdsadc_Edsadc_ModulatorConfig::inputPin
IfxEdsadc_InputPin inputPin
Modulator input pin selection.
Definition: IfxEdsadc_Edsadc.h:268
IfxEdsadc_Edsadc_ChannelConfig::combFilter
IfxEdsadc_Edsadc_CombFilterConfig combFilter
Comb filter configuration structure.
Definition: IfxEdsadc_Edsadc.h:350
IfxEdsadc_Edsadc_ChannelPins::dsp
IFX_CONST IfxEdsadc_Dsp_In * dsp
the DSP Pin which should be configured
Definition: IfxEdsadc_Edsadc.h:185
IfxEdsadc_Edsadc_ChannelConfig::channelPins
IFX_CONST IfxEdsadc_Edsadc_ChannelPins * channelPins
Channel Pins Configuration structure.
Definition: IfxEdsadc_Edsadc.h:355
IfxEdsadc_Edsadc_DemodulatorConfig::resultDisplay
IfxEdsadc_ResultDisplayMode resultDisplay
Result Display Mode (Signed./Unsigned)
Definition: IfxEdsadc_Edsadc.h:224
IfxEdsadc_Edsadc_ChannelConfig::demodulator
IfxEdsadc_Edsadc_DemodulatorConfig demodulator
Demodulator configuration structure.
Definition: IfxEdsadc_Edsadc.h:347
IfxEdsadc_Edsadc_FirFilterConfig::eventSelect
IfxEdsadc_EventSelect eventSelect
Defines when a comparator event is generated.
Definition: IfxEdsadc_Edsadc.h:234
IfxEdsadc_Edsadc_ModulatorConfig::inputMuxActionControl
boolean inputMuxActionControl
Defines the mechanism by which the input multiplexer is controlled.
Definition: IfxEdsadc_Edsadc.h:271
IfxEdsadc_Edsadc_FirFilterConfig::calibrationControl
boolean calibrationControl
Automatic Calibration Control.
Definition: IfxEdsadc_Edsadc.h:243
IfxEdsadc_Cgpwm_Out
CGPWM pin mapping structure.
Definition: IfxEdsadc_PinMap.h:119
IfxEdsadc_Edsadc_ModulatorConfig::inputGain
IfxEdsadc_InputGain inputGain
Modulator gain select of analog input path.
Definition: IfxEdsadc_Edsadc.h:264
IfxEdsadc_Edsadc_CombFilterConfig
Comb filter configuration structure.
Definition: IfxEdsadc_Edsadc.h:192
IfxEdsadc_Edsadc_ChannelConfig::gainCalibrationConfig
IfxEdsadc_Edsadc_GainCalibrationConfig gainCalibrationConfig
Configuration Settings for Gain Calibration.
Definition: IfxEdsadc_Edsadc.h:356
IfxEdsadc_Edsadc_IntegratorConfig::integrationCount
uint16 integrationCount
Number of integrated values after discard step: 1 .. 64.
Definition: IfxEdsadc_Edsadc.h:253
IfxEdsadc_Edsadc_ChannelConfig::integrator
IfxEdsadc_Edsadc_IntegratorConfig integrator
Integrator configuration structure.
Definition: IfxEdsadc_Edsadc.h:348
IfxEdsadc_Din_In
DIN pin mapping structure.
Definition: IfxEdsadc_PinMap.h:83
IfxEdsadc_Cin_In
CIN pin mapping structure.
Definition: IfxEdsadc_PinMap.h:74
IfxEdsadc_Edsadc_CommonModeVoltageConfig::refVoltageEnable
IfxEdsadc_FractionalRefVoltage refVoltageEnable
Fractional Reference Voltage enable/disable.
Definition: IfxEdsadc_Edsadc.h:203
IfxEdsadc_Edsadc_ChannelConfig::commonMode
IfxEdsadc_Edsadc_CommonModeVoltageConfig commonMode
Common Mode Voltage Configuration.
Definition: IfxEdsadc_Edsadc.h:352
IfxEdsadc_FractionalRefVoltageSelection
IfxEdsadc_FractionalRefVoltageSelection
Fraction reference voltage selection.
Definition: IfxEdsadc.h:194
IfxEdsadc_Edsadc_getMainResult
IFX_INLINE sint16 IfxEdsadc_Edsadc_getMainResult(IfxEdsadc_Edsadc_Channel *channel)
Get result from the main chain.
Definition: IfxEdsadc_Edsadc.h:604
IfxEdsadc_Edsadc_Channel
Channel handle structure.
Definition: IfxEdsadc_Edsadc.h:332
IfxEdsadc_Edsadc_initModuleConfig
IFX_EXTERN void IfxEdsadc_Edsadc_initModuleConfig(IfxEdsadc_Edsadc_Config *config, Ifx_EDSADC *edsadc)
Initialise the config struct with default EDSADC configuration.
Definition: IfxEdsadc_Edsadc.c:442
IfxEdsadc_Edsadc_DemodulatorConfig::triggerInput
IfxEdsadc_TriggerInput triggerInput
Trigger selection.
Definition: IfxEdsadc_Edsadc.h:215
IfxEdsadc_InputPin
IfxEdsadc_InputPin
Modulator input pin selection Definition in Ifx_DSADC.MODCFGx.B.INMUX.
Definition: IfxEdsadc.h:261
IfxEdsadc_Edsadc_initChannel
IFX_EXTERN void IfxEdsadc_Edsadc_initChannel(IfxEdsadc_Edsadc_Channel *channel, const IfxEdsadc_Edsadc_ChannelConfig *config)
Initialise a EDSADC channel with the supplied configuration.
Definition: IfxEdsadc_Edsadc.c:138
IfxEdsadc_ModulatorClockGeneration
IfxEdsadc_ModulatorClockGeneration
Defines the way the modulator clock is generated Definition in Ifx_DSADC.GLOBCFG.B.USC.
Definition: IfxEdsadc.h:332
IfxEdsadc_InputDataSource
IfxEdsadc_InputDataSource
Demodulator input data source selection Definition in Ifx_EDSADC.DICFG.B.DSRC.
Definition: IfxEdsadc.h:224
IfxEdsadc_Edsadc_ChannelPins::cinMode
IfxPort_InputMode cinMode
the CIN pin input mode which should be configured
Definition: IfxEdsadc_Edsadc.h:178
IfxEdsadc_Edsadc_ModulatorConfig::triggerEvent
IfxEdsadc_InputMuxControlMode triggerEvent
Defines the condition for a trigger event to control the input multiplexer.
Definition: IfxEdsadc_Edsadc.h:272
IfxEdsadc_Edsadc_CarrierGenConfig::pinPos
IFX_CONST IfxEdsadc_Cgpwm_Out * pinPos
Positive-carrier pin configuration.
Definition: IfxEdsadc_Edsadc.h:322
IfxEdsadc_Edsadc_FirFilterConfig::cicMode
boolean cicMode
CIC Filter mode.
Definition: IfxEdsadc_Edsadc.h:240
IfxEdsadc_Edsadc_CarrierGenConfig::inverted
boolean inverted
Signal polarity (Normal / Inverted) selection.
Definition: IfxEdsadc_Edsadc.h:326
IfxEdsadc_Edsadc_ModulatorConfig::negativeInput
IfxEdsadc_InputConfig negativeInput
Modulator configuration of negative input line.
Definition: IfxEdsadc_Edsadc.h:267
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:140
IfxEdsadc_Edsadc_CommonModeVoltageConfig::fractionalRefVoltage
IfxEdsadc_FractionalRefVoltageSelection fractionalRefVoltage
Fractional Reference Voltage selection.
Definition: IfxEdsadc_Edsadc.h:202
IfxEdsadc_Edsadc_CarrierGenConfig::frequency
float32 frequency
Expected excitation frequency in Hz.
Definition: IfxEdsadc_Edsadc.h:321
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxEdsadc_Edsadc_ModulatorConfig::integratorResetEnabled
boolean integratorResetEnabled
control the modulator overload handling
Definition: IfxEdsadc_Edsadc.h:270
IfxEdsadc_Edsadc_ChannelConfig::timeStamp
IfxEdsadc_Edsadc_TimeStampCounter timeStamp
Configure Time Stamp Counter.
Definition: IfxEdsadc_Edsadc.h:351
IfxEdsadc_InputMuxControlMode
IfxEdsadc_InputMuxControlMode
specifies input multiplexer control mode defined in MODULE_EDSADC.MODCFG.B.INMODE ...
Definition: IfxEdsadc.h:250
float32
float float32
Definition: Platform_Types.h:170
IfxEdsadc_Edsadc_GainCalibrationConfig
Contains configurations for Gain Calibaration.
Definition: IfxEdsadc_Edsadc.h:298
IfxEdsadc_Edsadc_IntegratorConfig::shiftControl
IfxEdsadc_IntegrationShiftControl shiftControl
Integrator shift control.
Definition: IfxEdsadc_Edsadc.h:255
IfxEdsadc_Edsadc_ChannelConfig::firFilter
IfxEdsadc_Edsadc_FirFilterConfig firFilter
FIR filters configuration structure.
Definition: IfxEdsadc_Edsadc.h:345
IfxEdsadc_Edsadc::edsadc
Ifx_EDSADC * edsadc
Specifies the pointer to the EDSADC module registers.
Definition: IfxEdsadc_Edsadc.h:313
IfxEdsadc_Edsadc_Config
Clock configuration data structure.
Definition: IfxEdsadc_Edsadc.h:361
IfxEdsadc_Edsadc_ModulatorConfig
Modulator configuration structure.
Definition: IfxEdsadc_Edsadc.h:261
IfxEdsadc_Edsadc_getMainSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEdsadc_Edsadc_getMainSrc(IfxEdsadc_Edsadc_Channel *channel)
Get the interrupt source register for a Main event.
Definition: IfxEdsadc_Edsadc.h:610
IfxEdsadc_DitheringIntensity
IfxEdsadc_DitheringIntensity
Trimming Value for Dithering function Definition in Ifx_DSADC.GLOBCFG.B.DITRIM.
Definition: IfxEdsadc.h:145
IfxEdsadc_Edsadc_RectifierConfig::signSource
IfxEdsadc_RectifierSignSource signSource
Rectifier sign source.
Definition: IfxEdsadc_Edsadc.h:281
IfxEdsadc_MainServiceRequest
IfxEdsadc_MainServiceRequest
Service request generation (main chain) Definition in Ifx_EDSADC.FCFGM.B.SRGM.
Definition: IfxEdsadc.h:306
IfxEdsadc_Edsadc_CombFilterConfig::startValue
uint16 startValue
4 .. decimationFactor
Definition: IfxEdsadc_Edsadc.h:195
IfxEdsadc_EventSelect
IfxEdsadc_EventSelect
Define when comparator event is generated Definition in Ifx_DSADC.FCFGM.B.ESEL.
Definition: IfxEdsadc.h:156
IfxEdsadc_ServiceRequestFifolevel
IfxEdsadc_ServiceRequestFifolevel
Service request fifo level Definition in Ifx_EDSADC.RFC.B.SRLVL.
Definition: IfxEdsadc.h:405
IfxEdsadc_FractionalRefVoltage
IfxEdsadc_FractionalRefVoltage
Fractional Reference Voltage Enable.
Definition: IfxEdsadc.h:186
IfxEdsadc_Edsadc_IntegratorConfig::integrationCycles
uint16 integrationCycles
Number of integration cycles: 1 .. 16. Used only when IfxEdsadc_IntegrationWindowSize_internalControl...
Definition: IfxEdsadc_Edsadc.h:254
IfxEdsadc.h
EDSADC basic functionality.
IfxEdsadc_Edsadc_DemodulatorConfig::sampleClockSource
IfxEdsadc_SampleClockSource sampleClockSource
Demodulator sample clock source selection.
Definition: IfxEdsadc_Edsadc.h:218
IfxEdsadc_Edsadc_FirFilterConfig
FIR filters configuration structure.
Definition: IfxEdsadc_Edsadc.h:229
IfxEdsadc_Edsadc_CarrierGenConfig::carrierWaveformMode
IfxEdsadc_CarrierWaveformMode carrierWaveformMode
Carrier generation mode.
Definition: IfxEdsadc_Edsadc.h:320
IfxEdsadc_Edsadc_initCarrierGen
IFX_EXTERN void IfxEdsadc_Edsadc_initCarrierGen(IfxEdsadc_Edsadc *edsadc, IfxEdsadc_Edsadc_CarrierGenConfig *config)
Initialise the EDSADC carrier generator.
Definition: IfxEdsadc_Edsadc.c:107
IfxEdsadc_Edsadc_FirFilterConfig::fir1DecimateRate
boolean fir1DecimateRate
FIR1 Filter Decimation Rate.
Definition: IfxEdsadc_Edsadc.h:239
IfxEdsadc_Edsadc_CommonModeVoltageConfig::halfSupplyVoltge
IfxEdsadc_HalfSupplyVoltage halfSupplyVoltge
Half supply voltage Enable/Disable.
Definition: IfxEdsadc_Edsadc.h:204
IfxEdsadc_InputConfig
IfxEdsadc_InputConfig
Modulator configuration of positive/negative input line Definition in Ifx_DSADC.MODCFGx.B.INCFGP and Ifx_DSADC.MODCFGx.B.INCFGN.
Definition: IfxEdsadc.h:213
IfxEdsadc_getMainSrc
volatile Ifx_SRC_SRCR * IfxEdsadc_getMainSrc(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
Get the interrupt source register for a Main event.
Definition: IfxEdsadc.c:161
IfxEdsadc_Edsadc_IntegratorConfig
Integrator configuration structure.
Definition: IfxEdsadc_Edsadc.h:249
IfxEdsadc_Edsadc_ChannelPins::dinMode
IfxPort_InputMode dinMode
the DIN pin input mode which should be configured
Definition: IfxEdsadc_Edsadc.h:180
IfxEdsadc_Edsadc_getSubsequentResult
IFX_INLINE sint32 IfxEdsadc_Edsadc_getSubsequentResult(IfxEdsadc_Edsadc_Channel *channel)
give the subsequent result
Definition: IfxEdsadc_Edsadc.h:616
IfxEdsadc_Edsadc_ModulatorConfig::ditheringEnabled
IfxEdsadc_dithering ditheringEnabled
Control the Dithering Function for each modulator.
Definition: IfxEdsadc_Edsadc.h:269
IfxEdsadc_Edsadc_DemodulatorConfig::timeStampMode
boolean timeStampMode
FALSE = no timeStamp True = inserts timestamp upon trigger.
Definition: IfxEdsadc_Edsadc.h:222
IfxEdsadc_TriggerInput
IfxEdsadc_TriggerInput
Trigger select Definition in Ifx_EDSADC.DICFG.B.TRSEL.
Definition: IfxEdsadc.h:473
IfxEdsadc_Edsadc_ChannelConfig::rectifier
IfxEdsadc_Edsadc_RectifierConfig rectifier
Rectifier configuration structure.
Definition: IfxEdsadc_Edsadc.h:349
IfxEdsadc_IntegrationShiftControl
IfxEdsadc_IntegrationShiftControl
Controls the data shifter after the integrator that selects the portion of the integrator data for th...
Definition: IfxEdsadc.h:272
IfxEdsadc_IntegrationWindowSize
IfxEdsadc_IntegrationWindowSize
Integrator window size Definition in Ifx_DSADC.IWCTR.B.IWS.
Definition: IfxEdsadc.h:285
IfxEdsadc_Edsadc_CombFilterConfig::decimationFactor
uint16 decimationFactor
decimation rate of comb filter 4 .. 256
Definition: IfxEdsadc_Edsadc.h:194
IfxEdsadc_InputGain
IfxEdsadc_InputGain
Modulator gain select of analog input path Definition in Ifx_DSADC.MODCFGx.B.GAINSEL.
Definition: IfxEdsadc.h:239
IfxEdsadc_Edsadc_RectifierConfig
Rectifier configuration structure.
Definition: IfxEdsadc_Edsadc.h:277
IfxScuWdt.h
SCU basic functionality.
IfxEdsadc_TimeStampCounterClockSelection
IfxEdsadc_TimeStampCounterClockSelection
Time Stamp Counter Clock Selection.
Definition: IfxEdsadc.h:451
IfxEdsadc_Edsadc_ChannelPins::dsn
IFX_CONST IfxEdsadc_Dsn_In * dsn
the DSN Pin which should be configured
Definition: IfxEdsadc_Edsadc.h:183
IfxEdsadc_Edsadc_DemodulatorConfig::inputDataSource
IfxEdsadc_InputDataSource inputDataSource
Demodulator input data source selection.
Definition: IfxEdsadc_Edsadc.h:216
IfxEdsadc_Edsadc_ChannelConfig::modulator
IfxEdsadc_Edsadc_ModulatorConfig modulator
Modulator configuration structure.
Definition: IfxEdsadc_Edsadc.h:346
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxEdsadc_OvershootCompensation
IfxEdsadc_OvershootCompensation
Overshoot Compensation Enable. Defined in fx_DSADC.FCFGM.B.OVCEN.
Definition: IfxEdsadc.h:356
IfxEdsadc_AnalogMux
IfxEdsadc_AnalogMux
Allows copying of bitfield AMX into bitfield TIMESTAMP.
Definition: IfxEdsadc.h:506
sint16
short sint16
Definition: Platform_Types.h:129
IfxEdsadc_Edsadc_ChannelPins::dsnMode
IfxPort_InputMode dsnMode
the DSN pin output mode which should be configured
Definition: IfxEdsadc_Edsadc.h:184
IfxEdsadc_Edsadc_GainCalibrationConfig::gainFactor
uint16 gainFactor
Multiplication Factor for Gain Correction During Calibration(in GAINCTR register) ...
Definition: IfxEdsadc_Edsadc.h:300
IfxEdsadc_Edsadc_RectifierConfig::enabled
boolean enabled
Rectification enable/disable selection.
Definition: IfxEdsadc_Edsadc.h:282
IfxEdsadc_RectifierSignSource
IfxEdsadc_RectifierSignSource
Rectifier sign source Selects the sign signal that is to be delayed. Definition in Ifx_DSADC...
Definition: IfxEdsadc.h:366
IfxEdsadc_SampleClockSource
IfxEdsadc_SampleClockSource
Demodulator sample clock source select Definition in Ifx_EDSADC.DICFG.B.CSRC.
Definition: IfxEdsadc.h:394
IfxEdsadc_Edsadc_FirFilterConfig::overshootCompensation
IfxEdsadc_OvershootCompensation overshootCompensation
Overshoot Compensation Enable/Disable.
Definition: IfxEdsadc_Edsadc.h:244
IfxEdsadc_Edsadc_ChannelPins::itrMode
IfxPort_InputMode itrMode
the ITR pin input mode which should be configured
Definition: IfxEdsadc_Edsadc.h:182
IfxEdsadc_ChannelId
IfxEdsadc_ChannelId
Specifies the channel Index.
Definition: IfxEdsadc_cfg.h:70
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxEdsadc_Edsadc_TimeStampCounter::timeStampCounterRunControl
IfxEdsadc_TimeStampCounterControl timeStampCounterRunControl
Definition: IfxEdsadc_Edsadc.h:290
IfxEdsadc_Edsadc_initTimeStampCounter
IFX_INLINE void IfxEdsadc_Edsadc_initTimeStampCounter(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, const IfxEdsadc_Edsadc_TimeStampCounter *timeStamp)
Configure Time Stamp Counter.
Definition: IfxEdsadc_Edsadc.h:640
IfxEdsadc_Edsadc_ChannelConfig::gainFactor
uint16 gainFactor
Multiplication Factor for Gain Correction.
Definition: IfxEdsadc_Edsadc.h:353
IfxEdsadc_Edsadc_CommonModeVoltageConfig
enable the voltage generators and select which input pins are connected to the common mode hold volta...
Definition: IfxEdsadc_Edsadc.h:200
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxEdsadc_Edsadc_initCombFilter
IFX_EXTERN void IfxEdsadc_Edsadc_initCombFilter(IfxEdsadc_Edsadc_Channel *channel, const IfxEdsadc_Edsadc_CombFilterConfig *config)
Initialises the comb filter.
Definition: IfxEdsadc_Edsadc.c:299
IfxEdsadc_getSubsequentResult
IFX_INLINE sint32 IfxEdsadc_getSubsequentResult(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
Get the subsequent result.
Definition: IfxEdsadc.h:904
IfxEdsadc_Edsadc_IntegratorConfig::discardCount
uint16 discardCount
Number of discarded values to after active trigger: 1 .. 64.
Definition: IfxEdsadc_Edsadc.h:252
IfxEdsadc_Edsadc_GainCalibrationConfig::calFactor
uint16 calFactor
Multiplication Factor for Gain Calibration.
Definition: IfxEdsadc_Edsadc.h:303
IfxEdsadc_Edsadc_DemodulatorConfig::integrationTrigger
IfxEdsadc_IntegratorTrigger integrationTrigger
Integrator trigger mode selection.
Definition: IfxEdsadc_Edsadc.h:219
IfxEdsadc_Edsadc_CarrierGenConfig::pinNeg
IFX_CONST IfxEdsadc_Cgpwm_Out * pinNeg
Negative-carrier pin configuration.
Definition: IfxEdsadc_Edsadc.h:323
IfxEdsadc_stopScan
IFX_INLINE void IfxEdsadc_stopScan(Ifx_EDSADC *edsadc, uint32 modulatorMask)
Disables the conversion of multiple channels.
Definition: IfxEdsadc.h:1047
IfxEdsadc_Edsadc_DemodulatorConfig
Demodulator configuration structure.
Definition: IfxEdsadc_Edsadc.h:213
IfxEdsadc_Edsadc_DemodulatorConfig::timestampTrigger
IfxEdsadc_TimestampTrigger timestampTrigger
Timestamp trigger mode selection.
Definition: IfxEdsadc_Edsadc.h:220
IfxEdsadc_Edsadc_CarrierGenConfig::pinMode
IfxPort_OutputMode pinMode
Carrier pins output mode.
Definition: IfxEdsadc_Edsadc.h:324
IfxEdsadc_setTimeStampCounter
void IfxEdsadc_setTimeStampCounter(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, IfxEdsadc_TimeStampCounterClockSelection timeStampCounterClock, IfxEdsadc_TimeStampCounterControl runControl, IfxEdsadc_AnalogMux analogMuxCopy)
Definition: IfxEdsadc.c:237
IfxEdsadc_Edsadc_startScan
IFX_INLINE void IfxEdsadc_Edsadc_startScan(IfxEdsadc_Edsadc *edsadc, uint32 modulatorMask, uint32 channelMask)
Enables the conversion of multiple channels.
Definition: IfxEdsadc_Edsadc.h:622
IfxEdsadc_Edsadc_TimeStampCounter::analogMuxCopy
IfxEdsadc_AnalogMux analogMuxCopy
Allows copying of bitfield AMX into bitfield TIMESTAMP.
Definition: IfxEdsadc_Edsadc.h:291
IfxEdsadc_TimestampTrigger
IfxEdsadc_TimestampTrigger
Timestamp trigger mode Definition in Ifx_EDSADC.DICFG.B.TSTRMODE.
Definition: IfxEdsadc.h:462
IfxEdsadc_Edsadc_FirFilterConfig::serviceRequest
IfxEdsadc_MainServiceRequest serviceRequest
Service Request generation for main service request.
Definition: IfxEdsadc_Edsadc.h:231
IfxEdsadc_Edsadc_CarrierGenConfig
Carrier generation configuration structure.
Definition: IfxEdsadc_Edsadc.h:318
IfxEdsadc_Edsadc_FirFilterConfig::fir1Enabled
boolean fir1Enabled
FIR filter 0 enable/disable selection.
Definition: IfxEdsadc_Edsadc.h:237
IfxEdsadc_Edsadc_initDemodulator
IFX_EXTERN void IfxEdsadc_Edsadc_initDemodulator(IfxEdsadc_Edsadc_Channel *channel, const IfxEdsadc_Edsadc_DemodulatorConfig *config)
Initialises the demodulator.
Definition: IfxEdsadc_Edsadc.c:312
IfxEdsadc_Edsadc_ChannelPins::pinDriver
IfxPort_PadDriver pinDriver
Pin Driver Configuration.
Definition: IfxEdsadc_Edsadc.h:187
IfxEdsadc_Edsadc_CommonModeVoltageConfig::negativeInput
uint8 negativeInput
Defines the connection of the respective negative input y to the common mode hold voltage...
Definition: IfxEdsadc_Edsadc.h:208
IfxEdsadc_Edsadc_FirFilterConfig::fir0Enabled
boolean fir0Enabled
FIR filter 0 enable/disable selection.
Definition: IfxEdsadc_Edsadc.h:236
IfxEdsadc_Edsadc_initModulator
IFX_EXTERN void IfxEdsadc_Edsadc_initModulator(IfxEdsadc_Edsadc_Channel *channel, const IfxEdsadc_Edsadc_ModulatorConfig *config)
Initialises the modulator.
Definition: IfxEdsadc_Edsadc.c:381
IfxEdsadc_Dsn_In
DS negative pin mapping structure.
Definition: IfxEdsadc_PinMap.h:56
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:151
IfxEdsadc_Edsadc_RectifierConfig::signPeriod
uint8 signPeriod
Sign period.
Definition: IfxEdsadc_Edsadc.h:280
IfxEdsadc_Edsadc_ChannelPins::dspMode
IfxPort_InputMode dspMode
the DSP pin output mode which should be configured
Definition: IfxEdsadc_Edsadc.h:186
IfxEdsadc_Edsadc_Channel::channel
Ifx_EDSADC_CH * channel
Specifies the pointer to the EDSADC channel registers.
Definition: IfxEdsadc_Edsadc.h:335
IfxEdsadc_Edsadc_GainCalibrationConfig::cicDecimationRate
uint8 cicDecimationRate
Decimation Rate of the CIC Filter During Calibration(GAINCTR register)
Definition: IfxEdsadc_Edsadc.h:302
IfxEdsadc_Edsadc_ModulatorConfig::positiveInput
IfxEdsadc_InputConfig positiveInput
Modulator configuration of positive input line.
Definition: IfxEdsadc_Edsadc.h:266
IfxEdsadc_Edsadc_initChannelConfig
IFX_EXTERN void IfxEdsadc_Edsadc_initChannelConfig(IfxEdsadc_Edsadc_ChannelConfig *config, IfxEdsadc_Edsadc *edsadc)
Initialise the config struct with default EDSADC channel configuration.
Definition: IfxEdsadc_Edsadc.c:201
IfxEdsadc_setCommonModeVoltage
void IfxEdsadc_setCommonModeVoltage(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, IfxEdsadc_FractionalRefVoltageSelection voltage, IfxEdsadc_FractionalRefVoltage refMode, IfxEdsadc_HalfSupplyVoltage hsvMode, IfxEdsadc_CommonModeHoldVoltage cmhvMode, uint8 positiveInput, uint8 negativeInput)
set common mode voltage Parameters
Definition: IfxEdsadc.c:211
IfxEdsadc_Edsadc_ChannelPins
Channel Pins Configuration structure.
Definition: IfxEdsadc_Edsadc.h:175
IfxEdsadc_CommonModeHoldVoltage
IfxEdsadc_CommonModeHoldVoltage
Common Mode Hold Voltage Enable.
Definition: IfxEdsadc.h:113
IfxEdsadc_Edsadc_CommonModeVoltageConfig::commonModeHoldVoltage
IfxEdsadc_CommonModeHoldVoltage commonModeHoldVoltage
Common Mode hold Voltage Enable/ Disable.
Definition: IfxEdsadc_Edsadc.h:205
IfxEdsadc_Edsadc_initCarrierGenConfig
IFX_EXTERN void IfxEdsadc_Edsadc_initCarrierGenConfig(IfxEdsadc_Edsadc_CarrierGenConfig *config)
Definition: IfxEdsadc_Edsadc.c:496
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxEdsadc_Edsadc_IntegratorConfig::fcRestartControl
IfxEdsadc_RestartFilterChain fcRestartControl
Filter Chain Restart Control.
Definition: IfxEdsadc_Edsadc.h:256
IfxEdsadc_Edsadc_CarrierGenConfig::bitReversed
boolean bitReversed
Bit-Reverse PWM Generation (Normal / Bit reverse mode) selection.
Definition: IfxEdsadc_Edsadc.h:327
IfxEdsadc_Edsadc_initFirFilter
IFX_EXTERN void IfxEdsadc_Edsadc_initFirFilter(IfxEdsadc_Edsadc_Channel *channel, const IfxEdsadc_Edsadc_FirFilterConfig *config)
Initialises the fir filter.
Definition: IfxEdsadc_Edsadc.c:336
IfxEdsadc_OffsetCompensationFilter
IfxEdsadc_OffsetCompensationFilter
Enable the offset compensation filter Definition in Ifx_DSADC.FCFGM.B.OCEN.
Definition: IfxEdsadc.h:341
IfxEdsadc_DataStream
IfxEdsadc_DataStream
Data stream select Definition in Ifx_DSADC.DICFG.B.DSS.
Definition: IfxEdsadc.h:132
IfxEdsadc_Edsadc_initIntegrator
IFX_EXTERN void IfxEdsadc_Edsadc_initIntegrator(IfxEdsadc_Edsadc_Channel *channel, const IfxEdsadc_Edsadc_IntegratorConfig *config)
Initialises the integrator.
Definition: IfxEdsadc_Edsadc.c:364
IfxEdsadc_Edsadc_ChannelPins::itr
IFX_CONST IfxEdsadc_Itr_In * itr
the ITR Pin which should be configured
Definition: IfxEdsadc_Edsadc.h:181
IfxEdsadc_Edsadc_FirFilterConfig::serviceRequestLevel
IfxEdsadc_ServiceRequestFifolevel serviceRequestLevel
Service Request FIFO Level.
Definition: IfxEdsadc_Edsadc.h:233
IfxEdsadc_Edsadc_TimeStampCounter::timeStampCounterClock
IfxEdsadc_TimeStampCounterClockSelection timeStampCounterClock
Timestamp Counter Clock Selection.
Definition: IfxEdsadc_Edsadc.h:289
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:81
sint32
long sint32
Definition: Platform_Types.h:134
IfxEdsadc_Dsp_In
DS positive pin mapping structure.
Definition: IfxEdsadc_PinMap.h:65
IfxEdsadc_Edsadc_IntegratorConfig::windowSize
IfxEdsadc_IntegrationWindowSize windowSize
Integrator window size.
Definition: IfxEdsadc_Edsadc.h:251
IfxEdsadc_startScan
IFX_INLINE void IfxEdsadc_startScan(Ifx_EDSADC *edsadc, uint32 modulatorMask, uint32 channelMask)
Enables the conversion of multiple channels.
Definition: IfxEdsadc.h:1041
IfxEdsadc_getAuxSrc
volatile Ifx_SRC_SRCR * IfxEdsadc_getAuxSrc(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
Address/pointer to the interrupt source register.
Definition: IfxEdsadc.c:75
IfxEdsadc_setGainCorrectionFactor
void IfxEdsadc_setGainCorrectionFactor(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, uint16 gainFactor, uint8 cicShift)
configure gain correction
Definition: IfxEdsadc.c:226
IfxEdsadc_Edsadc
EDSADC handle data structure.
Definition: IfxEdsadc_Edsadc.h:311
IfxEdsadc_Edsadc_initRectifier
IFX_EXTERN void IfxEdsadc_Edsadc_initRectifier(IfxEdsadc_Edsadc_Channel *channel, const IfxEdsadc_Edsadc_RectifierConfig *config)
Initialises the rectifier.
Definition: IfxEdsadc_Edsadc.c:455
IfxEdsadc_dithering
IfxEdsadc_dithering
Controls the dithering function for each modulator separately Definition in Ifx_DSADC.MODCFG.B.DITHEN.
Definition: IfxEdsadc.h:496
IfxEdsadc_Edsadc_FirFilterConfig::rippleCompensationEnabled
boolean rippleCompensationEnabled
Ripple Compensation Enabled.
Definition: IfxEdsadc_Edsadc.h:238
IfxEdsadc_Edsadc_Channel::channelId
IfxEdsadc_ChannelId channelId
Channel Id.
Definition: IfxEdsadc_Edsadc.h:336
IfxEdsadc_Edsadc_initCommonModeVoltage
IFX_INLINE void IfxEdsadc_Edsadc_initCommonModeVoltage(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, const IfxEdsadc_Edsadc_CommonModeVoltageConfig *commonMode)
initialize common mode voltage configuration
Definition: IfxEdsadc_Edsadc.h:646
IfxEdsadc_Edsadc_Config::modulatorClockMode
IfxEdsadc_ModulatorClockGeneration modulatorClockMode
Defines the way the modulator clock is generated.
Definition: IfxEdsadc_Edsadc.h:365
IfxEdsadc_TimeStampCounterControl
IfxEdsadc_TimeStampCounterControl
Timestamp Counter Run Control.
Definition: IfxEdsadc.h:514
IfxEdsadc_Edsadc_Channel::module
Ifx_EDSADC * module
Specifies the pointer to the EDSADC module registers.
Definition: IfxEdsadc_Edsadc.h:334
IfxEdsadc_Edsadc_FirFilterConfig::calibrationTrigger
boolean calibrationTrigger
triggger the calibration
Definition: IfxEdsadc_Edsadc.h:242
IfxEdsadc_Edsadc_CommonModeVoltageConfig::positiveInput
uint8 positiveInput
Defines the connection of the respective positive input y to the common mode hold voltage...
Definition: IfxEdsadc_Edsadc.h:206
IfxEdsadc_Edsadc_stopScan
IFX_INLINE void IfxEdsadc_Edsadc_stopScan(IfxEdsadc_Edsadc *edsadc, uint32 modulatorMask)
Disables the conversion of multiple channels.
Definition: IfxEdsadc_Edsadc.h:628
IfxEdsadc_CarrierWaveformMode
IfxEdsadc_CarrierWaveformMode
Carrier generation mode Definition in Ifx_EDSADC.CGCFG.B.CGMOD.
Definition: IfxEdsadc.h:103
IfxEdsadc_Edsadc_initModule
IFX_EXTERN void IfxEdsadc_Edsadc_initModule(IfxEdsadc_Edsadc *edsadc, IfxEdsadc_Edsadc_Config *config)
Initialise the EDSADC with the supplied configuration.
Definition: IfxEdsadc_Edsadc.c:408
IfxEdsadc_ResultDisplayMode
IfxEdsadc_ResultDisplayMode
specifies result display mode (signed/unsigned) Definition in Ifx_DSADC.DICFG.B.RDM ...
Definition: IfxEdsadc.h:385
IfxEdsadc_HalfSupplyVoltage
IfxEdsadc_HalfSupplyVoltage
Half Supply Voltage Enable.
Definition: IfxEdsadc.h:204
IfxEdsadc_Edsadc_DemodulatorConfig::dataStream
IfxEdsadc_DataStream dataStream
Data stream select.
Definition: IfxEdsadc_Edsadc.h:217
IfxEdsadc_Itr_In
ITR pin mapping structure.
Definition: IfxEdsadc_PinMap.h:110
IfxEdsadc_Edsadc_setGainCorrectionFactor
IFX_INLINE void IfxEdsadc_Edsadc_setGainCorrectionFactor(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel, uint16 gainFactor, uint8 cicShift)
set gain Correction Factor
Definition: IfxEdsadc_Edsadc.h:634
IfxEdsadc_Edsadc_ChannelConfig::cicShift
uint8 cicShift
Position of the CIC Filter Output Shifter.
Definition: IfxEdsadc_Edsadc.h:354
IfxEdsadc_Edsadc_Config::ditheringIntensity
IfxEdsadc_DitheringIntensity ditheringIntensity
Trimming Value for the Dithering Function.
Definition: IfxEdsadc_Edsadc.h:364
IfxEdsadc_IntegratorTrigger
IfxEdsadc_IntegratorTrigger
Integrator trigger mode NOTE: switch-first to bypassed before using other mode Definition in Ifx_EDSA...
Definition: IfxEdsadc.h:295
IfxEdsadc_Edsadc_FirFilterConfig::prefilterEnabled
boolean prefilterEnabled
Enable/Disable the PreFilter.
Definition: IfxEdsadc_Edsadc.h:241
IfxEdsadc_Edsadc_ModulatorConfig::analogClockSyncDelay
IfxEdsadc_AnalogClockSyncDelay analogClockSyncDelay
Define the delay in clock cycle after sync signal.
Definition: IfxEdsadc_Edsadc.h:265
IfxEdsadc_Edsadc_Config::supplyVoltageLevel
IfxEdsadc_SupplyVoltageLevel supplyVoltageLevel
Adjusts the analog circuitry to the supply voltage used in the application system.
Definition: IfxEdsadc_Edsadc.h:366
IfxEdsadc_Edsadc_FirFilterConfig::offsetCompensation
IfxEdsadc_OffsetCompensationFilter offsetCompensation
Offset Compensation Filter enable/disable selection.
Definition: IfxEdsadc_Edsadc.h:235
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxEdsadc_Edsadc_ChannelConfig
Single channel configuration structure.
Definition: IfxEdsadc_Edsadc.h:341
IfxEdsadc_Edsadc_GainCalibrationConfig::cicShift
uint8 cicShift
Definition: IfxEdsadc_Edsadc.h:301
IfxEdsadc_AuxServiceRequest
IfxEdsadc_AuxServiceRequest
Service request generation (auxiliary) Definition in Ifx_EDSADC.FCFGM.B.SRGA.
Definition: IfxEdsadc.h:92
IfxEdsadc_AnalogClockSyncDelay
IfxEdsadc_AnalogClockSyncDelay
Analog Clock Synchronization Delay Definition in Ifx_DSADC.MODCFG.B.ACSD.
Definition: IfxEdsadc.h:77
IfxEdsadc_Edsadc_FirFilterConfig::auxServiceRequest
IfxEdsadc_AuxServiceRequest auxServiceRequest
Service Request Generation for Auxiliary Service Request.
Definition: IfxEdsadc_Edsadc.h:232
IfxEdsadc_Edsadc_ChannelPins::din
IFX_CONST IfxEdsadc_Din_In * din
the DIN Pin which should be configured
Definition: IfxEdsadc_Edsadc.h:179
IfxEdsadc_Edsadc_DemodulatorConfig::dataReadMode
IfxEdsadc_DataRead dataReadMode
Selects the data that is returned when register RESMx is read ().
Definition: IfxEdsadc_Edsadc.h:221
IfxEdsadc_SupplyVoltageLevel
IfxEdsadc_SupplyVoltageLevel
Adjusts the analog circuitry to the supply voltage used in the application system.Defined In defined in MODULE_EDSADC.GLOBCFG.B.SUPLEV.
Definition: IfxEdsadc.h:433
IfxEdsadc_Edsadc_getAuxSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEdsadc_Edsadc_getAuxSrc(IfxEdsadc_Edsadc_Channel *channel)
Get the interrupt source register for a Aux event.
Definition: IfxEdsadc_Edsadc.h:598
IfxEdsadc_Edsadc_TimeStampCounter
TimeStamp Counter Configuration.
Definition: IfxEdsadc_Edsadc.h:287
IfxEdsadc_Edsadc_ModulatorConfig::modulatorClockFreq
float32 modulatorClockFreq
Modulator clock frequency.
Definition: IfxEdsadc_Edsadc.h:263
IfxEdsadc_getMainResult
IFX_INLINE sint16 IfxEdsadc_getMainResult(Ifx_EDSADC *edsadc, IfxEdsadc_ChannelId channel)
Get result from the main chain.
Definition: IfxEdsadc.h:898
IfxEdsadc_Edsadc_RectifierConfig::signDelay
uint8 signDelay
Sign delay value.
Definition: IfxEdsadc_Edsadc.h:279
IfxEdsadc_Edsadc_GainCalibrationConfig::calTarget
uint16 calTarget
Target Value for Calibrated Fullscale.
Definition: IfxEdsadc_Edsadc.h:304
IfxEdsadc_Edsadc_ChannelPins::cin
IFX_CONST IfxEdsadc_Cin_In * cin
the CIN Pin which should be configured
Definition: IfxEdsadc_Edsadc.h:177


iLLD_TC38A: IfxEdsadc_PinMap.c Source File

  • _PinMap
IfxEdsadc_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxEdsadc_PinMap.c
3 * \brief EDSADC I/O map
4 * \ingroup IfxLld_Edsadc
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "IfxEdsadc_PinMap.h"
44
45 IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMN_P00_5_OUT = {&MODULE_EDSADC, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt2};
46 IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMN_P02_0_OUT = {&MODULE_EDSADC, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt4};
47 IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMN_P33_11_OUT = {&MODULE_EDSADC, {&MODULE_P33,11}, IfxPort_OutputIdx_alt6};
48 IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMP_P00_6_OUT = {&MODULE_EDSADC, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt2};
49 IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMP_P02_1_OUT = {&MODULE_EDSADC, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt4};
50 IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMP_P33_12_OUT = {&MODULE_EDSADC, {&MODULE_P33,12}, IfxPort_OutputIdx_alt6};
51 IfxEdsadc_Dscin_In IfxEdsadc_DSCIN0A_P00_11_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_0, {&MODULE_P00,11}, Ifx_RxSel_a};
52 IfxEdsadc_Dscin_In IfxEdsadc_DSCIN0B_P33_5_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_0, {&MODULE_P33, 5}, Ifx_RxSel_b};
53 IfxEdsadc_Dscin_In IfxEdsadc_DSCIN1A_P00_9_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_1, {&MODULE_P00, 9}, Ifx_RxSel_a};
54 IfxEdsadc_Dscin_In IfxEdsadc_DSCIN1B_P33_3_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_1, {&MODULE_P33, 3}, Ifx_RxSel_b};
55 IfxEdsadc_Dscin_In IfxEdsadc_DSCIN2A_P00_5_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_2, {&MODULE_P00, 5}, Ifx_RxSel_a};
56 IfxEdsadc_Dscin_In IfxEdsadc_DSCIN2B_P33_1_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_2, {&MODULE_P33, 1}, Ifx_RxSel_b};
57 IfxEdsadc_Dscin_In IfxEdsadc_DSCIN3A_P00_3_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_3, {&MODULE_P00, 3}, Ifx_RxSel_a};
58 IfxEdsadc_Dscin_In IfxEdsadc_DSCIN3B_P02_7_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_3, {&MODULE_P02, 7}, Ifx_RxSel_b};
59 IfxEdsadc_Dscin_In IfxEdsadc_DSCIN4A_P00_7_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_4, {&MODULE_P00, 7}, Ifx_RxSel_a};
60 IfxEdsadc_Dscin_In IfxEdsadc_DSCIN4B_P02_5_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_4, {&MODULE_P02, 5}, Ifx_RxSel_b};
61 IfxEdsadc_Dscin_In IfxEdsadc_DSCIN5A_P00_1_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_5, {&MODULE_P00, 1}, Ifx_RxSel_a};
62 IfxEdsadc_Dscin_In IfxEdsadc_DSCIN5B_P02_3_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_5, {&MODULE_P02, 3}, Ifx_RxSel_b};
63 IfxEdsadc_Dscin_In IfxEdsadc_DSCIN6A_P00_14_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_6, {&MODULE_P00,14}, Ifx_RxSel_a};
64 IfxEdsadc_Dscin_In IfxEdsadc_DSCIN7A_P01_2_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_7, {&MODULE_P01, 2}, Ifx_RxSel_a};
65 IfxEdsadc_Dscin_In IfxEdsadc_DSCIN7B_P00_1_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_7, {&MODULE_P00, 1}, Ifx_RxSel_b};
66 IfxEdsadc_Dscin_In IfxEdsadc_DSCIN8A_P01_5_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_8, {&MODULE_P01, 5}, Ifx_RxSel_a};
67 IfxEdsadc_Dscin_In IfxEdsadc_DSCIN9A_P01_9_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_9, {&MODULE_P01, 9}, Ifx_RxSel_a};
68 IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT0_P00_11_OUT = {&MODULE_EDSADC, IfxEdsadc_ChannelId_0, {&MODULE_P00,11}, IfxPort_OutputIdx_alt4};
69 IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT0_P33_5_OUT = {&MODULE_EDSADC, IfxEdsadc_ChannelId_0, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt4};
70 IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT1_P00_9_OUT = {&MODULE_EDSADC, IfxEdsadc_ChannelId_1, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt4};
71 IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT1_P33_3_OUT = {&MODULE_EDSADC, IfxEdsadc_ChannelId_1, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt4};
72 IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT2_P00_5_OUT = {&MODULE_EDSADC, IfxEdsadc_ChannelId_2, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt4};
73 IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT2_P33_1_OUT = {&MODULE_EDSADC, IfxEdsadc_ChannelId_2, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt4};
74 IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT3_P00_3_OUT = {&MODULE_EDSADC, IfxEdsadc_ChannelId_3, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt4};
75 IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT3_P02_7_OUT = {&MODULE_EDSADC, IfxEdsadc_ChannelId_3, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt4};
76 IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT4_P00_7_OUT = {&MODULE_EDSADC, IfxEdsadc_ChannelId_4, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt4};
77 IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT4_P02_5_OUT = {&MODULE_EDSADC, IfxEdsadc_ChannelId_4, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt4};
78 IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT5_P00_1_OUT = {&MODULE_EDSADC, IfxEdsadc_ChannelId_5, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt4};
79 IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT5_P02_3_OUT = {&MODULE_EDSADC, IfxEdsadc_ChannelId_5, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt4};
80 IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT6_P00_14_OUT = {&MODULE_EDSADC, IfxEdsadc_ChannelId_6, {&MODULE_P00,14}, IfxPort_OutputIdx_alt4};
81 IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT7_P00_1_OUT = {&MODULE_EDSADC, IfxEdsadc_ChannelId_7, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt5};
82 IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT7_P01_2_OUT = {&MODULE_EDSADC, IfxEdsadc_ChannelId_7, {&MODULE_P01, 2}, IfxPort_OutputIdx_alt6};
83 IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT8_P01_5_OUT = {&MODULE_EDSADC, IfxEdsadc_ChannelId_8, {&MODULE_P01, 5}, IfxPort_OutputIdx_alt6};
84 IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT9_P01_9_OUT = {&MODULE_EDSADC, IfxEdsadc_ChannelId_9, {&MODULE_P01, 9}, IfxPort_OutputIdx_alt6};
85 IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN0A_P00_12_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_0, {&MODULE_P00,12}, Ifx_RxSel_a};
86 IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN0B_P33_6_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_0, {&MODULE_P33, 6}, Ifx_RxSel_b};
87 IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN1A_P00_10_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_1, {&MODULE_P00,10}, Ifx_RxSel_a};
88 IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN1B_P33_4_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_1, {&MODULE_P33, 4}, Ifx_RxSel_b};
89 IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN2A_P00_6_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_2, {&MODULE_P00, 6}, Ifx_RxSel_a};
90 IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN2B_P33_2_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_2, {&MODULE_P33, 2}, Ifx_RxSel_b};
91 IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN3A_P00_4_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_3, {&MODULE_P00, 4}, Ifx_RxSel_a};
92 IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN3B_P02_8_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_3, {&MODULE_P02, 8}, Ifx_RxSel_b};
93 IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN4A_P00_8_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_4, {&MODULE_P00, 8}, Ifx_RxSel_a};
94 IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN4B_P02_6_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_4, {&MODULE_P02, 6}, Ifx_RxSel_b};
95 IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN5A_P00_2_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_5, {&MODULE_P00, 2}, Ifx_RxSel_a};
96 IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN5B_P02_4_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_5, {&MODULE_P02, 4}, Ifx_RxSel_b};
97 IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN6A_P00_13_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_6, {&MODULE_P00,13}, Ifx_RxSel_a};
98 IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN7A_P01_15_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_7, {&MODULE_P01,15}, Ifx_RxSel_a};
99 IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN7B_P00_2_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_7, {&MODULE_P00, 2}, Ifx_RxSel_b};
100 IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN8A_P01_6_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_8, {&MODULE_P01, 6}, Ifx_RxSel_a};
101 IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN9A_P01_8_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_9, {&MODULE_P01, 8}, Ifx_RxSel_a};
102 IfxEdsadc_Dsn_In IfxEdsadc_DS0NA_AN3_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_0, {NULL_PTR, 3}, Ifx_RxSel_a};
103 IfxEdsadc_Dsn_In IfxEdsadc_DS0NB_AN13_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_0, {NULL_PTR,13}, Ifx_RxSel_b};
104 IfxEdsadc_Dsn_In IfxEdsadc_DS1NA_P40_7_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_1, {&MODULE_P40, 7}, Ifx_RxSel_a};
105 IfxEdsadc_Dsn_In IfxEdsadc_DS1NB_P40_9_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_1, {&MODULE_P40, 9}, Ifx_RxSel_b};
106 IfxEdsadc_Dsn_In IfxEdsadc_DS1NC_AN45_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_1, {NULL_PTR,45}, Ifx_RxSel_c};
107 IfxEdsadc_Dsn_In IfxEdsadc_DS1ND_AN47_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_1, {NULL_PTR,47}, Ifx_RxSel_d};
108 IfxEdsadc_Dsn_In IfxEdsadc_DS2NA_AN21_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_2, {NULL_PTR,21}, Ifx_RxSel_a};
109 IfxEdsadc_Dsn_In IfxEdsadc_DS2NB_P40_1_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_2, {&MODULE_P40, 1}, Ifx_RxSel_b};
110 IfxEdsadc_Dsn_In IfxEdsadc_DS3NA_AN1_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_3, {NULL_PTR, 1}, Ifx_RxSel_a};
111 IfxEdsadc_Dsn_In IfxEdsadc_DS3NB_AN15_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_3, {NULL_PTR,15}, Ifx_RxSel_b};
112 IfxEdsadc_Dsn_In IfxEdsadc_DS4NA_P00_7_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_4, {&MODULE_P00, 7}, Ifx_RxSel_a};
113 IfxEdsadc_Dsn_In IfxEdsadc_DS4NB_P00_9_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_4, {&MODULE_P00, 9}, Ifx_RxSel_b};
114 IfxEdsadc_Dsn_In IfxEdsadc_DS5NA_P00_1_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_5, {&MODULE_P00, 1}, Ifx_RxSel_a};
115 IfxEdsadc_Dsn_In IfxEdsadc_DS5NB_P00_3_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_5, {&MODULE_P00, 3}, Ifx_RxSel_b};
116 IfxEdsadc_Dsn_In IfxEdsadc_DS6NA_AN53_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_6, {NULL_PTR,53}, Ifx_RxSel_a};
117 IfxEdsadc_Dsn_In IfxEdsadc_DS6NB_P41_5_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_6, {&MODULE_P41, 5}, Ifx_RxSel_b};
118 IfxEdsadc_Dsn_In IfxEdsadc_DS7NA_AN61_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_7, {NULL_PTR,61}, Ifx_RxSel_a};
119 IfxEdsadc_Dsn_In IfxEdsadc_DS7NB_P41_7_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_7, {&MODULE_P41, 7}, Ifx_RxSel_b};
120 IfxEdsadc_Dsn_In IfxEdsadc_DS8NA_P41_1_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_8, {&MODULE_P41, 1}, Ifx_RxSel_a};
121 IfxEdsadc_Dsn_In IfxEdsadc_DS9NA_AN51_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_9, {NULL_PTR,51}, Ifx_RxSel_a};
122 IfxEdsadc_Dsn_In IfxEdsadc_DS9NB_P41_3_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_9, {&MODULE_P41, 3}, Ifx_RxSel_b};
123 IfxEdsadc_Dsp_In IfxEdsadc_DS0PA_AN2_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_0, {NULL_PTR, 2}, Ifx_RxSel_a};
124 IfxEdsadc_Dsp_In IfxEdsadc_DS0PB_AN12_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_0, {NULL_PTR,12}, Ifx_RxSel_b};
125 IfxEdsadc_Dsp_In IfxEdsadc_DS1PA_P40_6_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_1, {&MODULE_P40, 6}, Ifx_RxSel_a};
126 IfxEdsadc_Dsp_In IfxEdsadc_DS1PB_P40_8_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_1, {&MODULE_P40, 8}, Ifx_RxSel_b};
127 IfxEdsadc_Dsp_In IfxEdsadc_DS1PC_AN44_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_1, {NULL_PTR,44}, Ifx_RxSel_c};
128 IfxEdsadc_Dsp_In IfxEdsadc_DS1PD_AN46_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_1, {NULL_PTR,46}, Ifx_RxSel_d};
129 IfxEdsadc_Dsp_In IfxEdsadc_DS2PA_AN20_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_2, {NULL_PTR,20}, Ifx_RxSel_a};
130 IfxEdsadc_Dsp_In IfxEdsadc_DS2PB_P40_0_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_2, {&MODULE_P40, 0}, Ifx_RxSel_b};
131 IfxEdsadc_Dsp_In IfxEdsadc_DS3PA_AN0_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_3, {NULL_PTR, 0}, Ifx_RxSel_a};
132 IfxEdsadc_Dsp_In IfxEdsadc_DS3PB_AN14_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_3, {NULL_PTR,14}, Ifx_RxSel_b};
133 IfxEdsadc_Dsp_In IfxEdsadc_DS4PA_P00_8_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_4, {&MODULE_P00, 8}, Ifx_RxSel_a};
134 IfxEdsadc_Dsp_In IfxEdsadc_DS4PB_P00_10_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_4, {&MODULE_P00,10}, Ifx_RxSel_b};
135 IfxEdsadc_Dsp_In IfxEdsadc_DS5PA_P00_2_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_5, {&MODULE_P00, 2}, Ifx_RxSel_a};
136 IfxEdsadc_Dsp_In IfxEdsadc_DS5PB_P00_4_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_5, {&MODULE_P00, 4}, Ifx_RxSel_b};
137 IfxEdsadc_Dsp_In IfxEdsadc_DS6PA_AN52_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_6, {NULL_PTR,52}, Ifx_RxSel_a};
138 IfxEdsadc_Dsp_In IfxEdsadc_DS6PB_P41_4_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_6, {&MODULE_P41, 4}, Ifx_RxSel_b};
139 IfxEdsadc_Dsp_In IfxEdsadc_DS7PA_AN60_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_7, {NULL_PTR,60}, Ifx_RxSel_a};
140 IfxEdsadc_Dsp_In IfxEdsadc_DS7PB_P41_6_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_7, {&MODULE_P41, 6}, Ifx_RxSel_b};
141 IfxEdsadc_Dsp_In IfxEdsadc_DS8PA_P41_0_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_8, {&MODULE_P41, 0}, Ifx_RxSel_a};
142 IfxEdsadc_Dsp_In IfxEdsadc_DS9PA_AN50_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_9, {NULL_PTR,50}, Ifx_RxSel_a};
143 IfxEdsadc_Dsp_In IfxEdsadc_DS9PB_P41_2_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_9, {&MODULE_P41, 2}, Ifx_RxSel_b};
144 IfxEdsadc_Itr_In IfxEdsadc_ITR0E_P33_0_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_0, {&MODULE_P33, 0}, Ifx_RxSel_e};
145 IfxEdsadc_Itr_In IfxEdsadc_ITR0F_P33_4_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_0, {&MODULE_P33, 4}, Ifx_RxSel_f};
146 IfxEdsadc_Itr_In IfxEdsadc_ITR1E_P33_1_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_1, {&MODULE_P33, 1}, Ifx_RxSel_e};
147 IfxEdsadc_Itr_In IfxEdsadc_ITR1F_P33_5_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_1, {&MODULE_P33, 5}, Ifx_RxSel_f};
148 IfxEdsadc_Itr_In IfxEdsadc_ITR2E_P33_2_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_2, {&MODULE_P33, 2}, Ifx_RxSel_e};
149 IfxEdsadc_Itr_In IfxEdsadc_ITR2F_P33_6_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_2, {&MODULE_P33, 6}, Ifx_RxSel_f};
150 IfxEdsadc_Itr_In IfxEdsadc_ITR3E_P02_8_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_3, {&MODULE_P02, 8}, Ifx_RxSel_e};
151 IfxEdsadc_Itr_In IfxEdsadc_ITR3F_P00_9_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_3, {&MODULE_P00, 9}, Ifx_RxSel_f};
152 IfxEdsadc_Itr_In IfxEdsadc_ITR4E_P02_7_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_4, {&MODULE_P02, 7}, Ifx_RxSel_e};
153 IfxEdsadc_Itr_In IfxEdsadc_ITR4F_P00_6_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_4, {&MODULE_P00, 6}, Ifx_RxSel_f};
154 IfxEdsadc_Itr_In IfxEdsadc_ITR5E_P02_6_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_5, {&MODULE_P02, 6}, Ifx_RxSel_e};
155 IfxEdsadc_Itr_In IfxEdsadc_ITR5F_P00_3_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_5, {&MODULE_P00, 3}, Ifx_RxSel_f};
156 IfxEdsadc_Itr_In IfxEdsadc_ITR6E_P01_0_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_6, {&MODULE_P01, 0}, Ifx_RxSel_e};
157 IfxEdsadc_Itr_In IfxEdsadc_ITR6F_P00_15_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_6, {&MODULE_P00,15}, Ifx_RxSel_f};
158 IfxEdsadc_Itr_In IfxEdsadc_ITR7E_P01_4_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_7, {&MODULE_P01, 4}, Ifx_RxSel_e};
159 IfxEdsadc_Itr_In IfxEdsadc_ITR7F_P01_3_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_7, {&MODULE_P01, 3}, Ifx_RxSel_f};
160 IfxEdsadc_Itr_In IfxEdsadc_ITR8E_P01_1_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_8, {&MODULE_P01, 1}, Ifx_RxSel_e};
161 IfxEdsadc_Itr_In IfxEdsadc_ITR8F_P01_7_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_8, {&MODULE_P01, 7}, Ifx_RxSel_f};
162 IfxEdsadc_Itr_In IfxEdsadc_ITR9E_P01_11_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_9, {&MODULE_P01,11}, Ifx_RxSel_e};
163 IfxEdsadc_Itr_In IfxEdsadc_ITR9F_P01_10_IN = {&MODULE_EDSADC, IfxEdsadc_ChannelId_9, {&MODULE_P01,10}, Ifx_RxSel_f};
164 IfxEdsadc_Sg_In IfxEdsadc_SGNA_P00_4_IN = {&MODULE_EDSADC, {&MODULE_P00, 4}, Ifx_RxSel_a};
165 IfxEdsadc_Sg_In IfxEdsadc_SGNB_P33_13_IN = {&MODULE_EDSADC, {&MODULE_P33,13}, Ifx_RxSel_b};
166
167
168 const IfxEdsadc_Cgpwm_Out *IfxEdsadc_Cgpwm_Out_pinTable[IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS] = {
169 {
170 &IfxEdsadc_CGPWMN_P00_5_OUT,
171 &IfxEdsadc_CGPWMP_P00_6_OUT,
172 &IfxEdsadc_CGPWMN_P02_0_OUT,
173 &IfxEdsadc_CGPWMP_P02_1_OUT,
174 &IfxEdsadc_CGPWMN_P33_11_OUT,
175 &IfxEdsadc_CGPWMP_P33_12_OUT
176 }
177 };
178
179 const IfxEdsadc_Dscin_In *IfxEdsadc_Dscin_In_pinTable[IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_DSCIN_IN_NUM_ITEMS] = {
180 {
181 {
182 &IfxEdsadc_DSCIN0A_P00_11_IN,
183 &IfxEdsadc_DSCIN0B_P33_5_IN
184 },
185 {
186 &IfxEdsadc_DSCIN1A_P00_9_IN,
187 &IfxEdsadc_DSCIN1B_P33_3_IN
188 },
189 {
190 &IfxEdsadc_DSCIN2A_P00_5_IN,
191 &IfxEdsadc_DSCIN2B_P33_1_IN
192 },
193 {
194 &IfxEdsadc_DSCIN3A_P00_3_IN,
195 &IfxEdsadc_DSCIN3B_P02_7_IN
196 },
197 {
198 &IfxEdsadc_DSCIN4A_P00_7_IN,
199 &IfxEdsadc_DSCIN4B_P02_5_IN
200 },
201 {
202 &IfxEdsadc_DSCIN5A_P00_1_IN,
203 &IfxEdsadc_DSCIN5B_P02_3_IN
204 },
205 {
206 &IfxEdsadc_DSCIN6A_P00_14_IN,
207 NULL_PTR
208 },
209 {
210 &IfxEdsadc_DSCIN7A_P01_2_IN,
211 &IfxEdsadc_DSCIN7B_P00_1_IN
212 },
213 {
214 &IfxEdsadc_DSCIN8A_P01_5_IN,
215 NULL_PTR
216 },
217 {
218 &IfxEdsadc_DSCIN9A_P01_9_IN,
219 NULL_PTR
220 }
221 }
222 };
223
224 const IfxEdsadc_Dscout_Out *IfxEdsadc_Dscout_Out_pinTable[IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_DSCOUT_OUT_NUM_ITEMS] = {
225 {
226 {
227 &IfxEdsadc_DSCOUT0_P00_11_OUT,
228 &IfxEdsadc_DSCOUT0_P33_5_OUT
229 },
230 {
231 &IfxEdsadc_DSCOUT1_P00_9_OUT,
232 &IfxEdsadc_DSCOUT1_P33_3_OUT
233 },
234 {
235 &IfxEdsadc_DSCOUT2_P00_5_OUT,
236 &IfxEdsadc_DSCOUT2_P33_1_OUT
237 },
238 {
239 &IfxEdsadc_DSCOUT3_P00_3_OUT,
240 &IfxEdsadc_DSCOUT3_P02_7_OUT
241 },
242 {
243 &IfxEdsadc_DSCOUT4_P00_7_OUT,
244 &IfxEdsadc_DSCOUT4_P02_5_OUT
245 },
246 {
247 &IfxEdsadc_DSCOUT5_P00_1_OUT,
248 &IfxEdsadc_DSCOUT5_P02_3_OUT
249 },
250 {
251 &IfxEdsadc_DSCOUT6_P00_14_OUT,
252 NULL_PTR
253 },
254 {
255 &IfxEdsadc_DSCOUT7_P00_1_OUT,
256 &IfxEdsadc_DSCOUT7_P01_2_OUT
257 },
258 {
259 &IfxEdsadc_DSCOUT8_P01_5_OUT,
260 NULL_PTR
261 },
262 {
263 &IfxEdsadc_DSCOUT9_P01_9_OUT,
264 NULL_PTR
265 }
266 }
267 };
268
269 const IfxEdsadc_Dsdin_In *IfxEdsadc_Dsdin_In_pinTable[IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_DSDIN_IN_NUM_ITEMS] = {
270 {
271 {
272 &IfxEdsadc_DSDIN0A_P00_12_IN,
273 &IfxEdsadc_DSDIN0B_P33_6_IN
274 },
275 {
276 &IfxEdsadc_DSDIN1A_P00_10_IN,
277 &IfxEdsadc_DSDIN1B_P33_4_IN
278 },
279 {
280 &IfxEdsadc_DSDIN2A_P00_6_IN,
281 &IfxEdsadc_DSDIN2B_P33_2_IN
282 },
283 {
284 &IfxEdsadc_DSDIN3A_P00_4_IN,
285 &IfxEdsadc_DSDIN3B_P02_8_IN
286 },
287 {
288 &IfxEdsadc_DSDIN4A_P00_8_IN,
289 &IfxEdsadc_DSDIN4B_P02_6_IN
290 },
291 {
292 &IfxEdsadc_DSDIN5A_P00_2_IN,
293 &IfxEdsadc_DSDIN5B_P02_4_IN
294 },
295 {
296 &IfxEdsadc_DSDIN6A_P00_13_IN,
297 NULL_PTR
298 },
299 {
300 &IfxEdsadc_DSDIN7A_P01_15_IN,
301 &IfxEdsadc_DSDIN7B_P00_2_IN
302 },
303 {
304 &IfxEdsadc_DSDIN8A_P01_6_IN,
305 NULL_PTR
306 },
307 {
308 &IfxEdsadc_DSDIN9A_P01_8_IN,
309 NULL_PTR
310 }
311 }
312 };
313
314 const IfxEdsadc_Dsn_In *IfxEdsadc_Dsn_In_pinTable[IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_DSN_IN_NUM_ITEMS] = {
315 {
316 {
317 &IfxEdsadc_DS0NA_AN3_IN,
318 &IfxEdsadc_DS0NB_AN13_IN,
319 NULL_PTR,
320 NULL_PTR
321 },
322 {
323 &IfxEdsadc_DS1NA_P40_7_IN,
324 &IfxEdsadc_DS1NB_P40_9_IN,
325 &IfxEdsadc_DS1NC_AN45_IN,
326 &IfxEdsadc_DS1ND_AN47_IN
327 },
328 {
329 &IfxEdsadc_DS2NA_AN21_IN,
330 &IfxEdsadc_DS2NB_P40_1_IN,
331 NULL_PTR,
332 NULL_PTR
333 },
334 {
335 &IfxEdsadc_DS3NA_AN1_IN,
336 &IfxEdsadc_DS3NB_AN15_IN,
337 NULL_PTR,
338 NULL_PTR
339 },
340 {
341 &IfxEdsadc_DS4NA_P00_7_IN,
342 &IfxEdsadc_DS4NB_P00_9_IN,
343 NULL_PTR,
344 NULL_PTR
345 },
346 {
347 &IfxEdsadc_DS5NA_P00_1_IN,
348 &IfxEdsadc_DS5NB_P00_3_IN,
349 NULL_PTR,
350 NULL_PTR
351 },
352 {
353 &IfxEdsadc_DS6NA_AN53_IN,
354 &IfxEdsadc_DS6NB_P41_5_IN,
355 NULL_PTR,
356 NULL_PTR
357 },
358 {
359 &IfxEdsadc_DS7NA_AN61_IN,
360 &IfxEdsadc_DS7NB_P41_7_IN,
361 NULL_PTR,
362 NULL_PTR
363 },
364 {
365 &IfxEdsadc_DS8NA_P41_1_IN,
366 NULL_PTR,
367 NULL_PTR,
368 NULL_PTR
369 },
370 {
371 &IfxEdsadc_DS9NA_AN51_IN,
372 &IfxEdsadc_DS9NB_P41_3_IN,
373 NULL_PTR,
374 NULL_PTR
375 }
376 }
377 };
378
379 const IfxEdsadc_Dsp_In *IfxEdsadc_Dsp_In_pinTable[IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_DSP_IN_NUM_ITEMS] = {
380 {
381 {
382 &IfxEdsadc_DS0PA_AN2_IN,
383 &IfxEdsadc_DS0PB_AN12_IN,
384 NULL_PTR,
385 NULL_PTR
386 },
387 {
388 &IfxEdsadc_DS1PA_P40_6_IN,
389 &IfxEdsadc_DS1PB_P40_8_IN,
390 &IfxEdsadc_DS1PC_AN44_IN,
391 &IfxEdsadc_DS1PD_AN46_IN
392 },
393 {
394 &IfxEdsadc_DS2PA_AN20_IN,
395 &IfxEdsadc_DS2PB_P40_0_IN,
396 NULL_PTR,
397 NULL_PTR
398 },
399 {
400 &IfxEdsadc_DS3PA_AN0_IN,
401 &IfxEdsadc_DS3PB_AN14_IN,
402 NULL_PTR,
403 NULL_PTR
404 },
405 {
406 &IfxEdsadc_DS4PA_P00_8_IN,
407 &IfxEdsadc_DS4PB_P00_10_IN,
408 NULL_PTR,
409 NULL_PTR
410 },
411 {
412 &IfxEdsadc_DS5PA_P00_2_IN,
413 &IfxEdsadc_DS5PB_P00_4_IN,
414 NULL_PTR,
415 NULL_PTR
416 },
417 {
418 &IfxEdsadc_DS6PA_AN52_IN,
419 &IfxEdsadc_DS6PB_P41_4_IN,
420 NULL_PTR,
421 NULL_PTR
422 },
423 {
424 &IfxEdsadc_DS7PA_AN60_IN,
425 &IfxEdsadc_DS7PB_P41_6_IN,
426 NULL_PTR,
427 NULL_PTR
428 },
429 {
430 &IfxEdsadc_DS8PA_P41_0_IN,
431 NULL_PTR,
432 NULL_PTR,
433 NULL_PTR
434 },
435 {
436 &IfxEdsadc_DS9PA_AN50_IN,
437 &IfxEdsadc_DS9PB_P41_2_IN,
438 NULL_PTR,
439 NULL_PTR
440 }
441 }
442 };
443
444 const IfxEdsadc_Itr_In *IfxEdsadc_Itr_In_pinTable[IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_ITR_IN_NUM_ITEMS] = {
445 {
446 {
447 NULL_PTR,
448 NULL_PTR,
449 NULL_PTR,
450 NULL_PTR,
451 &IfxEdsadc_ITR0E_P33_0_IN,
452 &IfxEdsadc_ITR0F_P33_4_IN
453 },
454 {
455 NULL_PTR,
456 NULL_PTR,
457 NULL_PTR,
458 NULL_PTR,
459 &IfxEdsadc_ITR1E_P33_1_IN,
460 &IfxEdsadc_ITR1F_P33_5_IN
461 },
462 {
463 NULL_PTR,
464 NULL_PTR,
465 NULL_PTR,
466 NULL_PTR,
467 &IfxEdsadc_ITR2E_P33_2_IN,
468 &IfxEdsadc_ITR2F_P33_6_IN
469 },
470 {
471 NULL_PTR,
472 NULL_PTR,
473 NULL_PTR,
474 NULL_PTR,
475 &IfxEdsadc_ITR3E_P02_8_IN,
476 &IfxEdsadc_ITR3F_P00_9_IN
477 },
478 {
479 NULL_PTR,
480 NULL_PTR,
481 NULL_PTR,
482 NULL_PTR,
483 &IfxEdsadc_ITR4E_P02_7_IN,
484 &IfxEdsadc_ITR4F_P00_6_IN
485 },
486 {
487 NULL_PTR,
488 NULL_PTR,
489 NULL_PTR,
490 NULL_PTR,
491 &IfxEdsadc_ITR5E_P02_6_IN,
492 &IfxEdsadc_ITR5F_P00_3_IN
493 },
494 {
495 NULL_PTR,
496 NULL_PTR,
497 NULL_PTR,
498 NULL_PTR,
499 &IfxEdsadc_ITR6E_P01_0_IN,
500 &IfxEdsadc_ITR6F_P00_15_IN
501 },
502 {
503 NULL_PTR,
504 NULL_PTR,
505 NULL_PTR,
506 NULL_PTR,
507 &IfxEdsadc_ITR7E_P01_4_IN,
508 &IfxEdsadc_ITR7F_P01_3_IN
509 },
510 {
511 NULL_PTR,
512 NULL_PTR,
513 NULL_PTR,
514 NULL_PTR,
515 &IfxEdsadc_ITR8E_P01_1_IN,
516 &IfxEdsadc_ITR8F_P01_7_IN
517 },
518 {
519 NULL_PTR,
520 NULL_PTR,
521 NULL_PTR,
522 NULL_PTR,
523 &IfxEdsadc_ITR9E_P01_11_IN,
524 &IfxEdsadc_ITR9F_P01_10_IN
525 }
526 }
527 };
528
529 const IfxEdsadc_Sg_In *IfxEdsadc_Sg_In_pinTable[IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_SG_IN_NUM_ITEMS] = {
530 {
531 &IfxEdsadc_SGNA_P00_4_IN,
532 &IfxEdsadc_SGNB_P33_13_IN
533 }
534 };
IfxEdsadc_CGPWMN_P02_0_OUT
IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMN_P02_0_OUT
Definition: IfxEdsadc_PinMap.c:46
IfxEdsadc_DS5NA_P00_1_IN
IfxEdsadc_Dsn_In IfxEdsadc_DS5NA_P00_1_IN
Definition: IfxEdsadc_PinMap.c:114
IfxEdsadc_DSDIN1B_P33_4_IN
IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN1B_P33_4_IN
Definition: IfxEdsadc_PinMap.c:88
IfxEdsadc_ChannelId_3
Specifies the channel Index 3.
Definition: IfxEdsadc_cfg.h:75
IfxEdsadc_DS7NB_P41_7_IN
IfxEdsadc_Dsn_In IfxEdsadc_DS7NB_P41_7_IN
Definition: IfxEdsadc_PinMap.c:119
IfxEdsadc_ChannelId_4
Specifies the channel Index 4.
Definition: IfxEdsadc_cfg.h:76
IfxEdsadc_DSCIN5B_P02_3_IN
IfxEdsadc_Dscin_In IfxEdsadc_DSCIN5B_P02_3_IN
Definition: IfxEdsadc_PinMap.c:62
IfxEdsadc_DSDIN5B_P02_4_IN
IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN5B_P02_4_IN
Definition: IfxEdsadc_PinMap.c:96
Ifx_RxSel_e
Definition: Ifx_Types.h:133
IfxEdsadc_ITR1F_P33_5_IN
IfxEdsadc_Itr_In IfxEdsadc_ITR1F_P33_5_IN
Definition: IfxEdsadc_PinMap.c:147
IfxEdsadc_ITR9E_P01_11_IN
IfxEdsadc_Itr_In IfxEdsadc_ITR9E_P01_11_IN
Definition: IfxEdsadc_PinMap.c:162
IfxEdsadc_ITR2E_P33_2_IN
IfxEdsadc_Itr_In IfxEdsadc_ITR2E_P33_2_IN
Definition: IfxEdsadc_PinMap.c:148
Ifx_RxSel_d
Definition: Ifx_Types.h:132
IfxEdsadc_DSCOUT0_P33_5_OUT
IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT0_P33_5_OUT
Definition: IfxEdsadc_PinMap.c:69
IfxEdsadc_ChannelId_7
Specifies the channel Index 7.
Definition: IfxEdsadc_cfg.h:79
IfxEdsadc_ITR0E_P33_0_IN
IfxEdsadc_Itr_In IfxEdsadc_ITR0E_P33_0_IN
Definition: IfxEdsadc_PinMap.c:144
IfxEdsadc_DSCIN1A_P00_9_IN
IfxEdsadc_Dscin_In IfxEdsadc_DSCIN1A_P00_9_IN
Definition: IfxEdsadc_PinMap.c:53
IfxEdsadc_DSCOUT7_P01_2_OUT
IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT7_P01_2_OUT
Definition: IfxEdsadc_PinMap.c:82
IfxEdsadc_Cgpwm_Out
CGPWM pin mapping structure.
Definition: IfxEdsadc_PinMap.h:119
IfxEdsadc_DSCOUT5_P02_3_OUT
IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT5_P02_3_OUT
Definition: IfxEdsadc_PinMap.c:79
IfxEdsadc_ITR7E_P01_4_IN
IfxEdsadc_Itr_In IfxEdsadc_ITR7E_P01_4_IN
Definition: IfxEdsadc_PinMap.c:158
IfxEdsadc_DSCIN7B_P00_1_IN
IfxEdsadc_Dscin_In IfxEdsadc_DSCIN7B_P00_1_IN
Definition: IfxEdsadc_PinMap.c:65
IfxEdsadc_ITR8F_P01_7_IN
IfxEdsadc_Itr_In IfxEdsadc_ITR8F_P01_7_IN
Definition: IfxEdsadc_PinMap.c:161
IfxEdsadc_ITR5F_P00_3_IN
IfxEdsadc_Itr_In IfxEdsadc_ITR5F_P00_3_IN
Definition: IfxEdsadc_PinMap.c:155
IfxEdsadc_DS2NB_P40_1_IN
IfxEdsadc_Dsn_In IfxEdsadc_DS2NB_P40_1_IN
Definition: IfxEdsadc_PinMap.c:109
IfxEdsadc_DSDIN0B_P33_6_IN
IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN0B_P33_6_IN
Definition: IfxEdsadc_PinMap.c:86
IfxEdsadc_DS2PB_P40_0_IN
IfxEdsadc_Dsp_In IfxEdsadc_DS2PB_P40_0_IN
Definition: IfxEdsadc_PinMap.c:130
IfxEdsadc_ITR9F_P01_10_IN
IfxEdsadc_Itr_In IfxEdsadc_ITR9F_P01_10_IN
Definition: IfxEdsadc_PinMap.c:163
IfxEdsadc_ITR6E_P01_0_IN
IfxEdsadc_Itr_In IfxEdsadc_ITR6E_P01_0_IN
Definition: IfxEdsadc_PinMap.c:156
IfxPort_OutputIdx_alt2
Definition: IfxPort.h:130
IfxEdsadc_DS1NB_P40_9_IN
IfxEdsadc_Dsn_In IfxEdsadc_DS1NB_P40_9_IN
Definition: IfxEdsadc_PinMap.c:105
Ifx_RxSel_a
Definition: Ifx_Types.h:129
IfxEdsadc_DS1PB_P40_8_IN
IfxEdsadc_Dsp_In IfxEdsadc_DS1PB_P40_8_IN
Definition: IfxEdsadc_PinMap.c:126
IfxEdsadc_DS3NB_AN15_IN
IfxEdsadc_Dsn_In IfxEdsadc_DS3NB_AN15_IN
Definition: IfxEdsadc_PinMap.c:111
IfxEdsadc_DSDIN7B_P00_2_IN
IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN7B_P00_2_IN
Definition: IfxEdsadc_PinMap.c:99
IfxEdsadc_DS6PB_P41_4_IN
IfxEdsadc_Dsp_In IfxEdsadc_DS6PB_P41_4_IN
Definition: IfxEdsadc_PinMap.c:138
IfxEdsadc_DS6NA_AN53_IN
IfxEdsadc_Dsn_In IfxEdsadc_DS6NA_AN53_IN
Definition: IfxEdsadc_PinMap.c:116
IfxEdsadc_DSDIN9A_P01_8_IN
IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN9A_P01_8_IN
Definition: IfxEdsadc_PinMap.c:101
IfxEdsadc_SGNB_P33_13_IN
IfxEdsadc_Sg_In IfxEdsadc_SGNB_P33_13_IN
Definition: IfxEdsadc_PinMap.c:165
IfxEdsadc_DSCIN9A_P01_9_IN
IfxEdsadc_Dscin_In IfxEdsadc_DSCIN9A_P01_9_IN
Definition: IfxEdsadc_PinMap.c:67
IfxEdsadc_Sg_In_pinTable
const IfxEdsadc_Sg_In * IfxEdsadc_Sg_In_pinTable[IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_SG_IN_NUM_ITEMS]
Definition: IfxEdsadc_PinMap.c:529
IfxEdsadc_DS8NA_P41_1_IN
IfxEdsadc_Dsn_In IfxEdsadc_DS8NA_P41_1_IN
Definition: IfxEdsadc_PinMap.c:120
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
Ifx_RxSel_b
Definition: Ifx_Types.h:130
IfxEdsadc_DS6NB_P41_5_IN
IfxEdsadc_Dsn_In IfxEdsadc_DS6NB_P41_5_IN
Definition: IfxEdsadc_PinMap.c:117
IfxEdsadc_ITR4E_P02_7_IN
IfxEdsadc_Itr_In IfxEdsadc_ITR4E_P02_7_IN
Definition: IfxEdsadc_PinMap.c:152
IfxEdsadc_DS9NB_P41_3_IN
IfxEdsadc_Dsn_In IfxEdsadc_DS9NB_P41_3_IN
Definition: IfxEdsadc_PinMap.c:122
IfxEdsadc_ChannelId_9
Specifies the channel Index 9.
Definition: IfxEdsadc_cfg.h:81
IfxEdsadc_DSCOUT5_P00_1_OUT
IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT5_P00_1_OUT
Definition: IfxEdsadc_PinMap.c:78
IFXEDSADC_PINMAP_DSCOUT_OUT_NUM_ITEMS
#define IFXEDSADC_PINMAP_DSCOUT_OUT_NUM_ITEMS
Definition: IfxEdsadc_PinMap.h:279
IfxEdsadc_DS5PB_P00_4_IN
IfxEdsadc_Dsp_In IfxEdsadc_DS5PB_P00_4_IN
Definition: IfxEdsadc_PinMap.c:136
IfxEdsadc_DS7PB_P41_6_IN
IfxEdsadc_Dsp_In IfxEdsadc_DS7PB_P41_6_IN
Definition: IfxEdsadc_PinMap.c:140
IfxEdsadc_DSCOUT4_P00_7_OUT
IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT4_P00_7_OUT
Definition: IfxEdsadc_PinMap.c:76
IfxPort_OutputIdx_alt6
Definition: IfxPort.h:134
IFXEDSADC_PINMAP_ITR_IN_NUM_ITEMS
#define IFXEDSADC_PINMAP_ITR_IN_NUM_ITEMS
Definition: IfxEdsadc_PinMap.h:283
IfxEdsadc_DSCOUT8_P01_5_OUT
IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT8_P01_5_OUT
Definition: IfxEdsadc_PinMap.c:83
IfxEdsadc_DSDIN3A_P00_4_IN
IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN3A_P00_4_IN
Definition: IfxEdsadc_PinMap.c:91
IfxEdsadc_Itr_In_pinTable
const IfxEdsadc_Itr_In * IfxEdsadc_Itr_In_pinTable[IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_ITR_IN_NUM_ITEMS]
Definition: IfxEdsadc_PinMap.c:444
IfxEdsadc_ChannelId_8
Specifies the channel Index 8.
Definition: IfxEdsadc_cfg.h:80
IfxEdsadc_DSCOUT3_P00_3_OUT
IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT3_P00_3_OUT
Definition: IfxEdsadc_PinMap.c:74
IFXEDSADC_PINMAP_NUM_CHANNELS
#define IFXEDSADC_PINMAP_NUM_CHANNELS
Definition: IfxEdsadc_PinMap.h:276
IfxEdsadc_DS4NB_P00_9_IN
IfxEdsadc_Dsn_In IfxEdsadc_DS4NB_P00_9_IN
Definition: IfxEdsadc_PinMap.c:113
IfxEdsadc_DS1PD_AN46_IN
IfxEdsadc_Dsp_In IfxEdsadc_DS1PD_AN46_IN
Definition: IfxEdsadc_PinMap.c:128
IfxEdsadc_ChannelId_6
Specifies the channel Index 6.
Definition: IfxEdsadc_cfg.h:78
IfxEdsadc_DS1PA_P40_6_IN
IfxEdsadc_Dsp_In IfxEdsadc_DS1PA_P40_6_IN
Definition: IfxEdsadc_PinMap.c:125
IfxEdsadc_Dsdin_In
DIN pin mapping structure.
Definition: IfxEdsadc_PinMap.h:101
IfxEdsadc_Dscin_In
DIN pin mapping structure.
Definition: IfxEdsadc_PinMap.h:92
IfxEdsadc_Dsdin_In_pinTable
const IfxEdsadc_Dsdin_In * IfxEdsadc_Dsdin_In_pinTable[IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_DSDIN_IN_NUM_ITEMS]
Definition: IfxEdsadc_PinMap.c:269
IfxEdsadc_DS5NB_P00_3_IN
IfxEdsadc_Dsn_In IfxEdsadc_DS5NB_P00_3_IN
Definition: IfxEdsadc_PinMap.c:115
IfxEdsadc_DSCIN5A_P00_1_IN
IfxEdsadc_Dscin_In IfxEdsadc_DSCIN5A_P00_1_IN
Definition: IfxEdsadc_PinMap.c:61
IfxEdsadc_DSDIN2B_P33_2_IN
IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN2B_P33_2_IN
Definition: IfxEdsadc_PinMap.c:90
IfxEdsadc_ITR0F_P33_4_IN
IfxEdsadc_Itr_In IfxEdsadc_ITR0F_P33_4_IN
Definition: IfxEdsadc_PinMap.c:145
IfxEdsadc_DSCIN8A_P01_5_IN
IfxEdsadc_Dscin_In IfxEdsadc_DSCIN8A_P01_5_IN
Definition: IfxEdsadc_PinMap.c:66
IfxEdsadc_DSCOUT0_P00_11_OUT
IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT0_P00_11_OUT
Definition: IfxEdsadc_PinMap.c:68
IfxEdsadc_DSCIN3B_P02_7_IN
IfxEdsadc_Dscin_In IfxEdsadc_DSCIN3B_P02_7_IN
Definition: IfxEdsadc_PinMap.c:58
IfxEdsadc_DSCOUT1_P33_3_OUT
IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT1_P33_3_OUT
Definition: IfxEdsadc_PinMap.c:71
IfxEdsadc_DSCIN0B_P33_5_IN
IfxEdsadc_Dscin_In IfxEdsadc_DSCIN0B_P33_5_IN
Definition: IfxEdsadc_PinMap.c:52
IfxEdsadc_DS9NA_AN51_IN
IfxEdsadc_Dsn_In IfxEdsadc_DS9NA_AN51_IN
Definition: IfxEdsadc_PinMap.c:121
IfxEdsadc_DS0PB_AN12_IN
IfxEdsadc_Dsp_In IfxEdsadc_DS0PB_AN12_IN
Definition: IfxEdsadc_PinMap.c:124
IfxEdsadc_DSDIN4A_P00_8_IN
IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN4A_P00_8_IN
Definition: IfxEdsadc_PinMap.c:93
IfxEdsadc_DSDIN8A_P01_6_IN
IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN8A_P01_6_IN
Definition: IfxEdsadc_PinMap.c:100
Ifx_RxSel_c
Definition: Ifx_Types.h:131
IfxEdsadc_DS0PA_AN2_IN
IfxEdsadc_Dsp_In IfxEdsadc_DS0PA_AN2_IN
Definition: IfxEdsadc_PinMap.c:123
IfxEdsadc_DSCIN2A_P00_5_IN
IfxEdsadc_Dscin_In IfxEdsadc_DSCIN2A_P00_5_IN
Definition: IfxEdsadc_PinMap.c:55
IFXEDSADC_PINMAP_DSDIN_IN_NUM_ITEMS
#define IFXEDSADC_PINMAP_DSDIN_IN_NUM_ITEMS
Definition: IfxEdsadc_PinMap.h:280
IfxEdsadc_DS7NA_AN61_IN
IfxEdsadc_Dsn_In IfxEdsadc_DS7NA_AN61_IN
Definition: IfxEdsadc_PinMap.c:118
IfxEdsadc_DS4NA_P00_7_IN
IfxEdsadc_Dsn_In IfxEdsadc_DS4NA_P00_7_IN
Definition: IfxEdsadc_PinMap.c:112
IfxEdsadc_Sg_In
SG pin mapping structure.
Definition: IfxEdsadc_PinMap.h:127
IfxEdsadc_DSCOUT9_P01_9_OUT
IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT9_P01_9_OUT
Definition: IfxEdsadc_PinMap.c:84
IfxEdsadc_PinMap.h
EDSADC I/O map.
IFXEDSADC_PINMAP_SG_IN_NUM_ITEMS
#define IFXEDSADC_PINMAP_SG_IN_NUM_ITEMS
Definition: IfxEdsadc_PinMap.h:284
IfxEdsadc_DSCOUT7_P00_1_OUT
IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT7_P00_1_OUT
Definition: IfxEdsadc_PinMap.c:81
IfxEdsadc_ITR3F_P00_9_IN
IfxEdsadc_Itr_In IfxEdsadc_ITR3F_P00_9_IN
Definition: IfxEdsadc_PinMap.c:151
IfxEdsadc_DSDIN1A_P00_10_IN
IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN1A_P00_10_IN
Definition: IfxEdsadc_PinMap.c:87
IfxEdsadc_DSCOUT4_P02_5_OUT
IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT4_P02_5_OUT
Definition: IfxEdsadc_PinMap.c:77
IfxEdsadc_DSCIN0A_P00_11_IN
IfxEdsadc_Dscin_In IfxEdsadc_DSCIN0A_P00_11_IN
Definition: IfxEdsadc_PinMap.c:51
IfxEdsadc_DS1NA_P40_7_IN
IfxEdsadc_Dsn_In IfxEdsadc_DS1NA_P40_7_IN
Definition: IfxEdsadc_PinMap.c:104
IfxEdsadc_ITR5E_P02_6_IN
IfxEdsadc_Itr_In IfxEdsadc_ITR5E_P02_6_IN
Definition: IfxEdsadc_PinMap.c:154
IfxEdsadc_DSCIN3A_P00_3_IN
IfxEdsadc_Dscin_In IfxEdsadc_DSCIN3A_P00_3_IN
Definition: IfxEdsadc_PinMap.c:57
IfxEdsadc_DS1ND_AN47_IN
IfxEdsadc_Dsn_In IfxEdsadc_DS1ND_AN47_IN
Definition: IfxEdsadc_PinMap.c:107
IfxPort_OutputIdx_alt4
Definition: IfxPort.h:132
IfxEdsadc_CGPWMP_P33_12_OUT
IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMP_P33_12_OUT
Definition: IfxEdsadc_PinMap.c:50
IfxEdsadc_ITR7F_P01_3_IN
IfxEdsadc_Itr_In IfxEdsadc_ITR7F_P01_3_IN
Definition: IfxEdsadc_PinMap.c:159
IfxEdsadc_Dsn_In
DS negative pin mapping structure.
Definition: IfxEdsadc_PinMap.h:56
IfxEdsadc_DSCOUT1_P00_9_OUT
IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT1_P00_9_OUT
Definition: IfxEdsadc_PinMap.c:70
IfxEdsadc_Dscout_Out_pinTable
const IfxEdsadc_Dscout_Out * IfxEdsadc_Dscout_Out_pinTable[IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_DSCOUT_OUT_NUM_ITEMS]
Definition: IfxEdsadc_PinMap.c:224
IfxEdsadc_DSDIN5A_P00_2_IN
IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN5A_P00_2_IN
Definition: IfxEdsadc_PinMap.c:95
IfxEdsadc_DSCOUT2_P33_1_OUT
IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT2_P33_1_OUT
Definition: IfxEdsadc_PinMap.c:73
IfxEdsadc_DSCIN1B_P33_3_IN
IfxEdsadc_Dscin_In IfxEdsadc_DSCIN1B_P33_3_IN
Definition: IfxEdsadc_PinMap.c:54
IfxEdsadc_DSCOUT3_P02_7_OUT
IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT3_P02_7_OUT
Definition: IfxEdsadc_PinMap.c:75
IfxEdsadc_ITR4F_P00_6_IN
IfxEdsadc_Itr_In IfxEdsadc_ITR4F_P00_6_IN
Definition: IfxEdsadc_PinMap.c:153
Ifx_RxSel_f
Definition: Ifx_Types.h:134
IfxEdsadc_Dsp_In_pinTable
const IfxEdsadc_Dsp_In * IfxEdsadc_Dsp_In_pinTable[IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_DSP_IN_NUM_ITEMS]
Definition: IfxEdsadc_PinMap.c:379
IfxEdsadc_ChannelId_5
Specifies the channel Index 5.
Definition: IfxEdsadc_cfg.h:77
IfxEdsadc_Dscout_Out
COUT pin mapping structure.
Definition: IfxEdsadc_PinMap.h:135
IfxEdsadc_DS2NA_AN21_IN
IfxEdsadc_Dsn_In IfxEdsadc_DS2NA_AN21_IN
Definition: IfxEdsadc_PinMap.c:108
IfxEdsadc_CGPWMN_P00_5_OUT
IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMN_P00_5_OUT
Definition: IfxEdsadc_PinMap.c:45
IfxEdsadc_DS0NB_AN13_IN
IfxEdsadc_Dsn_In IfxEdsadc_DS0NB_AN13_IN
Definition: IfxEdsadc_PinMap.c:103
IfxEdsadc_DS1NC_AN45_IN
IfxEdsadc_Dsn_In IfxEdsadc_DS1NC_AN45_IN
Definition: IfxEdsadc_PinMap.c:106
IfxEdsadc_ITR2F_P33_6_IN
IfxEdsadc_Itr_In IfxEdsadc_ITR2F_P33_6_IN
Definition: IfxEdsadc_PinMap.c:149
IfxEdsadc_ITR6F_P00_15_IN
IfxEdsadc_Itr_In IfxEdsadc_ITR6F_P00_15_IN
Definition: IfxEdsadc_PinMap.c:157
IfxEdsadc_DS4PB_P00_10_IN
IfxEdsadc_Dsp_In IfxEdsadc_DS4PB_P00_10_IN
Definition: IfxEdsadc_PinMap.c:134
IfxEdsadc_ChannelId_0
Specifies the channel Index 0.
Definition: IfxEdsadc_cfg.h:72
IfxEdsadc_DS4PA_P00_8_IN
IfxEdsadc_Dsp_In IfxEdsadc_DS4PA_P00_8_IN
Definition: IfxEdsadc_PinMap.c:133
IfxEdsadc_DSCOUT2_P00_5_OUT
IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT2_P00_5_OUT
Definition: IfxEdsadc_PinMap.c:72
IFXEDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS
#define IFXEDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS
Definition: IfxEdsadc_PinMap.h:277
IfxEdsadc_DSCIN6A_P00_14_IN
IfxEdsadc_Dscin_In IfxEdsadc_DSCIN6A_P00_14_IN
Definition: IfxEdsadc_PinMap.c:63
IfxEdsadc_DSDIN2A_P00_6_IN
IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN2A_P00_6_IN
Definition: IfxEdsadc_PinMap.c:89
IfxEdsadc_DS8PA_P41_0_IN
IfxEdsadc_Dsp_In IfxEdsadc_DS8PA_P41_0_IN
Definition: IfxEdsadc_PinMap.c:141
IfxEdsadc_DSCIN2B_P33_1_IN
IfxEdsadc_Dscin_In IfxEdsadc_DSCIN2B_P33_1_IN
Definition: IfxEdsadc_PinMap.c:56
IfxEdsadc_DSDIN3B_P02_8_IN
IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN3B_P02_8_IN
Definition: IfxEdsadc_PinMap.c:92
IfxEdsadc_Dsp_In
DS positive pin mapping structure.
Definition: IfxEdsadc_PinMap.h:65
IfxEdsadc_ChannelId_1
Specifies the channel Index 1.
Definition: IfxEdsadc_cfg.h:73
IfxEdsadc_DS2PA_AN20_IN
IfxEdsadc_Dsp_In IfxEdsadc_DS2PA_AN20_IN
Definition: IfxEdsadc_PinMap.c:129
IfxEdsadc_DS9PA_AN50_IN
IfxEdsadc_Dsp_In IfxEdsadc_DS9PA_AN50_IN
Definition: IfxEdsadc_PinMap.c:142
IfxEdsadc_DSCIN4A_P00_7_IN
IfxEdsadc_Dscin_In IfxEdsadc_DSCIN4A_P00_7_IN
Definition: IfxEdsadc_PinMap.c:59
IfxEdsadc_DSDIN7A_P01_15_IN
IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN7A_P01_15_IN
Definition: IfxEdsadc_PinMap.c:98
IfxEdsadc_DS3NA_AN1_IN
IfxEdsadc_Dsn_In IfxEdsadc_DS3NA_AN1_IN
Definition: IfxEdsadc_PinMap.c:110
IfxEdsadc_DS1PC_AN44_IN
IfxEdsadc_Dsp_In IfxEdsadc_DS1PC_AN44_IN
Definition: IfxEdsadc_PinMap.c:127
IFXEDSADC_PINMAP_NUM_MODULES
#define IFXEDSADC_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxEdsadc_PinMap.h:275
IfxEdsadc_DS7PA_AN60_IN
IfxEdsadc_Dsp_In IfxEdsadc_DS7PA_AN60_IN
Definition: IfxEdsadc_PinMap.c:139
IFXEDSADC_PINMAP_DSCIN_IN_NUM_ITEMS
#define IFXEDSADC_PINMAP_DSCIN_IN_NUM_ITEMS
Definition: IfxEdsadc_PinMap.h:278
IfxEdsadc_DS3PB_AN14_IN
IfxEdsadc_Dsp_In IfxEdsadc_DS3PB_AN14_IN
Definition: IfxEdsadc_PinMap.c:132
IfxEdsadc_DS3PA_AN0_IN
IfxEdsadc_Dsp_In IfxEdsadc_DS3PA_AN0_IN
Definition: IfxEdsadc_PinMap.c:131
IfxEdsadc_DSDIN6A_P00_13_IN
IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN6A_P00_13_IN
Definition: IfxEdsadc_PinMap.c:97
IfxEdsadc_DSCIN7A_P01_2_IN
IfxEdsadc_Dscin_In IfxEdsadc_DSCIN7A_P01_2_IN
Definition: IfxEdsadc_PinMap.c:64
IfxEdsadc_DSDIN4B_P02_6_IN
IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN4B_P02_6_IN
Definition: IfxEdsadc_PinMap.c:94
IfxEdsadc_ITR1E_P33_1_IN
IfxEdsadc_Itr_In IfxEdsadc_ITR1E_P33_1_IN
Definition: IfxEdsadc_PinMap.c:146
IfxEdsadc_ChannelId_2
Specifies the channel Index 2.
Definition: IfxEdsadc_cfg.h:74
IfxEdsadc_Dscin_In_pinTable
const IfxEdsadc_Dscin_In * IfxEdsadc_Dscin_In_pinTable[IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_DSCIN_IN_NUM_ITEMS]
Definition: IfxEdsadc_PinMap.c:179
IfxEdsadc_DS6PA_AN52_IN
IfxEdsadc_Dsp_In IfxEdsadc_DS6PA_AN52_IN
Definition: IfxEdsadc_PinMap.c:137
IFXEDSADC_PINMAP_DSN_IN_NUM_ITEMS
#define IFXEDSADC_PINMAP_DSN_IN_NUM_ITEMS
Definition: IfxEdsadc_PinMap.h:281
IfxEdsadc_Itr_In
ITR pin mapping structure.
Definition: IfxEdsadc_PinMap.h:110
IfxPort_OutputIdx_alt5
Definition: IfxPort.h:133
IfxEdsadc_SGNA_P00_4_IN
IfxEdsadc_Sg_In IfxEdsadc_SGNA_P00_4_IN
Definition: IfxEdsadc_PinMap.c:164
IfxEdsadc_ITR8E_P01_1_IN
IfxEdsadc_Itr_In IfxEdsadc_ITR8E_P01_1_IN
Definition: IfxEdsadc_PinMap.c:160
IfxEdsadc_ITR3E_P02_8_IN
IfxEdsadc_Itr_In IfxEdsadc_ITR3E_P02_8_IN
Definition: IfxEdsadc_PinMap.c:150
IfxEdsadc_CGPWMN_P33_11_OUT
IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMN_P33_11_OUT
Definition: IfxEdsadc_PinMap.c:47
IfxEdsadc_CGPWMP_P02_1_OUT
IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMP_P02_1_OUT
Definition: IfxEdsadc_PinMap.c:49
IfxEdsadc_DS0NA_AN3_IN
IfxEdsadc_Dsn_In IfxEdsadc_DS0NA_AN3_IN
Definition: IfxEdsadc_PinMap.c:102
IfxEdsadc_DSCIN4B_P02_5_IN
IfxEdsadc_Dscin_In IfxEdsadc_DSCIN4B_P02_5_IN
Definition: IfxEdsadc_PinMap.c:60
IfxEdsadc_Cgpwm_Out_pinTable
const IfxEdsadc_Cgpwm_Out * IfxEdsadc_Cgpwm_Out_pinTable[IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS]
Definition: IfxEdsadc_PinMap.c:168
IfxEdsadc_DS5PA_P00_2_IN
IfxEdsadc_Dsp_In IfxEdsadc_DS5PA_P00_2_IN
Definition: IfxEdsadc_PinMap.c:135
IfxEdsadc_CGPWMP_P00_6_OUT
IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMP_P00_6_OUT
Definition: IfxEdsadc_PinMap.c:48
IfxEdsadc_Dsn_In_pinTable
const IfxEdsadc_Dsn_In * IfxEdsadc_Dsn_In_pinTable[IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_DSN_IN_NUM_ITEMS]
Definition: IfxEdsadc_PinMap.c:314
IfxEdsadc_DSCOUT6_P00_14_OUT
IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT6_P00_14_OUT
Definition: IfxEdsadc_PinMap.c:80
IfxEdsadc_DSDIN0A_P00_12_IN
IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN0A_P00_12_IN
Definition: IfxEdsadc_PinMap.c:85
IFXEDSADC_PINMAP_DSP_IN_NUM_ITEMS
#define IFXEDSADC_PINMAP_DSP_IN_NUM_ITEMS
Definition: IfxEdsadc_PinMap.h:282
IfxEdsadc_DS9PB_P41_2_IN
IfxEdsadc_Dsp_In IfxEdsadc_DS9PB_P41_2_IN
Definition: IfxEdsadc_PinMap.c:143


iLLD_TC38A: IfxEdsadc_PinMap.h Source File

  • _PinMap
IfxEdsadc_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxEdsadc_PinMap.h
3 * \brief EDSADC I/O map
4 * \ingroup IfxLld_Edsadc
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Edsadc_pinmap EDSADC Pin Mapping
42 * \ingroup IfxLld_Edsadc
43 */
44
45 #ifndef IFXEDSADC_PINMAP_H
46 #define IFXEDSADC_PINMAP_H
47
48 #include <IfxEdsadc_reg.h>
49 #include <_Impl/IfxEdsadc_cfg.h>
50 #include <Port/Std/IfxPort.h>
51
52 /** \addtogroup IfxLld_Edsadc_pinmap
53 * \{ */
54
55 /** \brief DS negative pin mapping structure */
56 typedef const struct
57 {
58 Ifx_EDSADC* module; /**< \brief Base address */
59 IfxEdsadc_ChannelId channel; /**< \brief Channel number */
60 IfxPort_Pin pin; /**< \brief Port pin */
61 Ifx_RxSel select; /**< \brief Input multiplexer value */
62 } IfxEdsadc_Dsn_In;
63
64 /** \brief DS positive pin mapping structure */
65 typedef const struct
66 {
67 Ifx_EDSADC* module; /**< \brief Base address */
68 IfxEdsadc_ChannelId channel; /**< \brief Channel number */
69 IfxPort_Pin pin; /**< \brief Port pin */
70 Ifx_RxSel select; /**< \brief Input multiplexer value */
71 } IfxEdsadc_Dsp_In;
72
73 /** \brief CIN pin mapping structure */
74 typedef const struct
75 {
76 Ifx_EDSADC* module; /**< \brief Base address */
77 IfxEdsadc_ChannelId channel; /**< \brief Channel number */
78 IfxPort_Pin pin; /**< \brief Port pin */
79 Ifx_RxSel select; /**< \brief Input multiplexer value */
80 } IfxEdsadc_Cin_In;
81
82 /** \brief DIN pin mapping structure */
83 typedef const struct
84 {
85 Ifx_EDSADC* module; /**< \brief Base address */
86 IfxEdsadc_ChannelId channel; /**< \brief Channel number */
87 IfxPort_Pin pin; /**< \brief Port pin */
88 Ifx_RxSel select; /**< \brief Input multiplexer value */
89 } IfxEdsadc_Din_In;
90
91 /** \brief DIN pin mapping structure */
92 typedef const struct
93 {
94 Ifx_EDSADC* module; /**< \brief Base address */
95 IfxEdsadc_ChannelId channel; /**< \brief Channel number */
96 IfxPort_Pin pin; /**< \brief Port pin */
97 Ifx_RxSel select; /**< \brief Input multiplexer value */
98 } IfxEdsadc_Dscin_In;
99
100 /** \brief DIN pin mapping structure */
101 typedef const struct
102 {
103 Ifx_EDSADC* module; /**< \brief Base address */
104 IfxEdsadc_ChannelId channel; /**< \brief Channel number */
105 IfxPort_Pin pin; /**< \brief Port pin */
106 Ifx_RxSel select; /**< \brief Input multiplexer value */
107 } IfxEdsadc_Dsdin_In;
108
109 /** \brief ITR pin mapping structure */
110 typedef const struct
111 {
112 Ifx_EDSADC* module; /**< \brief Base address */
113 IfxEdsadc_ChannelId channel; /**< \brief Channel number */
114 IfxPort_Pin pin; /**< \brief Port pin */
115 Ifx_RxSel select; /**< \brief Input multiplexer value */
116 } IfxEdsadc_Itr_In;
117
118 /** \brief CGPWM pin mapping structure */
119 typedef const struct
120 {
121 Ifx_EDSADC* module; /**< \brief Base address */
122 IfxPort_Pin pin; /**< \brief Port pin */
123 IfxPort_OutputIdx select; /**< \brief Port control code */
124 } IfxEdsadc_Cgpwm_Out;
125
126 /** \brief SG pin mapping structure */
127 typedef const struct
128 {
129 Ifx_EDSADC* module; /**< \brief Base address */
130 IfxPort_Pin pin; /**< \brief Port pin */
131 Ifx_RxSel select; /**< \brief Input multiplexer value */
132 } IfxEdsadc_Sg_In;
133
134 /** \brief COUT pin mapping structure */
135 typedef const struct
136 {
137 Ifx_EDSADC* module; /**< \brief Base address */
138 IfxEdsadc_ChannelId channel; /**< \brief Channel number */
139 IfxPort_Pin pin; /**< \brief Port pin */
140 IfxPort_OutputIdx select; /**< \brief Port control code */
141 } IfxEdsadc_Dscout_Out;
142
143 /** \brief COUT pin mapping structure */
144 typedef const struct
145 {
146 Ifx_EDSADC* module; /**< \brief Base address */
147 IfxEdsadc_ChannelId channel; /**< \brief Channel number */
148 IfxPort_Pin pin; /**< \brief Port pin */
149 IfxPort_OutputIdx select; /**< \brief Port control code */
150 } IfxEdsadc_Cout_Out;
151
152 IFX_EXTERN IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMN_P00_5_OUT; /**< \brief Negative carrier generator output */
153 IFX_EXTERN IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMN_P02_0_OUT; /**< \brief Negative carrier generator output */
154 IFX_EXTERN IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMN_P33_11_OUT; /**< \brief Negative carrier generator output */
155 IFX_EXTERN IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMP_P00_6_OUT; /**< \brief Positive carrier generator output */
156 IFX_EXTERN IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMP_P02_1_OUT; /**< \brief Positive carrier generator output */
157 IFX_EXTERN IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMP_P33_12_OUT; /**< \brief Positive carrier generator output */
158 IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN0A_P00_11_IN; /**< \brief Modulator clock input, channel 0 */
159 IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN0B_P33_5_IN; /**< \brief Modulator clock input, channel 0 */
160 IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN1A_P00_9_IN; /**< \brief Modulator clock input, channel 1 */
161 IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN1B_P33_3_IN; /**< \brief Modulator clock input, channel 1 */
162 IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN2A_P00_5_IN; /**< \brief Modulator clock input, channel 2 */
163 IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN2B_P33_1_IN; /**< \brief Modulator clock input, channel 2 */
164 IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN3A_P00_3_IN; /**< \brief Modulator clock input, channel 3 */
165 IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN3B_P02_7_IN; /**< \brief Modulator clock input, channel 3 */
166 IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN4A_P00_7_IN; /**< \brief Modulator clock input, channel 4 */
167 IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN4B_P02_5_IN; /**< \brief Modulator clock input, channel 4 */
168 IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN5A_P00_1_IN; /**< \brief Modulator clock input, channel 5 */
169 IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN5B_P02_3_IN; /**< \brief Modulator clock input, channel 5 */
170 IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN6A_P00_14_IN; /**< \brief Modulator clock input, channel 6 */
171 IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN7A_P01_2_IN; /**< \brief Modulator clock input, channel 7 */
172 IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN7B_P00_1_IN; /**< \brief Modulator clock input, channel 7 */
173 IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN8A_P01_5_IN; /**< \brief Modulator clock input, channel 8 */
174 IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN9A_P01_9_IN; /**< \brief Modulator clock input, channel 9 */
175 IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT0_P00_11_OUT; /**< \brief Modulator clock output */
176 IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT0_P33_5_OUT; /**< \brief Modulator clock output */
177 IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT1_P00_9_OUT; /**< \brief Modulator clock output */
178 IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT1_P33_3_OUT; /**< \brief Modulator clock output */
179 IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT2_P00_5_OUT; /**< \brief Modulator clock output */
180 IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT2_P33_1_OUT; /**< \brief Modulator clock output */
181 IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT3_P00_3_OUT; /**< \brief Modulator clock output */
182 IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT3_P02_7_OUT; /**< \brief Modulator clock output */
183 IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT4_P00_7_OUT; /**< \brief Modulator clock output */
184 IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT4_P02_5_OUT; /**< \brief Modulator clock output */
185 IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT5_P00_1_OUT; /**< \brief Modulator clock output */
186 IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT5_P02_3_OUT; /**< \brief Modulator clock output */
187 IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT6_P00_14_OUT; /**< \brief Modulator clock output */
188 IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT7_P00_1_OUT; /**< \brief Modulator clock output */
189 IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT7_P01_2_OUT; /**< \brief Modulator clock output */
190 IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT8_P01_5_OUT; /**< \brief Modulator clock output */
191 IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT9_P01_9_OUT; /**< \brief Modulator clock output */
192 IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN0A_P00_12_IN; /**< \brief Digital datastream input, channel 0 */
193 IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN0B_P33_6_IN; /**< \brief Digital datastream input, channel 0 */
194 IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN1A_P00_10_IN; /**< \brief Digital datastream input, channel 1 */
195 IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN1B_P33_4_IN; /**< \brief Digital datastream input, channel 1 */
196 IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN2A_P00_6_IN; /**< \brief Digital datastream input, channel 2 */
197 IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN2B_P33_2_IN; /**< \brief Digital datastream input, channel 2 */
198 IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN3A_P00_4_IN; /**< \brief Digital datastream input, channel 3 */
199 IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN3B_P02_8_IN; /**< \brief Digital datastream input, channel 3 */
200 IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN4A_P00_8_IN; /**< \brief Digital datastream input, channel 4 */
201 IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN4B_P02_6_IN; /**< \brief Digital datastream input, channel 4 */
202 IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN5A_P00_2_IN; /**< \brief Digital datastream input, channel 5 */
203 IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN5B_P02_4_IN; /**< \brief Digital datastream input, channel 5 */
204 IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN6A_P00_13_IN; /**< \brief Digital datastream input, channel 6 */
205 IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN7A_P01_15_IN; /**< \brief Digital datastream input, channel 7 */
206 IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN7B_P00_2_IN; /**< \brief Digital datastream input, channel 7 */
207 IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN8A_P01_6_IN; /**< \brief Digital datastream input, channel 8 */
208 IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN9A_P01_8_IN; /**< \brief Digital datastream input, channel 9 */
209 IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS0NA_AN3_IN; /**< \brief Negative analog input channel 0, pin A */
210 IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS0NB_AN13_IN; /**< \brief Negative analog input channel 0, pin B */
211 IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS1NA_P40_7_IN; /**< \brief Negative analog input channel 1, pin A */
212 IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS1NB_P40_9_IN; /**< \brief Negative analog input channel 1, pin B */
213 IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS1NC_AN45_IN; /**< \brief Negative analog input channel 1, pin C */
214 IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS1ND_AN47_IN; /**< \brief Negative analog input channel 1, pin D */
215 IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS2NA_AN21_IN; /**< \brief Negative analog input channel 2, pin A */
216 IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS2NB_P40_1_IN; /**< \brief Negative analog input channel 2, pin B */
217 IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS3NA_AN1_IN; /**< \brief Negative analog input channel 3, pin A */
218 IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS3NB_AN15_IN; /**< \brief Negative analog input channel 3, pin N */
219 IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS4NA_P00_7_IN; /**< \brief Negative analog input channel 4, pin A */
220 IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS4NB_P00_9_IN; /**< \brief Negative analog input channel 4, pin B */
221 IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS5NA_P00_1_IN; /**< \brief Negative analog input channel 5, pin A */
222 IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS5NB_P00_3_IN; /**< \brief Negative analog input channel 5, pin B */
223 IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS6NA_AN53_IN; /**< \brief Negative analog input channel 6, pin A */
224 IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS6NB_P41_5_IN; /**< \brief Negative analog input channel 6, pin B */
225 IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS7NA_AN61_IN; /**< \brief Negative analog input channel 7, pin A */
226 IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS7NB_P41_7_IN; /**< \brief Negative analog input channel 7, pin B */
227 IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS8NA_P41_1_IN; /**< \brief Negative analog input channel 8, pin A */
228 IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS9NA_AN51_IN; /**< \brief Negative analog input channel 9, pin A */
229 IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS9NB_P41_3_IN; /**< \brief Negative analog input channel 9, pin B */
230 IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS0PA_AN2_IN; /**< \brief Positive analog input channel 0, pin A */
231 IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS0PB_AN12_IN; /**< \brief Positive analog input channel 0, pin B */
232 IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS1PA_P40_6_IN; /**< \brief Positive analog input channel 1, pin A */
233 IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS1PB_P40_8_IN; /**< \brief Positive analog input channel 1, pin B */
234 IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS1PC_AN44_IN; /**< \brief Positive analog input channel 1, pin C */
235 IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS1PD_AN46_IN; /**< \brief Positive analog input channel 1, pin D */
236 IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS2PA_AN20_IN; /**< \brief Positive analog input channel 2, pin A */
237 IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS2PB_P40_0_IN; /**< \brief Positive analog input channel 2, pin B */
238 IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS3PA_AN0_IN; /**< \brief Positive analog input channel 3, pin A */
239 IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS3PB_AN14_IN; /**< \brief Positive analog input channel 3, pin B */
240 IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS4PA_P00_8_IN; /**< \brief Positive analog input channel 4, pin A */
241 IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS4PB_P00_10_IN; /**< \brief Positive analog input channel 4, pin B */
242 IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS5PA_P00_2_IN; /**< \brief Positive analog input channel 5, pin A */
243 IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS5PB_P00_4_IN; /**< \brief Positive analog input channel 5, pin B */
244 IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS6PA_AN52_IN; /**< \brief Positive analog input channel 6, pin A */
245 IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS6PB_P41_4_IN; /**< \brief Positive analog input channel 6, pin B */
246 IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS7PA_AN60_IN; /**< \brief Positive analog input channel 7, pin A */
247 IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS7PB_P41_6_IN; /**< \brief Positive analog input channel 7, pin B */
248 IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS8PA_P41_0_IN; /**< \brief Positive analog input channel 8, pin A */
249 IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS9PA_AN50_IN; /**< \brief Positive analog input channel 9, pin A */
250 IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS9PB_P41_2_IN; /**< \brief Positive analog input channel 9, pin B */
251 IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR0E_P33_0_IN; /**< \brief Trigger/Gate input, channel 0 */
252 IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR0F_P33_4_IN; /**< \brief Trigger/Gate input, channel 0 */
253 IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR1E_P33_1_IN; /**< \brief Trigger/Gate input, channel 1 */
254 IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR1F_P33_5_IN; /**< \brief Trigger/Gate input, channel 1 */
255 IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR2E_P33_2_IN; /**< \brief Trigger/Gate input, channel 2 */
256 IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR2F_P33_6_IN; /**< \brief Trigger/Gate input, channel 2 */
257 IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR3E_P02_8_IN; /**< \brief Trigger/Gate input, channel 3 */
258 IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR3F_P00_9_IN; /**< \brief Trigger/Gate input, channel 3 */
259 IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR4E_P02_7_IN; /**< \brief Trigger/Gate input, channel 4 */
260 IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR4F_P00_6_IN; /**< \brief Trigger/Gate input, channel 4 */
261 IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR5E_P02_6_IN; /**< \brief Trigger/Gate input, channel 5 */
262 IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR5F_P00_3_IN; /**< \brief Trigger/Gate input, channel 5 */
263 IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR6E_P01_0_IN; /**< \brief Trigger/Gate input, channel 6 */
264 IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR6F_P00_15_IN; /**< \brief Trigger/Gate input, channel 6 */
265 IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR7E_P01_4_IN; /**< \brief Trigger/Gate input, channel 7 */
266 IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR7F_P01_3_IN; /**< \brief Trigger/Gate input, channel 7 */
267 IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR8E_P01_1_IN; /**< \brief Trigger/Gate input, channel 8 */
268 IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR8F_P01_7_IN; /**< \brief Trigger/Gate input, channel 8 */
269 IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR9E_P01_11_IN; /**< \brief Trigger/Gate input, channel 9 */
270 IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR9F_P01_10_IN; /**< \brief Trigger/Gate input, channel 9 */
271 IFX_EXTERN IfxEdsadc_Sg_In IfxEdsadc_SGNA_P00_4_IN; /**< \brief Carrier sign signal input */
272 IFX_EXTERN IfxEdsadc_Sg_In IfxEdsadc_SGNB_P33_13_IN; /**< \brief Carrier sign signal input */
273
274 /** \brief Table dimensions */
275 #define IFXEDSADC_PINMAP_NUM_MODULES 1
276 #define IFXEDSADC_PINMAP_NUM_CHANNELS 10
277 #define IFXEDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS 6
278 #define IFXEDSADC_PINMAP_DSCIN_IN_NUM_ITEMS 2
279 #define IFXEDSADC_PINMAP_DSCOUT_OUT_NUM_ITEMS 2
280 #define IFXEDSADC_PINMAP_DSDIN_IN_NUM_ITEMS 2
281 #define IFXEDSADC_PINMAP_DSN_IN_NUM_ITEMS 4
282 #define IFXEDSADC_PINMAP_DSP_IN_NUM_ITEMS 4
283 #define IFXEDSADC_PINMAP_ITR_IN_NUM_ITEMS 6
284 #define IFXEDSADC_PINMAP_SG_IN_NUM_ITEMS 2
285
286
287 /** \brief IfxEdsadc_Cgpwm_Out table */
288 IFX_EXTERN const IfxEdsadc_Cgpwm_Out *IfxEdsadc_Cgpwm_Out_pinTable[IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS];
289
290 /** \brief IfxEdsadc_Dscin_In table */
291 IFX_EXTERN const IfxEdsadc_Dscin_In *IfxEdsadc_Dscin_In_pinTable[IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_DSCIN_IN_NUM_ITEMS];
292
293 /** \brief IfxEdsadc_Dscout_Out table */
294 IFX_EXTERN const IfxEdsadc_Dscout_Out *IfxEdsadc_Dscout_Out_pinTable[IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_DSCOUT_OUT_NUM_ITEMS];
295
296 /** \brief IfxEdsadc_Dsdin_In table */
297 IFX_EXTERN const IfxEdsadc_Dsdin_In *IfxEdsadc_Dsdin_In_pinTable[IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_DSDIN_IN_NUM_ITEMS];
298
299 /** \brief IfxEdsadc_Dsn_In table */
300 IFX_EXTERN const IfxEdsadc_Dsn_In *IfxEdsadc_Dsn_In_pinTable[IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_DSN_IN_NUM_ITEMS];
301
302 /** \brief IfxEdsadc_Dsp_In table */
303 IFX_EXTERN const IfxEdsadc_Dsp_In *IfxEdsadc_Dsp_In_pinTable[IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_DSP_IN_NUM_ITEMS];
304
305 /** \brief IfxEdsadc_Itr_In table */
306 IFX_EXTERN const IfxEdsadc_Itr_In *IfxEdsadc_Itr_In_pinTable[IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_ITR_IN_NUM_ITEMS];
307
308 /** \brief IfxEdsadc_Sg_In table */
309 IFX_EXTERN const IfxEdsadc_Sg_In *IfxEdsadc_Sg_In_pinTable[IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_SG_IN_NUM_ITEMS];
310
311 /** \} */
312
313 #endif /* IFXEDSADC_PINMAP_H */
IfxEdsadc_Dsp_In_pinTable
IFX_EXTERN const IfxEdsadc_Dsp_In * IfxEdsadc_Dsp_In_pinTable[IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_DSP_IN_NUM_ITEMS]
IfxEdsadc_Dsp_In table.
Definition: IfxEdsadc_PinMap.h:303
IfxEdsadc_DSDIN4A_P00_8_IN
IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN4A_P00_8_IN
Digital datastream input, channel 4.
Definition: IfxEdsadc_PinMap.h:200
IfxEdsadc_DS1NA_P40_7_IN
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS1NA_P40_7_IN
Negative analog input channel 1, pin A.
Definition: IfxEdsadc_PinMap.h:211
IfxEdsadc_Dsdin_In_pinTable
IFX_EXTERN const IfxEdsadc_Dsdin_In * IfxEdsadc_Dsdin_In_pinTable[IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_DSDIN_IN_NUM_ITEMS]
IfxEdsadc_Dsdin_In table.
Definition: IfxEdsadc_PinMap.h:297
IfxEdsadc_Cgpwm_Out_pinTable
IFX_EXTERN const IfxEdsadc_Cgpwm_Out * IfxEdsadc_Cgpwm_Out_pinTable[IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS]
IfxEdsadc_Cgpwm_Out table.
Definition: IfxEdsadc_PinMap.h:288
IfxEdsadc_SGNB_P33_13_IN
IFX_EXTERN IfxEdsadc_Sg_In IfxEdsadc_SGNB_P33_13_IN
Carrier sign signal input.
Definition: IfxEdsadc_PinMap.h:272
IfxEdsadc_DSCIN4A_P00_7_IN
IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN4A_P00_7_IN
Modulator clock input, channel 4.
Definition: IfxEdsadc_PinMap.h:166
IfxEdsadc_DSDIN5A_P00_2_IN
IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN5A_P00_2_IN
Digital datastream input, channel 5.
Definition: IfxEdsadc_PinMap.h:202
IfxEdsadc_CGPWMP_P00_6_OUT
IFX_EXTERN IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMP_P00_6_OUT
Positive carrier generator output.
Definition: IfxEdsadc_PinMap.h:155
IfxEdsadc_Cgpwm_Out
CGPWM pin mapping structure.
Definition: IfxEdsadc_PinMap.h:119
IfxEdsadc_DSDIN5B_P02_4_IN
IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN5B_P02_4_IN
Digital datastream input, channel 5.
Definition: IfxEdsadc_PinMap.h:203
IfxEdsadc_DSCIN7A_P01_2_IN
IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN7A_P01_2_IN
Modulator clock input, channel 7.
Definition: IfxEdsadc_PinMap.h:171
IfxEdsadc_DS7NA_AN61_IN
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS7NA_AN61_IN
Negative analog input channel 7, pin A.
Definition: IfxEdsadc_PinMap.h:225
IfxEdsadc_DSDIN0A_P00_12_IN
IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN0A_P00_12_IN
Digital datastream input, channel 0.
Definition: IfxEdsadc_PinMap.h:192
IfxEdsadc_DS1PC_AN44_IN
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS1PC_AN44_IN
Positive analog input channel 1, pin C.
Definition: IfxEdsadc_PinMap.h:234
IfxEdsadc_ITR3E_P02_8_IN
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR3E_P02_8_IN
Trigger/Gate input, channel 3.
Definition: IfxEdsadc_PinMap.h:257
IfxEdsadc_Din_In
DIN pin mapping structure.
Definition: IfxEdsadc_PinMap.h:83
IfxEdsadc_Cin_In
CIN pin mapping structure.
Definition: IfxEdsadc_PinMap.h:74
IfxEdsadc_DSCIN1B_P33_3_IN
IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN1B_P33_3_IN
Modulator clock input, channel 1.
Definition: IfxEdsadc_PinMap.h:161
IfxEdsadc_ITR7F_P01_3_IN
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR7F_P01_3_IN
Trigger/Gate input, channel 7.
Definition: IfxEdsadc_PinMap.h:266
IfxEdsadc_DS4NA_P00_7_IN
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS4NA_P00_7_IN
Negative analog input channel 4, pin A.
Definition: IfxEdsadc_PinMap.h:219
IfxEdsadc_DSCIN5B_P02_3_IN
IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN5B_P02_3_IN
Modulator clock input, channel 5.
Definition: IfxEdsadc_PinMap.h:169
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:126
IfxEdsadc_DS1NC_AN45_IN
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS1NC_AN45_IN
Negative analog input channel 1, pin C.
Definition: IfxEdsadc_PinMap.h:213
IfxEdsadc_DSDIN1B_P33_4_IN
IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN1B_P33_4_IN
Digital datastream input, channel 1.
Definition: IfxEdsadc_PinMap.h:195
IfxEdsadc_Cout_Out
COUT pin mapping structure.
Definition: IfxEdsadc_PinMap.h:144
IfxEdsadc_ITR6E_P01_0_IN
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR6E_P01_0_IN
Trigger/Gate input, channel 6.
Definition: IfxEdsadc_PinMap.h:263
IfxEdsadc_DSDIN0B_P33_6_IN
IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN0B_P33_6_IN
Digital datastream input, channel 0.
Definition: IfxEdsadc_PinMap.h:193
IfxEdsadc_DS2PB_P40_0_IN
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS2PB_P40_0_IN
Positive analog input channel 2, pin B.
Definition: IfxEdsadc_PinMap.h:237
IfxEdsadc_DS8PA_P41_0_IN
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS8PA_P41_0_IN
Positive analog input channel 8, pin A.
Definition: IfxEdsadc_PinMap.h:248
IfxEdsadc_SGNA_P00_4_IN
IFX_EXTERN IfxEdsadc_Sg_In IfxEdsadc_SGNA_P00_4_IN
Carrier sign signal input.
Definition: IfxEdsadc_PinMap.h:271
IfxEdsadc_DSCIN5A_P00_1_IN
IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN5A_P00_1_IN
Modulator clock input, channel 5.
Definition: IfxEdsadc_PinMap.h:168
IfxEdsadc_CGPWMP_P33_12_OUT
IFX_EXTERN IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMP_P33_12_OUT
Positive carrier generator output.
Definition: IfxEdsadc_PinMap.h:157
IfxEdsadc_DSDIN2A_P00_6_IN
IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN2A_P00_6_IN
Digital datastream input, channel 2.
Definition: IfxEdsadc_PinMap.h:196
IfxEdsadc_DSCIN2B_P33_1_IN
IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN2B_P33_1_IN
Modulator clock input, channel 2.
Definition: IfxEdsadc_PinMap.h:163
IfxEdsadc_DS3NB_AN15_IN
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS3NB_AN15_IN
Negative analog input channel 3, pin N.
Definition: IfxEdsadc_PinMap.h:218
IfxEdsadc_DSDIN7B_P00_2_IN
IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN7B_P00_2_IN
Digital datastream input, channel 7.
Definition: IfxEdsadc_PinMap.h:206
IfxEdsadc_DSCIN0B_P33_5_IN
IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN0B_P33_5_IN
Modulator clock input, channel 0.
Definition: IfxEdsadc_PinMap.h:159
IfxEdsadc_DSDIN7A_P01_15_IN
IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN7A_P01_15_IN
Digital datastream input, channel 7.
Definition: IfxEdsadc_PinMap.h:205
IfxEdsadc_DSCIN3A_P00_3_IN
IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN3A_P00_3_IN
Modulator clock input, channel 3.
Definition: IfxEdsadc_PinMap.h:164
IfxEdsadc_DS2NA_AN21_IN
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS2NA_AN21_IN
Negative analog input channel 2, pin A.
Definition: IfxEdsadc_PinMap.h:215
IfxEdsadc_ITR5E_P02_6_IN
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR5E_P02_6_IN
Trigger/Gate input, channel 5.
Definition: IfxEdsadc_PinMap.h:261
IfxEdsadc_ITR5F_P00_3_IN
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR5F_P00_3_IN
Trigger/Gate input, channel 5.
Definition: IfxEdsadc_PinMap.h:262
IfxEdsadc_DSCIN2A_P00_5_IN
IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN2A_P00_5_IN
Modulator clock input, channel 2.
Definition: IfxEdsadc_PinMap.h:162
IfxEdsadc_DS1NB_P40_9_IN
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS1NB_P40_9_IN
Negative analog input channel 1, pin B.
Definition: IfxEdsadc_PinMap.h:212
IfxEdsadc_DSCOUT2_P00_5_OUT
IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT2_P00_5_OUT
Modulator clock output.
Definition: IfxEdsadc_PinMap.h:179
IfxEdsadc_DS0NA_AN3_IN
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS0NA_AN3_IN
Negative analog input channel 0, pin A.
Definition: IfxEdsadc_PinMap.h:209
IfxEdsadc_Dsn_In::channel
IfxEdsadc_ChannelId channel
Channel number.
Definition: IfxEdsadc_PinMap.h:59
IfxEdsadc_DS3PB_AN14_IN
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS3PB_AN14_IN
Positive analog input channel 3, pin B.
Definition: IfxEdsadc_PinMap.h:239
IfxEdsadc_DS0PA_AN2_IN
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS0PA_AN2_IN
Positive analog input channel 0, pin A.
Definition: IfxEdsadc_PinMap.h:230
IfxEdsadc_Dsn_In_pinTable
IFX_EXTERN const IfxEdsadc_Dsn_In * IfxEdsadc_Dsn_In_pinTable[IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_DSN_IN_NUM_ITEMS]
IfxEdsadc_Dsn_In table.
Definition: IfxEdsadc_PinMap.h:300
IfxEdsadc_DSCIN3B_P02_7_IN
IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN3B_P02_7_IN
Modulator clock input, channel 3.
Definition: IfxEdsadc_PinMap.h:165
IfxEdsadc_DS6NB_P41_5_IN
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS6NB_P41_5_IN
Negative analog input channel 6, pin B.
Definition: IfxEdsadc_PinMap.h:224
IfxEdsadc_DSCIN9A_P01_9_IN
IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN9A_P01_9_IN
Modulator clock input, channel 9.
Definition: IfxEdsadc_PinMap.h:174
IFXEDSADC_PINMAP_DSCOUT_OUT_NUM_ITEMS
#define IFXEDSADC_PINMAP_DSCOUT_OUT_NUM_ITEMS
Definition: IfxEdsadc_PinMap.h:279
IfxEdsadc_ITR4E_P02_7_IN
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR4E_P02_7_IN
Trigger/Gate input, channel 4.
Definition: IfxEdsadc_PinMap.h:259
IfxEdsadc_DS4PA_P00_8_IN
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS4PA_P00_8_IN
Positive analog input channel 4, pin A.
Definition: IfxEdsadc_PinMap.h:240
IfxEdsadc_DS3NA_AN1_IN
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS3NA_AN1_IN
Negative analog input channel 3, pin A.
Definition: IfxEdsadc_PinMap.h:217
IfxEdsadc_DSDIN4B_P02_6_IN
IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN4B_P02_6_IN
Digital datastream input, channel 4.
Definition: IfxEdsadc_PinMap.h:201
IFXEDSADC_PINMAP_ITR_IN_NUM_ITEMS
#define IFXEDSADC_PINMAP_ITR_IN_NUM_ITEMS
Definition: IfxEdsadc_PinMap.h:283
IfxEdsadc_DSCOUT3_P02_7_OUT
IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT3_P02_7_OUT
Modulator clock output.
Definition: IfxEdsadc_PinMap.h:182
IfxEdsadc_ITR9F_P01_10_IN
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR9F_P01_10_IN
Trigger/Gate input, channel 9.
Definition: IfxEdsadc_PinMap.h:270
IfxEdsadc_Dsn_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxEdsadc_PinMap.h:61
IfxEdsadc_ChannelId
IfxEdsadc_ChannelId
Specifies the channel Index.
Definition: IfxEdsadc_cfg.h:70
IFXEDSADC_PINMAP_NUM_CHANNELS
#define IFXEDSADC_PINMAP_NUM_CHANNELS
Definition: IfxEdsadc_PinMap.h:276
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxEdsadc_DS6NA_AN53_IN
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS6NA_AN53_IN
Negative analog input channel 6, pin A.
Definition: IfxEdsadc_PinMap.h:223
IfxEdsadc_Dsdin_In
DIN pin mapping structure.
Definition: IfxEdsadc_PinMap.h:101
IfxEdsadc_Dscin_In
DIN pin mapping structure.
Definition: IfxEdsadc_PinMap.h:92
IfxEdsadc_DS9NB_P41_3_IN
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS9NB_P41_3_IN
Negative analog input channel 9, pin B.
Definition: IfxEdsadc_PinMap.h:229
IfxEdsadc_ITR6F_P00_15_IN
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR6F_P00_15_IN
Trigger/Gate input, channel 6.
Definition: IfxEdsadc_PinMap.h:264
IfxEdsadc_DS7PA_AN60_IN
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS7PA_AN60_IN
Positive analog input channel 7, pin A.
Definition: IfxEdsadc_PinMap.h:246
IfxEdsadc_Dscin_In_pinTable
IFX_EXTERN const IfxEdsadc_Dscin_In * IfxEdsadc_Dscin_In_pinTable[IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_DSCIN_IN_NUM_ITEMS]
IfxEdsadc_Dscin_In table.
Definition: IfxEdsadc_PinMap.h:291
IfxEdsadc_DSDIN6A_P00_13_IN
IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN6A_P00_13_IN
Digital datastream input, channel 6.
Definition: IfxEdsadc_PinMap.h:204
IfxEdsadc_DSDIN3B_P02_8_IN
IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN3B_P02_8_IN
Digital datastream input, channel 3.
Definition: IfxEdsadc_PinMap.h:199
IfxEdsadc_DS2NB_P40_1_IN
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS2NB_P40_1_IN
Negative analog input channel 2, pin B.
Definition: IfxEdsadc_PinMap.h:216
IfxEdsadc_DS5PA_P00_2_IN
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS5PA_P00_2_IN
Positive analog input channel 5, pin A.
Definition: IfxEdsadc_PinMap.h:242
IfxEdsadc_ITR8E_P01_1_IN
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR8E_P01_1_IN
Trigger/Gate input, channel 8.
Definition: IfxEdsadc_PinMap.h:267
IfxEdsadc_ITR0E_P33_0_IN
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR0E_P33_0_IN
Trigger/Gate input, channel 0.
Definition: IfxEdsadc_PinMap.h:251
IfxEdsadc_DSCOUT9_P01_9_OUT
IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT9_P01_9_OUT
Modulator clock output.
Definition: IfxEdsadc_PinMap.h:191
IfxEdsadc_DS1PD_AN46_IN
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS1PD_AN46_IN
Positive analog input channel 1, pin D.
Definition: IfxEdsadc_PinMap.h:235
IfxEdsadc_DS3PA_AN0_IN
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS3PA_AN0_IN
Positive analog input channel 3, pin A.
Definition: IfxEdsadc_PinMap.h:238
IfxEdsadc_DS7NB_P41_7_IN
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS7NB_P41_7_IN
Negative analog input channel 7, pin B.
Definition: IfxEdsadc_PinMap.h:226
IfxEdsadc_DSCIN7B_P00_1_IN
IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN7B_P00_1_IN
Modulator clock input, channel 7.
Definition: IfxEdsadc_PinMap.h:172
IfxEdsadc_DSDIN2B_P33_2_IN
IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN2B_P33_2_IN
Digital datastream input, channel 2.
Definition: IfxEdsadc_PinMap.h:197
IFXEDSADC_PINMAP_DSDIN_IN_NUM_ITEMS
#define IFXEDSADC_PINMAP_DSDIN_IN_NUM_ITEMS
Definition: IfxEdsadc_PinMap.h:280
IfxEdsadc_DSCOUT5_P00_1_OUT
IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT5_P00_1_OUT
Modulator clock output.
Definition: IfxEdsadc_PinMap.h:185
IfxEdsadc_DSCIN8A_P01_5_IN
IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN8A_P01_5_IN
Modulator clock input, channel 8.
Definition: IfxEdsadc_PinMap.h:173
IfxEdsadc_Itr_In_pinTable
IFX_EXTERN const IfxEdsadc_Itr_In * IfxEdsadc_Itr_In_pinTable[IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_ITR_IN_NUM_ITEMS]
IfxEdsadc_Itr_In table.
Definition: IfxEdsadc_PinMap.h:306
IfxEdsadc_Sg_In
SG pin mapping structure.
Definition: IfxEdsadc_PinMap.h:127
IfxEdsadc_DSCOUT1_P33_3_OUT
IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT1_P33_3_OUT
Modulator clock output.
Definition: IfxEdsadc_PinMap.h:178
IFXEDSADC_PINMAP_SG_IN_NUM_ITEMS
#define IFXEDSADC_PINMAP_SG_IN_NUM_ITEMS
Definition: IfxEdsadc_PinMap.h:284
IfxEdsadc_DS4NB_P00_9_IN
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS4NB_P00_9_IN
Negative analog input channel 4, pin B.
Definition: IfxEdsadc_PinMap.h:220
IfxEdsadc_DSCOUT8_P01_5_OUT
IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT8_P01_5_OUT
Modulator clock output.
Definition: IfxEdsadc_PinMap.h:190
IfxEdsadc_DS1ND_AN47_IN
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS1ND_AN47_IN
Negative analog input channel 1, pin D.
Definition: IfxEdsadc_PinMap.h:214
IfxEdsadc_Dscout_Out_pinTable
IFX_EXTERN const IfxEdsadc_Dscout_Out * IfxEdsadc_Dscout_Out_pinTable[IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_NUM_CHANNELS][IFXEDSADC_PINMAP_DSCOUT_OUT_NUM_ITEMS]
IfxEdsadc_Dscout_Out table.
Definition: IfxEdsadc_PinMap.h:294
IfxEdsadc_Cgpwm_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxEdsadc_PinMap.h:123
IfxEdsadc_DSCOUT0_P00_11_OUT
IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT0_P00_11_OUT
Modulator clock output.
Definition: IfxEdsadc_PinMap.h:175
IfxEdsadc_DS9NA_AN51_IN
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS9NA_AN51_IN
Negative analog input channel 9, pin A.
Definition: IfxEdsadc_PinMap.h:228
IfxEdsadc_Dsn_In
DS negative pin mapping structure.
Definition: IfxEdsadc_PinMap.h:56
IfxEdsadc_DSCIN6A_P00_14_IN
IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN6A_P00_14_IN
Modulator clock input, channel 6.
Definition: IfxEdsadc_PinMap.h:170
IfxEdsadc_ITR9E_P01_11_IN
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR9E_P01_11_IN
Trigger/Gate input, channel 9.
Definition: IfxEdsadc_PinMap.h:269
IfxEdsadc_ITR1E_P33_1_IN
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR1E_P33_1_IN
Trigger/Gate input, channel 1.
Definition: IfxEdsadc_PinMap.h:253
IfxEdsadc_ITR1F_P33_5_IN
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR1F_P33_5_IN
Trigger/Gate input, channel 1.
Definition: IfxEdsadc_PinMap.h:254
IfxEdsadc_DS1PB_P40_8_IN
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS1PB_P40_8_IN
Positive analog input channel 1, pin B.
Definition: IfxEdsadc_PinMap.h:233
IfxEdsadc_DS5PB_P00_4_IN
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS5PB_P00_4_IN
Positive analog input channel 5, pin B.
Definition: IfxEdsadc_PinMap.h:243
IfxEdsadc_ITR2F_P33_6_IN
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR2F_P33_6_IN
Trigger/Gate input, channel 2.
Definition: IfxEdsadc_PinMap.h:256
IfxEdsadc_ITR0F_P33_4_IN
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR0F_P33_4_IN
Trigger/Gate input, channel 0.
Definition: IfxEdsadc_PinMap.h:252
IfxEdsadc_DSCOUT7_P00_1_OUT
IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT7_P00_1_OUT
Modulator clock output.
Definition: IfxEdsadc_PinMap.h:188
IfxEdsadc_DS0PB_AN12_IN
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS0PB_AN12_IN
Positive analog input channel 0, pin B.
Definition: IfxEdsadc_PinMap.h:231
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:246
IfxEdsadc_DSCOUT1_P00_9_OUT
IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT1_P00_9_OUT
Modulator clock output.
Definition: IfxEdsadc_PinMap.h:177
IfxEdsadc_DSCOUT3_P00_3_OUT
IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT3_P00_3_OUT
Modulator clock output.
Definition: IfxEdsadc_PinMap.h:181
IfxEdsadc_Dsn_In::module
Ifx_EDSADC * module
Base address.
Definition: IfxEdsadc_PinMap.h:58
IfxEdsadc_DSDIN1A_P00_10_IN
IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN1A_P00_10_IN
Digital datastream input, channel 1.
Definition: IfxEdsadc_PinMap.h:194
IfxEdsadc_Dscout_Out
COUT pin mapping structure.
Definition: IfxEdsadc_PinMap.h:135
IfxEdsadc_DSCIN4B_P02_5_IN
IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN4B_P02_5_IN
Modulator clock input, channel 4.
Definition: IfxEdsadc_PinMap.h:167
Ifx_RxSel
Ifx_RxSel
input multiplexer definition used in PinMaps
Definition: Ifx_Types.h:127
IfxEdsadc_DS9PA_AN50_IN
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS9PA_AN50_IN
Positive analog input channel 9, pin A.
Definition: IfxEdsadc_PinMap.h:249
IfxEdsadc_DS9PB_P41_2_IN
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS9PB_P41_2_IN
Positive analog input channel 9, pin B.
Definition: IfxEdsadc_PinMap.h:250
IfxEdsadc_DS0NB_AN13_IN
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS0NB_AN13_IN
Negative analog input channel 0, pin B.
Definition: IfxEdsadc_PinMap.h:210
IfxEdsadc_DS5NA_P00_1_IN
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS5NA_P00_1_IN
Negative analog input channel 5, pin A.
Definition: IfxEdsadc_PinMap.h:221
IfxEdsadc_CGPWMN_P00_5_OUT
IFX_EXTERN IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMN_P00_5_OUT
Negative carrier generator output.
Definition: IfxEdsadc_PinMap.h:152
IfxEdsadc_DSDIN8A_P01_6_IN
IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN8A_P01_6_IN
Digital datastream input, channel 8.
Definition: IfxEdsadc_PinMap.h:207
IFXEDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS
#define IFXEDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS
Definition: IfxEdsadc_PinMap.h:277
IfxEdsadc_ITR8F_P01_7_IN
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR8F_P01_7_IN
Trigger/Gate input, channel 8.
Definition: IfxEdsadc_PinMap.h:268
IfxEdsadc_DSCIN0A_P00_11_IN
IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN0A_P00_11_IN
Modulator clock input, channel 0.
Definition: IfxEdsadc_PinMap.h:158
IfxEdsadc_DS7PB_P41_6_IN
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS7PB_P41_6_IN
Positive analog input channel 7, pin B.
Definition: IfxEdsadc_PinMap.h:247
IfxEdsadc_ITR3F_P00_9_IN
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR3F_P00_9_IN
Trigger/Gate input, channel 3.
Definition: IfxEdsadc_PinMap.h:258
IfxEdsadc_Dsp_In
DS positive pin mapping structure.
Definition: IfxEdsadc_PinMap.h:65
IfxEdsadc_Sg_In_pinTable
IFX_EXTERN const IfxEdsadc_Sg_In * IfxEdsadc_Sg_In_pinTable[IFXEDSADC_PINMAP_NUM_MODULES][IFXEDSADC_PINMAP_SG_IN_NUM_ITEMS]
IfxEdsadc_Sg_In table.
Definition: IfxEdsadc_PinMap.h:309
IfxEdsadc_Dsn_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxEdsadc_PinMap.h:60
IfxEdsadc_DSDIN9A_P01_8_IN
IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN9A_P01_8_IN
Digital datastream input, channel 9.
Definition: IfxEdsadc_PinMap.h:208
IfxEdsadc_DS6PB_P41_4_IN
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS6PB_P41_4_IN
Positive analog input channel 6, pin B.
Definition: IfxEdsadc_PinMap.h:245
IfxEdsadc_DSCOUT5_P02_3_OUT
IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT5_P02_3_OUT
Modulator clock output.
Definition: IfxEdsadc_PinMap.h:186
IFXEDSADC_PINMAP_NUM_MODULES
#define IFXEDSADC_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxEdsadc_PinMap.h:275
IfxEdsadc_ITR7E_P01_4_IN
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR7E_P01_4_IN
Trigger/Gate input, channel 7.
Definition: IfxEdsadc_PinMap.h:265
IfxEdsadc_DS6PA_AN52_IN
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS6PA_AN52_IN
Positive analog input channel 6, pin A.
Definition: IfxEdsadc_PinMap.h:244
IFXEDSADC_PINMAP_DSCIN_IN_NUM_ITEMS
#define IFXEDSADC_PINMAP_DSCIN_IN_NUM_ITEMS
Definition: IfxEdsadc_PinMap.h:278
IfxEdsadc_DSCOUT0_P33_5_OUT
IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT0_P33_5_OUT
Modulator clock output.
Definition: IfxEdsadc_PinMap.h:176
IfxEdsadc_DSCOUT6_P00_14_OUT
IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT6_P00_14_OUT
Modulator clock output.
Definition: IfxEdsadc_PinMap.h:187
IfxEdsadc_DSCOUT2_P33_1_OUT
IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT2_P33_1_OUT
Modulator clock output.
Definition: IfxEdsadc_PinMap.h:180
IfxEdsadc_DS4PB_P00_10_IN
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS4PB_P00_10_IN
Positive analog input channel 4, pin B.
Definition: IfxEdsadc_PinMap.h:241
IFXEDSADC_PINMAP_DSN_IN_NUM_ITEMS
#define IFXEDSADC_PINMAP_DSN_IN_NUM_ITEMS
Definition: IfxEdsadc_PinMap.h:281
IfxEdsadc_ITR2E_P33_2_IN
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR2E_P33_2_IN
Trigger/Gate input, channel 2.
Definition: IfxEdsadc_PinMap.h:255
IfxEdsadc_DS1PA_P40_6_IN
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS1PA_P40_6_IN
Positive analog input channel 1, pin A.
Definition: IfxEdsadc_PinMap.h:232
IfxEdsadc_Itr_In
ITR pin mapping structure.
Definition: IfxEdsadc_PinMap.h:110
IfxEdsadc_DSDIN3A_P00_4_IN
IFX_EXTERN IfxEdsadc_Dsdin_In IfxEdsadc_DSDIN3A_P00_4_IN
Digital datastream input, channel 3.
Definition: IfxEdsadc_PinMap.h:198
IfxEdsadc_DS8NA_P41_1_IN
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS8NA_P41_1_IN
Negative analog input channel 8, pin A.
Definition: IfxEdsadc_PinMap.h:227
IfxEdsadc_CGPWMN_P33_11_OUT
IFX_EXTERN IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMN_P33_11_OUT
Negative carrier generator output.
Definition: IfxEdsadc_PinMap.h:154
IfxEdsadc_CGPWMN_P02_0_OUT
IFX_EXTERN IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMN_P02_0_OUT
Negative carrier generator output.
Definition: IfxEdsadc_PinMap.h:153
IfxEdsadc_DS5NB_P00_3_IN
IFX_EXTERN IfxEdsadc_Dsn_In IfxEdsadc_DS5NB_P00_3_IN
Negative analog input channel 5, pin B.
Definition: IfxEdsadc_PinMap.h:222
IfxEdsadc_DSCOUT4_P02_5_OUT
IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT4_P02_5_OUT
Modulator clock output.
Definition: IfxEdsadc_PinMap.h:184
IfxEdsadc_ITR4F_P00_6_IN
IFX_EXTERN IfxEdsadc_Itr_In IfxEdsadc_ITR4F_P00_6_IN
Trigger/Gate input, channel 4.
Definition: IfxEdsadc_PinMap.h:260
IfxEdsadc_DS2PA_AN20_IN
IFX_EXTERN IfxEdsadc_Dsp_In IfxEdsadc_DS2PA_AN20_IN
Positive analog input channel 2, pin A.
Definition: IfxEdsadc_PinMap.h:236
IfxEdsadc_DSCIN1A_P00_9_IN
IFX_EXTERN IfxEdsadc_Dscin_In IfxEdsadc_DSCIN1A_P00_9_IN
Modulator clock input, channel 1.
Definition: IfxEdsadc_PinMap.h:160
IFXEDSADC_PINMAP_DSP_IN_NUM_ITEMS
#define IFXEDSADC_PINMAP_DSP_IN_NUM_ITEMS
Definition: IfxEdsadc_PinMap.h:282
IfxEdsadc_CGPWMP_P02_1_OUT
IFX_EXTERN IfxEdsadc_Cgpwm_Out IfxEdsadc_CGPWMP_P02_1_OUT
Positive carrier generator output.
Definition: IfxEdsadc_PinMap.h:156
IfxEdsadc_DSCOUT4_P00_7_OUT
IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT4_P00_7_OUT
Modulator clock output.
Definition: IfxEdsadc_PinMap.h:183
IfxEdsadc_DSCOUT7_P01_2_OUT
IFX_EXTERN IfxEdsadc_Dscout_Out IfxEdsadc_DSCOUT7_P01_2_OUT
Modulator clock output.
Definition: IfxEdsadc_PinMap.h:189
IfxEdsadc_cfg.h
EDSADC on-chip implementation data.
IfxPort.h
PORT basic functionality.


iLLD_TC38A: IfxEdsadc_cfg.h Source File

  • _Impl
IfxEdsadc_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxEdsadc_cfg.h
3 * \brief EDSADC on-chip implementation data
4 * \ingroup IfxLld_Edsadc
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Edsadc EDSADC
42 * \ingroup IfxLld
43 * \defgroup IfxLld_Edsadc_Impl Implementation
44 * \ingroup IfxLld_Edsadc
45 * \defgroup IfxLld_Edsadc_Std Standard Driver
46 * \ingroup IfxLld_Edsadc
47 */
48
49 #ifndef IFXEDSADC_CFG_H
50 #define IFXEDSADC_CFG_H 1
51
52 /******************************************************************************/
53 /*----------------------------------Includes----------------------------------*/
54 /******************************************************************************/
55
56 /******************************************************************************/
57 /*-----------------------------------Macros-----------------------------------*/
58 /******************************************************************************/
59
60 #define IFXEDSADC_NUM_CHANNELS 10
61
62 #define IFXEDSADC_NUM_MODULES (1)
63
64 /******************************************************************************/
65 /*-------------------------------Enumerations---------------------------------*/
66 /******************************************************************************/
67
68 /** \brief Specifies the channel Index
69 */
70 typedef enum
71 {
72 IfxEdsadc_ChannelId_0 = 0, /**< \brief Specifies the channel Index 0 */
73 IfxEdsadc_ChannelId_1 = 1, /**< \brief Specifies the channel Index 1 */
74 IfxEdsadc_ChannelId_2 = 2, /**< \brief Specifies the channel Index 2 */
75 IfxEdsadc_ChannelId_3 = 3, /**< \brief Specifies the channel Index 3 */
76 IfxEdsadc_ChannelId_4 = 4, /**< \brief Specifies the channel Index 4 */
77 IfxEdsadc_ChannelId_5 = 5, /**< \brief Specifies the channel Index 5 */
78 IfxEdsadc_ChannelId_6 = 6, /**< \brief Specifies the channel Index 6 */
79 IfxEdsadc_ChannelId_7 = 7, /**< \brief Specifies the channel Index 7 */
80 IfxEdsadc_ChannelId_8 = 8, /**< \brief Specifies the channel Index 8 */
81 IfxEdsadc_ChannelId_9 = 9 /**< \brief Specifies the channel Index 9 */
82 } IfxEdsadc_ChannelId;
83
84 #endif /* IFXEDSADC_CFG_H */
IfxEdsadc_ChannelId_3
Specifies the channel Index 3.
Definition: IfxEdsadc_cfg.h:75
IfxEdsadc_ChannelId_4
Specifies the channel Index 4.
Definition: IfxEdsadc_cfg.h:76
IfxEdsadc_ChannelId_7
Specifies the channel Index 7.
Definition: IfxEdsadc_cfg.h:79
IfxEdsadc_ChannelId_9
Specifies the channel Index 9.
Definition: IfxEdsadc_cfg.h:81
IfxEdsadc_ChannelId_8
Specifies the channel Index 8.
Definition: IfxEdsadc_cfg.h:80
IfxEdsadc_ChannelId
IfxEdsadc_ChannelId
Specifies the channel Index.
Definition: IfxEdsadc_cfg.h:70
IfxEdsadc_ChannelId_6
Specifies the channel Index 6.
Definition: IfxEdsadc_cfg.h:78
IfxEdsadc_ChannelId_5
Specifies the channel Index 5.
Definition: IfxEdsadc_cfg.h:77
IfxEdsadc_ChannelId_0
Specifies the channel Index 0.
Definition: IfxEdsadc_cfg.h:72
IfxEdsadc_ChannelId_1
Specifies the channel Index 1.
Definition: IfxEdsadc_cfg.h:73
IfxEdsadc_ChannelId_2
Specifies the channel Index 2.
Definition: IfxEdsadc_cfg.h:74


iLLD_TC38A: IfxEray.c Source File

  • Eray
  • Std
IfxEray.c
Go to the documentation of this file.
1 /**
2 * \file IfxEray.c
3 * \brief ERAY basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxEray.h"
47
48 /******************************************************************************/
49 /*-------------------------Function Implementations---------------------------*/
50 /******************************************************************************/
51
52 uint16 IfxEray_calcHeaderCrc(uint8 payloadLength, uint16 frameId, boolean startupFrameIndicator, boolean syncFrameIndicator)
53 {
54 uint32 headerValue = ((syncFrameIndicator & 0x1) << 19) | ((startupFrameIndicator & 0x1) << 18) | ((frameId & 0x7FF) << 7) | (payloadLength &
55 0x7F);
56
57 uint32 crcInit = 0x1A;
58 uint32 length = 20;
59 uint32 crcNext;
60 uint32 crcPoly = 0x385;
61 uint32 crcRegX = crcInit;
62 uint32 headerTemp, regTemp;
63
64 headerValue <<= 11;
65 crcRegX <<= 21;
66 crcPoly <<= 21;
67
68 while (length)
69 {
70 headerValue <<= 1;
71 headerTemp = headerValue & 0x80000000;
72 regTemp = crcRegX & 0x80000000;
73
74 if (headerTemp ^ regTemp) // Step 1
75 {
76 crcNext = 1;
77 }
78 else
79 {
80 crcNext = 0;
81 }
82
83 crcRegX <<= 1; // Step 2
84
85 if (crcNext)
86 {
87 crcRegX ^= crcPoly; // Step 3
88 }
89
90 length--;
91 }
92
93 crcRegX >>= 21;
94
95 return (uint16)crcRegX;
96 }
97
98
99 boolean IfxEray_changePocState(Ifx_ERAY *eray, IfxEray_PocCommand pocCommand)
100 {
101 boolean result;
102
103 // wait if Communication controller is busy
104 while (eray->SUCC1.B.PBSY == 1)
105 {}
106
107 eray->SUCC1.B.CMD = pocCommand;
108
109 // if command not accepted, return FALSE
110 if (eray->SUCC1.B.CMD == 0)
111 {
112 result = FALSE;
113 }
114 else
115 {
116 result = TRUE;
117 }
118
119 return result;
120 }
121
122
123 void IfxEray_clearAllFlags(Ifx_ERAY *eray)
124 {
125 eray->EIR.U = 0xFFFFFFFFU; /* Clear Error Int. */
126 eray->SIR.U = 0xFFFFFFFFU; /* Clear Status Int. */
127 eray->EIER.U = 0xFFFFFFFFU; /* Disable all Error Int. */
128 eray->SIER.U = 0xFFFFFFFFU; /* Disable all Status Int. */
129 eray->MHDS.U = 0x7F7F7FFFU; /* Clear Error Int. */
130 }
131
132
133 void IfxEray_enableInterruptLines(Ifx_ERAY *eray)
134 {
135 eray->ILE.U = 0x00000003U; //enable both the interrupt lines
136 eray->EILS.U = 0x00000000U; // all interrupt lines to INT0SRC
137 eray->SILS.U = 0x00000800U; // TOBC interrupt line to INT1SRC
138 eray->SIES.U = 0x0303FFFFU; // all status interrupts are enabled
139 eray->EIES.U = 0x07070FFFU; // all error interrupts are enabled
140 eray->NDIC1.U = 0x00000000U; // all interrupt lines to NADT0SRC
141 eray->NDIC2.U = 0x00000000U; // all interrupt lines to NADT0SRC
142 eray->NDIC3.U = 0x00000000U; // all interrupt lines to NADT0SRC
143 eray->NDIC4.U = 0x00000000U; // all interrupt lines to NADT0SRC
144 eray->MSIC1.U = 0x00000000U; // all interrupt lines to MBSC0SRC
145 eray->MSIC2.U = 0x00000000U; // all interrupt lines to MBSC0SRC
146 eray->MSIC3.U = 0x00000000U; // all interrupt lines to MBSC0SRC
147 eray->MSIC4.U = 0x00000000U; // all interrupt lines to MBSC0SRC
148 }
149
150
151 Ifx_ERAY *IfxEray_getAddress(IfxEray_Index eray)
152 {
153 Ifx_ERAY *module;
154
155 if (eray < IFXERAY_NUM_MODULES)
156 {
157 module = (Ifx_ERAY *)IfxEray_cfg_indexMap[eray].module;
158 }
159 else
160 {
161 module = NULL_PTR;
162 }
163
164 return module;
165 }
166
167
168 IfxEray_Index IfxEray_getIndex(Ifx_ERAY *eray)
169 {
170 uint32 index;
171 IfxEray_Index result;
172
173 result = IfxEray_Index_none;
174
175 for (index = 0; index < IFXERAY_NUM_MODULES; index++)
176 {
177 if (IfxEray_cfg_indexMap[index].module == eray)
178 {
179 result = (IfxEray_Index)IfxEray_cfg_indexMap[index].index;
180 break;
181 }
182 }
183
184 return result;
185 }
186
187
188 void IfxEray_readData(Ifx_ERAY *eray, uint32 *data, uint8 payloadLength)
189 {
190 if (data != NULL_PTR)
191 {
192 uint16 length = (payloadLength + 1) / 2;
193 uint8 index;
194
195 for (index = 0; index < length; index++)
196 {
197 *data++ = eray->RDDS_1S[index].U;
198 }
199 }
200 }
201
202
203 void IfxEray_readFrame(Ifx_ERAY *eray, IfxEray_ReceivedHeader *header, uint32 *data, Ifx_SizeT maxPayloadLength)
204 {
205 {
206 Ifx_ERAY_RDHS1 rdhs1;
207 rdhs1.U = eray->RDHS1.U;
208 Ifx_ERAY_RDHS2 rdhs2;
209 rdhs2.U = eray->RDHS2.U;
210 Ifx_ERAY_RDHS3 rdhs3;
211 rdhs3.U = eray->RDHS3.U;
212
213 header->frameId = rdhs1.B.FID;
214 header->payloadLength = rdhs2.B.PLR;
215 header->headerCrc = rdhs2.B.CRC;
216 header->payloadPreambleIndicator = rdhs3.B.PPI;
217 header->nullFrameIndicator = rdhs3.B.NFI;
218 header->syncFrame = rdhs3.B.SYN;
219 header->startupFrame = rdhs3.B.SFI;
220 header->cycleNumber = rdhs3.B.RCC;
221 }
222
223 IfxEray_readData(eray, data, (header->payloadLength > maxPayloadLength) ? maxPayloadLength : header->payloadLength);
224 }
225
226
227 void IfxEray_resetModule(Ifx_ERAY *eray)
228 {
229 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
230 IfxScuWdt_clearCpuEndinit(passwd);
231 eray->KRST1.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
232 eray->KRST0.B.RST = 1;
233
234 IfxScuWdt_setCpuEndinit(passwd);
235
236 while (eray->KRST0.B.RSTSTAT == 0)
237 {
238 /* Wait until reset is executed */
239 }
240
241 IfxScuWdt_clearCpuEndinit(passwd);
242 eray->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
243 IfxScuWdt_setCpuEndinit(passwd);
244 }
245
246
247 void IfxEray_setMessageBufferInterruptDestination(Ifx_ERAY *eray, uint8 messageBuffer, uint8 messageBufferDestination)
248 {
249 uint8 ix = messageBuffer / 32;
250 uint32 mask = 1 << (messageBuffer % 32);
251 Ifx_ERAY_MSIC1 *msicSFR = (Ifx_ERAY_MSIC1 *)((uint32)&eray->MSIC1 + 4 * ix);
252
253 if (messageBufferDestination == FALSE)
254 {
255 msicSFR->U &= ~mask;
256 }
257 else
258 {
259 msicSFR->U |= mask;
260 }
261 }
262
263
264 void IfxEray_setNewDataInterruptDestination(Ifx_ERAY *eray, uint8 ndat, uint8 ndatDestination)
265 {
266 IFX_UNUSED_PARAMETER(ndat);
267 uint8 ix = ndatDestination / 32;
268 uint32 mask = 1 << (ndatDestination % 32);
269 Ifx_ERAY_NDIC1 *ndicSFR = (Ifx_ERAY_NDIC1 *)((uint32)&eray->NDIC1 + 4 * ix);
270
271 if (ndatDestination == FALSE)
272 {
273 ndicSFR->U &= ~mask;
274 }
275 else
276 {
277 ndicSFR->U |= mask;
278 }
279 }
280
281
282 void IfxEray_setPocReady(Ifx_ERAY *eray)
283 {
284 // wait CC is busy
285 while (eray->SUCC1.B.PBSY == 1)
286 {}
287
288 // Ready unlock sequence
289 eray->LCK.B.CLK = 0xCE;
290 eray->LCK.B.CLK = 0x31;
291 eray->SUCC1.B.CMD = IfxEray_PocCommand_ready;
292 }
293
294
295 void IfxEray_setSlot(Ifx_ERAY *eray, const IfxEray_Header *header, const uint32 *data, const IfxEray_SlotConfig *slotConfig)
296 {
297 // wait if Host is busy with another transfer
298 while (IfxEray_getInputBufferBusyHostStatus(eray) == TRUE)
299 {}
300
301 if (header != NULL_PTR)
302 {
303 {
304 Ifx_ERAY_WRHS1 wrhs1;
305 wrhs1.U = 0;
306 wrhs1.B.FID = header->frameId;
307 wrhs1.B.CYC = header->cycleCode;
308 wrhs1.B.CHA = header->channelAFiltered;
309 wrhs1.B.CHB = header->channelBFiltered;
310 wrhs1.B.CFG = header->bufferDirection;
311 wrhs1.B.PPIT = header->transmitPayloadIndicatior;
312 wrhs1.B.TXM = header->transmissionMode;
313 wrhs1.B.MBI = header->bufferServiceEnabled;
314 eray->WRHS1.U = wrhs1.U;
315 }
316 {
317 Ifx_ERAY_WRHS2 wrhs2;
318 wrhs2.U = 0;
319
320 if (header->bufferDirection == IfxEray_BufferDirection_transmit)
321 {
322 wrhs2.B.CRC = IfxEray_calcHeaderCrc(header->payloadLength, header->frameId, header->startupFrameIndicator, header->syncFrameIndicator);
323 }
324
325 wrhs2.B.PLC = header->payloadLength;
326 eray->WRHS2.U = wrhs2.U;
327 }
328
329 eray->WRHS3.U = header->dataPointer;
330 }
331
332 IfxEray_writeData(eray, data, header->payloadLength);
333
334 eray->IBCM.B.LHSH = slotConfig->headerTransfered;
335 eray->IBCM.B.LDSH = slotConfig->dataTransfered;
336 eray->IBCM.B.STXRH = slotConfig->transferRequested;
337 eray->IBCR.B.IBRH = slotConfig->bufferIndex;
338
339 // wait if Shadow is busy with another transfer
340 while (IfxEray_getInputBufferBusyShadowStatus(eray) == TRUE)
341 {}
342
343 while (IfxEray_getInputBufferBusyHostStatus(eray) == TRUE)
344 {}
345 }
346
347
348 void IfxEray_writeData(Ifx_ERAY *eray, const uint32 *data, uint8 payloadLength)
349 {
350 if (data != NULL_PTR)
351 {
352 uint16 length = (payloadLength + 1) / 2;
353 uint8 index;
354
355 for (index = 0; index < length; index++)
356 {
357 eray->WRDS_1S[index].U = *data++;
358 }
359 }
360 }
IfxEray_SlotConfig
Transmit control structure.
Definition: IfxEray.h:421
IfxEray_setSlot
void IfxEray_setSlot(Ifx_ERAY *eray, const IfxEray_Header *header, const uint32 *data, const IfxEray_SlotConfig *slotConfig)
Writes header and data to Input buffers and set the slots.
Definition: IfxEray.c:295
IfxEray_Header::bufferDirection
IfxEray_BufferDirection bufferDirection
selects buffer as a transmit buffer or as a receive buffer.
Definition: IfxEray.h:395
IfxEray_calcHeaderCrc
uint16 IfxEray_calcHeaderCrc(uint8 payloadLength, uint16 frameId, boolean startupFrameIndicator, boolean syncFrameIndicator)
Calculate and returns the CRC for frame.
Definition: IfxEray.c:52
IfxEray_setPocReady
void IfxEray_setPocReady(Ifx_ERAY *eray)
Sets the POC state to Ready state.
Definition: IfxEray.c:282
IfxEray_ReceivedHeader::syncFrame
uint8 syncFrame
0 : received frame is not a synch frame ; 1 : receive frame is a synch frame.
Definition: IfxEray.h:413
IfxEray_BufferDirection_transmit
buffer is configured as transmit buffer
Definition: IfxEray.h:91
IfxEray_setNewDataInterruptDestination
void IfxEray_setNewDataInterruptDestination(Ifx_ERAY *eray, uint8 ndat, uint8 ndatDestination)
Selects between NDAT0 and NDAT1 interrupt destination.
Definition: IfxEray.c:264
IfxEray_ReceivedHeader
Received header in a frame.
Definition: IfxEray.h:407
IfxEray_Header::transmissionMode
IfxEray_TransmissionMode transmissionMode
transmission mode of Header.
Definition: IfxEray.h:397
IfxEray_Header::transmitPayloadIndicatior
boolean transmitPayloadIndicatior
weather payload indicator is set or not.
Definition: IfxEray.h:396
IfxEray_getIndex
IfxEray_Index IfxEray_getIndex(Ifx_ERAY *eray)
API to get the resource index of the ERAY specified.
Definition: IfxEray.c:168
IfxEray_SlotConfig::dataTransfered
boolean dataTransfered
whether data is transfered from input buffers to Message RAM or not.
Definition: IfxEray.h:424
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxEray_ReceivedHeader::payloadPreambleIndicator
uint8 payloadPreambleIndicator
1 : received payload segment has network management and message id or not; 0 : It hasn&#39;t...
Definition: IfxEray.h:416
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxEray_getInputBufferBusyHostStatus
IFX_INLINE boolean IfxEray_getInputBufferBusyHostStatus(Ifx_ERAY *eray)
Gets the Input Buffer Host Busy status.
Definition: IfxEray.h:1358
IfxEray_Header::dataPointer
uint16 dataPointer
pointer to the data section of message buffer in RAM.
Definition: IfxEray.h:400
IfxEray_Header::startupFrameIndicator
boolean startupFrameIndicator
whether startup frame is indicated or not.
Definition: IfxEray.h:401
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxEray_Header::bufferServiceEnabled
boolean bufferServiceEnabled
wether buffer service request is enabled or not.
Definition: IfxEray.h:398
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxEray_ReceivedHeader::headerCrc
uint16 headerCrc
received header crc.
Definition: IfxEray.h:411
IfxEray.h
ERAY basic functionality.
IfxEray_writeData
void IfxEray_writeData(Ifx_ERAY *eray, const uint32 *data, uint8 payloadLength)
Writes data section of a frame to input data registers.
Definition: IfxEray.c:348
IfxEray_SlotConfig::transferRequested
boolean transferRequested
transmit buffer released for transmission or not.
Definition: IfxEray.h:425
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxEray_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxEray_cfg_indexMap[IFXERAY_NUM_MODULES]
Definition: IfxEray_cfg.c:52
IfxEray_getInputBufferBusyShadowStatus
IFX_INLINE uint8 IfxEray_getInputBufferBusyShadowStatus(Ifx_ERAY *eray)
Gets the Input Buffer Shadow status.
Definition: IfxEray.h:1364
IfxEray_setMessageBufferInterruptDestination
void IfxEray_setMessageBufferInterruptDestination(Ifx_ERAY *eray, uint8 messageBuffer, uint8 messageBufferDestination)
Selects between MBSC0 and MBSC1 interrupt destination.
Definition: IfxEray.c:247
IfxEray_Header
Header section in a frame.
Definition: IfxEray.h:389
IFXERAY_NUM_MODULES
#define IFXERAY_NUM_MODULES
Definition: IfxEray_cfg.h:65
IfxEray_SlotConfig::bufferIndex
uint8 bufferIndex
buffer index in the Message RAM.
Definition: IfxEray.h:426
IfxEray_ReceivedHeader::payloadLength
uint8 payloadLength
received payload length.
Definition: IfxEray.h:410
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxEray_ReceivedHeader::nullFrameIndicator
uint8 nullFrameIndicator
0 : no data frame received; 1: atleast one data frame received.
Definition: IfxEray.h:412
IfxEray_Header::channelAFiltered
boolean channelAFiltered
channel A serves as a control for transmit and filter for receive buffers.
Definition: IfxEray.h:393
IfxEray_ReceivedHeader::startupFrame
uint8 startupFrame
0 : received frame is not a startup frame ; 1 : receive frame is a startup frame. ...
Definition: IfxEray.h:414
IfxEray_Header::syncFrameIndicator
boolean syncFrameIndicator
whether sync frame is indicated or not.
Definition: IfxEray.h:402
IfxEray_resetModule
void IfxEray_resetModule(Ifx_ERAY *eray)
Resets the ERAY kernel.
Definition: IfxEray.c:227
IfxEray_getAddress
Ifx_ERAY * IfxEray_getAddress(IfxEray_Index eray)
Definition: IfxEray.c:151
IfxEray_Header::channelBFiltered
boolean channelBFiltered
channel B serves as a control for transmit and filter for receive buffers.
Definition: IfxEray.h:394
IfxEray_Index_none
Not Selected.
Definition: IfxEray_cfg.h:81
IfxEray_SlotConfig::headerTransfered
boolean headerTransfered
whether header is transfered from input buffers to Message RAM or not.
Definition: IfxEray.h:423
IfxEray_PocCommand
IfxEray_PocCommand
Commmand to control the Communication, defined in MODULE_ERAY0.SUCC1.B.CMD.
Definition: IfxEray.h:272
IfxEray_ReceivedHeader::cycleNumber
uint8 cycleNumber
cycle number in which frame is received.
Definition: IfxEray.h:415
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxEray_PocCommand_ready
command to controller to enter READY.
Definition: IfxEray.h:276
IfxEray_readFrame
void IfxEray_readFrame(Ifx_ERAY *eray, IfxEray_ReceivedHeader *header, uint32 *data, Ifx_SizeT maxPayloadLength)
Reads header and data from output buffers.
Definition: IfxEray.c:203
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxEray_clearAllFlags
void IfxEray_clearAllFlags(Ifx_ERAY *eray)
Clears all the error flags.
Definition: IfxEray.c:123
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
IfxEray_enableInterruptLines
void IfxEray_enableInterruptLines(Ifx_ERAY *eray)
Enables all the Interrupt lines.
Definition: IfxEray.c:133
IfxEray_Index
IfxEray_Index
List of the available Eray resources.
Definition: IfxEray_cfg.h:79
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxEray_changePocState
boolean IfxEray_changePocState(Ifx_ERAY *eray, IfxEray_PocCommand pocCommand)
Changes the Commmunication Controller state.
Definition: IfxEray.c:99
IfxEray_Header::cycleCode
uint8 cycleCode
the cycle set used for cycle counter filtering.
Definition: IfxEray.h:392
IfxEray_readData
void IfxEray_readData(Ifx_ERAY *eray, uint32 *data, uint8 payloadLength)
Reads the received data from output registers.
Definition: IfxEray.c:188
IfxEray_ReceivedHeader::frameId
uint16 frameId
received frame id.
Definition: IfxEray.h:409


iLLD_TC38A: IfxEray.h Source File

  • Eray
  • Std
IfxEray.h
Go to the documentation of this file.
1 /**
2 * \file IfxEray.h
3 * \brief ERAY basic functionality
4 * \ingroup IfxLld_Eray
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Eray_Std_Enumerations Enumerations
42 * \ingroup IfxLld_Eray_Std
43 * \defgroup IfxLld_Eray_Std_Interrupt Interrupt Functions
44 * \ingroup IfxLld_Eray_Std
45 * \defgroup IfxLld_Eray_Std_IO IO Pin Configuration Functions
46 * \ingroup IfxLld_Eray_Std
47 * \defgroup IfxLld_Eray_Std_Module Module Functions
48 * \ingroup IfxLld_Eray_Std
49 * \defgroup IfxLld_Eray_Std_Status Status Functions
50 * \ingroup IfxLld_Eray_Std
51 * \defgroup IfxLld_Eray_Std_Configuration Configuration Functions
52 * \ingroup IfxLld_Eray_Std
53 * \defgroup IfxLld_Eray_Std_Structures Data Structures
54 * \ingroup IfxLld_Eray_Std
55 * \defgroup IfxLld_Eray_Std_Operative Operative Functions
56 * \ingroup IfxLld_Eray_Std
57 */
58
59 #ifndef IFXERAY_H
60 #define IFXERAY_H 1
61
62 /******************************************************************************/
63 /*----------------------------------Includes----------------------------------*/
64 /******************************************************************************/
65
66 #include "_Impl/IfxEray_cfg.h"
67 #include "_PinMap/IfxEray_PinMap.h"
68 #include "Src/Std/IfxSrc.h"
69 #include "IfxEray_reg.h"
70
71 /******************************************************************************/
72 /*--------------------------------Enumerations--------------------------------*/
73 /******************************************************************************/
74
75 /** \addtogroup IfxLld_Eray_Std_Enumerations
76 * \{ */
77 /** \brief Baudrate on the flexray bus, defined in MODULE_ERAY0.PRTC1.B.BRP.
78 */
79 typedef enum
80 {
81 IfxEray_Baudrate_10 = 0, /**< \brief baudrate is 10MBits/Sec */
82 IfxEray_Baudrate_5 = 1, /**< \brief baudrate is 5MBits/Sec */
83 IfxEray_Baudrate_2_5 = 2 /**< \brief baudrate is 2.5MBits/Sec */
84 } IfxEray_Baudrate;
85
86 /** \brief wheather transmit buffer or receive buffer, defined in MODULE_ERAY0.WRHS1.B.CFG.
87 */
88 typedef enum
89 {
90 IfxEray_BufferDirection_receive = 0, /**< \brief buffer is configured as receive buffer */
91 IfxEray_BufferDirection_transmit = 1 /**< \brief buffer is configured as transmit buffer */
92 } IfxEray_BufferDirection;
93
94 /** \brief Channel Id
95 */
96 typedef enum
97 {
98 IfxEray_Channel_a = 0, /**< \brief channel A */
99 IfxEray_Channel_b = 1 /**< \brief channel B */
100 } IfxEray_Channel;
101
102 /** \brief Selection of error flag to clear defined in MODULE_ERAY.EIR.U
103 */
104 typedef enum
105 {
106 IfxEray_ClearErrorFlag_pemc = 1, /**< \brief POC error mode change bit. */
107 IfxEray_ClearErrorFlag_cna = 2, /**< \brief command not accepted event bit. */
108 IfxEray_ClearErrorFlag_sfbm = 4, /**< \brief sync frame below minimum bit. */
109 IfxEray_ClearErrorFlag_sfo = 8, /**< \brief sync frame overflow event bit */
110 IfxEray_ClearErrorFlag_ccf = 16, /**< \brief clock correction failure event. */
111 IfxEray_ClearErrorFlag_ccl = 32, /**< \brief CHI command locked event. */
112 IfxEray_ClearErrorFlag_eerr = 64, /**< \brief ECC error event bit. */
113 IfxEray_ClearErrorFlag_rfo = 128, /**< \brief RxFIFO overrun event bit. */
114 IfxEray_ClearErrorFlag_efa = 256, /**< \brief empty FIFO access event bit. */
115 IfxEray_ClearErrorFlag_iiba = 512, /**< \brief illegal input buffer access event. */
116 IfxEray_ClearErrorFlag_ioba = 1024, /**< \brief illegal output buffer access event. */
117 IfxEray_ClearErrorFlag_mhf = 2048, /**< \brief message handler constraint flag. */
118 IfxEray_ClearErrorFlag_eda = 65536, /**< \brief error event on channel A. */
119 IfxEray_ClearErrorFlag_ltva = 131072, /**< \brief latest transmit violation flag on channel A . */
120 IfxEray_ClearErrorFlag_taba = 262144, /**< \brief transmission across channel A boundary flag. */
121 IfxEray_ClearErrorFlag_edb = 16777216, /**< \brief error event on channel B. */
122 IfxEray_ClearErrorFlag_ltvb = 33554432, /**< \brief latest transmit violation flag on channel B . */
123 IfxEray_ClearErrorFlag_tabb = 67108864 /**< \brief transmission across channel B boundary flag. */
124 } IfxEray_ClearErrorFlag;
125
126 /** \brief Selection of status flag to clear defined in MODULE_ERAY.SIR.U
127 */
128 typedef enum
129 {
130 IfxEray_ClearStatusFlag_wst = 1, /**< \brief wakeup status bit. */
131 IfxEray_ClearStatusFlag_cas = 2, /**< \brief collision avoidance bit. */
132 IfxEray_ClearStatusFlag_cycs = 4, /**< \brief cycle start service bit. */
133 IfxEray_ClearStatusFlag_txi = 8, /**< \brief transmit service request bit. */
134 IfxEray_ClearStatusFlag_rxi = 16, /**< \brief receive service request bit. */
135 IfxEray_ClearStatusFlag_rfne = 32, /**< \brief receive fifo not empty bit. */
136 IfxEray_ClearStatusFlag_rfcl = 64, /**< \brief RxFIFO critical level reached bit. */
137 IfxEray_ClearStatusFlag_nmvc = 128, /**< \brief network management vector bit. */
138 IfxEray_ClearStatusFlag_ti0 = 256, /**< \brief timer0 service request bit. */
139 IfxEray_ClearStatusFlag_ti1 = 512, /**< \brief timer1 service request bit. */
140 IfxEray_ClearStatusFlag_tibc = 1024, /**< \brief transfer input buffer completion request bit. */
141 IfxEray_ClearStatusFlag_tobc = 2048, /**< \brief transfer output buffer completion request bit. */
142 IfxEray_ClearStatusFlag_swe = 4096, /**< \brief stop watch event bit. */
143 IfxEray_ClearStatusFlag_sucs = 8192, /**< \brief startup success event bit. */
144 IfxEray_ClearStatusFlag_mbsi = 16384, /**< \brief message buffer service status bit. */
145 IfxEray_ClearStatusFlag_sds = 32768, /**< \brief dynamic segment start bit. */
146 IfxEray_ClearStatusFlag_wupa = 65536, /**< \brief wakeup pattern channel A bit. */
147 IfxEray_ClearStatusFlag_mtsa = 131072, /**< \brief MTS receive channel A bit. */
148 IfxEray_ClearStatusFlag_wupb = 16777216, /**< \brief wakeup pattern channel B bit. */
149 IfxEray_ClearStatusFlag_mtsb = 33554432 /**< \brief MTS receive channel B bit. */
150 } IfxEray_ClearStatusFlag;
151
152 /** \brief Clock divider in RUN mode, defined in MODULE_ERAY0.B.RMC.
153 */
154 typedef enum
155 {
156 IfxEray_ClockDivider_none = 0, /**< \brief no clock signal */
157 IfxEray_ClockDivider_1 = 1, /**< \brief run mode clock divider 1 */
158 IfxEray_ClockDivider_2, /**< \brief run mode clock divider 2 */
159 IfxEray_ClockDivider_3, /**< \brief run mode clock divider 3 */
160 IfxEray_ClockDivider_4, /**< \brief run mode clock divider 4 */
161 IfxEray_ClockDivider_5, /**< \brief run mode clock divider 5 */
162 IfxEray_ClockDivider_6, /**< \brief run mode clock divider 6 */
163 IfxEray_ClockDivider_7 /**< \brief run mode clock divider 7 */
164 } IfxEray_ClockDivider;
165
166 /** \brief External offset correction control defined in MODULE_ERAY0.GTU11.B.EOCC.
167 */
168 typedef enum
169 {
170 IfxEray_ExternalOffset_noCorrection = 1, /**< \brief No external correction control. */
171 IfxEray_ExternalOffset_correctionSubtracted = 2, /**< \brief External offset correction subtracted from calculated correction. */
172 IfxEray_ExternalOffset_correctionAdded = 3 /**< \brief External offset correction added to calculated correction. */
173 } IfxEray_ExternalOffset;
174
175 /** \brief External clock offset correction value defined in MODULE_ERAY0.GTU11.B.EOC.
176 */
177 typedef enum
178 {
179 IfxEray_ExternalOffsetCorrection_0 = 0, /**< \brief external clock offset correction value 0 */
180 IfxEray_ExternalOffsetCorrection_1, /**< \brief external clock offset correction value 1 */
181 IfxEray_ExternalOffsetCorrection_2, /**< \brief external clock offset correction value 2 */
182 IfxEray_ExternalOffsetCorrection_3, /**< \brief external clock offset correction value 3 */
183 IfxEray_ExternalOffsetCorrection_4, /**< \brief external clock offset correction value 4 */
184 IfxEray_ExternalOffsetCorrection_5, /**< \brief external clock offset correction value 5 */
185 IfxEray_ExternalOffsetCorrection_6, /**< \brief external clock offset correction value 6 */
186 IfxEray_ExternalOffsetCorrection_7 /**< \brief external clock offset correction value 7 */
187 } IfxEray_ExternalOffsetCorrection;
188
189 /** \brief External rate correction control MODULE_ERAY0.GTU11.B.ERCC.
190 */
191 typedef enum
192 {
193 IfxEray_ExternalRate_noCorrection = 1, /**< \brief No external correction control. */
194 IfxEray_ExternalRate_correctionSubtracted = 2, /**< \brief External rate correction subtracted from calculated correction. */
195 IfxEray_ExternalRate_correctionAdded = 3 /**< \brief External rate correction added to calculated correction. */
196 } IfxEray_ExternalRate;
197
198 /** \brief External clock rate correction value defined in MODULE_ERAY0.GTU11.B.ERC.
199 */
200 typedef enum
201 {
202 IfxEray_ExternalRateCorrection_0 = 0, /**< \brief external clock rate correction value 0 */
203 IfxEray_ExternalRateCorrection_1, /**< \brief external clock rate correction value 1 */
204 IfxEray_ExternalRateCorrection_2, /**< \brief external clock rate correction value 2 */
205 IfxEray_ExternalRateCorrection_3, /**< \brief external clock rate correction value 3 */
206 IfxEray_ExternalRateCorrection_4, /**< \brief external clock rate correction value 4 */
207 IfxEray_ExternalRateCorrection_5, /**< \brief external clock rate correction value 5 */
208 IfxEray_ExternalRateCorrection_6, /**< \brief external clock rate correction value 6 */
209 IfxEray_ExternalRateCorrection_7 /**< \brief external clock rate correction value 7 */
210 } IfxEray_ExternalRateCorrection;
211
212 /** \brief Duration of dynamic slot idle phase, defined in MODULE_ERAY0.B.DSI.
213 */
214 typedef enum
215 {
216 IfxEray_IdleDynamicSlots_0 = 0, /**< \brief duration of dynamic slot idle phase is 0 */
217 IfxEray_IdleDynamicSlots_1, /**< \brief duration of dynamic slot idle phase is 1 */
218 IfxEray_IdleDynamicSlots_2 /**< \brief duration of dynamic slot idle phase is 2 */
219 } IfxEray_IdleDynamicSlots;
220
221 /** \brief Interrupt lines
222 */
223 typedef enum
224 {
225 IfxEray_InterruptLine_0 = 0, /**< \brief line 0 */
226 IfxEray_InterruptLine_1 = 1 /**< \brief line 1 */
227 } IfxEray_InterruptLine;
228
229 /** \brief Wakeup or Startup listen timeout in presence of noise, defined in MODULE_ERAY0.SUCC2.B.LTN.
230 */
231 typedef enum
232 {
233 IfxEray_ListenTimeOutNoise_2 = 1, /**< \brief listen Time-out noise 2 */
234 IfxEray_ListenTimeOutNoise_3, /**< \brief listen Time-out noise 3 */
235 IfxEray_ListenTimeOutNoise_4, /**< \brief listen Time-out noise 4 */
236 IfxEray_ListenTimeOutNoise_5, /**< \brief listen Time-out noise 5 */
237 IfxEray_ListenTimeOutNoise_6, /**< \brief listen Time-out noise 6 */
238 IfxEray_ListenTimeOutNoise_7, /**< \brief listen Time-out noise 7 */
239 IfxEray_ListenTimeOutNoise_8, /**< \brief listen Time-out noise 8 */
240 IfxEray_ListenTimeOutNoise_9, /**< \brief listen Time-out noise 9 */
241 IfxEray_ListenTimeOutNoise_10, /**< \brief listen Time-out noise 10 */
242 IfxEray_ListenTimeOutNoise_11, /**< \brief listen Time-out noise 11 */
243 IfxEray_ListenTimeOutNoise_12, /**< \brief listen Time-out noise 12 */
244 IfxEray_ListenTimeOutNoise_13, /**< \brief listen Time-out noise 13 */
245 IfxEray_ListenTimeOutNoise_14, /**< \brief listen Time-out noise 14 */
246 IfxEray_ListenTimeOutNoise_15, /**< \brief listen Time-out noise 15 */
247 IfxEray_ListenTimeOutNoise_16 /**< \brief listen Time-out noise 16 */
248 } IfxEray_ListenTimeOutNoise;
249
250 /** \brief Maximum number of sync frames in a cluster defined in MODULE_ERAY0.GTU02.B.SNM.
251 */
252 typedef enum
253 {
254 IfxEray_MaxSynchFrames_2 = 2, /**< \brief Maximum number of sync frames in a cluster are 2 */
255 IfxEray_MaxSynchFrames_3, /**< \brief Maximum number of sync frames in a cluster are 3 */
256 IfxEray_MaxSynchFrames_4, /**< \brief Maximum number of sync frames in a cluster are 4 */
257 IfxEray_MaxSynchFrames_5, /**< \brief Maximum number of sync frames in a cluster are 5 */
258 IfxEray_MaxSynchFrames_6, /**< \brief Maximum number of sync frames in a cluster are 6 */
259 IfxEray_MaxSynchFrames_7, /**< \brief Maximum number of sync frames in a cluster are 7 */
260 IfxEray_MaxSynchFrames_8, /**< \brief Maximum number of sync frames in a cluster are 8 */
261 IfxEray_MaxSynchFrames_9, /**< \brief Maximum number of sync frames in a cluster are 9 */
262 IfxEray_MaxSynchFrames_10, /**< \brief Maximum number of sync frames in a cluster are 10 */
263 IfxEray_MaxSynchFrames_11, /**< \brief Maximum number of sync frames in a cluster are 11 */
264 IfxEray_MaxSynchFrames_12, /**< \brief Maximum number of sync frames in a cluster are 12 */
265 IfxEray_MaxSynchFrames_13, /**< \brief Maximum number of sync frames in a cluster are 13 */
266 IfxEray_MaxSynchFrames_14, /**< \brief Maximum number of sync frames in a cluster are 14 */
267 IfxEray_MaxSynchFrames_15 /**< \brief Maximum number of sync frames in a cluster are 15 */
268 } IfxEray_MaxSynchFrames;
269
270 /** \brief Commmand to control the Communication, defined in MODULE_ERAY0.SUCC1.B.CMD.
271 */
272 typedef enum
273 {
274 IfxEray_PocCommand_notAccepted = 0, /**< \brief command not accepted. */
275 IfxEray_PocCommand_config = 1, /**< \brief command to controller to enter CONFIG */
276 IfxEray_PocCommand_ready = 2, /**< \brief command to controller to enter READY. */
277 IfxEray_PocCommand_wakeup = 3, /**< \brief command to controller to enter WAKEUP */
278 IfxEray_PocCommand_run = 4, /**< \brief command to controller to enter RUN */
279 IfxEray_PocCommand_allSlots = 5, /**< \brief command to controller to enter ALL_SLOTS */
280 IfxEray_PocCommand_halt = 6, /**< \brief command to controller to enter HALT */
281 IfxEray_PocCommand_freeze = 7, /**< \brief command to controller to enter FREEZE */
282 IfxEray_PocCommand_sendMts = 8, /**< \brief command to controller to enter SEND_MTS */
283 IfxEray_PocCommand_coldStart = 9, /**< \brief command to controller to enter COLD_START */
284 IfxEray_PocCommand_reset = 10, /**< \brief command to controller to enter RESET */
285 IfxEray_PocCommand_monitor = 11, /**< \brief command to controller to enter MONITOR */
286 IfxEray_PocCommand_clearRam = 12 /**< \brief command to controller to enter CLEAR_RAM */
287 } IfxEray_PocCommand;
288
289 /** \brief State of Communication Controller Protocol operation control, defined in MODULE_ERAY0.CCSV.B.POCS.
290 */
291 typedef enum
292 {
293 IfxEray_PocState_defaultConfig = 0, /**< \brief controller entered default config state */
294 IfxEray_PocState_ready = 1, /**< \brief controller entered ready state */
295 IfxEray_PocState_normalActive = 2, /**< \brief controller entered normal-active state */
296 IfxEray_PocState_normalPassive = 3, /**< \brief controller entered normal-passive state */
297 IfxEray_PocState_halt = 4, /**< \brief controller entered halt state */
298 IfxEray_PocState_monitor = 5, /**< \brief controller entered monitor state */
299 IfxEray_PocState_config = 15, /**< \brief controller entered config state */
300 IfxEray_PocState_wakeupStandby = 16, /**< \brief controller entered wakeup standby state */
301 IfxEray_PocState_wakeupListen = 17, /**< \brief controller entered wakeup-listen state */
302 IfxEray_PocState_wakeupSend = 18, /**< \brief controller entered wakeup-send state */
303 IfxEray_PocState_wakeupDetect = 19, /**< \brief controller entered wakeup-detection state */
304 IfxEray_PocState_startup = 32, /**< \brief controller entered startup state */
305 IfxEray_PocState_coldStartListen = 33, /**< \brief controller entered clod-start listen state */
306 IfxEray_PocState_collisionResolution = 34, /**< \brief controller entered collission-resolution state. */
307 IfxEray_PocState_consistencyCheck = 35, /**< \brief controller entered consistency-check. */
308 IfxEray_PocState_gap = 36, /**< \brief controller entered gap state. */
309 IfxEray_PocState_join = 37, /**< \brief controller entered join state. */
310 IfxEray_PocState_integrationCheck = 38, /**< \brief controller entered integration-check. */
311 IfxEray_PocState_integrationListen = 39, /**< \brief controller entered integration-listen state. */
312 IfxEray_PocState_integrationConsistencyCheck = 40, /**< \brief controller entered integration consistency check state */
313 IfxEray_PocState_initializeSchedule = 41, /**< \brief controller entered initialise schedule state */
314 IfxEray_PocState_staruAborted = 42, /**< \brief controller entered startup-abort state */
315 IfxEray_PocState_startupSucced = 43 /**< \brief controller entered startup succeed state. */
316 } IfxEray_PocState;
317
318 /** \brief Receiving channel, defined in MODULE_ERAY0.FRF.B.CH.
319 */
320 typedef enum
321 {
322 IfxEray_ReceiveChannel_both = 0, /**< \brief both channels for reception */
323 IfxEray_ReceiveChannel_b = 1, /**< \brief channel A for reception */
324 IfxEray_ReceiveChannel_a = 2, /**< \brief channel B for reception */
325 IfxEray_ReceiveChannel_none = 3 /**< \brief none channels for reception */
326 } IfxEray_ReceiveChannel;
327
328 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
329 * Definition in Ifx_ERAY.CLC.B.EDIS
330 */
331 typedef enum
332 {
333 IfxEray_SleepMode_enable = 0, /**< \brief enables sleep mode */
334 IfxEray_SleepMode_disable = 1 /**< \brief disables sleep mode */
335 } IfxEray_SleepMode;
336
337 /** \brief Sample count value for strobing, defined in MODULE_ERAY0.PRTC1.B.SPP.
338 */
339 typedef enum
340 {
341 IfxEray_StrobePosition_5 = 0, /**< \brief Sample count 5 for strobing */
342 IfxEray_StrobePosition_4 = 1, /**< \brief Sample count 4 for strobing */
343 IfxEray_StrobePosition_6 = 2 /**< \brief Sample count 6 for strobing */
344 } IfxEray_StrobePosition;
345
346 /** \brief OCDS Suspend Control (OCDS.SUS)
347 */
348 typedef enum
349 {
350 IfxEray_SuspendMode_none = 0, /**< \brief No suspend */
351 IfxEray_SuspendMode_hard = 1, /**< \brief Hard Suspend */
352 IfxEray_SuspendMode_soft = 2 /**< \brief Soft Suspend */
353 } IfxEray_SuspendMode;
354
355 /** \brief Transmission mode of Header, defined in MODULE_ERAY0.WRHS1.B.TXM.
356 */
357 typedef enum
358 {
359 IfxEray_TransmissionMode_continuous = 0, /**< \brief continuos transmission mode */
360 IfxEray_TransmissionMode_singleShot = 1 /**< \brief single transmission mode */
361 } IfxEray_TransmissionMode;
362
363 /** \brief Initial transmission mode, defined in MODULE_ERAY0.SUCC1.B.TSM.
364 */
365 typedef enum
366 {
367 IfxEray_TransmissionSlotMode_all = 0, /**< \brief transmission in all slots. */
368 IfxEray_TransmissionSlotMode_single = 1 /**< \brief transmission in key slot. */
369 } IfxEray_TransmissionSlotMode;
370
371 /** \brief Wakeup pattern carry channel, defined in MODULE_ERAY0.SUCC1.B.WUCS.
372 */
373 typedef enum
374 {
375 IfxEray_WakeupChannel_a = 0, /**< \brief send wakeup channel pattern on channel A */
376 IfxEray_WakeupChannel_b = 1 /**< \brief send wakeup channel pattern on channel B */
377 } IfxEray_WakeupChannel;
378
379 /** \} */
380
381 /******************************************************************************/
382 /*-----------------------------Data Structures--------------------------------*/
383 /******************************************************************************/
384
385 /** \addtogroup IfxLld_Eray_Std_Structures
386 * \{ */
387 /** \brief Header section in a frame.
388 */
389 typedef struct
390 {
391 uint16 frameId; /**< \brief slot ID of the selected Message Buffer. */
392 uint8 cycleCode; /**< \brief the cycle set used for cycle counter filtering. */
393 boolean channelAFiltered; /**< \brief channel A serves as a control for transmit and filter for receive buffers. */
394 boolean channelBFiltered; /**< \brief channel B serves as a control for transmit and filter for receive buffers. */
395 IfxEray_BufferDirection bufferDirection; /**< \brief selects buffer as a transmit buffer or as a receive buffer. */
396 boolean transmitPayloadIndicatior; /**< \brief weather payload indicator is set or not. */
397 IfxEray_TransmissionMode transmissionMode; /**< \brief transmission mode of Header. */
398 boolean bufferServiceEnabled; /**< \brief wether buffer service request is enabled or not. */
399 uint8 payloadLength; /**< \brief length of data section. */
400 uint16 dataPointer; /**< \brief pointer to the data section of message buffer in RAM. */
401 boolean startupFrameIndicator; /**< \brief whether startup frame is indicated or not. */
402 boolean syncFrameIndicator; /**< \brief whether sync frame is indicated or not. */
403 } IfxEray_Header;
404
405 /** \brief Received header in a frame.
406 */
407 typedef struct
408 {
409 uint16 frameId : 11; /**< \brief received frame id. */
410 uint8 payloadLength : 7; /**< \brief received payload length. */
411 uint16 headerCrc : 11; /**< \brief received header crc. */
412 uint8 nullFrameIndicator : 1; /**< \brief 0 : no data frame received; 1: atleast one data frame received. */
413 uint8 syncFrame : 1; /**< \brief 0 : received frame is not a synch frame ; 1 : receive frame is a synch frame. */
414 uint8 startupFrame : 1; /**< \brief 0 : received frame is not a startup frame ; 1 : receive frame is a startup frame. */
415 uint8 cycleNumber : 7; /**< \brief cycle number in which frame is received. */
416 uint8 payloadPreambleIndicator : 1; /**< \brief 1 : received payload segment has network management and message id or not; 0 : It hasn't. */
417 } IfxEray_ReceivedHeader;
418
419 /** \brief Transmit control structure.
420 */
421 typedef struct
422 {
423 boolean headerTransfered; /**< \brief whether header is transfered from input buffers to Message RAM or not. */
424 boolean dataTransfered; /**< \brief whether data is transfered from input buffers to Message RAM or not. */
425 boolean transferRequested; /**< \brief transmit buffer released for transmission or not. */
426 uint8 bufferIndex; /**< \brief buffer index in the Message RAM. */
427 } IfxEray_SlotConfig;
428
429 /** \} */
430
431 /** \addtogroup IfxLld_Eray_Std_Interrupt
432 * \{ */
433
434 /******************************************************************************/
435 /*-------------------------Inline Function Prototypes-------------------------*/
436 /******************************************************************************/
437
438 /** \brief Clears the error flag requested.
439 * \param eray pointer to ERAY module registers.
440 * \param errorFlag error flag to be cleared.
441 * \return None
442 */
443 IFX_INLINE void IfxEray_clearErrorFlag(Ifx_ERAY *eray, IfxEray_ClearErrorFlag errorFlag);
444
445 /** \brief Clears the status flag requested.
446 * \param eray pointer to ERAY module registers.
447 * \param statusFlag status flag to be cleared.
448 * \return None
449 */
450 IFX_INLINE void IfxEray_clearStatusFlag(Ifx_ERAY *eray, IfxEray_ClearStatusFlag statusFlag);
451
452 /** \brief Gets the error interrupt flags.
453 * \param eray pointer to ERAY module registers.
454 * \return error interrupt flags.
455 */
456 IFX_INLINE Ifx_ERAY_EIR IfxEray_getErrorInterrupts(Ifx_ERAY *eray);
457
458 /** \brief Gets the IBUSY service request.
459 * \param eray pointer to ERAY module registers.
460 * \return address of IBUSY service request value.
461 */
462 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getInputBufferBusySrcPtr(Ifx_ERAY *eray);
463
464 /** \brief Gets the INT0 service request.
465 * \param eray pointer to ERAY module registers.
466 * \return address of INT0 service request value.
467 */
468 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getInterruptLine0SrcPtr(Ifx_ERAY *eray);
469
470 /** \brief Gets the INT1 service request.
471 * \param eray pointer to ERAY module registers.
472 * \return address of INT1 service request value.
473 */
474 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getInterruptLine1SrcPtr(Ifx_ERAY *eray);
475
476 /** \brief Gets the message buffers interrupt status.
477 * \param eray pointer to ERAY module registers.
478 * \param messageBuffer message buffer to which interrupt status be checked.
479 * \return message buffer interrupt status.
480 */
481 IFX_INLINE boolean IfxEray_getMessageBufferInterruptStatus(Ifx_ERAY *eray, uint8 messageBuffer);
482
483 /** \brief Gets the MBSC0 service request.
484 * \param eray pointer to ERAY module registers.
485 * \return address of MBSC0 service request value.
486 */
487 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getMessageBufferStatus0SrcPtr(Ifx_ERAY *eray);
488
489 /** \brief Gets the MBSC1 service request.
490 * \param eray pointer to ERAY module registers.
491 * \return address of MBSC1 service request value.
492 */
493 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getMessageBufferStatus1SrcPtr(Ifx_ERAY *eray);
494
495 /** \brief Gets the NDAT0 service request.
496 * \param eray pointer to ERAY module registers.
497 * \return address of NDAT0 service request value.
498 */
499 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getNewDataInterrupt0SrcPtr(Ifx_ERAY *eray);
500
501 /** \brief Gets the NDAT1 service request.
502 * \param eray pointer to ERAY module registers.
503 * \return address of NDAT1 service request value.
504 */
505 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getNewDataInterrupt1SrcPtr(Ifx_ERAY *eray);
506
507 /** \brief Gets the new data interrupt buffers status.
508 * \param eray pointer to ERAY module registers.
509 * \param ndat message buffer number configured to which ndat occurs.
510 * \return ndat interrupt buffer.
511 */
512 IFX_INLINE boolean IfxEray_getNewDataInterruptStatus(Ifx_ERAY *eray, uint8 ndat);
513
514 /** \brief Gets the OBUSY service request.
515 * \param eray pointer to ERAY module registers.
516 * \return address of OBUSY service request value.
517 */
518 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getOutputBufferBusySrcPtr(Ifx_ERAY *eray);
519
520 /** \brief Gets the status interrupt flags.
521 * \param eray pointer to ERAY module registers.
522 * \return status interrupt flags.
523 */
524 IFX_INLINE Ifx_ERAY_SIR IfxEray_getStatusInterrupts(Ifx_ERAY *eray);
525
526 /** \brief Gets the TINT0 service request.
527 * \param eray pointer to ERAY module registers.
528 * \return address of TINT0 service request value.
529 */
530 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getTimerInterrupt0SrcPtr(Ifx_ERAY *eray);
531
532 /** \brief Gets the TINT1 service request.
533 * \param eray pointer to ERAY module registers.
534 * \return address of TINT1 service request value.
535 */
536 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getTimerInterrupt1SrcPtr(Ifx_ERAY *eray);
537
538 /******************************************************************************/
539 /*-------------------------Global Function Prototypes-------------------------*/
540 /******************************************************************************/
541
542 /** \brief Clears all the error flags.
543 * \param eray pointer to ERAY module registers.
544 * \return None
545 */
546 IFX_EXTERN void IfxEray_clearAllFlags(Ifx_ERAY *eray);
547
548 /** \brief Enables all the Interrupt lines.
549 * \param eray pointer to ERAY module registers.
550 * \return None
551 */
552 IFX_EXTERN void IfxEray_enableInterruptLines(Ifx_ERAY *eray);
553
554 /** \brief Selects between MBSC0 and MBSC1 interrupt destination
555 * \param eray pointer to ERAY module registers.
556 * \param messageBuffer message buffer interrupt which should be configured
557 * \param messageBufferDestination selects MBSC0 or MBSC1 interrupt output
558 * \return None
559 */
560 IFX_EXTERN void IfxEray_setMessageBufferInterruptDestination(Ifx_ERAY *eray, uint8 messageBuffer, uint8 messageBufferDestination);
561
562 /** \brief Selects between NDAT0 and NDAT1 interrupt destination
563 * \param eray pointer to ERAY module registers.
564 * \param ndat NDAT interrupt which should be configured
565 * \param ndatDestination selects NDAT0 or NDAT1 interrupt output
566 * \return None
567 */
568 IFX_EXTERN void IfxEray_setNewDataInterruptDestination(Ifx_ERAY *eray, uint8 ndat, uint8 ndatDestination);
569
570 /** \} */
571
572 /** \addtogroup IfxLld_Eray_Std_IO
573 * \{ */
574
575 /******************************************************************************/
576 /*-------------------------Inline Function Prototypes-------------------------*/
577 /******************************************************************************/
578
579 /** \brief Initialises a RX pin.
580 * \param rx the RX Pin which should be configured.
581 * \param rxMode the pin input mode which should be configured.
582 * \return None
583 */
584 IFX_INLINE void IfxEray_initRxPin(const IfxEray_Rxd_In *rx, IfxPort_InputMode rxMode);
585
586 /** \brief Initializes a TX Enable output.
587 * \param txEn the TX Enable Pin which should be configured.
588 * \param txEnMode the pin output mode which should be configured.
589 * \param padDriver the pad driver mode which should be configured.
590 * \return None
591 */
592 IFX_INLINE void IfxEray_initTxEnPin(const IfxEray_Txen_Out *txEn, IfxPort_OutputMode txEnMode, IfxPort_PadDriver padDriver);
593
594 /** \brief Initializes a TX output.
595 * \param tx the TX Pin which should be configured.
596 * \param txMode the pin output mode which should be configured.
597 * \param padDriver the pad driver mode which should be configured.
598 * \return None
599 */
600 IFX_INLINE void IfxEray_initTxPin(const IfxEray_Txd_Out *tx, IfxPort_OutputMode txMode, IfxPort_PadDriver padDriver);
601
602 /** \} */
603
604 /** \addtogroup IfxLld_Eray_Std_Module
605 * \{ */
606
607 /******************************************************************************/
608 /*-------------------------Inline Function Prototypes-------------------------*/
609 /******************************************************************************/
610
611 /** \brief Disables the ERAY module.
612 * \param eray pointer to ERAY module registers.
613 * \return None
614 */
615 IFX_INLINE void IfxEray_disableModule(Ifx_ERAY *eray);
616
617 /** \brief Enables the ERAY module.
618 * \param eray pointer to ERAY module registers.
619 * \return None
620 */
621 IFX_INLINE void IfxEray_enableModule(Ifx_ERAY *eray);
622
623 /** \brief Returns the module's suspend state.
624 * TRUE :if module is suspended.
625 * FALSE:if module is not yet suspended.
626 * \param eray Pointer to ERAY module registers
627 * \return Suspend status (TRUE / FALSE)
628 */
629 IFX_INLINE boolean IfxEray_isModuleSuspended(Ifx_ERAY *eray);
630
631 /** \brief Sets the sensitivity of the module to sleep signal
632 * \param eray pointer to ERAY registers
633 * \param mode mode selection (enable/disable)
634 * \return None
635 */
636 IFX_INLINE void IfxEray_setSleepMode(Ifx_ERAY *eray, IfxEray_SleepMode mode);
637
638 /******************************************************************************/
639 /*-------------------------Global Function Prototypes-------------------------*/
640 /******************************************************************************/
641
642 /**
643 * \param eray Resource index of the ERAY
644 * \return ERAY module register address
645 */
646 IFX_EXTERN Ifx_ERAY *IfxEray_getAddress(IfxEray_Index eray);
647
648 /** \brief API to get the resource index of the ERAY specified.
649 * \param eray Pointer to the ERAY HW module (register memory map)
650 * \return Resource index of the ERAY
651 */
652 IFX_EXTERN IfxEray_Index IfxEray_getIndex(Ifx_ERAY *eray);
653
654 /** \brief Resets the ERAY kernel.
655 * \param eray pointer to ERAY module registers.
656 * \return None
657 */
658 IFX_EXTERN void IfxEray_resetModule(Ifx_ERAY *eray);
659
660 /** \} */
661
662 /** \addtogroup IfxLld_Eray_Std_Status
663 * \{ */
664
665 /******************************************************************************/
666 /*-------------------------Inline Function Prototypes-------------------------*/
667 /******************************************************************************/
668
669 /** \brief Gets the FIFO status.
670 * \param eray pointer to ERAY module registers.
671 * \return FIFO status.
672 */
673 IFX_INLINE Ifx_ERAY_FSR IfxEray_getFifoStatus(Ifx_ERAY *eray);
674
675 /** \brief Gets the Input Buffer Host Busy status.
676 * \param eray pointer to ERAY module registers.
677 * \return TRUE if Host is Busy otherwise FALSE.
678 */
679 IFX_INLINE boolean IfxEray_getInputBufferBusyHostStatus(Ifx_ERAY *eray);
680
681 /** \brief Gets the Input Buffer Shadow status.
682 * \param eray pointer to ERAY module registers.
683 * \return TRUE if busy otherwise FALSE
684 */
685 IFX_INLINE uint8 IfxEray_getInputBufferBusyShadowStatus(Ifx_ERAY *eray);
686
687 /** \brief Gets the output buffer index.
688 * \param eray pointer to ERAY module registers.
689 * \return output buffer index.
690 */
691 IFX_INLINE uint8 IfxEray_getOutputBuffer(Ifx_ERAY *eray);
692
693 /** \brief Gets the Output Buffer Shadow status.
694 * \param eray pointer to ERAY module registers.
695 * \return TRUE if busy otherwise FALSE
696 */
697 IFX_INLINE boolean IfxEray_getOutputBufferBusyShadowStatus(Ifx_ERAY *eray);
698
699 /** \brief Gets the current POC state.
700 * \param eray pointer to ERAY module registers.
701 * \return current POC state.
702 */
703 IFX_INLINE IfxEray_PocState IfxEray_getPocState(Ifx_ERAY *eray);
704
705 /** \brief Gets the received wakeup pattern channel.
706 * \param eray pointer to ERAY module registers.
707 * \return received wakeup pattern channel.
708 */
709 IFX_INLINE IfxEray_WakeupChannel IfxEray_getWakeupPatternReceivedChannel(Ifx_ERAY *eray);
710
711 /** \brief Waits until the controller enters required POC state.
712 * \param eray pointer to ERAY module registers.
713 * \param pocState POC state upto which controller waits.
714 * \return None
715 */
716 IFX_INLINE void IfxEray_waitForPocState(Ifx_ERAY *eray, IfxEray_PocState pocState);
717
718 /******************************************************************************/
719 /*-------------------------Global Function Prototypes-------------------------*/
720 /******************************************************************************/
721
722 /** \brief Changes the Commmunication Controller state.
723 * \param eray pointer to ERAY module registers.
724 * \param pocCommand POC command which triggers the Controller state.
725 * \return TRUE if command accepted otherwise FALSE.
726 */
727 IFX_EXTERN boolean IfxEray_changePocState(Ifx_ERAY *eray, IfxEray_PocCommand pocCommand);
728
729 /** \brief Sets the POC state to Ready state.
730 * \param eray pointer to ERAY module registers.
731 * \return None
732 */
733 IFX_EXTERN void IfxEray_setPocReady(Ifx_ERAY *eray);
734
735 /** \} */
736
737 /** \addtogroup IfxLld_Eray_Std_Configuration
738 * \{ */
739
740 /******************************************************************************/
741 /*-------------------------Inline Function Prototypes-------------------------*/
742 /******************************************************************************/
743
744 /** \brief request to receive header section from message buffer.
745 * \param eray pointer to ERAY module registers.
746 * \param headerReceived whether header is received or not.
747 * \return None
748 */
749 IFX_INLINE void IfxEray_receiveHeader(Ifx_ERAY *eray, boolean headerReceived);
750
751 /** \brief sets the bit to send header in frame.
752 * \param eray pointer to ERAY module registers.
753 * \param headerTransfered whether header transfered or not.
754 * \return None
755 */
756 IFX_INLINE void IfxEray_sendHeader(Ifx_ERAY *eray, boolean headerTransfered);
757
758 /** \brief Sets number of cycle pairs for Active state.
759 * \param eray pointer to ERAY module registers.
760 * \param numberOfCyclePairsForActive number of cycle pairs for Active state.
761 * \return None
762 */
763 IFX_INLINE void IfxEray_setActiveCyclePairs(Ifx_ERAY *eray, uint8 numberOfCyclePairsForActive);
764
765 /** \brief Sets auto delays between input, output buffers and message RAM
766 * \param eray pointer to ERAY module registers.
767 * \return None
768 */
769 IFX_INLINE void IfxEray_setAutoDelayBuffers(Ifx_ERAY *eray);
770
771 /** \brief Sets baudrate on Flexray bus.
772 * \param eray pointer to ERAY module registers.
773 * \param baudrate baudrate on flexray bus.
774 * \return None
775 */
776 IFX_INLINE void IfxEray_setBaudrate(Ifx_ERAY *eray, IfxEray_Baudrate baudrate);
777
778 /** \brief Sets secured buffers in message RAM.
779 * \param eray pointer to ERAY module registers.
780 * \param secureValue secure value.
781 * \return None
782 */
783 IFX_INLINE void IfxEray_setBufferReconfigSecure(Ifx_ERAY *eray, uint8 secureValue);
784
785 /** \brief Sets channel A initial offstes.
786 * \param eray pointer to ERAY module registers.
787 * \param channelAMicrotickInitialOffset difference between reference points on channel A in microticks.
788 * \param channelAMacrotickInitialOffset difference between reference points on channel A in macroticks.
789 * \return None
790 */
791 IFX_INLINE void IfxEray_setChannelAInitialOffsets(Ifx_ERAY *eray, uint8 channelAMicrotickInitialOffset, uint8 channelAMacrotickInitialOffset);
792
793 /** \brief Sets channel B initial offstes.
794 * \param eray pointer to ERAY module registers.
795 * \param channelBMicrotickInitialOffset difference between reference points on channel B in microticks.
796 * \param channelBMacrotickInitialOffset difference between reference points on channel B in macroticks.
797 * \return None
798 */
799 IFX_INLINE void IfxEray_setChannelBInitialOffsets(Ifx_ERAY *eray, uint8 channelBMicrotickInitialOffset, uint8 channelBMacrotickInitialOffset);
800
801 /** \brief Sets receive delays on channels.
802 * \param eray pointer to ERAY module registers.
803 * \param channelAReceptionDelay reception delay on channel A.
804 * \param channelBReceptionDelay reception delay on channel B.
805 * \return None
806 */
807 IFX_INLINE void IfxEray_setChannelsReceiveDelay(Ifx_ERAY *eray, uint8 channelAReceptionDelay, uint8 channelBReceptionDelay);
808
809 /** \brief Sets clock correction cycles for Passive and Halt.
810 * \param eray pointer to ERAY module registers.
811 * \param clockCorrectionCyclesPassive maximum number of cycles missing clock correction leading for passive state.
812 * \param clockCorrectionCyclesHalt maximum number of cycles missing clock correction leading for halt state.
813 * \return None
814 */
815 IFX_INLINE void IfxEray_setClockCorrectionCycles(Ifx_ERAY *eray, uint8 clockCorrectionCyclesPassive, uint8 clockCorrectionCyclesHalt);
816
817 /** \brief lead to halt state in clock synch error.
818 * \param eray pointer to ERAY module registers.
819 * \param clockSyncErrorHalt whether to enter halt in clock synch error or not.
820 * \return None
821 */
822 IFX_INLINE void IfxEray_setClockSynchErrorHalt(Ifx_ERAY *eray, boolean clockSyncErrorHalt);
823
824 /** \brief Sets cluster drift values.
825 * \param eray pointer to ERAY module registers.
826 * \param clusterDrift cluster drift damping value used in clock synchronization.
827 * \param maxDriftOffset maximum drift offset between two nodes.
828 * \return None
829 */
830 IFX_INLINE void IfxEray_setClusterDriftValues(Ifx_ERAY *eray, uint8 clusterDrift, uint16 maxDriftOffset);
831
832 /** \brief Sets cluster startup deviation.
833 * \param eray pointer to ERAY module registers.
834 * \param acceptedStartupDeviation deviation for startup Frames during integration.
835 * \return None
836 */
837 IFX_INLINE void IfxEray_setClusterStartupDeviation(Ifx_ERAY *eray, uint16 acceptedStartupDeviation);
838
839 /** \brief Sets CAS symbol window duration.
840 * \param eray pointer to ERAY module registers.
841 * \param collisionAvoidanceDuration accepted duration of CAS symbol.
842 * \return None
843 */
844 IFX_INLINE void IfxEray_setCollisionAvoidanceDuration(Ifx_ERAY *eray, uint8 collisionAvoidanceDuration);
845
846 /** \brief sets duration of the communication cycle in Macroticks.
847 * \param eray pointer to ERAY module registers.
848 * \param macroticks duration of the communication cycle in Macroticks.
849 * \return None
850 */
851 IFX_INLINE void IfxEray_setCycleDurationMacroticks(Ifx_ERAY *eray, uint16 macroticks);
852
853 /** \brief sets duration of the communication cycle in Microticks.
854 * \param eray pointer to ERAY module registers.
855 * \param microticks duration of the communication cycle in Microticks.
856 * \return None
857 */
858 IFX_INLINE void IfxEray_setCycleDurationMicroticks(Ifx_ERAY *eray, uint32 microticks);
859
860 /** \brief Sets decoding correction value.
861 * \param eray pointer to ERAY module registers.
862 * \param decodingCorrection decoding correction value.
863 * \return None
864 */
865 IFX_INLINE void IfxEray_setDecodingCorrectionValue(Ifx_ERAY *eray, uint8 decodingCorrection);
866
867 /** \brief Sets dynamic slots count and length.
868 * \param eray pointer to ERAY module registers.
869 * \param dynamicSlotLength duration of dynamic slot in macroticks.
870 * \param dynamicSlotCount number of dynamic slots in a communication cycle.
871 * \param idleDynamicSlots duration of dynamic slot idle phase.
872 * \return None
873 */
874 IFX_INLINE void IfxEray_setDynamicSlots(Ifx_ERAY *eray, uint8 dynamicSlotLength, uint16 dynamicSlotCount, IfxEray_IdleDynamicSlots idleDynamicSlots);
875
876 /** \brief Sets external correction controls.
877 * \param eray pointer to ERAY module registers.
878 * \param externalOffset External offset correction control.
879 * \param externalRate External rate correction control.
880 * \return None
881 */
882 IFX_INLINE void IfxEray_setExternalCorrectionControl(Ifx_ERAY *eray, IfxEray_ExternalOffset externalOffset, IfxEray_ExternalRate externalRate);
883
884 /** \brief Sets external correction values.
885 * \param eray pointer to ERAY module registers.
886 * \param externalOffsetCorrection external clock offset correction value.
887 * \param externalRateCorrection external clock rate correction value.
888 * \return None
889 */
890 IFX_INLINE void IfxEray_setExternalCorrectionValues(Ifx_ERAY *eray, IfxEray_ExternalOffsetCorrection externalOffsetCorrection, IfxEray_ExternalRateCorrection externalRateCorrection);
891
892 /** \brief Sets FIFO buffer start idex.
893 * \param eray pointer to ERAY module registers.
894 * \param fifoBufferStartIndex FIFO buffer start idex.
895 * \return None
896 */
897 IFX_INLINE void IfxEray_setFifoBufferStartIndex(Ifx_ERAY *eray, uint8 fifoBufferStartIndex);
898
899 /** \brief Sets FIFO filter configurations.
900 * \param eray pointer to ERAY module registers.
901 * \param rejectedFrameId rejected frameId by FIFO.
902 * \param filteredCycleNumber filtered cycle number.
903 * \param fifoNullFramesRejected null frames rejection selection.
904 * \param frameIdFilter filtered frameid by FIFO.
905 * \return None
906 */
907 IFX_INLINE void IfxEray_setFifoFilterConfigurations(Ifx_ERAY *eray, uint16 rejectedFrameId, uint8 filteredCycleNumber, boolean fifoNullFramesRejected, uint16 frameIdFilter);
908
909 /** \brief Sets FIFO configurations.
910 * \param eray pointer to ERAY module registers.
911 * \param receiveChannel FIFO receive channel.
912 * \param staticFifoDisabled static FIFO selection.
913 * \param fifoDepth FIFO depth.
914 * \return None
915 */
916 IFX_INLINE void IfxEray_setFifoMessageBufferConfigurations(Ifx_ERAY *eray, IfxEray_ReceiveChannel receiveChannel, boolean staticFifoDisabled, uint8 fifoDepth);
917
918 /** \brief Sets first dynamic buffer.
919 * \param eray pointer to ERAY module registers.
920 * \param firstDynamicBuffer first dynamic buffer.
921 * \return None
922 */
923 IFX_INLINE void IfxEray_setFirstDynamicBuffer(Ifx_ERAY *eray, uint8 firstDynamicBuffer);
924
925 /** \brief Sets startup or wakeup listen timeouts.
926 * \param eray pointer to ERAY module registers.
927 * \param listenTimeOut wakeup or startup listen timeout in microticks.
928 * \param listenTimeOutNoise upper limit for startup or wakeup listen timeout in presence of noise.
929 * \return None
930 */
931 IFX_INLINE void IfxEray_setListenTimeOuts(Ifx_ERAY *eray, uint32 listenTimeOut, IfxEray_ListenTimeOutNoise listenTimeOutNoise);
932
933 /** \brief Sets the maximum cold start attempts for active state.
934 * \param eray pointer to ERAY module registers.
935 * \param maxColdStartAttempts maximum number of attempts that a cold start node allows.
936 * \return None
937 */
938 IFX_INLINE void IfxEray_setMaxColdStartAttempts(Ifx_ERAY *eray, uint8 maxColdStartAttempts);
939
940 /** \brief Sets max limit correction values.
941 * \param eray pointer to ERAY module registers.
942 * \param maxOffsetCorrection maximum offset correction.
943 * \param maxRateCorrection maximum rate correction.
944 * \return None
945 */
946 IFX_INLINE void IfxEray_setMaxCorrectionValues(Ifx_ERAY *eray, uint16 maxOffsetCorrection, uint16 maxRateCorrection);
947
948 /** \brief Sets maximum synch frames in a cluster.
949 * \param eray pointer to ERAY module registers.
950 * \param maxSyncFrames maximum synch frames in a cluster.
951 * \return None
952 */
953 IFX_INLINE void IfxEray_setMaxSynchFrames(Ifx_ERAY *eray, IfxEray_MaxSynchFrames maxSyncFrames);
954
955 /** \brief Sets number of message buffers.
956 * \param eray pointer to ERAY module registers.
957 * \param numberOfMessageBuffers number of message buffers.
958 * \return None
959 */
960 IFX_INLINE void IfxEray_setMessageBufferCount(Ifx_ERAY *eray, uint8 numberOfMessageBuffers);
961
962 /** \brief Sets Message Handler configurations.
963 * \param eray pointer to ERAY module registers.
964 * \param staticFramepayload payload length of static frames in double bytes.
965 * \param latestTransmissionStart dynamic slots befor transmission of inhibit frame in dynamic segment.
966 * \return None
967 */
968 IFX_INLINE void IfxEray_setMessageHandlerConfigurations(Ifx_ERAY *eray, uint8 staticFramepayload, uint8 latestTransmissionStart);
969
970 /** \brief Sets network start Idle time.
971 * \param eray pointer to ERAY module registers.
972 * \param networkStartIdleTime starting point of Network Idle Time Phase.
973 * \return None
974 */
975 IFX_INLINE void IfxEray_setNetworkStartIdleTime(Ifx_ERAY *eray, uint16 networkStartIdleTime);
976
977 /** \brief Sets network management vector length.
978 * \param eray pointer to ERAY module registers.
979 * \param networkVectorLength length of network management vector.
980 * \return None
981 */
982 IFX_INLINE void IfxEray_setNetworkVectorLength(Ifx_ERAY *eray, uint32 networkVectorLength);
983
984 /** \brief Sets channels connected to node.
985 * \param eray pointer to ERAY module registers.
986 * \param channelAConnectedNode whether node connected to channel A or not.
987 * \param channelBConnectedNode whether node connected to channel B or not.
988 * \return None
989 */
990 IFX_INLINE void IfxEray_setNodeChannels(Ifx_ERAY *eray, boolean channelAConnectedNode, boolean channelBConnectedNode);
991
992 /** \brief Sets offset correction starting point.
993 * \param eray pointer to ERAY module registers.
994 * \param correctionOffset offset correction start point.
995 * \return None
996 */
997 IFX_INLINE void IfxEray_setOffsetCorrection(Ifx_ERAY *eray, uint16 correctionOffset);
998
999 /** \brief requests to receive the frame.
1000 * \param eray pointer to ERAY module registers.
1001 * \param receiveRequested whether frame to be received or not.
1002 * \return None
1003 */
1004 IFX_INLINE void IfxEray_setReceiveRequest(Ifx_ERAY *eray, boolean receiveRequested);
1005
1006 /** \brief Sets receive wakeup times.
1007 * \param eray pointer to ERAY module registers.
1008 * \param receiveWakeupTestDuration duration of receive wakeup pattern.
1009 * \param receiveWakeupIdleTime duration of receive wakeup idle time.
1010 * \param receiveWakeupLowTime duration of receive wakeup low time.
1011 * \return None
1012 */
1013 IFX_INLINE void IfxEray_setReceiveWakeupTimes(Ifx_ERAY *eray, uint16 receiveWakeupTestDuration, uint8 receiveWakeupIdleTime, uint8 receiveWakeupLowTime);
1014
1015 /** \brief sets buffer number in which frame is received.
1016 * \param eray pointer to ERAY module registers.
1017 * \param bufferIndex buffer number in which frame is received.
1018 * \return None
1019 */
1020 IFX_INLINE void IfxEray_setRxBufferNumber(Ifx_ERAY *eray, uint8 bufferIndex);
1021
1022 /** \brief Sets slots action points.
1023 * \param eray pointer to ERAY module registers.
1024 * \param staticActionPoint static slots and symbol window action point.
1025 * \param dynamicActionPoint dynamic slots action point.
1026 * \return None
1027 */
1028 IFX_INLINE void IfxEray_setSlotActionPoints(Ifx_ERAY *eray, uint8 staticActionPoint, uint8 dynamicActionPoint);
1029
1030 /** \brief Sets static slots count and length.
1031 * \param eray pointer to ERAY module registers.
1032 * \param staticSlotLength duration of static slot in macroticks.
1033 * \param staticSlotsCount number of static slots in a communication cycle.
1034 * \return None
1035 */
1036 IFX_INLINE void IfxEray_setStaticSlots(Ifx_ERAY *eray, uint16 staticSlotLength, uint16 staticSlotsCount);
1037
1038 /** \brief Sets sample point for strobing.
1039 * \param eray pointer to ERAY module registers.
1040 * \param strobePosition strobing sample count.
1041 * \return None
1042 */
1043 IFX_INLINE void IfxEray_setStrobePosition(Ifx_ERAY *eray, IfxEray_StrobePosition strobePosition);
1044
1045 /** \brief Sets channels which transmits symbols.
1046 * \param eray pointer to ERAY module registers.
1047 * \param channelASymbolTransmitted whether symbol is transmitted in Channel A or not.
1048 * \param channelBSymbolTransmitted whether symbol is transmitted in Channel B or not.
1049 * \return None
1050 */
1051 IFX_INLINE void IfxEray_setSymbolChannels(Ifx_ERAY *eray, boolean channelASymbolTransmitted, boolean channelBSymbolTransmitted);
1052
1053 /** \brief Sets the transmit slot mode.
1054 * \param eray pointer to ERAY module registers.
1055 * \param transmissionSlotMode transmission slot mode.
1056 * \return None
1057 */
1058 IFX_INLINE void IfxEray_setTransmissionSlotMode(Ifx_ERAY *eray, IfxEray_TransmissionSlotMode transmissionSlotMode);
1059
1060 /** \brief Sets transmission start time duration.
1061 * \param eray pointer to ERAY module registers.
1062 * \param transmissionStartTime transmission start time.
1063 * \return None
1064 */
1065 IFX_INLINE void IfxEray_setTransmissionStartTime(Ifx_ERAY *eray, uint8 transmissionStartTime);
1066
1067 /** \brief Sets transfer request to send frame.
1068 * \param eray pointer to ERAY module registers.
1069 * \param transferRequested whether transfer requested or not.
1070 * \return None
1071 */
1072 IFX_INLINE void IfxEray_setTransmitRequest(Ifx_ERAY *eray, boolean transferRequested);
1073
1074 /** \brief Sets transmit wakeup times.
1075 * \param eray pointer to ERAY module registers.
1076 * \param transmitWakeupRepetitions transmission wakeup repetitions.
1077 * \param transmitWakeupIdleTime duration of transmit wakeup idle time.
1078 * \param transmitWakeupLowTime duration of transmit wakeup low time.
1079 * \return None
1080 */
1081 IFX_INLINE void IfxEray_setTransmitWakeupTimes(Ifx_ERAY *eray, uint8 transmitWakeupRepetitions, uint8 transmitWakeupIdleTime, uint8 transmitWakeupLowTime);
1082
1083 /** \brief Configures transmitted frames for startup and synchronization.
1084 * \param eray pointer to ERAY module registers.
1085 * \param startupFrameTransmitted whether startup Frame transmitted or not.
1086 * \param synchFrameTransmitted whether synch Frame transmitted or not.
1087 * \return None
1088 */
1089 IFX_INLINE void IfxEray_setTransmittedFrames(Ifx_ERAY *eray, boolean startupFrameTransmitted, boolean synchFrameTransmitted);
1090
1091 /** \brief Sets the transmit buffer number.
1092 * \param eray pointer to ERAY module registers.
1093 * \param bufferIndex buffer number in which frame is sent.
1094 * \return None
1095 */
1096 IFX_INLINE void IfxEray_setTxBufferNumber(Ifx_ERAY *eray, uint8 bufferIndex);
1097
1098 /** \brief Swaps the shadow and Host output registers.
1099 * \param eray pointer to ERAY module registers.
1100 * \param swapRequested whether swap is requested or not.
1101 * \return None
1102 */
1103 IFX_INLINE void IfxEray_setViewData(Ifx_ERAY *eray, boolean swapRequested);
1104
1105 /** \brief Sets the cluster wakeup channel.
1106 * \param eray pointer to ERAY module registers.
1107 * \param wakeupPatternChannel cluster wakeup pattern channel.
1108 * \return None
1109 */
1110 IFX_INLINE void IfxEray_setWakeupPatternChannel(Ifx_ERAY *eray, IfxEray_WakeupChannel wakeupPatternChannel);
1111
1112 /** \} */
1113
1114 /** \addtogroup IfxLld_Eray_Std_Operative
1115 * \{ */
1116
1117 /******************************************************************************/
1118 /*-------------------------Inline Function Prototypes-------------------------*/
1119 /******************************************************************************/
1120
1121 /** \brief requests to receive data from message buffer.
1122 * \param eray pointer to ERAY module registers.
1123 * \param dataReceived whether data to be received or not.
1124 * \return None
1125 */
1126 IFX_INLINE void IfxEray_receiveData(Ifx_ERAY *eray, boolean dataReceived);
1127
1128 /** \brief sets the bit to send data in frame.
1129 * \param eray pointer to ERAY module registers.
1130 * \param dataTransfered whether data transfered or not.
1131 * \return None
1132 */
1133 IFX_INLINE void IfxEray_sendData(Ifx_ERAY *eray, boolean dataTransfered);
1134
1135 /******************************************************************************/
1136 /*-------------------------Global Function Prototypes-------------------------*/
1137 /******************************************************************************/
1138
1139 /** \brief Calculate and returns the CRC for frame.
1140 * \param payloadLength payload length configured for frame.
1141 * \param frameId slot id
1142 * \param startupFrameIndicator whether startup frame is indicated or not.
1143 * \param syncFrameIndicator whether sync frame is indicated or not.
1144 * \return calculated CRC value.
1145 */
1146 IFX_EXTERN uint16 IfxEray_calcHeaderCrc(uint8 payloadLength, uint16 frameId, boolean startupFrameIndicator, boolean syncFrameIndicator);
1147
1148 /** \brief Reads the received data from output registers.
1149 * \param eray pointer to ERAY module registers.
1150 * \param data pointer to received data buffer.
1151 * \param payloadLength payload length received in a frame.
1152 * \return None
1153 */
1154 IFX_EXTERN void IfxEray_readData(Ifx_ERAY *eray, uint32 *data, uint8 payloadLength);
1155
1156 /** \brief Reads header and data from output buffers.
1157 * \param eray pointer to ERAY module registers.
1158 * \param header header received in a frame.
1159 * \param data data received in a frame.
1160 * \param maxPayloadLength maximum payload length received in a frame.
1161 * \return None
1162 */
1163 IFX_EXTERN void IfxEray_readFrame(Ifx_ERAY *eray, IfxEray_ReceivedHeader *header, uint32 *data, Ifx_SizeT maxPayloadLength);
1164
1165 /** \brief Writes header and data to Input buffers and set the slots.
1166 * \param eray pointer to ERAY module registers.
1167 * \param header Header section of message buffer.
1168 * \param data data section of message buffer.
1169 * \param slotConfig pointer slot allocation configuration structure.
1170 * \return None
1171 */
1172 IFX_EXTERN void IfxEray_setSlot(Ifx_ERAY *eray, const IfxEray_Header *header, const uint32 *data, const IfxEray_SlotConfig *slotConfig);
1173
1174 /** \brief Writes data section of a frame to input data registers.
1175 * \param eray pointer to ERAY module registers.
1176 * \param data data segment in a frame.
1177 * \param payloadLength payload length configured for slot buffer.
1178 * \return None
1179 */
1180 IFX_EXTERN void IfxEray_writeData(Ifx_ERAY *eray, const uint32 *data, uint8 payloadLength);
1181
1182 /** \} */
1183
1184 /******************************************************************************/
1185 /*-------------------------Inline Function Prototypes-------------------------*/
1186 /******************************************************************************/
1187
1188 /** \brief Gets the FIFO index.
1189 * \param eray pointer to ERAY module registers.
1190 * \return FIFO buffer index.
1191 */
1192 IFX_INLINE uint8 IfxEray_getFifoIndex(Ifx_ERAY *eray);
1193
1194 /** \brief Configure the Module to Hard/Soft suspend mode.
1195 * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
1196 * \param eray Pointer to ERAY module registers
1197 * \param mode Module suspend mode
1198 * \return None
1199 */
1200 IFX_INLINE void IfxEray_setSuspendMode(Ifx_ERAY *eray, IfxEray_SuspendMode mode);
1201
1202 /** \brief Provides functionality for both setting of pin direction as input and configuring pad driver.
1203 * \param rx the RX Pin which should be configured.
1204 * \param rxMode the pin input mode which should be configured.
1205 * \param padDriver Pad Driver Configuration
1206 * \return None
1207 */
1208 IFX_INLINE void IfxEray_initRxPinWithPadLevel(const IfxEray_Rxd_In *rx, IfxPort_InputMode rxMode, IfxPort_PadDriver padDriver);
1209
1210 /** \brief Provides functionality to select the receiver channel input
1211 * \param eray pointer to ERAY module registers.
1212 * \param nodeId ERAY node id.
1213 * \param select receive channel.
1214 * \return None
1215 */
1216 IFX_INLINE void IfxEray_selectRecieveInput(Ifx_ERAY *eray, IfxEray_NodeId nodeId, Ifx_RxSel select);
1217
1218 /** \brief Provides functionality to provide the command to change the transmit mode.
1219 * \param eray pointer to ERAY module registers.
1220 * \param cmd POC command which triggers the Controller state.
1221 * \return None
1222 */
1223 IFX_INLINE void IfxEray_setPocCommand(Ifx_ERAY *eray, IfxEray_PocCommand cmd);
1224
1225 /** \brief Provides functionality to find out that any CHI command is being executed or not.
1226 * \param eray pointer to ERAY module registers.
1227 * \return status (TRUE / FALSE)
1228 */
1229 IFX_INLINE boolean IfxEray_isRamsCleared(Ifx_ERAY *eray);
1230
1231 /** \brief Provides functionality to check whether POC is busy or not.
1232 * \param eray pointer to ERAY module registers.
1233 * \return status (TRUE / FALSE)
1234 */
1235 IFX_INLINE boolean IfxEray_isPocBusy(Ifx_ERAY *eray);
1236
1237 /** \brief Provides functionality to enble the interrupt lines.
1238 * \param eray pointer to ERAY module registers.
1239 * \param intLine interrupt line.
1240 * \return None
1241 */
1242 IFX_INLINE void IfxEray_enableInterruptLine(Ifx_ERAY *eray, IfxEray_InterruptLine intLine);
1243
1244 /** \brief Provides functionality to enable the transmit interrupt.
1245 * \param eray pointer to ERAY module registers.
1246 * \return None
1247 */
1248 IFX_INLINE void IfxEray_enableTransmitInterrupt(Ifx_ERAY *eray);
1249
1250 /** \brief Provides functionality to enable all the error iterrupts.
1251 * \param eray pointer to ERAY module registers.
1252 * \return None
1253 */
1254 IFX_INLINE void IfxEray_enableAllErrorInterrupts(Ifx_ERAY *eray);
1255
1256 /** \brief Provides functionality to enable the test mode.
1257 * \param eray pointer to ERAY module registers.
1258 * \return None
1259 */
1260 IFX_INLINE void IfxEray_unlockTestModeKey(Ifx_ERAY *eray);
1261
1262 /** \brief Provides functionality to enable write to the test mode registers.
1263 * \param eray pointer to ERAY module registers.
1264 * \return None
1265 */
1266 IFX_INLINE void IfxEray_enableWriteTestRegister(Ifx_ERAY *eray);
1267
1268 /** \brief Provides functionality to enable the external loopback.
1269 * \param eray pointer to ERAY module registers.
1270 * \return None
1271 */
1272 IFX_INLINE void IfxEray_enableExternalLoopback(Ifx_ERAY *eray);
1273
1274 /** \brief Provides functionality to unlock the test mode configuration.
1275 * \param eray pointer to ERAY module registers.
1276 * \return None
1277 */
1278 IFX_INLINE void IfxEray_unlockConfigurationKey(Ifx_ERAY *eray);
1279
1280 /** \brief Provides functionality to configure SUC configuration registers 1.
1281 * \param eray pointer to ERAY module registers.
1282 * \param configValue
1283 * \return None
1284 */
1285 IFX_INLINE void IfxEray_configureSuc1Register(Ifx_ERAY *eray, uint32 configValue);
1286
1287 /** \brief Provides functionality to configure MTCCV register.
1288 * \param eray pointer to ERAY module registers.
1289 * \param tickValue
1290 * \return None
1291 */
1292 IFX_INLINE void IfxEray_setMacroTickValue(Ifx_ERAY *eray, uint32 tickValue);
1293
1294 /******************************************************************************/
1295 /*---------------------Inline Function Implementations------------------------*/
1296 /******************************************************************************/
1297
1298 IFX_INLINE void IfxEray_clearErrorFlag(Ifx_ERAY *eray, IfxEray_ClearErrorFlag errorFlag)
1299 {
1300 eray->EIR.U = errorFlag;
1301 }
1302
1303
1304 IFX_INLINE void IfxEray_clearStatusFlag(Ifx_ERAY *eray, IfxEray_ClearStatusFlag statusFlag)
1305 {
1306 eray->SIR.U = statusFlag;
1307 }
1308
1309
1310 IFX_INLINE void IfxEray_disableModule(Ifx_ERAY *eray)
1311 {
1312 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
1313 IfxScuWdt_clearCpuEndinit(passwd);
1314 //disable the module
1315 eray->CLC.B.DISR = 1;
1316 IfxScuWdt_setCpuEndinit(passwd);
1317 }
1318
1319
1320 IFX_INLINE void IfxEray_enableModule(Ifx_ERAY *eray)
1321 {
1322 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
1323 IfxScuWdt_clearCpuEndinit(passwd);
1324 // Run Mode Clock divider to 1
1325 //enable the module
1326 eray->CLC.U = 0x00000100;
1327
1328 // ensure that write access finished before leaving this function
1329 if (eray->CLC.U)
1330 {}
1331
1332 IfxScuWdt_setCpuEndinit(passwd);
1333 }
1334
1335
1336 IFX_INLINE Ifx_ERAY_EIR IfxEray_getErrorInterrupts(Ifx_ERAY *eray)
1337 {
1338 Ifx_ERAY_EIR interruptFlags;
1339 interruptFlags.U = eray->EIR.U;
1340 return interruptFlags;
1341 }
1342
1343
1344 IFX_INLINE uint8 IfxEray_getFifoIndex(Ifx_ERAY *eray)
1345 {
1346 return eray->MRC.B.FFB;
1347 }
1348
1349
1350 IFX_INLINE Ifx_ERAY_FSR IfxEray_getFifoStatus(Ifx_ERAY *eray)
1351 {
1352 Ifx_ERAY_FSR fifoStatus;
1353 fifoStatus.U = eray->FSR.U;
1354 return fifoStatus;
1355 }
1356
1357
1358 IFX_INLINE boolean IfxEray_getInputBufferBusyHostStatus(Ifx_ERAY *eray)
1359 {
1360 return (eray->IBCR.B.IBSYH == 1) ? TRUE : FALSE;
1361 }
1362
1363
1364 IFX_INLINE uint8 IfxEray_getInputBufferBusyShadowStatus(Ifx_ERAY *eray)
1365 {
1366 return (eray->IBCR.B.IBSYS == 1) ? TRUE : FALSE;
1367 }
1368
1369
1370 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getInputBufferBusySrcPtr(Ifx_ERAY *eray)
1371 {
1372 if (eray == &MODULE_ERAY0)
1373 {
1374 return &MODULE_SRC.ERAY.ERAY[0].IBUSY;
1375 }
1376 else
1377 {
1378 return &MODULE_SRC.ERAY.ERAY[1].IBUSY;
1379 }
1380 }
1381
1382
1383 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getInterruptLine0SrcPtr(Ifx_ERAY *eray)
1384 {
1385 if (eray == &MODULE_ERAY0)
1386 {
1387 return &MODULE_SRC.ERAY.ERAY[0].INT0;
1388 }
1389 else
1390 {
1391 return &MODULE_SRC.ERAY.ERAY[1].INT0;
1392 }
1393 }
1394
1395
1396 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getInterruptLine1SrcPtr(Ifx_ERAY *eray)
1397 {
1398 if (eray == &MODULE_ERAY0)
1399 {
1400 return &MODULE_SRC.ERAY.ERAY[0].INT1;
1401 }
1402 else
1403 {
1404 return &MODULE_SRC.ERAY.ERAY[1].INT1;
1405 }
1406 }
1407
1408
1409 IFX_INLINE boolean IfxEray_getMessageBufferInterruptStatus(Ifx_ERAY *eray, uint8 messageBuffer)
1410 {
1411 uint8 ix = messageBuffer / 32;
1412 uint32 mask = 1 << (messageBuffer % 32);
1413 Ifx_ERAY_MBSC1 *mbscSFR = (Ifx_ERAY_MBSC1 *)((uint32)&eray->MBSC1 + 4 * ix);
1414 boolean messageBufferInterrupt = (mbscSFR->U & mask) ? TRUE : FALSE;
1415
1416 return messageBufferInterrupt;
1417 }
1418
1419
1420 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getMessageBufferStatus0SrcPtr(Ifx_ERAY *eray)
1421 {
1422 if (eray == &MODULE_ERAY0)
1423 {
1424 return &MODULE_SRC.ERAY.ERAY[0].MBSC0;
1425 }
1426 else
1427 {
1428 return &MODULE_SRC.ERAY.ERAY[1].MBSC0;
1429 }
1430 }
1431
1432
1433 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getMessageBufferStatus1SrcPtr(Ifx_ERAY *eray)
1434 {
1435 if (eray == &MODULE_ERAY0)
1436 {
1437 return &MODULE_SRC.ERAY.ERAY[0].MBSC1;
1438 }
1439 else
1440 {
1441 return &MODULE_SRC.ERAY.ERAY[1].MBSC1;
1442 }
1443 }
1444
1445
1446 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getNewDataInterrupt0SrcPtr(Ifx_ERAY *eray)
1447 {
1448 if (eray == &MODULE_ERAY0)
1449 {
1450 return &MODULE_SRC.ERAY.ERAY[0].NDAT0;
1451 }
1452 else
1453 {
1454 return &MODULE_SRC.ERAY.ERAY[1].NDAT0;
1455 }
1456 }
1457
1458
1459 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getNewDataInterrupt1SrcPtr(Ifx_ERAY *eray)
1460 {
1461 if (eray == &MODULE_ERAY0)
1462 {
1463 return &MODULE_SRC.ERAY.ERAY[0].NDAT1;
1464 }
1465 else
1466 {
1467 return &MODULE_SRC.ERAY.ERAY[1].NDAT1;
1468 }
1469 }
1470
1471
1472 IFX_INLINE boolean IfxEray_getNewDataInterruptStatus(Ifx_ERAY *eray, uint8 ndat)
1473 {
1474 uint8 ix = ndat / 32;
1475 uint32 mask = 1 << (ndat % 32);
1476 Ifx_ERAY_NDAT1 *ndatSFR = (Ifx_ERAY_NDAT1 *)((uint32)&eray->NDAT1 + 4 * ix);
1477 boolean ndatInterrupt = (ndatSFR->U & mask) ? TRUE : FALSE;
1478
1479 return ndatInterrupt;
1480 }
1481
1482
1483 IFX_INLINE uint8 IfxEray_getOutputBuffer(Ifx_ERAY *eray)
1484 {
1485 return eray->OBCR.B.OBRH;
1486 }
1487
1488
1489 IFX_INLINE boolean IfxEray_getOutputBufferBusyShadowStatus(Ifx_ERAY *eray)
1490 {
1491 return (eray->OBCR.B.OBSYS == 1) ? TRUE : FALSE;
1492 }
1493
1494
1495 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getOutputBufferBusySrcPtr(Ifx_ERAY *eray)
1496 {
1497 if (eray == &MODULE_ERAY0)
1498 {
1499 return &MODULE_SRC.ERAY.ERAY[0].OBUSY;
1500 }
1501 else
1502 {
1503 return &MODULE_SRC.ERAY.ERAY[1].OBUSY;
1504 }
1505 }
1506
1507
1508 IFX_INLINE IfxEray_PocState IfxEray_getPocState(Ifx_ERAY *eray)
1509 {
1510 return (IfxEray_PocState)eray->CCSV.B.POCS;
1511 }
1512
1513
1514 IFX_INLINE Ifx_ERAY_SIR IfxEray_getStatusInterrupts(Ifx_ERAY *eray)
1515 {
1516 Ifx_ERAY_SIR interruptFlags;
1517 interruptFlags.U = eray->SIR.U;
1518 return interruptFlags;
1519 }
1520
1521
1522 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getTimerInterrupt0SrcPtr(Ifx_ERAY *eray)
1523 {
1524 if (eray == &MODULE_ERAY0)
1525 {
1526 return &MODULE_SRC.ERAY.ERAY[0].TINT0;
1527 }
1528 else
1529 {
1530 return &MODULE_SRC.ERAY.ERAY[1].TINT0;
1531 }
1532 }
1533
1534
1535 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getTimerInterrupt1SrcPtr(Ifx_ERAY *eray)
1536 {
1537 if (eray == &MODULE_ERAY0)
1538 {
1539 return &MODULE_SRC.ERAY.ERAY[0].TINT1;
1540 }
1541 else
1542 {
1543 return &MODULE_SRC.ERAY.ERAY[1].TINT1;
1544 }
1545 }
1546
1547
1548 IFX_INLINE IfxEray_WakeupChannel IfxEray_getWakeupPatternReceivedChannel(Ifx_ERAY *eray)
1549 {
1550 IfxEray_WakeupChannel wakeupChannel = IfxEray_WakeupChannel_a;
1551
1552 if (eray->SIR.B.WUPA == 1)
1553 {
1554 wakeupChannel = IfxEray_WakeupChannel_a;
1555 }
1556 else if (eray->SIR.B.WUPB == 1)
1557 {
1558 wakeupChannel = IfxEray_WakeupChannel_b;
1559 }
1560
1561 return wakeupChannel;
1562 }
1563
1564
1565 IFX_INLINE void IfxEray_initRxPin(const IfxEray_Rxd_In *rx, IfxPort_InputMode rxMode)
1566 {
1567 IfxPort_setPinModeInput(rx->pin.port, rx->pin.pinIndex, rxMode);
1568
1569 if (rx->nodeId == IfxEray_NodeId_a)
1570 {
1571 rx->module->CUST1.B.RISA = rx->select;
1572 }
1573 else
1574 {
1575 rx->module->CUST1.B.RISB = rx->select;
1576 }
1577 }
1578
1579
1580 IFX_INLINE void IfxEray_initTxEnPin(const IfxEray_Txen_Out *txEn, IfxPort_OutputMode txEnMode, IfxPort_PadDriver padDriver)
1581 {
1582 IfxPort_setPinModeOutput(txEn->pin.port, txEn->pin.pinIndex, txEnMode, txEn->select);
1583 IfxPort_setPinPadDriver(txEn->pin.port, txEn->pin.pinIndex, padDriver);
1584 }
1585
1586
1587 IFX_INLINE void IfxEray_initTxPin(const IfxEray_Txd_Out *tx, IfxPort_OutputMode txMode, IfxPort_PadDriver padDriver)
1588 {
1589 IfxPort_setPinModeOutput(tx->pin.port, tx->pin.pinIndex, txMode, tx->select);
1590 IfxPort_setPinPadDriver(tx->pin.port, tx->pin.pinIndex, padDriver);
1591 }
1592
1593
1594 IFX_INLINE boolean IfxEray_isModuleSuspended(Ifx_ERAY *eray)
1595 {
1596 Ifx_ERAY_OCS ocs;
1597
1598 // read the status
1599 ocs.U = eray->OCS.U;
1600
1601 // return the status
1602 return ocs.B.SUSSTA;
1603 }
1604
1605
1606 IFX_INLINE void IfxEray_receiveData(Ifx_ERAY *eray, boolean dataReceived)
1607 {
1608 eray->OBCM.B.RDSS = dataReceived;
1609 }
1610
1611
1612 IFX_INLINE void IfxEray_receiveHeader(Ifx_ERAY *eray, boolean headerReceived)
1613 {
1614 eray->OBCM.B.RHSS = headerReceived;
1615 }
1616
1617
1618 IFX_INLINE void IfxEray_sendData(Ifx_ERAY *eray, boolean dataTransfered)
1619 {
1620 eray->IBCM.B.LDSH = dataTransfered;
1621 }
1622
1623
1624 IFX_INLINE void IfxEray_sendHeader(Ifx_ERAY *eray, boolean headerTransfered)
1625 {
1626 eray->IBCM.B.LHSH = headerTransfered;
1627 }
1628
1629
1630 IFX_INLINE void IfxEray_setActiveCyclePairs(Ifx_ERAY *eray, uint8 numberOfCyclePairsForActive)
1631 {
1632 eray->SUCC1.B.PTA = numberOfCyclePairsForActive;
1633 }
1634
1635
1636 IFX_INLINE void IfxEray_setAutoDelayBuffers(Ifx_ERAY *eray)
1637 {
1638 eray->CUST1.B.IEN = 1;
1639 eray->CUST1.B.OEN = 1;
1640 eray->CUST3.U = 0xFFFFFFFF;
1641 }
1642
1643
1644 IFX_INLINE void IfxEray_setBaudrate(Ifx_ERAY *eray, IfxEray_Baudrate baudrate)
1645 {
1646 eray->PRTC1.B.BRP = baudrate;
1647 }
1648
1649
1650 IFX_INLINE void IfxEray_setBufferReconfigSecure(Ifx_ERAY *eray, uint8 secureValue)
1651 {
1652 eray->MRC.B.SEC = secureValue;
1653 }
1654
1655
1656 IFX_INLINE void IfxEray_setChannelAInitialOffsets(Ifx_ERAY *eray, uint8 channelAMicrotickInitialOffset, uint8 channelAMacrotickInitialOffset)
1657 {
1658 eray->GTUC03.B.UIOA = channelAMicrotickInitialOffset;
1659 eray->GTUC03.B.MIOA = channelAMacrotickInitialOffset;
1660 }
1661
1662
1663 IFX_INLINE void IfxEray_setChannelBInitialOffsets(Ifx_ERAY *eray, uint8 channelBMicrotickInitialOffset, uint8 channelBMacrotickInitialOffset)
1664 {
1665 eray->GTUC03.B.UIOB = channelBMicrotickInitialOffset;
1666 eray->GTUC03.B.MIOB = channelBMacrotickInitialOffset;
1667 }
1668
1669
1670 IFX_INLINE void IfxEray_setChannelsReceiveDelay(Ifx_ERAY *eray, uint8 channelAReceptionDelay, uint8 channelBReceptionDelay)
1671 {
1672 eray->GTUC05.B.DCA = channelAReceptionDelay;
1673 eray->GTUC05.B.DCB = channelBReceptionDelay;
1674 }
1675
1676
1677 IFX_INLINE void IfxEray_setClockCorrectionCycles(Ifx_ERAY *eray, uint8 clockCorrectionCyclesPassive, uint8 clockCorrectionCyclesHalt)
1678 {
1679 Ifx_ERAY_SUCC3 succ3;
1680 succ3.U = 0;
1681 succ3.B.WCP = clockCorrectionCyclesPassive;
1682 succ3.B.WCF = clockCorrectionCyclesHalt;
1683 eray->SUCC3.U = succ3.U;
1684 }
1685
1686
1687 IFX_INLINE void IfxEray_setClockSynchErrorHalt(Ifx_ERAY *eray, boolean clockSyncErrorHalt)
1688 {
1689 eray->SUCC1.B.HCSE = clockSyncErrorHalt;
1690 }
1691
1692
1693 IFX_INLINE void IfxEray_setClusterDriftValues(Ifx_ERAY *eray, uint8 clusterDrift, uint16 maxDriftOffset)
1694 {
1695 eray->GTUC05.B.CDD = clusterDrift;
1696 eray->GTUC06.B.MOD = maxDriftOffset;
1697 }
1698
1699
1700 IFX_INLINE void IfxEray_setClusterStartupDeviation(Ifx_ERAY *eray, uint16 acceptedStartupDeviation)
1701 {
1702 eray->GTUC06.B.ASR = acceptedStartupDeviation;
1703 }
1704
1705
1706 IFX_INLINE void IfxEray_setCollisionAvoidanceDuration(Ifx_ERAY *eray, uint8 collisionAvoidanceDuration)
1707 {
1708 eray->PRTC1.B.CASM = collisionAvoidanceDuration;
1709 }
1710
1711
1712 IFX_INLINE void IfxEray_setCycleDurationMacroticks(Ifx_ERAY *eray, uint16 macroticks)
1713 {
1714 eray->GTUC02.B.MPC = macroticks;
1715 }
1716
1717
1718 IFX_INLINE void IfxEray_setCycleDurationMicroticks(Ifx_ERAY *eray, uint32 microticks)
1719 {
1720 eray->GTUC01.U = microticks;
1721 }
1722
1723
1724 IFX_INLINE void IfxEray_setDecodingCorrectionValue(Ifx_ERAY *eray, uint8 decodingCorrection)
1725 {
1726 eray->GTUC05.B.DEC = decodingCorrection;
1727 }
1728
1729
1730 IFX_INLINE void IfxEray_setDynamicSlots(Ifx_ERAY *eray, uint8 dynamicSlotLength, uint16 dynamicSlotCount, IfxEray_IdleDynamicSlots idleDynamicSlots)
1731 {
1732 eray->GTUC08.B.MSL = dynamicSlotLength;
1733 eray->GTUC08.B.NMS = dynamicSlotCount;
1734 eray->GTUC09.B.DSI = idleDynamicSlots;
1735 }
1736
1737
1738 IFX_INLINE void IfxEray_setExternalCorrectionControl(Ifx_ERAY *eray, IfxEray_ExternalOffset externalOffset, IfxEray_ExternalRate externalRate)
1739 {
1740 eray->GTUC11.B.EOCC = externalOffset;
1741 eray->GTUC11.B.ERCC = externalRate;
1742 }
1743
1744
1745 IFX_INLINE void IfxEray_setExternalCorrectionValues(Ifx_ERAY *eray, IfxEray_ExternalOffsetCorrection externalOffsetCorrection, IfxEray_ExternalRateCorrection externalRateCorrection)
1746 {
1747 eray->GTUC11.B.EOC = externalOffsetCorrection;
1748 eray->GTUC11.B.ERC = externalRateCorrection;
1749 }
1750
1751
1752 IFX_INLINE void IfxEray_setFifoBufferStartIndex(Ifx_ERAY *eray, uint8 fifoBufferStartIndex)
1753 {
1754 // Buffers from MRC.B.FFB to MRC.B.LCB are assigned FIFO
1755 eray->MRC.B.FFB = fifoBufferStartIndex;
1756 }
1757
1758
1759 IFX_INLINE void IfxEray_setFifoFilterConfigurations(Ifx_ERAY *eray, uint16 rejectedFrameId, uint8 filteredCycleNumber, boolean fifoNullFramesRejected, uint16 frameIdFilter)
1760 {
1761 eray->FRF.B.FID = rejectedFrameId;
1762 eray->FRF.B.CYF = filteredCycleNumber;
1763 eray->FRF.B.RNF = fifoNullFramesRejected;
1764 eray->FRFM.B.MFID = frameIdFilter;
1765 }
1766
1767
1768 IFX_INLINE void IfxEray_setFifoMessageBufferConfigurations(Ifx_ERAY *eray, IfxEray_ReceiveChannel receiveChannel, boolean staticFifoDisabled, uint8 fifoDepth)
1769 {
1770 eray->FRF.B.CH = receiveChannel;
1771 eray->FRF.B.RSS = staticFifoDisabled;
1772 eray->FCL.U = fifoDepth;
1773 }
1774
1775
1776 IFX_INLINE void IfxEray_setFirstDynamicBuffer(Ifx_ERAY *eray, uint8 firstDynamicBuffer)
1777 {
1778 // 0: No static bufers, 0x01...0x7F: 0 to (MRC.B.FDB - 1) are static buffers, 0x80...0xFF:No dynamic buffers
1779 eray->MRC.B.FDB = firstDynamicBuffer;
1780 }
1781
1782
1783 IFX_INLINE void IfxEray_setListenTimeOuts(Ifx_ERAY *eray, uint32 listenTimeOut, IfxEray_ListenTimeOutNoise listenTimeOutNoise)
1784 {
1785 Ifx_ERAY_SUCC2 succ2;
1786 succ2.U = 0;
1787 succ2.B.LT = listenTimeOut;
1788 succ2.B.LTN = listenTimeOutNoise;
1789 eray->SUCC2.U = succ2.U;
1790 }
1791
1792
1793 IFX_INLINE void IfxEray_setMaxColdStartAttempts(Ifx_ERAY *eray, uint8 maxColdStartAttempts)
1794 {
1795 eray->SUCC1.B.CSA = maxColdStartAttempts;
1796 }
1797
1798
1799 IFX_INLINE void IfxEray_setMaxCorrectionValues(Ifx_ERAY *eray, uint16 maxOffsetCorrection, uint16 maxRateCorrection)
1800 {
1801 eray->GTUC10.B.MOC = maxOffsetCorrection;
1802 eray->GTUC10.B.MRC = maxRateCorrection;
1803 }
1804
1805
1806 IFX_INLINE void IfxEray_setMaxSynchFrames(Ifx_ERAY *eray, IfxEray_MaxSynchFrames maxSyncFrames)
1807 {
1808 eray->GTUC02.B.SNM = maxSyncFrames;
1809 }
1810
1811
1812 IFX_INLINE void IfxEray_setMessageBufferCount(Ifx_ERAY *eray, uint8 numberOfMessageBuffers)
1813 {
1814 eray->MRC.B.LCB = numberOfMessageBuffers - 1;
1815 }
1816
1817
1818 IFX_INLINE void IfxEray_setMessageHandlerConfigurations(Ifx_ERAY *eray, uint8 staticFramepayload, uint8 latestTransmissionStart)
1819 {
1820 Ifx_ERAY_MHDC mhdc;
1821 mhdc.U = 0;
1822 mhdc.B.SFDL = staticFramepayload;
1823 mhdc.B.SLT = latestTransmissionStart;
1824 eray->MHDC.U = mhdc.U;
1825 }
1826
1827
1828 IFX_INLINE void IfxEray_setNetworkStartIdleTime(Ifx_ERAY *eray, uint16 networkStartIdleTime)
1829 {
1830 eray->GTUC04.B.NIT = networkStartIdleTime;
1831 }
1832
1833
1834 IFX_INLINE void IfxEray_setNetworkVectorLength(Ifx_ERAY *eray, uint32 networkVectorLength)
1835 {
1836 eray->NEMC.U = networkVectorLength;
1837 }
1838
1839
1840 IFX_INLINE void IfxEray_setNodeChannels(Ifx_ERAY *eray, boolean channelAConnectedNode, boolean channelBConnectedNode)
1841 {
1842 eray->SUCC1.B.CCHA = channelAConnectedNode;
1843 eray->SUCC1.B.CCHB = channelBConnectedNode;
1844 }
1845
1846
1847 IFX_INLINE void IfxEray_setOffsetCorrection(Ifx_ERAY *eray, uint16 correctionOffset)
1848 {
1849 eray->GTUC04.B.OCS = correctionOffset;
1850 }
1851
1852
1853 IFX_INLINE void IfxEray_setReceiveRequest(Ifx_ERAY *eray, boolean receiveRequested)
1854 {
1855 eray->OBCR.B.REQ = receiveRequested;
1856 }
1857
1858
1859 IFX_INLINE void IfxEray_setReceiveWakeupTimes(Ifx_ERAY *eray, uint16 receiveWakeupTestDuration, uint8 receiveWakeupIdleTime, uint8 receiveWakeupLowTime)
1860 {
1861 eray->PRTC1.B.RXW = receiveWakeupTestDuration;
1862 eray->PRTC2.B.RXI = receiveWakeupIdleTime;
1863 eray->PRTC2.B.RXL = receiveWakeupLowTime;
1864 }
1865
1866
1867 IFX_INLINE void IfxEray_setRxBufferNumber(Ifx_ERAY *eray, uint8 bufferIndex)
1868 {
1869 eray->OBCR.B.OBRS = bufferIndex;
1870 }
1871
1872
1873 IFX_INLINE void IfxEray_setSleepMode(Ifx_ERAY *eray, IfxEray_SleepMode mode)
1874 {
1875 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
1876 IfxScuWdt_clearCpuEndinit(passwd);
1877 eray->CLC.B.EDIS = mode;
1878 IfxScuWdt_setCpuEndinit(passwd);
1879 }
1880
1881
1882 IFX_INLINE void IfxEray_setSlotActionPoints(Ifx_ERAY *eray, uint8 staticActionPoint, uint8 dynamicActionPoint)
1883 {
1884 eray->GTUC09.B.MAPO = dynamicActionPoint;
1885 eray->GTUC09.B.APO = staticActionPoint;
1886 }
1887
1888
1889 IFX_INLINE void IfxEray_setStaticSlots(Ifx_ERAY *eray, uint16 staticSlotLength, uint16 staticSlotsCount)
1890 {
1891 eray->GTUC07.B.SSL = staticSlotLength;
1892 eray->GTUC07.B.NSS = staticSlotsCount;
1893 }
1894
1895
1896 IFX_INLINE void IfxEray_setStrobePosition(Ifx_ERAY *eray, IfxEray_StrobePosition strobePosition)
1897 {
1898 eray->PRTC1.B.SPP = strobePosition;
1899 }
1900
1901
1902 IFX_INLINE void IfxEray_setSuspendMode(Ifx_ERAY *eray, IfxEray_SuspendMode mode)
1903 {
1904 Ifx_ERAY_OCS ocs;
1905
1906 // remove protection and configure the suspend mode.
1907 ocs.B.SUS_P = 1;
1908 ocs.B.SUS = mode;
1909 eray->OCS.U = ocs.U;
1910 }
1911
1912
1913 IFX_INLINE void IfxEray_setSymbolChannels(Ifx_ERAY *eray, boolean channelASymbolTransmitted, boolean channelBSymbolTransmitted)
1914 {
1915 eray->SUCC1.B.MTSA = channelASymbolTransmitted;
1916 eray->SUCC1.B.MTSB = channelBSymbolTransmitted;
1917 }
1918
1919
1920 IFX_INLINE void IfxEray_setTransmissionSlotMode(Ifx_ERAY *eray, IfxEray_TransmissionSlotMode transmissionSlotMode)
1921 {
1922 eray->SUCC1.B.TSM = transmissionSlotMode;
1923 }
1924
1925
1926 IFX_INLINE void IfxEray_setTransmissionStartTime(Ifx_ERAY *eray, uint8 transmissionStartTime)
1927 {
1928 eray->PRTC1.B.TSST = transmissionStartTime;
1929 }
1930
1931
1932 IFX_INLINE void IfxEray_setTransmitRequest(Ifx_ERAY *eray, boolean transferRequested)
1933 {
1934 eray->IBCM.B.STXRH = transferRequested;
1935 }
1936
1937
1938 IFX_INLINE void IfxEray_setTransmitWakeupTimes(Ifx_ERAY *eray, uint8 transmitWakeupRepetitions, uint8 transmitWakeupIdleTime, uint8 transmitWakeupLowTime)
1939 {
1940 eray->PRTC1.B.RWP = transmitWakeupRepetitions;
1941 eray->PRTC2.B.TXI = transmitWakeupIdleTime;
1942 eray->PRTC2.B.TXL = transmitWakeupLowTime;
1943 }
1944
1945
1946 IFX_INLINE void IfxEray_setTransmittedFrames(Ifx_ERAY *eray, boolean startupFrameTransmitted, boolean synchFrameTransmitted)
1947 {
1948 eray->SUCC1.B.TXST = startupFrameTransmitted;
1949 eray->SUCC1.B.TXSY = synchFrameTransmitted;
1950 }
1951
1952
1953 IFX_INLINE void IfxEray_setTxBufferNumber(Ifx_ERAY *eray, uint8 bufferIndex)
1954 {
1955 eray->IBCR.B.IBRH = bufferIndex;
1956 }
1957
1958
1959 IFX_INLINE void IfxEray_setViewData(Ifx_ERAY *eray, boolean swapRequested)
1960 {
1961 eray->OBCR.B.VIEW = swapRequested;
1962 }
1963
1964
1965 IFX_INLINE void IfxEray_setWakeupPatternChannel(Ifx_ERAY *eray, IfxEray_WakeupChannel wakeupPatternChannel)
1966 {
1967 eray->SUCC1.B.WUCS = wakeupPatternChannel;
1968 }
1969
1970
1971 IFX_INLINE void IfxEray_waitForPocState(Ifx_ERAY *eray, IfxEray_PocState pocState)
1972 {
1973 while (eray->CCSV.B.POCS != (uint8)pocState)
1974 {}
1975 }
1976
1977
1978 IFX_INLINE void IfxEray_initRxPinWithPadLevel(const IfxEray_Rxd_In *rx, IfxPort_InputMode rxMode, IfxPort_PadDriver padDriver)
1979 {
1980 IfxPort_setPinModeInput(rx->pin.port, rx->pin.pinIndex, rxMode);
1981 IfxPort_setPinPadDriver(rx->pin.port, rx->pin.pinIndex, padDriver);
1982
1983 if (rx->nodeId == IfxEray_NodeId_a)
1984 {
1985 rx->module->CUST1.B.RISA = rx->select;
1986 }
1987 else
1988 {
1989 rx->module->CUST1.B.RISB = rx->select;
1990 }
1991 }
1992
1993
1994 IFX_INLINE void IfxEray_selectRecieveInput(Ifx_ERAY *eray, IfxEray_NodeId nodeId, Ifx_RxSel select)
1995 {
1996 if (nodeId == IfxEray_NodeId_a)
1997 {
1998 eray->CUST1.B.RISA = select;
1999 }
2000 else
2001 {
2002 eray->CUST1.B.RISB = select;
2003 }
2004 }
2005
2006
2007 IFX_INLINE void IfxEray_setPocCommand(Ifx_ERAY *eray, IfxEray_PocCommand cmd)
2008 {
2009 eray->SUCC1.B.CMD = cmd;
2010 }
2011
2012
2013 IFX_INLINE boolean IfxEray_isRamsCleared(Ifx_ERAY *eray)
2014 {
2015 return eray->MHDS.B.CRAM != 0;
2016 }
2017
2018
2019 IFX_INLINE boolean IfxEray_isPocBusy(Ifx_ERAY *eray)
2020 {
2021 return eray->SUCC1.B.PBSY != 0;
2022 }
2023
2024
2025 IFX_INLINE void IfxEray_enableInterruptLine(Ifx_ERAY *eray, IfxEray_InterruptLine intLine)
2026 {
2027 if (intLine == IfxEray_InterruptLine_0)
2028 {
2029 eray->ILE.B.EINT0 = 0x1U;
2030 }
2031 else
2032 {
2033 eray->ILE.B.EINT1 = 0x1U;
2034 }
2035 }
2036
2037
2038 IFX_INLINE void IfxEray_enableTransmitInterrupt(Ifx_ERAY *eray)
2039 {
2040 eray->SIES.B.TXIE = 0x1U;
2041 }
2042
2043
2044 IFX_INLINE void IfxEray_enableAllErrorInterrupts(Ifx_ERAY *eray)
2045 {
2046 eray->EIES.U = 0x07070FFFU;
2047 }
2048
2049
2050 IFX_INLINE void IfxEray_unlockTestModeKey(Ifx_ERAY *eray)
2051 {
2052 eray->LCK.B.TMK = 0x75U;
2053 eray->LCK.B.TMK = 0x8AU;
2054 }
2055
2056
2057 IFX_INLINE void IfxEray_enableWriteTestRegister(Ifx_ERAY *eray)
2058 {
2059 eray->TEST1.B.WRTEN = 0x1U;
2060 }
2061
2062
2063 IFX_INLINE void IfxEray_enableExternalLoopback(Ifx_ERAY *eray)
2064 {
2065 eray->TEST1.B.ELBE = 0x1U;
2066 }
2067
2068
2069 IFX_INLINE void IfxEray_unlockConfigurationKey(Ifx_ERAY *eray)
2070 {
2071 eray->LCK.B.CLK = 0xCE;
2072 eray->LCK.B.CLK = 0x31;
2073 }
2074
2075
2076 IFX_INLINE void IfxEray_configureSuc1Register(Ifx_ERAY *eray, uint32 configValue)
2077 {
2078 eray->SUCC1.U = configValue;
2079 }
2080
2081
2082 IFX_INLINE void IfxEray_setMacroTickValue(Ifx_ERAY *eray, uint32 tickValue)
2083 {
2084 eray->MTCCV.U = tickValue;
2085 }
2086
2087
2088 #endif /* IFXERAY_H */
IfxEray_ExternalOffsetCorrection_2
external clock offset correction value 2
Definition: IfxEray.h:181
IfxEray_isModuleSuspended
IFX_INLINE boolean IfxEray_isModuleSuspended(Ifx_ERAY *eray)
Returns the module&#39;s suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspende...
Definition: IfxEray.h:1594
IfxEray_SlotConfig
Transmit control structure.
Definition: IfxEray.h:421
IfxEray_Txd_Out
TXD pin mapping structure.
Definition: IfxEray_PinMap.h:65
IfxEray_WakeupChannel
IfxEray_WakeupChannel
Wakeup pattern carry channel, defined in MODULE_ERAY0.SUCC1.B.WUCS.
Definition: IfxEray.h:373
IfxEray_setCollisionAvoidanceDuration
IFX_INLINE void IfxEray_setCollisionAvoidanceDuration(Ifx_ERAY *eray, uint8 collisionAvoidanceDuration)
Sets CAS symbol window duration.
Definition: IfxEray.h:1706
IfxEray_setSlot
IFX_EXTERN void IfxEray_setSlot(Ifx_ERAY *eray, const IfxEray_Header *header, const uint32 *data, const IfxEray_SlotConfig *slotConfig)
Writes header and data to Input buffers and set the slots.
Definition: IfxEray.c:295
IfxEray_ReceiveChannel_a
channel B for reception
Definition: IfxEray.h:324
IfxEray_getOutputBuffer
IFX_INLINE uint8 IfxEray_getOutputBuffer(Ifx_ERAY *eray)
Gets the output buffer index.
Definition: IfxEray.h:1483
IfxEray_MaxSynchFrames_7
Maximum number of sync frames in a cluster are 7.
Definition: IfxEray.h:259
IfxEray_PocCommand_run
command to controller to enter RUN
Definition: IfxEray.h:278
IfxEray_Header::bufferDirection
IfxEray_BufferDirection bufferDirection
selects buffer as a transmit buffer or as a receive buffer.
Definition: IfxEray.h:395
IfxEray_ListenTimeOutNoise_12
listen Time-out noise 12
Definition: IfxEray.h:243
IfxEray_BufferDirection_receive
buffer is configured as receive buffer
Definition: IfxEray.h:90
IfxEray_Baudrate_10
baudrate is 10MBits/Sec
Definition: IfxEray.h:81
IfxEray_Rxd_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxEray_PinMap.h:60
IfxEray_calcHeaderCrc
IFX_EXTERN uint16 IfxEray_calcHeaderCrc(uint8 payloadLength, uint16 frameId, boolean startupFrameIndicator, boolean syncFrameIndicator)
Calculate and returns the CRC for frame.
Definition: IfxEray.c:52
IfxEray_setPocReady
IFX_EXTERN void IfxEray_setPocReady(Ifx_ERAY *eray)
Sets the POC state to Ready state.
Definition: IfxEray.c:282
IfxEray_ReceivedHeader::syncFrame
uint8 syncFrame
0 : received frame is not a synch frame ; 1 : receive frame is a synch frame.
Definition: IfxEray.h:413
IfxEray_initRxPinWithPadLevel
IFX_INLINE void IfxEray_initRxPinWithPadLevel(const IfxEray_Rxd_In *rx, IfxPort_InputMode rxMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of pin direction as input and configuring pad driver...
Definition: IfxEray.h:1978
IfxEray_InterruptLine
IfxEray_InterruptLine
Interrupt lines.
Definition: IfxEray.h:223
IfxEray_PocCommand_notAccepted
command not accepted.
Definition: IfxEray.h:274
IfxEray_TransmissionSlotMode_single
transmission in key slot.
Definition: IfxEray.h:368
IfxEray_BufferDirection_transmit
buffer is configured as transmit buffer
Definition: IfxEray.h:91
IfxEray_unlockTestModeKey
IFX_INLINE void IfxEray_unlockTestModeKey(Ifx_ERAY *eray)
Provides functionality to enable the test mode.
Definition: IfxEray.h:2050
IfxEray_PocState_join
controller entered join state.
Definition: IfxEray.h:309
IfxEray_setStaticSlots
IFX_INLINE void IfxEray_setStaticSlots(Ifx_ERAY *eray, uint16 staticSlotLength, uint16 staticSlotsCount)
Sets static slots count and length.
Definition: IfxEray.h:1889
IfxEray_SuspendMode_none
No suspend.
Definition: IfxEray.h:350
IfxEray_PocCommand_halt
command to controller to enter HALT
Definition: IfxEray.h:280
IfxEray_setNewDataInterruptDestination
IFX_EXTERN void IfxEray_setNewDataInterruptDestination(Ifx_ERAY *eray, uint8 ndat, uint8 ndatDestination)
Selects between NDAT0 and NDAT1 interrupt destination.
Definition: IfxEray.c:264
IfxEray_initTxEnPin
IFX_INLINE void IfxEray_initTxEnPin(const IfxEray_Txen_Out *txEn, IfxPort_OutputMode txEnMode, IfxPort_PadDriver padDriver)
Initializes a TX Enable output.
Definition: IfxEray.h:1580
IfxEray_ClearStatusFlag_txi
transmit service request bit.
Definition: IfxEray.h:133
IfxEray_ListenTimeOutNoise_11
listen Time-out noise 11
Definition: IfxEray.h:242
IfxEray_receiveData
IFX_INLINE void IfxEray_receiveData(Ifx_ERAY *eray, boolean dataReceived)
requests to receive data from message buffer.
Definition: IfxEray.h:1606
IfxEray_setBufferReconfigSecure
IFX_INLINE void IfxEray_setBufferReconfigSecure(Ifx_ERAY *eray, uint8 secureValue)
Sets secured buffers in message RAM.
Definition: IfxEray.h:1650
IfxEray_ClockDivider_none
no clock signal
Definition: IfxEray.h:156
IfxEray_enableAllErrorInterrupts
IFX_INLINE void IfxEray_enableAllErrorInterrupts(Ifx_ERAY *eray)
Provides functionality to enable all the error iterrupts.
Definition: IfxEray.h:2044
IfxEray_ReceiveChannel
IfxEray_ReceiveChannel
Receiving channel, defined in MODULE_ERAY0.FRF.B.CH.
Definition: IfxEray.h:320
IfxEray_InterruptLine_1
line 1
Definition: IfxEray.h:226
IfxEray_waitForPocState
IFX_INLINE void IfxEray_waitForPocState(Ifx_ERAY *eray, IfxEray_PocState pocState)
Waits until the controller enters required POC state.
Definition: IfxEray.h:1971
IfxEray_PocState
IfxEray_PocState
State of Communication Controller Protocol operation control, defined in MODULE_ERAY0.CCSV.B.POCS.
Definition: IfxEray.h:291
IfxEray_setOffsetCorrection
IFX_INLINE void IfxEray_setOffsetCorrection(Ifx_ERAY *eray, uint16 correctionOffset)
Sets offset correction starting point.
Definition: IfxEray.h:1847
IfxEray_ReceiveChannel_b
channel A for reception
Definition: IfxEray.h:323
IfxEray_ClearStatusFlag
IfxEray_ClearStatusFlag
Selection of status flag to clear defined in MODULE_ERAY.SIR.U.
Definition: IfxEray.h:128
IfxEray_ClearErrorFlag_pemc
POC error mode change bit.
Definition: IfxEray.h:106
IfxEray_ListenTimeOutNoise_8
listen Time-out noise 8
Definition: IfxEray.h:239
IfxEray_PocState_startupSucced
controller entered startup succeed state.
Definition: IfxEray.h:315
IfxEray_setBaudrate
IFX_INLINE void IfxEray_setBaudrate(Ifx_ERAY *eray, IfxEray_Baudrate baudrate)
Sets baudrate on Flexray bus.
Definition: IfxEray.h:1644
IfxEray_TransmissionMode_singleShot
single transmission mode
Definition: IfxEray.h:360
IfxEray_ExternalOffset_noCorrection
No external correction control.
Definition: IfxEray.h:170
IfxEray_ReceivedHeader
Received header in a frame.
Definition: IfxEray.h:407
IfxEray_setClusterStartupDeviation
IFX_INLINE void IfxEray_setClusterStartupDeviation(Ifx_ERAY *eray, uint16 acceptedStartupDeviation)
Sets cluster startup deviation.
Definition: IfxEray.h:1700
IfxEray_setWakeupPatternChannel
IFX_INLINE void IfxEray_setWakeupPatternChannel(Ifx_ERAY *eray, IfxEray_WakeupChannel wakeupPatternChannel)
Sets the cluster wakeup channel.
Definition: IfxEray.h:1965
IfxEray_SleepMode
IfxEray_SleepMode
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_ERAY.CLC.B.EDIS.
Definition: IfxEray.h:331
IfxEray_Header::transmissionMode
IfxEray_TransmissionMode transmissionMode
transmission mode of Header.
Definition: IfxEray.h:397
IfxEray_setTxBufferNumber
IFX_INLINE void IfxEray_setTxBufferNumber(Ifx_ERAY *eray, uint8 bufferIndex)
Sets the transmit buffer number.
Definition: IfxEray.h:1953
IfxEray_Txen_Out
TXEN pin mapping structure.
Definition: IfxEray_PinMap.h:74
IfxEray_ExternalRateCorrection_1
external clock rate correction value 1
Definition: IfxEray.h:203
IfxEray_ExternalRateCorrection_2
external clock rate correction value 2
Definition: IfxEray.h:204
IfxEray_ClearErrorFlag_ccf
clock correction failure event.
Definition: IfxEray.h:110
IfxEray_Header::transmitPayloadIndicatior
boolean transmitPayloadIndicatior
weather payload indicator is set or not.
Definition: IfxEray.h:396
IfxEray_getNewDataInterrupt0SrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getNewDataInterrupt0SrcPtr(Ifx_ERAY *eray)
Gets the NDAT0 service request.
Definition: IfxEray.h:1446
IfxEray_getIndex
IFX_EXTERN IfxEray_Index IfxEray_getIndex(Ifx_ERAY *eray)
API to get the resource index of the ERAY specified.
Definition: IfxEray.c:168
IfxEray_SlotConfig::dataTransfered
boolean dataTransfered
whether data is transfered from input buffers to Message RAM or not.
Definition: IfxEray.h:424
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:140
IfxEray_getMessageBufferInterruptStatus
IFX_INLINE boolean IfxEray_getMessageBufferInterruptStatus(Ifx_ERAY *eray, uint8 messageBuffer)
Gets the message buffers interrupt status.
Definition: IfxEray.h:1409
IfxEray_ClearStatusFlag_ti0
timer0 service request bit.
Definition: IfxEray.h:138
IfxEray_setActiveCyclePairs
IFX_INLINE void IfxEray_setActiveCyclePairs(Ifx_ERAY *eray, uint8 numberOfCyclePairsForActive)
Sets number of cycle pairs for Active state.
Definition: IfxEray.h:1630
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxEray_ListenTimeOutNoise_9
listen Time-out noise 9
Definition: IfxEray.h:240
IfxEray_ReceivedHeader::payloadPreambleIndicator
uint8 payloadPreambleIndicator
1 : received payload segment has network management and message id or not; 0 : It hasn&#39;t...
Definition: IfxEray.h:416
IfxEray_WakeupChannel_a
send wakeup channel pattern on channel A
Definition: IfxEray.h:375
IfxEray_enableTransmitInterrupt
IFX_INLINE void IfxEray_enableTransmitInterrupt(Ifx_ERAY *eray)
Provides functionality to enable the transmit interrupt.
Definition: IfxEray.h:2038
IfxEray_ClearStatusFlag_cycs
cycle start service bit.
Definition: IfxEray.h:132
IfxEray_ExternalOffsetCorrection
IfxEray_ExternalOffsetCorrection
External clock offset correction value defined in MODULE_ERAY0.GTU11.B.EOC.
Definition: IfxEray.h:177
IfxEray_ClearStatusFlag_tobc
transfer output buffer completion request bit.
Definition: IfxEray.h:141
IfxEray_ReceiveChannel_none
none channels for reception
Definition: IfxEray.h:325
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
IfxEray_PocCommand_clearRam
command to controller to enter CLEAR_RAM
Definition: IfxEray.h:286
IfxEray_ExternalRate_correctionSubtracted
External rate correction subtracted from calculated correction.
Definition: IfxEray.h:194
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:322
IfxEray_Baudrate_5
baudrate is 5MBits/Sec
Definition: IfxEray.h:82
IfxEray_PocState_collisionResolution
controller entered collission-resolution state.
Definition: IfxEray.h:306
IfxEray_ExternalOffset_correctionAdded
External offset correction added to calculated correction.
Definition: IfxEray.h:172
IfxEray_ExternalRate
IfxEray_ExternalRate
External rate correction control MODULE_ERAY0.GTU11.B.ERCC.
Definition: IfxEray.h:191
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxEray_getStatusInterrupts
IFX_INLINE Ifx_ERAY_SIR IfxEray_getStatusInterrupts(Ifx_ERAY *eray)
Gets the status interrupt flags.
Definition: IfxEray.h:1514
IfxEray_receiveHeader
IFX_INLINE void IfxEray_receiveHeader(Ifx_ERAY *eray, boolean headerReceived)
request to receive header section from message buffer.
Definition: IfxEray.h:1612
IfxEray_TransmissionMode
IfxEray_TransmissionMode
Transmission mode of Header, defined in MODULE_ERAY0.WRHS1.B.TXM.
Definition: IfxEray.h:357
IfxEray_ListenTimeOutNoise
IfxEray_ListenTimeOutNoise
Wakeup or Startup listen timeout in presence of noise, defined in MODULE_ERAY0.SUCC2.B.LTN.
Definition: IfxEray.h:231
IfxEray_getInputBufferBusyHostStatus
IFX_INLINE boolean IfxEray_getInputBufferBusyHostStatus(Ifx_ERAY *eray)
Gets the Input Buffer Host Busy status.
Definition: IfxEray.h:1358
IfxEray_MaxSynchFrames_2
Maximum number of sync frames in a cluster are 2.
Definition: IfxEray.h:254
IfxEray_Txen_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxEray_PinMap.h:79
IfxEray_setTransmissionStartTime
IFX_INLINE void IfxEray_setTransmissionStartTime(Ifx_ERAY *eray, uint8 transmissionStartTime)
Sets transmission start time duration.
Definition: IfxEray.h:1926
IfxSrc.h
SRC basic functionality.
IfxEray_ClearErrorFlag_mhf
message handler constraint flag.
Definition: IfxEray.h:117
IfxEray_setExternalCorrectionControl
IFX_INLINE void IfxEray_setExternalCorrectionControl(Ifx_ERAY *eray, IfxEray_ExternalOffset externalOffset, IfxEray_ExternalRate externalRate)
Sets external correction controls.
Definition: IfxEray.h:1738
IfxEray_MaxSynchFrames_8
Maximum number of sync frames in a cluster are 8.
Definition: IfxEray.h:260
IfxEray_MaxSynchFrames_11
Maximum number of sync frames in a cluster are 11.
Definition: IfxEray.h:263
IfxEray_setTransmitRequest
IFX_INLINE void IfxEray_setTransmitRequest(Ifx_ERAY *eray, boolean transferRequested)
Sets transfer request to send frame.
Definition: IfxEray.h:1932
IfxEray_getTimerInterrupt0SrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getTimerInterrupt0SrcPtr(Ifx_ERAY *eray)
Gets the TINT0 service request.
Definition: IfxEray.h:1522
IfxEray_ClearErrorFlag_taba
transmission across channel A boundary flag.
Definition: IfxEray.h:120
IfxEray_ListenTimeOutNoise_15
listen Time-out noise 15
Definition: IfxEray.h:246
IfxEray_ClearErrorFlag_sfo
sync frame overflow event bit
Definition: IfxEray.h:109
IfxEray_setMessageHandlerConfigurations
IFX_INLINE void IfxEray_setMessageHandlerConfigurations(Ifx_ERAY *eray, uint8 staticFramepayload, uint8 latestTransmissionStart)
Sets Message Handler configurations.
Definition: IfxEray.h:1818
IfxEray_Header::dataPointer
uint16 dataPointer
pointer to the data section of message buffer in RAM.
Definition: IfxEray.h:400
IfxEray_Header::startupFrameIndicator
boolean startupFrameIndicator
whether startup frame is indicated or not.
Definition: IfxEray.h:401
IfxEray_ExternalOffsetCorrection_4
external clock offset correction value 4
Definition: IfxEray.h:183
IfxEray_ExternalOffsetCorrection_7
external clock offset correction value 7
Definition: IfxEray.h:186
IfxEray_ClearErrorFlag_ioba
illegal output buffer access event.
Definition: IfxEray.h:116
IfxEray_ClearErrorFlag_cna
command not accepted event bit.
Definition: IfxEray.h:107
IfxEray_Channel
IfxEray_Channel
Channel Id.
Definition: IfxEray.h:96
IfxEray_Header::bufferServiceEnabled
boolean bufferServiceEnabled
wether buffer service request is enabled or not.
Definition: IfxEray.h:398
IfxEray_PocState_gap
controller entered gap state.
Definition: IfxEray.h:308
IfxEray_PocState_halt
controller entered halt state
Definition: IfxEray.h:297
IfxEray_ClockDivider
IfxEray_ClockDivider
Clock divider in RUN mode, defined in MODULE_ERAY0.B.RMC.
Definition: IfxEray.h:154
IfxPort_setPinModeInput
IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode.
Definition: IfxPort.h:669
IfxEray_setMaxSynchFrames
IFX_INLINE void IfxEray_setMaxSynchFrames(Ifx_ERAY *eray, IfxEray_MaxSynchFrames maxSyncFrames)
Sets maximum synch frames in a cluster.
Definition: IfxEray.h:1806
IfxEray_TransmissionMode_continuous
continuos transmission mode
Definition: IfxEray.h:359
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxEray_setListenTimeOuts
IFX_INLINE void IfxEray_setListenTimeOuts(Ifx_ERAY *eray, uint32 listenTimeOut, IfxEray_ListenTimeOutNoise listenTimeOutNoise)
Sets startup or wakeup listen timeouts.
Definition: IfxEray.h:1783
IfxEray_sendData
IFX_INLINE void IfxEray_sendData(Ifx_ERAY *eray, boolean dataTransfered)
sets the bit to send data in frame.
Definition: IfxEray.h:1618
IfxEray_ExternalOffsetCorrection_0
external clock offset correction value 0
Definition: IfxEray.h:179
IfxEray_PocState_config
controller entered config state
Definition: IfxEray.h:299
IfxEray_ReceivedHeader::headerCrc
uint16 headerCrc
received header crc.
Definition: IfxEray.h:411
IfxEray_setStrobePosition
IFX_INLINE void IfxEray_setStrobePosition(Ifx_ERAY *eray, IfxEray_StrobePosition strobePosition)
Sets sample point for strobing.
Definition: IfxEray.h:1896
IfxEray_setSleepMode
IFX_INLINE void IfxEray_setSleepMode(Ifx_ERAY *eray, IfxEray_SleepMode mode)
Sets the sensitivity of the module to sleep signal.
Definition: IfxEray.h:1873
IfxEray_PocState_consistencyCheck
controller entered consistency-check.
Definition: IfxEray.h:307
IfxEray_PocCommand_sendMts
command to controller to enter SEND_MTS
Definition: IfxEray.h:282
IfxEray_ClearErrorFlag_sfbm
sync frame below minimum bit.
Definition: IfxEray.h:108
IfxEray_SleepMode_disable
disables sleep mode
Definition: IfxEray.h:334
IfxEray_ClearStatusFlag_wst
wakeup status bit.
Definition: IfxEray.h:130
IfxEray_ClearStatusFlag_mtsa
MTS receive channel A bit.
Definition: IfxEray.h:147
IfxEray_writeData
IFX_EXTERN void IfxEray_writeData(Ifx_ERAY *eray, const uint32 *data, uint8 payloadLength)
Writes data section of a frame to input data registers.
Definition: IfxEray.c:348
IfxEray_PocState_monitor
controller entered monitor state
Definition: IfxEray.h:298
IfxEray_SlotConfig::transferRequested
boolean transferRequested
transmit buffer released for transmission or not.
Definition: IfxEray.h:425
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxEray_getInputBufferBusySrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getInputBufferBusySrcPtr(Ifx_ERAY *eray)
Gets the IBUSY service request.
Definition: IfxEray.h:1370
IfxEray_MaxSynchFrames_15
Maximum number of sync frames in a cluster are 15.
Definition: IfxEray.h:267
IfxEray_ClearErrorFlag_ltvb
latest transmit violation flag on channel B .
Definition: IfxEray.h:122
IfxEray_Rxd_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxEray_PinMap.h:61
IfxEray_ClearStatusFlag_swe
stop watch event bit.
Definition: IfxEray.h:142
IfxEray_Baudrate_2_5
baudrate is 2.5MBits/Sec
Definition: IfxEray.h:83
IfxEray_MaxSynchFrames_13
Maximum number of sync frames in a cluster are 13.
Definition: IfxEray.h:265
IfxEray_ClockDivider_5
run mode clock divider 5
Definition: IfxEray.h:161
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxEray_ClearErrorFlag_eda
error event on channel A.
Definition: IfxEray.h:118
IfxEray_getFifoIndex
IFX_INLINE uint8 IfxEray_getFifoIndex(Ifx_ERAY *eray)
Gets the FIFO index.
Definition: IfxEray.h:1344
IfxEray_ClearStatusFlag_sucs
startup success event bit.
Definition: IfxEray.h:143
IfxEray_ExternalOffset
IfxEray_ExternalOffset
External offset correction control defined in MODULE_ERAY0.GTU11.B.EOCC.
Definition: IfxEray.h:168
IfxEray_ClockDivider_2
run mode clock divider 2
Definition: IfxEray.h:158
IfxEray_isRamsCleared
IFX_INLINE boolean IfxEray_isRamsCleared(Ifx_ERAY *eray)
Provides functionality to find out that any CHI command is being executed or not. ...
Definition: IfxEray.h:2013
IfxEray_setAutoDelayBuffers
IFX_INLINE void IfxEray_setAutoDelayBuffers(Ifx_ERAY *eray)
Sets auto delays between input, output buffers and message RAM.
Definition: IfxEray.h:1636
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxEray_setViewData
IFX_INLINE void IfxEray_setViewData(Ifx_ERAY *eray, boolean swapRequested)
Swaps the shadow and Host output registers.
Definition: IfxEray.h:1959
IfxEray_PocState_normalActive
controller entered normal-active state
Definition: IfxEray.h:295
IfxEray_setFifoBufferStartIndex
IFX_INLINE void IfxEray_setFifoBufferStartIndex(Ifx_ERAY *eray, uint8 fifoBufferStartIndex)
Sets FIFO buffer start idex.
Definition: IfxEray.h:1752
IfxEray_setRxBufferNumber
IFX_INLINE void IfxEray_setRxBufferNumber(Ifx_ERAY *eray, uint8 bufferIndex)
sets buffer number in which frame is received.
Definition: IfxEray.h:1867
IfxEray_ExternalOffsetCorrection_3
external clock offset correction value 3
Definition: IfxEray.h:182
IfxEray_setFifoMessageBufferConfigurations
IFX_INLINE void IfxEray_setFifoMessageBufferConfigurations(Ifx_ERAY *eray, IfxEray_ReceiveChannel receiveChannel, boolean staticFifoDisabled, uint8 fifoDepth)
Sets FIFO configurations.
Definition: IfxEray.h:1768
IfxEray_unlockConfigurationKey
IFX_INLINE void IfxEray_unlockConfigurationKey(Ifx_ERAY *eray)
Provides functionality to unlock the test mode configuration.
Definition: IfxEray.h:2069
IfxEray_setTransmissionSlotMode
IFX_INLINE void IfxEray_setTransmissionSlotMode(Ifx_ERAY *eray, IfxEray_TransmissionSlotMode transmissionSlotMode)
Sets the transmit slot mode.
Definition: IfxEray.h:1920
IfxEray_getInputBufferBusyShadowStatus
IFX_INLINE uint8 IfxEray_getInputBufferBusyShadowStatus(Ifx_ERAY *eray)
Gets the Input Buffer Shadow status.
Definition: IfxEray.h:1364
IfxEray_getNewDataInterrupt1SrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getNewDataInterrupt1SrcPtr(Ifx_ERAY *eray)
Gets the NDAT1 service request.
Definition: IfxEray.h:1459
IfxEray_setMaxCorrectionValues
IFX_INLINE void IfxEray_setMaxCorrectionValues(Ifx_ERAY *eray, uint16 maxOffsetCorrection, uint16 maxRateCorrection)
Sets max limit correction values.
Definition: IfxEray.h:1799
IfxEray_setCycleDurationMicroticks
IFX_INLINE void IfxEray_setCycleDurationMicroticks(Ifx_ERAY *eray, uint32 microticks)
sets duration of the communication cycle in Microticks.
Definition: IfxEray.h:1718
IfxEray_setReceiveRequest
IFX_INLINE void IfxEray_setReceiveRequest(Ifx_ERAY *eray, boolean receiveRequested)
requests to receive the frame.
Definition: IfxEray.h:1853
IfxEray_PocCommand_monitor
command to controller to enter MONITOR
Definition: IfxEray.h:285
IfxEray_MaxSynchFrames_12
Maximum number of sync frames in a cluster are 12.
Definition: IfxEray.h:264
IfxEray_ClearErrorFlag_rfo
RxFIFO overrun event bit.
Definition: IfxEray.h:113
IfxEray_setCycleDurationMacroticks
IFX_INLINE void IfxEray_setCycleDurationMacroticks(Ifx_ERAY *eray, uint16 macroticks)
sets duration of the communication cycle in Macroticks.
Definition: IfxEray.h:1712
IfxEray_getInterruptLine0SrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getInterruptLine0SrcPtr(Ifx_ERAY *eray)
Gets the INT0 service request.
Definition: IfxEray.h:1383
IfxEray_setNodeChannels
IFX_INLINE void IfxEray_setNodeChannels(Ifx_ERAY *eray, boolean channelAConnectedNode, boolean channelBConnectedNode)
Sets channels connected to node.
Definition: IfxEray.h:1840
IfxEray_TransmissionSlotMode_all
transmission in all slots.
Definition: IfxEray.h:367
IfxEray_PocState_startup
controller entered startup state
Definition: IfxEray.h:304
IfxEray_ListenTimeOutNoise_2
listen Time-out noise 2
Definition: IfxEray.h:233
IfxEray_PinMap.h
ERAY I/O map.
IfxEray_Rxd_In::nodeId
IfxEray_NodeId nodeId
Node ID.
Definition: IfxEray_PinMap.h:59
IfxEray_setChannelAInitialOffsets
IFX_INLINE void IfxEray_setChannelAInitialOffsets(Ifx_ERAY *eray, uint8 channelAMicrotickInitialOffset, uint8 channelAMacrotickInitialOffset)
Sets channel A initial offstes.
Definition: IfxEray.h:1656
IfxEray_SuspendMode_hard
Hard Suspend.
Definition: IfxEray.h:351
IfxEray_PocCommand_freeze
command to controller to enter FREEZE
Definition: IfxEray.h:281
IfxEray_getInterruptLine1SrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getInterruptLine1SrcPtr(Ifx_ERAY *eray)
Gets the INT1 service request.
Definition: IfxEray.h:1396
IfxEray_setMessageBufferInterruptDestination
IFX_EXTERN void IfxEray_setMessageBufferInterruptDestination(Ifx_ERAY *eray, uint8 messageBuffer, uint8 messageBufferDestination)
Selects between MBSC0 and MBSC1 interrupt destination.
Definition: IfxEray.c:247
IfxEray_ExternalRateCorrection
IfxEray_ExternalRateCorrection
External clock rate correction value defined in MODULE_ERAY0.GTU11.B.ERC.
Definition: IfxEray.h:200
IfxEray_setExternalCorrectionValues
IFX_INLINE void IfxEray_setExternalCorrectionValues(Ifx_ERAY *eray, IfxEray_ExternalOffsetCorrection externalOffsetCorrection, IfxEray_ExternalRateCorrection externalRateCorrection)
Sets external correction values.
Definition: IfxEray.h:1745
IfxEray_PocCommand_allSlots
command to controller to enter ALL_SLOTS
Definition: IfxEray.h:279
IfxEray_ClearStatusFlag_cas
collision avoidance bit.
Definition: IfxEray.h:131
IfxEray_getTimerInterrupt1SrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getTimerInterrupt1SrcPtr(Ifx_ERAY *eray)
Gets the TINT1 service request.
Definition: IfxEray.h:1535
IfxEray_WakeupChannel_b
send wakeup channel pattern on channel B
Definition: IfxEray.h:376
IfxEray_Header
Header section in a frame.
Definition: IfxEray.h:389
IfxEray_ClearStatusFlag_mbsi
message buffer service status bit.
Definition: IfxEray.h:144
IfxEray_MaxSynchFrames_6
Maximum number of sync frames in a cluster are 6.
Definition: IfxEray.h:258
IfxEray_Channel_a
channel A
Definition: IfxEray.h:98
IfxEray_MaxSynchFrames_3
Maximum number of sync frames in a cluster are 3.
Definition: IfxEray.h:255
IfxEray_ListenTimeOutNoise_6
listen Time-out noise 6
Definition: IfxEray.h:237
IfxEray_initRxPin
IFX_INLINE void IfxEray_initRxPin(const IfxEray_Rxd_In *rx, IfxPort_InputMode rxMode)
Initialises a RX pin.
Definition: IfxEray.h:1565
IfxEray_ClearStatusFlag_rfne
receive fifo not empty bit.
Definition: IfxEray.h:135
IfxEray_ClearStatusFlag_rfcl
RxFIFO critical level reached bit.
Definition: IfxEray.h:136
IfxEray_setPocCommand
IFX_INLINE void IfxEray_setPocCommand(Ifx_ERAY *eray, IfxEray_PocCommand cmd)
Provides functionality to provide the command to change the transmit mode.
Definition: IfxEray.h:2007
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:249
IfxEray_getMessageBufferStatus0SrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getMessageBufferStatus0SrcPtr(Ifx_ERAY *eray)
Gets the MBSC0 service request.
Definition: IfxEray.h:1420
IfxEray_setSymbolChannels
IFX_INLINE void IfxEray_setSymbolChannels(Ifx_ERAY *eray, boolean channelASymbolTransmitted, boolean channelBSymbolTransmitted)
Sets channels which transmits symbols.
Definition: IfxEray.h:1913
IfxEray_IdleDynamicSlots
IfxEray_IdleDynamicSlots
Duration of dynamic slot idle phase, defined in MODULE_ERAY0.B.DSI.
Definition: IfxEray.h:214
IfxEray_ClearErrorFlag_efa
empty FIFO access event bit.
Definition: IfxEray.h:114
IfxEray_ClearErrorFlag_ccl
CHI command locked event.
Definition: IfxEray.h:111
IfxEray_selectRecieveInput
IFX_INLINE void IfxEray_selectRecieveInput(Ifx_ERAY *eray, IfxEray_NodeId nodeId, Ifx_RxSel select)
Provides functionality to select the receiver channel input.
Definition: IfxEray.h:1994
IfxEray_StrobePosition_6
Sample count 6 for strobing.
Definition: IfxEray.h:343
IfxEray_setNetworkStartIdleTime
IFX_INLINE void IfxEray_setNetworkStartIdleTime(Ifx_ERAY *eray, uint16 networkStartIdleTime)
Sets network start Idle time.
Definition: IfxEray.h:1828
IfxEray_PocCommand_reset
command to controller to enter RESET
Definition: IfxEray.h:284
IfxEray_disableModule
IFX_INLINE void IfxEray_disableModule(Ifx_ERAY *eray)
Disables the ERAY module.
Definition: IfxEray.h:1310
IfxEray_setClusterDriftValues
IFX_INLINE void IfxEray_setClusterDriftValues(Ifx_ERAY *eray, uint8 clusterDrift, uint16 maxDriftOffset)
Sets cluster drift values.
Definition: IfxEray.h:1693
IfxEray_PocState_integrationConsistencyCheck
controller entered integration consistency check state
Definition: IfxEray.h:312
IfxEray_ClockDivider_6
run mode clock divider 6
Definition: IfxEray.h:162
IfxEray_setChannelsReceiveDelay
IFX_INLINE void IfxEray_setChannelsReceiveDelay(Ifx_ERAY *eray, uint8 channelAReceptionDelay, uint8 channelBReceptionDelay)
Sets receive delays on channels.
Definition: IfxEray.h:1670
IfxEray_setTransmitWakeupTimes
IFX_INLINE void IfxEray_setTransmitWakeupTimes(Ifx_ERAY *eray, uint8 transmitWakeupRepetitions, uint8 transmitWakeupIdleTime, uint8 transmitWakeupLowTime)
Sets transmit wakeup times.
Definition: IfxEray.h:1938
IfxEray_ClearStatusFlag_mtsb
MTS receive channel B bit.
Definition: IfxEray.h:149
IfxEray_setFifoFilterConfigurations
IFX_INLINE void IfxEray_setFifoFilterConfigurations(Ifx_ERAY *eray, uint16 rejectedFrameId, uint8 filteredCycleNumber, boolean fifoNullFramesRejected, uint16 frameIdFilter)
Sets FIFO filter configurations.
Definition: IfxEray.h:1759
IfxEray_StrobePosition
IfxEray_StrobePosition
Sample count value for strobing, defined in MODULE_ERAY0.PRTC1.B.SPP.
Definition: IfxEray.h:339
IfxEray_getOutputBufferBusySrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getOutputBufferBusySrcPtr(Ifx_ERAY *eray)
Gets the OBUSY service request.
Definition: IfxEray.h:1495
IfxEray_initTxPin
IFX_INLINE void IfxEray_initTxPin(const IfxEray_Txd_Out *tx, IfxPort_OutputMode txMode, IfxPort_PadDriver padDriver)
Initializes a TX output.
Definition: IfxEray.h:1587
IfxEray_ExternalOffsetCorrection_6
external clock offset correction value 6
Definition: IfxEray.h:185
IfxEray_PocState_integrationListen
controller entered integration-listen state.
Definition: IfxEray.h:311
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:151
IfxEray_ExternalRateCorrection_0
external clock rate correction value 0
Definition: IfxEray.h:202
IfxEray_Baudrate
IfxEray_Baudrate
Baudrate on the flexray bus, defined in MODULE_ERAY0.PRTC1.B.BRP.
Definition: IfxEray.h:79
IfxEray_clearErrorFlag
IFX_INLINE void IfxEray_clearErrorFlag(Ifx_ERAY *eray, IfxEray_ClearErrorFlag errorFlag)
Clears the error flag requested.
Definition: IfxEray.h:1298
IfxEray_setFirstDynamicBuffer
IFX_INLINE void IfxEray_setFirstDynamicBuffer(Ifx_ERAY *eray, uint8 firstDynamicBuffer)
Sets first dynamic buffer.
Definition: IfxEray.h:1776
IfxEray_SuspendMode
IfxEray_SuspendMode
OCDS Suspend Control (OCDS.SUS)
Definition: IfxEray.h:348
IfxEray_ExternalRateCorrection_6
external clock rate correction value 6
Definition: IfxEray.h:208
IfxEray_ExternalOffsetCorrection_1
external clock offset correction value 1
Definition: IfxEray.h:180
IfxEray_MaxSynchFrames_5
Maximum number of sync frames in a cluster are 5.
Definition: IfxEray.h:257
IfxEray_sendHeader
IFX_INLINE void IfxEray_sendHeader(Ifx_ERAY *eray, boolean headerTransfered)
sets the bit to send header in frame.
Definition: IfxEray.h:1624
IfxEray_getOutputBufferBusyShadowStatus
IFX_INLINE boolean IfxEray_getOutputBufferBusyShadowStatus(Ifx_ERAY *eray)
Gets the Output Buffer Shadow status.
Definition: IfxEray.h:1489
IfxEray_ExternalOffsetCorrection_5
external clock offset correction value 5
Definition: IfxEray.h:184
IfxEray_Channel_b
channel B
Definition: IfxEray.h:99
IfxEray_SlotConfig::bufferIndex
uint8 bufferIndex
buffer index in the Message RAM.
Definition: IfxEray.h:426
IfxEray_InterruptLine_0
line 0
Definition: IfxEray.h:225
IfxEray_configureSuc1Register
IFX_INLINE void IfxEray_configureSuc1Register(Ifx_ERAY *eray, uint32 configValue)
Provides functionality to configure SUC configuration registers 1.
Definition: IfxEray.h:2076
IfxEray_Rxd_In::module
Ifx_ERAY * module
Base address.
Definition: IfxEray_PinMap.h:58
IfxEray_Header::payloadLength
uint8 payloadLength
length of data section.
Definition: IfxEray.h:399
IfxEray_PocState_initializeSchedule
controller entered initialise schedule state
Definition: IfxEray.h:313
IfxEray_PocState_ready
controller entered ready state
Definition: IfxEray.h:294
IfxEray_ListenTimeOutNoise_14
listen Time-out noise 14
Definition: IfxEray.h:245
IfxEray_PocState_staruAborted
controller entered startup-abort state
Definition: IfxEray.h:314
IfxEray_setDecodingCorrectionValue
IFX_INLINE void IfxEray_setDecodingCorrectionValue(Ifx_ERAY *eray, uint8 decodingCorrection)
Sets decoding correction value.
Definition: IfxEray.h:1724
IfxEray_ClearStatusFlag_nmvc
network management vector bit.
Definition: IfxEray.h:137
IfxEray_setReceiveWakeupTimes
IFX_INLINE void IfxEray_setReceiveWakeupTimes(Ifx_ERAY *eray, uint16 receiveWakeupTestDuration, uint8 receiveWakeupIdleTime, uint8 receiveWakeupLowTime)
Sets receive wakeup times.
Definition: IfxEray.h:1859
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxEray_Rxd_In
RXD pin mapping structure.
Definition: IfxEray_PinMap.h:56
Ifx_RxSel
Ifx_RxSel
input multiplexer definition used in PinMaps
Definition: Ifx_Types.h:127
IfxEray_setDynamicSlots
IFX_INLINE void IfxEray_setDynamicSlots(Ifx_ERAY *eray, uint8 dynamicSlotLength, uint16 dynamicSlotCount, IfxEray_IdleDynamicSlots idleDynamicSlots)
Sets dynamic slots count and length.
Definition: IfxEray.h:1730
IfxEray_ReceivedHeader::nullFrameIndicator
uint8 nullFrameIndicator
0 : no data frame received; 1: atleast one data frame received.
Definition: IfxEray.h:412
IfxEray_Header::channelAFiltered
boolean channelAFiltered
channel A serves as a control for transmit and filter for receive buffers.
Definition: IfxEray.h:393
IfxEray_getErrorInterrupts
IFX_INLINE Ifx_ERAY_EIR IfxEray_getErrorInterrupts(Ifx_ERAY *eray)
Gets the error interrupt flags.
Definition: IfxEray.h:1336
IfxEray_MaxSynchFrames
IfxEray_MaxSynchFrames
Maximum number of sync frames in a cluster defined in MODULE_ERAY0.GTU02.B.SNM.
Definition: IfxEray.h:252
IfxEray_setMaxColdStartAttempts
IFX_INLINE void IfxEray_setMaxColdStartAttempts(Ifx_ERAY *eray, uint8 maxColdStartAttempts)
Sets the maximum cold start attempts for active state.
Definition: IfxEray.h:1793
IfxEray_enableExternalLoopback
IFX_INLINE void IfxEray_enableExternalLoopback(Ifx_ERAY *eray)
Provides functionality to enable the external loopback.
Definition: IfxEray.h:2063
IfxEray_TransmissionSlotMode
IfxEray_TransmissionSlotMode
Initial transmission mode, defined in MODULE_ERAY0.SUCC1.B.TSM.
Definition: IfxEray.h:365
IfxEray_ListenTimeOutNoise_5
listen Time-out noise 5
Definition: IfxEray.h:236
IfxEray_enableInterruptLine
IFX_INLINE void IfxEray_enableInterruptLine(Ifx_ERAY *eray, IfxEray_InterruptLine intLine)
Provides functionality to enble the interrupt lines.
Definition: IfxEray.h:2025
IfxEray_PocState_integrationCheck
controller entered integration-check.
Definition: IfxEray.h:310
IfxEray_ExternalRate_noCorrection
No external correction control.
Definition: IfxEray.h:193
IfxEray_ClearErrorFlag_edb
error event on channel B.
Definition: IfxEray.h:121
IfxEray_ReceivedHeader::startupFrame
uint8 startupFrame
0 : received frame is not a startup frame ; 1 : receive frame is a startup frame. ...
Definition: IfxEray.h:414
IfxEray_ClearErrorFlag_iiba
illegal input buffer access event.
Definition: IfxEray.h:115
IfxEray_NodeId_a
Ifx_ERAY Node A.
Definition: IfxEray_cfg.h:90
IfxEray_Header::syncFrameIndicator
boolean syncFrameIndicator
whether sync frame is indicated or not.
Definition: IfxEray.h:402
IfxEray_PocCommand_config
command to controller to enter CONFIG
Definition: IfxEray.h:275
IfxEray_setChannelBInitialOffsets
IFX_INLINE void IfxEray_setChannelBInitialOffsets(Ifx_ERAY *eray, uint8 channelBMicrotickInitialOffset, uint8 channelBMacrotickInitialOffset)
Sets channel B initial offstes.
Definition: IfxEray.h:1663
IfxEray_PocState_normalPassive
controller entered normal-passive state
Definition: IfxEray.h:296
IfxEray_setSlotActionPoints
IFX_INLINE void IfxEray_setSlotActionPoints(Ifx_ERAY *eray, uint8 staticActionPoint, uint8 dynamicActionPoint)
Sets slots action points.
Definition: IfxEray.h:1882
IfxEray_PocState_wakeupStandby
controller entered wakeup standby state
Definition: IfxEray.h:300
IfxEray_ExternalRateCorrection_7
external clock rate correction value 7
Definition: IfxEray.h:209
IfxEray_setNetworkVectorLength
IFX_INLINE void IfxEray_setNetworkVectorLength(Ifx_ERAY *eray, uint32 networkVectorLength)
Sets network management vector length.
Definition: IfxEray.h:1834
IfxEray_ClearStatusFlag_wupb
wakeup pattern channel B bit.
Definition: IfxEray.h:148
IfxEray_setMessageBufferCount
IFX_INLINE void IfxEray_setMessageBufferCount(Ifx_ERAY *eray, uint8 numberOfMessageBuffers)
Sets number of message buffers.
Definition: IfxEray.h:1812
IfxEray_ExternalRateCorrection_5
external clock rate correction value 5
Definition: IfxEray.h:207
IfxEray_ClearErrorFlag
IfxEray_ClearErrorFlag
Selection of error flag to clear defined in MODULE_ERAY.EIR.U.
Definition: IfxEray.h:104
IfxEray_resetModule
IFX_EXTERN void IfxEray_resetModule(Ifx_ERAY *eray)
Resets the ERAY kernel.
Definition: IfxEray.c:227
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:81
IfxEray_ListenTimeOutNoise_16
listen Time-out noise 16
Definition: IfxEray.h:247
IfxEray_ExternalRateCorrection_3
external clock rate correction value 3
Definition: IfxEray.h:205
IfxEray_PocState_defaultConfig
controller entered default config state
Definition: IfxEray.h:293
IfxEray_enableWriteTestRegister
IFX_INLINE void IfxEray_enableWriteTestRegister(Ifx_ERAY *eray)
Provides functionality to enable write to the test mode registers.
Definition: IfxEray.h:2057
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:248
IfxEray_ClearErrorFlag_eerr
ECC error event bit.
Definition: IfxEray.h:112
IfxEray_getPocState
IFX_INLINE IfxEray_PocState IfxEray_getPocState(Ifx_ERAY *eray)
Gets the current POC state.
Definition: IfxEray.h:1508
IfxEray_getAddress
IFX_EXTERN Ifx_ERAY * IfxEray_getAddress(IfxEray_Index eray)
Definition: IfxEray.c:151
IfxEray_ClearStatusFlag_ti1
timer1 service request bit.
Definition: IfxEray.h:139
IfxEray_ClockDivider_1
run mode clock divider 1
Definition: IfxEray.h:157
IfxEray_Header::channelBFiltered
boolean channelBFiltered
channel B serves as a control for transmit and filter for receive buffers.
Definition: IfxEray.h:394
IfxEray_MaxSynchFrames_4
Maximum number of sync frames in a cluster are 4.
Definition: IfxEray.h:256
IfxEray_isPocBusy
IFX_INLINE boolean IfxEray_isPocBusy(Ifx_ERAY *eray)
Provides functionality to check whether POC is busy or not.
Definition: IfxEray.h:2019
IfxEray_IdleDynamicSlots_1
duration of dynamic slot idle phase is 1
Definition: IfxEray.h:217
IfxEray_getFifoStatus
IFX_INLINE Ifx_ERAY_FSR IfxEray_getFifoStatus(Ifx_ERAY *eray)
Gets the FIFO status.
Definition: IfxEray.h:1350
IfxEray_SlotConfig::headerTransfered
boolean headerTransfered
whether header is transfered from input buffers to Message RAM or not.
Definition: IfxEray.h:423
IfxEray_MaxSynchFrames_14
Maximum number of sync frames in a cluster are 14.
Definition: IfxEray.h:266
IfxEray_PocCommand
IfxEray_PocCommand
Commmand to control the Communication, defined in MODULE_ERAY0.SUCC1.B.CMD.
Definition: IfxEray.h:272
IfxEray_ClearErrorFlag_tabb
transmission across channel B boundary flag.
Definition: IfxEray.h:123
IfxEray_MaxSynchFrames_9
Maximum number of sync frames in a cluster are 9.
Definition: IfxEray.h:261
IfxEray_PocState_wakeupDetect
controller entered wakeup-detection state
Definition: IfxEray.h:303
IfxEray_setMacroTickValue
IFX_INLINE void IfxEray_setMacroTickValue(Ifx_ERAY *eray, uint32 tickValue)
Provides functionality to configure MTCCV register.
Definition: IfxEray.h:2082
IfxEray_PocState_wakeupListen
controller entered wakeup-listen state
Definition: IfxEray.h:301
IfxEray_ReceivedHeader::cycleNumber
uint8 cycleNumber
cycle number in which frame is received.
Definition: IfxEray.h:415
IfxEray_ExternalRate_correctionAdded
External rate correction added to calculated correction.
Definition: IfxEray.h:195
IfxEray_ClearStatusFlag_rxi
receive service request bit.
Definition: IfxEray.h:134
IfxEray_ClockDivider_7
run mode clock divider 7
Definition: IfxEray.h:163
IfxEray_StrobePosition_5
Sample count 5 for strobing.
Definition: IfxEray.h:341
IfxEray_enableModule
IFX_INLINE void IfxEray_enableModule(Ifx_ERAY *eray)
Enables the ERAY module.
Definition: IfxEray.h:1320
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxEray_PocCommand_coldStart
command to controller to enter COLD_START
Definition: IfxEray.h:283
IfxEray_getNewDataInterruptStatus
IFX_INLINE boolean IfxEray_getNewDataInterruptStatus(Ifx_ERAY *eray, uint8 ndat)
Gets the new data interrupt buffers status.
Definition: IfxEray.h:1472
IfxEray_ListenTimeOutNoise_10
listen Time-out noise 10
Definition: IfxEray.h:241
IfxEray_IdleDynamicSlots_0
duration of dynamic slot idle phase is 0
Definition: IfxEray.h:216
IfxEray_ClockDivider_3
run mode clock divider 3
Definition: IfxEray.h:159
IfxEray_MaxSynchFrames_10
Maximum number of sync frames in a cluster are 10.
Definition: IfxEray.h:262
IfxEray_PocCommand_ready
command to controller to enter READY.
Definition: IfxEray.h:276
IfxEray_ListenTimeOutNoise_3
listen Time-out noise 3
Definition: IfxEray.h:234
IfxEray_PocState_coldStartListen
controller entered clod-start listen state
Definition: IfxEray.h:305
IfxEray_SuspendMode_soft
Soft Suspend.
Definition: IfxEray.h:352
IfxEray_readFrame
IFX_EXTERN void IfxEray_readFrame(Ifx_ERAY *eray, IfxEray_ReceivedHeader *header, uint32 *data, Ifx_SizeT maxPayloadLength)
Reads header and data from output buffers.
Definition: IfxEray.c:203
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxEray_PocState_wakeupSend
controller entered wakeup-send state
Definition: IfxEray.h:302
IfxEray_ListenTimeOutNoise_13
listen Time-out noise 13
Definition: IfxEray.h:244
IfxEray_clearAllFlags
IFX_EXTERN void IfxEray_clearAllFlags(Ifx_ERAY *eray)
Clears all the error flags.
Definition: IfxEray.c:123
IfxEray_enableInterruptLines
IFX_EXTERN void IfxEray_enableInterruptLines(Ifx_ERAY *eray)
Enables all the Interrupt lines.
Definition: IfxEray.c:133
IfxEray_Index
IfxEray_Index
List of the available Eray resources.
Definition: IfxEray_cfg.h:79
IfxEray_getMessageBufferStatus1SrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getMessageBufferStatus1SrcPtr(Ifx_ERAY *eray)
Gets the MBSC1 service request.
Definition: IfxEray.h:1433
IfxEray_ReceiveChannel_both
both channels for reception
Definition: IfxEray.h:322
IfxEray_cfg.h
ERAY on-chip implementation data.
IfxEray_ExternalOffset_correctionSubtracted
External offset correction subtracted from calculated correction.
Definition: IfxEray.h:171
IfxEray_ClearStatusFlag_tibc
transfer input buffer completion request bit.
Definition: IfxEray.h:140
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxEray_clearStatusFlag
IFX_INLINE void IfxEray_clearStatusFlag(Ifx_ERAY *eray, IfxEray_ClearStatusFlag statusFlag)
Clears the status flag requested.
Definition: IfxEray.h:1304
IfxEray_ListenTimeOutNoise_4
listen Time-out noise 4
Definition: IfxEray.h:235
IfxEray_BufferDirection
IfxEray_BufferDirection
wheather transmit buffer or receive buffer, defined in MODULE_ERAY0.WRHS1.B.CFG.
Definition: IfxEray.h:88
IfxEray_ClearErrorFlag_ltva
latest transmit violation flag on channel A .
Definition: IfxEray.h:119
IfxEray_setSuspendMode
IFX_INLINE void IfxEray_setSuspendMode(Ifx_ERAY *eray, IfxEray_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and...
Definition: IfxEray.h:1902
IfxEray_setTransmittedFrames
IFX_INLINE void IfxEray_setTransmittedFrames(Ifx_ERAY *eray, boolean startupFrameTransmitted, boolean synchFrameTransmitted)
Configures transmitted frames for startup and synchronization.
Definition: IfxEray.h:1946
IfxEray_changePocState
IFX_EXTERN boolean IfxEray_changePocState(Ifx_ERAY *eray, IfxEray_PocCommand pocCommand)
Changes the Commmunication Controller state.
Definition: IfxEray.c:99
IfxEray_NodeId
IfxEray_NodeId
Node Id in communication cycle.
Definition: IfxEray_cfg.h:88
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:675
IfxEray_Header::cycleCode
uint8 cycleCode
the cycle set used for cycle counter filtering.
Definition: IfxEray.h:392
IfxEray_ExternalRateCorrection_4
external clock rate correction value 4
Definition: IfxEray.h:206
IfxEray_readData
IFX_EXTERN void IfxEray_readData(Ifx_ERAY *eray, uint32 *data, uint8 payloadLength)
Reads the received data from output registers.
Definition: IfxEray.c:188
IfxEray_getWakeupPatternReceivedChannel
IFX_INLINE IfxEray_WakeupChannel IfxEray_getWakeupPatternReceivedChannel(Ifx_ERAY *eray)
Gets the received wakeup pattern channel.
Definition: IfxEray.h:1548
IfxEray_StrobePosition_4
Sample count 4 for strobing.
Definition: IfxEray.h:342
IfxEray_ListenTimeOutNoise_7
listen Time-out noise 7
Definition: IfxEray.h:238
IfxEray_ClearStatusFlag_wupa
wakeup pattern channel A bit.
Definition: IfxEray.h:146
IfxEray_setClockSynchErrorHalt
IFX_INLINE void IfxEray_setClockSynchErrorHalt(Ifx_ERAY *eray, boolean clockSyncErrorHalt)
lead to halt state in clock synch error.
Definition: IfxEray.h:1687
IfxEray_PocCommand_wakeup
command to controller to enter WAKEUP
Definition: IfxEray.h:277
IfxEray_SleepMode_enable
enables sleep mode
Definition: IfxEray.h:333
IfxEray_ClockDivider_4
run mode clock divider 4
Definition: IfxEray.h:160
IfxEray_setClockCorrectionCycles
IFX_INLINE void IfxEray_setClockCorrectionCycles(Ifx_ERAY *eray, uint8 clockCorrectionCyclesPassive, uint8 clockCorrectionCyclesHalt)
Sets clock correction cycles for Passive and Halt.
Definition: IfxEray.h:1677
IfxEray_IdleDynamicSlots_2
duration of dynamic slot idle phase is 2
Definition: IfxEray.h:218
IfxEray_Header::frameId
uint16 frameId
slot ID of the selected Message Buffer.
Definition: IfxEray.h:391
IfxEray_ClearStatusFlag_sds
dynamic segment start bit.
Definition: IfxEray.h:145


iLLD_TC38A: IfxEray_Eray.c Source File

  • Eray
  • Eray
IfxEray_Eray.c
Go to the documentation of this file.
1 /**
2 * \file IfxEray_Eray.c
3 * \brief ERAY ERAY details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxEray_Eray.h"
47 #include "Mtu/Std/IfxMtu.h"
48
49 /** \addtogroup IfxLld_Eray_Eray_Node
50 * \{ */
51
52 /******************************************************************************/
53 /*-----------------------Private Function Prototypes--------------------------*/
54 /******************************************************************************/
55
56 /** \brief Inialises the communication controller.
57 * \param eray pointer to ERAY Module handle.
58 * \param config pointer to communication controller config structure.
59 * \return None
60 */
61 IFX_STATIC void IfxEray_Eray_Node_initCommunicationController(IfxEray_Eray *eray, const IfxEray_Eray_ControllerConfig *config);
62
63 /** \brief Initialises the Global Timing Unit.
64 * \param eray pointer to ERAY Module handle.
65 * \param config global timing unit Configuration structure.
66 * \return None
67 */
68 IFX_STATIC void IfxEray_Eray_Node_initGTU(IfxEray_Eray *eray, const IfxEray_Eray_GTUConfig *config);
69
70 /** \brief Inialises the message RAM.
71 * \param eray pointer to ERAY Module handle.
72 * \param config pointer to message RAM config structure.
73 * \return None
74 */
75 IFX_STATIC void IfxEray_Eray_Node_initMessageRAM(IfxEray_Eray *eray, const IfxEray_Eray_MessageRAMConfig *config);
76
77 /** \} */
78
79 /******************************************************************************/
80 /*-------------------------Function Implementations---------------------------*/
81 /******************************************************************************/
82
83 void IfxEray_Eray_Node_init(IfxEray_Eray *eray, const IfxEray_Eray_NodeConfig *config)
84 {
85 Ifx_ERAY *eraySFR = eray->eray;
86 // clear all the flags
87 IfxEray_clearAllFlags(eraySFR);
88
89 // set Communication Controller to config state
90 if (IfxEray_getPocState(eraySFR) != IfxEray_PocState_config)
91 {
92 IfxEray_changePocState(eraySFR, IfxEray_PocCommand_freeze);
93 IfxEray_waitForPocState(eraySFR, IfxEray_PocState_halt);
94 IfxEray_changePocState(eraySFR, IfxEray_PocCommand_config);
95 IfxEray_waitForPocState(eraySFR, IfxEray_PocState_defaultConfig);
96 IfxEray_changePocState(eraySFR, IfxEray_PocCommand_config);
97 IfxEray_waitForPocState(eraySFR, IfxEray_PocState_config);
98 }
99
100 // enable interrupt lines
101 IfxEray_enableInterruptLines(eraySFR);
102 IfxEray_setAutoDelayBuffers(eraySFR);
103 //configure message RAM ( slots and slot buffers )
104 IfxEray_Eray_Node_initMessageRAM(eray, &config->messageRAMConfig);
105 //configure communication controller for clock corrections
106 IfxEray_Eray_Node_initCommunicationController(eray, &config->controllerConfig);
107 // initialise the Node pins.
108 const IfxEray_Eray_Pins *pins = config->pins;
109
110 if (pins != NULL_PTR)
111 {
112 const IfxEray_Eray_NodeA *nodeAPins = pins->nodeAPins;
113
114 if (nodeAPins != NULL_PTR)
115 {
116 const IfxEray_Rxd_In *rx = nodeAPins->rxIn;
117
118 if (rx != NULL_PTR)
119 {
120 IfxEray_initRxPinWithPadLevel(rx, nodeAPins->rxInMode, nodeAPins->pinDriver);
121 }
122
123 const IfxEray_Txd_Out *tx = nodeAPins->txOut;
124
125 if (tx != NULL_PTR)
126 {
127 IfxEray_initTxPin(tx, nodeAPins->txOutMode, nodeAPins->pinDriver);
128 }
129
130 const IfxEray_Txen_Out *txEn = nodeAPins->txEnOut;
131
132 if (txEn != NULL_PTR)
133 {
134 IfxEray_initTxEnPin(txEn, nodeAPins->txEnOutMode, nodeAPins->pinDriver);
135 }
136 }
137
138 const IfxEray_Eray_NodeB *nodeBPins = pins->nodeBPins;
139
140 if (nodeBPins != NULL_PTR)
141 {
142 const IfxEray_Rxd_In *rx = nodeBPins->rxIn;
143
144 if (rx != NULL_PTR)
145 {
146 IfxEray_initRxPinWithPadLevel(rx, nodeBPins->rxInMode, nodeBPins->pinDriver);
147 }
148
149 const IfxEray_Txd_Out *tx = nodeBPins->txOut;
150
151 if (tx != NULL_PTR)
152 {
153 IfxEray_initTxPin(tx, nodeBPins->txOutMode, nodeBPins->pinDriver);
154 }
155
156 const IfxEray_Txen_Out *txEn = nodeBPins->txEnOut;
157
158 if (txEn != NULL_PTR)
159 {
160 IfxEray_initTxEnPin(txEn, nodeBPins->txEnOutMode, nodeBPins->pinDriver);
161 }
162 }
163 }
164
165 // set the Communication Controller to ready state
166 IfxEray_setPocReady(eraySFR);
167 }
168
169
170 IFX_STATIC void IfxEray_Eray_Node_initCommunicationController(IfxEray_Eray *eray, const IfxEray_Eray_ControllerConfig *config)
171 {
172 Ifx_ERAY *eraySFR = eray->eray;
173 //SUCC1
174 IfxEray_setTransmittedFrames(eraySFR, config->succ1Config.startupFrameTransmitted, config->succ1Config.syncFrameTransmitted);
175 IfxEray_setMaxColdStartAttempts(eraySFR, config->succ1Config.maxColdStartAttempts);
176 IfxEray_setActiveCyclePairs(eraySFR, config->succ1Config.numberOfCyclePairsForActive);
177 IfxEray_setWakeupPatternChannel(eraySFR, config->succ1Config.wakeupPatternChannel);
178 IfxEray_setTransmissionSlotMode(eraySFR, config->succ1Config.transmissionSlotMode);
179 IfxEray_setClockSynchErrorHalt(eraySFR, config->succ1Config.clockSyncErrorHalt);
180 IfxEray_setSymbolChannels(eraySFR, config->succ1Config.channelASymbolTransmitted, config->succ1Config.channelBSymbolTransmitted);
181 IfxEray_setNodeChannels(eraySFR, config->succ1Config.channelAConnectedNode, config->succ1Config.channelBConnectedNode);
182 //SUCC2
183 IfxEray_setListenTimeOuts(eraySFR, config->succ2Config.listenTimeOut, config->succ2Config.listenTimeOutNoise);
184 //SUCC3
185 IfxEray_setClockCorrectionCycles(eraySFR, config->succ3Config.clockCorrectionCyclesPassive, config->succ3Config.clockCorrectionCyclesHalt);
186 //NEMC
187 IfxEray_setNetworkVectorLength(eraySFR, config->networkVectorLength);
188 //PRTC1, PRTC2
189 IfxEray_setTransmissionStartTime(eraySFR, (uint8)config->prtc1Control.transmissionStartTime);
190 IfxEray_setCollisionAvoidanceDuration(eraySFR, config->prtc1Control.collisionAvoidanceDuration);
191 IfxEray_setStrobePosition(eraySFR, config->prtc1Control.strobePosition);
192 IfxEray_setBaudrate(eraySFR, config->prtc1Control.baudrate);
193 IfxEray_setReceiveWakeupTimes(eraySFR, config->prtc1Control.receiveWakeupTestDuration, config->prtc2Control.receiveWakeupIdleTime, config->prtc2Control.receiveWakeupLowTime
194 );
195 IfxEray_setTransmitWakeupTimes(eraySFR, config->prtc1Control.transmitWakeupRepetitions, config->prtc2Control.transmitWakeupIdleTime, config->prtc2Control.transmitWakeupLowTime);
196 //MHDC
197 IfxEray_setMessageHandlerConfigurations(eraySFR, config->staticFramepayload, config->latestTransmissionStart);
198 // GTU
199 IfxEray_Eray_Node_initGTU(eray, &config->gtuConfig);
200 }
201
202
203 void IfxEray_Eray_Node_initConfig(IfxEray_Eray_NodeConfig *config)
204 {
205 // Default node configurations buffer
206 const IfxEray_Eray_NodeConfig nodeConfig = {
207 .messageRAMConfig = {
208 .firstDynamicBuffer = 0,
209 .numberOfMessageBuffers = 0,
210 .fifoBufferStartIndex = 0x80,
211 .fifoDepth = 30,
212 .frameIdFilter = 0x7FD,
213 .receiveChannel = IfxEray_ReceiveChannel_a,
214 .rejectedFrameId = 2,
215 .filteredCycleNumber = 0,
216 .staticFifoDisabled = FALSE,
217 .fifoNullFramesRejected = FALSE,
218 .bufferReconfigEnabled = TRUE,
219 .fifoConfigured = FALSE
220 },
221
222 .controllerConfig = {
223 .networkVectorLength = 0x2,
224 .staticFramepayload = 0x4,
225 .latestTransmissionStart = 0x3F,
226
227 .prtc1Control = {
228 .transmissionStartTime = 0xA,
229 .collisionAvoidanceDuration = 0x61,
230 .strobePosition = IfxEray_StrobePosition_5,
231 .baudrate = IfxEray_Baudrate_10,
232 .receiveWakeupTestDuration = 0x8C,
233 .transmitWakeupRepetitions = 0x2
234 },
235
236 .prtc2Control = {
237 .receiveWakeupIdleTime = 0x2D,
238 .receiveWakeupLowTime = 0x12,
239 .transmitWakeupIdleTime = 0x2D,
240 .transmitWakeupLowTime = 0x12
241 },
242
243 .succ1Config = {
244 .channelAConnectedNode = TRUE,
245 .channelBConnectedNode = TRUE,
246 .channelASymbolTransmitted = FALSE,
247 .channelBSymbolTransmitted = FALSE,
248 .clockSyncErrorHalt = TRUE,
249 .transmissionSlotMode = IfxEray_TransmissionSlotMode_single,
250 .wakeupPatternChannel = IfxEray_WakeupChannel_a,
251 .numberOfCyclePairsForActive = 0x7,
252 .maxColdStartAttempts = 0x1F,
253 .syncFrameTransmitted = TRUE,
254 .startupFrameTransmitted = TRUE
255 },
256
257 .succ2Config = {
258 .listenTimeOut = 0x13972,
259 .listenTimeOutNoise = IfxEray_ListenTimeOutNoise_16
260 },
261
262 .succ3Config = {
263 .clockCorrectionCyclesPassive = 0x1,
264 .clockCorrectionCyclesHalt = 0x1
265 },
266
267 .gtuConfig = {
268 .gtu01Config.microticksPerCycle = 0x9C40,
269
270 .gtu02Config = {
271 .macroticksPerCycle = 0x3E8,
272 .maxSyncFrames = 0x4
273 },
274
275 .gtu03Config = {
276 .channelAMicrotickInitialOffset = 0x19,
277 .channelBMicrotickInitialOffset = 0x19,
278 .channelAMacrotickInitialOffset = 0xA,
279 .channelBMacrotickInitialOffset = 0x2
280 },
281
282 .gtu04Config = {
283 .networkStartIdleTime = 0x38E,
284 .correctionOffset = 0x394
285 },
286
287 .gtu05Config = {
288 .channelAReceptionDelay = 0x4,
289 .channelBReceptionDelay = 0x4,
290 .clusterDrift = 1,
291 .decodingCorrection = 0x34
292 },
293
294 .gtu06Config = {
295 .acceptedStartupDeviation = 0x81,
296 .maxDriftOffset = 0xD2
297 },
298
299 .gtu07Config = {
300 .staticSlotLength = 0x32,
301 .staticSlotsCount = 0xC
302 },
303
304 .gtu08Config = {
305 .dynamicSlotLength = 4,
306 .dynamicSlotCount = 0x4B,
307 },
308
309 .gtu09Config = {
310 .idleDynamicSlots = IfxEray_IdleDynamicSlots_1,
311 .staticActionPoint = 8,
312 .dynamicActionPoint = 3
313 },
314
315 .gtu10Config = {
316 .maxOffsetCorrection = 0x32,
317 .maxRateCorrection = 0xD2
318 },
319
320 .gtu11Config = {
321 .externalOffsetCorrection = IfxEray_ExternalOffsetCorrection_0,
322 .externalRateCorrection = IfxEray_ExternalRateCorrection_0,
323 .externalOffset = IfxEray_ExternalOffset_noCorrection,
324 .externalRate = IfxEray_ExternalRate_noCorrection
325 },
326 },
327 },
328 .pins = NULL_PTR
329 };
330
331 *config = nodeConfig;
332 }
333
334
335 IFX_STATIC void IfxEray_Eray_Node_initGTU(IfxEray_Eray *eray, const IfxEray_Eray_GTUConfig *config)
336 {
337 Ifx_ERAY *eraySFR = eray->eray;
338
339 IfxEray_setCycleDurationMicroticks(eraySFR, config->gtu01Config.microticksPerCycle);
340 IfxEray_setCycleDurationMacroticks(eraySFR, config->gtu02Config.macroticksPerCycle);
341 IfxEray_setMaxSynchFrames(eraySFR, (IfxEray_MaxSynchFrames)config->gtu02Config.maxSyncFrames);
342 IfxEray_setChannelAInitialOffsets(eraySFR, config->gtu03Config.channelAMicrotickInitialOffset, config->gtu03Config.channelAMacrotickInitialOffset);
343 IfxEray_setChannelBInitialOffsets(eraySFR, config->gtu03Config.channelBMicrotickInitialOffset, config->gtu03Config.channelBMacrotickInitialOffset);
344 IfxEray_setNetworkStartIdleTime(eraySFR, config->gtu04Config.networkStartIdleTime);
345 IfxEray_setOffsetCorrection(eraySFR, config->gtu04Config.correctionOffset);
346 IfxEray_setChannelsReceiveDelay(eraySFR, config->gtu05Config.channelAReceptionDelay, config->gtu05Config.channelBReceptionDelay);
347 IfxEray_setDecodingCorrectionValue(eraySFR, config->gtu05Config.decodingCorrection);
348 IfxEray_setClusterDriftValues(eraySFR, config->gtu05Config.clusterDrift, config->gtu06Config.maxDriftOffset);
349 IfxEray_setClusterStartupDeviation(eraySFR, config->gtu06Config.acceptedStartupDeviation);
350 IfxEray_setStaticSlots(eraySFR, config->gtu07Config.staticSlotLength, config->gtu07Config.staticSlotsCount);
351 IfxEray_setDynamicSlots(eraySFR, config->gtu08Config.dynamicSlotLength, config->gtu08Config.dynamicSlotCount, config->gtu09Config.idleDynamicSlots);
352 IfxEray_setSlotActionPoints(eraySFR, config->gtu09Config.staticActionPoint, config->gtu09Config.dynamicActionPoint);
353 IfxEray_setMaxCorrectionValues(eraySFR, config->gtu10Config.maxOffsetCorrection, config->gtu10Config.maxRateCorrection);
354 IfxEray_setExternalCorrectionControl(eraySFR, config->gtu11Config.externalOffset, config->gtu11Config.externalRate);
355 IfxEray_setExternalCorrectionValues(eraySFR, config->gtu11Config.externalOffsetCorrection, config->gtu11Config.externalRateCorrection);
356 }
357
358
359 IFX_STATIC void IfxEray_Eray_Node_initMessageRAM(IfxEray_Eray *eray, const IfxEray_Eray_MessageRAMConfig *config)
360 {
361 Ifx_ERAY *eraySFR = eray->eray;
362 uint32 bufferCount;
363 //group of Message Buffers exclusively for the static segment configured
364 IfxEray_setFirstDynamicBuffer(eraySFR, config->firstDynamicBuffer);
365 /* Last Configured Buffer
366 * 01H..7FH: Number of Message Buffers is LCB + 1
367 * 80H..FFH: No Message Buffer configured
368 */
369 IfxEray_setMessageBufferCount(eraySFR, config->numberOfMessageBuffers);
370
371 // receive FIFO buffers configuration
372 if (config->fifoConfigured == TRUE)
373 {
374 IfxEray_setFifoBufferStartIndex(eraySFR, (uint8)config->fifoBufferStartIndex);
375 IfxEray_setFifoMessageBufferConfigurations(eraySFR, config->receiveChannel, config->staticFifoDisabled, config->fifoDepth);
376 IfxEray_setFifoFilterConfigurations(eraySFR, config->rejectedFrameId, config->filteredCycleNumber, config->fifoNullFramesRejected, config->frameIdFilter);
377 }
378 else
379 {
380 // FIFO is not supported. No message buffers assigned to the FIFO, if FFB >= 128
381 IfxEray_setFifoBufferStartIndex(eraySFR, (uint8)config->fifoBufferStartIndex);
382 }
383
384 if (config->bufferReconfigEnabled == TRUE)
385 {
386 //buffers reconfigured
387 IfxEray_setBufferReconfigSecure(eraySFR, 0);
388 }
389 else
390 {
391 //buffer reconfiguration locked
392 IfxEray_setBufferReconfigSecure(eraySFR, 2);
393 }
394
395 for (bufferCount = 0; bufferCount < config->numberOfMessageBuffers; bufferCount++)
396 {
397 IfxEray_setSlot(eraySFR, config->header[bufferCount], config->data[bufferCount], config->slotControl[bufferCount]);
398 }
399 }
400
401
402 void IfxEray_Eray_initModule(IfxEray_Eray *eray, const IfxEray_Eray_Config *config)
403 {
404 eray->eray = config->module;
405 Ifx_ERAY *eraySFR = config->module;
406 // Enable MTU clock
407 {
408 uint16 password = IfxScuWdt_getCpuWatchdogPassword();
409 IfxScuWdt_clearCpuEndinit(password);
410 IfxMtu_enableModule();
411 IfxScuWdt_setCpuEndinit(password);
412 }
413 // clear RAMS
414 {
415 uint16 password = IfxScuWdt_getSafetyWatchdogPassword();
416 IfxScuWdt_clearSafetyEndinit(password);
417
418 if (eraySFR == &MODULE_ERAY0)
419 {
420 IfxMtu_clearSram(IfxMtu_MbistSel_eray0Obf);
421 IfxMtu_clearSram(IfxMtu_MbistSel_eray0IbfTbf);
422 IfxMtu_clearSram(IfxMtu_MbistSel_eray0Mbf);
423 }
424
425 if (eraySFR == &MODULE_ERAY1)
426 {
427 IfxMtu_clearSram(IfxMtu_MbistSel_eray1Obf);
428 IfxMtu_clearSram(IfxMtu_MbistSel_eray1IbfTbf);
429 IfxMtu_clearSram(IfxMtu_MbistSel_eray1Mbf);
430 }
431
432 IfxScuWdt_setSafetyEndinit(password);
433 }
434
435 {
436 IfxEray_enableModule(eraySFR);
437 }
438
439 /** NOTE: If not DMA, the interrupt service provider is assigned to the CPU ID where
440 * this function is called from */
441 {
442 if ((config->interrupt.int0Priority != 0) || (config->interrupt.int0IsrProvider == IfxSrc_Tos_dma))
443 {
444 volatile Ifx_SRC_SRCR *src = IfxEray_getInterruptLine0SrcPtr(eraySFR);
445 IfxSrc_init(src, config->interrupt.int0IsrProvider, config->interrupt.int0Priority);
446 IfxSrc_enable(src);
447 }
448
449 if ((config->interrupt.int1Priority != 0) || (config->interrupt.int1IsrProvider == IfxSrc_Tos_dma))
450 {
451 volatile Ifx_SRC_SRCR *src = IfxEray_getInterruptLine1SrcPtr(eraySFR);
452 IfxSrc_init(src, config->interrupt.int1IsrProvider, config->interrupt.int1Priority);
453 IfxSrc_enable(src);
454 }
455
456 if ((config->interrupt.tint0Priority != 0) || (config->interrupt.tint0IsrProvider == IfxSrc_Tos_dma))
457 {
458 volatile Ifx_SRC_SRCR *src = IfxEray_getTimerInterrupt0SrcPtr(eraySFR);
459 IfxSrc_init(src, config->interrupt.tint0IsrProvider, config->interrupt.tint0Priority);
460 IfxSrc_enable(src);
461 }
462
463 if ((config->interrupt.tint1Priority != 0) || (config->interrupt.tint1IsrProvider == IfxSrc_Tos_dma))
464 {
465 volatile Ifx_SRC_SRCR *src = IfxEray_getTimerInterrupt1SrcPtr(eraySFR);
466 IfxSrc_init(src, config->interrupt.tint1IsrProvider, config->interrupt.tint1Priority);
467 IfxSrc_enable(src);
468 }
469
470 if ((config->interrupt.mbsc0Priority != 0) || (config->interrupt.mbsc0IsrProvider == IfxSrc_Tos_dma))
471 {
472 volatile Ifx_SRC_SRCR *src = IfxEray_getMessageBufferStatus0SrcPtr(eraySFR);
473 IfxSrc_init(src, config->interrupt.mbsc0IsrProvider, config->interrupt.mbsc0Priority);
474 IfxSrc_enable(src);
475 }
476
477 if ((config->interrupt.mbsc1Priority != 0) || (config->interrupt.mbsc1IsrProvider == IfxSrc_Tos_dma))
478 {
479 volatile Ifx_SRC_SRCR *src = IfxEray_getMessageBufferStatus1SrcPtr(eraySFR);
480 IfxSrc_init(src, config->interrupt.mbsc1IsrProvider, config->interrupt.mbsc1Priority);
481 IfxSrc_enable(src);
482 }
483
484 if ((config->interrupt.ibusyPriority != 0) || (config->interrupt.ibusyIsrProvider == IfxSrc_Tos_dma))
485 {
486 volatile Ifx_SRC_SRCR *src = IfxEray_getInputBufferBusySrcPtr(eraySFR);
487 IfxSrc_init(src, config->interrupt.ibusyIsrProvider, config->interrupt.ibusyPriority);
488 IfxSrc_enable(src);
489 }
490
491 if ((config->interrupt.obusyPriority != 0) || (config->interrupt.obusyIsrProvider == IfxSrc_Tos_dma))
492 {
493 volatile Ifx_SRC_SRCR *src = IfxEray_getOutputBufferBusySrcPtr(eraySFR);
494 IfxSrc_init(src, config->interrupt.obusyIsrProvider, config->interrupt.obusyPriority);
495 IfxSrc_enable(src);
496 }
497
498 if ((config->interrupt.ndat0Priority != 0) || (config->interrupt.ndat0IsrProvider == IfxSrc_Tos_dma))
499 {
500 volatile Ifx_SRC_SRCR *src = IfxEray_getNewDataInterrupt0SrcPtr(eraySFR);
501 IfxSrc_init(src, config->interrupt.ndat0IsrProvider, config->interrupt.ndat0Priority);
502 IfxSrc_enable(src);
503 }
504
505 if ((config->interrupt.ndat1Priority != 0) || (config->interrupt.ndat1IsrProvider == IfxSrc_Tos_dma))
506 {
507 volatile Ifx_SRC_SRCR *src = IfxEray_getNewDataInterrupt1SrcPtr(eraySFR);
508 IfxSrc_init(src, config->interrupt.ndat1IsrProvider, config->interrupt.ndat1Priority);
509 IfxSrc_enable(src);
510 }
511 }
512 }
513
514
515 void IfxEray_Eray_initModuleConfig(IfxEray_Eray_Config *config, Ifx_ERAY *eray)
516 {
517 config->module = eray;
518 config->interrupt.int0IsrProvider = IfxSrc_Tos_cpu0;
519 config->interrupt.int1IsrProvider = IfxSrc_Tos_cpu0;
520 config->interrupt.tint0IsrProvider = IfxSrc_Tos_cpu0;
521 config->interrupt.tint1IsrProvider = IfxSrc_Tos_cpu0;
522 config->interrupt.ndat0IsrProvider = IfxSrc_Tos_cpu0;
523 config->interrupt.ndat1IsrProvider = IfxSrc_Tos_cpu0;
524 config->interrupt.mbsc0IsrProvider = IfxSrc_Tos_cpu0;
525 config->interrupt.mbsc1IsrProvider = IfxSrc_Tos_cpu0;
526 config->interrupt.ibusyIsrProvider = IfxSrc_Tos_cpu0;
527 config->interrupt.obusyIsrProvider = IfxSrc_Tos_cpu0;
528
529 config->interrupt.int0Priority = 0;
530 config->interrupt.int1Priority = 0;
531 config->interrupt.tint0Priority = 0;
532 config->interrupt.tint1Priority = 0;
533 config->interrupt.ndat0Priority = 0;
534 config->interrupt.ndat1Priority = 0;
535 config->interrupt.mbsc0Priority = 0;
536 config->interrupt.mbsc1Priority = 0;
537 config->interrupt.ibusyPriority = 0;
538 config->interrupt.obusyPriority = 0;
539 }
540
541
542 void IfxEray_Eray_receiveFifoFrame(IfxEray_Eray *eray, IfxEray_Eray_ReceiveControl *config)
543 {
544 Ifx_ERAY *eraySFR = eray->eray;
545
546 Ifx_ERAY_FSR fifoStatus = IfxEray_getFifoStatus(eraySFR);
547
548 // Check if FIFO is not empty
549 if (fifoStatus.B.RFNE == 1)
550 {
551 if (fifoStatus.B.RFO == 1)
552 {
553 //FIX ME: FIFO overrun error
554 }
555 else
556 {
557 while (IfxEray_getOutputBufferBusyShadowStatus(eraySFR) == TRUE)
558 {}
559
560 IfxEray_receiveHeader(eraySFR, config->headerReceived);
561 IfxEray_receiveData(eraySFR, config->dataReceived);
562 //Transfer the first message buffer ID of FIFO
563 IfxEray_setRxBufferNumber(eraySFR, IfxEray_getFifoIndex(eraySFR));
564 IfxEray_setReceiveRequest(eraySFR, config->receiveRequested);
565
566 while (IfxEray_getOutputBufferBusyShadowStatus(eraySFR))
567 {}
568
569 if (config->swapRequested && (IfxEray_getOutputBuffer(eraySFR) != config->bufferIndex))
570 {
571 IfxEray_setViewData(eraySFR, config->swapRequested);
572 }
573 }
574 }
575 }
576
577
578 void IfxEray_Eray_receiveFrame(IfxEray_Eray *eray, IfxEray_Eray_ReceiveControl *config)
579 {
580 Ifx_ERAY *eraySFR = eray->eray;
581
582 while (IfxEray_getOutputBufferBusyShadowStatus(eraySFR) == TRUE)
583 {}
584
585 IfxEray_receiveHeader(eraySFR, config->headerReceived);
586 IfxEray_receiveData(eraySFR, config->dataReceived);
587 IfxEray_setRxBufferNumber(eraySFR, config->bufferIndex);
588 IfxEray_setReceiveRequest(eraySFR, config->receiveRequested);
589
590 while (IfxEray_getOutputBufferBusyShadowStatus(eraySFR) == TRUE)
591 {}
592
593 if (config->swapRequested && (IfxEray_getOutputBuffer(eraySFR) != config->bufferIndex))
594 {
595 IfxEray_setViewData(eraySFR, config->swapRequested);
596 }
597 }
598
599
600 void IfxEray_Eray_transmitFrame(IfxEray_Eray *eray, IfxEray_Eray_TransmitControl *transmitControl)
601 {
602 Ifx_ERAY *eraySFR = eray->eray;
603
604 while (IfxEray_getInputBufferBusyHostStatus(eraySFR) == TRUE)
605 {}
606
607 IfxEray_sendHeader(eraySFR, transmitControl->headerTransfered);
608 IfxEray_sendData(eraySFR, transmitControl->dataTransfered);
609 IfxEray_setTransmitRequest(eraySFR, transmitControl->transferRequested);
610 IfxEray_setTxBufferNumber(eraySFR, transmitControl->bufferIndex);
611
612 while (IfxEray_getInputBufferBusyShadowStatus(eraySFR) == TRUE)
613 {}
614
615 while (IfxEray_getInputBufferBusyHostStatus(eraySFR) == TRUE)
616 {}
617 }
IfxEray_Eray_Gtu04Config::networkStartIdleTime
uint16 networkStartIdleTime
starting point of Network Idle Time Phase.
Definition: IfxEray_Eray.h:560
IfxEray_Txd_Out
TXD pin mapping structure.
Definition: IfxEray_PinMap.h:65
IfxEray_setCollisionAvoidanceDuration
IFX_INLINE void IfxEray_setCollisionAvoidanceDuration(Ifx_ERAY *eray, uint8 collisionAvoidanceDuration)
Sets CAS symbol window duration.
Definition: IfxEray.h:1706
IfxEray_Eray_initModuleConfig
void IfxEray_Eray_initModuleConfig(IfxEray_Eray_Config *config, Ifx_ERAY *eray)
Inialises the default module configuration buffer.
Definition: IfxEray_Eray.c:515
IfxEray_Eray_GTUConfig::gtu07Config
IfxEray_Eray_Gtu07Config gtu07Config
GTU07 configuration.
Definition: IfxEray_Eray.h:639
IfxEray_Eray_Succ3Config::clockCorrectionCyclesHalt
uint8 clockCorrectionCyclesHalt
maximum number of cycles missing clock correctionlead to active or passive to halt.
Definition: IfxEray_Eray.h:724
IfxEray_setSlot
void IfxEray_setSlot(Ifx_ERAY *eray, const IfxEray_Header *header, const uint32 *data, const IfxEray_SlotConfig *slotConfig)
Writes header and data to Input buffers and set the slots.
Definition: IfxEray.c:295
IfxMtu.h
MTU basic functionality.
IfxMtu_MbistSel_eray1Mbf
Definition: IfxMtu_cfg.h:145
IfxEray_ReceiveChannel_a
channel B for reception
Definition: IfxEray.h:324
IfxEray_Eray_NodeA::txEnOutMode
IfxPort_OutputMode txEnOutMode
the TXEN pin output mode which should be configured.
Definition: IfxEray_Eray.h:653
IfxEray_getOutputBuffer
IFX_INLINE uint8 IfxEray_getOutputBuffer(Ifx_ERAY *eray)
Gets the output buffer index.
Definition: IfxEray.h:1483
IfxEray_Eray_Interrupt::ndat0Priority
uint16 ndat0Priority
the new data interrupt 0 priority. Always 1 since all interrupts are handled at a time...
Definition: IfxEray_Eray.h:754
IfxEray_Eray_Gtu05Config::decodingCorrection
uint8 decodingCorrection
decoding correction to determine the primary time reference point.
Definition: IfxEray_Eray.h:571
IfxEray_Eray_Interrupt::mbsc1Priority
uint16 mbsc1Priority
the message buffer status changed interrupt 1 priority. Always 1 since all interrupts are handled at ...
Definition: IfxEray_Eray.h:757
IfxEray_Baudrate_10
baudrate is 10MBits/Sec
Definition: IfxEray.h:81
IfxEray_setPocReady
void IfxEray_setPocReady(Ifx_ERAY *eray)
Sets the POC state to Ready state.
Definition: IfxEray.c:282
IfxEray_Eray_Config::module
Ifx_ERAY * module
pointer to ERAY module registers.
Definition: IfxEray_Eray.h:829
IfxEray_initRxPinWithPadLevel
IFX_INLINE void IfxEray_initRxPinWithPadLevel(const IfxEray_Rxd_In *rx, IfxPort_InputMode rxMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of pin direction as input and configuring pad driver...
Definition: IfxEray.h:1978
IfxEray_TransmissionSlotMode_single
transmission in key slot.
Definition: IfxEray.h:368
IfxEray_Eray_NodeA::rxIn
IFX_CONST IfxEray_Rxd_In * rxIn
the RX Pin which should be configured.
Definition: IfxEray_Eray.h:654
IfxEray_Eray_Succ1Config::channelAConnectedNode
boolean channelAConnectedNode
whether the node is connected to channel A.
Definition: IfxEray_Eray.h:707
IfxEray_Eray_Succ1Config::transmissionSlotMode
IfxEray_TransmissionSlotMode transmissionSlotMode
Initial transmission mode.
Definition: IfxEray_Eray.h:703
IfxEray_setStaticSlots
IFX_INLINE void IfxEray_setStaticSlots(Ifx_ERAY *eray, uint16 staticSlotLength, uint16 staticSlotsCount)
Sets static slots count and length.
Definition: IfxEray.h:1889
IfxEray_Eray_initModule
void IfxEray_Eray_initModule(IfxEray_Eray *eray, const IfxEray_Eray_Config *config)
Initialises the ERAY module with supplied configuration.
Definition: IfxEray_Eray.c:402
IfxEray_initTxEnPin
IFX_INLINE void IfxEray_initTxEnPin(const IfxEray_Txen_Out *txEn, IfxPort_OutputMode txEnMode, IfxPort_PadDriver padDriver)
Initializes a TX Enable output.
Definition: IfxEray.h:1580
IfxEray_Eray_Gtu11Config::externalRate
IfxEray_ExternalRate externalRate
External rate correction control.
Definition: IfxEray_Eray.h:622
IfxEray_Eray_Interrupt::obusyPriority
uint16 obusyPriority
the output buffer interrupt priority. Always 1 since all interrupts are handled at a time...
Definition: IfxEray_Eray.h:759
IfxEray_Eray_TransmitControl::headerTransfered
boolean headerTransfered
whether header section of frame is transfered or not.
Definition: IfxEray_Eray.h:865
IfxEray_receiveData
IFX_INLINE void IfxEray_receiveData(Ifx_ERAY *eray, boolean dataReceived)
requests to receive data from message buffer.
Definition: IfxEray.h:1606
IfxEray_Eray_MessageRAMConfig
Message RAM configuration structure.
Definition: IfxEray_Eray.h:774
IfxEray_setBufferReconfigSecure
IFX_INLINE void IfxEray_setBufferReconfigSecure(Ifx_ERAY *eray, uint8 secureValue)
Sets secured buffers in message RAM.
Definition: IfxEray.h:1650
IfxEray_Eray_GTUConfig::gtu01Config
IfxEray_Eray_Gtu01Config gtu01Config
GTU01 configuration.
Definition: IfxEray_Eray.h:633
IfxMtu_MbistSel_eray1IbfTbf
Definition: IfxMtu_cfg.h:143
IfxEray_Eray_Gtu03Config::channelBMacrotickInitialOffset
uint8 channelBMacrotickInitialOffset
difference between two adjacent static slots on channel B in macroticks.
Definition: IfxEray_Eray.h:553
IfxEray_Eray_NodeA::txEnOut
IFX_CONST IfxEray_Txen_Out * txEnOut
the TXEN Pin which should be configured.
Definition: IfxEray_Eray.h:656
IfxEray_waitForPocState
IFX_INLINE void IfxEray_waitForPocState(Ifx_ERAY *eray, IfxEray_PocState pocState)
Waits until the controller enters required POC state.
Definition: IfxEray.h:1971
IfxEray_Eray_NodeConfig
Node configuration structure.
Definition: IfxEray_Eray.h:835
IfxEray_Eray_Interrupt::ibusyPriority
uint16 ibusyPriority
the inputput buffer interrupt priority. Always 1 since all interrupts are handled at a time...
Definition: IfxEray_Eray.h:758
IfxEray_setOffsetCorrection
IFX_INLINE void IfxEray_setOffsetCorrection(Ifx_ERAY *eray, uint16 correctionOffset)
Sets offset correction starting point.
Definition: IfxEray.h:1847
IfxEray_Eray_ControllerConfig::succ1Config
IfxEray_Eray_Succ1Config succ1Config
communication controller control properties.
Definition: IfxEray_Eray.h:739
IfxMtu_MbistSel_eray0Mbf
Definition: IfxMtu_cfg.h:144
IfxEray_Eray_Node_initConfig
void IfxEray_Eray_Node_initConfig(IfxEray_Eray_NodeConfig *config)
Initialises the default node configuration buffer.
Definition: IfxEray_Eray.c:203
IfxEray_setBaudrate
IFX_INLINE void IfxEray_setBaudrate(Ifx_ERAY *eray, IfxEray_Baudrate baudrate)
Sets baudrate on Flexray bus.
Definition: IfxEray.h:1644
IfxEray_Eray_Prtc2Control::receiveWakeupIdleTime
uint8 receiveWakeupIdleTime
duration of received wakeup symbol idle phase.
Definition: IfxEray_Eray.h:688
IfxEray_Eray_ControllerConfig::networkVectorLength
uint32 networkVectorLength
length of network management vector.
Definition: IfxEray_Eray.h:735
IfxEray_ExternalOffset_noCorrection
No external correction control.
Definition: IfxEray.h:170
IfxEray_Eray_Gtu10Config::maxOffsetCorrection
uint16 maxOffsetCorrection
maximum offset correction to be applied by the internal clock synchronization algorithm.
Definition: IfxEray_Eray.h:611
IfxEray_setClusterStartupDeviation
IFX_INLINE void IfxEray_setClusterStartupDeviation(Ifx_ERAY *eray, uint16 acceptedStartupDeviation)
Sets cluster startup deviation.
Definition: IfxEray.h:1700
IfxEray_setWakeupPatternChannel
IFX_INLINE void IfxEray_setWakeupPatternChannel(Ifx_ERAY *eray, IfxEray_WakeupChannel wakeupPatternChannel)
Sets the cluster wakeup channel.
Definition: IfxEray.h:1965
IfxEray_Eray_Node_initMessageRAM
IFX_STATIC void IfxEray_Eray_Node_initMessageRAM(IfxEray_Eray *eray, const IfxEray_Eray_MessageRAMConfig *config)
Inialises the message RAM.
Definition: IfxEray_Eray.c:359
IfxMtu_clearSram
void IfxMtu_clearSram(IfxMtu_MbistSel mbistSel)
Function to Clear the MBIST SRAM (Synchronous mode). Note: The function clears & sets safety endinit ...
Definition: IfxMtu.c:126
IfxEray_setTxBufferNumber
IFX_INLINE void IfxEray_setTxBufferNumber(Ifx_ERAY *eray, uint8 bufferIndex)
Sets the transmit buffer number.
Definition: IfxEray.h:1953
IfxEray_Txen_Out
TXEN pin mapping structure.
Definition: IfxEray_PinMap.h:74
IfxEray_Eray_Gtu09Config::staticActionPoint
uint8 staticActionPoint
static slots and symbol window action point.
Definition: IfxEray_Eray.h:602
IfxEray_getNewDataInterrupt0SrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getNewDataInterrupt0SrcPtr(Ifx_ERAY *eray)
Gets the NDAT0 service request.
Definition: IfxEray.h:1446
IfxEray_Eray_TransmitControl::dataTransfered
boolean dataTransfered
whether data section of message buffer is transfered or not.
Definition: IfxEray_Eray.h:866
IfxEray_Eray_NodeConfig::controllerConfig
IfxEray_Eray_ControllerConfig controllerConfig
Communication Controller configuration structure.
Definition: IfxEray_Eray.h:838
IfxEray_Eray_Succ1Config::numberOfCyclePairsForActive
uint8 numberOfCyclePairsForActive
number of even / odd cycle pairs that must have valid clock correction terms.
Definition: IfxEray_Eray.h:701
IfxEray_Eray_Gtu03Config::channelAMicrotickInitialOffset
uint8 channelAMicrotickInitialOffset
difference between adjacent time reference points on channel A in microticks.
Definition: IfxEray_Eray.h:550
IfxEray_setActiveCyclePairs
IFX_INLINE void IfxEray_setActiveCyclePairs(Ifx_ERAY *eray, uint8 numberOfCyclePairsForActive)
Sets number of cycle pairs for Active state.
Definition: IfxEray.h:1630
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxEray_Eray_Succ1Config::channelASymbolTransmitted
boolean channelASymbolTransmitted
selects channel A for MTS symbol transmission.
Definition: IfxEray_Eray.h:705
IfxEray_Eray_receiveFrame
void IfxEray_Eray_receiveFrame(IfxEray_Eray *eray, IfxEray_Eray_ReceiveControl *config)
Transfers header and data from message buffer to output buffer.
Definition: IfxEray_Eray.c:578
IfxEray_Eray_Interrupt::int1Priority
uint16 int1Priority
the interrupt line 1 priority. Always 1 since all interrupts are handled at a time.
Definition: IfxEray_Eray.h:751
IfxEray_WakeupChannel_a
send wakeup channel pattern on channel A
Definition: IfxEray.h:375
IfxEray_Eray_Gtu09Config::dynamicActionPoint
uint8 dynamicActionPoint
dynamic slots action point.
Definition: IfxEray_Eray.h:603
IfxEray_Eray_transmitFrame
void IfxEray_Eray_transmitFrame(IfxEray_Eray *eray, IfxEray_Eray_TransmitControl *transmitControl)
Transfers the frame in given slot.
Definition: IfxEray_Eray.c:600
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
IfxEray_Eray_Interrupt::tint1IsrProvider
IfxSrc_Tos tint1IsrProvider
the timer interrupt line 1 service provider. CPU or DMA.
Definition: IfxEray_Eray.h:763
IfxEray_Eray_Gtu11Config::externalOffsetCorrection
IfxEray_ExternalOffsetCorrection externalOffsetCorrection
External clock offset correction value.
Definition: IfxEray_Eray.h:619
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxEray_receiveHeader
IFX_INLINE void IfxEray_receiveHeader(Ifx_ERAY *eray, boolean headerReceived)
request to receive header section from message buffer.
Definition: IfxEray.h:1612
IfxEray_Eray_GTUConfig::gtu05Config
IfxEray_Eray_Gtu05Config gtu05Config
GTU05 configuration.
Definition: IfxEray_Eray.h:637
IfxEray_getInputBufferBusyHostStatus
IFX_INLINE boolean IfxEray_getInputBufferBusyHostStatus(Ifx_ERAY *eray)
Gets the Input Buffer Host Busy status.
Definition: IfxEray.h:1358
IfxEray_Eray_Prtc1Control::transmissionStartTime
uint16 transmissionStartTime
duration of transmission start time.
Definition: IfxEray_Eray.h:681
IfxEray_Eray_Interrupt::tint0Priority
uint16 tint0Priority
the timer interrupt 0 priority. Always 1 since all interrupts are handled at a time.
Definition: IfxEray_Eray.h:752
IfxEray_setTransmissionStartTime
IFX_INLINE void IfxEray_setTransmissionStartTime(Ifx_ERAY *eray, uint8 transmissionStartTime)
Sets transmission start time duration.
Definition: IfxEray.h:1926
IfxEray_setExternalCorrectionControl
IFX_INLINE void IfxEray_setExternalCorrectionControl(Ifx_ERAY *eray, IfxEray_ExternalOffset externalOffset, IfxEray_ExternalRate externalRate)
Sets external correction controls.
Definition: IfxEray.h:1738
IfxEray_Eray_MessageRAMConfig::fifoDepth
uint8 fifoDepth
fifo critical level.
Definition: IfxEray_Eray.h:779
IfxEray_setTransmitRequest
IFX_INLINE void IfxEray_setTransmitRequest(Ifx_ERAY *eray, boolean transferRequested)
Sets transfer request to send frame.
Definition: IfxEray.h:1932
IfxEray_getTimerInterrupt0SrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getTimerInterrupt0SrcPtr(Ifx_ERAY *eray)
Gets the TINT0 service request.
Definition: IfxEray.h:1522
IfxEray_Eray_Gtu11Config::externalOffset
IfxEray_ExternalOffset externalOffset
External offset correction control.
Definition: IfxEray_Eray.h:621
IfxEray_setMessageHandlerConfigurations
IFX_INLINE void IfxEray_setMessageHandlerConfigurations(Ifx_ERAY *eray, uint8 staticFramepayload, uint8 latestTransmissionStart)
Sets Message Handler configurations.
Definition: IfxEray.h:1818
IfxEray_Eray_MessageRAMConfig::fifoConfigured
boolean fifoConfigured
Whether receive FIFO configured or not.
Definition: IfxEray_Eray.h:787
IfxEray_Eray_GTUConfig::gtu11Config
IfxEray_Eray_Gtu11Config gtu11Config
GTU11 configuration.
Definition: IfxEray_Eray.h:643
IfxEray_Eray_ControllerConfig
Communication Controller configuration structure.
Definition: IfxEray_Eray.h:733
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxEray_Eray_GTUConfig
Gloabl Timing Unit configuration structure.
Definition: IfxEray_Eray.h:631
IfxEray_Eray_Prtc2Control::receiveWakeupLowTime
uint8 receiveWakeupLowTime
duration of received wakeup symbol low phase.
Definition: IfxEray_Eray.h:689
IfxEray_PocState_halt
controller entered halt state
Definition: IfxEray.h:297
IfxEray_Eray_ControllerConfig::staticFramepayload
uint8 staticFramepayload
payload length of static frame in double bytes.
Definition: IfxEray_Eray.h:736
IfxEray_Eray_GTUConfig::gtu03Config
IfxEray_Eray_Gtu03Config gtu03Config
GTU03 configuration.
Definition: IfxEray_Eray.h:635
IfxEray_setMaxSynchFrames
IFX_INLINE void IfxEray_setMaxSynchFrames(Ifx_ERAY *eray, IfxEray_MaxSynchFrames maxSyncFrames)
Sets maximum synch frames in a cluster.
Definition: IfxEray.h:1806
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxEray_setListenTimeOuts
IFX_INLINE void IfxEray_setListenTimeOuts(Ifx_ERAY *eray, uint32 listenTimeOut, IfxEray_ListenTimeOutNoise listenTimeOutNoise)
Sets startup or wakeup listen timeouts.
Definition: IfxEray.h:1783
IfxEray_Eray_MessageRAMConfig::slotControl
IfxEray_SlotConfig * slotControl[128]
Transmit control properties.
Definition: IfxEray_Eray.h:789
IfxEray_sendData
IFX_INLINE void IfxEray_sendData(Ifx_ERAY *eray, boolean dataTransfered)
sets the bit to send data in frame.
Definition: IfxEray.h:1618
IfxEray_ExternalOffsetCorrection_0
external clock offset correction value 0
Definition: IfxEray.h:179
IfxEray_PocState_config
controller entered config state
Definition: IfxEray.h:299
IfxEray_Eray_GTUConfig::gtu06Config
IfxEray_Eray_Gtu06Config gtu06Config
GTU06 configuration.
Definition: IfxEray_Eray.h:638
IfxEray_setStrobePosition
IFX_INLINE void IfxEray_setStrobePosition(Ifx_ERAY *eray, IfxEray_StrobePosition strobePosition)
Sets sample point for strobing.
Definition: IfxEray.h:1896
IfxEray_Eray_Succ2Config::listenTimeOut
uint32 listenTimeOut
wakeup or startup listen timeout in microticks.
Definition: IfxEray_Eray.h:715
IfxEray_Eray_GTUConfig::gtu09Config
IfxEray_Eray_Gtu09Config gtu09Config
GTU09 configuration.
Definition: IfxEray_Eray.h:641
IfxEray_Eray_Prtc1Control::strobePosition
IfxEray_StrobePosition strobePosition
sample count value for strobing.
Definition: IfxEray_Eray.h:677
IfxMtu_enableModule
IFX_INLINE void IfxMtu_enableModule(void)
Enables the MTU module.
Definition: IfxMtu.h:816
IfxEray_Eray_Gtu07Config::staticSlotsCount
uint16 staticSlotsCount
number of static slots in a communication cycle.
Definition: IfxEray_Eray.h:587
IfxScuWdt_clearSafetyEndinit
void IfxScuWdt_clearSafetyEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:305
IfxEray_Eray_ControllerConfig::prtc1Control
IfxEray_Eray_Prtc1Control prtc1Control
protocol operation control properties.
Definition: IfxEray_Eray.h:742
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxEray_getInputBufferBusySrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getInputBufferBusySrcPtr(Ifx_ERAY *eray)
Gets the IBUSY service request.
Definition: IfxEray.h:1370
IfxEray_Eray_Prtc2Control::transmitWakeupLowTime
uint8 transmitWakeupLowTime
duration of transmit wakeup symbol low phase.
Definition: IfxEray_Eray.h:691
IfxEray_Eray_NodeA::rxInMode
IfxPort_InputMode rxInMode
the RX pin input mode which should be configured
Definition: IfxEray_Eray.h:650
IfxEray_Eray_Gtu05Config::channelAReceptionDelay
uint8 channelAReceptionDelay
reception delay on channel A.
Definition: IfxEray_Eray.h:568
IfxEray_Eray_Succ1Config::startupFrameTransmitted
boolean startupFrameTransmitted
whether the key slot is used to transmit startup Frames.
Definition: IfxEray_Eray.h:698
IfxEray_getFifoIndex
IFX_INLINE uint8 IfxEray_getFifoIndex(Ifx_ERAY *eray)
Gets the FIFO index.
Definition: IfxEray.h:1344
IfxEray_Eray_Interrupt::mbsc0IsrProvider
IfxSrc_Tos mbsc0IsrProvider
the message buffer status changed interrupt 0 service provider. CPU or DMA.
Definition: IfxEray_Eray.h:766
IfxEray_setAutoDelayBuffers
IFX_INLINE void IfxEray_setAutoDelayBuffers(Ifx_ERAY *eray)
Sets auto delays between input, output buffers and message RAM.
Definition: IfxEray.h:1636
IfxEray_Eray_Succ2Config::listenTimeOutNoise
IfxEray_ListenTimeOutNoise listenTimeOutNoise
upper limit for startup and wakeup listen timeout in the presence of noise.
Definition: IfxEray_Eray.h:716
IfxEray_setViewData
IFX_INLINE void IfxEray_setViewData(Ifx_ERAY *eray, boolean swapRequested)
Swaps the shadow and Host output registers.
Definition: IfxEray.h:1959
IfxEray_Eray_Config
Module configuration structure.
Definition: IfxEray_Eray.h:827
IfxEray_Eray_Interrupt::ndat1Priority
uint16 ndat1Priority
the new data interrupt 1 priority. Always 1 since all interrupts are handled at a time...
Definition: IfxEray_Eray.h:755
IfxEray_setFifoBufferStartIndex
IFX_INLINE void IfxEray_setFifoBufferStartIndex(Ifx_ERAY *eray, uint8 fifoBufferStartIndex)
Sets FIFO buffer start idex.
Definition: IfxEray.h:1752
IfxEray_Eray_Interrupt::ndat1IsrProvider
IfxSrc_Tos ndat1IsrProvider
the new data interrupt 1 service provider. CPU or DMA.
Definition: IfxEray_Eray.h:765
IfxEray_setRxBufferNumber
IFX_INLINE void IfxEray_setRxBufferNumber(Ifx_ERAY *eray, uint8 bufferIndex)
sets buffer number in which frame is received.
Definition: IfxEray.h:1867
IfxEray_setFifoMessageBufferConfigurations
IFX_INLINE void IfxEray_setFifoMessageBufferConfigurations(Ifx_ERAY *eray, IfxEray_ReceiveChannel receiveChannel, boolean staticFifoDisabled, uint8 fifoDepth)
Sets FIFO configurations.
Definition: IfxEray.h:1768
IfxEray_Eray_Interrupt::int0IsrProvider
IfxSrc_Tos int0IsrProvider
the interrupt line 0 service provider. CPU or DMA.
Definition: IfxEray_Eray.h:760
IfxEray_setTransmissionSlotMode
IFX_INLINE void IfxEray_setTransmissionSlotMode(Ifx_ERAY *eray, IfxEray_TransmissionSlotMode transmissionSlotMode)
Sets the transmit slot mode.
Definition: IfxEray.h:1920
IfxEray_getInputBufferBusyShadowStatus
IFX_INLINE uint8 IfxEray_getInputBufferBusyShadowStatus(Ifx_ERAY *eray)
Gets the Input Buffer Shadow status.
Definition: IfxEray.h:1364
IfxEray_getNewDataInterrupt1SrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getNewDataInterrupt1SrcPtr(Ifx_ERAY *eray)
Gets the NDAT1 service request.
Definition: IfxEray.h:1459
IfxEray_setMaxCorrectionValues
IFX_INLINE void IfxEray_setMaxCorrectionValues(Ifx_ERAY *eray, uint16 maxOffsetCorrection, uint16 maxRateCorrection)
Sets max limit correction values.
Definition: IfxEray.h:1799
IfxEray_setCycleDurationMicroticks
IFX_INLINE void IfxEray_setCycleDurationMicroticks(Ifx_ERAY *eray, uint32 microticks)
sets duration of the communication cycle in Microticks.
Definition: IfxEray.h:1718
IfxEray_Eray_NodeA::txOutMode
IfxPort_OutputMode txOutMode
the TX pin output mode which should be configured.
Definition: IfxEray_Eray.h:651
IfxEray_setReceiveRequest
IFX_INLINE void IfxEray_setReceiveRequest(Ifx_ERAY *eray, boolean receiveRequested)
requests to receive the frame.
Definition: IfxEray.h:1853
IfxEray_Eray_Succ3Config::clockCorrectionCyclesPassive
uint8 clockCorrectionCyclesPassive
maximum number of cycles missing clock correction lead active to passive state.
Definition: IfxEray_Eray.h:723
IfxEray_Eray_Interrupt::ndat0IsrProvider
IfxSrc_Tos ndat0IsrProvider
the new data interrupt 0 service provider. CPU or DMA.
Definition: IfxEray_Eray.h:764
IfxEray_Eray_Succ1Config::maxColdStartAttempts
uint8 maxColdStartAttempts
maximum number of attempts that a cold starting node is permitted.
Definition: IfxEray_Eray.h:700
IfxEray_setCycleDurationMacroticks
IFX_INLINE void IfxEray_setCycleDurationMacroticks(Ifx_ERAY *eray, uint16 macroticks)
sets duration of the communication cycle in Macroticks.
Definition: IfxEray.h:1712
IfxEray_Eray_Gtu02Config::maxSyncFrames
uint8 maxSyncFrames
Maximum number of sync frames in a cluster.
Definition: IfxEray_Eray.h:543
IfxMtu_MbistSel_eray1Obf
Definition: IfxMtu_cfg.h:141
IfxEray_getInterruptLine0SrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getInterruptLine0SrcPtr(Ifx_ERAY *eray)
Gets the INT0 service request.
Definition: IfxEray.h:1383
IfxEray_setNodeChannels
IFX_INLINE void IfxEray_setNodeChannels(Ifx_ERAY *eray, boolean channelAConnectedNode, boolean channelBConnectedNode)
Sets channels connected to node.
Definition: IfxEray.h:1840
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:50
IfxSrc_Tos_dma
DMA interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:69
IfxEray_setChannelAInitialOffsets
IFX_INLINE void IfxEray_setChannelAInitialOffsets(Ifx_ERAY *eray, uint8 channelAMicrotickInitialOffset, uint8 channelAMacrotickInitialOffset)
Sets channel A initial offstes.
Definition: IfxEray.h:1656
IfxEray_Eray_Gtu01Config::microticksPerCycle
uint32 microticksPerCycle
Duration of the communication cycle in Microticks.
Definition: IfxEray_Eray.h:535
IfxEray_PocCommand_freeze
command to controller to enter FREEZE
Definition: IfxEray.h:281
IfxEray_getInterruptLine1SrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getInterruptLine1SrcPtr(Ifx_ERAY *eray)
Gets the INT1 service request.
Definition: IfxEray.h:1396
IfxEray_Eray_ReceiveControl::bufferIndex
uint8 bufferIndex
buffer index in the Message RAM.
Definition: IfxEray_Eray.h:850
IfxEray_setExternalCorrectionValues
IFX_INLINE void IfxEray_setExternalCorrectionValues(Ifx_ERAY *eray, IfxEray_ExternalOffsetCorrection externalOffsetCorrection, IfxEray_ExternalRateCorrection externalRateCorrection)
Sets external correction values.
Definition: IfxEray.h:1745
IfxEray_Eray_GTUConfig::gtu08Config
IfxEray_Eray_Gtu08Config gtu08Config
GTU08 configuration.
Definition: IfxEray_Eray.h:640
IfxEray_getTimerInterrupt1SrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getTimerInterrupt1SrcPtr(Ifx_ERAY *eray)
Gets the TINT1 service request.
Definition: IfxEray.h:1535
IfxEray_Eray_Interrupt::int0Priority
uint16 int0Priority
the interrupt line 0 priority. Always 1 since all interrupts are handled at a time.
Definition: IfxEray_Eray.h:750
IfxEray_Eray_Pins::nodeBPins
IFX_CONST IfxEray_Eray_NodeB * nodeBPins
Pins configuration structure for Node B.
Definition: IfxEray_Eray.h:802
IfxEray_Eray_ControllerConfig::latestTransmissionStart
uint8 latestTransmissionStart
number of dynamic slots before inhibit frame transmission in dynamic segment.
Definition: IfxEray_Eray.h:737
IfxEray_Eray_MessageRAMConfig::bufferReconfigEnabled
boolean bufferReconfigEnabled
whether reconfiguration of message buffers is enabled or not.
Definition: IfxEray_Eray.h:786
IfxEray_Eray_Succ1Config::wakeupPatternChannel
IfxEray_WakeupChannel wakeupPatternChannel
Wakeup pattern carry channel.
Definition: IfxEray_Eray.h:702
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:68
IfxEray_getMessageBufferStatus0SrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getMessageBufferStatus0SrcPtr(Ifx_ERAY *eray)
Gets the MBSC0 service request.
Definition: IfxEray.h:1420
IfxEray_Eray_receiveFifoFrame
void IfxEray_Eray_receiveFifoFrame(IfxEray_Eray *eray, IfxEray_Eray_ReceiveControl *config)
Transfers frame from fifo in message RAM to Output buffer.
Definition: IfxEray_Eray.c:542
IfxEray_setSymbolChannels
IFX_INLINE void IfxEray_setSymbolChannels(Ifx_ERAY *eray, boolean channelASymbolTransmitted, boolean channelBSymbolTransmitted)
Sets channels which transmits symbols.
Definition: IfxEray.h:1913
IfxEray_Eray_ControllerConfig::succ3Config
IfxEray_Eray_Succ3Config succ3Config
clock correction fail properties.
Definition: IfxEray_Eray.h:741
IfxEray_Eray_Interrupt::tint0IsrProvider
IfxSrc_Tos tint0IsrProvider
the timer interrupt line 0 service provider. CPU or DMA.
Definition: IfxEray_Eray.h:762
IfxEray_setNetworkStartIdleTime
IFX_INLINE void IfxEray_setNetworkStartIdleTime(Ifx_ERAY *eray, uint16 networkStartIdleTime)
Sets network start Idle time.
Definition: IfxEray.h:1828
IfxEray_Eray_MessageRAMConfig::fifoNullFramesRejected
boolean fifoNullFramesRejected
whether null frames stored in fifo or not.
Definition: IfxEray_Eray.h:785
IfxEray_setClusterDriftValues
IFX_INLINE void IfxEray_setClusterDriftValues(Ifx_ERAY *eray, uint8 clusterDrift, uint16 maxDriftOffset)
Sets cluster drift values.
Definition: IfxEray.h:1693
IfxEray_setChannelsReceiveDelay
IFX_INLINE void IfxEray_setChannelsReceiveDelay(Ifx_ERAY *eray, uint8 channelAReceptionDelay, uint8 channelBReceptionDelay)
Sets receive delays on channels.
Definition: IfxEray.h:1670
IfxEray_setTransmitWakeupTimes
IFX_INLINE void IfxEray_setTransmitWakeupTimes(Ifx_ERAY *eray, uint8 transmitWakeupRepetitions, uint8 transmitWakeupIdleTime, uint8 transmitWakeupLowTime)
Sets transmit wakeup times.
Definition: IfxEray.h:1938
IfxEray_Eray_GTUConfig::gtu04Config
IfxEray_Eray_Gtu04Config gtu04Config
GTU04 configuration.
Definition: IfxEray_Eray.h:636
IfxEray_setFifoFilterConfigurations
IFX_INLINE void IfxEray_setFifoFilterConfigurations(Ifx_ERAY *eray, uint16 rejectedFrameId, uint8 filteredCycleNumber, boolean fifoNullFramesRejected, uint16 frameIdFilter)
Sets FIFO filter configurations.
Definition: IfxEray.h:1759
IfxEray_getOutputBufferBusySrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getOutputBufferBusySrcPtr(Ifx_ERAY *eray)
Gets the OBUSY service request.
Definition: IfxEray.h:1495
IfxEray_initTxPin
IFX_INLINE void IfxEray_initTxPin(const IfxEray_Txd_Out *tx, IfxPort_OutputMode txMode, IfxPort_PadDriver padDriver)
Initializes a TX output.
Definition: IfxEray.h:1587
IfxEray_Eray_ReceiveControl::dataReceived
boolean dataReceived
whether data selected for transfer from Message RAM to Output Buffer or not.
Definition: IfxEray_Eray.h:847
IfxEray_ExternalRateCorrection_0
external clock rate correction value 0
Definition: IfxEray.h:202
IfxEray_Eray_Gtu07Config::staticSlotLength
uint16 staticSlotLength
duration of static slot in macroticks.
Definition: IfxEray_Eray.h:586
IfxEray_Eray_Node_init
void IfxEray_Eray_Node_init(IfxEray_Eray *eray, const IfxEray_Eray_NodeConfig *config)
Initialises the Node with supplied configuration.
Definition: IfxEray_Eray.c:83
IfxEray_Eray_Gtu08Config::dynamicSlotCount
uint16 dynamicSlotCount
number of dynamic slots in a communication cycle.
Definition: IfxEray_Eray.h:595
IfxEray_Eray_Prtc1Control::baudrate
IfxEray_Baudrate baudrate
baud rate on the flexray bus.
Definition: IfxEray_Eray.h:678
IfxEray_setFirstDynamicBuffer
IFX_INLINE void IfxEray_setFirstDynamicBuffer(Ifx_ERAY *eray, uint8 firstDynamicBuffer)
Sets first dynamic buffer.
Definition: IfxEray.h:1776
IfxMtu_MbistSel_eray0Obf
Definition: IfxMtu_cfg.h:140
IfxEray_Eray_NodeConfig::pins
IFX_CONST IfxEray_Eray_Pins * pins
Pins configuration structure.
Definition: IfxEray_Eray.h:839
IfxEray_Eray_Interrupt::mbsc1IsrProvider
IfxSrc_Tos mbsc1IsrProvider
the message buffer status changed interrupt 1 service provider. CPU or DMA.
Definition: IfxEray_Eray.h:767
IfxEray_Eray_Interrupt::int1IsrProvider
IfxSrc_Tos int1IsrProvider
the interrupt line 1 service provider. CPU or DMA.
Definition: IfxEray_Eray.h:761
IfxEray_Eray::eray
Ifx_ERAY * eray
pointer to ERAY module registers.
Definition: IfxEray_Eray.h:813
IfxEray_sendHeader
IFX_INLINE void IfxEray_sendHeader(Ifx_ERAY *eray, boolean headerTransfered)
sets the bit to send header in frame.
Definition: IfxEray.h:1624
IfxEray_getOutputBufferBusyShadowStatus
IFX_INLINE boolean IfxEray_getOutputBufferBusyShadowStatus(Ifx_ERAY *eray)
Gets the Output Buffer Shadow status.
Definition: IfxEray.h:1489
IfxEray_Eray_Prtc1Control::transmitWakeupRepetitions
uint8 transmitWakeupRepetitions
duration of transmitted wakeup pattern in bit times.
Definition: IfxEray_Eray.h:680
IfxEray_Eray_Succ1Config::channelBConnectedNode
boolean channelBConnectedNode
whether the node is connected to channel B.
Definition: IfxEray_Eray.h:708
IfxEray_Eray_MessageRAMConfig::firstDynamicBuffer
uint8 firstDynamicBuffer
first dynamic buffer index.
Definition: IfxEray_Eray.h:776
IfxEray_Eray_Prtc1Control::collisionAvoidanceDuration
uint8 collisionAvoidanceDuration
accepted duration of collision avoidance symbol.
Definition: IfxEray_Eray.h:676
IfxEray_Eray_Succ1Config::channelBSymbolTransmitted
boolean channelBSymbolTransmitted
selects channel B for MTS symbol transmission
Definition: IfxEray_Eray.h:706
IfxEray_Eray_ReceiveControl::swapRequested
boolean swapRequested
whether output buffer shadow and output buffer host are swapped or not.
Definition: IfxEray_Eray.h:848
IfxEray_setDecodingCorrectionValue
IFX_INLINE void IfxEray_setDecodingCorrectionValue(Ifx_ERAY *eray, uint8 decodingCorrection)
Sets decoding correction value.
Definition: IfxEray.h:1724
IfxEray_Eray_Gtu05Config::channelBReceptionDelay
uint8 channelBReceptionDelay
reception delay on channel B.
Definition: IfxEray_Eray.h:569
IfxEray_Eray_NodeConfig::messageRAMConfig
IfxEray_Eray_MessageRAMConfig messageRAMConfig
Message RAM configuration structure.
Definition: IfxEray_Eray.h:837
IfxEray_setReceiveWakeupTimes
IFX_INLINE void IfxEray_setReceiveWakeupTimes(Ifx_ERAY *eray, uint16 receiveWakeupTestDuration, uint8 receiveWakeupIdleTime, uint8 receiveWakeupLowTime)
Sets receive wakeup times.
Definition: IfxEray.h:1859
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxEray_Eray_GTUConfig::gtu02Config
IfxEray_Eray_Gtu02Config gtu02Config
GTU02 configuration.
Definition: IfxEray_Eray.h:634
IfxEray_Rxd_In
RXD pin mapping structure.
Definition: IfxEray_PinMap.h:56
IfxEray_setDynamicSlots
IFX_INLINE void IfxEray_setDynamicSlots(Ifx_ERAY *eray, uint8 dynamicSlotLength, uint16 dynamicSlotCount, IfxEray_IdleDynamicSlots idleDynamicSlots)
Sets dynamic slots count and length.
Definition: IfxEray.h:1730
IfxEray_Eray_MessageRAMConfig::header
IfxEray_Header * header[128]
Header section of message buffer.
Definition: IfxEray_Eray.h:788
IfxEray_MaxSynchFrames
IfxEray_MaxSynchFrames
Maximum number of sync frames in a cluster defined in MODULE_ERAY0.GTU02.B.SNM.
Definition: IfxEray.h:252
IfxEray_setMaxColdStartAttempts
IFX_INLINE void IfxEray_setMaxColdStartAttempts(Ifx_ERAY *eray, uint8 maxColdStartAttempts)
Sets the maximum cold start attempts for active state.
Definition: IfxEray.h:1793
IfxScuWdt_setSafetyEndinit
void IfxScuWdt_setSafetyEndinit(uint16 password)
SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:668
IfxEray_Eray_ReceiveControl::headerReceived
boolean headerReceived
whether header selected for transfer from Message RAM to Output Buffer or not.
Definition: IfxEray_Eray.h:846
IfxEray_ExternalRate_noCorrection
No external correction control.
Definition: IfxEray.h:193
IfxScuWdt_getSafetyWatchdogPassword
uint16 IfxScuWdt_getSafetyWatchdogPassword(void)
SCUWDT API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.c:393
IfxEray_Eray_Gtu08Config::dynamicSlotLength
uint8 dynamicSlotLength
duration of dynamic slot in macroticks.
Definition: IfxEray_Eray.h:594
IfxEray_Eray_MessageRAMConfig::staticFifoDisabled
boolean staticFifoDisabled
fifo is not used in static segment.
Definition: IfxEray_Eray.h:784
IfxEray_Eray_Node_initGTU
IFX_STATIC void IfxEray_Eray_Node_initGTU(IfxEray_Eray *eray, const IfxEray_Eray_GTUConfig *config)
Initialises the Global Timing Unit.
Definition: IfxEray_Eray.c:335
IfxEray_PocCommand_config
command to controller to enter CONFIG
Definition: IfxEray.h:275
IfxEray_setChannelBInitialOffsets
IFX_INLINE void IfxEray_setChannelBInitialOffsets(Ifx_ERAY *eray, uint8 channelBMicrotickInitialOffset, uint8 channelBMacrotickInitialOffset)
Sets channel B initial offstes.
Definition: IfxEray.h:1663
IfxEray_Eray_Interrupt::ibusyIsrProvider
IfxSrc_Tos ibusyIsrProvider
the input buffer interrupt service provider. CPU or DMA.
Definition: IfxEray_Eray.h:768
IfxEray_setSlotActionPoints
IFX_INLINE void IfxEray_setSlotActionPoints(Ifx_ERAY *eray, uint8 staticActionPoint, uint8 dynamicActionPoint)
Sets slots action points.
Definition: IfxEray.h:1882
IfxEray_setNetworkVectorLength
IFX_INLINE void IfxEray_setNetworkVectorLength(Ifx_ERAY *eray, uint32 networkVectorLength)
Sets network management vector length.
Definition: IfxEray.h:1834
IfxEray_Eray_Pins::nodeAPins
IFX_CONST IfxEray_Eray_NodeA * nodeAPins
Pins configuration structure for Node A.
Definition: IfxEray_Eray.h:801
IfxEray_setMessageBufferCount
IFX_INLINE void IfxEray_setMessageBufferCount(Ifx_ERAY *eray, uint8 numberOfMessageBuffers)
Sets number of message buffers.
Definition: IfxEray.h:1812
IfxEray_Eray_Pins
Pins configuration structure.
Definition: IfxEray_Eray.h:799
IfxEray_ListenTimeOutNoise_16
listen Time-out noise 16
Definition: IfxEray.h:247
IfxEray_Eray_ReceiveControl
Receive control properties structure.
Definition: IfxEray_Eray.h:844
IfxEray_PocState_defaultConfig
controller entered default config state
Definition: IfxEray.h:293
IfxEray_Eray_MessageRAMConfig::fifoBufferStartIndex
uint32 fifoBufferStartIndex
message buffers assigned FIFO.
Definition: IfxEray_Eray.h:778
IfxEray_Eray_ControllerConfig::prtc2Control
IfxEray_Eray_Prtc2Control prtc2Control
wakeup symbol control properties.
Definition: IfxEray_Eray.h:743
IfxEray_Eray_MessageRAMConfig::data
uint32 * data[128]
data section of message buffer.
Definition: IfxEray_Eray.h:790
IfxEray_Eray_Gtu02Config::macroticksPerCycle
uint16 macroticksPerCycle
Duration of the communication cycle in Macroticks.
Definition: IfxEray_Eray.h:542
IfxEray_getPocState
IFX_INLINE IfxEray_PocState IfxEray_getPocState(Ifx_ERAY *eray)
Gets the current POC state.
Definition: IfxEray.h:1508
IfxEray_Eray_MessageRAMConfig::frameIdFilter
uint16 frameIdFilter
Frame ID used for rejection filtering.
Definition: IfxEray_Eray.h:780
IfxEray_Eray.h
ERAY ERAY details.
IfxEray_Eray_MessageRAMConfig::numberOfMessageBuffers
uint8 numberOfMessageBuffers
last configured buffer.
Definition: IfxEray_Eray.h:777
IfxEray_Eray_ReceiveControl::receiveRequested
boolean receiveRequested
Definition: IfxEray_Eray.h:849
IfxEray_Eray_Gtu10Config::maxRateCorrection
uint16 maxRateCorrection
maximum rate correction to be applied by the internal clock synchronization algorithm.
Definition: IfxEray_Eray.h:612
IfxEray_Eray_Succ1Config::clockSyncErrorHalt
boolean clockSyncErrorHalt
transition to HALT state due to a clock synchronization error.
Definition: IfxEray_Eray.h:704
IfxEray_IdleDynamicSlots_1
duration of dynamic slot idle phase is 1
Definition: IfxEray.h:217
IfxEray_Eray_MessageRAMConfig::receiveChannel
IfxEray_ReceiveChannel receiveChannel
FIFO receive channel.
Definition: IfxEray_Eray.h:781
IfxEray_getFifoStatus
IFX_INLINE Ifx_ERAY_FSR IfxEray_getFifoStatus(Ifx_ERAY *eray)
Gets the FIFO status.
Definition: IfxEray.h:1350
IfxEray_Eray_Succ1Config::syncFrameTransmitted
boolean syncFrameTransmitted
whether the key slot is used to transmit SYNC Frames.
Definition: IfxEray_Eray.h:699
IfxEray_Eray_NodeA::txOut
IFX_CONST IfxEray_Txd_Out * txOut
the TX Pin which should be configured.
Definition: IfxEray_Eray.h:655
IfxEray_Eray_NodeA
Pins configuration structure for Node A.
Definition: IfxEray_Eray.h:648
IfxEray_Eray_NodeB
Pins configuration structure for Node B.
Definition: IfxEray_Eray.h:661
IfxEray_Eray_TransmitControl::transferRequested
boolean transferRequested
whether frame in a slot is transfered or not.
Definition: IfxEray_Eray.h:867
IfxEray_StrobePosition_5
Sample count 5 for strobing.
Definition: IfxEray.h:341
IfxEray_enableModule
IFX_INLINE void IfxEray_enableModule(Ifx_ERAY *eray)
Enables the ERAY module.
Definition: IfxEray.h:1320
IfxMtu_MbistSel_eray0IbfTbf
Definition: IfxMtu_cfg.h:142
IfxEray_Eray_TransmitControl
Transfer control in a slot.
Definition: IfxEray_Eray.h:863
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxEray_Eray
ERAY Module handle.
Definition: IfxEray_Eray.h:811
IfxEray_Eray_NodeA::pinDriver
IfxPort_PadDriver pinDriver
the pad driver mode which should be configured.
Definition: IfxEray_Eray.h:652
IfxEray_Eray_Gtu05Config::clusterDrift
uint8 clusterDrift
cluster drift damping value used in clock synchronization.
Definition: IfxEray_Eray.h:570
IfxEray_Eray_Gtu11Config::externalRateCorrection
IfxEray_ExternalRateCorrection externalRateCorrection
External clock rate correction value.
Definition: IfxEray_Eray.h:620
IfxEray_Eray_Gtu09Config::idleDynamicSlots
IfxEray_IdleDynamicSlots idleDynamicSlots
duration of dynamic slot idle phase.
Definition: IfxEray_Eray.h:604
IfxEray_Eray_ControllerConfig::gtuConfig
IfxEray_Eray_GTUConfig gtuConfig
gloabl timing unit configuration structure.
Definition: IfxEray_Eray.h:738
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxEray_clearAllFlags
void IfxEray_clearAllFlags(Ifx_ERAY *eray)
Clears all the error flags.
Definition: IfxEray.c:123
IfxEray_enableInterruptLines
void IfxEray_enableInterruptLines(Ifx_ERAY *eray)
Enables all the Interrupt lines.
Definition: IfxEray.c:133
IfxEray_Eray_Interrupt::obusyIsrProvider
IfxSrc_Tos obusyIsrProvider
the output buffer interrupt service provider. CPU or DMA.
Definition: IfxEray_Eray.h:769
IfxEray_getMessageBufferStatus1SrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getMessageBufferStatus1SrcPtr(Ifx_ERAY *eray)
Gets the MBSC1 service request.
Definition: IfxEray.h:1433
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxEray_Eray_ControllerConfig::succ2Config
IfxEray_Eray_Succ2Config succ2Config
communication listen timeout properties.
Definition: IfxEray_Eray.h:740
IfxEray_Eray_Interrupt::mbsc0Priority
uint16 mbsc0Priority
the message buffer status changed interrupt 0 priority. Always 1 since all interrupts are handled at ...
Definition: IfxEray_Eray.h:756
IfxEray_setTransmittedFrames
IFX_INLINE void IfxEray_setTransmittedFrames(Ifx_ERAY *eray, boolean startupFrameTransmitted, boolean synchFrameTransmitted)
Configures transmitted frames for startup and synchronization.
Definition: IfxEray.h:1946
IfxEray_changePocState
boolean IfxEray_changePocState(Ifx_ERAY *eray, IfxEray_PocCommand pocCommand)
Changes the Commmunication Controller state.
Definition: IfxEray.c:99
IfxEray_Eray_GTUConfig::gtu10Config
IfxEray_Eray_Gtu10Config gtu10Config
GTU10 configuration.
Definition: IfxEray_Eray.h:642
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxEray_Eray_Gtu03Config::channelAMacrotickInitialOffset
uint8 channelAMacrotickInitialOffset
difference between two adjacent static slots on channel A in macroticks.
Definition: IfxEray_Eray.h:552
IfxEray_Eray_Gtu04Config::correctionOffset
uint16 correctionOffset
offset correction start point.
Definition: IfxEray_Eray.h:561
IfxEray_Eray_Prtc1Control::receiveWakeupTestDuration
uint8 receiveWakeupTestDuration
duration of received wakeup pattern in bit times.
Definition: IfxEray_Eray.h:679
IfxEray_Eray_Gtu06Config::maxDriftOffset
uint16 maxDriftOffset
maximum drift offset between two nodes.
Definition: IfxEray_Eray.h:579
IfxEray_setClockSynchErrorHalt
IFX_INLINE void IfxEray_setClockSynchErrorHalt(Ifx_ERAY *eray, boolean clockSyncErrorHalt)
lead to halt state in clock synch error.
Definition: IfxEray.h:1687
IfxEray_Eray_Prtc2Control::transmitWakeupIdleTime
uint8 transmitWakeupIdleTime
duration of transmit wakeup symbol idle phase.
Definition: IfxEray_Eray.h:690
IfxEray_Eray_MessageRAMConfig::filteredCycleNumber
uint8 filteredCycleNumber
the cycle set to which Frame ID and channel rejection filter are applied.
Definition: IfxEray_Eray.h:783
IfxEray_Eray_Gtu03Config::channelBMicrotickInitialOffset
uint8 channelBMicrotickInitialOffset
difference between adjacent time reference points on channel B in microticks.
Definition: IfxEray_Eray.h:551
IfxEray_Eray_MessageRAMConfig::rejectedFrameId
uint16 rejectedFrameId
frame ID to be rejected by the FIFO.
Definition: IfxEray_Eray.h:782
IfxEray_Eray_Interrupt::tint1Priority
uint16 tint1Priority
the timer interrupt 1 priority. Always 1 since all interrupts are handled at a time.
Definition: IfxEray_Eray.h:753
IfxEray_setClockCorrectionCycles
IFX_INLINE void IfxEray_setClockCorrectionCycles(Ifx_ERAY *eray, uint8 clockCorrectionCyclesPassive, uint8 clockCorrectionCyclesHalt)
Sets clock correction cycles for Passive and Halt.
Definition: IfxEray.h:1677
IfxEray_Eray_Gtu06Config::acceptedStartupDeviation
uint16 acceptedStartupDeviation
expanded range of measured deviation for startup Frames during integration.
Definition: IfxEray_Eray.h:578
IfxEray_Eray_Node_initCommunicationController
IFX_STATIC void IfxEray_Eray_Node_initCommunicationController(IfxEray_Eray *eray, const IfxEray_Eray_ControllerConfig *config)
Inialises the communication controller.
Definition: IfxEray_Eray.c:170
IfxEray_Eray_Config::interrupt
IfxEray_Eray_Interrupt interrupt
Interrupt control properties.
Definition: IfxEray_Eray.h:830


iLLD_TC38A: IfxEray_Eray.h Source File

  • Eray
  • Eray
IfxEray_Eray.h
Go to the documentation of this file.
1 /**
2 * \file IfxEray_Eray.h
3 * \brief ERAY ERAY details
4 * \ingroup IfxLld_Eray
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Eray_Eray_Usage How to use the ERAY Interface driver?
42 * \ingroup IfxLld_Eray
43 *
44 * \section IfxLld_Eray_Eray_Preparation Preparation
45 * \subsection IfxLld_Eray_Eray_Include Include Files
46 *
47 * Include following header file into your C code:
48 *
49 * \code
50 * #include <Eray/Eray/IfxEray_Eray.h>
51 * #include <Scu/Std/IfxScuWdt.h>
52 * #include <eray_commands.h>
53 * \endcode
54 *
55 *
56 *
57 * \subsection IfxLld_Eray_Eray_Defines Defines
58 * \code
59 *
60 * // Number of tested communication cycles
61 * #define NUMBER_ERAY_COMM_CYCLES 8
62 * #define NO_OF_SLOTS 2
63 * \endcode
64 *
65 * \subsection IfxLld_Eray_Eray_Variables Variables
66 *
67 * \code
68 * // global variables
69 * static IfxEray_Eray eray;
70 * volatile unsigned receivedDataCounter;
71 * uint32 receivedData[NUMBER_ERAY_COMM_CYCLES][NO_OF_SLOTS];
72 * \endcode
73 *
74 * \subsection IfxLld_Eray_Eray_Interrupt Interrupt Handler Installation
75 * Define priorities for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:
76 * \code
77 * #define IFX_ERAY_INT0_PRIO 1
78 * #define IFX_ERAY_INT1_PRIO 2
79 * #define IFX_ERAY_NDAT0_PRIO 3
80 * #define IFX_ERAY_NDAT1_PRIO 4
81 * #define IFX_ERAY_MBSC0_PRIO 5
82 * #define IFX_ERAY_MBSC1_PRIO 6
83 * \endcode
84 *
85 * Add the interrupt service routine to your C code. It has to call the ERAY interrupt handler:
86 * \code
87 * // ISR routines for interrupt handling
88 * void ERAY_irqInt0Handler();
89 * void ERAY_irqInt1Handler();
90 * void ERAY_irqNdat0Handler();
91 * void ERAY_irqNdat1Handler();
92 * void ERAY_irqMbsc0Handler();
93 * void ERAY_irqMbsc1Handler();
94 *
95 * IFX_INTERRUPT(eray0Int0ISR, 0, IFX_ERAY_INT0_PRIO)
96 * {
97 * ERAY_irqInt0Handler();
98 * }
99 * IFX_INTERRUPT(eray0Int1ISR, 0, IFX_ERAY_INT1_PRIO)
100 * {
101 * ERAY_irqInt1Handler();
102 * }
103 * IFX_INTERRUPT(eray0Ndat0ISR, 0, IFX_ERAY_NDAT0_PRIO)
104 * {
105 * ERAY_irqNdat0Handler();
106 * }
107 * IFX_INTERRUPT(eray0Ndat1ISR, 0, IFX_ERAY_NDAT1_PRIO)
108 * {
109 * ERAY_irqNdat1Handler();
110 * }
111 * IFX_INTERRUPT(eray0Mbsc0ISR, 0, IFX_ERAY_MBSC0_PRIO)
112 * {
113 * ERAY_irqMbsc0Handler();
114 * }
115 * IFX_INTERRUPT(eray0Mbsc1ISR, 0, IFX_ERAY_MBSC1_PRIO)
116 * {
117 * ERAY_irqMbsc1Handler();
118 * }
119 * \endcode
120 *
121 * Finally install the interrupt handlers in your initialisation function:
122 * \code
123 * // install interrupt handler
124 * IfxCpu_Irq_installInterruptHandler(&eray0Int0ISR, IFX_ERAY_INT0_PRIO);
125 * IfxCpu_Irq_installInterruptHandler(&eray0Int1ISR, IFX_ERAY_INT1_PRIO);
126 * IfxCpu_Irq_installInterruptHandler(&eray0Ndat0ISR, IFX_ERAY_NDAT0_PRIO);
127 * IfxCpu_Irq_installInterruptHandler(&eray0Ndat1ISR, IFX_ERAY_NDAT1_PRIO);
128 * IfxCpu_Irq_installInterruptHandler(&eray0Mbsc0ISR, IFX_ERAY_MBSC0_PRIO);
129 * IfxCpu_Irq_installInterruptHandler(&eray0Mbsc1ISR, IFX_ERAY_MBSC1_PRIO);
130 *
131 * // enable all cpu0 interrupts
132 * IfxCpu_enableInterrupts();
133 * \endcode
134 *
135 *
136 * \subsection IfxLld_Eray_Eray_Init Module Initialisation
137 *
138 * First ensure that the ERAY PLL is configured to output a 80 MHz clock for the ERAY module:
139 * \code
140 * // initialize Eray PLL
141 * //clib_ver_printf("Initialize ERAY PLL\n");
142 * {
143 * IfxScuCcu_ErayPllConfig ErayPllConfig;
144 * IfxScuCcu_initErayPllConfig(&ErayPllConfig);
145 * result |= IfxScuCcu_initErayPll(&ErayPllConfig);
146 * }
147 * \endcode
148 *
149 * Thereafter initialize the module:
150 * \code
151 * // create module config
152 * IfxEray_Eray_Config erayModuleConfig;
153 * #if TEST_ERAY1
154 * //clib_ver_printf("Initialize ERAY1\n");
155 * IfxEray_Eray_initModuleConfig(&erayModuleConfig, &MODULE_ERAY1);
156 * #else
157 * //clib_ver_printf("Initialize ERAY0\n");
158 * IfxEray_Eray_initModuleConfig(&erayModuleConfig, &MODULE_ERAY0);
159 * #endif
160 *
161 * // ISR priorities
162 * erayModuleConfig.interrupt.int0Priority = IFX_ERAY_INT0_PRIO;
163 * erayModuleConfig.interrupt.int1Priority = IFX_ERAY_INT1_PRIO;
164 * erayModuleConfig.interrupt.ndat0Priority = IFX_ERAY_NDAT0_PRIO;
165 * erayModuleConfig.interrupt.ndat1Priority = IFX_ERAY_NDAT1_PRIO;
166 * erayModuleConfig.interrupt.mbsc0Priority = IFX_ERAY_MBSC0_PRIO;
167 * erayModuleConfig.interrupt.mbsc1Priority = IFX_ERAY_MBSC1_PRIO;
168 *
169 * // init module
170 * IfxEray_Eray_initModule( &eray, &erayModuleConfig );
171 * \endcode
172 *
173 * Note: Application should explicitly configure the system DMA, if system DMA is selected as the service provider for the interrupt.
174 *
175 * \subsection IfxLld_Eray_Eray_Node_Init Node Initialisation
176 *
177 * The node initialisation can be done in the same function.
178 * \code
179 * // get ERAY node default configuration
180 * IfxEray_Eray_NodeConfig nodeConfig;
181 * IfxEray_Eray_Node_initConfig(&nodeConfig);
182 *
183 * // configuration changes for interaction with external testbench element
184 * {
185 * // only for simulation: start external ERAY node
186 * {
187 * TbeMessage reply;
188 *
189 * // start ERay Testbench Element
190 * sendMessage(MSG_ID_TESTBENCH_ERAY, CMD_ERAY_TBE_START, 0 );
191 * receiveMessageBlockingFrom(MSG_ID_TESTBENCH_ERAY, reply);
192 * }
193 *
194 * {
195 * // SUCC1
196 * IfxEray_Eray_Succ1Config *succ1 = &nodeConfig.controllerConfig.succ1Config;
197 *
198 * succ1->clockSyncErrorHalt = FALSE;
199 * }
200 *
201 * {
202 * // PRTC1
203 * IfxEray_Eray_Prtc1Control *prtc1 = &nodeConfig.controllerConfig.prtc1Control;
204 *
205 * prtc1->transmissionStartTime = 10;
206 * prtc1->collisionAvoidanceDuration = 0;
207 * prtc1->strobePosition = IfxEray_StrobePosition_5;
208 * prtc1->baudrate = IfxEray_Baudrate_10;
209 * prtc1->receiveWakeupTestDuration = 76;
210 * prtc1->transmitWakeupRepetitions = 2;
211 * }
212 *
213 * {
214 * // PRTC2
215 * IfxEray_Eray_Prtc2Control *prtc2 = &nodeConfig.controllerConfig.prtc2Control;
216 *
217 * prtc2->receiveWakeupIdleTime = 18;
218 * prtc2->receiveWakeupLowTime = 18;
219 * prtc2->transmitWakeupIdleTime = 180;
220 * prtc2->transmitWakeupLowTime = 60;
221 * }
222 *
223 * {
224 * // SUCC2
225 * IfxEray_Eray_Succ2Config *succ2 = &nodeConfig.controllerConfig.succ2Config;
226 * succ2->listenTimeOut = 2500;
227 * succ2->listenTimeOutNoise = IfxEray_ListenTimeOutNoise_16;
228 * }
229 *
230 * {
231 * // GTU
232 * IfxEray_Eray_GTUConfig *gtu = &nodeConfig.controllerConfig.gtuConfig;
233 *
234 * gtu->gtu01Config.microticksPerCycle = 3000;
235 * gtu->gtu02Config.macroticksPerCycle = 50;
236 * gtu->gtu02Config.maxSyncFrames = 15;
237 * gtu->gtu03Config.channelAMicrotickInitialOffset = 0;
238 * gtu->gtu03Config.channelBMicrotickInitialOffset = 0;
239 * gtu->gtu03Config.channelAMacrotickInitialOffset = 2;
240 * gtu->gtu03Config.channelBMacrotickInitialOffset = 2;
241 * gtu->gtu04Config.networkStartIdleTime = 0x2f;
242 * gtu->gtu04Config.correctionOffset = 0x30;
243 * gtu->gtu05Config.channelAReceptionDelay = 0x4;
244 * gtu->gtu05Config.channelBReceptionDelay = 0x4;
245 * gtu->gtu05Config.clusterDrift = 1;
246 * gtu->gtu05Config.decodingCorrection = 0x34;
247 * gtu->gtu06Config.acceptedStartupDeviation = 0x81;
248 * gtu->gtu06Config.maxDriftOffset = 0x31;
249 * gtu->gtu07Config.staticSlotLength = 0x10;
250 * gtu->gtu07Config.staticSlotsCount = 0x2;
251 * gtu->gtu08Config.dynamicSlotLength = 2;
252 * gtu->gtu08Config.dynamicSlotCount = 2;
253 * gtu->gtu09Config.idleDynamicSlots = IfxEray_IdleDynamicSlots_1; // bug: not set by IfxEray_setDynamicSlots
254 * gtu->gtu09Config.staticActionPoint = 1;
255 * gtu->gtu09Config.dynamicActionPoint = 1;
256 * gtu->gtu10Config.maxOffsetCorrection = 0xcd;
257 * gtu->gtu10Config.maxRateCorrection = 0x31;
258 * gtu->gtu11Config.externalOffsetCorrection = IfxEray_ExternalOffsetCorrection_0;
259 * gtu->gtu11Config.externalRateCorrection = IfxEray_ExternalRateCorrection_0;
260 * gtu->gtu11Config.externalOffset = IfxEray_ExternalOffset_noCorrection;
261 * gtu->gtu11Config.externalRate = IfxEray_ExternalRate_noCorrection;
262 * }
263 * }
264 *
265 * // Messages
266 * nodeConfig.messageRAMConfig.numberOfMessageBuffers = 2;
267 * nodeConfig.messageRAMConfig.firstDynamicBuffer = 0x40;
268 * nodeConfig.messageRAMConfig.fifoBufferStartIndex = 0x40;
269 *
270 * // Frame header
271 * IfxEray_Header header[2] = {
272 * // fid cyc cha chb buffer direction ppit transmission mode mbi pl dp startupfr syncfr
273 * { 1, 1, TRUE, TRUE, IfxEray_BufferDirection_transmit, TRUE, IfxEray_TransmissionMode_continuous, TRUE, 4, 0x30, TRUE, TRUE },
274 * { 2, 1, TRUE, TRUE, IfxEray_BufferDirection_receive, FALSE, IfxEray_TransmissionMode_continuous, TRUE, 4, 0x40, FALSE, FALSE },
275 * };
276 *
277 * // slot buffer
278 * IfxEray_SlotConfig slot[2] = {
279 * // header data stxrh buffNum
280 * { TRUE, TRUE, TRUE, 0 },
281 * { TRUE, FALSE, FALSE, 1 },
282 * };
283 *
284 * for(int i=0; i < 2; ++i) {
285 * nodeConfig.messageRAMConfig.header[i] = &header[i];
286 * nodeConfig.messageRAMConfig.slotControl[i] = &slot[i];
287 * nodeConfig.messageRAMConfig.data[i] = NULL_PTR;
288 * }
289 *
290 * #if TEST_ERAY1
291 * // channel A pins
292 * const IfxEray_Eray_NodeA nodeAPins = {
293 * IfxPort_InputMode_pullDown, IfxPort_OutputMode_pushPull,
294 * IfxPort_PadDriver_cmosAutomotiveSpeed3, IfxPort_OutputMode_pushPull,
295 * &IfxEray1_RXDA0_P14_8_IN, &IfxEray1_TXDA_P14_10_OUT,
296 * &IfxEray1_TXENA_P14_9_OUT
297 * };
298 *
299 * // channel B pins
300 * const IfxEray_Eray_NodeB nodeBPins = {
301 * IfxPort_InputMode_pullDown, IfxPort_OutputMode_pushPull,
302 * IfxPort_PadDriver_cmosAutomotiveSpeed3, IfxPort_OutputMode_pushPull,
303 * &IfxEray1_RXDB0_P14_7_IN, &IfxEray1_TXDB_P14_5_OUT,
304 * &IfxEray1_TXENB_P14_6_OUT
305 * };
306 * #else
307 * // channel A pins
308 * const IfxEray_Eray_NodeA nodeAPins = {
309 * IfxPort_InputMode_pullDown, IfxPort_OutputMode_pushPull,
310 * IfxPort_PadDriver_cmosAutomotiveSpeed3, IfxPort_OutputMode_pushPull,
311 * &IfxEray0_RXDA0_P14_8_IN, &IfxEray0_TXDA_P14_10_OUT,
312 * &IfxEray0_TXENA_P14_9_OUT
313 * };
314 *
315 * // channel B pins
316 * const IfxEray_Eray_NodeB nodeBPins = {
317 * IfxPort_InputMode_pullDown, IfxPort_OutputMode_pushPull,
318 * IfxPort_PadDriver_cmosAutomotiveSpeed3, IfxPort_OutputMode_pushPull,
319 * &IfxEray0_RXDB0_P14_7_IN, &IfxEray0_TXDB_P14_5_OUT,
320 * &IfxEray0_TXENB_P14_6_OUT
321 * };
322 * #endif
323 *
324 * const IfxEray_Eray_Pins pins = { (IfxEray_Eray_NodeA *)&nodeAPins, (IfxEray_Eray_NodeB *)&nodeBPins };
325 * nodeConfig.pins = (IfxEray_Eray_Pins *)&pins;
326 *
327 * // ERAY node initialisation with supplied configuration
328 * IfxEray_Eray_Node_init(&eray, &nodeConfig);
329 *
330 * // set interrupt outputs for data and message buffers
331 * IfxEray_Eray_setNewDataInterruptDestination(&eray, 0, 0); // New Data #0 -> NDAT0
332 * IfxEray_Eray_setNewDataInterruptDestination(&eray, 1, 1); // New Data #1 -> NDAT1
333 * IfxEray_Eray_setMessageBufferInterruptDestination(&eray, 0, 0); // Message Buffer #0 -> MBSC0
334 * IfxEray_Eray_setMessageBufferInterruptDestination(&eray, 1, 1); // Message Buffer #1 -> MBSC1
335 *
336 * //clib_ver_printf("Send wakeup pattern\n");
337 *
338 * // send wakeup pattern on default configured channel ( IfxEray_Channel_a )
339 * IfxEray_PocState pocState;
340 * do {
341 * pocState = IfxEray_Eray_getPocState( &eray );
342 * if ( pocState != IfxEray_PocState_wakeupListen ) {
343 * while ( !IfxEray_Eray_changePocState( &eray, IfxEray_PocCommand_wakeup ));
344 * }
345 * } while ( pocState != IfxEray_PocState_wakeupListen );
346 *
347 * // allow node to cold-start and wait until cold-start is successful
348 * while( !IfxEray_Eray_allowColdStart(&eray) );
349 *
350 * // start the communication in cluster and wait until communication is successfull
351 * while( !IfxEray_Eray_startCommunication(&eray) );
352 *
353 * // wait until communication Controller enters NORMAL_ACTIVE or NORMAL_PASSIVE state, exit if communication Controller enters HALT state.
354 * do {
355 * pocState = IfxEray_Eray_getPocState( &eray );
356 * // if communication Controller enters HALT state, break the loop.
357 * if( pocState == IfxEray_PocState_halt) {
358 * break;
359 * }
360 * } while( !((pocState == IfxEray_PocState_normalActive) || (pocState == IfxEray_PocState_normalPassive)) );
361 *
362 * // enter ALL_SLOTS mode when Communication Controller is in NORMAL_ACTIVE or NORMAL_PASSIVE state only.
363 * if ( pocState == IfxEray_PocState_normalActive || pocState == IfxEray_PocState_normalPassive ) {
364 * while ( !IfxEray_Eray_setPocAllSlots(&eray) );
365 * }
366 * \endcode
367 *
368 * \subsection IfxLld_Eray_Eray_TxRx Transactions
369 *
370 * \code
371 * unsigned prevReceivedDataCounter = 0;
372 * while( 1 ) {
373 * if( receivedDataCounter != prevReceivedDataCounter ) {
374 * prevReceivedDataCounter = receivedDataCounter;
375 * //clib_ver_printf("Received %d packets", receivedDataCounter);
376 *
377 * if( receivedDataCounter >= NUMBER_ERAY_COMM_CYCLES )
378 * break;
379 * }
380 * };
381 * \endcode
382 *
383 *
384 * \subsection IfxLld_Eray_Eray_ISR Interrupt Service Handlers
385 *
386 * The ISR has to be implemented in the application. Following templates can be used to react on the events:
387 *
388 * \code
389 * void ERAY_irqInt0Handler()
390 * {
391 * //clib_ver_note(1); // for debugging in simulation: notify Int0
392 *
393 * Ifx_ERAY_EIR ErrIntStat = IfxEray_Eray_getErrorInterrupts( &eray );
394 * Ifx_ERAY_SIR StatusIntStat = IfxEray_Eray_getStatusInterrupts( &eray );
395 *
396 * if(StatusIntStat.B.SDS)
397 * {
398 * // SDS must be cleared for getting the next interrupt
399 * IfxEray_Eray_clearStatusFlag( &eray, IfxEray_ClearStatusFlag_sds );
400 * }
401 * if(StatusIntStat.B.CYCS)
402 * {
403 * // CYCS must be cleared for getting the next interrupt
404 * IfxEray_Eray_clearStatusFlag( &eray, IfxEray_ClearStatusFlag_cycs );
405 * }
406 * if(StatusIntStat.B.SUCS)
407 * {
408 * // SUCS must be cleared for getting the next interrupt
409 * IfxEray_Eray_clearStatusFlag( &eray, IfxEray_ClearStatusFlag_sucs );
410 * }
411 * if(StatusIntStat.B.TIBC)
412 * {
413 * // TIBC must be cleared for getting the next interrupt
414 * IfxEray_Eray_clearStatusFlag( &eray, IfxEray_ClearStatusFlag_tibc );
415 * }
416 * if(ErrIntStat.B.MHF)
417 * {
418 * // clear flag MHF
419 * IfxEray_Eray_clearErrorFlag( &eray, IfxEray_ClearErrorFlag_mhf );
420 * }
421 * }
422 *
423 * void ERAY_irqInt1Handler()
424 * {
425 * //clib_ver_note(2); // for debugging in simulation: notify Int1
426 *
427 * // TOBC must be cleared for getting the next interrupt
428 * IfxEray_Eray_clearStatusFlag( &eray, IfxEray_ClearStatusFlag_tobc );
429 * }
430 *
431 * void ERAY_irqNdat0Handler()
432 * {
433 * //clib_ver_note(3); // for debugging in simulation: notify Ndat0
434 * }
435 *
436 * void ERAY_irqNdat1Handler()
437 * {
438 * //clib_ver_note(4); // for debugging in simulation: notify Ndat1
439 *
440 * // message received in slot1 buffer?
441 * if( IfxEray_Eray_getNewDataInterruptStatus(&eray, 1) == 1 )
442 * {
443 * // read data
444 * uint32 data[2];
445 *
446 * {
447 * IfxEray_Eray_ReceiveControl config;
448 * config.headerReceived = TRUE;
449 * config.dataReceived = TRUE;
450 * config.receiveRequested = TRUE;
451 * config.swapRequested = TRUE;
452 * config.bufferIndex = 1;
453 *
454 * IfxEray_Eray_receiveFrame(&eray, &config);
455 * IfxEray_Eray_readData(&eray, data, 2*2);
456 * }
457 *
458 * // display received data (Here received data has to be displayed)
459 * //clib_ver_data(data[0]);
460 * //clib_ver_data(data[1]);
461 *
462 * // store received data
463 * if( receivedDataCounter < NUMBER_ERAY_COMM_CYCLES ) {
464 * receivedData[receivedDataCounter][0] = data[0];
465 * receivedData[receivedDataCounter][1] = data[1];
466 * }
467 * ++receivedDataCounter;
468 *
469 * // put some new data into slot0
470 * ++data[0];
471 * ++data[1];
472 *
473 * {
474 * IfxEray_Eray_TransmitControl config;
475 * config.headerTransfered = FALSE;
476 * config.dataTransfered = TRUE;
477 * config.transferRequested = TRUE;
478 * config.bufferIndex = 0;
479 *
480 * IfxEray_Eray_writeData(&eray, data, 2*2);
481 * IfxEray_Eray_transmitFrame(&eray, &config);
482 * }
483 * }
484 * }
485 *
486 * void ERAY_irqMbsc0Handler()
487 * {
488 * //clib_ver_note(5); // for debugging in simulation: notify Mbsc0
489 * }
490 *
491 * void ERAY_irqMbsc1Handler()
492 * {
493 * //clib_ver_note(6); // for debugging in simulation: notify Mbsc1
494 * }
495 * \endcode
496 *
497 * \defgroup IfxLld_Eray_Eray ERAY
498 * \ingroup IfxLld_Eray
499 * \defgroup IfxLld_Eray_Eray_Structures Data Structures
500 * \ingroup IfxLld_Eray_Eray
501 * \defgroup IfxLld_Eray_Eray_Module Module Initialisation Functions
502 * \ingroup IfxLld_Eray_Eray
503 * \defgroup IfxLld_Eray_Eray_Node Node Initialisation Functions
504 * \ingroup IfxLld_Eray_Eray
505 * \defgroup IfxLld_Eray_Eray_Operative Operative Functions
506 * \ingroup IfxLld_Eray_Eray
507 * \defgroup IfxLld_Eray_Eray_Status Status Functions
508 * \ingroup IfxLld_Eray_Eray
509 * \defgroup IfxLld_Eray_Eray_Interrupt Interrupt Functions
510 * \ingroup IfxLld_Eray_Eray
511 */
512
513 #ifndef IFXERAY_ERAY_H
514 #define IFXERAY_ERAY_H 1
515
516 /******************************************************************************/
517 /*----------------------------------Includes----------------------------------*/
518 /******************************************************************************/
519
520 #include "Eray/Std/IfxEray.h"
521 #include "Cpu/Std/IfxCpu.h"
522 #include "Scu/Std/IfxScuWdt.h"
523 #include "Scu/Std/IfxScuCcu.h"
524
525 /******************************************************************************/
526 /*-----------------------------Data Structures--------------------------------*/
527 /******************************************************************************/
528
529 /** \addtogroup IfxLld_Eray_Eray_Structures
530 * \{ */
531 /** \brief GTU01 configuration.
532 */
533 typedef struct
534 {
535 uint32 microticksPerCycle; /**< \brief Duration of the communication cycle in Microticks. */
536 } IfxEray_Eray_Gtu01Config;
537
538 /** \brief GTU02 configuration.
539 */
540 typedef struct
541 {
542 uint16 macroticksPerCycle; /**< \brief Duration of the communication cycle in Macroticks. */
543 uint8 maxSyncFrames; /**< \brief Maximum number of sync frames in a cluster. */
544 } IfxEray_Eray_Gtu02Config;
545
546 /** \brief GTU03 configuration.
547 */
548 typedef struct
549 {
550 uint8 channelAMicrotickInitialOffset; /**< \brief difference between adjacent time reference points on channel A in microticks. */
551 uint8 channelBMicrotickInitialOffset; /**< \brief difference between adjacent time reference points on channel B in microticks. */
552 uint8 channelAMacrotickInitialOffset; /**< \brief difference between two adjacent static slots on channel A in macroticks. */
553 uint8 channelBMacrotickInitialOffset; /**< \brief difference between two adjacent static slots on channel B in macroticks. */
554 } IfxEray_Eray_Gtu03Config;
555
556 /** \brief GTU04 configuration.
557 */
558 typedef struct
559 {
560 uint16 networkStartIdleTime; /**< \brief starting point of Network Idle Time Phase. */
561 uint16 correctionOffset; /**< \brief offset correction start point. */
562 } IfxEray_Eray_Gtu04Config;
563
564 /** \brief GTU05 configuration.
565 */
566 typedef struct
567 {
568 uint8 channelAReceptionDelay; /**< \brief reception delay on channel A. */
569 uint8 channelBReceptionDelay; /**< \brief reception delay on channel B. */
570 uint8 clusterDrift; /**< \brief cluster drift damping value used in clock synchronization. */
571 uint8 decodingCorrection; /**< \brief decoding correction to determine the primary time reference point. */
572 } IfxEray_Eray_Gtu05Config;
573
574 /** \brief GTU06 configuration.
575 */
576 typedef struct
577 {
578 uint16 acceptedStartupDeviation; /**< \brief expanded range of measured deviation for startup Frames during integration. */
579 uint16 maxDriftOffset; /**< \brief maximum drift offset between two nodes. */
580 } IfxEray_Eray_Gtu06Config;
581
582 /** \brief GTU07 configuration.
583 */
584 typedef struct
585 {
586 uint16 staticSlotLength; /**< \brief duration of static slot in macroticks. */
587 uint16 staticSlotsCount; /**< \brief number of static slots in a communication cycle. */
588 } IfxEray_Eray_Gtu07Config;
589
590 /** \brief GTU08 configuration.
591 */
592 typedef struct
593 {
594 uint8 dynamicSlotLength; /**< \brief duration of dynamic slot in macroticks. */
595 uint16 dynamicSlotCount; /**< \brief number of dynamic slots in a communication cycle. */
596 } IfxEray_Eray_Gtu08Config;
597
598 /** \brief GTU09 configuration.
599 */
600 typedef struct
601 {
602 uint8 staticActionPoint; /**< \brief static slots and symbol window action point. */
603 uint8 dynamicActionPoint; /**< \brief dynamic slots action point. */
604 IfxEray_IdleDynamicSlots idleDynamicSlots; /**< \brief duration of dynamic slot idle phase. */
605 } IfxEray_Eray_Gtu09Config;
606
607 /** \brief GTU10 configuration.
608 */
609 typedef struct
610 {
611 uint16 maxOffsetCorrection; /**< \brief maximum offset correction to be applied by the internal clock synchronization algorithm. */
612 uint16 maxRateCorrection; /**< \brief maximum rate correction to be applied by the internal clock synchronization algorithm. */
613 } IfxEray_Eray_Gtu10Config;
614
615 /** \brief GTU11 configuration.
616 */
617 typedef struct
618 {
619 IfxEray_ExternalOffsetCorrection externalOffsetCorrection; /**< \brief External clock offset correction value. */
620 IfxEray_ExternalRateCorrection externalRateCorrection; /**< \brief External clock rate correction value. */
621 IfxEray_ExternalOffset externalOffset; /**< \brief External offset correction control. */
622 IfxEray_ExternalRate externalRate; /**< \brief External rate correction control. */
623 } IfxEray_Eray_Gtu11Config;
624
625 /** \} */
626
627 /** \addtogroup IfxLld_Eray_Eray_Structures
628 * \{ */
629 /** \brief Gloabl Timing Unit configuration structure.
630 */
631 typedef struct
632 {
633 IfxEray_Eray_Gtu01Config gtu01Config; /**< \brief GTU01 configuration. */
634 IfxEray_Eray_Gtu02Config gtu02Config; /**< \brief GTU02 configuration. */
635 IfxEray_Eray_Gtu03Config gtu03Config; /**< \brief GTU03 configuration. */
636 IfxEray_Eray_Gtu04Config gtu04Config; /**< \brief GTU04 configuration. */
637 IfxEray_Eray_Gtu05Config gtu05Config; /**< \brief GTU05 configuration. */
638 IfxEray_Eray_Gtu06Config gtu06Config; /**< \brief GTU06 configuration. */
639 IfxEray_Eray_Gtu07Config gtu07Config; /**< \brief GTU07 configuration. */
640 IfxEray_Eray_Gtu08Config gtu08Config; /**< \brief GTU08 configuration. */
641 IfxEray_Eray_Gtu09Config gtu09Config; /**< \brief GTU09 configuration. */
642 IfxEray_Eray_Gtu10Config gtu10Config; /**< \brief GTU10 configuration. */
643 IfxEray_Eray_Gtu11Config gtu11Config; /**< \brief GTU11 configuration. */
644 } IfxEray_Eray_GTUConfig;
645
646 /** \brief Pins configuration structure for Node A.
647 */
648 typedef struct
649 {
650 IfxPort_InputMode rxInMode; /**< \brief the RX pin input mode which should be configured */
651 IfxPort_OutputMode txOutMode; /**< \brief the TX pin output mode which should be configured. */
652 IfxPort_PadDriver pinDriver; /**< \brief the pad driver mode which should be configured. */
653 IfxPort_OutputMode txEnOutMode; /**< \brief the TXEN pin output mode which should be configured. */
654 IFX_CONST IfxEray_Rxd_In *rxIn; /**< \brief the RX Pin which should be configured. */
655 IFX_CONST IfxEray_Txd_Out *txOut; /**< \brief the TX Pin which should be configured. */
656 IFX_CONST IfxEray_Txen_Out *txEnOut; /**< \brief the TXEN Pin which should be configured. */
657 } IfxEray_Eray_NodeA;
658
659 /** \brief Pins configuration structure for Node B.
660 */
661 typedef struct
662 {
663 IfxPort_InputMode rxInMode; /**< \brief the RX pin input mode which should be configured */
664 IfxPort_OutputMode txOutMode; /**< \brief the TX pin output mode which should be configured. */
665 IfxPort_PadDriver pinDriver; /**< \brief the pad driver mode which should be configured. */
666 IfxPort_OutputMode txEnOutMode; /**< \brief the TXEN pin output mode which should be configured. */
667 IFX_CONST IfxEray_Rxd_In *rxIn; /**< \brief the RX Pin which should be configured. */
668 IFX_CONST IfxEray_Txd_Out *txOut; /**< \brief the TX Pin which should be configured. */
669 IFX_CONST IfxEray_Txen_Out *txEnOut; /**< \brief the TXEN Pin which should be configured. */
670 } IfxEray_Eray_NodeB;
671
672 /** \brief Protocol operation control properties.
673 */
674 typedef struct
675 {
676 uint8 collisionAvoidanceDuration; /**< \brief accepted duration of collision avoidance symbol. */
677 IfxEray_StrobePosition strobePosition; /**< \brief sample count value for strobing. */
678 IfxEray_Baudrate baudrate; /**< \brief baud rate on the flexray bus. */
679 uint8 receiveWakeupTestDuration; /**< \brief duration of received wakeup pattern in bit times. */
680 uint8 transmitWakeupRepetitions; /**< \brief duration of transmitted wakeup pattern in bit times. */
681 uint16 transmissionStartTime; /**< \brief duration of transmission start time. */
682 } IfxEray_Eray_Prtc1Control;
683
684 /** \brief Wakeup symbol control properties.
685 */
686 typedef struct
687 {
688 uint8 receiveWakeupIdleTime; /**< \brief duration of received wakeup symbol idle phase. */
689 uint8 receiveWakeupLowTime; /**< \brief duration of received wakeup symbol low phase. */
690 uint8 transmitWakeupIdleTime; /**< \brief duration of transmit wakeup symbol idle phase. */
691 uint8 transmitWakeupLowTime; /**< \brief duration of transmit wakeup symbol low phase. */
692 } IfxEray_Eray_Prtc2Control;
693
694 /** \brief communication controller control properties.
695 */
696 typedef struct
697 {
698 boolean startupFrameTransmitted; /**< \brief whether the key slot is used to transmit startup Frames. */
699 boolean syncFrameTransmitted; /**< \brief whether the key slot is used to transmit SYNC Frames. */
700 uint8 maxColdStartAttempts; /**< \brief maximum number of attempts that a cold starting node is permitted. */
701 uint8 numberOfCyclePairsForActive; /**< \brief number of even / odd cycle pairs that must have valid clock correction terms. */
702 IfxEray_WakeupChannel wakeupPatternChannel; /**< \brief Wakeup pattern carry channel */
703 IfxEray_TransmissionSlotMode transmissionSlotMode; /**< \brief Initial transmission mode. */
704 boolean clockSyncErrorHalt; /**< \brief transition to HALT state due to a clock synchronization error. */
705 boolean channelASymbolTransmitted; /**< \brief selects channel A for MTS symbol transmission. */
706 boolean channelBSymbolTransmitted; /**< \brief selects channel B for MTS symbol transmission */
707 boolean channelAConnectedNode; /**< \brief whether the node is connected to channel A. */
708 boolean channelBConnectedNode; /**< \brief whether the node is connected to channel B. */
709 } IfxEray_Eray_Succ1Config;
710
711 /** \brief Communication listen timeout properties.
712 */
713 typedef struct
714 {
715 uint32 listenTimeOut; /**< \brief wakeup or startup listen timeout in microticks. */
716 IfxEray_ListenTimeOutNoise listenTimeOutNoise; /**< \brief upper limit for startup and wakeup listen timeout in the presence of noise. */
717 } IfxEray_Eray_Succ2Config;
718
719 /** \brief Clock correction fail properties.
720 */
721 typedef struct
722 {
723 uint8 clockCorrectionCyclesPassive; /**< \brief maximum number of cycles missing clock correction lead active to passive state. */
724 uint8 clockCorrectionCyclesHalt; /**< \brief maximum number of cycles missing clock correctionlead to active or passive to halt. */
725 } IfxEray_Eray_Succ3Config;
726
727 /** \} */
728
729 /** \addtogroup IfxLld_Eray_Eray_Structures
730 * \{ */
731 /** \brief Communication Controller configuration structure.
732 */
733 typedef struct
734 {
735 uint32 networkVectorLength; /**< \brief length of network management vector. */
736 uint8 staticFramepayload; /**< \brief payload length of static frame in double bytes. */
737 uint8 latestTransmissionStart; /**< \brief number of dynamic slots before inhibit frame transmission in dynamic segment. */
738 IfxEray_Eray_GTUConfig gtuConfig; /**< \brief gloabl timing unit configuration structure. */
739 IfxEray_Eray_Succ1Config succ1Config; /**< \brief communication controller control properties. */
740 IfxEray_Eray_Succ2Config succ2Config; /**< \brief communication listen timeout properties. */
741 IfxEray_Eray_Succ3Config succ3Config; /**< \brief clock correction fail properties. */
742 IfxEray_Eray_Prtc1Control prtc1Control; /**< \brief protocol operation control properties. */
743 IfxEray_Eray_Prtc2Control prtc2Control; /**< \brief wakeup symbol control properties. */
744 } IfxEray_Eray_ControllerConfig;
745
746 /** \brief Interrupt control properties.
747 */
748 typedef struct
749 {
750 uint16 int0Priority; /**< \brief the interrupt line 0 priority. Always 1 since all interrupts are handled at a time. */
751 uint16 int1Priority; /**< \brief the interrupt line 1 priority. Always 1 since all interrupts are handled at a time. */
752 uint16 tint0Priority; /**< \brief the timer interrupt 0 priority. Always 1 since all interrupts are handled at a time. */
753 uint16 tint1Priority; /**< \brief the timer interrupt 1 priority. Always 1 since all interrupts are handled at a time. */
754 uint16 ndat0Priority; /**< \brief the new data interrupt 0 priority. Always 1 since all interrupts are handled at a time. */
755 uint16 ndat1Priority; /**< \brief the new data interrupt 1 priority. Always 1 since all interrupts are handled at a time. */
756 uint16 mbsc0Priority; /**< \brief the message buffer status changed interrupt 0 priority. Always 1 since all interrupts are handled at a time. */
757 uint16 mbsc1Priority; /**< \brief the message buffer status changed interrupt 1 priority. Always 1 since all interrupts are handled at a time. */
758 uint16 ibusyPriority; /**< \brief the inputput buffer interrupt priority. Always 1 since all interrupts are handled at a time. */
759 uint16 obusyPriority; /**< \brief the output buffer interrupt priority. Always 1 since all interrupts are handled at a time. */
760 IfxSrc_Tos int0IsrProvider; /**< \brief the interrupt line 0 service provider. CPU or DMA. */
761 IfxSrc_Tos int1IsrProvider; /**< \brief the interrupt line 1 service provider. CPU or DMA. */
762 IfxSrc_Tos tint0IsrProvider; /**< \brief the timer interrupt line 0 service provider. CPU or DMA. */
763 IfxSrc_Tos tint1IsrProvider; /**< \brief the timer interrupt line 1 service provider. CPU or DMA. */
764 IfxSrc_Tos ndat0IsrProvider; /**< \brief the new data interrupt 0 service provider. CPU or DMA. */
765 IfxSrc_Tos ndat1IsrProvider; /**< \brief the new data interrupt 1 service provider. CPU or DMA. */
766 IfxSrc_Tos mbsc0IsrProvider; /**< \brief the message buffer status changed interrupt 0 service provider. CPU or DMA. */
767 IfxSrc_Tos mbsc1IsrProvider; /**< \brief the message buffer status changed interrupt 1 service provider. CPU or DMA. */
768 IfxSrc_Tos ibusyIsrProvider; /**< \brief the input buffer interrupt service provider. CPU or DMA. */
769 IfxSrc_Tos obusyIsrProvider; /**< \brief the output buffer interrupt service provider. CPU or DMA. */
770 } IfxEray_Eray_Interrupt;
771
772 /** \brief Message RAM configuration structure.
773 */
774 typedef struct
775 {
776 uint8 firstDynamicBuffer; /**< \brief first dynamic buffer index. */
777 uint8 numberOfMessageBuffers; /**< \brief last configured buffer. */
778 uint32 fifoBufferStartIndex; /**< \brief message buffers assigned FIFO. */
779 uint8 fifoDepth; /**< \brief fifo critical level. */
780 uint16 frameIdFilter; /**< \brief Frame ID used for rejection filtering. */
781 IfxEray_ReceiveChannel receiveChannel; /**< \brief FIFO receive channel. */
782 uint16 rejectedFrameId; /**< \brief frame ID to be rejected by the FIFO. */
783 uint8 filteredCycleNumber; /**< \brief the cycle set to which Frame ID and channel rejection filter are applied. */
784 boolean staticFifoDisabled; /**< \brief fifo is not used in static segment. */
785 boolean fifoNullFramesRejected; /**< \brief whether null frames stored in fifo or not. */
786 boolean bufferReconfigEnabled; /**< \brief whether reconfiguration of message buffers is enabled or not. */
787 boolean fifoConfigured; /**< \brief Whether receive FIFO configured or not. */
788 IfxEray_Header *header[128]; /**< \brief Header section of message buffer. */
789 IfxEray_SlotConfig *slotControl[128]; /**< \brief Transmit control properties. */
790 uint32 *data[128]; /**< \brief data section of message buffer. */
791 } IfxEray_Eray_MessageRAMConfig;
792
793 /** \} */
794
795 /** \addtogroup IfxLld_Eray_Eray_Node
796 * \{ */
797 /** \brief Pins configuration structure.
798 */
799 typedef struct
800 {
801 IFX_CONST IfxEray_Eray_NodeA *nodeAPins; /**< \brief Pins configuration structure for Node A. */
802 IFX_CONST IfxEray_Eray_NodeB *nodeBPins; /**< \brief Pins configuration structure for Node B. */
803 } IfxEray_Eray_Pins;
804
805 /** \} */
806
807 /** \addtogroup IfxLld_Eray_Eray_Structures
808 * \{ */
809 /** \brief ERAY Module handle.
810 */
811 typedef struct
812 {
813 Ifx_ERAY *eray; /**< \brief pointer to ERAY module registers. */
814 } IfxEray_Eray;
815
816 /** \brief Reconfigurable buffer structure.
817 */
818 typedef struct
819 {
820 IfxEray_Header *header; /**< \brief header of a reconfigurable buffer. */
821 uint32 data[64]; /**< \brief data section of a reconfigurable buffer. */
822 IfxEray_SlotConfig *slotControl; /**< \brief message buffer configuration in message RAM. */
823 } IfxEray_Eray_BufferReconfig;
824
825 /** \brief Module configuration structure
826 */
827 typedef struct
828 {
829 Ifx_ERAY *module; /**< \brief pointer to ERAY module registers. */
830 IfxEray_Eray_Interrupt interrupt; /**< \brief Interrupt control properties. */
831 } IfxEray_Eray_Config;
832
833 /** \brief Node configuration structure.
834 */
835 typedef struct
836 {
837 IfxEray_Eray_MessageRAMConfig messageRAMConfig; /**< \brief Message RAM configuration structure. */
838 IfxEray_Eray_ControllerConfig controllerConfig; /**< \brief Communication Controller configuration structure. */
839 IFX_CONST IfxEray_Eray_Pins *pins; /**< \brief Pins configuration structure. */
840 } IfxEray_Eray_NodeConfig;
841
842 /** \brief Receive control properties structure.
843 */
844 typedef struct
845 {
846 boolean headerReceived; /**< \brief whether header selected for transfer from Message RAM to Output Buffer or not. */
847 boolean dataReceived; /**< \brief whether data selected for transfer from Message RAM to Output Buffer or not. */
848 boolean swapRequested; /**< \brief whether output buffer shadow and output buffer host are swapped or not. */
849 boolean receiveRequested; /**< \brief */
850 uint8 bufferIndex; /**< \brief buffer index in the Message RAM. */
851 } IfxEray_Eray_ReceiveControl;
852
853 /** \brief Received Frame.
854 */
855 typedef struct
856 {
857 IfxEray_ReceivedHeader header; /**< \brief received header in a frame. */
858 uint32 data[64]; /**< \brief received data in a frame. */
859 } IfxEray_Eray_ReceivedFrame;
860
861 /** \brief Transfer control in a slot.
862 */
863 typedef struct
864 {
865 boolean headerTransfered; /**< \brief whether header section of frame is transfered or not. */
866 boolean dataTransfered; /**< \brief whether data section of message buffer is transfered or not. */
867 boolean transferRequested; /**< \brief whether frame in a slot is transfered or not. */
868 uint8 bufferIndex; /**< \brief buffer index which gives slot for transfers. */
869 } IfxEray_Eray_TransmitControl;
870
871 /** \} */
872
873 /** \addtogroup IfxLld_Eray_Eray_Module
874 * \{ */
875
876 /******************************************************************************/
877 /*-------------------------Inline Function Prototypes-------------------------*/
878 /******************************************************************************/
879
880 /** \brief De-initialises the ERAY module.
881 * \param eray pointer to module handle.
882 * \return None
883 *
884 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
885 *
886 */
887 IFX_INLINE void IfxEray_Eray_deInitModule(IfxEray_Eray *eray);
888
889 /******************************************************************************/
890 /*-------------------------Global Function Prototypes-------------------------*/
891 /******************************************************************************/
892
893 /** \brief Initialises the ERAY module with supplied configuration.
894 * \param eray pointer to ERAY Module handle.
895 * \param config pointer to module configuration structure.
896 * \return None
897 *
898 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
899 *
900 */
901 IFX_EXTERN void IfxEray_Eray_initModule(IfxEray_Eray *eray, const IfxEray_Eray_Config *config);
902
903 /** \brief Inialises the default module configuration buffer.
904 * \param config pointer to module configuration structure.
905 * \param eray pointer ERAY module registers.
906 * \return None
907 *
908 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
909 *
910 */
911 IFX_EXTERN void IfxEray_Eray_initModuleConfig(IfxEray_Eray_Config *config, Ifx_ERAY *eray);
912
913 /** \} */
914
915 /** \addtogroup IfxLld_Eray_Eray_Node
916 * \{ */
917
918 /******************************************************************************/
919 /*-------------------------Global Function Prototypes-------------------------*/
920 /******************************************************************************/
921
922 /** \brief Initialises the Node with supplied configuration.
923 * \param eray pointer to ERAY Module handle.
924 * \param config pointer to node configuration structure.
925 * \return None
926 *
927 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
928 *
929 */
930 IFX_EXTERN void IfxEray_Eray_Node_init(IfxEray_Eray *eray, const IfxEray_Eray_NodeConfig *config);
931
932 /** \brief Initialises the default node configuration buffer.
933 * \param config pointer to node configuration structure.
934 * \return None
935 *
936 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
937 *
938 */
939 IFX_EXTERN void IfxEray_Eray_Node_initConfig(IfxEray_Eray_NodeConfig *config);
940
941 /** \} */
942
943 /** \addtogroup IfxLld_Eray_Eray_Operative
944 * \{ */
945
946 /******************************************************************************/
947 /*-------------------------Inline Function Prototypes-------------------------*/
948 /******************************************************************************/
949
950 /** \brief Allows node to enter the cold startup state.
951 * \param eray pointer to ERAY Module handle.
952 * \return TRUE if cold start successful otherwise FALSE.
953 *
954 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
955 *
956 */
957 IFX_INLINE boolean IfxEray_Eray_allowColdStart(IfxEray_Eray *eray);
958
959 /** \brief Reconfiguring the buffer or changing the slot.
960 * \param eray pointer to module handle.
961 * \param reconfigBuffer pointer reconfigurable buffer structure.
962 * \return None
963 *
964 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
965 *
966 */
967 IFX_INLINE void IfxEray_Eray_bufferReconfig(IfxEray_Eray *eray, IfxEray_Eray_BufferReconfig *reconfigBuffer);
968
969 /** \brief Changes the POC state and return status.
970 * \param eray pointer to module handle.
971 * \param PocCommand POC command to change state.
972 * \return TRUE if command accepted.
973 */
974 IFX_INLINE boolean IfxEray_Eray_changePocState(IfxEray_Eray *eray, IfxEray_PocCommand PocCommand);
975
976 /** \brief Reads the received data from output registers.
977 * \param eray pointer to module handle.
978 * \param data pointer to received data buffer.
979 * \param payloadLength payload length received in a frame.
980 * \return None
981 */
982 IFX_INLINE void IfxEray_Eray_readData(IfxEray_Eray *eray, uint32 *data, uint8 payloadLength);
983
984 /** \brief reads the frame received in a buffer.
985 * \param eray pointer to module handle.
986 * \param frame received frame in a buffer.
987 * \param maxPayloadLength maximum payload length received in a frame.
988 * \return None
989 *
990 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
991 *
992 */
993 IFX_INLINE void IfxEray_Eray_readFrame(IfxEray_Eray *eray, IfxEray_Eray_ReceivedFrame *frame, Ifx_SizeT maxPayloadLength);
994
995 /** \brief Sets the Controller state to ALL Slots mode.
996 * \param eray pointer to module handle.
997 * \return TRUE if All slots mode is successful otherwise FALSE.
998 *
999 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
1000 *
1001 */
1002 IFX_INLINE boolean IfxEray_Eray_setPocAllSlots(IfxEray_Eray *eray);
1003
1004 /** \brief Runs the communication controller.
1005 * \param eray pointer to ERAY Module handle.
1006 * \return TRUE if communication started otherwise FALSE.
1007 *
1008 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
1009 *
1010 */
1011 IFX_INLINE boolean IfxEray_Eray_startCommunication(IfxEray_Eray *eray);
1012
1013 /** \brief Wakeups the channel in a cluster.
1014 * \param eray pointer to ERAY Module handle.
1015 * \param channel wakeup channel Id.
1016 * \return None
1017 *
1018 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
1019 *
1020 */
1021 IFX_INLINE void IfxEray_Eray_wakeUpChannel(IfxEray_Eray *eray, IfxEray_Channel channel);
1022
1023 /** \brief Wakeups the node in a cluster.
1024 * \param eray pointer to ERAY Module handle.
1025 * \return TRUE if cluster is wakeup otherwise FALSE.
1026 *
1027 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
1028 *
1029 */
1030 IFX_INLINE boolean IfxEray_Eray_wakeUpCluster(IfxEray_Eray *eray);
1031
1032 /** \brief Writes data section of a frame to input data registers.
1033 * \param eray pointer to module handle.
1034 * \param data data section in frame.
1035 * \param payloadLength payload length configured for slot buffer.
1036 * \return None
1037 *
1038 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
1039 *
1040 */
1041 IFX_INLINE void IfxEray_Eray_writeData(IfxEray_Eray *eray, uint32 *data, uint8 payloadLength);
1042
1043 /******************************************************************************/
1044 /*-------------------------Global Function Prototypes-------------------------*/
1045 /******************************************************************************/
1046
1047 /** \brief Transfers frame from fifo in message RAM to Output buffer.
1048 * \param eray pointer to ERAY Module handle.
1049 * \param config pointer to receive control structure.
1050 * \return None
1051 *
1052 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
1053 *
1054 */
1055 IFX_EXTERN void IfxEray_Eray_receiveFifoFrame(IfxEray_Eray *eray, IfxEray_Eray_ReceiveControl *config);
1056
1057 /** \brief Transfers header and data from message buffer to output buffer.
1058 * \param eray pointer to ERAY Module handle.
1059 * \param config pointer to receive control structure.
1060 * \return None
1061 *
1062 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
1063 *
1064 */
1065 IFX_EXTERN void IfxEray_Eray_receiveFrame(IfxEray_Eray *eray, IfxEray_Eray_ReceiveControl *config);
1066
1067 /** \brief Transfers the frame in given slot.
1068 * \param eray pointer to module handle.
1069 * \param transmitControl transmits frame in a given slot.
1070 * \return None
1071 *
1072 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
1073 *
1074 */
1075 IFX_EXTERN void IfxEray_Eray_transmitFrame(IfxEray_Eray *eray, IfxEray_Eray_TransmitControl *transmitControl);
1076
1077 /** \} */
1078
1079 /** \addtogroup IfxLld_Eray_Eray_Status
1080 * \{ */
1081
1082 /******************************************************************************/
1083 /*-------------------------Inline Function Prototypes-------------------------*/
1084 /******************************************************************************/
1085
1086 /** \brief Gets the current node controller POC state.
1087 * \param eray pointer to module handle.
1088 * \return current POC state.
1089 */
1090 IFX_INLINE IfxEray_PocState IfxEray_Eray_getPocState(IfxEray_Eray *eray);
1091
1092 /** \brief Gets the received wakeup pattern channel.
1093 * \param eray pointer to module handle.
1094 * \return received wakeup pattern channel.
1095 *
1096 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
1097 *
1098 */
1099 IFX_INLINE IfxEray_WakeupChannel IfxEray_Eray_getWakeupPatternReceivedChannel(IfxEray_Eray *eray);
1100
1101 /** \} */
1102
1103 /** \addtogroup IfxLld_Eray_Eray_Interrupt
1104 * \{ */
1105
1106 /******************************************************************************/
1107 /*-------------------------Inline Function Prototypes-------------------------*/
1108 /******************************************************************************/
1109
1110 /** \brief clears the error interrupt flag requested.
1111 * \param eray pointer to module handle.
1112 * \param errorFlag error flag to be cleared.
1113 * \return None
1114 */
1115 IFX_INLINE void IfxEray_Eray_clearErrorFlag(IfxEray_Eray *eray, IfxEray_ClearErrorFlag errorFlag);
1116
1117 /** \brief Clears the status interrupt flag requested.
1118 * \param eray pointer to module handle.
1119 * \param statusFlag status flag to be cleared.
1120 * \return None
1121 */
1122 IFX_INLINE void IfxEray_Eray_clearStatusFlag(IfxEray_Eray *eray, IfxEray_ClearStatusFlag statusFlag);
1123
1124 /** \brief Gets the error interrupt status.
1125 * \param eray pointer to module handle.
1126 * \return error interrupt status.
1127 */
1128 IFX_INLINE Ifx_ERAY_EIR IfxEray_Eray_getErrorInterrupts(IfxEray_Eray *eray);
1129
1130 /** \brief Gets the message buffer interrupt status.
1131 * \param eray pointer to module handle.
1132 * \param messageBuffer message buffer to which interrupt status be checked.
1133 * \return message buffer interrupt status.
1134 */
1135 IFX_INLINE uint8 IfxEray_Eray_getMessageBufferInterruptStatus(IfxEray_Eray *eray, uint8 messageBuffer);
1136
1137 /** \brief Gets the new data interrupt buffers status.
1138 * \param eray pointer to module handle.
1139 * \param ndat ndat buffer to which interrupt status be checked.
1140 * \return ndat buffer interrupt status.
1141 */
1142 IFX_INLINE uint8 IfxEray_Eray_getNewDataInterruptStatus(IfxEray_Eray *eray, uint8 ndat);
1143
1144 /** \brief Gets the node status interrupts.
1145 * \param eray pointer to module handle.
1146 * \return node status interrupts.
1147 */
1148 IFX_INLINE Ifx_ERAY_SIR IfxEray_Eray_getStatusInterrupts(IfxEray_Eray *eray);
1149
1150 /** \brief Enables the message buffer interrupt line.
1151 * \param eray pointer to module handle.
1152 * \param messageBuffer message buffer interrupt which should be configured
1153 * \param messageBufferDestination selects MBSC0 or MBSC1 interrupt output
1154 * \return None
1155 *
1156 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
1157 *
1158 */
1159 IFX_INLINE void IfxEray_Eray_setMessageBufferInterruptDestination(IfxEray_Eray *eray, uint8 messageBuffer, uint8 messageBufferDestination);
1160
1161 /** \brief Enables the NDAT buffer interrupt line.
1162 * \param eray pointer to module handle.
1163 * \param ndat message buffer number configured to which ndat interrupt line to be set.
1164 * \param ndatDestination selects NDAT0 or NDAT1 interrupt output
1165 * \return None
1166 *
1167 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
1168 *
1169 */
1170 IFX_INLINE void IfxEray_Eray_setNewDataInterruptDestination(IfxEray_Eray *eray, uint8 ndat, uint8 ndatDestination);
1171
1172 /** \} */
1173
1174 /******************************************************************************/
1175 /*---------------------Inline Function Implementations------------------------*/
1176 /******************************************************************************/
1177
1178 IFX_INLINE boolean IfxEray_Eray_allowColdStart(IfxEray_Eray *eray)
1179 {
1180 return IfxEray_changePocState(eray->eray, IfxEray_PocCommand_coldStart);
1181 }
1182
1183
1184 IFX_INLINE void IfxEray_Eray_bufferReconfig(IfxEray_Eray *eray, IfxEray_Eray_BufferReconfig *reconfigBuffer)
1185 {
1186 IfxEray_setSlot(eray->eray, reconfigBuffer->header, reconfigBuffer->data, reconfigBuffer->slotControl);
1187 }
1188
1189
1190 IFX_INLINE boolean IfxEray_Eray_changePocState(IfxEray_Eray *eray, IfxEray_PocCommand PocCommand)
1191 {
1192 boolean status = IfxEray_changePocState(eray->eray, PocCommand);
1193 return status;
1194 }
1195
1196
1197 IFX_INLINE void IfxEray_Eray_clearErrorFlag(IfxEray_Eray *eray, IfxEray_ClearErrorFlag errorFlag)
1198 {
1199 IfxEray_clearErrorFlag(eray->eray, errorFlag);
1200 }
1201
1202
1203 IFX_INLINE void IfxEray_Eray_clearStatusFlag(IfxEray_Eray *eray, IfxEray_ClearStatusFlag statusFlag)
1204 {
1205 IfxEray_clearStatusFlag(eray->eray, statusFlag);
1206 }
1207
1208
1209 IFX_INLINE void IfxEray_Eray_deInitModule(IfxEray_Eray *eray)
1210 {
1211 //resets the kernel
1212 IfxEray_resetModule(eray->eray);
1213 }
1214
1215
1216 IFX_INLINE Ifx_ERAY_EIR IfxEray_Eray_getErrorInterrupts(IfxEray_Eray *eray)
1217 {
1218 Ifx_ERAY_EIR interruptFlags;
1219 interruptFlags = IfxEray_getErrorInterrupts(eray->eray);
1220 return interruptFlags;
1221 }
1222
1223
1224 IFX_INLINE uint8 IfxEray_Eray_getMessageBufferInterruptStatus(IfxEray_Eray *eray, uint8 messageBuffer)
1225 {
1226 uint8 messageBufferInterrupt = IfxEray_getMessageBufferInterruptStatus(eray->eray, messageBuffer);
1227 return messageBufferInterrupt;
1228 }
1229
1230
1231 IFX_INLINE uint8 IfxEray_Eray_getNewDataInterruptStatus(IfxEray_Eray *eray, uint8 ndat)
1232 {
1233 uint8 ndatInterrupt = IfxEray_getNewDataInterruptStatus(eray->eray, ndat);
1234 return ndatInterrupt;
1235 }
1236
1237
1238 IFX_INLINE IfxEray_PocState IfxEray_Eray_getPocState(IfxEray_Eray *eray)
1239 {
1240 return IfxEray_getPocState(eray->eray);
1241 }
1242
1243
1244 IFX_INLINE Ifx_ERAY_SIR IfxEray_Eray_getStatusInterrupts(IfxEray_Eray *eray)
1245 {
1246 Ifx_ERAY_SIR statusInterrupts = IfxEray_getStatusInterrupts(eray->eray);
1247 return statusInterrupts;
1248 }
1249
1250
1251 IFX_INLINE IfxEray_WakeupChannel IfxEray_Eray_getWakeupPatternReceivedChannel(IfxEray_Eray *eray)
1252 {
1253 IfxEray_WakeupChannel rxWakeupChannel;
1254 rxWakeupChannel = IfxEray_getWakeupPatternReceivedChannel(eray->eray);
1255
1256 return rxWakeupChannel;
1257 }
1258
1259
1260 IFX_INLINE void IfxEray_Eray_readData(IfxEray_Eray *eray, uint32 *data, uint8 payloadLength)
1261 {
1262 IfxEray_readData(eray->eray, data, payloadLength);
1263 }
1264
1265
1266 IFX_INLINE void IfxEray_Eray_readFrame(IfxEray_Eray *eray, IfxEray_Eray_ReceivedFrame *frame, Ifx_SizeT maxPayloadLength)
1267 {
1268 IfxEray_readFrame(eray->eray, &(frame->header), frame->data, maxPayloadLength);
1269 }
1270
1271
1272 IFX_INLINE void IfxEray_Eray_setMessageBufferInterruptDestination(IfxEray_Eray *eray, uint8 messageBuffer, uint8 messageBufferDestination)
1273 {
1274 IfxEray_setMessageBufferInterruptDestination(eray->eray, messageBuffer, messageBufferDestination);
1275 }
1276
1277
1278 IFX_INLINE void IfxEray_Eray_setNewDataInterruptDestination(IfxEray_Eray *eray, uint8 ndat, uint8 ndatDestination)
1279 {
1280 IfxEray_setNewDataInterruptDestination(eray->eray, ndat, ndatDestination);
1281 }
1282
1283
1284 IFX_INLINE boolean IfxEray_Eray_setPocAllSlots(IfxEray_Eray *eray)
1285 {
1286 return IfxEray_changePocState(eray->eray, IfxEray_PocCommand_allSlots);
1287 }
1288
1289
1290 IFX_INLINE boolean IfxEray_Eray_startCommunication(IfxEray_Eray *eray)
1291 {
1292 return IfxEray_changePocState(eray->eray, IfxEray_PocCommand_run);
1293 }
1294
1295
1296 IFX_INLINE void IfxEray_Eray_wakeUpChannel(IfxEray_Eray *eray, IfxEray_Channel channel)
1297 {
1298 Ifx_ERAY *eraySFR = eray->eray;
1299 boolean result = IfxEray_changePocState(eraySFR, IfxEray_PocCommand_config);
1300
1301 if (result == TRUE)
1302 {
1303 eraySFR->SUCC1.B.WUCS = channel;
1304 IfxEray_setPocReady(eray->eray);
1305 }
1306 }
1307
1308
1309 IFX_INLINE boolean IfxEray_Eray_wakeUpCluster(IfxEray_Eray *eray)
1310 {
1311 return IfxEray_changePocState(eray->eray, IfxEray_PocCommand_wakeup);
1312 }
1313
1314
1315 IFX_INLINE void IfxEray_Eray_writeData(IfxEray_Eray *eray, uint32 *data, uint8 payloadLength)
1316 {
1317 IfxEray_writeData(eray->eray, data, payloadLength);
1318 }
1319
1320
1321 #endif /* IFXERAY_ERAY_H */
IfxEray_SlotConfig
Transmit control structure.
Definition: IfxEray.h:421
IfxEray_Eray_Gtu04Config::networkStartIdleTime
uint16 networkStartIdleTime
starting point of Network Idle Time Phase.
Definition: IfxEray_Eray.h:560
IfxEray_Txd_Out
TXD pin mapping structure.
Definition: IfxEray_PinMap.h:65
IfxEray_WakeupChannel
IfxEray_WakeupChannel
Wakeup pattern carry channel, defined in MODULE_ERAY0.SUCC1.B.WUCS.
Definition: IfxEray.h:373
IfxEray_Eray_initModuleConfig
IFX_EXTERN void IfxEray_Eray_initModuleConfig(IfxEray_Eray_Config *config, Ifx_ERAY *eray)
Inialises the default module configuration buffer.
Definition: IfxEray_Eray.c:515
IfxEray_Eray_GTUConfig::gtu07Config
IfxEray_Eray_Gtu07Config gtu07Config
GTU07 configuration.
Definition: IfxEray_Eray.h:639
IfxEray_Eray_Succ3Config::clockCorrectionCyclesHalt
uint8 clockCorrectionCyclesHalt
maximum number of cycles missing clock correctionlead to active or passive to halt.
Definition: IfxEray_Eray.h:724
IfxEray_setSlot
void IfxEray_setSlot(Ifx_ERAY *eray, const IfxEray_Header *header, const uint32 *data, const IfxEray_SlotConfig *slotConfig)
Writes header and data to Input buffers and set the slots.
Definition: IfxEray.c:295
IfxEray_Eray_getNewDataInterruptStatus
IFX_INLINE uint8 IfxEray_Eray_getNewDataInterruptStatus(IfxEray_Eray *eray, uint8 ndat)
Gets the new data interrupt buffers status.
Definition: IfxEray_Eray.h:1231
IfxEray_Eray_NodeA::txEnOutMode
IfxPort_OutputMode txEnOutMode
the TXEN pin output mode which should be configured.
Definition: IfxEray_Eray.h:653
IfxEray_Eray_Interrupt::ndat0Priority
uint16 ndat0Priority
the new data interrupt 0 priority. Always 1 since all interrupts are handled at a time...
Definition: IfxEray_Eray.h:754
IfxEray_Eray_Gtu05Config::decodingCorrection
uint8 decodingCorrection
decoding correction to determine the primary time reference point.
Definition: IfxEray_Eray.h:571
IfxEray_Eray_Prtc1Control
Protocol operation control properties.
Definition: IfxEray_Eray.h:674
IfxEray_PocCommand_run
command to controller to enter RUN
Definition: IfxEray.h:278
IfxEray_Eray_Interrupt::mbsc1Priority
uint16 mbsc1Priority
the message buffer status changed interrupt 1 priority. Always 1 since all interrupts are handled at ...
Definition: IfxEray_Eray.h:757
IfxEray_Eray_deInitModule
IFX_INLINE void IfxEray_Eray_deInitModule(IfxEray_Eray *eray)
De-initialises the ERAY module.
Definition: IfxEray_Eray.h:1209
IfxEray_Eray_Prtc2Control
Wakeup symbol control properties.
Definition: IfxEray_Eray.h:686
IfxEray_setPocReady
void IfxEray_setPocReady(Ifx_ERAY *eray)
Sets the POC state to Ready state.
Definition: IfxEray.c:282
IfxEray_Eray_Config::module
Ifx_ERAY * module
pointer to ERAY module registers.
Definition: IfxEray_Eray.h:829
IfxEray_Eray_NodeA::rxIn
IFX_CONST IfxEray_Rxd_In * rxIn
the RX Pin which should be configured.
Definition: IfxEray_Eray.h:654
IfxEray_Eray_readData
IFX_INLINE void IfxEray_Eray_readData(IfxEray_Eray *eray, uint32 *data, uint8 payloadLength)
Reads the received data from output registers.
Definition: IfxEray_Eray.h:1260
IfxEray_Eray_Succ1Config::channelAConnectedNode
boolean channelAConnectedNode
whether the node is connected to channel A.
Definition: IfxEray_Eray.h:707
IfxEray_Eray_Succ1Config::transmissionSlotMode
IfxEray_TransmissionSlotMode transmissionSlotMode
Initial transmission mode.
Definition: IfxEray_Eray.h:703
IfxEray_Eray_setMessageBufferInterruptDestination
IFX_INLINE void IfxEray_Eray_setMessageBufferInterruptDestination(IfxEray_Eray *eray, uint8 messageBuffer, uint8 messageBufferDestination)
Enables the message buffer interrupt line.
Definition: IfxEray_Eray.h:1272
IfxEray_Eray_initModule
IFX_EXTERN void IfxEray_Eray_initModule(IfxEray_Eray *eray, const IfxEray_Eray_Config *config)
Initialises the ERAY module with supplied configuration.
Definition: IfxEray_Eray.c:402
IfxEray_setNewDataInterruptDestination
void IfxEray_setNewDataInterruptDestination(Ifx_ERAY *eray, uint8 ndat, uint8 ndatDestination)
Selects between NDAT0 and NDAT1 interrupt destination.
Definition: IfxEray.c:264
IfxEray_Eray_Gtu11Config::externalRate
IfxEray_ExternalRate externalRate
External rate correction control.
Definition: IfxEray_Eray.h:622
IfxEray_Eray_Interrupt::obusyPriority
uint16 obusyPriority
the output buffer interrupt priority. Always 1 since all interrupts are handled at a time...
Definition: IfxEray_Eray.h:759
IfxEray_Eray_TransmitControl::headerTransfered
boolean headerTransfered
whether header section of frame is transfered or not.
Definition: IfxEray_Eray.h:865
IfxEray_Eray_MessageRAMConfig
Message RAM configuration structure.
Definition: IfxEray_Eray.h:774
IfxEray_Eray_GTUConfig::gtu01Config
IfxEray_Eray_Gtu01Config gtu01Config
GTU01 configuration.
Definition: IfxEray_Eray.h:633
IfxEray_Eray_Gtu03Config::channelBMacrotickInitialOffset
uint8 channelBMacrotickInitialOffset
difference between two adjacent static slots on channel B in macroticks.
Definition: IfxEray_Eray.h:553
IfxEray_Eray_setPocAllSlots
IFX_INLINE boolean IfxEray_Eray_setPocAllSlots(IfxEray_Eray *eray)
Sets the Controller state to ALL Slots mode.
Definition: IfxEray_Eray.h:1284
IfxEray_ReceiveChannel
IfxEray_ReceiveChannel
Receiving channel, defined in MODULE_ERAY0.FRF.B.CH.
Definition: IfxEray.h:320
IfxEray_Eray_NodeA::txEnOut
IFX_CONST IfxEray_Txen_Out * txEnOut
the TXEN Pin which should be configured.
Definition: IfxEray_Eray.h:656
IfxEray_Eray_NodeConfig
Node configuration structure.
Definition: IfxEray_Eray.h:835
IfxEray_Eray_ReceivedFrame
Received Frame.
Definition: IfxEray_Eray.h:855
IfxEray_PocState
IfxEray_PocState
State of Communication Controller Protocol operation control, defined in MODULE_ERAY0.CCSV.B.POCS.
Definition: IfxEray.h:291
IfxEray_Eray_Interrupt::ibusyPriority
uint16 ibusyPriority
the inputput buffer interrupt priority. Always 1 since all interrupts are handled at a time...
Definition: IfxEray_Eray.h:758
IfxEray_Eray_ControllerConfig::succ1Config
IfxEray_Eray_Succ1Config succ1Config
communication controller control properties.
Definition: IfxEray_Eray.h:739
IfxEray_ClearStatusFlag
IfxEray_ClearStatusFlag
Selection of status flag to clear defined in MODULE_ERAY.SIR.U.
Definition: IfxEray.h:128
IfxEray_Eray_Node_initConfig
IFX_EXTERN void IfxEray_Eray_Node_initConfig(IfxEray_Eray_NodeConfig *config)
Initialises the default node configuration buffer.
Definition: IfxEray_Eray.c:203
IfxEray_Eray_Prtc2Control::receiveWakeupIdleTime
uint8 receiveWakeupIdleTime
duration of received wakeup symbol idle phase.
Definition: IfxEray_Eray.h:688
IfxEray_Eray_ControllerConfig::networkVectorLength
uint32 networkVectorLength
length of network management vector.
Definition: IfxEray_Eray.h:735
IfxEray_Eray_Gtu10Config::maxOffsetCorrection
uint16 maxOffsetCorrection
maximum offset correction to be applied by the internal clock synchronization algorithm.
Definition: IfxEray_Eray.h:611
IfxEray_ReceivedHeader
Received header in a frame.
Definition: IfxEray.h:407
IfxEray_Txen_Out
TXEN pin mapping structure.
Definition: IfxEray_PinMap.h:74
IfxEray_Eray_Gtu09Config::staticActionPoint
uint8 staticActionPoint
static slots and symbol window action point.
Definition: IfxEray_Eray.h:602
IfxEray_Eray_TransmitControl::dataTransfered
boolean dataTransfered
whether data section of message buffer is transfered or not.
Definition: IfxEray_Eray.h:866
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:140
IfxEray_Eray_NodeConfig::controllerConfig
IfxEray_Eray_ControllerConfig controllerConfig
Communication Controller configuration structure.
Definition: IfxEray_Eray.h:838
IfxEray_getMessageBufferInterruptStatus
IFX_INLINE boolean IfxEray_getMessageBufferInterruptStatus(Ifx_ERAY *eray, uint8 messageBuffer)
Gets the message buffers interrupt status.
Definition: IfxEray.h:1409
IfxEray_Eray_Succ1Config::numberOfCyclePairsForActive
uint8 numberOfCyclePairsForActive
number of even / odd cycle pairs that must have valid clock correction terms.
Definition: IfxEray_Eray.h:701
IfxEray_Eray_Gtu03Config::channelAMicrotickInitialOffset
uint8 channelAMicrotickInitialOffset
difference between adjacent time reference points on channel A in microticks.
Definition: IfxEray_Eray.h:550
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxEray_Eray_Succ1Config::channelASymbolTransmitted
boolean channelASymbolTransmitted
selects channel A for MTS symbol transmission.
Definition: IfxEray_Eray.h:705
IfxEray_Eray_BufferReconfig::header
IfxEray_Header * header
header of a reconfigurable buffer.
Definition: IfxEray_Eray.h:820
IfxEray_Eray_receiveFrame
IFX_EXTERN void IfxEray_Eray_receiveFrame(IfxEray_Eray *eray, IfxEray_Eray_ReceiveControl *config)
Transfers header and data from message buffer to output buffer.
Definition: IfxEray_Eray.c:578
IfxEray_Eray_Interrupt::int1Priority
uint16 int1Priority
the interrupt line 1 priority. Always 1 since all interrupts are handled at a time.
Definition: IfxEray_Eray.h:751
IfxEray_Eray_Gtu09Config::dynamicActionPoint
uint8 dynamicActionPoint
dynamic slots action point.
Definition: IfxEray_Eray.h:603
IfxEray_Eray_transmitFrame
IFX_EXTERN void IfxEray_Eray_transmitFrame(IfxEray_Eray *eray, IfxEray_Eray_TransmitControl *transmitControl)
Transfers the frame in given slot.
Definition: IfxEray_Eray.c:600
IfxEray_Eray_Interrupt::tint1IsrProvider
IfxSrc_Tos tint1IsrProvider
the timer interrupt line 1 service provider. CPU or DMA.
Definition: IfxEray_Eray.h:763
IfxEray_ExternalOffsetCorrection
IfxEray_ExternalOffsetCorrection
External clock offset correction value defined in MODULE_ERAY0.GTU11.B.EOC.
Definition: IfxEray.h:177
IfxEray_Eray_clearErrorFlag
IFX_INLINE void IfxEray_Eray_clearErrorFlag(IfxEray_Eray *eray, IfxEray_ClearErrorFlag errorFlag)
clears the error interrupt flag requested.
Definition: IfxEray_Eray.h:1197
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
IfxEray_Eray_Gtu11Config::externalOffsetCorrection
IfxEray_ExternalOffsetCorrection externalOffsetCorrection
External clock offset correction value.
Definition: IfxEray_Eray.h:619
IfxEray_Eray_ReceivedFrame::header
IfxEray_ReceivedHeader header
received header in a frame.
Definition: IfxEray_Eray.h:857
IfxEray_Eray_Succ2Config
Communication listen timeout properties.
Definition: IfxEray_Eray.h:713
IfxEray_Eray_Succ1Config
communication controller control properties.
Definition: IfxEray_Eray.h:696
IfxEray_ExternalRate
IfxEray_ExternalRate
External rate correction control MODULE_ERAY0.GTU11.B.ERCC.
Definition: IfxEray.h:191
IfxEray_getStatusInterrupts
IFX_INLINE Ifx_ERAY_SIR IfxEray_getStatusInterrupts(Ifx_ERAY *eray)
Gets the status interrupt flags.
Definition: IfxEray.h:1514
IfxEray_ListenTimeOutNoise
IfxEray_ListenTimeOutNoise
Wakeup or Startup listen timeout in presence of noise, defined in MODULE_ERAY0.SUCC2.B.LTN.
Definition: IfxEray.h:231
IfxEray_Eray_GTUConfig::gtu05Config
IfxEray_Eray_Gtu05Config gtu05Config
GTU05 configuration.
Definition: IfxEray_Eray.h:637
IfxEray_Eray_BufferReconfig::slotControl
IfxEray_SlotConfig * slotControl
message buffer configuration in message RAM.
Definition: IfxEray_Eray.h:822
IfxEray_Eray_Prtc1Control::transmissionStartTime
uint16 transmissionStartTime
duration of transmission start time.
Definition: IfxEray_Eray.h:681
IfxEray_Eray_Interrupt::tint0Priority
uint16 tint0Priority
the timer interrupt 0 priority. Always 1 since all interrupts are handled at a time.
Definition: IfxEray_Eray.h:752
IfxEray_Eray_Succ3Config
Clock correction fail properties.
Definition: IfxEray_Eray.h:721
IfxEray_Eray_MessageRAMConfig::fifoDepth
uint8 fifoDepth
fifo critical level.
Definition: IfxEray_Eray.h:779
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxEray_Eray_Gtu11Config::externalOffset
IfxEray_ExternalOffset externalOffset
External offset correction control.
Definition: IfxEray_Eray.h:621
IfxEray_Eray_MessageRAMConfig::fifoConfigured
boolean fifoConfigured
Whether receive FIFO configured or not.
Definition: IfxEray_Eray.h:787
IfxEray_Eray_startCommunication
IFX_INLINE boolean IfxEray_Eray_startCommunication(IfxEray_Eray *eray)
Runs the communication controller.
Definition: IfxEray_Eray.h:1290
IfxEray_Eray_GTUConfig::gtu11Config
IfxEray_Eray_Gtu11Config gtu11Config
GTU11 configuration.
Definition: IfxEray_Eray.h:643
IfxEray_Eray_ControllerConfig
Communication Controller configuration structure.
Definition: IfxEray_Eray.h:733
IfxEray_Eray_GTUConfig
Gloabl Timing Unit configuration structure.
Definition: IfxEray_Eray.h:631
IfxEray_Eray_setNewDataInterruptDestination
IFX_INLINE void IfxEray_Eray_setNewDataInterruptDestination(IfxEray_Eray *eray, uint8 ndat, uint8 ndatDestination)
Enables the NDAT buffer interrupt line.
Definition: IfxEray_Eray.h:1278
IfxEray_Channel
IfxEray_Channel
Channel Id.
Definition: IfxEray.h:96
IfxEray_Eray_Prtc2Control::receiveWakeupLowTime
uint8 receiveWakeupLowTime
duration of received wakeup symbol low phase.
Definition: IfxEray_Eray.h:689
IfxEray_Eray_getMessageBufferInterruptStatus
IFX_INLINE uint8 IfxEray_Eray_getMessageBufferInterruptStatus(IfxEray_Eray *eray, uint8 messageBuffer)
Gets the message buffer interrupt status.
Definition: IfxEray_Eray.h:1224
IfxEray_Eray_ControllerConfig::staticFramepayload
uint8 staticFramepayload
payload length of static frame in double bytes.
Definition: IfxEray_Eray.h:736
IfxEray_Eray_GTUConfig::gtu03Config
IfxEray_Eray_Gtu03Config gtu03Config
GTU03 configuration.
Definition: IfxEray_Eray.h:635
IfxEray_Eray_GTUConfig::gtu06Config
IfxEray_Eray_Gtu06Config gtu06Config
GTU06 configuration.
Definition: IfxEray_Eray.h:638
IfxEray_Eray_Succ2Config::listenTimeOut
uint32 listenTimeOut
wakeup or startup listen timeout in microticks.
Definition: IfxEray_Eray.h:715
IfxEray_Eray_GTUConfig::gtu09Config
IfxEray_Eray_Gtu09Config gtu09Config
GTU09 configuration.
Definition: IfxEray_Eray.h:641
IfxEray_Eray_Prtc1Control::strobePosition
IfxEray_StrobePosition strobePosition
sample count value for strobing.
Definition: IfxEray_Eray.h:677
IfxScuWdt.h
SCU basic functionality.
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxEray_Eray_Gtu07Config::staticSlotsCount
uint16 staticSlotsCount
number of static slots in a communication cycle.
Definition: IfxEray_Eray.h:587
IfxEray.h
ERAY basic functionality.
IfxEray_Eray_ControllerConfig::prtc1Control
IfxEray_Eray_Prtc1Control prtc1Control
protocol operation control properties.
Definition: IfxEray_Eray.h:742
IfxEray_writeData
void IfxEray_writeData(Ifx_ERAY *eray, const uint32 *data, uint8 payloadLength)
Writes data section of a frame to input data registers.
Definition: IfxEray.c:348
IfxEray_Eray_BufferReconfig::data
uint32 data[64]
data section of a reconfigurable buffer.
Definition: IfxEray_Eray.h:821
IfxEray_Eray_Prtc2Control::transmitWakeupLowTime
uint8 transmitWakeupLowTime
duration of transmit wakeup symbol low phase.
Definition: IfxEray_Eray.h:691
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxEray_Eray_NodeA::rxInMode
IfxPort_InputMode rxInMode
the RX pin input mode which should be configured
Definition: IfxEray_Eray.h:650
IfxEray_Eray_Gtu05Config::channelAReceptionDelay
uint8 channelAReceptionDelay
reception delay on channel A.
Definition: IfxEray_Eray.h:568
IfxEray_Eray_Succ1Config::startupFrameTransmitted
boolean startupFrameTransmitted
whether the key slot is used to transmit startup Frames.
Definition: IfxEray_Eray.h:698
IfxEray_Eray_Interrupt::mbsc0IsrProvider
IfxSrc_Tos mbsc0IsrProvider
the message buffer status changed interrupt 0 service provider. CPU or DMA.
Definition: IfxEray_Eray.h:766
IfxEray_ExternalOffset
IfxEray_ExternalOffset
External offset correction control defined in MODULE_ERAY0.GTU11.B.EOCC.
Definition: IfxEray.h:168
IfxEray_Eray_Succ2Config::listenTimeOutNoise
IfxEray_ListenTimeOutNoise listenTimeOutNoise
upper limit for startup and wakeup listen timeout in the presence of noise.
Definition: IfxEray_Eray.h:716
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxEray_Eray_Config
Module configuration structure.
Definition: IfxEray_Eray.h:827
IfxEray_Eray_Interrupt::ndat1Priority
uint16 ndat1Priority
the new data interrupt 1 priority. Always 1 since all interrupts are handled at a time...
Definition: IfxEray_Eray.h:755
IfxEray_Eray_Interrupt::ndat1IsrProvider
IfxSrc_Tos ndat1IsrProvider
the new data interrupt 1 service provider. CPU or DMA.
Definition: IfxEray_Eray.h:765
IfxEray_Eray_Interrupt::int0IsrProvider
IfxSrc_Tos int0IsrProvider
the interrupt line 0 service provider. CPU or DMA.
Definition: IfxEray_Eray.h:760
IfxEray_Eray_changePocState
IFX_INLINE boolean IfxEray_Eray_changePocState(IfxEray_Eray *eray, IfxEray_PocCommand PocCommand)
Changes the POC state and return status.
Definition: IfxEray_Eray.h:1190
IfxEray_Eray_NodeA::txOutMode
IfxPort_OutputMode txOutMode
the TX pin output mode which should be configured.
Definition: IfxEray_Eray.h:651
IfxEray_Eray_Succ3Config::clockCorrectionCyclesPassive
uint8 clockCorrectionCyclesPassive
maximum number of cycles missing clock correction lead active to passive state.
Definition: IfxEray_Eray.h:723
IfxEray_Eray_Interrupt::ndat0IsrProvider
IfxSrc_Tos ndat0IsrProvider
the new data interrupt 0 service provider. CPU or DMA.
Definition: IfxEray_Eray.h:764
IfxEray_Eray_Succ1Config::maxColdStartAttempts
uint8 maxColdStartAttempts
maximum number of attempts that a cold starting node is permitted.
Definition: IfxEray_Eray.h:700
IfxEray_Eray_Gtu02Config::maxSyncFrames
uint8 maxSyncFrames
Maximum number of sync frames in a cluster.
Definition: IfxEray_Eray.h:543
IfxEray_Eray_Gtu01Config::microticksPerCycle
uint32 microticksPerCycle
Duration of the communication cycle in Microticks.
Definition: IfxEray_Eray.h:535
IfxEray_Eray_ReceiveControl::bufferIndex
uint8 bufferIndex
buffer index in the Message RAM.
Definition: IfxEray_Eray.h:850
IfxEray_setMessageBufferInterruptDestination
void IfxEray_setMessageBufferInterruptDestination(Ifx_ERAY *eray, uint8 messageBuffer, uint8 messageBufferDestination)
Selects between MBSC0 and MBSC1 interrupt destination.
Definition: IfxEray.c:247
IfxEray_Eray_getErrorInterrupts
IFX_INLINE Ifx_ERAY_EIR IfxEray_Eray_getErrorInterrupts(IfxEray_Eray *eray)
Gets the error interrupt status.
Definition: IfxEray_Eray.h:1216
IfxEray_ExternalRateCorrection
IfxEray_ExternalRateCorrection
External clock rate correction value defined in MODULE_ERAY0.GTU11.B.ERC.
Definition: IfxEray.h:200
IfxEray_PocCommand_allSlots
command to controller to enter ALL_SLOTS
Definition: IfxEray.h:279
IfxEray_Eray_GTUConfig::gtu08Config
IfxEray_Eray_Gtu08Config gtu08Config
GTU08 configuration.
Definition: IfxEray_Eray.h:640
IfxEray_Header
Header section in a frame.
Definition: IfxEray.h:389
IfxEray_Eray_Interrupt::int0Priority
uint16 int0Priority
the interrupt line 0 priority. Always 1 since all interrupts are handled at a time.
Definition: IfxEray_Eray.h:750
IfxEray_Eray_Pins::nodeBPins
IFX_CONST IfxEray_Eray_NodeB * nodeBPins
Pins configuration structure for Node B.
Definition: IfxEray_Eray.h:802
IfxEray_Eray_ControllerConfig::latestTransmissionStart
uint8 latestTransmissionStart
number of dynamic slots before inhibit frame transmission in dynamic segment.
Definition: IfxEray_Eray.h:737
IfxEray_Eray_MessageRAMConfig::bufferReconfigEnabled
boolean bufferReconfigEnabled
whether reconfiguration of message buffers is enabled or not.
Definition: IfxEray_Eray.h:786
IfxEray_Eray_Succ1Config::wakeupPatternChannel
IfxEray_WakeupChannel wakeupPatternChannel
Wakeup pattern carry channel.
Definition: IfxEray_Eray.h:702
IfxEray_Eray_receiveFifoFrame
IFX_EXTERN void IfxEray_Eray_receiveFifoFrame(IfxEray_Eray *eray, IfxEray_Eray_ReceiveControl *config)
Transfers frame from fifo in message RAM to Output buffer.
Definition: IfxEray_Eray.c:542
IfxEray_IdleDynamicSlots
IfxEray_IdleDynamicSlots
Duration of dynamic slot idle phase, defined in MODULE_ERAY0.B.DSI.
Definition: IfxEray.h:214
IfxEray_Eray_ControllerConfig::succ3Config
IfxEray_Eray_Succ3Config succ3Config
clock correction fail properties.
Definition: IfxEray_Eray.h:741
IfxEray_Eray_Interrupt::tint0IsrProvider
IfxSrc_Tos tint0IsrProvider
the timer interrupt line 0 service provider. CPU or DMA.
Definition: IfxEray_Eray.h:762
IfxEray_Eray_getWakeupPatternReceivedChannel
IFX_INLINE IfxEray_WakeupChannel IfxEray_Eray_getWakeupPatternReceivedChannel(IfxEray_Eray *eray)
Gets the received wakeup pattern channel.
Definition: IfxEray_Eray.h:1251
IfxEray_Eray_wakeUpChannel
IFX_INLINE void IfxEray_Eray_wakeUpChannel(IfxEray_Eray *eray, IfxEray_Channel channel)
Wakeups the channel in a cluster.
Definition: IfxEray_Eray.h:1296
IfxEray_Eray_MessageRAMConfig::fifoNullFramesRejected
boolean fifoNullFramesRejected
whether null frames stored in fifo or not.
Definition: IfxEray_Eray.h:785
IfxEray_Eray_GTUConfig::gtu04Config
IfxEray_Eray_Gtu04Config gtu04Config
GTU04 configuration.
Definition: IfxEray_Eray.h:636
IfxEray_StrobePosition
IfxEray_StrobePosition
Sample count value for strobing, defined in MODULE_ERAY0.PRTC1.B.SPP.
Definition: IfxEray.h:339
IfxEray_Eray_ReceiveControl::dataReceived
boolean dataReceived
whether data selected for transfer from Message RAM to Output Buffer or not.
Definition: IfxEray_Eray.h:847
IfxEray_Eray_clearStatusFlag
IFX_INLINE void IfxEray_Eray_clearStatusFlag(IfxEray_Eray *eray, IfxEray_ClearStatusFlag statusFlag)
Clears the status interrupt flag requested.
Definition: IfxEray_Eray.h:1203
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:151
IfxEray_Eray_Gtu07Config::staticSlotLength
uint16 staticSlotLength
duration of static slot in macroticks.
Definition: IfxEray_Eray.h:586
IfxEray_Eray_Node_init
IFX_EXTERN void IfxEray_Eray_Node_init(IfxEray_Eray *eray, const IfxEray_Eray_NodeConfig *config)
Initialises the Node with supplied configuration.
Definition: IfxEray_Eray.c:83
IfxEray_Baudrate
IfxEray_Baudrate
Baudrate on the flexray bus, defined in MODULE_ERAY0.PRTC1.B.BRP.
Definition: IfxEray.h:79
IfxEray_Eray_Gtu08Config::dynamicSlotCount
uint16 dynamicSlotCount
number of dynamic slots in a communication cycle.
Definition: IfxEray_Eray.h:595
IfxEray_clearErrorFlag
IFX_INLINE void IfxEray_clearErrorFlag(Ifx_ERAY *eray, IfxEray_ClearErrorFlag errorFlag)
Clears the error flag requested.
Definition: IfxEray.h:1298
IfxEray_Eray_Prtc1Control::baudrate
IfxEray_Baudrate baudrate
baud rate on the flexray bus.
Definition: IfxEray_Eray.h:678
IfxEray_Eray_NodeConfig::pins
IFX_CONST IfxEray_Eray_Pins * pins
Pins configuration structure.
Definition: IfxEray_Eray.h:839
IfxEray_Eray_Interrupt::mbsc1IsrProvider
IfxSrc_Tos mbsc1IsrProvider
the message buffer status changed interrupt 1 service provider. CPU or DMA.
Definition: IfxEray_Eray.h:767
IfxEray_Eray_Interrupt::int1IsrProvider
IfxSrc_Tos int1IsrProvider
the interrupt line 1 service provider. CPU or DMA.
Definition: IfxEray_Eray.h:761
IfxEray_Eray::eray
Ifx_ERAY * eray
pointer to ERAY module registers.
Definition: IfxEray_Eray.h:813
IfxEray_Eray_Prtc1Control::transmitWakeupRepetitions
uint8 transmitWakeupRepetitions
duration of transmitted wakeup pattern in bit times.
Definition: IfxEray_Eray.h:680
IfxCpu.h
CPU basic functionality.
IfxEray_Eray_Succ1Config::channelBConnectedNode
boolean channelBConnectedNode
whether the node is connected to channel B.
Definition: IfxEray_Eray.h:708
IfxEray_Eray_MessageRAMConfig::firstDynamicBuffer
uint8 firstDynamicBuffer
first dynamic buffer index.
Definition: IfxEray_Eray.h:776
IfxEray_Eray_Prtc1Control::collisionAvoidanceDuration
uint8 collisionAvoidanceDuration
accepted duration of collision avoidance symbol.
Definition: IfxEray_Eray.h:676
IfxEray_Eray_Succ1Config::channelBSymbolTransmitted
boolean channelBSymbolTransmitted
selects channel B for MTS symbol transmission
Definition: IfxEray_Eray.h:706
IfxEray_Eray_Gtu10Config
GTU10 configuration.
Definition: IfxEray_Eray.h:609
IfxEray_Eray_getStatusInterrupts
IFX_INLINE Ifx_ERAY_SIR IfxEray_Eray_getStatusInterrupts(IfxEray_Eray *eray)
Gets the node status interrupts.
Definition: IfxEray_Eray.h:1244
IfxEray_Eray_ReceiveControl::swapRequested
boolean swapRequested
whether output buffer shadow and output buffer host are swapped or not.
Definition: IfxEray_Eray.h:848
IfxEray_Eray_Gtu11Config
GTU11 configuration.
Definition: IfxEray_Eray.h:617
IfxEray_Eray_Gtu03Config
GTU03 configuration.
Definition: IfxEray_Eray.h:548
IfxEray_Eray_Gtu06Config
GTU06 configuration.
Definition: IfxEray_Eray.h:576
IfxEray_Eray_Gtu05Config
GTU05 configuration.
Definition: IfxEray_Eray.h:566
IfxEray_Eray_Gtu08Config
GTU08 configuration.
Definition: IfxEray_Eray.h:592
IfxEray_Eray_Gtu05Config::channelBReceptionDelay
uint8 channelBReceptionDelay
reception delay on channel B.
Definition: IfxEray_Eray.h:569
IfxEray_Eray_Gtu07Config
GTU07 configuration.
Definition: IfxEray_Eray.h:584
IfxEray_Eray_Gtu09Config
GTU09 configuration.
Definition: IfxEray_Eray.h:600
IfxEray_Eray_NodeConfig::messageRAMConfig
IfxEray_Eray_MessageRAMConfig messageRAMConfig
Message RAM configuration structure.
Definition: IfxEray_Eray.h:837
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxEray_Eray_GTUConfig::gtu02Config
IfxEray_Eray_Gtu02Config gtu02Config
GTU02 configuration.
Definition: IfxEray_Eray.h:634
IfxEray_Rxd_In
RXD pin mapping structure.
Definition: IfxEray_PinMap.h:56
IfxEray_Eray_Gtu02Config
GTU02 configuration.
Definition: IfxEray_Eray.h:540
IfxEray_Eray_Gtu01Config
GTU01 configuration.
Definition: IfxEray_Eray.h:533
IfxEray_getErrorInterrupts
IFX_INLINE Ifx_ERAY_EIR IfxEray_getErrorInterrupts(Ifx_ERAY *eray)
Gets the error interrupt flags.
Definition: IfxEray.h:1336
IfxEray_TransmissionSlotMode
IfxEray_TransmissionSlotMode
Initial transmission mode, defined in MODULE_ERAY0.SUCC1.B.TSM.
Definition: IfxEray.h:365
IfxEray_Eray_ReceiveControl::headerReceived
boolean headerReceived
whether header selected for transfer from Message RAM to Output Buffer or not.
Definition: IfxEray_Eray.h:846
IfxEray_Eray_Gtu08Config::dynamicSlotLength
uint8 dynamicSlotLength
duration of dynamic slot in macroticks.
Definition: IfxEray_Eray.h:594
IfxEray_Eray_MessageRAMConfig::staticFifoDisabled
boolean staticFifoDisabled
fifo is not used in static segment.
Definition: IfxEray_Eray.h:784
IfxEray_Eray_Gtu04Config
GTU04 configuration.
Definition: IfxEray_Eray.h:558
IfxEray_Eray_bufferReconfig
IFX_INLINE void IfxEray_Eray_bufferReconfig(IfxEray_Eray *eray, IfxEray_Eray_BufferReconfig *reconfigBuffer)
Reconfiguring the buffer or changing the slot.
Definition: IfxEray_Eray.h:1184
IfxEray_PocCommand_config
command to controller to enter CONFIG
Definition: IfxEray.h:275
IfxEray_Eray_Interrupt::ibusyIsrProvider
IfxSrc_Tos ibusyIsrProvider
the input buffer interrupt service provider. CPU or DMA.
Definition: IfxEray_Eray.h:768
IfxEray_Eray_Pins::nodeAPins
IFX_CONST IfxEray_Eray_NodeA * nodeAPins
Pins configuration structure for Node A.
Definition: IfxEray_Eray.h:801
IfxEray_ClearErrorFlag
IfxEray_ClearErrorFlag
Selection of error flag to clear defined in MODULE_ERAY.EIR.U.
Definition: IfxEray.h:104
IfxEray_resetModule
void IfxEray_resetModule(Ifx_ERAY *eray)
Resets the ERAY kernel.
Definition: IfxEray.c:227
IfxScuCcu.h
SCU basic functionality.
IfxEray_Eray_Pins
Pins configuration structure.
Definition: IfxEray_Eray.h:799
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:81
IfxEray_Eray_ReceiveControl
Receive control properties structure.
Definition: IfxEray_Eray.h:844
IfxEray_Eray_MessageRAMConfig::fifoBufferStartIndex
uint32 fifoBufferStartIndex
message buffers assigned FIFO.
Definition: IfxEray_Eray.h:778
IfxEray_Eray_ControllerConfig::prtc2Control
IfxEray_Eray_Prtc2Control prtc2Control
wakeup symbol control properties.
Definition: IfxEray_Eray.h:743
IfxEray_Eray_Gtu02Config::macroticksPerCycle
uint16 macroticksPerCycle
Duration of the communication cycle in Macroticks.
Definition: IfxEray_Eray.h:542
IfxEray_Eray_Interrupt
Interrupt control properties.
Definition: IfxEray_Eray.h:748
IfxEray_Eray_getPocState
IFX_INLINE IfxEray_PocState IfxEray_Eray_getPocState(IfxEray_Eray *eray)
Gets the current node controller POC state.
Definition: IfxEray_Eray.h:1238
IfxEray_getPocState
IFX_INLINE IfxEray_PocState IfxEray_getPocState(Ifx_ERAY *eray)
Gets the current POC state.
Definition: IfxEray.h:1508
IfxEray_Eray_MessageRAMConfig::frameIdFilter
uint16 frameIdFilter
Frame ID used for rejection filtering.
Definition: IfxEray_Eray.h:780
IfxEray_Eray_MessageRAMConfig::numberOfMessageBuffers
uint8 numberOfMessageBuffers
last configured buffer.
Definition: IfxEray_Eray.h:777
IfxEray_Eray_ReceiveControl::receiveRequested
boolean receiveRequested
Definition: IfxEray_Eray.h:849
IfxEray_Eray_Gtu10Config::maxRateCorrection
uint16 maxRateCorrection
maximum rate correction to be applied by the internal clock synchronization algorithm.
Definition: IfxEray_Eray.h:612
IfxEray_Eray_Succ1Config::clockSyncErrorHalt
boolean clockSyncErrorHalt
transition to HALT state due to a clock synchronization error.
Definition: IfxEray_Eray.h:704
IfxEray_Eray_MessageRAMConfig::receiveChannel
IfxEray_ReceiveChannel receiveChannel
FIFO receive channel.
Definition: IfxEray_Eray.h:781
IfxEray_PocCommand
IfxEray_PocCommand
Commmand to control the Communication, defined in MODULE_ERAY0.SUCC1.B.CMD.
Definition: IfxEray.h:272
IfxEray_Eray_Succ1Config::syncFrameTransmitted
boolean syncFrameTransmitted
whether the key slot is used to transmit SYNC Frames.
Definition: IfxEray_Eray.h:699
IfxEray_Eray_NodeA::txOut
IFX_CONST IfxEray_Txd_Out * txOut
the TX Pin which should be configured.
Definition: IfxEray_Eray.h:655
IfxEray_Eray_allowColdStart
IFX_INLINE boolean IfxEray_Eray_allowColdStart(IfxEray_Eray *eray)
Allows node to enter the cold startup state.
Definition: IfxEray_Eray.h:1178
IfxEray_Eray_NodeA
Pins configuration structure for Node A.
Definition: IfxEray_Eray.h:648
IfxEray_Eray_NodeB
Pins configuration structure for Node B.
Definition: IfxEray_Eray.h:661
IfxEray_Eray_TransmitControl::transferRequested
boolean transferRequested
whether frame in a slot is transfered or not.
Definition: IfxEray_Eray.h:867
IfxEray_Eray_wakeUpCluster
IFX_INLINE boolean IfxEray_Eray_wakeUpCluster(IfxEray_Eray *eray)
Wakeups the node in a cluster.
Definition: IfxEray_Eray.h:1309
IfxEray_Eray_TransmitControl
Transfer control in a slot.
Definition: IfxEray_Eray.h:863
IfxEray_PocCommand_coldStart
command to controller to enter COLD_START
Definition: IfxEray.h:283
IfxEray_Eray
ERAY Module handle.
Definition: IfxEray_Eray.h:811
IfxEray_Eray_NodeA::pinDriver
IfxPort_PadDriver pinDriver
the pad driver mode which should be configured.
Definition: IfxEray_Eray.h:652
IfxEray_Eray_Gtu05Config::clusterDrift
uint8 clusterDrift
cluster drift damping value used in clock synchronization.
Definition: IfxEray_Eray.h:570
IfxEray_getNewDataInterruptStatus
IFX_INLINE boolean IfxEray_getNewDataInterruptStatus(Ifx_ERAY *eray, uint8 ndat)
Gets the new data interrupt buffers status.
Definition: IfxEray.h:1472
IfxEray_Eray_Gtu11Config::externalRateCorrection
IfxEray_ExternalRateCorrection externalRateCorrection
External clock rate correction value.
Definition: IfxEray_Eray.h:620
IfxEray_Eray_Gtu09Config::idleDynamicSlots
IfxEray_IdleDynamicSlots idleDynamicSlots
duration of dynamic slot idle phase.
Definition: IfxEray_Eray.h:604
IfxEray_Eray_ControllerConfig::gtuConfig
IfxEray_Eray_GTUConfig gtuConfig
gloabl timing unit configuration structure.
Definition: IfxEray_Eray.h:738
IfxEray_readFrame
void IfxEray_readFrame(Ifx_ERAY *eray, IfxEray_ReceivedHeader *header, uint32 *data, Ifx_SizeT maxPayloadLength)
Reads header and data from output buffers.
Definition: IfxEray.c:203
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxEray_Eray_BufferReconfig
Reconfigurable buffer structure.
Definition: IfxEray_Eray.h:818
IfxEray_Eray_Interrupt::obusyIsrProvider
IfxSrc_Tos obusyIsrProvider
the output buffer interrupt service provider. CPU or DMA.
Definition: IfxEray_Eray.h:769
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxEray_clearStatusFlag
IFX_INLINE void IfxEray_clearStatusFlag(Ifx_ERAY *eray, IfxEray_ClearStatusFlag statusFlag)
Clears the status flag requested.
Definition: IfxEray.h:1304
IfxEray_Eray_ControllerConfig::succ2Config
IfxEray_Eray_Succ2Config succ2Config
communication listen timeout properties.
Definition: IfxEray_Eray.h:740
IfxEray_Eray_Interrupt::mbsc0Priority
uint16 mbsc0Priority
the message buffer status changed interrupt 0 priority. Always 1 since all interrupts are handled at ...
Definition: IfxEray_Eray.h:756
IfxEray_changePocState
boolean IfxEray_changePocState(Ifx_ERAY *eray, IfxEray_PocCommand pocCommand)
Changes the Commmunication Controller state.
Definition: IfxEray.c:99
IfxEray_Eray_GTUConfig::gtu10Config
IfxEray_Eray_Gtu10Config gtu10Config
GTU10 configuration.
Definition: IfxEray_Eray.h:642
IfxEray_readData
void IfxEray_readData(Ifx_ERAY *eray, uint32 *data, uint8 payloadLength)
Reads the received data from output registers.
Definition: IfxEray.c:188
IfxEray_getWakeupPatternReceivedChannel
IFX_INLINE IfxEray_WakeupChannel IfxEray_getWakeupPatternReceivedChannel(Ifx_ERAY *eray)
Gets the received wakeup pattern channel.
Definition: IfxEray.h:1548
IfxEray_Eray_Gtu03Config::channelAMacrotickInitialOffset
uint8 channelAMacrotickInitialOffset
difference between two adjacent static slots on channel A in macroticks.
Definition: IfxEray_Eray.h:552
IfxEray_Eray_Gtu04Config::correctionOffset
uint16 correctionOffset
offset correction start point.
Definition: IfxEray_Eray.h:561
IfxEray_Eray_Prtc1Control::receiveWakeupTestDuration
uint8 receiveWakeupTestDuration
duration of received wakeup pattern in bit times.
Definition: IfxEray_Eray.h:679
IfxEray_Eray_Gtu06Config::maxDriftOffset
uint16 maxDriftOffset
maximum drift offset between two nodes.
Definition: IfxEray_Eray.h:579
IfxEray_PocCommand_wakeup
command to controller to enter WAKEUP
Definition: IfxEray.h:277
IfxEray_Eray_Prtc2Control::transmitWakeupIdleTime
uint8 transmitWakeupIdleTime
duration of transmit wakeup symbol idle phase.
Definition: IfxEray_Eray.h:690
IfxEray_Eray_readFrame
IFX_INLINE void IfxEray_Eray_readFrame(IfxEray_Eray *eray, IfxEray_Eray_ReceivedFrame *frame, Ifx_SizeT maxPayloadLength)
reads the frame received in a buffer.
Definition: IfxEray_Eray.h:1266
IfxEray_Eray_MessageRAMConfig::filteredCycleNumber
uint8 filteredCycleNumber
the cycle set to which Frame ID and channel rejection filter are applied.
Definition: IfxEray_Eray.h:783
IfxEray_Eray_Gtu03Config::channelBMicrotickInitialOffset
uint8 channelBMicrotickInitialOffset
difference between adjacent time reference points on channel B in microticks.
Definition: IfxEray_Eray.h:551
IfxEray_Eray_MessageRAMConfig::rejectedFrameId
uint16 rejectedFrameId
frame ID to be rejected by the FIFO.
Definition: IfxEray_Eray.h:782
IfxEray_Eray_Interrupt::tint1Priority
uint16 tint1Priority
the timer interrupt 1 priority. Always 1 since all interrupts are handled at a time.
Definition: IfxEray_Eray.h:753
IfxEray_Eray_writeData
IFX_INLINE void IfxEray_Eray_writeData(IfxEray_Eray *eray, uint32 *data, uint8 payloadLength)
Writes data section of a frame to input data registers.
Definition: IfxEray_Eray.h:1315
IfxEray_Eray_Gtu06Config::acceptedStartupDeviation
uint16 acceptedStartupDeviation
expanded range of measured deviation for startup Frames during integration.
Definition: IfxEray_Eray.h:578
IfxEray_Eray_Config::interrupt
IfxEray_Eray_Interrupt interrupt
Interrupt control properties.
Definition: IfxEray_Eray.h:830


iLLD_TC38A: IfxEray_PinMap.c Source File

  • _PinMap
IfxEray_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxEray_PinMap.c
3 * \brief ERAY I/O map
4 * \ingroup IfxLld_Eray
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "IfxEray_PinMap.h"
44
45 IfxEray_Rxd_In IfxEray0_RXDA0_P14_8_IN = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P14, 8}, Ifx_RxSel_a};
46 IfxEray_Rxd_In IfxEray0_RXDA1_P11_9_IN = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P11, 9}, Ifx_RxSel_b};
47 IfxEray_Rxd_In IfxEray0_RXDA2_P02_1_IN = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P02, 1}, Ifx_RxSel_c};
48 IfxEray_Rxd_In IfxEray0_RXDA3_P14_1_IN = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P14, 1}, Ifx_RxSel_d};
49 IfxEray_Rxd_In IfxEray0_RXDB0_P14_7_IN = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 7}, Ifx_RxSel_a};
50 IfxEray_Rxd_In IfxEray0_RXDB1_P11_10_IN = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P11,10}, Ifx_RxSel_b};
51 IfxEray_Rxd_In IfxEray0_RXDB2_P02_3_IN = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P02, 3}, Ifx_RxSel_c};
52 IfxEray_Rxd_In IfxEray0_RXDB3_P14_1_IN = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 1}, Ifx_RxSel_d};
53 IfxEray_Rxd_In IfxEray1_RXDA0_P14_8_IN = {&MODULE_ERAY1, IfxEray_NodeId_a, {&MODULE_P14, 8}, Ifx_RxSel_a};
54 IfxEray_Rxd_In IfxEray1_RXDA1_P01_1_IN = {&MODULE_ERAY1, IfxEray_NodeId_a, {&MODULE_P01, 1}, Ifx_RxSel_b};
55 IfxEray_Rxd_In IfxEray1_RXDB0_P14_7_IN = {&MODULE_ERAY1, IfxEray_NodeId_b, {&MODULE_P14, 7}, Ifx_RxSel_a};
56 IfxEray_Rxd_In IfxEray1_RXDB1_P01_8_IN = {&MODULE_ERAY1, IfxEray_NodeId_b, {&MODULE_P01, 8}, Ifx_RxSel_b};
57 IfxEray_Txd_Out IfxEray0_TXDA_P02_0_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt6};
58 IfxEray_Txd_Out IfxEray0_TXDA_P11_3_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt4};
59 IfxEray_Txd_Out IfxEray0_TXDA_P14_0_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt3};
60 IfxEray_Txd_Out IfxEray0_TXDA_P14_10_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P14,10}, IfxPort_OutputIdx_alt6};
61 IfxEray_Txd_Out IfxEray0_TXDB_P02_2_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt6};
62 IfxEray_Txd_Out IfxEray0_TXDB_P11_12_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P11,12}, IfxPort_OutputIdx_alt4};
63 IfxEray_Txd_Out IfxEray0_TXDB_P14_0_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt4};
64 IfxEray_Txd_Out IfxEray0_TXDB_P14_5_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt6};
65 IfxEray_Txd_Out IfxEray1_TXDA_P01_12_OUT = {&MODULE_ERAY1, IfxEray_NodeId_a, {&MODULE_P01,12}, IfxPort_OutputIdx_alt6};
66 IfxEray_Txd_Out IfxEray1_TXDA_P14_10_OUT = {&MODULE_ERAY1, IfxEray_NodeId_a, {&MODULE_P14,10}, IfxPort_OutputIdx_alt7};
67 IfxEray_Txd_Out IfxEray1_TXDB_P01_13_OUT = {&MODULE_ERAY1, IfxEray_NodeId_b, {&MODULE_P01,13}, IfxPort_OutputIdx_alt6};
68 IfxEray_Txd_Out IfxEray1_TXDB_P14_5_OUT = {&MODULE_ERAY1, IfxEray_NodeId_b, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt7};
69 IfxEray_Txen_Out IfxEray0_TXENA_P02_4_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt6};
70 IfxEray_Txen_Out IfxEray0_TXENA_P11_6_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt4};
71 IfxEray_Txen_Out IfxEray0_TXENA_P14_9_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt6};
72 IfxEray_Txen_Out IfxEray0_TXENB_P02_5_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt6};
73 IfxEray_Txen_Out IfxEray0_TXENB_P11_11_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P11,11}, IfxPort_OutputIdx_alt6};
74 IfxEray_Txen_Out IfxEray0_TXENB_P11_6_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt2};
75 IfxEray_Txen_Out IfxEray0_TXENB_P14_6_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt6};
76 IfxEray_Txen_Out IfxEray0_TXENB_P14_9_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt5};
77 IfxEray_Txen_Out IfxEray1_TXENA_P01_14_OUT = {&MODULE_ERAY1, IfxEray_NodeId_a, {&MODULE_P01,14}, IfxPort_OutputIdx_alt6};
78 IfxEray_Txen_Out IfxEray1_TXENA_P14_9_OUT = {&MODULE_ERAY1, IfxEray_NodeId_a, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt7};
79 IfxEray_Txen_Out IfxEray1_TXENB_P02_15_OUT = {&MODULE_ERAY1, IfxEray_NodeId_b, {&MODULE_P02,15}, IfxPort_OutputIdx_alt6};
80 IfxEray_Txen_Out IfxEray1_TXENB_P14_6_OUT = {&MODULE_ERAY1, IfxEray_NodeId_b, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt7};
81
82
83 const IfxEray_Rxd_In *IfxEray_Rxd_In_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_RXD_IN_NUM_ITEMS] = {
84 {
85 {
86 &IfxEray0_RXDA0_P14_8_IN,
87 &IfxEray0_RXDA1_P11_9_IN,
88 &IfxEray0_RXDA2_P02_1_IN,
89 &IfxEray0_RXDA3_P14_1_IN
90 },
91 {
92 &IfxEray0_RXDB0_P14_7_IN,
93 &IfxEray0_RXDB1_P11_10_IN,
94 &IfxEray0_RXDB2_P02_3_IN,
95 &IfxEray0_RXDB3_P14_1_IN
96 }
97 },
98 {
99 {
100 &IfxEray1_RXDA0_P14_8_IN,
101 &IfxEray1_RXDA1_P01_1_IN,
102 NULL_PTR,
103 NULL_PTR
104 },
105 {
106 &IfxEray1_RXDB0_P14_7_IN,
107 &IfxEray1_RXDB1_P01_8_IN,
108 NULL_PTR,
109 NULL_PTR
110 }
111 }
112 };
113
114 const IfxEray_Txd_Out *IfxEray_Txd_Out_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS] = {
115 {
116 {
117 &IfxEray0_TXDA_P02_0_OUT,
118 &IfxEray0_TXDA_P11_3_OUT,
119 &IfxEray0_TXDA_P14_0_OUT,
120 &IfxEray0_TXDA_P14_10_OUT
121 },
122 {
123 &IfxEray0_TXDB_P02_2_OUT,
124 &IfxEray0_TXDB_P11_12_OUT,
125 &IfxEray0_TXDB_P14_0_OUT,
126 &IfxEray0_TXDB_P14_5_OUT
127 }
128 },
129 {
130 {
131 &IfxEray1_TXDA_P01_12_OUT,
132 &IfxEray1_TXDA_P14_10_OUT,
133 NULL_PTR,
134 NULL_PTR
135 },
136 {
137 &IfxEray1_TXDB_P01_13_OUT,
138 &IfxEray1_TXDB_P14_5_OUT,
139 NULL_PTR,
140 NULL_PTR
141 }
142 }
143 };
144
145 const IfxEray_Txen_Out *IfxEray_Txen_Out_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS] = {
146 {
147 {
148 &IfxEray0_TXENA_P02_4_OUT,
149 &IfxEray0_TXENA_P11_6_OUT,
150 &IfxEray0_TXENA_P14_9_OUT,
151 NULL_PTR,
152 NULL_PTR
153 },
154 {
155 &IfxEray0_TXENB_P02_5_OUT,
156 &IfxEray0_TXENB_P11_6_OUT,
157 &IfxEray0_TXENB_P11_11_OUT,
158 &IfxEray0_TXENB_P14_6_OUT,
159 &IfxEray0_TXENB_P14_9_OUT
160 }
161 },
162 {
163 {
164 &IfxEray1_TXENA_P01_14_OUT,
165 &IfxEray1_TXENA_P14_9_OUT,
166 NULL_PTR,
167 NULL_PTR,
168 NULL_PTR
169 },
170 {
171 &IfxEray1_TXENB_P02_15_OUT,
172 &IfxEray1_TXENB_P14_6_OUT,
173 NULL_PTR,
174 NULL_PTR,
175 NULL_PTR
176 }
177 }
178 };
IfxEray_Txd_Out
TXD pin mapping structure.
Definition: IfxEray_PinMap.h:65
IfxEray0_TXENB_P02_5_OUT
IfxEray_Txen_Out IfxEray0_TXENB_P02_5_OUT
Definition: IfxEray_PinMap.c:72
IfxEray1_TXENA_P14_9_OUT
IfxEray_Txen_Out IfxEray1_TXENA_P14_9_OUT
Definition: IfxEray_PinMap.c:78
IfxEray0_TXENB_P11_6_OUT
IfxEray_Txen_Out IfxEray0_TXENB_P11_6_OUT
Definition: IfxEray_PinMap.c:74
IfxEray0_TXENA_P11_6_OUT
IfxEray_Txen_Out IfxEray0_TXENA_P11_6_OUT
Definition: IfxEray_PinMap.c:70
Ifx_RxSel_d
Definition: Ifx_Types.h:132
IfxEray0_TXDA_P11_3_OUT
IfxEray_Txd_Out IfxEray0_TXDA_P11_3_OUT
Definition: IfxEray_PinMap.c:58
IfxEray_Txen_Out_pinTable
const IfxEray_Txen_Out * IfxEray_Txen_Out_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS]
Definition: IfxEray_PinMap.c:145
IfxEray0_RXDB2_P02_3_IN
IfxEray_Rxd_In IfxEray0_RXDB2_P02_3_IN
Definition: IfxEray_PinMap.c:51
IfxEray0_TXDA_P02_0_OUT
IfxEray_Txd_Out IfxEray0_TXDA_P02_0_OUT
Definition: IfxEray_PinMap.c:57
IfxEray_NodeId_b
Ifx_ERAY Node B.
Definition: IfxEray_cfg.h:91
IfxEray_Txen_Out
TXEN pin mapping structure.
Definition: IfxEray_PinMap.h:74
IfxPort_OutputIdx_alt2
Definition: IfxPort.h:130
Ifx_RxSel_a
Definition: Ifx_Types.h:129
IfxEray1_TXDB_P01_13_OUT
IfxEray_Txd_Out IfxEray1_TXDB_P01_13_OUT
Definition: IfxEray_PinMap.c:67
IfxEray1_RXDB1_P01_8_IN
IfxEray_Rxd_In IfxEray1_RXDB1_P01_8_IN
Definition: IfxEray_PinMap.c:56
IfxEray0_RXDB3_P14_1_IN
IfxEray_Rxd_In IfxEray0_RXDB3_P14_1_IN
Definition: IfxEray_PinMap.c:52
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxEray0_TXENB_P14_6_OUT
IfxEray_Txen_Out IfxEray0_TXENB_P14_6_OUT
Definition: IfxEray_PinMap.c:75
Ifx_RxSel_b
Definition: Ifx_Types.h:130
IFXERAY_PINMAP_RXD_IN_NUM_ITEMS
#define IFXERAY_PINMAP_RXD_IN_NUM_ITEMS
Definition: IfxEray_PinMap.h:122
IfxEray1_RXDA1_P01_1_IN
IfxEray_Rxd_In IfxEray1_RXDA1_P01_1_IN
Definition: IfxEray_PinMap.c:54
IfxPort_OutputIdx_alt6
Definition: IfxPort.h:134
IfxEray_Rxd_In_pinTable
const IfxEray_Rxd_In * IfxEray_Rxd_In_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_RXD_IN_NUM_ITEMS]
Definition: IfxEray_PinMap.c:83
IfxPort_OutputIdx_alt3
Definition: IfxPort.h:131
IfxEray0_RXDB1_P11_10_IN
IfxEray_Rxd_In IfxEray0_RXDB1_P11_10_IN
Definition: IfxEray_PinMap.c:50
IfxEray0_TXENA_P02_4_OUT
IfxEray_Txen_Out IfxEray0_TXENA_P02_4_OUT
Definition: IfxEray_PinMap.c:69
IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS
#define IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS
Definition: IfxEray_PinMap.h:124
IfxEray_PinMap.h
ERAY I/O map.
Ifx_RxSel_c
Definition: Ifx_Types.h:131
IfxEray1_TXDA_P01_12_OUT
IfxEray_Txd_Out IfxEray1_TXDA_P01_12_OUT
Definition: IfxEray_PinMap.c:65
IfxEray0_TXDB_P02_2_OUT
IfxEray_Txd_Out IfxEray0_TXDB_P02_2_OUT
Definition: IfxEray_PinMap.c:61
IfxEray1_TXENB_P02_15_OUT
IfxEray_Txen_Out IfxEray1_TXENB_P02_15_OUT
Definition: IfxEray_PinMap.c:79
IfxEray0_RXDA0_P14_8_IN
IfxEray_Rxd_In IfxEray0_RXDA0_P14_8_IN
Definition: IfxEray_PinMap.c:45
IfxEray0_TXENB_P14_9_OUT
IfxEray_Txen_Out IfxEray0_TXENB_P14_9_OUT
Definition: IfxEray_PinMap.c:76
IfxEray1_RXDB0_P14_7_IN
IfxEray_Rxd_In IfxEray1_RXDB0_P14_7_IN
Definition: IfxEray_PinMap.c:55
IfxEray0_TXDA_P14_10_OUT
IfxEray_Txd_Out IfxEray0_TXDA_P14_10_OUT
Definition: IfxEray_PinMap.c:60
IfxPort_OutputIdx_alt4
Definition: IfxPort.h:132
IFXERAY_PINMAP_NUM_MODULES
#define IFXERAY_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxEray_PinMap.h:120
IfxEray1_TXDB_P14_5_OUT
IfxEray_Txd_Out IfxEray1_TXDB_P14_5_OUT
Definition: IfxEray_PinMap.c:68
IfxEray0_TXENB_P11_11_OUT
IfxEray_Txen_Out IfxEray0_TXENB_P11_11_OUT
Definition: IfxEray_PinMap.c:73
IfxEray_Txd_Out_pinTable
const IfxEray_Txd_Out * IfxEray_Txd_Out_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS]
Definition: IfxEray_PinMap.c:114
IfxEray0_TXDB_P14_0_OUT
IfxEray_Txd_Out IfxEray0_TXDB_P14_0_OUT
Definition: IfxEray_PinMap.c:63
IfxEray0_RXDA1_P11_9_IN
IfxEray_Rxd_In IfxEray0_RXDA1_P11_9_IN
Definition: IfxEray_PinMap.c:46
IfxPort_OutputIdx_alt7
Definition: IfxPort.h:135
IfxEray_Rxd_In
RXD pin mapping structure.
Definition: IfxEray_PinMap.h:56
IfxEray_NodeId_a
Ifx_ERAY Node A.
Definition: IfxEray_cfg.h:90
IfxEray1_RXDA0_P14_8_IN
IfxEray_Rxd_In IfxEray1_RXDA0_P14_8_IN
Definition: IfxEray_PinMap.c:53
IfxEray0_TXDB_P11_12_OUT
IfxEray_Txd_Out IfxEray0_TXDB_P11_12_OUT
Definition: IfxEray_PinMap.c:62
IfxEray0_RXDA2_P02_1_IN
IfxEray_Rxd_In IfxEray0_RXDA2_P02_1_IN
Definition: IfxEray_PinMap.c:47
IfxEray1_TXDA_P14_10_OUT
IfxEray_Txd_Out IfxEray1_TXDA_P14_10_OUT
Definition: IfxEray_PinMap.c:66
IfxEray0_RXDA3_P14_1_IN
IfxEray_Rxd_In IfxEray0_RXDA3_P14_1_IN
Definition: IfxEray_PinMap.c:48
IfxEray0_RXDB0_P14_7_IN
IfxEray_Rxd_In IfxEray0_RXDB0_P14_7_IN
Definition: IfxEray_PinMap.c:49
IFXERAY_PINMAP_NUM_NODES
#define IFXERAY_PINMAP_NUM_NODES
Definition: IfxEray_PinMap.h:121
IfxPort_OutputIdx_alt5
Definition: IfxPort.h:133
IfxEray0_TXDA_P14_0_OUT
IfxEray_Txd_Out IfxEray0_TXDA_P14_0_OUT
Definition: IfxEray_PinMap.c:59
IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS
#define IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS
Definition: IfxEray_PinMap.h:123
IfxEray1_TXENA_P01_14_OUT
IfxEray_Txen_Out IfxEray1_TXENA_P01_14_OUT
Definition: IfxEray_PinMap.c:77
IfxEray0_TXDB_P14_5_OUT
IfxEray_Txd_Out IfxEray0_TXDB_P14_5_OUT
Definition: IfxEray_PinMap.c:64
IfxEray1_TXENB_P14_6_OUT
IfxEray_Txen_Out IfxEray1_TXENB_P14_6_OUT
Definition: IfxEray_PinMap.c:80
IfxEray0_TXENA_P14_9_OUT
IfxEray_Txen_Out IfxEray0_TXENA_P14_9_OUT
Definition: IfxEray_PinMap.c:71


iLLD_TC38A: IfxEray_PinMap.h Source File

  • _PinMap
IfxEray_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxEray_PinMap.h
3 * \brief ERAY I/O map
4 * \ingroup IfxLld_Eray
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Eray_pinmap ERAY Pin Mapping
42 * \ingroup IfxLld_Eray
43 */
44
45 #ifndef IFXERAY_PINMAP_H
46 #define IFXERAY_PINMAP_H
47
48 #include <IfxEray_reg.h>
49 #include <_Impl/IfxEray_cfg.h>
50 #include <Port/Std/IfxPort.h>
51
52 /** \addtogroup IfxLld_Eray_pinmap
53 * \{ */
54
55 /** \brief RXD pin mapping structure */
56 typedef const struct
57 {
58 Ifx_ERAY* module; /**< \brief Base address */
59 IfxEray_NodeId nodeId; /**< \brief Node ID */
60 IfxPort_Pin pin; /**< \brief Port pin */
61 Ifx_RxSel select; /**< \brief Input multiplexer value */
62 } IfxEray_Rxd_In;
63
64 /** \brief TXD pin mapping structure */
65 typedef const struct
66 {
67 Ifx_ERAY* module; /**< \brief Base address */
68 IfxEray_NodeId nodeId; /**< \brief Node ID */
69 IfxPort_Pin pin; /**< \brief Port pin */
70 IfxPort_OutputIdx select; /**< \brief Port control code */
71 } IfxEray_Txd_Out;
72
73 /** \brief TXEN pin mapping structure */
74 typedef const struct
75 {
76 Ifx_ERAY* module; /**< \brief Base address */
77 IfxEray_NodeId nodeId; /**< \brief Node ID */
78 IfxPort_Pin pin; /**< \brief Port pin */
79 IfxPort_OutputIdx select; /**< \brief Port control code */
80 } IfxEray_Txen_Out;
81
82 IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA0_P14_8_IN; /**< \brief Receive Channel A0 */
83 IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA1_P11_9_IN; /**< \brief Receive Channel A1 */
84 IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA2_P02_1_IN; /**< \brief Receive Channel A2 */
85 IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA3_P14_1_IN; /**< \brief Receive Channel A3 */
86 IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB0_P14_7_IN; /**< \brief Receive Channel B0 */
87 IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB1_P11_10_IN; /**< \brief Receive Channel B1 */
88 IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB2_P02_3_IN; /**< \brief Receive Channel B2 */
89 IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB3_P14_1_IN; /**< \brief Receive Channel B3 */
90 IFX_EXTERN IfxEray_Rxd_In IfxEray1_RXDA0_P14_8_IN; /**< \brief Receive Channel A0 */
91 IFX_EXTERN IfxEray_Rxd_In IfxEray1_RXDA1_P01_1_IN; /**< \brief Receive Channel A1 */
92 IFX_EXTERN IfxEray_Rxd_In IfxEray1_RXDB0_P14_7_IN; /**< \brief Receive Channel B0 */
93 IFX_EXTERN IfxEray_Rxd_In IfxEray1_RXDB1_P01_8_IN; /**< \brief Receive Channel B1 */
94 IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P02_0_OUT; /**< \brief Transmit Channel A */
95 IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P11_3_OUT; /**< \brief Transmit Channel A */
96 IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P14_0_OUT; /**< \brief Transmit Channel A */
97 IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P14_10_OUT; /**< \brief Transmit Channel A */
98 IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P02_2_OUT; /**< \brief Transmit Channel B */
99 IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P11_12_OUT; /**< \brief Transmit Channel B */
100 IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P14_0_OUT; /**< \brief Transmit Channel B */
101 IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P14_5_OUT; /**< \brief Transmit Channel B */
102 IFX_EXTERN IfxEray_Txd_Out IfxEray1_TXDA_P01_12_OUT; /**< \brief Transmit Channel A */
103 IFX_EXTERN IfxEray_Txd_Out IfxEray1_TXDA_P14_10_OUT; /**< \brief Transmit Channel A */
104 IFX_EXTERN IfxEray_Txd_Out IfxEray1_TXDB_P01_13_OUT; /**< \brief Transmit Channel B */
105 IFX_EXTERN IfxEray_Txd_Out IfxEray1_TXDB_P14_5_OUT; /**< \brief Transmit Channel B */
106 IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENA_P02_4_OUT; /**< \brief Transmit Enable Channel A */
107 IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENA_P11_6_OUT; /**< \brief Transmit Enable Channel A */
108 IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENA_P14_9_OUT; /**< \brief Transmit Enable Channel A */
109 IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P02_5_OUT; /**< \brief Transmit Enable Channel B */
110 IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P11_11_OUT; /**< \brief Transmit Enable Channel B */
111 IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P11_6_OUT; /**< \brief Transmit Enable Channel B */
112 IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P14_6_OUT; /**< \brief Transmit Enable Channel B */
113 IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P14_9_OUT; /**< \brief Transmit Enable Channel B */
114 IFX_EXTERN IfxEray_Txen_Out IfxEray1_TXENA_P01_14_OUT; /**< \brief Transmit Enable Channel A */
115 IFX_EXTERN IfxEray_Txen_Out IfxEray1_TXENA_P14_9_OUT; /**< \brief Transmit Enable Channel A */
116 IFX_EXTERN IfxEray_Txen_Out IfxEray1_TXENB_P02_15_OUT; /**< \brief Transmit Enable Channel B */
117 IFX_EXTERN IfxEray_Txen_Out IfxEray1_TXENB_P14_6_OUT; /**< \brief Transmit Enable Channel B */
118
119 /** \brief Table dimensions */
120 #define IFXERAY_PINMAP_NUM_MODULES 2
121 #define IFXERAY_PINMAP_NUM_NODES 2
122 #define IFXERAY_PINMAP_RXD_IN_NUM_ITEMS 4
123 #define IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS 4
124 #define IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS 5
125
126
127 /** \brief IfxEray_Rxd_In table */
128 IFX_EXTERN const IfxEray_Rxd_In *IfxEray_Rxd_In_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_RXD_IN_NUM_ITEMS];
129
130 /** \brief IfxEray_Txd_Out table */
131 IFX_EXTERN const IfxEray_Txd_Out *IfxEray_Txd_Out_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS];
132
133 /** \brief IfxEray_Txen_Out table */
134 IFX_EXTERN const IfxEray_Txen_Out *IfxEray_Txen_Out_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS];
135
136 /** \} */
137
138 #endif /* IFXERAY_PINMAP_H */
IfxEray_Txd_Out
TXD pin mapping structure.
Definition: IfxEray_PinMap.h:65
IfxEray0_TXENB_P11_6_OUT
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P11_6_OUT
Transmit Enable Channel B.
Definition: IfxEray_PinMap.h:111
IfxEray_Rxd_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxEray_PinMap.h:60
IfxEray1_TXENA_P14_9_OUT
IFX_EXTERN IfxEray_Txen_Out IfxEray1_TXENA_P14_9_OUT
Transmit Enable Channel A.
Definition: IfxEray_PinMap.h:115
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:126
IfxEray_Rxd_In_pinTable
IFX_EXTERN const IfxEray_Rxd_In * IfxEray_Rxd_In_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_RXD_IN_NUM_ITEMS]
IfxEray_Rxd_In table.
Definition: IfxEray_PinMap.h:128
IfxEray_Txen_Out
TXEN pin mapping structure.
Definition: IfxEray_PinMap.h:74
IfxEray0_RXDA2_P02_1_IN
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA2_P02_1_IN
Receive Channel A2.
Definition: IfxEray_PinMap.h:84
IfxEray0_TXENB_P14_6_OUT
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P14_6_OUT
Transmit Enable Channel B.
Definition: IfxEray_PinMap.h:112
IfxEray_Txd_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxEray_PinMap.h:70
IfxEray0_TXENA_P14_9_OUT
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENA_P14_9_OUT
Transmit Enable Channel A.
Definition: IfxEray_PinMap.h:108
IfxEray1_TXDA_P01_12_OUT
IFX_EXTERN IfxEray_Txd_Out IfxEray1_TXDA_P01_12_OUT
Transmit Channel A.
Definition: IfxEray_PinMap.h:102
IFXERAY_PINMAP_RXD_IN_NUM_ITEMS
#define IFXERAY_PINMAP_RXD_IN_NUM_ITEMS
Definition: IfxEray_PinMap.h:122
IfxEray0_TXDB_P14_0_OUT
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P14_0_OUT
Transmit Channel B.
Definition: IfxEray_PinMap.h:100
IfxEray0_RXDB2_P02_3_IN
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB2_P02_3_IN
Receive Channel B2.
Definition: IfxEray_PinMap.h:88
IfxEray_Rxd_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxEray_PinMap.h:61
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxEray0_TXENA_P02_4_OUT
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENA_P02_4_OUT
Transmit Enable Channel A.
Definition: IfxEray_PinMap.h:106
IfxEray1_TXENB_P02_15_OUT
IFX_EXTERN IfxEray_Txen_Out IfxEray1_TXENB_P02_15_OUT
Transmit Enable Channel B.
Definition: IfxEray_PinMap.h:116
IfxEray1_TXDB_P14_5_OUT
IFX_EXTERN IfxEray_Txd_Out IfxEray1_TXDB_P14_5_OUT
Transmit Channel B.
Definition: IfxEray_PinMap.h:105
IfxEray0_RXDB0_P14_7_IN
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB0_P14_7_IN
Receive Channel B0.
Definition: IfxEray_PinMap.h:86
IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS
#define IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS
Definition: IfxEray_PinMap.h:124
IfxEray0_TXENB_P11_11_OUT
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P11_11_OUT
Transmit Enable Channel B.
Definition: IfxEray_PinMap.h:110
IfxEray_Txen_Out_pinTable
IFX_EXTERN const IfxEray_Txen_Out * IfxEray_Txen_Out_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS]
IfxEray_Txen_Out table.
Definition: IfxEray_PinMap.h:134
IfxEray_Rxd_In::nodeId
IfxEray_NodeId nodeId
Node ID.
Definition: IfxEray_PinMap.h:59
IfxEray0_TXENB_P02_5_OUT
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P02_5_OUT
Transmit Enable Channel B.
Definition: IfxEray_PinMap.h:109
IfxEray0_RXDB3_P14_1_IN
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB3_P14_1_IN
Receive Channel B3.
Definition: IfxEray_PinMap.h:89
IfxEray1_TXENA_P01_14_OUT
IFX_EXTERN IfxEray_Txen_Out IfxEray1_TXENA_P01_14_OUT
Transmit Enable Channel A.
Definition: IfxEray_PinMap.h:114
IfxEray1_TXDB_P01_13_OUT
IFX_EXTERN IfxEray_Txd_Out IfxEray1_TXDB_P01_13_OUT
Transmit Channel B.
Definition: IfxEray_PinMap.h:104
IfxEray0_TXENB_P14_9_OUT
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P14_9_OUT
Transmit Enable Channel B.
Definition: IfxEray_PinMap.h:113
IfxEray0_TXDA_P11_3_OUT
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P11_3_OUT
Transmit Channel A.
Definition: IfxEray_PinMap.h:95
IfxEray1_RXDA1_P01_1_IN
IFX_EXTERN IfxEray_Rxd_In IfxEray1_RXDA1_P01_1_IN
Receive Channel A1.
Definition: IfxEray_PinMap.h:91
IfxEray0_TXDB_P02_2_OUT
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P02_2_OUT
Transmit Channel B.
Definition: IfxEray_PinMap.h:98
IfxEray1_RXDB0_P14_7_IN
IFX_EXTERN IfxEray_Rxd_In IfxEray1_RXDB0_P14_7_IN
Receive Channel B0.
Definition: IfxEray_PinMap.h:92
IFXERAY_PINMAP_NUM_MODULES
#define IFXERAY_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxEray_PinMap.h:120
IfxEray1_RXDA0_P14_8_IN
IFX_EXTERN IfxEray_Rxd_In IfxEray1_RXDA0_P14_8_IN
Receive Channel A0.
Definition: IfxEray_PinMap.h:90
IfxEray_Rxd_In::module
Ifx_ERAY * module
Base address.
Definition: IfxEray_PinMap.h:58
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:246
IfxEray0_TXENA_P11_6_OUT
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENA_P11_6_OUT
Transmit Enable Channel A.
Definition: IfxEray_PinMap.h:107
IfxEray0_RXDB1_P11_10_IN
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB1_P11_10_IN
Receive Channel B1.
Definition: IfxEray_PinMap.h:87
IfxEray_Rxd_In
RXD pin mapping structure.
Definition: IfxEray_PinMap.h:56
Ifx_RxSel
Ifx_RxSel
input multiplexer definition used in PinMaps
Definition: Ifx_Types.h:127
IfxEray1_TXDA_P14_10_OUT
IFX_EXTERN IfxEray_Txd_Out IfxEray1_TXDA_P14_10_OUT
Transmit Channel A.
Definition: IfxEray_PinMap.h:103
IfxEray1_RXDB1_P01_8_IN
IFX_EXTERN IfxEray_Rxd_In IfxEray1_RXDB1_P01_8_IN
Receive Channel B1.
Definition: IfxEray_PinMap.h:93
IfxEray0_TXDA_P14_0_OUT
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P14_0_OUT
Transmit Channel A.
Definition: IfxEray_PinMap.h:96
IfxEray0_RXDA1_P11_9_IN
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA1_P11_9_IN
Receive Channel A1.
Definition: IfxEray_PinMap.h:83
IfxEray0_TXDB_P11_12_OUT
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P11_12_OUT
Transmit Channel B.
Definition: IfxEray_PinMap.h:99
IfxEray0_RXDA3_P14_1_IN
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA3_P14_1_IN
Receive Channel A3.
Definition: IfxEray_PinMap.h:85
IFXERAY_PINMAP_NUM_NODES
#define IFXERAY_PINMAP_NUM_NODES
Definition: IfxEray_PinMap.h:121
IfxEray0_TXDA_P02_0_OUT
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P02_0_OUT
Transmit Channel A.
Definition: IfxEray_PinMap.h:94
IfxEray0_RXDA0_P14_8_IN
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA0_P14_8_IN
Receive Channel A0.
Definition: IfxEray_PinMap.h:82
IfxEray1_TXENB_P14_6_OUT
IFX_EXTERN IfxEray_Txen_Out IfxEray1_TXENB_P14_6_OUT
Transmit Enable Channel B.
Definition: IfxEray_PinMap.h:117
IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS
#define IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS
Definition: IfxEray_PinMap.h:123
IfxEray_cfg.h
ERAY on-chip implementation data.
IfxEray_NodeId
IfxEray_NodeId
Node Id in communication cycle.
Definition: IfxEray_cfg.h:88
IfxEray0_TXDB_P14_5_OUT
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P14_5_OUT
Transmit Channel B.
Definition: IfxEray_PinMap.h:101
IfxEray_Txd_Out_pinTable
IFX_EXTERN const IfxEray_Txd_Out * IfxEray_Txd_Out_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS]
IfxEray_Txd_Out table.
Definition: IfxEray_PinMap.h:131
IfxEray0_TXDA_P14_10_OUT
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P14_10_OUT
Transmit Channel A.
Definition: IfxEray_PinMap.h:97
IfxPort.h
PORT basic functionality.


iLLD_TC38A: IfxEray_cfg.c Source File

  • _Impl
IfxEray_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxEray_cfg.c
3 * \brief ERAY on-chip implementation data
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxEray_cfg.h"
47
48 /******************************************************************************/
49 /*-----------------------Exported Variables/Constants-------------------------*/
50 /******************************************************************************/
51
52 IFX_CONST IfxModule_IndexMap IfxEray_cfg_indexMap[IFXERAY_NUM_MODULES] = {
53 {&MODULE_ERAY0, (uint32)IfxEray_Index_0},
54 {&MODULE_ERAY1, (uint32)IfxEray_Index_1}
55 };
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxEray_Index_1
ERAY index 1.
Definition: IfxEray_cfg.h:83
IfxEray_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxEray_cfg_indexMap[IFXERAY_NUM_MODULES]
Definition: IfxEray_cfg.c:52
IfxEray_Index_0
ERAY index 0.
Definition: IfxEray_cfg.h:82
IFXERAY_NUM_MODULES
#define IFXERAY_NUM_MODULES
Definition: IfxEray_cfg.h:65
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:140
IfxEray_cfg.h
ERAY on-chip implementation data.


iLLD_TC38A: IfxEray_cfg.h Source File

  • _Impl
IfxEray_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxEray_cfg.h
3 * \brief ERAY on-chip implementation data
4 * \ingroup IfxLld_Eray
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Eray ERAY
42 * \ingroup IfxLld
43 * \defgroup IfxLld_Eray_Impl Implementation
44 * \ingroup IfxLld_Eray
45 * \defgroup IfxLld_Eray_Std Standard Driver
46 * \ingroup IfxLld_Eray
47 * \defgroup IfxLld_Eray_Impl_Enumerations Enumerations
48 * \ingroup IfxLld_Eray_Impl
49 */
50
51 #ifndef IFXERAY_CFG_H
52 #define IFXERAY_CFG_H 1
53
54 /******************************************************************************/
55 /*----------------------------------Includes----------------------------------*/
56 /******************************************************************************/
57
58 #include "Cpu/Std/Ifx_Types.h"
59 #include "IfxEray_reg.h"
60
61 /******************************************************************************/
62 /*-----------------------------------Macros-----------------------------------*/
63 /******************************************************************************/
64
65 #define IFXERAY_NUM_MODULES (2)
66
67 #define IFXERAY_NUM_SLOTS (128)
68
69 #define IFXERAY_NUM_CHANNELS (4)
70
71 /******************************************************************************/
72 /*--------------------------------Enumerations--------------------------------*/
73 /******************************************************************************/
74
75 /** \addtogroup IfxLld_Eray_Impl_Enumerations
76 * \{ */
77 /** \brief List of the available Eray resources
78 */
79 typedef enum
80 {
81 IfxEray_Index_none = -1, /**< \brief Not Selected */
82 IfxEray_Index_0 = 0, /**< \brief ERAY index 0 */
83 IfxEray_Index_1 /**< \brief ERAY index 1 */
84 } IfxEray_Index;
85
86 /** \brief Node Id in communication cycle.
87 */
88 typedef enum
89 {
90 IfxEray_NodeId_a = 0, /**< \brief Ifx_ERAY Node A */
91 IfxEray_NodeId_b = 1, /**< \brief Ifx_ERAY Node B */
92 IfxEray_NodeId_none = -1 /**< \brief None of the Ifx_ERAY Nodes */
93 } IfxEray_NodeId;
94
95 /** \} */
96
97 /** \addtogroup IfxLld_Eray_Impl_Enumerations
98 * \{ */
99
100 /******************************************************************************/
101 /*-------------------Global Exported Variables/Constants----------------------*/
102 /******************************************************************************/
103
104 IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxEray_cfg_indexMap[IFXERAY_NUM_MODULES];
105
106 /** \} */
107
108 #endif /* IFXERAY_CFG_H */
IfxEray_NodeId_none
None of the Ifx_ERAY Nodes.
Definition: IfxEray_cfg.h:92
IfxEray_NodeId_b
Ifx_ERAY Node B.
Definition: IfxEray_cfg.h:91
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxEray_Index_1
ERAY index 1.
Definition: IfxEray_cfg.h:83
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxEray_Index_0
ERAY index 0.
Definition: IfxEray_cfg.h:82
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IFXERAY_NUM_MODULES
#define IFXERAY_NUM_MODULES
Definition: IfxEray_cfg.h:65
IfxEray_NodeId_a
Ifx_ERAY Node A.
Definition: IfxEray_cfg.h:90
IfxEray_Index_none
Not Selected.
Definition: IfxEray_cfg.h:81
IfxEray_cfg_indexMap
IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxEray_cfg_indexMap[IFXERAY_NUM_MODULES]
Definition: IfxEray_cfg.h:104
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:140
IfxEray_Index
IfxEray_Index
List of the available Eray resources.
Definition: IfxEray_cfg.h:79
IfxEray_NodeId
IfxEray_NodeId
Node Id in communication cycle.
Definition: IfxEray_cfg.h:88


iLLD_TC38A: IfxEvadc.c Source File

  • Evadc
  • Std
IfxEvadc.c
Go to the documentation of this file.
1 /**
2 * \file IfxEvadc.c
3 * \brief EVADC basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxEvadc.h"
47
48 /******************************************************************************/
49 /*-------------------------Function Implementations---------------------------*/
50 /******************************************************************************/
51
52 void IfxEvadc_addToQueue(Ifx_EVADC_G *group, IfxEvadc_ChannelId channel, IfxEvadc_RequestSource sourceType, uint32 options)
53 {
54 switch (sourceType)
55 {
56 case IfxEvadc_RequestSource_queue0:
57 group->Q[0].QINR.U = (channel | options);
58 break;
59 case IfxEvadc_RequestSource_queue1:
60 group->Q[1].QINR.U = (channel | options);
61 break;
62 case IfxEvadc_RequestSource_queue2:
63 group->Q[2].QINR.U = (channel | options);
64
65 break;
66 }
67 }
68
69
70 void IfxEvadc_configExternalMultiplexerMode(Ifx_EVADC *evadc, Ifx_EVADC_G *evadcG, IfxEvadc_ExternalMultiplexerMode mode, uint8 channels, IfxEvadc_EmuxSelectValue startChannel, IfxEvadc_EmuxCodingScheme code, IfxEvadc_EmuxSampleTimeControl sampleTimeControl, IfxEvadc_ChannelSelectionStyle channelSelectionStyle)
71 {
72 Ifx_EVADC_G_EMUXCTR emuxctr;
73 Ifx_EVADC_G_EMUXCS emuxcs;
74
75 emuxctr.B.EMXWC = 1;
76 emuxctr.B.EMUXMODE = mode;
77 emuxctr.B.EMXCSS = channelSelectionStyle;
78 emuxctr.B.EMUXSET = startChannel;
79 emuxctr.B.EMXCOD = code;
80 emuxctr.B.EMXST = sampleTimeControl;
81 emuxcs.B.EMUXCH = channels;
82 IfxEvadc_enableAccess(evadc, IfxEvadc_Protection_externalMultiplexer);
83 evadcG->EMUXCTR.U = emuxctr.U;
84 emuxctr.B.EMXWC = 0;
85 evadcG->EMUXCTR.U = emuxctr.U;
86 evadcG->EMUXCS.U = emuxcs.U;
87 IfxEvadc_disableAccess(evadc, IfxEvadc_Protection_externalMultiplexer);
88 }
89
90
91 void IfxEvadc_disableAccess(Ifx_EVADC *evadc, IfxEvadc_Protection protectionSet)
92 {
93 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
94 IfxScuWdt_clearSafetyEndinit(passwd);
95
96 if (protectionSet < IFXEVADC_MAXIMUM_BITFIELDS_IN_ACCPROT0_REGISTER)
97 {
98 evadc->ACCPROT0.U |= (0x00000001 << protectionSet);
99 }
100 else if (protectionSet < IFXEVADC_MAXIMUM_BITFIELDS_IN_ACCPROT1_REGISTER)
101 {
102 evadc->ACCPROT1.U |= (0x00000001 << (protectionSet & 0x1F));
103 }
104 else
105 {
106 evadc->ACCPROT2.U |= (0x00000001 << (protectionSet & 0x3F));
107 }
108
109 IfxScuWdt_setSafetyEndinit(passwd);
110 }
111
112
113 void IfxEvadc_disableQueueSlotExternalTrigger(Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
114 {
115 switch (sourceType)
116 {
117 case IfxEvadc_RequestSource_queue0:
118 evadcG->Q[0].QMR.B.ENTR = 0; /* disable external trigger */
119 break;
120 case IfxEvadc_RequestSource_queue1:
121 evadcG->Q[1].QMR.B.ENTR = 0; /* disable external trigger */
122 break;
123 case IfxEvadc_RequestSource_queue2:
124 evadcG->Q[2].QMR.B.ENTR = 0; /* disable external trigger */
125 break;
126 }
127 }
128
129
130 void IfxEvadc_enableAccess(Ifx_EVADC *evadc, IfxEvadc_Protection protectionSet)
131 {
132 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
133 IfxScuWdt_clearSafetyEndinit(passwd);
134
135 if (protectionSet < IFXEVADC_MAXIMUM_BITFIELDS_IN_ACCPROT0_REGISTER)
136 {
137 evadc->ACCPROT0.U &= ~(0x00000001 << protectionSet);
138 }
139 else if (protectionSet < IFXEVADC_MAXIMUM_BITFIELDS_IN_ACCPROT1_REGISTER)
140 {
141 evadc->ACCPROT1.U &= ~(0x00000001 << (protectionSet & 0x1F));
142 }
143 else
144 {
145 evadc->ACCPROT2.U &= ~(0x00000001 << (protectionSet & 0x3F));
146 }
147
148 IfxScuWdt_setSafetyEndinit(passwd);
149 }
150
151
152 void IfxEvadc_enableQueueSlotExternalTrigger(Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
153 {
154 switch (sourceType)
155 {
156 case IfxEvadc_RequestSource_queue0:
157 evadcG->Q[0].QMR.B.ENTR = 1; /* enable external trigger */
158 break;
159 case IfxEvadc_RequestSource_queue1:
160 evadcG->Q[1].QMR.B.ENTR = 1; /* enable external trigger */
161 break;
162 case IfxEvadc_RequestSource_queue2:
163 evadcG->Q[2].QMR.B.ENTR = 1; /* enable external trigger */
164
165 break;
166 }
167 }
168
169
170 float32 IfxEvadc_getAdcDigitalFrequency(Ifx_EVADC *evadc)
171 {
172 IFX_UNUSED_PARAMETER(evadc);
173 #ifdef IFX_CFG_AURIX_SCUCCU_USED
174 return IfxScuCcu_getSpbFrequency();
175 #else
176 return IfxScuCcu_getAdcFrequency();
177 #endif
178 }
179
180
181 float32 IfxEvadc_getAdcModuleFrequency(Ifx_EVADC *evadc)
182 {
183 IFX_UNUSED_PARAMETER(evadc);
184 #ifdef IFX_CFG_AURIX_SCUCCU_USED
185 return IfxScuCcu_getSpbFrequency();
186 #else
187 return IfxScuCcu_getAdcFrequency();
188 #endif
189 }
190
191
192 IfxEvadc_GatingMode IfxEvadc_getQueueSlotGatingMode(Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
193 {
194 uint8 gatingMode = 0;
195
196 switch (sourceType)
197 {
198 case IfxEvadc_RequestSource_queue0:
199 gatingMode = evadcG->Q[0].QMR.B.ENGT;
200 break;
201 case IfxEvadc_RequestSource_queue1:
202 gatingMode = evadcG->Q[1].QMR.B.ENGT;
203 break;
204 case IfxEvadc_RequestSource_queue2:
205 gatingMode = evadcG->Q[2].QMR.B.ENGT;
206
207 break;
208 }
209
210 return (IfxEvadc_GatingMode)gatingMode;
211 }
212
213
214 IfxEvadc_GatingSource IfxEvadc_getQueueSlotGatingSource(Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
215 {
216 uint32 gateSource = 0;
217
218 switch (sourceType)
219 {
220 case IfxEvadc_RequestSource_queue0:
221 gateSource = evadcG->Q[0].QCTRL.B.GTSEL;
222 break;
223 case IfxEvadc_RequestSource_queue1:
224 gateSource = evadcG->Q[1].QCTRL.B.GTSEL;
225 break;
226 case IfxEvadc_RequestSource_queue2:
227 gateSource = evadcG->Q[2].QCTRL.B.GTSEL;
228 break;
229 }
230
231 return (IfxEvadc_GatingSource)gateSource;
232 }
233
234
235 IfxEvadc_RequestSlotPriority IfxEvadc_getQueueSlotPriority(Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
236 {
237 uint8 slotPriority = 0;
238
239 switch (sourceType)
240 {
241 case IfxEvadc_RequestSource_queue0:
242 slotPriority = evadcG->ARBPR.B.PRIO0;
243 break;
244 case IfxEvadc_RequestSource_queue1:
245 slotPriority = evadcG->ARBPR.B.PRIO1;
246 break;
247 case IfxEvadc_RequestSource_queue2:
248 slotPriority = evadcG->ARBPR.B.PRIO2;
249 break;
250 }
251
252 return (IfxEvadc_RequestSlotPriority)slotPriority;
253 }
254
255
256 IfxEvadc_RequestSlotStartMode IfxEvadc_getQueueSlotStartMode(Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
257 {
258 uint8 slotStartMode = 0;
259
260 switch (sourceType)
261 {
262 case IfxEvadc_RequestSource_queue0:
263 slotStartMode = evadcG->ARBPR.B.CSM0;
264 break;
265 case IfxEvadc_RequestSource_queue1:
266 slotStartMode = evadcG->ARBPR.B.CSM1;
267 break;
268 case IfxEvadc_RequestSource_queue2:
269 slotStartMode = evadcG->ARBPR.B.CSM2;
270 break;
271 }
272
273 return (IfxEvadc_RequestSlotStartMode)slotStartMode;
274 }
275
276
277 IfxEvadc_TriggerSource IfxEvadc_getQueueSlotTriggerInput(Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
278 {
279 uint32 triggerSource = 0;
280
281 switch (sourceType)
282 {
283 case IfxEvadc_RequestSource_queue0:
284 triggerSource = evadcG->Q[0].QCTRL.B.XTSEL;
285 break;
286 case IfxEvadc_RequestSource_queue1:
287 triggerSource = evadcG->Q[1].QCTRL.B.XTSEL;
288 break;
289 case IfxEvadc_RequestSource_queue2:
290 triggerSource = evadcG->Q[2].QCTRL.B.XTSEL;
291
292 break;
293 }
294
295 return (IfxEvadc_TriggerSource)triggerSource;
296 }
297
298
299 IfxEvadc_TriggerMode IfxEvadc_getQueueSlotTriggerMode(Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
300 {
301 uint8 triggerMode = 0;
302
303 switch (sourceType)
304 {
305 case IfxEvadc_RequestSource_queue0:
306 triggerMode = evadcG->Q[0].QCTRL.B.XTMODE;
307 break;
308 case IfxEvadc_RequestSource_queue1:
309 triggerMode = evadcG->Q[1].QCTRL.B.XTMODE;
310 break;
311 case IfxEvadc_RequestSource_queue2:
312 triggerMode = evadcG->Q[2].QCTRL.B.XTMODE;
313
314 break;
315 }
316
317 return (IfxEvadc_TriggerMode)triggerMode;
318 }
319
320
321 IfxEvadc_Status IfxEvadc_getQueueStatus(Ifx_EVADC_G *group, IfxEvadc_RequestSource sourceType)
322 {
323 IfxEvadc_Status status = IfxEvadc_Status_noError;
324
325 switch (sourceType)
326 {
327 case IfxEvadc_RequestSource_queue0:
328
329 /* just fill level is checked */
330 if (0x7 == group->Q[0].QSR.B.FILL)
331 {
332 status = IfxEvadc_Status_queueFull;
333 }
334 else
335 {
336 status = IfxEvadc_Status_noError;
337 }
338
339 break;
340
341 case IfxEvadc_RequestSource_queue1:
342
343 if (0x7 == group->Q[1].QSR.B.FILL)
344 {
345 status = IfxEvadc_Status_queueFull;
346 }
347 else
348 {
349 status = IfxEvadc_Status_noError;
350 }
351
352 break;
353
354 case IfxEvadc_RequestSource_queue2:
355
356 if (0x7 == group->Q[2].QSR.B.FILL)
357 {
358 status = IfxEvadc_Status_queueFull;
359 }
360 else
361 {
362 status = IfxEvadc_Status_noError;
363 }
364
365 break;
366 }
367
368 return status;
369 }
370
371
372 Ifx_EVADC_G_RES IfxEvadc_getResultBasedOnRequestSource(Ifx_EVADC *evadc, Ifx_EVADC_G *group, IfxEvadc_ChannelId channel, IfxEvadc_RequestSource sourceType)
373 {
374 sint32 sourceResultRegister = -1;
375 Ifx_EVADC_G_RES tmpResult;
376
377 switch (sourceType)
378 {
379 case IfxEvadc_RequestSource_queue0:
380 sourceResultRegister = group->Q[0].QCTRL.B.SRCRESREG;
381 break;
382
383 case IfxEvadc_RequestSource_queue1:
384 sourceResultRegister = group->Q[1].QCTRL.B.SRCRESREG;
385 break;
386
387 case IfxEvadc_RequestSource_queue2:
388 sourceResultRegister = group->Q[2].QCTRL.B.SRCRESREG;
389 break;
390 }
391
392 if (sourceResultRegister > 0)
393 {
394 tmpResult.U = group->RES[sourceResultRegister].U;
395
396 return tmpResult;
397 }
398 else
399 {
400 if ((group->CHCTR[channel].B.RESTGT == 1))
401 {
402 tmpResult.B.VF = evadc->GLOB.RES.B.VF;
403 tmpResult.B.CRS = evadc->GLOB.RES.B.CRS;
404 tmpResult.B.EMUX = evadc->GLOB.RES.B.EMUX;
405 tmpResult.B.CHNR = evadc->GLOB.RES.B.CHNR;
406 tmpResult.B.DRC = evadc->GLOB.RES.B.GNR;
407 tmpResult.B.RESULT = evadc->GLOB.RES.B.RESULT;
408
409 return tmpResult;
410 }
411 else
412 {
413 tmpResult.U = group->RES[group->CHCTR[channel].B.RESREG].U;
414
415 return tmpResult;
416 }
417 }
418 }
419
420
421 uint32 IfxEvadc_initializeFAdcI(Ifx_EVADC *evadc, uint32 fAdcI, Ifx_EVADC_G *group)
422 {
423 uint32 divA;
424 uint32 result;
425 #ifdef IFX_CFG_AURIX_SCUCCU_USED
426 uint32 fadc = IfxScuCcu_getSpbFrequency();
427 #else
428 uint32 fadc = IfxScuCcu_getAdcFrequency();
429 #endif
430 /* DivA = min(max(0, Fadc / FAdcI - 1), 0x3F); */
431 divA = (fadc << 2) / fAdcI;
432
433 divA = (divA + 2) >> 2; /* Round to nearest integer */
434 divA = __minu(divA - 1, 0x1Fu);
435 result = fadc / (divA + 1);
436
437 if (result > IFXEVADC_ANALOG_FREQUENCY_MAX)
438 {
439 divA = __minu(divA + 1, 0x1Fu);
440
441 result = fadc / (divA + 1);
442 }
443 else
444 {
445 /* do nothing */
446 }
447
448 if (!((result >= IFXEVADC_ANALOG_FREQUENCY_MIN) && (result <= IFXEVADC_ANALOG_FREQUENCY_MAX)))
449 {
450 result = 0; /* Min / Max FAdcI frequency */
451 }
452 else
453 {
454 IfxEvadc_initialiseAdcConverterClock(evadc, group, (IfxEvadc_ClockDividerFactor)divA);
455 }
456
457 return result;
458 }
459
460
461 boolean IfxEvadc_isRequestQueueSlotEnabled(Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
462 {
463 boolean enabled = 0;
464
465 switch (sourceType)
466 {
467 case IfxEvadc_RequestSource_queue0:
468 enabled = evadcG->ARBPR.B.ASEN0;
469 break;
470 case IfxEvadc_RequestSource_queue1:
471 enabled = evadcG->ARBPR.B.ASEN1;
472 break;
473 case IfxEvadc_RequestSource_queue2:
474 enabled = evadcG->ARBPR.B.ASEN2;
475 break;
476 }
477
478 return enabled;
479 }
480
481
482 void IfxEvadc_resetModule(Ifx_EVADC *evadc)
483 {
484 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
485 IfxScuWdt_clearCpuEndinit(passwd);
486
487 IfxEvadc_enableAccess(evadc, IfxEvadc_Protection_globalConfig);
488 evadc->KRST1.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
489 evadc->KRST0.B.RST = 1;
490 IfxScuWdt_setCpuEndinit(passwd);
491
492 while (evadc->KRST0.B.RSTSTAT == 0)
493 {
494 /* Wait until reset is executed */
495 }
496
497 IfxScuWdt_clearCpuEndinit(passwd);
498 evadc->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
499 IfxEvadc_disableAccess(evadc, IfxEvadc_Protection_globalConfig);
500 IfxScuWdt_setCpuEndinit(passwd);
501 }
502
503
504 void IfxEvadc_setArbiterPriority(Ifx_EVADC_G *evadcG, boolean slotEnable, IfxEvadc_RequestSlotPriority prio, IfxEvadc_RequestSlotStartMode mode, IfxEvadc_RequestSource slot)
505 {
506 if (slotEnable != FALSE)
507 {
508 evadcG->ARBPR.U |= slotEnable << (IFX_EVADC_G_ARBPR_ASEN0_OFF + slot); /* enable Slot */
509 evadcG->ARBPR.U &= ~(IFX_EVADC_G_ARBPR_PRIO0_MSK << (slot * 4u)); /* clear Priority */
510 evadcG->ARBPR.U |= (prio << (slot * 4u)); /* Set Priority */
511
512 if (mode != IfxEvadc_RequestSlotStartMode_waitForStart)
513 {
514 evadcG->ARBPR.U |= 0x1u << (IFX_EVADC_G_ARBPR_CSM0_OFF + (slot * 4u)); /* Set cancel inject mode */
515 }
516 else
517 {
518 evadcG->ARBPR.U &= ~(0x1u << (IFX_EVADC_G_ARBPR_CSM0_OFF + (slot * 4u))); /* Set Wait for Start mode */
519 }
520 }
521 else
522 {
523 evadcG->ARBPR.U &= ~(IFX_EVADC_G_ARBPR_ASEN0_MSK << (IFX_EVADC_G_ARBPR_ASEN0_OFF + slot)); /* disable Slot */
524 }
525 }
526
527
528 void IfxEvadc_setQueueSlotGatingConfig(Ifx_EVADC_G *evadcG, IfxEvadc_GatingSource gatingSource, IfxEvadc_GatingMode gatingMode, IfxEvadc_RequestSource sourceType)
529 {
530 Ifx_EVADC_G_Q_QCTRL qctrl;
531
532 switch (sourceType)
533 {
534 case IfxEvadc_RequestSource_queue0:
535
536 qctrl.U = evadcG->Q[0].QCTRL.U;
537 qctrl.B.GTWC = 1;
538 qctrl.B.GTSEL = gatingSource;
539 evadcG->Q[0].QCTRL.U = qctrl.U;
540 evadcG->Q[0].QMR.B.ENGT = gatingMode;
541 break;
542 case IfxEvadc_RequestSource_queue1:
543
544 qctrl.U = evadcG->Q[1].QCTRL.U;
545 qctrl.B.GTWC = 1;
546 qctrl.B.GTSEL = gatingSource;
547 evadcG->Q[1].QCTRL.U = qctrl.U;
548 evadcG->Q[1].QMR.B.ENGT = gatingMode;
549
550 break;
551 case IfxEvadc_RequestSource_queue2:
552
553 qctrl.U = evadcG->Q[2].QCTRL.U;
554 qctrl.B.GTWC = 1;
555 qctrl.B.GTSEL = gatingSource;
556 evadcG->Q[2].QCTRL.U = qctrl.U;
557 evadcG->Q[2].QMR.B.ENGT = gatingMode;
558
559 break;
560 }
561 }
562
563
564 void IfxEvadc_setQueueSlotTriggerOperatingConfig(Ifx_EVADC_G *evadcG, IfxEvadc_TriggerMode triggerMode, IfxEvadc_TriggerSource triggerSource, IfxEvadc_RequestSource sourceType)
565 {
566 Ifx_EVADC_G_Q_QCTRL qctrl;
567
568 switch (sourceType)
569 {
570 case IfxEvadc_RequestSource_queue0:
571
572 qctrl.U = evadcG->Q[0].QCTRL.U;
573 qctrl.B.XTWC = 1;
574 qctrl.B.XTMODE = triggerMode;
575 qctrl.B.XTSEL = triggerSource;
576 evadcG->Q[0].QCTRL.U = qctrl.U;
577 break;
578 case IfxEvadc_RequestSource_queue1:
579 qctrl.U = evadcG->Q[1].QCTRL.U;
580 qctrl.B.XTWC = 1;
581 qctrl.B.XTMODE = triggerMode;
582 qctrl.B.XTSEL = triggerSource;
583 evadcG->Q[1].QCTRL.U = qctrl.U;
584 break;
585 case IfxEvadc_RequestSource_queue2:
586 qctrl.U = evadcG->Q[2].QCTRL.U;
587 qctrl.B.XTWC = 1;
588 qctrl.B.XTMODE = triggerMode;
589 qctrl.B.XTSEL = triggerSource;
590 evadcG->Q[2].QCTRL.U = qctrl.U;
591
592 break;
593 }
594 }
595
596
597 void IfxEvadc_startupCalibration(Ifx_EVADC *evadc)
598 {
599 boolean calibrationRunning;
600 uint8 adcCalGroupNum = 0;
601 uint8 tempAdcGroupNum = 0;
602 /* Start calibration */
603 IfxEvadc_enableAccess(evadc, IfxEvadc_Protection_globalConfig);
604 /* Set SUCAL bit */
605 IfxEvadc_initiateStartupCalibration(evadc);
606 IfxEvadc_disableAccess(evadc, IfxEvadc_Protection_globalConfig);
607
608 /* Wait for hardware self-test and calibration to complete */
609 /* Wait until Calibration is done */
610 do
611 {
612 calibrationRunning = FALSE;
613
614 for (adcCalGroupNum = 0; adcCalGroupNum < IFXEVADC_NUM_ADC_GROUPS; adcCalGroupNum++)
615 {
616 if (adcCalGroupNum >= IFXEVADC_NUM_ADC_PRIMARY_GROUPS)
617 {
618 tempAdcGroupNum = adcCalGroupNum + (8 - IFXEVADC_NUM_ADC_PRIMARY_GROUPS);
619 }
620 else
621 {
622 tempAdcGroupNum = adcCalGroupNum;
623 }
624
625 if (IfxEvadc_getAdcCalibrationActiveState(evadc, tempAdcGroupNum) != 0) /* Check ADC Calibration Flag CAL */
626 {
627 calibrationRunning = TRUE;
628 }
629 else
630 {
631 /* do nothing */
632 }
633 }
634 } while (calibrationRunning == TRUE); /* wait until calibration of all calibrated kernels are done */
635 }
636
637
638 boolean IfxEvadc_syncConvWorkAround(Ifx_EVADC *evadc)
639 {
640 volatile uint32 timeOut = 0;
641
642 boolean status = 1; /* 0 = Operation failed.Used for detecting OCDS Debug Active State Activation failure & Trigger Line TL1 Activation failure. */
643
644 /* get status of OCDS and trigger line TL1 by reading corresponding OCDS */
645 if (MODULE_CBS.OSTATE.B.OEN == 0)
646 {
647 MODULE_CBS.OEC.B.PAT = 0xA1;
648 MODULE_CBS.OEC.B.PAT = 0x5E;
649 MODULE_CBS.OEC.B.PAT = 0xA1;
650 MODULE_CBS.OEC.B.PAT = 0x5E;
651 }
652
653 timeOut = 20;
654
655 while (MODULE_CBS.OSTATE.B.OEN == 0 && (timeOut--) == 0)
656 {
657 status = 0;
658 }
659
660 evadc->OCS.U = 1 << IFX_EVADC_OCS_SUS_P_OFF |
661 3 << IFX_EVADC_OCS_SUS_OFF;
662
663 timeOut = 20;
664
665 while (MODULE_CBS.TLS.B.TL1 == 0 && (timeOut--) == 0)
666 {
667 MODULE_CBS.TLC.B.TLSP1 = 0x3; /* trigger line TL1 forced to active */
668 }
669
670 timeOut = 20;
671
672 while (MODULE_CBS.TLS.B.TL1 == 0 && (timeOut--) == 0)
673 {
674 status = 0;
675 }
676
677 timeOut = 200;
678
679 while (evadc->OCS.B.SUSSTA == 1 && (timeOut--) == 0)
680 {}
681
682 /* For EVADC deactivate Soft Suspend Mode 1 */
683 evadc->OCS.U = 1 << IFX_EVADC_OCS_SUS_P_OFF |
684 0 << IFX_EVADC_OCS_SUS_OFF;
685
686 /* Recover status (the status before entering this routine) */
687
688 if (MODULE_CBS.TLS.B.TL1 == 0) /* trigger line TL1 was not active */
689 {
690 MODULE_CBS.TLC.B.TLSP1 = 0x2; /* trigger line TL1 forced inactive*/
691 MODULE_CBS.TLC.B.TLSP1 = 0x0; /* trigger line TL1 unchanged (release forced inactive)*/
692 }
693
694 if (MODULE_CBS.OSTATE.B.OEN == 1) /* OCDS is enabled*/
695 { /*disable OCDS*/
696 MODULE_CBS.OEC.B.DS = 1;
697 }
698
699 return status;
700 }
IfxEvadc_getQueueSlotPriority
IfxEvadc_RequestSlotPriority IfxEvadc_getQueueSlotPriority(Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Gets the request queue slot priority.
Definition: IfxEvadc.c:235
IfxEvadc_Protection_externalMultiplexer
Access control for EMUXSEL, GxEMUXCTR.
Definition: IfxEvadc.h:394
IfxEvadc_getQueueSlotTriggerInput
IfxEvadc_TriggerSource IfxEvadc_getQueueSlotTriggerInput(Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Gets the requested queue slot trigger input.
Definition: IfxEvadc.c:277
IfxScuCcu_getSpbFrequency
float32 IfxScuCcu_getSpbFrequency(void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider...
Definition: IfxScuCcu.c:479
IfxEvadc_ClockDividerFactor
IfxEvadc_ClockDividerFactor
Defines the frequency of the analog converter clock f_ADCI (base clock for conversion steps)...
Definition: IfxEvadc.h:564
IfxEvadc_ChannelSelectionStyle
IfxEvadc_ChannelSelectionStyle
External Multiplexer Channel Selection Style as defined in Ifx_EVADC.G[x].EMUXCTR.B.EMXCSS.
Definition: IfxEvadc.h:192
IfxScuCcu_getAdcFrequency
IFX_INLINE float32 IfxScuCcu_getAdcFrequency(void)
API to get Adc (EVADC, EDSADC) frequency. This API returns the based on the divider value in CCUCON r...
Definition: IfxScuCcu.h:1564
IfxEvadc_EmuxSelectValue
IfxEvadc_EmuxSelectValue
specifies the External Channel Start select value defined in Ifx_EVADC.G[x].EMUXCTR.B.EMUXSET
Definition: IfxEvadc.h:228
IfxEvadc_Status_noError
No error during api execution.
Definition: IfxEvadc.h:453
IfxEvadc_syncConvWorkAround
boolean IfxEvadc_syncConvWorkAround(Ifx_EVADC *evadc)
SW workaround of EVADC Master/Slave conversion jitter issue(MCMETILLD-910)
Definition: IfxEvadc.c:638
IfxEvadc_disableAccess
void IfxEvadc_disableAccess(Ifx_EVADC *evadc, IfxEvadc_Protection protectionSet)
Disable write access to the EVADC config/control registers.
Definition: IfxEvadc.c:91
IfxEvadc_disableQueueSlotExternalTrigger
void IfxEvadc_disableQueueSlotExternalTrigger(Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Disables the external trigger.
Definition: IfxEvadc.c:113
IfxEvadc_RequestSource
IfxEvadc_RequestSource
Request sources.
Definition: IfxEvadc.h:418
IfxEvadc_addToQueue
void IfxEvadc_addToQueue(Ifx_EVADC_G *group, IfxEvadc_ChannelId channel, IfxEvadc_RequestSource sourceType, uint32 options)
Add an entry to the queue of a group for the specified channel with the following options set: refill...
Definition: IfxEvadc.c:52
IfxEvadc_isRequestQueueSlotEnabled
boolean IfxEvadc_isRequestQueueSlotEnabled(Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Returns the queue slot requested status.
Definition: IfxEvadc.c:461
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxEvadc_RequestSlotStartMode_waitForStart
Wait for start.
Definition: IfxEvadc.h:412
float32
float float32
Definition: Platform_Types.h:170
IfxEvadc_ExternalMultiplexerMode
IfxEvadc_ExternalMultiplexerMode
Specifies External Multiplexer Mode define in Ifx_EVADC.G[x].EMUXCTR.B.EMUXMODE.
Definition: IfxEvadc.h:243
__minu
uint32 __minu(uint32, uint32) __attribute__((intrinsic_pseudo(3
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxEvadc_setQueueSlotTriggerOperatingConfig
void IfxEvadc_setQueueSlotTriggerOperatingConfig(Ifx_EVADC_G *evadcG, IfxEvadc_TriggerMode triggerMode, IfxEvadc_TriggerSource triggerSource, IfxEvadc_RequestSource sourceType)
Sets the trigger operating configurations.
Definition: IfxEvadc.c:564
IfxEvadc_setArbiterPriority
void IfxEvadc_setArbiterPriority(Ifx_EVADC_G *evadcG, boolean slotEnable, IfxEvadc_RequestSlotPriority prio, IfxEvadc_RequestSlotStartMode mode, IfxEvadc_RequestSource slot)
Sets the Arbiter slot configurations.
Definition: IfxEvadc.c:504
IfxEvadc_getQueueSlotStartMode
IfxEvadc_RequestSlotStartMode IfxEvadc_getQueueSlotStartMode(Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Gets the requested queue slot start mode.
Definition: IfxEvadc.c:256
IfxEvadc_enableAccess
void IfxEvadc_enableAccess(Ifx_EVADC *evadc, IfxEvadc_Protection protectionSet)
Enable write access to the EVADC config/control registers.
Definition: IfxEvadc.c:130
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxEvadc_Status_queueFull
Queue is full.
Definition: IfxEvadc.h:457
IFXEVADC_MAXIMUM_BITFIELDS_IN_ACCPROT0_REGISTER
#define IFXEVADC_MAXIMUM_BITFIELDS_IN_ACCPROT0_REGISTER
Maximum number of configurable bitfields in ACCPROT0 register.
Definition: IfxEvadc_cfg.h:92
IfxEvadc_configExternalMultiplexerMode
void IfxEvadc_configExternalMultiplexerMode(Ifx_EVADC *evadc, Ifx_EVADC_G *evadcG, IfxEvadc_ExternalMultiplexerMode mode, uint8 channels, IfxEvadc_EmuxSelectValue startChannel, IfxEvadc_EmuxCodingScheme code, IfxEvadc_EmuxSampleTimeControl sampleTimeControl, IfxEvadc_ChannelSelectionStyle channelSelectionStyle)
Configure external multiplexer mode.
Definition: IfxEvadc.c:70
IfxEvadc_setQueueSlotGatingConfig
void IfxEvadc_setQueueSlotGatingConfig(Ifx_EVADC_G *evadcG, IfxEvadc_GatingSource gatingSource, IfxEvadc_GatingMode gatingMode, IfxEvadc_RequestSource sourceType)
Sets the gating configurations.
Definition: IfxEvadc.c:528
IfxEvadc_initializeFAdcI
uint32 IfxEvadc_initializeFAdcI(Ifx_EVADC *evadc, uint32 fAdcI, Ifx_EVADC_G *group)
Configure the ADC analog clock.
Definition: IfxEvadc.c:421
IfxScuWdt_clearSafetyEndinit
void IfxScuWdt_clearSafetyEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:305
IFXEVADC_ANALOG_FREQUENCY_MIN
#define IFXEVADC_ANALOG_FREQUENCY_MIN
Minimum allowed analog frequency.
Definition: IfxEvadc_cfg.h:76
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxEvadc_RequestSource_queue0
8 stage Queue0 request
Definition: IfxEvadc.h:420
IfxEvadc_Protection_globalConfig
Access control for GLOBCFG.
Definition: IfxEvadc.h:393
IfxEvadc_initiateStartupCalibration
IFX_INLINE void IfxEvadc_initiateStartupCalibration(Ifx_EVADC *evadc)
initiates the calibration pulse phase.
Definition: IfxEvadc.h:2649
IfxEvadc_RequestSource_queue1
8 stage Queue1 request
Definition: IfxEvadc.h:421
IfxEvadc_getAdcDigitalFrequency
float32 IfxEvadc_getAdcDigitalFrequency(Ifx_EVADC *evadc)
configured Fadcd EVADC digital clock frequency in Hz.
Definition: IfxEvadc.c:170
IfxEvadc_RequestSlotPriority
IfxEvadc_RequestSlotPriority
Arbitration priority, Group x,defined in MODULE_EVADC.G[x].ARBPR.PRIOy(x=0,1,...,11;y=0,1,2)
Definition: IfxEvadc.h:400
IfxEvadc_resetModule
void IfxEvadc_resetModule(Ifx_EVADC *evadc)
Resets the kernel.
Definition: IfxEvadc.c:482
IFXEVADC_ANALOG_FREQUENCY_MAX
#define IFXEVADC_ANALOG_FREQUENCY_MAX
Maximum allowed analog frequency.
Definition: IfxEvadc_cfg.h:72
IfxEvadc_getQueueSlotGatingMode
IfxEvadc_GatingMode IfxEvadc_getQueueSlotGatingMode(Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Gets the requested queue slot gating mode.
Definition: IfxEvadc.c:192
IfxEvadc_getAdcCalibrationActiveState
IFX_INLINE uint8 IfxEvadc_getAdcCalibrationActiveState(Ifx_EVADC *evadc, uint8 adcCalGroupNum)
gets ADC Calibration Flag CAL status.
Definition: IfxEvadc.h:2366
IfxEvadc_TriggerSource
IfxEvadc_TriggerSource
Trigger request source defined in MODULE_EVADC.G[x].QCTRLy.XTSEL(x=0,1,..,11;y=0,1,..,7)
Definition: IfxEvadc.h:483
IfxEvadc_enableQueueSlotExternalTrigger
void IfxEvadc_enableQueueSlotExternalTrigger(Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Enables the external trigger.
Definition: IfxEvadc.c:152
IFXEVADC_NUM_ADC_GROUPS
#define IFXEVADC_NUM_ADC_GROUPS
Number of ADC Groups.
Definition: IfxEvadc_cfg.h:64
IfxEvadc_initialiseAdcConverterClock
IFX_INLINE void IfxEvadc_initialiseAdcConverterClock(Ifx_EVADC *evadc, Ifx_EVADC_G *evadcG, IfxEvadc_ClockDividerFactor converterClockDivider)
Initialises ADC converter clock.
Definition: IfxEvadc.h:2642
IfxEvadc_RequestSource_queue2
8 stage Queue2 request
Definition: IfxEvadc.h:422
IfxEvadc_GatingSource
IfxEvadc_GatingSource
External trigger gating defined in MODULE_EVADC.G[x].QCTRLy.GTSEL(x=0,1,..,11;y=0,1,..,7)
Definition: IfxEvadc.h:273
IfxEvadc_RequestSlotStartMode
IfxEvadc_RequestSlotStartMode
Request source start mode defined in MODULE_EVADC.G[x].ARBPR.CSMy(x=0,1,...,11;y=0,1,2)
Definition: IfxEvadc.h:410
u
uint32 min u
Definition: IfxCpu_IntrinsicsDcc.h:143
IFXEVADC_NUM_ADC_PRIMARY_GROUPS
#define IFXEVADC_NUM_ADC_PRIMARY_GROUPS
number of primary Groups
Definition: IfxEvadc_cfg.h:104
IfxEvadc_Status
IfxEvadc_Status
API return values defined in MODULE_EVADC.G[x].QSR0.U,MODULE_EVADC.G[x].QSR1.U,MODULE_EVADC.G[x].QSR2.U(x=0,1,...,11)
Definition: IfxEvadc.h:451
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxScuWdt_setSafetyEndinit
void IfxScuWdt_setSafetyEndinit(uint16 password)
SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:668
IfxScuWdt_getSafetyWatchdogPassword
uint16 IfxScuWdt_getSafetyWatchdogPassword(void)
SCUWDT API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.c:393
IfxEvadc_EmuxCodingScheme
IfxEvadc_EmuxCodingScheme
Specifies the External Coding scheme(binary/gray) defined in Ifx_EVADC.G[x].EMUXCTR.B.EMXCOD.
Definition: IfxEvadc.h:202
IfxEvadc_EmuxSampleTimeControl
IfxEvadc_EmuxSampleTimeControl
External Multiplexer sample time control defined in Ifx_EVADC.G[x].EMUXCTR.B.EMXST.
Definition: IfxEvadc.h:219
IfxEvadc_GatingMode
IfxEvadc_GatingMode
gating mode defined in MODULE_EVADC.QMR0.ENGT
Definition: IfxEvadc.h:263
IfxEvadc_getQueueSlotTriggerMode
IfxEvadc_TriggerMode IfxEvadc_getQueueSlotTriggerMode(Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Gets the requested queue slot trigger mode.
Definition: IfxEvadc.c:299
sint32
long sint32
Definition: Platform_Types.h:134
IfxEvadc_Protection
IfxEvadc_Protection
Access protection for Group registers defined in MODULE_EVADC.ACCPROT0.U.
Definition: IfxEvadc.h:315
IFXEVADC_MAXIMUM_BITFIELDS_IN_ACCPROT1_REGISTER
#define IFXEVADC_MAXIMUM_BITFIELDS_IN_ACCPROT1_REGISTER
Definition: IfxEvadc_cfg.h:100
IfxEvadc_startupCalibration
void IfxEvadc_startupCalibration(Ifx_EVADC *evadc)
Starts ADC calibration and wait for the end of the calibration process.
Definition: IfxEvadc.c:597
IfxEvadc_ChannelId
IfxEvadc_ChannelId
EVADC Channels.
Definition: IfxEvadc.h:138
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxEvadc.h
EVADC basic functionality.
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxEvadc_getQueueSlotGatingSource
IfxEvadc_GatingSource IfxEvadc_getQueueSlotGatingSource(Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Gets the requested queue slot gating input.
Definition: IfxEvadc.c:214
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxEvadc_getAdcModuleFrequency
float32 IfxEvadc_getAdcModuleFrequency(Ifx_EVADC *evadc)
ADC Module Frequency in Hz.
Definition: IfxEvadc.c:181
IfxEvadc_getResultBasedOnRequestSource
Ifx_EVADC_G_RES IfxEvadc_getResultBasedOnRequestSource(Ifx_EVADC *evadc, Ifx_EVADC_G *group, IfxEvadc_ChannelId channel, IfxEvadc_RequestSource sourceType)
Get conversion result (Function does not care about the alignment) value = raw * gain + offset...
Definition: IfxEvadc.c:372
IfxEvadc_getQueueStatus
IfxEvadc_Status IfxEvadc_getQueueStatus(Ifx_EVADC_G *group, IfxEvadc_RequestSource sourceType)
Gives the status of the Queue of a group by returning non zero value if the Queue is full...
Definition: IfxEvadc.c:321
IfxEvadc_TriggerMode
IfxEvadc_TriggerMode
trigger definition defined in MODULE_EVADC.G[x].QCTRL0.XTMODE(x=0,1,..,11)
Definition: IfxEvadc.h:473


iLLD_TC38A: IfxEvadc.h Source File

  • Evadc
  • Std
IfxEvadc.h
Go to the documentation of this file.
1 /**
2 * \file IfxEvadc.h
3 * \brief EVADC basic functionality
4 * \ingroup IfxLld_Evadc
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Evadc_Std_Enum Enumerations
42 * \ingroup IfxLld_Evadc_Std
43 * \defgroup IfxLld_Evadc_Std_Global Global Functions
44 * \ingroup IfxLld_Evadc_Std
45 * \defgroup IfxLld_Evadc_Std_QueueRequest Queue Request Functions
46 * \ingroup IfxLld_Evadc_Std
47 * \defgroup IfxLld_Evadc_Std_IO IO Pin Configuration Functions
48 * \ingroup IfxLld_Evadc_Std
49 * \defgroup IfxLld_Evadc_Std_Frequency Frequency Calculation
50 * \ingroup IfxLld_Evadc_Std
51 * \defgroup IfxLld_Evadc_Std_Group Group Functions
52 * \ingroup IfxLld_Evadc_Std
53 * \defgroup IfxLld_Evadc_Std_Module Module Functions
54 * \ingroup IfxLld_Evadc_Std
55 * \defgroup IfxLld_Evadc_Std_Channel Channel Functions
56 * \ingroup IfxLld_Evadc_Std
57 * \defgroup IfxLld_Evadc_Std_Emux Emux Functions
58 * \ingroup IfxLld_Evadc_Std
59 * \defgroup IfxLld_Evadc_Std_FastCompare Fast Compare functions
60 * \ingroup IfxLld_Evadc_Std
61 */
62
63 #ifndef IFXEVADC_H
64 #define IFXEVADC_H 1
65
66 /******************************************************************************/
67 /*----------------------------------Includes----------------------------------*/
68 /******************************************************************************/
69
70 #include "_Impl/IfxEvadc_cfg.h"
71 #include "_PinMap/IfxEvadc_PinMap.h"
72 #include "IfxEvadc_bf.h"
73 #include "Cpu/Std/IfxCpu_Intrinsics.h"
74 #include "Scu/Std/IfxScuCcu.h"
75 #include "Scu/Std/IfxScuWdt.h"
76 #include "IfxCbs_reg.h"
77
78 /******************************************************************************/
79 /*--------------------------------Enumerations--------------------------------*/
80 /******************************************************************************/
81
82 /** \addtogroup IfxLld_Evadc_Std_Enum
83 * \{ */
84 /** \brief Defined in MODULE_EVADC.G[x].ARBCFG.B.ANONS and ANONC
85 */
86 typedef enum
87 {
88 IfxEvadc_AnalogConverterMode_off = 0, /**< \brief Analog Converter off */
89 IfxEvadc_AnalogConverterMode_slowStandby = 1, /**< \brief Slow Standby Mode */
90 IfxEvadc_AnalogConverterMode_fastStandby = 2, /**< \brief Fast Standby Mode */
91 IfxEvadc_AnalogConverterMode_normalOperation = 3 /**< \brief Normal operation mode */
92 } IfxEvadc_AnalogConverterMode;
93
94 /** \brief Arbitration round length defined in MODULE_EVADC.G[x].ARBCFG.ARBRND(x=0,1,..,11)
95 */
96 typedef enum
97 {
98 IfxEvadc_ArbitrationRounds_4_slots = 0, /**< \brief An arbitration round contains 4 arbitration slots. */
99 IfxEvadc_ArbitrationRounds_8_slots = 1, /**< \brief An arbitration round contains 8 arbitration slots. */
100 IfxEvadc_ArbitrationRounds_16_slots = 2, /**< \brief An arbitration round contains 16 arbitration slots. */
101 IfxEvadc_ArbitrationRounds_20_slots = 3 /**< \brief An arbitration round contains 20 arbitration slots. */
102 } IfxEvadc_ArbitrationRounds;
103
104 /** \brief Boundary Extension defined in MODULE_EVADC.G[x].CHCTR[y].B.BNDSELX(x=0,1,...,11;y=0,1....,16)
105 */
106 typedef enum
107 {
108 IfxEvadc_BoundaryExtension_standard = 0, /**< \brief Boundary Standard mode. BNDSELU/BNDSELL as Boundaries */
109 IfxEvadc_BoundaryExtension_fastCompareResult1 = 1, /**< \brief Fast compare mode use as upper boundary Channel result 1 */
110 IfxEvadc_BoundaryExtension_fastCompareResult2 = 2, /**< \brief Fast compare mode use as upper boundary Channel result 2 */
111 IfxEvadc_BoundaryExtension_fastCompareResult3 = 3, /**< \brief Fast compare mode use as upper boundary Channel result 3 */
112 IfxEvadc_BoundaryExtension_fastCompareResult4 = 4, /**< \brief Fast compare mode use as upper boundary Channel result 4 */
113 IfxEvadc_BoundaryExtension_fastCompareResult5 = 5, /**< \brief Fast compare mode use as upper boundary Channel result 5 */
114 IfxEvadc_BoundaryExtension_fastCompareResult6 = 6, /**< \brief Fast compare mode use as upper boundary Channel result 6 */
115 IfxEvadc_BoundaryExtension_fastCompareResult7 = 7, /**< \brief Fast compare mode use as upper boundary Channel result 7 */
116 IfxEvadc_BoundaryExtension_fastCompareResult8 = 8, /**< \brief Fast compare mode use as upper boundary Channel result 8 */
117 IfxEvadc_BoundaryExtension_fastCompareResult9 = 9, /**< \brief Fast compare mode use as upper boundary Channel result 9 */
118 IfxEvadc_BoundaryExtension_fastCompareResult10 = 10, /**< \brief Fast compare mode use as upper boundary Channel result 10 */
119 IfxEvadc_BoundaryExtension_fastCompareResult11 = 11, /**< \brief Fast compare mode use as upper boundary Channel result 11 */
120 IfxEvadc_BoundaryExtension_fastCompareResult12 = 12, /**< \brief Fast compare mode use as upper boundary Channel result 12 */
121 IfxEvadc_BoundaryExtension_fastCompareResult13 = 13, /**< \brief Fast compare mode use as upper boundary Channel result 13 */
122 IfxEvadc_BoundaryExtension_fastCompareResult14 = 14, /**< \brief Fast compare mode use as upper boundary Channel result 14 */
123 IfxEvadc_BoundaryExtension_fastCompareResult15 = 15 /**< \brief Fast compare mode use as upper boundary Channel result 15 */
124 } IfxEvadc_BoundaryExtension;
125
126 /** \brief BoundarySel defined in MODULE_EVADC.G[x].CHCTR[y].B.BNDSELL(x=0,1,...,11;y=0,1....,16)
127 */
128 typedef enum
129 {
130 IfxEvadc_BoundarySelection_group0 = 0, /**< \brief Use group class 0 */
131 IfxEvadc_BoundarySelection_group1 = 1, /**< \brief Use group class 1 */
132 IfxEvadc_BoundarySelection_global0 = 2, /**< \brief Use global class 0 */
133 IfxEvadc_BoundarySelection_global1 = 3 /**< \brief Use global class 1 */
134 } IfxEvadc_BoundarySelection;
135
136 /** \brief EVADC Channels
137 */
138 typedef enum
139 {
140 IfxEvadc_ChannelId_none = -1, /**< \brief None of EVADC channels */
141 IfxEvadc_ChannelId_0 = 0, /**< \brief Channel 0 */
142 IfxEvadc_ChannelId_1 = 1, /**< \brief Channel 1 */
143 IfxEvadc_ChannelId_2 = 2, /**< \brief Channel 2 */
144 IfxEvadc_ChannelId_3 = 3, /**< \brief Channel 3 */
145 IfxEvadc_ChannelId_4 = 4, /**< \brief Channel 4 */
146 IfxEvadc_ChannelId_5 = 5, /**< \brief Channel 5 */
147 IfxEvadc_ChannelId_6 = 6, /**< \brief Channel 6 */
148 IfxEvadc_ChannelId_7 = 7, /**< \brief Channel 7 */
149 IfxEvadc_ChannelId_8 = 8, /**< \brief Channel 8 */
150 IfxEvadc_ChannelId_9 = 9, /**< \brief Channel 9 */
151 IfxEvadc_ChannelId_10 = 10, /**< \brief Channel 10 */
152 IfxEvadc_ChannelId_11 = 11, /**< \brief Channel 11 */
153 IfxEvadc_ChannelId_12 = 12, /**< \brief Channel 12 */
154 IfxEvadc_ChannelId_13 = 13, /**< \brief Channel 13 */
155 IfxEvadc_ChannelId_14 = 14, /**< \brief Channel 14 */
156 IfxEvadc_ChannelId_15 = 15 /**< \brief Channel 15 */
157 } IfxEvadc_ChannelId;
158
159 /** \brief ADC channel reference defined in MODULE_EVADC.G[x].CHCTR[y].B.REFSEL(x=0,1,...,11;y=0,1....,16)
160 */
161 typedef enum
162 {
163 IfxEvadc_ChannelReference_standard = 0, /**< \brief use Varef as reference */
164 IfxEvadc_ChannelReference_channel0 = 1 /**< \brief use CH0 as reference */
165 } IfxEvadc_ChannelReference;
166
167 /** \brief Channel Result defined in MODULE_EVADC.G[x].CHCTR[y].B.RESREG(x=0,1,...,11;y=0,1....,16)
168 */
169 typedef enum
170 {
171 IfxEvadc_ChannelResult_0 = 0, /**< \brief Use Channel result 0 */
172 IfxEvadc_ChannelResult_1, /**< \brief Use Channel result 1 */
173 IfxEvadc_ChannelResult_2, /**< \brief Use Channel result 2 */
174 IfxEvadc_ChannelResult_3, /**< \brief Use Channel result 3 */
175 IfxEvadc_ChannelResult_4, /**< \brief Use Channel result 4 */
176 IfxEvadc_ChannelResult_5, /**< \brief Use Channel result 5 */
177 IfxEvadc_ChannelResult_6, /**< \brief Use Channel result 6 */
178 IfxEvadc_ChannelResult_7, /**< \brief Use Channel result 7 */
179 IfxEvadc_ChannelResult_8, /**< \brief Use Channel result 8 */
180 IfxEvadc_ChannelResult_9, /**< \brief Use Channel result 9 */
181 IfxEvadc_ChannelResult_10, /**< \brief Use Channel result 10 */
182 IfxEvadc_ChannelResult_11, /**< \brief Use Channel result 11 */
183 IfxEvadc_ChannelResult_12, /**< \brief Use Channel result 12 */
184 IfxEvadc_ChannelResult_13, /**< \brief Use Channel result 13 */
185 IfxEvadc_ChannelResult_14, /**< \brief Use Channel result 14 */
186 IfxEvadc_ChannelResult_15 /**< \brief Use Channel result 15 */
187 } IfxEvadc_ChannelResult;
188
189 /** \brief External Multiplexer Channel Selection Style as defined in
190 * Ifx_EVADC.G[x].EMUXCTR.B.EMXCSS
191 */
192 typedef enum
193 {
194 IfxEvadc_ChannelSelectionStyle_channelNumber = 0, /**< \brief selects an arbitrary channel */
195 IfxEvadc_ChannelSelectionStyle_binary = 1 /**< \brief Each bit of bitfield EMUXCH selects the
196 * associated channel for EMUX control */
197 } IfxEvadc_ChannelSelectionStyle;
198
199 /** \brief Specifies the External Coding scheme(binary/gray)
200 * defined in Ifx_EVADC.G[x].EMUXCTR.B.EMXCOD
201 */
202 typedef enum
203 {
204 IfxEvadc_EmuxCodingScheme_binary = 0, /**< \brief Output the Channel Number in Binary code */
205 IfxEvadc_EmuxCodingScheme_gray = 1 /**< \brief Output the channel number in gray code */
206 } IfxEvadc_EmuxCodingScheme;
207
208 /** \brief Specifies the Emux interface
209 */
210 typedef enum
211 {
212 IfxEvadc_EmuxInterface_0 = 0, /**< \brief Emux Interface 0 */
213 IfxEvadc_EmuxInterface_1 = 1 /**< \brief Emux Interface 1 */
214 } IfxEvadc_EmuxInterface;
215
216 /** \brief External Multiplexer sample time control
217 * defined in Ifx_EVADC.G[x].EMUXCTR.B.EMXST
218 */
219 typedef enum
220 {
221 IfxEvadc_EmuxSampleTimeControl_settingChanges = 0, /**< \brief Use STCE Whenever Setting Changes */
222 IfxEvadc_EmuxSampleTimeControl_always = 1 /**< \brief Use STCE for each conversion of an external channel */
223 } IfxEvadc_EmuxSampleTimeControl;
224
225 /** \brief specifies the External Channel Start select value
226 * defined in Ifx_EVADC.G[x].EMUXCTR.B.EMUXSET
227 */
228 typedef enum
229 {
230 IfxEvadc_EmuxSelectValue_0 = 0, /**< \brief Start Selection Value 0 */
231 IfxEvadc_EmuxSelectValue_1, /**< \brief Start Selection Value 1 */
232 IfxEvadc_EmuxSelectValue_2, /**< \brief Start Selection Value 2 */
233 IfxEvadc_EmuxSelectValue_3, /**< \brief Start Selection Value 3 */
234 IfxEvadc_EmuxSelectValue_4, /**< \brief Start Selection Value 4 */
235 IfxEvadc_EmuxSelectValue_5, /**< \brief Start Selection Value 5 */
236 IfxEvadc_EmuxSelectValue_6, /**< \brief Start Selection Value 6 */
237 IfxEvadc_EmuxSelectValue_7 /**< \brief Start Selection Value 7 */
238 } IfxEvadc_EmuxSelectValue;
239
240 /** \brief Specifies External Multiplexer Mode
241 * define in Ifx_EVADC.G[x].EMUXCTR.B.EMUXMODE
242 */
243 typedef enum
244 {
245 IfxEvadc_ExternalMultiplexerMode_softwareControl = 0, /**< \brief Disable The Emux Control */
246 IfxEvadc_ExternalMultiplexerMode_steady = 1, /**< \brief select steady mode */
247 IfxEvadc_ExternalMultiplexerMode_singleStep = 2, /**< \brief Select single step mode */
248 IfxEvadc_ExternalMultiplexerMode_sequence = 3 /**< \brief Select Sequence Mode */
249 } IfxEvadc_ExternalMultiplexerMode;
250
251 /** \brief FIFO mode enable
252 */
253 typedef enum
254 {
255 IfxEvadc_FifoMode_seperateResultRegister = 0, /**< \brief seperate Result Register */
256 IfxEvadc_FifoMode_fifoStructure = 1, /**< \brief Part of FIFO structure: copy each new valid result */
257 IfxEvadc_FifoMode_maximumMode = 2, /**< \brief copy new result if bigger */
258 IfxEvadc_FifoMode_minimumMode = 3 /**< \brief copy new result if it is smaller */
259 } IfxEvadc_FifoMode;
260
261 /** \brief gating mode defined in MODULE_EVADC.QMR0.ENGT
262 */
263 typedef enum
264 {
265 IfxEvadc_GatingMode_disabled = 0, /**< \brief Gating is disabled, no conversion request are issued */
266 IfxEvadc_GatingMode_always = 1, /**< \brief Conversion request is issued if at least 1 conversion pending bit is set */
267 IfxEvadc_GatingMode_gatingHigh = 2, /**< \brief Conversion request is issued if at least 1 conversion pending bit is set and the gating signal is high */
268 IfxEvadc_GatingMode_gatingLow = 3 /**< \brief Conversion request is issued if at least 1 conversion pending bit is set and the gating signal is low */
269 } IfxEvadc_GatingMode;
270
271 /** \brief External trigger gating defined in MODULE_EVADC.G[x].QCTRLy.GTSEL(x=0,1,..,11;y=0,1,..,7)
272 */
273 typedef enum
274 {
275 IfxEvadc_GatingSource_0 = 0, /**< \brief Input signal REQGTx_0 */
276 IfxEvadc_GatingSource_1, /**< \brief Input signal REQGTx_1 */
277 IfxEvadc_GatingSource_2, /**< \brief Input signal REQGTx_2 */
278 IfxEvadc_GatingSource_3, /**< \brief Input signal REQGTx_3 */
279 IfxEvadc_GatingSource_4, /**< \brief Input signal REQGTx_4 */
280 IfxEvadc_GatingSource_5, /**< \brief Input signal REQGTx_5 */
281 IfxEvadc_GatingSource_6, /**< \brief Input signal REQGTx_6 */
282 IfxEvadc_GatingSource_7, /**< \brief Input signal REQGTx_7 */
283 IfxEvadc_GatingSource_8, /**< \brief Input signal REQGTx_8 */
284 IfxEvadc_GatingSource_9, /**< \brief Input signal REQGTx_9 */
285 IfxEvadc_GatingSource_10, /**< \brief Input signal REQGTx_10 */
286 IfxEvadc_GatingSource_11, /**< \brief Input signal REQGTx_11 */
287 IfxEvadc_GatingSource_12, /**< \brief Input signal REQGTx_12 */
288 IfxEvadc_GatingSource_13, /**< \brief Input signal REQGTx_13 */
289 IfxEvadc_GatingSource_14, /**< \brief Input signal REQGTx_14 */
290 IfxEvadc_GatingSource_15 /**< \brief Input signal REQGTx_15 */
291 } IfxEvadc_GatingSource;
292
293 /** \brief inputClass defined in MODULE_EVADC.G[x].CHCTR[y].B.ICLSEL(x=0,1,...,11;y=0,1....,16)
294 */
295 typedef enum
296 {
297 IfxEvadc_InputClasses_group0 = 0, /**< \brief Use group class 0 */
298 IfxEvadc_InputClasses_group1 = 1, /**< \brief Use group class 1 */
299 IfxEvadc_InputClasses_global0 = 2, /**< \brief Use global class 0 */
300 IfxEvadc_InputClasses_global1 = 3 /**< \brief Use global class 1 */
301 } IfxEvadc_InputClasses;
302
303 /** \brief ADC channel limit check defined in MODULE_EVADC.G[x].CHCTR[y].B.CHEVMODE(x=0,1,...,11;y=0,1....,16)
304 */
305 typedef enum
306 {
307 IfxEvadc_LimitCheck_noCheck = 0, /**< \brief Normal compare mode Event Never Fast Compare mode Event Never */
308 IfxEvadc_LimitCheck_eventIfInArea = 1, /**< \brief Normal compare mode Event If result is inside the boundary band Fast Compare mode Event If result switches to high (above comp. value) */
309 IfxEvadc_LimitCheck_eventIfOutsideArea = 2, /**< \brief Normal compare mode Event If result is outside the boundary band Fast Compare mode Event If result switches to low (below comp. value) */
310 IfxEvadc_LimitCheck_always = 3 /**< \brief Normal compare mode Event Always Fast Compare mode Event Always */
311 } IfxEvadc_LimitCheck;
312
313 /** \brief Access protection for Group registers defined in MODULE_EVADC.ACCPROT0.U
314 */
315 typedef enum
316 {
317 IfxEvadc_Protection_channelControl0 = 0, /**< \brief Access control for GxCHCTR0 */
318 IfxEvadc_Protection_channelControl1 = 1, /**< \brief Access control for GxCHCTR1 */
319 IfxEvadc_Protection_channelControl2 = 2, /**< \brief Access control for GxCHCTR2 */
320 IfxEvadc_Protection_channelControl3 = 3, /**< \brief Access control for GxCHCTR3 */
321 IfxEvadc_Protection_channelControl4 = 4, /**< \brief Access control for GxCHCTR4 */
322 IfxEvadc_Protection_channelControl5 = 5, /**< \brief Access control for GxCHCTR5 */
323 IfxEvadc_Protection_channelControl6 = 6, /**< \brief Access control for GxCHCTR6 */
324 IfxEvadc_Protection_channelControl7 = 7, /**< \brief Access control for GxCHCTR7 */
325 IfxEvadc_Protection_channelControl8 = 8, /**< \brief Access control for GxCHCTR8 */
326 IfxEvadc_Protection_channelControl9 = 9, /**< \brief Access control for GxCHCTR9 */
327 IfxEvadc_Protection_channelControl10 = 10, /**< \brief Access control for GxCHCTR10 */
328 IfxEvadc_Protection_channelControl11 = 11, /**< \brief Access control for GxCHCTR11 */
329 IfxEvadc_Protection_channelControl12 = 12, /**< \brief Access control for GxCHCTR12 */
330 IfxEvadc_Protection_channelControl13 = 13, /**< \brief Access control for GxCHCTR13 */
331 IfxEvadc_Protection_channelControl14 = 14, /**< \brief Access control for GxCHCTR14 */
332 IfxEvadc_Protection_initGroup0 = 16, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
333 IfxEvadc_Protection_initGroup1 = 17, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
334 IfxEvadc_Protection_initGroup2 = 18, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
335 IfxEvadc_Protection_initGroup3 = 19, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
336 IfxEvadc_Protection_initGroup4 = 20, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
337 IfxEvadc_Protection_initGroup5 = 21, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
338 IfxEvadc_Protection_initGroup6 = 22, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
339 IfxEvadc_Protection_initGroup7 = 23, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
340 IfxEvadc_Protection_initGroup8 = 24, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
341 IfxEvadc_Protection_initGroup9 = 25, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
342 IfxEvadc_Protection_initGroup10 = 26, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
343 IfxEvadc_Protection_initGroup11 = 27, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
344 IfxEvadc_Protection_initGroup12 = 28, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
345 IfxEvadc_Protection_initGroup13 = 29, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
346 IfxEvadc_Protection_initGroup14 = 30, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
347 IfxEvadc_Protection_serviceGroup0 = 32, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
348 IfxEvadc_Protection_serviceGroup1 = 33, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
349 IfxEvadc_Protection_serviceGroup2 = 34, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
350 IfxEvadc_Protection_serviceGroup3 = 35, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
351 IfxEvadc_Protection_serviceGroup4 = 36, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
352 IfxEvadc_Protection_serviceGroup5 = 37, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
353 IfxEvadc_Protection_serviceGroup6 = 38, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
354 IfxEvadc_Protection_serviceGroup7 = 39, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
355 IfxEvadc_Protection_serviceGroup8 = 40, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
356 IfxEvadc_Protection_serviceGroup9 = 41, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
357 IfxEvadc_Protection_serviceGroup10 = 42, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
358 IfxEvadc_Protection_serviceGroup11 = 43, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
359 IfxEvadc_Protection_serviceGroup12 = 44, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
360 IfxEvadc_Protection_serviceGroup13 = 45, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
361 IfxEvadc_Protection_serviceGroup14 = 46, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
362 IfxEvadc_Protection_resultRegisterGroup0 = 48, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
363 IfxEvadc_Protection_resultRegisterGroup1 = 49, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
364 IfxEvadc_Protection_resultRegisterGroup2 = 50, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
365 IfxEvadc_Protection_resultRegisterGroup3 = 51, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
366 IfxEvadc_Protection_resultRegisterGroup4 = 52, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
367 IfxEvadc_Protection_resultRegisterGroup5 = 53, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
368 IfxEvadc_Protection_resultRegisterGroup6 = 54, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
369 IfxEvadc_Protection_resultRegisterGroup7 = 55, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
370 IfxEvadc_Protection_resultRegisterGroup8 = 56, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
371 IfxEvadc_Protection_resultRegisterGroup9 = 57, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
372 IfxEvadc_Protection_resultRegisterGroup10 = 58, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
373 IfxEvadc_Protection_resultRegisterGroup11 = 59, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
374 IfxEvadc_Protection_resultRegisterGroup12 = 60, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
375 IfxEvadc_Protection_resultRegisterGroup13 = 61, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
376 IfxEvadc_Protection_resultRegisterGroup14 = 62, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
377 IfxEvadc_Protection_initFastCompareChannel0 = 64, /**< \brief Access control for GyFCBFL, GyFCHYST, GyFCCTR, GyFCM,
378 * GyFCRAMP */
379 IfxEvadc_Protection_initFastCompareChannel1 = 65, /**< \brief Access control for GyFCBFL, GyFCHYST, GyFCCTR, GyFCM,
380 * GyFCRAMP */
381 IfxEvadc_Protection_initFastCompareChannel2 = 66, /**< \brief Access control for GyFCBFL, GyFCHYST, GyFCCTR, GyFCM,
382 * GyFCRAMP */
383 IfxEvadc_Protection_initFastCompareChannel3 = 67, /**< \brief Access control for GyFCBFL, GyFCHYST, GyFCCTR, GyFCM,
384 * GyFCRAMP */
385 IfxEvadc_Protection_initFastCompareChannel4 = 68, /**< \brief Access control for GyFCBFL, GyFCHYST, GyFCCTR, GyFCM,
386 * GyFCRAMP */
387 IfxEvadc_Protection_initFastCompareChannel5 = 69, /**< \brief Access control for GyFCBFL, GyFCHYST, GyFCCTR, GyFCM,
388 * GyFCRAMP */
389 IfxEvadc_Protection_initFastCompareChannel6 = 70, /**< \brief Access control for GyFCBFL, GyFCHYST, GyFCCTR, GyFCM,
390 * GyFCRAMP */
391 IfxEvadc_Protection_initFastCompareChannel7 = 71, /**< \brief Access control for GyFCBFL, GyFCHYST, GyFCCTR, GyFCM,
392 * GyFCRAMP */
393 IfxEvadc_Protection_globalConfig = 80, /**< \brief Access control for GLOBCFG */
394 IfxEvadc_Protection_externalMultiplexer = 81, /**< \brief Access control for EMUXSEL, GxEMUXCTR */
395 IfxEvadc_Protection_testFunction = 82 /**< \brief Access control for GLOBTF */
396 } IfxEvadc_Protection;
397
398 /** \brief Arbitration priority, Group x,defined in MODULE_EVADC.G[x].ARBPR.PRIOy(x=0,1,...,11;y=0,1,2)
399 */
400 typedef enum
401 {
402 IfxEvadc_RequestSlotPriority_lowest = 0, /**< \brief Lowest priority */
403 IfxEvadc_RequestSlotPriority_low = 1, /**< \brief Lowpriority */
404 IfxEvadc_RequestSlotPriority_high = 2, /**< \brief High priority */
405 IfxEvadc_RequestSlotPriority_highest = 3 /**< \brief Highest priority */
406 } IfxEvadc_RequestSlotPriority;
407
408 /** \brief Request source start mode defined in MODULE_EVADC.G[x].ARBPR.CSMy(x=0,1,...,11;y=0,1,2)
409 */
410 typedef enum
411 {
412 IfxEvadc_RequestSlotStartMode_waitForStart = 0, /**< \brief Wait for start */
413 IfxEvadc_RequestSlotStartMode_cancelInjectRepeat = 1 /**< \brief Cancel-Inject-Repeat */
414 } IfxEvadc_RequestSlotStartMode;
415
416 /** \brief Request sources
417 */
418 typedef enum
419 {
420 IfxEvadc_RequestSource_queue0 = 0, /**< \brief 8 stage Queue0 request */
421 IfxEvadc_RequestSource_queue1 = 1, /**< \brief 8 stage Queue1 request */
422 IfxEvadc_RequestSource_queue2 = 2 /**< \brief 8 stage Queue2 request */
423 } IfxEvadc_RequestSource;
424
425 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
426 * Definition in Ifx_EVADC.CLC.B.EDIS
427 */
428 typedef enum
429 {
430 IfxEvadc_SleepMode_enable = 0, /**< \brief enables sleep mode */
431 IfxEvadc_SleepMode_disable = 1 /**< \brief disables sleep mode */
432 } IfxEvadc_SleepMode;
433
434 /** \brief Service Node defined in MODULE_EVADC.G[x].SRACT.U(x= 0,1,..,11)
435 */
436 typedef enum
437 {
438 IfxEvadc_SrcNr_group0 = 0, /**< \brief service request line 0 of group */
439 IfxEvadc_SrcNr_group1 = 1, /**< \brief service request line 1 of group */
440 IfxEvadc_SrcNr_group2 = 2, /**< \brief service request line 2 of group */
441 IfxEvadc_SrcNr_group3 = 3, /**< \brief service request line 3 of group */
442 IfxEvadc_SrcNr_shared0 = 4, /**< \brief Select shared service request line 0 */
443 IfxEvadc_SrcNr_shared1 = 5, /**< \brief Select shared service request line 1 */
444 IfxEvadc_SrcNr_shared2 = 6, /**< \brief Select shared service request line 2 */
445 IfxEvadc_SrcNr_shared3 = 7 /**< \brief Select shared service request line 3 */
446 } IfxEvadc_SrcNr;
447
448 /** \brief API return values defined in
449 * MODULE_EVADC.G[x].QSR0.U,MODULE_EVADC.G[x].QSR1.U,MODULE_EVADC.G[x].QSR2.U(x=0,1,...,11)
450 */
451 typedef enum
452 {
453 IfxEvadc_Status_noError = 0, /**< \brief No error during api execution */
454 IfxEvadc_Status_notInitialised = 1, /**< \brief Appropriate initialisation not done */
455 IfxEvadc_Status_invalidGroup = 2, /**< \brief Invalid group number */
456 IfxEvadc_Status_invalidChannel = 3, /**< \brief Invalid channel number */
457 IfxEvadc_Status_queueFull = 4, /**< \brief Queue is full */
458 IfxEvadc_Status_noAccess = 5, /**< \brief Access to the group/channel is disabled */
459 IfxEvadc_Status_channelsStillPending = 6 /**< \brief Conversion for some of the channels are still pending */
460 } IfxEvadc_Status;
461
462 /** \brief OCDS Suspend Control (OCDS.SUS)
463 */
464 typedef enum
465 {
466 IfxEvadc_SuspendMode_none = 0, /**< \brief No suspend */
467 IfxEvadc_SuspendMode_hard = 1, /**< \brief Hard Suspend */
468 IfxEvadc_SuspendMode_soft = 2 /**< \brief Soft Suspend */
469 } IfxEvadc_SuspendMode;
470
471 /** \brief trigger definition defined in MODULE_EVADC.G[x].QCTRL0.XTMODE(x=0,1,..,11)
472 */
473 typedef enum
474 {
475 IfxEvadc_TriggerMode_noExternalTrigger = 0, /**< \brief No external trigger */
476 IfxEvadc_TriggerMode_uponFallingEdge = 1, /**< \brief Trigger event upon a falling edge */
477 IfxEvadc_TriggerMode_uponRisingEdge = 2, /**< \brief Trigger event upon a rising edge */
478 IfxEvadc_TriggerMode_uponAnyEdge = 3 /**< \brief Trigger event upon any edge */
479 } IfxEvadc_TriggerMode;
480
481 /** \brief Trigger request source defined in MODULE_EVADC.G[x].QCTRLy.XTSEL(x=0,1,..,11;y=0,1,..,7)
482 */
483 typedef enum
484 {
485 IfxEvadc_TriggerSource_0 = 0, /**< \brief Input signal REQTRx_0 */
486 IfxEvadc_TriggerSource_1, /**< \brief Input signal REQTRx_1 */
487 IfxEvadc_TriggerSource_2, /**< \brief Input signal REQTRx_2 */
488 IfxEvadc_TriggerSource_3, /**< \brief Input signal REQTRx_3 */
489 IfxEvadc_TriggerSource_4, /**< \brief Input signal REQTRx_4 */
490 IfxEvadc_TriggerSource_5, /**< \brief Input signal REQTRx_5 */
491 IfxEvadc_TriggerSource_6, /**< \brief Input signal REQTRx_6 */
492 IfxEvadc_TriggerSource_7, /**< \brief Input signal REQTRx_7 */
493 IfxEvadc_TriggerSource_8, /**< \brief Input signal REQTRx_8 */
494 IfxEvadc_TriggerSource_9, /**< \brief Input signal REQTRx_9 */
495 IfxEvadc_TriggerSource_10, /**< \brief Input signal REQTRx_10 */
496 IfxEvadc_TriggerSource_11, /**< \brief Input signal REQTRx_11 */
497 IfxEvadc_TriggerSource_12, /**< \brief Input signal REQTRx_12 */
498 IfxEvadc_TriggerSource_13, /**< \brief Input signal REQTRx_13 */
499 IfxEvadc_TriggerSource_14, /**< \brief Input signal REQTRx_14 */
500 IfxEvadc_TriggerSource_15 /**< \brief Input signal REQTRx_15 */
501 } IfxEvadc_TriggerSource;
502
503 /** \} */
504
505 /** \addtogroup IfxLld_Evadc_Std_FastCompare
506 * \{ */
507 /** \brief Selects the behaviour of BoundaryFlag in FCBFL.B.BFA
508 */
509 typedef enum
510 {
511 IfxEvadc_BoundaryFlagActivationMode_0 = 0, /**< \brief Set boundary flag BFL if result FCR = 1 (input above the defined
512 * band or compare value), clear if FCR = 0 (input below) */
513 IfxEvadc_BoundaryFlagActivationMode_1 = 1 /**< \brief Set boundary flag BFL if result FCR = 0 (input below the defined
514 * band or compare value), clear if FCR = 1 (input above) */
515 } IfxEvadc_BoundaryFlagActivationMode;
516
517 /** \brief Controls in in FCBFL.B.BFI options for whether to use Boundary Flag(FCM.B.BFL) directly or in a inverted format.
518 */
519 typedef enum
520 {
521 IfxEvadc_BoundaryFlagInversionControl_direct = 0, /**< \brief Use BFL directly */
522 IfxEvadc_BoundaryFlagInversionControl_invert = 1 /**< \brief Use inverted BFL */
523 } IfxEvadc_BoundaryFlagInversionControl;
524
525 /** \brief Options for FCBFL.B.BFLNP to select Boundary Flag Node Pointer
526 */
527 typedef enum
528 {
529 IfxEvadc_BoundaryFlagNodePointer_commonBoundaryFlagOutput0 = 0, /**< \brief Select common boundary flag output 0 */
530 IfxEvadc_BoundaryFlagNodePointer_commonBoundaryFlagOutput1 = 1, /**< \brief Select common boundary flag output 1 */
531 IfxEvadc_BoundaryFlagNodePointer_commonBoundaryFlagOutput2 = 2, /**< \brief Select common boundary flag output 2 */
532 IfxEvadc_BoundaryFlagNodePointer_commonBoundaryFlagOutput3 = 3, /**< \brief Select common boundary flag output 3 */
533 IfxEvadc_BoundaryFlagNodePointer_sharedServiceRequestLine0 = 4, /**< \brief Select shared service request line 0 */
534 IfxEvadc_BoundaryFlagNodePointer_sharedServiceRequestLine1 = 5, /**< \brief Select shared service request line 1 */
535 IfxEvadc_BoundaryFlagNodePointer_sharedServiceRequestLine2 = 6, /**< \brief Select shared service request line 2 */
536 IfxEvadc_BoundaryFlagNodePointer_sharedServiceRequestLine3 = 7, /**< \brief Select shared service request line 3 */
537 IfxEvadc_BoundaryFlagNodePointer_disabled = 16 /**< \brief Disabled, no common output signal */
538 } IfxEvadc_BoundaryFlagNodePointer;
539
540 /** \brief Options for FCBFL.B.BFS to modify the Boundary Flag(FCM.B.BFL)
541 */
542 typedef enum
543 {
544 IfxEvadc_BoundaryFlagSwControl_noAction = 0, /**< \brief No Action */
545 IfxEvadc_BoundaryFlagSwControl_clear = 1, /**< \brief Clear BFL */
546 IfxEvadc_BoundaryFlagSwControl_set = 2, /**< \brief Set BFL */
547 IfxEvadc_BoundaryFlagSwControl_toggle = 3 /**< \brief Toggle BFL */
548 } IfxEvadc_BoundaryFlagSwControl;
549
550 /** \brief Channel Event Mode for configuring generation of events for Fast Compare channels in FCCTRL.B.CHEVMODE
551 */
552 typedef enum
553 {
554 IfxEvadc_ChannelEventMode_never = 0, /**< \brief Never generate a service request */
555 IfxEvadc_ChannelEventMode_aboveCompareValue = 1, /**< \brief Generate a service request in case the result is above compare value */
556 IfxEvadc_ChannelEventMode_belowCompareValue = 2, /**< \brief Generate a service request in case the result is below compare value */
557 IfxEvadc_ChannelEventMode_aboveOrBelowCompareValue = 3 /**< \brief Generate a service request in case the result switches to either level(above or below the compare value) */
558 } IfxEvadc_ChannelEventMode;
559
560 /** \brief Defines the frequency of the analog converter clock f_ADCI (base clock for
561 * conversion steps), derived from the peripheral clock: f_ADCI = fADC / CP.
562 * To be filled in FCCTRL.B.DIVA for Fast Compare channels & ANCFG.B.DIVA for other groups
563 */
564 typedef enum
565 {
566 IfxEvadc_ClockDividerFactor_maxFrequency = 0, /**< \brief Max. frequency */
567 IfxEvadc_ClockDividerFactor_2 = 1, /**< \brief Frequency Divided by 2 */
568 IfxEvadc_ClockDividerFactor_3, /**< \brief Frequency Divided by 3 */
569 IfxEvadc_ClockDividerFactor_4, /**< \brief Frequency Divided by 4 */
570 IfxEvadc_ClockDividerFactor_5, /**< \brief Frequency Divided by 5 */
571 IfxEvadc_ClockDividerFactor_6, /**< \brief Frequency Divided by 6 */
572 IfxEvadc_ClockDividerFactor_7, /**< \brief Frequency Divided by 7 */
573 IfxEvadc_ClockDividerFactor_8, /**< \brief Frequency Divided by 8 */
574 IfxEvadc_ClockDividerFactor_9, /**< \brief Frequency Divided by 9 */
575 IfxEvadc_ClockDividerFactor_10, /**< \brief Frequency Divided by 10 */
576 IfxEvadc_ClockDividerFactor_11, /**< \brief Frequency Divided by 11 */
577 IfxEvadc_ClockDividerFactor_12, /**< \brief Frequency Divided by 12 */
578 IfxEvadc_ClockDividerFactor_13, /**< \brief Frequency Divided by 13 */
579 IfxEvadc_ClockDividerFactor_14, /**< \brief Frequency Divided by 14 */
580 IfxEvadc_ClockDividerFactor_15, /**< \brief Frequency Divided by 15 */
581 IfxEvadc_ClockDividerFactor_16, /**< \brief Frequency Divided by 16 */
582 IfxEvadc_ClockDividerFactor_17, /**< \brief Frequency Divided by 17 */
583 IfxEvadc_ClockDividerFactor_18, /**< \brief Frequency Divided by 18 */
584 IfxEvadc_ClockDividerFactor_19, /**< \brief Frequency Divided by 19 */
585 IfxEvadc_ClockDividerFactor_20, /**< \brief Frequency Divided by 20 */
586 IfxEvadc_ClockDividerFactor_21, /**< \brief Frequency Divided by 21 */
587 IfxEvadc_ClockDividerFactor_22, /**< \brief Frequency Divided by 22 */
588 IfxEvadc_ClockDividerFactor_23, /**< \brief Frequency Divided by 23 */
589 IfxEvadc_ClockDividerFactor_24, /**< \brief Frequency Divided by 24 */
590 IfxEvadc_ClockDividerFactor_25, /**< \brief Frequency Divided by 25 */
591 IfxEvadc_ClockDividerFactor_26, /**< \brief Frequency Divided by 26 */
592 IfxEvadc_ClockDividerFactor_27, /**< \brief Frequency Divided by 27 */
593 IfxEvadc_ClockDividerFactor_28, /**< \brief Frequency Divided by 28 */
594 IfxEvadc_ClockDividerFactor_29, /**< \brief Frequency Divided by 29 */
595 IfxEvadc_ClockDividerFactor_30, /**< \brief Frequency Divided by 30 */
596 IfxEvadc_ClockDividerFactor_31, /**< \brief Frequency Divided by 31 */
597 IfxEvadc_ClockDividerFactor_32 /**< \brief Frequency Divided by 32 */
598 } IfxEvadc_ClockDividerFactor;
599
600 /** \brief External Trigger Polarity to be set in FCCTRL.B.XTPOL
601 */
602 typedef enum
603 {
604 IfxEvadc_ExternalTriggerPolarity_direct = 0, /**< \brief Use selected input signal directly */
605 IfxEvadc_ExternalTriggerPolarity_inverted = 1 /**< \brief Invert selected input signal */
606 } IfxEvadc_ExternalTriggerPolarity;
607
608 typedef enum
609 {
610 IfxEvadc_FastCompareAnalogClockSynchronizationDelay_0 = 0, /**< \brief No delay */
611 IfxEvadc_FastCompareAnalogClockSynchronizationDelay_1 = 1, /**< \brief 1 clock cycle delay */
612 IfxEvadc_FastCompareAnalogClockSynchronizationDelay_2 = 2, /**< \brief 2 clock cycles delay */
613 IfxEvadc_FastCompareAnalogClockSynchronizationDelay_3 = 3 /**< \brief 3 clock cycles delay */
614 } IfxEvadc_FastCompareAnalogClockSynchronizationDelay;
615
616 /** \brief Settings for Analog Coverter Controller to be done in FCM.B.ANON
617 */
618 typedef enum
619 {
620 IfxEvadc_FastCompareAnalogConverterControl_off = 0, /**< \brief Analog converter off */
621 IfxEvadc_FastCompareAnalogConverterControl_normal = 1 /**< \brief Normal operation */
622 } IfxEvadc_FastCompareAnalogConverterControl;
623
624 /** \brief Defines the source of the value(s) in bitfield FCM.B.FCREF
625 *
626 * Note: Software can only write to bitfield FCM.B.FCREF, while AUE = 00B.
627 */
628 typedef enum
629 {
630 IfxEvadc_FastCompareAutomaticUpdate_sw = 0, /**< \brief No automatic update.Value(s) written by software. */
631 IfxEvadc_FastCompareAutomaticUpdate_alternateValue = 1, /**< \brief While gate is active (high), value is copied from bitfield FCM.B.FCRCOMPA and while gate is inactive (low), value is copied from bitfield FCM.B.FCRCOMPB */
632 IfxEvadc_FastCompareAutomaticUpdate_rampCounter = 2, /**< \brief Value(s) copied from ramp counter on ramp start or counter
633 * update. */
634 IfxEvadc_FastCompareAutomaticUpdate_analogSource = 3 /**< \brief Value(s) written by the associated converter */
635 } IfxEvadc_FastCompareAutomaticUpdate;
636
637 /** \brief Defines the basic run conditions of the fast compare channel in FCM.B.RUNCOMP
638 */
639 typedef enum
640 {
641 IfxEvadc_FastCompareRunControl_stop = 0, /**< \brief Stop, no operation */
642 IfxEvadc_FastCompareRunControl_alwaysRun = 1 /**< \brief Always run */
643 } IfxEvadc_FastCompareRunControl;
644
645 /** \brief Criteria/mode settings for service request generation in FCM.B.SRG
646 */
647 typedef enum
648 {
649 IfxEvadc_FastCompareServiceRequestGeneration_off = 0, /**< \brief No service requests are generated */
650 IfxEvadc_FastCompareServiceRequestGeneration_rampEnd = 1, /**< \brief Issue service request when the ramp counter stops */
651 IfxEvadc_FastCompareServiceRequestGeneration_newValue = 2, /**< \brief Issue service request when a value is written to FCREF */
652 IfxEvadc_FastCompareServiceRequestGeneration_newResult = 3 /**< \brief Issue service request when a new result available */
653 } IfxEvadc_FastCompareServiceRequestGeneration;
654
655 /** \brief Gate Operating Mode to be filled in FCCTRL.B.GTMODE
656 */
657 typedef enum
658 {
659 IfxEvadc_GateOperatingMode_noGateFunction = 0, /**< \brief No gate function */
660 IfxEvadc_GateOperatingMode_alternateValueMode = 1, /**< \brief Alternate value mode */
661 IfxEvadc_GateOperatingMode_lockBoundaryFlag = 2 /**< \brief Lock boundary flag */
662 } IfxEvadc_GateOperatingMode;
663
664 /** \brief Ramp direction setting in FCM.B.FCRDIR
665 */
666 typedef enum
667 {
668 IfxEvadc_RampDirection_down = 0, /**< \brief Decrement ramp counter and stop when counter <= FCRCOMPB */
669 IfxEvadc_RampDirection_up = 1 /**< \brief Increment ramp counter and stop when counter >= FCRCOMPB */
670 } IfxEvadc_RampDirection;
671
672 /** \brief Defines the run conditions for the ramp generation in FCM.B.RUNRAMP
673 */
674 typedef enum
675 {
676 IfxEvadc_RampRunControl_stop = 0, /**< \brief Stop, no operation */
677 IfxEvadc_RampRunControl_1 = 1, /**< \brief Start immediately when GxFCRAMP0/1 is written */
678 IfxEvadc_RampRunControl_2 = 2, /**< \brief Start upon the selected trigger event of signal REQTRx */
679 IfxEvadc_RampRunControl_3 = 3 /**< \brief Start immediately when GxFCRAMP0/1 is written and
680 * stop upon the selected trigger event of signal REQTRx */
681 } IfxEvadc_RampRunControl;
682
683 /** \brief Sample timing sync settings for FCM.B.SSE
684 */
685 typedef enum
686 {
687 IfxEvadc_SampleSynchronization_off = 0, /**< \brief No synchronization */
688 IfxEvadc_SampleSynchronization_synchronizeSampleTiming = 1 /**< \brief Sample timing is synchronized.This is recommended for operation of several ADCs. */
689 } IfxEvadc_SampleSynchronization;
690
691 /** \brief Trigger operating mode in Fast Compare channels, to be entered in FCCTRL.B.XTMODE
692 */
693 typedef enum
694 {
695 IfxEvadc_TriggerOperatingMode_noExternalTrigger = 0, /**< \brief No external trigger */
696 IfxEvadc_TriggerOperatingMode_fallingEdge = 1, /**< \brief Trigger event upon a falling edge */
697 IfxEvadc_TriggerOperatingMode_risingEdge = 2, /**< \brief Trigger event upon a rising edge */
698 IfxEvadc_TriggerOperatingMode_anyEdge = 3 /**< \brief Trigger event upon any edge */
699 } IfxEvadc_TriggerOperatingMode;
700
701 /** \} */
702
703 /** \brief Defines the way the analog clock is generated.
704 */
705 typedef enum
706 {
707 IfxEvadc_AnalogClockGenerationMode_synchronized = 0, /**< \brief Synchronized mode: Initial clock pulse is defined by the phase synchronizer */
708 IfxEvadc_AnalogClockGenerationMode_unsynchronized = 1 /**< \brief Unsynchronized mode: The analog clock is generated independently. */
709 } IfxEvadc_AnalogClockGenerationMode;
710
711 typedef enum
712 {
713 IfxEvadc_AnalogClockSynchronizationDelay_0 = 0, /**< \brief No Delay */
714 IfxEvadc_AnalogClockSynchronizationDelay_1 = 1, /**< \brief 1 clock cycle delay */
715 IfxEvadc_AnalogClockSynchronizationDelay_2 = 2, /**< \brief 2 clock cycles delay */
716 IfxEvadc_AnalogClockSynchronizationDelay_3 = 3, /**< \brief 3 clock cycles delay */
717 IfxEvadc_AnalogClockSynchronizationDelay_4 = 4, /**< \brief 4 clock cycles delay */
718 IfxEvadc_AnalogClockSynchronizationDelay_5 = 5, /**< \brief 5 clock cycles delay */
719 IfxEvadc_AnalogClockSynchronizationDelay_6 = 6, /**< \brief 6 clock cycles delay */
720 IfxEvadc_AnalogClockSynchronizationDelay_7 = 7 /**< \brief 7 clock cycles delay */
721 } IfxEvadc_AnalogClockSynchronizationDelay;
722
723 /** \brief Analog Input Precharge Control for Standard Conversions
724 */
725 typedef enum
726 {
727 IfxEvadc_AnalogInputPrechargeControl_noPrecharge = 0, /**< \brief No Precharge */
728 IfxEvadc_AnalogInputPrechargeControl_8Cycles = 1, /**< \brief Precharge for 8 clock cycles */
729 IfxEvadc_AnalogInputPrechargeControl_16Cycles = 2, /**< \brief Precharge for 16 clock cycles */
730 IfxEvadc_AnalogInputPrechargeControl_32cycles = 3 /**< \brief Precharge for 32 clock cycles */
731 } IfxEvadc_AnalogInputPrechargeControl;
732
733 typedef enum
734 {
735 IfxEvadc_ArbitrationMode_0 = 0,
736 IfxEvadc_ArbitrationMode_1 = 1
737 } IfxEvadc_ArbitrationMode;
738
739 typedef enum
740 {
741 IfxEvadc_CalibrationSampleTimeControl_2 = 0, /**< \brief 2*t_ADCI */
742 IfxEvadc_CalibrationSampleTimeControl_4 = 1, /**< \brief 4*t_ADCI */
743 IfxEvadc_CalibrationSampleTimeControl_6 = 2, /**< \brief 6*t_ADCI */
744 IfxEvadc_CalibrationSampleTimeControl_8 = 3 /**< \brief 8*t_ADCI */
745 } IfxEvadc_CalibrationSampleTimeControl;
746
747 /** \brief Conversion Mode for standard Conversion
748 * channel precision defined in MODULE_EVADC.G[x].CHCTR[y].B.ICLASS[y].B.CMS(x=0,1,...,11;y=0,1)
749 */
750 typedef enum
751 {
752 IfxEvadc_ChannelNoiseReduction_standardConversion = 0, /**< \brief Standard Conversions mode */
753 IfxEvadc_ChannelNoiseReduction_level1 = 1, /**< \brief Noise reduction conversion level 1 */
754 IfxEvadc_ChannelNoiseReduction_level2 = 2, /**< \brief Noise reduction conversion level 2 */
755 IfxEvadc_ChannelNoiseReduction_level3 = 3 /**< \brief Noise reduction conversion level 3 */
756 } IfxEvadc_ChannelNoiseReduction;
757
758 /** \brief Conversion Mode for EMUX Conversions
759 */
760 typedef enum
761 {
762 IfxEvadc_ChannelNoiseReductionEMUX_standardConversion = 0, /**< \brief Standard conversion */
763 IfxEvadc_ChannelNoiseReductionEMUX_level1 = 1, /**< \brief Noise reduction conversion level 1, 1 additional conversion step */
764 IfxEvadc_ChannelNoiseReductionEMUX_level2 = 2, /**< \brief Noise reduction conversion level 2, 3 additional conversion steps */
765 IfxEvadc_ChannelNoiseReductionEMUX_level3 = 3 /**< \brief Noise reduction conversion level 3, 7 additional conversion steps */
766 } IfxEvadc_ChannelNoiseReductionEMUX;
767
768 /** \brief Data Modification Mode
769 */
770 typedef enum
771 {
772 IfxEvadc_DataModificationMode_standardDataReduction = 0, /**< \brief Standard Data Reduction */
773 IfxEvadc_DataModificationMode_resultFilteringMode = 1, /**< \brief Result Filtering Mode */
774 IfxEvadc_DataModificationMode_differenceMode = 2 /**< \brief Difference Mode */
775 } IfxEvadc_DataModificationMode;
776
777 typedef enum
778 {
779 IfxEvadc_DataReductionControlMode_0 = 0, /**< \brief If DMM=0b00, Data reduction disabled,if DMM=0b01, FIR:a=2,b=1,c=0 */
780 IfxEvadc_DataReductionControlMode_1 = 1, /**< \brief If DMM=0b00, Accumulate 2 result values,if DMM=0b01, FIR:a=1,b=2,c=0 */
781 IfxEvadc_DataReductionControlMode_2 = 2, /**< \brief If DMM=0b00, Accumulate 3 result values,if DMM=0b01, FIR:a=2,b=0,c=1 */
782 IfxEvadc_DataReductionControlMode_3 = 3, /**< \brief If DMM=0b00, Accumulate 4 result values,if DMM=0b01, FIR:a=1,b=1,c=1 */
783 IfxEvadc_DataReductionControlMode_4 = 4, /**< \brief If DMM=0b00, Accumulate 5 result values,if DMM=0b01, FIR:a=1,b=0,c=2 */
784 IfxEvadc_DataReductionControlMode_5 = 5, /**< \brief If DMM=0b00, Accumulate 6 result values,if DMM=0b01, FIR:a=3,b=1,c=0 */
785 IfxEvadc_DataReductionControlMode_6 = 6, /**< \brief If DMM=0b00, Accumulate 7 result values,if DMM=0b01, FIR:a=2,b=2,c=0 */
786 IfxEvadc_DataReductionControlMode_7 = 7, /**< \brief If DMM=0b00, Accumulate 8 result values,if DMM=0b01, FIR:a=1,b=3,c=0 */
787 IfxEvadc_DataReductionControlMode_8 = 8, /**< \brief If DMM=0b00, Accumulate 9 result values,if DMM=0b01, FIR:a=3,b=0,c=1 */
788 IfxEvadc_DataReductionControlMode_9 = 9, /**< \brief If DMM=0b00, Accumulate 10 result values,if DMM=0b01, FIR:a=2,b=1,c=1 */
789 IfxEvadc_DataReductionControlMode_10 = 10, /**< \brief If DMM=0b00, Accumulate 11 result values,if DMM=0b01, FIR:a=1,b=2,c=1 */
790 IfxEvadc_DataReductionControlMode_11 = 11, /**< \brief If DMM=0b00, Accumulate 12 result values,if DMM=0b01, FIR:a=2,b=0,c=2 */
791 IfxEvadc_DataReductionControlMode_12 = 12, /**< \brief If DMM=0b00, Accumulate 13 result values,if DMM=0b01, FIR:a=1,b=1,c=2 */
792 IfxEvadc_DataReductionControlMode_13 = 13, /**< \brief If DMM=0b00, Accumulate 14 result values,if DMM=0b01, FIR:a=1,b=0,c=3 */
793 IfxEvadc_DataReductionControlMode_14 = 14, /**< \brief If DMM=0b00, Accumulate 15 result values,if DMM=0b01, IIR:a=2,b=2 */
794 IfxEvadc_DataReductionControlMode_15 = 15 /**< \brief If DMM=0b00, Accumulate 16 result values,if DMM=0b01, IIR:a=3,b=4 */
795 } IfxEvadc_DataReductionControlMode;
796
797 /** \brief Contains options for Idle Precharge levels
798 */
799 typedef enum
800 {
801 IfxEvadc_IdlePrecharge_currentLevel = 0, /**< \brief The sampling capacitor keeps the current charge */
802 IfxEvadc_IdlePrecharge_referenceBy2 = 1 /**< \brief ThSampling capacitor is precharged to approx. half the reference when idle */
803 } IfxEvadc_IdlePrecharge;
804
805 /** \brief Selects the MSB conversion time(in terms of t_ADC)
806 */
807 typedef enum
808 {
809 IfxEvadc_MsbConversionTime_singleClockCycle = 0, /**< \brief 1 clock cycle for the MSB (standard) */
810 IfxEvadc_MsbConversionTime_doubleClockCycle = 1 /**< \brief 2 clock cycle for the MSB */
811 } IfxEvadc_MsbConversionTime;
812
813 /** \brief Reference Precharge Control
814 */
815 typedef enum
816 {
817 IfxEvadc_ReferencePrechargeControl_singleClockPhase = 0, /**< \brief Precharge the reference input for 1 clock phase */
818 IfxEvadc_ReferencePrechargeControl_singleClockPeriod = 1 /**< \brief Precharge the reference input for 1 clock period */
819 } IfxEvadc_ReferencePrechargeControl;
820
821 typedef enum
822 {
823 IfxEvadc_SpreadEarlySamplePointEMUXConversionsMode_nominal = 0, /**< \brief Nominal sample timing */
824 IfxEvadc_SpreadEarlySamplePointEMUXConversionsMode_spread = 1 /**< \brief Spread sample timing, end of sample phase is varied */
825 } IfxEvadc_SpreadEarlySamplePointEMUXConversionsMode;
826
827 /** \brief Spread Early Sample Point for Standard Conversions
828 */
829 typedef enum
830 {
831 IfxEvadc_SpreadEarlySamplePointStandardConversionsMode_nominal = 0, /**< \brief Nominal sample timing */
832 IfxEvadc_SpreadEarlySamplePointStandardConversionsMode_spread = 1 /**< \brief Spread sample timing, end of sample phase is varied */
833 } IfxEvadc_SpreadEarlySamplePointStandardConversionsMode;
834
835 /** \brief The 0-1 transition of bit SUCAL initiates the start-up calibrationphase of
836 * all analog converters (except for the fast compare channels).
837 * Note: The start-up calibration will abort any running conversion
838 * and cannot be stopped before it is complete.
839 */
840 typedef enum
841 {
842 IfxEvadc_StartupCalibration_noAction = 0, /**< \brief No action */
843 IfxEvadc_StartupCalibration_initiate = 1 /**< \brief Initiate the start-up calibration phase
844 * (indication in bit GxARBCFG.CAL) */
845 } IfxEvadc_StartupCalibration;
846
847 /** \brief Adjusts the analog circuitry to the supply voltage used in the application
848 * system. Make sure to keep SUPLEV = 0b00 or 0b01 in the case of a 5 V supply.
849 */
850 typedef enum
851 {
852 IfxEvadc_SupplyVoltageLevelControl_automaticControl = 0, /**< \brief Automatic control: voltage range is controlled by the power supply */
853 IfxEvadc_SupplyVoltageLevelControl_upperVoltage = 1, /**< \brief Upper voltage range: assume a 5 V power supply is connected */
854 IfxEvadc_SupplyVoltageLevelControl_lowerVoltage = 2 /**< \brief Lower voltage range: assume a 3.3 V power supply is connected */
855 } IfxEvadc_SupplyVoltageLevelControl;
856
857 /** \brief Wait-for-Read Mode Enable
858 */
859 typedef enum
860 {
861 IfxEvadc_WaitForRead_overwriteMode = 0, /**< \brief Overwrite Mode */
862 IfxEvadc_WaitForRead_enabled = 1 /**< \brief Wait-for-read mode enabled for this register */
863 } IfxEvadc_WaitForRead;
864
865 /** \addtogroup IfxLld_Evadc_Std_Global
866 * \{ */
867
868 /******************************************************************************/
869 /*-------------------------Inline Function Prototypes-------------------------*/
870 /******************************************************************************/
871
872 /** \brief access function to enable/disable wait for read mode for result registers
873 * \param group pointer to the EVADC group
874 * \param resultIdx result register index
875 * \param enabled wait for read mode enabled/disabled
876 * \return None
877 */
878 IFX_INLINE void IfxEvadc_configureWaitForReadMode(Ifx_EVADC_G *group, uint32 resultIdx, boolean enabled);
879
880 /** \brief access function to enable/disable wait for read mode for global result register
881 * \param evadc pointer to the EVADC
882 * \param enabled wait for read mode enabled/disabled
883 * \return None
884 */
885 IFX_INLINE void IfxEvadc_configureWaitForReadModeForGlobalResultRegister(Ifx_EVADC *evadc, boolean enabled);
886
887 /** \brief get the ADC Module noise reduction level
888 * \param evadc pointer to EVADC
889 * \param inputClassNum Adc Module input Class number
890 * \return Adc input class noise reduction level
891 */
892 IFX_INLINE IfxEvadc_ChannelNoiseReduction IfxEvadc_getGlobalConversionMode(Ifx_EVADC *evadc, uint8 inputClassNum);
893
894 /** \brief return conversion result stored in the Global result Register
895 * \param evadc pointer to the EVADC module
896 * \return global result register
897 *
898 * \code
899 * Ifx_EVADC* evadc = &MODULE_EVADC; // module pointer
900 * IfxEvadc_GroupId groupId = IfxEvadc_GroupId0; // for group 0
901 * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
902 * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
903 *
904 * //confiure wait for read mode for global result register
905 * IfxEvadc_configureWaitForReadModeForGlobalResultRegister(evadc, TRUE);
906 *
907 * // enable all arbiter request sources
908 * adcGroupConfig.arbiter.requestSlotQueue0Enabled = TRUE; // enable Queue0 mode
909 * // enable all gates in "always" mode (no edge detection)
910 * adcGroupConfig.queueRequest[0].triggerConfig.gatingMode = IfxEvadc_GatingMode_always;
911 *
912 * // Add channel to queue with refill enabled
913 * IfxEvadc_Adc_addToQueue(&adcChannel, IFXEVADC_QUEUE_REFILL, IfxEvadc_RequestSource_queue0);
914 *
915 * // start the Queue
916 * IfxEvadc_Adc_startQueue(&adcGroup, IfxEvadc_RequestSource_queue0);
917 *
918 *
919 *
920 *
921 *
922 * Ifx_EVADC_GLOB.RES result;
923 * result = IfxVadc_getGlobalResult (evadc);
924 *
925 * \endcode
926 *
927 */
928 IFX_INLINE Ifx_EVADC_GLOB_RES IfxEvadc_getGlobalResult(Ifx_EVADC *evadc);
929
930 /** \brief Get Sample Time in sec
931 * \param evadc Pointer to EVADC Module
932 * \param inputClassNum ADC Input Class Number
933 * \param analogFrequency ADC module analog frequency in Hz
934 * \return ADC input class channel sample time in sec.
935 */
936 IFX_INLINE float32 IfxEvadc_getGlobalSampleTime(Ifx_EVADC *evadc, uint8 inputClassNum, float32 analogFrequency);
937
938 /** \brief Get conversion result (Function does not care about the alignment)
939 * value = raw * gain + offset.
940 * \param group pointer to the EVADC group
941 * \param resultIdx result register index
942 * \return scaled Conversion result
943 *
944 * \code
945 * Ifx_EVADC_G* group = &MODULE_EVADC.G[0]; // for group 0
946 * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
947 * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
948 *
949 * //confiure wait for read mode for global result register
950 * IfxEvadc_configureWaitForReadMode(group,IfxEvadc_ChannelResult0, TRUE);
951 * IfxEvadc_configureWaitForReadMode(group,IfxEvadc_ChannelResult1, TRUE);
952 *
953 *
954 * // Add channel to queue with refill enabled
955 * IfxEvadc_Adc_addToQueue(&adcChannel, IfxEvadc_RequestSource_queue0, IFXEVADC_QUEUE_REFILL);
956 *
957 * // start the Queue
958 * IfxEvadc_Adc_startQueue(&adcGroup, IfxEvadc_RequestSource_queue0);
959 *
960 *
961 * // wait for conversion to finish
962 *
963 * // fetch the result of conversion from result register 0 for group 0
964 * Ifx_EVADC_G_RES result;
965 * result = IfxEvadc_getResult(group, IfxEvadc_ChannelResult0);
966 * \endcode
967 *
968 */
969 IFX_INLINE Ifx_EVADC_G_RES IfxEvadc_getResult(Ifx_EVADC_G *group, uint32 resultIdx);
970
971 /** \brief Sets the sample time in sec of ADC global class.
972 * \param evadc pointer to EVADC module registers.
973 * \param groupInputClassNum group input class number.
974 * \param analogFrequency ADC analog frequency in Hz.
975 * \param sampleTime the requested sample time in sec for input class.
976 * \return None
977 */
978 IFX_INLINE void IfxEvadc_setGlobalSampleTime(Ifx_EVADC *evadc, uint8 groupInputClassNum, float32 analogFrequency, float32 sampleTime);
979
980 /******************************************************************************/
981 /*-------------------------Global Function Prototypes-------------------------*/
982 /******************************************************************************/
983
984 /** \brief Get conversion result (Function does not care about the alignment)
985 * value = raw * gain + offset.
986 * \param evadc EVADC module pointer
987 * \param group pointer to the EVADC group
988 * \param channel channel Id
989 * \param sourceType type of request source
990 * \return scaled Conversion result
991 *
992 * \code
993 * Ifx_EVADC evadc;
994 * evadc.evadc = &MODULE_EVADC;
995 * Ifx_EVADC_G* group = &MODULE_EVADC.G[0]; // for group 0
996 * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
997 * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
998 *
999 * //confiure wait for read mode for global result register
1000 * IfxEvadc_configureWaitForReadMode(group,IfxEvadc_ChannelResult0, TRUE);
1001 * IfxEvadc_configureWaitForReadMode(group,IfxEvadc_ChannelResult1, TRUE);
1002 *
1003 * // Add channel to queue with refill enabled
1004 * IfxEvadc_Adc_addToQueue(&adcChannel, IfxEvadc_RequestSource_queue0, IFXEVADC_QUEUE_REFILL);
1005 *
1006 * // start the Queue
1007 * IfxEvadc_Adc_startQueue(&adcGroup, IfxEvadc_RequestSource_queue0);
1008 *
1009 * // fetch the result of conversion for channel 2 of group 0
1010 * Ifx_EVADC_G_RESresult2;
1011 * result = IfxEvadc_getResultBasedOnRequestSource(&evadc, group, IfxVadc_ChannelId2,IfxEvadc_RequestSource_queue0 );
1012 * Ifx_EVADC_G_RESresult5;
1013 * result = IfxEvadc_getResultBasedOnRequestSource(&evadc, group, IfxEvadc_ChannelId5,IfxEvadc_RequestSource_queue0 );
1014 * \endcode
1015 *
1016 */
1017 IFX_EXTERN Ifx_EVADC_G_RES IfxEvadc_getResultBasedOnRequestSource(Ifx_EVADC *evadc, Ifx_EVADC_G *group, IfxEvadc_ChannelId channel, IfxEvadc_RequestSource sourceType);
1018
1019 /** \} */
1020
1021 /** \addtogroup IfxLld_Evadc_Std_QueueRequest
1022 * \{ */
1023
1024 /******************************************************************************/
1025 /*-------------------------Inline Function Prototypes-------------------------*/
1026 /******************************************************************************/
1027
1028 /** \brief Clears all the queue entries including backup stage.
1029 * \param evadcG pointer to EVADC group registers.
1030 * \param flushQueue Whether queue is cleared or not.
1031 * \param sourceType Request source Type(Queue 0,Queue 1,Queue 2)
1032 * \return None
1033 */
1034 IFX_INLINE void IfxEvadc_clearQueue(Ifx_EVADC_G *evadcG, boolean flushQueue, IfxEvadc_RequestSource sourceType);
1035
1036 /** \brief Starts a queue of a group by generating a trigger event through software
1037 * \param group pointer to the EVADC group
1038 * \param sourceType Request source Type(Queue 0,Queue 1,Queue 2)
1039 * \return None
1040 */
1041 IFX_INLINE void IfxEvadc_startQueue(Ifx_EVADC_G *group, IfxEvadc_RequestSource sourceType);
1042
1043 /******************************************************************************/
1044 /*-------------------------Global Function Prototypes-------------------------*/
1045 /******************************************************************************/
1046
1047 /** \brief Add an entry to the queue of a group for the specified channel with the following options set:
1048 * refill incase of aborted conversion
1049 * source interrupt enable/disable
1050 * external trigger control of the aborted conversion
1051 * \param group pointer to the EVADC group
1052 * \param channel specifies channel Id
1053 * \param sourceType Request source Type(Queue 0,Queue 1,Queue 2)
1054 * \param options specifies the refill, source interrupt enable/disable and external trigger control selection
1055 * \return None
1056 *
1057 * For coding example see: \ref IfxEvadc_Adc_getResult
1058 *
1059 */
1060 IFX_EXTERN void IfxEvadc_addToQueue(Ifx_EVADC_G *group, IfxEvadc_ChannelId channel, IfxEvadc_RequestSource sourceType, uint32 options);
1061
1062 /** \brief Disables the external trigger.
1063 * \param evadcG pointer to EVADC group registers.
1064 * \param sourceType Request source Type(Queue 0,Queue 1,Queue 2)
1065 * \return None
1066 */
1067 IFX_EXTERN void IfxEvadc_disableQueueSlotExternalTrigger(Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType);
1068
1069 /** \brief Enables the external trigger.
1070 * \param evadcG pointer to EVADC group registers.
1071 * \param sourceType Request source Type(Queue 0,Queue 1,Queue 2)
1072 * \return None
1073 */
1074 IFX_EXTERN void IfxEvadc_enableQueueSlotExternalTrigger(Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType);
1075
1076 /** \brief Gets the requested queue slot gating mode.
1077 * \param evadcG pointer to EVADC group registers.
1078 * \param sourceType Request source Type(Queue 0,Queue 1,Queue 2)
1079 * \return requested queue0 slot gating mode.
1080 */
1081 IFX_EXTERN IfxEvadc_GatingMode IfxEvadc_getQueueSlotGatingMode(Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType);
1082
1083 /** \brief Gets the requested queue slot gating input.
1084 * \param evadcG pointer to EVADC group registers.
1085 * \param sourceType Request source Type(Queue 0,Queue 1,Queue 2)
1086 * \return requested queue0 slot gating input.
1087 */
1088 IFX_EXTERN IfxEvadc_GatingSource IfxEvadc_getQueueSlotGatingSource(Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType);
1089
1090 /** \brief Gets the request queue slot priority.
1091 * \param evadcG pointer to EVADC group registers.
1092 * \param sourceType Request source Type(Queue 0,Queue 1,Queue 2)
1093 * \return requested queue0 slot priority.
1094 */
1095 IFX_EXTERN IfxEvadc_RequestSlotPriority IfxEvadc_getQueueSlotPriority(Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType);
1096
1097 /** \brief Gets the requested queue slot start mode.
1098 * \param evadcG pointer to EVADC group registers.
1099 * \param sourceType Request source Type(Queue 0,Queue 1,Queue 2)
1100 * \return requested queue slot start mode.
1101 */
1102 IFX_EXTERN IfxEvadc_RequestSlotStartMode IfxEvadc_getQueueSlotStartMode(Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType);
1103
1104 /** \brief Gets the requested queue slot trigger input.
1105 * \param evadcG pointer to EVADC group registers.
1106 * \param sourceType Request source Type(Queue 0,Queue 1,Queue 2)
1107 * \return requested queue slot trigger input.
1108 */
1109 IFX_EXTERN IfxEvadc_TriggerSource IfxEvadc_getQueueSlotTriggerInput(Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType);
1110
1111 /** \brief Gets the requested queue slot trigger mode.
1112 * \param evadcG pointer to EVADC group registers.
1113 * \param sourceType Request source Type(Queue 0,Queue 1,Queue 2)
1114 * \return requested queue slot trigger mode.
1115 */
1116 IFX_EXTERN IfxEvadc_TriggerMode IfxEvadc_getQueueSlotTriggerMode(Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType);
1117
1118 /** \brief Gives the status of the Queue of a group by returning non zero value if the Queue is full
1119 * \param group pointer to the EVADC group
1120 * \param sourceType sourceType Request source Type(Queue 0,Queue 1,Queue 2)
1121 * \return status of the Queue
1122 *
1123 * \code
1124 * Ifx_EVADC_G* group = &MODULE_EVADC.G[0]; // for group 0
1125 * boolean queueFull = (IfxEvadc_getQueueStatus(group)==IfxEvadc_Status_queueFull)?TRUE:FALSE; // get Queue status for group 0
1126 * \endcode
1127 *
1128 */
1129 IFX_EXTERN IfxEvadc_Status IfxEvadc_getQueueStatus(Ifx_EVADC_G *group, IfxEvadc_RequestSource sourceType);
1130
1131 /** \brief Returns the queue slot requested status.
1132 * \param evadcG pointer to EVADC group registers.
1133 * \param sourceType Request source Type(Queue 0,Queue 1,Queue 2)
1134 * \return TRUE if queue slot request enabled otherwise FALSE.
1135 */
1136 IFX_EXTERN boolean IfxEvadc_isRequestQueueSlotEnabled(Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType);
1137
1138 /** \brief Sets the gating configurations.
1139 * \param evadcG pointer to EVADC group registers.
1140 * \param gatingSource gate input for group.
1141 * \param gatingMode gating mode. High level, Low Level or Gating disabled.
1142 * \param sourceType Request source Type(Queue 0,Queue 1,Queue 2)
1143 * \return None
1144 */
1145 IFX_EXTERN void IfxEvadc_setQueueSlotGatingConfig(Ifx_EVADC_G *evadcG, IfxEvadc_GatingSource gatingSource, IfxEvadc_GatingMode gatingMode, IfxEvadc_RequestSource sourceType);
1146
1147 /** \brief Sets the trigger operating configurations.
1148 * \param evadcG pointer to EVADC group registers.
1149 * \param triggerMode trigger mode. Rising, falling any edge leads to an trigger event.
1150 * \param triggerSource trigger input for group.
1151 * \param sourceType Request source Type(Queue 0,Queue 1,Queue 2)
1152 * \return None
1153 */
1154 IFX_EXTERN void IfxEvadc_setQueueSlotTriggerOperatingConfig(Ifx_EVADC_G *evadcG, IfxEvadc_TriggerMode triggerMode, IfxEvadc_TriggerSource triggerSource, IfxEvadc_RequestSource sourceType);
1155
1156 /** \} */
1157
1158 /** \addtogroup IfxLld_Evadc_Std_IO
1159 * \{ */
1160
1161 /******************************************************************************/
1162 /*-------------------------Inline Function Prototypes-------------------------*/
1163 /******************************************************************************/
1164
1165 /** \brief Initializes a EMUX output
1166 * \param emux the Emux Pin which should be configured
1167 * \param outputMode the pin output mode which should be configured
1168 * \param padDriver the pad driver mode which should be configured
1169 * \return None
1170 */
1171 IFX_INLINE void IfxEvadc_initEmuxPin(const IfxEvadc_Emux_Out *emux, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
1172
1173 /** \brief Initializes a GxBFL output
1174 * \param gxBfl the GxBFL Pin which should be configured
1175 * \param outputMode the pin output mode which should be configured
1176 * \param padDriver the pad driver mode which should be configured
1177 * \return None
1178 */
1179 IFX_INLINE void IfxEvadc_initGxBflPin(const IfxEvadc_GxBfl_Out *gxBfl, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
1180
1181 /** \} */
1182
1183 /** \addtogroup IfxLld_Evadc_Std_Frequency
1184 * \{ */
1185
1186 /******************************************************************************/
1187 /*-------------------------Inline Function Prototypes-------------------------*/
1188 /******************************************************************************/
1189
1190 /** \brief Calculate the time using analog frequency.
1191 * \param analogFrequency analog frequency in Hz.
1192 * \param sampleTime sample time in sec.
1193 * \return sample time in sec.
1194 */
1195 IFX_INLINE uint32 IfxEvadc_calculateSampleTime(float32 analogFrequency, float32 sampleTime);
1196
1197 /** \brief Returns the configured Fadci EVADC analog clock frequency in Hz.
1198 * \param group pointer to the EVADC registers group
1199 * \return the configured Fadci EVADC analog clock frequency in Hz.
1200 */
1201 IFX_INLINE float32 IfxEvadc_getAdcAnalogFrequency(Ifx_EVADC_G *group);
1202
1203 /******************************************************************************/
1204 /*-------------------------Global Function Prototypes-------------------------*/
1205 /******************************************************************************/
1206
1207 /** \brief configured Fadcd EVADC digital clock frequency in Hz.
1208 * \param evadc pointer to the base of EVADC registers
1209 * \return the configured Fadcd EVADC digital clock frequency in Hz.
1210 */
1211 IFX_EXTERN float32 IfxEvadc_getAdcDigitalFrequency(Ifx_EVADC *evadc);
1212
1213 /** \} */
1214
1215 /** \addtogroup IfxLld_Evadc_Std_Group
1216 * \{ */
1217
1218 /******************************************************************************/
1219 /*-------------------------Inline Function Prototypes-------------------------*/
1220 /******************************************************************************/
1221
1222 /**
1223 * \param evadcG Pointer to EVADC SFRs of a particular group
1224 * \param group Group No.
1225 * \param delay Selects an additional clock cycle for the conversion step of the MSB
1226 * \return None
1227 */
1228 IFX_INLINE void IfxEvadc_setAnalogClockSynchronizationDelay(Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group, IfxEvadc_AnalogClockSynchronizationDelay delay);
1229
1230 /** \brief Select calibration sample time in units of t_ADC
1231 * \param evadcG Pointer to EVADC SFRs of a particular group
1232 * \param group Group No.
1233 * \param mode Select calibration sample time in units of t_ADC
1234 * \return None
1235 */
1236 IFX_INLINE void IfxEvadc_setCalibrationSampleTime(Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group, IfxEvadc_CalibrationSampleTimeControl mode);
1237
1238 /** \brief Clears the all group requests.
1239 * \param evadcG pointer to EVADC group registers.
1240 * \return None
1241 */
1242 IFX_INLINE void IfxEvadc_clearAllResultRequests(Ifx_EVADC_G *evadcG);
1243
1244 /** \brief Gets the EVADC input class channel conversion mode
1245 * \param evadcG pointer to EVADC group registers.
1246 * \param inputClassNum EVADC input class number.
1247 * \return EVADC input class channel resolution.
1248 */
1249 IFX_INLINE IfxEvadc_ChannelNoiseReduction IfxEvadc_getGroupConversionMode(Ifx_EVADC_G *evadcG, uint8 inputClassNum);
1250
1251 /** \brief Get conversion result for the group
1252 * \param group pointer to the EVADC group
1253 * \param results pointer to scaled conversion results
1254 * \param resultOffset offset for the first result
1255 * \param numResults number of results
1256 * \return None
1257 *
1258 * \code
1259 * Here,Three channels are used for queued transfers
1260 * \code
1261 *
1262 * unsigned savedGate = adcGroup.module.evadc->G[adcGroup.groupId].Queue0.QMR0.B.ENGT;
1263 *
1264 * // IMPORTANT: for deterministic results we have to disable the queue gate
1265 * // while filling the queue, otherwise results could be output in the wrong order
1266 * adcGroup.module.evadc->G[adcGroup.groupId].Queue0.QMR0.B.ENGT = 0;
1267 *
1268 * // create channel config
1269 * IfxEvadc_Adc_ChannelConfig adcChannelConfig[3];
1270 * IfxEvadc_Adc_Channel adcChannel[3];
1271 *
1272 * for(int chnIx=0; chnIx<3; ++chnIx) {
1273 * IfxEvadc_Adc_initChannelConfig(&adcChannelConfig[chnIx], &adcGroup);
1274 *
1275 * adcChannelConfig[chnIx].channelId = (IfxEvadc_ChannelId)(chnIx);
1276 * adcChannelConfig[chnIx].resultRegister = IfxEvadc_ChannelResult_1; // use result register #1 for all channels
1277 *
1278 * // initialize the channel
1279 * IfxEvadc_Adc_initChannel(&adcChannel[chnIx], &adcChannelConfig[chnIx]);
1280 *
1281 * // Add channel to queue with refill enabled
1282 * IfxEvadc_Adc_addToQueue(&adcChannel[chnIx], IfxEvadc_RequestSource_queue0, IFXEVADC_QUEUE_REFILL);
1283 *
1284 * // restore previous gate config
1285 * adcGroup.module.evadc->G[adcGroup.groupId].Queue0.QMR0.B.ENGT = savedGate;
1286 *
1287 * // start the Queue
1288 * IfxEvadc_Adc_startQueue(&adcGroup,IfxEvadc_RequestSource_queue0); // just for the case that somebody copy&pastes the code - the queue has already been started in previous test
1289 *
1290 * Ifx_EVADC_G_RES results[10];
1291 * result = IfxEvadc_getGroupResult(group, results, 0, 2);
1292 * \endcode
1293 *
1294 */
1295 IFX_INLINE void IfxEvadc_getGroupResult(Ifx_EVADC_G *group, Ifx_EVADC_G_RES *results, uint32 resultOffset, uint32 numResults);
1296
1297 /** \brief Gets the EVADC input class channel sample time.
1298 * \param evadcG pointer to EVADC group registers.
1299 * \param inputClassNum ADC input class number.
1300 * \param analogFrequency ADC module analog frequency in Hz.
1301 * \return ADC input class channel sample time in sec.
1302 */
1303 IFX_INLINE float32 IfxEvadc_getGroupSampleTime(Ifx_EVADC_G *evadcG, uint8 inputClassNum, float32 analogFrequency);
1304
1305 /** \brief Gets the configured master index.
1306 * \param evadcG pointer to EVADC group registers.
1307 * \return configured master kernel index.
1308 */
1309 IFX_INLINE uint8 IfxEvadc_getMasterIndex(Ifx_EVADC_G *evadcG);
1310
1311 /** \brief Selects the chargingmode/voltage level in idle mode
1312 * \param evadcG Pointer to EVADC SFRs of a particular group
1313 * \param group Group No.
1314 * \param mode 0 - No precharge, the sampling capacitor keeps the current charge
1315 * 1 - The sampling capacitor is precharged to approx. half the reference when idle
1316 * \return None
1317 */
1318 IFX_INLINE void IfxEvadc_selectIdlePrechargeLevel(Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group, IfxEvadc_IdlePrecharge mode);
1319
1320 /**
1321 * \param evadcG Pointer to EVADC SFRs of a particular group
1322 * \param group Group No.
1323 * \return None
1324 */
1325 IFX_INLINE void IfxEvadc_enableInputBuffer(Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group);
1326
1327 /**
1328 * \param evadcG Pointer to EVADC SFRs of a particular group
1329 * \param group Group No.
1330 * \param duration Selects the amount of time for reference input precharging
1331 * \return None
1332 */
1333 IFX_INLINE void IfxEvadc_setReferencePrechargeDuration(Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group, IfxEvadc_ReferencePrechargeControl duration);
1334
1335 /**
1336 * \param evadcG Pointer to EVADC SFRs of a particular group
1337 * \param group EVADC Group No.
1338 * \return None
1339 */
1340 IFX_INLINE void IfxEvadc_enableReferencePrecharge(Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group);
1341
1342 /** \brief Resets the ADC group.
1343 * \param evadcG pointer to EVADC group registers.
1344 * \return None
1345 */
1346 IFX_INLINE void IfxEvadc_resetGroup(Ifx_EVADC_G *evadcG);
1347
1348 /** \brief Selects whether sample synchronization must be performed or not.
1349 * \param evadcG Pointer to EVADC SFRs of a particular group
1350 * \param group Group No.
1351 * \param mode Sample Synchronization Options
1352 * \return None
1353 */
1354 IFX_INLINE void IfxEvadc_setSampleSynchronizationMode(Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group, IfxEvadc_SampleSynchronization mode);
1355
1356 /** \brief Selects an additional clock cycle for the conversion step of the MSB.
1357 * \param evadcG Pointer to EVADC SFRs of a particular group
1358 * \param group EVADC Group No.
1359 * \param mode Selects an single or double clock cycle(s) for the conversion step of the MSB
1360 * \return None
1361 */
1362 IFX_INLINE void IfxEvadc_selectDoubleClockForMSBConversion(Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group, IfxEvadc_MsbConversionTime mode);
1363
1364 /** \brief Sets analog converter group number.
1365 * \param evadcG pointer to EVADC group registers.
1366 * \param analogConverterMode group analog converter mode.
1367 * \return None
1368 */
1369 IFX_INLINE void IfxEvadc_setAnalogConvertControl(Ifx_EVADC_G *evadcG, IfxEvadc_AnalogConverterMode analogConverterMode);
1370
1371 /**
1372 * \param evadcG Pointer to EVADC SFRs of a particular group
1373 * \param inputClassNum Group No.
1374 * \param mode
1375 * \return None
1376 */
1377 IFX_INLINE void IfxEvadc_setAnalogInputPrechargeControlEMUX(Ifx_EVADC_G *evadcG, uint8 inputClassNum, IfxEvadc_AnalogInputPrechargeControl mode);
1378
1379 /** \brief Analog Input Precharge Control for Standard Conversions
1380 * Buffer must be enabled by GxANCFG.B.BE = 1
1381 * \param evadcG Pointer to EVADC SFRs of a particular group
1382 * \param inputClassNum Class No.
1383 * \param mode
1384 * \return None
1385 */
1386 IFX_INLINE void IfxEvadc_setAnalogInputPrechargeControlStandard(Ifx_EVADC_G *evadcG, uint8 inputClassNum, IfxEvadc_AnalogInputPrechargeControl mode);
1387
1388 /** \brief Sets the ADC input class channel resolution.
1389 * \param evadcG pointer to EVADC group registers.
1390 * \param inputClassNum input class number.
1391 * \param conversionMode ADC input class channel Conversion Mode
1392 * \return None
1393 */
1394 IFX_INLINE void IfxEvadc_setGroupConversionMode(Ifx_EVADC_G *evadcG, uint8 inputClassNum, IfxEvadc_ChannelNoiseReduction conversionMode);
1395
1396 /**
1397 * \param evadcG Pointer to EVADC SFRs of a particular group
1398 * \param inputClassNum Class No.
1399 * \param conversionMode
1400 * \return None
1401 */
1402 IFX_INLINE void IfxEvadc_setGroupConversionModeEMUX(Ifx_EVADC_G *evadcG, uint8 inputClassNum, IfxEvadc_ChannelNoiseReductionEMUX conversionMode);
1403
1404 /** \brief Sets the ADC input class sample time ticks.
1405 * \param evadcG pointer to EVADC group registers.
1406 * \param inputClassNum input class number.
1407 * \param analogFrequency ADC analog frequency in Hz.
1408 * \param sampleTime request sample time in sec for input class.
1409 * \return None
1410 */
1411 IFX_INLINE void IfxEvadc_setGroupSampleTime(Ifx_EVADC_G *evadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime);
1412
1413 /** \brief Set the additional number of cycles(in addition to 2) in sample time.
1414 * \param evadcG Pointer to EVADC SFRs of a particular group
1415 * \param inputClassNum Class No.
1416 * \param analogFrequency ADC analog frequency in Hz.
1417 * \param sampleTime request sample time in sec for input class.
1418 * \return None
1419 */
1420 IFX_INLINE void IfxEvadc_setGroupSampleTimeEMUX(Ifx_EVADC_G *evadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime);
1421
1422 /** \brief Sets the master index.
1423 * \param evadcG pointer to EVADC group registers.
1424 * \param masterIndex master index.
1425 * \return None
1426 */
1427 IFX_INLINE void IfxEvadc_setMasterIndex(Ifx_EVADC_G *evadcG, uint8 masterIndex);
1428
1429 /**
1430 * \param evadcG Pointer to EVADC SFRs of a particular group
1431 * \param inputClassNum Class No.
1432 * \param mode
1433 * \return None
1434 */
1435 IFX_INLINE void IfxEvadc_spreadEarlySamplePointEMUXConversions(Ifx_EVADC_G *evadcG, uint8 inputClassNum, IfxEvadc_SpreadEarlySamplePointEMUXConversionsMode mode);
1436
1437 /**
1438 * \param evadcG Pointer to EVADC SFRs of a particular group
1439 * \param inputClassNum Class No.
1440 * \param mode
1441 * \return None
1442 */
1443 IFX_INLINE void IfxEvadc_spreadEarlySamplePointStandardConversions(Ifx_EVADC_G *evadcG, uint8 inputClassNum, IfxEvadc_SpreadEarlySamplePointStandardConversionsMode mode);
1444
1445 /******************************************************************************/
1446 /*-------------------------Global Function Prototypes-------------------------*/
1447 /******************************************************************************/
1448
1449 /** \brief Sets the Arbiter slot configurations.
1450 * \param evadcG pointer to EVADC group registers.
1451 * \param slotEnable enable/disable of slot.
1452 * \param prio channel request priority.
1453 * \param mode Channel Slot start mode.
1454 * \param slot channel slot Request source.
1455 * \return None
1456 */
1457 IFX_EXTERN void IfxEvadc_setArbiterPriority(Ifx_EVADC_G *evadcG, boolean slotEnable, IfxEvadc_RequestSlotPriority prio, IfxEvadc_RequestSlotStartMode mode, IfxEvadc_RequestSource slot);
1458
1459 /** \} */
1460
1461 /** \addtogroup IfxLld_Evadc_Std_Module
1462 * \{ */
1463
1464 /******************************************************************************/
1465 /*-------------------------Inline Function Prototypes-------------------------*/
1466 /******************************************************************************/
1467
1468 /** \brief Disable EVADC kernel.
1469 * \param evadc pointer to the base of EVADC registers.
1470 * \return None
1471 */
1472 IFX_INLINE void IfxEvadc_disableModule(Ifx_EVADC *evadc);
1473
1474 /** \brief Disables the post calibration.
1475 * \param evadcG pointer to the base of EVADC Grroup registers.
1476 * \param group Index of the group.
1477 * \param enabled disable or not.
1478 * \return None
1479 */
1480 IFX_INLINE void IfxEvadc_disablePostCalibration(Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group, boolean enabled);
1481
1482 /** \brief Enable EVADC kernel.
1483 * \param evadc pointer to the base of EVADC registers.
1484 * \return None
1485 */
1486 IFX_INLINE void IfxEvadc_enableModule(Ifx_EVADC *evadc);
1487
1488 /** \brief gets ADC Calibration Flag CAL status.
1489 * \param evadc pointer to EVADC group registers.
1490 * \param adcCalGroupNum ADC CAL group number.
1491 * \return CAL group status.
1492 */
1493 IFX_INLINE uint8 IfxEvadc_getAdcCalibrationActiveState(Ifx_EVADC *evadc, uint8 adcCalGroupNum);
1494
1495 /** \brief Gets the global control configuration value.
1496 * \param evadc pointer to the base of EVADC registers.
1497 * \return global control configuration value.
1498 */
1499 IFX_INLINE Ifx_EVADC_GLOBCFG IfxEvadc_getGlobalConfigValue(Ifx_EVADC *evadc);
1500
1501 /** \brief Gives the SRC source address.
1502 * \param group Index of the group
1503 * \param index SRC number
1504 * \return SRC source address
1505 */
1506 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEvadc_getSrcAddress(IfxEvadc_GroupId group, IfxEvadc_SrcNr index);
1507
1508 /** \brief get status of GLOBCFG.SUCAL Bit field
1509 * \param evadc Pointer to EVADC
1510 * \return status of GLOBCFG.SUCAL Bit field
1511 */
1512 IFX_INLINE boolean IfxEvadc_getStartupCalibrationStatus(Ifx_EVADC *evadc);
1513
1514 /** \brief Initialises ADC converter clock.
1515 * \param evadc Pointer to EVADC SFRs
1516 * \param evadcG Pointer to EVADC Group SFRs
1517 * \param converterClockDivider ADC converter clock divider.
1518 * \return None
1519 */
1520 IFX_INLINE void IfxEvadc_initialiseAdcConverterClock(Ifx_EVADC *evadc, Ifx_EVADC_G *evadcG, IfxEvadc_ClockDividerFactor converterClockDivider);
1521
1522 /** \brief initiates the calibration pulse phase.
1523 * \param evadc pointer to the base of EVADC registers
1524 * \return None
1525 */
1526 IFX_INLINE void IfxEvadc_initiateStartupCalibration(Ifx_EVADC *evadc);
1527
1528 /** \brief Returns the module's suspend state.
1529 * TRUE :if module is suspended.
1530 * FALSE:if module is not yet suspended.
1531 * \param evadc Pointer to EVADC module registers
1532 * \return Suspend status (TRUE / FALSE)
1533 */
1534 IFX_INLINE boolean IfxEvadc_isModuleSuspended(Ifx_EVADC *evadc);
1535
1536 /** \brief Sets the channel conversion mode.
1537 * \param evadc pointer to EVADC module registers.
1538 * \param InputClassNum input class number.
1539 * \param conversionMode ADC conversion Mode. Improves the precision of conversion
1540 * \return None
1541 */
1542 IFX_INLINE void IfxEvadc_setGlobalConversionMode(Ifx_EVADC *evadc, uint8 InputClassNum, IfxEvadc_ChannelNoiseReduction conversionMode);
1543
1544 /** \brief Sets the sensitivity of the module to sleep signal
1545 * \param evadc pointer to EVADC registers
1546 * \param mode mode selection (enable/disable)
1547 * \return None
1548 */
1549 IFX_INLINE void IfxEvadc_setSleepMode(Ifx_EVADC *evadc, IfxEvadc_SleepMode mode);
1550
1551 /** \brief Configure the Module to Hard/Soft suspend mode.
1552 * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
1553 * \param evadc Pointer to EVADC module registers
1554 * \param mode Module suspend mode
1555 * \return None
1556 */
1557 IFX_INLINE void IfxEvadc_setSuspendMode(Ifx_EVADC *evadc, IfxEvadc_SuspendMode mode);
1558
1559 /******************************************************************************/
1560 /*-------------------------Global Function Prototypes-------------------------*/
1561 /******************************************************************************/
1562
1563 /** \brief Disable write access to the EVADC config/control registers.
1564 * \param evadc pointer to the base of EVADC registers.
1565 * \param protectionSet Index of the bit in the ACCPROTx {x=0/1} for which write access is to be disabled.
1566 * \return None
1567 */
1568 IFX_EXTERN void IfxEvadc_disableAccess(Ifx_EVADC *evadc, IfxEvadc_Protection protectionSet);
1569
1570 /** \brief Enable write access to the EVADC config/control registers.
1571 * \param evadc pointer to the base of EVADC registers.
1572 * \param protectionSet Index of the bit in the ACCPROTx {x=0/1} for which write access is to be enabled.
1573 * \return None
1574 */
1575 IFX_EXTERN void IfxEvadc_enableAccess(Ifx_EVADC *evadc, IfxEvadc_Protection protectionSet);
1576
1577 /** \brief ADC Module Frequency in Hz
1578 * \param evadc Pointer to EVADC
1579 * \return module frequency
1580 */
1581 IFX_EXTERN float32 IfxEvadc_getAdcModuleFrequency(Ifx_EVADC *evadc);
1582
1583 /** \brief Configure the ADC analog clock.
1584 * \param evadc pointer to the base of EVADC registers.
1585 * \param fAdcI ADC analog clock clock frequency in Hz. Range = [5000000, 10000000].
1586 * \param group Pointer to EVADC Group
1587 * \return ADC analog clock frequency in Hz.
1588 */
1589 IFX_EXTERN uint32 IfxEvadc_initializeFAdcI(Ifx_EVADC *evadc, uint32 fAdcI, Ifx_EVADC_G *group);
1590
1591 /** \brief Resets the kernel.
1592 * \param evadc pointer to the EVADC Module
1593 * \return None
1594 */
1595 IFX_EXTERN void IfxEvadc_resetModule(Ifx_EVADC *evadc);
1596
1597 /** \brief Starts ADC calibration and wait for the end of the calibration process.
1598 * \param evadc pointer to the base of EVADC registers.
1599 * \return None
1600 */
1601 IFX_EXTERN void IfxEvadc_startupCalibration(Ifx_EVADC *evadc);
1602
1603 /** \brief SW workaround of EVADC Master/Slave conversion jitter issue(MCMETILLD-910)
1604 * \param evadc Pointer to EVADC module registers
1605 * \return Used for detecting failure in either OCDS Debug Active State Activation or Trigger Line TL1 Activation or both.
1606 */
1607 IFX_EXTERN boolean IfxEvadc_syncConvWorkAround(Ifx_EVADC *evadc);
1608
1609 /** \} */
1610
1611 /** \addtogroup IfxLld_Evadc_Std_Channel
1612 * \{ */
1613
1614 /******************************************************************************/
1615 /*-------------------------Inline Function Prototypes-------------------------*/
1616 /******************************************************************************/
1617
1618 /** \brief Clears the channel request.
1619 * \param evadcG pointer to EVADC group registers.
1620 * \param channelId channel id whose request to be cleared.
1621 * \return None
1622 */
1623 IFX_INLINE void IfxEvadc_clearChannelRequest(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelId);
1624
1625 /** \brief Enables the FIFO mode.
1626 * \param evadcG pointer to EVADC group registers.
1627 * \param resultRegister channel result register.
1628 * \param fifoMode FIFO mode .
1629 * \return None
1630 */
1631 IFX_INLINE void IfxEvadc_enableFifoMode(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelResult resultRegister, IfxEvadc_FifoMode fifoMode);
1632
1633 /**
1634 * \param evadcG pointer to EVADC group registers.
1635 * \param resultRegister channel result register.
1636 * \return None
1637 */
1638 IFX_INLINE void IfxEvadc_enableServiceRequest(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelResult resultRegister);
1639
1640 /**
1641 * \param evadcG Pointer to EVADC SFRs of a particular group
1642 * \param resultRegister
1643 * \return None
1644 */
1645 IFX_INLINE void IfxEvadc_disableServiceRequest(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelResult resultRegister);
1646
1647 /** \brief Gets the current ADC channel control configurations.
1648 * \param evadcG pointer to EVADC group registers.
1649 * \param channelIndex EVADC channel number.
1650 * \return current ADC channel control configuration.
1651 */
1652 IFX_INLINE Ifx_EVADC_G_CHCTR IfxEvadc_getChannelControlConfig(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex);
1653
1654 /** \brief get channel Input class
1655 * \param evadcG Pointer to EVADC Group
1656 * \param channelIndex Specifies channel Id
1657 * \return Input class
1658 */
1659 IFX_INLINE IfxEvadc_InputClasses IfxEvadc_getChannelInputclass(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex);
1660
1661 /** \brief Gets the channel result service request node pointer 0.
1662 * \param evadcG pointer to EVADC group registers.
1663 * \return channel result service request node pointer 0.
1664 */
1665 IFX_INLINE Ifx_EVADC_G_REVNP0 IfxEvadc_getChannelResultServiceRequestNodePointer0(Ifx_EVADC_G *evadcG);
1666
1667 /** \brief Gets the channel result service request node pointer 1.
1668 * \param evadcG pointer to EVADC group registers.
1669 * \return channel result service request node pointer 1.
1670 */
1671 IFX_INLINE Ifx_EVADC_G_REVNP1 IfxEvadc_getChannelResultServiceRequestNodePointer1(Ifx_EVADC_G *evadcG);
1672
1673 /** \brief Gets the channel service request node pointer.
1674 * \param evadcG pointer to EVADC group registers.
1675 * \return channel service request node pointer.
1676 */
1677 IFX_INLINE Ifx_EVADC_G_CEVNP0 IfxEvadc_getChannelServiceRequestNodePointer0(Ifx_EVADC_G *evadcG);
1678
1679 /** \brief get the channel service request node pointer (CH8--CH15)
1680 * \param evadcG pointer to EVADC Group register
1681 * \return Channel service request node pointer for CH8 to CH15
1682 */
1683 IFX_INLINE Ifx_EVADC_G_CEVNP1 IfxEvadc_getChannelServiceRequestNodePointer1(Ifx_EVADC_G *evadcG);
1684
1685 /** \brief Selects boundary extension.
1686 * \param evadcG pointer to EVADC group registers.
1687 * \param channelIndex group channel id.
1688 * \param boundaryMode boundary extension mode.
1689 * \return None
1690 */
1691 IFX_INLINE void IfxEvadc_setBoundaryMode(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, IfxEvadc_BoundaryExtension boundaryMode);
1692
1693 /** \brief Sets the channel event service request line.
1694 * \param evadcG pointer to EVADC group registers.
1695 * \param channelSrcNr channel event Service Node.
1696 * \param channel channel number.
1697 * \return None
1698 */
1699 IFX_INLINE void IfxEvadc_setChannelEventNodePointer0(Ifx_EVADC_G *evadcG, IfxEvadc_SrcNr channelSrcNr, IfxEvadc_ChannelId channel);
1700
1701 /** \brief set channel event node pointer(channel 8- channel 15)
1702 * \param evadcG pointer to the EVADC Group register
1703 * \param channelSrcNr service Request
1704 * \param channel specifies channel ID
1705 * \return None
1706 */
1707 IFX_INLINE void IfxEvadc_setChannelEventNodePointer1(Ifx_EVADC_G *evadcG, IfxEvadc_SrcNr channelSrcNr, IfxEvadc_ChannelId channel);
1708
1709 /** \brief Sets the channel input class.
1710 * \param evadcG pointer to EVADC group registers.
1711 * \param channelIndex group channel id.
1712 * \param inputClass channel input class.
1713 * \return None
1714 */
1715 IFX_INLINE void IfxEvadc_setChannelInputClass(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, IfxEvadc_InputClasses inputClass);
1716
1717 /** \brief Sets the channel event mode.
1718 * \param evadcG pointer to EVADC group registers.
1719 * \param channelIndex group channel id.
1720 * \param limitCheck channel event mode.
1721 * \return None
1722 */
1723 IFX_INLINE void IfxEvadc_setChannelLimitCheckMode(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, IfxEvadc_LimitCheck limitCheck);
1724
1725 /**
1726 * \param evadcG Pointer to EVADC SFRs of a particular group
1727 * \param resultRegister
1728 * \param mode 0b00 Standard data reduction (accumulation)
1729 * 0b01 Result filtering mode.
1730 * 0b10 Difference mode
1731 * \return None
1732 */
1733 IFX_INLINE void IfxEvadc_setDataModificationMode(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelResult resultRegister, IfxEvadc_DataModificationMode mode);
1734
1735 /**
1736 * \param evadcG Pointer to EVADC SFRs of a particular group
1737 * \param resultRegister Group No.
1738 * \param mode Defines result values stored/accumulated for the final result.
1739 * \return None
1740 */
1741 IFX_INLINE void IfxEvadc_setDataReductionControlMode(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelResult resultRegister, uint32 mode);
1742
1743 /**
1744 * \param evadcG Pointer to EVADC SFRs of a particular group
1745 * \param resultRegister
1746 * \param mode 0b00 - Separate result register
1747 * 0b01 - Part of a FIFO structure: copy each new valid result
1748 * 0b10 - Maximum mode: copy new result if bigger
1749 * 0b11 - Minimum mode: copy new result if smaller
1750 * \return None
1751 */
1752 IFX_INLINE void IfxEvadc_setFifoMode(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelResult resultRegister, IfxEvadc_FifoMode mode);
1753
1754 /** \brief Sets group's lower boundary.
1755 * \param evadcG pointer to EVADC group registers.
1756 * \param channelIndex group channel id.
1757 * \param lowerBoundary group lower boundary.
1758 * \return None
1759 */
1760 IFX_INLINE void IfxEvadc_setLowerBoundary(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, IfxEvadc_BoundarySelection lowerBoundary);
1761
1762 /** \brief Selects the refernce input.
1763 * \param evadcG pointer to EVADC group registers.
1764 * \param channelIndex group channel id.
1765 * \param reference reference input.
1766 * \return None
1767 */
1768 IFX_INLINE void IfxEvadc_setReferenceInput(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, IfxEvadc_ChannelReference reference);
1769
1770 /** \brief Sets result event node pointer 0.
1771 * \param evadcG pointer to EVADC group registers.
1772 * \param resultSrcNr channel result event service node.
1773 * \param resultRegister channel result register.
1774 * \return None
1775 */
1776 IFX_INLINE void IfxEvadc_setResultNodeEventPointer0(Ifx_EVADC_G *evadcG, IfxEvadc_SrcNr resultSrcNr, IfxEvadc_ChannelResult resultRegister);
1777
1778 /** \brief Sets result event node pointer 1.
1779 * \param evadcG pointer to EVADC group registers.
1780 * \param resultSrcNr channel result event service node.
1781 * \param resultRegister channel result register.
1782 * \return None
1783 */
1784 IFX_INLINE void IfxEvadc_setResultNodeEventPointer1(Ifx_EVADC_G *evadcG, IfxEvadc_SrcNr resultSrcNr, IfxEvadc_ChannelResult resultRegister);
1785
1786 /** \brief Sets result store position.
1787 * \param evadcG pointer to EVADC group registers.
1788 * \param channelIndex group channel id.
1789 * \param rightAlignedStorage result store position.
1790 * \return None
1791 */
1792 IFX_INLINE void IfxEvadc_setResultPosition(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, boolean rightAlignedStorage);
1793
1794 /** \brief Sets channel synchronization request.
1795 * \param evadcG pointer to EVADC group registers.
1796 * \param channelIndex group channel id.
1797 * \param synchonize whether channel synchronize or stand alone operation.
1798 * \return None
1799 */
1800 IFX_INLINE void IfxEvadc_setSyncRequest(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, boolean synchonize);
1801
1802 /** \brief Sets group's upper boundary.
1803 * \param evadcG pointer to EVADC group registers.
1804 * \param channelIndex group channel id.
1805 * \param upperBoundary group upper boundary.
1806 * \return None
1807 */
1808 IFX_INLINE void IfxEvadc_setUpperBoundary(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, IfxEvadc_BoundarySelection upperBoundary);
1809
1810 /** \brief Sets the group result register.
1811 * \param evadcG pointer to EVADC group registers.
1812 * \param channelIndex group channel id.
1813 * \param resultRegister result register for group result storage.
1814 * \return None
1815 */
1816 IFX_INLINE void IfxEvadc_storeGroupResult(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, IfxEvadc_ChannelResult resultRegister);
1817
1818 /** \} */
1819
1820 /** \addtogroup IfxLld_Evadc_Std_Emux
1821 * \{ */
1822
1823 /******************************************************************************/
1824 /*-------------------------Inline Function Prototypes-------------------------*/
1825 /******************************************************************************/
1826
1827 /** \brief get global input class conversion mode
1828 * \param evadc Pointer to EVADC Module space
1829 * \param inputClassNum global input class number
1830 * \return External channel resolution for global input class
1831 */
1832 IFX_INLINE IfxEvadc_ChannelNoiseReduction IfxEvadc_getEmuxGlobalConversionMode(Ifx_EVADC *evadc, uint8 inputClassNum);
1833
1834 /** \brief get the external conversion mode
1835 * \param evadcG Pointer to EVADC group register space
1836 * \param inputClassNum Adc input class number
1837 * \return Adc input class External channel conversion mode
1838 */
1839 IFX_INLINE IfxEvadc_ChannelNoiseReduction IfxEvadc_getEmuxGroupConversionMode(Ifx_EVADC_G *evadcG, uint8 inputClassNum);
1840
1841 /** \brief Gets the ADC input class sample time of external channel.
1842 * \param evadcG Pointer to Register Group space
1843 * \param inputClassNum ADC input class number
1844 * \param analogFrequency ADC module analog frequency in Hz.
1845 * \return ADC input class external channel sample time in sec.
1846 */
1847 IFX_INLINE float32 IfxEvadc_getEmuxGroupSampleTime(Ifx_EVADC_G *evadcG, uint8 inputClassNum, float32 analogFrequency);
1848
1849 /** \brief set the external conversion mode of Global class
1850 * \param evadc pointer to EVADC Module space
1851 * \param inputClassNum Global Input Class Number
1852 * \param conversionMode External Channel resolution
1853 * \return None
1854 */
1855 IFX_INLINE void IfxEvadc_setEmuxGlobalConversionMode(Ifx_EVADC *evadc, uint8 inputClassNum, IfxEvadc_ChannelNoiseReduction conversionMode);
1856
1857 /** \brief Sets the sample time of ADC global class for external channel.
1858 * \param evadc Pointer to EVADC Module space
1859 * \param inputClassNum Adc input class number
1860 * \param analogFrequency ADC analog Frequency in HZ
1861 * \param sampleTime the requested sample time for input class in sec
1862 * \return None
1863 */
1864 IFX_INLINE void IfxEvadc_setEmuxGlobalSampleTime(Ifx_EVADC *evadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime);
1865
1866 /** \brief set the external channel conversion mode of ADC input class
1867 * \param evadcG pointer to EVADC Group Register space
1868 * \param inputClassNum input class number
1869 * \param conversionMode input class external channel resolution
1870 * \return None
1871 */
1872 IFX_INLINE void IfxEvadc_setEmuxGroupConversionMode(Ifx_EVADC_G *evadcG, uint8 inputClassNum, IfxEvadc_ChannelNoiseReduction conversionMode);
1873
1874 /** \brief Sets the ADC input class sample time for external channel.
1875 * \param evadcG Pointer to EVADC Group Register Space
1876 * \param inputClassNum input class number
1877 * \param analogFrequency ADC analog frequency in Hz.
1878 * \param sampleTime request sample time in sec for input class.
1879 * \return None
1880 */
1881 IFX_INLINE void IfxEvadc_setEmuxGroupSampletime(Ifx_EVADC_G *evadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime);
1882
1883 /******************************************************************************/
1884 /*-------------------------Global Function Prototypes-------------------------*/
1885 /******************************************************************************/
1886
1887 /** \brief Configure external multiplexer mode
1888 * \param evadc pointer to Module space
1889 * \param evadcG Pointer to EVADC group register space
1890 * \param mode External Multiplexer mode
1891 * \param channels Specifies channel Id
1892 * \param startChannel specifies the external channel value from which conversion to be carried out
1893 * \param code Output the channel number in binary code/gray code
1894 * \param sampleTimeControl specifies when to use a sample time for external channel
1895 * \param channelSelectionStyle External Multiplexer Channel Selection Style
1896 * \return None
1897 */
1898 IFX_EXTERN void IfxEvadc_configExternalMultiplexerMode(Ifx_EVADC *evadc, Ifx_EVADC_G *evadcG, IfxEvadc_ExternalMultiplexerMode mode, uint8 channels, IfxEvadc_EmuxSelectValue startChannel, IfxEvadc_EmuxCodingScheme code, IfxEvadc_EmuxSampleTimeControl sampleTimeControl, IfxEvadc_ChannelSelectionStyle channelSelectionStyle);
1899
1900 /** \} */
1901
1902 /** \addtogroup IfxLld_Evadc_Std_FastCompare
1903 * \{ */
1904
1905 /******************************************************************************/
1906 /*-------------------------Inline Function Prototypes-------------------------*/
1907 /******************************************************************************/
1908
1909 /**
1910 * \param evadcFC Pointer to EVADC register set for Fast Compare operation
1911 * \param control Action to be taken on the BoundaryFlag(FCM.B.BFL)
1912 * \return None
1913 */
1914 IFX_INLINE void IfxEvadc_setFastCompareBoundaryFlagSwControl(Ifx_EVADC_FC *evadcFC, IfxEvadc_BoundaryFlagSwControl control);
1915
1916 /** \brief Sets in FCM.B.BFI whether to use Boundary Flag(FCM.B.BFL) directly or in a inverted format
1917 * \param evadcFC Pointer to EVADC register set for Fast Compare operation
1918 * \param mode Invert or not to invert the Boundary Flag(BFL)
1919 * \return None
1920 */
1921 IFX_INLINE void IfxEvadc_setFastCompareBoundaryFlagInversion(Ifx_EVADC_FC *evadcFC, IfxEvadc_BoundaryFlagInversionControl mode);
1922
1923 /**
1924 * \param evadcFC Pointer to EVADC register set for Fast Compare operation
1925 * \return None
1926 */
1927 IFX_INLINE void IfxEvadc_disableFastCompareBoundaryFlag(Ifx_EVADC_FC *evadcFC);
1928
1929 /**
1930 * \param evadcFC Pointer to EVADC register set for Fast Compare operation
1931 * \return None
1932 */
1933 IFX_INLINE void IfxEvadc_enableFastCompareBoundaryFlag(Ifx_EVADC_FC *evadcFC);
1934
1935 /** \brief Enable/Disable sample timing synchronization
1936 * \param evadcFC Pointer to EVADC register set for Fast Compare operation
1937 * \param mode Sample synchronization mode select
1938 * \return None
1939 */
1940 IFX_INLINE void IfxEvadc_enableFastCompareSampleSynchronization(Ifx_EVADC_FC *evadcFC, IfxEvadc_SampleSynchronization mode);
1941
1942 /** \brief Setting the Reference Precharge Control for Fast Compare Channels in FCCTRL.B.RPC
1943 * \param evadcFC Pointer to EVADC register set for Fast Compare operation
1944 * \param duration Reference Precharge Control Mode
1945 *
1946 * 0 - Precharge the reference input for 1 clock phase
1947 * 1 - Precharge the reference input for 1 clock period (2 phases)
1948 * \return None
1949 */
1950 IFX_INLINE void IfxEvadc_setFastCompareReferencePrechargeDuration(Ifx_EVADC_FC *evadcFC, IfxEvadc_ReferencePrechargeControl duration);
1951
1952 /** \brief Get boundary flag status.
1953 * \param evadcFC Pointer to EVADC register set for Fast Compare operation
1954 * \return 0(FALSE) - Passive state : Result has not yet crossed the activation boundary, or selected gate signal is inactive, or this boundary flag is disabled
1955 * 1(TRUE) - Active state:result has crossed the activation boundary
1956 */
1957 IFX_INLINE boolean IfxEvadc_getFastCompareBoundaryFlagStatus(Ifx_EVADC_FC *evadcFC);
1958
1959 /** \brief Returns current level of the selected trigger input
1960 * \param evadcFC Pointer to EVADC register set for Fast Compare operation
1961 * \return Current level of the selected trigger input
1962 */
1963 IFX_INLINE boolean IfxEvadc_getFastCompareExternalTriggerLevelStatus(Ifx_EVADC_FC *evadcFC);
1964
1965 /** \brief Returns result for Fast Compare operation
1966 * \param evadcFC Pointer to EVADC register set for Fast Compare operation
1967 * \return Result for Fast Compare operation
1968 */
1969 IFX_INLINE boolean IfxEvadc_getFastCompareResultStatus(Ifx_EVADC_FC *evadcFC);
1970
1971 /** \brief Indicates availability of a new result in bit FCM.B.FCR
1972 * \param evadcFC Pointer to EVADC register set for Fast Compare operation
1973 * \return Returns value Indicating availability of a new result in bit FCM.B.FCR
1974 */
1975 IFX_INLINE boolean IfxEvadc_isFastCompareNewResultAvailable(Ifx_EVADC_FC *evadcFC);
1976
1977 /** \brief Selects behaviour of Boundary Flag(BFL) wih respect to the value of FCR.
1978 * \param evadcFC Pointer to EVADC register set for Fast Compare operation
1979 * \param mode 0 - Set boundary flag BFL if result FCR = 1 (input above the defined band or compare value), clear if FCR = 0 (input below)
1980 * 1 - Set boundary flag BFL if result FCR = 0 (input below the defined band or compare value), clear if FCR = 1 (input above)
1981 * \return None
1982 */
1983 IFX_INLINE void IfxEvadc_selectFastCompareBoundaryFlagActivationMode(Ifx_EVADC_FC *evadcFC, IfxEvadc_BoundaryFlagActivationMode mode);
1984
1985 /**
1986 * \param evadcFC Pointer to EVADC register set for Fast Compare operation
1987 * \param nodePointer Bounday Flag Node Pointers
1988 * \return None
1989 */
1990 IFX_INLINE void IfxEvadc_selectFastCompareBoundaryFlagNodePointer(Ifx_EVADC_FC *evadcFC, IfxEvadc_BoundaryFlagNodePointer nodePointer);
1991
1992 /** \brief Sets the delay of the analog clock(in clock cycles) after the sync signal.
1993 * \param evadcFC Pointer to EVADC register set for Fast Compare operation
1994 * \param delay Defines the delay of the analog clock in clocks after the sync signal.
1995 * \return None
1996 */
1997 IFX_INLINE void IfxEvadc_setFastCompareAnalogClockSynchronizationDelay(Ifx_EVADC_FC *evadcFC, IfxEvadc_FastCompareAnalogClockSynchronizationDelay delay);
1998
1999 /** \brief Set Analog Converter Control modes
2000 * \param evadcFC Pointer to EVADC register set for Fast Compare operation
2001 * \param mode Analog Converter Control modes
2002 * \return None
2003 */
2004 IFX_INLINE void IfxEvadc_setFastCompareAnalogConverter(Ifx_EVADC_FC *evadcFC, IfxEvadc_FastCompareAnalogConverterControl mode);
2005
2006 /**
2007 * \param evadcFC Pointer to EVADC register set for Fast Compare operation
2008 * \param mode Analog Input Precharge Enable for Fast Comparisons
2009 * \return None
2010 */
2011 IFX_INLINE void IfxEvadc_setFastCompareAnalogInputPrechargeControl(Ifx_EVADC_FC *evadcFC, IfxEvadc_AnalogInputPrechargeControl mode);
2012
2013 /** \brief Defines the frequency of the analog converter clock fADCI (base clock for
2014 * conversion steps), derived from the peripheral clock: fADCI = fADC / divider
2015 * \param evadcFC Pointer to EVADC register set for Fast Compare operation
2016 * \param divider Fast Compare Analog Internal Clock Divider factor
2017 * \return None
2018 */
2019 IFX_INLINE void IfxEvadc_setFastCompareAnalogInternalClockDivider(Ifx_EVADC_FC *evadcFC, IfxEvadc_ClockDividerFactor divider);
2020
2021 /** \brief Sets the source of the value(s) in bitfield FCREF.
2022 * \param evadcFC Pointer to EVADC register set for Fast Compare operation
2023 * \param mode Defines the source of the value(s) in bitfield FCREF.
2024 * \return None
2025 */
2026 IFX_INLINE void IfxEvadc_setFastCompareAutomaticUpdateMode(Ifx_EVADC_FC *evadcFC, IfxEvadc_FastCompareAutomaticUpdate mode);
2027
2028 /**
2029 * \param evadcFC Pointer to EVADC register set for Fast Compare operation
2030 * \param mode Mode/criteria for generation of service requests
2031 * \return None
2032 */
2033 IFX_INLINE void IfxEvadc_setFastCompareChannelEventMode(Ifx_EVADC_FC *evadcFC, IfxEvadc_ChannelEventMode mode);
2034
2035 /** \brief Set external trigger polarity in FCCTRL.B.XTPOL
2036 * \param evadcFC Pointer to EVADC register set for Fast Compare operation
2037 * \param mode 0 - Use selected input signal directly
2038 * 1 - Invert selected input signal
2039 * \return None
2040 */
2041 IFX_INLINE void IfxEvadc_setFastCompareExternalTriggerPolarity(Ifx_EVADC_FC *evadcFC, IfxEvadc_ExternalTriggerPolarity mode);
2042
2043 /**
2044 * \param evadcFC Pointer to EVADC register set for Fast Compare operation
2045 * \param mode Fast Compare Gate Operating Mode
2046 * \return None
2047 */
2048 IFX_INLINE void IfxEvadc_setFastCompareGateOperatingMode(Ifx_EVADC_FC *evadcFC, IfxEvadc_GateOperatingMode mode);
2049
2050 /** \brief Ramp direction(up or down) settings
2051 * \param evadcFC Pointer to EVADC register set for Fast Compare operation
2052 * \param rampDirection Ramp direction(up or down) settings
2053 * \return None
2054 */
2055 IFX_INLINE void IfxEvadc_setFastCompareRampDirection(Ifx_EVADC_FC *evadcFC, IfxEvadc_RampDirection rampDirection);
2056
2057 /**
2058 * \param evadcFC Pointer to EVADC register set for Fast Compare operation
2059 * \param referenceValue The input level is compared to this value.
2060 * \return None
2061 */
2062 IFX_INLINE void IfxEvadc_setFastCompareReferenceValue(Ifx_EVADC_FC *evadcFC, uint16 referenceValue);
2063
2064 /** \brief Defines the basic run conditions of the fast compare channel.
2065 * \param evadcFC Pointer to EVADC register set for Fast Compare operation
2066 * \param mode Run mode of the fast compare channel.
2067 * \return None
2068 */
2069 IFX_INLINE void IfxEvadc_setFastCompareRunControl(Ifx_EVADC_FC *evadcFC, IfxEvadc_FastCompareRunControl mode);
2070
2071 /**
2072 * \param evadcFC Pointer to EVADC register set for Fast Compare operation
2073 * \param rampStartMode Defines the run conditions for the ramp generation
2074 * \return None
2075 */
2076 IFX_INLINE void IfxEvadc_setFastCompareRunRampControl(Ifx_EVADC_FC *evadcFC, IfxEvadc_RampRunControl rampStartMode);
2077
2078 /** \brief Setting additional sample time in FCCTRL.B.STCF
2079 * \param evadcFC Pointer to EVADC register set for Fast Compare operation
2080 * \param additionalCycles Number of additional clock cycles to be added to the minimum sample phase of 2 analog clock cycles
2081 * \return None
2082 */
2083 IFX_INLINE void IfxEvadc_setFastCompareSampleTimeControl(Ifx_EVADC_FC *evadcFC, uint8 additionalCycles);
2084
2085 /** \brief Sets when to generate service requests
2086 * \param evadcFC Pointer to EVADC register set for Fast Compare operation
2087 * \param mode Defines when to generate service requests
2088 * \return None
2089 */
2090 IFX_INLINE void IfxEvadc_setFastCompareServiceRequestGeneration(Ifx_EVADC_FC *evadcFC, IfxEvadc_FastCompareServiceRequestGeneration mode);
2091
2092 /** \brief Sets the interval at which fast compare operations are triggered in steps of 16 * 1/fADC
2093 * \param evadcFC Pointer to EVADC register set for Fast Compare operation
2094 * \param interval Defines the interval at which fast compare operations are triggered in steps of 16 * 1/f_ADC
2095 * \return None
2096 */
2097 IFX_INLINE void IfxEvadc_setFastCompareTriggerInterval(Ifx_EVADC_FC *evadcFC, uint8 interval);
2098
2099 /**
2100 * \param evadcFC Pointer to EVADC register set for Fast Compare operation
2101 * \param mode External Trigger Operating Mode
2102 * \return None
2103 */
2104 IFX_INLINE void IfxEvadc_setFastCompareTriggerOperatingMode(Ifx_EVADC_FC *evadcFC, IfxEvadc_TriggerOperatingMode mode);
2105
2106 /** \} */
2107
2108 /******************************************************************************/
2109 /*-------------------------Inline Function Prototypes-------------------------*/
2110 /******************************************************************************/
2111
2112 /**
2113 * \param evadcG Pointer to EVADC group register
2114 * \return analog function configuration value
2115 */
2116 IFX_INLINE Ifx_EVADC_G_ANCFG IfxEvadc_getAnalogFunctionConfiguration(Ifx_EVADC_G *evadcG);
2117
2118 /** \brief Get the sample time of ADC global class for external channel.
2119 * \param evadc pointer to EVADC Module space
2120 * \param inputClassNum Adc input class number
2121 * \param analogFrequency ADC module analog frequency in Hz.
2122 * \return ADC input class external channel sample time in sec.
2123 */
2124 IFX_INLINE float32 IfxEvadc_getEmuxGlobalSampleTime(Ifx_EVADC *evadc, uint8 inputClassNum, float32 analogFrequency);
2125
2126 /** \brief Sets the Emux Interface for a particular group
2127 * \param evadc Pointer to EVADC Module Space
2128 * \param emuxInterface specifies the EmuxInterface
2129 * \param group specifies the group ID
2130 * \return None
2131 */
2132 IFX_INLINE void IfxEvadc_setEmuxInterfaceForGroup(Ifx_EVADC *evadc, IfxEvadc_EmuxInterface emuxInterface, IfxEvadc_GroupId group);
2133
2134 /**
2135 * \param evadcG Pointer to EVADC Group Registers
2136 * \param group EVADC Group Number
2137 * \return None
2138 */
2139 IFX_INLINE void IfxEvadc_disableReferencePrecharge(Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group);
2140
2141 /**
2142 * \param evadcG Pointer to EVADC Group SFRs
2143 * \param group EVADC Group No.
2144 * \return None
2145 */
2146 IFX_INLINE void IfxEvadc_disableInputBuffer(Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group);
2147
2148 /** \brief Return if the clock for EVADC modules is enabled
2149 * \param evadc Pointer to EVADC
2150 * \return Status (TRUE/FALSE)
2151 */
2152 IFX_INLINE boolean IfxEvadc_isModuleEnabled(Ifx_EVADC *evadc);
2153
2154 /** \brief Enable the startup calibaration phase
2155 * \param evadc Pointer to EVADC
2156 * \return None
2157 */
2158 IFX_INLINE void IfxEvadc_enableStartupCalibration(Ifx_EVADC *evadc);
2159
2160 /** \brief Enable the Queue Gating Mode
2161 * \param evadcG Pointer to EVADC Group SFRs
2162 * \param queue Request source Type(Queue 0,Queue 1,Queue 2)
2163 * \param gatingMode gating mode. High level, Low Level or Gating disabled.
2164 * \return None
2165 */
2166 IFX_INLINE void IfxEvadc_selectQueueGatingMode(Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource queue, IfxEvadc_GatingMode gatingMode);
2167
2168 /** \brief Defines the channel number to be converted
2169 * \param evadcG Pointer to EVADC Group SFRs
2170 * \param queue Request source Type(Queue 0,Queue 1,Queue 2)
2171 * \param channel Channel number
2172 * \return None
2173 */
2174 IFX_INLINE void IfxEvadc_setChannelRequest(Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource queue, IfxEvadc_ChannelId channel);
2175
2176 /** \brief Sets the global input class registers, define the sample time and data conversion mode
2177 * \param evadcG Pointer to EVADC Group SFRs
2178 * \param inputClassNum Input Class Number
2179 * \param value Value to be written
2180 * \return None
2181 */
2182 IFX_INLINE void IfxEvadc_configureIclass(Ifx_EVADC_G *evadcG, uint8 inputClassNum, uint32 value);
2183
2184 /** \brief Returns the pointer to the result register
2185 * \param evadcG Pointer to EVADC Group SFRs
2186 * \param channel Channel Number
2187 * \return The address to the result register
2188 */
2189 IFX_INLINE volatile uint32 *IfxEvadc_getResultRegisterAddress(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channel);
2190
2191 /******************************************************************************/
2192 /*---------------------Inline Function Implementations------------------------*/
2193 /******************************************************************************/
2194
2195 IFX_INLINE void IfxEvadc_setAnalogClockSynchronizationDelay(Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group, IfxEvadc_AnalogClockSynchronizationDelay delay)
2196 {
2197 IFX_UNUSED_PARAMETER(group);
2198 evadcG->ANCFG.B.ACSD = delay;
2199 }
2200
2201
2202 IFX_INLINE uint32 IfxEvadc_calculateSampleTime(float32 analogFrequency, float32 sampleTime)
2203 {
2204 uint32 ticks = 0;
2205
2206 ticks = (uint32)(sampleTime * analogFrequency) - 2;
2207
2208 if (ticks > 31)
2209 {
2210 ticks = (ticks / 16) + 15;
2211 }
2212
2213 ticks = __minu(ticks, 0xFFu);
2214
2215 return ticks;
2216 }
2217
2218
2219 IFX_INLINE void IfxEvadc_setCalibrationSampleTime(Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group, IfxEvadc_CalibrationSampleTimeControl mode)
2220 {
2221 IFX_UNUSED_PARAMETER(group);
2222 evadcG->ANCFG.B.CALSTC = mode;
2223 }
2224
2225
2226 IFX_INLINE void IfxEvadc_clearAllResultRequests(Ifx_EVADC_G *evadcG)
2227 {
2228 evadcG->REFCLR.U = 0x0000FFFFu;
2229 }
2230
2231
2232 IFX_INLINE void IfxEvadc_clearChannelRequest(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelId)
2233 {
2234 evadcG->CEFCLR.U = 1 << channelId;
2235 }
2236
2237
2238 IFX_INLINE void IfxEvadc_clearQueue(Ifx_EVADC_G *evadcG, boolean flushQueue, IfxEvadc_RequestSource sourceType)
2239 {
2240 switch (sourceType)
2241 {
2242 case IfxEvadc_RequestSource_queue0:
2243 evadcG->Q[0].QMR.B.FLUSH = flushQueue;
2244 break;
2245 case IfxEvadc_RequestSource_queue1:
2246 evadcG->Q[1].QMR.B.FLUSH = flushQueue;
2247 break;
2248 case IfxEvadc_RequestSource_queue2:
2249 evadcG->Q[2].QMR.B.FLUSH = flushQueue;
2250 break;
2251 }
2252 }
2253
2254
2255 IFX_INLINE void IfxEvadc_configureWaitForReadMode(Ifx_EVADC_G *group, uint32 resultIdx, boolean enabled)
2256 {
2257 group->RCR[resultIdx].B.WFR = enabled;
2258 }
2259
2260
2261 IFX_INLINE void IfxEvadc_configureWaitForReadModeForGlobalResultRegister(Ifx_EVADC *evadc, boolean enabled)
2262 {
2263 evadc->GLOB.RCR.B.WFR = enabled;
2264 }
2265
2266
2267 IFX_INLINE void IfxEvadc_setFastCompareBoundaryFlagSwControl(Ifx_EVADC_FC *evadcFC, IfxEvadc_BoundaryFlagSwControl control)
2268 {
2269 evadcFC->FCBFL.B.BFS = control;
2270 }
2271
2272
2273 IFX_INLINE void IfxEvadc_setFastCompareBoundaryFlagInversion(Ifx_EVADC_FC *evadcFC, IfxEvadc_BoundaryFlagInversionControl mode)
2274 {
2275 evadcFC->FCBFL.B.BFI = mode;
2276 }
2277
2278
2279 IFX_INLINE void IfxEvadc_disableFastCompareBoundaryFlag(Ifx_EVADC_FC *evadcFC)
2280 {
2281 evadcFC->FCBFL.B.BFM = 0;
2282 }
2283
2284
2285 IFX_INLINE void IfxEvadc_disableModule(Ifx_EVADC *evadc)
2286 {
2287 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
2288
2289 IfxScuWdt_clearCpuEndinit(passwd);
2290 evadc->CLC.B.DISR = 1;
2291 IfxScuWdt_setCpuEndinit(passwd);
2292 }
2293
2294
2295 IFX_INLINE void IfxEvadc_disablePostCalibration(Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group, boolean enabled)
2296 {
2297 IFX_UNUSED_PARAMETER(group);
2298 evadcG->ANCFG.B.DPCAL = enabled;
2299 }
2300
2301
2302 IFX_INLINE void IfxEvadc_enableFastCompareBoundaryFlag(Ifx_EVADC_FC *evadcFC)
2303 {
2304 evadcFC->FCBFL.B.BFM = 1;
2305 }
2306
2307
2308 IFX_INLINE void IfxEvadc_enableFastCompareSampleSynchronization(Ifx_EVADC_FC *evadcFC, IfxEvadc_SampleSynchronization mode)
2309 {
2310 Ifx_EVADC_FC_FCM tempFCM;
2311 tempFCM.U = evadcFC->FCM.U;
2312 tempFCM.B.FCMWC = 1; /*Enabling write permission to FCM.B.SSE*/
2313 tempFCM.B.SSE = mode;
2314 evadcFC->FCM.U = tempFCM.U;
2315 }
2316
2317
2318 IFX_INLINE void IfxEvadc_enableFifoMode(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelResult resultRegister, IfxEvadc_FifoMode fifoMode)
2319 {
2320 evadcG->RCR[resultRegister].B.FEN = fifoMode;
2321 }
2322
2323
2324 IFX_INLINE void IfxEvadc_enableModule(Ifx_EVADC *evadc)
2325 {
2326 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
2327
2328 IfxScuWdt_clearCpuEndinit(passwd);
2329 evadc->CLC.U = 0x00000000;
2330 IfxScuWdt_setCpuEndinit(passwd);
2331 }
2332
2333
2334 IFX_INLINE void IfxEvadc_enableServiceRequest(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelResult resultRegister)
2335 {
2336 evadcG->RCR[resultRegister].B.SRGEN = 1;
2337 }
2338
2339
2340 IFX_INLINE void IfxEvadc_disableServiceRequest(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelResult resultRegister)
2341 {
2342 evadcG->RCR[resultRegister].B.SRGEN = 0;
2343 }
2344
2345
2346 IFX_INLINE void IfxEvadc_setFastCompareReferencePrechargeDuration(Ifx_EVADC_FC *evadcFC, IfxEvadc_ReferencePrechargeControl duration)
2347 {
2348 Ifx_EVADC_FC_FCCTRL tempFCCTRL;
2349 tempFCCTRL.U = evadcFC->FCCTRL.U;
2350 tempFCCTRL.B.CPWC = 1; /*Enabling write permission to FCCTRL.B.RPC*/
2351 tempFCCTRL.B.RPE = duration;
2352 evadcFC->FCCTRL.U = tempFCCTRL.U;
2353 }
2354
2355
2356 IFX_INLINE float32 IfxEvadc_getAdcAnalogFrequency(Ifx_EVADC_G *group)
2357 {
2358 #ifdef IFX_CFG_AURIX_SCUCCU_USED
2359 return IfxScuCcu_getSpbFrequency() / (1U + group->ANCFG.B.DIVA);
2360 #else
2361 return IfxScuCcu_getAdcFrequency() / (1U + group->ANCFG.B.DIVA);
2362 #endif
2363 }
2364
2365
2366 IFX_INLINE uint8 IfxEvadc_getAdcCalibrationActiveState(Ifx_EVADC *evadc, uint8 adcCalGroupNum)
2367 {
2368 uint8 status = 0;
2369 status = evadc->G[adcCalGroupNum].ARBCFG.B.CAL;
2370 return status;
2371 }
2372
2373
2374 IFX_INLINE Ifx_EVADC_G_ANCFG IfxEvadc_getAnalogFunctionConfiguration(Ifx_EVADC_G *evadcG)
2375 {
2376 Ifx_EVADC_G_ANCFG analogCfg;
2377 analogCfg.U = evadcG->ANCFG.U;
2378 return analogCfg;
2379 }
2380
2381
2382 IFX_INLINE Ifx_EVADC_G_CHCTR IfxEvadc_getChannelControlConfig(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex)
2383 {
2384 Ifx_EVADC_G_CHCTR tempChctr;
2385 tempChctr.U = evadcG->CHCTR[channelIndex].U;
2386 return tempChctr;
2387 }
2388
2389
2390 IFX_INLINE IfxEvadc_InputClasses IfxEvadc_getChannelInputclass(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex)
2391 {
2392 return (IfxEvadc_InputClasses)evadcG->CHCTR[channelIndex].B.ICLSEL;
2393 }
2394
2395
2396 IFX_INLINE Ifx_EVADC_G_REVNP0 IfxEvadc_getChannelResultServiceRequestNodePointer0(Ifx_EVADC_G *evadcG)
2397 {
2398 Ifx_EVADC_G_REVNP0 resultServiceRequestNodePtr0;
2399 resultServiceRequestNodePtr0.U = evadcG->REVNP0.U;
2400 return resultServiceRequestNodePtr0;
2401 }
2402
2403
2404 IFX_INLINE Ifx_EVADC_G_REVNP1 IfxEvadc_getChannelResultServiceRequestNodePointer1(Ifx_EVADC_G *evadcG)
2405 {
2406 Ifx_EVADC_G_REVNP1 resultServiceRequestNodePtr1;
2407 resultServiceRequestNodePtr1.U = evadcG->REVNP1.U;
2408 return resultServiceRequestNodePtr1;
2409 }
2410
2411
2412 IFX_INLINE Ifx_EVADC_G_CEVNP0 IfxEvadc_getChannelServiceRequestNodePointer0(Ifx_EVADC_G *evadcG)
2413 {
2414 Ifx_EVADC_G_CEVNP0 serviceRequestNodePtr;
2415 serviceRequestNodePtr.U = evadcG->CEVNP0.U;
2416 return serviceRequestNodePtr;
2417 }
2418
2419
2420 IFX_INLINE Ifx_EVADC_G_CEVNP1 IfxEvadc_getChannelServiceRequestNodePointer1(Ifx_EVADC_G *evadcG)
2421 {
2422 Ifx_EVADC_G_CEVNP1 serviceRequestNodePtr;
2423 serviceRequestNodePtr.U = evadcG->CEVNP1.U;
2424 return serviceRequestNodePtr;
2425 }
2426
2427
2428 IFX_INLINE IfxEvadc_ChannelNoiseReduction IfxEvadc_getEmuxGlobalConversionMode(Ifx_EVADC *evadc, uint8 inputClassNum)
2429 {
2430 return (IfxEvadc_ChannelNoiseReduction)evadc->GLOB.ICLASS[inputClassNum].B.CME;
2431 }
2432
2433
2434 IFX_INLINE float32 IfxEvadc_getEmuxGlobalSampleTime(Ifx_EVADC *evadc, uint8 inputClassNum, float32 analogFrequency)
2435 {
2436 return (float32)(IFXEVADC_SAMPLETIME_MIN + evadc->GLOB.ICLASS[inputClassNum].B.STCE) / analogFrequency;
2437 }
2438
2439
2440 IFX_INLINE IfxEvadc_ChannelNoiseReduction IfxEvadc_getEmuxGroupConversionMode(Ifx_EVADC_G *evadcG, uint8 inputClassNum)
2441 {
2442 return (IfxEvadc_ChannelNoiseReduction)evadcG->ICLASS[inputClassNum].B.CME;
2443 }
2444
2445
2446 IFX_INLINE float32 IfxEvadc_getEmuxGroupSampleTime(Ifx_EVADC_G *evadcG, uint8 inputClassNum, float32 analogFrequency)
2447 {
2448 return (float32)(IFXEVADC_SAMPLETIME_MIN + evadcG->ICLASS[inputClassNum].B.STCE) / analogFrequency;
2449 }
2450
2451
2452 IFX_INLINE boolean IfxEvadc_getFastCompareBoundaryFlagStatus(Ifx_EVADC_FC *evadcFC)
2453 {
2454 boolean status;
2455
2456 if (evadcFC->FCBFL.B.BFL == 1)
2457 {
2458 status = TRUE;
2459 }
2460 else
2461 {
2462 status = FALSE;
2463 }
2464
2465 return status;
2466 }
2467
2468
2469 IFX_INLINE boolean IfxEvadc_getFastCompareExternalTriggerLevelStatus(Ifx_EVADC_FC *evadcFC)
2470 {
2471 boolean extTrigLevel;
2472
2473 if (evadcFC->FCCTRL.B.XTLVL == 1)
2474 {
2475 extTrigLevel = TRUE;
2476 }
2477 else
2478 {
2479 extTrigLevel = FALSE;
2480 }
2481
2482 return extTrigLevel;
2483 }
2484
2485
2486 IFX_INLINE boolean IfxEvadc_getFastCompareResultStatus(Ifx_EVADC_FC *evadcFC)
2487 {
2488 boolean result;
2489
2490 if (evadcFC->FCBFL.B.FCR == 1)
2491 {
2492 result = TRUE;
2493 }
2494 else
2495 {
2496 result = FALSE;
2497 }
2498
2499 return result;
2500 }
2501
2502
2503 IFX_INLINE Ifx_EVADC_GLOBCFG IfxEvadc_getGlobalConfigValue(Ifx_EVADC *evadc)
2504 {
2505 Ifx_EVADC_GLOBCFG globCfg;
2506 globCfg.U = evadc->GLOBCFG.U;
2507 return globCfg;
2508 }
2509
2510
2511 IFX_INLINE IfxEvadc_ChannelNoiseReduction IfxEvadc_getGlobalConversionMode(Ifx_EVADC *evadc, uint8 inputClassNum)
2512 {
2513 return (IfxEvadc_ChannelNoiseReduction)evadc->GLOB.ICLASS[inputClassNum].B.CMS;
2514 }
2515
2516
2517 IFX_INLINE Ifx_EVADC_GLOB_RES IfxEvadc_getGlobalResult(Ifx_EVADC *evadc)
2518 {
2519 Ifx_EVADC_GLOB_RES tmpGlobalResult;
2520
2521 tmpGlobalResult.U = evadc->GLOB.RES.U;
2522
2523 return tmpGlobalResult;
2524 }
2525
2526
2527 IFX_INLINE float32 IfxEvadc_getGlobalSampleTime(Ifx_EVADC *evadc, uint8 inputClassNum, float32 analogFrequency)
2528 {
2529 uint32 sampleTime = evadc->GLOB.ICLASS[inputClassNum].B.STCS;
2530
2531 if (sampleTime > 16)
2532 {
2533 sampleTime = (sampleTime - 15) * 16;
2534 }
2535
2536 return (float32)(IFXEVADC_SAMPLETIME_MIN + sampleTime) / analogFrequency;
2537 }
2538
2539
2540 IFX_INLINE IfxEvadc_ChannelNoiseReduction IfxEvadc_getGroupConversionMode(Ifx_EVADC_G *evadcG, uint8 inputClassNum)
2541 {
2542 return (IfxEvadc_ChannelNoiseReduction)evadcG->ICLASS[inputClassNum].B.CMS;
2543 }
2544
2545
2546 IFX_INLINE void IfxEvadc_getGroupResult(Ifx_EVADC_G *group, Ifx_EVADC_G_RES *results, uint32 resultOffset, uint32 numResults)
2547 {
2548 uint32 idx = 0;
2549
2550 for (idx = 0; idx < numResults; idx++)
2551 {
2552 results[idx].U = group->RES[resultOffset + idx].U;
2553 }
2554 }
2555
2556
2557 IFX_INLINE float32 IfxEvadc_getGroupSampleTime(Ifx_EVADC_G *evadcG, uint8 inputClassNum, float32 analogFrequency)
2558 {
2559 uint32 sampleTime = evadcG->ICLASS[inputClassNum].B.STCS;
2560
2561 if (sampleTime > 16)
2562 {
2563 sampleTime = (sampleTime - 15) * 16;
2564 }
2565
2566 return (float32)(IFXEVADC_SAMPLETIME_MIN + sampleTime) / analogFrequency;
2567 }
2568
2569
2570 IFX_INLINE uint8 IfxEvadc_getMasterIndex(Ifx_EVADC_G *evadcG)
2571 {
2572 uint8 masterIndex = 0;
2573 masterIndex = evadcG->SYNCTR.B.STSEL;
2574 return masterIndex;
2575 }
2576
2577
2578 IFX_INLINE Ifx_EVADC_G_RES IfxEvadc_getResult(Ifx_EVADC_G *group, uint32 resultIdx)
2579 {
2580 Ifx_EVADC_G_RES tmpResult;
2581 tmpResult.U = group->RES[resultIdx].U;
2582
2583 return tmpResult;
2584 }
2585
2586
2587 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEvadc_getSrcAddress(IfxEvadc_GroupId group, IfxEvadc_SrcNr index)
2588 {
2589 if ((group >= IfxEvadc_GroupId_12) && (group < IfxEvadc_GroupId_global0)) //Condition for Fast Compare groups
2590 {
2591 IFX_ASSERT(IFX_VERBOSE_LEVEL_WARNING, index == 0); /* For Fast Compare group, only SR0 is available.So only index = 0 is valid.So asserting warning in case index!=0 */
2592 }
2593
2594 /*This is being done because the enum IfxEvadc_GroupId has count equal to group number and this count may not be continuous for different derivatives whereas IfxEvadc_cfg_srcAddresses[] has continuous positioning according to number of groups of each type available*/
2595 if ((group > 7) && (group < 12))
2596 {
2597 group = (IfxEvadc_GroupId)(group - (8 - IFXEVADC_NUM_ADC_PRIMARY_GROUPS));
2598 }
2599 else if ((group > 11) && (group < 20))
2600 {
2601 group = (IfxEvadc_GroupId)(group - (12 - IFXEVADC_NUM_ADC_PRIMARY_GROUPS - IFXEVADC_NUM_ADC_SECONDARY_GROUPS));
2602 }
2603 else if ((group == 20) || (group == 21))
2604 {
2605 group = (IfxEvadc_GroupId)(group - (20 - IFXEVADC_NUM_ADC_PRIMARY_GROUPS - IFXEVADC_NUM_ADC_SECONDARY_GROUPS - IFXEVADC_NUM_FAST_COMPARE_CHANNELS));
2606 }
2607
2608 volatile Ifx_SRC_SRCR *base = IfxEvadc_cfg_srcAddresses[(group << 2) + index];
2609
2610 return base;
2611 }
2612
2613
2614 IFX_INLINE boolean IfxEvadc_getStartupCalibrationStatus(Ifx_EVADC *evadc)
2615 {
2616 return (boolean)evadc->GLOBCFG.B.SUCAL;
2617 }
2618
2619
2620 IFX_INLINE void IfxEvadc_selectIdlePrechargeLevel(Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group, IfxEvadc_IdlePrecharge mode)
2621 {
2622 IFX_UNUSED_PARAMETER(group);
2623
2624 evadcG->ANCFG.B.IPE = mode;
2625 }
2626
2627
2628 IFX_INLINE void IfxEvadc_initEmuxPin(const IfxEvadc_Emux_Out *emux, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
2629 {
2630 IfxPort_setPinModeOutput(emux->pin.port, emux->pin.pinIndex, outputMode, emux->select);
2631 IfxPort_setPinPadDriver(emux->pin.port, emux->pin.pinIndex, padDriver);
2632 }
2633
2634
2635 IFX_INLINE void IfxEvadc_initGxBflPin(const IfxEvadc_GxBfl_Out *gxBfl, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
2636 {
2637 IfxPort_setPinModeOutput(gxBfl->pin.port, gxBfl->pin.pinIndex, outputMode, gxBfl->select);
2638 IfxPort_setPinPadDriver(gxBfl->pin.port, gxBfl->pin.pinIndex, padDriver);
2639 }
2640
2641
2642 IFX_INLINE void IfxEvadc_initialiseAdcConverterClock(Ifx_EVADC *evadc, Ifx_EVADC_G *evadcG, IfxEvadc_ClockDividerFactor converterClockDivider)
2643 {
2644 IFX_UNUSED_PARAMETER(evadc);
2645 evadcG->ANCFG.B.DIVA = converterClockDivider;
2646 }
2647
2648
2649 IFX_INLINE void IfxEvadc_initiateStartupCalibration(Ifx_EVADC *evadc)
2650 {
2651 evadc->GLOBCFG.B.SUCAL = 1;
2652 }
2653
2654
2655 IFX_INLINE void IfxEvadc_enableInputBuffer(Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group)
2656 {
2657 IFX_UNUSED_PARAMETER(group);
2658 evadcG->ANCFG.B.BE = 1;
2659 }
2660
2661
2662 IFX_INLINE boolean IfxEvadc_isFastCompareNewResultAvailable(Ifx_EVADC_FC *evadcFC)
2663 {
2664 boolean validFlag;
2665
2666 if (evadcFC->FCBFL.B.VF == 1)
2667 {
2668 validFlag = TRUE;
2669 }
2670 else
2671 {
2672 validFlag = FALSE;
2673 }
2674
2675 return validFlag;
2676 }
2677
2678
2679 IFX_INLINE boolean IfxEvadc_isModuleSuspended(Ifx_EVADC *evadc)
2680 {
2681 Ifx_EVADC_OCS ocs;
2682
2683 // read the status
2684 ocs.U = evadc->OCS.U;
2685
2686 // return the status
2687 return ocs.B.SUSSTA;
2688 }
2689
2690
2691 IFX_INLINE void IfxEvadc_setReferencePrechargeDuration(Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group, IfxEvadc_ReferencePrechargeControl duration)
2692 {
2693 IFX_UNUSED_PARAMETER(group);
2694 evadcG->ANCFG.B.RPC = duration;
2695 }
2696
2697
2698 IFX_INLINE void IfxEvadc_enableReferencePrecharge(Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group)
2699 {
2700 IFX_UNUSED_PARAMETER(group);
2701 evadcG->ANCFG.B.RPE = 1;
2702 }
2703
2704
2705 IFX_INLINE void IfxEvadc_resetGroup(Ifx_EVADC_G *evadcG)
2706 {
2707 evadcG->ARBCFG.B.ANONC = IfxEvadc_AnalogConverterMode_off; /* turn off group */
2708 }
2709
2710
2711 IFX_INLINE void IfxEvadc_setSampleSynchronizationMode(Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group, IfxEvadc_SampleSynchronization mode)
2712 {
2713 IFX_UNUSED_PARAMETER(group);
2714 evadcG->ANCFG.B.SSE = mode;
2715 }
2716
2717
2718 IFX_INLINE void IfxEvadc_selectDoubleClockForMSBConversion(Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group, IfxEvadc_MsbConversionTime mode)
2719 {
2720 IFX_UNUSED_PARAMETER(group);
2721 evadcG->ANCFG.B.DCMSB = mode;
2722 }
2723
2724
2725 IFX_INLINE void IfxEvadc_selectFastCompareBoundaryFlagActivationMode(Ifx_EVADC_FC *evadcFC, IfxEvadc_BoundaryFlagActivationMode mode)
2726 {
2727 evadcFC->FCBFL.B.BFA = mode;
2728 }
2729
2730
2731 IFX_INLINE void IfxEvadc_selectFastCompareBoundaryFlagNodePointer(Ifx_EVADC_FC *evadcFC, IfxEvadc_BoundaryFlagNodePointer nodePointer)
2732 {
2733 evadcFC->FCBFL.B.BFLNP = nodePointer;
2734 }
2735
2736
2737 IFX_INLINE void IfxEvadc_setAnalogConvertControl(Ifx_EVADC_G *evadcG, IfxEvadc_AnalogConverterMode analogConverterMode)
2738 {
2739 evadcG->ARBCFG.B.ANONC = analogConverterMode;
2740 }
2741
2742
2743 IFX_INLINE void IfxEvadc_setAnalogInputPrechargeControlEMUX(Ifx_EVADC_G *evadcG, uint8 inputClassNum, IfxEvadc_AnalogInputPrechargeControl mode)
2744 {
2745 evadcG->ICLASS[inputClassNum].B.AIPE = mode;
2746 }
2747
2748
2749 IFX_INLINE void IfxEvadc_setAnalogInputPrechargeControlStandard(Ifx_EVADC_G *evadcG, uint8 inputClassNum, IfxEvadc_AnalogInputPrechargeControl mode)
2750 {
2751 evadcG->ICLASS[inputClassNum].B.AIPS = mode;
2752 }
2753
2754
2755 IFX_INLINE void IfxEvadc_setBoundaryMode(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, IfxEvadc_BoundaryExtension boundaryMode)
2756 {
2757 evadcG->CHCTR[channelIndex].B.BNDSELX = boundaryMode;
2758 }
2759
2760
2761 IFX_INLINE void IfxEvadc_setChannelEventNodePointer0(Ifx_EVADC_G *evadcG, IfxEvadc_SrcNr channelSrcNr, IfxEvadc_ChannelId channel)
2762 {
2763 evadcG->CEVNP0.U &= ~(IFX_EVADC_G_CEVNP0_CEV0NP_MSK << (channel * 4));
2764 evadcG->CEVNP0.U |= (channelSrcNr << (channel * 4));
2765 }
2766
2767
2768 IFX_INLINE void IfxEvadc_setChannelEventNodePointer1(Ifx_EVADC_G *evadcG, IfxEvadc_SrcNr channelSrcNr, IfxEvadc_ChannelId channel)
2769 {
2770 evadcG->CEVNP1.U &= ~(IFX_EVADC_G_CEVNP0_CEV1NP_MSK << (channel * 4));
2771 evadcG->CEVNP1.U |= (channelSrcNr << (channel * 4));
2772 }
2773
2774
2775 IFX_INLINE void IfxEvadc_setChannelInputClass(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, IfxEvadc_InputClasses inputClass)
2776 {
2777 evadcG->CHCTR[channelIndex].B.ICLSEL = inputClass;
2778 }
2779
2780
2781 IFX_INLINE void IfxEvadc_setChannelLimitCheckMode(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, IfxEvadc_LimitCheck limitCheck)
2782 {
2783 evadcG->CHCTR[channelIndex].B.CHEVMODE = limitCheck;
2784 }
2785
2786
2787 IFX_INLINE void IfxEvadc_setDataModificationMode(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelResult resultRegister, IfxEvadc_DataModificationMode mode)
2788 {
2789 evadcG->RCR[resultRegister].B.DMM = mode;
2790 }
2791
2792
2793 IFX_INLINE void IfxEvadc_setDataReductionControlMode(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelResult resultRegister, uint32 mode)
2794 {
2795 evadcG->RCR[resultRegister].B.DRCTR = mode;
2796 }
2797
2798
2799 IFX_INLINE void IfxEvadc_setEmuxGlobalConversionMode(Ifx_EVADC *evadc, uint8 inputClassNum, IfxEvadc_ChannelNoiseReduction conversionMode)
2800 {
2801 evadc->GLOB.ICLASS[inputClassNum].B.CME = conversionMode;
2802 }
2803
2804
2805 IFX_INLINE void IfxEvadc_setEmuxGlobalSampleTime(Ifx_EVADC *evadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
2806 {
2807 evadc->GLOB.ICLASS[inputClassNum].B.STCE = IfxEvadc_calculateSampleTime(analogFrequency, sampleTime);
2808 }
2809
2810
2811 IFX_INLINE void IfxEvadc_setEmuxGroupConversionMode(Ifx_EVADC_G *evadcG, uint8 inputClassNum, IfxEvadc_ChannelNoiseReduction conversionMode)
2812 {
2813 evadcG->ICLASS[inputClassNum].B.CME = conversionMode;
2814 }
2815
2816
2817 IFX_INLINE void IfxEvadc_setEmuxGroupSampletime(Ifx_EVADC_G *evadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
2818 {
2819 evadcG->ICLASS[inputClassNum].B.STCE = IfxEvadc_calculateSampleTime(analogFrequency, sampleTime);
2820 }
2821
2822
2823 IFX_INLINE void IfxEvadc_setEmuxInterfaceForGroup(Ifx_EVADC *evadc, IfxEvadc_EmuxInterface emuxInterface, IfxEvadc_GroupId group)
2824 {
2825 if (emuxInterface == IfxEvadc_EmuxInterface_0)
2826 {
2827 evadc->EMUXSEL.B.EMUXGRP0 = group;
2828 }
2829 else
2830 {
2831 evadc->EMUXSEL.B.EMUXGRP1 = group;
2832 }
2833 }
2834
2835
2836 IFX_INLINE void IfxEvadc_setFastCompareAnalogClockSynchronizationDelay(Ifx_EVADC_FC *evadcFC, IfxEvadc_FastCompareAnalogClockSynchronizationDelay delay)
2837 {
2838 Ifx_EVADC_FC_FCM tempFCM;
2839 tempFCM.U = evadcFC->FCM.U;
2840 tempFCM.B.FCMWC = 1; /*Enabling write permission to FCM.B.ACSD*/
2841 tempFCM.B.ACSD = delay;
2842 evadcFC->FCM.U = tempFCM.U;
2843 }
2844
2845
2846 IFX_INLINE void IfxEvadc_setFastCompareAnalogConverter(Ifx_EVADC_FC *evadcFC, IfxEvadc_FastCompareAnalogConverterControl mode)
2847 {
2848 Ifx_EVADC_FC_FCM tempFCM;
2849 tempFCM.U = evadcFC->FCM.U;
2850 tempFCM.B.FCMWC = 1; /*Enabling write permission to FCM.B.ANON*/
2851 tempFCM.B.ANON = mode;
2852 evadcFC->FCM.U = tempFCM.U;
2853 }
2854
2855
2856 IFX_INLINE void IfxEvadc_setFastCompareAnalogInputPrechargeControl(Ifx_EVADC_FC *evadcFC, IfxEvadc_AnalogInputPrechargeControl mode)
2857 {
2858 Ifx_EVADC_FC_FCCTRL tempFCCTRL;
2859 tempFCCTRL.U = evadcFC->FCCTRL.U;
2860 tempFCCTRL.B.CPWC = 1; /*Enabling write permission to FCCTRL.B.AIPF*/
2861 tempFCCTRL.B.AIPF = mode;
2862 evadcFC->FCCTRL.U = tempFCCTRL.U;
2863 }
2864
2865
2866 IFX_INLINE void IfxEvadc_setFastCompareAnalogInternalClockDivider(Ifx_EVADC_FC *evadcFC, IfxEvadc_ClockDividerFactor divider)
2867 {
2868 Ifx_EVADC_FC_FCCTRL tempFCCTRL;
2869 tempFCCTRL.U = evadcFC->FCCTRL.U;
2870 tempFCCTRL.B.CPWC = 1; /*Enabling write permission to FCCTRL.B.DIVA*/
2871 tempFCCTRL.B.DIVA = divider;
2872 evadcFC->FCCTRL.U = tempFCCTRL.U;
2873 }
2874
2875
2876 IFX_INLINE void IfxEvadc_setFastCompareAutomaticUpdateMode(Ifx_EVADC_FC *evadcFC, IfxEvadc_FastCompareAutomaticUpdate mode)
2877 {
2878 Ifx_EVADC_FC_FCM tempFCM;
2879 tempFCM.U = evadcFC->FCM.U;
2880 tempFCM.B.FCMWC = 1; /*Enabling write permission to FCM.B.AUE*/
2881 tempFCM.B.AUE = mode;
2882 evadcFC->FCM.U = tempFCM.U;
2883 }
2884
2885
2886 IFX_INLINE void IfxEvadc_setFastCompareChannelEventMode(Ifx_EVADC_FC *evadcFC, IfxEvadc_ChannelEventMode mode)
2887 {
2888 Ifx_EVADC_FC_FCCTRL tempFCCTRL;
2889 tempFCCTRL.U = evadcFC->FCCTRL.U;
2890 tempFCCTRL.B.CPWC = 1; /*Enabling write permission to FCCTRL.B.CHEVMODE*/
2891 tempFCCTRL.B.CHEVMODE = mode;
2892 evadcFC->FCCTRL.U = tempFCCTRL.U;
2893 }
2894
2895
2896 IFX_INLINE void IfxEvadc_setFastCompareExternalTriggerPolarity(Ifx_EVADC_FC *evadcFC, IfxEvadc_ExternalTriggerPolarity mode)
2897 {
2898 Ifx_EVADC_FC_FCCTRL tempFCCTRL;
2899 tempFCCTRL.U = evadcFC->FCCTRL.U;
2900 tempFCCTRL.B.XTWC = 1; /*Enabling write permission to FCCTRL.B.XTPOL*/
2901 tempFCCTRL.B.XTPOL = mode;
2902 evadcFC->FCCTRL.U = tempFCCTRL.U;
2903 }
2904
2905
2906 IFX_INLINE void IfxEvadc_setFastCompareGateOperatingMode(Ifx_EVADC_FC *evadcFC, IfxEvadc_GateOperatingMode mode)
2907 {
2908 Ifx_EVADC_FC_FCCTRL tempFCCTRL;
2909 tempFCCTRL.U = evadcFC->FCCTRL.U;
2910 tempFCCTRL.B.XTWC = 1; /*Enabling write permission to FCCTRL.B.GTMODE*/
2911 tempFCCTRL.B.GTMODE = mode;
2912 evadcFC->FCCTRL.U = tempFCCTRL.U;
2913 }
2914
2915
2916 IFX_INLINE void IfxEvadc_setFastCompareRampDirection(Ifx_EVADC_FC *evadcFC, IfxEvadc_RampDirection rampDirection)
2917 {
2918 Ifx_EVADC_FC_FCM tempFCM;
2919 tempFCM.U = evadcFC->FCM.U;
2920 tempFCM.B.FCMWC = 1; /*Enabling write permission to FCM.B.FCRDIR*/
2921 tempFCM.B.FCRDIR = rampDirection;
2922 evadcFC->FCM.U = tempFCM.U;
2923 }
2924
2925
2926 IFX_INLINE void IfxEvadc_setFastCompareReferenceValue(Ifx_EVADC_FC *evadcFC, uint16 referenceValue)
2927 {
2928 if (evadcFC->FCM.B.AUE == IfxEvadc_FastCompareAutomaticUpdate_sw)
2929 {
2930 evadcFC->FCM.B.FCREF = referenceValue;
2931 }
2932 else
2933 {
2934 IFX_ASSERT(IFX_VERBOSE_LEVEL_WARNING, evadcFC->FCM.B.AUE == IfxEvadc_FastCompareAutomaticUpdate_sw); /* Writing into FCM.B.FCREF requires FCM.B.AUE = 0 */
2935 }
2936 }
2937
2938
2939 IFX_INLINE void IfxEvadc_setFastCompareRunControl(Ifx_EVADC_FC *evadcFC, IfxEvadc_FastCompareRunControl mode)
2940 {
2941 Ifx_EVADC_FC_FCM tempFCM;
2942 tempFCM.U = evadcFC->FCM.U;
2943 tempFCM.B.FCMWC = 1; /*Enabling write permission to FCM.B.RUNCOMP*/
2944 tempFCM.B.RUNCOMP = mode;
2945 evadcFC->FCM.U = tempFCM.U;
2946 }
2947
2948
2949 IFX_INLINE void IfxEvadc_setFastCompareRunRampControl(Ifx_EVADC_FC *evadcFC, IfxEvadc_RampRunControl rampStartMode)
2950 {
2951 Ifx_EVADC_FC_FCM tempFCM;
2952 tempFCM.U = evadcFC->FCM.U;
2953 tempFCM.B.FCMWC = 1; /*Enabling write permission to FCM.B.RUNRAMP*/
2954 tempFCM.B.RUNRAMP = rampStartMode;
2955 evadcFC->FCM.U = tempFCM.U;
2956 }
2957
2958
2959 IFX_INLINE void IfxEvadc_setFastCompareSampleTimeControl(Ifx_EVADC_FC *evadcFC, uint8 additionalCycles)
2960 {
2961 uint32 stcf = 0;
2962
2963 if (additionalCycles > 15)
2964 {
2965 /*
2966 *
2967 * Allowed values for additional clock cycles are as follows:
2968 *
2969 * Additional Clock Cycles = FCCTRL.B.STCF ; STCF < 16
2970 * Additional Clock Cycles = (FCCTRL.B.STCF - 15) * 16; STCF>=16
2971 */
2972
2973 IFX_ASSERT(IFX_VERBOSE_LEVEL_WARNING, (additionalCycles % 16 == 0));
2974 }
2975
2976 if (additionalCycles > 15)
2977 {
2978 stcf = (additionalCycles >> 4) + 15;
2979 }
2980 else
2981 {
2982 stcf = additionalCycles;
2983 }
2984
2985 Ifx_EVADC_FC_FCCTRL tempFCCTRL;
2986 tempFCCTRL.U = evadcFC->FCCTRL.U;
2987 tempFCCTRL.B.CPWC = 1; /*Enabling write permission to FCCTRL.B.STFC*/
2988 tempFCCTRL.B.STCF = stcf;
2989 evadcFC->FCCTRL.U = tempFCCTRL.U;
2990 }
2991
2992
2993 IFX_INLINE void IfxEvadc_setFastCompareServiceRequestGeneration(Ifx_EVADC_FC *evadcFC, IfxEvadc_FastCompareServiceRequestGeneration mode)
2994 {
2995 Ifx_EVADC_FC_FCM tempFCM;
2996 tempFCM.U = evadcFC->FCM.U;
2997 tempFCM.B.FCMWC = 1; /*Enabling write permission to FCM.B.SRG*/
2998 tempFCM.B.SRG = mode;
2999 evadcFC->FCM.U = tempFCM.U;
3000 }
3001
3002
3003 IFX_INLINE void IfxEvadc_setFastCompareTriggerInterval(Ifx_EVADC_FC *evadcFC, uint8 interval)
3004 {
3005 Ifx_EVADC_FC_FCM tempFCM;
3006 tempFCM.U = evadcFC->FCM.U;
3007 tempFCM.B.FCMWC = 1; /*Enabling write permission to FCM.B.FCTRIV*/
3008 tempFCM.B.FCTRIV = interval;
3009 evadcFC->FCM.U = tempFCM.U;
3010 }
3011
3012
3013 IFX_INLINE void IfxEvadc_setFastCompareTriggerOperatingMode(Ifx_EVADC_FC *evadcFC, IfxEvadc_TriggerOperatingMode mode)
3014 {
3015 Ifx_EVADC_FC_FCCTRL tempFCCTRL;
3016 tempFCCTRL.U = evadcFC->FCCTRL.U;
3017 tempFCCTRL.B.XTWC = 1; /*Enabling write permission to FCCTRL.B.XTMODE*/
3018 tempFCCTRL.B.XTMODE = mode;
3019 evadcFC->FCCTRL.U = tempFCCTRL.U;
3020 }
3021
3022
3023 IFX_INLINE void IfxEvadc_setFifoMode(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelResult resultRegister, IfxEvadc_FifoMode mode)
3024 {
3025 evadcG->RCR[resultRegister].B.FEN = mode;
3026 }
3027
3028
3029 IFX_INLINE void IfxEvadc_setGlobalConversionMode(Ifx_EVADC *evadc, uint8 InputClassNum, IfxEvadc_ChannelNoiseReduction conversionMode)
3030 {
3031 evadc->GLOB.ICLASS[InputClassNum].B.CMS = conversionMode;
3032 }
3033
3034
3035 IFX_INLINE void IfxEvadc_setGlobalSampleTime(Ifx_EVADC *evadc, uint8 groupInputClassNum, float32 analogFrequency, float32 sampleTime)
3036 {
3037 evadc->GLOB.ICLASS[groupInputClassNum].B.STCS = IfxEvadc_calculateSampleTime(analogFrequency, sampleTime);
3038 }
3039
3040
3041 IFX_INLINE void IfxEvadc_setGroupConversionMode(Ifx_EVADC_G *evadcG, uint8 inputClassNum, IfxEvadc_ChannelNoiseReduction conversionMode)
3042 {
3043 evadcG->ICLASS[inputClassNum].B.CMS = conversionMode;
3044 }
3045
3046
3047 IFX_INLINE void IfxEvadc_setGroupConversionModeEMUX(Ifx_EVADC_G *evadcG, uint8 inputClassNum, IfxEvadc_ChannelNoiseReductionEMUX conversionMode)
3048 {
3049 evadcG->ICLASS[inputClassNum].B.CME = conversionMode;
3050 }
3051
3052
3053 IFX_INLINE void IfxEvadc_setGroupSampleTime(Ifx_EVADC_G *evadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
3054 {
3055 evadcG->ICLASS[inputClassNum].B.STCS = IfxEvadc_calculateSampleTime(analogFrequency, sampleTime);
3056 }
3057
3058
3059 IFX_INLINE void IfxEvadc_setGroupSampleTimeEMUX(Ifx_EVADC_G *evadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
3060 {
3061 evadcG->ICLASS[inputClassNum].B.STCE = IfxEvadc_calculateSampleTime(analogFrequency, sampleTime);
3062 }
3063
3064
3065 IFX_INLINE void IfxEvadc_setLowerBoundary(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, IfxEvadc_BoundarySelection lowerBoundary)
3066 {
3067 evadcG->CHCTR[channelIndex].B.BNDSELL = lowerBoundary;
3068 }
3069
3070
3071 IFX_INLINE void IfxEvadc_setMasterIndex(Ifx_EVADC_G *evadcG, uint8 masterIndex)
3072 {
3073 evadcG->SYNCTR.B.STSEL = masterIndex;
3074 evadcG->SYNCTR.U |= (0x00000008U << masterIndex);
3075 }
3076
3077
3078 IFX_INLINE void IfxEvadc_setReferenceInput(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, IfxEvadc_ChannelReference reference)
3079 {
3080 evadcG->CHCTR[channelIndex].B.REFSEL = reference;
3081 }
3082
3083
3084 IFX_INLINE void IfxEvadc_setResultNodeEventPointer0(Ifx_EVADC_G *evadcG, IfxEvadc_SrcNr resultSrcNr, IfxEvadc_ChannelResult resultRegister)
3085 {
3086 evadcG->REVNP0.U &= ~(IFX_EVADC_GLOB_EVNP_REV0NP_MSK << (resultRegister * 4));
3087 evadcG->REVNP0.U |= (resultSrcNr << (resultRegister * 4));
3088 }
3089
3090
3091 IFX_INLINE void IfxEvadc_setResultNodeEventPointer1(Ifx_EVADC_G *evadcG, IfxEvadc_SrcNr resultSrcNr, IfxEvadc_ChannelResult resultRegister)
3092 {
3093 evadcG->REVNP1.U &= ~(IFX_EVADC_G_REVNP1_REV8NP_MSK << ((resultRegister - IfxEvadc_ChannelResult_8) * 4));
3094 evadcG->REVNP1.U |= (resultSrcNr << ((resultRegister - IfxEvadc_ChannelResult_8) * 4));
3095 }
3096
3097
3098 IFX_INLINE void IfxEvadc_setResultPosition(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, boolean rightAlignedStorage)
3099 {
3100 evadcG->CHCTR[channelIndex].B.RESPOS = rightAlignedStorage;
3101 }
3102
3103
3104 IFX_INLINE void IfxEvadc_setSleepMode(Ifx_EVADC *evadc, IfxEvadc_SleepMode mode)
3105 {
3106 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
3107 IfxScuWdt_clearCpuEndinit(passwd);
3108 evadc->CLC.B.EDIS = mode;
3109 IfxScuWdt_setCpuEndinit(passwd);
3110 }
3111
3112
3113 IFX_INLINE void IfxEvadc_setSuspendMode(Ifx_EVADC *evadc, IfxEvadc_SuspendMode mode)
3114 {
3115 Ifx_EVADC_OCS ocs;
3116
3117 // remove protection and configure the suspend mode.
3118 ocs.B.SUS_P = 1;
3119 ocs.B.SUS = mode;
3120 evadc->OCS.U = ocs.U;
3121 }
3122
3123
3124 IFX_INLINE void IfxEvadc_setSyncRequest(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, boolean synchonize)
3125 {
3126 evadcG->CHCTR[channelIndex].B.SYNC = synchonize;
3127 }
3128
3129
3130 IFX_INLINE void IfxEvadc_setUpperBoundary(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, IfxEvadc_BoundarySelection upperBoundary)
3131 {
3132 evadcG->CHCTR[channelIndex].B.BNDSELU = upperBoundary;
3133 }
3134
3135
3136 IFX_INLINE void IfxEvadc_spreadEarlySamplePointEMUXConversions(Ifx_EVADC_G *evadcG, uint8 inputClassNum, IfxEvadc_SpreadEarlySamplePointEMUXConversionsMode mode)
3137 {
3138 evadcG->ICLASS[inputClassNum].B.SESPE = mode;
3139 }
3140
3141
3142 IFX_INLINE void IfxEvadc_spreadEarlySamplePointStandardConversions(Ifx_EVADC_G *evadcG, uint8 inputClassNum, IfxEvadc_SpreadEarlySamplePointStandardConversionsMode mode)
3143 {
3144 evadcG->ICLASS[inputClassNum].B.SESPS = mode;
3145 }
3146
3147
3148 IFX_INLINE void IfxEvadc_startQueue(Ifx_EVADC_G *group, IfxEvadc_RequestSource sourceType)
3149 {
3150 switch (sourceType)
3151 {
3152 case IfxEvadc_RequestSource_queue0:
3153 group->Q[0].QMR.B.TREV = 1;
3154 break;
3155 case IfxEvadc_RequestSource_queue1:
3156 group->Q[1].QMR.B.TREV = 1;
3157 break;
3158 case IfxEvadc_RequestSource_queue2:
3159 group->Q[2].QMR.B.TREV = 1;
3160 break;
3161 }
3162 }
3163
3164
3165 IFX_INLINE void IfxEvadc_storeGroupResult(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, IfxEvadc_ChannelResult resultRegister)
3166 {
3167 evadcG->CHCTR[channelIndex].B.RESREG = resultRegister;
3168 }
3169
3170
3171 IFX_INLINE void IfxEvadc_disableReferencePrecharge(Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group)
3172 {
3173 IFX_UNUSED_PARAMETER(group);
3174 evadcG->ANCFG.B.RPE = 0;
3175 }
3176
3177
3178 IFX_INLINE void IfxEvadc_disableInputBuffer(Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group)
3179 {
3180 IFX_UNUSED_PARAMETER(group);
3181 evadcG->ANCFG.B.BE = 0;
3182 }
3183
3184
3185 IFX_INLINE boolean IfxEvadc_isModuleEnabled(Ifx_EVADC *evadc)
3186 {
3187 return evadc->CLC.B.DISS == 0;
3188 }
3189
3190
3191 IFX_INLINE void IfxEvadc_enableStartupCalibration(Ifx_EVADC *evadc)
3192 {
3193 evadc->GLOBCFG.B.SUCAL = 0x1U;
3194 }
3195
3196
3197 IFX_INLINE void IfxEvadc_selectQueueGatingMode(Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource queue, IfxEvadc_GatingMode gatingMode)
3198 {
3199 switch (queue)
3200 {
3201 case IfxEvadc_RequestSource_queue0:
3202 evadcG->Q[0].QMR.B.ENGT = gatingMode;
3203 break;
3204 case IfxEvadc_RequestSource_queue1:
3205 evadcG->Q[1].QMR.B.ENGT = gatingMode;
3206 break;
3207 case IfxEvadc_RequestSource_queue2:
3208 evadcG->Q[2].QMR.B.ENGT = gatingMode;
3209 break;
3210 }
3211 }
3212
3213
3214 IFX_INLINE void IfxEvadc_setChannelRequest(Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource queue, IfxEvadc_ChannelId channel)
3215 {
3216 switch (queue)
3217 {
3218 case IfxEvadc_RequestSource_queue0:
3219 evadcG->Q[0].QINR.B.REQCHNR = channel;
3220 break;
3221 case IfxEvadc_RequestSource_queue1:
3222 evadcG->Q[1].QINR.B.REQCHNR = channel;
3223 break;
3224 case IfxEvadc_RequestSource_queue2:
3225 evadcG->Q[2].QINR.B.REQCHNR = channel;
3226 break;
3227 }
3228 }
3229
3230
3231 IFX_INLINE void IfxEvadc_configureIclass(Ifx_EVADC_G *evadcG, uint8 inputClassNum, uint32 value)
3232 {
3233 evadcG->ICLASS[inputClassNum].U = value;
3234 }
3235
3236
3237 IFX_INLINE volatile uint32 *IfxEvadc_getResultRegisterAddress(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channel)
3238 {
3239 return (volatile uint32 *)&(evadcG->RES[channel].U);
3240 }
3241
3242
3243 #endif /* IFXEVADC_H */
IfxEvadc_ClockDividerFactor_31
Frequency Divided by 31.
Definition: IfxEvadc.h:596
IfxEvadc_selectDoubleClockForMSBConversion
IFX_INLINE void IfxEvadc_selectDoubleClockForMSBConversion(Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group, IfxEvadc_MsbConversionTime mode)
Selects an additional clock cycle for the conversion step of the MSB.
Definition: IfxEvadc.h:2718
IfxEvadc_getQueueSlotPriority
IFX_EXTERN IfxEvadc_RequestSlotPriority IfxEvadc_getQueueSlotPriority(Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Gets the request queue slot priority.
Definition: IfxEvadc.c:235
IfxEvadc_ChannelId_2
Channel 2.
Definition: IfxEvadc.h:143
IfxEvadc_Protection_externalMultiplexer
Access control for EMUXSEL, GxEMUXCTR.
Definition: IfxEvadc.h:394
IfxEvadc_setEmuxGroupSampletime
IFX_INLINE void IfxEvadc_setEmuxGroupSampletime(Ifx_EVADC_G *evadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
Sets the ADC input class sample time for external channel.
Definition: IfxEvadc.h:2817
IfxEvadc_RampRunControl_stop
Stop, no operation.
Definition: IfxEvadc.h:676
IfxEvadc_DataReductionControlMode_0
If DMM=0b00, Data reduction disabled,if DMM=0b01, FIR:a=2,b=1,c=0.
Definition: IfxEvadc.h:779
IfxEvadc_ChannelNoiseReductionEMUX_level2
Noise reduction conversion level 2, 3 additional conversion steps.
Definition: IfxEvadc.h:764
IfxEvadc_ChannelNoiseReduction_level3
Noise reduction conversion level 3.
Definition: IfxEvadc.h:755
IfxEvadc_Protection_serviceGroup7
Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
Definition: IfxEvadc.h:354
IfxEvadc_ChannelNoiseReduction_level2
Noise reduction conversion level 2.
Definition: IfxEvadc.h:754
IfxEvadc_DataReductionControlMode_12
If DMM=0b00, Accumulate 13 result values,if DMM=0b01, FIR:a=1,b=1,c=2.
Definition: IfxEvadc.h:791
IfxEvadc_FastCompareRunControl_alwaysRun
Always run.
Definition: IfxEvadc.h:642
IfxEvadc_GatingSource_15
Input signal REQGTx_15.
Definition: IfxEvadc.h:290
IfxEvadc_BoundaryExtension_fastCompareResult1
Fast compare mode use as upper boundary Channel result 1.
Definition: IfxEvadc.h:109
IfxEvadc_configureWaitForReadMode
IFX_INLINE void IfxEvadc_configureWaitForReadMode(Ifx_EVADC_G *group, uint32 resultIdx, boolean enabled)
access function to enable/disable wait for read mode for result registers
Definition: IfxEvadc.h:2255
IfxEvadc_AnalogConverterMode_off
Analog Converter off.
Definition: IfxEvadc.h:88
IfxEvadc_isFastCompareNewResultAvailable
IFX_INLINE boolean IfxEvadc_isFastCompareNewResultAvailable(Ifx_EVADC_FC *evadcFC)
Indicates availability of a new result in bit FCM.B.FCR.
Definition: IfxEvadc.h:2662
IfxEvadc_AnalogConverterMode_slowStandby
Slow Standby Mode.
Definition: IfxEvadc.h:89
IfxEvadc_setReferenceInput
IFX_INLINE void IfxEvadc_setReferenceInput(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, IfxEvadc_ChannelReference reference)
Selects the refernce input.
Definition: IfxEvadc.h:3078
IfxEvadc_ChannelNoiseReductionEMUX_level1
Noise reduction conversion level 1, 1 additional conversion step.
Definition: IfxEvadc.h:763
IfxEvadc_ClockDividerFactor_29
Frequency Divided by 29.
Definition: IfxEvadc.h:594
IfxEvadc_LimitCheck_eventIfInArea
Normal compare mode Event If result is inside the boundary band Fast Compare mode Event If result swi...
Definition: IfxEvadc.h:308
IfxEvadc_BoundaryFlagSwControl
IfxEvadc_BoundaryFlagSwControl
Options for FCBFL.B.BFS to modify the Boundary Flag(FCM.B.BFL)
Definition: IfxEvadc.h:542
IfxEvadc_EmuxSelectValue_0
Start Selection Value 0.
Definition: IfxEvadc.h:230
IfxEvadc_getQueueSlotTriggerInput
IFX_EXTERN IfxEvadc_TriggerSource IfxEvadc_getQueueSlotTriggerInput(Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Gets the requested queue slot trigger input.
Definition: IfxEvadc.c:277
IfxEvadc_InputClasses_group0
Use group class 0.
Definition: IfxEvadc.h:297
IfxEvadc_BoundaryFlagNodePointer_commonBoundaryFlagOutput2
Select common boundary flag output 2.
Definition: IfxEvadc.h:531
IfxEvadc_setGroupConversionModeEMUX
IFX_INLINE void IfxEvadc_setGroupConversionModeEMUX(Ifx_EVADC_G *evadcG, uint8 inputClassNum, IfxEvadc_ChannelNoiseReductionEMUX conversionMode)
Definition: IfxEvadc.h:3047
IfxScuCcu_getSpbFrequency
float32 IfxScuCcu_getSpbFrequency(void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider...
Definition: IfxScuCcu.c:479
IfxEvadc_TriggerSource_8
Input signal REQTRx_8.
Definition: IfxEvadc.h:493
IfxEvadc_setReferencePrechargeDuration
IFX_INLINE void IfxEvadc_setReferencePrechargeDuration(Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group, IfxEvadc_ReferencePrechargeControl duration)
Definition: IfxEvadc.h:2691
IfxEvadc_Protection_channelControl6
Access control for GxCHCTR6.
Definition: IfxEvadc.h:323
IfxEvadc_ArbitrationMode_0
Definition: IfxEvadc.h:735
IfxEvadc_ClockDividerFactor
IfxEvadc_ClockDividerFactor
Defines the frequency of the analog converter clock f_ADCI (base clock for conversion steps)...
Definition: IfxEvadc.h:564
IfxEvadc_getAdcAnalogFrequency
IFX_INLINE float32 IfxEvadc_getAdcAnalogFrequency(Ifx_EVADC_G *group)
Returns the configured Fadci EVADC analog clock frequency in Hz.
Definition: IfxEvadc.h:2356
IfxEvadc_BoundaryExtension_fastCompareResult8
Fast compare mode use as upper boundary Channel result 8.
Definition: IfxEvadc.h:116
IfxEvadc_ChannelResult_6
Use Channel result 6.
Definition: IfxEvadc.h:177
IfxEvadc_MsbConversionTime
IfxEvadc_MsbConversionTime
Selects the MSB conversion time(in terms of t_ADC)
Definition: IfxEvadc.h:807
IfxEvadc_GatingMode_gatingLow
Conversion request is issued if at least 1 conversion pending bit is set and the gating signal is low...
Definition: IfxEvadc.h:268
IfxEvadc_Protection_resultRegisterGroup12
Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
Definition: IfxEvadc.h:374
IfxEvadc_selectFastCompareBoundaryFlagActivationMode
IFX_INLINE void IfxEvadc_selectFastCompareBoundaryFlagActivationMode(Ifx_EVADC_FC *evadcFC, IfxEvadc_BoundaryFlagActivationMode mode)
Selects behaviour of Boundary Flag(BFL) wih respect to the value of FCR.
Definition: IfxEvadc.h:2725
IfxEvadc_AnalogClockSynchronizationDelay_1
1 clock cycle delay
Definition: IfxEvadc.h:714
IfxEvadc_Protection_resultRegisterGroup14
Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
Definition: IfxEvadc.h:376
IfxEvadc_BoundaryFlagNodePointer_commonBoundaryFlagOutput3
Select common boundary flag output 3.
Definition: IfxEvadc.h:532
IfxEvadc_FastCompareAutomaticUpdate_sw
No automatic update.Value(s) written by software.
Definition: IfxEvadc.h:630
IfxEvadc_initGxBflPin
IFX_INLINE void IfxEvadc_initGxBflPin(const IfxEvadc_GxBfl_Out *gxBfl, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a GxBFL output.
Definition: IfxEvadc.h:2635
IfxEvadc_setFastCompareReferencePrechargeDuration
IFX_INLINE void IfxEvadc_setFastCompareReferencePrechargeDuration(Ifx_EVADC_FC *evadcFC, IfxEvadc_ReferencePrechargeControl duration)
Setting the Reference Precharge Control for Fast Compare Channels in FCCTRL.B.RPC.
Definition: IfxEvadc.h:2346
IfxEvadc_Protection_serviceGroup12
Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
Definition: IfxEvadc.h:359
IfxEvadc_setUpperBoundary
IFX_INLINE void IfxEvadc_setUpperBoundary(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, IfxEvadc_BoundarySelection upperBoundary)
Sets group&#39;s upper boundary.
Definition: IfxEvadc.h:3130
IfxEvadc_ChannelSelectionStyle
IfxEvadc_ChannelSelectionStyle
External Multiplexer Channel Selection Style as defined in Ifx_EVADC.G[x].EMUXCTR.B.EMXCSS.
Definition: IfxEvadc.h:192
IfxEvadc_setChannelLimitCheckMode
IFX_INLINE void IfxEvadc_setChannelLimitCheckMode(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, IfxEvadc_LimitCheck limitCheck)
Sets the channel event mode.
Definition: IfxEvadc.h:2781
IfxEvadc_DataReductionControlMode_1
If DMM=0b00, Accumulate 2 result values,if DMM=0b01, FIR:a=1,b=2,c=0.
Definition: IfxEvadc.h:780
IfxEvadc_ExternalMultiplexerMode_singleStep
Select single step mode.
Definition: IfxEvadc.h:247
IfxEvadc_RequestSlotPriority_high
High priority.
Definition: IfxEvadc.h:404
IfxEvadc_setDataModificationMode
IFX_INLINE void IfxEvadc_setDataModificationMode(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelResult resultRegister, IfxEvadc_DataModificationMode mode)
Definition: IfxEvadc.h:2787
IfxEvadc_DataReductionControlMode_2
If DMM=0b00, Accumulate 3 result values,if DMM=0b01, FIR:a=2,b=0,c=1.
Definition: IfxEvadc.h:781
IfxEvadc_ChannelId_3
Channel 3.
Definition: IfxEvadc.h:144
IfxEvadc_EmuxSampleTimeControl_always
Use STCE for each conversion of an external channel.
Definition: IfxEvadc.h:222
IfxEvadc_DataReductionControlMode_15
If DMM=0b00, Accumulate 16 result values,if DMM=0b01, IIR:a=3,b=4.
Definition: IfxEvadc.h:794
IfxEvadc_ClockDividerFactor_30
Frequency Divided by 30.
Definition: IfxEvadc.h:595
IfxEvadc_WaitForRead
IfxEvadc_WaitForRead
Wait-for-Read Mode Enable.
Definition: IfxEvadc.h:859
IfxEvadc_RampRunControl_2
Start upon the selected trigger event of signal REQTRx.
Definition: IfxEvadc.h:678
IfxScuCcu_getAdcFrequency
IFX_INLINE float32 IfxScuCcu_getAdcFrequency(void)
API to get Adc (EVADC, EDSADC) frequency. This API returns the based on the divider value in CCUCON r...
Definition: IfxScuCcu.h:1564
IfxEvadc_AnalogClockSynchronizationDelay_2
2 clock cycles delay
Definition: IfxEvadc.h:715
IfxEvadc_SuspendMode_soft
Soft Suspend.
Definition: IfxEvadc.h:468
IfxEvadc_EmuxSelectValue_5
Start Selection Value 5.
Definition: IfxEvadc.h:235
IfxEvadc_getChannelServiceRequestNodePointer0
IFX_INLINE Ifx_EVADC_G_CEVNP0 IfxEvadc_getChannelServiceRequestNodePointer0(Ifx_EVADC_G *evadcG)
Gets the channel service request node pointer.
Definition: IfxEvadc.h:2412
IfxEvadc_FastCompareAnalogConverterControl_normal
Normal operation.
Definition: IfxEvadc.h:621
IfxEvadc_BoundaryFlagNodePointer_commonBoundaryFlagOutput1
Select common boundary flag output 1.
Definition: IfxEvadc.h:530
IfxEvadc_getGlobalConversionMode
IFX_INLINE IfxEvadc_ChannelNoiseReduction IfxEvadc_getGlobalConversionMode(Ifx_EVADC *evadc, uint8 inputClassNum)
get the ADC Module noise reduction level
Definition: IfxEvadc.h:2511
IfxEvadc_WaitForRead_overwriteMode
Overwrite Mode.
Definition: IfxEvadc.h:861
IfxEvadc_Protection_initGroup5
Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
Definition: IfxEvadc.h:337
IfxEvadc_EmuxInterface_1
Emux Interface 1.
Definition: IfxEvadc.h:213
IfxEvadc_TriggerMode_uponRisingEdge
Trigger event upon a rising edge.
Definition: IfxEvadc.h:477
IfxEvadc_setFastCompareAnalogClockSynchronizationDelay
IFX_INLINE void IfxEvadc_setFastCompareAnalogClockSynchronizationDelay(Ifx_EVADC_FC *evadcFC, IfxEvadc_FastCompareAnalogClockSynchronizationDelay delay)
Sets the delay of the analog clock(in clock cycles) after the sync signal.
Definition: IfxEvadc.h:2836
IfxEvadc_EmuxSelectValue
IfxEvadc_EmuxSelectValue
specifies the External Channel Start select value defined in Ifx_EVADC.G[x].EMUXCTR.B.EMUXSET
Definition: IfxEvadc.h:228
IfxEvadc_setEmuxGlobalConversionMode
IFX_INLINE void IfxEvadc_setEmuxGlobalConversionMode(Ifx_EVADC *evadc, uint8 inputClassNum, IfxEvadc_ChannelNoiseReduction conversionMode)
set the external conversion mode of Global class
Definition: IfxEvadc.h:2799
IfxEvadc_DataReductionControlMode_6
If DMM=0b00, Accumulate 7 result values,if DMM=0b01, FIR:a=2,b=2,c=0.
Definition: IfxEvadc.h:785
IfxEvadc_Protection_channelControl3
Access control for GxCHCTR3.
Definition: IfxEvadc.h:320
IfxEvadc_Protection_initFastCompareChannel5
Access control for GyFCBFL, GyFCHYST, GyFCCTR, GyFCM, GyFCRAMP.
Definition: IfxEvadc.h:387
IfxEvadc_getSrcAddress
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEvadc_getSrcAddress(IfxEvadc_GroupId group, IfxEvadc_SrcNr index)
Gives the SRC source address.
Definition: IfxEvadc.h:2587
IfxEvadc_Protection_initGroup9
Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
Definition: IfxEvadc.h:341
IfxEvadc_Status_noError
No error during api execution.
Definition: IfxEvadc.h:453
IfxEvadc_Protection_resultRegisterGroup2
Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
Definition: IfxEvadc.h:364
IfxEvadc_setFastCompareTriggerOperatingMode
IFX_INLINE void IfxEvadc_setFastCompareTriggerOperatingMode(Ifx_EVADC_FC *evadcFC, IfxEvadc_TriggerOperatingMode mode)
Definition: IfxEvadc.h:3013
IfxEvadc_FifoMode_fifoStructure
Part of FIFO structure: copy each new valid result.
Definition: IfxEvadc.h:256
IfxEvadc_Protection_initGroup0
Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
Definition: IfxEvadc.h:332
IfxEvadc_TriggerSource_4
Input signal REQTRx_4.
Definition: IfxEvadc.h:489
IfxEvadc_syncConvWorkAround
IFX_EXTERN boolean IfxEvadc_syncConvWorkAround(Ifx_EVADC *evadc)
SW workaround of EVADC Master/Slave conversion jitter issue(MCMETILLD-910)
Definition: IfxEvadc.c:638
IfxEvadc_Protection_channelControl14
Access control for GxCHCTR14.
Definition: IfxEvadc.h:331
IfxEvadc_setBoundaryMode
IFX_INLINE void IfxEvadc_setBoundaryMode(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, IfxEvadc_BoundaryExtension boundaryMode)
Selects boundary extension.
Definition: IfxEvadc.h:2755
IfxEvadc_GatingSource_0
Input signal REQGTx_0.
Definition: IfxEvadc.h:275
IfxEvadc_RequestSlotPriority_highest
Highest priority.
Definition: IfxEvadc.h:405
IfxEvadc_Protection_initGroup13
Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
Definition: IfxEvadc.h:345
IfxEvadc_disableAccess
IFX_EXTERN void IfxEvadc_disableAccess(Ifx_EVADC *evadc, IfxEvadc_Protection protectionSet)
Disable write access to the EVADC config/control registers.
Definition: IfxEvadc.c:91
IfxEvadc_ExternalTriggerPolarity_direct
Use selected input signal directly.
Definition: IfxEvadc.h:604
IfxEvadc_ClockDividerFactor_8
Frequency Divided by 8.
Definition: IfxEvadc.h:573
IfxEvadc_setEmuxGroupConversionMode
IFX_INLINE void IfxEvadc_setEmuxGroupConversionMode(Ifx_EVADC_G *evadcG, uint8 inputClassNum, IfxEvadc_ChannelNoiseReduction conversionMode)
set the external channel conversion mode of ADC input class
Definition: IfxEvadc.h:2811
IfxEvadc_PinMap.h
EVADC I/O map.
IfxEvadc_disableQueueSlotExternalTrigger
IFX_EXTERN void IfxEvadc_disableQueueSlotExternalTrigger(Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Disables the external trigger.
Definition: IfxEvadc.c:113
IfxEvadc_ChannelReference
IfxEvadc_ChannelReference
ADC channel reference defined in MODULE_EVADC.G[x].CHCTR[y].B.REFSEL(x=0,1,...,11;y=0,1....,16)
Definition: IfxEvadc.h:161
IfxEvadc_ChannelId_6
Channel 6.
Definition: IfxEvadc.h:147
IfxEvadc_SrcNr_shared3
Select shared service request line 3.
Definition: IfxEvadc.h:445
IfxEvadc_setFastCompareReferenceValue
IFX_INLINE void IfxEvadc_setFastCompareReferenceValue(Ifx_EVADC_FC *evadcFC, uint16 referenceValue)
Definition: IfxEvadc.h:2926
IfxEvadc_TriggerOperatingMode_noExternalTrigger
No external trigger.
Definition: IfxEvadc.h:695
IfxEvadc_getMasterIndex
IFX_INLINE uint8 IfxEvadc_getMasterIndex(Ifx_EVADC_G *evadcG)
Gets the configured master index.
Definition: IfxEvadc.h:2570
IfxEvadc_selectFastCompareBoundaryFlagNodePointer
IFX_INLINE void IfxEvadc_selectFastCompareBoundaryFlagNodePointer(Ifx_EVADC_FC *evadcFC, IfxEvadc_BoundaryFlagNodePointer nodePointer)
Definition: IfxEvadc.h:2731
IfxEvadc_Protection_resultRegisterGroup7
Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
Definition: IfxEvadc.h:369
IfxEvadc_BoundaryExtension_standard
Boundary Standard mode. BNDSELU/BNDSELL as Boundaries.
Definition: IfxEvadc.h:108
IfxEvadc_BoundaryExtension_fastCompareResult15
Fast compare mode use as upper boundary Channel result 15.
Definition: IfxEvadc.h:123
IfxEvadc_SupplyVoltageLevelControl_upperVoltage
Upper voltage range: assume a 5 V power supply is connected.
Definition: IfxEvadc.h:853
IfxEvadc_RequestSource
IfxEvadc_RequestSource
Request sources.
Definition: IfxEvadc.h:418
IfxEvadc_setFastCompareExternalTriggerPolarity
IFX_INLINE void IfxEvadc_setFastCompareExternalTriggerPolarity(Ifx_EVADC_FC *evadcFC, IfxEvadc_ExternalTriggerPolarity mode)
Set external trigger polarity in FCCTRL.B.XTPOL.
Definition: IfxEvadc.h:2896
IfxEvadc_FastCompareServiceRequestGeneration_off
No service requests are generated.
Definition: IfxEvadc.h:649
IfxEvadc_getGroupConversionMode
IFX_INLINE IfxEvadc_ChannelNoiseReduction IfxEvadc_getGroupConversionMode(Ifx_EVADC_G *evadcG, uint8 inputClassNum)
Gets the EVADC input class channel conversion mode.
Definition: IfxEvadc.h:2540
IfxEvadc_setGroupSampleTimeEMUX
IFX_INLINE void IfxEvadc_setGroupSampleTimeEMUX(Ifx_EVADC_G *evadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
Set the additional number of cycles(in addition to 2) in sample time.
Definition: IfxEvadc.h:3059
IfxEvadc_addToQueue
IFX_EXTERN void IfxEvadc_addToQueue(Ifx_EVADC_G *group, IfxEvadc_ChannelId channel, IfxEvadc_RequestSource sourceType, uint32 options)
Add an entry to the queue of a group for the specified channel with the following options set: refill...
Definition: IfxEvadc.c:52
IfxEvadc_ChannelNoiseReductionEMUX_level3
Noise reduction conversion level 3, 7 additional conversion steps.
Definition: IfxEvadc.h:765
IfxEvadc_IdlePrecharge
IfxEvadc_IdlePrecharge
Contains options for Idle Precharge levels.
Definition: IfxEvadc.h:799
IfxEvadc_cfg_srcAddresses
volatile Ifx_SRC_SRCR * IfxEvadc_cfg_srcAddresses[(IFXEVADC_NUM_ADC_PRIMARY_GROUPS *4)+(IFXEVADC_NUM_ADC_SECONDARY_GROUPS *4)+(IFXEVADC_NUM_FAST_COMPARE_CHANNELS *4)+(IFXEVADC_NUM_ADC_COMMON_GROUPS *4)]
Definition: IfxEvadc_cfg.c:52
IfxEvadc_getEmuxGlobalConversionMode
IFX_INLINE IfxEvadc_ChannelNoiseReduction IfxEvadc_getEmuxGlobalConversionMode(Ifx_EVADC *evadc, uint8 inputClassNum)
get global input class conversion mode
Definition: IfxEvadc.h:2428
IfxEvadc_DataReductionControlMode_10
If DMM=0b00, Accumulate 11 result values,if DMM=0b01, FIR:a=1,b=2,c=1.
Definition: IfxEvadc.h:789
IfxEvadc_ChannelResult_8
Use Channel result 8.
Definition: IfxEvadc.h:179
IfxEvadc_getResult
IFX_INLINE Ifx_EVADC_G_RES IfxEvadc_getResult(Ifx_EVADC_G *group, uint32 resultIdx)
Get conversion result (Function does not care about the alignment) value = raw * gain + offset...
Definition: IfxEvadc.h:2578
IfxEvadc_selectIdlePrechargeLevel
IFX_INLINE void IfxEvadc_selectIdlePrechargeLevel(Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group, IfxEvadc_IdlePrecharge mode)
Selects the chargingmode/voltage level in idle mode.
Definition: IfxEvadc.h:2620
IfxEvadc_TriggerSource_5
Input signal REQTRx_5.
Definition: IfxEvadc.h:490
IfxEvadc_EmuxInterface
IfxEvadc_EmuxInterface
Specifies the Emux interface.
Definition: IfxEvadc.h:210
IfxEvadc_RampRunControl_1
Start immediately when GxFCRAMP0/1 is written.
Definition: IfxEvadc.h:677
IfxEvadc_ClockDividerFactor_24
Frequency Divided by 24.
Definition: IfxEvadc.h:589
IfxEvadc_ClockDividerFactor_20
Frequency Divided by 20.
Definition: IfxEvadc.h:585
IfxEvadc_TriggerSource_15
Input signal REQTRx_15.
Definition: IfxEvadc.h:500
IfxEvadc_Status_invalidChannel
Invalid channel number.
Definition: IfxEvadc.h:456
IfxEvadc_MsbConversionTime_doubleClockCycle
2 clock cycle for the MSB
Definition: IfxEvadc.h:810
IfxEvadc_ClockDividerFactor_21
Frequency Divided by 21.
Definition: IfxEvadc.h:586
IfxEvadc_BoundaryExtension_fastCompareResult11
Fast compare mode use as upper boundary Channel result 11.
Definition: IfxEvadc.h:119
IfxEvadc_getChannelResultServiceRequestNodePointer0
IFX_INLINE Ifx_EVADC_G_REVNP0 IfxEvadc_getChannelResultServiceRequestNodePointer0(Ifx_EVADC_G *evadcG)
Gets the channel result service request node pointer 0.
Definition: IfxEvadc.h:2396
IfxEvadc_TriggerMode_uponFallingEdge
Trigger event upon a falling edge.
Definition: IfxEvadc.h:476
IfxEvadc_getChannelControlConfig
IFX_INLINE Ifx_EVADC_G_CHCTR IfxEvadc_getChannelControlConfig(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex)
Gets the current ADC channel control configurations.
Definition: IfxEvadc.h:2382
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:140
IfxEvadc_ChannelNoiseReduction_level1
Noise reduction conversion level 1.
Definition: IfxEvadc.h:753
IfxEvadc_configureIclass
IFX_INLINE void IfxEvadc_configureIclass(Ifx_EVADC_G *evadcG, uint8 inputClassNum, uint32 value)
Sets the global input class registers, define the sample time and data conversion mode...
Definition: IfxEvadc.h:3231
IfxEvadc_isRequestQueueSlotEnabled
IFX_EXTERN boolean IfxEvadc_isRequestQueueSlotEnabled(Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Returns the queue slot requested status.
Definition: IfxEvadc.c:461
IfxEvadc_BoundaryExtension_fastCompareResult7
Fast compare mode use as upper boundary Channel result 7.
Definition: IfxEvadc.h:115
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxEvadc_setResultPosition
IFX_INLINE void IfxEvadc_setResultPosition(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, boolean rightAlignedStorage)
Sets result store position.
Definition: IfxEvadc.h:3098
IfxEvadc_EmuxSampleTimeControl_settingChanges
Use STCE Whenever Setting Changes.
Definition: IfxEvadc.h:221
IfxEvadc_BoundaryExtension_fastCompareResult5
Fast compare mode use as upper boundary Channel result 5.
Definition: IfxEvadc.h:113
IfxEvadc_GateOperatingMode_alternateValueMode
Alternate value mode.
Definition: IfxEvadc.h:660
IfxEvadc_SleepMode_disable
disables sleep mode
Definition: IfxEvadc.h:431
IfxEvadc_DataModificationMode_differenceMode
Difference Mode.
Definition: IfxEvadc.h:774
IfxEvadc_ChannelId_10
Channel 10.
Definition: IfxEvadc.h:151
IfxEvadc_ArbitrationMode
IfxEvadc_ArbitrationMode
Definition: IfxEvadc.h:733
IfxEvadc_BoundaryFlagNodePointer
IfxEvadc_BoundaryFlagNodePointer
Options for FCBFL.B.BFLNP to select Boundary Flag Node Pointer.
Definition: IfxEvadc.h:527
IfxEvadc_startQueue
IFX_INLINE void IfxEvadc_startQueue(Ifx_EVADC_G *group, IfxEvadc_RequestSource sourceType)
Starts a queue of a group by generating a trigger event through software.
Definition: IfxEvadc.h:3148
IfxEvadc_BoundaryExtension_fastCompareResult14
Fast compare mode use as upper boundary Channel result 14.
Definition: IfxEvadc.h:122
IfxEvadc_FastCompareAnalogConverterControl_off
Analog converter off.
Definition: IfxEvadc.h:620
IfxEvadc_RequestSlotStartMode_waitForStart
Wait for start.
Definition: IfxEvadc.h:412
float32
float float32
Definition: Platform_Types.h:170
IfxEvadc_DataReductionControlMode_13
If DMM=0b00, Accumulate 14 result values,if DMM=0b01, FIR:a=1,b=0,c=3.
Definition: IfxEvadc.h:792
IfxEvadc_TriggerOperatingMode_anyEdge
Trigger event upon any edge.
Definition: IfxEvadc.h:698
IfxEvadc_SrcNr
IfxEvadc_SrcNr
Service Node defined in MODULE_EVADC.G[x].SRACT.U(x= 0,1,..,11)
Definition: IfxEvadc.h:436
IfxEvadc_ExternalMultiplexerMode
IfxEvadc_ExternalMultiplexerMode
Specifies External Multiplexer Mode define in Ifx_EVADC.G[x].EMUXCTR.B.EMUXMODE.
Definition: IfxEvadc.h:243
IfxEvadc_AnalogClockGenerationMode_synchronized
Synchronized mode: Initial clock pulse is defined by the phase synchronizer.
Definition: IfxEvadc.h:707
__minu
uint32 __minu(uint32, uint32) __attribute__((intrinsic_pseudo(3
IfxEvadc_InputClasses_group1
Use group class 1.
Definition: IfxEvadc.h:298
IfxEvadc_ChannelResult_10
Use Channel result 10.
Definition: IfxEvadc.h:181
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:322
IfxEvadc_FastCompareAnalogClockSynchronizationDelay_1
1 clock cycle delay
Definition: IfxEvadc.h:611
IfxEvadc_GatingSource_1
Input signal REQGTx_1.
Definition: IfxEvadc.h:276
IfxEvadc_disableFastCompareBoundaryFlag
IFX_INLINE void IfxEvadc_disableFastCompareBoundaryFlag(Ifx_EVADC_FC *evadcFC)
Definition: IfxEvadc.h:2279
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxEvadc_setFastCompareServiceRequestGeneration
IFX_INLINE void IfxEvadc_setFastCompareServiceRequestGeneration(Ifx_EVADC_FC *evadcFC, IfxEvadc_FastCompareServiceRequestGeneration mode)
Sets when to generate service requests.
Definition: IfxEvadc.h:2993
IfxEvadc_getChannelServiceRequestNodePointer1
IFX_INLINE Ifx_EVADC_G_CEVNP1 IfxEvadc_getChannelServiceRequestNodePointer1(Ifx_EVADC_G *evadcG)
get the channel service request node pointer (CH8–CH15)
Definition: IfxEvadc.h:2420
IfxEvadc_ArbitrationRounds_20_slots
An arbitration round contains 20 arbitration slots.
Definition: IfxEvadc.h:101
IfxEvadc_Protection_resultRegisterGroup9
Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
Definition: IfxEvadc.h:371
IfxEvadc_CalibrationSampleTimeControl_2
2*t_ADCI
Definition: IfxEvadc.h:741
IFXEVADC_NUM_FAST_COMPARE_CHANNELS
#define IFXEVADC_NUM_FAST_COMPARE_CHANNELS
Fast Compare Channel.
Definition: IfxEvadc_cfg.h:112
IfxEvadc_CalibrationSampleTimeControl_6
6*t_ADCI
Definition: IfxEvadc.h:743
IfxEvadc_Protection_channelControl11
Access control for GxCHCTR11.
Definition: IfxEvadc.h:328
IfxEvadc_spreadEarlySamplePointEMUXConversions
IFX_INLINE void IfxEvadc_spreadEarlySamplePointEMUXConversions(Ifx_EVADC_G *evadcG, uint8 inputClassNum, IfxEvadc_SpreadEarlySamplePointEMUXConversionsMode mode)
Definition: IfxEvadc.h:3136
IfxEvadc_setAnalogInputPrechargeControlStandard
IFX_INLINE void IfxEvadc_setAnalogInputPrechargeControlStandard(Ifx_EVADC_G *evadcG, uint8 inputClassNum, IfxEvadc_AnalogInputPrechargeControl mode)
Analog Input Precharge Control for Standard Conversions Buffer must be enabled by GxANCFG...
Definition: IfxEvadc.h:2749
IfxEvadc_ChannelId_8
Channel 8.
Definition: IfxEvadc.h:149
IfxEvadc_ExternalTriggerPolarity_inverted
Invert selected input signal.
Definition: IfxEvadc.h:605
IfxEvadc_Protection_resultRegisterGroup13
Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
Definition: IfxEvadc.h:375
IfxEvadc_Protection_initGroup6
Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
Definition: IfxEvadc.h:338
IfxEvadc_setQueueSlotTriggerOperatingConfig
IFX_EXTERN void IfxEvadc_setQueueSlotTriggerOperatingConfig(Ifx_EVADC_G *evadcG, IfxEvadc_TriggerMode triggerMode, IfxEvadc_TriggerSource triggerSource, IfxEvadc_RequestSource sourceType)
Sets the trigger operating configurations.
Definition: IfxEvadc.c:564
IfxEvadc_setFastCompareAnalogInputPrechargeControl
IFX_INLINE void IfxEvadc_setFastCompareAnalogInputPrechargeControl(Ifx_EVADC_FC *evadcFC, IfxEvadc_AnalogInputPrechargeControl mode)
Definition: IfxEvadc.h:2856
IfxCpu_Intrinsics.h
IfxEvadc_SrcNr_group2
service request line 2 of group
Definition: IfxEvadc.h:440
IfxEvadc_ClockDividerFactor_16
Frequency Divided by 16.
Definition: IfxEvadc.h:581
IfxEvadc_disableInputBuffer
IFX_INLINE void IfxEvadc_disableInputBuffer(Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group)
Definition: IfxEvadc.h:3178
IfxEvadc_DataReductionControlMode_7
If DMM=0b00, Accumulate 8 result values,if DMM=0b01, FIR:a=1,b=3,c=0.
Definition: IfxEvadc.h:786
IfxEvadc_RampDirection
IfxEvadc_RampDirection
Ramp direction setting in FCM.B.FCRDIR.
Definition: IfxEvadc.h:666
IfxEvadc_Protection_initFastCompareChannel4
Access control for GyFCBFL, GyFCHYST, GyFCCTR, GyFCM, GyFCRAMP.
Definition: IfxEvadc.h:385
IfxEvadc_ChannelResult_1
Use Channel result 1.
Definition: IfxEvadc.h:172
IfxEvadc_SpreadEarlySamplePointEMUXConversionsMode_spread
Spread sample timing, end of sample phase is varied.
Definition: IfxEvadc.h:824
IfxEvadc_SrcNr_group3
service request line 3 of group
Definition: IfxEvadc.h:441
IfxEvadc_setGlobalSampleTime
IFX_INLINE void IfxEvadc_setGlobalSampleTime(Ifx_EVADC *evadc, uint8 groupInputClassNum, float32 analogFrequency, float32 sampleTime)
Sets the sample time in sec of ADC global class.
Definition: IfxEvadc.h:3035
IfxEvadc_isModuleEnabled
IFX_INLINE boolean IfxEvadc_isModuleEnabled(Ifx_EVADC *evadc)
Return if the clock for EVADC modules is enabled.
Definition: IfxEvadc.h:3185
IfxEvadc_DataReductionControlMode_8
If DMM=0b00, Accumulate 9 result values,if DMM=0b01, FIR:a=3,b=0,c=1.
Definition: IfxEvadc.h:787
IfxEvadc_FastCompareServiceRequestGeneration_newResult
Issue service request when a new result available.
Definition: IfxEvadc.h:652
IfxEvadc_SleepMode_enable
enables sleep mode
Definition: IfxEvadc.h:430
IfxEvadc_AnalogConverterMode_normalOperation
Normal operation mode.
Definition: IfxEvadc.h:91
IfxEvadc_ArbitrationRounds
IfxEvadc_ArbitrationRounds
Arbitration round length defined in MODULE_EVADC.G[x].ARBCFG.ARBRND(x=0,1,..,11)
Definition: IfxEvadc.h:96
IfxEvadc_BoundaryFlagActivationMode
IfxEvadc_BoundaryFlagActivationMode
Selects the behaviour of BoundaryFlag in FCBFL.B.BFA.
Definition: IfxEvadc.h:509
IfxEvadc_BoundaryExtension
IfxEvadc_BoundaryExtension
Boundary Extension defined in MODULE_EVADC.G[x].CHCTR[y].B.BNDSELX(x=0,1,...,11;y=0,1....,16)
Definition: IfxEvadc.h:106
IfxEvadc_GatingMode_gatingHigh
Conversion request is issued if at least 1 conversion pending bit is set and the gating signal is hig...
Definition: IfxEvadc.h:267
IfxEvadc_SrcNr_group1
service request line 1 of group
Definition: IfxEvadc.h:439
IfxEvadc_AnalogClockSynchronizationDelay_4
4 clock cycles delay
Definition: IfxEvadc.h:717
IfxEvadc_setFastCompareRunControl
IFX_INLINE void IfxEvadc_setFastCompareRunControl(Ifx_EVADC_FC *evadcFC, IfxEvadc_FastCompareRunControl mode)
Defines the basic run conditions of the fast compare channel.
Definition: IfxEvadc.h:2939
IfxEvadc_BoundaryFlagNodePointer_commonBoundaryFlagOutput0
Select common boundary flag output 0.
Definition: IfxEvadc.h:529
IFXEVADC_SAMPLETIME_MIN
#define IFXEVADC_SAMPLETIME_MIN
Definition: IfxEvadc_cfg.h:118
IfxEvadc_setArbiterPriority
IFX_EXTERN void IfxEvadc_setArbiterPriority(Ifx_EVADC_G *evadcG, boolean slotEnable, IfxEvadc_RequestSlotPriority prio, IfxEvadc_RequestSlotStartMode mode, IfxEvadc_RequestSource slot)
Sets the Arbiter slot configurations.
Definition: IfxEvadc.c:504
IfxEvadc_setFastCompareGateOperatingMode
IFX_INLINE void IfxEvadc_setFastCompareGateOperatingMode(Ifx_EVADC_FC *evadcFC, IfxEvadc_GateOperatingMode mode)
Definition: IfxEvadc.h:2906
IfxEvadc_EmuxInterface_0
Emux Interface 0.
Definition: IfxEvadc.h:212
IfxEvadc_getChannelResultServiceRequestNodePointer1
IFX_INLINE Ifx_EVADC_G_REVNP1 IfxEvadc_getChannelResultServiceRequestNodePointer1(Ifx_EVADC_G *evadcG)
Gets the channel result service request node pointer 1.
Definition: IfxEvadc.h:2404
IfxEvadc_SuspendMode_none
No suspend.
Definition: IfxEvadc.h:466
IfxEvadc_DataReductionControlMode_4
If DMM=0b00, Accumulate 5 result values,if DMM=0b01, FIR:a=1,b=0,c=2.
Definition: IfxEvadc.h:783
IfxEvadc_BoundaryFlagNodePointer_sharedServiceRequestLine3
Select shared service request line 3.
Definition: IfxEvadc.h:536
IfxEvadc_TriggerSource_0
Input signal REQTRx_0.
Definition: IfxEvadc.h:485
IfxEvadc_ExternalMultiplexerMode_steady
select steady mode
Definition: IfxEvadc.h:246
IfxEvadc_GatingSource_12
Input signal REQGTx_12.
Definition: IfxEvadc.h:287
IfxEvadc_InputClasses_global0
Use global class 0.
Definition: IfxEvadc.h:299
IfxEvadc_getQueueSlotStartMode
IFX_EXTERN IfxEvadc_RequestSlotStartMode IfxEvadc_getQueueSlotStartMode(Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Gets the requested queue slot start mode.
Definition: IfxEvadc.c:256
IfxEvadc_Protection_channelControl5
Access control for GxCHCTR5.
Definition: IfxEvadc.h:322
IfxEvadc_setFastCompareAutomaticUpdateMode
IFX_INLINE void IfxEvadc_setFastCompareAutomaticUpdateMode(Ifx_EVADC_FC *evadcFC, IfxEvadc_FastCompareAutomaticUpdate mode)
Sets the source of the value(s) in bitfield FCREF.
Definition: IfxEvadc.h:2876
IfxEvadc_Protection_channelControl2
Access control for GxCHCTR2.
Definition: IfxEvadc.h:319
IfxEvadc_enableAccess
IFX_EXTERN void IfxEvadc_enableAccess(Ifx_EVADC *evadc, IfxEvadc_Protection protectionSet)
Enable write access to the EVADC config/control registers.
Definition: IfxEvadc.c:130
IfxEvadc_clearAllResultRequests
IFX_INLINE void IfxEvadc_clearAllResultRequests(Ifx_EVADC_G *evadcG)
Clears the all group requests.
Definition: IfxEvadc.h:2226
IfxEvadc_setChannelRequest
IFX_INLINE void IfxEvadc_setChannelRequest(Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource queue, IfxEvadc_ChannelId channel)
Defines the channel number to be converted.
Definition: IfxEvadc.h:3214
IfxEvadc_Protection_resultRegisterGroup3
Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
Definition: IfxEvadc.h:365
IfxEvadc_ArbitrationRounds_8_slots
An arbitration round contains 8 arbitration slots.
Definition: IfxEvadc.h:99
IfxEvadc_SupplyVoltageLevelControl_automaticControl
Automatic control: voltage range is controlled by the power supply.
Definition: IfxEvadc.h:852
IfxEvadc_Protection_initGroup14
Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
Definition: IfxEvadc.h:346
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxEvadc_SpreadEarlySamplePointStandardConversionsMode
IfxEvadc_SpreadEarlySamplePointStandardConversionsMode
Spread Early Sample Point for Standard Conversions.
Definition: IfxEvadc.h:829
IfxEvadc_Status_queueFull
Queue is full.
Definition: IfxEvadc.h:457
IfxEvadc_Protection_initGroup1
Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
Definition: IfxEvadc.h:333
IfxEvadc_configExternalMultiplexerMode
IFX_EXTERN void IfxEvadc_configExternalMultiplexerMode(Ifx_EVADC *evadc, Ifx_EVADC_G *evadcG, IfxEvadc_ExternalMultiplexerMode mode, uint8 channels, IfxEvadc_EmuxSelectValue startChannel, IfxEvadc_EmuxCodingScheme code, IfxEvadc_EmuxSampleTimeControl sampleTimeControl, IfxEvadc_ChannelSelectionStyle channelSelectionStyle)
Configure external multiplexer mode.
Definition: IfxEvadc.c:70
IfxEvadc_StartupCalibration
IfxEvadc_StartupCalibration
The 0-1 transition of bit SUCAL initiates the start-up calibrationphase of all analog converters (exc...
Definition: IfxEvadc.h:840
IfxEvadc_BoundaryExtension_fastCompareResult6
Fast compare mode use as upper boundary Channel result 6.
Definition: IfxEvadc.h:114
IfxEvadc_ReferencePrechargeControl_singleClockPhase
Precharge the reference input for 1 clock phase.
Definition: IfxEvadc.h:817
IfxEvadc_setQueueSlotGatingConfig
IFX_EXTERN void IfxEvadc_setQueueSlotGatingConfig(Ifx_EVADC_G *evadcG, IfxEvadc_GatingSource gatingSource, IfxEvadc_GatingMode gatingMode, IfxEvadc_RequestSource sourceType)
Sets the gating configurations.
Definition: IfxEvadc.c:528
IfxEvadc_initializeFAdcI
IFX_EXTERN uint32 IfxEvadc_initializeFAdcI(Ifx_EVADC *evadc, uint32 fAdcI, Ifx_EVADC_G *group)
Configure the ADC analog clock.
Definition: IfxEvadc.c:421
IfxEvadc_setAnalogClockSynchronizationDelay
IFX_INLINE void IfxEvadc_setAnalogClockSynchronizationDelay(Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group, IfxEvadc_AnalogClockSynchronizationDelay delay)
Definition: IfxEvadc.h:2195
IfxEvadc_RequestSlotStartMode_cancelInjectRepeat
Cancel-Inject-Repeat.
Definition: IfxEvadc.h:413
IfxEvadc_disableServiceRequest
IFX_INLINE void IfxEvadc_disableServiceRequest(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelResult resultRegister)
Definition: IfxEvadc.h:2340
IfxEvadc_BoundaryExtension_fastCompareResult9
Fast compare mode use as upper boundary Channel result 9.
Definition: IfxEvadc.h:117
IfxEvadc_cfg.h
EVADC on-chip implementation data.
IfxEvadc_Status_notInitialised
Appropriate initialisation not done.
Definition: IfxEvadc.h:454
IfxScuWdt.h
SCU basic functionality.
IfxEvadc_Protection_channelControl0
Access control for GxCHCTR0.
Definition: IfxEvadc.h:317
IFX_VERBOSE_LEVEL_WARNING
#define IFX_VERBOSE_LEVEL_WARNING
Assertion level warning.
Definition: Ifx_Assert.h:59
IfxEvadc_setFastCompareTriggerInterval
IFX_INLINE void IfxEvadc_setFastCompareTriggerInterval(Ifx_EVADC_FC *evadcFC, uint8 interval)
Sets the interval at which fast compare operations are triggered in steps of 16 * 1/fADC...
Definition: IfxEvadc.h:3003
IfxEvadc_ChannelResult_5
Use Channel result 5.
Definition: IfxEvadc.h:176
IfxEvadc_GatingSource_5
Input signal REQGTx_5.
Definition: IfxEvadc.h:280
IfxEvadc_ClockDividerFactor_32
Frequency Divided by 32.
Definition: IfxEvadc.h:597
IfxEvadc_TriggerSource_10
Input signal REQTRx_10.
Definition: IfxEvadc.h:495
IfxEvadc_AnalogInputPrechargeControl_16Cycles
Precharge for 16 clock cycles.
Definition: IfxEvadc.h:729
IfxEvadc_SampleSynchronization
IfxEvadc_SampleSynchronization
Sample timing sync settings for FCM.B.SSE.
Definition: IfxEvadc.h:685
IfxEvadc_Protection_channelControl1
Access control for GxCHCTR1.
Definition: IfxEvadc.h:318
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxEvadc_ChannelSelectionStyle_binary
Each bit of bitfield EMUXCH selects the associated channel for EMUX control.
Definition: IfxEvadc.h:195
IfxEvadc_Protection_channelControl8
Access control for GxCHCTR8.
Definition: IfxEvadc.h:325
IfxEvadc_TriggerSource_3
Input signal REQTRx_3.
Definition: IfxEvadc.h:488
IfxEvadc_setLowerBoundary
IFX_INLINE void IfxEvadc_setLowerBoundary(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, IfxEvadc_BoundarySelection lowerBoundary)
Sets group&#39;s lower boundary.
Definition: IfxEvadc.h:3065
IfxEvadc_RequestSource_queue0
8 stage Queue0 request
Definition: IfxEvadc.h:420
IfxEvadc_BoundaryFlagActivationMode_0
Set boundary flag BFL if result FCR = 1 (input above the defined band or compare value), clear if FCR = 0 (input below)
Definition: IfxEvadc.h:511
IfxEvadc_Protection_globalConfig
Access control for GLOBCFG.
Definition: IfxEvadc.h:393
IfxEvadc_SampleSynchronization_off
No synchronization.
Definition: IfxEvadc.h:687
IfxEvadc_MsbConversionTime_singleClockCycle
1 clock cycle for the MSB (standard)
Definition: IfxEvadc.h:809
IfxEvadc_initiateStartupCalibration
IFX_INLINE void IfxEvadc_initiateStartupCalibration(Ifx_EVADC *evadc)
initiates the calibration pulse phase.
Definition: IfxEvadc.h:2649
IfxEvadc_DataReductionControlMode_5
If DMM=0b00, Accumulate 6 result values,if DMM=0b01, FIR:a=3,b=1,c=0.
Definition: IfxEvadc.h:784
IfxEvadc_Protection_initFastCompareChannel6
Access control for GyFCBFL, GyFCHYST, GyFCCTR, GyFCM, GyFCRAMP.
Definition: IfxEvadc.h:389
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxEvadc_Protection_initGroup10
Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
Definition: IfxEvadc.h:342
IfxEvadc_Protection_serviceGroup10
Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
Definition: IfxEvadc.h:357
IfxEvadc_ExternalTriggerPolarity
IfxEvadc_ExternalTriggerPolarity
External Trigger Polarity to be set in FCCTRL.B.XTPOL.
Definition: IfxEvadc.h:602
IfxEvadc_GatingSource_6
Input signal REQGTx_6.
Definition: IfxEvadc.h:281
IfxEvadc_Protection_initGroup8
Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
Definition: IfxEvadc.h:340
IfxEvadc_Protection_serviceGroup4
Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
Definition: IfxEvadc.h:351
IfxEvadc_BoundaryExtension_fastCompareResult10
Fast compare mode use as upper boundary Channel result 10.
Definition: IfxEvadc.h:118
IfxEvadc_RequestSource_queue1
8 stage Queue1 request
Definition: IfxEvadc.h:421
IfxEvadc_SleepMode
IfxEvadc_SleepMode
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_EVADC.CLC.B.EDIS.
Definition: IfxEvadc.h:428
IfxEvadc_ChannelId_13
Channel 13.
Definition: IfxEvadc.h:154
IfxEvadc_getAdcDigitalFrequency
IFX_EXTERN float32 IfxEvadc_getAdcDigitalFrequency(Ifx_EVADC *evadc)
configured Fadcd EVADC digital clock frequency in Hz.
Definition: IfxEvadc.c:170
IfxEvadc_RequestSlotPriority
IfxEvadc_RequestSlotPriority
Arbitration priority, Group x,defined in MODULE_EVADC.G[x].ARBPR.PRIOy(x=0,1,...,11;y=0,1,2)
Definition: IfxEvadc.h:400
IfxEvadc_LimitCheck_noCheck
Normal compare mode Event Never Fast Compare mode Event Never.
Definition: IfxEvadc.h:307
IfxEvadc_LimitCheck
IfxEvadc_LimitCheck
ADC channel limit check defined in MODULE_EVADC.G[x].CHCTR[y].B.CHEVMODE(x=0,1,...,11;y=0,1....,16)
Definition: IfxEvadc.h:305
IfxEvadc_enableModule
IFX_INLINE void IfxEvadc_enableModule(Ifx_EVADC *evadc)
Enable EVADC kernel.
Definition: IfxEvadc.h:2324
IfxEvadc_BoundarySelection_global0
Use global class 0.
Definition: IfxEvadc.h:132
IfxEvadc_ChannelNoiseReduction_standardConversion
Standard Conversions mode.
Definition: IfxEvadc.h:752
IfxEvadc_ClockDividerFactor_27
Frequency Divided by 27.
Definition: IfxEvadc.h:592
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxEvadc_GateOperatingMode
IfxEvadc_GateOperatingMode
Gate Operating Mode to be filled in FCCTRL.B.GTMODE.
Definition: IfxEvadc.h:657
IfxEvadc_WaitForRead_enabled
Wait-for-read mode enabled for this register.
Definition: IfxEvadc.h:862
IfxEvadc_Protection_resultRegisterGroup10
Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
Definition: IfxEvadc.h:372
IfxEvadc_ExternalMultiplexerMode_softwareControl
Disable The Emux Control.
Definition: IfxEvadc.h:245
IfxEvadc_ClockDividerFactor_25
Frequency Divided by 25.
Definition: IfxEvadc.h:590
IfxEvadc_setSleepMode
IFX_INLINE void IfxEvadc_setSleepMode(Ifx_EVADC *evadc, IfxEvadc_SleepMode mode)
Sets the sensitivity of the module to sleep signal.
Definition: IfxEvadc.h:3104
IfxEvadc_ChannelEventMode_never
Never generate a service request.
Definition: IfxEvadc.h:554
IfxEvadc_BoundaryFlagNodePointer_sharedServiceRequestLine0
Select shared service request line 0.
Definition: IfxEvadc.h:533
IfxEvadc_resetModule
IFX_EXTERN void IfxEvadc_resetModule(Ifx_EVADC *evadc)
Resets the kernel.
Definition: IfxEvadc.c:482
IfxEvadc_AnalogClockSynchronizationDelay_7
7 clock cycles delay
Definition: IfxEvadc.h:720
IfxEvadc_Protection_serviceGroup5
Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
Definition: IfxEvadc.h:352
IfxEvadc_AnalogConverterMode_fastStandby
Fast Standby Mode.
Definition: IfxEvadc.h:90
IfxEvadc_setGroupSampleTime
IFX_INLINE void IfxEvadc_setGroupSampleTime(Ifx_EVADC_G *evadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
Sets the ADC input class sample time ticks.
Definition: IfxEvadc.h:3053
IfxEvadc_getGlobalConfigValue
IFX_INLINE Ifx_EVADC_GLOBCFG IfxEvadc_getGlobalConfigValue(Ifx_EVADC *evadc)
Gets the global control configuration value.
Definition: IfxEvadc.h:2503
IfxEvadc_SpreadEarlySamplePointStandardConversionsMode_spread
Spread sample timing, end of sample phase is varied.
Definition: IfxEvadc.h:832
IfxEvadc_DataReductionControlMode_3
If DMM=0b00, Accumulate 4 result values,if DMM=0b01, FIR:a=1,b=1,c=1.
Definition: IfxEvadc.h:782
IfxEvadc_Emux_Out::pin
IfxPort_Pin pin
Port pin.
Definition: IfxEvadc_PinMap.h:68
IfxEvadc_EmuxSelectValue_6
Start Selection Value 6.
Definition: IfxEvadc.h:236
IfxEvadc_BoundarySelection_global1
Use global class 1.
Definition: IfxEvadc.h:133
IfxEvadc_ClockDividerFactor_13
Frequency Divided by 13.
Definition: IfxEvadc.h:578
IfxEvadc_Protection_serviceGroup8
Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
Definition: IfxEvadc.h:355
IfxEvadc_BoundarySelection
IfxEvadc_BoundarySelection
BoundarySel defined in MODULE_EVADC.G[x].CHCTR[y].B.BNDSELL(x=0,1,...,11;y=0,1....,16)
Definition: IfxEvadc.h:128
IfxEvadc_getGlobalResult
IFX_INLINE Ifx_EVADC_GLOB_RES IfxEvadc_getGlobalResult(Ifx_EVADC *evadc)
return conversion result stored in the Global result Register
Definition: IfxEvadc.h:2517
IfxEvadc_GatingSource_9
Input signal REQGTx_9.
Definition: IfxEvadc.h:284
IfxEvadc_GateOperatingMode_lockBoundaryFlag
Lock boundary flag.
Definition: IfxEvadc.h:661
IfxEvadc_ChannelId_15
Channel 15.
Definition: IfxEvadc.h:156
IfxEvadc_EmuxCodingScheme_gray
Output the channel number in gray code.
Definition: IfxEvadc.h:205
IfxEvadc_setResultNodeEventPointer1
IFX_INLINE void IfxEvadc_setResultNodeEventPointer1(Ifx_EVADC_G *evadcG, IfxEvadc_SrcNr resultSrcNr, IfxEvadc_ChannelResult resultRegister)
Sets result event node pointer 1.
Definition: IfxEvadc.h:3091
IfxEvadc_enableInputBuffer
IFX_INLINE void IfxEvadc_enableInputBuffer(Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group)
Definition: IfxEvadc.h:2655
IfxEvadc_ChannelResult_14
Use Channel result 14.
Definition: IfxEvadc.h:185
IfxEvadc_Protection_resultRegisterGroup5
Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
Definition: IfxEvadc.h:367
IfxEvadc_Protection_initGroup11
Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
Definition: IfxEvadc.h:343
IfxEvadc_storeGroupResult
IFX_INLINE void IfxEvadc_storeGroupResult(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, IfxEvadc_ChannelResult resultRegister)
Sets the group result register.
Definition: IfxEvadc.h:3165
IfxEvadc_LimitCheck_eventIfOutsideArea
Normal compare mode Event If result is outside the boundary band Fast Compare mode Event If result sw...
Definition: IfxEvadc.h:309
IfxEvadc_BoundaryFlagNodePointer_sharedServiceRequestLine2
Select shared service request line 2.
Definition: IfxEvadc.h:535
IfxEvadc_GroupId_global0
EVADC group global0.
Definition: IfxEvadc_cfg.h:152
IfxEvadc_GatingSource_4
Input signal REQGTx_4.
Definition: IfxEvadc.h:279
IfxEvadc_AnalogClockSynchronizationDelay
IfxEvadc_AnalogClockSynchronizationDelay
Definition: IfxEvadc.h:711
IfxEvadc_getFastCompareBoundaryFlagStatus
IFX_INLINE boolean IfxEvadc_getFastCompareBoundaryFlagStatus(Ifx_EVADC_FC *evadcFC)
Get boundary flag status.
Definition: IfxEvadc.h:2452
IfxEvadc_ChannelReference_channel0
use CH0 as reference
Definition: IfxEvadc.h:164
IfxEvadc_SpreadEarlySamplePointEMUXConversionsMode
IfxEvadc_SpreadEarlySamplePointEMUXConversionsMode
Definition: IfxEvadc.h:821
IfxEvadc_ClockDividerFactor_6
Frequency Divided by 6.
Definition: IfxEvadc.h:571
IfxEvadc_TriggerMode_noExternalTrigger
No external trigger.
Definition: IfxEvadc.h:475
IfxEvadc_LimitCheck_always
Normal compare mode Event Always Fast Compare mode Event Always.
Definition: IfxEvadc.h:310
IfxEvadc_resetGroup
IFX_INLINE void IfxEvadc_resetGroup(Ifx_EVADC_G *evadcG)
Resets the ADC group.
Definition: IfxEvadc.h:2705
IfxEvadc_BoundaryFlagSwControl_clear
Clear BFL.
Definition: IfxEvadc.h:545
IfxEvadc_ChannelEventMode_belowCompareValue
Generate a service request in case the result is below compare value.
Definition: IfxEvadc.h:556
IfxEvadc_getFastCompareResultStatus
IFX_INLINE boolean IfxEvadc_getFastCompareResultStatus(Ifx_EVADC_FC *evadcFC)
Returns result for Fast Compare operation.
Definition: IfxEvadc.h:2486
IfxEvadc_setSyncRequest
IFX_INLINE void IfxEvadc_setSyncRequest(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, boolean synchonize)
Sets channel synchronization request.
Definition: IfxEvadc.h:3124
IfxEvadc_Protection_channelControl13
Access control for GxCHCTR13.
Definition: IfxEvadc.h:330
IfxEvadc_clearChannelRequest
IFX_INLINE void IfxEvadc_clearChannelRequest(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelId)
Clears the channel request.
Definition: IfxEvadc.h:2232
IfxEvadc_setChannelEventNodePointer0
IFX_INLINE void IfxEvadc_setChannelEventNodePointer0(Ifx_EVADC_G *evadcG, IfxEvadc_SrcNr channelSrcNr, IfxEvadc_ChannelId channel)
Sets the channel event service request line.
Definition: IfxEvadc.h:2761
IfxEvadc_getEmuxGroupConversionMode
IFX_INLINE IfxEvadc_ChannelNoiseReduction IfxEvadc_getEmuxGroupConversionMode(Ifx_EVADC_G *evadcG, uint8 inputClassNum)
get the external conversion mode
Definition: IfxEvadc.h:2440
IfxEvadc_ClockDividerFactor_11
Frequency Divided by 11.
Definition: IfxEvadc.h:576
IfxEvadc_Protection_initGroup4
Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
Definition: IfxEvadc.h:336
IfxEvadc_BoundaryExtension_fastCompareResult3
Fast compare mode use as upper boundary Channel result 3.
Definition: IfxEvadc.h:111
IfxEvadc_setFastCompareBoundaryFlagInversion
IFX_INLINE void IfxEvadc_setFastCompareBoundaryFlagInversion(Ifx_EVADC_FC *evadcFC, IfxEvadc_BoundaryFlagInversionControl mode)
Sets in FCM.B.BFI whether to use Boundary Flag(FCM.B.BFL) directly or in a inverted format...
Definition: IfxEvadc.h:2273
IfxEvadc_setDataReductionControlMode
IFX_INLINE void IfxEvadc_setDataReductionControlMode(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelResult resultRegister, uint32 mode)
Definition: IfxEvadc.h:2793
IfxEvadc_getEmuxGlobalSampleTime
IFX_INLINE float32 IfxEvadc_getEmuxGlobalSampleTime(Ifx_EVADC *evadc, uint8 inputClassNum, float32 analogFrequency)
Get the sample time of ADC global class for external channel.
Definition: IfxEvadc.h:2434
IfxEvadc_ClockDividerFactor_2
Frequency Divided by 2.
Definition: IfxEvadc.h:567
IfxEvadc_Protection_initGroup2
Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
Definition: IfxEvadc.h:334
IfxEvadc_Protection_serviceGroup13
Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
Definition: IfxEvadc.h:360
IfxEvadc_FastCompareRunControl
IfxEvadc_FastCompareRunControl
Defines the basic run conditions of the fast compare channel in FCM.B.RUNCOMP.
Definition: IfxEvadc.h:639
IfxEvadc_getQueueSlotGatingMode
IFX_EXTERN IfxEvadc_GatingMode IfxEvadc_getQueueSlotGatingMode(Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Gets the requested queue slot gating mode.
Definition: IfxEvadc.c:192
IfxEvadc_RampRunControl_3
Start immediately when GxFCRAMP0/1 is written and stop upon the selected trigger event of signal REQT...
Definition: IfxEvadc.h:679
IfxEvadc_Status_noAccess
Access to the group/channel is disabled.
Definition: IfxEvadc.h:458
IfxEvadc_BoundaryExtension_fastCompareResult4
Fast compare mode use as upper boundary Channel result 4.
Definition: IfxEvadc.h:112
IfxEvadc_Protection_initGroup3
Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
Definition: IfxEvadc.h:335
IfxEvadc_enableStartupCalibration
IFX_INLINE void IfxEvadc_enableStartupCalibration(Ifx_EVADC *evadc)
Enable the startup calibaration phase.
Definition: IfxEvadc.h:3191
IfxEvadc_Emux_Out
EVADC External Mux pin mapping structure.
Definition: IfxEvadc_PinMap.h:65
IfxEvadc_setGroupConversionMode
IFX_INLINE void IfxEvadc_setGroupConversionMode(Ifx_EVADC_G *evadcG, uint8 inputClassNum, IfxEvadc_ChannelNoiseReduction conversionMode)
Sets the ADC input class channel resolution.
Definition: IfxEvadc.h:3041
IfxEvadc_GatingSource_2
Input signal REQGTx_2.
Definition: IfxEvadc.h:277
IfxEvadc_Protection_initFastCompareChannel7
Access control for GyFCBFL, GyFCHYST, GyFCCTR, GyFCM, GyFCRAMP.
Definition: IfxEvadc.h:391
IfxEvadc_ChannelResult_9
Use Channel result 9.
Definition: IfxEvadc.h:180
IfxEvadc_EmuxSelectValue_1
Start Selection Value 1.
Definition: IfxEvadc.h:231
IfxEvadc_enableFifoMode
IFX_INLINE void IfxEvadc_enableFifoMode(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelResult resultRegister, IfxEvadc_FifoMode fifoMode)
Enables the FIFO mode.
Definition: IfxEvadc.h:2318
IfxEvadc_EmuxSelectValue_7
Start Selection Value 7.
Definition: IfxEvadc.h:237
IfxEvadc_ChannelId_14
Channel 14.
Definition: IfxEvadc.h:155
IfxEvadc_DataReductionControlMode_11
If DMM=0b00, Accumulate 12 result values,if DMM=0b01, FIR:a=2,b=0,c=2.
Definition: IfxEvadc.h:790
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:249
IfxEvadc_GatingSource_10
Input signal REQGTx_10.
Definition: IfxEvadc.h:285
IfxEvadc_getAdcCalibrationActiveState
IFX_INLINE uint8 IfxEvadc_getAdcCalibrationActiveState(Ifx_EVADC *evadc, uint8 adcCalGroupNum)
gets ADC Calibration Flag CAL status.
Definition: IfxEvadc.h:2366
IfxEvadc_InputClasses
IfxEvadc_InputClasses
inputClass defined in MODULE_EVADC.G[x].CHCTR[y].B.ICLSEL(x=0,1,...,11;y=0,1....,16) ...
Definition: IfxEvadc.h:295
IfxEvadc_enableFastCompareSampleSynchronization
IFX_INLINE void IfxEvadc_enableFastCompareSampleSynchronization(Ifx_EVADC_FC *evadcFC, IfxEvadc_SampleSynchronization mode)
Enable/Disable sample timing synchronization.
Definition: IfxEvadc.h:2308
IfxEvadc_BoundaryFlagSwControl_noAction
No Action.
Definition: IfxEvadc.h:544
IfxEvadc_SrcNr_shared2
Select shared service request line 2.
Definition: IfxEvadc.h:444
IfxEvadc_Protection_initFastCompareChannel0
Access control for GyFCBFL, GyFCHYST, GyFCCTR, GyFCM, GyFCRAMP.
Definition: IfxEvadc.h:377
IfxEvadc_TriggerSource_13
Input signal REQTRx_13.
Definition: IfxEvadc.h:498
IfxEvadc_DataModificationMode
IfxEvadc_DataModificationMode
Data Modification Mode.
Definition: IfxEvadc.h:770
IfxEvadc_AnalogClockSynchronizationDelay_5
5 clock cycles delay
Definition: IfxEvadc.h:718
IfxEvadc_ReferencePrechargeControl
IfxEvadc_ReferencePrechargeControl
Reference Precharge Control.
Definition: IfxEvadc.h:815
IfxEvadc_ClockDividerFactor_18
Frequency Divided by 18.
Definition: IfxEvadc.h:583
IfxEvadc_StartupCalibration_initiate
Initiate the start-up calibration phase (indication in bit GxARBCFG.CAL)
Definition: IfxEvadc.h:843
IfxEvadc_ChannelResult_7
Use Channel result 7.
Definition: IfxEvadc.h:178
IfxEvadc_setChannelEventNodePointer1
IFX_INLINE void IfxEvadc_setChannelEventNodePointer1(Ifx_EVADC_G *evadcG, IfxEvadc_SrcNr channelSrcNr, IfxEvadc_ChannelId channel)
set channel event node pointer(channel 8- channel 15)
Definition: IfxEvadc.h:2768
IfxEvadc_TriggerSource
IfxEvadc_TriggerSource
Trigger request source defined in MODULE_EVADC.G[x].QCTRLy.XTSEL(x=0,1,..,11;y=0,1,..,7)
Definition: IfxEvadc.h:483
IfxEvadc_setGlobalConversionMode
IFX_INLINE void IfxEvadc_setGlobalConversionMode(Ifx_EVADC *evadc, uint8 InputClassNum, IfxEvadc_ChannelNoiseReduction conversionMode)
Sets the channel conversion mode.
Definition: IfxEvadc.h:3029
IfxEvadc_BoundarySelection_group1
Use group class 1.
Definition: IfxEvadc.h:131
IfxEvadc_SrcNr_shared0
Select shared service request line 0.
Definition: IfxEvadc.h:442
IfxEvadc_enableQueueSlotExternalTrigger
IFX_EXTERN void IfxEvadc_enableQueueSlotExternalTrigger(Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Enables the external trigger.
Definition: IfxEvadc.c:152
IfxEvadc_Protection_resultRegisterGroup1
Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
Definition: IfxEvadc.h:363
IfxEvadc_setFastCompareRunRampControl
IFX_INLINE void IfxEvadc_setFastCompareRunRampControl(Ifx_EVADC_FC *evadcFC, IfxEvadc_RampRunControl rampStartMode)
Definition: IfxEvadc.h:2949
IfxEvadc_BoundaryFlagInversionControl_direct
Use BFL directly.
Definition: IfxEvadc.h:521
IfxEvadc_ClockDividerFactor_22
Frequency Divided by 22.
Definition: IfxEvadc.h:587
IfxEvadc_ClockDividerFactor_4
Frequency Divided by 4.
Definition: IfxEvadc.h:569
IfxEvadc_TriggerMode_uponAnyEdge
Trigger event upon any edge.
Definition: IfxEvadc.h:478
IfxEvadc_SpreadEarlySamplePointEMUXConversionsMode_nominal
Nominal sample timing.
Definition: IfxEvadc.h:823
IfxEvadc_ReferencePrechargeControl_singleClockPeriod
Precharge the reference input for 1 clock period.
Definition: IfxEvadc.h:818
IfxEvadc_TriggerSource_9
Input signal REQTRx_9.
Definition: IfxEvadc.h:494
IfxEvadc_ChannelId_7
Channel 7.
Definition: IfxEvadc.h:148
IfxEvadc_initialiseAdcConverterClock
IFX_INLINE void IfxEvadc_initialiseAdcConverterClock(Ifx_EVADC *evadc, Ifx_EVADC_G *evadcG, IfxEvadc_ClockDividerFactor converterClockDivider)
Initialises ADC converter clock.
Definition: IfxEvadc.h:2642
IfxEvadc_EmuxCodingScheme_binary
Output the Channel Number in Binary code.
Definition: IfxEvadc.h:204
IfxEvadc_FifoMode_maximumMode
copy new result if bigger
Definition: IfxEvadc.h:257
IFXEVADC_NUM_ADC_SECONDARY_GROUPS
#define IFXEVADC_NUM_ADC_SECONDARY_GROUPS
Secondary Group.
Definition: IfxEvadc_cfg.h:108
IfxEvadc_Protection_resultRegisterGroup11
Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
Definition: IfxEvadc.h:373
IfxEvadc_setEmuxGlobalSampleTime
IFX_INLINE void IfxEvadc_setEmuxGlobalSampleTime(Ifx_EVADC *evadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
Sets the sample time of ADC global class for external channel.
Definition: IfxEvadc.h:2805
IfxEvadc_ClockDividerFactor_12
Frequency Divided by 12.
Definition: IfxEvadc.h:577
IfxEvadc_RampDirection_up
Increment ramp counter and stop when counter >= FCRCOMPB.
Definition: IfxEvadc.h:669
IfxEvadc_SupplyVoltageLevelControl
IfxEvadc_SupplyVoltageLevelControl
Adjusts the analog circuitry to the supply voltage used in the application system. Make sure to keep SUPLEV = 0b00 or 0b01 in the case of a 5 V supply.
Definition: IfxEvadc.h:850
IfxEvadc_BoundaryFlagActivationMode_1
Set boundary flag BFL if result FCR = 0 (input below the defined band or compare value), clear if FCR = 1 (input above)
Definition: IfxEvadc.h:513
IfxEvadc_BoundaryExtension_fastCompareResult2
Fast compare mode use as upper boundary Channel result 2.
Definition: IfxEvadc.h:110
IfxEvadc_BoundaryFlagSwControl_toggle
Toggle BFL.
Definition: IfxEvadc.h:547
IfxEvadc_FastCompareAnalogClockSynchronizationDelay_2
2 clock cycles delay
Definition: IfxEvadc.h:612
IfxEvadc_SrcNr_shared1
Select shared service request line 1.
Definition: IfxEvadc.h:443
IfxEvadc_Protection_resultRegisterGroup6
Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
Definition: IfxEvadc.h:368
IfxEvadc_ChannelSelectionStyle_channelNumber
selects an arbitrary channel
Definition: IfxEvadc.h:194
IfxEvadc_TriggerSource_6
Input signal REQTRx_6.
Definition: IfxEvadc.h:491
IfxEvadc_DataModificationMode_resultFilteringMode
Result Filtering Mode.
Definition: IfxEvadc.h:773
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:151
IfxEvadc_ClockDividerFactor_maxFrequency
Max. frequency.
Definition: IfxEvadc.h:566
IfxEvadc_BoundaryFlagSwControl_set
Set BFL.
Definition: IfxEvadc.h:546
IfxEvadc_AnalogInputPrechargeControl_noPrecharge
No Precharge.
Definition: IfxEvadc.h:727
IfxEvadc_ChannelResult_2
Use Channel result 2.
Definition: IfxEvadc.h:173
IfxEvadc_RequestSource_queue2
8 stage Queue2 request
Definition: IfxEvadc.h:422
IfxEvadc_ClockDividerFactor_14
Frequency Divided by 14.
Definition: IfxEvadc.h:579
IfxEvadc_BoundaryFlagInversionControl
IfxEvadc_BoundaryFlagInversionControl
Controls in in FCBFL.B.BFI options for whether to use Boundary Flag(FCM.B.BFL) directly or in a inver...
Definition: IfxEvadc.h:519
IfxEvadc_ClockDividerFactor_17
Frequency Divided by 17.
Definition: IfxEvadc.h:582
IfxEvadc_InputClasses_global1
Use global class 1.
Definition: IfxEvadc.h:300
IfxEvadc_SupplyVoltageLevelControl_lowerVoltage
Lower voltage range: assume a 3.3 V power supply is connected.
Definition: IfxEvadc.h:854
IfxEvadc_getGroupResult
IFX_INLINE void IfxEvadc_getGroupResult(Ifx_EVADC_G *group, Ifx_EVADC_G_RES *results, uint32 resultOffset, uint32 numResults)
Get conversion result for the group.
Definition: IfxEvadc.h:2546
IfxEvadc_GroupId_12
EVADC group 12 (Fast compare channel 0)
Definition: IfxEvadc_cfg.h:148
IfxEvadc_GatingMode_disabled
Gating is disabled, no conversion request are issued.
Definition: IfxEvadc.h:265
IfxEvadc_ChannelId_1
Channel 1.
Definition: IfxEvadc.h:142
IfxEvadc_enableReferencePrecharge
IFX_INLINE void IfxEvadc_enableReferencePrecharge(Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group)
Definition: IfxEvadc.h:2698
IfxEvadc_CalibrationSampleTimeControl_8
8*t_ADCI
Definition: IfxEvadc.h:744
IfxEvadc_setChannelInputClass
IFX_INLINE void IfxEvadc_setChannelInputClass(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, IfxEvadc_InputClasses inputClass)
Sets the channel input class.
Definition: IfxEvadc.h:2775
IfxEvadc_TriggerOperatingMode_fallingEdge
Trigger event upon a falling edge.
Definition: IfxEvadc.h:696
IfxEvadc_FastCompareServiceRequestGeneration
IfxEvadc_FastCompareServiceRequestGeneration
Criteria/mode settings for service request generation in FCM.B.SRG.
Definition: IfxEvadc.h:647
IfxEvadc_calculateSampleTime
IFX_INLINE uint32 IfxEvadc_calculateSampleTime(float32 analogFrequency, float32 sampleTime)
Calculate the time using analog frequency.
Definition: IfxEvadc.h:2202
IfxEvadc_AnalogInputPrechargeControl
IfxEvadc_AnalogInputPrechargeControl
Analog Input Precharge Control for Standard Conversions.
Definition: IfxEvadc.h:725
IfxEvadc_GatingSource
IfxEvadc_GatingSource
External trigger gating defined in MODULE_EVADC.G[x].QCTRLy.GTSEL(x=0,1,..,11;y=0,1,..,7)
Definition: IfxEvadc.h:273
IfxEvadc_getGroupSampleTime
IFX_INLINE float32 IfxEvadc_getGroupSampleTime(Ifx_EVADC_G *evadcG, uint8 inputClassNum, float32 analogFrequency)
Gets the EVADC input class channel sample time.
Definition: IfxEvadc.h:2557
IfxEvadc_GroupId
IfxEvadc_GroupId
VADC Groups.
Definition: IfxEvadc_cfg.h:134
IfxEvadc_ChannelResult_4
Use Channel result 4.
Definition: IfxEvadc.h:175
IfxEvadc_Protection_serviceGroup6
Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
Definition: IfxEvadc.h:353
IfxEvadc_EmuxSelectValue_2
Start Selection Value 2.
Definition: IfxEvadc.h:232
IfxEvadc_GatingSource_8
Input signal REQGTx_8.
Definition: IfxEvadc.h:283
IfxEvadc_Protection_serviceGroup3
Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
Definition: IfxEvadc.h:350
IfxEvadc_Protection_channelControl7
Access control for GxCHCTR7.
Definition: IfxEvadc.h:324
IfxEvadc_ChannelResult_3
Use Channel result 3.
Definition: IfxEvadc.h:174
IfxEvadc_RequestSlotStartMode
IfxEvadc_RequestSlotStartMode
Request source start mode defined in MODULE_EVADC.G[x].ARBPR.CSMy(x=0,1,...,11;y=0,1,2)
Definition: IfxEvadc.h:410
IfxEvadc_FastCompareAutomaticUpdate_rampCounter
Value(s) copied from ramp counter on ramp start or counter update.
Definition: IfxEvadc.h:632
IfxEvadc_getResultRegisterAddress
IFX_INLINE volatile uint32 * IfxEvadc_getResultRegisterAddress(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channel)
Returns the pointer to the result register.
Definition: IfxEvadc.h:3237
IfxEvadc_FastCompareAutomaticUpdate
IfxEvadc_FastCompareAutomaticUpdate
Defines the source of the value(s) in bitfield FCM.B.FCREF.
Definition: IfxEvadc.h:628
IfxEvadc_setEmuxInterfaceForGroup
IFX_INLINE void IfxEvadc_setEmuxInterfaceForGroup(Ifx_EVADC *evadc, IfxEvadc_EmuxInterface emuxInterface, IfxEvadc_GroupId group)
Sets the Emux Interface for a particular group.
Definition: IfxEvadc.h:2823
IfxEvadc_ChannelNoiseReduction
IfxEvadc_ChannelNoiseReduction
Conversion Mode for standard Conversion channel precision defined in MODULE_EVADC.G[x].CHCTR[y].B.ICLASS[y].B.CMS(x=0,1,...,11;y=0,1)
Definition: IfxEvadc.h:750
IfxEvadc_RampRunControl
IfxEvadc_RampRunControl
Defines the run conditions for the ramp generation in FCM.B.RUNRAMP.
Definition: IfxEvadc.h:674
IfxEvadc_EmuxSelectValue_3
Start Selection Value 3.
Definition: IfxEvadc.h:233
IfxEvadc_Protection_initFastCompareChannel3
Access control for GyFCBFL, GyFCHYST, GyFCCTR, GyFCM, GyFCRAMP.
Definition: IfxEvadc.h:383
IfxEvadc_getStartupCalibrationStatus
IFX_INLINE boolean IfxEvadc_getStartupCalibrationStatus(Ifx_EVADC *evadc)
get status of GLOBCFG.SUCAL Bit field
Definition: IfxEvadc.h:2614
IfxEvadc_ClockDividerFactor_9
Frequency Divided by 9.
Definition: IfxEvadc.h:574
u
uint32 min u
Definition: IfxCpu_IntrinsicsDcc.h:143
IFXEVADC_NUM_ADC_PRIMARY_GROUPS
#define IFXEVADC_NUM_ADC_PRIMARY_GROUPS
number of primary Groups
Definition: IfxEvadc_cfg.h:104
IfxEvadc_Status_invalidGroup
Invalid group number.
Definition: IfxEvadc.h:455
IfxEvadc_AnalogConverterMode
IfxEvadc_AnalogConverterMode
Defined in MODULE_EVADC.G[x].ARBCFG.B.ANONS and ANONC.
Definition: IfxEvadc.h:86
IfxEvadc_clearQueue
IFX_INLINE void IfxEvadc_clearQueue(Ifx_EVADC_G *evadcG, boolean flushQueue, IfxEvadc_RequestSource sourceType)
Clears all the queue entries including backup stage.
Definition: IfxEvadc.h:2238
IfxEvadc_ClockDividerFactor_23
Frequency Divided by 23.
Definition: IfxEvadc.h:588
IfxEvadc_ClockDividerFactor_3
Frequency Divided by 3.
Definition: IfxEvadc.h:568
IfxEvadc_Status
IfxEvadc_Status
API return values defined in MODULE_EVADC.G[x].QSR0.U,MODULE_EVADC.G[x].QSR1.U,MODULE_EVADC.G[x].QSR2.U(x=0,1,...,11)
Definition: IfxEvadc.h:451
IfxEvadc_getFastCompareExternalTriggerLevelStatus
IFX_INLINE boolean IfxEvadc_getFastCompareExternalTriggerLevelStatus(Ifx_EVADC_FC *evadcFC)
Returns current level of the selected trigger input.
Definition: IfxEvadc.h:2469
IfxEvadc_disablePostCalibration
IFX_INLINE void IfxEvadc_disablePostCalibration(Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group, boolean enabled)
Disables the post calibration.
Definition: IfxEvadc.h:2295
IfxEvadc_Emux_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxEvadc_PinMap.h:69
IfxEvadc_ChannelEventMode_aboveCompareValue
Generate a service request in case the result is above compare value.
Definition: IfxEvadc.h:555
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxEvadc_CalibrationSampleTimeControl
IfxEvadc_CalibrationSampleTimeControl
Definition: IfxEvadc.h:739
IfxEvadc_ChannelEventMode
IfxEvadc_ChannelEventMode
Channel Event Mode for configuring generation of events for Fast Compare channels in FCCTRL...
Definition: IfxEvadc.h:552
IfxEvadc_SuspendMode
IfxEvadc_SuspendMode
OCDS Suspend Control (OCDS.SUS)
Definition: IfxEvadc.h:464
IfxEvadc_initEmuxPin
IFX_INLINE void IfxEvadc_initEmuxPin(const IfxEvadc_Emux_Out *emux, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a EMUX output.
Definition: IfxEvadc.h:2628
IfxEvadc_AnalogInputPrechargeControl_8Cycles
Precharge for 8 clock cycles.
Definition: IfxEvadc.h:728
IfxEvadc_ExternalMultiplexerMode_sequence
Select Sequence Mode.
Definition: IfxEvadc.h:248
IfxEvadc_IdlePrecharge_referenceBy2
ThSampling capacitor is precharged to approx. half the reference when idle.
Definition: IfxEvadc.h:802
IfxEvadc_ArbitrationRounds_4_slots
An arbitration round contains 4 arbitration slots.
Definition: IfxEvadc.h:98
IfxEvadc_getChannelInputclass
IFX_INLINE IfxEvadc_InputClasses IfxEvadc_getChannelInputclass(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex)
get channel Input class
Definition: IfxEvadc.h:2390
IfxEvadc_BoundaryExtension_fastCompareResult12
Fast compare mode use as upper boundary Channel result 12.
Definition: IfxEvadc.h:120
IfxEvadc_DataReductionControlMode
IfxEvadc_DataReductionControlMode
Definition: IfxEvadc.h:777
IfxEvadc_Protection_serviceGroup1
Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
Definition: IfxEvadc.h:348
IfxEvadc_ChannelNoiseReductionEMUX_standardConversion
Standard conversion.
Definition: IfxEvadc.h:762
IfxEvadc_isModuleSuspended
IFX_INLINE boolean IfxEvadc_isModuleSuspended(Ifx_EVADC *evadc)
Returns the module&#39;s suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspende...
Definition: IfxEvadc.h:2679
IfxEvadc_Protection_serviceGroup14
Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
Definition: IfxEvadc.h:361
IfxEvadc_GatingSource_11
Input signal REQGTx_11.
Definition: IfxEvadc.h:286
IfxEvadc_ChannelId_12
Channel 12.
Definition: IfxEvadc.h:153
IfxEvadc_SampleSynchronization_synchronizeSampleTiming
Sample timing is synchronized.This is recommended for operation of several ADCs.
Definition: IfxEvadc.h:688
IfxEvadc_ChannelId_4
Channel 4.
Definition: IfxEvadc.h:145
IfxEvadc_AnalogClockSynchronizationDelay_0
No Delay.
Definition: IfxEvadc.h:713
IfxEvadc_Protection_initGroup12
Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
Definition: IfxEvadc.h:344
IfxEvadc_EmuxCodingScheme
IfxEvadc_EmuxCodingScheme
Specifies the External Coding scheme(binary/gray) defined in Ifx_EVADC.G[x].EMUXCTR.B.EMXCOD.
Definition: IfxEvadc.h:202
IfxEvadc_TriggerSource_1
Input signal REQTRx_1.
Definition: IfxEvadc.h:486
IfxEvadc_Protection_resultRegisterGroup0
Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
Definition: IfxEvadc.h:362
IfxEvadc_EmuxSampleTimeControl
IfxEvadc_EmuxSampleTimeControl
External Multiplexer sample time control defined in Ifx_EVADC.G[x].EMUXCTR.B.EMXST.
Definition: IfxEvadc.h:219
IfxEvadc_BoundaryFlagNodePointer_disabled
Disabled, no common output signal.
Definition: IfxEvadc.h:537
IfxEvadc_setAnalogInputPrechargeControlEMUX
IFX_INLINE void IfxEvadc_setAnalogInputPrechargeControlEMUX(Ifx_EVADC_G *evadcG, uint8 inputClassNum, IfxEvadc_AnalogInputPrechargeControl mode)
Definition: IfxEvadc.h:2743
IfxEvadc_FastCompareServiceRequestGeneration_newValue
Issue service request when a value is written to FCREF.
Definition: IfxEvadc.h:651
IfxEvadc_Protection_initFastCompareChannel1
Access control for GyFCBFL, GyFCHYST, GyFCCTR, GyFCM, GyFCRAMP.
Definition: IfxEvadc.h:379
IfxEvadc_TriggerOperatingMode_risingEdge
Trigger event upon a rising edge.
Definition: IfxEvadc.h:697
IfxEvadc_configureWaitForReadModeForGlobalResultRegister
IFX_INLINE void IfxEvadc_configureWaitForReadModeForGlobalResultRegister(Ifx_EVADC *evadc, boolean enabled)
access function to enable/disable wait for read mode for global result register
Definition: IfxEvadc.h:2261
IfxEvadc_GatingMode
IfxEvadc_GatingMode
gating mode defined in MODULE_EVADC.QMR0.ENGT
Definition: IfxEvadc.h:263
IfxEvadc_AnalogClockSynchronizationDelay_6
6 clock cycles delay
Definition: IfxEvadc.h:719
IfxEvadc_Protection_channelControl12
Access control for GxCHCTR12.
Definition: IfxEvadc.h:329
IfxEvadc_ClockDividerFactor_26
Frequency Divided by 26.
Definition: IfxEvadc.h:591
IfxEvadc_disableModule
IFX_INLINE void IfxEvadc_disableModule(Ifx_EVADC *evadc)
Disable EVADC kernel.
Definition: IfxEvadc.h:2285
IfxEvadc_BoundarySelection_group0
Use group class 0.
Definition: IfxEvadc.h:130
IfxEvadc_spreadEarlySamplePointStandardConversions
IFX_INLINE void IfxEvadc_spreadEarlySamplePointStandardConversions(Ifx_EVADC_G *evadcG, uint8 inputClassNum, IfxEvadc_SpreadEarlySamplePointStandardConversionsMode mode)
Definition: IfxEvadc.h:3142
IfxEvadc_CalibrationSampleTimeControl_4
4*t_ADCI
Definition: IfxEvadc.h:742
IfxEvadc_Protection_testFunction
Access control for GLOBTF.
Definition: IfxEvadc.h:395
IfxEvadc_GatingSource_13
Input signal REQGTx_13.
Definition: IfxEvadc.h:288
IfxEvadc_GatingSource_7
Input signal REQGTx_7.
Definition: IfxEvadc.h:282
IfxEvadc_getQueueSlotTriggerMode
IFX_EXTERN IfxEvadc_TriggerMode IfxEvadc_getQueueSlotTriggerMode(Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Gets the requested queue slot trigger mode.
Definition: IfxEvadc.c:299
IfxEvadc_ClockDividerFactor_28
Frequency Divided by 28.
Definition: IfxEvadc.h:593
IfxScuCcu.h
SCU basic functionality.
IfxEvadc_AnalogClockGenerationMode_unsynchronized
Unsynchronized mode: The analog clock is generated independently.
Definition: IfxEvadc.h:708
IfxEvadc_EmuxSelectValue_4
Start Selection Value 4.
Definition: IfxEvadc.h:234
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxEvadc_FastCompareRunControl_stop
Stop, no operation.
Definition: IfxEvadc.h:641
IfxEvadc_AnalogClockSynchronizationDelay_3
3 clock cycles delay
Definition: IfxEvadc.h:716
IfxEvadc_AnalogInputPrechargeControl_32cycles
Precharge for 32 clock cycles.
Definition: IfxEvadc.h:730
IfxEvadc_ClockDividerFactor_5
Frequency Divided by 5.
Definition: IfxEvadc.h:570
IfxEvadc_SrcNr_group0
service request line 0 of group
Definition: IfxEvadc.h:438
IfxEvadc_setFifoMode
IFX_INLINE void IfxEvadc_setFifoMode(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelResult resultRegister, IfxEvadc_FifoMode mode)
Definition: IfxEvadc.h:3023
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:248
IfxEvadc_ChannelResult_13
Use Channel result 13.
Definition: IfxEvadc.h:184
IfxEvadc_ChannelResult_15
Use Channel result 15.
Definition: IfxEvadc.h:186
IfxEvadc_TriggerOperatingMode
IfxEvadc_TriggerOperatingMode
Trigger operating mode in Fast Compare channels, to be entered in FCCTRL.B.XTMODE.
Definition: IfxEvadc.h:693
IfxEvadc_Protection
IfxEvadc_Protection
Access protection for Group registers defined in MODULE_EVADC.ACCPROT0.U.
Definition: IfxEvadc.h:315
IfxEvadc_setFastCompareChannelEventMode
IFX_INLINE void IfxEvadc_setFastCompareChannelEventMode(Ifx_EVADC_FC *evadcFC, IfxEvadc_ChannelEventMode mode)
Definition: IfxEvadc.h:2886
IfxEvadc_setAnalogConvertControl
IFX_INLINE void IfxEvadc_setAnalogConvertControl(Ifx_EVADC_G *evadcG, IfxEvadc_AnalogConverterMode analogConverterMode)
Sets analog converter group number.
Definition: IfxEvadc.h:2737
IfxEvadc_setSampleSynchronizationMode
IFX_INLINE void IfxEvadc_setSampleSynchronizationMode(Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group, IfxEvadc_SampleSynchronization mode)
Selects whether sample synchronization must be performed or not.
Definition: IfxEvadc.h:2711
IfxEvadc_ClockDividerFactor_19
Frequency Divided by 19.
Definition: IfxEvadc.h:584
IfxEvadc_TriggerSource_2
Input signal REQTRx_2.
Definition: IfxEvadc.h:487
IfxEvadc_setFastCompareSampleTimeControl
IFX_INLINE void IfxEvadc_setFastCompareSampleTimeControl(Ifx_EVADC_FC *evadcFC, uint8 additionalCycles)
Setting additional sample time in FCCTRL.B.STCF.
Definition: IfxEvadc.h:2959
IfxEvadc_AnalogClockGenerationMode
IfxEvadc_AnalogClockGenerationMode
Defines the way the analog clock is generated.
Definition: IfxEvadc.h:705
IfxEvadc_FastCompareAutomaticUpdate_alternateValue
While gate is active (high), value is copied from bitfield FCM.B.FCRCOMPA and while gate is inactive ...
Definition: IfxEvadc.h:631
IfxEvadc_ClockDividerFactor_7
Frequency Divided by 7.
Definition: IfxEvadc.h:572
IfxEvadc_FastCompareAnalogClockSynchronizationDelay_0
No delay.
Definition: IfxEvadc.h:610
IfxEvadc_ChannelNoiseReductionEMUX
IfxEvadc_ChannelNoiseReductionEMUX
Conversion Mode for EMUX Conversions.
Definition: IfxEvadc.h:760
IfxEvadc_setSuspendMode
IFX_INLINE void IfxEvadc_setSuspendMode(Ifx_EVADC *evadc, IfxEvadc_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and...
Definition: IfxEvadc.h:3113
IfxEvadc_SpreadEarlySamplePointStandardConversionsMode_nominal
Nominal sample timing.
Definition: IfxEvadc.h:831
IfxEvadc_enableFastCompareBoundaryFlag
IFX_INLINE void IfxEvadc_enableFastCompareBoundaryFlag(Ifx_EVADC_FC *evadcFC)
Definition: IfxEvadc.h:2302
IfxEvadc_TriggerSource_14
Input signal REQTRx_14.
Definition: IfxEvadc.h:499
IfxEvadc_setMasterIndex
IFX_INLINE void IfxEvadc_setMasterIndex(Ifx_EVADC_G *evadcG, uint8 masterIndex)
Sets the master index.
Definition: IfxEvadc.h:3071
IfxEvadc_ChannelEventMode_aboveOrBelowCompareValue
Generate a service request in case the result switches to either level(above or below the compare val...
Definition: IfxEvadc.h:557
IfxEvadc_Protection_channelControl4
Access control for GxCHCTR4.
Definition: IfxEvadc.h:321
IfxEvadc_startupCalibration
IFX_EXTERN void IfxEvadc_startupCalibration(Ifx_EVADC *evadc)
Starts ADC calibration and wait for the end of the calibration process.
Definition: IfxEvadc.c:597
IfxEvadc_setFastCompareAnalogInternalClockDivider
IFX_INLINE void IfxEvadc_setFastCompareAnalogInternalClockDivider(Ifx_EVADC_FC *evadcFC, IfxEvadc_ClockDividerFactor divider)
Defines the frequency of the analog converter clock fADCI (base clock for conversion steps)...
Definition: IfxEvadc.h:2866
IfxEvadc_RequestSlotPriority_low
Lowpriority.
Definition: IfxEvadc.h:403
IfxEvadc_TriggerSource_11
Input signal REQTRx_11.
Definition: IfxEvadc.h:496
IfxEvadc_ClockDividerFactor_10
Frequency Divided by 10.
Definition: IfxEvadc.h:575
IfxEvadc_Protection_serviceGroup9
Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
Definition: IfxEvadc.h:356
IfxEvadc_Protection_resultRegisterGroup8
Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
Definition: IfxEvadc.h:370
IfxEvadc_ChannelReference_standard
use Varef as reference
Definition: IfxEvadc.h:163
IfxEvadc_FastCompareAnalogClockSynchronizationDelay_3
3 clock cycles delay
Definition: IfxEvadc.h:613
IfxEvadc_Status_channelsStillPending
Conversion for some of the channels are still pending.
Definition: IfxEvadc.h:459
IfxEvadc_Protection_serviceGroup0
Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
Definition: IfxEvadc.h:347
IfxEvadc_ChannelResult_11
Use Channel result 11.
Definition: IfxEvadc.h:182
IfxEvadc_ChannelId
IfxEvadc_ChannelId
EVADC Channels.
Definition: IfxEvadc.h:138
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxEvadc_ArbitrationRounds_16_slots
An arbitration round contains 16 arbitration slots.
Definition: IfxEvadc.h:100
IfxEvadc_Protection_initGroup7
Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
Definition: IfxEvadc.h:339
IfxEvadc_GatingSource_3
Input signal REQGTx_3.
Definition: IfxEvadc.h:278
IfxEvadc_getAnalogFunctionConfiguration
IFX_INLINE Ifx_EVADC_G_ANCFG IfxEvadc_getAnalogFunctionConfiguration(Ifx_EVADC_G *evadcG)
Definition: IfxEvadc.h:2374
IfxEvadc_Protection_initFastCompareChannel2
Access control for GyFCBFL, GyFCHYST, GyFCCTR, GyFCM, GyFCRAMP.
Definition: IfxEvadc.h:381
IfxEvadc_Protection_channelControl9
Access control for GxCHCTR9.
Definition: IfxEvadc.h:326
IfxEvadc_ChannelResult_12
Use Channel result 12.
Definition: IfxEvadc.h:183
IfxEvadc_selectQueueGatingMode
IFX_INLINE void IfxEvadc_selectQueueGatingMode(Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource queue, IfxEvadc_GatingMode gatingMode)
Enable the Queue Gating Mode.
Definition: IfxEvadc.h:3197
IfxEvadc_StartupCalibration_noAction
No action.
Definition: IfxEvadc.h:842
IfxEvadc_disableReferencePrecharge
IFX_INLINE void IfxEvadc_disableReferencePrecharge(Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group)
Definition: IfxEvadc.h:3171
IfxEvadc_Protection_channelControl10
Access control for GxCHCTR10.
Definition: IfxEvadc.h:327
IfxEvadc_setFastCompareRampDirection
IFX_INLINE void IfxEvadc_setFastCompareRampDirection(Ifx_EVADC_FC *evadcFC, IfxEvadc_RampDirection rampDirection)
Ramp direction(up or down) settings.
Definition: IfxEvadc.h:2916
IfxEvadc_getGlobalSampleTime
IFX_INLINE float32 IfxEvadc_getGlobalSampleTime(Ifx_EVADC *evadc, uint8 inputClassNum, float32 analogFrequency)
Get Sample Time in sec.
Definition: IfxEvadc.h:2527
IfxEvadc_ChannelId_0
Channel 0.
Definition: IfxEvadc.h:141
IfxEvadc_ChannelResult
IfxEvadc_ChannelResult
Channel Result defined in MODULE_EVADC.G[x].CHCTR[y].B.RESREG(x=0,1,...,11;y=0,1....,16)
Definition: IfxEvadc.h:169
IfxEvadc_IdlePrecharge_currentLevel
The sampling capacitor keeps the current charge.
Definition: IfxEvadc.h:801
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxEvadc_TriggerSource_12
Input signal REQTRx_12.
Definition: IfxEvadc.h:497
IfxEvadc_getQueueSlotGatingSource
IFX_EXTERN IfxEvadc_GatingSource IfxEvadc_getQueueSlotGatingSource(Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Gets the requested queue slot gating input.
Definition: IfxEvadc.c:214
IfxEvadc_setFastCompareBoundaryFlagSwControl
IFX_INLINE void IfxEvadc_setFastCompareBoundaryFlagSwControl(Ifx_EVADC_FC *evadcFC, IfxEvadc_BoundaryFlagSwControl control)
Definition: IfxEvadc.h:2267
IfxEvadc_FastCompareAnalogClockSynchronizationDelay
IfxEvadc_FastCompareAnalogClockSynchronizationDelay
Definition: IfxEvadc.h:608
IfxEvadc_FastCompareServiceRequestGeneration_rampEnd
Issue service request when the ramp counter stops.
Definition: IfxEvadc.h:650
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
IfxEvadc_BoundaryExtension_fastCompareResult13
Fast compare mode use as upper boundary Channel result 13.
Definition: IfxEvadc.h:121
IfxEvadc_ChannelId_5
Channel 5.
Definition: IfxEvadc.h:146
IfxEvadc_BoundaryFlagInversionControl_invert
Use inverted BFL.
Definition: IfxEvadc.h:522
IfxEvadc_GatingMode_always
Conversion request is issued if at least 1 conversion pending bit is set.
Definition: IfxEvadc.h:266
IfxEvadc_getEmuxGroupSampleTime
IFX_INLINE float32 IfxEvadc_getEmuxGroupSampleTime(Ifx_EVADC_G *evadcG, uint8 inputClassNum, float32 analogFrequency)
Gets the ADC input class sample time of external channel.
Definition: IfxEvadc.h:2446
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxEvadc_Protection_resultRegisterGroup4
Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
Definition: IfxEvadc.h:366
IfxEvadc_Protection_serviceGroup2
Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
Definition: IfxEvadc.h:349
IfxEvadc_DataModificationMode_standardDataReduction
Standard Data Reduction.
Definition: IfxEvadc.h:772
IfxEvadc_GxBfl_Out
EVADC Boundary Flag pin mapping structure.
Definition: IfxEvadc_PinMap.h:56
IfxEvadc_getAdcModuleFrequency
IFX_EXTERN float32 IfxEvadc_getAdcModuleFrequency(Ifx_EVADC *evadc)
ADC Module Frequency in Hz.
Definition: IfxEvadc.c:181
IfxEvadc_FifoMode
IfxEvadc_FifoMode
FIFO mode enable.
Definition: IfxEvadc.h:253
IfxEvadc_ClockDividerFactor_15
Frequency Divided by 15.
Definition: IfxEvadc.h:580
IfxEvadc_DataReductionControlMode_9
If DMM=0b00, Accumulate 10 result values,if DMM=0b01, FIR:a=2,b=1,c=1.
Definition: IfxEvadc.h:788
IfxEvadc_enableServiceRequest
IFX_INLINE void IfxEvadc_enableServiceRequest(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelResult resultRegister)
Definition: IfxEvadc.h:2334
IfxEvadc_ChannelResult_0
Use Channel result 0.
Definition: IfxEvadc.h:171
IfxEvadc_TriggerSource_7
Input signal REQTRx_7.
Definition: IfxEvadc.h:492
IfxEvadc_FastCompareAnalogConverterControl
IfxEvadc_FastCompareAnalogConverterControl
Settings for Analog Coverter Controller to be done in FCM.B.ANON.
Definition: IfxEvadc.h:618
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:675
IfxEvadc_FastCompareAutomaticUpdate_analogSource
Value(s) written by the associated converter.
Definition: IfxEvadc.h:634
IfxEvadc_setResultNodeEventPointer0
IFX_INLINE void IfxEvadc_setResultNodeEventPointer0(Ifx_EVADC_G *evadcG, IfxEvadc_SrcNr resultSrcNr, IfxEvadc_ChannelResult resultRegister)
Sets result event node pointer 0.
Definition: IfxEvadc.h:3084
IfxEvadc_setCalibrationSampleTime
IFX_INLINE void IfxEvadc_setCalibrationSampleTime(Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group, IfxEvadc_CalibrationSampleTimeControl mode)
Select calibration sample time in units of t_ADC.
Definition: IfxEvadc.h:2219
IfxEvadc_setFastCompareAnalogConverter
IFX_INLINE void IfxEvadc_setFastCompareAnalogConverter(Ifx_EVADC_FC *evadcFC, IfxEvadc_FastCompareAnalogConverterControl mode)
Set Analog Converter Control modes.
Definition: IfxEvadc.h:2846
IfxEvadc_getResultBasedOnRequestSource
IFX_EXTERN Ifx_EVADC_G_RES IfxEvadc_getResultBasedOnRequestSource(Ifx_EVADC *evadc, Ifx_EVADC_G *group, IfxEvadc_ChannelId channel, IfxEvadc_RequestSource sourceType)
Get conversion result (Function does not care about the alignment) value = raw * gain + offset...
Definition: IfxEvadc.c:372
IfxEvadc_getQueueStatus
IFX_EXTERN IfxEvadc_Status IfxEvadc_getQueueStatus(Ifx_EVADC_G *group, IfxEvadc_RequestSource sourceType)
Gives the status of the Queue of a group by returning non zero value if the Queue is full...
Definition: IfxEvadc.c:321
IfxEvadc_ChannelId_none
None of EVADC channels.
Definition: IfxEvadc.h:140
IfxEvadc_Protection_serviceGroup11
Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
Definition: IfxEvadc.h:358
IfxEvadc_RampDirection_down
Decrement ramp counter and stop when counter <= FCRCOMPB.
Definition: IfxEvadc.h:668
IfxEvadc_FifoMode_minimumMode
copy new result if it is smaller
Definition: IfxEvadc.h:258
IfxEvadc_TriggerMode
IfxEvadc_TriggerMode
trigger definition defined in MODULE_EVADC.G[x].QCTRL0.XTMODE(x=0,1,..,11)
Definition: IfxEvadc.h:473
IfxEvadc_FifoMode_seperateResultRegister
seperate Result Register
Definition: IfxEvadc.h:255
IfxEvadc_GateOperatingMode_noGateFunction
No gate function.
Definition: IfxEvadc.h:659
IfxEvadc_SuspendMode_hard
Hard Suspend.
Definition: IfxEvadc.h:467
IfxEvadc_GatingSource_14
Input signal REQGTx_14.
Definition: IfxEvadc.h:289
IfxEvadc_RequestSlotPriority_lowest
Lowest priority.
Definition: IfxEvadc.h:402
IfxEvadc_ArbitrationMode_1
Definition: IfxEvadc.h:736
IfxEvadc_BoundaryFlagNodePointer_sharedServiceRequestLine1
Select shared service request line 1.
Definition: IfxEvadc.h:534
IfxEvadc_DataReductionControlMode_14
If DMM=0b00, Accumulate 15 result values,if DMM=0b01, IIR:a=2,b=2.
Definition: IfxEvadc.h:793
IfxEvadc_ChannelId_9
Channel 9.
Definition: IfxEvadc.h:150
IfxEvadc_ChannelId_11
Channel 11.
Definition: IfxEvadc.h:152


iLLD_TC38A: IfxEvadc_Adc.c Source File

  • Evadc
  • Adc
IfxEvadc_Adc.c
Go to the documentation of this file.
1 /**
2 * \file IfxEvadc_Adc.c
3 * \brief EVADC ADC details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxEvadc_Adc.h"
47
48 /** \addtogroup IfxLld_Evadc_Adc_Group
49 * \{ */
50 /******************************************************************************/
51 /*------------------------Inline Function Prototypes--------------------------*/
52 /******************************************************************************/
53
54 /** \brief Gets the master id
55 * \param slave Index of the group
56 * \param masterIndex master kernel index
57 * \return Master Group Id
58 */
59 IFX_INLINE IfxEvadc_GroupId IfxEvadc_Adc_getMasterId(IfxEvadc_GroupId slave, IfxEvadc_Adc_SYNCTR_STSEL masterIndex);
60
61 /** \brief Gets the current master kernel index.
62 * \param slave Index of the group
63 * \param master Index of the group
64 * \return current master kernel index
65 */
66 IFX_INLINE IfxEvadc_Adc_SYNCTR_STSEL IfxEvadc_Adc_getMasterKernelIndex(IfxEvadc_GroupId slave, IfxEvadc_GroupId master);
67
68 /** \} */
69
70 /** \addtogroup IfxLld_Evadc_Adc_Variables
71 * \{ */
72
73 /******************************************************************************/
74 /*------------------------Private Variables/Constants-------------------------*/
75 /******************************************************************************/
76
77 IFX_STATIC IFX_CONST IfxEvadc_Adc_SYNCTR_STSEL IfxEvadc_Adc_masterIndex[IFXEVADC_NUM_ADC_CAL_GROUPS][IFXEVADC_NUM_ADC_CAL_GROUPS] = {
78 /* 0 1 2 3 4 5 6 7 8 9 10 11 */
79 {0, 1, 2, 3, 0, 0, 0, 0, 0, 0, 0, 0}, /* Grp 0 */
80 {1, 0, 2, 3, 0, 0, 0, 0, 0, 0, 0, 0}, /* Grp 1 */
81 {1, 2, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0}, /* Grp 2 */
82 {1, 2, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0}, /* Grp 3 */
83 {0, 0, 0, 0, 0, 1, 2, 3, 0, 0, 0, 0}, /* Grp 4 */
84 {0, 0, 0, 0, 1, 0, 2, 3, 0, 0, 0, 0}, /* Grp 5 */
85 {0, 0, 0, 0, 1, 2, 0, 3, 0, 0, 0, 0}, /* Grp 6 */
86 {0, 0, 0, 0, 1, 2, 3, 0, 0, 0, 0, 0}, /* Grp 7 */
87 {0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3}, /* Grp 8 */
88 {0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 2, 3}, /* Grp 9 */
89 {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 0, 3}, /* Grp 10*/
90 {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 0} /* Grp 11*/
91 };
92
93 /** \} */
94
95 /******************************************************************************/
96 /*---------------------Inline Function Implementations------------------------*/
97 /******************************************************************************/
98
99 IFX_INLINE IfxEvadc_GroupId IfxEvadc_Adc_getMasterId(IfxEvadc_GroupId slave, IfxEvadc_Adc_SYNCTR_STSEL masterIndex)
100 {
101 uint8 i, idxOffset;
102 IfxEvadc_GroupId masterId = slave;
103
104 if (masterIndex == 0)
105 {
106 masterId = slave;
107 }
108 else
109 {
110 idxOffset = (slave < 4) ? 0 : 4; /* 4 is the index in the above IfxEvadc_Adc_masterIndex about which symmetry is observed */
111
112 for (i = 0; i < 4; i++)
113 {
114 if (IfxEvadc_Adc_masterIndex[slave][i + idxOffset] == masterIndex)
115 {
116 return (IfxEvadc_GroupId)(i + idxOffset);
117 }
118 }
119 }
120
121 return masterId;
122 }
123
124
125 IFX_INLINE IfxEvadc_Adc_SYNCTR_STSEL IfxEvadc_Adc_getMasterKernelIndex(IfxEvadc_GroupId slave, IfxEvadc_GroupId master)
126 {
127 return IfxEvadc_Adc_masterIndex[slave][master];
128 }
129
130
131 /******************************************************************************/
132 /*-------------------------Function Implementations---------------------------*/
133 /******************************************************************************/
134
135 void IfxEvadc_Adc_deInitGroup(IfxEvadc_Adc_Group *group)
136 {
137 Ifx_EVADC *evadc = IfxEvadc_Adc_getEvadcFromGroup(group);
138 Ifx_EVADC_G *evadcG = IfxEvadc_Adc_getGroupRegsFromGroup(group);
139 /* Get group index */
140 IfxEvadc_GroupId groupIndex = group->groupId;
141
142 /* Request Access to configuration registers */
143 IfxEvadc_enableAccess(evadc, (IfxEvadc_Protection)(IfxEvadc_Protection_initGroup0 + groupIndex));
144 IfxEvadc_resetGroup(evadcG);
145 IfxEvadc_disableAccess(evadc, (IfxEvadc_Protection)(IfxEvadc_Protection_initGroup0 + groupIndex));
146 }
147
148
149 void IfxEvadc_Adc_getChannelConfig(IfxEvadc_Adc_Channel *channel, IfxEvadc_Adc_ChannelConfig *config)
150 {
151 Ifx_EVADC_G *evadcG = IfxEvadc_Adc_getGroupRegsFromGroup(channel->group);
152 IfxEvadc_ChannelId channelIndex = channel->channel;
153
154 config->channelId = channel->channel;
155 config->group = channel->group;
156
157 Ifx_EVADC_G_CHCTR tempChctr;
158 tempChctr.U = 0;
159 tempChctr = IfxEvadc_getChannelControlConfig(evadcG, channelIndex);
160
161 config->inputClass = (IfxEvadc_InputClasses)tempChctr.B.ICLSEL;
162 config->reference = (IfxEvadc_ChannelReference)tempChctr.B.REFSEL;
163 config->resultRegister = (IfxEvadc_ChannelResult)tempChctr.B.RESREG;
164 config->globalResultUsage = tempChctr.B.RESTGT;
165 config->lowerBoundary = (IfxEvadc_BoundarySelection)tempChctr.B.BNDSELL;
166 config->upperBoundary = (IfxEvadc_BoundarySelection)tempChctr.B.BNDSELU;
167 config->boundaryMode = (IfxEvadc_BoundaryExtension)tempChctr.B.BNDSELX;
168 config->limitCheck = (IfxEvadc_LimitCheck)tempChctr.B.CHEVMODE;
169 config->synchonize = tempChctr.B.SYNC;
170 config->rightAlignedStorage = tempChctr.B.RESPOS;
171
172 uint32 channelServiceRequestNodePtr;
173 /* Get Channel index */
174 IfxEvadc_GroupId groupIndex = channel->group->groupId;
175
176 if (config->channelId < IfxEvadc_ChannelId_8)
177 {
178 channelServiceRequestNodePtr = ((IfxEvadc_getChannelServiceRequestNodePointer0(evadcG)).U >> (channel->channel * 4)) & 0xF;
179 }
180 else
181 {
182 channelServiceRequestNodePtr = ((IfxEvadc_getChannelServiceRequestNodePointer1(evadcG)).U >> ((channel->channel - IfxEvadc_ChannelId_8) * 4)) & 0xF;
183 }
184
185 volatile Ifx_SRC_SRCR *src = IfxEvadc_getSrcAddress(groupIndex, (IfxEvadc_SrcNr)channelServiceRequestNodePtr);
186
187 if (src->B.SRE == 1)
188 {
189 config->channelSrcNr = (IfxEvadc_SrcNr)channelServiceRequestNodePtr;
190 config->channelPriority = (Ifx_Priority)src->B.SRPN;
191 config->channelServProvider = (IfxSrc_Tos)src->B.TOS;
192 }
193 else
194 {
195 config->channelSrcNr = (IfxEvadc_SrcNr)0;
196 config->channelPriority = (Ifx_Priority)0;
197 config->channelServProvider = (IfxSrc_Tos)0;
198 }
199
200 uint32 resultServiceRequestNodePtr;
201
202 if (config->resultRegister < IfxEvadc_ChannelResult_8)
203 {
204 resultServiceRequestNodePtr = ((IfxEvadc_getChannelResultServiceRequestNodePointer0(evadcG)).U >> (channel->channel * 4)) & 0xF;
205 }
206 else
207 {
208 resultServiceRequestNodePtr = ((IfxEvadc_getChannelResultServiceRequestNodePointer1(evadcG)).U >> ((channel->channel - IfxEvadc_ChannelResult_8) * 4)) & 0xF;
209 }
210
211 src = IfxEvadc_getSrcAddress(groupIndex, (IfxEvadc_SrcNr)resultServiceRequestNodePtr);
212
213 if (src->B.SRE == 1)
214 {
215 config->resultSrcNr = (IfxEvadc_SrcNr)resultServiceRequestNodePtr;
216 config->resultPriority = (Ifx_Priority)src->B.SRPN;
217 config->resultServProvider = (IfxSrc_Tos)src->B.TOS;
218 }
219 else
220 {
221 config->resultSrcNr = (IfxEvadc_SrcNr)0;
222 config->resultPriority = (Ifx_Priority)0;
223 config->resultServProvider = (IfxSrc_Tos)0;
224 }
225 }
226
227
228 void IfxEvadc_Adc_getGroupConfig(IfxEvadc_Adc_Group *group, IfxEvadc_Adc_GroupConfig *config)
229 {
230 uint8 inputClassNum;
231 Ifx_EVADC_G *evadcG = group->group;
232 float32 analogFrequency = IfxEvadc_getAdcAnalogFrequency(evadcG);
233
234 config->groupId = group->groupId;
235 config->module = &group->module;
236
237 for (inputClassNum = 0; inputClassNum < IFXEVADC_NUM_INPUTCLASSES; inputClassNum++)
238 {
239 config->inputClass[inputClassNum].conversionMode = IfxEvadc_getGroupConversionMode(evadcG, inputClassNum);
240 config->inputClass[inputClassNum].sampleTime = IfxEvadc_getGroupSampleTime(evadcG, inputClassNum, analogFrequency);
241 }
242
243 if (IfxEvadc_isRequestQueueSlotEnabled(evadcG, IfxEvadc_RequestSource_queue0) == TRUE)
244 {
245 config->arbiter.requestSlotQueue0Enabled = TRUE;
246 config->queueRequest[0].requestSlotPrio = IfxEvadc_getQueueSlotPriority(evadcG, IfxEvadc_RequestSource_queue0);
247 config->queueRequest[0].requestSlotStartMode = IfxEvadc_getQueueSlotStartMode(evadcG, IfxEvadc_RequestSource_queue0);
248
249 config->queueRequest[0].triggerConfig.triggerSource = IfxEvadc_getQueueSlotTriggerInput(evadcG, IfxEvadc_RequestSource_queue0);
250 config->queueRequest[0].triggerConfig.triggerMode = IfxEvadc_getQueueSlotTriggerMode(evadcG, IfxEvadc_RequestSource_queue0);
251
252 if (config->queueRequest[0].triggerConfig.triggerSource != IfxEvadc_TriggerSource_15)
253 {
254 config->queueRequest[0].triggerConfig.gatingMode = IfxEvadc_getQueueSlotGatingMode(evadcG, IfxEvadc_RequestSource_queue0);
255 }
256 else if (config->queueRequest[0].triggerConfig.triggerMode != IfxEvadc_TriggerMode_noExternalTrigger)
257 {
258 config->queueRequest[0].triggerConfig.gatingMode = IfxEvadc_GatingMode_always;
259 }
260
261 config->queueRequest[0].triggerConfig.gatingSource = IfxEvadc_getQueueSlotGatingSource(evadcG, IfxEvadc_RequestSource_queue0);
262 config->queueRequest[0].flushQueueAfterInit = FALSE;
263 }
264 else
265 {
266 config->queueRequest[0].flushQueueAfterInit = FALSE;
267 config->queueRequest[0].triggerConfig.gatingMode = IfxEvadc_GatingMode_disabled;
268 config->queueRequest[0].triggerConfig.gatingSource = IfxEvadc_GatingSource_0; /* Use CCU6061 TRIG0 */
269 config->queueRequest[0].triggerConfig.triggerMode = IfxEvadc_TriggerMode_noExternalTrigger;
270 config->queueRequest[0].triggerConfig.triggerSource = IfxEvadc_TriggerSource_0; /* Trigger source taken from Gating Input */
271 }
272
273 if (IfxEvadc_isRequestQueueSlotEnabled(evadcG, IfxEvadc_RequestSource_queue1) == TRUE)
274 {
275 config->arbiter.requestSlotQueue1Enabled = TRUE;
276 config->queueRequest[1].requestSlotPrio = IfxEvadc_getQueueSlotPriority(evadcG, IfxEvadc_RequestSource_queue1);
277 config->queueRequest[1].requestSlotStartMode = IfxEvadc_getQueueSlotStartMode(evadcG, IfxEvadc_RequestSource_queue1);
278
279 config->queueRequest[1].triggerConfig.triggerSource = IfxEvadc_getQueueSlotTriggerInput(evadcG, IfxEvadc_RequestSource_queue1);
280 config->queueRequest[1].triggerConfig.triggerMode = IfxEvadc_getQueueSlotTriggerMode(evadcG, IfxEvadc_RequestSource_queue1);
281
282 if (config->queueRequest[1].triggerConfig.triggerSource != IfxEvadc_TriggerSource_15)
283 {
284 config->queueRequest[1].triggerConfig.gatingMode = IfxEvadc_getQueueSlotGatingMode(evadcG, IfxEvadc_RequestSource_queue1);
285 }
286 else if (config->queueRequest[1].triggerConfig.triggerMode != IfxEvadc_TriggerMode_noExternalTrigger)
287 {
288 config->queueRequest[1].triggerConfig.gatingMode = IfxEvadc_GatingMode_always;
289 }
290
291 config->queueRequest[1].triggerConfig.gatingSource = IfxEvadc_getQueueSlotGatingSource(evadcG, IfxEvadc_RequestSource_queue1);
292 config->queueRequest[1].flushQueueAfterInit = FALSE;
293 }
294 else
295 {
296 config->queueRequest[1].flushQueueAfterInit = FALSE;
297 config->queueRequest[1].triggerConfig.gatingMode = IfxEvadc_GatingMode_disabled;
298 config->queueRequest[1].triggerConfig.gatingSource = IfxEvadc_GatingSource_0; /* Use CCU6061 TRIG0 */
299 config->queueRequest[1].triggerConfig.triggerMode = IfxEvadc_TriggerMode_noExternalTrigger;
300 config->queueRequest[1].triggerConfig.triggerSource = IfxEvadc_TriggerSource_0; /* Trigger source taken from Gating Input */
301 }
302
303 if (IfxEvadc_isRequestQueueSlotEnabled(evadcG, IfxEvadc_RequestSource_queue2) == TRUE)
304 {
305 config->arbiter.requestSlotQueue2Enabled = TRUE;
306 config->queueRequest[2].requestSlotPrio = IfxEvadc_getQueueSlotPriority(evadcG, IfxEvadc_RequestSource_queue2);
307 config->queueRequest[2].requestSlotStartMode = IfxEvadc_getQueueSlotStartMode(evadcG, IfxEvadc_RequestSource_queue2);
308
309 config->queueRequest[2].triggerConfig.triggerSource = IfxEvadc_getQueueSlotTriggerInput(evadcG, IfxEvadc_RequestSource_queue2);
310 config->queueRequest[2].triggerConfig.triggerMode = IfxEvadc_getQueueSlotTriggerMode(evadcG, IfxEvadc_RequestSource_queue2);
311
312 if (config->queueRequest[2].triggerConfig.triggerSource != IfxEvadc_TriggerSource_15)
313 {
314 config->queueRequest[2].triggerConfig.gatingMode = IfxEvadc_getQueueSlotGatingMode(evadcG, IfxEvadc_RequestSource_queue2);
315 }
316 else if (config->queueRequest[2].triggerConfig.triggerMode != IfxEvadc_TriggerMode_noExternalTrigger)
317 {
318 config->queueRequest[2].triggerConfig.gatingMode = IfxEvadc_GatingMode_always;
319 }
320
321 config->queueRequest[2].triggerConfig.gatingSource = IfxEvadc_getQueueSlotGatingSource(evadcG, IfxEvadc_RequestSource_queue2);
322 config->queueRequest[2].flushQueueAfterInit = FALSE;
323 }
324 else
325 {
326 config->queueRequest[2].flushQueueAfterInit = FALSE;
327 config->queueRequest[2].triggerConfig.gatingMode = IfxEvadc_GatingMode_disabled;
328 config->queueRequest[2].triggerConfig.gatingSource = IfxEvadc_GatingSource_0; /* Use CCU6061 TRIG0 */
329 config->queueRequest[2].triggerConfig.triggerMode = IfxEvadc_TriggerMode_noExternalTrigger;
330 config->queueRequest[2].triggerConfig.triggerSource = IfxEvadc_TriggerSource_0; /* Trigger source taken from Gating Input */
331 }
332
333 config->master = IfxEvadc_Adc_getMasterId(group->groupId, IfxEvadc_getMasterIndex(evadcG));
334 config->disablePostCalibration = ((IfxEvadc_getAnalogFunctionConfiguration(evadcG)).U >> (IFX_EVADC_G_ANCFG_DPCAL_OFF)) & 0x1;
335 }
336
337
338 IfxEvadc_Status IfxEvadc_Adc_initChannel(IfxEvadc_Adc_Channel *channel, const IfxEvadc_Adc_ChannelConfig *config)
339 {
340 IfxEvadc_Status Status = IfxEvadc_Status_noError;
341 Ifx_EVADC *evadc = IfxEvadc_Adc_getEvadcFromGroup(config->group);
342 Ifx_EVADC_G *evadcG = IfxEvadc_Adc_getGroupRegsFromGroup(config->group);
343
344 channel->group = config->group;
345 IfxEvadc_GroupId groupIndex = channel->group->groupId;
346 IfxEvadc_ChannelId channelIndex = config->channelId;
347
348 /* Request Access to configuration registers */
349 IfxEvadc_enableAccess(evadc, (IfxEvadc_Protection)(IfxEvadc_Protection_channelControl0 + groupIndex));
350
351 /* Configure Channel */
352 {
353 IfxEvadc_setReferenceInput(evadcG, channelIndex, config->reference);
354 IfxEvadc_storeGroupResult(evadcG, channelIndex, config->resultRegister);
355 IfxEvadc_setLowerBoundary(evadcG, channelIndex, config->lowerBoundary);
356 IfxEvadc_setUpperBoundary(evadcG, channelIndex, config->upperBoundary);
357 IfxEvadc_setSyncRequest(evadcG, channelIndex, config->synchonize);
358 IfxEvadc_setChannelInputClass(evadcG, channelIndex, config->inputClass);
359 IfxEvadc_setChannelLimitCheckMode(evadcG, channelIndex, config->limitCheck);
360 IfxEvadc_setResultPosition(evadcG, channelIndex, config->rightAlignedStorage);
361 IfxEvadc_setBoundaryMode(evadcG, channelIndex, config->boundaryMode);
362 }
363
364 if ((config->channelPriority > 0) || (config->channelServProvider == IfxSrc_Tos_dma))
365 {
366 volatile Ifx_SRC_SRCR *src = IfxEvadc_getSrcAddress(groupIndex, config->channelSrcNr);
367
368 if (config->channelId < IfxEvadc_ChannelId_8)
369 {
370 IfxEvadc_setChannelEventNodePointer0(evadcG, config->channelSrcNr, channelIndex);
371 }
372 else
373 {
374 IfxEvadc_setChannelEventNodePointer1(evadcG, config->channelSrcNr, channelIndex);
375 }
376
377 IfxEvadc_clearChannelRequest(evadcG, config->channelId);
378 IfxSrc_init(src, config->channelServProvider, config->channelPriority);
379 IfxSrc_enable(src);
380 }
381 else
382 {
383 /* do nothing */
384 }
385
386 if ((config->resultPriority > 0) || (config->resultServProvider == IfxSrc_Tos_dma))
387 {
388 volatile Ifx_SRC_SRCR *src = IfxEvadc_getSrcAddress(groupIndex, config->resultSrcNr);
389 IfxEvadc_enableServiceRequest(evadcG, config->resultRegister);
390
391 if (config->resultRegister < IfxEvadc_ChannelResult_8)
392 {
393 IfxEvadc_setResultNodeEventPointer0(evadcG, config->resultSrcNr, config->resultRegister);
394 }
395 else
396 {
397 IfxEvadc_setResultNodeEventPointer1(evadcG, config->resultSrcNr, config->resultRegister);
398 }
399
400 IfxEvadc_clearAllResultRequests(evadcG);
401 IfxSrc_init(src, config->resultServProvider, config->resultPriority);
402 IfxSrc_enable(src);
403 }
404 else
405 {
406 /* do nothing */
407 }
408
409 IfxEvadc_disableAccess(evadc, (IfxEvadc_Protection)(IfxEvadc_Protection_channelControl0 + groupIndex));
410 /* Software initialization */
411 channel->resultreg = config->resultRegister;
412 channel->channel = config->channelId;
413
414 return Status;
415 }
416
417
418 void IfxEvadc_Adc_initChannelConfig(IfxEvadc_Adc_ChannelConfig *config, const IfxEvadc_Adc_Group *group)
419 {
420 static const IfxEvadc_Adc_ChannelConfig IfxEvadc_Adc_defaultChannelConfig = {
421 .channelId = IfxEvadc_ChannelId_0,
422 .group = NULL_PTR,
423 .inputClass = IfxEvadc_InputClasses_group0,
424 .reference = IfxEvadc_ChannelReference_standard,
425 .resultRegister = IfxEvadc_ChannelResult_0,
426 .globalResultUsage = FALSE,
427 .lowerBoundary = IfxEvadc_BoundarySelection_group0,
428 .upperBoundary = IfxEvadc_BoundarySelection_group0,
429 .boundaryMode = IfxEvadc_BoundaryExtension_standard,
430 .limitCheck = IfxEvadc_LimitCheck_noCheck,
431 .synchonize = FALSE,
432 .rightAlignedStorage = FALSE,
433 .resultPriority = 0,
434 .resultSrcNr = IfxEvadc_SrcNr_group0,
435 .resultServProvider = IfxSrc_Tos_cpu0,
436 .channelPriority = 0,
437 .channelSrcNr = IfxEvadc_SrcNr_group0,
438 .channelServProvider = IfxSrc_Tos_cpu0,
439 .dataModificationMode = IfxEvadc_DataModificationMode_standardDataReduction,
440 .dataReductionControlMode = IfxEvadc_DataReductionControlMode_0,
441 .waitForReadMode = IfxEvadc_WaitForRead_overwriteMode,
442 .fifoMode = IfxEvadc_FifoMode_seperateResultRegister
443 };
444 *config = IfxEvadc_Adc_defaultChannelConfig;
445 config->group = group;
446 }
447
448
449 void IfxEvadc_Adc_initExternalMultiplexerMode(Ifx_EVADC *evadc, const IfxEvadc_Adc_EmuxControl *emuxControl)
450 {
451 uint8 count = 0;
452 Ifx_EVADC_G *evadcG = &evadc->G[emuxControl->groupId];
453 IfxEvadc_setEmuxInterfaceForGroup(evadc, emuxControl->emuxInterface, emuxControl->groupId);
454
455 for (count = 0; count < 3; count++)
456 {
457 if (emuxControl->emuxOutPinConfig.pins[count] != NULL_PTR)
458 {
459 IfxEvadc_initEmuxPin(emuxControl->emuxOutPinConfig.pins[count], emuxControl->emuxOutPinConfig.outputMode, emuxControl->emuxOutPinConfig.padDriver);
460 }
461 }
462
463 IfxEvadc_configExternalMultiplexerMode(evadc, evadcG, emuxControl->mode, emuxControl->channels, emuxControl->startChannel, emuxControl->code, emuxControl->sampleTimeControl, emuxControl->channelSelectionStyle);
464 }
465
466
467 void IfxEvadc_Adc_initExternalMultiplexerModeConfig(IfxEvadc_Adc_EmuxControl *emuxConfig, Ifx_EVADC *evadc)
468 {
469 emuxConfig->evadc = evadc;
470 emuxConfig->channels = 0;
471 emuxConfig->groupId = IfxEvadc_GroupId_0;
472 emuxConfig->emuxInterface = IfxEvadc_EmuxInterface_0;
473 emuxConfig->startChannel = IfxEvadc_EmuxSelectValue_0;
474 emuxConfig->code = IfxEvadc_EmuxCodingScheme_binary;
475 emuxConfig->sampleTimeControl = IfxEvadc_EmuxSampleTimeControl_settingChanges;
476 emuxConfig->mode = IfxEvadc_ExternalMultiplexerMode_softwareControl;
477 emuxConfig->channelSelectionStyle = IfxEvadc_ChannelSelectionStyle_channelNumber;
478 IfxEvadc_Adc_EmuxPinConfig defaultConfig = {
479 .pins = {NULL_PTR},
480 .outputMode = IfxPort_OutputMode_pushPull,
481 .padDriver = (IfxPort_PadDriver)0,
482 };
483
484 emuxConfig->emuxOutPinConfig = defaultConfig;
485 }
486
487
488 void IfxEvadc_Adc_initFastCompareChannel(IfxEvadc_Adc_FastCompareChannel *fastCompareChannel, IfxEvadc_Adc_FastCompareChannelConfig *config)
489 {
490 Ifx_EVADC *evadc = config->module->evadc;
491
492 IfxEvadc_GroupId fastCompareChannelIndex = (IfxEvadc_GroupId)(config->fastCompareChannelId - 12);
493 fastCompareChannel->fastCompareChannelId = fastCompareChannelIndex;
494
495 Ifx_EVADC_FC *evadcFcSFR = &evadc->FC[fastCompareChannelIndex];
496
497 fastCompareChannel->fastCompareChannel = evadcFcSFR;
498 fastCompareChannel->module = *config->module;
499
500 Ifx_EVADC_FC_FCCTRL tempFCCTRL;
501
502 tempFCCTRL.U = evadcFcSFR->FCCTRL.U;
503
504 tempFCCTRL.B.CPWC = 1; /* Enabling write permissions */
505 tempFCCTRL.B.DIVA = config->clockDivider;
506 tempFCCTRL.B.CHEVMODE = config->channelEventMode;
507 tempFCCTRL.B.AIPF = config->analogInputPrechargeDuration;
508
509 tempFCCTRL.B.RPE = config->referenceInputPrechargeDuration;
510
511 tempFCCTRL.B.STCF = config->additionalClockCycles; /* No additional clock cycles in sample phase to be added*/
512 tempFCCTRL.B.XTWC = 1; /* Enabling write permissions */
513 tempFCCTRL.B.GTMODE = config->gateOperatingMode;
514 tempFCCTRL.B.XTPOL = config->externalTriggerPolarity;
515 tempFCCTRL.B.XTMODE = config->externalTriggerOperatingMode;
516
517 evadcFcSFR->FCCTRL.U = tempFCCTRL.U;
518
519 Ifx_EVADC_FC_FCM tempFCM;
520
521 tempFCM.U = evadcFcSFR->FCM.U;
522
523 tempFCM.B.FCMWC = 1; /* Enabling write permissions */
524
525 tempFCM.B.SSE = config->sampleTimingSynchronization;
526 tempFCM.B.ACSD = config->delay;
527
528 tempFCM.B.AUE = config->automaticUpdateMode;
529 tempFCM.B.SRG = config->serviceRequestGenerationEvent;
530 tempFCM.B.FCTRIV = config->triggerInterval;
531 tempFCM.B.ANON = config->analogConverterControllerMode;
532 tempFCM.B.FCRDIR = config->rampDirection;
533 tempFCM.B.RUNRAMP = config->rampGenerationMode;
534 tempFCM.B.RUNCOMP = config->runMode;
535
536 evadcFcSFR->FCM.U = tempFCM.U;
537
538 IfxEvadc_disableFastCompareBoundaryFlag(evadcFcSFR); /* Disabling the Boundary Flag to configure it*/
539 IfxEvadc_setFastCompareReferenceValue(evadcFcSFR, config->referenceValue);
540 IfxEvadc_selectFastCompareBoundaryFlagActivationMode(evadcFcSFR, config->boundaryFlagActivation);
541 IfxEvadc_setFastCompareBoundaryFlagInversion(evadcFcSFR, config->boundaryFlagInversion);
542 IfxEvadc_setFastCompareBoundaryFlagSwControl(evadcFcSFR, config->boundaryFlagAction);
543 IfxEvadc_selectFastCompareBoundaryFlagNodePointer(evadcFcSFR, config->boundaryFlagNodePointer);
544 IfxEvadc_enableFastCompareBoundaryFlag(evadcFcSFR); /* Enabling the Boundary Flag after configuring it*/
545 }
546
547
548 void IfxEvadc_Adc_initFastCompareChannelConfig(IfxEvadc_Adc_FastCompareChannelConfig *config, IfxEvadc_Adc *evadc)
549 {
550 config->module = evadc;
551 config->fastCompareChannelId = IfxEvadc_GroupId_12; /*Fast compare channel 0 */
552 config->boundaryFlagActivation = IfxEvadc_BoundaryFlagActivationMode_0;
553 config->boundaryFlagInversion = IfxEvadc_BoundaryFlagInversionControl_direct;
554 config->boundaryFlagNodePointer = IfxEvadc_BoundaryFlagNodePointer_commonBoundaryFlagOutput0;
555 config->boundaryFlagAction = IfxEvadc_BoundaryFlagSwControl_noAction;
556 config->channelEventMode = IfxEvadc_ChannelEventMode_aboveOrBelowCompareValue;
557 config->clockDivider = IfxEvadc_ClockDividerFactor_maxFrequency;
558 config->externalTriggerPolarity = IfxEvadc_ExternalTriggerPolarity_direct;
559 config->analogConverterControllerMode = IfxEvadc_FastCompareAnalogConverterControl_normal;
560 config->automaticUpdateMode = IfxEvadc_FastCompareAutomaticUpdate_sw;
561 config->runMode = IfxEvadc_FastCompareRunControl_stop;
562 config->rampGenerationMode = IfxEvadc_RampRunControl_stop;
563 config->serviceRequestGenerationEvent = IfxEvadc_FastCompareServiceRequestGeneration_off;
564 config->gateOperatingMode = IfxEvadc_GateOperatingMode_noGateFunction;
565 config->rampDirection = IfxEvadc_RampDirection_down;
566 config->externalTriggerOperatingMode = IfxEvadc_TriggerOperatingMode_noExternalTrigger;
567 config->additionalClockCycles = 0;
568 config->referenceInputPrechargeDuration = IfxEvadc_ReferencePrechargeControl_singleClockPhase;
569 config->delay = IfxEvadc_FastCompareAnalogClockSynchronizationDelay_0;
570 config->sampleTimingSynchronization = IfxEvadc_SampleSynchronization_off;
571 config->analogInputPrechargeDuration = IfxEvadc_AnalogInputPrechargeControl_noPrecharge;
572 config->triggerInterval = 0; /*Interval set as 16 clock cycles*/
573 config->referenceValue = 512;
574 config->boundaryFlagValue = FALSE;
575 }
576
577
578 IfxEvadc_Status IfxEvadc_Adc_initGroup(IfxEvadc_Adc_Group *group, const IfxEvadc_Adc_GroupConfig *config)
579 {
580 IfxEvadc_Status status = IfxEvadc_Status_noError;
581 Ifx_EVADC *evadc = config->module->evadc;
582 Ifx_EVADC_G *evadcG = &evadc->G[config->groupId];
583 float32 analogFrequency;
584
585 /* check for write access */
586 group->group = evadcG;
587 group->module = *config->module;
588 IfxEvadc_GroupId groupIndex = config->groupId;
589 group->groupId = groupIndex;
590 uint8 inputClassNum;
591
592 IfxEvadc_enableAccess(evadc, (IfxEvadc_Protection)(IfxEvadc_Protection_initGroup0 + groupIndex));
593
594 IfxEvadc_selectDoubleClockForMSBConversion(&evadc->G[groupIndex], groupIndex, (IfxEvadc_MsbConversionTime)config->doubleClockForMSBConversionSelection);
595 IfxEvadc_setSampleSynchronizationMode(&evadc->G[groupIndex], groupIndex, config->sampleSynchronizationEnabled);
596 IfxEvadc_setAnalogClockSynchronizationDelay(&evadc->G[groupIndex], groupIndex, config->analogClockSynchronizationDelay);
597 IfxEvadc_disablePostCalibration(&evadc->G[groupIndex], groupIndex, config->disablePostCalibration);
598 IfxEvadc_setCalibrationSampleTime(&evadc->G[groupIndex], groupIndex, config->calibrationSampleTimeControlMode);
599 IfxEvadc_setReferencePrechargeDuration(&evadc->G[groupIndex], groupIndex, config->referencePrechargeControlMode);
600
601 if (config->referencePrechargeEnabled)
602 {
603 IfxEvadc_enableReferencePrecharge(&evadc->G[groupIndex], groupIndex);
604 }
605 else
606 {
607 IfxEvadc_disableReferencePrecharge(&evadc->G[groupIndex], groupIndex);
608 }
609
610 if (config->inputBufferEnabled)
611 {
612 IfxEvadc_enableInputBuffer(&evadc->G[groupIndex], groupIndex);
613 }
614 else
615 {
616 IfxEvadc_disableInputBuffer(&evadc->G[groupIndex], groupIndex);
617 }
618
619 IfxEvadc_selectIdlePrechargeLevel(&evadc->G[groupIndex], groupIndex, config->idlePrechargeLevel);
620 IfxEvadc_setAnalogConvertControl(&evadc->G[groupIndex], config->analogConverterMode);
621
622 IfxEvadc_disableAccess(evadc, (IfxEvadc_Protection)(IfxEvadc_Protection_initGroup0 + groupIndex));
623
624 /* Set Analog Frequency */
625 if (IfxEvadc_initializeFAdcI(evadc, config->analogFrequency, group->group) == 0)
626 {
627 return IfxEvadc_Status_notInitialised;
628 }
629 else
630 {
631 /* do nothing */
632 }
633
634 analogFrequency = IfxEvadc_getAdcAnalogFrequency(group->group);
635
636 if (config->startupCalibration == TRUE)
637 {
638 /* execute calibration */
639 IfxEvadc_startupCalibration(evadc);
640 }
641
642 /* Request Access to configuration registers */
643 IfxEvadc_enableAccess(evadc, (IfxEvadc_Protection)(IfxEvadc_Protection_initGroup0 + groupIndex));
644
645 if (config->arbiter.requestSlotQueue0Enabled == TRUE)
646 {
647 /* Enable Arbiter slot, set Priority and start mode */
648 IfxEvadc_setArbiterPriority(evadcG, config->arbiter.requestSlotQueue0Enabled, config->queueRequest[0].requestSlotPrio, config->queueRequest[0].requestSlotStartMode, IfxEvadc_RequestSource_queue0);
649 }
650 else
651 {
652 /* Disable the slot */
653 IfxEvadc_setArbiterPriority(evadcG, FALSE, IfxEvadc_RequestSlotPriority_lowest, IfxEvadc_RequestSlotStartMode_waitForStart, IfxEvadc_RequestSource_queue0);
654 }
655
656 if (config->arbiter.requestSlotQueue1Enabled == TRUE)
657 {
658 /* Enable Arbiter slot, set Priority and start mode */
659 IfxEvadc_setArbiterPriority(evadcG, config->arbiter.requestSlotQueue1Enabled, config->queueRequest[1].requestSlotPrio, config->queueRequest[1].requestSlotStartMode, IfxEvadc_RequestSource_queue1);
660 }
661 else
662 {
663 /* Disable the slot */
664 IfxEvadc_setArbiterPriority(evadcG, FALSE, IfxEvadc_RequestSlotPriority_lowest, IfxEvadc_RequestSlotStartMode_waitForStart, IfxEvadc_RequestSource_queue1);
665 }
666
667 if (config->arbiter.requestSlotQueue2Enabled == TRUE)
668 {
669 /* Enable Arbiter slot, set Priority and start mode */
670 IfxEvadc_setArbiterPriority(evadcG, config->arbiter.requestSlotQueue2Enabled, config->queueRequest[2].requestSlotPrio, config->queueRequest[2].requestSlotStartMode, IfxEvadc_RequestSource_queue2);
671 }
672 else
673 {
674 /* Disable the slot */
675 IfxEvadc_setArbiterPriority(evadcG, FALSE, IfxEvadc_RequestSlotPriority_lowest, IfxEvadc_RequestSlotStartMode_waitForStart, IfxEvadc_RequestSource_queue2);
676 }
677
678 /* master slave configuration */
679 if (config->master != groupIndex)
680 {
681 uint8 masterIndex = IfxEvadc_Adc_getMasterKernelIndex(groupIndex, config->master);
682 IfxEvadc_setMasterIndex(evadcG, masterIndex);
683 }
684 else
685 {
686 /* do nothing */
687 }
688
689 /* Setup arbiter */
690 /* Turn off the group during initialization, see UM for sync mode */
691 IfxEvadc_setAnalogConvertControl(evadcG, IfxEvadc_AnalogConverterMode_off);
692
693 /* Setup queue0 request if enabled */
694 if (config->arbiter.requestSlotQueue0Enabled == TRUE)
695 {
696 const IfxEvadc_Adc_QueueConfig *queueSlot = &config->queueRequest[0];
697
698 /* configure external Trigger if enabled */
699 if (queueSlot->triggerConfig.triggerMode != IfxEvadc_TriggerMode_noExternalTrigger)
700 {
701 /* enable external trigger */
702 IfxEvadc_enableQueueSlotExternalTrigger(evadcG, IfxEvadc_RequestSource_queue0);
703 IfxEvadc_setQueueSlotTriggerOperatingConfig(evadcG, queueSlot->triggerConfig.triggerMode, queueSlot->triggerConfig.triggerSource, IfxEvadc_RequestSource_queue0);
704
705 /* if last input is used the trigger input selection is extend by Gating inputs */
706 if (queueSlot->triggerConfig.triggerSource == IfxEvadc_TriggerSource_15)
707 {
708 IfxEvadc_setQueueSlotGatingConfig(evadcG, queueSlot->triggerConfig.gatingSource, IfxEvadc_GatingMode_always, IfxEvadc_RequestSource_queue0);
709 }
710 else
711 {
712 /* do nothing, gating is configured later */
713 }
714 }
715 else
716 {
717 /* disable external trigger */
718 IfxEvadc_disableQueueSlotExternalTrigger(evadcG, IfxEvadc_RequestSource_queue0);
719 }
720
721 /* configure Gating if enabled */
722 if ((queueSlot->triggerConfig.triggerSource != IfxEvadc_TriggerSource_15))
723 {
724 IfxEvadc_setQueueSlotGatingConfig(evadcG, queueSlot->triggerConfig.gatingSource, queueSlot->triggerConfig.gatingMode, IfxEvadc_RequestSource_queue0);
725 }
726 else
727 {
728 /* do nothing, handled by trigger settings */
729 }
730
731 IfxEvadc_clearQueue(evadcG, (queueSlot->flushQueueAfterInit) ? 1 : 0, IfxEvadc_RequestSource_queue0);
732 }
733 else
734 {
735 /* do nothing */
736 }
737
738 if (config->arbiter.requestSlotQueue1Enabled == TRUE)
739 {
740 const IfxEvadc_Adc_QueueConfig *queueSlot = &config->queueRequest[1];
741
742 /* configure external Trigger if enabled */
743 if (queueSlot->triggerConfig.triggerMode != IfxEvadc_TriggerMode_noExternalTrigger)
744 {
745 /* enable external trigger */
746 IfxEvadc_enableQueueSlotExternalTrigger(evadcG, IfxEvadc_RequestSource_queue1);
747 IfxEvadc_setQueueSlotTriggerOperatingConfig(evadcG, queueSlot->triggerConfig.triggerMode, queueSlot->triggerConfig.triggerSource, IfxEvadc_RequestSource_queue1);
748
749 /* if last input is used the trigger input selection is extend by Gating inputs */
750 if (queueSlot->triggerConfig.triggerSource == IfxEvadc_TriggerSource_15)
751 {
752 IfxEvadc_setQueueSlotGatingConfig(evadcG, queueSlot->triggerConfig.gatingSource, IfxEvadc_GatingMode_always, IfxEvadc_RequestSource_queue1);
753 }
754 else
755 {
756 /* do nothing, gating is configured later */
757 }
758 }
759 else
760 {
761 /* disable external trigger */
762 IfxEvadc_disableQueueSlotExternalTrigger(evadcG, IfxEvadc_RequestSource_queue1);
763 }
764
765 /* configure Gating if enabled */
766 if ((queueSlot->triggerConfig.triggerSource != IfxEvadc_TriggerSource_15))
767 {
768 IfxEvadc_setQueueSlotGatingConfig(evadcG, queueSlot->triggerConfig.gatingSource, queueSlot->triggerConfig.gatingMode, IfxEvadc_RequestSource_queue1);
769 }
770 else
771 {
772 /* do nothing, handled by trigger settings */
773 }
774
775 IfxEvadc_clearQueue(evadcG, (queueSlot->flushQueueAfterInit) ? 1 : 0, IfxEvadc_RequestSource_queue1);
776 }
777 else
778 {
779 /* do nothing */
780 }
781
782 if (config->arbiter.requestSlotQueue2Enabled == TRUE)
783 {
784 const IfxEvadc_Adc_QueueConfig *queueSlot = &config->queueRequest[2];
785
786 /* configure external Trigger if enabled */
787 if (queueSlot->triggerConfig.triggerMode != IfxEvadc_TriggerMode_noExternalTrigger)
788 {
789 /* enable external trigger */
790 IfxEvadc_enableQueueSlotExternalTrigger(evadcG, IfxEvadc_RequestSource_queue2);
791 IfxEvadc_setQueueSlotTriggerOperatingConfig(evadcG, queueSlot->triggerConfig.triggerMode, queueSlot->triggerConfig.triggerSource, IfxEvadc_RequestSource_queue2);
792
793 /* if last input is used the trigger input selection is extend by Gating inputs */
794 if (queueSlot->triggerConfig.triggerSource == IfxEvadc_TriggerSource_15)
795 {
796 IfxEvadc_setQueueSlotGatingConfig(evadcG, queueSlot->triggerConfig.gatingSource, IfxEvadc_GatingMode_always, IfxEvadc_RequestSource_queue2);
797 }
798 else
799 {
800 /* do nothing, gating is configured later */
801 }
802 }
803 else
804 {
805 /* disable external trigger */
806 IfxEvadc_disableQueueSlotExternalTrigger(evadcG, IfxEvadc_RequestSource_queue2);
807 }
808
809 /* configure Gating if enabled */
810 if ((queueSlot->triggerConfig.triggerSource != IfxEvadc_TriggerSource_15))
811 {
812 IfxEvadc_setQueueSlotGatingConfig(evadcG, queueSlot->triggerConfig.gatingSource, queueSlot->triggerConfig.gatingMode, IfxEvadc_RequestSource_queue2);
813 }
814 else
815 {
816 /* do nothing, handled by trigger settings */
817 }
818
819 IfxEvadc_clearQueue(evadcG, (queueSlot->flushQueueAfterInit) ? 1 : 0, IfxEvadc_RequestSource_queue2);
820 }
821 else
822 {
823 /* do nothing */
824 }
825
826 /* turn on group after initialisation, only in master mode */
827 IfxEvadc_AnalogConverterMode convertMode = (config->master == groupIndex) ? IfxEvadc_AnalogConverterMode_normalOperation : IfxEvadc_AnalogConverterMode_off;
828 IfxEvadc_setAnalogConvertControl(evadcG, convertMode);
829
830 /* Post Calibration */
831 IfxEvadc_disablePostCalibration(evadcG, groupIndex, config->disablePostCalibration);
832
833 for (inputClassNum = 0; inputClassNum < IFXEVADC_NUM_INPUTCLASSES; inputClassNum++)
834 {
835 /* configure Group input class registers */
836 IfxEvadc_setGroupConversionMode(evadcG, inputClassNum, config->inputClass[inputClassNum].conversionMode);
837 /* Calculate Sample time ticks */
838 IfxEvadc_setGroupSampleTime(evadcG, inputClassNum, analogFrequency, config->inputClass[inputClassNum].sampleTime);
839 }
840
841 IfxEvadc_disableAccess(evadc, (IfxEvadc_Protection)(IfxEvadc_Protection_initGroup0 + groupIndex));
842
843 return status;
844 }
845
846
847 void IfxEvadc_Adc_initGroupConfig(IfxEvadc_Adc_GroupConfig *config, IfxEvadc_Adc *evadc)
848 {
849 static const IfxEvadc_Adc_GroupConfig IfxEvadc_Adc_defaultGroupConfig = {
850 .arbiter = {
851 .arbiterRoundLength = IfxEvadc_ArbitrationRounds_4_slots,
852 .requestSlotQueue0Enabled = FALSE,
853 .requestSlotQueue1Enabled = FALSE,
854 .requestSlotQueue2Enabled = FALSE,
855 },
856
857 .queueRequest = {
858 {
859 .flushQueueAfterInit = TRUE,
860 .triggerConfig = {
861 .gatingMode = IfxEvadc_GatingMode_disabled,
862 .gatingSource = IfxEvadc_GatingSource_0,
863 .triggerMode = IfxEvadc_TriggerMode_noExternalTrigger,
864 .triggerSource = IfxEvadc_TriggerSource_0,
865 },
866 .requestSlotPrio = IfxEvadc_RequestSlotPriority_low,
867 .requestSlotStartMode = IfxEvadc_RequestSlotStartMode_waitForStart,
868 },
869
870 {
871 .flushQueueAfterInit = TRUE,
872 .triggerConfig = {
873 .gatingMode = IfxEvadc_GatingMode_disabled,
874 .gatingSource = IfxEvadc_GatingSource_0,
875 .triggerMode = IfxEvadc_TriggerMode_noExternalTrigger,
876 .triggerSource = IfxEvadc_TriggerSource_0,
877 },
878 .requestSlotPrio = IfxEvadc_RequestSlotPriority_low,
879 .requestSlotStartMode = IfxEvadc_RequestSlotStartMode_waitForStart,
880 },
881
882 {
883 .flushQueueAfterInit = TRUE,
884 .triggerConfig = {
885 .gatingMode = IfxEvadc_GatingMode_disabled,
886 .gatingSource = IfxEvadc_GatingSource_0,
887 .triggerMode = IfxEvadc_TriggerMode_noExternalTrigger,
888 .triggerSource = IfxEvadc_TriggerSource_0,
889 },
890 .requestSlotPrio = IfxEvadc_RequestSlotPriority_low,
891 .requestSlotStartMode = IfxEvadc_RequestSlotStartMode_waitForStart,
892 }
893 },
894 .inputClass = {
895 {
896 .sampleTime = 1.0e-6,
897 .conversionMode = IfxEvadc_ChannelNoiseReduction_standardConversion,
898 .samplePointStandard = IfxEvadc_SpreadEarlySamplePointStandardConversionsMode_nominal,
899 .analogInputPrechargeControlStandard = IfxEvadc_AnalogInputPrechargeControl_noPrecharge, /* Set sample time to 1us */
900 .sampleTimeEMUX = 1.0e-6,
901 .conversionModeEMUX = IfxEvadc_ChannelNoiseReductionEMUX_standardConversion,
902 .samplePointEMUX = IfxEvadc_SpreadEarlySamplePointEMUXConversionsMode_nominal,
903 .analogInputPrechargeControlEMUX = IfxEvadc_AnalogInputPrechargeControl_noPrecharge,
904 },
905
906 {
907 .conversionMode = IfxEvadc_ChannelNoiseReduction_standardConversion,
908 .sampleTime = 1.0e-6,
909 .samplePointStandard = IfxEvadc_SpreadEarlySamplePointStandardConversionsMode_nominal,
910 .analogInputPrechargeControlStandard = IfxEvadc_AnalogInputPrechargeControl_noPrecharge, /* Set sample time to 1us */
911 .sampleTimeEMUX = 1.0e-6,
912 .conversionModeEMUX = IfxEvadc_ChannelNoiseReductionEMUX_standardConversion,
913 .samplePointEMUX = IfxEvadc_SpreadEarlySamplePointEMUXConversionsMode_nominal,
914 .analogInputPrechargeControlEMUX = IfxEvadc_AnalogInputPrechargeControl_noPrecharge,
915 }
916 },
917 .analogFrequency = IFXEVADC_DEFAULT_ANALOG_FREQ,
918 .startupCalibration = FALSE,
919 };
920
921 *config = IfxEvadc_Adc_defaultGroupConfig;
922 config->groupId = IfxEvadc_GroupId_0;
923 config->module = evadc;
924 config->master = config->groupId;
925 config->disablePostCalibration = FALSE;
926
927 config->doubleClockForMSBConversionSelection = FALSE;
928 config->sampleSynchronizationEnabled = IfxEvadc_SampleSynchronization_off;
929 config->analogClockSynchronizationDelay = IfxEvadc_AnalogClockSynchronizationDelay_0;
930 config->calibrationSampleTimeControlMode = IfxEvadc_CalibrationSampleTimeControl_4;
931 config->referencePrechargeControlMode = IfxEvadc_ReferencePrechargeControl_singleClockPhase;
932 config->referencePrechargeEnabled = FALSE;
933 config->inputBufferEnabled = FALSE;
934 config->idlePrechargeLevel = IfxEvadc_IdlePrecharge_currentLevel;
935 config->analogConverterMode = IfxEvadc_AnalogConverterMode_normalOperation;
936 config->inputClasses = IfxEvadc_InputClasses_group0;
937 }
938
939
940 IfxEvadc_Status IfxEvadc_Adc_initModule(IfxEvadc_Adc *evadc, const IfxEvadc_Adc_Config *config)
941 {
942 IfxEvadc_Status status = IfxEvadc_Status_noError;
943 Ifx_EVADC *evadcSFR = config->evadc;
944 evadc->evadc = evadcSFR;
945 uint8 inputClassNum;
946
947 /* Enable EVADC kernel clock */
948 IfxEvadc_enableModule(evadcSFR);
949
950 /* configure Global input class registers */
951 for (inputClassNum = 0; inputClassNum < IFXEVADC_NUM_GLOBAL_INPUTCLASSES; inputClassNum++)
952 {
953 /* configure ADC channel conversion mode */
954 IfxEvadc_setGlobalConversionMode(evadcSFR, inputClassNum, config->globalInputClass[inputClassNum].conversionMode);
955 }
956
957 IfxEvadc_Adc_setGlobalConfigurations(evadcSFR, config);
958
959 return status;
960 }
961
962
963 void IfxEvadc_Adc_initModuleConfig(IfxEvadc_Adc_Config *config, Ifx_EVADC *evadc)
964 {
965 config->evadc = evadc;
966 config->globalInputClass[0].conversionMode = IfxEvadc_ChannelNoiseReduction_standardConversion;
967 config->globalInputClass[1].conversionMode = IfxEvadc_ChannelNoiseReduction_standardConversion;
968 config->startupCalibrationControl = IfxEvadc_StartupCalibration_noAction;
969 config->analogClockGenerationMode = IfxEvadc_AnalogClockGenerationMode_synchronized;
970 config->supplyVoltage = IfxEvadc_SupplyVoltageLevelControl_automaticControl;
971 }
972
973
974 void IfxEvadc_Adc_setAnalogConvertControl(Ifx_EVADC *evadc, IfxEvadc_Adc_Group *group, IfxEvadc_AnalogConverterMode analogConverterMode)
975 {
976 IfxEvadc_GroupId groupIndex = group->groupId;
977 IfxEvadc_enableAccess(evadc, (IfxEvadc_Protection)(IfxEvadc_Protection_initGroup0 + groupIndex));
978 IfxEvadc_setAnalogConvertControl(&evadc->G[groupIndex], analogConverterMode);
979 IfxEvadc_disableAccess(evadc, (IfxEvadc_Protection)(IfxEvadc_Protection_initGroup0 + groupIndex));
980 }
981
982
983 void IfxEvadc_Adc_setGlobalConfigurations(Ifx_EVADC *evadc, const IfxEvadc_Adc_Config *config)
984 {
985 Ifx_EVADC_GLOBCFG tempGLOBCFG;
986 tempGLOBCFG.U = evadc->GLOBCFG.U;
987 tempGLOBCFG.B.CPWC = 1; //Write Access to SUPLEV and USC
988 tempGLOBCFG.B.USC = config->analogClockGenerationMode;
989 tempGLOBCFG.B.SUPLEV = config->supplyVoltage;
990 tempGLOBCFG.B.SUCAL = config->startupCalibrationControl;
991 evadc->GLOBCFG.U = tempGLOBCFG.U;
992 }
IfxEvadc_selectDoubleClockForMSBConversion
IFX_INLINE void IfxEvadc_selectDoubleClockForMSBConversion(Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group, IfxEvadc_MsbConversionTime mode)
Selects an additional clock cycle for the conversion step of the MSB.
Definition: IfxEvadc.h:2718
IfxEvadc_getQueueSlotPriority
IfxEvadc_RequestSlotPriority IfxEvadc_getQueueSlotPriority(Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Gets the request queue slot priority.
Definition: IfxEvadc.c:235
IfxEvadc_RampRunControl_stop
Stop, no operation.
Definition: IfxEvadc.h:676
IfxEvadc_DataReductionControlMode_0
If DMM=0b00, Data reduction disabled,if DMM=0b01, FIR:a=2,b=1,c=0.
Definition: IfxEvadc.h:779
IfxEvadc_AnalogConverterMode_off
Analog Converter off.
Definition: IfxEvadc.h:88
IfxEvadc_Adc_FastCompareChannelConfig::automaticUpdateMode
IfxEvadc_FastCompareAutomaticUpdate automaticUpdateMode
Defines the source of the value(s) in bitfield FCM.B.FCREF.
Definition: IfxEvadc_Adc.h:453
IfxEvadc_setReferenceInput
IFX_INLINE void IfxEvadc_setReferenceInput(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, IfxEvadc_ChannelReference reference)
Selects the refernce input.
Definition: IfxEvadc.h:3078
IfxEvadc_Adc_ChannelConfig::resultSrcNr
IfxEvadc_SrcNr resultSrcNr
Service node of the result trigger.
Definition: IfxEvadc_Adc.h:352
IfxEvadc_EmuxSelectValue_0
Start Selection Value 0.
Definition: IfxEvadc.h:230
IfxEvadc_getQueueSlotTriggerInput
IfxEvadc_TriggerSource IfxEvadc_getQueueSlotTriggerInput(Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Gets the requested queue slot trigger input.
Definition: IfxEvadc.c:277
IfxEvadc_InputClasses_group0
Use group class 0.
Definition: IfxEvadc.h:297
IfxEvadc_Adc_EmuxPinConfig::padDriver
IfxPort_PadDriver padDriver
Pad driver.
Definition: IfxEvadc_Adc.h:306
IfxEvadc_setReferencePrechargeDuration
IFX_INLINE void IfxEvadc_setReferencePrechargeDuration(Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group, IfxEvadc_ReferencePrechargeControl duration)
Definition: IfxEvadc.h:2691
IfxEvadc_Adc_GroupConfig::arbiter
IfxEvadc_Adc_ArbiterConfig arbiter
Arbiter configuration structure.
Definition: IfxEvadc_Adc.h:406
IfxEvadc_Adc_getGroupRegsFromGroup
IFX_INLINE Ifx_EVADC_G * IfxEvadc_Adc_getGroupRegsFromGroup(const IfxEvadc_Adc_Group *group)
Gets the current group register set.
Definition: IfxEvadc_Adc.h:1042
IfxEvadc_Adc_GroupConfig::analogFrequency
float32 analogFrequency
specifies analog frequency in Hz
Definition: IfxEvadc_Adc.h:407
IfxEvadc_getAdcAnalogFrequency
IFX_INLINE float32 IfxEvadc_getAdcAnalogFrequency(Ifx_EVADC_G *group)
Returns the configured Fadci EVADC analog clock frequency in Hz.
Definition: IfxEvadc.h:2356
IfxEvadc_Adc_GroupConfig::idlePrechargeLevel
IfxEvadc_IdlePrecharge idlePrechargeLevel
Voltage level to which sampling capacitor will be precharged when idle.
Definition: IfxEvadc_Adc.h:418
IfxEvadc_Adc_GroupConfig::referencePrechargeEnabled
boolean referencePrechargeEnabled
Definition: IfxEvadc_Adc.h:416
IfxEvadc_MsbConversionTime
IfxEvadc_MsbConversionTime
Selects the MSB conversion time(in terms of t_ADC)
Definition: IfxEvadc.h:807
IfxEvadc_Adc_QueueConfig::triggerConfig
IfxEvadc_Adc_GatingTriggerConfig triggerConfig
trigger and gating configuration.
Definition: IfxEvadc_Adc.h:323
IfxEvadc_selectFastCompareBoundaryFlagActivationMode
IFX_INLINE void IfxEvadc_selectFastCompareBoundaryFlagActivationMode(Ifx_EVADC_FC *evadcFC, IfxEvadc_BoundaryFlagActivationMode mode)
Selects behaviour of Boundary Flag(BFL) wih respect to the value of FCR.
Definition: IfxEvadc.h:2725
IfxEvadc_Adc_Group::module
IfxEvadc_Adc module
The EVADC handle structure.
Definition: IfxEvadc_Adc.h:313
IfxEvadc_FastCompareAutomaticUpdate_sw
No automatic update.Value(s) written by software.
Definition: IfxEvadc.h:630
IfxEvadc_setUpperBoundary
IFX_INLINE void IfxEvadc_setUpperBoundary(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, IfxEvadc_BoundarySelection upperBoundary)
Sets group&#39;s upper boundary.
Definition: IfxEvadc.h:3130
IfxEvadc_setChannelLimitCheckMode
IFX_INLINE void IfxEvadc_setChannelLimitCheckMode(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, IfxEvadc_LimitCheck limitCheck)
Sets the channel event mode.
Definition: IfxEvadc.h:2781
IfxEvadc_Adc_ChannelConfig::channelId
IfxEvadc_ChannelId channelId
Specifies the channel index.
Definition: IfxEvadc_Adc.h:354
IfxEvadc_Adc_GroupConfig::inputClasses
IfxEvadc_InputClasses inputClasses
Definition: IfxEvadc_Adc.h:410
IfxEvadc_Adc_FastCompareChannelConfig::fastCompareChannelId
IfxEvadc_GroupId fastCompareChannelId
Definition: IfxEvadc_Adc.h:443
IfxEvadc_getChannelServiceRequestNodePointer0
IFX_INLINE Ifx_EVADC_G_CEVNP0 IfxEvadc_getChannelServiceRequestNodePointer0(Ifx_EVADC_G *evadcG)
Gets the channel service request node pointer.
Definition: IfxEvadc.h:2412
IfxEvadc_Adc_masterIndex
IFX_STATIC IFX_CONST IfxEvadc_Adc_SYNCTR_STSEL IfxEvadc_Adc_masterIndex[IFXEVADC_NUM_ADC_CAL_GROUPS][IFXEVADC_NUM_ADC_CAL_GROUPS]
Definition: IfxEvadc_Adc.c:77
IfxEvadc_FastCompareAnalogConverterControl_normal
Normal operation.
Definition: IfxEvadc.h:621
IfxEvadc_Adc_ChannelConfig::resultServProvider
IfxSrc_Tos resultServProvider
Interrupt service provider for the result trigger interrupt.
Definition: IfxEvadc_Adc.h:350
IfxEvadc_WaitForRead_overwriteMode
Overwrite Mode.
Definition: IfxEvadc.h:861
IfxEvadc_Adc_Group::group
Ifx_EVADC_G * group
Pointer to the group registers.
Definition: IfxEvadc_Adc.h:314
IfxPort_OutputMode_pushPull
Definition: IfxPort.h:142
IfxEvadc_Adc_FastCompareChannelConfig::serviceRequestGenerationEvent
IfxEvadc_FastCompareServiceRequestGeneration serviceRequestGenerationEvent
Criteria/mode settings for service request generation in FCM.B.SRG.
Definition: IfxEvadc_Adc.h:456
IfxEvadc_getSrcAddress
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEvadc_getSrcAddress(IfxEvadc_GroupId group, IfxEvadc_SrcNr index)
Gives the SRC source address.
Definition: IfxEvadc.h:2587
IfxEvadc_Status_noError
No error during api execution.
Definition: IfxEvadc.h:453
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:100
IfxEvadc_Protection_initGroup0
Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
Definition: IfxEvadc.h:332
IfxEvadc_setBoundaryMode
IFX_INLINE void IfxEvadc_setBoundaryMode(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, IfxEvadc_BoundaryExtension boundaryMode)
Selects boundary extension.
Definition: IfxEvadc.h:2755
IfxEvadc_GatingSource_0
Input signal REQGTx_0.
Definition: IfxEvadc.h:275
IfxEvadc_disableAccess
void IfxEvadc_disableAccess(Ifx_EVADC *evadc, IfxEvadc_Protection protectionSet)
Disable write access to the EVADC config/control registers.
Definition: IfxEvadc.c:91
IfxEvadc_ExternalTriggerPolarity_direct
Use selected input signal directly.
Definition: IfxEvadc.h:604
IfxEvadc_disableQueueSlotExternalTrigger
void IfxEvadc_disableQueueSlotExternalTrigger(Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Disables the external trigger.
Definition: IfxEvadc.c:113
IfxEvadc_ChannelReference
IfxEvadc_ChannelReference
ADC channel reference defined in MODULE_EVADC.G[x].CHCTR[y].B.REFSEL(x=0,1,...,11;y=0,1....,16)
Definition: IfxEvadc.h:161
IfxEvadc_Adc_ChannelConfig::upperBoundary
IfxEvadc_BoundarySelection upperBoundary
Specifies upper boundary selection.
Definition: IfxEvadc_Adc.h:359
IfxEvadc_Adc_FastCompareChannelConfig::boundaryFlagActivation
IfxEvadc_BoundaryFlagActivationMode boundaryFlagActivation
Selects the behaviour of BoundaryFlag in FCBFL.B.BFA.
Definition: IfxEvadc_Adc.h:444
IfxEvadc_setFastCompareReferenceValue
IFX_INLINE void IfxEvadc_setFastCompareReferenceValue(Ifx_EVADC_FC *evadcFC, uint16 referenceValue)
Definition: IfxEvadc.h:2926
IfxEvadc_TriggerOperatingMode_noExternalTrigger
No external trigger.
Definition: IfxEvadc.h:695
IfxEvadc_getMasterIndex
IFX_INLINE uint8 IfxEvadc_getMasterIndex(Ifx_EVADC_G *evadcG)
Gets the configured master index.
Definition: IfxEvadc.h:2570
IfxEvadc_selectFastCompareBoundaryFlagNodePointer
IFX_INLINE void IfxEvadc_selectFastCompareBoundaryFlagNodePointer(Ifx_EVADC_FC *evadcFC, IfxEvadc_BoundaryFlagNodePointer nodePointer)
Definition: IfxEvadc.h:2731
IfxEvadc_BoundaryExtension_standard
Boundary Standard mode. BNDSELU/BNDSELL as Boundaries.
Definition: IfxEvadc.h:108
IfxEvadc_Adc_GroupConfig::doubleClockForMSBConversionSelection
boolean doubleClockForMSBConversionSelection
Definition: IfxEvadc_Adc.h:411
IfxEvadc_FastCompareServiceRequestGeneration_off
No service requests are generated.
Definition: IfxEvadc.h:649
IfxEvadc_getGroupConversionMode
IFX_INLINE IfxEvadc_ChannelNoiseReduction IfxEvadc_getGroupConversionMode(Ifx_EVADC_G *evadcG, uint8 inputClassNum)
Gets the EVADC input class channel conversion mode.
Definition: IfxEvadc.h:2540
IfxEvadc_Adc_FastCompareChannelConfig::gateOperatingMode
IfxEvadc_GateOperatingMode gateOperatingMode
Gate Operating Mode to be filled in FCCTRL.B.GTMODE.
Definition: IfxEvadc_Adc.h:457
IfxEvadc_ChannelResult_8
Use Channel result 8.
Definition: IfxEvadc.h:179
IfxEvadc_Adc_FastCompareChannelConfig::referenceInputPrechargeDuration
IfxEvadc_ReferencePrechargeControl referenceInputPrechargeDuration
Precharge duration for the reference input.
Definition: IfxEvadc_Adc.h:462
IfxEvadc_selectIdlePrechargeLevel
IFX_INLINE void IfxEvadc_selectIdlePrechargeLevel(Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group, IfxEvadc_IdlePrecharge mode)
Selects the chargingmode/voltage level in idle mode.
Definition: IfxEvadc.h:2620
IfxEvadc_Adc_GroupConfig::calibrationSampleTimeControlMode
IfxEvadc_CalibrationSampleTimeControl calibrationSampleTimeControlMode
Definition: IfxEvadc_Adc.h:414
IfxEvadc_TriggerSource_15
Input signal REQTRx_15.
Definition: IfxEvadc.h:500
IfxEvadc_getChannelResultServiceRequestNodePointer0
IFX_INLINE Ifx_EVADC_G_REVNP0 IfxEvadc_getChannelResultServiceRequestNodePointer0(Ifx_EVADC_G *evadcG)
Gets the channel result service request node pointer 0.
Definition: IfxEvadc.h:2396
IfxEvadc_getChannelControlConfig
IFX_INLINE Ifx_EVADC_G_CHCTR IfxEvadc_getChannelControlConfig(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex)
Gets the current ADC channel control configurations.
Definition: IfxEvadc.h:2382
IfxEvadc_Adc_FastCompareChannelConfig
Configuring Fast Compare channel operations.
Definition: IfxEvadc_Adc.h:440
IfxEvadc_isRequestQueueSlotEnabled
boolean IfxEvadc_isRequestQueueSlotEnabled(Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Returns the queue slot requested status.
Definition: IfxEvadc.c:461
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxEvadc_setResultPosition
IFX_INLINE void IfxEvadc_setResultPosition(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, boolean rightAlignedStorage)
Sets result store position.
Definition: IfxEvadc.h:3098
IfxEvadc_EmuxSampleTimeControl_settingChanges
Use STCE Whenever Setting Changes.
Definition: IfxEvadc.h:221
IfxEvadc_Adc_Channel
Channel handle data structure.
Definition: IfxEvadc_Adc.h:334
IfxEvadc_RequestSlotStartMode_waitForStart
Wait for start.
Definition: IfxEvadc.h:412
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
float32
float float32
Definition: Platform_Types.h:170
IfxEvadc_Adc_ArbiterConfig::requestSlotQueue1Enabled
boolean requestSlotQueue1Enabled
request queue1 if enabled.
Definition: IfxEvadc_Adc.h:284
IfxEvadc_SrcNr
IfxEvadc_SrcNr
Service Node defined in MODULE_EVADC.G[x].SRACT.U(x= 0,1,..,11)
Definition: IfxEvadc.h:436
IfxEvadc_AnalogClockGenerationMode_synchronized
Synchronized mode: Initial clock pulse is defined by the phase synchronizer.
Definition: IfxEvadc.h:707
IfxEvadc_Adc_FastCompareChannelConfig::clockDivider
IfxEvadc_ClockDividerFactor clockDivider
Defines the frequency of the analog converter clock f_ADCI (base clock for conversion steps)...
Definition: IfxEvadc_Adc.h:449
IfxEvadc_disableFastCompareBoundaryFlag
IFX_INLINE void IfxEvadc_disableFastCompareBoundaryFlag(Ifx_EVADC_FC *evadcFC)
Definition: IfxEvadc.h:2279
IfxEvadc_getChannelServiceRequestNodePointer1
IFX_INLINE Ifx_EVADC_G_CEVNP1 IfxEvadc_getChannelServiceRequestNodePointer1(Ifx_EVADC_G *evadcG)
get the channel service request node pointer (CH8–CH15)
Definition: IfxEvadc.h:2420
IfxEvadc_Adc_GatingTriggerConfig::triggerMode
IfxEvadc_TriggerMode triggerMode
Specifies trigger mode. Rising, falling any edge leads to an trigger event.
Definition: IfxEvadc_Adc.h:271
IfxEvadc_Adc_GroupConfig::inputBufferEnabled
boolean inputBufferEnabled
Definition: IfxEvadc_Adc.h:417
IfxEvadc_Adc_ChannelConfig::resultPriority
Ifx_Priority resultPriority
Interrupt priority of the result trigger interrupt, if 0 the interrupt is disable.
Definition: IfxEvadc_Adc.h:348
IfxEvadc_ChannelId_8
Channel 8.
Definition: IfxEvadc.h:149
IfxEvadc_Adc_FastCompareChannelConfig::boundaryFlagNodePointer
IfxEvadc_BoundaryFlagNodePointer boundaryFlagNodePointer
Options for FCM.B.BFLNP to select Boundary Flag Node Pointer.
Definition: IfxEvadc_Adc.h:446
IfxEvadc_Adc_initFastCompareChannel
void IfxEvadc_Adc_initFastCompareChannel(IfxEvadc_Adc_FastCompareChannel *fastCompareChannel, IfxEvadc_Adc_FastCompareChannelConfig *config)
Initializing the Fast Compare channel.
Definition: IfxEvadc_Adc.c:488
IfxEvadc_Adc_ChannelConfig::globalResultUsage
boolean globalResultUsage
Specifies storage in global result register.
Definition: IfxEvadc_Adc.h:345
IfxEvadc_setQueueSlotTriggerOperatingConfig
void IfxEvadc_setQueueSlotTriggerOperatingConfig(Ifx_EVADC_G *evadcG, IfxEvadc_TriggerMode triggerMode, IfxEvadc_TriggerSource triggerSource, IfxEvadc_RequestSource sourceType)
Sets the trigger operating configurations.
Definition: IfxEvadc.c:564
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxEvadc_disableInputBuffer
IFX_INLINE void IfxEvadc_disableInputBuffer(Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group)
Definition: IfxEvadc.h:3178
IfxEvadc_Adc_getEvadcFromGroup
IFX_INLINE Ifx_EVADC * IfxEvadc_Adc_getEvadcFromGroup(const IfxEvadc_Adc_Group *group)
Gets the current group module register address.
Definition: IfxEvadc_Adc.h:1030
IfxEvadc_Adc_FastCompareChannelConfig::delay
IfxEvadc_FastCompareAnalogClockSynchronizationDelay delay
Defines the delay of the analog clock in clocks after the sync signal in FCM.B.ACSD.
Definition: IfxEvadc_Adc.h:451
IfxEvadc_Adc_Group::groupId
IfxEvadc_GroupId groupId
Specifies the group index.
Definition: IfxEvadc_Adc.h:315
IfxEvadc_AnalogConverterMode_normalOperation
Normal operation mode.
Definition: IfxEvadc.h:91
IfxEvadc_BoundaryExtension
IfxEvadc_BoundaryExtension
Boundary Extension defined in MODULE_EVADC.G[x].CHCTR[y].B.BNDSELX(x=0,1,...,11;y=0,1....,16)
Definition: IfxEvadc.h:106
IfxEvadc_Adc.h
EVADC ADC details.
IfxEvadc_Adc_GroupConfig::startupCalibration
boolean startupCalibration
Can be enabled to execute a startup calibration (disabled by default).
Definition: IfxEvadc_Adc.h:408
IfxEvadc_Adc_FastCompareChannelConfig::referenceValue
uint16 referenceValue
The input level is compared to this value. The resulting reference level is (V_AREF / 1024) * FCM...
Definition: IfxEvadc_Adc.h:465
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxEvadc_BoundaryFlagNodePointer_commonBoundaryFlagOutput0
Select common boundary flag output 0.
Definition: IfxEvadc.h:529
IfxEvadc_setArbiterPriority
void IfxEvadc_setArbiterPriority(Ifx_EVADC_G *evadcG, boolean slotEnable, IfxEvadc_RequestSlotPriority prio, IfxEvadc_RequestSlotStartMode mode, IfxEvadc_RequestSource slot)
Sets the Arbiter slot configurations.
Definition: IfxEvadc.c:504
IfxEvadc_Adc_ChannelConfig::channelSrcNr
IfxEvadc_SrcNr channelSrcNr
Service node of the channel trigger.
Definition: IfxEvadc_Adc.h:353
IfxEvadc_EmuxInterface_0
Emux Interface 0.
Definition: IfxEvadc.h:212
IfxEvadc_getChannelResultServiceRequestNodePointer1
IFX_INLINE Ifx_EVADC_G_REVNP1 IfxEvadc_getChannelResultServiceRequestNodePointer1(Ifx_EVADC_G *evadcG)
Gets the channel result service request node pointer 1.
Definition: IfxEvadc.h:2404
IfxEvadc_TriggerSource_0
Input signal REQTRx_0.
Definition: IfxEvadc.h:485
IfxEvadc_getQueueSlotStartMode
IfxEvadc_RequestSlotStartMode IfxEvadc_getQueueSlotStartMode(Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Gets the requested queue slot start mode.
Definition: IfxEvadc.c:256
IfxEvadc_Adc_ChannelConfig::inputClass
IfxEvadc_InputClasses inputClass
Specifies input class selection.
Definition: IfxEvadc_Adc.h:355
IfxEvadc_enableAccess
void IfxEvadc_enableAccess(Ifx_EVADC *evadc, IfxEvadc_Protection protectionSet)
Enable write access to the EVADC config/control registers.
Definition: IfxEvadc.c:130
IfxEvadc_clearAllResultRequests
IFX_INLINE void IfxEvadc_clearAllResultRequests(Ifx_EVADC_G *evadcG)
Clears the all group requests.
Definition: IfxEvadc.h:2226
IfxEvadc_SupplyVoltageLevelControl_automaticControl
Automatic control: voltage range is controlled by the power supply.
Definition: IfxEvadc.h:852
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxEvadc_Adc_ChannelConfig::synchonize
boolean synchonize
Specifies synchronized conversion channel.
Definition: IfxEvadc_Adc.h:346
IfxEvadc_Adc_Group
Group handle data structure.
Definition: IfxEvadc_Adc.h:311
IfxEvadc_configExternalMultiplexerMode
void IfxEvadc_configExternalMultiplexerMode(Ifx_EVADC *evadc, Ifx_EVADC_G *evadcG, IfxEvadc_ExternalMultiplexerMode mode, uint8 channels, IfxEvadc_EmuxSelectValue startChannel, IfxEvadc_EmuxCodingScheme code, IfxEvadc_EmuxSampleTimeControl sampleTimeControl, IfxEvadc_ChannelSelectionStyle channelSelectionStyle)
Configure external multiplexer mode.
Definition: IfxEvadc.c:70
IfxEvadc_Adc_ChannelConfig::resultRegister
IfxEvadc_ChannelResult resultRegister
Specifies Result register selection.
Definition: IfxEvadc_Adc.h:357
IfxEvadc_Adc_ChannelConfig::reference
IfxEvadc_ChannelReference reference
Specifies Reference selection.
Definition: IfxEvadc_Adc.h:356
IfxEvadc_ReferencePrechargeControl_singleClockPhase
Precharge the reference input for 1 clock phase.
Definition: IfxEvadc.h:817
IfxEvadc_setQueueSlotGatingConfig
void IfxEvadc_setQueueSlotGatingConfig(Ifx_EVADC_G *evadcG, IfxEvadc_GatingSource gatingSource, IfxEvadc_GatingMode gatingMode, IfxEvadc_RequestSource sourceType)
Sets the gating configurations.
Definition: IfxEvadc.c:528
IfxEvadc_initializeFAdcI
uint32 IfxEvadc_initializeFAdcI(Ifx_EVADC *evadc, uint32 fAdcI, Ifx_EVADC_G *group)
Configure the ADC analog clock.
Definition: IfxEvadc.c:421
IfxEvadc_setAnalogClockSynchronizationDelay
IFX_INLINE void IfxEvadc_setAnalogClockSynchronizationDelay(Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group, IfxEvadc_AnalogClockSynchronizationDelay delay)
Definition: IfxEvadc.h:2195
IfxEvadc_Adc_EmuxControl::channelSelectionStyle
IfxEvadc_ChannelSelectionStyle channelSelectionStyle
External Multiplexer Channel Selection Style.
Definition: IfxEvadc_Adc.h:394
IfxEvadc_Status_notInitialised
Appropriate initialisation not done.
Definition: IfxEvadc.h:454
IfxEvadc_Protection_channelControl0
Access control for GxCHCTR0.
Definition: IfxEvadc.h:317
IfxEvadc_Adc_ArbiterConfig::requestSlotQueue2Enabled
boolean requestSlotQueue2Enabled
request queue2 if enabled.
Definition: IfxEvadc_Adc.h:285
IfxEvadc_Adc_ArbiterConfig::requestSlotQueue0Enabled
boolean requestSlotQueue0Enabled
request queue0 if enabled.
Definition: IfxEvadc_Adc.h:283
IfxEvadc_Adc_Channel::group
IFX_CONST IfxEvadc_Adc_Group * group
Specifies the group of the channel.
Definition: IfxEvadc_Adc.h:338
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxEvadc_Adc_FastCompareChannelConfig::boundaryFlagInversion
IfxEvadc_BoundaryFlagInversionControl boundaryFlagInversion
Select whether to use Boundary Flag(FCM.B.BFL) directly or in a inverted format.
Definition: IfxEvadc_Adc.h:445
IfxEvadc_Adc_SYNCTR_STSEL
uint8 IfxEvadc_Adc_SYNCTR_STSEL
Definition: IfxEvadc_Adc.h:249
IfxEvadc_setLowerBoundary
IFX_INLINE void IfxEvadc_setLowerBoundary(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, IfxEvadc_BoundarySelection lowerBoundary)
Sets group&#39;s lower boundary.
Definition: IfxEvadc.h:3065
IfxEvadc_RequestSource_queue0
8 stage Queue0 request
Definition: IfxEvadc.h:420
IfxEvadc_BoundaryFlagActivationMode_0
Set boundary flag BFL if result FCR = 1 (input above the defined band or compare value), clear if FCR = 0 (input below)
Definition: IfxEvadc.h:511
IfxEvadc_SampleSynchronization_off
No synchronization.
Definition: IfxEvadc.h:687
IfxEvadc_Adc_Config::analogClockGenerationMode
IfxEvadc_AnalogClockGenerationMode analogClockGenerationMode
Definition: IfxEvadc_Adc.h:375
IfxEvadc_Adc_ChannelConfig::channelServProvider
IfxSrc_Tos channelServProvider
Interrupt service provider for the channel trigger interrupt.
Definition: IfxEvadc_Adc.h:351
IfxEvadc_Adc_GatingTriggerConfig::gatingMode
IfxEvadc_GatingMode gatingMode
Specifies gating mode. High level, Low Level or Gating disabled.
Definition: IfxEvadc_Adc.h:270
IFXEVADC_NUM_INPUTCLASSES
#define IFXEVADC_NUM_INPUTCLASSES
Number of group specific Input Class.
Definition: IfxEvadc_cfg.h:88
IfxEvadc_RequestSource_queue1
8 stage Queue1 request
Definition: IfxEvadc.h:421
IfxEvadc_Adc_GroupConfig::analogConverterMode
IfxEvadc_AnalogConverterMode analogConverterMode
Definition: IfxEvadc_Adc.h:419
IfxEvadc_LimitCheck_noCheck
Normal compare mode Event Never Fast Compare mode Event Never.
Definition: IfxEvadc.h:307
IfxEvadc_Adc_GroupConfig::disablePostCalibration
boolean disablePostCalibration
Specifies if calibration after conversion (post calibration) should be disabled.
Definition: IfxEvadc_Adc.h:409
IfxEvadc_LimitCheck
IfxEvadc_LimitCheck
ADC channel limit check defined in MODULE_EVADC.G[x].CHCTR[y].B.CHEVMODE(x=0,1,...,11;y=0,1....,16)
Definition: IfxEvadc.h:305
IfxEvadc_enableModule
IFX_INLINE void IfxEvadc_enableModule(Ifx_EVADC *evadc)
Enable EVADC kernel.
Definition: IfxEvadc.h:2324
IfxEvadc_ChannelNoiseReduction_standardConversion
Standard Conversions mode.
Definition: IfxEvadc.h:752
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxEvadc_Adc_initModule
IfxEvadc_Status IfxEvadc_Adc_initModule(IfxEvadc_Adc *evadc, const IfxEvadc_Adc_Config *config)
Initialise the EVADC to run with the expected frequency and calibration.
Definition: IfxEvadc_Adc.c:940
IfxEvadc_ExternalMultiplexerMode_softwareControl
Disable The Emux Control.
Definition: IfxEvadc.h:245
IfxEvadc_Adc_EmuxControl::evadc
Ifx_EVADC * evadc
Pointer to EVADC Module Space.
Definition: IfxEvadc_Adc.h:384
IfxEvadc_setGroupSampleTime
IFX_INLINE void IfxEvadc_setGroupSampleTime(Ifx_EVADC_G *evadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
Sets the ADC input class sample time ticks.
Definition: IfxEvadc.h:3053
IfxEvadc_Adc_FastCompareChannelConfig::analogInputPrechargeDuration
IfxEvadc_AnalogInputPrechargeControl analogInputPrechargeDuration
Precharge duration for the analog input.
Definition: IfxEvadc_Adc.h:463
IfxEvadc_Adc_EmuxPinConfig::pins
IfxEvadc_Emux_Out * pins[3]
Emux Pins configuration.
Definition: IfxEvadc_Adc.h:304
IfxEvadc_BoundarySelection
IfxEvadc_BoundarySelection
BoundarySel defined in MODULE_EVADC.G[x].CHCTR[y].B.BNDSELL(x=0,1,...,11;y=0,1....,16)
Definition: IfxEvadc.h:128
IfxEvadc_Adc_initExternalMultiplexerMode
void IfxEvadc_Adc_initExternalMultiplexerMode(Ifx_EVADC *evadc, const IfxEvadc_Adc_EmuxControl *emuxControl)
initalise external multiplexer.
Definition: IfxEvadc_Adc.c:449
IfxEvadc_Adc_initFastCompareChannelConfig
void IfxEvadc_Adc_initFastCompareChannelConfig(IfxEvadc_Adc_FastCompareChannelConfig *config, IfxEvadc_Adc *evadc)
Initializing Fast Compare Channel config structure with default configurations.
Definition: IfxEvadc_Adc.c:548
IfxEvadc_setResultNodeEventPointer1
IFX_INLINE void IfxEvadc_setResultNodeEventPointer1(Ifx_EVADC_G *evadcG, IfxEvadc_SrcNr resultSrcNr, IfxEvadc_ChannelResult resultRegister)
Sets result event node pointer 1.
Definition: IfxEvadc.h:3091
IfxEvadc_enableInputBuffer
IFX_INLINE void IfxEvadc_enableInputBuffer(Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group)
Definition: IfxEvadc.h:2655
IfxEvadc_Adc_QueueConfig::requestSlotPrio
IfxEvadc_RequestSlotPriority requestSlotPrio
priority of used queue request slot.
Definition: IfxEvadc_Adc.h:324
IfxEvadc_Adc_ArbiterConfig::arbiterRoundLength
IfxEvadc_ArbitrationRounds arbiterRoundLength
Specifies arbiter round length.
Definition: IfxEvadc_Adc.h:282
IfxEvadc_storeGroupResult
IFX_INLINE void IfxEvadc_storeGroupResult(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, IfxEvadc_ChannelResult resultRegister)
Sets the group result register.
Definition: IfxEvadc.h:3165
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:50
IfxSrc_Tos_dma
DMA interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:69
IfxEvadc_Adc_initChannelConfig
void IfxEvadc_Adc_initChannelConfig(IfxEvadc_Adc_ChannelConfig *config, const IfxEvadc_Adc_Group *group)
Initialise buffer with default channel configuration.
Definition: IfxEvadc_Adc.c:418
IfxEvadc_TriggerMode_noExternalTrigger
No external trigger.
Definition: IfxEvadc.h:475
IfxEvadc_Adc_Config::startupCalibrationControl
IfxEvadc_StartupCalibration startupCalibrationControl
Definition: IfxEvadc_Adc.h:377
IfxEvadc_Adc_FastCompareChannelConfig::additionalClockCycles
uint8 additionalClockCycles
Number of additional clock cycles to be added to the minimum sample phase of 2 analog clock cycles...
Definition: IfxEvadc_Adc.h:461
IfxEvadc_resetGroup
IFX_INLINE void IfxEvadc_resetGroup(Ifx_EVADC_G *evadcG)
Resets the ADC group.
Definition: IfxEvadc.h:2705
IfxEvadc_setSyncRequest
IFX_INLINE void IfxEvadc_setSyncRequest(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, boolean synchonize)
Sets channel synchronization request.
Definition: IfxEvadc.h:3124
IfxEvadc_clearChannelRequest
IFX_INLINE void IfxEvadc_clearChannelRequest(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelId)
Clears the channel request.
Definition: IfxEvadc.h:2232
IfxEvadc_Adc_FastCompareChannel::fastCompareChannel
Ifx_EVADC_FC * fastCompareChannel
Definition: IfxEvadc_Adc.h:429
IfxEvadc_Adc_getGroupConfig
void IfxEvadc_Adc_getGroupConfig(IfxEvadc_Adc_Group *group, IfxEvadc_Adc_GroupConfig *config)
Get the current group configuration (e.g. evadc frequency)
Definition: IfxEvadc_Adc.c:228
IfxEvadc_setChannelEventNodePointer0
IFX_INLINE void IfxEvadc_setChannelEventNodePointer0(Ifx_EVADC_G *evadcG, IfxEvadc_SrcNr channelSrcNr, IfxEvadc_ChannelId channel)
Sets the channel event service request line.
Definition: IfxEvadc.h:2761
IfxEvadc_Adc_GroupConfig::analogClockSynchronizationDelay
IfxEvadc_AnalogClockSynchronizationDelay analogClockSynchronizationDelay
Definition: IfxEvadc_Adc.h:413
IfxEvadc_setFastCompareBoundaryFlagInversion
IFX_INLINE void IfxEvadc_setFastCompareBoundaryFlagInversion(Ifx_EVADC_FC *evadcFC, IfxEvadc_BoundaryFlagInversionControl mode)
Sets in FCM.B.BFI whether to use Boundary Flag(FCM.B.BFL) directly or in a inverted format...
Definition: IfxEvadc.h:2273
IfxEvadc_Adc_getMasterId
IFX_INLINE IfxEvadc_GroupId IfxEvadc_Adc_getMasterId(IfxEvadc_GroupId slave, IfxEvadc_Adc_SYNCTR_STSEL masterIndex)
Gets the master id.
Definition: IfxEvadc_Adc.c:99
IfxEvadc_Adc_EmuxControl::channels
uint8 channels
specifies channel number
Definition: IfxEvadc_Adc.h:391
IfxEvadc_getQueueSlotGatingMode
IfxEvadc_GatingMode IfxEvadc_getQueueSlotGatingMode(Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Gets the requested queue slot gating mode.
Definition: IfxEvadc.c:192
IfxEvadc_Adc_initChannel
IfxEvadc_Status IfxEvadc_Adc_initChannel(IfxEvadc_Adc_Channel *channel, const IfxEvadc_Adc_ChannelConfig *config)
Initialise one channel with given configuration.
Definition: IfxEvadc_Adc.c:338
IfxEvadc_Adc_initGroup
IfxEvadc_Status IfxEvadc_Adc_initGroup(IfxEvadc_Adc_Group *group, const IfxEvadc_Adc_GroupConfig *config)
Initialise the EVADC group (also queue modes) Slave Groups must initialize first. ...
Definition: IfxEvadc_Adc.c:578
IfxEvadc_Adc_FastCompareChannelConfig::triggerInterval
uint8 triggerInterval
Defines the interval at which fast compare operations are triggered in steps of 16 * 1/f_ADC...
Definition: IfxEvadc_Adc.h:464
IfxEvadc_setGroupConversionMode
IFX_INLINE void IfxEvadc_setGroupConversionMode(Ifx_EVADC_G *evadcG, uint8 inputClassNum, IfxEvadc_ChannelNoiseReduction conversionMode)
Sets the ADC input class channel resolution.
Definition: IfxEvadc.h:3041
IfxEvadc_Adc_GroupConfig::sampleSynchronizationEnabled
IfxEvadc_SampleSynchronization sampleSynchronizationEnabled
Definition: IfxEvadc_Adc.h:412
IfxEvadc_Adc_FastCompareChannelConfig::boundaryFlagValue
boolean boundaryFlagValue
Defines the logic value that replaces the compare result while the gate input is inactive (low) in lo...
Definition: IfxEvadc_Adc.h:467
IfxEvadc_InputClasses
IfxEvadc_InputClasses
inputClass defined in MODULE_EVADC.G[x].CHCTR[y].B.ICLSEL(x=0,1,...,11;y=0,1....,16) ...
Definition: IfxEvadc.h:295
IFXEVADC_DEFAULT_ANALOG_FREQ
#define IFXEVADC_DEFAULT_ANALOG_FREQ
Default analog frequency used in initModuleConfig function.
Definition: IfxEvadc_cfg.h:80
IfxEvadc_BoundaryFlagSwControl_noAction
No Action.
Definition: IfxEvadc.h:544
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:68
IfxEvadc_Adc_EmuxControl::startChannel
IfxEvadc_EmuxSelectValue startChannel
specifies the external channel start value(EMUX[x:0]) x- specifies external channel number ...
Definition: IfxEvadc_Adc.h:386
IfxEvadc_setChannelEventNodePointer1
IFX_INLINE void IfxEvadc_setChannelEventNodePointer1(Ifx_EVADC_G *evadcG, IfxEvadc_SrcNr channelSrcNr, IfxEvadc_ChannelId channel)
set channel event node pointer(channel 8- channel 15)
Definition: IfxEvadc.h:2768
IfxEvadc_Adc_GroupConfig::referencePrechargeControlMode
IfxEvadc_ReferencePrechargeControl referencePrechargeControlMode
Definition: IfxEvadc_Adc.h:415
IfxEvadc_setGlobalConversionMode
IFX_INLINE void IfxEvadc_setGlobalConversionMode(Ifx_EVADC *evadc, uint8 InputClassNum, IfxEvadc_ChannelNoiseReduction conversionMode)
Sets the channel conversion mode.
Definition: IfxEvadc.h:3029
IfxEvadc_enableQueueSlotExternalTrigger
void IfxEvadc_enableQueueSlotExternalTrigger(Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Enables the external trigger.
Definition: IfxEvadc.c:152
IfxEvadc_Adc_EmuxControl::sampleTimeControl
IfxEvadc_EmuxSampleTimeControl sampleTimeControl
specifies when to use sample time control
Definition: IfxEvadc_Adc.h:389
IfxEvadc_BoundaryFlagInversionControl_direct
Use BFL directly.
Definition: IfxEvadc.h:521
IfxEvadc_SpreadEarlySamplePointEMUXConversionsMode_nominal
Nominal sample timing.
Definition: IfxEvadc.h:823
IfxEvadc_Adc_EmuxControl::code
IfxEvadc_EmuxCodingScheme code
specifes binary/gray code
Definition: IfxEvadc_Adc.h:388
IfxEvadc_EmuxCodingScheme_binary
Output the Channel Number in Binary code.
Definition: IfxEvadc.h:204
IfxEvadc_Adc_FastCompareChannelConfig::analogConverterControllerMode
IfxEvadc_FastCompareAnalogConverterControl analogConverterControllerMode
Settings for Analog Coverter Controller to be done in FCM.B.ANON.
Definition: IfxEvadc_Adc.h:452
IfxEvadc_ChannelSelectionStyle_channelNumber
selects an arbitrary channel
Definition: IfxEvadc.h:194
IfxEvadc_Adc_EmuxControl::emuxInterface
IfxEvadc_EmuxInterface emuxInterface
specifies the Emux interface
Definition: IfxEvadc_Adc.h:392
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:151
IfxEvadc_ClockDividerFactor_maxFrequency
Max. frequency.
Definition: IfxEvadc.h:566
IfxEvadc_AnalogInputPrechargeControl_noPrecharge
No Precharge.
Definition: IfxEvadc.h:727
IfxEvadc_RequestSource_queue2
8 stage Queue2 request
Definition: IfxEvadc.h:422
IfxEvadc_Adc_initGroupConfig
void IfxEvadc_Adc_initGroupConfig(IfxEvadc_Adc_GroupConfig *config, IfxEvadc_Adc *evadc)
Initialise buffer with default EVADC configuration.
Definition: IfxEvadc_Adc.c:847
IfxEvadc_GroupId_12
EVADC group 12 (Fast compare channel 0)
Definition: IfxEvadc_cfg.h:148
IfxEvadc_GatingMode_disabled
Gating is disabled, no conversion request are issued.
Definition: IfxEvadc.h:265
IfxEvadc_Adc_ChannelConfig::lowerBoundary
IfxEvadc_BoundarySelection lowerBoundary
Specifies lower boundary selection.
Definition: IfxEvadc_Adc.h:358
IfxEvadc_enableReferencePrecharge
IFX_INLINE void IfxEvadc_enableReferencePrecharge(Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group)
Definition: IfxEvadc.h:2698
IfxEvadc_setChannelInputClass
IFX_INLINE void IfxEvadc_setChannelInputClass(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelId channelIndex, IfxEvadc_InputClasses inputClass)
Sets the channel input class.
Definition: IfxEvadc.h:2775
IfxEvadc_Adc_ChannelConfig
Channel configuration structure.
Definition: IfxEvadc_Adc.h:343
IfxEvadc_Adc_ChannelConfig::channelPriority
Ifx_Priority channelPriority
Interrupt priority of the channel trigger interrupt, if 0 the interrupt is disable.
Definition: IfxEvadc_Adc.h:349
IfxEvadc_getGroupSampleTime
IFX_INLINE float32 IfxEvadc_getGroupSampleTime(Ifx_EVADC_G *evadcG, uint8 inputClassNum, float32 analogFrequency)
Gets the EVADC input class channel sample time.
Definition: IfxEvadc.h:2557
IfxEvadc_GroupId
IfxEvadc_GroupId
VADC Groups.
Definition: IfxEvadc_cfg.h:134
IfxEvadc_Adc_initExternalMultiplexerModeConfig
void IfxEvadc_Adc_initExternalMultiplexerModeConfig(IfxEvadc_Adc_EmuxControl *emuxConfig, Ifx_EVADC *evadc)
initialise default configuration for external multiplexer
Definition: IfxEvadc_Adc.c:467
IfxEvadc_Adc_ChannelConfig::boundaryMode
IfxEvadc_BoundaryExtension boundaryMode
Specifies Standard mode of fast compare mode.
Definition: IfxEvadc_Adc.h:360
IfxEvadc_Adc_ChannelConfig::limitCheck
IfxEvadc_LimitCheck limitCheck
Specifies boundary band selection upper/lower.
Definition: IfxEvadc_Adc.h:361
IfxEvadc_Adc_Config
EVADC module configuration structure.
Definition: IfxEvadc_Adc.h:371
IfxEvadc_Adc_EmuxControl
Emux Control Structure.
Definition: IfxEvadc_Adc.h:382
IfxEvadc_setEmuxInterfaceForGroup
IFX_INLINE void IfxEvadc_setEmuxInterfaceForGroup(Ifx_EVADC *evadc, IfxEvadc_EmuxInterface emuxInterface, IfxEvadc_GroupId group)
Sets the Emux Interface for a particular group.
Definition: IfxEvadc.h:2823
IfxEvadc_Adc_ClassConfig::conversionMode
IfxEvadc_ChannelNoiseReduction conversionMode
Specifies the conversion Mode, noise reduction levels.
Definition: IfxEvadc_Adc.h:293
IfxEvadc_AnalogConverterMode
IfxEvadc_AnalogConverterMode
Defined in MODULE_EVADC.G[x].ARBCFG.B.ANONS and ANONC.
Definition: IfxEvadc.h:86
IfxEvadc_clearQueue
IFX_INLINE void IfxEvadc_clearQueue(Ifx_EVADC_G *evadcG, boolean flushQueue, IfxEvadc_RequestSource sourceType)
Clears all the queue entries including backup stage.
Definition: IfxEvadc.h:2238
IfxEvadc_Status
IfxEvadc_Status
API return values defined in MODULE_EVADC.G[x].QSR0.U,MODULE_EVADC.G[x].QSR1.U,MODULE_EVADC.G[x].QSR2.U(x=0,1,...,11)
Definition: IfxEvadc.h:451
IfxEvadc_disablePostCalibration
IFX_INLINE void IfxEvadc_disablePostCalibration(Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group, boolean enabled)
Disables the post calibration.
Definition: IfxEvadc.h:2295
IfxEvadc_Adc_setGlobalConfigurations
void IfxEvadc_Adc_setGlobalConfigurations(Ifx_EVADC *evadc, const IfxEvadc_Adc_Config *config)
Configure global settings in the GLOBCFG register.
Definition: IfxEvadc_Adc.c:983
IfxEvadc_initEmuxPin
IFX_INLINE void IfxEvadc_initEmuxPin(const IfxEvadc_Emux_Out *emux, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a EMUX output.
Definition: IfxEvadc.h:2628
IfxEvadc_ArbitrationRounds_4_slots
An arbitration round contains 4 arbitration slots.
Definition: IfxEvadc.h:98
IfxEvadc_Adc_GroupConfig
Group configuration structure.
Definition: IfxEvadc_Adc.h:399
IFXEVADC_NUM_ADC_CAL_GROUPS
#define IFXEVADC_NUM_ADC_CAL_GROUPS
Number of calibrated ADC Groups.
Definition: IfxEvadc_cfg.h:68
IfxEvadc_ChannelNoiseReductionEMUX_standardConversion
Standard conversion.
Definition: IfxEvadc.h:762
IfxEvadc_Adc_FastCompareChannelConfig::rampGenerationMode
IfxEvadc_RampRunControl rampGenerationMode
Defines the run conditions for the ramp generation in FCM.B.RUNRAMP.
Definition: IfxEvadc_Adc.h:455
IfxEvadc_AnalogClockSynchronizationDelay_0
No Delay.
Definition: IfxEvadc.h:713
IfxEvadc_Adc
EVADC handle data structure.
Definition: IfxEvadc_Adc.h:259
IfxEvadc_Adc_FastCompareChannelConfig::channelEventMode
IfxEvadc_ChannelEventMode channelEventMode
Channel Event Mode for configuring generation of events for Fast Compare channels in FCCTRL...
Definition: IfxEvadc_Adc.h:448
IfxEvadc_Adc_QueueConfig::requestSlotStartMode
IfxEvadc_RequestSlotStartMode requestSlotStartMode
start mode for request queue source.
Definition: IfxEvadc_Adc.h:325
IfxEvadc_Adc_FastCompareChannelConfig::rampDirection
IfxEvadc_RampDirection rampDirection
Ramp direction setting in FCM.B.FCRDIR.
Definition: IfxEvadc_Adc.h:458
IfxEvadc_Adc_FastCompareChannel::module
IfxEvadc_Adc module
The EVADC handle structure.
Definition: IfxEvadc_Adc.h:428
IfxEvadc_BoundarySelection_group0
Use group class 0.
Definition: IfxEvadc.h:130
IfxEvadc_Adc_Channel::resultreg
IfxEvadc_ChannelResult resultreg
Specifies allocated result register.
Definition: IfxEvadc_Adc.h:337
IfxEvadc_CalibrationSampleTimeControl_4
4*t_ADCI
Definition: IfxEvadc.h:742
IfxEvadc_Adc_FastCompareChannelConfig::boundaryFlagAction
IfxEvadc_BoundaryFlagSwControl boundaryFlagAction
Action to be performed on the boundary flag(BFL)
Definition: IfxEvadc_Adc.h:447
IfxEvadc_getQueueSlotTriggerMode
IfxEvadc_TriggerMode IfxEvadc_getQueueSlotTriggerMode(Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Gets the requested queue slot trigger mode.
Definition: IfxEvadc.c:299
IfxEvadc_Adc_FastCompareChannelConfig::module
IfxEvadc_Adc * module
Pointer to EVADC module handle.
Definition: IfxEvadc_Adc.h:442
IfxEvadc_FastCompareRunControl_stop
Stop, no operation.
Definition: IfxEvadc.h:641
IfxEvadc_Adc_GroupConfig::module
IFX_CONST IfxEvadc_Adc * module
Specifies pointer to the IfxEvadc_Adc module handle.
Definition: IfxEvadc_Adc.h:401
IfxEvadc_Adc_Config::supplyVoltage
IfxEvadc_SupplyVoltageLevelControl supplyVoltage
Definition: IfxEvadc_Adc.h:376
IfxEvadc_Adc_deInitGroup
void IfxEvadc_Adc_deInitGroup(IfxEvadc_Adc_Group *group)
Reset the EVADC group.
Definition: IfxEvadc_Adc.c:135
IfxEvadc_SrcNr_group0
service request line 0 of group
Definition: IfxEvadc.h:438
IfxEvadc_Adc_GatingTriggerConfig::triggerSource
IfxEvadc_TriggerSource triggerSource
Specifies used Trigger input for group.
Definition: IfxEvadc_Adc.h:269
IFXEVADC_NUM_GLOBAL_INPUTCLASSES
#define IFXEVADC_NUM_GLOBAL_INPUTCLASSES
Number of ADC group input classes.
Definition: IfxEvadc_cfg.h:98
IfxEvadc_Adc_Config::globalInputClass
IfxEvadc_Adc_ClassConfig globalInputClass[IFXEVADC_NUM_GLOBAL_INPUTCLASSES]
Specifies the global conversion settings one and two.
Definition: IfxEvadc_Adc.h:374
IfxEvadc_Protection
IfxEvadc_Protection
Access protection for Group registers defined in MODULE_EVADC.ACCPROT0.U.
Definition: IfxEvadc.h:315
IfxEvadc_setAnalogConvertControl
IFX_INLINE void IfxEvadc_setAnalogConvertControl(Ifx_EVADC_G *evadcG, IfxEvadc_AnalogConverterMode analogConverterMode)
Sets analog converter group number.
Definition: IfxEvadc.h:2737
IfxEvadc_setSampleSynchronizationMode
IFX_INLINE void IfxEvadc_setSampleSynchronizationMode(Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group, IfxEvadc_SampleSynchronization mode)
Selects whether sample synchronization must be performed or not.
Definition: IfxEvadc.h:2711
IfxEvadc_FastCompareAnalogClockSynchronizationDelay_0
No delay.
Definition: IfxEvadc.h:610
IfxEvadc_SpreadEarlySamplePointStandardConversionsMode_nominal
Nominal sample timing.
Definition: IfxEvadc.h:831
IfxEvadc_enableFastCompareBoundaryFlag
IFX_INLINE void IfxEvadc_enableFastCompareBoundaryFlag(Ifx_EVADC_FC *evadcFC)
Definition: IfxEvadc.h:2302
IfxEvadc_setMasterIndex
IFX_INLINE void IfxEvadc_setMasterIndex(Ifx_EVADC_G *evadcG, uint8 masterIndex)
Sets the master index.
Definition: IfxEvadc.h:3071
IfxEvadc_ChannelEventMode_aboveOrBelowCompareValue
Generate a service request in case the result switches to either level(above or below the compare val...
Definition: IfxEvadc.h:557
IfxEvadc_startupCalibration
void IfxEvadc_startupCalibration(Ifx_EVADC *evadc)
Starts ADC calibration and wait for the end of the calibration process.
Definition: IfxEvadc.c:597
IfxEvadc_RequestSlotPriority_low
Lowpriority.
Definition: IfxEvadc.h:403
IfxEvadc_ChannelReference_standard
use Varef as reference
Definition: IfxEvadc.h:163
IfxEvadc_Adc_FastCompareChannelConfig::externalTriggerOperatingMode
IfxEvadc_TriggerOperatingMode externalTriggerOperatingMode
Trigger operating mode in Fast Compare channels, to be entered in FCCTRL.B.XTMODE.
Definition: IfxEvadc_Adc.h:460
IfxEvadc_Adc_EmuxPinConfig::outputMode
IfxPort_OutputMode outputMode
the pin output mode which should be configured
Definition: IfxEvadc_Adc.h:305
IfxEvadc_Adc_QueueConfig
Queue configuration structure.
Definition: IfxEvadc_Adc.h:320
IfxEvadc_ChannelId
IfxEvadc_ChannelId
EVADC Channels.
Definition: IfxEvadc.h:138
IfxEvadc_Adc_QueueConfig::flushQueueAfterInit
boolean flushQueueAfterInit
Specifies if the queue is flushed after configuration.
Definition: IfxEvadc_Adc.h:322
IfxEvadc_getAnalogFunctionConfiguration
IFX_INLINE Ifx_EVADC_G_ANCFG IfxEvadc_getAnalogFunctionConfiguration(Ifx_EVADC_G *evadcG)
Definition: IfxEvadc.h:2374
IfxEvadc_Adc_setAnalogConvertControl
void IfxEvadc_Adc_setAnalogConvertControl(Ifx_EVADC *evadc, IfxEvadc_Adc_Group *group, IfxEvadc_AnalogConverterMode analogConverterMode)
set analog converter mode
Definition: IfxEvadc_Adc.c:974
IfxEvadc_Adc_Channel::channel
IfxEvadc_ChannelId channel
Specifies the channel index.
Definition: IfxEvadc_Adc.h:336
IfxEvadc_StartupCalibration_noAction
No action.
Definition: IfxEvadc.h:842
IfxEvadc_disableReferencePrecharge
IFX_INLINE void IfxEvadc_disableReferencePrecharge(Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group)
Definition: IfxEvadc.h:3171
IfxEvadc_Adc_FastCompareChannel
Definition: IfxEvadc_Adc.h:426
IfxEvadc_Adc_FastCompareChannelConfig::runMode
IfxEvadc_FastCompareRunControl runMode
Definition: IfxEvadc_Adc.h:454
IfxEvadc_ChannelId_0
Channel 0.
Definition: IfxEvadc.h:141
IfxEvadc_ChannelResult
IfxEvadc_ChannelResult
Channel Result defined in MODULE_EVADC.G[x].CHCTR[y].B.RESREG(x=0,1,...,11;y=0,1....,16)
Definition: IfxEvadc.h:169
IfxEvadc_IdlePrecharge_currentLevel
The sampling capacitor keeps the current charge.
Definition: IfxEvadc.h:801
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxEvadc_GroupId_0
EVADC Group 0(Primary Group 0)
Definition: IfxEvadc_cfg.h:136
IfxEvadc_Adc_FastCompareChannelConfig::sampleTimingSynchronization
IfxEvadc_SampleSynchronization sampleTimingSynchronization
Sample timing sync settings for FCM.B.SSE.
Definition: IfxEvadc_Adc.h:459
IfxEvadc_getQueueSlotGatingSource
IfxEvadc_GatingSource IfxEvadc_getQueueSlotGatingSource(Ifx_EVADC_G *evadcG, IfxEvadc_RequestSource sourceType)
Gets the requested queue slot gating input.
Definition: IfxEvadc.c:214
IfxEvadc_setFastCompareBoundaryFlagSwControl
IFX_INLINE void IfxEvadc_setFastCompareBoundaryFlagSwControl(Ifx_EVADC_FC *evadcFC, IfxEvadc_BoundaryFlagSwControl control)
Definition: IfxEvadc.h:2267
IfxEvadc_Adc_ChannelConfig::rightAlignedStorage
boolean rightAlignedStorage
Specifies result is right aligned.
Definition: IfxEvadc_Adc.h:347
IfxEvadc_Adc_getChannelConfig
void IfxEvadc_Adc_getChannelConfig(IfxEvadc_Adc_Channel *channel, IfxEvadc_Adc_ChannelConfig *config)
Get the current channel configuration (e.g. sample settings)
Definition: IfxEvadc_Adc.c:149
IfxEvadc_Adc_EmuxPinConfig
Definition: IfxEvadc_Adc.h:302
IfxEvadc_GatingMode_always
Conversion request is issued if at least 1 conversion pending bit is set.
Definition: IfxEvadc.h:266
IfxEvadc_Adc_GatingTriggerConfig::gatingSource
IfxEvadc_GatingSource gatingSource
Specifies used gate input for group.
Definition: IfxEvadc_Adc.h:268
IfxEvadc_Adc_getMasterKernelIndex
IFX_INLINE IfxEvadc_Adc_SYNCTR_STSEL IfxEvadc_Adc_getMasterKernelIndex(IfxEvadc_GroupId slave, IfxEvadc_GroupId master)
Gets the current master kernel index.
Definition: IfxEvadc_Adc.c:125
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxEvadc_Adc_GroupConfig::inputClass
IfxEvadc_Adc_ClassConfig inputClass[IFXEVADC_NUM_INPUTCLASSES]
Specifies conversion settings one and two.
Definition: IfxEvadc_Adc.h:404
IfxEvadc_DataModificationMode_standardDataReduction
Standard Data Reduction.
Definition: IfxEvadc.h:772
IfxEvadc_Adc_ClassConfig::sampleTime
float32 sampleTime
Specifies the requested sample time for input class.
Definition: IfxEvadc_Adc.h:292
IfxEvadc_enableServiceRequest
IFX_INLINE void IfxEvadc_enableServiceRequest(Ifx_EVADC_G *evadcG, IfxEvadc_ChannelResult resultRegister)
Definition: IfxEvadc.h:2334
IfxEvadc_Adc_EmuxControl::mode
IfxEvadc_ExternalMultiplexerMode mode
Specifies the External Multiplexer mode.
Definition: IfxEvadc_Adc.h:385
IfxEvadc_ChannelResult_0
Use Channel result 0.
Definition: IfxEvadc.h:171
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxEvadc_setResultNodeEventPointer0
IFX_INLINE void IfxEvadc_setResultNodeEventPointer0(Ifx_EVADC_G *evadcG, IfxEvadc_SrcNr resultSrcNr, IfxEvadc_ChannelResult resultRegister)
Sets result event node pointer 0.
Definition: IfxEvadc.h:3084
IfxEvadc_setCalibrationSampleTime
IFX_INLINE void IfxEvadc_setCalibrationSampleTime(Ifx_EVADC_G *evadcG, IfxEvadc_GroupId group, IfxEvadc_CalibrationSampleTimeControl mode)
Select calibration sample time in units of t_ADC.
Definition: IfxEvadc.h:2219
IfxEvadc_RampDirection_down
Decrement ramp counter and stop when counter <= FCRCOMPB.
Definition: IfxEvadc.h:668
IfxEvadc_Adc_EmuxControl::emuxOutPinConfig
IfxEvadc_Adc_EmuxPinConfig emuxOutPinConfig
configure the emux output pin
Definition: IfxEvadc_Adc.h:393
IfxEvadc_FifoMode_seperateResultRegister
seperate Result Register
Definition: IfxEvadc.h:255
IfxEvadc_Adc_initModuleConfig
void IfxEvadc_Adc_initModuleConfig(IfxEvadc_Adc_Config *config, Ifx_EVADC *evadc)
Initialise buffer with default EVADC configuration.
Definition: IfxEvadc_Adc.c:963
IfxEvadc_GateOperatingMode_noGateFunction
No gate function.
Definition: IfxEvadc.h:659
IfxEvadc_Adc_FastCompareChannelConfig::externalTriggerPolarity
IfxEvadc_ExternalTriggerPolarity externalTriggerPolarity
External Trigger Polarity to be set in FCCTRL.B.XTPOL.
Definition: IfxEvadc_Adc.h:450
IfxEvadc_RequestSlotPriority_lowest
Lowest priority.
Definition: IfxEvadc.h:402
IfxEvadc_Adc_GroupConfig::queueRequest
IfxEvadc_Adc_QueueConfig queueRequest[3]
Specifies queue0 mode configuration.
Definition: IfxEvadc_Adc.h:405
IfxEvadc_Adc_GroupConfig::master
IfxEvadc_GroupId master
Specifies the master group. If master is different from groupId, then the group is configured as slav...
Definition: IfxEvadc_Adc.h:403


iLLD_TC38A: IfxEvadc_Adc.h Source File

  • Evadc
  • Adc
IfxEvadc_Adc.h
Go to the documentation of this file.
1 /**
2 * \file IfxEvadc_Adc.h
3 * \brief EVADC ADC details
4 * \ingroup IfxLld_Evadc
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Evadc_Adc_Usage How to use the EVADC ADC Interface driver?
42 * \ingroup IfxLld_Evadc
43 *
44 * EVADC comprises of independent analog channels with Analog/Digital converters to convert analog input to discrete digital output.
45 *
46 * In the following sections it will be described, how to integrate the driver into the application framework.
47 *
48 * \section IfxLld_Evadc_Adc_Preparation Preparation
49 * \subsection IfxLld_Evadc_Adc_Include Include Files
50 *
51 * Include following header file into your C code:
52 * \code
53 *
54 * #include <Evadc/Adc/IfxEvadc_Adc.h>
55 *
56 * \endcode
57 *
58 * \subsection IfxLld_Evadc_Adc_Variables Variables
59 * \code
60 *
61 * // EVADC handle
62 * IfxEvadc_Adc evadc;
63 * IfxEvadc_Adc_Group adcGroup;
64 * \endcode
65 *
66 * \subsection IfxLld_Evadc_Adc_ModuleInitialisation Module Initialisation
67 * The module initialisation can be done in the same function:
68 * \code
69 * // create configuration
70 * IfxEvadc_Adc_Config adcConfig;
71 * IfxEvadc_Adc_initModuleConfig(&adcConfig, &MODULE_EVADC);
72 *
73 * // initialize module
74 * // IfxEvadc_Adc evadc; // declared globally
75 * IfxEvadc_Adc_initModule(&evadc, &adcConfig);
76 * \endcode
77 *
78 *
79 * \subsection IfxLld_Evadc_Adc_GroupInitialisation Group Initialisation
80 * The group initialisation can be done in the same function.
81 * NOTE: By default startupCalibration = FALSE in IfxEvadc_Adc_initGroupConfig() and startupCalibrationControl = IfxEvadc_StartupCalibration_noAction in IfxEvadc_Adc_initModuleConfig().
82 *
83 * In case startup calibration is required, while configuring the last group, startupCalibration inside group config structure must be set to TRUE after calling IfxEvadc_Adc_initGroupConfig() and before calling IfxEvadc_Adc_initGroup().
84 *
85 * \code
86 *
87 * // create group config
88 * IfxEvadc_Adc_GroupConfig adcGroupConfig;
89 * IfxEvadc_Adc_initGroupConfig(&adcGroupConfig, &evadc);
90 *
91 * // change group (default is GroupId_0, change to GroupId_3)
92 * adcGroupConfig.groupId = IfxEvadc_GroupId_3;
93 * adcGroupConfig.master = adcGroupConfig.groupId;
94 * adcGroupConfig.startupCalibration =TRUE;
95 *
96 * // enable all arbiter request sources
97 * adcGroupConfig.arbiter.requestSlotQueue0Enabled = TRUE; // enable Queue0 mode
98 * adcGroupConfig.arbiter.requestSlotQueue1Enabled = TRUE; // enable Queue1 mode
99 * adcGroupConfig.arbiter.requestSlotQueue2Enabled = TRUE; // enable Queue2 mode
100 *
101 * // enable all gates in "always" mode (no edge detection)
102 * adcGroupConfig.queueRequest[0].triggerConfig.gatingMode = IfxEvadc_GatingMode_always;
103 * adcGroupConfig.queueRequest[1].triggerConfig.gatingMode = IfxEvadc_GatingMode_always;
104 * adcGroupConfig.queueRequest[2].triggerConfig.gatingMode = IfxEvadc_GatingMode_always;
105 *
106 *
107 *
108 * // initialize the group
109 * //IfxEvadc_Adc_Group adcGroup;//declared globally
110 * IfxEvadc_Adc_initGroup(&adcGroup, &adcGroupConfig);
111 *
112 * \endcode
113 *
114 * \subsection IfxLld_Evadc_Adc_QueuedTransfers Queued Transfers
115 * Now, EVADC is initialised. Here,Three channels are used for queued transfers
116 * \code
117 * // IMPORTANT: for deterministic results we have to disable the queue gate
118 * // while filling the queue, otherwise results could be output in the wrong order
119 *
120 * IfxEvadc_RequestSource requestSource = IfxEvadc_RequestSource_queue0;
121 *
122 * IfxEvadc_GatingMode savedGate = IfxEvadc_getQueueSlotGatingMode(adcGroup.group,requestSource);
123 * IfxEvadc_GatingSource gatingSource = IfxEvadc_getQueueSlotGatingSource(adcGroup.group, requestSource );
124 *
125 * IfxEvadc_setQueueSlotGatingConfig(adcGroup.group, gatingSource, IfxEvadc_GatingMode_disabled, requestSource );
126 * // create channel config
127 * IfxEvadc_Adc_ChannelConfig adcChannelConfig[3];
128 * IfxEvadc_Adc_Channel adcChannel[3];
129 *
130 * for(int chnIx=0; chnIx<3; ++chnIx) {
131 * IfxEvadc_Adc_initChannelConfig(&adcChannelConfig[chnIx], &adcGroup);
132 *
133 * adcChannelConfig[chnIx].channelId = (IfxEvadc_ChannelId)(chnIx);
134 * adcChannelConfig[chnIx].resultRegister = IfxEvadc_ChannelResult_1; // use result register #1 for all channels
135 *
136 * // initialize the channel
137 * IfxEvadc_Adc_initChannel(&adcChannel[chnIx], &adcChannelConfig[chnIx]);
138 *
139 * // Add channel to queue with refill enabled
140 * IfxEvadc_Adc_addToQueue(&adcChannel[chnIx], requestSource, IFXEVADC_QUEUE_REFILL);
141 * }
142 *
143 * // restore previous gate config
144 *
145 * IfxEvadc_setQueueSlotGatingConfig(adcGroup.group, gatingSource, savedGate, requestSource );
146 *
147 * // start the Queue
148 * IfxEvadc_Adc_startQueue(&adcGroup, requestSource); // just for the case that somebody copy&pastes the code - the queue has already been started in previous test
149 *
150 * // get 10 results for all 3 channels and store in temporary buffer
151 * // (the usage of a buffer is required, since the print statements used by the checks take more time than the conversions)
152 * Ifx_EVADC_G_RES resultTrace[3*10];
153 * for(int i=0; i<3*10; ++i)
154 * {
155 * unsigned chnIx = i % 3;
156 *
157 * // wait for valid result
158 * Ifx_EVADC_G_RES conversionResult;
159 * do {
160 * conversionResult = IfxEvadc_Adc_getResult(&adcChannel[chnIx]);
161 * } while( !conversionResult.B.VF );
162 *
163 * // store result
164 * resultTrace[i] = conversionResult;
165 * }
166 *
167 * // stop the queue
168 * IfxEvadc_Adc_clearQueue(&adcGroup, requestSource);
169 *
170 * // check results in buffer
171 * // ...
172 *
173 * \endcode
174 *
175 * \subsection IfxLld_Evadc_Adc_EmuxConfiguration External Multiplexer Configuration
176 * External Configuration of 3 channels at channel 3
177 *
178 * \code
179 *
180 * IfxEvadc_Adc_EmuxControl emuxConfig;
181 *
182 * IfxEvadc_Adc_initExternalMultiplexerModeConfig(&emuxConfig,evadc);
183 *
184 * emuxConfig.groupId = IfxEvadc_GroupId_1;
185 * emuxConfig.channels = (uint8)IfxEvadc_ChannelId_3;
186 * emuxConfig.startChannel = IfxEvadc_EmuxSelectValue_2; // it will take 0 to 2 external channel
187 *
188 * emuxConfig.sampleTimeControl = IfxEvadc_EmuxSampleTimeControl_always;
189 * emuxConfig.mode = IfxEvadc_ExternalMultiplexerMode_steady;
190 *
191 * IfxEvadc_Adc_EmuxPinConfig pinsConfig ={
192 * .pins={ &IfxEvadc_EMUX00_P02_6_OUT,
193 * &IfxEvadc_EMUX01_P02_7_OUT,
194 * &IfxEvadc_EMUX02_P02_8_OUT},
195 *
196 *
197 * .outputMode = IfxPort_OutputMode_pushPull,
198 * .padDriver = IfxPort_PadDriver_cmosAutomotiveSpeed1
199 * };
200 * emuxConfig.emuxOutPinConfig = pinsConfig;
201 *
202 * IfxEvadc_Adc_initExternalMultiplexerMode(evadc, &emuxConfig);
203 *
204 * IfxEvadc_setEmuxGroupResolution(&evadc->G[emuxConfig.groupId], 0, IfxEvadc_ChannelResolution_12bit);
205 * IfxEvadc_setEmuxGroupSampletime(&evadc->G[emuxConfig.groupId], 0, 50000, 1.0e-6);
206 *
207 * \endcode
208 *
209 * \defgroup IfxLld_Evadc_Adc Interface Driver
210 * \ingroup IfxLld_Evadc
211 * \defgroup IfxLld_Evadc_Adc_DataStructures Data Structures
212 * \ingroup IfxLld_Evadc_Adc
213 * \defgroup IfxLld_Evadc_Adc_Module Module Functions
214 * \ingroup IfxLld_Evadc_Adc
215 * \defgroup IfxLld_Evadc_Adc_Group Group Functions
216 * \ingroup IfxLld_Evadc_Adc
217 * \defgroup IfxLld_Evadc_Adc_Channel Channel Functions
218 * \ingroup IfxLld_Evadc_Adc
219 * \defgroup IfxLld_Evadc_Adc_Queue Queue Functions
220 * \ingroup IfxLld_Evadc_Adc
221 * \defgroup IfxLld_Evadc_Adc_Clock Clock Functions
222 * \ingroup IfxLld_Evadc_Adc
223 * \defgroup IfxLld_Evadc_Adc_Interrupt Interrupt Functions
224 * \ingroup IfxLld_Evadc_Adc
225 * \defgroup IfxLld_Evadc_Adc_Variables Variables
226 * \ingroup IfxLld_Evadc_Adc
227 * \defgroup IfxLld_Evadc_Adc_Global Global Functions
228 * \ingroup IfxLld_Evadc_Adc
229 * \defgroup IfxLld_Evadc_Adc_Emux Emux Functions
230 * \ingroup IfxLld_Evadc_Adc
231 * \defgroup IfxLld_Evadc_Adc_FastCompare Fast Compare Functions
232 * \ingroup IfxLld_Evadc_Adc
233 */
234
235 #ifndef IFXEVADC_ADC_H
236 #define IFXEVADC_ADC_H 1
237
238 /******************************************************************************/
239 /*----------------------------------Includes----------------------------------*/
240 /******************************************************************************/
241
242 #include "Evadc/Std/IfxEvadc.h"
243 #include "_Utilities/Ifx_Assert.h"
244
245 /******************************************************************************/
246 /*------------------------------Type Definitions------------------------------*/
247 /******************************************************************************/
248
249 typedef uint8 IfxEvadc_Adc_SYNCTR_STSEL;
250
251 /******************************************************************************/
252 /*-----------------------------Data Structures--------------------------------*/
253 /******************************************************************************/
254
255 /** \addtogroup IfxLld_Evadc_Adc_DataStructures
256 * \{ */
257 /** \brief EVADC handle data structure
258 */
259 typedef struct
260 {
261 Ifx_EVADC *evadc; /**< \brief Specifies the pointer to the EVADC module registers */
262 } IfxEvadc_Adc;
263
264 /** \brief Gating/Trigger configuration structure
265 */
266 typedef struct
267 {
268 IfxEvadc_GatingSource gatingSource; /**< \brief Specifies used gate input for group */
269 IfxEvadc_TriggerSource triggerSource; /**< \brief Specifies used Trigger input for group */
270 IfxEvadc_GatingMode gatingMode; /**< \brief Specifies gating mode. High level, Low Level or Gating disabled */
271 IfxEvadc_TriggerMode triggerMode; /**< \brief Specifies trigger mode. Rising, falling any edge leads to an trigger event */
272 } IfxEvadc_Adc_GatingTriggerConfig;
273
274 /** \} */
275
276 /** \addtogroup IfxLld_Evadc_Adc_DataStructures
277 * \{ */
278 /** \brief Arbiter configuration structure.
279 */
280 typedef struct
281 {
282 IfxEvadc_ArbitrationRounds arbiterRoundLength; /**< \brief Specifies arbiter round length. */
283 boolean requestSlotQueue0Enabled; /**< \brief request queue0 if enabled. */
284 boolean requestSlotQueue1Enabled; /**< \brief request queue1 if enabled. */
285 boolean requestSlotQueue2Enabled; /**< \brief request queue2 if enabled. */
286 } IfxEvadc_Adc_ArbiterConfig;
287
288 /** \brief Input class configuration structure
289 */
290 typedef struct
291 {
292 float32 sampleTime; /**< \brief Specifies the requested sample time for input class */
293 IfxEvadc_ChannelNoiseReduction conversionMode; /**< \brief Specifies the conversion Mode, noise reduction levels */
294 IfxEvadc_SpreadEarlySamplePointStandardConversionsMode samplePointStandard;
295 IfxEvadc_AnalogInputPrechargeControl analogInputPrechargeControlStandard;
296 float32 sampleTimeEMUX;
297 IfxEvadc_ChannelNoiseReductionEMUX conversionModeEMUX;
298 IfxEvadc_SpreadEarlySamplePointEMUXConversionsMode samplePointEMUX;
299 IfxEvadc_AnalogInputPrechargeControl analogInputPrechargeControlEMUX;
300 } IfxEvadc_Adc_ClassConfig;
301
302 typedef struct
303 {
304 IfxEvadc_Emux_Out *pins[3]; /**< \brief Emux Pins configuration */
305 IfxPort_OutputMode outputMode; /**< \brief the pin output mode which should be configured */
306 IfxPort_PadDriver padDriver; /**< \brief Pad driver */
307 } IfxEvadc_Adc_EmuxPinConfig;
308
309 /** \brief Group handle data structure
310 */
311 typedef struct
312 {
313 IfxEvadc_Adc module; /**< \brief The EVADC handle structure */
314 Ifx_EVADC_G *group; /**< \brief Pointer to the group registers */
315 IfxEvadc_GroupId groupId; /**< \brief Specifies the group index */
316 } IfxEvadc_Adc_Group;
317
318 /** \brief Queue configuration structure
319 */
320 typedef struct
321 {
322 boolean flushQueueAfterInit; /**< \brief Specifies if the queue is flushed after configuration */
323 IfxEvadc_Adc_GatingTriggerConfig triggerConfig; /**< \brief trigger and gating configuration. */
324 IfxEvadc_RequestSlotPriority requestSlotPrio; /**< \brief priority of used queue request slot. */
325 IfxEvadc_RequestSlotStartMode requestSlotStartMode; /**< \brief start mode for request queue source. */
326 } IfxEvadc_Adc_QueueConfig;
327
328 /** \} */
329
330 /** \addtogroup IfxLld_Evadc_Adc_DataStructures
331 * \{ */
332 /** \brief Channel handle data structure
333 */
334 typedef struct
335 {
336 IfxEvadc_ChannelId channel; /**< \brief Specifies the channel index */
337 IfxEvadc_ChannelResult resultreg; /**< \brief Specifies allocated result register */
338 IFX_CONST IfxEvadc_Adc_Group *group; /**< \brief Specifies the group of the channel */
339 } IfxEvadc_Adc_Channel;
340
341 /** \brief Channel configuration structure
342 */
343 typedef struct
344 {
345 boolean globalResultUsage; /**< \brief Specifies storage in global result register */
346 boolean synchonize; /**< \brief Specifies synchronized conversion channel */
347 boolean rightAlignedStorage; /**< \brief Specifies result is right aligned */
348 Ifx_Priority resultPriority; /**< \brief Interrupt priority of the result trigger interrupt, if 0 the interrupt is disable */
349 Ifx_Priority channelPriority; /**< \brief Interrupt priority of the channel trigger interrupt, if 0 the interrupt is disable */
350 IfxSrc_Tos resultServProvider; /**< \brief Interrupt service provider for the result trigger interrupt */
351 IfxSrc_Tos channelServProvider; /**< \brief Interrupt service provider for the channel trigger interrupt */
352 IfxEvadc_SrcNr resultSrcNr; /**< \brief Service node of the result trigger */
353 IfxEvadc_SrcNr channelSrcNr; /**< \brief Service node of the channel trigger */
354 IfxEvadc_ChannelId channelId; /**< \brief Specifies the channel index */
355 IfxEvadc_InputClasses inputClass; /**< \brief Specifies input class selection */
356 IfxEvadc_ChannelReference reference; /**< \brief Specifies Reference selection */
357 IfxEvadc_ChannelResult resultRegister; /**< \brief Specifies Result register selection */
358 IfxEvadc_BoundarySelection lowerBoundary; /**< \brief Specifies lower boundary selection */
359 IfxEvadc_BoundarySelection upperBoundary; /**< \brief Specifies upper boundary selection */
360 IfxEvadc_BoundaryExtension boundaryMode; /**< \brief Specifies Standard mode of fast compare mode */
361 IfxEvadc_LimitCheck limitCheck; /**< \brief Specifies boundary band selection upper/lower */
362 IFX_CONST IfxEvadc_Adc_Group *group; /**< \brief Specifies pointer to the IfxEvadc_Adc_Group group handle */
363 IfxEvadc_DataModificationMode dataModificationMode; /**< \brief Specifies the Data Modification Mode.According to the value entered here, the meanings of values entered for dataReductionControlMode will mean either the number of results accumulated(GxRCRy.B.DMM=0) or filter coefficients(GxRCRy.B.DMM=1). */
364 IfxEvadc_DataReductionControlMode dataReductionControlMode; /**< \brief Depending on the valued of dataModificationMode, the meanings of values in this will differ.For details refer definition of IfxEvadc_DataReductionControlMode enum in IfxEvadc.h */
365 IfxEvadc_WaitForRead waitForReadMode;
366 IfxEvadc_FifoMode fifoMode;
367 } IfxEvadc_Adc_ChannelConfig;
368
369 /** \brief EVADC module configuration structure
370 */
371 typedef struct
372 {
373 Ifx_EVADC *evadc; /**< \brief Specifies the pointer to the EVADC module registers */
374 IfxEvadc_Adc_ClassConfig globalInputClass[IFXEVADC_NUM_GLOBAL_INPUTCLASSES]; /**< \brief Specifies the global conversion settings one and two */
375 IfxEvadc_AnalogClockGenerationMode analogClockGenerationMode;
376 IfxEvadc_SupplyVoltageLevelControl supplyVoltage;
377 IfxEvadc_StartupCalibration startupCalibrationControl;
378 } IfxEvadc_Adc_Config;
379
380 /** \brief Emux Control Structure
381 */
382 typedef struct
383 {
384 Ifx_EVADC *evadc; /**< \brief Pointer to EVADC Module Space */
385 IfxEvadc_ExternalMultiplexerMode mode; /**< \brief Specifies the External Multiplexer mode */
386 IfxEvadc_EmuxSelectValue startChannel; /**< \brief specifies the external channel start value(EMUX[x:0])
387 * x- specifies external channel number */
388 IfxEvadc_EmuxCodingScheme code; /**< \brief specifes binary/gray code */
389 IfxEvadc_EmuxSampleTimeControl sampleTimeControl; /**< \brief specifies when to use sample time control */
390 IfxEvadc_GroupId groupId; /**< \brief specifies groupId */
391 uint8 channels; /**< \brief specifies channel number */
392 IfxEvadc_EmuxInterface emuxInterface; /**< \brief specifies the Emux interface */
393 IfxEvadc_Adc_EmuxPinConfig emuxOutPinConfig; /**< \brief configure the emux output pin */
394 IfxEvadc_ChannelSelectionStyle channelSelectionStyle; /**< \brief External Multiplexer Channel Selection Style */
395 } IfxEvadc_Adc_EmuxControl;
396
397 /** \brief Group configuration structure
398 */
399 typedef struct
400 {
401 IFX_CONST IfxEvadc_Adc *module; /**< \brief Specifies pointer to the IfxEvadc_Adc module handle */
402 IfxEvadc_GroupId groupId; /**< \brief Specifies the group/kernel id */
403 IfxEvadc_GroupId master; /**< \brief Specifies the master group. If master is different from groupId, then the group is configured as slave. */
404 IfxEvadc_Adc_ClassConfig inputClass[IFXEVADC_NUM_INPUTCLASSES]; /**< \brief Specifies conversion settings one and two */
405 IfxEvadc_Adc_QueueConfig queueRequest[3]; /**< \brief Specifies queue0 mode configuration */
406 IfxEvadc_Adc_ArbiterConfig arbiter; /**< \brief Arbiter configuration structure. */
407 float32 analogFrequency; /**< \brief specifies analog frequency in Hz */
408 boolean startupCalibration; /**< \brief Can be enabled to execute a startup calibration (disabled by default). */
409 boolean disablePostCalibration; /**< \brief Specifies if calibration after conversion (post calibration) should be disabled */
410 IfxEvadc_InputClasses inputClasses;
411 boolean doubleClockForMSBConversionSelection;
412 IfxEvadc_SampleSynchronization sampleSynchronizationEnabled;
413 IfxEvadc_AnalogClockSynchronizationDelay analogClockSynchronizationDelay;
414 IfxEvadc_CalibrationSampleTimeControl calibrationSampleTimeControlMode;
415 IfxEvadc_ReferencePrechargeControl referencePrechargeControlMode;
416 boolean referencePrechargeEnabled;
417 boolean inputBufferEnabled;
418 IfxEvadc_IdlePrecharge idlePrechargeLevel; /**< \brief Voltage level to which sampling capacitor will be precharged when idle. */
419 IfxEvadc_AnalogConverterMode analogConverterMode;
420 } IfxEvadc_Adc_GroupConfig;
421
422 /** \} */
423
424 /** \addtogroup IfxLld_Evadc_Adc_FastCompare
425 * \{ */
426 typedef struct
427 {
428 IfxEvadc_Adc module; /**< \brief The EVADC handle structure */
429 Ifx_EVADC_FC *fastCompareChannel;
430 IfxEvadc_GroupId fastCompareChannelId; /**< \brief Following values can be taken for fastCompareChannelId:
431 *
432 * IfxEvadc_GroupId_12 for Fast compare channel 0
433 * IfxEvadc_GroupId_13 for Fast compare channel 1
434 * IfxEvadc_GroupId_14 for Fast compare channel 2
435 * IfxEvadc_GroupId_15 for Fast compare channel 3 */
436 } IfxEvadc_Adc_FastCompareChannel;
437
438 /** \brief Configuring Fast Compare channel operations
439 */
440 typedef struct
441 {
442 IfxEvadc_Adc *module; /**< \brief Pointer to EVADC module handle */
443 IfxEvadc_GroupId fastCompareChannelId;
444 IfxEvadc_BoundaryFlagActivationMode boundaryFlagActivation; /**< \brief Selects the behaviour of BoundaryFlag in FCBFL.B.BFA */
445 IfxEvadc_BoundaryFlagInversionControl boundaryFlagInversion; /**< \brief Select whether to use Boundary Flag(FCM.B.BFL) directly or in a inverted format */
446 IfxEvadc_BoundaryFlagNodePointer boundaryFlagNodePointer; /**< \brief Options for FCM.B.BFLNP to select Boundary Flag Node Pointer */
447 IfxEvadc_BoundaryFlagSwControl boundaryFlagAction; /**< \brief Action to be performed on the boundary flag(BFL) */
448 IfxEvadc_ChannelEventMode channelEventMode; /**< \brief Channel Event Mode for configuring generation of events for Fast Compare channels in FCCTRL.B.CHEVMODE */
449 IfxEvadc_ClockDividerFactor clockDivider; /**< \brief Defines the frequency of the analog converter clock f_ADCI (base clock for conversion steps), derived from the peripheral clock. */
450 IfxEvadc_ExternalTriggerPolarity externalTriggerPolarity; /**< \brief External Trigger Polarity to be set in FCCTRL.B.XTPOL */
451 IfxEvadc_FastCompareAnalogClockSynchronizationDelay delay; /**< \brief Defines the delay of the analog clock in clocks after the sync signal in FCM.B.ACSD */
452 IfxEvadc_FastCompareAnalogConverterControl analogConverterControllerMode; /**< \brief Settings for Analog Coverter Controller to be done in FCM.B.ANON */
453 IfxEvadc_FastCompareAutomaticUpdate automaticUpdateMode; /**< \brief Defines the source of the value(s) in bitfield FCM.B.FCREF */
454 IfxEvadc_FastCompareRunControl runMode;
455 IfxEvadc_RampRunControl rampGenerationMode; /**< \brief Defines the run conditions for the ramp generation in FCM.B.RUNRAMP */
456 IfxEvadc_FastCompareServiceRequestGeneration serviceRequestGenerationEvent; /**< \brief Criteria/mode settings for service request generation in FCM.B.SRG */
457 IfxEvadc_GateOperatingMode gateOperatingMode; /**< \brief Gate Operating Mode to be filled in FCCTRL.B.GTMODE */
458 IfxEvadc_RampDirection rampDirection; /**< \brief Ramp direction setting in FCM.B.FCRDIR */
459 IfxEvadc_SampleSynchronization sampleTimingSynchronization; /**< \brief Sample timing sync settings for FCM.B.SSE */
460 IfxEvadc_TriggerOperatingMode externalTriggerOperatingMode; /**< \brief Trigger operating mode in Fast Compare channels, to be entered in FCCTRL.B.XTMODE */
461 uint8 additionalClockCycles; /**< \brief Number of additional clock cycles to be added to the minimum sample phase of 2 analog clock cycles. */
462 IfxEvadc_ReferencePrechargeControl referenceInputPrechargeDuration; /**< \brief Precharge duration for the reference input */
463 IfxEvadc_AnalogInputPrechargeControl analogInputPrechargeDuration; /**< \brief Precharge duration for the analog input */
464 uint8 triggerInterval; /**< \brief Defines the interval at which fast compare operations are triggered in steps of 16 * 1/f_ADC */
465 uint16 referenceValue; /**< \brief The input level is compared to this value.
466 * The resulting reference level is (V_AREF / 1024) * FCM.B.FCREF */
467 boolean boundaryFlagValue; /**< \brief Defines the logic value that replaces the compare result while the gate input is inactive (low) in lock mode. */
468 } IfxEvadc_Adc_FastCompareChannelConfig;
469
470 /** \} */
471
472 /** \addtogroup IfxLld_Evadc_Adc_Module
473 * \{ */
474
475 /******************************************************************************/
476 /*-------------------------Inline Function Prototypes-------------------------*/
477 /******************************************************************************/
478
479 /** \brief Reset the EVADC module
480 * \param evadc pointer to the EVADC module
481 * \return None
482 *
483 * Example Usage :\ref IfxLld_Evadc_Adc_Usage
484 *
485 */
486 IFX_INLINE void IfxEvadc_Adc_deInitModule(IfxEvadc_Adc *evadc);
487
488 /** \brief Get the current EVADC configuration (e.g. EVADC frequency)
489 * \param evadc pointer to the EVADC module
490 * \param config pointer to the EVADC module configuration
491 * \param evadcG Pointer to the register Group
492 * \return None
493 *
494 * Example Usage :\ref IfxLld_Evadc_Adc_Usage
495 *
496 */
497 IFX_INLINE void IfxEvadc_Adc_getModuleConfig(IfxEvadc_Adc *evadc, IfxEvadc_Adc_Config *config, Ifx_EVADC_G *evadcG);
498
499 /** \brief Get conversion result based on the Request Source. (Function does not care about the alignment)
500 * value = raw * gain + offset
501 * \param group pointer to the EVADC group
502 * \param channel channel number
503 * \param sourceType type of request source
504 * \return scaled Conversion result
505 *
506 * \code
507 *
508 * // IMPORTANT: for deterministic results we have to disable the queue gate
509 * // while filling the queue, otherwise results could be output in the wrong order
510 * unsigned savedGate = adcGroup.module.evadc->G[adcGroup.groupId].Queue0.QMR0.B.ENGT;
511 * adcGroup.module.evadc->G[adcGroup.groupId].Queue0.QMR0.B.ENGT = 0;
512 *
513 * // create channel config
514 * IfxEvadc_Adc_ChannelConfig adcChannelConfig[3];
515 * IfxEvadc_Adc_Channel adcChannel[3];
516 *
517 * for(int chnIx=0; chnIx<3; ++chnIx) {
518 * IfxEvadc_Adc_initChannelConfig(&adcChannelConfig[chnIx], &adcGroup);
519 *
520 * adcChannelConfig[chnIx].channelId = (IfxEvadc_ChannelId)(chnIx);
521 * adcChannelConfig[chnIx].resultRegister = IfxEvadc_ChannelResult_1; // use result register #1 for all channels
522 *
523 * // initialize the channel
524 * IfxEvadc_Adc_initChannel(&adcChannel[chnIx], &adcChannelConfig[chnIx]);
525 *
526 * // Add channel to queue with refill enabled
527 * IfxEvadc_Adc_addToQueue(&adcChannel[chnIx], IFXEVADC_QUEUE_REFILL,IfxEvadc_RequestSource_queue0);
528 *
529 * // restore previous gate config
530 * adcGroup.module.evadc->G[adcGroup.groupId].Queue0.QMR0.B.ENGT = savedGate;
531 *
532 * // start the Queue
533 * IfxEvadc_Adc_startQueue(&adcGroup,IfxEvadc_RequestSource_queue0); // just for the case that somebody copy&pastes the code - the queue has already been started in previous test
534 *
535 * // wait for valid result
536 * Ifx_EVADC_G_RES resultChannel;
537 * do {
538 * resultChannel = IfxEvadc_Adc_getResultBasedOnRequestSource(&adcGroup, IfxEvadc_ChannelId2, IfxEvadc_RequestSource_queue0);
539 * } while( !resultChannel.B.VF );
540 * \endcode
541 *
542 */
543 IFX_INLINE Ifx_EVADC_G_RES IfxEvadc_Adc_getResultBasedOnRequestSource(IfxEvadc_Adc_Group *group, IfxEvadc_ChannelId channel, IfxEvadc_RequestSource sourceType);
544
545 /******************************************************************************/
546 /*-------------------------Global Function Prototypes-------------------------*/
547 /******************************************************************************/
548
549 /** \brief Initialise the EVADC to run with the expected frequency and calibration
550 * \param evadc pointer to the EVADC handle
551 * \param config pointer to the EVADC configuration
552 * \return IfxEvadc_Status
553 *
554 * For coding example see: \ref IfxLld_Evadc_Adc_Usage
555 *
556 */
557 IFX_EXTERN IfxEvadc_Status IfxEvadc_Adc_initModule(IfxEvadc_Adc *evadc, const IfxEvadc_Adc_Config *config);
558
559 /** \brief Initialise buffer with default EVADC configuration
560 * \param config pointer to the EVADC module configuration
561 * \param evadc pointer to the EVADC
562 * \return None
563 *
564 * For coding example see: \ref IfxLld_Evadc_Adc_Usage
565 *
566 */
567 IFX_EXTERN void IfxEvadc_Adc_initModuleConfig(IfxEvadc_Adc_Config *config, Ifx_EVADC *evadc);
568
569 /** \} */
570
571 /** \addtogroup IfxLld_Evadc_Adc_Group
572 * \{ */
573
574 /******************************************************************************/
575 /*-------------------------Inline Function Prototypes-------------------------*/
576 /******************************************************************************/
577
578 /** \brief Gets the current group module register address
579 * \param group Group handle data structure
580 * \return Group module register base address
581 */
582 IFX_INLINE Ifx_EVADC *IfxEvadc_Adc_getEvadcFromGroup(const IfxEvadc_Adc_Group *group);
583
584 /** \brief Gets the current group register set
585 * \param group Group handle data structure
586 * \return Group register set
587 */
588 IFX_INLINE Ifx_EVADC_G *IfxEvadc_Adc_getGroupRegsFromGroup(const IfxEvadc_Adc_Group *group);
589
590 /** \brief Get conversion result for the group
591 * \param group pointer to the EVADC group
592 * \param results pointer to scaled conversion results
593 * \param resultOffset offset for the first result
594 * \param numResults number of results
595 * \return None
596 *
597 * \code
598 * // create configuration
599 * IfxEvadc_Adc_Config adcConfig;
600 * IfxEvadc_Adc_initModuleConfig(&adcConfig, &MODULE_EVADC);
601 *
602 * // initialize module
603 * IfxEvadc_Adc evadc;
604 * IfxEvadc_Adc_initModule(&evadc, &adcConfig);
605 *
606 * // create group config
607 * IfxEvadc_Adc_GroupConfig adcGroupConfig;
608 * IfxEvadc_Adc_initGroupConfig(&adcGroupConfig, &evadc);
609 *
610 * // change group (default is GroupId0, change to GroupId2)
611 * adcGroupConfig.groupId = IfxEvadc_GroupId2;
612 * adcGroupConfig.master = adcGroupConfig.groupId;
613 *
614 * // enable gate in "always" mode (no edge detection)
615 * adcGroupConfig.queueRequest[0].triggerConfig.gatingMode = IfxEvadc_GatingMode_always;
616 *
617 * // enable all arbiter request sources
618 * adcGroupConfig.arbiter.requestSlotQueue0Enabled = TRUE; // enable Queue0 mode
619 * adcGroupConfig.arbiter.requestSlotQueue1Enabled = TRUE; // enable Queue1 mode
620 * adcGroupConfig.arbiter.requestSlotQueue2Enabled = TRUE; // enable Queue2 mode
621 *
622 * // initialize the group
623 * IfxEvadc_Adc_Group adcGroup;
624 * IfxEvadc_Adc_initGroup(&adcGroup, &adcGroupConfig);
625 *
626 * // create channel config
627 * IfxEvadc_Adc_ChannelConfig adcChannelConfig;
628 * IfxEvadc_Adc_initChannelConfig(&adcChannelConfig, &adcGroup);
629 *
630 *
631 * // change channel (default is ChannelId_0, change to ChannelId_3)
632 * adcChannelConfig.channelId = IfxEvadc_ChannelId_3;
633 *
634 * // initialize the channel
635 * IfxEvadc_Adc_Channel adcChannel;
636 * IfxEvadc_Adc_initChannel(&adcChannel, &adcChannelConfig);
637 *
638 * // Add channel to queue with refill enabled
639 * IfxEvadc_Adc_addToQueue(&adcChannel, IfxEvadc_RequestSource_queue0, IFXEVADC_QUEUE_REFILL);
640 *
641 * // start the Queue
642 * IfxEvadc_Adc_startQueue(&adcGroup, IfxEvadc_RequestSource_queue0);
643 *
644 *
645 * // get 10 results
646 * for(int i=0; i<10; ++i) {
647 * unsigned group = adcChannel.group->groupId;
648 * unsigned channel = adcChannel.channel;
649 *
650 *
651 * // fetch the 2 results of conversion for group 0
652 * Ifx_EVADC_G_RES results[10];
653 * IfxEvadc_Adc_getGroupResult(&adcGroup, results, 0, 2);
654 * \endcode
655 *
656 */
657 IFX_INLINE void IfxEvadc_Adc_getGroupResult(IfxEvadc_Adc_Group *group, Ifx_EVADC_G_RES *results, uint32 resultOffset, uint32 numResults);
658
659 /******************************************************************************/
660 /*-------------------------Global Function Prototypes-------------------------*/
661 /******************************************************************************/
662
663 /** \brief Reset the EVADC group
664 * \param group pointer to the EVADC group
665 * \return None
666 *
667 * Example Usage :\ref IfxLld_Evadc_Adc_Usage
668 *
669 */
670 IFX_EXTERN void IfxEvadc_Adc_deInitGroup(IfxEvadc_Adc_Group *group);
671
672 /** \brief Get the current group configuration (e.g. evadc frequency)
673 * \param group pointer to the EVADC group
674 * \param config pointer to the EVADC group configuration
675 * \return None
676 *
677 * Example Usage :\ref IfxLld_Evadc_Adc_Usage
678 *
679 */
680 IFX_EXTERN void IfxEvadc_Adc_getGroupConfig(IfxEvadc_Adc_Group *group, IfxEvadc_Adc_GroupConfig *config);
681
682 /** \brief Initialise the EVADC group (also queue modes) Slave Groups must initialize first.
683 * \param group Pointer to the EVADC group
684 * \param config pointer to the EVADC group configuration
685 * \return IfxEvadc_Status
686 *
687 * For coding example see: \ref IfxLld_Evadc_Adc_Usage
688 *
689 */
690 IFX_EXTERN IfxEvadc_Status IfxEvadc_Adc_initGroup(IfxEvadc_Adc_Group *group, const IfxEvadc_Adc_GroupConfig *config);
691
692 /** \brief Initialise buffer with default EVADC configuration
693 *
694 * NOTE: By default startupCalibration = FALSE in IfxEvadc_Adc_initGroupConfig() and startupCalibrationControl = IfxEvadc_StartupCalibration_noAction in IfxEvadc_Adc_initModuleConfig().
695 *
696 * In case startup calibration is required, while configuring the last group, startupCalibration inside group config structure must be set to TRUE after calling IfxEvadc_Adc_initGroupConfig() and before calling IfxEvadc_Adc_initGroup().
697 * \param config pointer to the EVADC group configuration
698 * \param evadc Pointer to the EVADC module
699 * \return None
700 *
701 * For coding example see: \ref IfxLld_Evadc_Adc_Usage
702 *
703 */
704 IFX_EXTERN void IfxEvadc_Adc_initGroupConfig(IfxEvadc_Adc_GroupConfig *config, IfxEvadc_Adc *evadc);
705
706 /** \} */
707
708 /** \addtogroup IfxLld_Evadc_Adc_Channel
709 * \{ */
710
711 /******************************************************************************/
712 /*-------------------------Inline Function Prototypes-------------------------*/
713 /******************************************************************************/
714
715 /** \brief pointer to the EVADC channel
716 * \param channel pointer to the EVADC channel
717 * \param waitForReadMode wait for read mode enabled/disable
718 * \return None
719 *
720 * For coding example see: \ref IfxEvadc_Adc_getResultBasedOnRequestSource
721 *
722 */
723 IFX_INLINE void IfxEvadc_Adc_configureWaitForReadMode(IfxEvadc_Adc_Channel *channel, boolean waitForReadMode);
724
725 /** \brief Get conversion result (Function does not care about the alignment)
726 * \param channel pointer to the EVADC channel
727 * \return scaled Conversion result
728 *
729 * For coding example see: \ref IfxLld_Evadc_Adc_Usage
730 *
731 */
732 IFX_INLINE Ifx_EVADC_G_RES IfxEvadc_Adc_getResult(IfxEvadc_Adc_Channel *channel);
733
734 /******************************************************************************/
735 /*-------------------------Global Function Prototypes-------------------------*/
736 /******************************************************************************/
737
738 /** \brief Get the current channel configuration (e.g. sample settings)
739 * \param channel pointer to the EVADC channel
740 * \param config pointer to the EVADC channel configuration
741 * \return None
742 *
743 * Example Usage :\ref IfxLld_Evadc_Adc_Usage
744 *
745 */
746 IFX_EXTERN void IfxEvadc_Adc_getChannelConfig(IfxEvadc_Adc_Channel *channel, IfxEvadc_Adc_ChannelConfig *config);
747
748 /** \brief Initialise one channel with given configuration
749 * \param channel pointer to the EVADC channel
750 * \param config pointer to the EVADC channel configuration
751 * \return IfxEvadc_Status
752 *
753 * For coding example see: \ref IfxLld_Evadc_Adc_Usage
754 *
755 */
756 IFX_EXTERN IfxEvadc_Status IfxEvadc_Adc_initChannel(IfxEvadc_Adc_Channel *channel, const IfxEvadc_Adc_ChannelConfig *config);
757
758 /** \brief Initialise buffer with default channel configuration
759 * \param config pointer to the EVADC channel configuration
760 * \param group pointer to the EVADC group
761 * \return None
762 *
763 * For coding example see: \ref IfxLld_Evadc_Adc_Usage
764 *
765 */
766 IFX_EXTERN void IfxEvadc_Adc_initChannelConfig(IfxEvadc_Adc_ChannelConfig *config, const IfxEvadc_Adc_Group *group);
767
768 /** \} */
769
770 /** \addtogroup IfxLld_Evadc_Adc_Queue
771 * \{ */
772
773 /******************************************************************************/
774 /*-------------------------Inline Function Prototypes-------------------------*/
775 /******************************************************************************/
776
777 /** \brief Add an entry to the queue of a group for the specified channel with the following options set:
778 * refill
779 * source interrupt enable/disable
780 * external trigger control
781 * \param channel pointer to the EVADC channel
782 * \param sourceType Request source Type(Queue 0,Queue 1,Queue 2)
783 * \param options options for channel
784 * \return None
785 *
786 * For coding example see: \ref IfxEvadc_Adc_getResult
787 *
788 */
789 IFX_INLINE void IfxEvadc_Adc_addToQueue(IfxEvadc_Adc_Channel *channel, IfxEvadc_RequestSource sourceType, uint32 options);
790
791 /** \brief Flush the contents of the queue of a group
792 * \param group pointer to the EVADC group
793 * \param sourceType Request source Type(Queue 0,Queue 1,Queue 2)
794 * \return None
795 *
796 * For coding example see: \ref IfxEvadc_Adc_getResult
797 *
798 */
799 IFX_INLINE void IfxEvadc_Adc_clearQueue(IfxEvadc_Adc_Group *group, IfxEvadc_RequestSource sourceType);
800
801 /** \brief Gives the status of the Queue of a group by returning non zero value if the Queue is full
802 * \param group pointer to the EVADC group
803 * \param sourceType Request source Type(Queue 0,Queue 1,Queue 2)
804 * \return Queue status
805 *
806 * For coding example see: \ref IfxEvadc_Adc_getResult
807 *
808 */
809 IFX_INLINE IfxEvadc_Status IfxEvadc_Adc_getQueueStatus(IfxEvadc_Adc_Group *group, IfxEvadc_RequestSource sourceType);
810
811 /** \brief Starts a queue of a group by generating a trigger event through software
812 * \param group pointer to the EVADC group
813 * \param sourceType Request source Type(Queue 0,Queue 1,Queue 2)
814 * \return None
815 *
816 * For coding example see: \ref IfxEvadc_Adc_getResult
817 *
818 */
819 IFX_INLINE void IfxEvadc_Adc_startQueue(IfxEvadc_Adc_Group *group, IfxEvadc_RequestSource sourceType);
820
821 /** \} */
822
823 /** \addtogroup IfxLld_Evadc_Adc_Global
824 * \{ */
825
826 /******************************************************************************/
827 /*-------------------------Inline Function Prototypes-------------------------*/
828 /******************************************************************************/
829
830 /** \brief access function to enable/disable wait for read mode for global result register
831 * \param evadc pointer to the EVADC module
832 * \param waitForReadMode wait for read mode enabled/disabled
833 * \return None
834 *
835 * For coding example see: \ref IfxEvadc_Adc_getGlobalResult
836 *
837 */
838 IFX_INLINE void IfxEvadc_Adc_configureWaitForReadModeForGlobalResultRegister(IfxEvadc_Adc *evadc, boolean waitForReadMode);
839
840 /** \brief returns result stored in global result register
841 * \param evadc pointer to the EVADC module
842 * \return global result register
843 *
844 * \code
845 * // create configuration
846 * IfxEvadc_Adc_Config adcConfig;
847 * IfxEvadc_Adc_initModuleConfig(&adcConfig, &MODULE_EVADC);
848 *
849 * // initialize module
850 * IfxEvadc_Adc evadc;
851 * IfxEvadc_Adc_initModule(&evadc, &adcConfig);
852 *
853 * // create group config
854 * IfxEvadc_Adc_GroupConfig adcGroupConfig;
855 * IfxEvadc_Adc_initGroupConfig(&adcGroupConfig, &evadc);
856 *
857 * // change group (default is GroupId_0, change to GroupId_3)
858 * adcGroupConfig.groupId = IfxEvadc_GroupId_3;
859 *
860 * // IMPORTANT: usually we use the same group as master!
861 * adcGroupConfig.master = adcGroupConfig.groupId;
862 *
863 * // initialize the group
864 * IfxEvadc_Adc_Group adcGroup;
865 * IfxEvadc_Adc_initGroup(&adcGroup, &adcGroupConfig);
866 *
867 * // create channel config
868 * IfxEvadc_Adc_ChannelConfig adcChannelConfig2;
869 * IfxEvadc_Adc_initChannelConfig(&adcChannelConfig2, &adcGroup);
870 * adcChannelConfig2.backgroundChannel = TRUE;
871 * adcChannelConfig2.globalResultUsage = TRUE;
872 *
873 * // change channel (default is ChannelId0, change to ChannelId2)
874 * adcChannelConfig2.channelId = IfxEvadc_ChannelId2;
875 *
876 * // initialize the channel
877 * IfxEvadc_Adc_Channel adcChannel2;
878 * IfxEvadc_Adc_initChannel(&adcChannel2, &adcChannelConfig2);
879 *
880 * // create channel config
881 * IfxEvadc_Adc_ChannelConfig adcChannelConfig5;
882 * IfxEvadc_Adc_initChannelConfig(&adcChannelConfig5, &adcGroup);
883 * adcChannelConfig5.backgroundChannel = TRUE;
884 * adcChannelConfig5.globalResultUsage = TRUE;
885 *
886 * // change channel (default is ChannelId0, change to ChannelId5)
887 * adcChannelConfig5.channelId = IfxEvadc_ChannelId5;
888 *
889 *
890 * // initialize the channel
891 * IfxEvadc_Adc_Channel adcChannel5;
892 * IfxEvadc_Adc_initChannel(&adcChannel5, &adcChannelConfig5);
893 *
894 * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
895 * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
896 *
897 * //configure wait for read mode
898 * IfxEvadc_Adc_configureWaitForReadModeForGlobalResultRegister(&evadc, TRUE);
899 *
900 * // Add channel to queue with refill enabled
901 * IfxEvadc_Adc_addToQueue(&adcChannel[chnIx], IfxEvadc_RequestSource_queue0, IFXEVADC_QUEUE_REFILL);
902 *
903 * // start the Queue
904 * IfxEvadc_Adc_startQueue(&adcGroup, IfxEvadc_RequestSource_queue0); // just for the case that somebody copy&pastes the code - the queue has already been started in previous test
905 *
906 *
907 * // wait for valid result for channel 2
908 * Ifx_EVADC_GLOB.RES resultChannel2;
909 * do {
910 * resultChannel2 = IfxEvadc_Adc_getGlobalResult(&evadc);
911 * } while( !resultChannel2.B.VF );
912 *
913 * // wait for valid result for channel 5
914 * Ifx_EVADC_GLOB.RES resultChannel5;
915 * do {
916 * resultChannel5 = IfxEvadc_Adc_getGlobalResult(&evadc);
917 * } while( !resultChannel5.B.VF );
918 * \endcode
919 *
920 */
921 IFX_INLINE Ifx_EVADC_GLOB_RES IfxEvadc_Adc_getGlobalResult(IfxEvadc_Adc *evadc);
922
923 /******************************************************************************/
924 /*-------------------------Global Function Prototypes-------------------------*/
925 /******************************************************************************/
926
927 /** \brief Configure global settings in the GLOBCFG register
928 * \param evadc Pointer to EVADC SFRs
929 * \param config pointer to the EVADC module configuration
930 * \return None
931 */
932 IFX_EXTERN void IfxEvadc_Adc_setGlobalConfigurations(Ifx_EVADC *evadc, const IfxEvadc_Adc_Config *config);
933
934 /** \} */
935
936 /** \addtogroup IfxLld_Evadc_Adc_Emux
937 * \{ */
938
939 /******************************************************************************/
940 /*-------------------------Global Function Prototypes-------------------------*/
941 /******************************************************************************/
942
943 /** \brief initalise external multiplexer.
944 * \param evadc Pointer to EVADC Module space
945 * \param emuxControl speciifies EMUX configuration
946 * \return None
947 */
948 IFX_EXTERN void IfxEvadc_Adc_initExternalMultiplexerMode(Ifx_EVADC *evadc, const IfxEvadc_Adc_EmuxControl *emuxControl);
949
950 /** \brief initialise default configuration for external multiplexer
951 * \param emuxConfig speciifies EMUX configuration
952 * \param evadc pointer to EVADC module space
953 * \return None
954 */
955 IFX_EXTERN void IfxEvadc_Adc_initExternalMultiplexerModeConfig(IfxEvadc_Adc_EmuxControl *emuxConfig, Ifx_EVADC *evadc);
956
957 /** \} */
958
959 /** \addtogroup IfxLld_Evadc_Adc_FastCompare
960 * \{ */
961
962 /******************************************************************************/
963 /*-------------------------Global Function Prototypes-------------------------*/
964 /******************************************************************************/
965
966 /** \brief Initializing the Fast Compare channel.
967 * \param fastCompareChannel Pointer to the EVADC Fast Compare Channel group
968 * \param config Pointer to the EVADC Fast Compare Channel configuration structure
969 * \return None
970 */
971 IFX_EXTERN void IfxEvadc_Adc_initFastCompareChannel(IfxEvadc_Adc_FastCompareChannel *fastCompareChannel, IfxEvadc_Adc_FastCompareChannelConfig *config);
972
973 /** \brief Initializing Fast Compare Channel config structure with default configurations
974 * \param config pointer to the EVADC fast compare channel configuration structure
975 * \param evadc Pointer to the EVADC module
976 * \return None
977 */
978 IFX_EXTERN void IfxEvadc_Adc_initFastCompareChannelConfig(IfxEvadc_Adc_FastCompareChannelConfig *config, IfxEvadc_Adc *evadc);
979
980 /** \} */
981
982 /******************************************************************************/
983 /*-------------------------Global Function Prototypes-------------------------*/
984 /******************************************************************************/
985
986 /** \brief set analog converter mode
987 * \param evadc Pointer to module space
988 * \param group Pointer to evadc group
989 * \param analogConverterMode specifies analog convert mode
990 * \return None
991 */
992 IFX_EXTERN void IfxEvadc_Adc_setAnalogConvertControl(Ifx_EVADC *evadc, IfxEvadc_Adc_Group *group, IfxEvadc_AnalogConverterMode analogConverterMode);
993
994 /******************************************************************************/
995 /*---------------------Inline Function Implementations------------------------*/
996 /******************************************************************************/
997
998 IFX_INLINE void IfxEvadc_Adc_addToQueue(IfxEvadc_Adc_Channel *channel, IfxEvadc_RequestSource sourceType, uint32 options)
999 {
1000 IfxEvadc_addToQueue(channel->group->group, channel->channel, sourceType, options);
1001 }
1002
1003
1004 IFX_INLINE void IfxEvadc_Adc_clearQueue(IfxEvadc_Adc_Group *group, IfxEvadc_RequestSource sourceType)
1005 {
1006 IfxEvadc_clearQueue(group->group, TRUE, sourceType);
1007 }
1008
1009
1010 IFX_INLINE void IfxEvadc_Adc_configureWaitForReadMode(IfxEvadc_Adc_Channel *channel, boolean waitForReadMode)
1011 {
1012 IfxEvadc_configureWaitForReadMode(channel->group->group, channel->resultreg, waitForReadMode);
1013 }
1014
1015
1016 IFX_INLINE void IfxEvadc_Adc_configureWaitForReadModeForGlobalResultRegister(IfxEvadc_Adc *evadc, boolean waitForReadMode)
1017 {
1018 IfxEvadc_configureWaitForReadModeForGlobalResultRegister(evadc->evadc, waitForReadMode);
1019 }
1020
1021
1022 IFX_INLINE void IfxEvadc_Adc_deInitModule(IfxEvadc_Adc *evadc)
1023 {
1024 Ifx_EVADC *evadcSFR = evadc->evadc;
1025
1026 IfxEvadc_resetModule(evadcSFR);
1027 }
1028
1029
1030 IFX_INLINE Ifx_EVADC *IfxEvadc_Adc_getEvadcFromGroup(const IfxEvadc_Adc_Group *group)
1031 {
1032 return group->module.evadc;
1033 }
1034
1035
1036 IFX_INLINE Ifx_EVADC_GLOB_RES IfxEvadc_Adc_getGlobalResult(IfxEvadc_Adc *evadc)
1037 {
1038 return IfxEvadc_getGlobalResult(evadc->evadc);
1039 }
1040
1041
1042 IFX_INLINE Ifx_EVADC_G *IfxEvadc_Adc_getGroupRegsFromGroup(const IfxEvadc_Adc_Group *group)
1043 {
1044 return group->group;
1045 }
1046
1047
1048 IFX_INLINE void IfxEvadc_Adc_getGroupResult(IfxEvadc_Adc_Group *group, Ifx_EVADC_G_RES *results, uint32 resultOffset, uint32 numResults)
1049 {
1050 IfxEvadc_getGroupResult(group->group, results, resultOffset, numResults);
1051 }
1052
1053
1054 IFX_INLINE void IfxEvadc_Adc_getModuleConfig(IfxEvadc_Adc *evadc, IfxEvadc_Adc_Config *config, Ifx_EVADC_G *evadcG)
1055 {
1056 IFX_UNUSED_PARAMETER(evadcG);
1057 config->evadc = evadc->evadc;
1058 config->globalInputClass[0].conversionMode = IfxEvadc_getGlobalConversionMode(evadc->evadc, 0);
1059 config->globalInputClass[1].conversionMode = IfxEvadc_getGlobalConversionMode(evadc->evadc, 1);
1060 }
1061
1062
1063 IFX_INLINE IfxEvadc_Status IfxEvadc_Adc_getQueueStatus(IfxEvadc_Adc_Group *group, IfxEvadc_RequestSource sourceType)
1064 {
1065 return IfxEvadc_getQueueStatus(group->group, sourceType);
1066 }
1067
1068
1069 IFX_INLINE Ifx_EVADC_G_RES IfxEvadc_Adc_getResult(IfxEvadc_Adc_Channel *channel)
1070 {
1071 return IfxEvadc_getResult(channel->group->group, channel->resultreg);
1072 }
1073
1074
1075 IFX_INLINE Ifx_EVADC_G_RES IfxEvadc_Adc_getResultBasedOnRequestSource(IfxEvadc_Adc_Group *group, IfxEvadc_ChannelId channel, IfxEvadc_RequestSource sourceType)
1076 {
1077 return IfxEvadc_getResultBasedOnRequestSource(group->module.evadc, group->group, channel, sourceType);
1078 }
1079
1080
1081 IFX_INLINE void IfxEvadc_Adc_startQueue(IfxEvadc_Adc_Group *group, IfxEvadc_RequestSource sourceType)
1082 {
1083 IfxEvadc_startQueue(group->group, sourceType);
1084 }
1085
1086
1087 #endif /* IFXEVADC_ADC_H */
IfxEvadc_Adc_ChannelConfig::waitForReadMode
IfxEvadc_WaitForRead waitForReadMode
Definition: IfxEvadc_Adc.h:365
IfxEvadc_configureWaitForReadMode
IFX_INLINE void IfxEvadc_configureWaitForReadMode(Ifx_EVADC_G *group, uint32 resultIdx, boolean enabled)
access function to enable/disable wait for read mode for result registers
Definition: IfxEvadc.h:2255
IfxEvadc_Adc_FastCompareChannelConfig::automaticUpdateMode
IfxEvadc_FastCompareAutomaticUpdate automaticUpdateMode
Defines the source of the value(s) in bitfield FCM.B.FCREF.
Definition: IfxEvadc_Adc.h:453
IfxEvadc_Adc_ChannelConfig::resultSrcNr
IfxEvadc_SrcNr resultSrcNr
Service node of the result trigger.
Definition: IfxEvadc_Adc.h:352
IfxEvadc_BoundaryFlagSwControl
IfxEvadc_BoundaryFlagSwControl
Options for FCBFL.B.BFS to modify the Boundary Flag(FCM.B.BFL)
Definition: IfxEvadc.h:542
IfxEvadc_Adc_clearQueue
IFX_INLINE void IfxEvadc_Adc_clearQueue(IfxEvadc_Adc_Group *group, IfxEvadc_RequestSource sourceType)
Flush the contents of the queue of a group.
Definition: IfxEvadc_Adc.h:1004
IfxEvadc_Adc_EmuxPinConfig::padDriver
IfxPort_PadDriver padDriver
Pad driver.
Definition: IfxEvadc_Adc.h:306
IfxEvadc_Adc_GroupConfig::arbiter
IfxEvadc_Adc_ArbiterConfig arbiter
Arbiter configuration structure.
Definition: IfxEvadc_Adc.h:406
IfxEvadc_Adc_getGroupRegsFromGroup
IFX_INLINE Ifx_EVADC_G * IfxEvadc_Adc_getGroupRegsFromGroup(const IfxEvadc_Adc_Group *group)
Gets the current group register set.
Definition: IfxEvadc_Adc.h:1042
IfxEvadc_Adc_GroupConfig::analogFrequency
float32 analogFrequency
specifies analog frequency in Hz
Definition: IfxEvadc_Adc.h:407
IfxEvadc_ClockDividerFactor
IfxEvadc_ClockDividerFactor
Defines the frequency of the analog converter clock f_ADCI (base clock for conversion steps)...
Definition: IfxEvadc.h:564
IfxEvadc_Adc_GroupConfig::idlePrechargeLevel
IfxEvadc_IdlePrecharge idlePrechargeLevel
Voltage level to which sampling capacitor will be precharged when idle.
Definition: IfxEvadc_Adc.h:418
IfxEvadc_Adc_GroupConfig::referencePrechargeEnabled
boolean referencePrechargeEnabled
Definition: IfxEvadc_Adc.h:416
IfxEvadc_Adc_QueueConfig::triggerConfig
IfxEvadc_Adc_GatingTriggerConfig triggerConfig
trigger and gating configuration.
Definition: IfxEvadc_Adc.h:323
IfxEvadc_Adc_Group::module
IfxEvadc_Adc module
The EVADC handle structure.
Definition: IfxEvadc_Adc.h:313
IfxEvadc_Adc_ClassConfig::analogInputPrechargeControlEMUX
IfxEvadc_AnalogInputPrechargeControl analogInputPrechargeControlEMUX
Definition: IfxEvadc_Adc.h:299
IfxEvadc_ChannelSelectionStyle
IfxEvadc_ChannelSelectionStyle
External Multiplexer Channel Selection Style as defined in Ifx_EVADC.G[x].EMUXCTR.B.EMXCSS.
Definition: IfxEvadc.h:192
IfxEvadc_Adc_ChannelConfig::channelId
IfxEvadc_ChannelId channelId
Specifies the channel index.
Definition: IfxEvadc_Adc.h:354
IfxEvadc_Adc_GroupConfig::inputClasses
IfxEvadc_InputClasses inputClasses
Definition: IfxEvadc_Adc.h:410
IfxEvadc_WaitForRead
IfxEvadc_WaitForRead
Wait-for-Read Mode Enable.
Definition: IfxEvadc.h:859
IfxEvadc_Adc_FastCompareChannel::fastCompareChannelId
IfxEvadc_GroupId fastCompareChannelId
Following values can be taken for fastCompareChannelId:
Definition: IfxEvadc_Adc.h:430
IfxEvadc_Adc_ChannelConfig::resultServProvider
IfxSrc_Tos resultServProvider
Interrupt service provider for the result trigger interrupt.
Definition: IfxEvadc_Adc.h:350
IfxEvadc_getGlobalConversionMode
IFX_INLINE IfxEvadc_ChannelNoiseReduction IfxEvadc_getGlobalConversionMode(Ifx_EVADC *evadc, uint8 inputClassNum)
get the ADC Module noise reduction level
Definition: IfxEvadc.h:2511
IfxEvadc_Adc_Group::group
Ifx_EVADC_G * group
Pointer to the group registers.
Definition: IfxEvadc_Adc.h:314
IfxEvadc_EmuxSelectValue
IfxEvadc_EmuxSelectValue
specifies the External Channel Start select value defined in Ifx_EVADC.G[x].EMUXCTR.B.EMUXSET
Definition: IfxEvadc.h:228
IfxEvadc_Adc_FastCompareChannelConfig::serviceRequestGenerationEvent
IfxEvadc_FastCompareServiceRequestGeneration serviceRequestGenerationEvent
Criteria/mode settings for service request generation in FCM.B.SRG.
Definition: IfxEvadc_Adc.h:456
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:100
IfxEvadc_ChannelReference
IfxEvadc_ChannelReference
ADC channel reference defined in MODULE_EVADC.G[x].CHCTR[y].B.REFSEL(x=0,1,...,11;y=0,1....,16)
Definition: IfxEvadc.h:161
IfxEvadc_Adc_ChannelConfig::upperBoundary
IfxEvadc_BoundarySelection upperBoundary
Specifies upper boundary selection.
Definition: IfxEvadc_Adc.h:359
IfxEvadc_Adc_FastCompareChannelConfig::boundaryFlagActivation
IfxEvadc_BoundaryFlagActivationMode boundaryFlagActivation
Selects the behaviour of BoundaryFlag in FCBFL.B.BFA.
Definition: IfxEvadc_Adc.h:444
IfxEvadc_Adc_GroupConfig::doubleClockForMSBConversionSelection
boolean doubleClockForMSBConversionSelection
Definition: IfxEvadc_Adc.h:411
IfxEvadc_RequestSource
IfxEvadc_RequestSource
Request sources.
Definition: IfxEvadc.h:418
IfxEvadc_Adc_FastCompareChannelConfig::gateOperatingMode
IfxEvadc_GateOperatingMode gateOperatingMode
Gate Operating Mode to be filled in FCCTRL.B.GTMODE.
Definition: IfxEvadc_Adc.h:457
IfxEvadc_addToQueue
void IfxEvadc_addToQueue(Ifx_EVADC_G *group, IfxEvadc_ChannelId channel, IfxEvadc_RequestSource sourceType, uint32 options)
Add an entry to the queue of a group for the specified channel with the following options set: refill...
Definition: IfxEvadc.c:52
IfxEvadc_IdlePrecharge
IfxEvadc_IdlePrecharge
Contains options for Idle Precharge levels.
Definition: IfxEvadc.h:799
IfxEvadc_getResult
IFX_INLINE Ifx_EVADC_G_RES IfxEvadc_getResult(Ifx_EVADC_G *group, uint32 resultIdx)
Get conversion result (Function does not care about the alignment) value = raw * gain + offset...
Definition: IfxEvadc.h:2578
IfxEvadc_Adc_FastCompareChannelConfig::referenceInputPrechargeDuration
IfxEvadc_ReferencePrechargeControl referenceInputPrechargeDuration
Precharge duration for the reference input.
Definition: IfxEvadc_Adc.h:462
IfxEvadc_EmuxInterface
IfxEvadc_EmuxInterface
Specifies the Emux interface.
Definition: IfxEvadc.h:210
IfxEvadc_Adc_GroupConfig::calibrationSampleTimeControlMode
IfxEvadc_CalibrationSampleTimeControl calibrationSampleTimeControlMode
Definition: IfxEvadc_Adc.h:414
IfxEvadc_Adc_FastCompareChannelConfig
Configuring Fast Compare channel operations.
Definition: IfxEvadc_Adc.h:440
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:140
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxEvadc_Adc_Channel
Channel handle data structure.
Definition: IfxEvadc_Adc.h:334
IfxEvadc_BoundaryFlagNodePointer
IfxEvadc_BoundaryFlagNodePointer
Options for FCBFL.B.BFLNP to select Boundary Flag Node Pointer.
Definition: IfxEvadc.h:527
IfxEvadc_startQueue
IFX_INLINE void IfxEvadc_startQueue(Ifx_EVADC_G *group, IfxEvadc_RequestSource sourceType)
Starts a queue of a group by generating a trigger event through software.
Definition: IfxEvadc.h:3148
float32
float float32
Definition: Platform_Types.h:170
IfxEvadc_Adc_ArbiterConfig::requestSlotQueue1Enabled
boolean requestSlotQueue1Enabled
request queue1 if enabled.
Definition: IfxEvadc_Adc.h:284
IfxEvadc_Adc_ClassConfig::samplePointStandard
IfxEvadc_SpreadEarlySamplePointStandardConversionsMode samplePointStandard
Definition: IfxEvadc_Adc.h:294
IfxEvadc_SrcNr
IfxEvadc_SrcNr
Service Node defined in MODULE_EVADC.G[x].SRACT.U(x= 0,1,..,11)
Definition: IfxEvadc.h:436
IfxEvadc_Adc_getQueueStatus
IFX_INLINE IfxEvadc_Status IfxEvadc_Adc_getQueueStatus(IfxEvadc_Adc_Group *group, IfxEvadc_RequestSource sourceType)
Gives the status of the Queue of a group by returning non zero value if the Queue is full...
Definition: IfxEvadc_Adc.h:1063
Ifx_Assert.h
Assert functions.
IfxEvadc_ExternalMultiplexerMode
IfxEvadc_ExternalMultiplexerMode
Specifies External Multiplexer Mode define in Ifx_EVADC.G[x].EMUXCTR.B.EMUXMODE.
Definition: IfxEvadc.h:243
IfxEvadc_Adc_configureWaitForReadModeForGlobalResultRegister
IFX_INLINE void IfxEvadc_Adc_configureWaitForReadModeForGlobalResultRegister(IfxEvadc_Adc *evadc, boolean waitForReadMode)
access function to enable/disable wait for read mode for global result register
Definition: IfxEvadc_Adc.h:1016
IfxEvadc_Adc_FastCompareChannelConfig::clockDivider
IfxEvadc_ClockDividerFactor clockDivider
Defines the frequency of the analog converter clock f_ADCI (base clock for conversion steps)...
Definition: IfxEvadc_Adc.h:449
IfxEvadc_Adc_GatingTriggerConfig::triggerMode
IfxEvadc_TriggerMode triggerMode
Specifies trigger mode. Rising, falling any edge leads to an trigger event.
Definition: IfxEvadc_Adc.h:271
IfxEvadc_Adc_GroupConfig::inputBufferEnabled
boolean inputBufferEnabled
Definition: IfxEvadc_Adc.h:417
IfxEvadc_Adc_ChannelConfig::resultPriority
Ifx_Priority resultPriority
Interrupt priority of the result trigger interrupt, if 0 the interrupt is disable.
Definition: IfxEvadc_Adc.h:348
IfxEvadc_Adc_FastCompareChannelConfig::boundaryFlagNodePointer
IfxEvadc_BoundaryFlagNodePointer boundaryFlagNodePointer
Options for FCM.B.BFLNP to select Boundary Flag Node Pointer.
Definition: IfxEvadc_Adc.h:446
IfxEvadc_Adc_initFastCompareChannel
IFX_EXTERN void IfxEvadc_Adc_initFastCompareChannel(IfxEvadc_Adc_FastCompareChannel *fastCompareChannel, IfxEvadc_Adc_FastCompareChannelConfig *config)
Initializing the Fast Compare channel.
Definition: IfxEvadc_Adc.c:488
IfxEvadc_Adc_ChannelConfig::globalResultUsage
boolean globalResultUsage
Specifies storage in global result register.
Definition: IfxEvadc_Adc.h:345
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxEvadc_RampDirection
IfxEvadc_RampDirection
Ramp direction setting in FCM.B.FCRDIR.
Definition: IfxEvadc.h:666
IfxEvadc_Adc_getEvadcFromGroup
IFX_INLINE Ifx_EVADC * IfxEvadc_Adc_getEvadcFromGroup(const IfxEvadc_Adc_Group *group)
Gets the current group module register address.
Definition: IfxEvadc_Adc.h:1030
IfxEvadc_Adc_FastCompareChannelConfig::delay
IfxEvadc_FastCompareAnalogClockSynchronizationDelay delay
Defines the delay of the analog clock in clocks after the sync signal in FCM.B.ACSD.
Definition: IfxEvadc_Adc.h:451
IfxEvadc_Adc_Group::groupId
IfxEvadc_GroupId groupId
Specifies the group index.
Definition: IfxEvadc_Adc.h:315
IfxEvadc_ArbitrationRounds
IfxEvadc_ArbitrationRounds
Arbitration round length defined in MODULE_EVADC.G[x].ARBCFG.ARBRND(x=0,1,..,11)
Definition: IfxEvadc.h:96
IfxEvadc_BoundaryFlagActivationMode
IfxEvadc_BoundaryFlagActivationMode
Selects the behaviour of BoundaryFlag in FCBFL.B.BFA.
Definition: IfxEvadc.h:509
IfxEvadc_BoundaryExtension
IfxEvadc_BoundaryExtension
Boundary Extension defined in MODULE_EVADC.G[x].CHCTR[y].B.BNDSELX(x=0,1,...,11;y=0,1....,16)
Definition: IfxEvadc.h:106
IfxEvadc_Adc_GroupConfig::startupCalibration
boolean startupCalibration
Can be enabled to execute a startup calibration (disabled by default).
Definition: IfxEvadc_Adc.h:408
IfxEvadc_Adc_FastCompareChannelConfig::referenceValue
uint16 referenceValue
The input level is compared to this value. The resulting reference level is (V_AREF / 1024) * FCM...
Definition: IfxEvadc_Adc.h:465
IfxEvadc_Adc_startQueue
IFX_INLINE void IfxEvadc_Adc_startQueue(IfxEvadc_Adc_Group *group, IfxEvadc_RequestSource sourceType)
Starts a queue of a group by generating a trigger event through software.
Definition: IfxEvadc_Adc.h:1081
IfxEvadc_Adc_ChannelConfig::channelSrcNr
IfxEvadc_SrcNr channelSrcNr
Service node of the channel trigger.
Definition: IfxEvadc_Adc.h:353
IfxEvadc_Adc_ChannelConfig::inputClass
IfxEvadc_InputClasses inputClass
Specifies input class selection.
Definition: IfxEvadc_Adc.h:355
IfxEvadc_SpreadEarlySamplePointStandardConversionsMode
IfxEvadc_SpreadEarlySamplePointStandardConversionsMode
Spread Early Sample Point for Standard Conversions.
Definition: IfxEvadc.h:829
IfxEvadc_Adc_ClassConfig::sampleTimeEMUX
float32 sampleTimeEMUX
Definition: IfxEvadc_Adc.h:296
IfxEvadc_Adc_ChannelConfig::synchonize
boolean synchonize
Specifies synchronized conversion channel.
Definition: IfxEvadc_Adc.h:346
IfxEvadc_Adc_Group
Group handle data structure.
Definition: IfxEvadc_Adc.h:311
IfxEvadc_Adc_ChannelConfig::resultRegister
IfxEvadc_ChannelResult resultRegister
Specifies Result register selection.
Definition: IfxEvadc_Adc.h:357
IfxEvadc_StartupCalibration
IfxEvadc_StartupCalibration
The 0-1 transition of bit SUCAL initiates the start-up calibrationphase of all analog converters (exc...
Definition: IfxEvadc.h:840
IfxEvadc_Adc_ChannelConfig::reference
IfxEvadc_ChannelReference reference
Specifies Reference selection.
Definition: IfxEvadc_Adc.h:356
IfxEvadc_Adc_EmuxControl::channelSelectionStyle
IfxEvadc_ChannelSelectionStyle channelSelectionStyle
External Multiplexer Channel Selection Style.
Definition: IfxEvadc_Adc.h:394
IfxEvadc_Adc_ArbiterConfig::requestSlotQueue2Enabled
boolean requestSlotQueue2Enabled
request queue2 if enabled.
Definition: IfxEvadc_Adc.h:285
IfxEvadc_Adc_ArbiterConfig::requestSlotQueue0Enabled
boolean requestSlotQueue0Enabled
request queue0 if enabled.
Definition: IfxEvadc_Adc.h:283
IfxEvadc_Adc_Channel::group
IFX_CONST IfxEvadc_Adc_Group * group
Specifies the group of the channel.
Definition: IfxEvadc_Adc.h:338
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxEvadc_Adc_FastCompareChannelConfig::boundaryFlagInversion
IfxEvadc_BoundaryFlagInversionControl boundaryFlagInversion
Select whether to use Boundary Flag(FCM.B.BFL) directly or in a inverted format.
Definition: IfxEvadc_Adc.h:445
IfxEvadc_Adc_SYNCTR_STSEL
uint8 IfxEvadc_Adc_SYNCTR_STSEL
Definition: IfxEvadc_Adc.h:249
IfxEvadc_SampleSynchronization
IfxEvadc_SampleSynchronization
Sample timing sync settings for FCM.B.SSE.
Definition: IfxEvadc.h:685
IfxEvadc_Adc_deInitModule
IFX_INLINE void IfxEvadc_Adc_deInitModule(IfxEvadc_Adc *evadc)
Reset the EVADC module.
Definition: IfxEvadc_Adc.h:1022
IfxEvadc_Adc_getResultBasedOnRequestSource
IFX_INLINE Ifx_EVADC_G_RES IfxEvadc_Adc_getResultBasedOnRequestSource(IfxEvadc_Adc_Group *group, IfxEvadc_ChannelId channel, IfxEvadc_RequestSource sourceType)
Get conversion result based on the Request Source. (Function does not care about the alignment) value...
Definition: IfxEvadc_Adc.h:1075
IfxEvadc_Adc_Config::analogClockGenerationMode
IfxEvadc_AnalogClockGenerationMode analogClockGenerationMode
Definition: IfxEvadc_Adc.h:375
IfxEvadc_Adc_ChannelConfig::channelServProvider
IfxSrc_Tos channelServProvider
Interrupt service provider for the channel trigger interrupt.
Definition: IfxEvadc_Adc.h:351
IfxEvadc_Adc_GatingTriggerConfig::gatingMode
IfxEvadc_GatingMode gatingMode
Specifies gating mode. High level, Low Level or Gating disabled.
Definition: IfxEvadc_Adc.h:270
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IFXEVADC_NUM_INPUTCLASSES
#define IFXEVADC_NUM_INPUTCLASSES
Number of group specific Input Class.
Definition: IfxEvadc_cfg.h:88
IfxEvadc_ExternalTriggerPolarity
IfxEvadc_ExternalTriggerPolarity
External Trigger Polarity to be set in FCCTRL.B.XTPOL.
Definition: IfxEvadc.h:602
IfxEvadc_Adc_ClassConfig::analogInputPrechargeControlStandard
IfxEvadc_AnalogInputPrechargeControl analogInputPrechargeControlStandard
Definition: IfxEvadc_Adc.h:295
IfxEvadc_Adc_GroupConfig::analogConverterMode
IfxEvadc_AnalogConverterMode analogConverterMode
Definition: IfxEvadc_Adc.h:419
IfxEvadc_RequestSlotPriority
IfxEvadc_RequestSlotPriority
Arbitration priority, Group x,defined in MODULE_EVADC.G[x].ARBPR.PRIOy(x=0,1,...,11;y=0,1,2)
Definition: IfxEvadc.h:400
IfxEvadc_Adc_GroupConfig::disablePostCalibration
boolean disablePostCalibration
Specifies if calibration after conversion (post calibration) should be disabled.
Definition: IfxEvadc_Adc.h:409
IfxEvadc_LimitCheck
IfxEvadc_LimitCheck
ADC channel limit check defined in MODULE_EVADC.G[x].CHCTR[y].B.CHEVMODE(x=0,1,...,11;y=0,1....,16)
Definition: IfxEvadc.h:305
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxEvadc_GateOperatingMode
IfxEvadc_GateOperatingMode
Gate Operating Mode to be filled in FCCTRL.B.GTMODE.
Definition: IfxEvadc.h:657
IfxEvadc_Adc_initModule
IFX_EXTERN IfxEvadc_Status IfxEvadc_Adc_initModule(IfxEvadc_Adc *evadc, const IfxEvadc_Adc_Config *config)
Initialise the EVADC to run with the expected frequency and calibration.
Definition: IfxEvadc_Adc.c:940
IfxEvadc_resetModule
void IfxEvadc_resetModule(Ifx_EVADC *evadc)
Resets the kernel.
Definition: IfxEvadc.c:482
IfxEvadc_Adc::evadc
Ifx_EVADC * evadc
Specifies the pointer to the EVADC module registers.
Definition: IfxEvadc_Adc.h:261
IfxEvadc_Adc_FastCompareChannelConfig::analogInputPrechargeDuration
IfxEvadc_AnalogInputPrechargeControl analogInputPrechargeDuration
Precharge duration for the analog input.
Definition: IfxEvadc_Adc.h:463
IfxEvadc_BoundarySelection
IfxEvadc_BoundarySelection
BoundarySel defined in MODULE_EVADC.G[x].CHCTR[y].B.BNDSELL(x=0,1,...,11;y=0,1....,16)
Definition: IfxEvadc.h:128
IfxEvadc_getGlobalResult
IFX_INLINE Ifx_EVADC_GLOB_RES IfxEvadc_getGlobalResult(Ifx_EVADC *evadc)
return conversion result stored in the Global result Register
Definition: IfxEvadc.h:2517
IfxEvadc_Adc_initExternalMultiplexerMode
IFX_EXTERN void IfxEvadc_Adc_initExternalMultiplexerMode(Ifx_EVADC *evadc, const IfxEvadc_Adc_EmuxControl *emuxControl)
initalise external multiplexer.
Definition: IfxEvadc_Adc.c:449
IfxEvadc_Adc_initFastCompareChannelConfig
IFX_EXTERN void IfxEvadc_Adc_initFastCompareChannelConfig(IfxEvadc_Adc_FastCompareChannelConfig *config, IfxEvadc_Adc *evadc)
Initializing Fast Compare Channel config structure with default configurations.
Definition: IfxEvadc_Adc.c:548
IfxEvadc_Adc_QueueConfig::requestSlotPrio
IfxEvadc_RequestSlotPriority requestSlotPrio
priority of used queue request slot.
Definition: IfxEvadc_Adc.h:324
IfxEvadc_Adc_ArbiterConfig::arbiterRoundLength
IfxEvadc_ArbitrationRounds arbiterRoundLength
Specifies arbiter round length.
Definition: IfxEvadc_Adc.h:282
IfxEvadc_AnalogClockSynchronizationDelay
IfxEvadc_AnalogClockSynchronizationDelay
Definition: IfxEvadc.h:711
IfxEvadc_Adc_initChannelConfig
IFX_EXTERN void IfxEvadc_Adc_initChannelConfig(IfxEvadc_Adc_ChannelConfig *config, const IfxEvadc_Adc_Group *group)
Initialise buffer with default channel configuration.
Definition: IfxEvadc_Adc.c:418
IfxEvadc_SpreadEarlySamplePointEMUXConversionsMode
IfxEvadc_SpreadEarlySamplePointEMUXConversionsMode
Definition: IfxEvadc.h:821
IfxEvadc_Adc_Config::startupCalibrationControl
IfxEvadc_StartupCalibration startupCalibrationControl
Definition: IfxEvadc_Adc.h:377
IfxEvadc_Adc_FastCompareChannelConfig::additionalClockCycles
uint8 additionalClockCycles
Number of additional clock cycles to be added to the minimum sample phase of 2 analog clock cycles...
Definition: IfxEvadc_Adc.h:461
IfxEvadc_Adc_FastCompareChannel::fastCompareChannel
Ifx_EVADC_FC * fastCompareChannel
Definition: IfxEvadc_Adc.h:429
IfxEvadc_Adc_getGroupConfig
IFX_EXTERN void IfxEvadc_Adc_getGroupConfig(IfxEvadc_Adc_Group *group, IfxEvadc_Adc_GroupConfig *config)
Get the current group configuration (e.g. evadc frequency)
Definition: IfxEvadc_Adc.c:228
IfxEvadc_Adc_GroupConfig::analogClockSynchronizationDelay
IfxEvadc_AnalogClockSynchronizationDelay analogClockSynchronizationDelay
Definition: IfxEvadc_Adc.h:413
IfxEvadc_Adc_EmuxControl::channels
uint8 channels
specifies channel number
Definition: IfxEvadc_Adc.h:391
IfxEvadc_FastCompareRunControl
IfxEvadc_FastCompareRunControl
Defines the basic run conditions of the fast compare channel in FCM.B.RUNCOMP.
Definition: IfxEvadc.h:639
IfxEvadc_Adc_initChannel
IFX_EXTERN IfxEvadc_Status IfxEvadc_Adc_initChannel(IfxEvadc_Adc_Channel *channel, const IfxEvadc_Adc_ChannelConfig *config)
Initialise one channel with given configuration.
Definition: IfxEvadc_Adc.c:338
IfxEvadc_Adc_initGroup
IFX_EXTERN IfxEvadc_Status IfxEvadc_Adc_initGroup(IfxEvadc_Adc_Group *group, const IfxEvadc_Adc_GroupConfig *config)
Initialise the EVADC group (also queue modes) Slave Groups must initialize first. ...
Definition: IfxEvadc_Adc.c:578
IfxEvadc_Adc_FastCompareChannelConfig::triggerInterval
uint8 triggerInterval
Defines the interval at which fast compare operations are triggered in steps of 16 * 1/f_ADC...
Definition: IfxEvadc_Adc.h:464
IfxEvadc_Emux_Out
EVADC External Mux pin mapping structure.
Definition: IfxEvadc_PinMap.h:65
IfxEvadc_Adc_GroupConfig::sampleSynchronizationEnabled
IfxEvadc_SampleSynchronization sampleSynchronizationEnabled
Definition: IfxEvadc_Adc.h:412
IfxEvadc_Adc_FastCompareChannelConfig::boundaryFlagValue
boolean boundaryFlagValue
Defines the logic value that replaces the compare result while the gate input is inactive (low) in lo...
Definition: IfxEvadc_Adc.h:467
IfxEvadc_InputClasses
IfxEvadc_InputClasses
inputClass defined in MODULE_EVADC.G[x].CHCTR[y].B.ICLSEL(x=0,1,...,11;y=0,1....,16) ...
Definition: IfxEvadc.h:295
IfxEvadc_Adc_EmuxControl::startChannel
IfxEvadc_EmuxSelectValue startChannel
specifies the external channel start value(EMUX[x:0]) x- specifies external channel number ...
Definition: IfxEvadc_Adc.h:386
IfxEvadc_DataModificationMode
IfxEvadc_DataModificationMode
Data Modification Mode.
Definition: IfxEvadc.h:770
IfxEvadc_ReferencePrechargeControl
IfxEvadc_ReferencePrechargeControl
Reference Precharge Control.
Definition: IfxEvadc.h:815
IfxEvadc_TriggerSource
IfxEvadc_TriggerSource
Trigger request source defined in MODULE_EVADC.G[x].QCTRLy.XTSEL(x=0,1,..,11;y=0,1,..,7)
Definition: IfxEvadc.h:483
IfxEvadc_Adc_GroupConfig::referencePrechargeControlMode
IfxEvadc_ReferencePrechargeControl referencePrechargeControlMode
Definition: IfxEvadc_Adc.h:415
IfxEvadc_Adc_ClassConfig
Input class configuration structure.
Definition: IfxEvadc_Adc.h:290
IfxEvadc_Adc_EmuxControl::sampleTimeControl
IfxEvadc_EmuxSampleTimeControl sampleTimeControl
specifies when to use sample time control
Definition: IfxEvadc_Adc.h:389
IfxEvadc_Adc_addToQueue
IFX_INLINE void IfxEvadc_Adc_addToQueue(IfxEvadc_Adc_Channel *channel, IfxEvadc_RequestSource sourceType, uint32 options)
Add an entry to the queue of a group for the specified channel with the following options set: refill...
Definition: IfxEvadc_Adc.h:998
IfxEvadc_Adc_EmuxControl::code
IfxEvadc_EmuxCodingScheme code
specifes binary/gray code
Definition: IfxEvadc_Adc.h:388
IfxEvadc_SupplyVoltageLevelControl
IfxEvadc_SupplyVoltageLevelControl
Adjusts the analog circuitry to the supply voltage used in the application system. Make sure to keep SUPLEV = 0b00 or 0b01 in the case of a 5 V supply.
Definition: IfxEvadc.h:850
IfxEvadc_Adc_FastCompareChannelConfig::analogConverterControllerMode
IfxEvadc_FastCompareAnalogConverterControl analogConverterControllerMode
Settings for Analog Coverter Controller to be done in FCM.B.ANON.
Definition: IfxEvadc_Adc.h:452
IfxEvadc_Adc_EmuxControl::emuxInterface
IfxEvadc_EmuxInterface emuxInterface
specifies the Emux interface
Definition: IfxEvadc_Adc.h:392
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:151
IfxEvadc_Adc_getResult
IFX_INLINE Ifx_EVADC_G_RES IfxEvadc_Adc_getResult(IfxEvadc_Adc_Channel *channel)
Get conversion result (Function does not care about the alignment)
Definition: IfxEvadc_Adc.h:1069
IfxEvadc_BoundaryFlagInversionControl
IfxEvadc_BoundaryFlagInversionControl
Controls in in FCBFL.B.BFI options for whether to use Boundary Flag(FCM.B.BFL) directly or in a inver...
Definition: IfxEvadc.h:519
IfxEvadc_getGroupResult
IFX_INLINE void IfxEvadc_getGroupResult(Ifx_EVADC_G *group, Ifx_EVADC_G_RES *results, uint32 resultOffset, uint32 numResults)
Get conversion result for the group.
Definition: IfxEvadc.h:2546
IfxEvadc_Adc_initGroupConfig
IFX_EXTERN void IfxEvadc_Adc_initGroupConfig(IfxEvadc_Adc_GroupConfig *config, IfxEvadc_Adc *evadc)
Initialise buffer with default EVADC configuration.
Definition: IfxEvadc_Adc.c:847
IfxEvadc_Adc_ChannelConfig::lowerBoundary
IfxEvadc_BoundarySelection lowerBoundary
Specifies lower boundary selection.
Definition: IfxEvadc_Adc.h:358
IfxEvadc_FastCompareServiceRequestGeneration
IfxEvadc_FastCompareServiceRequestGeneration
Criteria/mode settings for service request generation in FCM.B.SRG.
Definition: IfxEvadc.h:647
IfxEvadc_Adc_ChannelConfig
Channel configuration structure.
Definition: IfxEvadc_Adc.h:343
IfxEvadc_AnalogInputPrechargeControl
IfxEvadc_AnalogInputPrechargeControl
Analog Input Precharge Control for Standard Conversions.
Definition: IfxEvadc.h:725
IfxEvadc_Adc_ClassConfig::conversionModeEMUX
IfxEvadc_ChannelNoiseReductionEMUX conversionModeEMUX
Definition: IfxEvadc_Adc.h:297
IfxEvadc_Adc_ChannelConfig::channelPriority
Ifx_Priority channelPriority
Interrupt priority of the channel trigger interrupt, if 0 the interrupt is disable.
Definition: IfxEvadc_Adc.h:349
IfxEvadc_GatingSource
IfxEvadc_GatingSource
External trigger gating defined in MODULE_EVADC.G[x].QCTRLy.GTSEL(x=0,1,..,11;y=0,1,..,7)
Definition: IfxEvadc.h:273
IfxEvadc_GroupId
IfxEvadc_GroupId
VADC Groups.
Definition: IfxEvadc_cfg.h:134
IfxEvadc_Adc_initExternalMultiplexerModeConfig
IFX_EXTERN void IfxEvadc_Adc_initExternalMultiplexerModeConfig(IfxEvadc_Adc_EmuxControl *emuxConfig, Ifx_EVADC *evadc)
initialise default configuration for external multiplexer
Definition: IfxEvadc_Adc.c:467
IfxEvadc_Adc_ChannelConfig::boundaryMode
IfxEvadc_BoundaryExtension boundaryMode
Specifies Standard mode of fast compare mode.
Definition: IfxEvadc_Adc.h:360
IfxEvadc_RequestSlotStartMode
IfxEvadc_RequestSlotStartMode
Request source start mode defined in MODULE_EVADC.G[x].ARBPR.CSMy(x=0,1,...,11;y=0,1,2)
Definition: IfxEvadc.h:410
IfxEvadc_Adc_ChannelConfig::limitCheck
IfxEvadc_LimitCheck limitCheck
Specifies boundary band selection upper/lower.
Definition: IfxEvadc_Adc.h:361
IfxEvadc_Adc_Config
EVADC module configuration structure.
Definition: IfxEvadc_Adc.h:371
IfxEvadc_Adc_EmuxControl
Emux Control Structure.
Definition: IfxEvadc_Adc.h:382
IfxEvadc_FastCompareAutomaticUpdate
IfxEvadc_FastCompareAutomaticUpdate
Defines the source of the value(s) in bitfield FCM.B.FCREF.
Definition: IfxEvadc.h:628
IfxEvadc_Adc_ClassConfig::conversionMode
IfxEvadc_ChannelNoiseReduction conversionMode
Specifies the conversion Mode, noise reduction levels.
Definition: IfxEvadc_Adc.h:293
IfxEvadc_ChannelNoiseReduction
IfxEvadc_ChannelNoiseReduction
Conversion Mode for standard Conversion channel precision defined in MODULE_EVADC.G[x].CHCTR[y].B.ICLASS[y].B.CMS(x=0,1,...,11;y=0,1)
Definition: IfxEvadc.h:750
IfxEvadc_RampRunControl
IfxEvadc_RampRunControl
Defines the run conditions for the ramp generation in FCM.B.RUNRAMP.
Definition: IfxEvadc.h:674
IfxEvadc_AnalogConverterMode
IfxEvadc_AnalogConverterMode
Defined in MODULE_EVADC.G[x].ARBCFG.B.ANONS and ANONC.
Definition: IfxEvadc.h:86
IfxEvadc_clearQueue
IFX_INLINE void IfxEvadc_clearQueue(Ifx_EVADC_G *evadcG, boolean flushQueue, IfxEvadc_RequestSource sourceType)
Clears all the queue entries including backup stage.
Definition: IfxEvadc.h:2238
IfxEvadc_Status
IfxEvadc_Status
API return values defined in MODULE_EVADC.G[x].QSR0.U,MODULE_EVADC.G[x].QSR1.U,MODULE_EVADC.G[x].QSR2.U(x=0,1,...,11)
Definition: IfxEvadc.h:451
IfxEvadc_Adc_setGlobalConfigurations
IFX_EXTERN void IfxEvadc_Adc_setGlobalConfigurations(Ifx_EVADC *evadc, const IfxEvadc_Adc_Config *config)
Configure global settings in the GLOBCFG register.
Definition: IfxEvadc_Adc.c:983
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxEvadc_CalibrationSampleTimeControl
IfxEvadc_CalibrationSampleTimeControl
Definition: IfxEvadc.h:739
IfxEvadc_ChannelEventMode
IfxEvadc_ChannelEventMode
Channel Event Mode for configuring generation of events for Fast Compare channels in FCCTRL...
Definition: IfxEvadc.h:552
IfxEvadc_DataReductionControlMode
IfxEvadc_DataReductionControlMode
Definition: IfxEvadc.h:777
IfxEvadc_Adc_GroupConfig
Group configuration structure.
Definition: IfxEvadc_Adc.h:399
IfxEvadc_Adc_FastCompareChannelConfig::rampGenerationMode
IfxEvadc_RampRunControl rampGenerationMode
Defines the run conditions for the ramp generation in FCM.B.RUNRAMP.
Definition: IfxEvadc_Adc.h:455
IfxEvadc_EmuxCodingScheme
IfxEvadc_EmuxCodingScheme
Specifies the External Coding scheme(binary/gray) defined in Ifx_EVADC.G[x].EMUXCTR.B.EMXCOD.
Definition: IfxEvadc.h:202
IfxEvadc_Adc
EVADC handle data structure.
Definition: IfxEvadc_Adc.h:259
IfxEvadc_Adc_FastCompareChannelConfig::channelEventMode
IfxEvadc_ChannelEventMode channelEventMode
Channel Event Mode for configuring generation of events for Fast Compare channels in FCCTRL...
Definition: IfxEvadc_Adc.h:448
IfxEvadc_EmuxSampleTimeControl
IfxEvadc_EmuxSampleTimeControl
External Multiplexer sample time control defined in Ifx_EVADC.G[x].EMUXCTR.B.EMXST.
Definition: IfxEvadc.h:219
IfxEvadc_Adc_QueueConfig::requestSlotStartMode
IfxEvadc_RequestSlotStartMode requestSlotStartMode
start mode for request queue source.
Definition: IfxEvadc_Adc.h:325
IfxEvadc_configureWaitForReadModeForGlobalResultRegister
IFX_INLINE void IfxEvadc_configureWaitForReadModeForGlobalResultRegister(Ifx_EVADC *evadc, boolean enabled)
access function to enable/disable wait for read mode for global result register
Definition: IfxEvadc.h:2261
IfxEvadc_GatingMode
IfxEvadc_GatingMode
gating mode defined in MODULE_EVADC.QMR0.ENGT
Definition: IfxEvadc.h:263
IfxEvadc_Adc_ArbiterConfig
Arbiter configuration structure.
Definition: IfxEvadc_Adc.h:280
IfxEvadc_Adc_FastCompareChannelConfig::rampDirection
IfxEvadc_RampDirection rampDirection
Ramp direction setting in FCM.B.FCRDIR.
Definition: IfxEvadc_Adc.h:458
IfxEvadc_Adc_FastCompareChannel::module
IfxEvadc_Adc module
The EVADC handle structure.
Definition: IfxEvadc_Adc.h:428
IfxEvadc_Adc_Channel::resultreg
IfxEvadc_ChannelResult resultreg
Specifies allocated result register.
Definition: IfxEvadc_Adc.h:337
IfxEvadc_Adc_FastCompareChannelConfig::boundaryFlagAction
IfxEvadc_BoundaryFlagSwControl boundaryFlagAction
Action to be performed on the boundary flag(BFL)
Definition: IfxEvadc_Adc.h:447
IfxEvadc_Adc_FastCompareChannelConfig::module
IfxEvadc_Adc * module
Pointer to EVADC module handle.
Definition: IfxEvadc_Adc.h:442
IfxEvadc_Adc_GroupConfig::module
IFX_CONST IfxEvadc_Adc * module
Specifies pointer to the IfxEvadc_Adc module handle.
Definition: IfxEvadc_Adc.h:401
IfxEvadc_Adc_Config::supplyVoltage
IfxEvadc_SupplyVoltageLevelControl supplyVoltage
Definition: IfxEvadc_Adc.h:376
IfxEvadc_Adc_deInitGroup
IFX_EXTERN void IfxEvadc_Adc_deInitGroup(IfxEvadc_Adc_Group *group)
Reset the EVADC group.
Definition: IfxEvadc_Adc.c:135
IfxEvadc_Adc_GatingTriggerConfig::triggerSource
IfxEvadc_TriggerSource triggerSource
Specifies used Trigger input for group.
Definition: IfxEvadc_Adc.h:269
IFXEVADC_NUM_GLOBAL_INPUTCLASSES
#define IFXEVADC_NUM_GLOBAL_INPUTCLASSES
Number of ADC group input classes.
Definition: IfxEvadc_cfg.h:98
IfxEvadc_TriggerOperatingMode
IfxEvadc_TriggerOperatingMode
Trigger operating mode in Fast Compare channels, to be entered in FCCTRL.B.XTMODE.
Definition: IfxEvadc.h:693
IfxEvadc_Adc_Config::globalInputClass
IfxEvadc_Adc_ClassConfig globalInputClass[IFXEVADC_NUM_GLOBAL_INPUTCLASSES]
Specifies the global conversion settings one and two.
Definition: IfxEvadc_Adc.h:374
IfxEvadc_AnalogClockGenerationMode
IfxEvadc_AnalogClockGenerationMode
Defines the way the analog clock is generated.
Definition: IfxEvadc.h:705
IfxEvadc_Adc_getModuleConfig
IFX_INLINE void IfxEvadc_Adc_getModuleConfig(IfxEvadc_Adc *evadc, IfxEvadc_Adc_Config *config, Ifx_EVADC_G *evadcG)
Get the current EVADC configuration (e.g. EVADC frequency)
Definition: IfxEvadc_Adc.h:1054
IfxEvadc_ChannelNoiseReductionEMUX
IfxEvadc_ChannelNoiseReductionEMUX
Conversion Mode for EMUX Conversions.
Definition: IfxEvadc.h:760
IfxEvadc_Adc_ClassConfig::samplePointEMUX
IfxEvadc_SpreadEarlySamplePointEMUXConversionsMode samplePointEMUX
Definition: IfxEvadc_Adc.h:298
IfxEvadc_Adc_FastCompareChannelConfig::externalTriggerOperatingMode
IfxEvadc_TriggerOperatingMode externalTriggerOperatingMode
Trigger operating mode in Fast Compare channels, to be entered in FCCTRL.B.XTMODE.
Definition: IfxEvadc_Adc.h:460
IfxEvadc_Adc_EmuxPinConfig::outputMode
IfxPort_OutputMode outputMode
the pin output mode which should be configured
Definition: IfxEvadc_Adc.h:305
IfxEvadc_Adc_QueueConfig
Queue configuration structure.
Definition: IfxEvadc_Adc.h:320
IfxEvadc_ChannelId
IfxEvadc_ChannelId
EVADC Channels.
Definition: IfxEvadc.h:138
IfxEvadc_Adc_QueueConfig::flushQueueAfterInit
boolean flushQueueAfterInit
Specifies if the queue is flushed after configuration.
Definition: IfxEvadc_Adc.h:322
IfxEvadc.h
EVADC basic functionality.
IfxEvadc_Adc_Channel::channel
IfxEvadc_ChannelId channel
Specifies the channel index.
Definition: IfxEvadc_Adc.h:336
IfxEvadc_Adc_getGlobalResult
IFX_INLINE Ifx_EVADC_GLOB_RES IfxEvadc_Adc_getGlobalResult(IfxEvadc_Adc *evadc)
returns result stored in global result register
Definition: IfxEvadc_Adc.h:1036
IfxEvadc_Adc_FastCompareChannel
Definition: IfxEvadc_Adc.h:426
IfxEvadc_Adc_FastCompareChannelConfig::runMode
IfxEvadc_FastCompareRunControl runMode
Definition: IfxEvadc_Adc.h:454
IfxEvadc_ChannelResult
IfxEvadc_ChannelResult
Channel Result defined in MODULE_EVADC.G[x].CHCTR[y].B.RESREG(x=0,1,...,11;y=0,1....,16)
Definition: IfxEvadc.h:169
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxEvadc_Adc_FastCompareChannelConfig::sampleTimingSynchronization
IfxEvadc_SampleSynchronization sampleTimingSynchronization
Sample timing sync settings for FCM.B.SSE.
Definition: IfxEvadc_Adc.h:459
IfxEvadc_Adc_getChannelConfig
IFX_EXTERN void IfxEvadc_Adc_getChannelConfig(IfxEvadc_Adc_Channel *channel, IfxEvadc_Adc_ChannelConfig *config)
Get the current channel configuration (e.g. sample settings)
Definition: IfxEvadc_Adc.c:149
IfxEvadc_Adc_ChannelConfig::rightAlignedStorage
boolean rightAlignedStorage
Specifies result is right aligned.
Definition: IfxEvadc_Adc.h:347
IfxEvadc_FastCompareAnalogClockSynchronizationDelay
IfxEvadc_FastCompareAnalogClockSynchronizationDelay
Definition: IfxEvadc.h:608
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
IfxEvadc_Adc_ChannelConfig::dataModificationMode
IfxEvadc_DataModificationMode dataModificationMode
Specifies the Data Modification Mode.According to the value entered here, the meanings of values ente...
Definition: IfxEvadc_Adc.h:363
IfxEvadc_Adc_EmuxPinConfig
Definition: IfxEvadc_Adc.h:302
IfxEvadc_Adc_GatingTriggerConfig::gatingSource
IfxEvadc_GatingSource gatingSource
Specifies used gate input for group.
Definition: IfxEvadc_Adc.h:268
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxEvadc_Adc_getGroupResult
IFX_INLINE void IfxEvadc_Adc_getGroupResult(IfxEvadc_Adc_Group *group, Ifx_EVADC_G_RES *results, uint32 resultOffset, uint32 numResults)
Get conversion result for the group.
Definition: IfxEvadc_Adc.h:1048
IfxEvadc_Adc_ClassConfig::sampleTime
float32 sampleTime
Specifies the requested sample time for input class.
Definition: IfxEvadc_Adc.h:292
IfxEvadc_FifoMode
IfxEvadc_FifoMode
FIFO mode enable.
Definition: IfxEvadc.h:253
IfxEvadc_Adc_EmuxControl::mode
IfxEvadc_ExternalMultiplexerMode mode
Specifies the External Multiplexer mode.
Definition: IfxEvadc_Adc.h:385
IfxEvadc_FastCompareAnalogConverterControl
IfxEvadc_FastCompareAnalogConverterControl
Settings for Analog Coverter Controller to be done in FCM.B.ANON.
Definition: IfxEvadc.h:618
IfxEvadc_Adc_GatingTriggerConfig
Gating/Trigger configuration structure.
Definition: IfxEvadc_Adc.h:266
IfxEvadc_getResultBasedOnRequestSource
Ifx_EVADC_G_RES IfxEvadc_getResultBasedOnRequestSource(Ifx_EVADC *evadc, Ifx_EVADC_G *group, IfxEvadc_ChannelId channel, IfxEvadc_RequestSource sourceType)
Get conversion result (Function does not care about the alignment) value = raw * gain + offset...
Definition: IfxEvadc.c:372
IfxEvadc_getQueueStatus
IfxEvadc_Status IfxEvadc_getQueueStatus(Ifx_EVADC_G *group, IfxEvadc_RequestSource sourceType)
Gives the status of the Queue of a group by returning non zero value if the Queue is full...
Definition: IfxEvadc.c:321
IfxEvadc_Adc_EmuxControl::emuxOutPinConfig
IfxEvadc_Adc_EmuxPinConfig emuxOutPinConfig
configure the emux output pin
Definition: IfxEvadc_Adc.h:393
IfxEvadc_TriggerMode
IfxEvadc_TriggerMode
trigger definition defined in MODULE_EVADC.G[x].QCTRL0.XTMODE(x=0,1,..,11)
Definition: IfxEvadc.h:473
IfxEvadc_Adc_initModuleConfig
IFX_EXTERN void IfxEvadc_Adc_initModuleConfig(IfxEvadc_Adc_Config *config, Ifx_EVADC *evadc)
Initialise buffer with default EVADC configuration.
Definition: IfxEvadc_Adc.c:963
IfxEvadc_Adc_FastCompareChannelConfig::externalTriggerPolarity
IfxEvadc_ExternalTriggerPolarity externalTriggerPolarity
External Trigger Polarity to be set in FCCTRL.B.XTPOL.
Definition: IfxEvadc_Adc.h:450
IfxEvadc_Adc_setAnalogConvertControl
IFX_EXTERN void IfxEvadc_Adc_setAnalogConvertControl(Ifx_EVADC *evadc, IfxEvadc_Adc_Group *group, IfxEvadc_AnalogConverterMode analogConverterMode)
set analog converter mode
Definition: IfxEvadc_Adc.c:974
IfxEvadc_Adc_configureWaitForReadMode
IFX_INLINE void IfxEvadc_Adc_configureWaitForReadMode(IfxEvadc_Adc_Channel *channel, boolean waitForReadMode)
pointer to the EVADC channel
Definition: IfxEvadc_Adc.h:1010
IfxEvadc_Adc_ChannelConfig::fifoMode
IfxEvadc_FifoMode fifoMode
Definition: IfxEvadc_Adc.h:366
IfxEvadc_Adc_GroupConfig::master
IfxEvadc_GroupId master
Specifies the master group. If master is different from groupId, then the group is configured as slav...
Definition: IfxEvadc_Adc.h:403
IfxEvadc_Adc_ChannelConfig::dataReductionControlMode
IfxEvadc_DataReductionControlMode dataReductionControlMode
Depending on the valued of dataModificationMode, the meanings of values in this will differ...
Definition: IfxEvadc_Adc.h:364


iLLD_TC38A: IfxEvadc_PinMap.c Source File

  • _PinMap
IfxEvadc_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxEvadc_PinMap.c
3 * \brief EVADC I/O map
4 * \ingroup IfxLld_Evadc
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "IfxEvadc_PinMap.h"
44
45 IfxEvadc_Emux_Out IfxEvadc_EMUX00_P02_6_OUT = {&MODULE_EVADC, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt5};
46 IfxEvadc_Emux_Out IfxEvadc_EMUX00_P33_3_OUT = {&MODULE_EVADC, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt5};
47 IfxEvadc_Emux_Out IfxEvadc_EMUX01_P02_7_OUT = {&MODULE_EVADC, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt5};
48 IfxEvadc_Emux_Out IfxEvadc_EMUX01_P33_2_OUT = {&MODULE_EVADC, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt5};
49 IfxEvadc_Emux_Out IfxEvadc_EMUX02_P02_8_OUT = {&MODULE_EVADC, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt5};
50 IfxEvadc_Emux_Out IfxEvadc_EMUX02_P33_1_OUT = {&MODULE_EVADC, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt5};
51 IfxEvadc_Emux_Out IfxEvadc_EMUX10_P00_6_OUT = {&MODULE_EVADC, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt5};
52 IfxEvadc_Emux_Out IfxEvadc_EMUX10_P33_6_OUT = {&MODULE_EVADC, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt5};
53 IfxEvadc_Emux_Out IfxEvadc_EMUX11_P00_7_OUT = {&MODULE_EVADC, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt5};
54 IfxEvadc_Emux_Out IfxEvadc_EMUX11_P33_5_OUT = {&MODULE_EVADC, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt5};
55 IfxEvadc_Emux_Out IfxEvadc_EMUX12_P00_8_OUT = {&MODULE_EVADC, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt5};
56 IfxEvadc_Emux_Out IfxEvadc_EMUX12_P33_4_OUT = {&MODULE_EVADC, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt5};
57 IfxEvadc_GxBfl_Out IfxEvadc_FC0BFLOUT_P00_5_OUT = {&MODULE_EVADC, IfxEvadc_GroupId_12, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt5};
58 IfxEvadc_GxBfl_Out IfxEvadc_FC0BFLOUT_P33_4_OUT = {&MODULE_EVADC, IfxEvadc_GroupId_12, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt6};
59 IfxEvadc_GxBfl_Out IfxEvadc_FC1BFLOUT_P10_1_OUT = {&MODULE_EVADC, IfxEvadc_GroupId_13, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt5};
60 IfxEvadc_GxBfl_Out IfxEvadc_FC1BFLOUT_P33_6_OUT = {&MODULE_EVADC, IfxEvadc_GroupId_13, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt6};
61 IfxEvadc_GxBfl_Out IfxEvadc_FC2BFLOUT_P00_7_OUT = {&MODULE_EVADC, IfxEvadc_GroupId_14, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt3};
62 IfxEvadc_GxBfl_Out IfxEvadc_FC2BFLOUT_P33_0_OUT = {&MODULE_EVADC, IfxEvadc_GroupId_14, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt6};
63 IfxEvadc_GxBfl_Out IfxEvadc_FC2BFLOUT_P33_5_OUT = {&MODULE_EVADC, IfxEvadc_GroupId_14, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt6};
64 IfxEvadc_GxBfl_Out IfxEvadc_FC3BFLOUT_P10_2_OUT = {&MODULE_EVADC, IfxEvadc_GroupId_15, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt5};
65 IfxEvadc_GxBfl_Out IfxEvadc_FC3BFLOUT_P33_2_OUT = {&MODULE_EVADC, IfxEvadc_GroupId_15, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt6};
66 IfxEvadc_GxBfl_Out IfxEvadc_FC3BFLOUT_P33_7_OUT = {&MODULE_EVADC, IfxEvadc_GroupId_15, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt6};
67 IfxEvadc_Vadcg_In IfxEvadc_FC0CH0_AN16_IN = {&MODULE_EVADC, IfxEvadc_GroupId_12, {NULL_PTR,16}, 0};
68 IfxEvadc_Vadcg_In IfxEvadc_FC1CH0_P40_10_IN = {&MODULE_EVADC, IfxEvadc_GroupId_13, {&MODULE_P40,10}, 0};
69 IfxEvadc_Vadcg_In IfxEvadc_FC2CH0_P00_12_IN = {&MODULE_EVADC, IfxEvadc_GroupId_14, {&MODULE_P00,12}, 0};
70 IfxEvadc_Vadcg_In IfxEvadc_FC3CH0_P00_11_IN = {&MODULE_EVADC, IfxEvadc_GroupId_15, {&MODULE_P00,11}, 0};
71 IfxEvadc_Vadcg_In IfxEvadc_G0CH0_AN0_IN = {&MODULE_EVADC, IfxEvadc_GroupId_0, {NULL_PTR, 0}, 0};
72 IfxEvadc_Vadcg_In IfxEvadc_G0CH1_AN1_IN = {&MODULE_EVADC, IfxEvadc_GroupId_0, {NULL_PTR, 1}, 1};
73 IfxEvadc_Vadcg_In IfxEvadc_G0CH2_AN2_IN = {&MODULE_EVADC, IfxEvadc_GroupId_0, {NULL_PTR, 2}, 2};
74 IfxEvadc_Vadcg_In IfxEvadc_G0CH3_AN3_IN = {&MODULE_EVADC, IfxEvadc_GroupId_0, {NULL_PTR, 3}, 3};
75 IfxEvadc_Vadcg_In IfxEvadc_G0CH4_AN4_IN = {&MODULE_EVADC, IfxEvadc_GroupId_0, {NULL_PTR, 4}, 4};
76 IfxEvadc_Vadcg_In IfxEvadc_G0CH5_AN5_IN = {&MODULE_EVADC, IfxEvadc_GroupId_0, {NULL_PTR, 5}, 5};
77 IfxEvadc_Vadcg_In IfxEvadc_G0CH6_AN6_IN = {&MODULE_EVADC, IfxEvadc_GroupId_0, {NULL_PTR, 6}, 6};
78 IfxEvadc_Vadcg_In IfxEvadc_G0CH7_AN7_IN = {&MODULE_EVADC, IfxEvadc_GroupId_0, {NULL_PTR, 7}, 7};
79 IfxEvadc_Vadcg_In IfxEvadc_G10CH0_P33_7_IN = {&MODULE_EVADC, IfxEvadc_GroupId_10, {&MODULE_P33, 7}, 0};
80 IfxEvadc_Vadcg_In IfxEvadc_G10CH10_P34_2_IN = {&MODULE_EVADC, IfxEvadc_GroupId_10, {&MODULE_P34, 2}, 10};
81 IfxEvadc_Vadcg_In IfxEvadc_G10CH11_P34_1_IN = {&MODULE_EVADC, IfxEvadc_GroupId_10, {&MODULE_P34, 1}, 11};
82 IfxEvadc_Vadcg_In IfxEvadc_G10CH1_P33_6_IN = {&MODULE_EVADC, IfxEvadc_GroupId_10, {&MODULE_P33, 6}, 1};
83 IfxEvadc_Vadcg_In IfxEvadc_G10CH2_P33_5_IN = {&MODULE_EVADC, IfxEvadc_GroupId_10, {&MODULE_P33, 5}, 2};
84 IfxEvadc_Vadcg_In IfxEvadc_G10CH3_P33_4_IN = {&MODULE_EVADC, IfxEvadc_GroupId_10, {&MODULE_P33, 4}, 3};
85 IfxEvadc_Vadcg_In IfxEvadc_G10CH4_P33_3_IN = {&MODULE_EVADC, IfxEvadc_GroupId_10, {&MODULE_P33, 3}, 4};
86 IfxEvadc_Vadcg_In IfxEvadc_G10CH5_P33_2_IN = {&MODULE_EVADC, IfxEvadc_GroupId_10, {&MODULE_P33, 2}, 5};
87 IfxEvadc_Vadcg_In IfxEvadc_G10CH6_P33_1_IN = {&MODULE_EVADC, IfxEvadc_GroupId_10, {&MODULE_P33, 1}, 6};
88 IfxEvadc_Vadcg_In IfxEvadc_G10CH7_P33_0_IN = {&MODULE_EVADC, IfxEvadc_GroupId_10, {&MODULE_P33, 0}, 7};
89 IfxEvadc_Vadcg_In IfxEvadc_G10CH8_P34_4_IN = {&MODULE_EVADC, IfxEvadc_GroupId_10, {&MODULE_P34, 4}, 8};
90 IfxEvadc_Vadcg_In IfxEvadc_G10CH9_P34_3_IN = {&MODULE_EVADC, IfxEvadc_GroupId_10, {&MODULE_P34, 3}, 9};
91 IfxEvadc_Vadcg_In IfxEvadc_G11CH0_AN4_IN = {&MODULE_EVADC, IfxEvadc_GroupId_11, {NULL_PTR, 4}, 0};
92 IfxEvadc_Vadcg_In IfxEvadc_G11CH10_P40_2_IN = {&MODULE_EVADC, IfxEvadc_GroupId_11, {&MODULE_P40, 2}, 10};
93 IfxEvadc_Vadcg_In IfxEvadc_G11CH11_P40_3_IN = {&MODULE_EVADC, IfxEvadc_GroupId_11, {&MODULE_P40, 3}, 11};
94 IfxEvadc_Vadcg_In IfxEvadc_G11CH12_P40_4_IN = {&MODULE_EVADC, IfxEvadc_GroupId_11, {&MODULE_P40, 4}, 12};
95 IfxEvadc_Vadcg_In IfxEvadc_G11CH13_P40_5_IN = {&MODULE_EVADC, IfxEvadc_GroupId_11, {&MODULE_P40, 5}, 13};
96 IfxEvadc_Vadcg_In IfxEvadc_G11CH14_AN34_IN = {&MODULE_EVADC, IfxEvadc_GroupId_11, {NULL_PTR,34}, 14};
97 IfxEvadc_Vadcg_In IfxEvadc_G11CH15_AN35_IN = {&MODULE_EVADC, IfxEvadc_GroupId_11, {NULL_PTR,35}, 15};
98 IfxEvadc_Vadcg_In IfxEvadc_G11CH1_AN5_IN = {&MODULE_EVADC, IfxEvadc_GroupId_11, {NULL_PTR, 5}, 1};
99 IfxEvadc_Vadcg_In IfxEvadc_G11CH2_AN6_IN = {&MODULE_EVADC, IfxEvadc_GroupId_11, {NULL_PTR, 6}, 2};
100 IfxEvadc_Vadcg_In IfxEvadc_G11CH3_AN7_IN = {&MODULE_EVADC, IfxEvadc_GroupId_11, {NULL_PTR, 7}, 3};
101 IfxEvadc_Vadcg_In IfxEvadc_G11CH4_AN8_IN = {&MODULE_EVADC, IfxEvadc_GroupId_11, {NULL_PTR, 8}, 4};
102 IfxEvadc_Vadcg_In IfxEvadc_G11CH5_AN9_IN = {&MODULE_EVADC, IfxEvadc_GroupId_11, {NULL_PTR, 9}, 5};
103 IfxEvadc_Vadcg_In IfxEvadc_G11CH6_AN10_IN = {&MODULE_EVADC, IfxEvadc_GroupId_11, {NULL_PTR,10}, 6};
104 IfxEvadc_Vadcg_In IfxEvadc_G11CH7_AN11_IN = {&MODULE_EVADC, IfxEvadc_GroupId_11, {NULL_PTR,11}, 7};
105 IfxEvadc_Vadcg_In IfxEvadc_G11CH8_P40_11_IN = {&MODULE_EVADC, IfxEvadc_GroupId_11, {&MODULE_P40,11}, 8};
106 IfxEvadc_Vadcg_In IfxEvadc_G11CH9_P40_12_IN = {&MODULE_EVADC, IfxEvadc_GroupId_11, {&MODULE_P40,12}, 9};
107 IfxEvadc_Vadcg_In IfxEvadc_G1CH0_AN8_IN = {&MODULE_EVADC, IfxEvadc_GroupId_1, {NULL_PTR, 8}, 0};
108 IfxEvadc_Vadcg_In IfxEvadc_G1CH1_AN9_IN = {&MODULE_EVADC, IfxEvadc_GroupId_1, {NULL_PTR, 9}, 1};
109 IfxEvadc_Vadcg_In IfxEvadc_G1CH2_AN10_IN = {&MODULE_EVADC, IfxEvadc_GroupId_1, {NULL_PTR,10}, 2};
110 IfxEvadc_Vadcg_In IfxEvadc_G1CH3_AN11_IN = {&MODULE_EVADC, IfxEvadc_GroupId_1, {NULL_PTR,11}, 3};
111 IfxEvadc_Vadcg_In IfxEvadc_G1CH4_AN12_IN = {&MODULE_EVADC, IfxEvadc_GroupId_1, {NULL_PTR,12}, 4};
112 IfxEvadc_Vadcg_In IfxEvadc_G1CH5_AN13_IN = {&MODULE_EVADC, IfxEvadc_GroupId_1, {NULL_PTR,13}, 5};
113 IfxEvadc_Vadcg_In IfxEvadc_G1CH6_AN14_IN = {&MODULE_EVADC, IfxEvadc_GroupId_1, {NULL_PTR,14}, 6};
114 IfxEvadc_Vadcg_In IfxEvadc_G1CH7_AN15_IN = {&MODULE_EVADC, IfxEvadc_GroupId_1, {NULL_PTR,15}, 7};
115 IfxEvadc_Vadcg_In IfxEvadc_G2CH0_AN16_IN = {&MODULE_EVADC, IfxEvadc_GroupId_2, {NULL_PTR,16}, 0};
116 IfxEvadc_Vadcg_In IfxEvadc_G2CH1_P40_10_IN = {&MODULE_EVADC, IfxEvadc_GroupId_2, {&MODULE_P40,10}, 1};
117 IfxEvadc_Vadcg_In IfxEvadc_G2CH2_P40_11_IN = {&MODULE_EVADC, IfxEvadc_GroupId_2, {&MODULE_P40,11}, 2};
118 IfxEvadc_Vadcg_In IfxEvadc_G2CH3_P40_12_IN = {&MODULE_EVADC, IfxEvadc_GroupId_2, {&MODULE_P40,12}, 3};
119 IfxEvadc_Vadcg_In IfxEvadc_G2CH4_AN20_IN = {&MODULE_EVADC, IfxEvadc_GroupId_2, {NULL_PTR,20}, 4};
120 IfxEvadc_Vadcg_In IfxEvadc_G2CH5_AN21_IN = {&MODULE_EVADC, IfxEvadc_GroupId_2, {NULL_PTR,21}, 5};
121 IfxEvadc_Vadcg_In IfxEvadc_G2CH6_AN22_IN = {&MODULE_EVADC, IfxEvadc_GroupId_2, {NULL_PTR,22}, 6};
122 IfxEvadc_Vadcg_In IfxEvadc_G2CH7_AN23_IN = {&MODULE_EVADC, IfxEvadc_GroupId_2, {NULL_PTR,23}, 7};
123 IfxEvadc_Vadcg_In IfxEvadc_G3CH0_P40_0_IN = {&MODULE_EVADC, IfxEvadc_GroupId_3, {&MODULE_P40, 0}, 0};
124 IfxEvadc_Vadcg_In IfxEvadc_G3CH1_P40_1_IN = {&MODULE_EVADC, IfxEvadc_GroupId_3, {&MODULE_P40, 1}, 1};
125 IfxEvadc_Vadcg_In IfxEvadc_G3CH2_P40_2_IN = {&MODULE_EVADC, IfxEvadc_GroupId_3, {&MODULE_P40, 2}, 2};
126 IfxEvadc_Vadcg_In IfxEvadc_G3CH3_P40_3_IN = {&MODULE_EVADC, IfxEvadc_GroupId_3, {&MODULE_P40, 3}, 3};
127 IfxEvadc_Vadcg_In IfxEvadc_G3CH4_P40_13_IN = {&MODULE_EVADC, IfxEvadc_GroupId_3, {&MODULE_P40,13}, 4};
128 IfxEvadc_Vadcg_In IfxEvadc_G3CH5_P40_14_IN = {&MODULE_EVADC, IfxEvadc_GroupId_3, {&MODULE_P40,14}, 5};
129 IfxEvadc_Vadcg_In IfxEvadc_G3CH6_AN30_IN = {&MODULE_EVADC, IfxEvadc_GroupId_3, {NULL_PTR,30}, 6};
130 IfxEvadc_Vadcg_In IfxEvadc_G3CH7_AN31_IN = {&MODULE_EVADC, IfxEvadc_GroupId_3, {NULL_PTR,31}, 7};
131 IfxEvadc_Vadcg_In IfxEvadc_G4CH0_AN40_IN = {&MODULE_EVADC, IfxEvadc_GroupId_4, {NULL_PTR,40}, 0};
132 IfxEvadc_Vadcg_In IfxEvadc_G4CH1_AN41_IN = {&MODULE_EVADC, IfxEvadc_GroupId_4, {NULL_PTR,41}, 1};
133 IfxEvadc_Vadcg_In IfxEvadc_G4CH2_AN42_IN = {&MODULE_EVADC, IfxEvadc_GroupId_4, {NULL_PTR,42}, 2};
134 IfxEvadc_Vadcg_In IfxEvadc_G4CH3_AN43_IN = {&MODULE_EVADC, IfxEvadc_GroupId_4, {NULL_PTR,43}, 3};
135 IfxEvadc_Vadcg_In IfxEvadc_G4CH4_P40_13_IN = {&MODULE_EVADC, IfxEvadc_GroupId_4, {&MODULE_P40,13}, 4};
136 IfxEvadc_Vadcg_In IfxEvadc_G4CH5_P40_14_IN = {&MODULE_EVADC, IfxEvadc_GroupId_4, {&MODULE_P40,14}, 5};
137 IfxEvadc_Vadcg_In IfxEvadc_G4CH6_AN30_IN = {&MODULE_EVADC, IfxEvadc_GroupId_4, {NULL_PTR,30}, 6};
138 IfxEvadc_Vadcg_In IfxEvadc_G4CH7_AN31_IN = {&MODULE_EVADC, IfxEvadc_GroupId_4, {NULL_PTR,31}, 7};
139 IfxEvadc_Vadcg_In IfxEvadc_G5CH0_AN48_IN = {&MODULE_EVADC, IfxEvadc_GroupId_5, {NULL_PTR,48}, 0};
140 IfxEvadc_Vadcg_In IfxEvadc_G5CH1_AN49_IN = {&MODULE_EVADC, IfxEvadc_GroupId_5, {NULL_PTR,49}, 1};
141 IfxEvadc_Vadcg_In IfxEvadc_G5CH2_AN50_IN = {&MODULE_EVADC, IfxEvadc_GroupId_5, {NULL_PTR,50}, 2};
142 IfxEvadc_Vadcg_In IfxEvadc_G5CH3_AN51_IN = {&MODULE_EVADC, IfxEvadc_GroupId_5, {NULL_PTR,51}, 3};
143 IfxEvadc_Vadcg_In IfxEvadc_G5CH4_AN52_IN = {&MODULE_EVADC, IfxEvadc_GroupId_5, {NULL_PTR,52}, 4};
144 IfxEvadc_Vadcg_In IfxEvadc_G5CH5_AN53_IN = {&MODULE_EVADC, IfxEvadc_GroupId_5, {NULL_PTR,53}, 5};
145 IfxEvadc_Vadcg_In IfxEvadc_G5CH6_P41_4_IN = {&MODULE_EVADC, IfxEvadc_GroupId_5, {&MODULE_P41, 4}, 6};
146 IfxEvadc_Vadcg_In IfxEvadc_G5CH7_P41_5_IN = {&MODULE_EVADC, IfxEvadc_GroupId_5, {&MODULE_P41, 5}, 7};
147 IfxEvadc_Vadcg_In IfxEvadc_G6CH0_AN56_IN = {&MODULE_EVADC, IfxEvadc_GroupId_6, {NULL_PTR,56}, 0};
148 IfxEvadc_Vadcg_In IfxEvadc_G6CH1_AN57_IN = {&MODULE_EVADC, IfxEvadc_GroupId_6, {NULL_PTR,57}, 1};
149 IfxEvadc_Vadcg_In IfxEvadc_G6CH2_AN58_IN = {&MODULE_EVADC, IfxEvadc_GroupId_6, {NULL_PTR,58}, 2};
150 IfxEvadc_Vadcg_In IfxEvadc_G6CH3_AN59_IN = {&MODULE_EVADC, IfxEvadc_GroupId_6, {NULL_PTR,59}, 3};
151 IfxEvadc_Vadcg_In IfxEvadc_G6CH4_AN60_IN = {&MODULE_EVADC, IfxEvadc_GroupId_6, {NULL_PTR,60}, 4};
152 IfxEvadc_Vadcg_In IfxEvadc_G6CH5_AN61_IN = {&MODULE_EVADC, IfxEvadc_GroupId_6, {NULL_PTR,61}, 5};
153 IfxEvadc_Vadcg_In IfxEvadc_G6CH6_P41_6_IN = {&MODULE_EVADC, IfxEvadc_GroupId_6, {&MODULE_P41, 6}, 6};
154 IfxEvadc_Vadcg_In IfxEvadc_G6CH7_P41_7_IN = {&MODULE_EVADC, IfxEvadc_GroupId_6, {&MODULE_P41, 7}, 7};
155 IfxEvadc_Vadcg_In IfxEvadc_G7CH0_P41_8_IN = {&MODULE_EVADC, IfxEvadc_GroupId_7, {&MODULE_P41, 8}, 0};
156 IfxEvadc_Vadcg_In IfxEvadc_G7CH1_AN65_IN = {&MODULE_EVADC, IfxEvadc_GroupId_7, {NULL_PTR,65}, 1};
157 IfxEvadc_Vadcg_In IfxEvadc_G7CH2_AN66_IN = {&MODULE_EVADC, IfxEvadc_GroupId_7, {NULL_PTR,66}, 2};
158 IfxEvadc_Vadcg_In IfxEvadc_G7CH3_P40_15_IN = {&MODULE_EVADC, IfxEvadc_GroupId_7, {&MODULE_P40,15}, 3};
159 IfxEvadc_Vadcg_In IfxEvadc_G7CH4_P41_0_IN = {&MODULE_EVADC, IfxEvadc_GroupId_7, {&MODULE_P41, 0}, 4};
160 IfxEvadc_Vadcg_In IfxEvadc_G7CH5_P41_1_IN = {&MODULE_EVADC, IfxEvadc_GroupId_7, {&MODULE_P41, 1}, 5};
161 IfxEvadc_Vadcg_In IfxEvadc_G7CH6_P41_2_IN = {&MODULE_EVADC, IfxEvadc_GroupId_7, {&MODULE_P41, 2}, 6};
162 IfxEvadc_Vadcg_In IfxEvadc_G7CH7_P41_3_IN = {&MODULE_EVADC, IfxEvadc_GroupId_7, {&MODULE_P41, 3}, 7};
163 IfxEvadc_Vadcg_In IfxEvadc_G8CH0_P40_4_IN = {&MODULE_EVADC, IfxEvadc_GroupId_8, {&MODULE_P40, 4}, 0};
164 IfxEvadc_Vadcg_In IfxEvadc_G8CH10_AN42_IN = {&MODULE_EVADC, IfxEvadc_GroupId_8, {NULL_PTR,42}, 10};
165 IfxEvadc_Vadcg_In IfxEvadc_G8CH11_AN43_IN = {&MODULE_EVADC, IfxEvadc_GroupId_8, {NULL_PTR,43}, 11};
166 IfxEvadc_Vadcg_In IfxEvadc_G8CH12_AN44_IN = {&MODULE_EVADC, IfxEvadc_GroupId_8, {NULL_PTR,44}, 12};
167 IfxEvadc_Vadcg_In IfxEvadc_G8CH13_AN45_IN = {&MODULE_EVADC, IfxEvadc_GroupId_8, {NULL_PTR,45}, 13};
168 IfxEvadc_Vadcg_In IfxEvadc_G8CH14_AN46_IN = {&MODULE_EVADC, IfxEvadc_GroupId_8, {NULL_PTR,46}, 14};
169 IfxEvadc_Vadcg_In IfxEvadc_G8CH15_AN47_IN = {&MODULE_EVADC, IfxEvadc_GroupId_8, {NULL_PTR,47}, 15};
170 IfxEvadc_Vadcg_In IfxEvadc_G8CH1_P40_5_IN = {&MODULE_EVADC, IfxEvadc_GroupId_8, {&MODULE_P40, 5}, 1};
171 IfxEvadc_Vadcg_In IfxEvadc_G8CH2_AN34_IN = {&MODULE_EVADC, IfxEvadc_GroupId_8, {NULL_PTR,34}, 2};
172 IfxEvadc_Vadcg_In IfxEvadc_G8CH3_AN35_IN = {&MODULE_EVADC, IfxEvadc_GroupId_8, {NULL_PTR,35}, 3};
173 IfxEvadc_Vadcg_In IfxEvadc_G8CH4_P40_6_IN = {&MODULE_EVADC, IfxEvadc_GroupId_8, {&MODULE_P40, 6}, 4};
174 IfxEvadc_Vadcg_In IfxEvadc_G8CH5_P40_7_IN = {&MODULE_EVADC, IfxEvadc_GroupId_8, {&MODULE_P40, 7}, 5};
175 IfxEvadc_Vadcg_In IfxEvadc_G8CH6_P40_8_IN = {&MODULE_EVADC, IfxEvadc_GroupId_8, {&MODULE_P40, 8}, 6};
176 IfxEvadc_Vadcg_In IfxEvadc_G8CH7_P40_9_IN = {&MODULE_EVADC, IfxEvadc_GroupId_8, {&MODULE_P40, 9}, 7};
177 IfxEvadc_Vadcg_In IfxEvadc_G8CH8_AN40_IN = {&MODULE_EVADC, IfxEvadc_GroupId_8, {NULL_PTR,40}, 8};
178 IfxEvadc_Vadcg_In IfxEvadc_G8CH9_AN41_IN = {&MODULE_EVADC, IfxEvadc_GroupId_8, {NULL_PTR,41}, 9};
179 IfxEvadc_Vadcg_In IfxEvadc_G9CH0_P00_12_IN = {&MODULE_EVADC, IfxEvadc_GroupId_9, {&MODULE_P00,12}, 0};
180 IfxEvadc_Vadcg_In IfxEvadc_G9CH10_P00_2_IN = {&MODULE_EVADC, IfxEvadc_GroupId_9, {&MODULE_P00, 2}, 10};
181 IfxEvadc_Vadcg_In IfxEvadc_G9CH11_P00_1_IN = {&MODULE_EVADC, IfxEvadc_GroupId_9, {&MODULE_P00, 1}, 11};
182 IfxEvadc_Vadcg_In IfxEvadc_G9CH12_P01_5_IN = {&MODULE_EVADC, IfxEvadc_GroupId_9, {&MODULE_P01, 5}, 12};
183 IfxEvadc_Vadcg_In IfxEvadc_G9CH13_P01_4_IN = {&MODULE_EVADC, IfxEvadc_GroupId_9, {&MODULE_P01, 4}, 13};
184 IfxEvadc_Vadcg_In IfxEvadc_G9CH14_P01_3_IN = {&MODULE_EVADC, IfxEvadc_GroupId_9, {&MODULE_P01, 3}, 14};
185 IfxEvadc_Vadcg_In IfxEvadc_G9CH15_P02_11_IN = {&MODULE_EVADC, IfxEvadc_GroupId_9, {&MODULE_P02,11}, 15};
186 IfxEvadc_Vadcg_In IfxEvadc_G9CH1_P00_11_IN = {&MODULE_EVADC, IfxEvadc_GroupId_9, {&MODULE_P00,11}, 1};
187 IfxEvadc_Vadcg_In IfxEvadc_G9CH2_P00_10_IN = {&MODULE_EVADC, IfxEvadc_GroupId_9, {&MODULE_P00,10}, 2};
188 IfxEvadc_Vadcg_In IfxEvadc_G9CH3_P00_9_IN = {&MODULE_EVADC, IfxEvadc_GroupId_9, {&MODULE_P00, 9}, 3};
189 IfxEvadc_Vadcg_In IfxEvadc_G9CH4_P00_8_IN = {&MODULE_EVADC, IfxEvadc_GroupId_9, {&MODULE_P00, 8}, 4};
190 IfxEvadc_Vadcg_In IfxEvadc_G9CH5_P00_7_IN = {&MODULE_EVADC, IfxEvadc_GroupId_9, {&MODULE_P00, 7}, 5};
191 IfxEvadc_Vadcg_In IfxEvadc_G9CH6_P00_6_IN = {&MODULE_EVADC, IfxEvadc_GroupId_9, {&MODULE_P00, 6}, 6};
192 IfxEvadc_Vadcg_In IfxEvadc_G9CH7_P00_5_IN = {&MODULE_EVADC, IfxEvadc_GroupId_9, {&MODULE_P00, 5}, 7};
193 IfxEvadc_Vadcg_In IfxEvadc_G9CH8_P00_4_IN = {&MODULE_EVADC, IfxEvadc_GroupId_9, {&MODULE_P00, 4}, 8};
194 IfxEvadc_Vadcg_In IfxEvadc_G9CH9_P00_3_IN = {&MODULE_EVADC, IfxEvadc_GroupId_9, {&MODULE_P00, 3}, 9};
195
196
197 const IfxEvadc_Emux_Out *IfxEvadc_Emux_Out_pinTable[IFXEVADC_PINMAP_NUM_MODULES][IFXEVADC_PINMAP_EMUX_OUT_NUM_ITEMS] = {
198 {
199 &IfxEvadc_EMUX10_P00_6_OUT,
200 &IfxEvadc_EMUX11_P00_7_OUT,
201 &IfxEvadc_EMUX12_P00_8_OUT,
202 &IfxEvadc_EMUX00_P02_6_OUT,
203 &IfxEvadc_EMUX01_P02_7_OUT,
204 &IfxEvadc_EMUX02_P02_8_OUT,
205 &IfxEvadc_EMUX02_P33_1_OUT,
206 &IfxEvadc_EMUX01_P33_2_OUT,
207 &IfxEvadc_EMUX00_P33_3_OUT,
208 &IfxEvadc_EMUX12_P33_4_OUT,
209 &IfxEvadc_EMUX11_P33_5_OUT,
210 &IfxEvadc_EMUX10_P33_6_OUT
211 }
212 };
213
214 const IfxEvadc_GxBfl_Out *IfxEvadc_GxBfl_Out_pinTable[IFXEVADC_PINMAP_NUM_MODULES][IFXEVADC_PINMAP_NUM_GROUPS][IFXEVADC_PINMAP_GXBFL_OUT_NUM_ITEMS] = {
215 {
216 {
217 NULL_PTR,
218 NULL_PTR,
219 NULL_PTR
220 },
221 {
222 NULL_PTR,
223 NULL_PTR,
224 NULL_PTR
225 },
226 {
227 NULL_PTR,
228 NULL_PTR,
229 NULL_PTR
230 },
231 {
232 NULL_PTR,
233 NULL_PTR,
234 NULL_PTR
235 },
236 {
237 NULL_PTR,
238 NULL_PTR,
239 NULL_PTR
240 },
241 {
242 NULL_PTR,
243 NULL_PTR,
244 NULL_PTR
245 },
246 {
247 NULL_PTR,
248 NULL_PTR,
249 NULL_PTR
250 },
251 {
252 NULL_PTR,
253 NULL_PTR,
254 NULL_PTR
255 },
256 {
257 NULL_PTR,
258 NULL_PTR,
259 NULL_PTR
260 },
261 {
262 NULL_PTR,
263 NULL_PTR,
264 NULL_PTR
265 },
266 {
267 NULL_PTR,
268 NULL_PTR,
269 NULL_PTR
270 },
271 {
272 NULL_PTR,
273 NULL_PTR,
274 NULL_PTR
275 },
276 {
277 &IfxEvadc_FC0BFLOUT_P00_5_OUT,
278 &IfxEvadc_FC0BFLOUT_P33_4_OUT,
279 NULL_PTR
280 },
281 {
282 &IfxEvadc_FC1BFLOUT_P10_1_OUT,
283 &IfxEvadc_FC1BFLOUT_P33_6_OUT,
284 NULL_PTR
285 },
286 {
287 &IfxEvadc_FC2BFLOUT_P00_7_OUT,
288 &IfxEvadc_FC2BFLOUT_P33_0_OUT,
289 &IfxEvadc_FC2BFLOUT_P33_5_OUT
290 },
291 {
292 &IfxEvadc_FC3BFLOUT_P10_2_OUT,
293 &IfxEvadc_FC3BFLOUT_P33_2_OUT,
294 &IfxEvadc_FC3BFLOUT_P33_7_OUT
295 }
296 }
297 };
298
299 const IfxEvadc_Vadcg_In *IfxEvadc_Vadcg_In_pinTable[IFXEVADC_PINMAP_NUM_MODULES][IFXEVADC_PINMAP_NUM_GROUPS][IFXEVADC_PINMAP_VADCG_IN_NUM_ITEMS] = {
300 {
301 {
302 &IfxEvadc_G0CH0_AN0_IN,
303 &IfxEvadc_G0CH1_AN1_IN,
304 &IfxEvadc_G0CH2_AN2_IN,
305 &IfxEvadc_G0CH3_AN3_IN,
306 &IfxEvadc_G0CH4_AN4_IN,
307 &IfxEvadc_G0CH5_AN5_IN,
308 &IfxEvadc_G0CH6_AN6_IN,
309 &IfxEvadc_G0CH7_AN7_IN,
310 NULL_PTR,
311 NULL_PTR,
312 NULL_PTR,
313 NULL_PTR,
314 NULL_PTR,
315 NULL_PTR,
316 NULL_PTR,
317 NULL_PTR
318 },
319 {
320 &IfxEvadc_G1CH0_AN8_IN,
321 &IfxEvadc_G1CH1_AN9_IN,
322 &IfxEvadc_G1CH2_AN10_IN,
323 &IfxEvadc_G1CH3_AN11_IN,
324 &IfxEvadc_G1CH4_AN12_IN,
325 &IfxEvadc_G1CH5_AN13_IN,
326 &IfxEvadc_G1CH6_AN14_IN,
327 &IfxEvadc_G1CH7_AN15_IN,
328 NULL_PTR,
329 NULL_PTR,
330 NULL_PTR,
331 NULL_PTR,
332 NULL_PTR,
333 NULL_PTR,
334 NULL_PTR,
335 NULL_PTR
336 },
337 {
338 &IfxEvadc_G2CH0_AN16_IN,
339 &IfxEvadc_G2CH1_P40_10_IN,
340 &IfxEvadc_G2CH2_P40_11_IN,
341 &IfxEvadc_G2CH3_P40_12_IN,
342 &IfxEvadc_G2CH4_AN20_IN,
343 &IfxEvadc_G2CH5_AN21_IN,
344 &IfxEvadc_G2CH6_AN22_IN,
345 &IfxEvadc_G2CH7_AN23_IN,
346 NULL_PTR,
347 NULL_PTR,
348 NULL_PTR,
349 NULL_PTR,
350 NULL_PTR,
351 NULL_PTR,
352 NULL_PTR,
353 NULL_PTR
354 },
355 {
356 &IfxEvadc_G3CH0_P40_0_IN,
357 &IfxEvadc_G3CH1_P40_1_IN,
358 &IfxEvadc_G3CH2_P40_2_IN,
359 &IfxEvadc_G3CH3_P40_3_IN,
360 &IfxEvadc_G3CH4_P40_13_IN,
361 &IfxEvadc_G3CH5_P40_14_IN,
362 &IfxEvadc_G3CH6_AN30_IN,
363 &IfxEvadc_G3CH7_AN31_IN,
364 NULL_PTR,
365 NULL_PTR,
366 NULL_PTR,
367 NULL_PTR,
368 NULL_PTR,
369 NULL_PTR,
370 NULL_PTR,
371 NULL_PTR
372 },
373 {
374 &IfxEvadc_G4CH0_AN40_IN,
375 &IfxEvadc_G4CH1_AN41_IN,
376 &IfxEvadc_G4CH2_AN42_IN,
377 &IfxEvadc_G4CH3_AN43_IN,
378 &IfxEvadc_G4CH4_P40_13_IN,
379 &IfxEvadc_G4CH5_P40_14_IN,
380 &IfxEvadc_G4CH6_AN30_IN,
381 &IfxEvadc_G4CH7_AN31_IN,
382 NULL_PTR,
383 NULL_PTR,
384 NULL_PTR,
385 NULL_PTR,
386 NULL_PTR,
387 NULL_PTR,
388 NULL_PTR,
389 NULL_PTR
390 },
391 {
392 &IfxEvadc_G5CH0_AN48_IN,
393 &IfxEvadc_G5CH1_AN49_IN,
394 &IfxEvadc_G5CH2_AN50_IN,
395 &IfxEvadc_G5CH3_AN51_IN,
396 &IfxEvadc_G5CH4_AN52_IN,
397 &IfxEvadc_G5CH5_AN53_IN,
398 &IfxEvadc_G5CH6_P41_4_IN,
399 &IfxEvadc_G5CH7_P41_5_IN,
400 NULL_PTR,
401 NULL_PTR,
402 NULL_PTR,
403 NULL_PTR,
404 NULL_PTR,
405 NULL_PTR,
406 NULL_PTR,
407 NULL_PTR
408 },
409 {
410 &IfxEvadc_G6CH0_AN56_IN,
411 &IfxEvadc_G6CH1_AN57_IN,
412 &IfxEvadc_G6CH2_AN58_IN,
413 &IfxEvadc_G6CH3_AN59_IN,
414 &IfxEvadc_G6CH4_AN60_IN,
415 &IfxEvadc_G6CH5_AN61_IN,
416 &IfxEvadc_G6CH6_P41_6_IN,
417 &IfxEvadc_G6CH7_P41_7_IN,
418 NULL_PTR,
419 NULL_PTR,
420 NULL_PTR,
421 NULL_PTR,
422 NULL_PTR,
423 NULL_PTR,
424 NULL_PTR,
425 NULL_PTR
426 },
427 {
428 &IfxEvadc_G7CH0_P41_8_IN,
429 &IfxEvadc_G7CH1_AN65_IN,
430 &IfxEvadc_G7CH2_AN66_IN,
431 &IfxEvadc_G7CH3_P40_15_IN,
432 &IfxEvadc_G7CH4_P41_0_IN,
433 &IfxEvadc_G7CH5_P41_1_IN,
434 &IfxEvadc_G7CH6_P41_2_IN,
435 &IfxEvadc_G7CH7_P41_3_IN,
436 NULL_PTR,
437 NULL_PTR,
438 NULL_PTR,
439 NULL_PTR,
440 NULL_PTR,
441 NULL_PTR,
442 NULL_PTR,
443 NULL_PTR
444 },
445 {
446 &IfxEvadc_G8CH0_P40_4_IN,
447 &IfxEvadc_G8CH1_P40_5_IN,
448 &IfxEvadc_G8CH2_AN34_IN,
449 &IfxEvadc_G8CH3_AN35_IN,
450 &IfxEvadc_G8CH4_P40_6_IN,
451 &IfxEvadc_G8CH5_P40_7_IN,
452 &IfxEvadc_G8CH6_P40_8_IN,
453 &IfxEvadc_G8CH7_P40_9_IN,
454 &IfxEvadc_G8CH8_AN40_IN,
455 &IfxEvadc_G8CH9_AN41_IN,
456 &IfxEvadc_G8CH10_AN42_IN,
457 &IfxEvadc_G8CH11_AN43_IN,
458 &IfxEvadc_G8CH12_AN44_IN,
459 &IfxEvadc_G8CH13_AN45_IN,
460 &IfxEvadc_G8CH14_AN46_IN,
461 &IfxEvadc_G8CH15_AN47_IN
462 },
463 {
464 &IfxEvadc_G9CH0_P00_12_IN,
465 &IfxEvadc_G9CH1_P00_11_IN,
466 &IfxEvadc_G9CH2_P00_10_IN,
467 &IfxEvadc_G9CH3_P00_9_IN,
468 &IfxEvadc_G9CH4_P00_8_IN,
469 &IfxEvadc_G9CH5_P00_7_IN,
470 &IfxEvadc_G9CH6_P00_6_IN,
471 &IfxEvadc_G9CH7_P00_5_IN,
472 &IfxEvadc_G9CH8_P00_4_IN,
473 &IfxEvadc_G9CH9_P00_3_IN,
474 &IfxEvadc_G9CH10_P00_2_IN,
475 &IfxEvadc_G9CH11_P00_1_IN,
476 &IfxEvadc_G9CH12_P01_5_IN,
477 &IfxEvadc_G9CH13_P01_4_IN,
478 &IfxEvadc_G9CH14_P01_3_IN,
479 &IfxEvadc_G9CH15_P02_11_IN
480 },
481 {
482 &IfxEvadc_G10CH0_P33_7_IN,
483 &IfxEvadc_G10CH1_P33_6_IN,
484 &IfxEvadc_G10CH2_P33_5_IN,
485 &IfxEvadc_G10CH3_P33_4_IN,
486 &IfxEvadc_G10CH4_P33_3_IN,
487 &IfxEvadc_G10CH5_P33_2_IN,
488 &IfxEvadc_G10CH6_P33_1_IN,
489 &IfxEvadc_G10CH7_P33_0_IN,
490 &IfxEvadc_G10CH8_P34_4_IN,
491 &IfxEvadc_G10CH9_P34_3_IN,
492 &IfxEvadc_G10CH10_P34_2_IN,
493 &IfxEvadc_G10CH11_P34_1_IN,
494 NULL_PTR,
495 NULL_PTR,
496 NULL_PTR,
497 NULL_PTR
498 },
499 {
500 &IfxEvadc_G11CH0_AN4_IN,
501 &IfxEvadc_G11CH1_AN5_IN,
502 &IfxEvadc_G11CH2_AN6_IN,
503 &IfxEvadc_G11CH3_AN7_IN,
504 &IfxEvadc_G11CH4_AN8_IN,
505 &IfxEvadc_G11CH5_AN9_IN,
506 &IfxEvadc_G11CH6_AN10_IN,
507 &IfxEvadc_G11CH7_AN11_IN,
508 &IfxEvadc_G11CH8_P40_11_IN,
509 &IfxEvadc_G11CH9_P40_12_IN,
510 &IfxEvadc_G11CH10_P40_2_IN,
511 &IfxEvadc_G11CH11_P40_3_IN,
512 &IfxEvadc_G11CH12_P40_4_IN,
513 &IfxEvadc_G11CH13_P40_5_IN,
514 &IfxEvadc_G11CH14_AN34_IN,
515 &IfxEvadc_G11CH15_AN35_IN
516 },
517 {
518 &IfxEvadc_FC0CH0_AN16_IN,
519 NULL_PTR,
520 NULL_PTR,
521 NULL_PTR,
522 NULL_PTR,
523 NULL_PTR,
524 NULL_PTR,
525 NULL_PTR,
526 NULL_PTR,
527 NULL_PTR,
528 NULL_PTR,
529 NULL_PTR,
530 NULL_PTR,
531 NULL_PTR,
532 NULL_PTR,
533 NULL_PTR
534 },
535 {
536 &IfxEvadc_FC1CH0_P40_10_IN,
537 NULL_PTR,
538 NULL_PTR,
539 NULL_PTR,
540 NULL_PTR,
541 NULL_PTR,
542 NULL_PTR,
543 NULL_PTR,
544 NULL_PTR,
545 NULL_PTR,
546 NULL_PTR,
547 NULL_PTR,
548 NULL_PTR,
549 NULL_PTR,
550 NULL_PTR,
551 NULL_PTR
552 },
553 {
554 &IfxEvadc_FC2CH0_P00_12_IN,
555 NULL_PTR,
556 NULL_PTR,
557 NULL_PTR,
558 NULL_PTR,
559 NULL_PTR,
560 NULL_PTR,
561 NULL_PTR,
562 NULL_PTR,
563 NULL_PTR,
564 NULL_PTR,
565 NULL_PTR,
566 NULL_PTR,
567 NULL_PTR,
568 NULL_PTR,
569 NULL_PTR
570 },
571 {
572 &IfxEvadc_FC3CH0_P00_11_IN,
573 NULL_PTR,
574 NULL_PTR,
575 NULL_PTR,
576 NULL_PTR,
577 NULL_PTR,
578 NULL_PTR,
579 NULL_PTR,
580 NULL_PTR,
581 NULL_PTR,
582 NULL_PTR,
583 NULL_PTR,
584 NULL_PTR,
585 NULL_PTR,
586 NULL_PTR,
587 NULL_PTR
588 }
589 }
590 };
IfxEvadc_G5CH0_AN48_IN
IfxEvadc_Vadcg_In IfxEvadc_G5CH0_AN48_IN
Definition: IfxEvadc_PinMap.c:139
IfxEvadc_FC3CH0_P00_11_IN
IfxEvadc_Vadcg_In IfxEvadc_FC3CH0_P00_11_IN
Definition: IfxEvadc_PinMap.c:70
IfxEvadc_FC2BFLOUT_P33_5_OUT
IfxEvadc_GxBfl_Out IfxEvadc_FC2BFLOUT_P33_5_OUT
Definition: IfxEvadc_PinMap.c:63
IfxEvadc_G5CH1_AN49_IN
IfxEvadc_Vadcg_In IfxEvadc_G5CH1_AN49_IN
Definition: IfxEvadc_PinMap.c:140
IfxEvadc_G9CH2_P00_10_IN
IfxEvadc_Vadcg_In IfxEvadc_G9CH2_P00_10_IN
Definition: IfxEvadc_PinMap.c:187
IfxEvadc_FC2CH0_P00_12_IN
IfxEvadc_Vadcg_In IfxEvadc_FC2CH0_P00_12_IN
Definition: IfxEvadc_PinMap.c:69
IfxEvadc_EMUX12_P33_4_OUT
IfxEvadc_Emux_Out IfxEvadc_EMUX12_P33_4_OUT
Definition: IfxEvadc_PinMap.c:56
IfxEvadc_G1CH6_AN14_IN
IfxEvadc_Vadcg_In IfxEvadc_G1CH6_AN14_IN
Definition: IfxEvadc_PinMap.c:113
IfxEvadc_Vadcg_In
EVADC Analog Input.
Definition: IfxEvadc_PinMap.h:73
IFXEVADC_PINMAP_NUM_GROUPS
#define IFXEVADC_PINMAP_NUM_GROUPS
Definition: IfxEvadc_PinMap.h:234
IfxEvadc_G9CH0_P00_12_IN
IfxEvadc_Vadcg_In IfxEvadc_G9CH0_P00_12_IN
Definition: IfxEvadc_PinMap.c:179
IfxEvadc_GroupId_6
EVADC Group 6(Primary Group 6)
Definition: IfxEvadc_cfg.h:142
IfxEvadc_G10CH9_P34_3_IN
IfxEvadc_Vadcg_In IfxEvadc_G10CH9_P34_3_IN
Definition: IfxEvadc_PinMap.c:90
IfxEvadc_G9CH11_P00_1_IN
IfxEvadc_Vadcg_In IfxEvadc_G9CH11_P00_1_IN
Definition: IfxEvadc_PinMap.c:181
IfxEvadc_G8CH9_AN41_IN
IfxEvadc_Vadcg_In IfxEvadc_G8CH9_AN41_IN
Definition: IfxEvadc_PinMap.c:178
IfxEvadc_G9CH10_P00_2_IN
IfxEvadc_Vadcg_In IfxEvadc_G9CH10_P00_2_IN
Definition: IfxEvadc_PinMap.c:180
IFXEVADC_PINMAP_VADCG_IN_NUM_ITEMS
#define IFXEVADC_PINMAP_VADCG_IN_NUM_ITEMS
Definition: IfxEvadc_PinMap.h:237
IfxEvadc_EMUX00_P33_3_OUT
IfxEvadc_Emux_Out IfxEvadc_EMUX00_P33_3_OUT
Definition: IfxEvadc_PinMap.c:46
IfxEvadc_G4CH2_AN42_IN
IfxEvadc_Vadcg_In IfxEvadc_G4CH2_AN42_IN
Definition: IfxEvadc_PinMap.c:133
IfxEvadc_G3CH6_AN30_IN
IfxEvadc_Vadcg_In IfxEvadc_G3CH6_AN30_IN
Definition: IfxEvadc_PinMap.c:129
IfxEvadc_G9CH8_P00_4_IN
IfxEvadc_Vadcg_In IfxEvadc_G9CH8_P00_4_IN
Definition: IfxEvadc_PinMap.c:193
IFXEVADC_PINMAP_NUM_MODULES
#define IFXEVADC_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxEvadc_PinMap.h:233
IfxEvadc_G3CH5_P40_14_IN
IfxEvadc_Vadcg_In IfxEvadc_G3CH5_P40_14_IN
Definition: IfxEvadc_PinMap.c:128
IfxEvadc_G9CH3_P00_9_IN
IfxEvadc_Vadcg_In IfxEvadc_G9CH3_P00_9_IN
Definition: IfxEvadc_PinMap.c:188
IfxEvadc_G7CH1_AN65_IN
IfxEvadc_Vadcg_In IfxEvadc_G7CH1_AN65_IN
Definition: IfxEvadc_PinMap.c:156
IfxEvadc_G2CH5_AN21_IN
IfxEvadc_Vadcg_In IfxEvadc_G2CH5_AN21_IN
Definition: IfxEvadc_PinMap.c:120
IfxEvadc_PinMap.h
EVADC I/O map.
IfxEvadc_G7CH5_P41_1_IN
IfxEvadc_Vadcg_In IfxEvadc_G7CH5_P41_1_IN
Definition: IfxEvadc_PinMap.c:160
IfxEvadc_GroupId_4
EVADC Group 4(Primary Group 4)
Definition: IfxEvadc_cfg.h:140
IfxEvadc_G9CH1_P00_11_IN
IfxEvadc_Vadcg_In IfxEvadc_G9CH1_P00_11_IN
Definition: IfxEvadc_PinMap.c:186
IfxEvadc_G2CH4_AN20_IN
IfxEvadc_Vadcg_In IfxEvadc_G2CH4_AN20_IN
Definition: IfxEvadc_PinMap.c:119
IfxEvadc_GroupId_5
EVADC Group 5(Primary Group 5)
Definition: IfxEvadc_cfg.h:141
IfxEvadc_G2CH1_P40_10_IN
IfxEvadc_Vadcg_In IfxEvadc_G2CH1_P40_10_IN
Definition: IfxEvadc_PinMap.c:116
IfxEvadc_Emux_Out_pinTable
const IfxEvadc_Emux_Out * IfxEvadc_Emux_Out_pinTable[IFXEVADC_PINMAP_NUM_MODULES][IFXEVADC_PINMAP_EMUX_OUT_NUM_ITEMS]
Definition: IfxEvadc_PinMap.c:197
IfxEvadc_G8CH7_P40_9_IN
IfxEvadc_Vadcg_In IfxEvadc_G8CH7_P40_9_IN
Definition: IfxEvadc_PinMap.c:176
IfxEvadc_G9CH7_P00_5_IN
IfxEvadc_Vadcg_In IfxEvadc_G9CH7_P00_5_IN
Definition: IfxEvadc_PinMap.c:192
IfxEvadc_GroupId_11
EVADC Group 11(Secondary Group 3)
Definition: IfxEvadc_cfg.h:147
IfxEvadc_G4CH1_AN41_IN
IfxEvadc_Vadcg_In IfxEvadc_G4CH1_AN41_IN
Definition: IfxEvadc_PinMap.c:132
IfxEvadc_G8CH0_P40_4_IN
IfxEvadc_Vadcg_In IfxEvadc_G8CH0_P40_4_IN
Definition: IfxEvadc_PinMap.c:163
IfxEvadc_G7CH6_P41_2_IN
IfxEvadc_Vadcg_In IfxEvadc_G7CH6_P41_2_IN
Definition: IfxEvadc_PinMap.c:161
IfxEvadc_FC2BFLOUT_P00_7_OUT
IfxEvadc_GxBfl_Out IfxEvadc_FC2BFLOUT_P00_7_OUT
Definition: IfxEvadc_PinMap.c:61
IfxEvadc_G0CH2_AN2_IN
IfxEvadc_Vadcg_In IfxEvadc_G0CH2_AN2_IN
Definition: IfxEvadc_PinMap.c:73
IfxEvadc_G8CH5_P40_7_IN
IfxEvadc_Vadcg_In IfxEvadc_G8CH5_P40_7_IN
Definition: IfxEvadc_PinMap.c:174
IfxEvadc_G11CH8_P40_11_IN
IfxEvadc_Vadcg_In IfxEvadc_G11CH8_P40_11_IN
Definition: IfxEvadc_PinMap.c:105
IfxEvadc_G8CH3_AN35_IN
IfxEvadc_Vadcg_In IfxEvadc_G8CH3_AN35_IN
Definition: IfxEvadc_PinMap.c:172
IfxEvadc_G5CH4_AN52_IN
IfxEvadc_Vadcg_In IfxEvadc_G5CH4_AN52_IN
Definition: IfxEvadc_PinMap.c:143
IfxEvadc_G11CH12_P40_4_IN
IfxEvadc_Vadcg_In IfxEvadc_G11CH12_P40_4_IN
Definition: IfxEvadc_PinMap.c:94
IfxEvadc_G10CH10_P34_2_IN
IfxEvadc_Vadcg_In IfxEvadc_G10CH10_P34_2_IN
Definition: IfxEvadc_PinMap.c:80
IfxEvadc_EMUX10_P00_6_OUT
IfxEvadc_Emux_Out IfxEvadc_EMUX10_P00_6_OUT
Definition: IfxEvadc_PinMap.c:51
IfxEvadc_G6CH7_P41_7_IN
IfxEvadc_Vadcg_In IfxEvadc_G6CH7_P41_7_IN
Definition: IfxEvadc_PinMap.c:154
IfxEvadc_G11CH13_P40_5_IN
IfxEvadc_Vadcg_In IfxEvadc_G11CH13_P40_5_IN
Definition: IfxEvadc_PinMap.c:95
IfxEvadc_G3CH1_P40_1_IN
IfxEvadc_Vadcg_In IfxEvadc_G3CH1_P40_1_IN
Definition: IfxEvadc_PinMap.c:124
IfxEvadc_G2CH6_AN22_IN
IfxEvadc_Vadcg_In IfxEvadc_G2CH6_AN22_IN
Definition: IfxEvadc_PinMap.c:121
IfxEvadc_G8CH15_AN47_IN
IfxEvadc_Vadcg_In IfxEvadc_G8CH15_AN47_IN
Definition: IfxEvadc_PinMap.c:169
IfxEvadc_G3CH7_AN31_IN
IfxEvadc_Vadcg_In IfxEvadc_G3CH7_AN31_IN
Definition: IfxEvadc_PinMap.c:130
IfxEvadc_G1CH0_AN8_IN
IfxEvadc_Vadcg_In IfxEvadc_G1CH0_AN8_IN
Definition: IfxEvadc_PinMap.c:107
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxEvadc_G11CH7_AN11_IN
IfxEvadc_Vadcg_In IfxEvadc_G11CH7_AN11_IN
Definition: IfxEvadc_PinMap.c:104
IfxEvadc_G8CH2_AN34_IN
IfxEvadc_Vadcg_In IfxEvadc_G8CH2_AN34_IN
Definition: IfxEvadc_PinMap.c:171
IfxEvadc_G4CH3_AN43_IN
IfxEvadc_Vadcg_In IfxEvadc_G4CH3_AN43_IN
Definition: IfxEvadc_PinMap.c:134
IfxEvadc_G10CH7_P33_0_IN
IfxEvadc_Vadcg_In IfxEvadc_G10CH7_P33_0_IN
Definition: IfxEvadc_PinMap.c:88
IfxEvadc_G8CH8_AN40_IN
IfxEvadc_Vadcg_In IfxEvadc_G8CH8_AN40_IN
Definition: IfxEvadc_PinMap.c:177
IfxEvadc_G8CH14_AN46_IN
IfxEvadc_Vadcg_In IfxEvadc_G8CH14_AN46_IN
Definition: IfxEvadc_PinMap.c:168
IfxEvadc_EMUX11_P33_5_OUT
IfxEvadc_Emux_Out IfxEvadc_EMUX11_P33_5_OUT
Definition: IfxEvadc_PinMap.c:54
IfxEvadc_G10CH3_P33_4_IN
IfxEvadc_Vadcg_In IfxEvadc_G10CH3_P33_4_IN
Definition: IfxEvadc_PinMap.c:84
IfxPort_OutputIdx_alt6
Definition: IfxPort.h:134
IfxEvadc_G3CH0_P40_0_IN
IfxEvadc_Vadcg_In IfxEvadc_G3CH0_P40_0_IN
Definition: IfxEvadc_PinMap.c:123
IfxEvadc_EMUX02_P33_1_OUT
IfxEvadc_Emux_Out IfxEvadc_EMUX02_P33_1_OUT
Definition: IfxEvadc_PinMap.c:50
IfxEvadc_G6CH0_AN56_IN
IfxEvadc_Vadcg_In IfxEvadc_G6CH0_AN56_IN
Definition: IfxEvadc_PinMap.c:147
IfxEvadc_G8CH11_AN43_IN
IfxEvadc_Vadcg_In IfxEvadc_G8CH11_AN43_IN
Definition: IfxEvadc_PinMap.c:165
IfxEvadc_G3CH2_P40_2_IN
IfxEvadc_Vadcg_In IfxEvadc_G3CH2_P40_2_IN
Definition: IfxEvadc_PinMap.c:125
IfxEvadc_EMUX00_P02_6_OUT
IfxEvadc_Emux_Out IfxEvadc_EMUX00_P02_6_OUT
Definition: IfxEvadc_PinMap.c:45
IfxEvadc_G10CH5_P33_2_IN
IfxEvadc_Vadcg_In IfxEvadc_G10CH5_P33_2_IN
Definition: IfxEvadc_PinMap.c:86
IfxEvadc_G6CH1_AN57_IN
IfxEvadc_Vadcg_In IfxEvadc_G6CH1_AN57_IN
Definition: IfxEvadc_PinMap.c:148
IfxEvadc_G2CH0_AN16_IN
IfxEvadc_Vadcg_In IfxEvadc_G2CH0_AN16_IN
Definition: IfxEvadc_PinMap.c:115
IfxEvadc_G11CH4_AN8_IN
IfxEvadc_Vadcg_In IfxEvadc_G11CH4_AN8_IN
Definition: IfxEvadc_PinMap.c:101
IfxPort_OutputIdx_alt3
Definition: IfxPort.h:131
IfxEvadc_G9CH15_P02_11_IN
IfxEvadc_Vadcg_In IfxEvadc_G9CH15_P02_11_IN
Definition: IfxEvadc_PinMap.c:185
IfxEvadc_G4CH5_P40_14_IN
IfxEvadc_Vadcg_In IfxEvadc_G4CH5_P40_14_IN
Definition: IfxEvadc_PinMap.c:136
IfxEvadc_G6CH4_AN60_IN
IfxEvadc_Vadcg_In IfxEvadc_G6CH4_AN60_IN
Definition: IfxEvadc_PinMap.c:151
IfxEvadc_G10CH8_P34_4_IN
IfxEvadc_Vadcg_In IfxEvadc_G10CH8_P34_4_IN
Definition: IfxEvadc_PinMap.c:89
IfxEvadc_G7CH3_P40_15_IN
IfxEvadc_Vadcg_In IfxEvadc_G7CH3_P40_15_IN
Definition: IfxEvadc_PinMap.c:158
IfxEvadc_G1CH3_AN11_IN
IfxEvadc_Vadcg_In IfxEvadc_G1CH3_AN11_IN
Definition: IfxEvadc_PinMap.c:110
IfxEvadc_G3CH4_P40_13_IN
IfxEvadc_Vadcg_In IfxEvadc_G3CH4_P40_13_IN
Definition: IfxEvadc_PinMap.c:127
IfxEvadc_G0CH4_AN4_IN
IfxEvadc_Vadcg_In IfxEvadc_G0CH4_AN4_IN
Definition: IfxEvadc_PinMap.c:75
IfxEvadc_GroupId_10
EVADC Group 10(Secondary Group 2)
Definition: IfxEvadc_cfg.h:146
IfxEvadc_EMUX01_P33_2_OUT
IfxEvadc_Emux_Out IfxEvadc_EMUX01_P33_2_OUT
Definition: IfxEvadc_PinMap.c:48
IfxEvadc_G2CH7_AN23_IN
IfxEvadc_Vadcg_In IfxEvadc_G2CH7_AN23_IN
Definition: IfxEvadc_PinMap.c:122
IfxEvadc_G0CH0_AN0_IN
IfxEvadc_Vadcg_In IfxEvadc_G0CH0_AN0_IN
Definition: IfxEvadc_PinMap.c:71
IfxEvadc_GroupId_13
EVADC group 13 (Fast compare channel 1)
Definition: IfxEvadc_cfg.h:149
IfxEvadc_Emux_Out
EVADC External Mux pin mapping structure.
Definition: IfxEvadc_PinMap.h:65
IfxEvadc_G4CH4_P40_13_IN
IfxEvadc_Vadcg_In IfxEvadc_G4CH4_P40_13_IN
Definition: IfxEvadc_PinMap.c:135
IfxEvadc_G10CH4_P33_3_IN
IfxEvadc_Vadcg_In IfxEvadc_G10CH4_P33_3_IN
Definition: IfxEvadc_PinMap.c:85
IfxEvadc_G8CH6_P40_8_IN
IfxEvadc_Vadcg_In IfxEvadc_G8CH6_P40_8_IN
Definition: IfxEvadc_PinMap.c:175
IfxEvadc_GroupId_1
EVADC Group 1(Primary Group 1)
Definition: IfxEvadc_cfg.h:137
IfxEvadc_G11CH9_P40_12_IN
IfxEvadc_Vadcg_In IfxEvadc_G11CH9_P40_12_IN
Definition: IfxEvadc_PinMap.c:106
IfxEvadc_G0CH3_AN3_IN
IfxEvadc_Vadcg_In IfxEvadc_G0CH3_AN3_IN
Definition: IfxEvadc_PinMap.c:74
IfxEvadc_G0CH7_AN7_IN
IfxEvadc_Vadcg_In IfxEvadc_G0CH7_AN7_IN
Definition: IfxEvadc_PinMap.c:78
IfxEvadc_G4CH6_AN30_IN
IfxEvadc_Vadcg_In IfxEvadc_G4CH6_AN30_IN
Definition: IfxEvadc_PinMap.c:137
IfxEvadc_GroupId_8
EVADC Group 8(Secondary Group 0)
Definition: IfxEvadc_cfg.h:144
IfxEvadc_G11CH10_P40_2_IN
IfxEvadc_Vadcg_In IfxEvadc_G11CH10_P40_2_IN
Definition: IfxEvadc_PinMap.c:92
IfxEvadc_G10CH11_P34_1_IN
IfxEvadc_Vadcg_In IfxEvadc_G10CH11_P34_1_IN
Definition: IfxEvadc_PinMap.c:81
IfxEvadc_EMUX01_P02_7_OUT
IfxEvadc_Emux_Out IfxEvadc_EMUX01_P02_7_OUT
Definition: IfxEvadc_PinMap.c:47
IfxEvadc_G11CH14_AN34_IN
IfxEvadc_Vadcg_In IfxEvadc_G11CH14_AN34_IN
Definition: IfxEvadc_PinMap.c:96
IfxEvadc_G5CH3_AN51_IN
IfxEvadc_Vadcg_In IfxEvadc_G5CH3_AN51_IN
Definition: IfxEvadc_PinMap.c:142
IfxEvadc_G11CH1_AN5_IN
IfxEvadc_Vadcg_In IfxEvadc_G11CH1_AN5_IN
Definition: IfxEvadc_PinMap.c:98
IfxEvadc_G5CH7_P41_5_IN
IfxEvadc_Vadcg_In IfxEvadc_G5CH7_P41_5_IN
Definition: IfxEvadc_PinMap.c:146
IfxEvadc_G11CH0_AN4_IN
IfxEvadc_Vadcg_In IfxEvadc_G11CH0_AN4_IN
Definition: IfxEvadc_PinMap.c:91
IfxEvadc_G7CH7_P41_3_IN
IfxEvadc_Vadcg_In IfxEvadc_G7CH7_P41_3_IN
Definition: IfxEvadc_PinMap.c:162
IfxEvadc_EMUX12_P00_8_OUT
IfxEvadc_Emux_Out IfxEvadc_EMUX12_P00_8_OUT
Definition: IfxEvadc_PinMap.c:55
IfxEvadc_G9CH12_P01_5_IN
IfxEvadc_Vadcg_In IfxEvadc_G9CH12_P01_5_IN
Definition: IfxEvadc_PinMap.c:182
IfxEvadc_FC3BFLOUT_P33_7_OUT
IfxEvadc_GxBfl_Out IfxEvadc_FC3BFLOUT_P33_7_OUT
Definition: IfxEvadc_PinMap.c:66
IfxEvadc_GroupId_12
EVADC group 12 (Fast compare channel 0)
Definition: IfxEvadc_cfg.h:148
IfxEvadc_G6CH2_AN58_IN
IfxEvadc_Vadcg_In IfxEvadc_G6CH2_AN58_IN
Definition: IfxEvadc_PinMap.c:149
IfxEvadc_FC3BFLOUT_P10_2_OUT
IfxEvadc_GxBfl_Out IfxEvadc_FC3BFLOUT_P10_2_OUT
Definition: IfxEvadc_PinMap.c:64
IfxEvadc_FC1BFLOUT_P10_1_OUT
IfxEvadc_GxBfl_Out IfxEvadc_FC1BFLOUT_P10_1_OUT
Definition: IfxEvadc_PinMap.c:59
IfxEvadc_FC1BFLOUT_P33_6_OUT
IfxEvadc_GxBfl_Out IfxEvadc_FC1BFLOUT_P33_6_OUT
Definition: IfxEvadc_PinMap.c:60
IfxEvadc_G11CH3_AN7_IN
IfxEvadc_Vadcg_In IfxEvadc_G11CH3_AN7_IN
Definition: IfxEvadc_PinMap.c:100
IfxEvadc_EMUX11_P00_7_OUT
IfxEvadc_Emux_Out IfxEvadc_EMUX11_P00_7_OUT
Definition: IfxEvadc_PinMap.c:53
IfxEvadc_G2CH2_P40_11_IN
IfxEvadc_Vadcg_In IfxEvadc_G2CH2_P40_11_IN
Definition: IfxEvadc_PinMap.c:117
IfxEvadc_G9CH9_P00_3_IN
IfxEvadc_Vadcg_In IfxEvadc_G9CH9_P00_3_IN
Definition: IfxEvadc_PinMap.c:194
IfxEvadc_G3CH3_P40_3_IN
IfxEvadc_Vadcg_In IfxEvadc_G3CH3_P40_3_IN
Definition: IfxEvadc_PinMap.c:126
IfxEvadc_G7CH4_P41_0_IN
IfxEvadc_Vadcg_In IfxEvadc_G7CH4_P41_0_IN
Definition: IfxEvadc_PinMap.c:159
IfxEvadc_G4CH0_AN40_IN
IfxEvadc_Vadcg_In IfxEvadc_G4CH0_AN40_IN
Definition: IfxEvadc_PinMap.c:131
IfxEvadc_G8CH13_AN45_IN
IfxEvadc_Vadcg_In IfxEvadc_G8CH13_AN45_IN
Definition: IfxEvadc_PinMap.c:167
IfxEvadc_G8CH12_AN44_IN
IfxEvadc_Vadcg_In IfxEvadc_G8CH12_AN44_IN
Definition: IfxEvadc_PinMap.c:166
IfxEvadc_GroupId_3
EVADC Group 3(Primary Group 3)
Definition: IfxEvadc_cfg.h:139
IFXEVADC_PINMAP_EMUX_OUT_NUM_ITEMS
#define IFXEVADC_PINMAP_EMUX_OUT_NUM_ITEMS
Definition: IfxEvadc_PinMap.h:235
IfxEvadc_G1CH1_AN9_IN
IfxEvadc_Vadcg_In IfxEvadc_G1CH1_AN9_IN
Definition: IfxEvadc_PinMap.c:108
IfxEvadc_FC1CH0_P40_10_IN
IfxEvadc_Vadcg_In IfxEvadc_FC1CH0_P40_10_IN
Definition: IfxEvadc_PinMap.c:68
IfxEvadc_G5CH5_AN53_IN
IfxEvadc_Vadcg_In IfxEvadc_G5CH5_AN53_IN
Definition: IfxEvadc_PinMap.c:144
IfxEvadc_G4CH7_AN31_IN
IfxEvadc_Vadcg_In IfxEvadc_G4CH7_AN31_IN
Definition: IfxEvadc_PinMap.c:138
IfxEvadc_G9CH5_P00_7_IN
IfxEvadc_Vadcg_In IfxEvadc_G9CH5_P00_7_IN
Definition: IfxEvadc_PinMap.c:190
IfxEvadc_G1CH5_AN13_IN
IfxEvadc_Vadcg_In IfxEvadc_G1CH5_AN13_IN
Definition: IfxEvadc_PinMap.c:112
IfxEvadc_G9CH14_P01_3_IN
IfxEvadc_Vadcg_In IfxEvadc_G9CH14_P01_3_IN
Definition: IfxEvadc_PinMap.c:184
IfxEvadc_G6CH6_P41_6_IN
IfxEvadc_Vadcg_In IfxEvadc_G6CH6_P41_6_IN
Definition: IfxEvadc_PinMap.c:153
IfxEvadc_G9CH4_P00_8_IN
IfxEvadc_Vadcg_In IfxEvadc_G9CH4_P00_8_IN
Definition: IfxEvadc_PinMap.c:189
IfxEvadc_G1CH7_AN15_IN
IfxEvadc_Vadcg_In IfxEvadc_G1CH7_AN15_IN
Definition: IfxEvadc_PinMap.c:114
IfxEvadc_FC2BFLOUT_P33_0_OUT
IfxEvadc_GxBfl_Out IfxEvadc_FC2BFLOUT_P33_0_OUT
Definition: IfxEvadc_PinMap.c:62
IfxEvadc_G0CH6_AN6_IN
IfxEvadc_Vadcg_In IfxEvadc_G0CH6_AN6_IN
Definition: IfxEvadc_PinMap.c:77
IfxEvadc_G8CH4_P40_6_IN
IfxEvadc_Vadcg_In IfxEvadc_G8CH4_P40_6_IN
Definition: IfxEvadc_PinMap.c:173
IfxEvadc_G11CH11_P40_3_IN
IfxEvadc_Vadcg_In IfxEvadc_G11CH11_P40_3_IN
Definition: IfxEvadc_PinMap.c:93
IfxEvadc_FC0BFLOUT_P33_4_OUT
IfxEvadc_GxBfl_Out IfxEvadc_FC0BFLOUT_P33_4_OUT
Definition: IfxEvadc_PinMap.c:58
IfxEvadc_G8CH10_AN42_IN
IfxEvadc_Vadcg_In IfxEvadc_G8CH10_AN42_IN
Definition: IfxEvadc_PinMap.c:164
IfxEvadc_G0CH5_AN5_IN
IfxEvadc_Vadcg_In IfxEvadc_G0CH5_AN5_IN
Definition: IfxEvadc_PinMap.c:76
IfxEvadc_GxBfl_Out_pinTable
const IfxEvadc_GxBfl_Out * IfxEvadc_GxBfl_Out_pinTable[IFXEVADC_PINMAP_NUM_MODULES][IFXEVADC_PINMAP_NUM_GROUPS][IFXEVADC_PINMAP_GXBFL_OUT_NUM_ITEMS]
Definition: IfxEvadc_PinMap.c:214
IfxEvadc_G1CH4_AN12_IN
IfxEvadc_Vadcg_In IfxEvadc_G1CH4_AN12_IN
Definition: IfxEvadc_PinMap.c:111
IFXEVADC_PINMAP_GXBFL_OUT_NUM_ITEMS
#define IFXEVADC_PINMAP_GXBFL_OUT_NUM_ITEMS
Definition: IfxEvadc_PinMap.h:236
IfxEvadc_G10CH1_P33_6_IN
IfxEvadc_Vadcg_In IfxEvadc_G10CH1_P33_6_IN
Definition: IfxEvadc_PinMap.c:82
IfxEvadc_Vadcg_In_pinTable
const IfxEvadc_Vadcg_In * IfxEvadc_Vadcg_In_pinTable[IFXEVADC_PINMAP_NUM_MODULES][IFXEVADC_PINMAP_NUM_GROUPS][IFXEVADC_PINMAP_VADCG_IN_NUM_ITEMS]
Definition: IfxEvadc_PinMap.c:299
IfxEvadc_G8CH1_P40_5_IN
IfxEvadc_Vadcg_In IfxEvadc_G8CH1_P40_5_IN
Definition: IfxEvadc_PinMap.c:170
IfxEvadc_G11CH6_AN10_IN
IfxEvadc_Vadcg_In IfxEvadc_G11CH6_AN10_IN
Definition: IfxEvadc_PinMap.c:103
IfxEvadc_G11CH2_AN6_IN
IfxEvadc_Vadcg_In IfxEvadc_G11CH2_AN6_IN
Definition: IfxEvadc_PinMap.c:99
IfxEvadc_G10CH6_P33_1_IN
IfxEvadc_Vadcg_In IfxEvadc_G10CH6_P33_1_IN
Definition: IfxEvadc_PinMap.c:87
IfxEvadc_GroupId_14
EVADC group 14 (Fast compare channel 2)
Definition: IfxEvadc_cfg.h:150
IfxEvadc_G11CH5_AN9_IN
IfxEvadc_Vadcg_In IfxEvadc_G11CH5_AN9_IN
Definition: IfxEvadc_PinMap.c:102
IfxEvadc_GroupId_15
EVADC group 15 (Fast compare channel 3)
Definition: IfxEvadc_cfg.h:151
IfxEvadc_G5CH2_AN50_IN
IfxEvadc_Vadcg_In IfxEvadc_G5CH2_AN50_IN
Definition: IfxEvadc_PinMap.c:141
IfxEvadc_G6CH5_AN61_IN
IfxEvadc_Vadcg_In IfxEvadc_G6CH5_AN61_IN
Definition: IfxEvadc_PinMap.c:152
IfxEvadc_FC3BFLOUT_P33_2_OUT
IfxEvadc_GxBfl_Out IfxEvadc_FC3BFLOUT_P33_2_OUT
Definition: IfxEvadc_PinMap.c:65
IfxPort_OutputIdx_alt5
Definition: IfxPort.h:133
IfxEvadc_EMUX10_P33_6_OUT
IfxEvadc_Emux_Out IfxEvadc_EMUX10_P33_6_OUT
Definition: IfxEvadc_PinMap.c:52
IfxEvadc_G2CH3_P40_12_IN
IfxEvadc_Vadcg_In IfxEvadc_G2CH3_P40_12_IN
Definition: IfxEvadc_PinMap.c:118
IfxEvadc_EMUX02_P02_8_OUT
IfxEvadc_Emux_Out IfxEvadc_EMUX02_P02_8_OUT
Definition: IfxEvadc_PinMap.c:49
IfxEvadc_GroupId_7
EVADC Group 7(Primary Group 7)
Definition: IfxEvadc_cfg.h:143
IfxEvadc_GroupId_0
EVADC Group 0(Primary Group 0)
Definition: IfxEvadc_cfg.h:136
IfxEvadc_GroupId_2
EVADC Group 2(Primary Group 2)
Definition: IfxEvadc_cfg.h:138
IfxEvadc_FC0CH0_AN16_IN
IfxEvadc_Vadcg_In IfxEvadc_FC0CH0_AN16_IN
Definition: IfxEvadc_PinMap.c:67
IfxEvadc_G7CH2_AN66_IN
IfxEvadc_Vadcg_In IfxEvadc_G7CH2_AN66_IN
Definition: IfxEvadc_PinMap.c:157
IfxEvadc_G11CH15_AN35_IN
IfxEvadc_Vadcg_In IfxEvadc_G11CH15_AN35_IN
Definition: IfxEvadc_PinMap.c:97
IfxEvadc_G7CH0_P41_8_IN
IfxEvadc_Vadcg_In IfxEvadc_G7CH0_P41_8_IN
Definition: IfxEvadc_PinMap.c:155
IfxEvadc_GxBfl_Out
EVADC Boundary Flag pin mapping structure.
Definition: IfxEvadc_PinMap.h:56
IfxEvadc_G10CH0_P33_7_IN
IfxEvadc_Vadcg_In IfxEvadc_G10CH0_P33_7_IN
Definition: IfxEvadc_PinMap.c:79
IfxEvadc_G9CH6_P00_6_IN
IfxEvadc_Vadcg_In IfxEvadc_G9CH6_P00_6_IN
Definition: IfxEvadc_PinMap.c:191
IfxEvadc_G0CH1_AN1_IN
IfxEvadc_Vadcg_In IfxEvadc_G0CH1_AN1_IN
Definition: IfxEvadc_PinMap.c:72
IfxEvadc_G9CH13_P01_4_IN
IfxEvadc_Vadcg_In IfxEvadc_G9CH13_P01_4_IN
Definition: IfxEvadc_PinMap.c:183
IfxEvadc_G6CH3_AN59_IN
IfxEvadc_Vadcg_In IfxEvadc_G6CH3_AN59_IN
Definition: IfxEvadc_PinMap.c:150
IfxEvadc_FC0BFLOUT_P00_5_OUT
IfxEvadc_GxBfl_Out IfxEvadc_FC0BFLOUT_P00_5_OUT
Definition: IfxEvadc_PinMap.c:57
IfxEvadc_G10CH2_P33_5_IN
IfxEvadc_Vadcg_In IfxEvadc_G10CH2_P33_5_IN
Definition: IfxEvadc_PinMap.c:83
IfxEvadc_G5CH6_P41_4_IN
IfxEvadc_Vadcg_In IfxEvadc_G5CH6_P41_4_IN
Definition: IfxEvadc_PinMap.c:145
IfxEvadc_GroupId_9
EVADC Group 9(Secondary Group 1)
Definition: IfxEvadc_cfg.h:145
IfxEvadc_G1CH2_AN10_IN
IfxEvadc_Vadcg_In IfxEvadc_G1CH2_AN10_IN
Definition: IfxEvadc_PinMap.c:109


iLLD_TC38A: IfxEvadc_PinMap.h Source File

  • _PinMap
IfxEvadc_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxEvadc_PinMap.h
3 * \brief EVADC I/O map
4 * \ingroup IfxLld_Evadc
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Evadc_pinmap EVADC Pin Mapping
42 * \ingroup IfxLld_Evadc
43 */
44
45 #ifndef IFXEVADC_PINMAP_H
46 #define IFXEVADC_PINMAP_H
47
48 #include <IfxEvadc_reg.h>
49 #include <_Impl/IfxEvadc_cfg.h>
50 #include <Port/Std/IfxPort.h>
51
52 /** \addtogroup IfxLld_Evadc_pinmap
53 * \{ */
54
55 /** \brief EVADC Boundary Flag pin mapping structure */
56 typedef const struct
57 {
58 Ifx_EVADC* module; /**< \brief Base address */
59 IfxEvadc_GroupId groupId; /**< \brief Group ID */
60 IfxPort_Pin pin; /**< \brief Port pin */
61 IfxPort_OutputIdx select; /**< \brief Port control code */
62 } IfxEvadc_GxBfl_Out;
63
64 /** \brief EVADC External Mux pin mapping structure */
65 typedef const struct
66 {
67 Ifx_EVADC* module; /**< \brief Base address */
68 IfxPort_Pin pin; /**< \brief Port pin */
69 IfxPort_OutputIdx select; /**< \brief Port control code */
70 } IfxEvadc_Emux_Out;
71
72 /** \brief EVADC Analog Input */
73 typedef const struct
74 {
75 Ifx_EVADC* module; /**< \brief Base address */
76 IfxEvadc_GroupId groupId; /**< \brief Group ID */
77 IfxPort_Pin pin; /**< \brief Port pin */
78 uint8 channelId; /**< \brief Channel ID */
79 } IfxEvadc_Vadcg_In;
80
81 IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX00_P02_6_OUT; /**< \brief Control of external analog multiplexer interface 0 */
82 IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX00_P33_3_OUT; /**< \brief Control of external analog multiplexer interface 0 */
83 IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX01_P02_7_OUT; /**< \brief Control of external analog multiplexer interface 0 */
84 IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX01_P33_2_OUT; /**< \brief Control of external analog multiplexer interface 0 */
85 IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX02_P02_8_OUT; /**< \brief Control of external analog multiplexer interface 0 */
86 IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX02_P33_1_OUT; /**< \brief Control of external analog multiplexer interface 0 */
87 IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX10_P00_6_OUT; /**< \brief Control of external analog multiplexer interface 1 */
88 IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX10_P33_6_OUT; /**< \brief Control of external analog multiplexer interface 1 */
89 IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX11_P00_7_OUT; /**< \brief Control of external analog multiplexer interface 1 */
90 IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX11_P33_5_OUT; /**< \brief Control of external analog multiplexer interface 1 */
91 IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX12_P00_8_OUT; /**< \brief Control of external analog multiplexer interface 1 */
92 IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX12_P33_4_OUT; /**< \brief Control of external analog multiplexer interface 1 */
93 IFX_EXTERN IfxEvadc_GxBfl_Out IfxEvadc_FC0BFLOUT_P00_5_OUT; /**< \brief Boundary flag output, FC channel 0 */
94 IFX_EXTERN IfxEvadc_GxBfl_Out IfxEvadc_FC0BFLOUT_P33_4_OUT; /**< \brief Boundary flag output, FC channel 0 */
95 IFX_EXTERN IfxEvadc_GxBfl_Out IfxEvadc_FC1BFLOUT_P10_1_OUT; /**< \brief Boundary flag output, FC channel 1 */
96 IFX_EXTERN IfxEvadc_GxBfl_Out IfxEvadc_FC1BFLOUT_P33_6_OUT; /**< \brief Boundary flag output, FC channel 1 */
97 IFX_EXTERN IfxEvadc_GxBfl_Out IfxEvadc_FC2BFLOUT_P00_7_OUT; /**< \brief Boundary flag output, FC channel 2 */
98 IFX_EXTERN IfxEvadc_GxBfl_Out IfxEvadc_FC2BFLOUT_P33_0_OUT; /**< \brief Boundary flag output, FC channel 2 */
99 IFX_EXTERN IfxEvadc_GxBfl_Out IfxEvadc_FC2BFLOUT_P33_5_OUT; /**< \brief Boundary flag output, FC channel 2 */
100 IFX_EXTERN IfxEvadc_GxBfl_Out IfxEvadc_FC3BFLOUT_P10_2_OUT; /**< \brief Boundary flag output, FC channel 3 */
101 IFX_EXTERN IfxEvadc_GxBfl_Out IfxEvadc_FC3BFLOUT_P33_2_OUT; /**< \brief Boundary flag output, FC channel 3 */
102 IFX_EXTERN IfxEvadc_GxBfl_Out IfxEvadc_FC3BFLOUT_P33_7_OUT; /**< \brief Boundary flag output, FC channel 3 */
103 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_FC0CH0_AN16_IN; /**< \brief Analog input FC channel 0 */
104 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_FC1CH0_P40_10_IN; /**< \brief Analog input FC channel 1 */
105 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_FC2CH0_P00_12_IN; /**< \brief Analog input FC channel 2 */
106 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_FC3CH0_P00_11_IN; /**< \brief Analog input FC channel 3 */
107 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G0CH0_AN0_IN; /**< \brief Analog input channel 0, group 0 */
108 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G0CH1_AN1_IN; /**< \brief Analog input channel 1, group 0 */
109 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G0CH2_AN2_IN; /**< \brief Analog input channel 2, group 0 */
110 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G0CH3_AN3_IN; /**< \brief Analog input channel 3, group 0 */
111 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G0CH4_AN4_IN; /**< \brief Analog input channel 4, group 0 */
112 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G0CH5_AN5_IN; /**< \brief Analog input channel 5, group 0 */
113 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G0CH6_AN6_IN; /**< \brief Analog input channel 6, group 0 */
114 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G0CH7_AN7_IN; /**< \brief Analog input channel 7, group 0 */
115 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH0_P33_7_IN; /**< \brief Analog input channel 0, group 10 */
116 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH10_P34_2_IN; /**< \brief Analog input channel 10, group 10 */
117 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH11_P34_1_IN; /**< \brief Analog input channel 11, group 10 */
118 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH1_P33_6_IN; /**< \brief Analog input channel 1, group 10 */
119 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH2_P33_5_IN; /**< \brief Analog input channel 2, group 10 */
120 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH3_P33_4_IN; /**< \brief Analog input channel 3, group 10 */
121 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH4_P33_3_IN; /**< \brief Analog input channel 4, group 10 */
122 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH5_P33_2_IN; /**< \brief Analog input channel 5, group 10 */
123 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH6_P33_1_IN; /**< \brief Analog input channel 6, group 10 */
124 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH7_P33_0_IN; /**< \brief Analog input channel 7, group 10 */
125 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH8_P34_4_IN; /**< \brief Analog input channel 8, group 10 */
126 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH9_P34_3_IN; /**< \brief Analog input channel 9, group 10 */
127 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH0_AN4_IN; /**< \brief Analog input channel 0, group 11 */
128 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH10_P40_2_IN; /**< \brief Analog input channel 10, group 11 */
129 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH11_P40_3_IN; /**< \brief Analog input channel 11, group 11 */
130 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH12_P40_4_IN; /**< \brief Analog input channel 12, group 11 */
131 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH13_P40_5_IN; /**< \brief Analog input channel 13, group 11 */
132 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH14_AN34_IN; /**< \brief Analog input channel 14, group 11 */
133 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH15_AN35_IN; /**< \brief Analog input channel 15, group 11 */
134 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH1_AN5_IN; /**< \brief Analog input channel 1, group 11 */
135 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH2_AN6_IN; /**< \brief Analog input channel 2, group 11 */
136 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH3_AN7_IN; /**< \brief Analog input channel 3, group 11 */
137 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH4_AN8_IN; /**< \brief Analog input channel 4, group 11 */
138 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH5_AN9_IN; /**< \brief Analog input channel 5, group 11 */
139 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH6_AN10_IN; /**< \brief Analog input channel 6, group 11 */
140 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH7_AN11_IN; /**< \brief Analog input channel 7, group 11 */
141 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH8_P40_11_IN; /**< \brief Analog input channel 8, group 11 */
142 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH9_P40_12_IN; /**< \brief Analog input channel 9, group 11 */
143 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G1CH0_AN8_IN; /**< \brief Analog input channel 0, group 1 */
144 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G1CH1_AN9_IN; /**< \brief Analog input channel 1, group 1 */
145 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G1CH2_AN10_IN; /**< \brief Analog input channel 2, group 1 */
146 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G1CH3_AN11_IN; /**< \brief Analog input channel 3, group 1 */
147 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G1CH4_AN12_IN; /**< \brief Analog input channel 4, group 1 */
148 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G1CH5_AN13_IN; /**< \brief Analog input channel 5, group 1 */
149 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G1CH6_AN14_IN; /**< \brief Analog input channel 6, group 1 */
150 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G1CH7_AN15_IN; /**< \brief Analog input channel 7, group 1 */
151 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G2CH0_AN16_IN; /**< \brief Analog input channel 0, group 2 */
152 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G2CH1_P40_10_IN; /**< \brief Analog input channel 1, group 2 */
153 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G2CH2_P40_11_IN; /**< \brief Analog input channel 2, group 2 */
154 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G2CH3_P40_12_IN; /**< \brief Analog input channel 3, group 2 */
155 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G2CH4_AN20_IN; /**< \brief Analog input channel 4, group 2 */
156 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G2CH5_AN21_IN; /**< \brief Analog input channel 5, group 2 */
157 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G2CH6_AN22_IN; /**< \brief Analog input channel 6, group 2 */
158 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G2CH7_AN23_IN; /**< \brief Analog input channel 7, group 2 */
159 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G3CH0_P40_0_IN; /**< \brief Analog input channel 0, group 3 */
160 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G3CH1_P40_1_IN; /**< \brief Analog input channel 1, group 3 */
161 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G3CH2_P40_2_IN; /**< \brief Analog input channel 2, group 3 */
162 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G3CH3_P40_3_IN; /**< \brief Analog input channel 3, group 3 */
163 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G3CH4_P40_13_IN; /**< \brief Analog input channel 4, group 3 */
164 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G3CH5_P40_14_IN; /**< \brief Analog input channel 5, group 3 */
165 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G3CH6_AN30_IN; /**< \brief Analog input channel 6, group 3 */
166 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G3CH7_AN31_IN; /**< \brief Analog input channel 7, group 3 */
167 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G4CH0_AN40_IN; /**< \brief Analog input channel 0, group 4 */
168 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G4CH1_AN41_IN; /**< \brief Analog input channel 1, group 4 */
169 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G4CH2_AN42_IN; /**< \brief Analog input channel 2, group 4 */
170 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G4CH3_AN43_IN; /**< \brief Analog input channel 3, group 4 */
171 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G4CH4_P40_13_IN; /**< \brief Analog input channel 4, group 4 */
172 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G4CH5_P40_14_IN; /**< \brief Analog input channel 5, group 4 */
173 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G4CH6_AN30_IN; /**< \brief Analog input channel 6, group 4 */
174 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G4CH7_AN31_IN; /**< \brief Analog input channel 7, group 4 */
175 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G5CH0_AN48_IN; /**< \brief Analog input channel 0, group 5 */
176 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G5CH1_AN49_IN; /**< \brief Analog input channel 1, group 5 */
177 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G5CH2_AN50_IN; /**< \brief Analog input channel 2, group 5 */
178 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G5CH3_AN51_IN; /**< \brief Analog input channel 3, group 5 */
179 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G5CH4_AN52_IN; /**< \brief Analog input channel 4, group 5 */
180 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G5CH5_AN53_IN; /**< \brief Analog input channel 5, group 5 */
181 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G5CH6_P41_4_IN; /**< \brief Analog input channel 6, group 5 */
182 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G5CH7_P41_5_IN; /**< \brief Analog input channel 7, group 5 */
183 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G6CH0_AN56_IN; /**< \brief Analog input channel 0, group 6 */
184 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G6CH1_AN57_IN; /**< \brief Analog input channel 1, group 6 */
185 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G6CH2_AN58_IN; /**< \brief Analog input channel 2, group 6 */
186 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G6CH3_AN59_IN; /**< \brief Analog input channel 3, group 6 */
187 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G6CH4_AN60_IN; /**< \brief Analog input channel 4, group 6 */
188 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G6CH5_AN61_IN; /**< \brief Analog input channel 5, group 6 */
189 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G6CH6_P41_6_IN; /**< \brief Analog input channel 6, group 6 */
190 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G6CH7_P41_7_IN; /**< \brief Analog input channel 7, group 6 */
191 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G7CH0_P41_8_IN; /**< \brief Analog input channel 0, group 7 */
192 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G7CH1_AN65_IN; /**< \brief Analog input channel 1, group 7 */
193 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G7CH2_AN66_IN; /**< \brief Analog input channel 2, group 7 */
194 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G7CH3_P40_15_IN; /**< \brief Analog input channel 3, group 7 */
195 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G7CH4_P41_0_IN; /**< \brief Analog input channel 4, group 7 */
196 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G7CH5_P41_1_IN; /**< \brief Analog input channel 5, group 7 */
197 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G7CH6_P41_2_IN; /**< \brief Analog input channel 6, group 7 */
198 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G7CH7_P41_3_IN; /**< \brief Analog input channel 7, group 7 */
199 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH0_P40_4_IN; /**< \brief Analog input channel 0, group 8 */
200 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH10_AN42_IN; /**< \brief Analog input channel 10, group 8 */
201 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH11_AN43_IN; /**< \brief Analog input channel 11, group 8 */
202 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH12_AN44_IN; /**< \brief Analog input channel 12, group 8 */
203 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH13_AN45_IN; /**< \brief Analog input channel 13, group 8 */
204 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH14_AN46_IN; /**< \brief Analog input channel 14, group 8 */
205 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH15_AN47_IN; /**< \brief Analog input channel 15, group 8 */
206 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH1_P40_5_IN; /**< \brief Analog input channel 1, group 8 */
207 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH2_AN34_IN; /**< \brief Analog input channel 2, group 8 */
208 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH3_AN35_IN; /**< \brief Analog input channel 3, group 8 */
209 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH4_P40_6_IN; /**< \brief Analog input channel 4, group 8 */
210 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH5_P40_7_IN; /**< \brief Analog input channel 5, group 8 */
211 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH6_P40_8_IN; /**< \brief Analog input channel 6, group 8 */
212 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH7_P40_9_IN; /**< \brief Analog input channel 7, group 8 */
213 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH8_AN40_IN; /**< \brief Analog input channel 8, group 8 */
214 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH9_AN41_IN; /**< \brief Analog input channel 9, group 8 */
215 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH0_P00_12_IN; /**< \brief Analog input channel 0, group 9 */
216 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH10_P00_2_IN; /**< \brief Analog input channel 10, group 9 */
217 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH11_P00_1_IN; /**< \brief Analog input channel 11, group 9 */
218 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH12_P01_5_IN; /**< \brief Analog input channel 12, group 9 */
219 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH13_P01_4_IN; /**< \brief Analog input channel 13, group 9 */
220 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH14_P01_3_IN; /**< \brief Analog input channel 14, group 9 */
221 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH15_P02_11_IN; /**< \brief Analog input channel 15, group 9 */
222 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH1_P00_11_IN; /**< \brief Analog input channel 1, group 9 */
223 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH2_P00_10_IN; /**< \brief Analog input channel 2, group 9 */
224 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH3_P00_9_IN; /**< \brief Analog input channel 3, group 9 */
225 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH4_P00_8_IN; /**< \brief Analog input channel 4, group 9 */
226 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH5_P00_7_IN; /**< \brief Analog input channel 5, group 9 */
227 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH6_P00_6_IN; /**< \brief Analog input channel 6, group 9 */
228 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH7_P00_5_IN; /**< \brief Analog input channel 7, group 9 */
229 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH8_P00_4_IN; /**< \brief Analog input channel 8, group 9 */
230 IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH9_P00_3_IN; /**< \brief Analog input channel 9, group 9 */
231
232 /** \brief Table dimensions */
233 #define IFXEVADC_PINMAP_NUM_MODULES 1
234 #define IFXEVADC_PINMAP_NUM_GROUPS 16
235 #define IFXEVADC_PINMAP_EMUX_OUT_NUM_ITEMS 12
236 #define IFXEVADC_PINMAP_GXBFL_OUT_NUM_ITEMS 3
237 #define IFXEVADC_PINMAP_VADCG_IN_NUM_ITEMS 16
238
239
240 /** \brief IfxEvadc_Emux_Out table */
241 IFX_EXTERN const IfxEvadc_Emux_Out *IfxEvadc_Emux_Out_pinTable[IFXEVADC_PINMAP_NUM_MODULES][IFXEVADC_PINMAP_EMUX_OUT_NUM_ITEMS];
242
243 /** \brief IfxEvadc_GxBfl_Out table */
244 IFX_EXTERN const IfxEvadc_GxBfl_Out *IfxEvadc_GxBfl_Out_pinTable[IFXEVADC_PINMAP_NUM_MODULES][IFXEVADC_PINMAP_NUM_GROUPS][IFXEVADC_PINMAP_GXBFL_OUT_NUM_ITEMS];
245
246 /** \brief IfxEvadc_Vadcg_In table */
247 IFX_EXTERN const IfxEvadc_Vadcg_In *IfxEvadc_Vadcg_In_pinTable[IFXEVADC_PINMAP_NUM_MODULES][IFXEVADC_PINMAP_NUM_GROUPS][IFXEVADC_PINMAP_VADCG_IN_NUM_ITEMS];
248
249 /** \} */
250
251 #endif /* IFXEVADC_PINMAP_H */
IfxEvadc_EMUX12_P33_4_OUT
IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX12_P33_4_OUT
Control of external analog multiplexer interface 1.
Definition: IfxEvadc_PinMap.h:92
IfxEvadc_Vadcg_In
EVADC Analog Input.
Definition: IfxEvadc_PinMap.h:73
IfxEvadc_EMUX11_P33_5_OUT
IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX11_P33_5_OUT
Control of external analog multiplexer interface 1.
Definition: IfxEvadc_PinMap.h:90
IfxEvadc_G7CH2_AN66_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G7CH2_AN66_IN
Analog input channel 2, group 7.
Definition: IfxEvadc_PinMap.h:193
IfxEvadc_G11CH13_P40_5_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH13_P40_5_IN
Analog input channel 13, group 11.
Definition: IfxEvadc_PinMap.h:131
IFXEVADC_PINMAP_NUM_GROUPS
#define IFXEVADC_PINMAP_NUM_GROUPS
Definition: IfxEvadc_PinMap.h:234
IfxEvadc_G0CH1_AN1_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G0CH1_AN1_IN
Analog input channel 1, group 0.
Definition: IfxEvadc_PinMap.h:108
IfxEvadc_G8CH4_P40_6_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH4_P40_6_IN
Analog input channel 4, group 8.
Definition: IfxEvadc_PinMap.h:209
IfxEvadc_G6CH7_P41_7_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G6CH7_P41_7_IN
Analog input channel 7, group 6.
Definition: IfxEvadc_PinMap.h:190
IfxEvadc_G11CH10_P40_2_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH10_P40_2_IN
Analog input channel 10, group 11.
Definition: IfxEvadc_PinMap.h:128
IfxEvadc_G1CH3_AN11_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G1CH3_AN11_IN
Analog input channel 3, group 1.
Definition: IfxEvadc_PinMap.h:146
IfxEvadc_G9CH12_P01_5_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH12_P01_5_IN
Analog input channel 12, group 9.
Definition: IfxEvadc_PinMap.h:218
IfxEvadc_G10CH3_P33_4_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH3_P33_4_IN
Analog input channel 3, group 10.
Definition: IfxEvadc_PinMap.h:120
IfxEvadc_G10CH4_P33_3_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH4_P33_3_IN
Analog input channel 4, group 10.
Definition: IfxEvadc_PinMap.h:121
IFXEVADC_PINMAP_VADCG_IN_NUM_ITEMS
#define IFXEVADC_PINMAP_VADCG_IN_NUM_ITEMS
Definition: IfxEvadc_PinMap.h:237
IfxEvadc_G8CH3_AN35_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH3_AN35_IN
Analog input channel 3, group 8.
Definition: IfxEvadc_PinMap.h:208
IfxEvadc_G8CH6_P40_8_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH6_P40_8_IN
Analog input channel 6, group 8.
Definition: IfxEvadc_PinMap.h:211
IfxEvadc_EMUX02_P02_8_OUT
IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX02_P02_8_OUT
Control of external analog multiplexer interface 0.
Definition: IfxEvadc_PinMap.h:85
IFXEVADC_PINMAP_NUM_MODULES
#define IFXEVADC_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxEvadc_PinMap.h:233
IfxEvadc_G8CH10_AN42_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH10_AN42_IN
Analog input channel 10, group 8.
Definition: IfxEvadc_PinMap.h:200
IfxEvadc_G0CH7_AN7_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G0CH7_AN7_IN
Analog input channel 7, group 0.
Definition: IfxEvadc_PinMap.h:114
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:126
IfxEvadc_G6CH5_AN61_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G6CH5_AN61_IN
Analog input channel 5, group 6.
Definition: IfxEvadc_PinMap.h:188
IfxEvadc_G8CH9_AN41_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH9_AN41_IN
Analog input channel 9, group 8.
Definition: IfxEvadc_PinMap.h:214
IfxEvadc_G4CH2_AN42_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G4CH2_AN42_IN
Analog input channel 2, group 4.
Definition: IfxEvadc_PinMap.h:169
IfxEvadc_G11CH4_AN8_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH4_AN8_IN
Analog input channel 4, group 11.
Definition: IfxEvadc_PinMap.h:137
IfxEvadc_EMUX00_P02_6_OUT
IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX00_P02_6_OUT
Control of external analog multiplexer interface 0.
Definition: IfxEvadc_PinMap.h:81
IfxEvadc_G8CH7_P40_9_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH7_P40_9_IN
Analog input channel 7, group 8.
Definition: IfxEvadc_PinMap.h:212
IfxEvadc_G2CH6_AN22_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G2CH6_AN22_IN
Analog input channel 6, group 2.
Definition: IfxEvadc_PinMap.h:157
IfxEvadc_G8CH15_AN47_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH15_AN47_IN
Analog input channel 15, group 8.
Definition: IfxEvadc_PinMap.h:205
IfxEvadc_FC1BFLOUT_P33_6_OUT
IFX_EXTERN IfxEvadc_GxBfl_Out IfxEvadc_FC1BFLOUT_P33_6_OUT
Boundary flag output, FC channel 1.
Definition: IfxEvadc_PinMap.h:96
IfxEvadc_G6CH1_AN57_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G6CH1_AN57_IN
Analog input channel 1, group 6.
Definition: IfxEvadc_PinMap.h:184
IfxEvadc_FC2BFLOUT_P00_7_OUT
IFX_EXTERN IfxEvadc_GxBfl_Out IfxEvadc_FC2BFLOUT_P00_7_OUT
Boundary flag output, FC channel 2.
Definition: IfxEvadc_PinMap.h:97
IfxEvadc_G4CH6_AN30_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G4CH6_AN30_IN
Analog input channel 6, group 4.
Definition: IfxEvadc_PinMap.h:173
IfxEvadc_G9CH7_P00_5_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH7_P00_5_IN
Analog input channel 7, group 9.
Definition: IfxEvadc_PinMap.h:228
IfxEvadc_G8CH13_AN45_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH13_AN45_IN
Analog input channel 13, group 8.
Definition: IfxEvadc_PinMap.h:203
IfxEvadc_G1CH4_AN12_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G1CH4_AN12_IN
Analog input channel 4, group 1.
Definition: IfxEvadc_PinMap.h:147
IfxEvadc_G3CH5_P40_14_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G3CH5_P40_14_IN
Analog input channel 5, group 3.
Definition: IfxEvadc_PinMap.h:164
IfxEvadc_EMUX02_P33_1_OUT
IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX02_P33_1_OUT
Control of external analog multiplexer interface 0.
Definition: IfxEvadc_PinMap.h:86
IfxEvadc_G10CH6_P33_1_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH6_P33_1_IN
Analog input channel 6, group 10.
Definition: IfxEvadc_PinMap.h:123
IfxEvadc_G7CH5_P41_1_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G7CH5_P41_1_IN
Analog input channel 5, group 7.
Definition: IfxEvadc_PinMap.h:196
IfxEvadc_G9CH4_P00_8_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH4_P00_8_IN
Analog input channel 4, group 9.
Definition: IfxEvadc_PinMap.h:225
IfxEvadc_FC0BFLOUT_P00_5_OUT
IFX_EXTERN IfxEvadc_GxBfl_Out IfxEvadc_FC0BFLOUT_P00_5_OUT
Boundary flag output, FC channel 0.
Definition: IfxEvadc_PinMap.h:93
IfxEvadc_G5CH4_AN52_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G5CH4_AN52_IN
Analog input channel 4, group 5.
Definition: IfxEvadc_PinMap.h:179
IfxEvadc_G1CH7_AN15_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G1CH7_AN15_IN
Analog input channel 7, group 1.
Definition: IfxEvadc_PinMap.h:150
IfxEvadc_G2CH3_P40_12_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G2CH3_P40_12_IN
Analog input channel 3, group 2.
Definition: IfxEvadc_PinMap.h:154
IfxEvadc_G3CH6_AN30_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G3CH6_AN30_IN
Analog input channel 6, group 3.
Definition: IfxEvadc_PinMap.h:165
IfxEvadc_G6CH4_AN60_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G6CH4_AN60_IN
Analog input channel 4, group 6.
Definition: IfxEvadc_PinMap.h:187
IfxEvadc_G5CH3_AN51_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G5CH3_AN51_IN
Analog input channel 3, group 5.
Definition: IfxEvadc_PinMap.h:178
IfxEvadc_G10CH10_P34_2_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH10_P34_2_IN
Analog input channel 10, group 10.
Definition: IfxEvadc_PinMap.h:116
IfxEvadc_G3CH0_P40_0_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G3CH0_P40_0_IN
Analog input channel 0, group 3.
Definition: IfxEvadc_PinMap.h:159
IfxEvadc_G11CH2_AN6_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH2_AN6_IN
Analog input channel 2, group 11.
Definition: IfxEvadc_PinMap.h:135
IfxEvadc_FC2BFLOUT_P33_0_OUT
IFX_EXTERN IfxEvadc_GxBfl_Out IfxEvadc_FC2BFLOUT_P33_0_OUT
Boundary flag output, FC channel 2.
Definition: IfxEvadc_PinMap.h:98
IfxEvadc_G9CH6_P00_6_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH6_P00_6_IN
Analog input channel 6, group 9.
Definition: IfxEvadc_PinMap.h:227
IfxEvadc_G7CH0_P41_8_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G7CH0_P41_8_IN
Analog input channel 0, group 7.
Definition: IfxEvadc_PinMap.h:191
IfxEvadc_GxBfl_Out_pinTable
IFX_EXTERN const IfxEvadc_GxBfl_Out * IfxEvadc_GxBfl_Out_pinTable[IFXEVADC_PINMAP_NUM_MODULES][IFXEVADC_PINMAP_NUM_GROUPS][IFXEVADC_PINMAP_GXBFL_OUT_NUM_ITEMS]
IfxEvadc_GxBfl_Out table.
Definition: IfxEvadc_PinMap.h:244
IfxEvadc_G11CH11_P40_3_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH11_P40_3_IN
Analog input channel 11, group 11.
Definition: IfxEvadc_PinMap.h:129
IfxEvadc_G4CH0_AN40_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G4CH0_AN40_IN
Analog input channel 0, group 4.
Definition: IfxEvadc_PinMap.h:167
IfxEvadc_G2CH7_AN23_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G2CH7_AN23_IN
Analog input channel 7, group 2.
Definition: IfxEvadc_PinMap.h:158
IfxEvadc_cfg.h
EVADC on-chip implementation data.
IfxEvadc_G11CH5_AN9_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH5_AN9_IN
Analog input channel 5, group 11.
Definition: IfxEvadc_PinMap.h:138
IfxEvadc_G10CH9_P34_3_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH9_P34_3_IN
Analog input channel 9, group 10.
Definition: IfxEvadc_PinMap.h:126
IfxEvadc_FC3BFLOUT_P33_2_OUT
IFX_EXTERN IfxEvadc_GxBfl_Out IfxEvadc_FC3BFLOUT_P33_2_OUT
Boundary flag output, FC channel 3.
Definition: IfxEvadc_PinMap.h:101
IfxEvadc_FC0BFLOUT_P33_4_OUT
IFX_EXTERN IfxEvadc_GxBfl_Out IfxEvadc_FC0BFLOUT_P33_4_OUT
Boundary flag output, FC channel 0.
Definition: IfxEvadc_PinMap.h:94
IfxEvadc_GxBfl_Out::module
Ifx_EVADC * module
Base address.
Definition: IfxEvadc_PinMap.h:58
IfxEvadc_G0CH4_AN4_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G0CH4_AN4_IN
Analog input channel 4, group 0.
Definition: IfxEvadc_PinMap.h:111
IfxEvadc_G6CH2_AN58_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G6CH2_AN58_IN
Analog input channel 2, group 6.
Definition: IfxEvadc_PinMap.h:185
IfxEvadc_G0CH3_AN3_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G0CH3_AN3_IN
Analog input channel 3, group 0.
Definition: IfxEvadc_PinMap.h:110
IfxEvadc_G3CH4_P40_13_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G3CH4_P40_13_IN
Analog input channel 4, group 3.
Definition: IfxEvadc_PinMap.h:163
IfxEvadc_G7CH1_AN65_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G7CH1_AN65_IN
Analog input channel 1, group 7.
Definition: IfxEvadc_PinMap.h:192
IfxEvadc_G10CH11_P34_1_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH11_P34_1_IN
Analog input channel 11, group 10.
Definition: IfxEvadc_PinMap.h:117
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxEvadc_FC3BFLOUT_P33_7_OUT
IFX_EXTERN IfxEvadc_GxBfl_Out IfxEvadc_FC3BFLOUT_P33_7_OUT
Boundary flag output, FC channel 3.
Definition: IfxEvadc_PinMap.h:102
IfxEvadc_G9CH0_P00_12_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH0_P00_12_IN
Analog input channel 0, group 9.
Definition: IfxEvadc_PinMap.h:215
IfxEvadc_G4CH4_P40_13_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G4CH4_P40_13_IN
Analog input channel 4, group 4.
Definition: IfxEvadc_PinMap.h:171
IfxEvadc_G11CH7_AN11_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH7_AN11_IN
Analog input channel 7, group 11.
Definition: IfxEvadc_PinMap.h:140
IfxEvadc_G11CH14_AN34_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH14_AN34_IN
Analog input channel 14, group 11.
Definition: IfxEvadc_PinMap.h:132
IfxEvadc_G11CH12_P40_4_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH12_P40_4_IN
Analog input channel 12, group 11.
Definition: IfxEvadc_PinMap.h:130
IfxEvadc_FC1BFLOUT_P10_1_OUT
IFX_EXTERN IfxEvadc_GxBfl_Out IfxEvadc_FC1BFLOUT_P10_1_OUT
Boundary flag output, FC channel 1.
Definition: IfxEvadc_PinMap.h:95
IfxEvadc_G8CH8_AN40_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH8_AN40_IN
Analog input channel 8, group 8.
Definition: IfxEvadc_PinMap.h:213
IfxEvadc_GxBfl_Out::pin
IfxPort_Pin pin
Port pin.
Definition: IfxEvadc_PinMap.h:60
IfxEvadc_G9CH10_P00_2_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH10_P00_2_IN
Analog input channel 10, group 9.
Definition: IfxEvadc_PinMap.h:216
IfxEvadc_FC0CH0_AN16_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_FC0CH0_AN16_IN
Analog input FC channel 0.
Definition: IfxEvadc_PinMap.h:103
IfxEvadc_G4CH5_P40_14_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G4CH5_P40_14_IN
Analog input channel 5, group 4.
Definition: IfxEvadc_PinMap.h:172
IfxEvadc_G0CH2_AN2_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G0CH2_AN2_IN
Analog input channel 2, group 0.
Definition: IfxEvadc_PinMap.h:109
IfxEvadc_G6CH3_AN59_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G6CH3_AN59_IN
Analog input channel 3, group 6.
Definition: IfxEvadc_PinMap.h:186
IfxEvadc_G10CH0_P33_7_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH0_P33_7_IN
Analog input channel 0, group 10.
Definition: IfxEvadc_PinMap.h:115
IfxEvadc_Emux_Out
EVADC External Mux pin mapping structure.
Definition: IfxEvadc_PinMap.h:65
IfxEvadc_G9CH15_P02_11_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH15_P02_11_IN
Analog input channel 15, group 9.
Definition: IfxEvadc_PinMap.h:221
IfxEvadc_G7CH6_P41_2_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G7CH6_P41_2_IN
Analog input channel 6, group 7.
Definition: IfxEvadc_PinMap.h:197
IfxEvadc_FC2BFLOUT_P33_5_OUT
IFX_EXTERN IfxEvadc_GxBfl_Out IfxEvadc_FC2BFLOUT_P33_5_OUT
Boundary flag output, FC channel 2.
Definition: IfxEvadc_PinMap.h:99
IfxEvadc_G3CH7_AN31_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G3CH7_AN31_IN
Analog input channel 7, group 3.
Definition: IfxEvadc_PinMap.h:166
IfxEvadc_G6CH6_P41_6_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G6CH6_P41_6_IN
Analog input channel 6, group 6.
Definition: IfxEvadc_PinMap.h:189
IfxEvadc_G9CH2_P00_10_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH2_P00_10_IN
Analog input channel 2, group 9.
Definition: IfxEvadc_PinMap.h:223
IfxEvadc_Emux_Out_pinTable
IFX_EXTERN const IfxEvadc_Emux_Out * IfxEvadc_Emux_Out_pinTable[IFXEVADC_PINMAP_NUM_MODULES][IFXEVADC_PINMAP_EMUX_OUT_NUM_ITEMS]
IfxEvadc_Emux_Out table.
Definition: IfxEvadc_PinMap.h:241
IfxEvadc_G3CH3_P40_3_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G3CH3_P40_3_IN
Analog input channel 3, group 3.
Definition: IfxEvadc_PinMap.h:162
IfxEvadc_G2CH2_P40_11_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G2CH2_P40_11_IN
Analog input channel 2, group 2.
Definition: IfxEvadc_PinMap.h:153
IfxEvadc_G8CH5_P40_7_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH5_P40_7_IN
Analog input channel 5, group 8.
Definition: IfxEvadc_PinMap.h:210
IfxEvadc_G2CH4_AN20_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G2CH4_AN20_IN
Analog input channel 4, group 2.
Definition: IfxEvadc_PinMap.h:155
IfxEvadc_G8CH2_AN34_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH2_AN34_IN
Analog input channel 2, group 8.
Definition: IfxEvadc_PinMap.h:207
IfxEvadc_G7CH3_P40_15_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G7CH3_P40_15_IN
Analog input channel 3, group 7.
Definition: IfxEvadc_PinMap.h:194
IfxEvadc_G7CH4_P41_0_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G7CH4_P41_0_IN
Analog input channel 4, group 7.
Definition: IfxEvadc_PinMap.h:195
IfxEvadc_G8CH1_P40_5_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH1_P40_5_IN
Analog input channel 1, group 8.
Definition: IfxEvadc_PinMap.h:206
IfxEvadc_G11CH3_AN7_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH3_AN7_IN
Analog input channel 3, group 11.
Definition: IfxEvadc_PinMap.h:136
IfxEvadc_G4CH1_AN41_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G4CH1_AN41_IN
Analog input channel 1, group 4.
Definition: IfxEvadc_PinMap.h:168
IfxEvadc_G4CH7_AN31_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G4CH7_AN31_IN
Analog input channel 7, group 4.
Definition: IfxEvadc_PinMap.h:174
IfxEvadc_EMUX10_P33_6_OUT
IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX10_P33_6_OUT
Control of external analog multiplexer interface 1.
Definition: IfxEvadc_PinMap.h:88
IfxEvadc_G9CH13_P01_4_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH13_P01_4_IN
Analog input channel 13, group 9.
Definition: IfxEvadc_PinMap.h:219
IfxEvadc_GroupId
IfxEvadc_GroupId
VADC Groups.
Definition: IfxEvadc_cfg.h:134
IfxEvadc_G2CH1_P40_10_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G2CH1_P40_10_IN
Analog input channel 1, group 2.
Definition: IfxEvadc_PinMap.h:152
IfxEvadc_G8CH11_AN43_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH11_AN43_IN
Analog input channel 11, group 8.
Definition: IfxEvadc_PinMap.h:201
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:246
IfxEvadc_EMUX00_P33_3_OUT
IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX00_P33_3_OUT
Control of external analog multiplexer interface 0.
Definition: IfxEvadc_PinMap.h:82
IfxEvadc_G7CH7_P41_3_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G7CH7_P41_3_IN
Analog input channel 7, group 7.
Definition: IfxEvadc_PinMap.h:198
IfxEvadc_G5CH5_AN53_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G5CH5_AN53_IN
Analog input channel 5, group 5.
Definition: IfxEvadc_PinMap.h:180
IfxEvadc_G11CH0_AN4_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH0_AN4_IN
Analog input channel 0, group 11.
Definition: IfxEvadc_PinMap.h:127
IfxEvadc_GxBfl_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxEvadc_PinMap.h:61
IfxEvadc_G9CH14_P01_3_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH14_P01_3_IN
Analog input channel 14, group 9.
Definition: IfxEvadc_PinMap.h:220
IfxEvadc_G9CH11_P00_1_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH11_P00_1_IN
Analog input channel 11, group 9.
Definition: IfxEvadc_PinMap.h:217
IfxEvadc_EMUX12_P00_8_OUT
IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX12_P00_8_OUT
Control of external analog multiplexer interface 1.
Definition: IfxEvadc_PinMap.h:91
IfxEvadc_G9CH8_P00_4_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH8_P00_4_IN
Analog input channel 8, group 9.
Definition: IfxEvadc_PinMap.h:229
IfxEvadc_G5CH1_AN49_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G5CH1_AN49_IN
Analog input channel 1, group 5.
Definition: IfxEvadc_PinMap.h:176
IfxEvadc_G1CH0_AN8_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G1CH0_AN8_IN
Analog input channel 0, group 1.
Definition: IfxEvadc_PinMap.h:143
IfxEvadc_FC1CH0_P40_10_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_FC1CH0_P40_10_IN
Analog input FC channel 1.
Definition: IfxEvadc_PinMap.h:104
IFXEVADC_PINMAP_EMUX_OUT_NUM_ITEMS
#define IFXEVADC_PINMAP_EMUX_OUT_NUM_ITEMS
Definition: IfxEvadc_PinMap.h:235
IfxEvadc_G11CH8_P40_11_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH8_P40_11_IN
Analog input channel 8, group 11.
Definition: IfxEvadc_PinMap.h:141
IfxEvadc_G6CH0_AN56_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G6CH0_AN56_IN
Analog input channel 0, group 6.
Definition: IfxEvadc_PinMap.h:183
IfxEvadc_FC3CH0_P00_11_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_FC3CH0_P00_11_IN
Analog input FC channel 3.
Definition: IfxEvadc_PinMap.h:106
IfxEvadc_G4CH3_AN43_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G4CH3_AN43_IN
Analog input channel 3, group 4.
Definition: IfxEvadc_PinMap.h:170
IfxEvadc_G9CH5_P00_7_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH5_P00_7_IN
Analog input channel 5, group 9.
Definition: IfxEvadc_PinMap.h:226
IfxEvadc_EMUX10_P00_6_OUT
IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX10_P00_6_OUT
Control of external analog multiplexer interface 1.
Definition: IfxEvadc_PinMap.h:87
IfxEvadc_G1CH6_AN14_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G1CH6_AN14_IN
Analog input channel 6, group 1.
Definition: IfxEvadc_PinMap.h:149
IfxEvadc_G8CH12_AN44_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH12_AN44_IN
Analog input channel 12, group 8.
Definition: IfxEvadc_PinMap.h:202
IfxEvadc_GxBfl_Out::groupId
IfxEvadc_GroupId groupId
Group ID.
Definition: IfxEvadc_PinMap.h:59
IfxEvadc_G11CH6_AN10_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH6_AN10_IN
Analog input channel 6, group 11.
Definition: IfxEvadc_PinMap.h:139
IfxEvadc_G3CH1_P40_1_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G3CH1_P40_1_IN
Analog input channel 1, group 3.
Definition: IfxEvadc_PinMap.h:160
IfxEvadc_G9CH3_P00_9_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH3_P00_9_IN
Analog input channel 3, group 9.
Definition: IfxEvadc_PinMap.h:224
IfxEvadc_G9CH1_P00_11_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH1_P00_11_IN
Analog input channel 1, group 9.
Definition: IfxEvadc_PinMap.h:222
IfxEvadc_G9CH9_P00_3_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G9CH9_P00_3_IN
Analog input channel 9, group 9.
Definition: IfxEvadc_PinMap.h:230
IfxEvadc_G0CH5_AN5_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G0CH5_AN5_IN
Analog input channel 5, group 0.
Definition: IfxEvadc_PinMap.h:112
IFXEVADC_PINMAP_GXBFL_OUT_NUM_ITEMS
#define IFXEVADC_PINMAP_GXBFL_OUT_NUM_ITEMS
Definition: IfxEvadc_PinMap.h:236
IfxEvadc_G1CH5_AN13_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G1CH5_AN13_IN
Analog input channel 5, group 1.
Definition: IfxEvadc_PinMap.h:148
IfxEvadc_G2CH5_AN21_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G2CH5_AN21_IN
Analog input channel 5, group 2.
Definition: IfxEvadc_PinMap.h:156
IfxEvadc_EMUX01_P33_2_OUT
IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX01_P33_2_OUT
Control of external analog multiplexer interface 0.
Definition: IfxEvadc_PinMap.h:84
IfxEvadc_G10CH1_P33_6_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH1_P33_6_IN
Analog input channel 1, group 10.
Definition: IfxEvadc_PinMap.h:118
IfxEvadc_G2CH0_AN16_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G2CH0_AN16_IN
Analog input channel 0, group 2.
Definition: IfxEvadc_PinMap.h:151
IfxEvadc_G8CH0_P40_4_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH0_P40_4_IN
Analog input channel 0, group 8.
Definition: IfxEvadc_PinMap.h:199
IfxEvadc_G1CH1_AN9_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G1CH1_AN9_IN
Analog input channel 1, group 1.
Definition: IfxEvadc_PinMap.h:144
IfxEvadc_G10CH8_P34_4_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH8_P34_4_IN
Analog input channel 8, group 10.
Definition: IfxEvadc_PinMap.h:125
IfxEvadc_G10CH2_P33_5_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH2_P33_5_IN
Analog input channel 2, group 10.
Definition: IfxEvadc_PinMap.h:119
IfxEvadc_G11CH9_P40_12_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH9_P40_12_IN
Analog input channel 9, group 11.
Definition: IfxEvadc_PinMap.h:142
IfxEvadc_G0CH6_AN6_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G0CH6_AN6_IN
Analog input channel 6, group 0.
Definition: IfxEvadc_PinMap.h:113
IfxEvadc_EMUX11_P00_7_OUT
IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX11_P00_7_OUT
Control of external analog multiplexer interface 1.
Definition: IfxEvadc_PinMap.h:89
IfxEvadc_G5CH0_AN48_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G5CH0_AN48_IN
Analog input channel 0, group 5.
Definition: IfxEvadc_PinMap.h:175
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxEvadc_G8CH14_AN46_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G8CH14_AN46_IN
Analog input channel 14, group 8.
Definition: IfxEvadc_PinMap.h:204
IfxEvadc_Vadcg_In_pinTable
IFX_EXTERN const IfxEvadc_Vadcg_In * IfxEvadc_Vadcg_In_pinTable[IFXEVADC_PINMAP_NUM_MODULES][IFXEVADC_PINMAP_NUM_GROUPS][IFXEVADC_PINMAP_VADCG_IN_NUM_ITEMS]
IfxEvadc_Vadcg_In table.
Definition: IfxEvadc_PinMap.h:247
IfxEvadc_G11CH15_AN35_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH15_AN35_IN
Analog input channel 15, group 11.
Definition: IfxEvadc_PinMap.h:133
IfxEvadc_G3CH2_P40_2_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G3CH2_P40_2_IN
Analog input channel 2, group 3.
Definition: IfxEvadc_PinMap.h:161
IfxEvadc_FC3BFLOUT_P10_2_OUT
IFX_EXTERN IfxEvadc_GxBfl_Out IfxEvadc_FC3BFLOUT_P10_2_OUT
Boundary flag output, FC channel 3.
Definition: IfxEvadc_PinMap.h:100
IfxEvadc_GxBfl_Out
EVADC Boundary Flag pin mapping structure.
Definition: IfxEvadc_PinMap.h:56
IfxEvadc_G1CH2_AN10_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G1CH2_AN10_IN
Analog input channel 2, group 1.
Definition: IfxEvadc_PinMap.h:145
IfxEvadc_EMUX01_P02_7_OUT
IFX_EXTERN IfxEvadc_Emux_Out IfxEvadc_EMUX01_P02_7_OUT
Control of external analog multiplexer interface 0.
Definition: IfxEvadc_PinMap.h:83
IfxEvadc_G10CH5_P33_2_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH5_P33_2_IN
Analog input channel 5, group 10.
Definition: IfxEvadc_PinMap.h:122
IfxEvadc_G10CH7_P33_0_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G10CH7_P33_0_IN
Analog input channel 7, group 10.
Definition: IfxEvadc_PinMap.h:124
IfxEvadc_FC2CH0_P00_12_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_FC2CH0_P00_12_IN
Analog input FC channel 2.
Definition: IfxEvadc_PinMap.h:105
IfxEvadc_Vadcg_In::channelId
uint8 channelId
Channel ID.
Definition: IfxEvadc_PinMap.h:78
IfxEvadc_G5CH6_P41_4_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G5CH6_P41_4_IN
Analog input channel 6, group 5.
Definition: IfxEvadc_PinMap.h:181
IfxEvadc_G5CH7_P41_5_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G5CH7_P41_5_IN
Analog input channel 7, group 5.
Definition: IfxEvadc_PinMap.h:182
IfxEvadc_G11CH1_AN5_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G11CH1_AN5_IN
Analog input channel 1, group 11.
Definition: IfxEvadc_PinMap.h:134
IfxEvadc_G0CH0_AN0_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G0CH0_AN0_IN
Analog input channel 0, group 0.
Definition: IfxEvadc_PinMap.h:107
IfxPort.h
PORT basic functionality.
IfxEvadc_G5CH2_AN50_IN
IFX_EXTERN IfxEvadc_Vadcg_In IfxEvadc_G5CH2_AN50_IN
Analog input channel 2, group 5.
Definition: IfxEvadc_PinMap.h:177


iLLD_TC38A: IfxEvadc_cfg.c Source File

  • _Impl
IfxEvadc_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxEvadc_cfg.c
3 * \brief EVADC on-chip implementation data
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxEvadc_cfg.h"
47
48 /******************************************************************************/
49 /*-----------------------Exported Variables/Constants-------------------------*/
50 /******************************************************************************/
51
52 volatile Ifx_SRC_SRCR *IfxEvadc_cfg_srcAddresses[(IFXEVADC_NUM_ADC_PRIMARY_GROUPS * 4) + (IFXEVADC_NUM_ADC_SECONDARY_GROUPS * 4) + (IFXEVADC_NUM_FAST_COMPARE_CHANNELS * 4) + (IFXEVADC_NUM_ADC_COMMON_GROUPS * 4)] = {
53 /* Primary Group 0*/
54 &SRC_VADCG0SR0,
55 &SRC_VADCG0SR1,
56 &SRC_VADCG0SR2,
57 &SRC_VADCG0SR3,
58 /* Primary Group 1*/
59 &SRC_VADCG1SR0,
60 &SRC_VADCG1SR1,
61 &SRC_VADCG1SR2,
62 &SRC_VADCG1SR3,
63 /* Primary Group 2*/
64 &SRC_VADCG2SR0,
65 &SRC_VADCG2SR1,
66 &SRC_VADCG2SR2,
67 &SRC_VADCG2SR3,
68 /* Primary Group 3*/
69 &SRC_VADCG3SR0,
70 &SRC_VADCG3SR1,
71 &SRC_VADCG3SR2,
72 &SRC_VADCG3SR3,
73 /* Primary Group 4*/
74 &SRC_VADCG4SR0,
75 &SRC_VADCG4SR1,
76 &SRC_VADCG4SR2,
77 &SRC_VADCG4SR3,
78 /* Primary Group 5*/
79 &SRC_VADCG5SR0,
80 &SRC_VADCG5SR1,
81 &SRC_VADCG5SR2,
82 &SRC_VADCG5SR3,
83 /* Primary Group 6*/
84 &SRC_VADCG6SR0,
85 &SRC_VADCG6SR1,
86 &SRC_VADCG6SR2,
87 &SRC_VADCG6SR3,
88 /* Primary Group 7*/
89 &SRC_VADCG7SR0,
90 &SRC_VADCG7SR1,
91 &SRC_VADCG7SR2,
92 &SRC_VADCG7SR3,
93
94 /* Secondary Group 0*/
95 &SRC_VADCG8SR0,
96 &SRC_VADCG8SR1,
97 &SRC_VADCG8SR2,
98 &SRC_VADCG8SR3,
99 /* Secondary Group 1*/
100 &SRC_VADCG9SR0,
101 &SRC_VADCG9SR1,
102 &SRC_VADCG9SR2,
103 &SRC_VADCG9SR3,
104 /* Secondary Group 2*/
105 &SRC_VADCG10SR0,
106 &SRC_VADCG10SR1,
107 &SRC_VADCG10SR2,
108 &SRC_VADCG10SR3,
109 /* Secondary Group 3*/
110 &SRC_VADCG11SR0,
111 &SRC_VADCG11SR1,
112 &SRC_VADCG11SR2,
113 &SRC_VADCG11SR3,
114
115 /* Fast Compare Channel 0*/
116 &SRC_VADCFC0SR0,
117 NULL_PTR,
118 NULL_PTR,
119 NULL_PTR,
120 /* Fast Compare Channel 1*/
121 &SRC_VADCFC1SR0,
122 NULL_PTR,
123 NULL_PTR,
124 NULL_PTR,
125 /* Fast Compare Channel 2*/
126 &SRC_VADCFC2SR0,
127 NULL_PTR,
128 NULL_PTR,
129 NULL_PTR,
130 /* Fast Compare Channel 3*/
131 &SRC_VADCFC3SR0,
132 NULL_PTR,
133 NULL_PTR,
134 NULL_PTR,
135
136 /*Common Group 0*/
137 &SRC_VADCCG0SR0,
138 &SRC_VADCCG0SR1,
139 &SRC_VADCCG0SR2,
140 &SRC_VADCCG0SR3,
141 /*Common Group 1*/
142 &SRC_VADCCG1SR0,
143 &SRC_VADCCG1SR1,
144 &SRC_VADCCG1SR2,
145 &SRC_VADCCG1SR3
146 };
IFXEVADC_NUM_ADC_COMMON_GROUPS
#define IFXEVADC_NUM_ADC_COMMON_GROUPS
Common Group.
Definition: IfxEvadc_cfg.h:116
IfxEvadc_cfg_srcAddresses
volatile Ifx_SRC_SRCR * IfxEvadc_cfg_srcAddresses[(IFXEVADC_NUM_ADC_PRIMARY_GROUPS *4)+(IFXEVADC_NUM_ADC_SECONDARY_GROUPS *4)+(IFXEVADC_NUM_FAST_COMPARE_CHANNELS *4)+(IFXEVADC_NUM_ADC_COMMON_GROUPS *4)]
Definition: IfxEvadc_cfg.c:52
IFXEVADC_NUM_FAST_COMPARE_CHANNELS
#define IFXEVADC_NUM_FAST_COMPARE_CHANNELS
Fast Compare Channel.
Definition: IfxEvadc_cfg.h:112
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxEvadc_cfg.h
EVADC on-chip implementation data.
IFXEVADC_NUM_ADC_SECONDARY_GROUPS
#define IFXEVADC_NUM_ADC_SECONDARY_GROUPS
Secondary Group.
Definition: IfxEvadc_cfg.h:108
IFXEVADC_NUM_ADC_PRIMARY_GROUPS
#define IFXEVADC_NUM_ADC_PRIMARY_GROUPS
number of primary Groups
Definition: IfxEvadc_cfg.h:104


iLLD_TC38A: IfxEvadc_cfg.h Source File

  • _Impl
IfxEvadc_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxEvadc_cfg.h
3 * \brief EVADC on-chip implementation data
4 * \ingroup IfxLld_Evadc
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Evadc EVADC
42 * \ingroup IfxLld
43 * \defgroup IfxLld_Evadc_Impl Implementation
44 * \ingroup IfxLld_Evadc
45 * \defgroup IfxLld_Evadc_Std Standard Driver
46 * \ingroup IfxLld_Evadc
47 */
48
49 #ifndef IFXEVADC_CFG_H
50 #define IFXEVADC_CFG_H 1
51
52 /******************************************************************************/
53 /*----------------------------------Includes----------------------------------*/
54 /******************************************************************************/
55
56 #include "Src/Std/IfxSrc.h"
57
58 /******************************************************************************/
59 /*-----------------------------------Macros-----------------------------------*/
60 /******************************************************************************/
61
62 /** \brief Number of ADC Groups
63 */
64 #define IFXEVADC_NUM_ADC_GROUPS (IFXEVADC_NUM_ADC_PRIMARY_GROUPS + IFXEVADC_NUM_ADC_SECONDARY_GROUPS)
65
66 /** \brief Number of calibrated ADC Groups
67 */
68 #define IFXEVADC_NUM_ADC_CAL_GROUPS (12)
69
70 /** \brief Maximum allowed analog frequency
71 */
72 #define IFXEVADC_ANALOG_FREQUENCY_MAX (20000000)
73
74 /** \brief Minimum allowed analog frequency
75 */
76 #define IFXEVADC_ANALOG_FREQUENCY_MIN (500000)
77
78 /** \brief Default analog frequency used in initModuleConfig function
79 */
80 #define IFXEVADC_DEFAULT_ANALOG_FREQ (20000000)
81
82 /** \brief Number of Conversion request Slots
83 */
84 #define IFXEVADC_NUM_REQUESTSLOTS (3)
85
86 /** \brief Number of group specific Input Class
87 */
88 #define IFXEVADC_NUM_INPUTCLASSES (2)
89
90 /** \brief Maximum number of configurable bitfields in ACCPROT0 register
91 */
92 #define IFXEVADC_MAXIMUM_BITFIELDS_IN_ACCPROT0_REGISTER (32)
93
94 #define IFXEVADC_QUEUE_REFILL (1 << IFX_EVADC_G_Q_QINR_RF_OFF)
95
96 /** \brief Number of ADC group input classes.
97 */
98 #define IFXEVADC_NUM_GLOBAL_INPUTCLASSES (2)
99
100 #define IFXEVADC_MAXIMUM_BITFIELDS_IN_ACCPROT1_REGISTER (64)
101
102 /** \brief number of primary Groups
103 */
104 #define IFXEVADC_NUM_ADC_PRIMARY_GROUPS (8)
105
106 /** \brief Secondary Group
107 */
108 #define IFXEVADC_NUM_ADC_SECONDARY_GROUPS (4)
109
110 /** \brief Fast Compare Channel
111 */
112 #define IFXEVADC_NUM_FAST_COMPARE_CHANNELS (4)
113
114 /** \brief Common Group
115 */
116 #define IFXEVADC_NUM_ADC_COMMON_GROUPS (2)
117
118 #define IFXEVADC_SAMPLETIME_MIN (2)
119
120 /** \brief Number of channels in primary group
121 */
122 #define IFXEVADC_NUM_CHAN_PER_PRIM_GROUP (64)
123
124 /** \brief Number of channels in secondary group
125 */
126 #define IFXEVADC_NUM_CHAN_PER_SEC_GROUP (64)
127
128 /******************************************************************************/
129 /*-------------------------------Enumerations---------------------------------*/
130 /******************************************************************************/
131
132 /** \brief VADC Groups
133 */
134 typedef enum
135 {
136 IfxEvadc_GroupId_0 = 0, /**< \brief EVADC Group 0(Primary Group 0) */
137 IfxEvadc_GroupId_1 = 1, /**< \brief EVADC Group 1(Primary Group 1) */
138 IfxEvadc_GroupId_2 = 2, /**< \brief EVADC Group 2(Primary Group 2) */
139 IfxEvadc_GroupId_3 = 3, /**< \brief EVADC Group 3(Primary Group 3) */
140 IfxEvadc_GroupId_4 = 4, /**< \brief EVADC Group 4(Primary Group 4) */
141 IfxEvadc_GroupId_5 = 5, /**< \brief EVADC Group 5(Primary Group 5) */
142 IfxEvadc_GroupId_6 = 6, /**< \brief EVADC Group 6(Primary Group 6) */
143 IfxEvadc_GroupId_7 = 7, /**< \brief EVADC Group 7(Primary Group 7) */
144 IfxEvadc_GroupId_8 = 8, /**< \brief EVADC Group 8(Secondary Group 0) */
145 IfxEvadc_GroupId_9 = 9, /**< \brief EVADC Group 9(Secondary Group 1) */
146 IfxEvadc_GroupId_10 = 10, /**< \brief EVADC Group 10(Secondary Group 2) */
147 IfxEvadc_GroupId_11 = 11, /**< \brief EVADC Group 11(Secondary Group 3) */
148 IfxEvadc_GroupId_12 = 12, /**< \brief EVADC group 12 (Fast compare channel 0) */
149 IfxEvadc_GroupId_13 = 13, /**< \brief EVADC group 13 (Fast compare channel 1) */
150 IfxEvadc_GroupId_14 = 14, /**< \brief EVADC group 14 (Fast compare channel 2) */
151 IfxEvadc_GroupId_15 = 15, /**< \brief EVADC group 15 (Fast compare channel 3) */
152 IfxEvadc_GroupId_global0 = 20, /**< \brief EVADC group global0 */
153 IfxEvadc_GroupId_global1 = 21 /**< \brief EVADC group global1 */
154 } IfxEvadc_GroupId;
155
156 /******************************************************************************/
157 /*-------------------Global Exported Variables/Constants----------------------*/
158 /******************************************************************************/
159
160 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxEvadc_cfg_srcAddresses[(IFXEVADC_NUM_ADC_PRIMARY_GROUPS * 4) + (IFXEVADC_NUM_ADC_SECONDARY_GROUPS * 4) + (IFXEVADC_NUM_FAST_COMPARE_CHANNELS * 4) + (IFXEVADC_NUM_ADC_COMMON_GROUPS * 4)];
161
162 #endif /* IFXEVADC_CFG_H */
IFXEVADC_NUM_ADC_COMMON_GROUPS
#define IFXEVADC_NUM_ADC_COMMON_GROUPS
Common Group.
Definition: IfxEvadc_cfg.h:116
IfxEvadc_GroupId_6
EVADC Group 6(Primary Group 6)
Definition: IfxEvadc_cfg.h:142
IfxEvadc_GroupId_4
EVADC Group 4(Primary Group 4)
Definition: IfxEvadc_cfg.h:140
IfxEvadc_GroupId_5
EVADC Group 5(Primary Group 5)
Definition: IfxEvadc_cfg.h:141
IfxEvadc_GroupId_11
EVADC Group 11(Secondary Group 3)
Definition: IfxEvadc_cfg.h:147
IFXEVADC_NUM_FAST_COMPARE_CHANNELS
#define IFXEVADC_NUM_FAST_COMPARE_CHANNELS
Fast Compare Channel.
Definition: IfxEvadc_cfg.h:112
IfxSrc.h
SRC basic functionality.
IfxEvadc_GroupId_global1
EVADC group global1.
Definition: IfxEvadc_cfg.h:153
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxEvadc_GroupId_global0
EVADC group global0.
Definition: IfxEvadc_cfg.h:152
IfxEvadc_GroupId_10
EVADC Group 10(Secondary Group 2)
Definition: IfxEvadc_cfg.h:146
IfxEvadc_GroupId_13
EVADC group 13 (Fast compare channel 1)
Definition: IfxEvadc_cfg.h:149
IfxEvadc_GroupId_1
EVADC Group 1(Primary Group 1)
Definition: IfxEvadc_cfg.h:137
IfxEvadc_GroupId_8
EVADC Group 8(Secondary Group 0)
Definition: IfxEvadc_cfg.h:144
IFXEVADC_NUM_ADC_SECONDARY_GROUPS
#define IFXEVADC_NUM_ADC_SECONDARY_GROUPS
Secondary Group.
Definition: IfxEvadc_cfg.h:108
IfxEvadc_GroupId_12
EVADC group 12 (Fast compare channel 0)
Definition: IfxEvadc_cfg.h:148
IfxEvadc_GroupId
IfxEvadc_GroupId
VADC Groups.
Definition: IfxEvadc_cfg.h:134
IfxEvadc_cfg_srcAddresses
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxEvadc_cfg_srcAddresses[(IFXEVADC_NUM_ADC_PRIMARY_GROUPS *4)+(IFXEVADC_NUM_ADC_SECONDARY_GROUPS *4)+(IFXEVADC_NUM_FAST_COMPARE_CHANNELS *4)+(IFXEVADC_NUM_ADC_COMMON_GROUPS *4)]
Definition: IfxEvadc_cfg.h:160
IFXEVADC_NUM_ADC_PRIMARY_GROUPS
#define IFXEVADC_NUM_ADC_PRIMARY_GROUPS
number of primary Groups
Definition: IfxEvadc_cfg.h:104
IfxEvadc_GroupId_3
EVADC Group 3(Primary Group 3)
Definition: IfxEvadc_cfg.h:139
IfxEvadc_GroupId_14
EVADC group 14 (Fast compare channel 2)
Definition: IfxEvadc_cfg.h:150
IfxEvadc_GroupId_15
EVADC group 15 (Fast compare channel 3)
Definition: IfxEvadc_cfg.h:151
IfxEvadc_GroupId_7
EVADC Group 7(Primary Group 7)
Definition: IfxEvadc_cfg.h:143
IfxEvadc_GroupId_0
EVADC Group 0(Primary Group 0)
Definition: IfxEvadc_cfg.h:136
IfxEvadc_GroupId_2
EVADC Group 2(Primary Group 2)
Definition: IfxEvadc_cfg.h:138
IfxEvadc_GroupId_9
EVADC Group 9(Secondary Group 1)
Definition: IfxEvadc_cfg.h:145


iLLD_TC38A: IfxFce.c Source File

  • Fce
  • Std
IfxFce.c
Go to the documentation of this file.
1 /**
2 * \file IfxFce.c
3 * \brief FCE basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 *
41 */
42
43 /******************************************************************************/
44 /*----------------------------------Includes----------------------------------*/
45 /******************************************************************************/
46
47 #include "IfxFce.h"
48
49 /******************************************************************************/
50 /*-------------------------Function Implementations---------------------------*/
51 /******************************************************************************/
52
53 uint32 IfxFce_reflectCrc32(uint32 crcStartValue, uint8 crcLength)
54 {
55 uint32 ReversedData = 0x0U;
56 uint8 inputDataCounter;
57
58 for (inputDataCounter = 0; inputDataCounter < crcLength; ++inputDataCounter)
59 {
60 if (crcStartValue & 0x01)
61 {
62 ReversedData |= (uint32)((uint32)1 << ((crcLength - 1) - inputDataCounter));
63 }
64
65 crcStartValue = (uint32)((uint32)crcStartValue >> (uint32)1);
66 }
67
68 return ReversedData;
69 }
70
71
72 void IfxFce_resetModule(Ifx_FCE *fce)
73 {
74 uint16 password = IfxScuWdt_getCpuWatchdogPassword();
75
76 IfxScuWdt_clearCpuEndinit(password);
77 fce->KRST1.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
78 fce->KRST0.B.RST = 1;
79 IfxScuWdt_setCpuEndinit(password);
80
81 while (0 == fce->KRST0.B.RSTSTAT) /* Wait until reset is executed */
82
83 {}
84
85 IfxScuWdt_clearCpuEndinit(password);
86 fce->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
87 IfxScuWdt_setCpuEndinit(password);
88 }
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxFce_reflectCrc32
uint32 IfxFce_reflectCrc32(uint32 crcStartValue, uint8 crcLength)
Reflects the CRC data and returns it.
Definition: IfxFce.c:53
IfxFce_resetModule
void IfxFce_resetModule(Ifx_FCE *fce)
Reset the module by clearing the kernel.
Definition: IfxFce.c:72
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxFce.h
FCE basic functionality.
uint8
unsigned char uint8
Definition: Platform_Types.h:108


iLLD_TC38A: IfxFce.h Source File

  • Fce
  • Std
IfxFce.h
Go to the documentation of this file.
1 /**
2 * \file IfxFce.h
3 * \brief FCE basic functionality
4 * \ingroup IfxLld_Fce
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 * \defgroup IfxLld_Fce_Std_Enum Enumerations
43 * \ingroup IfxLld_Fce_Std
44 * \defgroup IfxLld_Fce_Std_Module Module Functions
45 * \ingroup IfxLld_Fce_Std
46 * \defgroup IfxLld_Fce_Std_Support Support Function
47 * \ingroup IfxLld_Fce_Std
48 * \defgroup IfxLld_Fce_Std_InterruptStatus Interrupt Status Functions
49 * \ingroup IfxLld_Fce_Std
50 */
51
52 #ifndef IFXFCE_H
53 #define IFXFCE_H 1
54
55 /******************************************************************************/
56 /*----------------------------------Includes----------------------------------*/
57 /******************************************************************************/
58
59 #include "_Impl/IfxFce_cfg.h"
60 #include "Cpu/Std/IfxCpu_Intrinsics.h"
61 #include "Scu/Std/IfxScuWdt.h"
62 #include "IfxFce_reg.h"
63 #include "Src/Std/IfxSrc.h"
64
65 /******************************************************************************/
66 /*--------------------------------Enumerations--------------------------------*/
67 /******************************************************************************/
68
69 /** \addtogroup IfxLld_Fce_Std_Enum
70 * \{ */
71 /** \brief Ifx_FCE_CHx(x= 0,1), Specifies the channel used for CRC
72 */
73 typedef enum
74 {
75 IfxFce_CrcChannel_0 = 0, /**< \brief Specifies the channel0 used for CRC */
76 IfxFce_CrcChannel_1, /**< \brief Specifies the channel1 used for CRC */
77 IfxFce_CrcChannel_2, /**< \brief Specifies the channel2 used for CRC */
78 IfxFce_CrcChannel_3, /**< \brief Specifies the channel3 used for CRC */
79 IfxFce_CrcChannel_4, /**< \brief Specifies the channel4 used for CRC */
80 IfxFce_CrcChannel_5, /**< \brief Specifies the channel5 used for CRC */
81 IfxFce_CrcChannel_6, /**< \brief Specifies the channel6 used for CRC */
82 IfxFce_CrcChannel_7 /**< \brief Specifies the channel7 used for CRC */
83 } IfxFce_CrcChannel;
84
85 /** \} */
86
87 /** \brief Specify the CRC kernel used by the fce channel
88 */
89 typedef enum
90 {
91 IfxFce_CrcKernel_0 = 0, /**< \brief Specifies to use kernel 0 */
92 IfxFce_CrcKernel_1 = 1, /**< \brief Specifies to use kernel 1 */
93 IfxFce_CrcKernel_2 = 2, /**< \brief Specifies to use kernel 2 */
94 IfxFce_CrcKernel_3 = 3 /**< \brief Specifies to use kernel 3 */
95 } IfxFce_CrcKernel;
96
97 /** \addtogroup IfxLld_Fce_Std_Module
98 * \{ */
99
100 /******************************************************************************/
101 /*-------------------------Inline Function Prototypes-------------------------*/
102 /******************************************************************************/
103
104 /** \brief Disable the control of FCE module
105 * \param fce Specifies pointer to FCE module registers
106 * \return None
107 */
108 IFX_INLINE void IfxFce_disableModule(Ifx_FCE *fce);
109
110 /** \brief Enable the control of FCE module
111 * \param fce Specifies pointer to FCE module registers
112 * \return None
113 */
114 IFX_INLINE void IfxFce_enableModule(Ifx_FCE *fce);
115
116 /******************************************************************************/
117 /*-------------------------Global Function Prototypes-------------------------*/
118 /******************************************************************************/
119
120 /** \brief Reset the module by clearing the kernel
121 * \param fce Specifies pointer to FCE module registers
122 * \return None
123 */
124 IFX_EXTERN void IfxFce_resetModule(Ifx_FCE *fce);
125
126 /** \} */
127
128 /** \addtogroup IfxLld_Fce_Std_Support
129 * \{ */
130
131 /******************************************************************************/
132 /*-------------------------Global Function Prototypes-------------------------*/
133 /******************************************************************************/
134
135 /** \brief Reflects the CRC data and returns it
136 * \param crcStartValue start value for reflection
137 * \param crcLength length of reflected value
138 * \return Reflected CRC data
139 */
140 IFX_EXTERN uint32 IfxFce_reflectCrc32(uint32 crcStartValue, uint8 crcLength);
141
142 /** \} */
143
144 /** \addtogroup IfxLld_Fce_Std_InterruptStatus
145 * \{ */
146
147 /******************************************************************************/
148 /*-------------------------Inline Function Prototypes-------------------------*/
149 /******************************************************************************/
150
151 /** \brief Returns the SRC pointer for FCE
152 * \param fce Specifies pointer to FCE module registers
153 */
154 IFX_INLINE volatile Ifx_SRC_SRCR *IfxFce_getSrcPointer(Ifx_FCE *fce);
155
156 /** \} */
157
158 /******************************************************************************/
159 /*-------------------------Inline Function Prototypes-------------------------*/
160 /******************************************************************************/
161
162 /** \brief Specifies pointer to FCE module registers
163 * \param fce Specifies the pointer to FCE module handler
164 * \param channel Specifies the Channel
165 * \return None
166 */
167 IFX_INLINE void IfxFce_clearCrcErrorFlags(Ifx_FCE *fce, IfxFce_CrcChannel channel);
168
169 /** \brief Gets the CRC interrupt status
170 * \param fce Specifies pointer to FCE module registers
171 * \param channel Specifies the Channel
172 * \return Return Crc Interrupt Status
173 */
174 IFX_INLINE Ifx_FCE_IN_STS IfxFce_getCrcInterruptStatus(Ifx_FCE *fce, IfxFce_CrcChannel channel);
175
176 /** \brief Set the length of over which CRC checksum is calculated.
177 * \param fce Specifies pointer to FCE module registers
178 * \param channel Specifies the channel
179 * \param crcLength Specifies the Length of CRC
180 * \return None
181 */
182 IFX_INLINE void IfxFce_setChannelCrcLength(Ifx_FCE *fce, IfxFce_CrcChannel channel, uint32 crcLength);
183
184 /** \brief Set the CRC start value
185 * \param fce Specifies pointer to FCE module registers
186 * \param channel Specifies the channel
187 * \param crcStartValue Set the crc value
188 * \return None
189 */
190 IFX_INLINE void IfxFce_setCrcstartValue(Ifx_FCE *fce, IfxFce_CrcChannel channel, uint32 crcStartValue);
191
192 /** \brief Set expected crc value to be checked.
193 * \param fce Specifies pointer to FCE module registers
194 * \param channel Specifies the channel
195 * \param expectedCrc Expected CRC value to be checked
196 * \return None
197 */
198 IFX_INLINE void IfxFce_setExpectedCrc(Ifx_FCE *fce, IfxFce_CrcChannel channel, uint32 expectedCrc);
199
200 /******************************************************************************/
201 /*---------------------Inline Function Implementations------------------------*/
202 /******************************************************************************/
203
204 IFX_INLINE void IfxFce_clearCrcErrorFlags(Ifx_FCE *fce, IfxFce_CrcChannel channel)
205 {
206 fce->IN[channel].STS.U = 0x00000000U;
207 }
208
209
210 IFX_INLINE void IfxFce_disableModule(Ifx_FCE *fce)
211 {
212 uint16 password = IfxScuWdt_getCpuWatchdogPassword();
213 IfxScuWdt_clearCpuEndinit(password);
214 fce->CLC.B.DISR = 1;
215 IfxScuWdt_setCpuEndinit(password);
216 }
217
218
219 IFX_INLINE void IfxFce_enableModule(Ifx_FCE *fce)
220 {
221 uint16 password = IfxScuWdt_getCpuWatchdogPassword();
222 IfxScuWdt_clearCpuEndinit(password);
223 fce->CLC.B.DISR = 0;
224 IfxScuWdt_setCpuEndinit(password);
225 }
226
227
228 IFX_INLINE Ifx_FCE_IN_STS IfxFce_getCrcInterruptStatus(Ifx_FCE *fce, IfxFce_CrcChannel channel)
229 {
230 Ifx_FCE_IN_STS interruptStatus;
231 interruptStatus.U = fce->IN[channel].STS.U;
232
233 return interruptStatus;
234 }
235
236
237 IFX_INLINE volatile Ifx_SRC_SRCR *IfxFce_getSrcPointer(Ifx_FCE *fce)
238 {
239 IFX_UNUSED_PARAMETER(fce);
240 return &SRC_FCE0;
241 }
242
243
244 IFX_INLINE void IfxFce_setChannelCrcLength(Ifx_FCE *fce, IfxFce_CrcChannel channel, uint32 crcLength)
245 {
246 /*write the dafault value 0xFACECAFE to the register */
247 fce->IN[channel].LENGTH.U = 0xFACECAFE;
248 fce->IN[channel].LENGTH.U = crcLength;
249 }
250
251
252 IFX_INLINE void IfxFce_setCrcstartValue(Ifx_FCE *fce, IfxFce_CrcChannel channel, uint32 crcStartValue)
253 {
254 fce->IN[channel].CRC.U = crcStartValue;
255 }
256
257
258 IFX_INLINE void IfxFce_setExpectedCrc(Ifx_FCE *fce, IfxFce_CrcChannel channel, uint32 expectedCrc)
259 {
260 /*write the dafault value 0xFACECAFE to the register */
261 fce->IN[channel].CHECK.U = 0xFACECAFE;
262 fce->IN[channel].CHECK.U = expectedCrc;
263 }
264
265
266 #endif /* IFXFCE_H */
IfxFce_CrcChannel_0
Specifies the channel0 used for CRC.
Definition: IfxFce.h:75
IfxFce_enableModule
IFX_INLINE void IfxFce_enableModule(Ifx_FCE *fce)
Enable the control of FCE module.
Definition: IfxFce.h:219
IfxFce_disableModule
IFX_INLINE void IfxFce_disableModule(Ifx_FCE *fce)
Disable the control of FCE module.
Definition: IfxFce.h:210
IfxFce_CrcKernel
IfxFce_CrcKernel
Specify the CRC kernel used by the fce channel.
Definition: IfxFce.h:89
IfxFce_CrcChannel_5
Specifies the channel5 used for CRC.
Definition: IfxFce.h:80
IfxFce_CrcChannel_4
Specifies the channel4 used for CRC.
Definition: IfxFce.h:79
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxFce_setExpectedCrc
IFX_INLINE void IfxFce_setExpectedCrc(Ifx_FCE *fce, IfxFce_CrcChannel channel, uint32 expectedCrc)
Set expected crc value to be checked.
Definition: IfxFce.h:258
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxSrc.h
SRC basic functionality.
IfxCpu_Intrinsics.h
IfxFce_CrcChannel_2
Specifies the channel2 used for CRC.
Definition: IfxFce.h:77
IfxFce_CrcChannel_6
Specifies the channel6 used for CRC.
Definition: IfxFce.h:81
IfxScuWdt.h
SCU basic functionality.
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxFce_reflectCrc32
IFX_EXTERN uint32 IfxFce_reflectCrc32(uint32 crcStartValue, uint8 crcLength)
Reflects the CRC data and returns it.
Definition: IfxFce.c:53
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxFce_CrcChannel_7
Specifies the channel7 used for CRC.
Definition: IfxFce.h:82
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxFce_CrcKernel_2
Specifies to use kernel 2.
Definition: IfxFce.h:93
IfxFce_CrcKernel_1
Specifies to use kernel 1.
Definition: IfxFce.h:92
IfxFce_cfg.h
FCE on-chip implementation data.
IfxFce_resetModule
IFX_EXTERN void IfxFce_resetModule(Ifx_FCE *fce)
Reset the module by clearing the kernel.
Definition: IfxFce.c:72
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxFce_setChannelCrcLength
IFX_INLINE void IfxFce_setChannelCrcLength(Ifx_FCE *fce, IfxFce_CrcChannel channel, uint32 crcLength)
Set the length of over which CRC checksum is calculated.
Definition: IfxFce.h:244
IfxFce_CrcChannel_3
Specifies the channel3 used for CRC.
Definition: IfxFce.h:78
IfxFce_CrcChannel_1
Specifies the channel1 used for CRC.
Definition: IfxFce.h:76
IfxFce_getSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxFce_getSrcPointer(Ifx_FCE *fce)
Returns the SRC pointer for FCE.
Definition: IfxFce.h:237
IfxFce_clearCrcErrorFlags
IFX_INLINE void IfxFce_clearCrcErrorFlags(Ifx_FCE *fce, IfxFce_CrcChannel channel)
Specifies pointer to FCE module registers.
Definition: IfxFce.h:204
IfxFce_getCrcInterruptStatus
IFX_INLINE Ifx_FCE_IN_STS IfxFce_getCrcInterruptStatus(Ifx_FCE *fce, IfxFce_CrcChannel channel)
Gets the CRC interrupt status.
Definition: IfxFce.h:228
IfxFce_setCrcstartValue
IFX_INLINE void IfxFce_setCrcstartValue(Ifx_FCE *fce, IfxFce_CrcChannel channel, uint32 crcStartValue)
Set the CRC start value.
Definition: IfxFce.h:252
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxFce_CrcKernel_0
Specifies to use kernel 0.
Definition: IfxFce.h:91
IfxFce_CrcChannel
IfxFce_CrcChannel
Ifx_FCE_CHx(x= 0,1), Specifies the channel used for CRC.
Definition: IfxFce.h:73
IfxFce_CrcKernel_3
Specifies to use kernel 3.
Definition: IfxFce.h:94
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
uint8
unsigned char uint8
Definition: Platform_Types.h:108


iLLD_TC38A: IfxFce_Crc.c Source File

  • Fce
  • Crc
IfxFce_Crc.c
Go to the documentation of this file.
1 /**
2 * \file IfxFce_Crc.c
3 * \brief FCE CRC details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 *
41 */
42
43 /******************************************************************************/
44 /*----------------------------------Includes----------------------------------*/
45 /******************************************************************************/
46
47 #include "IfxFce_Crc.h"
48
49 /******************************************************************************/
50 /*-------------------------Function Implementations---------------------------*/
51 /******************************************************************************/
52
53 uint32 IfxFce_Crc_calculateCrc(IfxFce_Crc_Crc *fce, const uint32 *crcData, uint16 crcDataLength, uint32 crcStartValue)
54 {
55 Ifx_FCE *fceSFR = fce->fce;
56 IfxFce_CrcChannel crcChannel = fce->crcChannel;
57 uint32 inputDataCounter;
58 uint32 crcResultValue;
59 uint32 *dataPtr = (uint32 *)crcData;
60
61 /*set the Legth*/
62 IfxFce_setChannelCrcLength(fce->fce, crcChannel, crcDataLength);
63
64 /*set the expected CRC*/
65 IfxFce_setExpectedCrc(fce->fce, crcChannel, fce->expectedCrc);
66
67 /*Configure CRC register*/
68 IfxFce_setCrcstartValue(fce->fce, crcChannel, crcStartValue);
69
70 volatile Ifx_FCE_IN_IR *InputData = &fceSFR->IN[fce->crcChannel].IR;
71
72 if (fce->useDma == TRUE)
73 {
74 IfxDma_ChannelIncrementStep dmaIncrementStep;
75 IfxDma_ChannelMoveSize dmaChannelsize;
76
77 if ((fce->crcKernel == IfxFce_CrcKernel_0) || (fce->crcKernel == IfxFce_CrcKernel_1))
78 {
79 dmaIncrementStep = IfxDma_ChannelIncrementStep_1;
80 dmaChannelsize = IfxDma_ChannelMoveSize_32bit;
81 }
82 else if (fce->crcKernel == IfxFce_CrcKernel_2)
83 {
84 dmaIncrementStep = IfxDma_ChannelIncrementStep_2;
85 dmaChannelsize = IfxDma_ChannelMoveSize_16bit;
86 }
87 else
88 {
89 dmaIncrementStep = IfxDma_ChannelIncrementStep_4;
90 dmaChannelsize = IfxDma_ChannelMoveSize_8bit;
91 }
92
93 IfxDma_setChannelSourceAddress(fce->fceDmaChannel.dma, fce->fceDmaChannel.channelId, (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreIndex(), crcData));
94 IfxDma_setChannelDestinationAddress(fce->fceDmaChannel.dma, fce->fceDmaChannel.channelId, (void *)&InputData->U);
95 IfxDma_setChannelTransferCount(fce->fceDmaChannel.dma, fce->fceDmaChannel.channelId, crcDataLength);
96 IfxDma_setChannelMoveSize(fce->fceDmaChannel.dma, fce->fceDmaChannel.channelId, dmaChannelsize);
97 IfxDma_setChannelDestinationIncrementStep(fce->fceDmaChannel.dma, fce->fceDmaChannel.channelId, dmaIncrementStep,
98 IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_4);
99
100 IfxDma_Dma_startChannelTransaction(&fce->fceDmaChannel);
101
102 while (IfxDma_Dma_isChannelTransactionPending(&fce->fceDmaChannel) == TRUE)
103 {}
104 }
105 else
106 {
107 /* input in INIT register */
108 for (inputDataCounter = 0; inputDataCounter < crcDataLength; ++inputDataCounter)
109 {
110 InputData->U = *(dataPtr++);
111 }
112 }
113
114 crcResultValue = fceSFR->IN[fce->crcChannel].RES.U;
115
116 return crcResultValue;
117 }
118
119
120 void IfxFce_Crc_clearErrorFlags(IfxFce_Crc_Crc *fce)
121 {
122 IfxFce_clearCrcErrorFlags(fce->fce, fce->crcChannel);
123 }
124
125
126 void IfxFce_Crc_deInitModule(IfxFce_Crc_Crc *fce)
127 {
128 IfxFce_resetModule(fce->fce);
129 }
130
131
132 Ifx_FCE_IN_STS IfxFce_Crc_getInterruptStatus(IfxFce_Crc_Crc *fce)
133 {
134 return IfxFce_getCrcInterruptStatus(fce->fce, fce->crcChannel);
135 }
136
137
138 void IfxFce_Crc_initCrc(IfxFce_Crc_Crc *fceCrc, const IfxFce_Crc_CrcConfig *crcConfig)
139 {
140 fceCrc->fce = crcConfig->fce;
141 Ifx_FCE *fceSFR = crcConfig->fce;
142
143 fceCrc->expectedCrc = crcConfig->expectedCrc;
144 fceCrc->crcChannel = crcConfig->crcChannel;
145 fceCrc->crcKernel = crcConfig->crcKernel;
146
147 uint16 password = IfxScuWdt_getCpuWatchdogPassword();
148 IfxScuWdt_clearCpuEndinit(password);
149
150 Ifx_FCE_IN_CFG tempCFG;
151
152 tempCFG.U = 0;
153 tempCFG.B.CMI = crcConfig->enabledInterrupts.crcMismatch;
154 tempCFG.B.CEI = crcConfig->enabledInterrupts.configError;
155 tempCFG.B.LEI = crcConfig->enabledInterrupts.lengthError;
156 tempCFG.B.BEI = crcConfig->enabledInterrupts.busError;
157 tempCFG.B.CCE = crcConfig->crcCheckCompared;
158 tempCFG.B.ALR = crcConfig->automaticLengthReload;
159 tempCFG.B.REFIN = crcConfig->dataByteReflectionEnabled;
160 tempCFG.B.REFOUT = crcConfig->crc32BitReflectionEnabled;
161 tempCFG.B.XSEL = crcConfig->crcResultInverted;
162 tempCFG.B.BYTESWAP = crcConfig->swapOrderOfBytes;
163 tempCFG.B.KERNEL = crcConfig->crcKernel;
164
165 fceSFR->IN[crcConfig->crcChannel].CFG.U = tempCFG.U;
166
167 IfxScuWdt_setCpuEndinit(password);
168
169 fceCrc->useDma = crcConfig->useDma;
170
171 if (fceCrc->useDma == TRUE)
172 {
173 Ifx_DMA *dmaSFR = &MODULE_DMA;
174 IfxDma_Dma dma;
175 IfxDma_Dma_createModuleHandle(&dma, dmaSFR);
176
177 IfxDma_Dma_ChannelConfig dmaChannelCfg;
178 IfxDma_Dma_initChannelConfig(&dmaChannelCfg, &dma);
179
180 dmaChannelCfg.channelId = crcConfig->fceChannelId;
181 dmaChannelCfg.requestMode = IfxDma_ChannelRequestMode_completeTransactionPerRequest;
182 dmaChannelCfg.operationMode = IfxDma_ChannelOperationMode_continuous;
183 dmaChannelCfg.destinationAddressCircularRange = IfxDma_ChannelIncrementCircular_4,
184 dmaChannelCfg.destinationCircularBufferEnabled = TRUE,
185 IfxDma_Dma_initChannel(&fceCrc->fceDmaChannel, &dmaChannelCfg);
186 }
187 }
188
189
190 void IfxFce_Crc_initCrcConfig(IfxFce_Crc_CrcConfig *crcConfig, IfxFce_Crc *fce)
191 {
192 crcConfig->fce = fce->fce;
193 crcConfig->crcKernel = IfxFce_CrcKernel_0;
194 crcConfig->crcChannel = IfxFce_CrcChannel_0;
195 crcConfig->crcCheckCompared = TRUE;
196 crcConfig->automaticLengthReload = FALSE;
197 crcConfig->dataByteReflectionEnabled = TRUE;
198 crcConfig->crc32BitReflectionEnabled = TRUE;
199 crcConfig->swapOrderOfBytes = FALSE;
200 crcConfig->crcResultInverted = TRUE;
201 crcConfig->enabledInterrupts.crcMismatch = FALSE; // enable if CRC is already known
202 crcConfig->enabledInterrupts.configError = TRUE;
203 crcConfig->enabledInterrupts.lengthError = TRUE;
204 crcConfig->enabledInterrupts.busError = TRUE;
205 crcConfig->useDma = FALSE;
206 crcConfig->fceChannelId = IfxDma_ChannelId_none;
207 }
208
209
210 void IfxFce_Crc_initModule(IfxFce_Crc *fce, const IfxFce_Crc_Config *config)
211 {
212 fce->fce = config->fce;
213 Ifx_FCE *fceSFR = config->fce;
214
215 IfxFce_enableModule(fceSFR);
216
217 volatile Ifx_SRC_SRCR *src = IfxFce_getSrcPointer(fceSFR);
218 IfxSrc_init(src, config->isrTypeOfService, config->isrPriority);
219 IfxSrc_enable(src);
220 }
221
222
223 void IfxFce_Crc_initModuleConfig(IfxFce_Crc_Config *config, Ifx_FCE *fce)
224 {
225 config->fce = fce;
226 config->isrPriority = 0;
227 config->isrTypeOfService = IfxSrc_Tos_cpu0;
228 }
IfxFce_Crc_Config::isrTypeOfService
IfxSrc_Tos isrTypeOfService
type of interrupt service
Definition: IfxFce_Crc.h:274
IfxFce_CrcChannel_0
Specifies the channel0 used for CRC.
Definition: IfxFce.h:75
IfxFce_enableModule
IFX_INLINE void IfxFce_enableModule(Ifx_FCE *fce)
Enable the control of FCE module.
Definition: IfxFce.h:219
IfxDma_ChannelOperationMode_continuous
channel stays enabled after transaction
Definition: IfxDma.h:188
IfxDma_Dma_Channel::channelId
IfxDma_ChannelId channelId
Specifies the DMA channel.
Definition: IfxDma_Dma.h:474
IfxFce_Crc_Crc::fce
Ifx_FCE * fce
Specifies pointer to FCE module registers.
Definition: IfxFce_Crc.h:281
IfxFce_Crc_Crc::useDma
boolean useDma
Variable indicates Dma usage in Fce.
Definition: IfxFce_Crc.h:284
IfxDma_ChannelIncrementStep_2
increment by 2 width
Definition: IfxDma.h:136
IfxFce_Crc_Crc
Specifies the pointer to FCE module handler.
Definition: IfxFce_Crc.h:279
IfxDma_setChannelSourceAddress
IFX_INLINE void IfxDma_setChannelSourceAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId, const void *address)
Configure the source address.
Definition: IfxDma.h:1656
IfxFce_Crc_Crc::fceDmaChannel
IfxDma_Dma_Channel fceDmaChannel
Dma channel handle for Fce.
Definition: IfxFce_Crc.h:283
IfxFce_Crc.h
FCE CRC details.
IfxDma_Dma_initChannelConfig
void IfxDma_Dma_initChannelConfig(IfxDma_Dma_ChannelConfig *config, IfxDma_Dma *dma)
initialize the DMA module channel configuration
Definition: IfxDma_Dma.c:182
IfxDma_ChannelMoveSize_16bit
1 DMA move is 16 bit wide
Definition: IfxDma.h:175
IfxDma_ChannelMoveSize_8bit
1 DMA move is 8 bit wide
Definition: IfxDma.h:174
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
IfxFce_setExpectedCrc
IFX_INLINE void IfxFce_setExpectedCrc(Ifx_FCE *fce, IfxFce_CrcChannel channel, uint32 expectedCrc)
Set expected crc value to be checked.
Definition: IfxFce.h:258
IfxDma_setChannelDestinationIncrementStep
IFX_INLINE void IfxDma_setChannelDestinationIncrementStep(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size)
Configure a DMA channel destination pointer.
Definition: IfxDma.h:1603
IfxFce_Crc_Crc::expectedCrc
uint32 expectedCrc
Specifies the expected CRC to be compared with resulted.
Definition: IfxFce_Crc.h:282
IfxFce_Crc_initCrcConfig
void IfxFce_Crc_initCrcConfig(IfxFce_Crc_CrcConfig *crcConfig, IfxFce_Crc *fce)
Initialises the default CRC configuration buffer.
Definition: IfxFce_Crc.c:190
IfxFce_Crc_EnabledInterrupts::lengthError
boolean lengthError
Specifies enabel/disable of length error interrupt.
Definition: IfxFce_Crc.h:253
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxDma_Dma_ChannelConfig::destinationCircularBufferEnabled
boolean destinationCircularBufferEnabled
Enables/Disables the destination circular buffering.
Definition: IfxDma_Dma.h:506
IfxDma_Dma_isChannelTransactionPending
IFX_INLINE boolean IfxDma_Dma_isChannelTransactionPending(IfxDma_Dma_Channel *channel)
Poll for an ongoing transaction.
Definition: IfxDma_Dma.h:741
IfxFce_Crc_initCrc
void IfxFce_Crc_initCrc(IfxFce_Crc_Crc *fceCrc, const IfxFce_Crc_CrcConfig *crcConfig)
Initialise the FCE module for CRC computation according to CRC mode.
Definition: IfxFce_Crc.c:138
IfxFce_Crc_CrcConfig::automaticLengthReload
boolean automaticLengthReload
Specifies the enable/disable of automatic length reload.
Definition: IfxFce_Crc.h:295
IfxFce_Crc_clearErrorFlags
void IfxFce_Crc_clearErrorFlags(IfxFce_Crc_Crc *fce)
Clears the error flags.
Definition: IfxFce_Crc.c:120
IfxFce_Crc_CrcConfig::dataByteReflectionEnabled
boolean dataByteReflectionEnabled
Specifies enable/disable of input data byte wise reflection.
Definition: IfxFce_Crc.h:296
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxFce_Crc_CrcConfig::crcResultInverted
boolean crcResultInverted
Specifies the XOR valueto get the final CRC.
Definition: IfxFce_Crc.h:300
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxDma_ChannelMoveSize_32bit
1 DMA move is 32 bit wide
Definition: IfxDma.h:176
IfxFce_Crc_calculateCrc
uint32 IfxFce_Crc_calculateCrc(IfxFce_Crc_Crc *fce, const uint32 *crcData, uint16 crcDataLength, uint32 crcStartValue)
Calculate the XORed CRC value and returns it. It takes the precomputed XORed and reversed.
Definition: IfxFce_Crc.c:53
IfxFce_Crc_CrcConfig::enabledInterrupts
IfxFce_Crc_EnabledInterrupts enabledInterrupts
Specifies the interrupt enable structure.
Definition: IfxFce_Crc.h:301
IfxDma_Dma_Channel::dma
Ifx_DMA * dma
Specifies the pointer to the DMA registers.
Definition: IfxDma_Dma.h:473
IfxFce_Crc_Config
Configuration structure of the module.
Definition: IfxFce_Crc.h:270
IfxDma_ChannelIncrementStep_1
increment by 1 width
Definition: IfxDma.h:135
IFXCPU_GLB_ADDR_DSPR
#define IFXCPU_GLB_ADDR_DSPR(cpu, address)
Convert local DSPR address to global DSPR address which can be accessed from the SRI bus...
Definition: IfxCpu.h:90
IfxFce_CrcKernel_2
Specifies to use kernel 2.
Definition: IfxFce.h:93
IfxFce_CrcKernel_1
Specifies to use kernel 1.
Definition: IfxFce.h:92
IfxDma_ChannelIncrementCircular_4
circular buffer size is 4 byte
Definition: IfxDma.h:105
IfxDma_Dma_createModuleHandle
void IfxDma_Dma_createModuleHandle(IfxDma_Dma *dmaHandle, Ifx_DMA *dma)
initializes a DMA module handle based on the current configuration. Can be used in code where it&#39;s en...
Definition: IfxDma_Dma.c:127
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:68
IfxDma_ChannelIncrementStep_4
increment by 4 width
Definition: IfxDma.h:137
IfxFce_Crc_initModule
void IfxFce_Crc_initModule(IfxFce_Crc *fce, const IfxFce_Crc_Config *config)
Usage Example: see How to use the FCE CRC Interface driver?.
Definition: IfxFce_Crc.c:210
IfxFce_Crc_CrcConfig::fceChannelId
IfxDma_ChannelId fceChannelId
Select the Dma channel for Fce operation.
Definition: IfxFce_Crc.h:303
IfxDma_Dma
DMA base address data structure (Module handle)
Definition: IfxDma_Dma.h:460
IfxFce_resetModule
void IfxFce_resetModule(Ifx_FCE *fce)
Reset the module by clearing the kernel.
Definition: IfxFce.c:72
IfxFce_Crc
FCE Module Handle;.
Definition: IfxFce_Crc.h:263
IfxDma_setChannelTransferCount
IFX_INLINE void IfxDma_setChannelTransferCount(Ifx_DMA *dma, IfxDma_ChannelId channelId, uint32 transferCount)
Configure the move count of a DMA channel transaction.
Definition: IfxDma.h:1679
IfxFce_Crc_EnabledInterrupts::configError
boolean configError
Specifies enabel/disable of configuration error interrupt.
Definition: IfxFce_Crc.h:252
IfxDma_Dma_ChannelConfig::operationMode
IfxDma_ChannelOperationMode operationMode
keep enable/disable the hardware channel request after a transaction
Definition: IfxDma_Dma.h:492
IfxDma_ChannelIncrementDirection_positive
pointer is incremented
Definition: IfxDma.h:127
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxFce_Crc_EnabledInterrupts::busError
boolean busError
Specifies enabel/disable of bus error interrupt.
Definition: IfxFce_Crc.h:254
IfxFce_Crc_deInitModule
void IfxFce_Crc_deInitModule(IfxFce_Crc_Crc *fce)
Deinitialises the FCE module.
Definition: IfxFce_Crc.c:126
IfxFce_Crc_Crc::crcKernel
IfxFce_CrcKernel crcKernel
Specifies the Crc kernel.
Definition: IfxFce_Crc.h:286
IfxDma_Dma_ChannelConfig
Configuration data structure of the channel.
Definition: IfxDma_Dma.h:480
IfxFce_setChannelCrcLength
IFX_INLINE void IfxFce_setChannelCrcLength(Ifx_FCE *fce, IfxFce_CrcChannel channel, uint32 crcLength)
Set the length of over which CRC checksum is calculated.
Definition: IfxFce.h:244
IfxDma_Dma_initChannel
void IfxDma_Dma_initChannel(IfxDma_Dma_Channel *channel, const IfxDma_Dma_ChannelConfig *config)
initialize the DMA channel
Definition: IfxDma_Dma.c:147
IfxFce_getSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxFce_getSrcPointer(Ifx_FCE *fce)
Returns the SRC pointer for FCE.
Definition: IfxFce.h:237
IfxDma_setChannelDestinationAddress
IFX_INLINE void IfxDma_setChannelDestinationAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId, void *address)
Configure the destination address.
Definition: IfxDma.h:1597
IfxFce_clearCrcErrorFlags
IFX_INLINE void IfxFce_clearCrcErrorFlags(Ifx_FCE *fce, IfxFce_CrcChannel channel)
Specifies pointer to FCE module registers.
Definition: IfxFce.h:204
IfxCpu_getCoreIndex
IFX_INLINE IfxCpu_ResourceCpu IfxCpu_getCoreIndex(void)
API to get cpu index of the caller CPU. Note: This api can be used whereever cpu no/index is needed...
Definition: IfxCpu.h:871
IfxFce_Crc_initModuleConfig
void IfxFce_Crc_initModuleConfig(IfxFce_Crc_Config *config, Ifx_FCE *fce)
Fills the config structure with default values.
Definition: IfxFce_Crc.c:223
IfxDma_setChannelMoveSize
IFX_INLINE void IfxDma_setChannelMoveSize(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelMoveSize moveSize)
Configure a DMA channel move.
Definition: IfxDma.h:1626
IfxDma_ChannelId_none
None of the Ifx_DMA Channels.
Definition: IfxDma_cfg.h:104
IfxFce_Crc_CrcConfig::crcCheckCompared
boolean crcCheckCompared
Specifies whether CRC check comparision is enabled or not.
Definition: IfxFce_Crc.h:294
IfxFce_Crc_CrcConfig::crc32BitReflectionEnabled
boolean crc32BitReflectionEnabled
Specifies enable/disable of CRC 32-bit wise reflection.
Definition: IfxFce_Crc.h:297
IfxFce_getCrcInterruptStatus
IFX_INLINE Ifx_FCE_IN_STS IfxFce_getCrcInterruptStatus(Ifx_FCE *fce, IfxFce_CrcChannel channel)
Gets the CRC interrupt status.
Definition: IfxFce.h:228
IfxFce_setCrcstartValue
IFX_INLINE void IfxFce_setCrcstartValue(Ifx_FCE *fce, IfxFce_CrcChannel channel, uint32 crcStartValue)
Set the CRC start value.
Definition: IfxFce.h:252
IfxFce_Crc_CrcConfig::swapOrderOfBytes
boolean swapOrderOfBytes
Swaps the order of the bytes in the IR input register.
Definition: IfxFce_Crc.h:298
IfxDma_Dma_ChannelConfig::requestMode
IfxDma_ChannelRequestMode requestMode
A service request initiates a single transfer, or the complete transaction.
Definition: IfxDma_Dma.h:491
IfxDma_Dma_ChannelConfig::destinationAddressCircularRange
IfxDma_ChannelIncrementCircular destinationAddressCircularRange
Determines which part of the destination address remains unchanged and therby not updated after each ...
Definition: IfxDma_Dma.h:503
IfxDma_ChannelMoveSize
IfxDma_ChannelMoveSize
DMA move size definition Definition in Ifx_DMA.ME0.CHCR.B.CHDW and Ifx_DMA.ME1.CHCR.B.CHDW.
Definition: IfxDma.h:172
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxDma_Dma_startChannelTransaction
IFX_INLINE void IfxDma_Dma_startChannelTransaction(IfxDma_Dma_Channel *channel)
initiate the DMA move transaction
Definition: IfxDma_Dma.h:765
IfxFce_CrcKernel_0
Specifies to use kernel 0.
Definition: IfxFce.h:91
IfxFce_CrcChannel
IfxFce_CrcChannel
Ifx_FCE_CHx(x= 0,1), Specifies the channel used for CRC.
Definition: IfxFce.h:73
IfxFce_Crc_Crc::crcChannel
IfxFce_CrcChannel crcChannel
Specifies the Crc channel.
Definition: IfxFce_Crc.h:285
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxFce_Crc_EnabledInterrupts::crcMismatch
boolean crcMismatch
Specifies enabel/disable of CRC mismatch interrupt.
Definition: IfxFce_Crc.h:251
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxFce_Crc_getInterruptStatus
Ifx_FCE_IN_STS IfxFce_Crc_getInterruptStatus(IfxFce_Crc_Crc *fce)
Gets the current CRC interrupt status.
Definition: IfxFce_Crc.c:132
IfxFce_Crc_Config::isrPriority
uint16 isrPriority
interrupt priority
Definition: IfxFce_Crc.h:273
IfxFce_Crc_CrcConfig
Specifies the module configuration structure.
Definition: IfxFce_Crc.h:291
IfxDma_ChannelRequestMode_completeTransactionPerRequest
a request initiates a complete transaction
Definition: IfxDma.h:221
IfxDma_ChannelIncrementStep
IfxDma_ChannelIncrementStep
DMA incrementation definition Definition in Ifx_DMA.CH[64].ADICR.B.SMF.
Definition: IfxDma.h:133


iLLD_TC38A: IfxFce_Crc.h Source File

  • Fce
  • Crc
IfxFce_Crc.h
Go to the documentation of this file.
1 /**
2 * \file IfxFce_Crc.h
3 * \brief FCE CRC details
4 * \ingroup IfxLld_Fce
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 * \defgroup IfxLld_Fce_Crc_Usage How to use the FCE CRC Interface driver?
43 * \ingroup IfxLld_Fce
44 *
45 *
46 * FCE gives CRC message signatures. Kernel 0-3 can be used for CRC calculation
47 *
48 * In the following sections it will be described, how to integrate the driver into the application framework.
49 *
50 * \section IfxLld_Fce_Fce_Preparation Preparation
51 * \subsection IfxLld_Fce_Fce_Include Include Files
52 *
53 * Include following header file into your C code:
54 *
55 * \code
56 * #include <Fce/Crc/IfxFce_Crc.h>
57 *
58 * \endcode
59 *
60 * \subsection IfxLld_Fce_Crc_Variables Variables
61 *
62 * Declare the FCE and CRC handles as global variable in your C code:
63 * \code
64 * // used globally
65 * static IfxFce_Crc fce;
66 * static IfxFce_Crc_Crc fceCrc32_0;
67 *
68 *
69 * \endcode
70 *
71 * \subsection IfxLld_Fce_Crc_Interrupt Interrupt Handler Installation
72 *
73 * See also \ref IfxLld_Cpu_Irq_Usage
74 *
75 * Define priorities for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:
76 * \code
77 * // priorities are normally defined in Ifx_IntPrioDef.h
78 * #define IFX_INTPRIO_FCE 1
79 * \endcode
80 *
81 * Add the interrupt service routine to your C code which should do the error flag handling:
82 * \code
83 * IFX_INTERRUPT(fceISR, 0, IFX_INTPRIO_FCE)
84 * {
85 * {
86 * Ifx_FCE_IN_STS interruptStatus = IfxFce_Crc_getInterruptStatus(&fceCrc32_0);
87 * if (interruptStatus.U )
88 * {
89 * if ( interruptStatus.B.CMF == 1)
90 * {
91 * // CRC Mismatch Error...!
92 * }
93 * if( interruptStatus.B.CEF == 1)
94 * {
95 * // Configuration Error...!
96 * }
97 * if ( interruptStatus.B.LEF == 1)
98 * {
99 * // Length Error...!
100 * }
101 * if ( interruptStatus.B.BEF == 1)
102 * {
103 * // Bus Error...!
104 * }
105 * }
106 * IfxFce_Crc_clearErrorFlags(&fceCrc32_0);
107 * }
108 *
109 * }
110 * \endcode
111 *
112 * Finally install the interrupt handler in your initialisation function:
113 * \code
114 * // install interrupt handler
115 * IfxCpu_Irq_installInterruptHandler(fceISR, IFX_INTPRIO_FCE);
116 * IfxCpu_enableInterrupts();
117 * \endcode
118 *
119 * \subsection IfxLld_Fce_Fce_InitCrc Module Initialisation
120 *
121 * The module initialisation can be done in the same function. Here an example for all CRC kernels:
122 * \code
123 * // create module config
124 * IfxFce_Crc_Config fceConfig;
125 * IfxFce_Crc_initModuleConfig(&fceConfig, &MODULE_FCE);
126 *
127 * // ISR priorities and interrupt target
128 * fceConfig.isrPriority = IFX_INTPRIO_FCE;
129 * fceConfig.isrTypeOfService = IfxCpu_Irq_getTos( IfxCpu_getCoreIndex());
130 *
131 * // initialize module
132 * //IfxFce_Crc fce; // defined globally
133 * IfxFce_Crc_initModule(&fce, &fceConfig);
134 *
135 * // initialize CRC kernels
136 * IfxFce_Crc_CrcConfig crcConfig;
137 * IfxFce_Crc_initCrcConfig(&crcConfig, &fce);
138 *
139 *
140 * crcConfig.crcKernel= IfxFce_CrcKernel_3;
141 * IfxFce_Crc_initCrc(&fceCrc32_1, &crcConfig);
142 *
143 *
144 * crcConfig.useDma = TRUE; // Enable Dma transfer
145 * crcConfig.fceChannelId = IfxDma_ChannelId_0;
146 *
147 *
148 * \endcode
149 *
150 *
151 * \subsection IfxLld_Fce_Fce_ErrorIRQ Error Interrupt on CRC mismatch
152 *
153 * By default, all error interrupts aside from the CRC mismatch interrupt (CMF) are enabled.
154 *
155 * In order to use the CMF interrupt as well, the appr. error flag has to be enabled during configuration:
156 * \code
157 * // initialize CRC kernel with CRC check enabled
158 * IfxFce_Crc_CrcConfig crcConfig;
159 * IfxFce_Crc_initCrcConfig(&crcConfig, &fce);
160 * crcConfig.enabledInterrupts.crcMismatch = TRUE;
161 * IfxFce_Crc_initCrc(&fceCrc32_0, &crcConfig);
162 * \endcode
163 *
164 * And the expected CRC value has to be written into the expectedCrc field of the handle before the CRC calculation is started.
165 *
166 * \code
167 * {
168 * // Expected CRC:
169 * fceCrc32_0.expectedCrc = 0xd95def75;
170 *
171 * // do calculation
172 * uint32 fceCrc = IfxFce_Crc_calculateCrc(&fceCrc32_0, checkData, CHECK_DATA_SIZE, 0x00000000);
173 *
174 * // we can expect, that an error interrupt has been triggered if the CRC over checkData didn't match.
175 * }
176 * \endcode
177 *
178 * \subsection IfxLld_Fce_Fce_calculateCrc CRC Calculation
179 *
180 * Now, all 4 FCE kernels are configured and can be used to calculate CRC values.
181 *
182 * In following examples, CRC is calculated over following array:
183 * \code
184 * #define CHECK_DATA_SIZE 25 // declare this portion globally
185 *
186 * // if Dma is enabled, align memory to 32 byte
187 *
188 * uint32 checkData[CHECK_DATA_SIZE] = {
189 * 0xbe9957bb,
190 * 0x1c706c1e,
191 * 0x14c3db3f,
192 * 0x7fb17a93,
193 * 0xb0d9d5a7,
194 * 0x768093e0,
195 * 0x88b206a0,
196 * 0xc51299e4,
197 * 0xe8a97d48,
198 * 0x89367f27,
199 * 0x70095984,
200 * 0xec030f75,
201 * 0xdc22f8d4,
202 * 0xd951407b,
203 * 0x34ae18c6,
204 * 0x4d47ba7d,
205 * 0x0e2e4622,
206 * 0x4a2e90d3,
207 * 0xdaec3752,
208 * 0xcd3ed11c,
209 * 0x36b416b7,
210 * 0x8ea28658,
211 * 0xdd37eee3,
212 * 0x23928b62,
213 * 0x84eb4b22,
214 * };
215 * \endcode
216 *
217 *
218 * \defgroup IfxLld_Fce_Crc CRC
219 * \ingroup IfxLld_Fce
220 * \defgroup IfxLld_Fce_Crc_DataStructures Data Structures
221 * \ingroup IfxLld_Fce_Crc
222 * \defgroup IfxLld_Fce_Crc_Module Module Initialise Functions
223 * \ingroup IfxLld_Fce_Crc
224 * \defgroup IfxLld_Fce_Crc_Operative CRC Operation Functions
225 * \ingroup IfxLld_Fce_Crc
226 * \defgroup IfxLld_Fce_Crc_Interrupt Interrupt Status Function
227 * \ingroup IfxLld_Fce_Crc
228 */
229
230 #ifndef IFXFCE_CRC_H
231 #define IFXFCE_CRC_H 1
232
233 /******************************************************************************/
234 /*----------------------------------Includes----------------------------------*/
235 /******************************************************************************/
236
237 #include "Fce/Std/IfxFce.h"
238 #include "Cpu/Irq/IfxCpu_Irq.h"
239 #include "Dma/Dma/IfxDma_Dma.h"
240
241 /******************************************************************************/
242 /*-----------------------------Data Structures--------------------------------*/
243 /******************************************************************************/
244
245 /** \addtogroup IfxLld_Fce_Crc_DataStructures
246 * \{ */
247 /** \brief Specifies the interrupt enable structure
248 */
249 typedef struct
250 {
251 boolean crcMismatch; /**< \brief Specifies enabel/disable of CRC mismatch interrupt */
252 boolean configError; /**< \brief Specifies enabel/disable of configuration error interrupt */
253 boolean lengthError; /**< \brief Specifies enabel/disable of length error interrupt */
254 boolean busError; /**< \brief Specifies enabel/disable of bus error interrupt */
255 } IfxFce_Crc_EnabledInterrupts;
256
257 /** \} */
258
259 /** \addtogroup IfxLld_Fce_Crc_DataStructures
260 * \{ */
261 /** \brief FCE Module Handle;
262 */
263 typedef struct
264 {
265 Ifx_FCE *fce; /**< \brief Pointer to FCE registers */
266 } IfxFce_Crc;
267
268 /** \brief Configuration structure of the module
269 */
270 typedef struct
271 {
272 Ifx_FCE *fce; /**< \brief Pointer to FCE registers */
273 uint16 isrPriority; /**< \brief interrupt priority */
274 IfxSrc_Tos isrTypeOfService; /**< \brief type of interrupt service */
275 } IfxFce_Crc_Config;
276
277 /** \brief Specifies the pointer to FCE module handler
278 */
279 typedef struct
280 {
281 Ifx_FCE *fce; /**< \brief Specifies pointer to FCE module registers */
282 uint32 expectedCrc; /**< \brief Specifies the expected CRC to be compared with resulted. */
283 IfxDma_Dma_Channel fceDmaChannel; /**< \brief Dma channel handle for Fce. */
284 boolean useDma; /**< \brief Variable indicates Dma usage in Fce. */
285 IfxFce_CrcChannel crcChannel; /**< \brief Specifies the Crc channel */
286 IfxFce_CrcKernel crcKernel; /**< \brief Specifies the Crc kernel */
287 } IfxFce_Crc_Crc;
288
289 /** \brief Specifies the module configuration structure
290 */
291 typedef struct
292 {
293 Ifx_FCE *fce; /**< \brief Specifies pointer to FCE module registers */
294 boolean crcCheckCompared; /**< \brief Specifies whether CRC check comparision is enabled or not */
295 boolean automaticLengthReload; /**< \brief Specifies the enable/disable of automatic length reload */
296 boolean dataByteReflectionEnabled; /**< \brief Specifies enable/disable of input data byte wise reflection */
297 boolean crc32BitReflectionEnabled; /**< \brief Specifies enable/disable of CRC 32-bit wise reflection */
298 boolean swapOrderOfBytes; /**< \brief Swaps the order of the bytes in the IR input register */
299 uint32 expectedCrc; /**< \brief Specifies the expected CRC to be compared with resulted. */
300 boolean crcResultInverted; /**< \brief Specifies the XOR valueto get the final CRC */
301 IfxFce_Crc_EnabledInterrupts enabledInterrupts; /**< \brief Specifies the interrupt enable structure */
302 boolean useDma; /**< \brief Specifies whether Dma is used or not. */
303 IfxDma_ChannelId fceChannelId; /**< \brief Select the Dma channel for Fce operation */
304 IfxFce_CrcChannel crcChannel; /**< \brief Specifies the Crc Channel */
305 IfxFce_CrcKernel crcKernel; /**< \brief Specifies the Crc kernel */
306 } IfxFce_Crc_CrcConfig;
307
308 /** \} */
309
310 /** \addtogroup IfxLld_Fce_Crc_DataStructures
311 * \{ */
312
313 /******************************************************************************/
314 /*-------------------------Global Function Prototypes-------------------------*/
315 /******************************************************************************/
316
317 /** \brief Calculate the XORed CRC value and returns it. It takes the precomputed XORed and reversed.
318 * \param fce Specifies the pointer to FCE module handler
319 * \param crcData Length of the input data block
320 * \param crcDataLength Length of the input data block
321 * \param crcStartValue start value for CRC calculation
322 * \return Final CRC after XORed with XOR value.
323 */
324 IFX_EXTERN uint32 IfxFce_Crc_calculateCrc(IfxFce_Crc_Crc *fce, const uint32 *crcData, uint16 crcDataLength, uint32 crcStartValue);
325
326 /** \} */
327
328 /** \addtogroup IfxLld_Fce_Crc_Module
329 * \{ */
330
331 /******************************************************************************/
332 /*-------------------------Global Function Prototypes-------------------------*/
333 /******************************************************************************/
334
335 /** \brief Deinitialises the FCE module
336 * \param fce Specifies the pointer to FCE module handler
337 * \return None
338 *
339 * Reset the module
340 *
341 * \code
342 * IfxFce_Crc fce;
343 * //Deinitialise the module
344 * IfxFce_Crc_deInitModule(&fce);
345 * \endcode
346 *
347 */
348 IFX_EXTERN void IfxFce_Crc_deInitModule(IfxFce_Crc_Crc *fce);
349
350 /** \brief Initialise the FCE module for CRC computation according to CRC mode
351 * \param fceCrc Specifies the pointer to CRC handle
352 * \param crcConfig Specifies the FCE CRC configuration structure
353 * \return None
354 *
355 * Usage Example: see \ref IfxLld_Fce_Crc_Usage
356 *
357 */
358 IFX_EXTERN void IfxFce_Crc_initCrc(IfxFce_Crc_Crc *fceCrc, const IfxFce_Crc_CrcConfig *crcConfig);
359
360 /** \brief Initialises the default CRC configuration buffer
361 * \param crcConfig Specifies the FCE CRC configuration structure
362 * \param fce Pointer to the FCE module handle
363 * \return None
364 *
365 * Usage Example: see \ref IfxLld_Fce_Crc_Usage
366 *
367 */
368 IFX_EXTERN void IfxFce_Crc_initCrcConfig(IfxFce_Crc_CrcConfig *crcConfig, IfxFce_Crc *fce);
369
370 /** \brief Usage Example: see \ref IfxLld_Fce_Crc_Usage
371 * \param fce module handle
372 * \param config predefined configuration structure of the module
373 * \return None
374 */
375 IFX_EXTERN void IfxFce_Crc_initModule(IfxFce_Crc *fce, const IfxFce_Crc_Config *config);
376
377 /** \brief Fills the config structure with default values
378 * \param config configuration structure of the module
379 * \param fce pointer to FCE registers
380 * \return None
381 *
382 * Usage Example: see \ref IfxLld_Fce_Crc_Usage
383 *
384 */
385 IFX_EXTERN void IfxFce_Crc_initModuleConfig(IfxFce_Crc_Config *config, Ifx_FCE *fce);
386
387 /** \} */
388
389 /** \addtogroup IfxLld_Fce_Crc_Interrupt
390 * \{ */
391
392 /******************************************************************************/
393 /*-------------------------Global Function Prototypes-------------------------*/
394 /******************************************************************************/
395
396 /** \brief Clears the error flags
397 * \param fce Specifies the pointer to FCE module handler
398 * \return None
399 *
400 * Usage Example: see \ref IfxLld_Fce_Crc_Usage
401 *
402 */
403 IFX_EXTERN void IfxFce_Crc_clearErrorFlags(IfxFce_Crc_Crc *fce);
404
405 /** \} */
406
407 /******************************************************************************/
408 /*-------------------------Global Function Prototypes-------------------------*/
409 /******************************************************************************/
410
411 /** \brief Gets the current CRC interrupt status.
412 * \param fce Specifies the pointer to FCE module handler
413 * \return Current interrupt status
414 */
415 IFX_EXTERN Ifx_FCE_IN_STS IfxFce_Crc_getInterruptStatus(IfxFce_Crc_Crc *fce);
416
417 #endif /* IFXFCE_CRC_H */
IfxFce_Crc_Config::isrTypeOfService
IfxSrc_Tos isrTypeOfService
type of interrupt service
Definition: IfxFce_Crc.h:274
IfxDma_ChannelId
IfxDma_ChannelId
DMA channel resources definition.
Definition: IfxDma_cfg.h:102
IfxFce_Crc_EnabledInterrupts
Specifies the interrupt enable structure.
Definition: IfxFce_Crc.h:249
IfxFce_Crc::fce
Ifx_FCE * fce
Pointer to FCE registers.
Definition: IfxFce_Crc.h:265
IfxFce_CrcKernel
IfxFce_CrcKernel
Specify the CRC kernel used by the fce channel.
Definition: IfxFce.h:89
IfxFce_Crc_Crc::useDma
boolean useDma
Variable indicates Dma usage in Fce.
Definition: IfxFce_Crc.h:284
IfxFce_Crc_Crc
Specifies the pointer to FCE module handler.
Definition: IfxFce_Crc.h:279
IfxFce_Crc_getInterruptStatus
IFX_EXTERN Ifx_FCE_IN_STS IfxFce_Crc_getInterruptStatus(IfxFce_Crc_Crc *fce)
Gets the current CRC interrupt status.
Definition: IfxFce_Crc.c:132
IfxFce_Crc_Crc::fceDmaChannel
IfxDma_Dma_Channel fceDmaChannel
Dma channel handle for Fce.
Definition: IfxFce_Crc.h:283
IfxDma_Dma.h
DMA DMA details.
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxFce_Crc_Crc::expectedCrc
uint32 expectedCrc
Specifies the expected CRC to be compared with resulted.
Definition: IfxFce_Crc.h:282
IfxFce_Crc_initCrcConfig
IFX_EXTERN void IfxFce_Crc_initCrcConfig(IfxFce_Crc_CrcConfig *crcConfig, IfxFce_Crc *fce)
Initialises the default CRC configuration buffer.
Definition: IfxFce_Crc.c:190
IfxFce_Crc_EnabledInterrupts::lengthError
boolean lengthError
Specifies enabel/disable of length error interrupt.
Definition: IfxFce_Crc.h:253
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxFce_Crc_initCrc
IFX_EXTERN void IfxFce_Crc_initCrc(IfxFce_Crc_Crc *fceCrc, const IfxFce_Crc_CrcConfig *crcConfig)
Initialise the FCE module for CRC computation according to CRC mode.
Definition: IfxFce_Crc.c:138
IfxFce_Crc_CrcConfig::automaticLengthReload
boolean automaticLengthReload
Specifies the enable/disable of automatic length reload.
Definition: IfxFce_Crc.h:295
IfxFce_Crc_clearErrorFlags
IFX_EXTERN void IfxFce_Crc_clearErrorFlags(IfxFce_Crc_Crc *fce)
Clears the error flags.
Definition: IfxFce_Crc.c:120
IfxFce_Crc_CrcConfig::dataByteReflectionEnabled
boolean dataByteReflectionEnabled
Specifies enable/disable of input data byte wise reflection.
Definition: IfxFce_Crc.h:296
IfxFce_Crc_CrcConfig::crcResultInverted
boolean crcResultInverted
Specifies the XOR valueto get the final CRC.
Definition: IfxFce_Crc.h:300
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxFce_Crc_calculateCrc
IFX_EXTERN uint32 IfxFce_Crc_calculateCrc(IfxFce_Crc_Crc *fce, const uint32 *crcData, uint16 crcDataLength, uint32 crcStartValue)
Calculate the XORed CRC value and returns it. It takes the precomputed XORed and reversed.
Definition: IfxFce_Crc.c:53
IfxFce_Crc_CrcConfig::enabledInterrupts
IfxFce_Crc_EnabledInterrupts enabledInterrupts
Specifies the interrupt enable structure.
Definition: IfxFce_Crc.h:301
IfxFce_Crc_Config
Configuration structure of the module.
Definition: IfxFce_Crc.h:270
IfxFce_Crc_initModule
IFX_EXTERN void IfxFce_Crc_initModule(IfxFce_Crc *fce, const IfxFce_Crc_Config *config)
Usage Example: see How to use the FCE CRC Interface driver?.
Definition: IfxFce_Crc.c:210
IfxFce_Crc_CrcConfig::fceChannelId
IfxDma_ChannelId fceChannelId
Select the Dma channel for Fce operation.
Definition: IfxFce_Crc.h:303
IfxFce_Crc
FCE Module Handle;.
Definition: IfxFce_Crc.h:263
IfxFce_Crc_EnabledInterrupts::configError
boolean configError
Specifies enabel/disable of configuration error interrupt.
Definition: IfxFce_Crc.h:252
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxFce_Crc_EnabledInterrupts::busError
boolean busError
Specifies enabel/disable of bus error interrupt.
Definition: IfxFce_Crc.h:254
IfxFce_Crc_deInitModule
IFX_EXTERN void IfxFce_Crc_deInitModule(IfxFce_Crc_Crc *fce)
Deinitialises the FCE module.
Definition: IfxFce_Crc.c:126
IfxFce_Crc_Crc::crcKernel
IfxFce_CrcKernel crcKernel
Specifies the Crc kernel.
Definition: IfxFce_Crc.h:286
IfxFce_Crc_initModuleConfig
IFX_EXTERN void IfxFce_Crc_initModuleConfig(IfxFce_Crc_Config *config, Ifx_FCE *fce)
Fills the config structure with default values.
Definition: IfxFce_Crc.c:223
IfxFce_Crc_CrcConfig::crcCheckCompared
boolean crcCheckCompared
Specifies whether CRC check comparision is enabled or not.
Definition: IfxFce_Crc.h:294
IfxFce_Crc_CrcConfig::crc32BitReflectionEnabled
boolean crc32BitReflectionEnabled
Specifies enable/disable of CRC 32-bit wise reflection.
Definition: IfxFce_Crc.h:297
IfxCpu_Irq.h
This file contains the APIs for Interrupt related functions.
IfxFce_Crc_CrcConfig::swapOrderOfBytes
boolean swapOrderOfBytes
Swaps the order of the bytes in the IR input register.
Definition: IfxFce_Crc.h:298
IfxFce.h
FCE basic functionality.
IfxFce_CrcChannel
IfxFce_CrcChannel
Ifx_FCE_CHx(x= 0,1), Specifies the channel used for CRC.
Definition: IfxFce.h:73
IfxFce_Crc_Crc::crcChannel
IfxFce_CrcChannel crcChannel
Specifies the Crc channel.
Definition: IfxFce_Crc.h:285
IfxDma_Dma_Channel
Channel handle.
Definition: IfxDma_Dma.h:471
IfxFce_Crc_EnabledInterrupts::crcMismatch
boolean crcMismatch
Specifies enabel/disable of CRC mismatch interrupt.
Definition: IfxFce_Crc.h:251
IfxFce_Crc_Config::isrPriority
uint16 isrPriority
interrupt priority
Definition: IfxFce_Crc.h:273
IfxFce_Crc_CrcConfig
Specifies the module configuration structure.
Definition: IfxFce_Crc.h:291


iLLD_TC38A: IfxFce_cfg.h Source File

  • _Impl
IfxFce_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxFce_cfg.h
3 * \brief FCE on-chip implementation data
4 * \ingroup IfxLld_Fce
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Fce FCE
42 * \ingroup IfxLld
43 * \defgroup IfxLld_Fce_Impl Implementation
44 * \ingroup IfxLld_Fce
45 * \defgroup IfxLld_Fce_Std Standard Driver
46 * \ingroup IfxLld_Fce
47 */
48
49 #ifndef IFXFCE_CFG_H
50 #define IFXFCE_CFG_H 1
51
52 /******************************************************************************/
53 /*----------------------------------Includes----------------------------------*/
54 /******************************************************************************/
55
56 /******************************************************************************/
57 /*-----------------------------------Macros-----------------------------------*/
58 /******************************************************************************/
59
60 #define IFXFCE_NUM_KERNEL (4)
61
62 #define IFXFCE_NUM_MODULES (1)
63
64 #endif /* IFXFCE_CFG_H */


iLLD_TC38A: IfxFlash.c Source File

  • Flash
  • Std
IfxFlash.c
Go to the documentation of this file.
1 /**
2 * \file IfxFlash.c
3 * \brief FLASH basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 *
41 */
42
43 /******************************************************************************/
44 /*----------------------------------Includes----------------------------------*/
45 /******************************************************************************/
46
47 #include "IfxFlash.h"
48
49 /******************************************************************************/
50 /*-------------------------Function Implementations---------------------------*/
51 /******************************************************************************/
52
53 void IfxFlash_disableWriteProtection(uint32 flash, IfxFlash_UcbType ucb, uint32 *password)
54 {
55 IFX_UNUSED_PARAMETER(flash);
56 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0x553c);
57 uint32 i;
58
59 *addr1 = ucb;
60
61 for (i = 0; i < 8; i++)
62 {
63 *addr1 = password[i];
64 }
65
66 __dsync();
67 }
IfxFlash_disableWriteProtection
void IfxFlash_disableWriteProtection(uint32 flash, IfxFlash_UcbType ucb, uint32 *password)
The password protection of the selected UCB (if this UCB offers this feature) is temporarily disabled...
Definition: IfxFlash.c:53
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxFlash_UcbType
IfxFlash_UcbType
user configuration block type
Definition: IfxFlash_cfg.h:220
IfxFlash.h
FLASH basic functionality.
__dsync
void __dsync(void) __attribute__((intrinsic_function(0x103
IFXFLASH_CMD_BASE_ADDRESS
#define IFXFLASH_CMD_BASE_ADDRESS
base address for general command sequences
Definition: IfxFlash_cfg.h:69
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222


iLLD_TC38A: IfxFlash.h Source File

  • Flash
  • Std
IfxFlash.h
Go to the documentation of this file.
1 /**
2 * \file IfxFlash.h
3 * \brief FLASH basic functionality
4 * \ingroup IfxLld_Flash
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 * \defgroup IfxLld_Flash_Std_Enumerations Enumerations
43 * \ingroup IfxLld_Flash_Std
44 * \defgroup IfxLld_Flash_Std_CommandSequence CommandSequence Functions
45 * \ingroup IfxLld_Flash_Std
46 */
47
48 #ifndef IFXFLAS_H
49 #define IFXFLAS_H 1
50
51 /******************************************************************************/
52 /*----------------------------------Includes----------------------------------*/
53 /******************************************************************************/
54
55 #include "_Impl/IfxFlash_cfg.h"
56 #include "_Utilities/Ifx_Assert.h"
57 #include "IfxDmu_reg.h"
58
59 /******************************************************************************/
60 /*--------------------------------Enumerations--------------------------------*/
61 /******************************************************************************/
62
63 /** \addtogroup IfxLld_Flash_Std_Enumerations
64 * \{ */
65 /** \} */
66
67 /** \addtogroup IfxLld_Flash_Std_CommandSequence
68 * \{ */
69
70 /******************************************************************************/
71 /*-------------------------Inline Function Prototypes-------------------------*/
72 /******************************************************************************/
73
74 /** \brief Performs the "Clear Status" sequence. Operation and error flags are cleared.
75 * \param flash selects the flash (PMU) module
76 * \return None
77 */
78 IFX_INLINE void IfxFlash_clearStatus(uint32 flash);
79
80 /** \brief Performs the sequence for entering program page mode
81 * \param pageAddr pageAddr specifies the page being written - the command sequence will be varied accordingly
82 * \return 0 on success, != 0 if invalid or not available page is selected
83 *
84 * Usage Example:
85 * \code
86 *
87 * unsigned int pageAddr = IFXFLASH_DFLASH_START + page*IFXFLASH_DFLASH_PAGE_LENGTH;
88 *
89 * // enter page mode
90 * IfxFlash_enterPageMode(pageAddr);
91 *
92 * \endcode
93 *
94 */
95 IFX_INLINE uint8 IfxFlash_enterPageMode(uint32 pageAddr);
96
97 /** \brief Performs the erase sequence for n sectors in program or data flash
98 * \param sectorAddr sector address
99 * \param numSector the no.of sectors to be erased
100 * \return None
101 *
102 * Usage Example:
103 * \code
104 *
105 * // erase logical sectors of program flash
106 * IfxFlash_eraseMultipleSectors(pFlashTableLog[sector].start,2);
107 *
108 * \endcode
109 *
110 */
111 IFX_INLINE void IfxFlash_eraseMultipleSectors(uint32 sectorAddr, uint32 numSector);
112
113 /** \brief Performs the erase sequence for a sector in program or data flash.
114 * \param sectorAddr sector address
115 * \return None
116 *
117 * Usage Example:
118 * \code
119 *
120 *
121 * // erase all sectors of program flash
122 * for(sector=0; sector<IFXFLASH_PFLASH_NO_OF_LOG_SECTORS; ++sector) {
123 * // get address from predefined table
124 * unsigned int sector_addr = pFlashTableLog[sector].start;
125 * // erase sector
126 * IfxFlash_eraseSector(sector_addr);
127 * }
128 *
129 *
130 * \endcode
131 *
132 */
133 IFX_INLINE void IfxFlash_eraseSector(uint32 sectorAddr);
134
135 /** \brief Performs the "Erase Verify" sequence for multiple sectors
136 * \param sectorAddr sector address which should be verified
137 * \param numSector no.of sectors to be operated on
138 * \return None
139 */
140 IFX_INLINE void IfxFlash_eraseVerifyMultipleSectors(uint32 sectorAddr, uint32 numSector);
141
142 /** \brief Performs the "Erase Verify" sequence
143 * \param sectorAddr sector address which should be verified
144 * \return None
145 */
146 IFX_INLINE void IfxFlash_eraseVerifySector(uint32 sectorAddr);
147
148 /** \brief performs a load page sequence with a single 64bit access
149 * \param pageAddr pageAddr start address of page which should be programmed
150 * \param wordL Lower Address word
151 * \param wordU Upper address word
152 * \return None
153 *
154 * Usage Example:
155 * \code
156 *
157 * // load 64bit into assembly buffer of program flash
158 * IfxFlash_loadPage(IFXFLASH_PFLASH_START, 0x55555555, 0xaaaaaaaa);
159 *
160 * // load 64bit into assembly buffer of data flash
161 * IfxFlash_loadPage(0XAF000000, 0x55555555, 0xaaaaaaaa);
162 * \endcode
163 *
164 */
165 IFX_INLINE void IfxFlash_loadPage(uint32 pageAddr, uint32 wordL, uint32 wordU);
166
167 /** \brief performs a load page sequence with two 32bit accesses
168 * \param pageAddr pageAddr start address of page which should be programmed
169 * \param wordL Lower Address word
170 * \param wordU Upper Address word
171 * \return None
172 *
173 * Usage Example:
174 * \code
175 *
176 * // load 2*32bit into assembly buffer of program flash
177 * IfxFlash_loadPage2X32(IFXFLASH_PFLASH_START, 0x55555555, 0xaaaaaaaa);
178 *
179 * // load 2*32bit into assembly buffer of data flash
180 * IfxFlash_loadPage2X32(0XAF000000, 0x55555555, 0xaaaaaaaa);
181 * \endcode
182 *
183 */
184 IFX_INLINE void IfxFlash_loadPage2X32(uint32 pageAddr, uint32 wordL, uint32 wordU);
185
186 /** \brief reset to read mode
187 * \param flash flash selects the flash (PMU) module
188 * \return None
189 *
190 * Usage Example:
191 * \code
192 *
193 * // reset to read mode
194 * IfxFlash_resetToRead(0);
195 *
196 * \endcode
197 *
198 */
199 IFX_INLINE void IfxFlash_resetToRead(uint32 flash);
200
201 /** \brief Performs the "Resume Protection" sequence
202 * \param flash selects the flash (PMU) module
203 * \return None
204 */
205 IFX_INLINE void IfxFlash_resumeProtection(uint32 flash);
206
207 /** \brief Performs the "Suspend Resume" sequence for multiple sectors
208 * \param sectorAddr sector address
209 * \param numSector the no.of sectors to be operated on
210 * \return None
211 */
212 IFX_INLINE void IfxFlash_suspendResumeMultipleSectors(uint32 sectorAddr, uint32 numSector);
213
214 /** \brief Performs the "Suspend Resume" sequence
215 * \param sectorAddr sector address which should be resumed
216 * \return None
217 */
218 IFX_INLINE void IfxFlash_suspendResumeSector(uint32 sectorAddr);
219
220 /** \brief The function issues command sequence for User Content count.The result of this function is dependent on the difference of the number of logic 1 bits in the selected pages at the erase-verify condition (N_dv) and at the selected control gate voltage (N_pv). Calling this function with different control gate voltages allows calculation of the Vth distribution
221 * \param wordAddr word address
222 * \return None
223 */
224 IFX_INLINE void IfxFlash_userContentCount(uint32 wordAddr);
225
226 /** \brief The function issues command sequence for User Margin Count. The result of this function is the number of logic 1 bits in the selected pages at the selected reference current. Calling this function with different reference currents allows calculation of the cell current distribution.
227 * \param wordAddr word address
228 * \return None
229 */
230 IFX_INLINE void IfxFlash_userMarginCount(uint32 wordAddr);
231
232 /** \brief The function issues command sequence for User Vth Count.The result of this function is the number of logic 1 bits in the selected pages at the selected control gate voltage. Calling this function with different control gate voltages allows calculation of the Vth distribution.
233 * \param wordAddr word address
234 * \return None
235 */
236 IFX_INLINE void IfxFlash_userVthCount(uint32 wordAddr);
237
238 /** \brief Performs the "Verify Erased Block (page)" sequence. This command verifies if one page addressed by "PA" is correctly erased, i.e. contain 0 data and ECC bits
239 * \param pageAddr page address which should be verified
240 * \return None
241 */
242 IFX_INLINE void IfxFlash_verifyErasedPage(uint32 pageAddr);
243
244 /** \brief Performs the "Verify Erased WL" sequence.This command verifies if one word line addressed by "WA" is correctly erased, i.e. contain 0 data and ECC bits
245 * \param wordLineAddr word line address which should be verified
246 * \return None
247 */
248 IFX_INLINE void IfxFlash_verifyErasedWordLine(uint32 wordLineAddr);
249
250 /** \brief Polls the selected status flag in flash status register until it turns to 0
251 * \param flash selects the flash (PMU) module
252 * \param flashType selects the flash type
253 * \return 0 on success, != 0 if invalid or not available page is selected
254 *
255 * Usage Example:
256 * \code
257 *
258 * // wait until data flash 0 is unbusy
259 * IfxFlash_waitUnbusy(0, IfxFlash_FlashType_D0);
260 *
261 * \endcode
262 *
263 */
264 IFX_INLINE uint8 IfxFlash_waitUnbusy(uint32 flash, IfxFlash_FlashType flashType);
265
266 /** \brief Performs the "Write Burst" sequence, similar to write page but performs a burst transfer instead of page.Make sure the appropriate amount of data is loaded using load page command
267 * \param pageAddr start address of page which should be programmed
268 * \return None
269 *
270 * Usage Example:
271 * \code
272 *
273 * // program the second page of the first sector of the Program Flash
274 * IfxFlash_writeBurst(0xa0000100);
275 *
276 * \endcode
277 *
278 */
279 IFX_INLINE void IfxFlash_writeBurst(uint32 pageAddr);
280
281 /** \brief Performs the "Write Burst once" sequence. The command starts the programming process for an aligned group of pages as the normal "Write Burst" does. But before programming it checks if the pages are erased. If the page is not erased (allowing correctable errors) the command fails with PVER and EVER.
282 * The command is only supported for PFlash. On sectors with "write-once" protection only this write command can be applied.
283 * \param pageAddr start address of page which should be programmed
284 * \return None
285 *
286 * Usage Example:
287 * \code
288 *
289 * // program the second page of the first sector of the Program Flash
290 * IfxFlash_writeBurstOnce(0xa0000100);
291 *
292 * \endcode
293 *
294 */
295 IFX_INLINE void IfxFlash_writeBurstOnce(uint32 pageAddr);
296
297 /** \brief Performs the "Write Page" sequence
298 * \param pageAddr start address of page which should be programmed
299 * \return None
300 *
301 * Usage Example:
302 * \code
303 *
304 * // program the second page of the first sector of the Program Flash
305 * IfxFlash_writePage(0xa0000100);
306 *
307 * \endcode
308 *
309 */
310 IFX_INLINE void IfxFlash_writePage(uint32 pageAddr);
311
312 /** \brief Performs the "Write Page Once" sequence, similar to write page but performs a program verify after writing.
313 * \param pageAddr start address of page which should be programmed
314 * \return None
315 *
316 * Usage Example:
317 * \code
318 *
319 * // program the second page of the first sector of the Program Flash
320 * IfxFlash_writePageOnce(0xa0000100);
321 *
322 * \endcode
323 *
324 */
325 IFX_INLINE void IfxFlash_writePageOnce(uint32 pageAddr);
326
327 /******************************************************************************/
328 /*-------------------------Global Function Prototypes-------------------------*/
329 /******************************************************************************/
330
331 /** \brief The password protection of the selected UCB (if this UCB offers this feature) is temporarily disabled. The command fails by setting PROER when any of the supplied PWs does not match. In this case until the next application reset all further calls of "Disable Protection" fail with PROER independent of the supplied password.
332 * \param flash selects the flash (PMU) module
333 * \param ucb selects the user configuration block (0 for UCB0, 1 for UCB1, 5 for UCB_HSMC)
334 * \param password password pointer to an array of 8 words
335 * \return None
336 */
337 IFX_EXTERN void IfxFlash_disableWriteProtection(uint32 flash, IfxFlash_UcbType ucb, uint32 *password);
338
339 /** \} */
340
341 /******************************************************************************/
342 /*-------------------------Inline Function Prototypes-------------------------*/
343 /******************************************************************************/
344
345 /** \brief This function will wait till all the flash banks are out of busy state
346 * \return Return 0 on success.Success means none of the flash banks are in busy state.
347 */
348 IFX_INLINE boolean IfxFlash_waitUnbusyAll(void);
349
350 /** \brief Enter Flash Cranking Mode.
351 * \return None
352 */
353 IFX_INLINE void IfxFlash_enterCrankingMode(void);
354
355 /** \brief Exit Flash Cranking Mode.
356 * \return None
357 */
358 IFX_INLINE void IfxFlash_exitCrankingMode(void);
359
360 /**
361 * \return None
362 */
363 IFX_INLINE void IfxFlash_enterDemandMode(void);
364
365 /**
366 * \return None
367 */
368 IFX_INLINE void IfxFlash_exitDemandMode(void);
369
370 /**
371 * \return None
372 */
373 IFX_INLINE void IfxFlash_enterDynamicIdleMode(void);
374
375 /**
376 * \return None
377 */
378 IFX_INLINE void IfxFlash_exitDynamicIdleMode(void);
379
380 /** \brief Returns if Flash is in Cranking Mode.
381 * TRUE - Flash is in Cranking Mode
382 * FALSE - Flash is not in Cranking Mode
383 * \return Returns if Flash is in Cranking mode or not
384 * TRUE - Flash is in Cranking Mode
385 * FALSE - Flash is not in Cranking Mode
386 */
387 IFX_INLINE boolean IfxFlash_isCrankingMode(void);
388
389 /** \brief Returns if Flash is in Demand mode or not
390 * TRUE - Flash is in Demand Mode
391 * FALSE - Flash is not in Demand Mode
392 * \return Returns if Flash is in Demand mode or not
393 * TRUE - Flash is in Demand Mode
394 * FALSE - Flash is not in Demand Mode
395 */
396 IFX_INLINE boolean IfxFlash_isDemandMode(void);
397
398 /** \brief Returns if Flash is in Dynamic Idle mode or not
399 * TRUE - Flash is in Dynamic Idle Mode
400 * FALSE - Flash is not in Dynamic Idle Mode
401 * \return Returns if Flash is in Dynamic Idle mode or not
402 * TRUE - Flash is in Dynamic Idle Mode
403 * FALSE - Flash is not in Dynamic Idle Mode
404 */
405 IFX_INLINE boolean IfxFlash_isDynamicIdleMode(void);
406
407 /**
408 * \param pageAddr start address of page which should be programmed
409 * \return None
410 */
411 IFX_INLINE void IfxFlash_replaceLogicalSector(uint32 pageAddr);
412
413 /******************************************************************************/
414 /*---------------------Inline Function Implementations------------------------*/
415 /******************************************************************************/
416
417 IFX_INLINE void IfxFlash_clearStatus(uint32 flash)
418 {
419 IFX_UNUSED_PARAMETER(flash);
420 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0x5554);
421
422 *addr1 = 0xFA;
423
424 __dsync();
425 }
426
427
428 IFX_INLINE uint8 IfxFlash_enterPageMode(uint32 pageAddr)
429 {
430 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0x5554);
431
432 if ((pageAddr & 0xff000000) == 0xa0000000) // program flash
433 {
434 *addr1 = 0x50;
435 return 0;
436 }
437 else if ((pageAddr & 0xff000000) == 0xaf000000) // data flash
438 {
439 *addr1 = 0x5D;
440 return 0;
441 }
442
443 __dsync();
444 return 1; // invalid flash address
445 }
446
447
448 IFX_INLINE void IfxFlash_eraseMultipleSectors(uint32 sectorAddr, uint32 numSector)
449 {
450 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa50);
451 volatile uint32 *addr2 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa58);
452 volatile uint32 *addr3 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
453 volatile uint32 *addr4 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
454
455 *addr1 = sectorAddr;
456 *addr2 = numSector;
457 *addr3 = 0x80;
458 *addr4 = 0x50;
459
460 __dsync();
461 }
462
463
464 IFX_INLINE void IfxFlash_eraseSector(uint32 sectorAddr)
465 {
466 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa50);
467 volatile uint32 *addr2 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa58);
468 volatile uint32 *addr3 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
469 volatile uint32 *addr4 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
470
471 *addr1 = sectorAddr;
472 *addr2 = 1;
473 *addr3 = 0x80;
474 *addr4 = 0x50;
475
476 __dsync();
477 }
478
479
480 IFX_INLINE void IfxFlash_eraseVerifyMultipleSectors(uint32 sectorAddr, uint32 numSector)
481 {
482 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa50);
483 volatile uint32 *addr2 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa58);
484 volatile uint32 *addr3 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
485 volatile uint32 *addr4 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
486
487 *addr1 = sectorAddr;
488 *addr2 = numSector;
489 *addr3 = 0x80;
490 *addr4 = 0x5F;
491
492 __dsync();
493 }
494
495
496 IFX_INLINE void IfxFlash_eraseVerifySector(uint32 sectorAddr)
497 {
498 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa50);
499 volatile uint32 *addr2 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa58);
500 volatile uint32 *addr3 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
501 volatile uint32 *addr4 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
502
503 *addr1 = sectorAddr;
504 *addr2 = 1;
505 *addr3 = 0x80;
506 *addr4 = 0x5F;
507
508 __dsync();
509 }
510
511
512 IFX_INLINE void IfxFlash_loadPage(uint32 pageAddr, uint32 wordL, uint32 wordU)
513 {
514 IFX_UNUSED_PARAMETER(pageAddr);
515 uint64 *addr1 = (uint64 *)(IFXFLASH_CMD_BASE_ADDRESS | 0x55f0);
516
517 __st64_lu(addr1, wordL, wordU);
518
519 __dsync();
520 }
521
522
523 IFX_INLINE void IfxFlash_loadPage2X32(uint32 pageAddr, uint32 wordL, uint32 wordU)
524 {
525 IFX_UNUSED_PARAMETER(pageAddr);
526
527 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0x55f0);
528
529 *addr1 = wordL;
530 addr1++;
531 *addr1 = wordU;
532
533 __dsync();
534 }
535
536
537 IFX_INLINE void IfxFlash_resetToRead(uint32 flash)
538 {
539 IFX_UNUSED_PARAMETER(flash);
540 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0x5554);
541 *addr1 = 0xf0;
542
543 __dsync();
544 }
545
546
547 IFX_INLINE void IfxFlash_resumeProtection(uint32 flash)
548 {
549 IFX_UNUSED_PARAMETER(flash);
550
551 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0x5554);
552
553 *addr1 = 0xF5;
554
555 __dsync();
556 }
557
558
559 IFX_INLINE void IfxFlash_suspendResumeMultipleSectors(uint32 sectorAddr, uint32 numSector)
560 {
561 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa50);
562 volatile uint32 *addr2 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa58);
563 volatile uint32 *addr3 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
564 volatile uint32 *addr4 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
565
566 *addr1 = sectorAddr;
567 *addr2 = numSector;
568 *addr3 = 0x70;
569 *addr4 = 0xCC;
570
571 __dsync();
572 }
573
574
575 IFX_INLINE void IfxFlash_suspendResumeSector(uint32 sectorAddr)
576 {
577 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa50);
578 volatile uint32 *addr2 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa58);
579 volatile uint32 *addr3 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
580 volatile uint32 *addr4 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
581
582 *addr1 = sectorAddr;
583 *addr2 = 1;
584 *addr3 = 0x70;
585 *addr4 = 0xCC;
586
587 __dsync();
588 }
589
590
591 IFX_INLINE void IfxFlash_userContentCount(uint32 wordAddr)
592 {
593 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa50);
594 volatile uint32 *addr2 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa58);
595 volatile uint32 *addr3 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
596 volatile uint32 *addr4 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
597
598 *addr1 = wordAddr;
599 *addr2 = 0x00;
600 *addr3 = 0x60;
601 *addr4 = 0x14;
602 __dsync();
603 }
604
605
606 IFX_INLINE void IfxFlash_userMarginCount(uint32 wordAddr)
607 {
608 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa50);
609 volatile uint32 *addr2 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa58);
610 volatile uint32 *addr3 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
611 volatile uint32 *addr4 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
612
613 *addr1 = wordAddr;
614 *addr2 = 0x00;
615 *addr3 = 0x60;
616 *addr4 = 0x11;
617 __dsync();
618 }
619
620
621 IFX_INLINE void IfxFlash_userVthCount(uint32 wordAddr)
622 {
623 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa50);
624 volatile uint32 *addr2 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa58);
625 volatile uint32 *addr3 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
626 volatile uint32 *addr4 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
627
628 *addr1 = wordAddr;
629 *addr2 = 0x00;
630 *addr3 = 0x60;
631 *addr4 = 0x12;
632 __dsync();
633 }
634
635
636 IFX_INLINE void IfxFlash_verifyErasedPage(uint32 pageAddr)
637 {
638 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa50);
639 volatile uint32 *addr2 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa58);
640 volatile uint32 *addr3 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
641 volatile uint32 *addr4 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
642
643 *addr1 = pageAddr;
644 *addr2 = 00;
645 *addr3 = 0x80;
646 *addr4 = 0x56;
647
648 __dsync();
649 }
650
651
652 IFX_INLINE void IfxFlash_verifyErasedWordLine(uint32 wordLineAddr)
653 {
654 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa50);
655 volatile uint32 *addr2 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa58);
656 volatile uint32 *addr3 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
657 volatile uint32 *addr4 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
658
659 *addr1 = wordLineAddr;
660 *addr2 = 00;
661 *addr3 = 0x80;
662 *addr4 = 0x58;
663
664 __dsync();
665 }
666
667
668 IFX_INLINE uint8 IfxFlash_waitUnbusy(uint32 flash, IfxFlash_FlashType flashType)
669 {
670 if (flash == 0)
671 {
672 while (DMU_HF_STATUS.U & (1 << flashType))
673 {}
674 }
675 else
676 {
677 return 1; /*invalid flash selected */
678 }
679
680 __dsync();
681 return 0; /* finished */
682 }
683
684
685 IFX_INLINE void IfxFlash_writeBurst(uint32 pageAddr)
686 {
687 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa50);
688 volatile uint32 *addr2 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa58);
689 volatile uint32 *addr3 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
690 volatile uint32 *addr4 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
691
692 *addr1 = pageAddr;
693 *addr2 = 0x00;
694 *addr3 = 0xa0;
695 *addr4 = 0xa6;
696
697 __dsync();
698 }
699
700
701 IFX_INLINE void IfxFlash_writeBurstOnce(uint32 pageAddr)
702 {
703 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa50);
704 volatile uint32 *addr2 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa58);
705 volatile uint32 *addr3 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
706 volatile uint32 *addr4 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
707
708 *addr1 = pageAddr;
709 *addr2 = 0x00;
710 *addr3 = 0xa0;
711 *addr4 = 0xa4;
712
713 __dsync();
714 }
715
716
717 IFX_INLINE void IfxFlash_writePage(uint32 pageAddr)
718 {
719 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa50);
720 volatile uint32 *addr2 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa58);
721 volatile uint32 *addr3 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
722 volatile uint32 *addr4 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
723
724 *addr1 = pageAddr;
725 *addr2 = 0x00;
726 *addr3 = 0xa0;
727 *addr4 = 0xaa;
728
729 __dsync();
730 }
731
732
733 IFX_INLINE void IfxFlash_writePageOnce(uint32 pageAddr)
734 {
735 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa50);
736 volatile uint32 *addr2 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa58);
737 volatile uint32 *addr3 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
738 volatile uint32 *addr4 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
739
740 *addr1 = pageAddr;
741 *addr2 = 0x00;
742 *addr3 = 0xa0;
743 *addr4 = 0xa8;
744
745 __dsync();
746 }
747
748
749 IFX_INLINE boolean IfxFlash_waitUnbusyAll(void)
750 {
751 while (DMU_HF_STATUS.U & 0x3FU)
752 {}
753
754 __dsync();
755 return 0;
756 }
757
758
759 IFX_INLINE void IfxFlash_enterCrankingMode(void)
760 {
761 DMU_HF_CCONTROL.B.CRANKING = 3U;
762 __dsync();
763 }
764
765
766 IFX_INLINE void IfxFlash_exitCrankingMode(void)
767 {
768 DMU_HF_CCONTROL.B.CRANKING = 0U;
769 __dsync();
770 }
771
772
773 IFX_INLINE void IfxFlash_enterDemandMode(void)
774 {
775 DMU_HF_PCONTROL.B.DEMAND = 3U;
776 __dsync();
777 }
778
779
780 IFX_INLINE void IfxFlash_exitDemandMode(void)
781 {
782 DMU_HF_PCONTROL.B.DEMAND = 0U;
783 __dsync();
784 }
785
786
787 IFX_INLINE void IfxFlash_enterDynamicIdleMode(void)
788 {
789 DMU_HF_PCONTROL.B.IDLE = 3U;
790 __dsync();
791 }
792
793
794 IFX_INLINE void IfxFlash_exitDynamicIdleMode(void)
795 {
796 DMU_HF_PCONTROL.B.IDLE = 0U;
797 __dsync();
798 }
799
800
801 IFX_INLINE boolean IfxFlash_isCrankingMode(void)
802 {
803 return (boolean)(DMU_HF_CCONTROL.B.CRANKING == 0x3U);
804 }
805
806
807 IFX_INLINE boolean IfxFlash_isDemandMode(void)
808 {
809 return (boolean)(DMU_HF_PSTATUS.B.DEMAND == 1U);
810 }
811
812
813 IFX_INLINE boolean IfxFlash_isDynamicIdleMode(void)
814 {
815 return (boolean)(DMU_HF_PSTATUS.B.IDLE == 1U);
816 }
817
818
819 IFX_INLINE void IfxFlash_replaceLogicalSector(uint32 pageAddr)
820 {
821 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa50);
822 volatile uint32 *addr2 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa58);
823 volatile uint32 *addr3 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
824 volatile uint32 *addr4 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
825
826 *addr1 = pageAddr;
827 *addr2 = 0x00;
828 *addr3 = 0xa0;
829 *addr4 = 0xac;
830
831 __dsync();
832 }
833
834
835 #endif /* IFXFLAS_H */
IfxFlash_verifyErasedWordLine
IFX_INLINE void IfxFlash_verifyErasedWordLine(uint32 wordLineAddr)
Performs the "Verify Erased WL" sequence.This command verifies if one word line addressed by "WA" is ...
Definition: IfxFlash.h:652
IfxFlash_isDemandMode
IFX_INLINE boolean IfxFlash_isDemandMode(void)
Returns if Flash is in Demand mode or not TRUE - Flash is in Demand Mode FALSE - Flash is not in Dema...
Definition: IfxFlash.h:807
IfxFlash_writePage
IFX_INLINE void IfxFlash_writePage(uint32 pageAddr)
Performs the "Write Page" sequence.
Definition: IfxFlash.h:717
IfxFlash_userVthCount
IFX_INLINE void IfxFlash_userVthCount(uint32 wordAddr)
The function issues command sequence for User Vth Count.The result of this function is the number of ...
Definition: IfxFlash.h:621
IfxFlash_disableWriteProtection
IFX_EXTERN void IfxFlash_disableWriteProtection(uint32 flash, IfxFlash_UcbType ucb, uint32 *password)
The password protection of the selected UCB (if this UCB offers this feature) is temporarily disabled...
Definition: IfxFlash.c:53
IfxFlash_verifyErasedPage
IFX_INLINE void IfxFlash_verifyErasedPage(uint32 pageAddr)
Performs the "Verify Erased Block (page)" sequence. This command verifies if one page addressed by "P...
Definition: IfxFlash.h:636
IfxFlash_resumeProtection
IFX_INLINE void IfxFlash_resumeProtection(uint32 flash)
Performs the "Resume Protection" sequence.
Definition: IfxFlash.h:547
IfxFlash_enterDemandMode
IFX_INLINE void IfxFlash_enterDemandMode(void)
Definition: IfxFlash.h:773
IfxFlash_eraseSector
IFX_INLINE void IfxFlash_eraseSector(uint32 sectorAddr)
Performs the erase sequence for a sector in program or data flash.
Definition: IfxFlash.h:464
IfxFlash_eraseMultipleSectors
IFX_INLINE void IfxFlash_eraseMultipleSectors(uint32 sectorAddr, uint32 numSector)
Performs the erase sequence for n sectors in program or data flash.
Definition: IfxFlash.h:448
uint32
unsigned long uint32
Definition: Platform_Types.h:116
Ifx_Assert.h
Assert functions.
IfxFlash_eraseVerifyMultipleSectors
IFX_INLINE void IfxFlash_eraseVerifyMultipleSectors(uint32 sectorAddr, uint32 numSector)
Performs the "Erase Verify" sequence for multiple sectors.
Definition: IfxFlash.h:480
uint64
unsigned long long uint64
Definition: Platform_Types.h:121
IfxFlash_exitDynamicIdleMode
IFX_INLINE void IfxFlash_exitDynamicIdleMode(void)
Definition: IfxFlash.h:794
IfxFlash_loadPage
IFX_INLINE void IfxFlash_loadPage(uint32 pageAddr, uint32 wordL, uint32 wordU)
performs a load page sequence with a single 64bit access
Definition: IfxFlash.h:512
IfxFlash_enterCrankingMode
IFX_INLINE void IfxFlash_enterCrankingMode(void)
Enter Flash Cranking Mode.
Definition: IfxFlash.h:759
IfxFlash_UcbType
IfxFlash_UcbType
user configuration block type
Definition: IfxFlash_cfg.h:220
IfxFlash_userContentCount
IFX_INLINE void IfxFlash_userContentCount(uint32 wordAddr)
The function issues command sequence for User Content count.The result of this function is dependent ...
Definition: IfxFlash.h:591
IfxFlash_waitUnbusy
IFX_INLINE uint8 IfxFlash_waitUnbusy(uint32 flash, IfxFlash_FlashType flashType)
Polls the selected status flag in flash status register until it turns to 0.
Definition: IfxFlash.h:668
IfxFlash_waitUnbusyAll
IFX_INLINE boolean IfxFlash_waitUnbusyAll(void)
This function will wait till all the flash banks are out of busy state.
Definition: IfxFlash.h:749
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxFlash_userMarginCount
IFX_INLINE void IfxFlash_userMarginCount(uint32 wordAddr)
The function issues command sequence for User Margin Count. The result of this function is the number...
Definition: IfxFlash.h:606
IfxFlash_enterPageMode
IFX_INLINE uint8 IfxFlash_enterPageMode(uint32 pageAddr)
Performs the sequence for entering program page mode.
Definition: IfxFlash.h:428
IfxFlash_suspendResumeMultipleSectors
IFX_INLINE void IfxFlash_suspendResumeMultipleSectors(uint32 sectorAddr, uint32 numSector)
Performs the "Suspend Resume" sequence for multiple sectors.
Definition: IfxFlash.h:559
IfxFlash_cfg.h
FLASH on-chip implementation data.
IfxFlash_resetToRead
IFX_INLINE void IfxFlash_resetToRead(uint32 flash)
reset to read mode
Definition: IfxFlash.h:537
IfxFlash_exitDemandMode
IFX_INLINE void IfxFlash_exitDemandMode(void)
Definition: IfxFlash.h:780
__st64_lu
IFX_INLINE void __st64_lu(void *addr, uint32 valueLower, uint32 valueUpper)
Definition: IfxCpu_Intrinsics.h:159
IfxFlash_loadPage2X32
IFX_INLINE void IfxFlash_loadPage2X32(uint32 pageAddr, uint32 wordL, uint32 wordU)
performs a load page sequence with two 32bit accesses
Definition: IfxFlash.h:523
__dsync
void __dsync(void) __attribute__((intrinsic_function(0x103
IfxFlash_writePageOnce
IFX_INLINE void IfxFlash_writePageOnce(uint32 pageAddr)
Performs the "Write Page Once" sequence, similar to write page but performs a program verify after wr...
Definition: IfxFlash.h:733
IfxFlash_FlashType
IfxFlash_FlashType
Definition: IfxFlash_cfg.h:207
IfxFlash_suspendResumeSector
IFX_INLINE void IfxFlash_suspendResumeSector(uint32 sectorAddr)
Performs the "Suspend Resume" sequence.
Definition: IfxFlash.h:575
IfxFlash_exitCrankingMode
IFX_INLINE void IfxFlash_exitCrankingMode(void)
Exit Flash Cranking Mode.
Definition: IfxFlash.h:766
IFXFLASH_CMD_BASE_ADDRESS
#define IFXFLASH_CMD_BASE_ADDRESS
base address for general command sequences
Definition: IfxFlash_cfg.h:69
IfxFlash_writeBurstOnce
IFX_INLINE void IfxFlash_writeBurstOnce(uint32 pageAddr)
Performs the "Write Burst once" sequence. The command starts the programming process for an aligned g...
Definition: IfxFlash.h:701
IfxFlash_isCrankingMode
IFX_INLINE boolean IfxFlash_isCrankingMode(void)
Returns if Flash is in Cranking Mode. TRUE - Flash is in Cranking Mode FALSE - Flash is not in Cranki...
Definition: IfxFlash.h:801
IfxFlash_replaceLogicalSector
IFX_INLINE void IfxFlash_replaceLogicalSector(uint32 pageAddr)
Definition: IfxFlash.h:819
IfxFlash_writeBurst
IFX_INLINE void IfxFlash_writeBurst(uint32 pageAddr)
Performs the "Write Burst" sequence, similar to write page but performs a burst transfer instead of p...
Definition: IfxFlash.h:685
IfxFlash_enterDynamicIdleMode
IFX_INLINE void IfxFlash_enterDynamicIdleMode(void)
Definition: IfxFlash.h:787
IfxFlash_isDynamicIdleMode
IFX_INLINE boolean IfxFlash_isDynamicIdleMode(void)
Returns if Flash is in Dynamic Idle mode or not TRUE - Flash is in Dynamic Idle Mode FALSE - Flash is...
Definition: IfxFlash.h:813
IfxFlash_clearStatus
IFX_INLINE void IfxFlash_clearStatus(uint32 flash)
Performs the "Clear Status" sequence. Operation and error flags are cleared.
Definition: IfxFlash.h:417
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxFlash_eraseVerifySector
IFX_INLINE void IfxFlash_eraseVerifySector(uint32 sectorAddr)
Performs the "Erase Verify" sequence.
Definition: IfxFlash.h:496


iLLD_TC38A: IfxFlash_cfg.c Source File

  • _Impl
IfxFlash_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxFlash_cfg.c
3 * \brief FLASH on-chip implementation data
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxFlash_cfg.h"
47
48 /******************************************************************************/
49 /*-----------------------Exported Variables/Constants-------------------------*/
50 /******************************************************************************/
51
52 IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableCfsLog[IFXFLASH_DFLASH_NUM_CFS_LOG_SECTORS] = {
53 {0xaf800000, 0xaf800fff}, //CFS0
54 {0xaf801000, 0xaf801fff}, //CFS1
55 {0xaf802000, 0xaf802fff}, //CFS2
56 {0xaf803000, 0xaf803fff}, //CFS3
57 {0xaf804000, 0xaf804fff}, //CFS4
58 {0xaf805000, 0xaf805fff}, //CFS5
59 {0xaf806000, 0xaf806fff}, //CFS6
60 {0xaf807000, 0xaf807fff}, //CFS7
61 {0xaf808000, 0xaf808fff}, //CFS8
62 {0xaf809000, 0xaf809fff}, //CFS9
63 {0xaf80a000, 0xaf80afff}, //CFS10
64 {0xaf80b000, 0xaf80bfff}, //CFS11
65 {0xaf80c000, 0xaf80cfff}, //CFS12
66 {0xaf80d000, 0xaf80dfff}, //CFS13
67 {0xaf80e000, 0xaf80efff}, //CFS14
68 {0xaf80f000, 0xaf80ffff}, //CFS15
69 }
70
71
72 ;
73
74 IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableEepLog[IFXFLASH_DFLASH_NUM_LOG_SECTORS] = {
75 {0xAF000000, 0xAF000FFF},
76 {0xAF001000, 0xAF001FFF},
77 {0xAF002000, 0xAF002FFF},
78 {0xAF003000, 0xAF003FFF},
79 {0xAF004000, 0xAF004FFF},
80 {0xAF005000, 0xAF005FFF},
81 {0xAF006000, 0xAF006FFF},
82 {0xAF007000, 0xAF007FFF},
83 {0xAF008000, 0xAF008FFF},
84 {0xAF009000, 0xAF009FFF},
85 {0xAF00A000, 0xAF00AFFF},
86 {0xAF00B000, 0xAF00BFFF},
87 {0xAF00C000, 0xAF00CFFF},
88 {0xAF00D000, 0xAF00DFFF},
89 {0xAF00E000, 0xAF00EFFF},
90 {0xAF00F000, 0xAF00FFFF},
91 {0xAF010000, 0xAF010FFF},
92 {0xAF011000, 0xAF011FFF},
93 {0xAF012000, 0xAF012FFF},
94 {0xAF013000, 0xAF013FFF},
95 {0xAF014000, 0xAF014FFF},
96 {0xAF015000, 0xAF015FFF},
97 {0xAF016000, 0xAF016FFF},
98 {0xAF017000, 0xAF017FFF},
99 {0xAF018000, 0xAF018FFF},
100 {0xAF019000, 0xAF019FFF},
101 {0xAF01A000, 0xAF01AFFF},
102 {0xAF01B000, 0xAF01BFFF},
103 {0xAF01C000, 0xAF01CFFF},
104 {0xAF01D000, 0xAF01DFFF},
105 {0xAF01E000, 0xAF01EFFF},
106 {0xAF01F000, 0xAF01FFFF},
107 {0xAF020000, 0xAF020FFF},
108 {0xAF021000, 0xAF021FFF},
109 {0xAF022000, 0xAF022FFF},
110 {0xAF023000, 0xAF023FFF},
111 {0xAF024000, 0xAF024FFF},
112 {0xAF025000, 0xAF025FFF},
113 {0xAF026000, 0xAF026FFF},
114 {0xAF027000, 0xAF027FFF},
115 {0xAF028000, 0xAF028FFF},
116 {0xAF029000, 0xAF029FFF},
117 {0xAF02A000, 0xAF02AFFF},
118 {0xAF02B000, 0xAF02BFFF},
119 {0xAF02C000, 0xAF02CFFF},
120 {0xAF02D000, 0xAF02DFFF},
121 {0xAF02E000, 0xAF02EFFF},
122 {0xAF02F000, 0xAF02FFFF},
123 {0xAF030000, 0xAF030FFF},
124 {0xAF031000, 0xAF031FFF},
125 {0xAF032000, 0xAF032FFF},
126 {0xAF033000, 0xAF033FFF},
127 {0xAF034000, 0xAF034FFF},
128 {0xAF035000, 0xAF035FFF},
129 {0xAF036000, 0xAF036FFF},
130 {0xAF037000, 0xAF037FFF},
131 {0xAF038000, 0xAF038FFF},
132 {0xAF039000, 0xAF039FFF},
133 {0xAF03A000, 0xAF03AFFF},
134 {0xAF03B000, 0xAF03BFFF},
135 {0xAF03C000, 0xAF03CFFF},
136 {0xAF03D000, 0xAF03DFFF},
137 {0xAF03E000, 0xAF03EFFF},
138 {0xAF03F000, 0xAF03FFFF},
139 {0xAF040000, 0xAF040FFF},
140 {0xAF041000, 0xAF041FFF},
141 {0xAF042000, 0xAF042FFF},
142 {0xAF043000, 0xAF043FFF},
143 {0xAF044000, 0xAF044FFF},
144 {0xAF045000, 0xAF045FFF},
145 {0xAF046000, 0xAF046FFF},
146 {0xAF047000, 0xAF047FFF},
147 {0xAF048000, 0xAF048FFF},
148 {0xAF049000, 0xAF049FFF},
149 {0xAF04A000, 0xAF04AFFF},
150 {0xAF04B000, 0xAF04BFFF},
151 {0xAF04C000, 0xAF04CFFF},
152 {0xAF04D000, 0xAF04DFFF},
153 {0xAF04E000, 0xAF04EFFF},
154 {0xAF04F000, 0xAF04FFFF},
155 {0xAF050000, 0xAF050FFF},
156 {0xAF051000, 0xAF051FFF},
157 {0xAF052000, 0xAF052FFF},
158 {0xAF053000, 0xAF053FFF},
159 {0xAF054000, 0xAF054FFF},
160 {0xAF055000, 0xAF055FFF},
161 {0xAF056000, 0xAF056FFF},
162 {0xAF057000, 0xAF057FFF},
163 {0xAF058000, 0xAF058FFF},
164 {0xAF059000, 0xAF059FFF},
165 {0xAF05A000, 0xAF05AFFF},
166 {0xAF05B000, 0xAF05BFFF},
167 {0xAF05C000, 0xAF05CFFF},
168 {0xAF05D000, 0xAF05DFFF},
169 {0xAF05E000, 0xAF05EFFF},
170 {0xAF05F000, 0xAF05FFFF},
171 {0xAF060000, 0xAF060FFF},
172 {0xAF061000, 0xAF061FFF},
173 {0xAF062000, 0xAF062FFF},
174 {0xAF063000, 0xAF063FFF},
175 {0xAF064000, 0xAF064FFF},
176 {0xAF065000, 0xAF065FFF},
177 {0xAF066000, 0xAF066FFF},
178 {0xAF067000, 0xAF067FFF},
179 {0xAF068000, 0xAF068FFF},
180 {0xAF069000, 0xAF069FFF},
181 {0xAF06A000, 0xAF06AFFF},
182 {0xAF06B000, 0xAF06BFFF},
183 {0xAF06C000, 0xAF06CFFF},
184 {0xAF06D000, 0xAF06DFFF},
185 {0xAF06E000, 0xAF06EFFF},
186 {0xAF06F000, 0xAF06FFFF},
187 {0xAF070000, 0xAF070FFF},
188 {0xAF071000, 0xAF071FFF},
189 {0xAF072000, 0xAF072FFF},
190 {0xAF073000, 0xAF073FFF},
191 {0xAF074000, 0xAF074FFF},
192 {0xAF075000, 0xAF075FFF},
193 {0xAF076000, 0xAF076FFF},
194 {0xAF077000, 0xAF077FFF},
195 {0xAF078000, 0xAF078FFF},
196 {0xAF079000, 0xAF079FFF},
197 {0xAF07A000, 0xAF07AFFF},
198 {0xAF07B000, 0xAF07BFFF},
199 {0xAF07C000, 0xAF07CFFF},
200 {0xAF07D000, 0xAF07DFFF},
201 {0xAF07E000, 0xAF07EFFF},
202 {0xAF07F000, 0xAF07FFFF},
203 };
204
205 IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableHsmLog[IFXFLASH_DFLASH_NUM_HSM_LOG_SECTORS] = {
206 {0xAFC00000, 0xAFC00FFF}, //HSM0
207 {0xAFC01000, 0xAFC01FFF}, //HSM1
208 {0xAFC02000, 0xAFC02FFF}, //HSM2
209 {0xAFC03000, 0xAFC03FFF}, //HSM3
210 {0xAFC04000, 0xAFC04FFF}, //HSM4
211 {0xAFC05000, 0xAFC05FFF}, //HSM5
212 {0xAFC06000, 0xAFC06FFF}, //HSM6
213 {0xAFC07000, 0xAFC07FFF}, //HSM7
214 {0xAFC08000, 0xAFC08FFF}, //HSM8
215 {0xAFC09000, 0xAFC09FFF}, //HSM9
216 {0xAFC0A000, 0xAFC0AFFF}, //HSM10
217 {0xAFC0B000, 0xAFC0BFFF}, //HSM11
218 {0xAFC0C000, 0xAFC0CFFF}, //HSM12
219 {0xAFC0D000, 0xAFC0DFFF}, //HSM13
220 {0xAFC0E000, 0xAFC0EFFF}, //HSM14
221 {0xAFC0F000, 0xAFC0FFFF}, //HSM15
222 {0xAFC10000, 0xAFC10FFF}, //HSM16
223 {0xAFC11000, 0xAFC11FFF}, //HSM17
224 {0xAFC12000, 0xAFC12FFF}, //HSM18
225 {0xAFC13000, 0xAFC13FFF}, //HSM19
226 {0xAFC14000, 0xAFC14FFF}, //HSM20
227 {0xAFC15000, 0xAFC15FFF}, //HSM21
228 {0xAFC16000, 0xAFC16FFF}, //HSM22
229 {0xAFC17000, 0xAFC17FFF}, //HSM23
230 {0xAFC18000, 0xAFC18FFF}, //HSM24
231 {0xAFC19000, 0xAFC19FFF}, //HSM25
232 {0xAFC1A000, 0xAFC1AFFF}, //HSM26
233 {0xAFC1B000, 0xAFC1BFFF}, //HSM27
234 {0xAFC1C000, 0xAFC1CFFF}, //HSM28
235 {0xAFC1D000, 0xAFC1DFFF}, //HSM29
236 {0xAFC1E000, 0xAFC1EFFF}, //HSM30
237 {0xAFC1F000, 0xAFC1FFFF}, //HSM31
238 };
239
240 IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTablePhys[IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS] = {
241 {IFXFLASH_DFLASH_START, IFXFLASH_DFLASH_END},
242 };
243
244 IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableUcbLog[IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS] = {
245 {0xAF400000, 0xAF4001FF}, //UCB0
246 {0xAF400200, 0xAF4003FF}, //UCB1
247 {0xAF400400, 0xAF4005FF}, //UCB2
248 {0xAF400600, 0xAF4007FF}, //UCB3
249 {0xAF400800, 0xAF4009FF}, //UCB4
250 {0xAF400A00, 0xAF400BFF}, //UCB5
251 {0xAF400C00, 0xAF400DFF}, //UCB6
252 {0xAF400E00, 0xAF400FFF}, //UCB7
253 {0xAF401000, 0xAF4011FF}, //UCB8
254 {0xAF401200, 0xAF4013FF}, //UCB9
255 {0xAF401400, 0xAF4015FF}, //UCB10
256 {0xAF401600, 0xAF4017FF}, //UCB11
257 {0xAF401800, 0xAF4019FF}, //UCB12
258 {0xAF401A00, 0xAF401BFF}, //UCB13
259 {0xAF401C00, 0xAF401DFF}, //UCB14
260 {0xAF401E00, 0xAF401FFF}, //UCB15
261 {0xAF402000, 0xAF4021FF}, //UCB16
262 {0xAF402200, 0xAF4023FF}, //UCB17
263 {0xAF402400, 0xAF4025FF}, //UCB18
264 {0xAF402600, 0xAF4027FF}, //UCB19
265 {0xAF402800, 0xAF4029FF}, //UCB20
266 {0xAF402A00, 0xAF402BFF}, //UCB21
267 {0xAF402C00, 0xAF402DFF}, //UCB22
268 {0xAF402E00, 0xAF402FFF}, //UCB23
269 {0xAF403000, 0xAF4031FF}, //UCB24
270 {0xAF403200, 0xAF4033FF}, //UCB25
271 {0xAF403400, 0xAF4035FF}, //UCB26
272 {0xAF403600, 0xAF4037FF}, //UCB27
273 {0xAF403800, 0xAF4039FF}, //UCB28
274 {0xAF403A00, 0xAF403BFF}, //UCB29
275 {0xAF403C00, 0xAF403DFF}, //UCB30
276 {0xAF403E00, 0xAF403FFF}, //UCB31
277 {0xAF404000, 0xAF4041FF}, //UCB32
278 {0xAF404200, 0xAF4043FF}, //UCB33
279 {0xAF404400, 0xAF4045FF}, //UCB34
280 {0xAF404600, 0xAF4047FF}, //UCB35
281 {0xAF404800, 0xAF4049FF}, //UCB36
282 {0xAF404A00, 0xAF404BFF}, //UCB37
283 {0xAF404C00, 0xAF404DFF}, //UCB38
284 {0xAF404E00, 0xAF404FFF}, //UCB39
285 {0xAF405000, 0xAF4051FF}, //UCB40
286 {0xAF405200, 0xAF4053FF}, //UCB41
287 {0xAF405400, 0xAF4055FF}, //UCB42
288 {0xAF405600, 0xAF4057FF}, //UCB43
289 {0xAF405800, 0xAF4059FF}, //UCB44
290 {0xAF405A00, 0xAF405BFF}, //UCB45
291 {0xAF405C00, 0xAF405DFF}, //UCB46
292 {0xAF405E00, 0xAF405FFF}, //UCB47
293 };
294
295 IFX_CONST IfxFlash_flashSector IfxFlash_pFlashTableLog[IFXFLASH_PFLASH_NUM_LOG_SECTORS] = {
296 {0xA0000000, 0xA0003FFF}, // PF0 S0
297 {0xA0004000, 0xA0007FFF}, // PF0 S1
298 {0xA0008000, 0xA000BFFF}, // PF0 S2
299 {0xA000C000, 0xA000FFFF}, // PF0 S3
300 {0xA0010000, 0xA0013FFF}, // PF0 S4
301 {0xA0014000, 0xA0017FFF}, // PF0 S5
302 {0xA0018000, 0xA001BFFF}, // PF0 S6
303 {0xA001C000, 0xA001FFFF}, // PF0 S7
304 {0xA0020000, 0xA0023FFF}, // PF0 S8
305 {0xA0024000, 0xA0027FFF}, // PF0 S9
306 {0xA0028000, 0xA002BFFF}, // PF0 S10
307 {0xA002C000, 0xA002FFFF}, // PF0 S11
308 {0xA0030000, 0xA0033FFF}, // PF0 S12
309 {0xA0034000, 0xA0037FFF}, // PF0 S13
310 {0xA0038000, 0xA003BFFF}, // PF0 S14
311 {0xA003C000, 0xA003FFFF}, // PF0 S15
312 {0xA0040000, 0xA0043FFF}, // PF0 S16
313 {0xA0044000, 0xA0047FFF}, // PF0 S17
314 {0xA0048000, 0xA004BFFF}, // PF0 S18
315 {0xA004C000, 0xA004FFFF}, // PF0 S19
316 {0xA0050000, 0xA0053FFF}, // PF0 S20
317 {0xA0054000, 0xA0057FFF}, // PF0 S21
318 {0xA0058000, 0xA005BFFF}, // PF0 S22
319 {0xA005C000, 0xA005FFFF}, // PF0 S23
320 {0xA0060000, 0xA0063FFF}, // PF0 S24
321 {0xA0064000, 0xA0067FFF}, // PF0 S25
322 {0xA0068000, 0xA006BFFF}, // PF0 S26
323 {0xA006C000, 0xA006FFFF}, // PF0 S27
324 {0xA0070000, 0xA0073FFF}, // PF0 S28
325 {0xA0074000, 0xA0077FFF}, // PF0 S29
326 {0xA0078000, 0xA007BFFF}, // PF0 S30
327 {0xA007C000, 0xA007FFFF}, // PF0 S31
328 {0xA0080000, 0xA0083FFF}, // PF0 S32
329 {0xA0084000, 0xA0087FFF}, // PF0 S33
330 {0xA0088000, 0xA008BFFF}, // PF0 S34
331 {0xA008C000, 0xA008FFFF}, // PF0 S35
332 {0xA0090000, 0xA0093FFF}, // PF0 S36
333 {0xA0094000, 0xA0097FFF}, // PF0 S37
334 {0xA0098000, 0xA009BFFF}, // PF0 S38
335 {0xA009C000, 0xA009FFFF}, // PF0 S39
336 {0xA00A0000, 0xA00A3FFF}, // PF0 S40
337 {0xA00A4000, 0xA00A7FFF}, // PF0 S41
338 {0xA00A8000, 0xA00ABFFF}, // PF0 S42
339 {0xA00AC000, 0xA00AFFFF}, // PF0 S43
340 {0xA00B0000, 0xA00B3FFF}, // PF0 S44
341 {0xA00B4000, 0xA00B7FFF}, // PF0 S45
342 {0xA00B8000, 0xA00BBFFF}, // PF0 S46
343 {0xA00BC000, 0xA00BFFFF}, // PF0 S47
344 {0xA00C0000, 0xA00C3FFF}, // PF0 S48
345 {0xA00C4000, 0xA00C7FFF}, // PF0 S49
346 {0xA00C8000, 0xA00CBFFF}, // PF0 S50
347 {0xA00CC000, 0xA00CFFFF}, // PF0 S51
348 {0xA00D0000, 0xA00D3FFF}, // PF0 S52
349 {0xA00D4000, 0xA00D7FFF}, // PF0 S53
350 {0xA00D8000, 0xA00DBFFF}, // PF0 S54
351 {0xA00DC000, 0xA00DFFFF}, // PF0 S55
352 {0xA00E0000, 0xA00E3FFF}, // PF0 S56
353 {0xA00E4000, 0xA00E7FFF}, // PF0 S57
354 {0xA00E8000, 0xA00EBFFF}, // PF0 S58
355 {0xA00EC000, 0xA00EFFFF}, // PF0 S59
356 {0xA00F0000, 0xA00F3FFF}, // PF0 S60
357 {0xA00F4000, 0xA00F7FFF}, // PF0 S61
358 {0xA00F8000, 0xA00FBFFF}, // PF0 S62
359 {0xA00FC000, 0xA00FFFFF}, // PF0 S63
360 {0xA0100000, 0xA0103FFF}, // PF0 S64
361 {0xA0104000, 0xA0107FFF}, // PF0 S65
362 {0xA0108000, 0xA010BFFF}, // PF0 S66
363 {0xA010C000, 0xA010FFFF}, // PF0 S67
364 {0xA0110000, 0xA0113FFF}, // PF0 S68
365 {0xA0114000, 0xA0117FFF}, // PF0 S69
366 {0xA0118000, 0xA011BFFF}, // PF0 S70
367 {0xA011C000, 0xA011FFFF}, // PF0 S71
368 {0xA0120000, 0xA0123FFF}, // PF0 S72
369 {0xA0124000, 0xA0127FFF}, // PF0 S73
370 {0xA0128000, 0xA012BFFF}, // PF0 S74
371 {0xA012C000, 0xA012FFFF}, // PF0 S75
372 {0xA0130000, 0xA0133FFF}, // PF0 S76
373 {0xA0134000, 0xA0137FFF}, // PF0 S77
374 {0xA0138000, 0xA013BFFF}, // PF0 S78
375 {0xA013C000, 0xA013FFFF}, // PF0 S79
376 {0xA0140000, 0xA0143FFF}, // PF0 S80
377 {0xA0144000, 0xA0147FFF}, // PF0 S81
378 {0xA0148000, 0xA014BFFF}, // PF0 S82
379 {0xA014C000, 0xA014FFFF}, // PF0 S83
380 {0xA0150000, 0xA0153FFF}, // PF0 S84
381 {0xA0154000, 0xA0157FFF}, // PF0 S85
382 {0xA0158000, 0xA015BFFF}, // PF0 S86
383 {0xA015C000, 0xA015FFFF}, // PF0 S87
384 {0xA0160000, 0xA0163FFF}, // PF0 S88
385 {0xA0164000, 0xA0167FFF}, // PF0 S89
386 {0xA0168000, 0xA016BFFF}, // PF0 S90
387 {0xA016C000, 0xA016FFFF}, // PF0 S91
388 {0xA0170000, 0xA0173FFF}, // PF0 S92
389 {0xA0174000, 0xA0177FFF}, // PF0 S93
390 {0xA0178000, 0xA017BFFF}, // PF0 S94
391 {0xA017C000, 0xA017FFFF}, // PF0 S95
392 {0xA0180000, 0xA0183FFF}, // PF0 S96
393 {0xA0184000, 0xA0187FFF}, // PF0 S97
394 {0xA0188000, 0xA018BFFF}, // PF0 S98
395 {0xA018C000, 0xA018FFFF}, // PF0 S99
396 {0xA0190000, 0xA0193FFF}, // PF0 S100
397 {0xA0194000, 0xA0197FFF}, // PF0 S101
398 {0xA0198000, 0xA019BFFF}, // PF0 S102
399 {0xA019C000, 0xA019FFFF}, // PF0 S103
400 {0xA01A0000, 0xA01A3FFF}, // PF0 S104
401 {0xA01A4000, 0xA01A7FFF}, // PF0 S105
402 {0xA01A8000, 0xA01ABFFF}, // PF0 S106
403 {0xA01AC000, 0xA01AFFFF}, // PF0 S107
404 {0xA01B0000, 0xA01B3FFF}, // PF0 S108
405 {0xA01B4000, 0xA01B7FFF}, // PF0 S109
406 {0xA01B8000, 0xA01BBFFF}, // PF0 S110
407 {0xA01BC000, 0xA01BFFFF}, // PF0 S111
408 {0xA01C0000, 0xA01C3FFF}, // PF0 S112
409 {0xA01C4000, 0xA01C7FFF}, // PF0 S113
410 {0xA01C8000, 0xA01CBFFF}, // PF0 S114
411 {0xA01CC000, 0xA01CFFFF}, // PF0 S115
412 {0xA01D0000, 0xA01D3FFF}, // PF0 S116
413 {0xA01D4000, 0xA01D7FFF}, // PF0 S117
414 {0xA01D8000, 0xA01DBFFF}, // PF0 S118
415 {0xA01DC000, 0xA01DFFFF}, // PF0 S119
416 {0xA01E0000, 0xA01E3FFF}, // PF0 S120
417 {0xA01E4000, 0xA01E7FFF}, // PF0 S121
418 {0xA01E8000, 0xA01EBFFF}, // PF0 S122
419 {0xA01EC000, 0xA01EFFFF}, // PF0 S123
420 {0xA01F0000, 0xA01F3FFF}, // PF0 S124
421 {0xA01F4000, 0xA01F7FFF}, // PF0 S125
422 {0xA01F8000, 0xA01FBFFF}, // PF0 S126
423 {0xA01FC000, 0xA01FFFFF}, // PF0 S127
424 {0xA0200000, 0xA0203FFF}, // PF0 S128
425 {0xA0204000, 0xA0207FFF}, // PF0 S129
426 {0xA0208000, 0xA020BFFF}, // PF0 S130
427 {0xA020C000, 0xA020FFFF}, // PF0 S131
428 {0xA0210000, 0xA0213FFF}, // PF0 S132
429 {0xA0214000, 0xA0217FFF}, // PF0 S133
430 {0xA0218000, 0xA021BFFF}, // PF0 S134
431 {0xA021C000, 0xA021FFFF}, // PF0 S135
432 {0xA0220000, 0xA0223FFF}, // PF0 S136
433 {0xA0224000, 0xA0227FFF}, // PF0 S137
434 {0xA0228000, 0xA022BFFF}, // PF0 S138
435 {0xA022C000, 0xA022FFFF}, // PF0 S139
436 {0xA0230000, 0xA0233FFF}, // PF0 S140
437 {0xA0234000, 0xA0237FFF}, // PF0 S141
438 {0xA0238000, 0xA023BFFF}, // PF0 S142
439 {0xA023C000, 0xA023FFFF}, // PF0 S143
440 {0xA0240000, 0xA0243FFF}, // PF0 S144
441 {0xA0244000, 0xA0247FFF}, // PF0 S145
442 {0xA0248000, 0xA024BFFF}, // PF0 S146
443 {0xA024C000, 0xA024FFFF}, // PF0 S147
444 {0xA0250000, 0xA0253FFF}, // PF0 S148
445 {0xA0254000, 0xA0257FFF}, // PF0 S149
446 {0xA0258000, 0xA025BFFF}, // PF0 S150
447 {0xA025C000, 0xA025FFFF}, // PF0 S151
448 {0xA0260000, 0xA0263FFF}, // PF0 S152
449 {0xA0264000, 0xA0267FFF}, // PF0 S153
450 {0xA0268000, 0xA026BFFF}, // PF0 S154
451 {0xA026C000, 0xA026FFFF}, // PF0 S155
452 {0xA0270000, 0xA0273FFF}, // PF0 S156
453 {0xA0274000, 0xA0277FFF}, // PF0 S157
454 {0xA0278000, 0xA027BFFF}, // PF0 S158
455 {0xA027C000, 0xA027FFFF}, // PF0 S159
456 {0xA0280000, 0xA0283FFF}, // PF0 S160
457 {0xA0284000, 0xA0287FFF}, // PF0 S161
458 {0xA0288000, 0xA028BFFF}, // PF0 S162
459 {0xA028C000, 0xA028FFFF}, // PF0 S163
460 {0xA0290000, 0xA0293FFF}, // PF0 S164
461 {0xA0294000, 0xA0297FFF}, // PF0 S165
462 {0xA0298000, 0xA029BFFF}, // PF0 S166
463 {0xA029C000, 0xA029FFFF}, // PF0 S167
464 {0xA02A0000, 0xA02A3FFF}, // PF0 S168
465 {0xA02A4000, 0xA02A7FFF}, // PF0 S169
466 {0xA02A8000, 0xA02ABFFF}, // PF0 S170
467 {0xA02AC000, 0xA02AFFFF}, // PF0 S171
468 {0xA02B0000, 0xA02B3FFF}, // PF0 S172
469 {0xA02B4000, 0xA02B7FFF}, // PF0 S173
470 {0xA02B8000, 0xA02BBFFF}, // PF0 S174
471 {0xA02BC000, 0xA02BFFFF}, // PF0 S175
472 {0xA02C0000, 0xA02C3FFF}, // PF0 S176
473 {0xA02C4000, 0xA02C7FFF}, // PF0 S177
474 {0xA02C8000, 0xA02CBFFF}, // PF0 S178
475 {0xA02CC000, 0xA02CFFFF}, // PF0 S179
476 {0xA02D0000, 0xA02D3FFF}, // PF0 S180
477 {0xA02D4000, 0xA02D7FFF}, // PF0 S181
478 {0xA02D8000, 0xA02DBFFF}, // PF0 S182
479 {0xA02DC000, 0xA02DFFFF}, // PF0 S183
480 {0xA02E0000, 0xA02E3FFF}, // PF0 S184
481 {0xA02E4000, 0xA02E7FFF}, // PF0 S185
482 {0xA02E8000, 0xA02EBFFF}, // PF0 S186
483 {0xA02EC000, 0xA02EFFFF}, // PF0 S187
484 {0xA02F0000, 0xA02F3FFF}, // PF0 S188
485 {0xA02F4000, 0xA02F7FFF}, // PF0 S189
486 {0xA02F8000, 0xA02FBFFF}, // PF0 S190
487 {0xA02FC000, 0xA02FFFFF}, // PF0 S191
488 {0xA0300000, 0xA0303FFF}, // PF1 S0
489 {0xA0304000, 0xA0307FFF}, // PF1 S1
490 {0xA0308000, 0xA030BFFF}, // PF1 S2
491 {0xA030C000, 0xA030FFFF}, // PF1 S3
492 {0xA0310000, 0xA0313FFF}, // PF1 S4
493 {0xA0314000, 0xA0317FFF}, // PF1 S5
494 {0xA0318000, 0xA031BFFF}, // PF1 S6
495 {0xA031C000, 0xA031FFFF}, // PF1 S7
496 {0xA0320000, 0xA0323FFF}, // PF1 S8
497 {0xA0324000, 0xA0327FFF}, // PF1 S9
498 {0xA0328000, 0xA032BFFF}, // PF1 S10
499 {0xA032C000, 0xA032FFFF}, // PF1 S11
500 {0xA0330000, 0xA0333FFF}, // PF1 S12
501 {0xA0334000, 0xA0337FFF}, // PF1 S13
502 {0xA0338000, 0xA033BFFF}, // PF1 S14
503 {0xA033C000, 0xA033FFFF}, // PF1 S15
504 {0xA0340000, 0xA0343FFF}, // PF1 S16
505 {0xA0344000, 0xA0347FFF}, // PF1 S17
506 {0xA0348000, 0xA034BFFF}, // PF1 S18
507 {0xA034C000, 0xA034FFFF}, // PF1 S19
508 {0xA0350000, 0xA0353FFF}, // PF1 S20
509 {0xA0354000, 0xA0357FFF}, // PF1 S21
510 {0xA0358000, 0xA035BFFF}, // PF1 S22
511 {0xA035C000, 0xA035FFFF}, // PF1 S23
512 {0xA0360000, 0xA0363FFF}, // PF1 S24
513 {0xA0364000, 0xA0367FFF}, // PF1 S25
514 {0xA0368000, 0xA036BFFF}, // PF1 S26
515 {0xA036C000, 0xA036FFFF}, // PF1 S27
516 {0xA0370000, 0xA0373FFF}, // PF1 S28
517 {0xA0374000, 0xA0377FFF}, // PF1 S29
518 {0xA0378000, 0xA037BFFF}, // PF1 S30
519 {0xA037C000, 0xA037FFFF}, // PF1 S31
520 {0xA0380000, 0xA0383FFF}, // PF1 S32
521 {0xA0384000, 0xA0387FFF}, // PF1 S33
522 {0xA0388000, 0xA038BFFF}, // PF1 S34
523 {0xA038C000, 0xA038FFFF}, // PF1 S35
524 {0xA0390000, 0xA0393FFF}, // PF1 S36
525 {0xA0394000, 0xA0397FFF}, // PF1 S37
526 {0xA0398000, 0xA039BFFF}, // PF1 S38
527 {0xA039C000, 0xA039FFFF}, // PF1 S39
528 {0xA03A0000, 0xA03A3FFF}, // PF1 S40
529 {0xA03A4000, 0xA03A7FFF}, // PF1 S41
530 {0xA03A8000, 0xA03ABFFF}, // PF1 S42
531 {0xA03AC000, 0xA03AFFFF}, // PF1 S43
532 {0xA03B0000, 0xA03B3FFF}, // PF1 S44
533 {0xA03B4000, 0xA03B7FFF}, // PF1 S45
534 {0xA03B8000, 0xA03BBFFF}, // PF1 S46
535 {0xA03BC000, 0xA03BFFFF}, // PF1 S47
536 {0xA03C0000, 0xA03C3FFF}, // PF1 S48
537 {0xA03C4000, 0xA03C7FFF}, // PF1 S49
538 {0xA03C8000, 0xA03CBFFF}, // PF1 S50
539 {0xA03CC000, 0xA03CFFFF}, // PF1 S51
540 {0xA03D0000, 0xA03D3FFF}, // PF1 S52
541 {0xA03D4000, 0xA03D7FFF}, // PF1 S53
542 {0xA03D8000, 0xA03DBFFF}, // PF1 S54
543 {0xA03DC000, 0xA03DFFFF}, // PF1 S55
544 {0xA03E0000, 0xA03E3FFF}, // PF1 S56
545 {0xA03E4000, 0xA03E7FFF}, // PF1 S57
546 {0xA03E8000, 0xA03EBFFF}, // PF1 S58
547 {0xA03EC000, 0xA03EFFFF}, // PF1 S59
548 {0xA03F0000, 0xA03F3FFF}, // PF1 S60
549 {0xA03F4000, 0xA03F7FFF}, // PF1 S61
550 {0xA03F8000, 0xA03FBFFF}, // PF1 S62
551 {0xA03FC000, 0xA03FFFFF}, // PF1 S63
552 {0xA0400000, 0xA0403FFF}, // PF1 S64
553 {0xA0404000, 0xA0407FFF}, // PF1 S65
554 {0xA0408000, 0xA040BFFF}, // PF1 S66
555 {0xA040C000, 0xA040FFFF}, // PF1 S67
556 {0xA0410000, 0xA0413FFF}, // PF1 S68
557 {0xA0414000, 0xA0417FFF}, // PF1 S69
558 {0xA0418000, 0xA041BFFF}, // PF1 S70
559 {0xA041C000, 0xA041FFFF}, // PF1 S71
560 {0xA0420000, 0xA0423FFF}, // PF1 S72
561 {0xA0424000, 0xA0427FFF}, // PF1 S73
562 {0xA0428000, 0xA042BFFF}, // PF1 S74
563 {0xA042C000, 0xA042FFFF}, // PF1 S75
564 {0xA0430000, 0xA0433FFF}, // PF1 S76
565 {0xA0434000, 0xA0437FFF}, // PF1 S77
566 {0xA0438000, 0xA043BFFF}, // PF1 S78
567 {0xA043C000, 0xA043FFFF}, // PF1 S79
568 {0xA0440000, 0xA0443FFF}, // PF1 S80
569 {0xA0444000, 0xA0447FFF}, // PF1 S81
570 {0xA0448000, 0xA044BFFF}, // PF1 S82
571 {0xA044C000, 0xA044FFFF}, // PF1 S83
572 {0xA0450000, 0xA0453FFF}, // PF1 S84
573 {0xA0454000, 0xA0457FFF}, // PF1 S85
574 {0xA0458000, 0xA045BFFF}, // PF1 S86
575 {0xA045C000, 0xA045FFFF}, // PF1 S87
576 {0xA0460000, 0xA0463FFF}, // PF1 S88
577 {0xA0464000, 0xA0467FFF}, // PF1 S89
578 {0xA0468000, 0xA046BFFF}, // PF1 S90
579 {0xA046C000, 0xA046FFFF}, // PF1 S91
580 {0xA0470000, 0xA0473FFF}, // PF1 S92
581 {0xA0474000, 0xA0477FFF}, // PF1 S93
582 {0xA0478000, 0xA047BFFF}, // PF1 S94
583 {0xA047C000, 0xA047FFFF}, // PF1 S95
584 {0xA0480000, 0xA0483FFF}, // PF1 S96
585 {0xA0484000, 0xA0487FFF}, // PF1 S97
586 {0xA0488000, 0xA048BFFF}, // PF1 S98
587 {0xA048C000, 0xA048FFFF}, // PF1 S99
588 {0xA0490000, 0xA0493FFF}, // PF1 S100
589 {0xA0494000, 0xA0497FFF}, // PF1 S101
590 {0xA0498000, 0xA049BFFF}, // PF1 S102
591 {0xA049C000, 0xA049FFFF}, // PF1 S103
592 {0xA04A0000, 0xA04A3FFF}, // PF1 S104
593 {0xA04A4000, 0xA04A7FFF}, // PF1 S105
594 {0xA04A8000, 0xA04ABFFF}, // PF1 S106
595 {0xA04AC000, 0xA04AFFFF}, // PF1 S107
596 {0xA04B0000, 0xA04B3FFF}, // PF1 S108
597 {0xA04B4000, 0xA04B7FFF}, // PF1 S109
598 {0xA04B8000, 0xA04BBFFF}, // PF1 S110
599 {0xA04BC000, 0xA04BFFFF}, // PF1 S111
600 {0xA04C0000, 0xA04C3FFF}, // PF1 S112
601 {0xA04C4000, 0xA04C7FFF}, // PF1 S113
602 {0xA04C8000, 0xA04CBFFF}, // PF1 S114
603 {0xA04CC000, 0xA04CFFFF}, // PF1 S115
604 {0xA04D0000, 0xA04D3FFF}, // PF1 S116
605 {0xA04D4000, 0xA04D7FFF}, // PF1 S117
606 {0xA04D8000, 0xA04DBFFF}, // PF1 S118
607 {0xA04DC000, 0xA04DFFFF}, // PF1 S119
608 {0xA04E0000, 0xA04E3FFF}, // PF1 S120
609 {0xA04E4000, 0xA04E7FFF}, // PF1 S121
610 {0xA04E8000, 0xA04EBFFF}, // PF1 S122
611 {0xA04EC000, 0xA04EFFFF}, // PF1 S123
612 {0xA04F0000, 0xA04F3FFF}, // PF1 S124
613 {0xA04F4000, 0xA04F7FFF}, // PF1 S125
614 {0xA04F8000, 0xA04FBFFF}, // PF1 S126
615 {0xA04FC000, 0xA04FFFFF}, // PF1 S127
616 {0xA0500000, 0xA0503FFF}, // PF1 S128
617 {0xA0504000, 0xA0507FFF}, // PF1 S129
618 {0xA0508000, 0xA050BFFF}, // PF1 S130
619 {0xA050C000, 0xA050FFFF}, // PF1 S131
620 {0xA0510000, 0xA0513FFF}, // PF1 S132
621 {0xA0514000, 0xA0517FFF}, // PF1 S133
622 {0xA0518000, 0xA051BFFF}, // PF1 S134
623 {0xA051C000, 0xA051FFFF}, // PF1 S135
624 {0xA0520000, 0xA0523FFF}, // PF1 S136
625 {0xA0524000, 0xA0527FFF}, // PF1 S137
626 {0xA0528000, 0xA052BFFF}, // PF1 S138
627 {0xA052C000, 0xA052FFFF}, // PF1 S139
628 {0xA0530000, 0xA0533FFF}, // PF1 S140
629 {0xA0534000, 0xA0537FFF}, // PF1 S141
630 {0xA0538000, 0xA053BFFF}, // PF1 S142
631 {0xA053C000, 0xA053FFFF}, // PF1 S143
632 {0xA0540000, 0xA0543FFF}, // PF1 S144
633 {0xA0544000, 0xA0547FFF}, // PF1 S145
634 {0xA0548000, 0xA054BFFF}, // PF1 S146
635 {0xA054C000, 0xA054FFFF}, // PF1 S147
636 {0xA0550000, 0xA0553FFF}, // PF1 S148
637 {0xA0554000, 0xA0557FFF}, // PF1 S149
638 {0xA0558000, 0xA055BFFF}, // PF1 S150
639 {0xA055C000, 0xA055FFFF}, // PF1 S151
640 {0xA0560000, 0xA0563FFF}, // PF1 S152
641 {0xA0564000, 0xA0567FFF}, // PF1 S153
642 {0xA0568000, 0xA056BFFF}, // PF1 S154
643 {0xA056C000, 0xA056FFFF}, // PF1 S155
644 {0xA0570000, 0xA0573FFF}, // PF1 S156
645 {0xA0574000, 0xA0577FFF}, // PF1 S157
646 {0xA0578000, 0xA057BFFF}, // PF1 S158
647 {0xA057C000, 0xA057FFFF}, // PF1 S159
648 {0xA0580000, 0xA0583FFF}, // PF1 S160
649 {0xA0584000, 0xA0587FFF}, // PF1 S161
650 {0xA0588000, 0xA058BFFF}, // PF1 S162
651 {0xA058C000, 0xA058FFFF}, // PF1 S163
652 {0xA0590000, 0xA0593FFF}, // PF1 S164
653 {0xA0594000, 0xA0597FFF}, // PF1 S165
654 {0xA0598000, 0xA059BFFF}, // PF1 S166
655 {0xA059C000, 0xA059FFFF}, // PF1 S167
656 {0xA05A0000, 0xA05A3FFF}, // PF1 S168
657 {0xA05A4000, 0xA05A7FFF}, // PF1 S169
658 {0xA05A8000, 0xA05ABFFF}, // PF1 S170
659 {0xA05AC000, 0xA05AFFFF}, // PF1 S171
660 {0xA05B0000, 0xA05B3FFF}, // PF1 S172
661 {0xA05B4000, 0xA05B7FFF}, // PF1 S173
662 {0xA05B8000, 0xA05BBFFF}, // PF1 S174
663 {0xA05BC000, 0xA05BFFFF}, // PF1 S175
664 {0xA05C0000, 0xA05C3FFF}, // PF1 S176
665 {0xA05C4000, 0xA05C7FFF}, // PF1 S177
666 {0xA05C8000, 0xA05CBFFF}, // PF1 S178
667 {0xA05CC000, 0xA05CFFFF}, // PF1 S179
668 {0xA05D0000, 0xA05D3FFF}, // PF1 S180
669 {0xA05D4000, 0xA05D7FFF}, // PF1 S181
670 {0xA05D8000, 0xA05DBFFF}, // PF1 S182
671 {0xA05DC000, 0xA05DFFFF}, // PF1 S183
672 {0xA05E0000, 0xA05E3FFF}, // PF1 S184
673 {0xA05E4000, 0xA05E7FFF}, // PF1 S185
674 {0xA05E8000, 0xA05EBFFF}, // PF1 S186
675 {0xA05EC000, 0xA05EFFFF}, // PF1 S187
676 {0xA05F0000, 0xA05F3FFF}, // PF1 S188
677 {0xA05F4000, 0xA05F7FFF}, // PF1 S189
678 {0xA05F8000, 0xA05FBFFF}, // PF1 S190
679 {0xA05FC000, 0xA05FFFFF}, // PF1 S191
680 {0xA0600000, 0xA0603FFF}, // PF2 S0
681 {0xA0604000, 0xA0607FFF}, // PF2 S1
682 {0xA0608000, 0xA060BFFF}, // PF2 S2
683 {0xA060C000, 0xA060FFFF}, // PF2 S3
684 {0xA0610000, 0xA0613FFF}, // PF2 S4
685 {0xA0614000, 0xA0617FFF}, // PF2 S5
686 {0xA0618000, 0xA061BFFF}, // PF2 S6
687 {0xA061C000, 0xA061FFFF}, // PF2 S7
688 {0xA0620000, 0xA0623FFF}, // PF2 S8
689 {0xA0624000, 0xA0627FFF}, // PF2 S9
690 {0xA0628000, 0xA062BFFF}, // PF2 S10
691 {0xA062C000, 0xA062FFFF}, // PF2 S11
692 {0xA0630000, 0xA0633FFF}, // PF2 S12
693 {0xA0634000, 0xA0637FFF}, // PF2 S13
694 {0xA0638000, 0xA063BFFF}, // PF2 S14
695 {0xA063C000, 0xA063FFFF}, // PF2 S15
696 {0xA0640000, 0xA0643FFF}, // PF2 S16
697 {0xA0644000, 0xA0647FFF}, // PF2 S17
698 {0xA0648000, 0xA064BFFF}, // PF2 S18
699 {0xA064C000, 0xA064FFFF}, // PF2 S19
700 {0xA0650000, 0xA0653FFF}, // PF2 S20
701 {0xA0654000, 0xA0657FFF}, // PF2 S21
702 {0xA0658000, 0xA065BFFF}, // PF2 S22
703 {0xA065C000, 0xA065FFFF}, // PF2 S23
704 {0xA0660000, 0xA0663FFF}, // PF2 S24
705 {0xA0664000, 0xA0667FFF}, // PF2 S25
706 {0xA0668000, 0xA066BFFF}, // PF2 S26
707 {0xA066C000, 0xA066FFFF}, // PF2 S27
708 {0xA0670000, 0xA0673FFF}, // PF2 S28
709 {0xA0674000, 0xA0677FFF}, // PF2 S29
710 {0xA0678000, 0xA067BFFF}, // PF2 S30
711 {0xA067C000, 0xA067FFFF}, // PF2 S31
712 {0xA0680000, 0xA0683FFF}, // PF2 S32
713 {0xA0684000, 0xA0687FFF}, // PF2 S33
714 {0xA0688000, 0xA068BFFF}, // PF2 S34
715 {0xA068C000, 0xA068FFFF}, // PF2 S35
716 {0xA0690000, 0xA0693FFF}, // PF2 S36
717 {0xA0694000, 0xA0697FFF}, // PF2 S37
718 {0xA0698000, 0xA069BFFF}, // PF2 S38
719 {0xA069C000, 0xA069FFFF}, // PF2 S39
720 {0xA06A0000, 0xA06A3FFF}, // PF2 S40
721 {0xA06A4000, 0xA06A7FFF}, // PF2 S41
722 {0xA06A8000, 0xA06ABFFF}, // PF2 S42
723 {0xA06AC000, 0xA06AFFFF}, // PF2 S43
724 {0xA06B0000, 0xA06B3FFF}, // PF2 S44
725 {0xA06B4000, 0xA06B7FFF}, // PF2 S45
726 {0xA06B8000, 0xA06BBFFF}, // PF2 S46
727 {0xA06BC000, 0xA06BFFFF}, // PF2 S47
728 {0xA06C0000, 0xA06C3FFF}, // PF2 S48
729 {0xA06C4000, 0xA06C7FFF}, // PF2 S49
730 {0xA06C8000, 0xA06CBFFF}, // PF2 S50
731 {0xA06CC000, 0xA06CFFFF}, // PF2 S51
732 {0xA06D0000, 0xA06D3FFF}, // PF2 S52
733 {0xA06D4000, 0xA06D7FFF}, // PF2 S53
734 {0xA06D8000, 0xA06DBFFF}, // PF2 S54
735 {0xA06DC000, 0xA06DFFFF}, // PF2 S55
736 {0xA06E0000, 0xA06E3FFF}, // PF2 S56
737 {0xA06E4000, 0xA06E7FFF}, // PF2 S57
738 {0xA06E8000, 0xA06EBFFF}, // PF2 S58
739 {0xA06EC000, 0xA06EFFFF}, // PF2 S59
740 {0xA06F0000, 0xA06F3FFF}, // PF2 S60
741 {0xA06F4000, 0xA06F7FFF}, // PF2 S61
742 {0xA06F8000, 0xA06FBFFF}, // PF2 S62
743 {0xA06FC000, 0xA06FFFFF}, // PF2 S63
744 {0xA0700000, 0xA0703FFF}, // PF2 S64
745 {0xA0704000, 0xA0707FFF}, // PF2 S65
746 {0xA0708000, 0xA070BFFF}, // PF2 S66
747 {0xA070C000, 0xA070FFFF}, // PF2 S67
748 {0xA0710000, 0xA0713FFF}, // PF2 S68
749 {0xA0714000, 0xA0717FFF}, // PF2 S69
750 {0xA0718000, 0xA071BFFF}, // PF2 S70
751 {0xA071C000, 0xA071FFFF}, // PF2 S71
752 {0xA0720000, 0xA0723FFF}, // PF2 S72
753 {0xA0724000, 0xA0727FFF}, // PF2 S73
754 {0xA0728000, 0xA072BFFF}, // PF2 S74
755 {0xA072C000, 0xA072FFFF}, // PF2 S75
756 {0xA0730000, 0xA0733FFF}, // PF2 S76
757 {0xA0734000, 0xA0737FFF}, // PF2 S77
758 {0xA0738000, 0xA073BFFF}, // PF2 S78
759 {0xA073C000, 0xA073FFFF}, // PF2 S79
760 {0xA0740000, 0xA0743FFF}, // PF2 S80
761 {0xA0744000, 0xA0747FFF}, // PF2 S81
762 {0xA0748000, 0xA074BFFF}, // PF2 S82
763 {0xA074C000, 0xA074FFFF}, // PF2 S83
764 {0xA0750000, 0xA0753FFF}, // PF2 S84
765 {0xA0754000, 0xA0757FFF}, // PF2 S85
766 {0xA0758000, 0xA075BFFF}, // PF2 S86
767 {0xA075C000, 0xA075FFFF}, // PF2 S87
768 {0xA0760000, 0xA0763FFF}, // PF2 S88
769 {0xA0764000, 0xA0767FFF}, // PF2 S89
770 {0xA0768000, 0xA076BFFF}, // PF2 S90
771 {0xA076C000, 0xA076FFFF}, // PF2 S91
772 {0xA0770000, 0xA0773FFF}, // PF2 S92
773 {0xA0774000, 0xA0777FFF}, // PF2 S93
774 {0xA0778000, 0xA077BFFF}, // PF2 S94
775 {0xA077C000, 0xA077FFFF}, // PF2 S95
776 {0xA0780000, 0xA0783FFF}, // PF2 S96
777 {0xA0784000, 0xA0787FFF}, // PF2 S97
778 {0xA0788000, 0xA078BFFF}, // PF2 S98
779 {0xA078C000, 0xA078FFFF}, // PF2 S99
780 {0xA0790000, 0xA0793FFF}, // PF2 S100
781 {0xA0794000, 0xA0797FFF}, // PF2 S101
782 {0xA0798000, 0xA079BFFF}, // PF2 S102
783 {0xA079C000, 0xA079FFFF}, // PF2 S103
784 {0xA07A0000, 0xA07A3FFF}, // PF2 S104
785 {0xA07A4000, 0xA07A7FFF}, // PF2 S105
786 {0xA07A8000, 0xA07ABFFF}, // PF2 S106
787 {0xA07AC000, 0xA07AFFFF}, // PF2 S107
788 {0xA07B0000, 0xA07B3FFF}, // PF2 S108
789 {0xA07B4000, 0xA07B7FFF}, // PF2 S109
790 {0xA07B8000, 0xA07BBFFF}, // PF2 S110
791 {0xA07BC000, 0xA07BFFFF}, // PF2 S111
792 {0xA07C0000, 0xA07C3FFF}, // PF2 S112
793 {0xA07C4000, 0xA07C7FFF}, // PF2 S113
794 {0xA07C8000, 0xA07CBFFF}, // PF2 S114
795 {0xA07CC000, 0xA07CFFFF}, // PF2 S115
796 {0xA07D0000, 0xA07D3FFF}, // PF2 S116
797 {0xA07D4000, 0xA07D7FFF}, // PF2 S117
798 {0xA07D8000, 0xA07DBFFF}, // PF2 S118
799 {0xA07DC000, 0xA07DFFFF}, // PF2 S119
800 {0xA07E0000, 0xA07E3FFF}, // PF2 S120
801 {0xA07E4000, 0xA07E7FFF}, // PF2 S121
802 {0xA07E8000, 0xA07EBFFF}, // PF2 S122
803 {0xA07EC000, 0xA07EFFFF}, // PF2 S123
804 {0xA07F0000, 0xA07F3FFF}, // PF2 S124
805 {0xA07F4000, 0xA07F7FFF}, // PF2 S125
806 {0xA07F8000, 0xA07FBFFF}, // PF2 S126
807 {0xA07FC000, 0xA07FFFFF}, // PF2 S127
808 {0xA0800000, 0xA0803FFF}, // PF2 S128
809 {0xA0804000, 0xA0807FFF}, // PF2 S129
810 {0xA0808000, 0xA080BFFF}, // PF2 S130
811 {0xA080C000, 0xA080FFFF}, // PF2 S131
812 {0xA0810000, 0xA0813FFF}, // PF2 S132
813 {0xA0814000, 0xA0817FFF}, // PF2 S133
814 {0xA0818000, 0xA081BFFF}, // PF2 S134
815 {0xA081C000, 0xA081FFFF}, // PF2 S135
816 {0xA0820000, 0xA0823FFF}, // PF2 S136
817 {0xA0824000, 0xA0827FFF}, // PF2 S137
818 {0xA0828000, 0xA082BFFF}, // PF2 S138
819 {0xA082C000, 0xA082FFFF}, // PF2 S139
820 {0xA0830000, 0xA0833FFF}, // PF2 S140
821 {0xA0834000, 0xA0837FFF}, // PF2 S141
822 {0xA0838000, 0xA083BFFF}, // PF2 S142
823 {0xA083C000, 0xA083FFFF}, // PF2 S143
824 {0xA0840000, 0xA0843FFF}, // PF2 S144
825 {0xA0844000, 0xA0847FFF}, // PF2 S145
826 {0xA0848000, 0xA084BFFF}, // PF2 S146
827 {0xA084C000, 0xA084FFFF}, // PF2 S147
828 {0xA0850000, 0xA0853FFF}, // PF2 S148
829 {0xA0854000, 0xA0857FFF}, // PF2 S149
830 {0xA0858000, 0xA085BFFF}, // PF2 S150
831 {0xA085C000, 0xA085FFFF}, // PF2 S151
832 {0xA0860000, 0xA0863FFF}, // PF2 S152
833 {0xA0864000, 0xA0867FFF}, // PF2 S153
834 {0xA0868000, 0xA086BFFF}, // PF2 S154
835 {0xA086C000, 0xA086FFFF}, // PF2 S155
836 {0xA0870000, 0xA0873FFF}, // PF2 S156
837 {0xA0874000, 0xA0877FFF}, // PF2 S157
838 {0xA0878000, 0xA087BFFF}, // PF2 S158
839 {0xA087C000, 0xA087FFFF}, // PF2 S159
840 {0xA0880000, 0xA0883FFF}, // PF2 S160
841 {0xA0884000, 0xA0887FFF}, // PF2 S161
842 {0xA0888000, 0xA088BFFF}, // PF2 S162
843 {0xA088C000, 0xA088FFFF}, // PF2 S163
844 {0xA0890000, 0xA0893FFF}, // PF2 S164
845 {0xA0894000, 0xA0897FFF}, // PF2 S165
846 {0xA0898000, 0xA089BFFF}, // PF2 S166
847 {0xA089C000, 0xA089FFFF}, // PF2 S167
848 {0xA08A0000, 0xA08A3FFF}, // PF2 S168
849 {0xA08A4000, 0xA08A7FFF}, // PF2 S169
850 {0xA08A8000, 0xA08ABFFF}, // PF2 S170
851 {0xA08AC000, 0xA08AFFFF}, // PF2 S171
852 {0xA08B0000, 0xA08B3FFF}, // PF2 S172
853 {0xA08B4000, 0xA08B7FFF}, // PF2 S173
854 {0xA08B8000, 0xA08BBFFF}, // PF2 S174
855 {0xA08BC000, 0xA08BFFFF}, // PF2 S175
856 {0xA08C0000, 0xA08C3FFF}, // PF2 S176
857 {0xA08C4000, 0xA08C7FFF}, // PF2 S177
858 {0xA08C8000, 0xA08CBFFF}, // PF2 S178
859 {0xA08CC000, 0xA08CFFFF}, // PF2 S179
860 {0xA08D0000, 0xA08D3FFF}, // PF2 S180
861 {0xA08D4000, 0xA08D7FFF}, // PF2 S181
862 {0xA08D8000, 0xA08DBFFF}, // PF2 S182
863 {0xA08DC000, 0xA08DFFFF}, // PF2 S183
864 {0xA08E0000, 0xA08E3FFF}, // PF2 S184
865 {0xA08E4000, 0xA08E7FFF}, // PF2 S185
866 {0xA08E8000, 0xA08EBFFF}, // PF2 S186
867 {0xA08EC000, 0xA08EFFFF}, // PF2 S187
868 {0xA08F0000, 0xA08F3FFF}, // PF2 S188
869 {0xA08F4000, 0xA08F7FFF}, // PF2 S189
870 {0xA08F8000, 0xA08FBFFF}, // PF2 S190
871 {0xA08FC000, 0xA08FFFFF}, // PF2 S191
872 {0xA0900000, 0xA0903FFF}, // PF3 S0
873 {0xA0904000, 0xA0907FFF}, // PF3 S1
874 {0xA0908000, 0xA090BFFF}, // PF3 S2
875 {0xA090C000, 0xA090FFFF}, // PF3 S3
876 {0xA0910000, 0xA0913FFF}, // PF3 S4
877 {0xA0914000, 0xA0917FFF}, // PF3 S5
878 {0xA0918000, 0xA091BFFF}, // PF3 S6
879 {0xA091C000, 0xA091FFFF}, // PF3 S7
880 {0xA0920000, 0xA0923FFF}, // PF3 S8
881 {0xA0924000, 0xA0927FFF}, // PF3 S9
882 {0xA0928000, 0xA092BFFF}, // PF3 S10
883 {0xA092C000, 0xA092FFFF}, // PF3 S11
884 {0xA0930000, 0xA0933FFF}, // PF3 S12
885 {0xA0934000, 0xA0937FFF}, // PF3 S13
886 {0xA0938000, 0xA093BFFF}, // PF3 S14
887 {0xA093C000, 0xA093FFFF}, // PF3 S15
888 {0xA0940000, 0xA0943FFF}, // PF3 S16
889 {0xA0944000, 0xA0947FFF}, // PF3 S17
890 {0xA0948000, 0xA094BFFF}, // PF3 S18
891 {0xA094C000, 0xA094FFFF}, // PF3 S19
892 {0xA0950000, 0xA0953FFF}, // PF3 S20
893 {0xA0954000, 0xA0957FFF}, // PF3 S21
894 {0xA0958000, 0xA095BFFF}, // PF3 S22
895 {0xA095C000, 0xA095FFFF}, // PF3 S23
896 {0xA0960000, 0xA0963FFF}, // PF3 S24
897 {0xA0964000, 0xA0967FFF}, // PF3 S25
898 {0xA0968000, 0xA096BFFF}, // PF3 S26
899 {0xA096C000, 0xA096FFFF}, // PF3 S27
900 {0xA0970000, 0xA0973FFF}, // PF3 S28
901 {0xA0974000, 0xA0977FFF}, // PF3 S29
902 {0xA0978000, 0xA097BFFF}, // PF3 S30
903 {0xA097C000, 0xA097FFFF}, // PF3 S31
904 {0xA0980000, 0xA0983FFF}, // PF3 S32
905 {0xA0984000, 0xA0987FFF}, // PF3 S33
906 {0xA0988000, 0xA098BFFF}, // PF3 S34
907 {0xA098C000, 0xA098FFFF}, // PF3 S35
908 {0xA0990000, 0xA0993FFF}, // PF3 S36
909 {0xA0994000, 0xA0997FFF}, // PF3 S37
910 {0xA0998000, 0xA099BFFF}, // PF3 S38
911 {0xA099C000, 0xA099FFFF}, // PF3 S39
912 {0xA09A0000, 0xA09A3FFF}, // PF3 S40
913 {0xA09A4000, 0xA09A7FFF}, // PF3 S41
914 {0xA09A8000, 0xA09ABFFF}, // PF3 S42
915 {0xA09AC000, 0xA09AFFFF}, // PF3 S43
916 {0xA09B0000, 0xA09B3FFF}, // PF3 S44
917 {0xA09B4000, 0xA09B7FFF}, // PF3 S45
918 {0xA09B8000, 0xA09BBFFF}, // PF3 S46
919 {0xA09BC000, 0xA09BFFFF}, // PF3 S47
920 {0xA09C0000, 0xA09C3FFF}, // PF3 S48
921 {0xA09C4000, 0xA09C7FFF}, // PF3 S49
922 {0xA09C8000, 0xA09CBFFF}, // PF3 S50
923 {0xA09CC000, 0xA09CFFFF}, // PF3 S51
924 {0xA09D0000, 0xA09D3FFF}, // PF3 S52
925 {0xA09D4000, 0xA09D7FFF}, // PF3 S53
926 {0xA09D8000, 0xA09DBFFF}, // PF3 S54
927 {0xA09DC000, 0xA09DFFFF}, // PF3 S55
928 {0xA09E0000, 0xA09E3FFF}, // PF3 S56
929 {0xA09E4000, 0xA09E7FFF}, // PF3 S57
930 {0xA09E8000, 0xA09EBFFF}, // PF3 S58
931 {0xA09EC000, 0xA09EFFFF}, // PF3 S59
932 {0xA09F0000, 0xA09F3FFF}, // PF3 S60
933 {0xA09F4000, 0xA09F7FFF}, // PF3 S61
934 {0xA09F8000, 0xA09FBFFF}, // PF3 S62
935 {0xA09FC000, 0xA09FFFFF}, // PF3 S63
936 };
937
938 IFX_CONST IfxFlash_flashSector IfxFlash_pFlashTablePhys[IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS] = {
939 {0xA0000000, 0xA00FFFFF}, /* PF0 PS0*/
940 {0xA0100000, 0xA01FFFFF}, /* PF0 PS1*/
941 {0xA0200000, 0xA02FFFFF}, /* PF0 PS2*/
942 {0xA0300000, 0xA03FFFFF}, /* PF1 PS0*/
943 {0xA0400000, 0xA04FFFFF}, /* PF1 PS1*/
944 {0xA0500000, 0xA05FFFFF}, /* PF1 PS2*/
945 {0xA0600000, 0xA06FFFFF}, /* PF2 PS0*/
946 {0xA0700000, 0xA07FFFFF}, /* PF2 PS1*/
947 {0xA0800000, 0xA08FFFFF}, /* PF2 PS2*/
948 {0xA0900000, 0xA09FFFFF}, /* PF3 PS0*/
949 };
IfxFlash_dFlashTableEepLog
IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableEepLog[IFXFLASH_DFLASH_NUM_LOG_SECTORS]
Definition: IfxFlash_cfg.c:74
IfxFlash_flashSector
contains start and end address of sectors
Definition: IfxFlash_cfg.h:234
IFXFLASH_PFLASH_NUM_LOG_SECTORS
#define IFXFLASH_PFLASH_NUM_LOG_SECTORS
Definition: IfxFlash_cfg.h:133
IFXFLASH_DFLASH_NUM_CFS_LOG_SECTORS
#define IFXFLASH_DFLASH_NUM_CFS_LOG_SECTORS
CFS logical sector count.
Definition: IfxFlash_cfg.h:85
IfxFlash_dFlashTableUcbLog
IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableUcbLog[IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS]
Definition: IfxFlash_cfg.c:244
IfxFlash_dFlashTableHsmLog
IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableHsmLog[IFXFLASH_DFLASH_NUM_HSM_LOG_SECTORS]
Definition: IfxFlash_cfg.c:205
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxFlash_pFlashTablePhys
IFX_CONST IfxFlash_flashSector IfxFlash_pFlashTablePhys[IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS]
Definition: IfxFlash_cfg.c:938
IfxFlash_dFlashTablePhys
IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTablePhys[IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS]
Definition: IfxFlash_cfg.c:240
IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS
#define IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS
Phy sector for DF.
Definition: IfxFlash_cfg.h:95
IfxFlash_cfg.h
FLASH on-chip implementation data.
IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS
#define IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS
Definition: IfxFlash_cfg.h:97
IFXFLASH_DFLASH_START
#define IFXFLASH_DFLASH_START
Definition: IfxFlash_cfg.h:105
IfxFlash_dFlashTableCfsLog
IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableCfsLog[IFXFLASH_DFLASH_NUM_CFS_LOG_SECTORS]
Definition: IfxFlash_cfg.c:52
IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS
#define IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS
Definition: IfxFlash_cfg.h:135
IFXFLASH_DFLASH_END
#define IFXFLASH_DFLASH_END
Definition: IfxFlash_cfg.h:81
IFXFLASH_DFLASH_NUM_LOG_SECTORS
#define IFXFLASH_DFLASH_NUM_LOG_SECTORS
Definition: IfxFlash_cfg.h:91
IFXFLASH_DFLASH_NUM_HSM_LOG_SECTORS
#define IFXFLASH_DFLASH_NUM_HSM_LOG_SECTORS
Definition: IfxFlash_cfg.h:89
IfxFlash_pFlashTableLog
IFX_CONST IfxFlash_flashSector IfxFlash_pFlashTableLog[IFXFLASH_PFLASH_NUM_LOG_SECTORS]
Definition: IfxFlash_cfg.c:295


iLLD_TC38A: IfxFlash_cfg.h Source File

  • _Impl
IfxFlash_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxFlash_cfg.h
3 * \brief FLASH on-chip implementation data
4 * \ingroup IfxLld_Flash
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Flash FLASH
42 * \ingroup IfxLld
43 * \defgroup IfxLld_Flash_Impl Implementation
44 * \ingroup IfxLld_Flash
45 * \defgroup IfxLld_Flash_Std Standard Driver
46 * \ingroup IfxLld_Flash
47 */
48
49 #ifndef IFXFLASH_CFG_H
50 #define IFXFLASH_CFG_H 1
51
52 /******************************************************************************/
53 /*----------------------------------Includes----------------------------------*/
54 /******************************************************************************/
55
56 #include "Cpu/Std/IfxCpu_Intrinsics.h"
57
58 /******************************************************************************/
59 /*-----------------------------------Macros-----------------------------------*/
60 /******************************************************************************/
61
62 /** \brief number of flash modules.
63 * This macro may be deprecated in future. Use IFXFLASH_NUM_MODULES instead.
64 */
65 #define IFXFLASH_NUM_FLASH_MODULES (1)
66
67 /** \brief base address for general command sequences
68 */
69 #define IFXFLASH_CMD_BASE_ADDRESS (0xaf000000)
70
71 /** \brief offset between command areas (in DFlash range)
72 */
73 #define IFXFLASH_CMD_BASE_OFFSET (0x00100000)
74
75 #define IFXFLASH_DFLASH_BANKS (2)
76
77 /** \brief Dflash burst length
78 */
79 #define IFXFLASH_DFLASH_BURST_LENGTH (0x20)
80
81 #define IFXFLASH_DFLASH_END (IFXFLASH_DFLASH_START + IFXFLASH_DFLASH_SIZE - 1)
82
83 /** \brief CFS logical sector count
84 */
85 #define IFXFLASH_DFLASH_NUM_CFS_LOG_SECTORS (16)
86
87 /** \brief
88 */
89 #define IFXFLASH_DFLASH_NUM_HSM_LOG_SECTORS (32)
90
91 #define IFXFLASH_DFLASH_NUM_LOG_SECTORS (128 + 32)
92
93 /** \brief Phy sector for DF
94 */
95 #define IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS (1)
96
97 #define IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS (48)
98
99 /** \brief 8 bytes
100 */
101 #define IFXFLASH_DFLASH_PAGE_LENGTH (8)
102
103 #define IFXFLASH_DFLASH_SIZE (IFXFLASH_DFLASH_NUM_LOG_SECTORS * 0x1000)
104
105 #define IFXFLASH_DFLASH_START (0xaf000000)
106
107 #define IFXFLASH_DFLASH_WORDLINE_LENGTH (512)
108
109 /** \brief
110 */
111 #define IFXFLASH_ERROR_TRACKING_MAX_CORRECTABLE_ERRORS (10)
112
113 /** \brief
114 */
115 #define IFXFLASH_ERROR_TRACKING_MAX_UNCORRECTABLE_ERRORS (1)
116
117 /** \brief number of flash modules
118 */
119 #define IFXFLASH_NUM_MODULES (1)
120
121 #define IFXFLASH_PFLASH_BANKS (4)
122
123 /** \brief P flash burst length
124 */
125 #define IFXFLASH_PFLASH_BURST_LENGTH (0x100)
126
127 /** \brief p flash end
128 */
129 #define IFXFLASH_PFLASH_END (IFXFLASH_PFLASH_START + IFXFLASH_PFLASH_SIZE - 1)
130
131 /** \brief
132 */
133 #define IFXFLASH_PFLASH_NUM_LOG_SECTORS ((192 * 3) + 64)
134
135 #define IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS (3 * 3 + 1)
136
137 /** \brief offset between PMU PFlash ranges
138 */
139 #define IFXFLASH_PFLASH_OFFSET (0x00800000)
140
141 /** \brief PF0 end
142 */
143 #define IFXFLASH_PFLASH_P0_END (IFXFLASH_PFLASH_P0_START + IFXFLASH_PFLASH_P0_SIZE - 1)
144
145 /** \brief PF0 size
146 */
147 #define IFXFLASH_PFLASH_P0_SIZE (0x300000)
148
149 /** \brief PF0 start
150 */
151 #define IFXFLASH_PFLASH_P0_START (0xa0000000)
152
153 /** \brief PF1 end
154 */
155 #define IFXFLASH_PFLASH_P1_END (IFXFLASH_PFLASH_P1_START + IFXFLASH_PFLASH_P1_SIZE - 1)
156
157 /** \brief PF1 size
158 */
159 #define IFXFLASH_PFLASH_P1_SIZE (0x300000)
160
161 /** \brief PF1 start
162 */
163 #define IFXFLASH_PFLASH_P1_START (IFXFLASH_PFLASH_P0_START + IFXFLASH_PFLASH_P0_SIZE)
164
165 /** \brief PF2 end
166 */
167 #define IFXFLASH_PFLASH_P2_END (IFXFLASH_PFLASH_P2_START + IFXFLASH_PFLASH_P2_SIZE - 1)
168
169 /** \brief PF2 size
170 */
171 #define IFXFLASH_PFLASH_P2_SIZE (0x300000)
172
173 /** \brief PF2 start
174 */
175 #define IFXFLASH_PFLASH_P2_START (IFXFLASH_PFLASH_P1_START + IFXFLASH_PFLASH_P1_SIZE)
176
177 /** \brief PF3 end
178 */
179 #define IFXFLASH_PFLASH_P3_END (IFXFLASH_PFLASH_P3_START + IFXFLASH_PFLASH_P3_SIZE - 1)
180
181 /** \brief PF3 size
182 */
183 #define IFXFLASH_PFLASH_P3_SIZE (0x100000)
184
185 /** \brief PF3 start
186 */
187 #define IFXFLASH_PFLASH_P3_START (IFXFLASH_PFLASH_P2_START + IFXFLASH_PFLASH_P2_SIZE)
188
189 #define IFXFLASH_PFLASH_PAGE_LENGTH (32)
190
191 /** \brief p flash size
192 */
193 #define IFXFLASH_PFLASH_SIZE (0x00A00000)
194
195 /** \brief p flash start
196 */
197 #define IFXFLASH_PFLASH_START (0xa0000000)
198
199 #define IFXFLASH_PFLASH_WORDLINE_LENGTH (1024)
200
201 /******************************************************************************/
202 /*-------------------------------Enumerations---------------------------------*/
203 /******************************************************************************/
204
205 /** \brief
206 */
207 typedef enum
208 {
209 IfxFlash_FlashType_D0 = 0, /**< \brief data flash #0 */
210 IfxFlash_FlashType_D1 = 1, /**< \brief data flash #1 */
211 IfxFlash_FlashType_P0 = 2, /**< \brief program flash #0 */
212 IfxFlash_FlashType_P1 = 3, /**< \brief program flash #1 */
213 IfxFlash_FlashType_P2 = 4, /**< \brief program flash #2 */
214 IfxFlash_FlashType_P3 = 5, /**< \brief program flash #3 */
215 IfxFlash_FlashType_Fa = 16 /**< \brief program flash array */
216 } IfxFlash_FlashType;
217
218 /** \brief user configuration block type
219 */
220 typedef enum
221 {
222 IfxFlash_UcbType_ucbPflash = 16, /**< \brief UCB for PFlash */
223 IfxFlash_UcbType_ucbDflash = 17, /**< \brief UCB for DFlash */
224 IfxFlash_UcbType_ucbDebug = 18, /**< \brief UCB for debug */
225 IfxFlash_UcbType_ucbRetest = 15 /**< \brief UCB for Re test */
226 } IfxFlash_UcbType;
227
228 /******************************************************************************/
229 /*-----------------------------Data Structures--------------------------------*/
230 /******************************************************************************/
231
232 /** \brief contains start and end address of sectors
233 */
234 typedef struct
235 {
236 uint32 start; /**< \brief start address of sector */
237 uint32 end; /**< \brief end address of sector */
238 } IfxFlash_flashSector;
239
240 /******************************************************************************/
241 /*-------------------Global Exported Variables/Constants----------------------*/
242 /******************************************************************************/
243
244 /** \brief
245 */
246 IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableCfsLog[IFXFLASH_DFLASH_NUM_CFS_LOG_SECTORS];
247
248 IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableEepLog[IFXFLASH_DFLASH_NUM_LOG_SECTORS];
249
250 /** \brief
251 */
252 IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableHsmLog[IFXFLASH_DFLASH_NUM_HSM_LOG_SECTORS];
253
254 IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTablePhys[IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS];
255
256 /** \brief
257 */
258 IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableUcbLog[IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS];
259
260 IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_pFlashTableLog[IFXFLASH_PFLASH_NUM_LOG_SECTORS];
261
262 IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_pFlashTablePhys[IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS];
263
264 #endif /* IFXFLASH_CFG_H */
IfxFlash_FlashType_D1
data flash #1
Definition: IfxFlash_cfg.h:210
IfxFlash_dFlashTableEepLog
IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableEepLog[IFXFLASH_DFLASH_NUM_LOG_SECTORS]
Definition: IfxFlash_cfg.h:248
IfxFlash_flashSector
contains start and end address of sectors
Definition: IfxFlash_cfg.h:234
IfxFlash_dFlashTableHsmLog
IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableHsmLog[IFXFLASH_DFLASH_NUM_HSM_LOG_SECTORS]
Definition: IfxFlash_cfg.h:252
IfxFlash_dFlashTablePhys
IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTablePhys[IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS]
Definition: IfxFlash_cfg.h:254
IfxFlash_UcbType_ucbDebug
UCB for debug.
Definition: IfxFlash_cfg.h:224
IFXFLASH_PFLASH_NUM_LOG_SECTORS
#define IFXFLASH_PFLASH_NUM_LOG_SECTORS
Definition: IfxFlash_cfg.h:133
IFXFLASH_DFLASH_NUM_CFS_LOG_SECTORS
#define IFXFLASH_DFLASH_NUM_CFS_LOG_SECTORS
CFS logical sector count.
Definition: IfxFlash_cfg.h:85
IfxFlash_UcbType_ucbRetest
UCB for Re test.
Definition: IfxFlash_cfg.h:225
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxFlash_FlashType_Fa
program flash array
Definition: IfxFlash_cfg.h:215
IfxFlash_flashSector::end
uint32 end
end address of sector
Definition: IfxFlash_cfg.h:237
IfxCpu_Intrinsics.h
IfxFlash_UcbType
IfxFlash_UcbType
user configuration block type
Definition: IfxFlash_cfg.h:220
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxFlash_UcbType_ucbDflash
UCB for DFlash.
Definition: IfxFlash_cfg.h:223
IfxFlash_UcbType_ucbPflash
UCB for PFlash.
Definition: IfxFlash_cfg.h:222
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS
#define IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS
Phy sector for DF.
Definition: IfxFlash_cfg.h:95
IfxFlash_flashSector::start
uint32 start
start address of sector
Definition: IfxFlash_cfg.h:236
IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS
#define IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS
Definition: IfxFlash_cfg.h:97
IfxFlash_FlashType
IfxFlash_FlashType
Definition: IfxFlash_cfg.h:207
IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS
#define IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS
Definition: IfxFlash_cfg.h:135
IfxFlash_dFlashTableCfsLog
IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableCfsLog[IFXFLASH_DFLASH_NUM_CFS_LOG_SECTORS]
Definition: IfxFlash_cfg.h:246
IfxFlash_FlashType_P3
program flash #3
Definition: IfxFlash_cfg.h:214
IfxFlash_pFlashTablePhys
IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_pFlashTablePhys[IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS]
Definition: IfxFlash_cfg.h:262
IFXFLASH_DFLASH_NUM_LOG_SECTORS
#define IFXFLASH_DFLASH_NUM_LOG_SECTORS
Definition: IfxFlash_cfg.h:91
IfxFlash_FlashType_P2
program flash #2
Definition: IfxFlash_cfg.h:213
IfxFlash_FlashType_P1
program flash #1
Definition: IfxFlash_cfg.h:212
IFXFLASH_DFLASH_NUM_HSM_LOG_SECTORS
#define IFXFLASH_DFLASH_NUM_HSM_LOG_SECTORS
Definition: IfxFlash_cfg.h:89
IfxFlash_FlashType_P0
program flash #0
Definition: IfxFlash_cfg.h:211
IfxFlash_FlashType_D0
data flash #0
Definition: IfxFlash_cfg.h:209
IfxFlash_pFlashTableLog
IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_pFlashTableLog[IFXFLASH_PFLASH_NUM_LOG_SECTORS]
Definition: IfxFlash_cfg.h:260
IfxFlash_dFlashTableUcbLog
IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableUcbLog[IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS]
Definition: IfxFlash_cfg.h:258


iLLD_TC38A: IfxGeth.c Source File

  • Geth
  • Std
IfxGeth.c
Go to the documentation of this file.
1 /**
2 * \file IfxGeth.c
3 * \brief GETH basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 *
24 */
25
26 /******************************************************************************/
27 /*----------------------------------Includes----------------------------------*/
28 /******************************************************************************/
29
30 #include "IfxGeth.h"
31
32 /******************************************************************************/
33 /*-------------------------Function Implementations---------------------------*/
34 /******************************************************************************/
35
36 void IfxGeth_disableModule(Ifx_GETH *gethSFR)
37 {
38 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
39 IfxScuWdt_clearCpuEndinit(psw); /* clears the endinit protection*/
40 gethSFR->CLC.B.DISR = 1; /* set the enable request */
41 IfxScuWdt_setCpuEndinit(psw); /* sets the endinit protection back on*/
42 }
43
44
45 void IfxGeth_enableModule(Ifx_GETH *gethSFR)
46 {
47 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
48
49 if (IfxGeth_isModuleEnabled(gethSFR) != 1) /* if module is not enabled already */
50 {
51 IfxScuWdt_clearCpuEndinit(psw); /* clears the endinit protection*/
52 gethSFR->CLC.B.DISR = 0; /* set the enable request */
53 IfxScuWdt_setCpuEndinit(psw); /* sets the endinit protection back on*/
54 }
55
56 IfxGeth_isModuleEnabled(gethSFR); /* read back to ensure proper enabling */
57 }
58
59
60 volatile Ifx_SRC_SRCR *IfxGeth_getSrcPointer(Ifx_GETH *gethSFR, IfxGeth_ServiceRequest serviceRequest)
61 {
62 IFX_UNUSED_PARAMETER(gethSFR);
63 return &MODULE_SRC.GETH.GETH[0].SR[serviceRequest];
64 }
65
66
67 void IfxGeth_mac_setLineSpeed(Ifx_GETH *gethSFR, IfxGeth_LineSpeed speed)
68 {
69 switch (speed)
70 {
71 case IfxGeth_LineSpeed_10Mbps:
72 gethSFR->MAC_CONFIGURATION.B.PS = 1;
73 gethSFR->MAC_CONFIGURATION.B.FES = 0;
74 break;
75 case IfxGeth_LineSpeed_100Mbps:
76 gethSFR->MAC_CONFIGURATION.B.PS = 1;
77 gethSFR->MAC_CONFIGURATION.B.FES = 1;
78 break;
79 case IfxGeth_LineSpeed_1000Mbps:
80 gethSFR->MAC_CONFIGURATION.B.PS = 0;
81 gethSFR->MAC_CONFIGURATION.B.FES = 0;
82 break;
83 case IfxGeth_LineSpeed_2500Mbps:
84 gethSFR->MAC_CONFIGURATION.B.PS = 0;
85 gethSFR->MAC_CONFIGURATION.B.FES = 1;
86 break;
87 default:
88 break;
89 }
90 }
91
92
93 void IfxGeth_mac_setMacAddress(Ifx_GETH *gethSFR, uint8 *macAddress)
94 {
95 gethSFR->MAC_ADDRESS_HIGH0.U = 0
96 | ((uint32)macAddress[4] << 0U)
97 | ((uint32)macAddress[5] << 8U)
98 | 0x80000000U;
99
100 gethSFR->MAC_ADDRESS_LOW0.U = 0
101 | ((uint32)macAddress[0] << 0U)
102 | ((uint32)macAddress[1] << 8U)
103 | ((uint32)macAddress[2] << 16U)
104 | ((uint32)macAddress[3] << 24U);
105 }
106
107
108 void IfxGeth_mtl_clearAllInterruptFlags(Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId)
109 {
110 uint32 value = (1 << IfxGeth_MtlInterruptFlag_txQueueUnderflow) | (1 << IfxGeth_MtlInterruptFlag_averageBitsPerSlot) | (1 << IfxGeth_MtlInterruptFlag_rxQueueOverflow);
111
112 switch (queueId)
113 {
114 case IfxGeth_MtlQueue_0:
115 gethSFR->MTL_Q0.INTERRUPT_CONTROL_STATUS.U |= value;
116 break;
117 case IfxGeth_MtlQueue_1:
118 gethSFR->MTL_Q1.INTERRUPT_CONTROL_STATUS.U |= value;
119 break;
120 case IfxGeth_MtlQueue_2:
121 gethSFR->MTL_Q2.INTERRUPT_CONTROL_STATUS.U |= value;
122 break;
123 case IfxGeth_MtlQueue_3:
124 gethSFR->MTL_Q3.INTERRUPT_CONTROL_STATUS.U |= value;
125 break;
126 }
127 }
128
129
130 void IfxGeth_mtl_clearInterruptFlag(Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId, IfxGeth_MtlInterruptFlag flag)
131 {
132 uint32 mask = ((1 << IfxGeth_MtlInterruptFlag_txQueueUnderflow) | (1 << IfxGeth_MtlInterruptFlag_averageBitsPerSlot) | (1 << IfxGeth_MtlInterruptFlag_rxQueueOverflow)) << 8;
133 uint32 value = (1 << flag);
134
135 switch (queueId)
136 {
137 case IfxGeth_MtlQueue_0:
138 gethSFR->MTL_Q0.INTERRUPT_CONTROL_STATUS.U = (gethSFR->MTL_Q0.INTERRUPT_CONTROL_STATUS.U & mask) | value;
139 break;
140 case IfxGeth_MtlQueue_1:
141 gethSFR->MTL_Q1.INTERRUPT_CONTROL_STATUS.U = (gethSFR->MTL_Q1.INTERRUPT_CONTROL_STATUS.U & mask) | value;
142 break;
143 case IfxGeth_MtlQueue_2:
144 gethSFR->MTL_Q2.INTERRUPT_CONTROL_STATUS.U = (gethSFR->MTL_Q2.INTERRUPT_CONTROL_STATUS.U & mask) | value;
145 break;
146 case IfxGeth_MtlQueue_3:
147 gethSFR->MTL_Q3.INTERRUPT_CONTROL_STATUS.U = (gethSFR->MTL_Q3.INTERRUPT_CONTROL_STATUS.U & mask) | value;
148 break;
149 }
150 }
151
152
153 void IfxGeth_mtl_disableInterrupt(Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId, IfxGeth_MtlInterruptFlag flag)
154 {
155 uint32 mask = (1 << IfxGeth_MtlInterruptFlag_txQueueUnderflow) | (1 << IfxGeth_MtlInterruptFlag_averageBitsPerSlot) | (1 << IfxGeth_MtlInterruptFlag_rxQueueOverflow);
156
157 uint32 value = ~(1 << (flag + 8));
158
159 switch (queueId)
160 {
161 case IfxGeth_MtlQueue_0:
162 gethSFR->MTL_Q0.INTERRUPT_CONTROL_STATUS.U = (gethSFR->MTL_Q0.INTERRUPT_CONTROL_STATUS.U & ~mask) & value;
163 break;
164 case IfxGeth_MtlQueue_1:
165 gethSFR->MTL_Q1.INTERRUPT_CONTROL_STATUS.U = (gethSFR->MTL_Q1.INTERRUPT_CONTROL_STATUS.U & ~mask) & value;
166 break;
167 case IfxGeth_MtlQueue_2:
168 gethSFR->MTL_Q2.INTERRUPT_CONTROL_STATUS.U = (gethSFR->MTL_Q2.INTERRUPT_CONTROL_STATUS.U & ~mask) & value;
169 break;
170 case IfxGeth_MtlQueue_3:
171 gethSFR->MTL_Q3.INTERRUPT_CONTROL_STATUS.U = (gethSFR->MTL_Q3.INTERRUPT_CONTROL_STATUS.U & ~mask) & value;
172 break;
173 }
174 }
175
176
177 void IfxGeth_mtl_enableInterrupt(Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId, IfxGeth_MtlInterruptFlag flag)
178 {
179 uint32 mask = (1 << IfxGeth_MtlInterruptFlag_txQueueUnderflow) | (1 << IfxGeth_MtlInterruptFlag_averageBitsPerSlot) | (1 << IfxGeth_MtlInterruptFlag_rxQueueOverflow);
180 uint32 value = (1 << (flag + 8));
181
182 switch (queueId)
183 {
184 case IfxGeth_MtlQueue_0:
185 gethSFR->MTL_Q0.INTERRUPT_CONTROL_STATUS.U = (gethSFR->MTL_Q0.INTERRUPT_CONTROL_STATUS.U & ~mask) | value;
186 break;
187 case IfxGeth_MtlQueue_1:
188 gethSFR->MTL_Q1.INTERRUPT_CONTROL_STATUS.U = (gethSFR->MTL_Q1.INTERRUPT_CONTROL_STATUS.U & ~mask) | value;
189 break;
190 case IfxGeth_MtlQueue_2:
191 gethSFR->MTL_Q2.INTERRUPT_CONTROL_STATUS.U = (gethSFR->MTL_Q2.INTERRUPT_CONTROL_STATUS.U & ~mask) | value;
192 break;
193 case IfxGeth_MtlQueue_3:
194 gethSFR->MTL_Q3.INTERRUPT_CONTROL_STATUS.U = (gethSFR->MTL_Q3.INTERRUPT_CONTROL_STATUS.U & ~mask) | value;
195 break;
196 }
197 }
198
199
200 void IfxGeth_mtl_enableTxQueue(Ifx_GETH *gethSFR, IfxGeth_TxMtlQueue queueId)
201 {
202 switch (queueId)
203 {
204 case IfxGeth_TxMtlQueue_0:
205 gethSFR->MTL_TXQ0.OPERATION_MODE.B.TXQEN = 2;
206 break;
207 case IfxGeth_TxMtlQueue_1:
208 gethSFR->MTL_TXQ1.OPERATION_MODE.B.TXQEN = 2;
209 break;
210 case IfxGeth_TxMtlQueue_2:
211 gethSFR->MTL_TXQ2.OPERATION_MODE.B.TXQEN = 2;
212 break;
213 case IfxGeth_TxMtlQueue_3:
214 gethSFR->MTL_TXQ3.OPERATION_MODE.B.TXQEN = 2;
215 break;
216 }
217 }
218
219
220 boolean IfxGeth_mtl_isInterruptFlagSet(Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId, IfxGeth_MtlInterruptFlag flag)
221 {
222 uint32 value = (1 << flag);
223 boolean status = 0;
224
225 switch (queueId)
226 {
227 case IfxGeth_MtlQueue_0:
228 status = (gethSFR->MTL_Q0.INTERRUPT_CONTROL_STATUS.U & (Ifx_UReg_32Bit)value);
229 break;
230 case IfxGeth_MtlQueue_1:
231 status = (gethSFR->MTL_Q1.INTERRUPT_CONTROL_STATUS.U & (Ifx_UReg_32Bit)value);
232 break;
233 case IfxGeth_MtlQueue_2:
234 status = (gethSFR->MTL_Q2.INTERRUPT_CONTROL_STATUS.U & (Ifx_UReg_32Bit)value);
235 break;
236 case IfxGeth_MtlQueue_3:
237 status = (gethSFR->MTL_Q3.INTERRUPT_CONTROL_STATUS.U & (Ifx_UReg_32Bit)value);
238 break;
239 }
240
241 return status;
242 }
243
244
245 void IfxGeth_mtl_setRxForwardErrorPacket(Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId, boolean enabled)
246 {
247 switch (queueId)
248 {
249 case IfxGeth_RxMtlQueue_0:
250 gethSFR->MTL_RXQ0.OPERATION_MODE.B.FEP = enabled;
251 break;
252 case IfxGeth_RxMtlQueue_1:
253 gethSFR->MTL_RXQ1.OPERATION_MODE.B.FEP = enabled;
254 break;
255 case IfxGeth_RxMtlQueue_2:
256 gethSFR->MTL_RXQ2.OPERATION_MODE.B.FEP = enabled;
257 break;
258 case IfxGeth_RxMtlQueue_3:
259 gethSFR->MTL_RXQ3.OPERATION_MODE.B.FEP = enabled;
260 break;
261 }
262 }
263
264
265 void IfxGeth_mtl_setRxForwardUndersizedGoodPacket(Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId, boolean enabled)
266 {
267 switch (queueId)
268 {
269 case IfxGeth_RxMtlQueue_0:
270 gethSFR->MTL_RXQ0.OPERATION_MODE.B.FUP = enabled;
271 break;
272 case IfxGeth_RxMtlQueue_1:
273 gethSFR->MTL_RXQ1.OPERATION_MODE.B.FUP = enabled;
274 break;
275 case IfxGeth_RxMtlQueue_2:
276 gethSFR->MTL_RXQ2.OPERATION_MODE.B.FUP = enabled;
277 break;
278 case IfxGeth_RxMtlQueue_3:
279 gethSFR->MTL_RXQ3.OPERATION_MODE.B.FUP = enabled;
280 break;
281 }
282 }
283
284
285 void IfxGeth_mtl_setRxQueueSize(Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId, IfxGeth_QueueSize queueSize)
286 {
287 switch (queueId)
288 {
289 case IfxGeth_RxMtlQueue_0:
290 gethSFR->MTL_RXQ0.OPERATION_MODE.B.RQS = queueSize;
291 break;
292 case IfxGeth_RxMtlQueue_1:
293 gethSFR->MTL_RXQ1.OPERATION_MODE.B.RQS = queueSize;
294 break;
295 case IfxGeth_RxMtlQueue_2:
296 gethSFR->MTL_RXQ2.OPERATION_MODE.B.RQS = queueSize;
297 break;
298 case IfxGeth_RxMtlQueue_3:
299 gethSFR->MTL_RXQ3.OPERATION_MODE.B.RQS = queueSize;
300 break;
301 }
302 }
303
304
305 void IfxGeth_mtl_setRxStoreAndForward(Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId, boolean enabled)
306 {
307 switch (queueId)
308 {
309 case IfxGeth_RxMtlQueue_0:
310 gethSFR->MTL_RXQ0.OPERATION_MODE.B.RSF = enabled;
311 break;
312 case IfxGeth_RxMtlQueue_1:
313 gethSFR->MTL_RXQ1.OPERATION_MODE.B.RSF = enabled;
314 break;
315 case IfxGeth_RxMtlQueue_2:
316 gethSFR->MTL_RXQ2.OPERATION_MODE.B.RSF = enabled;
317 break;
318 case IfxGeth_RxMtlQueue_3:
319 gethSFR->MTL_RXQ3.OPERATION_MODE.B.RSF = enabled;
320 break;
321 }
322 }
323
324
325 void IfxGeth_mtl_setTxQueueSize(Ifx_GETH *gethSFR, IfxGeth_TxMtlQueue queueId, IfxGeth_QueueSize queueSize)
326 {
327 switch (queueId)
328 {
329 case IfxGeth_TxMtlQueue_0:
330 gethSFR->MTL_TXQ0.OPERATION_MODE.B.TQS = queueSize;
331 break;
332 case IfxGeth_TxMtlQueue_1:
333 gethSFR->MTL_TXQ1.OPERATION_MODE.B.TQS = queueSize;
334 break;
335 case IfxGeth_TxMtlQueue_2:
336 gethSFR->MTL_TXQ2.OPERATION_MODE.B.TQS = queueSize;
337 break;
338 case IfxGeth_TxMtlQueue_3:
339 gethSFR->MTL_TXQ3.OPERATION_MODE.B.TQS = queueSize;
340 break;
341 }
342 }
343
344
345 void IfxGeth_mtl_setTxStoreAndForward(Ifx_GETH *gethSFR, IfxGeth_TxMtlQueue queueId, boolean enabled)
346 {
347 switch (queueId)
348 {
349 case IfxGeth_TxMtlQueue_0:
350 gethSFR->MTL_TXQ0.OPERATION_MODE.B.TSF = enabled;
351 break;
352 case IfxGeth_TxMtlQueue_1:
353 gethSFR->MTL_TXQ1.OPERATION_MODE.B.TSF = enabled;
354 break;
355 case IfxGeth_TxMtlQueue_2:
356 gethSFR->MTL_TXQ2.OPERATION_MODE.B.TSF = enabled;
357 break;
358 case IfxGeth_TxMtlQueue_3:
359 gethSFR->MTL_TXQ3.OPERATION_MODE.B.TSF = enabled;
360 break;
361 }
362 }
363
364
365 void IfxGeth_resetModule(Ifx_GETH *gethSFR)
366 {
367 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
368 IfxScuWdt_clearCpuEndinit(passwd);
369
370 gethSFR->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
371 gethSFR->KRST1.B.RST = 1;
372 IfxScuWdt_setCpuEndinit(passwd);
373
374 while (0 == gethSFR->KRST0.B.RSTSTAT) /* Wait until reset is executed */
375 {}
376
377 IfxScuWdt_clearCpuEndinit(passwd);
378 gethSFR->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
379
380 IfxScuWdt_setCpuEndinit(passwd);
381 }
382
383
384 void IfxGeth_phy_Clause22_readMDIORegister(uint32 layerAddr, uint32 regAddr, uint32 *pData)
385 {
386 // 5bit Physical Layer Adddress, 5bit GMII Regnr, 4bit csrclock divider, Read, Busy
387 GETH_MAC_MDIO_ADDRESS.U = (layerAddr << 21) | (regAddr << 16) | (0 << 8) | (3 << 2) | (1 << 0);
388
389 IFXGETH_PHY_WAIT_GMII_READY();
390
391 // get data
392 *pData = GETH_MAC_MDIO_DATA.U;
393 }
394
395
396 void IfxGeth_Phy_Clause22_writeMDIORegister(uint32 layerAddr, uint32 regAddr, uint32 data)
397 {
398 // put data
399 GETH_MAC_MDIO_DATA.U = data;
400
401 // 5bit Physical Layer Adddress, 5bit GMII Regnr, 4bit csrclock divider, Write, Busy
402 GETH_MAC_MDIO_ADDRESS.U = (layerAddr << 21) | (regAddr << 16) | (0 << 8) | (1 << 2) | (1 << 0);
403
404 IFXGETH_PHY_WAIT_GMII_READY();
405 }
406
407
408 void IfxGeth_phy_Clause45_readMDIORegister(uint32 layerAddr, uint32 deviceAddr, uint32 regAddr, uint32 *pData)
409 {
410 // put data
411 GETH_MAC_MDIO_DATA.U = (regAddr << 16);
412
413 // 5bit Physical Layer Adddress, 5bit GMII Regnr, 4bit csrclock divider, Read, Clause 45, Busy
414 GETH_MAC_MDIO_ADDRESS.U = (layerAddr << 21) | (deviceAddr << 16) | (0 << 8) | (3 << 2) | (1 << 1) | (1 << 0);
415
416 IFXGETH_PHY_WAIT_GMII_READY();
417
418 // get data
419 *pData = GETH_MAC_MDIO_DATA.U;
420 }
421
422
423 void IfxGeth_Phy_Clause45_writeMDIORegister(uint32 layerAddr, uint32 deviceAddr, uint32 regAddr, uint32 data)
424 {
425 // put data
426 GETH_MAC_MDIO_DATA.U = (regAddr << 16) | data;
427
428 // 5bit Physical Layer Adddress, 5bit GMII Regnr, 4bit csrclock divider, Write, Clause 45, Busy
429 GETH_MAC_MDIO_ADDRESS.U = (layerAddr << 21) | (deviceAddr << 16) | (0 << 8) | (1 << 2) | (1 << 1) | (1 << 0);
430
431 IFXGETH_PHY_WAIT_GMII_READY();
432 }
433
434
435 void IfxGeth_mac_setMaxPacketSize(Ifx_GETH *gethSFR, uint16 maxPacketSize)
436 {
437 uint16 maxSize;
438 Ifx_GETH_MAC_CONFIGURATION macConfig;
439
440 maxSize = maxPacketSize;
441 macConfig.U = gethSFR->MAC_CONFIGURATION.U;
442
443 if (maxSize == 1518)
444 {
445 macConfig.B.JE = 0;
446 macConfig.B.S2KP = 0;
447 macConfig.B.GPSLCE = 0;
448 macConfig.B.JD = 0;
449 }
450 else if (maxSize == 2000)
451 {
452 macConfig.B.JE = 0;
453 macConfig.B.S2KP = 1;
454 macConfig.B.GPSLCE = 0;
455 macConfig.B.JD = 0;
456 }
457 else if (maxSize == 9018)
458 {
459 macConfig.B.JE = 1;
460 macConfig.B.GPSLCE = 0;
461 macConfig.B.JD = 0;
462 }
463 else
464 {
465 macConfig.B.JE = 0;
466 macConfig.B.S2KP = 0;
467 macConfig.B.GPSLCE = 1;
468 macConfig.B.JD = 1;
469 gethSFR->MAC_EXT_CONFIGURATION.B.GPSL = maxSize;
470 gethSFR->MAC_WATCHDOG_TIMEOUT.B.PWE = 1;
471 gethSFR->MAC_WATCHDOG_TIMEOUT.B.WTO = 0x0e;
472 }
473
474 gethSFR->MAC_CONFIGURATION.U = macConfig.U;
475 }
476
477
478 IfxGeth_Index IfxGeth_getIndex(Ifx_GETH *geth)
479 {
480 uint32 index;
481 IfxGeth_Index result;
482
483 result = IfxGeth_Index_none;
484
485 for (index = 0; index < IFXGETH_NUM_MODULES; index++)
486 {
487 if (IfxGeth_cfg_indexMap[index].module == geth)
488 {
489 result = (IfxGeth_Index)IfxGeth_cfg_indexMap[index].index;
490 break;
491 }
492 }
493
494 return result;
495 }
496
497
498 Ifx_GETH *IfxGeth_getAddress(IfxGeth_Index geth)
499 {
500 Ifx_GETH *module;
501
502 if (geth < IFXGETH_NUM_MODULES)
503 {
504 module = (Ifx_GETH *)IfxGeth_cfg_indexMap[geth].module;
505 }
506 else
507 {
508 module = NULL_PTR;
509 }
510
511 return module;
512 }
513
514
515 boolean IfxGeth_mac_writeQueueVlanTag(Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId, uint16 vLanTag)
516 {
517 Ifx_GETH_MAC_VLAN_INCL vlan_incl;
518
519 if (gethSFR->MAC_VLAN_INCL.B.BUSY)
520 {
521 return FALSE;
522 }
523
524 vlan_incl.B.CBTI = 1;
525 vlan_incl.B.CSVL = 0;
526 vlan_incl.B.VLT = vLanTag;
527 vlan_incl.B.RDWR = 1;
528 vlan_incl.B.ADDR = queueId;
529
530 gethSFR->MAC_VLAN_INCL.U = vlan_incl.U;
531
532 // Wait until operation is finished
533 while (gethSFR->MAC_VLAN_INCL.B.BUSY)
534 {}
535
536 return TRUE;
537 }
538
539
540 boolean IfxGeth_mac_readQueueVlanTag(Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId, uint16 *const vLanTag)
541 {
542 Ifx_GETH_MAC_VLAN_INCL vlan_incl;
543
544 if (gethSFR->MAC_VLAN_INCL.B.BUSY)
545 {
546 return FALSE;
547 }
548
549 vlan_incl.B.CBTI = 1;
550 vlan_incl.B.RDWR = 0;
551 vlan_incl.B.ADDR = queueId;
552
553 gethSFR->MAC_VLAN_INCL.U = vlan_incl.U;
554
555 // Wait until operation is finished
556 while (gethSFR->MAC_VLAN_INCL.B.BUSY)
557 {}
558
559 *vLanTag = gethSFR->MAC_VLAN_INCL.B.VLT;
560
561 return TRUE;
562 }
IfxGeth_MtlInterruptFlag_averageBitsPerSlot
Average Bits Per Slot.
Definition: IfxGeth.h:140
IFXGETH_NUM_MODULES
#define IFXGETH_NUM_MODULES
Number of Geth instances.
Definition: IfxGeth_cfg.h:78
IfxGeth_MtlQueue_3
Mtl Queue 3.
Definition: IfxGeth.h:151
IfxGeth_MtlInterruptFlag_rxQueueOverflow
Receive Queue Overflow.
Definition: IfxGeth.h:141
IfxGeth_mtl_isInterruptFlagSet
boolean IfxGeth_mtl_isInterruptFlagSet(Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId, IfxGeth_MtlInterruptFlag flag)
Returns the status of selected Mtl interrupt flag.
Definition: IfxGeth.c:220
IfxGeth_mac_setMaxPacketSize
void IfxGeth_mac_setMaxPacketSize(Ifx_GETH *gethSFR, uint16 maxPacketSize)
Sets the maximum size of the packet.
Definition: IfxGeth.c:435
IfxGeth_Index
IfxGeth_Index
List of the available Geth instances.
Definition: IfxGeth_cfg.h:104
IfxGeth_Phy_Clause22_writeMDIORegister
void IfxGeth_Phy_Clause22_writeMDIORegister(uint32 layerAddr, uint32 regAddr, uint32 data)
Writes to a MDIO register of Clause 22 PHY.
Definition: IfxGeth.c:396
IfxGeth_mtl_disableInterrupt
void IfxGeth_mtl_disableInterrupt(Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId, IfxGeth_MtlInterruptFlag flag)
Disables the selected Mtl interrupt flag.
Definition: IfxGeth.c:153
IfxGeth_LineSpeed_2500Mbps
2500 Mbps
Definition: IfxGeth.h:132
IfxGeth_RxMtlQueue_3
Rx Queue 3.
Definition: IfxGeth.h:238
IfxGeth_Index_none
Not Selected.
Definition: IfxGeth_cfg.h:106
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxGeth_mtl_setTxQueueSize
void IfxGeth_mtl_setTxQueueSize(Ifx_GETH *gethSFR, IfxGeth_TxMtlQueue queueId, IfxGeth_QueueSize queueSize)
Sets the size of the selected TX Queue.
Definition: IfxGeth.c:325
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxGeth_resetModule
void IfxGeth_resetModule(Ifx_GETH *gethSFR)
resets Ethernet kernel
Definition: IfxGeth.c:365
IfxGeth_ServiceRequest
IfxGeth_ServiceRequest
Geth service request index.
Definition: IfxGeth.h:243
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxGeth_LineSpeed_1000Mbps
1000 Mbps
Definition: IfxGeth.h:131
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxGeth_MtlQueue_0
Mtl Queue 0.
Definition: IfxGeth.h:148
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxGeth_TxMtlQueue_1
Tx Queue 1.
Definition: IfxGeth.h:272
IfxGeth_TxMtlQueue
IfxGeth_TxMtlQueue
Tx MTL Queue ID.
Definition: IfxGeth.h:269
IfxGeth_RxMtlQueue_0
Rx Queue 0.
Definition: IfxGeth.h:235
IfxGeth_mac_readQueueVlanTag
boolean IfxGeth_mac_readQueueVlanTag(Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId, uint16 *const vLanTag)
Reads from Queue Vlan tag.
Definition: IfxGeth.c:540
IfxGeth_getAddress
Ifx_GETH * IfxGeth_getAddress(IfxGeth_Index geth)
Get the address of the specified GETH resource index.
Definition: IfxGeth.c:498
IfxGeth_TxMtlQueue_2
Tx Queue 2.
Definition: IfxGeth.h:273
IfxGeth_mac_writeQueueVlanTag
boolean IfxGeth_mac_writeQueueVlanTag(Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId, uint16 vLanTag)
Writes to Queue Vlan tag.
Definition: IfxGeth.c:515
IfxGeth.h
GETH basic functionality.
IfxGeth_mac_setLineSpeed
void IfxGeth_mac_setLineSpeed(Ifx_GETH *gethSFR, IfxGeth_LineSpeed speed)
Sets the Ethernet Line Speed.
Definition: IfxGeth.c:67
IfxGeth_mtl_clearAllInterruptFlags
void IfxGeth_mtl_clearAllInterruptFlags(Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId)
Clears all the Mtl interrupt flags.
Definition: IfxGeth.c:108
IfxGeth_mtl_enableInterrupt
void IfxGeth_mtl_enableInterrupt(Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId, IfxGeth_MtlInterruptFlag flag)
Enables the selected Mtl interrupt flag.
Definition: IfxGeth.c:177
IfxGeth_RxMtlQueue_2
Rx Queue 2.
Definition: IfxGeth.h:237
IfxGeth_Phy_Clause45_writeMDIORegister
void IfxGeth_Phy_Clause45_writeMDIORegister(uint32 layerAddr, uint32 deviceAddr, uint32 regAddr, uint32 data)
Writes to a MDIO register for Clause 45 PHY.
Definition: IfxGeth.c:423
IfxGeth_mtl_setRxStoreAndForward
void IfxGeth_mtl_setRxStoreAndForward(Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId, boolean enabled)
Sets the Receive Store And Forward for the selected RX Queue.
Definition: IfxGeth.c:305
IfxGeth_MtlInterruptFlag
IfxGeth_MtlInterruptFlag
MTL interrupt flags.
Definition: IfxGeth.h:137
IfxGeth_LineSpeed_10Mbps
10 Mbps
Definition: IfxGeth.h:129
IfxGeth_phy_Clause45_readMDIORegister
void IfxGeth_phy_Clause45_readMDIORegister(uint32 layerAddr, uint32 deviceAddr, uint32 regAddr, uint32 *pData)
Reads a MDIO register of Clause 45 PHY.
Definition: IfxGeth.c:408
IfxGeth_MtlInterruptFlag_txQueueUnderflow
Transmit Queue Underflow.
Definition: IfxGeth.h:139
IfxGeth_mtl_setRxForwardErrorPacket
void IfxGeth_mtl_setRxForwardErrorPacket(Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId, boolean enabled)
Sets the Receive Forward Error Packets for the selected RX Queue.
Definition: IfxGeth.c:245
IFXGETH_PHY_WAIT_GMII_READY
#define IFXGETH_PHY_WAIT_GMII_READY()
Waits until GMII is busy.
Definition: IfxGeth.h:74
IfxGeth_enableModule
void IfxGeth_enableModule(Ifx_GETH *gethSFR)
Enables the clock for GETH module.
Definition: IfxGeth.c:45
IfxGeth_mtl_clearInterruptFlag
void IfxGeth_mtl_clearInterruptFlag(Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId, IfxGeth_MtlInterruptFlag flag)
Clears the selected Mtl interrupt flag.
Definition: IfxGeth.c:130
IfxGeth_mac_setMacAddress
void IfxGeth_mac_setMacAddress(Ifx_GETH *gethSFR, uint8 *macAddress)
Sets the MAC Address.
Definition: IfxGeth.c:93
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxGeth_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxGeth_cfg_indexMap[IFXGETH_NUM_MODULES]
Definition: IfxGeth_cfg.c:53
IfxGeth_mtl_enableTxQueue
void IfxGeth_mtl_enableTxQueue(Ifx_GETH *gethSFR, IfxGeth_TxMtlQueue queueId)
Enables the selected TX Queue.
Definition: IfxGeth.c:200
IfxGeth_mtl_setRxQueueSize
void IfxGeth_mtl_setRxQueueSize(Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId, IfxGeth_QueueSize queueSize)
Sets the size of the selected RX Queue.
Definition: IfxGeth.c:285
IfxGeth_mtl_setTxStoreAndForward
void IfxGeth_mtl_setTxStoreAndForward(Ifx_GETH *gethSFR, IfxGeth_TxMtlQueue queueId, boolean enabled)
Sets the Transmit Store And Forward for teh selected TX Queue.
Definition: IfxGeth.c:345
IfxGeth_mtl_setRxForwardUndersizedGoodPacket
void IfxGeth_mtl_setRxForwardUndersizedGoodPacket(Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId, boolean enabled)
Sets the Receive Forward Undersized Good Packets for the selected RX Queue.
Definition: IfxGeth.c:265
IfxGeth_disableModule
void IfxGeth_disableModule(Ifx_GETH *gethSFR)
Disables the clock for GETH module.
Definition: IfxGeth.c:36
IfxGeth_LineSpeed
IfxGeth_LineSpeed
Ethernet line speed.
Definition: IfxGeth.h:127
IfxGeth_LineSpeed_100Mbps
100 Mbps
Definition: IfxGeth.h:130
IfxGeth_MtlQueue
IfxGeth_MtlQueue
MTL Queue ID.
Definition: IfxGeth.h:146
IfxGeth_TxMtlQueue_0
Tx Queue 0.
Definition: IfxGeth.h:271
IfxGeth_getSrcPointer
volatile Ifx_SRC_SRCR * IfxGeth_getSrcPointer(Ifx_GETH *gethSFR, IfxGeth_ServiceRequest serviceRequest)
Returns the Src Pointer of the selected GETH service request node.
Definition: IfxGeth.c:60
IfxGeth_RxMtlQueue_1
Rx Queue 1.
Definition: IfxGeth.h:236
IfxGeth_phy_Clause22_readMDIORegister
void IfxGeth_phy_Clause22_readMDIORegister(uint32 layerAddr, uint32 regAddr, uint32 *pData)
Reads a MDIO register of Clause 22 PHY.
Definition: IfxGeth.c:384
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxGeth_MtlQueue_1
Mtl Queue 1.
Definition: IfxGeth.h:149
IfxGeth_getIndex
IfxGeth_Index IfxGeth_getIndex(Ifx_GETH *geth)
API to get the resource index of the GETH specified.
Definition: IfxGeth.c:478
IfxGeth_QueueSize
IfxGeth_QueueSize
Tx/RX Queue size in blocks of 256 bytes Definition in MTL_TXQi_OPERATION_MODE.B.TQS and MTL_RXQi_OPER...
Definition: IfxGeth.h:176
TRUE
#define TRUE
Definition: Platform_Types.h:90
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
IfxGeth_RxMtlQueue
IfxGeth_RxMtlQueue
Rx MTL Queue ID.
Definition: IfxGeth.h:233
IfxGeth_isModuleEnabled
IFX_INLINE boolean IfxGeth_isModuleEnabled(Ifx_GETH *gethSFR)
Returns the status of whether clock for GETH module is enabled or diabled.
Definition: IfxGeth.h:1446
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxGeth_MtlQueue_2
Mtl Queue 2.
Definition: IfxGeth.h:150
IfxGeth_TxMtlQueue_3
Tx Queue 3.
Definition: IfxGeth.h:274


iLLD_TC38A: IfxGeth.h Source File

  • Geth
  • Std
IfxGeth.h
Go to the documentation of this file.
1 /**
2 * \file IfxGeth.h
3 * \brief GETH basic functionality
4 * \ingroup IfxLld_Geth
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 *
25 * Standard layer
26 *
27 * \defgroup IfxLld_Geth_Std_Enumerations Enumerations
28 * \ingroup IfxLld_Geth_Std
29 * \defgroup IfxLld_Geth_Std_MAC_Functions MAC Functions
30 * \ingroup IfxLld_Geth_Std
31 * \defgroup IfxLld_Geth_Std_Module_Functions Module Functions
32 * \ingroup IfxLld_Geth_Std
33 * \defgroup IfxLld_Geth_Std_MTL_Functions MTL Functions
34 * \ingroup IfxLld_Geth_Std
35 * \defgroup IfxLld_Geth_Std_DMA_Functions DMA Functions
36 * \ingroup IfxLld_Geth_Std
37 * \defgroup IfxLld_Geth_Std_DataStructures DataStructures
38 * \ingroup IfxLld_Geth_Std
39 * \defgroup IfxLld_Geth_Std_Unions Unions
40 * \ingroup IfxLld_Geth_Std
41 */
42
43 #ifndef IFXGET_H
44 #define IFXGET_H 1
45
46 /******************************************************************************/
47 /*----------------------------------Includes----------------------------------*/
48 /******************************************************************************/
49
50 #include "_Impl/IfxGeth_cfg.h"
51 #include "IfxGeth_reg.h"
52 #include "Scu/Std/IfxScuWdt.h"
53 #include "Src/Std/IfxSrc.h"
54 #include "IfxGeth_bf.h"
55
56 /******************************************************************************/
57 /*-----------------------------------Macros-----------------------------------*/
58 /******************************************************************************/
59
60 /** \brief Max number of TX descriptors per list
61 */
62 #ifndef IFXGETH_MAX_TX_DESCRIPTORS
63 #define IFXGETH_MAX_TX_DESCRIPTORS (8)
64 #endif
65
66 /** \brief Max number of RX descriptors per list
67 */
68 #ifndef IFXGETH_MAX_RX_DESCRIPTORS
69 #define IFXGETH_MAX_RX_DESCRIPTORS (8)
70 #endif
71
72 /** \brief Waits until GMII is busy
73 */
74 #define IFXGETH_PHY_WAIT_GMII_READY() while (GETH_MAC_MDIO_ADDRESS.B.GB) {}
75
76 /******************************************************************************/
77 /*--------------------------------Enumerations--------------------------------*/
78 /******************************************************************************/
79
80 /** \addtogroup IfxLld_Geth_Std_Enumerations
81 * \{ */
82 /** \brief Programmable burst length of DMA channels\n
83 * Definition in DMA_CHi_TX_CONTROL.B.PBL and DMA_CHi_RX_CONTROL.B.PBL
84 */
85 typedef enum
86 {
87 IfxGeth_DmaBurstLength_0 = 0, /**< \brief maximum burst length 0 */
88 IfxGeth_DmaBurstLength_1 = 1, /**< \brief maximum burst length 1 */
89 IfxGeth_DmaBurstLength_2 = 2, /**< \brief maximum burst length 2 */
90 IfxGeth_DmaBurstLength_4 = 4, /**< \brief maximum burst length 4 */
91 IfxGeth_DmaBurstLength_8 = 8, /**< \brief maximum burst length 8 */
92 IfxGeth_DmaBurstLength_16 = 16, /**< \brief maximum burst length 16 */
93 IfxGeth_DmaBurstLength_32 = 32 /**< \brief maximum burst length 32 */
94 } IfxGeth_DmaBurstLength;
95
96 /** \brief DMA channel Index
97 */
98 typedef enum
99 {
100 IfxGeth_DmaChannel_0, /**< \brief Dma Channel 0 */
101 IfxGeth_DmaChannel_1, /**< \brief Dma Channel 1 */
102 IfxGeth_DmaChannel_2, /**< \brief Dma Channel 2 */
103 IfxGeth_DmaChannel_3 /**< \brief Dma Channel 3 */
104 } IfxGeth_DmaChannel;
105
106 /** \brief DMA interrupt flags
107 */
108 typedef enum
109 {
110 IfxGeth_DmaInterruptFlag_transmitInterrupt = 0, /**< \brief Transmit Interrupt */
111 IfxGeth_DmaInterruptFlag_transmitStopped = 1, /**< \brief Transmit Stopped */
112 IfxGeth_DmaInterruptFlag_transmitBufferUnavailable = 2, /**< \brief Trasmit Buffer Unavailable */
113 IfxGeth_DmaInterruptFlag_receiveInterrupt = 6, /**< \brief Receive Interrupt */
114 IfxGeth_DmaInterruptFlag_receiveBufferUnavailable = 7, /**< \brief Receive Buffer Unavailable */
115 IfxGeth_DmaInterruptFlag_receiveStopped = 8, /**< \brief Receive Stopped */
116 IfxGeth_DmaInterruptFlag_receiveWatchdogTimeout = 9, /**< \brief Receive Watchdog Timeout */
117 IfxGeth_DmaInterruptFlag_earlyTransmitInterrupt = 10, /**< \brief Early Transmit Interrupt */
118 IfxGeth_DmaInterruptFlag_earlyReceiveInterrupt = 11, /**< \brief Early Receive Interrupt */
119 IfxGeth_DmaInterruptFlag_fatalBusError = 12, /**< \brief Fatal Bus Error */
120 IfxGeth_DmaInterruptFlag_contextDescriptorError = 13, /**< \brief Context Descriptor Error */
121 IfxGeth_DmaInterruptFlag_abnormalInterruptSummary = 14, /**< \brief Abnormal Interrupt Summary */
122 IfxGeth_DmaInterruptFlag_normalInterruptSummary = 15 /**< \brief Normal Interrupt Summary */
123 } IfxGeth_DmaInterruptFlag;
124
125 /** \brief Ethernet line speed
126 */
127 typedef enum
128 {
129 IfxGeth_LineSpeed_10Mbps, /**< \brief 10 Mbps */
130 IfxGeth_LineSpeed_100Mbps, /**< \brief 100 Mbps */
131 IfxGeth_LineSpeed_1000Mbps, /**< \brief 1000 Mbps */
132 IfxGeth_LineSpeed_2500Mbps /**< \brief 2500 Mbps */
133 } IfxGeth_LineSpeed;
134
135 /** \brief MTL interrupt flags
136 */
137 typedef enum
138 {
139 IfxGeth_MtlInterruptFlag_txQueueUnderflow = 0, /**< \brief Transmit Queue Underflow */
140 IfxGeth_MtlInterruptFlag_averageBitsPerSlot = 1, /**< \brief Average Bits Per Slot */
141 IfxGeth_MtlInterruptFlag_rxQueueOverflow = 16 /**< \brief Receive Queue Overflow */
142 } IfxGeth_MtlInterruptFlag;
143
144 /** \brief MTL Queue ID
145 */
146 typedef enum
147 {
148 IfxGeth_MtlQueue_0, /**< \brief Mtl Queue 0 */
149 IfxGeth_MtlQueue_1, /**< \brief Mtl Queue 1 */
150 IfxGeth_MtlQueue_2, /**< \brief Mtl Queue 2 */
151 IfxGeth_MtlQueue_3 /**< \brief Mtl Queue 3 */
152 } IfxGeth_MtlQueue;
153
154 /** \brief External Phy Interface RMII Mode
155 */
156 typedef enum
157 {
158 IfxGeth_PhyInterfaceMode_mii = 0, /**< \brief MII mode */
159 IfxGeth_PhyInterfaceMode_rgmii = 1, /**< \brief RGMII mode */
160 IfxGeth_PhyInterfaceMode_rmii = 4 /**< \brief RMII mode */
161 } IfxGeth_PhyInterfaceMode;
162
163 /** \brief Preamble Length for Transmit packets\n
164 * Definition in MAC_CONFIGURATION.B.PRELEN
165 */
166 typedef enum
167 {
168 IfxGeth_PreambleLength_7Bytes, /**< \brief 7 bytes of preamble */
169 IfxGeth_PreambleLength_5Bytes, /**< \brief 5 bytes of preamble */
170 IfxGeth_PreambleLength_3Bytes /**< \brief 3 bytes of preamble */
171 } IfxGeth_PreambleLength;
172
173 /** \brief Tx/RX Queue size in blocks of 256 bytes\n
174 * Definition in MTL_TXQi_OPERATION_MODE.B.TQS and MTL_RXQi_OPERATION_MODE.B.RQS
175 */
176 typedef enum
177 {
178 IfxGeth_QueueSize_256Bytes, /**< \brief 256Bytes */
179 IfxGeth_QueueSize_512Bytes, /**< \brief 512Bytes */
180 IfxGeth_QueueSize_768Bytes, /**< \brief 768Bytes */
181 IfxGeth_QueueSize_1024Bytes, /**< \brief 1024Bytes */
182 IfxGeth_QueueSize_1280Bytes, /**< \brief 1280Bytes */
183 IfxGeth_QueueSize_1536Bytes, /**< \brief 1536Bytes */
184 IfxGeth_QueueSize_1792Bytes, /**< \brief 1792Bytes */
185 IfxGeth_QueueSize_2048Bytes, /**< \brief 2048Bytes */
186 IfxGeth_QueueSize_2304Bytes, /**< \brief 2304Bytes */
187 IfxGeth_QueueSize_2560Bytes, /**< \brief 2560Bytes */
188 IfxGeth_QueueSize_2816Bytes, /**< \brief 2816Bytes */
189 IfxGeth_QueueSize_3072Bytes, /**< \brief 3072Bytes */
190 IfxGeth_QueueSize_3328Bytes, /**< \brief 3328Bytes */
191 IfxGeth_QueueSize_3584Bytes, /**< \brief 3584Bytes */
192 IfxGeth_QueueSize_3840Bytes, /**< \brief 3840Bytes */
193 IfxGeth_QueueSize_4096Bytes, /**< \brief 4096Bytes */
194 IfxGeth_QueueSize_4352Bytes, /**< \brief 4352Bytes */
195 IfxGeth_QueueSize_4608Bytes, /**< \brief 4608Bytes */
196 IfxGeth_QueueSize_4864Bytes, /**< \brief 4864Bytes */
197 IfxGeth_QueueSize_5120Bytes, /**< \brief 5120Bytes */
198 IfxGeth_QueueSize_5376Bytes, /**< \brief 5376Bytes */
199 IfxGeth_QueueSize_5632Bytes, /**< \brief 5632Bytes */
200 IfxGeth_QueueSize_5888Bytes, /**< \brief 5888Bytes */
201 IfxGeth_QueueSize_6144Bytes, /**< \brief 6144Bytes */
202 IfxGeth_QueueSize_6400Bytes, /**< \brief 6400Bytes */
203 IfxGeth_QueueSize_6656Bytes, /**< \brief 6656Bytes */
204 IfxGeth_QueueSize_6912Bytes, /**< \brief 6912Bytes */
205 IfxGeth_QueueSize_7168Bytes, /**< \brief 7168Bytes */
206 IfxGeth_QueueSize_7424Bytes, /**< \brief 7424Bytes */
207 IfxGeth_QueueSize_7680Bytes, /**< \brief 7680Bytes */
208 IfxGeth_QueueSize_7936Bytes, /**< \brief 7936Bytes */
209 IfxGeth_QueueSize_8192Bytes /**< \brief 8192Bytes */
210 } IfxGeth_QueueSize;
211
212 /** \brief Receive Arbitration Algorithm for Rx Queues\n
213 * Definition in MTL_OPERATION_MODE.B.RAA
214 */
215 typedef enum
216 {
217 IfxGeth_RxArbitrationAlgorithm_sp = 0, /**< \brief Strict Priority */
218 IfxGeth_RxArbitrationAlgorithm_wsp = 1 /**< \brief Weighted Strict Priority */
219 } IfxGeth_RxArbitrationAlgorithm;
220
221 /** \brief Rx DMA channel
222 */
223 typedef enum
224 {
225 IfxGeth_RxDmaChannel_0, /**< \brief Rx Dma Channel 0 */
226 IfxGeth_RxDmaChannel_1, /**< \brief Rx Dma Channel 1 */
227 IfxGeth_RxDmaChannel_2, /**< \brief Rx Dma Channel 2 */
228 IfxGeth_RxDmaChannel_3 /**< \brief Rx Dma Channel 3 */
229 } IfxGeth_RxDmaChannel;
230
231 /** \brief Rx MTL Queue ID
232 */
233 typedef enum
234 {
235 IfxGeth_RxMtlQueue_0, /**< \brief Rx Queue 0 */
236 IfxGeth_RxMtlQueue_1, /**< \brief Rx Queue 1 */
237 IfxGeth_RxMtlQueue_2, /**< \brief Rx Queue 2 */
238 IfxGeth_RxMtlQueue_3 /**< \brief Rx Queue 3 */
239 } IfxGeth_RxMtlQueue;
240
241 /** \brief Geth service request index
242 */
243 typedef enum
244 {
245 IfxGeth_ServiceRequest_0, /**< \brief Service Request SR0 */
246 IfxGeth_ServiceRequest_1, /**< \brief Service Request SR1 */
247 IfxGeth_ServiceRequest_2, /**< \brief Service Request SR2 */
248 IfxGeth_ServiceRequest_3, /**< \brief Service Request SR3 */
249 IfxGeth_ServiceRequest_4, /**< \brief Service Request SR4 */
250 IfxGeth_ServiceRequest_5, /**< \brief Service Request SR5 */
251 IfxGeth_ServiceRequest_6, /**< \brief Service Request SR6 */
252 IfxGeth_ServiceRequest_7, /**< \brief Service Request SR7 */
253 IfxGeth_ServiceRequest_8, /**< \brief Service Request SR8 */
254 IfxGeth_ServiceRequest_9 /**< \brief Service Request SR9 */
255 } IfxGeth_ServiceRequest;
256
257 /** \brief Tx DMA channel
258 */
259 typedef enum
260 {
261 IfxGeth_TxDmaChannel_0, /**< \brief Tx Dma Channel 0 */
262 IfxGeth_TxDmaChannel_1, /**< \brief Tx Dma Channel 1 */
263 IfxGeth_TxDmaChannel_2, /**< \brief Tx Dma Channel 2 */
264 IfxGeth_TxDmaChannel_3 /**< \brief Tx Dma Channel 3 */
265 } IfxGeth_TxDmaChannel;
266
267 /** \brief Tx MTL Queue ID
268 */
269 typedef enum
270 {
271 IfxGeth_TxMtlQueue_0, /**< \brief Tx Queue 0 */
272 IfxGeth_TxMtlQueue_1, /**< \brief Tx Queue 1 */
273 IfxGeth_TxMtlQueue_2, /**< \brief Tx Queue 2 */
274 IfxGeth_TxMtlQueue_3 /**< \brief Tx Queue 3 */
275 } IfxGeth_TxMtlQueue;
276
277 /** \brief Tx Scheduling Algorithm for Tx Queues\n
278 * Definition in MTL_OPERATION_MODE.B.SCHALG
279 */
280 typedef enum
281 {
282 IfxGeth_TxSchedulingAlgorithm_wrr = 0, /**< \brief WRR Algorithm */
283 IfxGeth_TxSchedulingAlgorithm_sp = 3 /**< \brief Strict Priority Algorithm */
284 } IfxGeth_TxSchedulingAlgorithm;
285
286 /** \} */
287
288 /** \brief Duplex Mode\n
289 * Definintion in MAC_CONFIGURATION.B.DM
290 */
291 typedef enum
292 {
293 IfxGeth_DuplexMode_halfDuplex, /**< \brief Half Duplex Mode */
294 IfxGeth_DuplexMode_fullDuplex /**< \brief Full Duplex Mode */
295 } IfxGeth_DuplexMode;
296
297 /** \brief Loopback Mode\n
298 * Definition in MAC_CONFIGURATION.B.LM
299 */
300 typedef enum
301 {
302 IfxGeth_LoopbackMode_disable, /**< \brief Disable loopback */
303 IfxGeth_LoopbackMode_enable /**< \brief Enable loopback */
304 } IfxGeth_LoopbackMode;
305
306 /******************************************************************************/
307 /*-----------------------------Data Structures--------------------------------*/
308 /******************************************************************************/
309
310 /** \addtogroup IfxLld_Geth_Std_DataStructures
311 * \{ */
312 /** \brief Bit Fields of RDES0 Context Descriptor
313 */
314 typedef struct
315 {
316 uint32 RTSL : 32; /**< \brief Receive Packet Timestamp Low */
317 } IfxGeth_RxContextDescr0_Bits;
318
319 /** \brief Bit Fields of RDES1 Context Descriptor
320 */
321 typedef struct
322 {
323 uint32 RTSH : 32; /**< \brief Receive Packet Timestamp High */
324 } IfxGeth_RxContextDescr1_Bits;
325
326 /** \brief Bit Fields of RDES2 Context Descriptor
327 */
328 typedef struct
329 {
330 uint32 reserved_0 : 32; /**< \brief Reserved */
331 } IfxGeth_RxContextDescr2_Bits;
332
333 /** \brief Bit Fields of RDES3 Context Descriptor
334 */
335 typedef struct
336 {
337 uint32 reserved_0 : 29; /**< \brief Reserved */
338 uint32 DE : 1; /**< \brief Descriptor Error */
339 uint32 CTXT : 1; /**< \brief Receive Context Descriptor */
340 uint32 OWN : 1; /**< \brief Own Bit */
341 } IfxGeth_RxContextDescr3_Bits;
342
343 /** \brief Bit Fields of RDES0 in Read Format
344 */
345 typedef struct
346 {
347 uint32 BUF1AP : 32; /**< \brief Header or Buffer 1 Address Pointer */
348 } IfxGeth_RxDescr0_RF_Bits;
349
350 /** \brief Bit Fields of RDES0 in Write back Format
351 */
352 typedef struct
353 {
354 uint32 OVT : 16; /**< \brief Outer VLAN Tag */
355 uint32 IVT : 16; /**< \brief Inner VLAN Tag */
356 } IfxGeth_RxDescr0_WF_Bits;
357
358 /** \brief Bit Fields of RDES1 in Read Format
359 */
360 typedef struct
361 {
362 uint32 reserved_0 : 32; /**< \brief Reserved */
363 } IfxGeth_RxDescr1_RF_Bits;
364
365 /** \brief Bit Fields of RDES1 in Write back Format
366 */
367 typedef struct
368 {
369 uint32 PT : 3; /**< \brief Payload Type */
370 uint32 IPHE : 1; /**< \brief IP Header Error */
371 uint32 IP4 : 1; /**< \brief IPV4 Header Present */
372 uint32 IP6 : 1; /**< \brief IPv6 header Present */
373 uint32 IPCB : 1; /**< \brief IP Checksum Bypassed */
374 uint32 IPCE : 1; /**< \brief IP Payload Error */
375 uint32 PMT : 4; /**< \brief PTP Message Type */
376 uint32 PFT : 1; /**< \brief PTP Packet Type */
377 uint32 PV : 1; /**< \brief PTP Version */
378 uint32 TSA : 1; /**< \brief Timestamp Available */
379 uint32 TD : 1; /**< \brief Timestamp Dropped */
380 uint32 OPC : 16; /**< \brief OAM Sub-Type Code, or MAC Control Packet opcode */
381 } IfxGeth_RxDescr1_WF_Bits;
382
383 /** \brief Bit Fields of RDES2 in Read Format
384 */
385 typedef struct
386 {
387 uint32 BUF2AP : 32; /**< \brief Buffer 2 Address Pointer */
388 } IfxGeth_RxDescr2_RF_Bits;
389
390 /** \brief Bit Fields of RDES2 in Write back Format
391 */
392 typedef struct
393 {
394 uint32 HL : 10; /**< \brief L3/L4 Header Length */
395 uint32 ARPNR : 1; /**< \brief ARP Reply Not Generated */
396 uint32 reserved_11 : 3; /**< \brief Reserved */
397 uint32 ITS : 1; /**< \brief Inner VLAN Tag Filter Status (ITS) */
398 uint32 OTS : 1; /**< \brief VLAN Filter Status */
399 uint32 SAF : 1; /**< \brief SA Address Filter Fail */
400 uint32 DAF : 1; /**< \brief Destination Address Filter Fail */
401 uint32 HF : 1; /**< \brief Hash Filter Status */
402 uint32 MADRM : 8; /**< \brief MAC Address Match or Hash Value */
403 uint32 L3FM : 1; /**< \brief Layer 3 Filter Match */
404 uint32 L4FM : 1; /**< \brief Layer 4 Filter Match */
405 uint32 L3L4FM : 3; /**< \brief Layer 3 and Layer 4 Filter Number Matched */
406 } IfxGeth_RxDescr2_WF_Bits;
407
408 /** \brief Bit Fields of RDES3 in Read Format
409 */
410 typedef struct
411 {
412 uint32 reserved_0 : 24; /**< \brief Reserved */
413 uint32 BUF1V : 1; /**< \brief Buffer 1 Address Valid */
414 uint32 BUF2V : 1; /**< \brief Buffer 2 Address Valid */
415 uint32 reserved_27 : 4; /**< \brief Reserved */
416 uint32 IOC : 1; /**< \brief Interrupt on Completion */
417 uint32 OWN : 1; /**< \brief Own bit */
418 } IfxGeth_RxDescr3_RF_Bits;
419
420 /** \brief Bit Fields of RDES3 in Write back Format
421 */
422 typedef struct
423 {
424 uint32 PL : 15; /**< \brief Packet Length */
425 uint32 ES : 1; /**< \brief Error Summary */
426 uint32 LT : 3; /**< \brief Length/Type Field */
427 uint32 DE : 1; /**< \brief Dribble Bit Error */
428 uint32 RE : 1; /**< \brief Receive Error */
429 uint32 OE : 1; /**< \brief Overflow Error */
430 uint32 RWT : 1; /**< \brief Receive Watchdog Timeout */
431 uint32 GP : 1; /**< \brief Giant Packet */
432 uint32 CE : 1; /**< \brief CRC Error */
433 uint32 RS0V : 1; /**< \brief Receive Status RDES0 Valid */
434 uint32 RS1V : 1; /**< \brief Receive Status RDES1 Valid */
435 uint32 RS2V : 1; /**< \brief Receive Status RDES2 Valid */
436 uint32 LD : 1; /**< \brief Last Descriptor */
437 uint32 FD : 1; /**< \brief First Descriptor */
438 uint32 CTXT : 1; /**< \brief Receive Context Descriptor */
439 uint32 OWN : 1; /**< \brief Own Bit */
440 } IfxGeth_RxDescr3_WF_Bits;
441
442 /** \brief Bit Fields of TDES0 Context Descriptor
443 */
444 typedef struct
445 {
446 uint32 TTSL : 32; /**< \brief Transmit Packet Timestamp Low */
447 } IfxGeth_TxContextDescr0_Bits;
448
449 /** \brief Bit Fields of TDES1 Context Descriptor
450 */
451 typedef struct
452 {
453 uint32 TTSH : 32; /**< \brief Transmit Packet Timestamp High */
454 } IfxGeth_TxContextDescr1_Bits;
455
456 /** \brief Bit Fields of TDES2 Context Descriptor
457 */
458 typedef struct
459 {
460 uint32 MSS : 14; /**< \brief Maximum Segment Size */
461 uint32 reserved_14 : 2; /**< \brief Reserved */
462 uint32 IVT : 16; /**< \brief Inner VLAN Tag */
463 } IfxGeth_TxContextDescr2_Bits;
464
465 /** \brief Bit Fields of TDES3 Context Descriptor
466 */
467 typedef struct
468 {
469 uint32 VT : 16; /**< \brief VLAN Tag */
470 uint32 VLTV : 1; /**< \brief VLAN Tag Valid */
471 uint32 IVLTV : 1; /**< \brief Inner VLAN Tag Valid */
472 uint32 IVTIR : 2; /**< \brief Inner VLAN Tag Insert or Replace */
473 uint32 reserved_20 : 3; /**< \brief Reserved */
474 uint32 CDE : 1; /**< \brief Context Descriptor Error */
475 uint32 reserved_24 : 2; /**< \brief Reserved */
476 uint32 TCMSSV : 1; /**< \brief One-Step Timestamp Correction Input or MSS Valid */
477 uint32 OSTC : 1; /**< \brief One-Step Timestamp Correction Enable */
478 uint32 reserved_28 : 2; /**< \brief Reserved */
479 uint32 CTXT : 1; /**< \brief Context Type */
480 uint32 OWN : 1; /**< \brief Own Bit */
481 } IfxGeth_TxContextDescr3_Bits;
482
483 /** \brief Bit Fields of TDES0 in Read Format
484 */
485 typedef struct
486 {
487 uint32 BUF1AP : 32; /**< \brief Buffer 1 Address Pointer */
488 } IfxGeth_TxDescr0_RF_Bits;
489
490 /** \brief Bit Fields of TDES0 in Write-back Format
491 */
492 typedef struct
493 {
494 uint32 TTSL : 32; /**< \brief Transmit Packet Timestamp Low */
495 } IfxGeth_TxDescr0_WF_Bits;
496
497 /** \brief Bit Fields of TDES1 in Read Format
498 */
499 typedef struct
500 {
501 uint32 BUF2AP : 32; /**< \brief Buffer 2 or Buffer 1 Address Pointer */
502 } IfxGeth_TxDescr1_RF_Bits;
503
504 /** \brief Bit Fields of TDES1 in Write-back Format
505 */
506 typedef struct
507 {
508 uint32 TTSH : 32; /**< \brief Transmit Packet Timestamp High */
509 } IfxGeth_TxDescr1_WF_Bits;
510
511 /** \brief Bit Fields of TDES2 in Read Format
512 */
513 typedef struct
514 {
515 uint32 B1L : 14; /**< \brief Header Length or Buffer 1 Length */
516 uint32 VTIR : 2; /**< \brief VLAN Tag Insertion or Replacement */
517 uint32 B2L : 14; /**< \brief Buffer 2 Length */
518 uint32 TTSE_TMWD : 1; /**< \brief Transmit Timestamp Enable or External TSO Memory Write Enable */
519 uint32 IOC : 1; /**< \brief Interrupt on Completion */
520 } IfxGeth_TxDescr2_RF_Bits;
521
522 /** \brief Bit Fields of TDES2 in Write-back Format
523 */
524 typedef struct
525 {
526 uint32 reserved_0 : 32; /**< \brief Reserved */
527 } IfxGeth_TxDescr2_WF_Bits;
528
529 /** \brief Bit Fields of TDES3 in Read Format
530 */
531 typedef struct
532 {
533 uint32 FL_TPL : 15; /**< \brief Packet Length or TCP Payload Length */
534 uint32 TPL : 1; /**< \brief Reserved or TCP Payload Length */
535 uint32 CIC_TPL : 2; /**< \brief Checksum Insertion Control or TCP Payload LengthThese bits control the checksum */
536 uint32 TSE : 1; /**< \brief TCP Segmentation Enable */
537 uint32 SLOTNUM_THL : 4; /**< \brief SLOTNUM: Slot Number Control Bits in AV Mode */
538 uint32 SAIC : 3; /**< \brief SA Insertion Control */
539 uint32 CPC : 2; /**< \brief CRC Pad Control */
540 uint32 LD : 1; /**< \brief Last Descriptor */
541 uint32 FD : 1; /**< \brief First Descriptor */
542 uint32 CTXT : 1; /**< \brief Context TypeThis bit should be set to 1'b0 for normal descriptor */
543 uint32 OWN : 1; /**< \brief Own Bit */
544 } IfxGeth_TxDescr3_RF_Bits;
545
546 /** \brief Bit Fields of TDES3 in Write-back Format
547 */
548 typedef struct
549 {
550 uint32 IHE : 1; /**< \brief IP Header Error */
551 uint32 DB : 1; /**< \brief Deferred Bit */
552 uint32 UF : 1; /**< \brief Underflow Error */
553 uint32 ED : 1; /**< \brief Excessive Deferral */
554 uint32 CC : 4; /**< \brief Collision Count */
555 uint32 EC : 1; /**< \brief Excessive Collision */
556 uint32 LC : 1; /**< \brief Late Collision */
557 uint32 NC : 1; /**< \brief No Carrier */
558 uint32 LOC : 1; /**< \brief Loss of Carrier */
559 uint32 PCE : 1; /**< \brief Payload Checksum */
560 uint32 FF : 1; /**< \brief Packet Flushed */
561 uint32 JT : 1; /**< \brief Jabber Timeout */
562 uint32 ES : 1; /**< \brief Error Summary */
563 uint32 reserved_16 : 1; /**< \brief Reserved */
564 uint32 TTSS : 1; /**< \brief Tx Timestamp Status */
565 uint32 reserved_18 : 10; /**< \brief Reserved */
566 uint32 LD : 1; /**< \brief Last Descriptor */
567 uint32 FD : 1; /**< \brief First Descriptor */
568 uint32 CTXT : 1; /**< \brief Context Type */
569 uint32 OWN : 1; /**< \brief Own bit */
570 } IfxGeth_TxDescr3_WF_Bits;
571
572 /** \} */
573
574 /** \addtogroup IfxLld_Geth_Std_Unions
575 * \{ */
576 /** \brief RDES0
577 */
578 typedef union
579 {
580 IfxGeth_RxDescr0_RF_Bits R; /**< \brief Read Format Bitfiled Access */
581 IfxGeth_RxDescr0_WF_Bits W; /**< \brief Write back Format Bitfiled Access */
582 IfxGeth_RxContextDescr0_Bits C; /**< \brief Context Descriptor Format Bitfiled Access */
583 uint32 U; /**< \brief Unsigned access */
584 } IfxGeth_RxDescr0;
585
586 /** \brief RDES1
587 */
588 typedef union
589 {
590 IfxGeth_RxDescr1_RF_Bits R; /**< \brief Read Format Bitfiled Access */
591 IfxGeth_RxDescr1_WF_Bits W; /**< \brief Write back Format Bitfiled Access */
592 IfxGeth_RxContextDescr1_Bits C; /**< \brief Context Descriptor Format Bitfiled Access */
593 uint32 U; /**< \brief Unsigned access */
594 } IfxGeth_RxDescr1;
595
596 /** \brief RDES2
597 */
598 typedef union
599 {
600 IfxGeth_RxDescr2_RF_Bits R; /**< \brief Read Format Bitfiled Access */
601 IfxGeth_RxDescr2_WF_Bits W; /**< \brief Write back Format Bitfiled Access */
602 IfxGeth_RxContextDescr2_Bits C; /**< \brief Context Descriptor Format Bitfiled Access */
603 uint32 U; /**< \brief Unsigned access */
604 } IfxGeth_RxDescr2;
605
606 /** \brief RDES3
607 */
608 typedef union
609 {
610 IfxGeth_RxDescr3_RF_Bits R; /**< \brief Read Format Bitfiled Access */
611 IfxGeth_RxDescr3_WF_Bits W; /**< \brief Write back Format Bitfiled Access */
612 IfxGeth_RxContextDescr3_Bits C; /**< \brief Context Descriptor Format Bitfiled Access */
613 uint32 U; /**< \brief Unsigned access */
614 } IfxGeth_RxDescr3;
615
616 /** \brief TDES0
617 */
618 typedef union
619 {
620 IfxGeth_TxDescr0_RF_Bits R; /**< \brief Read Format Bitfiled Access */
621 IfxGeth_TxDescr0_WF_Bits W; /**< \brief Write-back Format Bitfiled Access */
622 IfxGeth_TxContextDescr0_Bits C; /**< \brief Context Descriptor Format Bitfiled Access */
623 uint32 U; /**< \brief Unsigned access */
624 } IfxGeth_TxDescr0;
625
626 /** \brief TDES1
627 */
628 typedef union
629 {
630 IfxGeth_TxDescr1_RF_Bits R; /**< \brief Read Format Bitfiled Access */
631 IfxGeth_TxDescr1_WF_Bits W; /**< \brief Write-back Format Bitfiled Access */
632 IfxGeth_TxContextDescr1_Bits C; /**< \brief Context Descriptor Format Bitfiled Access */
633 uint32 U; /**< \brief Unsigned access */
634 } IfxGeth_TxDescr1;
635
636 /** \brief TDES2
637 */
638 typedef union
639 {
640 IfxGeth_TxDescr2_RF_Bits R; /**< \brief Read Format Bitfiled Access */
641 IfxGeth_TxDescr2_WF_Bits W; /**< \brief Write-back Format Bitfiled Access */
642 IfxGeth_TxContextDescr2_Bits C; /**< \brief COntext Descriptor Format Bitfiled Access */
643 uint32 U; /**< \brief Unsigned access */
644 } IfxGeth_TxDescr2;
645
646 /** \brief TDES3
647 */
648 typedef union
649 {
650 IfxGeth_TxDescr3_RF_Bits R; /**< \brief Read Format Bitfiled Access */
651 IfxGeth_TxDescr3_WF_Bits W; /**< \brief Write-back Format Bitfiled Access */
652 IfxGeth_TxContextDescr3_Bits C; /**< \brief Context Descriptor Format Bitfiled Access */
653 uint32 U; /**< \brief Unsigned access */
654 } IfxGeth_TxDescr3;
655
656 /** \} */
657
658 /** \addtogroup IfxLld_Geth_Std_DataStructures
659 * \{ */
660 /** \brief Rx Descriptor
661 */
662 typedef struct
663 {
664 IfxGeth_RxDescr0 RDES0; /**< \brief Rx Descriptor DWORD 0 */
665 IfxGeth_RxDescr1 RDES1; /**< \brief Rx Descriptor DWORD 1 */
666 IfxGeth_RxDescr2 RDES2; /**< \brief Rx Descriptor DWORD 2 */
667 IfxGeth_RxDescr3 RDES3; /**< \brief Rx Descriptor DWORD 3 */
668 } IfxGeth_RxDescr;
669
670 /** \brief Tx Descriptor
671 */
672 typedef struct
673 {
674 IfxGeth_TxDescr0 TDES0; /**< \brief Tx Descriptor DWORD 0 */
675 IfxGeth_TxDescr1 TDES1; /**< \brief Tx Descriptor DWORD 1 */
676 IfxGeth_TxDescr2 TDES2; /**< \brief Tx Descriptor DWORD 2 */
677 IfxGeth_TxDescr3 TDES3; /**< \brief Tx Descriptor DWORD 3 */
678 } IfxGeth_TxDescr;
679
680 /** \} */
681
682 /** \addtogroup IfxLld_Geth_Std_Unions
683 * \{ */
684 /** \brief Rx Descriptor List
685 */
686 typedef union
687 {
688 volatile IfxGeth_RxDescr descr[IFXGETH_MAX_RX_DESCRIPTORS]; /**< \brief list of RX descriptors */
689 } IfxGeth_RxDescrList;
690
691 /** \brief Tx Descriptor List
692 */
693 typedef union
694 {
695 volatile IfxGeth_TxDescr descr[IFXGETH_MAX_TX_DESCRIPTORS]; /**< \brief list of TX descriptors */
696 } IfxGeth_TxDescrList;
697
698 /** \} */
699
700 /** \addtogroup IfxLld_Geth_Std_MAC_Functions
701 * \{ */
702
703 /******************************************************************************/
704 /*-------------------------Inline Function Prototypes-------------------------*/
705 /******************************************************************************/
706
707 /** \brief Disables the Receiver of MAC Core
708 * \param gethSFR Pointer to GETH register base address
709 * \return None
710 */
711 IFX_INLINE void IfxGeth_mac_disableReceiver(Ifx_GETH *gethSFR);
712
713 /** \brief Disables the Trasnmitter of MAC Core
714 * \param gethSFR Pointer to GETH register base address
715 * \return None
716 */
717 IFX_INLINE void IfxGeth_mac_disableTransmitter(Ifx_GETH *gethSFR);
718
719 /** \brief Enables the Receiver of MAC Core
720 * \param gethSFR Pointer to GETH register base address
721 * \return None
722 */
723 IFX_INLINE void IfxGeth_mac_enableReceiver(Ifx_GETH *gethSFR);
724
725 /** \brief Enables the Trasnmitter of MAC Core
726 * \param gethSFR Pointer to GETH register base address
727 * \return None
728 */
729 IFX_INLINE void IfxGeth_mac_enableTransmitter(Ifx_GETH *gethSFR);
730
731 /** \brief Enables / Disables Passing of All Multicast packets
732 * \param gethSFR Pointer to GETH register base address
733 * \param enabled Pass All Multicast enable / disable
734 * \return None
735 */
736 IFX_INLINE void IfxGeth_mac_setAllMulticastPassing(Ifx_GETH *gethSFR, boolean enabled);
737
738 /** \brief Enables / Disables CRC Checking for Received Packets
739 * \param gethSFR Pointer to GETH register base address
740 * \param enabled CRC Checking for Received Packets enable / disable
741 * \return None
742 */
743 IFX_INLINE void IfxGeth_mac_setCrcChecking(Ifx_GETH *gethSFR, boolean enabled);
744
745 /** \brief Enables/Disables the Automatic Pad or CRC Stripping for frames less than 1536 bytes and \n
746 * CRC stripping for Type packets
747 * \param gethSFR Pointer to GETH register base address
748 * \param acsEnabled Automatic Pad or CRC Stripping enable/disable
749 * \param cstEnabled CRC Stripping for Type packets enable/disable
750 * \return None
751 */
752 IFX_INLINE void IfxGeth_mac_setCrcStripping(Ifx_GETH *gethSFR, boolean acsEnabled, boolean cstEnabled);
753
754 /** \brief Sets the Duplex Mode
755 * \param gethSFR Pointer to GETH register base address
756 * \param mode Duplex Mode
757 * \return None
758 */
759 IFX_INLINE void IfxGeth_mac_setDuplexMode(Ifx_GETH *gethSFR, IfxGeth_DuplexMode mode);
760
761 /** \brief Sets the Preamble Length for Transmit packets
762 * \param gethSFR Pointer to GETH register base address
763 * \param length Preamble Length for Transmit packets
764 * \return None
765 */
766 IFX_INLINE void IfxGeth_mac_setPreambleLength(Ifx_GETH *gethSFR, IfxGeth_PreambleLength length);
767
768 /** \brief Enables / Disables Promiscuous Mode
769 * \param gethSFR Pointer to GETH register base address
770 * \param enabled Promiscuous Mode enable / disable
771 * \return None
772 */
773 IFX_INLINE void IfxGeth_mac_setPromiscuousMode(Ifx_GETH *gethSFR, boolean enabled);
774
775 /** \brief Set the priorities for Rx queues for mapping tagged packets
776 * \param gethSFR Pointer to GETH register base address
777 * \param channel Rx DMA channel
778 * \param priorities Rx queue priority
779 * \return None
780 */
781 IFX_INLINE void IfxGeth_mac_setVlanPriorityQueueRouting(Ifx_GETH *gethSFR, IfxGeth_RxDmaChannel channel, uint8 priorities);
782
783 /** \brief Enable / Disable Queue Insertion
784 * \param gethSFR Pointer to GETH register base address
785 * \param enable config parameter TRUE: enabled/ FALSE: disabled
786 * \return None
787 */
788 IFX_INLINE void IfxGeth_mac_setQueueVlanInsertion(Ifx_GETH *gethSFR, boolean enable);
789
790 /******************************************************************************/
791 /*-------------------------Global Function Prototypes-------------------------*/
792 /******************************************************************************/
793
794 /** \brief Sets the Ethernet Line Speed
795 * \param gethSFR Pointer to GETH register base address
796 * \param speed Ethernet Line Speed
797 * \return None
798 */
799 IFX_EXTERN void IfxGeth_mac_setLineSpeed(Ifx_GETH *gethSFR, IfxGeth_LineSpeed speed);
800
801 /** \brief Sets the MAC Address
802 * \param gethSFR Pointer to GETH register base address
803 * \param macAddress MAC Address
804 * \return None
805 */
806 IFX_EXTERN void IfxGeth_mac_setMacAddress(Ifx_GETH *gethSFR, uint8 *macAddress);
807
808 /** \brief Writes to Queue Vlan tag
809 * \param gethSFR Pointer to GETH register base address
810 * \param queueId Queue Index
811 * \param vLanTag VLAN Tag
812 * \return TRUE if write was successfull
813 */
814 IFX_EXTERN boolean IfxGeth_mac_writeQueueVlanTag(Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId, uint16 vLanTag);
815
816 /** \brief Reads from Queue Vlan tag
817 * \param gethSFR Pointer to GETH register base address
818 * \param queueId Queue Index
819 * \param const vLanTag VLAN Tag
820 * \return TRUE if read was successfull
821 */
822 IFX_EXTERN boolean IfxGeth_mac_readQueueVlanTag(Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId, uint16 *const vLanTag);
823
824 /** \} */
825
826 /** \addtogroup IfxLld_Geth_Std_Module_Functions
827 * \{ */
828
829 /******************************************************************************/
830 /*-------------------------Inline Function Prototypes-------------------------*/
831 /******************************************************************************/
832
833 /** \brief Returns the status of whether clock for GETH module is enabled or diabled
834 * \param gethSFR Pointer to GETH register base address
835 * \return Status:\n
836 * TRUE : if module is enabled\n
837 * FALSE : if module is disabled
838 */
839 IFX_INLINE boolean IfxGeth_isModuleEnabled(Ifx_GETH *gethSFR);
840
841 /** \brief Sets the External Phy Interface mode
842 * \param gethSFR Pointer to GETH register base address
843 * \param mode PHY Interface Mode (MII/RGMII/RMII)
844 * \return None
845 */
846 IFX_INLINE void IfxGeth_setPhyInterfaceMode(Ifx_GETH *gethSFR, IfxGeth_PhyInterfaceMode mode);
847
848 /******************************************************************************/
849 /*-------------------------Global Function Prototypes-------------------------*/
850 /******************************************************************************/
851
852 /** \brief Disables the clock for GETH module
853 * \param gethSFR Pointer to GETH register base address
854 * \return None
855 */
856 IFX_EXTERN void IfxGeth_disableModule(Ifx_GETH *gethSFR);
857
858 /** \brief Enables the clock for GETH module
859 * \param gethSFR Pointer to GETH register base address
860 * \return None
861 */
862 IFX_EXTERN void IfxGeth_enableModule(Ifx_GETH *gethSFR);
863
864 /** \brief Returns the Src Pointer of the selected GETH service request node
865 * \param gethSFR Pointer to GETH register base address
866 * \param serviceRequest Service Request number
867 * \return pointer to Src register
868 */
869 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxGeth_getSrcPointer(Ifx_GETH *gethSFR, IfxGeth_ServiceRequest serviceRequest);
870
871 /** \brief resets Ethernet kernel
872 * \param gethSFR Pointer to GETH register base address
873 * \return None
874 */
875 IFX_EXTERN void IfxGeth_resetModule(Ifx_GETH *gethSFR);
876
877 /** \brief API to get the resource index of the GETH specified.
878 * \param geth Pointer to Geth register
879 * \return geth resource index
880 */
881 IFX_EXTERN IfxGeth_Index IfxGeth_getIndex(Ifx_GETH *geth);
882
883 /** \brief Get the address of the specified GETH resource index
884 * \param geth Module index of the GETH
885 * \return GETH module register address
886 */
887 IFX_EXTERN Ifx_GETH *IfxGeth_getAddress(IfxGeth_Index geth);
888
889 /** \} */
890
891 /** \addtogroup IfxLld_Geth_Std_MTL_Functions
892 * \{ */
893
894 /******************************************************************************/
895 /*-------------------------Inline Function Prototypes-------------------------*/
896 /******************************************************************************/
897
898 /** \brief Enables the selected Rx Queue
899 * \param gethSFR Pointer to GETH register base address
900 * \param queueId Rx Queue Index
901 * \return None
902 */
903 IFX_INLINE void IfxGeth_mtl_enableRxQueue(Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId);
904
905 /** \brief sets the Rx Arbitration algorithm
906 * \param gethSFR Pointer to GETH register base address
907 * \param arbitrationAlgorithm Rx Arbitration Algorithm
908 * \return None
909 */
910 IFX_INLINE void IfxGeth_mtl_setRxArbitrationAlgorithm(Ifx_GETH *gethSFR, IfxGeth_RxArbitrationAlgorithm arbitrationAlgorithm);
911
912 /** \brief Sets the selected DMA Channel mapping for the selected Rx Queue
913 * \param gethSFR Pointer to GETH register base address
914 * \param queueId Rx Queue Index
915 * \param dmaChannel DMA channel for selected Rx Queue
916 * \return None
917 */
918 IFX_INLINE void IfxGeth_mtl_setRxQueueDmaChannelMapping(Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId, IfxGeth_RxDmaChannel dmaChannel);
919
920 /** \brief Sets the selected Rx Queue for DA based DMA channel
921 * \param gethSFR Pointer to GETH register base address
922 * \param queueId Rx Queue Index
923 * \param enabled Enable/Disable Receive Store and Forward
924 * \return None
925 */
926 IFX_INLINE void IfxGeth_mtl_setRxQueueForDaBasedDmaChannel(Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId, boolean enabled);
927
928 /** \brief sets the Tx Scheduling algorithm
929 * \param gethSFR Pointer to GETH register base address
930 * \param schedulingAlgorithm Tx Scheduling Algorithm
931 * \return None
932 */
933 IFX_INLINE void IfxGeth_mtl_setTxSchedulingAlgorithm(Ifx_GETH *gethSFR, IfxGeth_TxSchedulingAlgorithm schedulingAlgorithm);
934
935 /** \brief Enable and set queue ID to route packets failing unicast filter
936 * \param gethSFR Pointer to GETH register base address
937 * \param queueId Rx MTL Queue ID
938 * \return None
939 */
940 IFX_INLINE void IfxGeth_mtl_enableUnicastFilterFailQueuing(Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId);
941
942 /** \brief Disable queuing of packets failing unicast filtering
943 * \param gethSFR Pointer to GETH register base address
944 * \return None
945 */
946 IFX_INLINE void IfxGeth_mtl_disableUnicastFilterFailQueuing(Ifx_GETH *gethSFR);
947
948 /** \brief Enable and set queue ID to route packets failing multicast filter
949 * \param gethSFR Pointer to GETH register base address
950 * \param queueId Rx MTL Queue ID
951 * \return None
952 */
953 IFX_INLINE void IfxGeth_mtl_enableMulticastFilterFailQueuing(Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId);
954
955 /** \brief Disable queuing of packets failing multicast filtering
956 * \param gethSFR Pointer to GETH register base address
957 * \return None
958 */
959 IFX_INLINE void IfxGeth_mtl_disableMulticastFilterFailQueuing(Ifx_GETH *gethSFR);
960
961 /** \brief Enable and set queue ID to route packets failing VLAN tag filter
962 * \param gethSFR Pointer to GETH register base address
963 * \param queueId Rx MTL Queue ID
964 * \return None
965 */
966 IFX_INLINE void IfxGeth_mtl_enableVlanFilterFailQueuing(Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId);
967
968 /** \brief Disable queuing of packets failing VLAN tag filtering
969 * \param gethSFR Pointer to GETH register base address
970 * \return None
971 */
972 IFX_INLINE void IfxGeth_mtl_disableVlanFilterFailQueuing(Ifx_GETH *gethSFR);
973
974 /******************************************************************************/
975 /*-------------------------Global Function Prototypes-------------------------*/
976 /******************************************************************************/
977
978 /** \brief Clears all the Mtl interrupt flags
979 * \param gethSFR Pointer to GETH register base address
980 * \param queueId Queue Index
981 * \return None
982 */
983 IFX_EXTERN void IfxGeth_mtl_clearAllInterruptFlags(Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId);
984
985 /** \brief Clears the selected Mtl interrupt flag
986 * \param gethSFR Pointer to GETH register base address
987 * \param queueId Queue Index
988 * \param flag MTL interrupt flag
989 * \return None
990 */
991 IFX_EXTERN void IfxGeth_mtl_clearInterruptFlag(Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId, IfxGeth_MtlInterruptFlag flag);
992
993 /** \brief Disables the selected Mtl interrupt flag
994 * \param gethSFR Pointer to GETH register base address
995 * \param queueId Queue Index
996 * \param flag MTL interrupt flag
997 * \return None
998 */
999 IFX_EXTERN void IfxGeth_mtl_disableInterrupt(Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId, IfxGeth_MtlInterruptFlag flag);
1000
1001 /** \brief Enables the selected Mtl interrupt flag
1002 * \param gethSFR Pointer to GETH register base address
1003 * \param queueId Queue Index
1004 * \param flag MTL interrupt flag
1005 * \return None
1006 */
1007 IFX_EXTERN void IfxGeth_mtl_enableInterrupt(Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId, IfxGeth_MtlInterruptFlag flag);
1008
1009 /** \brief Enables the selected TX Queue
1010 * \param gethSFR Pointer to GETH register base address
1011 * \param queueId Tx Queue Index
1012 * \return None
1013 */
1014 IFX_EXTERN void IfxGeth_mtl_enableTxQueue(Ifx_GETH *gethSFR, IfxGeth_TxMtlQueue queueId);
1015
1016 /** \brief Returns the status of selected Mtl interrupt flag
1017 * \param gethSFR Pointer to GETH register base address
1018 * \param queueId Queue Index
1019 * \param flag MTL interrupt flag
1020 * \return TRUE: if set\n
1021 * FLASE : if not set
1022 */
1023 IFX_EXTERN boolean IfxGeth_mtl_isInterruptFlagSet(Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId, IfxGeth_MtlInterruptFlag flag);
1024
1025 /** \brief Sets the Receive Forward Error Packets for the selected RX Queue
1026 * \param gethSFR Pointer to GETH register base address
1027 * \param queueId Rx Queue Index
1028 * \param enabled Enable/Disable Receive Forward Error Packets
1029 * \return None
1030 */
1031 IFX_EXTERN void IfxGeth_mtl_setRxForwardErrorPacket(Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId, boolean enabled);
1032
1033 /** \brief Sets the Receive Forward Undersized Good Packets for the selected RX Queue
1034 * \param gethSFR Pointer to GETH register base address
1035 * \param queueId Rx Queue Index
1036 * \param enabled Enable/Disable Receive Forward Undersized Good Packets
1037 * \return None
1038 */
1039 IFX_EXTERN void IfxGeth_mtl_setRxForwardUndersizedGoodPacket(Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId, boolean enabled);
1040
1041 /** \brief Sets the size of the selected RX Queue
1042 * \param gethSFR Pointer to GETH register base address
1043 * \param queueId Rx Queue Index
1044 * \param queueSize Rx Queue Size
1045 * \return None
1046 */
1047 IFX_EXTERN void IfxGeth_mtl_setRxQueueSize(Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId, IfxGeth_QueueSize queueSize);
1048
1049 /** \brief Sets the Receive Store And Forward for the selected RX Queue
1050 * \param gethSFR Pointer to GETH register base address
1051 * \param queueId Rx Queue Index
1052 * \param enabled Enable/Disable Receive Store and Forward
1053 * \return None
1054 */
1055 IFX_EXTERN void IfxGeth_mtl_setRxStoreAndForward(Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId, boolean enabled);
1056
1057 /** \brief Sets the size of the selected TX Queue
1058 * \param gethSFR Pointer to GETH register base address
1059 * \param queueId Tx Queue Index
1060 * \param queueSize Tx Queue Size
1061 * \return None
1062 */
1063 IFX_EXTERN void IfxGeth_mtl_setTxQueueSize(Ifx_GETH *gethSFR, IfxGeth_TxMtlQueue queueId, IfxGeth_QueueSize queueSize);
1064
1065 /** \brief Sets the Transmit Store And Forward for teh selected TX Queue
1066 * \param gethSFR Pointer to GETH register base address
1067 * \param queueId Tx Queue Index
1068 * \param enabled Enable/Disable Transmit Store and Forward
1069 * \return None
1070 */
1071 IFX_EXTERN void IfxGeth_mtl_setTxStoreAndForward(Ifx_GETH *gethSFR, IfxGeth_TxMtlQueue queueId, boolean enabled);
1072
1073 /** \} */
1074
1075 /** \addtogroup IfxLld_Geth_Std_DMA_Functions
1076 * \{ */
1077
1078 /******************************************************************************/
1079 /*-------------------------Inline Function Prototypes-------------------------*/
1080 /******************************************************************************/
1081
1082 /** \brief Applies a software reset of MAC and DMA controller
1083 * \param gethSFR Pointer to GETH register base address
1084 * \return None
1085 */
1086 IFX_INLINE void IfxGeth_dma_applySoftwareReset(Ifx_GETH *gethSFR);
1087
1088 /** \brief Returns the status of selected DMA interrupt flag
1089 * \param gethSFR Pointer to GETH register base address
1090 * \param channelId DMA channel Id
1091 * \return None
1092 */
1093 IFX_INLINE void IfxGeth_dma_clearAllInterruptFlags(Ifx_GETH *gethSFR, IfxGeth_DmaChannel channelId);
1094
1095 /** \brief Returns the status of selected DMA interrupt flag
1096 * \param gethSFR Pointer to GETH register base address
1097 * \param channelId DMA channel Id
1098 * \param flag DMA interrupt flag
1099 * \return None
1100 */
1101 IFX_INLINE void IfxGeth_dma_clearInterruptFlag(Ifx_GETH *gethSFR, IfxGeth_DmaChannel channelId, IfxGeth_DmaInterruptFlag flag);
1102
1103 /** \brief Disables the selected DMA interrupt
1104 * \param gethSFR Pointer to GETH register base address
1105 * \param channelId DMA channel Id
1106 * \param flag DMA interrupt flag
1107 * \return None
1108 */
1109 IFX_INLINE void IfxGeth_dma_disableInterrupt(Ifx_GETH *gethSFR, IfxGeth_DmaChannel channelId, IfxGeth_DmaInterruptFlag flag);
1110
1111 /** \brief Enables the selected DMA interrupt
1112 * \param gethSFR Pointer to GETH register base address
1113 * \param channelId DMA channel Id
1114 * \param flag DMA interrupt flag
1115 * \return None
1116 */
1117 IFX_INLINE void IfxGeth_dma_enableInterrupt(Ifx_GETH *gethSFR, IfxGeth_DmaChannel channelId, IfxGeth_DmaInterruptFlag flag);
1118
1119 /** \brief Returns the status of selected DMA interrupt flag
1120 * \param gethSFR Pointer to GETH register base address
1121 * \param channelId DMA channel Id
1122 * \param flag DMA interrupt flag
1123 * \return TRUE: if set\n
1124 * FLASE : if not set
1125 */
1126 IFX_INLINE boolean IfxGeth_dma_isInterruptFlagSet(Ifx_GETH *gethSFR, IfxGeth_DmaChannel channelId, IfxGeth_DmaInterruptFlag flag);
1127
1128 /** \brief Wiats until software reset of MAC and DMA controller is done or until timout.
1129 * \param gethSFR Pointer to GETH register base address
1130 */
1131 IFX_INLINE boolean IfxGeth_dma_isSoftwareResetDone(Ifx_GETH *gethSFR);
1132
1133 /** \brief Enables/Disables Address aligned beats
1134 * \param gethSFR Pointer to GETH register base address
1135 * \param enabled Enable/Disable Address Aligned Beats
1136 * \return None
1137 */
1138 IFX_INLINE void IfxGeth_dma_setAddressAlignedBeats(Ifx_GETH *gethSFR, boolean enabled);
1139
1140 /** \brief Enables/Disables Fixed Burst Length
1141 * \param gethSFR Pointer to GETH register base address
1142 * \param enabled Enable/Disable Fixed Burst
1143 * \return None
1144 */
1145 IFX_INLINE void IfxGeth_dma_setFixedBurst(Ifx_GETH *gethSFR, boolean enabled);
1146
1147 /** \brief Enables/Disables Mixed Burst Length
1148 * \param gethSFR Pointer to GETH register base address
1149 * \param enabled Enable/Disable Mixed Burst
1150 * \return None
1151 */
1152 IFX_INLINE void IfxGeth_dma_setMixedBurst(Ifx_GETH *gethSFR, boolean enabled);
1153
1154 /** \brief sets the size of the rx buffers in descriptors for selected Rx channel of DMA
1155 * \param gethSFR Pointer to GETH register base address
1156 * \param channel Rx channel Id
1157 * \param size Rx Buffers size (applies for both buffers)
1158 * \return None
1159 */
1160 IFX_INLINE void IfxGeth_dma_setRxBufferSize(Ifx_GETH *gethSFR, IfxGeth_RxDmaChannel channel, uint16 size);
1161
1162 /** \brief sets the base address of the first descriptor in the Receive descriptor list
1163 * \param gethSFR Pointer to GETH register base address
1164 * \param channel Rx channel Id
1165 * \param address base address of the first descriptor in the Receive descriptor list
1166 * \return None
1167 */
1168 IFX_INLINE void IfxGeth_dma_setRxDescriptorListAddress(Ifx_GETH *gethSFR, IfxGeth_RxDmaChannel channel, uint32 address);
1169
1170 /** \brief sets the Length of the Rx descriptors ring
1171 * \param gethSFR Pointer to GETH register base address
1172 * \param channel Rx channel Id
1173 * \param length Length of the ring (no of total Rx descriptors)
1174 * \return None
1175 */
1176 IFX_INLINE void IfxGeth_dma_setRxDescriptorRingLength(Ifx_GETH *gethSFR, IfxGeth_RxDmaChannel channel, uint32 length);
1177
1178 /** \brief sets the address of the last valid descriptor in the Receive descriptor list
1179 * \param gethSFR Pointer to GETH register base address
1180 * \param channel Rx channel Id
1181 * \param address address of the last valid descriptor in the Receive descriptor list
1182 * \return None
1183 */
1184 IFX_INLINE void IfxGeth_dma_setRxDescriptorTailPointer(Ifx_GETH *gethSFR, IfxGeth_RxDmaChannel channel, uint32 address);
1185
1186 /** \brief sets the programmable burst length of selected Rx channel of DMA
1187 * \param gethSFR Pointer to GETH register base address
1188 * \param channel Rx channel Id
1189 * \param length Programmable burst length
1190 * \return None
1191 */
1192 IFX_INLINE void IfxGeth_dma_setRxMaxBurstLength(Ifx_GETH *gethSFR, IfxGeth_RxDmaChannel channel, IfxGeth_DmaBurstLength length);
1193
1194 /** \brief sets the base address of the first descriptor in the Transmit descriptor list
1195 * \param gethSFR Pointer to GETH register base address
1196 * \param channel Tx channel Id
1197 * \param address base address of the first descriptor in the Transmit descriptor list
1198 * \return None
1199 */
1200 IFX_INLINE void IfxGeth_dma_setTxDescriptorListAddress(Ifx_GETH *gethSFR, IfxGeth_TxDmaChannel channel, uint32 address);
1201
1202 /** \brief sets the Length of the Tx descriptors ring
1203 * \param gethSFR Pointer to GETH register base address
1204 * \param channel Tx channel Id
1205 * \param length Length of the ring (no of total Tx descriptors)
1206 * \return None
1207 */
1208 IFX_INLINE void IfxGeth_dma_setTxDescriptorRingLength(Ifx_GETH *gethSFR, IfxGeth_TxDmaChannel channel, uint32 length);
1209
1210 /** \brief sets the address of the last valid descriptor in the Transmit descriptor list
1211 * \param gethSFR Pointer to GETH register base address
1212 * \param channel Tx channel Id
1213 * \param address address of the last valid descriptor in the Transmit descriptor list
1214 * \return None
1215 */
1216 IFX_INLINE void IfxGeth_dma_setTxDescriptorTailPointer(Ifx_GETH *gethSFR, IfxGeth_TxDmaChannel channel, uint32 address);
1217
1218 /** \brief sets the programmable burst length of selected Tx channel of DMA
1219 * \param gethSFR Pointer to GETH register base address
1220 * \param channel Tx channel Id
1221 * \param length Programmable burst length
1222 * \return None
1223 */
1224 IFX_INLINE void IfxGeth_dma_setTxMaxBurstLength(Ifx_GETH *gethSFR, IfxGeth_TxDmaChannel channel, IfxGeth_DmaBurstLength length);
1225
1226 /** \brief starts the receiver of selected Rx channel of DMA
1227 * \param gethSFR Pointer to GETH register base address
1228 * \param channel Rx channel Id
1229 * \return None
1230 */
1231 IFX_INLINE void IfxGeth_dma_startReceiver(Ifx_GETH *gethSFR, IfxGeth_RxDmaChannel channel);
1232
1233 /** \brief starts the tramsimitter of selected Tx channel of DMA
1234 * \param gethSFR Pointer to GETH register base address
1235 * \param channel Tx channel Id
1236 * \return None
1237 */
1238 IFX_INLINE void IfxGeth_dma_startTransmitter(Ifx_GETH *gethSFR, IfxGeth_TxDmaChannel channel);
1239
1240 /** \brief Stops the tramsimitter of selected Tx channel of DMA
1241 * \param gethSFR Pointer to GETH register base address
1242 * \param channel Tx channel Id
1243 * \return None
1244 */
1245 IFX_INLINE void IfxGeth_dma_stopTransmitter(Ifx_GETH *gethSFR, IfxGeth_TxDmaChannel channel);
1246
1247 /** \} */
1248
1249 /******************************************************************************/
1250 /*-------------------------Inline Function Prototypes-------------------------*/
1251 /******************************************************************************/
1252
1253 /** \brief Enables/Disables the MAC operation in the loopback mode at GMII or MII
1254 * \param gethSFR Pointer to GETH register base address
1255 * \param mode Loopback Mode Enable / Disable
1256 * \return None
1257 */
1258 IFX_INLINE void IfxGeth_mac_setLoopbackMode(Ifx_GETH *gethSFR, IfxGeth_LoopbackMode mode);
1259
1260 /******************************************************************************/
1261 /*-------------------------Global Function Prototypes-------------------------*/
1262 /******************************************************************************/
1263
1264 /** \brief Reads a MDIO register of Clause 22 PHY
1265 * \param layerAddr Layer Address
1266 * \param regAddr Register Address
1267 * \param pData Pointer to Data
1268 * \return None
1269 */
1270 IFX_EXTERN void IfxGeth_phy_Clause22_readMDIORegister(uint32 layerAddr, uint32 regAddr, uint32 *pData);
1271
1272 /** \brief Writes to a MDIO register of Clause 22 PHY
1273 * \param layerAddr Layer Address
1274 * \param regAddr Register Address
1275 * \param data Data
1276 * \return None
1277 */
1278 IFX_EXTERN void IfxGeth_Phy_Clause22_writeMDIORegister(uint32 layerAddr, uint32 regAddr, uint32 data);
1279
1280 /** \brief Reads a MDIO register of Clause 45 PHY
1281 * \param layerAddr Layer Address
1282 * \param deviceAddr Device Address
1283 * \param regAddr Register Address
1284 * \param pData Pointer to Data
1285 * \return None
1286 */
1287 IFX_EXTERN void IfxGeth_phy_Clause45_readMDIORegister(uint32 layerAddr, uint32 deviceAddr, uint32 regAddr, uint32 *pData);
1288
1289 /** \brief Writes to a MDIO register for Clause 45 PHY
1290 * \param layerAddr Layer Address
1291 * \param deviceAddr Device Address
1292 * \param regAddr Register Address
1293 * \param data Data
1294 * \return None
1295 */
1296 IFX_EXTERN void IfxGeth_Phy_Clause45_writeMDIORegister(uint32 layerAddr, uint32 deviceAddr, uint32 regAddr, uint32 data);
1297
1298 /** \brief Sets the maximum size of the packet
1299 * \param gethSFR Pointer to GETH register base address
1300 * \param maxPacketSize Minimum size of the frame beyond which giant packet status is set.
1301 * \return None
1302 */
1303 IFX_EXTERN void IfxGeth_mac_setMaxPacketSize(Ifx_GETH *gethSFR, uint16 maxPacketSize);
1304
1305 /******************************************************************************/
1306 /*---------------------Inline Function Implementations------------------------*/
1307 /******************************************************************************/
1308
1309 IFX_INLINE void IfxGeth_dma_applySoftwareReset(Ifx_GETH *gethSFR)
1310 {
1311 gethSFR->DMA_MODE.B.SWR = 1;
1312 }
1313
1314
1315 IFX_INLINE void IfxGeth_dma_clearAllInterruptFlags(Ifx_GETH *gethSFR, IfxGeth_DmaChannel channelId)
1316 {
1317 gethSFR->DMA_CH[channelId].STATUS.U = 0;
1318 }
1319
1320
1321 IFX_INLINE void IfxGeth_dma_clearInterruptFlag(Ifx_GETH *gethSFR, IfxGeth_DmaChannel channelId, IfxGeth_DmaInterruptFlag flag)
1322 {
1323 uint32 value = (1 << flag);
1324 gethSFR->DMA_CH[channelId].STATUS.U = value;
1325 }
1326
1327
1328 IFX_INLINE void IfxGeth_dma_disableInterrupt(Ifx_GETH *gethSFR, IfxGeth_DmaChannel channelId, IfxGeth_DmaInterruptFlag flag)
1329 {
1330 uint32 value = ~(1 << flag);
1331 gethSFR->DMA_CH[channelId].INTERRUPT_ENABLE.U &= value;
1332 }
1333
1334
1335 IFX_INLINE void IfxGeth_dma_enableInterrupt(Ifx_GETH *gethSFR, IfxGeth_DmaChannel channelId, IfxGeth_DmaInterruptFlag flag)
1336 {
1337 uint32 value = (1 << flag);
1338 gethSFR->DMA_CH[channelId].INTERRUPT_ENABLE.U |= value;
1339 }
1340
1341
1342 IFX_INLINE boolean IfxGeth_dma_isInterruptFlagSet(Ifx_GETH *gethSFR, IfxGeth_DmaChannel channelId, IfxGeth_DmaInterruptFlag flag)
1343 {
1344 uint32 value = (1 << flag);
1345 return gethSFR->DMA_CH[channelId].STATUS.U & (Ifx_UReg_32Bit)value;
1346 }
1347
1348
1349 IFX_INLINE boolean IfxGeth_dma_isSoftwareResetDone(Ifx_GETH *gethSFR)
1350 {
1351 return gethSFR->DMA_MODE.B.SWR == 0;
1352 }
1353
1354
1355 IFX_INLINE void IfxGeth_dma_setAddressAlignedBeats(Ifx_GETH *gethSFR, boolean enabled)
1356 {
1357 gethSFR->DMA_SYSBUS_MODE.B.AAL = enabled;
1358 }
1359
1360
1361 IFX_INLINE void IfxGeth_dma_setFixedBurst(Ifx_GETH *gethSFR, boolean enabled)
1362 {
1363 gethSFR->DMA_SYSBUS_MODE.B.FB = enabled;
1364 }
1365
1366
1367 IFX_INLINE void IfxGeth_dma_setMixedBurst(Ifx_GETH *gethSFR, boolean enabled)
1368 {
1369 gethSFR->DMA_SYSBUS_MODE.B.MB = enabled;
1370 }
1371
1372
1373 IFX_INLINE void IfxGeth_dma_setRxBufferSize(Ifx_GETH *gethSFR, IfxGeth_RxDmaChannel channel, uint16 size)
1374 {
1375 /* [RBSZ_13_Y:RBSZ_X_0] represents the size of the Rx buffer*/
1376 gethSFR->DMA_CH[channel].RX_CONTROL.B.RBSZ_13_Y = (uint32)((size >> 2) & IFX_GETH_DMA_CH_RX_CONTROL_RBSZ_13_Y_MSK);
1377 }
1378
1379
1380 IFX_INLINE void IfxGeth_dma_setRxDescriptorListAddress(Ifx_GETH *gethSFR, IfxGeth_RxDmaChannel channel, uint32 address)
1381 {
1382 gethSFR->DMA_CH[channel].RXDESC_LIST_ADDRESS.U = (uint32)address;
1383 }
1384
1385
1386 IFX_INLINE void IfxGeth_dma_setRxDescriptorRingLength(Ifx_GETH *gethSFR, IfxGeth_RxDmaChannel channel, uint32 length)
1387 {
1388 gethSFR->DMA_CH[channel].RXDESC_RING_LENGTH.U = length;
1389 }
1390
1391
1392 IFX_INLINE void IfxGeth_dma_setRxDescriptorTailPointer(Ifx_GETH *gethSFR, IfxGeth_RxDmaChannel channel, uint32 address)
1393 {
1394 gethSFR->DMA_CH[channel].RXDESC_TAIL_POINTER.U = address;
1395 }
1396
1397
1398 IFX_INLINE void IfxGeth_dma_setRxMaxBurstLength(Ifx_GETH *gethSFR, IfxGeth_RxDmaChannel channel, IfxGeth_DmaBurstLength length)
1399 {
1400 gethSFR->DMA_CH[channel].RX_CONTROL.B.RXPBL = length;
1401 }
1402
1403
1404 IFX_INLINE void IfxGeth_dma_setTxDescriptorListAddress(Ifx_GETH *gethSFR, IfxGeth_TxDmaChannel channel, uint32 address)
1405 {
1406 gethSFR->DMA_CH[channel].TXDESC_LIST_ADDRESS.U = address;
1407 }
1408
1409
1410 IFX_INLINE void IfxGeth_dma_setTxDescriptorRingLength(Ifx_GETH *gethSFR, IfxGeth_TxDmaChannel channel, uint32 length)
1411 {
1412 gethSFR->DMA_CH[channel].TXDESC_RING_LENGTH.U = length;
1413 }
1414
1415
1416 IFX_INLINE void IfxGeth_dma_setTxDescriptorTailPointer(Ifx_GETH *gethSFR, IfxGeth_TxDmaChannel channel, uint32 address)
1417 {
1418 gethSFR->DMA_CH[channel].TXDESC_TAIL_POINTER.U = (uint32)address;
1419 }
1420
1421
1422 IFX_INLINE void IfxGeth_dma_setTxMaxBurstLength(Ifx_GETH *gethSFR, IfxGeth_TxDmaChannel channel, IfxGeth_DmaBurstLength length)
1423 {
1424 gethSFR->DMA_CH[channel].TX_CONTROL.B.TXPBL = length;
1425 }
1426
1427
1428 IFX_INLINE void IfxGeth_dma_startReceiver(Ifx_GETH *gethSFR, IfxGeth_RxDmaChannel channel)
1429 {
1430 gethSFR->DMA_CH[channel].RX_CONTROL.B.SR = TRUE;
1431 }
1432
1433
1434 IFX_INLINE void IfxGeth_dma_startTransmitter(Ifx_GETH *gethSFR, IfxGeth_TxDmaChannel channel)
1435 {
1436 gethSFR->DMA_CH[channel].TX_CONTROL.B.ST = TRUE;
1437 }
1438
1439
1440 IFX_INLINE void IfxGeth_dma_stopTransmitter(Ifx_GETH *gethSFR, IfxGeth_TxDmaChannel channel)
1441 {
1442 gethSFR->DMA_CH[channel].TX_CONTROL.B.ST = FALSE;
1443 }
1444
1445
1446 IFX_INLINE boolean IfxGeth_isModuleEnabled(Ifx_GETH *gethSFR)
1447 {
1448 return (gethSFR->CLC.B.DISS == 0) ? 1 : 0;
1449 }
1450
1451
1452 IFX_INLINE void IfxGeth_mac_disableReceiver(Ifx_GETH *gethSFR)
1453 {
1454 gethSFR->MAC_CONFIGURATION.B.RE = 0;
1455 }
1456
1457
1458 IFX_INLINE void IfxGeth_mac_disableTransmitter(Ifx_GETH *gethSFR)
1459 {
1460 gethSFR->MAC_CONFIGURATION.B.TE = 0;
1461 }
1462
1463
1464 IFX_INLINE void IfxGeth_mac_enableReceiver(Ifx_GETH *gethSFR)
1465 {
1466 gethSFR->MAC_CONFIGURATION.B.RE = 1;
1467 }
1468
1469
1470 IFX_INLINE void IfxGeth_mac_enableTransmitter(Ifx_GETH *gethSFR)
1471 {
1472 gethSFR->MAC_CONFIGURATION.B.TE = 1;
1473 }
1474
1475
1476 IFX_INLINE void IfxGeth_mac_setAllMulticastPassing(Ifx_GETH *gethSFR, boolean enabled)
1477 {
1478 gethSFR->MAC_PACKET_FILTER.B.PM = ((enabled == 1) ? 1 : 0);
1479 }
1480
1481
1482 IFX_INLINE void IfxGeth_mac_setCrcChecking(Ifx_GETH *gethSFR, boolean enabled)
1483 {
1484 gethSFR->MAC_EXT_CONFIGURATION.B.DCRCC = ((enabled == 1) ? 0 : 1);
1485 }
1486
1487
1488 IFX_INLINE void IfxGeth_mac_setCrcStripping(Ifx_GETH *gethSFR, boolean acsEnabled, boolean cstEnabled)
1489 {
1490 gethSFR->MAC_CONFIGURATION.B.ACS = ((acsEnabled == 1) ? 1 : 0);
1491 gethSFR->MAC_CONFIGURATION.B.CST = ((cstEnabled == 1) ? 1 : 0);
1492 }
1493
1494
1495 IFX_INLINE void IfxGeth_mac_setDuplexMode(Ifx_GETH *gethSFR, IfxGeth_DuplexMode mode)
1496 {
1497 gethSFR->MAC_CONFIGURATION.B.DM = mode;
1498 }
1499
1500
1501 IFX_INLINE void IfxGeth_mac_setLoopbackMode(Ifx_GETH *gethSFR, IfxGeth_LoopbackMode mode)
1502 {
1503 gethSFR->MAC_CONFIGURATION.B.LM = mode;
1504 }
1505
1506
1507 IFX_INLINE void IfxGeth_mac_setPreambleLength(Ifx_GETH *gethSFR, IfxGeth_PreambleLength length)
1508 {
1509 gethSFR->MAC_CONFIGURATION.B.PRELEN = length;
1510 }
1511
1512
1513 IFX_INLINE void IfxGeth_mac_setPromiscuousMode(Ifx_GETH *gethSFR, boolean enabled)
1514 {
1515 gethSFR->MAC_PACKET_FILTER.B.PR = ((enabled == 1) ? 1 : 0);
1516 }
1517
1518
1519 IFX_INLINE void IfxGeth_mtl_enableRxQueue(Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId)
1520 {
1521 gethSFR->MAC_RXQ_CTRL0.U |= (2 << (queueId * 2));
1522 }
1523
1524
1525 IFX_INLINE void IfxGeth_mtl_setRxArbitrationAlgorithm(Ifx_GETH *gethSFR, IfxGeth_RxArbitrationAlgorithm arbitrationAlgorithm)
1526 {
1527 gethSFR->MTL_OPERATION_MODE.B.RAA = arbitrationAlgorithm;
1528 }
1529
1530
1531 IFX_INLINE void IfxGeth_mtl_setRxQueueDmaChannelMapping(Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId, IfxGeth_RxDmaChannel dmaChannel)
1532 {
1533 gethSFR->MTL_RXQ_DMA_MAP0.U |= (dmaChannel << (queueId * 8));
1534 }
1535
1536
1537 IFX_INLINE void IfxGeth_mtl_setRxQueueForDaBasedDmaChannel(Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId, boolean enabled)
1538 {
1539 gethSFR->MTL_RXQ_DMA_MAP0.U |= (enabled << ((queueId * 8) + 4));
1540 }
1541
1542
1543 IFX_INLINE void IfxGeth_mtl_setTxSchedulingAlgorithm(Ifx_GETH *gethSFR, IfxGeth_TxSchedulingAlgorithm schedulingAlgorithm)
1544 {
1545 gethSFR->MTL_OPERATION_MODE.B.SCHALG = schedulingAlgorithm;
1546 }
1547
1548
1549 IFX_INLINE void IfxGeth_setPhyInterfaceMode(Ifx_GETH *gethSFR, IfxGeth_PhyInterfaceMode mode)
1550 {
1551 gethSFR->GPCTL.B.EPR = mode;
1552 }
1553
1554
1555 IFX_INLINE void IfxGeth_mac_setVlanPriorityQueueRouting(Ifx_GETH *gethSFR, IfxGeth_RxDmaChannel channel, uint8 priorities)
1556 {
1557 gethSFR->MAC_RXQ_CTRL2.U = (gethSFR->MAC_RXQ_CTRL2.U & ((uint32)~(0xFFU << (channel * 8)))) | (priorities << (channel * 8));
1558 }
1559
1560
1561 IFX_INLINE void IfxGeth_mtl_enableUnicastFilterFailQueuing(Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId)
1562 {
1563 gethSFR->MAC_RXQ_CTRL4.B.UFFQ = queueId;
1564 gethSFR->MAC_RXQ_CTRL4.B.UFFQE = TRUE;
1565 }
1566
1567
1568 IFX_INLINE void IfxGeth_mtl_disableUnicastFilterFailQueuing(Ifx_GETH *gethSFR)
1569 {
1570 gethSFR->MAC_RXQ_CTRL4.B.UFFQE = FALSE;
1571 }
1572
1573
1574 IFX_INLINE void IfxGeth_mtl_enableMulticastFilterFailQueuing(Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId)
1575 {
1576 gethSFR->MAC_RXQ_CTRL4.B.MFFQ = queueId;
1577 gethSFR->MAC_RXQ_CTRL4.B.MFFQE = TRUE;
1578 }
1579
1580
1581 IFX_INLINE void IfxGeth_mtl_disableMulticastFilterFailQueuing(Ifx_GETH *gethSFR)
1582 {
1583 gethSFR->MAC_RXQ_CTRL4.B.MFFQE = FALSE;
1584 }
1585
1586
1587 IFX_INLINE void IfxGeth_mtl_enableVlanFilterFailQueuing(Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId)
1588 {
1589 gethSFR->MAC_RXQ_CTRL4.B.VFFQ = queueId;
1590 gethSFR->MAC_RXQ_CTRL4.B.VFFQE = TRUE;
1591 }
1592
1593
1594 IFX_INLINE void IfxGeth_mtl_disableVlanFilterFailQueuing(Ifx_GETH *gethSFR)
1595 {
1596 gethSFR->MAC_RXQ_CTRL4.B.VFFQE = FALSE;
1597 }
1598
1599
1600 IFX_INLINE void IfxGeth_mac_setQueueVlanInsertion(Ifx_GETH *gethSFR, boolean enable)
1601 {
1602 gethSFR->MAC_VLAN_INCL.B.CBTI = enable;
1603 }
1604
1605
1606 #endif /* IFXGET_H */
IfxGeth_QueueSize_2816Bytes
2816Bytes
Definition: IfxGeth.h:188
IfxGeth_PreambleLength_5Bytes
5 bytes of preamble
Definition: IfxGeth.h:169
IfxGeth_MtlInterruptFlag_averageBitsPerSlot
Average Bits Per Slot.
Definition: IfxGeth.h:140
IfxGeth_QueueSize_256Bytes
256Bytes
Definition: IfxGeth.h:178
IfxGeth_mtl_disableUnicastFilterFailQueuing
IFX_INLINE void IfxGeth_mtl_disableUnicastFilterFailQueuing(Ifx_GETH *gethSFR)
Disable queuing of packets failing unicast filtering.
Definition: IfxGeth.h:1568
IfxGeth_RxDescr1_WF_Bits::TSA
uint32 TSA
Timestamp Available.
Definition: IfxGeth.h:378
IfxGeth_RxContextDescr3_Bits::OWN
uint32 OWN
Own Bit.
Definition: IfxGeth.h:340
IfxGeth_RxDescrList
Rx Descriptor List.
Definition: IfxGeth.h:686
IfxGeth_mtl_enableVlanFilterFailQueuing
IFX_INLINE void IfxGeth_mtl_enableVlanFilterFailQueuing(Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId)
Enable and set queue ID to route packets failing VLAN tag filter.
Definition: IfxGeth.h:1587
IfxGeth_TxDmaChannel_3
Tx Dma Channel 3.
Definition: IfxGeth.h:264
IfxGeth_TxSchedulingAlgorithm_sp
Strict Priority Algorithm.
Definition: IfxGeth.h:283
IfxGeth_DmaBurstLength_16
maximum burst length 16
Definition: IfxGeth.h:92
IfxGeth_RxArbitrationAlgorithm_sp
Strict Priority.
Definition: IfxGeth.h:217
IfxGeth_MtlQueue_3
Mtl Queue 3.
Definition: IfxGeth.h:151
IfxGeth_RxDescr1_WF_Bits::PFT
uint32 PFT
PTP Packet Type.
Definition: IfxGeth.h:376
IfxGeth_mtl_setRxArbitrationAlgorithm
IFX_INLINE void IfxGeth_mtl_setRxArbitrationAlgorithm(Ifx_GETH *gethSFR, IfxGeth_RxArbitrationAlgorithm arbitrationAlgorithm)
sets the Rx Arbitration algorithm
Definition: IfxGeth.h:1525
IfxGeth_PreambleLength
IfxGeth_PreambleLength
Preamble Length for Transmit packets Definition in MAC_CONFIGURATION.B.PRELEN.
Definition: IfxGeth.h:166
IfxGeth_ServiceRequest_6
Service Request SR6.
Definition: IfxGeth.h:251
IfxGeth_mac_setQueueVlanInsertion
IFX_INLINE void IfxGeth_mac_setQueueVlanInsertion(Ifx_GETH *gethSFR, boolean enable)
Enable / Disable Queue Insertion.
Definition: IfxGeth.h:1600
IfxGeth_RxDescr2_WF_Bits::L3L4FM
uint32 L3L4FM
Layer 3 and Layer 4 Filter Number Matched.
Definition: IfxGeth.h:405
IfxGeth_dma_disableInterrupt
IFX_INLINE void IfxGeth_dma_disableInterrupt(Ifx_GETH *gethSFR, IfxGeth_DmaChannel channelId, IfxGeth_DmaInterruptFlag flag)
Disables the selected DMA interrupt.
Definition: IfxGeth.h:1328
IfxGeth_DuplexMode_fullDuplex
Full Duplex Mode.
Definition: IfxGeth.h:294
IfxGeth_QueueSize_7680Bytes
7680Bytes
Definition: IfxGeth.h:207
IfxGeth_TxDescr3_RF_Bits::CIC_TPL
uint32 CIC_TPL
Checksum Insertion Control or TCP Payload LengthThese bits control the checksum.
Definition: IfxGeth.h:535
IfxGeth_MtlInterruptFlag_rxQueueOverflow
Receive Queue Overflow.
Definition: IfxGeth.h:141
IfxGeth_RxDescr3_WF_Bits::RS0V
uint32 RS0V
Receive Status RDES0 Valid.
Definition: IfxGeth.h:433
IfxGeth_RxDescr2_WF_Bits::DAF
uint32 DAF
Destination Address Filter Fail.
Definition: IfxGeth.h:400
IfxGeth_mtl_isInterruptFlagSet
IFX_EXTERN boolean IfxGeth_mtl_isInterruptFlagSet(Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId, IfxGeth_MtlInterruptFlag flag)
Returns the status of selected Mtl interrupt flag.
Definition: IfxGeth.c:220
IfxGeth_TxDescr::TDES3
IfxGeth_TxDescr3 TDES3
Tx Descriptor DWORD 3.
Definition: IfxGeth.h:677
IfxGeth_TxDescr2::R
IfxGeth_TxDescr2_RF_Bits R
Read Format Bitfiled Access.
Definition: IfxGeth.h:640
IfxGeth_RxDescr3::W
IfxGeth_RxDescr3_WF_Bits W
Write back Format Bitfiled Access.
Definition: IfxGeth.h:611
IfxGeth_RxDescr2_WF_Bits::L4FM
uint32 L4FM
Layer 4 Filter Match.
Definition: IfxGeth.h:404
IfxGeth_mac_setMaxPacketSize
IFX_EXTERN void IfxGeth_mac_setMaxPacketSize(Ifx_GETH *gethSFR, uint16 maxPacketSize)
Sets the maximum size of the packet.
Definition: IfxGeth.c:435
IfxGeth_TxDescr3_WF_Bits::LC
uint32 LC
Late Collision.
Definition: IfxGeth.h:556
IfxGeth_dma_isInterruptFlagSet
IFX_INLINE boolean IfxGeth_dma_isInterruptFlagSet(Ifx_GETH *gethSFR, IfxGeth_DmaChannel channelId, IfxGeth_DmaInterruptFlag flag)
Returns the status of selected DMA interrupt flag.
Definition: IfxGeth.h:1342
IfxGeth_DmaInterruptFlag_transmitStopped
Transmit Stopped.
Definition: IfxGeth.h:111
IfxGeth_TxDescr1::C
IfxGeth_TxContextDescr1_Bits C
Context Descriptor Format Bitfiled Access.
Definition: IfxGeth.h:632
IfxGeth_TxDescr3_WF_Bits::reserved_16
uint32 reserved_16
Reserved.
Definition: IfxGeth.h:563
IfxGeth_TxDescrList
Tx Descriptor List.
Definition: IfxGeth.h:693
IFXGETH_MAX_RX_DESCRIPTORS
#define IFXGETH_MAX_RX_DESCRIPTORS
Max number of RX descriptors per list.
Definition: IfxGeth.h:69
IfxGeth_DmaBurstLength_32
maximum burst length 32
Definition: IfxGeth.h:93
IfxGeth_TxDescr0_WF_Bits
Bit Fields of TDES0 in Write-back Format.
Definition: IfxGeth.h:492
IfxGeth_TxDescr1_WF_Bits
Bit Fields of TDES1 in Write-back Format.
Definition: IfxGeth.h:506
IfxGeth_Index
IfxGeth_Index
List of the available Geth instances.
Definition: IfxGeth_cfg.h:104
IfxGeth_RxDescr3_WF_Bits::PL
uint32 PL
Packet Length.
Definition: IfxGeth.h:424
IfxGeth_dma_startTransmitter
IFX_INLINE void IfxGeth_dma_startTransmitter(Ifx_GETH *gethSFR, IfxGeth_TxDmaChannel channel)
starts the tramsimitter of selected Tx channel of DMA
Definition: IfxGeth.h:1434
IfxGeth_mtl_disableInterrupt
IFX_EXTERN void IfxGeth_mtl_disableInterrupt(Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId, IfxGeth_MtlInterruptFlag flag)
Disables the selected Mtl interrupt flag.
Definition: IfxGeth.c:153
IfxGeth_TxDescr3_WF_Bits
Bit Fields of TDES3 in Write-back Format.
Definition: IfxGeth.h:548
IfxGeth_DmaInterruptFlag_fatalBusError
Fatal Bus Error.
Definition: IfxGeth.h:119
IfxGeth_RxDescr0::R
IfxGeth_RxDescr0_RF_Bits R
Read Format Bitfiled Access.
Definition: IfxGeth.h:580
IfxGeth_TxDescr3_RF_Bits::FL_TPL
uint32 FL_TPL
Packet Length or TCP Payload Length.
Definition: IfxGeth.h:533
IfxGeth_RxDescr3_RF_Bits::IOC
uint32 IOC
Interrupt on Completion.
Definition: IfxGeth.h:416
IfxGeth_LineSpeed_2500Mbps
2500 Mbps
Definition: IfxGeth.h:132
IfxGeth_QueueSize_7168Bytes
7168Bytes
Definition: IfxGeth.h:205
IfxGeth_RxDmaChannel_2
Rx Dma Channel 2.
Definition: IfxGeth.h:227
IfxGeth_TxDmaChannel
IfxGeth_TxDmaChannel
Tx DMA channel.
Definition: IfxGeth.h:259
IfxGeth_TxContextDescr1_Bits::TTSH
uint32 TTSH
Transmit Packet Timestamp High.
Definition: IfxGeth.h:453
IfxGeth_RxMtlQueue_3
Rx Queue 3.
Definition: IfxGeth.h:238
IfxGeth_mac_setLoopbackMode
IFX_INLINE void IfxGeth_mac_setLoopbackMode(Ifx_GETH *gethSFR, IfxGeth_LoopbackMode mode)
Enables/Disables the MAC operation in the loopback mode at GMII or MII.
Definition: IfxGeth.h:1501
IfxGeth_ServiceRequest_7
Service Request SR7.
Definition: IfxGeth.h:252
IfxGeth_QueueSize_3840Bytes
3840Bytes
Definition: IfxGeth.h:192
IfxGeth_TxDescr2_WF_Bits
Bit Fields of TDES2 in Write-back Format.
Definition: IfxGeth.h:524
IfxGeth_DmaInterruptFlag_receiveStopped
Receive Stopped.
Definition: IfxGeth.h:115
IfxGeth_dma_setTxDescriptorTailPointer
IFX_INLINE void IfxGeth_dma_setTxDescriptorTailPointer(Ifx_GETH *gethSFR, IfxGeth_TxDmaChannel channel, uint32 address)
sets the address of the last valid descriptor in the Transmit descriptor list
Definition: IfxGeth.h:1416
IfxGeth_TxDescr3::C
IfxGeth_TxContextDescr3_Bits C
Context Descriptor Format Bitfiled Access.
Definition: IfxGeth.h:652
IfxGeth_RxDescr0
RDES0.
Definition: IfxGeth.h:578
IfxGeth_RxDescr1
RDES1.
Definition: IfxGeth.h:588
IfxGeth_RxDescr2
RDES2.
Definition: IfxGeth.h:598
IfxGeth_RxDescr3
RDES3.
Definition: IfxGeth.h:608
IfxGeth_DmaInterruptFlag_contextDescriptorError
Context Descriptor Error.
Definition: IfxGeth.h:120
IfxGeth_DmaInterruptFlag_transmitBufferUnavailable
Trasmit Buffer Unavailable.
Definition: IfxGeth.h:112
IfxGeth_RxDescr3::C
IfxGeth_RxContextDescr3_Bits C
Context Descriptor Format Bitfiled Access.
Definition: IfxGeth.h:612
IfxGeth_DmaInterruptFlag_normalInterruptSummary
Normal Interrupt Summary.
Definition: IfxGeth.h:122
IfxGeth_TxDescr0::R
IfxGeth_TxDescr0_RF_Bits R
Read Format Bitfiled Access.
Definition: IfxGeth.h:620
IfxGeth_TxDescr3_WF_Bits::NC
uint32 NC
No Carrier.
Definition: IfxGeth.h:557
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxGeth_QueueSize_8192Bytes
8192Bytes
Definition: IfxGeth.h:209
IfxGeth_TxDmaChannel_2
Tx Dma Channel 2.
Definition: IfxGeth.h:263
IfxGeth_TxDescr1::W
IfxGeth_TxDescr1_WF_Bits W
Write-back Format Bitfiled Access.
Definition: IfxGeth.h:631
IfxGeth_PreambleLength_3Bytes
3 bytes of preamble
Definition: IfxGeth.h:170
IfxGeth_dma_stopTransmitter
IFX_INLINE void IfxGeth_dma_stopTransmitter(Ifx_GETH *gethSFR, IfxGeth_TxDmaChannel channel)
Stops the tramsimitter of selected Tx channel of DMA.
Definition: IfxGeth.h:1440
IfxGeth_TxDescr0::W
IfxGeth_TxDescr0_WF_Bits W
Write-back Format Bitfiled Access.
Definition: IfxGeth.h:621
IfxGeth_ServiceRequest_2
Service Request SR2.
Definition: IfxGeth.h:247
IfxGeth_mtl_setTxQueueSize
IFX_EXTERN void IfxGeth_mtl_setTxQueueSize(Ifx_GETH *gethSFR, IfxGeth_TxMtlQueue queueId, IfxGeth_QueueSize queueSize)
Sets the size of the selected TX Queue.
Definition: IfxGeth.c:325
IfxGeth_TxDescr2::W
IfxGeth_TxDescr2_WF_Bits W
Write-back Format Bitfiled Access.
Definition: IfxGeth.h:641
IfxGeth_TxContextDescr0_Bits::TTSL
uint32 TTSL
Transmit Packet Timestamp Low.
Definition: IfxGeth.h:446
IfxGeth_PhyInterfaceMode_mii
MII mode.
Definition: IfxGeth.h:158
IfxGeth_TxDmaChannel_0
Tx Dma Channel 0.
Definition: IfxGeth.h:261
IfxGeth_TxContextDescr3_Bits::reserved_24
uint32 reserved_24
Reserved.
Definition: IfxGeth.h:475
IfxGeth_Phy_Clause45_writeMDIORegister
IFX_EXTERN void IfxGeth_Phy_Clause45_writeMDIORegister(uint32 layerAddr, uint32 deviceAddr, uint32 regAddr, uint32 data)
Writes to a MDIO register for Clause 45 PHY.
Definition: IfxGeth.c:423
IfxGeth_mtl_setRxQueueForDaBasedDmaChannel
IFX_INLINE void IfxGeth_mtl_setRxQueueForDaBasedDmaChannel(Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId, boolean enabled)
Sets the selected Rx Queue for DA based DMA channel.
Definition: IfxGeth.h:1537
IfxGeth_QueueSize_768Bytes
768Bytes
Definition: IfxGeth.h:180
IfxGeth_mac_setCrcChecking
IFX_INLINE void IfxGeth_mac_setCrcChecking(Ifx_GETH *gethSFR, boolean enabled)
Enables / Disables CRC Checking for Received Packets.
Definition: IfxGeth.h:1482
IfxGeth_TxDescr0
TDES0.
Definition: IfxGeth.h:618
IfxGeth_TxDescr1
TDES1.
Definition: IfxGeth.h:628
IfxGeth_TxDescr2
TDES2.
Definition: IfxGeth.h:638
IfxGeth_TxDescr3
TDES3.
Definition: IfxGeth.h:648
IfxGeth_RxDescr1::R
IfxGeth_RxDescr1_RF_Bits R
Read Format Bitfiled Access.
Definition: IfxGeth.h:590
IfxGeth_resetModule
IFX_EXTERN void IfxGeth_resetModule(Ifx_GETH *gethSFR)
resets Ethernet kernel
Definition: IfxGeth.c:365
IfxGeth_RxDescr1_WF_Bits::IPHE
uint32 IPHE
IP Header Error.
Definition: IfxGeth.h:370
IfxGeth_PhyInterfaceMode
IfxGeth_PhyInterfaceMode
External Phy Interface RMII Mode.
Definition: IfxGeth.h:156
IfxSrc.h
SRC basic functionality.
IfxGeth_mtl_disableMulticastFilterFailQueuing
IFX_INLINE void IfxGeth_mtl_disableMulticastFilterFailQueuing(Ifx_GETH *gethSFR)
Disable queuing of packets failing multicast filtering.
Definition: IfxGeth.h:1581
IfxGeth_TxDescr2_RF_Bits::B2L
uint32 B2L
Buffer 2 Length.
Definition: IfxGeth.h:517
IfxGeth_TxDescr3_WF_Bits::LOC
uint32 LOC
Loss of Carrier.
Definition: IfxGeth.h:558
IfxGeth_RxDescr1_WF_Bits::TD
uint32 TD
Timestamp Dropped.
Definition: IfxGeth.h:379
IfxGeth_dma_clearAllInterruptFlags
IFX_INLINE void IfxGeth_dma_clearAllInterruptFlags(Ifx_GETH *gethSFR, IfxGeth_DmaChannel channelId)
Returns the status of selected DMA interrupt flag.
Definition: IfxGeth.h:1315
IfxGeth_ServiceRequest
IfxGeth_ServiceRequest
Geth service request index.
Definition: IfxGeth.h:243
IfxGeth_TxDescr3::W
IfxGeth_TxDescr3_WF_Bits W
Write-back Format Bitfiled Access.
Definition: IfxGeth.h:651
IfxGeth_RxDescr2_RF_Bits::BUF2AP
uint32 BUF2AP
Buffer 2 Address Pointer.
Definition: IfxGeth.h:387
IfxGeth_RxDmaChannel_1
Rx Dma Channel 1.
Definition: IfxGeth.h:226
IfxGeth_RxDescr0::W
IfxGeth_RxDescr0_WF_Bits W
Write back Format Bitfiled Access.
Definition: IfxGeth.h:581
IfxGeth_LoopbackMode
IfxGeth_LoopbackMode
Loopback Mode Definition in MAC_CONFIGURATION.B.LM.
Definition: IfxGeth.h:300
IfxGeth_mac_setPreambleLength
IFX_INLINE void IfxGeth_mac_setPreambleLength(Ifx_GETH *gethSFR, IfxGeth_PreambleLength length)
Sets the Preamble Length for Transmit packets.
Definition: IfxGeth.h:1507
IfxGeth_TxContextDescr3_Bits::IVTIR
uint32 IVTIR
Inner VLAN Tag Insert or Replace.
Definition: IfxGeth.h:472
IfxGeth_RxContextDescr0_Bits::RTSL
uint32 RTSL
Receive Packet Timestamp Low.
Definition: IfxGeth.h:316
IfxGeth_RxDescr2::R
IfxGeth_RxDescr2_RF_Bits R
Read Format Bitfiled Access.
Definition: IfxGeth.h:600
IfxGeth_DmaBurstLength_2
maximum burst length 2
Definition: IfxGeth.h:89
IfxGeth_RxDescr0::C
IfxGeth_RxContextDescr0_Bits C
Context Descriptor Format Bitfiled Access.
Definition: IfxGeth.h:582
IfxGeth_RxDmaChannel
IfxGeth_RxDmaChannel
Rx DMA channel.
Definition: IfxGeth.h:223
IfxGeth_LineSpeed_1000Mbps
1000 Mbps
Definition: IfxGeth.h:131
IfxGeth_mac_disableReceiver
IFX_INLINE void IfxGeth_mac_disableReceiver(Ifx_GETH *gethSFR)
Disables the Receiver of MAC Core.
Definition: IfxGeth.h:1452
IfxGeth_QueueSize_4352Bytes
4352Bytes
Definition: IfxGeth.h:194
IfxGeth_TxDescr2_RF_Bits::TTSE_TMWD
uint32 TTSE_TMWD
Transmit Timestamp Enable or External TSO Memory Write Enable.
Definition: IfxGeth.h:518
IfxGeth_DmaInterruptFlag_earlyReceiveInterrupt
Early Receive Interrupt.
Definition: IfxGeth.h:118
IFXGETH_MAX_TX_DESCRIPTORS
#define IFXGETH_MAX_TX_DESCRIPTORS
Max number of TX descriptors per list.
Definition: IfxGeth.h:63
IfxGeth_DmaInterruptFlag_abnormalInterruptSummary
Abnormal Interrupt Summary.
Definition: IfxGeth.h:121
IfxGeth_DmaInterruptFlag_receiveBufferUnavailable
Receive Buffer Unavailable.
Definition: IfxGeth.h:114
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxGeth_RxDescr1_WF_Bits::IPCE
uint32 IPCE
IP Payload Error.
Definition: IfxGeth.h:374
IfxGeth_RxDescr3_WF_Bits::RWT
uint32 RWT
Receive Watchdog Timeout.
Definition: IfxGeth.h:430
IfxGeth_RxDescr2_WF_Bits::MADRM
uint32 MADRM
MAC Address Match or Hash Value.
Definition: IfxGeth.h:402
IfxGeth_RxDescr1::W
IfxGeth_RxDescr1_WF_Bits W
Write back Format Bitfiled Access.
Definition: IfxGeth.h:591
IfxGeth_PhyInterfaceMode_rmii
RMII mode.
Definition: IfxGeth.h:160
IfxGeth_TxDescr0::C
IfxGeth_TxContextDescr0_Bits C
Context Descriptor Format Bitfiled Access.
Definition: IfxGeth.h:622
IfxGeth_TxDescr3_RF_Bits::SLOTNUM_THL
uint32 SLOTNUM_THL
SLOTNUM: Slot Number Control Bits in AV Mode.
Definition: IfxGeth.h:537
IfxGeth_RxDescr3_WF_Bits::RS2V
uint32 RS2V
Receive Status RDES2 Valid.
Definition: IfxGeth.h:435
IfxGeth_DmaChannel
IfxGeth_DmaChannel
DMA channel Index.
Definition: IfxGeth.h:98
IfxGeth_MtlQueue_0
Mtl Queue 0.
Definition: IfxGeth.h:148
IfxGeth_RxDescr3_WF_Bits::GP
uint32 GP
Giant Packet.
Definition: IfxGeth.h:431
IfxScuWdt.h
SCU basic functionality.
IfxGeth_PreambleLength_7Bytes
7 bytes of preamble
Definition: IfxGeth.h:168
IfxGeth_mtl_disableVlanFilterFailQueuing
IFX_INLINE void IfxGeth_mtl_disableVlanFilterFailQueuing(Ifx_GETH *gethSFR)
Disable queuing of packets failing VLAN tag filtering.
Definition: IfxGeth.h:1594
IfxGeth_ServiceRequest_0
Service Request SR0.
Definition: IfxGeth.h:245
IfxGeth_mac_disableTransmitter
IFX_INLINE void IfxGeth_mac_disableTransmitter(Ifx_GETH *gethSFR)
Disables the Trasnmitter of MAC Core.
Definition: IfxGeth.h:1458
IfxGeth_RxDmaChannel_3
Rx Dma Channel 3.
Definition: IfxGeth.h:228
IfxGeth_DmaBurstLength_8
maximum burst length 8
Definition: IfxGeth.h:91
IfxGeth_mac_enableTransmitter
IFX_INLINE void IfxGeth_mac_enableTransmitter(Ifx_GETH *gethSFR)
Enables the Trasnmitter of MAC Core.
Definition: IfxGeth.h:1470
IfxGeth_setPhyInterfaceMode
IFX_INLINE void IfxGeth_setPhyInterfaceMode(Ifx_GETH *gethSFR, IfxGeth_PhyInterfaceMode mode)
Sets the External Phy Interface mode.
Definition: IfxGeth.h:1549
IfxGeth_TxSchedulingAlgorithm
IfxGeth_TxSchedulingAlgorithm
Tx Scheduling Algorithm for Tx Queues Definition in MTL_OPERATION_MODE.B.SCHALG.
Definition: IfxGeth.h:280
IfxGeth_TxDescr::TDES0
IfxGeth_TxDescr0 TDES0
Tx Descriptor DWORD 0.
Definition: IfxGeth.h:674
IfxGeth_TxMtlQueue_1
Tx Queue 1.
Definition: IfxGeth.h:272
IfxGeth_mac_setCrcStripping
IFX_INLINE void IfxGeth_mac_setCrcStripping(Ifx_GETH *gethSFR, boolean acsEnabled, boolean cstEnabled)
Enables/Disables the Automatic Pad or CRC Stripping for frames less than 1536 bytes and CRC strippi...
Definition: IfxGeth.h:1488
IfxGeth_dma_setTxMaxBurstLength
IFX_INLINE void IfxGeth_dma_setTxMaxBurstLength(Ifx_GETH *gethSFR, IfxGeth_TxDmaChannel channel, IfxGeth_DmaBurstLength length)
sets the programmable burst length of selected Tx channel of DMA
Definition: IfxGeth.h:1422
IfxGeth_TxMtlQueue
IfxGeth_TxMtlQueue
Tx MTL Queue ID.
Definition: IfxGeth.h:269
IfxGeth_TxSchedulingAlgorithm_wrr
WRR Algorithm.
Definition: IfxGeth.h:282
IfxGeth_mtl_enableRxQueue
IFX_INLINE void IfxGeth_mtl_enableRxQueue(Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId)
Enables the selected Rx Queue.
Definition: IfxGeth.h:1519
IfxGeth_RxMtlQueue_0
Rx Queue 0.
Definition: IfxGeth.h:235
IfxGeth_TxContextDescr3_Bits::VLTV
uint32 VLTV
VLAN Tag Valid.
Definition: IfxGeth.h:470
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxGeth_dma_setRxDescriptorTailPointer
IFX_INLINE void IfxGeth_dma_setRxDescriptorTailPointer(Ifx_GETH *gethSFR, IfxGeth_RxDmaChannel channel, uint32 address)
sets the address of the last valid descriptor in the Receive descriptor list
Definition: IfxGeth.h:1392
IfxGeth_RxDescr1_WF_Bits::IPCB
uint32 IPCB
IP Checksum Bypassed.
Definition: IfxGeth.h:373
IfxGeth_PhyInterfaceMode_rgmii
RGMII mode.
Definition: IfxGeth.h:159
IfxGeth_TxContextDescr3_Bits
Bit Fields of TDES3 Context Descriptor.
Definition: IfxGeth.h:467
IfxGeth_TxDescr2::C
IfxGeth_TxContextDescr2_Bits C
COntext Descriptor Format Bitfiled Access.
Definition: IfxGeth.h:642
IfxGeth_RxDescr3_WF_Bits::CE
uint32 CE
CRC Error.
Definition: IfxGeth.h:432
IfxGeth_TxContextDescr2_Bits
Bit Fields of TDES2 Context Descriptor.
Definition: IfxGeth.h:458
IfxGeth_TxContextDescr3_Bits::TCMSSV
uint32 TCMSSV
One-Step Timestamp Correction Input or MSS Valid.
Definition: IfxGeth.h:476
IfxGeth_TxContextDescr0_Bits
Bit Fields of TDES0 Context Descriptor.
Definition: IfxGeth.h:444
IfxGeth_RxDescr1_WF_Bits::IP4
uint32 IP4
IPV4 Header Present.
Definition: IfxGeth.h:371
IfxGeth_DuplexMode
IfxGeth_DuplexMode
Duplex Mode Definintion in MAC_CONFIGURATION.B.DM.
Definition: IfxGeth.h:291
IfxGeth_TxContextDescr1_Bits
Bit Fields of TDES1 Context Descriptor.
Definition: IfxGeth.h:451
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxGeth_dma_setRxMaxBurstLength
IFX_INLINE void IfxGeth_dma_setRxMaxBurstLength(Ifx_GETH *gethSFR, IfxGeth_RxDmaChannel channel, IfxGeth_DmaBurstLength length)
sets the programmable burst length of selected Rx channel of DMA
Definition: IfxGeth.h:1398
IfxGeth_QueueSize_4864Bytes
4864Bytes
Definition: IfxGeth.h:196
IfxGeth_TxContextDescr3_Bits::IVLTV
uint32 IVLTV
Inner VLAN Tag Valid.
Definition: IfxGeth.h:471
IfxGeth_RxDescr3_WF_Bits::FD
uint32 FD
First Descriptor.
Definition: IfxGeth.h:437
IfxGeth_TxDescr1::R
IfxGeth_TxDescr1_RF_Bits R
Read Format Bitfiled Access.
Definition: IfxGeth.h:630
IfxGeth_RxDescr3_RF_Bits::BUF2V
uint32 BUF2V
Buffer 2 Address Valid.
Definition: IfxGeth.h:414
IfxGeth_TxDescr3_WF_Bits::FF
uint32 FF
Packet Flushed.
Definition: IfxGeth.h:560
IfxGeth_RxDescr2_WF_Bits::SAF
uint32 SAF
SA Address Filter Fail.
Definition: IfxGeth.h:399
IfxGeth_mac_readQueueVlanTag
IFX_EXTERN boolean IfxGeth_mac_readQueueVlanTag(Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId, uint16 *const vLanTag)
Reads from Queue Vlan tag.
Definition: IfxGeth.c:540
IfxGeth_QueueSize_4096Bytes
4096Bytes
Definition: IfxGeth.h:193
IfxGeth_RxDescr3_WF_Bits::LT
uint32 LT
Length/Type Field.
Definition: IfxGeth.h:426
IfxGeth_TxDescr3_WF_Bits::UF
uint32 UF
Underflow Error.
Definition: IfxGeth.h:552
IfxGeth_mtl_enableUnicastFilterFailQueuing
IFX_INLINE void IfxGeth_mtl_enableUnicastFilterFailQueuing(Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId)
Enable and set queue ID to route packets failing unicast filter.
Definition: IfxGeth.h:1561
IfxGeth_mac_setDuplexMode
IFX_INLINE void IfxGeth_mac_setDuplexMode(Ifx_GETH *gethSFR, IfxGeth_DuplexMode mode)
Sets the Duplex Mode.
Definition: IfxGeth.h:1495
IfxGeth_RxArbitrationAlgorithm_wsp
Weighted Strict Priority.
Definition: IfxGeth.h:218
IfxGeth_dma_setTxDescriptorRingLength
IFX_INLINE void IfxGeth_dma_setTxDescriptorRingLength(Ifx_GETH *gethSFR, IfxGeth_TxDmaChannel channel, uint32 length)
sets the Length of the Tx descriptors ring
Definition: IfxGeth.h:1410
IfxGeth_QueueSize_3328Bytes
3328Bytes
Definition: IfxGeth.h:190
IfxGeth_ServiceRequest_3
Service Request SR3.
Definition: IfxGeth.h:248
IfxGeth_getAddress
IFX_EXTERN Ifx_GETH * IfxGeth_getAddress(IfxGeth_Index geth)
Get the address of the specified GETH resource index.
Definition: IfxGeth.c:498
IfxGeth_LoopbackMode_enable
Enable loopback.
Definition: IfxGeth.h:303
IfxGeth_TxMtlQueue_2
Tx Queue 2.
Definition: IfxGeth.h:273
IfxGeth_TxDescr3_WF_Bits::DB
uint32 DB
Deferred Bit.
Definition: IfxGeth.h:551
IfxGeth_RxDescr::RDES2
IfxGeth_RxDescr2 RDES2
Rx Descriptor DWORD 2.
Definition: IfxGeth.h:666
IfxGeth_QueueSize_7936Bytes
7936Bytes
Definition: IfxGeth.h:208
IfxGeth_RxDescr1_WF_Bits::IP6
uint32 IP6
IPv6 header Present.
Definition: IfxGeth.h:372
IfxGeth_DmaInterruptFlag_receiveInterrupt
Receive Interrupt.
Definition: IfxGeth.h:113
IfxGeth_mac_writeQueueVlanTag
IFX_EXTERN boolean IfxGeth_mac_writeQueueVlanTag(Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId, uint16 vLanTag)
Writes to Queue Vlan tag.
Definition: IfxGeth.c:515
IfxGeth_DmaChannel_0
Dma Channel 0.
Definition: IfxGeth.h:100
IfxGeth_RxDescr2_WF_Bits::HF
uint32 HF
Hash Filter Status.
Definition: IfxGeth.h:401
IfxGeth_TxContextDescr2_Bits::reserved_14
uint32 reserved_14
Reserved.
Definition: IfxGeth.h:461
IfxGeth_QueueSize_2560Bytes
2560Bytes
Definition: IfxGeth.h:187
IfxGeth_DuplexMode_halfDuplex
Half Duplex Mode.
Definition: IfxGeth.h:293
IfxGeth_RxDescr0_RF_Bits
Bit Fields of RDES0 in Read Format.
Definition: IfxGeth.h:345
IfxGeth_TxDescr3::R
IfxGeth_TxDescr3_RF_Bits R
Read Format Bitfiled Access.
Definition: IfxGeth.h:650
IfxGeth_mac_setLineSpeed
IFX_EXTERN void IfxGeth_mac_setLineSpeed(Ifx_GETH *gethSFR, IfxGeth_LineSpeed speed)
Sets the Ethernet Line Speed.
Definition: IfxGeth.c:67
IfxGeth_RxDescr1_RF_Bits
Bit Fields of RDES1 in Read Format.
Definition: IfxGeth.h:360
IfxGeth_DmaChannel_3
Dma Channel 3.
Definition: IfxGeth.h:103
IfxGeth_TxDescr3_WF_Bits::PCE
uint32 PCE
Payload Checksum.
Definition: IfxGeth.h:559
IfxGeth_mtl_clearAllInterruptFlags
IFX_EXTERN void IfxGeth_mtl_clearAllInterruptFlags(Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId)
Clears all the Mtl interrupt flags.
Definition: IfxGeth.c:108
IfxGeth_mtl_enableInterrupt
IFX_EXTERN void IfxGeth_mtl_enableInterrupt(Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId, IfxGeth_MtlInterruptFlag flag)
Enables the selected Mtl interrupt flag.
Definition: IfxGeth.c:177
IfxGeth_QueueSize_5632Bytes
5632Bytes
Definition: IfxGeth.h:199
IfxGeth_RxMtlQueue_2
Rx Queue 2.
Definition: IfxGeth.h:237
IfxGeth_RxDescr1_WF_Bits::PMT
uint32 PMT
PTP Message Type.
Definition: IfxGeth.h:375
IfxGeth_RxDescr2_WF_Bits::ITS
uint32 ITS
Inner VLAN Tag Filter Status (ITS)
Definition: IfxGeth.h:397
IfxGeth_RxDescr3_RF_Bits
Bit Fields of RDES3 in Read Format.
Definition: IfxGeth.h:410
IfxGeth_RxDescr2_WF_Bits::reserved_11
uint32 reserved_11
Reserved.
Definition: IfxGeth.h:396
IfxGeth_QueueSize_3584Bytes
3584Bytes
Definition: IfxGeth.h:191
IfxGeth_TxDescr3_RF_Bits::SAIC
uint32 SAIC
SA Insertion Control.
Definition: IfxGeth.h:538
IfxGeth_mtl_setRxStoreAndForward
IFX_EXTERN void IfxGeth_mtl_setRxStoreAndForward(Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId, boolean enabled)
Sets the Receive Store And Forward for the selected RX Queue.
Definition: IfxGeth.c:305
IfxGeth_DmaChannel_2
Dma Channel 2.
Definition: IfxGeth.h:102
IfxGeth_QueueSize_3072Bytes
3072Bytes
Definition: IfxGeth.h:189
IfxGeth_mtl_setTxSchedulingAlgorithm
IFX_INLINE void IfxGeth_mtl_setTxSchedulingAlgorithm(Ifx_GETH *gethSFR, IfxGeth_TxSchedulingAlgorithm schedulingAlgorithm)
sets the Tx Scheduling algorithm
Definition: IfxGeth.h:1543
IfxGeth_TxDescr3_WF_Bits::ED
uint32 ED
Excessive Deferral.
Definition: IfxGeth.h:553
IfxGeth_RxDescr3::R
IfxGeth_RxDescr3_RF_Bits R
Read Format Bitfiled Access.
Definition: IfxGeth.h:610
IfxGeth_MtlInterruptFlag
IfxGeth_MtlInterruptFlag
MTL interrupt flags.
Definition: IfxGeth.h:137
IfxGeth_RxDescr2_RF_Bits
Bit Fields of RDES2 in Read Format.
Definition: IfxGeth.h:385
IfxGeth_TxContextDescr3_Bits::reserved_28
uint32 reserved_28
Reserved.
Definition: IfxGeth.h:478
IfxGeth_RxDescr2::C
IfxGeth_RxContextDescr2_Bits C
Context Descriptor Format Bitfiled Access.
Definition: IfxGeth.h:602
IfxGeth_dma_startReceiver
IFX_INLINE void IfxGeth_dma_startReceiver(Ifx_GETH *gethSFR, IfxGeth_RxDmaChannel channel)
starts the receiver of selected Rx channel of DMA
Definition: IfxGeth.h:1428
IfxGeth_LineSpeed_10Mbps
10 Mbps
Definition: IfxGeth.h:129
IfxGeth_dma_setMixedBurst
IFX_INLINE void IfxGeth_dma_setMixedBurst(Ifx_GETH *gethSFR, boolean enabled)
Enables/Disables Mixed Burst Length.
Definition: IfxGeth.h:1367
IfxGeth_RxDescr2::W
IfxGeth_RxDescr2_WF_Bits W
Write back Format Bitfiled Access.
Definition: IfxGeth.h:601
IfxGeth_RxDescr1_WF_Bits::OPC
uint32 OPC
OAM Sub-Type Code, or MAC Control Packet opcode.
Definition: IfxGeth.h:380
IfxGeth_MtlInterruptFlag_txQueueUnderflow
Transmit Queue Underflow.
Definition: IfxGeth.h:139
IfxGeth_RxDescr2_WF_Bits::OTS
uint32 OTS
VLAN Filter Status.
Definition: IfxGeth.h:398
IfxGeth_mtl_setRxForwardErrorPacket
IFX_EXTERN void IfxGeth_mtl_setRxForwardErrorPacket(Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId, boolean enabled)
Sets the Receive Forward Error Packets for the selected RX Queue.
Definition: IfxGeth.c:245
IfxGeth_QueueSize_7424Bytes
7424Bytes
Definition: IfxGeth.h:206
IfxGeth_dma_setRxDescriptorListAddress
IFX_INLINE void IfxGeth_dma_setRxDescriptorListAddress(Ifx_GETH *gethSFR, IfxGeth_RxDmaChannel channel, uint32 address)
sets the base address of the first descriptor in the Receive descriptor list
Definition: IfxGeth.h:1380
IfxGeth_QueueSize_512Bytes
512Bytes
Definition: IfxGeth.h:179
IfxGeth_enableModule
IFX_EXTERN void IfxGeth_enableModule(Ifx_GETH *gethSFR)
Enables the clock for GETH module.
Definition: IfxGeth.c:45
IfxGeth_RxDescr3_WF_Bits::RS1V
uint32 RS1V
Receive Status RDES1 Valid.
Definition: IfxGeth.h:434
IfxGeth_RxDescr::RDES1
IfxGeth_RxDescr1 RDES1
Rx Descriptor DWORD 1.
Definition: IfxGeth.h:665
IfxGeth_RxDescr1_WF_Bits::PV
uint32 PV
PTP Version.
Definition: IfxGeth.h:377
IfxGeth_mtl_setRxQueueDmaChannelMapping
IFX_INLINE void IfxGeth_mtl_setRxQueueDmaChannelMapping(Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId, IfxGeth_RxDmaChannel dmaChannel)
Sets the selected DMA Channel mapping for the selected Rx Queue.
Definition: IfxGeth.h:1531
IfxGeth_mtl_clearInterruptFlag
IFX_EXTERN void IfxGeth_mtl_clearInterruptFlag(Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId, IfxGeth_MtlInterruptFlag flag)
Clears the selected Mtl interrupt flag.
Definition: IfxGeth.c:130
IfxGeth_TxDescr3_WF_Bits::reserved_18
uint32 reserved_18
Reserved.
Definition: IfxGeth.h:565
IfxGeth_dma_isSoftwareResetDone
IFX_INLINE boolean IfxGeth_dma_isSoftwareResetDone(Ifx_GETH *gethSFR)
Wiats until software reset of MAC and DMA controller is done or until timout.
Definition: IfxGeth.h:1349
IfxGeth_RxDmaChannel_0
Rx Dma Channel 0.
Definition: IfxGeth.h:225
IfxGeth_cfg.h
GETH on-chip implementation data.
IfxGeth_QueueSize_5888Bytes
5888Bytes
Definition: IfxGeth.h:200
IfxGeth_mac_setPromiscuousMode
IFX_INLINE void IfxGeth_mac_setPromiscuousMode(Ifx_GETH *gethSFR, boolean enabled)
Enables / Disables Promiscuous Mode.
Definition: IfxGeth.h:1513
IfxGeth_phy_Clause45_readMDIORegister
IFX_EXTERN void IfxGeth_phy_Clause45_readMDIORegister(uint32 layerAddr, uint32 deviceAddr, uint32 regAddr, uint32 *pData)
Reads a MDIO register of Clause 45 PHY.
Definition: IfxGeth.c:408
IfxGeth_RxDescr1::C
IfxGeth_RxContextDescr1_Bits C
Context Descriptor Format Bitfiled Access.
Definition: IfxGeth.h:592
IfxGeth_dma_enableInterrupt
IFX_INLINE void IfxGeth_dma_enableInterrupt(Ifx_GETH *gethSFR, IfxGeth_DmaChannel channelId, IfxGeth_DmaInterruptFlag flag)
Enables the selected DMA interrupt.
Definition: IfxGeth.h:1335
IfxGeth_mac_setMacAddress
IFX_EXTERN void IfxGeth_mac_setMacAddress(Ifx_GETH *gethSFR, uint8 *macAddress)
Sets the MAC Address.
Definition: IfxGeth.c:93
IfxGeth_TxDescr3_WF_Bits::JT
uint32 JT
Jabber Timeout.
Definition: IfxGeth.h:561
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxGeth_TxContextDescr2_Bits::MSS
uint32 MSS
Maximum Segment Size.
Definition: IfxGeth.h:460
IfxGeth_TxDescr2_RF_Bits::VTIR
uint32 VTIR
VLAN Tag Insertion or Replacement.
Definition: IfxGeth.h:516
IfxGeth_RxDescr::RDES3
IfxGeth_RxDescr3 RDES3
Rx Descriptor DWORD 3.
Definition: IfxGeth.h:667
IfxGeth_DmaChannel_1
Dma Channel 1.
Definition: IfxGeth.h:101
IfxGeth_ServiceRequest_1
Service Request SR1.
Definition: IfxGeth.h:246
IfxGeth_mtl_enableMulticastFilterFailQueuing
IFX_INLINE void IfxGeth_mtl_enableMulticastFilterFailQueuing(Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId)
Enable and set queue ID to route packets failing multicast filter.
Definition: IfxGeth.h:1574
IfxGeth_RxDescr3_RF_Bits::reserved_27
uint32 reserved_27
Reserved.
Definition: IfxGeth.h:415
IfxGeth_ServiceRequest_9
Service Request SR9.
Definition: IfxGeth.h:254
IfxGeth_TxDescr0_RF_Bits
Bit Fields of TDES0 in Read Format.
Definition: IfxGeth.h:485
IfxGeth_TxDescr1_RF_Bits
Bit Fields of TDES1 in Read Format.
Definition: IfxGeth.h:499
IfxGeth_TxContextDescr3_Bits::reserved_20
uint32 reserved_20
Reserved.
Definition: IfxGeth.h:473
IfxGeth_mtl_enableTxQueue
IFX_EXTERN void IfxGeth_mtl_enableTxQueue(Ifx_GETH *gethSFR, IfxGeth_TxMtlQueue queueId)
Enables the selected TX Queue.
Definition: IfxGeth.c:200
IfxGeth_mtl_setRxQueueSize
IFX_EXTERN void IfxGeth_mtl_setRxQueueSize(Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId, IfxGeth_QueueSize queueSize)
Sets the size of the selected RX Queue.
Definition: IfxGeth.c:285
IfxGeth_mac_enableReceiver
IFX_INLINE void IfxGeth_mac_enableReceiver(Ifx_GETH *gethSFR)
Enables the Receiver of MAC Core.
Definition: IfxGeth.h:1464
IfxGeth_LoopbackMode_disable
Disable loopback.
Definition: IfxGeth.h:302
IfxGeth_QueueSize_6656Bytes
6656Bytes
Definition: IfxGeth.h:203
IfxGeth_TxDescr3_RF_Bits
Bit Fields of TDES3 in Read Format.
Definition: IfxGeth.h:531
IfxGeth_mtl_setTxStoreAndForward
IFX_EXTERN void IfxGeth_mtl_setTxStoreAndForward(Ifx_GETH *gethSFR, IfxGeth_TxMtlQueue queueId, boolean enabled)
Sets the Transmit Store And Forward for teh selected TX Queue.
Definition: IfxGeth.c:345
IfxGeth_RxDescr3_WF_Bits::ES
uint32 ES
Error Summary.
Definition: IfxGeth.h:425
IfxGeth_mac_setVlanPriorityQueueRouting
IFX_INLINE void IfxGeth_mac_setVlanPriorityQueueRouting(Ifx_GETH *gethSFR, IfxGeth_RxDmaChannel channel, uint8 priorities)
Set the priorities for Rx queues for mapping tagged packets.
Definition: IfxGeth.h:1555
IfxGeth_QueueSize_5376Bytes
5376Bytes
Definition: IfxGeth.h:198
IfxGeth_RxDescr1_WF_Bits::PT
uint32 PT
Payload Type.
Definition: IfxGeth.h:369
IfxGeth_RxDescr2_WF_Bits::ARPNR
uint32 ARPNR
ARP Reply Not Generated.
Definition: IfxGeth.h:395
IfxGeth_TxDescr2_RF_Bits
Bit Fields of TDES2 in Read Format.
Definition: IfxGeth.h:513
IfxGeth_mtl_setRxForwardUndersizedGoodPacket
IFX_EXTERN void IfxGeth_mtl_setRxForwardUndersizedGoodPacket(Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId, boolean enabled)
Sets the Receive Forward Undersized Good Packets for the selected RX Queue.
Definition: IfxGeth.c:265
enable
void enable
Definition: IfxCpu_IntrinsicsDcc.h:477
IfxGeth_DmaBurstLength_1
maximum burst length 1
Definition: IfxGeth.h:88
IfxGeth_disableModule
IFX_EXTERN void IfxGeth_disableModule(Ifx_GETH *gethSFR)
Disables the clock for GETH module.
Definition: IfxGeth.c:36
IfxGeth_LineSpeed
IfxGeth_LineSpeed
Ethernet line speed.
Definition: IfxGeth.h:127
IfxGeth_TxDescr::TDES2
IfxGeth_TxDescr2 TDES2
Tx Descriptor DWORD 2.
Definition: IfxGeth.h:676
IfxGeth_RxDescr2_WF_Bits::L3FM
uint32 L3FM
Layer 3 Filter Match.
Definition: IfxGeth.h:403
IfxGeth_DmaInterruptFlag_receiveWatchdogTimeout
Receive Watchdog Timeout.
Definition: IfxGeth.h:116
IfxGeth_QueueSize_1280Bytes
1280Bytes
Definition: IfxGeth.h:182
IfxGeth_dma_clearInterruptFlag
IFX_INLINE void IfxGeth_dma_clearInterruptFlag(Ifx_GETH *gethSFR, IfxGeth_DmaChannel channelId, IfxGeth_DmaInterruptFlag flag)
Returns the status of selected DMA interrupt flag.
Definition: IfxGeth.h:1321
IfxGeth_RxContextDescr2_Bits::reserved_0
uint32 reserved_0
Reserved.
Definition: IfxGeth.h:330
IfxGeth_QueueSize_1792Bytes
1792Bytes
Definition: IfxGeth.h:184
IfxGeth_QueueSize_2048Bytes
2048Bytes
Definition: IfxGeth.h:185
IfxGeth_LineSpeed_100Mbps
100 Mbps
Definition: IfxGeth.h:130
IfxGeth_QueueSize_1536Bytes
1536Bytes
Definition: IfxGeth.h:183
IfxGeth_RxArbitrationAlgorithm
IfxGeth_RxArbitrationAlgorithm
Receive Arbitration Algorithm for Rx Queues Definition in MTL_OPERATION_MODE.B.RAA.
Definition: IfxGeth.h:215
IfxGeth_MtlQueue
IfxGeth_MtlQueue
MTL Queue ID.
Definition: IfxGeth.h:146
IfxGeth_TxMtlQueue_0
Tx Queue 0.
Definition: IfxGeth.h:271
IfxGeth_DmaBurstLength_0
maximum burst length 0
Definition: IfxGeth.h:87
IfxGeth_getSrcPointer
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxGeth_getSrcPointer(Ifx_GETH *gethSFR, IfxGeth_ServiceRequest serviceRequest)
Returns the Src Pointer of the selected GETH service request node.
Definition: IfxGeth.c:60
IfxGeth_RxDescr0_WF_Bits::OVT
uint32 OVT
Outer VLAN Tag.
Definition: IfxGeth.h:354
IfxGeth_RxDescr3_WF_Bits::RE
uint32 RE
Receive Error.
Definition: IfxGeth.h:428
IfxGeth_RxMtlQueue_1
Rx Queue 1.
Definition: IfxGeth.h:236
IfxGeth_TxDescr3_RF_Bits::TPL
uint32 TPL
Reserved or TCP Payload Length.
Definition: IfxGeth.h:534
IfxGeth_TxDescr3_WF_Bits::IHE
uint32 IHE
IP Header Error.
Definition: IfxGeth.h:550
IfxGeth_QueueSize_2304Bytes
2304Bytes
Definition: IfxGeth.h:186
IfxGeth_TxDescr3_WF_Bits::CC
uint32 CC
Collision Count.
Definition: IfxGeth.h:554
IfxGeth_RxDescr0_RF_Bits::BUF1AP
uint32 BUF1AP
Header or Buffer 1 Address Pointer.
Definition: IfxGeth.h:347
IfxGeth_DmaInterruptFlag_transmitInterrupt
Transmit Interrupt.
Definition: IfxGeth.h:110
IfxGeth_RxDescr0::U
uint32 U
Unsigned access.
Definition: IfxGeth.h:583
IfxGeth_TxDescr3_WF_Bits::EC
uint32 EC
Excessive Collision.
Definition: IfxGeth.h:555
IfxGeth_phy_Clause22_readMDIORegister
IFX_EXTERN void IfxGeth_phy_Clause22_readMDIORegister(uint32 layerAddr, uint32 regAddr, uint32 *pData)
Reads a MDIO register of Clause 22 PHY.
Definition: IfxGeth.c:384
IfxGeth_RxContextDescr3_Bits
Bit Fields of RDES3 Context Descriptor.
Definition: IfxGeth.h:335
IfxGeth_RxContextDescr2_Bits
Bit Fields of RDES2 Context Descriptor.
Definition: IfxGeth.h:328
IfxGeth_dma_setRxBufferSize
IFX_INLINE void IfxGeth_dma_setRxBufferSize(Ifx_GETH *gethSFR, IfxGeth_RxDmaChannel channel, uint16 size)
sets the size of the rx buffers in descriptors for selected Rx channel of DMA
Definition: IfxGeth.h:1373
IfxGeth_RxContextDescr0_Bits
Bit Fields of RDES0 Context Descriptor.
Definition: IfxGeth.h:314
IfxGeth_MtlQueue_1
Mtl Queue 1.
Definition: IfxGeth.h:149
IfxGeth_RxDescr0_WF_Bits
Bit Fields of RDES0 in Write back Format.
Definition: IfxGeth.h:352
IfxGeth_RxDescr1_WF_Bits
Bit Fields of RDES1 in Write back Format.
Definition: IfxGeth.h:367
IfxGeth_RxDescr3_WF_Bits::OE
uint32 OE
Overflow Error.
Definition: IfxGeth.h:429
IfxGeth_RxContextDescr3_Bits::CTXT
uint32 CTXT
Receive Context Descriptor.
Definition: IfxGeth.h:339
IfxGeth_RxDescr
Rx Descriptor.
Definition: IfxGeth.h:662
IfxGeth_dma_setFixedBurst
IFX_INLINE void IfxGeth_dma_setFixedBurst(Ifx_GETH *gethSFR, boolean enabled)
Enables/Disables Fixed Burst Length.
Definition: IfxGeth.h:1361
IfxGeth_TxDescr
Tx Descriptor.
Definition: IfxGeth.h:672
IfxGeth_RxContextDescr1_Bits
Bit Fields of RDES1 Context Descriptor.
Definition: IfxGeth.h:321
IfxGeth_getIndex
IFX_EXTERN IfxGeth_Index IfxGeth_getIndex(Ifx_GETH *geth)
API to get the resource index of the GETH specified.
Definition: IfxGeth.c:478
IfxGeth_RxDescr3_WF_Bits
Bit Fields of RDES3 in Write back Format.
Definition: IfxGeth.h:422
IfxGeth_QueueSize
IfxGeth_QueueSize
Tx/RX Queue size in blocks of 256 bytes Definition in MTL_TXQi_OPERATION_MODE.B.TQS and MTL_RXQi_OPER...
Definition: IfxGeth.h:176
IfxGeth_QueueSize_6912Bytes
6912Bytes
Definition: IfxGeth.h:204
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxGeth_ServiceRequest_8
Service Request SR8.
Definition: IfxGeth.h:253
IfxGeth_RxContextDescr3_Bits::DE
uint32 DE
Descriptor Error.
Definition: IfxGeth.h:338
IfxGeth_RxDescr2_WF_Bits
Bit Fields of RDES2 in Write back Format.
Definition: IfxGeth.h:392
IfxGeth_DmaInterruptFlag
IfxGeth_DmaInterruptFlag
DMA interrupt flags.
Definition: IfxGeth.h:108
IfxGeth_RxDescr3_WF_Bits::LD
uint32 LD
Last Descriptor.
Definition: IfxGeth.h:436
IfxGeth_RxMtlQueue
IfxGeth_RxMtlQueue
Rx MTL Queue ID.
Definition: IfxGeth.h:233
IfxGeth_Phy_Clause22_writeMDIORegister
IFX_EXTERN void IfxGeth_Phy_Clause22_writeMDIORegister(uint32 layerAddr, uint32 regAddr, uint32 data)
Writes to a MDIO register of Clause 22 PHY.
Definition: IfxGeth.c:396
IfxGeth_isModuleEnabled
IFX_INLINE boolean IfxGeth_isModuleEnabled(Ifx_GETH *gethSFR)
Returns the status of whether clock for GETH module is enabled or diabled.
Definition: IfxGeth.h:1446
IfxGeth_TxDescr::TDES1
IfxGeth_TxDescr1 TDES1
Tx Descriptor DWORD 1.
Definition: IfxGeth.h:675
IfxGeth_QueueSize_5120Bytes
5120Bytes
Definition: IfxGeth.h:197
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxGeth_TxContextDescr3_Bits::CDE
uint32 CDE
Context Descriptor Error.
Definition: IfxGeth.h:474
IfxGeth_MtlQueue_2
Mtl Queue 2.
Definition: IfxGeth.h:150
IfxGeth_ServiceRequest_4
Service Request SR4.
Definition: IfxGeth.h:249
IfxGeth_dma_setAddressAlignedBeats
IFX_INLINE void IfxGeth_dma_setAddressAlignedBeats(Ifx_GETH *gethSFR, boolean enabled)
Enables/Disables Address aligned beats.
Definition: IfxGeth.h:1355
IfxGeth_DmaInterruptFlag_earlyTransmitInterrupt
Early Transmit Interrupt.
Definition: IfxGeth.h:117
IfxGeth_DmaBurstLength
IfxGeth_DmaBurstLength
Programmable burst length of DMA channels Definition in DMA_CHi_TX_CONTROL.B.PBL and DMA_CHi_RX_CONTR...
Definition: IfxGeth.h:85
IfxGeth_DmaBurstLength_4
maximum burst length 4
Definition: IfxGeth.h:90
IfxGeth_TxDescr3_RF_Bits::TSE
uint32 TSE
TCP Segmentation Enable.
Definition: IfxGeth.h:536
IfxGeth_TxMtlQueue_3
Tx Queue 3.
Definition: IfxGeth.h:274
IfxGeth_RxDescr3_RF_Bits::BUF1V
uint32 BUF1V
Buffer 1 Address Valid.
Definition: IfxGeth.h:413
IfxGeth_TxDescr3_RF_Bits::CPC
uint32 CPC
CRC Pad Control.
Definition: IfxGeth.h:539
IfxGeth_dma_applySoftwareReset
IFX_INLINE void IfxGeth_dma_applySoftwareReset(Ifx_GETH *gethSFR)
Applies a software reset of MAC and DMA controller.
Definition: IfxGeth.h:1309
IfxGeth_QueueSize_4608Bytes
4608Bytes
Definition: IfxGeth.h:195
IfxGeth_RxDescr2_WF_Bits::HL
uint32 HL
L3/L4 Header Length.
Definition: IfxGeth.h:394
IfxGeth_RxDescr::RDES0
IfxGeth_RxDescr0 RDES0
Rx Descriptor DWORD 0.
Definition: IfxGeth.h:664
IfxGeth_TxDescr2_RF_Bits::B1L
uint32 B1L
Header Length or Buffer 1 Length.
Definition: IfxGeth.h:515
IfxGeth_ServiceRequest_5
Service Request SR5.
Definition: IfxGeth.h:250
IfxGeth_RxContextDescr1_Bits::RTSH
uint32 RTSH
Receive Packet Timestamp High.
Definition: IfxGeth.h:323
IfxGeth_TxContextDescr3_Bits::VT
uint32 VT
VLAN Tag.
Definition: IfxGeth.h:469
IfxGeth_TxContextDescr3_Bits::OSTC
uint32 OSTC
One-Step Timestamp Correction Enable.
Definition: IfxGeth.h:477
IfxGeth_dma_setRxDescriptorRingLength
IFX_INLINE void IfxGeth_dma_setRxDescriptorRingLength(Ifx_GETH *gethSFR, IfxGeth_RxDmaChannel channel, uint32 length)
sets the Length of the Rx descriptors ring
Definition: IfxGeth.h:1386
IfxGeth_TxDmaChannel_1
Tx Dma Channel 1.
Definition: IfxGeth.h:262
IfxGeth_TxDescr3_WF_Bits::TTSS
uint32 TTSS
Tx Timestamp Status.
Definition: IfxGeth.h:564
IfxGeth_mac_setAllMulticastPassing
IFX_INLINE void IfxGeth_mac_setAllMulticastPassing(Ifx_GETH *gethSFR, boolean enabled)
Enables / Disables Passing of All Multicast packets.
Definition: IfxGeth.h:1476
IfxGeth_RxDescr0_WF_Bits::IVT
uint32 IVT
Inner VLAN Tag.
Definition: IfxGeth.h:355
IfxGeth_dma_setTxDescriptorListAddress
IFX_INLINE void IfxGeth_dma_setTxDescriptorListAddress(Ifx_GETH *gethSFR, IfxGeth_TxDmaChannel channel, uint32 address)
sets the base address of the first descriptor in the Transmit descriptor list
Definition: IfxGeth.h:1404
IfxGeth_QueueSize_6400Bytes
6400Bytes
Definition: IfxGeth.h:202
IfxGeth_QueueSize_6144Bytes
6144Bytes
Definition: IfxGeth.h:201
IfxGeth_QueueSize_1024Bytes
1024Bytes
Definition: IfxGeth.h:181


iLLD_TC38A: IfxGeth_Eth.c Source File

  • Geth
  • Eth
IfxGeth_Eth.c
Go to the documentation of this file.
1 /**
2 * \file IfxGeth_Eth.c
3 * \brief GETH ETH details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 *
41 */
42
43 /******************************************************************************/
44 /*----------------------------------Includes----------------------------------*/
45 /******************************************************************************/
46
47 #include "IfxGeth_Eth.h"
48
49 /******************************************************************************/
50 /*-----------------------Exported Variables/Constants-------------------------*/
51 /******************************************************************************/
52
53 IfxGeth_RxDescrList IfxGeth_Eth_rxDescrList[IFXGETH_NUM_MODULES][IFXGETH_NUM_RX_CHANNELS];
54
55 IfxGeth_TxDescrList IfxGeth_Eth_txDescrList[IFXGETH_NUM_MODULES][IFXGETH_NUM_TX_CHANNELS];
56
57 /******************************************************************************/
58 /*-------------------------Function Implementations---------------------------*/
59 /******************************************************************************/
60
61 void IfxGeth_Eth_configureDMA(IfxGeth_Eth *geth, IfxGeth_Eth_DmaConfig *dmaConfig)
62 {
63 uint32 txChannelIndex, rxChannelIndex, channelIndex;
64 uint32 numOfChannels = (dmaConfig->numOfTxChannels >= dmaConfig->numOfRxChannels) ? dmaConfig->numOfTxChannels : dmaConfig->numOfRxChannels;
65
66 /* DMA top level configuration */
67 IfxGeth_dma_setAddressAlignedBeats(geth->gethSFR, dmaConfig->addressAlignedBeatsEnabled);
68 IfxGeth_dma_setFixedBurst(geth->gethSFR, dmaConfig->fixedBurstEnabled);
69 IfxGeth_dma_setMixedBurst(geth->gethSFR, dmaConfig->mixedBurstEnabled);
70
71 /* TX Channels(s) configuration */
72 IfxGeth_Eth_stopTransmitters(geth, dmaConfig->numOfTxChannels);
73
74 for (txChannelIndex = 0; txChannelIndex < dmaConfig->numOfTxChannels; txChannelIndex++)
75 {
76 IfxGeth_dma_setTxMaxBurstLength(geth->gethSFR, dmaConfig->txChannel[txChannelIndex].channelId, dmaConfig->txChannel[txChannelIndex].maxBurstLength);
77 IfxGeth_Eth_initTransmitDescriptors(geth, &dmaConfig->txChannel[txChannelIndex]);
78 }
79
80 /* RX Channels(s) configuration */
81 for (rxChannelIndex = 0; rxChannelIndex < dmaConfig->numOfRxChannels; rxChannelIndex++)
82 {
83 IfxGeth_dma_setRxMaxBurstLength(geth->gethSFR, dmaConfig->rxChannel[rxChannelIndex].channelId, dmaConfig->rxChannel[rxChannelIndex].maxBurstLength);
84 IfxGeth_Eth_initReceiveDescriptors(geth, &dmaConfig->rxChannel[rxChannelIndex]);
85 }
86
87 /* initialise the selected interrupts */
88 for (channelIndex = 0; channelIndex < numOfChannels; channelIndex++)
89 {
90 IfxGeth_dma_clearAllInterruptFlags(geth->gethSFR, dmaConfig->txInterrupt[channelIndex].channelId);
91
92 /* Transmit interrupts */
93 if ((dmaConfig->txInterrupt[channelIndex].priority > 0) || (dmaConfig->txInterrupt[channelIndex].provider == IfxSrc_Tos_dma))
94 {
95 IfxGeth_dma_enableInterrupt(geth->gethSFR, dmaConfig->txInterrupt[channelIndex].channelId, IfxGeth_DmaInterruptFlag_transmitInterrupt);
96
97 volatile Ifx_SRC_SRCR *srcSFR;
98 srcSFR = IfxGeth_getSrcPointer(geth->gethSFR, (IfxGeth_ServiceRequest)((uint32)IfxGeth_ServiceRequest_2 + (uint32)dmaConfig->txInterrupt[channelIndex].channelId));
99 IfxSrc_init(srcSFR, dmaConfig->txInterrupt[channelIndex].provider, dmaConfig->txInterrupt[channelIndex].priority);
100 IfxSrc_enable(srcSFR);
101 }
102
103 /* Receive interrupts */
104 if ((dmaConfig->rxInterrupt[channelIndex].priority > 0) || (dmaConfig->rxInterrupt[channelIndex].provider == IfxSrc_Tos_dma))
105 {
106 IfxGeth_dma_enableInterrupt(geth->gethSFR, dmaConfig->rxInterrupt[channelIndex].channelId, IfxGeth_DmaInterruptFlag_receiveInterrupt);
107
108 volatile Ifx_SRC_SRCR *srcSFR;
109 srcSFR = IfxGeth_getSrcPointer(geth->gethSFR, (IfxGeth_ServiceRequest)((uint32)IfxGeth_ServiceRequest_6 + (uint32)dmaConfig->rxInterrupt[channelIndex].channelId));
110 IfxSrc_init(srcSFR, dmaConfig->rxInterrupt[channelIndex].provider, dmaConfig->rxInterrupt[channelIndex].priority);
111 IfxSrc_enable(srcSFR);
112 }
113 }
114 }
115
116
117 void IfxGeth_Eth_configureMTL(IfxGeth_Eth *geth, IfxGeth_Eth_MtlConfig *mtlConfig)
118 {
119 uint32 txQueueIndex, rxQueueIndex, queueIndex;
120 uint32 numOfQueues = (mtlConfig->numOfTxQueues >= mtlConfig->numOfRxQueues) ? mtlConfig->numOfTxQueues : mtlConfig->numOfRxQueues;
121
122 /* clear all flags */
123 for (queueIndex = 0; queueIndex < numOfQueues; queueIndex++)
124 {
125 IfxGeth_mtl_clearAllInterruptFlags(geth->gethSFR, (IfxGeth_MtlQueue)queueIndex);
126 }
127
128 /* TX Queue(s) configuration */
129 if (mtlConfig->numOfTxQueues > 1)
130 {
131 IfxGeth_mtl_setTxSchedulingAlgorithm(geth->gethSFR, mtlConfig->txSchedulingAlgorithm);
132 }
133
134 for (txQueueIndex = 0; txQueueIndex < mtlConfig->numOfTxQueues; txQueueIndex++)
135 {
136 IfxGeth_mtl_setTxQueueSize(geth->gethSFR, (IfxGeth_TxMtlQueue)txQueueIndex, mtlConfig->txQueue[txQueueIndex].txQueueSize);
137 IfxGeth_mtl_setTxStoreAndForward(geth->gethSFR, (IfxGeth_TxMtlQueue)txQueueIndex, mtlConfig->txQueue[txQueueIndex].storeAndForward);
138 IfxGeth_mtl_enableTxQueue(geth->gethSFR, (IfxGeth_TxMtlQueue)txQueueIndex);
139
140 if (mtlConfig->txQueue[txQueueIndex].txQueueUnderflowInterruptEnabled)
141 {
142 IfxGeth_mtl_enableInterrupt(geth->gethSFR, (IfxGeth_MtlQueue)txQueueIndex, IfxGeth_MtlInterruptFlag_txQueueUnderflow);
143 }
144 }
145
146 /* RX Queue(s) configuration */
147 if (mtlConfig->numOfRxQueues > 1)
148 {
149 IfxGeth_mtl_setRxArbitrationAlgorithm(geth->gethSFR, mtlConfig->rxArbitrationAlgorithm);
150 }
151
152 for (rxQueueIndex = 0; rxQueueIndex < mtlConfig->numOfRxQueues; rxQueueIndex++)
153 {
154 IfxGeth_mtl_setRxQueueSize(geth->gethSFR, (IfxGeth_RxMtlQueue)rxQueueIndex, mtlConfig->rxQueue[rxQueueIndex].rxQueueSize);
155 IfxGeth_mtl_setRxStoreAndForward(geth->gethSFR, (IfxGeth_RxMtlQueue)rxQueueIndex, mtlConfig->rxQueue[rxQueueIndex].storeAndForward);
156 IfxGeth_mtl_setRxForwardErrorPacket(geth->gethSFR, (IfxGeth_RxMtlQueue)rxQueueIndex, mtlConfig->rxQueue[rxQueueIndex].forwardErrorPacket);
157 IfxGeth_mtl_setRxForwardUndersizedGoodPacket(geth->gethSFR, (IfxGeth_RxMtlQueue)rxQueueIndex, mtlConfig->rxQueue[rxQueueIndex].forwardUndersizedGoodPacket);
158
159 if (mtlConfig->rxQueue[rxQueueIndex].daBasedDmaChannelEnabled != 0)
160 {
161 IfxGeth_mtl_setRxQueueForDaBasedDmaChannel(geth->gethSFR, (IfxGeth_RxMtlQueue)rxQueueIndex, TRUE);
162 }
163 else
164 {
165 IfxGeth_mtl_setRxQueueDmaChannelMapping(geth->gethSFR, (IfxGeth_RxMtlQueue)rxQueueIndex, mtlConfig->rxQueue[rxQueueIndex].rxDmaChannelMap);
166 }
167
168 IfxGeth_mtl_enableRxQueue(geth->gethSFR, (IfxGeth_RxMtlQueue)rxQueueIndex);
169
170 if (mtlConfig->rxQueue[rxQueueIndex].rxQueueOverflowInterruptEnabled)
171 {
172 IfxGeth_mtl_enableInterrupt(geth->gethSFR, (IfxGeth_MtlQueue)rxQueueIndex, IfxGeth_MtlInterruptFlag_rxQueueOverflow);
173 }
174 }
175
176 if (mtlConfig->interrupt.priority > 0)
177 {
178 volatile Ifx_SRC_SRCR *srcSFR;
179 srcSFR = IfxGeth_getSrcPointer(geth->gethSFR, mtlConfig->interrupt.serviceRequest);
180 IfxSrc_init(srcSFR, mtlConfig->interrupt.provider, mtlConfig->interrupt.priority);
181 IfxSrc_enable(srcSFR);
182 }
183 }
184
185
186 void IfxGeth_Eth_configureMacCore(IfxGeth_Eth *geth, IfxGeth_Eth_MacConfig *macConfig)
187 {
188 /* MAC configuration */
189 IfxGeth_mac_setDuplexMode(geth->gethSFR, macConfig->duplexMode);
190 IfxGeth_mac_setLineSpeed(geth->gethSFR, macConfig->lineSpeed);
191 IfxGeth_mac_setPreambleLength(geth->gethSFR, IfxGeth_PreambleLength_7Bytes);
192
193 IfxGeth_mac_setMaxPacketSize(geth->gethSFR, macConfig->maxPacketSize);
194
195 IfxGeth_mac_setCrcStripping(geth->gethSFR, FALSE, FALSE);
196 IfxGeth_mac_setCrcChecking(geth->gethSFR, FALSE);
197
198 IfxGeth_mac_setLoopbackMode(geth->gethSFR, macConfig->loopbackMode);
199
200 /* packet Filter Configuration */
201 IfxGeth_mac_setPromiscuousMode(geth->gethSFR, FALSE);
202 IfxGeth_mac_setAllMulticastPassing(geth->gethSFR, FALSE);
203
204 /* set MAC Address */
205 IfxGeth_mac_setMacAddress(geth->gethSFR, macConfig->macAddress);
206 }
207
208
209 void IfxGeth_Eth_freeReceiveBuffer(IfxGeth_Eth *geth, IfxGeth_RxDmaChannel channelId)
210 {
211 volatile IfxGeth_RxDescr *descr = IfxGeth_Eth_getActualRxDescriptor(geth, channelId);
212
213 IfxGeth_RxDescr3 rdes3;
214 rdes3.U = 0;
215 rdes3.R.BUF1V = 1; /* buffer 1 valid */
216 rdes3.R.BUF2V = 0; /* buffer 2 not valid */
217 rdes3.R.IOC = 1; /* interrupt enabled */
218 rdes3.R.OWN = 1; /* owned by DMA */
219 descr->RDES3.U = rdes3.U;
220 IfxGeth_Eth_shuffleRxDescriptor(geth, channelId);
221 }
222
223
224 void *IfxGeth_Eth_getReceiveBuffer(IfxGeth_Eth *geth, IfxGeth_RxDmaChannel channelId)
225 {
226 void *result = 0;
227 volatile IfxGeth_RxDescr *descr;
228
229 if (IfxGeth_Eth_isRxDataAvailable(geth, channelId))
230 {
231 geth->rxChannel[channelId].rxCount++;
232 descr = IfxGeth_Eth_getActualRxDescriptor(geth, channelId);
233 result = (void *)(descr->RDES0.U);
234 }
235
236 IfxGeth_Eth_wakeupReceiver(geth, channelId);
237
238 return result;
239 }
240
241
242 void *IfxGeth_Eth_getTransmitBuffer(IfxGeth_Eth *geth, IfxGeth_TxDmaChannel channelId)
243 {
244 void *buffer = NULL_PTR;
245 volatile IfxGeth_TxDescr *descr = IfxGeth_Eth_getActualTxDescriptor(geth, channelId);
246
247 // check descriptor / buffer is free.
248 if (descr->TDES3.R.OWN == 0)
249 {
250 buffer = ((void *)descr->TDES0.U);
251 }
252
253 return buffer;
254 }
255
256
257 void IfxGeth_Eth_initModule(IfxGeth_Eth *geth, IfxGeth_Eth_Config *config)
258 {
259 Ifx_GETH *gethSFR = config->gethSFR;
260 geth->gethSFR = gethSFR;
261
262 /* Enable Module */
263 IfxGeth_enableModule(gethSFR);
264
265 /* Set up the pins */
266 if (config->phyInterfaceMode == IfxGeth_PhyInterfaceMode_rmii)
267 {
268 if (config->pins.rmiiPins != NULL_PTR)
269 {
270 IfxGeth_Eth_setupRmiiOutputPins(geth, config->pins.rmiiPins);
271 IfxGeth_Eth_setupRmiiInputPins(geth, config->pins.rmiiPins);
272 }
273 }
274 else if (config->phyInterfaceMode == IfxGeth_PhyInterfaceMode_rgmii)
275 {
276 if (config->pins.rgmiiPins != NULL_PTR)
277 {
278 IfxGeth_Eth_setupRgmiiOutputPins(geth, config->pins.rgmiiPins);
279 IfxGeth_Eth_setupRgmiiInputPins(geth, config->pins.rgmiiPins);
280 }
281 }
282 else
283 {
284 if (config->pins.miiPins != NULL_PTR)
285 {
286 IfxGeth_Eth_setupMiiOutputPins(geth, config->pins.miiPins);
287 IfxGeth_Eth_setupMiiInputPins(geth, config->pins.miiPins);
288 }
289 }
290
291 /* reset the Module */
292 IfxGeth_resetModule(gethSFR);
293 /* select the Phy Interface Mode */
294 IfxGeth_setPhyInterfaceMode(gethSFR, config->phyInterfaceMode);
295 IfxGeth_dma_applySoftwareReset(gethSFR);
296
297 /* wait until reset is finished or timeout. */
298 {
299 uint32 timeout = 0;
300
301 while ((IfxGeth_dma_isSoftwareResetDone(gethSFR) == 0) && (timeout < IFXGETH_MAX_TIMEOUT_VALUE))
302 {
303 timeout++;
304 }
305 }
306
307 /* Configure MAC Core */
308 IfxGeth_Eth_configureMacCore(geth, &config->mac);
309
310 /* Configure MTL */
311 IfxGeth_Eth_configureMTL(geth, &config->mtl);
312
313 /* Configure DMA */
314 IfxGeth_Eth_configureDMA(geth, &config->dma);
315 }
316
317
318 void IfxGeth_Eth_initModuleConfig(IfxGeth_Eth_Config *config, Ifx_GETH *gethSFR)
319 {
320 IfxGeth_Index gethIndex;
321 gethIndex = IfxGeth_getIndex(gethSFR);
322 const IfxGeth_Eth_Config defaultConfig = {
323 .gethSFR = NULL_PTR,
324 .phyInterfaceMode = IfxGeth_PhyInterfaceMode_rmii,
325 .pins = {
326 .rmiiPins = NULL_PTR,
327 .rgmiiPins = NULL_PTR,
328 .miiPins = NULL_PTR,
329 },
330 .mac = {
331 .duplexMode = IfxGeth_DuplexMode_fullDuplex,
332 .lineSpeed = IfxGeth_LineSpeed_100Mbps,
333 .loopbackMode = IfxGeth_LoopbackMode_disable,
334 .maxPacketSize = 1518,
335 .macAddress = {0},
336 },
337 .mtl = {
338 .numOfTxQueues = 1,
339 .txSchedulingAlgorithm = IfxGeth_TxSchedulingAlgorithm_wrr,
340 .numOfRxQueues = 1,
341 .rxArbitrationAlgorithm = IfxGeth_RxArbitrationAlgorithm_sp,
342
343 .txQueue = {
344 {
345 .storeAndForward = FALSE,
346 .txQueueSize = IfxGeth_QueueSize_256Bytes,
347 .txQueueUnderflowInterruptEnabled = FALSE,
348 },
349
350 {
351 .storeAndForward = FALSE,
352 .txQueueSize = IfxGeth_QueueSize_256Bytes,
353 .txQueueUnderflowInterruptEnabled = FALSE,
354 },
355
356 {
357 .storeAndForward = FALSE,
358 .txQueueSize = IfxGeth_QueueSize_256Bytes,
359 .txQueueUnderflowInterruptEnabled = FALSE,
360 },
361
362 {
363 .storeAndForward = FALSE,
364 .txQueueSize = IfxGeth_QueueSize_256Bytes,
365 .txQueueUnderflowInterruptEnabled = FALSE,
366 },
367 },
368
369 .rxQueue = {
370 {
371 .storeAndForward = FALSE,
372 .rxQueueSize = IfxGeth_QueueSize_256Bytes,
373 .forwardErrorPacket = FALSE,
374 .forwardUndersizedGoodPacket = FALSE,
375 .daBasedDmaChannelEnabled = FALSE,
376 .rxDmaChannelMap = IfxGeth_RxDmaChannel_0,
377 .rxQueueOverflowInterruptEnabled = FALSE,
378 },
379
380 {
381 .storeAndForward = FALSE,
382 .rxQueueSize = IfxGeth_QueueSize_256Bytes,
383 .forwardErrorPacket = FALSE,
384 .forwardUndersizedGoodPacket = FALSE,
385 .daBasedDmaChannelEnabled = FALSE,
386 .rxDmaChannelMap = IfxGeth_RxDmaChannel_1,
387 .rxQueueOverflowInterruptEnabled = FALSE,
388 },
389
390 {
391 .storeAndForward = FALSE,
392 .rxQueueSize = IfxGeth_QueueSize_256Bytes,
393 .forwardErrorPacket = FALSE,
394 .forwardUndersizedGoodPacket = FALSE,
395 .daBasedDmaChannelEnabled = FALSE,
396 .rxDmaChannelMap = IfxGeth_RxDmaChannel_2,
397 .rxQueueOverflowInterruptEnabled = FALSE,
398 },
399
400 {
401 .storeAndForward = FALSE,
402 .rxQueueSize = IfxGeth_QueueSize_256Bytes,
403 .forwardErrorPacket = FALSE,
404 .forwardUndersizedGoodPacket = FALSE,
405 .daBasedDmaChannelEnabled = FALSE,
406 .rxDmaChannelMap = IfxGeth_RxDmaChannel_3,
407 .rxQueueOverflowInterruptEnabled = FALSE,
408 },
409 },
410 .interrupt = {
411 .serviceRequest = IfxGeth_ServiceRequest_1,
412 .priority = 0,
413 .provider = IfxSrc_Tos_cpu0
414 }
415 },
416 .dma = {
417 .numOfTxChannels = 1,
418 .numOfRxChannels = 1,
419 .addressAlignedBeatsEnabled = FALSE,
420 .fixedBurstEnabled = FALSE,
421 .mixedBurstEnabled = FALSE,
422 .txChannel = {
423 {
424 .channelId = IfxGeth_TxDmaChannel_0,
425 .maxBurstLength = IfxGeth_DmaBurstLength_0,
426 .txDescrList = &IfxGeth_Eth_txDescrList[gethIndex][0],
427 .txBuffer1StartAddress = NULL_PTR,
428 .txBuffer1Size = 256,
429 },
430
431 {
432 .channelId = IfxGeth_TxDmaChannel_1,
433 .maxBurstLength = IfxGeth_DmaBurstLength_0,
434 .txDescrList = &IfxGeth_Eth_txDescrList[gethIndex][1],
435 .txBuffer1StartAddress = NULL_PTR,
436 .txBuffer1Size = 256,
437 },
438
439 {
440 .channelId = IfxGeth_TxDmaChannel_2,
441 .maxBurstLength = IfxGeth_DmaBurstLength_0,
442 .txDescrList = &IfxGeth_Eth_txDescrList[gethIndex][2],
443 .txBuffer1StartAddress = NULL_PTR,
444 .txBuffer1Size = 256,
445 },
446
447 {
448 .channelId = IfxGeth_TxDmaChannel_3,
449 .maxBurstLength = IfxGeth_DmaBurstLength_0,
450 .txDescrList = &IfxGeth_Eth_txDescrList[gethIndex][3],
451 .txBuffer1StartAddress = NULL_PTR,
452 .txBuffer1Size = 256,
453 },
454 },
455
456 .rxChannel = {
457 {
458 .channelId = IfxGeth_RxDmaChannel_0,
459 .maxBurstLength = IfxGeth_DmaBurstLength_0,
460 .rxDescrList = &IfxGeth_Eth_rxDescrList[gethIndex][0],
461 .rxBuffer1StartAddress = NULL_PTR,
462 .rxBuffer1Size = 256,
463 },
464
465 {
466 .channelId = IfxGeth_RxDmaChannel_1,
467 .maxBurstLength = IfxGeth_DmaBurstLength_0,
468 .rxDescrList = &IfxGeth_Eth_rxDescrList[gethIndex][1],
469 .rxBuffer1StartAddress = NULL_PTR,
470 .rxBuffer1Size = 256,
471 },
472
473 {
474 .channelId = IfxGeth_RxDmaChannel_2,
475 .maxBurstLength = IfxGeth_DmaBurstLength_0,
476 .rxDescrList = &IfxGeth_Eth_rxDescrList[gethIndex][2],
477 .rxBuffer1StartAddress = NULL_PTR,
478 .rxBuffer1Size = 256,
479 },
480
481 {
482 .channelId = IfxGeth_RxDmaChannel_3,
483 .maxBurstLength = IfxGeth_DmaBurstLength_0,
484 .rxDescrList = &IfxGeth_Eth_rxDescrList[gethIndex][3],
485 .rxBuffer1StartAddress = NULL_PTR,
486 .rxBuffer1Size = 256,
487 },
488 },
489
490 .txInterrupt = {
491 {
492 .channelId = IfxGeth_DmaChannel_0,
493 .priority = 0,
494 .provider = IfxSrc_Tos_cpu0,
495 },
496
497 {
498 .channelId = IfxGeth_DmaChannel_1,
499 .priority = 0,
500 .provider = IfxSrc_Tos_cpu0,
501 },
502
503 {
504 .channelId = IfxGeth_DmaChannel_2,
505 .priority = 0,
506 .provider = IfxSrc_Tos_cpu0,
507 },
508
509 {
510 .channelId = IfxGeth_DmaChannel_3,
511 .priority = 0,
512 .provider = IfxSrc_Tos_cpu0,
513 },
514 },
515
516 .rxInterrupt = {
517 {
518 .channelId = IfxGeth_DmaChannel_0,
519 .priority = 0,
520 .provider = IfxSrc_Tos_cpu0,
521 },
522
523 {
524 .channelId = IfxGeth_DmaChannel_1,
525 .priority = 0,
526 .provider = IfxSrc_Tos_cpu0,
527 },
528
529 {
530 .channelId = IfxGeth_DmaChannel_2,
531 .priority = 0,
532 .provider = IfxSrc_Tos_cpu0,
533 },
534
535 {
536 .channelId = IfxGeth_DmaChannel_3,
537 .priority = 0,
538 .provider = IfxSrc_Tos_cpu0,
539 },
540 },
541 }
542 };
543
544 /* Default Configuration */
545 *config = defaultConfig;
546
547 /* take over module pointer */
548 config->gethSFR = gethSFR;
549 }
550
551
552 void IfxGeth_Eth_initReceiveDescriptors(IfxGeth_Eth *geth, IfxGeth_Eth_RxChannelConfig *config)
553 {
554 int i;
555 uint32 buffer1StartAddress = (uint32)config->rxBuffer1StartAddress;
556
557 IfxGeth_RxDmaChannel channelId = config->channelId;
558 geth->rxChannel[channelId].channelId = channelId;
559 geth->rxChannel[channelId].rxDescrList = config->rxDescrList;
560
561 volatile IfxGeth_RxDescr *descr = IfxGeth_Eth_getBaseRxDescriptor(geth, channelId);
562
563 geth->rxChannel[channelId].rxDescrPtr = descr;
564
565 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (config->rxBuffer1Size) % 4 == 0);
566
567 /* Initialize descriptors in ring mode */
568 for (i = 0; i < IFXGETH_MAX_RX_DESCRIPTORS; i++)
569 {
570 descr->RDES0.U = (uint32)(config->rxBuffer1Size * i) + buffer1StartAddress;
571 descr->RDES2.U = 0; /* buffer2 not used */
572
573 descr->RDES3.R.BUF1V = 1; /* buffer 1 valid */
574 descr->RDES3.R.BUF2V = 0; /* buffer 2 not valid */
575 descr->RDES3.R.IOC = 1; /* interrupt enabled */
576 descr->RDES3.R.OWN = 1; /* owned by DMA */
577
578 descr = &descr[1];
579 }
580
581 /* rest the current pointer to base pointer in the handle */
582 geth->rxChannel[channelId].rxDescrPtr = IfxGeth_Eth_getBaseRxDescriptor(geth, channelId);
583
584 /* set the buffer size */
585 IfxGeth_dma_setRxBufferSize(geth->gethSFR, channelId, config->rxBuffer1Size);
586
587 IfxGeth_dma_setRxDescriptorListAddress(geth->gethSFR, channelId, (uint32)IfxGeth_Eth_getBaseRxDescriptor(geth, channelId));
588 IfxGeth_dma_setRxDescriptorTailPointer(geth->gethSFR, channelId, (uint32)descr);
589 IfxGeth_dma_setRxDescriptorRingLength(geth->gethSFR, channelId, (IFXGETH_MAX_RX_DESCRIPTORS - 1));
590 }
591
592
593 void IfxGeth_Eth_initTransmitDescriptors(IfxGeth_Eth *geth, IfxGeth_Eth_TxChannelConfig *config)
594 {
595 int i;
596 uint32 buffer1StartAddress = (uint32)config->txBuffer1StartAddress;
597
598 IfxGeth_TxDmaChannel channelId = config->channelId;
599 geth->txChannel[channelId].channelId = channelId;
600 geth->txChannel[channelId].txDescrList = config->txDescrList;
601 geth->txChannel[channelId].txBuf1Size = (uint16)config->txBuffer1Size;
602
603 volatile IfxGeth_TxDescr *descr = IfxGeth_Eth_getBaseTxDescriptor(geth, channelId);
604
605 geth->txChannel[channelId].txDescrPtr = descr;
606
607 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (config->txBuffer1Size) % 4 == 0);
608
609 /* Initialize descriptors in ring mode */
610 for (i = 0; i < IFXGETH_MAX_TX_DESCRIPTORS; i++)
611 {
612 descr->TDES0.U = (uint32)(config->txBuffer1Size * i) + buffer1StartAddress;
613 descr->TDES1.U = 0; /* buffer2 not used */
614
615 descr->TDES2.R.B1L = config->txBuffer1Size;
616 descr->TDES2.R.VTIR = 0; /* do not use VLAN tag */
617 descr->TDES2.R.B2L = 0; /* buffer2 not used */
618 descr->TDES2.R.TTSE_TMWD = 0; /* timestamp not used */
619 descr->TDES2.R.IOC = 0; /* interrupt disabled */
620
621 /* TDES3 will be configured while trasmitting each packet */
622
623 descr = &descr[1];
624 }
625
626 /* rest the current pointer to base pointer in the handle */
627 geth->txChannel[channelId].txDescrPtr = IfxGeth_Eth_getBaseTxDescriptor(geth, channelId);
628
629 IfxGeth_dma_setTxDescriptorListAddress(geth->gethSFR, channelId, (uint32)IfxGeth_Eth_getBaseTxDescriptor(geth, channelId));
630 IfxGeth_dma_setTxDescriptorRingLength(geth->gethSFR, channelId, (IFXGETH_MAX_TX_DESCRIPTORS - 1));
631 }
632
633
634 void IfxGeth_Eth_sendFrame(IfxGeth_Eth *geth, IfxGeth_Eth_FrameConfig *config)
635 {
636 IfxGeth_Eth_sendTransmitBuffer(geth, config->packetLength, config->channelId);
637 }
638
639
640 void IfxGeth_Eth_sendTransmitBuffer(IfxGeth_Eth *geth, uint32 packetLength, IfxGeth_TxDmaChannel channelId)
641 {
642 uint32 i;
643 volatile IfxGeth_TxDescr *firstDescr = IfxGeth_Eth_getActualTxDescriptor(geth, channelId);
644 volatile IfxGeth_TxDescr *descr = firstDescr;
645 volatile IfxGeth_TxDescr *nextDescr = &firstDescr[1];
646 uint32 bufferLength = geth->txChannel[channelId].txBuf1Size; /* get the configured buffer length */
647 /* calculate the number of descriptors needed for the frame based on buffer length */
648 uint32 numOfDescriptors = packetLength / bufferLength;
649
650 if (packetLength % bufferLength)
651 {
652 numOfDescriptors += 1;
653 }
654
655 /* configure the first descriptor */
656 firstDescr->TDES3.R.FL_TPL = packetLength; /* total length of the packet */
657 firstDescr->TDES3.R.TSE = 0; /* TCP Segmentation Disable */
658 firstDescr->TDES3.R.CIC_TPL = 3;
659 firstDescr->TDES3.R.SAIC = 0; /* Source Address insertion disabled */
660 firstDescr->TDES3.R.CPC = 0; /* CRC and PAD insertion enabled */
661
662 /* configure every other descriptor including first descriptor for the frame transmission */
663 for (i = 0; i < numOfDescriptors; i++)
664 {
665 if (i == (numOfDescriptors - 1))
666 {
667 descr->TDES3.R.LD = 1; /* last descriptor of the frame */
668 descr->TDES2.R.IOC = 1; /* last descriptor of the frame set IOC */
669 descr->TDES3.R.FD = 0;
670 descr->TDES2.R.B1L = packetLength;
671 }
672 else
673 {
674 descr->TDES3.R.LD = 0;
675 descr->TDES3.R.FD = 0;
676 descr->TDES2.R.IOC = 0; /* Clear the IOC bits for intermeditate buffers */
677 descr->TDES2.R.B1L = geth->txChannel[channelId].txBuf1Size;
678 packetLength -= bufferLength;
679 }
680
681 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, descr->TDES3.R.OWN != 1U); /* Assert if buffers are not available for transfer */
682 descr->TDES3.R.OWN = 1U; /* release to DMA */
683 IfxGeth_Eth_shuffleTxDescriptor(geth, channelId);
684 descr = IfxGeth_Eth_getActualTxDescriptor(geth, channelId); /* update the descr pointer */
685 nextDescr = descr;
686 }
687
688 firstDescr->TDES3.R.FD = 1; /* first descriptor of the frame */
689 geth->txChannel[channelId].txDescrPtr = firstDescr; /* point to first descriptor to initiate the transfer */
690 IfxGeth_dma_setTxDescriptorTailPointer(geth->gethSFR, channelId, (uint32)nextDescr);
691 IfxGeth_Eth_wakeupTransmitter(geth, channelId); /* initialte the transfer */
692 geth->txChannel[channelId].txDescrPtr = nextDescr; /* update the handle pointer to next descriptor */
693
694 geth->txChannel[channelId].txCount++;
695 }
696
697
698 void IfxGeth_Eth_setupMiiInputPins(IfxGeth_Eth *geth, const IfxGeth_Eth_MiiPins *miiPins)
699 {
700 IfxPort_InputMode mode = IfxPort_InputMode_noPullDevice;
701 IfxPort_PadDriver speedGrade = IfxPort_PadDriver_cmosAutomotiveSpeed1;
702
703 if (miiPins->crs != NULL_PTR)
704 {
705 IfxGeth_Crs_In *crs = miiPins->crs;
706 geth->gethSFR->GPCTL.B.ALTI2 = crs->select;
707 IfxPort_setPinControllerSelection(crs->pin.port, crs->pin.pinIndex);
708 IfxPort_setPinModeInput(crs->pin.port, crs->pin.pinIndex, mode);
709 IfxPort_setPinPadDriver(crs->pin.port, crs->pin.pinIndex, speedGrade);
710 }
711 else
712 {
713 /* Mii lite mode */
714 geth->gethSFR->GPCTL.B.ALTI2 = Ifx_RxSel_d;
715 }
716
717 if (miiPins->col != NULL_PTR)
718 {
719 IfxGeth_Col_In *col = miiPins->col;
720 geth->gethSFR->GPCTL.B.ALTI3 = col->select;
721 IfxPort_setPinControllerSelection(col->pin.port, col->pin.pinIndex);
722 IfxPort_setPinModeInput(col->pin.port, col->pin.pinIndex, mode);
723 IfxPort_setPinPadDriver(col->pin.port, col->pin.pinIndex, speedGrade);
724 }
725 else
726 {
727 /* Mii lite mode */
728 geth->gethSFR->GPCTL.B.ALTI3 = Ifx_RxSel_d;
729 }
730
731 IfxGeth_Txclk_In *txClk = miiPins->txClk;
732 geth->gethSFR->GPCTL.B.ALTI10 = txClk->select;
733 IfxPort_setPinControllerSelection(txClk->pin.port, txClk->pin.pinIndex);
734 IfxPort_setPinModeInput(txClk->pin.port, txClk->pin.pinIndex, mode);
735 IfxPort_setPinPadDriver(txClk->pin.port, txClk->pin.pinIndex, speedGrade);
736
737 IfxGeth_Rxclk_In *rxClk = miiPins->rxClk;
738 geth->gethSFR->GPCTL.B.ALTI1 = rxClk->select;
739 IfxPort_setPinControllerSelection(rxClk->pin.port, rxClk->pin.pinIndex);
740 IfxPort_setPinModeInput(rxClk->pin.port, rxClk->pin.pinIndex, mode);
741 IfxPort_setPinPadDriver(rxClk->pin.port, rxClk->pin.pinIndex, speedGrade);
742
743 IfxGeth_Rxdv_In *rxDv = miiPins->rxDv;
744 geth->gethSFR->GPCTL.B.ALTI4 = rxDv->select;
745 IfxPort_setPinControllerSelection(rxDv->pin.port, rxDv->pin.pinIndex);
746 IfxPort_setPinModeInput(rxDv->pin.port, rxDv->pin.pinIndex, mode);
747 IfxPort_setPinPadDriver(rxDv->pin.port, rxDv->pin.pinIndex, speedGrade);
748
749 if (miiPins->rxEr != NULL_PTR)
750 {
751 IfxGeth_Rxer_In *rxEr = miiPins->rxEr;
752 geth->gethSFR->GPCTL.B.ALTI5 = rxEr->select;
753 IfxPort_setPinControllerSelection(rxEr->pin.port, rxEr->pin.pinIndex);
754 IfxPort_setPinModeInput(rxEr->pin.port, rxEr->pin.pinIndex, mode);
755 IfxPort_setPinPadDriver(rxEr->pin.port, rxEr->pin.pinIndex, speedGrade);
756 }
757 else
758 {
759 /* Mii lite mode */
760 geth->gethSFR->GPCTL.B.ALTI5 = Ifx_RxSel_d;
761 }
762
763 IfxGeth_Rxd_In *rxd0 = miiPins->rxd0;
764 geth->gethSFR->GPCTL.B.ALTI6 = rxd0->select;
765 IfxPort_setPinControllerSelection(rxd0->pin.port, rxd0->pin.pinIndex);
766 IfxPort_setPinModeInput(rxd0->pin.port, rxd0->pin.pinIndex, mode);
767 IfxPort_setPinPadDriver(rxd0->pin.port, rxd0->pin.pinIndex, speedGrade);
768
769 IfxGeth_Rxd_In *rxd1 = miiPins->rxd1;
770 geth->gethSFR->GPCTL.B.ALTI7 = rxd1->select;
771 IfxPort_setPinControllerSelection(rxd1->pin.port, rxd1->pin.pinIndex);
772 IfxPort_setPinModeInput(rxd1->pin.port, rxd1->pin.pinIndex, mode);
773 IfxPort_setPinPadDriver(rxd1->pin.port, rxd1->pin.pinIndex, speedGrade);
774
775 IfxGeth_Rxd_In *rxd2 = miiPins->rxd2;
776 geth->gethSFR->GPCTL.B.ALTI8 = rxd2->select;
777 IfxPort_setPinControllerSelection(rxd2->pin.port, rxd2->pin.pinIndex);
778 IfxPort_setPinModeInput(rxd2->pin.port, rxd2->pin.pinIndex, mode);
779 IfxPort_setPinPadDriver(rxd2->pin.port, rxd2->pin.pinIndex, speedGrade);
780
781 IfxGeth_Rxd_In *rxd3 = miiPins->rxd3;
782 geth->gethSFR->GPCTL.B.ALTI9 = rxd3->select;
783 IfxPort_setPinControllerSelection(rxd3->pin.port, rxd3->pin.pinIndex);
784 IfxPort_setPinModeInput(rxd3->pin.port, rxd3->pin.pinIndex, mode);
785 IfxPort_setPinPadDriver(rxd3->pin.port, rxd3->pin.pinIndex, speedGrade);
786
787 IfxGeth_Mdio_InOut *mdio = miiPins->mdio;
788 geth->gethSFR->GPCTL.B.ALTI0 = mdio->inSelect;
789 }
790
791
792 void IfxGeth_Eth_setupMiiOutputPins(IfxGeth_Eth *geth, const IfxGeth_Eth_MiiPins *miiPins)
793 {
794 IFX_UNUSED_PARAMETER(geth);
795 IfxPort_OutputMode mode = IfxPort_OutputMode_pushPull;
796 IfxPort_PadDriver speedGrade = IfxPort_PadDriver_cmosAutomotiveSpeed1;
797
798 IfxGeth_Txen_Out *txEn = miiPins->txEn;
799 IfxPort_setPinControllerSelection(txEn->pin.port, txEn->pin.pinIndex);
800 IfxPort_setPinModeOutput(txEn->pin.port, txEn->pin.pinIndex, mode, txEn->select);
801 IfxPort_setPinPadDriver(txEn->pin.port, txEn->pin.pinIndex, speedGrade);
802
803 /* Check for Mii Lite mode */
804 if (miiPins->txEr != NULL_PTR)
805 {
806 IfxGeth_Txer_Out *txEr = miiPins->txEr;
807 IfxPort_setPinControllerSelection(txEr->pin.port, txEr->pin.pinIndex);
808 IfxPort_setPinModeOutput(txEr->pin.port, txEr->pin.pinIndex, mode, txEr->select);
809 IfxPort_setPinPadDriver(txEr->pin.port, txEr->pin.pinIndex, speedGrade);
810 }
811
812 IfxGeth_Txd_Out *txd0 = miiPins->txd0;
813 IfxPort_setPinControllerSelection(txd0->pin.port, txd0->pin.pinIndex);
814 IfxPort_setPinModeOutput(txd0->pin.port, txd0->pin.pinIndex, mode, txd0->select);
815 IfxPort_setPinPadDriver(txd0->pin.port, txd0->pin.pinIndex, speedGrade);
816
817 IfxGeth_Txd_Out *txd1 = miiPins->txd1;
818 IfxPort_setPinControllerSelection(txd1->pin.port, txd1->pin.pinIndex);
819 IfxPort_setPinModeOutput(txd1->pin.port, txd1->pin.pinIndex, mode, txd1->select);
820 IfxPort_setPinPadDriver(txd1->pin.port, txd1->pin.pinIndex, speedGrade);
821
822 IfxGeth_Txd_Out *txd2 = miiPins->txd2;
823 IfxPort_setPinControllerSelection(txd2->pin.port, txd2->pin.pinIndex);
824 IfxPort_setPinModeOutput(txd2->pin.port, txd2->pin.pinIndex, mode, txd2->select);
825 IfxPort_setPinPadDriver(txd2->pin.port, txd2->pin.pinIndex, speedGrade);
826
827 IfxGeth_Txd_Out *txd3 = miiPins->txd3;
828 IfxPort_setPinControllerSelection(txd3->pin.port, txd3->pin.pinIndex);
829 IfxPort_setPinModeOutput(txd3->pin.port, txd3->pin.pinIndex, mode, txd3->select);
830 IfxPort_setPinPadDriver(txd3->pin.port, txd3->pin.pinIndex, speedGrade);
831
832 IfxGeth_Mdc_Out *mdc = miiPins->mdc;
833 IfxPort_setPinControllerSelection(mdc->pin.port, mdc->pin.pinIndex);
834 IfxPort_setPinModeOutput(mdc->pin.port, mdc->pin.pinIndex, mode, mdc->select);
835 IfxPort_setPinPadDriver(mdc->pin.port, mdc->pin.pinIndex, speedGrade);
836 }
837
838
839 void IfxGeth_Eth_setupRgmiiInputPins(IfxGeth_Eth *geth, const IfxGeth_Eth_RgmiiPins *rgmiiPins)
840 {
841 IfxPort_InputMode mode = IfxPort_InputMode_noPullDevice;
842 IfxPort_PadDriver speedGrade = IfxPort_PadDriver_cmosAutomotiveSpeed4;
843
844 IfxGeth_Rxclk_In *rxClk = rgmiiPins->rxClk;
845 IfxGeth_Rxctl_In *rxCtl = rgmiiPins->rxCtl;
846 IfxGeth_Rxd_In *rxd0 = rgmiiPins->rxd0;
847 IfxGeth_Rxd_In *rxd1 = rgmiiPins->rxd1;
848 IfxGeth_Rxd_In *rxd2 = rgmiiPins->rxd2;
849 IfxGeth_Rxd_In *rxd3 = rgmiiPins->rxd3;
850 IfxGeth_Grefclk_In *grefClk = rgmiiPins->grefClk;
851 IfxGeth_Mdio_InOut *mdio = rgmiiPins->mdio;
852
853 geth->gethSFR->GPCTL.B.ALTI0 = mdio->inSelect;
854 geth->gethSFR->GPCTL.B.ALTI1 = rxClk->select;
855 geth->gethSFR->GPCTL.B.ALTI4 = rxCtl->select;
856 geth->gethSFR->GPCTL.B.ALTI6 = rxd0->select;
857 geth->gethSFR->GPCTL.B.ALTI7 = rxd1->select;
858 geth->gethSFR->GPCTL.B.ALTI8 = rxd2->select;
859 geth->gethSFR->GPCTL.B.ALTI9 = rxd3->select;
860
861 IfxPort_setPinControllerSelection(rxClk->pin.port, rxClk->pin.pinIndex);
862 IfxPort_setPinControllerSelection(rxCtl->pin.port, rxCtl->pin.pinIndex);
863 IfxPort_setPinControllerSelection(rxd0->pin.port, rxd0->pin.pinIndex);
864 IfxPort_setPinControllerSelection(rxd1->pin.port, rxd1->pin.pinIndex);
865 IfxPort_setPinControllerSelection(rxd2->pin.port, rxd2->pin.pinIndex);
866 IfxPort_setPinControllerSelection(rxd3->pin.port, rxd3->pin.pinIndex);
867 IfxPort_setPinControllerSelection(grefClk->pin.port, grefClk->pin.pinIndex);
868
869 IfxPort_setPinModeInput(rxClk->pin.port, rxClk->pin.pinIndex, mode);
870 IfxPort_setPinModeInput(rxCtl->pin.port, rxCtl->pin.pinIndex, mode);
871 IfxPort_setPinModeInput(rxd0->pin.port, rxd0->pin.pinIndex, mode);
872 IfxPort_setPinModeInput(rxd1->pin.port, rxd1->pin.pinIndex, mode);
873 IfxPort_setPinModeInput(rxd2->pin.port, rxd2->pin.pinIndex, mode);
874 IfxPort_setPinModeInput(rxd3->pin.port, rxd3->pin.pinIndex, mode);
875 IfxPort_setPinModeInput(grefClk->pin.port, grefClk->pin.pinIndex, mode);
876
877 IfxPort_setPinPadDriver(rxClk->pin.port, rxClk->pin.pinIndex, speedGrade);
878 IfxPort_setPinPadDriver(rxCtl->pin.port, rxCtl->pin.pinIndex, speedGrade);
879 IfxPort_setPinPadDriver(rxd0->pin.port, rxd0->pin.pinIndex, speedGrade);
880 IfxPort_setPinPadDriver(rxd1->pin.port, rxd1->pin.pinIndex, speedGrade);
881 IfxPort_setPinPadDriver(rxd2->pin.port, rxd2->pin.pinIndex, speedGrade);
882 IfxPort_setPinPadDriver(rxd3->pin.port, rxd3->pin.pinIndex, speedGrade);
883 IfxPort_setPinPadDriver(grefClk->pin.port, grefClk->pin.pinIndex, speedGrade);
884 }
885
886
887 void IfxGeth_Eth_setupRgmiiOutputPins(IfxGeth_Eth *geth, const IfxGeth_Eth_RgmiiPins *rgmiiPins)
888 {
889 IFX_UNUSED_PARAMETER(geth);
890 IfxPort_OutputMode mode = IfxPort_OutputMode_pushPull;
891 IfxPort_PadDriver speedGrade = IfxPort_PadDriver_cmosAutomotiveSpeed4;
892
893 IfxGeth_Txclk_Out *txClk = rgmiiPins->txClk;
894 IfxGeth_Txctl_Out *txCtl = rgmiiPins->txCtl;
895 IfxGeth_Txd_Out *txd0 = rgmiiPins->txd0;
896 IfxGeth_Txd_Out *txd1 = rgmiiPins->txd1;
897 IfxGeth_Txd_Out *txd2 = rgmiiPins->txd2;
898 IfxGeth_Txd_Out *txd3 = rgmiiPins->txd3;
899 IfxGeth_Mdc_Out *mdc = rgmiiPins->mdc;
900 IfxGeth_Mdio_InOut *mdio = rgmiiPins->mdio;
901
902 IfxPort_setPinControllerSelection(mdc->pin.port, mdc->pin.pinIndex);
903 IfxPort_setPinControllerSelection(mdio->pin.port, mdio->pin.pinIndex);
904 IfxPort_setPinControllerSelection(txClk->pin.port, txClk->pin.pinIndex);
905 IfxPort_setPinControllerSelection(txCtl->pin.port, txCtl->pin.pinIndex);
906 IfxPort_setPinControllerSelection(txd0->pin.port, txd0->pin.pinIndex);
907 IfxPort_setPinControllerSelection(txd1->pin.port, txd1->pin.pinIndex);
908 IfxPort_setPinControllerSelection(txd2->pin.port, txd2->pin.pinIndex);
909 IfxPort_setPinControllerSelection(txd3->pin.port, txd3->pin.pinIndex);
910
911 IfxPort_setPinModeOutput(mdc->pin.port, mdc->pin.pinIndex, mode, mdc->select);
912 IfxPort_setPinModeOutput(txClk->pin.port, txClk->pin.pinIndex, mode, txClk->select);
913 IfxPort_setPinModeOutput(txCtl->pin.port, txCtl->pin.pinIndex, mode, txCtl->select);
914 IfxPort_setPinModeOutput(txd0->pin.port, txd0->pin.pinIndex, mode, txd0->select);
915 IfxPort_setPinModeOutput(txd1->pin.port, txd1->pin.pinIndex, mode, txd1->select);
916 IfxPort_setPinModeOutput(txd2->pin.port, txd2->pin.pinIndex, mode, txd2->select);
917 IfxPort_setPinModeOutput(txd3->pin.port, txd3->pin.pinIndex, mode, txd3->select);
918
919 IfxPort_setPinPadDriver(mdc->pin.port, mdc->pin.pinIndex, speedGrade);
920 IfxPort_setPinPadDriver(txClk->pin.port, txClk->pin.pinIndex, speedGrade);
921 IfxPort_setPinPadDriver(txCtl->pin.port, txCtl->pin.pinIndex, speedGrade);
922 IfxPort_setPinPadDriver(txd0->pin.port, txd0->pin.pinIndex, speedGrade);
923 IfxPort_setPinPadDriver(txd1->pin.port, txd1->pin.pinIndex, speedGrade);
924 IfxPort_setPinPadDriver(txd2->pin.port, txd2->pin.pinIndex, speedGrade);
925 IfxPort_setPinPadDriver(txd3->pin.port, txd3->pin.pinIndex, speedGrade);
926 }
927
928
929 void IfxGeth_Eth_setupRmiiInputPins(IfxGeth_Eth *geth, const IfxGeth_Eth_RmiiPins *rmiiPins)
930 {
931 IfxPort_InputMode mode = IfxPort_InputMode_noPullDevice;
932 IfxPort_PadDriver speedGrade = IfxPort_PadDriver_cmosAutomotiveSpeed1;
933
934 IfxGeth_Crsdv_In *crsDiv = rmiiPins->crsDiv;
935 IfxGeth_Refclk_In *refClk = rmiiPins->refClk;
936 IfxGeth_Rxd_In *rxd0 = rmiiPins->rxd0;
937 IfxGeth_Rxd_In *rxd1 = rmiiPins->rxd1;
938 IfxGeth_Mdio_InOut *mdio = rmiiPins->mdio;
939
940 geth->gethSFR->GPCTL.B.ALTI0 = mdio->inSelect;
941 geth->gethSFR->GPCTL.B.ALTI1 = refClk->select;
942 geth->gethSFR->GPCTL.B.ALTI4 = crsDiv->select;
943 geth->gethSFR->GPCTL.B.ALTI6 = rxd0->select;
944 geth->gethSFR->GPCTL.B.ALTI7 = rxd1->select;
945
946 IfxPort_setPinControllerSelection(crsDiv->pin.port, crsDiv->pin.pinIndex);
947 IfxPort_setPinControllerSelection(refClk->pin.port, refClk->pin.pinIndex);
948 IfxPort_setPinControllerSelection(rxd0->pin.port, rxd0->pin.pinIndex);
949 IfxPort_setPinControllerSelection(rxd1->pin.port, rxd1->pin.pinIndex);
950
951 IfxPort_setPinModeInput(crsDiv->pin.port, crsDiv->pin.pinIndex, mode);
952 IfxPort_setPinModeInput(refClk->pin.port, refClk->pin.pinIndex, mode);
953 IfxPort_setPinModeInput(rxd0->pin.port, rxd0->pin.pinIndex, mode);
954 IfxPort_setPinModeInput(rxd1->pin.port, rxd1->pin.pinIndex, mode);
955
956 IfxPort_setPinPadDriver(crsDiv->pin.port, crsDiv->pin.pinIndex, speedGrade);
957 IfxPort_setPinPadDriver(refClk->pin.port, refClk->pin.pinIndex, speedGrade);
958 IfxPort_setPinPadDriver(rxd0->pin.port, rxd0->pin.pinIndex, speedGrade);
959 IfxPort_setPinPadDriver(rxd1->pin.port, rxd1->pin.pinIndex, speedGrade);
960 }
961
962
963 void IfxGeth_Eth_setupRmiiOutputPins(IfxGeth_Eth *geth, const IfxGeth_Eth_RmiiPins *rmiiPins)
964 {
965 IFX_UNUSED_PARAMETER(geth);
966 IfxPort_OutputMode mode = IfxPort_OutputMode_pushPull;
967 IfxPort_PadDriver speedGrade = IfxPort_PadDriver_cmosAutomotiveSpeed1;
968
969 IfxGeth_Mdc_Out *mdc = rmiiPins->mdc;
970 IfxGeth_Txen_Out *txen = rmiiPins->txEn;
971 IfxGeth_Txd_Out *txd0 = rmiiPins->txd0;
972 IfxGeth_Txd_Out *txd1 = rmiiPins->txd1;
973
974 IfxPort_setPinControllerSelection(mdc->pin.port, mdc->pin.pinIndex);
975 IfxPort_setPinControllerSelection(txen->pin.port, txen->pin.pinIndex);
976 IfxPort_setPinControllerSelection(txd0->pin.port, txd0->pin.pinIndex);
977 IfxPort_setPinControllerSelection(txd1->pin.port, txd1->pin.pinIndex);
978
979 IfxPort_setPinModeOutput(mdc->pin.port, mdc->pin.pinIndex, mode, mdc->select);
980 IfxPort_setPinModeOutput(txen->pin.port, txen->pin.pinIndex, mode, txen->select);
981 IfxPort_setPinModeOutput(txd0->pin.port, txd0->pin.pinIndex, mode, txd0->select);
982 IfxPort_setPinModeOutput(txd1->pin.port, txd1->pin.pinIndex, mode, txd1->select);
983
984 IfxPort_setPinPadDriver(mdc->pin.port, mdc->pin.pinIndex, speedGrade);
985 IfxPort_setPinPadDriver(txen->pin.port, txen->pin.pinIndex, speedGrade);
986 IfxPort_setPinPadDriver(txd0->pin.port, txd0->pin.pinIndex, speedGrade);
987 IfxPort_setPinPadDriver(txd1->pin.port, txd1->pin.pinIndex, speedGrade);
988 }
989
990
991 void IfxGeth_Eth_shuffleRxDescriptor(IfxGeth_Eth *geth, IfxGeth_RxDmaChannel channelId)
992 {
993 volatile IfxGeth_RxDescr *currentDescr = geth->rxChannel[channelId].rxDescrPtr;
994 volatile IfxGeth_RxDescr *lastDescr = &geth->rxChannel[channelId].rxDescrList->descr[IFXGETH_MAX_RX_DESCRIPTORS - 1];
995
996 if (currentDescr == lastDescr)
997 {
998 /* wrap around the descriptors */
999 geth->rxChannel[channelId].rxDescrPtr = IfxGeth_Eth_getBaseRxDescriptor(geth, channelId);
1000 }
1001 else
1002 {
1003 /* point to the next descriptor */
1004 geth->rxChannel[channelId].rxDescrPtr = &geth->rxChannel[channelId].rxDescrPtr[1];
1005 }
1006 }
1007
1008
1009 void IfxGeth_Eth_shuffleTxDescriptor(IfxGeth_Eth *geth, IfxGeth_TxDmaChannel channelId)
1010 {
1011 volatile IfxGeth_TxDescr *currentDescr = geth->txChannel[channelId].txDescrPtr;
1012 volatile IfxGeth_TxDescr *lastDescr = &geth->txChannel[channelId].txDescrList->descr[IFXGETH_MAX_TX_DESCRIPTORS - 1];
1013
1014 if (currentDescr == lastDescr)
1015 {
1016 /* wrap around the descriptors */
1017 geth->txChannel[channelId].txDescrPtr = IfxGeth_Eth_getBaseTxDescriptor(geth, channelId);
1018 }
1019 else
1020 {
1021 /* point to the next descriptor */
1022 geth->txChannel[channelId].txDescrPtr = &geth->txChannel[channelId].txDescrPtr[1];
1023 }
1024 }
1025
1026
1027 void IfxGeth_Eth_startReceiver(IfxGeth_Eth *geth, IfxGeth_RxDmaChannel channelId)
1028 {
1029 IfxGeth_mac_enableReceiver(geth->gethSFR);
1030 IfxGeth_dma_startReceiver(geth->gethSFR, channelId);
1031 }
1032
1033
1034 void IfxGeth_Eth_startReceivers(IfxGeth_Eth *geth, uint32 numOfChannels)
1035 {
1036 uint32 i;
1037 IfxGeth_mac_enableReceiver(geth->gethSFR);
1038
1039 for (i = 0; i < numOfChannels; i++)
1040 {
1041 IfxGeth_dma_startReceiver(geth->gethSFR, (IfxGeth_RxDmaChannel)i);
1042 }
1043 }
1044
1045
1046 void IfxGeth_Eth_startTransmitter(IfxGeth_Eth *geth, IfxGeth_TxDmaChannel channelId)
1047 {
1048 IfxGeth_mac_enableTransmitter(geth->gethSFR);
1049 IfxGeth_dma_startTransmitter(geth->gethSFR, channelId);
1050 }
1051
1052
1053 void IfxGeth_Eth_startTransmitters(IfxGeth_Eth *geth, uint32 numOfChannels)
1054 {
1055 uint32 i;
1056 IfxGeth_mac_enableTransmitter(geth->gethSFR);
1057
1058 for (i = 0; i < numOfChannels; i++)
1059 {
1060 IfxGeth_dma_startTransmitter(geth->gethSFR, (IfxGeth_TxDmaChannel)i);
1061 }
1062 }
1063
1064
1065 void IfxGeth_Eth_stopTransmitters(IfxGeth_Eth *geth, uint32 numOfChannels)
1066 {
1067 uint32 i;
1068 IfxGeth_mac_disableTransmitter(geth->gethSFR);
1069
1070 for (i = 0; i < numOfChannels; i++)
1071 {
1072 IfxGeth_dma_stopTransmitter(geth->gethSFR, (IfxGeth_TxDmaChannel)i);
1073 }
1074 }
1075
1076
1077 void IfxGeth_Eth_wakeupReceiver(IfxGeth_Eth *geth, IfxGeth_RxDmaChannel channelId)
1078 {
1079 /* check if receiver suspended */
1080 if (IfxGeth_dma_isInterruptFlagSet(geth->gethSFR, (IfxGeth_DmaChannel)channelId, IfxGeth_DmaInterruptFlag_receiveStopped))
1081 {
1082 /* check if receive buffer unavailable */
1083 if (IfxGeth_dma_isInterruptFlagSet(geth->gethSFR, (IfxGeth_DmaChannel)channelId, IfxGeth_DmaInterruptFlag_receiveBufferUnavailable))
1084 {
1085 IfxGeth_dma_clearInterruptFlag(geth->gethSFR, (IfxGeth_DmaChannel)channelId, IfxGeth_DmaInterruptFlag_receiveBufferUnavailable);
1086 }
1087
1088 IfxGeth_Eth_startReceiver(geth, channelId);
1089 }
1090 }
1091
1092
1093 void IfxGeth_Eth_wakeupTransmitter(IfxGeth_Eth *geth, IfxGeth_TxDmaChannel channelId)
1094 {
1095 /* check if transmitter suspended */
1096 if (IfxGeth_dma_isInterruptFlagSet(geth->gethSFR, (IfxGeth_DmaChannel)channelId, IfxGeth_DmaInterruptFlag_transmitStopped))
1097 {
1098 /* check if transmit buffer unavailable */
1099 if (IfxGeth_dma_isInterruptFlagSet(geth->gethSFR, (IfxGeth_DmaChannel)channelId, IfxGeth_DmaInterruptFlag_transmitBufferUnavailable))
1100 {
1101 IfxGeth_dma_clearInterruptFlag(geth->gethSFR, (IfxGeth_DmaChannel)channelId, IfxGeth_DmaInterruptFlag_transmitBufferUnavailable);
1102 }
1103
1104 /* check MTL underflow flag */
1105 if (IfxGeth_mtl_isInterruptFlagSet(geth->gethSFR, (IfxGeth_MtlQueue)channelId, IfxGeth_MtlInterruptFlag_txQueueUnderflow))
1106 {
1107 IfxGeth_mtl_clearInterruptFlag(geth->gethSFR, (IfxGeth_MtlQueue)channelId, IfxGeth_MtlInterruptFlag_txQueueUnderflow);
1108 }
1109
1110 IfxGeth_Eth_startTransmitter(geth, channelId);
1111 }
1112 }
1113
1114
1115 void IfxGeth_Eth_writeHeader(IfxGeth_Eth *geth, uint8 *txBuffer, uint8 *destinationAddress, uint8 *sourceAddress, uint32 payloadLength)
1116 {
1117 uint32 i;
1118 IFX_UNUSED_PARAMETER(geth);
1119
1120 /* Destination Address */
1121 for (i = 0; i < 6; i++)
1122 {
1123 *txBuffer++ = *destinationAddress++;
1124 }
1125
1126 /* Source Address */
1127 for (i = 0; i < 6; i++)
1128 {
1129 *txBuffer++ = *sourceAddress++;
1130 }
1131
1132 /* packet size */
1133 *txBuffer++ = (uint8)(payloadLength / 256);
1134 *txBuffer = (uint8)(payloadLength % 256);
1135 }
IfxGeth_Eth_PinConfig::rmiiPins
IFX_CONST IfxGeth_Eth_RmiiPins * rmiiPins
Structure for RMII pins.
Definition: IfxGeth_Eth.h:431
IfxGeth_Eth_RxChannel::rxDescrPtr
volatile IfxGeth_RxDescr * rxDescrPtr
Pointer to Rx Descriptor (current descriptor)
Definition: IfxGeth_Eth.h:442
IFXGETH_NUM_MODULES
#define IFXGETH_NUM_MODULES
Number of Geth instances.
Definition: IfxGeth_cfg.h:78
IfxGeth_QueueSize_256Bytes
256Bytes
Definition: IfxGeth.h:178
IfxGeth_RxDescr3_RF_Bits::OWN
uint32 OWN
Own bit.
Definition: IfxGeth.h:417
IfxGeth_RxDescrList
Rx Descriptor List.
Definition: IfxGeth.h:686
IfxGeth_Txclk_Out
TXCLK pin mapping structure.
Definition: IfxGeth_PinMap.h:161
IfxGeth_TxDmaChannel_3
Tx Dma Channel 3.
Definition: IfxGeth.h:264
IfxGeth_Eth_RxChannelConfig::channelId
IfxGeth_RxDmaChannel channelId
Rx DMA channel Index.
Definition: IfxGeth_Eth.h:344
IfxGeth_RxArbitrationAlgorithm_sp
Strict Priority.
Definition: IfxGeth.h:217
Ifx_RxSel_d
Definition: Ifx_Types.h:132
IfxGeth_Eth_initReceiveDescriptors
void IfxGeth_Eth_initReceiveDescriptors(IfxGeth_Eth *geth, IfxGeth_Eth_RxChannelConfig *config)
Initialises the Rx descriptors of a single channel.
Definition: IfxGeth_Eth.c:552
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxGeth_Eth_MtlConfig::rxQueue
IfxGeth_Eth_RxQueueConfig rxQueue[IFXGETH_NUM_RX_QUEUES]
Rx queue configurations of selected queues.
Definition: IfxGeth_Eth.h:423
IfxGeth_mtl_setRxArbitrationAlgorithm
IFX_INLINE void IfxGeth_mtl_setRxArbitrationAlgorithm(Ifx_GETH *gethSFR, IfxGeth_RxArbitrationAlgorithm arbitrationAlgorithm)
sets the Rx Arbitration algorithm
Definition: IfxGeth.h:1525
IfxGeth_ServiceRequest_6
Service Request SR6.
Definition: IfxGeth.h:251
IfxGeth_Eth_Config::dma
IfxGeth_Eth_DmaConfig dma
Configuration Structure for the DMA initialisation.
Definition: IfxGeth_Eth.h:481
IfxGeth_DuplexMode_fullDuplex
Full Duplex Mode.
Definition: IfxGeth.h:294
IfxGeth_Eth::rxChannel
IfxGeth_Eth_RxChannel rxChannel[IFXGETH_NUM_RX_CHANNELS]
Rx Channels handle of selected Channels.
Definition: IfxGeth_Eth.h:469
IfxGeth_Eth_RxChannel::rxDescrList
IfxGeth_RxDescrList * rxDescrList
pointer to RX descriptors RAM
Definition: IfxGeth_Eth.h:441
IfxGeth_TxDescr3_RF_Bits::CIC_TPL
uint32 CIC_TPL
Checksum Insertion Control or TCP Payload LengthThese bits control the checksum.
Definition: IfxGeth.h:535
IfxGeth_Mdio_InOut::inSelect
Ifx_RxSel inSelect
Input multiplexer value.
Definition: IfxGeth_PinMap.h:148
IfxGeth_MtlInterruptFlag_rxQueueOverflow
Receive Queue Overflow.
Definition: IfxGeth.h:141
IfxGeth_mtl_isInterruptFlagSet
boolean IfxGeth_mtl_isInterruptFlagSet(Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId, IfxGeth_MtlInterruptFlag flag)
Returns the status of selected Mtl interrupt flag.
Definition: IfxGeth.c:220
IfxGeth_TxDescr::TDES3
IfxGeth_TxDescr3 TDES3
Tx Descriptor DWORD 3.
Definition: IfxGeth.h:677
IfxGeth_TxDescr2::R
IfxGeth_TxDescr2_RF_Bits R
Read Format Bitfiled Access.
Definition: IfxGeth.h:640
IfxGeth_dma_isInterruptFlagSet
IFX_INLINE boolean IfxGeth_dma_isInterruptFlagSet(Ifx_GETH *gethSFR, IfxGeth_DmaChannel channelId, IfxGeth_DmaInterruptFlag flag)
Returns the status of selected DMA interrupt flag.
Definition: IfxGeth.h:1342
IfxGeth_Col_In
COL pin mapping structure.
Definition: IfxGeth_PinMap.h:128
IfxGeth_Eth_PinConfig::rgmiiPins
IFX_CONST IfxGeth_Eth_RgmiiPins * rgmiiPins
Structure for RGMII pins.
Definition: IfxGeth_Eth.h:432
IfxPort_OutputMode_pushPull
Definition: IfxPort.h:142
IfxGeth_mac_setMaxPacketSize
void IfxGeth_mac_setMaxPacketSize(Ifx_GETH *gethSFR, uint16 maxPacketSize)
Sets the maximum size of the packet.
Definition: IfxGeth.c:435
IfxGeth_DmaInterruptFlag_transmitStopped
Transmit Stopped.
Definition: IfxGeth.h:111
IfxGeth_Eth_shuffleTxDescriptor
void IfxGeth_Eth_shuffleTxDescriptor(IfxGeth_Eth *geth, IfxGeth_TxDmaChannel channelId)
Updates the current Tx descriptor pointer in the handle to next Tx descriptor.
Definition: IfxGeth_Eth.c:1009
IfxGeth_Eth_wakeupReceiver
void IfxGeth_Eth_wakeupReceiver(IfxGeth_Eth *geth, IfxGeth_RxDmaChannel channelId)
Wakes up the Receiver functions of MAC and selected channel of DMA.
Definition: IfxGeth_Eth.c:1077
IfxGeth_Eth_writeHeader
void IfxGeth_Eth_writeHeader(IfxGeth_Eth *geth, uint8 *txBuffer, uint8 *destinationAddress, uint8 *sourceAddress, uint32 payloadLength)
writes the header format into buffrer
Definition: IfxGeth_Eth.c:1115
IfxGeth_Eth_configureDMA
void IfxGeth_Eth_configureDMA(IfxGeth_Eth *geth, IfxGeth_Eth_DmaConfig *dmaConfig)
Configures the DMA.
Definition: IfxGeth_Eth.c:61
IfxGeth_TxDescrList
Tx Descriptor List.
Definition: IfxGeth.h:693
IFXGETH_MAX_RX_DESCRIPTORS
#define IFXGETH_MAX_RX_DESCRIPTORS
Max number of RX descriptors per list.
Definition: IfxGeth.h:69
IfxGeth_Eth_MiiPins::mdio
IfxGeth_Mdio_InOut * mdio
Pointer to MDIO pin config.
Definition: IfxGeth_Eth.h:292
IfxGeth_Index
IfxGeth_Index
List of the available Geth instances.
Definition: IfxGeth_cfg.h:104
IfxGeth_Eth_isRxDataAvailable
IFX_INLINE boolean IfxGeth_Eth_isRxDataAvailable(IfxGeth_Eth *geth, IfxGeth_RxDmaChannel channelId)
Checks whether one or more RX data is available.
Definition: IfxGeth_Eth.h:1105
IfxGeth_Eth_Config
Configuration Structure for the Module initialisation.
Definition: IfxGeth_Eth.h:474
IfxGeth_dma_startTransmitter
IFX_INLINE void IfxGeth_dma_startTransmitter(Ifx_GETH *gethSFR, IfxGeth_TxDmaChannel channel)
starts the tramsimitter of selected Tx channel of DMA
Definition: IfxGeth.h:1434
IfxGeth_Eth_RmiiPins::refClk
IfxGeth_Refclk_In * refClk
Pointer to REFCLK input pin config.
Definition: IfxGeth_Eth.h:330
IfxGeth_Eth_DmaConfig
Configuration Structure for the DMA initialisation.
Definition: IfxGeth_Eth.h:390
IfxGeth_Eth_TxQueueConfig::txQueueSize
IfxGeth_QueueSize txQueueSize
Tx Queue size.
Definition: IfxGeth_Eth.h:380
IfxGeth_TxDescr3_RF_Bits::FL_TPL
uint32 FL_TPL
Packet Length or TCP Payload Length.
Definition: IfxGeth.h:533
IfxGeth_RxDescr3_RF_Bits::IOC
uint32 IOC
Interrupt on Completion.
Definition: IfxGeth.h:416
IfxGeth_Eth_MiiPins::rxd2
IfxGeth_Rxd_In * rxd2
Pointer to RXD2 input pin config.
Definition: IfxGeth_Eth.h:283
IfxGeth_Eth_FrameConfig
Configuration Structure for TX Frame.
Definition: IfxGeth_Eth.h:488
IfxGeth_Txen_Out
TXEN pin mapping structure.
Definition: IfxGeth_PinMap.h:169
IfxGeth_Eth_TxChannel::txBuf1Size
uint16 txBuf1Size
configured tx buffer 1 size
Definition: IfxGeth_Eth.h:454
IfxGeth_RxDmaChannel_2
Rx Dma Channel 2.
Definition: IfxGeth.h:227
IfxGeth_Eth_MacConfig::maxPacketSize
uint16 maxPacketSize
Maximum size of the ethernet packet.
Definition: IfxGeth_Eth.h:411
IfxGeth_TxDmaChannel
IfxGeth_TxDmaChannel
Tx DMA channel.
Definition: IfxGeth.h:259
IfxGeth_mac_setLoopbackMode
IFX_INLINE void IfxGeth_mac_setLoopbackMode(Ifx_GETH *gethSFR, IfxGeth_LoopbackMode mode)
Enables/Disables the MAC operation in the loopback mode at GMII or MII.
Definition: IfxGeth.h:1501
IfxGeth_DmaInterruptFlag_receiveStopped
Receive Stopped.
Definition: IfxGeth.h:115
IfxGeth_Eth_TxChannel::txCount
uint32 txCount
Number of frames transmitted.
Definition: IfxGeth_Eth.h:453
IfxGeth_dma_setTxDescriptorTailPointer
IFX_INLINE void IfxGeth_dma_setTxDescriptorTailPointer(Ifx_GETH *gethSFR, IfxGeth_TxDmaChannel channel, uint32 address)
sets the address of the last valid descriptor in the Transmit descriptor list
Definition: IfxGeth.h:1416
IfxGeth_Eth_setupMiiOutputPins
void IfxGeth_Eth_setupMiiOutputPins(IfxGeth_Eth *geth, const IfxGeth_Eth_MiiPins *miiPins)
setup MII mode output pins
Definition: IfxGeth_Eth.c:792
IfxGeth_Eth_getBaseRxDescriptor
IFX_INLINE volatile IfxGeth_RxDescr * IfxGeth_Eth_getBaseRxDescriptor(IfxGeth_Eth *geth, IfxGeth_RxDmaChannel channelId)
Returns the pointer to base RX descriptor in the list.
Definition: IfxGeth_Eth.h:1093
IfxGeth_RxDescr3
RDES3.
Definition: IfxGeth.h:608
IfxGeth_DmaInterruptFlag_transmitBufferUnavailable
Trasmit Buffer Unavailable.
Definition: IfxGeth.h:112
IfxGeth_Eth_DmaInterruptConfig::channelId
IfxGeth_DmaChannel channelId
DMA channel ID (irrespective of TX and Rx for interrupt configuration)
Definition: IfxGeth_Eth.h:266
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:140
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxGeth_TxDmaChannel_2
Tx Dma Channel 2.
Definition: IfxGeth.h:263
IfxGeth_Eth_TxChannelConfig::channelId
IfxGeth_TxDmaChannel channelId
Tx DMA channel Index.
Definition: IfxGeth_Eth.h:368
IfxGeth_dma_stopTransmitter
IFX_INLINE void IfxGeth_dma_stopTransmitter(Ifx_GETH *gethSFR, IfxGeth_TxDmaChannel channel)
Stops the tramsimitter of selected Tx channel of DMA.
Definition: IfxGeth.h:1440
IfxGeth_Eth_RgmiiPins::txCtl
IfxGeth_Txctl_Out * txCtl
Pointer to TXCTL output pin config.
Definition: IfxGeth_Eth.h:313
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
IfxGeth_ServiceRequest_2
Service Request SR2.
Definition: IfxGeth.h:247
IfxGeth_mtl_setTxQueueSize
void IfxGeth_mtl_setTxQueueSize(Ifx_GETH *gethSFR, IfxGeth_TxMtlQueue queueId, IfxGeth_QueueSize queueSize)
Sets the size of the selected TX Queue.
Definition: IfxGeth.c:325
IfxGeth_Refclk_In
REFCLK pin mapping structure.
Definition: IfxGeth_PinMap.h:96
IfxGeth_Eth_MiiPins::txEn
IfxGeth_Txen_Out * txEn
Pointer to TXEN output pin config.
Definition: IfxGeth_Eth.h:285
IfxGeth_Eth_startTransmitters
void IfxGeth_Eth_startTransmitters(IfxGeth_Eth *geth, uint32 numOfChannels)
Start the transmitter functions of MAC and all selected number of DMA channels.
Definition: IfxGeth_Eth.c:1053
IfxGeth_Rxclk_In
RXCLK pin mapping structure.
Definition: IfxGeth_PinMap.h:104
IfxGeth_TxDmaChannel_0
Tx Dma Channel 0.
Definition: IfxGeth.h:261
IfxGeth_mtl_setRxQueueForDaBasedDmaChannel
IFX_INLINE void IfxGeth_mtl_setRxQueueForDaBasedDmaChannel(Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId, boolean enabled)
Sets the selected Rx Queue for DA based DMA channel.
Definition: IfxGeth.h:1537
IfxGeth_Txd_Out
TXD pin mapping structure.
Definition: IfxGeth_PinMap.h:153
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:322
IfxGeth_mac_setCrcChecking
IFX_INLINE void IfxGeth_mac_setCrcChecking(Ifx_GETH *gethSFR, boolean enabled)
Enables / Disables CRC Checking for Received Packets.
Definition: IfxGeth.h:1482
IfxGeth_Eth_MiiPins::col
IfxGeth_Col_In * col
pointer to COL input pin config
Definition: IfxGeth_Eth.h:276
IfxGeth_resetModule
void IfxGeth_resetModule(Ifx_GETH *gethSFR)
resets Ethernet kernel
Definition: IfxGeth.c:365
IfxGeth_Eth_setupRgmiiOutputPins
void IfxGeth_Eth_setupRgmiiOutputPins(IfxGeth_Eth *geth, const IfxGeth_Eth_RgmiiPins *rgmiiPins)
Set up RGMII mode output pins.
Definition: IfxGeth_Eth.c:887
IfxGeth_TxDescr2_RF_Bits::B2L
uint32 B2L
Buffer 2 Length.
Definition: IfxGeth.h:517
IfxGeth_dma_clearAllInterruptFlags
IFX_INLINE void IfxGeth_dma_clearAllInterruptFlags(Ifx_GETH *gethSFR, IfxGeth_DmaChannel channelId)
Returns the status of selected DMA interrupt flag.
Definition: IfxGeth.h:1315
IfxGeth_Eth_DmaConfig::fixedBurstEnabled
boolean fixedBurstEnabled
Enable/Disable Fixed Burst length.
Definition: IfxGeth_Eth.h:395
IfxGeth_ServiceRequest
IfxGeth_ServiceRequest
Geth service request index.
Definition: IfxGeth.h:243
IfxGeth_Eth_initModuleConfig
void IfxGeth_Eth_initModuleConfig(IfxGeth_Eth_Config *config, Ifx_GETH *gethSFR)
Initialises the config structure with default values.
Definition: IfxGeth_Eth.c:318
IfxGeth_Eth_MiiPins::txd2
IfxGeth_Txd_Out * txd2
Pointer to TXD2 output pin config.
Definition: IfxGeth_Eth.h:289
IfxGeth_RxDmaChannel_1
Rx Dma Channel 1.
Definition: IfxGeth.h:226
IfxGeth_mac_setPreambleLength
IFX_INLINE void IfxGeth_mac_setPreambleLength(Ifx_GETH *gethSFR, IfxGeth_PreambleLength length)
Sets the Preamble Length for Transmit packets.
Definition: IfxGeth.h:1507
IfxGeth_Eth_startReceiver
void IfxGeth_Eth_startReceiver(IfxGeth_Eth *geth, IfxGeth_RxDmaChannel channelId)
Start the Receiver functions of MAC and selected channel of DMA.
Definition: IfxGeth_Eth.c:1027
IfxGeth_Mdio_InOut
MDIO pin mapping structure.
Definition: IfxGeth_PinMap.h:144
IfxPort_setPinControllerSelection
void IfxPort_setPinControllerSelection(Ifx_P *port, uint8 pinIndex)
Enable the Pin Controller Selection.
Definition: IfxPort.c:337
IfxGeth_Eth_RxChannelConfig::rxBuffer1Size
uint16 rxBuffer1Size
Size of Rx Buffer 1.
Definition: IfxGeth_Eth.h:348
IfxGeth_Eth_MacConfig::lineSpeed
IfxGeth_LineSpeed lineSpeed
Ethernet Line Speed.
Definition: IfxGeth_Eth.h:408
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxGeth_RxDmaChannel
IfxGeth_RxDmaChannel
Rx DMA channel.
Definition: IfxGeth.h:223
IfxGeth_Eth_getActualRxDescriptor
IFX_INLINE volatile IfxGeth_RxDescr * IfxGeth_Eth_getActualRxDescriptor(IfxGeth_Eth *geth, IfxGeth_RxDmaChannel channelId)
Returns the pointer to current RX descriptor.
Definition: IfxGeth_Eth.h:1081
IfxGeth_Eth_TxChannel::txDescrList
IfxGeth_TxDescrList * txDescrList
pointer to TX descriptors RAM
Definition: IfxGeth_Eth.h:451
IfxGeth_Eth_RxChannel::rxCount
uint32 rxCount
Number of frames received.
Definition: IfxGeth_Eth.h:443
IfxGeth_Eth_MiiPins::txd1
IfxGeth_Txd_Out * txd1
Pointer to TXD1 output pin config.
Definition: IfxGeth_Eth.h:288
IfxGeth_TxDescr2_RF_Bits::TTSE_TMWD
uint32 TTSE_TMWD
Transmit Timestamp Enable or External TSO Memory Write Enable.
Definition: IfxGeth.h:518
IfxPort_setPinModeInput
IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode.
Definition: IfxPort.h:669
IfxGeth_Eth_RgmiiPins
Port pins for RGMII mode configuration.
Definition: IfxGeth_Eth.h:306
IfxGeth_Eth_DmaConfig::rxChannel
IfxGeth_Eth_RxChannelConfig rxChannel[IFXGETH_NUM_RX_CHANNELS]
Rx Channels configurations of selected Channels.
Definition: IfxGeth_Eth.h:398
IFXGETH_MAX_TX_DESCRIPTORS
#define IFXGETH_MAX_TX_DESCRIPTORS
Max number of TX descriptors per list.
Definition: IfxGeth.h:63
IfxGeth_DmaInterruptFlag_receiveBufferUnavailable
Receive Buffer Unavailable.
Definition: IfxGeth.h:114
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxGeth_PhyInterfaceMode_rmii
RMII mode.
Definition: IfxGeth.h:160
IfxGeth_Eth_MiiPins::txd3
IfxGeth_Txd_Out * txd3
Pointer to TXD3 output pin config.
Definition: IfxGeth_Eth.h:290
IfxGeth_Txer_Out
TXER pin mapping structure.
Definition: IfxGeth_PinMap.h:177
IfxGeth_DmaChannel
IfxGeth_DmaChannel
DMA channel Index.
Definition: IfxGeth.h:98
IfxGeth_Eth_Config::mac
IfxGeth_Eth_MacConfig mac
Configuration Structure for the the MAC initialisation.
Definition: IfxGeth_Eth.h:479
IfxPort_PadDriver_cmosAutomotiveSpeed4
Speed grade 4.
Definition: IfxPort.h:156
IfxGeth_Eth_shuffleRxDescriptor
void IfxGeth_Eth_shuffleRxDescriptor(IfxGeth_Eth *geth, IfxGeth_RxDmaChannel channelId)
Updates the current Rx descriptor pointer in the handle to next Rx descriptor.
Definition: IfxGeth_Eth.c:991
IfxGeth_PreambleLength_7Bytes
7 bytes of preamble
Definition: IfxGeth.h:168
IfxGeth_Eth_RmiiPins::crsDiv
IfxGeth_Crsdv_In * crsDiv
pointer to CRSDIV input pin config
Definition: IfxGeth_Eth.h:329
IfxGeth_mac_disableTransmitter
IFX_INLINE void IfxGeth_mac_disableTransmitter(Ifx_GETH *gethSFR)
Disables the Trasnmitter of MAC Core.
Definition: IfxGeth.h:1458
IfxGeth_RxDmaChannel_3
Rx Dma Channel 3.
Definition: IfxGeth.h:228
IfxGeth_mac_enableTransmitter
IFX_INLINE void IfxGeth_mac_enableTransmitter(Ifx_GETH *gethSFR)
Enables the Trasnmitter of MAC Core.
Definition: IfxGeth.h:1470
IfxGeth_setPhyInterfaceMode
IFX_INLINE void IfxGeth_setPhyInterfaceMode(Ifx_GETH *gethSFR, IfxGeth_PhyInterfaceMode mode)
Sets the External Phy Interface mode.
Definition: IfxGeth.h:1549
IfxGeth_Mdc_Out
MDC pin mapping structure.
Definition: IfxGeth_PinMap.h:136
IfxGeth_Eth_MacConfig::macAddress
uint8 macAddress[6]
MAC address for the ethernet, should be unique in the network.
Definition: IfxGeth_Eth.h:410
IfxGeth_Eth_startReceivers
void IfxGeth_Eth_startReceivers(IfxGeth_Eth *geth, uint32 numOfChannels)
Start the Receiver functions of MAC and all selected number of DMA channels.
Definition: IfxGeth_Eth.c:1034
IfxGeth_TxDescr::TDES0
IfxGeth_TxDescr0 TDES0
Tx Descriptor DWORD 0.
Definition: IfxGeth.h:674
IfxGeth_Eth_RxQueueConfig::forwardErrorPacket
boolean forwardErrorPacket
Error Packet Forwarding Enable/Disable.
Definition: IfxGeth_Eth.h:357
IFXGETH_NUM_TX_CHANNELS
#define IFXGETH_NUM_TX_CHANNELS
Number of Tx DMA channels of DMA.
Definition: IfxGeth_cfg.h:82
IfxGeth_Rxdv_In
RXDV pin mapping structure.
Definition: IfxGeth_PinMap.h:72
IfxGeth_mac_setCrcStripping
IFX_INLINE void IfxGeth_mac_setCrcStripping(Ifx_GETH *gethSFR, boolean acsEnabled, boolean cstEnabled)
Enables/Disables the Automatic Pad or CRC Stripping for frames less than 1536 bytes and CRC strippi...
Definition: IfxGeth.h:1488
IfxGeth_dma_setTxMaxBurstLength
IFX_INLINE void IfxGeth_dma_setTxMaxBurstLength(Ifx_GETH *gethSFR, IfxGeth_TxDmaChannel channel, IfxGeth_DmaBurstLength length)
sets the programmable burst length of selected Tx channel of DMA
Definition: IfxGeth.h:1422
IfxGeth_Txclk_In
TXCLK pin mapping structure.
Definition: IfxGeth_PinMap.h:112
IfxGeth_TxMtlQueue
IfxGeth_TxMtlQueue
Tx MTL Queue ID.
Definition: IfxGeth.h:269
IfxGeth_TxSchedulingAlgorithm_wrr
WRR Algorithm.
Definition: IfxGeth.h:282
IfxGeth_mtl_enableRxQueue
IFX_INLINE void IfxGeth_mtl_enableRxQueue(Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId)
Enables the selected Rx Queue.
Definition: IfxGeth.h:1519
IfxGeth_Eth_wakeupTransmitter
void IfxGeth_Eth_wakeupTransmitter(IfxGeth_Eth *geth, IfxGeth_TxDmaChannel channelId)
Wakes up the transmitter functions of MAC and selected channel of DMA.
Definition: IfxGeth_Eth.c:1093
IfxGeth_Eth_setupMiiInputPins
void IfxGeth_Eth_setupMiiInputPins(IfxGeth_Eth *geth, const IfxGeth_Eth_MiiPins *miiPins)
Set up MII mode input pins.
Definition: IfxGeth_Eth.c:698
IfxGeth_Crs_In
CRS pin mapping structure.
Definition: IfxGeth_PinMap.h:56
IfxGeth_dma_setRxDescriptorTailPointer
IFX_INLINE void IfxGeth_dma_setRxDescriptorTailPointer(Ifx_GETH *gethSFR, IfxGeth_RxDmaChannel channel, uint32 address)
sets the address of the last valid descriptor in the Receive descriptor list
Definition: IfxGeth.h:1392
IfxGeth_PhyInterfaceMode_rgmii
RGMII mode.
Definition: IfxGeth.h:159
IfxGeth_Eth_initModule
void IfxGeth_Eth_initModule(IfxGeth_Eth *geth, IfxGeth_Eth_Config *config)
Initialises the Geth Module with given configuration.
Definition: IfxGeth_Eth.c:257
IfxGeth_Eth_TxChannelConfig::txBuffer1Size
uint16 txBuffer1Size
Size of Tx Buffer 1.
Definition: IfxGeth_Eth.h:372
IfxGeth_Eth_TxQueueConfig::storeAndForward
boolean storeAndForward
Transmit Store and Forward Enable/Disable.
Definition: IfxGeth_Eth.h:379
IfxGeth_Crsdv_In
CRSDV pin mapping structure.
Definition: IfxGeth_PinMap.h:64
IfxGeth_Eth_configureMTL
void IfxGeth_Eth_configureMTL(IfxGeth_Eth *geth, IfxGeth_Eth_MtlConfig *mtlConfig)
Configures the MTL.
Definition: IfxGeth_Eth.c:117
IfxGeth_dma_setRxMaxBurstLength
IFX_INLINE void IfxGeth_dma_setRxMaxBurstLength(Ifx_GETH *gethSFR, IfxGeth_RxDmaChannel channel, IfxGeth_DmaBurstLength length)
sets the programmable burst length of selected Rx channel of DMA
Definition: IfxGeth.h:1398
IfxGeth_Eth_MiiPins::rxDv
IfxGeth_Rxdv_In * rxDv
Pointer to RXDV input pin config.
Definition: IfxGeth_Eth.h:279
IfxGeth_Crs_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxGeth_PinMap.h:60
IfxPort_PadDriver_cmosAutomotiveSpeed1
Speed grade 1.
Definition: IfxPort.h:153
IfxGeth_TxDescr3_RF_Bits::FD
uint32 FD
First Descriptor.
Definition: IfxGeth.h:541
IfxGeth_Eth_setupRmiiOutputPins
void IfxGeth_Eth_setupRmiiOutputPins(IfxGeth_Eth *geth, const IfxGeth_Eth_RmiiPins *rmiiPins)
setup RMII mode output pins
Definition: IfxGeth_Eth.c:963
IfxGeth_RxDescr3_RF_Bits::BUF2V
uint32 BUF2V
Buffer 2 Address Valid.
Definition: IfxGeth.h:414
IfxGeth_Eth_freeReceiveBuffer
void IfxGeth_Eth_freeReceiveBuffer(IfxGeth_Eth *geth, IfxGeth_RxDmaChannel channelId)
Free the receive buffer, enabling it for the further reception.
Definition: IfxGeth_Eth.c:209
IfxGeth_Eth_MtlConfig::numOfRxQueues
uint32 numOfRxQueues
Number of Rx Queues.
Definition: IfxGeth_Eth.h:420
IfxGeth_mac_setDuplexMode
IFX_INLINE void IfxGeth_mac_setDuplexMode(Ifx_GETH *gethSFR, IfxGeth_DuplexMode mode)
Sets the Duplex Mode.
Definition: IfxGeth.h:1495
IfxGeth_dma_setTxDescriptorRingLength
IFX_INLINE void IfxGeth_dma_setTxDescriptorRingLength(Ifx_GETH *gethSFR, IfxGeth_TxDmaChannel channel, uint32 length)
sets the Length of the Tx descriptors ring
Definition: IfxGeth.h:1410
IfxGeth_Eth_configureMacCore
void IfxGeth_Eth_configureMacCore(IfxGeth_Eth *geth, IfxGeth_Eth_MacConfig *macConfig)
Configures the MAC core.
Definition: IfxGeth_Eth.c:186
IfxGeth_Eth_getReceiveBuffer
void * IfxGeth_Eth_getReceiveBuffer(IfxGeth_Eth *geth, IfxGeth_RxDmaChannel channelId)
Gets receive buffer note: IfxEth_freeReceiveBuffer() shall be called after the data from the RX buffe...
Definition: IfxGeth_Eth.c:224
IfxSrc_Tos_dma
DMA interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:69
IfxGeth_Eth_setupRmiiInputPins
void IfxGeth_Eth_setupRmiiInputPins(IfxGeth_Eth *geth, const IfxGeth_Eth_RmiiPins *rmiiPins)
setup RMII mode input pins
Definition: IfxGeth_Eth.c:929
IfxGeth_Eth_RxQueueConfig::daBasedDmaChannelEnabled
boolean daBasedDmaChannelEnabled
DA-based DMA Channel Selection Enable/Disable.
Definition: IfxGeth_Eth.h:359
IfxGeth_Eth_MtlInterruptConfig::serviceRequest
IfxGeth_ServiceRequest serviceRequest
Service Request node for MTL interrupt.
Definition: IfxGeth_Eth.h:299
IfxGeth_Eth_DmaInterruptConfig::priority
Ifx_Priority priority
Interrupt service priority.
Definition: IfxGeth_Eth.h:267
IfxGeth_Eth_DmaConfig::rxInterrupt
IfxGeth_Eth_DmaInterruptConfig rxInterrupt[IFXGETH_NUM_DMA_CHANNELS]
Receive Interrupt configuration structure for DMA Channel.
Definition: IfxGeth_Eth.h:400
IfxGeth_DmaInterruptFlag_receiveInterrupt
Receive Interrupt.
Definition: IfxGeth.h:113
IfxPort_InputMode_noPullDevice
Definition: IfxPort.h:84
IfxGeth_Eth_stopTransmitters
void IfxGeth_Eth_stopTransmitters(IfxGeth_Eth *geth, uint32 numOfChannels)
Stops the transmitter functions of MAC and all selected number of DMA channels.
Definition: IfxGeth_Eth.c:1065
IfxGeth_Eth_PinConfig::miiPins
IFX_CONST IfxGeth_Eth_MiiPins * miiPins
Structure for MII pins.
Definition: IfxGeth_Eth.h:433
IfxGeth_Eth_RxQueueConfig::rxQueueSize
IfxGeth_QueueSize rxQueueSize
Rx Queue size.
Definition: IfxGeth_Eth.h:356
IfxGeth_DmaChannel_0
Dma Channel 0.
Definition: IfxGeth.h:100
IfxGeth_TxDescrList::descr
volatile IfxGeth_TxDescr descr[IFXGETH_MAX_TX_DESCRIPTORS]
list of TX descriptors
Definition: IfxGeth.h:695
IfxGeth_Eth_MiiPins::txd0
IfxGeth_Txd_Out * txd0
Pointer to TXD0 output pin config.
Definition: IfxGeth_Eth.h:287
IfxGeth_Eth_TxChannelConfig::txBuffer1StartAddress
uint32 * txBuffer1StartAddress
Start address of Tx Buffer 1.
Definition: IfxGeth_Eth.h:371
IfxGeth_Grefclk_In
GREFCLK pin mapping structure.
Definition: IfxGeth_PinMap.h:88
IfxGeth_Eth_MiiPins::txEr
IfxGeth_Txer_Out * txEr
Pointer to TXER output pin config.
Definition: IfxGeth_Eth.h:286
IfxGeth_TxDescr3::R
IfxGeth_TxDescr3_RF_Bits R
Read Format Bitfiled Access.
Definition: IfxGeth.h:650
IfxGeth_mac_setLineSpeed
void IfxGeth_mac_setLineSpeed(Ifx_GETH *gethSFR, IfxGeth_LineSpeed speed)
Sets the Ethernet Line Speed.
Definition: IfxGeth.c:67
IfxGeth_DmaChannel_3
Dma Channel 3.
Definition: IfxGeth.h:103
IfxGeth_mtl_clearAllInterruptFlags
void IfxGeth_mtl_clearAllInterruptFlags(Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId)
Clears all the Mtl interrupt flags.
Definition: IfxGeth.c:108
IfxGeth_mtl_enableInterrupt
void IfxGeth_mtl_enableInterrupt(Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId, IfxGeth_MtlInterruptFlag flag)
Enables the selected Mtl interrupt flag.
Definition: IfxGeth.c:177
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:249
IfxGeth_Eth_getBaseTxDescriptor
IFX_INLINE volatile IfxGeth_TxDescr * IfxGeth_Eth_getBaseTxDescriptor(IfxGeth_Eth *geth, IfxGeth_TxDmaChannel channelId)
Returns the pointer to base TX descriptor in the list.
Definition: IfxGeth_Eth.h:1099
IFXGETH_NUM_RX_CHANNELS
#define IFXGETH_NUM_RX_CHANNELS
Number of Rx Channels of DMA.
Definition: IfxGeth_cfg.h:86
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:68
IfxGeth_TxDescr3_RF_Bits::SAIC
uint32 SAIC
SA Insertion Control.
Definition: IfxGeth.h:538
IfxGeth_mtl_setRxStoreAndForward
void IfxGeth_mtl_setRxStoreAndForward(Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId, boolean enabled)
Sets the Receive Store And Forward for the selected RX Queue.
Definition: IfxGeth.c:305
IfxGeth_DmaChannel_2
Dma Channel 2.
Definition: IfxGeth.h:102
IfxGeth_mtl_setTxSchedulingAlgorithm
IFX_INLINE void IfxGeth_mtl_setTxSchedulingAlgorithm(Ifx_GETH *gethSFR, IfxGeth_TxSchedulingAlgorithm schedulingAlgorithm)
sets the Tx Scheduling algorithm
Definition: IfxGeth.h:1543
IfxGeth_RxDescr3::R
IfxGeth_RxDescr3_RF_Bits R
Read Format Bitfiled Access.
Definition: IfxGeth.h:610
IfxGeth_Eth_RmiiPins
Port pins for RMII mode configuration.
Definition: IfxGeth_Eth.h:327
IfxGeth_Eth_MiiPins::rxClk
IfxGeth_Rxclk_In * rxClk
Pointer to RXCLK input pin config.
Definition: IfxGeth_Eth.h:278
IfxGeth_dma_startReceiver
IFX_INLINE void IfxGeth_dma_startReceiver(Ifx_GETH *gethSFR, IfxGeth_RxDmaChannel channel)
starts the receiver of selected Rx channel of DMA
Definition: IfxGeth.h:1428
IfxGeth_Eth_MacConfig::duplexMode
IfxGeth_DuplexMode duplexMode
Duplex Mode.
Definition: IfxGeth_Eth.h:407
IfxGeth_Eth_MiiPins::mdc
IfxGeth_Mdc_Out * mdc
Pointer to MDC output pin config.
Definition: IfxGeth_Eth.h:291
IfxGeth_Eth_MiiPins::rxd3
IfxGeth_Rxd_In * rxd3
Pointer to RXD3 input pin config.
Definition: IfxGeth_Eth.h:284
IfxGeth_dma_setMixedBurst
IFX_INLINE void IfxGeth_dma_setMixedBurst(Ifx_GETH *gethSFR, boolean enabled)
Enables/Disables Mixed Burst Length.
Definition: IfxGeth.h:1367
IfxGeth_Eth_MiiPins::txClk
IfxGeth_Txclk_In * txClk
Pointer to TXCLK input pin config.
Definition: IfxGeth_Eth.h:277
IfxGeth_Eth_FrameConfig::channelId
IfxGeth_TxDmaChannel channelId
Tx DMA channel Index.
Definition: IfxGeth_Eth.h:490
IfxGeth_RxDescrList::descr
volatile IfxGeth_RxDescr descr[IFXGETH_MAX_RX_DESCRIPTORS]
list of RX descriptors
Definition: IfxGeth.h:688
IfxGeth_MtlInterruptFlag_txQueueUnderflow
Transmit Queue Underflow.
Definition: IfxGeth.h:139
IfxGeth_Eth_MtlConfig::rxArbitrationAlgorithm
IfxGeth_RxArbitrationAlgorithm rxArbitrationAlgorithm
Rx Arbitration Algorithm for Rx queues when no of queues are more than 1.
Definition: IfxGeth_Eth.h:421
IfxGeth_Eth_RxQueueConfig::rxDmaChannelMap
IfxGeth_RxDmaChannel rxDmaChannelMap
Mapped DMA Channel of Rx Queue.
Definition: IfxGeth_Eth.h:360
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:151
IfxGeth_Eth_MacConfig::loopbackMode
IfxGeth_LoopbackMode loopbackMode
Loopback mode enable/disable.
Definition: IfxGeth_Eth.h:409
IfxGeth_Rxctl_In
RXCTL pin mapping structure.
Definition: IfxGeth_PinMap.h:80
IfxGeth_Eth_TxChannelConfig::maxBurstLength
IfxGeth_DmaBurstLength maxBurstLength
Maximum burst length of the channel.
Definition: IfxGeth_Eth.h:369
IfxGeth_mtl_setRxForwardErrorPacket
void IfxGeth_mtl_setRxForwardErrorPacket(Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId, boolean enabled)
Sets the Receive Forward Error Packets for the selected RX Queue.
Definition: IfxGeth.c:245
IfxGeth_Eth
GETH driver Handle.
Definition: IfxGeth_Eth.h:463
IfxGeth_dma_setRxDescriptorListAddress
IFX_INLINE void IfxGeth_dma_setRxDescriptorListAddress(Ifx_GETH *gethSFR, IfxGeth_RxDmaChannel channel, uint32 address)
sets the base address of the first descriptor in the Receive descriptor list
Definition: IfxGeth.h:1380
IfxGeth_enableModule
void IfxGeth_enableModule(Ifx_GETH *gethSFR)
Enables the clock for GETH module.
Definition: IfxGeth.c:45
IfxGeth_Txctl_Out
TXCTL pin mapping structure.
Definition: IfxGeth_PinMap.h:185
IfxGeth_Eth_Config::phyInterfaceMode
IfxGeth_PhyInterfaceMode phyInterfaceMode
External Phy Interface RMII Mode.
Definition: IfxGeth_Eth.h:477
IfxGeth_Eth_RgmiiPins::rxCtl
IfxGeth_Rxctl_In * rxCtl
Pointer to RXCTL input pin config.
Definition: IfxGeth_Eth.h:319
IfxGeth_mtl_setRxQueueDmaChannelMapping
IFX_INLINE void IfxGeth_mtl_setRxQueueDmaChannelMapping(Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId, IfxGeth_RxDmaChannel dmaChannel)
Sets the selected DMA Channel mapping for the selected Rx Queue.
Definition: IfxGeth.h:1531
IfxGeth_Rxer_In
RXER pin mapping structure.
Definition: IfxGeth_PinMap.h:193
IfxGeth_mtl_clearInterruptFlag
void IfxGeth_mtl_clearInterruptFlag(Ifx_GETH *gethSFR, IfxGeth_MtlQueue queueId, IfxGeth_MtlInterruptFlag flag)
Clears the selected Mtl interrupt flag.
Definition: IfxGeth.c:130
IfxGeth_Eth_RgmiiPins::grefClk
IfxGeth_Grefclk_In * grefClk
Pointer to GREFCLK input pin config.
Definition: IfxGeth_Eth.h:322
IfxGeth_Eth_MiiPins::rxd0
IfxGeth_Rxd_In * rxd0
Pointer to RXD0 input pin config.
Definition: IfxGeth_Eth.h:281
IfxGeth_dma_isSoftwareResetDone
IFX_INLINE boolean IfxGeth_dma_isSoftwareResetDone(Ifx_GETH *gethSFR)
Wiats until software reset of MAC and DMA controller is done or until timout.
Definition: IfxGeth.h:1349
IfxGeth_Eth_DmaConfig::addressAlignedBeatsEnabled
boolean addressAlignedBeatsEnabled
Enable/Disable Address Aligned Beats.
Definition: IfxGeth_Eth.h:394
IfxGeth_RxDmaChannel_0
Rx Dma Channel 0.
Definition: IfxGeth.h:225
IfxGeth_Eth_TxQueueConfig::txQueueUnderflowInterruptEnabled
boolean txQueueUnderflowInterruptEnabled
Enable/Disable Tx Queue Underflow Interrupt.
Definition: IfxGeth_Eth.h:381
IfxGeth_Eth_RxQueueConfig::forwardUndersizedGoodPacket
boolean forwardUndersizedGoodPacket
Undersized Good Packet Forwarding Enable/Disable.
Definition: IfxGeth_Eth.h:358
IfxGeth_Eth::txChannel
IfxGeth_Eth_TxChannel txChannel[IFXGETH_NUM_TX_CHANNELS]
Tx Channels handle of selected Channels.
Definition: IfxGeth_Eth.h:468
IfxGeth_mac_setPromiscuousMode
IFX_INLINE void IfxGeth_mac_setPromiscuousMode(Ifx_GETH *gethSFR, boolean enabled)
Enables / Disables Promiscuous Mode.
Definition: IfxGeth.h:1513
IfxGeth_Eth_MiiPins
Port pins for MII mode configuration.
Definition: IfxGeth_Eth.h:273
IfxGeth_Eth_Config::mtl
IfxGeth_Eth_MtlConfig mtl
Configuration Structure for the MTL initialisation.
Definition: IfxGeth_Eth.h:480
IfxGeth_dma_enableInterrupt
IFX_INLINE void IfxGeth_dma_enableInterrupt(Ifx_GETH *gethSFR, IfxGeth_DmaChannel channelId, IfxGeth_DmaInterruptFlag flag)
Enables the selected DMA interrupt.
Definition: IfxGeth.h:1335
IfxGeth_Eth_MtlConfig::txQueue
IfxGeth_Eth_TxQueueConfig txQueue[IFXGETH_NUM_TX_QUEUES]
Tx queue configurations of selected queues.
Definition: IfxGeth_Eth.h:422
IfxGeth_mac_setMacAddress
void IfxGeth_mac_setMacAddress(Ifx_GETH *gethSFR, uint8 *macAddress)
Sets the MAC Address.
Definition: IfxGeth.c:93
IfxGeth_Eth_MiiPins::rxEr
IfxGeth_Rxer_In * rxEr
Pointer to RXER input pin config.
Definition: IfxGeth_Eth.h:280
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxGeth_TxDescr2_RF_Bits::VTIR
uint32 VTIR
VLAN Tag Insertion or Replacement.
Definition: IfxGeth.h:516
IfxGeth_Eth_MtlConfig::txSchedulingAlgorithm
IfxGeth_TxSchedulingAlgorithm txSchedulingAlgorithm
Tx Scheduling Algorithm for Tx queues when no of queues are more than 1.
Definition: IfxGeth_Eth.h:419
IfxGeth_RxDescr::RDES3
IfxGeth_RxDescr3 RDES3
Rx Descriptor DWORD 3.
Definition: IfxGeth.h:667
IfxGeth_Eth_DmaConfig::txInterrupt
IfxGeth_Eth_DmaInterruptConfig txInterrupt[IFXGETH_NUM_DMA_CHANNELS]
Transmit Interrupt configuration structure for DMA Channel.
Definition: IfxGeth_Eth.h:399
IfxGeth_DmaChannel_1
Dma Channel 1.
Definition: IfxGeth.h:101
IfxGeth_ServiceRequest_1
Service Request SR1.
Definition: IfxGeth.h:246
IfxGeth_Rxd_In
RXD pin mapping structure.
Definition: IfxGeth_PinMap.h:120
IfxGeth_Eth_getActualTxDescriptor
IFX_INLINE volatile IfxGeth_TxDescr * IfxGeth_Eth_getActualTxDescriptor(IfxGeth_Eth *geth, IfxGeth_TxDmaChannel channelId)
Returns the pointer to current TX descriptor.
Definition: IfxGeth_Eth.h:1087
IfxGeth_mtl_enableTxQueue
void IfxGeth_mtl_enableTxQueue(Ifx_GETH *gethSFR, IfxGeth_TxMtlQueue queueId)
Enables the selected TX Queue.
Definition: IfxGeth.c:200
IfxGeth_Eth_Config::pins
IfxGeth_Eth_PinConfig pins
COnfiguration structure for Pins.
Definition: IfxGeth_Eth.h:478
IfxGeth_mtl_setRxQueueSize
void IfxGeth_mtl_setRxQueueSize(Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId, IfxGeth_QueueSize queueSize)
Sets the size of the selected RX Queue.
Definition: IfxGeth.c:285
IfxGeth_mac_enableReceiver
IFX_INLINE void IfxGeth_mac_enableReceiver(Ifx_GETH *gethSFR)
Enables the Receiver of MAC Core.
Definition: IfxGeth.h:1464
IfxGeth_LoopbackMode_disable
Disable loopback.
Definition: IfxGeth.h:302
IfxGeth_Eth_getTransmitBuffer
void * IfxGeth_Eth_getTransmitBuffer(IfxGeth_Eth *geth, IfxGeth_TxDmaChannel channelId)
Get the transmit buffer pointer of current descriptor.
Definition: IfxGeth_Eth.c:242
IfxGeth_mtl_setTxStoreAndForward
void IfxGeth_mtl_setTxStoreAndForward(Ifx_GETH *gethSFR, IfxGeth_TxMtlQueue queueId, boolean enabled)
Sets the Transmit Store And Forward for teh selected TX Queue.
Definition: IfxGeth.c:345
IfxGeth_Eth_RxQueueConfig::rxQueueOverflowInterruptEnabled
boolean rxQueueOverflowInterruptEnabled
Enable/Disable Rx Queue Overflow Interrupt.
Definition: IfxGeth_Eth.h:361
IfxGeth_Eth_RgmiiPins::txClk
IfxGeth_Txclk_Out * txClk
Pointer to TXCLK input pin config.
Definition: IfxGeth_Eth.h:308
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:81
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxGeth_Eth_DmaConfig::numOfRxChannels
uint32 numOfRxChannels
Number of Rx Dma channels.
Definition: IfxGeth_Eth.h:393
IfxGeth_mtl_setRxForwardUndersizedGoodPacket
void IfxGeth_mtl_setRxForwardUndersizedGoodPacket(Ifx_GETH *gethSFR, IfxGeth_RxMtlQueue queueId, boolean enabled)
Sets the Receive Forward Undersized Good Packets for the selected RX Queue.
Definition: IfxGeth.c:265
IfxGeth_Eth_sendTransmitBuffer
void IfxGeth_Eth_sendTransmitBuffer(IfxGeth_Eth *geth, uint32 packetLength, IfxGeth_TxDmaChannel channelId)
Transmits a frame from a single channel.
Definition: IfxGeth_Eth.c:640
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:248
IfxGeth_Eth_MtlConfig::numOfTxQueues
uint32 numOfTxQueues
Number of Tx Queues, will also be used to enable the selected number of queues.
Definition: IfxGeth_Eth.h:418
IfxGeth_TxDescr::TDES2
IfxGeth_TxDescr2 TDES2
Tx Descriptor DWORD 2.
Definition: IfxGeth.h:676
IfxGeth_Eth_DmaConfig::mixedBurstEnabled
boolean mixedBurstEnabled
Enable/Disable Mixed Burst length.
Definition: IfxGeth_Eth.h:396
IfxGeth_Eth_MtlConfig::interrupt
IfxGeth_Eth_MtlInterruptConfig interrupt
Interrupt configuration structure for MTL block.
Definition: IfxGeth_Eth.h:424
IfxGeth_dma_clearInterruptFlag
IFX_INLINE void IfxGeth_dma_clearInterruptFlag(Ifx_GETH *gethSFR, IfxGeth_DmaChannel channelId, IfxGeth_DmaInterruptFlag flag)
Returns the status of selected DMA interrupt flag.
Definition: IfxGeth.h:1321
IfxGeth_LineSpeed_100Mbps
100 Mbps
Definition: IfxGeth.h:130
IfxGeth_Eth::gethSFR
Ifx_GETH * gethSFR
Pointer to GETH register base address.
Definition: IfxGeth_Eth.h:465
IfxGeth_Eth_FrameConfig::packetLength
uint32 packetLength
the length of the packet to be transmitted in bytes
Definition: IfxGeth_Eth.h:491
IfxGeth_MtlQueue
IfxGeth_MtlQueue
MTL Queue ID.
Definition: IfxGeth.h:146
IfxGeth_DmaBurstLength_0
maximum burst length 0
Definition: IfxGeth.h:87
IfxGeth_getSrcPointer
volatile Ifx_SRC_SRCR * IfxGeth_getSrcPointer(Ifx_GETH *gethSFR, IfxGeth_ServiceRequest serviceRequest)
Returns the Src Pointer of the selected GETH service request node.
Definition: IfxGeth.c:60
IfxGeth_Eth_TxChannel::txDescrPtr
volatile IfxGeth_TxDescr * txDescrPtr
Pointer to Tx Descriptor (current descriptor)
Definition: IfxGeth_Eth.h:452
IfxGeth_Eth_rxDescrList
IfxGeth_RxDescrList IfxGeth_Eth_rxDescrList[IFXGETH_NUM_MODULES][IFXGETH_NUM_RX_CHANNELS]
Definition: IfxGeth_Eth.c:53
IfxGeth_DmaInterruptFlag_transmitInterrupt
Transmit Interrupt.
Definition: IfxGeth.h:110
IfxGeth_Eth_setupRgmiiInputPins
void IfxGeth_Eth_setupRgmiiInputPins(IfxGeth_Eth *geth, const IfxGeth_Eth_RgmiiPins *rgmiiPins)
Set up RGMII mode input pins.
Definition: IfxGeth_Eth.c:839
IfxGeth_Eth_startTransmitter
void IfxGeth_Eth_startTransmitter(IfxGeth_Eth *geth, IfxGeth_TxDmaChannel channelId)
Start the transmitter functions of MAC and selected channel of DMA.
Definition: IfxGeth_Eth.c:1046
IfxGeth_RxDescr3::U
uint32 U
Unsigned access.
Definition: IfxGeth.h:613
IfxGeth_dma_setRxBufferSize
IFX_INLINE void IfxGeth_dma_setRxBufferSize(Ifx_GETH *gethSFR, IfxGeth_RxDmaChannel channel, uint16 size)
sets the size of the rx buffers in descriptors for selected Rx channel of DMA
Definition: IfxGeth.h:1373
IfxGeth_RxDescr
Rx Descriptor.
Definition: IfxGeth.h:662
IfxGeth_dma_setFixedBurst
IFX_INLINE void IfxGeth_dma_setFixedBurst(Ifx_GETH *gethSFR, boolean enabled)
Enables/Disables Fixed Burst Length.
Definition: IfxGeth.h:1361
IfxGeth_TxDescr
Tx Descriptor.
Definition: IfxGeth.h:672
IfxGeth_Eth_TxChannelConfig
Configuration sturcture for DMA tx channel.
Definition: IfxGeth_Eth.h:366
IfxGeth_getIndex
IfxGeth_Index IfxGeth_getIndex(Ifx_GETH *geth)
API to get the resource index of the GETH specified.
Definition: IfxGeth.c:478
IfxGeth_Eth_MiiPins::rxd1
IfxGeth_Rxd_In * rxd1
Pointer to RXD1 input pin config.
Definition: IfxGeth_Eth.h:282
IfxGeth_Eth_DmaConfig::txChannel
IfxGeth_Eth_TxChannelConfig txChannel[IFXGETH_NUM_TX_CHANNELS]
Tx Channels configurations of selected Channels.
Definition: IfxGeth_Eth.h:397
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxGeth_Eth_MtlConfig
Configuration Structure for the MTL initialisation.
Definition: IfxGeth_Eth.h:416
IfxGeth_Eth_sendFrame
void IfxGeth_Eth_sendFrame(IfxGeth_Eth *geth, IfxGeth_Eth_FrameConfig *config)
Transmits a frame from a single channel.
Definition: IfxGeth_Eth.c:634
IfxGeth_Crs_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxGeth_PinMap.h:59
IfxGeth_TxDescr3_RF_Bits::LD
uint32 LD
Last Descriptor.
Definition: IfxGeth.h:540
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
IfxGeth_RxMtlQueue
IfxGeth_RxMtlQueue
Rx MTL Queue ID.
Definition: IfxGeth.h:233
IfxGeth_TxDescr::TDES1
IfxGeth_TxDescr1 TDES1
Tx Descriptor DWORD 1.
Definition: IfxGeth.h:675
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxGeth_Txen_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxGeth_PinMap.h:173
IfxGeth_Eth.h
GETH ETH details.
IfxGeth_dma_setAddressAlignedBeats
IFX_INLINE void IfxGeth_dma_setAddressAlignedBeats(Ifx_GETH *gethSFR, boolean enabled)
Enables/Disables Address aligned beats.
Definition: IfxGeth.h:1355
IfxGeth_TxDescr3_RF_Bits::TSE
uint32 TSE
TCP Segmentation Enable.
Definition: IfxGeth.h:536
IfxGeth_RxDescr3_RF_Bits::BUF1V
uint32 BUF1V
Buffer 1 Address Valid.
Definition: IfxGeth.h:413
IfxGeth_Eth_txDescrList
IfxGeth_TxDescrList IfxGeth_Eth_txDescrList[IFXGETH_NUM_MODULES][IFXGETH_NUM_TX_CHANNELS]
Definition: IfxGeth_Eth.c:55
IfxGeth_Eth_MiiPins::crs
IfxGeth_Crs_In * crs
pointer to CRS input pin config
Definition: IfxGeth_Eth.h:275
IfxGeth_TxDescr3_RF_Bits::CPC
uint32 CPC
CRC Pad Control.
Definition: IfxGeth.h:539
IfxGeth_dma_applySoftwareReset
IFX_INLINE void IfxGeth_dma_applySoftwareReset(Ifx_GETH *gethSFR)
Applies a software reset of MAC and DMA controller.
Definition: IfxGeth.h:1309
IfxGeth_Eth_DmaInterruptConfig::provider
IfxSrc_Tos provider
Interrupt service provider.
Definition: IfxGeth_Eth.h:268
IfxGeth_Eth_RxChannelConfig::rxBuffer1StartAddress
uint32 * rxBuffer1StartAddress
Start address of Rx Buffer 1.
Definition: IfxGeth_Eth.h:347
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:675
IfxGeth_RxDescr::RDES0
IfxGeth_RxDescr0 RDES0
Rx Descriptor DWORD 0.
Definition: IfxGeth.h:664
IFXGETH_MAX_TIMEOUT_VALUE
#define IFXGETH_MAX_TIMEOUT_VALUE
Maximum timeout value to wait against at.
Definition: IfxGeth_cfg.h:90
IfxGeth_TxDescr2_RF_Bits::B1L
uint32 B1L
Header Length or Buffer 1 Length.
Definition: IfxGeth.h:515
IfxGeth_Eth_DmaConfig::numOfTxChannels
uint32 numOfTxChannels
Number of Tx Dma channels.
Definition: IfxGeth_Eth.h:392
IfxGeth_dma_setRxDescriptorRingLength
IFX_INLINE void IfxGeth_dma_setRxDescriptorRingLength(Ifx_GETH *gethSFR, IfxGeth_RxDmaChannel channel, uint32 length)
sets the Length of the Rx descriptors ring
Definition: IfxGeth.h:1386
IfxGeth_TxDmaChannel_1
Tx Dma Channel 1.
Definition: IfxGeth.h:262
IfxGeth_mac_setAllMulticastPassing
IFX_INLINE void IfxGeth_mac_setAllMulticastPassing(Ifx_GETH *gethSFR, boolean enabled)
Enables / Disables Passing of All Multicast packets.
Definition: IfxGeth.h:1476
IfxGeth_Eth_initTransmitDescriptors
void IfxGeth_Eth_initTransmitDescriptors(IfxGeth_Eth *geth, IfxGeth_Eth_TxChannelConfig *config)
Initialises the Tx descriptors of a single channel.
Definition: IfxGeth_Eth.c:593
IfxGeth_Eth_RxChannelConfig
Configuration sturcture for DMA rx channel.
Definition: IfxGeth_Eth.h:342
IfxGeth_Eth_MacConfig
Configuration Structure for the MAC initialisation.
Definition: IfxGeth_Eth.h:405
IfxGeth_dma_setTxDescriptorListAddress
IFX_INLINE void IfxGeth_dma_setTxDescriptorListAddress(Ifx_GETH *gethSFR, IfxGeth_TxDmaChannel channel, uint32 address)
sets the base address of the first descriptor in the Transmit descriptor list
Definition: IfxGeth.h:1404


iLLD_TC38A: IfxGeth_Eth.h Source File

  • Geth
  • Eth
IfxGeth_Eth.h
Go to the documentation of this file.
1 /**
2 * \file IfxGeth_Eth.h
3 * \brief GETH ETH details
4 * \ingroup IfxLld_Geth
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 * \defgroup IfxLld_Geth_Eth_Usage How to use the Geth Eth Interface driver?
43 * \ingroup IfxLld_Geth
44 *
45 * In the following sections it will be described, how to integrate the driver into the application framework.
46 *
47 * \section IfxLld_Geth_Eth_Preparation Preparation
48 * \subsection IfxLld_Geth_Eth_Include Include Files
49 *
50 * Include following header file into your C code:
51 * \code
52 * #include <Geth/Eth/IfxGeth_Eth.h>
53 * \endcode
54 *
55 * \subsection IfxLld_Geth_Eth_Variables Variables
56 *
57 * Declare the Geth handle and the Data buffers as global variables in your C code:
58 *
59 * Note: MAC addds 4 bytes FCS at the end of each packet which will be reflected in RX Buffer.
60 * If the frame size is equal to buffer size then Rx buffer declaration should be as below
61 * \code
62 * uint8 channel0RxBuffer1[IFXGETH_MAX_RX_BUFFER_SIZE+4];
63 * \endcode
64 *
65 *
66 * \code
67 * // used globally
68 * IfxGeth_Eth geth;
69 *
70 * #define IFXGETH_MAX_TX_DESCRIPTORS 4
71 * #define IFXGETH_MAX_RX_DESCRIPTORS 4
72 *
73 * #define IFXGETH_MAX_TX_BUFFER_SIZE 256 // bytes
74 * #define IFXGETH_MAX_RX_BUFFER_SIZE 256 // bytes
75 * #define IFXGETH_HEADER_LENGTH 14 // words
76 *
77 * uint8 channel0TxBuffer1[IFXGETH_MAX_TX_BUFFER_SIZE];
78 * uint8 channel0RxBuffer1[IFXGETH_MAX_RX_BUFFER_SIZE];
79 *
80 * const uint8 myMacAddress[6] = {0x00, 0x11, 0x22, 0x33, 0x44, 0x55};
81 * \endcode
82 *
83 * \subsection IfxLld_Geth_Eth_Init Module Initialisation
84 *
85 * The module initialisation can be done in the same function. Here an example:
86 * \code
87 * // create module config
88 * IfxGeth_Eth_Config config;
89 * // Geth instance index
90 * IfxGeth_Index gethInst;
91 *
92 * // Initialise configuration of module
93 * IfxGeth_Eth_initModuleConfig(&config, &MODULE_GETH);
94 *
95 * // Get the Geth instance from Module address
96 * gethInst = IfxGeth_getIndex(geth[geth_inst].gethSFR);
97 *
98 * config.phyInterfaceMode = IfxGeth_PhyInterfaceMode_rmii;
99 *
100 * // MAC core configuration
101 * config.macConfig.lineSpeed = IfxGeth_LineSpeed_100Mbps;
102 * config.macConfig.loopbackMode = IfxGeth_LoopbackMode_disable;
103 * config.macConfig.macAddress[0] = myMacAddress[0];
104 * config.macConfig.macAddress[1] = myMacAddress[1];
105 * config.macConfig.macAddress[2] = myMacAddress[2];
106 * config.macConfig.macAddress[3] = myMacAddress[3];
107 * config.macConfig.macAddress[4] = myMacAddress[4];
108 * config.macConfig.macAddress[5] = myMacAddress[5];
109 *
110 * // MTL configuration
111 * config.mtlConfig.numOfTxQueues = 1;
112 * config.mtlConfig.numOfRxQueues = 1;
113 * config.mtlConfig.txQueueConfig[0].txQueueSize = IfxGeth_QueueSize_256Bytes;
114 * config.mtlConfig.rxQueueConfig[0].rxQueueSize = IfxGeth_QueueSize_256Bytes;
115 * config.mtlConfig.rxQueueConfig[0].rxDmaChannelMap = IfxEth_RxDmaChannel_0;
116 *
117 * config.dmaConfig.numOfTxChannels = 1;
118 * config.dmaConfig.numOfRxChannels = 1;
119 * config.dmaConfig.txChannel[0].channelId = IfxGeth_TxDmaChannel_0;
120 * config.dmaConfig.txChannel[0].txDescrList = &IfxGeth_txDescrList[gethInst][0]; //Initialise tx desc list for the Geth instance
121 * config.dmaConfig.txChannel[0].txBuffer1StartAddress = &channel0TxBuffer1[0]; // user buffer
122 * config.dmaConfig.txChannel[0].txBuffer1Size = IFXGETH_MAX_TX_BUFFER_SIZE; // used to calculate the next descriptor buffer offset
123 *
124 * config.dmaConfig.rxChannel[0].channelId = IfxGeth_RxDmaChannel_0;
125 * config.dmaConfig.rxChannel[0].rxDescrList = &IfxGeth_rxDescrList[gethInst][0]; //Initialise rx desc list for the Geth instance
126 * config.dmaConfig.rxChannel[0].rxBuffer1StartAddress = &channel0RxBuffer1[0]; // user buffer
127 * config.dmaConfig.rxChannel[0].rxBuffer1Size = IFXGETH_MAX_RX_BUFFER_SIZE; // user defined variable
128 *
129 * config.dmaConfig.txInterrupt[0].channelId = IfxGeth_DmaChannel_0;
130 * config.dmaConfig.txInterrupt[0].priority = 10; // priority
131 * config.dmaConfig.txInterrupt[0].provider = IfxSrc_Tos_cpu0;
132 * config.dmaConfig.rxInterrupt[0].channelId = IfxGeth_DmaChannel_0;
133 * config.dmaConfig.rxInterrupt[0].priority = 11; // priority
134 * config.dmaConfig.rxInterrupt[0].provider = IfxSrc_Tos_cpu0;
135 *
136 * // initialise themodule
137 * IfxGeth_Eth_initModule(&geth, &config);
138 *
139 * // and enable transmitter/receiver
140 * IfxGeth_Eth_startTransmitters(&geth, 1);
141 * IfxGeth_Eth_startReceivers(&geth, 1);
142 * \endcode
143 *
144 *
145 * Note: Application should explicitly configure the system DMA, if system DMA is selected as the service provider for the interrupt.
146 *
147 * The ETH is ready for use now!
148 *
149 *
150 * \section IfxLld_Geth_Eth_DataTransfers Data Transfers
151 * \subsection IfxLld_Geth_Eth_DataTransfers_Transmit Transmission
152 * \code
153 * uint32 payloadLength = 8; // 8 bytes
154 * uint32 packetLength = IFXGETH_HEADER_LENGTH + payloadLength;
155 *
156 * // get free buffer
157 * uint8 *pTxBuf = (uint8*) IfxGeth_Eth_waitTransmitBuffer(&geth, IfxGeth_TxDmaChannel_0);
158 * // write the header
159 * IfxGeth_Eth_writeHeader(&geth, pTxBuf, (uint8 *)myMacAddress, (uint8 *)myMacAddress, payloadLength);
160 * // write the payload
161 * uint32 i;
162 * for(i = IFXGETH_HEADER_LENGTH; i < packetLength; ++i) {
163 * pTxBuf[i] = i - 13;
164 * }
165 *
166 * // clear the TX interrupt status
167 * IfxGeth_dma_clearInterruptFlag(geth->gethSFR, IfxGeth_DmaChannel_0,IfxGeth_DmaInterruptFlag_transmitInterrupt) ;
168 *
169 * IfxGeth_Eth_sendTransmitBuffer(&geth, packetLength, IfxGeth_TxDmaChannel_0);
170 *
171 * // wait until buffer has been transmitted
172 * while( IfxGeth_dma_isInterruptFlagSet(geth->gethSFR, IfxGeth_DmaChannel_0, IfxGeth_DmaInterruptFlag_transmitInterrupt) == FALSE );
173 *
174 * // clear the TX interrupt status for the next interrupt to come
175 * IfxGeth_dma_clearInterruptFlag(geth->gethSFR, IfxGeth_DmaChannel_0, IfxGeth_DmaInterruptFlag_transmitInterrupt) ;
176 * \endcode
177 *
178 * \subsection IfxLld_Geth_Eth_DataTransfers_Receive Receive
179 * \code
180 * // wait until data is been received
181 * while(IfxGeth_Eth_isRxDataAvailable(&geth, IfxGeth_RxDmaChannel_0)!= TRUE);
182 *
183 * // wake up the receiver and get the recieve buffer
184 * uint8 *pRxBuf = (uint8*)IfxGeth_Eth_getReceiveBuffer(&geth, IfxGeth_RxDmaChannel_0);
185 *
186 * // update the descreptor pointer for next packet
187 * // Free the receive buffer, enabling it for the further reception
188 * IfxGeth_Eth_freeReceiveBuffer(&geth, IfxGeth_RxDmaChannel_0);
189 *
190 * // data is available in pRxBuf
191 * \endcode
192 *
193 * \subsection IfxLld_Geth_Eth_DataTransfers_GiantFrame Giant Frame Transmission
194 * Giant frames are supported by ethernet driver.
195 * By default any frames greater than 1518 bytes are considered as giant frames in the code.
196 * Giant frames of length 16376 bytes can be transmitted.
197 * Giant frames of length 16380 bytes can be received by the MAC.(Including the 4 bytes of FCS added by transmitter MAC).
198 *
199 * The minimum allowed packet size above which the frame is indicated as giant frame is configured as below
200 *
201 * In the module initialisation section, make changes
202 * \code
203 * IfxGeth_Eth_Config config;
204 *
205 * IfxGeth_Eth_initModuleConfig(&config, &MODULE_GETH);
206 * config.macConfig.maxPacketSize = 2000;
207 *
208 * \endcode
209 *
210 * The above code ensures that any frame of frame size greater than 2000 bytes are set as giant frame in Rx descriptor status.
211 * Note: This frame size includes the 4 bytes FCS added by the transmitter MAC. Make sure that an Rx buffer has enough space to recieve the giant frame.
212 *
213 * There are 3 categories under which giant frames can be categoried:
214 * 1. Frame size = 1518 - If frame size greater than 1518 is marked as giant frame
215 * 2. Frame size = 2000 - If frame size greater than 2000 is marked as giant frame
216 * 3. Frame size = 9018 - If frame size greater than 9018 is marked as giant frame
217 * 4. Any other value Frame size < 16380 - If packet size greater than configured bytes is marked as giant frame
218 *
219 * \subsection IfxLld_Geth_Eth_Miilite MII lite mode
220 * MII lite mode is supported .
221 * Application should set the below pins to NULL_PTR to enable the MII lite mode.
222 * IfxGeth_Crs_In *crs
223 * IfxGeth_Col_In *col
224 * IfxGeth_Rxer_In *rxEr
225 * IfxGeth_Txer_Out *txEr;
226 *
227 * \defgroup IfxLld_Geth_Eth ETH
228 * \ingroup IfxLld_Geth
229 * \defgroup IfxLld_Geth_Eth_DataStructures DataStructures
230 * \ingroup IfxLld_Geth_Eth
231 * \defgroup IfxLld_Geth_Eth_MAC_Functions MAC Functions
232 * \ingroup IfxLld_Geth_Eth
233 * \defgroup IfxLld_Geth_Eth_Module_Functions Module Functions
234 * \ingroup IfxLld_Geth_Eth
235 * \defgroup IfxLld_Geth_Eth_MTL_Functions MTL Functions
236 * \ingroup IfxLld_Geth_Eth
237 * \defgroup IfxLld_Geth_Eth_DMA_Functions DMA Functions
238 * \ingroup IfxLld_Geth_Eth
239 * \defgroup IfxLld_Geth_Eth_Variables Variables
240 * \ingroup IfxLld_Geth_Eth
241 */
242
243 #ifndef IFXGETH_ET_H
244 #define IFXGETH_ET_H 1
245
246 /******************************************************************************/
247 /*----------------------------------Includes----------------------------------*/
248 /******************************************************************************/
249
250 #include "_Utilities/Ifx_Assert.h"
251 #include "Geth/Std/IfxGeth.h"
252 #include "_PinMap/IfxGeth_PinMap.h"
253 #include "IfxPort_reg.h"
254 #include "IfxPort_bf.h"
255
256 /******************************************************************************/
257 /*-----------------------------Data Structures--------------------------------*/
258 /******************************************************************************/
259
260 /** \addtogroup IfxLld_Geth_Eth_DataStructures
261 * \{ */
262 /** \brief Interrupt configuration structure for DMA Channel
263 */
264 typedef struct
265 {
266 IfxGeth_DmaChannel channelId; /**< \brief DMA channel ID (irrespective of TX and Rx for interrupt configuration) */
267 Ifx_Priority priority; /**< \brief Interrupt service priority */
268 IfxSrc_Tos provider; /**< \brief Interrupt service provider */
269 } IfxGeth_Eth_DmaInterruptConfig;
270
271 /** \brief Port pins for MII mode configuration
272 */
273 typedef struct
274 {
275 IfxGeth_Crs_In *crs; /**< \brief pointer to CRS input pin config */
276 IfxGeth_Col_In *col; /**< \brief pointer to COL input pin config */
277 IfxGeth_Txclk_In *txClk; /**< \brief Pointer to TXCLK input pin config */
278 IfxGeth_Rxclk_In *rxClk; /**< \brief Pointer to RXCLK input pin config */
279 IfxGeth_Rxdv_In *rxDv; /**< \brief Pointer to RXDV input pin config */
280 IfxGeth_Rxer_In *rxEr; /**< \brief Pointer to RXER input pin config */
281 IfxGeth_Rxd_In *rxd0; /**< \brief Pointer to RXD0 input pin config */
282 IfxGeth_Rxd_In *rxd1; /**< \brief Pointer to RXD1 input pin config */
283 IfxGeth_Rxd_In *rxd2; /**< \brief Pointer to RXD2 input pin config */
284 IfxGeth_Rxd_In *rxd3; /**< \brief Pointer to RXD3 input pin config */
285 IfxGeth_Txen_Out *txEn; /**< \brief Pointer to TXEN output pin config */
286 IfxGeth_Txer_Out *txEr; /**< \brief Pointer to TXER output pin config */
287 IfxGeth_Txd_Out *txd0; /**< \brief Pointer to TXD0 output pin config */
288 IfxGeth_Txd_Out *txd1; /**< \brief Pointer to TXD1 output pin config */
289 IfxGeth_Txd_Out *txd2; /**< \brief Pointer to TXD2 output pin config */
290 IfxGeth_Txd_Out *txd3; /**< \brief Pointer to TXD3 output pin config */
291 IfxGeth_Mdc_Out *mdc; /**< \brief Pointer to MDC output pin config */
292 IfxGeth_Mdio_InOut *mdio; /**< \brief Pointer to MDIO pin config */
293 } IfxGeth_Eth_MiiPins;
294
295 /** \brief Interrupt configuration structure for MTL block
296 */
297 typedef struct
298 {
299 IfxGeth_ServiceRequest serviceRequest; /**< \brief Service Request node for MTL interrupt */
300 Ifx_Priority priority; /**< \brief Interrupt service priority */
301 IfxSrc_Tos provider; /**< \brief Interrupt service provider */
302 } IfxGeth_Eth_MtlInterruptConfig;
303
304 /** \brief Port pins for RGMII mode configuration
305 */
306 typedef struct
307 {
308 IfxGeth_Txclk_Out *txClk; /**< \brief Pointer to TXCLK input pin config */
309 IfxGeth_Txd_Out *txd0; /**< \brief Pointer to TXD0 output pin config */
310 IfxGeth_Txd_Out *txd1; /**< \brief Pointer to TXD1 output pin config */
311 IfxGeth_Txd_Out *txd2; /**< \brief Pointer to TXD2 output pin config */
312 IfxGeth_Txd_Out *txd3; /**< \brief Pointer to TXD3 output pin config */
313 IfxGeth_Txctl_Out *txCtl; /**< \brief Pointer to TXCTL output pin config */
314 IfxGeth_Rxclk_In *rxClk; /**< \brief Pointer to RXCLK input pin config */
315 IfxGeth_Rxd_In *rxd0; /**< \brief Pointer to RXD0 input pin config */
316 IfxGeth_Rxd_In *rxd1; /**< \brief Pointer to RXD1 input pin config */
317 IfxGeth_Rxd_In *rxd2; /**< \brief Pointer to RXD2 input pin config */
318 IfxGeth_Rxd_In *rxd3; /**< \brief Pointer to RXD3 input pin config */
319 IfxGeth_Rxctl_In *rxCtl; /**< \brief Pointer to RXCTL input pin config */
320 IfxGeth_Mdc_Out *mdc; /**< \brief Pointer to MDC output pin config */
321 IfxGeth_Mdio_InOut *mdio; /**< \brief Pointer to MDIO pin config */
322 IfxGeth_Grefclk_In *grefClk; /**< \brief Pointer to GREFCLK input pin config */
323 } IfxGeth_Eth_RgmiiPins;
324
325 /** \brief Port pins for RMII mode configuration
326 */
327 typedef struct
328 {
329 IfxGeth_Crsdv_In *crsDiv; /**< \brief pointer to CRSDIV input pin config */
330 IfxGeth_Refclk_In *refClk; /**< \brief Pointer to REFCLK input pin config */
331 IfxGeth_Rxd_In *rxd0; /**< \brief Pointer to RXD0 input pin config */
332 IfxGeth_Rxd_In *rxd1; /**< \brief Pointer to RXD1 input pin config */
333 IfxGeth_Mdio_InOut *mdio; /**< \brief Pointer to MDIO pin config */
334 IfxGeth_Txd_Out *txd0; /**< \brief Pointer to TXD0 output pin config */
335 IfxGeth_Mdc_Out *mdc; /**< \brief Pointer to MDC output pin config */
336 IfxGeth_Txd_Out *txd1; /**< \brief Pointer to TXD1 output pin config */
337 IfxGeth_Txen_Out *txEn; /**< \brief Pointer to TXEN output pin config */
338 } IfxGeth_Eth_RmiiPins;
339
340 /** \brief Configuration sturcture for DMA rx channel
341 */
342 typedef struct
343 {
344 IfxGeth_RxDmaChannel channelId; /**< \brief Rx DMA channel Index */
345 IfxGeth_DmaBurstLength maxBurstLength; /**< \brief Maximum burst length of the channel */
346 IfxGeth_RxDescrList *rxDescrList; /**< \brief pointer to RX descriptors RAM */
347 uint32 *rxBuffer1StartAddress; /**< \brief Start address of Rx Buffer 1 */
348 uint16 rxBuffer1Size; /**< \brief Size of Rx Buffer 1 */
349 } IfxGeth_Eth_RxChannelConfig;
350
351 /** \brief Rx Queue Configuration
352 */
353 typedef struct
354 {
355 boolean storeAndForward; /**< \brief Receive Store and Forward Enable/Disable */
356 IfxGeth_QueueSize rxQueueSize; /**< \brief Rx Queue size */
357 boolean forwardErrorPacket; /**< \brief Error Packet Forwarding Enable/Disable */
358 boolean forwardUndersizedGoodPacket; /**< \brief Undersized Good Packet Forwarding Enable/Disable */
359 boolean daBasedDmaChannelEnabled; /**< \brief DA-based DMA Channel Selection Enable/Disable */
360 IfxGeth_RxDmaChannel rxDmaChannelMap; /**< \brief Mapped DMA Channel of Rx Queue */
361 boolean rxQueueOverflowInterruptEnabled; /**< \brief Enable/Disable Rx Queue Overflow Interrupt */
362 } IfxGeth_Eth_RxQueueConfig;
363
364 /** \brief Configuration sturcture for DMA tx channel
365 */
366 typedef struct
367 {
368 IfxGeth_TxDmaChannel channelId; /**< \brief Tx DMA channel Index */
369 IfxGeth_DmaBurstLength maxBurstLength; /**< \brief Maximum burst length of the channel */
370 IfxGeth_TxDescrList *txDescrList; /**< \brief pointer to TX descriptors RAM */
371 uint32 *txBuffer1StartAddress; /**< \brief Start address of Tx Buffer 1 */
372 uint16 txBuffer1Size; /**< \brief Size of Tx Buffer 1 */
373 } IfxGeth_Eth_TxChannelConfig;
374
375 /** \brief Tx Queue Configuration
376 */
377 typedef struct
378 {
379 boolean storeAndForward; /**< \brief Transmit Store and Forward Enable/Disable */
380 IfxGeth_QueueSize txQueueSize; /**< \brief Tx Queue size */
381 boolean txQueueUnderflowInterruptEnabled; /**< \brief Enable/Disable Tx Queue Underflow Interrupt */
382 } IfxGeth_Eth_TxQueueConfig;
383
384 /** \} */
385
386 /** \addtogroup IfxLld_Geth_Eth_DataStructures
387 * \{ */
388 /** \brief Configuration Structure for the DMA initialisation
389 */
390 typedef struct
391 {
392 uint32 numOfTxChannels; /**< \brief Number of Tx Dma channels */
393 uint32 numOfRxChannels; /**< \brief Number of Rx Dma channels */
394 boolean addressAlignedBeatsEnabled; /**< \brief Enable/Disable Address Aligned Beats */
395 boolean fixedBurstEnabled; /**< \brief Enable/Disable Fixed Burst length */
396 boolean mixedBurstEnabled; /**< \brief Enable/Disable Mixed Burst length */
397 IfxGeth_Eth_TxChannelConfig txChannel[IFXGETH_NUM_TX_CHANNELS]; /**< \brief Tx Channels configurations of selected Channels */
398 IfxGeth_Eth_RxChannelConfig rxChannel[IFXGETH_NUM_RX_CHANNELS]; /**< \brief Rx Channels configurations of selected Channels */
399 IfxGeth_Eth_DmaInterruptConfig txInterrupt[IFXGETH_NUM_DMA_CHANNELS]; /**< \brief Transmit Interrupt configuration structure for DMA Channel */
400 IfxGeth_Eth_DmaInterruptConfig rxInterrupt[IFXGETH_NUM_DMA_CHANNELS]; /**< \brief Receive Interrupt configuration structure for DMA Channel */
401 } IfxGeth_Eth_DmaConfig;
402
403 /** \brief Configuration Structure for the MAC initialisation
404 */
405 typedef struct
406 {
407 IfxGeth_DuplexMode duplexMode; /**< \brief Duplex Mode */
408 IfxGeth_LineSpeed lineSpeed; /**< \brief Ethernet Line Speed */
409 IfxGeth_LoopbackMode loopbackMode; /**< \brief Loopback mode enable/disable */
410 uint8 macAddress[6]; /**< \brief MAC address for the ethernet, should be unique in the network */
411 uint16 maxPacketSize; /**< \brief Maximum size of the ethernet packet */
412 } IfxGeth_Eth_MacConfig;
413
414 /** \brief Configuration Structure for the MTL initialisation
415 */
416 typedef struct
417 {
418 uint32 numOfTxQueues; /**< \brief Number of Tx Queues, will also be used to enable the selected number of queues */
419 IfxGeth_TxSchedulingAlgorithm txSchedulingAlgorithm; /**< \brief Tx Scheduling Algorithm for Tx queues when no of queues are more than 1 */
420 uint32 numOfRxQueues; /**< \brief Number of Rx Queues */
421 IfxGeth_RxArbitrationAlgorithm rxArbitrationAlgorithm; /**< \brief Rx Arbitration Algorithm for Rx queues when no of queues are more than 1 */
422 IfxGeth_Eth_TxQueueConfig txQueue[IFXGETH_NUM_TX_QUEUES]; /**< \brief Tx queue configurations of selected queues */
423 IfxGeth_Eth_RxQueueConfig rxQueue[IFXGETH_NUM_RX_QUEUES]; /**< \brief Rx queue configurations of selected queues */
424 IfxGeth_Eth_MtlInterruptConfig interrupt; /**< \brief Interrupt configuration structure for MTL block */
425 } IfxGeth_Eth_MtlConfig;
426
427 /** \brief Configuration structure for pins
428 */
429 typedef struct
430 {
431 IFX_CONST IfxGeth_Eth_RmiiPins *rmiiPins; /**< \brief Structure for RMII pins */
432 IFX_CONST IfxGeth_Eth_RgmiiPins *rgmiiPins; /**< \brief Structure for RGMII pins */
433 IFX_CONST IfxGeth_Eth_MiiPins *miiPins; /**< \brief Structure for MII pins */
434 } IfxGeth_Eth_PinConfig;
435
436 /** \brief Handle sturcture for DMA rx channel
437 */
438 typedef struct
439 {
440 IfxGeth_RxDmaChannel channelId; /**< \brief Rx DMA channel Index */
441 IfxGeth_RxDescrList *rxDescrList; /**< \brief pointer to RX descriptors RAM */
442 volatile IfxGeth_RxDescr *rxDescrPtr; /**< \brief Pointer to Rx Descriptor (current descriptor) */
443 uint32 rxCount; /**< \brief Number of frames received */
444 } IfxGeth_Eth_RxChannel;
445
446 /** \brief handle sturcture for DMA tx channel
447 */
448 typedef struct
449 {
450 IfxGeth_TxDmaChannel channelId; /**< \brief Tx DMA channel Index */
451 IfxGeth_TxDescrList *txDescrList; /**< \brief pointer to TX descriptors RAM */
452 volatile IfxGeth_TxDescr *txDescrPtr; /**< \brief Pointer to Tx Descriptor (current descriptor) */
453 uint32 txCount; /**< \brief Number of frames transmitted */
454 uint16 txBuf1Size; /**< \brief configured tx buffer 1 size */
455 } IfxGeth_Eth_TxChannel;
456
457 /** \} */
458
459 /** \addtogroup IfxLld_Geth_Eth_DataStructures
460 * \{ */
461 /** \brief GETH driver Handle
462 */
463 typedef struct
464 {
465 Ifx_GETH *gethSFR; /**< \brief Pointer to GETH register base address */
466 uint32 numOfTxChannels; /**< \brief Number of Tx Dma channels */
467 uint32 numOfRxChannels; /**< \brief Number of Rx Dma channels */
468 IfxGeth_Eth_TxChannel txChannel[IFXGETH_NUM_TX_CHANNELS]; /**< \brief Tx Channels handle of selected Channels */
469 IfxGeth_Eth_RxChannel rxChannel[IFXGETH_NUM_RX_CHANNELS]; /**< \brief Rx Channels handle of selected Channels */
470 } IfxGeth_Eth;
471
472 /** \brief Configuration Structure for the Module initialisation
473 */
474 typedef struct
475 {
476 Ifx_GETH *gethSFR; /**< \brief Pointer to GETH register base address */
477 IfxGeth_PhyInterfaceMode phyInterfaceMode; /**< \brief External Phy Interface RMII Mode */
478 IfxGeth_Eth_PinConfig pins; /**< \brief COnfiguration structure for Pins */
479 IfxGeth_Eth_MacConfig mac; /**< \brief Configuration Structure for the the MAC initialisation */
480 IfxGeth_Eth_MtlConfig mtl; /**< \brief Configuration Structure for the MTL initialisation */
481 IfxGeth_Eth_DmaConfig dma; /**< \brief Configuration Structure for the DMA initialisation */
482 } IfxGeth_Eth_Config;
483
484 /** \} */
485
486 /** \brief Configuration Structure for TX Frame
487 */
488 typedef struct
489 {
490 IfxGeth_TxDmaChannel channelId; /**< \brief Tx DMA channel Index */
491 uint32 packetLength; /**< \brief the length of the packet to be transmitted in bytes */
492 } IfxGeth_Eth_FrameConfig;
493
494 /** \addtogroup IfxLld_Geth_Eth_MAC_Functions
495 * \{ */
496
497 /******************************************************************************/
498 /*-------------------------Global Function Prototypes-------------------------*/
499 /******************************************************************************/
500
501 /** \brief Configures the MAC core
502 * \param geth GETH driver Handle
503 * \param macConfig Configuration Structure for the MAC initialisation
504 * \return None
505 *
506 * \code
507 * // IfxGeth_Eth geth; // assumed to be defined globally
508 *
509 * IfxGeth_Eth_MacConfig macConfig;
510 * macConfig.duplexMode = IfxGeth_DuplexMode_fullDuplex;
511 * macConfig.lineSpeed = IfxGeth_LineSpeed_100Mbps;
512 * macConfig.loopbackMode = IfxGeth_LoopbackMode_disable;
513 * macConfig.macAddress = {0x00, 0x11, 0x22, 0x33, 0x44, 0x55};
514 *
515 * IfxGeth_Eth_configureMacCore(&geth, &macConfig);
516 * \endcode
517 *
518 */
519 IFX_EXTERN void IfxGeth_Eth_configureMacCore(IfxGeth_Eth *geth, IfxGeth_Eth_MacConfig *macConfig);
520
521 /** \} */
522
523 /** \addtogroup IfxLld_Geth_Eth_Module_Functions
524 * \{ */
525
526 /******************************************************************************/
527 /*-------------------------Inline Function Prototypes-------------------------*/
528 /******************************************************************************/
529
530 /** \brief Waits for one TX buffer becomes available
531 * \param geth GETH driver Handle
532 * \param channelId Tx channel Id
533 * retval non NULL_PTR TX buffer is available at the address pointed by the returned value
534 * retval NULL_PTR TX buffer is busy.
535 *
536 * \code
537 *
538 * // get free buffer
539 * uint8 *pTxBuf = (uint8*) IfxGeth_Eth_waitTransmitBuffer(&geth, IfxGeth_TxDmaChannel_0);
540 * \endcode
541 *
542 */
543 IFX_INLINE void *IfxGeth_Eth_waitTransmitBuffer(IfxGeth_Eth *geth, IfxGeth_TxDmaChannel channelId);
544
545 /******************************************************************************/
546 /*-------------------------Global Function Prototypes-------------------------*/
547 /******************************************************************************/
548
549 /** \brief Gets receive buffer\n
550 * note: IfxEth_freeReceiveBuffer() shall be called after the data from the RX buffer has been processed
551 * \param geth GETH driver Handle
552 * \param channelId Rx channel Id
553 * \return retval NULL_PTR no received frame
554 * retval !NULL_PTR a frame has been received
555 *
556 * \code
557 * // IfxGeth_Eth geth; // assumed to be defined globally
558 *
559 * uint8 *pRxBuf = (uint8*)IfxGeth_Eth_getReceiveBuffer(&geth, IfxGeth_RxDmaChannel_0);
560 * \endcode
561 *
562 */
563 IFX_EXTERN void *IfxGeth_Eth_getReceiveBuffer(IfxGeth_Eth *geth, IfxGeth_RxDmaChannel channelId);
564
565 /** \brief Get the transmit buffer pointer of current descriptor
566 * \param geth GETH driver Handle
567 * \param channelId Tx channel Id
568 * \return retval NULL_PTR no free transmit buffer is available
569 * retval !NULL_PTR a free transmit buffer is available
570 */
571 IFX_EXTERN void *IfxGeth_Eth_getTransmitBuffer(IfxGeth_Eth *geth, IfxGeth_TxDmaChannel channelId);
572
573 /** \brief Initialises the Geth Module with given configuration
574 * \param geth GETH driver Handle
575 * \param config Configuration Structure for the Module initialisation
576 * \return None
577 *
578 * \code
579 * // IfxGeth_Eth geth; // assumed to be defined globally
580 * IfxGeth_Eth_Config config;
581 *
582 * IfxGeth_Eth_initModuleConfig(&config, &MODULE_GETH);
583 * IfxGeth_Eth_initModule(&geth, &config);
584 * \endcode
585 *
586 */
587 IFX_EXTERN void IfxGeth_Eth_initModule(IfxGeth_Eth *geth, IfxGeth_Eth_Config *config);
588
589 /** \brief Initialises the config structure with default values
590 * \param config Configuration Structure for the Module initialisation
591 * \param gethSFR Pointer to GETH register base address
592 * \return None
593 *
594 * \code
595 * IfxGeth_Eth_Config config;
596 * IfxGeth_Eth_initModuleConfig(&config, &MODULE_GETH);
597 * \endcode
598 *
599 */
600 IFX_EXTERN void IfxGeth_Eth_initModuleConfig(IfxGeth_Eth_Config *config, Ifx_GETH *gethSFR);
601
602 /** \brief Set up MII mode input pins
603 * \param geth GETH driver Handle
604 * \param miiPins Mii Pins
605 * \return None
606 */
607 IFX_EXTERN void IfxGeth_Eth_setupMiiInputPins(IfxGeth_Eth *geth, const IfxGeth_Eth_MiiPins *miiPins);
608
609 /** \brief setup MII mode output pins
610 * \param geth GETH driver Handle
611 * \param miiPins Mii Pins
612 * \return None
613 */
614 IFX_EXTERN void IfxGeth_Eth_setupMiiOutputPins(IfxGeth_Eth *geth, const IfxGeth_Eth_MiiPins *miiPins);
615
616 /** \brief Set up RGMII mode input pins
617 * \param geth GETH driver Handle
618 * \param rgmiiPins RGMII Pins
619 * \return None
620 */
621 IFX_EXTERN void IfxGeth_Eth_setupRgmiiInputPins(IfxGeth_Eth *geth, const IfxGeth_Eth_RgmiiPins *rgmiiPins);
622
623 /** \brief Set up RGMII mode output pins
624 * \param geth GETH driver Handle
625 * \param rgmiiPins RGMII Pins
626 * \return None
627 */
628 IFX_EXTERN void IfxGeth_Eth_setupRgmiiOutputPins(IfxGeth_Eth *geth, const IfxGeth_Eth_RgmiiPins *rgmiiPins);
629
630 /** \brief setup RMII mode input pins
631 * \param geth GETH driver Handle
632 * \param rmiiPins Rmii Pins
633 * \return None
634 */
635 IFX_EXTERN void IfxGeth_Eth_setupRmiiInputPins(IfxGeth_Eth *geth, const IfxGeth_Eth_RmiiPins *rmiiPins);
636
637 /** \brief setup RMII mode output pins
638 * \param geth GETH driver Handle
639 * \param rmiiPins Rmii Pins
640 * \return None
641 */
642 IFX_EXTERN void IfxGeth_Eth_setupRmiiOutputPins(IfxGeth_Eth *geth, const IfxGeth_Eth_RmiiPins *rmiiPins);
643
644 /** \brief writes the header format into buffrer
645 * \param geth GETH driver Handle
646 * \param txBuffer pointer to tx buffer
647 * \param destinationAddress pointer to destination address
648 * \param sourceAddress pointer to source address
649 * \param payloadLength size of the payload
650 * \return None
651 *
652 * \code
653 * // IfxGeth_Eth geth; // assumed to be defined globally
654 * //const uint8 myMacAddress[6] = {0x00, 0x11, 0x22, 0x33, 0x44, 0x55}; // assumed to be defined globally
655 * //#define IFXGETH_MAX_TX_BUFFER_SIZE 256 // assumed to be defined globally
656 * //uint8 txBuffer1[IFXGETH_MAX_TX_BUFFER_SIZE]; // assumed to be defined globally
657 *
658 * // get free buffer
659 * uint8 *pTxBuf = (uint8*) IfxGeth_Eth_waitTransmitBuffer(&geth, IfxGeth_TxDmaChannel_0);
660 *
661 * IfxGeth_Eth_writeHeader(&geth, &pTxBuf, (uint8 *)myMacAddress, (uint8 *)myMacAddress, payloadLength);
662 * \endcode
663 *
664 */
665 IFX_EXTERN void IfxGeth_Eth_writeHeader(IfxGeth_Eth *geth, uint8 *txBuffer, uint8 *destinationAddress, uint8 *sourceAddress, uint32 payloadLength);
666
667 /** \} */
668
669 /** \addtogroup IfxLld_Geth_Eth_MTL_Functions
670 * \{ */
671
672 /******************************************************************************/
673 /*-------------------------Global Function Prototypes-------------------------*/
674 /******************************************************************************/
675
676 /** \brief Configures the MTL
677 * \param geth GETH driver Handle
678 * \param mtlConfig Configuration Structure for the MTL initialisation
679 * \return None
680 *
681 * \code
682 * // IfxGeth_Eth geth; // assumed to be defined globally
683 *
684 * IfxGeth_Eth_MtlConfig mtlConfig;
685 *
686 * mtlConfig.numOfTxQueues = 1;
687 * mtlConfig.txSchedulingAlgorithm = IfxGeth_TxSchedulingAlgorithm_wrr;
688 * mtlConfig.numOfRxQueues = 1;
689 * mtlConfig.rxArbitrationAlgorithm = IfxGeth_RxArbitrationAlgorithm_sp;
690 * mtlConfig.txQueueConfig[0].storeAndForward = FALSE;
691 * mtlConfig.txQueueConfig[0].txQueueSize = IfxGeth_QueueSize_256Bytes;
692 * mtlConfig.txQueueConfig[0].txQueueUnderflowInterruptEnabled = FLASE; // enable if required
693 *
694 * mtlConfig.rxQueueConfig[0].storeAndForward = FALSE;
695 * mtlConfig.rxQueueConfig[0].rxQueueSize = IfxGeth_QueueSize_256Bytes;
696 * mtlConfig.rxQueueConfig[0].forwardErrorPacket = FALSE;
697 * mtlConfig.rxQueueConfig[0].forwardUndersizeedGoodPacket = FALSE;
698 * mtlConfig.rxQueueConfig[0].daBasedDmaChannelEnabled = FALSE;
699 * mtlConfig.rxQueueConfig[0].rxDmaChannelMap = IfxEth_RxDmaChannel_0;
700 * mtlConfig.rxQueueConfig[0].rxQueueOverflowInterruptEnabled = FALSE; // enable if required
701 *
702 * mtlConfig.interrupt.serviceRequest = IfxGeth_ServiceRequest_1;
703 * mtlConfig.interrupt.priority = 0; // choose priority
704 * mtlConfig.interrupt.provider = IfxSrc_Tos_cpu0;
705 *
706 * IfxGeth_Eth_configureMTL(&geth, &mtlConfig);
707 * \endcode
708 *
709 */
710 IFX_EXTERN void IfxGeth_Eth_configureMTL(IfxGeth_Eth *geth, IfxGeth_Eth_MtlConfig *mtlConfig);
711
712 /** \} */
713
714 /** \addtogroup IfxLld_Geth_Eth_DMA_Functions
715 * \{ */
716
717 /******************************************************************************/
718 /*-------------------------Inline Function Prototypes-------------------------*/
719 /******************************************************************************/
720
721 /** \brief Returns the pointer to current RX descriptor
722 * \param geth GETH driver Handle
723 * \param channelId Rx channel Id
724 * \return pointer to base RX descriptor in the list
725 *
726 * \code
727 * // IfxGeth_Eth geth; // assumed to be defined globally
728 *
729 * IfxGeth_RxDescr *descr = IfxGeth_Eth_getActualRxDescriptor(&geth, IfxGeth_RxDmaChannel_0);
730 * \endcode
731 *
732 */
733 IFX_INLINE volatile IfxGeth_RxDescr *IfxGeth_Eth_getActualRxDescriptor(IfxGeth_Eth *geth, IfxGeth_RxDmaChannel channelId);
734
735 /** \brief Returns the pointer to current TX descriptor
736 * \param geth GETH driver Handle
737 * \param channelId Tx channel Id
738 * \return pointer to base TX descriptor in the list
739 *
740 * \code
741 * // IfxGeth_Eth geth; // assumed to be defined globally
742 *
743 * IfxGeth_TxDescr *descr = IfxGeth_Eth_getActualTxDescriptor(&geth, IfxGeth_TxDmaChannel_0);
744 * \endcode
745 *
746 */
747 IFX_INLINE volatile IfxGeth_TxDescr *IfxGeth_Eth_getActualTxDescriptor(IfxGeth_Eth *geth, IfxGeth_TxDmaChannel channelId);
748
749 /** \brief Checks whether one or more RX data is available
750 * \param geth GETH driver Handle
751 * \param channelId Rx channel Id
752 * \return TRUE : if one or more RX data available
753 * FALSE: if Rx data not available
754 *
755 * \code
756 * // IfxGeth_Eth geth; // assumed to be defined globally
757 *
758 * boolean status = IfxGeth_Eth_isRxDataAvailable(&geth, IfxGeth_RxDmaChannel_0);
759 * \endcode
760 *
761 */
762 IFX_INLINE boolean IfxGeth_Eth_isRxDataAvailable(IfxGeth_Eth *geth, IfxGeth_RxDmaChannel channelId);
763
764 /******************************************************************************/
765 /*-------------------------Global Function Prototypes-------------------------*/
766 /******************************************************************************/
767
768 /** \brief Configures the DMA
769 * \param geth GETH driver Handle
770 * \param dmaConfig Configuration Structure for the DMA initialisation
771 * \return None
772 *
773 * \code
774 * // IfxGeth_Eth geth; // assumed to be defined globally
775 * IfxGeth_Eth_DmaConfig dmaConfig;
776 * dmaConfig.numOfTxChannels = 1;
777 * dmaConfig.numOfRxChannels = 1;
778 *
779 * dmaConfig.txChannel[0].channelId = IfxGeth_TxDmaChannel_0;
780 * dmaConfig.txChannel[0].txDescrList = &IfxGeth_txDescrList[0];
781 * dmaConfig.txChannel[0].txBuffer1StartAddress = &txBuffer[0][0]; // user buffer
782 * dmaConfig.txChannel[0].txBuffer1Size = TX_BUFFER1_SIZE; // user defined variable
783 *
784 * dmaConfig.rxChannel[0].channelId = IfxGeth_RxDmaChannel_0;
785 * dmaConfig.rxChannel[0].rxDescrList = &IfxGeth_rxDescrList[0];
786 * dmaConfig.rxChannel[0].rxBuffer1StartAddress = &rxBuffer[0][0]; // user buffer
787 * dmaConfig.rxChannel[0].rxBuffer1Size = RX_BUFFER1_SIZE; // user defined variable
788 *
789 * dmaConfig.txInterrupt[0].channelId = IfxGeth_DmaChannel_0;
790 * dmaConfig.txInterrupt[0].priority = 0; // choose priority
791 * dmaConfig.txInterrupt[0].provider = IfxSrc_Tos_cpu0;
792 *
793 * dmaConfig.rxInterrupt[0].channelId = IfxGeth_DmaChannel_0;
794 * dmaConfig.rxInterrupt[0].priority = 0; // choose priority
795 * dmaConfig.rxInterrupt[0].provider = IfxSrc_Tos_cpu0;
796 *
797 * IfxGeth_Eth_configureDMA(&geth, &dmaConfig);
798 * \endcode
799 *
800 */
801 IFX_EXTERN void IfxGeth_Eth_configureDMA(IfxGeth_Eth *geth, IfxGeth_Eth_DmaConfig *dmaConfig);
802
803 /** \brief Initialises the Rx descriptors of a single channel
804 * \param geth GETH driver Handle
805 * \param config Rx channel configuration
806 * \return None
807 */
808 IFX_EXTERN void IfxGeth_Eth_initReceiveDescriptors(IfxGeth_Eth *geth, IfxGeth_Eth_RxChannelConfig *config);
809
810 /** \brief Initialises the Tx descriptors of a single channel
811 * \param geth GETH driver Handle
812 * \param config Tx channel configuration
813 * \return None
814 */
815 IFX_EXTERN void IfxGeth_Eth_initTransmitDescriptors(IfxGeth_Eth *geth, IfxGeth_Eth_TxChannelConfig *config);
816
817 /** \brief Transmits a frame from a single channel
818 * \param geth GETH driver Handle
819 * \param config Tx Frame configuration
820 * \return None
821 *
822 * \code
823 * // IfxGeth_Eth geth; // assumed to be defined globally
824 * //const uint8 myMacAddress[6] = {0x00, 0x11, 0x22, 0x33, 0x44, 0x55}; // assumed to be defined globally
825 *
826 * uint32 payloadLength = 8; // 8 bytes
827 * uint32 packetLength = IFXGETH_HEADER_LENGTH + payloadLength; // IFXGETH_HEADER_LENGTH defined by user
828 * IfxGeth_FrameConfig frameConfig;
829 * frameConfig.channelId = IfxGeth_TxDmaChannel_0;
830 * frameConfig.packetLength = packetLength;
831 *
832 * // get free buffer
833 * uint8 *pTxBuf = (uint8*) IfxGeth_Eth_waitTransmitBuffer(&geth, IfxGeth_TxDmaChannel_0);
834 * // write the header
835 * IfxGeth_Eth_writeHeader(&geth, pTxBuf, (uint8 *)myMacAddress, (uint8 *)myMacAddress, payloadLength);
836 * // write the payload
837 * uint32 i;
838 * for(i = IFXGETH_HEADER_LENGTH; i < packetLength; ++i) {
839 * pTxBuf[i] = i - 13;
840 * }
841 *
842 * // clear the TX interrupt status
843 * IfxGeth_dma_clearInterruptFlag(geth->gethSFR, IfxGeth_DmaChannel_0, IfxGeth_DmaInterruptFlag_transmitInterrupt) ;
844 *
845 * IfxGeth_Eth_sendFrame(&geth, &frameConfig);
846 * \endcode
847 *
848 */
849 IFX_EXTERN void IfxGeth_Eth_sendFrame(IfxGeth_Eth *geth, IfxGeth_Eth_FrameConfig *config);
850
851 /** \brief Transmits a frame from a single channel
852 * \param geth GETH driver Handle
853 * \param packetLength Length of the packet to be transmitted in bytes
854 * \param channelId Tx channel Id
855 * \return None
856 *
857 * \code
858 * // IfxGeth_Eth geth; // assumed to be defined globally
859 * //const uint8 myMacAddress[6] = {0x00, 0x11, 0x22, 0x33, 0x44, 0x55}; // assumed to be defined globally
860 *
861 * uint32 payloadLength = 8; // 8 bytes
862 * uint32 packetLength = IFXGETH_HEADER_LENGTH + payloadLength; // IFXGETH_HEADER_LENGTH defined by user
863 *
864 * // get free buffer
865 * uint8 *pTxBuf = (uint8*) IfxGeth_Eth_waitTransmitBuffer(&geth, IfxGeth_TxDmaChannel_0);
866 * // write the header
867 * IfxGeth_Eth_writeHeader(&geth, pTxBuf, (uint8 *)myMacAddress, (uint8 *)myMacAddress, payloadLength);
868 * // write the payload
869 * uint32 i;
870 * for(i = IFXGETH_HEADER_LENGTH; i < packetLength; ++i) {
871 * pTxBuf[i] = i - 13;
872 * }
873 *
874 * // clear the TX interrupt status
875 * IfxGeth_dma_clearInterruptFlag(geth->gethSFR, IfxGeth_DmaChannel_0, IfxGeth_DmaInterruptFlag_transmitInterrupt) ;
876 *
877 * IfxGeth_Eth_sendTransmitBuffer(&geth, packetLength, IfxGeth_TxDmaChannel_0);
878 * \endcode
879 *
880 */
881 IFX_EXTERN void IfxGeth_Eth_sendTransmitBuffer(IfxGeth_Eth *geth, uint32 packetLength, IfxGeth_TxDmaChannel channelId);
882
883 /** \brief Updates the current Rx descriptor pointer in the handle to next Rx descriptor
884 * \param geth GETH driver Handle
885 * \param channelId Rx channel Id
886 * \return None
887 *
888 * \code
889 * // IfxGeth_Eth geth; // assumed to be defined globally
890 *
891 * IfxGeth_Eth_shuffleRxDescriptor(&geth, IfxGeth_RxDmaChannel_0);
892 * \endcode
893 *
894 */
895 IFX_EXTERN void IfxGeth_Eth_shuffleRxDescriptor(IfxGeth_Eth *geth, IfxGeth_RxDmaChannel channelId);
896
897 /** \brief Updates the current Tx descriptor pointer in the handle to next Tx descriptor
898 * \param geth GETH driver Handle
899 * \param channelId Tx channel Id
900 * \return None
901 *
902 * \code
903 * // IfxGeth_Eth geth; // assumed to be defined globally
904 *
905 * IfxGeth_Eth_shuffleTxDescriptor(&geth, IfxGeth_TxDmaChannel_0);
906 * \endcode
907 *
908 */
909 IFX_EXTERN void IfxGeth_Eth_shuffleTxDescriptor(IfxGeth_Eth *geth, IfxGeth_TxDmaChannel channelId);
910
911 /** \brief Start the Receiver functions of MAC and selected channel of DMA
912 * \param geth GETH driver Handle
913 * \param channelId Rx channel Id
914 * \return None
915 *
916 * \code
917 * // IfxGeth_Eth geth; // assumed to be defined globally
918 *
919 * IfxGeth_Eth_startReceiver(&geth, IfxGeth_RxDmaChannel_0);
920 * \endcode
921 *
922 */
923 IFX_EXTERN void IfxGeth_Eth_startReceiver(IfxGeth_Eth *geth, IfxGeth_RxDmaChannel channelId);
924
925 /** \brief Start the Receiver functions of MAC and all selected number of DMA channels
926 * \param geth GETH driver Handle
927 * \param numOfChannels number of channels to be started for transmission (starting from channel 0)
928 * \return None
929 *
930 * \code
931 * // IfxGeth_Eth geth; // assumed to be defined globally
932 *
933 * IfxGeth_Eth_startReceivers(&geth, 1);
934 * \endcode
935 *
936 */
937 IFX_EXTERN void IfxGeth_Eth_startReceivers(IfxGeth_Eth *geth, uint32 numOfChannels);
938
939 /** \brief Start the transmitter functions of MAC and selected channel of DMA
940 * \param geth GETH driver Handle
941 * \param channelId Tx channel Id
942 * \return None
943 *
944 * \code
945 * // IfxGeth_Eth geth; // assumed to be defined globally
946 *
947 * IfxGeth_Eth_startTransmitter(&geth, IfxGeth_TxDmaChannel_0);
948 * \endcode
949 *
950 */
951 IFX_EXTERN void IfxGeth_Eth_startTransmitter(IfxGeth_Eth *geth, IfxGeth_TxDmaChannel channelId);
952
953 /** \brief Start the transmitter functions of MAC and all selected number of DMA channels
954 * \param geth GETH driver Handle
955 * \param numOfChannels number of channels to be started for transmission (starting from channel 0)
956 * \return None
957 *
958 * \code
959 * // IfxGeth_Eth geth; // assumed to be defined globally
960 *
961 * IfxGeth_Eth_startTransmitter(&geth, 1);
962 * \endcode
963 *
964 */
965 IFX_EXTERN void IfxGeth_Eth_startTransmitters(IfxGeth_Eth *geth, uint32 numOfChannels);
966
967 /** \brief Stops the transmitter functions of MAC and all selected number of DMA channels
968 * \param geth GETH driver Handle
969 * \param numOfChannels number of channels to be started for transmission (starting from channel 0)
970 * \return None
971 *
972 * \code
973 * // IfxGeth_Eth geth; // assumed to be defined globally
974 *
975 * IfxGeth_Eth_stopTransmitter(&geth, 4);
976 * \endcode
977 *
978 */
979 IFX_EXTERN void IfxGeth_Eth_stopTransmitters(IfxGeth_Eth *geth, uint32 numOfChannels);
980
981 /** \brief Wakes up the Receiver functions of MAC and selected channel of DMA
982 * \param geth GETH driver Handle
983 * \param channelId Rx channel Id
984 * \return None
985 *
986 * \code
987 * // IfxGeth_Eth geth; // assumed to be defined globally
988 *
989 * IfxGeth_Eth_wakeupReceiver(&geth, IfxGeth_RxDmaChannel_0);
990 * \endcode
991 *
992 */
993 IFX_EXTERN void IfxGeth_Eth_wakeupReceiver(IfxGeth_Eth *geth, IfxGeth_RxDmaChannel channelId);
994
995 /** \brief Wakes up the transmitter functions of MAC and selected channel of DMA
996 * \param geth GETH driver Handle
997 * \param channelId Tx channel Id
998 * \return None
999 *
1000 * \code
1001 * // IfxGeth_Eth geth; // assumed to be defined globally
1002 *
1003 * IfxGeth_Eth_wakeupTransmitter(&geth, IfxGeth_TxDmaChannel_0);
1004 * \endcode
1005 *
1006 */
1007 IFX_EXTERN void IfxGeth_Eth_wakeupTransmitter(IfxGeth_Eth *geth, IfxGeth_TxDmaChannel channelId);
1008
1009 /** \} */
1010
1011 /******************************************************************************/
1012 /*-------------------------Inline Function Prototypes-------------------------*/
1013 /******************************************************************************/
1014
1015 /** \brief Returns the pointer to base RX descriptor in the list
1016 * \param geth GETH driver Handle
1017 * \param channelId Rx channel Id
1018 * \return pointer to base RX descriptor in the list
1019 *
1020 * \code
1021 * // IfxGeth_Eth geth; // assumed to be defined globally
1022 *
1023 * IfxGeth_RxDescr *descr = IfxGeth_Eth_getBaseRxDescriptor(&geth, IfxGeth_RxDmaChannel_0);
1024 * \endcode
1025 *
1026 */
1027 IFX_INLINE volatile IfxGeth_RxDescr *IfxGeth_Eth_getBaseRxDescriptor(IfxGeth_Eth *geth, IfxGeth_RxDmaChannel channelId);
1028
1029 /** \brief Returns the pointer to base TX descriptor in the list
1030 * \param geth GETH driver Handle
1031 * \param channelId Tx channel Id
1032 * \return pointer to base TX descriptor in the list
1033 *
1034 * \code
1035 * // IfxGeth_Eth geth; // assumed to be defined globally
1036 *
1037 * IfxGeth_TxDescr *descr = IfxGeth_Eth_getBaseTxDescriptor(&geth, IfxGeth_TxDmaChannel_0);
1038 * \endcode
1039 *
1040 */
1041 IFX_INLINE volatile IfxGeth_TxDescr *IfxGeth_Eth_getBaseTxDescriptor(IfxGeth_Eth *geth, IfxGeth_TxDmaChannel channelId);
1042
1043 /******************************************************************************/
1044 /*-------------------------Global Function Prototypes-------------------------*/
1045 /******************************************************************************/
1046
1047 /** \brief Free the receive buffer, enabling it for the further reception
1048 * \param geth GETH driver Handle
1049 * \param channelId Rx channel Id
1050 * \return None
1051 *
1052 * \code
1053 * // IfxGeth_Eth geth; // assumed to be defined globally
1054 *
1055 * IfxGeth_Eth_freeReceiveBuffer(&geth, IfxGeth_RxDmaChannel_0);
1056 * \endcode
1057 *
1058 */
1059 IFX_EXTERN void IfxGeth_Eth_freeReceiveBuffer(IfxGeth_Eth *geth, IfxGeth_RxDmaChannel channelId);
1060 /** \addtogroup IfxLld_Geth_Eth_Variables
1061 * \{ */
1062
1063 /******************************************************************************/
1064 /*-------------------Global Exported Variables/Constants----------------------*/
1065 /******************************************************************************/
1066
1067 /** \brief Actual rx descriptor lists of all availabe rx channels
1068 */
1069 IFX_EXTERN IfxGeth_RxDescrList IfxGeth_Eth_rxDescrList[IFXGETH_NUM_MODULES][IFXGETH_NUM_RX_CHANNELS];
1070
1071 /** \brief Actual tx descriptor lists of all availabe tx channels
1072 */
1073 IFX_EXTERN IfxGeth_TxDescrList IfxGeth_Eth_txDescrList[IFXGETH_NUM_MODULES][IFXGETH_NUM_TX_CHANNELS];
1074
1075 /** \} */
1076
1077 /******************************************************************************/
1078 /*---------------------Inline Function Implementations------------------------*/
1079 /******************************************************************************/
1080
1081 IFX_INLINE volatile IfxGeth_RxDescr *IfxGeth_Eth_getActualRxDescriptor(IfxGeth_Eth *geth, IfxGeth_RxDmaChannel channelId)
1082 {
1083 return geth->rxChannel[channelId].rxDescrPtr;
1084 }
1085
1086
1087 IFX_INLINE volatile IfxGeth_TxDescr *IfxGeth_Eth_getActualTxDescriptor(IfxGeth_Eth *geth, IfxGeth_TxDmaChannel channelId)
1088 {
1089 return geth->txChannel[channelId].txDescrPtr;
1090 }
1091
1092
1093 IFX_INLINE volatile IfxGeth_RxDescr *IfxGeth_Eth_getBaseRxDescriptor(IfxGeth_Eth *geth, IfxGeth_RxDmaChannel channelId)
1094 {
1095 return geth->rxChannel[channelId].rxDescrList->descr;
1096 }
1097
1098
1099 IFX_INLINE volatile IfxGeth_TxDescr *IfxGeth_Eth_getBaseTxDescriptor(IfxGeth_Eth *geth, IfxGeth_TxDmaChannel channelId)
1100 {
1101 return geth->txChannel[channelId].txDescrList->descr;
1102 }
1103
1104
1105 IFX_INLINE boolean IfxGeth_Eth_isRxDataAvailable(IfxGeth_Eth *geth, IfxGeth_RxDmaChannel channelId)
1106 {
1107 return IfxGeth_Eth_getActualRxDescriptor(geth, channelId)->RDES3.R.OWN == 0;
1108 }
1109
1110
1111 IFX_INLINE void *IfxGeth_Eth_waitTransmitBuffer(IfxGeth_Eth *geth, IfxGeth_TxDmaChannel channelId)
1112 {
1113 void *tx;
1114
1115 do
1116 {
1117 tx = IfxGeth_Eth_getTransmitBuffer(geth, channelId);
1118 } while (tx == NULL_PTR);
1119
1120 return tx;
1121 }
1122
1123
1124 #endif /* IFXGETH_ET_H */
IfxGeth_Eth_PinConfig::rmiiPins
IFX_CONST IfxGeth_Eth_RmiiPins * rmiiPins
Structure for RMII pins.
Definition: IfxGeth_Eth.h:431
IfxGeth_Eth_RxChannel::rxDescrPtr
volatile IfxGeth_RxDescr * rxDescrPtr
Pointer to Rx Descriptor (current descriptor)
Definition: IfxGeth_Eth.h:442
IFXGETH_NUM_MODULES
#define IFXGETH_NUM_MODULES
Number of Geth instances.
Definition: IfxGeth_cfg.h:78
IfxGeth_RxDescr3_RF_Bits::OWN
uint32 OWN
Own bit.
Definition: IfxGeth.h:417
IfxGeth_Eth_TxQueueConfig
Tx Queue Configuration.
Definition: IfxGeth_Eth.h:377
IfxGeth_RxDescrList
Rx Descriptor List.
Definition: IfxGeth.h:686
IfxGeth_Txclk_Out
TXCLK pin mapping structure.
Definition: IfxGeth_PinMap.h:161
IfxGeth_Eth_RxChannelConfig::channelId
IfxGeth_RxDmaChannel channelId
Rx DMA channel Index.
Definition: IfxGeth_Eth.h:344
IFXGETH_NUM_TX_QUEUES
#define IFXGETH_NUM_TX_QUEUES
Number of Tx queues in MTL block.
Definition: IfxGeth_cfg.h:70
IfxGeth_Eth_initReceiveDescriptors
IFX_EXTERN void IfxGeth_Eth_initReceiveDescriptors(IfxGeth_Eth *geth, IfxGeth_Eth_RxChannelConfig *config)
Initialises the Rx descriptors of a single channel.
Definition: IfxGeth_Eth.c:552
IfxGeth_Eth_PinConfig
Configuration structure for pins.
Definition: IfxGeth_Eth.h:429
IfxGeth_Eth_Config::dma
IfxGeth_Eth_DmaConfig dma
Configuration Structure for the DMA initialisation.
Definition: IfxGeth_Eth.h:481
IfxGeth_Eth::rxChannel
IfxGeth_Eth_RxChannel rxChannel[IFXGETH_NUM_RX_CHANNELS]
Rx Channels handle of selected Channels.
Definition: IfxGeth_Eth.h:469
IfxGeth_Eth_RxChannelConfig::rxDescrList
IfxGeth_RxDescrList * rxDescrList
pointer to RX descriptors RAM
Definition: IfxGeth_Eth.h:346
IfxGeth_Col_In
COL pin mapping structure.
Definition: IfxGeth_PinMap.h:128
IfxGeth_Eth_PinConfig::rgmiiPins
IFX_CONST IfxGeth_Eth_RgmiiPins * rgmiiPins
Structure for RGMII pins.
Definition: IfxGeth_Eth.h:432
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:100
IfxGeth_Eth_shuffleTxDescriptor
IFX_EXTERN void IfxGeth_Eth_shuffleTxDescriptor(IfxGeth_Eth *geth, IfxGeth_TxDmaChannel channelId)
Updates the current Tx descriptor pointer in the handle to next Tx descriptor.
Definition: IfxGeth_Eth.c:1009
IfxGeth_Eth_wakeupReceiver
IFX_EXTERN void IfxGeth_Eth_wakeupReceiver(IfxGeth_Eth *geth, IfxGeth_RxDmaChannel channelId)
Wakes up the Receiver functions of MAC and selected channel of DMA.
Definition: IfxGeth_Eth.c:1077
IfxGeth_Eth_writeHeader
IFX_EXTERN void IfxGeth_Eth_writeHeader(IfxGeth_Eth *geth, uint8 *txBuffer, uint8 *destinationAddress, uint8 *sourceAddress, uint32 payloadLength)
writes the header format into buffrer
Definition: IfxGeth_Eth.c:1115
IfxGeth_Eth_configureDMA
IFX_EXTERN void IfxGeth_Eth_configureDMA(IfxGeth_Eth *geth, IfxGeth_Eth_DmaConfig *dmaConfig)
Configures the DMA.
Definition: IfxGeth_Eth.c:61
IfxGeth_TxDescrList
Tx Descriptor List.
Definition: IfxGeth.h:693
IfxGeth_Eth_MiiPins::mdio
IfxGeth_Mdio_InOut * mdio
Pointer to MDIO pin config.
Definition: IfxGeth_Eth.h:292
IfxGeth_Eth_isRxDataAvailable
IFX_INLINE boolean IfxGeth_Eth_isRxDataAvailable(IfxGeth_Eth *geth, IfxGeth_RxDmaChannel channelId)
Checks whether one or more RX data is available.
Definition: IfxGeth_Eth.h:1105
IfxGeth_Eth_Config
Configuration Structure for the Module initialisation.
Definition: IfxGeth_Eth.h:474
IfxGeth_Eth_RmiiPins::refClk
IfxGeth_Refclk_In * refClk
Pointer to REFCLK input pin config.
Definition: IfxGeth_Eth.h:330
IfxGeth_Eth_DmaConfig
Configuration Structure for the DMA initialisation.
Definition: IfxGeth_Eth.h:390
IfxGeth_Eth_TxQueueConfig::txQueueSize
IfxGeth_QueueSize txQueueSize
Tx Queue size.
Definition: IfxGeth_Eth.h:380
IfxGeth_Eth_MiiPins::rxd2
IfxGeth_Rxd_In * rxd2
Pointer to RXD2 input pin config.
Definition: IfxGeth_Eth.h:283
IfxGeth_Eth_FrameConfig
Configuration Structure for TX Frame.
Definition: IfxGeth_Eth.h:488
IfxGeth_Txen_Out
TXEN pin mapping structure.
Definition: IfxGeth_PinMap.h:169
IfxGeth_Eth_TxChannel::txBuf1Size
uint16 txBuf1Size
configured tx buffer 1 size
Definition: IfxGeth_Eth.h:454
IfxGeth_Eth_MacConfig::maxPacketSize
uint16 maxPacketSize
Maximum size of the ethernet packet.
Definition: IfxGeth_Eth.h:411
IfxGeth_TxDmaChannel
IfxGeth_TxDmaChannel
Tx DMA channel.
Definition: IfxGeth.h:259
IFXGETH_NUM_DMA_CHANNELS
#define IFXGETH_NUM_DMA_CHANNELS
Number of DMA channels.
Definition: IfxGeth_cfg.h:94
IfxGeth_Eth_TxChannel::txCount
uint32 txCount
Number of frames transmitted.
Definition: IfxGeth_Eth.h:453
IfxGeth_Eth_setupMiiOutputPins
IFX_EXTERN void IfxGeth_Eth_setupMiiOutputPins(IfxGeth_Eth *geth, const IfxGeth_Eth_MiiPins *miiPins)
setup MII mode output pins
Definition: IfxGeth_Eth.c:792
IfxGeth_Eth_getBaseRxDescriptor
IFX_INLINE volatile IfxGeth_RxDescr * IfxGeth_Eth_getBaseRxDescriptor(IfxGeth_Eth *geth, IfxGeth_RxDmaChannel channelId)
Returns the pointer to base RX descriptor in the list.
Definition: IfxGeth_Eth.h:1093
IfxGeth_Eth_DmaInterruptConfig::channelId
IfxGeth_DmaChannel channelId
DMA channel ID (irrespective of TX and Rx for interrupt configuration)
Definition: IfxGeth_Eth.h:266
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxGeth_Eth_TxChannelConfig::channelId
IfxGeth_TxDmaChannel channelId
Tx DMA channel Index.
Definition: IfxGeth_Eth.h:368
IfxGeth_Eth_RgmiiPins::txCtl
IfxGeth_Txctl_Out * txCtl
Pointer to TXCTL output pin config.
Definition: IfxGeth_Eth.h:313
IfxGeth_Refclk_In
REFCLK pin mapping structure.
Definition: IfxGeth_PinMap.h:96
IfxGeth_Eth_MiiPins::txEn
IfxGeth_Txen_Out * txEn
Pointer to TXEN output pin config.
Definition: IfxGeth_Eth.h:285
Ifx_Assert.h
Assert functions.
IfxGeth_Eth_startTransmitters
IFX_EXTERN void IfxGeth_Eth_startTransmitters(IfxGeth_Eth *geth, uint32 numOfChannels)
Start the transmitter functions of MAC and all selected number of DMA channels.
Definition: IfxGeth_Eth.c:1053
IfxGeth_Rxclk_In
RXCLK pin mapping structure.
Definition: IfxGeth_PinMap.h:104
IfxGeth_Txd_Out
TXD pin mapping structure.
Definition: IfxGeth_PinMap.h:153
IfxGeth_Eth_MiiPins::col
IfxGeth_Col_In * col
pointer to COL input pin config
Definition: IfxGeth_Eth.h:276
IfxGeth_Eth_setupRgmiiOutputPins
IFX_EXTERN void IfxGeth_Eth_setupRgmiiOutputPins(IfxGeth_Eth *geth, const IfxGeth_Eth_RgmiiPins *rgmiiPins)
Set up RGMII mode output pins.
Definition: IfxGeth_Eth.c:887
IfxGeth_Eth_waitTransmitBuffer
IFX_INLINE void * IfxGeth_Eth_waitTransmitBuffer(IfxGeth_Eth *geth, IfxGeth_TxDmaChannel channelId)
Waits for one TX buffer becomes available.
Definition: IfxGeth_Eth.h:1111
IfxGeth_PhyInterfaceMode
IfxGeth_PhyInterfaceMode
External Phy Interface RMII Mode.
Definition: IfxGeth.h:156
IfxGeth_Eth_DmaConfig::fixedBurstEnabled
boolean fixedBurstEnabled
Enable/Disable Fixed Burst length.
Definition: IfxGeth_Eth.h:395
IfxGeth_ServiceRequest
IfxGeth_ServiceRequest
Geth service request index.
Definition: IfxGeth.h:243
IfxGeth_Eth_initModuleConfig
IFX_EXTERN void IfxGeth_Eth_initModuleConfig(IfxGeth_Eth_Config *config, Ifx_GETH *gethSFR)
Initialises the config structure with default values.
Definition: IfxGeth_Eth.c:318
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxGeth_Eth_MiiPins::txd2
IfxGeth_Txd_Out * txd2
Pointer to TXD2 output pin config.
Definition: IfxGeth_Eth.h:289
IfxGeth_LoopbackMode
IfxGeth_LoopbackMode
Loopback Mode Definition in MAC_CONFIGURATION.B.LM.
Definition: IfxGeth.h:300
IfxGeth_Eth_startReceiver
IFX_EXTERN void IfxGeth_Eth_startReceiver(IfxGeth_Eth *geth, IfxGeth_RxDmaChannel channelId)
Start the Receiver functions of MAC and selected channel of DMA.
Definition: IfxGeth_Eth.c:1027
IfxGeth_Mdio_InOut
MDIO pin mapping structure.
Definition: IfxGeth_PinMap.h:144
IfxGeth_Eth_RxChannelConfig::rxBuffer1Size
uint16 rxBuffer1Size
Size of Rx Buffer 1.
Definition: IfxGeth_Eth.h:348
IfxGeth_Eth_MacConfig::lineSpeed
IfxGeth_LineSpeed lineSpeed
Ethernet Line Speed.
Definition: IfxGeth_Eth.h:408
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxGeth_RxDmaChannel
IfxGeth_RxDmaChannel
Rx DMA channel.
Definition: IfxGeth.h:223
IfxGeth_Eth_getActualRxDescriptor
IFX_INLINE volatile IfxGeth_RxDescr * IfxGeth_Eth_getActualRxDescriptor(IfxGeth_Eth *geth, IfxGeth_RxDmaChannel channelId)
Returns the pointer to current RX descriptor.
Definition: IfxGeth_Eth.h:1081
IfxGeth_Eth_TxChannelConfig::txDescrList
IfxGeth_TxDescrList * txDescrList
pointer to TX descriptors RAM
Definition: IfxGeth_Eth.h:370
IfxGeth_Eth_RxChannel::rxCount
uint32 rxCount
Number of frames received.
Definition: IfxGeth_Eth.h:443
IfxGeth_Eth_MiiPins::txd1
IfxGeth_Txd_Out * txd1
Pointer to TXD1 output pin config.
Definition: IfxGeth_Eth.h:288
IfxGeth_Eth_RgmiiPins
Port pins for RGMII mode configuration.
Definition: IfxGeth_Eth.h:306
IfxGeth_Eth_MiiPins::txd3
IfxGeth_Txd_Out * txd3
Pointer to TXD3 output pin config.
Definition: IfxGeth_Eth.h:290
IfxGeth_Txer_Out
TXER pin mapping structure.
Definition: IfxGeth_PinMap.h:177
IfxGeth_DmaChannel
IfxGeth_DmaChannel
DMA channel Index.
Definition: IfxGeth.h:98
IfxGeth_Eth_Config::mac
IfxGeth_Eth_MacConfig mac
Configuration Structure for the the MAC initialisation.
Definition: IfxGeth_Eth.h:479
IfxGeth_Eth_shuffleRxDescriptor
IFX_EXTERN void IfxGeth_Eth_shuffleRxDescriptor(IfxGeth_Eth *geth, IfxGeth_RxDmaChannel channelId)
Updates the current Rx descriptor pointer in the handle to next Rx descriptor.
Definition: IfxGeth_Eth.c:991
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxGeth_Eth_RmiiPins::crsDiv
IfxGeth_Crsdv_In * crsDiv
pointer to CRSDIV input pin config
Definition: IfxGeth_Eth.h:329
IfxGeth_Eth_RxQueueConfig
Rx Queue Configuration.
Definition: IfxGeth_Eth.h:353
IfxGeth_Mdc_Out
MDC pin mapping structure.
Definition: IfxGeth_PinMap.h:136
IfxGeth_Eth_startReceivers
IFX_EXTERN void IfxGeth_Eth_startReceivers(IfxGeth_Eth *geth, uint32 numOfChannels)
Start the Receiver functions of MAC and all selected number of DMA channels.
Definition: IfxGeth_Eth.c:1034
IfxGeth_TxSchedulingAlgorithm
IfxGeth_TxSchedulingAlgorithm
Tx Scheduling Algorithm for Tx Queues Definition in MTL_OPERATION_MODE.B.SCHALG.
Definition: IfxGeth.h:280
IfxGeth_Eth_RxQueueConfig::forwardErrorPacket
boolean forwardErrorPacket
Error Packet Forwarding Enable/Disable.
Definition: IfxGeth_Eth.h:357
IFXGETH_NUM_TX_CHANNELS
#define IFXGETH_NUM_TX_CHANNELS
Number of Tx DMA channels of DMA.
Definition: IfxGeth_cfg.h:82
IfxGeth_Rxdv_In
RXDV pin mapping structure.
Definition: IfxGeth_PinMap.h:72
IfxGeth_Txclk_In
TXCLK pin mapping structure.
Definition: IfxGeth_PinMap.h:112
IfxGeth_Eth_wakeupTransmitter
IFX_EXTERN void IfxGeth_Eth_wakeupTransmitter(IfxGeth_Eth *geth, IfxGeth_TxDmaChannel channelId)
Wakes up the transmitter functions of MAC and selected channel of DMA.
Definition: IfxGeth_Eth.c:1093
IfxGeth_Eth_setupMiiInputPins
IFX_EXTERN void IfxGeth_Eth_setupMiiInputPins(IfxGeth_Eth *geth, const IfxGeth_Eth_MiiPins *miiPins)
Set up MII mode input pins.
Definition: IfxGeth_Eth.c:698
IfxGeth_Crs_In
CRS pin mapping structure.
Definition: IfxGeth_PinMap.h:56
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxGeth_Eth_initModule
IFX_EXTERN void IfxGeth_Eth_initModule(IfxGeth_Eth *geth, IfxGeth_Eth_Config *config)
Initialises the Geth Module with given configuration.
Definition: IfxGeth_Eth.c:257
IfxGeth_Eth_TxChannelConfig::txBuffer1Size
uint16 txBuffer1Size
Size of Tx Buffer 1.
Definition: IfxGeth_Eth.h:372
IfxGeth_Eth_TxChannel
handle sturcture for DMA tx channel
Definition: IfxGeth_Eth.h:448
IfxGeth_Eth_RxQueueConfig::storeAndForward
boolean storeAndForward
Receive Store and Forward Enable/Disable.
Definition: IfxGeth_Eth.h:355
IfxGeth_Crsdv_In
CRSDV pin mapping structure.
Definition: IfxGeth_PinMap.h:64
IfxGeth_DuplexMode
IfxGeth_DuplexMode
Duplex Mode Definintion in MAC_CONFIGURATION.B.DM.
Definition: IfxGeth.h:291
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxGeth_Eth_configureMTL
IFX_EXTERN void IfxGeth_Eth_configureMTL(IfxGeth_Eth *geth, IfxGeth_Eth_MtlConfig *mtlConfig)
Configures the MTL.
Definition: IfxGeth_Eth.c:117
IfxGeth_Eth_MiiPins::rxDv
IfxGeth_Rxdv_In * rxDv
Pointer to RXDV input pin config.
Definition: IfxGeth_Eth.h:279
IfxGeth_Eth_setupRmiiOutputPins
IFX_EXTERN void IfxGeth_Eth_setupRmiiOutputPins(IfxGeth_Eth *geth, const IfxGeth_Eth_RmiiPins *rmiiPins)
setup RMII mode output pins
Definition: IfxGeth_Eth.c:963
IfxGeth_Eth_MtlConfig::numOfRxQueues
uint32 numOfRxQueues
Number of Rx Queues.
Definition: IfxGeth_Eth.h:420
IfxGeth_Eth_configureMacCore
IFX_EXTERN void IfxGeth_Eth_configureMacCore(IfxGeth_Eth *geth, IfxGeth_Eth_MacConfig *macConfig)
Configures the MAC core.
Definition: IfxGeth_Eth.c:186
IfxGeth_Eth_getReceiveBuffer
IFX_EXTERN void * IfxGeth_Eth_getReceiveBuffer(IfxGeth_Eth *geth, IfxGeth_RxDmaChannel channelId)
Gets receive buffer note: IfxEth_freeReceiveBuffer() shall be called after the data from the RX buffe...
Definition: IfxGeth_Eth.c:224
IfxGeth_Eth_setupRmiiInputPins
IFX_EXTERN void IfxGeth_Eth_setupRmiiInputPins(IfxGeth_Eth *geth, const IfxGeth_Eth_RmiiPins *rmiiPins)
setup RMII mode input pins
Definition: IfxGeth_Eth.c:929
IfxGeth_Eth_RxQueueConfig::daBasedDmaChannelEnabled
boolean daBasedDmaChannelEnabled
DA-based DMA Channel Selection Enable/Disable.
Definition: IfxGeth_Eth.h:359
IfxGeth_Eth_MtlInterruptConfig::serviceRequest
IfxGeth_ServiceRequest serviceRequest
Service Request node for MTL interrupt.
Definition: IfxGeth_Eth.h:299
IfxGeth_Eth_DmaInterruptConfig::priority
Ifx_Priority priority
Interrupt service priority.
Definition: IfxGeth_Eth.h:267
IfxGeth_Eth_RxChannel
Handle sturcture for DMA rx channel.
Definition: IfxGeth_Eth.h:438
IfxGeth_Eth_stopTransmitters
IFX_EXTERN void IfxGeth_Eth_stopTransmitters(IfxGeth_Eth *geth, uint32 numOfChannels)
Stops the transmitter functions of MAC and all selected number of DMA channels.
Definition: IfxGeth_Eth.c:1065
IfxGeth.h
GETH basic functionality.
IfxGeth_Eth_PinConfig::miiPins
IFX_CONST IfxGeth_Eth_MiiPins * miiPins
Structure for MII pins.
Definition: IfxGeth_Eth.h:433
IfxGeth_Eth_RxQueueConfig::rxQueueSize
IfxGeth_QueueSize rxQueueSize
Rx Queue size.
Definition: IfxGeth_Eth.h:356
IfxGeth_TxDescrList::descr
volatile IfxGeth_TxDescr descr[IFXGETH_MAX_TX_DESCRIPTORS]
list of TX descriptors
Definition: IfxGeth.h:695
IfxGeth_Eth_MiiPins::txd0
IfxGeth_Txd_Out * txd0
Pointer to TXD0 output pin config.
Definition: IfxGeth_Eth.h:287
IfxGeth_Eth_TxChannelConfig::txBuffer1StartAddress
uint32 * txBuffer1StartAddress
Start address of Tx Buffer 1.
Definition: IfxGeth_Eth.h:371
IfxGeth_Grefclk_In
GREFCLK pin mapping structure.
Definition: IfxGeth_PinMap.h:88
IfxGeth_Eth_MiiPins::txEr
IfxGeth_Txer_Out * txEr
Pointer to TXER output pin config.
Definition: IfxGeth_Eth.h:286
IfxGeth_Eth_getBaseTxDescriptor
IFX_INLINE volatile IfxGeth_TxDescr * IfxGeth_Eth_getBaseTxDescriptor(IfxGeth_Eth *geth, IfxGeth_TxDmaChannel channelId)
Returns the pointer to base TX descriptor in the list.
Definition: IfxGeth_Eth.h:1099
IFXGETH_NUM_RX_CHANNELS
#define IFXGETH_NUM_RX_CHANNELS
Number of Rx Channels of DMA.
Definition: IfxGeth_cfg.h:86
IFXGETH_NUM_RX_QUEUES
#define IFXGETH_NUM_RX_QUEUES
Number of Rx queues in MTL block.
Definition: IfxGeth_cfg.h:74
IfxGeth_RxDescr3::R
IfxGeth_RxDescr3_RF_Bits R
Read Format Bitfiled Access.
Definition: IfxGeth.h:610
IfxGeth_Eth_RmiiPins
Port pins for RMII mode configuration.
Definition: IfxGeth_Eth.h:327
IfxGeth_Eth_MiiPins::rxClk
IfxGeth_Rxclk_In * rxClk
Pointer to RXCLK input pin config.
Definition: IfxGeth_Eth.h:278
IfxGeth_Eth_MacConfig::duplexMode
IfxGeth_DuplexMode duplexMode
Duplex Mode.
Definition: IfxGeth_Eth.h:407
IfxGeth_Eth_MiiPins::mdc
IfxGeth_Mdc_Out * mdc
Pointer to MDC output pin config.
Definition: IfxGeth_Eth.h:291
IfxGeth_Eth_MiiPins::rxd3
IfxGeth_Rxd_In * rxd3
Pointer to RXD3 input pin config.
Definition: IfxGeth_Eth.h:284
IfxGeth_Eth_MiiPins::txClk
IfxGeth_Txclk_In * txClk
Pointer to TXCLK input pin config.
Definition: IfxGeth_Eth.h:277
IfxGeth_Eth_FrameConfig::channelId
IfxGeth_TxDmaChannel channelId
Tx DMA channel Index.
Definition: IfxGeth_Eth.h:490
IfxGeth_RxDescrList::descr
volatile IfxGeth_RxDescr descr[IFXGETH_MAX_RX_DESCRIPTORS]
list of RX descriptors
Definition: IfxGeth.h:688
IfxGeth_Eth_MtlConfig::rxArbitrationAlgorithm
IfxGeth_RxArbitrationAlgorithm rxArbitrationAlgorithm
Rx Arbitration Algorithm for Rx queues when no of queues are more than 1.
Definition: IfxGeth_Eth.h:421
IfxGeth_Eth_RxQueueConfig::rxDmaChannelMap
IfxGeth_RxDmaChannel rxDmaChannelMap
Mapped DMA Channel of Rx Queue.
Definition: IfxGeth_Eth.h:360
IfxGeth_Eth_MacConfig::loopbackMode
IfxGeth_LoopbackMode loopbackMode
Loopback mode enable/disable.
Definition: IfxGeth_Eth.h:409
IfxGeth_Rxctl_In
RXCTL pin mapping structure.
Definition: IfxGeth_PinMap.h:80
IfxGeth_Eth_txDescrList
IFX_EXTERN IfxGeth_TxDescrList IfxGeth_Eth_txDescrList[IFXGETH_NUM_MODULES][IFXGETH_NUM_TX_CHANNELS]
Actual tx descriptor lists of all availabe tx channels.
Definition: IfxGeth_Eth.h:1073
IfxGeth_Eth_RxChannelConfig::maxBurstLength
IfxGeth_DmaBurstLength maxBurstLength
Maximum burst length of the channel.
Definition: IfxGeth_Eth.h:345
IfxGeth_Eth
GETH driver Handle.
Definition: IfxGeth_Eth.h:463
IfxGeth_Txctl_Out
TXCTL pin mapping structure.
Definition: IfxGeth_PinMap.h:185
IfxGeth_Eth_Config::phyInterfaceMode
IfxGeth_PhyInterfaceMode phyInterfaceMode
External Phy Interface RMII Mode.
Definition: IfxGeth_Eth.h:477
IfxGeth_Eth_RgmiiPins::rxCtl
IfxGeth_Rxctl_In * rxCtl
Pointer to RXCTL input pin config.
Definition: IfxGeth_Eth.h:319
IfxGeth_Rxer_In
RXER pin mapping structure.
Definition: IfxGeth_PinMap.h:193
IfxGeth_Eth_RgmiiPins::grefClk
IfxGeth_Grefclk_In * grefClk
Pointer to GREFCLK input pin config.
Definition: IfxGeth_Eth.h:322
IfxGeth_Eth_MiiPins::rxd0
IfxGeth_Rxd_In * rxd0
Pointer to RXD0 input pin config.
Definition: IfxGeth_Eth.h:281
IfxGeth_Eth_DmaConfig::addressAlignedBeatsEnabled
boolean addressAlignedBeatsEnabled
Enable/Disable Address Aligned Beats.
Definition: IfxGeth_Eth.h:394
IfxGeth_Eth_TxQueueConfig::txQueueUnderflowInterruptEnabled
boolean txQueueUnderflowInterruptEnabled
Enable/Disable Tx Queue Underflow Interrupt.
Definition: IfxGeth_Eth.h:381
IfxGeth_Eth_RxQueueConfig::forwardUndersizedGoodPacket
boolean forwardUndersizedGoodPacket
Undersized Good Packet Forwarding Enable/Disable.
Definition: IfxGeth_Eth.h:358
IfxGeth_Eth::txChannel
IfxGeth_Eth_TxChannel txChannel[IFXGETH_NUM_TX_CHANNELS]
Tx Channels handle of selected Channels.
Definition: IfxGeth_Eth.h:468
IfxGeth_Eth_MiiPins
Port pins for MII mode configuration.
Definition: IfxGeth_Eth.h:273
IfxGeth_Eth_Config::mtl
IfxGeth_Eth_MtlConfig mtl
Configuration Structure for the MTL initialisation.
Definition: IfxGeth_Eth.h:480
IfxGeth_Eth_MiiPins::rxEr
IfxGeth_Rxer_In * rxEr
Pointer to RXER input pin config.
Definition: IfxGeth_Eth.h:280
IfxGeth_Eth_MtlInterruptConfig
Interrupt configuration structure for MTL block.
Definition: IfxGeth_Eth.h:297
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxGeth_Eth_MtlConfig::txSchedulingAlgorithm
IfxGeth_TxSchedulingAlgorithm txSchedulingAlgorithm
Tx Scheduling Algorithm for Tx queues when no of queues are more than 1.
Definition: IfxGeth_Eth.h:419
IfxGeth_RxDescr::RDES3
IfxGeth_RxDescr3 RDES3
Rx Descriptor DWORD 3.
Definition: IfxGeth.h:667
IfxGeth_Rxd_In
RXD pin mapping structure.
Definition: IfxGeth_PinMap.h:120
IfxGeth_Eth_getActualTxDescriptor
IFX_INLINE volatile IfxGeth_TxDescr * IfxGeth_Eth_getActualTxDescriptor(IfxGeth_Eth *geth, IfxGeth_TxDmaChannel channelId)
Returns the pointer to current TX descriptor.
Definition: IfxGeth_Eth.h:1087
IfxGeth_Eth_Config::pins
IfxGeth_Eth_PinConfig pins
COnfiguration structure for Pins.
Definition: IfxGeth_Eth.h:478
IfxGeth_Eth_getTransmitBuffer
IFX_EXTERN void * IfxGeth_Eth_getTransmitBuffer(IfxGeth_Eth *geth, IfxGeth_TxDmaChannel channelId)
Get the transmit buffer pointer of current descriptor.
Definition: IfxGeth_Eth.c:242
IfxGeth_Eth_RxQueueConfig::rxQueueOverflowInterruptEnabled
boolean rxQueueOverflowInterruptEnabled
Enable/Disable Rx Queue Overflow Interrupt.
Definition: IfxGeth_Eth.h:361
IfxGeth_Eth_RgmiiPins::txClk
IfxGeth_Txclk_Out * txClk
Pointer to TXCLK input pin config.
Definition: IfxGeth_Eth.h:308
IfxGeth_Eth_DmaConfig::numOfRxChannels
uint32 numOfRxChannels
Number of Rx Dma channels.
Definition: IfxGeth_Eth.h:393
IfxGeth_Eth_sendTransmitBuffer
IFX_EXTERN void IfxGeth_Eth_sendTransmitBuffer(IfxGeth_Eth *geth, uint32 packetLength, IfxGeth_TxDmaChannel channelId)
Transmits a frame from a single channel.
Definition: IfxGeth_Eth.c:640
IfxGeth_LineSpeed
IfxGeth_LineSpeed
Ethernet line speed.
Definition: IfxGeth.h:127
IfxGeth_Eth_MtlConfig::numOfTxQueues
uint32 numOfTxQueues
Number of Tx Queues, will also be used to enable the selected number of queues.
Definition: IfxGeth_Eth.h:418
IfxGeth_Eth_DmaConfig::mixedBurstEnabled
boolean mixedBurstEnabled
Enable/Disable Mixed Burst length.
Definition: IfxGeth_Eth.h:396
IfxGeth_Eth_MtlConfig::interrupt
IfxGeth_Eth_MtlInterruptConfig interrupt
Interrupt configuration structure for MTL block.
Definition: IfxGeth_Eth.h:424
IfxGeth_Eth_DmaInterruptConfig
Interrupt configuration structure for DMA Channel.
Definition: IfxGeth_Eth.h:264
IfxGeth_Eth::gethSFR
Ifx_GETH * gethSFR
Pointer to GETH register base address.
Definition: IfxGeth_Eth.h:465
IfxGeth_RxArbitrationAlgorithm
IfxGeth_RxArbitrationAlgorithm
Receive Arbitration Algorithm for Rx Queues Definition in MTL_OPERATION_MODE.B.RAA.
Definition: IfxGeth.h:215
IfxGeth_Eth_FrameConfig::packetLength
uint32 packetLength
the length of the packet to be transmitted in bytes
Definition: IfxGeth_Eth.h:491
IfxGeth_PinMap.h
GETH I/O map.
IfxGeth_Eth_TxChannel::txDescrPtr
volatile IfxGeth_TxDescr * txDescrPtr
Pointer to Tx Descriptor (current descriptor)
Definition: IfxGeth_Eth.h:452
IfxGeth_Eth_setupRgmiiInputPins
IFX_EXTERN void IfxGeth_Eth_setupRgmiiInputPins(IfxGeth_Eth *geth, const IfxGeth_Eth_RgmiiPins *rgmiiPins)
Set up RGMII mode input pins.
Definition: IfxGeth_Eth.c:839
IfxGeth_Eth_startTransmitter
IFX_EXTERN void IfxGeth_Eth_startTransmitter(IfxGeth_Eth *geth, IfxGeth_TxDmaChannel channelId)
Start the transmitter functions of MAC and selected channel of DMA.
Definition: IfxGeth_Eth.c:1046
IfxGeth_RxDescr
Rx Descriptor.
Definition: IfxGeth.h:662
IfxGeth_TxDescr
Tx Descriptor.
Definition: IfxGeth.h:672
IfxGeth_Eth_TxChannelConfig
Configuration sturcture for DMA tx channel.
Definition: IfxGeth_Eth.h:366
IfxGeth_Eth_MiiPins::rxd1
IfxGeth_Rxd_In * rxd1
Pointer to RXD1 input pin config.
Definition: IfxGeth_Eth.h:282
IfxGeth_QueueSize
IfxGeth_QueueSize
Tx/RX Queue size in blocks of 256 bytes Definition in MTL_TXQi_OPERATION_MODE.B.TQS and MTL_RXQi_OPER...
Definition: IfxGeth.h:176
IfxGeth_Eth_MtlConfig
Configuration Structure for the MTL initialisation.
Definition: IfxGeth_Eth.h:416
IfxGeth_Eth_sendFrame
IFX_EXTERN void IfxGeth_Eth_sendFrame(IfxGeth_Eth *geth, IfxGeth_Eth_FrameConfig *config)
Transmits a frame from a single channel.
Definition: IfxGeth_Eth.c:634
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxGeth_DmaBurstLength
IfxGeth_DmaBurstLength
Programmable burst length of DMA channels Definition in DMA_CHi_TX_CONTROL.B.PBL and DMA_CHi_RX_CONTR...
Definition: IfxGeth.h:85
IfxGeth_Eth_freeReceiveBuffer
IFX_EXTERN void IfxGeth_Eth_freeReceiveBuffer(IfxGeth_Eth *geth, IfxGeth_RxDmaChannel channelId)
Free the receive buffer, enabling it for the further reception.
Definition: IfxGeth_Eth.c:209
IfxGeth_Eth_MiiPins::crs
IfxGeth_Crs_In * crs
pointer to CRS input pin config
Definition: IfxGeth_Eth.h:275
IfxGeth_Eth_DmaInterruptConfig::provider
IfxSrc_Tos provider
Interrupt service provider.
Definition: IfxGeth_Eth.h:268
IfxGeth_Eth_RxChannelConfig::rxBuffer1StartAddress
uint32 * rxBuffer1StartAddress
Start address of Rx Buffer 1.
Definition: IfxGeth_Eth.h:347
IfxGeth_Eth_DmaConfig::numOfTxChannels
uint32 numOfTxChannels
Number of Tx Dma channels.
Definition: IfxGeth_Eth.h:392
IfxGeth_Eth_rxDescrList
IFX_EXTERN IfxGeth_RxDescrList IfxGeth_Eth_rxDescrList[IFXGETH_NUM_MODULES][IFXGETH_NUM_RX_CHANNELS]
Actual rx descriptor lists of all availabe rx channels.
Definition: IfxGeth_Eth.h:1069
IfxGeth_Eth_initTransmitDescriptors
IFX_EXTERN void IfxGeth_Eth_initTransmitDescriptors(IfxGeth_Eth *geth, IfxGeth_Eth_TxChannelConfig *config)
Initialises the Tx descriptors of a single channel.
Definition: IfxGeth_Eth.c:593
IfxGeth_Eth_RxChannelConfig
Configuration sturcture for DMA rx channel.
Definition: IfxGeth_Eth.h:342
IfxGeth_Eth_MacConfig
Configuration Structure for the MAC initialisation.
Definition: IfxGeth_Eth.h:405


iLLD_TC38A: IfxGeth_PinMap.c Source File

  • _PinMap
IfxGeth_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxGeth_PinMap.c
3 * \brief GETH I/O map
4 * \ingroup IfxLld_Geth
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "IfxGeth_PinMap.h"
44
45 IfxGeth_Col_In IfxGeth_COL_P11_15_IN = {&MODULE_GETH, {&MODULE_P11,15}, Ifx_RxSel_a};
46 IfxGeth_Crs_In IfxGeth_CRSA_P11_14_IN = {&MODULE_GETH, {&MODULE_P11,14}, Ifx_RxSel_a};
47 IfxGeth_Crs_In IfxGeth_CRSB_P11_11_IN = {&MODULE_GETH, {&MODULE_P11,11}, Ifx_RxSel_b};
48 IfxGeth_Crsdv_In IfxGeth_CRSDVA_P11_11_IN = {&MODULE_GETH, {&MODULE_P11,11}, Ifx_RxSel_a};
49 IfxGeth_Crsdv_In IfxGeth_CRSDVB_P11_14_IN = {&MODULE_GETH, {&MODULE_P11,14}, Ifx_RxSel_b};
50 IfxGeth_Grefclk_In IfxGeth_GREFCLK_P11_5_IN = {&MODULE_GETH, {&MODULE_P11, 5}, Ifx_RxSel_a};
51 IfxGeth_Mdc_Out IfxGeth_MDC_P02_8_OUT = {&MODULE_GETH, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt6};
52 IfxGeth_Mdc_Out IfxGeth_MDC_P12_0_OUT = {&MODULE_GETH, {&MODULE_P12, 0}, IfxPort_OutputIdx_alt6};
53 IfxGeth_Mdc_Out IfxGeth_MDC_P21_2_OUT = {&MODULE_GETH, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt5};
54 IfxGeth_Mdio_InOut IfxGeth_MDIO_P00_0_INOUT = {&MODULE_GETH, {&MODULE_P00, 0}, Ifx_RxSel_a, IfxPort_OutputIdx_general};
55 IfxGeth_Mdio_InOut IfxGeth_MDIO_P12_1_INOUT = {&MODULE_GETH, {&MODULE_P12, 1}, Ifx_RxSel_c, IfxPort_OutputIdx_general};
56 IfxGeth_Mdio_InOut IfxGeth_MDIO_P21_3_INOUT = {&MODULE_GETH, {&MODULE_P21, 3}, Ifx_RxSel_d, IfxPort_OutputIdx_general};
57 IfxGeth_Pps_Out IfxGeth_PPS_P14_4_OUT = {&MODULE_GETH, {&MODULE_P14, 4}, IfxPort_OutputIdx_alt6};
58 IfxGeth_Refclk_In IfxGeth_REFCLKA_P11_12_IN = {&MODULE_GETH, {&MODULE_P11,12}, Ifx_RxSel_a};
59 IfxGeth_Rxclk_In IfxGeth_RXCLKA_P11_12_IN = {&MODULE_GETH, {&MODULE_P11,12}, Ifx_RxSel_a};
60 IfxGeth_Rxclk_In IfxGeth_RXCLKB_P11_4_IN = {&MODULE_GETH, {&MODULE_P11, 4}, Ifx_RxSel_b};
61 IfxGeth_Rxclk_In IfxGeth_RXCLKC_P12_0_IN = {&MODULE_GETH, {&MODULE_P12, 0}, Ifx_RxSel_c};
62 IfxGeth_Rxctl_In IfxGeth_RXCTLA_P11_11_IN = {&MODULE_GETH, {&MODULE_P11,11}, Ifx_RxSel_a};
63 IfxGeth_Rxd_In IfxGeth_RXD0A_P11_10_IN = {&MODULE_GETH, {&MODULE_P11,10}, Ifx_RxSel_a};
64 IfxGeth_Rxd_In IfxGeth_RXD1A_P11_9_IN = {&MODULE_GETH, {&MODULE_P11, 9}, Ifx_RxSel_a};
65 IfxGeth_Rxd_In IfxGeth_RXD2A_P11_8_IN = {&MODULE_GETH, {&MODULE_P11, 8}, Ifx_RxSel_a};
66 IfxGeth_Rxd_In IfxGeth_RXD3A_P11_7_IN = {&MODULE_GETH, {&MODULE_P11, 7}, Ifx_RxSel_a};
67 IfxGeth_Rxdv_In IfxGeth_RXDVA_P11_11_IN = {&MODULE_GETH, {&MODULE_P11,11}, Ifx_RxSel_a};
68 IfxGeth_Rxdv_In IfxGeth_RXDVB_P11_14_IN = {&MODULE_GETH, {&MODULE_P11,14}, Ifx_RxSel_b};
69 IfxGeth_Rxer_In IfxGeth_RXERA_P11_13_IN = {&MODULE_GETH, {&MODULE_P11,13}, Ifx_RxSel_a};
70 IfxGeth_Rxer_In IfxGeth_RXERB_P21_7_IN = {&MODULE_GETH, {&MODULE_P21, 7}, Ifx_RxSel_b};
71 IfxGeth_Rxer_In IfxGeth_RXERC_P10_0_IN = {&MODULE_GETH, {&MODULE_P10, 0}, Ifx_RxSel_c};
72 IfxGeth_Txclk_In IfxGeth_TXCLKA_P11_5_IN = {&MODULE_GETH, {&MODULE_P11, 5}, Ifx_RxSel_a};
73 IfxGeth_Txclk_In IfxGeth_TXCLKB_P11_12_IN = {&MODULE_GETH, {&MODULE_P11,12}, Ifx_RxSel_b};
74 IfxGeth_Txclk_Out IfxGeth_TXCLK_P11_4_OUT = {&MODULE_GETH, {&MODULE_P11, 4}, IfxPort_OutputIdx_alt7};
75 IfxGeth_Txctl_Out IfxGeth_TXCTL_P11_6_OUT = {&MODULE_GETH, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt6};
76 IfxGeth_Txd_Out IfxGeth_TXD0_P11_3_OUT = {&MODULE_GETH, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt6};
77 IfxGeth_Txd_Out IfxGeth_TXD1_P11_2_OUT = {&MODULE_GETH, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt6};
78 IfxGeth_Txd_Out IfxGeth_TXD2_P11_1_OUT = {&MODULE_GETH, {&MODULE_P11, 1}, IfxPort_OutputIdx_alt6};
79 IfxGeth_Txd_Out IfxGeth_TXD3_P11_0_OUT = {&MODULE_GETH, {&MODULE_P11, 0}, IfxPort_OutputIdx_alt6};
80 IfxGeth_Txen_Out IfxGeth_TXEN_P11_6_OUT = {&MODULE_GETH, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt6};
81 IfxGeth_Txer_Out IfxGeth_TXER_P11_4_OUT = {&MODULE_GETH, {&MODULE_P11, 4}, IfxPort_OutputIdx_alt6};
82
83
84 const IfxGeth_Col_In *IfxGeth_Col_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_COL_IN_NUM_ITEMS] = {
85 {
86 &IfxGeth_COL_P11_15_IN
87 }
88 };
89
90 const IfxGeth_Crs_In *IfxGeth_Crs_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_CRS_IN_NUM_ITEMS] = {
91 {
92 &IfxGeth_CRSA_P11_14_IN,
93 &IfxGeth_CRSB_P11_11_IN
94 }
95 };
96
97 const IfxGeth_Crsdv_In *IfxGeth_Crsdv_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_CRSDV_IN_NUM_ITEMS] = {
98 {
99 &IfxGeth_CRSDVA_P11_11_IN,
100 &IfxGeth_CRSDVB_P11_14_IN
101 }
102 };
103
104 const IfxGeth_Grefclk_In *IfxGeth_Grefclk_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_GREFCLK_IN_NUM_ITEMS] = {
105 {
106 &IfxGeth_GREFCLK_P11_5_IN
107 }
108 };
109
110 const IfxGeth_Mdc_Out *IfxGeth_Mdc_Out_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_MDC_OUT_NUM_ITEMS] = {
111 {
112 &IfxGeth_MDC_P02_8_OUT,
113 &IfxGeth_MDC_P12_0_OUT,
114 &IfxGeth_MDC_P21_2_OUT
115 }
116 };
117
118 const IfxGeth_Mdio_InOut *IfxGeth_Mdio_InOut_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_MDIO_INOUT_NUM_ITEMS] = {
119 {
120 &IfxGeth_MDIO_P00_0_INOUT,
121 &IfxGeth_MDIO_P12_1_INOUT,
122 &IfxGeth_MDIO_P21_3_INOUT
123 }
124 };
125
126 const IfxGeth_Pps_Out *IfxGeth_Pps_Out_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_PPS_OUT_NUM_ITEMS] = {
127 {
128 &IfxGeth_PPS_P14_4_OUT
129 }
130 };
131
132 const IfxGeth_Refclk_In *IfxGeth_Refclk_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_REFCLK_IN_NUM_ITEMS] = {
133 {
134 &IfxGeth_REFCLKA_P11_12_IN
135 }
136 };
137
138 const IfxGeth_Rxclk_In *IfxGeth_Rxclk_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_RXCLK_IN_NUM_ITEMS] = {
139 {
140 &IfxGeth_RXCLKA_P11_12_IN,
141 &IfxGeth_RXCLKB_P11_4_IN,
142 &IfxGeth_RXCLKC_P12_0_IN
143 }
144 };
145
146 const IfxGeth_Rxctl_In *IfxGeth_Rxctl_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_RXCTL_IN_NUM_ITEMS] = {
147 {
148 &IfxGeth_RXCTLA_P11_11_IN
149 }
150 };
151
152 const IfxGeth_Rxd_In *IfxGeth_Rxd_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_RXD_IN_NUM_ITEMS] = {
153 {
154 &IfxGeth_RXD3A_P11_7_IN,
155 &IfxGeth_RXD1A_P11_9_IN,
156 &IfxGeth_RXD2A_P11_8_IN,
157 &IfxGeth_RXD0A_P11_10_IN
158 }
159 };
160
161 const IfxGeth_Rxdv_In *IfxGeth_Rxdv_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_RXDV_IN_NUM_ITEMS] = {
162 {
163 &IfxGeth_RXDVA_P11_11_IN,
164 &IfxGeth_RXDVB_P11_14_IN
165 }
166 };
167
168 const IfxGeth_Rxer_In *IfxGeth_Rxer_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_RXER_IN_NUM_ITEMS] = {
169 {
170 &IfxGeth_RXERA_P11_13_IN,
171 &IfxGeth_RXERB_P21_7_IN,
172 &IfxGeth_RXERC_P10_0_IN
173 }
174 };
175
176 const IfxGeth_Txclk_In *IfxGeth_Txclk_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXCLK_IN_NUM_ITEMS] = {
177 {
178 &IfxGeth_TXCLKA_P11_5_IN,
179 &IfxGeth_TXCLKB_P11_12_IN
180 }
181 };
182
183 const IfxGeth_Txclk_Out *IfxGeth_Txclk_Out_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXCLK_OUT_NUM_ITEMS] = {
184 {
185 &IfxGeth_TXCLK_P11_4_OUT
186 }
187 };
188
189 const IfxGeth_Txctl_Out *IfxGeth_Txctl_Out_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXCTL_OUT_NUM_ITEMS] = {
190 {
191 &IfxGeth_TXCTL_P11_6_OUT
192 }
193 };
194
195 const IfxGeth_Txd_Out *IfxGeth_Txd_Out_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXD_OUT_NUM_ITEMS] = {
196 {
197 &IfxGeth_TXD3_P11_0_OUT,
198 &IfxGeth_TXD2_P11_1_OUT,
199 &IfxGeth_TXD1_P11_2_OUT,
200 &IfxGeth_TXD0_P11_3_OUT
201 }
202 };
203
204 const IfxGeth_Txen_Out *IfxGeth_Txen_Out_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXEN_OUT_NUM_ITEMS] = {
205 {
206 &IfxGeth_TXEN_P11_6_OUT
207 }
208 };
209
210 const IfxGeth_Txer_Out *IfxGeth_Txer_Out_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXER_OUT_NUM_ITEMS] = {
211 {
212 &IfxGeth_TXER_P11_4_OUT
213 }
214 };
IfxGeth_RXD2A_P11_8_IN
IfxGeth_Rxd_In IfxGeth_RXD2A_P11_8_IN
Definition: IfxGeth_PinMap.c:65
IfxGeth_MDIO_P21_3_INOUT
IfxGeth_Mdio_InOut IfxGeth_MDIO_P21_3_INOUT
Definition: IfxGeth_PinMap.c:56
IfxGeth_RXDVB_P11_14_IN
IfxGeth_Rxdv_In IfxGeth_RXDVB_P11_14_IN
Definition: IfxGeth_PinMap.c:68
IfxGeth_Txclk_Out
TXCLK pin mapping structure.
Definition: IfxGeth_PinMap.h:161
IfxGeth_MDIO_P00_0_INOUT
IfxGeth_Mdio_InOut IfxGeth_MDIO_P00_0_INOUT
Definition: IfxGeth_PinMap.c:54
Ifx_RxSel_d
Definition: Ifx_Types.h:132
IfxGeth_REFCLKA_P11_12_IN
IfxGeth_Refclk_In IfxGeth_REFCLKA_P11_12_IN
Definition: IfxGeth_PinMap.c:58
IFXGETH_PINMAP_RXCTL_IN_NUM_ITEMS
#define IFXGETH_PINMAP_RXCTL_IN_NUM_ITEMS
Definition: IfxGeth_PinMap.h:257
IfxGeth_Mdio_InOut_pinTable
const IfxGeth_Mdio_InOut * IfxGeth_Mdio_InOut_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_MDIO_INOUT_NUM_ITEMS]
Definition: IfxGeth_PinMap.c:118
IfxGeth_Col_In
COL pin mapping structure.
Definition: IfxGeth_PinMap.h:128
IfxGeth_TXCLKB_P11_12_IN
IfxGeth_Txclk_In IfxGeth_TXCLKB_P11_12_IN
Definition: IfxGeth_PinMap.c:73
IfxGeth_Rxdv_In_pinTable
const IfxGeth_Rxdv_In * IfxGeth_Rxdv_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_RXDV_IN_NUM_ITEMS]
Definition: IfxGeth_PinMap.c:161
IFXGETH_PINMAP_TXCTL_OUT_NUM_ITEMS
#define IFXGETH_PINMAP_TXCTL_OUT_NUM_ITEMS
Definition: IfxGeth_PinMap.h:263
IfxGeth_TXD0_P11_3_OUT
IfxGeth_Txd_Out IfxGeth_TXD0_P11_3_OUT
Definition: IfxGeth_PinMap.c:76
IfxGeth_RXD1A_P11_9_IN
IfxGeth_Rxd_In IfxGeth_RXD1A_P11_9_IN
Definition: IfxGeth_PinMap.c:64
IfxGeth_RXCLKB_P11_4_IN
IfxGeth_Rxclk_In IfxGeth_RXCLKB_P11_4_IN
Definition: IfxGeth_PinMap.c:60
IfxGeth_Txen_Out
TXEN pin mapping structure.
Definition: IfxGeth_PinMap.h:169
IFXGETH_PINMAP_RXD_IN_NUM_ITEMS
#define IFXGETH_PINMAP_RXD_IN_NUM_ITEMS
Definition: IfxGeth_PinMap.h:258
Ifx_RxSel_a
Definition: Ifx_Types.h:129
IfxGeth_Refclk_In
REFCLK pin mapping structure.
Definition: IfxGeth_PinMap.h:96
IfxGeth_COL_P11_15_IN
IfxGeth_Col_In IfxGeth_COL_P11_15_IN
Definition: IfxGeth_PinMap.c:45
IfxGeth_Rxclk_In
RXCLK pin mapping structure.
Definition: IfxGeth_PinMap.h:104
IfxGeth_Txd_Out
TXD pin mapping structure.
Definition: IfxGeth_PinMap.h:153
IfxGeth_TXD3_P11_0_OUT
IfxGeth_Txd_Out IfxGeth_TXD3_P11_0_OUT
Definition: IfxGeth_PinMap.c:79
IfxGeth_RXCLKA_P11_12_IN
IfxGeth_Rxclk_In IfxGeth_RXCLKA_P11_12_IN
Definition: IfxGeth_PinMap.c:59
IfxGeth_Pps_Out_pinTable
const IfxGeth_Pps_Out * IfxGeth_Pps_Out_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_PPS_OUT_NUM_ITEMS]
Definition: IfxGeth_PinMap.c:126
IfxGeth_Mdc_Out_pinTable
const IfxGeth_Mdc_Out * IfxGeth_Mdc_Out_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_MDC_OUT_NUM_ITEMS]
Definition: IfxGeth_PinMap.c:110
IfxGeth_TXER_P11_4_OUT
IfxGeth_Txer_Out IfxGeth_TXER_P11_4_OUT
Definition: IfxGeth_PinMap.c:81
IfxGeth_RXERA_P11_13_IN
IfxGeth_Rxer_In IfxGeth_RXERA_P11_13_IN
Definition: IfxGeth_PinMap.c:69
IFXGETH_PINMAP_GREFCLK_IN_NUM_ITEMS
#define IFXGETH_PINMAP_GREFCLK_IN_NUM_ITEMS
Definition: IfxGeth_PinMap.h:251
IfxGeth_TXEN_P11_6_OUT
IfxGeth_Txen_Out IfxGeth_TXEN_P11_6_OUT
Definition: IfxGeth_PinMap.c:80
IFXGETH_PINMAP_CRSDV_IN_NUM_ITEMS
#define IFXGETH_PINMAP_CRSDV_IN_NUM_ITEMS
Definition: IfxGeth_PinMap.h:250
IfxGeth_Mdio_InOut
MDIO pin mapping structure.
Definition: IfxGeth_PinMap.h:144
IfxGeth_RXERB_P21_7_IN
IfxGeth_Rxer_In IfxGeth_RXERB_P21_7_IN
Definition: IfxGeth_PinMap.c:70
Ifx_RxSel_b
Definition: Ifx_Types.h:130
IfxGeth_MDC_P12_0_OUT
IfxGeth_Mdc_Out IfxGeth_MDC_P12_0_OUT
Definition: IfxGeth_PinMap.c:52
IfxGeth_Rxctl_In_pinTable
const IfxGeth_Rxctl_In * IfxGeth_Rxctl_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_RXCTL_IN_NUM_ITEMS]
Definition: IfxGeth_PinMap.c:146
IfxGeth_Txer_Out
TXER pin mapping structure.
Definition: IfxGeth_PinMap.h:177
IfxGeth_Rxd_In_pinTable
const IfxGeth_Rxd_In * IfxGeth_Rxd_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_RXD_IN_NUM_ITEMS]
Definition: IfxGeth_PinMap.c:152
IFXGETH_PINMAP_TXCLK_IN_NUM_ITEMS
#define IFXGETH_PINMAP_TXCLK_IN_NUM_ITEMS
Definition: IfxGeth_PinMap.h:261
IFXGETH_PINMAP_COL_IN_NUM_ITEMS
#define IFXGETH_PINMAP_COL_IN_NUM_ITEMS
Definition: IfxGeth_PinMap.h:248
IfxGeth_Refclk_In_pinTable
const IfxGeth_Refclk_In * IfxGeth_Refclk_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_REFCLK_IN_NUM_ITEMS]
Definition: IfxGeth_PinMap.c:132
IFXGETH_PINMAP_RXER_IN_NUM_ITEMS
#define IFXGETH_PINMAP_RXER_IN_NUM_ITEMS
Definition: IfxGeth_PinMap.h:260
IfxGeth_TXCLK_P11_4_OUT
IfxGeth_Txclk_Out IfxGeth_TXCLK_P11_4_OUT
Definition: IfxGeth_PinMap.c:74
IfxPort_OutputIdx_alt6
Definition: IfxPort.h:134
IfxGeth_CRSB_P11_11_IN
IfxGeth_Crs_In IfxGeth_CRSB_P11_11_IN
Definition: IfxGeth_PinMap.c:47
IfxGeth_Mdc_Out
MDC pin mapping structure.
Definition: IfxGeth_PinMap.h:136
IFXGETH_PINMAP_NUM_MODULES
#define IFXGETH_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxGeth_PinMap.h:247
IFXGETH_PINMAP_MDC_OUT_NUM_ITEMS
#define IFXGETH_PINMAP_MDC_OUT_NUM_ITEMS
Definition: IfxGeth_PinMap.h:252
IfxGeth_Txd_Out_pinTable
const IfxGeth_Txd_Out * IfxGeth_Txd_Out_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXD_OUT_NUM_ITEMS]
Definition: IfxGeth_PinMap.c:195
IfxPort_OutputIdx_general
Definition: IfxPort.h:128
IfxGeth_Rxdv_In
RXDV pin mapping structure.
Definition: IfxGeth_PinMap.h:72
IfxGeth_Txclk_In
TXCLK pin mapping structure.
Definition: IfxGeth_PinMap.h:112
IfxGeth_Crs_In_pinTable
const IfxGeth_Crs_In * IfxGeth_Crs_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_CRS_IN_NUM_ITEMS]
Definition: IfxGeth_PinMap.c:90
IfxGeth_Crs_In
CRS pin mapping structure.
Definition: IfxGeth_PinMap.h:56
IfxGeth_Txen_Out_pinTable
const IfxGeth_Txen_Out * IfxGeth_Txen_Out_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXEN_OUT_NUM_ITEMS]
Definition: IfxGeth_PinMap.c:204
IfxGeth_RXCLKC_P12_0_IN
IfxGeth_Rxclk_In IfxGeth_RXCLKC_P12_0_IN
Definition: IfxGeth_PinMap.c:61
IFXGETH_PINMAP_REFCLK_IN_NUM_ITEMS
#define IFXGETH_PINMAP_REFCLK_IN_NUM_ITEMS
Definition: IfxGeth_PinMap.h:255
IfxGeth_Crsdv_In
CRSDV pin mapping structure.
Definition: IfxGeth_PinMap.h:64
IfxGeth_MDC_P02_8_OUT
IfxGeth_Mdc_Out IfxGeth_MDC_P02_8_OUT
Definition: IfxGeth_PinMap.c:51
IfxGeth_TXCTL_P11_6_OUT
IfxGeth_Txctl_Out IfxGeth_TXCTL_P11_6_OUT
Definition: IfxGeth_PinMap.c:75
IFXGETH_PINMAP_RXCLK_IN_NUM_ITEMS
#define IFXGETH_PINMAP_RXCLK_IN_NUM_ITEMS
Definition: IfxGeth_PinMap.h:256
IfxGeth_Col_In_pinTable
const IfxGeth_Col_In * IfxGeth_Col_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_COL_IN_NUM_ITEMS]
Definition: IfxGeth_PinMap.c:84
IfxGeth_MDIO_P12_1_INOUT
IfxGeth_Mdio_InOut IfxGeth_MDIO_P12_1_INOUT
Definition: IfxGeth_PinMap.c:55
Ifx_RxSel_c
Definition: Ifx_Types.h:131
IfxGeth_CRSA_P11_14_IN
IfxGeth_Crs_In IfxGeth_CRSA_P11_14_IN
Definition: IfxGeth_PinMap.c:46
IFXGETH_PINMAP_TXCLK_OUT_NUM_ITEMS
#define IFXGETH_PINMAP_TXCLK_OUT_NUM_ITEMS
Definition: IfxGeth_PinMap.h:262
IfxGeth_Txclk_Out_pinTable
const IfxGeth_Txclk_Out * IfxGeth_Txclk_Out_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXCLK_OUT_NUM_ITEMS]
Definition: IfxGeth_PinMap.c:183
IfxGeth_TXD2_P11_1_OUT
IfxGeth_Txd_Out IfxGeth_TXD2_P11_1_OUT
Definition: IfxGeth_PinMap.c:78
IfxGeth_Grefclk_In
GREFCLK pin mapping structure.
Definition: IfxGeth_PinMap.h:88
IFXGETH_PINMAP_TXEN_OUT_NUM_ITEMS
#define IFXGETH_PINMAP_TXEN_OUT_NUM_ITEMS
Definition: IfxGeth_PinMap.h:265
IfxGeth_TXD1_P11_2_OUT
IfxGeth_Txd_Out IfxGeth_TXD1_P11_2_OUT
Definition: IfxGeth_PinMap.c:77
IfxGeth_Crsdv_In_pinTable
const IfxGeth_Crsdv_In * IfxGeth_Crsdv_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_CRSDV_IN_NUM_ITEMS]
Definition: IfxGeth_PinMap.c:97
IfxGeth_Rxctl_In
RXCTL pin mapping structure.
Definition: IfxGeth_PinMap.h:80
IFXGETH_PINMAP_TXD_OUT_NUM_ITEMS
#define IFXGETH_PINMAP_TXD_OUT_NUM_ITEMS
Definition: IfxGeth_PinMap.h:264
IfxGeth_Txctl_Out
TXCTL pin mapping structure.
Definition: IfxGeth_PinMap.h:185
IfxGeth_Rxer_In
RXER pin mapping structure.
Definition: IfxGeth_PinMap.h:193
IfxGeth_RXDVA_P11_11_IN
IfxGeth_Rxdv_In IfxGeth_RXDVA_P11_11_IN
Definition: IfxGeth_PinMap.c:67
IfxGeth_Pps_Out
PPS pin mapping structure.
Definition: IfxGeth_PinMap.h:201
IfxPort_OutputIdx_alt7
Definition: IfxPort.h:135
IfxGeth_Rxer_In_pinTable
const IfxGeth_Rxer_In * IfxGeth_Rxer_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_RXER_IN_NUM_ITEMS]
Definition: IfxGeth_PinMap.c:168
IFXGETH_PINMAP_CRS_IN_NUM_ITEMS
#define IFXGETH_PINMAP_CRS_IN_NUM_ITEMS
Definition: IfxGeth_PinMap.h:249
IFXGETH_PINMAP_MDIO_INOUT_NUM_ITEMS
#define IFXGETH_PINMAP_MDIO_INOUT_NUM_ITEMS
Definition: IfxGeth_PinMap.h:253
IfxGeth_Txclk_In_pinTable
const IfxGeth_Txclk_In * IfxGeth_Txclk_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXCLK_IN_NUM_ITEMS]
Definition: IfxGeth_PinMap.c:176
IFXGETH_PINMAP_PPS_OUT_NUM_ITEMS
#define IFXGETH_PINMAP_PPS_OUT_NUM_ITEMS
Definition: IfxGeth_PinMap.h:254
IfxGeth_RXERC_P10_0_IN
IfxGeth_Rxer_In IfxGeth_RXERC_P10_0_IN
Definition: IfxGeth_PinMap.c:71
IfxGeth_Rxd_In
RXD pin mapping structure.
Definition: IfxGeth_PinMap.h:120
IfxGeth_RXD3A_P11_7_IN
IfxGeth_Rxd_In IfxGeth_RXD3A_P11_7_IN
Definition: IfxGeth_PinMap.c:66
IFXGETH_PINMAP_TXER_OUT_NUM_ITEMS
#define IFXGETH_PINMAP_TXER_OUT_NUM_ITEMS
Definition: IfxGeth_PinMap.h:266
IfxGeth_GREFCLK_P11_5_IN
IfxGeth_Grefclk_In IfxGeth_GREFCLK_P11_5_IN
Definition: IfxGeth_PinMap.c:50
IfxGeth_PPS_P14_4_OUT
IfxGeth_Pps_Out IfxGeth_PPS_P14_4_OUT
Definition: IfxGeth_PinMap.c:57
IfxGeth_PinMap.h
GETH I/O map.
IfxGeth_Txctl_Out_pinTable
const IfxGeth_Txctl_Out * IfxGeth_Txctl_Out_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXCTL_OUT_NUM_ITEMS]
Definition: IfxGeth_PinMap.c:189
IfxGeth_RXCTLA_P11_11_IN
IfxGeth_Rxctl_In IfxGeth_RXCTLA_P11_11_IN
Definition: IfxGeth_PinMap.c:62
IfxGeth_TXCLKA_P11_5_IN
IfxGeth_Txclk_In IfxGeth_TXCLKA_P11_5_IN
Definition: IfxGeth_PinMap.c:72
IfxPort_OutputIdx_alt5
Definition: IfxPort.h:133
IfxGeth_CRSDVB_P11_14_IN
IfxGeth_Crsdv_In IfxGeth_CRSDVB_P11_14_IN
Definition: IfxGeth_PinMap.c:49
IfxGeth_Rxclk_In_pinTable
const IfxGeth_Rxclk_In * IfxGeth_Rxclk_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_RXCLK_IN_NUM_ITEMS]
Definition: IfxGeth_PinMap.c:138
IfxGeth_Grefclk_In_pinTable
const IfxGeth_Grefclk_In * IfxGeth_Grefclk_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_GREFCLK_IN_NUM_ITEMS]
Definition: IfxGeth_PinMap.c:104
IFXGETH_PINMAP_RXDV_IN_NUM_ITEMS
#define IFXGETH_PINMAP_RXDV_IN_NUM_ITEMS
Definition: IfxGeth_PinMap.h:259
IfxGeth_RXD0A_P11_10_IN
IfxGeth_Rxd_In IfxGeth_RXD0A_P11_10_IN
Definition: IfxGeth_PinMap.c:63
IfxGeth_CRSDVA_P11_11_IN
IfxGeth_Crsdv_In IfxGeth_CRSDVA_P11_11_IN
Definition: IfxGeth_PinMap.c:48
IfxGeth_MDC_P21_2_OUT
IfxGeth_Mdc_Out IfxGeth_MDC_P21_2_OUT
Definition: IfxGeth_PinMap.c:53
IfxGeth_Txer_Out_pinTable
const IfxGeth_Txer_Out * IfxGeth_Txer_Out_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXER_OUT_NUM_ITEMS]
Definition: IfxGeth_PinMap.c:210


iLLD_TC38A: IfxGeth_PinMap.h Source File

  • _PinMap
IfxGeth_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxGeth_PinMap.h
3 * \brief GETH I/O map
4 * \ingroup IfxLld_Geth
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Geth_pinmap GETH Pin Mapping
42 * \ingroup IfxLld_Geth
43 */
44
45 #ifndef IFXGETH_PINMAP_H
46 #define IFXGETH_PINMAP_H
47
48 #include <IfxGeth_reg.h>
49 #include <_Impl/IfxGeth_cfg.h>
50 #include <Port/Std/IfxPort.h>
51
52 /** \addtogroup IfxLld_Geth_pinmap
53 * \{ */
54
55 /** \brief CRS pin mapping structure */
56 typedef const struct
57 {
58 Ifx_GETH* module; /**< \brief Base address */
59 IfxPort_Pin pin; /**< \brief Port pin */
60 Ifx_RxSel select; /**< \brief Input multiplexer value */
61 } IfxGeth_Crs_In;
62
63 /** \brief CRSDV pin mapping structure */
64 typedef const struct
65 {
66 Ifx_GETH* module; /**< \brief Base address */
67 IfxPort_Pin pin; /**< \brief Port pin */
68 Ifx_RxSel select; /**< \brief Input multiplexer value */
69 } IfxGeth_Crsdv_In;
70
71 /** \brief RXDV pin mapping structure */
72 typedef const struct
73 {
74 Ifx_GETH* module; /**< \brief Base address */
75 IfxPort_Pin pin; /**< \brief Port pin */
76 Ifx_RxSel select; /**< \brief Input multiplexer value */
77 } IfxGeth_Rxdv_In;
78
79 /** \brief RXCTL pin mapping structure */
80 typedef const struct
81 {
82 Ifx_GETH* module; /**< \brief Base address */
83 IfxPort_Pin pin; /**< \brief Port pin */
84 Ifx_RxSel select; /**< \brief Input multiplexer value */
85 } IfxGeth_Rxctl_In;
86
87 /** \brief GREFCLK pin mapping structure */
88 typedef const struct
89 {
90 Ifx_GETH* module; /**< \brief Base address */
91 IfxPort_Pin pin; /**< \brief Port pin */
92 Ifx_RxSel select; /**< \brief Input multiplexer value */
93 } IfxGeth_Grefclk_In;
94
95 /** \brief REFCLK pin mapping structure */
96 typedef const struct
97 {
98 Ifx_GETH* module; /**< \brief Base address */
99 IfxPort_Pin pin; /**< \brief Port pin */
100 Ifx_RxSel select; /**< \brief Input multiplexer value */
101 } IfxGeth_Refclk_In;
102
103 /** \brief RXCLK pin mapping structure */
104 typedef const struct
105 {
106 Ifx_GETH* module; /**< \brief Base address */
107 IfxPort_Pin pin; /**< \brief Port pin */
108 Ifx_RxSel select; /**< \brief Input multiplexer value */
109 } IfxGeth_Rxclk_In;
110
111 /** \brief TXCLK pin mapping structure */
112 typedef const struct
113 {
114 Ifx_GETH* module; /**< \brief Base address */
115 IfxPort_Pin pin; /**< \brief Port pin */
116 Ifx_RxSel select; /**< \brief Input multiplexer value */
117 } IfxGeth_Txclk_In;
118
119 /** \brief RXD pin mapping structure */
120 typedef const struct
121 {
122 Ifx_GETH* module; /**< \brief Base address */
123 IfxPort_Pin pin; /**< \brief Port pin */
124 Ifx_RxSel select; /**< \brief Input multiplexer value */
125 } IfxGeth_Rxd_In;
126
127 /** \brief COL pin mapping structure */
128 typedef const struct
129 {
130 Ifx_GETH* module; /**< \brief Base address */
131 IfxPort_Pin pin; /**< \brief Port pin */
132 Ifx_RxSel select; /**< \brief Input multiplexer value */
133 } IfxGeth_Col_In;
134
135 /** \brief MDC pin mapping structure */
136 typedef const struct
137 {
138 Ifx_GETH* module; /**< \brief Base address */
139 IfxPort_Pin pin; /**< \brief Port pin */
140 IfxPort_OutputIdx select; /**< \brief Port control code */
141 } IfxGeth_Mdc_Out;
142
143 /** \brief MDIO pin mapping structure */
144 typedef const struct
145 {
146 Ifx_GETH* module; /**< \brief Base address */
147 IfxPort_Pin pin; /**< \brief Port pin */
148 Ifx_RxSel inSelect; /**< \brief Input multiplexer value */
149 IfxPort_OutputIdx outSelect;/**< \brief Port control code */
150 } IfxGeth_Mdio_InOut;
151
152 /** \brief TXD pin mapping structure */
153 typedef const struct
154 {
155 Ifx_GETH* module; /**< \brief Base address */
156 IfxPort_Pin pin; /**< \brief Port pin */
157 IfxPort_OutputIdx select; /**< \brief Port control code */
158 } IfxGeth_Txd_Out;
159
160 /** \brief TXCLK pin mapping structure */
161 typedef const struct
162 {
163 Ifx_GETH* module; /**< \brief Base address */
164 IfxPort_Pin pin; /**< \brief Port pin */
165 IfxPort_OutputIdx select; /**< \brief Port control code */
166 } IfxGeth_Txclk_Out;
167
168 /** \brief TXEN pin mapping structure */
169 typedef const struct
170 {
171 Ifx_GETH* module; /**< \brief Base address */
172 IfxPort_Pin pin; /**< \brief Port pin */
173 IfxPort_OutputIdx select; /**< \brief Port control code */
174 } IfxGeth_Txen_Out;
175
176 /** \brief TXER pin mapping structure */
177 typedef const struct
178 {
179 Ifx_GETH* module; /**< \brief Base address */
180 IfxPort_Pin pin; /**< \brief Port pin */
181 IfxPort_OutputIdx select; /**< \brief Port control code */
182 } IfxGeth_Txer_Out;
183
184 /** \brief TXCTL pin mapping structure */
185 typedef const struct
186 {
187 Ifx_GETH* module; /**< \brief Base address */
188 IfxPort_Pin pin; /**< \brief Port pin */
189 IfxPort_OutputIdx select; /**< \brief Port control code */
190 } IfxGeth_Txctl_Out;
191
192 /** \brief RXER pin mapping structure */
193 typedef const struct
194 {
195 Ifx_GETH* module; /**< \brief Base address */
196 IfxPort_Pin pin; /**< \brief Port pin */
197 Ifx_RxSel select; /**< \brief Input multiplexer value */
198 } IfxGeth_Rxer_In;
199
200 /** \brief PPS pin mapping structure */
201 typedef const struct
202 {
203 Ifx_GETH* module; /**< \brief Base address */
204 IfxPort_Pin pin; /**< \brief Port pin */
205 IfxPort_OutputIdx select; /**< \brief Port control code */
206 } IfxGeth_Pps_Out;
207
208 IFX_EXTERN IfxGeth_Col_In IfxGeth_COL_P11_15_IN; /**< \brief Collision MII */
209 IFX_EXTERN IfxGeth_Crs_In IfxGeth_CRSA_P11_14_IN; /**< \brief Carrier Sense MII */
210 IFX_EXTERN IfxGeth_Crs_In IfxGeth_CRSB_P11_11_IN; /**< \brief Carrier Sense MII */
211 IFX_EXTERN IfxGeth_Crsdv_In IfxGeth_CRSDVA_P11_11_IN; /**< \brief Carrier Sense / Data Valid combi-signal for RMII */
212 IFX_EXTERN IfxGeth_Crsdv_In IfxGeth_CRSDVB_P11_14_IN; /**< \brief Carrier Sense / Data Valid combi-signal for RMII */
213 IFX_EXTERN IfxGeth_Grefclk_In IfxGeth_GREFCLK_P11_5_IN; /**< \brief Gigabit Reference Clock input for RGMII (125 MHz high precission) */
214 IFX_EXTERN IfxGeth_Mdc_Out IfxGeth_MDC_P02_8_OUT; /**< \brief MDIO clock */
215 IFX_EXTERN IfxGeth_Mdc_Out IfxGeth_MDC_P12_0_OUT; /**< \brief MDIO clock */
216 IFX_EXTERN IfxGeth_Mdc_Out IfxGeth_MDC_P21_2_OUT; /**< \brief MDIO clock */
217 IFX_EXTERN IfxGeth_Mdio_InOut IfxGeth_MDIO_P00_0_INOUT; /**< \brief MDIO Output */
218 IFX_EXTERN IfxGeth_Mdio_InOut IfxGeth_MDIO_P12_1_INOUT; /**< \brief MDIO Output */
219 IFX_EXTERN IfxGeth_Mdio_InOut IfxGeth_MDIO_P21_3_INOUT; /**< \brief MDIO Output */
220 IFX_EXTERN IfxGeth_Pps_Out IfxGeth_PPS_P14_4_OUT; /**< \brief Pulse Per Second */
221 IFX_EXTERN IfxGeth_Refclk_In IfxGeth_REFCLKA_P11_12_IN; /**< \brief Reference Clock input for RMII (50 MHz) */
222 IFX_EXTERN IfxGeth_Rxclk_In IfxGeth_RXCLKA_P11_12_IN; /**< \brief Receive Clock MII */
223 IFX_EXTERN IfxGeth_Rxclk_In IfxGeth_RXCLKB_P11_4_IN; /**< \brief Receive Clock MII */
224 IFX_EXTERN IfxGeth_Rxclk_In IfxGeth_RXCLKC_P12_0_IN; /**< \brief Receive Clock MII */
225 IFX_EXTERN IfxGeth_Rxctl_In IfxGeth_RXCTLA_P11_11_IN; /**< \brief Receive Control for RGMII */
226 IFX_EXTERN IfxGeth_Rxd_In IfxGeth_RXD0A_P11_10_IN; /**< \brief Receive Data 0 MII, RMII and RGMII (RGMII can use RXD0A only) */
227 IFX_EXTERN IfxGeth_Rxd_In IfxGeth_RXD1A_P11_9_IN; /**< \brief Receive Data 1 MII, RMII and RGMII (RGMII can use RXD1A only) */
228 IFX_EXTERN IfxGeth_Rxd_In IfxGeth_RXD2A_P11_8_IN; /**< \brief Receive Data 2 MII and RGMII (RGMII can use RXD2A only) */
229 IFX_EXTERN IfxGeth_Rxd_In IfxGeth_RXD3A_P11_7_IN; /**< \brief Receive Data 3 MII and RGMII (RGMII can use RXD3A only) */
230 IFX_EXTERN IfxGeth_Rxdv_In IfxGeth_RXDVA_P11_11_IN; /**< \brief Receive Data Valid MII */
231 IFX_EXTERN IfxGeth_Rxdv_In IfxGeth_RXDVB_P11_14_IN; /**< \brief Receive Data Valid MII */
232 IFX_EXTERN IfxGeth_Rxer_In IfxGeth_RXERA_P11_13_IN; /**< \brief Receive Error MII */
233 IFX_EXTERN IfxGeth_Rxer_In IfxGeth_RXERB_P21_7_IN; /**< \brief Receive Error MII */
234 IFX_EXTERN IfxGeth_Rxer_In IfxGeth_RXERC_P10_0_IN; /**< \brief Receive Error MII */
235 IFX_EXTERN IfxGeth_Txclk_In IfxGeth_TXCLKA_P11_5_IN; /**< \brief Transmit Clock Input for MII */
236 IFX_EXTERN IfxGeth_Txclk_In IfxGeth_TXCLKB_P11_12_IN; /**< \brief Transmit Clock Input for MII */
237 IFX_EXTERN IfxGeth_Txclk_Out IfxGeth_TXCLK_P11_4_OUT; /**< \brief Transmit Clock Output for RGMII */
238 IFX_EXTERN IfxGeth_Txctl_Out IfxGeth_TXCTL_P11_6_OUT; /**< \brief GETH_TXEN 0: Transmit Control for RGMII */
239 IFX_EXTERN IfxGeth_Txd_Out IfxGeth_TXD0_P11_3_OUT; /**< \brief Transmit Data */
240 IFX_EXTERN IfxGeth_Txd_Out IfxGeth_TXD1_P11_2_OUT; /**< \brief Transmit Data */
241 IFX_EXTERN IfxGeth_Txd_Out IfxGeth_TXD2_P11_1_OUT; /**< \brief Transmit Data */
242 IFX_EXTERN IfxGeth_Txd_Out IfxGeth_TXD3_P11_0_OUT; /**< \brief Transmit Data */
243 IFX_EXTERN IfxGeth_Txen_Out IfxGeth_TXEN_P11_6_OUT; /**< \brief Transmit Enable MII and RMII */
244 IFX_EXTERN IfxGeth_Txer_Out IfxGeth_TXER_P11_4_OUT; /**< \brief Transmit Error MII */
245
246 /** \brief Table dimensions */
247 #define IFXGETH_PINMAP_NUM_MODULES 1
248 #define IFXGETH_PINMAP_COL_IN_NUM_ITEMS 1
249 #define IFXGETH_PINMAP_CRS_IN_NUM_ITEMS 2
250 #define IFXGETH_PINMAP_CRSDV_IN_NUM_ITEMS 2
251 #define IFXGETH_PINMAP_GREFCLK_IN_NUM_ITEMS 1
252 #define IFXGETH_PINMAP_MDC_OUT_NUM_ITEMS 3
253 #define IFXGETH_PINMAP_MDIO_INOUT_NUM_ITEMS 3
254 #define IFXGETH_PINMAP_PPS_OUT_NUM_ITEMS 1
255 #define IFXGETH_PINMAP_REFCLK_IN_NUM_ITEMS 1
256 #define IFXGETH_PINMAP_RXCLK_IN_NUM_ITEMS 3
257 #define IFXGETH_PINMAP_RXCTL_IN_NUM_ITEMS 1
258 #define IFXGETH_PINMAP_RXD_IN_NUM_ITEMS 4
259 #define IFXGETH_PINMAP_RXDV_IN_NUM_ITEMS 2
260 #define IFXGETH_PINMAP_RXER_IN_NUM_ITEMS 3
261 #define IFXGETH_PINMAP_TXCLK_IN_NUM_ITEMS 2
262 #define IFXGETH_PINMAP_TXCLK_OUT_NUM_ITEMS 1
263 #define IFXGETH_PINMAP_TXCTL_OUT_NUM_ITEMS 1
264 #define IFXGETH_PINMAP_TXD_OUT_NUM_ITEMS 4
265 #define IFXGETH_PINMAP_TXEN_OUT_NUM_ITEMS 1
266 #define IFXGETH_PINMAP_TXER_OUT_NUM_ITEMS 1
267
268
269 /** \brief IfxGeth_Col_In table */
270 IFX_EXTERN const IfxGeth_Col_In *IfxGeth_Col_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_COL_IN_NUM_ITEMS];
271
272 /** \brief IfxGeth_Crs_In table */
273 IFX_EXTERN const IfxGeth_Crs_In *IfxGeth_Crs_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_CRS_IN_NUM_ITEMS];
274
275 /** \brief IfxGeth_Crsdv_In table */
276 IFX_EXTERN const IfxGeth_Crsdv_In *IfxGeth_Crsdv_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_CRSDV_IN_NUM_ITEMS];
277
278 /** \brief IfxGeth_Grefclk_In table */
279 IFX_EXTERN const IfxGeth_Grefclk_In *IfxGeth_Grefclk_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_GREFCLK_IN_NUM_ITEMS];
280
281 /** \brief IfxGeth_Mdc_Out table */
282 IFX_EXTERN const IfxGeth_Mdc_Out *IfxGeth_Mdc_Out_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_MDC_OUT_NUM_ITEMS];
283
284 /** \brief IfxGeth_Mdio_InOut table */
285 IFX_EXTERN const IfxGeth_Mdio_InOut *IfxGeth_Mdio_InOut_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_MDIO_INOUT_NUM_ITEMS];
286
287 /** \brief IfxGeth_Pps_Out table */
288 IFX_EXTERN const IfxGeth_Pps_Out *IfxGeth_Pps_Out_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_PPS_OUT_NUM_ITEMS];
289
290 /** \brief IfxGeth_Refclk_In table */
291 IFX_EXTERN const IfxGeth_Refclk_In *IfxGeth_Refclk_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_REFCLK_IN_NUM_ITEMS];
292
293 /** \brief IfxGeth_Rxclk_In table */
294 IFX_EXTERN const IfxGeth_Rxclk_In *IfxGeth_Rxclk_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_RXCLK_IN_NUM_ITEMS];
295
296 /** \brief IfxGeth_Rxctl_In table */
297 IFX_EXTERN const IfxGeth_Rxctl_In *IfxGeth_Rxctl_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_RXCTL_IN_NUM_ITEMS];
298
299 /** \brief IfxGeth_Rxd_In table */
300 IFX_EXTERN const IfxGeth_Rxd_In *IfxGeth_Rxd_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_RXD_IN_NUM_ITEMS];
301
302 /** \brief IfxGeth_Rxdv_In table */
303 IFX_EXTERN const IfxGeth_Rxdv_In *IfxGeth_Rxdv_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_RXDV_IN_NUM_ITEMS];
304
305 /** \brief IfxGeth_Rxer_In table */
306 IFX_EXTERN const IfxGeth_Rxer_In *IfxGeth_Rxer_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_RXER_IN_NUM_ITEMS];
307
308 /** \brief IfxGeth_Txclk_In table */
309 IFX_EXTERN const IfxGeth_Txclk_In *IfxGeth_Txclk_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXCLK_IN_NUM_ITEMS];
310
311 /** \brief IfxGeth_Txclk_Out table */
312 IFX_EXTERN const IfxGeth_Txclk_Out *IfxGeth_Txclk_Out_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXCLK_OUT_NUM_ITEMS];
313
314 /** \brief IfxGeth_Txctl_Out table */
315 IFX_EXTERN const IfxGeth_Txctl_Out *IfxGeth_Txctl_Out_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXCTL_OUT_NUM_ITEMS];
316
317 /** \brief IfxGeth_Txd_Out table */
318 IFX_EXTERN const IfxGeth_Txd_Out *IfxGeth_Txd_Out_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXD_OUT_NUM_ITEMS];
319
320 /** \brief IfxGeth_Txen_Out table */
321 IFX_EXTERN const IfxGeth_Txen_Out *IfxGeth_Txen_Out_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXEN_OUT_NUM_ITEMS];
322
323 /** \brief IfxGeth_Txer_Out table */
324 IFX_EXTERN const IfxGeth_Txer_Out *IfxGeth_Txer_Out_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXER_OUT_NUM_ITEMS];
325
326 /** \} */
327
328 #endif /* IFXGETH_PINMAP_H */
IfxGeth_Col_In_pinTable
IFX_EXTERN const IfxGeth_Col_In * IfxGeth_Col_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_COL_IN_NUM_ITEMS]
IfxGeth_Col_In table.
Definition: IfxGeth_PinMap.h:270
IfxGeth_RXD0A_P11_10_IN
IFX_EXTERN IfxGeth_Rxd_In IfxGeth_RXD0A_P11_10_IN
Receive Data 0 MII, RMII and RGMII (RGMII can use RXD0A only)
Definition: IfxGeth_PinMap.h:226
IfxGeth_TXCLKB_P11_12_IN
IFX_EXTERN IfxGeth_Txclk_In IfxGeth_TXCLKB_P11_12_IN
Transmit Clock Input for MII.
Definition: IfxGeth_PinMap.h:236
IfxGeth_Txclk_Out
TXCLK pin mapping structure.
Definition: IfxGeth_PinMap.h:161
IfxGeth_Crsdv_In_pinTable
IFX_EXTERN const IfxGeth_Crsdv_In * IfxGeth_Crsdv_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_CRSDV_IN_NUM_ITEMS]
IfxGeth_Crsdv_In table.
Definition: IfxGeth_PinMap.h:276
IFXGETH_PINMAP_RXCTL_IN_NUM_ITEMS
#define IFXGETH_PINMAP_RXCTL_IN_NUM_ITEMS
Definition: IfxGeth_PinMap.h:257
IfxGeth_Mdio_InOut::inSelect
Ifx_RxSel inSelect
Input multiplexer value.
Definition: IfxGeth_PinMap.h:148
IfxGeth_TXCLK_P11_4_OUT
IFX_EXTERN IfxGeth_Txclk_Out IfxGeth_TXCLK_P11_4_OUT
Transmit Clock Output for RGMII.
Definition: IfxGeth_PinMap.h:237
IfxGeth_Col_In
COL pin mapping structure.
Definition: IfxGeth_PinMap.h:128
IfxGeth_Crs_In::module
Ifx_GETH * module
Base address.
Definition: IfxGeth_PinMap.h:58
IfxGeth_TXD2_P11_1_OUT
IFX_EXTERN IfxGeth_Txd_Out IfxGeth_TXD2_P11_1_OUT
Transmit Data.
Definition: IfxGeth_PinMap.h:241
IfxGeth_Txd_Out_pinTable
IFX_EXTERN const IfxGeth_Txd_Out * IfxGeth_Txd_Out_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXD_OUT_NUM_ITEMS]
IfxGeth_Txd_Out table.
Definition: IfxGeth_PinMap.h:318
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:126
IFXGETH_PINMAP_TXCTL_OUT_NUM_ITEMS
#define IFXGETH_PINMAP_TXCTL_OUT_NUM_ITEMS
Definition: IfxGeth_PinMap.h:263
IfxGeth_Txer_Out_pinTable
IFX_EXTERN const IfxGeth_Txer_Out * IfxGeth_Txer_Out_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXER_OUT_NUM_ITEMS]
IfxGeth_Txer_Out table.
Definition: IfxGeth_PinMap.h:324
IfxGeth_Txen_Out
TXEN pin mapping structure.
Definition: IfxGeth_PinMap.h:169
IfxGeth_Pps_Out_pinTable
IFX_EXTERN const IfxGeth_Pps_Out * IfxGeth_Pps_Out_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_PPS_OUT_NUM_ITEMS]
IfxGeth_Pps_Out table.
Definition: IfxGeth_PinMap.h:288
IfxGeth_TXD0_P11_3_OUT
IFX_EXTERN IfxGeth_Txd_Out IfxGeth_TXD0_P11_3_OUT
Transmit Data.
Definition: IfxGeth_PinMap.h:239
IFXGETH_PINMAP_RXD_IN_NUM_ITEMS
#define IFXGETH_PINMAP_RXD_IN_NUM_ITEMS
Definition: IfxGeth_PinMap.h:258
IfxGeth_Rxdv_In_pinTable
IFX_EXTERN const IfxGeth_Rxdv_In * IfxGeth_Rxdv_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_RXDV_IN_NUM_ITEMS]
IfxGeth_Rxdv_In table.
Definition: IfxGeth_PinMap.h:303
IfxGeth_Mdc_Out_pinTable
IFX_EXTERN const IfxGeth_Mdc_Out * IfxGeth_Mdc_Out_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_MDC_OUT_NUM_ITEMS]
IfxGeth_Mdc_Out table.
Definition: IfxGeth_PinMap.h:282
IfxGeth_Refclk_In
REFCLK pin mapping structure.
Definition: IfxGeth_PinMap.h:96
IfxGeth_Rxclk_In
RXCLK pin mapping structure.
Definition: IfxGeth_PinMap.h:104
IfxGeth_Txd_Out
TXD pin mapping structure.
Definition: IfxGeth_PinMap.h:153
IfxGeth_Txclk_Out_pinTable
IFX_EXTERN const IfxGeth_Txclk_Out * IfxGeth_Txclk_Out_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXCLK_OUT_NUM_ITEMS]
IfxGeth_Txclk_Out table.
Definition: IfxGeth_PinMap.h:312
IfxGeth_MDIO_P21_3_INOUT
IFX_EXTERN IfxGeth_Mdio_InOut IfxGeth_MDIO_P21_3_INOUT
MDIO Output.
Definition: IfxGeth_PinMap.h:219
IFXGETH_PINMAP_GREFCLK_IN_NUM_ITEMS
#define IFXGETH_PINMAP_GREFCLK_IN_NUM_ITEMS
Definition: IfxGeth_PinMap.h:251
IfxGeth_Rxclk_In_pinTable
IFX_EXTERN const IfxGeth_Rxclk_In * IfxGeth_Rxclk_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_RXCLK_IN_NUM_ITEMS]
IfxGeth_Rxclk_In table.
Definition: IfxGeth_PinMap.h:294
IFXGETH_PINMAP_CRSDV_IN_NUM_ITEMS
#define IFXGETH_PINMAP_CRSDV_IN_NUM_ITEMS
Definition: IfxGeth_PinMap.h:250
IfxGeth_RXD3A_P11_7_IN
IFX_EXTERN IfxGeth_Rxd_In IfxGeth_RXD3A_P11_7_IN
Receive Data 3 MII and RGMII (RGMII can use RXD3A only)
Definition: IfxGeth_PinMap.h:229
IfxGeth_CRSDVB_P11_14_IN
IFX_EXTERN IfxGeth_Crsdv_In IfxGeth_CRSDVB_P11_14_IN
Carrier Sense / Data Valid combi-signal for RMII.
Definition: IfxGeth_PinMap.h:212
IfxGeth_Mdio_InOut
MDIO pin mapping structure.
Definition: IfxGeth_PinMap.h:144
IfxGeth_TXD1_P11_2_OUT
IFX_EXTERN IfxGeth_Txd_Out IfxGeth_TXD1_P11_2_OUT
Transmit Data.
Definition: IfxGeth_PinMap.h:240
IfxGeth_RXD2A_P11_8_IN
IFX_EXTERN IfxGeth_Rxd_In IfxGeth_RXD2A_P11_8_IN
Receive Data 2 MII and RGMII (RGMII can use RXD2A only)
Definition: IfxGeth_PinMap.h:228
IfxGeth_RXCLKA_P11_12_IN
IFX_EXTERN IfxGeth_Rxclk_In IfxGeth_RXCLKA_P11_12_IN
Receive Clock MII.
Definition: IfxGeth_PinMap.h:222
IfxGeth_TXCTL_P11_6_OUT
IFX_EXTERN IfxGeth_Txctl_Out IfxGeth_TXCTL_P11_6_OUT
GETH_TXEN 0: Transmit Control for RGMII.
Definition: IfxGeth_PinMap.h:238
IfxGeth_CRSA_P11_14_IN
IFX_EXTERN IfxGeth_Crs_In IfxGeth_CRSA_P11_14_IN
Carrier Sense MII.
Definition: IfxGeth_PinMap.h:209
IfxGeth_Txer_Out
TXER pin mapping structure.
Definition: IfxGeth_PinMap.h:177
IFXGETH_PINMAP_TXCLK_IN_NUM_ITEMS
#define IFXGETH_PINMAP_TXCLK_IN_NUM_ITEMS
Definition: IfxGeth_PinMap.h:261
IFXGETH_PINMAP_COL_IN_NUM_ITEMS
#define IFXGETH_PINMAP_COL_IN_NUM_ITEMS
Definition: IfxGeth_PinMap.h:248
IfxGeth_COL_P11_15_IN
IFX_EXTERN IfxGeth_Col_In IfxGeth_COL_P11_15_IN
Collision MII.
Definition: IfxGeth_PinMap.h:208
IfxGeth_Refclk_In_pinTable
IFX_EXTERN const IfxGeth_Refclk_In * IfxGeth_Refclk_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_REFCLK_IN_NUM_ITEMS]
IfxGeth_Refclk_In table.
Definition: IfxGeth_PinMap.h:291
IFXGETH_PINMAP_RXER_IN_NUM_ITEMS
#define IFXGETH_PINMAP_RXER_IN_NUM_ITEMS
Definition: IfxGeth_PinMap.h:260
IfxGeth_Txctl_Out_pinTable
IFX_EXTERN const IfxGeth_Txctl_Out * IfxGeth_Txctl_Out_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXCTL_OUT_NUM_ITEMS]
IfxGeth_Txctl_Out table.
Definition: IfxGeth_PinMap.h:315
IfxGeth_RXCLKB_P11_4_IN
IFX_EXTERN IfxGeth_Rxclk_In IfxGeth_RXCLKB_P11_4_IN
Receive Clock MII.
Definition: IfxGeth_PinMap.h:223
IfxGeth_CRSDVA_P11_11_IN
IFX_EXTERN IfxGeth_Crsdv_In IfxGeth_CRSDVA_P11_11_IN
Carrier Sense / Data Valid combi-signal for RMII.
Definition: IfxGeth_PinMap.h:211
IfxGeth_CRSB_P11_11_IN
IFX_EXTERN IfxGeth_Crs_In IfxGeth_CRSB_P11_11_IN
Carrier Sense MII.
Definition: IfxGeth_PinMap.h:210
IfxGeth_Mdc_Out
MDC pin mapping structure.
Definition: IfxGeth_PinMap.h:136
IFXGETH_PINMAP_NUM_MODULES
#define IFXGETH_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxGeth_PinMap.h:247
IFXGETH_PINMAP_MDC_OUT_NUM_ITEMS
#define IFXGETH_PINMAP_MDC_OUT_NUM_ITEMS
Definition: IfxGeth_PinMap.h:252
IfxGeth_Rxdv_In
RXDV pin mapping structure.
Definition: IfxGeth_PinMap.h:72
IfxGeth_MDIO_P00_0_INOUT
IFX_EXTERN IfxGeth_Mdio_InOut IfxGeth_MDIO_P00_0_INOUT
MDIO Output.
Definition: IfxGeth_PinMap.h:217
IfxGeth_Txclk_In
TXCLK pin mapping structure.
Definition: IfxGeth_PinMap.h:112
IfxGeth_RXERC_P10_0_IN
IFX_EXTERN IfxGeth_Rxer_In IfxGeth_RXERC_P10_0_IN
Receive Error MII.
Definition: IfxGeth_PinMap.h:234
IfxGeth_Crs_In
CRS pin mapping structure.
Definition: IfxGeth_PinMap.h:56
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IFXGETH_PINMAP_REFCLK_IN_NUM_ITEMS
#define IFXGETH_PINMAP_REFCLK_IN_NUM_ITEMS
Definition: IfxGeth_PinMap.h:255
IfxGeth_Crsdv_In
CRSDV pin mapping structure.
Definition: IfxGeth_PinMap.h:64
IfxGeth_Crs_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxGeth_PinMap.h:60
IfxGeth_Grefclk_In_pinTable
IFX_EXTERN const IfxGeth_Grefclk_In * IfxGeth_Grefclk_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_GREFCLK_IN_NUM_ITEMS]
IfxGeth_Grefclk_In table.
Definition: IfxGeth_PinMap.h:279
IFXGETH_PINMAP_RXCLK_IN_NUM_ITEMS
#define IFXGETH_PINMAP_RXCLK_IN_NUM_ITEMS
Definition: IfxGeth_PinMap.h:256
IfxGeth_MDIO_P12_1_INOUT
IFX_EXTERN IfxGeth_Mdio_InOut IfxGeth_MDIO_P12_1_INOUT
MDIO Output.
Definition: IfxGeth_PinMap.h:218
IfxGeth_RXDVA_P11_11_IN
IFX_EXTERN IfxGeth_Rxdv_In IfxGeth_RXDVA_P11_11_IN
Receive Data Valid MII.
Definition: IfxGeth_PinMap.h:230
IfxGeth_TXCLKA_P11_5_IN
IFX_EXTERN IfxGeth_Txclk_In IfxGeth_TXCLKA_P11_5_IN
Transmit Clock Input for MII.
Definition: IfxGeth_PinMap.h:235
IfxGeth_Rxctl_In_pinTable
IFX_EXTERN const IfxGeth_Rxctl_In * IfxGeth_Rxctl_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_RXCTL_IN_NUM_ITEMS]
IfxGeth_Rxctl_In table.
Definition: IfxGeth_PinMap.h:297
IfxGeth_REFCLKA_P11_12_IN
IFX_EXTERN IfxGeth_Refclk_In IfxGeth_REFCLKA_P11_12_IN
Reference Clock input for RMII (50 MHz)
Definition: IfxGeth_PinMap.h:221
IFXGETH_PINMAP_TXCLK_OUT_NUM_ITEMS
#define IFXGETH_PINMAP_TXCLK_OUT_NUM_ITEMS
Definition: IfxGeth_PinMap.h:262
IfxGeth_RXCTLA_P11_11_IN
IFX_EXTERN IfxGeth_Rxctl_In IfxGeth_RXCTLA_P11_11_IN
Receive Control for RGMII.
Definition: IfxGeth_PinMap.h:225
IfxGeth_Txen_Out_pinTable
IFX_EXTERN const IfxGeth_Txen_Out * IfxGeth_Txen_Out_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXEN_OUT_NUM_ITEMS]
IfxGeth_Txen_Out table.
Definition: IfxGeth_PinMap.h:321
IfxGeth_Rxer_In_pinTable
IFX_EXTERN const IfxGeth_Rxer_In * IfxGeth_Rxer_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_RXER_IN_NUM_ITEMS]
IfxGeth_Rxer_In table.
Definition: IfxGeth_PinMap.h:306
IfxGeth_Grefclk_In
GREFCLK pin mapping structure.
Definition: IfxGeth_PinMap.h:88
IfxGeth_MDC_P02_8_OUT
IFX_EXTERN IfxGeth_Mdc_Out IfxGeth_MDC_P02_8_OUT
MDIO clock.
Definition: IfxGeth_PinMap.h:214
IfxGeth_TXEN_P11_6_OUT
IFX_EXTERN IfxGeth_Txen_Out IfxGeth_TXEN_P11_6_OUT
Transmit Enable MII and RMII.
Definition: IfxGeth_PinMap.h:243
IfxGeth_RXERB_P21_7_IN
IFX_EXTERN IfxGeth_Rxer_In IfxGeth_RXERB_P21_7_IN
Receive Error MII.
Definition: IfxGeth_PinMap.h:233
IfxGeth_TXD3_P11_0_OUT
IFX_EXTERN IfxGeth_Txd_Out IfxGeth_TXD3_P11_0_OUT
Transmit Data.
Definition: IfxGeth_PinMap.h:242
IFXGETH_PINMAP_TXEN_OUT_NUM_ITEMS
#define IFXGETH_PINMAP_TXEN_OUT_NUM_ITEMS
Definition: IfxGeth_PinMap.h:265
IfxGeth_Rxctl_In
RXCTL pin mapping structure.
Definition: IfxGeth_PinMap.h:80
IfxGeth_Mdio_InOut_pinTable
IFX_EXTERN const IfxGeth_Mdio_InOut * IfxGeth_Mdio_InOut_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_MDIO_INOUT_NUM_ITEMS]
IfxGeth_Mdio_InOut table.
Definition: IfxGeth_PinMap.h:285
IFXGETH_PINMAP_TXD_OUT_NUM_ITEMS
#define IFXGETH_PINMAP_TXD_OUT_NUM_ITEMS
Definition: IfxGeth_PinMap.h:264
IfxGeth_Txctl_Out
TXCTL pin mapping structure.
Definition: IfxGeth_PinMap.h:185
IfxGeth_Rxer_In
RXER pin mapping structure.
Definition: IfxGeth_PinMap.h:193
IfxGeth_Pps_Out
PPS pin mapping structure.
Definition: IfxGeth_PinMap.h:201
IfxGeth_cfg.h
GETH on-chip implementation data.
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:246
IFXGETH_PINMAP_CRS_IN_NUM_ITEMS
#define IFXGETH_PINMAP_CRS_IN_NUM_ITEMS
Definition: IfxGeth_PinMap.h:249
IFXGETH_PINMAP_MDIO_INOUT_NUM_ITEMS
#define IFXGETH_PINMAP_MDIO_INOUT_NUM_ITEMS
Definition: IfxGeth_PinMap.h:253
IfxGeth_Rxd_In_pinTable
IFX_EXTERN const IfxGeth_Rxd_In * IfxGeth_Rxd_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_RXD_IN_NUM_ITEMS]
IfxGeth_Rxd_In table.
Definition: IfxGeth_PinMap.h:300
IFXGETH_PINMAP_PPS_OUT_NUM_ITEMS
#define IFXGETH_PINMAP_PPS_OUT_NUM_ITEMS
Definition: IfxGeth_PinMap.h:254
Ifx_RxSel
Ifx_RxSel
input multiplexer definition used in PinMaps
Definition: Ifx_Types.h:127
IfxGeth_Rxd_In
RXD pin mapping structure.
Definition: IfxGeth_PinMap.h:120
IfxGeth_Crs_In_pinTable
IFX_EXTERN const IfxGeth_Crs_In * IfxGeth_Crs_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_CRS_IN_NUM_ITEMS]
IfxGeth_Crs_In table.
Definition: IfxGeth_PinMap.h:273
IfxGeth_GREFCLK_P11_5_IN
IFX_EXTERN IfxGeth_Grefclk_In IfxGeth_GREFCLK_P11_5_IN
Gigabit Reference Clock input for RGMII (125 MHz high precission)
Definition: IfxGeth_PinMap.h:213
IfxGeth_RXDVB_P11_14_IN
IFX_EXTERN IfxGeth_Rxdv_In IfxGeth_RXDVB_P11_14_IN
Receive Data Valid MII.
Definition: IfxGeth_PinMap.h:231
IFXGETH_PINMAP_TXER_OUT_NUM_ITEMS
#define IFXGETH_PINMAP_TXER_OUT_NUM_ITEMS
Definition: IfxGeth_PinMap.h:266
IfxGeth_RXD1A_P11_9_IN
IFX_EXTERN IfxGeth_Rxd_In IfxGeth_RXD1A_P11_9_IN
Receive Data 1 MII, RMII and RGMII (RGMII can use RXD1A only)
Definition: IfxGeth_PinMap.h:227
IfxGeth_PPS_P14_4_OUT
IFX_EXTERN IfxGeth_Pps_Out IfxGeth_PPS_P14_4_OUT
Pulse Per Second.
Definition: IfxGeth_PinMap.h:220
IfxGeth_MDC_P12_0_OUT
IFX_EXTERN IfxGeth_Mdc_Out IfxGeth_MDC_P12_0_OUT
MDIO clock.
Definition: IfxGeth_PinMap.h:215
IfxGeth_TXER_P11_4_OUT
IFX_EXTERN IfxGeth_Txer_Out IfxGeth_TXER_P11_4_OUT
Transmit Error MII.
Definition: IfxGeth_PinMap.h:244
IfxGeth_Crs_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxGeth_PinMap.h:59
IfxGeth_RXERA_P11_13_IN
IFX_EXTERN IfxGeth_Rxer_In IfxGeth_RXERA_P11_13_IN
Receive Error MII.
Definition: IfxGeth_PinMap.h:232
IfxGeth_Mdio_InOut::outSelect
IfxPort_OutputIdx outSelect
Port control code.
Definition: IfxGeth_PinMap.h:149
IfxGeth_Mdc_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxGeth_PinMap.h:140
IfxGeth_Txclk_In_pinTable
IFX_EXTERN const IfxGeth_Txclk_In * IfxGeth_Txclk_In_pinTable[IFXGETH_PINMAP_NUM_MODULES][IFXGETH_PINMAP_TXCLK_IN_NUM_ITEMS]
IfxGeth_Txclk_In table.
Definition: IfxGeth_PinMap.h:309
IfxGeth_MDC_P21_2_OUT
IFX_EXTERN IfxGeth_Mdc_Out IfxGeth_MDC_P21_2_OUT
MDIO clock.
Definition: IfxGeth_PinMap.h:216
IFXGETH_PINMAP_RXDV_IN_NUM_ITEMS
#define IFXGETH_PINMAP_RXDV_IN_NUM_ITEMS
Definition: IfxGeth_PinMap.h:259
IfxPort.h
PORT basic functionality.
IfxGeth_RXCLKC_P12_0_IN
IFX_EXTERN IfxGeth_Rxclk_In IfxGeth_RXCLKC_P12_0_IN
Receive Clock MII.
Definition: IfxGeth_PinMap.h:224


iLLD_TC38A: IfxGeth_cfg.c Source File

  • _Impl
IfxGeth_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxGeth_cfg.c
3 * \brief GETH on-chip implementation data
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 *
41 */
42
43 /******************************************************************************/
44 /*----------------------------------Includes----------------------------------*/
45 /******************************************************************************/
46
47 #include "IfxGeth_cfg.h"
48
49 /******************************************************************************/
50 /*-----------------------Exported Variables/Constants-------------------------*/
51 /******************************************************************************/
52
53 IFX_CONST IfxModule_IndexMap IfxGeth_cfg_indexMap[IFXGETH_NUM_MODULES] = {
54 {&MODULE_GETH, (uint32)IfxGeth_Index_0},
55 };
IFXGETH_NUM_MODULES
#define IFXGETH_NUM_MODULES
Number of Geth instances.
Definition: IfxGeth_cfg.h:78
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxGeth_Index_0
GETH index 0.
Definition: IfxGeth_cfg.h:107
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxGeth_cfg.h
GETH on-chip implementation data.
IfxGeth_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxGeth_cfg_indexMap[IFXGETH_NUM_MODULES]
Definition: IfxGeth_cfg.c:53
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:140


iLLD_TC38A: IfxGeth_cfg.h Source File

  • _Impl
IfxGeth_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxGeth_cfg.h
3 * \brief GETH on-chip implementation data
4 * \ingroup IfxLld_Geth
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 * Implementation layer
43 *
44 * \defgroup IfxLld_Geth GETH
45 * \ingroup IfxLld
46 * \defgroup IfxLld_Geth_Impl Implementation
47 * \ingroup IfxLld_Geth
48 * \defgroup IfxLld_Geth_Std Standard Driver
49 * \ingroup IfxLld_Geth
50 * \defgroup IfxLld_Geth_Impl_Enum Enumerations
51 * \ingroup IfxLld_Geth_Impl
52 */
53
54 #ifndef IFXGETH_CFG_H
55 #define IFXGETH_CFG_H 1
56
57 /******************************************************************************/
58 /*----------------------------------Includes----------------------------------*/
59 /******************************************************************************/
60
61 #include "Cpu/Std/Ifx_Types.h"
62 #include "IfxGeth_reg.h"
63
64 /******************************************************************************/
65 /*-----------------------------------Macros-----------------------------------*/
66 /******************************************************************************/
67
68 /** \brief Number of Tx queues in MTL block
69 */
70 #define IFXGETH_NUM_TX_QUEUES (4)
71
72 /** \brief Number of Rx queues in MTL block
73 */
74 #define IFXGETH_NUM_RX_QUEUES (4)
75
76 /** \brief Number of Geth instances
77 */
78 #define IFXGETH_NUM_MODULES (1)
79
80 /** \brief Number of Tx DMA channels of DMA
81 */
82 #define IFXGETH_NUM_TX_CHANNELS (4)
83
84 /** \brief Number of Rx Channels of DMA
85 */
86 #define IFXGETH_NUM_RX_CHANNELS (4)
87
88 /** \brief Maximum timeout value to wait against at
89 */
90 #define IFXGETH_MAX_TIMEOUT_VALUE (1000)
91
92 /** \brief Number of DMA channels
93 */
94 #define IFXGETH_NUM_DMA_CHANNELS (4)
95
96 /******************************************************************************/
97 /*--------------------------------Enumerations--------------------------------*/
98 /******************************************************************************/
99
100 /** \addtogroup IfxLld_Geth_Impl_Enum
101 * \{ */
102 /** \brief List of the available Geth instances
103 */
104 typedef enum
105 {
106 IfxGeth_Index_none = -1, /**< \brief Not Selected */
107 IfxGeth_Index_0 = 0, /**< \brief GETH index 0 */
108 } IfxGeth_Index;
109
110 /** \} */
111
112 /******************************************************************************/
113 /*-------------------Global Exported Variables/Constants----------------------*/
114 /******************************************************************************/
115
116 IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxGeth_cfg_indexMap[IFXGETH_NUM_MODULES];
117
118 #endif /* IFXGETH_CFG_H */
IFXGETH_NUM_MODULES
#define IFXGETH_NUM_MODULES
Number of Geth instances.
Definition: IfxGeth_cfg.h:78
IfxGeth_Index
IfxGeth_Index
List of the available Geth instances.
Definition: IfxGeth_cfg.h:104
IfxGeth_Index_none
Not Selected.
Definition: IfxGeth_cfg.h:106
IfxGeth_Index_0
GETH index 0.
Definition: IfxGeth_cfg.h:107
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxGeth_cfg_indexMap
IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxGeth_cfg_indexMap[IFXGETH_NUM_MODULES]
Definition: IfxGeth_cfg.h:116
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:140


iLLD_TC38A: IfxGlobal_cfg.h Source File

  • _Impl
IfxGlobal_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxGlobal_cfg.h
3 * \brief Global definitions
4 * \ingroup IfxLld_Global
5 *
6 *
7 * \version iLLD_1_0_1_12_0
8 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 * \defgroup IfxLld_Global Global Definitions
43 * \ingroup IfxLld
44 *
45 */
46
47 #ifndef IFXGLOBAL_H
48 #define IFXGLOBAL_H 1
49
50 /******************************************************************************/
51 /*-----------------------------------Macros-----------------------------------*/
52 /******************************************************************************/
53 /** \brief Microcontroller derivative corresponding to the iLLD implementation
54 */
55 #define IFXGLOBAL_DERIVATIVE_TC38x (1)
56
57 /** \brief Microcontroller derivative name
58 */
59 #define IFXGLOBAL_DERIVATIVE_NAME "TC38x"
60
61 #endif /* IFXGLOBAL_H */


iLLD_TC38A: IfxGpt12.c Source File

  • Gpt12
  • Std
IfxGpt12.c
Go to the documentation of this file.
1 /**
2 * \file IfxGpt12.c
3 * \brief GPT12 basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxGpt12.h"
47
48 /******************************************************************************/
49 /*-------------------------Function Implementations---------------------------*/
50 /******************************************************************************/
51
52 float32 IfxGpt12_T2_getFrequency(Ifx_GPT12 *gpt12)
53 {
54 float32 freq = IfxGpt12_getModuleFrequency(gpt12);
55
56 IfxGpt12_Mode mode;
57 IfxGpt12_TimerInputPrescaler prescaler;
58
59 IfxGpt12_Gpt1BlockPrescaler bps1 = (IfxGpt12_Gpt1BlockPrescaler)gpt12->T3CON.B.BPS1;
60
61 switch (bps1)
62 {
63 case IfxGpt12_Gpt1BlockPrescaler_4:
64 freq = freq / 4;
65 break;
66 case IfxGpt12_Gpt1BlockPrescaler_8:
67 freq = freq / 8;
68 break;
69 case IfxGpt12_Gpt1BlockPrescaler_16:
70 freq = freq / 16;
71 break;
72 default: /* case IfxGpt12_Gpt1BlockPrescaler_32: */
73 freq = freq / 32;
74 break;
75 }
76
77 mode = IfxGpt12_T2_getMode(gpt12);
78 prescaler = (IfxGpt12_TimerInputPrescaler)gpt12->T2CON.B.T2I;
79
80 if ((mode == IfxGpt12_Mode_timer) || (mode == IfxGpt12_Mode_highGatedTimer) || (mode == IfxGpt12_Mode_lowGatedTimer))
81 {
82 freq = freq / (1 << prescaler);
83 }
84 else
85 {
86 freq = freq / 2;
87 }
88
89 return freq;
90 }
91
92
93 float32 IfxGpt12_T3_getFrequency(Ifx_GPT12 *gpt12)
94 {
95 float32 freq = IfxGpt12_getModuleFrequency(gpt12);
96
97 IfxGpt12_Mode mode;
98 IfxGpt12_TimerInputPrescaler prescaler;
99
100 IfxGpt12_Gpt1BlockPrescaler bps1 = (IfxGpt12_Gpt1BlockPrescaler)gpt12->T3CON.B.BPS1;
101
102 switch (bps1)
103 {
104 case IfxGpt12_Gpt1BlockPrescaler_4:
105 freq = freq / 4;
106 break;
107 case IfxGpt12_Gpt1BlockPrescaler_8:
108 freq = freq / 8;
109 break;
110 case IfxGpt12_Gpt1BlockPrescaler_16:
111 freq = freq / 16;
112 break;
113 default: /* case IfxGpt12_Gpt1BlockPrescaler_32: */
114 freq = freq / 32;
115 break;
116 }
117
118 mode = (IfxGpt12_Mode)gpt12->T3CON.B.T3M;
119 prescaler = (IfxGpt12_TimerInputPrescaler)gpt12->T3CON.B.T3I;
120
121 if ((mode == IfxGpt12_Mode_timer) || (mode == IfxGpt12_Mode_highGatedTimer) || (mode == IfxGpt12_Mode_lowGatedTimer))
122 {
123 freq = freq / (1 << prescaler);
124 }
125 else
126 {
127 freq = freq / 2;
128 }
129
130 return freq;
131 }
132
133
134 float32 IfxGpt12_T4_getFrequency(Ifx_GPT12 *gpt12)
135 {
136 float32 freq = IfxGpt12_getModuleFrequency(gpt12);
137
138 IfxGpt12_Mode mode;
139 IfxGpt12_TimerInputPrescaler prescaler;
140
141 IfxGpt12_Gpt1BlockPrescaler bps1 = (IfxGpt12_Gpt1BlockPrescaler)gpt12->T3CON.B.BPS1;
142
143 switch (bps1)
144 {
145 case IfxGpt12_Gpt1BlockPrescaler_4:
146 freq = freq / 4;
147 break;
148 case IfxGpt12_Gpt1BlockPrescaler_8:
149 freq = freq / 8;
150 break;
151 case IfxGpt12_Gpt1BlockPrescaler_16:
152 freq = freq / 16;
153 break;
154 default: /* case IfxGpt12_Gpt1BlockPrescaler_32: */
155 freq = freq / 32;
156 break;
157 }
158
159 mode = (IfxGpt12_Mode)gpt12->T4CON.B.T4M;
160 prescaler = (IfxGpt12_TimerInputPrescaler)gpt12->T4CON.B.T4I;
161
162 if ((mode == IfxGpt12_Mode_timer) || (mode == IfxGpt12_Mode_highGatedTimer) || (mode == IfxGpt12_Mode_lowGatedTimer))
163 {
164 freq = freq / (1 << prescaler);
165 }
166 else
167 {
168 freq = freq / 2;
169 }
170
171 return freq;
172 }
173
174
175 float32 IfxGpt12_T5_getFrequency(Ifx_GPT12 *gpt12)
176 {
177 float32 freq = IfxGpt12_getModuleFrequency(gpt12);
178
179 IfxGpt12_Mode mode;
180 IfxGpt12_TimerInputPrescaler prescaler;
181
182 IfxGpt12_Gpt2BlockPrescaler bps2 = (IfxGpt12_Gpt2BlockPrescaler)gpt12->T6CON.B.BPS2;
183
184 switch (bps2)
185 {
186 case IfxGpt12_Gpt2BlockPrescaler_2:
187 freq = freq / 2;
188 break;
189 case IfxGpt12_Gpt2BlockPrescaler_4:
190 freq = freq / 4;
191 break;
192 case IfxGpt12_Gpt2BlockPrescaler_8:
193 freq = freq / 8;
194 break;
195 default: /* case IfxGpt12_Gpt2BlockPrescaler_16: */
196 freq = freq / 16;
197 break;
198 }
199
200 mode = (IfxGpt12_Mode)gpt12->T5CON.B.T5M;
201 prescaler = (IfxGpt12_TimerInputPrescaler)gpt12->T5CON.B.T5I;
202
203 if ((mode == IfxGpt12_Mode_timer) || (mode == IfxGpt12_Mode_highGatedTimer) || (mode == IfxGpt12_Mode_lowGatedTimer))
204 {
205 freq = freq / (1 << prescaler);
206 }
207 else
208 {
209 freq = freq / 2;
210 }
211
212 return freq;
213 }
214
215
216 float32 IfxGpt12_T6_getFrequency(Ifx_GPT12 *gpt12)
217 {
218 float32 freq = IfxGpt12_getModuleFrequency(gpt12);
219
220 IfxGpt12_Mode mode;
221 IfxGpt12_TimerInputPrescaler prescaler;
222
223 IfxGpt12_Gpt2BlockPrescaler bps2 = (IfxGpt12_Gpt2BlockPrescaler)gpt12->T6CON.B.BPS2;
224
225 switch (bps2)
226 {
227 case IfxGpt12_Gpt2BlockPrescaler_2:
228 freq = freq / 2;
229 break;
230 case IfxGpt12_Gpt2BlockPrescaler_4:
231 freq = freq / 4;
232 break;
233 case IfxGpt12_Gpt2BlockPrescaler_8:
234 freq = freq / 8;
235 break;
236 default: /* case IfxGpt12_Gpt2BlockPrescaler_16: */
237 freq = freq / 16;
238 break;
239 }
240
241 mode = (IfxGpt12_Mode)gpt12->T6CON.B.T6M;
242 prescaler = (IfxGpt12_TimerInputPrescaler)gpt12->T6CON.B.T6I;
243
244 if ((mode == IfxGpt12_Mode_timer) || (mode == IfxGpt12_Mode_highGatedTimer) || (mode == IfxGpt12_Mode_lowGatedTimer))
245 {
246 freq = freq / (1 << prescaler);
247 }
248 else
249 {
250 freq = freq / 2;
251 }
252
253 return freq;
254 }
255
256
257 void IfxGpt12_disableModule(Ifx_GPT12 *gpt12)
258 {
259 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
260 IfxScuWdt_clearCpuEndinit(psw);
261 gpt12->CLC.B.DISR = 1;
262 IfxScuWdt_setCpuEndinit(psw);
263 }
264
265
266 void IfxGpt12_enableModule(Ifx_GPT12 *gpt12)
267 {
268 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
269 IfxScuWdt_clearCpuEndinit(psw);
270 gpt12->CLC.B.DISR = 0;
271 IfxScuWdt_setCpuEndinit(psw);
272 }
273
274
275 void IfxGpt12_initTxEudInPin(const IfxGpt12_TxEud_In *txEudIn, IfxPort_InputMode inputMode)
276 {
277 IfxPort_setPinModeInput(txEudIn->pin.port, txEudIn->pin.pinIndex, inputMode);
278
279 switch (txEudIn->timer)
280 {
281 case 2:
282 IfxGpt12_T2_setEudInput(txEudIn->module, (IfxGpt12_EudInput)txEudIn->select);
283 break;
284 case 3:
285 IfxGpt12_T3_setEudInput(txEudIn->module, (IfxGpt12_EudInput)txEudIn->select);
286 break;
287 case 4:
288 IfxGpt12_T4_setEudInput(txEudIn->module, (IfxGpt12_EudInput)txEudIn->select);
289 break;
290 case 5:
291 IfxGpt12_T5_setEudInput(txEudIn->module, (IfxGpt12_EudInput)txEudIn->select);
292 break;
293 case 6:
294 IfxGpt12_T6_setEudInput(txEudIn->module, (IfxGpt12_EudInput)txEudIn->select);
295 break;
296 default:
297 break;
298 }
299 }
300
301
302 void IfxGpt12_initTxEudInPinWithPadLevel(const IfxGpt12_TxEud_In *txEudIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
303 {
304 IfxPort_setPinModeInput(txEudIn->pin.port, txEudIn->pin.pinIndex, inputMode);
305 IfxPort_setPinPadDriver(txEudIn->pin.port, txEudIn->pin.pinIndex, padDriver);
306
307 switch (txEudIn->timer)
308 {
309 case 2:
310 IfxGpt12_T2_setEudInput(txEudIn->module, (IfxGpt12_EudInput)txEudIn->select);
311 break;
312 case 3:
313 IfxGpt12_T3_setEudInput(txEudIn->module, (IfxGpt12_EudInput)txEudIn->select);
314 break;
315 case 4:
316 IfxGpt12_T4_setEudInput(txEudIn->module, (IfxGpt12_EudInput)txEudIn->select);
317 break;
318 case 5:
319 IfxGpt12_T5_setEudInput(txEudIn->module, (IfxGpt12_EudInput)txEudIn->select);
320 break;
321 case 6:
322 IfxGpt12_T6_setEudInput(txEudIn->module, (IfxGpt12_EudInput)txEudIn->select);
323 break;
324 default:
325 break;
326 }
327 }
328
329
330 void IfxGpt12_initTxInPin(const IfxGpt12_TxIn_In *txIn, IfxPort_InputMode inputMode)
331 {
332 IfxPort_setPinModeInput(txIn->pin.port, txIn->pin.pinIndex, inputMode);
333
334 switch (txIn->timer)
335 {
336 case 2:
337 IfxGpt12_T2_setInput(txIn->module, (IfxGpt12_Input)txIn->select);
338 break;
339 case 3:
340 IfxGpt12_T3_setInput(txIn->module, (IfxGpt12_Input)txIn->select);
341 break;
342 case 4:
343 IfxGpt12_T4_setInput(txIn->module, (IfxGpt12_Input)txIn->select);
344 break;
345 case 5:
346 IfxGpt12_T5_setInput(txIn->module, (IfxGpt12_Input)txIn->select);
347 break;
348 case 6:
349 IfxGpt12_T6_setInput(txIn->module, (IfxGpt12_Input)txIn->select);
350 break;
351 default:
352 break;
353 }
354 }
355
356
357 void IfxGpt12_initTxInPinWithPadLevel(const IfxGpt12_TxIn_In *txIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
358 {
359 IfxPort_setPinModeInput(txIn->pin.port, txIn->pin.pinIndex, inputMode);
360 IfxPort_setPinPadDriver(txIn->pin.port, txIn->pin.pinIndex, padDriver);
361
362 switch (txIn->timer)
363 {
364 case 2:
365 IfxGpt12_T2_setInput(txIn->module, (IfxGpt12_Input)txIn->select);
366 break;
367 case 3:
368 IfxGpt12_T3_setInput(txIn->module, (IfxGpt12_Input)txIn->select);
369 break;
370 case 4:
371 IfxGpt12_T4_setInput(txIn->module, (IfxGpt12_Input)txIn->select);
372 break;
373 case 5:
374 IfxGpt12_T5_setInput(txIn->module, (IfxGpt12_Input)txIn->select);
375 break;
376 case 6:
377 IfxGpt12_T6_setInput(txIn->module, (IfxGpt12_Input)txIn->select);
378 break;
379 default:
380 break;
381 }
382 }
383
384
385 void IfxGpt12_resetModule(Ifx_GPT12 *gpt12)
386 {
387 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
388
389 IfxScuWdt_clearCpuEndinit(passwd);
390 gpt12->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
391 gpt12->KRST1.B.RST = 1;
392 IfxScuWdt_setCpuEndinit(passwd);
393
394 while (0 == gpt12->KRST0.B.RSTSTAT) /* Wait until reset is executed */
395
396 {}
397
398 IfxScuWdt_clearCpuEndinit(passwd);
399 gpt12->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
400 IfxScuWdt_setCpuEndinit(passwd);
401 }
IfxGpt12_Mode_highGatedTimer
High Gated Timer Mode selected.
Definition: IfxGpt12.h:191
IfxGpt12_T4_setInput
IFX_INLINE void IfxGpt12_T4_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T4 timer.
Definition: IfxGpt12.h:1327
IfxGpt12_Gpt2BlockPrescaler_4
fGPT/4
Definition: IfxGpt12.h:155
IfxGpt12_T2_setInput
IFX_INLINE void IfxGpt12_T2_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T2 timer.
Definition: IfxGpt12.h:1124
IfxGpt12_TxEud_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxGpt12_PinMap.h:69
IfxGpt12_initTxEudInPin
void IfxGpt12_initTxEudInPin(const IfxGpt12_TxEud_In *txEudIn, IfxPort_InputMode inputMode)
Initializes a TxEUDIn_IN input.
Definition: IfxGpt12.c:275
IfxGpt12_Gpt1BlockPrescaler_4
fGPT/4
Definition: IfxGpt12.h:145
IfxGpt12_T4_setEudInput
IFX_INLINE void IfxGpt12_T4_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T4 timer.
Definition: IfxGpt12.h:1315
IfxGpt12_Input
IfxGpt12_Input
Input Select for TxIN Definition in IfxGPT12.PISEL.B.ISTxIN (x = 2 to 4)
Definition: IfxGpt12.h:175
IfxGpt12_EudInput
IfxGpt12_EudInput
Input Select for TxEUD Definition in IfxGPT12.PISEL.B.ISTxEUD (x = 2 to 4)
Definition: IfxGpt12.h:131
IfxGpt12_TimerInputPrescaler
IfxGpt12_TimerInputPrescaler
Input prescaler Selection for the timer Definition in IfxGPT12.TxCON.B.TxI (x = 2 to 4) ...
Definition: IfxGpt12.h:251
IfxGpt12_Mode_lowGatedTimer
Low Gated Timer Mode selected.
Definition: IfxGpt12.h:190
IfxGpt12_TxEud_In
TxEUD pin mapping structure.
Definition: IfxGpt12_PinMap.h:64
IfxGpt12_T6_getFrequency
float32 IfxGpt12_T6_getFrequency(Ifx_GPT12 *gpt12)
Returns the frequency of the T6 timer.
Definition: IfxGpt12.c:216
IfxGpt12_resetModule
void IfxGpt12_resetModule(Ifx_GPT12 *gpt12)
resets GPT12 kernel
Definition: IfxGpt12.c:385
IfxGpt12_T2_getFrequency
float32 IfxGpt12_T2_getFrequency(Ifx_GPT12 *gpt12)
Returns the frequency of the T2 timer.
Definition: IfxGpt12.c:52
float32
float float32
Definition: Platform_Types.h:170
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:322
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxPort_setPinModeInput
IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode.
Definition: IfxPort.h:669
IfxGpt12_Gpt2BlockPrescaler
IfxGpt12_Gpt2BlockPrescaler
Gpt2 block prescaler Selection Definition in IfxGPT12.T6CON.B.BPS2.
Definition: IfxGpt12.h:153
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxGpt12_disableModule
void IfxGpt12_disableModule(Ifx_GPT12 *gpt12)
Disables the module.
Definition: IfxGpt12.c:257
IfxGpt12_getModuleFrequency
IFX_INLINE float32 IfxGpt12_getModuleFrequency(Ifx_GPT12 *gpt12)
Returns the gpt12 module frequency.
Definition: IfxGpt12.h:1577
IfxGpt12_Gpt1BlockPrescaler_8
fGPT/8
Definition: IfxGpt12.h:144
IfxGpt12_TxEud_In::timer
uint8 timer
Timer number.
Definition: IfxGpt12_PinMap.h:67
IfxGpt12.h
GPT12 basic functionality.
IfxGpt12_Gpt2BlockPrescaler_2
fGPT/2
Definition: IfxGpt12.h:156
IfxGpt12_Gpt2BlockPrescaler_8
fGPT/8
Definition: IfxGpt12.h:158
IfxGpt12_Mode
IfxGpt12_Mode
Timer operating mode Definition in IfxGPT12.TxCON.B.TxM (x = 2 to 4)
Definition: IfxGpt12.h:186
IfxGpt12_T6_setInput
IFX_INLINE void IfxGpt12_T6_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T6 timer.
Definition: IfxGpt12.h:1532
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:249
IfxGpt12_Gpt1BlockPrescaler
IfxGpt12_Gpt1BlockPrescaler
GPT1 block prescaler Selection Definition in IfxGPT12.T3CON.B.BPS1.
Definition: IfxGpt12.h:142
IfxGpt12_TxIn_In
TxIN pin mapping structure.
Definition: IfxGpt12_PinMap.h:73
IfxGpt12_T2_setEudInput
IFX_INLINE void IfxGpt12_T2_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T2 timer.
Definition: IfxGpt12.h:1111
IfxGpt12_T3_setEudInput
IFX_INLINE void IfxGpt12_T3_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T3 timer.
Definition: IfxGpt12.h:1217
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:151
IfxGpt12_initTxInPin
void IfxGpt12_initTxInPin(const IfxGpt12_TxIn_In *txIn, IfxPort_InputMode inputMode)
Initializes a TxIn input.
Definition: IfxGpt12.c:330
IfxGpt12_Gpt1BlockPrescaler_16
fGPT/16
Definition: IfxGpt12.h:147
IfxGpt12_initTxInPinWithPadLevel
void IfxGpt12_initTxInPinWithPadLevel(const IfxGpt12_TxIn_In *txIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of TXIN pin direction as input and configuring pad driver...
Definition: IfxGpt12.c:357
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxGpt12_enableModule
void IfxGpt12_enableModule(Ifx_GPT12 *gpt12)
Enables the module.
Definition: IfxGpt12.c:266
IfxGpt12_T4_getFrequency
float32 IfxGpt12_T4_getFrequency(Ifx_GPT12 *gpt12)
Returns the frequency of the T4 timer.
Definition: IfxGpt12.c:134
IfxGpt12_T6_setEudInput
IFX_INLINE void IfxGpt12_T6_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T6 timer.
Definition: IfxGpt12.h:1525
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:81
IfxGpt12_initTxEudInPinWithPadLevel
void IfxGpt12_initTxEudInPinWithPadLevel(const IfxGpt12_TxEud_In *txEudIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of TXEUD pin direction as input and configuring pad driver...
Definition: IfxGpt12.c:302
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:248
IfxGpt12_TxEud_In::module
Ifx_GPT12 * module
Base address.
Definition: IfxGpt12_PinMap.h:66
IfxGpt12_T3_setInput
IFX_INLINE void IfxGpt12_T3_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T3 timer.
Definition: IfxGpt12.h:1229
IfxGpt12_T5_setEudInput
IFX_INLINE void IfxGpt12_T5_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T5 timer.
Definition: IfxGpt12.h:1436
IfxGpt12_Mode_timer
Timer Mode selected.
Definition: IfxGpt12.h:188
IfxGpt12_T2_getMode
IFX_INLINE IfxGpt12_Mode IfxGpt12_T2_getMode(Ifx_GPT12 *gpt12)
Returns the operating mode of the T2 timer.
Definition: IfxGpt12.h:1068
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxGpt12_TxEud_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxGpt12_PinMap.h:68
IfxGpt12_T5_setInput
IFX_INLINE void IfxGpt12_T5_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T5 timer.
Definition: IfxGpt12.h:1443
IfxGpt12_T3_getFrequency
float32 IfxGpt12_T3_getFrequency(Ifx_GPT12 *gpt12)
Returns the frequency of the T3 timer.
Definition: IfxGpt12.c:93
IfxGpt12_T5_getFrequency
float32 IfxGpt12_T5_getFrequency(Ifx_GPT12 *gpt12)
Returns the frequency of the T5 timer.
Definition: IfxGpt12.c:175


iLLD_TC38A: IfxGpt12.h Source File

  • Gpt12
  • Std
IfxGpt12.h
Go to the documentation of this file.
1 /**
2 * \file IfxGpt12.h
3 * \brief GPT12 basic functionality
4 * \ingroup IfxLld_Gpt12
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Gpt12_Std_Enumerations Enumerations
42 * \ingroup IfxLld_Gpt12_Std
43 * \defgroup IfxLld_Gpt12_Std_InterruptFunctions Interrupt Functions
44 * \ingroup IfxLld_Gpt12_Std
45 * \defgroup IfxLld_Gpt12_Std_ConfigurationFunctions Configuration Functions
46 * \ingroup IfxLld_Gpt12_Std
47 * \defgroup IfxLld_Gpt12_Std_UtilityFunctions Utility Functions
48 * \ingroup IfxLld_Gpt12_Std
49 * \defgroup IfxLld_Gpt12_Std_OperativeFunctions Operative Functions
50 * \ingroup IfxLld_Gpt12_Std
51 */
52
53 #ifndef IFXGPT12_H
54 #define IFXGPT12_H 1
55
56 /******************************************************************************/
57 /*----------------------------------Includes----------------------------------*/
58 /******************************************************************************/
59
60 #include "_Impl/IfxGpt12_cfg.h"
61 #include "Src/Std/IfxSrc.h"
62 #include "_Utilities/Ifx_Assert.h"
63 #include "Scu/Std/IfxScuCcu.h"
64 #include "IfxGpt12_reg.h"
65 #include "_PinMap/IfxGpt12_PinMap.h"
66
67 /******************************************************************************/
68 /*--------------------------------Enumerations--------------------------------*/
69 /******************************************************************************/
70
71 /** \addtogroup IfxLld_Gpt12_Std_Enumerations
72 * \{ */
73 /** \brief Input Select for CAPIN \n
74 * Definition in IfxGPT12.PISEL.B.ISCAPIN
75 */
76 typedef enum
77 {
78 IfxGpt12_CaptureInput_A = 0, /**< \brief signal CAPINA selected */
79 IfxGpt12_CaptureInput_B = 1, /**< \brief signal CAPINB selected */
80 IfxGpt12_CaptureInput_C = 2, /**< \brief signal CAPINC selected */
81 IfxGpt12_CaptureInput_D = 3 /**< \brief signal CAPIND selected */
82 } IfxGpt12_CaptureInput;
83
84 /** \brief Tx Input Edge Selection (Capture Mode, x=2,4)
85 */
86 typedef enum
87 {
88 IfxGpt12_CaptureInputMode_none = 0, /**< \brief None, Counter is disabled */
89 IfxGpt12_CaptureInputMode_risingEdgeTxIN = 1, /**< \brief rising edge on TxIN */
90 IfxGpt12_CaptureInputMode_fallingEdgeTxIN = 2, /**< \brief falling edge on TxIN */
91 IfxGpt12_CaptureInputMode_bothEdgesTxIN = 3 /**< \brief (rising or falling edge) on TxIN */
92 } IfxGpt12_CaptureInputMode;
93
94 /** \brief Capture Trigger Enable \n
95 * Definition in IfxGPT12.T5CON.B.CT3
96 */
97 typedef enum
98 {
99 IfxGpt12_CaptureTrigger_capin = 0, /**< \brief Capture Trigger Enable from CAPIN */
100 IfxGpt12_CaptureTrigger_t3inOrT3EUD = 1 /**< \brief Capture Trigger Enable from T3IN/T3EUD */
101 } IfxGpt12_CaptureTrigger;
102
103 /** \brief Capture Trigger Selection \n
104 * Definition in IfxGPT12.T5CON.B.CI
105 */
106 typedef enum
107 {
108 IfxGpt12_CaptureTriggerMode_disabled = 0, /**< \brief capture disabled */
109 IfxGpt12_CaptureTriggerMode_risingEdge = 1, /**< \brief positive Transition on CAPIN or any Transition on T3IN */
110 IfxGpt12_CaptureTriggerMode_fallingEdge = 2, /**< \brief negative Transition on CAPIN or any Transition on T3EUD */
111 IfxGpt12_CaptureTriggerMode_randomEdge = 3 /**< \brief Any Transition on CAPIN or any Transition on T3IN/T3EUD */
112 } IfxGpt12_CaptureTriggerMode;
113
114 /** \brief Input Edge Selection for counter mode\n
115 * Definition in IfxGPT12.TxCON.B.TxI (x = 2 to 6)
116 */
117 typedef enum
118 {
119 IfxGpt12_CounterInputMode_counterDisabled = 0, /**< \brief Counter Tx is disabled */
120 IfxGpt12_CounterInputMode_risingEdgeTxIN = 1, /**< \brief rising edge on TxIN */
121 IfxGpt12_CounterInputMode_fallingEdgeTxIN = 2, /**< \brief falling edge on TxIN */
122 IfxGpt12_CounterInputMode_bothEdgesTxIN = 3, /**< \brief rising or falling edge on TxIN */
123 IfxGpt12_CounterInputMode_risingEdgeTxOTL = 5, /**< \brief rising edge of TxOTL (x=3,6) */
124 IfxGpt12_CounterInputMode_fallingEdgeTxOTL = 6, /**< \brief falling edge of TxOTL */
125 IfxGpt12_CounterInputMode_bothEdgesTxOTL = 7 /**< \brief rising or falling edge of TxOTL */
126 } IfxGpt12_CounterInputMode;
127
128 /** \brief Input Select for TxEUD \n
129 * Definition in IfxGPT12.PISEL.B.ISTxEUD (x = 2 to 4)
130 */
131 typedef enum
132 {
133 IfxGpt12_EudInput_A = 0, /**< \brief signal TXEUDA selected */
134 IfxGpt12_EudInput_B = 1, /**< \brief signal TXEUDB selected */
135 IfxGpt12_EudInput_C = 2, /**< \brief signal TXEUDC selected */
136 IfxGpt12_EudInput_D = 3 /**< \brief signal TXEUDD selected */
137 } IfxGpt12_EudInput;
138
139 /** \brief GPT1 block prescaler Selection\n
140 * Definition in IfxGPT12.T3CON.B.BPS1
141 */
142 typedef enum
143 {
144 IfxGpt12_Gpt1BlockPrescaler_8 = 0, /**< \brief fGPT/8 */
145 IfxGpt12_Gpt1BlockPrescaler_4 = 1, /**< \brief fGPT/4 */
146 IfxGpt12_Gpt1BlockPrescaler_32 = 2, /**< \brief fGPT/32 */
147 IfxGpt12_Gpt1BlockPrescaler_16 = 3 /**< \brief fGPT/16 */
148 } IfxGpt12_Gpt1BlockPrescaler;
149
150 /** \brief Gpt2 block prescaler Selection\n
151 * Definition in IfxGPT12.T6CON.B.BPS2
152 */
153 typedef enum
154 {
155 IfxGpt12_Gpt2BlockPrescaler_4 = 0, /**< \brief fGPT/4 */
156 IfxGpt12_Gpt2BlockPrescaler_2 = 1, /**< \brief fGPT/2 */
157 IfxGpt12_Gpt2BlockPrescaler_16 = 2, /**< \brief fGPT/16 */
158 IfxGpt12_Gpt2BlockPrescaler_8 = 3 /**< \brief fGPT/8 */
159 } IfxGpt12_Gpt2BlockPrescaler;
160
161 /** \brief Input Edge Selection for Incremental Interface mode\n
162 * Definition in IfxGPT12.TxCON.B.TxI (x=2, 3 and 4)
163 */
164 typedef enum
165 {
166 IfxGpt12_IncrementalInterfaceInputMode_stopCounterTx = 0, /**< \brief Counter Tx Stop */
167 IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxIN = 1, /**< \brief (rising or falling edge) on TxIN */
168 IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxEUD = 2, /**< \brief (rising or falling edge) on TxEUD */
169 IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxINOrTxEUD = 3 /**< \brief (rising or falling edge) on any Tx input (TxIN or TxEUD) */
170 } IfxGpt12_IncrementalInterfaceInputMode;
171
172 /** \brief Input Select for TxIN \n
173 * Definition in IfxGPT12.PISEL.B.ISTxIN (x = 2 to 4)
174 */
175 typedef enum
176 {
177 IfxGpt12_Input_A = 0, /**< \brief signal TXINA selected */
178 IfxGpt12_Input_B = 1, /**< \brief signal TXINB selected */
179 IfxGpt12_Input_C = 2, /**< \brief signal TXINC selected */
180 IfxGpt12_Input_D = 3 /**< \brief signal TXIND selected */
181 } IfxGpt12_Input;
182
183 /** \brief Timer operating mode \n
184 * Definition in IfxGPT12.TxCON.B.TxM (x = 2 to 4)
185 */
186 typedef enum
187 {
188 IfxGpt12_Mode_timer = 0, /**< \brief Timer Mode selected */
189 IfxGpt12_Mode_counter = 1, /**< \brief Counter Mode selected */
190 IfxGpt12_Mode_lowGatedTimer = 2, /**< \brief Low Gated Timer Mode selected */
191 IfxGpt12_Mode_highGatedTimer = 3, /**< \brief High Gated Timer Mode selected */
192 IfxGpt12_Mode_reload = 4, /**< \brief Reload Mode selected */
193 IfxGpt12_Mode_capture = 5, /**< \brief Capture Mode selected */
194 IfxGpt12_Mode_incrementalInterfaceRotationDetection = 6, /**< \brief Incremental Interface Mode selected */
195 IfxGpt12_Mode_incrementalInterfaceEdgeDetection = 7 /**< \brief Incremental Interface Mode selected */
196 } IfxGpt12_Mode;
197
198 /** \brief Input Edge Selection for reload mode\n
199 * Definition in IfxGPT12.TxCON.B.TxI (x = 2 and 4)
200 */
201 typedef enum
202 {
203 IfxGpt12_ReloadInputMode_counterDisabled = 0, /**< \brief Counter Tx is disabled */
204 IfxGpt12_ReloadInputMode_risingEdgeTxIN = 1, /**< \brief rising edge on TxIN */
205 IfxGpt12_ReloadInputMode_fallingEdgeTxIN = 2, /**< \brief falling edge on TxIN */
206 IfxGpt12_ReloadInputMode_bothEdgesTxIN = 3, /**< \brief rising or falling edge on TxIN */
207 IfxGpt12_ReloadInputMode_risingEdgeTxOTL = 5, /**< \brief rising edge of Tx toggle latch TxOTL */
208 IfxGpt12_ReloadInputMode_fallingEdgeTxOTL = 6, /**< \brief falling edge of Tx toggle latch TxOTL */
209 IfxGpt12_ReloadInputMode_bothEdgesTxOTL = 7 /**< \brief rising or falling edge of Tx toggle latch TxOTL */
210 } IfxGpt12_ReloadInputMode;
211
212 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
213 * Definition in Ifx_GPT12.CLC.B.EDIS
214 */
215 typedef enum
216 {
217 IfxGpt12_SleepMode_enable = 0, /**< \brief enables sleep mode */
218 IfxGpt12_SleepMode_disable = 1 /**< \brief disables sleep mode */
219 } IfxGpt12_SleepMode;
220
221 /** \brief OCDS Suspend Control (OCDS.SUS)
222 */
223 typedef enum
224 {
225 IfxGpt12_SuspendMode_none = 0, /**< \brief No suspend */
226 IfxGpt12_SuspendMode_hard = 1, /**< \brief Hard Suspend */
227 IfxGpt12_SuspendMode_soft = 2 /**< \brief Soft Suspend */
228 } IfxGpt12_SuspendMode;
229
230 /** \brief Timer Count Direction\n
231 * Definition in IfxGPT12.TxCON.B.TxUD (x=2 to 6)
232 */
233 typedef enum
234 {
235 IfxGpt12_TimerDirection_up = 0, /**< \brief Timer Up Direction selected */
236 IfxGpt12_TimerDirection_down = 1 /**< \brief Timer Down Direction selected */
237 } IfxGpt12_TimerDirection;
238
239 /** \brief Timer count direction control source\n
240 * Definition in IfxGPT12.TxCON.B.TxUDE (x=2 to 6)
241 */
242 typedef enum
243 {
244 IfxGpt12_TimerDirectionSource_internal = 0, /**< \brief Timer Dir Control = TxUD (x=2,3,4) */
245 IfxGpt12_TimerDirectionSource_external = 1 /**< \brief Timer Dir Control = TxUD (x=2,3,4) */
246 } IfxGpt12_TimerDirectionSource;
247
248 /** \brief Input prescaler Selection for the timer\n
249 * Definition in IfxGPT12.TxCON.B.TxI (x = 2 to 4)
250 */
251 typedef enum
252 {
253 IfxGpt12_TimerInputPrescaler_1 = 0,
254 IfxGpt12_TimerInputPrescaler_2 = 1,
255 IfxGpt12_TimerInputPrescaler_4 = 2,
256 IfxGpt12_TimerInputPrescaler_8 = 3,
257 IfxGpt12_TimerInputPrescaler_16 = 4,
258 IfxGpt12_TimerInputPrescaler_32 = 5,
259 IfxGpt12_TimerInputPrescaler_64 = 6,
260 IfxGpt12_TimerInputPrescaler_128 = 7
261 } IfxGpt12_TimerInputPrescaler;
262
263 /** \brief Timer Reload Mode\n
264 * Definition in IfxGPT12.T6CON.B.T6SR
265 */
266 typedef enum
267 {
268 IfxGpt12_TimerReloadMode_disable, /**< \brief Reload mode disabled */
269 IfxGpt12_TimerReloadMode_enable /**< \brief Reload mode enabled */
270 } IfxGpt12_TimerReloadMode;
271
272 /** \brief Timer Remote Control enable choice \n
273 * Definition in IfxGPT12.TxCON.B.TxRC (x = 2 and 4)
274 */
275 typedef enum
276 {
277 IfxGpt12_TimerRemoteControl_off = 0, /**< \brief T2 RemoteControl Off */
278 IfxGpt12_TimerRemoteControl_on = 1 /**< \brief T2 RemoteControl On */
279 } IfxGpt12_TimerRemoteControl;
280
281 /** \brief Timer Run / stop control choice (only if TxCON.B.TxRC = 0)\n
282 * Definition in IfxGPT12.TxCON.B.TxR (x = 2 to 6)
283 */
284 typedef enum
285 {
286 IfxGpt12_TimerRun_stop = 0, /**< \brief Timer x Stops */
287 IfxGpt12_TimerRun_start = 1 /**< \brief Timer X Run */
288 } IfxGpt12_TimerRun;
289
290 /** \} */
291
292 /** \addtogroup IfxLld_Gpt12_Std_InterruptFunctions
293 * \{ */
294
295 /******************************************************************************/
296 /*-------------------------Inline Function Prototypes-------------------------*/
297 /******************************************************************************/
298
299 /** \brief Returns the address of Timer 2 service request
300 * \param gpt12 Pointer to module base address
301 * \return address of timer 2 Interrupt
302 */
303 IFX_INLINE volatile Ifx_SRC_SRCR *IfxGpt12_T2_getSrc(Ifx_GPT12 *gpt12);
304
305 /** \brief Returns the address of Timer 3 service request
306 * \param gpt12 Pointer to module base address
307 * \return address of Timer 3 Interrupt
308 */
309 IFX_INLINE volatile Ifx_SRC_SRCR *IfxGpt12_T3_getSrc(Ifx_GPT12 *gpt12);
310
311 /** \brief Returns the address of Timer 4 service request
312 * \param gpt12 Pointer to module base address
313 * \return address of timer 4 interrupt
314 */
315 IFX_INLINE volatile Ifx_SRC_SRCR *IfxGpt12_T4_getSrc(Ifx_GPT12 *gpt12);
316
317 /** \brief Returns the address of Timer 5 service request
318 * \param gpt12 Pointer to module base address
319 * \return address of Timer 5 Interrupt
320 */
321 IFX_INLINE volatile Ifx_SRC_SRCR *IfxGpt12_T5_getSrc(Ifx_GPT12 *gpt12);
322
323 /** \brief Returns the address of Timer 6 service request
324 * \param gpt12 Pointer to module base address
325 * \return address of Timer 6 interrupt
326 */
327 IFX_INLINE volatile Ifx_SRC_SRCR *IfxGpt12_T6_getSrc(Ifx_GPT12 *gpt12);
328
329 /** \brief Returns the address of capture service request
330 * \param gpt12 Pointer to module base address
331 * \return address of capture Interrupt
332 */
333 IFX_INLINE volatile Ifx_SRC_SRCR *IfxGpt12_getCaptureSrc(Ifx_GPT12 *gpt12);
334
335 /** \} */
336
337 /** \addtogroup IfxLld_Gpt12_Std_ConfigurationFunctions
338 * \{ */
339
340 /******************************************************************************/
341 /*-------------------------Inline Function Prototypes-------------------------*/
342 /******************************************************************************/
343
344 /** \brief Sets the input edge selection for the capture mode of the T2 timer
345 * \param gpt12 Pointer to module base address
346 * \param inputMode input prescaler value in capture mode
347 * \return None
348 */
349 IFX_INLINE void IfxGpt12_T2_setCaptureInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CaptureInputMode inputMode);
350
351 /** \brief Sets the input edge selection for the counter mode of the T2 timer
352 * \param gpt12 Pointer to module base address
353 * \param inputMode input edge selection in counter mode
354 * \return None
355 */
356 IFX_INLINE void IfxGpt12_T2_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode);
357
358 /** \brief Sets the T2 timer count direction source internal / external
359 * \param gpt12 Pointer to module base address
360 * \param source direction source
361 * \return None
362 */
363 IFX_INLINE void IfxGpt12_T2_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source);
364
365 /** \brief Sets the EUD input for the T2 timer
366 * \param gpt12 Pointer to module base address
367 * \param input Select the EUD input signal
368 * \return None
369 */
370 IFX_INLINE void IfxGpt12_T2_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input);
371
372 /** \brief Sets the input edge selection for the incremental interface mode of the T2 timer
373 * \param gpt12 Pointer to module base address
374 * \param inputMode input edge selection in IIM mode
375 * \return None
376 */
377 IFX_INLINE void IfxGpt12_T2_setIncrementalInterfaceInputMode(Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode);
378
379 /** \brief Sets the input for the T2 timer
380 * \param gpt12 Pointer to module base address
381 * \param input Select the Input signal
382 * \return None
383 */
384 IFX_INLINE void IfxGpt12_T2_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input);
385
386 /** \brief Enables / Disables the interrupt generation of the T2 timer
387 * \param gpt12 pointer to module base address
388 * \param enabled Enable/Disable choice
389 * \return None
390 */
391 IFX_INLINE void IfxGpt12_T2_setInterruptEnable(Ifx_GPT12 *gpt12, boolean enabled);
392
393 /** \brief Sets the mode of operation od T2 timer
394 * \param gpt12 Pointer to module base address
395 * \param mode Select the mode of operation
396 * \return None
397 */
398 IFX_INLINE void IfxGpt12_T2_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode);
399
400 /** \brief Sets the input edge selection for the reload mode of the T2 timer
401 * \param gpt12 Pointer to module base address
402 * \param inputMode input prescaler value in reload mode
403 * \return None
404 */
405 IFX_INLINE void IfxGpt12_T2_setReloadInputMode(Ifx_GPT12 *gpt12, IfxGpt12_ReloadInputMode inputMode);
406
407 /** \brief Sets the remote control of the T2 timer
408 * \param gpt12 pointer to module base address
409 * \param control enable the remote control
410 * \return None
411 */
412 IFX_INLINE void IfxGpt12_T2_setRemoteControl(Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control);
413
414 /** \brief Sets the T2 timer count direction
415 * \param gpt12 Pointer to module base address
416 * \param direction select the Timer direction
417 * \return None
418 */
419 IFX_INLINE void IfxGpt12_T2_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction);
420
421 /** \brief Sets the input prescaler for the Timer mode and Gated timer mode of T2 timer
422 * \param gpt12 Pointer to module base address
423 * \param inputPrescaler input prescaler value in timer mode and gated timer mode
424 * \return None
425 */
426 IFX_INLINE void IfxGpt12_T2_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler);
427
428 /** \brief Enable / Disable the T3 Output on pin T3OUT
429 * \param gpt12 Pointer to module base address
430 * \param enable enable / disable choice for T3OE
431 * \return None
432 */
433 IFX_INLINE void IfxGpt12_T3_enableOutput(Ifx_GPT12 *gpt12, boolean enable);
434
435 /** \brief Sets the input edge selection for the counter mode of the T3 timer
436 * \param gpt12 Pointer to module base address
437 * \param inputMode input edge selection in counter mode
438 * \return None
439 */
440 IFX_INLINE void IfxGpt12_T3_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode);
441
442 /** \brief Sets the T3 timer count direction source internal / external
443 * \param gpt12 Pointer to module base address
444 * \param source direction source
445 * \return None
446 */
447 IFX_INLINE void IfxGpt12_T3_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source);
448
449 /** \brief Sets the EUD input for the T3 timer
450 * \param gpt12 Pointer to module base address
451 * \param input Select the EUD input signal
452 * \return None
453 */
454 IFX_INLINE void IfxGpt12_T3_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input);
455
456 /** \brief Sets the input edge selection for the incremental interface mode of the T3 timer
457 * \param gpt12 Pointer to module base address
458 * \param inputMode input edge selection in IIM mode
459 * \return None
460 */
461 IFX_INLINE void IfxGpt12_T3_setIncrementalInterfaceInputMode(Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode);
462
463 /** \brief Sets the input for the T3 timer
464 * \param gpt12 Pointer to module base address
465 * \param input Select the Input signal
466 * \return None
467 */
468 IFX_INLINE void IfxGpt12_T3_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input);
469
470 /** \brief Sets the mode of operation od T3 timer
471 * \param gpt12 Pointer to module base address
472 * \param mode Select the mode of operation
473 * \return None
474 */
475 IFX_INLINE void IfxGpt12_T3_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode);
476
477 /** \brief Sets the T3 timer count direction
478 * \param gpt12 Pointer to module base address
479 * \param direction select the Timer direction
480 * \return None
481 */
482 IFX_INLINE void IfxGpt12_T3_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction);
483
484 /** \brief Sets the input prescaler for the Timer mode and Gated timer mode of T3 timer
485 * \param gpt12 Pointer to module base address
486 * \param inputPrescaler input prescaler value in timer mode and gated timer mode
487 * \return None
488 */
489 IFX_INLINE void IfxGpt12_T3_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler);
490
491 /** \brief Enables / Disables the clear timer T2 bit of the T4 timer
492 * \param gpt12 pointer to module base address
493 * \param enabled Enable/Disable choice
494 * \return None
495 */
496 IFX_INLINE void IfxGpt12_T4_enableClearTimerT2(Ifx_GPT12 *gpt12, boolean enabled);
497
498 /** \brief Enables / Disables the clear timer T3 bit of the T4 timer
499 * \param gpt12 pointer to module base address
500 * \param enabled Enable/Disable choice
501 * \return None
502 */
503 IFX_INLINE void IfxGpt12_T4_enableClearTimerT3(Ifx_GPT12 *gpt12, boolean enabled);
504
505 /** \brief Sets the input edge selection for the capture mode of the T4 timer
506 * \param gpt12 Pointer to module base address
507 * \param inputMode input prescaler value in capture mode
508 * \return None
509 */
510 IFX_INLINE void IfxGpt12_T4_setCaptureInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CaptureInputMode inputMode);
511
512 /** \brief Sets the input edge selection for the counter mode of the T4 timer
513 * \param gpt12 Pointer to module base address
514 * \param inputMode input edge selection in counter mode
515 * \return None
516 */
517 IFX_INLINE void IfxGpt12_T4_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode);
518
519 /** \brief Sets the T4 timer count direction source internal / external
520 * \param gpt12 Pointer to module base address
521 * \param source direction source
522 * \return None
523 */
524 IFX_INLINE void IfxGpt12_T4_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source);
525
526 /** \brief Sets the EUD input for the T4 timer
527 * \param gpt12 Pointer to module base address
528 * \param input Select the EUD input signal
529 * \return None
530 */
531 IFX_INLINE void IfxGpt12_T4_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input);
532
533 /** \brief Sets the input edge selection for the incremental interface mode of the T4 timer
534 * \param gpt12 Pointer to module base address
535 * \param inputMode input edge selection in IIM mode
536 * \return None
537 */
538 IFX_INLINE void IfxGpt12_T4_setIncrementalInterfaceInputMode(Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode);
539
540 /** \brief Sets the input for the T4 timer
541 * \param gpt12 Pointer to module base address
542 * \param input Select the Input signal
543 * \return None
544 */
545 IFX_INLINE void IfxGpt12_T4_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input);
546
547 /** \brief Enables / Disables the interrupt generation of the T4 timer
548 * \param gpt12 pointer to module base address
549 * \param enabled Enable/Disable choice
550 * \return None
551 */
552 IFX_INLINE void IfxGpt12_T4_setInterruptEnable(Ifx_GPT12 *gpt12, boolean enabled);
553
554 /** \brief Sets the mode of operation od T4 timer
555 * \param gpt12 Pointer to module base address
556 * \param mode Select the mode of operation
557 * \return None
558 */
559 IFX_INLINE void IfxGpt12_T4_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode);
560
561 /** \brief Sets the input edge selection for the reload mode of the T4 timer
562 * \param gpt12 Pointer to module base address
563 * \param inputMode input prescaler value in reload mode
564 * \return None
565 */
566 IFX_INLINE void IfxGpt12_T4_setReloadInputMode(Ifx_GPT12 *gpt12, IfxGpt12_ReloadInputMode inputMode);
567
568 /** \brief Sets the remote control of the T4 timer
569 * \param gpt12 pointer to module base address
570 * \param control enable the remote control
571 * \return None
572 */
573 IFX_INLINE void IfxGpt12_T4_setRemoteControl(Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control);
574
575 /** \brief Sets the T4 timer count direction
576 * \param gpt12 Pointer to module base address
577 * \param direction select the Timer direction
578 * \return None
579 */
580 IFX_INLINE void IfxGpt12_T4_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction);
581
582 /** \brief Sets the input prescaler for the Timer mode and Gated timer mode of T4 timer
583 * \param gpt12 Pointer to module base address
584 * \param inputPrescaler input prescaler value in timer mode and gated timer mode
585 * \return None
586 */
587 IFX_INLINE void IfxGpt12_T4_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler);
588
589 /** \brief Enables / Disables the clear timer bit of the T5 timer
590 * \param gpt12 pointer to module base address
591 * \param enabled Enable/Disable choice
592 * \return None
593 */
594 IFX_INLINE void IfxGpt12_T5_enableClearTimer(Ifx_GPT12 *gpt12, boolean enabled);
595
596 /** \brief Sets the capture trigger of teh T5 timer
597 * \param gpt12 Pointer to Module base address
598 * \param trigger Capture trigger
599 * \return None
600 */
601 IFX_INLINE void IfxGpt12_T5_setCaptureTrigger(Ifx_GPT12 *gpt12, IfxGpt12_CaptureTrigger trigger);
602
603 /** \brief Enables / Disables the capture trigger of the T5 timer
604 * \param gpt12 pointer to module base address
605 * \param enabled Enable/Disable choice
606 * \return None
607 */
608 IFX_INLINE void IfxGpt12_T5_setCaptureTriggerEnable(Ifx_GPT12 *gpt12, boolean enabled);
609
610 /** \brief Sets the capture trigger mode of the T5 timer
611 * \param gpt12 Pointer to module base address
612 * \param mode Select the capture trigger mode
613 * \return None
614 */
615 IFX_INLINE void IfxGpt12_T5_setCaptureTriggerMode(Ifx_GPT12 *gpt12, IfxGpt12_CaptureTriggerMode mode);
616
617 /** \brief Sets the input edge selection for the counter mode of the T5 timer
618 * \param gpt12 Pointer to module base address
619 * \param inputMode input edge selection in counter mode
620 * \return None
621 */
622 IFX_INLINE void IfxGpt12_T5_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode);
623
624 /** \brief Sets the T5 timer count direction source internal / external
625 * \param gpt12 Pointer to module base address
626 * \param source direction source
627 * \return None
628 */
629 IFX_INLINE void IfxGpt12_T5_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source);
630
631 /** \brief Sets the EUD input for the T5 timer
632 * \param gpt12 Pointer to module base address
633 * \param input Select the EUD input signal
634 * \return None
635 */
636 IFX_INLINE void IfxGpt12_T5_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input);
637
638 /** \brief Sets the input for the T5 timer
639 * \param gpt12 Pointer to module base address
640 * \param input Select the Input signal
641 * \return None
642 */
643 IFX_INLINE void IfxGpt12_T5_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input);
644
645 /** \brief Sets the mode of operation od T5 timer
646 * \param gpt12 Pointer to module base address
647 * \param mode Select the mode of operation
648 * \return None
649 */
650 IFX_INLINE void IfxGpt12_T5_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode);
651
652 /** \brief Sets the remote control of the T5 timer
653 * \param gpt12 pointer to module base address
654 * \param control enable the remote control
655 * \return None
656 */
657 IFX_INLINE void IfxGpt12_T5_setRemoteControl(Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control);
658
659 /** \brief Sets the T5 timer count direction
660 * \param gpt12 Pointer to module base address
661 * \param direction select the Timer direction
662 * \return None
663 */
664 IFX_INLINE void IfxGpt12_T5_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction);
665
666 /** \brief Sets the input prescaler for the Timer mode and Gated timer mode of T5 timer
667 * \param gpt12 Pointer to module base address
668 * \param inputPrescaler input prescaler value in timer mode and gated timer mode
669 * \return None
670 */
671 IFX_INLINE void IfxGpt12_T5_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler);
672
673 /** \brief Enables / Disables the clear timer bit of the T6 timer
674 * \param gpt12 pointer to module base address
675 * \param enabled Enable/Disable choice
676 * \return None
677 */
678 IFX_INLINE void IfxGpt12_T6_enableClearTimer(Ifx_GPT12 *gpt12, boolean enabled);
679
680 /** \brief Sets the input edge selection for the counter mode of the T6 timer
681 * \param gpt12 Pointer to module base address
682 * \param inputMode input edge selection in counter mode
683 * \return None
684 */
685 IFX_INLINE void IfxGpt12_T6_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode);
686
687 /** \brief sets the T6 timer count direction source internal / external
688 * \param gpt12 Pointer to module base address
689 * \param source direction source
690 * \return None
691 */
692 IFX_INLINE void IfxGpt12_T6_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source);
693
694 /** \brief Sets the EUD input for the T6 timer
695 * \param gpt12 Pointer to module base address
696 * \param input Select the EUD input signal
697 * \return None
698 */
699 IFX_INLINE void IfxGpt12_T6_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input);
700
701 /** \brief Sets the input for the T6 timer
702 * \param gpt12 Pointer to module base address
703 * \param input Select the Input signal
704 * \return None
705 */
706 IFX_INLINE void IfxGpt12_T6_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input);
707
708 /** \brief Sets the mode of operation od T6 timer
709 * \param gpt12 Pointer to module base address
710 * \param mode Select the mode of operation
711 * \return None
712 */
713 IFX_INLINE void IfxGpt12_T6_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode);
714
715 /** \brief sets the T6 timer count direction
716 * \param gpt12 Pointer to module base address
717 * \param mode Timer Reload Mode
718 * \return None
719 */
720 IFX_INLINE void IfxGpt12_T6_setReloadMode(Ifx_GPT12 *gpt12, IfxGpt12_TimerReloadMode mode);
721
722 /** \brief sets the T6 timer count direction
723 * \param gpt12 Pointer to module base address
724 * \param direction select the Timer direction
725 * \return None
726 */
727 IFX_INLINE void IfxGpt12_T6_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction);
728
729 /** \brief Sets the input prescaler for the Timer mode and Gated timer mode of T6 timer
730 * \param gpt12 Pointer to module base address
731 * \param inputPrescaler input prescaler value in timer mode and gated timer mode
732 * \return None
733 */
734 IFX_INLINE void IfxGpt12_T6_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler);
735
736 /** \brief Initializes a Capin_In input
737 * \param capIn the TxIn Pin which should be configured
738 * \param inputMode the pin input mode which should be configured
739 * \return None
740 */
741 IFX_INLINE void IfxGpt12_initCapInPin(const IfxGpt12_TxIn_In *capIn, IfxPort_InputMode inputMode);
742
743 /** \brief Initializes a SLSO output
744 * \param txOut the TxOUT Pin which should be configured
745 * \param outputMode the pin output mode which should be configured
746 * \param padDriver the pad driver mode which should be configured
747 * \return None
748 */
749 IFX_INLINE void IfxGpt12_initTxOutPin(const IfxGpt12_TxOut_Out *txOut, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
750
751 /** \brief Sets the capture input
752 * \param gpt12 Pointer to Module base address
753 * \param input Select the capture input signal
754 * \return None
755 */
756 IFX_INLINE void IfxGpt12_setCaptureInput(Ifx_GPT12 *gpt12, IfxGpt12_CaptureInput input);
757
758 /** \brief Sets the GPT1 block prescaler
759 * \param gpt12 Pointer to module base address
760 * \param bps1 Select the GPT1 block Prescaler
761 * \return None
762 */
763 IFX_INLINE void IfxGpt12_setGpt1BlockPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_Gpt1BlockPrescaler bps1);
764
765 /** \brief Sets the GPT2 block prescaler
766 * \param gpt12 Pointer to module base address
767 * \param bps2 Select the GPT2 block Prescaler
768 * \return None
769 */
770 IFX_INLINE void IfxGpt12_setGpt2BlockPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_Gpt2BlockPrescaler bps2);
771
772 /******************************************************************************/
773 /*-------------------------Global Function Prototypes-------------------------*/
774 /******************************************************************************/
775
776 /** \brief Disables the module
777 * \param gpt12 Pointer to module base address
778 * \return None
779 */
780 IFX_EXTERN void IfxGpt12_disableModule(Ifx_GPT12 *gpt12);
781
782 /** \brief Enables the module
783 * \param gpt12 Pointer to module base address
784 * \return None
785 */
786 IFX_EXTERN void IfxGpt12_enableModule(Ifx_GPT12 *gpt12);
787
788 /** \brief Initializes a TxEUDIn_IN input
789 * \param txEudIn the TxEUD_IN Pin which should be configured
790 * \param inputMode the pin input mode which should be configured
791 * \return None
792 */
793 IFX_EXTERN void IfxGpt12_initTxEudInPin(const IfxGpt12_TxEud_In *txEudIn, IfxPort_InputMode inputMode);
794
795 /** \brief Initializes a TxIn input
796 * \param txIn the TxIn Pin which should be configured
797 * \param inputMode the pin input mode which should be configured
798 * \return None
799 */
800 IFX_EXTERN void IfxGpt12_initTxInPin(const IfxGpt12_TxIn_In *txIn, IfxPort_InputMode inputMode);
801
802 /** \} */
803
804 /** \addtogroup IfxLld_Gpt12_Std_UtilityFunctions
805 * \{ */
806
807 /******************************************************************************/
808 /*-------------------------Inline Function Prototypes-------------------------*/
809 /******************************************************************************/
810
811 /** \brief Returns the operating mode of the T2 timer
812 * \param gpt12 Pointer to module base address
813 * \return mode of operation
814 */
815 IFX_INLINE IfxGpt12_Mode IfxGpt12_T2_getMode(Ifx_GPT12 *gpt12);
816
817 /** \brief Returns the timer value of the T2 timer
818 * \param gpt12 Pointer to module base address
819 * \return timer current value
820 */
821 IFX_INLINE uint16 IfxGpt12_T2_getTimerValue(Ifx_GPT12 *gpt12);
822
823 /** \brief Returns the operating mode of the T3 timer
824 * \param gpt12 Pointer to module base address
825 * \return mode of operation
826 */
827 IFX_INLINE IfxGpt12_Mode IfxGpt12_T3_getMode(Ifx_GPT12 *gpt12);
828
829 /** \brief Returns the timer value of the T3 timer
830 * \param gpt12 Pointer to module base address
831 * \return timer current value
832 */
833 IFX_INLINE uint16 IfxGpt12_T3_getTimerValue(Ifx_GPT12 *gpt12);
834
835 /** \brief Returns the operating mode of the T4 timer
836 * \param gpt12 Pointer to module base address
837 * \return mode of operation
838 */
839 IFX_INLINE IfxGpt12_Mode IfxGpt12_T4_getMode(Ifx_GPT12 *gpt12);
840
841 /** \brief Returns the timer value of the T4 timer
842 * \param gpt12 Pointer to module base address
843 * \return timer current value
844 */
845 IFX_INLINE uint16 IfxGpt12_T4_getTimerValue(Ifx_GPT12 *gpt12);
846
847 /** \brief Returns the operating mode of the T5 timer
848 * \param gpt12 Pointer to module base address
849 * \return mode of operation
850 */
851 IFX_INLINE IfxGpt12_Mode IfxGpt12_T5_getMode(Ifx_GPT12 *gpt12);
852
853 /** \brief Returns the timer value of the T5 timer
854 * \param gpt12 Pointer to module base address
855 * \return timer current value
856 */
857 IFX_INLINE uint16 IfxGpt12_T5_getTimerValue(Ifx_GPT12 *gpt12);
858
859 /** \brief Returns the operating mode of the T6 timer
860 * \param gpt12 Pointer to module base address
861 * \return mode of operation
862 */
863 IFX_INLINE IfxGpt12_Mode IfxGpt12_T6_getMode(Ifx_GPT12 *gpt12);
864
865 /** \brief Returns the timer value of the T6 timer
866 * \param gpt12 Pointer to module base address
867 * \return timer current value
868 */
869 IFX_INLINE uint16 IfxGpt12_T6_getTimerValue(Ifx_GPT12 *gpt12);
870
871 /** \brief Returns the gpt12 module frequency
872 * \param gpt12 Pointer to module base address
873 * \return gpt12 module frequency
874 */
875 IFX_INLINE float32 IfxGpt12_getModuleFrequency(Ifx_GPT12 *gpt12);
876
877 /******************************************************************************/
878 /*-------------------------Global Function Prototypes-------------------------*/
879 /******************************************************************************/
880
881 /** \brief Returns the frequency of the T2 timer
882 * \param gpt12 Pointer to Module base address
883 * \return frequency
884 */
885 IFX_EXTERN float32 IfxGpt12_T2_getFrequency(Ifx_GPT12 *gpt12);
886
887 /** \brief Returns the frequency of the T3 timer
888 * \param gpt12 Pointer to Module base address
889 * \return frequency
890 */
891 IFX_EXTERN float32 IfxGpt12_T3_getFrequency(Ifx_GPT12 *gpt12);
892
893 /** \brief Returns the frequency of the T4 timer
894 * \param gpt12 Pointer to Module base address
895 * \return frequency
896 */
897 IFX_EXTERN float32 IfxGpt12_T4_getFrequency(Ifx_GPT12 *gpt12);
898
899 /** \brief Returns the frequency of the T5 timer
900 * \param gpt12 Pointer to Module base address
901 * \return frequency
902 */
903 IFX_EXTERN float32 IfxGpt12_T5_getFrequency(Ifx_GPT12 *gpt12);
904
905 /** \brief Returns the frequency of the T6 timer
906 * \param gpt12 Pointer to Module base address
907 * \return frequency
908 */
909 IFX_EXTERN float32 IfxGpt12_T6_getFrequency(Ifx_GPT12 *gpt12);
910
911 /** \} */
912
913 /** \addtogroup IfxLld_Gpt12_Std_OperativeFunctions
914 * \{ */
915
916 /******************************************************************************/
917 /*-------------------------Inline Function Prototypes-------------------------*/
918 /******************************************************************************/
919
920 /** \brief Starts / stops the T2 Timer
921 * \param gpt12 Pointer to Module base address
922 * \param runTimer Start/stop Timer 2
923 * \return None
924 */
925 IFX_INLINE void IfxGpt12_T2_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer);
926
927 /** \brief Sets value for the T2 timer
928 * \param gpt12 pointer to module base address
929 * \param value Timer Value
930 * \return None
931 */
932 IFX_INLINE void IfxGpt12_T2_setTimerValue(Ifx_GPT12 *gpt12, uint16 value);
933
934 /** \brief Starts / stops the T3 Timer
935 * \param gpt12 Pointer to module base address
936 * \param runTimer start/stop Timer 3
937 * \return None
938 */
939 IFX_INLINE void IfxGpt12_T3_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer);
940
941 /** \brief Sets value for the T3 Timer
942 * \param gpt12 pointer to module base address
943 * \param value Timer Value
944 * \return None
945 */
946 IFX_INLINE void IfxGpt12_T3_setTimerValue(Ifx_GPT12 *gpt12, uint16 value);
947
948 /** \brief Starts / stops the T4 Timer
949 * \param gpt12 Pointer to module base address
950 * \param runTimer Start/stop Timer 4
951 * \return None
952 */
953 IFX_INLINE void IfxGpt12_T4_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer);
954
955 /** \brief Sets value for the T4 timer
956 * \param gpt12 pointer to module base address
957 * \param value Timer Value
958 * \return None
959 */
960 IFX_INLINE void IfxGpt12_T4_setTimerValue(Ifx_GPT12 *gpt12, uint16 value);
961
962 /** \brief Starts / stops the T5 Timer
963 * \param gpt12 Pointer to module base address
964 * \param runTimer Start/stop Timer 5
965 * \return None
966 */
967 IFX_INLINE void IfxGpt12_T5_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer);
968
969 /** \brief Sets value for the T5 timer
970 * \param gpt12 pointer to module base address
971 * \param value Timer Value
972 * \return None
973 */
974 IFX_INLINE void IfxGpt12_T5_setTimerValue(Ifx_GPT12 *gpt12, uint16 value);
975
976 /** \brief Starts / stops the T6 Timer
977 * \param gpt12 Pointer to module base address
978 * \param runTimer Start/stop Timer 6
979 * \return None
980 */
981 IFX_INLINE void IfxGpt12_T6_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer);
982
983 /** \brief Sets value for the T6 timer
984 * \param gpt12 pointer to module base address
985 * \param value Timer Value
986 * \return None
987 */
988 IFX_INLINE void IfxGpt12_T6_setTimerValue(Ifx_GPT12 *gpt12, uint16 value);
989
990 /** \brief Sets the sensitivity of the module to sleep signal
991 * \param gpt12 pointer to GPT12 registers
992 * \param value Reload value
993 * \return None
994 */
995 IFX_INLINE void IfxGpt12_setCaptureReload(Ifx_GPT12 *gpt12, IfxGpt12_SleepMode value);
996
997 /** \brief Sets the sensitivity of the module to sleep signal
998 * \param gpt12 pointer to GPT12 registers
999 * \param mode mode selection (enable/disable)
1000 * \return None
1001 */
1002 IFX_INLINE void IfxGpt12_setSleepMode(Ifx_GPT12 *gpt12, IfxGpt12_SleepMode mode);
1003
1004 /** \brief Configure the Module to Hard/Soft suspend mode.
1005 * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
1006 * \param gpt12 Pointer to GPT12 module registers
1007 * \param mode Module suspend mode
1008 * \return None
1009 */
1010 IFX_INLINE void IfxGpt12_setSuspendMode(Ifx_GPT12 *gpt12, IfxGpt12_SuspendMode mode);
1011
1012 /******************************************************************************/
1013 /*-------------------------Global Function Prototypes-------------------------*/
1014 /******************************************************************************/
1015
1016 /** \brief resets GPT12 kernel
1017 * \param gpt12 pointer to GPT12 registers
1018 * \return None
1019 */
1020 IFX_EXTERN void IfxGpt12_resetModule(Ifx_GPT12 *gpt12);
1021
1022 /** \} */
1023
1024 /******************************************************************************/
1025 /*-------------------------Inline Function Prototypes-------------------------*/
1026 /******************************************************************************/
1027
1028 /** \brief Provides functionality for both setting of CAPIN pin direction as input and configuring pad driver
1029 * \param capIn the TxIn Pin which should be configured
1030 * \param inputMode the pin input mode which should be configured
1031 * \param padDriver the pad driver mode which should be configured
1032 * \return None
1033 */
1034 IFX_INLINE void IfxGpt12_initCapInPinWithPadLevel(const IfxGpt12_TxIn_In *capIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
1035
1036 /** \brief Returns the module's suspend state.
1037 * TRUE :if module is suspended.
1038 * FALSE:if module is not yet suspended.
1039 * \param gpt12 Pointer to GPT12 module registers
1040 * \return Suspend status (TRUE / FALSE)
1041 */
1042 IFX_INLINE boolean IfxGpt12_isModuleSuspended(Ifx_GPT12 *gpt12);
1043
1044 /******************************************************************************/
1045 /*-------------------------Global Function Prototypes-------------------------*/
1046 /******************************************************************************/
1047
1048 /** \brief Provides functionality for both setting of TXEUD pin direction as input and configuring pad driver
1049 * \param txEudIn the TxEUD_IN Pin which should be configured
1050 * \param inputMode the pin input mode which should be configured
1051 * \param padDriver the pad driver mode which should be configured
1052 * \return None
1053 */
1054 IFX_EXTERN void IfxGpt12_initTxEudInPinWithPadLevel(const IfxGpt12_TxEud_In *txEudIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
1055
1056 /** \brief Provides functionality for both setting of TXIN pin direction as input and configuring pad driver
1057 * \param txIn the TxIn Pin which should be configured
1058 * \param inputMode the pin input mode which should be configured
1059 * \param padDriver the pad driver mode which should be configured
1060 * \return None
1061 */
1062 IFX_EXTERN void IfxGpt12_initTxInPinWithPadLevel(const IfxGpt12_TxIn_In *txIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
1063
1064 /******************************************************************************/
1065 /*---------------------Inline Function Implementations------------------------*/
1066 /******************************************************************************/
1067
1068 IFX_INLINE IfxGpt12_Mode IfxGpt12_T2_getMode(Ifx_GPT12 *gpt12)
1069 {
1070 return (IfxGpt12_Mode)gpt12->T2CON.B.T2M;
1071 }
1072
1073
1074 IFX_INLINE volatile Ifx_SRC_SRCR *IfxGpt12_T2_getSrc(Ifx_GPT12 *gpt12)
1075 {
1076 IFX_UNUSED_PARAMETER(gpt12)
1077 return &MODULE_SRC.GPT12.GPT12[0].T2;
1078 }
1079
1080
1081 IFX_INLINE uint16 IfxGpt12_T2_getTimerValue(Ifx_GPT12 *gpt12)
1082 {
1083 return (uint16)gpt12->T2.U;
1084 }
1085
1086
1087 IFX_INLINE void IfxGpt12_T2_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
1088 {
1089 gpt12->T2CON.B.T2R = runTimer;
1090 }
1091
1092
1093 IFX_INLINE void IfxGpt12_T2_setCaptureInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CaptureInputMode inputMode)
1094 {
1095 gpt12->T2CON.B.T2I = inputMode;
1096 }
1097
1098
1099 IFX_INLINE void IfxGpt12_T2_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
1100 {
1101 gpt12->T2CON.B.T2I = inputMode;
1102 }
1103
1104
1105 IFX_INLINE void IfxGpt12_T2_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
1106 {
1107 gpt12->T2CON.B.T2UDE = source;
1108 }
1109
1110
1111 IFX_INLINE void IfxGpt12_T2_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
1112 {
1113 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, input <= 1); /* wrong selection */
1114 gpt12->PISEL.B.IST2EUD = input;
1115 }
1116
1117
1118 IFX_INLINE void IfxGpt12_T2_setIncrementalInterfaceInputMode(Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode)
1119 {
1120 gpt12->T2CON.B.T2I = inputMode;
1121 }
1122
1123
1124 IFX_INLINE void IfxGpt12_T2_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input)
1125 {
1126 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, input <= 1); /* wrong selection */
1127 gpt12->PISEL.B.IST2IN = input;
1128 }
1129
1130
1131 IFX_INLINE void IfxGpt12_T2_setInterruptEnable(Ifx_GPT12 *gpt12, boolean enabled)
1132 {
1133 gpt12->T2CON.B.T2IRDIS = enabled ? 0 : 1;
1134 }
1135
1136
1137 IFX_INLINE void IfxGpt12_T2_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
1138 {
1139 gpt12->T2CON.B.T2M = mode;
1140 }
1141
1142
1143 IFX_INLINE void IfxGpt12_T2_setReloadInputMode(Ifx_GPT12 *gpt12, IfxGpt12_ReloadInputMode inputMode)
1144 {
1145 gpt12->T2CON.B.T2I = inputMode;
1146 }
1147
1148
1149 IFX_INLINE void IfxGpt12_T2_setRemoteControl(Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control)
1150 {
1151 gpt12->T2CON.B.T2RC = control;
1152 }
1153
1154
1155 IFX_INLINE void IfxGpt12_T2_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
1156 {
1157 gpt12->T2CON.B.T2UD = direction;
1158 }
1159
1160
1161 IFX_INLINE void IfxGpt12_T2_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
1162 {
1163 gpt12->T2CON.B.T2I = inputPrescaler;
1164 }
1165
1166
1167 IFX_INLINE void IfxGpt12_T2_setTimerValue(Ifx_GPT12 *gpt12, uint16 value)
1168 {
1169 gpt12->T2.U = value;
1170 }
1171
1172
1173 IFX_INLINE void IfxGpt12_T3_enableOutput(Ifx_GPT12 *gpt12, boolean enable)
1174 {
1175 gpt12->T3CON.B.T3OE = enable ? 1 : 0;
1176 }
1177
1178
1179 IFX_INLINE IfxGpt12_Mode IfxGpt12_T3_getMode(Ifx_GPT12 *gpt12)
1180 {
1181 return (IfxGpt12_Mode)gpt12->T3CON.B.T3M;
1182 }
1183
1184
1185 IFX_INLINE volatile Ifx_SRC_SRCR *IfxGpt12_T3_getSrc(Ifx_GPT12 *gpt12)
1186 {
1187 IFX_UNUSED_PARAMETER(gpt12)
1188 return &MODULE_SRC.GPT12.GPT12[0].T3;
1189 }
1190
1191
1192 IFX_INLINE uint16 IfxGpt12_T3_getTimerValue(Ifx_GPT12 *gpt12)
1193 {
1194 return (uint16)gpt12->T3.U;
1195 }
1196
1197
1198 IFX_INLINE void IfxGpt12_T3_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
1199 {
1200 gpt12->T3CON.B.T3R = runTimer;
1201 }
1202
1203
1204 IFX_INLINE void IfxGpt12_T3_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
1205 {
1206 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, inputMode <= IfxGpt12_CounterInputMode_bothEdgesTxIN); /* wrong selection */
1207 gpt12->T3CON.B.T3I = inputMode;
1208 }
1209
1210
1211 IFX_INLINE void IfxGpt12_T3_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
1212 {
1213 gpt12->T3CON.B.T3UDE = source;
1214 }
1215
1216
1217 IFX_INLINE void IfxGpt12_T3_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
1218 {
1219 gpt12->PISEL.B.IST3EUD = input;
1220 }
1221
1222
1223 IFX_INLINE void IfxGpt12_T3_setIncrementalInterfaceInputMode(Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode)
1224 {
1225 gpt12->T3CON.B.T3I = inputMode;
1226 }
1227
1228
1229 IFX_INLINE void IfxGpt12_T3_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input)
1230 {
1231 gpt12->PISEL.B.IST3IN = input;
1232 }
1233
1234
1235 IFX_INLINE void IfxGpt12_T3_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
1236 {
1237 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, ((mode != IfxGpt12_Mode_reload) && (mode != IfxGpt12_Mode_capture))); /* wrong selection */
1238 gpt12->T3CON.B.T3M = mode;
1239 }
1240
1241
1242 IFX_INLINE void IfxGpt12_T3_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
1243 {
1244 gpt12->T3CON.B.T3UD = direction;
1245 }
1246
1247
1248 IFX_INLINE void IfxGpt12_T3_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
1249 {
1250 gpt12->T3CON.B.T3I = inputPrescaler;
1251 }
1252
1253
1254 IFX_INLINE void IfxGpt12_T3_setTimerValue(Ifx_GPT12 *gpt12, uint16 value)
1255 {
1256 gpt12->T3.U = value;
1257 }
1258
1259
1260 IFX_INLINE void IfxGpt12_T4_enableClearTimerT2(Ifx_GPT12 *gpt12, boolean enabled)
1261 {
1262 gpt12->T4CON.B.CLRT2EN = enabled ? 1 : 0;
1263 }
1264
1265
1266 IFX_INLINE void IfxGpt12_T4_enableClearTimerT3(Ifx_GPT12 *gpt12, boolean enabled)
1267 {
1268 gpt12->T4CON.B.CLRT3EN = enabled ? 1 : 0;
1269 }
1270
1271
1272 IFX_INLINE IfxGpt12_Mode IfxGpt12_T4_getMode(Ifx_GPT12 *gpt12)
1273 {
1274 return (IfxGpt12_Mode)gpt12->T4CON.B.T4M;
1275 }
1276
1277
1278 IFX_INLINE volatile Ifx_SRC_SRCR *IfxGpt12_T4_getSrc(Ifx_GPT12 *gpt12)
1279 {
1280 IFX_UNUSED_PARAMETER(gpt12)
1281 return &MODULE_SRC.GPT12.GPT12[0].T4;
1282 }
1283
1284
1285 IFX_INLINE uint16 IfxGpt12_T4_getTimerValue(Ifx_GPT12 *gpt12)
1286 {
1287 return (uint16)gpt12->T4.U;
1288 }
1289
1290
1291 IFX_INLINE void IfxGpt12_T4_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
1292 {
1293 gpt12->T4CON.B.T4R = runTimer;
1294 }
1295
1296
1297 IFX_INLINE void IfxGpt12_T4_setCaptureInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CaptureInputMode inputMode)
1298 {
1299 gpt12->T4CON.B.T4I = inputMode;
1300 }
1301
1302
1303 IFX_INLINE void IfxGpt12_T4_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
1304 {
1305 gpt12->T4CON.B.T4I = inputMode;
1306 }
1307
1308
1309 IFX_INLINE void IfxGpt12_T4_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
1310 {
1311 gpt12->T4CON.B.T4UDE = source;
1312 }
1313
1314
1315 IFX_INLINE void IfxGpt12_T4_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
1316 {
1317 gpt12->PISEL.B.IST4EUD = input;
1318 }
1319
1320
1321 IFX_INLINE void IfxGpt12_T4_setIncrementalInterfaceInputMode(Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode)
1322 {
1323 gpt12->T4CON.B.T4I = inputMode;
1324 }
1325
1326
1327 IFX_INLINE void IfxGpt12_T4_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input)
1328 {
1329 gpt12->PISEL.B.IST4IN = input;
1330 }
1331
1332
1333 IFX_INLINE void IfxGpt12_T4_setInterruptEnable(Ifx_GPT12 *gpt12, boolean enabled)
1334 {
1335 gpt12->T4CON.B.T4IRDIS = enabled ? 0 : 1;
1336 }
1337
1338
1339 IFX_INLINE void IfxGpt12_T4_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
1340 {
1341 gpt12->T4CON.B.T4M = mode;
1342 }
1343
1344
1345 IFX_INLINE void IfxGpt12_T4_setReloadInputMode(Ifx_GPT12 *gpt12, IfxGpt12_ReloadInputMode inputMode)
1346 {
1347 gpt12->T4CON.B.T4I = inputMode;
1348 }
1349
1350
1351 IFX_INLINE void IfxGpt12_T4_setRemoteControl(Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control)
1352 {
1353 gpt12->T4CON.B.T4RC = control;
1354 }
1355
1356
1357 IFX_INLINE void IfxGpt12_T4_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
1358 {
1359 gpt12->T4CON.B.T4UD = direction;
1360 }
1361
1362
1363 IFX_INLINE void IfxGpt12_T4_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
1364 {
1365 gpt12->T4CON.B.T4I = inputPrescaler;
1366 }
1367
1368
1369 IFX_INLINE void IfxGpt12_T4_setTimerValue(Ifx_GPT12 *gpt12, uint16 value)
1370 {
1371 gpt12->T4.U = value;
1372 }
1373
1374
1375 IFX_INLINE void IfxGpt12_T5_enableClearTimer(Ifx_GPT12 *gpt12, boolean enabled)
1376 {
1377 gpt12->T5CON.B.T5CLR = enabled ? 1 : 0;
1378 }
1379
1380
1381 IFX_INLINE IfxGpt12_Mode IfxGpt12_T5_getMode(Ifx_GPT12 *gpt12)
1382 {
1383 return (IfxGpt12_Mode)gpt12->T5CON.B.T5M;
1384 }
1385
1386
1387 IFX_INLINE volatile Ifx_SRC_SRCR *IfxGpt12_T5_getSrc(Ifx_GPT12 *gpt12)
1388 {
1389 IFX_UNUSED_PARAMETER(gpt12)
1390 return &MODULE_SRC.GPT12.GPT12[0].T5;
1391 }
1392
1393
1394 IFX_INLINE uint16 IfxGpt12_T5_getTimerValue(Ifx_GPT12 *gpt12)
1395 {
1396 return (uint16)gpt12->T5.U;
1397 }
1398
1399
1400 IFX_INLINE void IfxGpt12_T5_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
1401 {
1402 gpt12->T5CON.B.T5R = runTimer;
1403 }
1404
1405
1406 IFX_INLINE void IfxGpt12_T5_setCaptureTrigger(Ifx_GPT12 *gpt12, IfxGpt12_CaptureTrigger trigger)
1407 {
1408 gpt12->T5CON.B.CT3 = trigger;
1409 }
1410
1411
1412 IFX_INLINE void IfxGpt12_T5_setCaptureTriggerEnable(Ifx_GPT12 *gpt12, boolean enabled)
1413 {
1414 gpt12->T5CON.B.T5SC = enabled;
1415 }
1416
1417
1418 IFX_INLINE void IfxGpt12_T5_setCaptureTriggerMode(Ifx_GPT12 *gpt12, IfxGpt12_CaptureTriggerMode mode)
1419 {
1420 gpt12->T5CON.B.CI = mode;
1421 }
1422
1423
1424 IFX_INLINE void IfxGpt12_T5_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
1425 {
1426 gpt12->T5CON.B.T5I = inputMode;
1427 }
1428
1429
1430 IFX_INLINE void IfxGpt12_T5_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
1431 {
1432 gpt12->T5CON.B.T5UDE = source;
1433 }
1434
1435
1436 IFX_INLINE void IfxGpt12_T5_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
1437 {
1438 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, input <= 1); /* wrong selection */
1439 gpt12->PISEL.B.IST5EUD = input;
1440 }
1441
1442
1443 IFX_INLINE void IfxGpt12_T5_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input)
1444 {
1445 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, input <= 1); /* wrong selection */
1446 gpt12->PISEL.B.IST5IN = input;
1447 }
1448
1449
1450 IFX_INLINE void IfxGpt12_T5_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
1451 {
1452 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, mode <= IfxGpt12_Mode_highGatedTimer); /* wrong selection */
1453 gpt12->T5CON.B.T5M = mode;
1454 }
1455
1456
1457 IFX_INLINE void IfxGpt12_T5_setRemoteControl(Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control)
1458 {
1459 gpt12->T5CON.B.T5RC = control;
1460 }
1461
1462
1463 IFX_INLINE void IfxGpt12_T5_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
1464 {
1465 gpt12->T5CON.B.T5UD = direction;
1466 }
1467
1468
1469 IFX_INLINE void IfxGpt12_T5_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
1470 {
1471 gpt12->T5CON.B.T5I = inputPrescaler;
1472 }
1473
1474
1475 IFX_INLINE void IfxGpt12_T5_setTimerValue(Ifx_GPT12 *gpt12, uint16 value)
1476 {
1477 gpt12->T5.U = value;
1478 }
1479
1480
1481 IFX_INLINE void IfxGpt12_T6_enableClearTimer(Ifx_GPT12 *gpt12, boolean enabled)
1482 {
1483 gpt12->T6CON.B.T6CLR = enabled ? 1 : 0;
1484 }
1485
1486
1487 IFX_INLINE IfxGpt12_Mode IfxGpt12_T6_getMode(Ifx_GPT12 *gpt12)
1488 {
1489 return (IfxGpt12_Mode)gpt12->T6CON.B.T6M;
1490 }
1491
1492
1493 IFX_INLINE volatile Ifx_SRC_SRCR *IfxGpt12_T6_getSrc(Ifx_GPT12 *gpt12)
1494 {
1495 IFX_UNUSED_PARAMETER(gpt12)
1496 return &MODULE_SRC.GPT12.GPT12[0].T6;
1497 }
1498
1499
1500 IFX_INLINE uint16 IfxGpt12_T6_getTimerValue(Ifx_GPT12 *gpt12)
1501 {
1502 return (uint16)gpt12->T6.U;
1503 }
1504
1505
1506 IFX_INLINE void IfxGpt12_T6_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
1507 {
1508 gpt12->T6CON.B.T6R = runTimer;
1509 }
1510
1511
1512 IFX_INLINE void IfxGpt12_T6_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
1513 {
1514 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, inputMode <= IfxGpt12_CounterInputMode_bothEdgesTxIN); /* wrong selection */
1515 gpt12->T6CON.B.T6I = inputMode;
1516 }
1517
1518
1519 IFX_INLINE void IfxGpt12_T6_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
1520 {
1521 gpt12->T6CON.B.T6UDE = source;
1522 }
1523
1524
1525 IFX_INLINE void IfxGpt12_T6_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
1526 {
1527 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, input <= 1); /* wrong selection */
1528 gpt12->PISEL.B.IST6EUD = input;
1529 }
1530
1531
1532 IFX_INLINE void IfxGpt12_T6_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input)
1533 {
1534 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, input <= 1); /* wrong selection */
1535 gpt12->PISEL.B.IST6IN = input;
1536 }
1537
1538
1539 IFX_INLINE void IfxGpt12_T6_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
1540 {
1541 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, mode <= IfxGpt12_Mode_highGatedTimer); /* wrong selection */
1542 gpt12->T6CON.B.T6M = mode;
1543 }
1544
1545
1546 IFX_INLINE void IfxGpt12_T6_setReloadMode(Ifx_GPT12 *gpt12, IfxGpt12_TimerReloadMode mode)
1547 {
1548 gpt12->T6CON.B.T6SR = mode;
1549 }
1550
1551
1552 IFX_INLINE void IfxGpt12_T6_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
1553 {
1554 gpt12->T6CON.B.T6UD = direction;
1555 }
1556
1557
1558 IFX_INLINE void IfxGpt12_T6_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
1559 {
1560 gpt12->T6CON.B.T6I = inputPrescaler;
1561 }
1562
1563
1564 IFX_INLINE void IfxGpt12_T6_setTimerValue(Ifx_GPT12 *gpt12, uint16 value)
1565 {
1566 gpt12->T6.U = value;
1567 }
1568
1569
1570 IFX_INLINE volatile Ifx_SRC_SRCR *IfxGpt12_getCaptureSrc(Ifx_GPT12 *gpt12)
1571 {
1572 IFX_UNUSED_PARAMETER(gpt12)
1573 return &MODULE_SRC.GPT12.GPT12[0].CIRQ;
1574 }
1575
1576
1577 IFX_INLINE float32 IfxGpt12_getModuleFrequency(Ifx_GPT12 *gpt12)
1578 {
1579 IFX_UNUSED_PARAMETER(gpt12)
1580 return IfxScuCcu_getSpbFrequency();
1581 }
1582
1583
1584 IFX_INLINE void IfxGpt12_initCapInPin(const IfxGpt12_TxIn_In *capIn, IfxPort_InputMode inputMode)
1585 {
1586 IfxPort_setPinModeInput(capIn->pin.port, capIn->pin.pinIndex, inputMode);
1587 IfxGpt12_setCaptureInput(capIn->module, (IfxGpt12_CaptureInput)capIn->select);
1588 }
1589
1590
1591 IFX_INLINE void IfxGpt12_initCapInPinWithPadLevel(const IfxGpt12_TxIn_In *capIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
1592 {
1593 IfxPort_setPinModeInput(capIn->pin.port, capIn->pin.pinIndex, inputMode);
1594 IfxPort_setPinPadDriver(capIn->pin.port, capIn->pin.pinIndex, padDriver);
1595 IfxGpt12_setCaptureInput(capIn->module, (IfxGpt12_CaptureInput)capIn->select);
1596 }
1597
1598
1599 IFX_INLINE void IfxGpt12_initTxOutPin(const IfxGpt12_TxOut_Out *txOut, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
1600 {
1601 IfxPort_setPinModeOutput(txOut->pin.port, txOut->pin.pinIndex, outputMode, txOut->select);
1602 IfxPort_setPinPadDriver(txOut->pin.port, txOut->pin.pinIndex, padDriver);
1603 }
1604
1605
1606 IFX_INLINE boolean IfxGpt12_isModuleSuspended(Ifx_GPT12 *gpt12)
1607 {
1608 Ifx_GPT12_OCS ocs;
1609
1610 // read the status
1611 ocs.U = gpt12->OCS.U;
1612
1613 // return the status
1614 return ocs.B.SUSSTA;
1615 }
1616
1617
1618 IFX_INLINE void IfxGpt12_setCaptureInput(Ifx_GPT12 *gpt12, IfxGpt12_CaptureInput input)
1619 {
1620 gpt12->PISEL.B.ISCAPIN = input;
1621 }
1622
1623
1624 IFX_INLINE void IfxGpt12_setCaptureReload(Ifx_GPT12 *gpt12, IfxGpt12_SleepMode value)
1625 {
1626 gpt12->CAPREL.B.CAPREL = value;
1627 }
1628
1629
1630 IFX_INLINE void IfxGpt12_setGpt1BlockPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_Gpt1BlockPrescaler bps1)
1631 {
1632 gpt12->T3CON.B.BPS1 = bps1;
1633 }
1634
1635
1636 IFX_INLINE void IfxGpt12_setGpt2BlockPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_Gpt2BlockPrescaler bps2)
1637 {
1638 gpt12->T6CON.B.BPS2 = bps2;
1639 }
1640
1641
1642 IFX_INLINE void IfxGpt12_setSleepMode(Ifx_GPT12 *gpt12, IfxGpt12_SleepMode mode)
1643 {
1644 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
1645 IfxScuWdt_clearCpuEndinit(passwd);
1646 gpt12->CLC.B.EDIS = mode;
1647 IfxScuWdt_setCpuEndinit(passwd);
1648 }
1649
1650
1651 IFX_INLINE void IfxGpt12_setSuspendMode(Ifx_GPT12 *gpt12, IfxGpt12_SuspendMode mode)
1652 {
1653 Ifx_GPT12_OCS ocs;
1654
1655 // remove protection and configure the suspend mode.
1656 ocs.B.SUS_P = 1;
1657 ocs.B.SUS = mode;
1658 gpt12->OCS.U = ocs.U;
1659 }
1660
1661
1662 #endif /* IFXGPT12_H */
IfxGpt12_T5_setTimerValue
IFX_INLINE void IfxGpt12_T5_setTimerValue(Ifx_GPT12 *gpt12, uint16 value)
Sets value for the T5 timer.
Definition: IfxGpt12.h:1475
IfxGpt12_Mode_highGatedTimer
High Gated Timer Mode selected.
Definition: IfxGpt12.h:191
IfxGpt12_T4_setInput
IFX_INLINE void IfxGpt12_T4_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T4 timer.
Definition: IfxGpt12.h:1327
IfxGpt12_T3_enableOutput
IFX_INLINE void IfxGpt12_T3_enableOutput(Ifx_GPT12 *gpt12, boolean enable)
Enable / Disable the T3 Output on pin T3OUT.
Definition: IfxGpt12.h:1173
IfxGpt12_initCapInPinWithPadLevel
IFX_INLINE void IfxGpt12_initCapInPinWithPadLevel(const IfxGpt12_TxIn_In *capIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CAPIN pin direction as input and configuring pad driver...
Definition: IfxGpt12.h:1591
IfxGpt12_TimerRemoteControl_off
T2 RemoteControl Off.
Definition: IfxGpt12.h:277
IfxGpt12_T4_setReloadInputMode
IFX_INLINE void IfxGpt12_T4_setReloadInputMode(Ifx_GPT12 *gpt12, IfxGpt12_ReloadInputMode inputMode)
Sets the input edge selection for the reload mode of the T4 timer.
Definition: IfxGpt12.h:1345
IfxScuCcu_getSpbFrequency
float32 IfxScuCcu_getSpbFrequency(void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider...
Definition: IfxScuCcu.c:479
IfxGpt12_T3_setMode
IFX_INLINE void IfxGpt12_T3_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T3 timer.
Definition: IfxGpt12.h:1235
IfxGpt12_setSuspendMode
IFX_INLINE void IfxGpt12_setSuspendMode(Ifx_GPT12 *gpt12, IfxGpt12_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and...
Definition: IfxGpt12.h:1651
IfxGpt12_Gpt2BlockPrescaler_4
fGPT/4
Definition: IfxGpt12.h:155
IfxGpt12_ReloadInputMode_bothEdgesTxOTL
rising or falling edge of Tx toggle latch TxOTL
Definition: IfxGpt12.h:209
IfxGpt12_CounterInputMode_counterDisabled
Counter Tx is disabled.
Definition: IfxGpt12.h:119
IfxGpt12_T2_setInput
IFX_INLINE void IfxGpt12_T2_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T2 timer.
Definition: IfxGpt12.h:1124
IfxGpt12_TxIn_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxGpt12_PinMap.h:78
IfxGpt12_initTxEudInPin
IFX_EXTERN void IfxGpt12_initTxEudInPin(const IfxGpt12_TxEud_In *txEudIn, IfxPort_InputMode inputMode)
Initializes a TxEUDIn_IN input.
Definition: IfxGpt12.c:275
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxGpt12_initTxOutPin
IFX_INLINE void IfxGpt12_initTxOutPin(const IfxGpt12_TxOut_Out *txOut, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a SLSO output.
Definition: IfxGpt12.h:1599
IfxGpt12_Gpt1BlockPrescaler_4
fGPT/4
Definition: IfxGpt12.h:145
IfxGpt12_T4_setEudInput
IFX_INLINE void IfxGpt12_T4_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T4 timer.
Definition: IfxGpt12.h:1315
IfxGpt12_Input
IfxGpt12_Input
Input Select for TxIN Definition in IfxGPT12.PISEL.B.ISTxIN (x = 2 to 4)
Definition: IfxGpt12.h:175
IfxGpt12_T3_getSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxGpt12_T3_getSrc(Ifx_GPT12 *gpt12)
Returns the address of Timer 3 service request.
Definition: IfxGpt12.h:1185
IfxGpt12_setCaptureReload
IFX_INLINE void IfxGpt12_setCaptureReload(Ifx_GPT12 *gpt12, IfxGpt12_SleepMode value)
Sets the sensitivity of the module to sleep signal.
Definition: IfxGpt12.h:1624
IfxGpt12_CaptureInputMode_none
None, Counter is disabled.
Definition: IfxGpt12.h:88
IfxGpt12_initCapInPin
IFX_INLINE void IfxGpt12_initCapInPin(const IfxGpt12_TxIn_In *capIn, IfxPort_InputMode inputMode)
Initializes a Capin_In input.
Definition: IfxGpt12.h:1584
IfxGpt12_EudInput
IfxGpt12_EudInput
Input Select for TxEUD Definition in IfxGPT12.PISEL.B.ISTxEUD (x = 2 to 4)
Definition: IfxGpt12.h:131
IfxGpt12_T2_setTimerDirection
IFX_INLINE void IfxGpt12_T2_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
Sets the T2 timer count direction.
Definition: IfxGpt12.h:1155
IfxGpt12_TimerInputPrescaler
IfxGpt12_TimerInputPrescaler
Input prescaler Selection for the timer Definition in IfxGPT12.TxCON.B.TxI (x = 2 to 4) ...
Definition: IfxGpt12.h:251
IfxGpt12_T6_getSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxGpt12_T6_getSrc(Ifx_GPT12 *gpt12)
Returns the address of Timer 6 service request.
Definition: IfxGpt12.h:1493
IfxGpt12_T5_enableClearTimer
IFX_INLINE void IfxGpt12_T5_enableClearTimer(Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the clear timer bit of the T5 timer.
Definition: IfxGpt12.h:1375
IfxGpt12_Mode_lowGatedTimer
Low Gated Timer Mode selected.
Definition: IfxGpt12.h:190
IfxGpt12_T2_setCaptureInputMode
IFX_INLINE void IfxGpt12_T2_setCaptureInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CaptureInputMode inputMode)
Sets the input edge selection for the capture mode of the T2 timer.
Definition: IfxGpt12.h:1093
IfxGpt12_ReloadInputMode_fallingEdgeTxOTL
falling edge of Tx toggle latch TxOTL
Definition: IfxGpt12.h:208
IfxGpt12_TxEud_In
TxEUD pin mapping structure.
Definition: IfxGpt12_PinMap.h:64
IfxGpt12_T4_setRemoteControl
IFX_INLINE void IfxGpt12_T4_setRemoteControl(Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control)
Sets the remote control of the T4 timer.
Definition: IfxGpt12.h:1351
IfxGpt12_T6_getMode
IFX_INLINE IfxGpt12_Mode IfxGpt12_T6_getMode(Ifx_GPT12 *gpt12)
Returns the operating mode of the T6 timer.
Definition: IfxGpt12.h:1487
IfxGpt12_ReloadInputMode_risingEdgeTxIN
rising edge on TxIN
Definition: IfxGpt12.h:204
IfxGpt12_T6_getTimerValue
IFX_INLINE uint16 IfxGpt12_T6_getTimerValue(Ifx_GPT12 *gpt12)
Returns the timer value of the T6 timer.
Definition: IfxGpt12.h:1500
IfxGpt12_T3_getMode
IFX_INLINE IfxGpt12_Mode IfxGpt12_T3_getMode(Ifx_GPT12 *gpt12)
Returns the operating mode of the T3 timer.
Definition: IfxGpt12.h:1179
IfxGpt12_Mode_counter
Counter Mode selected.
Definition: IfxGpt12.h:189
IfxGpt12_T6_getFrequency
IFX_EXTERN float32 IfxGpt12_T6_getFrequency(Ifx_GPT12 *gpt12)
Returns the frequency of the T6 timer.
Definition: IfxGpt12.c:216
IfxGpt12_resetModule
IFX_EXTERN void IfxGpt12_resetModule(Ifx_GPT12 *gpt12)
resets GPT12 kernel
Definition: IfxGpt12.c:385
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:140
IfxGpt12_T2_getFrequency
IFX_EXTERN float32 IfxGpt12_T2_getFrequency(Ifx_GPT12 *gpt12)
Returns the frequency of the T2 timer.
Definition: IfxGpt12.c:52
IfxGpt12_TimerRemoteControl_on
T2 RemoteControl On.
Definition: IfxGpt12.h:278
IfxGpt12_SuspendMode_none
No suspend.
Definition: IfxGpt12.h:225
IfxGpt12_CaptureInput_C
signal CAPINC selected
Definition: IfxGpt12.h:80
float32
float float32
Definition: Platform_Types.h:170
IfxGpt12_T3_getTimerValue
IFX_INLINE uint16 IfxGpt12_T3_getTimerValue(Ifx_GPT12 *gpt12)
Returns the timer value of the T3 timer.
Definition: IfxGpt12.h:1192
IfxGpt12_T5_setCaptureTriggerMode
IFX_INLINE void IfxGpt12_T5_setCaptureTriggerMode(Ifx_GPT12 *gpt12, IfxGpt12_CaptureTriggerMode mode)
Sets the capture trigger mode of the T5 timer.
Definition: IfxGpt12.h:1418
Ifx_Assert.h
Assert functions.
IfxGpt12_initTxInPinWithPadLevel
IFX_EXTERN void IfxGpt12_initTxInPinWithPadLevel(const IfxGpt12_TxIn_In *txIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of TXIN pin direction as input and configuring pad driver...
Definition: IfxGpt12.c:357
IfxGpt12_TimerDirectionSource_external
Timer Dir Control = TxUD (x=2,3,4)
Definition: IfxGpt12.h:245
IfxGpt12_SleepMode_enable
enables sleep mode
Definition: IfxGpt12.h:217
IfxGpt12_T4_getSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxGpt12_T4_getSrc(Ifx_GPT12 *gpt12)
Returns the address of Timer 4 service request.
Definition: IfxGpt12.h:1278
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:322
IfxGpt12_T5_setTimerPrescaler
IFX_INLINE void IfxGpt12_T5_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
Sets the input prescaler for the Timer mode and Gated timer mode of T5 timer.
Definition: IfxGpt12.h:1469
IfxGpt12_CaptureTriggerMode_disabled
capture disabled
Definition: IfxGpt12.h:108
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxGpt12_T2_setReloadInputMode
IFX_INLINE void IfxGpt12_T2_setReloadInputMode(Ifx_GPT12 *gpt12, IfxGpt12_ReloadInputMode inputMode)
Sets the input edge selection for the reload mode of the T2 timer.
Definition: IfxGpt12.h:1143
IfxSrc.h
SRC basic functionality.
IfxGpt12_T3_setTimerDirection
IFX_INLINE void IfxGpt12_T3_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
Sets the T3 timer count direction.
Definition: IfxGpt12.h:1242
IfxGpt12_T3_setTimerValue
IFX_INLINE void IfxGpt12_T3_setTimerValue(Ifx_GPT12 *gpt12, uint16 value)
Sets value for the T3 Timer.
Definition: IfxGpt12.h:1254
IfxGpt12_T5_setCounterInputMode
IFX_INLINE void IfxGpt12_T5_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
Sets the input edge selection for the counter mode of the T5 timer.
Definition: IfxGpt12.h:1424
IfxGpt12_setGpt2BlockPrescaler
IFX_INLINE void IfxGpt12_setGpt2BlockPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_Gpt2BlockPrescaler bps2)
Sets the GPT2 block prescaler.
Definition: IfxGpt12.h:1636
IfxGpt12_setCaptureInput
IFX_INLINE void IfxGpt12_setCaptureInput(Ifx_GPT12 *gpt12, IfxGpt12_CaptureInput input)
Sets the capture input.
Definition: IfxGpt12.h:1618
IfxGpt12_T4_setTimerValue
IFX_INLINE void IfxGpt12_T4_setTimerValue(Ifx_GPT12 *gpt12, uint16 value)
Sets value for the T4 timer.
Definition: IfxGpt12.h:1369
IfxGpt12_T6_setDirectionSource
IFX_INLINE void IfxGpt12_T6_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
sets the T6 timer count direction source internal / external
Definition: IfxGpt12.h:1519
IfxGpt12_T4_setTimerDirection
IFX_INLINE void IfxGpt12_T4_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
Sets the T4 timer count direction.
Definition: IfxGpt12.h:1357
IfxGpt12_CaptureInputMode
IfxGpt12_CaptureInputMode
Tx Input Edge Selection (Capture Mode, x=2,4)
Definition: IfxGpt12.h:86
IfxGpt12_T6_setReloadMode
IFX_INLINE void IfxGpt12_T6_setReloadMode(Ifx_GPT12 *gpt12, IfxGpt12_TimerReloadMode mode)
sets the T6 timer count direction
Definition: IfxGpt12.h:1546
IfxGpt12_CaptureInput
IfxGpt12_CaptureInput
Input Select for CAPIN Definition in IfxGPT12.PISEL.B.ISCAPIN.
Definition: IfxGpt12.h:76
IfxPort_setPinModeInput
IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode.
Definition: IfxPort.h:669
IfxGpt12_T2_setTimerPrescaler
IFX_INLINE void IfxGpt12_T2_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
Sets the input prescaler for the Timer mode and Gated timer mode of T2 timer.
Definition: IfxGpt12.h:1161
IfxGpt12_T4_getMode
IFX_INLINE IfxGpt12_Mode IfxGpt12_T4_getMode(Ifx_GPT12 *gpt12)
Returns the operating mode of the T4 timer.
Definition: IfxGpt12.h:1272
IfxGpt12_TimerInputPrescaler_4
Definition: IfxGpt12.h:255
IfxGpt12_Gpt2BlockPrescaler
IfxGpt12_Gpt2BlockPrescaler
Gpt2 block prescaler Selection Definition in IfxGPT12.T6CON.B.BPS2.
Definition: IfxGpt12.h:153
IfxGpt12_TimerDirection_down
Timer Down Direction selected.
Definition: IfxGpt12.h:236
IfxGpt12_Mode_capture
Capture Mode selected.
Definition: IfxGpt12.h:193
IfxGpt12_PinMap.h
GPT12 I/O map.
IfxGpt12_T4_setDirectionSource
IFX_INLINE void IfxGpt12_T4_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
Sets the T4 timer count direction source internal / external.
Definition: IfxGpt12.h:1309
IfxGpt12_EudInput_B
signal TXEUDB selected
Definition: IfxGpt12.h:134
IfxGpt12_TxOut_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxGpt12_PinMap.h:87
IfxGpt12_T2_run
IFX_INLINE void IfxGpt12_T2_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T2 Timer.
Definition: IfxGpt12.h:1087
IfxGpt12_ReloadInputMode
IfxGpt12_ReloadInputMode
Input Edge Selection for reload mode Definition in IfxGPT12.TxCON.B.TxI (x = 2 and 4) ...
Definition: IfxGpt12.h:201
IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxINOrTxEUD
(rising or falling edge) on any Tx input (TxIN or TxEUD)
Definition: IfxGpt12.h:169
IfxGpt12_CounterInputMode_risingEdgeTxIN
rising edge on TxIN
Definition: IfxGpt12.h:120
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxGpt12_disableModule
IFX_EXTERN void IfxGpt12_disableModule(Ifx_GPT12 *gpt12)
Disables the module.
Definition: IfxGpt12.c:257
IfxGpt12_T3_run
IFX_INLINE void IfxGpt12_T3_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T3 Timer.
Definition: IfxGpt12.h:1198
IfxGpt12_Input_B
signal TXINB selected
Definition: IfxGpt12.h:178
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxGpt12_getModuleFrequency
IFX_INLINE float32 IfxGpt12_getModuleFrequency(Ifx_GPT12 *gpt12)
Returns the gpt12 module frequency.
Definition: IfxGpt12.h:1577
IfxGpt12_Gpt1BlockPrescaler_32
fGPT/32
Definition: IfxGpt12.h:146
IfxGpt12_Gpt1BlockPrescaler_8
fGPT/8
Definition: IfxGpt12.h:144
IfxGpt12_T6_setMode
IFX_INLINE void IfxGpt12_T6_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T6 timer.
Definition: IfxGpt12.h:1539
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxGpt12_Gpt2BlockPrescaler_16
fGPT/16
Definition: IfxGpt12.h:157
IfxGpt12_TxOut_Out
TxOUT pin mapping structure.
Definition: IfxGpt12_PinMap.h:82
IfxGpt12_setSleepMode
IFX_INLINE void IfxGpt12_setSleepMode(Ifx_GPT12 *gpt12, IfxGpt12_SleepMode mode)
Sets the sensitivity of the module to sleep signal.
Definition: IfxGpt12.h:1642
IfxGpt12_T5_setRemoteControl
IFX_INLINE void IfxGpt12_T5_setRemoteControl(Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control)
Sets the remote control of the T5 timer.
Definition: IfxGpt12.h:1457
IfxGpt12_getCaptureSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxGpt12_getCaptureSrc(Ifx_GPT12 *gpt12)
Returns the address of capture service request.
Definition: IfxGpt12.h:1570
IfxGpt12_Gpt2BlockPrescaler_2
fGPT/2
Definition: IfxGpt12.h:156
IfxGpt12_Mode_incrementalInterfaceEdgeDetection
Incremental Interface Mode selected.
Definition: IfxGpt12.h:195
IfxGpt12_CaptureTriggerMode_fallingEdge
negative Transition on CAPIN or any Transition on T3EUD
Definition: IfxGpt12.h:110
IfxGpt12_EudInput_C
signal TXEUDC selected
Definition: IfxGpt12.h:135
IfxGpt12_SuspendMode
IfxGpt12_SuspendMode
OCDS Suspend Control (OCDS.SUS)
Definition: IfxGpt12.h:223
IfxGpt12_ReloadInputMode_counterDisabled
Counter Tx is disabled.
Definition: IfxGpt12.h:203
IfxGpt12_T5_getMode
IFX_INLINE IfxGpt12_Mode IfxGpt12_T5_getMode(Ifx_GPT12 *gpt12)
Returns the operating mode of the T5 timer.
Definition: IfxGpt12.h:1381
IfxGpt12_T2_setTimerValue
IFX_INLINE void IfxGpt12_T2_setTimerValue(Ifx_GPT12 *gpt12, uint16 value)
Sets value for the T2 timer.
Definition: IfxGpt12.h:1167
IfxGpt12_T4_enableClearTimerT3
IFX_INLINE void IfxGpt12_T4_enableClearTimerT3(Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the clear timer T3 bit of the T4 timer.
Definition: IfxGpt12.h:1266
IfxGpt12_Gpt2BlockPrescaler_8
fGPT/8
Definition: IfxGpt12.h:158
IfxGpt12_Mode
IfxGpt12_Mode
Timer operating mode Definition in IfxGPT12.TxCON.B.TxM (x = 2 to 4)
Definition: IfxGpt12.h:186
IfxGpt12_TimerReloadMode
IfxGpt12_TimerReloadMode
Timer Reload Mode Definition in IfxGPT12.T6CON.B.T6SR.
Definition: IfxGpt12.h:266
IfxGpt12_CaptureTrigger_t3inOrT3EUD
Capture Trigger Enable from T3IN/T3EUD.
Definition: IfxGpt12.h:100
IfxGpt12_T6_setInput
IFX_INLINE void IfxGpt12_T6_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T6 timer.
Definition: IfxGpt12.h:1532
IfxGpt12_TimerInputPrescaler_8
Definition: IfxGpt12.h:256
IfxGpt12_T5_getTimerValue
IFX_INLINE uint16 IfxGpt12_T5_getTimerValue(Ifx_GPT12 *gpt12)
Returns the timer value of the T5 timer.
Definition: IfxGpt12.h:1394
IfxGpt12_T4_setMode
IFX_INLINE void IfxGpt12_T4_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T4 timer.
Definition: IfxGpt12.h:1339
IfxGpt12_Input_C
signal TXINC selected
Definition: IfxGpt12.h:179
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:249
IfxGpt12_CaptureInput_A
signal CAPINA selected
Definition: IfxGpt12.h:78
IfxGpt12_T2_setInterruptEnable
IFX_INLINE void IfxGpt12_T2_setInterruptEnable(Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the interrupt generation of the T2 timer.
Definition: IfxGpt12.h:1131
IfxGpt12_Gpt1BlockPrescaler
IfxGpt12_Gpt1BlockPrescaler
GPT1 block prescaler Selection Definition in IfxGPT12.T3CON.B.BPS1.
Definition: IfxGpt12.h:142
IfxGpt12_T5_setTimerDirection
IFX_INLINE void IfxGpt12_T5_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
Sets the T5 timer count direction.
Definition: IfxGpt12.h:1463
IfxGpt12_CaptureInput_D
signal CAPIND selected
Definition: IfxGpt12.h:81
IfxGpt12_ReloadInputMode_bothEdgesTxIN
rising or falling edge on TxIN
Definition: IfxGpt12.h:206
IfxGpt12_TimerReloadMode_disable
Reload mode disabled.
Definition: IfxGpt12.h:268
IfxGpt12_T4_getTimerValue
IFX_INLINE uint16 IfxGpt12_T4_getTimerValue(Ifx_GPT12 *gpt12)
Returns the timer value of the T4 timer.
Definition: IfxGpt12.h:1285
IfxGpt12_TimerInputPrescaler_16
Definition: IfxGpt12.h:257
IfxGpt12_T3_setCounterInputMode
IFX_INLINE void IfxGpt12_T3_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
Sets the input edge selection for the counter mode of the T3 timer.
Definition: IfxGpt12.h:1204
IfxGpt12_T6_setCounterInputMode
IFX_INLINE void IfxGpt12_T6_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
Sets the input edge selection for the counter mode of the T6 timer.
Definition: IfxGpt12.h:1512
IfxGpt12_CaptureTriggerMode
IfxGpt12_CaptureTriggerMode
Capture Trigger Selection Definition in IfxGPT12.T5CON.B.CI.
Definition: IfxGpt12.h:106
IfxGpt12_CounterInputMode_bothEdgesTxIN
rising or falling edge on TxIN
Definition: IfxGpt12.h:122
IfxGpt12_CaptureInputMode_fallingEdgeTxIN
falling edge on TxIN
Definition: IfxGpt12.h:90
IfxGpt12_T2_setCounterInputMode
IFX_INLINE void IfxGpt12_T2_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
Sets the input edge selection for the counter mode of the T2 timer.
Definition: IfxGpt12.h:1099
IfxGpt12_TxIn_In
TxIN pin mapping structure.
Definition: IfxGpt12_PinMap.h:73
IfxGpt12_T2_setEudInput
IFX_INLINE void IfxGpt12_T2_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T2 timer.
Definition: IfxGpt12.h:1111
IfxGpt12_T3_setEudInput
IFX_INLINE void IfxGpt12_T3_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T3 timer.
Definition: IfxGpt12.h:1217
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:151
IfxGpt12_T4_setCaptureInputMode
IFX_INLINE void IfxGpt12_T4_setCaptureInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CaptureInputMode inputMode)
Sets the input edge selection for the capture mode of the T4 timer.
Definition: IfxGpt12.h:1297
IfxGpt12_T4_setTimerPrescaler
IFX_INLINE void IfxGpt12_T4_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
Sets the input prescaler for the Timer mode and Gated timer mode of T4 timer.
Definition: IfxGpt12.h:1363
IfxGpt12_T4_enableClearTimerT2
IFX_INLINE void IfxGpt12_T4_enableClearTimerT2(Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the clear timer T2 bit of the T4 timer.
Definition: IfxGpt12.h:1260
IfxGpt12_TimerRun_start
Timer X Run.
Definition: IfxGpt12.h:287
IfxGpt12_IncrementalInterfaceInputMode
IfxGpt12_IncrementalInterfaceInputMode
Input Edge Selection for Incremental Interface mode Definition in IfxGPT12.TxCON.B.TxI (x=2, 3 and 4)
Definition: IfxGpt12.h:164
IfxGpt12_T4_setIncrementalInterfaceInputMode
IFX_INLINE void IfxGpt12_T4_setIncrementalInterfaceInputMode(Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode)
Sets the input edge selection for the incremental interface mode of the T4 timer. ...
Definition: IfxGpt12.h:1321
IfxGpt12_T5_setCaptureTriggerEnable
IFX_INLINE void IfxGpt12_T5_setCaptureTriggerEnable(Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the capture trigger of the T5 timer.
Definition: IfxGpt12.h:1412
IfxGpt12_TimerInputPrescaler_128
Definition: IfxGpt12.h:260
IfxGpt12_CaptureTrigger
IfxGpt12_CaptureTrigger
Capture Trigger Enable Definition in IfxGPT12.T5CON.B.CT3.
Definition: IfxGpt12.h:97
IfxGpt12_Mode_incrementalInterfaceRotationDetection
Incremental Interface Mode selected.
Definition: IfxGpt12.h:194
IfxGpt12_CaptureTrigger_capin
Capture Trigger Enable from CAPIN.
Definition: IfxGpt12.h:99
IfxGpt12_Input_A
signal TXINA selected
Definition: IfxGpt12.h:177
IfxGpt12_CaptureInputMode_risingEdgeTxIN
rising edge on TxIN
Definition: IfxGpt12.h:89
IfxGpt12_CounterInputMode_risingEdgeTxOTL
rising edge of TxOTL (x=3,6)
Definition: IfxGpt12.h:123
IfxGpt12_T3_setTimerPrescaler
IFX_INLINE void IfxGpt12_T3_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
Sets the input prescaler for the Timer mode and Gated timer mode of T3 timer.
Definition: IfxGpt12.h:1248
IfxGpt12_EudInput_D
signal TXEUDD selected
Definition: IfxGpt12.h:136
IfxGpt12_initTxInPin
IFX_EXTERN void IfxGpt12_initTxInPin(const IfxGpt12_TxIn_In *txIn, IfxPort_InputMode inputMode)
Initializes a TxIn input.
Definition: IfxGpt12.c:330
IfxGpt12_T5_setDirectionSource
IFX_INLINE void IfxGpt12_T5_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
Sets the T5 timer count direction source internal / external.
Definition: IfxGpt12.h:1430
IfxGpt12_Gpt1BlockPrescaler_16
fGPT/16
Definition: IfxGpt12.h:147
IfxGpt12_IncrementalInterfaceInputMode_stopCounterTx
Counter Tx Stop.
Definition: IfxGpt12.h:166
IfxGpt12_T2_setRemoteControl
IFX_INLINE void IfxGpt12_T2_setRemoteControl(Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control)
Sets the remote control of the T2 timer.
Definition: IfxGpt12.h:1149
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxGpt12_enableModule
IFX_EXTERN void IfxGpt12_enableModule(Ifx_GPT12 *gpt12)
Enables the module.
Definition: IfxGpt12.c:266
IfxGpt12_setGpt1BlockPrescaler
IFX_INLINE void IfxGpt12_setGpt1BlockPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_Gpt1BlockPrescaler bps1)
Sets the GPT1 block prescaler.
Definition: IfxGpt12.h:1630
IfxGpt12_T6_enableClearTimer
IFX_INLINE void IfxGpt12_T6_enableClearTimer(Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the clear timer bit of the T6 timer.
Definition: IfxGpt12.h:1481
IfxGpt12_T6_setTimerPrescaler
IFX_INLINE void IfxGpt12_T6_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
Sets the input prescaler for the Timer mode and Gated timer mode of T6 timer.
Definition: IfxGpt12.h:1558
IfxGpt12_T6_setTimerDirection
IFX_INLINE void IfxGpt12_T6_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
sets the T6 timer count direction
Definition: IfxGpt12.h:1552
IfxGpt12_TimerReloadMode_enable
Reload mode enabled.
Definition: IfxGpt12.h:269
IfxGpt12_TimerRun_stop
Timer x Stops.
Definition: IfxGpt12.h:286
IfxGpt12_ReloadInputMode_fallingEdgeTxIN
falling edge on TxIN
Definition: IfxGpt12.h:205
IfxGpt12_T4_getFrequency
IFX_EXTERN float32 IfxGpt12_T4_getFrequency(Ifx_GPT12 *gpt12)
Returns the frequency of the T4 timer.
Definition: IfxGpt12.c:134
IfxGpt12_T6_setTimerValue
IFX_INLINE void IfxGpt12_T6_setTimerValue(Ifx_GPT12 *gpt12, uint16 value)
Sets value for the T6 timer.
Definition: IfxGpt12.h:1564
IfxGpt12_T6_setEudInput
IFX_INLINE void IfxGpt12_T6_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T6 timer.
Definition: IfxGpt12.h:1525
IfxScuCcu.h
SCU basic functionality.
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:81
IfxGpt12_CaptureInput_B
signal CAPINB selected
Definition: IfxGpt12.h:79
IfxGpt12_isModuleSuspended
IFX_INLINE boolean IfxGpt12_isModuleSuspended(Ifx_GPT12 *gpt12)
Returns the module&#39;s suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspende...
Definition: IfxGpt12.h:1606
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxGpt12_CaptureTriggerMode_randomEdge
Any Transition on CAPIN or any Transition on T3IN/T3EUD.
Definition: IfxGpt12.h:111
enable
void enable
Definition: IfxCpu_IntrinsicsDcc.h:477
IfxGpt12_Mode_reload
Reload Mode selected.
Definition: IfxGpt12.h:192
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:248
IfxGpt12_T4_setCounterInputMode
IFX_INLINE void IfxGpt12_T4_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
Sets the input edge selection for the counter mode of the T4 timer.
Definition: IfxGpt12.h:1303
IfxGpt12_T5_setCaptureTrigger
IFX_INLINE void IfxGpt12_T5_setCaptureTrigger(Ifx_GPT12 *gpt12, IfxGpt12_CaptureTrigger trigger)
Sets the capture trigger of teh T5 timer.
Definition: IfxGpt12.h:1406
IfxGpt12_T5_run
IFX_INLINE void IfxGpt12_T5_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T5 Timer.
Definition: IfxGpt12.h:1400
IfxGpt12_SleepMode_disable
disables sleep mode
Definition: IfxGpt12.h:218
IfxGpt12_TxIn_In::module
Ifx_GPT12 * module
Base address.
Definition: IfxGpt12_PinMap.h:75
IfxGpt12_T3_setInput
IFX_INLINE void IfxGpt12_T3_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T3 timer.
Definition: IfxGpt12.h:1229
IfxGpt12_T2_setMode
IFX_INLINE void IfxGpt12_T2_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T2 timer.
Definition: IfxGpt12.h:1137
IfxGpt12_T2_setIncrementalInterfaceInputMode
IFX_INLINE void IfxGpt12_T2_setIncrementalInterfaceInputMode(Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode)
Sets the input edge selection for the incremental interface mode of the T2 timer. ...
Definition: IfxGpt12.h:1118
IfxGpt12_T4_setInterruptEnable
IFX_INLINE void IfxGpt12_T4_setInterruptEnable(Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the interrupt generation of the T4 timer.
Definition: IfxGpt12.h:1333
IfxGpt12_T2_getTimerValue
IFX_INLINE uint16 IfxGpt12_T2_getTimerValue(Ifx_GPT12 *gpt12)
Returns the timer value of the T2 timer.
Definition: IfxGpt12.h:1081
IfxGpt12_TimerDirection
IfxGpt12_TimerDirection
Timer Count Direction Definition in IfxGPT12.TxCON.B.TxUD (x=2 to 6)
Definition: IfxGpt12.h:233
IfxGpt12_SleepMode
IfxGpt12_SleepMode
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_GPT12.CLC.B.EDIS.
Definition: IfxGpt12.h:215
IfxGpt12_CounterInputMode_fallingEdgeTxOTL
falling edge of TxOTL
Definition: IfxGpt12.h:124
IfxGpt12_ReloadInputMode_risingEdgeTxOTL
rising edge of Tx toggle latch TxOTL
Definition: IfxGpt12.h:207
IfxGpt12_T5_setEudInput
IFX_INLINE void IfxGpt12_T5_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T5 timer.
Definition: IfxGpt12.h:1436
IfxGpt12_CounterInputMode_fallingEdgeTxIN
falling edge on TxIN
Definition: IfxGpt12.h:121
IfxGpt12_TimerInputPrescaler_32
Definition: IfxGpt12.h:258
IfxGpt12_TimerInputPrescaler_1
Definition: IfxGpt12.h:253
IfxGpt12_Mode_timer
Timer Mode selected.
Definition: IfxGpt12.h:188
IfxGpt12_initTxEudInPinWithPadLevel
IFX_EXTERN void IfxGpt12_initTxEudInPinWithPadLevel(const IfxGpt12_TxEud_In *txEudIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of TXEUD pin direction as input and configuring pad driver...
Definition: IfxGpt12.c:302
IfxGpt12_EudInput_A
signal TXEUDA selected
Definition: IfxGpt12.h:133
IfxGpt12_T2_getMode
IFX_INLINE IfxGpt12_Mode IfxGpt12_T2_getMode(Ifx_GPT12 *gpt12)
Returns the operating mode of the T2 timer.
Definition: IfxGpt12.h:1068
IfxGpt12_TimerDirectionSource
IfxGpt12_TimerDirectionSource
Timer count direction control source Definition in IfxGPT12.TxCON.B.TxUDE (x=2 to 6) ...
Definition: IfxGpt12.h:242
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxGpt12_T5_getSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxGpt12_T5_getSrc(Ifx_GPT12 *gpt12)
Returns the address of Timer 5 service request.
Definition: IfxGpt12.h:1387
IfxGpt12_CounterInputMode
IfxGpt12_CounterInputMode
Input Edge Selection for counter mode Definition in IfxGPT12.TxCON.B.TxI (x = 2 to 6) ...
Definition: IfxGpt12.h:117
IfxGpt12_CaptureTriggerMode_risingEdge
positive Transition on CAPIN or any Transition on T3IN
Definition: IfxGpt12.h:109
IfxGpt12_T5_setMode
IFX_INLINE void IfxGpt12_T5_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T5 timer.
Definition: IfxGpt12.h:1450
IfxGpt12_T3_setIncrementalInterfaceInputMode
IFX_INLINE void IfxGpt12_T3_setIncrementalInterfaceInputMode(Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode)
Sets the input edge selection for the incremental interface mode of the T3 timer. ...
Definition: IfxGpt12.h:1223
IfxGpt12_cfg.h
GPT12 on-chip implementation data.
IfxGpt12_SuspendMode_hard
Hard Suspend.
Definition: IfxGpt12.h:226
IfxGpt12_T2_getSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxGpt12_T2_getSrc(Ifx_GPT12 *gpt12)
Returns the address of Timer 2 service request.
Definition: IfxGpt12.h:1074
IfxGpt12_T4_run
IFX_INLINE void IfxGpt12_T4_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T4 Timer.
Definition: IfxGpt12.h:1291
IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxIN
(rising or falling edge) on TxIN
Definition: IfxGpt12.h:167
IfxGpt12_TxIn_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxGpt12_PinMap.h:77
IfxGpt12_SuspendMode_soft
Soft Suspend.
Definition: IfxGpt12.h:227
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
IfxGpt12_T3_setDirectionSource
IFX_INLINE void IfxGpt12_T3_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
Sets the T3 timer count direction source internal / external.
Definition: IfxGpt12.h:1211
IfxGpt12_T5_setInput
IFX_INLINE void IfxGpt12_T5_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T5 timer.
Definition: IfxGpt12.h:1443
IfxGpt12_CaptureInputMode_bothEdgesTxIN
(rising or falling edge) on TxIN
Definition: IfxGpt12.h:91
IfxGpt12_TimerDirection_up
Timer Up Direction selected.
Definition: IfxGpt12.h:235
IfxGpt12_TimerRun
IfxGpt12_TimerRun
Timer Run / stop control choice (only if TxCON.B.TxRC = 0) Definition in IfxGPT12.TxCON.B.TxR (x = 2 to 6)
Definition: IfxGpt12.h:284
IfxGpt12_T3_getFrequency
IFX_EXTERN float32 IfxGpt12_T3_getFrequency(Ifx_GPT12 *gpt12)
Returns the frequency of the T3 timer.
Definition: IfxGpt12.c:93
IfxGpt12_Input_D
signal TXIND selected
Definition: IfxGpt12.h:180
IfxGpt12_TimerRemoteControl
IfxGpt12_TimerRemoteControl
Timer Remote Control enable choice Definition in IfxGPT12.TxCON.B.TxRC (x = 2 and 4) ...
Definition: IfxGpt12.h:275
IfxGpt12_TimerDirectionSource_internal
Timer Dir Control = TxUD (x=2,3,4)
Definition: IfxGpt12.h:244
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:675
IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxEUD
(rising or falling edge) on TxEUD
Definition: IfxGpt12.h:168
IfxGpt12_T5_getFrequency
IFX_EXTERN float32 IfxGpt12_T5_getFrequency(Ifx_GPT12 *gpt12)
Returns the frequency of the T5 timer.
Definition: IfxGpt12.c:175
IfxGpt12_TimerInputPrescaler_2
Definition: IfxGpt12.h:254
IfxGpt12_T2_setDirectionSource
IFX_INLINE void IfxGpt12_T2_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
Sets the T2 timer count direction source internal / external.
Definition: IfxGpt12.h:1105
IfxGpt12_TimerInputPrescaler_64
Definition: IfxGpt12.h:259
IfxGpt12_T6_run
IFX_INLINE void IfxGpt12_T6_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T6 Timer.
Definition: IfxGpt12.h:1506
IfxGpt12_CounterInputMode_bothEdgesTxOTL
rising or falling edge of TxOTL
Definition: IfxGpt12.h:125


iLLD_TC38A: IfxGpt12_IncrEnc.c Source File

  • Gpt12
  • IncrEnc
IfxGpt12_IncrEnc.c
Go to the documentation of this file.
1 /**
2 * \file IfxGpt12_IncrEnc.c
3 * \brief GPT12 INCRENC details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxGpt12_IncrEnc.h"
47
48 /******************************************************************************/
49 /*-----------------------Private Function Prototypes--------------------------*/
50 /******************************************************************************/
51
52 /** \brief Update internal data when incremental mode is using T2.\n
53 * This function shall be periodically called
54 * \param driver driver handle
55 * \return None
56 */
57 IFX_STATIC void IfxGpt12_IncrEnc_updateFromT2(IfxGpt12_IncrEnc *driver);
58
59 /** \brief Update internal data when incremental mode is using T3.\n
60 * This function shall be periodically called
61 * \param driver driver handle
62 * \return None
63 */
64 IFX_STATIC void IfxGpt12_IncrEnc_updateFromT3(IfxGpt12_IncrEnc *driver);
65
66 /** \brief Updates the speed
67 * \param driver driver handle
68 * \param newPosition new position
69 * \return None
70 */
71 IFX_STATIC void IfxGpt12_IncrEnc_updateSpeedFromT2(IfxGpt12_IncrEnc *driver, sint32 newPosition);
72
73 /** \brief Updates the speed
74 * \param driver driver handle
75 * \param newPosition new position
76 * \return None
77 */
78 IFX_STATIC void IfxGpt12_IncrEnc_updateSpeedFromT3(IfxGpt12_IncrEnc *driver, sint32 newPosition);
79
80 /******************************************************************************/
81 /*-------------------------Function Implementations---------------------------*/
82 /******************************************************************************/
83
84 float32 IfxGpt12_IncrEnc_getAbsolutePosition(IfxGpt12_IncrEnc *driver)
85 {
86 return ((float32)driver->turn + (float32)driver->rawPosition / (float32)driver->resolution) * 2.0 * IFX_PI;
87 }
88
89
90 IfxStdIf_Pos_Dir IfxGpt12_IncrEnc_getDirection(IfxGpt12_IncrEnc *driver)
91 {
92 return driver->direction;
93 }
94
95
96 IfxStdIf_Pos_Status IfxGpt12_IncrEnc_getFault(IfxGpt12_IncrEnc *driver)
97 {
98 return driver->status;
99 }
100
101
102 sint32 IfxGpt12_IncrEnc_getOffset(IfxGpt12_IncrEnc *driver)
103 {
104 return driver->offset;
105 }
106
107
108 uint16 IfxGpt12_IncrEnc_getPeriodPerRotation(IfxGpt12_IncrEnc *driver)
109 {
110 IFX_UNUSED_PARAMETER(driver)
111 return 1; /* Period per rotation is 1*/
112 }
113
114
115 float32 IfxGpt12_IncrEnc_getPosition(IfxGpt12_IncrEnc *driver)
116 {
117 return (float32)driver->rawPosition * driver->positionConst;
118 }
119
120
121 sint32 IfxGpt12_IncrEnc_getRawPosition(IfxGpt12_IncrEnc *driver)
122 {
123 return driver->rawPosition;
124 }
125
126
127 float32 IfxGpt12_IncrEnc_getRefreshPeriod(IfxGpt12_IncrEnc *driver)
128 {
129 return driver->updatePeriod;
130 }
131
132
133 sint32 IfxGpt12_IncrEnc_getResolution(IfxGpt12_IncrEnc *driver)
134 {
135 return driver->resolution;
136 }
137
138
139 IfxStdIf_Pos_SensorType IfxGpt12_IncrEnc_getSensorType(IfxGpt12_IncrEnc *driver)
140 {
141 IFX_UNUSED_PARAMETER(driver)
142 return IfxStdIf_Pos_SensorType_encoder;
143 }
144
145
146 float32 IfxGpt12_IncrEnc_getSpeed(IfxGpt12_IncrEnc *driver)
147 {
148 return driver->speed;
149 }
150
151
152 sint32 IfxGpt12_IncrEnc_getTurn(IfxGpt12_IncrEnc *driver)
153 {
154 return driver->turn;
155 }
156
157
158 boolean IfxGpt12_IncrEnc_init(IfxGpt12_IncrEnc *driver, const IfxGpt12_IncrEnc_Config *config)
159 {
160 boolean status = TRUE;
161 Ifx_GPT12 *gpt12 = config->module;
162
163 driver->module = gpt12;
164
165 driver->offset = config->base.offset;
166 driver->resolution = config->base.resolution * config->base.resolutionFactor;
167 driver->positionConst = 1.0 / (float32)driver->resolution * 2.0 * IFX_PI;
168 driver->speedModeThreshold = config->base.speedModeThreshold;
169 IfxGpt12_IncrEnc_setRefreshPeriod(driver, config->base.updatePeriod);
170
171 driver->status.status = 0;
172 driver->status.B.notSynchronised = 1;
173 driver->minSpeed = config->base.minSpeed;
174 driver->maxSpeed = config->base.maxSpeed;
175
176 driver->rawPosition = 0;
177 driver->speed = 0;
178 driver->direction = IfxStdIf_Pos_Dir_unknown;
179 driver->turn = 0;
180
181 if (config->pinA->timer == 3)
182 {
183 /* T3 Configuration */
184 IfxGpt12_T3_setMode(gpt12, IfxGpt12_Mode_incrementalInterfaceEdgeDetection);
185
186 switch (config->base.resolutionFactor)
187 {
188 case IfxStdIf_Pos_ResolutionFactor_twoFold:
189 IfxGpt12_T3_setIncrementalInterfaceInputMode(gpt12, IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxIN);
190 break;
191 case IfxStdIf_Pos_ResolutionFactor_fourFold:
192 IfxGpt12_T3_setIncrementalInterfaceInputMode(gpt12, IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxINOrTxEUD);
193 break;
194 default:
195 status = FALSE;
196 break;
197 }
198
199 IfxGpt12_T3_setDirectionSource(gpt12, IfxGpt12_TimerDirectionSource_external);
200 IfxGpt12_T3_setTimerDirection(gpt12, config->base.reversed ? IfxGpt12_TimerDirection_up : IfxGpt12_TimerDirection_down);
201 IfxGpt12_T3_enableOutput(gpt12, FALSE);
202 IfxGpt12_T3_run(gpt12, IfxGpt12_TimerRun_start);
203
204 if (config->pinZ != NULL_PTR)
205 { /* Only configure T4 if zero signal is available. Zero has to be on T4IN */
206 /* T4 Configuration */
207 IfxGpt12_T4_setMode(gpt12, IfxGpt12_Mode_capture);
208 IfxGpt12_T4_setCaptureInputMode(gpt12, IfxGpt12_CaptureInputMode_risingEdgeTxIN);
209 IfxGpt12_T4_enableClearTimerT2(gpt12, FALSE);
210 IfxGpt12_T4_enableClearTimerT3(gpt12, TRUE);
211 IfxGpt12_T4_setInterruptEnable(gpt12, config->zeroIsrPriority != 0);
212 IfxGpt12_T4_setRemoteControl(gpt12, IfxGpt12_TimerRemoteControl_off);
213 IfxGpt12_T4_run(gpt12, IfxGpt12_TimerRun_stop);
214
215 if (config->zeroIsrPriority)
216 {
217 /* setup interrupt */
218 volatile Ifx_SRC_SRCR *src = IfxGpt12_T4_getSrc(gpt12);
219 IfxSrc_init(src, config->zeroIsrProvider, config->zeroIsrPriority);
220 IfxSrc_enable(src);
221 }
222 }
223
224 /* T5 Configuration */
225 IfxGpt12_T5_setMode(gpt12, IfxGpt12_Mode_timer);
226 IfxGpt12_T5_setTimerPrescaler(gpt12, IfxGpt12_TimerInputPrescaler_4);
227 IfxGpt12_T5_setCaptureTrigger(gpt12, IfxGpt12_CaptureTrigger_t3inOrT3EUD);
228 IfxGpt12_T5_setCaptureTriggerMode(gpt12, IfxGpt12_CaptureTriggerMode_risingEdge);
229 IfxGpt12_T5_enableClearTimer(gpt12, TRUE);
230 IfxGpt12_T5_setCaptureTriggerEnable(gpt12, TRUE);
231 IfxGpt12_T5_setRemoteControl(gpt12, IfxGpt12_TimerRemoteControl_off);
232 IfxGpt12_T5_setDirectionSource(gpt12, IfxGpt12_TimerDirectionSource_internal);
233 IfxGpt12_T5_setTimerDirection(gpt12, IfxGpt12_TimerDirection_up);
234 IfxGpt12_T5_run(gpt12, IfxGpt12_TimerRun_start);
235
236 driver->update = (IfxGpt12_IncrEnc_Update) & IfxGpt12_IncrEnc_updateFromT3;
237 }
238 else if (config->pinA->timer == 2)
239 {
240 /* T2 Configuration */
241 IfxGpt12_T2_setMode(gpt12, IfxGpt12_Mode_incrementalInterfaceEdgeDetection);
242
243 switch (config->base.resolutionFactor)
244 {
245 case IfxStdIf_Pos_ResolutionFactor_twoFold:
246 IfxGpt12_T2_setIncrementalInterfaceInputMode(gpt12, IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxIN);
247 break;
248 case IfxStdIf_Pos_ResolutionFactor_fourFold:
249 IfxGpt12_T2_setIncrementalInterfaceInputMode(gpt12, IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxINOrTxEUD);
250 break;
251 default:
252 status = FALSE;
253 break;
254 }
255
256 IfxGpt12_T2_setDirectionSource(gpt12, IfxGpt12_TimerDirectionSource_external);
257 IfxGpt12_T2_setTimerDirection(gpt12, config->base.reversed ? IfxGpt12_TimerDirection_up : IfxGpt12_TimerDirection_down);
258 IfxGpt12_T2_run(gpt12, IfxGpt12_TimerRun_start);
259
260 if (config->pinZ != NULL_PTR)
261 { /* Only configure T4 if zero signal is available. Zero has to be on T4EUD */
262 /* T4 Configuration */
263 IfxGpt12_T4_setMode(gpt12, IfxGpt12_Mode_capture);
264 IfxGpt12_T4_setCaptureInputMode(gpt12, IfxGpt12_CaptureInputMode_none);
265 IfxGpt12_T4_enableClearTimerT2(gpt12, TRUE);
266 IfxGpt12_T4_enableClearTimerT3(gpt12, FALSE);
267 IfxGpt12_T4_setInterruptEnable(gpt12, FALSE);
268 IfxGpt12_T4_setRemoteControl(gpt12, IfxGpt12_TimerRemoteControl_off);
269 IfxGpt12_T4_run(gpt12, IfxGpt12_TimerRun_stop);
270 }
271
272 driver->update = (IfxGpt12_IncrEnc_Update) & IfxGpt12_IncrEnc_updateFromT2;
273 }
274
275 if (config->initPins == TRUE)
276 {
277 IfxGpt12_initTxInPinWithPadLevel(config->pinA, config->pinMode, config->pinDriver);
278 IfxGpt12_initTxEudInPinWithPadLevel(config->pinB, config->pinMode, config->pinDriver);
279
280 if (config->pinZ != NULL_PTR)
281 {
282 IfxGpt12_initTxInPinWithPadLevel(config->pinZ, config->pinMode, config->pinDriver);
283 }
284 }
285
286 driver->speedConstTimeDiff =
287 (2.0 * IFX_PI) / (config->base.resolution * 2) * IfxGpt12_T5_getFrequency(gpt12);
288
289 return status;
290 }
291
292
293 void IfxGpt12_IncrEnc_initConfig(IfxGpt12_IncrEnc_Config *config, Ifx_GPT12 *gpt12)
294 {
295 IfxStdIf_Pos_initConfig(&config->base);
296 config->base.resolutionFactor = IfxStdIf_Pos_ResolutionFactor_twoFold;
297 config->base.minSpeed = 1.0 / 60.0 * (2 * IFX_PI); // 1 rpm
298 config->base.maxSpeed = 20000.0 / 60.0 * (2 * IFX_PI); // 20000 rpm
299 config->base.speedFilerCutOffFrequency = config->base.maxSpeed / 2 * IFX_PI * 10;
300
301 config->pinA = NULL_PTR;
302 config->pinB = NULL_PTR;
303 config->pinZ = NULL_PTR;
304 config->pinMode = IfxPort_InputMode_noPullDevice;
305 config->module = gpt12;
306 config->zeroIsrPriority = 0;
307 config->zeroIsrProvider = IfxSrc_Tos_cpu0;
308 config->pinDriver = IfxPort_PadDriver_cmosAutomotiveSpeed1;
309
310 config->initPins = TRUE;
311 }
312
313
314 void IfxGpt12_IncrEnc_onZeroIrq(IfxGpt12_IncrEnc *driver)
315 {
316 if (driver->status.B.notSynchronised)
317 {
318 driver->status.B.notSynchronised = 0;
319 }
320
321 if (driver->direction == IfxStdIf_Pos_Dir_forward)
322 {
323 driver->turn++;
324 }
325 else
326 {
327 driver->turn--;
328 }
329 }
330
331
332 void IfxGpt12_IncrEnc_reset(IfxGpt12_IncrEnc *driver)
333 {
334 driver->rawPosition = 0;
335 driver->turn = 0;
336 driver->speed = 0;
337 driver->status.status = 0;
338 driver->status.B.notSynchronised = 1;
339 }
340
341
342 void IfxGpt12_IncrEnc_resetFaults(IfxGpt12_IncrEnc *driver)
343 {
344 IfxStdIf_Pos_Status status;
345 status.status = 0;
346 status.B.notSynchronised = driver->status.B.notSynchronised;
347 driver->status.status = status.status;
348 }
349
350
351 void IfxGpt12_IncrEnc_setOffset(IfxGpt12_IncrEnc *driver, sint32 offset)
352 {
353 driver->offset = offset;
354 driver->status.B.notSynchronised = 0;
355 }
356
357
358 void IfxGpt12_IncrEnc_setRefreshPeriod(IfxGpt12_IncrEnc *driver, float32 updatePeriod)
359 {
360 driver->updatePeriod = updatePeriod;
361 driver->speedConstPulseCount = (2.0 * IFX_PI) / driver->resolution / updatePeriod;
362 driver->speedModeThresholdTick = driver->speedModeThreshold * driver->resolution * updatePeriod / (2.0 * IFX_PI);
363 }
364
365
366 boolean IfxGpt12_IncrEnc_stdIfPosInit(IfxStdIf_Pos *stdif, IfxGpt12_IncrEnc *driver)
367 {
368 /* Ensure the stdif is reset to zeros */
369 memset(stdif, 0, sizeof(IfxStdIf_Pos));
370
371 /* Set the driver */
372 stdif->driver = driver;
373
374 /* *INDENT-OFF* Note: this file was indented manually by the author. */
375 /* Set the API link */
376 stdif->onZeroIrq =(IfxStdIf_Pos_OnZeroIrq )&IfxGpt12_IncrEnc_onZeroIrq;
377 stdif->getAbsolutePosition=(IfxStdIf_Pos_GetAbsolutePosition )&IfxGpt12_IncrEnc_getAbsolutePosition;
378 stdif->getDirection =(IfxStdIf_Pos_GetDirection )&IfxGpt12_IncrEnc_getDirection;
379 stdif->getFault =(IfxStdIf_Pos_GetFault )&IfxGpt12_IncrEnc_getFault;
380 stdif->getOffset =(IfxStdIf_Pos_GetOffset )&IfxGpt12_IncrEnc_getOffset;
381 stdif->getPeriodPerRotation =(IfxStdIf_Pos_GetPeriodPerRotation )&IfxGpt12_IncrEnc_getPeriodPerRotation;
382 stdif->getPosition =(IfxStdIf_Pos_GetPosition )&IfxGpt12_IncrEnc_getPosition;
383 stdif->getRawPosition =(IfxStdIf_Pos_GetRawPosition )&IfxGpt12_IncrEnc_getRawPosition;
384 stdif->getRefreshPeriod =(IfxStdIf_Pos_GetRefreshPeriod )&IfxGpt12_IncrEnc_getRefreshPeriod;
385 stdif->getResolution =(IfxStdIf_Pos_GetResolution )&IfxGpt12_IncrEnc_getResolution;
386 stdif->getSensorType =(IfxStdIf_Pos_GetSensorType )&IfxGpt12_IncrEnc_getSensorType;
387 stdif->reset =(IfxStdIf_Pos_Reset )&IfxGpt12_IncrEnc_reset;
388 stdif->resetFaults =(IfxStdIf_Pos_ResetFaults )&IfxGpt12_IncrEnc_resetFaults;
389 stdif->getSpeed =(IfxStdIf_Pos_GetSpeed )&IfxGpt12_IncrEnc_getSpeed;
390 stdif->update =(IfxStdIf_Pos_Update )&IfxGpt12_IncrEnc_update;
391 stdif->setOffset =(IfxStdIf_Pos_SetOffset )&IfxGpt12_IncrEnc_setOffset;
392 stdif->setRefreshPeriod =(IfxStdIf_Pos_SetRefreshPeriod )&IfxGpt12_IncrEnc_setRefreshPeriod;
393 stdif->getTurn =(IfxStdIf_Pos_GetTurn )&IfxGpt12_IncrEnc_getTurn;
394 /* *INDENT-ON* */
395
396 return TRUE;
397 }
398
399
400 void IfxGpt12_IncrEnc_update(IfxGpt12_IncrEnc *driver)
401 {
402 driver->update(driver);
403 }
404
405
406 IFX_STATIC void IfxGpt12_IncrEnc_updateFromT2(IfxGpt12_IncrEnc *driver)
407 {
408 Ifx_GPT12 *gpt12 = driver->module;
409 sint32 newPosition;
410 driver->direction = gpt12->T2CON.B.T2RDIR ? IfxStdIf_Pos_Dir_backward : IfxStdIf_Pos_Dir_forward;
411
412 newPosition = gpt12->T2.U;
413
414 newPosition = (newPosition + driver->offset);
415
416 if (newPosition >= driver->resolution)
417 {
418 newPosition %= driver->resolution;
419 }
420 else if (newPosition < 0)
421 {
422 newPosition = (newPosition + driver->resolution);
423 }
424
425 IfxGpt12_IncrEnc_updateSpeedFromT2(driver, newPosition);
426 driver->rawPosition = newPosition;
427 }
428
429
430 IFX_STATIC void IfxGpt12_IncrEnc_updateFromT3(IfxGpt12_IncrEnc *driver)
431 {
432 Ifx_GPT12 *gpt12 = driver->module;
433 sint32 newPosition;
434 driver->direction = gpt12->T3CON.B.T3RDIR ? IfxStdIf_Pos_Dir_backward : IfxStdIf_Pos_Dir_forward;
435
436 newPosition = gpt12->T3.U;
437
438 newPosition = (newPosition + driver->offset);
439
440 if (newPosition >= driver->resolution)
441 {
442 newPosition %= driver->resolution;
443 }
444 else if (newPosition < 0)
445 {
446 newPosition = (newPosition + driver->resolution);
447 }
448
449 IfxGpt12_IncrEnc_updateSpeedFromT3(driver, newPosition);
450 driver->rawPosition = newPosition;
451 }
452
453
454 IFX_STATIC void IfxGpt12_IncrEnc_updateSpeedFromT2(IfxGpt12_IncrEnc *driver, sint32 newPosition)
455 {
456 float32 speed;
457 sint32 diff;
458
459 if (driver->direction == IfxStdIf_Pos_Dir_forward)
460 {
461 diff = newPosition - driver->rawPosition;
462 }
463 else
464 {
465 diff = driver->rawPosition - newPosition;
466 }
467
468 if (diff < 0)
469 {
470 diff += driver->resolution;
471 }
472
473 speed = diff * driver->speedConstPulseCount;
474
475 speed = driver->direction == IfxStdIf_Pos_Dir_forward ? speed : -speed;
476 driver->speed = speed;
477 }
478
479
480 IFX_STATIC void IfxGpt12_IncrEnc_updateSpeedFromT3(IfxGpt12_IncrEnc *driver, sint32 newPosition)
481 {
482 float32 speed;
483 sint32 diff;
484
485 if (driver->direction == IfxStdIf_Pos_Dir_forward)
486 {
487 diff = newPosition - driver->rawPosition;
488 }
489 else
490 {
491 diff = driver->rawPosition - newPosition;
492 }
493
494 if (diff < 0)
495 {
496 diff += driver->resolution;
497 }
498
499 if (diff > driver->speedModeThresholdTick)
500 { /* Use pulse count mode ( Fast speed ) */
501 speed = diff * driver->speedConstPulseCount;
502 }
503 else
504 { /* Use time diff mode (slow speed), only if T3 is used as core */
505 Ifx_GPT12 *gpt12 = driver->module;
506 volatile Ifx_SRC_SRCR *srcT5 = IfxGpt12_T5_getSrc(gpt12);
507
508 if (srcT5->B.SRR != 1)
509 { // NO overflow of T5
510 volatile Ifx_SRC_SRCR *srcCap = IfxGpt12_getCaptureSrc(gpt12);
511
512 // Check if a new value is captured
513 if (srcCap->B.SRR != 0)
514 {
515 // Delete Capture Request Bit
516 srcCap->B.CLRR = 1;
517 speed = driver->speedConstTimeDiff / gpt12->CAPREL.B.CAPREL;
518 }
519 else
520 {
521 speed = driver->speed;
522 }
523 }
524 else
525 { // T5 overflow detected
526 // Delete Overflow Request bit
527 srcT5->B.CLRR = 1;
528 speed = 0.0;
529 }
530 }
531
532 speed = driver->direction == IfxStdIf_Pos_Dir_forward ? speed : -speed;
533 driver->speed = speed;
534 }
IfxGpt12_IncrEnc_Config::initPins
boolean initPins
TRUE: Initialize pins in driver FALSE: Don&#39;t initialize pins. User handles separately.
Definition: IfxGpt12_IncrEnc.h:243
IfxGpt12_IncrEnc::positionConst
float32 positionConst
constant for calculating mechanical position (in rad) from raw position
Definition: IfxGpt12_IncrEnc.h:221
IfxGpt12_T3_enableOutput
IFX_INLINE void IfxGpt12_T3_enableOutput(Ifx_GPT12 *gpt12, boolean enable)
Enable / Disable the T3 Output on pin T3OUT.
Definition: IfxGpt12.h:1173
IfxGpt12_IncrEnc_getPosition
float32 IfxGpt12_IncrEnc_getPosition(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:115
IfxStdIf_Pos_Config::speedModeThreshold
float32 speedModeThreshold
Speed threshold used for the speed calculation mode. For encoder, above the threshold the pulse count...
Definition: IfxStdIf_Pos.h:319
IfxGpt12_TimerRemoteControl_off
T2 RemoteControl Off.
Definition: IfxGpt12.h:277
IfxStdIf_Pos_Config::resolution
sint32 resolution
Sensor resolution. For encoder with 1024 pulse per revolution, the value should be 1024...
Definition: IfxStdIf_Pos.h:315
IfxGpt12_IncrEnc_Config::zeroIsrPriority
Ifx_Priority zeroIsrPriority
Interrupt isrPriority of the zero interrupt, if 0 the interrupt is disable.
Definition: IfxGpt12_IncrEnc.h:240
IfxGpt12_T3_setMode
IFX_INLINE void IfxGpt12_T3_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T3 timer.
Definition: IfxGpt12.h:1235
IfxGpt12_IncrEnc.h
GPT12 INCRENC details.
IfxStdIf_Pos_GetRefreshPeriod
float32(* IfxStdIf_Pos_GetRefreshPeriod)(IfxStdIf_InterfaceDriver stdIf)
Get the update period.
Definition: IfxStdIf_Pos.h:187
IfxGpt12_IncrEnc_Config::pinDriver
IfxPort_PadDriver pinDriver
Pad Driver.
Definition: IfxGpt12_IncrEnc.h:242
IfxStdIf_Pos_::setRefreshPeriod
IfxStdIf_Pos_SetRefreshPeriod setRefreshPeriod
Definition: IfxStdIf_Pos.h:307
IfxStdIf_Pos_GetOffset
sint32(* IfxStdIf_Pos_GetOffset)(IfxStdIf_InterfaceDriver stdIf)
Return the raw position sensor offset.
Definition: IfxStdIf_Pos.h:139
IfxGpt12_CaptureInputMode_none
None, Counter is disabled.
Definition: IfxGpt12.h:88
IfxGpt12_IncrEnc::speedModeThreshold
float32 speedModeThreshold
treshold used for speed calculation using pulse count mode or time diff mode in rad/s ...
Definition: IfxGpt12_IncrEnc.h:222
IfxGpt12_IncrEnc_Config::pinB
IfxGpt12_TxEud_In * pinB
Encoder B signal. Should be connecting to T2 or T3 TxEUD. See GPT12 pin map data. ...
Definition: IfxGpt12_IncrEnc.h:237
IfxGpt12_IncrEnc_Config::zeroIsrProvider
IfxSrc_Tos zeroIsrProvider
Interrupt service provider for the zero interrupt.
Definition: IfxGpt12_IncrEnc.h:241
IfxGpt12_IncrEnc_Config
Configuration structure for GPT12.
Definition: IfxGpt12_IncrEnc.h:232
IfxStdIf_Pos_::setOffset
IfxStdIf_Pos_SetOffset setOffset
Definition: IfxStdIf_Pos.h:303
IfxStdIf_Pos_initConfig
void IfxStdIf_Pos_initConfig(IfxStdIf_Pos_Config *config)
Definition: IfxStdIf_Pos.c:45
IfxGpt12_IncrEnc_setOffset
void IfxGpt12_IncrEnc_setOffset(IfxGpt12_IncrEnc *driver, sint32 offset)
Definition: IfxGpt12_IncrEnc.c:351
IfxGpt12_T2_setTimerDirection
IFX_INLINE void IfxGpt12_T2_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
Sets the T2 timer count direction.
Definition: IfxGpt12.h:1155
IfxStdIf_Pos_GetSpeed
float32(* IfxStdIf_Pos_GetSpeed)(IfxStdIf_InterfaceDriver stdIf)
Return the speed.
Definition: IfxStdIf_Pos.h:205
IfxStdIf_Pos_::driver
IfxStdIf_InterfaceDriver driver
Interface driver object.
Definition: IfxStdIf_Pos.h:285
IfxStdIf_Pos_Dir_unknown
Unknown direction.
Definition: IfxStdIf_Pos.h:96
IfxGpt12_T5_enableClearTimer
IFX_INLINE void IfxGpt12_T5_enableClearTimer(Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the clear timer bit of the T5 timer.
Definition: IfxGpt12.h:1375
IfxGpt12_T4_setRemoteControl
IFX_INLINE void IfxGpt12_T4_setRemoteControl(Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control)
Sets the remote control of the T4 timer.
Definition: IfxGpt12.h:1351
memset
void * memset(void *s, int c, syze_t n)
IfxGpt12_IncrEnc_getRawPosition
sint32 IfxGpt12_IncrEnc_getRawPosition(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:121
IfxGpt12_IncrEnc_updateFromT3
IFX_STATIC void IfxGpt12_IncrEnc_updateFromT3(IfxGpt12_IncrEnc *driver)
Update internal data when incremental mode is using T3. This function shall be periodically called...
Definition: IfxGpt12_IncrEnc.c:430
IfxGpt12_IncrEnc::rawPosition
sint32 rawPosition
raw position in ticks.
Definition: IfxGpt12_IncrEnc.h:211
IfxStdIf_Pos_Config::minSpeed
float32 minSpeed
Absolute minimal allowed speed. below speed is recognized as 0rad/s.
Definition: IfxStdIf_Pos.h:320
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
float32
float float32
Definition: Platform_Types.h:170
IfxGpt12_T5_setCaptureTriggerMode
IFX_INLINE void IfxGpt12_T5_setCaptureTriggerMode(Ifx_GPT12 *gpt12, IfxGpt12_CaptureTriggerMode mode)
Sets the capture trigger mode of the T5 timer.
Definition: IfxGpt12.h:1418
IfxGpt12_TimerDirectionSource_external
Timer Dir Control = TxUD (x=2,3,4)
Definition: IfxGpt12.h:245
IfxStdIf_Pos_::getRawPosition
IfxStdIf_Pos_GetRawPosition getRawPosition
Definition: IfxStdIf_Pos.h:292
IfxStdIf_Pos_Config::resolutionFactor
IfxStdIf_Pos_ResolutionFactor resolutionFactor
Resolution multiplier for encoder interface, valid is 2, 4.
Definition: IfxStdIf_Pos.h:317
IfxStdIf_Pos_::getPeriodPerRotation
IfxStdIf_Pos_GetPeriodPerRotation getPeriodPerRotation
Definition: IfxStdIf_Pos.h:293
IfxGpt12_IncrEnc_Config::base
IfxStdIf_Pos_Config base
Configuration data of Standard interface: Position interface.
Definition: IfxGpt12_IncrEnc.h:234
IfxGpt12_T4_getSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxGpt12_T4_getSrc(Ifx_GPT12 *gpt12)
Returns the address of Timer 4 service request.
Definition: IfxGpt12.h:1278
IfxGpt12_T5_setTimerPrescaler
IFX_INLINE void IfxGpt12_T5_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
Sets the input prescaler for the Timer mode and Gated timer mode of T5 timer.
Definition: IfxGpt12.h:1469
IfxStdIf_Pos_Status::status
uint32 status
Global status access.
Definition: IfxStdIf_Pos.h:102
IfxGpt12_IncrEnc_setRefreshPeriod
void IfxGpt12_IncrEnc_setRefreshPeriod(IfxGpt12_IncrEnc *driver, float32 updatePeriod)
Definition: IfxGpt12_IncrEnc.c:358
IfxGpt12_IncrEnc::status
IfxStdIf_Pos_Status status
error code (0 = no error)
Definition: IfxGpt12_IncrEnc.h:215
IfxGpt12_T3_setTimerDirection
IFX_INLINE void IfxGpt12_T3_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
Sets the T3 timer count direction.
Definition: IfxGpt12.h:1242
IfxStdIf_Pos_::getSensorType
IfxStdIf_Pos_GetSensorType getSensorType
Definition: IfxStdIf_Pos.h:296
IfxStdIf_Pos_::getDirection
IfxStdIf_Pos_GetDirection getDirection
Definition: IfxStdIf_Pos.h:290
IfxGpt12_IncrEnc_updateFromT2
IFX_STATIC void IfxGpt12_IncrEnc_updateFromT2(IfxGpt12_IncrEnc *driver)
Update internal data when incremental mode is using T2. This function shall be periodically called...
Definition: IfxGpt12_IncrEnc.c:406
IfxGpt12_IncrEnc
Incremental encoder object.
Definition: IfxGpt12_IncrEnc.h:209
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxStdIf_Pos_OnZeroIrq
void(* IfxStdIf_Pos_OnZeroIrq)(IfxStdIf_InterfaceDriver stdIf)
Handles the zero interrupt.
Definition: IfxStdIf_Pos.h:132
IfxGpt12_IncrEnc_resetFaults
void IfxGpt12_IncrEnc_resetFaults(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:342
IfxStdIf_Pos_ResolutionFactor_twoFold
2-fold resolution. Valid for encoder
Definition: IfxStdIf_Pos.h:76
IfxGpt12_IncrEnc::maxSpeed
float32 maxSpeed
Absolute maximal allowed speed. Above speed is recognized as error.
Definition: IfxGpt12_IncrEnc.h:226
IfxStdIf_Pos_Config::maxSpeed
float32 maxSpeed
Absolute maximal allowed speed. Above speed is recognized as error.
Definition: IfxStdIf_Pos.h:321
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxStdIf_Pos_::getRefreshPeriod
IfxStdIf_Pos_GetRefreshPeriod getRefreshPeriod
Definition: IfxStdIf_Pos.h:294
IfxStdIf_Pos_Status::B
struct IfxStdIf_Pos_Status::@0 B
Bitfielf status access.
IfxGpt12_TimerInputPrescaler_4
Definition: IfxGpt12.h:255
IfxGpt12_TimerDirection_down
Timer Down Direction selected.
Definition: IfxGpt12.h:236
IfxGpt12_Mode_capture
Capture Mode selected.
Definition: IfxGpt12.h:193
IfxStdIf_Pos_::getPosition
IfxStdIf_Pos_GetPosition getPosition
Definition: IfxStdIf_Pos.h:289
IfxGpt12_IncrEnc_update
void IfxGpt12_IncrEnc_update(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:400
IfxGpt12_T2_run
IFX_INLINE void IfxGpt12_T2_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T2 Timer.
Definition: IfxGpt12.h:1087
IfxGpt12_IncrEnc::turn
sint32 turn
number of mechanical turns
Definition: IfxGpt12_IncrEnc.h:213
IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxINOrTxEUD
(rising or falling edge) on any Tx input (TxIN or TxEUD)
Definition: IfxGpt12.h:169
IFX_PI
#define IFX_PI
Definition: Ifx_Types.h:217
IfxGpt12_IncrEnc_getTurn
sint32 IfxGpt12_IncrEnc_getTurn(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:152
IfxGpt12_IncrEnc_Update
IfxStdIf_Pos_Update IfxGpt12_IncrEnc_Update
Definition: IfxGpt12_IncrEnc.h:199
IfxGpt12_IncrEnc::direction
IfxStdIf_Pos_Dir direction
rotation direction
Definition: IfxGpt12_IncrEnc.h:214
IfxStdIf_Pos_::getFault
IfxStdIf_Pos_GetFault getFault
Definition: IfxStdIf_Pos.h:291
IfxGpt12_IncrEnc_init
boolean IfxGpt12_IncrEnc_init(IfxGpt12_IncrEnc *driver, const IfxGpt12_IncrEnc_Config *config)
Initialises the Incremental interface.
Definition: IfxGpt12_IncrEnc.c:158
IfxGpt12_T3_run
IFX_INLINE void IfxGpt12_T3_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T3 Timer.
Definition: IfxGpt12.h:1198
IfxStdIf_Pos_Config::reversed
boolean reversed
If true, the sensor direction is reversed.
Definition: IfxStdIf_Pos.h:314
IfxStdIf_Pos_GetSensorType
IfxStdIf_Pos_SensorType(* IfxStdIf_Pos_GetSensorType)(IfxStdIf_InterfaceDriver stdIf)
Get the sensor type.
Definition: IfxStdIf_Pos.h:199
IfxGpt12_IncrEnc_stdIfPosInit
boolean IfxGpt12_IncrEnc_stdIfPosInit(IfxStdIf_Pos *stdif, IfxGpt12_IncrEnc *driver)
Initializes the standard interface "Pos".
Definition: IfxGpt12_IncrEnc.c:366
IfxStdIf_Pos_GetRawPosition
sint32(* IfxStdIf_Pos_GetRawPosition)(IfxStdIf_InterfaceDriver stdIf)
Return the raw position in ticks.
Definition: IfxStdIf_Pos.h:181
IfxGpt12_TxIn_In::timer
uint8 timer
Timer number.
Definition: IfxGpt12_PinMap.h:76
IfxGpt12_IncrEnc::speedConstTimeDiff
float32 speedConstTimeDiff
constant for calculating mechanical speed (in rad/s) from raw speed in time diff mode ...
Definition: IfxGpt12_IncrEnc.h:220
IfxPort_PadDriver_cmosAutomotiveSpeed1
Speed grade 1.
Definition: IfxPort.h:153
IfxStdIf_Pos_GetDirection
IfxStdIf_Pos_Dir(* IfxStdIf_Pos_GetDirection)(IfxStdIf_InterfaceDriver stdIf)
Return the direction.
Definition: IfxStdIf_Pos.h:158
IfxGpt12_T5_setRemoteControl
IFX_INLINE void IfxGpt12_T5_setRemoteControl(Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control)
Sets the remote control of the T5 timer.
Definition: IfxGpt12.h:1457
IfxGpt12_getCaptureSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxGpt12_getCaptureSrc(Ifx_GPT12 *gpt12)
Returns the address of capture service request.
Definition: IfxGpt12.h:1570
IfxGpt12_Mode_incrementalInterfaceEdgeDetection
Incremental Interface Mode selected.
Definition: IfxGpt12.h:195
IfxStdIf_Pos_Config::updatePeriod
float32 updatePeriod
period in seconds, at which the application calls IfxStdIf_Pos_update()
Definition: IfxStdIf_Pos.h:318
IfxStdIf_Pos_SensorType_encoder
Definition: IfxStdIf_Pos.h:83
IfxGpt12_IncrEnc::speedModeThresholdTick
sint32 speedModeThresholdTick
treshold used for speed calculation using pulse count mode or time diff mode in ticks ...
Definition: IfxGpt12_IncrEnc.h:223
IfxGpt12_IncrEnc_getResolution
sint32 IfxGpt12_IncrEnc_getResolution(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:133
IfxStdIf_Pos_SetRefreshPeriod
void(* IfxStdIf_Pos_SetRefreshPeriod)(IfxStdIf_InterfaceDriver stdIf, float32 updatePeriod)
Set the update period.
Definition: IfxStdIf_Pos.h:279
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:50
IfxStdIf_Pos_Dir
IfxStdIf_Pos_Dir
Position sensor direction definition.
Definition: IfxStdIf_Pos.h:92
IfxGpt12_T4_enableClearTimerT3
IFX_INLINE void IfxGpt12_T4_enableClearTimerT3(Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the clear timer T3 bit of the T4 timer.
Definition: IfxGpt12.h:1266
IfxStdIf_Pos_GetPeriodPerRotation
uint16(* IfxStdIf_Pos_GetPeriodPerRotation)(IfxStdIf_InterfaceDriver stdIf)
Return the period per rotation setting.
Definition: IfxStdIf_Pos.h:172
IfxStdIf_Pos_Dir_backward
Backward direction. For rotating position sensor, fackward is counter-clockwise rotation.
Definition: IfxStdIf_Pos.h:95
IfxGpt12_CaptureTrigger_t3inOrT3EUD
Capture Trigger Enable from T3IN/T3EUD.
Definition: IfxGpt12.h:100
IfxPort_InputMode_noPullDevice
Definition: IfxPort.h:84
IfxStdIf_Pos_::getResolution
IfxStdIf_Pos_GetResolution getResolution
Definition: IfxStdIf_Pos.h:295
IfxGpt12_IncrEnc_getSensorType
IfxStdIf_Pos_SensorType IfxGpt12_IncrEnc_getSensorType(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:139
IfxGpt12_T4_setMode
IFX_INLINE void IfxGpt12_T4_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T4 timer.
Definition: IfxGpt12.h:1339
IfxStdIf_Pos_
Standard interface object.
Definition: IfxStdIf_Pos.h:283
IfxGpt12_IncrEnc::update
IfxGpt12_IncrEnc_Update update
Update call back API.
Definition: IfxGpt12_IncrEnc.h:227
IfxStdIf_Pos_Dir_forward
Forward direction. For rotating position sensor, forward is clockwise rotation.
Definition: IfxStdIf_Pos.h:94
IfxGpt12_IncrEnc::speed
float32 speed
mechanical speed in rad/s
Definition: IfxGpt12_IncrEnc.h:212
IfxStdIf_Pos_SensorType
IfxStdIf_Pos_SensorType
Position sensor Types.
Definition: IfxStdIf_Pos.h:81
IfxGpt12_IncrEnc::updatePeriod
float32 updatePeriod
update period in seconds
Definition: IfxGpt12_IncrEnc.h:218
IfxGpt12_IncrEnc_getSpeed
float32 IfxGpt12_IncrEnc_getSpeed(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:146
IfxGpt12_T5_setTimerDirection
IFX_INLINE void IfxGpt12_T5_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
Sets the T5 timer count direction.
Definition: IfxGpt12.h:1463
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:68
IfxGpt12_IncrEnc_getOffset
sint32 IfxGpt12_IncrEnc_getOffset(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:102
IfxGpt12_IncrEnc::resolution
sint32 resolution
resolution of this position sensor interface
Definition: IfxGpt12_IncrEnc.h:217
IfxGpt12_IncrEnc_updateSpeedFromT3
IFX_STATIC void IfxGpt12_IncrEnc_updateSpeedFromT3(IfxGpt12_IncrEnc *driver, sint32 newPosition)
Updates the speed.
Definition: IfxGpt12_IncrEnc.c:480
IfxStdIf_Pos_GetFault
IfxStdIf_Pos_Status(* IfxStdIf_Pos_GetFault)(IfxStdIf_InterfaceDriver stdIf)
Return the sensor status.
Definition: IfxStdIf_Pos.h:165
IfxGpt12_IncrEnc_Config::pinA
IfxGpt12_TxIn_In * pinA
Encoder A signal. Should be connecting to T2 or T3 TxIN. See GPT12 pin map data.
Definition: IfxGpt12_IncrEnc.h:236
IfxGpt12_IncrEnc_getDirection
IfxStdIf_Pos_Dir IfxGpt12_IncrEnc_getDirection(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:90
IfxGpt12_T4_setCaptureInputMode
IFX_INLINE void IfxGpt12_T4_setCaptureInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CaptureInputMode inputMode)
Sets the input edge selection for the capture mode of the T4 timer.
Definition: IfxGpt12.h:1297
IfxGpt12_T4_enableClearTimerT2
IFX_INLINE void IfxGpt12_T4_enableClearTimerT2(Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the clear timer T2 bit of the T4 timer.
Definition: IfxGpt12.h:1260
IfxGpt12_TimerRun_start
Timer X Run.
Definition: IfxGpt12.h:287
IfxStdIf_Pos_::getSpeed
IfxStdIf_Pos_GetSpeed getSpeed
Definition: IfxStdIf_Pos.h:301
IfxStdIf_Pos_SetOffset
void(* IfxStdIf_Pos_SetOffset)(IfxStdIf_InterfaceDriver stdIf, sint32 offset)
Set the sensor offset.
Definition: IfxStdIf_Pos.h:252
IfxGpt12_T5_setCaptureTriggerEnable
IFX_INLINE void IfxGpt12_T5_setCaptureTriggerEnable(Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the capture trigger of the T5 timer.
Definition: IfxGpt12.h:1412
IfxGpt12_IncrEnc_updateSpeedFromT2
IFX_STATIC void IfxGpt12_IncrEnc_updateSpeedFromT2(IfxGpt12_IncrEnc *driver, sint32 newPosition)
Updates the speed.
Definition: IfxGpt12_IncrEnc.c:454
IfxStdIf_Pos_Reset
void(* IfxStdIf_Pos_Reset)(IfxStdIf_InterfaceDriver stdIf)
Reset the driver.
Definition: IfxStdIf_Pos.h:236
IfxGpt12_CaptureInputMode_risingEdgeTxIN
rising edge on TxIN
Definition: IfxGpt12.h:89
IfxStdIf_Pos_Config::offset
sint32 offset
Position sensor offset.
Definition: IfxStdIf_Pos.h:313
IfxGpt12_T5_setDirectionSource
IFX_INLINE void IfxGpt12_T5_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
Sets the T5 timer count direction source internal / external.
Definition: IfxGpt12.h:1430
IfxStdIf_Pos_::getOffset
IfxStdIf_Pos_GetOffset getOffset
Definition: IfxStdIf_Pos.h:288
IfxGpt12_initTxInPinWithPadLevel
void IfxGpt12_initTxInPinWithPadLevel(const IfxGpt12_TxIn_In *txIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of TXIN pin direction as input and configuring pad driver...
Definition: IfxGpt12.c:357
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxGpt12_IncrEnc_getPeriodPerRotation
uint16 IfxGpt12_IncrEnc_getPeriodPerRotation(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:108
IfxStdIf_Pos_::getAbsolutePosition
IfxStdIf_Pos_GetAbsolutePosition getAbsolutePosition
Return the absolute position.
Definition: IfxStdIf_Pos.h:287
IfxGpt12_IncrEnc_onZeroIrq
void IfxGpt12_IncrEnc_onZeroIrq(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:314
IfxGpt12_IncrEnc_Config::module
Ifx_GPT12 * module
Pointer to module base address.
Definition: IfxGpt12_IncrEnc.h:235
IfxGpt12_TimerRun_stop
Timer x Stops.
Definition: IfxGpt12.h:286
IfxStdIf_Pos_::update
IfxStdIf_Pos_Update update
Definition: IfxStdIf_Pos.h:302
IfxStdIf_Pos_GetTurn
sint32(* IfxStdIf_Pos_GetTurn)(IfxStdIf_InterfaceDriver stdIf)
Return position in turn.
Definition: IfxStdIf_Pos.h:211
sint32
long sint32
Definition: Platform_Types.h:134
IfxGpt12_initTxEudInPinWithPadLevel
void IfxGpt12_initTxEudInPinWithPadLevel(const IfxGpt12_TxEud_In *txEudIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of TXEUD pin direction as input and configuring pad driver...
Definition: IfxGpt12.c:302
IfxStdIf_Pos_GetAbsolutePosition
float32(* IfxStdIf_Pos_GetAbsolutePosition)(IfxStdIf_InterfaceDriver stdIf)
Return the position, inclusive turns.
Definition: IfxStdIf_Pos.h:126
IfxGpt12_T5_setCaptureTrigger
IFX_INLINE void IfxGpt12_T5_setCaptureTrigger(Ifx_GPT12 *gpt12, IfxGpt12_CaptureTrigger trigger)
Sets the capture trigger of teh T5 timer.
Definition: IfxGpt12.h:1406
IfxGpt12_T5_run
IFX_INLINE void IfxGpt12_T5_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T5 Timer.
Definition: IfxGpt12.h:1400
IfxGpt12_IncrEnc_getFault
IfxStdIf_Pos_Status IfxGpt12_IncrEnc_getFault(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:96
IfxStdIf_Pos_::resetFaults
IfxStdIf_Pos_ResetFaults resetFaults
Definition: IfxStdIf_Pos.h:300
IfxGpt12_T2_setMode
IFX_INLINE void IfxGpt12_T2_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T2 timer.
Definition: IfxGpt12.h:1137
IfxGpt12_T2_setIncrementalInterfaceInputMode
IFX_INLINE void IfxGpt12_T2_setIncrementalInterfaceInputMode(Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode)
Sets the input edge selection for the incremental interface mode of the T2 timer. ...
Definition: IfxGpt12.h:1118
IfxGpt12_T4_setInterruptEnable
IFX_INLINE void IfxGpt12_T4_setInterruptEnable(Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the interrupt generation of the T4 timer.
Definition: IfxGpt12.h:1333
IfxStdIf_Pos_Update
void(* IfxStdIf_Pos_Update)(IfxStdIf_InterfaceDriver stdIf)
Refresh the status.
Definition: IfxStdIf_Pos.h:227
IfxStdIf_Pos_Config::speedFilerCutOffFrequency
float32 speedFilerCutOffFrequency
Speed low pass filter cut off frequency.
Definition: IfxStdIf_Pos.h:323
IfxStdIf_Pos_::onZeroIrq
IfxStdIf_Pos_OnZeroIrq onZeroIrq
Definition: IfxStdIf_Pos.h:286
IfxGpt12_IncrEnc_getAbsolutePosition
float32 IfxGpt12_IncrEnc_getAbsolutePosition(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:84
IfxGpt12_Mode_timer
Timer Mode selected.
Definition: IfxGpt12.h:188
IfxStdIf_Pos_ResolutionFactor_fourFold
4-fold resolution. Valid for encoder
Definition: IfxStdIf_Pos.h:77
IfxGpt12_T5_getSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxGpt12_T5_getSrc(Ifx_GPT12 *gpt12)
Returns the address of Timer 5 service request.
Definition: IfxGpt12.h:1387
IfxStdIf_Pos_Status
Position sensor status definition.
Definition: IfxStdIf_Pos.h:100
IfxGpt12_IncrEnc_getRefreshPeriod
float32 IfxGpt12_IncrEnc_getRefreshPeriod(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:127
IfxGpt12_CaptureTriggerMode_risingEdge
positive Transition on CAPIN or any Transition on T3IN
Definition: IfxGpt12.h:109
IfxGpt12_IncrEnc_Config::pinMode
IfxPort_InputMode pinMode
Pin mode for A, B and Z inputs.
Definition: IfxGpt12_IncrEnc.h:239
IfxGpt12_T5_setMode
IFX_INLINE void IfxGpt12_T5_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T5 timer.
Definition: IfxGpt12.h:1450
IfxGpt12_T3_setIncrementalInterfaceInputMode
IFX_INLINE void IfxGpt12_T3_setIncrementalInterfaceInputMode(Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode)
Sets the input edge selection for the incremental interface mode of the T3 timer. ...
Definition: IfxGpt12.h:1223
IfxGpt12_T4_run
IFX_INLINE void IfxGpt12_T4_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T4 Timer.
Definition: IfxGpt12.h:1291
IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxIN
(rising or falling edge) on TxIN
Definition: IfxGpt12.h:167
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxStdIf_Pos_::getTurn
IfxStdIf_Pos_GetTurn getTurn
Definition: IfxStdIf_Pos.h:297
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
IfxGpt12_IncrEnc::minSpeed
float32 minSpeed
Absolute minimal allowed speed. below speed is recognized as 0rad/s.
Definition: IfxGpt12_IncrEnc.h:225
IfxGpt12_T3_setDirectionSource
IFX_INLINE void IfxGpt12_T3_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
Sets the T3 timer count direction source internal / external.
Definition: IfxGpt12.h:1211
IfxGpt12_IncrEnc_reset
void IfxGpt12_IncrEnc_reset(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:332
IfxStdIf_Pos_::reset
IfxStdIf_Pos_Reset reset
Definition: IfxStdIf_Pos.h:299
IfxGpt12_TimerDirection_up
Timer Up Direction selected.
Definition: IfxGpt12.h:235
IfxGpt12_TimerDirectionSource_internal
Timer Dir Control = TxUD (x=2,3,4)
Definition: IfxGpt12.h:244
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxGpt12_IncrEnc_initConfig
void IfxGpt12_IncrEnc_initConfig(IfxGpt12_IncrEnc_Config *config, Ifx_GPT12 *gpt12)
Initializes the configuration structure to default.
Definition: IfxGpt12_IncrEnc.c:293
IfxGpt12_IncrEnc_Config::pinZ
IfxGpt12_TxIn_In * pinZ
Encoder Z signal. Should be connecting to T4 TxIn for use with T3 and TxEUD (Ignore compiler type con...
Definition: IfxGpt12_IncrEnc.h:238
IfxGpt12_IncrEnc::offset
sint32 offset
raw position offset
Definition: IfxGpt12_IncrEnc.h:216
IfxGpt12_IncrEnc::speedConstPulseCount
float32 speedConstPulseCount
constant for calculating mechanical speed (in rad/s) from raw speed in pulse count mode ...
Definition: IfxGpt12_IncrEnc.h:219
IfxStdIf_Pos_GetPosition
float32(* IfxStdIf_Pos_GetPosition)(IfxStdIf_InterfaceDriver stdIf)
Return the position.
Definition: IfxStdIf_Pos.h:149
IfxStdIf_Pos_GetResolution
sint32(* IfxStdIf_Pos_GetResolution)(IfxStdIf_InterfaceDriver stdIf)
Get the resolution.
Definition: IfxStdIf_Pos.h:193
IfxStdIf_Pos_ResetFaults
void(* IfxStdIf_Pos_ResetFaults)(IfxStdIf_InterfaceDriver stdIf)
Reset the driver fault.
Definition: IfxStdIf_Pos.h:245
IfxGpt12_T5_getFrequency
float32 IfxGpt12_T5_getFrequency(Ifx_GPT12 *gpt12)
Returns the frequency of the T5 timer.
Definition: IfxGpt12.c:175
IfxGpt12_T2_setDirectionSource
IFX_INLINE void IfxGpt12_T2_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
Sets the T2 timer count direction source internal / external.
Definition: IfxGpt12.h:1105


iLLD_TC38A: IfxGpt12_IncrEnc.h Source File

  • Gpt12
  • IncrEnc
IfxGpt12_IncrEnc.h
Go to the documentation of this file.
1 /**
2 * \file IfxGpt12_IncrEnc.h
3 * \brief GPT12 INCRENC details
4 * \ingroup IfxLld_Gpt12
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Gpt12_IncrEnc INCRENC
42 * \ingroup IfxLld_Gpt12
43 *
44 * \defgroup IfxLld_Gpt12_IncrEnc_Usage How to use the GPT12 Incremental Encoder Driver
45 * \ingroup IfxLld_Gpt12_IncrEnc
46 *
47 * The IncrEnc interface can be used in one of the following configurations T3 as core or T2 as core
48 *
49 * Setup with T3 as core
50 * - T3 as incremental mode
51 * - Multiplication factor:
52 * - twoFold: use both edges of TxIn
53 * - fourFold: use both edges of TxIn and TxEUD
54 * - Reverse of direction supported by GPT12
55 * - T3 value diff is used for speed calculation at high speed (speed > speedModeThreshold)
56 * - T4 used for zero signal detection if pinZ is not NULL
57 * - interrupt is generated to support turn calculation if zeroIsrPriority != 0
58 * - T4 clears T3 on zero signal event on TxIn input
59 * - T5 used for low speed calculation (speed < speedModeThreshold)
60 * - Rising edge of TxIn or TxEUD captures the T5 timer in CAPREL
61 *
62 * Setup with T2 as core
63 * - T2 as incremental mode
64 * - Multiplication factor:
65 * - twoFold: sample on both edges of TxIn
66 * - fourFold: sample on both edges of TxIn and TxEUD
67 * - Reverse of direction supported by GPT12
68 * - T2 value diff is used for speed calculation at high speed
69 * - T4 used for zero signal detection if pinZeroTxEUD is not NULL
70 * - T4 clears T2 on zero signal event on TxEUD input
71 *
72 * \section IfxLld_Gpt12_IncrEnc_Preparation Preparation
73 * \subsection IfxLld_Gpt12_IncrEnc_Include Include Files
74 *
75 * Include following header file into your C code:
76 * \code
77 * #include <Gpt12/Gpt/IfxGpt12_IncrEnc.h>
78 * \endcode
79 *
80 * \subsection IfxLld_Gpt12_IncrEnc_Variables Variables
81 *
82 * \code
83 * // used globally
84 * static IfxGpt12_IncrEnc gpt12;
85 * \endcode
86 *
87 * \subsection IfxLld_Gpt12_Gpt_Interrupt Interrupt Handler Installation
88 *
89 * See also \ref IfxLld_Cpu_Irq_Usage
90 *
91 * Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:
92 * \code
93 * // priorities are normally defined in Ifx_IntPrioDef.h
94 * #define ISR_PRIORITY_INCRENC_ZERO 6
95 * \endcode
96 *
97 * Add the interrupt service routines to your C code. They have to call the GPT12 interrupt handlers by passing the gpt12 handle:
98 * \code
99 * IFX_INTERRUPT(ISR_IncrIncZero, 0, ISR_PRIORITY_INCRENC_ZERO)
100 * {
101 * IfxGpt12_IncrEnc_onZeroIrq(&gpt12);
102 * }
103 * \endcode
104 *
105 * Finally install the interrupt handlers in your initialisation function:
106 * \code
107 * // install interrupt handlers
108 * IfxCpu_Irq_installInterruptHandler(&ISR_IncrIncZero, ISR_PRIORITY_INCRENC_ZERO);
109 * IfxCpu_enableInterrupts();
110 * \endcode
111 *
112 * \subsection IfxLld_Gpt12_Gpt_Init Module Initialisation
113 *
114 * The module initialisation can be done in the same function. Here an example:
115 * \code
116 * // Initialize global clocks
117 * IfxGpt12_enableModule(&MODULE_GPT120);
118 * IfxGpt12_setGpt1BlockPrescaler(&MODULE_GPT120, IfxGpt12_Gpt1BlockPrescaler_8);
119 * IfxGpt12_setGpt2BlockPrescaler(&MODULE_GPT120, IfxGpt12_Gpt2BlockPrescaler_4);
120 *
121 * // create module config
122 * IfxGpt12_IncrEnc_Config gpt12Config;
123 * IfxGpt12_IncrEnc_initConfig(&gpt12Config , &MODULE_GPT120);
124 *
125 * // implementation with T3 as core
126 * gpt12Config.base.offset = 0;
127 * gpt12Config.base.reversed = FALSE;
128 * gpt12Config.base.resolution = 2048;
129 * gpt12Config.base.periodPerRotation = 1;
130 * gpt12Config.base.resolutionFactor = IfxStdIf_Pos_ResolutionFactor_fourFold;
131 * gpt12Config.base.updatePeriod = 100e-6;
132 * gpt12Config.base.speedModeThreshold = 200;
133 * gpt12Config.base.minSpeed = 10;
134 * gpt12Config.base.maxSpeed = 500;
135 * gpt12Config.zeroIsrPriority = ISR_PRIORITY(INTERRUPT_INCRINC_ZERO);
136 * gpt12Config.zeroIsrProvider = ISR_PROVIDER(INTERRUPT_INCRINC_ZERO);
137 * gpt12Config.pinA = &IfxGpt120_T3INA_P02_6_IN;
138 * gpt12Config.pinB = &IfxGpt120_T3EUDA_P02_7_IN;
139 * gpt12Config.pinZ = &IfxGpt120_T4INA_P02_8_IN;
140 * gpt12Config.pinMode = IfxPort_InputMode_noPullDevice;
141 *
142 * gpt12Config.base.speedFilterEnabled = TRUE;
143 * gpt12Config.base.speedFilerCutOffFrequency = config.base.maxSpeed / 2 * IFX_PI * 2;
144 *
145 *
146 * // initialize module
147 * //IfxGpt12_IncrEnc gpt12; // defined globally
148 * IfxGpt12_IncrEnc_init(&gpt12, &gpt12Config);
149 * \endcode
150 *
151 * \section IfxLld_Gpt12_IncrEnc_Update Update
152 *
153 * speed, position and direction of the incremental encoder can be collected by the following
154 *
155 * \code
156 * float32 speed, rawPosition;
157 * IfxStdIf_Pos_Dir direction;
158 *
159 * Ifx_TickTime tickRefresh = gpt12.updatePeriod * TimeConst_1s;
160 *
161 * Ifx_TickTime refreshDeadLine = now();
162 *
163 * if (isDeadLine(refreshDeadLine))
164 * {
165 * refreshDeadLine = addTTime(refreshDeadLine, tickRefresh);
166 * IfxGpt12_IncrEnc_update(&gpt12);
167 *
168 * speed = IfxGpt12_IncrEnc_getSpeed(&gpt12);
169 * rawPosition = IfxGpt12_IncrEnc_getRawPosition(&gpt12);
170 * direction = IfxGpt12_IncrEnc_getDirection(&gpt12);
171 * }
172 * \endcode
173 *
174 * \defgroup IfxLld_Gpt12_IncrEnc INCRENC
175 * \ingroup IfxLld_Gpt12
176 * \defgroup IfxLld_Gpt12_IncrEnc_Datastructures Data structures
177 * \ingroup IfxLld_Gpt12_IncrEnc
178 * \defgroup IfxLld_Gpt12_IncrEnc_Functions Functions
179 * \ingroup IfxLld_Gpt12_IncrEnc
180 * \defgroup IfxLld_Gpt12_IncrEnc_StdIf_Functions StdIf Functions
181 * \ingroup IfxLld_Gpt12_IncrEnc
182 */
183
184 #ifndef IFXGPT12_INCRENC_H
185 #define IFXGPT12_INCRENC_H 1
186
187 /******************************************************************************/
188 /*----------------------------------Includes----------------------------------*/
189 /******************************************************************************/
190
191 #include "StdIf/IfxStdIf_Pos.h"
192 #include "Gpt12/Std/IfxGpt12.h"
193 #include "string.h"
194
195 /******************************************************************************/
196 /*------------------------------Type Definitions------------------------------*/
197 /******************************************************************************/
198
199 typedef IfxStdIf_Pos_Update IfxGpt12_IncrEnc_Update;
200
201 /******************************************************************************/
202 /*-----------------------------Data Structures--------------------------------*/
203 /******************************************************************************/
204
205 /** \addtogroup IfxLld_Gpt12_IncrEnc_Datastructures
206 * \{ */
207 /** \brief Incremental encoder object
208 */
209 typedef struct
210 {
211 sint32 rawPosition; /**< \brief raw position in ticks. \note: the value already contains the offset */
212 float32 speed; /**< \brief mechanical speed in rad/s */
213 sint32 turn; /**< \brief number of mechanical turns */
214 IfxStdIf_Pos_Dir direction; /**< \brief rotation direction */
215 IfxStdIf_Pos_Status status; /**< \brief error code (0 = no error) */
216 sint32 offset; /**< \brief raw position offset */
217 sint32 resolution; /**< \brief resolution of this position sensor interface */
218 float32 updatePeriod; /**< \brief update period in seconds */
219 float32 speedConstPulseCount; /**< \brief constant for calculating mechanical speed (in rad/s) from raw speed in pulse count mode */
220 float32 speedConstTimeDiff; /**< \brief constant for calculating mechanical speed (in rad/s) from raw speed in time diff mode */
221 float32 positionConst; /**< \brief constant for calculating mechanical position (in rad) from raw position */
222 float32 speedModeThreshold; /**< \brief treshold used for speed calculation using pulse count mode or time diff mode in rad/s */
223 sint32 speedModeThresholdTick; /**< \brief treshold used for speed calculation using pulse count mode or time diff mode in ticks */
224 Ifx_GPT12 *module; /**< \brief Pointer to the GPT12 module */
225 float32 minSpeed; /**< \brief Absolute minimal allowed speed. below speed is recognized as 0rad/s */
226 float32 maxSpeed; /**< \brief Absolute maximal allowed speed. Above speed is recognized as error */
227 IfxGpt12_IncrEnc_Update update; /**< \brief Update call back API */
228 } IfxGpt12_IncrEnc;
229
230 /** \brief Configuration structure for GPT12
231 */
232 typedef struct
233 {
234 IfxStdIf_Pos_Config base; /**< \brief Configuration data of \ref library_srvsw_stdif_posif */
235 Ifx_GPT12 *module; /**< \brief Pointer to module base address */
236 IfxGpt12_TxIn_In *pinA; /**< \brief Encoder A signal. Should be connecting to T2 or T3 TxIN. See \ref IfxLld_Gpt12_pinmap "GPT12 pin map data" */
237 IfxGpt12_TxEud_In *pinB; /**< \brief Encoder B signal. Should be connecting to T2 or T3 TxEUD. See \ref IfxLld_Gpt12_pinmap "GPT12 pin map data" */
238 IfxGpt12_TxIn_In *pinZ; /**< \brief Encoder Z signal. Should be connecting to T4 TxIn for use with T3 and TxEUD (Ignore compiler type conflict warning) for use with T4. See \ref IfxLld_Gpt12_pinmap "GPT12 pin map data" */
239 IfxPort_InputMode pinMode; /**< \brief Pin mode for A, B and Z inputs */
240 Ifx_Priority zeroIsrPriority; /**< \brief Interrupt isrPriority of the zero interrupt, if 0 the interrupt is disable */
241 IfxSrc_Tos zeroIsrProvider; /**< \brief Interrupt service provider for the zero interrupt */
242 IfxPort_PadDriver pinDriver; /**< \brief Pad Driver */
243 boolean initPins; /**< \brief TRUE: Initialize pins in driver
244 * FALSE: Don't initialize pins. User handles separately. */
245 } IfxGpt12_IncrEnc_Config;
246
247 /** \} */
248
249 /** \addtogroup IfxLld_Gpt12_IncrEnc_Functions
250 * \{ */
251
252 /******************************************************************************/
253 /*-------------------------Global Function Prototypes-------------------------*/
254 /******************************************************************************/
255
256 /** \brief Initialises the Incremental interface
257 * \param driver incremental encoder interface Handle
258 * \param config Configuration structure for incremental encoder
259 * \return TRUE on success else FALSE
260 *
261 * \code
262 * // create module config
263 * IfxGpt12_IncrEnc_Config gptConfig;
264 * IfxGpt12_IncrEnc_initConfig(&gptConfig , &MODULE_GPT120);
265 *
266 * // initialize module
267 * //IfxGpt12_IncrEnc gpt12; // defined globally
268 *
269 * IfxGpt12_IncrEnc_init(&gpt12, &gptConfig);
270 * \endcode
271 *
272 */
273 IFX_EXTERN boolean IfxGpt12_IncrEnc_init(IfxGpt12_IncrEnc *driver, const IfxGpt12_IncrEnc_Config *config);
274
275 /** \brief Initializes the configuration structure to default
276 * \param config Configuration structure for incremental encoder
277 * \param gpt12 pointer to module base address
278 * \return None
279 *
280 * see \ref IfxGpt12_IncrEnc_init
281 *
282 */
283 IFX_EXTERN void IfxGpt12_IncrEnc_initConfig(IfxGpt12_IncrEnc_Config *config, Ifx_GPT12 *gpt12);
284
285 /** \} */
286
287 /** \addtogroup IfxLld_Gpt12_IncrEnc_StdIf_Functions
288 * \{ */
289
290 /******************************************************************************/
291 /*-------------------------Global Function Prototypes-------------------------*/
292 /******************************************************************************/
293
294 /** \brief \see IfxStdIf_Pos_GetAbsolutePosition
295 * \param driver driver handle
296 * \return absolute position
297 */
298 IFX_EXTERN float32 IfxGpt12_IncrEnc_getAbsolutePosition(IfxGpt12_IncrEnc *driver);
299
300 /** \brief \see IfxStdIf_Pos_GetDirection
301 * \param driver driver handle
302 * \return direction
303 */
304 IFX_EXTERN IfxStdIf_Pos_Dir IfxGpt12_IncrEnc_getDirection(IfxGpt12_IncrEnc *driver);
305
306 /** \brief \see IfxStdIf_Pos_GetFault
307 * \param driver driver handle
308 * \return Fault
309 */
310 IFX_EXTERN IfxStdIf_Pos_Status IfxGpt12_IncrEnc_getFault(IfxGpt12_IncrEnc *driver);
311
312 /** \brief \see IfxStdIf_Pos_GetOffset
313 * \param driver driver handle
314 * \return offset address
315 */
316 IFX_EXTERN sint32 IfxGpt12_IncrEnc_getOffset(IfxGpt12_IncrEnc *driver);
317
318 /** \brief \see IfxStdIf_Pos_GetPeriodPerRotation
319 * \param driver driver handle
320 * \return Period per rotation
321 */
322 IFX_EXTERN uint16 IfxGpt12_IncrEnc_getPeriodPerRotation(IfxGpt12_IncrEnc *driver);
323
324 /** \brief \see IfxStdIf_Pos_GetPosition
325 * \param driver driver handle
326 * \return position
327 */
328 IFX_EXTERN float32 IfxGpt12_IncrEnc_getPosition(IfxGpt12_IncrEnc *driver);
329
330 /** \brief \see IfxStdIf_Pos_GetRawPosition
331 * \param driver driver handle
332 * \return position in ticks
333 */
334 IFX_EXTERN sint32 IfxGpt12_IncrEnc_getRawPosition(IfxGpt12_IncrEnc *driver);
335
336 /** \brief \see IfxStdIf_Pos_GetRefreshPeriod
337 * \param driver driver handle
338 * \return update period
339 */
340 IFX_EXTERN float32 IfxGpt12_IncrEnc_getRefreshPeriod(IfxGpt12_IncrEnc *driver);
341
342 /** \brief \see IfxStdIf_Pos_GetResolution
343 * \param driver driver handle
344 * \return resolution
345 */
346 IFX_EXTERN sint32 IfxGpt12_IncrEnc_getResolution(IfxGpt12_IncrEnc *driver);
347
348 /** \brief \see IfxStdIf_Pos_GetSensorType
349 * \param driver driver handle
350 * \return sensor type
351 */
352 IFX_EXTERN IfxStdIf_Pos_SensorType IfxGpt12_IncrEnc_getSensorType(IfxGpt12_IncrEnc *driver);
353
354 /** \brief \see IfxStdIf_Pos_GetSpeed
355 * \param driver driver handle
356 * \return speed
357 */
358 IFX_EXTERN float32 IfxGpt12_IncrEnc_getSpeed(IfxGpt12_IncrEnc *driver);
359
360 /** \brief \see IfxStdIf_Pos_GetTurn
361 * \param driver driver handle
362 * \return the number of turns
363 */
364 IFX_EXTERN sint32 IfxGpt12_IncrEnc_getTurn(IfxGpt12_IncrEnc *driver);
365
366 /** \brief \see IfxStdIf_Pos_OnZeroIrq
367 * \param driver driver handle
368 * \return None
369 */
370 IFX_EXTERN void IfxGpt12_IncrEnc_onZeroIrq(IfxGpt12_IncrEnc *driver);
371
372 /** \brief \see IfxStdIf_Pos_Reset
373 * \param driver driver handle
374 * \return None
375 */
376 IFX_EXTERN void IfxGpt12_IncrEnc_reset(IfxGpt12_IncrEnc *driver);
377
378 /** \brief \see IfxStdIf_Pos_ResetFaults
379 * \param driver driver handle
380 * \return None
381 */
382 IFX_EXTERN void IfxGpt12_IncrEnc_resetFaults(IfxGpt12_IncrEnc *driver);
383
384 /** \brief \see IfxStdIf_Pos_SetOffset
385 * \param driver driver handle
386 * \param offset offset address
387 * \return None
388 */
389 IFX_EXTERN void IfxGpt12_IncrEnc_setOffset(IfxGpt12_IncrEnc *driver, sint32 offset);
390
391 /** \brief \see IfxStdIf_Pos_SetRefreshPeriod
392 * \param driver driver handle
393 * \param updatePeriod update period
394 * \return None
395 */
396 IFX_EXTERN void IfxGpt12_IncrEnc_setRefreshPeriod(IfxGpt12_IncrEnc *driver, float32 updatePeriod);
397
398 /** \brief \see IfxStdIf_Pos_Update
399 * \param driver driver handle
400 * \return None
401 */
402 IFX_EXTERN void IfxGpt12_IncrEnc_update(IfxGpt12_IncrEnc *driver);
403
404 /** \} */
405
406 /******************************************************************************/
407 /*-------------------------Global Function Prototypes-------------------------*/
408 /******************************************************************************/
409
410 /** \brief Initializes the standard interface "Pos"
411 * \param stdif Standard interface position object
412 * \param driver incremental encoder interface Handle
413 * \return TRUE on success else FALSE
414 */
415 IFX_EXTERN boolean IfxGpt12_IncrEnc_stdIfPosInit(IfxStdIf_Pos *stdif, IfxGpt12_IncrEnc *driver);
416
417 #endif /* IFXGPT12_INCRENC_H */
IfxGpt12_IncrEnc_Config::initPins
boolean initPins
TRUE: Initialize pins in driver FALSE: Don&#39;t initialize pins. User handles separately.
Definition: IfxGpt12_IncrEnc.h:243
IfxGpt12_IncrEnc::positionConst
float32 positionConst
constant for calculating mechanical position (in rad) from raw position
Definition: IfxGpt12_IncrEnc.h:221
IfxGpt12_IncrEnc_getPosition
IFX_EXTERN float32 IfxGpt12_IncrEnc_getPosition(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:115
IfxGpt12_IncrEnc_Config::zeroIsrPriority
Ifx_Priority zeroIsrPriority
Interrupt isrPriority of the zero interrupt, if 0 the interrupt is disable.
Definition: IfxGpt12_IncrEnc.h:240
IfxGpt12_IncrEnc_Config::pinDriver
IfxPort_PadDriver pinDriver
Pad Driver.
Definition: IfxGpt12_IncrEnc.h:242
IfxGpt12_IncrEnc::speedModeThreshold
float32 speedModeThreshold
treshold used for speed calculation using pulse count mode or time diff mode in rad/s ...
Definition: IfxGpt12_IncrEnc.h:222
IfxGpt12_IncrEnc_Config::pinB
IfxGpt12_TxEud_In * pinB
Encoder B signal. Should be connecting to T2 or T3 TxEUD. See GPT12 pin map data. ...
Definition: IfxGpt12_IncrEnc.h:237
IfxGpt12_IncrEnc_Config::zeroIsrProvider
IfxSrc_Tos zeroIsrProvider
Interrupt service provider for the zero interrupt.
Definition: IfxGpt12_IncrEnc.h:241
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:100
IfxGpt12_IncrEnc_Config
Configuration structure for GPT12.
Definition: IfxGpt12_IncrEnc.h:232
IfxGpt12_IncrEnc_setOffset
IFX_EXTERN void IfxGpt12_IncrEnc_setOffset(IfxGpt12_IncrEnc *driver, sint32 offset)
Definition: IfxGpt12_IncrEnc.c:351
IfxGpt12_TxEud_In
TxEUD pin mapping structure.
Definition: IfxGpt12_PinMap.h:64
IfxGpt12_IncrEnc_getRawPosition
IFX_EXTERN sint32 IfxGpt12_IncrEnc_getRawPosition(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:121
IfxGpt12_IncrEnc::rawPosition
sint32 rawPosition
raw position in ticks.
Definition: IfxGpt12_IncrEnc.h:211
float32
float float32
Definition: Platform_Types.h:170
IfxGpt12_IncrEnc_Config::base
IfxStdIf_Pos_Config base
Configuration data of Standard interface: Position interface.
Definition: IfxGpt12_IncrEnc.h:234
IfxGpt12_IncrEnc_setRefreshPeriod
IFX_EXTERN void IfxGpt12_IncrEnc_setRefreshPeriod(IfxGpt12_IncrEnc *driver, float32 updatePeriod)
Definition: IfxGpt12_IncrEnc.c:358
IfxGpt12_IncrEnc::status
IfxStdIf_Pos_Status status
error code (0 = no error)
Definition: IfxGpt12_IncrEnc.h:215
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxGpt12_IncrEnc
Incremental encoder object.
Definition: IfxGpt12_IncrEnc.h:209
IfxGpt12_IncrEnc_resetFaults
IFX_EXTERN void IfxGpt12_IncrEnc_resetFaults(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:342
IfxGpt12_IncrEnc::maxSpeed
float32 maxSpeed
Absolute maximal allowed speed. Above speed is recognized as error.
Definition: IfxGpt12_IncrEnc.h:226
IfxGpt12_IncrEnc_update
IFX_EXTERN void IfxGpt12_IncrEnc_update(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:400
IfxGpt12_IncrEnc::turn
sint32 turn
number of mechanical turns
Definition: IfxGpt12_IncrEnc.h:213
IfxGpt12_IncrEnc_getTurn
IFX_EXTERN sint32 IfxGpt12_IncrEnc_getTurn(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:152
IfxGpt12_IncrEnc_Update
IfxStdIf_Pos_Update IfxGpt12_IncrEnc_Update
Definition: IfxGpt12_IncrEnc.h:199
IfxGpt12_IncrEnc::direction
IfxStdIf_Pos_Dir direction
rotation direction
Definition: IfxGpt12_IncrEnc.h:214
IfxGpt12_IncrEnc_init
IFX_EXTERN boolean IfxGpt12_IncrEnc_init(IfxGpt12_IncrEnc *driver, const IfxGpt12_IncrEnc_Config *config)
Initialises the Incremental interface.
Definition: IfxGpt12_IncrEnc.c:158
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxStdIf_Pos.h
Standard interface: Position interface.
IfxGpt12_IncrEnc::speedConstTimeDiff
float32 speedConstTimeDiff
constant for calculating mechanical speed (in rad/s) from raw speed in time diff mode ...
Definition: IfxGpt12_IncrEnc.h:220
IfxGpt12.h
GPT12 basic functionality.
IfxGpt12_IncrEnc::speedModeThresholdTick
sint32 speedModeThresholdTick
treshold used for speed calculation using pulse count mode or time diff mode in ticks ...
Definition: IfxGpt12_IncrEnc.h:223
IfxGpt12_IncrEnc_getResolution
IFX_EXTERN sint32 IfxGpt12_IncrEnc_getResolution(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:133
IfxStdIf_Pos_Dir
IfxStdIf_Pos_Dir
Position sensor direction definition.
Definition: IfxStdIf_Pos.h:92
IfxGpt12_IncrEnc_getSensorType
IFX_EXTERN IfxStdIf_Pos_SensorType IfxGpt12_IncrEnc_getSensorType(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:139
IfxStdIf_Pos_Config
Position interface configuration.
Definition: IfxStdIf_Pos.h:311
IfxStdIf_Pos_
Standard interface object.
Definition: IfxStdIf_Pos.h:283
IfxGpt12_IncrEnc::update
IfxGpt12_IncrEnc_Update update
Update call back API.
Definition: IfxGpt12_IncrEnc.h:227
IfxGpt12_IncrEnc::speed
float32 speed
mechanical speed in rad/s
Definition: IfxGpt12_IncrEnc.h:212
IfxStdIf_Pos_SensorType
IfxStdIf_Pos_SensorType
Position sensor Types.
Definition: IfxStdIf_Pos.h:81
IfxGpt12_IncrEnc::updatePeriod
float32 updatePeriod
update period in seconds
Definition: IfxGpt12_IncrEnc.h:218
IfxGpt12_IncrEnc_getSpeed
IFX_EXTERN float32 IfxGpt12_IncrEnc_getSpeed(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:146
IfxGpt12_IncrEnc_getOffset
IFX_EXTERN sint32 IfxGpt12_IncrEnc_getOffset(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:102
IfxGpt12_IncrEnc::resolution
sint32 resolution
resolution of this position sensor interface
Definition: IfxGpt12_IncrEnc.h:217
IfxGpt12_IncrEnc_Config::pinA
IfxGpt12_TxIn_In * pinA
Encoder A signal. Should be connecting to T2 or T3 TxIN. See GPT12 pin map data.
Definition: IfxGpt12_IncrEnc.h:236
IfxGpt12_IncrEnc_getDirection
IFX_EXTERN IfxStdIf_Pos_Dir IfxGpt12_IncrEnc_getDirection(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:90
IfxGpt12_TxIn_In
TxIN pin mapping structure.
Definition: IfxGpt12_PinMap.h:73
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:151
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxGpt12_IncrEnc_getPeriodPerRotation
IFX_EXTERN uint16 IfxGpt12_IncrEnc_getPeriodPerRotation(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:108
IfxGpt12_IncrEnc_onZeroIrq
IFX_EXTERN void IfxGpt12_IncrEnc_onZeroIrq(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:314
IfxGpt12_IncrEnc::module
Ifx_GPT12 * module
Pointer to the GPT12 module.
Definition: IfxGpt12_IncrEnc.h:224
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:81
sint32
long sint32
Definition: Platform_Types.h:134
IfxGpt12_IncrEnc_getFault
IFX_EXTERN IfxStdIf_Pos_Status IfxGpt12_IncrEnc_getFault(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:96
IfxStdIf_Pos_Update
void(* IfxStdIf_Pos_Update)(IfxStdIf_InterfaceDriver stdIf)
Refresh the status.
Definition: IfxStdIf_Pos.h:227
IfxGpt12_IncrEnc_stdIfPosInit
IFX_EXTERN boolean IfxGpt12_IncrEnc_stdIfPosInit(IfxStdIf_Pos *stdif, IfxGpt12_IncrEnc *driver)
Initializes the standard interface "Pos".
Definition: IfxGpt12_IncrEnc.c:366
IfxGpt12_IncrEnc_getAbsolutePosition
IFX_EXTERN float32 IfxGpt12_IncrEnc_getAbsolutePosition(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:84
IfxStdIf_Pos_Status
Position sensor status definition.
Definition: IfxStdIf_Pos.h:100
IfxGpt12_IncrEnc_getRefreshPeriod
IFX_EXTERN float32 IfxGpt12_IncrEnc_getRefreshPeriod(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:127
IfxGpt12_IncrEnc_Config::pinMode
IfxPort_InputMode pinMode
Pin mode for A, B and Z inputs.
Definition: IfxGpt12_IncrEnc.h:239
IfxGpt12_IncrEnc::minSpeed
float32 minSpeed
Absolute minimal allowed speed. below speed is recognized as 0rad/s.
Definition: IfxGpt12_IncrEnc.h:225
IfxGpt12_IncrEnc_reset
IFX_EXTERN void IfxGpt12_IncrEnc_reset(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:332
IfxGpt12_IncrEnc_initConfig
IFX_EXTERN void IfxGpt12_IncrEnc_initConfig(IfxGpt12_IncrEnc_Config *config, Ifx_GPT12 *gpt12)
Initializes the configuration structure to default.
Definition: IfxGpt12_IncrEnc.c:293
IfxGpt12_IncrEnc_Config::pinZ
IfxGpt12_TxIn_In * pinZ
Encoder Z signal. Should be connecting to T4 TxIn for use with T3 and TxEUD (Ignore compiler type con...
Definition: IfxGpt12_IncrEnc.h:238
IfxGpt12_IncrEnc::offset
sint32 offset
raw position offset
Definition: IfxGpt12_IncrEnc.h:216
IfxGpt12_IncrEnc::speedConstPulseCount
float32 speedConstPulseCount
constant for calculating mechanical speed (in rad/s) from raw speed in pulse count mode ...
Definition: IfxGpt12_IncrEnc.h:219


iLLD_TC38A: IfxGpt12_PinMap.c Source File

  • _PinMap
IfxGpt12_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxGpt12_PinMap.c
3 * \brief GPT12 I/O map
4 * \ingroup IfxLld_Gpt12
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "IfxGpt12_PinMap.h"
44
45 IfxGpt12_Capin_In IfxGpt120_CAPINA_P13_2_IN = {&MODULE_GPT120, {&MODULE_P13, 2}, Ifx_RxSel_a};
46 IfxGpt12_TxEud_In IfxGpt120_T2EUDA_P00_8_IN = {&MODULE_GPT120, 2, {&MODULE_P00, 8}, Ifx_RxSel_a};
47 IfxGpt12_TxEud_In IfxGpt120_T2EUDB_P33_6_IN = {&MODULE_GPT120, 2, {&MODULE_P33, 6}, Ifx_RxSel_b};
48 IfxGpt12_TxEud_In IfxGpt120_T3EUDA_P02_7_IN = {&MODULE_GPT120, 3, {&MODULE_P02, 7}, Ifx_RxSel_a};
49 IfxGpt12_TxEud_In IfxGpt120_T3EUDB_P10_7_IN = {&MODULE_GPT120, 3, {&MODULE_P10, 7}, Ifx_RxSel_b};
50 IfxGpt12_TxEud_In IfxGpt120_T4EUDA_P00_9_IN = {&MODULE_GPT120, 4, {&MODULE_P00, 9}, Ifx_RxSel_a};
51 IfxGpt12_TxEud_In IfxGpt120_T4EUDB_P33_5_IN = {&MODULE_GPT120, 4, {&MODULE_P33, 5}, Ifx_RxSel_b};
52 IfxGpt12_TxEud_In IfxGpt120_T5EUDA_P21_6_IN = {&MODULE_GPT120, 5, {&MODULE_P21, 6}, Ifx_RxSel_a};
53 IfxGpt12_TxEud_In IfxGpt120_T5EUDB_P10_1_IN = {&MODULE_GPT120, 5, {&MODULE_P10, 1}, Ifx_RxSel_b};
54 IfxGpt12_TxEud_In IfxGpt120_T6EUDA_P20_0_IN = {&MODULE_GPT120, 6, {&MODULE_P20, 0}, Ifx_RxSel_a};
55 IfxGpt12_TxEud_In IfxGpt120_T6EUDB_P10_0_IN = {&MODULE_GPT120, 6, {&MODULE_P10, 0}, Ifx_RxSel_b};
56 IfxGpt12_TxIn_In IfxGpt120_T2INA_P00_7_IN = {&MODULE_GPT120, 2, {&MODULE_P00, 7}, Ifx_RxSel_a};
57 IfxGpt12_TxIn_In IfxGpt120_T2INB_P33_7_IN = {&MODULE_GPT120, 2, {&MODULE_P33, 7}, Ifx_RxSel_b};
58 IfxGpt12_TxIn_In IfxGpt120_T3INA_P02_6_IN = {&MODULE_GPT120, 3, {&MODULE_P02, 6}, Ifx_RxSel_a};
59 IfxGpt12_TxIn_In IfxGpt120_T3INB_P10_4_IN = {&MODULE_GPT120, 3, {&MODULE_P10, 4}, Ifx_RxSel_b};
60 IfxGpt12_TxIn_In IfxGpt120_T4INA_P02_8_IN = {&MODULE_GPT120, 4, {&MODULE_P02, 8}, Ifx_RxSel_a};
61 IfxGpt12_TxIn_In IfxGpt120_T4INB_P10_8_IN = {&MODULE_GPT120, 4, {&MODULE_P10, 8}, Ifx_RxSel_b};
62 IfxGpt12_TxIn_In IfxGpt120_T5INA_P21_7_IN = {&MODULE_GPT120, 5, {&MODULE_P21, 7}, Ifx_RxSel_a};
63 IfxGpt12_TxIn_In IfxGpt120_T5INB_P10_3_IN = {&MODULE_GPT120, 5, {&MODULE_P10, 3}, Ifx_RxSel_b};
64 IfxGpt12_TxIn_In IfxGpt120_T6INA_P20_3_IN = {&MODULE_GPT120, 6, {&MODULE_P20, 3}, Ifx_RxSel_a};
65 IfxGpt12_TxIn_In IfxGpt120_T6INB_P10_2_IN = {&MODULE_GPT120, 6, {&MODULE_P10, 2}, Ifx_RxSel_b};
66 IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P10_6_OUT = {&MODULE_GPT120, 3, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt4};
67 IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P21_6_OUT = {&MODULE_GPT120, 3, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt7};
68 IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P10_5_OUT = {&MODULE_GPT120, 6, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt5};
69 IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P21_7_OUT = {&MODULE_GPT120, 6, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt7};
70
71
72 const IfxGpt12_Capin_In *IfxGpt12_Capin_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS] = {
73 {
74 &IfxGpt120_CAPINA_P13_2_IN
75 }
76 };
77
78 const IfxGpt12_TxEud_In *IfxGpt12_TxEud_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS] = {
79 {
80 {
81 NULL_PTR,
82 NULL_PTR
83 },
84 {
85 NULL_PTR,
86 NULL_PTR
87 },
88 {
89 &IfxGpt120_T2EUDA_P00_8_IN,
90 &IfxGpt120_T2EUDB_P33_6_IN
91 },
92 {
93 &IfxGpt120_T3EUDA_P02_7_IN,
94 &IfxGpt120_T3EUDB_P10_7_IN
95 },
96 {
97 &IfxGpt120_T4EUDA_P00_9_IN,
98 &IfxGpt120_T4EUDB_P33_5_IN
99 },
100 {
101 &IfxGpt120_T5EUDA_P21_6_IN,
102 &IfxGpt120_T5EUDB_P10_1_IN
103 },
104 {
105 &IfxGpt120_T6EUDA_P20_0_IN,
106 &IfxGpt120_T6EUDB_P10_0_IN
107 }
108 }
109 };
110
111 const IfxGpt12_TxIn_In *IfxGpt12_TxIn_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS] = {
112 {
113 {
114 NULL_PTR,
115 NULL_PTR
116 },
117 {
118 NULL_PTR,
119 NULL_PTR
120 },
121 {
122 &IfxGpt120_T2INA_P00_7_IN,
123 &IfxGpt120_T2INB_P33_7_IN
124 },
125 {
126 &IfxGpt120_T3INA_P02_6_IN,
127 &IfxGpt120_T3INB_P10_4_IN
128 },
129 {
130 &IfxGpt120_T4INA_P02_8_IN,
131 &IfxGpt120_T4INB_P10_8_IN
132 },
133 {
134 &IfxGpt120_T5INA_P21_7_IN,
135 &IfxGpt120_T5INB_P10_3_IN
136 },
137 {
138 &IfxGpt120_T6INA_P20_3_IN,
139 &IfxGpt120_T6INB_P10_2_IN
140 }
141 }
142 };
143
144 const IfxGpt12_TxOut_Out *IfxGpt12_TxOut_Out_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS] = {
145 {
146 {
147 NULL_PTR,
148 NULL_PTR
149 },
150 {
151 NULL_PTR,
152 NULL_PTR
153 },
154 {
155 NULL_PTR,
156 NULL_PTR
157 },
158 {
159 &IfxGpt120_T3OUT_P10_6_OUT,
160 &IfxGpt120_T3OUT_P21_6_OUT
161 },
162 {
163 NULL_PTR,
164 NULL_PTR
165 },
166 {
167 NULL_PTR,
168 NULL_PTR
169 },
170 {
171 &IfxGpt120_T6OUT_P10_5_OUT,
172 &IfxGpt120_T6OUT_P21_7_OUT
173 }
174 }
175 };
IfxGpt12_Capin_In_pinTable
const IfxGpt12_Capin_In * IfxGpt12_Capin_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS]
Definition: IfxGpt12_PinMap.c:72
IfxGpt120_T6OUT_P21_7_OUT
IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P21_7_OUT
Definition: IfxGpt12_PinMap.c:69
IfxGpt120_T6EUDA_P20_0_IN
IfxGpt12_TxEud_In IfxGpt120_T6EUDA_P20_0_IN
Definition: IfxGpt12_PinMap.c:54
IfxGpt120_T3EUDB_P10_7_IN
IfxGpt12_TxEud_In IfxGpt120_T3EUDB_P10_7_IN
Definition: IfxGpt12_PinMap.c:49
IFXGPT12_PINMAP_NUM_TIMERS
#define IFXGPT12_PINMAP_NUM_TIMERS
Definition: IfxGpt12_PinMap.h:118
IfxGpt12_TxEud_In
TxEUD pin mapping structure.
Definition: IfxGpt12_PinMap.h:64
IfxGpt120_T5EUDA_P21_6_IN
IfxGpt12_TxEud_In IfxGpt120_T5EUDA_P21_6_IN
Definition: IfxGpt12_PinMap.c:52
IfxGpt120_T3EUDA_P02_7_IN
IfxGpt12_TxEud_In IfxGpt120_T3EUDA_P02_7_IN
Definition: IfxGpt12_PinMap.c:48
Ifx_RxSel_a
Definition: Ifx_Types.h:129
IfxGpt120_T3OUT_P21_6_OUT
IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P21_6_OUT
Definition: IfxGpt12_PinMap.c:67
IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS
#define IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS
Definition: IfxGpt12_PinMap.h:120
IfxGpt120_T5EUDB_P10_1_IN
IfxGpt12_TxEud_In IfxGpt120_T5EUDB_P10_1_IN
Definition: IfxGpt12_PinMap.c:53
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
Ifx_RxSel_b
Definition: Ifx_Types.h:130
IfxGpt120_T4EUDB_P33_5_IN
IfxGpt12_TxEud_In IfxGpt120_T4EUDB_P33_5_IN
Definition: IfxGpt12_PinMap.c:51
IfxGpt12_PinMap.h
GPT12 I/O map.
IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS
#define IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS
Definition: IfxGpt12_PinMap.h:122
IfxGpt120_T6EUDB_P10_0_IN
IfxGpt12_TxEud_In IfxGpt120_T6EUDB_P10_0_IN
Definition: IfxGpt12_PinMap.c:55
IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS
#define IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS
Definition: IfxGpt12_PinMap.h:119
IfxGpt120_T2EUDA_P00_8_IN
IfxGpt12_TxEud_In IfxGpt120_T2EUDA_P00_8_IN
Definition: IfxGpt12_PinMap.c:46
IfxGpt120_T4INB_P10_8_IN
IfxGpt12_TxIn_In IfxGpt120_T4INB_P10_8_IN
Definition: IfxGpt12_PinMap.c:61
IfxGpt12_TxOut_Out
TxOUT pin mapping structure.
Definition: IfxGpt12_PinMap.h:82
IfxGpt120_T2INB_P33_7_IN
IfxGpt12_TxIn_In IfxGpt120_T2INB_P33_7_IN
Definition: IfxGpt12_PinMap.c:57
IfxGpt120_T3INA_P02_6_IN
IfxGpt12_TxIn_In IfxGpt120_T3INA_P02_6_IN
Definition: IfxGpt12_PinMap.c:58
IfxGpt120_T6INA_P20_3_IN
IfxGpt12_TxIn_In IfxGpt120_T6INA_P20_3_IN
Definition: IfxGpt12_PinMap.c:64
IfxGpt120_CAPINA_P13_2_IN
IfxGpt12_Capin_In IfxGpt120_CAPINA_P13_2_IN
Definition: IfxGpt12_PinMap.c:45
IfxGpt12_TxIn_In_pinTable
const IfxGpt12_TxIn_In * IfxGpt12_TxIn_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS]
Definition: IfxGpt12_PinMap.c:111
IfxGpt120_T5INA_P21_7_IN
IfxGpt12_TxIn_In IfxGpt120_T5INA_P21_7_IN
Definition: IfxGpt12_PinMap.c:62
IFXGPT12_PINMAP_NUM_MODULES
#define IFXGPT12_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxGpt12_PinMap.h:117
IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS
#define IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS
Definition: IfxGpt12_PinMap.h:121
IfxPort_OutputIdx_alt4
Definition: IfxPort.h:132
IfxGpt12_TxIn_In
TxIN pin mapping structure.
Definition: IfxGpt12_PinMap.h:73
IfxPort_OutputIdx_alt7
Definition: IfxPort.h:135
IfxGpt120_T4EUDA_P00_9_IN
IfxGpt12_TxEud_In IfxGpt120_T4EUDA_P00_9_IN
Definition: IfxGpt12_PinMap.c:50
IfxGpt120_T2EUDB_P33_6_IN
IfxGpt12_TxEud_In IfxGpt120_T2EUDB_P33_6_IN
Definition: IfxGpt12_PinMap.c:47
IfxGpt120_T6OUT_P10_5_OUT
IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P10_5_OUT
Definition: IfxGpt12_PinMap.c:68
IfxGpt120_T3INB_P10_4_IN
IfxGpt12_TxIn_In IfxGpt120_T3INB_P10_4_IN
Definition: IfxGpt12_PinMap.c:59
IfxGpt120_T2INA_P00_7_IN
IfxGpt12_TxIn_In IfxGpt120_T2INA_P00_7_IN
Definition: IfxGpt12_PinMap.c:56
IfxGpt12_TxEud_In_pinTable
const IfxGpt12_TxEud_In * IfxGpt12_TxEud_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS]
Definition: IfxGpt12_PinMap.c:78
IfxGpt120_T3OUT_P10_6_OUT
IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P10_6_OUT
Definition: IfxGpt12_PinMap.c:66
IfxPort_OutputIdx_alt5
Definition: IfxPort.h:133
IfxGpt120_T5INB_P10_3_IN
IfxGpt12_TxIn_In IfxGpt120_T5INB_P10_3_IN
Definition: IfxGpt12_PinMap.c:63
IfxGpt12_TxOut_Out_pinTable
const IfxGpt12_TxOut_Out * IfxGpt12_TxOut_Out_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS]
Definition: IfxGpt12_PinMap.c:144
IfxGpt120_T6INB_P10_2_IN
IfxGpt12_TxIn_In IfxGpt120_T6INB_P10_2_IN
Definition: IfxGpt12_PinMap.c:65
IfxGpt120_T4INA_P02_8_IN
IfxGpt12_TxIn_In IfxGpt120_T4INA_P02_8_IN
Definition: IfxGpt12_PinMap.c:60
IfxGpt12_Capin_In
CAPIN pin mapping structure.
Definition: IfxGpt12_PinMap.h:56


iLLD_TC38A: IfxGpt12_PinMap.h Source File

  • _PinMap
IfxGpt12_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxGpt12_PinMap.h
3 * \brief GPT12 I/O map
4 * \ingroup IfxLld_Gpt12
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Gpt12_pinmap GPT12 Pin Mapping
42 * \ingroup IfxLld_Gpt12
43 */
44
45 #ifndef IFXGPT12_PINMAP_H
46 #define IFXGPT12_PINMAP_H
47
48 #include <IfxGpt12_reg.h>
49 #include <_Impl/IfxGpt12_cfg.h>
50 #include <Port/Std/IfxPort.h>
51
52 /** \addtogroup IfxLld_Gpt12_pinmap
53 * \{ */
54
55 /** \brief CAPIN pin mapping structure */
56 typedef const struct
57 {
58 Ifx_GPT12* module; /**< \brief Base address */
59 IfxPort_Pin pin; /**< \brief Port pin */
60 Ifx_RxSel select; /**< \brief Input multiplexer value */
61 } IfxGpt12_Capin_In;
62
63 /** \brief TxEUD pin mapping structure */
64 typedef const struct
65 {
66 Ifx_GPT12* module; /**< \brief Base address */
67 uint8 timer; /**< \brief Timer number */
68 IfxPort_Pin pin; /**< \brief Port pin */
69 Ifx_RxSel select; /**< \brief Input multiplexer value */
70 } IfxGpt12_TxEud_In;
71
72 /** \brief TxIN pin mapping structure */
73 typedef const struct
74 {
75 Ifx_GPT12* module; /**< \brief Base address */
76 uint8 timer; /**< \brief Timer number */
77 IfxPort_Pin pin; /**< \brief Port pin */
78 Ifx_RxSel select; /**< \brief Input multiplexer value */
79 } IfxGpt12_TxIn_In;
80
81 /** \brief TxOUT pin mapping structure */
82 typedef const struct
83 {
84 Ifx_GPT12* module; /**< \brief Base address */
85 uint8 timer; /**< \brief Timer number */
86 IfxPort_Pin pin; /**< \brief Port pin */
87 IfxPort_OutputIdx select; /**< \brief Port control code */
88 } IfxGpt12_TxOut_Out;
89
90 IFX_EXTERN IfxGpt12_Capin_In IfxGpt120_CAPINA_P13_2_IN; /**< \brief Trigger input to capture value of timer T5 into CAPREL register */
91 IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T2EUDA_P00_8_IN; /**< \brief Count direction control input of timer T2 */
92 IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T2EUDB_P33_6_IN; /**< \brief Count direction control input of timer T2 */
93 IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T3EUDA_P02_7_IN; /**< \brief Count direction control input of core timer T3 */
94 IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T3EUDB_P10_7_IN; /**< \brief Count direction control input of core timer T3 */
95 IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T4EUDA_P00_9_IN; /**< \brief Count direction control input of timer T4 */
96 IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T4EUDB_P33_5_IN; /**< \brief Count direction control input of timer T4 */
97 IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T5EUDA_P21_6_IN; /**< \brief Count direction control input of timer T5 */
98 IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T5EUDB_P10_1_IN; /**< \brief Count direction control input of timer T5 */
99 IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T6EUDA_P20_0_IN; /**< \brief Count direction control input of core timer T6 */
100 IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T6EUDB_P10_0_IN; /**< \brief Count direction control input of core timer T6 */
101 IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T2INA_P00_7_IN; /**< \brief Trigger/gate input of timer T2 */
102 IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T2INB_P33_7_IN; /**< \brief Trigger/gate input of timer T2 */
103 IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T3INA_P02_6_IN; /**< \brief Trigger/gate input of core timer T3 */
104 IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T3INB_P10_4_IN; /**< \brief Trigger/gate input of core timer T3 */
105 IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T4INA_P02_8_IN; /**< \brief Trigger/gate input of timer T4 */
106 IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T4INB_P10_8_IN; /**< \brief Trigger/gate input of timer T4 */
107 IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T5INA_P21_7_IN; /**< \brief Trigger/gate input of timer T5 */
108 IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T5INB_P10_3_IN; /**< \brief Trigger/gate input of timer T5 */
109 IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T6INA_P20_3_IN; /**< \brief Trigger/gate input of core timer T6 */
110 IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T6INB_P10_2_IN; /**< \brief Trigger/gate input of core timer T6 */
111 IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P10_6_OUT; /**< \brief External output for overflow/underflow detection of core timer T3 */
112 IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P21_6_OUT; /**< \brief External output for overflow/underflow detection of core timer T3 */
113 IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P10_5_OUT; /**< \brief External output for overflow/underflow detection of core timer T6 */
114 IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P21_7_OUT; /**< \brief External output for overflow/underflow detection of core timer T6 */
115
116 /** \brief Table dimensions */
117 #define IFXGPT12_PINMAP_NUM_MODULES 1
118 #define IFXGPT12_PINMAP_NUM_TIMERS 7
119 #define IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS 1
120 #define IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS 2
121 #define IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS 2
122 #define IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS 2
123
124
125 /** \brief IfxGpt12_Capin_In table */
126 IFX_EXTERN const IfxGpt12_Capin_In *IfxGpt12_Capin_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS];
127
128 /** \brief IfxGpt12_TxEud_In table */
129 IFX_EXTERN const IfxGpt12_TxEud_In *IfxGpt12_TxEud_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS];
130
131 /** \brief IfxGpt12_TxIn_In table */
132 IFX_EXTERN const IfxGpt12_TxIn_In *IfxGpt12_TxIn_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS];
133
134 /** \brief IfxGpt12_TxOut_Out table */
135 IFX_EXTERN const IfxGpt12_TxOut_Out *IfxGpt12_TxOut_Out_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS];
136
137 /** \} */
138
139 #endif /* IFXGPT12_PINMAP_H */
IfxGpt120_T3OUT_P21_6_OUT
IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P21_6_OUT
External output for overflow/underflow detection of core timer T3.
Definition: IfxGpt12_PinMap.h:112
IfxGpt12_Capin_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxGpt12_PinMap.h:60
IfxGpt120_T6EUDB_P10_0_IN
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T6EUDB_P10_0_IN
Count direction control input of core timer T6.
Definition: IfxGpt12_PinMap.h:100
IfxGpt120_T6EUDA_P20_0_IN
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T6EUDA_P20_0_IN
Count direction control input of core timer T6.
Definition: IfxGpt12_PinMap.h:99
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:126
IFXGPT12_PINMAP_NUM_TIMERS
#define IFXGPT12_PINMAP_NUM_TIMERS
Definition: IfxGpt12_PinMap.h:118
IfxGpt12_TxEud_In
TxEUD pin mapping structure.
Definition: IfxGpt12_PinMap.h:64
IfxGpt120_T4INB_P10_8_IN
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T4INB_P10_8_IN
Trigger/gate input of timer T4.
Definition: IfxGpt12_PinMap.h:106
IfxGpt120_T5EUDA_P21_6_IN
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T5EUDA_P21_6_IN
Count direction control input of timer T5.
Definition: IfxGpt12_PinMap.h:97
IfxGpt120_T3EUDB_P10_7_IN
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T3EUDB_P10_7_IN
Count direction control input of core timer T3.
Definition: IfxGpt12_PinMap.h:94
IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS
#define IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS
Definition: IfxGpt12_PinMap.h:120
IfxGpt120_T5INB_P10_3_IN
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T5INB_P10_3_IN
Trigger/gate input of timer T5.
Definition: IfxGpt12_PinMap.h:108
IfxGpt120_T3OUT_P10_6_OUT
IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P10_6_OUT
External output for overflow/underflow detection of core timer T3.
Definition: IfxGpt12_PinMap.h:111
IfxGpt120_T5EUDB_P10_1_IN
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T5EUDB_P10_1_IN
Count direction control input of timer T5.
Definition: IfxGpt12_PinMap.h:98
IfxGpt12_Capin_In_pinTable
IFX_EXTERN const IfxGpt12_Capin_In * IfxGpt12_Capin_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS]
IfxGpt12_Capin_In table.
Definition: IfxGpt12_PinMap.h:126
IfxGpt12_TxOut_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxGpt12_PinMap.h:87
IfxGpt120_T2EUDB_P33_6_IN
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T2EUDB_P33_6_IN
Count direction control input of timer T2.
Definition: IfxGpt12_PinMap.h:92
IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS
#define IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS
Definition: IfxGpt12_PinMap.h:122
IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS
#define IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS
Definition: IfxGpt12_PinMap.h:119
IfxGpt120_T3INA_P02_6_IN
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T3INA_P02_6_IN
Trigger/gate input of core timer T3.
Definition: IfxGpt12_PinMap.h:103
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxGpt120_T3EUDA_P02_7_IN
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T3EUDA_P02_7_IN
Count direction control input of core timer T3.
Definition: IfxGpt12_PinMap.h:93
IfxGpt120_T4EUDB_P33_5_IN
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T4EUDB_P33_5_IN
Count direction control input of timer T4.
Definition: IfxGpt12_PinMap.h:96
IfxGpt12_TxEud_In::timer
uint8 timer
Timer number.
Definition: IfxGpt12_PinMap.h:67
IfxGpt12_TxOut_Out
TxOUT pin mapping structure.
Definition: IfxGpt12_PinMap.h:82
IfxGpt12_TxEud_In_pinTable
IFX_EXTERN const IfxGpt12_TxEud_In * IfxGpt12_TxEud_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS]
IfxGpt12_TxEud_In table.
Definition: IfxGpt12_PinMap.h:129
IfxGpt120_CAPINA_P13_2_IN
IFX_EXTERN IfxGpt12_Capin_In IfxGpt120_CAPINA_P13_2_IN
Trigger input to capture value of timer T5 into CAPREL register.
Definition: IfxGpt12_PinMap.h:90
IfxGpt120_T4INA_P02_8_IN
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T4INA_P02_8_IN
Trigger/gate input of timer T4.
Definition: IfxGpt12_PinMap.h:105
IfxGpt120_T2INA_P00_7_IN
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T2INA_P00_7_IN
Trigger/gate input of timer T2.
Definition: IfxGpt12_PinMap.h:101
IfxGpt12_TxOut_Out_pinTable
IFX_EXTERN const IfxGpt12_TxOut_Out * IfxGpt12_TxOut_Out_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS]
IfxGpt12_TxOut_Out table.
Definition: IfxGpt12_PinMap.h:135
IFXGPT12_PINMAP_NUM_MODULES
#define IFXGPT12_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxGpt12_PinMap.h:117
IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS
#define IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS
Definition: IfxGpt12_PinMap.h:121
IfxGpt120_T6OUT_P10_5_OUT
IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P10_5_OUT
External output for overflow/underflow detection of core timer T6.
Definition: IfxGpt12_PinMap.h:113
IfxGpt120_T3INB_P10_4_IN
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T3INB_P10_4_IN
Trigger/gate input of core timer T3.
Definition: IfxGpt12_PinMap.h:104
IfxGpt12_TxIn_In
TxIN pin mapping structure.
Definition: IfxGpt12_PinMap.h:73
IfxGpt120_T6OUT_P21_7_OUT
IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P21_7_OUT
External output for overflow/underflow detection of core timer T6.
Definition: IfxGpt12_PinMap.h:114
IfxGpt120_T6INA_P20_3_IN
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T6INA_P20_3_IN
Trigger/gate input of core timer T6.
Definition: IfxGpt12_PinMap.h:109
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:246
Ifx_RxSel
Ifx_RxSel
input multiplexer definition used in PinMaps
Definition: Ifx_Types.h:127
IfxGpt12_TxIn_In_pinTable
IFX_EXTERN const IfxGpt12_TxIn_In * IfxGpt12_TxIn_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS]
IfxGpt12_TxIn_In table.
Definition: IfxGpt12_PinMap.h:132
IfxGpt120_T5INA_P21_7_IN
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T5INA_P21_7_IN
Trigger/gate input of timer T5.
Definition: IfxGpt12_PinMap.h:107
IfxGpt12_Capin_In::module
Ifx_GPT12 * module
Base address.
Definition: IfxGpt12_PinMap.h:58
IfxGpt120_T6INB_P10_2_IN
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T6INB_P10_2_IN
Trigger/gate input of core timer T6.
Definition: IfxGpt12_PinMap.h:110
IfxGpt12_cfg.h
GPT12 on-chip implementation data.
IfxGpt12_Capin_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxGpt12_PinMap.h:59
IfxGpt120_T4EUDA_P00_9_IN
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T4EUDA_P00_9_IN
Count direction control input of timer T4.
Definition: IfxGpt12_PinMap.h:95
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxGpt120_T2INB_P33_7_IN
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T2INB_P33_7_IN
Trigger/gate input of timer T2.
Definition: IfxGpt12_PinMap.h:102
IfxGpt120_T2EUDA_P00_8_IN
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T2EUDA_P00_8_IN
Count direction control input of timer T2.
Definition: IfxGpt12_PinMap.h:91
IfxGpt12_Capin_In
CAPIN pin mapping structure.
Definition: IfxGpt12_PinMap.h:56
IfxPort.h
PORT basic functionality.


iLLD_TC38A: IfxGpt12_cfg.h Source File

  • _Impl
IfxGpt12_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxGpt12_cfg.h
3 * \brief GPT12 on-chip implementation data
4 * \ingroup IfxLld_Gpt12
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Gpt12 GPT12
42 * \ingroup IfxLld
43 * \defgroup IfxLld_Gpt12_Impl Implementation
44 * \ingroup IfxLld_Gpt12
45 * \defgroup IfxLld_Gpt12_Std Standard Driver
46 * \ingroup IfxLld_Gpt12
47 */
48
49 #ifndef IFXGPT12_CFG_H
50 #define IFXGPT12_CFG_H 1
51
52 /******************************************************************************/
53 /*----------------------------------Includes----------------------------------*/
54 /******************************************************************************/
55
56 /******************************************************************************/
57 /*-----------------------------------Macros-----------------------------------*/
58 /******************************************************************************/
59
60 #define IFXGPT12_NUM_MODULES (1)
61
62 #endif /* IFXGPT12_CFG_H */


iLLD_TC38A: IfxGtm.c Source File

  • Gtm
  • Std
IfxGtm.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm.c
3 * \brief GTM basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxGtm.h"
47 #include "Scu/Std/IfxScuWdt.h"
48 #include "Scu/Std/IfxScuCcu.h"
49
50 /******************************************************************************/
51 /*-------------------------Function Implementations---------------------------*/
52 /******************************************************************************/
53
54 void IfxGtm_disable(Ifx_GTM *gtm)
55 {
56 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
57
58 IfxScuWdt_clearCpuEndinit(psw);
59 gtm->CLC.B.DISR = 1;
60 IfxScuWdt_setCpuEndinit(psw);
61 }
62
63
64 void IfxGtm_enable(Ifx_GTM *gtm)
65 {
66 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
67
68 IfxScuWdt_clearCpuEndinit(psw);
69 gtm->CLC.B.DISR = 0;
70 IfxScuWdt_setCpuEndinit(psw);
71 }
72
73
74 float32 IfxGtm_getSysClkFrequency(void)
75 {
76 return IfxScuCcu_getGtmFrequency();
77 }
78
79
80 float32 IfxGtm_getClusterFrequency(Ifx_GTM *gtm, IfxGtm_Cluster cluster)
81 {
82 float32 Freq;
83 uint8 clsDiv = ((gtm->CLS_CLK_CFG.U) >> (cluster * 2)) & 0x3;
84
85 if (clsDiv == 0)
86 {
87 Freq = 0.0; /* cluster is disabled - return 0 */
88 }
89 else
90 {
91 Freq = IfxGtm_getSysClkFrequency() / clsDiv;
92 }
93
94 return Freq;
95 }
IfxGtm_getClusterFrequency
float32 IfxGtm_getClusterFrequency(Ifx_GTM *gtm, IfxGtm_Cluster cluster)
returns the cluster frequency of the GTM cluster. If the cluster is disabled, then it will return 0 a...
Definition: IfxGtm.c:80
float32
float float32
Definition: Platform_Types.h:170
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxScuWdt.h
SCU basic functionality.
IfxGtm_disable
void IfxGtm_disable(Ifx_GTM *gtm)
Disables the module.
Definition: IfxGtm.c:54
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxGtm_getSysClkFrequency
float32 IfxGtm_getSysClkFrequency(void)
returns the GTM SYSCLK frequency. Refer to the Clock distribution for details on GTM SYS CLK...
Definition: IfxGtm.c:74
IfxScuCcu_getGtmFrequency
IFX_INLINE float32 IfxScuCcu_getGtmFrequency(void)
API to get GTMdivider frequency This API returns the based on the divider value in CCUCON register an...
Definition: IfxScuCcu.h:1597
IfxGtm_Cluster
IfxGtm_Cluster
Enumeration listing the clusters of GTM.
Definition: IfxGtm_cfg.h:287
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxScuCcu.h
SCU basic functionality.
IfxGtm_enable
void IfxGtm_enable(Ifx_GTM *gtm)
Enables the module.
Definition: IfxGtm.c:64
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxGtm.h
GTM basic functionality.


iLLD_TC38A: IfxGtm.h Source File

  • Gtm
  • Std
IfxGtm.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm.h
3 * \brief GTM basic functionality
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Gtm_Std_Basic_Functions Basic Functions
42 * \ingroup IfxLld_Gtm_Std
43 * \defgroup IfxLld_Gtm_Std_Enumerations Enumerations
44 * \ingroup IfxLld_Gtm_Std
45 */
46
47 #ifndef IFXGTM_H
48 #define IFXGTM_H 1
49
50 /******************************************************************************/
51 /*----------------------------------Includes----------------------------------*/
52 /******************************************************************************/
53
54 #include "_Impl/IfxGtm_cfg.h"
55
56 /******************************************************************************/
57 /*--------------------------------Enumerations--------------------------------*/
58 /******************************************************************************/
59
60 /** \addtogroup IfxLld_Gtm_Std_Enumerations
61 * \{ */
62 /** \brief Enum for GTM interrupt modes
63 */
64 typedef enum
65 {
66 IfxGtm_IrqMode_level = 0,
67 IfxGtm_IrqMode_pulse = 1,
68 IfxGtm_IrqMode_pulseNotify = 2,
69 IfxGtm_IrqMode_singlePulse = 3
70 } IfxGtm_IrqMode;
71
72 /** \brief OCDS Suspend Control (OCDS.SUS)
73 */
74 typedef enum
75 {
76 IfxGtm_SuspendMode_none = 0, /**< \brief No suspend */
77 IfxGtm_SuspendMode_hard = 1, /**< \brief Hard Suspend */
78 IfxGtm_SuspendMode_soft = 2 /**< \brief Soft Suspend */
79 } IfxGtm_SuspendMode;
80
81 /** \} */
82
83 /** \addtogroup IfxLld_Gtm_Std_Basic_Functions
84 * \{ */
85
86 /******************************************************************************/
87 /*-------------------------Inline Function Prototypes-------------------------*/
88 /******************************************************************************/
89
90 /** \brief Returs the status of module enabled or disabled
91 * \param gtm Pointer to GTM module
92 * \return status: TRUE/FALSE
93 */
94 IFX_INLINE boolean IfxGtm_isEnabled(Ifx_GTM *gtm);
95
96 /** \brief Returns the module's suspend state.
97 * TRUE :if module is suspended.
98 * FALSE:if module is not yet suspended.
99 * \param gtm Pointer to GTM module registers
100 * \return Suspend status (TRUE / FALSE)
101 */
102 IFX_INLINE boolean IfxGtm_isModuleSuspended(Ifx_GTM *gtm);
103
104 /** \brief Configure the Module to Hard/Soft suspend mode.
105 * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
106 * \param gtm Pointer to GTM module registers
107 * \param mode Module suspend mode
108 * \return None
109 */
110 IFX_INLINE void IfxGtm_setSuspendMode(Ifx_GTM *gtm, IfxGtm_SuspendMode mode);
111
112 /******************************************************************************/
113 /*-------------------------Global Function Prototypes-------------------------*/
114 /******************************************************************************/
115
116 /** \brief Disables the module
117 * \param gtm Pointer to GTM module
118 * \return None
119 */
120 IFX_EXTERN void IfxGtm_disable(Ifx_GTM *gtm);
121
122 /** \brief Enables the module
123 * \param gtm Pointer to GTM module
124 * \return None
125 */
126 IFX_EXTERN void IfxGtm_enable(Ifx_GTM *gtm);
127
128 /** \} */
129
130 /******************************************************************************/
131 /*-------------------------Global Function Prototypes-------------------------*/
132 /******************************************************************************/
133
134 /** \brief returns the GTM SYSCLK frequency.
135 * Refer to the Clock distribution for details on GTM SYS CLK.
136 * \return sysFreq
137 */
138 IFX_EXTERN float32 IfxGtm_getSysClkFrequency(void);
139
140 /** \brief returns the cluster frequency of the GTM cluster.
141 * If the cluster is disabled, then it will return 0 as frequency.
142 * \param gtm pointer to gtm device
143 * \param cluster index of cluster
144 * \return cluster frequency
145 */
146 IFX_EXTERN float32 IfxGtm_getClusterFrequency(Ifx_GTM *gtm, IfxGtm_Cluster cluster);
147
148 /******************************************************************************/
149 /*---------------------Inline Function Implementations------------------------*/
150 /******************************************************************************/
151
152 IFX_INLINE boolean IfxGtm_isEnabled(Ifx_GTM *gtm)
153 {
154 return gtm->CLC.B.DISS == 0;
155 }
156
157
158 IFX_INLINE boolean IfxGtm_isModuleSuspended(Ifx_GTM *gtm)
159 {
160 Ifx_GTM_OCDS_OCS ocs;
161
162 // read the status
163 ocs.U = gtm->OCDS.OCS.U;
164
165 // return the status
166 return ocs.B.SUSSTA;
167 }
168
169
170 IFX_INLINE void IfxGtm_setSuspendMode(Ifx_GTM *gtm, IfxGtm_SuspendMode mode)
171 {
172 Ifx_GTM_OCDS_OCS ocs;
173
174 // remove protection and configure the suspend mode.
175 ocs.B.SUS_P = 1;
176 ocs.B.SUS = mode;
177
178 gtm->OCDS.OCS.U = ocs.U;
179 }
180
181
182 #endif /* IFXGTM_H */
IfxGtm_IrqMode_level
Definition: IfxGtm.h:66
IfxGtm_getClusterFrequency
IFX_EXTERN float32 IfxGtm_getClusterFrequency(Ifx_GTM *gtm, IfxGtm_Cluster cluster)
returns the cluster frequency of the GTM cluster. If the cluster is disabled, then it will return 0 a...
Definition: IfxGtm.c:80
IfxGtm_IrqMode_pulse
Definition: IfxGtm.h:67
float32
float float32
Definition: Platform_Types.h:170
IfxGtm_isModuleSuspended
IFX_INLINE boolean IfxGtm_isModuleSuspended(Ifx_GTM *gtm)
Returns the module&#39;s suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspende...
Definition: IfxGtm.h:158
IfxGtm_isEnabled
IFX_INLINE boolean IfxGtm_isEnabled(Ifx_GTM *gtm)
Returs the status of module enabled or disabled.
Definition: IfxGtm.h:152
IfxGtm_disable
IFX_EXTERN void IfxGtm_disable(Ifx_GTM *gtm)
Disables the module.
Definition: IfxGtm.c:54
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxGtm_SuspendMode_soft
Soft Suspend.
Definition: IfxGtm.h:78
IfxGtm_setSuspendMode
IFX_INLINE void IfxGtm_setSuspendMode(Ifx_GTM *gtm, IfxGtm_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and...
Definition: IfxGtm.h:170
IfxGtm_SuspendMode_none
No suspend.
Definition: IfxGtm.h:76
IfxGtm_getSysClkFrequency
IFX_EXTERN float32 IfxGtm_getSysClkFrequency(void)
returns the GTM SYSCLK frequency. Refer to the Clock distribution for details on GTM SYS CLK...
Definition: IfxGtm.c:74
IfxGtm_Cluster
IfxGtm_Cluster
Enumeration listing the clusters of GTM.
Definition: IfxGtm_cfg.h:287
IfxGtm_IrqMode_pulseNotify
Definition: IfxGtm.h:68
IfxGtm_SuspendMode
IfxGtm_SuspendMode
OCDS Suspend Control (OCDS.SUS)
Definition: IfxGtm.h:74
IfxGtm_SuspendMode_hard
Hard Suspend.
Definition: IfxGtm.h:77
IfxGtm_enable
IFX_EXTERN void IfxGtm_enable(Ifx_GTM *gtm)
Enables the module.
Definition: IfxGtm.c:64
IfxGtm_IrqMode
IfxGtm_IrqMode
Enum for GTM interrupt modes.
Definition: IfxGtm.h:64
IfxGtm_IrqMode_singlePulse
Definition: IfxGtm.h:69
IfxGtm_cfg.h
GTM on-chip implementation data.


iLLD_TC38A: IfxGtm_Atom.c Source File

  • Gtm
  • Std
IfxGtm_Atom.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Atom.c
3 * \brief GTM basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxGtm_Atom.h"
47 #include "IfxGtm_bf.h"
48
49 /******************************************************************************/
50 /*----------------------------------Macros------------------------------------*/
51 /******************************************************************************/
52
53 /** \brief Number of channels per ATOM AGC
54 */
55 #define IFXGTM_ATOM_NUM_AGC_CHANNELS (8)
56
57 /******************************************************************************/
58 /*-------------------------Function Implementations---------------------------*/
59 /******************************************************************************/
60
61 uint32 IfxGtm_Atom_Agc_buildFeature(uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset)
62 {
63 uint8 i;
64 uint32 reg = 0;
65 uint32 mask = enableMask | (disableMask << 16);
66
67 for (i = 0; i < IFXGTM_ATOM_NUM_AGC_CHANNELS; i++)
68 {
69 /* Bitfield length is 2 bits */
70 uint8 shift = (i * 2) + bitfieldOffset;
71
72 if (mask & 0x1)
73 {
74 reg |= IfxGtm_FeatureControl_enable << shift;
75 }
76
77 if (mask & 0x10000)
78 {
79 reg |= IfxGtm_FeatureControl_disable << shift;
80 }
81
82 mask = mask >> 1;
83 }
84
85 return reg;
86 }
87
88
89 uint32 IfxGtm_Atom_Agc_buildFeatureForChannel(IfxGtm_Atom_Ch channel, boolean enabled, uint8 bitfieldOffset)
90 {
91 uint32 reg = 0;
92
93 /* Bitfield length is 2 bits */
94 uint8 shift = (((uint8)channel % 8) * 2) + bitfieldOffset;
95
96 if (enabled == 1)
97 {
98 reg = IfxGtm_FeatureControl_enable << shift;
99 }
100 else
101 {
102 reg = IfxGtm_FeatureControl_disable << shift;
103 }
104
105 return reg;
106 }
107
108
109 void IfxGtm_Atom_Agc_enableChannel(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate)
110 {
111 uint32 value;
112
113 value = IfxGtm_Atom_Agc_buildFeatureForChannel(channel, enabled, IFX_GTM_ATOM_AGC_ENDIS_CTRL_ENDIS_CTRL0_OFF);
114
115 if (immediate)
116 {
117 agc->ENDIS_CTRL.U = value;
118 agc->ENDIS_STAT.U = value;
119 }
120 else
121 {
122 agc->ENDIS_CTRL.U = value;
123 }
124 }
125
126
127 void IfxGtm_Atom_Agc_enableChannelOutput(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate)
128 {
129 uint32 value;
130
131 value = IfxGtm_Atom_Agc_buildFeatureForChannel(channel, enabled, IFX_GTM_ATOM_AGC_OUTEN_CTRL_OUTEN_CTRL0_OFF);
132
133 if (immediate)
134 {
135 agc->OUTEN_CTRL.U = value;
136 agc->OUTEN_STAT.U = value;
137 }
138 else
139 {
140 agc->OUTEN_CTRL.U = value;
141 }
142 }
143
144
145 void IfxGtm_Atom_Agc_enableChannelUpdate(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled)
146 {
147 agc->GLB_CTRL.U = IfxGtm_Atom_Agc_buildFeatureForChannel(channel, enabled, IFX_GTM_ATOM_AGC_GLB_CTRL_UPEN_CTRL0_OFF);
148 }
149
150
151 void IfxGtm_Atom_Agc_enableChannels(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
152 {
153 uint32 value;
154
155 value = IfxGtm_Atom_Agc_buildFeature(enableMask, disableMask, IFX_GTM_ATOM_AGC_ENDIS_CTRL_ENDIS_CTRL0_OFF);
156
157 if (immediate)
158 {
159 agc->ENDIS_CTRL.U = value;
160 agc->ENDIS_STAT.U = value;
161 }
162 else
163 {
164 agc->ENDIS_CTRL.U = value;
165 }
166 }
167
168
169 void IfxGtm_Atom_Agc_enableChannelsOutput(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
170 {
171 uint32 value;
172
173 value = IfxGtm_Atom_Agc_buildFeature(enableMask, disableMask, IFX_GTM_ATOM_AGC_OUTEN_CTRL_OUTEN_CTRL0_OFF);
174
175 if (immediate)
176 {
177 agc->OUTEN_CTRL.U = value;
178 agc->OUTEN_STAT.U = value;
179 }
180 else
181 {
182 agc->OUTEN_CTRL.U = value;
183 }
184 }
185
186
187 void IfxGtm_Atom_Agc_enableChannelsTrigger(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask)
188 {
189 agc->INT_TRIG.U = IfxGtm_Atom_Agc_buildFeature(enableMask, disableMask, IFX_GTM_ATOM_AGC_INT_TRIG_INT_TRIG0_OFF);
190 }
191
192
193 void IfxGtm_Atom_Agc_enableChannelsUpdate(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask)
194 {
195 agc->GLB_CTRL.U = IfxGtm_Atom_Agc_buildFeature(enableMask, disableMask, IFX_GTM_ATOM_AGC_GLB_CTRL_UPEN_CTRL0_OFF);
196 }
197
198
199 void IfxGtm_Atom_Agc_enableTimeTrigger(Ifx_GTM_ATOM_AGC *agc, boolean enabled)
200 {
201 agc->ACT_TB.B.TB_TRIG = enabled ? 1 : 0;
202 }
203
204
205 void IfxGtm_Atom_Agc_resetChannels(Ifx_GTM_ATOM_AGC *agc, uint32 resetMask)
206 {
207 uint8 i;
208 uint32 reg = 0;
209
210 for (i = 0; i < IFXGTM_ATOM_NUM_AGC_CHANNELS; i++)
211 {
212 if (resetMask & 0x1)
213 {
214 reg |= 1 << i;
215 }
216
217 resetMask = resetMask >> 1;
218 }
219
220 agc->GLB_CTRL.U = reg << IFX_GTM_ATOM_AGC_GLB_CTRL_RST_CH0_OFF;
221 }
222
223
224 void IfxGtm_Atom_Agc_setChannelForceUpdate(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean resetEnabled)
225 {
226 uint32 regEnable, regReset;
227
228 regEnable = IfxGtm_Atom_Agc_buildFeatureForChannel(channel, enabled, IFX_GTM_ATOM_AGC_FUPD_CTRL_FUPD_CTRL0_OFF);
229 regReset = IfxGtm_Atom_Agc_buildFeatureForChannel(channel, resetEnabled, IFX_GTM_ATOM_AGC_FUPD_CTRL_RSTCN0_CH0_OFF);
230
231 agc->FUPD_CTRL.U = regEnable | (regReset << 16);
232 }
233
234
235 void IfxGtm_Atom_Agc_setChannelsForceUpdate(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
236 {
237 uint32 regEnable, regReset;
238
239 regEnable = IfxGtm_Atom_Agc_buildFeature(enableMask, disableMask, IFX_GTM_ATOM_AGC_FUPD_CTRL_FUPD_CTRL0_OFF);
240 regReset = IfxGtm_Atom_Agc_buildFeature(resetEnableMask, resetDisableMask, IFX_GTM_ATOM_AGC_FUPD_CTRL_RSTCN0_CH0_OFF);
241 agc->FUPD_CTRL.U = regEnable | regReset;
242 }
243
244
245 void IfxGtm_Atom_Agc_setTimeTrigger(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Tbu_Ts base, uint32 value)
246 {
247 Ifx_GTM_ATOM_AGC_ACT_TB act_tb;
248
249 act_tb.U = agc->ACT_TB.U;
250 act_tb.B.TBU_SEL = base;
251 act_tb.B.ACT_TB = value;
252 agc->ACT_TB.U = act_tb.U;
253 }
254
255
256 void IfxGtm_Atom_Agc_trigger(Ifx_GTM_ATOM_AGC *agc)
257 {
258 agc->GLB_CTRL.U = 1 << IFX_GTM_ATOM_AGC_GLB_CTRL_HOST_TRIG_OFF;
259 }
260
261
262 void IfxGtm_Atom_Ch_clearOneNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
263 {
264 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
265
266 atomCh->IRQ.NOTIFY.B.CCU1TC = 1;
267 }
268
269
270 void IfxGtm_Atom_Ch_clearZeroNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
271 {
272 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
273
274 atomCh->IRQ.NOTIFY.B.CCU0TC = 1;
275 }
276
277
278 void IfxGtm_Atom_Ch_configurePwmMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock, Ifx_ActiveState activeState, IfxGtm_Atom_Ch_ResetEvent resetEvent, IfxGtm_Atom_Ch_OutputTrigger trigger)
279 {
280 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
281 Ifx_GTM_ATOM_CH_CTRL ctrl;
282
283 ctrl.U = 0;
284 ctrl.B.MODE = IfxGtm_Atom_Mode_outputPwm;
285
286 ctrl.B.CLK_SRC_SR = clock;
287
288 ctrl.B.RST_CCU0 = resetEvent;
289 ctrl.B.SL = (activeState == Ifx_ActiveState_high ? 1 : 0);
290 ctrl.B.TRIGOUT = trigger;
291
292 atomCh->CTRL.U = ctrl.U;
293 }
294
295
296 float32 IfxGtm_Atom_Ch_getClockFrequency(Ifx_GTM *gtm, Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
297 {
298 IfxGtm_Cmu_Clk clock;
299
300 clock = IfxGtm_Atom_Ch_getClockSource(atom, channel);
301
302 return IfxGtm_Cmu_getClkFrequency(gtm, clock, TRUE);
303 }
304
305
306 IfxGtm_Cmu_Clk IfxGtm_Atom_Ch_getClockSource(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
307 {
308 IfxGtm_Cmu_Clk clock;
309 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
310 clock = (IfxGtm_Cmu_Clk)atomCh->CTRL.B.CLK_SRC_SR;
311
312 return clock;
313 }
314
315
316 uint32 IfxGtm_Atom_Ch_getCompareOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
317 {
318 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
319
320 return atomCh->CM1.U;
321 }
322
323
324 volatile uint32 *IfxGtm_Atom_Ch_getCompareOnePointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
325 {
326 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
327
328 return (volatile uint32 *)&atomCh->CM1;
329 }
330
331
332 uint32 IfxGtm_Atom_Ch_getCompareZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
333 {
334 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
335
336 return atomCh->CM0.U;
337 }
338
339
340 volatile uint32 *IfxGtm_Atom_Ch_getCompareZeroPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
341 {
342 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
343
344 return (volatile uint32 *)&atomCh->CM0;
345 }
346
347
348 boolean IfxGtm_Atom_Ch_getOutputLevel(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
349 {
350 boolean result;
351 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
352
353 result = atomCh->STAT.B.OL == 1;
354
355 return result;
356 }
357
358
359 volatile Ifx_SRC_SRCR *IfxGtm_Atom_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Atom atom, IfxGtm_Atom_Ch channel)
360 {
361 IFX_UNUSED_PARAMETER(gtm)
362 return &MODULE_SRC.GTM_ATOM[atom][channel / 2];
363 }
364
365
366 volatile uint32 *IfxGtm_Atom_Ch_getTimerPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
367 {
368 return (volatile uint32 *)((uint32)&(atom->CH0.CN0.U) + channel * (offsetof(Ifx_GTM_ATOM, CH1) - offsetof(Ifx_GTM_ATOM, CH0)));
369 }
370
371
372 boolean IfxGtm_Atom_Ch_isOneNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
373 {
374 boolean result;
375 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
376 result = atomCh->IRQ.NOTIFY.B.CCU1TC != 0;
377 return result;
378 }
379
380
381 boolean IfxGtm_Atom_Ch_isZeroNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
382 {
383 boolean result;
384 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
385 result = atomCh->IRQ.NOTIFY.B.CCU0TC != 0;
386 return result;
387 }
388
389
390 void IfxGtm_Atom_Ch_raiseInterruptOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
391 {
392 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
393
394 atomCh->IRQ.FORCINT.B.TRG_CCU1TC = 1;
395 }
396
397
398 void IfxGtm_Atom_Ch_raiseInterruptZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
399 {
400 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
401
402 atomCh->IRQ.FORCINT.B.TRG_CCU0TC = 1;
403 }
404
405
406 void IfxGtm_Atom_Ch_setClockSource(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock)
407 {
408 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
409
410 atomCh->CTRL.B.CLK_SRC_SR = clock;
411 }
412
413
414 void IfxGtm_Atom_Ch_setCompare(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareZero, uint32 compareOne)
415 {
416 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
417
418 atomCh->CM0.U = compareZero; // TK: replaced .B access to optimize runtime
419 atomCh->CM1.U = compareOne;
420 }
421
422
423 void IfxGtm_Atom_Ch_setCompareOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareOne)
424 {
425 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
426
427 atomCh->CM1.U = compareOne; // TK: replaced .B access to optimize runtime
428 }
429
430
431 void IfxGtm_Atom_Ch_setCompareOneShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowOne)
432 {
433 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
434
435 atomCh->SR1.U = shadowOne; // TK: replaced .B access to optimize runtime
436 }
437
438
439 void IfxGtm_Atom_Ch_setCompareZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareZero)
440 {
441 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
442
443 atomCh->CM0.U = compareZero; // TK: replaced .B access to optimize runtime
444 }
445
446
447 void IfxGtm_Atom_Ch_setCompareZeroShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowZero)
448 {
449 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
450
451 atomCh->SR0.U = shadowZero; // TK: replaced .B access to optimize runtime
452 }
453
454
455 void IfxGtm_Atom_Ch_setCounterValue(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 value)
456 {
457 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
458
459 atomCh->CN0.U = value; // TK: replaced .B access to optimize runtime
460 }
461
462
463 void IfxGtm_Atom_Ch_setMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Mode mode)
464 {
465 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
466
467 atomCh->CTRL.B.MODE = mode;
468 }
469
470
471 void IfxGtm_Atom_Ch_setNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne)
472 {
473 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
474
475 Ifx_GTM_ATOM_CH_IRQ_EN en;
476 en.U = atomCh->IRQ.EN.U;
477
478 /* Disable all interrupts of the interrupt set to change mode */
479 atomCh->IRQ.EN.U = IFX_ZEROS;
480 atomCh->IRQ.MODE.B.IRQ_MODE = mode;
481 atomCh->IRQ.EN.U = en.U; /* Set the values back */
482
483 en.B.CCU0TC_IRQ_EN = interruptOnCompareZero ? 1 : 0;
484 en.B.CCU1TC_IRQ_EN = interruptOnCompareOne ? 1 : 0;
485 atomCh->IRQ.EN.U = en.U;
486 }
487
488
489 void IfxGtm_Atom_Ch_setOneShotMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, boolean enabled)
490 {
491 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
492
493 atomCh->CTRL.B.OSM = enabled ? 1 : 0;
494 }
495
496
497 void IfxGtm_Atom_Ch_setResetSource(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Ch_ResetEvent event)
498 {
499 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
500
501 atomCh->CTRL.B.RST_CCU0 = event;
502 }
503
504
505 void IfxGtm_Atom_Ch_setSignalLevel(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, Ifx_ActiveState activeState)
506 {
507 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
508
509 atomCh->CTRL.B.SL = activeState == Ifx_ActiveState_high ? 1 : 0;
510 }
511
512
513 void IfxGtm_Atom_Ch_setTriggerOutput(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Ch_OutputTrigger trigger)
514 {
515 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
516
517 atomCh->CTRL.B.TRIGOUT = trigger;
518 }
519
520
521 void IfxGtm_Atom_Ch_setAruInput(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, boolean enabled)
522 {
523 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
524
525 atomCh->CTRL.B.ARU_EN = enabled;
526 }
527
528
529 uint32 IfxGtm_Atom_Ch_getCounterValue(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
530 {
531 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
532
533 return atomCh->CN0.U;
534 }
535
536
537 void IfxGtm_Atom_Ch_setSomcControl(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_SomcControl control)
538 {
539 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
540
541 atomCh->SOMC.B.ACB_4_3_2 = control;
542 }
543
544
545 void IfxGtm_Atom_Ch_setSomcSignalLevelControl(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_SomcSignalLevelControl ctrl)
546 {
547 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
548
549 atomCh->SOMC.B.ACB_1_0 = ctrl;
550 }
551
552
553 void IfxGtm_Atom_Ch_setAruReadAddress0(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 address)
554 {
555 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
556 atomCh->RDADDR.B.RDADDR0 = address;
557 }
558
559
560 void IfxGtm_Atom_Ch_setAruReadAddress1(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 address)
561 {
562 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
563 atomCh->RDADDR.B.RDADDR1 = address;
564 }
565
566
567 uint32 IfxGtm_Atom_getShadowZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
568 {
569 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
570
571 return atomCh->SR0.U;
572 }
573
574
575 volatile uint32 *IfxGtm_Atom_getShadowZeroPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
576 {
577 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
578
579 return (volatile uint32 *)&atomCh->SR0;
580 }
581
582
583 uint32 IfxGtm_Atom_getShadowOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
584 {
585 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
586
587 return atomCh->SR1.U;
588 }
589
590
591 volatile uint32 *IfxGtm_Atom_getShadowOnePointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
592 {
593 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
594
595 return (volatile uint32 *)&atomCh->SR1;
596 }
IfxGtm_Atom_Agc_enableChannelsOutput
void IfxGtm_Atom_Agc_enableChannelsOutput(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels output (OUTEN)
Definition: IfxGtm_Atom.c:169
Ifx_ActiveState_high
The signal is high active.
Definition: Ifx_Types.h:116
IfxGtm_Atom_Ch_setResetSource
void IfxGtm_Atom_Ch_setResetSource(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Ch_ResetEvent event)
Sets the channel clock source either from local or from previous channel.
Definition: IfxGtm_Atom.c:497
IfxGtm_Atom_Ch_ResetEvent
IfxGtm_Atom_Ch_ResetEvent
Reset event for channel counter CN0.
Definition: IfxGtm_Atom.h:85
IfxGtm_Atom_getShadowZero
uint32 IfxGtm_Atom_getShadowZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the shadow zero value.
Definition: IfxGtm_Atom.c:567
IfxGtm_Atom_Agc_setChannelsForceUpdate
void IfxGtm_Atom_Agc_setChannelsForceUpdate(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
Enable/disable one or more channels for the force update feature (FUPD)
Definition: IfxGtm_Atom.c:235
IfxGtm_Atom_getShadowZeroPointer
volatile uint32 * IfxGtm_Atom_getShadowZeroPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the shadow zero pointer.
Definition: IfxGtm_Atom.c:575
IfxGtm_Atom_Ch_clearOneNotification
void IfxGtm_Atom_Ch_clearOneNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Clears the channel One notification.
Definition: IfxGtm_Atom.c:262
IfxGtm_Atom_Ch_setNotification
void IfxGtm_Atom_Ch_setNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne)
Sets the channel notification.
Definition: IfxGtm_Atom.c:471
IfxGtm_Tbu_Ts
IfxGtm_Tbu_Ts
GTM TOM TBU Time stamps.
Definition: IfxGtm_Tbu.h:66
IfxGtm_Atom_Ch_clearZeroNotification
void IfxGtm_Atom_Ch_clearZeroNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Clears the channel Zero notification.
Definition: IfxGtm_Atom.c:270
IfxGtm_Atom_Ch_getClockSource
IfxGtm_Cmu_Clk IfxGtm_Atom_Ch_getClockSource(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the channel clock source.
Definition: IfxGtm_Atom.c:306
IfxGtm_Atom_Agc_buildFeature
uint32 IfxGtm_Atom_Agc_buildFeature(uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable.
Definition: IfxGtm_Atom.c:61
IfxGtm_Atom_Ch_setAruInput
void IfxGtm_Atom_Ch_setAruInput(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, boolean enabled)
enable/disable ARU input for the ATOM channel specified.
Definition: IfxGtm_Atom.c:521
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxGtm_Atom_SomcSignalLevelControl
IfxGtm_Atom_SomcSignalLevelControl
SOMC signal level Control.
Definition: IfxGtm_Atom.h:127
float32
float float32
Definition: Platform_Types.h:170
IfxGtm_Atom_Ch_configurePwmMode
void IfxGtm_Atom_Ch_configurePwmMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock, Ifx_ActiveState activeState, IfxGtm_Atom_Ch_ResetEvent resetEvent, IfxGtm_Atom_Ch_OutputTrigger trigger)
Definition: IfxGtm_Atom.c:278
IfxGtm_Atom
IfxGtm_Atom
Enum for ATOM objects.
Definition: IfxGtm_cfg.h:243
IfxGtm_Atom_Agc_setTimeTrigger
void IfxGtm_Atom_Agc_setTimeTrigger(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Tbu_Ts base, uint32 value)
Sets the trigger time base and time base value.
Definition: IfxGtm_Atom.c:245
IFXGTM_ATOM_NUM_AGC_CHANNELS
#define IFXGTM_ATOM_NUM_AGC_CHANNELS
Number of channels per ATOM AGC.
Definition: IfxGtm_Atom.c:55
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:113
IfxGtm_Atom_Agc_enableChannelsUpdate
void IfxGtm_Atom_Agc_enableChannelsUpdate(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask)
Enable/disable one or more channels for update (UPEN)
Definition: IfxGtm_Atom.c:193
IfxGtm_Atom_Ch_setCompareOne
void IfxGtm_Atom_Ch_setCompareOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareOne)
Sets the compare 1 value.
Definition: IfxGtm_Atom.c:423
IfxGtm_Atom_Ch_getClockFrequency
float32 IfxGtm_Atom_Ch_getClockFrequency(Ifx_GTM *gtm, Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the ATOM channel input clock frequency in Hz.
Definition: IfxGtm_Atom.c:296
IfxGtm_Atom_Ch_raiseInterruptOne
void IfxGtm_Atom_Ch_raiseInterruptOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Raises the interrupt for Compare 1.
Definition: IfxGtm_Atom.c:390
IfxGtm_Atom_Ch_getChannelPointer
IFX_INLINE Ifx_GTM_ATOM_CH * IfxGtm_Atom_Ch_getChannelPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the base addredd of selected Atom channel.
Definition: IfxGtm_Atom.h:631
IfxGtm_Atom_Ch_setCounterValue
void IfxGtm_Atom_Ch_setCounterValue(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 value)
Sets the counter value.
Definition: IfxGtm_Atom.c:455
IfxGtm_Atom_Agc_enableChannelUpdate
void IfxGtm_Atom_Agc_enableChannelUpdate(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled)
Enable/disable one channel for update (UPEN)
Definition: IfxGtm_Atom.c:145
IfxGtm_Atom_Ch_getCounterValue
uint32 IfxGtm_Atom_Ch_getCounterValue(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Get the counter value.
Definition: IfxGtm_Atom.c:529
IfxGtm_FeatureControl_disable
disable
Definition: IfxGtm_cfg.h:337
IfxGtm_Atom_Ch_getSrcPointer
volatile Ifx_SRC_SRCR * IfxGtm_Atom_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Atom atom, IfxGtm_Atom_Ch channel)
Returns a pointer to the ATOM channel SRC.
Definition: IfxGtm_Atom.c:359
IfxGtm_Atom_Ch_raiseInterruptZero
void IfxGtm_Atom_Ch_raiseInterruptZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Raises the interrupt for Compare 0.
Definition: IfxGtm_Atom.c:398
IfxGtm_Atom_Agc_enableChannels
void IfxGtm_Atom_Agc_enableChannels(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels (ENDIS)
Definition: IfxGtm_Atom.c:151
IfxGtm_Atom_Agc_buildFeatureForChannel
uint32 IfxGtm_Atom_Agc_buildFeatureForChannel(IfxGtm_Atom_Ch channel, boolean enabled, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable for a single channel.
Definition: IfxGtm_Atom.c:89
IfxGtm_Atom_Ch_getTimerPointer
volatile uint32 * IfxGtm_Atom_Ch_getTimerPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the Timer pointer.
Definition: IfxGtm_Atom.c:366
IfxGtm_Atom_Ch_getOutputLevel
boolean IfxGtm_Atom_Ch_getOutputLevel(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Gets the ATOM output level.
Definition: IfxGtm_Atom.c:348
IfxGtm_Atom_Mode
IfxGtm_Atom_Mode
Enum for ATOM mode.
Definition: IfxGtm_Atom.h:93
IFX_ZEROS
#define IFX_ZEROS
Definition: Ifx_Types.h:81
IfxGtm_Atom_SomcControl
IfxGtm_Atom_SomcControl
Match Compare control modes.
Definition: IfxGtm_Atom.h:113
IfxGtm_Atom_Mode_outputPwm
Definition: IfxGtm_Atom.h:97
IfxGtm_FeatureControl_enable
enable
Definition: IfxGtm_cfg.h:338
IfxGtm_Cmu_Clk
IfxGtm_Cmu_Clk
Definition: IfxGtm_Cmu.h:64
IfxGtm_Atom_Ch_setTriggerOutput
void IfxGtm_Atom_Ch_setTriggerOutput(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Ch_OutputTrigger trigger)
Sets the channel trigger output.
Definition: IfxGtm_Atom.c:513
IfxGtm_Atom_Ch_setAruReadAddress1
void IfxGtm_Atom_Ch_setAruReadAddress1(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 address)
set the ARU read address 1
Definition: IfxGtm_Atom.c:560
IfxGtm_Atom_Ch_setOneShotMode
void IfxGtm_Atom_Ch_setOneShotMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, boolean enabled)
Enable/disable the one shot mode.
Definition: IfxGtm_Atom.c:489
IfxGtm_Atom_Ch_isZeroNotification
boolean IfxGtm_Atom_Ch_isZeroNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the status of channel Zero notification.
Definition: IfxGtm_Atom.c:381
IfxGtm_Atom_Ch_setCompareOneShadow
void IfxGtm_Atom_Ch_setCompareOneShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowOne)
Sets the compare 1 shadow value.
Definition: IfxGtm_Atom.c:431
IfxGtm_Atom_Ch_setSignalLevel
void IfxGtm_Atom_Ch_setSignalLevel(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, Ifx_ActiveState activeState)
Sets the signal level.
Definition: IfxGtm_Atom.c:505
IfxGtm_Atom_Ch_getCompareZero
uint32 IfxGtm_Atom_Ch_getCompareZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare zero value.
Definition: IfxGtm_Atom.c:332
IfxGtm_Atom_Ch_setClockSource
void IfxGtm_Atom_Ch_setClockSource(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock)
Sets the channel clock source.
Definition: IfxGtm_Atom.c:406
IfxGtm_Atom_Ch_isOneNotification
boolean IfxGtm_Atom_Ch_isOneNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the status of channel One notification.
Definition: IfxGtm_Atom.c:372
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxGtm_Atom_Agc_setChannelForceUpdate
void IfxGtm_Atom_Agc_setChannelForceUpdate(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean resetEnabled)
Enable/disable one channel for update (FUPD)
Definition: IfxGtm_Atom.c:224
IfxGtm_Atom_Ch_OutputTrigger
IfxGtm_Atom_Ch_OutputTrigger
Reset source for channel counter CN0.
Definition: IfxGtm_Atom.h:77
IfxGtm_Atom_Ch_setCompareZeroShadow
void IfxGtm_Atom_Ch_setCompareZeroShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowZero)
Sets the compare 0 shadow value.
Definition: IfxGtm_Atom.c:447
IfxGtm_Atom_Ch_getCompareOnePointer
volatile uint32 * IfxGtm_Atom_Ch_getCompareOnePointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare one pointer.
Definition: IfxGtm_Atom.c:324
IfxGtm_Atom_Ch_getCompareOne
uint32 IfxGtm_Atom_Ch_getCompareOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare one value.
Definition: IfxGtm_Atom.c:316
IfxGtm_Atom_Ch_setCompare
void IfxGtm_Atom_Ch_setCompare(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareZero, uint32 compareOne)
Sets the compare 0 and 1 values.
Definition: IfxGtm_Atom.c:414
IfxGtm_Atom_Ch_setAruReadAddress0
void IfxGtm_Atom_Ch_setAruReadAddress0(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 address)
set the ARU read address 0
Definition: IfxGtm_Atom.c:553
IfxGtm_Atom_Agc_enableChannelsTrigger
void IfxGtm_Atom_Agc_enableChannelsTrigger(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask)
Enable/disable the TGC channels trigger.
Definition: IfxGtm_Atom.c:187
IfxGtm_Atom_Ch_setMode
void IfxGtm_Atom_Ch_setMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Mode mode)
set the Atom operating mode
Definition: IfxGtm_Atom.c:463
IfxGtm_Atom_Agc_resetChannels
void IfxGtm_Atom_Agc_resetChannels(Ifx_GTM_ATOM_AGC *agc, uint32 resetMask)
Reset one or more channels.
Definition: IfxGtm_Atom.c:205
IfxGtm_Atom_Ch_setCompareZero
void IfxGtm_Atom_Ch_setCompareZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareZero)
Sets the compare 0 value.
Definition: IfxGtm_Atom.c:439
IfxGtm_Atom_Ch_getCompareZeroPointer
volatile uint32 * IfxGtm_Atom_Ch_getCompareZeroPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare zero pointer.
Definition: IfxGtm_Atom.c:340
IfxGtm_IrqMode
IfxGtm_IrqMode
Enum for GTM interrupt modes.
Definition: IfxGtm.h:64
IfxGtm_Atom_getShadowOnePointer
volatile uint32 * IfxGtm_Atom_getShadowOnePointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the shadow One pointer.
Definition: IfxGtm_Atom.c:591
IfxGtm_Atom_getShadowOne
uint32 IfxGtm_Atom_getShadowOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the shadow one value.
Definition: IfxGtm_Atom.c:583
IfxGtm_Atom_Agc_trigger
void IfxGtm_Atom_Agc_trigger(Ifx_GTM_ATOM_AGC *agc)
Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG)
Definition: IfxGtm_Atom.c:256
IfxGtm_Atom.h
GTM basic functionality.
IfxGtm_Atom_Agc_enableTimeTrigger
void IfxGtm_Atom_Agc_enableTimeTrigger(Ifx_GTM_ATOM_AGC *agc, boolean enabled)
Enable/disable the time base trigger.
Definition: IfxGtm_Atom.c:199
TRUE
#define TRUE
Definition: Platform_Types.h:90
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
IfxGtm_Atom_Agc_enableChannelOutput
void IfxGtm_Atom_Agc_enableChannelOutput(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel output (OUTEN)
Definition: IfxGtm_Atom.c:127
IfxGtm_Atom_Ch_setSomcSignalLevelControl
void IfxGtm_Atom_Ch_setSomcSignalLevelControl(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_SomcSignalLevelControl ctrl)
sets the SL control for SOMC mode.
Definition: IfxGtm_Atom.c:545
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxGtm_Cmu_getClkFrequency
float32 IfxGtm_Cmu_getClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean assumeEnabled)
Returns the GTM configurable clock frequency in Hz.
Definition: IfxGtm_Cmu.c:64
IfxGtm_Atom_Agc_enableChannel
void IfxGtm_Atom_Agc_enableChannel(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel (ENDIS)
Definition: IfxGtm_Atom.c:109
IfxGtm_Atom_Ch
IfxGtm_Atom_Ch
Enum for ATOM channels.
Definition: IfxGtm_cfg.h:258
IfxGtm_Atom_Ch_setSomcControl
void IfxGtm_Atom_Ch_setSomcControl(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_SomcControl control)
sets the SOMC control bits for the specified ATOM channel
Definition: IfxGtm_Atom.c:537


iLLD_TC38A: IfxGtm_Atom.h Source File

  • Gtm
  • Std
IfxGtm_Atom.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Atom.h
3 * \brief GTM basic functionality
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 *
43 * \defgroup IfxLld_Gtm_Std_Atom Atom Basic Functionality
44 * \ingroup IfxLld_Gtm_Std
45 * \defgroup IfxLld_Gtm_Std_Atom_Enumerations ATOM Enumerations
46 * \ingroup IfxLld_Gtm_Std_Atom
47 * \defgroup IfxLld_Gtm_Std_Atom_Channel_Functions ATOM Channel Functions
48 * \ingroup IfxLld_Gtm_Std_Atom
49 * \defgroup IfxLld_Gtm_Std_Atom_AGC_Functions ATOM AGC Functions
50 * \ingroup IfxLld_Gtm_Std_Atom
51 * \defgroup IfxLld_Gtm_Std_Atom_Module_Functions ATOM Module Functions
52 * \ingroup IfxLld_Gtm_Std_Atom
53 */
54
55 #ifndef IFXGTM_ATOM_H
56 #define IFXGTM_ATOM_H 1
57
58 /******************************************************************************/
59 /*----------------------------------Includes----------------------------------*/
60 /******************************************************************************/
61
62 #include "_Impl/IfxGtm_cfg.h"
63 #include "IfxGtm.h"
64 #include "IfxGtm_Tbu.h"
65 #include "Src/Std/IfxSrc.h"
66 #include "IfxGtm_Cmu.h"
67 #include "stddef.h"
68
69 /******************************************************************************/
70 /*--------------------------------Enumerations--------------------------------*/
71 /******************************************************************************/
72
73 /** \addtogroup IfxLld_Gtm_Std_Atom_Enumerations
74 * \{ */
75 /** \brief Reset source for channel counter CN0
76 */
77 typedef enum
78 {
79 IfxGtm_Atom_Ch_OutputTrigger_forward = 0, /**< \brief Forward the trigger from the previous channel */
80 IfxGtm_Atom_Ch_OutputTrigger_generate = 1 /**< \brief Generate the trigger from the current channel */
81 } IfxGtm_Atom_Ch_OutputTrigger;
82
83 /** \brief Reset event for channel counter CN0
84 */
85 typedef enum
86 {
87 IfxGtm_Atom_Ch_ResetEvent_onCm0 = 0,
88 IfxGtm_Atom_Ch_ResetEvent_onTrigger = 1
89 } IfxGtm_Atom_Ch_ResetEvent;
90
91 /** \brief Enum for ATOM mode
92 */
93 typedef enum
94 {
95 IfxGtm_Atom_Mode_outputImmediate,
96 IfxGtm_Atom_Mode_outputCompare,
97 IfxGtm_Atom_Mode_outputPwm,
98 IfxGtm_Atom_Mode_outputSerial
99 } IfxGtm_Atom_Mode;
100
101 /** \} */
102
103 /** \brief Enable/disable of Aru Input to ATOM channel
104 */
105 typedef enum
106 {
107 IfxGtm_Atom_AruInput_disabled = 0, /**< \brief ARU input disabled */
108 IfxGtm_Atom_AruInput_enabled = 1 /**< \brief ARU input enabled */
109 } IfxGtm_Atom_AruInput;
110
111 /** \brief Match Compare control modes
112 */
113 typedef enum
114 {
115 IfxGtm_Atom_SomcControl_compareBoth = 0, /**< \brief compare CCU0 and CCU1 in parallel */
116 IfxGtm_Atom_SomcControl_compareBoth1 = 1, /**< \brief compare CCU0 and CCU1 in parallel */
117 IfxGtm_Atom_SomcControl_ccu0Ts0 = 2, /**< \brief compare CCU0 against TS0 */
118 IfxGtm_Atom_SomcControl_ccu1Ts12 = 3, /**< \brief compare only CCU1 against TS1 or TS2 */
119 IfxGtm_Atom_SomcControl_ccu0ccu1Ts0 = 4, /**< \brief compare CCU0 then CCU1, use TS0 */
120 IfxGtm_Atom_SomcControl_ccu0ccu1Ts12 = 5, /**< \brief compare CCU0 then CCU1. Use TS1 or TS2 */
121 IfxGtm_Atom_SomcControl_ccu0Ts0ccu1Ts12 = 6, /**< \brief compare CCU0 with TS0 then CCU1 with TS1 or TS2 */
122 IfxGtm_Atom_SomcControl_cancelCompare = 7 /**< \brief Cancel pending compare events */
123 } IfxGtm_Atom_SomcControl;
124
125 /** \brief SOMC signal level Control
126 */
127 typedef enum
128 {
129 IfxGtm_Atom_SomcSignalLevelControl_noChange = 0, /**< \brief no signal level change at output */
130 IfxGtm_Atom_SomcSignalLevelControl_sl0out1 = 1, /**< \brief SL= 0 -> Out=1; SL=1->Out=0 */
131 IfxGtm_Atom_SomcSignalLevelControl_sl0out0 = 2, /**< \brief SL=0->Out=0; SL=1->Out=1 */
132 IfxGtm_Atom_SomcSignalLevelControl_toggle = 3 /**< \brief toggle the output signal level */
133 } IfxGtm_Atom_SomcSignalLevelControl;
134
135 /** \addtogroup IfxLld_Gtm_Std_Atom_Channel_Functions
136 * \{ */
137
138 /******************************************************************************/
139 /*-------------------------Inline Function Prototypes-------------------------*/
140 /******************************************************************************/
141
142 /** \brief Returns the base addredd of selected Atom channel
143 * \param atom Pointer to the ATOM object
144 * \param channel Channel index
145 * \return Pointer to channel base address
146 */
147 IFX_INLINE Ifx_GTM_ATOM_CH *IfxGtm_Atom_Ch_getChannelPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
148
149 /** \brief Sets the compare 0 and 1 shadow values
150 * \param atom Pointer to the ATOM object
151 * \param channel Channel index
152 * \param shadowZero Compare zero shadow value
153 * \param shadowOne Compare one shadow value
154 * \return None
155 */
156 IFX_INLINE void IfxGtm_Atom_Ch_setCompareShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowZero, uint32 shadowOne);
157
158 /******************************************************************************/
159 /*-------------------------Global Function Prototypes-------------------------*/
160 /******************************************************************************/
161
162 /** \brief Clears the channel One notification
163 * \param atom Pointer to the ATOM object
164 * \param channel Channel index
165 * \return None
166 */
167 IFX_EXTERN void IfxGtm_Atom_Ch_clearOneNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
168
169 /** \brief Clears the channel Zero notification
170 * \param atom Pointer to the ATOM object
171 * \param channel Channel index
172 * \return None
173 */
174 IFX_EXTERN void IfxGtm_Atom_Ch_clearZeroNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
175
176 /** \brief
177 * \param atom Pointer to the ATOM object
178 * \param channel Channel index
179 * \param clock Clock source
180 * \param activeState Active State
181 * \param resetEvent Channel reset event
182 * \param trigger Channel trigger output mode
183 * \return None
184 */
185 IFX_EXTERN void IfxGtm_Atom_Ch_configurePwmMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock, Ifx_ActiveState activeState, IfxGtm_Atom_Ch_ResetEvent resetEvent, IfxGtm_Atom_Ch_OutputTrigger trigger);
186
187 /** \brief Returns the ATOM channel input clock frequency in Hz
188 * \param gtm Pointer to GTM module
189 * \param atom Pointer to the ATOM object
190 * \param channel Channel index
191 * \return ATOM channel input clock frequency in Hz
192 */
193 IFX_EXTERN float32 IfxGtm_Atom_Ch_getClockFrequency(Ifx_GTM *gtm, Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
194
195 /** \brief Returns the channel clock source
196 * \param atom Pointer to the ATOM object
197 * \param channel Channel index
198 * \return The clock source
199 */
200 IFX_EXTERN IfxGtm_Cmu_Clk IfxGtm_Atom_Ch_getClockSource(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
201
202 /** \brief Returns the compare one value
203 * \param atom Pointer to the ATOM object
204 * \param channel Channel index
205 * \return compare one value
206 */
207 IFX_EXTERN uint32 IfxGtm_Atom_Ch_getCompareOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
208
209 /** \brief Returns the compare one pointer
210 * \param atom Pointer to the ATOM object
211 * \param channel Channel index
212 * \return compare one pointer
213 */
214 IFX_EXTERN volatile uint32 *IfxGtm_Atom_Ch_getCompareOnePointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
215
216 /** \brief Returns the compare zero value
217 * \param atom Pointer to the ATOM object
218 * \param channel Channel index
219 * \return compare zero value
220 */
221 IFX_EXTERN uint32 IfxGtm_Atom_Ch_getCompareZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
222
223 /** \brief Returns the compare zero pointer
224 * \param atom Pointer to the ATOM object
225 * \param channel Channel index
226 * \return compare zero pointer
227 */
228 IFX_EXTERN volatile uint32 *IfxGtm_Atom_Ch_getCompareZeroPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
229
230 /** \brief Gets the ATOM output level
231 * \param atom Pointer to the ATOM object
232 * \param channel Channel index
233 * \return TRUE the output is high, FALSE the output is low
234 */
235 IFX_EXTERN boolean IfxGtm_Atom_Ch_getOutputLevel(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
236
237 /** \brief Returns a pointer to the ATOM channel SRC
238 * \param gtm Pointer to GTM module
239 * \param atom Specifies the atom object
240 * \param channel Channel index
241 * \return Pointer to the TOM channel SRC
242 */
243 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxGtm_Atom_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Atom atom, IfxGtm_Atom_Ch channel);
244
245 /** \brief Returns the Timer pointer
246 * \param atom Pointer to the ATOM object
247 * \param channel Channel index
248 * \return Timer pointer
249 */
250 IFX_EXTERN volatile uint32 *IfxGtm_Atom_Ch_getTimerPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
251
252 /** \brief Returns the status of channel One notification
253 * \param atom Pointer to the ATOM object
254 * \param channel Channel index
255 * \return Status of channel One notification
256 */
257 IFX_EXTERN boolean IfxGtm_Atom_Ch_isOneNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
258
259 /** \brief Returns the status of channel Zero notification
260 * \param atom Pointer to the ATOM object
261 * \param channel Channel index
262 * \return Status of channel Zero notification
263 */
264 IFX_EXTERN boolean IfxGtm_Atom_Ch_isZeroNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
265
266 /** \brief Raises the interrupt for Compare 1
267 * \param atom Pointer to the ATOM object
268 * \param channel Channel index
269 * \return None
270 */
271 IFX_EXTERN void IfxGtm_Atom_Ch_raiseInterruptOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
272
273 /** \brief Raises the interrupt for Compare 0
274 * \param atom Pointer to the ATOM object
275 * \param channel Channel index
276 * \return None
277 */
278 IFX_EXTERN void IfxGtm_Atom_Ch_raiseInterruptZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
279
280 /** \brief Sets the channel clock source
281 * \param atom Pointer to the ATOM object
282 * \param channel Channel index
283 * \param clock Channel clock source
284 * \return None
285 */
286 IFX_EXTERN void IfxGtm_Atom_Ch_setClockSource(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock);
287
288 /** \brief Sets the compare 0 and 1 values
289 * \param atom Pointer to the ATOM object
290 * \param channel Channel index
291 * \param compareZero Compare zero value
292 * \param compareOne Compare one value
293 * \return None
294 */
295 IFX_EXTERN void IfxGtm_Atom_Ch_setCompare(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareZero, uint32 compareOne);
296
297 /** \brief Sets the compare 1 value
298 * \param atom Pointer to the ATOM object
299 * \param channel Channel index
300 * \param compareOne Compare one value
301 * \return None
302 */
303 IFX_EXTERN void IfxGtm_Atom_Ch_setCompareOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareOne);
304
305 /** \brief Sets the compare 1 shadow value
306 * \param atom Pointer to the ATOM object
307 * \param channel Channel index
308 * \param shadowOne Compare one shadow value
309 * \return None
310 */
311 IFX_EXTERN void IfxGtm_Atom_Ch_setCompareOneShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowOne);
312
313 /** \brief Sets the compare 0 value
314 * \param atom Pointer to the ATOM object
315 * \param channel Channel index
316 * \param compareZero Compare zero value
317 * \return None
318 */
319 IFX_EXTERN void IfxGtm_Atom_Ch_setCompareZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareZero);
320
321 /** \brief Sets the compare 0 shadow value
322 * \param atom Pointer to the ATOM object
323 * \param channel Channel index
324 * \param shadowZero Compare zero shadow value
325 * \return None
326 */
327 IFX_EXTERN void IfxGtm_Atom_Ch_setCompareZeroShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowZero);
328
329 /** \brief Sets the counter value
330 * \param atom Pointer to the ATOM object
331 * \param channel Channel index
332 * \param value Counter value
333 * \return None
334 */
335 IFX_EXTERN void IfxGtm_Atom_Ch_setCounterValue(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 value);
336
337 /** \brief set the Atom operating mode
338 * \param atom Pointer to the ATOM object
339 * \param channel Channel index
340 * \param mode Atom operating mode
341 * \return None
342 */
343 IFX_EXTERN void IfxGtm_Atom_Ch_setMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Mode mode);
344
345 /** \brief Sets the channel notification
346 * \param atom Pointer to the ATOM object
347 * \param channel Channel index
348 * \param mode Interrupt mode
349 * \param interruptOnCompareZero If TRUE, an interrupt is generated on compare 0, else no interrupt is generated
350 * \param interruptOnCompareOne If TRUE, an interrupt is generated on compare 1, else no interrupt is generated
351 * \return None
352 */
353 IFX_EXTERN void IfxGtm_Atom_Ch_setNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne);
354
355 /** \brief Enable/disable the one shot mode
356 * \param atom Pointer to the ATOM object
357 * \param channel Channel index
358 * \param enabled If TRUE, the feature is enabled, else disabled
359 * \return None
360 */
361 IFX_EXTERN void IfxGtm_Atom_Ch_setOneShotMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, boolean enabled);
362
363 /** \brief Sets the channel clock source either from local or from previous channel
364 * \param atom Pointer to the ATOM object
365 * \param channel Channel index
366 * \param event Channel reset event
367 * \return None
368 */
369 IFX_EXTERN void IfxGtm_Atom_Ch_setResetSource(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Ch_ResetEvent event);
370
371 /** \brief Sets the signal level
372 * \param atom Pointer to the ATOM object
373 * \param channel Channel index
374 * \param activeState Signal level active state. In case the channel is reset, the output is set to not active. The signal is active between 0 and the leading edge (CM1) and inactive between the leading edge and the trailing edge (CM0).
375 * \return None
376 */
377 IFX_EXTERN void IfxGtm_Atom_Ch_setSignalLevel(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, Ifx_ActiveState activeState);
378
379 /** \brief Sets the channel trigger output
380 * \param atom Pointer to the ATOM object
381 * \param channel Channel index
382 * \param trigger Channel trigger output mode
383 * \return None
384 */
385 IFX_EXTERN void IfxGtm_Atom_Ch_setTriggerOutput(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Ch_OutputTrigger trigger);
386
387 /** \brief Get the counter value
388 * \param atom pointer to the ATOM instance
389 * \param channel channel index of the ATOM
390 * \return counter value
391 */
392 IFX_EXTERN uint32 IfxGtm_Atom_Ch_getCounterValue(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
393
394 /** \} */
395
396 /** \addtogroup IfxLld_Gtm_Std_Atom_AGC_Functions
397 * \{ */
398
399 /******************************************************************************/
400 /*-------------------------Inline Function Prototypes-------------------------*/
401 /******************************************************************************/
402
403 /** \brief Sets the channels for update (UPEN)
404 * \param agc Pointer to the AGC object
405 * \param value value for the channel enable (bit 0: Channel 0, bit 1: channel 1, ...)
406 * \return None
407 */
408 IFX_INLINE void IfxGtm_Atom_Agc_setChannelsUpdate(Ifx_GTM_ATOM_AGC *agc, uint32 value);
409
410 /******************************************************************************/
411 /*-------------------------Global Function Prototypes-------------------------*/
412 /******************************************************************************/
413
414 /** \brief Builds the register value for the feature enable/disable
415 * \param enableMask Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
416 * \param disableMask Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
417 * \param bitfieldOffset Offset of the channel 0 bitfield in the register
418 * \return The register value
419 */
420 IFX_EXTERN uint32 IfxGtm_Atom_Agc_buildFeature(uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset);
421
422 /** \brief Builds the register value for the feature enable/disable for a single channel
423 * \param channel Channel index
424 * \param enabled Enable/ Disable choise of the feature
425 * \param bitfieldOffset Offset of the channel 0 bitfield in the register
426 * \return The register value
427 */
428 IFX_EXTERN uint32 IfxGtm_Atom_Agc_buildFeatureForChannel(IfxGtm_Atom_Ch channel, boolean enabled, uint8 bitfieldOffset);
429
430 /** \brief Enable/disable one channel (ENDIS)
431 * \param agc Pointer to the AGC object
432 * \param channel Channel index
433 * \param enabled Enable/ Disable choise of the feature
434 * \param immediate If TRUE, the action is done immediately else, the action is done on AGC trigger (CTRL_TRIG)
435 * \return None
436 */
437 IFX_EXTERN void IfxGtm_Atom_Agc_enableChannel(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate);
438
439 /** \brief Enable/disable one channel output (OUTEN)
440 * \param agc Pointer to the AGC object
441 * \param channel Channel index
442 * \param enabled Enable/ Disable choise of the feature
443 * \param immediate If TRUE, the action is done immediately else, the action is done on TGC trigger (CTRL_TRIG)
444 * \return None
445 */
446 IFX_EXTERN void IfxGtm_Atom_Agc_enableChannelOutput(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate);
447
448 /** \brief Enable/disable one channel for update (UPEN)
449 * \param agc Pointer to the AGC object
450 * \param channel Channel index
451 * \param enabled Enable/ Disable choise of the feature
452 * \return None
453 */
454 IFX_EXTERN void IfxGtm_Atom_Agc_enableChannelUpdate(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled);
455
456 /** \brief Enable/disable one or more channels (ENDIS)
457 * \param agc Pointer to the AGC object
458 * \param enableMask Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
459 * \param disableMask Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
460 * \param immediate If TRUE, the action is done immediately else, the action is done on TGC trigger (CTRL_TRIG)
461 * \return None
462 */
463 IFX_EXTERN void IfxGtm_Atom_Agc_enableChannels(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate);
464
465 /** \brief Enable/disable one or more channels output (OUTEN)
466 * \param agc Pointer to the TGC object
467 * \param enableMask Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
468 * \param disableMask Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
469 * \param immediate If TRUE, the action is done immediately else, the action is done on TGC trigger (CTRL_TRIG)
470 * \return None
471 */
472 IFX_EXTERN void IfxGtm_Atom_Agc_enableChannelsOutput(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate);
473
474 /** \brief Enable/disable the TGC channels trigger
475 * \param agc Pointer to the AGC object
476 * \param enableMask Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
477 * \param disableMask Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
478 * \return None
479 */
480 IFX_EXTERN void IfxGtm_Atom_Agc_enableChannelsTrigger(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask);
481
482 /** \brief Enable/disable one or more channels for update (UPEN)
483 * \param agc Pointer to the AGC object
484 * \param enableMask Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
485 * \param disableMask Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
486 * \return None
487 */
488 IFX_EXTERN void IfxGtm_Atom_Agc_enableChannelsUpdate(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask);
489
490 /** \brief Enable/disable the time base trigger
491 * \param agc Pointer to the AGC object
492 * \param enabled If TRUE, the trigger is enabled else disabled
493 * \return None
494 */
495 IFX_EXTERN void IfxGtm_Atom_Agc_enableTimeTrigger(Ifx_GTM_ATOM_AGC *agc, boolean enabled);
496
497 /** \brief Reset one or more channels
498 * \param agc Pointer to the AGC object
499 * \param resetMask Mask for the channel reset (bit 0: Channel 0, bit 1: channel 1, ...)
500 * \return None
501 */
502 IFX_EXTERN void IfxGtm_Atom_Agc_resetChannels(Ifx_GTM_ATOM_AGC *agc, uint32 resetMask);
503
504 /** \brief Enable/disable one channel for update (FUPD)
505 * \param agc Pointer to the AGC object
506 * \param channel Channel index
507 * \param enabled Enable/ Disable choise of the feature
508 * \param resetEnabled Enable/ Disable reset choise of the feature
509 * \return None
510 */
511 IFX_EXTERN void IfxGtm_Atom_Agc_setChannelForceUpdate(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean resetEnabled);
512
513 /** \brief Enable/disable one or more channels for the force update feature (FUPD)
514 * \param agc Pointer to the AGC object
515 * \param enableMask Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
516 * \param disableMask Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
517 * \param resetEnableMask Mask for the enabled channels counter reset on force update (bit 0: Channel 0, bit 1: channel 1, ...) Channel 0, bit 1: channel 1, ...)
518 * \param resetDisableMask Mask for the disabled channels with no counter reset on force update (bit 0: Channel 0, bit 1: channel 1, ...)
519 * \return None
520 */
521 IFX_EXTERN void IfxGtm_Atom_Agc_setChannelsForceUpdate(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask);
522
523 /** \brief Sets the trigger time base and time base value
524 * \param agc Pointer to the AGC object
525 * \param base Time base used for comparison
526 * \param value Compare value that raise the trigger
527 * \return None
528 */
529 IFX_EXTERN void IfxGtm_Atom_Agc_setTimeTrigger(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Tbu_Ts base, uint32 value);
530
531 /** \brief Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG)
532 * \param agc Pointer to the AGC object
533 * \return None
534 */
535 IFX_EXTERN void IfxGtm_Atom_Agc_trigger(Ifx_GTM_ATOM_AGC *agc);
536
537 /** \} */
538
539 /** \addtogroup IfxLld_Gtm_Std_Atom_Module_Functions
540 * \{ */
541
542 /******************************************************************************/
543 /*-------------------------Inline Function Prototypes-------------------------*/
544 /******************************************************************************/
545
546 /** \brief Configures the tout selection
547 * \param toutNum TOUT number
548 * \param toutSel TOUTselection
549 * \return None
550 */
551 IFX_INLINE void IfxGtm_Atom_setTout(uint32 toutNum, uint32 toutSel);
552
553 /** \} */
554
555 /******************************************************************************/
556 /*-------------------------Global Function Prototypes-------------------------*/
557 /******************************************************************************/
558
559 /** \brief enable/disable ARU input for the ATOM channel specified.
560 * \param atom pointer to the ATOM instance
561 * \param channel index of ATOM channel
562 * \param enabled ARU enable status
563 * \return None
564 */
565 IFX_EXTERN void IfxGtm_Atom_Ch_setAruInput(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, boolean enabled);
566
567 /** \brief sets the SOMC control bits for the specified ATOM channel
568 * \param atom pointer to ATOM instance
569 * \param channel ATOM channel index
570 * \param control SOMC control mode enum
571 * \return None
572 */
573 IFX_EXTERN void IfxGtm_Atom_Ch_setSomcControl(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_SomcControl control);
574
575 /** \brief sets the SL control for SOMC mode.
576 * \param atom pointer to the ATOM instance
577 * \param channel index of ATOM channel
578 * \param ctrl SIgnal level control
579 * \return None
580 */
581 IFX_EXTERN void IfxGtm_Atom_Ch_setSomcSignalLevelControl(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_SomcSignalLevelControl ctrl);
582
583 /** \brief set the ARU read address 0
584 * \param atom pointer to ATOM instance
585 * \param channel ATOM channel index
586 * \param address ARU read address 0
587 * \return None
588 */
589 IFX_EXTERN void IfxGtm_Atom_Ch_setAruReadAddress0(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 address);
590
591 /** \brief set the ARU read address 1
592 * \param atom pointer to ATOM instance
593 * \param channel ATOM channel index
594 * \param address ARU read address 1
595 * \return None
596 */
597 IFX_EXTERN void IfxGtm_Atom_Ch_setAruReadAddress1(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 address);
598
599 /** \brief Returns the shadow zero value
600 * \param atom Pointer to the ATOM object
601 * \param channel Channel index
602 * \return shadow zero value
603 */
604 IFX_EXTERN uint32 IfxGtm_Atom_getShadowZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
605
606 /** \brief Returns the shadow zero pointer
607 * \param atom Pointer to the ATOM object
608 * \param channel Channel index
609 * \return shadow zero value
610 */
611 IFX_EXTERN volatile uint32 *IfxGtm_Atom_getShadowZeroPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
612
613 /** \brief Returns the shadow one value
614 * \param atom Pointer to the ATOM object
615 * \param channel Channel index
616 * \return shadow one value
617 */
618 IFX_EXTERN uint32 IfxGtm_Atom_getShadowOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
619
620 /** \brief Returns the shadow One pointer
621 * \param atom Pointer to the ATOM object
622 * \param channel channel index
623 * \return shadow One pointer
624 */
625 IFX_EXTERN volatile uint32 *IfxGtm_Atom_getShadowOnePointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
626
627 /******************************************************************************/
628 /*---------------------Inline Function Implementations------------------------*/
629 /******************************************************************************/
630
631 IFX_INLINE Ifx_GTM_ATOM_CH *IfxGtm_Atom_Ch_getChannelPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
632 {
633 return (Ifx_GTM_ATOM_CH *)((uint32)&atom->CH0.RDADDR.U + 0x80 * channel);
634 }
635
636
637 IFX_INLINE void IfxGtm_Atom_Ch_setCompareShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowZero, uint32 shadowOne)
638 {
639 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
640
641 atomCh->SR0.U = shadowZero; // TK: replaced .B access to optimize runtime
642 atomCh->SR1.U = shadowOne;
643 }
644
645
646 IFX_INLINE void IfxGtm_Atom_Agc_setChannelsUpdate(Ifx_GTM_ATOM_AGC *agc, uint32 value)
647 {
648 agc->GLB_CTRL.U = value;
649 }
650
651
652 IFX_INLINE void IfxGtm_Atom_setTout(uint32 toutNum, uint32 toutSel)
653 {
654 uint32 outselReg = (toutNum >> 3);
655 uint32 shift = (toutNum & 0x7U) * 4;
656 uint32 outsel = toutSel << shift;
657 uint32 mask = 0xFU << shift;
658
659 __ldmst_c(&(MODULE_GTM.TOUTSEL[outselReg].U), mask, outsel);
660 }
661
662
663 #endif /* IFXGTM_ATOM_H */
IfxGtm_Atom_Agc_enableChannelsOutput
IFX_EXTERN void IfxGtm_Atom_Agc_enableChannelsOutput(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels output (OUTEN)
Definition: IfxGtm_Atom.c:169
IfxGtm_Atom_Ch_setResetSource
IFX_EXTERN void IfxGtm_Atom_Ch_setResetSource(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Ch_ResetEvent event)
Sets the channel clock source either from local or from previous channel.
Definition: IfxGtm_Atom.c:497
IfxGtm_Atom_Ch_ResetEvent
IfxGtm_Atom_Ch_ResetEvent
Reset event for channel counter CN0.
Definition: IfxGtm_Atom.h:85
IfxGtm_Atom_getShadowZeroPointer
IFX_EXTERN volatile uint32 * IfxGtm_Atom_getShadowZeroPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the shadow zero pointer.
Definition: IfxGtm_Atom.c:575
IfxGtm_Atom_SomcControl_ccu0ccu1Ts0
compare CCU0 then CCU1, use TS0
Definition: IfxGtm_Atom.h:119
IfxGtm_Atom_setTout
IFX_INLINE void IfxGtm_Atom_setTout(uint32 toutNum, uint32 toutSel)
Configures the tout selection.
Definition: IfxGtm_Atom.h:652
IfxGtm_Atom_Agc_setChannelsForceUpdate
IFX_EXTERN void IfxGtm_Atom_Agc_setChannelsForceUpdate(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
Enable/disable one or more channels for the force update feature (FUPD)
Definition: IfxGtm_Atom.c:235
IfxGtm_Atom_Ch_ResetEvent_onCm0
Definition: IfxGtm_Atom.h:87
IfxGtm_Atom_Ch_clearOneNotification
IFX_EXTERN void IfxGtm_Atom_Ch_clearOneNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Clears the channel One notification.
Definition: IfxGtm_Atom.c:262
IfxGtm_Atom_AruInput_disabled
ARU input disabled.
Definition: IfxGtm_Atom.h:107
IfxGtm_Atom_Ch_OutputTrigger_generate
Generate the trigger from the current channel.
Definition: IfxGtm_Atom.h:80
IfxGtm_Atom_Ch_setNotification
IFX_EXTERN void IfxGtm_Atom_Ch_setNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne)
Sets the channel notification.
Definition: IfxGtm_Atom.c:471
IfxGtm_Tbu_Ts
IfxGtm_Tbu_Ts
GTM TOM TBU Time stamps.
Definition: IfxGtm_Tbu.h:66
IfxGtm_Atom_Ch_clearZeroNotification
IFX_EXTERN void IfxGtm_Atom_Ch_clearZeroNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Clears the channel Zero notification.
Definition: IfxGtm_Atom.c:270
IfxGtm_Atom_getShadowOne
IFX_EXTERN uint32 IfxGtm_Atom_getShadowOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the shadow one value.
Definition: IfxGtm_Atom.c:583
IfxGtm_Atom_Ch_getClockSource
IFX_EXTERN IfxGtm_Cmu_Clk IfxGtm_Atom_Ch_getClockSource(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the channel clock source.
Definition: IfxGtm_Atom.c:306
IfxGtm_Atom_Agc_buildFeature
IFX_EXTERN uint32 IfxGtm_Atom_Agc_buildFeature(uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable.
Definition: IfxGtm_Atom.c:61
IfxGtm_Atom_Ch_setAruReadAddress0
IFX_EXTERN void IfxGtm_Atom_Ch_setAruReadAddress0(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 address)
set the ARU read address 0
Definition: IfxGtm_Atom.c:553
IfxGtm_Atom_SomcControl_ccu1Ts12
compare only CCU1 against TS1 or TS2
Definition: IfxGtm_Atom.h:118
IfxGtm_Atom_SomcControl_ccu0ccu1Ts12
compare CCU0 then CCU1. Use TS1 or TS2
Definition: IfxGtm_Atom.h:120
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxGtm_Atom_SomcSignalLevelControl
IfxGtm_Atom_SomcSignalLevelControl
SOMC signal level Control.
Definition: IfxGtm_Atom.h:127
float32
float float32
Definition: Platform_Types.h:170
IfxGtm_Atom_Ch_configurePwmMode
IFX_EXTERN void IfxGtm_Atom_Ch_configurePwmMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock, Ifx_ActiveState activeState, IfxGtm_Atom_Ch_ResetEvent resetEvent, IfxGtm_Atom_Ch_OutputTrigger trigger)
Definition: IfxGtm_Atom.c:278
IfxGtm_Atom_Agc_setChannelsUpdate
IFX_INLINE void IfxGtm_Atom_Agc_setChannelsUpdate(Ifx_GTM_ATOM_AGC *agc, uint32 value)
Sets the channels for update (UPEN)
Definition: IfxGtm_Atom.h:646
__ldmst_c
IFX_INLINE void __ldmst_c(volatile void *address, unsigned mask, unsigned value)
Definition: IfxCpu_Intrinsics.h:108
IfxGtm_Atom
IfxGtm_Atom
Enum for ATOM objects.
Definition: IfxGtm_cfg.h:243
IfxGtm_Atom_Agc_setTimeTrigger
IFX_EXTERN void IfxGtm_Atom_Agc_setTimeTrigger(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Tbu_Ts base, uint32 value)
Sets the trigger time base and time base value.
Definition: IfxGtm_Atom.c:245
IfxSrc.h
SRC basic functionality.
IfxGtm_Atom_Mode_outputSerial
Definition: IfxGtm_Atom.h:98
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:113
IfxGtm_Atom_Agc_enableChannelsUpdate
IFX_EXTERN void IfxGtm_Atom_Agc_enableChannelsUpdate(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask)
Enable/disable one or more channels for update (UPEN)
Definition: IfxGtm_Atom.c:193
IfxGtm_Atom_Ch_setCompareOne
IFX_EXTERN void IfxGtm_Atom_Ch_setCompareOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareOne)
Sets the compare 1 value.
Definition: IfxGtm_Atom.c:423
IfxGtm_Atom_Ch_getClockFrequency
IFX_EXTERN float32 IfxGtm_Atom_Ch_getClockFrequency(Ifx_GTM *gtm, Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the ATOM channel input clock frequency in Hz.
Definition: IfxGtm_Atom.c:296
IfxGtm_Atom_Ch_raiseInterruptOne
IFX_EXTERN void IfxGtm_Atom_Ch_raiseInterruptOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Raises the interrupt for Compare 1.
Definition: IfxGtm_Atom.c:390
IfxGtm_Atom_Ch_getChannelPointer
IFX_INLINE Ifx_GTM_ATOM_CH * IfxGtm_Atom_Ch_getChannelPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the base addredd of selected Atom channel.
Definition: IfxGtm_Atom.h:631
IfxGtm_Atom_Ch_setCompareShadow
IFX_INLINE void IfxGtm_Atom_Ch_setCompareShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowZero, uint32 shadowOne)
Sets the compare 0 and 1 shadow values.
Definition: IfxGtm_Atom.h:637
IfxGtm_Atom_Ch_setCounterValue
IFX_EXTERN void IfxGtm_Atom_Ch_setCounterValue(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 value)
Sets the counter value.
Definition: IfxGtm_Atom.c:455
IfxGtm_Atom_Ch_setSomcSignalLevelControl
IFX_EXTERN void IfxGtm_Atom_Ch_setSomcSignalLevelControl(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_SomcSignalLevelControl ctrl)
sets the SL control for SOMC mode.
Definition: IfxGtm_Atom.c:545
IfxGtm_Atom_Agc_enableChannelUpdate
IFX_EXTERN void IfxGtm_Atom_Agc_enableChannelUpdate(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled)
Enable/disable one channel for update (UPEN)
Definition: IfxGtm_Atom.c:145
IfxGtm_Atom_SomcSignalLevelControl_noChange
no signal level change at output
Definition: IfxGtm_Atom.h:129
IfxGtm_Atom_SomcSignalLevelControl_sl0out0
SL=0->Out=0; SL=1->Out=1.
Definition: IfxGtm_Atom.h:131
IfxGtm_Atom_Ch_getCounterValue
IFX_EXTERN uint32 IfxGtm_Atom_Ch_getCounterValue(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Get the counter value.
Definition: IfxGtm_Atom.c:529
IfxGtm_Atom_Mode_outputCompare
Definition: IfxGtm_Atom.h:96
IfxGtm_Atom_Ch_getSrcPointer
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxGtm_Atom_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Atom atom, IfxGtm_Atom_Ch channel)
Returns a pointer to the ATOM channel SRC.
Definition: IfxGtm_Atom.c:359
IfxGtm_Atom_Ch_raiseInterruptZero
IFX_EXTERN void IfxGtm_Atom_Ch_raiseInterruptZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Raises the interrupt for Compare 0.
Definition: IfxGtm_Atom.c:398
IfxGtm_Atom_Agc_enableChannels
IFX_EXTERN void IfxGtm_Atom_Agc_enableChannels(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels (ENDIS)
Definition: IfxGtm_Atom.c:151
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxGtm_Atom_Agc_buildFeatureForChannel
IFX_EXTERN uint32 IfxGtm_Atom_Agc_buildFeatureForChannel(IfxGtm_Atom_Ch channel, boolean enabled, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable for a single channel.
Definition: IfxGtm_Atom.c:89
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxGtm_Atom_SomcSignalLevelControl_toggle
toggle the output signal level
Definition: IfxGtm_Atom.h:132
IfxGtm_Atom_Ch_getTimerPointer
IFX_EXTERN volatile uint32 * IfxGtm_Atom_Ch_getTimerPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the Timer pointer.
Definition: IfxGtm_Atom.c:366
IfxGtm_Atom_Ch_getOutputLevel
IFX_EXTERN boolean IfxGtm_Atom_Ch_getOutputLevel(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Gets the ATOM output level.
Definition: IfxGtm_Atom.c:348
IfxGtm_Atom_SomcControl_ccu0Ts0
compare CCU0 against TS0
Definition: IfxGtm_Atom.h:117
IfxGtm_Atom_Ch_OutputTrigger_forward
Forward the trigger from the previous channel.
Definition: IfxGtm_Atom.h:79
IfxGtm_Atom_Ch_ResetEvent_onTrigger
Definition: IfxGtm_Atom.h:88
IfxGtm_Atom_Mode
IfxGtm_Atom_Mode
Enum for ATOM mode.
Definition: IfxGtm_Atom.h:93
IfxGtm_Atom_SomcControl
IfxGtm_Atom_SomcControl
Match Compare control modes.
Definition: IfxGtm_Atom.h:113
IfxGtm_Atom_Mode_outputPwm
Definition: IfxGtm_Atom.h:97
IfxGtm_Cmu_Clk
IfxGtm_Cmu_Clk
Definition: IfxGtm_Cmu.h:64
IfxGtm_Atom_Ch_setTriggerOutput
IFX_EXTERN void IfxGtm_Atom_Ch_setTriggerOutput(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Ch_OutputTrigger trigger)
Sets the channel trigger output.
Definition: IfxGtm_Atom.c:513
IfxGtm_Atom_Ch_setOneShotMode
IFX_EXTERN void IfxGtm_Atom_Ch_setOneShotMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, boolean enabled)
Enable/disable the one shot mode.
Definition: IfxGtm_Atom.c:489
IfxGtm_Atom_Ch_setAruInput
IFX_EXTERN void IfxGtm_Atom_Ch_setAruInput(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, boolean enabled)
enable/disable ARU input for the ATOM channel specified.
Definition: IfxGtm_Atom.c:521
IfxGtm_Atom_AruInput
IfxGtm_Atom_AruInput
Enable/disable of Aru Input to ATOM channel.
Definition: IfxGtm_Atom.h:105
IfxGtm_Atom_getShadowOnePointer
IFX_EXTERN volatile uint32 * IfxGtm_Atom_getShadowOnePointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the shadow One pointer.
Definition: IfxGtm_Atom.c:591
IfxGtm_Atom_Ch_isZeroNotification
IFX_EXTERN boolean IfxGtm_Atom_Ch_isZeroNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the status of channel Zero notification.
Definition: IfxGtm_Atom.c:381
IfxGtm_Atom_SomcControl_compareBoth1
compare CCU0 and CCU1 in parallel
Definition: IfxGtm_Atom.h:116
IfxGtm_Atom_Ch_setCompareOneShadow
IFX_EXTERN void IfxGtm_Atom_Ch_setCompareOneShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowOne)
Sets the compare 1 shadow value.
Definition: IfxGtm_Atom.c:431
IfxGtm_Atom_Ch_setSignalLevel
IFX_EXTERN void IfxGtm_Atom_Ch_setSignalLevel(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, Ifx_ActiveState activeState)
Sets the signal level.
Definition: IfxGtm_Atom.c:505
IfxGtm_Atom_Ch_setAruReadAddress1
IFX_EXTERN void IfxGtm_Atom_Ch_setAruReadAddress1(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 address)
set the ARU read address 1
Definition: IfxGtm_Atom.c:560
IfxGtm_Tbu.h
GTM basic functionality.
IfxGtm_Atom_Ch_getCompareZero
IFX_EXTERN uint32 IfxGtm_Atom_Ch_getCompareZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare zero value.
Definition: IfxGtm_Atom.c:332
IfxGtm_Atom_Ch_setClockSource
IFX_EXTERN void IfxGtm_Atom_Ch_setClockSource(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock)
Sets the channel clock source.
Definition: IfxGtm_Atom.c:406
IfxGtm_Atom_Ch_isOneNotification
IFX_EXTERN boolean IfxGtm_Atom_Ch_isOneNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the status of channel One notification.
Definition: IfxGtm_Atom.c:372
IfxGtm_Atom_SomcSignalLevelControl_sl0out1
SL= 0 -> Out=1; SL=1->Out=0.
Definition: IfxGtm_Atom.h:130
IfxGtm_Atom_SomcControl_ccu0Ts0ccu1Ts12
compare CCU0 with TS0 then CCU1 with TS1 or TS2
Definition: IfxGtm_Atom.h:121
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxGtm_Atom_Agc_setChannelForceUpdate
IFX_EXTERN void IfxGtm_Atom_Agc_setChannelForceUpdate(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean resetEnabled)
Enable/disable one channel for update (FUPD)
Definition: IfxGtm_Atom.c:224
IfxGtm_Atom_Ch_OutputTrigger
IfxGtm_Atom_Ch_OutputTrigger
Reset source for channel counter CN0.
Definition: IfxGtm_Atom.h:77
IfxGtm_Atom_Ch_setCompareZeroShadow
IFX_EXTERN void IfxGtm_Atom_Ch_setCompareZeroShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowZero)
Sets the compare 0 shadow value.
Definition: IfxGtm_Atom.c:447
IfxGtm_Atom_Ch_getCompareOnePointer
IFX_EXTERN volatile uint32 * IfxGtm_Atom_Ch_getCompareOnePointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare one pointer.
Definition: IfxGtm_Atom.c:324
IfxGtm_Atom_Ch_getCompareOne
IFX_EXTERN uint32 IfxGtm_Atom_Ch_getCompareOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare one value.
Definition: IfxGtm_Atom.c:316
IfxGtm_Atom_Ch_setCompare
IFX_EXTERN void IfxGtm_Atom_Ch_setCompare(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareZero, uint32 compareOne)
Sets the compare 0 and 1 values.
Definition: IfxGtm_Atom.c:414
IfxGtm_Atom_Ch_setSomcControl
IFX_EXTERN void IfxGtm_Atom_Ch_setSomcControl(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_SomcControl control)
sets the SOMC control bits for the specified ATOM channel
Definition: IfxGtm_Atom.c:537
IfxGtm_Atom_AruInput_enabled
ARU input enabled.
Definition: IfxGtm_Atom.h:108
IfxGtm_Atom_Agc_enableChannelsTrigger
IFX_EXTERN void IfxGtm_Atom_Agc_enableChannelsTrigger(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask)
Enable/disable the TGC channels trigger.
Definition: IfxGtm_Atom.c:187
IfxGtm_Atom_SomcControl_cancelCompare
Cancel pending compare events.
Definition: IfxGtm_Atom.h:122
IfxGtm_Atom_Ch_setMode
IFX_EXTERN void IfxGtm_Atom_Ch_setMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Mode mode)
set the Atom operating mode
Definition: IfxGtm_Atom.c:463
IfxGtm_Atom_Agc_resetChannels
IFX_EXTERN void IfxGtm_Atom_Agc_resetChannels(Ifx_GTM_ATOM_AGC *agc, uint32 resetMask)
Reset one or more channels.
Definition: IfxGtm_Atom.c:205
IfxGtm_Atom_Ch_setCompareZero
IFX_EXTERN void IfxGtm_Atom_Ch_setCompareZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareZero)
Sets the compare 0 value.
Definition: IfxGtm_Atom.c:439
IfxGtm_Atom_Ch_getCompareZeroPointer
IFX_EXTERN volatile uint32 * IfxGtm_Atom_Ch_getCompareZeroPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare zero pointer.
Definition: IfxGtm_Atom.c:340
IfxGtm_IrqMode
IfxGtm_IrqMode
Enum for GTM interrupt modes.
Definition: IfxGtm.h:64
IfxGtm_Atom_getShadowZero
IFX_EXTERN uint32 IfxGtm_Atom_getShadowZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the shadow zero value.
Definition: IfxGtm_Atom.c:567
IfxGtm_Cmu.h
GTM basic functionality.
IfxGtm_Atom_Agc_trigger
IFX_EXTERN void IfxGtm_Atom_Agc_trigger(Ifx_GTM_ATOM_AGC *agc)
Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG)
Definition: IfxGtm_Atom.c:256
IfxGtm_Atom_Agc_enableTimeTrigger
IFX_EXTERN void IfxGtm_Atom_Agc_enableTimeTrigger(Ifx_GTM_ATOM_AGC *agc, boolean enabled)
Enable/disable the time base trigger.
Definition: IfxGtm_Atom.c:199
IfxGtm_Atom_Agc_enableChannelOutput
IFX_EXTERN void IfxGtm_Atom_Agc_enableChannelOutput(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel output (OUTEN)
Definition: IfxGtm_Atom.c:127
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxGtm.h
GTM basic functionality.
IfxGtm_cfg.h
GTM on-chip implementation data.
IfxGtm_Atom_SomcControl_compareBoth
compare CCU0 and CCU1 in parallel
Definition: IfxGtm_Atom.h:115
IfxGtm_Atom_Agc_enableChannel
IFX_EXTERN void IfxGtm_Atom_Agc_enableChannel(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel (ENDIS)
Definition: IfxGtm_Atom.c:109
IfxGtm_Atom_Ch
IfxGtm_Atom_Ch
Enum for ATOM channels.
Definition: IfxGtm_cfg.h:258
IfxGtm_Atom_Mode_outputImmediate
Definition: IfxGtm_Atom.h:95


iLLD_TC38A: IfxGtm_Atom_Dtm_PwmHl.c Source File

  • Gtm
  • Atom
  • Dtm_PwmHl
IfxGtm_Atom_Dtm_PwmHl.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Atom_Dtm_PwmHl.c
3 * \brief GTM DTM_PWMHL details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxGtm_Atom_Dtm_PwmHl.h"
47 #include "_Utilities/Ifx_Assert.h"
48 #include "stddef.h"
49 #include "string.h"
50
51 /******************************************************************************/
52 /*------------------------Inline Function Prototypes--------------------------*/
53 /******************************************************************************/
54
55 /** \brief Sets the ON time
56 * \return None
57 */
58 IFX_INLINE void IfxGtm_Atom_Dtm_PwmHl_setOnTime(IfxGtm_AtomDtm_PwmHl *driver, Ifx_TimerValue *tOn);
59
60 /** \brief Inverts the active state
61 * \param activeState Active state
62 * \return State
63 */
64 IFX_INLINE Ifx_ActiveState IfxGtm_Atom_Dtm_PwmHl_invertActiveState(Ifx_ActiveState activeState);
65
66 /******************************************************************************/
67 /*-----------------------Private Function Prototypes--------------------------*/
68 /******************************************************************************/
69
70 /** \brief Sets switched to OFF
71 * \param driver driver GTM ATOM PWM driver
72 * \param tOn ON time
73 * \param shift Shift value in ticks
74 * \return None
75 */
76 IFX_STATIC void IfxGtm_Atom_Dtm_PwmHl_updateAndShiftOff(IfxGtm_AtomDtm_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift);
77
78 /** \brief Updates the x output duty cycle in center aligned and center aligned inverted modes
79 * \param driver GTM ATOM PWM driver
80 * \param tOn T on
81 * \return None
82 */
83 IFX_STATIC void IfxGtm_Atom_Dtm_PwmHl_updateCenterAligned(IfxGtm_AtomDtm_PwmHl *driver, Ifx_TimerValue *tOn);
84
85 /** \brief Updates the x output duty cycle in edge aligned modes (left and right aligned)
86 * \param driver GTM ATOM PWM driver
87 * \param tOn T On
88 * \return None
89 */
90 IFX_STATIC void IfxGtm_Atom_Dtm_PwmHl_updateEdgeAligned(IfxGtm_AtomDtm_PwmHl *driver, Ifx_TimerValue *tOn);
91
92 /** \brief Set the outputs to inactive
93 * \param driver GTM ATOM PWM driver
94 * \param tOn T On
95 * \return None
96 */
97 IFX_STATIC void IfxGtm_Atom_Dtm_PwmHl_updateOff(IfxGtm_AtomDtm_PwmHl *driver, Ifx_TimerValue *tOn);
98
99 /** \brief Update Pulse
100 * \param driver GTM ATOM PWM driver
101 * \param tOn ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
102 * \param offset Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
103 * \return None
104 */
105 IFX_STATIC void IfxGtm_Atom_Dtm_PwmHl_updatePulse(IfxGtm_AtomDtm_PwmHl *driver, float32 *tOn, float32 *offset);
106
107 /** \brief Set Pulse to OFF
108 * \param driver GTM ATOM PWM driver
109 * \param tOn ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
110 * \param offset Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
111 * \return None
112 */
113 IFX_STATIC void IfxGtm_Atom_Dtm_PwmHl_updatePulseOff(IfxGtm_AtomDtm_PwmHl *driver, float32 *tOn, float32 *offset);
114
115 /** \brief Update Shift Center Aligned
116 * \param driver GTM ATOM PWM driver
117 * \param tOn ON time
118 * \param shift Shift value in ticks
119 * \return None
120 */
121 IFX_STATIC void IfxGtm_Atom_Dtm_PwmHl_updateShiftCenterAligned(IfxGtm_AtomDtm_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift);
122
123 /**
124 */
125 IFX_STATIC Ifx_TimerValue IfxGtm_Atom_Dtm_PwmHl_getDeadtimeInTimerClockTicks(IfxGtm_AtomDtm_PwmHl *driver);
126
127 /******************************************************************************/
128 /*------------------------Private Variables/Constants-------------------------*/
129 /******************************************************************************/
130
131 IFX_STATIC IFX_CONST IfxGtm_Atom_Dtm_PwmHl_Mode IfxGtm_Atom_Dtm_PwmHl_modes[Ifx_Pwm_Mode_off + 1] = {
132 {Ifx_Pwm_Mode_centerAligned, FALSE, &IfxGtm_Atom_Dtm_PwmHl_updateCenterAligned, &IfxGtm_Atom_Dtm_PwmHl_updateShiftCenterAligned, &IfxGtm_Atom_Dtm_PwmHl_updatePulse },
133 {Ifx_Pwm_Mode_centerAlignedInverted, TRUE, &IfxGtm_Atom_Dtm_PwmHl_updateCenterAligned, &IfxGtm_Atom_Dtm_PwmHl_updateShiftCenterAligned, &IfxGtm_Atom_Dtm_PwmHl_updatePulse },
134 {Ifx_Pwm_Mode_leftAligned, FALSE, &IfxGtm_Atom_Dtm_PwmHl_updateEdgeAligned, &IfxGtm_Atom_Dtm_PwmHl_updateAndShiftOff, &IfxGtm_Atom_Dtm_PwmHl_updatePulse },
135 {Ifx_Pwm_Mode_rightAligned, TRUE, &IfxGtm_Atom_Dtm_PwmHl_updateEdgeAligned, &IfxGtm_Atom_Dtm_PwmHl_updateAndShiftOff, &IfxGtm_Atom_Dtm_PwmHl_updatePulse },
136 {Ifx_Pwm_Mode_off, FALSE, &IfxGtm_Atom_Dtm_PwmHl_updateOff, &IfxGtm_Atom_Dtm_PwmHl_updateAndShiftOff, &IfxGtm_Atom_Dtm_PwmHl_updatePulseOff},
137 };
138
139 /******************************************************************************/
140 /*---------------------Inline Function Implementations------------------------*/
141 /******************************************************************************/
142
143 IFX_INLINE void IfxGtm_Atom_Dtm_PwmHl_setOnTime(IfxGtm_AtomDtm_PwmHl *driver, Ifx_TimerValue *tOn)
144 {
145 driver->update(driver, tOn);
146 }
147
148
149 IFX_INLINE Ifx_ActiveState IfxGtm_Atom_Dtm_PwmHl_invertActiveState(Ifx_ActiveState activeState)
150 {
151 return activeState == Ifx_ActiveState_low ? Ifx_ActiveState_high : Ifx_ActiveState_low;
152 }
153
154
155 /******************************************************************************/
156 /*-------------------------Function Implementations---------------------------*/
157 /******************************************************************************/
158
159 boolean IfxGtm_Atom_Dtm_PwmHl_init(IfxGtm_AtomDtm_PwmHl *driver, const IfxGtm_Atom_Dtm_PwmHl_Config *config)
160 {
161 boolean result = TRUE;
162 uint16 channelMask;
163 uint16 channelsMask = 0;
164 uint32 channelIndex;
165
166 IfxGtm_Atom_Timer *timer = config->timer;
167
168 driver->base.mode = Ifx_Pwm_Mode_init;
169 driver->timer = timer;
170 driver->base.setMode = 0;
171 driver->base.inverted = FALSE;
172 driver->base.ccxActiveState = config->base.ccxActiveState;
173 driver->base.coutxActiveState = config->base.coutxActiveState;
174 driver->base.channelCount = config->base.channelCount;
175
176 driver->atom = &(timer->gtm->ATOM[config->atom]);
177 /* Only one AGC */
178 driver->agc = (Ifx_GTM_ATOM_AGC *)&driver->atom->AGC.GLB_CTRL;
179
180 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->base.channelCount <= IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS);
181
182 IfxGtm_Cmu_Clk clock = IfxGtm_Atom_Ch_getClockSource(timer->atom, timer->timerChannel);
183
184 for (channelIndex = 0; channelIndex < config->base.channelCount; channelIndex++)
185 {
186 IfxGtm_Atom_Ch channel;
187
188 /* Initialise the Deadtime generation */
189 driver->dtm[channelIndex] = IfxGtm_Dtm_getDtmPointer(timer->gtm, IfxGtm_Dtm_getCdtmIndex(config->atom), IfxGtm_Dtm_getDtmIndex(config->atom, config->ccx[channelIndex]->channel));
190 result &= driver->dtm[channelIndex] != NULL_PTR;
191
192 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, driver->dtm[channelIndex] != NULL_PTR);
193
194 if (driver->dtm[channelIndex] != NULL_PTR)
195 {
196 /* CCX */
197 channel = config->ccx[channelIndex]->channel;
198 driver->ccx[channelIndex] = channel;
199 channelMask = 1 << channel;
200 channelsMask |= channelMask;
201
202 /* Initialize the timer part */
203 IfxGtm_Atom_Ch_configurePwmMode(driver->atom, channel, clock,
204 config->base.ccxActiveState,
205 IfxGtm_Atom_Ch_ResetEvent_onTrigger, IfxGtm_Atom_Ch_OutputTrigger_forward);
206
207 /* Initialize the DTM part */
208 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, IfxGtm_Dtm_getDtmChannel(config->ccx[channelIndex]->channel) == IfxGtm_Dtm_getDtmChannel(config->coutx[channelIndex]->channel));
209
210 IfxGtm_Dtm_setClockSource(driver->dtm[channelIndex], config->deadTimeClock);
211 driver->dtmChannel[channelIndex] = IfxGtm_Dtm_getDtmChannel(config->ccx[channelIndex]->channel);
212 IfxGtm_Dtm_setOutput0DeadTimePath(driver->dtm[channelIndex], driver->dtmChannel[channelIndex], IfxGtm_Dtm_DeadTimePath_enable);
213 IfxGtm_Dtm_setOutput1DeadTimePath(driver->dtm[channelIndex], driver->dtmChannel[channelIndex], IfxGtm_Dtm_DeadTimePath_enable);
214
215 /* Initialize the port */
216 if (config->initPins == TRUE)
217 {
218 IfxGtm_PinMap_setAtomTout(config->ccx[channelIndex],
219 ((config->base.ccxOutputEnabled & (0x1 << channelIndex)) != 0) ? config->base.outputMode : IfxPort_OutputMode_none, config->base.outputDriver);
220 }
221
222 /* COUTX */
223 channel = config->coutx[channelIndex]->channel;
224 driver->coutx[channelIndex] = channel;
225
226 /* Initialize the port */
227 if (config->initPins == TRUE)
228 {
229 IfxGtm_PinMap_setAtomTout(config->coutx[channelIndex],
230 ((config->base.coutxOutputEnabled & (0x1 << channelIndex)) != 0) ? config->base.outputMode : IfxPort_OutputMode_none, config->base.outputDriver);
231 }
232 }
233 }
234
235 /* Initialize the clock value, assumes all DTM are connected to the same clock */
236 if (config->base.channelCount > 0)
237 {
238 driver->dtmClockFreq = IfxGtm_Dtm_getClockFrequency(timer->gtm, IfxGtm_Dtm_getCdtmIndex(config->atom), IfxGtm_Dtm_getDtmIndex(config->atom, config->ccx[0]->channel));
239 result &= IfxGtm_Atom_Dtm_PwmHl_setDeadtime(driver, config->base.deadtime);
240 }
241 else
242 {
243 driver->dtmClockFreq = 0;
244 }
245
246 IfxGtm_Atom_Dtm_PwmHl_setMinPulse(driver, config->base.minPulse); // must be called after IfxGtm_AtomDtm_PwmHl_setDeadtime
247
248 IfxGtm_Atom_Agc_enableChannelsOutput(driver->agc, channelsMask, 0, FALSE);
249 IfxGtm_Atom_Agc_enableChannels(driver->agc, channelsMask, 0, FALSE);
250
251 IfxGtm_Atom_Dtm_PwmHl_setMode(driver, Ifx_Pwm_Mode_off);
252
253 Ifx_TimerValue tOn[IFXGTM_ATOM_DTM_PWMHL_MAX_NUM_CHANNELS] = {0};
254 IfxGtm_Atom_Dtm_PwmHl_updateOff(driver, tOn); /* tOn do not need defined values */
255
256 /* Transfer the shadow registers */
257 IfxGtm_Atom_Agc_setChannelsForceUpdate(driver->agc, channelsMask, 0, 0, 0);
258 IfxGtm_Atom_Agc_trigger(driver->agc);
259 IfxGtm_Atom_Agc_setChannelsForceUpdate(driver->agc, 0, channelsMask, 0, 0);
260
261 /* Enable timer to update the channels */
262
263 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
264 {
265 IfxGtm_Atom_Timer_addToChannelMask(timer, driver->ccx[channelIndex]);
266 }
267
268 return result;
269 }
270
271
272 void IfxGtm_Atom_Dtm_PwmHl_initConfig(IfxGtm_Atom_Dtm_PwmHl_Config *config)
273 {
274 IfxStdIf_PwmHl_initConfig(&config->base);
275 config->timer = NULL_PTR;
276 config->atom = IfxGtm_Atom_0;
277 config->ccx = NULL_PTR;
278 config->coutx = NULL_PTR;
279 config->deadTimeClock = IfxGtm_Dtm_ClockSource_systemClock;
280 config->initPins = TRUE;
281 }
282
283
284 float32 IfxGtm_Atom_Dtm_PwmHl_getDeadtime(IfxGtm_AtomDtm_PwmHl *driver)
285 {
286 return IfxStdIf_Timer_tickToS(driver->dtmClockFreq, driver->base.deadtime);
287 }
288
289
290 Ifx_TickTime IfxGtm_Atom_Dtm_PwmHl_getDeadtimeTick(IfxGtm_AtomDtm_PwmHl *driver)
291 {
292 return driver->base.deadtime;
293 }
294
295
296 float32 IfxGtm_Atom_Dtm_PwmHl_getMinPulse(IfxGtm_AtomDtm_PwmHl *driver)
297 {
298 return IfxStdIf_Timer_tickToS(driver->timer->base.clockFreq, driver->base.minPulse - IfxGtm_Atom_Dtm_PwmHl_getDeadtimeInTimerClockTicks(driver));
299 }
300
301
302 Ifx_Pwm_Mode IfxGtm_Atom_Dtm_PwmHl_getMode(IfxGtm_AtomDtm_PwmHl *driver)
303 {
304 return driver->base.mode;
305 }
306
307
308 boolean IfxGtm_Atom_Dtm_PwmHl_setDeadtime(IfxGtm_AtomDtm_PwmHl *driver, float32 deadtime)
309 {
310 uint32 channelIndex;
311 Ifx_TimerValue value = IfxStdIf_Timer_sToTick(driver->dtmClockFreq, deadtime);
312
313 if (value > IFXGTM_ATOM_DTM_PWMHL_MAX_DEADTIME_IN_TICKS)
314 {
315 return FALSE;
316 }
317 else
318 {
319 driver->base.deadtime = value;
320
321 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
322 {
323 IfxGtm_Dtm_setDeadtime(driver->dtm[channelIndex], driver->dtmChannel[channelIndex], value, value);
324 }
325 }
326
327 return TRUE;
328 }
329
330
331 boolean IfxGtm_Atom_Dtm_PwmHl_setMinPulse(IfxGtm_AtomDtm_PwmHl *driver, float32 minPulse)
332 {
333 Ifx_TimerValue value = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, minPulse);
334
335 driver->base.minPulse = value + IfxGtm_Atom_Dtm_PwmHl_getDeadtimeInTimerClockTicks(driver);
336 driver->base.maxPulse = driver->timer->base.period - driver->base.minPulse;
337
338 return TRUE;
339 }
340
341
342 boolean IfxGtm_Atom_Dtm_PwmHl_setMode(IfxGtm_AtomDtm_PwmHl *driver, Ifx_Pwm_Mode mode)
343 {
344 boolean result = TRUE;
345 IfxGtm_Atom_Dtm_PwmHl_Base *base = &driver->base;
346
347 if (base->mode != mode)
348 {
349 if ((mode > Ifx_Pwm_Mode_off) || (IfxGtm_Atom_Dtm_PwmHl_modes[mode].update == NULL_PTR))
350 {
351 mode = Ifx_Pwm_Mode_off;
352 result = FALSE;
353 }
354
355 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, mode == IfxGtm_AtomDtm_PwmHl_modes[mode].mode);
356
357 base->mode = mode;
358 driver->update = IfxGtm_Atom_Dtm_PwmHl_modes[mode].update;
359 driver->updateAndShift = IfxGtm_Atom_Dtm_PwmHl_modes[mode].updateAndShift;
360 driver->updatePulse = IfxGtm_Atom_Dtm_PwmHl_modes[mode].updatePulse;
361
362 if (base->mode != Ifx_Pwm_Mode_off)
363 {
364 base->inverted = IfxGtm_Atom_Dtm_PwmHl_modes[mode].inverted;
365 }
366 else
367 { /* Keep previous inverted for off mode */
368 }
369
370 if (base->inverted)
371 {
372 // TODO update DTM to invert, user SR
373 }
374 else
375 {
376 // TODO update DTM to invert, user SR
377 }
378 }
379
380 return result;
381 }
382
383
384 void IfxGtm_Atom_Dtm_PwmHl_setOnTimeAndShift(IfxGtm_AtomDtm_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
385 {
386 driver->updateAndShift(driver, tOn, shift);
387 }
388
389
390 void IfxGtm_Atom_Dtm_PwmHl_setPulse(IfxGtm_AtomDtm_PwmHl *driver, float32 *tOn, float32 *offset)
391 {
392 driver->updatePulse(driver, tOn, offset);
393 }
394
395
396 void IfxGtm_Atom_Dtm_PwmHl_setupChannels(IfxGtm_AtomDtm_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
397 {
398 /* Dummy Function for StdIf Compile*/
399 IFX_UNUSED_PARAMETER(driver)
400 IFX_UNUSED_PARAMETER(activeCh)
401 IFX_UNUSED_PARAMETER(stuckSt)
402 }
403
404
405 boolean IfxGtm_Atom_Dtm_PwmHl_stdIfPwmHlInit(IfxStdIf_PwmHl *stdif, IfxGtm_AtomDtm_PwmHl *driver)
406 {
407 /* Ensure the stdif is reset to zeros */
408 memset(stdif, 0, sizeof(IfxStdIf_PwmHl));
409
410 /* *INDENT-OFF* Note: this file was indented manually by the author. */
411 /* Set the API link */
412 stdif->driver = driver;
413 stdif->setDeadtime = (IfxStdIf_PwmHl_SetDeadtime )&IfxGtm_Atom_Dtm_PwmHl_setDeadtime;
414 stdif->getDeadtime = (IfxStdIf_PwmHl_GetDeadtime )&IfxGtm_Atom_Dtm_PwmHl_getDeadtime;
415 stdif->getDeadtimeTick = (IfxStdIf_PwmHl_GetDeadtimeTick )&IfxGtm_Atom_Dtm_PwmHl_getDeadtimeTick ;
416 stdif->setMinPulse = (IfxStdIf_PwmHl_SetMinPulse )&IfxGtm_Atom_Dtm_PwmHl_setMinPulse;
417 stdif->getMinPulse = (IfxStdIf_PwmHl_GetMinPulse )&IfxGtm_Atom_Dtm_PwmHl_getMinPulse;
418 stdif->getMode = (IfxStdIf_PwmHl_GetMode )&IfxGtm_Atom_Dtm_PwmHl_getMode;
419 stdif->setMode = (IfxStdIf_PwmHl_SetMode )&IfxGtm_Atom_Dtm_PwmHl_setMode;
420 stdif->setOnTime = (IfxStdIf_PwmHl_SetOnTime )&IfxGtm_Atom_Dtm_PwmHl_setOnTime;
421 stdif->setOnTimeAndShift = (IfxStdIf_PwmHl_SetOnTimeAndShift)&IfxGtm_Atom_Dtm_PwmHl_setOnTimeAndShift;
422 stdif->setPulse = (IfxStdIf_PwmHl_SetPulse )&IfxGtm_Atom_Dtm_PwmHl_setPulse;
423 stdif->setupChannels = (IfxStdIf_PwmHl_SetupChannels )&IfxGtm_Atom_Dtm_PwmHl_setupChannels;
424 IfxGtm_Atom_Timer_stdIfTimerInit(&stdif->timer, driver->timer);
425 /* *INDENT-ON* */
426
427 return TRUE;
428 }
429
430
431 IFX_STATIC void IfxGtm_Atom_Dtm_PwmHl_updateAndShiftOff(IfxGtm_AtomDtm_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
432 {
433 IfxGtm_Atom_Dtm_PwmHl_updateOff(driver, NULL_PTR);
434 IFX_UNUSED_PARAMETER(tOn)
435 IFX_UNUSED_PARAMETER(shift)
436 }
437
438
439 IFX_STATIC void IfxGtm_Atom_Dtm_PwmHl_updateCenterAligned(IfxGtm_AtomDtm_PwmHl *driver, Ifx_TimerValue *tOn)
440 {
441 /* FIXME make use of the Up Down counter mode */
442 uint8 channelIndex;
443 Ifx_TimerValue period;
444
445 period = driver->timer->base.period;
446
447 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
448 {
449 Ifx_TimerValue x; /* x=period*dutyCycle, x=OnTime+deadTime */
450 x = tOn[channelIndex];
451
452 if (driver->base.inverted != FALSE)
453 {
454 x = period - x;
455 }
456 else
457 {}
458
459 if (x < driver->base.minPulse)
460 { /* For deadtime condition: avoid leading edge of top channel to occur after the trailing edge */
461 x = 0;
462 }
463 else if (x > driver->base.maxPulse)
464 {
465 x = period;
466 }
467 else
468 {}
469
470 if (x == 0)
471 { /* 0% duty cycle */
472 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccx[channelIndex], period + 1, period + 1);
473 }
474 else
475 { /* x% duty cycle and 100 % duty cycle */
476 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccx[channelIndex], (period - x) / 2, (period + x) / 2);
477 }
478 }
479 }
480
481
482 IFX_STATIC void IfxGtm_Atom_Dtm_PwmHl_updateEdgeAligned(IfxGtm_AtomDtm_PwmHl *driver, Ifx_TimerValue *tOn)
483 {
484 uint8 channelIndex;
485 Ifx_TimerValue period;
486
487 period = driver->timer->base.period;
488
489 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
490 {
491 Ifx_TimerValue x; /* x=period*dutyCycle, x=OnTime+deadTime */
492 Ifx_TimerValue cm0, cm1;
493 x = tOn[channelIndex];
494
495 if (driver->base.inverted != FALSE)
496 {
497 x = period - x;
498 }
499 else
500 {}
501
502 if (x < driver->base.minPulse)
503 { /* For deadtime condition: avoid leading edge of top channel to occur after the trailing edge */
504 x = 0;
505 }
506 else if (x > driver->base.maxPulse)
507 {
508 x = period;
509 }
510 else
511 {}
512
513 /* Special handling due to GTM issue */
514 if (x == period) /* 100% duty cycle */
515 {
516 cm0 = 0;
517 cm1 = period + 1;
518 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccx[channelIndex], cm0, cm1);
519 }
520 else if (x == 0)
521 {
522 cm0 = period + 1;
523 cm1 = 0;
524 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccx[channelIndex], cm0, cm1);
525 }
526 else
527 {
528 /* x% duty cycle */
529
530 if (driver->base.mode == Ifx_Pwm_Mode_leftAligned)
531 {
532 cm0 = 0;
533 cm1 = x;
534 }
535 else
536 {
537 // right aligned
538 cm0 = x;
539 cm1 = 0;
540 }
541
542 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccx[channelIndex], cm0, cm1);
543 }
544 }
545 }
546
547
548 IFX_STATIC void IfxGtm_Atom_Dtm_PwmHl_updateOff(IfxGtm_AtomDtm_PwmHl *driver, Ifx_TimerValue *tOn)
549 {
550 IFX_UNUSED_PARAMETER(tOn)
551 uint8 channelIndex;
552 Ifx_TimerValue period;
553 period = driver->timer->base.period;
554
555 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
556 {
557 /* 0% duty cycle */
558 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccx[channelIndex], period + 1, period + 1);
559 }
560 }
561
562
563 IFX_STATIC void IfxGtm_Atom_Dtm_PwmHl_updatePulse(IfxGtm_AtomDtm_PwmHl *driver, float32 *tOn, float32 *offset)
564 {
565 uint8 channelIndex;
566 Ifx_TimerValue period;
567
568 period = driver->timer->base.period;
569
570 /* Top channels */
571 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
572 {
573 Ifx_TimerValue x; /* x=period*dutyCycle, x=OnTime+deadTime */
574 Ifx_TimerValue o;
575 Ifx_TimerValue cm0, cm1;
576
577 x = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, tOn[channelIndex]);
578 o = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, offset[channelIndex]);
579
580 if (driver->base.inverted != FALSE)
581 {
582 x = period - x;
583 }
584 else
585 {}
586
587 if ((x < driver->base.minPulse) || (o > period))
588 {
589 x = 0;
590 }
591 else if ((x > driver->base.maxPulse) || (o + x > period))
592 {
593 x = period;
594 }
595 else
596 {}
597
598 /* Special handling due to GTM issue */
599 if (x == period)
600 { /* 100% duty cycle */
601 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccx[channelIndex],
602 period + 1 /* No compare event */,
603 2 /* 1st compare event (issue: expected to be 1)*/);
604 }
605 else if (x == 0)
606 {
607 cm0 = 1;
608 cm1 = period + 2;
609 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccx[channelIndex], cm0, cm1);
610 }
611 else
612 { /* x% duty cycle */
613 cm1 = 2 + o; // CM1, set to 2 due to a GTM issue. should be 1 according to spec
614 cm0 = o + x; // CM0, set to x+2 due to a GTM issue. should be x+1 according to spec
615 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccx[channelIndex], cm0, cm1);
616 }
617 }
618
619 /* FIXME enable selection between top and bottom channels. See PWM HL without DTM */
620 }
621
622
623 IFX_STATIC void IfxGtm_Atom_Dtm_PwmHl_updatePulseOff(IfxGtm_AtomDtm_PwmHl *driver, float32 *tOn, float32 *offset)
624 {
625 IFX_UNUSED_PARAMETER(tOn)
626 IFX_UNUSED_PARAMETER(offset)
627
628 IfxGtm_Atom_Dtm_PwmHl_updateOff(driver, NULL_PTR);
629 }
630
631
632 IFX_STATIC void IfxGtm_Atom_Dtm_PwmHl_updateShiftCenterAligned(IfxGtm_AtomDtm_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
633 {
634 uint8 channelIndex;
635 Ifx_TimerValue period;
636
637 period = driver->timer->base.period;
638
639 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
640 {
641 Ifx_TimerValue x; /* x=period*dutyCycle, x=OnTime+deadTime */
642 Ifx_TimerValue s; /* Shift value */
643 Ifx_TimerValue cm0, cm1;
644 x = tOn[channelIndex];
645
646 if (driver->base.inverted != FALSE)
647 {
648 x = period - x;
649 }
650 else
651 {}
652
653 if (x < driver->base.minPulse)
654 { /* For deadtime condition: avoid leading edge of top channel to occur after the trailing edge */
655 x = 0;
656 }
657 else if (x > driver->base.maxPulse)
658 {
659 x = period;
660 }
661 else
662 {}
663
664 /* Special handling due to GTM issue */
665 if (x == period)
666 { /* 100% duty cycle */
667 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccx[channelIndex],
668 period + 1 /* No compare event */,
669 2 /* 1st compare event (issue: expected to be 1)*/);
670 }
671 else if (x == 0)
672 {
673 cm0 = 1;
674 cm1 = period + 2;
675 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccx[channelIndex], cm0, cm1);
676 }
677 else
678 { /* x% duty cycle */
679 s = shift[channelIndex];
680
681 if (s > 0)
682 {
683 s = __minX(s, (period - x) / 2 - 1);
684 }
685 else
686 {
687 s = __maxX(s, (x - period) / 2 + 1);
688 }
689
690 cm1 = s + (period - x) / 2; // CM1
691 cm0 = s + (period + x) / 2; // CM0
692 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccx[channelIndex], cm0, cm1);
693 }
694 }
695 }
696
697
698 IFX_STATIC Ifx_TimerValue IfxGtm_Atom_Dtm_PwmHl_getDeadtimeInTimerClockTicks(IfxGtm_AtomDtm_PwmHl *driver)
699 {
700 Ifx_TimerValue deadtimeInTimerClkTicks;
701
702 if (driver->dtmClockFreq == driver->timer->base.clockFreq)
703 {
704 // same clock frequency
705 deadtimeInTimerClkTicks = driver->base.deadtime;
706 }
707 else if (driver->base.deadtime == 0)
708 {
709 deadtimeInTimerClkTicks = 0;
710 }
711 else
712 {
713 // convert deadtime from DTM clk frequency to TIMER clk frequency
714 float32 deadtimeInS = IfxStdIf_Timer_tickToS(driver->dtmClockFreq, driver->base.deadtime);
715 deadtimeInTimerClkTicks = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, deadtimeInS);
716 //TODO: round-up?
717 }
718
719 return deadtimeInTimerClkTicks;
720 }
IfxGtm_Atom_Agc_enableChannelsOutput
void IfxGtm_Atom_Agc_enableChannelsOutput(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels output (OUTEN)
Definition: IfxGtm_Atom.c:169
Ifx_ActiveState_high
The signal is high active.
Definition: Ifx_Types.h:116
IfxStdIf_PwmHl_::timer
IfxStdIf_Timer timer
Timer related standard interface.
Definition: IfxStdIf_PwmHl.h:196
Ifx_Pwm_Mode
Ifx_Pwm_Mode
Definition: Ifx_Types.h:175
IfxGtm_Atom_Timer_stdIfTimerInit
boolean IfxGtm_Atom_Timer_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxGtm_Atom_Timer *driver)
Initializes the standard interface timer.
Definition: IfxGtm_Atom_Timer.c:381
Ifx_ActiveState_low
The signal is low active.
Definition: Ifx_Types.h:115
Ifx_TickTime
sint64 Ifx_TickTime
Time in ticks.
Definition: Ifx_Types.h:76
IfxGtm_Atom_Dtm_PwmHl_Base::ccxActiveState
Ifx_ActiveState ccxActiveState
Top PWM active state.
Definition: IfxGtm_Atom_Dtm_PwmHl.h:130
IfxStdIf_PwmHl_GetDeadtimeTick
float32(* IfxStdIf_PwmHl_GetDeadtimeTick)(IfxStdIf_InterfaceDriver stdIf)
Return the dead time ticks in s.
Definition: IfxStdIf_PwmHl.h:102
IfxGtm_Atom_Dtm_PwmHl_s::dtm
Ifx_GTM_CDTM_DTM * dtm[IFXGTM_ATOM_DTM_PWMHL_MAX_NUM_CHANNELS]
Dead time module (DTM) used. Matching the Atom.
Definition: IfxGtm_Atom_Dtm_PwmHl.h:173
IfxGtm_Atom_ToutMap::channel
IfxGtm_Atom_Ch channel
ATOM channel index.
Definition: IfxGtm_PinMap.h:113
IfxGtm_Dtm_getDtmPointer
Ifx_GTM_CDTM_DTM * IfxGtm_Dtm_getDtmPointer(Ifx_GTM *gtm, IfxGtm_Cdtm cdtmIndex, IfxGtm_Dtm dtmIndex)
returns the base address of selected DTM instance
Definition: IfxGtm_Dtm.c:52
IfxStdIf_PwmHl_::setupChannels
IfxStdIf_PwmHl_SetupChannels setupChannels
IfxStdIf_PwmHl_SetupChannels.
Definition: IfxStdIf_PwmHl.h:194
IfxGtm_Atom_Timer::atom
Ifx_GTM_ATOM * atom
ATOM used for the timer functionality.
Definition: IfxGtm_Atom_Timer.h:122
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxStdIf_PwmHl_::getMinPulse
IfxStdIf_PwmHl_GetMinPulse getMinPulse
IfxStdIf_PwmHl_GetMinPulse.
Definition: IfxStdIf_PwmHl.h:188
IfxGtm_Atom_Timer::gtm
Ifx_GTM * gtm
GTM module used for the timer functionality.
Definition: IfxGtm_Atom_Timer.h:121
IfxStdIf_PwmHl_::getDeadtime
IfxStdIf_PwmHl_GetDeadtime getDeadtime
IfxStdIf_PwmHl_GetDeadtime.
Definition: IfxStdIf_PwmHl.h:185
IfxGtm_Atom_Dtm_PwmHl_modes
IFX_STATIC IFX_CONST IfxGtm_Atom_Dtm_PwmHl_Mode IfxGtm_Atom_Dtm_PwmHl_modes[Ifx_Pwm_Mode_off+1]
Definition: IfxGtm_Atom_Dtm_PwmHl.c:131
IfxGtm_Atom_Agc_setChannelsForceUpdate
void IfxGtm_Atom_Agc_setChannelsForceUpdate(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
Enable/disable one or more channels for the force update feature (FUPD)
Definition: IfxGtm_Atom.c:235
IfxGtm_Atom_Dtm_PwmHl_setDeadtime
boolean IfxGtm_Atom_Dtm_PwmHl_setDeadtime(IfxGtm_AtomDtm_PwmHl *driver, float32 deadtime)
Sets the dead time.
Definition: IfxGtm_Atom_Dtm_PwmHl.c:308
IfxGtm_Atom_Dtm_PwmHl_s::ccx
IfxGtm_Atom_Ch ccx[IFXGTM_ATOM_DTM_PWMHL_MAX_NUM_CHANNELS]
ATOM channels used for the CCCX outputs.
Definition: IfxGtm_Atom_Dtm_PwmHl.h:171
IfxGtm_Atom_Dtm_PwmHl_Base::mode
Ifx_Pwm_Mode mode
actual PWM mode
Definition: IfxGtm_Atom_Dtm_PwmHl.h:128
IFXGTM_ATOM_DTM_PWMHL_MAX_DEADTIME_IN_TICKS
#define IFXGTM_ATOM_DTM_PWMHL_MAX_DEADTIME_IN_TICKS
Definition: IfxGtm_Atom_Dtm_PwmHl.h:103
IfxGtm_Atom_Dtm_PwmHl_initConfig
void IfxGtm_Atom_Dtm_PwmHl_initConfig(IfxGtm_Atom_Dtm_PwmHl_Config *config)
Initialize the configuration structure to default.
Definition: IfxGtm_Atom_Dtm_PwmHl.c:272
IfxGtm_Atom_Dtm_PwmHl_Base
Multi-channels PWM object definition (channels only)
Definition: IfxGtm_Atom_Dtm_PwmHl.h:123
IfxGtm_Dtm_ClockSource_systemClock
SYS_CLK as clock source.
Definition: IfxGtm_Dtm.h:72
IfxGtm_Atom_Dtm_PwmHl_getDeadtime
float32 IfxGtm_Atom_Dtm_PwmHl_getDeadtime(IfxGtm_AtomDtm_PwmHl *driver)
Returns the dead time.
Definition: IfxGtm_Atom_Dtm_PwmHl.c:284
IfxGtm_Atom_Dtm_PwmHl_Base::setMode
sint8 setMode
A non zero flag indicates that the PWM mode is being modified.
Definition: IfxGtm_Atom_Dtm_PwmHl.h:129
IfxGtm_Atom_Dtm_PwmHl_Base::coutxActiveState
Ifx_ActiveState coutxActiveState
Bottom PWM active state.
Definition: IfxGtm_Atom_Dtm_PwmHl.h:131
IFXGTM_ATOM_DTM_PWMHL_MAX_NUM_CHANNELS
#define IFXGTM_ATOM_DTM_PWMHL_MAX_NUM_CHANNELS
Maximal number of channels handled by the driver. One channel has a top and bottom pwm output...
Definition: IfxGtm_Atom_Dtm_PwmHl.h:101
Ifx_Pwm_Mode_centerAligned
Center aligned mode.
Definition: Ifx_Types.h:177
memset
void * memset(void *s, int c, syze_t n)
IfxStdIf_Timer_tickToS
IFX_INLINE float32 IfxStdIf_Timer_tickToS(float32 clockFreq, Ifx_TimerValue ticks)
Convert timer ticks to seconds.
Definition: IfxStdIf_Timer.h:435
IfxGtm_Atom_Ch_getClockSource
IfxGtm_Cmu_Clk IfxGtm_Atom_Ch_getClockSource(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the channel clock source.
Definition: IfxGtm_Atom.c:306
IfxStdIf_PwmHl_SetupChannels
void(* IfxStdIf_PwmHl_SetupChannels)(IfxStdIf_InterfaceDriver stdIf, boolean *activeCh, boolean *stuckSt)
Set channels which are generating PWM or in "stuck-at" state.
Definition: IfxStdIf_PwmHl.h:175
IfxStdIf_PwmHl_GetMode
Ifx_Pwm_Mode(* IfxStdIf_PwmHl_GetMode)(IfxStdIf_InterfaceDriver stdIf)
Return the PWM mode.
Definition: IfxStdIf_PwmHl.h:125
IfxStdIf_PwmHl_initConfig
void IfxStdIf_PwmHl_initConfig(IfxStdIf_PwmHl_Config *config)
Definition: IfxStdIf_PwmHl.c:45
IfxGtm_Atom_Dtm_PwmHl_Config::ccx
IFX_CONST IfxGtm_Atom_ToutMapP * ccx
Pointer to an array of size pwmHl.channels.channelCount containing the channels used. Channels must be adjacent channels.
Definition: IfxGtm_Atom_Dtm_PwmHl.h:143
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxGtm_Atom_Dtm_PwmHl_updatePulse
IFX_STATIC void IfxGtm_Atom_Dtm_PwmHl_updatePulse(IfxGtm_AtomDtm_PwmHl *driver, float32 *tOn, float32 *offset)
Update Pulse.
Definition: IfxGtm_Atom_Dtm_PwmHl.c:563
IfxGtm_Atom_Dtm_PwmHl_setOnTime
IFX_INLINE void IfxGtm_Atom_Dtm_PwmHl_setOnTime(IfxGtm_AtomDtm_PwmHl *driver, Ifx_TimerValue *tOn)
Sets the ON time.
Definition: IfxGtm_Atom_Dtm_PwmHl.c:143
IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS
#define IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS
Maximal number of channels handled by the driver. One channel has a top and bottom pwm output...
Definition: IfxGtm_Atom_PwmHl.h:106
IfxGtm_Atom_Timer::timerChannel
IfxGtm_Atom_Ch timerChannel
ATOM channel used for the timer.
Definition: IfxGtm_Atom_Timer.h:125
IfxGtm_Atom_Dtm_PwmHl_s::updatePulse
IfxGtm_Atom_Dtm_PwmHl_UpdatePulse updatePulse
update pulse call back function for the selected mode
Definition: IfxGtm_Atom_Dtm_PwmHl.h:168
IfxGtm_Atom_Dtm_PwmHl_Config::initPins
boolean initPins
TRUE: Initialize pins in driver, FALSE: Don&#39;t initialize pins in driver. User handles separately...
Definition: IfxGtm_Atom_Dtm_PwmHl.h:146
IfxGtm_Dtm_getDtmChannel
IFX_INLINE IfxGtm_Dtm_Ch IfxGtm_Dtm_getDtmChannel(IfxGtm_Atom_Ch atomChannel)
return the ATOM channel corresponding DTM channel
Definition: IfxGtm_Dtm.h:277
IfxGtm_Atom_Timer
TOM Timer interface.
Definition: IfxGtm_Atom_Timer.h:118
IfxStdIf_Timer_sToTick
IFX_INLINE Ifx_TimerValue IfxStdIf_Timer_sToTick(float32 clockFreq, float32 seconds)
Convert seconds to timer ticks.
Definition: IfxStdIf_Timer.h:446
float32
float float32
Definition: Platform_Types.h:170
IfxGtm_Atom_Ch_configurePwmMode
void IfxGtm_Atom_Ch_configurePwmMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock, Ifx_ActiveState activeState, IfxGtm_Atom_Ch_ResetEvent resetEvent, IfxGtm_Atom_Ch_OutputTrigger trigger)
Definition: IfxGtm_Atom.c:278
IfxGtm_Atom_Dtm_PwmHl_getDeadtimeTick
Ifx_TickTime IfxGtm_Atom_Dtm_PwmHl_getDeadtimeTick(IfxGtm_AtomDtm_PwmHl *driver)
Definition: IfxGtm_Atom_Dtm_PwmHl.c:290
Ifx_Assert.h
Assert functions.
IfxGtm_Atom_Dtm_PwmHl_Base::deadtime
Ifx_TimerValue deadtime
Dead time between the top and bottom channel in ticks.
Definition: IfxGtm_Atom_Dtm_PwmHl.h:125
IfxGtm_Atom_Dtm_PwmHl_Config
GTM ATOM: PWM HL configuration.
Definition: IfxGtm_Atom_Dtm_PwmHl.h:138
IfxStdIf_PwmHl_::setPulse
IfxStdIf_PwmHl_SetPulse setPulse
IfxStdIf_PwmHl_Pulse.
Definition: IfxStdIf_PwmHl.h:193
IfxGtm_Atom_Dtm_PwmHl.h
GTM DTM_PWMHL details.
__maxX
#define __maxX
Definition: IfxCpu_IntrinsicsDcc.h:1597
IfxGtm_Dtm_setOutput0DeadTimePath
IFX_INLINE void IfxGtm_Dtm_setOutput0DeadTimePath(Ifx_GTM_CDTM_DTM *dtm, IfxGtm_Dtm_Ch channel, IfxGtm_Dtm_DeadTimePath deadTimePath)
Sets the Output 0 Dead Time Path for DTM channel.
Definition: IfxGtm_Dtm.h:218
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:113
IfxGtm_Atom_Dtm_PwmHl_updateEdgeAligned
IFX_STATIC void IfxGtm_Atom_Dtm_PwmHl_updateEdgeAligned(IfxGtm_AtomDtm_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in edge aligned modes (left and right aligned)
Definition: IfxGtm_Atom_Dtm_PwmHl.c:482
IfxGtm_Atom_Dtm_PwmHl_Config::atom
IfxGtm_Atom atom
ATOM unit used.
Definition: IfxGtm_Atom_Dtm_PwmHl.h:142
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxGtm_Atom_Dtm_PwmHl_Config::base
IfxStdIf_PwmHl_Config base
PWM HL standard interface configuration.
Definition: IfxGtm_Atom_Dtm_PwmHl.h:140
IfxStdIf_PwmHl_Config::deadtime
float32 deadtime
Dead time between the top and bottom channels in seconds.
Definition: IfxStdIf_PwmHl.h:202
IfxGtm_Dtm_getCdtmIndex
IFX_INLINE IfxGtm_Cdtm IfxGtm_Dtm_getCdtmIndex(IfxGtm_Atom atom)
return the ATOM corresponding CDTM
Definition: IfxGtm_Dtm.h:254
IfxGtm_Atom_Ch_setCompareShadow
IFX_INLINE void IfxGtm_Atom_Ch_setCompareShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowZero, uint32 shadowOne)
Sets the compare 0 and 1 shadow values.
Definition: IfxGtm_Atom.h:637
IfxGtm_Atom_Dtm_PwmHl_s::agc
Ifx_GTM_ATOM_AGC * agc
AGC unit used.
Definition: IfxGtm_Atom_Dtm_PwmHl.h:170
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxStdIf_PwmHl_::driver
IfxStdIf_InterfaceDriver driver
Interface driver object.
Definition: IfxStdIf_PwmHl.h:181
IfxGtm_Atom_Timer_addToChannelMask
void IfxGtm_Atom_Timer_addToChannelMask(IfxGtm_Atom_Timer *driver, IfxGtm_Atom_Ch channel)
Add a channel to the channel mask Channels present in the mask are started, stopped, updated at the same time as the timer: IfxGtm_Atom_Timer_applyUpdate, IfxGtm_Atom_Timer_disableUpdate, IfxGtm_Atom_Timer_stop, IfxGtm_Atom_Timer_run.
Definition: IfxGtm_Atom_Timer.c:88
IfxGtm_Atom_Dtm_PwmHl_Mode
Structure for PWM configuration.
Definition: IfxGtm_Atom_Dtm_PwmHl.h:151
IfxGtm_Atom_Dtm_PwmHl_updateAndShiftOff
IFX_STATIC void IfxGtm_Atom_Dtm_PwmHl_updateAndShiftOff(IfxGtm_AtomDtm_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets switched to OFF.
Definition: IfxGtm_Atom_Dtm_PwmHl.c:431
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxStdIf_PwmHl_SetPulse
void(* IfxStdIf_PwmHl_SetPulse)(IfxStdIf_InterfaceDriver stdIf, float32 *tOn, float32 *offset)
Set the pwm pulse of all switched independently.
Definition: IfxStdIf_PwmHl.h:156
IfxGtm_Atom_Agc_enableChannels
void IfxGtm_Atom_Agc_enableChannels(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels (ENDIS)
Definition: IfxGtm_Atom.c:151
IfxGtm_Atom_Dtm_PwmHl_getDeadtimeInTimerClockTicks
IFX_STATIC Ifx_TimerValue IfxGtm_Atom_Dtm_PwmHl_getDeadtimeInTimerClockTicks(IfxGtm_AtomDtm_PwmHl *driver)
Definition: IfxGtm_Atom_Dtm_PwmHl.c:698
Ifx_Pwm_Mode_leftAligned
Left aligned mode. The PWM period starts with a rising edge.
Definition: Ifx_Types.h:179
IfxStdIf_PwmHl_GetMinPulse
float32(* IfxStdIf_PwmHl_GetMinPulse)(IfxStdIf_InterfaceDriver stdIf)
Return the minimum pulse time in s.
Definition: IfxStdIf_PwmHl.h:117
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxGtm_Atom_Dtm_PwmHl_Base::maxPulse
Ifx_TimerValue maxPulse
internal parameter
Definition: IfxGtm_Atom_Dtm_PwmHl.h:127
IfxStdIf_PwmHl_Config::outputDriver
IfxPort_PadDriver outputDriver
Output pad driver of ccx and coutx pins.
Definition: IfxStdIf_PwmHl.h:208
IfxStdIf_PwmHl_Config::ccxActiveState
Ifx_ActiveState ccxActiveState
Top PWM active state.
Definition: IfxStdIf_PwmHl.h:211
Ifx_Pwm_Mode_init
Initialisation mode, do not use at run time.
Definition: Ifx_Types.h:182
IfxGtm_Atom_Dtm_PwmHl_Config::timer
IfxGtm_Atom_Timer * timer
Pointer to the linked timer object.
Definition: IfxGtm_Atom_Dtm_PwmHl.h:141
IfxGtm_Atom_Ch_OutputTrigger_forward
Forward the trigger from the previous channel.
Definition: IfxGtm_Atom.h:79
IfxStdIf_PwmHl_
Standard interface object.
Definition: IfxStdIf_PwmHl.h:179
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:50
Ifx_Pwm_Mode_off
All switch open.
Definition: Ifx_Types.h:181
IfxGtm_Atom_Ch_ResetEvent_onTrigger
Definition: IfxGtm_Atom.h:88
IfxGtm_Atom_Dtm_PwmHl_setMinPulse
boolean IfxGtm_Atom_Dtm_PwmHl_setMinPulse(IfxGtm_AtomDtm_PwmHl *driver, float32 minPulse)
Sets the minimum pulse.
Definition: IfxGtm_Atom_Dtm_PwmHl.c:331
__minX
#define __minX
Definition: IfxCpu_IntrinsicsDcc.h:1593
IfxStdIf_PwmHl_::setOnTime
IfxStdIf_PwmHl_SetOnTime setOnTime
IfxStdIf_PwmHl_SetOnTime.
Definition: IfxStdIf_PwmHl.h:191
IfxGtm_Atom_Dtm_PwmHl_updatePulseOff
IFX_STATIC void IfxGtm_Atom_Dtm_PwmHl_updatePulseOff(IfxGtm_AtomDtm_PwmHl *driver, float32 *tOn, float32 *offset)
Set Pulse to OFF.
Definition: IfxGtm_Atom_Dtm_PwmHl.c:623
IfxGtm_Atom_Dtm_PwmHl_s::updateAndShift
IfxGtm_Atom_Dtm_PwmHl_UpdateShift updateAndShift
update shift call back function for the selected mode
Definition: IfxGtm_Atom_Dtm_PwmHl.h:167
IfxGtm_Dtm_getDtmIndex
IFX_INLINE IfxGtm_Dtm IfxGtm_Dtm_getDtmIndex(IfxGtm_Atom atom, IfxGtm_Atom_Ch channel)
return the ATOM channel corresponding DTM
Definition: IfxGtm_Dtm.h:260
IfxStdIf_PwmHl_SetMinPulse
boolean(* IfxStdIf_PwmHl_SetMinPulse)(IfxStdIf_InterfaceDriver stdIf, float32 minPulse)
Set the minimum pulse time in s.
Definition: IfxStdIf_PwmHl.h:109
IfxGtm_Cmu_Clk
IfxGtm_Cmu_Clk
Definition: IfxGtm_Cmu.h:64
IfxStdIf_PwmHl_Config::minPulse
float32 minPulse
Min pulse allowed as active state for the top and bottom PWM in seconds.
Definition: IfxStdIf_PwmHl.h:203
Ifx_Pwm_Mode_centerAlignedInverted
Center aligned inverted aligned mode.
Definition: Ifx_Types.h:178
IfxGtm_Atom_Dtm_PwmHl_s::base
IfxGtm_Atom_Dtm_PwmHl_Base base
Multi-channels PWM object definition (channels only)
Definition: IfxGtm_Atom_Dtm_PwmHl.h:164
IfxGtm_Atom_Dtm_PwmHl_stdIfPwmHlInit
boolean IfxGtm_Atom_Dtm_PwmHl_stdIfPwmHlInit(IfxStdIf_PwmHl *stdif, IfxGtm_AtomDtm_PwmHl *driver)
Initialises the statndard interface Pwm.
Definition: IfxGtm_Atom_Dtm_PwmHl.c:405
IfxGtm_Atom_Dtm_PwmHl_setPulse
void IfxGtm_Atom_Dtm_PwmHl_setPulse(IfxGtm_AtomDtm_PwmHl *driver, float32 *tOn, float32 *offset)
Sets the ON time and offset, all switched are independent.
Definition: IfxGtm_Atom_Dtm_PwmHl.c:390
IfxGtm_Dtm_setOutput1DeadTimePath
IFX_INLINE void IfxGtm_Dtm_setOutput1DeadTimePath(Ifx_GTM_CDTM_DTM *dtm, IfxGtm_Dtm_Ch channel, IfxGtm_Dtm_DeadTimePath deadTimePath)
Sets the Output 1 Dead Time Path for DTM channel.
Definition: IfxGtm_Dtm.h:227
IfxGtm_Atom_Timer_Base::clockFreq
float32 clockFreq
Timer input clock frequency (cached value)
Definition: IfxGtm_Atom_Timer.h:108
IfxStdIf_PwmHl_::setMode
IfxStdIf_PwmHl_SetMode setMode
IfxStdIf_PwmHl_SetMode.
Definition: IfxStdIf_PwmHl.h:190
Ifx_Pwm_Mode_rightAligned
Right aligned mode. The PWM period starts with a falling edge.
Definition: Ifx_Types.h:180
IfxGtm_Dtm_setClockSource
IFX_INLINE void IfxGtm_Dtm_setClockSource(Ifx_GTM_CDTM_DTM *dtm, IfxGtm_Dtm_ClockSource clockSource)
Sets the clock source for DTM object.
Definition: IfxGtm_Dtm.h:212
IfxStdIf_PwmHl_Config::outputMode
IfxPort_OutputMode outputMode
Output mode of ccx and coutx pins.
Definition: IfxStdIf_PwmHl.h:207
IfxStdIf_PwmHl_Config::ccxOutputEnabled
Ifx_ActiveState ccxOutputEnabled
Definition: IfxStdIf_PwmHl.h:209
IfxGtm_Atom_Dtm_PwmHl_getMode
Ifx_Pwm_Mode IfxGtm_Atom_Dtm_PwmHl_getMode(IfxGtm_AtomDtm_PwmHl *driver)
Returns Pwm mode.
Definition: IfxGtm_Atom_Dtm_PwmHl.c:302
IfxGtm_Atom_Dtm_PwmHl_Base::inverted
boolean inverted
Flag indicating the center aligned inverted mode (TRUE)
Definition: IfxGtm_Atom_Dtm_PwmHl.h:132
IfxGtm_Atom_Dtm_PwmHl_Config::deadTimeClock
IfxGtm_Dtm_ClockSource deadTimeClock
Clock used for the dead time generation.
Definition: IfxGtm_Atom_Dtm_PwmHl.h:145
IfxGtm_Atom_Dtm_PwmHl_updateOff
IFX_STATIC void IfxGtm_Atom_Dtm_PwmHl_updateOff(IfxGtm_AtomDtm_PwmHl *driver, Ifx_TimerValue *tOn)
Set the outputs to inactive.
Definition: IfxGtm_Atom_Dtm_PwmHl.c:548
IfxStdIf_PwmHl_SetDeadtime
boolean(* IfxStdIf_PwmHl_SetDeadtime)(IfxStdIf_InterfaceDriver stdIf, float32 deadtime)
Set the dead time in s.
Definition: IfxStdIf_PwmHl.h:86
IfxGtm_Atom_Dtm_PwmHl_Config::coutx
IFX_CONST IfxGtm_Atom_ToutMapP * coutx
Pointer to an array of size pwmHl.channels.channelCount containing the channels used. Channels must be adjacent channels.
Definition: IfxGtm_Atom_Dtm_PwmHl.h:144
IfxGtm_Dtm_getClockFrequency
float32 IfxGtm_Dtm_getClockFrequency(Ifx_GTM *gtm, IfxGtm_Cdtm cdtmIndex, IfxGtm_Dtm dtmIndex)
Returns the clock frequency in Hz of the DTM.
Definition: IfxGtm_Dtm.c:69
IfxGtm_Atom_Dtm_PwmHl_init
boolean IfxGtm_Atom_Dtm_PwmHl_init(IfxGtm_AtomDtm_PwmHl *driver, const IfxGtm_Atom_Dtm_PwmHl_Config *config)
Initializes the timer object note : To ensure that the channels counter are reset by the timer and do...
Definition: IfxGtm_Atom_Dtm_PwmHl.c:159
IfxGtm_Atom_Dtm_PwmHl_s::dtmClockFreq
float32 dtmClockFreq
Deadtime module input clock frequency (cached value)
Definition: IfxGtm_Atom_Dtm_PwmHl.h:175
IfxStdIf_PwmHl_::getDeadtimeTick
IfxStdIf_PwmHl_GetDeadtimeTick getDeadtimeTick
Definition: IfxStdIf_PwmHl.h:186
IfxGtm_Atom_Timer::base
IfxGtm_Atom_Timer_Base base
Timer base structure.
Definition: IfxGtm_Atom_Timer.h:120
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxStdIf_PwmHl_Config::channelCount
uint8 channelCount
Number of PWM channels, one channel is made of a top and bottom channel.
Definition: IfxStdIf_PwmHl.h:204
IfxGtm_Atom_0
ATOM object 0.
Definition: IfxGtm_cfg.h:245
IfxGtm_Atom_Dtm_PwmHl_s
GTM ATOM PWM driver.
Definition: IfxGtm_Atom_Dtm_PwmHl.h:162
IfxGtm_Atom_Dtm_PwmHl_s::coutx
IfxGtm_Atom_Ch coutx[IFXGTM_ATOM_DTM_PWMHL_MAX_NUM_CHANNELS]
ATOM channels used for the OUTX outputs.
Definition: IfxGtm_Atom_Dtm_PwmHl.h:172
IfxStdIf_PwmHl_::setMinPulse
IfxStdIf_PwmHl_SetMinPulse setMinPulse
IfxStdIf_PwmHl_SetMinPulse.
Definition: IfxStdIf_PwmHl.h:187
IfxGtm_Atom_Dtm_PwmHl_setMode
boolean IfxGtm_Atom_Dtm_PwmHl_setMode(IfxGtm_AtomDtm_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate()
Definition: IfxGtm_Atom_Dtm_PwmHl.c:342
IfxStdIf_PwmHl_::setOnTimeAndShift
IfxStdIf_PwmHl_SetOnTimeAndShift setOnTimeAndShift
IfxStdIf_PwmHl_SetOnTime.
Definition: IfxStdIf_PwmHl.h:192
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxStdIf_PwmHl_SetOnTime
void(* IfxStdIf_PwmHl_SetOnTime)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue *tOn)
Set the pwm ON time.
Definition: IfxStdIf_PwmHl.h:140
IfxGtm_Atom_Dtm_PwmHl_getMinPulse
float32 IfxGtm_Atom_Dtm_PwmHl_getMinPulse(IfxGtm_AtomDtm_PwmHl *driver)
Returns the minimum pulse.
Definition: IfxGtm_Atom_Dtm_PwmHl.c:296
IfxGtm_Dtm_DeadTimePath_enable
Dead Time Path enabled.
Definition: IfxGtm_Dtm.h:106
IfxStdIf_PwmHl_::getMode
IfxStdIf_PwmHl_GetMode getMode
IfxStdIf_PwmHl_GetMode.
Definition: IfxStdIf_PwmHl.h:189
IfxGtm_Atom_Dtm_PwmHl_setupChannels
void IfxGtm_Atom_Dtm_PwmHl_setupChannels(IfxGtm_AtomDtm_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set up channels.
Definition: IfxGtm_Atom_Dtm_PwmHl.c:396
IfxGtm_Atom_Timer_Base::period
Ifx_TimerValue period
Timer period in ticks (cached value)
Definition: IfxGtm_Atom_Timer.h:106
IfxGtm_Atom_Dtm_PwmHl_s::atom
Ifx_GTM_ATOM * atom
ATOM unit used.
Definition: IfxGtm_Atom_Dtm_PwmHl.h:169
IfxGtm_Atom_Dtm_PwmHl_Base::channelCount
uint8 channelCount
Number of PWM channels, one channel is made of a top and bottom channel.
Definition: IfxGtm_Atom_Dtm_PwmHl.h:133
IfxStdIf_PwmHl_SetOnTimeAndShift
void(* IfxStdIf_PwmHl_SetOnTimeAndShift)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Set the pwm ON time and shift value.
Definition: IfxStdIf_PwmHl.h:148
IfxGtm_Atom_Dtm_PwmHl_s::update
IfxGtm_Atom_Dtm_PwmHl_Update update
update call back function for the selected mode
Definition: IfxGtm_Atom_Dtm_PwmHl.h:166
IfxStdIf_PwmHl_GetDeadtime
float32(* IfxStdIf_PwmHl_GetDeadtime)(IfxStdIf_InterfaceDriver stdIf)
Return the dead time in s.
Definition: IfxStdIf_PwmHl.h:94
IfxGtm_Atom_Dtm_PwmHl_invertActiveState
IFX_INLINE Ifx_ActiveState IfxGtm_Atom_Dtm_PwmHl_invertActiveState(Ifx_ActiveState activeState)
Inverts the active state.
Definition: IfxGtm_Atom_Dtm_PwmHl.c:149
IfxStdIf_PwmHl_::setDeadtime
IfxStdIf_PwmHl_SetDeadtime setDeadtime
IfxStdIf_PwmHl_SetDeadtime.
Definition: IfxStdIf_PwmHl.h:184
IfxStdIf_PwmHl_Config::coutxOutputEnabled
Ifx_ActiveState coutxOutputEnabled
Definition: IfxStdIf_PwmHl.h:210
IfxGtm_Atom_Dtm_PwmHl_Base::minPulse
Ifx_TimerValue minPulse
minimum pulse that is output, shorter pulse time will be output as 0% duty cycle
Definition: IfxGtm_Atom_Dtm_PwmHl.h:126
IfxGtm_Atom_Agc_trigger
void IfxGtm_Atom_Agc_trigger(Ifx_GTM_ATOM_AGC *agc)
Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG)
Definition: IfxGtm_Atom.c:256
IfxPort_OutputMode_none
Definition: IfxPort.h:144
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxGtm_Atom_Dtm_PwmHl_updateShiftCenterAligned
IFX_STATIC void IfxGtm_Atom_Dtm_PwmHl_updateShiftCenterAligned(IfxGtm_AtomDtm_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Update Shift Center Aligned.
Definition: IfxGtm_Atom_Dtm_PwmHl.c:632
IfxStdIf_PwmHl_Config::coutxActiveState
Ifx_ActiveState coutxActiveState
Bottom PWM active state.
Definition: IfxStdIf_PwmHl.h:212
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxGtm_Atom_Dtm_PwmHl_s::dtmChannel
IfxGtm_Dtm_Ch dtmChannel[IFXGTM_ATOM_DTM_PWMHL_MAX_NUM_CHANNELS]
DTM channel used.
Definition: IfxGtm_Atom_Dtm_PwmHl.h:174
IfxStdIf_PwmHl_SetMode
boolean(* IfxStdIf_PwmHl_SetMode)(IfxStdIf_InterfaceDriver stdIf, Ifx_Pwm_Mode mode)
Set the pwm mode.
Definition: IfxStdIf_PwmHl.h:133
IfxGtm_Dtm_setDeadtime
IFX_INLINE void IfxGtm_Dtm_setDeadtime(Ifx_GTM_CDTM_DTM *dtm, IfxGtm_Dtm_Ch channel, uint32 risingEdge, float32 fallingEdge)
Sets the deadtime.
Definition: IfxGtm_Dtm.h:298
IfxGtm_Atom_Ch
IfxGtm_Atom_Ch
Enum for ATOM channels.
Definition: IfxGtm_cfg.h:258
IfxGtm_Atom_Dtm_PwmHl_setOnTimeAndShift
void IfxGtm_Atom_Dtm_PwmHl_setOnTimeAndShift(IfxGtm_AtomDtm_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets the ON time and Shift.
Definition: IfxGtm_Atom_Dtm_PwmHl.c:384
IfxGtm_PinMap_setAtomTout
void IfxGtm_PinMap_setAtomTout(IfxGtm_Atom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Definition: IfxGtm_PinMap.c:2408
IfxGtm_Atom_Dtm_PwmHl_updateCenterAligned
IFX_STATIC void IfxGtm_Atom_Dtm_PwmHl_updateCenterAligned(IfxGtm_AtomDtm_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in center aligned and center aligned inverted modes.
Definition: IfxGtm_Atom_Dtm_PwmHl.c:439


iLLD_TC38A: IfxGtm_Atom_Dtm_PwmHl.h Source File

  • Gtm
  • Atom
  • Dtm_PwmHl
IfxGtm_Atom_Dtm_PwmHl.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Atom_Dtm_PwmHl.h
3 * \brief GTM DTM_PWMHL details
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Gtm_Atom_PwmHl_Usage How to use the GTM ATOM PWM Driver
42 * \ingroup IfxLld_Gtm_Atom_PwmHl
43 *
44 * This driver implements the PWM functionalities as defined by \ref library_srvsw_stdif_pwmhl.
45 * The user is free to use either the driver specific APIs below or to used the \ref library_srvsw_stdif_pwmhl "standard interface APIs".
46 *
47 * \section Specific Specific implementation
48 * Implementation is similar to \ref IfxLld_Gtm_Tom_PwmHl
49 *
50 * \todo add documentation
51 *
52 * For a detailed configuration of the microcontroller, see \ref IfxGtm_AtomDtm_PwmHl_init().
53 *
54 * \section Example Usage example
55 * Initialisation is done by, e.g:
56 * \code
57 * IfxGtm_AtomDtm_PwmHl_Config driverConfig;
58 * IfxGtm_AtomDtm_PwmHl driverData;
59 * IfxStdIf_PwmHl pwmhl;
60 * IfxGtm_AtomDtm_PwmHl_initConfig(&driverConfig, &MODULE_GTM);
61 * IfxGtm_AtomDtm_PwmHl_init(&driverData, &driverConfig);
62 * IfxGtm_AtomDtm_PwmHl_stdIfPwmHlInit(pwmhl, &driverData);
63 * \endcode
64 *
65 * During run-time, \ref library_srvsw_stdif_pwmhl "the interface functions" shall be used, e.g.:
66 * \code
67 * IfxStdIf_Timer* timer = IfxStdIf_PwmHl_getTimer(pwmhl);
68 * Ifx_TimerValue onTime[3]; // assume configured for three HL channels
69 *
70 * onTime[0] = 10;
71 * onTime[1] = 20;
72 * onTime[2] = 30;
73 *
74 * IfxStdIf_Timer_disableUpdate(timer);
75 * IfxStdIf_Timer_setPeriod(timer, period);
76 * IfxStdIf_PwmHl_setOnTime(pwmhl, onTime);
77 * IfxStdIf_Timer_applyUpdate(timer);
78 * \endcode
79 *
80 * \defgroup IfxLld_Gtm_Atom_Dtm_PwmHl ATOM DTM Interface Driver
81 * \ingroup IfxLld_Gtm_Atom
82 */
83
84 #ifndef IFXGTM_ATOM_DTM_PWMHL_H
85 #define IFXGTM_ATOM_DTM_PWMHL_H 1
86
87 /******************************************************************************/
88 /*----------------------------------Includes----------------------------------*/
89 /******************************************************************************/
90
91 #include "StdIf/IfxStdIf_PwmHl.h"
92 #include "Gtm/Atom/Timer/IfxGtm_Atom_Timer.h"
93 #include "Gtm/Std/IfxGtm_Dtm.h"
94
95 /******************************************************************************/
96 /*-----------------------------------Macros-----------------------------------*/
97 /******************************************************************************/
98
99 /** \brief Maximal number of channels handled by the driver. One channel has a top and bottom pwm output
100 */
101 #define IFXGTM_ATOM_DTM_PWMHL_MAX_NUM_CHANNELS (8)
102
103 #define IFXGTM_ATOM_DTM_PWMHL_MAX_DEADTIME_IN_TICKS (1023)
104
105 /******************************************************************************/
106 /*------------------------------Type Definitions------------------------------*/
107 /******************************************************************************/
108
109 typedef struct IfxGtm_Atom_Dtm_PwmHl_s IfxGtm_AtomDtm_PwmHl;
110
111 typedef void (*IfxGtm_Atom_Dtm_PwmHl_Update)(IfxGtm_AtomDtm_PwmHl *driver, Ifx_TimerValue *tOn);
112
113 typedef void (*IfxGtm_Atom_Dtm_PwmHl_UpdateShift)(IfxGtm_AtomDtm_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift);
114
115 typedef void (*IfxGtm_Atom_Dtm_PwmHl_UpdatePulse)(IfxGtm_AtomDtm_PwmHl *driver, float32 *tOn, float32 *offset);
116
117 /******************************************************************************/
118 /*-----------------------------Data Structures--------------------------------*/
119 /******************************************************************************/
120
121 /** \brief Multi-channels PWM object definition (channels only)
122 */
123 typedef struct
124 {
125 Ifx_TimerValue deadtime; /**< \brief Dead time between the top and bottom channel in ticks */
126 Ifx_TimerValue minPulse; /**< \brief minimum pulse that is output, shorter pulse time will be output as 0% duty cycle */
127 Ifx_TimerValue maxPulse; /**< \brief internal parameter */
128 Ifx_Pwm_Mode mode; /**< \brief actual PWM mode */
129 sint8 setMode; /**< \brief A non zero flag indicates that the PWM mode is being modified */
130 Ifx_ActiveState ccxActiveState; /**< \brief Top PWM active state */
131 Ifx_ActiveState coutxActiveState; /**< \brief Bottom PWM active state */
132 boolean inverted; /**< \brief Flag indicating the center aligned inverted mode (TRUE) */
133 uint8 channelCount; /**< \brief Number of PWM channels, one channel is made of a top and bottom channel */
134 } IfxGtm_Atom_Dtm_PwmHl_Base;
135
136 /** \brief GTM ATOM: PWM HL configuration
137 */
138 typedef struct
139 {
140 IfxStdIf_PwmHl_Config base; /**< \brief PWM HL standard interface configuration */
141 IfxGtm_Atom_Timer *timer; /**< \brief Pointer to the linked timer object */
142 IfxGtm_Atom atom; /**< \brief ATOM unit used */
143 IFX_CONST IfxGtm_Atom_ToutMapP *ccx; /**< \brief Pointer to an array of size pwmHl.channels.channelCount containing the channels used. Channels must be adjacent channels */
144 IFX_CONST IfxGtm_Atom_ToutMapP *coutx; /**< \brief Pointer to an array of size pwmHl.channels.channelCount containing the channels used. Channels must be adjacent channels */
145 IfxGtm_Dtm_ClockSource deadTimeClock; /**< \brief Clock used for the dead time generation */
146 boolean initPins; /**< \brief TRUE: Initialize pins in driver, FALSE: Don't initialize pins in driver. User handles separately. */
147 } IfxGtm_Atom_Dtm_PwmHl_Config;
148
149 /** \brief Structure for PWM configuration
150 */
151 typedef struct
152 {
153 Ifx_Pwm_Mode mode; /**< \brief PWM mode */
154 boolean inverted; /**< \brief Inverted configuration for the selected mode */
155 IfxGtm_Atom_Dtm_PwmHl_Update update; /**< \brief update call back function for the selected mode */
156 IfxGtm_Atom_Dtm_PwmHl_UpdateShift updateAndShift; /**< \brief update shift call back function for the selected mode */
157 IfxGtm_Atom_Dtm_PwmHl_UpdatePulse updatePulse; /**< \brief update pulse call back function for the selected mode */
158 } IfxGtm_Atom_Dtm_PwmHl_Mode;
159
160 /** \brief GTM ATOM PWM driver
161 */
162 struct IfxGtm_Atom_Dtm_PwmHl_s
163 {
164 IfxGtm_Atom_Dtm_PwmHl_Base base; /**< \brief Multi-channels PWM object definition (channels only) */
165 IfxGtm_Atom_Timer *timer; /**< \brief Pointer to the linked timer object */
166 IfxGtm_Atom_Dtm_PwmHl_Update update; /**< \brief update call back function for the selected mode */
167 IfxGtm_Atom_Dtm_PwmHl_UpdateShift updateAndShift; /**< \brief update shift call back function for the selected mode */
168 IfxGtm_Atom_Dtm_PwmHl_UpdatePulse updatePulse; /**< \brief update pulse call back function for the selected mode */
169 Ifx_GTM_ATOM *atom; /**< \brief ATOM unit used */
170 Ifx_GTM_ATOM_AGC *agc; /**< \brief AGC unit used */
171 IfxGtm_Atom_Ch ccx[IFXGTM_ATOM_DTM_PWMHL_MAX_NUM_CHANNELS]; /**< \brief ATOM channels used for the CCCX outputs */
172 IfxGtm_Atom_Ch coutx[IFXGTM_ATOM_DTM_PWMHL_MAX_NUM_CHANNELS]; /**< \brief ATOM channels used for the OUTX outputs */
173 Ifx_GTM_CDTM_DTM *dtm[IFXGTM_ATOM_DTM_PWMHL_MAX_NUM_CHANNELS]; /**< \brief Dead time module (DTM) used. Matching the Atom */
174 IfxGtm_Dtm_Ch dtmChannel[IFXGTM_ATOM_DTM_PWMHL_MAX_NUM_CHANNELS]; /**< \brief DTM channel used */
175 float32 dtmClockFreq; /**< \brief Deadtime module input clock frequency (cached value) */
176 };
177
178 /******************************************************************************/
179 /*-------------------------Global Function Prototypes-------------------------*/
180 /******************************************************************************/
181
182 /** \brief Initializes the timer object
183 * note : To ensure that the channels counter are reset by the timer and do not overflow, leading to random signal on the output, the timer must be started before the call to this function.
184 * \param driver driver GTM ATOM PWM driver
185 * \param config config GTM ATOM: PWM HL configuration
186 * \return TRUE on success else FALSE
187 */
188 IFX_EXTERN boolean IfxGtm_Atom_Dtm_PwmHl_init(IfxGtm_AtomDtm_PwmHl *driver, const IfxGtm_Atom_Dtm_PwmHl_Config *config);
189
190 /** \brief Initialize the configuration structure to default
191 * \param config config Channel configuration. This parameter is Initialised by the function
192 * \return None
193 */
194 IFX_EXTERN void IfxGtm_Atom_Dtm_PwmHl_initConfig(IfxGtm_Atom_Dtm_PwmHl_Config *config);
195
196 /** \brief Returns the dead time
197 * \param driver driver GTM ATOM PWM driver
198 * \return Dead Time
199 */
200 IFX_EXTERN float32 IfxGtm_Atom_Dtm_PwmHl_getDeadtime(IfxGtm_AtomDtm_PwmHl *driver);
201
202 /**
203 */
204 IFX_EXTERN Ifx_TickTime IfxGtm_Atom_Dtm_PwmHl_getDeadtimeTick(IfxGtm_AtomDtm_PwmHl *driver);
205
206 /** \brief Returns the minimum pulse
207 * \param driver driver GTM ATOM PWM driver
208 * \return Min Pulse
209 */
210 IFX_EXTERN float32 IfxGtm_Atom_Dtm_PwmHl_getMinPulse(IfxGtm_AtomDtm_PwmHl *driver);
211
212 /** \brief Returns Pwm mode
213 * \param driver driver GTM ATOM PWM driver
214 * \return Pwm mode
215 */
216 IFX_EXTERN Ifx_Pwm_Mode IfxGtm_Atom_Dtm_PwmHl_getMode(IfxGtm_AtomDtm_PwmHl *driver);
217
218 /** \brief Sets the dead time
219 * \param driver driver GTM ATOM PWM driver
220 * \param deadtime deadtime Dead time value
221 * \return TRUE on success else FALSE
222 */
223 IFX_EXTERN boolean IfxGtm_Atom_Dtm_PwmHl_setDeadtime(IfxGtm_AtomDtm_PwmHl *driver, float32 deadtime);
224
225 /** \brief Sets the minimum pulse
226 * \param driver driver GTM ATOM PWM driver
227 * \param minPulse minPulse Minimum pulse
228 * \return TRUE on success else FALSE
229 */
230 IFX_EXTERN boolean IfxGtm_Atom_Dtm_PwmHl_setMinPulse(IfxGtm_AtomDtm_PwmHl *driver, float32 minPulse);
231
232 /** \brief Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate()
233 * \param driver driver GTM ATOM PWM driver
234 * \param mode mode Pwm mode
235 * \return TRUE on success else FALSE
236 */
237 IFX_EXTERN boolean IfxGtm_Atom_Dtm_PwmHl_setMode(IfxGtm_AtomDtm_PwmHl *driver, Ifx_Pwm_Mode mode);
238
239 /** \brief Sets the ON time and Shift
240 * \param driver driver GTM ATOM PWM driver
241 * \param tOn tOn ON time
242 * \param shift Shift value in ticks
243 * \return None
244 */
245 IFX_EXTERN void IfxGtm_Atom_Dtm_PwmHl_setOnTimeAndShift(IfxGtm_AtomDtm_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift);
246
247 /** \brief Sets the ON time and offset, all switched are independent
248 * \param driver driver GTM ATOM PWM driver
249 * \param tOn tOn ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
250 * \param offset offset Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
251 * \return None
252 */
253 IFX_EXTERN void IfxGtm_Atom_Dtm_PwmHl_setPulse(IfxGtm_AtomDtm_PwmHl *driver, float32 *tOn, float32 *offset);
254
255 /** \brief Set up channels
256 * \param driver driver GTM ATOM PWM driver
257 * \param activeCh Active channel
258 * \param stuckSt Stuck state
259 * \return None
260 */
261 IFX_EXTERN void IfxGtm_Atom_Dtm_PwmHl_setupChannels(IfxGtm_AtomDtm_PwmHl *driver, boolean *activeCh, boolean *stuckSt);
262
263 /** \brief Initialises the statndard interface Pwm
264 * \param stdif Standard interface object, will be initialized by the function
265 * \param driver Interface driver to be used by the standard interface. must be initialised separately
266 * \return TRUE on success else FALSE
267 */
268 IFX_EXTERN boolean IfxGtm_Atom_Dtm_PwmHl_stdIfPwmHlInit(IfxStdIf_PwmHl *stdif, IfxGtm_AtomDtm_PwmHl *driver);
269
270 #endif /* IFXGTM_ATOM_DTM_PWMHL_H */
Ifx_Pwm_Mode
Ifx_Pwm_Mode
Definition: Ifx_Types.h:175
IfxGtm_Atom_Dtm_PwmHl_setPulse
IFX_EXTERN void IfxGtm_Atom_Dtm_PwmHl_setPulse(IfxGtm_AtomDtm_PwmHl *driver, float32 *tOn, float32 *offset)
Sets the ON time and offset, all switched are independent.
Definition: IfxGtm_Atom_Dtm_PwmHl.c:390
Ifx_TickTime
sint64 Ifx_TickTime
Time in ticks.
Definition: Ifx_Types.h:76
IfxGtm_Atom_Dtm_PwmHl_Base::ccxActiveState
Ifx_ActiveState ccxActiveState
Top PWM active state.
Definition: IfxGtm_Atom_Dtm_PwmHl.h:130
IfxGtm_Atom_Dtm_PwmHl_s::dtm
Ifx_GTM_CDTM_DTM * dtm[IFXGTM_ATOM_DTM_PWMHL_MAX_NUM_CHANNELS]
Dead time module (DTM) used. Matching the Atom.
Definition: IfxGtm_Atom_Dtm_PwmHl.h:173
IfxGtm_Atom_Dtm_PwmHl_setupChannels
IFX_EXTERN void IfxGtm_Atom_Dtm_PwmHl_setupChannels(IfxGtm_AtomDtm_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set up channels.
Definition: IfxGtm_Atom_Dtm_PwmHl.c:396
IfxGtm_Atom_Dtm_PwmHl_s::ccx
IfxGtm_Atom_Ch ccx[IFXGTM_ATOM_DTM_PWMHL_MAX_NUM_CHANNELS]
ATOM channels used for the CCCX outputs.
Definition: IfxGtm_Atom_Dtm_PwmHl.h:171
IfxGtm_Atom_Dtm_PwmHl_Base::mode
Ifx_Pwm_Mode mode
actual PWM mode
Definition: IfxGtm_Atom_Dtm_PwmHl.h:128
IfxGtm_Atom_Dtm_PwmHl_Base
Multi-channels PWM object definition (channels only)
Definition: IfxGtm_Atom_Dtm_PwmHl.h:123
IfxGtm_Atom_Dtm_PwmHl_getMinPulse
IFX_EXTERN float32 IfxGtm_Atom_Dtm_PwmHl_getMinPulse(IfxGtm_AtomDtm_PwmHl *driver)
Returns the minimum pulse.
Definition: IfxGtm_Atom_Dtm_PwmHl.c:296
IfxGtm_Atom_Timer.h
GTM TIMER details.
IfxGtm_Atom_Dtm_PwmHl_Base::setMode
sint8 setMode
A non zero flag indicates that the PWM mode is being modified.
Definition: IfxGtm_Atom_Dtm_PwmHl.h:129
IfxGtm_Atom_Dtm_PwmHl_Base::coutxActiveState
Ifx_ActiveState coutxActiveState
Bottom PWM active state.
Definition: IfxGtm_Atom_Dtm_PwmHl.h:131
IFXGTM_ATOM_DTM_PWMHL_MAX_NUM_CHANNELS
#define IFXGTM_ATOM_DTM_PWMHL_MAX_NUM_CHANNELS
Maximal number of channels handled by the driver. One channel has a top and bottom pwm output...
Definition: IfxGtm_Atom_Dtm_PwmHl.h:101
IfxGtm_Atom_Dtm_PwmHl_setDeadtime
IFX_EXTERN boolean IfxGtm_Atom_Dtm_PwmHl_setDeadtime(IfxGtm_AtomDtm_PwmHl *driver, float32 deadtime)
Sets the dead time.
Definition: IfxGtm_Atom_Dtm_PwmHl.c:308
IfxGtm_Atom_Dtm_PwmHl_Config::ccx
IFX_CONST IfxGtm_Atom_ToutMapP * ccx
Pointer to an array of size pwmHl.channels.channelCount containing the channels used. Channels must be adjacent channels.
Definition: IfxGtm_Atom_Dtm_PwmHl.h:143
IfxGtm_Atom_Dtm_PwmHl_Mode::updatePulse
IfxGtm_Atom_Dtm_PwmHl_UpdatePulse updatePulse
update pulse call back function for the selected mode
Definition: IfxGtm_Atom_Dtm_PwmHl.h:157
IfxGtm_Atom_Dtm_PwmHl_Config::initPins
boolean initPins
TRUE: Initialize pins in driver, FALSE: Don&#39;t initialize pins in driver. User handles separately...
Definition: IfxGtm_Atom_Dtm_PwmHl.h:146
IfxGtm_Atom_Timer
TOM Timer interface.
Definition: IfxGtm_Atom_Timer.h:118
float32
float float32
Definition: Platform_Types.h:170
IfxGtm_Atom_Dtm_PwmHl_setMinPulse
IFX_EXTERN boolean IfxGtm_Atom_Dtm_PwmHl_setMinPulse(IfxGtm_AtomDtm_PwmHl *driver, float32 minPulse)
Sets the minimum pulse.
Definition: IfxGtm_Atom_Dtm_PwmHl.c:331
IfxGtm_Atom
IfxGtm_Atom
Enum for ATOM objects.
Definition: IfxGtm_cfg.h:243
IfxGtm_Atom_Dtm_PwmHl_Base::deadtime
Ifx_TimerValue deadtime
Dead time between the top and bottom channel in ticks.
Definition: IfxGtm_Atom_Dtm_PwmHl.h:125
IfxGtm_Atom_Dtm_PwmHl_Config
GTM ATOM: PWM HL configuration.
Definition: IfxGtm_Atom_Dtm_PwmHl.h:138
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:113
IfxGtm_Atom_Dtm_PwmHl_Config::atom
IfxGtm_Atom atom
ATOM unit used.
Definition: IfxGtm_Atom_Dtm_PwmHl.h:142
IfxGtm_Atom_Dtm_PwmHl_getDeadtime
IFX_EXTERN float32 IfxGtm_Atom_Dtm_PwmHl_getDeadtime(IfxGtm_AtomDtm_PwmHl *driver)
Returns the dead time.
Definition: IfxGtm_Atom_Dtm_PwmHl.c:284
IfxGtm_Atom_Dtm_PwmHl_Config::base
IfxStdIf_PwmHl_Config base
PWM HL standard interface configuration.
Definition: IfxGtm_Atom_Dtm_PwmHl.h:140
IfxGtm_Atom_Dtm_PwmHl_s::agc
Ifx_GTM_ATOM_AGC * agc
AGC unit used.
Definition: IfxGtm_Atom_Dtm_PwmHl.h:170
IfxGtm_Atom_Dtm_PwmHl_Mode
Structure for PWM configuration.
Definition: IfxGtm_Atom_Dtm_PwmHl.h:151
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxGtm_Atom_Dtm_PwmHl_getMode
IFX_EXTERN Ifx_Pwm_Mode IfxGtm_Atom_Dtm_PwmHl_getMode(IfxGtm_AtomDtm_PwmHl *driver)
Returns Pwm mode.
Definition: IfxGtm_Atom_Dtm_PwmHl.c:302
IfxGtm_Dtm.h
GTM basic functionality.
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxGtm_Atom_Dtm_PwmHl_init
IFX_EXTERN boolean IfxGtm_Atom_Dtm_PwmHl_init(IfxGtm_AtomDtm_PwmHl *driver, const IfxGtm_Atom_Dtm_PwmHl_Config *config)
Initializes the timer object note : To ensure that the channels counter are reset by the timer and do...
Definition: IfxGtm_Atom_Dtm_PwmHl.c:159
IfxGtm_Atom_Dtm_PwmHl_Base::maxPulse
Ifx_TimerValue maxPulse
internal parameter
Definition: IfxGtm_Atom_Dtm_PwmHl.h:127
IfxGtm_Atom_ToutMap
ATOM TOUT pin mapping structure.
Definition: IfxGtm_PinMap.h:110
IfxStdIf_PwmHl_Config
Multi-channels PWM object configuration.
Definition: IfxStdIf_PwmHl.h:200
IfxGtm_Atom_Dtm_PwmHl_Config::timer
IfxGtm_Atom_Timer * timer
Pointer to the linked timer object.
Definition: IfxGtm_Atom_Dtm_PwmHl.h:141
IfxStdIf_PwmHl_
Standard interface object.
Definition: IfxStdIf_PwmHl.h:179
IfxGtm_Atom_Dtm_PwmHl_Mode::updateAndShift
IfxGtm_Atom_Dtm_PwmHl_UpdateShift updateAndShift
update shift call back function for the selected mode
Definition: IfxGtm_Atom_Dtm_PwmHl.h:156
IfxGtm_Atom_Dtm_PwmHl_setOnTimeAndShift
IFX_EXTERN void IfxGtm_Atom_Dtm_PwmHl_setOnTimeAndShift(IfxGtm_AtomDtm_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets the ON time and Shift.
Definition: IfxGtm_Atom_Dtm_PwmHl.c:384
IfxGtm_Atom_Dtm_PwmHl_s::base
IfxGtm_Atom_Dtm_PwmHl_Base base
Multi-channels PWM object definition (channels only)
Definition: IfxGtm_Atom_Dtm_PwmHl.h:164
IfxGtm_Dtm_ClockSource
IfxGtm_Dtm_ClockSource
Clock source for DTM object Definition in IfxGTM.DTM[i].CTRL.B.CLKSEL ( i = 0 to 35) ...
Definition: IfxGtm_Dtm.h:70
IfxStdIf_PwmHl.h
Standard interface: Multi-channels, dual-complementary PWM interface.
IfxGtm_Atom_Dtm_PwmHl_Base::inverted
boolean inverted
Flag indicating the center aligned inverted mode (TRUE)
Definition: IfxGtm_Atom_Dtm_PwmHl.h:132
IfxGtm_Atom_Dtm_PwmHl_Config::deadTimeClock
IfxGtm_Dtm_ClockSource deadTimeClock
Clock used for the dead time generation.
Definition: IfxGtm_Atom_Dtm_PwmHl.h:145
IfxGtm_Atom_Dtm_PwmHl_Config::coutx
IFX_CONST IfxGtm_Atom_ToutMapP * coutx
Pointer to an array of size pwmHl.channels.channelCount containing the channels used. Channels must be adjacent channels.
Definition: IfxGtm_Atom_Dtm_PwmHl.h:144
IfxGtm_Dtm_Ch
IfxGtm_Dtm_Ch
Enum for DTM channels.
Definition: IfxGtm_cfg.h:323
IfxGtm_Atom_Dtm_PwmHl_s::dtmClockFreq
float32 dtmClockFreq
Deadtime module input clock frequency (cached value)
Definition: IfxGtm_Atom_Dtm_PwmHl.h:175
IfxGtm_Atom_Dtm_PwmHl_s
GTM ATOM PWM driver.
Definition: IfxGtm_Atom_Dtm_PwmHl.h:162
IfxGtm_Atom_Dtm_PwmHl_s::coutx
IfxGtm_Atom_Ch coutx[IFXGTM_ATOM_DTM_PWMHL_MAX_NUM_CHANNELS]
ATOM channels used for the OUTX outputs.
Definition: IfxGtm_Atom_Dtm_PwmHl.h:172
IfxGtm_Atom_Dtm_PwmHl_initConfig
IFX_EXTERN void IfxGtm_Atom_Dtm_PwmHl_initConfig(IfxGtm_Atom_Dtm_PwmHl_Config *config)
Initialize the configuration structure to default.
Definition: IfxGtm_Atom_Dtm_PwmHl.c:272
IfxGtm_Atom_Dtm_PwmHl_Update
void(* IfxGtm_Atom_Dtm_PwmHl_Update)(IfxGtm_AtomDtm_PwmHl *driver, Ifx_TimerValue *tOn)
Definition: IfxGtm_Atom_Dtm_PwmHl.h:111
IfxGtm_Atom_Dtm_PwmHl_s::atom
Ifx_GTM_ATOM * atom
ATOM unit used.
Definition: IfxGtm_Atom_Dtm_PwmHl.h:169
IfxGtm_Atom_Dtm_PwmHl_Base::channelCount
uint8 channelCount
Number of PWM channels, one channel is made of a top and bottom channel.
Definition: IfxGtm_Atom_Dtm_PwmHl.h:133
IfxGtm_Atom_Dtm_PwmHl_Mode::update
IfxGtm_Atom_Dtm_PwmHl_Update update
update call back function for the selected mode
Definition: IfxGtm_Atom_Dtm_PwmHl.h:155
IfxGtm_Atom_Dtm_PwmHl_Base::minPulse
Ifx_TimerValue minPulse
minimum pulse that is output, shorter pulse time will be output as 0% duty cycle
Definition: IfxGtm_Atom_Dtm_PwmHl.h:126
IfxGtm_Atom_Dtm_PwmHl_UpdatePulse
void(* IfxGtm_Atom_Dtm_PwmHl_UpdatePulse)(IfxGtm_AtomDtm_PwmHl *driver, float32 *tOn, float32 *offset)
Definition: IfxGtm_Atom_Dtm_PwmHl.h:115
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxGtm_Atom_Dtm_PwmHl_s::dtmChannel
IfxGtm_Dtm_Ch dtmChannel[IFXGTM_ATOM_DTM_PWMHL_MAX_NUM_CHANNELS]
DTM channel used.
Definition: IfxGtm_Atom_Dtm_PwmHl.h:174
sint8
signed char sint8
Definition: Platform_Types.h:125
IfxGtm_Atom_Dtm_PwmHl_getDeadtimeTick
IFX_EXTERN Ifx_TickTime IfxGtm_Atom_Dtm_PwmHl_getDeadtimeTick(IfxGtm_AtomDtm_PwmHl *driver)
Definition: IfxGtm_Atom_Dtm_PwmHl.c:290
IfxGtm_Atom_Dtm_PwmHl_stdIfPwmHlInit
IFX_EXTERN boolean IfxGtm_Atom_Dtm_PwmHl_stdIfPwmHlInit(IfxStdIf_PwmHl *stdif, IfxGtm_AtomDtm_PwmHl *driver)
Initialises the statndard interface Pwm.
Definition: IfxGtm_Atom_Dtm_PwmHl.c:405
IfxGtm_Atom_Dtm_PwmHl_setMode
IFX_EXTERN boolean IfxGtm_Atom_Dtm_PwmHl_setMode(IfxGtm_AtomDtm_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate()
Definition: IfxGtm_Atom_Dtm_PwmHl.c:342
IfxGtm_Atom_Ch
IfxGtm_Atom_Ch
Enum for ATOM channels.
Definition: IfxGtm_cfg.h:258
IfxGtm_Atom_Dtm_PwmHl_UpdateShift
void(* IfxGtm_Atom_Dtm_PwmHl_UpdateShift)(IfxGtm_AtomDtm_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Definition: IfxGtm_Atom_Dtm_PwmHl.h:113


iLLD_TC38A: IfxGtm_Atom_Pwm.c Source File

  • Gtm
  • Atom
  • Pwm
IfxGtm_Atom_Pwm.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Atom_Pwm.c
3 * \brief GTM PWM details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxGtm_Atom_Pwm.h"
47
48 /******************************************************************************/
49 /*-------------------------Function Implementations---------------------------*/
50 /******************************************************************************/
51
52 boolean IfxGtm_Atom_Pwm_init(IfxGtm_Atom_Pwm_Driver *driver, const IfxGtm_Atom_Pwm_Config *config)
53 {
54 boolean result = TRUE;
55
56 driver->gtm = config->gtm;
57 driver->atomIndex = config->atom;
58
59 Ifx_GTM_ATOM *atomSFR = &config->gtm->ATOM[config->atom];
60 driver->atom = atomSFR;
61 driver->atomChannel = config->atomChannel;
62 #if defined(IFXGTM_DTM_AVAILABLE)
63
64 IfxGtm_Dtm dtmIndex = IfxGtm_Dtm_getTomChannelDtmIndex(config->tom, config->timerChannel);
65 boolean dtmAvailable = FALSE;
66
67 if (dtmIndex != IfxGtm_Dtm_none)
68 {
69 driver->dtm = &config->gtm->CDTM.DTM[dtmIndex];
70 driver->dtmChannel = (IfxGtm_Dtm_Ch)(config->timerChannel % 4);
71 dtmAvailable = TRUE;
72 }
73 else
74 {
75 dtmAvailable = FALSE;
76 }
77
78 #endif
79 Ifx_GTM_ATOM_AGC *agc = &atomSFR->AGC;
80 driver->agc = agc;
81
82 /* Initialize the timer part */
83 if (config->synchronousUpdateEnabled == 1)
84 {
85 IfxGtm_Atom_Agc_enableChannelUpdate(agc, config->atomChannel, TRUE);
86 }
87
88 IfxGtm_Atom_Agc_setChannelForceUpdate(agc, config->atomChannel, TRUE, TRUE);
89
90 IfxGtm_Atom_Ch_setSignalLevel(atomSFR, config->atomChannel, config->signalLevel);
91
92 IfxGtm_Atom_Ch_setMode(atomSFR, config->atomChannel, config->mode);
93
94 if (config->pin.outputPin != NULL_PTR)
95 {
96 IfxGtm_PinMap_setAtomTout(config->pin.outputPin, config->pin.outputMode, config->pin.padDriver);
97 }
98
99 // enable and initialise interrupts if chosen
100 if ((config->interrupt.ccu0Enabled == 1) || (config->interrupt.ccu1Enabled == 1))
101 {
102 IfxGtm_Atom_Ch_setNotification(atomSFR, config->atomChannel, config->interrupt.mode, config->interrupt.ccu0Enabled, config->interrupt.ccu1Enabled);
103
104 volatile Ifx_SRC_SRCR *src;
105 src = IfxGtm_Atom_Ch_getSrcPointer(config->gtm, config->atom, config->atomChannel);
106 IfxSrc_init(src, config->interrupt.isrProvider, config->interrupt.isrPriority);
107 IfxSrc_enable(src);
108 }
109
110 if (config->synchronousUpdateEnabled == 1)
111 {
112 IfxGtm_Atom_Ch_setCompareZeroShadow(atomSFR, config->atomChannel, config->period);
113 IfxGtm_Atom_Ch_setCompareOneShadow(atomSFR, config->atomChannel, config->dutyCycle);
114 }
115 else
116 {
117 IfxGtm_Atom_Ch_setCompareZero(atomSFR, config->atomChannel, config->period);
118 IfxGtm_Atom_Ch_setCompareOne(atomSFR, config->atomChannel, config->dutyCycle);
119 }
120
121 IfxGtm_Atom_Agc_enableChannel(agc, config->atomChannel, TRUE, FALSE);
122 IfxGtm_Atom_Agc_enableChannelOutput(agc, config->atomChannel, TRUE, FALSE);
123
124 if (config->immediateStartEnabled == TRUE)
125 {
126 IfxGtm_Atom_Agc_trigger(driver->agc);
127 }
128
129 #if defined(IFXGTM_DTM_AVAILABLE)
130
131 if (dtmAvailable)
132 {
133 // bypassing the DTM functionality
134 IfxGtm_Dtm_setClockSource(driver->dtm, config->dtmClockSource);
135 IfxGtm_Dtm_setOutput0DeadTimePath(driver->dtm, driver->dtmChannel, IfxGtm_Dtm_DeadTimePath_feedThrough);
136
137 IfxGtm_Dtm_setOutput1Select(driver->dtm, driver->dtmChannel, IfxGtm_Dtm_Output1Select_specialFunction);
138 IfxGtm_Dtm_setOutput1Function(driver->dtm, driver->dtmChannel, IfxGtm_Dtm_Output1Function_dtmInputSignal);
139 IfxGtm_Dtm_setOutput1DeadTimePath(driver->dtm, driver->dtmChannel, IfxGtm_Dtm_DeadTimePath_enable);
140 }
141
142 #endif
143 return result;
144 }
145
146
147 void IfxGtm_Atom_Pwm_initConfig(IfxGtm_Atom_Pwm_Config *config, Ifx_GTM *gtm)
148 {
149 config->gtm = gtm;
150 config->atom = IfxGtm_Atom_0;
151 config->atomChannel = IfxGtm_Atom_Ch_0;
152 config->period = 20;
153 config->dutyCycle = 10;
154 config->signalLevel = Ifx_ActiveState_high;
155 config->mode = IfxGtm_Atom_Mode_outputPwm;
156 config->oneShotModeEnabled = FALSE;
157 config->synchronousUpdateEnabled = FALSE;
158 config->immediateStartEnabled = TRUE;
159 config->interrupt.ccu0Enabled = FALSE;
160 config->interrupt.ccu1Enabled = FALSE;
161 config->interrupt.mode = IfxGtm_IrqMode_pulseNotify;
162 config->interrupt.isrProvider = IfxSrc_Tos_cpu0;
163 config->interrupt.isrPriority = 0;
164 config->pin.outputPin = NULL_PTR;
165 config->pin.outputMode = IfxPort_OutputMode_pushPull;
166 config->pin.padDriver = IfxPort_PadDriver_cmosAutomotiveSpeed1;
167
168 #if defined(IFXGTM_DTM_AVAILABLE)
169 config->dtmClockSource = IfxGtm_Dtm_ClockSource_cmuClock1;
170 #endif
171 }
172
173
174 void IfxGtm_Atom_Pwm_start(IfxGtm_Atom_Pwm_Driver *driver, boolean immediate)
175 {
176 /* Enable channel if not enabled already */
177 IfxGtm_Atom_Agc_enableChannel(driver->agc, driver->atomChannel, TRUE, immediate);
178 IfxGtm_Atom_Agc_enableChannelOutput(driver->agc, driver->atomChannel, TRUE, immediate);
179
180 /* Trigger the start now */
181 IfxGtm_Atom_Agc_trigger(driver->agc);
182 }
183
184
185 void IfxGtm_Atom_Pwm_stop(IfxGtm_Atom_Pwm_Driver *driver, boolean immediate)
186 {
187 /* Disable channels */
188 IfxGtm_Atom_Agc_enableChannel(driver->agc, driver->atomChannel, FALSE, immediate);
189 IfxGtm_Atom_Agc_enableChannelOutput(driver->agc, driver->atomChannel, FALSE, immediate);
190
191 /* Trigger the stop now */
192 IfxGtm_Atom_Agc_trigger(driver->agc);
193 }
Ifx_ActiveState_high
The signal is high active.
Definition: Ifx_Types.h:116
IfxGtm_Atom_Pwm_Config::immediateStartEnabled
boolean immediateStartEnabled
enable immediate start after init
Definition: IfxGtm_Atom_Pwm.h:173
IfxGtm_Atom_Pwm.h
GTM PWM details.
IfxGtm_Atom_Pwm_Config::mode
IfxGtm_Atom_Mode mode
Atom mode of operation.
Definition: IfxGtm_Atom_Pwm.h:166
IfxGtm_Dtm_none
No DTM object.
Definition: IfxGtm_cfg.h:312
IfxGtm_Atom_Pwm_Config::oneShotModeEnabled
boolean oneShotModeEnabled
Enable/Disable the one shot mode.
Definition: IfxGtm_Atom_Pwm.h:170
IfxGtm_Dtm_Output1Select_specialFunction
Special Function as selected by O1Fx (x = 0 to 3)
Definition: IfxGtm_Dtm.h:95
IfxGtm_Dtm_setOutput1Function
IFX_INLINE void IfxGtm_Dtm_setOutput1Function(Ifx_GTM_CDTM_DTM *dtm, IfxGtm_Dtm_Ch channel, IfxGtm_Dtm_Output1Function output1Function)
Sets the Output Function for DTM channel.
Definition: IfxGtm_Dtm.h:236
IfxGtm_Atom_Pwm_Interrupt::ccu0Enabled
boolean ccu0Enabled
Enable/Disable choice for CCU0 trigger interrupt.
Definition: IfxGtm_Atom_Pwm.h:139
IfxGtm_Atom_Pwm_pin::outputPin
IfxGtm_Atom_ToutMap * outputPin
output pin
Definition: IfxGtm_Atom_Pwm.h:150
IfxPort_OutputMode_pushPull
Definition: IfxPort.h:142
IfxGtm_Atom_Ch_setNotification
void IfxGtm_Atom_Ch_setNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne)
Sets the channel notification.
Definition: IfxGtm_Atom.c:471
IfxGtm_Atom_Ch_0
ATOM channel 0.
Definition: IfxGtm_cfg.h:261
IfxGtm_Atom_Pwm_Config::period
uint32 period
Period.
Definition: IfxGtm_Atom_Pwm.h:167
IfxGtm_Dtm_Output1Function_dtmInputSignal
DTM Input Signal DTM[i]_INx_T (i = 0 to 35 and x = 0 to 3)
Definition: IfxGtm_Dtm.h:86
IfxGtm_Atom_Pwm_Config::dtmClockSource
IfxGtm_Dtm_ClockSource dtmClockSource
DTM clock source.
Definition: IfxGtm_Atom_Pwm.h:171
IfxGtm_Atom_Pwm_Driver::atomIndex
IfxGtm_Atom atomIndex
Index of the ATOM object used.
Definition: IfxGtm_Atom_Pwm.h:183
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
IfxGtm_Atom_Pwm_Config::interrupt
IfxGtm_Atom_Pwm_Interrupt interrupt
configuration structure for interrupt
Definition: IfxGtm_Atom_Pwm.h:174
IfxGtm_Atom_Pwm_Config::signalLevel
Ifx_ActiveState signalLevel
Signal Level.
Definition: IfxGtm_Atom_Pwm.h:169
IfxGtm_Atom_Pwm_Config::dutyCycle
uint32 dutyCycle
Duty Cycle.
Definition: IfxGtm_Atom_Pwm.h:168
IfxGtm_Dtm_setOutput1Select
IFX_INLINE void IfxGtm_Dtm_setOutput1Select(Ifx_GTM_CDTM_DTM *dtm, IfxGtm_Dtm_Ch channel, IfxGtm_Dtm_Output1Select output1Select)
Sets the Output Selection for DTM channel.
Definition: IfxGtm_Dtm.h:245
IfxGtm_Dtm_setOutput0DeadTimePath
IFX_INLINE void IfxGtm_Dtm_setOutput0DeadTimePath(Ifx_GTM_CDTM_DTM *dtm, IfxGtm_Dtm_Ch channel, IfxGtm_Dtm_DeadTimePath deadTimePath)
Sets the Output 0 Dead Time Path for DTM channel.
Definition: IfxGtm_Dtm.h:218
IfxGtm_Atom_Pwm_Driver::gtm
Ifx_GTM * gtm
Pointer to GTM module.
Definition: IfxGtm_Atom_Pwm.h:182
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxGtm_Atom_Ch_setCompareOne
void IfxGtm_Atom_Ch_setCompareOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareOne)
Sets the compare 1 value.
Definition: IfxGtm_Atom.c:423
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxGtm_Atom_Agc_enableChannelUpdate
void IfxGtm_Atom_Agc_enableChannelUpdate(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled)
Enable/disable one channel for update (UPEN)
Definition: IfxGtm_Atom.c:145
IfxGtm_Atom_Pwm_stop
void IfxGtm_Atom_Pwm_stop(IfxGtm_Atom_Pwm_Driver *driver, boolean immediate)
Stops the PWM generation from the configured channel.
Definition: IfxGtm_Atom_Pwm.c:185
IfxGtm_Atom_Ch_getSrcPointer
volatile Ifx_SRC_SRCR * IfxGtm_Atom_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Atom atom, IfxGtm_Atom_Ch channel)
Returns a pointer to the ATOM channel SRC.
Definition: IfxGtm_Atom.c:359
IfxGtm_Atom_Pwm_Interrupt::mode
IfxGtm_IrqMode mode
IRQ mode of interrupt.
Definition: IfxGtm_Atom_Pwm.h:141
IfxGtm_Atom_Pwm_Interrupt::ccu1Enabled
boolean ccu1Enabled
Enable/Disable choice for CCU1 trigger interrupt.
Definition: IfxGtm_Atom_Pwm.h:140
IfxPort_PadDriver_cmosAutomotiveSpeed1
Speed grade 1.
Definition: IfxPort.h:153
IfxGtm_Atom_Pwm_start
void IfxGtm_Atom_Pwm_start(IfxGtm_Atom_Pwm_Driver *driver, boolean immediate)
Starts the PWM generation from the configured channel.
Definition: IfxGtm_Atom_Pwm.c:174
IfxGtm_Atom_Pwm_Config::pin
IfxGtm_Atom_Pwm_pin pin
configuration structure for output pin
Definition: IfxGtm_Atom_Pwm.h:175
IfxGtm_Atom_Mode_outputPwm
Definition: IfxGtm_Atom.h:97
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:68
IfxGtm_Dtm_setOutput1DeadTimePath
IFX_INLINE void IfxGtm_Dtm_setOutput1DeadTimePath(Ifx_GTM_CDTM_DTM *dtm, IfxGtm_Dtm_Ch channel, IfxGtm_Dtm_DeadTimePath deadTimePath)
Sets the Output 1 Dead Time Path for DTM channel.
Definition: IfxGtm_Dtm.h:227
IfxGtm_Atom_Pwm_Config::synchronousUpdateEnabled
boolean synchronousUpdateEnabled
Synchronous or Asynchronous update.
Definition: IfxGtm_Atom_Pwm.h:172
IfxGtm_Atom_Pwm_Driver::atomChannel
IfxGtm_Atom_Ch atomChannel
ATOM channel used for the timer.
Definition: IfxGtm_Atom_Pwm.h:184
IfxGtm_Dtm_setClockSource
IFX_INLINE void IfxGtm_Dtm_setClockSource(Ifx_GTM_CDTM_DTM *dtm, IfxGtm_Dtm_ClockSource clockSource)
Sets the clock source for DTM object.
Definition: IfxGtm_Dtm.h:212
IfxGtm_Dtm_ClockSource_cmuClock1
CMU_CLK1 (if DTM is connected to ATOM) or CMU_FXCLK0 (if DTM is connected to TOM) as clock source...
Definition: IfxGtm_Dtm.h:74
IfxGtm_Atom_Pwm_Config
Configuration structure.
Definition: IfxGtm_Atom_Pwm.h:161
IfxGtm_Atom_Ch_setCompareOneShadow
void IfxGtm_Atom_Ch_setCompareOneShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowOne)
Sets the compare 1 shadow value.
Definition: IfxGtm_Atom.c:431
IfxGtm_IrqMode_pulseNotify
Definition: IfxGtm.h:68
IfxGtm_Atom_Ch_setSignalLevel
void IfxGtm_Atom_Ch_setSignalLevel(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, Ifx_ActiveState activeState)
Sets the signal level.
Definition: IfxGtm_Atom.c:505
IfxGtm_Dtm_Ch
IfxGtm_Dtm_Ch
Enum for DTM channels.
Definition: IfxGtm_cfg.h:323
IfxGtm_Atom_Pwm_pin::padDriver
IfxPort_PadDriver padDriver
Pad driver.
Definition: IfxGtm_Atom_Pwm.h:152
IfxGtm_Atom_Pwm_Driver::agc
Ifx_GTM_ATOM_AGC * agc
Pointer to the AGC object.
Definition: IfxGtm_Atom_Pwm.h:186
IfxGtm_Atom_0
ATOM object 0.
Definition: IfxGtm_cfg.h:245
IfxGtm_Atom_Pwm_Config::atom
IfxGtm_Atom atom
Index of the ATOM object used.
Definition: IfxGtm_Atom_Pwm.h:164
IfxGtm_Atom_Agc_setChannelForceUpdate
void IfxGtm_Atom_Agc_setChannelForceUpdate(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean resetEnabled)
Enable/disable one channel for update (FUPD)
Definition: IfxGtm_Atom.c:224
IfxGtm_Atom_Pwm_Driver::atom
Ifx_GTM_ATOM * atom
Pointer to the ATOM object.
Definition: IfxGtm_Atom_Pwm.h:185
IfxGtm_Atom_Ch_setCompareZeroShadow
void IfxGtm_Atom_Ch_setCompareZeroShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowZero)
Sets the compare 0 shadow value.
Definition: IfxGtm_Atom.c:447
IfxGtm_Atom_Pwm_Driver
Driver Handle.
Definition: IfxGtm_Atom_Pwm.h:180
IfxGtm_Dtm_DeadTimePath_feedThrough
Feed through from DTM input to output (DTM[i]_INx to DTM[i]_OUTx (i = 0 to 35 and x = 0 to 4) ...
Definition: IfxGtm_Dtm.h:105
IfxGtm_Atom_Ch_setMode
void IfxGtm_Atom_Ch_setMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Mode mode)
set the Atom operating mode
Definition: IfxGtm_Atom.c:463
IfxGtm_Dtm_DeadTimePath_enable
Dead Time Path enabled.
Definition: IfxGtm_Dtm.h:106
IfxGtm_Atom_Ch_setCompareZero
void IfxGtm_Atom_Ch_setCompareZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareZero)
Sets the compare 0 value.
Definition: IfxGtm_Atom.c:439
IfxGtm_Atom_Pwm_Interrupt::isrProvider
IfxSrc_Tos isrProvider
Type of Service for Ccu0/1 interrupt.
Definition: IfxGtm_Atom_Pwm.h:142
IfxGtm_Atom_Pwm_pin::outputMode
IfxPort_OutputMode outputMode
Output mode.
Definition: IfxGtm_Atom_Pwm.h:151
IfxGtm_Atom_Agc_trigger
void IfxGtm_Atom_Agc_trigger(Ifx_GTM_ATOM_AGC *agc)
Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG)
Definition: IfxGtm_Atom.c:256
IfxGtm_Atom_Pwm_initConfig
void IfxGtm_Atom_Pwm_initConfig(IfxGtm_Atom_Pwm_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default.
Definition: IfxGtm_Atom_Pwm.c:147
IfxGtm_Dtm
IfxGtm_Dtm
Enum for DTM objects.
Definition: IfxGtm_cfg.h:310
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxGtm_Atom_Pwm_Interrupt::isrPriority
Ifx_Priority isrPriority
Priority for Ccu0/1 interrupt.
Definition: IfxGtm_Atom_Pwm.h:143
IfxGtm_Atom_Agc_enableChannelOutput
void IfxGtm_Atom_Agc_enableChannelOutput(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel output (OUTEN)
Definition: IfxGtm_Atom.c:127
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxGtm_Atom_Agc_enableChannel
void IfxGtm_Atom_Agc_enableChannel(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel (ENDIS)
Definition: IfxGtm_Atom.c:109
IfxGtm_PinMap_setAtomTout
void IfxGtm_PinMap_setAtomTout(IfxGtm_Atom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Definition: IfxGtm_PinMap.c:2408
IfxGtm_Atom_Pwm_init
boolean IfxGtm_Atom_Pwm_init(IfxGtm_Atom_Pwm_Driver *driver, const IfxGtm_Atom_Pwm_Config *config)
Initialises the Timer object.
Definition: IfxGtm_Atom_Pwm.c:52


iLLD_TC38A: IfxGtm_Atom_Pwm.h Source File

  • Gtm
  • Atom
  • Pwm
IfxGtm_Atom_Pwm.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Atom_Pwm.h
3 * \brief GTM PWM details
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Gtm_Atom_Pwm_Usage How to use the GTM ATOM PWM Driver
42 * \ingroup IfxLld_Gtm_Atom_Pwm
43 *
44 * This interface allows to generate simple PWM signal on a ATOM out put and can generate interrupts if enabled.
45 * this output can also be routed to port pin if required.
46 *
47 * \section Preparation Preparation
48 * \subsection Include Include Files
49 *
50 * Include following header file into your C code:
51 * \code
52 * #include <Gtm/Atom/Pwm/IfxGtm_Atom_Pwm.h>
53 * \endcode
54 *
55 * \subsection Variables Variables
56 * define global variables if necessary
57 *
58 * \code
59 * Ifx_GTM *gtm = &MODULE_GTM;
60 * #define ATOM0_CH0_PRIO 20
61 * \endcode
62 *
63 * \subsection Interrupts Interrupts
64 * define Interrupts if needed
65 *
66 * \code
67 * IFX_INTERRUPT(ATOM0Ch0_ISR, 0, ATOM0_CH0_PRIO)
68 * {}
69 * \endcode
70 *
71 * \subsection Initialization Initialization
72 *
73 * \code
74 * // install interrupt handlers
75 * IfxCpu_Irq_installInterruptHandler (ATOM0Ch0_ISR, ATOM0_CH0_PRIO);
76 *
77 * // enable GTM clock
78 * {
79 * float32 frequency = IfxGtm_Cmu_getModuleFrequency(gtm);
80 * // Enables the GTM
81 * IfxGtm_enable(gtm);
82 * // Set the global clock frequency to the max
83 * IfxGtm_Cmu_setGclkFrequency(gtm, frequency);
84 * // Set the CMU CLK0
85 * IfxGtm_Cmu_setClkFrequency(gtm, IfxGtm_Cmu_Clk_0, frequency);
86 * // FXCLK: used by TOM and CLK0: used by ATOM
87 * IfxGtm_Cmu_enableClocks(gtm, IFXGTM_CMU_CLKEN_FXCLK | IFXGTM_CMU_CLKEN_CLK0);
88 * }
89 *
90 * // initialise ATOM
91 * IfxGtm_Atom_Pwm_Config atomConfig; \\configuration structure
92 * IfxGtm_Atom_Pwm_Driver atomHandle; \\ handle
93 *
94 * IfxGtm_Atom_Pwm_initConfig(&atomConfig, gtm);
95 *
96 * atomConfig.tomChannel = IfxGtm_Tom_Ch_0;
97 * atomConfig.period = 20;
98 * atomConfig.dutyCycle = 10;
99 * atomConfig.interrupt.ccu0Enabled = TRUE;
100 * atomConfig.interrupt.isrPriority = ATOM0_CH0_PRIO;
101 * atomConfig.pin.outputPin = &IfxGtm_ATOM0_0_TOUT0_P02_0_OUT;
102 *
103 * IfxGtm_Atom_Pwm_init(&atomHandle, &atomConfig);
104 * \endcode
105 *
106 * ATOM will be now generating a PWM signal on the selected port pin while generating selected interrupt according to above configured period and duty cycle.
107 *
108 * \defgroup IfxLld_Gtm_Atom_Pwm ATOM PWM Interface Driver
109 * \ingroup IfxLld_Gtm_Atom
110 * \defgroup IfxLld_Gtm_Atom_Pwm_DataStructures ATOM PWM DataStructures
111 * \ingroup IfxLld_Gtm_Atom_Pwm
112 * \defgroup IfxLld_Gtm_Atom_Pwm_Pwm_Functions Pwm Functions
113 * \ingroup IfxLld_Gtm_Atom_Pwm
114 */
115
116 #ifndef IFXGTM_ATOM_PWM_H
117 #define IFXGTM_ATOM_PWM_H 1
118
119 /******************************************************************************/
120 /*----------------------------------Includes----------------------------------*/
121 /******************************************************************************/
122
123 #include "_PinMap/IfxGtm_PinMap.h"
124 #include "Gtm/Std/IfxGtm_Atom.h"
125 #include "Gtm/Std/IfxGtm_Cmu.h"
126 #include "Gtm/Std/IfxGtm_Dtm.h"
127 #include "Cpu/Std/IfxCpu.h"
128
129 /******************************************************************************/
130 /*-----------------------------Data Structures--------------------------------*/
131 /******************************************************************************/
132
133 /** \addtogroup IfxLld_Gtm_Atom_Pwm_DataStructures
134 * \{ */
135 /** \brief configuration structure for interrupts
136 */
137 typedef struct
138 {
139 boolean ccu0Enabled; /**< \brief Enable/Disable choice for CCU0 trigger interrupt */
140 boolean ccu1Enabled; /**< \brief Enable/Disable choice for CCU1 trigger interrupt */
141 IfxGtm_IrqMode mode; /**< \brief IRQ mode of interrupt */
142 IfxSrc_Tos isrProvider; /**< \brief Type of Service for Ccu0/1 interrupt */
143 Ifx_Priority isrPriority; /**< \brief Priority for Ccu0/1 interrupt */
144 } IfxGtm_Atom_Pwm_Interrupt;
145
146 /** \brief configuration structure for output pin
147 */
148 typedef struct
149 {
150 IfxGtm_Atom_ToutMap *outputPin; /**< \brief output pin */
151 IfxPort_OutputMode outputMode; /**< \brief Output mode */
152 IfxPort_PadDriver padDriver; /**< \brief Pad driver */
153 } IfxGtm_Atom_Pwm_pin;
154
155 /** \} */
156
157 /** \addtogroup IfxLld_Gtm_Atom_Pwm_DataStructures
158 * \{ */
159 /** \brief Configuration structure
160 */
161 typedef struct
162 {
163 Ifx_GTM *gtm; /**< \brief Pointer to GTM module */
164 IfxGtm_Atom atom; /**< \brief Index of the ATOM object used */
165 IfxGtm_Atom_Ch atomChannel; /**< \brief ATOM channel used for the timer */
166 IfxGtm_Atom_Mode mode; /**< \brief Atom mode of operation */
167 uint32 period; /**< \brief Period */
168 uint32 dutyCycle; /**< \brief Duty Cycle */
169 Ifx_ActiveState signalLevel; /**< \brief Signal Level */
170 boolean oneShotModeEnabled; /**< \brief Enable/Disable the one shot mode */
171 IfxGtm_Dtm_ClockSource dtmClockSource; /**< \brief DTM clock source */
172 boolean synchronousUpdateEnabled; /**< \brief Synchronous or Asynchronous update */
173 boolean immediateStartEnabled; /**< \brief enable immediate start after init */
174 IfxGtm_Atom_Pwm_Interrupt interrupt; /**< \brief configuration structure for interrupt */
175 IfxGtm_Atom_Pwm_pin pin; /**< \brief configuration structure for output pin */
176 } IfxGtm_Atom_Pwm_Config;
177
178 /** \brief Driver Handle
179 */
180 typedef struct
181 {
182 Ifx_GTM *gtm; /**< \brief Pointer to GTM module */
183 IfxGtm_Atom atomIndex; /**< \brief Index of the ATOM object used */
184 IfxGtm_Atom_Ch atomChannel; /**< \brief ATOM channel used for the timer */
185 Ifx_GTM_ATOM *atom; /**< \brief Pointer to the ATOM object */
186 Ifx_GTM_ATOM_AGC *agc; /**< \brief Pointer to the AGC object */
187 IfxGtm_Atom_Mode mode; /**< \brief Atom mode of operation */
188 } IfxGtm_Atom_Pwm_Driver;
189
190 /** \} */
191
192 /** \addtogroup IfxLld_Gtm_Atom_Pwm_Pwm_Functions
193 * \{ */
194
195 /******************************************************************************/
196 /*-------------------------Global Function Prototypes-------------------------*/
197 /******************************************************************************/
198
199 /** \brief Initialises the Timer object
200 * \param driver ATOM Handle
201 * \param config Configuration structure for ATOM
202 * \return TRUE on success else FALSE
203 */
204 IFX_EXTERN boolean IfxGtm_Atom_Pwm_init(IfxGtm_Atom_Pwm_Driver *driver, const IfxGtm_Atom_Pwm_Config *config);
205
206 /** \brief Initializes the configuration structure to default
207 * \param config This parameter is Initialised by the function
208 * \param gtm Pointer to GTM module
209 * \return None
210 */
211 IFX_EXTERN void IfxGtm_Atom_Pwm_initConfig(IfxGtm_Atom_Pwm_Config *config, Ifx_GTM *gtm);
212
213 /** \brief Starts the PWM generation from the configured channel.
214 * \param driver handle for the PWM device.
215 * \param immediate immediate start or not.
216 * \return None
217 */
218 IFX_EXTERN void IfxGtm_Atom_Pwm_start(IfxGtm_Atom_Pwm_Driver *driver, boolean immediate);
219
220 /** \brief Stops the PWM generation from the configured channel
221 * \param driver handle for the PWM device
222 * \param immediate immediate start or not.
223 * \return None
224 */
225 IFX_EXTERN void IfxGtm_Atom_Pwm_stop(IfxGtm_Atom_Pwm_Driver *driver, boolean immediate);
226
227 /** \} */
228
229 #endif /* IFXGTM_ATOM_PWM_H */
IfxGtm_Atom_Pwm_Config::immediateStartEnabled
boolean immediateStartEnabled
enable immediate start after init
Definition: IfxGtm_Atom_Pwm.h:173
IfxGtm_Atom_Pwm_Config::mode
IfxGtm_Atom_Mode mode
Atom mode of operation.
Definition: IfxGtm_Atom_Pwm.h:166
IfxGtm_Atom_Pwm_Config::oneShotModeEnabled
boolean oneShotModeEnabled
Enable/Disable the one shot mode.
Definition: IfxGtm_Atom_Pwm.h:170
IfxGtm_Atom_Pwm_Interrupt::ccu0Enabled
boolean ccu0Enabled
Enable/Disable choice for CCU0 trigger interrupt.
Definition: IfxGtm_Atom_Pwm.h:139
IfxGtm_Atom_Pwm_pin::outputPin
IfxGtm_Atom_ToutMap * outputPin
output pin
Definition: IfxGtm_Atom_Pwm.h:150
IfxGtm_Atom_Pwm_Interrupt
configuration structure for interrupts
Definition: IfxGtm_Atom_Pwm.h:137
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:100
IfxGtm_Atom_Pwm_Config::period
uint32 period
Period.
Definition: IfxGtm_Atom_Pwm.h:167
IfxGtm_Atom_Pwm_Config::dtmClockSource
IfxGtm_Dtm_ClockSource dtmClockSource
DTM clock source.
Definition: IfxGtm_Atom_Pwm.h:171
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:140
IfxGtm_Atom_Pwm_Driver::atomIndex
IfxGtm_Atom atomIndex
Index of the ATOM object used.
Definition: IfxGtm_Atom_Pwm.h:183
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxGtm_Atom_Pwm_pin
configuration structure for output pin
Definition: IfxGtm_Atom_Pwm.h:148
IfxGtm_PinMap.h
GTM I/O map.
IfxGtm_Atom
IfxGtm_Atom
Enum for ATOM objects.
Definition: IfxGtm_cfg.h:243
IfxGtm_Atom_Pwm_Config::interrupt
IfxGtm_Atom_Pwm_Interrupt interrupt
configuration structure for interrupt
Definition: IfxGtm_Atom_Pwm.h:174
IfxGtm_Atom_Pwm_Config::signalLevel
Ifx_ActiveState signalLevel
Signal Level.
Definition: IfxGtm_Atom_Pwm.h:169
IfxGtm_Atom_Pwm_Config::dutyCycle
uint32 dutyCycle
Duty Cycle.
Definition: IfxGtm_Atom_Pwm.h:168
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:113
IfxGtm_Atom_Pwm_Config::gtm
Ifx_GTM * gtm
Pointer to GTM module.
Definition: IfxGtm_Atom_Pwm.h:163
IfxGtm_Atom_Pwm_stop
IFX_EXTERN void IfxGtm_Atom_Pwm_stop(IfxGtm_Atom_Pwm_Driver *driver, boolean immediate)
Stops the PWM generation from the configured channel.
Definition: IfxGtm_Atom_Pwm.c:185
IfxGtm_Atom_Pwm_Interrupt::mode
IfxGtm_IrqMode mode
IRQ mode of interrupt.
Definition: IfxGtm_Atom_Pwm.h:141
IfxGtm_Dtm.h
GTM basic functionality.
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxGtm_Atom_Pwm_Interrupt::ccu1Enabled
boolean ccu1Enabled
Enable/Disable choice for CCU1 trigger interrupt.
Definition: IfxGtm_Atom_Pwm.h:140
IfxGtm_Atom_Pwm_start
IFX_EXTERN void IfxGtm_Atom_Pwm_start(IfxGtm_Atom_Pwm_Driver *driver, boolean immediate)
Starts the PWM generation from the configured channel.
Definition: IfxGtm_Atom_Pwm.c:174
IfxGtm_Atom_Pwm_Config::pin
IfxGtm_Atom_Pwm_pin pin
configuration structure for output pin
Definition: IfxGtm_Atom_Pwm.h:175
IfxGtm_Atom_ToutMap
ATOM TOUT pin mapping structure.
Definition: IfxGtm_PinMap.h:110
IfxGtm_Atom_Mode
IfxGtm_Atom_Mode
Enum for ATOM mode.
Definition: IfxGtm_Atom.h:93
IfxGtm_Atom_Pwm_Config::synchronousUpdateEnabled
boolean synchronousUpdateEnabled
Synchronous or Asynchronous update.
Definition: IfxGtm_Atom_Pwm.h:172
IfxGtm_Dtm_ClockSource
IfxGtm_Dtm_ClockSource
Clock source for DTM object Definition in IfxGTM.DTM[i].CTRL.B.CLKSEL ( i = 0 to 35) ...
Definition: IfxGtm_Dtm.h:70
IfxGtm_Atom_Pwm_Config::atomChannel
IfxGtm_Atom_Ch atomChannel
ATOM channel used for the timer.
Definition: IfxGtm_Atom_Pwm.h:165
IfxGtm_Atom_Pwm_Config
Configuration structure.
Definition: IfxGtm_Atom_Pwm.h:161
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:151
IfxCpu.h
CPU basic functionality.
IfxGtm_Atom_Pwm_pin::padDriver
IfxPort_PadDriver padDriver
Pad driver.
Definition: IfxGtm_Atom_Pwm.h:152
IfxGtm_Atom_Pwm_Driver::agc
Ifx_GTM_ATOM_AGC * agc
Pointer to the AGC object.
Definition: IfxGtm_Atom_Pwm.h:186
IfxGtm_Atom_Pwm_Config::atom
IfxGtm_Atom atom
Index of the ATOM object used.
Definition: IfxGtm_Atom_Pwm.h:164
IfxGtm_Atom_Pwm_Driver::atom
Ifx_GTM_ATOM * atom
Pointer to the ATOM object.
Definition: IfxGtm_Atom_Pwm.h:185
IfxGtm_Atom_Pwm_Driver
Driver Handle.
Definition: IfxGtm_Atom_Pwm.h:180
IfxGtm_IrqMode
IfxGtm_IrqMode
Enum for GTM interrupt modes.
Definition: IfxGtm.h:64
IfxGtm_Atom_Pwm_Interrupt::isrProvider
IfxSrc_Tos isrProvider
Type of Service for Ccu0/1 interrupt.
Definition: IfxGtm_Atom_Pwm.h:142
IfxGtm_Cmu.h
GTM basic functionality.
IfxGtm_Atom_Pwm_pin::outputMode
IfxPort_OutputMode outputMode
Output mode.
Definition: IfxGtm_Atom_Pwm.h:151
IfxGtm_Atom_Pwm_initConfig
IFX_EXTERN void IfxGtm_Atom_Pwm_initConfig(IfxGtm_Atom_Pwm_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default.
Definition: IfxGtm_Atom_Pwm.c:147
IfxGtm_Atom.h
GTM basic functionality.
IfxGtm_Atom_Pwm_Interrupt::isrPriority
Ifx_Priority isrPriority
Priority for Ccu0/1 interrupt.
Definition: IfxGtm_Atom_Pwm.h:143
IfxGtm_Atom_Ch
IfxGtm_Atom_Ch
Enum for ATOM channels.
Definition: IfxGtm_cfg.h:258
IfxGtm_Atom_Pwm_init
IFX_EXTERN boolean IfxGtm_Atom_Pwm_init(IfxGtm_Atom_Pwm_Driver *driver, const IfxGtm_Atom_Pwm_Config *config)
Initialises the Timer object.
Definition: IfxGtm_Atom_Pwm.c:52


iLLD_TC38A: IfxGtm_Atom_PwmHl.c Source File

  • Gtm
  • Atom
  • PwmHl
IfxGtm_Atom_PwmHl.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Atom_PwmHl.c
3 * \brief GTM PWMHL details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxGtm_Atom_PwmHl.h"
47 #include "_Utilities/Ifx_Assert.h"
48 #include "stddef.h"
49 #include "string.h"
50
51 /** \addtogroup IfxLld_Gtm_Atom_PwmHl_PwmHl_StdIf_Functions
52 * \{ */
53 /******************************************************************************/
54 /*------------------------Inline Function Prototypes--------------------------*/
55 /******************************************************************************/
56
57 /** \brief Inverts the active state
58 * \param activeState Active state
59 * \return State
60 */
61 IFX_INLINE Ifx_ActiveState IfxGtm_Atom_PwmHl_invertActiveState(Ifx_ActiveState activeState);
62
63 /******************************************************************************/
64 /*-----------------------Private Function Prototypes--------------------------*/
65 /******************************************************************************/
66
67 /** \brief Sets switched to OFF
68 * \param driver GTM ATOM PWM driver
69 * \param tOn ON time
70 * \param shift Shift value in ticks
71 * \return None
72 */
73 IFX_STATIC void IfxGtm_Atom_PwmHl_updateAndShiftOff(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift);
74
75 /** \brief Updates the x output duty cycle in center aligned and center aligned inverted modes
76 * \param driver GTM ATOM PWM driver
77 * \param tOn T on
78 * \return None
79 */
80 IFX_STATIC void IfxGtm_Atom_PwmHl_updateCenterAligned(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn);
81
82 /** \brief Updates the x output duty cycle in edge aligned modes (left and right aligned)
83 * \param driver GTM ATOM PWM driver
84 * \param tOn T on
85 * \return None
86 */
87 IFX_STATIC void IfxGtm_Atom_PwmHl_updateEdgeAligned(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn);
88
89 /** \brief Set the outputs to inactive
90 * \param driver GTM ATOM PWM driver
91 * \param tOn T on
92 * \return None
93 */
94 IFX_STATIC void IfxGtm_Atom_PwmHl_updateOff(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn);
95
96 /** \brief Update Pulse
97 * \param driver GTM ATOM PWM driver
98 * \param tOn ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
99 * \param offset Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
100 * \return None
101 */
102 IFX_STATIC void IfxGtm_Atom_PwmHl_updatePulse(IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset);
103
104 /** \brief Set Pulse to OFF
105 * \param driver GTM ATOM PWM driver
106 * \param tOn ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
107 * \param offset Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
108 * \return None
109 */
110 IFX_STATIC void IfxGtm_Atom_PwmHl_updatePulseOff(IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset);
111
112 /** \brief Update Shift Center Aligned
113 * \param driver GTM ATOM PWM driver
114 * \param tOn ON time
115 * \param shift Shift value in ticks
116 * \return None
117 */
118 IFX_STATIC void IfxGtm_Atom_PwmHl_updateShiftCenterAligned(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift);
119
120 /** \} */
121
122 /******************************************************************************/
123 /*------------------------Private Variables/Constants-------------------------*/
124 /******************************************************************************/
125
126 IFX_STATIC IFX_CONST IfxGtm_Atom_PwmHl_Mode IfxGtm_Atom_PwmHl_modes[Ifx_Pwm_Mode_off + 1] = {
127 {Ifx_Pwm_Mode_centerAligned, FALSE, &IfxGtm_Atom_PwmHl_updateCenterAligned, &IfxGtm_Atom_PwmHl_updateShiftCenterAligned, &IfxGtm_Atom_PwmHl_updatePulse },
128 {Ifx_Pwm_Mode_centerAlignedInverted, TRUE, &IfxGtm_Atom_PwmHl_updateCenterAligned, &IfxGtm_Atom_PwmHl_updateShiftCenterAligned, &IfxGtm_Atom_PwmHl_updatePulse },
129 {Ifx_Pwm_Mode_leftAligned, FALSE, &IfxGtm_Atom_PwmHl_updateEdgeAligned, &IfxGtm_Atom_PwmHl_updateAndShiftOff, &IfxGtm_Atom_PwmHl_updatePulse },
130 {Ifx_Pwm_Mode_rightAligned, TRUE, &IfxGtm_Atom_PwmHl_updateEdgeAligned, &IfxGtm_Atom_PwmHl_updateAndShiftOff, &IfxGtm_Atom_PwmHl_updatePulse },
131 {Ifx_Pwm_Mode_off, FALSE, &IfxGtm_Atom_PwmHl_updateOff, &IfxGtm_Atom_PwmHl_updateAndShiftOff, &IfxGtm_Atom_PwmHl_updatePulseOff},
132 };
133
134 /******************************************************************************/
135 /*---------------------Inline Function Implementations------------------------*/
136 /******************************************************************************/
137
138 IFX_INLINE Ifx_ActiveState IfxGtm_Atom_PwmHl_invertActiveState(Ifx_ActiveState activeState)
139 {
140 return activeState == Ifx_ActiveState_low ? Ifx_ActiveState_high : Ifx_ActiveState_low;
141 }
142
143
144 /******************************************************************************/
145 /*-------------------------Function Implementations---------------------------*/
146 /******************************************************************************/
147
148 float32 IfxGtm_Atom_PwmHl_getDeadtime(IfxGtm_Atom_PwmHl *driver)
149 {
150 return IfxStdIf_Timer_tickToS(driver->timer->base.clockFreq, driver->base.deadtime);
151 }
152
153
154 float32 IfxGtm_Atom_PwmHl_getMinPulse(IfxGtm_Atom_PwmHl *driver)
155 {
156 return IfxStdIf_Timer_tickToS(driver->timer->base.clockFreq, driver->base.minPulse - driver->base.deadtime);
157 }
158
159
160 Ifx_Pwm_Mode IfxGtm_Atom_PwmHl_getMode(IfxGtm_Atom_PwmHl *driver)
161 {
162 return driver->base.mode;
163 }
164
165
166 boolean IfxGtm_Atom_PwmHl_init(IfxGtm_Atom_PwmHl *driver, const IfxGtm_Atom_PwmHl_Config *config)
167 {
168 boolean result = TRUE;
169 uint16 channelMask;
170 uint16 channelsMask = 0;
171 uint32 channelIndex;
172
173 IfxGtm_Atom_Timer *timer = config->timer;
174
175 driver->base.mode = Ifx_Pwm_Mode_init;
176 driver->timer = timer;
177 driver->base.setMode = 0;
178 driver->base.inverted = FALSE;
179 driver->base.ccxActiveState = config->base.ccxActiveState;
180 driver->base.coutxActiveState = config->base.coutxActiveState;
181 driver->base.channelCount = config->base.channelCount;
182
183 IfxGtm_Atom_PwmHl_setDeadtime(driver, config->base.deadtime);
184 IfxGtm_Atom_PwmHl_setMinPulse(driver, config->base.minPulse);
185
186 driver->atom = &(timer->gtm->ATOM[config->atom]);
187 /* Only one AGC */
188 driver->agc = (Ifx_GTM_ATOM_AGC *)&driver->atom->AGC.GLB_CTRL;
189
190 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->base.channelCount <= IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS);
191
192 IfxGtm_Cmu_Clk clock = IfxGtm_Atom_Ch_getClockSource(timer->atom, timer->timerChannel);
193
194 for (channelIndex = 0; channelIndex < config->base.channelCount; channelIndex++)
195 {
196 IfxGtm_Atom_Ch channel;
197 /* CCX */
198 channel = config->ccx[channelIndex]->channel;
199 driver->ccx[channelIndex] = channel;
200 channelMask = 1 << channel;
201 channelsMask |= channelMask;
202
203 /* Initialize the timer part */
204 IfxGtm_Atom_Ch_configurePwmMode(driver->atom, channel, clock,
205 driver->base.inverted ? config->base.ccxActiveState :
206 IfxGtm_Atom_PwmHl_invertActiveState(config->base.ccxActiveState),
207 IfxGtm_Atom_Ch_ResetEvent_onTrigger, IfxGtm_Atom_Ch_OutputTrigger_forward);
208
209 /* Initialize the port */
210 if (config->initPins == TRUE)
211 {
212 IfxGtm_PinMap_setAtomTout(config->ccx[channelIndex],
213 config->base.outputMode, config->base.outputDriver);
214 }
215
216 /* COUTX */
217 channel = config->coutx[channelIndex]->channel;
218 driver->coutx[channelIndex] = channel;
219 channelMask = 1 << channel;
220 channelsMask |= channelMask;
221
222 /* Initialize the timer part */
223 IfxGtm_Atom_Ch_configurePwmMode(driver->atom, channel, clock,
224 driver->base.inverted ?
225 IfxGtm_Atom_PwmHl_invertActiveState(config->base.coutxActiveState)
226 : config->base.coutxActiveState,
227 IfxGtm_Atom_Ch_ResetEvent_onTrigger, IfxGtm_Atom_Ch_OutputTrigger_forward);
228
229 /* Initialize the port */
230 if (config->initPins == TRUE)
231 {
232 IfxGtm_PinMap_setAtomTout(config->coutx[channelIndex],
233 config->base.outputMode, config->base.outputDriver);
234 }
235 }
236
237 IfxGtm_Atom_Agc_enableChannelsOutput(driver->agc, channelsMask, 0, TRUE);
238 IfxGtm_Atom_Agc_enableChannels(driver->agc, channelsMask, 0, TRUE);
239
240 IfxGtm_Atom_PwmHl_setMode(driver, Ifx_Pwm_Mode_off);
241
242 Ifx_TimerValue tOn[IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS] = {0};
243 IfxGtm_Atom_PwmHl_updateOff(driver, tOn); /* tOn do not need defined values */
244
245 /* Transfer the shadow registers */
246 IfxGtm_Atom_Agc_setChannelsForceUpdate(driver->agc, channelsMask, 0, 0, 0);
247 IfxGtm_Atom_Agc_trigger(driver->agc);
248 IfxGtm_Atom_Agc_setChannelsForceUpdate(driver->agc, 0, channelsMask, 0, 0);
249
250 /* Enable timer to update the channels */
251
252 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
253 {
254 IfxGtm_Atom_Timer_addToChannelMask(timer, driver->ccx[channelIndex]);
255 IfxGtm_Atom_Timer_addToChannelMask(timer, driver->coutx[channelIndex]);
256 }
257
258 return result;
259 }
260
261
262 void IfxGtm_Atom_PwmHl_initConfig(IfxGtm_Atom_PwmHl_Config *config)
263 {
264 IfxStdIf_PwmHl_initConfig(&config->base);
265 config->timer = NULL_PTR;
266 config->atom = IfxGtm_Atom_0;
267 config->ccx = NULL_PTR;
268 config->coutx = NULL_PTR;
269 config->initPins = TRUE;
270 }
271
272
273 boolean IfxGtm_Atom_PwmHl_setDeadtime(IfxGtm_Atom_PwmHl *driver, float32 deadtime)
274 {
275 Ifx_TimerValue value = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, deadtime);
276 driver->base.deadtime = value;
277
278 return TRUE;
279 }
280
281
282 boolean IfxGtm_Atom_PwmHl_setMinPulse(IfxGtm_Atom_PwmHl *driver, float32 minPulse)
283 {
284 Ifx_TimerValue value = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, minPulse);
285
286 driver->base.minPulse = value + driver->base.deadtime;
287 driver->base.maxPulse = driver->timer->base.period - driver->base.minPulse;
288
289 return TRUE;
290 }
291
292
293 boolean IfxGtm_Atom_PwmHl_setMode(IfxGtm_Atom_PwmHl *driver, Ifx_Pwm_Mode mode)
294 {
295 boolean result = TRUE;
296 IfxGtm_Atom_PwmHl_Base *base = &driver->base;
297
298 if (base->mode != mode)
299 {
300 if ((mode > Ifx_Pwm_Mode_off) || (IfxGtm_Atom_PwmHl_modes[mode].update == NULL_PTR))
301 {
302 mode = Ifx_Pwm_Mode_off;
303 result = FALSE;
304 }
305
306 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, mode == IfxGtm_Atom_PwmHl_modes[mode].mode);
307
308 base->mode = mode;
309 driver->update = IfxGtm_Atom_PwmHl_modes[mode].update;
310 driver->updateAndShift = IfxGtm_Atom_PwmHl_modes[mode].updateAndShift;
311 driver->updatePulse = IfxGtm_Atom_PwmHl_modes[mode].updatePulse;
312
313 if (base->mode != Ifx_Pwm_Mode_off)
314 {
315 base->inverted = IfxGtm_Atom_PwmHl_modes[mode].inverted;
316 }
317 else
318 { /* Keep previous inverted for off mode */
319 }
320
321 if (base->inverted)
322 {
323 driver->ccxTemp = driver->coutx;
324 driver->coutxTemp = driver->ccx;
325 }
326 else
327 {
328 driver->ccxTemp = driver->ccx;
329 driver->coutxTemp = driver->coutx;
330 }
331
332 { /* Workaround to enable the signal inversion required for center aligned inverted
333 * and right aligned modes */
334 /** \note Changing signal level may produce short circuit at the power stage,
335 * in which case the inverter must be disable during this action.*/
336
337 /* Ifx_Pwm_Mode_centerAligned and Ifx_Pwm_Mode_LeftAligned use inverted=FALSE */
338 /* Ifx_Pwm_Mode_centerAlignedInverted and Ifx_Pwm_Mode_RightAligned use inverted=TRUE */
339 uint32 channelIndex;
340
341 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
342 {
343 IfxGtm_Atom_Ch channel;
344
345 channel = driver->ccx[channelIndex];
346 IfxGtm_Atom_Ch_setSignalLevel(driver->atom, channel, base->inverted
347 ? base->ccxActiveState
348 : IfxGtm_Atom_PwmHl_invertActiveState(driver->base.ccxActiveState));
349
350 channel = driver->coutx[channelIndex];
351 IfxGtm_Atom_Ch_setSignalLevel(driver->atom, channel, base->inverted
352 ? IfxGtm_Atom_PwmHl_invertActiveState(driver->base.coutxActiveState)
353 : base->coutxActiveState);
354 }
355 }
356 }
357
358 return result;
359 }
360
361
362 void IfxGtm_Atom_PwmHl_setOnTime(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
363 {
364 driver->update(driver, tOn);
365 }
366
367
368 void IfxGtm_Atom_PwmHl_setOnTimeAndShift(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
369 {
370 driver->updateAndShift(driver, tOn, shift);
371 }
372
373
374 void IfxGtm_Atom_PwmHl_setPulse(IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
375 {
376 driver->updatePulse(driver, tOn, offset);
377 }
378
379
380 void IfxGtm_Atom_PwmHl_setupChannels(IfxGtm_Atom_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
381 {
382 /* Dummy Function for StdIf Compile*/
383 IFX_UNUSED_PARAMETER(driver)
384 IFX_UNUSED_PARAMETER(activeCh)
385 IFX_UNUSED_PARAMETER(stuckSt)
386 }
387
388
389 boolean IfxGtm_Atom_PwmHl_stdIfPwmHlInit(IfxStdIf_PwmHl *stdif, IfxGtm_Atom_PwmHl *driver)
390 {
391 /* Ensure the stdif is reset to zeros */
392 memset(stdif, 0, sizeof(IfxStdIf_PwmHl));
393
394 /* *INDENT-OFF* Note: this file was indented manually by the author. */
395 /* Set the API link */
396 stdif->driver = driver;
397 stdif->setDeadtime = (IfxStdIf_PwmHl_SetDeadtime )&IfxGtm_Atom_PwmHl_setDeadtime;
398 stdif->getDeadtime = (IfxStdIf_PwmHl_GetDeadtime )&IfxGtm_Atom_PwmHl_getDeadtime;
399 stdif->setMinPulse = (IfxStdIf_PwmHl_SetMinPulse )&IfxGtm_Atom_PwmHl_setMinPulse;
400 stdif->getMinPulse = (IfxStdIf_PwmHl_GetMinPulse )&IfxGtm_Atom_PwmHl_getMinPulse;
401 stdif->getMode = (IfxStdIf_PwmHl_GetMode )&IfxGtm_Atom_PwmHl_getMode;
402 stdif->setMode = (IfxStdIf_PwmHl_SetMode )&IfxGtm_Atom_PwmHl_setMode;
403 stdif->setOnTime = (IfxStdIf_PwmHl_SetOnTime )&IfxGtm_Atom_PwmHl_setOnTime;
404 stdif->setOnTimeAndShift = (IfxStdIf_PwmHl_SetOnTimeAndShift)&IfxGtm_Atom_PwmHl_setOnTimeAndShift;
405 stdif->setPulse = (IfxStdIf_PwmHl_SetPulse )&IfxGtm_Atom_PwmHl_setPulse;
406 stdif->setupChannels = (IfxStdIf_PwmHl_SetupChannels )&IfxGtm_Atom_PwmHl_setupChannels;
407 IfxGtm_Atom_Timer_stdIfTimerInit(&stdif->timer, driver->timer);
408 /* *INDENT-ON* */
409
410 return TRUE;
411 }
412
413
414 IFX_STATIC void IfxGtm_Atom_PwmHl_updateAndShiftOff(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
415 {
416 IfxGtm_Atom_PwmHl_updateOff(driver, NULL_PTR);
417 IFX_UNUSED_PARAMETER(tOn)
418 IFX_UNUSED_PARAMETER(shift)
419 }
420
421
422 IFX_STATIC void IfxGtm_Atom_PwmHl_updateCenterAligned(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
423 {
424 uint8 channelIndex;
425 Ifx_TimerValue period;
426 Ifx_TimerValue deadtime = driver->base.deadtime;
427
428 period = driver->timer->base.period;
429
430 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
431 {
432 Ifx_TimerValue x; /* x=period*dutyCycle, x=OnTime+deadTime */
433 Ifx_TimerValue cm0, cm1;
434 x = tOn[channelIndex];
435
436 if (driver->base.inverted != FALSE)
437 {
438 x = period - x;
439 }
440 else
441 {}
442
443 if ((x < driver->base.minPulse) || (x <= deadtime))
444 { /* For deadtime condition: avoid leading edge of top channel to occur after the trailing edge */
445 x = 0;
446 }
447 else if (x > driver->base.maxPulse)
448 {
449 x = period;
450 }
451 else
452 {}
453
454 /* Special handling due to GTM issue */
455 if (x == period)
456 { /* 100% duty cycle */
457 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccxTemp[channelIndex],
458 period + 1 /* No compare event */,
459 2 /* 1st compare event (issue: expected to be 1)*/ + deadtime);
460 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->coutxTemp[channelIndex],
461 period + 2 /* No compare event, issues has been seen with +1 */,
462 2 /* 1st compare event (issue: expected to be 1)*/);
463 }
464 else if (x == 0)
465 {
466 cm0 = 1;
467 cm1 = period + 2;
468 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccxTemp[channelIndex], cm0, cm1);
469 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->coutxTemp[channelIndex], cm0 + deadtime, cm1);
470 }
471 else
472 { /* x% duty cycle */
473 cm1 = (period - x) / 2; // CM1
474 cm0 = (period + x) / 2; // CM0
475 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccxTemp[channelIndex], cm0, cm1 + deadtime);
476 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->coutxTemp[channelIndex], cm0 + deadtime, cm1);
477 }
478 }
479 }
480
481
482 IFX_STATIC void IfxGtm_Atom_PwmHl_updateEdgeAligned(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
483 {
484 uint8 channelIndex;
485 Ifx_TimerValue period;
486 Ifx_TimerValue deadtime = driver->base.deadtime;
487
488 period = driver->timer->base.period;
489
490 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
491 {
492 Ifx_TimerValue x; /* x=period*dutyCycle, x=OnTime+deadTime */
493 Ifx_TimerValue cm0, cm1;
494 x = tOn[channelIndex];
495
496 if (driver->base.inverted != FALSE)
497 {
498 x = period - x;
499 }
500 else
501 {}
502
503 if ((x < driver->base.minPulse) || (x <= deadtime))
504 { /* For deadtime condition: avoid leading edge of top channel to occur after the trailing edge */
505 x = 0;
506 }
507 else if (x > driver->base.maxPulse)
508 {
509 x = period;
510 }
511 else
512 {}
513
514 /* Special handling due to GTM issue */
515 if (x == period)
516 { /* 100% duty cycle */
517 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccxTemp[channelIndex],
518 period + 1 /* No compare event */,
519 2 /* 1st compare event (issue: expected to be 1)*/ + deadtime);
520 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->coutxTemp[channelIndex],
521 period + 2 /* No compare event, issues has been seen with +1 */,
522 2 /* 1st compare event (issue: expected to be 1)*/);
523 }
524 else if (x == 0)
525 {
526 cm0 = 1;
527 cm1 = period + 2;
528 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccxTemp[channelIndex], cm0, cm1);
529 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->coutxTemp[channelIndex], cm0 + deadtime, cm1);
530 }
531 else
532 { /* x% duty cycle */
533 cm1 = 2; // CM1, set to 2 due to a GTM issue. should be 1 according to spec
534 cm0 = x; // CM0, set to x+2 due to a GTM issue. should be x+1 according to spec
535 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccxTemp[channelIndex], cm0, cm1 + deadtime);
536 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->coutxTemp[channelIndex], cm0 + deadtime, cm1);
537 }
538 }
539 }
540
541
542 IFX_STATIC void IfxGtm_Atom_PwmHl_updateOff(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
543 {
544 IFX_UNUSED_PARAMETER(tOn)
545 uint8 channelIndex;
546 Ifx_TimerValue period;
547 period = driver->timer->base.period;
548
549 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
550 {
551 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccxTemp[channelIndex],
552 2 /* 1 will keep the previous level*/, period + 2);
553 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->coutxTemp[channelIndex], period + 1, 2);
554 }
555 }
556
557
558 IFX_STATIC void IfxGtm_Atom_PwmHl_updatePulse(IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
559 {
560 uint8 channelIndex;
561 Ifx_TimerValue period;
562
563 period = driver->timer->base.period;
564
565 /* Top channels */
566 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
567 {
568 Ifx_TimerValue x; /* x=period*dutyCycle, x=OnTime+deadTime */
569 Ifx_TimerValue o;
570 Ifx_TimerValue cm0, cm1;
571
572 x = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, tOn[channelIndex]);
573 o = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, offset[channelIndex]);
574
575 if (driver->base.inverted != FALSE)
576 {
577 x = period - x;
578 }
579 else
580 {}
581
582 if ((x < driver->base.minPulse) || (o > period))
583 {
584 x = 0;
585 }
586 else if ((x > driver->base.maxPulse) || (o + x > period))
587 {
588 x = period;
589 }
590 else
591 {}
592
593 /* Special handling due to GTM issue */
594 if (x == period)
595 { /* 100% duty cycle */
596 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccxTemp[channelIndex],
597 period + 1 /* No compare event */,
598 2 /* 1st compare event (issue: expected to be 1)*/);
599 }
600 else if (x == 0)
601 {
602 cm0 = 1;
603 cm1 = period + 2;
604 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccxTemp[channelIndex], cm0, cm1);
605 }
606 else
607 { /* x% duty cycle */
608 cm1 = 2 + o; // CM1, set to 2 due to a GTM issue. should be 1 according to spec
609 cm0 = o + x; // CM0, set to x+2 due to a GTM issue. should be x+1 according to spec
610 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccxTemp[channelIndex], cm0, cm1);
611 }
612 }
613
614 /* Bottom channels */
615 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
616 {
617 Ifx_TimerValue x; /* x=period*dutyCycle, x=OnTime+deadTime */
618 Ifx_TimerValue o;
619 Ifx_TimerValue cm0, cm1;
620
621 x = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, tOn[channelIndex + driver->base.channelCount]);
622 o = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, offset[channelIndex + driver->base.channelCount]);
623
624 if (driver->base.inverted != FALSE)
625 {
626 x = period - x;
627 }
628 else
629 {}
630
631 if (x < driver->base.minPulse)
632 {
633 x = 0;
634 }
635 else if (x > driver->base.maxPulse)
636 {
637 x = period;
638 }
639 else
640 {}
641
642 /* Special handling due to GTM issue */
643 if (x == period)
644 { /* 100% duty cycle */
645 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->coutxTemp[channelIndex],
646 period + 2 /* No compare event, issues has been seen with +1 */,
647 2 /* 1st compare event (issue: expected to be 1)*/);
648 }
649 else if (x == 0)
650 {
651 cm0 = 1;
652 cm1 = period + 2;
653 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->coutxTemp[channelIndex], cm0, cm1);
654 }
655 else
656 { /* x% duty cycle */
657 cm1 = 2 + o; // CM1, set to 2 due to a GTM issue. should be 1 according to spec
658 cm0 = o + x; // CM0, set to x+2 due to a GTM issue. should be x+1 according to spec
659 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->coutxTemp[channelIndex], cm0, cm1);
660 }
661 }
662 }
663
664
665 IFX_STATIC void IfxGtm_Atom_PwmHl_updatePulseOff(IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
666 {
667 IFX_UNUSED_PARAMETER(tOn)
668 IFX_UNUSED_PARAMETER(offset)
669
670 IfxGtm_Atom_PwmHl_updateOff(driver, NULL_PTR);
671 }
672
673
674 IFX_STATIC void IfxGtm_Atom_PwmHl_updateShiftCenterAligned(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
675 {
676 uint8 channelIndex;
677 Ifx_TimerValue period;
678 Ifx_TimerValue deadtime = driver->base.deadtime;
679
680 period = driver->timer->base.period;
681
682 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
683 {
684 Ifx_TimerValue x; /* x=period*dutyCycle, x=OnTime+deadTime */
685 Ifx_TimerValue s; /* Shift value */
686 Ifx_TimerValue cm0, cm1;
687 x = tOn[channelIndex];
688
689 if (driver->base.inverted != FALSE)
690 {
691 x = period - x;
692 }
693 else
694 {}
695
696 if ((x < driver->base.minPulse) || (x <= deadtime))
697 { /* For deadtime condition: avoid leading edge of top channel to occur after the trailing edge */
698 x = 0;
699 }
700 else if (x > driver->base.maxPulse)
701 {
702 x = period;
703 }
704 else
705 {}
706
707 /* Special handling due to GTM issue */
708 if (x == period)
709 { /* 100% duty cycle */
710 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccxTemp[channelIndex],
711 period + 1 /* No compare event */,
712 2 /* 1st compare event (issue: expected to be 1)*/ + deadtime);
713 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->coutxTemp[channelIndex],
714 period + 2 /* No compare event, issues has been seen with +1 */,
715 2 /* 1st compare event (issue: expected to be 1)*/);
716 }
717 else if (x == 0)
718 {
719 cm0 = 1;
720 cm1 = period + 2;
721 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccxTemp[channelIndex], cm0, cm1);
722 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->coutxTemp[channelIndex], cm0 + deadtime, cm1);
723 }
724 else
725 { /* x% duty cycle */
726 s = shift[channelIndex];
727
728 if (s > 0)
729 {
730 s = __minX(s, (period - x) / 2 - 1);
731 }
732 else
733 {
734 s = __maxX(s, (x - period) / 2 + 1);
735 }
736
737 cm1 = s + (period - x) / 2; // CM1
738 cm0 = s + (period + x) / 2; // CM0
739 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccxTemp[channelIndex], cm0, cm1 + deadtime);
740 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->coutxTemp[channelIndex], cm0 + deadtime, cm1);
741 }
742 }
743 }
IfxGtm_Atom_Agc_enableChannelsOutput
void IfxGtm_Atom_Agc_enableChannelsOutput(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels output (OUTEN)
Definition: IfxGtm_Atom.c:169
Ifx_ActiveState_high
The signal is high active.
Definition: Ifx_Types.h:116
IfxStdIf_PwmHl_::timer
IfxStdIf_Timer timer
Timer related standard interface.
Definition: IfxStdIf_PwmHl.h:196
Ifx_Pwm_Mode
Ifx_Pwm_Mode
Definition: Ifx_Types.h:175
IfxGtm_Atom_PwmHl_updateAndShiftOff
IFX_STATIC void IfxGtm_Atom_PwmHl_updateAndShiftOff(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets switched to OFF.
Definition: IfxGtm_Atom_PwmHl.c:414
IfxGtm_Atom_Timer_stdIfTimerInit
boolean IfxGtm_Atom_Timer_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxGtm_Atom_Timer *driver)
Initializes the standard interface timer.
Definition: IfxGtm_Atom_Timer.c:381
Ifx_ActiveState_low
The signal is low active.
Definition: Ifx_Types.h:115
IfxGtm_Atom_PwmHl_Config::atom
IfxGtm_Atom atom
ATOM unit used.
Definition: IfxGtm_Atom_PwmHl.h:151
IfxGtm_Atom_PwmHl_init
boolean IfxGtm_Atom_PwmHl_init(IfxGtm_Atom_PwmHl *driver, const IfxGtm_Atom_PwmHl_Config *config)
Initializes the timer object note To ensure that the channels counter are reset by the timer and do n...
Definition: IfxGtm_Atom_PwmHl.c:166
IfxGtm_Atom_PwmHl_updateShiftCenterAligned
IFX_STATIC void IfxGtm_Atom_PwmHl_updateShiftCenterAligned(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Update Shift Center Aligned.
Definition: IfxGtm_Atom_PwmHl.c:674
IfxGtm_Atom_ToutMap::channel
IfxGtm_Atom_Ch channel
ATOM channel index.
Definition: IfxGtm_PinMap.h:113
IfxGtm_Atom_PwmHl_s::updateAndShift
IfxGtm_Atom_PwmHl_UpdateShift updateAndShift
Update shift function for actual selected mode.
Definition: IfxGtm_Atom_PwmHl.h:176
IfxStdIf_PwmHl_::setupChannels
IfxStdIf_PwmHl_SetupChannels setupChannels
IfxStdIf_PwmHl_SetupChannels.
Definition: IfxStdIf_PwmHl.h:194
IfxGtm_Atom_PwmHl_Base::setMode
sint8 setMode
A non zero flag indicates that the PWM mode is being modified.
Definition: IfxGtm_Atom_PwmHl.h:134
IfxGtm_Atom_Timer::atom
Ifx_GTM_ATOM * atom
ATOM used for the timer functionality.
Definition: IfxGtm_Atom_Timer.h:122
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxStdIf_PwmHl_::getMinPulse
IfxStdIf_PwmHl_GetMinPulse getMinPulse
IfxStdIf_PwmHl_GetMinPulse.
Definition: IfxStdIf_PwmHl.h:188
IfxGtm_Atom_PwmHl_Config
GTM ATOM: PWM HL configuration.
Definition: IfxGtm_Atom_PwmHl.h:147
IfxGtm_Atom_Timer::gtm
Ifx_GTM * gtm
GTM module used for the timer functionality.
Definition: IfxGtm_Atom_Timer.h:121
IfxStdIf_PwmHl_::getDeadtime
IfxStdIf_PwmHl_GetDeadtime getDeadtime
IfxStdIf_PwmHl_GetDeadtime.
Definition: IfxStdIf_PwmHl.h:185
IfxGtm_Atom_Agc_setChannelsForceUpdate
void IfxGtm_Atom_Agc_setChannelsForceUpdate(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
Enable/disable one or more channels for the force update feature (FUPD)
Definition: IfxGtm_Atom.c:235
IfxGtm_Atom_PwmHl.h
GTM PWMHL details.
Ifx_Pwm_Mode_centerAligned
Center aligned mode.
Definition: Ifx_Types.h:177
memset
void * memset(void *s, int c, syze_t n)
IfxStdIf_Timer_tickToS
IFX_INLINE float32 IfxStdIf_Timer_tickToS(float32 clockFreq, Ifx_TimerValue ticks)
Convert timer ticks to seconds.
Definition: IfxStdIf_Timer.h:435
IfxGtm_Atom_Ch_getClockSource
IfxGtm_Cmu_Clk IfxGtm_Atom_Ch_getClockSource(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the channel clock source.
Definition: IfxGtm_Atom.c:306
IfxGtm_Atom_PwmHl_initConfig
void IfxGtm_Atom_PwmHl_initConfig(IfxGtm_Atom_PwmHl_Config *config)
Initialize the configuration structure to default.
Definition: IfxGtm_Atom_PwmHl.c:262
IfxStdIf_PwmHl_SetupChannels
void(* IfxStdIf_PwmHl_SetupChannels)(IfxStdIf_InterfaceDriver stdIf, boolean *activeCh, boolean *stuckSt)
Set channels which are generating PWM or in "stuck-at" state.
Definition: IfxStdIf_PwmHl.h:175
IfxStdIf_PwmHl_GetMode
Ifx_Pwm_Mode(* IfxStdIf_PwmHl_GetMode)(IfxStdIf_InterfaceDriver stdIf)
Return the PWM mode.
Definition: IfxStdIf_PwmHl.h:125
IfxStdIf_PwmHl_initConfig
void IfxStdIf_PwmHl_initConfig(IfxStdIf_PwmHl_Config *config)
Definition: IfxStdIf_PwmHl.c:45
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS
#define IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS
Maximal number of channels handled by the driver. One channel has a top and bottom pwm output...
Definition: IfxGtm_Atom_PwmHl.h:106
IfxGtm_Atom_Timer::timerChannel
IfxGtm_Atom_Ch timerChannel
ATOM channel used for the timer.
Definition: IfxGtm_Atom_Timer.h:125
IfxGtm_Atom_Timer
TOM Timer interface.
Definition: IfxGtm_Atom_Timer.h:118
IfxStdIf_Timer_sToTick
IFX_INLINE Ifx_TimerValue IfxStdIf_Timer_sToTick(float32 clockFreq, float32 seconds)
Convert seconds to timer ticks.
Definition: IfxStdIf_Timer.h:446
float32
float float32
Definition: Platform_Types.h:170
IfxGtm_Atom_Ch_configurePwmMode
void IfxGtm_Atom_Ch_configurePwmMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock, Ifx_ActiveState activeState, IfxGtm_Atom_Ch_ResetEvent resetEvent, IfxGtm_Atom_Ch_OutputTrigger trigger)
Definition: IfxGtm_Atom.c:278
Ifx_Assert.h
Assert functions.
IfxGtm_Atom_PwmHl_updateEdgeAligned
IFX_STATIC void IfxGtm_Atom_PwmHl_updateEdgeAligned(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in edge aligned modes (left and right aligned)
Definition: IfxGtm_Atom_PwmHl.c:482
IfxStdIf_PwmHl_::setPulse
IfxStdIf_PwmHl_SetPulse setPulse
IfxStdIf_PwmHl_Pulse.
Definition: IfxStdIf_PwmHl.h:193
IfxGtm_Atom_PwmHl_s::timer
IfxGtm_Atom_Timer * timer
Pointer to the linked timer object.
Definition: IfxGtm_Atom_PwmHl.h:174
IfxGtm_Atom_PwmHl_setMode
boolean IfxGtm_Atom_PwmHl_setMode(IfxGtm_Atom_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate()
Definition: IfxGtm_Atom_PwmHl.c:293
__maxX
#define __maxX
Definition: IfxCpu_IntrinsicsDcc.h:1597
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:113
IfxGtm_Atom_PwmHl_s::ccxTemp
IfxGtm_Atom_Ch * ccxTemp
cached value
Definition: IfxGtm_Atom_PwmHl.h:182
IfxGtm_Atom_PwmHl_Base::maxPulse
Ifx_TimerValue maxPulse
internal parameter
Definition: IfxGtm_Atom_PwmHl.h:132
IfxGtm_Atom_PwmHl_Base
Multi-channels PWM object definition (channels only)
Definition: IfxGtm_Atom_PwmHl.h:128
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxStdIf_PwmHl_Config::deadtime
float32 deadtime
Dead time between the top and bottom channels in seconds.
Definition: IfxStdIf_PwmHl.h:202
IfxGtm_Atom_Ch_setCompareShadow
IFX_INLINE void IfxGtm_Atom_Ch_setCompareShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowZero, uint32 shadowOne)
Sets the compare 0 and 1 shadow values.
Definition: IfxGtm_Atom.h:637
IfxGtm_Atom_PwmHl_s::agc
Ifx_GTM_ATOM_AGC * agc
AGC unit used.
Definition: IfxGtm_Atom_PwmHl.h:179
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxStdIf_PwmHl_::driver
IfxStdIf_InterfaceDriver driver
Interface driver object.
Definition: IfxStdIf_PwmHl.h:181
IfxGtm_Atom_PwmHl_Base::coutxActiveState
Ifx_ActiveState coutxActiveState
Bottom PWM active state.
Definition: IfxGtm_Atom_PwmHl.h:136
IfxGtm_Atom_Timer_addToChannelMask
void IfxGtm_Atom_Timer_addToChannelMask(IfxGtm_Atom_Timer *driver, IfxGtm_Atom_Ch channel)
Add a channel to the channel mask Channels present in the mask are started, stopped, updated at the same time as the timer: IfxGtm_Atom_Timer_applyUpdate, IfxGtm_Atom_Timer_disableUpdate, IfxGtm_Atom_Timer_stop, IfxGtm_Atom_Timer_run.
Definition: IfxGtm_Atom_Timer.c:88
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxGtm_Atom_PwmHl_invertActiveState
IFX_INLINE Ifx_ActiveState IfxGtm_Atom_PwmHl_invertActiveState(Ifx_ActiveState activeState)
Inverts the active state.
Definition: IfxGtm_Atom_PwmHl.c:138
IfxGtm_Atom_PwmHl_setupChannels
void IfxGtm_Atom_PwmHl_setupChannels(IfxGtm_Atom_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set up channels.
Definition: IfxGtm_Atom_PwmHl.c:380
IfxStdIf_PwmHl_SetPulse
void(* IfxStdIf_PwmHl_SetPulse)(IfxStdIf_InterfaceDriver stdIf, float32 *tOn, float32 *offset)
Set the pwm pulse of all switched independently.
Definition: IfxStdIf_PwmHl.h:156
IfxGtm_Atom_Agc_enableChannels
void IfxGtm_Atom_Agc_enableChannels(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels (ENDIS)
Definition: IfxGtm_Atom.c:151
IfxGtm_Atom_PwmHl_Config::base
IfxStdIf_PwmHl_Config base
PWM HL standard interface configuration.
Definition: IfxGtm_Atom_PwmHl.h:149
Ifx_Pwm_Mode_leftAligned
Left aligned mode. The PWM period starts with a rising edge.
Definition: Ifx_Types.h:179
IfxStdIf_PwmHl_GetMinPulse
float32(* IfxStdIf_PwmHl_GetMinPulse)(IfxStdIf_InterfaceDriver stdIf)
Return the minimum pulse time in s.
Definition: IfxStdIf_PwmHl.h:117
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxGtm_Atom_PwmHl_s::coutx
IfxGtm_Atom_Ch coutx[IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS]
ATOM channels used for the OUTX outputs.
Definition: IfxGtm_Atom_PwmHl.h:181
IfxStdIf_PwmHl_Config::outputDriver
IfxPort_PadDriver outputDriver
Output pad driver of ccx and coutx pins.
Definition: IfxStdIf_PwmHl.h:208
IfxStdIf_PwmHl_Config::ccxActiveState
Ifx_ActiveState ccxActiveState
Top PWM active state.
Definition: IfxStdIf_PwmHl.h:211
Ifx_Pwm_Mode_init
Initialisation mode, do not use at run time.
Definition: Ifx_Types.h:182
IfxGtm_Atom_PwmHl_stdIfPwmHlInit
boolean IfxGtm_Atom_PwmHl_stdIfPwmHlInit(IfxStdIf_PwmHl *stdif, IfxGtm_Atom_PwmHl *driver)
Initialises the statndard interface Pwm.
Definition: IfxGtm_Atom_PwmHl.c:389
IfxGtm_Atom_PwmHl_s::base
IfxGtm_Atom_PwmHl_Base base
Multi-channels PWM object definition (channels only)
Definition: IfxGtm_Atom_PwmHl.h:173
IfxGtm_Atom_Ch_OutputTrigger_forward
Forward the trigger from the previous channel.
Definition: IfxGtm_Atom.h:79
IfxStdIf_PwmHl_
Standard interface object.
Definition: IfxStdIf_PwmHl.h:179
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:50
Ifx_Pwm_Mode_off
All switch open.
Definition: Ifx_Types.h:181
IfxGtm_Atom_Ch_ResetEvent_onTrigger
Definition: IfxGtm_Atom.h:88
__minX
#define __minX
Definition: IfxCpu_IntrinsicsDcc.h:1593
IfxStdIf_PwmHl_::setOnTime
IfxStdIf_PwmHl_SetOnTime setOnTime
IfxStdIf_PwmHl_SetOnTime.
Definition: IfxStdIf_PwmHl.h:191
IfxGtm_Atom_PwmHl_getMode
Ifx_Pwm_Mode IfxGtm_Atom_PwmHl_getMode(IfxGtm_Atom_PwmHl *driver)
Returns Pwm mode.
Definition: IfxGtm_Atom_PwmHl.c:160
IfxStdIf_PwmHl_SetMinPulse
boolean(* IfxStdIf_PwmHl_SetMinPulse)(IfxStdIf_InterfaceDriver stdIf, float32 minPulse)
Set the minimum pulse time in s.
Definition: IfxStdIf_PwmHl.h:109
IfxGtm_Atom_PwmHl_getMinPulse
float32 IfxGtm_Atom_PwmHl_getMinPulse(IfxGtm_Atom_PwmHl *driver)
Returns the minimum pulse.
Definition: IfxGtm_Atom_PwmHl.c:154
IfxGtm_Atom_PwmHl_getDeadtime
float32 IfxGtm_Atom_PwmHl_getDeadtime(IfxGtm_Atom_PwmHl *driver)
Returns the dead time.
Definition: IfxGtm_Atom_PwmHl.c:148
IfxGtm_Atom_PwmHl_s::updatePulse
IfxGtm_Atom_PwmHl_UpdatePulse updatePulse
Update pulse function for actual selected mode.
Definition: IfxGtm_Atom_PwmHl.h:177
IfxGtm_Cmu_Clk
IfxGtm_Cmu_Clk
Definition: IfxGtm_Cmu.h:64
IfxStdIf_PwmHl_Config::minPulse
float32 minPulse
Min pulse allowed as active state for the top and bottom PWM in seconds.
Definition: IfxStdIf_PwmHl.h:203
Ifx_Pwm_Mode_centerAlignedInverted
Center aligned inverted aligned mode.
Definition: Ifx_Types.h:178
IfxGtm_Atom_PwmHl_setPulse
void IfxGtm_Atom_PwmHl_setPulse(IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
Sets the ON time and offset, all switched are independent.
Definition: IfxGtm_Atom_PwmHl.c:374
IfxGtm_Atom_Timer_Base::clockFreq
float32 clockFreq
Timer input clock frequency (cached value)
Definition: IfxGtm_Atom_Timer.h:108
IfxGtm_Atom_PwmHl_updateCenterAligned
IFX_STATIC void IfxGtm_Atom_PwmHl_updateCenterAligned(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in center aligned and center aligned inverted modes.
Definition: IfxGtm_Atom_PwmHl.c:422
IfxStdIf_PwmHl_::setMode
IfxStdIf_PwmHl_SetMode setMode
IfxStdIf_PwmHl_SetMode.
Definition: IfxStdIf_PwmHl.h:190
Ifx_Pwm_Mode_rightAligned
Right aligned mode. The PWM period starts with a falling edge.
Definition: Ifx_Types.h:180
IfxStdIf_PwmHl_Config::outputMode
IfxPort_OutputMode outputMode
Output mode of ccx and coutx pins.
Definition: IfxStdIf_PwmHl.h:207
IfxGtm_Atom_PwmHl_s::ccx
IfxGtm_Atom_Ch ccx[IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS]
ATOM channels used for the CCCX outputs.
Definition: IfxGtm_Atom_PwmHl.h:180
IfxGtm_Atom_PwmHl_Base::ccxActiveState
Ifx_ActiveState ccxActiveState
Top PWM active state.
Definition: IfxGtm_Atom_PwmHl.h:135
IfxStdIf_PwmHl_SetDeadtime
boolean(* IfxStdIf_PwmHl_SetDeadtime)(IfxStdIf_InterfaceDriver stdIf, float32 deadtime)
Set the dead time in s.
Definition: IfxStdIf_PwmHl.h:86
IfxGtm_Atom_Ch_setSignalLevel
void IfxGtm_Atom_Ch_setSignalLevel(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, Ifx_ActiveState activeState)
Sets the signal level.
Definition: IfxGtm_Atom.c:505
IfxGtm_Atom_PwmHl_updatePulse
IFX_STATIC void IfxGtm_Atom_PwmHl_updatePulse(IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
Update Pulse.
Definition: IfxGtm_Atom_PwmHl.c:558
IfxGtm_Atom_Timer::base
IfxGtm_Atom_Timer_Base base
Timer base structure.
Definition: IfxGtm_Atom_Timer.h:120
IfxGtm_Atom_PwmHl_setOnTime
void IfxGtm_Atom_PwmHl_setOnTime(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Sets the ON time.
Definition: IfxGtm_Atom_PwmHl.c:362
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxStdIf_PwmHl_Config::channelCount
uint8 channelCount
Number of PWM channels, one channel is made of a top and bottom channel.
Definition: IfxStdIf_PwmHl.h:204
IfxGtm_Atom_0
ATOM object 0.
Definition: IfxGtm_cfg.h:245
IfxGtm_Atom_PwmHl_setDeadtime
boolean IfxGtm_Atom_PwmHl_setDeadtime(IfxGtm_Atom_PwmHl *driver, float32 deadtime)
Sets the dead time.
Definition: IfxGtm_Atom_PwmHl.c:273
IfxStdIf_PwmHl_::setMinPulse
IfxStdIf_PwmHl_SetMinPulse setMinPulse
IfxStdIf_PwmHl_SetMinPulse.
Definition: IfxStdIf_PwmHl.h:187
IfxGtm_Atom_PwmHl_updatePulseOff
IFX_STATIC void IfxGtm_Atom_PwmHl_updatePulseOff(IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
Set Pulse to OFF.
Definition: IfxGtm_Atom_PwmHl.c:665
IfxGtm_Atom_PwmHl_setMinPulse
boolean IfxGtm_Atom_PwmHl_setMinPulse(IfxGtm_Atom_PwmHl *driver, float32 minPulse)
Sets the minimum pulse.
Definition: IfxGtm_Atom_PwmHl.c:282
IfxStdIf_PwmHl_::setOnTimeAndShift
IfxStdIf_PwmHl_SetOnTimeAndShift setOnTimeAndShift
IfxStdIf_PwmHl_SetOnTime.
Definition: IfxStdIf_PwmHl.h:192
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxGtm_Atom_PwmHl_s::update
IfxGtm_Atom_PwmHl_Update update
Update function for actual selected mode.
Definition: IfxGtm_Atom_PwmHl.h:175
IfxStdIf_PwmHl_SetOnTime
void(* IfxStdIf_PwmHl_SetOnTime)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue *tOn)
Set the pwm ON time.
Definition: IfxStdIf_PwmHl.h:140
IfxGtm_Atom_PwmHl_Config::initPins
boolean initPins
TRUE: Initialize pins in driver FALSE: Don&#39;t initialize pins in driver. User handles separately...
Definition: IfxGtm_Atom_PwmHl.h:154
IfxGtm_Atom_PwmHl_Base::mode
Ifx_Pwm_Mode mode
actual PWM mode
Definition: IfxGtm_Atom_PwmHl.h:133
IfxStdIf_PwmHl_::getMode
IfxStdIf_PwmHl_GetMode getMode
IfxStdIf_PwmHl_GetMode.
Definition: IfxStdIf_PwmHl.h:189
IfxGtm_Atom_PwmHl_modes
IFX_STATIC IFX_CONST IfxGtm_Atom_PwmHl_Mode IfxGtm_Atom_PwmHl_modes[Ifx_Pwm_Mode_off+1]
Definition: IfxGtm_Atom_PwmHl.c:126
IfxGtm_Atom_PwmHl_s::coutxTemp
IfxGtm_Atom_Ch * coutxTemp
cached value
Definition: IfxGtm_Atom_PwmHl.h:183
IfxGtm_Atom_Timer_Base::period
Ifx_TimerValue period
Timer period in ticks (cached value)
Definition: IfxGtm_Atom_Timer.h:106
IfxGtm_Atom_PwmHl_Config::ccx
IFX_CONST IfxGtm_Atom_ToutMapP * ccx
Pointer to an array of size pwmHl.channels.channelCount containing the channels used. Channels must be adjacent channels.
Definition: IfxGtm_Atom_PwmHl.h:152
IfxGtm_Atom_PwmHl_Base::minPulse
Ifx_TimerValue minPulse
minimum pulse that is output, shorter pulse time will be output as 0% duty cycle
Definition: IfxGtm_Atom_PwmHl.h:131
IfxStdIf_PwmHl_SetOnTimeAndShift
void(* IfxStdIf_PwmHl_SetOnTimeAndShift)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Set the pwm ON time and shift value.
Definition: IfxStdIf_PwmHl.h:148
IfxStdIf_PwmHl_GetDeadtime
float32(* IfxStdIf_PwmHl_GetDeadtime)(IfxStdIf_InterfaceDriver stdIf)
Return the dead time in s.
Definition: IfxStdIf_PwmHl.h:94
IfxStdIf_PwmHl_::setDeadtime
IfxStdIf_PwmHl_SetDeadtime setDeadtime
IfxStdIf_PwmHl_SetDeadtime.
Definition: IfxStdIf_PwmHl.h:184
IfxGtm_Atom_PwmHl_Base::channelCount
uint8 channelCount
Number of PWM channels, one channel is made of a top and bottom channel.
Definition: IfxGtm_Atom_PwmHl.h:138
IfxGtm_Atom_Agc_trigger
void IfxGtm_Atom_Agc_trigger(Ifx_GTM_ATOM_AGC *agc)
Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG)
Definition: IfxGtm_Atom.c:256
IfxGtm_Atom_PwmHl_Base::deadtime
Ifx_TimerValue deadtime
Dead time between the top and bottom channel in ticks.
Definition: IfxGtm_Atom_PwmHl.h:130
IfxGtm_Atom_PwmHl_Base::inverted
boolean inverted
Flag indicating the center aligned inverted mode (TRUE)
Definition: IfxGtm_Atom_PwmHl.h:137
IfxGtm_Atom_PwmHl_Mode
Structure for PWM configuration.
Definition: IfxGtm_Atom_PwmHl.h:160
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxStdIf_PwmHl_Config::coutxActiveState
Ifx_ActiveState coutxActiveState
Bottom PWM active state.
Definition: IfxStdIf_PwmHl.h:212
IfxGtm_Atom_PwmHl_Config::coutx
IFX_CONST IfxGtm_Atom_ToutMapP * coutx
Pointer to an array of size pwmHl.channels.channelCount containing the channels used. Channels must be adjacent channels.
Definition: IfxGtm_Atom_PwmHl.h:153
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
IfxGtm_Atom_PwmHl_s
GTM ATOM PWM driver.
Definition: IfxGtm_Atom_PwmHl.h:171
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxGtm_Atom_PwmHl_s::atom
Ifx_GTM_ATOM * atom
ATOM unit used.
Definition: IfxGtm_Atom_PwmHl.h:178
IfxGtm_Atom_PwmHl_setOnTimeAndShift
void IfxGtm_Atom_PwmHl_setOnTimeAndShift(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets the ON time and Shift.
Definition: IfxGtm_Atom_PwmHl.c:368
IfxGtm_Atom_PwmHl_updateOff
IFX_STATIC void IfxGtm_Atom_PwmHl_updateOff(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Set the outputs to inactive.
Definition: IfxGtm_Atom_PwmHl.c:542
IfxStdIf_PwmHl_SetMode
boolean(* IfxStdIf_PwmHl_SetMode)(IfxStdIf_InterfaceDriver stdIf, Ifx_Pwm_Mode mode)
Set the pwm mode.
Definition: IfxStdIf_PwmHl.h:133
IfxGtm_Atom_Ch
IfxGtm_Atom_Ch
Enum for ATOM channels.
Definition: IfxGtm_cfg.h:258
IfxGtm_PinMap_setAtomTout
void IfxGtm_PinMap_setAtomTout(IfxGtm_Atom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Definition: IfxGtm_PinMap.c:2408


iLLD_TC38A: IfxGtm_Atom_PwmHl.h Source File

  • Gtm
  • Atom
  • PwmHl
IfxGtm_Atom_PwmHl.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Atom_PwmHl.h
3 * \brief GTM PWMHL details
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Gtm_Atom_PwmHl_Usage How to use the GTM ATOM PWM Driver
42 * \ingroup IfxLld_Gtm_Atom_PwmHl
43 *
44 * This driver implements the PWM functionalities as defined by \ref library_srvsw_stdif_pwmhl.
45 * The user is free to use either the driver specific APIs below or to used the \ref library_srvsw_stdif_pwmhl "standard interface APIs".
46 *
47 * \section Specific Specific implementation
48 * Implementation is similar to \ref IfxLld_Gtm_Tom_PwmHl
49 *
50 * \todo add documentation
51 *
52 * For a detailed configuration of the microcontroller, see \ref IfxGtm_Atom_PwmHl_init().
53 *
54 * \section Example Usage example
55 * Initialisation is done by, e.g:
56 * \code
57 * IfxGtm_Atom_PwmHl_Config driverConfig;
58 * IfxGtm_Atom_PwmHl driverData;
59 * IfxStdIf_PwmHl pwmhl;
60 * IfxGtm_Atom_PwmHl_initConfig(&driverConfig, &MODULE_GTM);
61 * IfxGtm_Atom_PwmHl_init(&driverData, &driverConfig);
62 * IfxGtm_Atom_PwmHl_stdIfPwmHlInit(pwmhl, &driverData);
63 * \endcode
64 *
65 * During run-time, \ref library_srvsw_stdif_pwmhl "the interface functions" shall be used, e.g.:
66 * \code
67 * IfxStdIf_Timer* timer = IfxStdIf_PwmHl_getTimer(pwmhl);
68 * Ifx_TimerValue onTime[3]; // assume configured for three HL channels
69 *
70 * onTime[0] = 10;
71 * onTime[1] = 20;
72 * onTime[2] = 30;
73 *
74 * IfxStdIf_Timer_disableUpdate(timer);
75 * IfxStdIf_Timer_setPeriod(timer, period);
76 * IfxStdIf_PwmHl_setOnTime(pwmhl, onTime);
77 * IfxStdIf_Timer_applyUpdate(timer);
78 * \endcode
79 *
80 * \defgroup IfxLld_Gtm_Atom_PwmHl ATOM PWM HL Interface Driver
81 * \ingroup IfxLld_Gtm_Atom
82 * \defgroup IfxLld_Gtm_Atom_PwmHl_Data_Structures Data Structures
83 * \ingroup IfxLld_Gtm_Atom_PwmHl
84 * \defgroup IfxLld_Gtm_Atom_PwmHl_Functions PwmHl Functions
85 * \ingroup IfxLld_Gtm_Atom_PwmHl
86 * \defgroup IfxLld_Gtm_Atom_PwmHl_PwmHl_StdIf_Functions PwmHl StdIf Functions
87 * \ingroup IfxLld_Gtm_Atom_PwmHl
88 */
89
90 #ifndef IFXGTM_ATOM_PWMHL_H
91 #define IFXGTM_ATOM_PWMHL_H 1
92
93 /******************************************************************************/
94 /*----------------------------------Includes----------------------------------*/
95 /******************************************************************************/
96
97 #include "StdIf/IfxStdIf_PwmHl.h"
98 #include "Gtm/Atom/Timer/IfxGtm_Atom_Timer.h"
99
100 /******************************************************************************/
101 /*-----------------------------------Macros-----------------------------------*/
102 /******************************************************************************/
103
104 /** \brief Maximal number of channels handled by the driver. One channel has a top and bottom pwm output
105 */
106 #define IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS (8)
107
108 /******************************************************************************/
109 /*------------------------------Type Definitions------------------------------*/
110 /******************************************************************************/
111
112 typedef struct IfxGtm_Atom_PwmHl_s IfxGtm_Atom_PwmHl;
113
114 typedef void (*IfxGtm_Atom_PwmHl_Update)(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn);
115
116 typedef void (*IfxGtm_Atom_PwmHl_UpdateShift)(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift);
117
118 typedef void (*IfxGtm_Atom_PwmHl_UpdatePulse)(IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset);
119
120 /******************************************************************************/
121 /*-----------------------------Data Structures--------------------------------*/
122 /******************************************************************************/
123
124 /** \addtogroup IfxLld_Gtm_Atom_PwmHl_Data_Structures
125 * \{ */
126 /** \brief Multi-channels PWM object definition (channels only)
127 */
128 typedef struct
129 {
130 Ifx_TimerValue deadtime; /**< \brief Dead time between the top and bottom channel in ticks */
131 Ifx_TimerValue minPulse; /**< \brief minimum pulse that is output, shorter pulse time will be output as 0% duty cycle */
132 Ifx_TimerValue maxPulse; /**< \brief internal parameter */
133 Ifx_Pwm_Mode mode; /**< \brief actual PWM mode */
134 sint8 setMode; /**< \brief A non zero flag indicates that the PWM mode is being modified */
135 Ifx_ActiveState ccxActiveState; /**< \brief Top PWM active state */
136 Ifx_ActiveState coutxActiveState; /**< \brief Bottom PWM active state */
137 boolean inverted; /**< \brief Flag indicating the center aligned inverted mode (TRUE) */
138 uint8 channelCount; /**< \brief Number of PWM channels, one channel is made of a top and bottom channel */
139 } IfxGtm_Atom_PwmHl_Base;
140
141 /** \} */
142
143 /** \addtogroup IfxLld_Gtm_Atom_PwmHl_Data_Structures
144 * \{ */
145 /** \brief GTM ATOM: PWM HL configuration
146 */
147 typedef struct
148 {
149 IfxStdIf_PwmHl_Config base; /**< \brief PWM HL standard interface configuration */
150 IfxGtm_Atom_Timer *timer; /**< \brief Pointer to the linked timer object */
151 IfxGtm_Atom atom; /**< \brief ATOM unit used */
152 IFX_CONST IfxGtm_Atom_ToutMapP *ccx; /**< \brief Pointer to an array of size pwmHl.channels.channelCount containing the channels used. Channels must be adjacent channels */
153 IFX_CONST IfxGtm_Atom_ToutMapP *coutx; /**< \brief Pointer to an array of size pwmHl.channels.channelCount containing the channels used. Channels must be adjacent channels */
154 boolean initPins; /**< \brief TRUE: Initialize pins in driver
155 * FALSE: Don't initialize pins in driver. User handles separately. */
156 } IfxGtm_Atom_PwmHl_Config;
157
158 /** \brief Structure for PWM configuration
159 */
160 typedef struct
161 {
162 Ifx_Pwm_Mode mode; /**< \brief Pwm Mode */
163 boolean inverted; /**< \brief Inverted configuration for the selected mode */
164 IfxGtm_Atom_PwmHl_Update update; /**< \brief update call back function for the selected mode */
165 IfxGtm_Atom_PwmHl_UpdateShift updateAndShift; /**< \brief update shift call back function for the selected mode */
166 IfxGtm_Atom_PwmHl_UpdatePulse updatePulse; /**< \brief update pulse call back function for the selected mode */
167 } IfxGtm_Atom_PwmHl_Mode;
168
169 /** \brief GTM ATOM PWM driver
170 */
171 struct IfxGtm_Atom_PwmHl_s
172 {
173 IfxGtm_Atom_PwmHl_Base base; /**< \brief Multi-channels PWM object definition (channels only) */
174 IfxGtm_Atom_Timer *timer; /**< \brief Pointer to the linked timer object */
175 IfxGtm_Atom_PwmHl_Update update; /**< \brief Update function for actual selected mode */
176 IfxGtm_Atom_PwmHl_UpdateShift updateAndShift; /**< \brief Update shift function for actual selected mode */
177 IfxGtm_Atom_PwmHl_UpdatePulse updatePulse; /**< \brief Update pulse function for actual selected mode */
178 Ifx_GTM_ATOM *atom; /**< \brief ATOM unit used */
179 Ifx_GTM_ATOM_AGC *agc; /**< \brief AGC unit used */
180 IfxGtm_Atom_Ch ccx[IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS]; /**< \brief ATOM channels used for the CCCX outputs */
181 IfxGtm_Atom_Ch coutx[IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS]; /**< \brief ATOM channels used for the OUTX outputs */
182 IfxGtm_Atom_Ch *ccxTemp; /**< \brief cached value */
183 IfxGtm_Atom_Ch *coutxTemp; /**< \brief cached value */
184 };
185
186 /** \} */
187
188 /** \addtogroup IfxLld_Gtm_Atom_PwmHl_Functions
189 * \{ */
190
191 /******************************************************************************/
192 /*-------------------------Global Function Prototypes-------------------------*/
193 /******************************************************************************/
194
195 /** \brief Initializes the timer object
196 * note To ensure that the channels counter are reset by the timer and do not overflow, leading to random signal on the output, the timer must be started before the call to this function.
197 * \param driver GTM ATOM PWM driver
198 * \param config GTM ATOM: PWM HL configuration
199 * \return TRUE on success else FALSE
200 */
201 IFX_EXTERN boolean IfxGtm_Atom_PwmHl_init(IfxGtm_Atom_PwmHl *driver, const IfxGtm_Atom_PwmHl_Config *config);
202
203 /** \brief Initialize the configuration structure to default
204 * \param config Channel configuration. This parameter is Initialised by the function
205 * \return None
206 */
207 IFX_EXTERN void IfxGtm_Atom_PwmHl_initConfig(IfxGtm_Atom_PwmHl_Config *config);
208
209 /** \} */
210
211 /** \addtogroup IfxLld_Gtm_Atom_PwmHl_PwmHl_StdIf_Functions
212 * \{ */
213
214 /******************************************************************************/
215 /*-------------------------Global Function Prototypes-------------------------*/
216 /******************************************************************************/
217
218 /** \brief Returns the dead time
219 * \see IfxStdIf_PwmHl_GetDeadtime
220 * \param driver GTM ATOM PWM driver
221 * \return Dead Time
222 */
223 IFX_EXTERN float32 IfxGtm_Atom_PwmHl_getDeadtime(IfxGtm_Atom_PwmHl *driver);
224
225 /** \brief Returns the minimum pulse
226 * \see IfxStdIf_PwmHl_GetMinPulse
227 * \param driver GTM ATOM PWM driver
228 * \return Min Pulse
229 */
230 IFX_EXTERN float32 IfxGtm_Atom_PwmHl_getMinPulse(IfxGtm_Atom_PwmHl *driver);
231
232 /** \brief Returns Pwm mode
233 * \see IfxStdIf_PwmHl_GetMode
234 * \param driver GTM ATOM PWM driver
235 * \return Pwm mode
236 */
237 IFX_EXTERN Ifx_Pwm_Mode IfxGtm_Atom_PwmHl_getMode(IfxGtm_Atom_PwmHl *driver);
238
239 /** \brief Sets the dead time
240 * \see IfxStdIf_PwmHl_SetDeadtime
241 * \param driver GTM ATOM PWM driver
242 * \param deadtime Dead time value
243 * \return TRUE on success else FALSE
244 */
245 IFX_EXTERN boolean IfxGtm_Atom_PwmHl_setDeadtime(IfxGtm_Atom_PwmHl *driver, float32 deadtime);
246
247 /** \brief Sets the minimum pulse
248 * \see IfxStdIf_PwmHl_SetMinPulse
249 * \param driver GTM ATOM PWM driver
250 * \param minPulse Minimum pulse
251 * \return TRUE on success else FALSE
252 */
253 IFX_EXTERN boolean IfxGtm_Atom_PwmHl_setMinPulse(IfxGtm_Atom_PwmHl *driver, float32 minPulse);
254
255 /** \brief Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate()
256 * \see IfxStdIf_PwmHl_SetMode
257 * \param driver GTM ATOM PWM driver
258 * \param mode Pwm mode
259 * \return TRUE on success else FALSE
260 */
261 IFX_EXTERN boolean IfxGtm_Atom_PwmHl_setMode(IfxGtm_Atom_PwmHl *driver, Ifx_Pwm_Mode mode);
262
263 /** \brief Sets the ON time
264 * \see IfxStdIf_PwmHl_SetOnTime
265 * \param driver GTM ATOM PWM driver
266 * \param tOn ON time
267 * \return None
268 */
269 IFX_EXTERN void IfxGtm_Atom_PwmHl_setOnTime(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn);
270
271 /** \brief Sets the ON time and Shift
272 * \param driver GTM ATOM PWM driver
273 * \param tOn ON time
274 * \param shift Shift value in ticks
275 * \return None
276 */
277 IFX_EXTERN void IfxGtm_Atom_PwmHl_setOnTimeAndShift(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift);
278
279 /** \brief Sets the ON time and offset, all switched are independent
280 * \param driver GTM ATOM PWM driver
281 * \param tOn ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
282 * \param offset Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
283 * \return None
284 */
285 IFX_EXTERN void IfxGtm_Atom_PwmHl_setPulse(IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset);
286
287 /** \brief Set up channels
288 * \see IfxStdIf_PwmHl_SetupChannels
289 * \param driver GTM ATOM PWM driver
290 * \param activeCh Active channel
291 * \param stuckSt Stuck state
292 * \return None
293 */
294 IFX_EXTERN void IfxGtm_Atom_PwmHl_setupChannels(IfxGtm_Atom_PwmHl *driver, boolean *activeCh, boolean *stuckSt);
295
296 /** \brief Initialises the statndard interface Pwm
297 * \param stdif Standard interface object, will be initialized by the function
298 * \param driver Interface driver to be used by the standard interface. must be initialised separately
299 * \return TRUE on success else FALSE
300 */
301 IFX_EXTERN boolean IfxGtm_Atom_PwmHl_stdIfPwmHlInit(IfxStdIf_PwmHl *stdif, IfxGtm_Atom_PwmHl *driver);
302
303 /** \} */
304
305 #endif /* IFXGTM_ATOM_PWMHL_H */
Ifx_Pwm_Mode
Ifx_Pwm_Mode
Definition: Ifx_Types.h:175
IfxGtm_Atom_PwmHl_Config::atom
IfxGtm_Atom atom
ATOM unit used.
Definition: IfxGtm_Atom_PwmHl.h:151
IfxGtm_Atom_PwmHl_init
IFX_EXTERN boolean IfxGtm_Atom_PwmHl_init(IfxGtm_Atom_PwmHl *driver, const IfxGtm_Atom_PwmHl_Config *config)
Initializes the timer object note To ensure that the channels counter are reset by the timer and do n...
Definition: IfxGtm_Atom_PwmHl.c:166
IfxGtm_Atom_PwmHl_Mode::updateAndShift
IfxGtm_Atom_PwmHl_UpdateShift updateAndShift
update shift call back function for the selected mode
Definition: IfxGtm_Atom_PwmHl.h:165
IfxGtm_Atom_PwmHl_Base::setMode
sint8 setMode
A non zero flag indicates that the PWM mode is being modified.
Definition: IfxGtm_Atom_PwmHl.h:134
IfxGtm_Atom_PwmHl_Config
GTM ATOM: PWM HL configuration.
Definition: IfxGtm_Atom_PwmHl.h:147
IfxGtm_Atom_PwmHl_UpdatePulse
void(* IfxGtm_Atom_PwmHl_UpdatePulse)(IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
Definition: IfxGtm_Atom_PwmHl.h:118
IfxGtm_Atom_Timer.h
GTM TIMER details.
IfxGtm_Atom_PwmHl_initConfig
IFX_EXTERN void IfxGtm_Atom_PwmHl_initConfig(IfxGtm_Atom_PwmHl_Config *config)
Initialize the configuration structure to default.
Definition: IfxGtm_Atom_PwmHl.c:262
IfxGtm_Atom_PwmHl_Update
void(* IfxGtm_Atom_PwmHl_Update)(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Definition: IfxGtm_Atom_PwmHl.h:114
IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS
#define IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS
Maximal number of channels handled by the driver. One channel has a top and bottom pwm output...
Definition: IfxGtm_Atom_PwmHl.h:106
IfxGtm_Atom_Timer
TOM Timer interface.
Definition: IfxGtm_Atom_Timer.h:118
float32
float float32
Definition: Platform_Types.h:170
IfxGtm_Atom
IfxGtm_Atom
Enum for ATOM objects.
Definition: IfxGtm_cfg.h:243
IfxGtm_Atom_PwmHl_Config::timer
IfxGtm_Atom_Timer * timer
Pointer to the linked timer object.
Definition: IfxGtm_Atom_PwmHl.h:150
IfxGtm_Atom_PwmHl_setMode
IFX_EXTERN boolean IfxGtm_Atom_PwmHl_setMode(IfxGtm_Atom_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate()
Definition: IfxGtm_Atom_PwmHl.c:293
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:113
IfxGtm_Atom_PwmHl_s::ccxTemp
IfxGtm_Atom_Ch * ccxTemp
cached value
Definition: IfxGtm_Atom_PwmHl.h:182
IfxGtm_Atom_PwmHl_Base::maxPulse
Ifx_TimerValue maxPulse
internal parameter
Definition: IfxGtm_Atom_PwmHl.h:132
IfxGtm_Atom_PwmHl_Base
Multi-channels PWM object definition (channels only)
Definition: IfxGtm_Atom_PwmHl.h:128
IfxGtm_Atom_PwmHl_s::agc
Ifx_GTM_ATOM_AGC * agc
AGC unit used.
Definition: IfxGtm_Atom_PwmHl.h:179
IfxGtm_Atom_PwmHl_Base::coutxActiveState
Ifx_ActiveState coutxActiveState
Bottom PWM active state.
Definition: IfxGtm_Atom_PwmHl.h:136
IfxGtm_Atom_PwmHl_UpdateShift
void(* IfxGtm_Atom_PwmHl_UpdateShift)(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Definition: IfxGtm_Atom_PwmHl.h:116
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxGtm_Atom_PwmHl_setupChannels
IFX_EXTERN void IfxGtm_Atom_PwmHl_setupChannels(IfxGtm_Atom_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set up channels.
Definition: IfxGtm_Atom_PwmHl.c:380
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxGtm_Atom_PwmHl_Config::base
IfxStdIf_PwmHl_Config base
PWM HL standard interface configuration.
Definition: IfxGtm_Atom_PwmHl.h:149
IfxGtm_Atom_PwmHl_s::coutx
IfxGtm_Atom_Ch coutx[IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS]
ATOM channels used for the OUTX outputs.
Definition: IfxGtm_Atom_PwmHl.h:181
IfxGtm_Atom_ToutMap
ATOM TOUT pin mapping structure.
Definition: IfxGtm_PinMap.h:110
IfxStdIf_PwmHl_Config
Multi-channels PWM object configuration.
Definition: IfxStdIf_PwmHl.h:200
IfxGtm_Atom_PwmHl_stdIfPwmHlInit
IFX_EXTERN boolean IfxGtm_Atom_PwmHl_stdIfPwmHlInit(IfxStdIf_PwmHl *stdif, IfxGtm_Atom_PwmHl *driver)
Initialises the statndard interface Pwm.
Definition: IfxGtm_Atom_PwmHl.c:389
IfxGtm_Atom_PwmHl_s::base
IfxGtm_Atom_PwmHl_Base base
Multi-channels PWM object definition (channels only)
Definition: IfxGtm_Atom_PwmHl.h:173
IfxStdIf_PwmHl_
Standard interface object.
Definition: IfxStdIf_PwmHl.h:179
IfxGtm_Atom_PwmHl_getMode
IFX_EXTERN Ifx_Pwm_Mode IfxGtm_Atom_PwmHl_getMode(IfxGtm_Atom_PwmHl *driver)
Returns Pwm mode.
Definition: IfxGtm_Atom_PwmHl.c:160
IfxGtm_Atom_PwmHl_getMinPulse
IFX_EXTERN float32 IfxGtm_Atom_PwmHl_getMinPulse(IfxGtm_Atom_PwmHl *driver)
Returns the minimum pulse.
Definition: IfxGtm_Atom_PwmHl.c:154
IfxGtm_Atom_PwmHl_getDeadtime
IFX_EXTERN float32 IfxGtm_Atom_PwmHl_getDeadtime(IfxGtm_Atom_PwmHl *driver)
Returns the dead time.
Definition: IfxGtm_Atom_PwmHl.c:148
IfxGtm_Atom_PwmHl_Mode::updatePulse
IfxGtm_Atom_PwmHl_UpdatePulse updatePulse
update pulse call back function for the selected mode
Definition: IfxGtm_Atom_PwmHl.h:166
IfxGtm_Atom_PwmHl_setPulse
IFX_EXTERN void IfxGtm_Atom_PwmHl_setPulse(IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
Sets the ON time and offset, all switched are independent.
Definition: IfxGtm_Atom_PwmHl.c:374
IfxStdIf_PwmHl.h
Standard interface: Multi-channels, dual-complementary PWM interface.
IfxGtm_Atom_PwmHl_s::ccx
IfxGtm_Atom_Ch ccx[IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS]
ATOM channels used for the CCCX outputs.
Definition: IfxGtm_Atom_PwmHl.h:180
IfxGtm_Atom_PwmHl_Base::ccxActiveState
Ifx_ActiveState ccxActiveState
Top PWM active state.
Definition: IfxGtm_Atom_PwmHl.h:135
IfxGtm_Atom_PwmHl_setOnTime
IFX_EXTERN void IfxGtm_Atom_PwmHl_setOnTime(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Sets the ON time.
Definition: IfxGtm_Atom_PwmHl.c:362
IfxGtm_Atom_PwmHl_setDeadtime
IFX_EXTERN boolean IfxGtm_Atom_PwmHl_setDeadtime(IfxGtm_Atom_PwmHl *driver, float32 deadtime)
Sets the dead time.
Definition: IfxGtm_Atom_PwmHl.c:273
IfxGtm_Atom_PwmHl_setMinPulse
IFX_EXTERN boolean IfxGtm_Atom_PwmHl_setMinPulse(IfxGtm_Atom_PwmHl *driver, float32 minPulse)
Sets the minimum pulse.
Definition: IfxGtm_Atom_PwmHl.c:282
IfxGtm_Atom_PwmHl_Mode::update
IfxGtm_Atom_PwmHl_Update update
update call back function for the selected mode
Definition: IfxGtm_Atom_PwmHl.h:164
IfxGtm_Atom_PwmHl_Config::initPins
boolean initPins
TRUE: Initialize pins in driver FALSE: Don&#39;t initialize pins in driver. User handles separately...
Definition: IfxGtm_Atom_PwmHl.h:154
IfxGtm_Atom_PwmHl_Base::mode
Ifx_Pwm_Mode mode
actual PWM mode
Definition: IfxGtm_Atom_PwmHl.h:133
IfxGtm_Atom_PwmHl_s::coutxTemp
IfxGtm_Atom_Ch * coutxTemp
cached value
Definition: IfxGtm_Atom_PwmHl.h:183
IfxGtm_Atom_PwmHl_Config::ccx
IFX_CONST IfxGtm_Atom_ToutMapP * ccx
Pointer to an array of size pwmHl.channels.channelCount containing the channels used. Channels must be adjacent channels.
Definition: IfxGtm_Atom_PwmHl.h:152
IfxGtm_Atom_PwmHl_Base::minPulse
Ifx_TimerValue minPulse
minimum pulse that is output, shorter pulse time will be output as 0% duty cycle
Definition: IfxGtm_Atom_PwmHl.h:131
IfxGtm_Atom_PwmHl_Base::channelCount
uint8 channelCount
Number of PWM channels, one channel is made of a top and bottom channel.
Definition: IfxGtm_Atom_PwmHl.h:138
IfxGtm_Atom_PwmHl_Base::deadtime
Ifx_TimerValue deadtime
Dead time between the top and bottom channel in ticks.
Definition: IfxGtm_Atom_PwmHl.h:130
IfxGtm_Atom_PwmHl_Base::inverted
boolean inverted
Flag indicating the center aligned inverted mode (TRUE)
Definition: IfxGtm_Atom_PwmHl.h:137
IfxGtm_Atom_PwmHl_Mode
Structure for PWM configuration.
Definition: IfxGtm_Atom_PwmHl.h:160
IfxGtm_Atom_PwmHl_Config::coutx
IFX_CONST IfxGtm_Atom_ToutMapP * coutx
Pointer to an array of size pwmHl.channels.channelCount containing the channels used. Channels must be adjacent channels.
Definition: IfxGtm_Atom_PwmHl.h:153
IfxGtm_Atom_PwmHl_s
GTM ATOM PWM driver.
Definition: IfxGtm_Atom_PwmHl.h:171
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxGtm_Atom_PwmHl_s::atom
Ifx_GTM_ATOM * atom
ATOM unit used.
Definition: IfxGtm_Atom_PwmHl.h:178
IfxGtm_Atom_PwmHl_setOnTimeAndShift
IFX_EXTERN void IfxGtm_Atom_PwmHl_setOnTimeAndShift(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets the ON time and Shift.
Definition: IfxGtm_Atom_PwmHl.c:368
sint8
signed char sint8
Definition: Platform_Types.h:125
IfxGtm_Atom_Ch
IfxGtm_Atom_Ch
Enum for ATOM channels.
Definition: IfxGtm_cfg.h:258


iLLD_TC38A: IfxGtm_Atom_Timer.c Source File

  • Gtm
  • Atom
  • Timer
IfxGtm_Atom_Timer.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Atom_Timer.c
3 * \brief GTM TIMER details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxGtm_Atom_Timer.h"
47 #include "_Utilities/Ifx_Assert.h"
48 #include "IfxGtm_bf.h"
49 #include "stddef.h"
50 #include "string.h"
51
52 /******************************************************************************/
53 /*-------------------------Function Implementations---------------------------*/
54 /******************************************************************************/
55
56 boolean IfxGtm_Atom_Timer_acknowledgeTimerIrq(IfxGtm_Atom_Timer *driver)
57 {
58 boolean event;
59 event = IfxGtm_Atom_Ch_isZeroNotification(driver->atom, driver->timerChannel);
60
61 if (event)
62 {
63 IfxGtm_Atom_Ch_clearZeroNotification(driver->atom, driver->timerChannel);
64 }
65 else
66 {}
67
68 return event;
69 }
70
71
72 boolean IfxGtm_Atom_Timer_acknowledgeTriggerIrq(IfxGtm_Atom_Timer *driver)
73 {
74 boolean event;
75 event = IfxGtm_Atom_Ch_isOneNotification(driver->atom, driver->triggerChannel);
76
77 if (event)
78 {
79 IfxGtm_Atom_Ch_clearOneNotification(driver->atom, driver->triggerChannel);
80 }
81 else
82 {}
83
84 return event;
85 }
86
87
88 void IfxGtm_Atom_Timer_addToChannelMask(IfxGtm_Atom_Timer *driver, IfxGtm_Atom_Ch channel)
89 {
90 driver->channelsMask |= 1 << channel;
91 driver->agcDisableUpdate = IfxGtm_Atom_Agc_buildFeature(0, driver->channelsMask, IFX_GTM_ATOM_AGC_GLB_CTRL_UPEN_CTRL0_OFF);
92 driver->agcApplyUpdate = IfxGtm_Atom_Agc_buildFeature(driver->channelsMask, 0, IFX_GTM_ATOM_AGC_GLB_CTRL_UPEN_CTRL0_OFF);
93 }
94
95
96 void IfxGtm_Atom_Timer_applyUpdate(IfxGtm_Atom_Timer *driver)
97 {
98 IfxGtm_Atom_Agc_setChannelsUpdate(driver->agc, driver->agcApplyUpdate);
99 }
100
101
102 void IfxGtm_Atom_Timer_disableUpdate(IfxGtm_Atom_Timer *driver)
103 {
104 IfxGtm_Atom_Agc_setChannelsUpdate(driver->agc, driver->agcDisableUpdate);
105 }
106
107
108 float32 IfxGtm_Atom_Timer_getFrequency(IfxGtm_Atom_Timer *driver)
109 {
110 return 1.0 / IfxStdIf_Timer_tickToS(driver->base.clockFreq, driver->base.period);
111 }
112
113
114 float32 IfxGtm_Atom_Timer_getInputFrequency(IfxGtm_Atom_Timer *driver)
115 {
116 return driver->base.clockFreq;
117 }
118
119
120 Ifx_TimerValue IfxGtm_Atom_Timer_getOffset(IfxGtm_Atom_Timer *driver)
121 {
122 return driver->offset;
123 }
124
125
126 Ifx_TimerValue IfxGtm_Atom_Timer_getPeriod(IfxGtm_Atom_Timer *driver)
127 {
128 return driver->base.period;
129 }
130
131
132 volatile uint32 *IfxGtm_Atom_Timer_getPointer(IfxGtm_Atom_Timer *driver)
133 {
134 return IfxGtm_Atom_Ch_getTimerPointer(driver->atom, driver->timerChannel);
135 }
136
137
138 float32 IfxGtm_Atom_Timer_getResolution(IfxGtm_Atom_Timer *driver)
139 {
140 return 1.0 / driver->base.clockFreq;
141 }
142
143
144 Ifx_TimerValue IfxGtm_Atom_Timer_getTrigger(IfxGtm_Atom_Timer *driver)
145 {
146 return IfxGtm_Atom_Ch_getCompareOne(driver->atom, driver->triggerChannel) - 1;
147 }
148
149
150 volatile uint32 *IfxGtm_Atom_Timer_getTriggerPointer(IfxGtm_Atom_Timer *driver)
151 {
152 return IfxGtm_Atom_Ch_getCompareOnePointer(driver->atom, driver->triggerChannel);
153 }
154
155
156 boolean IfxGtm_Atom_Timer_init(IfxGtm_Atom_Timer *driver, const IfxGtm_Atom_Timer_Config *config)
157 {
158 boolean result = TRUE;
159 IfxGtm_Atom_Timer_Base *base = &driver->base;
160
161 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->base.countDir == IfxStdIf_Timer_CountDir_up); /* only this mode is supported */
162
163 driver->gtm = config->gtm;
164 driver->atomIndex = config->atom;
165 driver->atom = &config->gtm->ATOM[config->atom];
166 driver->timerChannel = config->timerChannel;
167
168 /*
169 * IfxGtm_Dtm dtmIndex = IfxGtm_Dtm_getAtomChannelDtmIndex(config->atom, config->timerChannel);
170 * boolean dtmAvailable = FALSE;
171 * if (dtmIndex != IfxGtm_Dtm_none)
172 * {
173 * driver->dtm = &config->gtm->CDTM.DTM[dtmIndex];
174 * driver->dtmChannel = (IfxGtm_Dtm_Ch) (config->timerChannel % 4);
175 * dtmAvailable = TRUE;
176 * }
177 * else
178 * {
179 * dtmAvailable = FALSE;
180 * }
181 */
182
183 base->triggerEnabled = config->base.trigger.enabled;
184
185 if (base->triggerEnabled)
186 {
187 if (config->triggerOut != NULL_PTR)
188 {
189 driver->triggerChannel = config->triggerOut->channel;
190 }
191 else
192 {
193 result = FALSE;
194 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, result); /* triggerOut is required */
195 }
196 }
197 else
198 {
199 driver->triggerChannel = driver->timerChannel; // Set to timer channel to disable its use
200 }
201
202 driver->agc = (Ifx_GTM_ATOM_AGC *)&driver->atom->AGC.GLB_CTRL;
203
204 driver->channelsMask = 0;
205 driver->agcApplyUpdate = 0;
206 driver->agcDisableUpdate = 0;
207
208 /* Initialize the timer part */
209 IfxGtm_Atom_Ch_configurePwmMode(driver->atom, driver->timerChannel, config->clock,
210 (Ifx_ActiveState)config->base.trigger.risingEdgeAtPeriod, IfxGtm_Atom_Ch_ResetEvent_onCm0,
211 IfxGtm_Atom_Ch_OutputTrigger_generate);
212
213 IfxGtm_Atom_Timer_updateInputFrequency(driver);
214
215 if ((config->base.minResolution > 0) && ((1.0 / base->clockFreq) > config->base.minResolution))
216 {
217 result = FALSE;
218 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
219 }
220 else
221 {}
222
223 IfxGtm_Atom_Timer_setFrequency(driver, config->base.frequency);
224 driver->offset = IfxStdIf_Timer_sToTick(driver->base.clockFreq, 1.0 / config->base.frequency * config->base.startOffset);
225
226 IfxGtm_Atom_Ch_setCounterValue(driver->atom, driver->timerChannel, driver->offset);
227
228 /* Initialize the trigger part */
229 IfxGtm_Atom_Timer_addToChannelMask(driver, driver->timerChannel);
230
231 if (base->triggerEnabled)
232 {
233 IfxGtm_Atom_Ch triggerChannel = driver->triggerChannel;
234 uint16 triggerChannelMask = 1 << triggerChannel;
235
236 IfxGtm_Atom_Ch_setSignalLevel(driver->atom, triggerChannel, config->base.trigger.risingEdgeAtPeriod ? Ifx_ActiveState_high : Ifx_ActiveState_low);
237
238 IfxGtm_Atom_Ch_setCounterValue(driver->atom, triggerChannel, driver->offset);
239
240 if (triggerChannel != driver->timerChannel)
241 {
242 IfxGtm_Atom_Ch_configurePwmMode(driver->atom, triggerChannel, config->clock,
243 (Ifx_ActiveState)config->base.trigger.risingEdgeAtPeriod, IfxGtm_Atom_Ch_ResetEvent_onTrigger,
244 IfxGtm_Atom_Ch_OutputTrigger_forward);
245 IfxGtm_Atom_Agc_enableChannels(driver->agc, triggerChannelMask, 0, FALSE);
246 IfxGtm_Atom_Timer_addToChannelMask(driver, driver->triggerChannel);
247 }
248 else
249 {}
250
251 /* Signal must go out of the GTM even if the port outpout is not enabled */
252 IfxGtm_Atom_Agc_enableChannelsOutput(driver->agc, triggerChannelMask, 0, FALSE);
253
254 if ((config->base.trigger.outputEnabled) && (config->initPins == TRUE))
255 {
256 /* Initialize the port */
257 IfxGtm_PinMap_setAtomTout(config->triggerOut, config->base.trigger.outputMode, config->base.trigger.outputDriver);
258 }
259 else
260 {}
261
262 IfxGtm_Atom_Timer_setTrigger(driver, config->base.trigger.triggerPoint);
263 }
264 else
265 {}
266
267 /* Interrupt configuration */
268 {
269 volatile Ifx_SRC_SRCR *src;
270 boolean timerHasIrq = config->base.isrPriority > 0;
271 boolean triggerHasIrq = (config->base.trigger.isrPriority > 0) && base->triggerEnabled;
272
273 if (driver->triggerChannel == driver->timerChannel)
274 {
275 IfxGtm_Atom_Ch_setNotification(driver->atom, driver->timerChannel, timerHasIrq ? config->irqModeTimer : config->irqModeTrigger, timerHasIrq, triggerHasIrq);
276 src = IfxGtm_Atom_Ch_getSrcPointer(driver->gtm, config->atom, driver->timerChannel);
277 IfxSrc_init(src, timerHasIrq ? config->base.isrProvider : config->base.trigger.isrProvider, timerHasIrq ? config->base.isrPriority : config->base.trigger.isrPriority);
278 IfxSrc_enable(src);
279 }
280 else
281 {
282 IfxGtm_IrqMode irqMode = IfxGtm_IrqMode_pulseNotify;
283
284 if (timerHasIrq)
285 {
286 IfxGtm_Atom_Ch_setNotification(driver->atom, driver->timerChannel, irqMode, TRUE, FALSE);
287 src = IfxGtm_Atom_Ch_getSrcPointer(driver->gtm, config->atom, driver->timerChannel);
288 IfxSrc_init(src, config->base.isrProvider, config->base.isrPriority);
289 IfxSrc_enable(src);
290 }
291
292 if (triggerHasIrq)
293 {
294 IfxGtm_Atom_Ch_setNotification(driver->atom, driver->triggerChannel, irqMode, FALSE, TRUE);
295 src = IfxGtm_Atom_Ch_getSrcPointer(driver->gtm, config->atom, driver->triggerChannel);
296 IfxSrc_init(src, config->base.trigger.isrProvider, config->base.trigger.isrPriority);
297 IfxSrc_enable(src);
298 }
299 }
300 }
301
302 /* Transfer the shadow registers */
303 IfxGtm_Atom_Agc_setChannelsForceUpdate(driver->agc, driver->channelsMask, 0, 0, 0);
304 IfxGtm_Atom_Agc_trigger(driver->agc);
305 IfxGtm_Atom_Agc_setChannelsForceUpdate(driver->agc, 0, driver->channelsMask, 0, 0);
306
307 /*
308 * if (dtmAvailable)
309 * {
310 * // bypassing the DTM functionality
311 * IfxGtm_Dtm_setClockSource(driver->dtm, config->dtmClockSource);
312 * IfxGtm_Dtm_setOutput0DeadTimePath(driver->dtm, driver->dtmChannel, IfxGtm_Dtm_DeadTimePath_feedThrough);
313 *
314 * IfxGtm_Dtm_setOutput1Select(driver->dtm, driver->dtmChannel, IfxGtm_Dtm_Output1Select_specialFunction);
315 * IfxGtm_Dtm_setOutput1Function(driver->dtm, driver->dtmChannel, IfxGtm_Dtm_Output1Function_dtmInputSignal);
316 * IfxGtm_Dtm_setOutput1DeadTimePath(driver->dtm, driver->dtmChannel, IfxGtm_Dtm_DeadTimePath_enable);
317 * }
318 */
319
320 return result;
321 }
322
323
324 void IfxGtm_Atom_Timer_initConfig(IfxGtm_Atom_Timer_Config *config, Ifx_GTM *gtm)
325 {
326 IfxStdIf_Timer_initConfig(&config->base);
327 config->gtm = gtm;
328 config->atom = IfxGtm_Atom_0;
329 config->timerChannel = IfxGtm_Atom_Ch_0;
330 config->triggerOut = NULL_PTR;
331 config->clock = IfxGtm_Cmu_Clk_0;
332 config->base.countDir = IfxStdIf_Timer_CountDir_up;
333 config->irqModeTimer = IfxGtm_IrqMode_level;
334 config->irqModeTrigger = IfxGtm_IrqMode_level;
335 config->initPins = TRUE;
336
337 // config->dtmClockSource = IfxGtm_Dtm_ClockSource_cmuClock1;
338 }
339
340
341 void IfxGtm_Atom_Timer_run(IfxGtm_Atom_Timer *driver)
342 {
343 IfxGtm_Atom_Agc_enableChannels(driver->agc, driver->channelsMask, 0, TRUE);
344 }
345
346
347 boolean IfxGtm_Atom_Timer_setFrequency(IfxGtm_Atom_Timer *driver, float32 frequency)
348 {
349 Ifx_TimerValue period = IfxStdIf_Timer_sToTick(driver->base.clockFreq, 1.0 / frequency);
350
351 return IfxGtm_Atom_Timer_setPeriod(driver, period);
352 }
353
354
355 boolean IfxGtm_Atom_Timer_setPeriod(IfxGtm_Atom_Timer *driver, Ifx_TimerValue period)
356 {
357 driver->base.period = period;
358 IfxGtm_Atom_Ch_setCompareZeroShadow(driver->atom, driver->timerChannel, period);
359
360 if (driver->triggerChannel != driver->timerChannel)
361 {
362 IfxGtm_Atom_Ch_setCompareZeroShadow(driver->atom, driver->triggerChannel, period);
363 }
364
365 return TRUE;
366 }
367
368
369 void IfxGtm_Atom_Timer_setSingleMode(IfxGtm_Atom_Timer *driver, boolean enabled)
370 {
371 IfxGtm_Atom_Ch_setOneShotMode(driver->atom, driver->timerChannel, enabled);
372 }
373
374
375 void IfxGtm_Atom_Timer_setTrigger(IfxGtm_Atom_Timer *driver, Ifx_TimerValue triggerPoint)
376 {
377 IfxGtm_Atom_Ch_setCompareOneShadow(driver->atom, driver->triggerChannel, triggerPoint + 1);
378 }
379
380
381 boolean IfxGtm_Atom_Timer_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxGtm_Atom_Timer *driver)
382 {
383 /* Ensure the stdif is reset to zeros */
384 memset(stdif, 0, sizeof(IfxStdIf_Timer));
385
386 /* *INDENT-OFF* Note: this file was indented manually by the author. */
387 /* Set the API link */
388 stdif->driver = driver;
389 stdif->getFrequency =(IfxStdIf_Timer_GetFrequency )&IfxGtm_Atom_Timer_getFrequency;
390 stdif->getPeriod =(IfxStdIf_Timer_GetPeriod )&IfxGtm_Atom_Timer_getPeriod;
391 stdif->getResolution =(IfxStdIf_Timer_GetResolution )&IfxGtm_Atom_Timer_getResolution;
392 stdif->getTrigger =(IfxStdIf_Timer_GetTrigger )&IfxGtm_Atom_Timer_getTrigger;
393 stdif->setFrequency =(IfxStdIf_Timer_SetFrequency )&IfxGtm_Atom_Timer_setFrequency;
394 stdif->updateInputFrequency =(IfxStdIf_Timer_UpdateInputFrequency)&IfxGtm_Atom_Timer_updateInputFrequency;
395 stdif->applyUpdate =(IfxStdIf_Timer_ApplyUpdate )&IfxGtm_Atom_Timer_applyUpdate;
396 stdif->disableUpdate =(IfxStdIf_Timer_DisableUpdate )&IfxGtm_Atom_Timer_disableUpdate;
397 stdif->getInputFrequency =(IfxStdIf_Timer_GetInputFrequency )&IfxGtm_Atom_Timer_getInputFrequency;
398 stdif->run =(IfxStdIf_Timer_Run )&IfxGtm_Atom_Timer_run;
399 stdif->setPeriod =(IfxStdIf_Timer_SetPeriod )&IfxGtm_Atom_Timer_setPeriod;
400 stdif->setSingleMode =(IfxStdIf_Timer_SetSingleMode )&IfxGtm_Atom_Timer_setSingleMode;
401 stdif->setTrigger =(IfxStdIf_Timer_SetTrigger )&IfxGtm_Atom_Timer_setTrigger;
402 stdif->stop =(IfxStdIf_Timer_Stop )&IfxGtm_Atom_Timer_stop;
403 stdif->ackTimerIrq =(IfxStdIf_Timer_AckTimerIrq )&IfxGtm_Atom_Timer_acknowledgeTimerIrq;
404 stdif->ackTriggerIrq =(IfxStdIf_Timer_AckTriggerIrq )&IfxGtm_Atom_Timer_acknowledgeTriggerIrq;
405 /* *INDENT-ON* */
406
407 return TRUE;
408 }
409
410
411 void IfxGtm_Atom_Timer_stop(IfxGtm_Atom_Timer *driver)
412 {
413 IfxGtm_Atom_Agc_enableChannels(driver->agc, 0, driver->channelsMask, TRUE);
414 }
415
416
417 void IfxGtm_Atom_Timer_updateInputFrequency(IfxGtm_Atom_Timer *driver)
418 {
419 driver->base.clockFreq = IfxGtm_Atom_Ch_getClockFrequency(driver->gtm, driver->atom, driver->timerChannel);
420 }
IfxGtm_Atom_Agc_enableChannelsOutput
void IfxGtm_Atom_Agc_enableChannelsOutput(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels output (OUTEN)
Definition: IfxGtm_Atom.c:169
Ifx_ActiveState_high
The signal is high active.
Definition: Ifx_Types.h:116
IfxStdIf_Timer_::getTrigger
IfxStdIf_Timer_GetTrigger getTrigger
Definition: IfxStdIf_Timer.h:243
IfxGtm_Atom_Timer_Config::triggerOut
IfxGtm_Atom_ToutMap * triggerOut
ATOM channel used for the trigger output, can be identical to the timer channe.
Definition: IfxGtm_Atom_Timer.h:143
IfxGtm_Atom_Timer_stdIfTimerInit
boolean IfxGtm_Atom_Timer_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxGtm_Atom_Timer *driver)
Initializes the standard interface timer.
Definition: IfxGtm_Atom_Timer.c:381
Ifx_ActiveState_low
The signal is low active.
Definition: Ifx_Types.h:115
IfxStdIf_Timer_GetTrigger
Ifx_TimerValue(* IfxStdIf_Timer_GetTrigger)(IfxStdIf_InterfaceDriver stdIf)
Return the timer trigger point.
Definition: IfxStdIf_Timer.h:117
IfxGtm_Atom_Timer_setSingleMode
void IfxGtm_Atom_Timer_setSingleMode(IfxGtm_Atom_Timer *driver, boolean enabled)
Sets the single shot mode of the timer.
Definition: IfxGtm_Atom_Timer.c:369
IfxGtm_Atom_Timer_Config::initPins
boolean initPins
TRUE: Initialize pins in driver FALSE: Don&#39;t initialize pins in driver : user handles separately...
Definition: IfxGtm_Atom_Timer.h:148
IfxGtm_Atom_Timer_getFrequency
float32 IfxGtm_Atom_Timer_getFrequency(IfxGtm_Atom_Timer *driver)
Returns the frequency.
Definition: IfxGtm_Atom_Timer.c:108
IfxStdIf_Timer_Config::isrProvider
IfxSrc_Tos isrProvider
Interrupt service provider for the timer interrupt.
Definition: IfxStdIf_Timer.h:276
IfxGtm_Atom_ToutMap::channel
IfxGtm_Atom_Ch channel
ATOM channel index.
Definition: IfxGtm_PinMap.h:113
IfxGtm_Atom_Timer::atom
Ifx_GTM_ATOM * atom
ATOM used for the timer functionality.
Definition: IfxGtm_Atom_Timer.h:122
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxGtm_IrqMode_level
Definition: IfxGtm.h:66
IfxStdIf_Timer_GetFrequency
float32(* IfxStdIf_Timer_GetFrequency)(IfxStdIf_InterfaceDriver stdIf)
Return the timer frequency in Hz.
Definition: IfxStdIf_Timer.h:99
IfxGtm_Atom_Timer::gtm
Ifx_GTM * gtm
GTM module used for the timer functionality.
Definition: IfxGtm_Atom_Timer.h:121
IfxGtm_Atom_Agc_setChannelsForceUpdate
void IfxGtm_Atom_Agc_setChannelsForceUpdate(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
Enable/disable one or more channels for the force update feature (FUPD)
Definition: IfxGtm_Atom.c:235
IfxGtm_Atom_Timer_setPeriod
boolean IfxGtm_Atom_Timer_setPeriod(IfxGtm_Atom_Timer *driver, Ifx_TimerValue period)
Sets the period for the timer.
Definition: IfxGtm_Atom_Timer.c:355
IfxGtm_Atom_Ch_ResetEvent_onCm0
Definition: IfxGtm_Atom.h:87
IfxGtm_Atom_Ch_clearOneNotification
void IfxGtm_Atom_Ch_clearOneNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Clears the channel One notification.
Definition: IfxGtm_Atom.c:262
IfxGtm_Atom_Timer_Config::irqModeTrigger
IfxGtm_IrqMode irqModeTrigger
Interrupt mode for the trigger.
Definition: IfxGtm_Atom_Timer.h:146
IfxGtm_Atom_Ch_OutputTrigger_generate
Generate the trigger from the current channel.
Definition: IfxGtm_Atom.h:80
IfxGtm_Atom_Ch_setNotification
void IfxGtm_Atom_Ch_setNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne)
Sets the channel notification.
Definition: IfxGtm_Atom.c:471
IfxGtm_Atom_Ch_0
ATOM channel 0.
Definition: IfxGtm_cfg.h:261
IfxStdIf_Timer_AckTriggerIrq
boolean(* IfxStdIf_Timer_AckTriggerIrq)(IfxStdIf_InterfaceDriver stdIf)
Return the trigger interrupt flag and reset it.
Definition: IfxStdIf_Timer.h:233
IfxGtm_Atom_Timer.h
GTM TIMER details.
IfxStdIf_Timer_UpdateInputFrequency
void(* IfxStdIf_Timer_UpdateInputFrequency)(IfxStdIf_InterfaceDriver stdIf)
Indicates the stdIf that the imput frequency has changed and that it should be taken in account...
Definition: IfxStdIf_Timer.h:131
IfxStdIf_Timer_::stop
IfxStdIf_Timer_Stop stop
Definition: IfxStdIf_Timer.h:253
IfxStdIf_Timer_::setSingleMode
IfxStdIf_Timer_SetSingleMode setSingleMode
Definition: IfxStdIf_Timer.h:251
IfxGtm_Atom_Timer_setFrequency
boolean IfxGtm_Atom_Timer_setFrequency(IfxGtm_Atom_Timer *driver, float32 frequency)
Sets the frequency.
Definition: IfxGtm_Atom_Timer.c:347
IfxGtm_Atom_Ch_clearZeroNotification
void IfxGtm_Atom_Ch_clearZeroNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Clears the channel Zero notification.
Definition: IfxGtm_Atom.c:270
IfxStdIf_Timer_::driver
IfxStdIf_InterfaceDriver driver
Interface driver object.
Definition: IfxStdIf_Timer.h:239
memset
void * memset(void *s, int c, syze_t n)
IfxStdIf_Timer_tickToS
IFX_INLINE float32 IfxStdIf_Timer_tickToS(float32 clockFreq, Ifx_TimerValue ticks)
Convert timer ticks to seconds.
Definition: IfxStdIf_Timer.h:435
IfxGtm_Atom_Agc_buildFeature
uint32 IfxGtm_Atom_Agc_buildFeature(uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable.
Definition: IfxGtm_Atom.c:61
IfxStdIf_Timer_TrigConfig::outputDriver
IfxPort_PadDriver outputDriver
Output pad driver.
Definition: IfxStdIf_Timer.h:266
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxGtm_Atom_Timer::timerChannel
IfxGtm_Atom_Ch timerChannel
ATOM channel used for the timer.
Definition: IfxGtm_Atom_Timer.h:125
IfxStdIf_Timer_SetFrequency
boolean(* IfxStdIf_Timer_SetFrequency)(IfxStdIf_InterfaceDriver stdIf, float32 frequency)
Set the timer frequency in Hz.
Definition: IfxStdIf_Timer.h:125
IfxGtm_Atom_Timer
TOM Timer interface.
Definition: IfxGtm_Atom_Timer.h:118
IfxGtm_Atom_Timer::triggerChannel
IfxGtm_Atom_Ch triggerChannel
ATOM channel used for the trigger, if identical to the timerChannel, the trigger interrupt is having ...
Definition: IfxGtm_Atom_Timer.h:126
IfxGtm_Atom_Timer_getPointer
volatile uint32 * IfxGtm_Atom_Timer_getPointer(IfxGtm_Atom_Timer *driver)
Returns the pointer to timer channel.
Definition: IfxGtm_Atom_Timer.c:132
IfxStdIf_Timer_sToTick
IFX_INLINE Ifx_TimerValue IfxStdIf_Timer_sToTick(float32 clockFreq, float32 seconds)
Convert seconds to timer ticks.
Definition: IfxStdIf_Timer.h:446
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
float32
float float32
Definition: Platform_Types.h:170
IfxGtm_Atom_Ch_configurePwmMode
void IfxGtm_Atom_Ch_configurePwmMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock, Ifx_ActiveState activeState, IfxGtm_Atom_Ch_ResetEvent resetEvent, IfxGtm_Atom_Ch_OutputTrigger trigger)
Definition: IfxGtm_Atom.c:278
IfxStdIf_Timer_
Standard interface object.
Definition: IfxStdIf_Timer.h:237
IfxGtm_Atom_Agc_setChannelsUpdate
IFX_INLINE void IfxGtm_Atom_Agc_setChannelsUpdate(Ifx_GTM_ATOM_AGC *agc, uint32 value)
Sets the channels for update (UPEN)
Definition: IfxGtm_Atom.h:646
Ifx_Assert.h
Assert functions.
IfxGtm_Atom_Timer_Base
Structure for the timer base.
Definition: IfxGtm_Atom_Timer.h:104
IfxGtm_Atom_Timer_Config::atom
IfxGtm_Atom atom
ATOM used for the timer functionality.
Definition: IfxGtm_Atom_Timer.h:141
IfxStdIf_Timer_::getFrequency
IfxStdIf_Timer_GetFrequency getFrequency
Definition: IfxStdIf_Timer.h:240
IfxGtm_Atom_Timer_setTrigger
void IfxGtm_Atom_Timer_setTrigger(IfxGtm_Atom_Timer *driver, Ifx_TimerValue triggerPoint)
Sets the trigger.
Definition: IfxGtm_Atom_Timer.c:375
IfxGtm_Atom_Timer_getOffset
Ifx_TimerValue IfxGtm_Atom_Timer_getOffset(IfxGtm_Atom_Timer *driver)
Returns the initial timer offset in ticks.
Definition: IfxGtm_Atom_Timer.c:120
IfxStdIf_Timer_GetResolution
float32(* IfxStdIf_Timer_GetResolution)(IfxStdIf_InterfaceDriver stdIf)
Return the timer resolution in seconds.
Definition: IfxStdIf_Timer.h:111
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:113
IfxGtm_Atom_Timer_Base::triggerEnabled
boolean triggerEnabled
If TRUE, the trigger functionality is Initialised.
Definition: IfxGtm_Atom_Timer.h:107
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxGtm_Atom_Ch_getClockFrequency
float32 IfxGtm_Atom_Ch_getClockFrequency(Ifx_GTM *gtm, Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the ATOM channel input clock frequency in Hz.
Definition: IfxGtm_Atom.c:296
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxGtm_Atom_Ch_setCounterValue
void IfxGtm_Atom_Ch_setCounterValue(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 value)
Sets the counter value.
Definition: IfxGtm_Atom.c:455
IfxGtm_Atom_Timer_initConfig
void IfxGtm_Atom_Timer_initConfig(IfxGtm_Atom_Timer_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default.
Definition: IfxGtm_Atom_Timer.c:324
IfxGtm_Atom_Timer_addToChannelMask
void IfxGtm_Atom_Timer_addToChannelMask(IfxGtm_Atom_Timer *driver, IfxGtm_Atom_Ch channel)
Add a channel to the channel mask Channels present in the mask are started, stopped, updated at the same time as the timer: IfxGtm_Atom_Timer_applyUpdate, IfxGtm_Atom_Timer_disableUpdate, IfxGtm_Atom_Timer_stop, IfxGtm_Atom_Timer_run.
Definition: IfxGtm_Atom_Timer.c:88
IfxGtm_Atom_Timer::atomIndex
IfxGtm_Atom atomIndex
Enum for ATOM objects.
Definition: IfxGtm_Atom_Timer.h:124
IfxGtm_Cmu_Clk_0
Definition: IfxGtm_Cmu.h:66
IfxStdIf_Timer_Config::isrPriority
Ifx_Priority isrPriority
Interrupt isrPriority of the timer interrupt, if 0 the interrupt is disable.
Definition: IfxStdIf_Timer.h:275
IfxGtm_Atom_Timer_stop
void IfxGtm_Atom_Timer_stop(IfxGtm_Atom_Timer *driver)
Stops the timer.
Definition: IfxGtm_Atom_Timer.c:411
IfxGtm_Atom_Ch_getSrcPointer
volatile Ifx_SRC_SRCR * IfxGtm_Atom_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Atom atom, IfxGtm_Atom_Ch channel)
Returns a pointer to the ATOM channel SRC.
Definition: IfxGtm_Atom.c:359
IfxGtm_Atom_Agc_enableChannels
void IfxGtm_Atom_Agc_enableChannels(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels (ENDIS)
Definition: IfxGtm_Atom.c:151
IfxGtm_Atom_Timer_getResolution
float32 IfxGtm_Atom_Timer_getResolution(IfxGtm_Atom_Timer *driver)
Returns the resolution.
Definition: IfxGtm_Atom_Timer.c:138
IfxStdIf_Timer_::disableUpdate
IfxStdIf_Timer_DisableUpdate disableUpdate
Definition: IfxStdIf_Timer.h:247
IfxGtm_Atom_Timer::agcApplyUpdate
uint32 agcApplyUpdate
AGC value for apply update.
Definition: IfxGtm_Atom_Timer.h:132
IfxGtm_Atom_Ch_getTimerPointer
volatile uint32 * IfxGtm_Atom_Ch_getTimerPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the Timer pointer.
Definition: IfxGtm_Atom.c:366
IfxGtm_Atom_Ch_OutputTrigger_forward
Forward the trigger from the previous channel.
Definition: IfxGtm_Atom.h:79
IfxStdIf_Timer_GetInputFrequency
float32(* IfxStdIf_Timer_GetInputFrequency)(IfxStdIf_InterfaceDriver stdIf)
Return the timer input frequency in Hz.
Definition: IfxStdIf_Timer.h:175
IfxStdIf_Timer_SetTrigger
void(* IfxStdIf_Timer_SetTrigger)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue triggerPoint)
Set trigger point.
Definition: IfxStdIf_Timer.h:215
IfxGtm_Atom_Timer_Config::base
IfxStdIf_Timer_Config base
Standard interface timer configuration.
Definition: IfxGtm_Atom_Timer.h:139
IfxGtm_Atom_Ch_ResetEvent_onTrigger
Definition: IfxGtm_Atom.h:88
IfxGtm_Atom_Timer::channelsMask
uint16 channelsMask
Mask for channels to be modified together.
Definition: IfxGtm_Atom_Timer.h:127
IfxStdIf_Timer_Config::countDir
IfxStdIf_Timer_CountDir countDir
Timer counting mode.
Definition: IfxStdIf_Timer.h:279
IfxStdIf_Timer_TrigConfig::risingEdgeAtPeriod
boolean risingEdgeAtPeriod
Set the clock signal polarity, if TRUE, the rising edge is at the period, else at the trigger offset...
Definition: IfxStdIf_Timer.h:267
IfxGtm_Atom_Timer_disableUpdate
void IfxGtm_Atom_Timer_disableUpdate(IfxGtm_Atom_Timer *driver)
Disables the upadte.
Definition: IfxGtm_Atom_Timer.c:102
IfxGtm_Atom_Timer_updateInputFrequency
void IfxGtm_Atom_Timer_updateInputFrequency(IfxGtm_Atom_Timer *driver)
Updates the input frequency.
Definition: IfxGtm_Atom_Timer.c:417
IfxStdIf_Timer_initConfig
void IfxStdIf_Timer_initConfig(IfxStdIf_Timer_Config *config)
Definition: IfxStdIf_Timer.c:45
IfxGtm_Atom_Timer_Base::clockFreq
float32 clockFreq
Timer input clock frequency (cached value)
Definition: IfxGtm_Atom_Timer.h:108
IfxGtm_Atom_Ch_setOneShotMode
void IfxGtm_Atom_Ch_setOneShotMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, boolean enabled)
Enable/disable the one shot mode.
Definition: IfxGtm_Atom.c:489
IfxStdIf_Timer_CountDir_up
Timer is counting up.
Definition: IfxStdIf_Timer.h:87
IfxStdIf_Timer_::getInputFrequency
IfxStdIf_Timer_GetInputFrequency getInputFrequency
Definition: IfxStdIf_Timer.h:248
IfxGtm_Atom_Ch_isZeroNotification
boolean IfxGtm_Atom_Ch_isZeroNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the status of channel Zero notification.
Definition: IfxGtm_Atom.c:381
IfxGtm_Atom_Timer_acknowledgeTriggerIrq
boolean IfxGtm_Atom_Timer_acknowledgeTriggerIrq(IfxGtm_Atom_Timer *driver)
Returns the trigger event.
Definition: IfxGtm_Atom_Timer.c:72
IfxGtm_Atom_Timer::agc
Ifx_GTM_ATOM_AGC * agc
Pointer to the AGC object.
Definition: IfxGtm_Atom_Timer.h:123
IfxGtm_Atom_Timer_Config::irqModeTimer
IfxGtm_IrqMode irqModeTimer
Interrupt mode for the timer.
Definition: IfxGtm_Atom_Timer.h:145
IfxGtm_Atom_Timer_acknowledgeTimerIrq
boolean IfxGtm_Atom_Timer_acknowledgeTimerIrq(IfxGtm_Atom_Timer *driver)
Returns the timer event.
Definition: IfxGtm_Atom_Timer.c:56
IfxGtm_Atom_Timer_getInputFrequency
float32 IfxGtm_Atom_Timer_getInputFrequency(IfxGtm_Atom_Timer *driver)
Returns the Input frequncy.
Definition: IfxGtm_Atom_Timer.c:114
IfxGtm_Atom_Timer::agcDisableUpdate
uint32 agcDisableUpdate
AGC value for disable update.
Definition: IfxGtm_Atom_Timer.h:131
IfxGtm_Atom_Ch_setCompareOneShadow
void IfxGtm_Atom_Ch_setCompareOneShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowOne)
Sets the compare 1 shadow value.
Definition: IfxGtm_Atom.c:431
IfxGtm_IrqMode_pulseNotify
Definition: IfxGtm.h:68
IfxGtm_Atom_Timer_getTrigger
Ifx_TimerValue IfxGtm_Atom_Timer_getTrigger(IfxGtm_Atom_Timer *driver)
Returns the trigger point.
Definition: IfxGtm_Atom_Timer.c:144
IfxGtm_Atom_Ch_setSignalLevel
void IfxGtm_Atom_Ch_setSignalLevel(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, Ifx_ActiveState activeState)
Sets the signal level.
Definition: IfxGtm_Atom.c:505
IfxStdIf_Timer_TrigConfig::triggerPoint
Ifx_TimerValue triggerPoint
Trigger point in timer ticks.
Definition: IfxStdIf_Timer.h:262
IfxGtm_Atom_Timer_Config::clock
IfxGtm_Cmu_Clk clock
Timer input clock.
Definition: IfxGtm_Atom_Timer.h:144
IfxGtm_Atom_Timer::base
IfxGtm_Atom_Timer_Base base
Timer base structure.
Definition: IfxGtm_Atom_Timer.h:120
IfxStdIf_Timer_::setTrigger
IfxStdIf_Timer_SetTrigger setTrigger
Definition: IfxStdIf_Timer.h:252
IfxGtm_Atom_Ch_isOneNotification
boolean IfxGtm_Atom_Ch_isOneNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the status of channel One notification.
Definition: IfxGtm_Atom.c:372
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxGtm_Atom_0
ATOM object 0.
Definition: IfxGtm_cfg.h:245
IfxGtm_Atom_Timer_getPeriod
Ifx_TimerValue IfxGtm_Atom_Timer_getPeriod(IfxGtm_Atom_Timer *driver)
Returns the period of the timer.
Definition: IfxGtm_Atom_Timer.c:126
IfxGtm_Atom_Timer_run
void IfxGtm_Atom_Timer_run(IfxGtm_Atom_Timer *driver)
Runs the timer.
Definition: IfxGtm_Atom_Timer.c:341
IfxGtm_Atom_Ch_setCompareZeroShadow
void IfxGtm_Atom_Ch_setCompareZeroShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowZero)
Sets the compare 0 shadow value.
Definition: IfxGtm_Atom.c:447
IfxStdIf_Timer_::setFrequency
IfxStdIf_Timer_SetFrequency setFrequency
Definition: IfxStdIf_Timer.h:244
IfxStdIf_Timer_::run
IfxStdIf_Timer_Run run
Definition: IfxStdIf_Timer.h:249
IfxStdIf_Timer_::updateInputFrequency
IfxStdIf_Timer_UpdateInputFrequency updateInputFrequency
Definition: IfxStdIf_Timer.h:245
IfxGtm_Atom_Timer_init
boolean IfxGtm_Atom_Timer_init(IfxGtm_Atom_Timer *driver, const IfxGtm_Atom_Timer_Config *config)
Initialises the timer object.
Definition: IfxGtm_Atom_Timer.c:156
IfxGtm_Atom_Timer_applyUpdate
void IfxGtm_Atom_Timer_applyUpdate(IfxGtm_Atom_Timer *driver)
Enables the transfer of the shadow registers.
Definition: IfxGtm_Atom_Timer.c:96
IfxGtm_Atom_Ch_getCompareOnePointer
volatile uint32 * IfxGtm_Atom_Ch_getCompareOnePointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare one pointer.
Definition: IfxGtm_Atom.c:324
IfxGtm_Atom_Ch_getCompareOne
uint32 IfxGtm_Atom_Ch_getCompareOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare one value.
Definition: IfxGtm_Atom.c:316
IfxStdIf_Timer_GetPeriod
Ifx_TimerValue(* IfxStdIf_Timer_GetPeriod)(IfxStdIf_InterfaceDriver stdIf)
Return the timer period in ticks.
Definition: IfxStdIf_Timer.h:105
IfxStdIf_Timer_DisableUpdate
void(* IfxStdIf_Timer_DisableUpdate)(IfxStdIf_InterfaceDriver stdIf)
Disable updates.
Definition: IfxStdIf_Timer.h:169
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxStdIf_Timer_::setPeriod
IfxStdIf_Timer_SetPeriod setPeriod
Definition: IfxStdIf_Timer.h:250
IfxStdIf_Timer_::ackTriggerIrq
IfxStdIf_Timer_AckTriggerIrq ackTriggerIrq
Definition: IfxStdIf_Timer.h:255
IfxStdIf_Timer_Config::frequency
float32 frequency
PWM frequency in Hz. This parameter is only used to initialise the timer structure. An additional cell is required to build the timer.
Definition: IfxStdIf_Timer.h:274
IfxStdIf_Timer_ApplyUpdate
void(* IfxStdIf_Timer_ApplyUpdate)(IfxStdIf_InterfaceDriver stdIf)
Apply requested updates.
Definition: IfxStdIf_Timer.h:152
IfxGtm_IrqMode
IfxGtm_IrqMode
Enum for GTM interrupt modes.
Definition: IfxGtm.h:64
IfxGtm_Atom_Timer_Base::period
Ifx_TimerValue period
Timer period in ticks (cached value)
Definition: IfxGtm_Atom_Timer.h:106
IfxStdIf_Timer_Run
void(* IfxStdIf_Timer_Run)(IfxStdIf_InterfaceDriver stdIf)
Immediately start the timer.
Definition: IfxStdIf_Timer.h:184
IfxStdIf_Timer_::getResolution
IfxStdIf_Timer_GetResolution getResolution
Definition: IfxStdIf_Timer.h:242
IfxStdIf_Timer_Config::trigger
IfxStdIf_Timer_TrigConfig trigger
Trigger configuration.
Definition: IfxStdIf_Timer.h:278
IfxGtm_Atom_Agc_trigger
void IfxGtm_Atom_Agc_trigger(Ifx_GTM_ATOM_AGC *agc)
Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG)
Definition: IfxGtm_Atom.c:256
IfxGtm_Atom_Timer_Config
Configuration structure for TOM Timer.
Definition: IfxGtm_Atom_Timer.h:137
IfxStdIf_Timer_Config::startOffset
float32 startOffset
FIXME make startOffset as Ifx_TimerValue. Timer initial offset in % of the period.
Definition: IfxStdIf_Timer.h:280
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxStdIf_Timer_Stop
void(* IfxStdIf_Timer_Stop)(IfxStdIf_InterfaceDriver stdIf)
Immediately stops the timer.
Definition: IfxStdIf_Timer.h:221
IfxStdIf_Timer_::applyUpdate
IfxStdIf_Timer_ApplyUpdate applyUpdate
Definition: IfxStdIf_Timer.h:246
IfxStdIf_Timer_AckTimerIrq
boolean(* IfxStdIf_Timer_AckTimerIrq)(IfxStdIf_InterfaceDriver stdIf)
Return the timer interrupt flag and reset it.
Definition: IfxStdIf_Timer.h:227
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
IfxStdIf_Timer_TrigConfig::enabled
boolean enabled
If true, the trigger functionality is Initialised, else ignored.
Definition: IfxStdIf_Timer.h:261
IfxGtm_Atom_Timer_getTriggerPointer
volatile uint32 * IfxGtm_Atom_Timer_getTriggerPointer(IfxGtm_Atom_Timer *driver)
Returns the pointer to trigger channel.
Definition: IfxGtm_Atom_Timer.c:150
IfxGtm_Atom_Timer::offset
Ifx_TimerValue offset
Timer initial offset in ticks.
Definition: IfxGtm_Atom_Timer.h:128
IfxStdIf_Timer_TrigConfig::outputEnabled
boolean outputEnabled
If TRUE, the output pin is enabled, else disabled. In case the output is disabled, the output pin is not initialized.
Definition: IfxStdIf_Timer.h:268
IfxStdIf_Timer_SetPeriod
boolean(* IfxStdIf_Timer_SetPeriod)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue period)
Set the timer period.
Definition: IfxStdIf_Timer.h:194
IfxStdIf_Timer_Config::minResolution
float32 minResolution
Minimum resolution of the timer in seconds. if 0, this parameter is ignored. If the configuration doe...
Definition: IfxStdIf_Timer.h:277
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxStdIf_Timer_TrigConfig::outputMode
IfxPort_OutputMode outputMode
Output mode.
Definition: IfxStdIf_Timer.h:265
IfxStdIf_Timer_::ackTimerIrq
IfxStdIf_Timer_AckTimerIrq ackTimerIrq
Definition: IfxStdIf_Timer.h:254
IfxStdIf_Timer_SetSingleMode
void(* IfxStdIf_Timer_SetSingleMode)(IfxStdIf_InterfaceDriver stdIf, boolean enabled)
Stop timer at the end of the period.
Definition: IfxStdIf_Timer.h:203
IfxStdIf_Timer_::getPeriod
IfxStdIf_Timer_GetPeriod getPeriod
Definition: IfxStdIf_Timer.h:241
IfxGtm_Atom_Ch
IfxGtm_Atom_Ch
Enum for ATOM channels.
Definition: IfxGtm_cfg.h:258
IfxGtm_PinMap_setAtomTout
void IfxGtm_PinMap_setAtomTout(IfxGtm_Atom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Definition: IfxGtm_PinMap.c:2408


iLLD_TC38A: IfxGtm_Atom_Timer.h Source File

  • Gtm
  • Atom
  • Timer
IfxGtm_Atom_Timer.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Atom_Timer.h
3 * \brief GTM TIMER details
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Gtm_Atom_Timer_Usage How to use the GTM ATOM Timer Driver
42 * \ingroup IfxLld_Gtm_Atom_Timer
43 *
44 * This driver implements the timer functionalities as defined by \ref library_srvsw_stdif_timer.
45 * The user is free to use either the driver specific APIs below or to used the \ref library_srvsw_stdif_timer "standard interface APIs".
46 *
47 * \section Specific Specific implementation
48 * Implementation is similar to \ref IfxLld_Gtm_Tom_Timer.
49 *
50 * \todo Add documentation
51 *
52 * For a detailed configuration of the microcontroller, see \ref IfxGtm_Atom_Timer_init().
53 *
54 * \section Example Usage example
55 * Initialisation:
56 * \code
57 * IfxGtm_Atom_Timer_Config driverConfig;
58 * IfxGtm_Atom_Timer driverData;
59 * IfxStdIf_Timer timer;
60 * IfxGtm_Atom_Timer_initConfig(&driverConfig, &MODULE_GTM);
61 * IfxGtm_Atom_Timer_init (&driverData, &driverConfig);
62 * boolean IfxGtm_Atom_Timer_stdIfTimerInit(&timer, &driverData);
63 * \endcode
64 *
65 * During run-time, \ref library_srvsw_stdif_timer "the interface functions" should be used:
66 * \code
67 * IfxStdIf_Timer_run(timer);
68 * IfxStdIf_Timer_disableUpdate(timer);
69 * IfxStdIf_Timer_setPeriod(timer, period);
70 * IfxStdIf_Timer_applyUpdate(timer);
71 * \endcode
72 *
73 * \defgroup IfxLld_Gtm_Atom_Timer ATOM Timer Interface Driver
74 * \ingroup IfxLld_Gtm_Atom
75 * \defgroup IfxLld_Gtm_Atom_Timer_Timer_StdIf_Functions Timer StdIf Functions
76 * \ingroup IfxLld_Gtm_Atom_Timer
77 * \defgroup IfxLld_Gtm_Atom_Timer_Timer_Functions Timer Functions
78 * \ingroup IfxLld_Gtm_Atom_Timer
79 * \defgroup IfxLld_Gtm_Atom_Timer_Data_Structures Data Structures
80 * \ingroup IfxLld_Gtm_Atom_Timer
81 */
82
83 #ifndef IFXGTM_ATOM_TIMER_H
84 #define IFXGTM_ATOM_TIMER_H 1
85
86 /******************************************************************************/
87 /*----------------------------------Includes----------------------------------*/
88 /******************************************************************************/
89
90 #include "_PinMap/IfxGtm_PinMap.h"
91 #include "Gtm/Std/IfxGtm_Atom.h"
92 #include "Gtm/Std/IfxGtm_Cmu.h"
93 #include "Gtm/Std/IfxGtm_Dtm.h"
94 #include "StdIf/IfxStdIf_Timer.h"
95
96 /******************************************************************************/
97 /*-----------------------------Data Structures--------------------------------*/
98 /******************************************************************************/
99
100 /** \addtogroup IfxLld_Gtm_Atom_Timer_Data_Structures
101 * \{ */
102 /** \brief Structure for the timer base
103 */
104 typedef struct
105 {
106 Ifx_TimerValue period; /**< \brief Timer period in ticks (cached value) */
107 boolean triggerEnabled; /**< \brief If TRUE, the trigger functionality is Initialised */
108 float32 clockFreq; /**< \brief Timer input clock frequency (cached value) */
109 IfxStdIf_Timer_CountDir countDir; /**< \brief Timer counting mode */
110 } IfxGtm_Atom_Timer_Base;
111
112 /** \} */
113
114 /** \addtogroup IfxLld_Gtm_Atom_Timer_Data_Structures
115 * \{ */
116 /** \brief TOM Timer interface
117 */
118 typedef struct
119 {
120 IfxGtm_Atom_Timer_Base base; /**< \brief Timer base structure */
121 Ifx_GTM *gtm; /**< \brief GTM module used for the timer functionality */
122 Ifx_GTM_ATOM *atom; /**< \brief ATOM used for the timer functionality */
123 Ifx_GTM_ATOM_AGC *agc; /**< \brief Pointer to the AGC object */
124 IfxGtm_Atom atomIndex; /**< \brief Enum for ATOM objects */
125 IfxGtm_Atom_Ch timerChannel; /**< \brief ATOM channel used for the timer */
126 IfxGtm_Atom_Ch triggerChannel; /**< \brief ATOM channel used for the trigger, if identical to the timerChannel, the trigger interrupt is having the same interrupt level as the timer interrupt */
127 uint16 channelsMask; /**< \brief Mask for channels to be modified together */
128 Ifx_TimerValue offset; /**< \brief Timer initial offset in ticks */
129 Ifx_GTM_CDTM_DTM *dtm; /**< \brief Pointer to DTM object used by ATOM */
130 IfxGtm_Dtm_Ch dtmChannel; /**< \brief DTM channel */
131 uint32 agcDisableUpdate; /**< \brief AGC value for disable update */
132 uint32 agcApplyUpdate; /**< \brief AGC value for apply update */
133 } IfxGtm_Atom_Timer;
134
135 /** \brief Configuration structure for TOM Timer
136 */
137 typedef struct
138 {
139 IfxStdIf_Timer_Config base; /**< \brief Standard interface timer configuration */
140 Ifx_GTM *gtm; /**< \brief GTM used for the timer functionality */
141 IfxGtm_Atom atom; /**< \brief ATOM used for the timer functionality */
142 IfxGtm_Atom_Ch timerChannel; /**< \brief ATOM channel used for the timer */
143 IfxGtm_Atom_ToutMap *triggerOut; /**< \brief ATOM channel used for the trigger output, can be identical to the timer channe */
144 IfxGtm_Cmu_Clk clock; /**< \brief Timer input clock */
145 IfxGtm_IrqMode irqModeTimer; /**< \brief Interrupt mode for the timer */
146 IfxGtm_IrqMode irqModeTrigger; /**< \brief Interrupt mode for the trigger */
147 IfxGtm_Dtm_ClockSource dtmClockSource; /**< \brief DTM clock source */
148 boolean initPins; /**< \brief TRUE: Initialize pins in driver
149 * FALSE: Don't initialize pins in driver : user handles separately */
150 } IfxGtm_Atom_Timer_Config;
151
152 /** \} */
153
154 /** \addtogroup IfxLld_Gtm_Atom_Timer_Timer_StdIf_Functions
155 * \{ */
156
157 /******************************************************************************/
158 /*-------------------------Global Function Prototypes-------------------------*/
159 /******************************************************************************/
160
161 /** \brief Returns the timer event
162 * \see IfxStdIf_Timer_AckTimerIrq
163 * \param driver ATOM Timer interface Handle
164 * \return Timer event
165 */
166 IFX_EXTERN boolean IfxGtm_Atom_Timer_acknowledgeTimerIrq(IfxGtm_Atom_Timer *driver);
167
168 /** \brief Returns the trigger event
169 * \see IfxStdIf_Timer_AckTriggerIrq
170 * \param driver ATOM Timer interface Handle
171 * \return Trigger event
172 */
173 IFX_EXTERN boolean IfxGtm_Atom_Timer_acknowledgeTriggerIrq(IfxGtm_Atom_Timer *driver);
174
175 /** \brief Add a channel to the channel mask
176 * Channels present in the mask are started, stopped, updated at the same time as the timer:
177 * IfxGtm_Atom_Timer_applyUpdate, IfxGtm_Atom_Timer_disableUpdate, IfxGtm_Atom_Timer_stop, IfxGtm_Atom_Timer_run
178 * \param driver ATOM Timer interface Handle
179 * \param channel Channel to ba added to the mask
180 * \return None
181 */
182 IFX_EXTERN void IfxGtm_Atom_Timer_addToChannelMask(IfxGtm_Atom_Timer *driver, IfxGtm_Atom_Ch channel);
183
184 /** \brief Enables the transfer of the shadow registers
185 * \see IfxStdIf_Timer_ApplyUpdate
186 * \param driver ATOM Timer interface Handle
187 * \return None
188 */
189 IFX_EXTERN void IfxGtm_Atom_Timer_applyUpdate(IfxGtm_Atom_Timer *driver);
190
191 /** \brief Disables the upadte
192 * \see IfxStdIf_Timer_DisableUpdate
193 * \param driver ATOM Timer interface Handle
194 * \return None
195 */
196 IFX_EXTERN void IfxGtm_Atom_Timer_disableUpdate(IfxGtm_Atom_Timer *driver);
197
198 /** \brief Returns the frequency
199 * \see IfxStdIf_Timer_GetFrequency
200 * \param driver ATOM Timer interface Handle
201 * \return Frequency
202 */
203 IFX_EXTERN float32 IfxGtm_Atom_Timer_getFrequency(IfxGtm_Atom_Timer *driver);
204
205 /** \brief Returns the Input frequncy
206 * \see IfxStdIf_Timer_GetInputFrequency
207 * \param driver ATOM Timer interface Handle
208 * \return Frequency
209 */
210 IFX_EXTERN float32 IfxGtm_Atom_Timer_getInputFrequency(IfxGtm_Atom_Timer *driver);
211
212 /** \brief Returns the period of the timer
213 * \see IfxStdIf_Timer_GetPeriod
214 * \param driver ATOM Timer interface Handle
215 * \return Period
216 */
217 IFX_EXTERN Ifx_TimerValue IfxGtm_Atom_Timer_getPeriod(IfxGtm_Atom_Timer *driver);
218
219 /** \brief Returns the resolution
220 * \see IfxStdIf_Timer_GetResolution
221 * \param driver ATOM Timer interface Handle
222 * \return Resolution
223 */
224 IFX_EXTERN float32 IfxGtm_Atom_Timer_getResolution(IfxGtm_Atom_Timer *driver);
225
226 /** \brief Returns the trigger point
227 * \param driver ATOM Timer interface Handle
228 * \return Trigger point
229 */
230 IFX_EXTERN Ifx_TimerValue IfxGtm_Atom_Timer_getTrigger(IfxGtm_Atom_Timer *driver);
231
232 /** \brief Runs the timer
233 * \see IfxStdIf_Timer_Run
234 * \param driver ATOM Timer interface Handle
235 * \return None
236 */
237 IFX_EXTERN void IfxGtm_Atom_Timer_run(IfxGtm_Atom_Timer *driver);
238
239 /** \brief Sets the frequency
240 * \see IfxStdIf_Timer_SetFrequency
241 * \param driver ATOM Timer interface Handle
242 * \param frequency Frequency
243 * \return TRUE on success else FALSE
244 */
245 IFX_EXTERN boolean IfxGtm_Atom_Timer_setFrequency(IfxGtm_Atom_Timer *driver, float32 frequency);
246
247 /** \brief Sets the period for the timer
248 * \see IfxStdIf_Timer_SetPeriod
249 * \param driver ATOM Timer interface Handle
250 * \param period Period value
251 * \return TRUE on success else FALSE
252 */
253 IFX_EXTERN boolean IfxGtm_Atom_Timer_setPeriod(IfxGtm_Atom_Timer *driver, Ifx_TimerValue period);
254
255 /** \brief Sets the single shot mode of the timer
256 * \see IfxStdIf_Timer_SetSingleMode
257 * \param driver ATOM Timer interface Handle
258 * \param enabled If TRUE, sets the single shot mode
259 * \return None
260 */
261 IFX_EXTERN void IfxGtm_Atom_Timer_setSingleMode(IfxGtm_Atom_Timer *driver, boolean enabled);
262
263 /** \brief Sets the trigger
264 * \see IfxStdIf_Timer_SetTrigger
265 * \param driver ATOM Timer interface Handle
266 * \param triggerPoint Trigger point value
267 * \return None
268 */
269 IFX_EXTERN void IfxGtm_Atom_Timer_setTrigger(IfxGtm_Atom_Timer *driver, Ifx_TimerValue triggerPoint);
270
271 /** \brief Initializes the standard interface timer
272 * \param stdif Standard interface object, will be initialized by the function
273 * \param driver Interface driver to be used by the standard interface. must be initialised separately
274 * \return TRUE on success else FALSE
275 */
276 IFX_EXTERN boolean IfxGtm_Atom_Timer_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxGtm_Atom_Timer *driver);
277
278 /** \brief Stops the timer
279 * \see IfxStdIf_Timer_Stop
280 * \param driver ATOM Timer interface Handle
281 * \return None
282 */
283 IFX_EXTERN void IfxGtm_Atom_Timer_stop(IfxGtm_Atom_Timer *driver);
284
285 /** \brief Updates the input frequency
286 * \see IfxStdIf_Timer_UpdateInputFrequency
287 * \param driver ATOM Timer interface Handle
288 * \return None
289 */
290 IFX_EXTERN void IfxGtm_Atom_Timer_updateInputFrequency(IfxGtm_Atom_Timer *driver);
291
292 /** \} */
293
294 /** \addtogroup IfxLld_Gtm_Atom_Timer_Timer_Functions
295 * \{ */
296
297 /******************************************************************************/
298 /*-------------------------Global Function Prototypes-------------------------*/
299 /******************************************************************************/
300
301 /** \brief Returns the initial timer offset in ticks
302 * \see IfxStdIf_Timer_GetOffset
303 * \param driver ATOM Timer interface Handle
304 * \return Returns the initial timer offset in ticks
305 */
306 IFX_EXTERN Ifx_TimerValue IfxGtm_Atom_Timer_getOffset(IfxGtm_Atom_Timer *driver);
307
308 /** \brief Returns the pointer to timer channel
309 * \param driver ATOM Timer interface Handle
310 * \return Pointer
311 */
312 IFX_EXTERN volatile uint32 *IfxGtm_Atom_Timer_getPointer(IfxGtm_Atom_Timer *driver);
313
314 /** \brief Returns the pointer to trigger channel
315 * \param driver ATOM Timer interface Handle
316 * \return Pointer
317 */
318 IFX_EXTERN volatile uint32 *IfxGtm_Atom_Timer_getTriggerPointer(IfxGtm_Atom_Timer *driver);
319
320 /** \brief Initialises the timer object
321 * \param driver ATOM Timer interface Handle
322 * \param config Configuration structure for ATOM Timer
323 * \return TRUE on success else FALSE
324 */
325 IFX_EXTERN boolean IfxGtm_Atom_Timer_init(IfxGtm_Atom_Timer *driver, const IfxGtm_Atom_Timer_Config *config);
326
327 /** \brief Initializes the configuration structure to default
328 * \param config Configuration structure for ATOM Timer
329 * \param gtm Pointer to GTM module
330 * \return None
331 */
332 IFX_EXTERN void IfxGtm_Atom_Timer_initConfig(IfxGtm_Atom_Timer_Config *config, Ifx_GTM *gtm);
333
334 /** \} */
335
336 #endif /* IFXGTM_ATOM_TIMER_H */
IfxGtm_Atom_Timer_Config::triggerOut
IfxGtm_Atom_ToutMap * triggerOut
ATOM channel used for the trigger output, can be identical to the timer channe.
Definition: IfxGtm_Atom_Timer.h:143
IfxGtm_Atom_Timer_stdIfTimerInit
IFX_EXTERN boolean IfxGtm_Atom_Timer_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxGtm_Atom_Timer *driver)
Initializes the standard interface timer.
Definition: IfxGtm_Atom_Timer.c:381
IfxGtm_Atom_Timer_setSingleMode
IFX_EXTERN void IfxGtm_Atom_Timer_setSingleMode(IfxGtm_Atom_Timer *driver, boolean enabled)
Sets the single shot mode of the timer.
Definition: IfxGtm_Atom_Timer.c:369
IfxGtm_Atom_Timer_Config::initPins
boolean initPins
TRUE: Initialize pins in driver FALSE: Don&#39;t initialize pins in driver : user handles separately...
Definition: IfxGtm_Atom_Timer.h:148
IfxGtm_Atom_Timer_getFrequency
IFX_EXTERN float32 IfxGtm_Atom_Timer_getFrequency(IfxGtm_Atom_Timer *driver)
Returns the frequency.
Definition: IfxGtm_Atom_Timer.c:108
IfxGtm_Atom_Timer::atom
Ifx_GTM_ATOM * atom
ATOM used for the timer functionality.
Definition: IfxGtm_Atom_Timer.h:122
IfxGtm_Atom_Timer::gtm
Ifx_GTM * gtm
GTM module used for the timer functionality.
Definition: IfxGtm_Atom_Timer.h:121
IfxGtm_Atom_Timer_setPeriod
IFX_EXTERN boolean IfxGtm_Atom_Timer_setPeriod(IfxGtm_Atom_Timer *driver, Ifx_TimerValue period)
Sets the period for the timer.
Definition: IfxGtm_Atom_Timer.c:355
IfxGtm_Atom_Timer_Config::irqModeTrigger
IfxGtm_IrqMode irqModeTrigger
Interrupt mode for the trigger.
Definition: IfxGtm_Atom_Timer.h:146
IfxGtm_Atom_Timer_setFrequency
IFX_EXTERN boolean IfxGtm_Atom_Timer_setFrequency(IfxGtm_Atom_Timer *driver, float32 frequency)
Sets the frequency.
Definition: IfxGtm_Atom_Timer.c:347
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxGtm_Atom_Timer::timerChannel
IfxGtm_Atom_Ch timerChannel
ATOM channel used for the timer.
Definition: IfxGtm_Atom_Timer.h:125
IfxGtm_Atom_Timer
TOM Timer interface.
Definition: IfxGtm_Atom_Timer.h:118
IfxGtm_Atom_Timer::triggerChannel
IfxGtm_Atom_Ch triggerChannel
ATOM channel used for the trigger, if identical to the timerChannel, the trigger interrupt is having ...
Definition: IfxGtm_Atom_Timer.h:126
IfxGtm_Atom_Timer_getPointer
IFX_EXTERN volatile uint32 * IfxGtm_Atom_Timer_getPointer(IfxGtm_Atom_Timer *driver)
Returns the pointer to timer channel.
Definition: IfxGtm_Atom_Timer.c:132
float32
float float32
Definition: Platform_Types.h:170
IfxStdIf_Timer_
Standard interface object.
Definition: IfxStdIf_Timer.h:237
IfxGtm_PinMap.h
GTM I/O map.
IfxGtm_Atom
IfxGtm_Atom
Enum for ATOM objects.
Definition: IfxGtm_cfg.h:243
IfxGtm_Atom_Timer_Base
Structure for the timer base.
Definition: IfxGtm_Atom_Timer.h:104
IfxGtm_Atom_Timer_Config::atom
IfxGtm_Atom atom
ATOM used for the timer functionality.
Definition: IfxGtm_Atom_Timer.h:141
IfxGtm_Atom_Timer_setTrigger
IFX_EXTERN void IfxGtm_Atom_Timer_setTrigger(IfxGtm_Atom_Timer *driver, Ifx_TimerValue triggerPoint)
Sets the trigger.
Definition: IfxGtm_Atom_Timer.c:375
IfxGtm_Atom_Timer_getOffset
IFX_EXTERN Ifx_TimerValue IfxGtm_Atom_Timer_getOffset(IfxGtm_Atom_Timer *driver)
Returns the initial timer offset in ticks.
Definition: IfxGtm_Atom_Timer.c:120
IfxGtm_Atom_Timer_Base::triggerEnabled
boolean triggerEnabled
If TRUE, the trigger functionality is Initialised.
Definition: IfxGtm_Atom_Timer.h:107
IfxStdIf_Timer_Config
Timer configuration.
Definition: IfxStdIf_Timer.h:272
IfxGtm_Atom_Timer_initConfig
IFX_EXTERN void IfxGtm_Atom_Timer_initConfig(IfxGtm_Atom_Timer_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default.
Definition: IfxGtm_Atom_Timer.c:324
IfxGtm_Atom_Timer_addToChannelMask
IFX_EXTERN void IfxGtm_Atom_Timer_addToChannelMask(IfxGtm_Atom_Timer *driver, IfxGtm_Atom_Ch channel)
Add a channel to the channel mask Channels present in the mask are started, stopped, updated at the same time as the timer: IfxGtm_Atom_Timer_applyUpdate, IfxGtm_Atom_Timer_disableUpdate, IfxGtm_Atom_Timer_stop, IfxGtm_Atom_Timer_run.
Definition: IfxGtm_Atom_Timer.c:88
IfxGtm_Atom_Timer::atomIndex
IfxGtm_Atom atomIndex
Enum for ATOM objects.
Definition: IfxGtm_Atom_Timer.h:124
IfxGtm_Atom_Timer_stop
IFX_EXTERN void IfxGtm_Atom_Timer_stop(IfxGtm_Atom_Timer *driver)
Stops the timer.
Definition: IfxGtm_Atom_Timer.c:411
IfxGtm_Dtm.h
GTM basic functionality.
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxGtm_Atom_Timer_Config::dtmClockSource
IfxGtm_Dtm_ClockSource dtmClockSource
DTM clock source.
Definition: IfxGtm_Atom_Timer.h:147
IfxGtm_Atom_Timer::dtm
Ifx_GTM_CDTM_DTM * dtm
Pointer to DTM object used by ATOM.
Definition: IfxGtm_Atom_Timer.h:129
IfxGtm_Atom_Timer_getResolution
IFX_EXTERN float32 IfxGtm_Atom_Timer_getResolution(IfxGtm_Atom_Timer *driver)
Returns the resolution.
Definition: IfxGtm_Atom_Timer.c:138
IfxGtm_Atom_Timer::agcApplyUpdate
uint32 agcApplyUpdate
AGC value for apply update.
Definition: IfxGtm_Atom_Timer.h:132
IfxGtm_Atom_ToutMap
ATOM TOUT pin mapping structure.
Definition: IfxGtm_PinMap.h:110
IfxGtm_Atom_Timer::dtmChannel
IfxGtm_Dtm_Ch dtmChannel
DTM channel.
Definition: IfxGtm_Atom_Timer.h:130
IfxGtm_Atom_Timer_Config::base
IfxStdIf_Timer_Config base
Standard interface timer configuration.
Definition: IfxGtm_Atom_Timer.h:139
IfxGtm_Atom_Timer::channelsMask
uint16 channelsMask
Mask for channels to be modified together.
Definition: IfxGtm_Atom_Timer.h:127
IfxGtm_Atom_Timer_disableUpdate
IFX_EXTERN void IfxGtm_Atom_Timer_disableUpdate(IfxGtm_Atom_Timer *driver)
Disables the upadte.
Definition: IfxGtm_Atom_Timer.c:102
IfxGtm_Cmu_Clk
IfxGtm_Cmu_Clk
Definition: IfxGtm_Cmu.h:64
IfxGtm_Atom_Timer_updateInputFrequency
IFX_EXTERN void IfxGtm_Atom_Timer_updateInputFrequency(IfxGtm_Atom_Timer *driver)
Updates the input frequency.
Definition: IfxGtm_Atom_Timer.c:417
IfxGtm_Atom_Timer_Base::clockFreq
float32 clockFreq
Timer input clock frequency (cached value)
Definition: IfxGtm_Atom_Timer.h:108
IfxStdIf_Timer.h
Standard interface: Timer.
IfxGtm_Dtm_ClockSource
IfxGtm_Dtm_ClockSource
Clock source for DTM object Definition in IfxGTM.DTM[i].CTRL.B.CLKSEL ( i = 0 to 35) ...
Definition: IfxGtm_Dtm.h:70
IfxGtm_Atom_Timer_acknowledgeTriggerIrq
IFX_EXTERN boolean IfxGtm_Atom_Timer_acknowledgeTriggerIrq(IfxGtm_Atom_Timer *driver)
Returns the trigger event.
Definition: IfxGtm_Atom_Timer.c:72
IfxGtm_Atom_Timer::agc
Ifx_GTM_ATOM_AGC * agc
Pointer to the AGC object.
Definition: IfxGtm_Atom_Timer.h:123
IfxStdIf_Timer_CountDir
IfxStdIf_Timer_CountDir
Timer increment direction.
Definition: IfxStdIf_Timer.h:85
IfxGtm_Atom_Timer_Config::irqModeTimer
IfxGtm_IrqMode irqModeTimer
Interrupt mode for the timer.
Definition: IfxGtm_Atom_Timer.h:145
IfxGtm_Atom_Timer_acknowledgeTimerIrq
IFX_EXTERN boolean IfxGtm_Atom_Timer_acknowledgeTimerIrq(IfxGtm_Atom_Timer *driver)
Returns the timer event.
Definition: IfxGtm_Atom_Timer.c:56
IfxGtm_Atom_Timer_getInputFrequency
IFX_EXTERN float32 IfxGtm_Atom_Timer_getInputFrequency(IfxGtm_Atom_Timer *driver)
Returns the Input frequncy.
Definition: IfxGtm_Atom_Timer.c:114
IfxGtm_Atom_Timer::agcDisableUpdate
uint32 agcDisableUpdate
AGC value for disable update.
Definition: IfxGtm_Atom_Timer.h:131
IfxGtm_Atom_Timer_getTrigger
IFX_EXTERN Ifx_TimerValue IfxGtm_Atom_Timer_getTrigger(IfxGtm_Atom_Timer *driver)
Returns the trigger point.
Definition: IfxGtm_Atom_Timer.c:144
IfxGtm_Dtm_Ch
IfxGtm_Dtm_Ch
Enum for DTM channels.
Definition: IfxGtm_cfg.h:323
IfxGtm_Atom_Timer_Config::clock
IfxGtm_Cmu_Clk clock
Timer input clock.
Definition: IfxGtm_Atom_Timer.h:144
IfxGtm_Atom_Timer::base
IfxGtm_Atom_Timer_Base base
Timer base structure.
Definition: IfxGtm_Atom_Timer.h:120
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxGtm_Atom_Timer_getPeriod
IFX_EXTERN Ifx_TimerValue IfxGtm_Atom_Timer_getPeriod(IfxGtm_Atom_Timer *driver)
Returns the period of the timer.
Definition: IfxGtm_Atom_Timer.c:126
IfxGtm_Atom_Timer_run
IFX_EXTERN void IfxGtm_Atom_Timer_run(IfxGtm_Atom_Timer *driver)
Runs the timer.
Definition: IfxGtm_Atom_Timer.c:341
IfxGtm_Atom_Timer_init
IFX_EXTERN boolean IfxGtm_Atom_Timer_init(IfxGtm_Atom_Timer *driver, const IfxGtm_Atom_Timer_Config *config)
Initialises the timer object.
Definition: IfxGtm_Atom_Timer.c:156
IfxGtm_Atom_Timer_applyUpdate
IFX_EXTERN void IfxGtm_Atom_Timer_applyUpdate(IfxGtm_Atom_Timer *driver)
Enables the transfer of the shadow registers.
Definition: IfxGtm_Atom_Timer.c:96
IfxGtm_IrqMode
IfxGtm_IrqMode
Enum for GTM interrupt modes.
Definition: IfxGtm.h:64
IfxGtm_Atom_Timer_Base::period
Ifx_TimerValue period
Timer period in ticks (cached value)
Definition: IfxGtm_Atom_Timer.h:106
IfxGtm_Cmu.h
GTM basic functionality.
IfxGtm_Atom_Timer_Base::countDir
IfxStdIf_Timer_CountDir countDir
Timer counting mode.
Definition: IfxGtm_Atom_Timer.h:109
IfxGtm_Atom_Timer_Config
Configuration structure for TOM Timer.
Definition: IfxGtm_Atom_Timer.h:137
IfxGtm_Atom.h
GTM basic functionality.
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
IfxGtm_Atom_Timer_getTriggerPointer
IFX_EXTERN volatile uint32 * IfxGtm_Atom_Timer_getTriggerPointer(IfxGtm_Atom_Timer *driver)
Returns the pointer to trigger channel.
Definition: IfxGtm_Atom_Timer.c:150
IfxGtm_Atom_Timer::offset
Ifx_TimerValue offset
Timer initial offset in ticks.
Definition: IfxGtm_Atom_Timer.h:128
IfxGtm_Atom_Ch
IfxGtm_Atom_Ch
Enum for ATOM channels.
Definition: IfxGtm_cfg.h:258


iLLD_TC38A: IfxGtm_Cmu.c Source File

  • Gtm
  • Std
IfxGtm_Cmu.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Cmu.c
3 * \brief GTM basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxGtm_Cmu.h"
47 #include "IfxGtm_Dpll.h"
48 #include "Scu/Std/IfxScuCcu.h"
49 #include "Scu/Std/IfxScuWdt.h"
50 #include "math.h"
51 #include "IfxGtm_bf.h"
52 #include "IfxGtm.h"
53
54 /******************************************************************************/
55 /*-------------------------Function Implementations---------------------------*/
56 /******************************************************************************/
57
58 void IfxGtm_Cmu_enableClocks(Ifx_GTM *gtm, uint32 clkMask)
59 {
60 gtm->CMU.CLK_EN.U = clkMask;
61 }
62
63
64 float32 IfxGtm_Cmu_getClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean assumeEnabled)
65 {
66 float32 frequency;
67
68 if ((IfxGtm_Cmu_isClkClockEnabled(gtm, clkIndex) != FALSE) || (assumeEnabled != FALSE))
69 {
70 switch (clkIndex)
71 {
72 case IfxGtm_Cmu_Clk_0:
73 case IfxGtm_Cmu_Clk_1:
74 case IfxGtm_Cmu_Clk_2:
75 case IfxGtm_Cmu_Clk_3:
76 case IfxGtm_Cmu_Clk_4:
77 case IfxGtm_Cmu_Clk_5:
78 frequency = IfxGtm_Cmu_getGclkFrequency(gtm) / (gtm->CMU.CLK[clkIndex].CTRL.B.CLK_CNT + 1);
79 break;
80 case IfxGtm_Cmu_Clk_6:
81
82 if (gtm->CMU.CLK[clkIndex].CTRL.B.CLK_SEL == 0)
83 {
84 frequency = IfxGtm_Cmu_getGclkFrequency(gtm) / (gtm->CMU.CLK[clkIndex].CTRL.B.CLK_CNT + 1);
85 }
86 else
87 {
88 frequency = IfxGtm_Dpll_getSubIncFrequency(gtm, IfxGtm_Dpll_SubInc_2);
89 }
90
91 break;
92 case IfxGtm_Cmu_Clk_7:
93
94 if (gtm->CMU.CLK[clkIndex].CTRL.B.CLK_SEL == 0)
95 {
96 frequency = IfxGtm_Cmu_getGclkFrequency(gtm) / (gtm->CMU.CLK[clkIndex].CTRL.B.CLK_CNT + 1);
97 }
98 else
99 {
100 frequency = IfxGtm_Dpll_getSubIncFrequency(gtm, IfxGtm_Dpll_SubInc_1);
101 }
102
103 break;
104 default:
105 frequency = 0.0;
106 break;
107 }
108 }
109 else
110 {
111 frequency = 0.0;
112 }
113
114 return frequency;
115 }
116
117
118 float32 IfxGtm_Cmu_getEclkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex, boolean assumeEnabled)
119 {
120 float32 frequency;
121
122 if (IfxGtm_Cmu_isEclkClockEnabled(gtm, clkIndex) || (assumeEnabled != FALSE))
123 {
124 float32 Z = gtm->CMU.ECLK[clkIndex].NUM.B.ECLK_NUM;
125 float32 N = gtm->CMU.ECLK[clkIndex].DEN.B.ECLK_DEN;
126 float32 multiplier = N / Z / 2;
127 frequency = IfxGtm_Cmu_getGclkFrequency(gtm) * multiplier;
128 }
129 else
130 {
131 frequency = 0.0;
132 }
133
134 return frequency;
135 }
136
137
138 float32 IfxGtm_Cmu_getFxClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Fxclk clkIndex, boolean assumeEnabled)
139 {
140 float32 frequency;
141 uint8 fxSelect;
142
143 if (IfxGtm_Cmu_isFxClockEnabled(gtm) || (assumeEnabled != FALSE))
144 {
145 fxSelect = gtm->CMU.FXCLK.CTRL.B.FXCLK_SEL;
146
147 if (fxSelect == 0)
148 {
149 frequency = IfxGtm_Cmu_getGclkFrequency(gtm);
150 }
151 else if (fxSelect <= 6)
152 {
153 frequency = IfxGtm_Cmu_getClkFrequency(gtm, IfxGtm_Cmu_Clk_5, assumeEnabled);
154 }
155 else if (fxSelect == 7)
156 {
157 frequency = IfxGtm_Cmu_getClkFrequency(gtm, IfxGtm_Cmu_Clk_6, assumeEnabled);
158 }
159 else if (fxSelect == 8)
160 {
161 frequency = IfxGtm_Cmu_getClkFrequency(gtm, IfxGtm_Cmu_Clk_7, assumeEnabled);
162 }
163 else
164 {
165 frequency = IfxGtm_Cmu_getGclkFrequency(gtm);
166 }
167
168 switch (clkIndex)
169 {
170 case IfxGtm_Cmu_Fxclk_0:
171 frequency = frequency / 1;
172 break;
173 case IfxGtm_Cmu_Fxclk_1:
174 frequency = frequency / 16;
175 break;
176 case IfxGtm_Cmu_Fxclk_2:
177 frequency = frequency / 256;
178 break;
179 case IfxGtm_Cmu_Fxclk_3:
180 frequency = frequency / 4096;
181 break;
182 case IfxGtm_Cmu_Fxclk_4:
183 frequency = frequency / 65536;
184 break;
185 default:
186 frequency = 0.0;
187 break;
188 }
189 }
190 else
191 {
192 frequency = 0.0;
193 }
194
195 return frequency;
196 }
197
198
199 float32 IfxGtm_Cmu_getGclkFrequency(Ifx_GTM *gtm)
200 {
201 float32 N = gtm->CMU.GCLK_DEN.B.GCLK_DEN;
202 float32 Z = gtm->CMU.GCLK_NUM.B.GCLK_NUM;
203 float32 multiplier = N / Z;
204
205 return IfxGtm_Cmu_getModuleFrequency(gtm) * multiplier;
206 }
207
208
209 float32 IfxGtm_Cmu_getModuleFrequency(Ifx_GTM *gtm)
210 {
211 return IfxGtm_getClusterFrequency(gtm, IfxGtm_Cluster_0); /* CMU module frequency is cluster 0 clock frequency */
212 }
213
214
215 boolean IfxGtm_Cmu_isClkClockEnabled(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex)
216 {
217 return ((gtm->CMU.CLK_EN.U >> (2 * clkIndex)) & IFX_GTM_CMU_CLK_EN_EN_CLK0_MSK) == 0x3;
218 }
219
220
221 boolean IfxGtm_Cmu_isEclkClockEnabled(Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex)
222 {
223 return ((gtm->CMU.CLK_EN.U >> (2 * clkIndex + 16)) & IFX_GTM_CMU_CLK_EN_EN_CLK0_MSK) == 0x3;
224 }
225
226
227 boolean IfxGtm_Cmu_isFxClockEnabled(Ifx_GTM *gtm)
228 {
229 return gtm->CMU.CLK_EN.B.EN_FXCLK == 0x3;
230 }
231
232
233 void IfxGtm_Cmu_selectClkInput(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean useGlobal)
234 {
235 switch (clkIndex)
236 {
237 case IfxGtm_Cmu_Clk_6:
238 gtm->CMU.CLK[clkIndex].CTRL.B.CLK_SEL = useGlobal ? 0 : 1;
239 break;
240 case IfxGtm_Cmu_Clk_7:
241 gtm->CMU.CLK[clkIndex].CTRL.B.CLK_SEL = useGlobal ? 0 : 1;
242 break;
243 default:
244 break;
245 }
246 }
247
248
249 void IfxGtm_Cmu_setClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, float32 frequency)
250 {
251 float32 t = (IfxGtm_Cmu_getGclkFrequency(gtm) / frequency) - 1;
252 uint32 cnt = (uint32)t;
253
254 if ((t - (float32)cnt) > 0.5)
255 { /* Round to nearest */
256 cnt++;
257 }
258
259 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
260 IfxScuWdt_clearCpuEndinit(psw);
261
262 switch (clkIndex)
263 {
264 case IfxGtm_Cmu_Clk_0:
265 case IfxGtm_Cmu_Clk_1:
266 case IfxGtm_Cmu_Clk_2:
267 case IfxGtm_Cmu_Clk_3:
268 case IfxGtm_Cmu_Clk_4:
269 case IfxGtm_Cmu_Clk_5:
270 gtm->CMU.CLK[clkIndex].CTRL.B.CLK_CNT = cnt;
271 break;
272 case IfxGtm_Cmu_Clk_6:
273 gtm->CMU.CLK[clkIndex].CTRL.B.CLK_CNT = cnt;
274 break;
275 case IfxGtm_Cmu_Clk_7:
276 gtm->CMU.CLK[clkIndex].CTRL.B.CLK_CNT = cnt;
277 break;
278 default:
279 break;
280 }
281
282 IfxScuWdt_setCpuEndinit(psw);
283 }
284
285
286 void IfxGtm_Cmu_setEclkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex, float32 frequency)
287 {
288 float32 f;
289 float32 bestDistance = frequency;
290 float32 fIn = IfxGtm_Cmu_getGclkFrequency(gtm) * 2;
291 uint32 z, n, nBest = 1, zBest = 1;
292 float32 t;
293
294 for (z = 1; z < 0xFFFFFF; z++)
295 {
296 boolean endLoop = FALSE;
297 t = fIn / z;
298
299 for (n = z; n > 0; n--)
300 {
301 float32 distance;
302 f = t * n;
303 distance = fabsf(frequency - f);
304
305 if (distance < bestDistance)
306 {
307 bestDistance = distance;
308 nBest = n;
309 zBest = z;
310 }
311
312 if (bestDistance < 0.1)
313 {
314 endLoop = TRUE;
315 break;
316 }
317 }
318
319 if (endLoop)
320 {
321 break;
322 }
323 }
324
325 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
326 IfxScuWdt_clearCpuEndinit(psw);
327 gtm->CMU.ECLK[clkIndex].NUM.B.ECLK_NUM = zBest;
328 gtm->CMU.ECLK[clkIndex].NUM.B.ECLK_NUM = zBest; /* write twice to be sure */
329 gtm->CMU.ECLK[clkIndex].DEN.B.ECLK_DEN = nBest;
330 IfxScuWdt_setCpuEndinit(psw);
331 }
332
333
334 void IfxGtm_Cmu_setGclkFrequency(Ifx_GTM *gtm, float32 frequency)
335 {
336 float32 f;
337 float32 bestDistance = frequency;
338
339 float32 fIn = IfxGtm_Cmu_getModuleFrequency(gtm);
340 uint32 z, n, nBest = 1, zBest = 1;
341 float32 t;
342
343 #if 1
344
345 for (z = 1; z < 0xFFFFFF; z++)
346 {
347 boolean endLoop = FALSE;
348 t = fIn / z;
349
350 for (n = z; n > 0; n--)
351 {
352 float32 distance;
353 f = t * n;
354 distance = fabsf(frequency - f);
355
356 if (distance < bestDistance)
357 {
358 bestDistance = distance;
359 nBest = n;
360 zBest = z;
361 }
362
363 if (bestDistance < 0.1)
364 {
365 endLoop = TRUE;
366 break;
367 }
368 }
369
370 if (endLoop)
371 {
372 break;
373 }
374 }
375
376 #else
377
378 for (n = 1; n < 0xFFFFFF; n++)
379 {
380 float32 distance;
381 /* get best z */
382 z = floorf(frequency * n / fIn);
383 t = fIn / n;
384
385 /* lower value */
386 f = t * z;
387 distance = fabsf(frequency - f);
388
389 if (distance < bestDistance)
390 {
391 bestDistance = distance;
392 nBest = n;
393 zBest = z;
394 }
395
396 /* upper value */
397 f = t * (z + 1);
398 distance = fabsf(frequency - f);
399
400 if (distance < bestDistance)
401 {
402 bestDistance = distance;
403 nBest = n;
404 zBest = z;
405 }
406
407 if (bestDistance == 0.0)
408 {
409 break;
410 }
411 }
412
413 #endif
414
415 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
416 IfxScuWdt_clearCpuEndinit(psw);
417 gtm->CMU.GCLK_NUM.B.GCLK_NUM = zBest;
418 gtm->CMU.GCLK_NUM.B.GCLK_NUM = zBest; /* write twice to be sure */
419 gtm->CMU.GCLK_DEN.B.GCLK_DEN = nBest;
420 IfxScuWdt_setCpuEndinit(psw);
421 }
IfxGtm_Cmu_Fxclk_4
Definition: IfxGtm_Cmu.h:89
IfxGtm_Cmu_enableClocks
void IfxGtm_Cmu_enableClocks(Ifx_GTM *gtm, uint32 clkMask)
Enable / Disable the configurable, fixed, and external clocks.
Definition: IfxGtm_Cmu.c:58
IfxGtm_getClusterFrequency
float32 IfxGtm_getClusterFrequency(Ifx_GTM *gtm, IfxGtm_Cluster cluster)
returns the cluster frequency of the GTM cluster. If the cluster is disabled, then it will return 0 a...
Definition: IfxGtm.c:80
IfxGtm_Cmu_Fxclk_3
Definition: IfxGtm_Cmu.h:88
IfxGtm_Dpll_SubInc_1
subincrement1
Definition: IfxGtm_cfg.h:304
IfxGtm_Cmu_Fxclk_0
Definition: IfxGtm_Cmu.h:85
uint32
unsigned long uint32
Definition: Platform_Types.h:116
float32
float float32
Definition: Platform_Types.h:170
IfxGtm_Cmu_getEclkFrequency
float32 IfxGtm_Cmu_getEclkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex, boolean assumeEnabled)
Returns the GTM external clock frequency in Hz.
Definition: IfxGtm_Cmu.c:118
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxGtm_Cmu_getGclkFrequency
float32 IfxGtm_Cmu_getGclkFrequency(Ifx_GTM *gtm)
Returns the GTM global clock frequency in Hz.
Definition: IfxGtm_Cmu.c:199
IfxGtm_Cmu_setClkFrequency
void IfxGtm_Cmu_setClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, float32 frequency)
Set the GTM configurable clock frequency in Hz.
Definition: IfxGtm_Cmu.c:249
IfxGtm_Dpll.h
GTM basic functionality.
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxGtm_Cmu_setEclkFrequency
void IfxGtm_Cmu_setEclkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex, float32 frequency)
Set the GTM external clock frequency in Hz.
Definition: IfxGtm_Cmu.c:286
IfxGtm_Cmu_Clk_5
Definition: IfxGtm_Cmu.h:71
IfxGtm_Cmu_isClkClockEnabled
boolean IfxGtm_Cmu_isClkClockEnabled(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex)
Returns the configurable clock enable status.
Definition: IfxGtm_Cmu.c:215
IfxGtm_Cmu_setGclkFrequency
void IfxGtm_Cmu_setGclkFrequency(Ifx_GTM *gtm, float32 frequency)
Set the GTM global clock frequency in Hz.
Definition: IfxGtm_Cmu.c:334
IfxGtm_Cmu_Fxclk_1
Definition: IfxGtm_Cmu.h:86
IfxScuWdt.h
SCU basic functionality.
IfxGtm_Cmu_Clk_0
Definition: IfxGtm_Cmu.h:66
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxGtm_Cmu_Clk_6
Definition: IfxGtm_Cmu.h:72
IfxGtm_Cmu_Fxclk
IfxGtm_Cmu_Fxclk
Definition: IfxGtm_Cmu.h:83
IfxGtm_Cmu_Clk_4
Definition: IfxGtm_Cmu.h:70
IfxGtm_Cmu_Eclk
IfxGtm_Cmu_Eclk
Definition: IfxGtm_Cmu.h:76
IfxGtm_Cmu_Fxclk_2
Definition: IfxGtm_Cmu.h:87
IfxGtm_Cmu_Clk
IfxGtm_Cmu_Clk
Definition: IfxGtm_Cmu.h:64
IfxGtm_Cmu_Clk_2
Definition: IfxGtm_Cmu.h:68
t
uint32 ins t
Definition: IfxCpu_IntrinsicsDcc.h:414
IfxGtm_Cmu_Clk_3
Definition: IfxGtm_Cmu.h:69
IfxGtm_Cluster_0
GTM cluster 0.
Definition: IfxGtm_cfg.h:289
IfxGtm_Cmu_getFxClkFrequency
float32 IfxGtm_Cmu_getFxClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Fxclk clkIndex, boolean assumeEnabled)
Returns the GTM fixed clock frequency in Hz.
Definition: IfxGtm_Cmu.c:138
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxGtm_Dpll_SubInc_2
subincrement2
Definition: IfxGtm_cfg.h:305
IfxScuCcu.h
SCU basic functionality.
IfxGtm_Cmu_getModuleFrequency
float32 IfxGtm_Cmu_getModuleFrequency(Ifx_GTM *gtm)
returns the CMU module frequency in Hz. This is only for CMU module frequency. For GTM SYS frequency:...
Definition: IfxGtm_Cmu.c:209
IfxGtm_Cmu.h
GTM basic functionality.
IfxGtm_Cmu_selectClkInput
void IfxGtm_Cmu_selectClkInput(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean useGlobal)
Select the clock input for CLK6 and CLK7 note The frequency can only be modified when the correspondi...
Definition: IfxGtm_Cmu.c:233
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxGtm_Cmu_isFxClockEnabled
boolean IfxGtm_Cmu_isFxClockEnabled(Ifx_GTM *gtm)
Returns the fixed clock enable status.
Definition: IfxGtm_Cmu.c:227
IfxGtm_Cmu_isEclkClockEnabled
boolean IfxGtm_Cmu_isEclkClockEnabled(Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex)
Returns the external clock enable status.
Definition: IfxGtm_Cmu.c:221
TRUE
#define TRUE
Definition: Platform_Types.h:90
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxGtm.h
GTM basic functionality.
IfxGtm_Cmu_Clk_1
Definition: IfxGtm_Cmu.h:67
IfxGtm_Dpll_getSubIncFrequency
float32 IfxGtm_Dpll_getSubIncFrequency(Ifx_GTM *gtm, IfxGtm_Dpll_SubInc index)
Dummy Function, returns 0.0F.
Definition: IfxGtm_Dpll.c:52
IfxGtm_Cmu_getClkFrequency
float32 IfxGtm_Cmu_getClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean assumeEnabled)
Returns the GTM configurable clock frequency in Hz.
Definition: IfxGtm_Cmu.c:64
IfxGtm_Cmu_Clk_7
Definition: IfxGtm_Cmu.h:73


iLLD_TC38A: IfxGtm_Cmu.h Source File

  • Gtm
  • Std
IfxGtm_Cmu.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Cmu.h
3 * \brief GTM basic functionality
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Gtm_Std_Cmu Cmu Basic Functionality
42 * \ingroup IfxLld_Gtm_Std
43 * \defgroup IfxLld_Gtm_Std_Cmu_CMUEnumerations CMU Enumerations
44 * \ingroup IfxLld_Gtm_Std_Cmu
45 * \defgroup IfxLld_Gtm_Std_Cmu_CMU_Basic_Functions CMU Basic Functions
46 * \ingroup IfxLld_Gtm_Std_Cmu
47 */
48
49 #ifndef IFXGTM_CMU_H
50 #define IFXGTM_CMU_H 1
51
52 /******************************************************************************/
53 /*----------------------------------Includes----------------------------------*/
54 /******************************************************************************/
55
56 #include "_Impl/IfxGtm_cfg.h"
57
58 /******************************************************************************/
59 /*--------------------------------Enumerations--------------------------------*/
60 /******************************************************************************/
61
62 /** \addtogroup IfxLld_Gtm_Std_Cmu_CMUEnumerations
63 * \{ */
64 typedef enum
65 {
66 IfxGtm_Cmu_Clk_0 = 0,
67 IfxGtm_Cmu_Clk_1,
68 IfxGtm_Cmu_Clk_2,
69 IfxGtm_Cmu_Clk_3,
70 IfxGtm_Cmu_Clk_4,
71 IfxGtm_Cmu_Clk_5,
72 IfxGtm_Cmu_Clk_6,
73 IfxGtm_Cmu_Clk_7
74 } IfxGtm_Cmu_Clk;
75
76 typedef enum
77 {
78 IfxGtm_Cmu_Eclk_0 = 0,
79 IfxGtm_Cmu_Eclk_1,
80 IfxGtm_Cmu_Eclk_2
81 } IfxGtm_Cmu_Eclk;
82
83 typedef enum
84 {
85 IfxGtm_Cmu_Fxclk_0 = 0,
86 IfxGtm_Cmu_Fxclk_1,
87 IfxGtm_Cmu_Fxclk_2,
88 IfxGtm_Cmu_Fxclk_3,
89 IfxGtm_Cmu_Fxclk_4
90 } IfxGtm_Cmu_Fxclk;
91
92 /** \brief Tim Filter counter frequency select
93 */
94 typedef enum
95 {
96 IfxGtm_Cmu_Tim_Filter_Clk_0, /**< \brief FLT_CNT counts with CMU_CLK0 */
97 IfxGtm_Cmu_Tim_Filter_Clk_1, /**< \brief FLT_CNT counts with CMU_CLK1 */
98 IfxGtm_Cmu_Tim_Filter_Clk_6, /**< \brief FLT_CNT counts with CMU_CLK6 */
99 IfxGtm_Cmu_Tim_Filter_Clk_7 /**< \brief FLT_CNT counts with CMU_CLK7 */
100 } IfxGtm_Cmu_Tim_Filter_Clk;
101
102 /** \} */
103
104 /** \addtogroup IfxLld_Gtm_Std_Cmu_CMU_Basic_Functions
105 * \{ */
106
107 /******************************************************************************/
108 /*-------------------------Global Function Prototypes-------------------------*/
109 /******************************************************************************/
110
111 /** \brief Enable / Disable the configurable, fixed, and external clocks
112 * \param gtm Pointer to GTM module
113 * \param clkMask Enable / Disable mask.
114 * \return None
115 */
116 IFX_EXTERN void IfxGtm_Cmu_enableClocks(Ifx_GTM *gtm, uint32 clkMask);
117
118 /** \brief Returns the GTM configurable clock frequency in Hz
119 * \param gtm Pointer to GTM module
120 * \param clkIndex Index of the configurable clock 0=CMU_CLK0, 1=CMU_CLK1, ...
121 * \param assumeEnabled When TRUE, attempt to calculate the frequency as if the clock is enabled.
122 * \return GTM configurable clock frequency in Hz
123 */
124 IFX_EXTERN float32 IfxGtm_Cmu_getClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean assumeEnabled);
125
126 /** \brief Returns the GTM external clock frequency in Hz
127 * \param gtm Pointer to GTM module
128 * \param clkIndex Index of the external clock 0=CMU_ECLK0, 1=CMU_ECLK1, ...
129 * \param assumeEnabled When TRUE, attempt to calculate the frequency as if the clock is enabled.
130 * \return GTM external clock frequency in Hz
131 */
132 IFX_EXTERN float32 IfxGtm_Cmu_getEclkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex, boolean assumeEnabled);
133
134 /** \brief Returns the GTM fixed clock frequency in Hz
135 * \param gtm Pointer to GTM module
136 * \param clkIndex Index of the fixed clock 0=CMU_FXCLK0, 1=CMU_FXCLK1, ...
137 * \param assumeEnabled When TRUE, attempt to calculate the frequency as if the clock is enabled.
138 * \return GTM fixed clock frequency in Hz
139 */
140 IFX_EXTERN float32 IfxGtm_Cmu_getFxClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Fxclk clkIndex, boolean assumeEnabled);
141
142 /** \brief Returns the GTM global clock frequency in Hz
143 * \param gtm Pointer to GTM module
144 * \return GTM global clock frequency in Hz
145 */
146 IFX_EXTERN float32 IfxGtm_Cmu_getGclkFrequency(Ifx_GTM *gtm);
147
148 /** \brief returns the CMU module frequency in Hz. This is only for CMU module frequency.
149 * For GTM SYS frequency: IfxGtm_getSysClkFrequency() is to be used.
150 * \param gtm Pointer to GTM module
151 * \return GTM module frequency in Hz
152 */
153 IFX_EXTERN float32 IfxGtm_Cmu_getModuleFrequency(Ifx_GTM *gtm);
154
155 /** \brief Returns the configurable clock enable status
156 * \param gtm Pointer to GTM module
157 * \param clkIndex Index of the configurable clock 0=CMU_CLK0, 1=CMU_CLK1, ...
158 * \return TRUE The clock is enabled, FALSE The clock is disabled
159 */
160 IFX_EXTERN boolean IfxGtm_Cmu_isClkClockEnabled(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex);
161
162 /** \brief Returns the external clock enable status
163 * \param gtm Pointer to GTM module
164 * \param clkIndex Index of the external clock 0=CMU_ECLK0, 1=CMU_ECLK1, ...
165 * \return TRUE The clock is enabled, FALSE The clock is disabled
166 */
167 IFX_EXTERN boolean IfxGtm_Cmu_isEclkClockEnabled(Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex);
168
169 /** \brief Returns the fixed clock enable status
170 * \param gtm Pointer to GTM module
171 * \return TRUE The clock is enabled, FALSE The clock is disabled
172 */
173 IFX_EXTERN boolean IfxGtm_Cmu_isFxClockEnabled(Ifx_GTM *gtm);
174
175 /** \brief Select the clock input for CLK6 and CLK7
176 * note The frequency can only be modified when the corresponding clock is disabled using IfxGtm_Cmu_enableClocks()
177 * \param gtm Pointer to GTM module
178 * \param clkIndex Index of the configurable clock 0=CMU_CLK0, 1=CMU_CLK1, ...
179 * \param useGlobal if TRUE, uses the global clock as an input, else use the SUB_INC input
180 * \return None
181 */
182 IFX_EXTERN void IfxGtm_Cmu_selectClkInput(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean useGlobal);
183
184 /** \brief Set the GTM configurable clock frequency in Hz
185 * \param gtm Pointer to GTM module
186 * \param clkIndex Index of the configurable clock 0=CMU_CLK0, 1=CMU_CLK1, ...
187 * \param frequency Frequency in Hz
188 * \return None
189 */
190 IFX_EXTERN void IfxGtm_Cmu_setClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, float32 frequency);
191
192 /** \brief Set the GTM external clock frequency in Hz
193 * \param gtm Pointer to GTM module
194 * \param clkIndex Index of the external clock 0=CMU_ECLK0, 1=CMU_ECLK1, ...
195 * \param frequency Frequency in Hz
196 * \return None
197 */
198 IFX_EXTERN void IfxGtm_Cmu_setEclkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex, float32 frequency);
199
200 /** \brief Set the GTM global clock frequency in Hz
201 * \param gtm Pointer to GTM module
202 * \param frequency Frequency in Hz
203 * \return None
204 */
205 IFX_EXTERN void IfxGtm_Cmu_setGclkFrequency(Ifx_GTM *gtm, float32 frequency);
206
207 /** \} */
208
209 #endif /* IFXGTM_CMU_H */
IfxGtm_Cmu_Fxclk_4
Definition: IfxGtm_Cmu.h:89
IfxGtm_Cmu_enableClocks
IFX_EXTERN void IfxGtm_Cmu_enableClocks(Ifx_GTM *gtm, uint32 clkMask)
Enable / Disable the configurable, fixed, and external clocks.
Definition: IfxGtm_Cmu.c:58
IfxGtm_Cmu_Fxclk_3
Definition: IfxGtm_Cmu.h:88
IfxGtm_Cmu_Tim_Filter_Clk_6
FLT_CNT counts with CMU_CLK6.
Definition: IfxGtm_Cmu.h:98
IfxGtm_Cmu_Fxclk_0
Definition: IfxGtm_Cmu.h:85
uint32
unsigned long uint32
Definition: Platform_Types.h:116
float32
float float32
Definition: Platform_Types.h:170
IfxGtm_Cmu_getEclkFrequency
IFX_EXTERN float32 IfxGtm_Cmu_getEclkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex, boolean assumeEnabled)
Returns the GTM external clock frequency in Hz.
Definition: IfxGtm_Cmu.c:118
IfxGtm_Cmu_getGclkFrequency
IFX_EXTERN float32 IfxGtm_Cmu_getGclkFrequency(Ifx_GTM *gtm)
Returns the GTM global clock frequency in Hz.
Definition: IfxGtm_Cmu.c:199
IfxGtm_Cmu_setClkFrequency
IFX_EXTERN void IfxGtm_Cmu_setClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, float32 frequency)
Set the GTM configurable clock frequency in Hz.
Definition: IfxGtm_Cmu.c:249
IfxGtm_Cmu_setEclkFrequency
IFX_EXTERN void IfxGtm_Cmu_setEclkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex, float32 frequency)
Set the GTM external clock frequency in Hz.
Definition: IfxGtm_Cmu.c:286
IfxGtm_Cmu_Tim_Filter_Clk_1
FLT_CNT counts with CMU_CLK1.
Definition: IfxGtm_Cmu.h:97
IfxGtm_Cmu_Clk_5
Definition: IfxGtm_Cmu.h:71
IfxGtm_Cmu_isClkClockEnabled
IFX_EXTERN boolean IfxGtm_Cmu_isClkClockEnabled(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex)
Returns the configurable clock enable status.
Definition: IfxGtm_Cmu.c:215
IfxGtm_Cmu_setGclkFrequency
IFX_EXTERN void IfxGtm_Cmu_setGclkFrequency(Ifx_GTM *gtm, float32 frequency)
Set the GTM global clock frequency in Hz.
Definition: IfxGtm_Cmu.c:334
IfxGtm_Cmu_Fxclk_1
Definition: IfxGtm_Cmu.h:86
IfxGtm_Cmu_Clk_0
Definition: IfxGtm_Cmu.h:66
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxGtm_Cmu_Tim_Filter_Clk
IfxGtm_Cmu_Tim_Filter_Clk
Tim Filter counter frequency select.
Definition: IfxGtm_Cmu.h:94
IfxGtm_Cmu_Clk_6
Definition: IfxGtm_Cmu.h:72
IfxGtm_Cmu_Fxclk
IfxGtm_Cmu_Fxclk
Definition: IfxGtm_Cmu.h:83
IfxGtm_Cmu_Clk_4
Definition: IfxGtm_Cmu.h:70
IfxGtm_Cmu_Tim_Filter_Clk_7
FLT_CNT counts with CMU_CLK7.
Definition: IfxGtm_Cmu.h:99
IfxGtm_Cmu_Eclk
IfxGtm_Cmu_Eclk
Definition: IfxGtm_Cmu.h:76
IfxGtm_Cmu_Fxclk_2
Definition: IfxGtm_Cmu.h:87
IfxGtm_Cmu_Clk
IfxGtm_Cmu_Clk
Definition: IfxGtm_Cmu.h:64
IfxGtm_Cmu_Clk_2
Definition: IfxGtm_Cmu.h:68
IfxGtm_Cmu_Clk_3
Definition: IfxGtm_Cmu.h:69
IfxGtm_Cmu_Eclk_1
Definition: IfxGtm_Cmu.h:79
IfxGtm_Cmu_getFxClkFrequency
IFX_EXTERN float32 IfxGtm_Cmu_getFxClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Fxclk clkIndex, boolean assumeEnabled)
Returns the GTM fixed clock frequency in Hz.
Definition: IfxGtm_Cmu.c:138
IfxGtm_Cmu_getModuleFrequency
IFX_EXTERN float32 IfxGtm_Cmu_getModuleFrequency(Ifx_GTM *gtm)
returns the CMU module frequency in Hz. This is only for CMU module frequency. For GTM SYS frequency:...
Definition: IfxGtm_Cmu.c:209
IfxGtm_Cmu_selectClkInput
IFX_EXTERN void IfxGtm_Cmu_selectClkInput(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean useGlobal)
Select the clock input for CLK6 and CLK7 note The frequency can only be modified when the correspondi...
Definition: IfxGtm_Cmu.c:233
IfxGtm_Cmu_isFxClockEnabled
IFX_EXTERN boolean IfxGtm_Cmu_isFxClockEnabled(Ifx_GTM *gtm)
Returns the fixed clock enable status.
Definition: IfxGtm_Cmu.c:227
IfxGtm_Cmu_isEclkClockEnabled
IFX_EXTERN boolean IfxGtm_Cmu_isEclkClockEnabled(Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex)
Returns the external clock enable status.
Definition: IfxGtm_Cmu.c:221
IfxGtm_Cmu_Eclk_2
Definition: IfxGtm_Cmu.h:80
IfxGtm_Cmu_Clk_1
Definition: IfxGtm_Cmu.h:67
IfxGtm_cfg.h
GTM on-chip implementation data.
IfxGtm_Cmu_Eclk_0
Definition: IfxGtm_Cmu.h:78
IfxGtm_Cmu_Tim_Filter_Clk_0
FLT_CNT counts with CMU_CLK0.
Definition: IfxGtm_Cmu.h:96
IfxGtm_Cmu_getClkFrequency
IFX_EXTERN float32 IfxGtm_Cmu_getClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean assumeEnabled)
Returns the GTM configurable clock frequency in Hz.
Definition: IfxGtm_Cmu.c:64
IfxGtm_Cmu_Clk_7
Definition: IfxGtm_Cmu.h:73


iLLD_TC38A: IfxGtm_Dpll.c Source File

  • Gtm
  • Std
IfxGtm_Dpll.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Dpll.c
3 * \brief GTM basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxGtm_Dpll.h"
47
48 /******************************************************************************/
49 /*-------------------------Function Implementations---------------------------*/
50 /******************************************************************************/
51
52 float32 IfxGtm_Dpll_getSubIncFrequency(Ifx_GTM *gtm, IfxGtm_Dpll_SubInc index)
53 {
54 IFX_UNUSED_PARAMETER(gtm)
55 IFX_UNUSED_PARAMETER(index)
56 return 0.0F;
57 }
float32
float float32
Definition: Platform_Types.h:170
IfxGtm_Dpll.h
GTM basic functionality.
IfxGtm_Dpll_SubInc
IfxGtm_Dpll_SubInc
Enum for Dpll subincrements.
Definition: IfxGtm_cfg.h:302
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
IfxGtm_Dpll_getSubIncFrequency
float32 IfxGtm_Dpll_getSubIncFrequency(Ifx_GTM *gtm, IfxGtm_Dpll_SubInc index)
Dummy Function, returns 0.0F.
Definition: IfxGtm_Dpll.c:52


iLLD_TC38A: IfxGtm_Dpll.h Source File

  • Gtm
  • Std
IfxGtm_Dpll.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Dpll.h
3 * \brief GTM basic functionality
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Gtm_Std_Dpll Dpll Basic Functionality
42 * \ingroup IfxLld_Gtm_Std
43 * \defgroup IfxLld_Gtm_Std_Dpll_Basic_Functions DPLL Basic Functions
44 * \ingroup IfxLld_Gtm_Std_Dpll
45 */
46
47 #ifndef IFXGTM_DPLL_H
48 #define IFXGTM_DPLL_H 1
49
50 /******************************************************************************/
51 /*----------------------------------Includes----------------------------------*/
52 /******************************************************************************/
53
54 #include "_Impl/IfxGtm_cfg.h"
55 /** \addtogroup IfxLld_Gtm_Std_Dpll_Basic_Functions
56 * \{ */
57
58 /******************************************************************************/
59 /*-------------------------Global Function Prototypes-------------------------*/
60 /******************************************************************************/
61
62 /** \brief Dummy Function, returns 0.0F
63 * \param gtm Pointer to GTM module
64 * \param index Dpll subincrement index
65 * \return frequency
66 */
67 IFX_EXTERN float32 IfxGtm_Dpll_getSubIncFrequency(Ifx_GTM *gtm, IfxGtm_Dpll_SubInc index);
68
69 /** \} */
70
71 #endif /* IFXGTM_DPLL_H */
float32
float float32
Definition: Platform_Types.h:170
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxGtm_Dpll_SubInc
IfxGtm_Dpll_SubInc
Enum for Dpll subincrements.
Definition: IfxGtm_cfg.h:302
IfxGtm_cfg.h
GTM on-chip implementation data.
IfxGtm_Dpll_getSubIncFrequency
IFX_EXTERN float32 IfxGtm_Dpll_getSubIncFrequency(Ifx_GTM *gtm, IfxGtm_Dpll_SubInc index)
Dummy Function, returns 0.0F.
Definition: IfxGtm_Dpll.c:52


iLLD_TC38A: IfxGtm_Dtm.c Source File

  • Gtm
  • Std
IfxGtm_Dtm.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Dtm.c
3 * \brief GTM basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxGtm_Dtm.h"
47
48 /******************************************************************************/
49 /*-------------------------Function Implementations---------------------------*/
50 /******************************************************************************/
51
52 Ifx_GTM_CDTM_DTM *IfxGtm_Dtm_getDtmPointer(Ifx_GTM *gtm, IfxGtm_Cdtm cdtmIndex, IfxGtm_Dtm dtmIndex)
53 {
54 Ifx_GTM_CDTM_DTM *dtmSFR;
55
56 if ((cdtmIndex > IfxGtm_Cdtm_none) && (cdtmIndex <= IfxGtm_Cdtm_6))
57 {
58 dtmSFR = &(gtm->CDTM[cdtmIndex].DTM[dtmIndex]);
59 }
60 else
61 {
62 dtmSFR = NULL_PTR;
63 }
64
65 return dtmSFR;
66 }
67
68
69 float32 IfxGtm_Dtm_getClockFrequency(Ifx_GTM *gtm, IfxGtm_Cdtm cdtmIndex, IfxGtm_Dtm dtmIndex)
70 {
71 Ifx_GTM_CDTM_DTM *dtm;
72 float32 frequency = 0.0;
73
74 dtm = IfxGtm_Dtm_getDtmPointer(gtm, cdtmIndex, dtmIndex);
75
76 if (dtm != NULL_PTR)
77 {
78 IfxGtm_Dtm_ClockSource clockSource;
79 clockSource = IfxGtm_Dtm_getClockSource(dtm);
80
81 if (dtmIndex <= IfxGtm_Dtm_3)
82 { /* Connected to TOMs */
83 switch (clockSource)
84 {
85 case IfxGtm_Dtm_ClockSource_systemClock:
86 frequency = IfxScuCcu_getGtmFrequency();
87 break;
88 case IfxGtm_Dtm_ClockSource_cmuClock0:
89 frequency = IfxGtm_Cmu_getFxClkFrequency(gtm, IfxGtm_Cmu_Clk_0, TRUE);
90 break;
91 case IfxGtm_Dtm_ClockSource_cmuClock1:
92 frequency = IfxGtm_Cmu_getClkFrequency(gtm, IfxGtm_Cmu_Fxclk_0, TRUE);
93 break;
94 case IfxGtm_Dtm_ClockSource_cmuClock2:
95 frequency = IfxGtm_Cmu_getClkFrequency(gtm, IfxGtm_Cmu_Fxclk_1, TRUE);
96 break;
97 default:
98 break;
99 }
100 }
101 else if ((dtmIndex >= IfxGtm_Dtm_4) && (dtmIndex <= IfxGtm_Dtm_5))
102 { /* Connected to ATOMs */
103 switch (clockSource)
104 {
105 case IfxGtm_Dtm_ClockSource_systemClock:
106 frequency = IfxScuCcu_getGtmFrequency();
107 break;
108 case IfxGtm_Dtm_ClockSource_cmuClock0:
109 frequency = IfxGtm_Cmu_getClkFrequency(gtm, IfxGtm_Cmu_Clk_0, TRUE);
110 break;
111 case IfxGtm_Dtm_ClockSource_cmuClock1:
112 frequency = IfxGtm_Cmu_getClkFrequency(gtm, IfxGtm_Cmu_Clk_1, TRUE);
113 break;
114 case IfxGtm_Dtm_ClockSource_cmuClock2:
115 frequency = IfxGtm_Cmu_getClkFrequency(gtm, IfxGtm_Cmu_Clk_2, TRUE);
116 break;
117 default:
118 break;
119 }
120 }
121 else
122 {}
123 }
124
125 return frequency;
126 }
IfxGtm_Dtm_getDtmPointer
Ifx_GTM_CDTM_DTM * IfxGtm_Dtm_getDtmPointer(Ifx_GTM *gtm, IfxGtm_Cdtm cdtmIndex, IfxGtm_Dtm dtmIndex)
returns the base address of selected DTM instance
Definition: IfxGtm_Dtm.c:52
IfxGtm_Dtm_ClockSource_systemClock
SYS_CLK as clock source.
Definition: IfxGtm_Dtm.h:72
IfxGtm_Cmu_Fxclk_0
Definition: IfxGtm_Cmu.h:85
IfxGtm_Dtm_4
DTM object 4.
Definition: IfxGtm_cfg.h:317
float32
float float32
Definition: Platform_Types.h:170
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxGtm_Cdtm_6
DTM object 6.
Definition: IfxGtm_cfg.h:282
IfxGtm_Cmu_Fxclk_1
Definition: IfxGtm_Cmu.h:86
IfxGtm_Cmu_Clk_0
Definition: IfxGtm_Cmu.h:66
IfxGtm_Dtm.h
GTM basic functionality.
IfxScuCcu_getGtmFrequency
IFX_INLINE float32 IfxScuCcu_getGtmFrequency(void)
API to get GTMdivider frequency This API returns the based on the divider value in CCUCON register an...
Definition: IfxScuCcu.h:1597
IfxGtm_Cmu_Clk_2
Definition: IfxGtm_Cmu.h:68
IfxGtm_Dtm_ClockSource
IfxGtm_Dtm_ClockSource
Clock source for DTM object Definition in IfxGTM.DTM[i].CTRL.B.CLKSEL ( i = 0 to 35) ...
Definition: IfxGtm_Dtm.h:70
IfxGtm_Dtm_ClockSource_cmuClock1
CMU_CLK1 (if DTM is connected to ATOM) or CMU_FXCLK0 (if DTM is connected to TOM) as clock source...
Definition: IfxGtm_Dtm.h:74
IfxGtm_Cmu_getFxClkFrequency
float32 IfxGtm_Cmu_getFxClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Fxclk clkIndex, boolean assumeEnabled)
Returns the GTM fixed clock frequency in Hz.
Definition: IfxGtm_Cmu.c:138
IfxGtm_Dtm_getClockFrequency
float32 IfxGtm_Dtm_getClockFrequency(Ifx_GTM *gtm, IfxGtm_Cdtm cdtmIndex, IfxGtm_Dtm dtmIndex)
Returns the clock frequency in Hz of the DTM.
Definition: IfxGtm_Dtm.c:69
IfxGtm_Dtm_3
DTM object 3.
Definition: IfxGtm_cfg.h:316
IfxGtm_Dtm_ClockSource_cmuClock2
CMU_CLK2 (if DTM is connected to ATOM) or CMU_FXCLK1 (if DTM is connected to TOM) as clock source...
Definition: IfxGtm_Dtm.h:75
IfxGtm_Dtm_ClockSource_cmuClock0
CMU_CLK0 as clock source.
Definition: IfxGtm_Dtm.h:73
IfxGtm_Cdtm_none
No DTM object.
Definition: IfxGtm_cfg.h:275
IfxGtm_Cdtm
IfxGtm_Cdtm
Enum for CDTM objects.
Definition: IfxGtm_cfg.h:273
IfxGtm_Dtm
IfxGtm_Dtm
Enum for DTM objects.
Definition: IfxGtm_cfg.h:310
IfxGtm_Dtm_getClockSource
IFX_INLINE IfxGtm_Dtm_ClockSource IfxGtm_Dtm_getClockSource(Ifx_GTM_CDTM_DTM *dtm)
Return the clock source of the DTM object.
Definition: IfxGtm_Dtm.h:305
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxGtm_Dtm_5
DTM object 5.
Definition: IfxGtm_cfg.h:318
IfxGtm_Cmu_Clk_1
Definition: IfxGtm_Cmu.h:67
IfxGtm_Cmu_getClkFrequency
float32 IfxGtm_Cmu_getClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean assumeEnabled)
Returns the GTM configurable clock frequency in Hz.
Definition: IfxGtm_Cmu.c:64


iLLD_TC38A: IfxGtm_Dtm.h Source File

  • Gtm
  • Std
IfxGtm_Dtm.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Dtm.h
3 * \brief GTM basic functionality
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Gtm_Std_Dtm Dtm Basic Functionality
42 * \ingroup IfxLld_Gtm_Std
43 * \defgroup IfxLld_Gtm_Std_Dtm_Enumerations DTM Enumerations
44 * \ingroup IfxLld_Gtm_Std_Dtm
45 * \defgroup IfxLld_Gtm_Std_Dtm_Functions DTM Functions
46 * \ingroup IfxLld_Gtm_Std_Dtm
47 */
48
49 #ifndef IFXGTM_DTM_H
50 #define IFXGTM_DTM_H 1
51
52 /******************************************************************************/
53 /*----------------------------------Includes----------------------------------*/
54 /******************************************************************************/
55
56 #include "_Impl/IfxGtm_cfg.h"
57 #include "IfxGtm_reg.h"
58 #include "IfxGtm_Cmu.h"
59 #include "Scu/Std/IfxScuCcu.h"
60
61 /******************************************************************************/
62 /*--------------------------------Enumerations--------------------------------*/
63 /******************************************************************************/
64
65 /** \addtogroup IfxLld_Gtm_Std_Dtm_Enumerations
66 * \{ */
67 /** \brief Clock source for DTM object\n
68 * Definition in IfxGTM.DTM[i].CTRL.B.CLKSEL ( i = 0 to 35)
69 */
70 typedef enum
71 {
72 IfxGtm_Dtm_ClockSource_systemClock, /**< \brief SYS_CLK as clock source */
73 IfxGtm_Dtm_ClockSource_cmuClock0, /**< \brief CMU_CLK0 as clock source */
74 IfxGtm_Dtm_ClockSource_cmuClock1, /**< \brief CMU_CLK1 (if DTM is connected to ATOM) or CMU_FXCLK0 (if DTM is connected to TOM) as clock source */
75 IfxGtm_Dtm_ClockSource_cmuClock2 /**< \brief CMU_CLK2 (if DTM is connected to ATOM) or CMU_FXCLK1 (if DTM is connected to TOM) as clock source */
76 } IfxGtm_Dtm_ClockSource;
77
78 /** \brief Output x function of channel y \n
79 * Definition in IfxGTM.DTM[i].CH.CTRL1.B.O1Fx ( i = 0 to 35 and x = 0 to 3)
80 */
81 typedef enum
82 {
83 IfxGtm_Dtm_Output1Function_signalEdgeTrigger, /**< \brief Signal Edge Trigger */
84 IfxGtm_Dtm_Output1Function_xorOfDtmInputandShiftSignal, /**< \brief XOR Of Dtm Input and Shift Signal */
85 IfxGtm_Dtm_Output1Function_andOfDtmInputandShiftSignal, /**< \brief AND Of Dtm Input and Shift Signal */
86 IfxGtm_Dtm_Output1Function_dtmInputSignal /**< \brief DTM Input Signal DTM[i]_INx_T (i = 0 to 35 and x = 0 to 3) */
87 } IfxGtm_Dtm_Output1Function;
88
89 /** \brief Output 1 selection of channel x (x = 0 to 3)\n
90 * Definition in IfxGTM.DTM[i].CH.CTRL1.B.O1SELx ( i = 0 to 35 and x = 0 to 3)
91 */
92 typedef enum
93 {
94 IfxGtm_Dtm_Output1Select_inverseDeadTime, /**< \brief Inverse Dead Time */
95 IfxGtm_Dtm_Output1Select_specialFunction /**< \brief Special Function as selected by O1Fx (x = 0 to 3) */
96 } IfxGtm_Dtm_Output1Select;
97
98 /** \} */
99
100 /** \brief Dead Time Path on output x of channel y\n
101 * Definition in IfxGTM.DTM[i].CH.CTRL2.B.DTxy ( i = 0 to 35; x = 0 , 1; and y = 0 to 4)
102 */
103 typedef enum
104 {
105 IfxGtm_Dtm_DeadTimePath_feedThrough, /**< \brief Feed through from DTM input to output (DTM[i]_INx to DTM[i]_OUTx (i = 0 to 35 and x = 0 to 4) */
106 IfxGtm_Dtm_DeadTimePath_enable /**< \brief Dead Time Path enabled */
107 } IfxGtm_Dtm_DeadTimePath;
108
109 /** \addtogroup IfxLld_Gtm_Std_Dtm_Functions
110 * \{ */
111
112 /******************************************************************************/
113 /*-------------------------Inline Function Prototypes-------------------------*/
114 /******************************************************************************/
115
116 /** \brief Sets the clock source for DTM object
117 * \param dtm Pointer to the DTM object
118 * \param clockSource Clock source for DTM object
119 * \return None
120 */
121 IFX_INLINE void IfxGtm_Dtm_setClockSource(Ifx_GTM_CDTM_DTM *dtm, IfxGtm_Dtm_ClockSource clockSource);
122
123 /** \brief Sets the Output 0 Dead Time Path for DTM channel
124 * \param dtm Pointer to the DTM object
125 * \param channel Channel index
126 * \param deadTimePath Dead Time Path for Dtm chhannel output
127 * \return None
128 */
129 IFX_INLINE void IfxGtm_Dtm_setOutput0DeadTimePath(Ifx_GTM_CDTM_DTM *dtm, IfxGtm_Dtm_Ch channel, IfxGtm_Dtm_DeadTimePath deadTimePath);
130
131 /** \brief Sets the Output 1 Dead Time Path for DTM channel
132 * \param dtm Pointer to the DTM object
133 * \param channel Channel index
134 * \param deadTimePath Dead Time Path for Dtm chhannel output
135 * \return None
136 */
137 IFX_INLINE void IfxGtm_Dtm_setOutput1DeadTimePath(Ifx_GTM_CDTM_DTM *dtm, IfxGtm_Dtm_Ch channel, IfxGtm_Dtm_DeadTimePath deadTimePath);
138
139 /** \brief Sets the Output Function for DTM channel
140 * \param dtm Pointer to the DTM object
141 * \param channel Channel index
142 * \param output1Function Output 1 function
143 * \return None
144 */
145 IFX_INLINE void IfxGtm_Dtm_setOutput1Function(Ifx_GTM_CDTM_DTM *dtm, IfxGtm_Dtm_Ch channel, IfxGtm_Dtm_Output1Function output1Function);
146
147 /** \brief Sets the Output Selection for DTM channel
148 * \param dtm Pointer to the DTM object
149 * \param channel Channel index
150 * \param output1Select Output 1 selection
151 * \return None
152 */
153 IFX_INLINE void IfxGtm_Dtm_setOutput1Select(Ifx_GTM_CDTM_DTM *dtm, IfxGtm_Dtm_Ch channel, IfxGtm_Dtm_Output1Select output1Select);
154
155 /** \} */
156
157 /******************************************************************************/
158 /*-------------------------Inline Function Prototypes-------------------------*/
159 /******************************************************************************/
160
161 /** \brief return the ATOM corresponding CDTM
162 */
163 IFX_INLINE IfxGtm_Cdtm IfxGtm_Dtm_getCdtmIndex(IfxGtm_Atom atom);
164
165 /** \brief return the ATOM channel corresponding DTM
166 */
167 IFX_INLINE IfxGtm_Dtm IfxGtm_Dtm_getDtmIndex(IfxGtm_Atom atom, IfxGtm_Atom_Ch channel);
168
169 /** \brief return the ATOM channel corresponding DTM channel
170 */
171 IFX_INLINE IfxGtm_Dtm_Ch IfxGtm_Dtm_getDtmChannel(IfxGtm_Atom_Ch atomChannel);
172
173 /** \brief Sets the deadtime
174 * \param dtm Pointer to the DTM object
175 * \param channel Channel index
176 * \param risingEdge Deadtime for rising edge
177 * \param fallingEdge Deadtime for falling edge
178 * \return None
179 */
180 IFX_INLINE void IfxGtm_Dtm_setDeadtime(Ifx_GTM_CDTM_DTM *dtm, IfxGtm_Dtm_Ch channel, uint32 risingEdge, float32 fallingEdge);
181
182 /** \brief Return the clock source of the DTM object
183 * \param dtm Pointer to the DTM object
184 * \return Return the clock source of the DTM object
185 */
186 IFX_INLINE IfxGtm_Dtm_ClockSource IfxGtm_Dtm_getClockSource(Ifx_GTM_CDTM_DTM *dtm);
187
188 /******************************************************************************/
189 /*-------------------------Global Function Prototypes-------------------------*/
190 /******************************************************************************/
191
192 /** \brief returns the base address of selected DTM instance
193 * \param gtm pointer to GTM register base
194 * \param cdtmIndex CDTM index
195 * \param dtmIndex DTM index
196 * \return Base address of DTM
197 */
198 IFX_EXTERN Ifx_GTM_CDTM_DTM *IfxGtm_Dtm_getDtmPointer(Ifx_GTM *gtm, IfxGtm_Cdtm cdtmIndex, IfxGtm_Dtm dtmIndex);
199
200 /** \brief Returns the clock frequency in Hz of the DTM
201 * \param gtm pointer to GTM register base
202 * \param cdtmIndex CDTM index
203 * \param dtmIndex DTM index
204 * \return DTM input clock frequency in Hz
205 */
206 IFX_EXTERN float32 IfxGtm_Dtm_getClockFrequency(Ifx_GTM *gtm, IfxGtm_Cdtm cdtmIndex, IfxGtm_Dtm dtmIndex);
207
208 /******************************************************************************/
209 /*---------------------Inline Function Implementations------------------------*/
210 /******************************************************************************/
211
212 IFX_INLINE void IfxGtm_Dtm_setClockSource(Ifx_GTM_CDTM_DTM *dtm, IfxGtm_Dtm_ClockSource clockSource)
213 {
214 dtm->CTRL.B.CLK_SEL = clockSource;
215 }
216
217
218 IFX_INLINE void IfxGtm_Dtm_setOutput0DeadTimePath(Ifx_GTM_CDTM_DTM *dtm, IfxGtm_Dtm_Ch channel, IfxGtm_Dtm_DeadTimePath deadTimePath)
219 {
220 uint32 shift = (8 * (uint32)channel) + 3;
221 uint32 mask = 1 << shift;
222
223 dtm->CH_CTRL2.U = (dtm->CH_CTRL2.U & ~mask) | ((uint32)deadTimePath << shift);
224 }
225
226
227 IFX_INLINE void IfxGtm_Dtm_setOutput1DeadTimePath(Ifx_GTM_CDTM_DTM *dtm, IfxGtm_Dtm_Ch channel, IfxGtm_Dtm_DeadTimePath deadTimePath)
228 {
229 uint32 shift = (8 * (uint32)channel) + 7;
230 uint32 mask = 1 << shift;
231
232 dtm->CH_CTRL2.U = (dtm->CH_CTRL2.U & ~mask) | ((uint32)deadTimePath << shift);
233 }
234
235
236 IFX_INLINE void IfxGtm_Dtm_setOutput1Function(Ifx_GTM_CDTM_DTM *dtm, IfxGtm_Dtm_Ch channel, IfxGtm_Dtm_Output1Function output1Function)
237 {
238 uint32 shift = (8 * (uint32)channel) + 4;
239 uint32 mask = 3 << shift;
240
241 dtm->CH_CTRL1.U = (dtm->CH_CTRL1.U & ~mask) | ((uint32)output1Function << shift);
242 }
243
244
245 IFX_INLINE void IfxGtm_Dtm_setOutput1Select(Ifx_GTM_CDTM_DTM *dtm, IfxGtm_Dtm_Ch channel, IfxGtm_Dtm_Output1Select output1Select)
246 {
247 uint32 shift = 8 * (uint32)channel;
248 uint32 mask = 1 << shift;
249
250 dtm->CH_CTRL1.U = (dtm->CH_CTRL1.U & ~mask) | ((uint32)output1Select << shift);
251 }
252
253
254 IFX_INLINE IfxGtm_Cdtm IfxGtm_Dtm_getCdtmIndex(IfxGtm_Atom atom)
255 {
256 return IfxGtm_dtmAtom_map[atom];
257 }
258
259
260 IFX_INLINE IfxGtm_Dtm IfxGtm_Dtm_getDtmIndex(IfxGtm_Atom atom, IfxGtm_Atom_Ch channel)
261 {
262 IfxGtm_Dtm dtm;
263
264 if (IfxGtm_dtmAtom_map[atom] != IfxGtm_Cdtm_none)
265 {
266 dtm = channel <= 3 ? IfxGtm_Dtm_4 : IfxGtm_Dtm_5;
267 }
268 else
269 {
270 dtm = IfxGtm_Dtm_none;
271 }
272
273 return dtm;
274 }
275
276
277 IFX_INLINE IfxGtm_Dtm_Ch IfxGtm_Dtm_getDtmChannel(IfxGtm_Atom_Ch atomChannel)
278 {
279 IfxGtm_Dtm_Ch channel;
280
281 if ((atomChannel >= IfxGtm_Atom_Ch_0) && (atomChannel <= IfxGtm_Atom_Ch_3))
282 {
283 channel = (IfxGtm_Dtm_Ch)atomChannel;
284 }
285 else if ((atomChannel >= IfxGtm_Atom_Ch_4) && (atomChannel <= IfxGtm_Atom_Ch_7))
286 {
287 channel = (IfxGtm_Dtm_Ch)(atomChannel - IfxGtm_Atom_Ch_4);
288 }
289 else
290 {
291 channel = IfxGtm_Dtm_Ch_none;
292 }
293
294 return channel;
295 }
296
297
298 IFX_INLINE void IfxGtm_Dtm_setDeadtime(Ifx_GTM_CDTM_DTM *dtm, IfxGtm_Dtm_Ch channel, uint32 risingEdge, float32 fallingEdge)
299 {
300 dtm->CH[channel].DTV.B.RELRISE = risingEdge;
301 dtm->CH[channel].DTV.B.RELFALL = fallingEdge;
302 }
303
304
305 IFX_INLINE IfxGtm_Dtm_ClockSource IfxGtm_Dtm_getClockSource(Ifx_GTM_CDTM_DTM *dtm)
306 {
307 return (IfxGtm_Dtm_ClockSource)dtm->CTRL.B.CLK_SEL;
308 }
309
310
311 #endif /* IFXGTM_DTM_H */
IfxGtm_Dtm_Ch_none
Not Selected.
Definition: IfxGtm_cfg.h:325
IfxGtm_Dtm_none
No DTM object.
Definition: IfxGtm_cfg.h:312
IfxGtm_Dtm_Output1Select_specialFunction
Special Function as selected by O1Fx (x = 0 to 3)
Definition: IfxGtm_Dtm.h:95
IfxGtm_Dtm_setOutput1Function
IFX_INLINE void IfxGtm_Dtm_setOutput1Function(Ifx_GTM_CDTM_DTM *dtm, IfxGtm_Dtm_Ch channel, IfxGtm_Dtm_Output1Function output1Function)
Sets the Output Function for DTM channel.
Definition: IfxGtm_Dtm.h:236
IfxGtm_Dtm_DeadTimePath
IfxGtm_Dtm_DeadTimePath
Dead Time Path on output x of channel y Definition in IfxGTM.DTM[i].CH.CTRL2.B.DTxy ( i = 0 to 35; x ...
Definition: IfxGtm_Dtm.h:103
IfxGtm_Atom_Ch_0
ATOM channel 0.
Definition: IfxGtm_cfg.h:261
IfxGtm_Dtm_ClockSource_systemClock
SYS_CLK as clock source.
Definition: IfxGtm_Dtm.h:72
IfxGtm_Dtm_getClockFrequency
IFX_EXTERN float32 IfxGtm_Dtm_getClockFrequency(Ifx_GTM *gtm, IfxGtm_Cdtm cdtmIndex, IfxGtm_Dtm dtmIndex)
Returns the clock frequency in Hz of the DTM.
Definition: IfxGtm_Dtm.c:69
IfxGtm_Dtm_Output1Function_dtmInputSignal
DTM Input Signal DTM[i]_INx_T (i = 0 to 35 and x = 0 to 3)
Definition: IfxGtm_Dtm.h:86
IfxGtm_Dtm_Output1Function_signalEdgeTrigger
Signal Edge Trigger.
Definition: IfxGtm_Dtm.h:83
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxGtm_Dtm_getDtmChannel
IFX_INLINE IfxGtm_Dtm_Ch IfxGtm_Dtm_getDtmChannel(IfxGtm_Atom_Ch atomChannel)
return the ATOM channel corresponding DTM channel
Definition: IfxGtm_Dtm.h:277
IfxGtm_Dtm_4
DTM object 4.
Definition: IfxGtm_cfg.h:317
float32
float float32
Definition: Platform_Types.h:170
IfxGtm_Atom
IfxGtm_Atom
Enum for ATOM objects.
Definition: IfxGtm_cfg.h:243
IfxGtm_Dtm_Output1Function_andOfDtmInputandShiftSignal
AND Of Dtm Input and Shift Signal.
Definition: IfxGtm_Dtm.h:85
IfxGtm_Dtm_setOutput1Select
IFX_INLINE void IfxGtm_Dtm_setOutput1Select(Ifx_GTM_CDTM_DTM *dtm, IfxGtm_Dtm_Ch channel, IfxGtm_Dtm_Output1Select output1Select)
Sets the Output Selection for DTM channel.
Definition: IfxGtm_Dtm.h:245
IfxGtm_Atom_Ch_4
ATOM channel 4.
Definition: IfxGtm_cfg.h:265
IfxGtm_Dtm_setOutput0DeadTimePath
IFX_INLINE void IfxGtm_Dtm_setOutput0DeadTimePath(Ifx_GTM_CDTM_DTM *dtm, IfxGtm_Dtm_Ch channel, IfxGtm_Dtm_DeadTimePath deadTimePath)
Sets the Output 0 Dead Time Path for DTM channel.
Definition: IfxGtm_Dtm.h:218
IfxGtm_Dtm_getCdtmIndex
IFX_INLINE IfxGtm_Cdtm IfxGtm_Dtm_getCdtmIndex(IfxGtm_Atom atom)
return the ATOM corresponding CDTM
Definition: IfxGtm_Dtm.h:254
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxGtm_dtmAtom_map
IFX_CONST IfxGtm_Cdtm IfxGtm_dtmAtom_map[IFXGTM_NUM_ATOM_OBJECTS]
Definition: IfxGtm_cfg.c:52
IfxGtm_Dtm_getDtmIndex
IFX_INLINE IfxGtm_Dtm IfxGtm_Dtm_getDtmIndex(IfxGtm_Atom atom, IfxGtm_Atom_Ch channel)
return the ATOM channel corresponding DTM
Definition: IfxGtm_Dtm.h:260
IfxGtm_Dtm_Output1Function_xorOfDtmInputandShiftSignal
XOR Of Dtm Input and Shift Signal.
Definition: IfxGtm_Dtm.h:84
IfxGtm_Dtm_setOutput1DeadTimePath
IFX_INLINE void IfxGtm_Dtm_setOutput1DeadTimePath(Ifx_GTM_CDTM_DTM *dtm, IfxGtm_Dtm_Ch channel, IfxGtm_Dtm_DeadTimePath deadTimePath)
Sets the Output 1 Dead Time Path for DTM channel.
Definition: IfxGtm_Dtm.h:227
IfxGtm_Dtm_ClockSource
IfxGtm_Dtm_ClockSource
Clock source for DTM object Definition in IfxGTM.DTM[i].CTRL.B.CLKSEL ( i = 0 to 35) ...
Definition: IfxGtm_Dtm.h:70
IfxGtm_Dtm_setClockSource
IFX_INLINE void IfxGtm_Dtm_setClockSource(Ifx_GTM_CDTM_DTM *dtm, IfxGtm_Dtm_ClockSource clockSource)
Sets the clock source for DTM object.
Definition: IfxGtm_Dtm.h:212
IfxGtm_Dtm_ClockSource_cmuClock1
CMU_CLK1 (if DTM is connected to ATOM) or CMU_FXCLK0 (if DTM is connected to TOM) as clock source...
Definition: IfxGtm_Dtm.h:74
IfxGtm_Atom_Ch_3
ATOM channel 3.
Definition: IfxGtm_cfg.h:264
IfxGtm_Dtm_Ch
IfxGtm_Dtm_Ch
Enum for DTM channels.
Definition: IfxGtm_cfg.h:323
IfxGtm_Dtm_getDtmPointer
IFX_EXTERN Ifx_GTM_CDTM_DTM * IfxGtm_Dtm_getDtmPointer(Ifx_GTM *gtm, IfxGtm_Cdtm cdtmIndex, IfxGtm_Dtm dtmIndex)
returns the base address of selected DTM instance
Definition: IfxGtm_Dtm.c:52
IfxGtm_Dtm_DeadTimePath_feedThrough
Feed through from DTM input to output (DTM[i]_INx to DTM[i]_OUTx (i = 0 to 35 and x = 0 to 4) ...
Definition: IfxGtm_Dtm.h:105
IfxGtm_Dtm_ClockSource_cmuClock2
CMU_CLK2 (if DTM is connected to ATOM) or CMU_FXCLK1 (if DTM is connected to TOM) as clock source...
Definition: IfxGtm_Dtm.h:75
IfxScuCcu.h
SCU basic functionality.
IfxGtm_Atom_Ch_7
ATOM channel 7.
Definition: IfxGtm_cfg.h:268
IfxGtm_Dtm_DeadTimePath_enable
Dead Time Path enabled.
Definition: IfxGtm_Dtm.h:106
IfxGtm_Dtm_ClockSource_cmuClock0
CMU_CLK0 as clock source.
Definition: IfxGtm_Dtm.h:73
IfxGtm_Dtm_Output1Select
IfxGtm_Dtm_Output1Select
Output 1 selection of channel x (x = 0 to 3) Definition in IfxGTM.DTM[i].CH.CTRL1.B.O1SELx ( i = 0 to 35 and x = 0 to 3)
Definition: IfxGtm_Dtm.h:92
IfxGtm_Dtm_Output1Function
IfxGtm_Dtm_Output1Function
Output x function of channel y Definition in IfxGTM.DTM[i].CH.CTRL1.B.O1Fx ( i = 0 to 35 and x = 0 t...
Definition: IfxGtm_Dtm.h:81
IfxGtm_Cmu.h
GTM basic functionality.
IfxGtm_Cdtm_none
No DTM object.
Definition: IfxGtm_cfg.h:275
IfxGtm_Cdtm
IfxGtm_Cdtm
Enum for CDTM objects.
Definition: IfxGtm_cfg.h:273
IfxGtm_Dtm
IfxGtm_Dtm
Enum for DTM objects.
Definition: IfxGtm_cfg.h:310
IfxGtm_Dtm_getClockSource
IFX_INLINE IfxGtm_Dtm_ClockSource IfxGtm_Dtm_getClockSource(Ifx_GTM_CDTM_DTM *dtm)
Return the clock source of the DTM object.
Definition: IfxGtm_Dtm.h:305
IfxGtm_Dtm_Output1Select_inverseDeadTime
Inverse Dead Time.
Definition: IfxGtm_Dtm.h:94
IfxGtm_Dtm_5
DTM object 5.
Definition: IfxGtm_cfg.h:318
IfxGtm_cfg.h
GTM on-chip implementation data.
IfxGtm_Dtm_setDeadtime
IFX_INLINE void IfxGtm_Dtm_setDeadtime(Ifx_GTM_CDTM_DTM *dtm, IfxGtm_Dtm_Ch channel, uint32 risingEdge, float32 fallingEdge)
Sets the deadtime.
Definition: IfxGtm_Dtm.h:298
IfxGtm_Atom_Ch
IfxGtm_Atom_Ch
Enum for ATOM channels.
Definition: IfxGtm_cfg.h:258


iLLD_TC38A: IfxGtm_PinMap.c Source File

_PinMap

IfxGtm_PinMap.c

Go to the documentation of this file.

1 /**

2 * \file IfxGtm_PinMap.c

3 * \brief GTM I/O map

4 * \ingroup IfxLld_Gtm

5 *

6 * \version iLLD_1_0_1_12_0

7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.

8 *

9 *

10 * IMPORTANT NOTICE

11 *

12 * Use of this file is subject to the terms of use agreed between (i) you or

13 * the company in which ordinary course of business you are acting and (ii)

14 * Infineon Technologies AG or its licensees. If and as long as no such terms

15 * of use are agreed, use of this file is subject to following:

16 *

17 * Boost Software License - Version 1.0 - August 17th, 2003

18 *

19 * Permission is hereby granted, free of charge, to any person or organization

20 * obtaining a copy of the software and accompanying documentation covered by

21 * this license (the "Software") to use, reproduce, display, distribute,

22 * execute, and transmit the Software, and to prepare derivative works of the

23 * Software, and to permit third-parties to whom the Software is furnished to

24 * do so, all subject to the following:

25 *

26 * The copyright notices in the Software and this entire statement, including

27 * the above license grant, this restriction and the following disclaimer, must

28 * be included in all copies of the Software, in whole or in part, and all

29 * derivative works of the Software, unless such copies or derivative works are

30 * solely in the form of machine-executable object code generated by a source

31 * language processor.

32 *

33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT

36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE

37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,

38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER

39 * DEALINGS IN THE SOFTWARE.

40 *

41 */

42

43 #include "IfxGtm_PinMap.h"

44

45 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0N_TOUT112_P01_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 112, {&MODULE_P01, 4}, IfxPort_OutputIdx_alt1};

46 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0N_TOUT17_P00_8_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1};

47 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0N_TOUT43_P23_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 43, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt1};

48 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0N_TOUT54_P21_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1};

49 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0N_TOUT7_P02_7_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1};

50 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT0_P02_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1};

51 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT48_P22_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 48, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt1};

52 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT53_P21_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1};

53 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT85_P14_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 85, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt1};

54 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT8_P02_8_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1};

55 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT9_P00_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1};

56 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT113_P01_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 113, {&MODULE_P01, 5}, IfxPort_OutputIdx_alt1};

57 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT14_P00_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1};

58 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT39_P32_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1};

59 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT41_P23_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1};

60 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT4_P02_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1};

61 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT50_P22_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1};

62 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT53_P21_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1};

63 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT55_P21_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1};

64 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT57_P21_6_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1};

65 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT61_P20_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1};

66 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT10_P00_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1};

67 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT116_P02_9_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 116, {&MODULE_P02, 9}, IfxPort_OutputIdx_alt1};

68 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT11_P00_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1};

69 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT1_P02_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1};

70 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT31_P33_9_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1};

71 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT47_P22_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 47, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt1};

72 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT54_P21_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1};

73 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT84_P14_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 84, {&MODULE_P14, 4}, IfxPort_OutputIdx_alt1};

74 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT114_P01_6_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 114, {&MODULE_P01, 6}, IfxPort_OutputIdx_alt1};

75 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT15_P00_6_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1};

76 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT23_P33_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1};

77 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT40_P32_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1};

78 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT41_P23_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1};

79 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT44_P23_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 44, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt1};

80 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT56_P21_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1};

81 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT58_P21_7_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 58, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt1};

82 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT5_P02_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1};

83 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT65_P20_9_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1};

84 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT117_P02_10_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 117, {&MODULE_P02,10}, IfxPort_OutputIdx_alt1};

85 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT12_P00_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1};

86 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT2_P02_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1};

87 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT33_P33_11_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 33, {&MODULE_P33,11}, IfxPort_OutputIdx_alt1};

88 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT42_P23_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1};

89 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT46_P23_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 46, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt1};

90 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT55_P21_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1};

91 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT83_P14_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 83, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt1};

92 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT115_P01_7_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 115, {&MODULE_P01, 7}, IfxPort_OutputIdx_alt1};

93 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT16_P00_7_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1};

94 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT24_P33_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1};

95 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT42_P23_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1};

96 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT45_P23_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 45, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt1};

97 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT59_P20_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1};

98 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT66_P20_10_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 66, {&MODULE_P20,10}, IfxPort_OutputIdx_alt1};

99 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT6_P02_6_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1};

100 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT118_P02_11_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 118, {&MODULE_P02,11}, IfxPort_OutputIdx_alt1};

101 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT13_P00_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1};

102 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT38_P32_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 38, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt1};

103 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT3_P02_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1};

104 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT49_P22_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 49, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt1};

105 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT56_P21_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1};

106 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT60_P20_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 60, {&MODULE_P20, 1}, IfxPort_OutputIdx_alt1};

107 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT82_P14_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 82, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt1};

108 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4N_TOUT118_P02_11_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 118, {&MODULE_P02,11}, IfxPort_OutputIdx_alt1};

109 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4N_TOUT135_P22_9_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 135, {&MODULE_P22, 9}, IfxPort_OutputIdx_alt1};

110 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4N_TOUT13_P00_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1};

111 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4N_TOUT147_P34_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 147, {&MODULE_P34, 2}, IfxPort_OutputIdx_alt1};

112 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4N_TOUT3_P02_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1};

113 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT146_P34_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 146, {&MODULE_P34, 1}, IfxPort_OutputIdx_alt1};

114 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT14_P00_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1};

115 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT29_P33_7_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_k, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1};

116 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT39_P32_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1};

117 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT4_P02_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1};

118 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT50_P22_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1};

119 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT57_P21_6_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1};

120 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT61_P20_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1};

121 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT81_P14_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 81, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt1};

122 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5N_TOUT0_P02_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_i, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1};

123 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5N_TOUT136_P22_10_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_i, 136, {&MODULE_P22,10}, IfxPort_OutputIdx_alt1};

124 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5N_TOUT148_P34_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_i, 148, {&MODULE_P34, 3}, IfxPort_OutputIdx_alt1};

125 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5N_TOUT26_P33_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_k, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1};

126 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5N_TOUT8_P02_8_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_i, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1};

127 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5N_TOUT9_P00_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_i, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1};

128 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT15_P00_6_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1};

129 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT23_P33_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1};

130 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT40_P32_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1};

131 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT41_P23_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1};

132 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT58_P21_7_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 58, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt1};

133 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT5_P02_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1};

134 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6N_TOUT10_P00_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_i, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1};

135 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6N_TOUT116_P02_9_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_i, 116, {&MODULE_P02, 9}, IfxPort_OutputIdx_alt1};

136 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6N_TOUT11_P00_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_i, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1};

137 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6N_TOUT137_P22_11_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_i, 137, {&MODULE_P22,11}, IfxPort_OutputIdx_alt1};

138 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6N_TOUT149_P34_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_i, 149, {&MODULE_P34, 4}, IfxPort_OutputIdx_alt1};

139 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6N_TOUT1_P02_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_i, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1};

140 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6N_TOUT27_P33_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_k, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1};

141 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT106_P10_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1};

142 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT16_P00_7_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1};

143 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT24_P33_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1};

144 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT42_P23_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1};

145 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT59_P20_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1};

146 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT6_P02_6_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1};

147 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7N_TOUT117_P02_10_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_i, 117, {&MODULE_P02,10}, IfxPort_OutputIdx_alt1};

148 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7N_TOUT12_P00_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_i, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1};

149 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7N_TOUT150_P34_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_i, 150, {&MODULE_P34, 5}, IfxPort_OutputIdx_alt1};

150 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7N_TOUT28_P33_6_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_k, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1};

151 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7N_TOUT2_P02_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_i, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1};

152 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT17_P00_8_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1};

153 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT25_P33_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 25, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt1};

154 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT45_P23_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 45, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt1};

155 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT64_P20_8_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1};

156 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT7_P02_7_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1};

157 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0N_TOUT112_P01_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_j, 112, {&MODULE_P01, 4}, IfxPort_OutputIdx_alt1};

158 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0N_TOUT17_P00_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_j, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1};

159 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0N_TOUT7_P02_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_j, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1};

160 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT0_P02_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1};

161 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT109_P10_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1};

162 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT68_P20_12_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 68, {&MODULE_P20,12}, IfxPort_OutputIdx_alt1};

163 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT76_P15_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1};

164 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT77_P15_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1};

165 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT87_P14_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1};

166 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT8_P02_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1};

167 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT9_P00_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1};

168 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1N_TOUT102_P10_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 102, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt1};

169 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1N_TOUT113_P01_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 113, {&MODULE_P01, 5}, IfxPort_OutputIdx_alt1};

170 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1N_TOUT14_P00_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1};

171 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1N_TOUT39_P32_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1};

172 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1N_TOUT4_P02_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1};

173 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1N_TOUT61_P20_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_l, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1};

174 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1N_TOUT72_P15_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1};

175 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT103_P10_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 103, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt1};

176 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT10_P00_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1};

177 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT116_P02_9_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_l, 116, {&MODULE_P02, 9}, IfxPort_OutputIdx_alt1};

178 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT11_P00_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1};

179 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT1_P02_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1};

180 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT31_P33_9_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1};

181 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT69_P20_13_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 69, {&MODULE_P20,13}, IfxPort_OutputIdx_alt1};

182 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT78_P15_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1};

183 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT79_P15_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1};

184 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT86_P14_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1};

185 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT110_P10_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 110, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt1};

186 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT114_P01_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 114, {&MODULE_P01, 6}, IfxPort_OutputIdx_alt1};

187 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT15_P00_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1};

188 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT23_P33_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_l, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1};

189 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT40_P32_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1};

190 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT41_P23_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_l, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1};

191 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT5_P02_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1};

192 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT73_P15_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1};

193 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT104_P10_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 104, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt1};

194 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT107_P10_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1};

195 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT117_P02_10_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_l, 117, {&MODULE_P02,10}, IfxPort_OutputIdx_alt1};

196 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT12_P00_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1};

197 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT2_P02_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1};

198 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT33_P33_11_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 33, {&MODULE_P33,11}, IfxPort_OutputIdx_alt1};

199 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT70_P20_14_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 70, {&MODULE_P20,14}, IfxPort_OutputIdx_alt1};

200 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT80_P14_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 80, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt1};

201 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3N_TOUT106_P10_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1};

202 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3N_TOUT115_P01_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 115, {&MODULE_P01, 7}, IfxPort_OutputIdx_alt1};

203 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3N_TOUT16_P00_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1};

204 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3N_TOUT24_P33_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_l, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1};

205 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3N_TOUT42_P23_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_l, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1};

206 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3N_TOUT6_P02_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1};

207 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3N_TOUT74_P15_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1};

208 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT105_P10_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 105, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt1};

209 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT108_P10_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1};

210 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT118_P02_11_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_l, 118, {&MODULE_P02,11}, IfxPort_OutputIdx_alt1};

211 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT13_P00_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1};

212 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT38_P32_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 38, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt1};

213 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT3_P02_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1};

214 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT60_P20_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 60, {&MODULE_P20, 1}, IfxPort_OutputIdx_alt1};

215 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT71_P15_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1};

216 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT105_P10_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 105, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt1};

217 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT108_P10_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1};

218 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT118_P02_11_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 118, {&MODULE_P02,11}, IfxPort_OutputIdx_alt1};

219 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT131_P22_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 131, {&MODULE_P22, 5}, IfxPort_OutputIdx_alt1};

220 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT13_P00_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1};

221 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT147_P34_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 147, {&MODULE_P34, 2}, IfxPort_OutputIdx_alt1};

222 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT3_P02_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1};

223 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT71_P15_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1};

224 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT75_P15_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 75, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt1};

225 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT102_P10_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 102, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt1};

226 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT130_P22_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 130, {&MODULE_P22, 4}, IfxPort_OutputIdx_alt1};

227 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT146_P34_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 146, {&MODULE_P34, 1}, IfxPort_OutputIdx_alt1};

228 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT14_P00_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1};

229 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT29_P33_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_l, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1};

230 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT39_P32_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1};

231 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT4_P02_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1};

232 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT61_P20_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1};

233 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT72_P15_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1};

234 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT0_P02_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1};

235 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT109_P10_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_i, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1};

236 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT132_P22_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_i, 132, {&MODULE_P22, 6}, IfxPort_OutputIdx_alt1};

237 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT148_P34_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 148, {&MODULE_P34, 3}, IfxPort_OutputIdx_alt1};

238 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT26_P33_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_l, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1};

239 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT76_P15_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1};

240 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT77_P15_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1};

241 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT8_P02_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1};

242 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT9_P00_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1};

243 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT110_P10_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 110, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt1};

244 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT15_P00_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1};

245 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT23_P33_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1};

246 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT40_P32_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1};

247 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT41_P23_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1};

248 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT5_P02_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1};

249 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT65_P20_9_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1};

250 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT73_P15_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1};

251 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT103_P10_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_i, 103, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt1};

252 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT10_P00_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1};

253 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT116_P02_9_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 116, {&MODULE_P02, 9}, IfxPort_OutputIdx_alt1};

254 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT11_P00_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1};

255 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT133_P22_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_i, 133, {&MODULE_P22, 7}, IfxPort_OutputIdx_alt1};

256 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT149_P34_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 149, {&MODULE_P34, 4}, IfxPort_OutputIdx_alt1};

257 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT1_P02_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1};

258 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT27_P33_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_l, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1};

259 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT78_P15_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1};

260 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT106_P10_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_l, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1};

261 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT16_P00_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1};

262 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT24_P33_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1};

263 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT42_P23_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1};

264 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT66_P20_10_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 66, {&MODULE_P20,10}, IfxPort_OutputIdx_alt1};

265 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT6_P02_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1};

266 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT74_P15_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1};

267 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT104_P10_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_i, 104, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt1};

268 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT107_P10_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_i, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1};

269 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT117_P02_10_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 117, {&MODULE_P02,10}, IfxPort_OutputIdx_alt1};

270 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT12_P00_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1};

271 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT134_P22_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_i, 134, {&MODULE_P22, 8}, IfxPort_OutputIdx_alt1};

272 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT150_P34_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 150, {&MODULE_P34, 5}, IfxPort_OutputIdx_alt1};

273 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT28_P33_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_l, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1};

274 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT2_P02_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1};

275 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT79_P15_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1};

276 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT17_P00_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1};

277 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT25_P33_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 25, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt1};

278 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT45_P23_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 45, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt1};

279 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT67_P20_11_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 67, {&MODULE_P20,11}, IfxPort_OutputIdx_alt1};

280 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT75_P15_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 75, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt1};

281 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT7_P02_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1};

282 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0N_TOUT101_P11_12_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_j, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1};

283 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0N_TOUT108_P10_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_k, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1};

284 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0N_TOUT12_P00_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_k, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1};

285 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0N_TOUT144_P33_15_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 144, {&MODULE_P33,15}, IfxPort_OutputIdx_alt1};

286 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0N_TOUT25_P33_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 25, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt1};

287 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0N_TOUT32_P33_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1};

288 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0N_TOUT37_P32_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_k, 37, {&MODULE_P32, 1}, IfxPort_OutputIdx_alt1};

289 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT109_P10_7_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_k, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1};

290 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT18_P00_9_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 18, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt1};

291 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT26_P33_4_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1};

292 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT32_P33_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1};

293 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT94_P13_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1};

294 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT105_P10_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 105, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt1};

295 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT167_P00_13_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 167, {&MODULE_P00,13}, IfxPort_OutputIdx_alt1};

296 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT22_P33_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 22, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt1};

297 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT30_P33_8_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1};

298 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT34_P33_12_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 34, {&MODULE_P33,12}, IfxPort_OutputIdx_alt1};

299 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT51_P21_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1};

300 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT90_P14_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1};

301 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT91_P13_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1};

302 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT98_P11_9_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1};

303 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT9_P00_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1};

304 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT102_P10_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 102, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt1};

305 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT19_P00_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 19, {&MODULE_P00,10}, IfxPort_OutputIdx_alt1};

306 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT27_P33_5_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1};

307 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT43_P23_2_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 43, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt1};

308 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT90_P14_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1};

309 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT95_P11_2_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1};

310 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT106_P10_4_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1};

311 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT10_P00_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1};

312 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT114_P01_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 114, {&MODULE_P01, 6}, IfxPort_OutputIdx_alt1};

313 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT138_P23_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 138, {&MODULE_P23, 6}, IfxPort_OutputIdx_alt1};

314 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT166_P00_14_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 166, {&MODULE_P00,14}, IfxPort_OutputIdx_alt1};

315 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT23_P33_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1};

316 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT31_P33_9_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1};

317 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT35_P33_13_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 35, {&MODULE_P33,13}, IfxPort_OutputIdx_alt1};

318 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT52_P21_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1};

319 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT91_P13_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1};

320 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT92_P13_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1};

321 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT99_P11_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1};

322 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT103_P10_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 103, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt1};

323 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT20_P00_11_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 20, {&MODULE_P00,11}, IfxPort_OutputIdx_alt1};

324 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT28_P33_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1};

325 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT44_P23_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 44, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt1};

326 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT88_P14_8_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 88, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt1};

327 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT96_P11_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1};

328 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT100_P11_11_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1};

329 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT107_P10_5_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1};

330 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT115_P01_7_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 115, {&MODULE_P01, 7}, IfxPort_OutputIdx_alt1};

331 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT11_P00_2_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1};

332 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT139_P23_7_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 139, {&MODULE_P23, 7}, IfxPort_OutputIdx_alt1};

333 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT143_P33_14_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 143, {&MODULE_P33,14}, IfxPort_OutputIdx_alt1};

334 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT168_P00_15_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 168, {&MODULE_P00,15}, IfxPort_OutputIdx_alt1};

335 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT24_P33_2_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1};

336 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT33_P33_11_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 33, {&MODULE_P33,11}, IfxPort_OutputIdx_alt1};

337 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT36_P32_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 36, {&MODULE_P32, 0}, IfxPort_OutputIdx_alt1};

338 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT62_P20_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 62, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt1};

339 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT92_P13_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1};

340 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT93_P13_2_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1};

341 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT104_P10_2_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 104, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt1};

342 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT21_P00_12_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 21, {&MODULE_P00,12}, IfxPort_OutputIdx_alt1};

343 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT29_P33_7_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1};

344 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT89_P14_9_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 89, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt1};

345 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT97_P11_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1};

346 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4N_TOUT29_P33_7_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1};

347 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4N_TOUT57_P21_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1};

348 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4N_TOUT86_P14_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1};

349 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4N_TOUT97_P11_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1};

350 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT167_P00_13_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 167, {&MODULE_P00,13}, IfxPort_OutputIdx_alt1};

351 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT22_P33_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 22, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt1};

352 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT30_P33_8_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1};

353 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT34_P33_12_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 34, {&MODULE_P33,12}, IfxPort_OutputIdx_alt1};

354 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT51_P21_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1};

355 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT90_P14_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1};

356 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT98_P11_9_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1};

357 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5N_TOUT120_P11_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 120, {&MODULE_P11, 1}, IfxPort_OutputIdx_alt1};

358 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5N_TOUT26_P33_4_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_i, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1};

359 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5N_TOUT59_P20_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_i, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1};

360 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5N_TOUT87_P14_7_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_i, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1};

361 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5N_TOUT94_P13_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1};

362 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT138_P23_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_a, 138, {&MODULE_P23, 6}, IfxPort_OutputIdx_alt1};

363 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT166_P00_14_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_i, 166, {&MODULE_P00,14}, IfxPort_OutputIdx_alt1};

364 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT35_P33_13_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 35, {&MODULE_P33,13}, IfxPort_OutputIdx_alt1};

365 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT52_P21_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1};

366 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT65_P20_9_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1};

367 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT91_P13_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1};

368 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT99_P11_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1};

369 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6N_TOUT27_P33_5_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_i, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1};

370 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6N_TOUT60_P20_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_i, 60, {&MODULE_P20, 1}, IfxPort_OutputIdx_alt1};

371 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6N_TOUT88_P14_8_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_i, 88, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt1};

372 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6N_TOUT95_P11_2_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1};

373 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT100_P11_11_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1};

374 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT139_P23_7_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_a, 139, {&MODULE_P23, 7}, IfxPort_OutputIdx_alt1};

375 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT143_P33_14_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_k, 143, {&MODULE_P33,14}, IfxPort_OutputIdx_alt1};

376 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT168_P00_15_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_i, 168, {&MODULE_P00,15}, IfxPort_OutputIdx_alt1};

377 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT36_P32_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 36, {&MODULE_P32, 0}, IfxPort_OutputIdx_alt1};

378 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT62_P20_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 62, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt1};

379 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT92_P13_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1};

380 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7N_TOUT28_P33_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_i, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1};

381 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7N_TOUT61_P20_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_i, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1};

382 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7N_TOUT89_P14_9_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_i, 89, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt1};

383 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7N_TOUT96_P11_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1};

384 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT101_P11_12_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1};

385 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT140_P32_5_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_a, 140, {&MODULE_P32, 5}, IfxPort_OutputIdx_alt1};

386 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT144_P33_15_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_k, 144, {&MODULE_P33,15}, IfxPort_OutputIdx_alt1};

387 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT37_P32_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 37, {&MODULE_P32, 1}, IfxPort_OutputIdx_alt1};

388 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT63_P20_7_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 63, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt1};

389 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT93_P13_2_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1};

390 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT101_P11_12_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1};

391 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT144_P33_15_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_j, 144, {&MODULE_P33,15}, IfxPort_OutputIdx_alt1};

392 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT17_P00_8_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_k, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1};

393 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT25_P33_3_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_j, 25, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt1};

394 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT32_P33_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_j, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1};

395 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT37_P32_1_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_l, 37, {&MODULE_P32, 1}, IfxPort_OutputIdx_alt1};

396 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT63_P20_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_k, 63, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt1};

397 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT76_P15_5_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1};

398 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT18_P00_9_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 18, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt1};

399 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT26_P33_4_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1};

400 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT32_P33_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1};

401 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT65_P20_9_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1};

402 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT94_P13_3_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1};

403 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT14_P00_5_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1};

404 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT167_P00_13_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_l, 167, {&MODULE_P00,13}, IfxPort_OutputIdx_alt1};

405 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT22_P33_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 22, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt1};

406 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT30_P33_8_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1};

407 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT34_P33_12_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 34, {&MODULE_P33,12}, IfxPort_OutputIdx_alt1};

408 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT51_P21_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1};

409 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT79_P15_8_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1};

410 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT90_P14_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_l, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1};

411 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT91_P13_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1};

412 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT98_P11_9_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1};

413 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT111_P01_3_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 111, {&MODULE_P01, 3}, IfxPort_OutputIdx_alt1};

414 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT128_P12_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 128, {&MODULE_P12, 0}, IfxPort_OutputIdx_alt1};

415 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT19_P00_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 19, {&MODULE_P00,10}, IfxPort_OutputIdx_alt1};

416 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT27_P33_5_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1};

417 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT43_P23_2_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 43, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt1};

418 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT64_P20_8_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1};

419 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT90_P14_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1};

420 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT95_P11_2_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1};

421 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT114_P01_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_l, 114, {&MODULE_P01, 6}, IfxPort_OutputIdx_alt1};

422 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT15_P00_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1};

423 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT166_P00_14_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_l, 166, {&MODULE_P00,14}, IfxPort_OutputIdx_alt1};

424 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT23_P33_1_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1};

425 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT31_P33_9_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1};

426 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT35_P33_13_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 35, {&MODULE_P33,13}, IfxPort_OutputIdx_alt1};

427 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT52_P21_1_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1};

428 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT78_P15_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1};

429 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT91_P13_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_l, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1};

430 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT92_P13_1_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1};

431 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT99_P11_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1};

432 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT112_P01_4_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_a, 112, {&MODULE_P01, 4}, IfxPort_OutputIdx_alt1};

433 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT20_P00_11_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 20, {&MODULE_P00,11}, IfxPort_OutputIdx_alt1};

434 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT28_P33_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1};

435 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT44_P23_3_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 44, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt1};

436 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT63_P20_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 63, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt1};

437 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT88_P14_8_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 88, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt1};

438 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT96_P11_3_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1};

439 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT100_P11_11_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1};

440 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT115_P01_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_l, 115, {&MODULE_P01, 7}, IfxPort_OutputIdx_alt1};

441 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT143_P33_14_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 143, {&MODULE_P33,14}, IfxPort_OutputIdx_alt1};

442 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT168_P00_15_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_l, 168, {&MODULE_P00,15}, IfxPort_OutputIdx_alt1};

443 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT16_P00_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1};

444 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT24_P33_2_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1};

445 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT33_P33_11_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 33, {&MODULE_P33,11}, IfxPort_OutputIdx_alt1};

446 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT36_P32_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 36, {&MODULE_P32, 0}, IfxPort_OutputIdx_alt1};

447 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT62_P20_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_l, 62, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt1};

448 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT77_P15_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1};

449 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT92_P13_1_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_l, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1};

450 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT93_P13_2_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1};

451 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT113_P01_5_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_a, 113, {&MODULE_P01, 5}, IfxPort_OutputIdx_alt1};

452 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT21_P00_12_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 21, {&MODULE_P00,12}, IfxPort_OutputIdx_alt1};

453 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT29_P33_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1};

454 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT62_P20_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 62, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt1};

455 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT89_P14_9_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 89, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt1};

456 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT97_P11_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1};

457 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4N_TOUT135_P22_9_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 135, {&MODULE_P22, 9}, IfxPort_OutputIdx_alt1};

458 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4N_TOUT21_P00_12_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 21, {&MODULE_P00,12}, IfxPort_OutputIdx_alt1};

459 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4N_TOUT29_P33_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1};

460 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4N_TOUT57_P21_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1};

461 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4N_TOUT86_P14_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1};

462 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4N_TOUT97_P11_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1};

463 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT114_P01_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_a, 114, {&MODULE_P01, 6}, IfxPort_OutputIdx_alt1};

464 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT131_P22_5_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 131, {&MODULE_P22, 5}, IfxPort_OutputIdx_alt1};

465 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT167_P00_13_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 167, {&MODULE_P00,13}, IfxPort_OutputIdx_alt1};

466 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT22_P33_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 22, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt1};

467 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT30_P33_8_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1};

468 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT34_P33_12_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 34, {&MODULE_P33,12}, IfxPort_OutputIdx_alt1};

469 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT51_P21_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1};

470 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT90_P14_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1};

471 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT98_P11_9_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1};

472 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5N_TOUT120_P11_1_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_k, 120, {&MODULE_P11, 1}, IfxPort_OutputIdx_alt1};

473 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5N_TOUT136_P22_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 136, {&MODULE_P22,10}, IfxPort_OutputIdx_alt1};

474 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5N_TOUT18_P00_9_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_i, 18, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt1};

475 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5N_TOUT26_P33_4_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1};

476 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5N_TOUT59_P20_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1};

477 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5N_TOUT87_P14_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1};

478 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5N_TOUT94_P13_3_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_i, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1};

479 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT115_P01_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_a, 115, {&MODULE_P01, 7}, IfxPort_OutputIdx_alt1};

480 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT132_P22_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 132, {&MODULE_P22, 6}, IfxPort_OutputIdx_alt1};

481 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT166_P00_14_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 166, {&MODULE_P00,14}, IfxPort_OutputIdx_alt1};

482 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT35_P33_13_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 35, {&MODULE_P33,13}, IfxPort_OutputIdx_alt1};

483 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT52_P21_1_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1};

484 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT64_P20_8_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1};

485 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT91_P13_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1};

486 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT99_P11_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1};

487 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6N_TOUT137_P22_11_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 137, {&MODULE_P22,11}, IfxPort_OutputIdx_alt1};

488 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6N_TOUT19_P00_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_i, 19, {&MODULE_P00,10}, IfxPort_OutputIdx_alt1};

489 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6N_TOUT27_P33_5_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1};

490 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6N_TOUT60_P20_1_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 60, {&MODULE_P20, 1}, IfxPort_OutputIdx_alt1};

491 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6N_TOUT88_P14_8_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 88, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt1};

492 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6N_TOUT95_P11_2_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_i, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1};

493 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT100_P11_11_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1};

494 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT133_P22_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 133, {&MODULE_P22, 7}, IfxPort_OutputIdx_alt1};

495 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT143_P33_14_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_l, 143, {&MODULE_P33,14}, IfxPort_OutputIdx_alt1};

496 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT168_P00_15_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 168, {&MODULE_P00,15}, IfxPort_OutputIdx_alt1};

497 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT36_P32_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 36, {&MODULE_P32, 0}, IfxPort_OutputIdx_alt1};

498 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT62_P20_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 62, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt1};

499 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT92_P13_1_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1};

500 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7N_TOUT20_P00_11_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_i, 20, {&MODULE_P00,11}, IfxPort_OutputIdx_alt1};

501 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7N_TOUT28_P33_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1};

502 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7N_TOUT61_P20_3_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1};

503 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7N_TOUT89_P14_9_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 89, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt1};

504 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7N_TOUT96_P11_3_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_i, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1};

505 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT101_P11_12_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1};

506 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT134_P22_8_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 134, {&MODULE_P22, 8}, IfxPort_OutputIdx_alt1};

507 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT144_P33_15_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_l, 144, {&MODULE_P33,15}, IfxPort_OutputIdx_alt1};

508 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT37_P32_1_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 37, {&MODULE_P32, 1}, IfxPort_OutputIdx_alt1};

509 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT63_P20_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 63, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt1};

510 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT93_P13_2_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1};

511 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0N_TOUT87_P14_7_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_k, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1};

512 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT109_P10_7_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1};

513 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT39_P32_3_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1};

514 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT48_P22_1_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 48, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt1};

515 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT53_P21_2_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1};

516 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT68_P20_12_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 68, {&MODULE_P20,12}, IfxPort_OutputIdx_alt1};

517 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT76_P15_5_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1};

518 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT77_P15_6_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1};

519 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT85_P14_5_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 85, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt1};

520 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT87_P14_7_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1};

521 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT102_P10_0_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 102, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt1};

522 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT44_P23_3_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 44, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt1};

523 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT50_P22_3_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1};

524 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT53_P21_2_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1};

525 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT57_P21_6_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_l, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1};

526 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT72_P15_1_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1};

527 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT85_P14_5_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 85, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt1};

528 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT86_P14_6_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1};

529 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT103_P10_1_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 103, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt1};

530 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT41_P23_0_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1};

531 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT47_P22_0_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 47, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt1};

532 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT54_P21_3_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1};

533 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT69_P20_13_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 69, {&MODULE_P20,13}, IfxPort_OutputIdx_alt1};

534 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT78_P15_7_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1};

535 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT79_P15_8_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1};

536 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT84_P14_4_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 84, {&MODULE_P14, 4}, IfxPort_OutputIdx_alt1};

537 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT86_P14_6_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1};

538 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2N_TOUT110_P10_8_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 110, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt1};

539 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2N_TOUT45_P23_4_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 45, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt1};

540 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2N_TOUT52_P21_1_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1};

541 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2N_TOUT58_P21_7_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 58, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt1};

542 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2N_TOUT65_P20_9_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_l, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1};

543 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2N_TOUT73_P15_2_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1};

544 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2N_TOUT81_P14_1_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 81, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt1};

545 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT104_P10_2_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 104, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt1};

546 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT107_P10_5_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1};

547 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT42_P23_1_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1};

548 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT46_P23_5_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 46, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt1};

549 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT55_P21_4_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1};

550 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT70_P20_14_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 70, {&MODULE_P20,14}, IfxPort_OutputIdx_alt1};

551 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT80_P14_0_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 80, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt1};

552 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT83_P14_3_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 83, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt1};

553 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3N_TOUT106_P10_4_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1};

554 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3N_TOUT46_P23_5_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 46, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt1};

555 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3N_TOUT51_P21_0_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1};

556 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3N_TOUT59_P20_0_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_l, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1};

557 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3N_TOUT66_P20_10_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_l, 66, {&MODULE_P20,10}, IfxPort_OutputIdx_alt1};

558 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3N_TOUT74_P15_3_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1};

559 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3N_TOUT80_P14_0_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 80, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt1};

560 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3_TOUT105_P10_3_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 105, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt1};

561 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3_TOUT108_P10_6_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1};

562 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3_TOUT43_P23_2_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 43, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt1};

563 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3_TOUT49_P22_2_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 49, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt1};

564 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3_TOUT56_P21_5_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1};

565 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3_TOUT71_P15_0_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1};

566 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3_TOUT82_P14_2_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 82, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt1};

567 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT105_P10_3_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 105, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt1};

568 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT108_P10_6_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1};

569 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT132_P22_6_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 132, {&MODULE_P22, 6}, IfxPort_OutputIdx_alt1};

570 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT21_P00_12_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 21, {&MODULE_P00,12}, IfxPort_OutputIdx_alt1};

571 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT56_P21_5_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1};

572 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT71_P15_0_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_k, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1};

573 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT75_P15_4_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_k, 75, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt1};

574 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT95_P11_2_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_k, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1};

575 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT102_P10_0_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 102, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt1};

576 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT111_P01_3_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 111, {&MODULE_P01, 3}, IfxPort_OutputIdx_alt1};

577 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT131_P22_5_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 131, {&MODULE_P22, 5}, IfxPort_OutputIdx_alt1};

578 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT264_P13_15_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 264, {&MODULE_P13,15}, IfxPort_OutputIdx_alt1};

579 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT44_P23_3_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 44, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt1};

580 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT50_P22_3_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1};

581 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT57_P21_6_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1};

582 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT72_P15_1_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1};

583 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT81_P14_1_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 81, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt1};

584 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5N_TOUT109_P10_7_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1};

585 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5N_TOUT121_P11_4_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_k, 121, {&MODULE_P11, 4}, IfxPort_OutputIdx_alt1};

586 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5N_TOUT133_P22_7_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 133, {&MODULE_P22, 7}, IfxPort_OutputIdx_alt1};

587 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5N_TOUT18_P00_9_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 18, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt1};

588 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5N_TOUT76_P15_5_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_k, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1};

589 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5N_TOUT77_P15_6_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_k, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1};

590 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT110_P10_8_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 110, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt1};

591 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT116_P02_9_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_a, 116, {&MODULE_P02, 9}, IfxPort_OutputIdx_alt1};

592 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT128_P12_0_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 128, {&MODULE_P12, 0}, IfxPort_OutputIdx_alt1};

593 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT130_P22_4_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 130, {&MODULE_P22, 4}, IfxPort_OutputIdx_alt1};

594 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT45_P23_4_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 45, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt1};

595 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT56_P21_5_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_k, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1};

596 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT58_P21_7_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 58, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt1};

597 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT65_P20_9_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1};

598 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT73_P15_2_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1};

599 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6N_TOUT103_P10_1_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 103, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt1};

600 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6N_TOUT134_P22_8_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 134, {&MODULE_P22, 8}, IfxPort_OutputIdx_alt1};

601 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6N_TOUT19_P00_10_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 19, {&MODULE_P00,10}, IfxPort_OutputIdx_alt1};

602 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6N_TOUT78_P15_7_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_k, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1};

603 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6N_TOUT97_P11_6_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_k, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1};

604 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT106_P10_4_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1};

605 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT117_P02_10_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_a, 117, {&MODULE_P02,10}, IfxPort_OutputIdx_alt1};

606 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT129_P12_1_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 129, {&MODULE_P12, 1}, IfxPort_OutputIdx_alt1};

607 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT139_P23_7_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 139, {&MODULE_P23, 7}, IfxPort_OutputIdx_alt1};

608 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT46_P23_5_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 46, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt1};

609 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT59_P20_0_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1};

610 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT66_P20_10_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 66, {&MODULE_P20,10}, IfxPort_OutputIdx_alt1};

611 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT74_P15_3_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1};

612 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7N_TOUT104_P10_2_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 104, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt1};

613 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7N_TOUT107_P10_5_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1};

614 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7N_TOUT124_P11_8_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_k, 124, {&MODULE_P11, 8}, IfxPort_OutputIdx_alt1};

615 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7N_TOUT135_P22_9_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 135, {&MODULE_P22, 9}, IfxPort_OutputIdx_alt1};

616 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7N_TOUT20_P00_11_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 20, {&MODULE_P00,11}, IfxPort_OutputIdx_alt1};

617 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7N_TOUT79_P15_8_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_k, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1};

618 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7_TOUT118_P02_11_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_a, 118, {&MODULE_P02,11}, IfxPort_OutputIdx_alt1};

619 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7_TOUT119_P11_0_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 119, {&MODULE_P11, 0}, IfxPort_OutputIdx_alt1};

620 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7_TOUT138_P23_6_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 138, {&MODULE_P23, 6}, IfxPort_OutputIdx_alt1};

621 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7_TOUT40_P32_4_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_i, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1};

622 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7_TOUT64_P20_8_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1};

623 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7_TOUT67_P20_11_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 67, {&MODULE_P20,11}, IfxPort_OutputIdx_alt1};

624 IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7_TOUT75_P15_4_OUT = {IfxGtm_Atom_4, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 75, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt1};

625 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT126_P11_14_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 126, {&MODULE_P11,14}, IfxPort_OutputIdx_alt1};

626 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT134_P22_8_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_l, 134, {&MODULE_P22, 8}, IfxPort_OutputIdx_alt1};

627 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT150_P34_5_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_l, 150, {&MODULE_P34, 5}, IfxPort_OutputIdx_alt1};

628 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT161_P01_13_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 161, {&MODULE_P01,13}, IfxPort_OutputIdx_alt1};

629 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT181_P31_7_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_k, 181, {&MODULE_P31, 7}, IfxPort_OutputIdx_alt1};

630 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT213_P25_7_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_k, 213, {&MODULE_P25, 7}, IfxPort_OutputIdx_alt1};

631 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT261_P14_12_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 261, {&MODULE_P14,12}, IfxPort_OutputIdx_alt1};

632 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT264_P13_15_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 264, {&MODULE_P13,15}, IfxPort_OutputIdx_alt1};

633 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT119_P11_0_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 119, {&MODULE_P11, 0}, IfxPort_OutputIdx_alt1};

634 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT130_P22_4_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_k, 130, {&MODULE_P22, 4}, IfxPort_OutputIdx_alt1};

635 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT146_P34_1_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_k, 146, {&MODULE_P34, 1}, IfxPort_OutputIdx_alt1};

636 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT155_P01_0_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 155, {&MODULE_P01, 0}, IfxPort_OutputIdx_alt1};

637 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT162_P01_8_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 162, {&MODULE_P01, 8}, IfxPort_OutputIdx_alt1};

638 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT174_P31_0_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 174, {&MODULE_P31, 0}, IfxPort_OutputIdx_alt1};

639 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT206_P25_0_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 206, {&MODULE_P25, 0}, IfxPort_OutputIdx_alt1};

640 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT249_P13_12_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 249, {&MODULE_P13,12}, IfxPort_OutputIdx_alt1};

641 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT258_P14_11_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 258, {&MODULE_P14,11}, IfxPort_OutputIdx_alt1};

642 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT123_P11_7_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 123, {&MODULE_P11, 7}, IfxPort_OutputIdx_alt1};

643 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT128_P12_0_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 128, {&MODULE_P12, 0}, IfxPort_OutputIdx_alt1};

644 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT135_P22_9_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_l, 135, {&MODULE_P22, 9}, IfxPort_OutputIdx_alt1};

645 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT140_P32_5_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 140, {&MODULE_P32, 5}, IfxPort_OutputIdx_alt1};

646 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT158_P01_12_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 158, {&MODULE_P01,12}, IfxPort_OutputIdx_alt1};

647 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT178_P31_4_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 178, {&MODULE_P31, 4}, IfxPort_OutputIdx_alt1};

648 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT210_P25_4_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 210, {&MODULE_P25, 4}, IfxPort_OutputIdx_alt1};

649 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT245_P15_13_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 245, {&MODULE_P15,13}, IfxPort_OutputIdx_alt1};

650 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT248_P13_9_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 248, {&MODULE_P13, 9}, IfxPort_OutputIdx_alt1};

651 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT260_P14_13_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 260, {&MODULE_P14,13}, IfxPort_OutputIdx_alt1};

652 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT268_P10_13_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 268, {&MODULE_P10,13}, IfxPort_OutputIdx_alt1};

653 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT120_P11_1_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 120, {&MODULE_P11, 1}, IfxPort_OutputIdx_alt1};

654 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT131_P22_5_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 131, {&MODULE_P22, 5}, IfxPort_OutputIdx_alt1};

655 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT147_P34_2_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_k, 147, {&MODULE_P34, 2}, IfxPort_OutputIdx_alt1};

656 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT156_P01_2_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 156, {&MODULE_P01, 2}, IfxPort_OutputIdx_alt1};

657 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT164_P01_14_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 164, {&MODULE_P01,14}, IfxPort_OutputIdx_alt1};

658 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT175_P31_1_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 175, {&MODULE_P31, 1}, IfxPort_OutputIdx_alt1};

659 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT207_P25_1_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 207, {&MODULE_P25, 1}, IfxPort_OutputIdx_alt1};

660 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT242_P15_10_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 242, {&MODULE_P15,10}, IfxPort_OutputIdx_alt1};

661 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT253_P13_4_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_i, 253, {&MODULE_P13, 4}, IfxPort_OutputIdx_alt1};

662 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT265_P10_9_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 265, {&MODULE_P10, 9}, IfxPort_OutputIdx_alt1};

663 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT124_P11_8_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 124, {&MODULE_P11, 8}, IfxPort_OutputIdx_alt1};

664 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT136_P22_10_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_l, 136, {&MODULE_P22,10}, IfxPort_OutputIdx_alt1};

665 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT141_P32_6_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 141, {&MODULE_P32, 6}, IfxPort_OutputIdx_alt1};

666 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT159_P01_1_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 159, {&MODULE_P01, 1}, IfxPort_OutputIdx_alt1};

667 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT179_P31_5_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 179, {&MODULE_P31, 5}, IfxPort_OutputIdx_alt1};

668 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT211_P25_5_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 211, {&MODULE_P25, 5}, IfxPort_OutputIdx_alt1};

669 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT246_P15_14_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 246, {&MODULE_P15,14}, IfxPort_OutputIdx_alt1};

670 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT250_P13_11_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 250, {&MODULE_P13,11}, IfxPort_OutputIdx_alt1};

671 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT259_P14_14_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 259, {&MODULE_P14,14}, IfxPort_OutputIdx_alt1};

672 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT269_P10_11_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 269, {&MODULE_P10,11}, IfxPort_OutputIdx_alt1};

673 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT121_P11_4_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 121, {&MODULE_P11, 4}, IfxPort_OutputIdx_alt1};

674 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT132_P22_6_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 132, {&MODULE_P22, 6}, IfxPort_OutputIdx_alt1};

675 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT148_P34_3_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_k, 148, {&MODULE_P34, 3}, IfxPort_OutputIdx_alt1};

676 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT152_P02_15_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 152, {&MODULE_P02,15}, IfxPort_OutputIdx_alt1};

677 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT157_P01_15_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 157, {&MODULE_P01,15}, IfxPort_OutputIdx_alt1};

678 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT176_P31_2_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 176, {&MODULE_P31, 2}, IfxPort_OutputIdx_alt1};

679 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT208_P25_2_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 208, {&MODULE_P25, 2}, IfxPort_OutputIdx_alt1};

680 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT243_P15_11_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 243, {&MODULE_P15,11}, IfxPort_OutputIdx_alt1};

681 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT254_P13_5_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_i, 254, {&MODULE_P13, 5}, IfxPort_OutputIdx_alt1};

682 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT266_P10_10_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 266, {&MODULE_P10,10}, IfxPort_OutputIdx_alt1};

683 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT123_P11_7_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 123, {&MODULE_P11, 7}, IfxPort_OutputIdx_alt1};

684 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT125_P11_13_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 125, {&MODULE_P11,13}, IfxPort_OutputIdx_alt1};

685 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT137_P22_11_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_l, 137, {&MODULE_P22,11}, IfxPort_OutputIdx_alt1};

686 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT142_P32_7_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 142, {&MODULE_P32, 7}, IfxPort_OutputIdx_alt1};

687 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT160_P01_9_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 160, {&MODULE_P01, 9}, IfxPort_OutputIdx_alt1};

688 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT180_P31_6_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 180, {&MODULE_P31, 6}, IfxPort_OutputIdx_alt1};

689 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT212_P25_6_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 212, {&MODULE_P25, 6}, IfxPort_OutputIdx_alt1};

690 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT212_P26_0_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 212, {&MODULE_P26, 0}, IfxPort_OutputIdx_alt1};

691 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT247_P15_15_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 247, {&MODULE_P15,15}, IfxPort_OutputIdx_alt1};

692 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT249_P13_12_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 249, {&MODULE_P13,12}, IfxPort_OutputIdx_alt1};

693 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT263_P14_15_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 263, {&MODULE_P14,15}, IfxPort_OutputIdx_alt1};

694 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT270_P10_15_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 270, {&MODULE_P10,15}, IfxPort_OutputIdx_alt1};

695 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT122_P11_5_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 122, {&MODULE_P11, 5}, IfxPort_OutputIdx_alt1};

696 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT133_P22_7_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 133, {&MODULE_P22, 7}, IfxPort_OutputIdx_alt1};

697 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT149_P34_4_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_k, 149, {&MODULE_P34, 4}, IfxPort_OutputIdx_alt1};

698 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT163_P01_10_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 163, {&MODULE_P01,10}, IfxPort_OutputIdx_alt1};

699 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT165_P01_11_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 165, {&MODULE_P01,11}, IfxPort_OutputIdx_alt1};

700 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT177_P31_3_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 177, {&MODULE_P31, 3}, IfxPort_OutputIdx_alt1};

701 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT209_P25_3_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 209, {&MODULE_P25, 3}, IfxPort_OutputIdx_alt1};

702 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT244_P15_12_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 244, {&MODULE_P15,12}, IfxPort_OutputIdx_alt1};

703 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT255_P13_6_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_i, 255, {&MODULE_P13, 6}, IfxPort_OutputIdx_alt1};

704 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT267_P10_14_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 267, {&MODULE_P10,14}, IfxPort_OutputIdx_alt1};

705 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4N_TOUT122_P11_5_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 122, {&MODULE_P11, 5}, IfxPort_OutputIdx_alt1};

706 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4N_TOUT129_P12_1_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 129, {&MODULE_P12, 1}, IfxPort_OutputIdx_alt1};

707 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4N_TOUT163_P01_10_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_k, 163, {&MODULE_P01,10}, IfxPort_OutputIdx_alt1};

708 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4N_TOUT165_P01_11_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 165, {&MODULE_P01,11}, IfxPort_OutputIdx_alt1};

709 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4N_TOUT177_P31_3_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_k, 177, {&MODULE_P31, 3}, IfxPort_OutputIdx_alt1};

710 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4N_TOUT209_P25_3_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_k, 209, {&MODULE_P25, 3}, IfxPort_OutputIdx_alt1};

711 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4N_TOUT267_P10_14_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 267, {&MODULE_P10,14}, IfxPort_OutputIdx_alt1};

712 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT123_P11_7_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 123, {&MODULE_P11, 7}, IfxPort_OutputIdx_alt1};

713 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT134_P22_8_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_k, 134, {&MODULE_P22, 8}, IfxPort_OutputIdx_alt1};

714 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT150_P34_5_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_k, 150, {&MODULE_P34, 5}, IfxPort_OutputIdx_alt1};

715 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT158_P01_12_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 158, {&MODULE_P01,12}, IfxPort_OutputIdx_alt1};

716 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT178_P31_4_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 178, {&MODULE_P31, 4}, IfxPort_OutputIdx_alt1};

717 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT210_P25_4_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 210, {&MODULE_P25, 4}, IfxPort_OutputIdx_alt1};

718 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT245_P15_13_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 245, {&MODULE_P15,13}, IfxPort_OutputIdx_alt1};

719 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT248_P13_9_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 248, {&MODULE_P13, 9}, IfxPort_OutputIdx_alt1};

720 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT268_P10_13_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 268, {&MODULE_P10,13}, IfxPort_OutputIdx_alt1};

721 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5N_TOUT119_P11_0_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_i, 119, {&MODULE_P11, 0}, IfxPort_OutputIdx_alt1};

722 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5N_TOUT155_P01_0_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_i, 155, {&MODULE_P01, 0}, IfxPort_OutputIdx_alt1};

723 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5N_TOUT162_P01_8_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_k, 162, {&MODULE_P01, 8}, IfxPort_OutputIdx_alt1};

724 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5N_TOUT174_P31_0_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_k, 174, {&MODULE_P31, 0}, IfxPort_OutputIdx_alt1};

725 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5N_TOUT206_P25_0_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_k, 206, {&MODULE_P25, 0}, IfxPort_OutputIdx_alt1};

726 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT124_P11_8_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 124, {&MODULE_P11, 8}, IfxPort_OutputIdx_alt1};

727 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT135_P22_9_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_k, 135, {&MODULE_P22, 9}, IfxPort_OutputIdx_alt1};

728 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT140_P32_5_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 140, {&MODULE_P32, 5}, IfxPort_OutputIdx_alt1};

729 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT159_P01_1_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 159, {&MODULE_P01, 1}, IfxPort_OutputIdx_alt1};

730 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT179_P31_5_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 179, {&MODULE_P31, 5}, IfxPort_OutputIdx_alt1};

731 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT211_P25_5_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 211, {&MODULE_P25, 5}, IfxPort_OutputIdx_alt1};

732 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT246_P15_14_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 246, {&MODULE_P15,14}, IfxPort_OutputIdx_alt1};

733 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT250_P13_11_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_i, 250, {&MODULE_P13,11}, IfxPort_OutputIdx_alt1};

734 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT269_P10_11_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 269, {&MODULE_P10,11}, IfxPort_OutputIdx_alt1};

735 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6N_TOUT120_P11_1_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_i, 120, {&MODULE_P11, 1}, IfxPort_OutputIdx_alt1};

736 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6N_TOUT156_P01_2_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_i, 156, {&MODULE_P01, 2}, IfxPort_OutputIdx_alt1};

737 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6N_TOUT158_P01_12_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_k, 158, {&MODULE_P01,12}, IfxPort_OutputIdx_alt1};

738 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6N_TOUT175_P31_1_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_k, 175, {&MODULE_P31, 1}, IfxPort_OutputIdx_alt1};

739 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6N_TOUT207_P25_1_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_k, 207, {&MODULE_P25, 1}, IfxPort_OutputIdx_alt1};

740 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6N_TOUT96_P11_3_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_k, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1};

741 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT125_P11_13_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 125, {&MODULE_P11,13}, IfxPort_OutputIdx_alt1};

742 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT136_P22_10_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_k, 136, {&MODULE_P22,10}, IfxPort_OutputIdx_alt1};

743 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT141_P32_6_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 141, {&MODULE_P32, 6}, IfxPort_OutputIdx_alt1};

744 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT160_P01_9_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 160, {&MODULE_P01, 9}, IfxPort_OutputIdx_alt1};

745 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT180_P31_6_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 180, {&MODULE_P31, 6}, IfxPort_OutputIdx_alt1};

746 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT212_P25_6_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 212, {&MODULE_P25, 6}, IfxPort_OutputIdx_alt1};

747 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT212_P26_0_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 212, {&MODULE_P26, 0}, IfxPort_OutputIdx_alt1};

748 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT247_P15_15_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 247, {&MODULE_P15,15}, IfxPort_OutputIdx_alt1};

749 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT249_P13_12_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_i, 249, {&MODULE_P13,12}, IfxPort_OutputIdx_alt1};

750 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT270_P10_15_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 270, {&MODULE_P10,15}, IfxPort_OutputIdx_alt1};

751 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7N_TOUT121_P11_4_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_i, 121, {&MODULE_P11, 4}, IfxPort_OutputIdx_alt1};

752 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7N_TOUT152_P02_15_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_k, 152, {&MODULE_P02,15}, IfxPort_OutputIdx_alt1};

753 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7N_TOUT157_P01_15_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_i, 157, {&MODULE_P01,15}, IfxPort_OutputIdx_alt1};

754 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7N_TOUT176_P31_2_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_k, 176, {&MODULE_P31, 2}, IfxPort_OutputIdx_alt1};

755 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7N_TOUT208_P25_2_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_k, 208, {&MODULE_P25, 2}, IfxPort_OutputIdx_alt1};

756 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7_TOUT126_P11_14_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 126, {&MODULE_P11,14}, IfxPort_OutputIdx_alt1};

757 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7_TOUT137_P22_11_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_k, 137, {&MODULE_P22,11}, IfxPort_OutputIdx_alt1};

758 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7_TOUT142_P32_7_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 142, {&MODULE_P32, 7}, IfxPort_OutputIdx_alt1};

759 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7_TOUT161_P01_13_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 161, {&MODULE_P01,13}, IfxPort_OutputIdx_alt1};

760 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7_TOUT181_P31_7_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 181, {&MODULE_P31, 7}, IfxPort_OutputIdx_alt1};

761 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7_TOUT213_P25_7_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 213, {&MODULE_P25, 7}, IfxPort_OutputIdx_alt1};

762 IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7_TOUT248_P13_9_OUT = {IfxGtm_Atom_5, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 248, {&MODULE_P13, 9}, IfxPort_OutputIdx_alt1};

763 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT127_P11_15_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 127, {&MODULE_P11,15}, IfxPort_OutputIdx_alt1};

764 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT141_P32_6_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 141, {&MODULE_P32, 6}, IfxPort_OutputIdx_alt1};

765 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT155_P01_0_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 155, {&MODULE_P01, 0}, IfxPort_OutputIdx_alt1};

766 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT162_P01_8_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_j, 162, {&MODULE_P01, 8}, IfxPort_OutputIdx_alt1};

767 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT182_P31_8_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 182, {&MODULE_P31, 8}, IfxPort_OutputIdx_alt1};

768 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT214_P25_8_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 214, {&MODULE_P25, 8}, IfxPort_OutputIdx_alt1};

769 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT242_P15_10_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_i, 242, {&MODULE_P15,10}, IfxPort_OutputIdx_alt1};

770 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT250_P13_11_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 250, {&MODULE_P13,11}, IfxPort_OutputIdx_alt1};

771 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT128_P12_0_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 128, {&MODULE_P12, 0}, IfxPort_OutputIdx_alt1};

772 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT142_P32_7_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 142, {&MODULE_P32, 7}, IfxPort_OutputIdx_alt1};

773 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT156_P01_2_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 156, {&MODULE_P01, 2}, IfxPort_OutputIdx_alt1};

774 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT164_P01_14_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 164, {&MODULE_P01,14}, IfxPort_OutputIdx_alt1};

775 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT183_P31_9_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 183, {&MODULE_P31, 9}, IfxPort_OutputIdx_alt1};

776 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT215_P25_9_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 215, {&MODULE_P25, 9}, IfxPort_OutputIdx_alt1};

777 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT251_P13_10_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 251, {&MODULE_P13,10}, IfxPort_OutputIdx_alt1};

778 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT258_P14_11_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 258, {&MODULE_P14,11}, IfxPort_OutputIdx_alt1};

779 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT129_P12_1_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 129, {&MODULE_P12, 1}, IfxPort_OutputIdx_alt1};

780 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT143_P33_14_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 143, {&MODULE_P33,14}, IfxPort_OutputIdx_alt1};

781 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT152_P02_15_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 152, {&MODULE_P02,15}, IfxPort_OutputIdx_alt1};

782 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT157_P01_15_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 157, {&MODULE_P01,15}, IfxPort_OutputIdx_alt1};

783 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT184_P31_10_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 184, {&MODULE_P31,10}, IfxPort_OutputIdx_alt1};

784 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT216_P25_10_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 216, {&MODULE_P25,10}, IfxPort_OutputIdx_alt1};

785 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT252_P13_14_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 252, {&MODULE_P13,14}, IfxPort_OutputIdx_alt1};

786 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT259_P14_14_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 259, {&MODULE_P14,14}, IfxPort_OutputIdx_alt1};

787 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT111_P01_3_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 111, {&MODULE_P01, 3}, IfxPort_OutputIdx_alt1};

788 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT144_P33_15_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 144, {&MODULE_P33,15}, IfxPort_OutputIdx_alt1};

789 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT163_P01_10_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 163, {&MODULE_P01,10}, IfxPort_OutputIdx_alt1};

790 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT165_P01_11_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 165, {&MODULE_P01,11}, IfxPort_OutputIdx_alt1};

791 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT185_P31_11_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 185, {&MODULE_P31,11}, IfxPort_OutputIdx_alt1};

792 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT217_P25_11_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 217, {&MODULE_P25,11}, IfxPort_OutputIdx_alt1};

793 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT253_P13_4_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 253, {&MODULE_P13, 4}, IfxPort_OutputIdx_alt1};

794 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT260_P14_13_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 260, {&MODULE_P14,13}, IfxPort_OutputIdx_alt1};

795 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT140_P32_5_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 140, {&MODULE_P32, 5}, IfxPort_OutputIdx_alt1};

796 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT143_P33_14_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 143, {&MODULE_P33,14}, IfxPort_OutputIdx_alt1};

797 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT158_P01_12_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 158, {&MODULE_P01,12}, IfxPort_OutputIdx_alt1};

798 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT186_P31_12_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 186, {&MODULE_P31,12}, IfxPort_OutputIdx_alt1};

799 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT218_P25_12_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 218, {&MODULE_P25,12}, IfxPort_OutputIdx_alt1};

800 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT254_P13_5_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 254, {&MODULE_P13, 5}, IfxPort_OutputIdx_alt1};

801 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT261_P14_12_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 261, {&MODULE_P14,12}, IfxPort_OutputIdx_alt1};

802 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT31_P33_9_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_i, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1};

803 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_5_TOUT146_P34_1_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 146, {&MODULE_P34, 1}, IfxPort_OutputIdx_alt1};

804 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_5_TOUT159_P01_1_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 159, {&MODULE_P01, 1}, IfxPort_OutputIdx_alt1};

805 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_5_TOUT187_P31_13_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 187, {&MODULE_P31,13}, IfxPort_OutputIdx_alt1};

806 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_5_TOUT219_P25_13_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 219, {&MODULE_P25,13}, IfxPort_OutputIdx_alt1};

807 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_5_TOUT243_P15_11_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_i, 243, {&MODULE_P15,11}, IfxPort_OutputIdx_alt1};

808 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_5_TOUT255_P13_6_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 255, {&MODULE_P13, 6}, IfxPort_OutputIdx_alt1};

809 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_5_TOUT262_P13_13_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 262, {&MODULE_P13,13}, IfxPort_OutputIdx_alt1};

810 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_6_TOUT147_P34_2_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 147, {&MODULE_P34, 2}, IfxPort_OutputIdx_alt1};

811 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_6_TOUT160_P01_9_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 160, {&MODULE_P01, 9}, IfxPort_OutputIdx_alt1};

812 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_6_TOUT188_P31_14_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 188, {&MODULE_P31,14}, IfxPort_OutputIdx_alt1};

813 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_6_TOUT220_P25_14_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 220, {&MODULE_P25,14}, IfxPort_OutputIdx_alt1};

814 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_6_TOUT256_P13_7_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 256, {&MODULE_P13, 7}, IfxPort_OutputIdx_alt1};

815 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_6_TOUT263_P14_15_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 263, {&MODULE_P14,15}, IfxPort_OutputIdx_alt1};

816 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_7_TOUT148_P34_3_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 148, {&MODULE_P34, 3}, IfxPort_OutputIdx_alt1};

817 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_7_TOUT161_P01_13_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 161, {&MODULE_P01,13}, IfxPort_OutputIdx_alt1};

818 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_7_TOUT189_P31_15_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 189, {&MODULE_P31,15}, IfxPort_OutputIdx_alt1};

819 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_7_TOUT221_P25_15_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 221, {&MODULE_P25,15}, IfxPort_OutputIdx_alt1};

820 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_7_TOUT244_P15_12_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_i, 244, {&MODULE_P15,12}, IfxPort_OutputIdx_alt1};

821 IfxGtm_Atom_ToutMap IfxGtm_ATOM6_7_TOUT264_P13_15_OUT = {IfxGtm_Atom_6, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 264, {&MODULE_P13,15}, IfxPort_OutputIdx_alt1};

822 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_0_TOUT149_P34_4_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 149, {&MODULE_P34, 4}, IfxPort_OutputIdx_alt1};

823 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_0_TOUT162_P01_8_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 162, {&MODULE_P01, 8}, IfxPort_OutputIdx_alt1};

824 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_0_TOUT190_P30_0_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 190, {&MODULE_P30, 0}, IfxPort_OutputIdx_alt1};

825 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_0_TOUT222_P24_0_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 222, {&MODULE_P24, 0}, IfxPort_OutputIdx_alt1};

826 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_0_TOUT249_P13_12_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 249, {&MODULE_P13,12}, IfxPort_OutputIdx_alt1};

827 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_0_TOUT258_P14_11_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_j, 258, {&MODULE_P14,11}, IfxPort_OutputIdx_alt1};

828 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT150_P34_5_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 150, {&MODULE_P34, 5}, IfxPort_OutputIdx_alt1};

829 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT163_P01_10_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 163, {&MODULE_P01,10}, IfxPort_OutputIdx_alt1};

830 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT191_P30_1_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 191, {&MODULE_P30, 1}, IfxPort_OutputIdx_alt1};

831 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT223_P24_1_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 223, {&MODULE_P24, 1}, IfxPort_OutputIdx_alt1};

832 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT242_P15_10_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 242, {&MODULE_P15,10}, IfxPort_OutputIdx_alt1};

833 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT245_P15_13_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 245, {&MODULE_P15,13}, IfxPort_OutputIdx_alt1};

834 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT253_P13_4_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_j, 253, {&MODULE_P13, 4}, IfxPort_OutputIdx_alt1};

835 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT265_P10_9_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 265, {&MODULE_P10, 9}, IfxPort_OutputIdx_alt1};

836 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_2_TOUT164_P01_14_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 164, {&MODULE_P01,14}, IfxPort_OutputIdx_alt1};

837 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_2_TOUT192_P30_2_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 192, {&MODULE_P30, 2}, IfxPort_OutputIdx_alt1};

838 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_2_TOUT224_P24_2_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 224, {&MODULE_P24, 2}, IfxPort_OutputIdx_alt1};

839 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_2_TOUT243_P15_11_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 243, {&MODULE_P15,11}, IfxPort_OutputIdx_alt1};

840 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_2_TOUT246_P15_14_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 246, {&MODULE_P15,14}, IfxPort_OutputIdx_alt1};

841 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_2_TOUT254_P13_5_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_j, 254, {&MODULE_P13, 5}, IfxPort_OutputIdx_alt1};

842 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_2_TOUT266_P10_10_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 266, {&MODULE_P10,10}, IfxPort_OutputIdx_alt1};

843 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_3_TOUT166_P00_14_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 166, {&MODULE_P00,14}, IfxPort_OutputIdx_alt1};

844 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_3_TOUT193_P30_3_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 193, {&MODULE_P30, 3}, IfxPort_OutputIdx_alt1};

845 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_3_TOUT225_P24_3_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 225, {&MODULE_P24, 3}, IfxPort_OutputIdx_alt1};

846 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_3_TOUT244_P15_12_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 244, {&MODULE_P15,12}, IfxPort_OutputIdx_alt1};

847 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_3_TOUT247_P15_15_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 247, {&MODULE_P15,15}, IfxPort_OutputIdx_alt1};

848 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_3_TOUT255_P13_6_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_j, 255, {&MODULE_P13, 6}, IfxPort_OutputIdx_alt1};

849 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_3_TOUT267_P10_14_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 267, {&MODULE_P10,14}, IfxPort_OutputIdx_alt1};

850 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_4_TOUT167_P00_13_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 167, {&MODULE_P00,13}, IfxPort_OutputIdx_alt1};

851 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_4_TOUT194_P30_4_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 194, {&MODULE_P30, 4}, IfxPort_OutputIdx_alt1};

852 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_4_TOUT226_P24_4_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 226, {&MODULE_P24, 4}, IfxPort_OutputIdx_alt1};

853 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_4_TOUT245_P15_13_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 245, {&MODULE_P15,13}, IfxPort_OutputIdx_alt1};

854 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_4_TOUT248_P13_9_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_j, 248, {&MODULE_P13, 9}, IfxPort_OutputIdx_alt1};

855 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_4_TOUT268_P10_13_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 268, {&MODULE_P10,13}, IfxPort_OutputIdx_alt1};

856 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_5_TOUT168_P00_15_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 168, {&MODULE_P00,15}, IfxPort_OutputIdx_alt1};

857 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_5_TOUT195_P30_5_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 195, {&MODULE_P30, 5}, IfxPort_OutputIdx_alt1};

858 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_5_TOUT227_P24_5_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 227, {&MODULE_P24, 5}, IfxPort_OutputIdx_alt1};

859 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_5_TOUT246_P15_14_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 246, {&MODULE_P15,14}, IfxPort_OutputIdx_alt1};

860 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_5_TOUT251_P13_10_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 251, {&MODULE_P13,10}, IfxPort_OutputIdx_alt1};

861 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_5_TOUT269_P10_11_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 269, {&MODULE_P10,11}, IfxPort_OutputIdx_alt1};

862 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_6_TOUT151_P02_12_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 151, {&MODULE_P02,12}, IfxPort_OutputIdx_alt1};

863 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_6_TOUT153_P02_13_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 153, {&MODULE_P02,13}, IfxPort_OutputIdx_alt1};

864 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_6_TOUT196_P30_6_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 196, {&MODULE_P30, 6}, IfxPort_OutputIdx_alt1};

865 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_6_TOUT228_P24_6_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 228, {&MODULE_P24, 6}, IfxPort_OutputIdx_alt1};

866 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_6_TOUT247_P15_15_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 247, {&MODULE_P15,15}, IfxPort_OutputIdx_alt1};

867 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_6_TOUT249_P13_12_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_j, 249, {&MODULE_P13,12}, IfxPort_OutputIdx_alt1};

868 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_6_TOUT270_P10_15_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 270, {&MODULE_P10,15}, IfxPort_OutputIdx_alt1};

869 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_7_TOUT152_P02_15_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 152, {&MODULE_P02,15}, IfxPort_OutputIdx_alt1};

870 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_7_TOUT154_P02_14_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 154, {&MODULE_P02,14}, IfxPort_OutputIdx_alt1};

871 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_7_TOUT161_P01_13_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_k, 161, {&MODULE_P01,13}, IfxPort_OutputIdx_alt1};

872 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_7_TOUT197_P30_7_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 197, {&MODULE_P30, 7}, IfxPort_OutputIdx_alt1};

873 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_7_TOUT229_P24_7_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 229, {&MODULE_P24, 7}, IfxPort_OutputIdx_alt1};

874 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_7_TOUT248_P13_9_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 248, {&MODULE_P13, 9}, IfxPort_OutputIdx_alt1};

875 IfxGtm_Atom_ToutMap IfxGtm_ATOM7_7_TOUT261_P14_12_OUT = {IfxGtm_Atom_7, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 261, {&MODULE_P14,12}, IfxPort_OutputIdx_alt1};

876 IfxGtm_Atom_ToutMap IfxGtm_ATOM8_0_TOUT162_P01_8_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 162, {&MODULE_P01, 8}, IfxPort_OutputIdx_alt1};

877 IfxGtm_Atom_ToutMap IfxGtm_ATOM8_0_TOUT198_P30_8_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 198, {&MODULE_P30, 8}, IfxPort_OutputIdx_alt1};

878 IfxGtm_Atom_ToutMap IfxGtm_ATOM8_0_TOUT230_P24_8_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 230, {&MODULE_P24, 8}, IfxPort_OutputIdx_alt1};

879 IfxGtm_Atom_ToutMap IfxGtm_ATOM8_0_TOUT242_P15_10_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_j, 242, {&MODULE_P15,10}, IfxPort_OutputIdx_alt1};

880 IfxGtm_Atom_ToutMap IfxGtm_ATOM8_0_TOUT250_P13_11_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 250, {&MODULE_P13,11}, IfxPort_OutputIdx_alt1};

881 IfxGtm_Atom_ToutMap IfxGtm_ATOM8_1_TOUT163_P01_10_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 163, {&MODULE_P01,10}, IfxPort_OutputIdx_alt1};

882 IfxGtm_Atom_ToutMap IfxGtm_ATOM8_1_TOUT199_P30_9_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 199, {&MODULE_P30, 9}, IfxPort_OutputIdx_alt1};

883 IfxGtm_Atom_ToutMap IfxGtm_ATOM8_1_TOUT231_P24_9_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 231, {&MODULE_P24, 9}, IfxPort_OutputIdx_alt1};

884 IfxGtm_Atom_ToutMap IfxGtm_ATOM8_1_TOUT251_P13_10_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 251, {&MODULE_P13,10}, IfxPort_OutputIdx_alt1};

885 IfxGtm_Atom_ToutMap IfxGtm_ATOM8_1_TOUT258_P14_11_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 258, {&MODULE_P14,11}, IfxPort_OutputIdx_alt1};

886 IfxGtm_Atom_ToutMap IfxGtm_ATOM8_2_TOUT164_P01_14_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 164, {&MODULE_P01,14}, IfxPort_OutputIdx_alt1};

887 IfxGtm_Atom_ToutMap IfxGtm_ATOM8_2_TOUT200_P30_10_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 200, {&MODULE_P30,10}, IfxPort_OutputIdx_alt1};

888 IfxGtm_Atom_ToutMap IfxGtm_ATOM8_2_TOUT232_P24_10_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 232, {&MODULE_P24,10}, IfxPort_OutputIdx_alt1};

889 IfxGtm_Atom_ToutMap IfxGtm_ATOM8_2_TOUT252_P13_14_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 252, {&MODULE_P13,14}, IfxPort_OutputIdx_alt1};

890 IfxGtm_Atom_ToutMap IfxGtm_ATOM8_2_TOUT259_P14_14_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 259, {&MODULE_P14,14}, IfxPort_OutputIdx_alt1};

891 IfxGtm_Atom_ToutMap IfxGtm_ATOM8_3_TOUT166_P00_14_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 166, {&MODULE_P00,14}, IfxPort_OutputIdx_alt1};

892 IfxGtm_Atom_ToutMap IfxGtm_ATOM8_3_TOUT201_P30_11_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 201, {&MODULE_P30,11}, IfxPort_OutputIdx_alt1};

893 IfxGtm_Atom_ToutMap IfxGtm_ATOM8_3_TOUT233_P24_11_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 233, {&MODULE_P24,11}, IfxPort_OutputIdx_alt1};

894 IfxGtm_Atom_ToutMap IfxGtm_ATOM8_3_TOUT253_P13_4_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 253, {&MODULE_P13, 4}, IfxPort_OutputIdx_alt1};

895 IfxGtm_Atom_ToutMap IfxGtm_ATOM8_3_TOUT260_P14_13_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 260, {&MODULE_P14,13}, IfxPort_OutputIdx_alt1};

896 IfxGtm_Atom_ToutMap IfxGtm_ATOM8_4_TOUT167_P00_13_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 167, {&MODULE_P00,13}, IfxPort_OutputIdx_alt1};

897 IfxGtm_Atom_ToutMap IfxGtm_ATOM8_4_TOUT202_P30_12_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 202, {&MODULE_P30,12}, IfxPort_OutputIdx_alt1};

898 IfxGtm_Atom_ToutMap IfxGtm_ATOM8_4_TOUT234_P24_12_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 234, {&MODULE_P24,12}, IfxPort_OutputIdx_alt1};

899 IfxGtm_Atom_ToutMap IfxGtm_ATOM8_4_TOUT254_P13_5_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 254, {&MODULE_P13, 5}, IfxPort_OutputIdx_alt1};

900 IfxGtm_Atom_ToutMap IfxGtm_ATOM8_4_TOUT261_P14_12_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 261, {&MODULE_P14,12}, IfxPort_OutputIdx_alt1};

901 IfxGtm_Atom_ToutMap IfxGtm_ATOM8_5_TOUT168_P00_15_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 168, {&MODULE_P00,15}, IfxPort_OutputIdx_alt1};

902 IfxGtm_Atom_ToutMap IfxGtm_ATOM8_5_TOUT203_P30_13_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 203, {&MODULE_P30,13}, IfxPort_OutputIdx_alt1};

903 IfxGtm_Atom_ToutMap IfxGtm_ATOM8_5_TOUT235_P24_13_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 235, {&MODULE_P24,13}, IfxPort_OutputIdx_alt1};

904 IfxGtm_Atom_ToutMap IfxGtm_ATOM8_5_TOUT243_P15_11_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_j, 243, {&MODULE_P15,11}, IfxPort_OutputIdx_alt1};

905 IfxGtm_Atom_ToutMap IfxGtm_ATOM8_5_TOUT255_P13_6_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 255, {&MODULE_P13, 6}, IfxPort_OutputIdx_alt1};

906 IfxGtm_Atom_ToutMap IfxGtm_ATOM8_5_TOUT262_P13_13_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 262, {&MODULE_P13,13}, IfxPort_OutputIdx_alt1};

907 IfxGtm_Atom_ToutMap IfxGtm_ATOM8_6_TOUT151_P02_12_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 151, {&MODULE_P02,12}, IfxPort_OutputIdx_alt1};

908 IfxGtm_Atom_ToutMap IfxGtm_ATOM8_6_TOUT153_P02_13_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 153, {&MODULE_P02,13}, IfxPort_OutputIdx_alt1};

909 IfxGtm_Atom_ToutMap IfxGtm_ATOM8_6_TOUT204_P30_14_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 204, {&MODULE_P30,14}, IfxPort_OutputIdx_alt1};

910 IfxGtm_Atom_ToutMap IfxGtm_ATOM8_6_TOUT236_P24_14_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 236, {&MODULE_P24,14}, IfxPort_OutputIdx_alt1};

911 IfxGtm_Atom_ToutMap IfxGtm_ATOM8_6_TOUT256_P13_7_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 256, {&MODULE_P13, 7}, IfxPort_OutputIdx_alt1};

912 IfxGtm_Atom_ToutMap IfxGtm_ATOM8_6_TOUT263_P14_15_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 263, {&MODULE_P14,15}, IfxPort_OutputIdx_alt1};

913 IfxGtm_Atom_ToutMap IfxGtm_ATOM8_7_TOUT152_P02_15_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 152, {&MODULE_P02,15}, IfxPort_OutputIdx_alt1};

914 IfxGtm_Atom_ToutMap IfxGtm_ATOM8_7_TOUT154_P02_14_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 154, {&MODULE_P02,14}, IfxPort_OutputIdx_alt1};

915 IfxGtm_Atom_ToutMap IfxGtm_ATOM8_7_TOUT161_P01_13_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_l, 161, {&MODULE_P01,13}, IfxPort_OutputIdx_alt1};

916 IfxGtm_Atom_ToutMap IfxGtm_ATOM8_7_TOUT205_P30_15_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 205, {&MODULE_P30,15}, IfxPort_OutputIdx_alt1};

917 IfxGtm_Atom_ToutMap IfxGtm_ATOM8_7_TOUT237_P24_15_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 237, {&MODULE_P24,15}, IfxPort_OutputIdx_alt1};

918 IfxGtm_Atom_ToutMap IfxGtm_ATOM8_7_TOUT244_P15_12_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_j, 244, {&MODULE_P15,12}, IfxPort_OutputIdx_alt1};

919 IfxGtm_Atom_ToutMap IfxGtm_ATOM8_7_TOUT264_P13_15_OUT = {IfxGtm_Atom_8, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 264, {&MODULE_P13,15}, IfxPort_OutputIdx_alt1};

920 IfxGtm_Clk_Out IfxGtm_CLK0_P23_1_OUT = {&MODULE_GTM, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt4};

921 IfxGtm_Clk_Out IfxGtm_CLK1_P32_4_OUT = {&MODULE_GTM, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt4};

922 IfxGtm_Clk_Out IfxGtm_CLK2_P11_12_OUT = {&MODULE_GTM, {&MODULE_P11,12}, IfxPort_OutputIdx_alt3};

923 IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P00_9_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P00, 9}, (IfxGtm_ChXSel)1};

924 IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P02_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P02, 0}, (IfxGtm_ChXSel)2};

925 IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P10_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P10, 7}, (IfxGtm_ChXSel)3};

926 IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P13_12_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P13,12}, (IfxGtm_ChXSel)11};

927 IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P14_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P14, 5}, (IfxGtm_ChXSel)4};

928 IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P14_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P14, 7}, (IfxGtm_ChXSel)5};

929 IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P15_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P15, 6}, (IfxGtm_ChXSel)6};

930 IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P21_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P21, 2}, (IfxGtm_ChXSel)7};

931 IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P22_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P22, 1}, (IfxGtm_ChXSel)8};

932 IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P33_10_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P33,10}, (IfxGtm_ChXSel)9};

933 IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P33_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P33, 4}, (IfxGtm_ChXSel)10};

934 IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P00_10_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P00,10}, (IfxGtm_ChXSel)1};

935 IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P02_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P02, 1}, (IfxGtm_ChXSel)2};

936 IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P10_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P10, 1}, (IfxGtm_ChXSel)3};

937 IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P10_9_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P10, 9}, (IfxGtm_ChXSel)10};

938 IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P14_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P14, 6}, (IfxGtm_ChXSel)4};

939 IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P15_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P15, 7}, (IfxGtm_ChXSel)5};

940 IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P21_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P21, 3}, (IfxGtm_ChXSel)6};

941 IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P22_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P22, 0}, (IfxGtm_ChXSel)7};

942 IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P33_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P33, 5}, (IfxGtm_ChXSel)8};

943 IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P33_9_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P33, 9}, (IfxGtm_ChXSel)9};

944 IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P00_11_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P00,11}, (IfxGtm_ChXSel)1};

945 IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P02_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P02, 2}, (IfxGtm_ChXSel)2};

946 IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P02_9_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P02, 9}, (IfxGtm_ChXSel)10};

947 IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P10_10_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P10,10}, (IfxGtm_ChXSel)11};

948 IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P10_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P10, 2}, (IfxGtm_ChXSel)3};

949 IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P10_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P10, 5}, (IfxGtm_ChXSel)4};

950 IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P15_8_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P15, 8}, (IfxGtm_ChXSel)5};

951 IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P21_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P21, 4}, (IfxGtm_ChXSel)6};

952 IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P23_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P23, 5}, (IfxGtm_ChXSel)7};

953 IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P33_11_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P33,11}, (IfxGtm_ChXSel)8};

954 IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P33_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P33, 6}, (IfxGtm_ChXSel)9};

955 IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P00_12_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P00,12}, (IfxGtm_ChXSel)1};

956 IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P02_10_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P02,10}, (IfxGtm_ChXSel)10};

957 IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P02_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P02, 3}, (IfxGtm_ChXSel)2};

958 IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P10_14_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P10,14}, (IfxGtm_ChXSel)11};

959 IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P10_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P10, 3}, (IfxGtm_ChXSel)3};

960 IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P10_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P10, 6}, (IfxGtm_ChXSel)4};

961 IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P14_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P14, 0}, (IfxGtm_ChXSel)5};

962 IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P21_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P21, 5}, (IfxGtm_ChXSel)6};

963 IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P22_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P22, 2}, (IfxGtm_ChXSel)7};

964 IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P32_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P32, 2}, (IfxGtm_ChXSel)8};

965 IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P33_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P33, 7}, (IfxGtm_ChXSel)9};

966 IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P02_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P02, 4}, (IfxGtm_ChXSel)1};

967 IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P10_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P10, 0}, (IfxGtm_ChXSel)2};

968 IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P10_13_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P10,13}, (IfxGtm_ChXSel)9};

969 IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P14_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P14, 1}, (IfxGtm_ChXSel)3};

970 IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P21_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P21, 6}, (IfxGtm_ChXSel)8};

971 IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P22_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P22, 3}, (IfxGtm_ChXSel)4};

972 IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P32_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P32, 3}, (IfxGtm_ChXSel)5};

973 IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P33_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P33, 0}, (IfxGtm_ChXSel)6};

974 IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P33_8_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P33, 8}, (IfxGtm_ChXSel)7};

975 IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P01_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P01, 3}, (IfxGtm_ChXSel)8};

976 IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P02_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P02, 5}, (IfxGtm_ChXSel)1};

977 IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P10_11_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P10,11}, (IfxGtm_ChXSel)9};

978 IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P10_8_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P10, 8}, (IfxGtm_ChXSel)2};

979 IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P14_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P14, 2}, (IfxGtm_ChXSel)3};

980 IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P21_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P21, 7}, (IfxGtm_ChXSel)7};

981 IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P23_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P23, 0}, (IfxGtm_ChXSel)4};

982 IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P32_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P32, 4}, (IfxGtm_ChXSel)5};

983 IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P33_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P33, 1}, (IfxGtm_ChXSel)6};

984 IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P01_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P01, 4}, (IfxGtm_ChXSel)8};

985 IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P02_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P02, 6}, (IfxGtm_ChXSel)1};

986 IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P10_15_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P10,15}, (IfxGtm_ChXSel)9};

987 IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P10_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P10, 4}, (IfxGtm_ChXSel)2};

988 IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P14_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P14, 3}, (IfxGtm_ChXSel)3};

989 IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P20_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P20, 0}, (IfxGtm_ChXSel)7};

990 IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P23_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P23, 1}, (IfxGtm_ChXSel)4};

991 IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P23_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P23, 2}, (IfxGtm_ChXSel)5};

992 IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P33_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P33, 2}, (IfxGtm_ChXSel)6};

993 IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P02_11_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P02,11}, (IfxGtm_ChXSel)7};

994 IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P02_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P02, 7}, (IfxGtm_ChXSel)1};

995 IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P11_15_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P11,15}, (IfxGtm_ChXSel)8};

996 IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P14_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P14, 4}, (IfxGtm_ChXSel)2};

997 IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P20_8_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P20, 8}, (IfxGtm_ChXSel)3};

998 IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P23_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P23, 3}, (IfxGtm_ChXSel)4};

999 IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P23_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P23, 4}, (IfxGtm_ChXSel)5};

1000 IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P33_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P33, 3}, (IfxGtm_ChXSel)6};

1001 IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P00_9_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P00, 9}, (IfxGtm_ChXSel)1};

1002 IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P02_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P02, 0}, (IfxGtm_ChXSel)2};

1003 IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P10_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P10, 7}, (IfxGtm_ChXSel)3};

1004 IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P14_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P14, 5}, (IfxGtm_ChXSel)4};

1005 IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P14_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P14, 7}, (IfxGtm_ChXSel)5};

1006 IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P15_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P15, 6}, (IfxGtm_ChXSel)6};

1007 IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P21_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P21, 2}, (IfxGtm_ChXSel)7};

1008 IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P22_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P22, 1}, (IfxGtm_ChXSel)8};

1009 IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P33_10_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P33,10}, (IfxGtm_ChXSel)9};

1010 IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P33_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P33, 4}, (IfxGtm_ChXSel)10};

1011 IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P00_10_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P00,10}, (IfxGtm_ChXSel)1};

1012 IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P02_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P02, 1}, (IfxGtm_ChXSel)2};

1013 IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P10_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P10, 1}, (IfxGtm_ChXSel)3};

1014 IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P14_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P14, 6}, (IfxGtm_ChXSel)4};

1015 IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P15_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P15, 7}, (IfxGtm_ChXSel)5};

1016 IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P21_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P21, 3}, (IfxGtm_ChXSel)6};

1017 IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P22_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P22, 0}, (IfxGtm_ChXSel)7};

1018 IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P33_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P33, 5}, (IfxGtm_ChXSel)8};

1019 IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P33_9_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P33, 9}, (IfxGtm_ChXSel)9};

1020 IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P00_11_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P00,11}, (IfxGtm_ChXSel)1};

1021 IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P02_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P02, 2}, (IfxGtm_ChXSel)2};

1022 IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P10_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P10, 2}, (IfxGtm_ChXSel)3};

1023 IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P10_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P10, 5}, (IfxGtm_ChXSel)4};

1024 IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P15_8_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P15, 8}, (IfxGtm_ChXSel)5};

1025 IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P21_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P21, 4}, (IfxGtm_ChXSel)6};

1026 IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P23_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P23, 5}, (IfxGtm_ChXSel)7};

1027 IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P23_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P23, 6}, (IfxGtm_ChXSel)10};

1028 IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P33_11_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P33,11}, (IfxGtm_ChXSel)8};

1029 IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P33_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P33, 6}, (IfxGtm_ChXSel)9};

1030 IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P00_12_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P00,12}, (IfxGtm_ChXSel)1};

1031 IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P02_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P02, 3}, (IfxGtm_ChXSel)2};

1032 IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P10_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P10, 3}, (IfxGtm_ChXSel)3};

1033 IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P10_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P10, 6}, (IfxGtm_ChXSel)4};

1034 IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P14_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P14, 0}, (IfxGtm_ChXSel)5};

1035 IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P21_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P21, 5}, (IfxGtm_ChXSel)6};

1036 IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P22_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P22, 2}, (IfxGtm_ChXSel)7};

1037 IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P23_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P23, 7}, (IfxGtm_ChXSel)10};

1038 IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P32_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P32, 2}, (IfxGtm_ChXSel)8};

1039 IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P33_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P33, 7}, (IfxGtm_ChXSel)9};

1040 IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P02_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P02, 4}, (IfxGtm_ChXSel)1};

1041 IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P10_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P10, 0}, (IfxGtm_ChXSel)2};

1042 IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P14_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P14, 1}, (IfxGtm_ChXSel)3};

1043 IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P20_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P20, 0}, (IfxGtm_ChXSel)9};

1044 IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P21_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P21, 6}, (IfxGtm_ChXSel)8};

1045 IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P22_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P22, 3}, (IfxGtm_ChXSel)4};

1046 IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P32_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P32, 3}, (IfxGtm_ChXSel)5};

1047 IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P33_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P33, 0}, (IfxGtm_ChXSel)6};

1048 IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P33_8_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P33, 8}, (IfxGtm_ChXSel)7};

1049 IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P02_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P02, 5}, (IfxGtm_ChXSel)1};

1050 IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P10_8_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P10, 8}, (IfxGtm_ChXSel)2};

1051 IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P14_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P14, 2}, (IfxGtm_ChXSel)3};

1052 IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P20_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P20, 7}, (IfxGtm_ChXSel)8};

1053 IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P21_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P21, 7}, (IfxGtm_ChXSel)7};

1054 IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P23_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P23, 0}, (IfxGtm_ChXSel)4};

1055 IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P32_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P32, 4}, (IfxGtm_ChXSel)5};

1056 IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P33_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P33, 1}, (IfxGtm_ChXSel)6};

1057 IfxGtm_Tim_TinMap IfxGtm_TIM1_6_P02_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P02, 6}, (IfxGtm_ChXSel)1};

1058 IfxGtm_Tim_TinMap IfxGtm_TIM1_6_P10_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P10, 4}, (IfxGtm_ChXSel)2};

1059 IfxGtm_Tim_TinMap IfxGtm_TIM1_6_P14_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P14, 3}, (IfxGtm_ChXSel)3};

1060 IfxGtm_Tim_TinMap IfxGtm_TIM1_6_P20_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P20, 0}, (IfxGtm_ChXSel)7};

1061 IfxGtm_Tim_TinMap IfxGtm_TIM1_6_P23_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P23, 1}, (IfxGtm_ChXSel)4};

1062 IfxGtm_Tim_TinMap IfxGtm_TIM1_6_P23_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P23, 2}, (IfxGtm_ChXSel)5};

1063 IfxGtm_Tim_TinMap IfxGtm_TIM1_6_P33_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P33, 2}, (IfxGtm_ChXSel)6};

1064 IfxGtm_Tim_TinMap IfxGtm_TIM1_7_P02_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P02, 7}, (IfxGtm_ChXSel)1};

1065 IfxGtm_Tim_TinMap IfxGtm_TIM1_7_P14_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P14, 4}, (IfxGtm_ChXSel)2};

1066 IfxGtm_Tim_TinMap IfxGtm_TIM1_7_P20_8_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P20, 8}, (IfxGtm_ChXSel)3};

1067 IfxGtm_Tim_TinMap IfxGtm_TIM1_7_P23_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P23, 3}, (IfxGtm_ChXSel)4};

1068 IfxGtm_Tim_TinMap IfxGtm_TIM1_7_P23_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P23, 4}, (IfxGtm_ChXSel)5};

1069 IfxGtm_Tim_TinMap IfxGtm_TIM1_7_P33_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P33, 3}, (IfxGtm_ChXSel)6};

1070 IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P00_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P00, 0}, (IfxGtm_ChXSel)1};

1071 IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P01_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P01, 3}, (IfxGtm_ChXSel)14};

1072 IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P02_8_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P02, 8}, (IfxGtm_ChXSel)2};

1073 IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P11_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P11, 0}, (IfxGtm_ChXSel)7};

1074 IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P11_10_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P11,10}, (IfxGtm_ChXSel)9};

1075 IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P13_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P13, 3}, (IfxGtm_ChXSel)3};

1076 IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P15_5_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P15, 5}, (IfxGtm_ChXSel)4};

1077 IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P20_12_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P20,12}, (IfxGtm_ChXSel)5};

1078 IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P31_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P31, 0}, (IfxGtm_ChXSel)13};

1079 IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P33_12_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P33,12}, (IfxGtm_ChXSel)6};

1080 IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P33_14_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P33,14}, (IfxGtm_ChXSel)8};

1081 IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P00_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P00, 1}, (IfxGtm_ChXSel)1};

1082 IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P00_2_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P00, 2}, (IfxGtm_ChXSel)2};

1083 IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P01_4_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P01, 4}, (IfxGtm_ChXSel)14};

1084 IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P11_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P11, 1}, (IfxGtm_ChXSel)6};

1085 IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P11_2_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P11, 2}, (IfxGtm_ChXSel)3};

1086 IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P15_10_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P15,10}, (IfxGtm_ChXSel)8};

1087 IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P20_13_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P20,13}, (IfxGtm_ChXSel)4};

1088 IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P31_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P31, 1}, (IfxGtm_ChXSel)9};

1089 IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P33_13_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P33,13}, (IfxGtm_ChXSel)5};

1090 IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P33_15_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P33,15}, (IfxGtm_ChXSel)7};

1091 IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P00_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P00, 3}, (IfxGtm_ChXSel)1};

1092 IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P01_5_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P01, 5}, (IfxGtm_ChXSel)7};

1093 IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P11_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P11, 3}, (IfxGtm_ChXSel)2};

1094 IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P11_4_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P11, 4}, (IfxGtm_ChXSel)6};

1095 IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P14_8_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P14, 8}, (IfxGtm_ChXSel)3};

1096 IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P15_11_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P15,11}, (IfxGtm_ChXSel)8};

1097 IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P15_6_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P15, 6}, (IfxGtm_ChXSel)14};

1098 IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P20_14_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P20,14}, (IfxGtm_ChXSel)4};

1099 IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P31_2_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P31, 2}, (IfxGtm_ChXSel)9};

1100 IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P32_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P32, 0}, (IfxGtm_ChXSel)5};

1101 IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P00_4_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P00, 4}, (IfxGtm_ChXSel)1};

1102 IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P01_5_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P01, 5}, (IfxGtm_ChXSel)7};

1103 IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P11_5_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P11, 5}, (IfxGtm_ChXSel)8};

1104 IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P11_6_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P11, 6}, (IfxGtm_ChXSel)2};

1105 IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P14_9_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P14, 9}, (IfxGtm_ChXSel)3};

1106 IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P15_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P15, 0}, (IfxGtm_ChXSel)4};

1107 IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P15_12_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P15,12}, (IfxGtm_ChXSel)6};

1108 IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P20_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P20, 1}, (IfxGtm_ChXSel)5};

1109 IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P31_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P31, 3}, (IfxGtm_ChXSel)14};

1110 IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P34_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P34, 1}, (IfxGtm_ChXSel)9};

1111 IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P00_5_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P00, 5}, (IfxGtm_ChXSel)1};

1112 IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P02_14_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P02,14}, (IfxGtm_ChXSel)14};

1113 IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P11_7_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P11, 7}, (IfxGtm_ChXSel)7};

1114 IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P11_9_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P11, 9}, (IfxGtm_ChXSel)2};

1115 IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P14_10_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P14,10}, (IfxGtm_ChXSel)3};

1116 IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P15_13_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P15,13}, (IfxGtm_ChXSel)9};

1117 IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P15_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P15, 1}, (IfxGtm_ChXSel)4};

1118 IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P20_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P20, 3}, (IfxGtm_ChXSel)5};

1119 IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P21_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P21, 0}, (IfxGtm_ChXSel)6};

1120 IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P31_4_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P31, 4}, (IfxGtm_ChXSel)12};

1121 IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P34_2_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P34, 2}, (IfxGtm_ChXSel)8};

1122 IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P00_6_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P00, 6}, (IfxGtm_ChXSel)1};

1123 IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P01_6_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P01, 6}, (IfxGtm_ChXSel)7};

1124 IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P02_15_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P02,15}, (IfxGtm_ChXSel)14};

1125 IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P11_10_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P11,10}, (IfxGtm_ChXSel)2};

1126 IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P11_8_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P11, 8}, (IfxGtm_ChXSel)8};

1127 IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P13_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P13, 0}, (IfxGtm_ChXSel)3};

1128 IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P15_14_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P15,14}, (IfxGtm_ChXSel)12};

1129 IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P15_2_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P15, 2}, (IfxGtm_ChXSel)4};

1130 IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P20_9_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P20, 9}, (IfxGtm_ChXSel)5};

1131 IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P21_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P21, 1}, (IfxGtm_ChXSel)6};

1132 IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P31_5_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P31, 5}, (IfxGtm_ChXSel)13};

1133 IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P34_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P34, 3}, (IfxGtm_ChXSel)9};

1134 IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P00_7_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P00, 7}, (IfxGtm_ChXSel)1};

1135 IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P01_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P01, 0}, (IfxGtm_ChXSel)13};

1136 IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P11_11_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P11,11}, (IfxGtm_ChXSel)2};

1137 IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P11_13_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P11,13}, (IfxGtm_ChXSel)7};

1138 IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P13_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P13, 1}, (IfxGtm_ChXSel)3};

1139 IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P15_15_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P15,15}, (IfxGtm_ChXSel)9};

1140 IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P15_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P15, 3}, (IfxGtm_ChXSel)4};

1141 IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P20_10_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P20,10}, (IfxGtm_ChXSel)6};

1142 IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P20_6_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P20, 6}, (IfxGtm_ChXSel)5};

1143 IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P22_6_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P22, 6}, (IfxGtm_ChXSel)14};

1144 IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P31_6_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P31, 6}, (IfxGtm_ChXSel)12};

1145 IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P34_4_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P34, 4}, (IfxGtm_ChXSel)8};

1146 IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P00_8_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P00, 8}, (IfxGtm_ChXSel)1};

1147 IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P01_7_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P01, 7}, (IfxGtm_ChXSel)7};

1148 IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P11_12_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P11,12}, (IfxGtm_ChXSel)2};

1149 IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P11_14_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P11,14}, (IfxGtm_ChXSel)8};

1150 IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P13_2_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P13, 2}, (IfxGtm_ChXSel)3};

1151 IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P13_9_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P13, 9}, (IfxGtm_ChXSel)12};

1152 IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P15_4_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P15, 4}, (IfxGtm_ChXSel)4};

1153 IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P20_11_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P20,11}, (IfxGtm_ChXSel)6};

1154 IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P20_7_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P20, 7}, (IfxGtm_ChXSel)5};

1155 IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P31_7_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P31, 7}, (IfxGtm_ChXSel)14};

1156 IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P34_5_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P34, 5}, (IfxGtm_ChXSel)9};

1157 IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P00_0_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_0, {&MODULE_P00, 0}, (IfxGtm_ChXSel)1};

1158 IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P00_5_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_0, {&MODULE_P00, 5}, (IfxGtm_ChXSel)11};

1159 IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P02_6_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_0, {&MODULE_P02, 6}, (IfxGtm_ChXSel)10};

1160 IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P02_8_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_0, {&MODULE_P02, 8}, (IfxGtm_ChXSel)2};

1161 IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P11_11_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_0, {&MODULE_P11,11}, (IfxGtm_ChXSel)14};

1162 IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P12_0_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_0, {&MODULE_P12, 0}, (IfxGtm_ChXSel)7};

1163 IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P13_11_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_0, {&MODULE_P13,11}, (IfxGtm_ChXSel)9};

1164 IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P13_3_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_0, {&MODULE_P13, 3}, (IfxGtm_ChXSel)3};

1165 IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P15_5_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_0, {&MODULE_P15, 5}, (IfxGtm_ChXSel)4};

1166 IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P20_12_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_0, {&MODULE_P20,12}, (IfxGtm_ChXSel)5};

1167 IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P22_4_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_0, {&MODULE_P22, 4}, (IfxGtm_ChXSel)8};

1168 IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P25_0_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_0, {&MODULE_P25, 0}, (IfxGtm_ChXSel)12};

1169 IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P33_0_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_0, {&MODULE_P33, 0}, (IfxGtm_ChXSel)13};

1170 IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P33_12_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_0, {&MODULE_P33,12}, (IfxGtm_ChXSel)6};

1171 IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P00_1_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_1, {&MODULE_P00, 1}, (IfxGtm_ChXSel)1};

1172 IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P00_2_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_1, {&MODULE_P00, 2}, (IfxGtm_ChXSel)2};

1173 IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P00_6_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_1, {&MODULE_P00, 6}, (IfxGtm_ChXSel)14};

1174 IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P02_7_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_1, {&MODULE_P02, 7}, (IfxGtm_ChXSel)10};

1175 IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P11_2_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_1, {&MODULE_P11, 2}, (IfxGtm_ChXSel)3};

1176 IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P12_1_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_1, {&MODULE_P12, 1}, (IfxGtm_ChXSel)6};

1177 IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P13_10_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_1, {&MODULE_P13,10}, (IfxGtm_ChXSel)8};

1178 IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P14_11_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_1, {&MODULE_P14,11}, (IfxGtm_ChXSel)9};

1179 IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P20_13_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_1, {&MODULE_P20,13}, (IfxGtm_ChXSel)4};

1180 IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P22_5_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_1, {&MODULE_P22, 5}, (IfxGtm_ChXSel)7};

1181 IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P25_1_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_1, {&MODULE_P25, 1}, (IfxGtm_ChXSel)11};

1182 IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P33_13_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_1, {&MODULE_P33,13}, (IfxGtm_ChXSel)5};

1183 IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P33_1_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_1, {&MODULE_P33, 1}, (IfxGtm_ChXSel)15};

1184 IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P00_3_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_2, {&MODULE_P00, 3}, (IfxGtm_ChXSel)1};

1185 IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P00_7_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_2, {&MODULE_P00, 7}, (IfxGtm_ChXSel)11};

1186 IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P02_8_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_2, {&MODULE_P02, 8}, (IfxGtm_ChXSel)10};

1187 IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P11_3_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_2, {&MODULE_P11, 3}, (IfxGtm_ChXSel)2};

1188 IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P13_14_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_2, {&MODULE_P13,14}, (IfxGtm_ChXSel)7};

1189 IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P14_14_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_2, {&MODULE_P14,14}, (IfxGtm_ChXSel)8};

1190 IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P14_8_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_2, {&MODULE_P14, 8}, (IfxGtm_ChXSel)3};

1191 IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P20_14_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_2, {&MODULE_P20,14}, (IfxGtm_ChXSel)4};

1192 IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P22_6_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_2, {&MODULE_P22, 6}, (IfxGtm_ChXSel)6};

1193 IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P25_2_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_2, {&MODULE_P25, 2}, (IfxGtm_ChXSel)9};

1194 IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P32_0_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_2, {&MODULE_P32, 0}, (IfxGtm_ChXSel)5};

1195 IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P33_2_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_2, {&MODULE_P33, 2}, (IfxGtm_ChXSel)14};

1196 IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P00_4_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_3, {&MODULE_P00, 4}, (IfxGtm_ChXSel)1};

1197 IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P00_8_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_3, {&MODULE_P00, 8}, (IfxGtm_ChXSel)11};

1198 IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P02_9_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_3, {&MODULE_P02, 9}, (IfxGtm_ChXSel)10};

1199 IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P11_6_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_3, {&MODULE_P11, 6}, (IfxGtm_ChXSel)2};

1200 IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P13_4_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_3, {&MODULE_P13, 4}, (IfxGtm_ChXSel)8};

1201 IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P14_13_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_3, {&MODULE_P14,13}, (IfxGtm_ChXSel)6};

1202 IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P14_9_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_3, {&MODULE_P14, 9}, (IfxGtm_ChXSel)3};

1203 IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P15_0_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_3, {&MODULE_P15, 0}, (IfxGtm_ChXSel)4};

1204 IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P20_1_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_3, {&MODULE_P20, 1}, (IfxGtm_ChXSel)5};

1205 IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P22_7_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_3, {&MODULE_P22, 7}, (IfxGtm_ChXSel)7};

1206 IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P25_3_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_3, {&MODULE_P25, 3}, (IfxGtm_ChXSel)9};

1207 IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P32_1_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_3, {&MODULE_P32, 1}, (IfxGtm_ChXSel)15};

1208 IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P33_3_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_3, {&MODULE_P33, 3}, (IfxGtm_ChXSel)12};

1209 IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P00_5_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_4, {&MODULE_P00, 5}, (IfxGtm_ChXSel)1};

1210 IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P02_10_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_4, {&MODULE_P02,10}, (IfxGtm_ChXSel)11};

1211 IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P11_9_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_4, {&MODULE_P11, 9}, (IfxGtm_ChXSel)2};

1212 IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P13_5_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_4, {&MODULE_P13, 5}, (IfxGtm_ChXSel)9};

1213 IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P14_10_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_4, {&MODULE_P14,10}, (IfxGtm_ChXSel)3};

1214 IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P14_12_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_4, {&MODULE_P14,12}, (IfxGtm_ChXSel)8};

1215 IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P15_1_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_4, {&MODULE_P15, 1}, (IfxGtm_ChXSel)4};

1216 IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P20_3_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_4, {&MODULE_P20, 3}, (IfxGtm_ChXSel)5};

1217 IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P21_0_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_4, {&MODULE_P21, 0}, (IfxGtm_ChXSel)6};

1218 IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P22_8_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_4, {&MODULE_P22, 8}, (IfxGtm_ChXSel)7};

1219 IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P25_4_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_4, {&MODULE_P25, 4}, (IfxGtm_ChXSel)10};

1220 IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P34_1_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_4, {&MODULE_P34, 1}, (IfxGtm_ChXSel)12};

1221 IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P00_6_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_5, {&MODULE_P00, 6}, (IfxGtm_ChXSel)1};

1222 IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P02_11_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_5, {&MODULE_P02,11}, (IfxGtm_ChXSel)12};

1223 IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P11_10_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_5, {&MODULE_P11,10}, (IfxGtm_ChXSel)2};

1224 IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P13_0_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_5, {&MODULE_P13, 0}, (IfxGtm_ChXSel)3};

1225 IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P13_13_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_5, {&MODULE_P13,13}, (IfxGtm_ChXSel)9};

1226 IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P13_6_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_5, {&MODULE_P13, 6}, (IfxGtm_ChXSel)10};

1227 IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P15_2_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_5, {&MODULE_P15, 2}, (IfxGtm_ChXSel)4};

1228 IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P20_9_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_5, {&MODULE_P20, 9}, (IfxGtm_ChXSel)5};

1229 IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P21_1_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_5, {&MODULE_P21, 1}, (IfxGtm_ChXSel)6};

1230 IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P22_9_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_5, {&MODULE_P22, 9}, (IfxGtm_ChXSel)7};

1231 IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P25_5_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_5, {&MODULE_P25, 5}, (IfxGtm_ChXSel)11};

1232 IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P32_5_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_5, {&MODULE_P32, 5}, (IfxGtm_ChXSel)8};

1233 IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P34_2_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_5, {&MODULE_P34, 2}, (IfxGtm_ChXSel)13};

1234 IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P00_7_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_6, {&MODULE_P00, 7}, (IfxGtm_ChXSel)1};

1235 IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P02_12_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_6, {&MODULE_P02,12}, (IfxGtm_ChXSel)12};

1236 IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P11_11_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_6, {&MODULE_P11,11}, (IfxGtm_ChXSel)2};

1237 IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P13_1_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_6, {&MODULE_P13, 1}, (IfxGtm_ChXSel)3};

1238 IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P13_7_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_6, {&MODULE_P13, 7}, (IfxGtm_ChXSel)10};

1239 IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P14_15_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_6, {&MODULE_P14,15}, (IfxGtm_ChXSel)9};

1240 IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P15_3_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_6, {&MODULE_P15, 3}, (IfxGtm_ChXSel)4};

1241 IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P20_10_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_6, {&MODULE_P20,10}, (IfxGtm_ChXSel)6};

1242 IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P20_6_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_6, {&MODULE_P20, 6}, (IfxGtm_ChXSel)5};

1243 IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P22_10_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_6, {&MODULE_P22,10}, (IfxGtm_ChXSel)7};

1244 IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P25_6_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_6, {&MODULE_P25, 6}, (IfxGtm_ChXSel)14};

1245 IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P26_0_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_6, {&MODULE_P26, 0}, (IfxGtm_ChXSel)11};

1246 IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P32_6_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_6, {&MODULE_P32, 6}, (IfxGtm_ChXSel)8};

1247 IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P34_3_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_6, {&MODULE_P34, 3}, (IfxGtm_ChXSel)13};

1248 IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P00_8_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_7, {&MODULE_P00, 8}, (IfxGtm_ChXSel)1};

1249 IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P02_13_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_7, {&MODULE_P02,13}, (IfxGtm_ChXSel)11};

1250 IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P11_12_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_7, {&MODULE_P11,12}, (IfxGtm_ChXSel)2};

1251 IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P13_15_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_7, {&MODULE_P13,15}, (IfxGtm_ChXSel)9};

1252 IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P13_2_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_7, {&MODULE_P13, 2}, (IfxGtm_ChXSel)3};

1253 IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P15_4_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_7, {&MODULE_P15, 4}, (IfxGtm_ChXSel)4};

1254 IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P20_11_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_7, {&MODULE_P20,11}, (IfxGtm_ChXSel)6};

1255 IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P20_7_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_7, {&MODULE_P20, 7}, (IfxGtm_ChXSel)5};

1256 IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P22_11_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_7, {&MODULE_P22,11}, (IfxGtm_ChXSel)7};

1257 IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P25_7_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_7, {&MODULE_P25, 7}, (IfxGtm_ChXSel)10};

1258 IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P32_7_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_7, {&MODULE_P32, 7}, (IfxGtm_ChXSel)8};

1259 IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P34_4_IN = {IfxGtm_Tim_3, IfxGtm_Tim_Ch_7, {&MODULE_P34, 4}, (IfxGtm_ChXSel)12};

1260 IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P00_13_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_0, {&MODULE_P00,13}, (IfxGtm_ChXSel)1};

1261 IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P00_9_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_0, {&MODULE_P00, 9}, (IfxGtm_ChXSel)7};

1262 IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P01_12_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_0, {&MODULE_P01,12}, (IfxGtm_ChXSel)2};

1263 IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P02_12_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_0, {&MODULE_P02,12}, (IfxGtm_ChXSel)3};

1264 IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P10_0_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_0, {&MODULE_P10, 0}, (IfxGtm_ChXSel)12};

1265 IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P10_8_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_0, {&MODULE_P10, 8}, (IfxGtm_ChXSel)13};

1266 IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P11_0_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_0, {&MODULE_P11, 0}, (IfxGtm_ChXSel)4};

1267 IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P12_0_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_0, {&MODULE_P12, 0}, (IfxGtm_ChXSel)5};

1268 IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P13_12_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_0, {&MODULE_P13,12}, (IfxGtm_ChXSel)6};

1269 IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P21_0_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_0, {&MODULE_P21, 0}, (IfxGtm_ChXSel)11};

1270 IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P24_0_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_0, {&MODULE_P24, 0}, (IfxGtm_ChXSel)8};

1271 IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P25_8_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_0, {&MODULE_P25, 8}, (IfxGtm_ChXSel)9};

1272 IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P30_0_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_0, {&MODULE_P30, 0}, (IfxGtm_ChXSel)10};

1273 IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P32_7_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_0, {&MODULE_P32, 7}, (IfxGtm_ChXSel)15};

1274 IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P00_10_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_1, {&MODULE_P00,10}, (IfxGtm_ChXSel)11};

1275 IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P00_15_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_1, {&MODULE_P00,15}, (IfxGtm_ChXSel)1};

1276 IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P01_1_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_1, {&MODULE_P01, 1}, (IfxGtm_ChXSel)2};

1277 IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P02_15_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_1, {&MODULE_P02,15}, (IfxGtm_ChXSel)3};

1278 IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P10_9_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_1, {&MODULE_P10, 9}, (IfxGtm_ChXSel)4};

1279 IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P11_1_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_1, {&MODULE_P11, 1}, (IfxGtm_ChXSel)5};

1280 IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P12_1_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_1, {&MODULE_P12, 1}, (IfxGtm_ChXSel)6};

1281 IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P15_10_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_1, {&MODULE_P15,10}, (IfxGtm_ChXSel)7};

1282 IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P21_1_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_1, {&MODULE_P21, 1}, (IfxGtm_ChXSel)13};

1283 IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P24_1_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_1, {&MODULE_P24, 1}, (IfxGtm_ChXSel)8};

1284 IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P25_9_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_1, {&MODULE_P25, 9}, (IfxGtm_ChXSel)9};

1285 IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P30_1_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_1, {&MODULE_P30, 1}, (IfxGtm_ChXSel)10};

1286 IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P32_5_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_1, {&MODULE_P32, 5}, (IfxGtm_ChXSel)14};

1287 IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P00_11_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_2, {&MODULE_P00,11}, (IfxGtm_ChXSel)11};

1288 IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P01_9_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_2, {&MODULE_P01, 9}, (IfxGtm_ChXSel)1};

1289 IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P02_13_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_2, {&MODULE_P02,13}, (IfxGtm_ChXSel)3};

1290 IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P02_9_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_2, {&MODULE_P02, 9}, (IfxGtm_ChXSel)2};

1291 IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P10_10_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_2, {&MODULE_P10,10}, (IfxGtm_ChXSel)4};

1292 IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P10_6_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_2, {&MODULE_P10, 6}, (IfxGtm_ChXSel)13};

1293 IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P11_4_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_2, {&MODULE_P11, 4}, (IfxGtm_ChXSel)5};

1294 IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P15_11_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_2, {&MODULE_P15,11}, (IfxGtm_ChXSel)6};

1295 IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P21_6_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_2, {&MODULE_P21, 6}, (IfxGtm_ChXSel)12};

1296 IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P23_6_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_2, {&MODULE_P23, 6}, (IfxGtm_ChXSel)7};

1297 IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P24_2_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_2, {&MODULE_P24, 2}, (IfxGtm_ChXSel)8};

1298 IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P25_10_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_2, {&MODULE_P25,10}, (IfxGtm_ChXSel)9};

1299 IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P30_2_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_2, {&MODULE_P30, 2}, (IfxGtm_ChXSel)10};

1300 IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P00_12_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_3, {&MODULE_P00,12}, (IfxGtm_ChXSel)11};

1301 IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P01_13_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_3, {&MODULE_P01,13}, (IfxGtm_ChXSel)1};

1302 IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P02_10_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_3, {&MODULE_P02,10}, (IfxGtm_ChXSel)2};

1303 IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P02_14_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_3, {&MODULE_P02,14}, (IfxGtm_ChXSel)3};

1304 IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P10_14_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_3, {&MODULE_P10,14}, (IfxGtm_ChXSel)4};

1305 IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P10_5_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_3, {&MODULE_P10, 5}, (IfxGtm_ChXSel)13};

1306 IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P11_5_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_3, {&MODULE_P11, 5}, (IfxGtm_ChXSel)5};

1307 IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P15_12_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_3, {&MODULE_P15,12}, (IfxGtm_ChXSel)6};

1308 IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P21_7_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_3, {&MODULE_P21, 7}, (IfxGtm_ChXSel)12};

1309 IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P23_7_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_3, {&MODULE_P23, 7}, (IfxGtm_ChXSel)7};

1310 IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P24_3_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_3, {&MODULE_P24, 3}, (IfxGtm_ChXSel)8};

1311 IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P25_11_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_3, {&MODULE_P25,11}, (IfxGtm_ChXSel)9};

1312 IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P30_3_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_3, {&MODULE_P30, 3}, (IfxGtm_ChXSel)10};

1313 IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P01_0_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_4, {&MODULE_P01, 0}, (IfxGtm_ChXSel)1};

1314 IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P01_8_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_4, {&MODULE_P01, 8}, (IfxGtm_ChXSel)2};

1315 IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P02_11_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_4, {&MODULE_P02,11}, (IfxGtm_ChXSel)3};

1316 IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P10_13_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_4, {&MODULE_P10,13}, (IfxGtm_ChXSel)4};

1317 IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P10_1_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_4, {&MODULE_P10, 1}, (IfxGtm_ChXSel)12};

1318 IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P11_7_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_4, {&MODULE_P11, 7}, (IfxGtm_ChXSel)5};

1319 IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P15_13_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_4, {&MODULE_P15,13}, (IfxGtm_ChXSel)6};

1320 IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P20_1_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_4, {&MODULE_P20, 1}, (IfxGtm_ChXSel)11};

1321 IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P24_4_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_4, {&MODULE_P24, 4}, (IfxGtm_ChXSel)7};

1322 IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P25_12_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_4, {&MODULE_P25,12}, (IfxGtm_ChXSel)8};

1323 IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P30_4_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_4, {&MODULE_P30, 4}, (IfxGtm_ChXSel)9};

1324 IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P32_6_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_4, {&MODULE_P32, 6}, (IfxGtm_ChXSel)15};

1325 IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P33_10_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_4, {&MODULE_P33,10}, (IfxGtm_ChXSel)14};

1326 IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P33_4_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_4, {&MODULE_P33, 4}, (IfxGtm_ChXSel)10};

1327 IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P01_10_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_5, {&MODULE_P01,10}, (IfxGtm_ChXSel)3};

1328 IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P01_2_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_5, {&MODULE_P01, 2}, (IfxGtm_ChXSel)1};

1329 IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P01_3_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_5, {&MODULE_P01, 3}, (IfxGtm_ChXSel)2};

1330 IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P10_11_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_5, {&MODULE_P10,11}, (IfxGtm_ChXSel)4};

1331 IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P10_2_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_5, {&MODULE_P10, 2}, (IfxGtm_ChXSel)12};

1332 IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P11_8_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_5, {&MODULE_P11, 8}, (IfxGtm_ChXSel)5};

1333 IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P15_14_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_5, {&MODULE_P15,14}, (IfxGtm_ChXSel)6};

1334 IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P20_3_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_5, {&MODULE_P20, 3}, (IfxGtm_ChXSel)11};

1335 IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P24_5_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_5, {&MODULE_P24, 5}, (IfxGtm_ChXSel)7};

1336 IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P25_13_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_5, {&MODULE_P25,13}, (IfxGtm_ChXSel)8};

1337 IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P30_5_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_5, {&MODULE_P30, 5}, (IfxGtm_ChXSel)9};

1338 IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P33_14_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_5, {&MODULE_P33,14}, (IfxGtm_ChXSel)14};

1339 IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P33_5_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_5, {&MODULE_P33, 5}, (IfxGtm_ChXSel)10};

1340 IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P01_14_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_6, {&MODULE_P01,14}, (IfxGtm_ChXSel)3};

1341 IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P01_15_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_6, {&MODULE_P01,15}, (IfxGtm_ChXSel)1};

1342 IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P01_4_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_6, {&MODULE_P01, 4}, (IfxGtm_ChXSel)2};

1343 IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P10_15_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_6, {&MODULE_P10,15}, (IfxGtm_ChXSel)4};

1344 IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P10_3_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_6, {&MODULE_P10, 3}, (IfxGtm_ChXSel)10};

1345 IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P11_13_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_6, {&MODULE_P11,13}, (IfxGtm_ChXSel)5};

1346 IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P15_15_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_6, {&MODULE_P15,15}, (IfxGtm_ChXSel)6};

1347 IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P24_6_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_6, {&MODULE_P24, 6}, (IfxGtm_ChXSel)7};

1348 IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P25_14_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_6, {&MODULE_P25,14}, (IfxGtm_ChXSel)8};

1349 IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P30_6_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_6, {&MODULE_P30, 6}, (IfxGtm_ChXSel)9};

1350 IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P33_15_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_6, {&MODULE_P33,15}, (IfxGtm_ChXSel)12};

1351 IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P00_14_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_7, {&MODULE_P00,14}, (IfxGtm_ChXSel)1};

1352 IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P01_11_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_7, {&MODULE_P01,11}, (IfxGtm_ChXSel)2};

1353 IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P10_4_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_7, {&MODULE_P10, 4}, (IfxGtm_ChXSel)3};

1354 IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P11_14_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_7, {&MODULE_P11,14}, (IfxGtm_ChXSel)4};

1355 IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P11_15_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_7, {&MODULE_P11,15}, (IfxGtm_ChXSel)5};

1356 IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P13_9_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_7, {&MODULE_P13, 9}, (IfxGtm_ChXSel)6};

1357 IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P14_7_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_7, {&MODULE_P14, 7}, (IfxGtm_ChXSel)10};

1358 IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P24_7_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_7, {&MODULE_P24, 7}, (IfxGtm_ChXSel)7};

1359 IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P25_15_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_7, {&MODULE_P25,15}, (IfxGtm_ChXSel)8};

1360 IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P30_7_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_7, {&MODULE_P30, 7}, (IfxGtm_ChXSel)9};

1361 IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P34_5_IN = {IfxGtm_Tim_4, IfxGtm_Tim_Ch_7, {&MODULE_P34, 5}, (IfxGtm_ChXSel)12};

1362 IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P00_13_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_0, {&MODULE_P00,13}, (IfxGtm_ChXSel)1};

1363 IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P01_12_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_0, {&MODULE_P01,12}, (IfxGtm_ChXSel)2};

1364 IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P01_8_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_0, {&MODULE_P01, 8}, (IfxGtm_ChXSel)10};

1365 IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P02_12_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_0, {&MODULE_P02,12}, (IfxGtm_ChXSel)3};

1366 IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P13_11_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_0, {&MODULE_P13,11}, (IfxGtm_ChXSel)9};

1367 IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P22_8_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_0, {&MODULE_P22, 8}, (IfxGtm_ChXSel)4};

1368 IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P24_8_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_0, {&MODULE_P24, 8}, (IfxGtm_ChXSel)5};

1369 IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P30_8_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_0, {&MODULE_P30, 8}, (IfxGtm_ChXSel)6};

1370 IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P31_8_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_0, {&MODULE_P31, 8}, (IfxGtm_ChXSel)7};

1371 IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P33_14_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_0, {&MODULE_P33,14}, (IfxGtm_ChXSel)8};

1372 IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P00_15_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_1, {&MODULE_P00,15}, (IfxGtm_ChXSel)1};

1373 IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P01_1_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_1, {&MODULE_P01, 1}, (IfxGtm_ChXSel)2};

1374 IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P01_9_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_1, {&MODULE_P01, 9}, (IfxGtm_ChXSel)11};

1375 IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P02_15_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_1, {&MODULE_P02,15}, (IfxGtm_ChXSel)3};

1376 IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P13_10_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_1, {&MODULE_P13,10}, (IfxGtm_ChXSel)5};

1377 IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P14_11_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_1, {&MODULE_P14,11}, (IfxGtm_ChXSel)4};

1378 IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P22_9_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_1, {&MODULE_P22, 9}, (IfxGtm_ChXSel)10};

1379 IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P24_9_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_1, {&MODULE_P24, 9}, (IfxGtm_ChXSel)6};

1380 IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P30_9_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_1, {&MODULE_P30, 9}, (IfxGtm_ChXSel)7};

1381 IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P31_9_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_1, {&MODULE_P31, 9}, (IfxGtm_ChXSel)8};

1382 IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P33_15_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_1, {&MODULE_P33,15}, (IfxGtm_ChXSel)9};

1383 IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P01_10_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_2, {&MODULE_P01,10}, (IfxGtm_ChXSel)9};

1384 IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P01_9_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_2, {&MODULE_P01, 9}, (IfxGtm_ChXSel)1};

1385 IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P02_13_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_2, {&MODULE_P02,13}, (IfxGtm_ChXSel)2};

1386 IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P13_14_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_2, {&MODULE_P13,14}, (IfxGtm_ChXSel)4};

1387 IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P14_14_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_2, {&MODULE_P14,14}, (IfxGtm_ChXSel)3};

1388 IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P22_10_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_2, {&MODULE_P22,10}, (IfxGtm_ChXSel)8};

1389 IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P24_10_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_2, {&MODULE_P24,10}, (IfxGtm_ChXSel)5};

1390 IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P30_10_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_2, {&MODULE_P30,10}, (IfxGtm_ChXSel)6};

1391 IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P31_10_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_2, {&MODULE_P31,10}, (IfxGtm_ChXSel)7};

1392 IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P01_11_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_3, {&MODULE_P01,11}, (IfxGtm_ChXSel)11};

1393 IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P01_13_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_3, {&MODULE_P01,13}, (IfxGtm_ChXSel)1};

1394 IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P01_5_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_3, {&MODULE_P01, 5}, (IfxGtm_ChXSel)2};

1395 IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P02_14_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_3, {&MODULE_P02,14}, (IfxGtm_ChXSel)3};

1396 IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P13_4_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_3, {&MODULE_P13, 4}, (IfxGtm_ChXSel)4};

1397 IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P14_13_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_3, {&MODULE_P14,13}, (IfxGtm_ChXSel)5};

1398 IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P22_11_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_3, {&MODULE_P22,11}, (IfxGtm_ChXSel)10};

1399 IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P24_11_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_3, {&MODULE_P24,11}, (IfxGtm_ChXSel)6};

1400 IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P30_11_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_3, {&MODULE_P30,11}, (IfxGtm_ChXSel)7};

1401 IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P31_11_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_3, {&MODULE_P31,11}, (IfxGtm_ChXSel)8};

1402 IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P34_1_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_3, {&MODULE_P34, 1}, (IfxGtm_ChXSel)9};

1403 IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P00_0_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_4, {&MODULE_P00, 0}, (IfxGtm_ChXSel)10};

1404 IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P01_0_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_4, {&MODULE_P01, 0}, (IfxGtm_ChXSel)1};

1405 IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P01_8_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_4, {&MODULE_P01, 8}, (IfxGtm_ChXSel)2};

1406 IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P13_5_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_4, {&MODULE_P13, 5}, (IfxGtm_ChXSel)4};

1407 IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P14_12_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_4, {&MODULE_P14,12}, (IfxGtm_ChXSel)5};

1408 IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P21_2_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_4, {&MODULE_P21, 2}, (IfxGtm_ChXSel)11};

1409 IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P24_12_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_4, {&MODULE_P24,12}, (IfxGtm_ChXSel)6};

1410 IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P30_12_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_4, {&MODULE_P30,12}, (IfxGtm_ChXSel)7};

1411 IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P31_12_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_4, {&MODULE_P31,12}, (IfxGtm_ChXSel)8};

1412 IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P34_2_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_4, {&MODULE_P34, 2}, (IfxGtm_ChXSel)9};

1413 IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P00_1_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_5, {&MODULE_P00, 1}, (IfxGtm_ChXSel)11};

1414 IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P01_10_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_5, {&MODULE_P01,10}, (IfxGtm_ChXSel)2};

1415 IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P01_2_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_5, {&MODULE_P01, 2}, (IfxGtm_ChXSel)1};

1416 IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P01_6_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_5, {&MODULE_P01, 6}, (IfxGtm_ChXSel)3};

1417 IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P13_13_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_5, {&MODULE_P13,13}, (IfxGtm_ChXSel)5};

1418 IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P13_6_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_5, {&MODULE_P13, 6}, (IfxGtm_ChXSel)4};

1419 IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P21_3_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_5, {&MODULE_P21, 3}, (IfxGtm_ChXSel)12};

1420 IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P24_13_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_5, {&MODULE_P24,13}, (IfxGtm_ChXSel)6};

1421 IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P30_13_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_5, {&MODULE_P30,13}, (IfxGtm_ChXSel)7};

1422 IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P31_13_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_5, {&MODULE_P31,13}, (IfxGtm_ChXSel)8};

1423 IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P32_5_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_5, {&MODULE_P32, 5}, (IfxGtm_ChXSel)9};

1424 IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P34_3_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_5, {&MODULE_P34, 3}, (IfxGtm_ChXSel)10};

1425 IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P00_2_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_6, {&MODULE_P00, 2}, (IfxGtm_ChXSel)11};

1426 IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P01_14_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_6, {&MODULE_P01,14}, (IfxGtm_ChXSel)3};

1427 IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P01_15_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_6, {&MODULE_P01,15}, (IfxGtm_ChXSel)1};

1428 IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P01_6_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_6, {&MODULE_P01, 6}, (IfxGtm_ChXSel)2};

1429 IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P13_7_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_6, {&MODULE_P13, 7}, (IfxGtm_ChXSel)4};

1430 IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P14_15_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_6, {&MODULE_P14,15}, (IfxGtm_ChXSel)5};

1431 IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P21_4_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_6, {&MODULE_P21, 4}, (IfxGtm_ChXSel)12};

1432 IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P24_14_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_6, {&MODULE_P24,14}, (IfxGtm_ChXSel)6};

1433 IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P30_14_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_6, {&MODULE_P30,14}, (IfxGtm_ChXSel)7};

1434 IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P31_14_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_6, {&MODULE_P31,14}, (IfxGtm_ChXSel)8};

1435 IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P32_6_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_6, {&MODULE_P32, 6}, (IfxGtm_ChXSel)9};

1436 IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P34_4_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_6, {&MODULE_P34, 4}, (IfxGtm_ChXSel)10};

1437 IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P00_14_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_7, {&MODULE_P00,14}, (IfxGtm_ChXSel)1};

1438 IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P00_3_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_7, {&MODULE_P00, 3}, (IfxGtm_ChXSel)10};

1439 IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P01_11_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_7, {&MODULE_P01,11}, (IfxGtm_ChXSel)3};

1440 IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P01_7_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_7, {&MODULE_P01, 7}, (IfxGtm_ChXSel)2};

1441 IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P13_15_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_7, {&MODULE_P13,15}, (IfxGtm_ChXSel)4};

1442 IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P21_5_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_7, {&MODULE_P21, 5}, (IfxGtm_ChXSel)11};

1443 IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P24_15_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_7, {&MODULE_P24,15}, (IfxGtm_ChXSel)5};

1444 IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P30_15_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_7, {&MODULE_P30,15}, (IfxGtm_ChXSel)6};

1445 IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P31_15_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_7, {&MODULE_P31,15}, (IfxGtm_ChXSel)7};

1446 IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P32_7_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_7, {&MODULE_P32, 7}, (IfxGtm_ChXSel)8};

1447 IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P34_5_IN = {IfxGtm_Tim_5, IfxGtm_Tim_Ch_7, {&MODULE_P34, 5}, (IfxGtm_ChXSel)9};

1448 IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P01_12_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_0, {&MODULE_P01,12}, (IfxGtm_ChXSel)3};

1449 IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P10_9_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_0, {&MODULE_P10, 9}, (IfxGtm_ChXSel)5};

1450 IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P13_4_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_0, {&MODULE_P13, 4}, (IfxGtm_ChXSel)4};

1451 IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P20_6_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_0, {&MODULE_P20, 6}, (IfxGtm_ChXSel)1};

1452 IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P23_7_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_0, {&MODULE_P23, 7}, (IfxGtm_ChXSel)2};

1453 IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P24_0_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_0, {&MODULE_P24, 0}, (IfxGtm_ChXSel)6};

1454 IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P25_0_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_0, {&MODULE_P25, 0}, (IfxGtm_ChXSel)7};

1455 IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P30_8_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_0, {&MODULE_P30, 8}, (IfxGtm_ChXSel)8};

1456 IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P31_8_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_0, {&MODULE_P31, 8}, (IfxGtm_ChXSel)9};

1457 IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P01_13_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_1, {&MODULE_P01,13}, (IfxGtm_ChXSel)3};

1458 IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P10_10_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_1, {&MODULE_P10,10}, (IfxGtm_ChXSel)5};

1459 IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P13_5_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_1, {&MODULE_P13, 5}, (IfxGtm_ChXSel)4};

1460 IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P20_7_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_1, {&MODULE_P20, 7}, (IfxGtm_ChXSel)1};

1461 IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P23_6_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_1, {&MODULE_P23, 6}, (IfxGtm_ChXSel)2};

1462 IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P24_1_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_1, {&MODULE_P24, 1}, (IfxGtm_ChXSel)6};

1463 IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P25_1_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_1, {&MODULE_P25, 1}, (IfxGtm_ChXSel)7};

1464 IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P30_9_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_1, {&MODULE_P30, 9}, (IfxGtm_ChXSel)8};

1465 IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P31_9_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_1, {&MODULE_P31, 9}, (IfxGtm_ChXSel)9};

1466 IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P01_14_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_2, {&MODULE_P01,14}, (IfxGtm_ChXSel)3};

1467 IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P10_11_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_2, {&MODULE_P10,11}, (IfxGtm_ChXSel)5};

1468 IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P13_6_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_2, {&MODULE_P13, 6}, (IfxGtm_ChXSel)4};

1469 IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P20_8_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_2, {&MODULE_P20, 8}, (IfxGtm_ChXSel)1};

1470 IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P23_5_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_2, {&MODULE_P23, 5}, (IfxGtm_ChXSel)2};

1471 IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P24_2_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_2, {&MODULE_P24, 2}, (IfxGtm_ChXSel)6};

1472 IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P25_2_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_2, {&MODULE_P25, 2}, (IfxGtm_ChXSel)7};

1473 IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P30_10_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_2, {&MODULE_P30,10}, (IfxGtm_ChXSel)8};

1474 IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P31_10_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_2, {&MODULE_P31,10}, (IfxGtm_ChXSel)9};

1475 IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P01_15_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_3, {&MODULE_P01,15}, (IfxGtm_ChXSel)3};

1476 IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P10_13_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_3, {&MODULE_P10,13}, (IfxGtm_ChXSel)5};

1477 IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P13_7_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_3, {&MODULE_P13, 7}, (IfxGtm_ChXSel)4};

1478 IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P20_9_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_3, {&MODULE_P20, 9}, (IfxGtm_ChXSel)1};

1479 IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P23_4_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_3, {&MODULE_P23, 4}, (IfxGtm_ChXSel)2};

1480 IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P24_3_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_3, {&MODULE_P24, 3}, (IfxGtm_ChXSel)6};

1481 IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P25_3_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_3, {&MODULE_P25, 3}, (IfxGtm_ChXSel)7};

1482 IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P30_11_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_3, {&MODULE_P30,11}, (IfxGtm_ChXSel)8};

1483 IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P31_11_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_3, {&MODULE_P31,11}, (IfxGtm_ChXSel)9};

1484 IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P00_4_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_4, {&MODULE_P00, 4}, (IfxGtm_ChXSel)1};

1485 IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P13_9_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_4, {&MODULE_P13, 9}, (IfxGtm_ChXSel)4};

1486 IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P14_12_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_4, {&MODULE_P14,12}, (IfxGtm_ChXSel)3};

1487 IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P23_3_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_4, {&MODULE_P23, 3}, (IfxGtm_ChXSel)2};

1488 IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P24_4_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_4, {&MODULE_P24, 4}, (IfxGtm_ChXSel)5};

1489 IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P25_4_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_4, {&MODULE_P25, 4}, (IfxGtm_ChXSel)6};

1490 IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P30_12_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_4, {&MODULE_P30,12}, (IfxGtm_ChXSel)7};

1491 IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P31_12_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_4, {&MODULE_P31,12}, (IfxGtm_ChXSel)8};

1492 IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P00_13_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_5, {&MODULE_P00,13}, (IfxGtm_ChXSel)2};

1493 IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P13_10_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_5, {&MODULE_P13,10}, (IfxGtm_ChXSel)4};

1494 IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P14_13_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_5, {&MODULE_P14,13}, (IfxGtm_ChXSel)3};

1495 IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P23_2_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_5, {&MODULE_P23, 2}, (IfxGtm_ChXSel)1};

1496 IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P24_5_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_5, {&MODULE_P24, 5}, (IfxGtm_ChXSel)5};

1497 IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P25_5_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_5, {&MODULE_P25, 5}, (IfxGtm_ChXSel)6};

1498 IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P30_13_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_5, {&MODULE_P30,13}, (IfxGtm_ChXSel)7};

1499 IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P31_13_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_5, {&MODULE_P31,13}, (IfxGtm_ChXSel)8};

1500 IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P00_14_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_6, {&MODULE_P00,14}, (IfxGtm_ChXSel)2};

1501 IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P13_11_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_6, {&MODULE_P13,11}, (IfxGtm_ChXSel)4};

1502 IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P14_14_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_6, {&MODULE_P14,14}, (IfxGtm_ChXSel)3};

1503 IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P23_1_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_6, {&MODULE_P23, 1}, (IfxGtm_ChXSel)1};

1504 IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P24_6_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_6, {&MODULE_P24, 6}, (IfxGtm_ChXSel)5};

1505 IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P25_6_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_6, {&MODULE_P25, 6}, (IfxGtm_ChXSel)6};

1506 IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P26_0_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_6, {&MODULE_P26, 0}, (IfxGtm_ChXSel)9};

1507 IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P30_14_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_6, {&MODULE_P30,14}, (IfxGtm_ChXSel)7};

1508 IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P31_14_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_6, {&MODULE_P31,14}, (IfxGtm_ChXSel)8};

1509 IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P00_15_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_7, {&MODULE_P00,15}, (IfxGtm_ChXSel)2};

1510 IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P13_12_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_7, {&MODULE_P13,12}, (IfxGtm_ChXSel)4};

1511 IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P14_15_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_7, {&MODULE_P14,15}, (IfxGtm_ChXSel)3};

1512 IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P23_0_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_7, {&MODULE_P23, 0}, (IfxGtm_ChXSel)1};

1513 IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P24_7_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_7, {&MODULE_P24, 7}, (IfxGtm_ChXSel)5};

1514 IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P25_7_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_7, {&MODULE_P25, 7}, (IfxGtm_ChXSel)6};

1515 IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P30_15_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_7, {&MODULE_P30,15}, (IfxGtm_ChXSel)7};

1516 IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P31_15_IN = {IfxGtm_Tim_6, IfxGtm_Tim_Ch_7, {&MODULE_P31,15}, (IfxGtm_ChXSel)8};

1517 IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT106_P10_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1};

1518 IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT17_P00_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1};

1519 IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT25_P33_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 25, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt1};

1520 IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT34_P33_12_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 34, {&MODULE_P33,12}, IfxPort_OutputIdx_alt1};

1521 IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT51_P21_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_f, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1};

1522 IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT61_P20_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_f, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1};

1523 IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT72_P15_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1};

1524 IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT7_P02_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1};

1525 IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT91_P13_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1};

1526 IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT9_P00_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1};

1527 IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT0_P02_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1};

1528 IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT109_P10_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1};

1529 IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT151_P02_12_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_g, 151, {&MODULE_P02,12}, IfxPort_OutputIdx_alt1};

1530 IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT18_P00_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 18, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt1};

1531 IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT26_P33_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1};

1532 IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT32_P33_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1};

1533 IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT53_P21_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1};

1534 IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT76_P15_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1};

1535 IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT77_P15_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1};

1536 IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT85_P14_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 85, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt1};

1537 IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT87_P14_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1};

1538 IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT12_P00_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1};

1539 IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT2_P02_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1};

1540 IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT41_P23_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1};

1541 IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT46_P23_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 46, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt1};

1542 IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT96_P11_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1};

1543 IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT13_P00_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1};

1544 IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT3_P02_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1};

1545 IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT43_P23_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 43, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt1};

1546 IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT49_P22_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 49, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt1};

1547 IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT97_P11_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1};

1548 IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT14_P00_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1};

1549 IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT44_P23_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 44, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt1};

1550 IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT4_P02_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1};

1551 IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT50_P22_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1};

1552 IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT98_P11_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1};

1553 IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT15_P00_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1};

1554 IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT5_P02_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1};

1555 IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT99_P11_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1};

1556 IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT100_P11_11_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1};

1557 IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT16_P00_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1};

1558 IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT6_P02_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1};

1559 IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT101_P11_12_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1};

1560 IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT17_P00_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1};

1561 IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT42_P23_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_b, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1};

1562 IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT7_P02_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1};

1563 IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT107_P10_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1};

1564 IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT10_P00_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1};

1565 IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT14_P00_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1};

1566 IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT22_P33_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 22, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt1};

1567 IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT30_P33_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1};

1568 IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT35_P33_13_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 35, {&MODULE_P33,13}, IfxPort_OutputIdx_alt1};

1569 IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT39_P32_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_g, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1};

1570 IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT4_P02_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1};

1571 IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT52_P21_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_f, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1};

1572 IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT57_P21_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1};

1573 IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT73_P15_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1};

1574 IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT90_P14_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1};

1575 IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT92_P13_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1};

1576 IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT103_P10_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 103, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt1};

1577 IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT116_P02_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_g, 116, {&MODULE_P02, 9}, IfxPort_OutputIdx_alt1};

1578 IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT19_P00_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 19, {&MODULE_P00,10}, IfxPort_OutputIdx_alt1};

1579 IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT1_P02_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1};

1580 IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT27_P33_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1};

1581 IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT31_P33_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1};

1582 IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT54_P21_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1};

1583 IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT78_P15_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1};

1584 IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT86_P14_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1};

1585 IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT108_P10_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1};

1586 IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT11_P00_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1};

1587 IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT143_P33_14_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_g, 143, {&MODULE_P33,14}, IfxPort_OutputIdx_alt1};

1588 IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT15_P00_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1};

1589 IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT23_P33_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1};

1590 IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT40_P32_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_g, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1};

1591 IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT58_P21_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 58, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt1};

1592 IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT5_P02_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1};

1593 IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT74_P15_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1};

1594 IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT93_P13_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1};

1595 IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT104_P10_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 104, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt1};

1596 IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT107_P10_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1};

1597 IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT117_P02_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_g, 117, {&MODULE_P02,10}, IfxPort_OutputIdx_alt1};

1598 IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT20_P00_11_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 20, {&MODULE_P00,11}, IfxPort_OutputIdx_alt1};

1599 IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT28_P33_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1};

1600 IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT2_P02_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1};

1601 IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT33_P33_11_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 33, {&MODULE_P33,11}, IfxPort_OutputIdx_alt1};

1602 IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT55_P21_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1};

1603 IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT79_P15_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1};

1604 IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT88_P14_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 88, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt1};

1605 IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT109_P10_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1};

1606 IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT12_P00_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1};

1607 IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT144_P33_15_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_g, 144, {&MODULE_P33,15}, IfxPort_OutputIdx_alt1};

1608 IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT16_P00_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1};

1609 IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT24_P33_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1};

1610 IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT42_P23_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_g, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1};

1611 IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT59_P20_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1};

1612 IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT60_P20_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 60, {&MODULE_P20, 1}, IfxPort_OutputIdx_alt1};

1613 IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT6_P02_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1};

1614 IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT75_P15_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 75, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt1};

1615 IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT94_P13_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1};

1616 IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT105_P10_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 105, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt1};

1617 IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT108_P10_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1};

1618 IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT118_P02_11_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_g, 118, {&MODULE_P02,11}, IfxPort_OutputIdx_alt1};

1619 IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT21_P00_12_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 21, {&MODULE_P00,12}, IfxPort_OutputIdx_alt1};

1620 IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT29_P33_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1};

1621 IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT38_P32_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 38, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt1};

1622 IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT3_P02_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1};

1623 IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT56_P21_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1};

1624 IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT71_P15_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1};

1625 IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT80_P14_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 80, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt1};

1626 IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT89_P14_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 89, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt1};

1627 IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT10_P00_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_g, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1};

1628 IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT143_P33_14_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_e, 143, {&MODULE_P33,14}, IfxPort_OutputIdx_alt1};

1629 IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT147_P34_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_e, 147, {&MODULE_P34, 2}, IfxPort_OutputIdx_alt1};

1630 IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT1_P02_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_g, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1};

1631 IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT29_P33_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_e, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1};

1632 IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT36_P32_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_e, 36, {&MODULE_P32, 0}, IfxPort_OutputIdx_alt1};

1633 IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT54_P21_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_g, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1};

1634 IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT56_P21_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_e, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1};

1635 IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT65_P20_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1};

1636 IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT73_P15_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_g, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1};

1637 IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT89_P14_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_e, 89, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt1};

1638 IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT8_P02_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_g, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1};

1639 IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT95_P11_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1};

1640 IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT96_P11_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_g, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1};

1641 IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT0_P02_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_g, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1};

1642 IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT102_P10_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 102, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt1};

1643 IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT124_P11_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 124, {&MODULE_P11, 8}, IfxPort_OutputIdx_alt1};

1644 IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT22_P33_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 22, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt1};

1645 IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT30_P33_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1};

1646 IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT37_P32_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_e, 37, {&MODULE_P32, 1}, IfxPort_OutputIdx_alt1};

1647 IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT39_P32_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1};

1648 IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT53_P21_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_g, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1};

1649 IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT57_P21_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1};

1650 IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT64_P20_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1};

1651 IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT72_P15_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_g, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1};

1652 IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT81_P14_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 81, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt1};

1653 IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT90_P14_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1};

1654 IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT94_P13_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_g, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1};

1655 IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT9_P00_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_g, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1};

1656 IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT121_P11_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_g, 121, {&MODULE_P11, 4}, IfxPort_OutputIdx_alt1};

1657 IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT12_P00_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_g, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1};

1658 IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT144_P33_15_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_e, 144, {&MODULE_P33,15}, IfxPort_OutputIdx_alt1};

1659 IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT148_P34_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_e, 148, {&MODULE_P34, 3}, IfxPort_OutputIdx_alt1};

1660 IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT26_P33_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_e, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1};

1661 IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT28_P33_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_g, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1};

1662 IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT32_P33_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_e, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1};

1663 IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT37_P32_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_g, 37, {&MODULE_P32, 1}, IfxPort_OutputIdx_alt1};

1664 IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT3_P02_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_g, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1};

1665 IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT53_P21_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_e, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1};

1666 IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT56_P21_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_g, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1};

1667 IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT67_P20_11_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 67, {&MODULE_P20,11}, IfxPort_OutputIdx_alt1};

1668 IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT76_P15_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_g, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1};

1669 IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT77_P15_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1};

1670 IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT87_P14_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_e, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1};

1671 IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT97_P11_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1};

1672 IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT110_P10_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 110, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt1};

1673 IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT11_P00_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_g, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1};

1674 IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT128_P12_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_g, 128, {&MODULE_P12, 0}, IfxPort_OutputIdx_alt1};

1675 IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT23_P33_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1};

1676 IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT27_P33_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_g, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1};

1677 IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT2_P02_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_g, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1};

1678 IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT40_P32_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1};

1679 IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT55_P21_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_g, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1};

1680 IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT58_P21_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 58, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt1};

1681 IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT66_P20_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 66, {&MODULE_P20,10}, IfxPort_OutputIdx_alt1};

1682 IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT74_P15_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_g, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1};

1683 IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT82_P14_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 82, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt1};

1684 IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT91_P13_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1};

1685 IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT96_P11_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1};

1686 IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT149_P34_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_e, 149, {&MODULE_P34, 4}, IfxPort_OutputIdx_alt1};

1687 IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT14_P00_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_g, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1};

1688 IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT27_P33_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_e, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1};

1689 IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT30_P33_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_g, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1};

1690 IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT31_P33_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_e, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1};

1691 IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT38_P32_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_e, 38, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt1};

1692 IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT40_P32_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_e, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1};

1693 IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT49_P22_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_g, 49, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt1};

1694 IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT54_P21_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_e, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1};

1695 IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT5_P02_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_g, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1};

1696 IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT69_P20_13_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 69, {&MODULE_P20,13}, IfxPort_OutputIdx_alt1};

1697 IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT78_P15_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1};

1698 IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT82_P14_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_e, 82, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt1};

1699 IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT86_P14_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_e, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1};

1700 IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT91_P13_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_g, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1};

1701 IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT97_P11_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_g, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1};

1702 IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT99_P11_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1};

1703 IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT106_P10_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1};

1704 IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT129_P12_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_g, 129, {&MODULE_P12, 1}, IfxPort_OutputIdx_alt1};

1705 IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT13_P00_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_g, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1};

1706 IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT24_P33_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1};

1707 IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT29_P33_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_g, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1};

1708 IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT42_P23_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1};

1709 IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT48_P22_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_g, 48, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt1};

1710 IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT4_P02_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_g, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1};

1711 IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT59_P20_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1};

1712 IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT68_P20_12_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 68, {&MODULE_P20,12}, IfxPort_OutputIdx_alt1};

1713 IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT80_P14_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_e, 80, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt1};

1714 IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT83_P14_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 83, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt1};

1715 IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT92_P13_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1};

1716 IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT98_P11_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1};

1717 IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT100_P11_11_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1};

1718 IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT123_P11_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 123, {&MODULE_P11, 7}, IfxPort_OutputIdx_alt1};

1719 IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT130_P22_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 130, {&MODULE_P22, 4}, IfxPort_OutputIdx_alt1};

1720 IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT150_P34_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_e, 150, {&MODULE_P34, 5}, IfxPort_OutputIdx_alt1};

1721 IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT16_P00_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1};

1722 IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT28_P33_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_e, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1};

1723 IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT32_P33_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1};

1724 IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT33_P33_11_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_e, 33, {&MODULE_P33,11}, IfxPort_OutputIdx_alt1};

1725 IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT39_P32_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_e, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1};

1726 IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT42_P23_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_e, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1};

1727 IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT55_P21_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_e, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1};

1728 IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT71_P15_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1};

1729 IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT79_P15_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1};

1730 IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT7_P02_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1};

1731 IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT84_P14_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_e, 84, {&MODULE_P14, 4}, IfxPort_OutputIdx_alt1};

1732 IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT88_P14_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_e, 88, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt1};

1733 IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT93_P13_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1};

1734 IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT101_P11_12_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1};

1735 IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT119_P11_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 119, {&MODULE_P11, 0}, IfxPort_OutputIdx_alt1};

1736 IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT15_P00_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1};

1737 IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT25_P33_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 25, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt1};

1738 IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT31_P33_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1};

1739 IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT45_P23_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 45, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt1};

1740 IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT50_P22_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1};

1741 IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT6_P02_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1};

1742 IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT70_P20_14_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 70, {&MODULE_P20,14}, IfxPort_OutputIdx_alt1};

1743 IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT81_P14_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_e, 81, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt1};

1744 IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT84_P14_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 84, {&MODULE_P14, 4}, IfxPort_OutputIdx_alt1};

1745 IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT92_P13_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1};

1746 IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT93_P13_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1};

1747 IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT0_P02_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1};

1748 IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT48_P22_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 48, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt1};

1749 IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT51_P21_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1};

1750 IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT8_P02_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1};

1751 IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT94_P13_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1};

1752 IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT95_P11_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1};

1753 IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT9_P00_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1};

1754 IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT10_P00_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1};

1755 IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT11_P00_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1};

1756 IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT1_P02_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1};

1757 IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT47_P22_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 47, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt1};

1758 IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT52_P21_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1};

1759 IfxGtm_Tom_ToutMap IfxGtm_TOM1_0N_TOUT17_P00_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_f, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1};

1760 IfxGtm_Tom_ToutMap IfxGtm_TOM1_0N_TOUT25_P33_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_f, 25, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt1};

1761 IfxGtm_Tom_ToutMap IfxGtm_TOM1_0N_TOUT34_P33_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_f, 34, {&MODULE_P33,12}, IfxPort_OutputIdx_alt1};

1762 IfxGtm_Tom_ToutMap IfxGtm_TOM1_0N_TOUT75_P15_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_f, 75, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt1};

1763 IfxGtm_Tom_ToutMap IfxGtm_TOM1_0N_TOUT7_P02_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_f, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1};

1764 IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT0_P02_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_f, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1};

1765 IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT18_P00_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 18, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt1};

1766 IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT26_P33_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1};

1767 IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT32_P33_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1};

1768 IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT68_P20_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 68, {&MODULE_P20,12}, IfxPort_OutputIdx_alt1};

1769 IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT76_P15_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1};

1770 IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT77_P15_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1};

1771 IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT85_P14_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 85, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt1};

1772 IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT8_P02_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1};

1773 IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT9_P00_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1};

1774 IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT143_P33_14_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 143, {&MODULE_P33,14}, IfxPort_OutputIdx_alt1};

1775 IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT266_P10_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 266, {&MODULE_P10,10}, IfxPort_OutputIdx_alt1};

1776 IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT2_P02_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1};

1777 IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT62_P20_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 62, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt1};

1778 IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT144_P33_15_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 144, {&MODULE_P33,15}, IfxPort_OutputIdx_alt1};

1779 IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT267_P10_14_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 267, {&MODULE_P10,14}, IfxPort_OutputIdx_alt1};

1780 IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT3_P02_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1};

1781 IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT60_P20_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 60, {&MODULE_P20, 1}, IfxPort_OutputIdx_alt1};

1782 IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT63_P20_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 63, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt1};

1783 IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT268_P10_13_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 268, {&MODULE_P10,13}, IfxPort_OutputIdx_alt1};

1784 IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT34_P33_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 34, {&MODULE_P33,12}, IfxPort_OutputIdx_alt1};

1785 IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT4_P02_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_b, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1};

1786 IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT61_P20_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1};

1787 IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT146_P34_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 146, {&MODULE_P34, 1}, IfxPort_OutputIdx_alt1};

1788 IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT269_P10_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 269, {&MODULE_P10,11}, IfxPort_OutputIdx_alt1};

1789 IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT35_P33_13_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 35, {&MODULE_P33,13}, IfxPort_OutputIdx_alt1};

1790 IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT5_P02_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1};

1791 IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT65_P20_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1};

1792 IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT147_P34_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 147, {&MODULE_P34, 2}, IfxPort_OutputIdx_alt1};

1793 IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT270_P10_15_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 270, {&MODULE_P10,15}, IfxPort_OutputIdx_alt1};

1794 IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT36_P32_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 36, {&MODULE_P32, 0}, IfxPort_OutputIdx_alt1};

1795 IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT66_P20_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 66, {&MODULE_P20,10}, IfxPort_OutputIdx_alt1};

1796 IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT6_P02_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1};

1797 IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT148_P34_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 148, {&MODULE_P34, 3}, IfxPort_OutputIdx_alt1};

1798 IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT150_P34_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 150, {&MODULE_P34, 5}, IfxPort_OutputIdx_alt1};

1799 IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT37_P32_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 37, {&MODULE_P32, 1}, IfxPort_OutputIdx_alt1};

1800 IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT67_P20_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 67, {&MODULE_P20,11}, IfxPort_OutputIdx_alt1};

1801 IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT7_P02_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_b, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1};

1802 IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT14_P00_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_f, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1};

1803 IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT22_P33_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_f, 22, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt1};

1804 IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT245_P15_13_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_g, 245, {&MODULE_P15,13}, IfxPort_OutputIdx_alt1};

1805 IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT30_P33_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_f, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1};

1806 IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT35_P33_13_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_f, 35, {&MODULE_P33,13}, IfxPort_OutputIdx_alt1};

1807 IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT39_P32_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_h, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1};

1808 IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT4_P02_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_f, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1};

1809 IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT72_P15_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_f, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1};

1810 IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT10_P00_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1};

1811 IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT116_P02_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 116, {&MODULE_P02, 9}, IfxPort_OutputIdx_alt1};

1812 IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT11_P00_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1};

1813 IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT19_P00_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 19, {&MODULE_P00,10}, IfxPort_OutputIdx_alt1};

1814 IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT1_P02_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_f, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1};

1815 IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT242_P15_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 242, {&MODULE_P15,10}, IfxPort_OutputIdx_alt1};

1816 IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT27_P33_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1};

1817 IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT31_P33_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1};

1818 IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT69_P20_13_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 69, {&MODULE_P20,13}, IfxPort_OutputIdx_alt1};

1819 IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT78_P15_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1};

1820 IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT86_P14_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1};

1821 IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT143_P33_14_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_h, 143, {&MODULE_P33,14}, IfxPort_OutputIdx_alt1};

1822 IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT15_P00_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_f, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1};

1823 IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT23_P33_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_f, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1};

1824 IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT246_P15_14_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_g, 246, {&MODULE_P15,14}, IfxPort_OutputIdx_alt1};

1825 IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT40_P32_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_h, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1};

1826 IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT41_P23_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_f, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1};

1827 IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT5_P02_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_f, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1};

1828 IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT73_P15_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_f, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1};

1829 IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT117_P02_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 117, {&MODULE_P02,10}, IfxPort_OutputIdx_alt1};

1830 IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT12_P00_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1};

1831 IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT20_P00_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 20, {&MODULE_P00,11}, IfxPort_OutputIdx_alt1};

1832 IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT243_P15_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 243, {&MODULE_P15,11}, IfxPort_OutputIdx_alt1};

1833 IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT28_P33_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1};

1834 IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT2_P02_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_f, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1};

1835 IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT33_P33_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 33, {&MODULE_P33,11}, IfxPort_OutputIdx_alt1};

1836 IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT70_P20_14_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 70, {&MODULE_P20,14}, IfxPort_OutputIdx_alt1};

1837 IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT79_P15_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1};

1838 IfxGtm_Tom_ToutMap IfxGtm_TOM1_3N_TOUT144_P33_15_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_h, 144, {&MODULE_P33,15}, IfxPort_OutputIdx_alt1};

1839 IfxGtm_Tom_ToutMap IfxGtm_TOM1_3N_TOUT16_P00_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_f, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1};

1840 IfxGtm_Tom_ToutMap IfxGtm_TOM1_3N_TOUT247_P15_15_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_g, 247, {&MODULE_P15,15}, IfxPort_OutputIdx_alt1};

1841 IfxGtm_Tom_ToutMap IfxGtm_TOM1_3N_TOUT24_P33_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_f, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1};

1842 IfxGtm_Tom_ToutMap IfxGtm_TOM1_3N_TOUT43_P23_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_g, 43, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt1};

1843 IfxGtm_Tom_ToutMap IfxGtm_TOM1_3N_TOUT6_P02_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_f, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1};

1844 IfxGtm_Tom_ToutMap IfxGtm_TOM1_3N_TOUT74_P15_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_f, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1};

1845 IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT118_P02_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 118, {&MODULE_P02,11}, IfxPort_OutputIdx_alt1};

1846 IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT13_P00_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1};

1847 IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT21_P00_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 21, {&MODULE_P00,12}, IfxPort_OutputIdx_alt1};

1848 IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT244_P15_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 244, {&MODULE_P15,12}, IfxPort_OutputIdx_alt1};

1849 IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT29_P33_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1};

1850 IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT38_P32_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 38, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt1};

1851 IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT3_P02_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_f, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1};

1852 IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT71_P15_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1};

1853 IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT80_P14_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 80, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt1};

1854 IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT10_P00_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_h, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1};

1855 IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT13_P00_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1};

1856 IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT143_P33_14_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 143, {&MODULE_P33,14}, IfxPort_OutputIdx_alt1};

1857 IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT147_P34_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 147, {&MODULE_P34, 2}, IfxPort_OutputIdx_alt1};

1858 IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT1_P02_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_h, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1};

1859 IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT21_P00_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 21, {&MODULE_P00,12}, IfxPort_OutputIdx_alt1};

1860 IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT244_P15_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_g, 244, {&MODULE_P15,12}, IfxPort_OutputIdx_alt1};

1861 IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT29_P33_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1};

1862 IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT36_P32_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 36, {&MODULE_P32, 0}, IfxPort_OutputIdx_alt1};

1863 IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT54_P21_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_h, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1};

1864 IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT65_P20_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_g, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1};

1865 IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT71_P15_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1};

1866 IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT73_P15_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_h, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1};

1867 IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT8_P02_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_h, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1};

1868 IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT95_P11_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_h, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1};

1869 IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT0_P02_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_h, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1};

1870 IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT124_P11_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_h, 124, {&MODULE_P11, 8}, IfxPort_OutputIdx_alt1};

1871 IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT14_P00_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1};

1872 IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT22_P33_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 22, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt1};

1873 IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT245_P15_13_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 245, {&MODULE_P15,13}, IfxPort_OutputIdx_alt1};

1874 IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT30_P33_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1};

1875 IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT37_P32_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 37, {&MODULE_P32, 1}, IfxPort_OutputIdx_alt1};

1876 IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT39_P32_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1};

1877 IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT53_P21_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_h, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1};

1878 IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT64_P20_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_g, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1};

1879 IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT72_P15_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1};

1880 IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT81_P14_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 81, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt1};

1881 IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT94_P13_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_h, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1};

1882 IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT9_P00_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_h, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1};

1883 IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT12_P00_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_h, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1};

1884 IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT144_P33_15_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 144, {&MODULE_P33,15}, IfxPort_OutputIdx_alt1};

1885 IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT148_P34_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 148, {&MODULE_P34, 3}, IfxPort_OutputIdx_alt1};

1886 IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT18_P00_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 18, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt1};

1887 IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT26_P33_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1};

1888 IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT28_P33_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_h, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1};

1889 IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT32_P33_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1};

1890 IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT37_P32_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_h, 37, {&MODULE_P32, 1}, IfxPort_OutputIdx_alt1};

1891 IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT3_P02_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_h, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1};

1892 IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT56_P21_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_h, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1};

1893 IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT67_P20_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_g, 67, {&MODULE_P20,11}, IfxPort_OutputIdx_alt1};

1894 IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT76_P15_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_h, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1};

1895 IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT77_P15_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_g, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1};

1896 IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT97_P11_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_h, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1};

1897 IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT9_P00_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1};

1898 IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT11_P00_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_h, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1};

1899 IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT15_P00_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1};

1900 IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT23_P33_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1};

1901 IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT246_P15_14_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 246, {&MODULE_P15,14}, IfxPort_OutputIdx_alt1};

1902 IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT27_P33_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_h, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1};

1903 IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT2_P02_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_h, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1};

1904 IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT40_P32_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1};

1905 IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT41_P23_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1};

1906 IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT55_P21_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_h, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1};

1907 IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT66_P20_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_g, 66, {&MODULE_P20,10}, IfxPort_OutputIdx_alt1};

1908 IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT73_P15_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1};

1909 IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT74_P15_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_h, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1};

1910 IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT82_P14_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 82, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt1};

1911 IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT96_P11_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_h, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1};

1912 IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT10_P00_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1};

1913 IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT11_P00_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1};

1914 IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT149_P34_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 149, {&MODULE_P34, 4}, IfxPort_OutputIdx_alt1};

1915 IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT14_P00_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_h, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1};

1916 IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT19_P00_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 19, {&MODULE_P00,10}, IfxPort_OutputIdx_alt1};

1917 IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT242_P15_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_g, 242, {&MODULE_P15,10}, IfxPort_OutputIdx_alt1};

1918 IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT27_P33_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1};

1919 IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT30_P33_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_h, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1};

1920 IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT31_P33_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1};

1921 IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT38_P32_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 38, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt1};

1922 IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT40_P32_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1};

1923 IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT49_P22_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_h, 49, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt1};

1924 IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT5_P02_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_h, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1};

1925 IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT69_P20_13_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_g, 69, {&MODULE_P20,13}, IfxPort_OutputIdx_alt1};

1926 IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT78_P15_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_g, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1};

1927 IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT82_P14_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 82, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt1};

1928 IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT91_P13_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_h, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1};

1929 IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT99_P11_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_h, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1};

1930 IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT13_P00_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_h, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1};

1931 IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT16_P00_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1};

1932 IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT247_P15_15_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 247, {&MODULE_P15,15}, IfxPort_OutputIdx_alt1};

1933 IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT24_P33_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1};

1934 IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT29_P33_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_h, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1};

1935 IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT43_P23_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 43, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt1};

1936 IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT48_P22_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_h, 48, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt1};

1937 IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT4_P02_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_h, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1};

1938 IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT68_P20_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_g, 68, {&MODULE_P20,12}, IfxPort_OutputIdx_alt1};

1939 IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT74_P15_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1};

1940 IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT80_P14_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 80, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt1};

1941 IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT83_P14_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 83, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt1};

1942 IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT98_P11_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_h, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1};

1943 IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT100_P11_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_h, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1};

1944 IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT12_P00_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1};

1945 IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT130_P22_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_h, 130, {&MODULE_P22, 4}, IfxPort_OutputIdx_alt1};

1946 IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT150_P34_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 150, {&MODULE_P34, 5}, IfxPort_OutputIdx_alt1};

1947 IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT16_P00_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_h, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1};

1948 IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT20_P00_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 20, {&MODULE_P00,11}, IfxPort_OutputIdx_alt1};

1949 IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT243_P15_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 243, {&MODULE_P15,11}, IfxPort_OutputIdx_alt1};

1950 IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT28_P33_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1};

1951 IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT32_P33_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_h, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1};

1952 IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT33_P33_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 33, {&MODULE_P33,11}, IfxPort_OutputIdx_alt1};

1953 IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT39_P32_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1};

1954 IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT42_P23_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1};

1955 IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT71_P15_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_h, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1};

1956 IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT79_P15_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1};

1957 IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT7_P02_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_h, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1};

1958 IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT84_P14_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 84, {&MODULE_P14, 4}, IfxPort_OutputIdx_alt1};

1959 IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT93_P13_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_h, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1};

1960 IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT101_P11_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_h, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1};

1961 IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT15_P00_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_h, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1};

1962 IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT17_P00_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1};

1963 IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT248_P13_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 248, {&MODULE_P13, 9}, IfxPort_OutputIdx_alt1};

1964 IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT25_P33_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 25, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt1};

1965 IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT31_P33_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_h, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1};

1966 IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT44_P23_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 44, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt1};

1967 IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT45_P23_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 45, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt1};

1968 IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT50_P22_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_h, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1};

1969 IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT64_P20_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1};

1970 IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT6_P02_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_h, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1};

1971 IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT70_P20_14_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 70, {&MODULE_P20,14}, IfxPort_OutputIdx_alt1};

1972 IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT75_P15_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 75, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt1};

1973 IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT81_P14_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 81, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt1};

1974 IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT84_P14_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 84, {&MODULE_P14, 4}, IfxPort_OutputIdx_alt1};

1975 IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT92_P13_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_h, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1};

1976 IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT0_P02_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_b, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1};

1977 IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT128_P12_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 128, {&MODULE_P12, 0}, IfxPort_OutputIdx_alt1};

1978 IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT141_P32_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 141, {&MODULE_P32, 6}, IfxPort_OutputIdx_alt1};

1979 IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT249_P13_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 249, {&MODULE_P13,12}, IfxPort_OutputIdx_alt1};

1980 IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT129_P12_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 129, {&MODULE_P12, 1}, IfxPort_OutputIdx_alt1};

1981 IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT142_P32_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 142, {&MODULE_P32, 7}, IfxPort_OutputIdx_alt1};

1982 IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT1_P02_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_b, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1};

1983 IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT265_P10_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 265, {&MODULE_P10, 9}, IfxPort_OutputIdx_alt1};

1984 IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT101_P11_12_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1};

1985 IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT126_P11_14_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_g, 126, {&MODULE_P11,14}, IfxPort_OutputIdx_alt1};

1986 IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT264_P13_15_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 264, {&MODULE_P13,15}, IfxPort_OutputIdx_alt1};

1987 IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT43_P23_2_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 43, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt1};

1988 IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT51_P21_0_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1};

1989 IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT61_P20_3_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1};

1990 IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT76_P15_5_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1};

1991 IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT91_P13_0_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_f, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1};

1992 IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT119_P11_0_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 119, {&MODULE_P11, 0}, IfxPort_OutputIdx_alt1};

1993 IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT120_P11_1_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_g, 120, {&MODULE_P11, 1}, IfxPort_OutputIdx_alt1};

1994 IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT250_P13_11_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 250, {&MODULE_P13,11}, IfxPort_OutputIdx_alt1};

1995 IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT48_P22_1_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 48, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt1};

1996 IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT53_P21_2_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1};

1997 IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT65_P20_9_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1};

1998 IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT87_P14_7_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1};

1999 IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT94_P13_3_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1};

2000 IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT95_P11_2_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_g, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1};

2001 IfxGtm_Tom_ToutMap IfxGtm_TOM2_10_TOUT104_P10_2_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 104, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt1};

2002 IfxGtm_Tom_ToutMap IfxGtm_TOM2_10_TOUT107_P10_5_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1};

2003 IfxGtm_Tom_ToutMap IfxGtm_TOM2_10_TOUT133_P22_7_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 133, {&MODULE_P22, 7}, IfxPort_OutputIdx_alt1};

2004 IfxGtm_Tom_ToutMap IfxGtm_TOM2_10_TOUT260_P14_13_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 260, {&MODULE_P14,13}, IfxPort_OutputIdx_alt1};

2005 IfxGtm_Tom_ToutMap IfxGtm_TOM2_10_TOUT62_P20_6_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 62, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt1};

2006 IfxGtm_Tom_ToutMap IfxGtm_TOM2_10_TOUT70_P20_14_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 70, {&MODULE_P20,14}, IfxPort_OutputIdx_alt1};

2007 IfxGtm_Tom_ToutMap IfxGtm_TOM2_11_TOUT105_P10_3_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 105, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt1};

2008 IfxGtm_Tom_ToutMap IfxGtm_TOM2_11_TOUT108_P10_6_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1};

2009 IfxGtm_Tom_ToutMap IfxGtm_TOM2_11_TOUT134_P22_8_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 134, {&MODULE_P22, 8}, IfxPort_OutputIdx_alt1};

2010 IfxGtm_Tom_ToutMap IfxGtm_TOM2_11_TOUT261_P14_12_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 261, {&MODULE_P14,12}, IfxPort_OutputIdx_alt1};

2011 IfxGtm_Tom_ToutMap IfxGtm_TOM2_11_TOUT63_P20_7_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 63, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt1};

2012 IfxGtm_Tom_ToutMap IfxGtm_TOM2_11_TOUT71_P15_0_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1};

2013 IfxGtm_Tom_ToutMap IfxGtm_TOM2_12_TOUT102_P10_0_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_b, 102, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt1};

2014 IfxGtm_Tom_ToutMap IfxGtm_TOM2_12_TOUT135_P22_9_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 135, {&MODULE_P22, 9}, IfxPort_OutputIdx_alt1};

2015 IfxGtm_Tom_ToutMap IfxGtm_TOM2_12_TOUT262_P13_13_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 262, {&MODULE_P13,13}, IfxPort_OutputIdx_alt1};

2016 IfxGtm_Tom_ToutMap IfxGtm_TOM2_12_TOUT34_P33_12_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_b, 34, {&MODULE_P33,12}, IfxPort_OutputIdx_alt1};

2017 IfxGtm_Tom_ToutMap IfxGtm_TOM2_12_TOUT72_P15_1_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_b, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1};

2018 IfxGtm_Tom_ToutMap IfxGtm_TOM2_13_TOUT110_P10_8_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 110, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt1};

2019 IfxGtm_Tom_ToutMap IfxGtm_TOM2_13_TOUT136_P22_10_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 136, {&MODULE_P22,10}, IfxPort_OutputIdx_alt1};

2020 IfxGtm_Tom_ToutMap IfxGtm_TOM2_13_TOUT263_P14_15_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 263, {&MODULE_P14,15}, IfxPort_OutputIdx_alt1};

2021 IfxGtm_Tom_ToutMap IfxGtm_TOM2_13_TOUT35_P33_13_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 35, {&MODULE_P33,13}, IfxPort_OutputIdx_alt1};

2022 IfxGtm_Tom_ToutMap IfxGtm_TOM2_13_TOUT65_P20_9_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1};

2023 IfxGtm_Tom_ToutMap IfxGtm_TOM2_13_TOUT73_P15_2_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1};

2024 IfxGtm_Tom_ToutMap IfxGtm_TOM2_14_TOUT137_P22_11_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 137, {&MODULE_P22,11}, IfxPort_OutputIdx_alt1};

2025 IfxGtm_Tom_ToutMap IfxGtm_TOM2_14_TOUT264_P13_15_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 264, {&MODULE_P13,15}, IfxPort_OutputIdx_alt1};

2026 IfxGtm_Tom_ToutMap IfxGtm_TOM2_14_TOUT36_P32_0_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 36, {&MODULE_P32, 0}, IfxPort_OutputIdx_alt1};

2027 IfxGtm_Tom_ToutMap IfxGtm_TOM2_14_TOUT66_P20_10_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 66, {&MODULE_P20,10}, IfxPort_OutputIdx_alt1};

2028 IfxGtm_Tom_ToutMap IfxGtm_TOM2_14_TOUT74_P15_3_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1};

2029 IfxGtm_Tom_ToutMap IfxGtm_TOM2_15_TOUT149_P34_4_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 149, {&MODULE_P34, 4}, IfxPort_OutputIdx_alt1};

2030 IfxGtm_Tom_ToutMap IfxGtm_TOM2_15_TOUT37_P32_1_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_b, 37, {&MODULE_P32, 1}, IfxPort_OutputIdx_alt1};

2031 IfxGtm_Tom_ToutMap IfxGtm_TOM2_15_TOUT67_P20_11_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_b, 67, {&MODULE_P20,11}, IfxPort_OutputIdx_alt1};

2032 IfxGtm_Tom_ToutMap IfxGtm_TOM2_15_TOUT75_P15_4_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_b, 75, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt1};

2033 IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT123_P11_7_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 123, {&MODULE_P11, 7}, IfxPort_OutputIdx_alt1};

2034 IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT124_P11_8_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_g, 124, {&MODULE_P11, 8}, IfxPort_OutputIdx_alt1};

2035 IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT254_P13_5_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 254, {&MODULE_P13, 5}, IfxPort_OutputIdx_alt1};

2036 IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT44_P23_3_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 44, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt1};

2037 IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT50_P22_3_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_f, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1};

2038 IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT52_P21_1_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1};

2039 IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT57_P21_6_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_f, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1};

2040 IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT61_P20_3_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_g, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1};

2041 IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT79_P15_8_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1};

2042 IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT90_P14_10_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_f, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1};

2043 IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT92_P13_1_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_f, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1};

2044 IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT98_P11_9_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1};

2045 IfxGtm_Tom_ToutMap IfxGtm_TOM2_1_TOUT120_P11_1_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 120, {&MODULE_P11, 1}, IfxPort_OutputIdx_alt1};

2046 IfxGtm_Tom_ToutMap IfxGtm_TOM2_1_TOUT127_P11_15_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 127, {&MODULE_P11,15}, IfxPort_OutputIdx_alt1};

2047 IfxGtm_Tom_ToutMap IfxGtm_TOM2_1_TOUT251_P13_10_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 251, {&MODULE_P13,10}, IfxPort_OutputIdx_alt1};

2048 IfxGtm_Tom_ToutMap IfxGtm_TOM2_1_TOUT47_P22_0_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 47, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt1};

2049 IfxGtm_Tom_ToutMap IfxGtm_TOM2_1_TOUT54_P21_3_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1};

2050 IfxGtm_Tom_ToutMap IfxGtm_TOM2_1_TOUT64_P20_8_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1};

2051 IfxGtm_Tom_ToutMap IfxGtm_TOM2_1_TOUT95_P11_2_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1};

2052 IfxGtm_Tom_ToutMap IfxGtm_TOM2_2N_TOUT124_P11_8_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 124, {&MODULE_P11, 8}, IfxPort_OutputIdx_alt1};

2053 IfxGtm_Tom_ToutMap IfxGtm_TOM2_2N_TOUT255_P13_6_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 255, {&MODULE_P13, 6}, IfxPort_OutputIdx_alt1};

2054 IfxGtm_Tom_ToutMap IfxGtm_TOM2_2N_TOUT46_P23_5_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 46, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt1};

2055 IfxGtm_Tom_ToutMap IfxGtm_TOM2_2N_TOUT58_P21_7_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_f, 58, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt1};

2056 IfxGtm_Tom_ToutMap IfxGtm_TOM2_2N_TOUT78_P15_7_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1};

2057 IfxGtm_Tom_ToutMap IfxGtm_TOM2_2N_TOUT93_P13_2_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_f, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1};

2058 IfxGtm_Tom_ToutMap IfxGtm_TOM2_2N_TOUT99_P11_10_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1};

2059 IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT121_P11_4_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 121, {&MODULE_P11, 4}, IfxPort_OutputIdx_alt1};

2060 IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT125_P11_13_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 125, {&MODULE_P11,13}, IfxPort_OutputIdx_alt1};

2061 IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT252_P13_14_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 252, {&MODULE_P13,14}, IfxPort_OutputIdx_alt1};

2062 IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT46_P23_5_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 46, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt1};

2063 IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT50_P22_3_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1};

2064 IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT55_P21_4_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1};

2065 IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT63_P20_7_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 63, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt1};

2066 IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT88_P14_8_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 88, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt1};

2067 IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT96_P11_3_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1};

2068 IfxGtm_Tom_ToutMap IfxGtm_TOM2_3N_TOUT100_P11_11_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1};

2069 IfxGtm_Tom_ToutMap IfxGtm_TOM2_3N_TOUT106_P10_4_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_g, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1};

2070 IfxGtm_Tom_ToutMap IfxGtm_TOM2_3N_TOUT122_P11_5_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_f, 122, {&MODULE_P11, 5}, IfxPort_OutputIdx_alt1};

2071 IfxGtm_Tom_ToutMap IfxGtm_TOM2_3N_TOUT256_P13_7_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 256, {&MODULE_P13, 7}, IfxPort_OutputIdx_alt1};

2072 IfxGtm_Tom_ToutMap IfxGtm_TOM2_3N_TOUT45_P23_4_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 45, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt1};

2073 IfxGtm_Tom_ToutMap IfxGtm_TOM2_3N_TOUT59_P20_0_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_f, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1};

2074 IfxGtm_Tom_ToutMap IfxGtm_TOM2_3N_TOUT77_P15_6_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1};

2075 IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT122_P11_5_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 122, {&MODULE_P11, 5}, IfxPort_OutputIdx_alt1};

2076 IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT126_P11_14_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 126, {&MODULE_P11,14}, IfxPort_OutputIdx_alt1};

2077 IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT253_P13_4_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 253, {&MODULE_P13, 4}, IfxPort_OutputIdx_alt1};

2078 IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT49_P22_2_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 49, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt1};

2079 IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT56_P21_5_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1};

2080 IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT60_P20_1_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 60, {&MODULE_P20, 1}, IfxPort_OutputIdx_alt1};

2081 IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT62_P20_6_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 62, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt1};

2082 IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT89_P14_9_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 89, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt1};

2083 IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT97_P11_6_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1};

2084 IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT106_P10_4_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1};

2085 IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT120_P11_1_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 120, {&MODULE_P11, 1}, IfxPort_OutputIdx_alt1};

2086 IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT122_P11_5_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_e, 122, {&MODULE_P11, 5}, IfxPort_OutputIdx_alt1};

2087 IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT126_P11_14_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 126, {&MODULE_P11,14}, IfxPort_OutputIdx_alt1};

2088 IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT137_P22_11_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_e, 137, {&MODULE_P22,11}, IfxPort_OutputIdx_alt1};

2089 IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT253_P13_4_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_e, 253, {&MODULE_P13, 4}, IfxPort_OutputIdx_alt1};

2090 IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT56_P21_5_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1};

2091 IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT60_P20_1_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 60, {&MODULE_P20, 1}, IfxPort_OutputIdx_alt1};

2092 IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT89_P14_9_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 89, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt1};

2093 IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT97_P11_6_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_e, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1};

2094 IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT102_P10_0_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 102, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt1};

2095 IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT123_P11_7_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 123, {&MODULE_P11, 7}, IfxPort_OutputIdx_alt1};

2096 IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT133_P22_7_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_e, 133, {&MODULE_P22, 7}, IfxPort_OutputIdx_alt1};

2097 IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT254_P13_5_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 254, {&MODULE_P13, 5}, IfxPort_OutputIdx_alt1};

2098 IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT50_P22_3_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1};

2099 IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT57_P21_6_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1};

2100 IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT61_P20_3_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1};

2101 IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT90_P14_10_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1};

2102 IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT98_P11_9_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1};

2103 IfxGtm_Tom_ToutMap IfxGtm_TOM2_5N_TOUT107_P10_5_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1};

2104 IfxGtm_Tom_ToutMap IfxGtm_TOM2_5N_TOUT119_P11_0_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_e, 119, {&MODULE_P11, 0}, IfxPort_OutputIdx_alt1};

2105 IfxGtm_Tom_ToutMap IfxGtm_TOM2_5N_TOUT136_P22_10_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_e, 136, {&MODULE_P22,10}, IfxPort_OutputIdx_alt1};

2106 IfxGtm_Tom_ToutMap IfxGtm_TOM2_5N_TOUT250_P13_11_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_e, 250, {&MODULE_P13,11}, IfxPort_OutputIdx_alt1};

2107 IfxGtm_Tom_ToutMap IfxGtm_TOM2_5N_TOUT53_P21_2_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1};

2108 IfxGtm_Tom_ToutMap IfxGtm_TOM2_5N_TOUT87_P14_7_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1};

2109 IfxGtm_Tom_ToutMap IfxGtm_TOM2_5N_TOUT94_P13_3_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1};

2110 IfxGtm_Tom_ToutMap IfxGtm_TOM2_5_TOUT103_P10_1_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 103, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt1};

2111 IfxGtm_Tom_ToutMap IfxGtm_TOM2_5_TOUT124_P11_8_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 124, {&MODULE_P11, 8}, IfxPort_OutputIdx_alt1};

2112 IfxGtm_Tom_ToutMap IfxGtm_TOM2_5_TOUT132_P22_6_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_e, 132, {&MODULE_P22, 6}, IfxPort_OutputIdx_alt1};

2113 IfxGtm_Tom_ToutMap IfxGtm_TOM2_5_TOUT255_P13_6_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 255, {&MODULE_P13, 6}, IfxPort_OutputIdx_alt1};

2114 IfxGtm_Tom_ToutMap IfxGtm_TOM2_5_TOUT58_P21_7_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 58, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt1};

2115 IfxGtm_Tom_ToutMap IfxGtm_TOM2_5_TOUT91_P13_0_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1};

2116 IfxGtm_Tom_ToutMap IfxGtm_TOM2_5_TOUT99_P11_10_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1};

2117 IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT108_P10_6_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1};

2118 IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT120_P11_1_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_e, 120, {&MODULE_P11, 1}, IfxPort_OutputIdx_alt1};

2119 IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT122_P11_5_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_g, 122, {&MODULE_P11, 5}, IfxPort_OutputIdx_alt1};

2120 IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT135_P22_9_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_e, 135, {&MODULE_P22, 9}, IfxPort_OutputIdx_alt1};

2121 IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT251_P13_10_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_e, 251, {&MODULE_P13,10}, IfxPort_OutputIdx_alt1};

2122 IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT54_P21_3_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1};

2123 IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT86_P14_6_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1};

2124 IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT95_P11_2_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_e, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1};

2125 IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT100_P11_11_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1};

2126 IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT104_P10_2_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 104, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt1};

2127 IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT106_P10_4_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1};

2128 IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT125_P11_13_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 125, {&MODULE_P11,13}, IfxPort_OutputIdx_alt1};

2129 IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT131_P22_5_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_e, 131, {&MODULE_P22, 5}, IfxPort_OutputIdx_alt1};

2130 IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT256_P13_7_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 256, {&MODULE_P13, 7}, IfxPort_OutputIdx_alt1};

2131 IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT59_P20_0_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1};

2132 IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT92_P13_1_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1};

2133 IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT109_P10_7_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1};

2134 IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT121_P11_4_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_e, 121, {&MODULE_P11, 4}, IfxPort_OutputIdx_alt1};

2135 IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT134_P22_8_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_e, 134, {&MODULE_P22, 8}, IfxPort_OutputIdx_alt1};

2136 IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT252_P13_14_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_e, 252, {&MODULE_P13,14}, IfxPort_OutputIdx_alt1};

2137 IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT55_P21_4_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1};

2138 IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT88_P14_8_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 88, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt1};

2139 IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT96_P11_3_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_e, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1};

2140 IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT98_P11_9_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1};

2141 IfxGtm_Tom_ToutMap IfxGtm_TOM2_7_TOUT101_P11_12_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1};

2142 IfxGtm_Tom_ToutMap IfxGtm_TOM2_7_TOUT105_P10_3_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 105, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt1};

2143 IfxGtm_Tom_ToutMap IfxGtm_TOM2_7_TOUT126_P11_14_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 126, {&MODULE_P11,14}, IfxPort_OutputIdx_alt1};

2144 IfxGtm_Tom_ToutMap IfxGtm_TOM2_7_TOUT130_P22_4_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 130, {&MODULE_P22, 4}, IfxPort_OutputIdx_alt1};

2145 IfxGtm_Tom_ToutMap IfxGtm_TOM2_7_TOUT264_P13_15_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_g, 264, {&MODULE_P13,15}, IfxPort_OutputIdx_alt1};

2146 IfxGtm_Tom_ToutMap IfxGtm_TOM2_7_TOUT64_P20_8_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1};

2147 IfxGtm_Tom_ToutMap IfxGtm_TOM2_7_TOUT93_P13_2_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1};

2148 IfxGtm_Tom_ToutMap IfxGtm_TOM2_8_TOUT109_P10_7_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_b, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1};

2149 IfxGtm_Tom_ToutMap IfxGtm_TOM2_8_TOUT127_P11_15_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 127, {&MODULE_P11,15}, IfxPort_OutputIdx_alt1};

2150 IfxGtm_Tom_ToutMap IfxGtm_TOM2_8_TOUT131_P22_5_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 131, {&MODULE_P22, 5}, IfxPort_OutputIdx_alt1};

2151 IfxGtm_Tom_ToutMap IfxGtm_TOM2_8_TOUT258_P14_11_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 258, {&MODULE_P14,11}, IfxPort_OutputIdx_alt1};

2152 IfxGtm_Tom_ToutMap IfxGtm_TOM2_8_TOUT51_P21_0_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_b, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1};

2153 IfxGtm_Tom_ToutMap IfxGtm_TOM2_8_TOUT68_P20_12_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_b, 68, {&MODULE_P20,12}, IfxPort_OutputIdx_alt1};

2154 IfxGtm_Tom_ToutMap IfxGtm_TOM2_9_TOUT103_P10_1_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_b, 103, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt1};

2155 IfxGtm_Tom_ToutMap IfxGtm_TOM2_9_TOUT132_P22_6_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 132, {&MODULE_P22, 6}, IfxPort_OutputIdx_alt1};

2156 IfxGtm_Tom_ToutMap IfxGtm_TOM2_9_TOUT259_P14_14_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 259, {&MODULE_P14,14}, IfxPort_OutputIdx_alt1};

2157 IfxGtm_Tom_ToutMap IfxGtm_TOM2_9_TOUT52_P21_1_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_b, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1};

2158 IfxGtm_Tom_ToutMap IfxGtm_TOM2_9_TOUT69_P20_13_OUT = {IfxGtm_Tom_2, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_b, 69, {&MODULE_P20,13}, IfxPort_OutputIdx_alt1};

2159 IfxGtm_Tom_ToutMap IfxGtm_TOM3_0N_TOUT134_P22_8_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_g, 134, {&MODULE_P22, 8}, IfxPort_OutputIdx_alt1};

2160 IfxGtm_Tom_ToutMap IfxGtm_TOM3_0N_TOUT161_P01_13_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 161, {&MODULE_P01,13}, IfxPort_OutputIdx_alt1};

2161 IfxGtm_Tom_ToutMap IfxGtm_TOM3_0N_TOUT181_P31_7_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 181, {&MODULE_P31, 7}, IfxPort_OutputIdx_alt1};

2162 IfxGtm_Tom_ToutMap IfxGtm_TOM3_0N_TOUT213_P25_7_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 213, {&MODULE_P25, 7}, IfxPort_OutputIdx_alt1};

2163 IfxGtm_Tom_ToutMap IfxGtm_TOM3_0N_TOUT8_P02_8_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_f, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1};

2164 IfxGtm_Tom_ToutMap IfxGtm_TOM3_0_TOUT110_P10_8_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 110, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt1};

2165 IfxGtm_Tom_ToutMap IfxGtm_TOM3_0_TOUT115_P01_7_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_f, 115, {&MODULE_P01, 7}, IfxPort_OutputIdx_alt1};

2166 IfxGtm_Tom_ToutMap IfxGtm_TOM3_0_TOUT130_P22_4_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_f, 130, {&MODULE_P22, 4}, IfxPort_OutputIdx_alt1};

2167 IfxGtm_Tom_ToutMap IfxGtm_TOM3_0_TOUT155_P01_0_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 155, {&MODULE_P01, 0}, IfxPort_OutputIdx_alt1};

2168 IfxGtm_Tom_ToutMap IfxGtm_TOM3_0_TOUT162_P01_8_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_e, 162, {&MODULE_P01, 8}, IfxPort_OutputIdx_alt1};

2169 IfxGtm_Tom_ToutMap IfxGtm_TOM3_0_TOUT174_P31_0_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 174, {&MODULE_P31, 0}, IfxPort_OutputIdx_alt1};

2170 IfxGtm_Tom_ToutMap IfxGtm_TOM3_0_TOUT206_P25_0_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 206, {&MODULE_P25, 0}, IfxPort_OutputIdx_alt1};

2171 IfxGtm_Tom_ToutMap IfxGtm_TOM3_10_TOUT164_P01_14_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 164, {&MODULE_P01,14}, IfxPort_OutputIdx_alt1};

2172 IfxGtm_Tom_ToutMap IfxGtm_TOM3_10_TOUT184_P31_10_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 184, {&MODULE_P31,10}, IfxPort_OutputIdx_alt1};

2173 IfxGtm_Tom_ToutMap IfxGtm_TOM3_10_TOUT188_P31_14_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_e, 188, {&MODULE_P31,14}, IfxPort_OutputIdx_alt1};

2174 IfxGtm_Tom_ToutMap IfxGtm_TOM3_10_TOUT216_P25_10_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 216, {&MODULE_P25,10}, IfxPort_OutputIdx_alt1};

2175 IfxGtm_Tom_ToutMap IfxGtm_TOM3_10_TOUT220_P25_14_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_e, 220, {&MODULE_P25,14}, IfxPort_OutputIdx_alt1};

2176 IfxGtm_Tom_ToutMap IfxGtm_TOM3_10_TOUT266_P10_10_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 266, {&MODULE_P10,10}, IfxPort_OutputIdx_alt1};

2177 IfxGtm_Tom_ToutMap IfxGtm_TOM3_11_TOUT166_P00_14_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 166, {&MODULE_P00,14}, IfxPort_OutputIdx_alt1};

2178 IfxGtm_Tom_ToutMap IfxGtm_TOM3_11_TOUT185_P31_11_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 185, {&MODULE_P31,11}, IfxPort_OutputIdx_alt1};

2179 IfxGtm_Tom_ToutMap IfxGtm_TOM3_11_TOUT189_P31_15_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_e, 189, {&MODULE_P31,15}, IfxPort_OutputIdx_alt1};

2180 IfxGtm_Tom_ToutMap IfxGtm_TOM3_11_TOUT217_P25_11_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 217, {&MODULE_P25,11}, IfxPort_OutputIdx_alt1};

2181 IfxGtm_Tom_ToutMap IfxGtm_TOM3_11_TOUT221_P25_15_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_e, 221, {&MODULE_P25,15}, IfxPort_OutputIdx_alt1};

2182 IfxGtm_Tom_ToutMap IfxGtm_TOM3_11_TOUT267_P10_14_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 267, {&MODULE_P10,14}, IfxPort_OutputIdx_alt1};

2183 IfxGtm_Tom_ToutMap IfxGtm_TOM3_12_TOUT167_P00_13_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 167, {&MODULE_P00,13}, IfxPort_OutputIdx_alt1};

2184 IfxGtm_Tom_ToutMap IfxGtm_TOM3_12_TOUT186_P31_12_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 186, {&MODULE_P31,12}, IfxPort_OutputIdx_alt1};

2185 IfxGtm_Tom_ToutMap IfxGtm_TOM3_12_TOUT218_P25_12_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 218, {&MODULE_P25,12}, IfxPort_OutputIdx_alt1};

2186 IfxGtm_Tom_ToutMap IfxGtm_TOM3_12_TOUT268_P10_13_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_b, 268, {&MODULE_P10,13}, IfxPort_OutputIdx_alt1};

2187 IfxGtm_Tom_ToutMap IfxGtm_TOM3_13_TOUT138_P23_6_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 138, {&MODULE_P23, 6}, IfxPort_OutputIdx_alt1};

2188 IfxGtm_Tom_ToutMap IfxGtm_TOM3_13_TOUT168_P00_15_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 168, {&MODULE_P00,15}, IfxPort_OutputIdx_alt1};

2189 IfxGtm_Tom_ToutMap IfxGtm_TOM3_13_TOUT187_P31_13_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 187, {&MODULE_P31,13}, IfxPort_OutputIdx_alt1};

2190 IfxGtm_Tom_ToutMap IfxGtm_TOM3_13_TOUT219_P25_13_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 219, {&MODULE_P25,13}, IfxPort_OutputIdx_alt1};

2191 IfxGtm_Tom_ToutMap IfxGtm_TOM3_13_TOUT269_P10_11_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 269, {&MODULE_P10,11}, IfxPort_OutputIdx_alt1};

2192 IfxGtm_Tom_ToutMap IfxGtm_TOM3_14_TOUT139_P23_7_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 139, {&MODULE_P23, 7}, IfxPort_OutputIdx_alt1};

2193 IfxGtm_Tom_ToutMap IfxGtm_TOM3_14_TOUT151_P02_12_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 151, {&MODULE_P02,12}, IfxPort_OutputIdx_alt1};

2194 IfxGtm_Tom_ToutMap IfxGtm_TOM3_14_TOUT153_P02_13_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 153, {&MODULE_P02,13}, IfxPort_OutputIdx_alt1};

2195 IfxGtm_Tom_ToutMap IfxGtm_TOM3_14_TOUT188_P31_14_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 188, {&MODULE_P31,14}, IfxPort_OutputIdx_alt1};

2196 IfxGtm_Tom_ToutMap IfxGtm_TOM3_14_TOUT220_P25_14_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 220, {&MODULE_P25,14}, IfxPort_OutputIdx_alt1};

2197 IfxGtm_Tom_ToutMap IfxGtm_TOM3_14_TOUT270_P10_15_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 270, {&MODULE_P10,15}, IfxPort_OutputIdx_alt1};

2198 IfxGtm_Tom_ToutMap IfxGtm_TOM3_15_TOUT140_P32_5_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_b, 140, {&MODULE_P32, 5}, IfxPort_OutputIdx_alt1};

2199 IfxGtm_Tom_ToutMap IfxGtm_TOM3_15_TOUT152_P02_15_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 152, {&MODULE_P02,15}, IfxPort_OutputIdx_alt1};

2200 IfxGtm_Tom_ToutMap IfxGtm_TOM3_15_TOUT154_P02_14_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 154, {&MODULE_P02,14}, IfxPort_OutputIdx_alt1};

2201 IfxGtm_Tom_ToutMap IfxGtm_TOM3_15_TOUT189_P31_15_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 189, {&MODULE_P31,15}, IfxPort_OutputIdx_alt1};

2202 IfxGtm_Tom_ToutMap IfxGtm_TOM3_15_TOUT221_P25_15_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 221, {&MODULE_P25,15}, IfxPort_OutputIdx_alt1};

2203 IfxGtm_Tom_ToutMap IfxGtm_TOM3_1N_TOUT116_P02_9_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_f, 116, {&MODULE_P02, 9}, IfxPort_OutputIdx_alt1};

2204 IfxGtm_Tom_ToutMap IfxGtm_TOM3_1N_TOUT135_P22_9_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_g, 135, {&MODULE_P22, 9}, IfxPort_OutputIdx_alt1};

2205 IfxGtm_Tom_ToutMap IfxGtm_TOM3_1N_TOUT158_P01_12_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 158, {&MODULE_P01,12}, IfxPort_OutputIdx_alt1};

2206 IfxGtm_Tom_ToutMap IfxGtm_TOM3_1N_TOUT178_P31_4_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 178, {&MODULE_P31, 4}, IfxPort_OutputIdx_alt1};

2207 IfxGtm_Tom_ToutMap IfxGtm_TOM3_1N_TOUT210_P25_4_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 210, {&MODULE_P25, 4}, IfxPort_OutputIdx_alt1};

2208 IfxGtm_Tom_ToutMap IfxGtm_TOM3_1N_TOUT245_P15_13_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_f, 245, {&MODULE_P15,13}, IfxPort_OutputIdx_alt1};

2209 IfxGtm_Tom_ToutMap IfxGtm_TOM3_1N_TOUT268_P10_13_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 268, {&MODULE_P10,13}, IfxPort_OutputIdx_alt1};

2210 IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT111_P01_3_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 111, {&MODULE_P01, 3}, IfxPort_OutputIdx_alt1};

2211 IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT114_P01_6_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_f, 114, {&MODULE_P01, 6}, IfxPort_OutputIdx_alt1};

2212 IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT131_P22_5_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_f, 131, {&MODULE_P22, 5}, IfxPort_OutputIdx_alt1};

2213 IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT156_P01_2_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 156, {&MODULE_P01, 2}, IfxPort_OutputIdx_alt1};

2214 IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT163_P01_10_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 163, {&MODULE_P01,10}, IfxPort_OutputIdx_alt1};

2215 IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT175_P31_1_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 175, {&MODULE_P31, 1}, IfxPort_OutputIdx_alt1};

2216 IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT207_P25_1_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 207, {&MODULE_P25, 1}, IfxPort_OutputIdx_alt1};

2217 IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT242_P15_10_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 242, {&MODULE_P15,10}, IfxPort_OutputIdx_alt1};

2218 IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT265_P10_9_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_e, 265, {&MODULE_P10, 9}, IfxPort_OutputIdx_alt1};

2219 IfxGtm_Tom_ToutMap IfxGtm_TOM3_2N_TOUT117_P02_10_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_f, 117, {&MODULE_P02,10}, IfxPort_OutputIdx_alt1};

2220 IfxGtm_Tom_ToutMap IfxGtm_TOM3_2N_TOUT136_P22_10_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_g, 136, {&MODULE_P22,10}, IfxPort_OutputIdx_alt1};

2221 IfxGtm_Tom_ToutMap IfxGtm_TOM3_2N_TOUT159_P01_1_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 159, {&MODULE_P01, 1}, IfxPort_OutputIdx_alt1};

2222 IfxGtm_Tom_ToutMap IfxGtm_TOM3_2N_TOUT179_P31_5_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 179, {&MODULE_P31, 5}, IfxPort_OutputIdx_alt1};

2223 IfxGtm_Tom_ToutMap IfxGtm_TOM3_2N_TOUT211_P25_5_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 211, {&MODULE_P25, 5}, IfxPort_OutputIdx_alt1};

2224 IfxGtm_Tom_ToutMap IfxGtm_TOM3_2N_TOUT246_P15_14_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_f, 246, {&MODULE_P15,14}, IfxPort_OutputIdx_alt1};

2225 IfxGtm_Tom_ToutMap IfxGtm_TOM3_2N_TOUT267_P10_14_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 267, {&MODULE_P10,14}, IfxPort_OutputIdx_alt1};

2226 IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT112_P01_4_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 112, {&MODULE_P01, 4}, IfxPort_OutputIdx_alt1};

2227 IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT132_P22_6_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_f, 132, {&MODULE_P22, 6}, IfxPort_OutputIdx_alt1};

2228 IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT157_P01_15_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 157, {&MODULE_P01,15}, IfxPort_OutputIdx_alt1};

2229 IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT164_P01_14_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 164, {&MODULE_P01,14}, IfxPort_OutputIdx_alt1};

2230 IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT176_P31_2_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 176, {&MODULE_P31, 2}, IfxPort_OutputIdx_alt1};

2231 IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT208_P25_2_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 208, {&MODULE_P25, 2}, IfxPort_OutputIdx_alt1};

2232 IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT243_P15_11_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 243, {&MODULE_P15,11}, IfxPort_OutputIdx_alt1};

2233 IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT266_P10_10_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_e, 266, {&MODULE_P10,10}, IfxPort_OutputIdx_alt1};

2234 IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT118_P02_11_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_f, 118, {&MODULE_P02,11}, IfxPort_OutputIdx_alt1};

2235 IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT137_P22_11_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_g, 137, {&MODULE_P22,11}, IfxPort_OutputIdx_alt1};

2236 IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT160_P01_9_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 160, {&MODULE_P01, 9}, IfxPort_OutputIdx_alt1};

2237 IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT180_P31_6_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 180, {&MODULE_P31, 6}, IfxPort_OutputIdx_alt1};

2238 IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT212_P25_6_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 212, {&MODULE_P25, 6}, IfxPort_OutputIdx_alt1};

2239 IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT212_P26_0_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 212, {&MODULE_P26, 0}, IfxPort_OutputIdx_alt1};

2240 IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT247_P15_15_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_f, 247, {&MODULE_P15,15}, IfxPort_OutputIdx_alt1};

2241 IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT270_P10_15_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 270, {&MODULE_P10,15}, IfxPort_OutputIdx_alt1};

2242 IfxGtm_Tom_ToutMap IfxGtm_TOM3_3_TOUT113_P01_5_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 113, {&MODULE_P01, 5}, IfxPort_OutputIdx_alt1};

2243 IfxGtm_Tom_ToutMap IfxGtm_TOM3_3_TOUT133_P22_7_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_f, 133, {&MODULE_P22, 7}, IfxPort_OutputIdx_alt1};

2244 IfxGtm_Tom_ToutMap IfxGtm_TOM3_3_TOUT165_P01_11_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 165, {&MODULE_P01,11}, IfxPort_OutputIdx_alt1};

2245 IfxGtm_Tom_ToutMap IfxGtm_TOM3_3_TOUT177_P31_3_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 177, {&MODULE_P31, 3}, IfxPort_OutputIdx_alt1};

2246 IfxGtm_Tom_ToutMap IfxGtm_TOM3_3_TOUT209_P25_3_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 209, {&MODULE_P25, 3}, IfxPort_OutputIdx_alt1};

2247 IfxGtm_Tom_ToutMap IfxGtm_TOM3_3_TOUT244_P15_12_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 244, {&MODULE_P15,12}, IfxPort_OutputIdx_alt1};

2248 IfxGtm_Tom_ToutMap IfxGtm_TOM3_3_TOUT269_P10_11_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_e, 269, {&MODULE_P10,11}, IfxPort_OutputIdx_alt1};

2249 IfxGtm_Tom_ToutMap IfxGtm_TOM3_4N_TOUT151_P02_12_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 151, {&MODULE_P02,12}, IfxPort_OutputIdx_alt1};

2250 IfxGtm_Tom_ToutMap IfxGtm_TOM3_4N_TOUT165_P01_11_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_e, 165, {&MODULE_P01,11}, IfxPort_OutputIdx_alt1};

2251 IfxGtm_Tom_ToutMap IfxGtm_TOM3_4N_TOUT177_P31_3_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_e, 177, {&MODULE_P31, 3}, IfxPort_OutputIdx_alt1};

2252 IfxGtm_Tom_ToutMap IfxGtm_TOM3_4N_TOUT209_P25_3_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_e, 209, {&MODULE_P25, 3}, IfxPort_OutputIdx_alt1};

2253 IfxGtm_Tom_ToutMap IfxGtm_TOM3_4N_TOUT244_P15_12_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 244, {&MODULE_P15,12}, IfxPort_OutputIdx_alt1};

2254 IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT110_P10_8_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 110, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt1};

2255 IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT111_P01_3_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 111, {&MODULE_P01, 3}, IfxPort_OutputIdx_alt1};

2256 IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT114_P01_6_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 114, {&MODULE_P01, 6}, IfxPort_OutputIdx_alt1};

2257 IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT134_P22_8_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_f, 134, {&MODULE_P22, 8}, IfxPort_OutputIdx_alt1};

2258 IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT158_P01_12_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 158, {&MODULE_P01,12}, IfxPort_OutputIdx_alt1};

2259 IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT178_P31_4_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 178, {&MODULE_P31, 4}, IfxPort_OutputIdx_alt1};

2260 IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT210_P25_4_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 210, {&MODULE_P25, 4}, IfxPort_OutputIdx_alt1};

2261 IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT245_P15_13_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 245, {&MODULE_P15,13}, IfxPort_OutputIdx_alt1};

2262 IfxGtm_Tom_ToutMap IfxGtm_TOM3_5N_TOUT153_P02_13_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 153, {&MODULE_P02,13}, IfxPort_OutputIdx_alt1};

2263 IfxGtm_Tom_ToutMap IfxGtm_TOM3_5N_TOUT155_P01_0_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_e, 155, {&MODULE_P01, 0}, IfxPort_OutputIdx_alt1};

2264 IfxGtm_Tom_ToutMap IfxGtm_TOM3_5N_TOUT166_P00_14_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 166, {&MODULE_P00,14}, IfxPort_OutputIdx_alt1};

2265 IfxGtm_Tom_ToutMap IfxGtm_TOM3_5N_TOUT174_P31_0_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_e, 174, {&MODULE_P31, 0}, IfxPort_OutputIdx_alt1};

2266 IfxGtm_Tom_ToutMap IfxGtm_TOM3_5N_TOUT206_P25_0_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_e, 206, {&MODULE_P25, 0}, IfxPort_OutputIdx_alt1};

2267 IfxGtm_Tom_ToutMap IfxGtm_TOM3_5N_TOUT268_P10_13_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 268, {&MODULE_P10,13}, IfxPort_OutputIdx_alt1};

2268 IfxGtm_Tom_ToutMap IfxGtm_TOM3_5_TOUT115_P01_7_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 115, {&MODULE_P01, 7}, IfxPort_OutputIdx_alt1};

2269 IfxGtm_Tom_ToutMap IfxGtm_TOM3_5_TOUT135_P22_9_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 135, {&MODULE_P22, 9}, IfxPort_OutputIdx_alt1};

2270 IfxGtm_Tom_ToutMap IfxGtm_TOM3_5_TOUT159_P01_1_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 159, {&MODULE_P01, 1}, IfxPort_OutputIdx_alt1};

2271 IfxGtm_Tom_ToutMap IfxGtm_TOM3_5_TOUT179_P31_5_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 179, {&MODULE_P31, 5}, IfxPort_OutputIdx_alt1};

2272 IfxGtm_Tom_ToutMap IfxGtm_TOM3_5_TOUT211_P25_5_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 211, {&MODULE_P25, 5}, IfxPort_OutputIdx_alt1};

2273 IfxGtm_Tom_ToutMap IfxGtm_TOM3_5_TOUT246_P15_14_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 246, {&MODULE_P15,14}, IfxPort_OutputIdx_alt1};

2274 IfxGtm_Tom_ToutMap IfxGtm_TOM3_5_TOUT265_P10_9_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_f, 265, {&MODULE_P10, 9}, IfxPort_OutputIdx_alt1};

2275 IfxGtm_Tom_ToutMap IfxGtm_TOM3_6N_TOUT154_P02_14_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 154, {&MODULE_P02,14}, IfxPort_OutputIdx_alt1};

2276 IfxGtm_Tom_ToutMap IfxGtm_TOM3_6N_TOUT156_P01_2_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_e, 156, {&MODULE_P01, 2}, IfxPort_OutputIdx_alt1};

2277 IfxGtm_Tom_ToutMap IfxGtm_TOM3_6N_TOUT175_P31_1_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_e, 175, {&MODULE_P31, 1}, IfxPort_OutputIdx_alt1};

2278 IfxGtm_Tom_ToutMap IfxGtm_TOM3_6N_TOUT207_P25_1_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_e, 207, {&MODULE_P25, 1}, IfxPort_OutputIdx_alt1};

2279 IfxGtm_Tom_ToutMap IfxGtm_TOM3_6N_TOUT242_P15_10_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 242, {&MODULE_P15,10}, IfxPort_OutputIdx_alt1};

2280 IfxGtm_Tom_ToutMap IfxGtm_TOM3_6N_TOUT267_P10_14_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 267, {&MODULE_P10,14}, IfxPort_OutputIdx_alt1};

2281 IfxGtm_Tom_ToutMap IfxGtm_TOM3_6_TOUT136_P22_10_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 136, {&MODULE_P22,10}, IfxPort_OutputIdx_alt1};

2282 IfxGtm_Tom_ToutMap IfxGtm_TOM3_6_TOUT160_P01_9_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 160, {&MODULE_P01, 9}, IfxPort_OutputIdx_alt1};

2283 IfxGtm_Tom_ToutMap IfxGtm_TOM3_6_TOUT180_P31_6_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 180, {&MODULE_P31, 6}, IfxPort_OutputIdx_alt1};

2284 IfxGtm_Tom_ToutMap IfxGtm_TOM3_6_TOUT212_P25_6_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 212, {&MODULE_P25, 6}, IfxPort_OutputIdx_alt1};

2285 IfxGtm_Tom_ToutMap IfxGtm_TOM3_6_TOUT212_P26_0_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 212, {&MODULE_P26, 0}, IfxPort_OutputIdx_alt1};

2286 IfxGtm_Tom_ToutMap IfxGtm_TOM3_6_TOUT247_P15_15_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 247, {&MODULE_P15,15}, IfxPort_OutputIdx_alt1};

2287 IfxGtm_Tom_ToutMap IfxGtm_TOM3_6_TOUT266_P10_10_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_f, 266, {&MODULE_P10,10}, IfxPort_OutputIdx_alt1};

2288 IfxGtm_Tom_ToutMap IfxGtm_TOM3_7N_TOUT152_P02_15_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 152, {&MODULE_P02,15}, IfxPort_OutputIdx_alt1};

2289 IfxGtm_Tom_ToutMap IfxGtm_TOM3_7N_TOUT157_P01_15_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_e, 157, {&MODULE_P01,15}, IfxPort_OutputIdx_alt1};

2290 IfxGtm_Tom_ToutMap IfxGtm_TOM3_7N_TOUT176_P31_2_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_e, 176, {&MODULE_P31, 2}, IfxPort_OutputIdx_alt1};

2291 IfxGtm_Tom_ToutMap IfxGtm_TOM3_7N_TOUT208_P25_2_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_e, 208, {&MODULE_P25, 2}, IfxPort_OutputIdx_alt1};

2292 IfxGtm_Tom_ToutMap IfxGtm_TOM3_7N_TOUT243_P15_11_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 243, {&MODULE_P15,11}, IfxPort_OutputIdx_alt1};

2293 IfxGtm_Tom_ToutMap IfxGtm_TOM3_7N_TOUT270_P10_15_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 270, {&MODULE_P10,15}, IfxPort_OutputIdx_alt1};

2294 IfxGtm_Tom_ToutMap IfxGtm_TOM3_7_TOUT137_P22_11_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 137, {&MODULE_P22,11}, IfxPort_OutputIdx_alt1};

2295 IfxGtm_Tom_ToutMap IfxGtm_TOM3_7_TOUT161_P01_13_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 161, {&MODULE_P01,13}, IfxPort_OutputIdx_alt1};

2296 IfxGtm_Tom_ToutMap IfxGtm_TOM3_7_TOUT181_P31_7_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 181, {&MODULE_P31, 7}, IfxPort_OutputIdx_alt1};

2297 IfxGtm_Tom_ToutMap IfxGtm_TOM3_7_TOUT213_P25_7_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 213, {&MODULE_P25, 7}, IfxPort_OutputIdx_alt1};

2298 IfxGtm_Tom_ToutMap IfxGtm_TOM3_7_TOUT248_P13_9_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 248, {&MODULE_P13, 9}, IfxPort_OutputIdx_alt1};

2299 IfxGtm_Tom_ToutMap IfxGtm_TOM3_7_TOUT269_P10_11_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_f, 269, {&MODULE_P10,11}, IfxPort_OutputIdx_alt1};

2300 IfxGtm_Tom_ToutMap IfxGtm_TOM3_8_TOUT162_P01_8_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 162, {&MODULE_P01, 8}, IfxPort_OutputIdx_alt1};

2301 IfxGtm_Tom_ToutMap IfxGtm_TOM3_8_TOUT182_P31_8_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 182, {&MODULE_P31, 8}, IfxPort_OutputIdx_alt1};

2302 IfxGtm_Tom_ToutMap IfxGtm_TOM3_8_TOUT186_P31_12_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_e, 186, {&MODULE_P31,12}, IfxPort_OutputIdx_alt1};

2303 IfxGtm_Tom_ToutMap IfxGtm_TOM3_8_TOUT214_P25_8_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 214, {&MODULE_P25, 8}, IfxPort_OutputIdx_alt1};

2304 IfxGtm_Tom_ToutMap IfxGtm_TOM3_8_TOUT218_P25_12_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_e, 218, {&MODULE_P25,12}, IfxPort_OutputIdx_alt1};

2305 IfxGtm_Tom_ToutMap IfxGtm_TOM3_8_TOUT249_P13_12_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_b, 249, {&MODULE_P13,12}, IfxPort_OutputIdx_alt1};

2306 IfxGtm_Tom_ToutMap IfxGtm_TOM3_9_TOUT163_P01_10_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 163, {&MODULE_P01,10}, IfxPort_OutputIdx_alt1};

2307 IfxGtm_Tom_ToutMap IfxGtm_TOM3_9_TOUT183_P31_9_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 183, {&MODULE_P31, 9}, IfxPort_OutputIdx_alt1};

2308 IfxGtm_Tom_ToutMap IfxGtm_TOM3_9_TOUT187_P31_13_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_e, 187, {&MODULE_P31,13}, IfxPort_OutputIdx_alt1};

2309 IfxGtm_Tom_ToutMap IfxGtm_TOM3_9_TOUT215_P25_9_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 215, {&MODULE_P25, 9}, IfxPort_OutputIdx_alt1};

2310 IfxGtm_Tom_ToutMap IfxGtm_TOM3_9_TOUT219_P25_13_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_e, 219, {&MODULE_P25,13}, IfxPort_OutputIdx_alt1};

2311 IfxGtm_Tom_ToutMap IfxGtm_TOM3_9_TOUT265_P10_9_OUT = {IfxGtm_Tom_3, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_b, 265, {&MODULE_P10, 9}, IfxPort_OutputIdx_alt1};

2312 IfxGtm_Tom_ToutMap IfxGtm_TOM4_0_TOUT155_P01_0_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 155, {&MODULE_P01, 0}, IfxPort_OutputIdx_alt1};

2313 IfxGtm_Tom_ToutMap IfxGtm_TOM4_0_TOUT162_P01_8_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_f, 162, {&MODULE_P01, 8}, IfxPort_OutputIdx_alt1};

2314 IfxGtm_Tom_ToutMap IfxGtm_TOM4_0_TOUT190_P30_0_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 190, {&MODULE_P30, 0}, IfxPort_OutputIdx_alt1};

2315 IfxGtm_Tom_ToutMap IfxGtm_TOM4_0_TOUT222_P24_0_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 222, {&MODULE_P24, 0}, IfxPort_OutputIdx_alt1};

2316 IfxGtm_Tom_ToutMap IfxGtm_TOM4_0_TOUT250_P13_11_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 250, {&MODULE_P13,11}, IfxPort_OutputIdx_alt1};

2317 IfxGtm_Tom_ToutMap IfxGtm_TOM4_10_TOUT164_P01_14_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 164, {&MODULE_P01,14}, IfxPort_OutputIdx_alt1};

2318 IfxGtm_Tom_ToutMap IfxGtm_TOM4_10_TOUT200_P30_10_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 200, {&MODULE_P30,10}, IfxPort_OutputIdx_alt1};

2319 IfxGtm_Tom_ToutMap IfxGtm_TOM4_10_TOUT204_P30_14_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_e, 204, {&MODULE_P30,14}, IfxPort_OutputIdx_alt1};

2320 IfxGtm_Tom_ToutMap IfxGtm_TOM4_10_TOUT232_P24_10_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 232, {&MODULE_P24,10}, IfxPort_OutputIdx_alt1};

2321 IfxGtm_Tom_ToutMap IfxGtm_TOM4_10_TOUT260_P14_13_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 260, {&MODULE_P14,13}, IfxPort_OutputIdx_alt1};

2322 IfxGtm_Tom_ToutMap IfxGtm_TOM4_11_TOUT166_P00_14_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 166, {&MODULE_P00,14}, IfxPort_OutputIdx_alt1};

2323 IfxGtm_Tom_ToutMap IfxGtm_TOM4_11_TOUT201_P30_11_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 201, {&MODULE_P30,11}, IfxPort_OutputIdx_alt1};

2324 IfxGtm_Tom_ToutMap IfxGtm_TOM4_11_TOUT205_P30_15_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_e, 205, {&MODULE_P30,15}, IfxPort_OutputIdx_alt1};

2325 IfxGtm_Tom_ToutMap IfxGtm_TOM4_11_TOUT233_P24_11_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 233, {&MODULE_P24,11}, IfxPort_OutputIdx_alt1};

2326 IfxGtm_Tom_ToutMap IfxGtm_TOM4_11_TOUT261_P14_12_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 261, {&MODULE_P14,12}, IfxPort_OutputIdx_alt1};

2327 IfxGtm_Tom_ToutMap IfxGtm_TOM4_12_TOUT167_P00_13_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_b, 167, {&MODULE_P00,13}, IfxPort_OutputIdx_alt1};

2328 IfxGtm_Tom_ToutMap IfxGtm_TOM4_12_TOUT202_P30_12_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 202, {&MODULE_P30,12}, IfxPort_OutputIdx_alt1};

2329 IfxGtm_Tom_ToutMap IfxGtm_TOM4_12_TOUT230_P24_8_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_e, 230, {&MODULE_P24, 8}, IfxPort_OutputIdx_alt1};

2330 IfxGtm_Tom_ToutMap IfxGtm_TOM4_12_TOUT234_P24_12_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 234, {&MODULE_P24,12}, IfxPort_OutputIdx_alt1};

2331 IfxGtm_Tom_ToutMap IfxGtm_TOM4_12_TOUT262_P13_13_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_b, 262, {&MODULE_P13,13}, IfxPort_OutputIdx_alt1};

2332 IfxGtm_Tom_ToutMap IfxGtm_TOM4_13_TOUT168_P00_15_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 168, {&MODULE_P00,15}, IfxPort_OutputIdx_alt1};

2333 IfxGtm_Tom_ToutMap IfxGtm_TOM4_13_TOUT203_P30_13_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 203, {&MODULE_P30,13}, IfxPort_OutputIdx_alt1};

2334 IfxGtm_Tom_ToutMap IfxGtm_TOM4_13_TOUT231_P24_9_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_e, 231, {&MODULE_P24, 9}, IfxPort_OutputIdx_alt1};

2335 IfxGtm_Tom_ToutMap IfxGtm_TOM4_13_TOUT235_P24_13_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 235, {&MODULE_P24,13}, IfxPort_OutputIdx_alt1};

2336 IfxGtm_Tom_ToutMap IfxGtm_TOM4_13_TOUT263_P14_15_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 263, {&MODULE_P14,15}, IfxPort_OutputIdx_alt1};

2337 IfxGtm_Tom_ToutMap IfxGtm_TOM4_14_TOUT151_P02_12_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 151, {&MODULE_P02,12}, IfxPort_OutputIdx_alt1};

2338 IfxGtm_Tom_ToutMap IfxGtm_TOM4_14_TOUT153_P02_13_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 153, {&MODULE_P02,13}, IfxPort_OutputIdx_alt1};

2339 IfxGtm_Tom_ToutMap IfxGtm_TOM4_14_TOUT204_P30_14_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 204, {&MODULE_P30,14}, IfxPort_OutputIdx_alt1};

2340 IfxGtm_Tom_ToutMap IfxGtm_TOM4_14_TOUT232_P24_10_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_e, 232, {&MODULE_P24,10}, IfxPort_OutputIdx_alt1};

2341 IfxGtm_Tom_ToutMap IfxGtm_TOM4_14_TOUT236_P24_14_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 236, {&MODULE_P24,14}, IfxPort_OutputIdx_alt1};

2342 IfxGtm_Tom_ToutMap IfxGtm_TOM4_14_TOUT264_P13_15_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 264, {&MODULE_P13,15}, IfxPort_OutputIdx_alt1};

2343 IfxGtm_Tom_ToutMap IfxGtm_TOM4_15_TOUT152_P02_15_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_b, 152, {&MODULE_P02,15}, IfxPort_OutputIdx_alt1};

2344 IfxGtm_Tom_ToutMap IfxGtm_TOM4_15_TOUT154_P02_14_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_b, 154, {&MODULE_P02,14}, IfxPort_OutputIdx_alt1};

2345 IfxGtm_Tom_ToutMap IfxGtm_TOM4_15_TOUT205_P30_15_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 205, {&MODULE_P30,15}, IfxPort_OutputIdx_alt1};

2346 IfxGtm_Tom_ToutMap IfxGtm_TOM4_15_TOUT233_P24_11_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_e, 233, {&MODULE_P24,11}, IfxPort_OutputIdx_alt1};

2347 IfxGtm_Tom_ToutMap IfxGtm_TOM4_15_TOUT237_P24_15_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 237, {&MODULE_P24,15}, IfxPort_OutputIdx_alt1};

2348 IfxGtm_Tom_ToutMap IfxGtm_TOM4_1_TOUT156_P01_2_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 156, {&MODULE_P01, 2}, IfxPort_OutputIdx_alt1};

2349 IfxGtm_Tom_ToutMap IfxGtm_TOM4_1_TOUT163_P01_10_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_f, 163, {&MODULE_P01,10}, IfxPort_OutputIdx_alt1};

2350 IfxGtm_Tom_ToutMap IfxGtm_TOM4_1_TOUT191_P30_1_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 191, {&MODULE_P30, 1}, IfxPort_OutputIdx_alt1};

2351 IfxGtm_Tom_ToutMap IfxGtm_TOM4_1_TOUT223_P24_1_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 223, {&MODULE_P24, 1}, IfxPort_OutputIdx_alt1};

2352 IfxGtm_Tom_ToutMap IfxGtm_TOM4_1_TOUT251_P13_10_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 251, {&MODULE_P13,10}, IfxPort_OutputIdx_alt1};

2353 IfxGtm_Tom_ToutMap IfxGtm_TOM4_2_TOUT157_P01_15_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 157, {&MODULE_P01,15}, IfxPort_OutputIdx_alt1};

2354 IfxGtm_Tom_ToutMap IfxGtm_TOM4_2_TOUT164_P01_14_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_f, 164, {&MODULE_P01,14}, IfxPort_OutputIdx_alt1};

2355 IfxGtm_Tom_ToutMap IfxGtm_TOM4_2_TOUT192_P30_2_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 192, {&MODULE_P30, 2}, IfxPort_OutputIdx_alt1};

2356 IfxGtm_Tom_ToutMap IfxGtm_TOM4_2_TOUT224_P24_2_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 224, {&MODULE_P24, 2}, IfxPort_OutputIdx_alt1};

2357 IfxGtm_Tom_ToutMap IfxGtm_TOM4_2_TOUT252_P13_14_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 252, {&MODULE_P13,14}, IfxPort_OutputIdx_alt1};

2358 IfxGtm_Tom_ToutMap IfxGtm_TOM4_3_TOUT165_P01_11_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 165, {&MODULE_P01,11}, IfxPort_OutputIdx_alt1};

2359 IfxGtm_Tom_ToutMap IfxGtm_TOM4_3_TOUT193_P30_3_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 193, {&MODULE_P30, 3}, IfxPort_OutputIdx_alt1};

2360 IfxGtm_Tom_ToutMap IfxGtm_TOM4_3_TOUT225_P24_3_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 225, {&MODULE_P24, 3}, IfxPort_OutputIdx_alt1};

2361 IfxGtm_Tom_ToutMap IfxGtm_TOM4_3_TOUT253_P13_4_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 253, {&MODULE_P13, 4}, IfxPort_OutputIdx_alt1};

2362 IfxGtm_Tom_ToutMap IfxGtm_TOM4_4_TOUT111_P01_3_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_e, 111, {&MODULE_P01, 3}, IfxPort_OutputIdx_alt1};

2363 IfxGtm_Tom_ToutMap IfxGtm_TOM4_4_TOUT158_P01_12_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 158, {&MODULE_P01,12}, IfxPort_OutputIdx_alt1};

2364 IfxGtm_Tom_ToutMap IfxGtm_TOM4_4_TOUT194_P30_4_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 194, {&MODULE_P30, 4}, IfxPort_OutputIdx_alt1};

2365 IfxGtm_Tom_ToutMap IfxGtm_TOM4_4_TOUT226_P24_4_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 226, {&MODULE_P24, 4}, IfxPort_OutputIdx_alt1};

2366 IfxGtm_Tom_ToutMap IfxGtm_TOM4_4_TOUT254_P13_5_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 254, {&MODULE_P13, 5}, IfxPort_OutputIdx_alt1};

2367 IfxGtm_Tom_ToutMap IfxGtm_TOM4_4_TOUT8_P02_8_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_e, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1};

2368 IfxGtm_Tom_ToutMap IfxGtm_TOM4_5_TOUT116_P02_9_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 116, {&MODULE_P02, 9}, IfxPort_OutputIdx_alt1};

2369 IfxGtm_Tom_ToutMap IfxGtm_TOM4_5_TOUT159_P01_1_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 159, {&MODULE_P01, 1}, IfxPort_OutputIdx_alt1};

2370 IfxGtm_Tom_ToutMap IfxGtm_TOM4_5_TOUT195_P30_5_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 195, {&MODULE_P30, 5}, IfxPort_OutputIdx_alt1};

2371 IfxGtm_Tom_ToutMap IfxGtm_TOM4_5_TOUT227_P24_5_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 227, {&MODULE_P24, 5}, IfxPort_OutputIdx_alt1};

2372 IfxGtm_Tom_ToutMap IfxGtm_TOM4_5_TOUT255_P13_6_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 255, {&MODULE_P13, 6}, IfxPort_OutputIdx_alt1};

2373 IfxGtm_Tom_ToutMap IfxGtm_TOM4_6_TOUT117_P02_10_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 117, {&MODULE_P02,10}, IfxPort_OutputIdx_alt1};

2374 IfxGtm_Tom_ToutMap IfxGtm_TOM4_6_TOUT160_P01_9_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 160, {&MODULE_P01, 9}, IfxPort_OutputIdx_alt1};

2375 IfxGtm_Tom_ToutMap IfxGtm_TOM4_6_TOUT196_P30_6_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 196, {&MODULE_P30, 6}, IfxPort_OutputIdx_alt1};

2376 IfxGtm_Tom_ToutMap IfxGtm_TOM4_6_TOUT228_P24_6_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 228, {&MODULE_P24, 6}, IfxPort_OutputIdx_alt1};

2377 IfxGtm_Tom_ToutMap IfxGtm_TOM4_6_TOUT256_P13_7_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 256, {&MODULE_P13, 7}, IfxPort_OutputIdx_alt1};

2378 IfxGtm_Tom_ToutMap IfxGtm_TOM4_7_TOUT118_P02_11_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 118, {&MODULE_P02,11}, IfxPort_OutputIdx_alt1};

2379 IfxGtm_Tom_ToutMap IfxGtm_TOM4_7_TOUT161_P01_13_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 161, {&MODULE_P01,13}, IfxPort_OutputIdx_alt1};

2380 IfxGtm_Tom_ToutMap IfxGtm_TOM4_7_TOUT197_P30_7_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 197, {&MODULE_P30, 7}, IfxPort_OutputIdx_alt1};

2381 IfxGtm_Tom_ToutMap IfxGtm_TOM4_7_TOUT229_P24_7_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 229, {&MODULE_P24, 7}, IfxPort_OutputIdx_alt1};

2382 IfxGtm_Tom_ToutMap IfxGtm_TOM4_7_TOUT264_P13_15_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_h, 264, {&MODULE_P13,15}, IfxPort_OutputIdx_alt1};

2383 IfxGtm_Tom_ToutMap IfxGtm_TOM4_8_TOUT162_P01_8_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_b, 162, {&MODULE_P01, 8}, IfxPort_OutputIdx_alt1};

2384 IfxGtm_Tom_ToutMap IfxGtm_TOM4_8_TOUT198_P30_8_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 198, {&MODULE_P30, 8}, IfxPort_OutputIdx_alt1};

2385 IfxGtm_Tom_ToutMap IfxGtm_TOM4_8_TOUT202_P30_12_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_e, 202, {&MODULE_P30,12}, IfxPort_OutputIdx_alt1};

2386 IfxGtm_Tom_ToutMap IfxGtm_TOM4_8_TOUT230_P24_8_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 230, {&MODULE_P24, 8}, IfxPort_OutputIdx_alt1};

2387 IfxGtm_Tom_ToutMap IfxGtm_TOM4_8_TOUT258_P14_11_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_b, 258, {&MODULE_P14,11}, IfxPort_OutputIdx_alt1};

2388 IfxGtm_Tom_ToutMap IfxGtm_TOM4_9_TOUT163_P01_10_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_b, 163, {&MODULE_P01,10}, IfxPort_OutputIdx_alt1};

2389 IfxGtm_Tom_ToutMap IfxGtm_TOM4_9_TOUT199_P30_9_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 199, {&MODULE_P30, 9}, IfxPort_OutputIdx_alt1};

2390 IfxGtm_Tom_ToutMap IfxGtm_TOM4_9_TOUT203_P30_13_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_e, 203, {&MODULE_P30,13}, IfxPort_OutputIdx_alt1};

2391 IfxGtm_Tom_ToutMap IfxGtm_TOM4_9_TOUT231_P24_9_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 231, {&MODULE_P24, 9}, IfxPort_OutputIdx_alt1};

2392 IfxGtm_Tom_ToutMap IfxGtm_TOM4_9_TOUT259_P14_14_OUT = {IfxGtm_Tom_4, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_b, 259, {&MODULE_P14,14}, IfxPort_OutputIdx_alt1};

2393

2394 #include "IfxGtm_bf.h"

2395

2396 void IfxGtm_PinMap_setTimTin(IfxGtm_Tim_TinMap *config, IfxPort_InputMode inputMode)

2397 {

2398 uint32 shift = config->channel * 4;

2399

2400 __ldmst_c(&(MODULE_GTM.TIMINSEL[config->tim].U), (0xFU << shift), ((uint32)config->select) << shift);

2401

2402 if (inputMode != IfxPort_InputMode_undefined)

2403

2404 { IfxPort_setPinModeInput(config->pin.port, config->pin.pinIndex, inputMode);

2405 }

2406 }

2407

2408 void IfxGtm_PinMap_setAtomTout(IfxGtm_Atom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)

2409 {

2410 uint32 outselReg = (config->toutn >> 3);

2411 uint32 shift = (config->toutn & 0x7U) * 4;

2412 uint32 outsel = (uint32)config->toutSel << shift;

2413 uint32 mask = 0xFU << shift;

2414

2415 __ldmst_c(&(MODULE_GTM.TOUTSEL[outselReg].U), mask, outsel);

2416

2417 IfxPort_setPinModeOutput(config->pin.port, config->pin.pinIndex, outputMode, config->select);

2418 IfxPort_setPinPadDriver(config->pin.port, config->pin.pinIndex, padDriver);

2419 }

2420 void IfxGtm_PinMap_setTomTout(IfxGtm_Tom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)

2421 {

2422 uint32 outselReg = (config->toutn >> 3);

2423 uint32 shift = (config->toutn & 0x7U) * 4;

2424 uint32 outsel = (uint32)config->toutSel << shift;

2425 uint32 mask = 0xFU << shift;

2426

2427 __ldmst_c(&(MODULE_GTM.TOUTSEL[outselReg].U), mask, outsel);

2428

2429 IfxPort_setPinModeOutput(config->pin.port, config->pin.pinIndex, outputMode, config->select);

2430 IfxPort_setPinPadDriver(config->pin.port, config->pin.pinIndex, padDriver);

2431 }

IfxGtm_ATOM5_2N_TOUT124_P11_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT124_P11_8_OUT

Definition: IfxGtm_PinMap.c:663

IfxGtm_TIM2_6_P20_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P20_10_IN

Definition: IfxGtm_PinMap.c:1141

IfxGtm_TIM0_4_P14_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P14_1_IN

Definition: IfxGtm_PinMap.c:969

IfxGtm_ATOM0_4_TOUT14_P00_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT14_P00_5_OUT

Definition: IfxGtm_PinMap.c:114

IfxGtm_TOM3_1N_TOUT116_P02_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_1N_TOUT116_P02_9_OUT

Definition: IfxGtm_PinMap.c:2203

IfxGtm_TIM2_6_P11_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P11_13_IN

Definition: IfxGtm_PinMap.c:1137

IfxGtm_ATOM2_4N_TOUT97_P11_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4N_TOUT97_P11_6_OUT

Definition: IfxGtm_PinMap.c:349

IfxGtm_TIM6_5_P14_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P14_13_IN

Definition: IfxGtm_PinMap.c:1494

IfxGtm_ATOM4_3N_TOUT66_P20_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3N_TOUT66_P20_10_OUT

Definition: IfxGtm_PinMap.c:557

IfxGtm_TIM5_4_P01_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P01_0_IN

Definition: IfxGtm_PinMap.c:1404

IfxGtm_ATOM0_3_TOUT60_P20_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT60_P20_1_OUT

Definition: IfxGtm_PinMap.c:106

IfxGtm_TOM3_6N_TOUT154_P02_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_6N_TOUT154_P02_14_OUT

Definition: IfxGtm_PinMap.c:2275

IfxGtm_TOM3_6N_TOUT267_P10_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_6N_TOUT267_P10_14_OUT

Definition: IfxGtm_PinMap.c:2280

IfxGtm_TIM6_3_P10_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P10_13_IN

Definition: IfxGtm_PinMap.c:1476

IfxGtm_TOM1_14_TOUT36_P32_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT36_P32_0_OUT

Definition: IfxGtm_PinMap.c:1794

IfxGtm_TOM3_2N_TOUT159_P01_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_2N_TOUT159_P01_1_OUT

Definition: IfxGtm_PinMap.c:2221

IfxGtm_TIM4_5_P15_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P15_14_IN

Definition: IfxGtm_PinMap.c:1333

IfxGtm_ATOM5_1N_TOUT128_P12_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT128_P12_0_OUT

Definition: IfxGtm_PinMap.c:643

IfxGtm_TOM3_7N_TOUT208_P25_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_7N_TOUT208_P25_2_OUT

Definition: IfxGtm_PinMap.c:2291

IfxGtm_TIM0_0_P33_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P33_10_IN

Definition: IfxGtm_PinMap.c:932

IfxGtm_ATOM3_2_TOUT112_P01_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT112_P01_4_OUT

Definition: IfxGtm_PinMap.c:432

IfxGtm_ATOM7_0_TOUT149_P34_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_0_TOUT149_P34_4_OUT

Definition: IfxGtm_PinMap.c:822

IfxGtm_ATOM5_1_TOUT131_P22_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT131_P22_5_OUT

Definition: IfxGtm_PinMap.c:654

IfxGtm_TOM1_12_TOUT61_P20_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT61_P20_3_OUT

Definition: IfxGtm_PinMap.c:1786

IfxGtm_TOM2_15_TOUT149_P34_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_15_TOUT149_P34_4_OUT

Definition: IfxGtm_PinMap.c:2029

IfxGtm_TIM1_1_P14_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P14_6_IN

Definition: IfxGtm_PinMap.c:1014

IfxGtm_TOM2_11_TOUT63_P20_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_11_TOUT63_P20_7_OUT

Definition: IfxGtm_PinMap.c:2011

IfxGtm_TOM4_1_TOUT163_P01_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_1_TOUT163_P01_10_OUT

Definition: IfxGtm_PinMap.c:2349

IfxGtm_TOM3_1_TOUT242_P15_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT242_P15_10_OUT

Definition: IfxGtm_PinMap.c:2217

IfxGtm_ATOM6_0_TOUT242_P15_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT242_P15_10_OUT

Definition: IfxGtm_PinMap.c:769

IfxGtm_TIM5_5_P24_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P24_13_IN

Definition: IfxGtm_PinMap.c:1420

IfxGtm_TOM0_4_TOUT81_P14_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT81_P14_1_OUT

Definition: IfxGtm_PinMap.c:1652

IfxGtm_TOM4_15_TOUT205_P30_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_15_TOUT205_P30_15_OUT

Definition: IfxGtm_PinMap.c:2345

IfxGtm_ATOM4_2_TOUT42_P23_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT42_P23_1_OUT

Definition: IfxGtm_PinMap.c:547

IfxGtm_TOM0_8_TOUT94_P13_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT94_P13_3_OUT

Definition: IfxGtm_PinMap.c:1751

IfxGtm_ATOM1_5_TOUT40_P32_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT40_P32_4_OUT

Definition: IfxGtm_PinMap.c:246

IfxGtm_TIM3_2_P32_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P32_0_IN

Definition: IfxGtm_PinMap.c:1194

IfxGtm_ATOM4_1N_TOUT86_P14_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT86_P14_6_OUT

Definition: IfxGtm_PinMap.c:528

IfxGtm_ATOM1_0_TOUT68_P20_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT68_P20_12_OUT

Definition: IfxGtm_PinMap.c:162

IfxGtm_ATOM2_7_TOUT93_P13_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT93_P13_2_OUT

Definition: IfxGtm_PinMap.c:389

IfxGtm_TOM3_11_TOUT221_P25_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_11_TOUT221_P25_15_OUT

Definition: IfxGtm_PinMap.c:2181

IfxGtm_Atom_2

ATOM object 2.

Definition: IfxGtm_cfg.h:247

IfxGtm_ATOM3_2N_TOUT23_P33_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT23_P33_1_OUT

Definition: IfxGtm_PinMap.c:424

IfxGtm_TIM6_5_P24_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P24_5_IN

Definition: IfxGtm_PinMap.c:1496

IfxGtm_TOM1_5_TOUT55_P21_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT55_P21_4_OUT

Definition: IfxGtm_PinMap.c:1906

IfxGtm_ATOM3_3N_TOUT93_P13_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT93_P13_2_OUT

Definition: IfxGtm_PinMap.c:450

IfxGtm_TIM0_2_P02_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P02_2_IN

Definition: IfxGtm_PinMap.c:945

IfxGtm_ATOM4_2N_TOUT110_P10_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2N_TOUT110_P10_8_OUT

Definition: IfxGtm_PinMap.c:538

IfxGtm_ATOM8_2_TOUT252_P13_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_2_TOUT252_P13_14_OUT

Definition: IfxGtm_PinMap.c:889

IfxGtm_TIM6_6_P31_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P31_14_IN

Definition: IfxGtm_PinMap.c:1508

IfxGtm_TIM6_2_P24_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P24_2_IN

Definition: IfxGtm_PinMap.c:1471

IfxGtm_TOM2_2N_TOUT46_P23_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_2N_TOUT46_P23_5_OUT

Definition: IfxGtm_PinMap.c:2054

IfxGtm_ATOM5_5_TOUT159_P01_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT159_P01_1_OUT

Definition: IfxGtm_PinMap.c:729

IfxGtm_TIM5_5_P01_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P01_2_IN

Definition: IfxGtm_PinMap.c:1415

IfxGtm_ATOM4_7_TOUT75_P15_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7_TOUT75_P15_4_OUT

Definition: IfxGtm_PinMap.c:624

IfxGtm_TIM0_3_P22_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P22_2_IN

Definition: IfxGtm_PinMap.c:963

IfxGtm_TOM1_6_TOUT74_P15_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT74_P15_3_OUT

Definition: IfxGtm_PinMap.c:1939

IfxGtm_TIM3_1_P22_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P22_5_IN

Definition: IfxGtm_PinMap.c:1180

IfxGtm_ATOM0_1_TOUT47_P22_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT47_P22_0_OUT

Definition: IfxGtm_PinMap.c:71

IfxGtm_ToutSel_l

Definition: IfxGtm_PinMap.h:96

IfxGtm_TIM6_7_P00_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P00_15_IN

Definition: IfxGtm_PinMap.c:1509

IfxGtm_ATOM4_7_TOUT138_P23_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7_TOUT138_P23_6_OUT

Definition: IfxGtm_PinMap.c:620

IfxGtm_TOM0_13_TOUT99_P11_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT99_P11_10_OUT

Definition: IfxGtm_PinMap.c:1555

IfxGtm_ATOM4_7N_TOUT20_P00_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7N_TOUT20_P00_11_OUT

Definition: IfxGtm_PinMap.c:616

IfxGtm_TOM2_0N_TOUT61_P20_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT61_P20_3_OUT

Definition: IfxGtm_PinMap.c:1989

IfxGtm_TIM3_0_P13_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P13_3_IN

Definition: IfxGtm_PinMap.c:1164

IfxGtm_ATOM0_1_TOUT1_P02_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT1_P02_1_OUT

Definition: IfxGtm_PinMap.c:69

IfxGtm_ATOM4_6_TOUT59_P20_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT59_P20_0_OUT

Definition: IfxGtm_PinMap.c:609

IfxGtm_ATOM0_4_TOUT39_P32_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT39_P32_3_OUT

Definition: IfxGtm_PinMap.c:116

IfxGtm_TIM2_4_P11_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P11_9_IN

Definition: IfxGtm_PinMap.c:1114

IfxGtm_TOM2_1_TOUT47_P22_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_1_TOUT47_P22_0_OUT

Definition: IfxGtm_PinMap.c:2048

IfxGtm_ATOM1_1N_TOUT39_P32_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1N_TOUT39_P32_3_OUT

Definition: IfxGtm_PinMap.c:171

IfxGtm_ATOM1_6_TOUT74_P15_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT74_P15_3_OUT

Definition: IfxGtm_PinMap.c:266

IfxGtm_ATOM4_2N_TOUT45_P23_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2N_TOUT45_P23_4_OUT

Definition: IfxGtm_PinMap.c:539

IfxGtm_TIM5_1_P24_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P24_9_IN

Definition: IfxGtm_PinMap.c:1379

IfxGtm_ATOM3_6N_TOUT88_P14_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6N_TOUT88_P14_8_OUT

Definition: IfxGtm_PinMap.c:491

IfxGtm_ATOM3_1_TOUT64_P20_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT64_P20_8_OUT

Definition: IfxGtm_PinMap.c:418

IfxGtm_TOM3_1_TOUT111_P01_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT111_P01_3_OUT

Definition: IfxGtm_PinMap.c:2210

IfxGtm_Tim_0

TIM object 0.

Definition: IfxGtm_cfg.h:392

IfxGtm_TOM0_2_TOUT55_P21_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT55_P21_4_OUT

Definition: IfxGtm_PinMap.c:1602

IfxGtm_TIM5_3_P30_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P30_11_IN

Definition: IfxGtm_PinMap.c:1400

IfxGtm_TIM3_3_P32_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P32_1_IN

Definition: IfxGtm_PinMap.c:1207

IfxGtm_TIM5_7_P00_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P00_3_IN

Definition: IfxGtm_PinMap.c:1438

IfxGtm_TOM3_5_TOUT115_P01_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_5_TOUT115_P01_7_OUT

Definition: IfxGtm_PinMap.c:2268

IfxGtm_ATOM1_2N_TOUT41_P23_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT41_P23_0_OUT

Definition: IfxGtm_PinMap.c:190

IfxGtm_ATOM0_3_TOUT82_P14_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT82_P14_2_OUT

Definition: IfxGtm_PinMap.c:107

IfxGtm_ATOM5_7_TOUT137_P22_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7_TOUT137_P22_11_OUT

Definition: IfxGtm_PinMap.c:757

IfxGtm_ATOM5_3N_TOUT180_P31_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT180_P31_6_OUT

Definition: IfxGtm_PinMap.c:688

IfxGtm_PinMap_setTimTin

void IfxGtm_PinMap_setTimTin(IfxGtm_Tim_TinMap *config, IfxPort_InputMode inputMode)

Definition: IfxGtm_PinMap.c:2396

IfxGtm_TOM0_4N_TOUT36_P32_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT36_P32_0_OUT

Definition: IfxGtm_PinMap.c:1632

IfxGtm_TIM3_1_P33_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P33_13_IN

Definition: IfxGtm_PinMap.c:1182

IfxGtm_TIM0_1_P33_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P33_5_IN

Definition: IfxGtm_PinMap.c:942

IfxGtm_TIM3_5_P15_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P15_2_IN

Definition: IfxGtm_PinMap.c:1227

IfxGtm_TOM0_7_TOUT101_P11_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT101_P11_12_OUT

Definition: IfxGtm_PinMap.c:1734

IfxGtm_TOM0_5_TOUT128_P12_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT128_P12_0_OUT

Definition: IfxGtm_PinMap.c:1674

IfxGtm_TIM6_0_P01_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P01_12_IN

Definition: IfxGtm_PinMap.c:1448

IfxGtm_ATOM5_6N_TOUT96_P11_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6N_TOUT96_P11_3_OUT

Definition: IfxGtm_PinMap.c:740

IfxGtm_TOM3_2N_TOUT136_P22_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_2N_TOUT136_P22_10_OUT

Definition: IfxGtm_PinMap.c:2220

IfxGtm_TOM2_11_TOUT108_P10_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_11_TOUT108_P10_6_OUT

Definition: IfxGtm_PinMap.c:2008

IfxGtm_ATOM3_4_TOUT51_P21_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT51_P21_0_OUT

Definition: IfxGtm_PinMap.c:469

IfxGtm_ATOM3_0N_TOUT101_P11_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT101_P11_12_OUT

Definition: IfxGtm_PinMap.c:390

IfxGtm_ATOM3_3N_TOUT77_P15_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT77_P15_6_OUT

Definition: IfxGtm_PinMap.c:448

IfxGtm_TIM4_7_P25_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P25_15_IN

Definition: IfxGtm_PinMap.c:1359

IfxGtm_TIM6_3_P20_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P20_9_IN

Definition: IfxGtm_PinMap.c:1478

IfxGtm_ATOM3_2N_TOUT35_P33_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT35_P33_13_OUT

Definition: IfxGtm_PinMap.c:426

IfxGtm_TOM3_0N_TOUT181_P31_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_0N_TOUT181_P31_7_OUT

Definition: IfxGtm_PinMap.c:2161

IfxGtm_TOM0_8_TOUT9_P00_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT9_P00_0_OUT

Definition: IfxGtm_PinMap.c:1753

IfxGtm_TOM0_4_TOUT30_P33_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT30_P33_8_OUT

Definition: IfxGtm_PinMap.c:1645

IfxGtm_TIM0_5_P21_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P21_7_IN

Definition: IfxGtm_PinMap.c:980

IfxGtm_TIM4_2_P11_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P11_4_IN

Definition: IfxGtm_PinMap.c:1293

IfxGtm_ATOM4_5_TOUT45_P23_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT45_P23_4_OUT

Definition: IfxGtm_PinMap.c:594

IfxGtm_ATOM1_7_TOUT45_P23_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT45_P23_4_OUT

Definition: IfxGtm_PinMap.c:278

IfxGtm_TIM6_3_P13_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P13_7_IN

Definition: IfxGtm_PinMap.c:1477

IfxGtm_TIM3_6_P13_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P13_7_IN

Definition: IfxGtm_PinMap.c:1238

IfxGtm_Tom_1

TOM object 1.

Definition: IfxGtm_cfg.h:420

IfxGtm_TOM0_0N_TOUT61_P20_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT61_P20_3_OUT

Definition: IfxGtm_PinMap.c:1522

IfxGtm_ATOM1_6N_TOUT78_P15_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT78_P15_7_OUT

Definition: IfxGtm_PinMap.c:259

IfxGtm_ATOM6_7_TOUT161_P01_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_7_TOUT161_P01_13_OUT

Definition: IfxGtm_PinMap.c:817

IfxGtm_TOM0_0N_TOUT7_P02_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT7_P02_7_OUT

Definition: IfxGtm_PinMap.c:1524

IfxGtm_TIM1_7_P33_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_7_P33_3_IN

Definition: IfxGtm_PinMap.c:1069

IfxGtm_TOM3_12_TOUT218_P25_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_12_TOUT218_P25_12_OUT

Definition: IfxGtm_PinMap.c:2185

IfxGtm_TOM2_11_TOUT261_P14_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_11_TOUT261_P14_12_OUT

Definition: IfxGtm_PinMap.c:2010

IfxGtm_TIM6_1_P24_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P24_1_IN

Definition: IfxGtm_PinMap.c:1462

IfxGtm_ATOM5_5_TOUT140_P32_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT140_P32_5_OUT

Definition: IfxGtm_PinMap.c:728

IfxGtm_TOM3_14_TOUT153_P02_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_14_TOUT153_P02_13_OUT

Definition: IfxGtm_PinMap.c:2194

IfxGtm_TIM3_5_P11_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P11_10_IN

Definition: IfxGtm_PinMap.c:1223

IfxGtm_ATOM3_3N_TOUT115_P01_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT115_P01_7_OUT

Definition: IfxGtm_PinMap.c:440

IfxGtm_TOM2_7N_TOUT96_P11_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT96_P11_3_OUT

Definition: IfxGtm_PinMap.c:2139

IfxGtm_ToutSel_j

Definition: IfxGtm_PinMap.h:94

IfxGtm_TOM1_1N_TOUT245_P15_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT245_P15_13_OUT

Definition: IfxGtm_PinMap.c:1804

IfxGtm_TOM3_5N_TOUT153_P02_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_5N_TOUT153_P02_13_OUT

Definition: IfxGtm_PinMap.c:2262

IfxGtm_ATOM5_2N_TOUT211_P25_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT211_P25_5_OUT

Definition: IfxGtm_PinMap.c:668

IfxGtm_TOM3_6N_TOUT175_P31_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_6N_TOUT175_P31_1_OUT

Definition: IfxGtm_PinMap.c:2277

IfxGtm_TIM4_6_P11_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P11_13_IN

Definition: IfxGtm_PinMap.c:1345

IfxGtm_TOM0_5N_TOUT26_P33_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT26_P33_4_OUT

Definition: IfxGtm_PinMap.c:1660

IfxGtm_TOM4_2_TOUT157_P01_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_2_TOUT157_P01_15_OUT

Definition: IfxGtm_PinMap.c:2353

IfxGtm_ATOM0_4N_TOUT118_P02_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4N_TOUT118_P02_11_OUT

Definition: IfxGtm_PinMap.c:108

IfxGtm_TIM4_7_P24_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P24_7_IN

Definition: IfxGtm_PinMap.c:1358

IfxGtm_ATOM2_7_TOUT63_P20_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT63_P20_7_OUT

Definition: IfxGtm_PinMap.c:388

IfxGtm_ATOM8_0_TOUT162_P01_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_0_TOUT162_P01_8_OUT

Definition: IfxGtm_PinMap.c:876

IfxGtm_TIM3_4_P11_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P11_9_IN

Definition: IfxGtm_PinMap.c:1211

IfxGtm_ATOM7_6_TOUT151_P02_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_6_TOUT151_P02_12_OUT

Definition: IfxGtm_PinMap.c:862

IfxGtm_ATOM0_7N_TOUT150_P34_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7N_TOUT150_P34_5_OUT

Definition: IfxGtm_PinMap.c:149

IfxGtm_ATOM3_2N_TOUT52_P21_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT52_P21_1_OUT

Definition: IfxGtm_PinMap.c:427

IfxGtm_TIM2_0_P33_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P33_12_IN

Definition: IfxGtm_PinMap.c:1079

IfxGtm_TIM5_7_P00_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P00_14_IN

Definition: IfxGtm_PinMap.c:1437

IfxGtm_ATOM1_4_TOUT4_P02_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT4_P02_4_OUT

Definition: IfxGtm_PinMap.c:231

IfxGtm_TOM2_10_TOUT70_P20_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_10_TOUT70_P20_14_OUT

Definition: IfxGtm_PinMap.c:2006

IfxGtm_ATOM4_6_TOUT139_P23_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT139_P23_7_OUT

Definition: IfxGtm_PinMap.c:607

IfxGtm_ATOM3_7N_TOUT89_P14_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7N_TOUT89_P14_9_OUT

Definition: IfxGtm_PinMap.c:503

IfxGtm_TOM3_0_TOUT206_P25_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_0_TOUT206_P25_0_OUT

Definition: IfxGtm_PinMap.c:2170

IfxGtm_ATOM3_2_TOUT96_P11_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT96_P11_3_OUT

Definition: IfxGtm_PinMap.c:438

IfxGtm_ATOM4_1_TOUT84_P14_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT84_P14_4_OUT

Definition: IfxGtm_PinMap.c:536

IfxGtm_ATOM6_5_TOUT255_P13_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_5_TOUT255_P13_6_OUT

Definition: IfxGtm_PinMap.c:808

IfxGtm_TIM1_5_P20_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P20_7_IN

Definition: IfxGtm_PinMap.c:1052

IfxGtm_TIM0_7_P02_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P02_7_IN

Definition: IfxGtm_PinMap.c:994

IfxGtm_ATOM1_7_TOUT67_P20_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT67_P20_11_OUT

Definition: IfxGtm_PinMap.c:279

IfxGtm_ATOM5_2N_TOUT259_P14_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT259_P14_14_OUT

Definition: IfxGtm_PinMap.c:671

IfxGtm_TIM1_3_P22_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P22_2_IN

Definition: IfxGtm_PinMap.c:1036

IfxGtm_TIM2_0_P20_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P20_12_IN

Definition: IfxGtm_PinMap.c:1077

IfxGtm_TIM5_7_P31_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P31_15_IN

Definition: IfxGtm_PinMap.c:1445

IfxGtm_TIM5_5_P31_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P31_13_IN

Definition: IfxGtm_PinMap.c:1422

IfxGtm_TOM4_14_TOUT232_P24_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_14_TOUT232_P24_10_OUT

Definition: IfxGtm_PinMap.c:2340

IfxGtm_ATOM0_7_TOUT17_P00_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT17_P00_8_OUT

Definition: IfxGtm_PinMap.c:152

IfxGtm_TOM1_6N_TOUT11_P00_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT11_P00_2_OUT

Definition: IfxGtm_PinMap.c:1913

IfxGtm_ATOM1_7N_TOUT28_P33_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT28_P33_6_OUT

Definition: IfxGtm_PinMap.c:273

IfxGtm_TOM2_1N_TOUT50_P22_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT50_P22_3_OUT

Definition: IfxGtm_PinMap.c:2037

IfxGtm_TOM4_13_TOUT235_P24_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_13_TOUT235_P24_13_OUT

Definition: IfxGtm_PinMap.c:2335

IfxGtm_ATOM1_3N_TOUT6_P02_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3N_TOUT6_P02_6_OUT

Definition: IfxGtm_PinMap.c:206

IfxGtm_TOM2_8_TOUT51_P21_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_8_TOUT51_P21_0_OUT

Definition: IfxGtm_PinMap.c:2152

IfxGtm_ATOM8_7_TOUT237_P24_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_7_TOUT237_P24_15_OUT

Definition: IfxGtm_PinMap.c:917

IfxGtm_Clk_Out

GTM Clock Output.

Definition: IfxGtm_PinMap.h:135

IfxGtm_TOM2_7N_TOUT252_P13_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT252_P13_14_OUT

Definition: IfxGtm_PinMap.c:2136

IfxGtm_TOM0_6_TOUT68_P20_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT68_P20_12_OUT

Definition: IfxGtm_PinMap.c:1712

IfxGtm_TOM4_8_TOUT258_P14_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_8_TOUT258_P14_11_OUT

Definition: IfxGtm_PinMap.c:2387

IfxGtm_ATOM6_2_TOUT252_P13_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT252_P13_14_OUT

Definition: IfxGtm_PinMap.c:785

IfxGtm_ATOM6_5_TOUT262_P13_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_5_TOUT262_P13_13_OUT

Definition: IfxGtm_PinMap.c:809

IfxGtm_TIM2_7_P31_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P31_7_IN

Definition: IfxGtm_PinMap.c:1155

IfxGtm_TOM4_13_TOUT203_P30_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_13_TOUT203_P30_13_OUT

Definition: IfxGtm_PinMap.c:2333

IfxGtm_TOM2_6N_TOUT251_P13_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT251_P13_10_OUT

Definition: IfxGtm_PinMap.c:2121

IfxGtm_ATOM1_3_TOUT3_P02_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT3_P02_3_OUT

Definition: IfxGtm_PinMap.c:213

IfxGtm_Atom_ToutMap::toutn

uint32 toutn

TOUT number.

Definition: IfxGtm_PinMap.h:115

IfxGtm_TOM2_4_TOUT57_P21_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT57_P21_6_OUT

Definition: IfxGtm_PinMap.c:2099

IfxGtm_TIM4_5_P20_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P20_3_IN

Definition: IfxGtm_PinMap.c:1334

IfxGtm_TIM2_3_P00_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P00_4_IN

Definition: IfxGtm_PinMap.c:1101

IfxGtm_TIM3_0_P02_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P02_8_IN

Definition: IfxGtm_PinMap.c:1160

IfxGtm_TOM0_7_TOUT50_P22_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT50_P22_3_OUT

Definition: IfxGtm_PinMap.c:1740

IfxGtm_ATOM6_1_TOUT164_P01_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT164_P01_14_OUT

Definition: IfxGtm_PinMap.c:774

IfxGtm_TOM0_7N_TOUT84_P14_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT84_P14_4_OUT

Definition: IfxGtm_PinMap.c:1731

IfxGtm_TIM4_1_P00_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P00_15_IN

Definition: IfxGtm_PinMap.c:1275

IfxGtm_ATOM7_5_TOUT251_P13_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_5_TOUT251_P13_10_OUT

Definition: IfxGtm_PinMap.c:860

IfxGtm_TOM0_6N_TOUT69_P20_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT69_P20_13_OUT

Definition: IfxGtm_PinMap.c:1696

IfxGtm_TOM3_8_TOUT182_P31_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_8_TOUT182_P31_8_OUT

Definition: IfxGtm_PinMap.c:2301

IfxGtm_TOM2_7N_TOUT88_P14_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT88_P14_8_OUT

Definition: IfxGtm_PinMap.c:2138

IfxGtm_TOM2_1_TOUT64_P20_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_1_TOUT64_P20_8_OUT

Definition: IfxGtm_PinMap.c:2050

IfxGtm_TOM3_6N_TOUT156_P01_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_6N_TOUT156_P01_2_OUT

Definition: IfxGtm_PinMap.c:2276

IfxGtm_TOM2_10_TOUT260_P14_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_10_TOUT260_P14_13_OUT

Definition: IfxGtm_PinMap.c:2004

IfxGtm_TOM1_4N_TOUT73_P15_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT73_P15_2_OUT

Definition: IfxGtm_PinMap.c:1866

IfxGtm_TIM4_4_P10_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P10_13_IN

Definition: IfxGtm_PinMap.c:1316

IfxGtm_TIM6_6_P25_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P25_6_IN

Definition: IfxGtm_PinMap.c:1505

IfxGtm_TIM0_4_P10_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P10_13_IN

Definition: IfxGtm_PinMap.c:968

IfxGtm_TIM6_5_P30_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P30_13_IN

Definition: IfxGtm_PinMap.c:1498

IfxGtm_TIM1_4_P02_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P02_4_IN

Definition: IfxGtm_PinMap.c:1040

IfxGtm_ATOM6_4_TOUT158_P01_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT158_P01_12_OUT

Definition: IfxGtm_PinMap.c:797

IfxGtm_TOM2_10_TOUT107_P10_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_10_TOUT107_P10_5_OUT

Definition: IfxGtm_PinMap.c:2002

IfxGtm_ATOM5_5N_TOUT119_P11_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5N_TOUT119_P11_0_OUT

Definition: IfxGtm_PinMap.c:721

IfxGtm_TIM1_5_P32_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P32_4_IN

Definition: IfxGtm_PinMap.c:1055

IfxGtm_TOM0_5_TOUT23_P33_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT23_P33_1_OUT

Definition: IfxGtm_PinMap.c:1675

IfxGtm_ATOM5_0N_TOUT150_P34_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT150_P34_5_OUT

Definition: IfxGtm_PinMap.c:627

IfxGtm_TOM2_3_TOUT97_P11_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT97_P11_6_OUT

Definition: IfxGtm_PinMap.c:2083

IfxGtm_TIM4_1_P25_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P25_9_IN

Definition: IfxGtm_PinMap.c:1284

IfxGtm_ATOM3_0_TOUT18_P00_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT18_P00_9_OUT

Definition: IfxGtm_PinMap.c:398

IfxGtm_ATOM4_2N_TOUT73_P15_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2N_TOUT73_P15_2_OUT

Definition: IfxGtm_PinMap.c:543

IfxGtm_TOM2_4_TOUT90_P14_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT90_P14_10_OUT

Definition: IfxGtm_PinMap.c:2101

IfxGtm_ATOM3_5N_TOUT26_P33_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5N_TOUT26_P33_4_OUT

Definition: IfxGtm_PinMap.c:475

IfxGtm_TOM0_7_TOUT93_P13_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT93_P13_2_OUT

Definition: IfxGtm_PinMap.c:1746

IfxGtm_TIM5_1_P13_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P13_10_IN

Definition: IfxGtm_PinMap.c:1376

IfxGtm_TIM5_7_P01_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P01_11_IN

Definition: IfxGtm_PinMap.c:1439

IfxGtm_ATOM8_3_TOUT260_P14_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_3_TOUT260_P14_13_OUT

Definition: IfxGtm_PinMap.c:895

IfxGtm_TIM1_5_P02_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P02_5_IN

Definition: IfxGtm_PinMap.c:1049

IfxGtm_TOM1_7_TOUT25_P33_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT25_P33_3_OUT

Definition: IfxGtm_PinMap.c:1964

IfxGtm_TOM0_12_TOUT98_P11_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT98_P11_9_OUT

Definition: IfxGtm_PinMap.c:1552

IfxGtm_ATOM6_5_TOUT219_P25_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_5_TOUT219_P25_13_OUT

Definition: IfxGtm_PinMap.c:806

IfxGtm_TIM3_6_P22_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P22_10_IN

Definition: IfxGtm_PinMap.c:1243

IfxGtm_ATOM2_1_TOUT27_P33_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT27_P33_5_OUT

Definition: IfxGtm_PinMap.c:306

IfxGtm_TOM3_9_TOUT187_P31_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_9_TOUT187_P31_13_OUT

Definition: IfxGtm_PinMap.c:2308

IfxGtm_TOM2_4N_TOUT120_P11_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT120_P11_1_OUT

Definition: IfxGtm_PinMap.c:2085

IfxGtm_TOM1_5_TOUT74_P15_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT74_P15_3_OUT

Definition: IfxGtm_PinMap.c:1909

IfxGtm_ATOM3_1N_TOUT30_P33_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT30_P33_8_OUT

Definition: IfxGtm_PinMap.c:406

IfxGtm_ATOM6_2_TOUT129_P12_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT129_P12_1_OUT

Definition: IfxGtm_PinMap.c:779

IfxGtm_TIM3_6_P15_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P15_3_IN

Definition: IfxGtm_PinMap.c:1240

IfxGtm_ATOM0_5N_TOUT9_P00_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5N_TOUT9_P00_0_OUT

Definition: IfxGtm_PinMap.c:127

IfxGtm_TOM1_1_TOUT19_P00_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT19_P00_10_OUT

Definition: IfxGtm_PinMap.c:1813

IfxGtm_TIM3_0_P25_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P25_0_IN

Definition: IfxGtm_PinMap.c:1168

IfxGtm_TOM0_7N_TOUT28_P33_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT28_P33_6_OUT

Definition: IfxGtm_PinMap.c:1722

IfxGtm_TOM3_6_TOUT160_P01_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_6_TOUT160_P01_9_OUT

Definition: IfxGtm_PinMap.c:2282

IfxGtm_TOM1_4_TOUT124_P11_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT124_P11_8_OUT

Definition: IfxGtm_PinMap.c:1870

IfxGtm_ATOM5_2N_TOUT246_P15_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT246_P15_14_OUT

Definition: IfxGtm_PinMap.c:669

IfxGtm_ATOM1_0_TOUT8_P02_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT8_P02_8_OUT

Definition: IfxGtm_PinMap.c:166

IfxGtm_TOM3_2N_TOUT246_P15_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_2N_TOUT246_P15_14_OUT

Definition: IfxGtm_PinMap.c:2224

IfxGtm_TOM1_5_TOUT11_P00_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT11_P00_2_OUT

Definition: IfxGtm_PinMap.c:1898

IfxGtm_TIM2_7_P13_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P13_9_IN

Definition: IfxGtm_PinMap.c:1151

IfxGtm_TIM3_3_P00_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P00_4_IN

Definition: IfxGtm_PinMap.c:1196

IfxGtm_TIM5_6_P32_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P32_6_IN

Definition: IfxGtm_PinMap.c:1435

IfxGtm_TOM3_10_TOUT188_P31_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_10_TOUT188_P31_14_OUT

Definition: IfxGtm_PinMap.c:2173

IfxGtm_TOM0_1N_TOUT35_P33_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT35_P33_13_OUT

Definition: IfxGtm_PinMap.c:1568

IfxGtm_ATOM5_6_TOUT247_P15_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT247_P15_15_OUT

Definition: IfxGtm_PinMap.c:748

IfxGtm_ATOM0_7N_TOUT28_P33_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7N_TOUT28_P33_6_OUT

Definition: IfxGtm_PinMap.c:150

IfxGtm_TOM0_0N_TOUT34_P33_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT34_P33_12_OUT

Definition: IfxGtm_PinMap.c:1520

IfxGtm_TOM2_12_TOUT72_P15_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_12_TOUT72_P15_1_OUT

Definition: IfxGtm_PinMap.c:2017

IfxGtm_TIM1_1_P33_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P33_9_IN

Definition: IfxGtm_PinMap.c:1019

IfxGtm_ATOM0_1_TOUT11_P00_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT11_P00_2_OUT

Definition: IfxGtm_PinMap.c:68

IfxGtm_TOM3_2_TOUT243_P15_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT243_P15_11_OUT

Definition: IfxGtm_PinMap.c:2232

IfxGtm_TOM2_6N_TOUT135_P22_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT135_P22_9_OUT

Definition: IfxGtm_PinMap.c:2120

IfxGtm_ATOM3_3N_TOUT36_P32_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT36_P32_0_OUT

Definition: IfxGtm_PinMap.c:446

IfxGtm_ATOM2_3N_TOUT36_P32_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT36_P32_0_OUT

Definition: IfxGtm_PinMap.c:337

IfxGtm_TOM1_5N_TOUT144_P33_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT144_P33_15_OUT

Definition: IfxGtm_PinMap.c:1884

IfxGtm_TOM1_4_TOUT30_P33_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT30_P33_8_OUT

Definition: IfxGtm_PinMap.c:1874

IfxGtm_TIM5_5_P30_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P30_13_IN

Definition: IfxGtm_PinMap.c:1421

IfxGtm_ATOM0_6_TOUT59_P20_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT59_P20_0_OUT

Definition: IfxGtm_PinMap.c:145

IfxGtm_TOM4_14_TOUT204_P30_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_14_TOUT204_P30_14_OUT

Definition: IfxGtm_PinMap.c:2339

IfxGtm_TIM4_3_P15_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P15_12_IN

Definition: IfxGtm_PinMap.c:1307

IfxGtm_ATOM8_5_TOUT243_P15_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_5_TOUT243_P15_11_OUT

Definition: IfxGtm_PinMap.c:904

IfxGtm_TOM2_2_TOUT121_P11_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT121_P11_4_OUT

Definition: IfxGtm_PinMap.c:2059

IfxGtm_ATOM0_5N_TOUT8_P02_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5N_TOUT8_P02_8_OUT

Definition: IfxGtm_PinMap.c:126

IfxGtm_TIM2_3_P11_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P11_6_IN

Definition: IfxGtm_PinMap.c:1104

IfxGtm_TIM2_5_P11_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P11_8_IN

Definition: IfxGtm_PinMap.c:1126

IfxGtm_TOM3_3N_TOUT270_P10_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT270_P10_15_OUT

Definition: IfxGtm_PinMap.c:2241

IfxGtm_TOM1_8_TOUT141_P32_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT141_P32_6_OUT

Definition: IfxGtm_PinMap.c:1978

IfxGtm_TOM0_5N_TOUT97_P11_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT97_P11_6_OUT

Definition: IfxGtm_PinMap.c:1671

IfxGtm_TOM0_2_TOUT20_P00_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT20_P00_11_OUT

Definition: IfxGtm_PinMap.c:1598

IfxGtm_TIM6_7_P30_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P30_15_IN

Definition: IfxGtm_PinMap.c:1515

IfxGtm_TOM3_13_TOUT168_P00_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_13_TOUT168_P00_15_OUT

Definition: IfxGtm_PinMap.c:2188

IfxGtm_TIM6_7_P25_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P25_7_IN

Definition: IfxGtm_PinMap.c:1514

IfxGtm_TOM2_15_TOUT37_P32_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_15_TOUT37_P32_1_OUT

Definition: IfxGtm_PinMap.c:2030

IfxGtm_ATOM2_0_TOUT26_P33_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT26_P33_4_OUT

Definition: IfxGtm_PinMap.c:291

IfxGtm_ATOM6_3_TOUT185_P31_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT185_P31_11_OUT

Definition: IfxGtm_PinMap.c:791

IfxGtm_ATOM3_0N_TOUT144_P33_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT144_P33_15_OUT

Definition: IfxGtm_PinMap.c:391

IfxGtm_TIM4_6_P24_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P24_6_IN

Definition: IfxGtm_PinMap.c:1347

IfxGtm_ATOM6_3_TOUT144_P33_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT144_P33_15_OUT

Definition: IfxGtm_PinMap.c:788

IfxGtm_TOM2_5_TOUT124_P11_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_5_TOUT124_P11_8_OUT

Definition: IfxGtm_PinMap.c:2111

IfxGtm_ATOM2_3_TOUT29_P33_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT29_P33_7_OUT

Definition: IfxGtm_PinMap.c:343

IfxGtm_ATOM2_3N_TOUT143_P33_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT143_P33_14_OUT

Definition: IfxGtm_PinMap.c:333

IfxGtm_TIM2_5_P20_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P20_9_IN

Definition: IfxGtm_PinMap.c:1130

IfxGtm_TOM1_4N_TOUT65_P20_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT65_P20_9_OUT

Definition: IfxGtm_PinMap.c:1864

IfxGtm_ATOM5_5_TOUT211_P25_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT211_P25_5_OUT

Definition: IfxGtm_PinMap.c:731

IfxGtm_TOM0_3_TOUT21_P00_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT21_P00_12_OUT

Definition: IfxGtm_PinMap.c:1619

IfxGtm_TIM0_3_P10_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P10_3_IN

Definition: IfxGtm_PinMap.c:959

IfxGtm_TIM2_0_P33_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P33_14_IN

Definition: IfxGtm_PinMap.c:1080

IfxGtm_TIM5_7_P13_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P13_15_IN

Definition: IfxGtm_PinMap.c:1441

IfxGtm_ATOM0_3N_TOUT16_P00_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT16_P00_7_OUT

Definition: IfxGtm_PinMap.c:93

IfxGtm_ATOM0_1N_TOUT113_P01_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT113_P01_5_OUT

Definition: IfxGtm_PinMap.c:56

IfxGtm_TOM0_7N_TOUT33_P33_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT33_P33_11_OUT

Definition: IfxGtm_PinMap.c:1724

IfxGtm_TOM2_15_TOUT67_P20_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_15_TOUT67_P20_11_OUT

Definition: IfxGtm_PinMap.c:2031

IfxGtm_TIM2_0_P11_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P11_0_IN

Definition: IfxGtm_PinMap.c:1073

IfxGtm_TOM0_2N_TOUT108_P10_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT108_P10_6_OUT

Definition: IfxGtm_PinMap.c:1585

IfxGtm_TOM1_15_TOUT7_P02_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT7_P02_7_OUT

Definition: IfxGtm_PinMap.c:1801

IfxGtm_ATOM2_5N_TOUT26_P33_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5N_TOUT26_P33_4_OUT

Definition: IfxGtm_PinMap.c:358

IfxGtm_ATOM0_3N_TOUT6_P02_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT6_P02_6_OUT

Definition: IfxGtm_PinMap.c:99

IfxGtm_TIM5_5_P21_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P21_3_IN

Definition: IfxGtm_PinMap.c:1419

IfxGtm_ATOM3_1_TOUT90_P14_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT90_P14_10_OUT

Definition: IfxGtm_PinMap.c:419

IfxGtm_TIM4_1_P00_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P00_10_IN

Definition: IfxGtm_PinMap.c:1274

IfxGtm_TOM3_4N_TOUT177_P31_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_4N_TOUT177_P31_3_OUT

Definition: IfxGtm_PinMap.c:2251

IfxGtm_ATOM2_3N_TOUT92_P13_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT92_P13_1_OUT

Definition: IfxGtm_PinMap.c:339

IfxGtm_ATOM1_5N_TOUT132_P22_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT132_P22_6_OUT

Definition: IfxGtm_PinMap.c:236

IfxGtm_TIM5_7_P34_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P34_5_IN

Definition: IfxGtm_PinMap.c:1447

IfxGtm_TOM0_11_TOUT3_P02_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT3_P02_3_OUT

Definition: IfxGtm_PinMap.c:1544

IfxGtm_ATOM0_1_TOUT116_P02_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT116_P02_9_OUT

Definition: IfxGtm_PinMap.c:67

IfxGtm_TIM2_7_P11_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P11_12_IN

Definition: IfxGtm_PinMap.c:1148

IfxGtm_TOM0_1N_TOUT92_P13_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT92_P13_1_OUT

Definition: IfxGtm_PinMap.c:1575

IfxGtm_TOM1_4_TOUT14_P00_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT14_P00_5_OUT

Definition: IfxGtm_PinMap.c:1871

IfxGtm_ATOM1_3_TOUT38_P32_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT38_P32_2_OUT

Definition: IfxGtm_PinMap.c:212

IfxGtm_TOM1_8_TOUT249_P13_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT249_P13_12_OUT

Definition: IfxGtm_PinMap.c:1979

IfxGtm_TOM1_0_TOUT8_P02_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT8_P02_8_OUT

Definition: IfxGtm_PinMap.c:1772

IfxGtm_TOM1_1N_TOUT30_P33_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT30_P33_8_OUT

Definition: IfxGtm_PinMap.c:1805

IfxGtm_ATOM2_7N_TOUT89_P14_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7N_TOUT89_P14_9_OUT

Definition: IfxGtm_PinMap.c:382

IfxGtm_TOM0_7N_TOUT16_P00_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT16_P00_7_OUT

Definition: IfxGtm_PinMap.c:1721

IfxGtm_TIM6_4_P25_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P25_4_IN

Definition: IfxGtm_PinMap.c:1489

IfxGtm_ATOM4_6_TOUT106_P10_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT106_P10_4_OUT

Definition: IfxGtm_PinMap.c:604

IfxGtm_TOM3_1N_TOUT245_P15_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_1N_TOUT245_P15_13_OUT

Definition: IfxGtm_PinMap.c:2208

IfxGtm_TOM3_10_TOUT220_P25_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_10_TOUT220_P25_14_OUT

Definition: IfxGtm_PinMap.c:2175

IfxGtm_ATOM4_1_TOUT47_P22_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT47_P22_0_OUT

Definition: IfxGtm_PinMap.c:531

IfxGtm_ATOM7_2_TOUT224_P24_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_2_TOUT224_P24_2_OUT

Definition: IfxGtm_PinMap.c:838

IfxGtm_TOM1_7_TOUT6_P02_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT6_P02_6_OUT

Definition: IfxGtm_PinMap.c:1970

IfxGtm_TOM1_5N_TOUT26_P33_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT26_P33_4_OUT

Definition: IfxGtm_PinMap.c:1887

IfxGtm_TIM5_4_P30_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P30_12_IN

Definition: IfxGtm_PinMap.c:1410

IfxGtm_TOM0_15_TOUT17_P00_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT17_P00_8_OUT

Definition: IfxGtm_PinMap.c:1560

IfxGtm_TIM4_5_P01_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P01_2_IN

Definition: IfxGtm_PinMap.c:1328

IfxGtm_TIM2_7_P01_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P01_7_IN

Definition: IfxGtm_PinMap.c:1147

IfxGtm_ATOM1_7N_TOUT134_P22_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT134_P22_8_OUT

Definition: IfxGtm_PinMap.c:271

IfxGtm_ATOM3_5N_TOUT136_P22_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5N_TOUT136_P22_10_OUT

Definition: IfxGtm_PinMap.c:473

IfxGtm_TOM3_3N_TOUT160_P01_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT160_P01_9_OUT

Definition: IfxGtm_PinMap.c:2236

IfxGtm_TOM0_7N_TOUT7_P02_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT7_P02_7_OUT

Definition: IfxGtm_PinMap.c:1730

IfxGtm_ATOM2_1_TOUT95_P11_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT95_P11_2_OUT

Definition: IfxGtm_PinMap.c:309

IfxGtm_Tim_Ch_0

TIM channel 0.

Definition: IfxGtm_cfg.h:405

IfxGtm_ATOM8_1_TOUT199_P30_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_1_TOUT199_P30_9_OUT

Definition: IfxGtm_PinMap.c:882

IfxGtm_ATOM4_3N_TOUT106_P10_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3N_TOUT106_P10_4_OUT

Definition: IfxGtm_PinMap.c:553

IfxGtm_Atom_Ch_0

ATOM channel 0.

Definition: IfxGtm_cfg.h:261

IfxGtm_TIM3_1_P12_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P12_1_IN

Definition: IfxGtm_PinMap.c:1176

IfxGtm_ATOM5_0N_TOUT126_P11_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT126_P11_14_OUT

Definition: IfxGtm_PinMap.c:625

IfxGtm_ATOM8_4_TOUT202_P30_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_4_TOUT202_P30_12_OUT

Definition: IfxGtm_PinMap.c:897

IfxGtm_TOM3_1_TOUT163_P01_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT163_P01_10_OUT

Definition: IfxGtm_PinMap.c:2214

IfxGtm_TOM1_6N_TOUT49_P22_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT49_P22_2_OUT

Definition: IfxGtm_PinMap.c:1923

IfxGtm_ATOM5_2_TOUT152_P02_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT152_P02_15_OUT

Definition: IfxGtm_PinMap.c:676

IfxGtm_ATOM3_1_TOUT128_P12_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT128_P12_0_OUT

Definition: IfxGtm_PinMap.c:414

IfxGtm_TOM4_8_TOUT198_P30_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_8_TOUT198_P30_8_OUT

Definition: IfxGtm_PinMap.c:2384

IfxGtm_TIM1_2_P33_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P33_6_IN

Definition: IfxGtm_PinMap.c:1029

IfxGtm_TOM0_1N_TOUT10_P00_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT10_P00_1_OUT

Definition: IfxGtm_PinMap.c:1564

IfxGtm_TOM2_2_TOUT50_P22_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT50_P22_3_OUT

Definition: IfxGtm_PinMap.c:2063

IfxGtm_ATOM7_3_TOUT244_P15_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_3_TOUT244_P15_12_OUT

Definition: IfxGtm_PinMap.c:846

IfxGtm_ATOM2_1N_TOUT91_P13_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT91_P13_0_OUT

Definition: IfxGtm_PinMap.c:301

IfxGtm_ATOM3_4_TOUT114_P01_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT114_P01_6_OUT

Definition: IfxGtm_PinMap.c:463

IfxGtm_ATOM2_6_TOUT62_P20_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT62_P20_6_OUT

Definition: IfxGtm_PinMap.c:378

IfxGtm_TOM4_6_TOUT160_P01_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_6_TOUT160_P01_9_OUT

Definition: IfxGtm_PinMap.c:2374

IfxGtm_TIM3_7_P11_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P11_12_IN

Definition: IfxGtm_PinMap.c:1250

IfxGtm_TOM0_7_TOUT31_P33_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT31_P33_9_OUT

Definition: IfxGtm_PinMap.c:1738

IfxGtm_ATOM2_0N_TOUT12_P00_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0N_TOUT12_P00_3_OUT

Definition: IfxGtm_PinMap.c:284

IfxGtm_TOM4_11_TOUT233_P24_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_11_TOUT233_P24_11_OUT

Definition: IfxGtm_PinMap.c:2325

IfxGtm_ATOM4_3_TOUT49_P22_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3_TOUT49_P22_2_OUT

Definition: IfxGtm_PinMap.c:563

IfxGtm_TOM3_2_TOUT112_P01_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT112_P01_4_OUT

Definition: IfxGtm_PinMap.c:2226

IfxGtm_TIM3_5_P00_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P00_6_IN

Definition: IfxGtm_PinMap.c:1221

IfxGtm_ATOM6_4_TOUT254_P13_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT254_P13_5_OUT

Definition: IfxGtm_PinMap.c:800

IfxGtm_TOM1_6_TOUT43_P23_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT43_P23_2_OUT

Definition: IfxGtm_PinMap.c:1935

IfxGtm_TIM4_3_P02_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P02_10_IN

Definition: IfxGtm_PinMap.c:1302

IfxGtm_TOM3_2_TOUT266_P10_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT266_P10_10_OUT

Definition: IfxGtm_PinMap.c:2233

IfxGtm_TOM4_0_TOUT190_P30_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_0_TOUT190_P30_0_OUT

Definition: IfxGtm_PinMap.c:2314

IfxGtm_TOM1_6N_TOUT91_P13_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT91_P13_0_OUT

Definition: IfxGtm_PinMap.c:1928

IfxGtm_TIM4_6_P30_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P30_6_IN

Definition: IfxGtm_PinMap.c:1349

IfxGtm_TOM2_1N_TOUT52_P21_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT52_P21_1_OUT

Definition: IfxGtm_PinMap.c:2038

IfxGtm_TOM4_2_TOUT164_P01_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_2_TOUT164_P01_14_OUT

Definition: IfxGtm_PinMap.c:2354

IfxGtm_TIM1_2_P21_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P21_4_IN

Definition: IfxGtm_PinMap.c:1025

IfxGtm_ATOM1_4_TOUT146_P34_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT146_P34_1_OUT

Definition: IfxGtm_PinMap.c:227

IfxGtm_TOM2_9_TOUT103_P10_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_9_TOUT103_P10_1_OUT

Definition: IfxGtm_PinMap.c:2154

IfxGtm_ATOM5_0_TOUT162_P01_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT162_P01_8_OUT

Definition: IfxGtm_PinMap.c:637

IfxGtm_TOM2_4N_TOUT126_P11_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT126_P11_14_OUT

Definition: IfxGtm_PinMap.c:2087

IfxGtm_ATOM4_2N_TOUT52_P21_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2N_TOUT52_P21_1_OUT

Definition: IfxGtm_PinMap.c:540

IfxGtm_ATOM4_3N_TOUT46_P23_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3N_TOUT46_P23_5_OUT

Definition: IfxGtm_PinMap.c:554

IfxGtm_TOM1_3_TOUT38_P32_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT38_P32_2_OUT

Definition: IfxGtm_PinMap.c:1850

IfxGtm_ATOM0_2N_TOUT56_P21_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT56_P21_5_OUT

Definition: IfxGtm_PinMap.c:80

IfxGtm_TOM2_5_TOUT255_P13_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_5_TOUT255_P13_6_OUT

Definition: IfxGtm_PinMap.c:2113

IfxGtm_TOM2_0N_TOUT43_P23_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT43_P23_2_OUT

Definition: IfxGtm_PinMap.c:1987

IfxGtm_ATOM5_4_TOUT134_P22_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT134_P22_8_OUT

Definition: IfxGtm_PinMap.c:713

IfxGtm_TOM3_3_TOUT133_P22_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_3_TOUT133_P22_7_OUT

Definition: IfxGtm_PinMap.c:2243

IfxGtm_TIM2_0_P01_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P01_3_IN

Definition: IfxGtm_PinMap.c:1071

IfxGtm_ATOM0_4N_TOUT147_P34_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4N_TOUT147_P34_2_OUT

Definition: IfxGtm_PinMap.c:111

IfxGtm_ATOM8_2_TOUT164_P01_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_2_TOUT164_P01_14_OUT

Definition: IfxGtm_PinMap.c:886

IfxGtm_TIM0_3_P21_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P21_5_IN

Definition: IfxGtm_PinMap.c:962

IfxGtm_TIM1_2_P10_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P10_5_IN

Definition: IfxGtm_PinMap.c:1023

IfxGtm_TIM2_2_P31_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P31_2_IN

Definition: IfxGtm_PinMap.c:1099

IfxGtm_PinMap_setTomTout

void IfxGtm_PinMap_setTomTout(IfxGtm_Tom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)

Definition: IfxGtm_PinMap.c:2420

IfxGtm_TIM3_1_P25_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P25_1_IN

Definition: IfxGtm_PinMap.c:1181

IfxGtm_ATOM5_7_TOUT213_P25_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7_TOUT213_P25_7_OUT

Definition: IfxGtm_PinMap.c:761

IfxGtm_ATOM5_4N_TOUT129_P12_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4N_TOUT129_P12_1_OUT

Definition: IfxGtm_PinMap.c:706

IfxGtm_ATOM4_0_TOUT76_P15_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT76_P15_5_OUT

Definition: IfxGtm_PinMap.c:517

IfxGtm_TIM1_3_P33_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P33_7_IN

Definition: IfxGtm_PinMap.c:1039

IfxGtm_ATOM0_2_TOUT46_P23_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT46_P23_5_OUT

Definition: IfxGtm_PinMap.c:89

IfxGtm_TOM0_4N_TOUT143_P33_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT143_P33_14_OUT

Definition: IfxGtm_PinMap.c:1628

IfxGtm_ATOM1_2N_TOUT15_P00_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT15_P00_6_OUT

Definition: IfxGtm_PinMap.c:187

IfxGtm_TOM3_7_TOUT181_P31_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_7_TOUT181_P31_7_OUT

Definition: IfxGtm_PinMap.c:2296

IfxGtm_TOM2_11_TOUT105_P10_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_11_TOUT105_P10_3_OUT

Definition: IfxGtm_PinMap.c:2007

IfxGtm_TIM3_3_P25_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P25_3_IN

Definition: IfxGtm_PinMap.c:1206

IfxGtm_TIM0_7_P11_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P11_15_IN

Definition: IfxGtm_PinMap.c:995

IfxGtm_TIM0_0_P00_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P00_9_IN

Definition: IfxGtm_PinMap.c:923

IfxGtm_TIM6_5_P23_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P23_2_IN

Definition: IfxGtm_PinMap.c:1495

IfxGtm_TOM4_5_TOUT116_P02_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_5_TOUT116_P02_9_OUT

Definition: IfxGtm_PinMap.c:2368

IfxGtm_TIM6_2_P25_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P25_2_IN

Definition: IfxGtm_PinMap.c:1472

IfxGtm_ATOM7_5_TOUT269_P10_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_5_TOUT269_P10_11_OUT

Definition: IfxGtm_PinMap.c:861

IfxGtm_TOM2_4N_TOUT56_P21_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT56_P21_5_OUT

Definition: IfxGtm_PinMap.c:2090

IfxGtm_TOM3_8_TOUT186_P31_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_8_TOUT186_P31_12_OUT

Definition: IfxGtm_PinMap.c:2302

IfxGtm_TOM3_7N_TOUT243_P15_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_7N_TOUT243_P15_11_OUT

Definition: IfxGtm_PinMap.c:2292

IfxGtm_ATOM4_7N_TOUT79_P15_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7N_TOUT79_P15_8_OUT

Definition: IfxGtm_PinMap.c:617

IfxGtm_TIM1_2_P23_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P23_5_IN

Definition: IfxGtm_PinMap.c:1026

IfxGtm_TIM1_2_P00_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P00_11_IN

Definition: IfxGtm_PinMap.c:1020

IfxGtm_ATOM0_0N_TOUT43_P23_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0N_TOUT43_P23_2_OUT

Definition: IfxGtm_PinMap.c:47

IfxGtm_TIM2_6_P11_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P11_11_IN

Definition: IfxGtm_PinMap.c:1136

IfxGtm_TOM1_5_TOUT2_P02_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT2_P02_2_OUT

Definition: IfxGtm_PinMap.c:1903

IfxGtm_ATOM5_4_TOUT210_P25_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT210_P25_4_OUT

Definition: IfxGtm_PinMap.c:717

IfxGtm_TOM0_9_TOUT47_P22_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT47_P22_0_OUT

Definition: IfxGtm_PinMap.c:1757

IfxGtm_ATOM4_5N_TOUT121_P11_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5N_TOUT121_P11_4_OUT

Definition: IfxGtm_PinMap.c:585

IfxGtm_TOM1_4_TOUT94_P13_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT94_P13_3_OUT

Definition: IfxGtm_PinMap.c:1881

IfxGtm_ATOM8_4_TOUT234_P24_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_4_TOUT234_P24_12_OUT

Definition: IfxGtm_PinMap.c:898

IfxGtm_TOM0_3_TOUT3_P02_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT3_P02_3_OUT

Definition: IfxGtm_PinMap.c:1622

IfxGtm_TOM3_7_TOUT213_P25_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_7_TOUT213_P25_7_OUT

Definition: IfxGtm_PinMap.c:2297

IfxGtm_TOM4_1_TOUT156_P01_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_1_TOUT156_P01_2_OUT

Definition: IfxGtm_PinMap.c:2348

IfxGtm_Atom_7

ATOM object 7.

Definition: IfxGtm_cfg.h:252

IfxGtm_ATOM3_7_TOUT93_P13_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT93_P13_2_OUT

Definition: IfxGtm_PinMap.c:510

IfxGtm_TIM6_0_P10_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P10_9_IN

Definition: IfxGtm_PinMap.c:1449

IfxGtm_TOM4_4_TOUT194_P30_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_4_TOUT194_P30_4_OUT

Definition: IfxGtm_PinMap.c:2364

IfxGtm_TOM1_10_TOUT266_P10_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT266_P10_10_OUT

Definition: IfxGtm_PinMap.c:1775

IfxGtm_TIM4_4_P01_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P01_0_IN

Definition: IfxGtm_PinMap.c:1313

IfxGtm_TIM1_1_P02_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P02_1_IN

Definition: IfxGtm_PinMap.c:1012

IfxGtm_TOM1_3N_TOUT16_P00_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_3N_TOUT16_P00_7_OUT

Definition: IfxGtm_PinMap.c:1839

IfxGtm_TIM6_4_P24_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P24_4_IN

Definition: IfxGtm_PinMap.c:1488

IfxGtm_TOM0_1N_TOUT4_P02_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT4_P02_4_OUT

Definition: IfxGtm_PinMap.c:1570

IfxGtm_ATOM1_7_TOUT75_P15_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT75_P15_4_OUT

Definition: IfxGtm_PinMap.c:280

IfxGtm_TOM2_7_TOUT105_P10_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_7_TOUT105_P10_3_OUT

Definition: IfxGtm_PinMap.c:2142

IfxGtm_TOM1_7N_TOUT243_P15_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT243_P15_11_OUT

Definition: IfxGtm_PinMap.c:1949

IfxGtm_ATOM3_0_TOUT32_P33_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT32_P33_10_OUT

Definition: IfxGtm_PinMap.c:400

IfxGtm_ATOM1_3_TOUT60_P20_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT60_P20_1_OUT

Definition: IfxGtm_PinMap.c:214

IfxGtm_ATOM4_2N_TOUT65_P20_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2N_TOUT65_P20_9_OUT

Definition: IfxGtm_PinMap.c:542

IfxGtm_ATOM1_5N_TOUT148_P34_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT148_P34_3_OUT

Definition: IfxGtm_PinMap.c:237

IfxGtm_ATOM2_2N_TOUT10_P00_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT10_P00_1_OUT

Definition: IfxGtm_PinMap.c:311

IfxGtm_TIM5_5_P13_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P13_6_IN

Definition: IfxGtm_PinMap.c:1418

IfxGtm_ATOM4_6_TOUT129_P12_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT129_P12_1_OUT

Definition: IfxGtm_PinMap.c:606

IfxGtm_ATOM8_3_TOUT233_P24_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_3_TOUT233_P24_11_OUT

Definition: IfxGtm_PinMap.c:893

IfxGtm_TIM3_5_P13_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P13_13_IN

Definition: IfxGtm_PinMap.c:1225

IfxGtm_TOM0_1N_TOUT22_P33_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT22_P33_0_OUT

Definition: IfxGtm_PinMap.c:1566

IfxGtm_ATOM4_4_TOUT57_P21_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT57_P21_6_OUT

Definition: IfxGtm_PinMap.c:581

IfxGtm_TIM5_2_P22_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P22_10_IN

Definition: IfxGtm_PinMap.c:1388

IfxGtm_TOM2_14_TOUT137_P22_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_14_TOUT137_P22_11_OUT

Definition: IfxGtm_PinMap.c:2024

IfxGtm_ATOM0_6N_TOUT116_P02_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6N_TOUT116_P02_9_OUT

Definition: IfxGtm_PinMap.c:135

IfxGtm_ATOM0_0N_TOUT17_P00_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0N_TOUT17_P00_8_OUT

Definition: IfxGtm_PinMap.c:46

IfxGtm_ATOM4_0_TOUT109_P10_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT109_P10_7_OUT

Definition: IfxGtm_PinMap.c:512

IfxGtm_TOM0_5_TOUT91_P13_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT91_P13_0_OUT

Definition: IfxGtm_PinMap.c:1684

IfxGtm_ATOM1_7N_TOUT79_P15_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT79_P15_8_OUT

Definition: IfxGtm_PinMap.c:275

IfxGtm_ATOM6_0_TOUT250_P13_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT250_P13_11_OUT

Definition: IfxGtm_PinMap.c:770

IfxGtm_ATOM7_7_TOUT229_P24_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_7_TOUT229_P24_7_OUT

Definition: IfxGtm_PinMap.c:873

IfxGtm_TOM4_12_TOUT167_P00_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_12_TOUT167_P00_13_OUT

Definition: IfxGtm_PinMap.c:2327

IfxGtm_TIM3_0_P33_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P33_12_IN

Definition: IfxGtm_PinMap.c:1170

IfxGtm_ATOM0_5N_TOUT0_P02_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5N_TOUT0_P02_0_OUT

Definition: IfxGtm_PinMap.c:122

IfxGtm_ATOM4_1N_TOUT72_P15_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT72_P15_1_OUT

Definition: IfxGtm_PinMap.c:526

IfxGtm_ATOM5_7N_TOUT152_P02_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7N_TOUT152_P02_15_OUT

Definition: IfxGtm_PinMap.c:752

IfxGtm_TIM4_2_P10_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P10_10_IN

Definition: IfxGtm_PinMap.c:1291

IfxGtm_ATOM3_2N_TOUT166_P00_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT166_P00_14_OUT

Definition: IfxGtm_PinMap.c:423

IfxGtm_ATOM3_3N_TOUT16_P00_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT16_P00_7_OUT

Definition: IfxGtm_PinMap.c:443

IfxGtm_TOM2_13_TOUT35_P33_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_13_TOUT35_P33_13_OUT

Definition: IfxGtm_PinMap.c:2021

IfxPort_OutputMode

IfxPort_OutputMode

Pin output mode definition.

Definition: IfxPort.h:140

IfxGtm_TOM3_1_TOUT265_P10_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT265_P10_9_OUT

Definition: IfxGtm_PinMap.c:2218

IfxGtm_TIM0_7_P23_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P23_3_IN

Definition: IfxGtm_PinMap.c:998

IfxGtm_TOM0_9_TOUT52_P21_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT52_P21_1_OUT

Definition: IfxGtm_PinMap.c:1758

IfxGtm_TIM5_2_P01_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P01_9_IN

Definition: IfxGtm_PinMap.c:1384

IfxGtm_ATOM0_5_TOUT15_P00_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT15_P00_6_OUT

Definition: IfxGtm_PinMap.c:128

IfxGtm_TOM1_4N_TOUT8_P02_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT8_P02_8_OUT

Definition: IfxGtm_PinMap.c:1867

uint32

unsigned long uint32

Definition: Platform_Types.h:116

IfxGtm_TOM2_3N_TOUT122_P11_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_3N_TOUT122_P11_5_OUT

Definition: IfxGtm_PinMap.c:2070

IfxGtm_TOM1_1N_TOUT72_P15_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT72_P15_1_OUT

Definition: IfxGtm_PinMap.c:1809

IfxGtm_TIM4_2_P21_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P21_6_IN

Definition: IfxGtm_PinMap.c:1295

IfxGtm_ATOM0_2_TOUT42_P23_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT42_P23_1_OUT

Definition: IfxGtm_PinMap.c:88

IfxGtm_TIM3_4_P02_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P02_10_IN

Definition: IfxGtm_PinMap.c:1210

IfxGtm_ATOM0_4_TOUT29_P33_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT29_P33_7_OUT

Definition: IfxGtm_PinMap.c:115

IfxGtm_ATOM5_6N_TOUT156_P01_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6N_TOUT156_P01_2_OUT

Definition: IfxGtm_PinMap.c:736

IfxGtm_ATOM4_4N_TOUT132_P22_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT132_P22_6_OUT

Definition: IfxGtm_PinMap.c:569

IfxGtm_TIM4_5_P33_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P33_5_IN

Definition: IfxGtm_PinMap.c:1339

IfxGtm_TOM1_0N_TOUT7_P02_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0N_TOUT7_P02_7_OUT

Definition: IfxGtm_PinMap.c:1763

IfxGtm_ATOM2_3N_TOUT11_P00_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT11_P00_2_OUT

Definition: IfxGtm_PinMap.c:331

IfxGtm_TOM0_4N_TOUT8_P02_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT8_P02_8_OUT

Definition: IfxGtm_PinMap.c:1638

IfxGtm_TOM0_1N_TOUT39_P32_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT39_P32_3_OUT

Definition: IfxGtm_PinMap.c:1569

IfxGtm_TIM4_3_P23_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P23_7_IN

Definition: IfxGtm_PinMap.c:1309

IfxGtm_TOM0_0_TOUT32_P33_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT32_P33_10_OUT

Definition: IfxGtm_PinMap.c:1532

IfxGtm_TOM0_5N_TOUT76_P15_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT76_P15_5_OUT

Definition: IfxGtm_PinMap.c:1668

IfxGtm_ATOM3_1_TOUT111_P01_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT111_P01_3_OUT

Definition: IfxGtm_PinMap.c:413

IfxGtm_TOM1_7_TOUT75_P15_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT75_P15_4_OUT

Definition: IfxGtm_PinMap.c:1972

IfxGtm_ATOM1_1N_TOUT113_P01_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1N_TOUT113_P01_5_OUT

Definition: IfxGtm_PinMap.c:169

IfxGtm_TIM6_4_P30_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P30_12_IN

Definition: IfxGtm_PinMap.c:1490

IfxGtm_TOM0_4_TOUT0_P02_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT0_P02_0_OUT

Definition: IfxGtm_PinMap.c:1641

IfxGtm_TOM2_2N_TOUT93_P13_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_2N_TOUT93_P13_2_OUT

Definition: IfxGtm_PinMap.c:2057

IfxGtm_TOM1_4N_TOUT95_P11_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT95_P11_2_OUT

Definition: IfxGtm_PinMap.c:1868

IfxGtm_TIM6_2_P23_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P23_5_IN

Definition: IfxGtm_PinMap.c:1470

IfxGtm_ATOM2_6_TOUT168_P00_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT168_P00_15_OUT

Definition: IfxGtm_PinMap.c:376

IfxGtm_TOM1_6_TOUT68_P20_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT68_P20_12_OUT

Definition: IfxGtm_PinMap.c:1938

IfxGtm_TOM4_8_TOUT230_P24_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_8_TOUT230_P24_8_OUT

Definition: IfxGtm_PinMap.c:2386

IfxGtm_ATOM1_4_TOUT102_P10_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT102_P10_0_OUT

Definition: IfxGtm_PinMap.c:225

IfxGtm_ATOM4_0_TOUT53_P21_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT53_P21_2_OUT

Definition: IfxGtm_PinMap.c:515

IfxGtm_ATOM2_3N_TOUT115_P01_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT115_P01_7_OUT

Definition: IfxGtm_PinMap.c:330

IfxGtm_TOM3_1_TOUT156_P01_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT156_P01_2_OUT

Definition: IfxGtm_PinMap.c:2213

IfxGtm_TIM0_7_P02_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P02_11_IN

Definition: IfxGtm_PinMap.c:993

IfxGtm_Tim_2

TIM object 2.

Definition: IfxGtm_cfg.h:394

IfxGtm_ATOM1_4N_TOUT118_P02_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT118_P02_11_OUT

Definition: IfxGtm_PinMap.c:218

IfxGtm_TOM1_5_TOUT23_P33_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT23_P33_1_OUT

Definition: IfxGtm_PinMap.c:1900

IfxGtm_Atom_ToutMap::toutSel

IfxGtm_ToutSel toutSel

TOUTSEL register control code.

Definition: IfxGtm_PinMap.h:114

IfxGtm_ATOM5_1N_TOUT140_P32_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT140_P32_5_OUT

Definition: IfxGtm_PinMap.c:645

IfxGtm_ATOM0_1N_TOUT50_P22_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT50_P22_3_OUT

Definition: IfxGtm_PinMap.c:61

IfxGtm_ATOM3_1N_TOUT167_P00_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT167_P00_13_OUT

Definition: IfxGtm_PinMap.c:404

IfxGtm_TOM2_3N_TOUT59_P20_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_3N_TOUT59_P20_0_OUT

Definition: IfxGtm_PinMap.c:2073

IfxGtm_ATOM3_2_TOUT88_P14_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT88_P14_8_OUT

Definition: IfxGtm_PinMap.c:437

IfxGtm_ATOM5_4_TOUT158_P01_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT158_P01_12_OUT

Definition: IfxGtm_PinMap.c:715

IfxGtm_TOM2_0_TOUT119_P11_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT119_P11_0_OUT

Definition: IfxGtm_PinMap.c:1992

IfxGtm_TIM6_4_P31_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P31_12_IN

Definition: IfxGtm_PinMap.c:1491

IfxGtm_ATOM5_0N_TOUT261_P14_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT261_P14_12_OUT

Definition: IfxGtm_PinMap.c:631

IfxGtm_TOM4_14_TOUT236_P24_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_14_TOUT236_P24_14_OUT

Definition: IfxGtm_PinMap.c:2341

IfxGtm_TOM3_13_TOUT138_P23_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_13_TOUT138_P23_6_OUT

Definition: IfxGtm_PinMap.c:2187

IfxGtm_TOM2_2N_TOUT78_P15_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_2N_TOUT78_P15_7_OUT

Definition: IfxGtm_PinMap.c:2056

IfxGtm_ATOM4_2_TOUT80_P14_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT80_P14_0_OUT

Definition: IfxGtm_PinMap.c:551

IfxGtm_TOM1_5N_TOUT18_P00_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT18_P00_9_OUT

Definition: IfxGtm_PinMap.c:1886

IfxGtm_ATOM3_2_TOUT28_P33_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT28_P33_6_OUT

Definition: IfxGtm_PinMap.c:434

IfxGtm_ATOM5_6_TOUT249_P13_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT249_P13_12_OUT

Definition: IfxGtm_PinMap.c:749

IfxGtm_TOM0_11_TOUT49_P22_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT49_P22_2_OUT

Definition: IfxGtm_PinMap.c:1546

IfxGtm_ATOM7_2_TOUT164_P01_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_2_TOUT164_P01_14_OUT

Definition: IfxGtm_PinMap.c:836

IfxGtm_TIM3_3_P22_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P22_7_IN

Definition: IfxGtm_PinMap.c:1205

IfxGtm_ATOM3_2_TOUT44_P23_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT44_P23_3_OUT

Definition: IfxGtm_PinMap.c:435

__ldmst_c

IFX_INLINE void __ldmst_c(volatile void *address, unsigned mask, unsigned value)

Definition: IfxCpu_Intrinsics.h:108

IfxGtm_ATOM3_1N_TOUT98_P11_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT98_P11_9_OUT

Definition: IfxGtm_PinMap.c:412

IfxGtm_TOM0_5N_TOUT12_P00_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT12_P00_3_OUT

Definition: IfxGtm_PinMap.c:1657

IfxGtm_PinMap.h

GTM I/O map.

IfxGtm_ATOM5_3N_TOUT263_P14_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT263_P14_15_OUT

Definition: IfxGtm_PinMap.c:693

IfxGtm_TOM2_1N_TOUT90_P14_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT90_P14_10_OUT

Definition: IfxGtm_PinMap.c:2042

IfxGtm_ATOM3_3N_TOUT33_P33_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT33_P33_11_OUT

Definition: IfxGtm_PinMap.c:445

IfxGtm_ATOM4_3_TOUT108_P10_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3_TOUT108_P10_6_OUT

Definition: IfxGtm_PinMap.c:561

IfxGtm_TIM0_1_P02_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P02_1_IN

Definition: IfxGtm_PinMap.c:935

IfxGtm_ATOM3_5_TOUT115_P01_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT115_P01_7_OUT

Definition: IfxGtm_PinMap.c:479

IfxGtm_TOM4_12_TOUT202_P30_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_12_TOUT202_P30_12_OUT

Definition: IfxGtm_PinMap.c:2328

IfxGtm_TIM4_1_P32_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P32_5_IN

Definition: IfxGtm_PinMap.c:1286

IfxGtm_TOM3_15_TOUT221_P25_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_15_TOUT221_P25_15_OUT

Definition: IfxGtm_PinMap.c:2202

IfxGtm_TIM0_4_P22_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P22_3_IN

Definition: IfxGtm_PinMap.c:971

IfxGtm_TIM2_7_P13_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P13_2_IN

Definition: IfxGtm_PinMap.c:1150

IfxGtm_TIM1_5_P23_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P23_0_IN

Definition: IfxGtm_PinMap.c:1054

IfxGtm_TOM3_6_TOUT212_P25_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_6_TOUT212_P25_6_OUT

Definition: IfxGtm_PinMap.c:2284

IfxGtm_ToutSel_c

Definition: IfxGtm_PinMap.h:87

IfxGtm_TIM5_0_P30_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P30_8_IN

Definition: IfxGtm_PinMap.c:1369

IfxGtm_TOM2_0N_TOUT264_P13_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT264_P13_15_OUT

Definition: IfxGtm_PinMap.c:1986

IfxGtm_TIM1_5_P10_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P10_8_IN

Definition: IfxGtm_PinMap.c:1050

IfxGtm_ATOM8_5_TOUT168_P00_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_5_TOUT168_P00_15_OUT

Definition: IfxGtm_PinMap.c:901

IfxGtm_TIM1_0_P33_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P33_10_IN

Definition: IfxGtm_PinMap.c:1009

IfxGtm_ATOM0_1N_TOUT53_P21_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT53_P21_2_OUT

Definition: IfxGtm_PinMap.c:62

IfxGtm_ATOM3_7_TOUT63_P20_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT63_P20_7_OUT

Definition: IfxGtm_PinMap.c:509

IfxGtm_ATOM8_0_TOUT250_P13_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_0_TOUT250_P13_11_OUT

Definition: IfxGtm_PinMap.c:880

IfxGtm_ATOM1_6N_TOUT10_P00_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT10_P00_1_OUT

Definition: IfxGtm_PinMap.c:252

IfxGtm_TOM1_4N_TOUT1_P02_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT1_P02_1_OUT

Definition: IfxGtm_PinMap.c:1858

IfxGtm_ATOM5_4N_TOUT267_P10_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4N_TOUT267_P10_14_OUT

Definition: IfxGtm_PinMap.c:711

IfxGtm_TIM0_3_P02_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P02_10_IN

Definition: IfxGtm_PinMap.c:956

IfxGtm_ATOM5_7N_TOUT208_P25_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7N_TOUT208_P25_2_OUT

Definition: IfxGtm_PinMap.c:755

IfxGtm_TIM5_2_P14_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P14_14_IN

Definition: IfxGtm_PinMap.c:1387

IfxGtm_TOM3_4_TOUT111_P01_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT111_P01_3_OUT

Definition: IfxGtm_PinMap.c:2255

IfxGtm_ATOM6_4_TOUT143_P33_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT143_P33_14_OUT

Definition: IfxGtm_PinMap.c:796

IfxGtm_ATOM5_1N_TOUT158_P01_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT158_P01_12_OUT

Definition: IfxGtm_PinMap.c:646

IfxGtm_TOM1_7N_TOUT150_P34_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT150_P34_5_OUT

Definition: IfxGtm_PinMap.c:1946

IfxGtm_TOM0_4_TOUT37_P32_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT37_P32_1_OUT

Definition: IfxGtm_PinMap.c:1646

IfxGtm_ATOM6_4_TOUT31_P33_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT31_P33_9_OUT

Definition: IfxGtm_PinMap.c:802

IfxGtm_ATOM0_3_TOUT49_P22_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT49_P22_2_OUT

Definition: IfxGtm_PinMap.c:104

IfxGtm_ATOM5_2N_TOUT179_P31_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT179_P31_5_OUT

Definition: IfxGtm_PinMap.c:667

IfxGtm_TIM5_5_P34_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P34_3_IN

Definition: IfxGtm_PinMap.c:1424

IfxGtm_TIM3_0_P02_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P02_6_IN

Definition: IfxGtm_PinMap.c:1159

IfxPort_setPinPadDriver

void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)

Configure the pad driver mode.

Definition: IfxPort.c:322

IfxGtm_TIM4_5_P11_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P11_8_IN

Definition: IfxGtm_PinMap.c:1332

IfxGtm_TIM2_7_P11_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P11_14_IN

Definition: IfxGtm_PinMap.c:1149

IfxGtm_ATOM5_1_TOUT253_P13_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT253_P13_4_OUT

Definition: IfxGtm_PinMap.c:661

IfxGtm_ATOM2_2N_TOUT31_P33_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT31_P33_9_OUT

Definition: IfxGtm_PinMap.c:316

IfxGtm_TOM0_5_TOUT55_P21_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT55_P21_4_OUT

Definition: IfxGtm_PinMap.c:1679

IfxGtm_ATOM2_3N_TOUT100_P11_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT100_P11_11_OUT

Definition: IfxGtm_PinMap.c:328

IfxGtm_TIM4_5_P01_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P01_3_IN

Definition: IfxGtm_PinMap.c:1329

IfxGtm_TIM0_6_P33_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P33_2_IN

Definition: IfxGtm_PinMap.c:992

IfxGtm_TOM1_0_TOUT9_P00_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT9_P00_0_OUT

Definition: IfxGtm_PinMap.c:1773

IfxGtm_TOM0_1_TOUT19_P00_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT19_P00_10_OUT

Definition: IfxGtm_PinMap.c:1578

IfxGtm_ATOM2_5_TOUT138_P23_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT138_P23_6_OUT

Definition: IfxGtm_PinMap.c:362

IfxGtm_TIM3_1_P14_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P14_11_IN

Definition: IfxGtm_PinMap.c:1178

IfxGtm_ATOM4_2_TOUT107_P10_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT107_P10_5_OUT

Definition: IfxGtm_PinMap.c:546

IfxGtm_ATOM8_2_TOUT200_P30_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_2_TOUT200_P30_10_OUT

Definition: IfxGtm_PinMap.c:887

IfxGtm_TOM3_0_TOUT174_P31_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_0_TOUT174_P31_0_OUT

Definition: IfxGtm_PinMap.c:2169

IfxGtm_TIM4_1_P12_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P12_1_IN

Definition: IfxGtm_PinMap.c:1280

IfxGtm_Atom_Ch_4

ATOM channel 4.

Definition: IfxGtm_cfg.h:265

IfxGtm_TIM4_4_P30_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P30_4_IN

Definition: IfxGtm_PinMap.c:1323

IfxGtm_TOM1_4_TOUT37_P32_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT37_P32_1_OUT

Definition: IfxGtm_PinMap.c:1875

IfxGtm_ATOM3_4_TOUT131_P22_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT131_P22_5_OUT

Definition: IfxGtm_PinMap.c:464

IfxGtm_ATOM2_7N_TOUT96_P11_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7N_TOUT96_P11_3_OUT

Definition: IfxGtm_PinMap.c:383

IfxGtm_TOM1_1_TOUT86_P14_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT86_P14_6_OUT

Definition: IfxGtm_PinMap.c:1820

IfxGtm_TOM1_6N_TOUT82_P14_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT82_P14_2_OUT

Definition: IfxGtm_PinMap.c:1927

IfxGtm_TIM1_7_P23_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_7_P23_4_IN

Definition: IfxGtm_PinMap.c:1068

IfxGtm_TOM1_2N_TOUT143_P33_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT143_P33_14_OUT

Definition: IfxGtm_PinMap.c:1821

IfxGtm_Tom_Ch_10

TOM channel 10.

Definition: IfxGtm_cfg.h:441

IfxGtm_ATOM5_6_TOUT136_P22_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT136_P22_10_OUT

Definition: IfxGtm_PinMap.c:742

IfxGtm_TIM2_0_P13_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P13_3_IN

Definition: IfxGtm_PinMap.c:1075

IfxGtm_ATOM5_3N_TOUT212_P26_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT212_P26_0_OUT

Definition: IfxGtm_PinMap.c:690

IfxGtm_ATOM5_2_TOUT176_P31_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT176_P31_2_OUT

Definition: IfxGtm_PinMap.c:678

IfxGtm_TIM2_7_P34_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P34_5_IN

Definition: IfxGtm_PinMap.c:1156

IfxGtm_TIM4_2_P02_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P02_13_IN

Definition: IfxGtm_PinMap.c:1289

IfxGtm_ATOM0_7_TOUT25_P33_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT25_P33_3_OUT

Definition: IfxGtm_PinMap.c:153

IfxGtm_ATOM1_3_TOUT13_P00_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT13_P00_4_OUT

Definition: IfxGtm_PinMap.c:211

IfxGtm_TOM0_2N_TOUT23_P33_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT23_P33_1_OUT

Definition: IfxGtm_PinMap.c:1589

IfxGtm_ATOM2_2_TOUT28_P33_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT28_P33_6_OUT

Definition: IfxGtm_PinMap.c:324

IfxGtm_ATOM5_7_TOUT126_P11_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7_TOUT126_P11_14_OUT

Definition: IfxGtm_PinMap.c:756

IfxGtm_TIM0_4_P02_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P02_4_IN

Definition: IfxGtm_PinMap.c:966

IfxGtm_ATOM5_2N_TOUT141_P32_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT141_P32_6_OUT

Definition: IfxGtm_PinMap.c:665

IfxGtm_TIM1_5_P33_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P33_1_IN

Definition: IfxGtm_PinMap.c:1056

IfxGtm_TIM4_0_P01_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P01_12_IN

Definition: IfxGtm_PinMap.c:1262

IfxGtm_ATOM1_7N_TOUT12_P00_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT12_P00_3_OUT

Definition: IfxGtm_PinMap.c:270

IfxGtm_ATOM8_5_TOUT255_P13_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_5_TOUT255_P13_6_OUT

Definition: IfxGtm_PinMap.c:905

IfxGtm_TOM0_10_TOUT2_P02_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT2_P02_2_OUT

Definition: IfxGtm_PinMap.c:1539

IfxGtm_ATOM8_7_TOUT264_P13_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_7_TOUT264_P13_15_OUT

Definition: IfxGtm_PinMap.c:919

IfxGtm_ATOM7_3_TOUT193_P30_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_3_TOUT193_P30_3_OUT

Definition: IfxGtm_PinMap.c:844

IfxGtm_TIM6_2_P01_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P01_14_IN

Definition: IfxGtm_PinMap.c:1466

IfxGtm_ATOM0_0_TOUT85_P14_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT85_P14_5_OUT

Definition: IfxGtm_PinMap.c:53

IfxGtm_ATOM2_6N_TOUT60_P20_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6N_TOUT60_P20_1_OUT

Definition: IfxGtm_PinMap.c:370

IfxGtm_ATOM5_0N_TOUT213_P25_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT213_P25_7_OUT

Definition: IfxGtm_PinMap.c:630

IfxGtm_TOM1_1_TOUT78_P15_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT78_P15_7_OUT

Definition: IfxGtm_PinMap.c:1819

IfxGtm_TOM1_8_TOUT0_P02_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT0_P02_0_OUT

Definition: IfxGtm_PinMap.c:1976

IfxGtm_TOM1_15_TOUT148_P34_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT148_P34_3_OUT

Definition: IfxGtm_PinMap.c:1797

IfxGtm_TIM3_0_P20_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P20_12_IN

Definition: IfxGtm_PinMap.c:1166

IfxGtm_ATOM3_3_TOUT97_P11_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT97_P11_6_OUT

Definition: IfxGtm_PinMap.c:456

IfxGtm_TOM2_2N_TOUT58_P21_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_2N_TOUT58_P21_7_OUT

Definition: IfxGtm_PinMap.c:2055

IfxGtm_TOM2_12_TOUT135_P22_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_12_TOUT135_P22_9_OUT

Definition: IfxGtm_PinMap.c:2014

IfxGtm_TIM3_7_P20_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P20_11_IN

Definition: IfxGtm_PinMap.c:1254

IfxGtm_TIM1_4_P21_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P21_6_IN

Definition: IfxGtm_PinMap.c:1044

IfxGtm_ATOM1_6_TOUT66_P20_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT66_P20_10_OUT

Definition: IfxGtm_PinMap.c:264

IfxGtm_ATOM1_6_TOUT16_P00_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT16_P00_7_OUT

Definition: IfxGtm_PinMap.c:261

IfxGtm_ATOM6_5_TOUT243_P15_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_5_TOUT243_P15_11_OUT

Definition: IfxGtm_PinMap.c:807

IfxGtm_TIM2_6_P01_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P01_0_IN

Definition: IfxGtm_PinMap.c:1135

IfxGtm_TOM0_14_TOUT100_P11_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT100_P11_11_OUT

Definition: IfxGtm_PinMap.c:1556

IfxGtm_TIM3_4_P21_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P21_0_IN

Definition: IfxGtm_PinMap.c:1217

IfxGtm_TOM1_4N_TOUT54_P21_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT54_P21_3_OUT

Definition: IfxGtm_PinMap.c:1863

IfxGtm_ATOM7_4_TOUT248_P13_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_4_TOUT248_P13_9_OUT

Definition: IfxGtm_PinMap.c:854

IfxGtm_ATOM5_6N_TOUT175_P31_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6N_TOUT175_P31_1_OUT

Definition: IfxGtm_PinMap.c:738

IfxGtm_TOM0_1_TOUT103_P10_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT103_P10_1_OUT

Definition: IfxGtm_PinMap.c:1576

IfxGtm_TOM2_10_TOUT133_P22_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_10_TOUT133_P22_7_OUT

Definition: IfxGtm_PinMap.c:2003

IfxGtm_TIM4_7_P30_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P30_7_IN

Definition: IfxGtm_PinMap.c:1360

IfxGtm_TOM4_4_TOUT8_P02_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_4_TOUT8_P02_8_OUT

Definition: IfxGtm_PinMap.c:2367

IfxGtm_TIM3_4_P13_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P13_5_IN

Definition: IfxGtm_PinMap.c:1212

IfxGtm_TIM6_1_P20_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P20_7_IN

Definition: IfxGtm_PinMap.c:1460

IfxGtm_TOM0_2_TOUT117_P02_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT117_P02_10_OUT

Definition: IfxGtm_PinMap.c:1597

IfxGtm_ATOM0_4_TOUT50_P22_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT50_P22_3_OUT

Definition: IfxGtm_PinMap.c:118

IfxGtm_TOM1_1_TOUT10_P00_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT10_P00_1_OUT

Definition: IfxGtm_PinMap.c:1810

IfxGtm_ATOM1_2_TOUT2_P02_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT2_P02_2_OUT

Definition: IfxGtm_PinMap.c:197

IfxGtm_TOM2_6N_TOUT120_P11_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT120_P11_1_OUT

Definition: IfxGtm_PinMap.c:2118

IfxGtm_ATOM4_3_TOUT82_P14_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3_TOUT82_P14_2_OUT

Definition: IfxGtm_PinMap.c:566

IfxGtm_TOM4_9_TOUT203_P30_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_9_TOUT203_P30_13_OUT

Definition: IfxGtm_PinMap.c:2390

IfxGtm_ATOM0_1N_TOUT55_P21_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT55_P21_4_OUT

Definition: IfxGtm_PinMap.c:63

IfxGtm_TIM2_4_P14_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P14_10_IN

Definition: IfxGtm_PinMap.c:1115

IfxGtm_TIM4_7_P10_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P10_4_IN

Definition: IfxGtm_PinMap.c:1353

IfxGtm_TOM3_5_TOUT179_P31_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_5_TOUT179_P31_5_OUT

Definition: IfxGtm_PinMap.c:2271

IfxGtm_TIM3_0_P15_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P15_5_IN

Definition: IfxGtm_PinMap.c:1165

IfxGtm_TOM1_2_TOUT20_P00_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT20_P00_11_OUT

Definition: IfxGtm_PinMap.c:1831

IfxGtm_TOM0_7_TOUT119_P11_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT119_P11_0_OUT

Definition: IfxGtm_PinMap.c:1735

IfxGtm_ATOM0_1N_TOUT39_P32_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT39_P32_3_OUT

Definition: IfxGtm_PinMap.c:58

IfxGtm_ATOM1_2_TOUT104_P10_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT104_P10_2_OUT

Definition: IfxGtm_PinMap.c:193

IfxGtm_ATOM4_2N_TOUT81_P14_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2N_TOUT81_P14_1_OUT

Definition: IfxGtm_PinMap.c:544

IfxGtm_TIM5_4_P31_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P31_12_IN

Definition: IfxGtm_PinMap.c:1411

IfxGtm_TOM1_6N_TOUT99_P11_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT99_P11_10_OUT

Definition: IfxGtm_PinMap.c:1929

IfxGtm_TOM3_9_TOUT215_P25_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_9_TOUT215_P25_9_OUT

Definition: IfxGtm_PinMap.c:2309

IfxGtm_TOM2_4N_TOUT106_P10_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT106_P10_4_OUT

Definition: IfxGtm_PinMap.c:2084

IfxGtm_ATOM2_2N_TOUT166_P00_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT166_P00_14_OUT

Definition: IfxGtm_PinMap.c:314

IfxGtm_ATOM6_5_TOUT159_P01_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_5_TOUT159_P01_1_OUT

Definition: IfxGtm_PinMap.c:804

IfxGtm_TOM0_0_TOUT77_P15_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT77_P15_6_OUT

Definition: IfxGtm_PinMap.c:1535

IfxGtm_TIM2_7_P00_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P00_8_IN

Definition: IfxGtm_PinMap.c:1146

IfxGtm_ATOM4_0_TOUT68_P20_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT68_P20_12_OUT

Definition: IfxGtm_PinMap.c:516

IfxGtm_TOM2_7_TOUT101_P11_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_7_TOUT101_P11_12_OUT

Definition: IfxGtm_PinMap.c:2141

IfxGtm_TIM4_3_P24_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P24_3_IN

Definition: IfxGtm_PinMap.c:1310

IfxGtm_TIM2_5_P02_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P02_15_IN

Definition: IfxGtm_PinMap.c:1124

IfxGtm_ATOM1_2N_TOUT73_P15_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT73_P15_2_OUT

Definition: IfxGtm_PinMap.c:192

IfxGtm_ATOM2_3N_TOUT33_P33_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT33_P33_11_OUT

Definition: IfxGtm_PinMap.c:336

IfxGtm_TIM5_2_P31_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P31_10_IN

Definition: IfxGtm_PinMap.c:1391

IfxGtm_ATOM2_7_TOUT144_P33_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT144_P33_15_OUT

Definition: IfxGtm_PinMap.c:386

IfxGtm_ATOM6_2_TOUT259_P14_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT259_P14_14_OUT

Definition: IfxGtm_PinMap.c:786

IfxGtm_TOM0_7N_TOUT88_P14_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT88_P14_8_OUT

Definition: IfxGtm_PinMap.c:1732

IfxGtm_TOM0_4_TOUT53_P21_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT53_P21_2_OUT

Definition: IfxGtm_PinMap.c:1648

IfxGtm_ATOM7_2_TOUT254_P13_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_2_TOUT254_P13_5_OUT

Definition: IfxGtm_PinMap.c:841

IfxGtm_TOM1_7N_TOUT100_P11_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT100_P11_11_OUT

Definition: IfxGtm_PinMap.c:1943

IfxGtm_ATOM0_6_TOUT16_P00_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT16_P00_7_OUT

Definition: IfxGtm_PinMap.c:142

IfxGtm_TIM4_0_P13_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P13_12_IN

Definition: IfxGtm_PinMap.c:1268

IfxGtm_TIM1_0_P14_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P14_5_IN

Definition: IfxGtm_PinMap.c:1004

IfxGtm_ATOM3_5N_TOUT87_P14_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5N_TOUT87_P14_7_OUT

Definition: IfxGtm_PinMap.c:477

IfxGtm_TIM2_0_P02_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P02_8_IN

Definition: IfxGtm_PinMap.c:1072

IfxGtm_ATOM6_1_TOUT156_P01_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT156_P01_2_OUT

Definition: IfxGtm_PinMap.c:773

IfxGtm_ATOM3_1_TOUT43_P23_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT43_P23_2_OUT

Definition: IfxGtm_PinMap.c:417

IfxGtm_TOM3_15_TOUT189_P31_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_15_TOUT189_P31_15_OUT

Definition: IfxGtm_PinMap.c:2201

IfxGtm_TIM5_3_P22_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P22_11_IN

Definition: IfxGtm_PinMap.c:1398

IfxGtm_TIM3_6_P00_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P00_7_IN

Definition: IfxGtm_PinMap.c:1234

IfxGtm_ATOM0_3N_TOUT115_P01_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT115_P01_7_OUT

Definition: IfxGtm_PinMap.c:92

IfxGtm_TOM0_0_TOUT53_P21_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT53_P21_2_OUT

Definition: IfxGtm_PinMap.c:1533

IfxGtm_TOM0_10_TOUT41_P23_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT41_P23_0_OUT

Definition: IfxGtm_PinMap.c:1540

IfxPort_InputMode_undefined

Definition: IfxPort.h:83

IfxGtm_TIM5_3_P13_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P13_4_IN

Definition: IfxGtm_PinMap.c:1396

IfxGtm_ATOM3_6_TOUT133_P22_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT133_P22_7_OUT

Definition: IfxGtm_PinMap.c:494

IfxGtm_TIM6_2_P30_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P30_10_IN

Definition: IfxGtm_PinMap.c:1473

IfxGtm_TIM1_0_P22_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P22_1_IN

Definition: IfxGtm_PinMap.c:1008

IfxGtm_TOM0_14_TOUT6_P02_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT6_P02_6_OUT

Definition: IfxGtm_PinMap.c:1558

IfxGtm_ATOM8_7_TOUT244_P15_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_7_TOUT244_P15_12_OUT

Definition: IfxGtm_PinMap.c:918

IfxGtm_TOM0_8_TOUT0_P02_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT0_P02_0_OUT

Definition: IfxGtm_PinMap.c:1747

IfxGtm_TIM2_4_P31_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P31_4_IN

Definition: IfxGtm_PinMap.c:1120

IfxGtm_TOM2_4N_TOUT89_P14_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT89_P14_9_OUT

Definition: IfxGtm_PinMap.c:2092

IfxGtm_TIM4_5_P33_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P33_14_IN

Definition: IfxGtm_PinMap.c:1338

IfxGtm_TIM4_2_P15_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P15_11_IN

Definition: IfxGtm_PinMap.c:1294

IfxGtm_TOM2_6N_TOUT86_P14_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT86_P14_6_OUT

Definition: IfxGtm_PinMap.c:2123

IfxGtm_TOM2_5_TOUT132_P22_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_5_TOUT132_P22_6_OUT

Definition: IfxGtm_PinMap.c:2112

IfxGtm_ATOM8_6_TOUT204_P30_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_6_TOUT204_P30_14_OUT

Definition: IfxGtm_PinMap.c:909

IfxGtm_TOM0_4_TOUT90_P14_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT90_P14_10_OUT

Definition: IfxGtm_PinMap.c:1653

IfxGtm_TIM5_6_P21_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P21_4_IN

Definition: IfxGtm_PinMap.c:1431

IfxGtm_ATOM0_3N_TOUT42_P23_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT42_P23_1_OUT

Definition: IfxGtm_PinMap.c:95

IfxGtm_ChXSel

IfxGtm_ChXSel

CHxSEL register control code.

Definition: IfxGtm_PinMap.h:59

IfxGtm_TIM3_6_P20_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P20_6_IN

Definition: IfxGtm_PinMap.c:1242

IfxGtm_ATOM3_0N_TOUT37_P32_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT37_P32_1_OUT

Definition: IfxGtm_PinMap.c:395

IfxGtm_ATOM4_6_TOUT74_P15_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT74_P15_3_OUT

Definition: IfxGtm_PinMap.c:611

IfxGtm_TIM0_0_P02_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P02_0_IN

Definition: IfxGtm_PinMap.c:924

IfxGtm_TOM0_2_TOUT2_P02_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT2_P02_2_OUT

Definition: IfxGtm_PinMap.c:1600

IfxGtm_TOM1_7_TOUT44_P23_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT44_P23_3_OUT

Definition: IfxGtm_PinMap.c:1966

IfxGtm_TIM3_3_P33_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P33_3_IN

Definition: IfxGtm_PinMap.c:1208

IfxGtm_TOM4_10_TOUT200_P30_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_10_TOUT200_P30_10_OUT

Definition: IfxGtm_PinMap.c:2318

IfxGtm_TOM0_5_TOUT2_P02_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT2_P02_2_OUT

Definition: IfxGtm_PinMap.c:1677

IfxGtm_ATOM1_5_TOUT23_P33_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT23_P33_1_OUT

Definition: IfxGtm_PinMap.c:245

IfxGtm_TOM1_6N_TOUT19_P00_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT19_P00_10_OUT

Definition: IfxGtm_PinMap.c:1916

IfxGtm_TIM4_5_P10_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P10_2_IN

Definition: IfxGtm_PinMap.c:1331

IfxGtm_ToutSel_e

Definition: IfxGtm_PinMap.h:89

IfxGtm_TIM0_6_P20_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P20_0_IN

Definition: IfxGtm_PinMap.c:989

IfxGtm_ATOM2_6N_TOUT88_P14_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6N_TOUT88_P14_8_OUT

Definition: IfxGtm_PinMap.c:371

IfxGtm_ATOM0_6N_TOUT27_P33_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6N_TOUT27_P33_5_OUT

Definition: IfxGtm_PinMap.c:140

IfxGtm_ATOM1_3N_TOUT115_P01_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3N_TOUT115_P01_7_OUT

Definition: IfxGtm_PinMap.c:202

IfxGtm_TIM6_3_P24_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P24_3_IN

Definition: IfxGtm_PinMap.c:1480

IfxGtm_TOM2_0_TOUT250_P13_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT250_P13_11_OUT

Definition: IfxGtm_PinMap.c:1994

IfxGtm_ATOM6_2_TOUT143_P33_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT143_P33_14_OUT

Definition: IfxGtm_PinMap.c:780

IfxGtm_TIM5_6_P13_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P13_7_IN

Definition: IfxGtm_PinMap.c:1429

IfxGtm_ATOM1_2N_TOUT110_P10_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT110_P10_8_OUT

Definition: IfxGtm_PinMap.c:185

IfxGtm_TOM0_4N_TOUT89_P14_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT89_P14_9_OUT

Definition: IfxGtm_PinMap.c:1637

IfxGtm_TOM4_14_TOUT151_P02_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_14_TOUT151_P02_12_OUT

Definition: IfxGtm_PinMap.c:2337

IfxGtm_TOM2_1N_TOUT92_P13_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT92_P13_1_OUT

Definition: IfxGtm_PinMap.c:2043

IfxGtm_TOM0_6_TOUT129_P12_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT129_P12_1_OUT

Definition: IfxGtm_PinMap.c:1704

IfxGtm_ATOM3_0N_TOUT76_P15_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT76_P15_5_OUT

Definition: IfxGtm_PinMap.c:397

IfxGtm_ATOM4_7N_TOUT107_P10_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7N_TOUT107_P10_5_OUT

Definition: IfxGtm_PinMap.c:613

IfxGtm_TOM3_3_TOUT113_P01_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_3_TOUT113_P01_5_OUT

Definition: IfxGtm_PinMap.c:2242

IfxGtm_TOM0_4N_TOUT29_P33_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT29_P33_7_OUT

Definition: IfxGtm_PinMap.c:1631

IfxGtm_ATOM3_7N_TOUT20_P00_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7N_TOUT20_P00_11_OUT

Definition: IfxGtm_PinMap.c:500

IfxGtm_ATOM5_1N_TOUT135_P22_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT135_P22_9_OUT

Definition: IfxGtm_PinMap.c:644

IfxGtm_ATOM2_5_TOUT35_P33_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT35_P33_13_OUT

Definition: IfxGtm_PinMap.c:364

IfxGtm_TOM0_0N_TOUT25_P33_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT25_P33_3_OUT

Definition: IfxGtm_PinMap.c:1519

IfxGtm_TIM2_1_P11_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P11_2_IN

Definition: IfxGtm_PinMap.c:1085

IfxGtm_Tom_Ch_9

TOM channel 9.

Definition: IfxGtm_cfg.h:440

IfxGtm_TOM4_9_TOUT259_P14_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_9_TOUT259_P14_14_OUT

Definition: IfxGtm_PinMap.c:2392

IfxGtm_ATOM0_0_TOUT8_P02_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT8_P02_8_OUT

Definition: IfxGtm_PinMap.c:54

IfxGtm_TOM1_0_TOUT32_P33_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT32_P33_10_OUT

Definition: IfxGtm_PinMap.c:1767

IfxGtm_TOM0_13_TOUT5_P02_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT5_P02_5_OUT

Definition: IfxGtm_PinMap.c:1554

IfxGtm_TIM0_2_P10_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P10_2_IN

Definition: IfxGtm_PinMap.c:948

IfxGtm_TOM2_2_TOUT63_P20_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT63_P20_7_OUT

Definition: IfxGtm_PinMap.c:2065

IfxGtm_ATOM1_5_TOUT65_P20_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT65_P20_9_OUT

Definition: IfxGtm_PinMap.c:249

IfxGtm_TIM5_3_P31_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P31_11_IN

Definition: IfxGtm_PinMap.c:1401

IfxGtm_ATOM2_0N_TOUT32_P33_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0N_TOUT32_P33_10_OUT

Definition: IfxGtm_PinMap.c:287

IfxGtm_TOM0_2_TOUT104_P10_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT104_P10_2_OUT

Definition: IfxGtm_PinMap.c:1595

IfxGtm_TIM4_6_P15_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P15_15_IN

Definition: IfxGtm_PinMap.c:1346

IfxGtm_ATOM1_1_TOUT69_P20_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT69_P20_13_OUT

Definition: IfxGtm_PinMap.c:181

IfxGtm_ATOM4_4_TOUT264_P13_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT264_P13_15_OUT

Definition: IfxGtm_PinMap.c:578

IfxGtm_TOM3_1_TOUT207_P25_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT207_P25_1_OUT

Definition: IfxGtm_PinMap.c:2216

IfxGtm_TOM1_4N_TOUT147_P34_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT147_P34_2_OUT

Definition: IfxGtm_PinMap.c:1857

IfxGtm_ToutSel_i

Definition: IfxGtm_PinMap.h:93

IfxGtm_TOM0_6_TOUT48_P22_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT48_P22_1_OUT

Definition: IfxGtm_PinMap.c:1709

IfxGtm_TIM3_1_P33_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P33_1_IN

Definition: IfxGtm_PinMap.c:1183

IfxGtm_TOM0_5_TOUT110_P10_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT110_P10_8_OUT

Definition: IfxGtm_PinMap.c:1672

IfxGtm_ATOM3_5N_TOUT94_P13_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5N_TOUT94_P13_3_OUT

Definition: IfxGtm_PinMap.c:478

IfxGtm_TOM0_4_TOUT94_P13_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT94_P13_3_OUT

Definition: IfxGtm_PinMap.c:1654

IfxPort_setPinModeInput

IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)

Configure the port input / output mode.

Definition: IfxPort.h:669

IfxGtm_TIM0_6_P10_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P10_15_IN

Definition: IfxGtm_PinMap.c:986

IfxGtm_TOM0_0N_TOUT72_P15_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT72_P15_1_OUT

Definition: IfxGtm_PinMap.c:1523

IfxGtm_TOM1_2_TOUT28_P33_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT28_P33_6_OUT

Definition: IfxGtm_PinMap.c:1833

IfxGtm_ATOM7_4_TOUT226_P24_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_4_TOUT226_P24_4_OUT

Definition: IfxGtm_PinMap.c:852

IfxGtm_ATOM4_4N_TOUT21_P00_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT21_P00_12_OUT

Definition: IfxGtm_PinMap.c:570

IfxGtm_ATOM1_7N_TOUT104_P10_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT104_P10_2_OUT

Definition: IfxGtm_PinMap.c:267

IfxGtm_Tim_TinMap::tim

IfxGtm_Tim tim

TIM unit index.

Definition: IfxGtm_PinMap.h:103

IfxGtm_TIM5_6_P01_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P01_15_IN

Definition: IfxGtm_PinMap.c:1427

IfxGtm_ATOM4_1_TOUT79_P15_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT79_P15_8_OUT

Definition: IfxGtm_PinMap.c:535

IfxGtm_ATOM5_0_TOUT119_P11_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT119_P11_0_OUT

Definition: IfxGtm_PinMap.c:633

IfxGtm_ATOM5_3_TOUT255_P13_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT255_P13_6_OUT

Definition: IfxGtm_PinMap.c:703

IfxGtm_TOM0_3_TOUT89_P14_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT89_P14_9_OUT

Definition: IfxGtm_PinMap.c:1626

IfxGtm_ATOM5_5N_TOUT155_P01_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5N_TOUT155_P01_0_OUT

Definition: IfxGtm_PinMap.c:722

IfxGtm_TOM4_5_TOUT255_P13_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_5_TOUT255_P13_6_OUT

Definition: IfxGtm_PinMap.c:2372

IfxGtm_TIM5_4_P34_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P34_2_IN

Definition: IfxGtm_PinMap.c:1412

IfxGtm_TOM4_0_TOUT250_P13_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_0_TOUT250_P13_11_OUT

Definition: IfxGtm_PinMap.c:2316

IfxGtm_ATOM3_5_TOUT132_P22_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT132_P22_6_OUT

Definition: IfxGtm_PinMap.c:480

IfxGtm_ATOM1_2N_TOUT23_P33_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT23_P33_1_OUT

Definition: IfxGtm_PinMap.c:188

IfxGtm_TOM1_0_TOUT77_P15_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT77_P15_6_OUT

Definition: IfxGtm_PinMap.c:1770

IfxGtm_TIM2_2_P20_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P20_14_IN

Definition: IfxGtm_PinMap.c:1098

IfxGtm_ATOM5_5_TOUT179_P31_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT179_P31_5_OUT

Definition: IfxGtm_PinMap.c:730

IfxGtm_ATOM0_0_TOUT9_P00_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT9_P00_0_OUT

Definition: IfxGtm_PinMap.c:55

IfxGtm_ATOM4_2_TOUT104_P10_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT104_P10_2_OUT

Definition: IfxGtm_PinMap.c:545

IfxGtm_TIM4_0_P00_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P00_13_IN

Definition: IfxGtm_PinMap.c:1260

IfxGtm_TIM5_0_P31_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P31_8_IN

Definition: IfxGtm_PinMap.c:1370

IfxGtm_ATOM1_4N_TOUT71_P15_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT71_P15_0_OUT

Definition: IfxGtm_PinMap.c:223

IfxGtm_ATOM7_0_TOUT190_P30_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_0_TOUT190_P30_0_OUT

Definition: IfxGtm_PinMap.c:824

IfxGtm_ATOM0_1N_TOUT57_P21_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT57_P21_6_OUT

Definition: IfxGtm_PinMap.c:64

IfxGtm_ATOM4_6N_TOUT97_P11_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6N_TOUT97_P11_6_OUT

Definition: IfxGtm_PinMap.c:603

IfxGtm_ATOM2_4_TOUT22_P33_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT22_P33_0_OUT

Definition: IfxGtm_PinMap.c:351

IfxGtm_ATOM1_7N_TOUT117_P02_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT117_P02_10_OUT

Definition: IfxGtm_PinMap.c:269

IfxGtm_ATOM3_1_TOUT19_P00_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT19_P00_10_OUT

Definition: IfxGtm_PinMap.c:415

IfxGtm_TIM6_1_P31_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P31_9_IN

Definition: IfxGtm_PinMap.c:1465

IfxGtm_ATOM8_3_TOUT166_P00_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_3_TOUT166_P00_14_OUT

Definition: IfxGtm_PinMap.c:891

IfxGtm_TIM1_7_P14_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_7_P14_4_IN

Definition: IfxGtm_PinMap.c:1065

IfxGtm_TOM1_1_TOUT242_P15_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT242_P15_10_OUT

Definition: IfxGtm_PinMap.c:1815

IfxGtm_TOM3_3_TOUT244_P15_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_3_TOUT244_P15_12_OUT

Definition: IfxGtm_PinMap.c:2247

IfxGtm_TOM4_3_TOUT225_P24_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_3_TOUT225_P24_3_OUT

Definition: IfxGtm_PinMap.c:2360

IfxGtm_TOM0_3N_TOUT6_P02_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT6_P02_6_OUT

Definition: IfxGtm_PinMap.c:1613

IfxGtm_TOM4_10_TOUT204_P30_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_10_TOUT204_P30_14_OUT

Definition: IfxGtm_PinMap.c:2319

IfxGtm_TIM5_1_P01_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P01_9_IN

Definition: IfxGtm_PinMap.c:1374

IfxGtm_ATOM5_0_TOUT155_P01_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT155_P01_0_OUT

Definition: IfxGtm_PinMap.c:636

IfxGtm_TOM2_3_TOUT253_P13_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT253_P13_4_OUT

Definition: IfxGtm_PinMap.c:2077

IfxGtm_ATOM2_3_TOUT89_P14_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT89_P14_9_OUT

Definition: IfxGtm_PinMap.c:344

IfxGtm_TIM6_0_P24_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P24_0_IN

Definition: IfxGtm_PinMap.c:1453

IfxGtm_TIM5_2_P30_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P30_10_IN

Definition: IfxGtm_PinMap.c:1390

IfxGtm_TIM0_1_P15_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P15_7_IN

Definition: IfxGtm_PinMap.c:939

IfxGtm_ATOM1_1_TOUT10_P00_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT10_P00_1_OUT

Definition: IfxGtm_PinMap.c:176

IfxGtm_ATOM5_1_TOUT147_P34_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT147_P34_2_OUT

Definition: IfxGtm_PinMap.c:655

IfxGtm_ATOM5_0_TOUT146_P34_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT146_P34_1_OUT

Definition: IfxGtm_PinMap.c:635

IfxGtm_ATOM1_4_TOUT72_P15_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT72_P15_1_OUT

Definition: IfxGtm_PinMap.c:233

IfxGtm_TOM1_1_TOUT69_P20_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT69_P20_13_OUT

Definition: IfxGtm_PinMap.c:1818

IfxGtm_ATOM5_5N_TOUT162_P01_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5N_TOUT162_P01_8_OUT

Definition: IfxGtm_PinMap.c:723

IfxGtm_TOM2_13_TOUT73_P15_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_13_TOUT73_P15_2_OUT

Definition: IfxGtm_PinMap.c:2023

IfxGtm_TOM2_1_TOUT251_P13_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_1_TOUT251_P13_10_OUT

Definition: IfxGtm_PinMap.c:2047

IfxGtm_TIM2_2_P00_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P00_3_IN

Definition: IfxGtm_PinMap.c:1091

IfxGtm_TIM5_4_P00_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P00_0_IN

Definition: IfxGtm_PinMap.c:1403

IfxGtm_ATOM6_3_TOUT163_P01_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT163_P01_10_OUT

Definition: IfxGtm_PinMap.c:789

IfxGtm_TOM3_3_TOUT269_P10_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_3_TOUT269_P10_11_OUT

Definition: IfxGtm_PinMap.c:2248

IfxGtm_TIM6_3_P30_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P30_11_IN

Definition: IfxGtm_PinMap.c:1482

IfxGtm_ATOM0_3N_TOUT66_P20_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT66_P20_10_OUT

Definition: IfxGtm_PinMap.c:98

IfxGtm_TIM4_6_P10_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P10_15_IN

Definition: IfxGtm_PinMap.c:1343

IfxGtm_TOM3_11_TOUT189_P31_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_11_TOUT189_P31_15_OUT

Definition: IfxGtm_PinMap.c:2179

IfxGtm_TIM4_4_P24_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P24_4_IN

Definition: IfxGtm_PinMap.c:1321

IfxGtm_TOM2_4_TOUT50_P22_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT50_P22_3_OUT

Definition: IfxGtm_PinMap.c:2098

IfxGtm_TIM5_3_P34_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P34_1_IN

Definition: IfxGtm_PinMap.c:1402

IfxGtm_TOM2_4N_TOUT137_P22_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT137_P22_11_OUT

Definition: IfxGtm_PinMap.c:2088

IfxGtm_TOM1_5N_TOUT3_P02_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT3_P02_3_OUT

Definition: IfxGtm_PinMap.c:1891

IfxGtm_ATOM5_0_TOUT258_P14_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT258_P14_11_OUT

Definition: IfxGtm_PinMap.c:641

IfxGtm_TIM6_5_P25_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P25_5_IN

Definition: IfxGtm_PinMap.c:1497

IfxGtm_ATOM1_5N_TOUT8_P02_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT8_P02_8_OUT

Definition: IfxGtm_PinMap.c:241

IfxGtm_ATOM8_0_TOUT198_P30_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_0_TOUT198_P30_8_OUT

Definition: IfxGtm_PinMap.c:877

IfxGtm_TIM0_4_P33_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P33_0_IN

Definition: IfxGtm_PinMap.c:973

IfxGtm_TIM2_3_P14_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P14_9_IN

Definition: IfxGtm_PinMap.c:1105

IfxGtm_TIM6_1_P13_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P13_5_IN

Definition: IfxGtm_PinMap.c:1459

IfxGtm_Atom_6

ATOM object 6.

Definition: IfxGtm_cfg.h:251

IfxGtm_ATOM2_3N_TOUT24_P33_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT24_P33_2_OUT

Definition: IfxGtm_PinMap.c:335

IfxGtm_TOM2_0_TOUT87_P14_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT87_P14_7_OUT

Definition: IfxGtm_PinMap.c:1998

IfxGtm_ATOM2_1N_TOUT105_P10_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT105_P10_3_OUT

Definition: IfxGtm_PinMap.c:294

IfxGtm_TOM3_8_TOUT218_P25_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_8_TOUT218_P25_12_OUT

Definition: IfxGtm_PinMap.c:2304

IfxGtm_TIM1_3_P32_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P32_2_IN

Definition: IfxGtm_PinMap.c:1038

IfxGtm_ATOM0_2_TOUT12_P00_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT12_P00_3_OUT

Definition: IfxGtm_PinMap.c:85

IfxGtm_ATOM6_2_TOUT157_P01_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT157_P01_15_OUT

Definition: IfxGtm_PinMap.c:782

IfxGtm_TOM4_1_TOUT191_P30_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_1_TOUT191_P30_1_OUT

Definition: IfxGtm_PinMap.c:2350

IfxGtm_TIM6_2_P10_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P10_11_IN

Definition: IfxGtm_PinMap.c:1467

IfxGtm_ATOM5_4N_TOUT177_P31_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4N_TOUT177_P31_3_OUT

Definition: IfxGtm_PinMap.c:709

IfxGtm_TIM2_3_P34_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P34_1_IN

Definition: IfxGtm_PinMap.c:1110

IfxGtm_ATOM5_2_TOUT208_P25_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT208_P25_2_OUT

Definition: IfxGtm_PinMap.c:679

IfxGtm_ATOM8_1_TOUT251_P13_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_1_TOUT251_P13_10_OUT

Definition: IfxGtm_PinMap.c:884

IfxGtm_TOM0_4N_TOUT56_P21_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT56_P21_5_OUT

Definition: IfxGtm_PinMap.c:1634

IfxGtm_TOM3_4_TOUT210_P25_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT210_P25_4_OUT

Definition: IfxGtm_PinMap.c:2260

IfxGtm_ATOM2_3N_TOUT139_P23_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT139_P23_7_OUT

Definition: IfxGtm_PinMap.c:332

IfxGtm_ATOM2_1N_TOUT22_P33_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT22_P33_0_OUT

Definition: IfxGtm_PinMap.c:296

IfxGtm_TOM2_5N_TOUT119_P11_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_5N_TOUT119_P11_0_OUT

Definition: IfxGtm_PinMap.c:2104

IfxGtm_TOM1_6_TOUT29_P33_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT29_P33_7_OUT

Definition: IfxGtm_PinMap.c:1934

IfxGtm_TOM4_8_TOUT202_P30_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_8_TOUT202_P30_12_OUT

Definition: IfxGtm_PinMap.c:2385

IfxGtm_ATOM7_7_TOUT161_P01_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_7_TOUT161_P01_13_OUT

Definition: IfxGtm_PinMap.c:871

IfxGtm_ATOM4_0_TOUT39_P32_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT39_P32_3_OUT

Definition: IfxGtm_PinMap.c:513

IfxGtm_TOM0_6N_TOUT91_P13_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT91_P13_0_OUT

Definition: IfxGtm_PinMap.c:1700

IfxGtm_TOM4_7_TOUT264_P13_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_7_TOUT264_P13_15_OUT

Definition: IfxGtm_PinMap.c:2382

IfxGtm_TOM3_12_TOUT186_P31_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_12_TOUT186_P31_12_OUT

Definition: IfxGtm_PinMap.c:2184

IfxGtm_TIM1_4_P10_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P10_0_IN

Definition: IfxGtm_PinMap.c:1041

IfxGtm_ATOM0_6N_TOUT137_P22_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6N_TOUT137_P22_11_OUT

Definition: IfxGtm_PinMap.c:137

IfxGtm_ATOM7_6_TOUT249_P13_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_6_TOUT249_P13_12_OUT

Definition: IfxGtm_PinMap.c:867

IfxGtm_TIM6_0_P13_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P13_4_IN

Definition: IfxGtm_PinMap.c:1450

IfxGtm_TIM4_0_P12_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P12_0_IN

Definition: IfxGtm_PinMap.c:1267

IfxGtm_TOM2_7_TOUT264_P13_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_7_TOUT264_P13_15_OUT

Definition: IfxGtm_PinMap.c:2145

IfxGtm_TOM1_4N_TOUT10_P00_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT10_P00_1_OUT

Definition: IfxGtm_PinMap.c:1854

IfxGtm_TOM0_7_TOUT6_P02_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT6_P02_6_OUT

Definition: IfxGtm_PinMap.c:1741

IfxGtm_TOM0_7N_TOUT32_P33_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT32_P33_10_OUT

Definition: IfxGtm_PinMap.c:1723

IfxGtm_TOM1_2_TOUT243_P15_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT243_P15_11_OUT

Definition: IfxGtm_PinMap.c:1832

IfxGtm_TIM0_6_P23_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P23_2_IN

Definition: IfxGtm_PinMap.c:991

IfxGtm_ATOM3_4N_TOUT97_P11_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4N_TOUT97_P11_6_OUT

Definition: IfxGtm_PinMap.c:462

IfxGtm_TIM5_7_P21_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P21_5_IN

Definition: IfxGtm_PinMap.c:1442

IfxGtm_TOM0_4_TOUT9_P00_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT9_P00_0_OUT

Definition: IfxGtm_PinMap.c:1655

IfxGtm_TIM3_4_P14_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P14_10_IN

Definition: IfxGtm_PinMap.c:1213

IfxGtm_ATOM5_5_TOUT124_P11_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT124_P11_8_OUT

Definition: IfxGtm_PinMap.c:726

IfxGtm_TIM2_6_P15_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P15_15_IN

Definition: IfxGtm_PinMap.c:1139

IfxGtm_TIM6_4_P14_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P14_12_IN

Definition: IfxGtm_PinMap.c:1486

IfxGtm_Tim_Ch_5

TIM channel 5.

Definition: IfxGtm_cfg.h:410

IfxGtm_ATOM4_2_TOUT83_P14_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT83_P14_3_OUT

Definition: IfxGtm_PinMap.c:552

IfxGtm_ATOM7_6_TOUT270_P10_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_6_TOUT270_P10_15_OUT

Definition: IfxGtm_PinMap.c:868

IfxGtm_TOM0_6_TOUT80_P14_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT80_P14_0_OUT

Definition: IfxGtm_PinMap.c:1713

IfxGtm_ATOM2_3_TOUT104_P10_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT104_P10_2_OUT

Definition: IfxGtm_PinMap.c:341

IfxGtm_ATOM1_1_TOUT31_P33_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT31_P33_9_OUT

Definition: IfxGtm_PinMap.c:180

IfxGtm_ATOM5_3_TOUT149_P34_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT149_P34_4_OUT

Definition: IfxGtm_PinMap.c:697

IfxGtm_TOM1_7N_TOUT16_P00_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT16_P00_7_OUT

Definition: IfxGtm_PinMap.c:1947

IfxGtm_TOM0_2_TOUT79_P15_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT79_P15_8_OUT

Definition: IfxGtm_PinMap.c:1603

IfxGtm_TOM1_14_TOUT270_P10_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT270_P10_15_OUT

Definition: IfxGtm_PinMap.c:1793

IfxGtm_TIM2_4_P11_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P11_7_IN

Definition: IfxGtm_PinMap.c:1113

IfxGtm_TOM4_11_TOUT166_P00_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_11_TOUT166_P00_14_OUT

Definition: IfxGtm_PinMap.c:2322

IfxGtm_TOM0_3N_TOUT16_P00_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT16_P00_7_OUT

Definition: IfxGtm_PinMap.c:1608

IfxGtm_TIM0_3_P00_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P00_12_IN

Definition: IfxGtm_PinMap.c:955

IfxGtm_Tom_Ch_3

TOM channel 3.

Definition: IfxGtm_cfg.h:434

IfxGtm_TOM1_15_TOUT150_P34_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT150_P34_5_OUT

Definition: IfxGtm_PinMap.c:1798

IfxGtm_TIM3_7_P25_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P25_7_IN

Definition: IfxGtm_PinMap.c:1257

IfxGtm_ATOM0_0N_TOUT7_P02_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0N_TOUT7_P02_7_OUT

Definition: IfxGtm_PinMap.c:49

IfxGtm_TOM0_2N_TOUT58_P21_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT58_P21_7_OUT

Definition: IfxGtm_PinMap.c:1591

IfxGtm_ATOM1_2_TOUT80_P14_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT80_P14_0_OUT

Definition: IfxGtm_PinMap.c:200

IfxGtm_ATOM5_3N_TOUT270_P10_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT270_P10_15_OUT

Definition: IfxGtm_PinMap.c:694

IfxGtm_ATOM1_5_TOUT110_P10_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT110_P10_8_OUT

Definition: IfxGtm_PinMap.c:243

IfxGtm_TIM3_5_P32_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P32_5_IN

Definition: IfxGtm_PinMap.c:1232

IfxGtm_ATOM0_7N_TOUT2_P02_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7N_TOUT2_P02_2_OUT

Definition: IfxGtm_PinMap.c:151

IfxGtm_TIM4_3_P11_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P11_5_IN

Definition: IfxGtm_PinMap.c:1306

IfxGtm_Tom_Ch_13

TOM channel 13.

Definition: IfxGtm_cfg.h:444

IfxGtm_TOM0_5N_TOUT144_P33_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT144_P33_15_OUT

Definition: IfxGtm_PinMap.c:1658

IfxGtm_ATOM3_3_TOUT21_P00_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT21_P00_12_OUT

Definition: IfxGtm_PinMap.c:452

IfxGtm_TOM1_2_TOUT12_P00_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT12_P00_3_OUT

Definition: IfxGtm_PinMap.c:1830

IfxGtm_TOM2_1_TOUT120_P11_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_1_TOUT120_P11_1_OUT

Definition: IfxGtm_PinMap.c:2045

IfxGtm_ATOM4_0_TOUT77_P15_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT77_P15_6_OUT

Definition: IfxGtm_PinMap.c:518

IfxGtm_ATOM1_4N_TOUT3_P02_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT3_P02_3_OUT

Definition: IfxGtm_PinMap.c:222

IfxGtm_TOM0_6_TOUT24_P33_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT24_P33_2_OUT

Definition: IfxGtm_PinMap.c:1706

IfxGtm_TOM0_4_TOUT57_P21_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT57_P21_6_OUT

Definition: IfxGtm_PinMap.c:1649

IfxGtm_TIM4_3_P02_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P02_14_IN

Definition: IfxGtm_PinMap.c:1303

IfxGtm_ATOM5_7N_TOUT157_P01_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7N_TOUT157_P01_15_OUT

Definition: IfxGtm_PinMap.c:753

IfxGtm_ATOM4_1N_TOUT50_P22_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT50_P22_3_OUT

Definition: IfxGtm_PinMap.c:523

IfxGtm_ATOM2_5_TOUT91_P13_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT91_P13_0_OUT

Definition: IfxGtm_PinMap.c:367

IfxGtm_TOM3_1_TOUT131_P22_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT131_P22_5_OUT

Definition: IfxGtm_PinMap.c:2212

IfxGtm_TIM1_4_P33_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P33_8_IN

Definition: IfxGtm_PinMap.c:1048

IfxGtm_ATOM3_2N_TOUT15_P00_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT15_P00_6_OUT

Definition: IfxGtm_PinMap.c:422

IfxGtm_TOM1_12_TOUT268_P10_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT268_P10_13_OUT

Definition: IfxGtm_PinMap.c:1783

IfxGtm_TIM3_5_P20_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P20_9_IN

Definition: IfxGtm_PinMap.c:1228

IfxGtm_ATOM3_7_TOUT101_P11_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT101_P11_12_OUT

Definition: IfxGtm_PinMap.c:505

IfxGtm_TIM5_2_P02_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P02_13_IN

Definition: IfxGtm_PinMap.c:1385

IfxGtm_ATOM2_2N_TOUT52_P21_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT52_P21_1_OUT

Definition: IfxGtm_PinMap.c:318

IfxGtm_ATOM1_7N_TOUT150_P34_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT150_P34_5_OUT

Definition: IfxGtm_PinMap.c:272

IfxGtm_TIM4_4_P15_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P15_13_IN

Definition: IfxGtm_PinMap.c:1319

IfxGtm_TOM1_6_TOUT48_P22_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT48_P22_1_OUT

Definition: IfxGtm_PinMap.c:1936

IfxGtm_TOM0_3_TOUT118_P02_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT118_P02_11_OUT

Definition: IfxGtm_PinMap.c:1618

IfxGtm_TIM0_2_P02_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P02_9_IN

Definition: IfxGtm_PinMap.c:946

IfxGtm_ATOM1_2_TOUT117_P02_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT117_P02_10_OUT

Definition: IfxGtm_PinMap.c:195

IfxGtm_TOM1_5N_TOUT9_P00_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT9_P00_0_OUT

Definition: IfxGtm_PinMap.c:1897

IfxGtm_ATOM4_4_TOUT72_P15_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT72_P15_1_OUT

Definition: IfxGtm_PinMap.c:582

IfxGtm_TIM0_6_P02_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P02_6_IN

Definition: IfxGtm_PinMap.c:985

IfxGtm_TIM0_3_P02_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P02_3_IN

Definition: IfxGtm_PinMap.c:957

IfxGtm_TIM4_3_P25_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P25_11_IN

Definition: IfxGtm_PinMap.c:1311

IfxGtm_ATOM2_4_TOUT90_P14_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT90_P14_10_OUT

Definition: IfxGtm_PinMap.c:355

IfxGtm_ATOM5_1N_TOUT210_P25_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT210_P25_4_OUT

Definition: IfxGtm_PinMap.c:648

IfxGtm_TOM0_3N_TOUT94_P13_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT94_P13_3_OUT

Definition: IfxGtm_PinMap.c:1615

IfxGtm_TIM5_3_P01_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P01_11_IN

Definition: IfxGtm_PinMap.c:1392

IfxGtm_ATOM5_4_TOUT178_P31_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT178_P31_4_OUT

Definition: IfxGtm_PinMap.c:716

IfxGtm_TIM5_3_P14_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P14_13_IN

Definition: IfxGtm_PinMap.c:1397

IfxGtm_ATOM1_5N_TOUT109_P10_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT109_P10_7_OUT

Definition: IfxGtm_PinMap.c:235

IfxGtm_TOM2_5N_TOUT87_P14_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_5N_TOUT87_P14_7_OUT

Definition: IfxGtm_PinMap.c:2108

IfxGtm_TOM2_1N_TOUT79_P15_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT79_P15_8_OUT

Definition: IfxGtm_PinMap.c:2041

IfxGtm_TOM1_10_TOUT2_P02_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT2_P02_2_OUT

Definition: IfxGtm_PinMap.c:1776

IfxGtm_ATOM5_2N_TOUT269_P10_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT269_P10_11_OUT

Definition: IfxGtm_PinMap.c:672

IfxGtm_ATOM2_4_TOUT34_P33_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT34_P33_12_OUT

Definition: IfxGtm_PinMap.c:353

IfxGtm_Tom_Ch_1

TOM channel 1.

Definition: IfxGtm_cfg.h:432

IfxGtm_TOM2_12_TOUT102_P10_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_12_TOUT102_P10_0_OUT

Definition: IfxGtm_PinMap.c:2013

IfxGtm_TIM4_5_P10_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P10_11_IN

Definition: IfxGtm_PinMap.c:1330

IfxGtm_ATOM0_2N_TOUT15_P00_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT15_P00_6_OUT

Definition: IfxGtm_PinMap.c:75

IfxGtm_TOM0_7N_TOUT100_P11_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT100_P11_11_OUT

Definition: IfxGtm_PinMap.c:1717

IfxGtm_ATOM3_0_TOUT94_P13_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT94_P13_3_OUT

Definition: IfxGtm_PinMap.c:402

IfxGtm_Tom_4

TOM object 4.

Definition: IfxGtm_cfg.h:423

IfxGtm_TIM4_6_P01_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P01_4_IN

Definition: IfxGtm_PinMap.c:1342

IfxGtm_TOM3_5_TOUT211_P25_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_5_TOUT211_P25_5_OUT

Definition: IfxGtm_PinMap.c:2272

IfxGtm_TIM4_5_P30_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P30_5_IN

Definition: IfxGtm_PinMap.c:1337

IfxGtm_TIM3_3_P11_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P11_6_IN

Definition: IfxGtm_PinMap.c:1199

IfxGtm_TIM3_5_P22_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P22_9_IN

Definition: IfxGtm_PinMap.c:1230

IfxGtm_ATOM2_2_TOUT96_P11_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT96_P11_3_OUT

Definition: IfxGtm_PinMap.c:327

IfxGtm_TOM0_6_TOUT83_P14_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT83_P14_3_OUT

Definition: IfxGtm_PinMap.c:1714

IfxGtm_TIM2_5_P34_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P34_3_IN

Definition: IfxGtm_PinMap.c:1133

IfxGtm_ATOM8_4_TOUT254_P13_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_4_TOUT254_P13_5_OUT

Definition: IfxGtm_PinMap.c:899

IfxGtm_ATOM5_7_TOUT248_P13_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7_TOUT248_P13_9_OUT

Definition: IfxGtm_PinMap.c:762

IfxGtm_ATOM0_6_TOUT24_P33_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT24_P33_2_OUT

Definition: IfxGtm_PinMap.c:143

IfxGtm_Atom_ToutMap::select

IfxPort_OutputIdx select

Port control code.

Definition: IfxGtm_PinMap.h:117

IfxGtm_TOM1_0_TOUT76_P15_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT76_P15_5_OUT

Definition: IfxGtm_PinMap.c:1769

IfxGtm_TIM3_4_P15_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P15_1_IN

Definition: IfxGtm_PinMap.c:1215

IfxGtm_Atom_Ch_6

ATOM channel 6.

Definition: IfxGtm_cfg.h:267

IfxGtm_TOM2_0_TOUT95_P11_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT95_P11_2_OUT

Definition: IfxGtm_PinMap.c:2000

IfxGtm_TOM3_6N_TOUT207_P25_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_6N_TOUT207_P25_1_OUT

Definition: IfxGtm_PinMap.c:2278

IfxGtm_ATOM7_1_TOUT242_P15_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT242_P15_10_OUT

Definition: IfxGtm_PinMap.c:832

IfxGtm_TOM0_4N_TOUT95_P11_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT95_P11_2_OUT

Definition: IfxGtm_PinMap.c:1639

IfxGtm_ATOM4_5_TOUT116_P02_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT116_P02_9_OUT

Definition: IfxGtm_PinMap.c:591

IfxGtm_ATOM8_1_TOUT258_P14_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_1_TOUT258_P14_11_OUT

Definition: IfxGtm_PinMap.c:885

IfxGtm_TIM4_7_P11_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P11_14_IN

Definition: IfxGtm_PinMap.c:1354

IfxGtm_TOM0_3N_TOUT60_P20_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT60_P20_1_OUT

Definition: IfxGtm_PinMap.c:1612

IfxGtm_ATOM5_0N_TOUT134_P22_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT134_P22_8_OUT

Definition: IfxGtm_PinMap.c:626

IfxGtm_ATOM5_4N_TOUT122_P11_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4N_TOUT122_P11_5_OUT

Definition: IfxGtm_PinMap.c:705

IfxGtm_ATOM2_3N_TOUT62_P20_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT62_P20_6_OUT

Definition: IfxGtm_PinMap.c:338

IfxGtm_TOM4_4_TOUT254_P13_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_4_TOUT254_P13_5_OUT

Definition: IfxGtm_PinMap.c:2366

IfxGtm_TIM5_5_P32_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P32_5_IN

Definition: IfxGtm_PinMap.c:1423

IfxGtm_ATOM5_1N_TOUT248_P13_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT248_P13_9_OUT

Definition: IfxGtm_PinMap.c:650

IfxGtm_ATOM0_1_TOUT84_P14_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT84_P14_4_OUT

Definition: IfxGtm_PinMap.c:73

IfxGtm_ATOM7_0_TOUT258_P14_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_0_TOUT258_P14_11_OUT

Definition: IfxGtm_PinMap.c:827

IfxGtm_TIM4_7_P14_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P14_7_IN

Definition: IfxGtm_PinMap.c:1357

IfxGtm_ATOM5_4N_TOUT165_P01_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4N_TOUT165_P01_11_OUT

Definition: IfxGtm_PinMap.c:708

IfxGtm_ATOM3_7_TOUT134_P22_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT134_P22_8_OUT

Definition: IfxGtm_PinMap.c:506

IfxGtm_ATOM3_3N_TOUT168_P00_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT168_P00_15_OUT

Definition: IfxGtm_PinMap.c:442

IfxGtm_ATOM8_4_TOUT167_P00_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_4_TOUT167_P00_13_OUT

Definition: IfxGtm_PinMap.c:896

IfxGtm_TIM1_7_P20_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_7_P20_8_IN

Definition: IfxGtm_PinMap.c:1066

IfxGtm_ATOM2_5_TOUT166_P00_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT166_P00_14_OUT

Definition: IfxGtm_PinMap.c:363

IfxGtm_TIM4_4_P20_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P20_1_IN

Definition: IfxGtm_PinMap.c:1320

IfxGtm_TIM5_5_P00_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P00_1_IN

Definition: IfxGtm_PinMap.c:1413

IfxGtm_TIM0_2_P15_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P15_8_IN

Definition: IfxGtm_PinMap.c:950

IfxGtm_TOM3_3_TOUT177_P31_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_3_TOUT177_P31_3_OUT

Definition: IfxGtm_PinMap.c:2245

IfxGtm_TIM0_0_P33_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P33_4_IN

Definition: IfxGtm_PinMap.c:933

IfxGtm_ATOM8_5_TOUT262_P13_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_5_TOUT262_P13_13_OUT

Definition: IfxGtm_PinMap.c:906

IfxGtm_TOM2_4_TOUT133_P22_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT133_P22_7_OUT

Definition: IfxGtm_PinMap.c:2096

IfxGtm_TOM1_5_TOUT15_P00_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT15_P00_6_OUT

Definition: IfxGtm_PinMap.c:1899

IfxGtm_ATOM0_5N_TOUT136_P22_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5N_TOUT136_P22_10_OUT

Definition: IfxGtm_PinMap.c:123

IfxGtm_TOM0_5N_TOUT28_P33_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT28_P33_6_OUT

Definition: IfxGtm_PinMap.c:1661

IfxGtm_ATOM3_6_TOUT143_P33_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT143_P33_14_OUT

Definition: IfxGtm_PinMap.c:495

IfxGtm_TOM2_5N_TOUT250_P13_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_5N_TOUT250_P13_11_OUT

Definition: IfxGtm_PinMap.c:2106

IfxGtm_ATOM3_2_TOUT20_P00_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT20_P00_11_OUT

Definition: IfxGtm_PinMap.c:433

IfxGtm_TOM2_13_TOUT110_P10_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_13_TOUT110_P10_8_OUT

Definition: IfxGtm_PinMap.c:2018

IfxGtm_TOM4_15_TOUT152_P02_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_15_TOUT152_P02_15_OUT

Definition: IfxGtm_PinMap.c:2343

IfxGtm_TIM2_3_P31_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P31_3_IN

Definition: IfxGtm_PinMap.c:1109

IfxGtm_ATOM0_2N_TOUT44_P23_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT44_P23_3_OUT

Definition: IfxGtm_PinMap.c:79

IfxGtm_TOM1_3_TOUT3_P02_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT3_P02_3_OUT

Definition: IfxGtm_PinMap.c:1851

IfxGtm_TOM1_2N_TOUT73_P15_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT73_P15_2_OUT

Definition: IfxGtm_PinMap.c:1828

IfxGtm_TOM1_7_TOUT248_P13_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT248_P13_9_OUT

Definition: IfxGtm_PinMap.c:1963

IfxGtm_TOM0_2_TOUT33_P33_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT33_P33_11_OUT

Definition: IfxGtm_PinMap.c:1601

IfxGtm_ATOM5_2N_TOUT250_P13_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT250_P13_11_OUT

Definition: IfxGtm_PinMap.c:670

IfxGtm_TOM3_5N_TOUT268_P10_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_5N_TOUT268_P10_13_OUT

Definition: IfxGtm_PinMap.c:2267

IfxGtm_TIM1_7_P02_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_7_P02_7_IN

Definition: IfxGtm_PinMap.c:1064

IfxGtm_TOM2_7N_TOUT109_P10_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT109_P10_7_OUT

Definition: IfxGtm_PinMap.c:2133

IfxGtm_TOM0_1_TOUT1_P02_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT1_P02_1_OUT

Definition: IfxGtm_PinMap.c:1579

IfxGtm_ATOM3_2N_TOUT91_P13_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT91_P13_0_OUT

Definition: IfxGtm_PinMap.c:429

IfxGtm_TOM3_9_TOUT219_P25_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_9_TOUT219_P25_13_OUT

Definition: IfxGtm_PinMap.c:2310

IfxGtm_ATOM4_1_TOUT41_P23_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT41_P23_0_OUT

Definition: IfxGtm_PinMap.c:530

IfxGtm_ATOM0_4_TOUT81_P14_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT81_P14_1_OUT

Definition: IfxGtm_PinMap.c:121

IfxGtm_ATOM5_6_TOUT270_P10_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT270_P10_15_OUT

Definition: IfxGtm_PinMap.c:750

IfxGtm_Tim_TinMap::pin

IfxPort_Pin pin

Port pin.

Definition: IfxGtm_PinMap.h:105

IfxGtm_TIM4_4_P33_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P33_10_IN

Definition: IfxGtm_PinMap.c:1325

IfxGtm_ATOM4_0_TOUT48_P22_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT48_P22_1_OUT

Definition: IfxGtm_PinMap.c:514

IfxGtm_ATOM3_0N_TOUT63_P20_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT63_P20_7_OUT

Definition: IfxGtm_PinMap.c:396

IfxGtm_TOM1_7N_TOUT32_P33_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT32_P33_10_OUT

Definition: IfxGtm_PinMap.c:1951

IfxGtm_ATOM4_4_TOUT102_P10_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT102_P10_0_OUT

Definition: IfxGtm_PinMap.c:575

IfxGtm_TIM4_2_P01_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P01_9_IN

Definition: IfxGtm_PinMap.c:1288

IfxGtm_TIM2_3_P20_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P20_1_IN

Definition: IfxGtm_PinMap.c:1108

IfxGtm_TOM1_13_TOUT269_P10_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT269_P10_11_OUT

Definition: IfxGtm_PinMap.c:1788

IfxGtm_ATOM2_7N_TOUT61_P20_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7N_TOUT61_P20_3_OUT

Definition: IfxGtm_PinMap.c:381

IfxGtm_TOM1_10_TOUT143_P33_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT143_P33_14_OUT

Definition: IfxGtm_PinMap.c:1774

IfxGtm_TOM0_3N_TOUT42_P23_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT42_P23_1_OUT

Definition: IfxGtm_PinMap.c:1610

IfxGtm_ATOM3_3_TOUT113_P01_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT113_P01_5_OUT

Definition: IfxGtm_PinMap.c:451

IfxGtm_ATOM3_4N_TOUT86_P14_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4N_TOUT86_P14_6_OUT

Definition: IfxGtm_PinMap.c:461

IfxGtm_Atom_Ch_2

ATOM channel 2.

Definition: IfxGtm_cfg.h:263

IfxGtm_Tim_TinMap

TIN pin mapping structure.

Definition: IfxGtm_PinMap.h:101

IfxGtm_TOM0_3_TOUT38_P32_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT38_P32_2_OUT

Definition: IfxGtm_PinMap.c:1621

IfxGtm_TOM3_2N_TOUT117_P02_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_2N_TOUT117_P02_10_OUT

Definition: IfxGtm_PinMap.c:2219

IfxGtm_ATOM0_6_TOUT6_P02_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT6_P02_6_OUT

Definition: IfxGtm_PinMap.c:146

IfxGtm_TIM6_7_P24_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P24_7_IN

Definition: IfxGtm_PinMap.c:1513

IfxGtm_TOM3_14_TOUT188_P31_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_14_TOUT188_P31_14_OUT

Definition: IfxGtm_PinMap.c:2195

IfxGtm_TIM0_5_P33_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P33_1_IN

Definition: IfxGtm_PinMap.c:983

IfxPort_OutputIdx_alt3

Definition: IfxPort.h:131

IfxGtm_ATOM4_1_TOUT69_P20_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT69_P20_13_OUT

Definition: IfxGtm_PinMap.c:533

IfxGtm_TIM2_5_P01_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P01_6_IN

Definition: IfxGtm_PinMap.c:1123

IfxGtm_TIM3_6_P13_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P13_1_IN

Definition: IfxGtm_PinMap.c:1237

IfxGtm_ATOM1_3_TOUT71_P15_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT71_P15_0_OUT

Definition: IfxGtm_PinMap.c:215

IfxGtm_ATOM5_3_TOUT267_P10_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT267_P10_14_OUT

Definition: IfxGtm_PinMap.c:704

IfxGtm_TIM1_0_P14_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P14_7_IN

Definition: IfxGtm_PinMap.c:1005

IfxGtm_TOM4_0_TOUT162_P01_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_0_TOUT162_P01_8_OUT

Definition: IfxGtm_PinMap.c:2313

IfxGtm_TIM4_1_P10_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P10_9_IN

Definition: IfxGtm_PinMap.c:1278

IfxGtm_TIM5_7_P24_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P24_15_IN

Definition: IfxGtm_PinMap.c:1443

IfxGtm_TIM5_6_P34_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P34_4_IN

Definition: IfxGtm_PinMap.c:1436

IfxGtm_TOM2_3N_TOUT77_P15_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_3N_TOUT77_P15_6_OUT

Definition: IfxGtm_PinMap.c:2074

IfxGtm_ATOM0_3_TOUT3_P02_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT3_P02_3_OUT

Definition: IfxGtm_PinMap.c:103

IfxGtm_TOM1_1N_TOUT35_P33_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT35_P33_13_OUT

Definition: IfxGtm_PinMap.c:1806

IfxGtm_TOM2_4N_TOUT253_P13_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT253_P13_4_OUT

Definition: IfxGtm_PinMap.c:2089

IfxGtm_ATOM4_7N_TOUT124_P11_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7N_TOUT124_P11_8_OUT

Definition: IfxGtm_PinMap.c:614

IfxGtm_TOM0_0N_TOUT17_P00_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT17_P00_8_OUT

Definition: IfxGtm_PinMap.c:1518

IfxGtm_ATOM1_5_TOUT5_P02_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT5_P02_5_OUT

Definition: IfxGtm_PinMap.c:248

IfxGtm_TOM3_3N_TOUT247_P15_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT247_P15_15_OUT

Definition: IfxGtm_PinMap.c:2240

IfxGtm_ATOM0_0_TOUT53_P21_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT53_P21_2_OUT

Definition: IfxGtm_PinMap.c:52

IfxGtm_ATOM8_2_TOUT232_P24_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_2_TOUT232_P24_10_OUT

Definition: IfxGtm_PinMap.c:888

IfxGtm_ATOM5_1_TOUT242_P15_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT242_P15_10_OUT

Definition: IfxGtm_PinMap.c:660

IfxGtm_ATOM7_1_TOUT265_P10_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT265_P10_9_OUT

Definition: IfxGtm_PinMap.c:835

IfxGtm_ATOM5_6N_TOUT207_P25_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6N_TOUT207_P25_1_OUT

Definition: IfxGtm_PinMap.c:739

IfxGtm_TIM2_2_P15_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P15_11_IN

Definition: IfxGtm_PinMap.c:1096

IfxGtm_TOM3_5_TOUT246_P15_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_5_TOUT246_P15_14_OUT

Definition: IfxGtm_PinMap.c:2273

IfxGtm_ATOM3_3N_TOUT100_P11_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT100_P11_11_OUT

Definition: IfxGtm_PinMap.c:439

IfxGtm_ATOM2_7_TOUT37_P32_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT37_P32_1_OUT

Definition: IfxGtm_PinMap.c:387

IfxGtm_ATOM4_5_TOUT73_P15_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT73_P15_2_OUT

Definition: IfxGtm_PinMap.c:598

IfxGtm_TOM0_0_TOUT76_P15_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT76_P15_5_OUT

Definition: IfxGtm_PinMap.c:1534

IfxGtm_TOM2_13_TOUT136_P22_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_13_TOUT136_P22_10_OUT

Definition: IfxGtm_PinMap.c:2019

IfxGtm_ATOM7_2_TOUT246_P15_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_2_TOUT246_P15_14_OUT

Definition: IfxGtm_PinMap.c:840

IfxGtm_Tim_1

TIM object 1.

Definition: IfxGtm_cfg.h:393

IfxGtm_TIM1_2_P15_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P15_8_IN

Definition: IfxGtm_PinMap.c:1024

IfxGtm_TIM6_6_P26_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P26_0_IN

Definition: IfxGtm_PinMap.c:1506

IfxGtm_TOM3_13_TOUT187_P31_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_13_TOUT187_P31_13_OUT

Definition: IfxGtm_PinMap.c:2189

IfxGtm_TOM3_5_TOUT265_P10_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_5_TOUT265_P10_9_OUT

Definition: IfxGtm_PinMap.c:2274

IfxGtm_TOM1_4_TOUT245_P15_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT245_P15_13_OUT

Definition: IfxGtm_PinMap.c:1873

IfxGtm_TOM2_1_TOUT54_P21_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_1_TOUT54_P21_3_OUT

Definition: IfxGtm_PinMap.c:2049

IfxGtm_TIM4_3_P21_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P21_7_IN

Definition: IfxGtm_PinMap.c:1308

IfxGtm_TIM6_3_P31_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P31_11_IN

Definition: IfxGtm_PinMap.c:1483

IfxGtm_TIM4_0_P25_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P25_8_IN

Definition: IfxGtm_PinMap.c:1271

IfxGtm_TIM4_1_P30_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P30_1_IN

Definition: IfxGtm_PinMap.c:1285

IfxGtm_TOM0_6_TOUT59_P20_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT59_P20_0_OUT

Definition: IfxGtm_PinMap.c:1711

IfxGtm_Atom_ToutMap

ATOM TOUT pin mapping structure.

Definition: IfxGtm_PinMap.h:110

IfxGtm_TOM2_0_TOUT53_P21_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT53_P21_2_OUT

Definition: IfxGtm_PinMap.c:1996

IfxGtm_ATOM1_6N_TOUT11_P00_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT11_P00_2_OUT

Definition: IfxGtm_PinMap.c:254

IfxGtm_TOM3_8_TOUT249_P13_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_8_TOUT249_P13_12_OUT

Definition: IfxGtm_PinMap.c:2305

IfxGtm_TOM1_11_TOUT267_P10_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT267_P10_14_OUT

Definition: IfxGtm_PinMap.c:1779

IfxGtm_ATOM1_4N_TOUT147_P34_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT147_P34_2_OUT

Definition: IfxGtm_PinMap.c:221

IfxGtm_TIM0_0_P13_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P13_12_IN

Definition: IfxGtm_PinMap.c:926

IfxGtm_ATOM6_2_TOUT216_P25_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT216_P25_10_OUT

Definition: IfxGtm_PinMap.c:784

IfxGtm_TOM0_5_TOUT40_P32_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT40_P32_4_OUT

Definition: IfxGtm_PinMap.c:1678

IfxGtm_TOM0_0N_TOUT106_P10_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT106_P10_4_OUT

Definition: IfxGtm_PinMap.c:1517

IfxGtm_TIM5_5_P01_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P01_6_IN

Definition: IfxGtm_PinMap.c:1416

IfxGtm_TIM4_5_P25_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P25_13_IN

Definition: IfxGtm_PinMap.c:1336

IfxGtm_ATOM0_3_TOUT38_P32_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT38_P32_2_OUT

Definition: IfxGtm_PinMap.c:102

IfxGtm_ATOM0_3N_TOUT45_P23_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT45_P23_4_OUT

Definition: IfxGtm_PinMap.c:96

IfxGtm_ATOM7_6_TOUT247_P15_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_6_TOUT247_P15_15_OUT

Definition: IfxGtm_PinMap.c:866

IfxGtm_ATOM0_0N_TOUT112_P01_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0N_TOUT112_P01_4_OUT

Definition: IfxGtm_PinMap.c:45

IfxGtm_ATOM2_1N_TOUT9_P00_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT9_P00_0_OUT

Definition: IfxGtm_PinMap.c:303

IfxGtm_ATOM2_7_TOUT140_P32_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT140_P32_5_OUT

Definition: IfxGtm_PinMap.c:385

IfxGtm_TOM1_0_TOUT85_P14_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT85_P14_5_OUT

Definition: IfxGtm_PinMap.c:1771

IfxGtm_ATOM4_7_TOUT67_P20_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7_TOUT67_P20_11_OUT

Definition: IfxGtm_PinMap.c:623

IfxGtm_TOM2_2N_TOUT99_P11_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_2N_TOUT99_P11_10_OUT

Definition: IfxGtm_PinMap.c:2058

IfxGtm_TIM2_4_P15_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P15_1_IN

Definition: IfxGtm_PinMap.c:1117

IfxGtm_TIM0_0_P21_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P21_2_IN

Definition: IfxGtm_PinMap.c:930

IfxGtm_TIM2_1_P33_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P33_13_IN

Definition: IfxGtm_PinMap.c:1089

IfxGtm_TOM1_5_TOUT27_P33_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT27_P33_5_OUT

Definition: IfxGtm_PinMap.c:1902

IfxGtm_TIM3_7_P20_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P20_7_IN

Definition: IfxGtm_PinMap.c:1255

IfxGtm_TOM4_5_TOUT159_P01_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_5_TOUT159_P01_1_OUT

Definition: IfxGtm_PinMap.c:2369

IfxGtm_TOM2_13_TOUT65_P20_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_13_TOUT65_P20_9_OUT

Definition: IfxGtm_PinMap.c:2022

IfxGtm_TOM4_10_TOUT260_P14_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_10_TOUT260_P14_13_OUT

Definition: IfxGtm_PinMap.c:2321

IfxGtm_ATOM2_4_TOUT98_P11_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT98_P11_9_OUT

Definition: IfxGtm_PinMap.c:356

IfxGtm_TIM2_5_P31_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P31_5_IN

Definition: IfxGtm_PinMap.c:1132

IfxGtm_TOM2_4N_TOUT60_P20_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT60_P20_1_OUT

Definition: IfxGtm_PinMap.c:2091

IfxGtm_ATOM5_6_TOUT141_P32_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT141_P32_6_OUT

Definition: IfxGtm_PinMap.c:743

IfxGtm_Tom_Ch_6

TOM channel 6.

Definition: IfxGtm_cfg.h:437

IfxGtm_TIM5_4_P24_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P24_12_IN

Definition: IfxGtm_PinMap.c:1409

IfxGtm_ATOM5_1_TOUT265_P10_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT265_P10_9_OUT

Definition: IfxGtm_PinMap.c:662

IfxGtm_TOM0_6N_TOUT97_P11_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT97_P11_6_OUT

Definition: IfxGtm_PinMap.c:1701

IfxGtm_TIM1_1_P22_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P22_0_IN

Definition: IfxGtm_PinMap.c:1017

IfxGtm_TOM0_0N_TOUT91_P13_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT91_P13_0_OUT

Definition: IfxGtm_PinMap.c:1525

IfxGtm_TOM1_3N_TOUT43_P23_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_3N_TOUT43_P23_2_OUT

Definition: IfxGtm_PinMap.c:1842

IfxGtm_TIM0_2_P00_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P00_11_IN

Definition: IfxGtm_PinMap.c:944

IfxGtm_TOM4_9_TOUT231_P24_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_9_TOUT231_P24_9_OUT

Definition: IfxGtm_PinMap.c:2391

IfxGtm_ATOM5_2_TOUT243_P15_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT243_P15_11_OUT

Definition: IfxGtm_PinMap.c:680

IfxGtm_TIM1_3_P10_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P10_6_IN

Definition: IfxGtm_PinMap.c:1033

IfxGtm_TOM1_2_TOUT117_P02_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT117_P02_10_OUT

Definition: IfxGtm_PinMap.c:1829

IfxGtm_TOM0_6N_TOUT27_P33_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT27_P33_5_OUT

Definition: IfxGtm_PinMap.c:1688

IfxGtm_ATOM0_2N_TOUT58_P21_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT58_P21_7_OUT

Definition: IfxGtm_PinMap.c:81

IfxGtm_ATOM1_3N_TOUT24_P33_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3N_TOUT24_P33_2_OUT

Definition: IfxGtm_PinMap.c:204

IfxGtm_TOM2_1N_TOUT44_P23_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT44_P23_3_OUT

Definition: IfxGtm_PinMap.c:2036

IfxGtm_TOM0_1_TOUT31_P33_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT31_P33_9_OUT

Definition: IfxGtm_PinMap.c:1581

IfxGtm_TOM1_15_TOUT67_P20_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT67_P20_11_OUT

Definition: IfxGtm_PinMap.c:1800

IfxGtm_TIM1_4_P20_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P20_0_IN

Definition: IfxGtm_PinMap.c:1043

IfxGtm_TOM0_6N_TOUT14_P00_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT14_P00_5_OUT

Definition: IfxGtm_PinMap.c:1687

IfxGtm_TIM5_4_P01_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P01_8_IN

Definition: IfxGtm_PinMap.c:1405

IfxGtm_ATOM3_7N_TOUT96_P11_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7N_TOUT96_P11_3_OUT

Definition: IfxGtm_PinMap.c:504

IfxGtm_TOM4_4_TOUT158_P01_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_4_TOUT158_P01_12_OUT

Definition: IfxGtm_PinMap.c:2363

IfxGtm_ATOM2_2_TOUT103_P10_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT103_P10_1_OUT

Definition: IfxGtm_PinMap.c:322

IfxGtm_TIM5_0_P00_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P00_13_IN

Definition: IfxGtm_PinMap.c:1362

IfxGtm_TIM2_1_P00_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P00_1_IN

Definition: IfxGtm_PinMap.c:1081

IfxGtm_ATOM4_7N_TOUT135_P22_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7N_TOUT135_P22_9_OUT

Definition: IfxGtm_PinMap.c:615

IfxGtm_TOM1_15_TOUT37_P32_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT37_P32_1_OUT

Definition: IfxGtm_PinMap.c:1799

IfxGtm_ATOM4_4_TOUT44_P23_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT44_P23_3_OUT

Definition: IfxGtm_PinMap.c:579

IfxGtm_ATOM0_6N_TOUT149_P34_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6N_TOUT149_P34_4_OUT

Definition: IfxGtm_PinMap.c:138

IfxGtm_ATOM7_1_TOUT253_P13_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT253_P13_4_OUT

Definition: IfxGtm_PinMap.c:834

IfxGtm_TOM0_3N_TOUT12_P00_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT12_P00_3_OUT

Definition: IfxGtm_PinMap.c:1606

IfxGtm_ATOM2_1_TOUT43_P23_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT43_P23_2_OUT

Definition: IfxGtm_PinMap.c:307

IfxGtm_TIM5_2_P24_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P24_10_IN

Definition: IfxGtm_PinMap.c:1389

IfxGtm_ATOM0_5_TOUT41_P23_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT41_P23_0_OUT

Definition: IfxGtm_PinMap.c:131

IfxGtm_TOM1_6N_TOUT27_P33_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT27_P33_5_OUT

Definition: IfxGtm_PinMap.c:1918

IfxGtm_TOM3_0N_TOUT134_P22_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_0N_TOUT134_P22_8_OUT

Definition: IfxGtm_PinMap.c:2159

IfxGtm_TIM2_5_P11_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P11_10_IN

Definition: IfxGtm_PinMap.c:1125

IfxGtm_TOM0_8_TOUT95_P11_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT95_P11_2_OUT

Definition: IfxGtm_PinMap.c:1752

IfxGtm_TIM2_5_P13_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P13_0_IN

Definition: IfxGtm_PinMap.c:1127

IfxGtm_TOM0_12_TOUT4_P02_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT4_P02_4_OUT

Definition: IfxGtm_PinMap.c:1550

IfxGtm_TIM1_3_P14_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P14_0_IN

Definition: IfxGtm_PinMap.c:1034

IfxGtm_TIM3_1_P00_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P00_1_IN

Definition: IfxGtm_PinMap.c:1171

IfxGtm_TOM3_4N_TOUT151_P02_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_4N_TOUT151_P02_12_OUT

Definition: IfxGtm_PinMap.c:2249

IfxGtm_ATOM8_1_TOUT163_P01_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_1_TOUT163_P01_10_OUT

Definition: IfxGtm_PinMap.c:881

IfxGtm_TIM1_3_P10_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P10_3_IN

Definition: IfxGtm_PinMap.c:1032

IfxGtm_TIM3_6_P11_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P11_11_IN

Definition: IfxGtm_PinMap.c:1236

IfxGtm_TOM1_0_TOUT18_P00_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT18_P00_9_OUT

Definition: IfxGtm_PinMap.c:1765

IfxGtm_TIM4_2_P25_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P25_10_IN

Definition: IfxGtm_PinMap.c:1298

IfxGtm_Atom_4

ATOM object 4.

Definition: IfxGtm_cfg.h:249

IfxGtm_ATOM2_6_TOUT139_P23_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT139_P23_7_OUT

Definition: IfxGtm_PinMap.c:374

IfxGtm_ATOM1_7N_TOUT2_P02_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT2_P02_2_OUT

Definition: IfxGtm_PinMap.c:274

IfxGtm_TOM4_2_TOUT252_P13_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_2_TOUT252_P13_14_OUT

Definition: IfxGtm_PinMap.c:2357

IfxGtm_ATOM4_5_TOUT130_P22_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT130_P22_4_OUT

Definition: IfxGtm_PinMap.c:593

IfxGtm_TOM2_2N_TOUT124_P11_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_2N_TOUT124_P11_8_OUT

Definition: IfxGtm_PinMap.c:2052

IfxGtm_TIM1_1_P15_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P15_7_IN

Definition: IfxGtm_PinMap.c:1015

IfxGtm_ATOM6_5_TOUT146_P34_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_5_TOUT146_P34_1_OUT

Definition: IfxGtm_PinMap.c:803

IfxGtm_TOM1_4_TOUT0_P02_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT0_P02_0_OUT

Definition: IfxGtm_PinMap.c:1869

IfxGtm_ATOM1_5N_TOUT77_P15_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT77_P15_6_OUT

Definition: IfxGtm_PinMap.c:240

IfxGtm_TOM2_8_TOUT127_P11_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_8_TOUT127_P11_15_OUT

Definition: IfxGtm_PinMap.c:2149

IfxGtm_TOM2_6_TOUT59_P20_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT59_P20_0_OUT

Definition: IfxGtm_PinMap.c:2131

IfxGtm_TOM0_3N_TOUT24_P33_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT24_P33_2_OUT

Definition: IfxGtm_PinMap.c:1609

IfxGtm_Tom_Ch_4

TOM channel 4.

Definition: IfxGtm_cfg.h:435

IfxGtm_ATOM1_7_TOUT7_P02_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT7_P02_7_OUT

Definition: IfxGtm_PinMap.c:281

IfxGtm_TOM2_0_TOUT120_P11_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT120_P11_1_OUT

Definition: IfxGtm_PinMap.c:1993

IfxGtm_TOM1_9_TOUT142_P32_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT142_P32_7_OUT

Definition: IfxGtm_PinMap.c:1981

IfxGtm_TOM1_5_TOUT66_P20_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT66_P20_10_OUT

Definition: IfxGtm_PinMap.c:1907

IfxGtm_TIM4_0_P30_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P30_0_IN

Definition: IfxGtm_PinMap.c:1272

IfxGtm_ATOM2_1_TOUT90_P14_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT90_P14_10_OUT

Definition: IfxGtm_PinMap.c:308

IfxGtm_TOM1_6_TOUT13_P00_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT13_P00_4_OUT

Definition: IfxGtm_PinMap.c:1930

IfxGtm_TIM3_3_P13_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P13_4_IN

Definition: IfxGtm_PinMap.c:1200

IfxGtm_TOM3_14_TOUT220_P25_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_14_TOUT220_P25_14_OUT

Definition: IfxGtm_PinMap.c:2196

IfxGtm_TOM1_7N_TOUT93_P13_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT93_P13_2_OUT

Definition: IfxGtm_PinMap.c:1959

IfxGtm_ATOM6_1_TOUT142_P32_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT142_P32_7_OUT

Definition: IfxGtm_PinMap.c:772

IfxGtm_TOM0_7_TOUT25_P33_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT25_P33_3_OUT

Definition: IfxGtm_PinMap.c:1737

IfxGtm_TOM0_4_TOUT22_P33_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT22_P33_0_OUT

Definition: IfxGtm_PinMap.c:1644

IfxGtm_ATOM3_3_TOUT29_P33_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT29_P33_7_OUT

Definition: IfxGtm_PinMap.c:453

IfxGtm_ATOM5_6_TOUT180_P31_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT180_P31_6_OUT

Definition: IfxGtm_PinMap.c:745

IfxGtm_TOM2_4_TOUT61_P20_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT61_P20_3_OUT

Definition: IfxGtm_PinMap.c:2100

IfxGtm_TIM4_2_P23_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P23_6_IN

Definition: IfxGtm_PinMap.c:1296

IfxGtm_TOM0_5N_TOUT148_P34_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT148_P34_3_OUT

Definition: IfxGtm_PinMap.c:1659

IfxGtm_TIM6_2_P13_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P13_6_IN

Definition: IfxGtm_PinMap.c:1468

IfxGtm_TIM0_6_P23_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P23_1_IN

Definition: IfxGtm_PinMap.c:990

IfxGtm_TOM0_0_TOUT18_P00_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT18_P00_9_OUT

Definition: IfxGtm_PinMap.c:1530

IfxGtm_TOM0_6N_TOUT5_P02_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT5_P02_5_OUT

Definition: IfxGtm_PinMap.c:1695

IfxGtm_TIM3_5_P34_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P34_2_IN

Definition: IfxGtm_PinMap.c:1233

IfxGtm_TIM3_2_P20_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P20_14_IN

Definition: IfxGtm_PinMap.c:1191

IfxGtm_ATOM7_2_TOUT192_P30_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_2_TOUT192_P30_2_OUT

Definition: IfxGtm_PinMap.c:837

IfxGtm_TOM0_7N_TOUT42_P23_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT42_P23_1_OUT

Definition: IfxGtm_PinMap.c:1726

IfxGtm_TOM2_15_TOUT75_P15_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_15_TOUT75_P15_4_OUT

Definition: IfxGtm_PinMap.c:2032

IfxGtm_TOM1_0_TOUT68_P20_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT68_P20_12_OUT

Definition: IfxGtm_PinMap.c:1768

IfxGtm_ATOM4_5_TOUT110_P10_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT110_P10_8_OUT

Definition: IfxGtm_PinMap.c:590

IfxGtm_TOM0_13_TOUT15_P00_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT15_P00_6_OUT

Definition: IfxGtm_PinMap.c:1553

IfxGtm_ATOM0_1_TOUT31_P33_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT31_P33_9_OUT

Definition: IfxGtm_PinMap.c:70

IfxGtm_TIM4_4_P32_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P32_6_IN

Definition: IfxGtm_PinMap.c:1324

IfxGtm_Tim_Ch_7

TIM channel 7.

Definition: IfxGtm_cfg.h:412

IfxGtm_TIM6_6_P13_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P13_11_IN

Definition: IfxGtm_PinMap.c:1501

IfxGtm_TIM2_3_P11_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P11_5_IN

Definition: IfxGtm_PinMap.c:1103

IfxGtm_TOM3_4N_TOUT165_P01_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_4N_TOUT165_P01_11_OUT

Definition: IfxGtm_PinMap.c:2250

IfxGtm_TIM5_7_P01_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P01_7_IN

Definition: IfxGtm_PinMap.c:1440

IfxGtm_ATOM6_1_TOUT183_P31_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT183_P31_9_OUT

Definition: IfxGtm_PinMap.c:775

IfxGtm_ATOM5_2_TOUT254_P13_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT254_P13_5_OUT

Definition: IfxGtm_PinMap.c:681

IfxGtm_TOM1_1_TOUT11_P00_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT11_P00_2_OUT

Definition: IfxGtm_PinMap.c:1812

IfxGtm_TOM2_0N_TOUT126_P11_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT126_P11_14_OUT

Definition: IfxGtm_PinMap.c:1985

IfxGtm_TOM0_1N_TOUT57_P21_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT57_P21_6_OUT

Definition: IfxGtm_PinMap.c:1572

IfxGtm_TOM2_1N_TOUT98_P11_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT98_P11_9_OUT

Definition: IfxGtm_PinMap.c:2044

IfxGtm_ATOM5_5_TOUT269_P10_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT269_P10_11_OUT

Definition: IfxGtm_PinMap.c:734

IfxGtm_TOM4_2_TOUT224_P24_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_2_TOUT224_P24_2_OUT

Definition: IfxGtm_PinMap.c:2356

IfxGtm_TIM3_0_P13_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P13_11_IN

Definition: IfxGtm_PinMap.c:1163

IfxGtm_ATOM3_3_TOUT62_P20_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT62_P20_6_OUT

Definition: IfxGtm_PinMap.c:454

IfxGtm_TOM0_6N_TOUT149_P34_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT149_P34_4_OUT

Definition: IfxGtm_PinMap.c:1686

IfxGtm_ATOM5_3N_TOUT137_P22_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT137_P22_11_OUT

Definition: IfxGtm_PinMap.c:685

IfxGtm_ATOM3_4_TOUT90_P14_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT90_P14_10_OUT

Definition: IfxGtm_PinMap.c:470

IfxGtm_TOM0_1N_TOUT107_P10_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT107_P10_5_OUT

Definition: IfxGtm_PinMap.c:1563

IfxGtm_ATOM3_1N_TOUT51_P21_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT51_P21_0_OUT

Definition: IfxGtm_PinMap.c:408

IfxGtm_TIM2_7_P15_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P15_4_IN

Definition: IfxGtm_PinMap.c:1152

IfxGtm_ATOM2_2N_TOUT35_P33_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT35_P33_13_OUT

Definition: IfxGtm_PinMap.c:317

IfxGtm_TOM4_14_TOUT264_P13_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_14_TOUT264_P13_15_OUT

Definition: IfxGtm_PinMap.c:2342

IfxGtm_TOM0_7_TOUT81_P14_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT81_P14_1_OUT

Definition: IfxGtm_PinMap.c:1743

IfxGtm_ATOM4_4_TOUT111_P01_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT111_P01_3_OUT

Definition: IfxGtm_PinMap.c:576

IfxGtm_TIM2_0_P11_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P11_10_IN

Definition: IfxGtm_PinMap.c:1074

IfxGtm_TOM3_6_TOUT247_P15_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_6_TOUT247_P15_15_OUT

Definition: IfxGtm_PinMap.c:2286

IfxGtm_TOM0_2N_TOUT15_P00_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT15_P00_6_OUT

Definition: IfxGtm_PinMap.c:1588

IfxGtm_TOM0_15_TOUT42_P23_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT42_P23_1_OUT

Definition: IfxGtm_PinMap.c:1561

IfxGtm_TOM0_6N_TOUT31_P33_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT31_P33_9_OUT

Definition: IfxGtm_PinMap.c:1690

IfxGtm_ATOM5_0N_TOUT161_P01_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT161_P01_13_OUT

Definition: IfxGtm_PinMap.c:628

IfxGtm_TIM1_4_P32_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P32_3_IN

Definition: IfxGtm_PinMap.c:1046

IfxGtm_ATOM3_4N_TOUT29_P33_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4N_TOUT29_P33_7_OUT

Definition: IfxGtm_PinMap.c:459

IfxGtm_TIM0_1_P21_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P21_3_IN

Definition: IfxGtm_PinMap.c:940

IfxGtm_TIM3_0_P33_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P33_0_IN

Definition: IfxGtm_PinMap.c:1169

IfxGtm_TOM1_2N_TOUT246_P15_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT246_P15_14_OUT

Definition: IfxGtm_PinMap.c:1824

IfxGtm_ATOM2_0N_TOUT25_P33_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0N_TOUT25_P33_3_OUT

Definition: IfxGtm_PinMap.c:286

IfxGtm_ATOM3_6_TOUT100_P11_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT100_P11_11_OUT

Definition: IfxGtm_PinMap.c:493

IfxGtm_TOM1_13_TOUT5_P02_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT5_P02_5_OUT

Definition: IfxGtm_PinMap.c:1790

IfxGtm_TOM3_0N_TOUT213_P25_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_0N_TOUT213_P25_7_OUT

Definition: IfxGtm_PinMap.c:2162

IfxGtm_TIM6_4_P23_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P23_3_IN

Definition: IfxGtm_PinMap.c:1487

IfxGtm_ATOM2_6_TOUT143_P33_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT143_P33_14_OUT

Definition: IfxGtm_PinMap.c:375

IfxGtm_ATOM2_2N_TOUT114_P01_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT114_P01_6_OUT

Definition: IfxGtm_PinMap.c:312

IfxGtm_TOM3_3N_TOUT212_P25_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT212_P25_6_OUT

Definition: IfxGtm_PinMap.c:2238

IfxGtm_TOM3_1N_TOUT210_P25_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_1N_TOUT210_P25_4_OUT

Definition: IfxGtm_PinMap.c:2207

IfxGtm_ATOM2_3_TOUT21_P00_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT21_P00_12_OUT

Definition: IfxGtm_PinMap.c:342

IfxGtm_TIM2_1_P15_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P15_10_IN

Definition: IfxGtm_PinMap.c:1086

IfxGtm_ATOM4_5_TOUT58_P21_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT58_P21_7_OUT

Definition: IfxGtm_PinMap.c:596

IfxGtm_ATOM3_5N_TOUT120_P11_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5N_TOUT120_P11_1_OUT

Definition: IfxGtm_PinMap.c:472

IfxGtm_TIM4_2_P02_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P02_9_IN

Definition: IfxGtm_PinMap.c:1290

IfxGtm_TIM4_0_P11_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P11_0_IN

Definition: IfxGtm_PinMap.c:1266

IfxGtm_ATOM8_6_TOUT256_P13_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_6_TOUT256_P13_7_OUT

Definition: IfxGtm_PinMap.c:911

IfxGtm_ATOM5_2N_TOUT136_P22_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT136_P22_10_OUT

Definition: IfxGtm_PinMap.c:664

IfxGtm_TOM3_5N_TOUT166_P00_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_5N_TOUT166_P00_14_OUT

Definition: IfxGtm_PinMap.c:2264

IfxGtm_TIM4_6_P10_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P10_3_IN

Definition: IfxGtm_PinMap.c:1344

IfxGtm_TIM4_5_P24_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P24_5_IN

Definition: IfxGtm_PinMap.c:1335

IfxGtm_TOM0_3_TOUT71_P15_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT71_P15_0_OUT

Definition: IfxGtm_PinMap.c:1624

IfxGtm_TOM0_9_TOUT1_P02_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT1_P02_1_OUT

Definition: IfxGtm_PinMap.c:1756

IfxGtm_TOM1_6_TOUT24_P33_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT24_P33_2_OUT

Definition: IfxGtm_PinMap.c:1933

IfxGtm_TIM6_1_P10_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P10_10_IN

Definition: IfxGtm_PinMap.c:1458

IfxGtm_TOM3_6N_TOUT242_P15_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_6N_TOUT242_P15_10_OUT

Definition: IfxGtm_PinMap.c:2279

IfxGtm_Tom_ToutMap

TOM TOUT pin mapping structure.

Definition: IfxGtm_PinMap.h:124

IfxGtm_ATOM5_4N_TOUT163_P01_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4N_TOUT163_P01_10_OUT

Definition: IfxGtm_PinMap.c:707

IfxGtm_TIM2_1_P01_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P01_4_IN

Definition: IfxGtm_PinMap.c:1083

IfxGtm_ATOM5_4_TOUT268_P10_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT268_P10_13_OUT

Definition: IfxGtm_PinMap.c:720

IfxGtm_TOM2_14_TOUT74_P15_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_14_TOUT74_P15_3_OUT

Definition: IfxGtm_PinMap.c:2028

IfxGtm_ATOM1_1N_TOUT102_P10_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1N_TOUT102_P10_0_OUT

Definition: IfxGtm_PinMap.c:168

IfxPort_OutputIdx_alt1

Definition: IfxPort.h:129

IfxGtm_ATOM0_4N_TOUT135_P22_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4N_TOUT135_P22_9_OUT

Definition: IfxGtm_PinMap.c:109

IfxGtm_TOM3_1_TOUT175_P31_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT175_P31_1_OUT

Definition: IfxGtm_PinMap.c:2215

IfxGtm_ATOM5_1N_TOUT268_P10_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT268_P10_13_OUT

Definition: IfxGtm_PinMap.c:652

IfxGtm_TOM1_4_TOUT81_P14_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT81_P14_1_OUT

Definition: IfxGtm_PinMap.c:1880

IfxGtm_TOM2_0N_TOUT91_P13_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT91_P13_0_OUT

Definition: IfxGtm_PinMap.c:1991

IfxGtm_ATOM2_2_TOUT88_P14_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT88_P14_8_OUT

Definition: IfxGtm_PinMap.c:326

IfxGtm_ATOM2_2N_TOUT23_P33_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT23_P33_1_OUT

Definition: IfxGtm_PinMap.c:315

IfxGtm_ATOM7_6_TOUT153_P02_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_6_TOUT153_P02_13_OUT

Definition: IfxGtm_PinMap.c:863

IfxGtm_ATOM5_6_TOUT212_P25_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT212_P25_6_OUT

Definition: IfxGtm_PinMap.c:746

IfxGtm_ATOM4_3_TOUT71_P15_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3_TOUT71_P15_0_OUT

Definition: IfxGtm_PinMap.c:565

IfxGtm_TOM2_6_TOUT256_P13_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT256_P13_7_OUT

Definition: IfxGtm_PinMap.c:2130

IfxGtm_TOM2_2_TOUT46_P23_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT46_P23_5_OUT

Definition: IfxGtm_PinMap.c:2062

IfxGtm_ATOM4_3_TOUT43_P23_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3_TOUT43_P23_2_OUT

Definition: IfxGtm_PinMap.c:562

IfxGtm_TIM0_4_P10_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P10_0_IN

Definition: IfxGtm_PinMap.c:967

IfxGtm_TOM0_2_TOUT28_P33_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT28_P33_6_OUT

Definition: IfxGtm_PinMap.c:1599

IfxGtm_TOM1_7_TOUT50_P22_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT50_P22_3_OUT

Definition: IfxGtm_PinMap.c:1968

IfxGtm_ATOM2_0_TOUT109_P10_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT109_P10_7_OUT

Definition: IfxGtm_PinMap.c:289

IfxGtm_TIM0_0_P14_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P14_7_IN

Definition: IfxGtm_PinMap.c:928

IfxPort_Pin::pinIndex

uint8 pinIndex

Definition: IfxPort.h:249

IfxGtm_ATOM5_0_TOUT206_P25_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT206_P25_0_OUT

Definition: IfxGtm_PinMap.c:639

IfxGtm_ATOM1_4N_TOUT13_P00_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT13_P00_4_OUT

Definition: IfxGtm_PinMap.c:220

IfxGtm_TOM4_11_TOUT205_P30_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_11_TOUT205_P30_15_OUT

Definition: IfxGtm_PinMap.c:2324

IfxGtm_ATOM5_7_TOUT161_P01_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7_TOUT161_P01_13_OUT

Definition: IfxGtm_PinMap.c:759

IfxGtm_ATOM2_5N_TOUT120_P11_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5N_TOUT120_P11_1_OUT

Definition: IfxGtm_PinMap.c:357

IfxGtm_ATOM1_6_TOUT106_P10_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT106_P10_4_OUT

Definition: IfxGtm_PinMap.c:260

IfxGtm_ATOM6_1_TOUT251_P13_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT251_P13_10_OUT

Definition: IfxGtm_PinMap.c:777

IfxGtm_TIM3_2_P14_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P14_8_IN

Definition: IfxGtm_PinMap.c:1190

IfxGtm_ATOM0_2_TOUT55_P21_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT55_P21_4_OUT

Definition: IfxGtm_PinMap.c:90

IfxGtm_TOM2_7_TOUT126_P11_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_7_TOUT126_P11_14_OUT

Definition: IfxGtm_PinMap.c:2143

IfxGtm_TOM0_5_TOUT66_P20_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT66_P20_10_OUT

Definition: IfxGtm_PinMap.c:1681

IfxGtm_ATOM2_2_TOUT44_P23_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT44_P23_3_OUT

Definition: IfxGtm_PinMap.c:325

IfxGtm_ATOM6_3_TOUT253_P13_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT253_P13_4_OUT

Definition: IfxGtm_PinMap.c:793

IfxGtm_TOM0_3N_TOUT144_P33_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT144_P33_15_OUT

Definition: IfxGtm_PinMap.c:1607

IfxGtm_TIM0_3_P10_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P10_14_IN

Definition: IfxGtm_PinMap.c:958

IfxGtm_TIM6_4_P13_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P13_9_IN

Definition: IfxGtm_PinMap.c:1485

IfxGtm_TOM1_3N_TOUT247_P15_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_3N_TOUT247_P15_15_OUT

Definition: IfxGtm_PinMap.c:1840

IfxGtm_TIM0_3_P33_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P33_7_IN

Definition: IfxGtm_PinMap.c:965

IfxGtm_TIM2_7_P20_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P20_11_IN

Definition: IfxGtm_PinMap.c:1153

IfxGtm_ATOM3_1N_TOUT34_P33_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT34_P33_12_OUT

Definition: IfxGtm_PinMap.c:407

IfxGtm_Atom_1

ATOM object 1.

Definition: IfxGtm_cfg.h:246

IfxGtm_TIM3_2_P14_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P14_14_IN

Definition: IfxGtm_PinMap.c:1189

IfxGtm_ATOM0_3_TOUT56_P21_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT56_P21_5_OUT

Definition: IfxGtm_PinMap.c:105

IfxGtm_ATOM0_3_TOUT118_P02_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT118_P02_11_OUT

Definition: IfxGtm_PinMap.c:100

IfxGtm_TOM3_6_TOUT180_P31_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_6_TOUT180_P31_6_OUT

Definition: IfxGtm_PinMap.c:2283

IfxGtm_ATOM8_0_TOUT242_P15_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_0_TOUT242_P15_10_OUT

Definition: IfxGtm_PinMap.c:879

IfxGtm_ATOM8_7_TOUT161_P01_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_7_TOUT161_P01_13_OUT

Definition: IfxGtm_PinMap.c:915

IfxGtm_ATOM3_4_TOUT34_P33_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT34_P33_12_OUT

Definition: IfxGtm_PinMap.c:468

IfxGtm_TOM0_15_TOUT101_P11_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT101_P11_12_OUT

Definition: IfxGtm_PinMap.c:1559

IfxGtm_ATOM1_0_TOUT76_P15_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT76_P15_5_OUT

Definition: IfxGtm_PinMap.c:163

IfxGtm_TOM2_2_TOUT252_P13_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT252_P13_14_OUT

Definition: IfxGtm_PinMap.c:2061

IfxGtm_TOM0_9_TOUT10_P00_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT10_P00_1_OUT

Definition: IfxGtm_PinMap.c:1754

IfxGtm_TIM5_1_P01_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P01_1_IN

Definition: IfxGtm_PinMap.c:1373

IfxGtm_TIM3_5_P21_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P21_1_IN

Definition: IfxGtm_PinMap.c:1229

IfxGtm_TOM2_1N_TOUT57_P21_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT57_P21_6_OUT

Definition: IfxGtm_PinMap.c:2039

IfxGtm_TOM1_7_TOUT45_P23_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT45_P23_4_OUT

Definition: IfxGtm_PinMap.c:1967

IfxGtm_ATOM5_6_TOUT125_P11_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT125_P11_13_OUT

Definition: IfxGtm_PinMap.c:741

IfxGtm_TOM0_5_TOUT82_P14_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT82_P14_2_OUT

Definition: IfxGtm_PinMap.c:1683

IfxGtm_TOM0_4N_TOUT10_P00_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT10_P00_1_OUT

Definition: IfxGtm_PinMap.c:1627

IfxGtm_ATOM0_5_TOUT23_P33_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT23_P33_1_OUT

Definition: IfxGtm_PinMap.c:129

IfxGtm_TOM1_4N_TOUT71_P15_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT71_P15_0_OUT

Definition: IfxGtm_PinMap.c:1865

IfxGtm_ATOM1_5N_TOUT9_P00_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT9_P00_0_OUT

Definition: IfxGtm_PinMap.c:242

IfxGtm_ATOM5_5_TOUT250_P13_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT250_P13_11_OUT

Definition: IfxGtm_PinMap.c:733

IfxGtm_Tim_Ch_6

TIM channel 6.

Definition: IfxGtm_cfg.h:411

IfxGtm_TOM4_9_TOUT199_P30_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_9_TOUT199_P30_9_OUT

Definition: IfxGtm_PinMap.c:2389

IfxGtm_TOM1_3N_TOUT74_P15_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_3N_TOUT74_P15_3_OUT

Definition: IfxGtm_PinMap.c:1844

IfxGtm_TOM2_10_TOUT104_P10_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_10_TOUT104_P10_2_OUT

Definition: IfxGtm_PinMap.c:2001

IfxGtm_ATOM2_4_TOUT30_P33_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT30_P33_8_OUT

Definition: IfxGtm_PinMap.c:352

IfxGtm_TOM2_5N_TOUT94_P13_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_5N_TOUT94_P13_3_OUT

Definition: IfxGtm_PinMap.c:2109

IfxGtm_TOM0_5_TOUT58_P21_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT58_P21_7_OUT

Definition: IfxGtm_PinMap.c:1680

IfxGtm_ATOM1_2N_TOUT114_P01_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT114_P01_6_OUT

Definition: IfxGtm_PinMap.c:186

IfxGtm_TIM3_0_P00_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P00_0_IN

Definition: IfxGtm_PinMap.c:1157

IfxGtm_ATOM0_2N_TOUT41_P23_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT41_P23_0_OUT

Definition: IfxGtm_PinMap.c:78

IfxGtm_Tim_6

TIM object 6.

Definition: IfxGtm_cfg.h:398

IfxGtm_ATOM7_3_TOUT225_P24_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_3_TOUT225_P24_3_OUT

Definition: IfxGtm_PinMap.c:845

IfxGtm_TOM0_12_TOUT50_P22_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT50_P22_3_OUT

Definition: IfxGtm_PinMap.c:1551

IfxGtm_TOM0_4N_TOUT96_P11_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT96_P11_3_OUT

Definition: IfxGtm_PinMap.c:1640

IfxGtm_ATOM4_4N_TOUT108_P10_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT108_P10_6_OUT

Definition: IfxGtm_PinMap.c:568

IfxGtm_TOM0_7N_TOUT130_P22_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT130_P22_4_OUT

Definition: IfxGtm_PinMap.c:1719

IfxGtm_ATOM0_4N_TOUT13_P00_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4N_TOUT13_P00_4_OUT

Definition: IfxGtm_PinMap.c:110

IfxGtm_Tom_Ch_12

TOM channel 12.

Definition: IfxGtm_cfg.h:443

IfxGtm_ATOM5_3N_TOUT247_P15_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT247_P15_15_OUT

Definition: IfxGtm_PinMap.c:691

IfxGtm_TIM5_1_P33_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P33_15_IN

Definition: IfxGtm_PinMap.c:1382

IfxGtm_TIM1_7_P23_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_7_P23_3_IN

Definition: IfxGtm_PinMap.c:1067

IfxGtm_TOM1_3_TOUT13_P00_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT13_P00_4_OUT

Definition: IfxGtm_PinMap.c:1846

IfxGtm_ATOM8_6_TOUT151_P02_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_6_TOUT151_P02_12_OUT

Definition: IfxGtm_PinMap.c:907

IfxGtm_ATOM4_7_TOUT40_P32_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7_TOUT40_P32_4_OUT

Definition: IfxGtm_PinMap.c:621

IfxGtm_ToutSel_d

Definition: IfxGtm_PinMap.h:88

IfxGtm_ATOM1_6_TOUT6_P02_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT6_P02_6_OUT

Definition: IfxGtm_PinMap.c:265

IfxGtm_ATOM1_4N_TOUT105_P10_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT105_P10_3_OUT

Definition: IfxGtm_PinMap.c:216

IfxGtm_ATOM5_1_TOUT164_P01_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT164_P01_14_OUT

Definition: IfxGtm_PinMap.c:657

IfxGtm_TOM0_1N_TOUT30_P33_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT30_P33_8_OUT

Definition: IfxGtm_PinMap.c:1567

IfxGtm_ATOM1_4N_TOUT131_P22_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT131_P22_5_OUT

Definition: IfxGtm_PinMap.c:219

IfxGtm_TOM4_13_TOUT168_P00_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_13_TOUT168_P00_15_OUT

Definition: IfxGtm_PinMap.c:2332

IfxGtm_ATOM1_6N_TOUT1_P02_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT1_P02_1_OUT

Definition: IfxGtm_PinMap.c:257

IfxGtm_TOM0_2_TOUT107_P10_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT107_P10_5_OUT

Definition: IfxGtm_PinMap.c:1596

IfxGtm_ATOM6_7_TOUT244_P15_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_7_TOUT244_P15_12_OUT

Definition: IfxGtm_PinMap.c:820

IfxGtm_ATOM1_1_TOUT1_P02_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT1_P02_1_OUT

Definition: IfxGtm_PinMap.c:179

IfxGtm_TIM3_2_P13_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P13_14_IN

Definition: IfxGtm_PinMap.c:1188

IfxGtm_TOM4_10_TOUT232_P24_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_10_TOUT232_P24_10_OUT

Definition: IfxGtm_PinMap.c:2320

IfxGtm_ATOM4_4N_TOUT105_P10_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT105_P10_3_OUT

Definition: IfxGtm_PinMap.c:567

IfxGtm_ATOM7_6_TOUT228_P24_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_6_TOUT228_P24_6_OUT

Definition: IfxGtm_PinMap.c:865

IfxGtm_TOM1_7_TOUT31_P33_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT31_P33_9_OUT

Definition: IfxGtm_PinMap.c:1965

IfxGtm_TOM1_0N_TOUT34_P33_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0N_TOUT34_P33_12_OUT

Definition: IfxGtm_PinMap.c:1761

IfxGtm_TOM2_4_TOUT254_P13_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT254_P13_5_OUT

Definition: IfxGtm_PinMap.c:2097

IfxGtm_TOM2_3_TOUT62_P20_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT62_P20_6_OUT

Definition: IfxGtm_PinMap.c:2081

IfxGtm_ATOM4_1_TOUT103_P10_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT103_P10_1_OUT

Definition: IfxGtm_PinMap.c:529

IfxGtm_ATOM6_3_TOUT217_P25_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT217_P25_11_OUT

Definition: IfxGtm_PinMap.c:792

IfxGtm_TOM0_5N_TOUT32_P33_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT32_P33_10_OUT

Definition: IfxGtm_PinMap.c:1662

IfxGtm_TOM0_6N_TOUT78_P15_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT78_P15_7_OUT

Definition: IfxGtm_PinMap.c:1697

IfxGtm_ATOM0_2_TOUT2_P02_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT2_P02_2_OUT

Definition: IfxGtm_PinMap.c:86

IfxGtm_ATOM3_5N_TOUT18_P00_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5N_TOUT18_P00_9_OUT

Definition: IfxGtm_PinMap.c:474

IfxGtm_Tim_5

TIM object 5.

Definition: IfxGtm_cfg.h:397

IfxGtm_TOM3_7_TOUT248_P13_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_7_TOUT248_P13_9_OUT

Definition: IfxGtm_PinMap.c:2298

IfxGtm_TOM1_5N_TOUT28_P33_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT28_P33_6_OUT

Definition: IfxGtm_PinMap.c:1888

IfxGtm_ATOM5_3_TOUT244_P15_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT244_P15_12_OUT

Definition: IfxGtm_PinMap.c:702

IfxGtm_TIM3_6_P14_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P14_15_IN

Definition: IfxGtm_PinMap.c:1239

IfxGtm_TOM3_8_TOUT214_P25_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_8_TOUT214_P25_8_OUT

Definition: IfxGtm_PinMap.c:2303

IfxGtm_TIM5_4_P21_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P21_2_IN

Definition: IfxGtm_PinMap.c:1408

IfxGtm_TOM0_7_TOUT45_P23_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT45_P23_4_OUT

Definition: IfxGtm_PinMap.c:1739

IfxGtm_TOM3_15_TOUT152_P02_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_15_TOUT152_P02_15_OUT

Definition: IfxGtm_PinMap.c:2199

IfxGtm_TOM4_11_TOUT261_P14_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_11_TOUT261_P14_12_OUT

Definition: IfxGtm_PinMap.c:2326

IfxGtm_ATOM4_5N_TOUT77_P15_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5N_TOUT77_P15_6_OUT

Definition: IfxGtm_PinMap.c:589

IfxGtm_ATOM5_2_TOUT266_P10_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT266_P10_10_OUT

Definition: IfxGtm_PinMap.c:682

IfxGtm_ATOM5_3N_TOUT142_P32_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT142_P32_7_OUT

Definition: IfxGtm_PinMap.c:686

IfxGtm_TOM4_13_TOUT263_P14_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_13_TOUT263_P14_15_OUT

Definition: IfxGtm_PinMap.c:2336

IfxGtm_ATOM1_6N_TOUT103_P10_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT103_P10_1_OUT

Definition: IfxGtm_PinMap.c:251

IfxGtm_TOM2_3_TOUT56_P21_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT56_P21_5_OUT

Definition: IfxGtm_PinMap.c:2079

IfxGtm_TIM4_0_P24_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P24_0_IN

Definition: IfxGtm_PinMap.c:1270

IfxGtm_ATOM2_3N_TOUT93_P13_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT93_P13_2_OUT

Definition: IfxGtm_PinMap.c:340

IfxGtm_TIM0_7_P20_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P20_8_IN

Definition: IfxGtm_PinMap.c:997

IfxGtm_ATOM0_6_TOUT42_P23_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT42_P23_1_OUT

Definition: IfxGtm_PinMap.c:144

IfxGtm_TIM5_5_P01_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P01_10_IN

Definition: IfxGtm_PinMap.c:1414

IfxGtm_TOM2_3_TOUT49_P22_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT49_P22_2_OUT

Definition: IfxGtm_PinMap.c:2078

IfxGtm_TOM1_6N_TOUT242_P15_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT242_P15_10_OUT

Definition: IfxGtm_PinMap.c:1917

IfxGtm_ATOM2_1_TOUT102_P10_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT102_P10_0_OUT

Definition: IfxGtm_PinMap.c:304

IfxGtm_TOM2_1_TOUT127_P11_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_1_TOUT127_P11_15_OUT

Definition: IfxGtm_PinMap.c:2046

IfxGtm_TOM2_4_TOUT102_P10_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT102_P10_0_OUT

Definition: IfxGtm_PinMap.c:2094

IfxGtm_ATOM0_3N_TOUT24_P33_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT24_P33_2_OUT

Definition: IfxGtm_PinMap.c:94

IfxGtm_TIM5_1_P22_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P22_9_IN

Definition: IfxGtm_PinMap.c:1378

IfxGtm_TOM4_6_TOUT256_P13_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_6_TOUT256_P13_7_OUT

Definition: IfxGtm_PinMap.c:2377

IfxGtm_TOM3_0_TOUT162_P01_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_0_TOUT162_P01_8_OUT

Definition: IfxGtm_PinMap.c:2168

IfxGtm_ATOM1_3N_TOUT106_P10_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3N_TOUT106_P10_4_OUT

Definition: IfxGtm_PinMap.c:201

IfxGtm_TOM1_6N_TOUT38_P32_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT38_P32_2_OUT

Definition: IfxGtm_PinMap.c:1921

IfxGtm_ATOM0_3N_TOUT59_P20_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT59_P20_0_OUT

Definition: IfxGtm_PinMap.c:97

IfxGtm_ATOM5_2_TOUT132_P22_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT132_P22_6_OUT

Definition: IfxGtm_PinMap.c:674

IfxGtm_TOM0_3_TOUT29_P33_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT29_P33_7_OUT

Definition: IfxGtm_PinMap.c:1620

IfxGtm_TIM1_6_P20_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_6_P20_0_IN

Definition: IfxGtm_PinMap.c:1060

IfxGtm_ATOM3_3_TOUT89_P14_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT89_P14_9_OUT

Definition: IfxGtm_PinMap.c:455

IfxGtm_TOM4_1_TOUT223_P24_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_1_TOUT223_P24_1_OUT

Definition: IfxGtm_PinMap.c:2351

IfxGtm_TOM1_3N_TOUT6_P02_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_3N_TOUT6_P02_6_OUT

Definition: IfxGtm_PinMap.c:1843

IfxGtm_TIM5_1_P00_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P00_15_IN

Definition: IfxGtm_PinMap.c:1372

IfxGtm_TIM6_7_P31_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P31_15_IN

Definition: IfxGtm_PinMap.c:1516

IfxGtm_ATOM3_5N_TOUT59_P20_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5N_TOUT59_P20_0_OUT

Definition: IfxGtm_PinMap.c:476

IfxGtm_TOM0_2_TOUT88_P14_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT88_P14_8_OUT

Definition: IfxGtm_PinMap.c:1604

IfxGtm_TIM1_2_P02_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P02_2_IN

Definition: IfxGtm_PinMap.c:1021

IfxGtm_TOM0_7N_TOUT71_P15_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT71_P15_0_OUT

Definition: IfxGtm_PinMap.c:1728

IfxGtm_ATOM4_5N_TOUT133_P22_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5N_TOUT133_P22_7_OUT

Definition: IfxGtm_PinMap.c:586

IfxGtm_TOM0_4N_TOUT147_P34_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT147_P34_2_OUT

Definition: IfxGtm_PinMap.c:1629

IfxGtm_ATOM0_6N_TOUT10_P00_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6N_TOUT10_P00_1_OUT

Definition: IfxGtm_PinMap.c:134

IfxGtm_TOM2_5_TOUT58_P21_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_5_TOUT58_P21_7_OUT

Definition: IfxGtm_PinMap.c:2114

IfxGtm_TIM6_6_P14_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P14_14_IN

Definition: IfxGtm_PinMap.c:1502

IfxGtm_ATOM2_5N_TOUT59_P20_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5N_TOUT59_P20_0_OUT

Definition: IfxGtm_PinMap.c:359

IfxGtm_ATOM8_0_TOUT230_P24_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_0_TOUT230_P24_8_OUT

Definition: IfxGtm_PinMap.c:878

IfxGtm_ATOM7_7_TOUT261_P14_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_7_TOUT261_P14_12_OUT

Definition: IfxGtm_PinMap.c:875

IfxGtm_TOM1_4_TOUT53_P21_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT53_P21_2_OUT

Definition: IfxGtm_PinMap.c:1877

IfxPort_OutputIdx_alt4

Definition: IfxPort.h:132

IfxGtm_ATOM3_4_TOUT98_P11_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT98_P11_9_OUT

Definition: IfxGtm_PinMap.c:471

IfxGtm_TOM0_7_TOUT92_P13_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT92_P13_1_OUT

Definition: IfxGtm_PinMap.c:1745

IfxGtm_Atom_5

ATOM object 5.

Definition: IfxGtm_cfg.h:250

IfxGtm_ATOM1_7_TOUT25_P33_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT25_P33_3_OUT

Definition: IfxGtm_PinMap.c:277

IfxGtm_TOM4_2_TOUT192_P30_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_2_TOUT192_P30_2_OUT

Definition: IfxGtm_PinMap.c:2355

IfxGtm_ATOM0_4_TOUT57_P21_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT57_P21_6_OUT

Definition: IfxGtm_PinMap.c:119

IfxGtm_TOM1_14_TOUT66_P20_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT66_P20_10_OUT

Definition: IfxGtm_PinMap.c:1795

IfxGtm_TOM1_2N_TOUT15_P00_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT15_P00_6_OUT

Definition: IfxGtm_PinMap.c:1822

IfxGtm_TOM1_5N_TOUT148_P34_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT148_P34_3_OUT

Definition: IfxGtm_PinMap.c:1885

IfxGtm_ATOM8_5_TOUT235_P24_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_5_TOUT235_P24_13_OUT

Definition: IfxGtm_PinMap.c:903

IfxGtm_Tim_Ch_3

TIM channel 3.

Definition: IfxGtm_cfg.h:408

IfxGtm_Tom_Ch_5

TOM channel 5.

Definition: IfxGtm_cfg.h:436

IfxGtm_ATOM5_3N_TOUT160_P01_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT160_P01_9_OUT

Definition: IfxGtm_PinMap.c:687

IfxGtm_ATOM0_4N_TOUT3_P02_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4N_TOUT3_P02_3_OUT

Definition: IfxGtm_PinMap.c:112

IfxGtm_TIM1_1_P10_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P10_1_IN

Definition: IfxGtm_PinMap.c:1013

IfxGtm_ATOM3_4N_TOUT57_P21_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4N_TOUT57_P21_6_OUT

Definition: IfxGtm_PinMap.c:460

IfxGtm_ATOM5_2_TOUT121_P11_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT121_P11_4_OUT

Definition: IfxGtm_PinMap.c:673

IfxGtm_TOM1_1N_TOUT4_P02_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT4_P02_4_OUT

Definition: IfxGtm_PinMap.c:1808

IfxGtm_TOM0_4_TOUT102_P10_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT102_P10_0_OUT

Definition: IfxGtm_PinMap.c:1642

IfxGtm_ATOM3_5_TOUT35_P33_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT35_P33_13_OUT

Definition: IfxGtm_PinMap.c:482

IfxGtm_TOM1_8_TOUT128_P12_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT128_P12_0_OUT

Definition: IfxGtm_PinMap.c:1977

IfxGtm_ATOM8_7_TOUT154_P02_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_7_TOUT154_P02_14_OUT

Definition: IfxGtm_PinMap.c:914

IfxGtm_ATOM4_2_TOUT70_P20_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT70_P20_14_OUT

Definition: IfxGtm_PinMap.c:550

IfxGtm_ATOM7_4_TOUT194_P30_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_4_TOUT194_P30_4_OUT

Definition: IfxGtm_PinMap.c:851

IfxGtm_TOM0_7N_TOUT123_P11_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT123_P11_7_OUT

Definition: IfxGtm_PinMap.c:1718

IfxGtm_Atom_Ch_3

ATOM channel 3.

Definition: IfxGtm_cfg.h:264

IfxGtm_ATOM2_0_TOUT94_P13_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT94_P13_3_OUT

Definition: IfxGtm_PinMap.c:293

IfxGtm_TOM3_15_TOUT140_P32_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_15_TOUT140_P32_5_OUT

Definition: IfxGtm_PinMap.c:2198

IfxPort_PadDriver

IfxPort_PadDriver

Pad driver mode definition (strength and slew rate).

Definition: IfxPort.h:151

IfxGtm_TOM3_6_TOUT136_P22_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_6_TOUT136_P22_10_OUT

Definition: IfxGtm_PinMap.c:2281

IfxGtm_TOM1_7_TOUT101_P11_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT101_P11_12_OUT

Definition: IfxGtm_PinMap.c:1960

IfxGtm_ATOM0_7N_TOUT117_P02_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7N_TOUT117_P02_10_OUT

Definition: IfxGtm_PinMap.c:147

IfxGtm_TOM2_3N_TOUT45_P23_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_3N_TOUT45_P23_4_OUT

Definition: IfxGtm_PinMap.c:2072

IfxGtm_TOM3_14_TOUT139_P23_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_14_TOUT139_P23_7_OUT

Definition: IfxGtm_PinMap.c:2192

IfxGtm_ATOM7_7_TOUT248_P13_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_7_TOUT248_P13_9_OUT

Definition: IfxGtm_PinMap.c:874

IfxGtm_Atom_Ch_1

ATOM channel 1.

Definition: IfxGtm_cfg.h:262

IfxGtm_Atom_3

ATOM object 3.

Definition: IfxGtm_cfg.h:248

IfxGtm_TIM2_4_P15_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P15_13_IN

Definition: IfxGtm_PinMap.c:1116

IfxGtm_TIM2_2_P15_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P15_6_IN

Definition: IfxGtm_PinMap.c:1097

IfxGtm_TOM2_5N_TOUT107_P10_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_5N_TOUT107_P10_5_OUT

Definition: IfxGtm_PinMap.c:2103

IfxGtm_TOM0_11_TOUT43_P23_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT43_P23_2_OUT

Definition: IfxGtm_PinMap.c:1545

IfxGtm_ATOM3_5_TOUT166_P00_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT166_P00_14_OUT

Definition: IfxGtm_PinMap.c:481

IfxGtm_TOM0_7N_TOUT93_P13_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT93_P13_2_OUT

Definition: IfxGtm_PinMap.c:1733

IfxGtm_ATOM0_2N_TOUT114_P01_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT114_P01_6_OUT

Definition: IfxGtm_PinMap.c:74

IfxGtm_TOM1_5_TOUT82_P14_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT82_P14_2_OUT

Definition: IfxGtm_PinMap.c:1910

IfxGtm_ATOM4_1N_TOUT85_P14_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT85_P14_5_OUT

Definition: IfxGtm_PinMap.c:527

IfxGtm_ATOM0_0_TOUT0_P02_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT0_P02_0_OUT

Definition: IfxGtm_PinMap.c:50

IfxGtm_TOM1_4_TOUT22_P33_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT22_P33_0_OUT

Definition: IfxGtm_PinMap.c:1872

IfxGtm_ATOM8_7_TOUT205_P30_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_7_TOUT205_P30_15_OUT

Definition: IfxGtm_PinMap.c:916

IfxGtm_TOM1_5N_TOUT12_P00_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT12_P00_3_OUT

Definition: IfxGtm_PinMap.c:1883

IfxGtm_TIM3_7_P32_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P32_7_IN

Definition: IfxGtm_PinMap.c:1258

IfxGtm_TIM3_3_P15_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P15_0_IN

Definition: IfxGtm_PinMap.c:1203

IfxGtm_TOM1_7N_TOUT42_P23_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT42_P23_1_OUT

Definition: IfxGtm_PinMap.c:1954

IfxGtm_TOM2_6N_TOUT95_P11_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT95_P11_2_OUT

Definition: IfxGtm_PinMap.c:2124

IfxGtm_TOM4_13_TOUT231_P24_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_13_TOUT231_P24_9_OUT

Definition: IfxGtm_PinMap.c:2334

IfxGtm_ATOM1_1N_TOUT4_P02_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1N_TOUT4_P02_4_OUT

Definition: IfxGtm_PinMap.c:172

IfxGtm_TOM0_6N_TOUT54_P21_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT54_P21_3_OUT

Definition: IfxGtm_PinMap.c:1694

IfxGtm_ATOM1_4_TOUT14_P00_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT14_P00_5_OUT

Definition: IfxGtm_PinMap.c:228

IfxGtm_Tim_TinMap::channel

IfxGtm_Tim_Ch channel

TIM channel index.

Definition: IfxGtm_PinMap.h:104

IfxGtm_TOM3_3N_TOUT212_P26_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT212_P26_0_OUT

Definition: IfxGtm_PinMap.c:2239

IfxGtm_TOM3_1N_TOUT268_P10_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_1N_TOUT268_P10_13_OUT

Definition: IfxGtm_PinMap.c:2209

IfxGtm_TOM2_0N_TOUT76_P15_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT76_P15_5_OUT

Definition: IfxGtm_PinMap.c:1990

IfxGtm_ATOM0_1_TOUT54_P21_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT54_P21_3_OUT

Definition: IfxGtm_PinMap.c:72

IfxGtm_ATOM0_5_TOUT58_P21_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT58_P21_7_OUT

Definition: IfxGtm_PinMap.c:132

IfxGtm_TOM1_3_TOUT244_P15_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT244_P15_12_OUT

Definition: IfxGtm_PinMap.c:1848

IfxGtm_TOM3_0_TOUT115_P01_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_0_TOUT115_P01_7_OUT

Definition: IfxGtm_PinMap.c:2165

IfxGtm_TOM2_6N_TOUT108_P10_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT108_P10_6_OUT

Definition: IfxGtm_PinMap.c:2117

IfxGtm_TIM4_3_P10_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P10_5_IN

Definition: IfxGtm_PinMap.c:1305

IfxGtm_ATOM4_3_TOUT105_P10_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3_TOUT105_P10_3_OUT

Definition: IfxGtm_PinMap.c:560

IfxGtm_ATOM2_6_TOUT92_P13_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT92_P13_1_OUT

Definition: IfxGtm_PinMap.c:379

IfxGtm_TIM1_2_P33_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P33_11_IN

Definition: IfxGtm_PinMap.c:1028

IfxGtm_ATOM4_4_TOUT81_P14_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT81_P14_1_OUT

Definition: IfxGtm_PinMap.c:583

IfxGtm_TIM5_1_P02_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P02_15_IN

Definition: IfxGtm_PinMap.c:1375

IfxGtm_ATOM4_4N_TOUT56_P21_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT56_P21_5_OUT

Definition: IfxGtm_PinMap.c:571

IfxGtm_TOM3_3N_TOUT180_P31_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT180_P31_6_OUT

Definition: IfxGtm_PinMap.c:2237

IfxGtm_TOM0_11_TOUT13_P00_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT13_P00_4_OUT

Definition: IfxGtm_PinMap.c:1543

IfxGtm_TIM2_2_P11_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P11_3_IN

Definition: IfxGtm_PinMap.c:1093

IfxGtm_TOM4_3_TOUT193_P30_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_3_TOUT193_P30_3_OUT

Definition: IfxGtm_PinMap.c:2359

IfxGtm_TIM2_0_P31_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P31_0_IN

Definition: IfxGtm_PinMap.c:1078

IfxGtm_ATOM8_6_TOUT236_P24_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_6_TOUT236_P24_14_OUT

Definition: IfxGtm_PinMap.c:910

IfxGtm_TIM0_2_P21_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P21_4_IN

Definition: IfxGtm_PinMap.c:951

IfxGtm_TOM3_2_TOUT208_P25_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT208_P25_2_OUT

Definition: IfxGtm_PinMap.c:2231

IfxGtm_ATOM7_5_TOUT227_P24_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_5_TOUT227_P24_5_OUT

Definition: IfxGtm_PinMap.c:858

IfxGtm_ATOM0_7_TOUT7_P02_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT7_P02_7_OUT

Definition: IfxGtm_PinMap.c:156

IfxGtm_TOM1_2N_TOUT23_P33_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT23_P33_1_OUT

Definition: IfxGtm_PinMap.c:1823

IfxGtm_ATOM7_4_TOUT167_P00_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_4_TOUT167_P00_13_OUT

Definition: IfxGtm_PinMap.c:850

IfxGtm_TOM2_1N_TOUT254_P13_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT254_P13_5_OUT

Definition: IfxGtm_PinMap.c:2035

IfxGtm_TIM0_0_P15_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P15_6_IN

Definition: IfxGtm_PinMap.c:929

IfxGtm_ATOM1_4_TOUT61_P20_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT61_P20_3_OUT

Definition: IfxGtm_PinMap.c:232

IfxGtm_TOM2_3N_TOUT256_P13_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_3N_TOUT256_P13_7_OUT

Definition: IfxGtm_PinMap.c:2071

IfxGtm_TOM4_7_TOUT161_P01_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_7_TOUT161_P01_13_OUT

Definition: IfxGtm_PinMap.c:2379

IfxGtm_ATOM1_0_TOUT0_P02_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT0_P02_0_OUT

Definition: IfxGtm_PinMap.c:160

IfxGtm_Tim_3

TIM object 3.

Definition: IfxGtm_cfg.h:395

IfxGtm_ATOM3_6_TOUT62_P20_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT62_P20_6_OUT

Definition: IfxGtm_PinMap.c:498

IfxGtm_TIM5_0_P02_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P02_12_IN

Definition: IfxGtm_PinMap.c:1365

IfxGtm_TIM0_2_P33_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P33_6_IN

Definition: IfxGtm_PinMap.c:954

IfxGtm_ATOM7_3_TOUT255_P13_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_3_TOUT255_P13_6_OUT

Definition: IfxGtm_PinMap.c:848

IfxGtm_ATOM0_1_TOUT10_P00_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT10_P00_1_OUT

Definition: IfxGtm_PinMap.c:66

IfxGtm_TIM0_4_P33_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P33_8_IN

Definition: IfxGtm_PinMap.c:974

IfxGtm_TOM4_7_TOUT197_P30_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_7_TOUT197_P30_7_OUT

Definition: IfxGtm_PinMap.c:2380

IfxGtm_TOM3_5_TOUT159_P01_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_5_TOUT159_P01_1_OUT

Definition: IfxGtm_PinMap.c:2270

IfxGtm_TOM2_7_TOUT64_P20_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_7_TOUT64_P20_8_OUT

Definition: IfxGtm_PinMap.c:2146

IfxGtm_TOM0_4N_TOUT1_P02_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT1_P02_1_OUT

Definition: IfxGtm_PinMap.c:1630

IfxGtm_TOM0_3N_TOUT109_P10_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT109_P10_7_OUT

Definition: IfxGtm_PinMap.c:1605

IfxGtm_ATOM6_7_TOUT264_P13_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_7_TOUT264_P13_15_OUT

Definition: IfxGtm_PinMap.c:821

IfxGtm_TIM1_3_P23_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P23_7_IN

Definition: IfxGtm_PinMap.c:1037

IfxGtm_TIM0_1_P10_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P10_9_IN

Definition: IfxGtm_PinMap.c:937

IfxGtm_TOM0_6_TOUT92_P13_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT92_P13_1_OUT

Definition: IfxGtm_PinMap.c:1715

IfxGtm_ATOM3_3N_TOUT24_P33_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT24_P33_2_OUT

Definition: IfxGtm_PinMap.c:444

IfxGtm_ATOM0_6_TOUT106_P10_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT106_P10_4_OUT

Definition: IfxGtm_PinMap.c:141

IfxGtm_TOM4_4_TOUT111_P01_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_4_TOUT111_P01_3_OUT

Definition: IfxGtm_PinMap.c:2362

IfxGtm_TIM4_0_P10_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P10_8_IN

Definition: IfxGtm_PinMap.c:1265

IfxGtm_TIM6_0_P31_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P31_8_IN

Definition: IfxGtm_PinMap.c:1456

IfxGtm_ATOM6_6_TOUT256_P13_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_6_TOUT256_P13_7_OUT

Definition: IfxGtm_PinMap.c:814

IfxGtm_TOM4_0_TOUT222_P24_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_0_TOUT222_P24_0_OUT

Definition: IfxGtm_PinMap.c:2315

IfxGtm_ATOM3_2_TOUT63_P20_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT63_P20_7_OUT

Definition: IfxGtm_PinMap.c:436

IfxGtm_TOM3_11_TOUT166_P00_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_11_TOUT166_P00_14_OUT

Definition: IfxGtm_PinMap.c:2177

IfxGtm_ATOM3_4_TOUT167_P00_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT167_P00_13_OUT

Definition: IfxGtm_PinMap.c:465

IfxGtm_TOM3_10_TOUT164_P01_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_10_TOUT164_P01_14_OUT

Definition: IfxGtm_PinMap.c:2171

IfxGtm_TIM5_0_P24_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P24_8_IN

Definition: IfxGtm_PinMap.c:1368

IfxGtm_TIM1_3_P02_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P02_3_IN

Definition: IfxGtm_PinMap.c:1031

IfxGtm_TIM4_3_P00_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P00_12_IN

Definition: IfxGtm_PinMap.c:1300

IfxGtm_TIM2_4_P21_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P21_0_IN

Definition: IfxGtm_PinMap.c:1119

IfxGtm_TIM3_6_P20_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P20_10_IN

Definition: IfxGtm_PinMap.c:1241

IfxGtm_TOM2_8_TOUT258_P14_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_8_TOUT258_P14_11_OUT

Definition: IfxGtm_PinMap.c:2151

IfxGtm_TOM2_3_TOUT126_P11_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT126_P11_14_OUT

Definition: IfxGtm_PinMap.c:2076

IfxGtm_TOM0_7N_TOUT79_P15_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT79_P15_8_OUT

Definition: IfxGtm_PinMap.c:1729

IfxGtm_TIM2_0_P00_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P00_0_IN

Definition: IfxGtm_PinMap.c:1070

IfxGtm_ATOM2_2N_TOUT138_P23_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT138_P23_6_OUT

Definition: IfxGtm_PinMap.c:313

IfxGtm_TIM4_2_P30_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P30_2_IN

Definition: IfxGtm_PinMap.c:1299

IfxGtm_TOM2_14_TOUT36_P32_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_14_TOUT36_P32_0_OUT

Definition: IfxGtm_PinMap.c:2026

IfxGtm_ATOM4_6N_TOUT19_P00_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6N_TOUT19_P00_10_OUT

Definition: IfxGtm_PinMap.c:601

IfxGtm_TOM2_4N_TOUT122_P11_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT122_P11_5_OUT

Definition: IfxGtm_PinMap.c:2086

IfxGtm_TOM3_12_TOUT268_P10_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_12_TOUT268_P10_13_OUT

Definition: IfxGtm_PinMap.c:2186

IfxGtm_ATOM4_6N_TOUT78_P15_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6N_TOUT78_P15_7_OUT

Definition: IfxGtm_PinMap.c:602

IfxGtm_TOM0_5_TOUT74_P15_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT74_P15_3_OUT

Definition: IfxGtm_PinMap.c:1682

IfxGtm_ATOM4_7_TOUT64_P20_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7_TOUT64_P20_8_OUT

Definition: IfxGtm_PinMap.c:622

IfxGtm_ATOM2_3_TOUT97_P11_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT97_P11_6_OUT

Definition: IfxGtm_PinMap.c:345

IfxGtm_TOM1_7N_TOUT12_P00_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT12_P00_3_OUT

Definition: IfxGtm_PinMap.c:1944

IfxGtm_TOM1_1_TOUT1_P02_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT1_P02_1_OUT

Definition: IfxGtm_PinMap.c:1814

IfxGtm_ATOM1_2_TOUT107_P10_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT107_P10_5_OUT

Definition: IfxGtm_PinMap.c:194

IfxGtm_TOM0_8_TOUT48_P22_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT48_P22_1_OUT

Definition: IfxGtm_PinMap.c:1748

IfxGtm_TOM4_7_TOUT229_P24_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_7_TOUT229_P24_7_OUT

Definition: IfxGtm_PinMap.c:2381

IfxGtm_TOM0_8_TOUT51_P21_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT51_P21_0_OUT

Definition: IfxGtm_PinMap.c:1749

IfxGtm_TIM6_7_P23_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P23_0_IN

Definition: IfxGtm_PinMap.c:1512

IfxGtm_ATOM1_6_TOUT42_P23_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT42_P23_1_OUT

Definition: IfxGtm_PinMap.c:263

IfxGtm_TOM0_3N_TOUT75_P15_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT75_P15_4_OUT

Definition: IfxGtm_PinMap.c:1614

IfxGtm_TOM1_11_TOUT60_P20_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT60_P20_1_OUT

Definition: IfxGtm_PinMap.c:1781

IfxGtm_TOM1_6_TOUT4_P02_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT4_P02_4_OUT

Definition: IfxGtm_PinMap.c:1937

IfxGtm_ATOM7_2_TOUT243_P15_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_2_TOUT243_P15_11_OUT

Definition: IfxGtm_PinMap.c:839

IfxGtm_TIM4_2_P00_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P00_11_IN

Definition: IfxGtm_PinMap.c:1287

IfxGtm_TOM0_6N_TOUT82_P14_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT82_P14_2_OUT

Definition: IfxGtm_PinMap.c:1698

IfxGtm_TOM1_5N_TOUT37_P32_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT37_P32_1_OUT

Definition: IfxGtm_PinMap.c:1890

IfxGtm_ATOM4_1_TOUT86_P14_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT86_P14_6_OUT

Definition: IfxGtm_PinMap.c:537

IfxGtm_TOM0_6_TOUT4_P02_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT4_P02_4_OUT

Definition: IfxGtm_PinMap.c:1710

IfxGtm_ATOM7_6_TOUT196_P30_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_6_TOUT196_P30_6_OUT

Definition: IfxGtm_PinMap.c:864

IfxGtm_TOM3_4N_TOUT244_P15_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_4N_TOUT244_P15_12_OUT

Definition: IfxGtm_PinMap.c:2253

IfxGtm_TIM5_0_P01_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P01_12_IN

Definition: IfxGtm_PinMap.c:1363

IfxGtm_ATOM3_3N_TOUT92_P13_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT92_P13_1_OUT

Definition: IfxGtm_PinMap.c:449

IfxGtm_TIM6_6_P30_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P30_14_IN

Definition: IfxGtm_PinMap.c:1507

IfxGtm_TOM2_0_TOUT94_P13_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT94_P13_3_OUT

Definition: IfxGtm_PinMap.c:1999

IfxGtm_TIM2_6_P34_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P34_4_IN

Definition: IfxGtm_PinMap.c:1145

IfxGtm_TIM1_2_P10_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P10_2_IN

Definition: IfxGtm_PinMap.c:1022

IfxGtm_ATOM5_4N_TOUT209_P25_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4N_TOUT209_P25_3_OUT

Definition: IfxGtm_PinMap.c:710

IfxGtm_ATOM6_4_TOUT218_P25_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT218_P25_12_OUT

Definition: IfxGtm_PinMap.c:799

IfxGtm_ATOM4_4N_TOUT95_P11_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT95_P11_2_OUT

Definition: IfxGtm_PinMap.c:574

IfxGtm_TOM3_1N_TOUT178_P31_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_1N_TOUT178_P31_4_OUT

Definition: IfxGtm_PinMap.c:2206

IfxGtm_TOM1_2_TOUT70_P20_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT70_P20_14_OUT

Definition: IfxGtm_PinMap.c:1836

IfxGtm_TOM0_5N_TOUT56_P21_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT56_P21_5_OUT

Definition: IfxGtm_PinMap.c:1666

IfxGtm_TIM3_5_P25_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P25_5_IN

Definition: IfxGtm_PinMap.c:1231

IfxGtm_TOM0_1_TOUT54_P21_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT54_P21_3_OUT

Definition: IfxGtm_PinMap.c:1582

IfxGtm_TIM6_6_P23_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P23_1_IN

Definition: IfxGtm_PinMap.c:1503

IfxGtm_ATOM5_4_TOUT150_P34_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT150_P34_5_OUT

Definition: IfxGtm_PinMap.c:714

IfxGtm_TIM6_2_P31_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P31_10_IN

Definition: IfxGtm_PinMap.c:1474

IfxGtm_ATOM6_3_TOUT260_P14_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT260_P14_13_OUT

Definition: IfxGtm_PinMap.c:794

IfxGtm_TOM3_12_TOUT167_P00_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_12_TOUT167_P00_13_OUT

Definition: IfxGtm_PinMap.c:2183

IfxGtm_TOM0_5N_TOUT87_P14_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT87_P14_7_OUT

Definition: IfxGtm_PinMap.c:1670

IfxGtm_TOM3_3_TOUT165_P01_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_3_TOUT165_P01_11_OUT

Definition: IfxGtm_PinMap.c:2244

IfxGtm_ATOM5_1_TOUT175_P31_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT175_P31_1_OUT

Definition: IfxGtm_PinMap.c:658

IfxGtm_TIM3_0_P22_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P22_4_IN

Definition: IfxGtm_PinMap.c:1167

IfxGtm_ATOM1_1N_TOUT72_P15_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1N_TOUT72_P15_1_OUT

Definition: IfxGtm_PinMap.c:174

IfxGtm_TOM2_2_TOUT96_P11_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT96_P11_3_OUT

Definition: IfxGtm_PinMap.c:2067

IfxGtm_ATOM6_0_TOUT127_P11_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT127_P11_15_OUT

Definition: IfxGtm_PinMap.c:763

IfxGtm_TIM1_6_P14_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_6_P14_3_IN

Definition: IfxGtm_PinMap.c:1059

IfxGtm_TIM4_4_P25_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P25_12_IN

Definition: IfxGtm_PinMap.c:1322

IfxGtm_ATOM3_0N_TOUT17_P00_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT17_P00_8_OUT

Definition: IfxGtm_PinMap.c:392

IfxGtm_TOM1_7N_TOUT7_P02_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT7_P02_7_OUT

Definition: IfxGtm_PinMap.c:1957

IfxGtm_TOM2_0N_TOUT51_P21_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT51_P21_0_OUT

Definition: IfxGtm_PinMap.c:1988

IfxGtm_ToutSel_b

Definition: IfxGtm_PinMap.h:86

IfxGtm_ATOM3_6_TOUT168_P00_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT168_P00_15_OUT

Definition: IfxGtm_PinMap.c:496

IfxGtm_TOM3_5N_TOUT155_P01_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_5N_TOUT155_P01_0_OUT

Definition: IfxGtm_PinMap.c:2263

IfxGtm_ATOM1_6N_TOUT116_P02_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT116_P02_9_OUT

Definition: IfxGtm_PinMap.c:253

IfxGtm_TOM1_1N_TOUT14_P00_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT14_P00_5_OUT

Definition: IfxGtm_PinMap.c:1802

IfxGtm_TIM6_1_P30_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P30_9_IN

Definition: IfxGtm_PinMap.c:1464

IfxGtm_ATOM5_1N_TOUT260_P14_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT260_P14_13_OUT

Definition: IfxGtm_PinMap.c:651

IfxGtm_Tom_Ch_0

TOM channel 0.

Definition: IfxGtm_cfg.h:431

IfxGtm_ATOM3_7N_TOUT28_P33_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7N_TOUT28_P33_6_OUT

Definition: IfxGtm_PinMap.c:501

IfxGtm_TOM4_3_TOUT253_P13_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_3_TOUT253_P13_4_OUT

Definition: IfxGtm_PinMap.c:2361

IfxGtm_ATOM3_0_TOUT65_P20_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT65_P20_9_OUT

Definition: IfxGtm_PinMap.c:401

IfxGtm_TIM0_3_P32_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P32_2_IN

Definition: IfxGtm_PinMap.c:964

IfxGtm_ATOM4_1N_TOUT57_P21_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT57_P21_6_OUT

Definition: IfxGtm_PinMap.c:525

IfxGtm_TIM1_6_P33_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_6_P33_2_IN

Definition: IfxGtm_PinMap.c:1063

IfxGtm_TIM3_6_P25_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P25_6_IN

Definition: IfxGtm_PinMap.c:1244

IfxGtm_TOM1_3_TOUT71_P15_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT71_P15_0_OUT

Definition: IfxGtm_PinMap.c:1852

IfxGtm_ATOM3_4N_TOUT21_P00_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4N_TOUT21_P00_12_OUT

Definition: IfxGtm_PinMap.c:458

IfxGtm_ATOM0_2N_TOUT5_P02_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT5_P02_5_OUT

Definition: IfxGtm_PinMap.c:82

IfxGtm_TOM3_4N_TOUT209_P25_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_4N_TOUT209_P25_3_OUT

Definition: IfxGtm_PinMap.c:2252

IfxGtm_TOM1_12_TOUT34_P33_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT34_P33_12_OUT

Definition: IfxGtm_PinMap.c:1784

IfxGtm_TOM3_11_TOUT185_P31_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_11_TOUT185_P31_11_OUT

Definition: IfxGtm_PinMap.c:2178

IfxGtm_TOM0_6N_TOUT30_P33_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT30_P33_8_OUT

Definition: IfxGtm_PinMap.c:1689

IfxGtm_ATOM2_0N_TOUT101_P11_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0N_TOUT101_P11_12_OUT

Definition: IfxGtm_PinMap.c:282

IfxGtm_ATOM3_6N_TOUT95_P11_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6N_TOUT95_P11_2_OUT

Definition: IfxGtm_PinMap.c:492

IfxGtm_TOM2_5_TOUT103_P10_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_5_TOUT103_P10_1_OUT

Definition: IfxGtm_PinMap.c:2110

IfxGtm_ATOM3_1_TOUT95_P11_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT95_P11_2_OUT

Definition: IfxGtm_PinMap.c:420

IfxGtm_ATOM5_4_TOUT248_P13_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT248_P13_9_OUT

Definition: IfxGtm_PinMap.c:719

IfxGtm_TOM1_9_TOUT1_P02_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT1_P02_1_OUT

Definition: IfxGtm_PinMap.c:1982

IfxGtm_TOM2_11_TOUT71_P15_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_11_TOUT71_P15_0_OUT

Definition: IfxGtm_PinMap.c:2012

IfxGtm_TOM1_6N_TOUT149_P34_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT149_P34_4_OUT

Definition: IfxGtm_PinMap.c:1914

IfxGtm_TOM2_3_TOUT60_P20_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT60_P20_1_OUT

Definition: IfxGtm_PinMap.c:2080

IfxGtm_TIM6_3_P01_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P01_15_IN

Definition: IfxGtm_PinMap.c:1475

IfxGtm_TOM0_5_TOUT96_P11_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT96_P11_3_OUT

Definition: IfxGtm_PinMap.c:1685

IfxGtm_ATOM7_4_TOUT268_P10_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_4_TOUT268_P10_13_OUT

Definition: IfxGtm_PinMap.c:855

IfxGtm_TOM3_6_TOUT212_P26_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_6_TOUT212_P26_0_OUT

Definition: IfxGtm_PinMap.c:2285

IfxGtm_TOM1_6N_TOUT10_P00_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT10_P00_1_OUT

Definition: IfxGtm_PinMap.c:1912

IfxGtm_ATOM1_3_TOUT118_P02_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT118_P02_11_OUT

Definition: IfxGtm_PinMap.c:210

IfxGtm_TIM3_4_P22_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P22_8_IN

Definition: IfxGtm_PinMap.c:1218

IfxGtm_TOM4_6_TOUT117_P02_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_6_TOUT117_P02_10_OUT

Definition: IfxGtm_PinMap.c:2373

IfxGtm_TOM3_1N_TOUT135_P22_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_1N_TOUT135_P22_9_OUT

Definition: IfxGtm_PinMap.c:2204

IfxGtm_TIM5_0_P01_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P01_8_IN

Definition: IfxGtm_PinMap.c:1364

IfxGtm_TOM3_10_TOUT184_P31_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_10_TOUT184_P31_10_OUT

Definition: IfxGtm_PinMap.c:2172

IfxGtm_TOM1_0N_TOUT17_P00_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0N_TOUT17_P00_8_OUT

Definition: IfxGtm_PinMap.c:1759

IfxGtm_ATOM0_1N_TOUT41_P23_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT41_P23_0_OUT

Definition: IfxGtm_PinMap.c:59

IfxGtm_ATOM4_7_TOUT118_P02_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7_TOUT118_P02_11_OUT

Definition: IfxGtm_PinMap.c:618

IfxGtm_TOM0_2N_TOUT11_P00_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT11_P00_2_OUT

Definition: IfxGtm_PinMap.c:1586

IfxGtm_TIM3_1_P13_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P13_10_IN

Definition: IfxGtm_PinMap.c:1177

IfxGtm_TIM0_2_P23_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P23_5_IN

Definition: IfxGtm_PinMap.c:952

IfxGtm_ATOM1_4N_TOUT75_P15_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT75_P15_4_OUT

Definition: IfxGtm_PinMap.c:224

IfxGtm_TOM4_0_TOUT155_P01_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_0_TOUT155_P01_0_OUT

Definition: IfxGtm_PinMap.c:2312

IfxGtm_TOM2_4_TOUT98_P11_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT98_P11_9_OUT

Definition: IfxGtm_PinMap.c:2102

IfxGtm_TOM1_1_TOUT31_P33_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT31_P33_9_OUT

Definition: IfxGtm_PinMap.c:1817

IfxGtm_TOM3_0_TOUT110_P10_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_0_TOUT110_P10_8_OUT

Definition: IfxGtm_PinMap.c:2164

IfxGtm_TOM2_1N_TOUT124_P11_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT124_P11_8_OUT

Definition: IfxGtm_PinMap.c:2034

IfxGtm_TOM3_14_TOUT270_P10_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_14_TOUT270_P10_15_OUT

Definition: IfxGtm_PinMap.c:2197

IfxGtm_TOM1_4_TOUT39_P32_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT39_P32_3_OUT

Definition: IfxGtm_PinMap.c:1876

IfxGtm_ATOM1_5N_TOUT0_P02_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT0_P02_0_OUT

Definition: IfxGtm_PinMap.c:234

IfxGtm_ATOM2_2N_TOUT106_P10_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT106_P10_4_OUT

Definition: IfxGtm_PinMap.c:310

IfxGtm_TOM0_6_TOUT98_P11_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT98_P11_9_OUT

Definition: IfxGtm_PinMap.c:1716

IfxGtm_TOM2_12_TOUT262_P13_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_12_TOUT262_P13_13_OUT

Definition: IfxGtm_PinMap.c:2015

IfxGtm_TOM2_7N_TOUT55_P21_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT55_P21_4_OUT

Definition: IfxGtm_PinMap.c:2137

IfxGtm_TIM5_1_P31_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P31_9_IN

Definition: IfxGtm_PinMap.c:1381

IfxGtm_ATOM0_2N_TOUT65_P20_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT65_P20_9_OUT

Definition: IfxGtm_PinMap.c:83

IfxGtm_Atom_0

ATOM object 0.

Definition: IfxGtm_cfg.h:245

IfxGtm_ATOM1_0N_TOUT7_P02_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0N_TOUT7_P02_7_OUT

Definition: IfxGtm_PinMap.c:159

IfxGtm_TOM0_6N_TOUT40_P32_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT40_P32_4_OUT

Definition: IfxGtm_PinMap.c:1692

IfxGtm_TOM2_2_TOUT88_P14_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT88_P14_8_OUT

Definition: IfxGtm_PinMap.c:2066

IfxGtm_ATOM0_7_TOUT64_P20_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT64_P20_8_OUT

Definition: IfxGtm_PinMap.c:155

IfxGtm_TOM0_6_TOUT106_P10_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT106_P10_4_OUT

Definition: IfxGtm_PinMap.c:1703

IfxGtm_TIM4_2_P24_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P24_2_IN

Definition: IfxGtm_PinMap.c:1297

IfxGtm_TIM5_4_P13_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P13_5_IN

Definition: IfxGtm_PinMap.c:1406

IfxGtm_TOM3_7N_TOUT176_P31_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_7N_TOUT176_P31_2_OUT

Definition: IfxGtm_PinMap.c:2290

IfxGtm_TOM3_8_TOUT162_P01_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_8_TOUT162_P01_8_OUT

Definition: IfxGtm_PinMap.c:2300

IfxGtm_TOM2_14_TOUT264_P13_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_14_TOUT264_P13_15_OUT

Definition: IfxGtm_PinMap.c:2025

IfxGtm_TOM1_5_TOUT40_P32_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT40_P32_4_OUT

Definition: IfxGtm_PinMap.c:1904

IfxGtm_ATOM5_1N_TOUT178_P31_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT178_P31_4_OUT

Definition: IfxGtm_PinMap.c:647

IfxGtm_TIM1_6_P10_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_6_P10_4_IN

Definition: IfxGtm_PinMap.c:1058

IfxGtm_TIM6_1_P25_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P25_1_IN

Definition: IfxGtm_PinMap.c:1463

IfxGtm_TOM1_6_TOUT16_P00_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT16_P00_7_OUT

Definition: IfxGtm_PinMap.c:1931

IfxGtm_ATOM5_0_TOUT249_P13_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT249_P13_12_OUT

Definition: IfxGtm_PinMap.c:640

IfxGtm_TOM0_12_TOUT44_P23_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT44_P23_3_OUT

Definition: IfxGtm_PinMap.c:1549

IfxGtm_TOM1_7_TOUT70_P20_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT70_P20_14_OUT

Definition: IfxGtm_PinMap.c:1971

IfxGtm_TIM1_0_P10_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P10_7_IN

Definition: IfxGtm_PinMap.c:1003

IfxGtm_TIM3_0_P00_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P00_5_IN

Definition: IfxGtm_PinMap.c:1158

IfxGtm_TIM1_1_P21_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P21_3_IN

Definition: IfxGtm_PinMap.c:1016

IfxGtm_TOM1_3_TOUT29_P33_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT29_P33_7_OUT

Definition: IfxGtm_PinMap.c:1849

IfxGtm_TOM1_7N_TOUT130_P22_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT130_P22_4_OUT

Definition: IfxGtm_PinMap.c:1945

IfxGtm_TIM0_4_P32_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P32_3_IN

Definition: IfxGtm_PinMap.c:972

IfxGtm_ATOM2_1N_TOUT34_P33_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT34_P33_12_OUT

Definition: IfxGtm_PinMap.c:298

IfxGtm_TOM1_2N_TOUT40_P32_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT40_P32_4_OUT

Definition: IfxGtm_PinMap.c:1825

IfxGtm_TIM4_1_P21_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P21_1_IN

Definition: IfxGtm_PinMap.c:1282

IfxGtm_TIM2_1_P00_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P00_2_IN

Definition: IfxGtm_PinMap.c:1082

IfxGtm_ATOM1_5_TOUT15_P00_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT15_P00_6_OUT

Definition: IfxGtm_PinMap.c:244

IfxGtm_TIM4_7_P00_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P00_14_IN

Definition: IfxGtm_PinMap.c:1351

IfxGtm_ATOM1_2N_TOUT5_P02_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT5_P02_5_OUT

Definition: IfxGtm_PinMap.c:191

IfxGtm_ATOM1_2_TOUT33_P33_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT33_P33_11_OUT

Definition: IfxGtm_PinMap.c:198

IfxGtm_TOM0_5_TOUT27_P33_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT27_P33_5_OUT

Definition: IfxGtm_PinMap.c:1676

IfxGtm_TIM2_6_P15_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P15_3_IN

Definition: IfxGtm_PinMap.c:1140

IfxGtm_ATOM3_2N_TOUT99_P11_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT99_P11_10_OUT

Definition: IfxGtm_PinMap.c:431

IfxGtm_TOM0_7_TOUT15_P00_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT15_P00_6_OUT

Definition: IfxGtm_PinMap.c:1736

IfxGtm_TOM0_4_TOUT72_P15_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT72_P15_1_OUT

Definition: IfxGtm_PinMap.c:1651

IfxGtm_TIM5_6_P14_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P14_15_IN

Definition: IfxGtm_PinMap.c:1430

IfxGtm_TOM1_1N_TOUT39_P32_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT39_P32_3_OUT

Definition: IfxGtm_PinMap.c:1807

IfxGtm_TIM3_4_P20_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P20_3_IN

Definition: IfxGtm_PinMap.c:1216

IfxGtm_ATOM6_4_TOUT140_P32_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT140_P32_5_OUT

Definition: IfxGtm_PinMap.c:795

IfxGtm_TOM4_14_TOUT153_P02_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_14_TOUT153_P02_13_OUT

Definition: IfxGtm_PinMap.c:2338

IfxGtm_TOM0_4N_TOUT73_P15_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT73_P15_2_OUT

Definition: IfxGtm_PinMap.c:1636

IfxGtm_TOM0_6N_TOUT86_P14_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT86_P14_6_OUT

Definition: IfxGtm_PinMap.c:1699

IfxGtm_TOM3_10_TOUT266_P10_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_10_TOUT266_P10_10_OUT

Definition: IfxGtm_PinMap.c:2176

IfxGtm_TIM0_0_P14_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P14_5_IN

Definition: IfxGtm_PinMap.c:927

IfxGtm_TIM2_5_P15_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P15_14_IN

Definition: IfxGtm_PinMap.c:1128

IfxGtm_ATOM2_5_TOUT99_P11_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT99_P11_10_OUT

Definition: IfxGtm_PinMap.c:368

IfxGtm_TOM0_2N_TOUT93_P13_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT93_P13_2_OUT

Definition: IfxGtm_PinMap.c:1594

IfxGtm_Tim_4

TIM object 4.

Definition: IfxGtm_cfg.h:396

IfxGtm_TOM1_5N_TOUT97_P11_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT97_P11_6_OUT

Definition: IfxGtm_PinMap.c:1896

IfxGtm_TOM2_4_TOUT123_P11_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT123_P11_7_OUT

Definition: IfxGtm_PinMap.c:2095

IfxGtm_ATOM1_0N_TOUT17_P00_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0N_TOUT17_P00_8_OUT

Definition: IfxGtm_PinMap.c:158

IfxGtm_TIM4_1_P02_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P02_15_IN

Definition: IfxGtm_PinMap.c:1277

IfxGtm_ATOM6_2_TOUT184_P31_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT184_P31_10_OUT

Definition: IfxGtm_PinMap.c:783

IfxGtm_ATOM4_2_TOUT46_P23_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT46_P23_5_OUT

Definition: IfxGtm_PinMap.c:548

IfxGtm_TOM1_5N_TOUT32_P33_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT32_P33_10_OUT

Definition: IfxGtm_PinMap.c:1889

IfxGtm_ATOM2_7N_TOUT28_P33_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7N_TOUT28_P33_6_OUT

Definition: IfxGtm_PinMap.c:380

IfxGtm_ATOM3_2N_TOUT114_P01_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT114_P01_6_OUT

Definition: IfxGtm_PinMap.c:421

IfxGtm_ATOM7_5_TOUT246_P15_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_5_TOUT246_P15_14_OUT

Definition: IfxGtm_PinMap.c:859

IfxGtm_TIM2_4_P02_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P02_14_IN

Definition: IfxGtm_PinMap.c:1112

IfxGtm_TIM3_3_P14_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P14_13_IN

Definition: IfxGtm_PinMap.c:1201

IfxGtm_ATOM2_5_TOUT52_P21_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT52_P21_1_OUT

Definition: IfxGtm_PinMap.c:365

IfxGtm_ATOM6_0_TOUT162_P01_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT162_P01_8_OUT

Definition: IfxGtm_PinMap.c:766

IfxGtm_ATOM2_3N_TOUT168_P00_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT168_P00_15_OUT

Definition: IfxGtm_PinMap.c:334

IfxGtm_ATOM4_3N_TOUT74_P15_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3N_TOUT74_P15_3_OUT

Definition: IfxGtm_PinMap.c:558

IfxGtm_ATOM5_2_TOUT157_P01_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT157_P01_15_OUT

Definition: IfxGtm_PinMap.c:677

IfxGtm_ATOM3_6N_TOUT60_P20_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6N_TOUT60_P20_1_OUT

Definition: IfxGtm_PinMap.c:490

IfxGtm_TOM1_6N_TOUT78_P15_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT78_P15_7_OUT

Definition: IfxGtm_PinMap.c:1926

IfxGtm_ATOM1_1_TOUT103_P10_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT103_P10_1_OUT

Definition: IfxGtm_PinMap.c:175

IfxGtm_ATOM0_7N_TOUT12_P00_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7N_TOUT12_P00_3_OUT

Definition: IfxGtm_PinMap.c:148

IfxGtm_TOM0_15_TOUT7_P02_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT7_P02_7_OUT

Definition: IfxGtm_PinMap.c:1562

IfxGtm_Tom_Ch_11

TOM channel 11.

Definition: IfxGtm_cfg.h:442

IfxGtm_TOM1_7_TOUT17_P00_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT17_P00_8_OUT

Definition: IfxGtm_PinMap.c:1962

IfxGtm_TOM1_14_TOUT6_P02_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT6_P02_6_OUT

Definition: IfxGtm_PinMap.c:1796

IfxGtm_ATOM3_1N_TOUT90_P14_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT90_P14_10_OUT

Definition: IfxGtm_PinMap.c:410

IfxGtm_TOM1_3_TOUT118_P02_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT118_P02_11_OUT

Definition: IfxGtm_PinMap.c:1845

IfxGtm_TOM1_6N_TOUT31_P33_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT31_P33_9_OUT

Definition: IfxGtm_PinMap.c:1920

IfxGtm_ATOM2_5N_TOUT87_P14_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5N_TOUT87_P14_7_OUT

Definition: IfxGtm_PinMap.c:360

IfxGtm_TIM6_0_P20_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P20_6_IN

Definition: IfxGtm_PinMap.c:1451

IfxGtm_TOM4_10_TOUT164_P01_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_10_TOUT164_P01_14_OUT

Definition: IfxGtm_PinMap.c:2317

IfxGtm_ATOM4_0_TOUT85_P14_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT85_P14_5_OUT

Definition: IfxGtm_PinMap.c:519

IfxGtm_TIM0_5_P23_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P23_0_IN

Definition: IfxGtm_PinMap.c:981

IfxGtm_TOM3_2_TOUT157_P01_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT157_P01_15_OUT

Definition: IfxGtm_PinMap.c:2228

IfxGtm_TOM3_1N_TOUT158_P01_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_1N_TOUT158_P01_12_OUT

Definition: IfxGtm_PinMap.c:2205

IfxGtm_ATOM2_4N_TOUT57_P21_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4N_TOUT57_P21_6_OUT

Definition: IfxGtm_PinMap.c:347

IfxGtm_TOM0_1_TOUT27_P33_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT27_P33_5_OUT

Definition: IfxGtm_PinMap.c:1580

IfxGtm_ATOM6_1_TOUT258_P14_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT258_P14_11_OUT

Definition: IfxGtm_PinMap.c:778

IfxGtm_TIM3_1_P11_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P11_2_IN

Definition: IfxGtm_PinMap.c:1175

IfxGtm_TIM2_3_P15_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P15_0_IN

Definition: IfxGtm_PinMap.c:1106

IfxGtm_Tom_3

TOM object 3.

Definition: IfxGtm_cfg.h:422

IfxGtm_TOM1_5_TOUT96_P11_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT96_P11_3_OUT

Definition: IfxGtm_PinMap.c:1911

IfxGtm_ToutSel_k

Definition: IfxGtm_PinMap.h:95

IfxGtm_TIM3_2_P00_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P00_3_IN

Definition: IfxGtm_PinMap.c:1184

IfxGtm_TOM2_1_TOUT95_P11_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_1_TOUT95_P11_2_OUT

Definition: IfxGtm_PinMap.c:2051

IfxGtm_ATOM5_3_TOUT163_P01_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT163_P01_10_OUT

Definition: IfxGtm_PinMap.c:698

IfxGtm_ATOM1_0_TOUT9_P00_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT9_P00_0_OUT

Definition: IfxGtm_PinMap.c:167

IfxGtm_TOM3_4_TOUT110_P10_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT110_P10_8_OUT

Definition: IfxGtm_PinMap.c:2254

IfxGtm_ATOM5_3_TOUT165_P01_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT165_P01_11_OUT

Definition: IfxGtm_PinMap.c:699

IfxGtm_TOM0_2N_TOUT40_P32_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT40_P32_4_OUT

Definition: IfxGtm_PinMap.c:1590

IfxGtm_ATOM5_6_TOUT160_P01_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT160_P01_9_OUT

Definition: IfxGtm_PinMap.c:744

IfxGtm_ATOM1_1N_TOUT61_P20_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1N_TOUT61_P20_3_OUT

Definition: IfxGtm_PinMap.c:173

IfxGtm_TOM0_2N_TOUT74_P15_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT74_P15_3_OUT

Definition: IfxGtm_PinMap.c:1593

IfxGtm_TIM3_3_P00_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P00_8_IN

Definition: IfxGtm_PinMap.c:1197

IfxGtm_ATOM6_6_TOUT220_P25_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_6_TOUT220_P25_14_OUT

Definition: IfxGtm_PinMap.c:813

IfxGtm_TOM3_2_TOUT164_P01_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT164_P01_14_OUT

Definition: IfxGtm_PinMap.c:2229

IfxGtm_ATOM0_4_TOUT61_P20_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT61_P20_3_OUT

Definition: IfxGtm_PinMap.c:120

IfxGtm_TOM3_11_TOUT267_P10_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_11_TOUT267_P10_14_OUT

Definition: IfxGtm_PinMap.c:2182

IfxGtm_ATOM1_0_TOUT87_P14_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT87_P14_7_OUT

Definition: IfxGtm_PinMap.c:165

IfxGtm_ATOM7_5_TOUT195_P30_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_5_TOUT195_P30_5_OUT

Definition: IfxGtm_PinMap.c:857

IfxGtm_ATOM4_5N_TOUT76_P15_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5N_TOUT76_P15_5_OUT

Definition: IfxGtm_PinMap.c:588

IfxGtm_TIM3_2_P22_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P22_6_IN

Definition: IfxGtm_PinMap.c:1192

IfxGtm_ATOM4_1N_TOUT53_P21_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT53_P21_2_OUT

Definition: IfxGtm_PinMap.c:524

IfxGtm_TIM4_0_P02_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P02_12_IN

Definition: IfxGtm_PinMap.c:1263

IfxGtm_TIM0_1_P14_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P14_6_IN

Definition: IfxGtm_PinMap.c:938

IfxGtm_TIM6_0_P23_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P23_7_IN

Definition: IfxGtm_PinMap.c:1452

IfxGtm_ATOM1_6_TOUT24_P33_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT24_P33_2_OUT

Definition: IfxGtm_PinMap.c:262

IfxGtm_ATOM1_3_TOUT108_P10_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT108_P10_6_OUT

Definition: IfxGtm_PinMap.c:209

IfxGtm_ATOM7_5_TOUT168_P00_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_5_TOUT168_P00_15_OUT

Definition: IfxGtm_PinMap.c:856

IfxGtm_TOM4_11_TOUT201_P30_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_11_TOUT201_P30_11_OUT

Definition: IfxGtm_PinMap.c:2323

IfxGtm_TOM3_7_TOUT269_P10_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_7_TOUT269_P10_11_OUT

Definition: IfxGtm_PinMap.c:2299

IfxGtm_TIM4_2_P10_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P10_6_IN

Definition: IfxGtm_PinMap.c:1292

IfxGtm_ATOM6_0_TOUT155_P01_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT155_P01_0_OUT

Definition: IfxGtm_PinMap.c:765

IfxGtm_TOM1_7N_TOUT79_P15_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT79_P15_8_OUT

Definition: IfxGtm_PinMap.c:1956

IfxGtm_ATOM5_3N_TOUT249_P13_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT249_P13_12_OUT

Definition: IfxGtm_PinMap.c:692

IfxGtm_TIM3_7_P34_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P34_4_IN

Definition: IfxGtm_PinMap.c:1259

IfxGtm_TOM2_9_TOUT52_P21_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_9_TOUT52_P21_1_OUT

Definition: IfxGtm_PinMap.c:2157

IfxGtm_TIM2_2_P32_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P32_0_IN

Definition: IfxGtm_PinMap.c:1100

IfxGtm_TIM5_6_P01_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P01_14_IN

Definition: IfxGtm_PinMap.c:1426

IfxGtm_ATOM4_2_TOUT55_P21_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT55_P21_4_OUT

Definition: IfxGtm_PinMap.c:549

IfxGtm_ATOM2_4_TOUT167_P00_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT167_P00_13_OUT

Definition: IfxGtm_PinMap.c:350

IfxGtm_ATOM0_3_TOUT13_P00_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT13_P00_4_OUT

Definition: IfxGtm_PinMap.c:101

IfxGtm_ATOM6_0_TOUT214_P25_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT214_P25_8_OUT

Definition: IfxGtm_PinMap.c:768

IfxGtm_TOM0_3_TOUT56_P21_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT56_P21_5_OUT

Definition: IfxGtm_PinMap.c:1623

IfxPort_InputMode

IfxPort_InputMode

Ifx_P output modification modes definition.

Definition: IfxPort.h:81

IfxGtm_TIM2_6_P31_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P31_6_IN

Definition: IfxGtm_PinMap.c:1144

IfxGtm_TIM4_7_P01_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P01_11_IN

Definition: IfxGtm_PinMap.c:1352

IfxGtm_ATOM7_4_TOUT245_P15_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_4_TOUT245_P15_13_OUT

Definition: IfxGtm_PinMap.c:853

IfxGtm_TIM4_4_P10_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P10_1_IN

Definition: IfxGtm_PinMap.c:1317

IfxGtm_TOM0_0_TOUT87_P14_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT87_P14_7_OUT

Definition: IfxGtm_PinMap.c:1537

IfxGtm_TIM0_6_P01_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P01_4_IN

Definition: IfxGtm_PinMap.c:984

IfxGtm_TOM3_7N_TOUT152_P02_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_7N_TOUT152_P02_15_OUT

Definition: IfxGtm_PinMap.c:2288

IfxGtm_ATOM8_3_TOUT253_P13_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_3_TOUT253_P13_4_OUT

Definition: IfxGtm_PinMap.c:894

IfxGtm_ATOM4_5N_TOUT18_P00_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5N_TOUT18_P00_9_OUT

Definition: IfxGtm_PinMap.c:587

IfxGtm_TOM0_1_TOUT116_P02_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT116_P02_9_OUT

Definition: IfxGtm_PinMap.c:1577

IfxGtm_TIM3_7_P15_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P15_4_IN

Definition: IfxGtm_PinMap.c:1253

IfxGtm_ATOM3_2N_TOUT92_P13_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT92_P13_1_OUT

Definition: IfxGtm_PinMap.c:430

IfxGtm_TOM0_0N_TOUT9_P00_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT9_P00_0_OUT

Definition: IfxGtm_PinMap.c:1526

IfxGtm_TIM5_1_P30_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P30_9_IN

Definition: IfxGtm_PinMap.c:1380

IfxGtm_TOM1_2_TOUT79_P15_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT79_P15_8_OUT

Definition: IfxGtm_PinMap.c:1837

IfxGtm_TOM0_3N_TOUT59_P20_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT59_P20_0_OUT

Definition: IfxGtm_PinMap.c:1611

IfxGtm_ATOM0_0N_TOUT54_P21_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0N_TOUT54_P21_3_OUT

Definition: IfxGtm_PinMap.c:48

IfxGtm_ATOM2_1N_TOUT30_P33_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT30_P33_8_OUT

Definition: IfxGtm_PinMap.c:297

IfxGtm_TIM4_0_P21_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P21_0_IN

Definition: IfxGtm_PinMap.c:1269

IfxGtm_ATOM6_6_TOUT147_P34_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_6_TOUT147_P34_2_OUT

Definition: IfxGtm_PinMap.c:810

IfxGtm_TOM4_3_TOUT165_P01_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_3_TOUT165_P01_11_OUT

Definition: IfxGtm_PinMap.c:2358

IfxGtm_TOM2_7_TOUT93_P13_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_7_TOUT93_P13_2_OUT

Definition: IfxGtm_PinMap.c:2147

IfxGtm_TOM4_15_TOUT233_P24_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_15_TOUT233_P24_11_OUT

Definition: IfxGtm_PinMap.c:2346

IfxGtm_TOM1_7N_TOUT20_P00_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT20_P00_11_OUT

Definition: IfxGtm_PinMap.c:1948

IfxGtm_ATOM8_6_TOUT263_P14_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_6_TOUT263_P14_15_OUT

Definition: IfxGtm_PinMap.c:912

IfxGtm_TIM3_4_P25_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P25_4_IN

Definition: IfxGtm_PinMap.c:1219

IfxGtm_ATOM1_5_TOUT73_P15_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT73_P15_2_OUT

Definition: IfxGtm_PinMap.c:250

IfxGtm_TOM4_5_TOUT195_P30_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_5_TOUT195_P30_5_OUT

Definition: IfxGtm_PinMap.c:2370

IfxGtm_TOM0_6_TOUT42_P23_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT42_P23_1_OUT

Definition: IfxGtm_PinMap.c:1708

IfxGtm_ATOM5_1N_TOUT245_P15_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT245_P15_13_OUT

Definition: IfxGtm_PinMap.c:649

IfxGtm_Tom_0

TOM object 0.

Definition: IfxGtm_cfg.h:419

IfxGtm_TIM3_3_P14_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P14_9_IN

Definition: IfxGtm_PinMap.c:1202

IfxGtm_ATOM6_3_TOUT165_P01_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT165_P01_11_OUT

Definition: IfxGtm_PinMap.c:790

IfxGtm_TIM0_6_P14_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P14_3_IN

Definition: IfxGtm_PinMap.c:988

IfxGtm_ATOM5_5_TOUT246_P15_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT246_P15_14_OUT

Definition: IfxGtm_PinMap.c:732

IfxGtm_ATOM5_0N_TOUT181_P31_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT181_P31_7_OUT

Definition: IfxGtm_PinMap.c:629

IfxGtm_ATOM2_0_TOUT18_P00_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT18_P00_9_OUT

Definition: IfxGtm_PinMap.c:290

IfxGtm_TIM4_7_P11_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P11_15_IN

Definition: IfxGtm_PinMap.c:1355

IfxGtm_ATOM3_6_TOUT36_P32_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT36_P32_0_OUT

Definition: IfxGtm_PinMap.c:497

IfxGtm_TOM2_7N_TOUT134_P22_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT134_P22_8_OUT

Definition: IfxGtm_PinMap.c:2135

IfxPort_Pin::port

Ifx_P * port

Definition: IfxPort.h:248

IfxGtm_TOM1_6_TOUT98_P11_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT98_P11_9_OUT

Definition: IfxGtm_PinMap.c:1942

IfxGtm_TOM1_7N_TOUT71_P15_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT71_P15_0_OUT

Definition: IfxGtm_PinMap.c:1955

IfxGtm_ATOM5_5N_TOUT174_P31_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5N_TOUT174_P31_0_OUT

Definition: IfxGtm_PinMap.c:724

IfxGtm_ATOM5_6N_TOUT158_P01_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6N_TOUT158_P01_12_OUT

Definition: IfxGtm_PinMap.c:737

IfxGtm_TIM2_0_P15_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P15_5_IN

Definition: IfxGtm_PinMap.c:1076

IfxGtm_TIM5_6_P00_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P00_2_IN

Definition: IfxGtm_PinMap.c:1425

IfxGtm_ATOM5_3_TOUT209_P25_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT209_P25_3_OUT

Definition: IfxGtm_PinMap.c:701

IfxGtm_TOM4_12_TOUT230_P24_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_12_TOUT230_P24_8_OUT

Definition: IfxGtm_PinMap.c:2329

IfxGtm_TIM0_3_P14_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P14_0_IN

Definition: IfxGtm_PinMap.c:961

IfxGtm_ATOM8_3_TOUT201_P30_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_3_TOUT201_P30_11_OUT

Definition: IfxGtm_PinMap.c:892

IfxGtm_TOM0_3_TOUT105_P10_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT105_P10_3_OUT

Definition: IfxGtm_PinMap.c:1616

IfxGtm_TIM0_7_P33_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P33_3_IN

Definition: IfxGtm_PinMap.c:1000

IfxGtm_ATOM4_5_TOUT65_P20_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT65_P20_9_OUT

Definition: IfxGtm_PinMap.c:597

IfxGtm_TOM0_4_TOUT64_P20_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT64_P20_8_OUT

Definition: IfxGtm_PinMap.c:1650

IfxGtm_TIM5_3_P01_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P01_13_IN

Definition: IfxGtm_PinMap.c:1393

IfxGtm_TIM4_1_P15_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P15_10_IN

Definition: IfxGtm_PinMap.c:1281

IfxGtm_Atom_Ch_7

ATOM channel 7.

Definition: IfxGtm_cfg.h:268

IfxGtm_TOM0_10_TOUT96_P11_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT96_P11_3_OUT

Definition: IfxGtm_PinMap.c:1542

IfxGtm_ATOM4_4N_TOUT75_P15_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT75_P15_4_OUT

Definition: IfxGtm_PinMap.c:573

IfxGtm_TOM0_6N_TOUT38_P32_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT38_P32_2_OUT

Definition: IfxGtm_PinMap.c:1691

IfxGtm_TIM0_2_P10_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P10_5_IN

Definition: IfxGtm_PinMap.c:949

IfxGtm_TOM0_0_TOUT26_P33_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT26_P33_4_OUT

Definition: IfxGtm_PinMap.c:1531

IfxGtm_ATOM2_6N_TOUT27_P33_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6N_TOUT27_P33_5_OUT

Definition: IfxGtm_PinMap.c:369

IfxGtm_TOM2_6_TOUT125_P11_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT125_P11_13_OUT

Definition: IfxGtm_PinMap.c:2128

IfxGtm_TOM0_1N_TOUT14_P00_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT14_P00_5_OUT

Definition: IfxGtm_PinMap.c:1565

IfxGtm_ATOM7_3_TOUT166_P00_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_3_TOUT166_P00_14_OUT

Definition: IfxGtm_PinMap.c:843

IfxGtm_TIM0_6_P10_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P10_4_IN

Definition: IfxGtm_PinMap.c:987

IfxGtm_TOM1_5N_TOUT76_P15_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT76_P15_5_OUT

Definition: IfxGtm_PinMap.c:1894

IfxGtm_TIM4_0_P00_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P00_9_IN

Definition: IfxGtm_PinMap.c:1261

IfxGtm_TOM0_5N_TOUT37_P32_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT37_P32_1_OUT

Definition: IfxGtm_PinMap.c:1663

IfxGtm_ATOM2_1N_TOUT167_P00_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT167_P00_13_OUT

Definition: IfxGtm_PinMap.c:295

IfxGtm_ATOM2_6_TOUT36_P32_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT36_P32_0_OUT

Definition: IfxGtm_PinMap.c:377

IfxGtm_ATOM3_6N_TOUT27_P33_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6N_TOUT27_P33_5_OUT

Definition: IfxGtm_PinMap.c:489

IfxGtm_ATOM0_2N_TOUT40_P32_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT40_P32_4_OUT

Definition: IfxGtm_PinMap.c:77

IfxGtm_TOM0_4N_TOUT65_P20_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT65_P20_9_OUT

Definition: IfxGtm_PinMap.c:1635

IfxGtm_ATOM6_1_TOUT215_P25_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT215_P25_9_OUT

Definition: IfxGtm_PinMap.c:776

IfxGtm_TOM1_4N_TOUT29_P33_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT29_P33_7_OUT

Definition: IfxGtm_PinMap.c:1861

IfxGtm_ATOM2_3N_TOUT107_P10_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT107_P10_5_OUT

Definition: IfxGtm_PinMap.c:329

IfxGtm_TOM2_6_TOUT100_P11_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT100_P11_11_OUT

Definition: IfxGtm_PinMap.c:2125

IfxGtm_ATOM6_3_TOUT111_P01_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT111_P01_3_OUT

Definition: IfxGtm_PinMap.c:787

IfxGtm_TIM3_6_P26_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P26_0_IN

Definition: IfxGtm_PinMap.c:1245

IfxGtm_TOM1_5N_TOUT77_P15_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT77_P15_6_OUT

Definition: IfxGtm_PinMap.c:1895

IfxGtm_TIM5_0_P13_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P13_11_IN

Definition: IfxGtm_PinMap.c:1366

IfxGtm_ATOM3_4N_TOUT135_P22_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4N_TOUT135_P22_9_OUT

Definition: IfxGtm_PinMap.c:457

IfxGtm_CLK1_P32_4_OUT

IfxGtm_Clk_Out IfxGtm_CLK1_P32_4_OUT

Definition: IfxGtm_PinMap.c:921

IfxGtm_ATOM4_3N_TOUT80_P14_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3N_TOUT80_P14_0_OUT

Definition: IfxGtm_PinMap.c:559

IfxGtm_TOM2_8_TOUT131_P22_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_8_TOUT131_P22_5_OUT

Definition: IfxGtm_PinMap.c:2150

IfxGtm_CLK2_P11_12_OUT

IfxGtm_Clk_Out IfxGtm_CLK2_P11_12_OUT

Definition: IfxGtm_PinMap.c:922

IfxGtm_TIM0_5_P10_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P10_8_IN

Definition: IfxGtm_PinMap.c:978

IfxGtm_TIM3_1_P20_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P20_13_IN

Definition: IfxGtm_PinMap.c:1179

IfxGtm_TOM4_8_TOUT162_P01_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_8_TOUT162_P01_8_OUT

Definition: IfxGtm_PinMap.c:2383

IfxGtm_ATOM3_5_TOUT52_P21_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT52_P21_1_OUT

Definition: IfxGtm_PinMap.c:483

IfxGtm_TOM0_3_TOUT80_P14_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT80_P14_0_OUT

Definition: IfxGtm_PinMap.c:1625

IfxGtm_ATOM4_3_TOUT56_P21_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3_TOUT56_P21_5_OUT

Definition: IfxGtm_PinMap.c:564

IfxGtm_TIM1_0_P02_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P02_0_IN

Definition: IfxGtm_PinMap.c:1002

IfxGtm_TOM1_6N_TOUT40_P32_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT40_P32_4_OUT

Definition: IfxGtm_PinMap.c:1922

IfxGtm_TIM3_7_P13_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P13_15_IN

Definition: IfxGtm_PinMap.c:1251

IfxGtm_Tim_TinMap::select

IfxGtm_ChXSel select

Input multiplexer value.

Definition: IfxGtm_PinMap.h:106

IfxGtm_ATOM5_1_TOUT207_P25_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT207_P25_1_OUT

Definition: IfxGtm_PinMap.c:659

IfxGtm_ATOM4_1N_TOUT102_P10_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT102_P10_0_OUT

Definition: IfxGtm_PinMap.c:521

IfxGtm_ATOM5_0_TOUT130_P22_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT130_P22_4_OUT

Definition: IfxGtm_PinMap.c:634

IfxGtm_TIM0_2_P10_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P10_10_IN

Definition: IfxGtm_PinMap.c:947

IfxGtm_TOM3_0N_TOUT161_P01_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_0N_TOUT161_P01_13_OUT

Definition: IfxGtm_PinMap.c:2160

IfxGtm_ATOM5_5N_TOUT206_P25_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5N_TOUT206_P25_0_OUT

Definition: IfxGtm_PinMap.c:725

IfxGtm_ATOM3_5_TOUT64_P20_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT64_P20_8_OUT

Definition: IfxGtm_PinMap.c:484

IfxGtm_TOM3_1_TOUT114_P01_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT114_P01_6_OUT

Definition: IfxGtm_PinMap.c:2211

IfxGtm_ATOM4_6N_TOUT103_P10_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6N_TOUT103_P10_1_OUT

Definition: IfxGtm_PinMap.c:599

IfxGtm_TIM0_2_P33_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P33_11_IN

Definition: IfxGtm_PinMap.c:953

IfxGtm_TOM1_12_TOUT4_P02_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT4_P02_4_OUT

Definition: IfxGtm_PinMap.c:1785

IfxGtm_ATOM1_3N_TOUT74_P15_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3N_TOUT74_P15_3_OUT

Definition: IfxGtm_PinMap.c:207

IfxGtm_TIM1_5_P14_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P14_2_IN

Definition: IfxGtm_PinMap.c:1051

IfxGtm_TIM4_6_P01_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P01_15_IN

Definition: IfxGtm_PinMap.c:1341

IfxGtm_TOM1_5N_TOUT56_P21_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT56_P21_5_OUT

Definition: IfxGtm_PinMap.c:1892

IfxGtm_TOM0_8_TOUT8_P02_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT8_P02_8_OUT

Definition: IfxGtm_PinMap.c:1750

IfxGtm_ATOM4_6N_TOUT134_P22_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6N_TOUT134_P22_8_OUT

Definition: IfxGtm_PinMap.c:600

IfxGtm_ATOM4_7N_TOUT104_P10_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7N_TOUT104_P10_2_OUT

Definition: IfxGtm_PinMap.c:612

IfxGtm_TOM3_7N_TOUT270_P10_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_7N_TOUT270_P10_15_OUT

Definition: IfxGtm_PinMap.c:2293

IfxGtm_ATOM6_6_TOUT188_P31_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_6_TOUT188_P31_14_OUT

Definition: IfxGtm_PinMap.c:812

IfxGtm_ATOM0_2N_TOUT23_P33_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT23_P33_1_OUT

Definition: IfxGtm_PinMap.c:76

IfxGtm_ATOM3_6N_TOUT137_P22_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6N_TOUT137_P22_11_OUT

Definition: IfxGtm_PinMap.c:487

IfxGtm_ATOM1_6N_TOUT27_P33_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT27_P33_5_OUT

Definition: IfxGtm_PinMap.c:258

IfxGtm_TOM2_9_TOUT259_P14_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_9_TOUT259_P14_14_OUT

Definition: IfxGtm_PinMap.c:2156

IfxGtm_TOM2_13_TOUT263_P14_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_13_TOUT263_P14_15_OUT

Definition: IfxGtm_PinMap.c:2020

IfxGtm_TOM0_2N_TOUT143_P33_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT143_P33_14_OUT

Definition: IfxGtm_PinMap.c:1587

IfxGtm_TIM0_5_P01_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P01_3_IN

Definition: IfxGtm_PinMap.c:975

IfxGtm_Tim_Ch_1

TIM channel 1.

Definition: IfxGtm_cfg.h:406

IfxGtm_ATOM2_1N_TOUT98_P11_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT98_P11_9_OUT

Definition: IfxGtm_PinMap.c:302

IfxGtm_TOM3_2N_TOUT211_P25_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_2N_TOUT211_P25_5_OUT

Definition: IfxGtm_PinMap.c:2223

IfxGtm_TIM4_4_P11_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P11_7_IN

Definition: IfxGtm_PinMap.c:1318

IfxGtm_TOM3_5_TOUT135_P22_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_5_TOUT135_P22_9_OUT

Definition: IfxGtm_PinMap.c:2269

IfxGtm_TOM1_3N_TOUT24_P33_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_3N_TOUT24_P33_2_OUT

Definition: IfxGtm_PinMap.c:1841

IfxGtm_TOM1_2_TOUT2_P02_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT2_P02_2_OUT

Definition: IfxGtm_PinMap.c:1834

IfxGtm_TIM2_7_P20_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P20_7_IN

Definition: IfxGtm_PinMap.c:1154

IfxGtm_ATOM0_5N_TOUT26_P33_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5N_TOUT26_P33_4_OUT

Definition: IfxGtm_PinMap.c:125

IfxGtm_ATOM3_0N_TOUT25_P33_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT25_P33_3_OUT

Definition: IfxGtm_PinMap.c:393

IfxGtm_TIM3_4_P34_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P34_1_IN

Definition: IfxGtm_PinMap.c:1220

IfxGtm_TOM0_7N_TOUT150_P34_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT150_P34_5_OUT

Definition: IfxGtm_PinMap.c:1720

IfxGtm_Tom_Ch_7

TOM channel 7.

Definition: IfxGtm_cfg.h:438

IfxGtm_TIM1_6_P02_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_6_P02_6_IN

Definition: IfxGtm_PinMap.c:1057

IfxGtm_TIM0_7_P14_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P14_4_IN

Definition: IfxGtm_PinMap.c:996

IfxGtm_ATOM4_3N_TOUT51_P21_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3N_TOUT51_P21_0_OUT

Definition: IfxGtm_PinMap.c:555

IfxGtm_TIM5_4_P14_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P14_12_IN

Definition: IfxGtm_PinMap.c:1407

IfxGtm_ATOM6_0_TOUT141_P32_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT141_P32_6_OUT

Definition: IfxGtm_PinMap.c:764

IfxGtm_ATOM2_0N_TOUT144_P33_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0N_TOUT144_P33_15_OUT

Definition: IfxGtm_PinMap.c:285

IfxGtm_ATOM1_2N_TOUT40_P32_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT40_P32_4_OUT

Definition: IfxGtm_PinMap.c:189

IfxGtm_TIM0_5_P10_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P10_11_IN

Definition: IfxGtm_PinMap.c:977

IfxGtm_ATOM5_3_TOUT177_P31_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT177_P31_3_OUT

Definition: IfxGtm_PinMap.c:700

IfxGtm_TIM3_5_P13_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P13_6_IN

Definition: IfxGtm_PinMap.c:1226

IfxGtm_ATOM4_6_TOUT46_P23_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT46_P23_5_OUT

Definition: IfxGtm_PinMap.c:608

IfxGtm_ATOM5_3_TOUT122_P11_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT122_P11_5_OUT

Definition: IfxGtm_PinMap.c:695

IfxGtm_ATOM4_6_TOUT117_P02_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT117_P02_10_OUT

Definition: IfxGtm_PinMap.c:605

IfxGtm_ATOM3_7_TOUT144_P33_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT144_P33_15_OUT

Definition: IfxGtm_PinMap.c:507

IfxGtm_TOM2_8_TOUT68_P20_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_8_TOUT68_P20_12_OUT

Definition: IfxGtm_PinMap.c:2153

IfxGtm_ATOM5_7_TOUT142_P32_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7_TOUT142_P32_7_OUT

Definition: IfxGtm_PinMap.c:758

IfxGtm_TOM0_4_TOUT124_P11_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT124_P11_8_OUT

Definition: IfxGtm_PinMap.c:1643

IfxGtm_TIM2_1_P11_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P11_1_IN

Definition: IfxGtm_PinMap.c:1084

IfxGtm_TOM4_9_TOUT163_P01_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_9_TOUT163_P01_10_OUT

Definition: IfxGtm_PinMap.c:2388

IfxGtm_TIM3_7_P02_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P02_13_IN

Definition: IfxGtm_PinMap.c:1249

IfxGtm_TOM3_7_TOUT161_P01_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_7_TOUT161_P01_13_OUT

Definition: IfxGtm_PinMap.c:2295

IfxGtm_TIM3_2_P02_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P02_8_IN

Definition: IfxGtm_PinMap.c:1186

IfxGtm_TIM4_7_P34_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P34_5_IN

Definition: IfxGtm_PinMap.c:1361

IfxGtm_ATOM3_7_TOUT37_P32_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT37_P32_1_OUT

Definition: IfxGtm_PinMap.c:508

IfxGtm_ATOM1_5_TOUT41_P23_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT41_P23_0_OUT

Definition: IfxGtm_PinMap.c:247

IfxGtm_TOM2_6_TOUT92_P13_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT92_P13_1_OUT

Definition: IfxGtm_PinMap.c:2132

IfxGtm_TIM2_2_P11_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P11_4_IN

Definition: IfxGtm_PinMap.c:1094

IfxGtm_ATOM5_3N_TOUT125_P11_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT125_P11_13_OUT

Definition: IfxGtm_PinMap.c:684

IfxGtm_ATOM5_4_TOUT245_P15_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT245_P15_13_OUT

Definition: IfxGtm_PinMap.c:718

IfxGtm_TOM2_6_TOUT131_P22_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT131_P22_5_OUT

Definition: IfxGtm_PinMap.c:2129

IfxGtm_ATOM7_2_TOUT266_P10_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_2_TOUT266_P10_10_OUT

Definition: IfxGtm_PinMap.c:842

IfxGtm_ATOM0_2_TOUT33_P33_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT33_P33_11_OUT

Definition: IfxGtm_PinMap.c:87

IfxGtm_TIM3_2_P11_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P11_3_IN

Definition: IfxGtm_PinMap.c:1187

IfxGtm_ATOM4_7_TOUT119_P11_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7_TOUT119_P11_0_OUT

Definition: IfxGtm_PinMap.c:619

IfxGtm_ATOM1_7N_TOUT107_P10_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT107_P10_5_OUT

Definition: IfxGtm_PinMap.c:268

IfxGtm_ATOM7_1_TOUT245_P15_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT245_P15_13_OUT

Definition: IfxGtm_PinMap.c:833

IfxGtm_ATOM0_4_TOUT4_P02_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT4_P02_4_OUT

Definition: IfxGtm_PinMap.c:117

IfxGtm_TOM3_0_TOUT130_P22_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_0_TOUT130_P22_4_OUT

Definition: IfxGtm_PinMap.c:2166

IfxGtm_TIM6_5_P13_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P13_10_IN

Definition: IfxGtm_PinMap.c:1493

IfxGtm_Tom_Ch_8

TOM channel 8.

Definition: IfxGtm_cfg.h:439

IfxGtm_TIM2_2_P14_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P14_8_IN

Definition: IfxGtm_PinMap.c:1095

IfxGtm_ATOM0_2_TOUT117_P02_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT117_P02_10_OUT

Definition: IfxGtm_PinMap.c:84

IfxGtm_TIM5_3_P02_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P02_14_IN

Definition: IfxGtm_PinMap.c:1395

IfxGtm_ATOM3_1N_TOUT14_P00_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT14_P00_5_OUT

Definition: IfxGtm_PinMap.c:403

IfxGtm_TOM1_11_TOUT63_P20_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT63_P20_7_OUT

Definition: IfxGtm_PinMap.c:1782

IfxGtm_ATOM7_3_TOUT267_P10_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_3_TOUT267_P10_14_OUT

Definition: IfxGtm_PinMap.c:849

IfxGtm_TIM2_5_P21_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P21_1_IN

Definition: IfxGtm_PinMap.c:1131

IfxGtm_TOM1_10_TOUT62_P20_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT62_P20_6_OUT

Definition: IfxGtm_PinMap.c:1777

IfxGtm_ATOM2_6_TOUT100_P11_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT100_P11_11_OUT

Definition: IfxGtm_PinMap.c:373

IfxGtm_TIM3_0_P11_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P11_11_IN

Definition: IfxGtm_PinMap.c:1161

IfxGtm_ATOM2_4N_TOUT86_P14_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4N_TOUT86_P14_6_OUT

Definition: IfxGtm_PinMap.c:348

IfxGtm_TOM1_4N_TOUT36_P32_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT36_P32_0_OUT

Definition: IfxGtm_PinMap.c:1862

IfxGtm_TOM1_4N_TOUT143_P33_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT143_P33_14_OUT

Definition: IfxGtm_PinMap.c:1856

IfxGtm_ATOM2_0N_TOUT108_P10_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0N_TOUT108_P10_6_OUT

Definition: IfxGtm_PinMap.c:283

IfxGtm_TOM0_10_TOUT12_P00_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT12_P00_3_OUT

Definition: IfxGtm_PinMap.c:1538

IfxGtm_ATOM4_5_TOUT128_P12_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT128_P12_0_OUT

Definition: IfxGtm_PinMap.c:592

IfxGtm_TIM6_0_P25_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P25_0_IN

Definition: IfxGtm_PinMap.c:1454

IfxGtm_TIM6_4_P00_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P00_4_IN

Definition: IfxGtm_PinMap.c:1484

IfxGtm_ATOM5_3N_TOUT212_P25_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT212_P25_6_OUT

Definition: IfxGtm_PinMap.c:689

IfxGtm_TOM1_4N_TOUT13_P00_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT13_P00_4_OUT

Definition: IfxGtm_PinMap.c:1855

IfxGtm_TOM2_3N_TOUT100_P11_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_3N_TOUT100_P11_11_OUT

Definition: IfxGtm_PinMap.c:2068

IfxGtm_ATOM2_2_TOUT20_P00_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT20_P00_11_OUT

Definition: IfxGtm_PinMap.c:323

IfxGtm_ATOM6_5_TOUT187_P31_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_5_TOUT187_P31_13_OUT

Definition: IfxGtm_PinMap.c:805

IfxGtm_TOM1_13_TOUT35_P33_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT35_P33_13_OUT

Definition: IfxGtm_PinMap.c:1789

IfxGtm_TIM4_3_P01_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P01_13_IN

Definition: IfxGtm_PinMap.c:1301

IfxGtm_ATOM3_1N_TOUT22_P33_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT22_P33_0_OUT

Definition: IfxGtm_PinMap.c:405

IfxGtm_TOM0_4N_TOUT54_P21_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT54_P21_3_OUT

Definition: IfxGtm_PinMap.c:1633

IfxGtm_TIM4_6_P01_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P01_14_IN

Definition: IfxGtm_PinMap.c:1340

IfxGtm_TOM0_10_TOUT46_P23_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT46_P23_5_OUT

Definition: IfxGtm_PinMap.c:1541

IfxGtm_TIM4_3_P10_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P10_14_IN

Definition: IfxGtm_PinMap.c:1304

IfxGtm_TIM5_0_P22_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P22_8_IN

Definition: IfxGtm_PinMap.c:1367

IfxGtm_TIM2_4_P20_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P20_3_IN

Definition: IfxGtm_PinMap.c:1118

IfxGtm_TOM0_11_TOUT97_P11_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT97_P11_6_OUT

Definition: IfxGtm_PinMap.c:1547

IfxGtm_ATOM3_1N_TOUT79_P15_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT79_P15_8_OUT

Definition: IfxGtm_PinMap.c:409

IfxGtm_TIM5_1_P14_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P14_11_IN

Definition: IfxGtm_PinMap.c:1377

IfxGtm_ATOM6_7_TOUT221_P25_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_7_TOUT221_P25_15_OUT

Definition: IfxGtm_PinMap.c:819

IfxGtm_TOM4_12_TOUT262_P13_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_12_TOUT262_P13_13_OUT

Definition: IfxGtm_PinMap.c:2331

IfxGtm_TIM3_1_P00_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P00_2_IN

Definition: IfxGtm_PinMap.c:1172

IfxGtm_TIM3_5_P13_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P13_0_IN

Definition: IfxGtm_PinMap.c:1224

IfxGtm_TIM3_7_P00_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P00_8_IN

Definition: IfxGtm_PinMap.c:1248

IfxGtm_ATOM1_0_TOUT109_P10_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT109_P10_7_OUT

Definition: IfxGtm_PinMap.c:161

IfxGtm_TOM1_6_TOUT83_P14_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT83_P14_3_OUT

Definition: IfxGtm_PinMap.c:1941

IfxGtm_ATOM6_0_TOUT182_P31_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT182_P31_8_OUT

Definition: IfxGtm_PinMap.c:767

IfxGtm_TOM2_6_TOUT106_P10_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT106_P10_4_OUT

Definition: IfxGtm_PinMap.c:2127

IfxGtm_TIM5_6_P24_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P24_14_IN

Definition: IfxGtm_PinMap.c:1432

IfxGtm_TOM0_0_TOUT151_P02_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT151_P02_12_OUT

Definition: IfxGtm_PinMap.c:1529

IfxGtm_TOM1_0N_TOUT25_P33_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0N_TOUT25_P33_3_OUT

Definition: IfxGtm_PinMap.c:1760

IfxGtm_ATOM0_2_TOUT83_P14_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT83_P14_3_OUT

Definition: IfxGtm_PinMap.c:91

IfxGtm_TOM2_1N_TOUT123_P11_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT123_P11_7_OUT

Definition: IfxGtm_PinMap.c:2033

IfxGtm_TIM0_4_P21_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P21_6_IN

Definition: IfxGtm_PinMap.c:970

IfxGtm_TOM3_2N_TOUT179_P31_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_2N_TOUT179_P31_5_OUT

Definition: IfxGtm_PinMap.c:2222

IfxGtm_ATOM3_2N_TOUT78_P15_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT78_P15_7_OUT

Definition: IfxGtm_PinMap.c:428

IfxGtm_TIM3_6_P32_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P32_6_IN

Definition: IfxGtm_PinMap.c:1246

IfxGtm_TOM0_5N_TOUT3_P02_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT3_P02_3_OUT

Definition: IfxGtm_PinMap.c:1664

IfxGtm_TIM6_5_P31_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P31_13_IN

Definition: IfxGtm_PinMap.c:1499

IfxGtm_TOM0_6_TOUT13_P00_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT13_P00_4_OUT

Definition: IfxGtm_PinMap.c:1705

IfxGtm_TOM0_0_TOUT85_P14_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT85_P14_5_OUT

Definition: IfxGtm_PinMap.c:1536

IfxGtm_ATOM3_6_TOUT92_P13_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT92_P13_1_OUT

Definition: IfxGtm_PinMap.c:499

IfxGtm_TOM0_5_TOUT11_P00_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT11_P00_2_OUT

Definition: IfxGtm_PinMap.c:1673

IfxGtm_ATOM5_3_TOUT133_P22_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT133_P22_7_OUT

Definition: IfxGtm_PinMap.c:696

IfxGtm_TIM5_0_P33_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P33_14_IN

Definition: IfxGtm_PinMap.c:1371

IfxGtm_TIM0_5_P32_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P32_4_IN

Definition: IfxGtm_PinMap.c:982

IfxGtm_TOM1_6N_TOUT14_P00_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT14_P00_5_OUT

Definition: IfxGtm_PinMap.c:1915

IfxGtm_TOM0_1N_TOUT52_P21_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT52_P21_1_OUT

Definition: IfxGtm_PinMap.c:1571

IfxGtm_TOM0_12_TOUT14_P00_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT14_P00_5_OUT

Definition: IfxGtm_PinMap.c:1548

IfxGtm_TIM5_6_P01_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P01_6_IN

Definition: IfxGtm_PinMap.c:1428

IfxGtm_ATOM1_5N_TOUT76_P15_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT76_P15_5_OUT

Definition: IfxGtm_PinMap.c:239

IfxGtm_TIM1_4_P22_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P22_3_IN

Definition: IfxGtm_PinMap.c:1045

IfxGtm_ATOM1_1_TOUT11_P00_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT11_P00_2_OUT

Definition: IfxGtm_PinMap.c:178

IfxGtm_TOM2_4N_TOUT97_P11_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT97_P11_6_OUT

Definition: IfxGtm_PinMap.c:2093

IfxGtm_TOM1_6_TOUT80_P14_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT80_P14_0_OUT

Definition: IfxGtm_PinMap.c:1940

IfxGtm_TOM2_0_TOUT65_P20_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT65_P20_9_OUT

Definition: IfxGtm_PinMap.c:1997

IfxGtm_TOM3_9_TOUT183_P31_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_9_TOUT183_P31_9_OUT

Definition: IfxGtm_PinMap.c:2307

IfxGtm_TOM3_5N_TOUT174_P31_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_5N_TOUT174_P31_0_OUT

Definition: IfxGtm_PinMap.c:2265

IfxGtm_TIM4_4_P01_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P01_8_IN

Definition: IfxGtm_PinMap.c:1314

IfxGtm_ATOM1_2_TOUT70_P20_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT70_P20_14_OUT

Definition: IfxGtm_PinMap.c:199

IfxGtm_ATOM3_3N_TOUT143_P33_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT143_P33_14_OUT

Definition: IfxGtm_PinMap.c:441

IfxGtm_TOM1_0N_TOUT75_P15_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0N_TOUT75_P15_4_OUT

Definition: IfxGtm_PinMap.c:1762

IfxGtm_ATOM3_3N_TOUT62_P20_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT62_P20_6_OUT

Definition: IfxGtm_PinMap.c:447

IfxGtm_ATOM3_6N_TOUT19_P00_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6N_TOUT19_P00_10_OUT

Definition: IfxGtm_PinMap.c:488

IfxGtm_TOM0_1_TOUT78_P15_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT78_P15_7_OUT

Definition: IfxGtm_PinMap.c:1583

IfxGtm_TOM3_10_TOUT216_P25_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_10_TOUT216_P25_10_OUT

Definition: IfxGtm_PinMap.c:2174

IfxGtm_ATOM4_4N_TOUT71_P15_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT71_P15_0_OUT

Definition: IfxGtm_PinMap.c:572

IfxGtm_TOM4_6_TOUT228_P24_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_6_TOUT228_P24_6_OUT

Definition: IfxGtm_PinMap.c:2376

IfxGtm_ATOM2_0N_TOUT37_P32_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0N_TOUT37_P32_1_OUT

Definition: IfxGtm_PinMap.c:288

IfxGtm_TOM1_13_TOUT65_P20_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT65_P20_9_OUT

Definition: IfxGtm_PinMap.c:1791

IfxGtm_ATOM4_0_TOUT87_P14_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT87_P14_7_OUT

Definition: IfxGtm_PinMap.c:520

IfxGtm_TOM4_15_TOUT237_P24_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_15_TOUT237_P24_15_OUT

Definition: IfxGtm_PinMap.c:2347

IfxGtm_ToutSel_h

Definition: IfxGtm_PinMap.h:92

IfxGtm_TIM1_0_P33_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P33_4_IN

Definition: IfxGtm_PinMap.c:1010

IfxGtm_ATOM3_2N_TOUT31_P33_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT31_P33_9_OUT

Definition: IfxGtm_PinMap.c:425

IfxGtm_Tom_Ch_2

TOM channel 2.

Definition: IfxGtm_cfg.h:433

IfxGtm_ATOM2_4N_TOUT29_P33_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4N_TOUT29_P33_7_OUT

Definition: IfxGtm_PinMap.c:346

IfxGtm_TOM2_2_TOUT55_P21_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT55_P21_4_OUT

Definition: IfxGtm_PinMap.c:2064

IfxGtm_TIM6_2_P20_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P20_8_IN

Definition: IfxGtm_PinMap.c:1469

IfxGtm_TOM2_12_TOUT34_P33_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_12_TOUT34_P33_12_OUT

Definition: IfxGtm_PinMap.c:2016

IfxGtm_TIM4_0_P32_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P32_7_IN

Definition: IfxGtm_PinMap.c:1273

IfxGtm_ATOM1_0N_TOUT112_P01_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0N_TOUT112_P01_4_OUT

Definition: IfxGtm_PinMap.c:157

IfxGtm_ATOM3_0_TOUT26_P33_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT26_P33_4_OUT

Definition: IfxGtm_PinMap.c:399

IfxGtm_TOM1_5_TOUT73_P15_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT73_P15_2_OUT

Definition: IfxGtm_PinMap.c:1908

IfxGtm_TOM0_1N_TOUT90_P14_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT90_P14_10_OUT

Definition: IfxGtm_PinMap.c:1574

IfxGtm_TIM4_1_P11_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P11_1_IN

Definition: IfxGtm_PinMap.c:1279

IfxGtm_TOM1_4N_TOUT244_P15_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT244_P15_12_OUT

Definition: IfxGtm_PinMap.c:1860

IfxGtm_TIM3_7_P13_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P13_2_IN

Definition: IfxGtm_PinMap.c:1252

IfxGtm_ATOM6_2_TOUT152_P02_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT152_P02_15_OUT

Definition: IfxGtm_PinMap.c:781

IfxGtm_ATOM2_2N_TOUT99_P11_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT99_P11_10_OUT

Definition: IfxGtm_PinMap.c:321

IfxGtm_ATOM8_4_TOUT261_P14_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_4_TOUT261_P14_12_OUT

Definition: IfxGtm_PinMap.c:900

IfxGtm_ATOM1_6N_TOUT149_P34_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT149_P34_4_OUT

Definition: IfxGtm_PinMap.c:256

IfxGtm_ATOM2_5_TOUT65_P20_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT65_P20_9_OUT

Definition: IfxGtm_PinMap.c:366

IfxGtm_ATOM5_0_TOUT174_P31_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT174_P31_0_OUT

Definition: IfxGtm_PinMap.c:638

IfxGtm_TIM6_0_P30_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P30_8_IN

Definition: IfxGtm_PinMap.c:1455

IfxGtm_TOM1_5N_TOUT67_P20_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT67_P20_11_OUT

Definition: IfxGtm_PinMap.c:1893

IfxGtm_ATOM7_7_TOUT152_P02_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_7_TOUT152_P02_15_OUT

Definition: IfxGtm_PinMap.c:869

IfxGtm_ATOM0_1N_TOUT4_P02_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT4_P02_4_OUT

Definition: IfxGtm_PinMap.c:60

IfxGtm_TIM2_4_P34_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P34_2_IN

Definition: IfxGtm_PinMap.c:1121

IfxGtm_TIM2_5_P00_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P00_6_IN

Definition: IfxGtm_PinMap.c:1122

IfxGtm_TOM3_6_TOUT266_P10_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_6_TOUT266_P10_10_OUT

Definition: IfxGtm_PinMap.c:2287

IfxGtm_TOM1_1_TOUT27_P33_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT27_P33_5_OUT

Definition: IfxGtm_PinMap.c:1816

IfxGtm_ATOM2_7_TOUT101_P11_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT101_P11_12_OUT

Definition: IfxGtm_PinMap.c:384

IfxGtm_TIM0_1_P00_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P00_10_IN

Definition: IfxGtm_PinMap.c:934

IfxGtm_TOM3_4_TOUT245_P15_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT245_P15_13_OUT

Definition: IfxGtm_PinMap.c:2261

IfxGtm_TOM0_3_TOUT108_P10_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT108_P10_6_OUT

Definition: IfxGtm_PinMap.c:1617

IfxGtm_TOM1_0_TOUT0_P02_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT0_P02_0_OUT

Definition: IfxGtm_PinMap.c:1764

IfxGtm_TIM4_4_P33_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P33_4_IN

Definition: IfxGtm_PinMap.c:1326

IfxGtm_TIM4_3_P30_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P30_3_IN

Definition: IfxGtm_PinMap.c:1312

IfxGtm_ATOM2_1N_TOUT90_P14_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT90_P14_10_OUT

Definition: IfxGtm_PinMap.c:300

IfxGtm_ATOM4_0N_TOUT87_P14_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0N_TOUT87_P14_7_OUT

Definition: IfxGtm_PinMap.c:511

IfxGtm_ATOM7_1_TOUT163_P01_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT163_P01_10_OUT

Definition: IfxGtm_PinMap.c:829

IfxGtm_TOM0_1_TOUT86_P14_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT86_P14_6_OUT

Definition: IfxGtm_PinMap.c:1584

IfxGtm_ATOM1_3N_TOUT16_P00_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3N_TOUT16_P00_7_OUT

Definition: IfxGtm_PinMap.c:203

IfxGtm_TOM0_6_TOUT29_P33_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT29_P33_7_OUT

Definition: IfxGtm_PinMap.c:1707

IfxGtm_TOM1_4_TOUT72_P15_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT72_P15_1_OUT

Definition: IfxGtm_PinMap.c:1879

IfxGtm_TIM0_5_P14_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P14_2_IN

Definition: IfxGtm_PinMap.c:979

IfxGtm_TIM2_6_P20_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P20_6_IN

Definition: IfxGtm_PinMap.c:1142

IfxGtm_TOM3_7_TOUT137_P22_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_7_TOUT137_P22_11_OUT

Definition: IfxGtm_PinMap.c:2294

IfxGtm_TOM2_6N_TOUT54_P21_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT54_P21_3_OUT

Definition: IfxGtm_PinMap.c:2122

IfxGtm_TIM6_6_P24_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P24_6_IN

Definition: IfxGtm_PinMap.c:1504

IfxGtm_TIM5_5_P13_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P13_13_IN

Definition: IfxGtm_PinMap.c:1417

IfxGtm_ATOM5_5_TOUT135_P22_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT135_P22_9_OUT

Definition: IfxGtm_PinMap.c:727

IfxGtm_TOM2_11_TOUT134_P22_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_11_TOUT134_P22_8_OUT

Definition: IfxGtm_PinMap.c:2009

IfxGtm_TIM4_1_P01_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P01_1_IN

Definition: IfxGtm_PinMap.c:1276

IfxGtm_TOM3_2_TOUT132_P22_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT132_P22_6_OUT

Definition: IfxGtm_PinMap.c:2227

IfxGtm_TIM4_5_P01_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P01_10_IN

Definition: IfxGtm_PinMap.c:1327

IfxGtm_ATOM5_2N_TOUT159_P01_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT159_P01_1_OUT

Definition: IfxGtm_PinMap.c:666

IfxGtm_ATOM6_7_TOUT189_P31_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_7_TOUT189_P31_15_OUT

Definition: IfxGtm_PinMap.c:818

IfxGtm_ATOM4_1_TOUT54_P21_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT54_P21_3_OUT

Definition: IfxGtm_PinMap.c:532

IfxGtm_TOM3_13_TOUT219_P25_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_13_TOUT219_P25_13_OUT

Definition: IfxGtm_PinMap.c:2190

IfxGtm_TOM1_9_TOUT129_P12_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT129_P12_1_OUT

Definition: IfxGtm_PinMap.c:1980

IfxGtm_TOM0_0_TOUT0_P02_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT0_P02_0_OUT

Definition: IfxGtm_PinMap.c:1527

IfxGtm_ATOM2_0_TOUT32_P33_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT32_P33_10_OUT

Definition: IfxGtm_PinMap.c:292

IfxGtm_ATOM8_6_TOUT153_P02_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_6_TOUT153_P02_13_OUT

Definition: IfxGtm_PinMap.c:908

IfxGtm_TIM3_4_P00_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P00_5_IN

Definition: IfxGtm_PinMap.c:1209

IfxGtm_Atom_8

ATOM object 8.

Definition: IfxGtm_cfg.h:253

IfxGtm_ATOM7_0_TOUT249_P13_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_0_TOUT249_P13_12_OUT

Definition: IfxGtm_PinMap.c:826

IfxGtm_TIM2_6_P00_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P00_7_IN

Definition: IfxGtm_PinMap.c:1134

IfxGtm_ATOM3_7N_TOUT61_P20_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7N_TOUT61_P20_3_OUT

Definition: IfxGtm_PinMap.c:502

IfxGtm_TOM1_7_TOUT64_P20_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT64_P20_8_OUT

Definition: IfxGtm_PinMap.c:1969

IfxGtm_TIM1_6_P23_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_6_P23_2_IN

Definition: IfxGtm_PinMap.c:1062

IfxGtm_TOM2_8_TOUT109_P10_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_8_TOUT109_P10_7_OUT

Definition: IfxGtm_PinMap.c:2148

IfxGtm_TOM3_13_TOUT269_P10_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_13_TOUT269_P10_11_OUT

Definition: IfxGtm_PinMap.c:2191

IfxGtm_ATOM5_2_TOUT148_P34_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT148_P34_3_OUT

Definition: IfxGtm_PinMap.c:675

IfxGtm_TOM0_6N_TOUT49_P22_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT49_P22_2_OUT

Definition: IfxGtm_PinMap.c:1693

IfxGtm_ATOM7_1_TOUT150_P34_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT150_P34_5_OUT

Definition: IfxGtm_PinMap.c:828

IfxGtm_ATOM6_4_TOUT261_P14_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT261_P14_12_OUT

Definition: IfxGtm_PinMap.c:801

IfxGtm_TIM4_1_P24_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P24_1_IN

Definition: IfxGtm_PinMap.c:1283

IfxGtm_TOM2_0_TOUT48_P22_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT48_P22_1_OUT

Definition: IfxGtm_PinMap.c:1995

IfxGtm_TOM0_0_TOUT109_P10_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT109_P10_7_OUT

Definition: IfxGtm_PinMap.c:1528

IfxGtm_TIM6_6_P00_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P00_14_IN

Definition: IfxGtm_PinMap.c:1500

IfxGtm_TOM1_5_TOUT246_P15_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT246_P15_14_OUT

Definition: IfxGtm_PinMap.c:1901

IfxGtm_TOM1_11_TOUT3_P02_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT3_P02_3_OUT

Definition: IfxGtm_PinMap.c:1780

IfxGtm_ATOM7_1_TOUT223_P24_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT223_P24_1_OUT

Definition: IfxGtm_PinMap.c:831

IfxGtm_ATOM6_6_TOUT160_P01_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_6_TOUT160_P01_9_OUT

Definition: IfxGtm_PinMap.c:811

IfxGtm_TIM2_3_P15_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P15_12_IN

Definition: IfxGtm_PinMap.c:1107

IfxGtm_TOM0_9_TOUT11_P00_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT11_P00_2_OUT

Definition: IfxGtm_PinMap.c:1755

IfxGtm_Tim_Ch_4

TIM channel 4.

Definition: IfxGtm_cfg.h:409

IfxGtm_TOM0_0N_TOUT51_P21_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT51_P21_0_OUT

Definition: IfxGtm_PinMap.c:1521

IfxGtm_TIM3_3_P20_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P20_1_IN

Definition: IfxGtm_PinMap.c:1204

IfxGtm_ATOM3_5_TOUT91_P13_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT91_P13_0_OUT

Definition: IfxGtm_PinMap.c:485

IfxGtm_TOM0_7N_TOUT55_P21_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT55_P21_4_OUT

Definition: IfxGtm_PinMap.c:1727

IfxGtm_TOM1_2N_TOUT41_P23_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT41_P23_0_OUT

Definition: IfxGtm_PinMap.c:1826

IfxGtm_ATOM0_5N_TOUT148_P34_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5N_TOUT148_P34_3_OUT

Definition: IfxGtm_PinMap.c:124

IfxGtm_ATOM4_1N_TOUT44_P23_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT44_P23_3_OUT

Definition: IfxGtm_PinMap.c:522

IfxGtm_TIM3_4_P14_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P14_12_IN

Definition: IfxGtm_PinMap.c:1214

IfxGtm_TOM1_1_TOUT116_P02_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT116_P02_9_OUT

Definition: IfxGtm_PinMap.c:1811

IfxGtm_TIM2_4_P00_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P00_5_IN

Definition: IfxGtm_PinMap.c:1111

IfxGtm_ATOM3_0N_TOUT32_P33_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT32_P33_10_OUT

Definition: IfxGtm_PinMap.c:394

IfxGtm_ATOM7_0_TOUT222_P24_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_0_TOUT222_P24_0_OUT

Definition: IfxGtm_PinMap.c:825

IfxGtm_TOM3_9_TOUT265_P10_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_9_TOUT265_P10_9_OUT

Definition: IfxGtm_PinMap.c:2311

IfxGtm_TIM3_1_P00_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P00_6_IN

Definition: IfxGtm_PinMap.c:1173

IfxGtm_ATOM3_5_TOUT99_P11_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT99_P11_10_OUT

Definition: IfxGtm_PinMap.c:486

IfxGtm_TOM0_4_TOUT39_P32_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT39_P32_3_OUT

Definition: IfxGtm_PinMap.c:1647

IfxGtm_ATOM0_4_TOUT146_P34_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT146_P34_1_OUT

Definition: IfxGtm_PinMap.c:113

IfxGtm_TOM2_9_TOUT69_P20_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_9_TOUT69_P20_13_OUT

Definition: IfxGtm_PinMap.c:2158

IfxGtm_TIM2_6_P22_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P22_6_IN

Definition: IfxGtm_PinMap.c:1143

IfxGtm_TIM1_3_P21_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P21_5_IN

Definition: IfxGtm_PinMap.c:1035

IfxGtm_TOM3_14_TOUT151_P02_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_14_TOUT151_P02_12_OUT

Definition: IfxGtm_PinMap.c:2193

IfxGtm_TOM1_4N_TOUT21_P00_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT21_P00_12_OUT

Definition: IfxGtm_PinMap.c:1859

IfxGtm_TOM1_6N_TOUT30_P33_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT30_P33_8_OUT

Definition: IfxGtm_PinMap.c:1919

IfxGtm_TOM1_3N_TOUT144_P33_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_3N_TOUT144_P33_15_OUT

Definition: IfxGtm_PinMap.c:1838

IfxGtm_TIM3_2_P00_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P00_7_IN

Definition: IfxGtm_PinMap.c:1185

IfxGtm_TIM1_5_P21_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P21_7_IN

Definition: IfxGtm_PinMap.c:1053

IfxGtm_TOM1_7_TOUT81_P14_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT81_P14_1_OUT

Definition: IfxGtm_PinMap.c:1973

IfxGtm_TOM2_1N_TOUT61_P20_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT61_P20_3_OUT

Definition: IfxGtm_PinMap.c:2040

IfxGtm_ATOM5_1_TOUT156_P01_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT156_P01_2_OUT

Definition: IfxGtm_PinMap.c:656

IfxGtm_TIM3_6_P34_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P34_3_IN

Definition: IfxGtm_PinMap.c:1247

IfxGtm_TIM2_1_P20_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P20_13_IN

Definition: IfxGtm_PinMap.c:1087

IfxGtm_Tim_Ch_2

TIM channel 2.

Definition: IfxGtm_cfg.h:407

IfxGtm_ATOM6_6_TOUT263_P14_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_6_TOUT263_P14_15_OUT

Definition: IfxGtm_PinMap.c:815

IfxGtm_TOM4_4_TOUT226_P24_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_4_TOUT226_P24_4_OUT

Definition: IfxGtm_PinMap.c:2365

IfxGtm_ATOM5_1N_TOUT123_P11_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT123_P11_7_OUT

Definition: IfxGtm_PinMap.c:642

IfxGtm_TIM3_7_P22_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P22_11_IN

Definition: IfxGtm_PinMap.c:1256

IfxGtm_TOM1_11_TOUT144_P33_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT144_P33_15_OUT

Definition: IfxGtm_PinMap.c:1778

IfxGtm_TIM5_2_P13_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P13_14_IN

Definition: IfxGtm_PinMap.c:1386

IfxGtm_ATOM6_1_TOUT128_P12_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT128_P12_0_OUT

Definition: IfxGtm_PinMap.c:771

IfxGtm_TOM0_5N_TOUT77_P15_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT77_P15_6_OUT

Definition: IfxGtm_PinMap.c:1669

IfxGtm_TIM1_0_P21_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P21_2_IN

Definition: IfxGtm_PinMap.c:1007

IfxGtm_TOM3_4_TOUT178_P31_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT178_P31_4_OUT

Definition: IfxGtm_PinMap.c:2259

IfxGtm_ATOM3_1_TOUT27_P33_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT27_P33_5_OUT

Definition: IfxGtm_PinMap.c:416

IfxGtm_ATOM4_4_TOUT50_P22_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT50_P22_3_OUT

Definition: IfxGtm_PinMap.c:580

IfxGtm_TIM6_3_P23_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P23_4_IN

Definition: IfxGtm_PinMap.c:1479

IfxGtm_TIM5_7_P30_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P30_15_IN

Definition: IfxGtm_PinMap.c:1444

IfxGtm_TIM5_7_P32_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P32_7_IN

Definition: IfxGtm_PinMap.c:1446

IfxGtm_ATOM0_6N_TOUT11_P00_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6N_TOUT11_P00_2_OUT

Definition: IfxGtm_PinMap.c:136

IfxGtm_TIM5_3_P24_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P24_11_IN

Definition: IfxGtm_PinMap.c:1399

IfxGtm_TOM3_2_TOUT176_P31_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT176_P31_2_OUT

Definition: IfxGtm_PinMap.c:2230

IfxGtm_TIM3_6_P02_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P02_12_IN

Definition: IfxGtm_PinMap.c:1235

IfxGtm_ATOM1_1N_TOUT14_P00_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1N_TOUT14_P00_5_OUT

Definition: IfxGtm_PinMap.c:170

IfxGtm_TOM1_7_TOUT84_P14_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT84_P14_4_OUT

Definition: IfxGtm_PinMap.c:1974

IfxGtm_TOM1_7N_TOUT84_P14_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT84_P14_4_OUT

Definition: IfxGtm_PinMap.c:1958

IfxGtm_TOM2_3_TOUT122_P11_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT122_P11_5_OUT

Definition: IfxGtm_PinMap.c:2075

IfxGtm_Tom_2

TOM object 2.

Definition: IfxGtm_cfg.h:421

IfxGtm_ToutSel_g

Definition: IfxGtm_PinMap.h:91

IfxGtm_TIM3_3_P02_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P02_9_IN

Definition: IfxGtm_PinMap.c:1198

IfxGtm_ATOM1_6N_TOUT133_P22_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT133_P22_7_OUT

Definition: IfxGtm_PinMap.c:255

IfxGtm_TOM2_5_TOUT91_P13_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_5_TOUT91_P13_0_OUT

Definition: IfxGtm_PinMap.c:2115

IfxGtm_ATOM1_1_TOUT86_P14_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT86_P14_6_OUT

Definition: IfxGtm_PinMap.c:184

IfxGtm_TOM2_6N_TOUT122_P11_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT122_P11_5_OUT

Definition: IfxGtm_PinMap.c:2119

IfxGtm_TOM3_4_TOUT114_P01_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT114_P01_6_OUT

Definition: IfxGtm_PinMap.c:2256

IfxGtm_TIM2_2_P01_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P01_5_IN

Definition: IfxGtm_PinMap.c:1092

IfxGtm_ATOM2_6N_TOUT95_P11_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6N_TOUT95_P11_2_OUT

Definition: IfxGtm_PinMap.c:372

IfxGtm_TIM1_4_P14_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P14_1_IN

Definition: IfxGtm_PinMap.c:1042

IfxGtm_TOM2_5N_TOUT53_P21_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_5N_TOUT53_P21_2_OUT

Definition: IfxGtm_PinMap.c:2107

IfxGtm_TOM4_12_TOUT234_P24_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_12_TOUT234_P24_12_OUT

Definition: IfxGtm_PinMap.c:2330

IfxGtm_TOM3_3N_TOUT118_P02_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT118_P02_11_OUT

Definition: IfxGtm_PinMap.c:2234

IfxGtm_TIM6_1_P23_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P23_6_IN

Definition: IfxGtm_PinMap.c:1461

IfxGtm_TIM1_2_P23_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P23_6_IN

Definition: IfxGtm_PinMap.c:1027

IfxGtm_ATOM2_5N_TOUT94_P13_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5N_TOUT94_P13_3_OUT

Definition: IfxGtm_PinMap.c:361

IfxGtm_TIM4_0_P10_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P10_0_IN

Definition: IfxGtm_PinMap.c:1264

IfxGtm_ATOM6_7_TOUT148_P34_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_7_TOUT148_P34_3_OUT

Definition: IfxGtm_PinMap.c:816

IfxGtm_ATOM5_1_TOUT120_P11_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT120_P11_1_OUT

Definition: IfxGtm_PinMap.c:653

IfxGtm_TOM2_10_TOUT62_P20_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_10_TOUT62_P20_6_OUT

Definition: IfxGtm_PinMap.c:2005

IfxGtm_TIM4_7_P13_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P13_9_IN

Definition: IfxGtm_PinMap.c:1356

IfxGtm_ATOM4_4_TOUT131_P22_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT131_P22_5_OUT

Definition: IfxGtm_PinMap.c:577

IfxGtm_TOM2_5_TOUT99_P11_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_5_TOUT99_P11_10_OUT

Definition: IfxGtm_PinMap.c:2116

IfxGtm_TIM0_3_P10_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P10_6_IN

Definition: IfxGtm_PinMap.c:960

IfxGtm_TIM2_1_P33_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P33_15_IN

Definition: IfxGtm_PinMap.c:1090

IfxGtm_ATOM1_1_TOUT78_P15_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT78_P15_7_OUT

Definition: IfxGtm_PinMap.c:182

IfxGtm_ATOM4_5_TOUT56_P21_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT56_P21_5_OUT

Definition: IfxGtm_PinMap.c:595

IfxGtm_TOM1_6N_TOUT5_P02_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT5_P02_5_OUT

Definition: IfxGtm_PinMap.c:1924

IfxGtm_ATOM3_4_TOUT30_P33_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT30_P33_8_OUT

Definition: IfxGtm_PinMap.c:467

IfxGtm_TIM3_0_P12_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P12_0_IN

Definition: IfxGtm_PinMap.c:1162

IfxGtm_ATOM4_2N_TOUT58_P21_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2N_TOUT58_P21_7_OUT

Definition: IfxGtm_PinMap.c:541

IfxGtm_ATOM8_1_TOUT231_P24_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_1_TOUT231_P24_9_OUT

Definition: IfxGtm_PinMap.c:883

IfxGtm_ATOM1_1_TOUT116_P02_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT116_P02_9_OUT

Definition: IfxGtm_PinMap.c:177

IfxGtm_TOM1_9_TOUT265_P10_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT265_P10_9_OUT

Definition: IfxGtm_PinMap.c:1983

IfxGtm_TOM0_7_TOUT84_P14_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT84_P14_4_OUT

Definition: IfxGtm_PinMap.c:1744

IfxGtm_TOM1_7_TOUT15_P00_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT15_P00_6_OUT

Definition: IfxGtm_PinMap.c:1961

IfxGtm_TIM1_3_P00_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P00_12_IN

Definition: IfxGtm_PinMap.c:1030

IfxGtm_ATOM5_6N_TOUT120_P11_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6N_TOUT120_P11_1_OUT

Definition: IfxGtm_PinMap.c:735

IfxGtm_ATOM1_0_TOUT77_P15_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT77_P15_6_OUT

Definition: IfxGtm_PinMap.c:164

IfxGtm_CLK0_P23_1_OUT

IfxGtm_Clk_Out IfxGtm_CLK0_P23_1_OUT

Definition: IfxGtm_PinMap.c:920

IfxGtm_ATOM0_5_TOUT40_P32_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT40_P32_4_OUT

Definition: IfxGtm_PinMap.c:130

IfxGtm_ATOM3_4_TOUT22_P33_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT22_P33_0_OUT

Definition: IfxGtm_PinMap.c:466

IfxGtm_TOM0_5N_TOUT121_P11_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT121_P11_4_OUT

Definition: IfxGtm_PinMap.c:1656

IfxGtm_TIM2_5_P15_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P15_2_IN

Definition: IfxGtm_PinMap.c:1129

IfxGtm_TIM6_1_P01_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P01_13_IN

Definition: IfxGtm_PinMap.c:1457

IfxGtm_TOM2_0N_TOUT101_P11_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT101_P11_12_OUT

Definition: IfxGtm_PinMap.c:1984

IfxGtm_TOM1_2_TOUT33_P33_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT33_P33_11_OUT

Definition: IfxGtm_PinMap.c:1835

IfxGtm_TOM1_6N_TOUT69_P20_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT69_P20_13_OUT

Definition: IfxGtm_PinMap.c:1925

IfxGtm_ATOM4_1_TOUT78_P15_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT78_P15_7_OUT

Definition: IfxGtm_PinMap.c:534

IfxGtm_TOM3_4_TOUT134_P22_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT134_P22_8_OUT

Definition: IfxGtm_PinMap.c:2257

IfxGtm_TOM2_2_TOUT125_P11_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT125_P11_13_OUT

Definition: IfxGtm_PinMap.c:2060

IfxGtm_TOM4_6_TOUT196_P30_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_6_TOUT196_P30_6_OUT

Definition: IfxGtm_PinMap.c:2375

IfxGtm_ATOM5_7_TOUT181_P31_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7_TOUT181_P31_7_OUT

Definition: IfxGtm_PinMap.c:760

IfxGtm_TOM1_3_TOUT80_P14_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT80_P14_0_OUT

Definition: IfxGtm_PinMap.c:1853

IfxGtm_ATOM7_7_TOUT197_P30_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_7_TOUT197_P30_7_OUT

Definition: IfxGtm_PinMap.c:872

IfxGtm_ATOM7_0_TOUT162_P01_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_0_TOUT162_P01_8_OUT

Definition: IfxGtm_PinMap.c:823

IfxGtm_TOM3_9_TOUT163_P01_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_9_TOUT163_P01_10_OUT

Definition: IfxGtm_PinMap.c:2306

IfxGtm_Atom_Ch_5

ATOM channel 5.

Definition: IfxGtm_cfg.h:266

IfxGtm_TOM2_7_TOUT130_P22_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_7_TOUT130_P22_4_OUT

Definition: IfxGtm_PinMap.c:2144

IfxGtm_TIM3_2_P33_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P33_2_IN

Definition: IfxGtm_PinMap.c:1195

IfxGtm_TIM0_1_P22_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P22_0_IN

Definition: IfxGtm_PinMap.c:941

IfxGtm_TOM0_5N_TOUT53_P21_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT53_P21_2_OUT

Definition: IfxGtm_PinMap.c:1665

IfxGtm_TIM0_7_P23_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P23_4_IN

Definition: IfxGtm_PinMap.c:999

IfxGtm_ATOM1_4_TOUT39_P32_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT39_P32_3_OUT

Definition: IfxGtm_PinMap.c:230

IfxPort_setPinModeOutput

IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)

Configure the port input / output mode.

Definition: IfxPort.h:675

IfxGtm_ATOM6_4_TOUT186_P31_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT186_P31_12_OUT

Definition: IfxGtm_PinMap.c:798

IfxGtm_TIM1_0_P15_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P15_6_IN

Definition: IfxGtm_PinMap.c:1006

IfxGtm_ATOM2_1_TOUT19_P00_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT19_P00_10_OUT

Definition: IfxGtm_PinMap.c:305

IfxGtm_ATOM0_5_TOUT5_P02_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT5_P02_5_OUT

Definition: IfxGtm_PinMap.c:133

IfxGtm_TOM1_13_TOUT146_P34_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT146_P34_1_OUT

Definition: IfxGtm_PinMap.c:1787

IfxGtm_ATOM0_6N_TOUT1_P02_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6N_TOUT1_P02_1_OUT

Definition: IfxGtm_PinMap.c:139

IfxGtm_TOM0_14_TOUT16_P00_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT16_P00_7_OUT

Definition: IfxGtm_PinMap.c:1557

IfxGtm_TIM2_6_P13_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P13_1_IN

Definition: IfxGtm_PinMap.c:1138

IfxGtm_ATOM8_7_TOUT152_P02_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_7_TOUT152_P02_15_OUT

Definition: IfxGtm_PinMap.c:913

IfxGtm_TOM3_3N_TOUT137_P22_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT137_P22_11_OUT

Definition: IfxGtm_PinMap.c:2235

IfxGtm_TIM0_0_P22_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P22_1_IN

Definition: IfxGtm_PinMap.c:931

IfxGtm_TOM1_7N_TOUT33_P33_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT33_P33_11_OUT

Definition: IfxGtm_PinMap.c:1952

IfxGtm_TIM1_1_P00_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P00_10_IN

Definition: IfxGtm_PinMap.c:1011

IfxGtm_ATOM5_7N_TOUT121_P11_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7N_TOUT121_P11_4_OUT

Definition: IfxGtm_PinMap.c:751

IfxGtm_TOM4_7_TOUT118_P02_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_7_TOUT118_P02_11_OUT

Definition: IfxGtm_PinMap.c:2378

IfxGtm_ATOM8_2_TOUT259_P14_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_2_TOUT259_P14_14_OUT

Definition: IfxGtm_PinMap.c:890

IfxGtm_ATOM0_1N_TOUT61_P20_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT61_P20_3_OUT

Definition: IfxGtm_PinMap.c:65

IfxGtm_ATOM5_4_TOUT123_P11_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT123_P11_7_OUT

Definition: IfxGtm_PinMap.c:712

IfxGtm_ATOM0_7_TOUT45_P23_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT45_P23_4_OUT

Definition: IfxGtm_PinMap.c:154

IfxGtm_TOM2_14_TOUT66_P20_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_14_TOUT66_P20_10_OUT

Definition: IfxGtm_PinMap.c:2027

IfxGtm_TOM0_5N_TOUT67_P20_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT67_P20_11_OUT

Definition: IfxGtm_PinMap.c:1667

IfxGtm_TIM5_6_P30_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P30_14_IN

Definition: IfxGtm_PinMap.c:1433

IfxGtm_TIM2_1_P31_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P31_1_IN

Definition: IfxGtm_PinMap.c:1088

IfxGtm_ATOM7_1_TOUT191_P30_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT191_P30_1_OUT

Definition: IfxGtm_PinMap.c:830

IfxGtm_TIM6_7_P13_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P13_12_IN

Definition: IfxGtm_PinMap.c:1510

IfxGtm_ATOM7_3_TOUT247_P15_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_3_TOUT247_P15_15_OUT

Definition: IfxGtm_PinMap.c:847

IfxGtm_TOM2_3N_TOUT106_P10_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_3N_TOUT106_P10_4_OUT

Definition: IfxGtm_PinMap.c:2069

IfxGtm_TIM0_5_P02_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P02_5_IN

Definition: IfxGtm_PinMap.c:976

IfxGtm_TOM0_7N_TOUT39_P32_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT39_P32_3_OUT

Definition: IfxGtm_PinMap.c:1725

IfxGtm_TIM1_6_P23_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_6_P23_1_IN

Definition: IfxGtm_PinMap.c:1061

IfxGtm_ATOM5_6_TOUT212_P26_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT212_P26_0_OUT

Definition: IfxGtm_PinMap.c:747

IfxGtm_TOM3_3_TOUT209_P25_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_3_TOUT209_P25_3_OUT

Definition: IfxGtm_PinMap.c:2246

IfxGtm_TIM3_5_P02_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P02_11_IN

Definition: IfxGtm_PinMap.c:1222

IfxGtm_ATOM4_6_TOUT66_P20_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT66_P20_10_OUT

Definition: IfxGtm_PinMap.c:610

IfxGtm_TOM1_7N_TOUT28_P33_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT28_P33_6_OUT

Definition: IfxGtm_PinMap.c:1950

IfxGtm_ATOM0_0_TOUT48_P22_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT48_P22_1_OUT

Definition: IfxGtm_PinMap.c:51

IfxGtm_TIM3_1_P02_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P02_7_IN

Definition: IfxGtm_PinMap.c:1174

IfxGtm_ATOM1_3_TOUT105_P10_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT105_P10_3_OUT

Definition: IfxGtm_PinMap.c:208

IfxGtm_TOM3_7N_TOUT157_P01_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_7N_TOUT157_P01_15_OUT

Definition: IfxGtm_PinMap.c:2289

IfxGtm_ATOM1_2_TOUT12_P00_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT12_P00_3_OUT

Definition: IfxGtm_PinMap.c:196

IfxGtm_TOM2_9_TOUT132_P22_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_9_TOUT132_P22_6_OUT

Definition: IfxGtm_PinMap.c:2155

IfxGtm_TIM6_7_P14_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P14_15_IN

Definition: IfxGtm_PinMap.c:1511

IfxGtm_ATOM7_7_TOUT154_P02_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM7_7_TOUT154_P02_14_OUT

Definition: IfxGtm_PinMap.c:870

IfxGtm_TIM4_4_P02_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P02_11_IN

Definition: IfxGtm_PinMap.c:1315

IfxGtm_ATOM2_1N_TOUT51_P21_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT51_P21_0_OUT

Definition: IfxGtm_PinMap.c:299

IfxGtm_ATOM2_4_TOUT51_P21_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT51_P21_0_OUT

Definition: IfxGtm_PinMap.c:354

IfxGtm_ATOM4_5N_TOUT109_P10_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5N_TOUT109_P10_7_OUT

Definition: IfxGtm_PinMap.c:584

IfxGtm_TOM3_0_TOUT155_P01_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_0_TOUT155_P01_0_OUT

Definition: IfxGtm_PinMap.c:2167

IfxGtm_TOM3_0N_TOUT8_P02_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_0N_TOUT8_P02_8_OUT

Definition: IfxGtm_PinMap.c:2163

IfxGtm_TOM1_0_TOUT26_P33_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT26_P33_4_OUT

Definition: IfxGtm_PinMap.c:1766

IfxGtm_Tom_Ch_15

TOM channel 15.

Definition: IfxGtm_cfg.h:446

IfxGtm_Tom_Ch_14

TOM channel 14.

Definition: IfxGtm_cfg.h:445

IfxGtm_TOM0_1N_TOUT73_P15_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT73_P15_2_OUT

Definition: IfxGtm_PinMap.c:1573

IfxGtm_TOM2_3_TOUT89_P14_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT89_P14_9_OUT

Definition: IfxGtm_PinMap.c:2082

IfxGtm_TOM2_2N_TOUT255_P13_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_2N_TOUT255_P13_6_OUT

Definition: IfxGtm_PinMap.c:2053

IfxGtm_TIM1_1_P33_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P33_5_IN

Definition: IfxGtm_PinMap.c:1018

IfxGtm_ATOM1_4_TOUT29_P33_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT29_P33_7_OUT

Definition: IfxGtm_PinMap.c:229

IfxGtm_TOM2_7N_TOUT121_P11_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT121_P11_4_OUT

Definition: IfxGtm_PinMap.c:2134

IfxGtm_TOM1_14_TOUT147_P34_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT147_P34_2_OUT

Definition: IfxGtm_PinMap.c:1792

IfxGtm_TOM4_5_TOUT227_P24_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_5_TOUT227_P24_5_OUT

Definition: IfxGtm_PinMap.c:2371

IfxGtm_TOM2_7N_TOUT98_P11_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT98_P11_9_OUT

Definition: IfxGtm_PinMap.c:2140

IfxGtm_TOM1_4_TOUT64_P20_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT64_P20_8_OUT

Definition: IfxGtm_PinMap.c:1878

IfxGtm_ATOM2_2N_TOUT91_P13_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT91_P13_0_OUT

Definition: IfxGtm_PinMap.c:319

IfxGtm_ATOM1_4N_TOUT108_P10_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT108_P10_6_OUT

Definition: IfxGtm_PinMap.c:217

IfxGtm_TIM5_3_P01_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P01_5_IN

Definition: IfxGtm_PinMap.c:1394

IfxGtm_TIM5_6_P31_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P31_14_IN

Definition: IfxGtm_PinMap.c:1434

IfxGtm_ATOM4_3N_TOUT59_P20_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3N_TOUT59_P20_0_OUT

Definition: IfxGtm_PinMap.c:556

IfxGtm_TOM2_5N_TOUT136_P22_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_5N_TOUT136_P22_10_OUT

Definition: IfxGtm_PinMap.c:2105

IfxGtm_TOM1_6_TOUT247_P15_15_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT247_P15_15_OUT

Definition: IfxGtm_PinMap.c:1932

IfxGtm_ATOM8_5_TOUT203_P30_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM8_5_TOUT203_P30_13_OUT

Definition: IfxGtm_PinMap.c:902

IfxGtm_TOM0_2N_TOUT5_P02_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT5_P02_5_OUT

Definition: IfxGtm_PinMap.c:1592

IfxGtm_TOM1_7N_TOUT39_P32_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT39_P32_3_OUT

Definition: IfxGtm_PinMap.c:1953

IfxGtm_TOM0_7_TOUT70_P20_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT70_P20_14_OUT

Definition: IfxGtm_PinMap.c:1742

IfxGtm_TIM4_6_P33_15_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P33_15_IN

Definition: IfxGtm_PinMap.c:1350

IfxGtm_TOM0_6N_TOUT99_P11_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT99_P11_10_OUT

Definition: IfxGtm_PinMap.c:1702

IfxGtm_TOM4_15_TOUT154_P02_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_15_TOUT154_P02_14_OUT

Definition: IfxGtm_PinMap.c:2344

IfxGtm_TIM1_4_P33_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P33_0_IN

Definition: IfxGtm_PinMap.c:1047

IfxGtm_PinMap_setAtomTout

void IfxGtm_PinMap_setAtomTout(IfxGtm_Atom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)

Definition: IfxGtm_PinMap.c:2408

IfxGtm_TOM2_6_TOUT104_P10_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT104_P10_2_OUT

Definition: IfxGtm_PinMap.c:2126

IfxGtm_TIM4_6_P25_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P25_14_IN

Definition: IfxGtm_PinMap.c:1348

IfxGtm_ToutSel_f

Definition: IfxGtm_PinMap.h:90

IfxGtm_ATOM5_3N_TOUT123_P11_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT123_P11_7_OUT

Definition: IfxGtm_PinMap.c:683

IfxGtm_ATOM2_2N_TOUT92_P13_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT92_P13_1_OUT

Definition: IfxGtm_PinMap.c:320

IfxGtm_TIM0_0_P10_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P10_7_IN

Definition: IfxGtm_PinMap.c:925

IfxGtm_TIM0_1_P33_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P33_9_IN

Definition: IfxGtm_PinMap.c:943

IfxGtm_TIM3_2_P25_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P25_2_IN

Definition: IfxGtm_PinMap.c:1193

IfxGtm_ATOM0_1N_TOUT14_P00_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT14_P00_5_OUT

Definition: IfxGtm_PinMap.c:57

IfxGtm_TIM6_5_P00_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P00_13_IN

Definition: IfxGtm_PinMap.c:1492

IfxGtm_TOM1_3_TOUT21_P00_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT21_P00_12_OUT

Definition: IfxGtm_PinMap.c:1847

IfxGtm_TOM1_2N_TOUT5_P02_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT5_P02_5_OUT

Definition: IfxGtm_PinMap.c:1827

IfxGtm_TOM1_5_TOUT41_P23_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT41_P23_0_OUT

Definition: IfxGtm_PinMap.c:1905

IfxGtm_TOM1_1N_TOUT22_P33_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT22_P33_0_OUT

Definition: IfxGtm_PinMap.c:1803

IfxGtm_ATOM3_1N_TOUT91_P13_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT91_P13_0_OUT

Definition: IfxGtm_PinMap.c:411

IfxGtm_ATOM1_3N_TOUT42_P23_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3N_TOUT42_P23_1_OUT

Definition: IfxGtm_PinMap.c:205

IfxGtm_TOM3_2N_TOUT267_P10_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_2N_TOUT267_P10_14_OUT

Definition: IfxGtm_PinMap.c:2225

IfxGtm_ATOM1_7_TOUT17_P00_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT17_P00_8_OUT

Definition: IfxGtm_PinMap.c:276

IfxGtm_TOM1_7_TOUT92_P13_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT92_P13_1_OUT

Definition: IfxGtm_PinMap.c:1975

IfxGtm_TIM2_3_P01_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P01_5_IN

Definition: IfxGtm_PinMap.c:1102

IfxGtm_TIM1_0_P00_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P00_9_IN

Definition: IfxGtm_PinMap.c:1001

IfxGtm_ATOM1_1_TOUT79_P15_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT79_P15_8_OUT

Definition: IfxGtm_PinMap.c:183

IfxGtm_TOM3_15_TOUT154_P02_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_15_TOUT154_P02_14_OUT

Definition: IfxGtm_PinMap.c:2200

IfxGtm_TOM4_1_TOUT251_P13_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM4_1_TOUT251_P13_10_OUT

Definition: IfxGtm_PinMap.c:2352

IfxGtm_TIM0_1_P10_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P10_1_IN

Definition: IfxGtm_PinMap.c:936

IfxGtm_TOM3_11_TOUT217_P25_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_11_TOUT217_P25_11_OUT

Definition: IfxGtm_PinMap.c:2180

IfxGtm_ToutSel_a

Definition: IfxGtm_PinMap.h:85

IfxGtm_TIM5_2_P01_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P01_10_IN

Definition: IfxGtm_PinMap.c:1383

IfxGtm_TOM3_5N_TOUT206_P25_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_5N_TOUT206_P25_0_OUT

Definition: IfxGtm_PinMap.c:2266

IfxGtm_ATOM1_4_TOUT130_P22_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT130_P22_4_OUT

Definition: IfxGtm_PinMap.c:226

IfxGtm_TOM1_4_TOUT9_P00_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT9_P00_0_OUT

Definition: IfxGtm_PinMap.c:1882

IfxGtm_ATOM1_5N_TOUT26_P33_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT26_P33_4_OUT

Definition: IfxGtm_PinMap.c:238

IfxGtm_ATOM5_7N_TOUT176_P31_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7N_TOUT176_P31_2_OUT

Definition: IfxGtm_PinMap.c:754

IfxGtm_ATOM5_0N_TOUT264_P13_15_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT264_P13_15_OUT

Definition: IfxGtm_PinMap.c:632

IfxGtm_TIM6_3_P25_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P25_3_IN

Definition: IfxGtm_PinMap.c:1481

IfxGtm_TOM3_4_TOUT158_P01_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT158_P01_12_OUT

Definition: IfxGtm_PinMap.c:2258


iLLD_TC38A: IfxGtm_PinMap.h Source File

_PinMap

IfxGtm_PinMap.h

Go to the documentation of this file.

1 /**

2 * \file IfxGtm_PinMap.h

3 * \brief GTM I/O map

4 * \ingroup IfxLld_Gtm

5 *

6 * \version iLLD_1_0_1_12_0

7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.

8 *

9 *

10 * IMPORTANT NOTICE

11 *

12 * Use of this file is subject to the terms of use agreed between (i) you or

13 * the company in which ordinary course of business you are acting and (ii)

14 * Infineon Technologies AG or its licensees. If and as long as no such terms

15 * of use are agreed, use of this file is subject to following:

16 *

17 * Boost Software License - Version 1.0 - August 17th, 2003

18 *

19 * Permission is hereby granted, free of charge, to any person or organization

20 * obtaining a copy of the software and accompanying documentation covered by

21 * this license (the "Software") to use, reproduce, display, distribute,

22 * execute, and transmit the Software, and to prepare derivative works of the

23 * Software, and to permit third-parties to whom the Software is furnished to

24 * do so, all subject to the following:

25 *

26 * The copyright notices in the Software and this entire statement, including

27 * the above license grant, this restriction and the following disclaimer, must

28 * be included in all copies of the Software, in whole or in part, and all

29 * derivative works of the Software, unless such copies or derivative works are

30 * solely in the form of machine-executable object code generated by a source

31 * language processor.

32 *

33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT

36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE

37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,

38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER

39 * DEALINGS IN THE SOFTWARE.

40 *

41 * \defgroup IfxLld_Gtm_pinmap GTM Pin Mapping

42 * \ingroup IfxLld_Gtm

43 */

44

45 #ifndef IFXGTM_PINMAP_H

46 #define IFXGTM_PINMAP_H

47

48 #include <IfxGtm_reg.h>

49 #include <_Impl/IfxGtm_cfg.h>

50 #include <Port/Std/IfxPort.h>

51 #include <Gtm/Std/IfxGtm_Atom.h>

52 #include <Gtm/Std/IfxGtm_Tom.h>

53 #include <Gtm/Std/IfxGtm_Tim.h>

54

55 /** \addtogroup IfxLld_Gtm_pinmap

56 * \{ */

57

58 /** \brief CHxSEL register control code */

59 typedef enum

60 {

61 IfxGtm_ChXSel_a,

62 IfxGtm_ChXSel_b,

63 IfxGtm_ChXSel_c,

64 IfxGtm_ChXSel_d,

65

66 IfxGtm_ChXSel_e,

67 IfxGtm_ChXSel_f,

68 IfxGtm_ChXSel_g,

69 IfxGtm_ChXSel_h,

70

71 IfxGtm_ChXSel_i,

72 IfxGtm_ChXSel_j,

73 IfxGtm_ChXSel_k,

74 IfxGtm_ChXSel_l,

75

76 IfxGtm_ChXSel_m,

77 IfxGtm_ChXSel_n,

78 IfxGtm_ChXSel_o,

79 IfxGtm_ChXSel_p

80 } IfxGtm_ChXSel;

81

82 /** \brief TOUTSEL register control code */

83 typedef enum

84 {

85 IfxGtm_ToutSel_a,

86 IfxGtm_ToutSel_b,

87 IfxGtm_ToutSel_c,

88 IfxGtm_ToutSel_d,

89 IfxGtm_ToutSel_e,

90 IfxGtm_ToutSel_f,

91 IfxGtm_ToutSel_g,

92 IfxGtm_ToutSel_h,

93 IfxGtm_ToutSel_i,

94 IfxGtm_ToutSel_j,

95 IfxGtm_ToutSel_k,

96 IfxGtm_ToutSel_l

97

98 } IfxGtm_ToutSel;

99

100 /** \brief TIN pin mapping structure */

101 typedef const struct

102 {

103 IfxGtm_Tim tim; /**< \brief TIM unit index */

104 IfxGtm_Tim_Ch channel; /**< \brief TIM channel index */

105 IfxPort_Pin pin; /**< \brief Port pin */

106 IfxGtm_ChXSel select; /**< \brief Input multiplexer value */

107 } IfxGtm_Tim_TinMap;

108

109 /** \brief ATOM TOUT pin mapping structure */

110 typedef const struct

111 {

112 IfxGtm_Atom atom; /**< \brief ATOM unit index */

113 IfxGtm_Atom_Ch channel; /**< \brief ATOM channel index */

114 IfxGtm_ToutSel toutSel; /**< \brief TOUTSEL register control code */

115 uint32 toutn; /**< \brief TOUT number */

116 IfxPort_Pin pin; /**< \brief Port pin */

117 IfxPort_OutputIdx select; /**< \brief Port control code */

118 } IfxGtm_Atom_ToutMap;

119

120 /** \brief Pointer to \ref IfxGtm_Atom_ToutMap */

121 typedef IfxGtm_Atom_ToutMap *IfxGtm_Atom_ToutMapP;

122

123 /** \brief TOM TOUT pin mapping structure */

124 typedef const struct

125 {

126 IfxGtm_Tom tom; /**< \brief TOM unit index */

127 IfxGtm_Tom_Ch channel; /**< \brief TOM channel index */

128 IfxGtm_ToutSel toutSel; /**< \brief TOUTSEL register control code */

129 uint32 toutn; /**< \brief TOUT number */

130 IfxPort_Pin pin; /**< \brief Port pin */

131 IfxPort_OutputIdx select; /**< \brief Port control code */

132 } IfxGtm_Tom_ToutMap;

133

134 /** \brief GTM Clock Output */

135 typedef const struct

136 {

137 Ifx_GTM* module; /**< \brief Base address */

138 IfxPort_Pin pin; /**< \brief Port pin */

139 IfxPort_OutputIdx select; /**< \brief Port control code */

140 } IfxGtm_Clk_Out;

141

142 /** \brief Pointer to \ref IfxGtm_Tom_ToutMap */

143 typedef IfxGtm_Tom_ToutMap *IfxGtm_Tom_ToutMapP;

144

145 IFX_EXTERN void IfxGtm_PinMap_setTimTin(IfxGtm_Tim_TinMap *config, IfxPort_InputMode inputMode);

146 IFX_EXTERN void IfxGtm_PinMap_setAtomTout(IfxGtm_Atom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);

147 IFX_EXTERN void IfxGtm_PinMap_setTomTout(IfxGtm_Tom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);

148

149 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0N_TOUT112_P01_4_OUT; /**< \brief IfxGtm_ATOM0_0N_TOUT112_P01_4_OUT */

150 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0N_TOUT17_P00_8_OUT; /**< \brief IfxGtm_ATOM0_0N_TOUT17_P00_8_OUT */

151 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0N_TOUT43_P23_2_OUT; /**< \brief IfxGtm_ATOM0_0N_TOUT43_P23_2_OUT */

152 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0N_TOUT54_P21_3_OUT; /**< \brief IfxGtm_ATOM0_0N_TOUT54_P21_3_OUT */

153 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0N_TOUT7_P02_7_OUT; /**< \brief IfxGtm_ATOM0_0N_TOUT7_P02_7_OUT */

154 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT0_P02_0_OUT; /**< \brief IfxGtm_ATOM0_0_TOUT0_P02_0_OUT */

155 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT48_P22_1_OUT; /**< \brief IfxGtm_ATOM0_0_TOUT48_P22_1_OUT */

156 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT53_P21_2_OUT; /**< \brief IfxGtm_ATOM0_0_TOUT53_P21_2_OUT */

157 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT85_P14_5_OUT; /**< \brief IfxGtm_ATOM0_0_TOUT85_P14_5_OUT */

158 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT8_P02_8_OUT; /**< \brief IfxGtm_ATOM0_0_TOUT8_P02_8_OUT */

159 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT9_P00_0_OUT; /**< \brief IfxGtm_ATOM0_0_TOUT9_P00_0_OUT */

160 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT113_P01_5_OUT; /**< \brief IfxGtm_ATOM0_1N_TOUT113_P01_5_OUT */

161 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT14_P00_5_OUT; /**< \brief IfxGtm_ATOM0_1N_TOUT14_P00_5_OUT */

162 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT39_P32_3_OUT; /**< \brief IfxGtm_ATOM0_1N_TOUT39_P32_3_OUT */

163 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT41_P23_0_OUT; /**< \brief IfxGtm_ATOM0_1N_TOUT41_P23_0_OUT */

164 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT4_P02_4_OUT; /**< \brief IfxGtm_ATOM0_1N_TOUT4_P02_4_OUT */

165 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT50_P22_3_OUT; /**< \brief IfxGtm_ATOM0_1N_TOUT50_P22_3_OUT */

166 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT53_P21_2_OUT; /**< \brief IfxGtm_ATOM0_1N_TOUT53_P21_2_OUT */

167 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT55_P21_4_OUT; /**< \brief IfxGtm_ATOM0_1N_TOUT55_P21_4_OUT */

168 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT57_P21_6_OUT; /**< \brief IfxGtm_ATOM0_1N_TOUT57_P21_6_OUT */

169 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT61_P20_3_OUT; /**< \brief IfxGtm_ATOM0_1N_TOUT61_P20_3_OUT */

170 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT10_P00_1_OUT; /**< \brief IfxGtm_ATOM0_1_TOUT10_P00_1_OUT */

171 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT116_P02_9_OUT; /**< \brief IfxGtm_ATOM0_1_TOUT116_P02_9_OUT */

172 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT11_P00_2_OUT; /**< \brief IfxGtm_ATOM0_1_TOUT11_P00_2_OUT */

173 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT1_P02_1_OUT; /**< \brief IfxGtm_ATOM0_1_TOUT1_P02_1_OUT */

174 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT31_P33_9_OUT; /**< \brief IfxGtm_ATOM0_1_TOUT31_P33_9_OUT */

175 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT47_P22_0_OUT; /**< \brief IfxGtm_ATOM0_1_TOUT47_P22_0_OUT */

176 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT54_P21_3_OUT; /**< \brief IfxGtm_ATOM0_1_TOUT54_P21_3_OUT */

177 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT84_P14_4_OUT; /**< \brief IfxGtm_ATOM0_1_TOUT84_P14_4_OUT */

178 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT114_P01_6_OUT; /**< \brief IfxGtm_ATOM0_2N_TOUT114_P01_6_OUT */

179 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT15_P00_6_OUT; /**< \brief IfxGtm_ATOM0_2N_TOUT15_P00_6_OUT */

180 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT23_P33_1_OUT; /**< \brief IfxGtm_ATOM0_2N_TOUT23_P33_1_OUT */

181 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT40_P32_4_OUT; /**< \brief IfxGtm_ATOM0_2N_TOUT40_P32_4_OUT */

182 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT41_P23_0_OUT; /**< \brief IfxGtm_ATOM0_2N_TOUT41_P23_0_OUT */

183 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT44_P23_3_OUT; /**< \brief IfxGtm_ATOM0_2N_TOUT44_P23_3_OUT */

184 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT56_P21_5_OUT; /**< \brief IfxGtm_ATOM0_2N_TOUT56_P21_5_OUT */

185 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT58_P21_7_OUT; /**< \brief IfxGtm_ATOM0_2N_TOUT58_P21_7_OUT */

186 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT5_P02_5_OUT; /**< \brief IfxGtm_ATOM0_2N_TOUT5_P02_5_OUT */

187 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT65_P20_9_OUT; /**< \brief IfxGtm_ATOM0_2N_TOUT65_P20_9_OUT */

188 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT117_P02_10_OUT; /**< \brief IfxGtm_ATOM0_2_TOUT117_P02_10_OUT */

189 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT12_P00_3_OUT; /**< \brief IfxGtm_ATOM0_2_TOUT12_P00_3_OUT */

190 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT2_P02_2_OUT; /**< \brief IfxGtm_ATOM0_2_TOUT2_P02_2_OUT */

191 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT33_P33_11_OUT; /**< \brief IfxGtm_ATOM0_2_TOUT33_P33_11_OUT */

192 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT42_P23_1_OUT; /**< \brief IfxGtm_ATOM0_2_TOUT42_P23_1_OUT */

193 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT46_P23_5_OUT; /**< \brief IfxGtm_ATOM0_2_TOUT46_P23_5_OUT */

194 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT55_P21_4_OUT; /**< \brief IfxGtm_ATOM0_2_TOUT55_P21_4_OUT */

195 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT83_P14_3_OUT; /**< \brief IfxGtm_ATOM0_2_TOUT83_P14_3_OUT */

196 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT115_P01_7_OUT; /**< \brief IfxGtm_ATOM0_3N_TOUT115_P01_7_OUT */

197 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT16_P00_7_OUT; /**< \brief IfxGtm_ATOM0_3N_TOUT16_P00_7_OUT */

198 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT24_P33_2_OUT; /**< \brief IfxGtm_ATOM0_3N_TOUT24_P33_2_OUT */

199 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT42_P23_1_OUT; /**< \brief IfxGtm_ATOM0_3N_TOUT42_P23_1_OUT */

200 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT45_P23_4_OUT; /**< \brief IfxGtm_ATOM0_3N_TOUT45_P23_4_OUT */

201 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT59_P20_0_OUT; /**< \brief IfxGtm_ATOM0_3N_TOUT59_P20_0_OUT */

202 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT66_P20_10_OUT; /**< \brief IfxGtm_ATOM0_3N_TOUT66_P20_10_OUT */

203 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT6_P02_6_OUT; /**< \brief IfxGtm_ATOM0_3N_TOUT6_P02_6_OUT */

204 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT118_P02_11_OUT; /**< \brief IfxGtm_ATOM0_3_TOUT118_P02_11_OUT */

205 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT13_P00_4_OUT; /**< \brief IfxGtm_ATOM0_3_TOUT13_P00_4_OUT */

206 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT38_P32_2_OUT; /**< \brief IfxGtm_ATOM0_3_TOUT38_P32_2_OUT */

207 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT3_P02_3_OUT; /**< \brief IfxGtm_ATOM0_3_TOUT3_P02_3_OUT */

208 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT49_P22_2_OUT; /**< \brief IfxGtm_ATOM0_3_TOUT49_P22_2_OUT */

209 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT56_P21_5_OUT; /**< \brief IfxGtm_ATOM0_3_TOUT56_P21_5_OUT */

210 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT60_P20_1_OUT; /**< \brief IfxGtm_ATOM0_3_TOUT60_P20_1_OUT */

211 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT82_P14_2_OUT; /**< \brief IfxGtm_ATOM0_3_TOUT82_P14_2_OUT */

212 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4N_TOUT118_P02_11_OUT; /**< \brief IfxGtm_ATOM0_4N_TOUT118_P02_11_OUT */

213 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4N_TOUT135_P22_9_OUT; /**< \brief IfxGtm_ATOM0_4N_TOUT135_P22_9_OUT */

214 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4N_TOUT13_P00_4_OUT; /**< \brief IfxGtm_ATOM0_4N_TOUT13_P00_4_OUT */

215 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4N_TOUT147_P34_2_OUT; /**< \brief IfxGtm_ATOM0_4N_TOUT147_P34_2_OUT */

216 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4N_TOUT3_P02_3_OUT; /**< \brief IfxGtm_ATOM0_4N_TOUT3_P02_3_OUT */

217 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT146_P34_1_OUT; /**< \brief IfxGtm_ATOM0_4_TOUT146_P34_1_OUT */

218 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT14_P00_5_OUT; /**< \brief IfxGtm_ATOM0_4_TOUT14_P00_5_OUT */

219 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT29_P33_7_OUT; /**< \brief IfxGtm_ATOM0_4_TOUT29_P33_7_OUT */

220 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT39_P32_3_OUT; /**< \brief IfxGtm_ATOM0_4_TOUT39_P32_3_OUT */

221 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT4_P02_4_OUT; /**< \brief IfxGtm_ATOM0_4_TOUT4_P02_4_OUT */

222 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT50_P22_3_OUT; /**< \brief IfxGtm_ATOM0_4_TOUT50_P22_3_OUT */

223 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT57_P21_6_OUT; /**< \brief IfxGtm_ATOM0_4_TOUT57_P21_6_OUT */

224 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT61_P20_3_OUT; /**< \brief IfxGtm_ATOM0_4_TOUT61_P20_3_OUT */

225 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT81_P14_1_OUT; /**< \brief IfxGtm_ATOM0_4_TOUT81_P14_1_OUT */

226 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5N_TOUT0_P02_0_OUT; /**< \brief IfxGtm_ATOM0_5N_TOUT0_P02_0_OUT */

227 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5N_TOUT136_P22_10_OUT; /**< \brief IfxGtm_ATOM0_5N_TOUT136_P22_10_OUT */

228 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5N_TOUT148_P34_3_OUT; /**< \brief IfxGtm_ATOM0_5N_TOUT148_P34_3_OUT */

229 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5N_TOUT26_P33_4_OUT; /**< \brief IfxGtm_ATOM0_5N_TOUT26_P33_4_OUT */

230 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5N_TOUT8_P02_8_OUT; /**< \brief IfxGtm_ATOM0_5N_TOUT8_P02_8_OUT */

231 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5N_TOUT9_P00_0_OUT; /**< \brief IfxGtm_ATOM0_5N_TOUT9_P00_0_OUT */

232 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT15_P00_6_OUT; /**< \brief IfxGtm_ATOM0_5_TOUT15_P00_6_OUT */

233 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT23_P33_1_OUT; /**< \brief IfxGtm_ATOM0_5_TOUT23_P33_1_OUT */

234 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT40_P32_4_OUT; /**< \brief IfxGtm_ATOM0_5_TOUT40_P32_4_OUT */

235 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT41_P23_0_OUT; /**< \brief IfxGtm_ATOM0_5_TOUT41_P23_0_OUT */

236 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT58_P21_7_OUT; /**< \brief IfxGtm_ATOM0_5_TOUT58_P21_7_OUT */

237 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT5_P02_5_OUT; /**< \brief IfxGtm_ATOM0_5_TOUT5_P02_5_OUT */

238 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6N_TOUT10_P00_1_OUT; /**< \brief IfxGtm_ATOM0_6N_TOUT10_P00_1_OUT */

239 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6N_TOUT116_P02_9_OUT; /**< \brief IfxGtm_ATOM0_6N_TOUT116_P02_9_OUT */

240 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6N_TOUT11_P00_2_OUT; /**< \brief IfxGtm_ATOM0_6N_TOUT11_P00_2_OUT */

241 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6N_TOUT137_P22_11_OUT; /**< \brief IfxGtm_ATOM0_6N_TOUT137_P22_11_OUT */

242 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6N_TOUT149_P34_4_OUT; /**< \brief IfxGtm_ATOM0_6N_TOUT149_P34_4_OUT */

243 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6N_TOUT1_P02_1_OUT; /**< \brief IfxGtm_ATOM0_6N_TOUT1_P02_1_OUT */

244 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6N_TOUT27_P33_5_OUT; /**< \brief IfxGtm_ATOM0_6N_TOUT27_P33_5_OUT */

245 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT106_P10_4_OUT; /**< \brief IfxGtm_ATOM0_6_TOUT106_P10_4_OUT */

246 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT16_P00_7_OUT; /**< \brief IfxGtm_ATOM0_6_TOUT16_P00_7_OUT */

247 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT24_P33_2_OUT; /**< \brief IfxGtm_ATOM0_6_TOUT24_P33_2_OUT */

248 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT42_P23_1_OUT; /**< \brief IfxGtm_ATOM0_6_TOUT42_P23_1_OUT */

249 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT59_P20_0_OUT; /**< \brief IfxGtm_ATOM0_6_TOUT59_P20_0_OUT */

250 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT6_P02_6_OUT; /**< \brief IfxGtm_ATOM0_6_TOUT6_P02_6_OUT */

251 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7N_TOUT117_P02_10_OUT; /**< \brief IfxGtm_ATOM0_7N_TOUT117_P02_10_OUT */

252 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7N_TOUT12_P00_3_OUT; /**< \brief IfxGtm_ATOM0_7N_TOUT12_P00_3_OUT */

253 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7N_TOUT150_P34_5_OUT; /**< \brief IfxGtm_ATOM0_7N_TOUT150_P34_5_OUT */

254 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7N_TOUT28_P33_6_OUT; /**< \brief IfxGtm_ATOM0_7N_TOUT28_P33_6_OUT */

255 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7N_TOUT2_P02_2_OUT; /**< \brief IfxGtm_ATOM0_7N_TOUT2_P02_2_OUT */

256 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT17_P00_8_OUT; /**< \brief IfxGtm_ATOM0_7_TOUT17_P00_8_OUT */

257 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT25_P33_3_OUT; /**< \brief IfxGtm_ATOM0_7_TOUT25_P33_3_OUT */

258 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT45_P23_4_OUT; /**< \brief IfxGtm_ATOM0_7_TOUT45_P23_4_OUT */

259 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT64_P20_8_OUT; /**< \brief IfxGtm_ATOM0_7_TOUT64_P20_8_OUT */

260 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT7_P02_7_OUT; /**< \brief IfxGtm_ATOM0_7_TOUT7_P02_7_OUT */

261 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0N_TOUT112_P01_4_OUT; /**< \brief IfxGtm_ATOM1_0N_TOUT112_P01_4_OUT */

262 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0N_TOUT17_P00_8_OUT; /**< \brief IfxGtm_ATOM1_0N_TOUT17_P00_8_OUT */

263 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0N_TOUT7_P02_7_OUT; /**< \brief IfxGtm_ATOM1_0N_TOUT7_P02_7_OUT */

264 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT0_P02_0_OUT; /**< \brief IfxGtm_ATOM1_0_TOUT0_P02_0_OUT */

265 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT109_P10_7_OUT; /**< \brief IfxGtm_ATOM1_0_TOUT109_P10_7_OUT */

266 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT68_P20_12_OUT; /**< \brief IfxGtm_ATOM1_0_TOUT68_P20_12_OUT */

267 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT76_P15_5_OUT; /**< \brief IfxGtm_ATOM1_0_TOUT76_P15_5_OUT */

268 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT77_P15_6_OUT; /**< \brief IfxGtm_ATOM1_0_TOUT77_P15_6_OUT */

269 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT87_P14_7_OUT; /**< \brief IfxGtm_ATOM1_0_TOUT87_P14_7_OUT */

270 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT8_P02_8_OUT; /**< \brief IfxGtm_ATOM1_0_TOUT8_P02_8_OUT */

271 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT9_P00_0_OUT; /**< \brief IfxGtm_ATOM1_0_TOUT9_P00_0_OUT */

272 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1N_TOUT102_P10_0_OUT; /**< \brief IfxGtm_ATOM1_1N_TOUT102_P10_0_OUT */

273 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1N_TOUT113_P01_5_OUT; /**< \brief IfxGtm_ATOM1_1N_TOUT113_P01_5_OUT */

274 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1N_TOUT14_P00_5_OUT; /**< \brief IfxGtm_ATOM1_1N_TOUT14_P00_5_OUT */

275 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1N_TOUT39_P32_3_OUT; /**< \brief IfxGtm_ATOM1_1N_TOUT39_P32_3_OUT */

276 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1N_TOUT4_P02_4_OUT; /**< \brief IfxGtm_ATOM1_1N_TOUT4_P02_4_OUT */

277 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1N_TOUT61_P20_3_OUT; /**< \brief IfxGtm_ATOM1_1N_TOUT61_P20_3_OUT */

278 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1N_TOUT72_P15_1_OUT; /**< \brief IfxGtm_ATOM1_1N_TOUT72_P15_1_OUT */

279 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT103_P10_1_OUT; /**< \brief IfxGtm_ATOM1_1_TOUT103_P10_1_OUT */

280 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT10_P00_1_OUT; /**< \brief IfxGtm_ATOM1_1_TOUT10_P00_1_OUT */

281 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT116_P02_9_OUT; /**< \brief IfxGtm_ATOM1_1_TOUT116_P02_9_OUT */

282 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT11_P00_2_OUT; /**< \brief IfxGtm_ATOM1_1_TOUT11_P00_2_OUT */

283 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT1_P02_1_OUT; /**< \brief IfxGtm_ATOM1_1_TOUT1_P02_1_OUT */

284 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT31_P33_9_OUT; /**< \brief IfxGtm_ATOM1_1_TOUT31_P33_9_OUT */

285 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT69_P20_13_OUT; /**< \brief IfxGtm_ATOM1_1_TOUT69_P20_13_OUT */

286 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT78_P15_7_OUT; /**< \brief IfxGtm_ATOM1_1_TOUT78_P15_7_OUT */

287 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT79_P15_8_OUT; /**< \brief IfxGtm_ATOM1_1_TOUT79_P15_8_OUT */

288 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT86_P14_6_OUT; /**< \brief IfxGtm_ATOM1_1_TOUT86_P14_6_OUT */

289 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT110_P10_8_OUT; /**< \brief IfxGtm_ATOM1_2N_TOUT110_P10_8_OUT */

290 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT114_P01_6_OUT; /**< \brief IfxGtm_ATOM1_2N_TOUT114_P01_6_OUT */

291 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT15_P00_6_OUT; /**< \brief IfxGtm_ATOM1_2N_TOUT15_P00_6_OUT */

292 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT23_P33_1_OUT; /**< \brief IfxGtm_ATOM1_2N_TOUT23_P33_1_OUT */

293 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT40_P32_4_OUT; /**< \brief IfxGtm_ATOM1_2N_TOUT40_P32_4_OUT */

294 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT41_P23_0_OUT; /**< \brief IfxGtm_ATOM1_2N_TOUT41_P23_0_OUT */

295 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT5_P02_5_OUT; /**< \brief IfxGtm_ATOM1_2N_TOUT5_P02_5_OUT */

296 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT73_P15_2_OUT; /**< \brief IfxGtm_ATOM1_2N_TOUT73_P15_2_OUT */

297 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT104_P10_2_OUT; /**< \brief IfxGtm_ATOM1_2_TOUT104_P10_2_OUT */

298 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT107_P10_5_OUT; /**< \brief IfxGtm_ATOM1_2_TOUT107_P10_5_OUT */

299 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT117_P02_10_OUT; /**< \brief IfxGtm_ATOM1_2_TOUT117_P02_10_OUT */

300 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT12_P00_3_OUT; /**< \brief IfxGtm_ATOM1_2_TOUT12_P00_3_OUT */

301 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT2_P02_2_OUT; /**< \brief IfxGtm_ATOM1_2_TOUT2_P02_2_OUT */

302 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT33_P33_11_OUT; /**< \brief IfxGtm_ATOM1_2_TOUT33_P33_11_OUT */

303 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT70_P20_14_OUT; /**< \brief IfxGtm_ATOM1_2_TOUT70_P20_14_OUT */

304 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT80_P14_0_OUT; /**< \brief IfxGtm_ATOM1_2_TOUT80_P14_0_OUT */

305 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3N_TOUT106_P10_4_OUT; /**< \brief IfxGtm_ATOM1_3N_TOUT106_P10_4_OUT */

306 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3N_TOUT115_P01_7_OUT; /**< \brief IfxGtm_ATOM1_3N_TOUT115_P01_7_OUT */

307 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3N_TOUT16_P00_7_OUT; /**< \brief IfxGtm_ATOM1_3N_TOUT16_P00_7_OUT */

308 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3N_TOUT24_P33_2_OUT; /**< \brief IfxGtm_ATOM1_3N_TOUT24_P33_2_OUT */

309 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3N_TOUT42_P23_1_OUT; /**< \brief IfxGtm_ATOM1_3N_TOUT42_P23_1_OUT */

310 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3N_TOUT6_P02_6_OUT; /**< \brief IfxGtm_ATOM1_3N_TOUT6_P02_6_OUT */

311 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3N_TOUT74_P15_3_OUT; /**< \brief IfxGtm_ATOM1_3N_TOUT74_P15_3_OUT */

312 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT105_P10_3_OUT; /**< \brief IfxGtm_ATOM1_3_TOUT105_P10_3_OUT */

313 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT108_P10_6_OUT; /**< \brief IfxGtm_ATOM1_3_TOUT108_P10_6_OUT */

314 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT118_P02_11_OUT; /**< \brief IfxGtm_ATOM1_3_TOUT118_P02_11_OUT */

315 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT13_P00_4_OUT; /**< \brief IfxGtm_ATOM1_3_TOUT13_P00_4_OUT */

316 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT38_P32_2_OUT; /**< \brief IfxGtm_ATOM1_3_TOUT38_P32_2_OUT */

317 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT3_P02_3_OUT; /**< \brief IfxGtm_ATOM1_3_TOUT3_P02_3_OUT */

318 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT60_P20_1_OUT; /**< \brief IfxGtm_ATOM1_3_TOUT60_P20_1_OUT */

319 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT71_P15_0_OUT; /**< \brief IfxGtm_ATOM1_3_TOUT71_P15_0_OUT */

320 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT105_P10_3_OUT; /**< \brief IfxGtm_ATOM1_4N_TOUT105_P10_3_OUT */

321 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT108_P10_6_OUT; /**< \brief IfxGtm_ATOM1_4N_TOUT108_P10_6_OUT */

322 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT118_P02_11_OUT; /**< \brief IfxGtm_ATOM1_4N_TOUT118_P02_11_OUT */

323 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT131_P22_5_OUT; /**< \brief IfxGtm_ATOM1_4N_TOUT131_P22_5_OUT */

324 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT13_P00_4_OUT; /**< \brief IfxGtm_ATOM1_4N_TOUT13_P00_4_OUT */

325 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT147_P34_2_OUT; /**< \brief IfxGtm_ATOM1_4N_TOUT147_P34_2_OUT */

326 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT3_P02_3_OUT; /**< \brief IfxGtm_ATOM1_4N_TOUT3_P02_3_OUT */

327 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT71_P15_0_OUT; /**< \brief IfxGtm_ATOM1_4N_TOUT71_P15_0_OUT */

328 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT75_P15_4_OUT; /**< \brief IfxGtm_ATOM1_4N_TOUT75_P15_4_OUT */

329 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT102_P10_0_OUT; /**< \brief IfxGtm_ATOM1_4_TOUT102_P10_0_OUT */

330 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT130_P22_4_OUT; /**< \brief IfxGtm_ATOM1_4_TOUT130_P22_4_OUT */

331 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT146_P34_1_OUT; /**< \brief IfxGtm_ATOM1_4_TOUT146_P34_1_OUT */

332 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT14_P00_5_OUT; /**< \brief IfxGtm_ATOM1_4_TOUT14_P00_5_OUT */

333 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT29_P33_7_OUT; /**< \brief IfxGtm_ATOM1_4_TOUT29_P33_7_OUT */

334 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT39_P32_3_OUT; /**< \brief IfxGtm_ATOM1_4_TOUT39_P32_3_OUT */

335 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT4_P02_4_OUT; /**< \brief IfxGtm_ATOM1_4_TOUT4_P02_4_OUT */

336 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT61_P20_3_OUT; /**< \brief IfxGtm_ATOM1_4_TOUT61_P20_3_OUT */

337 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT72_P15_1_OUT; /**< \brief IfxGtm_ATOM1_4_TOUT72_P15_1_OUT */

338 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT0_P02_0_OUT; /**< \brief IfxGtm_ATOM1_5N_TOUT0_P02_0_OUT */

339 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT109_P10_7_OUT; /**< \brief IfxGtm_ATOM1_5N_TOUT109_P10_7_OUT */

340 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT132_P22_6_OUT; /**< \brief IfxGtm_ATOM1_5N_TOUT132_P22_6_OUT */

341 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT148_P34_3_OUT; /**< \brief IfxGtm_ATOM1_5N_TOUT148_P34_3_OUT */

342 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT26_P33_4_OUT; /**< \brief IfxGtm_ATOM1_5N_TOUT26_P33_4_OUT */

343 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT76_P15_5_OUT; /**< \brief IfxGtm_ATOM1_5N_TOUT76_P15_5_OUT */

344 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT77_P15_6_OUT; /**< \brief IfxGtm_ATOM1_5N_TOUT77_P15_6_OUT */

345 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT8_P02_8_OUT; /**< \brief IfxGtm_ATOM1_5N_TOUT8_P02_8_OUT */

346 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT9_P00_0_OUT; /**< \brief IfxGtm_ATOM1_5N_TOUT9_P00_0_OUT */

347 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT110_P10_8_OUT; /**< \brief IfxGtm_ATOM1_5_TOUT110_P10_8_OUT */

348 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT15_P00_6_OUT; /**< \brief IfxGtm_ATOM1_5_TOUT15_P00_6_OUT */

349 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT23_P33_1_OUT; /**< \brief IfxGtm_ATOM1_5_TOUT23_P33_1_OUT */

350 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT40_P32_4_OUT; /**< \brief IfxGtm_ATOM1_5_TOUT40_P32_4_OUT */

351 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT41_P23_0_OUT; /**< \brief IfxGtm_ATOM1_5_TOUT41_P23_0_OUT */

352 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT5_P02_5_OUT; /**< \brief IfxGtm_ATOM1_5_TOUT5_P02_5_OUT */

353 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT65_P20_9_OUT; /**< \brief IfxGtm_ATOM1_5_TOUT65_P20_9_OUT */

354 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT73_P15_2_OUT; /**< \brief IfxGtm_ATOM1_5_TOUT73_P15_2_OUT */

355 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT103_P10_1_OUT; /**< \brief IfxGtm_ATOM1_6N_TOUT103_P10_1_OUT */

356 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT10_P00_1_OUT; /**< \brief IfxGtm_ATOM1_6N_TOUT10_P00_1_OUT */

357 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT116_P02_9_OUT; /**< \brief IfxGtm_ATOM1_6N_TOUT116_P02_9_OUT */

358 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT11_P00_2_OUT; /**< \brief IfxGtm_ATOM1_6N_TOUT11_P00_2_OUT */

359 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT133_P22_7_OUT; /**< \brief IfxGtm_ATOM1_6N_TOUT133_P22_7_OUT */

360 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT149_P34_4_OUT; /**< \brief IfxGtm_ATOM1_6N_TOUT149_P34_4_OUT */

361 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT1_P02_1_OUT; /**< \brief IfxGtm_ATOM1_6N_TOUT1_P02_1_OUT */

362 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT27_P33_5_OUT; /**< \brief IfxGtm_ATOM1_6N_TOUT27_P33_5_OUT */

363 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT78_P15_7_OUT; /**< \brief IfxGtm_ATOM1_6N_TOUT78_P15_7_OUT */

364 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT106_P10_4_OUT; /**< \brief IfxGtm_ATOM1_6_TOUT106_P10_4_OUT */

365 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT16_P00_7_OUT; /**< \brief IfxGtm_ATOM1_6_TOUT16_P00_7_OUT */

366 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT24_P33_2_OUT; /**< \brief IfxGtm_ATOM1_6_TOUT24_P33_2_OUT */

367 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT42_P23_1_OUT; /**< \brief IfxGtm_ATOM1_6_TOUT42_P23_1_OUT */

368 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT66_P20_10_OUT; /**< \brief IfxGtm_ATOM1_6_TOUT66_P20_10_OUT */

369 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT6_P02_6_OUT; /**< \brief IfxGtm_ATOM1_6_TOUT6_P02_6_OUT */

370 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT74_P15_3_OUT; /**< \brief IfxGtm_ATOM1_6_TOUT74_P15_3_OUT */

371 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT104_P10_2_OUT; /**< \brief IfxGtm_ATOM1_7N_TOUT104_P10_2_OUT */

372 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT107_P10_5_OUT; /**< \brief IfxGtm_ATOM1_7N_TOUT107_P10_5_OUT */

373 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT117_P02_10_OUT; /**< \brief IfxGtm_ATOM1_7N_TOUT117_P02_10_OUT */

374 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT12_P00_3_OUT; /**< \brief IfxGtm_ATOM1_7N_TOUT12_P00_3_OUT */

375 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT134_P22_8_OUT; /**< \brief IfxGtm_ATOM1_7N_TOUT134_P22_8_OUT */

376 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT150_P34_5_OUT; /**< \brief IfxGtm_ATOM1_7N_TOUT150_P34_5_OUT */

377 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT28_P33_6_OUT; /**< \brief IfxGtm_ATOM1_7N_TOUT28_P33_6_OUT */

378 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT2_P02_2_OUT; /**< \brief IfxGtm_ATOM1_7N_TOUT2_P02_2_OUT */

379 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT79_P15_8_OUT; /**< \brief IfxGtm_ATOM1_7N_TOUT79_P15_8_OUT */

380 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT17_P00_8_OUT; /**< \brief IfxGtm_ATOM1_7_TOUT17_P00_8_OUT */

381 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT25_P33_3_OUT; /**< \brief IfxGtm_ATOM1_7_TOUT25_P33_3_OUT */

382 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT45_P23_4_OUT; /**< \brief IfxGtm_ATOM1_7_TOUT45_P23_4_OUT */

383 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT67_P20_11_OUT; /**< \brief IfxGtm_ATOM1_7_TOUT67_P20_11_OUT */

384 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT75_P15_4_OUT; /**< \brief IfxGtm_ATOM1_7_TOUT75_P15_4_OUT */

385 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT7_P02_7_OUT; /**< \brief IfxGtm_ATOM1_7_TOUT7_P02_7_OUT */

386 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0N_TOUT101_P11_12_OUT; /**< \brief IfxGtm_ATOM2_0N_TOUT101_P11_12_OUT */

387 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0N_TOUT108_P10_6_OUT; /**< \brief IfxGtm_ATOM2_0N_TOUT108_P10_6_OUT */

388 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0N_TOUT12_P00_3_OUT; /**< \brief IfxGtm_ATOM2_0N_TOUT12_P00_3_OUT */

389 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0N_TOUT144_P33_15_OUT; /**< \brief IfxGtm_ATOM2_0N_TOUT144_P33_15_OUT */

390 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0N_TOUT25_P33_3_OUT; /**< \brief IfxGtm_ATOM2_0N_TOUT25_P33_3_OUT */

391 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0N_TOUT32_P33_10_OUT; /**< \brief IfxGtm_ATOM2_0N_TOUT32_P33_10_OUT */

392 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0N_TOUT37_P32_1_OUT; /**< \brief IfxGtm_ATOM2_0N_TOUT37_P32_1_OUT */

393 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT109_P10_7_OUT; /**< \brief IfxGtm_ATOM2_0_TOUT109_P10_7_OUT */

394 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT18_P00_9_OUT; /**< \brief IfxGtm_ATOM2_0_TOUT18_P00_9_OUT */

395 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT26_P33_4_OUT; /**< \brief IfxGtm_ATOM2_0_TOUT26_P33_4_OUT */

396 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT32_P33_10_OUT; /**< \brief IfxGtm_ATOM2_0_TOUT32_P33_10_OUT */

397 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT94_P13_3_OUT; /**< \brief IfxGtm_ATOM2_0_TOUT94_P13_3_OUT */

398 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT105_P10_3_OUT; /**< \brief IfxGtm_ATOM2_1N_TOUT105_P10_3_OUT */

399 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT167_P00_13_OUT; /**< \brief IfxGtm_ATOM2_1N_TOUT167_P00_13_OUT */

400 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT22_P33_0_OUT; /**< \brief IfxGtm_ATOM2_1N_TOUT22_P33_0_OUT */

401 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT30_P33_8_OUT; /**< \brief IfxGtm_ATOM2_1N_TOUT30_P33_8_OUT */

402 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT34_P33_12_OUT; /**< \brief IfxGtm_ATOM2_1N_TOUT34_P33_12_OUT */

403 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT51_P21_0_OUT; /**< \brief IfxGtm_ATOM2_1N_TOUT51_P21_0_OUT */

404 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT90_P14_10_OUT; /**< \brief IfxGtm_ATOM2_1N_TOUT90_P14_10_OUT */

405 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT91_P13_0_OUT; /**< \brief IfxGtm_ATOM2_1N_TOUT91_P13_0_OUT */

406 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT98_P11_9_OUT; /**< \brief IfxGtm_ATOM2_1N_TOUT98_P11_9_OUT */

407 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT9_P00_0_OUT; /**< \brief IfxGtm_ATOM2_1N_TOUT9_P00_0_OUT */

408 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT102_P10_0_OUT; /**< \brief IfxGtm_ATOM2_1_TOUT102_P10_0_OUT */

409 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT19_P00_10_OUT; /**< \brief IfxGtm_ATOM2_1_TOUT19_P00_10_OUT */

410 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT27_P33_5_OUT; /**< \brief IfxGtm_ATOM2_1_TOUT27_P33_5_OUT */

411 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT43_P23_2_OUT; /**< \brief IfxGtm_ATOM2_1_TOUT43_P23_2_OUT */

412 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT90_P14_10_OUT; /**< \brief IfxGtm_ATOM2_1_TOUT90_P14_10_OUT */

413 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT95_P11_2_OUT; /**< \brief IfxGtm_ATOM2_1_TOUT95_P11_2_OUT */

414 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT106_P10_4_OUT; /**< \brief IfxGtm_ATOM2_2N_TOUT106_P10_4_OUT */

415 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT10_P00_1_OUT; /**< \brief IfxGtm_ATOM2_2N_TOUT10_P00_1_OUT */

416 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT114_P01_6_OUT; /**< \brief IfxGtm_ATOM2_2N_TOUT114_P01_6_OUT */

417 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT138_P23_6_OUT; /**< \brief IfxGtm_ATOM2_2N_TOUT138_P23_6_OUT */

418 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT166_P00_14_OUT; /**< \brief IfxGtm_ATOM2_2N_TOUT166_P00_14_OUT */

419 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT23_P33_1_OUT; /**< \brief IfxGtm_ATOM2_2N_TOUT23_P33_1_OUT */

420 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT31_P33_9_OUT; /**< \brief IfxGtm_ATOM2_2N_TOUT31_P33_9_OUT */

421 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT35_P33_13_OUT; /**< \brief IfxGtm_ATOM2_2N_TOUT35_P33_13_OUT */

422 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT52_P21_1_OUT; /**< \brief IfxGtm_ATOM2_2N_TOUT52_P21_1_OUT */

423 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT91_P13_0_OUT; /**< \brief IfxGtm_ATOM2_2N_TOUT91_P13_0_OUT */

424 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT92_P13_1_OUT; /**< \brief IfxGtm_ATOM2_2N_TOUT92_P13_1_OUT */

425 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT99_P11_10_OUT; /**< \brief IfxGtm_ATOM2_2N_TOUT99_P11_10_OUT */

426 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT103_P10_1_OUT; /**< \brief IfxGtm_ATOM2_2_TOUT103_P10_1_OUT */

427 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT20_P00_11_OUT; /**< \brief IfxGtm_ATOM2_2_TOUT20_P00_11_OUT */

428 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT28_P33_6_OUT; /**< \brief IfxGtm_ATOM2_2_TOUT28_P33_6_OUT */

429 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT44_P23_3_OUT; /**< \brief IfxGtm_ATOM2_2_TOUT44_P23_3_OUT */

430 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT88_P14_8_OUT; /**< \brief IfxGtm_ATOM2_2_TOUT88_P14_8_OUT */

431 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT96_P11_3_OUT; /**< \brief IfxGtm_ATOM2_2_TOUT96_P11_3_OUT */

432 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT100_P11_11_OUT; /**< \brief IfxGtm_ATOM2_3N_TOUT100_P11_11_OUT */

433 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT107_P10_5_OUT; /**< \brief IfxGtm_ATOM2_3N_TOUT107_P10_5_OUT */

434 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT115_P01_7_OUT; /**< \brief IfxGtm_ATOM2_3N_TOUT115_P01_7_OUT */

435 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT11_P00_2_OUT; /**< \brief IfxGtm_ATOM2_3N_TOUT11_P00_2_OUT */

436 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT139_P23_7_OUT; /**< \brief IfxGtm_ATOM2_3N_TOUT139_P23_7_OUT */

437 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT143_P33_14_OUT; /**< \brief IfxGtm_ATOM2_3N_TOUT143_P33_14_OUT */

438 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT168_P00_15_OUT; /**< \brief IfxGtm_ATOM2_3N_TOUT168_P00_15_OUT */

439 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT24_P33_2_OUT; /**< \brief IfxGtm_ATOM2_3N_TOUT24_P33_2_OUT */

440 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT33_P33_11_OUT; /**< \brief IfxGtm_ATOM2_3N_TOUT33_P33_11_OUT */

441 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT36_P32_0_OUT; /**< \brief IfxGtm_ATOM2_3N_TOUT36_P32_0_OUT */

442 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT62_P20_6_OUT; /**< \brief IfxGtm_ATOM2_3N_TOUT62_P20_6_OUT */

443 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT92_P13_1_OUT; /**< \brief IfxGtm_ATOM2_3N_TOUT92_P13_1_OUT */

444 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT93_P13_2_OUT; /**< \brief IfxGtm_ATOM2_3N_TOUT93_P13_2_OUT */

445 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT104_P10_2_OUT; /**< \brief IfxGtm_ATOM2_3_TOUT104_P10_2_OUT */

446 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT21_P00_12_OUT; /**< \brief IfxGtm_ATOM2_3_TOUT21_P00_12_OUT */

447 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT29_P33_7_OUT; /**< \brief IfxGtm_ATOM2_3_TOUT29_P33_7_OUT */

448 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT89_P14_9_OUT; /**< \brief IfxGtm_ATOM2_3_TOUT89_P14_9_OUT */

449 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT97_P11_6_OUT; /**< \brief IfxGtm_ATOM2_3_TOUT97_P11_6_OUT */

450 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4N_TOUT29_P33_7_OUT; /**< \brief IfxGtm_ATOM2_4N_TOUT29_P33_7_OUT */

451 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4N_TOUT57_P21_6_OUT; /**< \brief IfxGtm_ATOM2_4N_TOUT57_P21_6_OUT */

452 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4N_TOUT86_P14_6_OUT; /**< \brief IfxGtm_ATOM2_4N_TOUT86_P14_6_OUT */

453 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4N_TOUT97_P11_6_OUT; /**< \brief IfxGtm_ATOM2_4N_TOUT97_P11_6_OUT */

454 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT167_P00_13_OUT; /**< \brief IfxGtm_ATOM2_4_TOUT167_P00_13_OUT */

455 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT22_P33_0_OUT; /**< \brief IfxGtm_ATOM2_4_TOUT22_P33_0_OUT */

456 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT30_P33_8_OUT; /**< \brief IfxGtm_ATOM2_4_TOUT30_P33_8_OUT */

457 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT34_P33_12_OUT; /**< \brief IfxGtm_ATOM2_4_TOUT34_P33_12_OUT */

458 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT51_P21_0_OUT; /**< \brief IfxGtm_ATOM2_4_TOUT51_P21_0_OUT */

459 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT90_P14_10_OUT; /**< \brief IfxGtm_ATOM2_4_TOUT90_P14_10_OUT */

460 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT98_P11_9_OUT; /**< \brief IfxGtm_ATOM2_4_TOUT98_P11_9_OUT */

461 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5N_TOUT120_P11_1_OUT; /**< \brief IfxGtm_ATOM2_5N_TOUT120_P11_1_OUT */

462 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5N_TOUT26_P33_4_OUT; /**< \brief IfxGtm_ATOM2_5N_TOUT26_P33_4_OUT */

463 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5N_TOUT59_P20_0_OUT; /**< \brief IfxGtm_ATOM2_5N_TOUT59_P20_0_OUT */

464 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5N_TOUT87_P14_7_OUT; /**< \brief IfxGtm_ATOM2_5N_TOUT87_P14_7_OUT */

465 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5N_TOUT94_P13_3_OUT; /**< \brief IfxGtm_ATOM2_5N_TOUT94_P13_3_OUT */

466 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT138_P23_6_OUT; /**< \brief IfxGtm_ATOM2_5_TOUT138_P23_6_OUT */

467 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT166_P00_14_OUT; /**< \brief IfxGtm_ATOM2_5_TOUT166_P00_14_OUT */

468 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT35_P33_13_OUT; /**< \brief IfxGtm_ATOM2_5_TOUT35_P33_13_OUT */

469 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT52_P21_1_OUT; /**< \brief IfxGtm_ATOM2_5_TOUT52_P21_1_OUT */

470 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT65_P20_9_OUT; /**< \brief IfxGtm_ATOM2_5_TOUT65_P20_9_OUT */

471 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT91_P13_0_OUT; /**< \brief IfxGtm_ATOM2_5_TOUT91_P13_0_OUT */

472 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT99_P11_10_OUT; /**< \brief IfxGtm_ATOM2_5_TOUT99_P11_10_OUT */

473 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6N_TOUT27_P33_5_OUT; /**< \brief IfxGtm_ATOM2_6N_TOUT27_P33_5_OUT */

474 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6N_TOUT60_P20_1_OUT; /**< \brief IfxGtm_ATOM2_6N_TOUT60_P20_1_OUT */

475 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6N_TOUT88_P14_8_OUT; /**< \brief IfxGtm_ATOM2_6N_TOUT88_P14_8_OUT */

476 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6N_TOUT95_P11_2_OUT; /**< \brief IfxGtm_ATOM2_6N_TOUT95_P11_2_OUT */

477 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT100_P11_11_OUT; /**< \brief IfxGtm_ATOM2_6_TOUT100_P11_11_OUT */

478 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT139_P23_7_OUT; /**< \brief IfxGtm_ATOM2_6_TOUT139_P23_7_OUT */

479 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT143_P33_14_OUT; /**< \brief IfxGtm_ATOM2_6_TOUT143_P33_14_OUT */

480 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT168_P00_15_OUT; /**< \brief IfxGtm_ATOM2_6_TOUT168_P00_15_OUT */

481 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT36_P32_0_OUT; /**< \brief IfxGtm_ATOM2_6_TOUT36_P32_0_OUT */

482 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT62_P20_6_OUT; /**< \brief IfxGtm_ATOM2_6_TOUT62_P20_6_OUT */

483 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT92_P13_1_OUT; /**< \brief IfxGtm_ATOM2_6_TOUT92_P13_1_OUT */

484 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7N_TOUT28_P33_6_OUT; /**< \brief IfxGtm_ATOM2_7N_TOUT28_P33_6_OUT */

485 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7N_TOUT61_P20_3_OUT; /**< \brief IfxGtm_ATOM2_7N_TOUT61_P20_3_OUT */

486 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7N_TOUT89_P14_9_OUT; /**< \brief IfxGtm_ATOM2_7N_TOUT89_P14_9_OUT */

487 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7N_TOUT96_P11_3_OUT; /**< \brief IfxGtm_ATOM2_7N_TOUT96_P11_3_OUT */

488 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT101_P11_12_OUT; /**< \brief IfxGtm_ATOM2_7_TOUT101_P11_12_OUT */

489 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT140_P32_5_OUT; /**< \brief IfxGtm_ATOM2_7_TOUT140_P32_5_OUT */

490 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT144_P33_15_OUT; /**< \brief IfxGtm_ATOM2_7_TOUT144_P33_15_OUT */

491 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT37_P32_1_OUT; /**< \brief IfxGtm_ATOM2_7_TOUT37_P32_1_OUT */

492 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT63_P20_7_OUT; /**< \brief IfxGtm_ATOM2_7_TOUT63_P20_7_OUT */

493 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT93_P13_2_OUT; /**< \brief IfxGtm_ATOM2_7_TOUT93_P13_2_OUT */

494 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT101_P11_12_OUT; /**< \brief IfxGtm_ATOM3_0N_TOUT101_P11_12_OUT */

495 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT144_P33_15_OUT; /**< \brief IfxGtm_ATOM3_0N_TOUT144_P33_15_OUT */

496 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT17_P00_8_OUT; /**< \brief IfxGtm_ATOM3_0N_TOUT17_P00_8_OUT */

497 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT25_P33_3_OUT; /**< \brief IfxGtm_ATOM3_0N_TOUT25_P33_3_OUT */

498 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT32_P33_10_OUT; /**< \brief IfxGtm_ATOM3_0N_TOUT32_P33_10_OUT */

499 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT37_P32_1_OUT; /**< \brief IfxGtm_ATOM3_0N_TOUT37_P32_1_OUT */

500 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT63_P20_7_OUT; /**< \brief IfxGtm_ATOM3_0N_TOUT63_P20_7_OUT */

501 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT76_P15_5_OUT; /**< \brief IfxGtm_ATOM3_0N_TOUT76_P15_5_OUT */

502 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT18_P00_9_OUT; /**< \brief IfxGtm_ATOM3_0_TOUT18_P00_9_OUT */

503 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT26_P33_4_OUT; /**< \brief IfxGtm_ATOM3_0_TOUT26_P33_4_OUT */

504 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT32_P33_10_OUT; /**< \brief IfxGtm_ATOM3_0_TOUT32_P33_10_OUT */

505 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT65_P20_9_OUT; /**< \brief IfxGtm_ATOM3_0_TOUT65_P20_9_OUT */

506 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT94_P13_3_OUT; /**< \brief IfxGtm_ATOM3_0_TOUT94_P13_3_OUT */

507 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT14_P00_5_OUT; /**< \brief IfxGtm_ATOM3_1N_TOUT14_P00_5_OUT */

508 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT167_P00_13_OUT; /**< \brief IfxGtm_ATOM3_1N_TOUT167_P00_13_OUT */

509 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT22_P33_0_OUT; /**< \brief IfxGtm_ATOM3_1N_TOUT22_P33_0_OUT */

510 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT30_P33_8_OUT; /**< \brief IfxGtm_ATOM3_1N_TOUT30_P33_8_OUT */

511 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT34_P33_12_OUT; /**< \brief IfxGtm_ATOM3_1N_TOUT34_P33_12_OUT */

512 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT51_P21_0_OUT; /**< \brief IfxGtm_ATOM3_1N_TOUT51_P21_0_OUT */

513 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT79_P15_8_OUT; /**< \brief IfxGtm_ATOM3_1N_TOUT79_P15_8_OUT */

514 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT90_P14_10_OUT; /**< \brief IfxGtm_ATOM3_1N_TOUT90_P14_10_OUT */

515 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT91_P13_0_OUT; /**< \brief IfxGtm_ATOM3_1N_TOUT91_P13_0_OUT */

516 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT98_P11_9_OUT; /**< \brief IfxGtm_ATOM3_1N_TOUT98_P11_9_OUT */

517 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT111_P01_3_OUT; /**< \brief IfxGtm_ATOM3_1_TOUT111_P01_3_OUT */

518 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT128_P12_0_OUT; /**< \brief IfxGtm_ATOM3_1_TOUT128_P12_0_OUT */

519 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT19_P00_10_OUT; /**< \brief IfxGtm_ATOM3_1_TOUT19_P00_10_OUT */

520 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT27_P33_5_OUT; /**< \brief IfxGtm_ATOM3_1_TOUT27_P33_5_OUT */

521 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT43_P23_2_OUT; /**< \brief IfxGtm_ATOM3_1_TOUT43_P23_2_OUT */

522 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT64_P20_8_OUT; /**< \brief IfxGtm_ATOM3_1_TOUT64_P20_8_OUT */

523 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT90_P14_10_OUT; /**< \brief IfxGtm_ATOM3_1_TOUT90_P14_10_OUT */

524 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT95_P11_2_OUT; /**< \brief IfxGtm_ATOM3_1_TOUT95_P11_2_OUT */

525 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT114_P01_6_OUT; /**< \brief IfxGtm_ATOM3_2N_TOUT114_P01_6_OUT */

526 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT15_P00_6_OUT; /**< \brief IfxGtm_ATOM3_2N_TOUT15_P00_6_OUT */

527 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT166_P00_14_OUT; /**< \brief IfxGtm_ATOM3_2N_TOUT166_P00_14_OUT */

528 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT23_P33_1_OUT; /**< \brief IfxGtm_ATOM3_2N_TOUT23_P33_1_OUT */

529 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT31_P33_9_OUT; /**< \brief IfxGtm_ATOM3_2N_TOUT31_P33_9_OUT */

530 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT35_P33_13_OUT; /**< \brief IfxGtm_ATOM3_2N_TOUT35_P33_13_OUT */

531 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT52_P21_1_OUT; /**< \brief IfxGtm_ATOM3_2N_TOUT52_P21_1_OUT */

532 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT78_P15_7_OUT; /**< \brief IfxGtm_ATOM3_2N_TOUT78_P15_7_OUT */

533 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT91_P13_0_OUT; /**< \brief IfxGtm_ATOM3_2N_TOUT91_P13_0_OUT */

534 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT92_P13_1_OUT; /**< \brief IfxGtm_ATOM3_2N_TOUT92_P13_1_OUT */

535 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT99_P11_10_OUT; /**< \brief IfxGtm_ATOM3_2N_TOUT99_P11_10_OUT */

536 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT112_P01_4_OUT; /**< \brief IfxGtm_ATOM3_2_TOUT112_P01_4_OUT */

537 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT20_P00_11_OUT; /**< \brief IfxGtm_ATOM3_2_TOUT20_P00_11_OUT */

538 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT28_P33_6_OUT; /**< \brief IfxGtm_ATOM3_2_TOUT28_P33_6_OUT */

539 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT44_P23_3_OUT; /**< \brief IfxGtm_ATOM3_2_TOUT44_P23_3_OUT */

540 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT63_P20_7_OUT; /**< \brief IfxGtm_ATOM3_2_TOUT63_P20_7_OUT */

541 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT88_P14_8_OUT; /**< \brief IfxGtm_ATOM3_2_TOUT88_P14_8_OUT */

542 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT96_P11_3_OUT; /**< \brief IfxGtm_ATOM3_2_TOUT96_P11_3_OUT */

543 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT100_P11_11_OUT; /**< \brief IfxGtm_ATOM3_3N_TOUT100_P11_11_OUT */

544 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT115_P01_7_OUT; /**< \brief IfxGtm_ATOM3_3N_TOUT115_P01_7_OUT */

545 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT143_P33_14_OUT; /**< \brief IfxGtm_ATOM3_3N_TOUT143_P33_14_OUT */

546 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT168_P00_15_OUT; /**< \brief IfxGtm_ATOM3_3N_TOUT168_P00_15_OUT */

547 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT16_P00_7_OUT; /**< \brief IfxGtm_ATOM3_3N_TOUT16_P00_7_OUT */

548 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT24_P33_2_OUT; /**< \brief IfxGtm_ATOM3_3N_TOUT24_P33_2_OUT */

549 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT33_P33_11_OUT; /**< \brief IfxGtm_ATOM3_3N_TOUT33_P33_11_OUT */

550 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT36_P32_0_OUT; /**< \brief IfxGtm_ATOM3_3N_TOUT36_P32_0_OUT */

551 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT62_P20_6_OUT; /**< \brief IfxGtm_ATOM3_3N_TOUT62_P20_6_OUT */

552 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT77_P15_6_OUT; /**< \brief IfxGtm_ATOM3_3N_TOUT77_P15_6_OUT */

553 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT92_P13_1_OUT; /**< \brief IfxGtm_ATOM3_3N_TOUT92_P13_1_OUT */

554 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT93_P13_2_OUT; /**< \brief IfxGtm_ATOM3_3N_TOUT93_P13_2_OUT */

555 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT113_P01_5_OUT; /**< \brief IfxGtm_ATOM3_3_TOUT113_P01_5_OUT */

556 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT21_P00_12_OUT; /**< \brief IfxGtm_ATOM3_3_TOUT21_P00_12_OUT */

557 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT29_P33_7_OUT; /**< \brief IfxGtm_ATOM3_3_TOUT29_P33_7_OUT */

558 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT62_P20_6_OUT; /**< \brief IfxGtm_ATOM3_3_TOUT62_P20_6_OUT */

559 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT89_P14_9_OUT; /**< \brief IfxGtm_ATOM3_3_TOUT89_P14_9_OUT */

560 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT97_P11_6_OUT; /**< \brief IfxGtm_ATOM3_3_TOUT97_P11_6_OUT */

561 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4N_TOUT135_P22_9_OUT; /**< \brief IfxGtm_ATOM3_4N_TOUT135_P22_9_OUT */

562 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4N_TOUT21_P00_12_OUT; /**< \brief IfxGtm_ATOM3_4N_TOUT21_P00_12_OUT */

563 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4N_TOUT29_P33_7_OUT; /**< \brief IfxGtm_ATOM3_4N_TOUT29_P33_7_OUT */

564 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4N_TOUT57_P21_6_OUT; /**< \brief IfxGtm_ATOM3_4N_TOUT57_P21_6_OUT */

565 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4N_TOUT86_P14_6_OUT; /**< \brief IfxGtm_ATOM3_4N_TOUT86_P14_6_OUT */

566 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4N_TOUT97_P11_6_OUT; /**< \brief IfxGtm_ATOM3_4N_TOUT97_P11_6_OUT */

567 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT114_P01_6_OUT; /**< \brief IfxGtm_ATOM3_4_TOUT114_P01_6_OUT */

568 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT131_P22_5_OUT; /**< \brief IfxGtm_ATOM3_4_TOUT131_P22_5_OUT */

569 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT167_P00_13_OUT; /**< \brief IfxGtm_ATOM3_4_TOUT167_P00_13_OUT */

570 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT22_P33_0_OUT; /**< \brief IfxGtm_ATOM3_4_TOUT22_P33_0_OUT */

571 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT30_P33_8_OUT; /**< \brief IfxGtm_ATOM3_4_TOUT30_P33_8_OUT */

572 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT34_P33_12_OUT; /**< \brief IfxGtm_ATOM3_4_TOUT34_P33_12_OUT */

573 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT51_P21_0_OUT; /**< \brief IfxGtm_ATOM3_4_TOUT51_P21_0_OUT */

574 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT90_P14_10_OUT; /**< \brief IfxGtm_ATOM3_4_TOUT90_P14_10_OUT */

575 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT98_P11_9_OUT; /**< \brief IfxGtm_ATOM3_4_TOUT98_P11_9_OUT */

576 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5N_TOUT120_P11_1_OUT; /**< \brief IfxGtm_ATOM3_5N_TOUT120_P11_1_OUT */

577 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5N_TOUT136_P22_10_OUT; /**< \brief IfxGtm_ATOM3_5N_TOUT136_P22_10_OUT */

578 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5N_TOUT18_P00_9_OUT; /**< \brief IfxGtm_ATOM3_5N_TOUT18_P00_9_OUT */

579 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5N_TOUT26_P33_4_OUT; /**< \brief IfxGtm_ATOM3_5N_TOUT26_P33_4_OUT */

580 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5N_TOUT59_P20_0_OUT; /**< \brief IfxGtm_ATOM3_5N_TOUT59_P20_0_OUT */

581 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5N_TOUT87_P14_7_OUT; /**< \brief IfxGtm_ATOM3_5N_TOUT87_P14_7_OUT */

582 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5N_TOUT94_P13_3_OUT; /**< \brief IfxGtm_ATOM3_5N_TOUT94_P13_3_OUT */

583 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT115_P01_7_OUT; /**< \brief IfxGtm_ATOM3_5_TOUT115_P01_7_OUT */

584 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT132_P22_6_OUT; /**< \brief IfxGtm_ATOM3_5_TOUT132_P22_6_OUT */

585 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT166_P00_14_OUT; /**< \brief IfxGtm_ATOM3_5_TOUT166_P00_14_OUT */

586 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT35_P33_13_OUT; /**< \brief IfxGtm_ATOM3_5_TOUT35_P33_13_OUT */

587 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT52_P21_1_OUT; /**< \brief IfxGtm_ATOM3_5_TOUT52_P21_1_OUT */

588 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT64_P20_8_OUT; /**< \brief IfxGtm_ATOM3_5_TOUT64_P20_8_OUT */

589 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT91_P13_0_OUT; /**< \brief IfxGtm_ATOM3_5_TOUT91_P13_0_OUT */

590 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT99_P11_10_OUT; /**< \brief IfxGtm_ATOM3_5_TOUT99_P11_10_OUT */

591 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6N_TOUT137_P22_11_OUT; /**< \brief IfxGtm_ATOM3_6N_TOUT137_P22_11_OUT */

592 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6N_TOUT19_P00_10_OUT; /**< \brief IfxGtm_ATOM3_6N_TOUT19_P00_10_OUT */

593 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6N_TOUT27_P33_5_OUT; /**< \brief IfxGtm_ATOM3_6N_TOUT27_P33_5_OUT */

594 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6N_TOUT60_P20_1_OUT; /**< \brief IfxGtm_ATOM3_6N_TOUT60_P20_1_OUT */

595 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6N_TOUT88_P14_8_OUT; /**< \brief IfxGtm_ATOM3_6N_TOUT88_P14_8_OUT */

596 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6N_TOUT95_P11_2_OUT; /**< \brief IfxGtm_ATOM3_6N_TOUT95_P11_2_OUT */

597 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT100_P11_11_OUT; /**< \brief IfxGtm_ATOM3_6_TOUT100_P11_11_OUT */

598 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT133_P22_7_OUT; /**< \brief IfxGtm_ATOM3_6_TOUT133_P22_7_OUT */

599 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT143_P33_14_OUT; /**< \brief IfxGtm_ATOM3_6_TOUT143_P33_14_OUT */

600 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT168_P00_15_OUT; /**< \brief IfxGtm_ATOM3_6_TOUT168_P00_15_OUT */

601 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT36_P32_0_OUT; /**< \brief IfxGtm_ATOM3_6_TOUT36_P32_0_OUT */

602 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT62_P20_6_OUT; /**< \brief IfxGtm_ATOM3_6_TOUT62_P20_6_OUT */

603 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT92_P13_1_OUT; /**< \brief IfxGtm_ATOM3_6_TOUT92_P13_1_OUT */

604 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7N_TOUT20_P00_11_OUT; /**< \brief IfxGtm_ATOM3_7N_TOUT20_P00_11_OUT */

605 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7N_TOUT28_P33_6_OUT; /**< \brief IfxGtm_ATOM3_7N_TOUT28_P33_6_OUT */

606 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7N_TOUT61_P20_3_OUT; /**< \brief IfxGtm_ATOM3_7N_TOUT61_P20_3_OUT */

607 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7N_TOUT89_P14_9_OUT; /**< \brief IfxGtm_ATOM3_7N_TOUT89_P14_9_OUT */

608 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7N_TOUT96_P11_3_OUT; /**< \brief IfxGtm_ATOM3_7N_TOUT96_P11_3_OUT */

609 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT101_P11_12_OUT; /**< \brief IfxGtm_ATOM3_7_TOUT101_P11_12_OUT */

610 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT134_P22_8_OUT; /**< \brief IfxGtm_ATOM3_7_TOUT134_P22_8_OUT */

611 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT144_P33_15_OUT; /**< \brief IfxGtm_ATOM3_7_TOUT144_P33_15_OUT */

612 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT37_P32_1_OUT; /**< \brief IfxGtm_ATOM3_7_TOUT37_P32_1_OUT */

613 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT63_P20_7_OUT; /**< \brief IfxGtm_ATOM3_7_TOUT63_P20_7_OUT */

614 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT93_P13_2_OUT; /**< \brief IfxGtm_ATOM3_7_TOUT93_P13_2_OUT */

615 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0N_TOUT87_P14_7_OUT; /**< \brief IfxGtm_ATOM4_0N_TOUT87_P14_7_OUT */

616 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT109_P10_7_OUT; /**< \brief IfxGtm_ATOM4_0_TOUT109_P10_7_OUT */

617 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT39_P32_3_OUT; /**< \brief IfxGtm_ATOM4_0_TOUT39_P32_3_OUT */

618 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT48_P22_1_OUT; /**< \brief IfxGtm_ATOM4_0_TOUT48_P22_1_OUT */

619 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT53_P21_2_OUT; /**< \brief IfxGtm_ATOM4_0_TOUT53_P21_2_OUT */

620 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT68_P20_12_OUT; /**< \brief IfxGtm_ATOM4_0_TOUT68_P20_12_OUT */

621 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT76_P15_5_OUT; /**< \brief IfxGtm_ATOM4_0_TOUT76_P15_5_OUT */

622 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT77_P15_6_OUT; /**< \brief IfxGtm_ATOM4_0_TOUT77_P15_6_OUT */

623 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT85_P14_5_OUT; /**< \brief IfxGtm_ATOM4_0_TOUT85_P14_5_OUT */

624 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT87_P14_7_OUT; /**< \brief IfxGtm_ATOM4_0_TOUT87_P14_7_OUT */

625 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT102_P10_0_OUT; /**< \brief IfxGtm_ATOM4_1N_TOUT102_P10_0_OUT */

626 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT44_P23_3_OUT; /**< \brief IfxGtm_ATOM4_1N_TOUT44_P23_3_OUT */

627 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT50_P22_3_OUT; /**< \brief IfxGtm_ATOM4_1N_TOUT50_P22_3_OUT */

628 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT53_P21_2_OUT; /**< \brief IfxGtm_ATOM4_1N_TOUT53_P21_2_OUT */

629 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT57_P21_6_OUT; /**< \brief IfxGtm_ATOM4_1N_TOUT57_P21_6_OUT */

630 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT72_P15_1_OUT; /**< \brief IfxGtm_ATOM4_1N_TOUT72_P15_1_OUT */

631 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT85_P14_5_OUT; /**< \brief IfxGtm_ATOM4_1N_TOUT85_P14_5_OUT */

632 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT86_P14_6_OUT; /**< \brief IfxGtm_ATOM4_1N_TOUT86_P14_6_OUT */

633 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT103_P10_1_OUT; /**< \brief IfxGtm_ATOM4_1_TOUT103_P10_1_OUT */

634 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT41_P23_0_OUT; /**< \brief IfxGtm_ATOM4_1_TOUT41_P23_0_OUT */

635 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT47_P22_0_OUT; /**< \brief IfxGtm_ATOM4_1_TOUT47_P22_0_OUT */

636 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT54_P21_3_OUT; /**< \brief IfxGtm_ATOM4_1_TOUT54_P21_3_OUT */

637 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT69_P20_13_OUT; /**< \brief IfxGtm_ATOM4_1_TOUT69_P20_13_OUT */

638 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT78_P15_7_OUT; /**< \brief IfxGtm_ATOM4_1_TOUT78_P15_7_OUT */

639 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT79_P15_8_OUT; /**< \brief IfxGtm_ATOM4_1_TOUT79_P15_8_OUT */

640 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT84_P14_4_OUT; /**< \brief IfxGtm_ATOM4_1_TOUT84_P14_4_OUT */

641 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT86_P14_6_OUT; /**< \brief IfxGtm_ATOM4_1_TOUT86_P14_6_OUT */

642 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2N_TOUT110_P10_8_OUT; /**< \brief IfxGtm_ATOM4_2N_TOUT110_P10_8_OUT */

643 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2N_TOUT45_P23_4_OUT; /**< \brief IfxGtm_ATOM4_2N_TOUT45_P23_4_OUT */

644 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2N_TOUT52_P21_1_OUT; /**< \brief IfxGtm_ATOM4_2N_TOUT52_P21_1_OUT */

645 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2N_TOUT58_P21_7_OUT; /**< \brief IfxGtm_ATOM4_2N_TOUT58_P21_7_OUT */

646 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2N_TOUT65_P20_9_OUT; /**< \brief IfxGtm_ATOM4_2N_TOUT65_P20_9_OUT */

647 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2N_TOUT73_P15_2_OUT; /**< \brief IfxGtm_ATOM4_2N_TOUT73_P15_2_OUT */

648 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2N_TOUT81_P14_1_OUT; /**< \brief IfxGtm_ATOM4_2N_TOUT81_P14_1_OUT */

649 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT104_P10_2_OUT; /**< \brief IfxGtm_ATOM4_2_TOUT104_P10_2_OUT */

650 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT107_P10_5_OUT; /**< \brief IfxGtm_ATOM4_2_TOUT107_P10_5_OUT */

651 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT42_P23_1_OUT; /**< \brief IfxGtm_ATOM4_2_TOUT42_P23_1_OUT */

652 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT46_P23_5_OUT; /**< \brief IfxGtm_ATOM4_2_TOUT46_P23_5_OUT */

653 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT55_P21_4_OUT; /**< \brief IfxGtm_ATOM4_2_TOUT55_P21_4_OUT */

654 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT70_P20_14_OUT; /**< \brief IfxGtm_ATOM4_2_TOUT70_P20_14_OUT */

655 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT80_P14_0_OUT; /**< \brief IfxGtm_ATOM4_2_TOUT80_P14_0_OUT */

656 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT83_P14_3_OUT; /**< \brief IfxGtm_ATOM4_2_TOUT83_P14_3_OUT */

657 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3N_TOUT106_P10_4_OUT; /**< \brief IfxGtm_ATOM4_3N_TOUT106_P10_4_OUT */

658 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3N_TOUT46_P23_5_OUT; /**< \brief IfxGtm_ATOM4_3N_TOUT46_P23_5_OUT */

659 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3N_TOUT51_P21_0_OUT; /**< \brief IfxGtm_ATOM4_3N_TOUT51_P21_0_OUT */

660 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3N_TOUT59_P20_0_OUT; /**< \brief IfxGtm_ATOM4_3N_TOUT59_P20_0_OUT */

661 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3N_TOUT66_P20_10_OUT; /**< \brief IfxGtm_ATOM4_3N_TOUT66_P20_10_OUT */

662 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3N_TOUT74_P15_3_OUT; /**< \brief IfxGtm_ATOM4_3N_TOUT74_P15_3_OUT */

663 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3N_TOUT80_P14_0_OUT; /**< \brief IfxGtm_ATOM4_3N_TOUT80_P14_0_OUT */

664 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3_TOUT105_P10_3_OUT; /**< \brief IfxGtm_ATOM4_3_TOUT105_P10_3_OUT */

665 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3_TOUT108_P10_6_OUT; /**< \brief IfxGtm_ATOM4_3_TOUT108_P10_6_OUT */

666 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3_TOUT43_P23_2_OUT; /**< \brief IfxGtm_ATOM4_3_TOUT43_P23_2_OUT */

667 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3_TOUT49_P22_2_OUT; /**< \brief IfxGtm_ATOM4_3_TOUT49_P22_2_OUT */

668 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3_TOUT56_P21_5_OUT; /**< \brief IfxGtm_ATOM4_3_TOUT56_P21_5_OUT */

669 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3_TOUT71_P15_0_OUT; /**< \brief IfxGtm_ATOM4_3_TOUT71_P15_0_OUT */

670 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3_TOUT82_P14_2_OUT; /**< \brief IfxGtm_ATOM4_3_TOUT82_P14_2_OUT */

671 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT105_P10_3_OUT; /**< \brief IfxGtm_ATOM4_4N_TOUT105_P10_3_OUT */

672 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT108_P10_6_OUT; /**< \brief IfxGtm_ATOM4_4N_TOUT108_P10_6_OUT */

673 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT132_P22_6_OUT; /**< \brief IfxGtm_ATOM4_4N_TOUT132_P22_6_OUT */

674 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT21_P00_12_OUT; /**< \brief IfxGtm_ATOM4_4N_TOUT21_P00_12_OUT */

675 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT56_P21_5_OUT; /**< \brief IfxGtm_ATOM4_4N_TOUT56_P21_5_OUT */

676 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT71_P15_0_OUT; /**< \brief IfxGtm_ATOM4_4N_TOUT71_P15_0_OUT */

677 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT75_P15_4_OUT; /**< \brief IfxGtm_ATOM4_4N_TOUT75_P15_4_OUT */

678 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT95_P11_2_OUT; /**< \brief IfxGtm_ATOM4_4N_TOUT95_P11_2_OUT */

679 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT102_P10_0_OUT; /**< \brief IfxGtm_ATOM4_4_TOUT102_P10_0_OUT */

680 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT111_P01_3_OUT; /**< \brief IfxGtm_ATOM4_4_TOUT111_P01_3_OUT */

681 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT131_P22_5_OUT; /**< \brief IfxGtm_ATOM4_4_TOUT131_P22_5_OUT */

682 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT264_P13_15_OUT; /**< \brief IfxGtm_ATOM4_4_TOUT264_P13_15_OUT */

683 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT44_P23_3_OUT; /**< \brief IfxGtm_ATOM4_4_TOUT44_P23_3_OUT */

684 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT50_P22_3_OUT; /**< \brief IfxGtm_ATOM4_4_TOUT50_P22_3_OUT */

685 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT57_P21_6_OUT; /**< \brief IfxGtm_ATOM4_4_TOUT57_P21_6_OUT */

686 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT72_P15_1_OUT; /**< \brief IfxGtm_ATOM4_4_TOUT72_P15_1_OUT */

687 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT81_P14_1_OUT; /**< \brief IfxGtm_ATOM4_4_TOUT81_P14_1_OUT */

688 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5N_TOUT109_P10_7_OUT; /**< \brief IfxGtm_ATOM4_5N_TOUT109_P10_7_OUT */

689 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5N_TOUT121_P11_4_OUT; /**< \brief IfxGtm_ATOM4_5N_TOUT121_P11_4_OUT */

690 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5N_TOUT133_P22_7_OUT; /**< \brief IfxGtm_ATOM4_5N_TOUT133_P22_7_OUT */

691 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5N_TOUT18_P00_9_OUT; /**< \brief IfxGtm_ATOM4_5N_TOUT18_P00_9_OUT */

692 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5N_TOUT76_P15_5_OUT; /**< \brief IfxGtm_ATOM4_5N_TOUT76_P15_5_OUT */

693 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5N_TOUT77_P15_6_OUT; /**< \brief IfxGtm_ATOM4_5N_TOUT77_P15_6_OUT */

694 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT110_P10_8_OUT; /**< \brief IfxGtm_ATOM4_5_TOUT110_P10_8_OUT */

695 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT116_P02_9_OUT; /**< \brief IfxGtm_ATOM4_5_TOUT116_P02_9_OUT */

696 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT128_P12_0_OUT; /**< \brief IfxGtm_ATOM4_5_TOUT128_P12_0_OUT */

697 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT130_P22_4_OUT; /**< \brief IfxGtm_ATOM4_5_TOUT130_P22_4_OUT */

698 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT45_P23_4_OUT; /**< \brief IfxGtm_ATOM4_5_TOUT45_P23_4_OUT */

699 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT56_P21_5_OUT; /**< \brief IfxGtm_ATOM4_5_TOUT56_P21_5_OUT */

700 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT58_P21_7_OUT; /**< \brief IfxGtm_ATOM4_5_TOUT58_P21_7_OUT */

701 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT65_P20_9_OUT; /**< \brief IfxGtm_ATOM4_5_TOUT65_P20_9_OUT */

702 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT73_P15_2_OUT; /**< \brief IfxGtm_ATOM4_5_TOUT73_P15_2_OUT */

703 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6N_TOUT103_P10_1_OUT; /**< \brief IfxGtm_ATOM4_6N_TOUT103_P10_1_OUT */

704 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6N_TOUT134_P22_8_OUT; /**< \brief IfxGtm_ATOM4_6N_TOUT134_P22_8_OUT */

705 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6N_TOUT19_P00_10_OUT; /**< \brief IfxGtm_ATOM4_6N_TOUT19_P00_10_OUT */

706 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6N_TOUT78_P15_7_OUT; /**< \brief IfxGtm_ATOM4_6N_TOUT78_P15_7_OUT */

707 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6N_TOUT97_P11_6_OUT; /**< \brief IfxGtm_ATOM4_6N_TOUT97_P11_6_OUT */

708 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT106_P10_4_OUT; /**< \brief IfxGtm_ATOM4_6_TOUT106_P10_4_OUT */

709 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT117_P02_10_OUT; /**< \brief IfxGtm_ATOM4_6_TOUT117_P02_10_OUT */

710 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT129_P12_1_OUT; /**< \brief IfxGtm_ATOM4_6_TOUT129_P12_1_OUT */

711 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT139_P23_7_OUT; /**< \brief IfxGtm_ATOM4_6_TOUT139_P23_7_OUT */

712 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT46_P23_5_OUT; /**< \brief IfxGtm_ATOM4_6_TOUT46_P23_5_OUT */

713 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT59_P20_0_OUT; /**< \brief IfxGtm_ATOM4_6_TOUT59_P20_0_OUT */

714 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT66_P20_10_OUT; /**< \brief IfxGtm_ATOM4_6_TOUT66_P20_10_OUT */

715 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT74_P15_3_OUT; /**< \brief IfxGtm_ATOM4_6_TOUT74_P15_3_OUT */

716 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7N_TOUT104_P10_2_OUT; /**< \brief IfxGtm_ATOM4_7N_TOUT104_P10_2_OUT */

717 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7N_TOUT107_P10_5_OUT; /**< \brief IfxGtm_ATOM4_7N_TOUT107_P10_5_OUT */

718 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7N_TOUT124_P11_8_OUT; /**< \brief IfxGtm_ATOM4_7N_TOUT124_P11_8_OUT */

719 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7N_TOUT135_P22_9_OUT; /**< \brief IfxGtm_ATOM4_7N_TOUT135_P22_9_OUT */

720 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7N_TOUT20_P00_11_OUT; /**< \brief IfxGtm_ATOM4_7N_TOUT20_P00_11_OUT */

721 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7N_TOUT79_P15_8_OUT; /**< \brief IfxGtm_ATOM4_7N_TOUT79_P15_8_OUT */

722 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7_TOUT118_P02_11_OUT; /**< \brief IfxGtm_ATOM4_7_TOUT118_P02_11_OUT */

723 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7_TOUT119_P11_0_OUT; /**< \brief IfxGtm_ATOM4_7_TOUT119_P11_0_OUT */

724 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7_TOUT138_P23_6_OUT; /**< \brief IfxGtm_ATOM4_7_TOUT138_P23_6_OUT */

725 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7_TOUT40_P32_4_OUT; /**< \brief IfxGtm_ATOM4_7_TOUT40_P32_4_OUT */

726 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7_TOUT64_P20_8_OUT; /**< \brief IfxGtm_ATOM4_7_TOUT64_P20_8_OUT */

727 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7_TOUT67_P20_11_OUT; /**< \brief IfxGtm_ATOM4_7_TOUT67_P20_11_OUT */

728 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7_TOUT75_P15_4_OUT; /**< \brief IfxGtm_ATOM4_7_TOUT75_P15_4_OUT */

729 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT126_P11_14_OUT; /**< \brief IfxGtm_ATOM5_0N_TOUT126_P11_14_OUT */

730 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT134_P22_8_OUT; /**< \brief IfxGtm_ATOM5_0N_TOUT134_P22_8_OUT */

731 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT150_P34_5_OUT; /**< \brief IfxGtm_ATOM5_0N_TOUT150_P34_5_OUT */

732 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT161_P01_13_OUT; /**< \brief IfxGtm_ATOM5_0N_TOUT161_P01_13_OUT */

733 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT181_P31_7_OUT; /**< \brief IfxGtm_ATOM5_0N_TOUT181_P31_7_OUT */

734 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT213_P25_7_OUT; /**< \brief IfxGtm_ATOM5_0N_TOUT213_P25_7_OUT */

735 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT261_P14_12_OUT; /**< \brief IfxGtm_ATOM5_0N_TOUT261_P14_12_OUT */

736 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT264_P13_15_OUT; /**< \brief IfxGtm_ATOM5_0N_TOUT264_P13_15_OUT */

737 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT119_P11_0_OUT; /**< \brief IfxGtm_ATOM5_0_TOUT119_P11_0_OUT */

738 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT130_P22_4_OUT; /**< \brief IfxGtm_ATOM5_0_TOUT130_P22_4_OUT */

739 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT146_P34_1_OUT; /**< \brief IfxGtm_ATOM5_0_TOUT146_P34_1_OUT */

740 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT155_P01_0_OUT; /**< \brief IfxGtm_ATOM5_0_TOUT155_P01_0_OUT */

741 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT162_P01_8_OUT; /**< \brief IfxGtm_ATOM5_0_TOUT162_P01_8_OUT */

742 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT174_P31_0_OUT; /**< \brief IfxGtm_ATOM5_0_TOUT174_P31_0_OUT */

743 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT206_P25_0_OUT; /**< \brief IfxGtm_ATOM5_0_TOUT206_P25_0_OUT */

744 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT249_P13_12_OUT; /**< \brief IfxGtm_ATOM5_0_TOUT249_P13_12_OUT */

745 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT258_P14_11_OUT; /**< \brief IfxGtm_ATOM5_0_TOUT258_P14_11_OUT */

746 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT123_P11_7_OUT; /**< \brief IfxGtm_ATOM5_1N_TOUT123_P11_7_OUT */

747 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT128_P12_0_OUT; /**< \brief IfxGtm_ATOM5_1N_TOUT128_P12_0_OUT */

748 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT135_P22_9_OUT; /**< \brief IfxGtm_ATOM5_1N_TOUT135_P22_9_OUT */

749 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT140_P32_5_OUT; /**< \brief IfxGtm_ATOM5_1N_TOUT140_P32_5_OUT */

750 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT158_P01_12_OUT; /**< \brief IfxGtm_ATOM5_1N_TOUT158_P01_12_OUT */

751 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT178_P31_4_OUT; /**< \brief IfxGtm_ATOM5_1N_TOUT178_P31_4_OUT */

752 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT210_P25_4_OUT; /**< \brief IfxGtm_ATOM5_1N_TOUT210_P25_4_OUT */

753 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT245_P15_13_OUT; /**< \brief IfxGtm_ATOM5_1N_TOUT245_P15_13_OUT */

754 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT248_P13_9_OUT; /**< \brief IfxGtm_ATOM5_1N_TOUT248_P13_9_OUT */

755 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT260_P14_13_OUT; /**< \brief IfxGtm_ATOM5_1N_TOUT260_P14_13_OUT */

756 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT268_P10_13_OUT; /**< \brief IfxGtm_ATOM5_1N_TOUT268_P10_13_OUT */

757 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT120_P11_1_OUT; /**< \brief IfxGtm_ATOM5_1_TOUT120_P11_1_OUT */

758 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT131_P22_5_OUT; /**< \brief IfxGtm_ATOM5_1_TOUT131_P22_5_OUT */

759 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT147_P34_2_OUT; /**< \brief IfxGtm_ATOM5_1_TOUT147_P34_2_OUT */

760 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT156_P01_2_OUT; /**< \brief IfxGtm_ATOM5_1_TOUT156_P01_2_OUT */

761 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT164_P01_14_OUT; /**< \brief IfxGtm_ATOM5_1_TOUT164_P01_14_OUT */

762 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT175_P31_1_OUT; /**< \brief IfxGtm_ATOM5_1_TOUT175_P31_1_OUT */

763 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT207_P25_1_OUT; /**< \brief IfxGtm_ATOM5_1_TOUT207_P25_1_OUT */

764 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT242_P15_10_OUT; /**< \brief IfxGtm_ATOM5_1_TOUT242_P15_10_OUT */

765 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT253_P13_4_OUT; /**< \brief IfxGtm_ATOM5_1_TOUT253_P13_4_OUT */

766 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT265_P10_9_OUT; /**< \brief IfxGtm_ATOM5_1_TOUT265_P10_9_OUT */

767 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT124_P11_8_OUT; /**< \brief IfxGtm_ATOM5_2N_TOUT124_P11_8_OUT */

768 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT136_P22_10_OUT; /**< \brief IfxGtm_ATOM5_2N_TOUT136_P22_10_OUT */

769 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT141_P32_6_OUT; /**< \brief IfxGtm_ATOM5_2N_TOUT141_P32_6_OUT */

770 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT159_P01_1_OUT; /**< \brief IfxGtm_ATOM5_2N_TOUT159_P01_1_OUT */

771 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT179_P31_5_OUT; /**< \brief IfxGtm_ATOM5_2N_TOUT179_P31_5_OUT */

772 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT211_P25_5_OUT; /**< \brief IfxGtm_ATOM5_2N_TOUT211_P25_5_OUT */

773 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT246_P15_14_OUT; /**< \brief IfxGtm_ATOM5_2N_TOUT246_P15_14_OUT */

774 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT250_P13_11_OUT; /**< \brief IfxGtm_ATOM5_2N_TOUT250_P13_11_OUT */

775 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT259_P14_14_OUT; /**< \brief IfxGtm_ATOM5_2N_TOUT259_P14_14_OUT */

776 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT269_P10_11_OUT; /**< \brief IfxGtm_ATOM5_2N_TOUT269_P10_11_OUT */

777 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT121_P11_4_OUT; /**< \brief IfxGtm_ATOM5_2_TOUT121_P11_4_OUT */

778 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT132_P22_6_OUT; /**< \brief IfxGtm_ATOM5_2_TOUT132_P22_6_OUT */

779 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT148_P34_3_OUT; /**< \brief IfxGtm_ATOM5_2_TOUT148_P34_3_OUT */

780 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT152_P02_15_OUT; /**< \brief IfxGtm_ATOM5_2_TOUT152_P02_15_OUT */

781 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT157_P01_15_OUT; /**< \brief IfxGtm_ATOM5_2_TOUT157_P01_15_OUT */

782 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT176_P31_2_OUT; /**< \brief IfxGtm_ATOM5_2_TOUT176_P31_2_OUT */

783 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT208_P25_2_OUT; /**< \brief IfxGtm_ATOM5_2_TOUT208_P25_2_OUT */

784 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT243_P15_11_OUT; /**< \brief IfxGtm_ATOM5_2_TOUT243_P15_11_OUT */

785 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT254_P13_5_OUT; /**< \brief IfxGtm_ATOM5_2_TOUT254_P13_5_OUT */

786 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT266_P10_10_OUT; /**< \brief IfxGtm_ATOM5_2_TOUT266_P10_10_OUT */

787 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT123_P11_7_OUT; /**< \brief IfxGtm_ATOM5_3N_TOUT123_P11_7_OUT */

788 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT125_P11_13_OUT; /**< \brief IfxGtm_ATOM5_3N_TOUT125_P11_13_OUT */

789 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT137_P22_11_OUT; /**< \brief IfxGtm_ATOM5_3N_TOUT137_P22_11_OUT */

790 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT142_P32_7_OUT; /**< \brief IfxGtm_ATOM5_3N_TOUT142_P32_7_OUT */

791 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT160_P01_9_OUT; /**< \brief IfxGtm_ATOM5_3N_TOUT160_P01_9_OUT */

792 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT180_P31_6_OUT; /**< \brief IfxGtm_ATOM5_3N_TOUT180_P31_6_OUT */

793 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT212_P25_6_OUT; /**< \brief IfxGtm_ATOM5_3N_TOUT212_P25_6_OUT */

794 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT212_P26_0_OUT; /**< \brief IfxGtm_ATOM5_3N_TOUT212_P26_0_OUT */

795 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT247_P15_15_OUT; /**< \brief IfxGtm_ATOM5_3N_TOUT247_P15_15_OUT */

796 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT249_P13_12_OUT; /**< \brief IfxGtm_ATOM5_3N_TOUT249_P13_12_OUT */

797 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT263_P14_15_OUT; /**< \brief IfxGtm_ATOM5_3N_TOUT263_P14_15_OUT */

798 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT270_P10_15_OUT; /**< \brief IfxGtm_ATOM5_3N_TOUT270_P10_15_OUT */

799 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT122_P11_5_OUT; /**< \brief IfxGtm_ATOM5_3_TOUT122_P11_5_OUT */

800 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT133_P22_7_OUT; /**< \brief IfxGtm_ATOM5_3_TOUT133_P22_7_OUT */

801 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT149_P34_4_OUT; /**< \brief IfxGtm_ATOM5_3_TOUT149_P34_4_OUT */

802 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT163_P01_10_OUT; /**< \brief IfxGtm_ATOM5_3_TOUT163_P01_10_OUT */

803 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT165_P01_11_OUT; /**< \brief IfxGtm_ATOM5_3_TOUT165_P01_11_OUT */

804 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT177_P31_3_OUT; /**< \brief IfxGtm_ATOM5_3_TOUT177_P31_3_OUT */

805 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT209_P25_3_OUT; /**< \brief IfxGtm_ATOM5_3_TOUT209_P25_3_OUT */

806 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT244_P15_12_OUT; /**< \brief IfxGtm_ATOM5_3_TOUT244_P15_12_OUT */

807 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT255_P13_6_OUT; /**< \brief IfxGtm_ATOM5_3_TOUT255_P13_6_OUT */

808 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT267_P10_14_OUT; /**< \brief IfxGtm_ATOM5_3_TOUT267_P10_14_OUT */

809 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4N_TOUT122_P11_5_OUT; /**< \brief IfxGtm_ATOM5_4N_TOUT122_P11_5_OUT */

810 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4N_TOUT129_P12_1_OUT; /**< \brief IfxGtm_ATOM5_4N_TOUT129_P12_1_OUT */

811 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4N_TOUT163_P01_10_OUT; /**< \brief IfxGtm_ATOM5_4N_TOUT163_P01_10_OUT */

812 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4N_TOUT165_P01_11_OUT; /**< \brief IfxGtm_ATOM5_4N_TOUT165_P01_11_OUT */

813 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4N_TOUT177_P31_3_OUT; /**< \brief IfxGtm_ATOM5_4N_TOUT177_P31_3_OUT */

814 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4N_TOUT209_P25_3_OUT; /**< \brief IfxGtm_ATOM5_4N_TOUT209_P25_3_OUT */

815 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4N_TOUT267_P10_14_OUT; /**< \brief IfxGtm_ATOM5_4N_TOUT267_P10_14_OUT */

816 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT123_P11_7_OUT; /**< \brief IfxGtm_ATOM5_4_TOUT123_P11_7_OUT */

817 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT134_P22_8_OUT; /**< \brief IfxGtm_ATOM5_4_TOUT134_P22_8_OUT */

818 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT150_P34_5_OUT; /**< \brief IfxGtm_ATOM5_4_TOUT150_P34_5_OUT */

819 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT158_P01_12_OUT; /**< \brief IfxGtm_ATOM5_4_TOUT158_P01_12_OUT */

820 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT178_P31_4_OUT; /**< \brief IfxGtm_ATOM5_4_TOUT178_P31_4_OUT */

821 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT210_P25_4_OUT; /**< \brief IfxGtm_ATOM5_4_TOUT210_P25_4_OUT */

822 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT245_P15_13_OUT; /**< \brief IfxGtm_ATOM5_4_TOUT245_P15_13_OUT */

823 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT248_P13_9_OUT; /**< \brief IfxGtm_ATOM5_4_TOUT248_P13_9_OUT */

824 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT268_P10_13_OUT; /**< \brief IfxGtm_ATOM5_4_TOUT268_P10_13_OUT */

825 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5N_TOUT119_P11_0_OUT; /**< \brief IfxGtm_ATOM5_5N_TOUT119_P11_0_OUT */

826 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5N_TOUT155_P01_0_OUT; /**< \brief IfxGtm_ATOM5_5N_TOUT155_P01_0_OUT */

827 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5N_TOUT162_P01_8_OUT; /**< \brief IfxGtm_ATOM5_5N_TOUT162_P01_8_OUT */

828 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5N_TOUT174_P31_0_OUT; /**< \brief IfxGtm_ATOM5_5N_TOUT174_P31_0_OUT */

829 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5N_TOUT206_P25_0_OUT; /**< \brief IfxGtm_ATOM5_5N_TOUT206_P25_0_OUT */

830 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT124_P11_8_OUT; /**< \brief IfxGtm_ATOM5_5_TOUT124_P11_8_OUT */

831 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT135_P22_9_OUT; /**< \brief IfxGtm_ATOM5_5_TOUT135_P22_9_OUT */

832 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT140_P32_5_OUT; /**< \brief IfxGtm_ATOM5_5_TOUT140_P32_5_OUT */

833 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT159_P01_1_OUT; /**< \brief IfxGtm_ATOM5_5_TOUT159_P01_1_OUT */

834 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT179_P31_5_OUT; /**< \brief IfxGtm_ATOM5_5_TOUT179_P31_5_OUT */

835 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT211_P25_5_OUT; /**< \brief IfxGtm_ATOM5_5_TOUT211_P25_5_OUT */

836 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT246_P15_14_OUT; /**< \brief IfxGtm_ATOM5_5_TOUT246_P15_14_OUT */

837 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT250_P13_11_OUT; /**< \brief IfxGtm_ATOM5_5_TOUT250_P13_11_OUT */

838 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT269_P10_11_OUT; /**< \brief IfxGtm_ATOM5_5_TOUT269_P10_11_OUT */

839 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6N_TOUT120_P11_1_OUT; /**< \brief IfxGtm_ATOM5_6N_TOUT120_P11_1_OUT */

840 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6N_TOUT156_P01_2_OUT; /**< \brief IfxGtm_ATOM5_6N_TOUT156_P01_2_OUT */

841 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6N_TOUT158_P01_12_OUT; /**< \brief IfxGtm_ATOM5_6N_TOUT158_P01_12_OUT */

842 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6N_TOUT175_P31_1_OUT; /**< \brief IfxGtm_ATOM5_6N_TOUT175_P31_1_OUT */

843 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6N_TOUT207_P25_1_OUT; /**< \brief IfxGtm_ATOM5_6N_TOUT207_P25_1_OUT */

844 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6N_TOUT96_P11_3_OUT; /**< \brief IfxGtm_ATOM5_6N_TOUT96_P11_3_OUT */

845 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT125_P11_13_OUT; /**< \brief IfxGtm_ATOM5_6_TOUT125_P11_13_OUT */

846 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT136_P22_10_OUT; /**< \brief IfxGtm_ATOM5_6_TOUT136_P22_10_OUT */

847 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT141_P32_6_OUT; /**< \brief IfxGtm_ATOM5_6_TOUT141_P32_6_OUT */

848 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT160_P01_9_OUT; /**< \brief IfxGtm_ATOM5_6_TOUT160_P01_9_OUT */

849 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT180_P31_6_OUT; /**< \brief IfxGtm_ATOM5_6_TOUT180_P31_6_OUT */

850 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT212_P25_6_OUT; /**< \brief IfxGtm_ATOM5_6_TOUT212_P25_6_OUT */

851 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT212_P26_0_OUT; /**< \brief IfxGtm_ATOM5_6_TOUT212_P26_0_OUT */

852 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT247_P15_15_OUT; /**< \brief IfxGtm_ATOM5_6_TOUT247_P15_15_OUT */

853 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT249_P13_12_OUT; /**< \brief IfxGtm_ATOM5_6_TOUT249_P13_12_OUT */

854 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT270_P10_15_OUT; /**< \brief IfxGtm_ATOM5_6_TOUT270_P10_15_OUT */

855 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7N_TOUT121_P11_4_OUT; /**< \brief IfxGtm_ATOM5_7N_TOUT121_P11_4_OUT */

856 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7N_TOUT152_P02_15_OUT; /**< \brief IfxGtm_ATOM5_7N_TOUT152_P02_15_OUT */

857 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7N_TOUT157_P01_15_OUT; /**< \brief IfxGtm_ATOM5_7N_TOUT157_P01_15_OUT */

858 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7N_TOUT176_P31_2_OUT; /**< \brief IfxGtm_ATOM5_7N_TOUT176_P31_2_OUT */

859 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7N_TOUT208_P25_2_OUT; /**< \brief IfxGtm_ATOM5_7N_TOUT208_P25_2_OUT */

860 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7_TOUT126_P11_14_OUT; /**< \brief IfxGtm_ATOM5_7_TOUT126_P11_14_OUT */

861 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7_TOUT137_P22_11_OUT; /**< \brief IfxGtm_ATOM5_7_TOUT137_P22_11_OUT */

862 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7_TOUT142_P32_7_OUT; /**< \brief IfxGtm_ATOM5_7_TOUT142_P32_7_OUT */

863 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7_TOUT161_P01_13_OUT; /**< \brief IfxGtm_ATOM5_7_TOUT161_P01_13_OUT */

864 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7_TOUT181_P31_7_OUT; /**< \brief IfxGtm_ATOM5_7_TOUT181_P31_7_OUT */

865 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7_TOUT213_P25_7_OUT; /**< \brief IfxGtm_ATOM5_7_TOUT213_P25_7_OUT */

866 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7_TOUT248_P13_9_OUT; /**< \brief IfxGtm_ATOM5_7_TOUT248_P13_9_OUT */

867 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT127_P11_15_OUT; /**< \brief IfxGtm_ATOM6_0_TOUT127_P11_15_OUT */

868 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT141_P32_6_OUT; /**< \brief IfxGtm_ATOM6_0_TOUT141_P32_6_OUT */

869 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT155_P01_0_OUT; /**< \brief IfxGtm_ATOM6_0_TOUT155_P01_0_OUT */

870 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT162_P01_8_OUT; /**< \brief IfxGtm_ATOM6_0_TOUT162_P01_8_OUT */

871 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT182_P31_8_OUT; /**< \brief IfxGtm_ATOM6_0_TOUT182_P31_8_OUT */

872 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT214_P25_8_OUT; /**< \brief IfxGtm_ATOM6_0_TOUT214_P25_8_OUT */

873 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT242_P15_10_OUT; /**< \brief IfxGtm_ATOM6_0_TOUT242_P15_10_OUT */

874 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT250_P13_11_OUT; /**< \brief IfxGtm_ATOM6_0_TOUT250_P13_11_OUT */

875 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT128_P12_0_OUT; /**< \brief IfxGtm_ATOM6_1_TOUT128_P12_0_OUT */

876 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT142_P32_7_OUT; /**< \brief IfxGtm_ATOM6_1_TOUT142_P32_7_OUT */

877 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT156_P01_2_OUT; /**< \brief IfxGtm_ATOM6_1_TOUT156_P01_2_OUT */

878 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT164_P01_14_OUT; /**< \brief IfxGtm_ATOM6_1_TOUT164_P01_14_OUT */

879 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT183_P31_9_OUT; /**< \brief IfxGtm_ATOM6_1_TOUT183_P31_9_OUT */

880 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT215_P25_9_OUT; /**< \brief IfxGtm_ATOM6_1_TOUT215_P25_9_OUT */

881 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT251_P13_10_OUT; /**< \brief IfxGtm_ATOM6_1_TOUT251_P13_10_OUT */

882 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT258_P14_11_OUT; /**< \brief IfxGtm_ATOM6_1_TOUT258_P14_11_OUT */

883 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT129_P12_1_OUT; /**< \brief IfxGtm_ATOM6_2_TOUT129_P12_1_OUT */

884 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT143_P33_14_OUT; /**< \brief IfxGtm_ATOM6_2_TOUT143_P33_14_OUT */

885 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT152_P02_15_OUT; /**< \brief IfxGtm_ATOM6_2_TOUT152_P02_15_OUT */

886 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT157_P01_15_OUT; /**< \brief IfxGtm_ATOM6_2_TOUT157_P01_15_OUT */

887 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT184_P31_10_OUT; /**< \brief IfxGtm_ATOM6_2_TOUT184_P31_10_OUT */

888 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT216_P25_10_OUT; /**< \brief IfxGtm_ATOM6_2_TOUT216_P25_10_OUT */

889 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT252_P13_14_OUT; /**< \brief IfxGtm_ATOM6_2_TOUT252_P13_14_OUT */

890 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT259_P14_14_OUT; /**< \brief IfxGtm_ATOM6_2_TOUT259_P14_14_OUT */

891 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT111_P01_3_OUT; /**< \brief IfxGtm_ATOM6_3_TOUT111_P01_3_OUT */

892 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT144_P33_15_OUT; /**< \brief IfxGtm_ATOM6_3_TOUT144_P33_15_OUT */

893 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT163_P01_10_OUT; /**< \brief IfxGtm_ATOM6_3_TOUT163_P01_10_OUT */

894 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT165_P01_11_OUT; /**< \brief IfxGtm_ATOM6_3_TOUT165_P01_11_OUT */

895 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT185_P31_11_OUT; /**< \brief IfxGtm_ATOM6_3_TOUT185_P31_11_OUT */

896 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT217_P25_11_OUT; /**< \brief IfxGtm_ATOM6_3_TOUT217_P25_11_OUT */

897 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT253_P13_4_OUT; /**< \brief IfxGtm_ATOM6_3_TOUT253_P13_4_OUT */

898 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT260_P14_13_OUT; /**< \brief IfxGtm_ATOM6_3_TOUT260_P14_13_OUT */

899 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT140_P32_5_OUT; /**< \brief IfxGtm_ATOM6_4_TOUT140_P32_5_OUT */

900 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT143_P33_14_OUT; /**< \brief IfxGtm_ATOM6_4_TOUT143_P33_14_OUT */

901 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT158_P01_12_OUT; /**< \brief IfxGtm_ATOM6_4_TOUT158_P01_12_OUT */

902 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT186_P31_12_OUT; /**< \brief IfxGtm_ATOM6_4_TOUT186_P31_12_OUT */

903 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT218_P25_12_OUT; /**< \brief IfxGtm_ATOM6_4_TOUT218_P25_12_OUT */

904 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT254_P13_5_OUT; /**< \brief IfxGtm_ATOM6_4_TOUT254_P13_5_OUT */

905 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT261_P14_12_OUT; /**< \brief IfxGtm_ATOM6_4_TOUT261_P14_12_OUT */

906 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT31_P33_9_OUT; /**< \brief IfxGtm_ATOM6_4_TOUT31_P33_9_OUT */

907 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_5_TOUT146_P34_1_OUT; /**< \brief IfxGtm_ATOM6_5_TOUT146_P34_1_OUT */

908 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_5_TOUT159_P01_1_OUT; /**< \brief IfxGtm_ATOM6_5_TOUT159_P01_1_OUT */

909 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_5_TOUT187_P31_13_OUT; /**< \brief IfxGtm_ATOM6_5_TOUT187_P31_13_OUT */

910 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_5_TOUT219_P25_13_OUT; /**< \brief IfxGtm_ATOM6_5_TOUT219_P25_13_OUT */

911 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_5_TOUT243_P15_11_OUT; /**< \brief IfxGtm_ATOM6_5_TOUT243_P15_11_OUT */

912 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_5_TOUT255_P13_6_OUT; /**< \brief IfxGtm_ATOM6_5_TOUT255_P13_6_OUT */

913 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_5_TOUT262_P13_13_OUT; /**< \brief IfxGtm_ATOM6_5_TOUT262_P13_13_OUT */

914 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_6_TOUT147_P34_2_OUT; /**< \brief IfxGtm_ATOM6_6_TOUT147_P34_2_OUT */

915 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_6_TOUT160_P01_9_OUT; /**< \brief IfxGtm_ATOM6_6_TOUT160_P01_9_OUT */

916 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_6_TOUT188_P31_14_OUT; /**< \brief IfxGtm_ATOM6_6_TOUT188_P31_14_OUT */

917 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_6_TOUT220_P25_14_OUT; /**< \brief IfxGtm_ATOM6_6_TOUT220_P25_14_OUT */

918 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_6_TOUT256_P13_7_OUT; /**< \brief IfxGtm_ATOM6_6_TOUT256_P13_7_OUT */

919 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_6_TOUT263_P14_15_OUT; /**< \brief IfxGtm_ATOM6_6_TOUT263_P14_15_OUT */

920 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_7_TOUT148_P34_3_OUT; /**< \brief IfxGtm_ATOM6_7_TOUT148_P34_3_OUT */

921 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_7_TOUT161_P01_13_OUT; /**< \brief IfxGtm_ATOM6_7_TOUT161_P01_13_OUT */

922 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_7_TOUT189_P31_15_OUT; /**< \brief IfxGtm_ATOM6_7_TOUT189_P31_15_OUT */

923 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_7_TOUT221_P25_15_OUT; /**< \brief IfxGtm_ATOM6_7_TOUT221_P25_15_OUT */

924 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_7_TOUT244_P15_12_OUT; /**< \brief IfxGtm_ATOM6_7_TOUT244_P15_12_OUT */

925 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_7_TOUT264_P13_15_OUT; /**< \brief IfxGtm_ATOM6_7_TOUT264_P13_15_OUT */

926 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_0_TOUT149_P34_4_OUT; /**< \brief IfxGtm_ATOM7_0_TOUT149_P34_4_OUT */

927 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_0_TOUT162_P01_8_OUT; /**< \brief IfxGtm_ATOM7_0_TOUT162_P01_8_OUT */

928 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_0_TOUT190_P30_0_OUT; /**< \brief IfxGtm_ATOM7_0_TOUT190_P30_0_OUT */

929 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_0_TOUT222_P24_0_OUT; /**< \brief IfxGtm_ATOM7_0_TOUT222_P24_0_OUT */

930 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_0_TOUT249_P13_12_OUT; /**< \brief IfxGtm_ATOM7_0_TOUT249_P13_12_OUT */

931 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_0_TOUT258_P14_11_OUT; /**< \brief IfxGtm_ATOM7_0_TOUT258_P14_11_OUT */

932 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT150_P34_5_OUT; /**< \brief IfxGtm_ATOM7_1_TOUT150_P34_5_OUT */

933 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT163_P01_10_OUT; /**< \brief IfxGtm_ATOM7_1_TOUT163_P01_10_OUT */

934 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT191_P30_1_OUT; /**< \brief IfxGtm_ATOM7_1_TOUT191_P30_1_OUT */

935 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT223_P24_1_OUT; /**< \brief IfxGtm_ATOM7_1_TOUT223_P24_1_OUT */

936 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT242_P15_10_OUT; /**< \brief IfxGtm_ATOM7_1_TOUT242_P15_10_OUT */

937 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT245_P15_13_OUT; /**< \brief IfxGtm_ATOM7_1_TOUT245_P15_13_OUT */

938 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT253_P13_4_OUT; /**< \brief IfxGtm_ATOM7_1_TOUT253_P13_4_OUT */

939 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT265_P10_9_OUT; /**< \brief IfxGtm_ATOM7_1_TOUT265_P10_9_OUT */

940 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_2_TOUT164_P01_14_OUT; /**< \brief IfxGtm_ATOM7_2_TOUT164_P01_14_OUT */

941 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_2_TOUT192_P30_2_OUT; /**< \brief IfxGtm_ATOM7_2_TOUT192_P30_2_OUT */

942 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_2_TOUT224_P24_2_OUT; /**< \brief IfxGtm_ATOM7_2_TOUT224_P24_2_OUT */

943 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_2_TOUT243_P15_11_OUT; /**< \brief IfxGtm_ATOM7_2_TOUT243_P15_11_OUT */

944 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_2_TOUT246_P15_14_OUT; /**< \brief IfxGtm_ATOM7_2_TOUT246_P15_14_OUT */

945 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_2_TOUT254_P13_5_OUT; /**< \brief IfxGtm_ATOM7_2_TOUT254_P13_5_OUT */

946 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_2_TOUT266_P10_10_OUT; /**< \brief IfxGtm_ATOM7_2_TOUT266_P10_10_OUT */

947 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_3_TOUT166_P00_14_OUT; /**< \brief IfxGtm_ATOM7_3_TOUT166_P00_14_OUT */

948 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_3_TOUT193_P30_3_OUT; /**< \brief IfxGtm_ATOM7_3_TOUT193_P30_3_OUT */

949 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_3_TOUT225_P24_3_OUT; /**< \brief IfxGtm_ATOM7_3_TOUT225_P24_3_OUT */

950 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_3_TOUT244_P15_12_OUT; /**< \brief IfxGtm_ATOM7_3_TOUT244_P15_12_OUT */

951 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_3_TOUT247_P15_15_OUT; /**< \brief IfxGtm_ATOM7_3_TOUT247_P15_15_OUT */

952 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_3_TOUT255_P13_6_OUT; /**< \brief IfxGtm_ATOM7_3_TOUT255_P13_6_OUT */

953 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_3_TOUT267_P10_14_OUT; /**< \brief IfxGtm_ATOM7_3_TOUT267_P10_14_OUT */

954 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_4_TOUT167_P00_13_OUT; /**< \brief IfxGtm_ATOM7_4_TOUT167_P00_13_OUT */

955 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_4_TOUT194_P30_4_OUT; /**< \brief IfxGtm_ATOM7_4_TOUT194_P30_4_OUT */

956 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_4_TOUT226_P24_4_OUT; /**< \brief IfxGtm_ATOM7_4_TOUT226_P24_4_OUT */

957 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_4_TOUT245_P15_13_OUT; /**< \brief IfxGtm_ATOM7_4_TOUT245_P15_13_OUT */

958 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_4_TOUT248_P13_9_OUT; /**< \brief IfxGtm_ATOM7_4_TOUT248_P13_9_OUT */

959 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_4_TOUT268_P10_13_OUT; /**< \brief IfxGtm_ATOM7_4_TOUT268_P10_13_OUT */

960 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_5_TOUT168_P00_15_OUT; /**< \brief IfxGtm_ATOM7_5_TOUT168_P00_15_OUT */

961 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_5_TOUT195_P30_5_OUT; /**< \brief IfxGtm_ATOM7_5_TOUT195_P30_5_OUT */

962 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_5_TOUT227_P24_5_OUT; /**< \brief IfxGtm_ATOM7_5_TOUT227_P24_5_OUT */

963 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_5_TOUT246_P15_14_OUT; /**< \brief IfxGtm_ATOM7_5_TOUT246_P15_14_OUT */

964 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_5_TOUT251_P13_10_OUT; /**< \brief IfxGtm_ATOM7_5_TOUT251_P13_10_OUT */

965 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_5_TOUT269_P10_11_OUT; /**< \brief IfxGtm_ATOM7_5_TOUT269_P10_11_OUT */

966 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_6_TOUT151_P02_12_OUT; /**< \brief IfxGtm_ATOM7_6_TOUT151_P02_12_OUT */

967 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_6_TOUT153_P02_13_OUT; /**< \brief IfxGtm_ATOM7_6_TOUT153_P02_13_OUT */

968 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_6_TOUT196_P30_6_OUT; /**< \brief IfxGtm_ATOM7_6_TOUT196_P30_6_OUT */

969 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_6_TOUT228_P24_6_OUT; /**< \brief IfxGtm_ATOM7_6_TOUT228_P24_6_OUT */

970 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_6_TOUT247_P15_15_OUT; /**< \brief IfxGtm_ATOM7_6_TOUT247_P15_15_OUT */

971 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_6_TOUT249_P13_12_OUT; /**< \brief IfxGtm_ATOM7_6_TOUT249_P13_12_OUT */

972 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_6_TOUT270_P10_15_OUT; /**< \brief IfxGtm_ATOM7_6_TOUT270_P10_15_OUT */

973 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_7_TOUT152_P02_15_OUT; /**< \brief IfxGtm_ATOM7_7_TOUT152_P02_15_OUT */

974 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_7_TOUT154_P02_14_OUT; /**< \brief IfxGtm_ATOM7_7_TOUT154_P02_14_OUT */

975 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_7_TOUT161_P01_13_OUT; /**< \brief IfxGtm_ATOM7_7_TOUT161_P01_13_OUT */

976 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_7_TOUT197_P30_7_OUT; /**< \brief IfxGtm_ATOM7_7_TOUT197_P30_7_OUT */

977 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_7_TOUT229_P24_7_OUT; /**< \brief IfxGtm_ATOM7_7_TOUT229_P24_7_OUT */

978 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_7_TOUT248_P13_9_OUT; /**< \brief IfxGtm_ATOM7_7_TOUT248_P13_9_OUT */

979 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_7_TOUT261_P14_12_OUT; /**< \brief IfxGtm_ATOM7_7_TOUT261_P14_12_OUT */

980 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_0_TOUT162_P01_8_OUT; /**< \brief IfxGtm_ATOM8_0_TOUT162_P01_8_OUT */

981 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_0_TOUT198_P30_8_OUT; /**< \brief IfxGtm_ATOM8_0_TOUT198_P30_8_OUT */

982 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_0_TOUT230_P24_8_OUT; /**< \brief IfxGtm_ATOM8_0_TOUT230_P24_8_OUT */

983 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_0_TOUT242_P15_10_OUT; /**< \brief IfxGtm_ATOM8_0_TOUT242_P15_10_OUT */

984 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_0_TOUT250_P13_11_OUT; /**< \brief IfxGtm_ATOM8_0_TOUT250_P13_11_OUT */

985 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_1_TOUT163_P01_10_OUT; /**< \brief IfxGtm_ATOM8_1_TOUT163_P01_10_OUT */

986 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_1_TOUT199_P30_9_OUT; /**< \brief IfxGtm_ATOM8_1_TOUT199_P30_9_OUT */

987 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_1_TOUT231_P24_9_OUT; /**< \brief IfxGtm_ATOM8_1_TOUT231_P24_9_OUT */

988 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_1_TOUT251_P13_10_OUT; /**< \brief IfxGtm_ATOM8_1_TOUT251_P13_10_OUT */

989 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_1_TOUT258_P14_11_OUT; /**< \brief IfxGtm_ATOM8_1_TOUT258_P14_11_OUT */

990 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_2_TOUT164_P01_14_OUT; /**< \brief IfxGtm_ATOM8_2_TOUT164_P01_14_OUT */

991 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_2_TOUT200_P30_10_OUT; /**< \brief IfxGtm_ATOM8_2_TOUT200_P30_10_OUT */

992 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_2_TOUT232_P24_10_OUT; /**< \brief IfxGtm_ATOM8_2_TOUT232_P24_10_OUT */

993 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_2_TOUT252_P13_14_OUT; /**< \brief IfxGtm_ATOM8_2_TOUT252_P13_14_OUT */

994 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_2_TOUT259_P14_14_OUT; /**< \brief IfxGtm_ATOM8_2_TOUT259_P14_14_OUT */

995 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_3_TOUT166_P00_14_OUT; /**< \brief IfxGtm_ATOM8_3_TOUT166_P00_14_OUT */

996 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_3_TOUT201_P30_11_OUT; /**< \brief IfxGtm_ATOM8_3_TOUT201_P30_11_OUT */

997 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_3_TOUT233_P24_11_OUT; /**< \brief IfxGtm_ATOM8_3_TOUT233_P24_11_OUT */

998 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_3_TOUT253_P13_4_OUT; /**< \brief IfxGtm_ATOM8_3_TOUT253_P13_4_OUT */

999 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_3_TOUT260_P14_13_OUT; /**< \brief IfxGtm_ATOM8_3_TOUT260_P14_13_OUT */

1000 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_4_TOUT167_P00_13_OUT; /**< \brief IfxGtm_ATOM8_4_TOUT167_P00_13_OUT */

1001 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_4_TOUT202_P30_12_OUT; /**< \brief IfxGtm_ATOM8_4_TOUT202_P30_12_OUT */

1002 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_4_TOUT234_P24_12_OUT; /**< \brief IfxGtm_ATOM8_4_TOUT234_P24_12_OUT */

1003 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_4_TOUT254_P13_5_OUT; /**< \brief IfxGtm_ATOM8_4_TOUT254_P13_5_OUT */

1004 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_4_TOUT261_P14_12_OUT; /**< \brief IfxGtm_ATOM8_4_TOUT261_P14_12_OUT */

1005 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_5_TOUT168_P00_15_OUT; /**< \brief IfxGtm_ATOM8_5_TOUT168_P00_15_OUT */

1006 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_5_TOUT203_P30_13_OUT; /**< \brief IfxGtm_ATOM8_5_TOUT203_P30_13_OUT */

1007 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_5_TOUT235_P24_13_OUT; /**< \brief IfxGtm_ATOM8_5_TOUT235_P24_13_OUT */

1008 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_5_TOUT243_P15_11_OUT; /**< \brief IfxGtm_ATOM8_5_TOUT243_P15_11_OUT */

1009 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_5_TOUT255_P13_6_OUT; /**< \brief IfxGtm_ATOM8_5_TOUT255_P13_6_OUT */

1010 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_5_TOUT262_P13_13_OUT; /**< \brief IfxGtm_ATOM8_5_TOUT262_P13_13_OUT */

1011 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_6_TOUT151_P02_12_OUT; /**< \brief IfxGtm_ATOM8_6_TOUT151_P02_12_OUT */

1012 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_6_TOUT153_P02_13_OUT; /**< \brief IfxGtm_ATOM8_6_TOUT153_P02_13_OUT */

1013 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_6_TOUT204_P30_14_OUT; /**< \brief IfxGtm_ATOM8_6_TOUT204_P30_14_OUT */

1014 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_6_TOUT236_P24_14_OUT; /**< \brief IfxGtm_ATOM8_6_TOUT236_P24_14_OUT */

1015 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_6_TOUT256_P13_7_OUT; /**< \brief IfxGtm_ATOM8_6_TOUT256_P13_7_OUT */

1016 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_6_TOUT263_P14_15_OUT; /**< \brief IfxGtm_ATOM8_6_TOUT263_P14_15_OUT */

1017 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_7_TOUT152_P02_15_OUT; /**< \brief IfxGtm_ATOM8_7_TOUT152_P02_15_OUT */

1018 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_7_TOUT154_P02_14_OUT; /**< \brief IfxGtm_ATOM8_7_TOUT154_P02_14_OUT */

1019 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_7_TOUT161_P01_13_OUT; /**< \brief IfxGtm_ATOM8_7_TOUT161_P01_13_OUT */

1020 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_7_TOUT205_P30_15_OUT; /**< \brief IfxGtm_ATOM8_7_TOUT205_P30_15_OUT */

1021 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_7_TOUT237_P24_15_OUT; /**< \brief IfxGtm_ATOM8_7_TOUT237_P24_15_OUT */

1022 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_7_TOUT244_P15_12_OUT; /**< \brief IfxGtm_ATOM8_7_TOUT244_P15_12_OUT */

1023 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_7_TOUT264_P13_15_OUT; /**< \brief IfxGtm_ATOM8_7_TOUT264_P13_15_OUT */

1024 IFX_EXTERN IfxGtm_Clk_Out IfxGtm_CLK0_P23_1_OUT; /**< \brief CGM generated clock */

1025 IFX_EXTERN IfxGtm_Clk_Out IfxGtm_CLK1_P32_4_OUT; /**< \brief CGM generated clock */

1026 IFX_EXTERN IfxGtm_Clk_Out IfxGtm_CLK2_P11_12_OUT; /**< \brief CGM generated clock */

1027 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P00_9_IN; /**< \brief IfxGtm_TIM0_0_P00_9_IN */

1028 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P02_0_IN; /**< \brief IfxGtm_TIM0_0_P02_0_IN */

1029 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P10_7_IN; /**< \brief IfxGtm_TIM0_0_P10_7_IN */

1030 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P13_12_IN; /**< \brief IfxGtm_TIM0_0_P13_12_IN */

1031 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P14_5_IN; /**< \brief IfxGtm_TIM0_0_P14_5_IN */

1032 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P14_7_IN; /**< \brief IfxGtm_TIM0_0_P14_7_IN */

1033 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P15_6_IN; /**< \brief IfxGtm_TIM0_0_P15_6_IN */

1034 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P21_2_IN; /**< \brief IfxGtm_TIM0_0_P21_2_IN */

1035 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P22_1_IN; /**< \brief IfxGtm_TIM0_0_P22_1_IN */

1036 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P33_10_IN; /**< \brief IfxGtm_TIM0_0_P33_10_IN */

1037 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P33_4_IN; /**< \brief IfxGtm_TIM0_0_P33_4_IN */

1038 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P00_10_IN; /**< \brief IfxGtm_TIM0_1_P00_10_IN */

1039 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P02_1_IN; /**< \brief IfxGtm_TIM0_1_P02_1_IN */

1040 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P10_1_IN; /**< \brief IfxGtm_TIM0_1_P10_1_IN */

1041 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P10_9_IN; /**< \brief IfxGtm_TIM0_1_P10_9_IN */

1042 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P14_6_IN; /**< \brief IfxGtm_TIM0_1_P14_6_IN */

1043 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P15_7_IN; /**< \brief IfxGtm_TIM0_1_P15_7_IN */

1044 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P21_3_IN; /**< \brief IfxGtm_TIM0_1_P21_3_IN */

1045 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P22_0_IN; /**< \brief IfxGtm_TIM0_1_P22_0_IN */

1046 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P33_5_IN; /**< \brief IfxGtm_TIM0_1_P33_5_IN */

1047 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P33_9_IN; /**< \brief IfxGtm_TIM0_1_P33_9_IN */

1048 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P00_11_IN; /**< \brief IfxGtm_TIM0_2_P00_11_IN */

1049 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P02_2_IN; /**< \brief IfxGtm_TIM0_2_P02_2_IN */

1050 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P02_9_IN; /**< \brief IfxGtm_TIM0_2_P02_9_IN */

1051 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P10_10_IN; /**< \brief IfxGtm_TIM0_2_P10_10_IN */

1052 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P10_2_IN; /**< \brief IfxGtm_TIM0_2_P10_2_IN */

1053 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P10_5_IN; /**< \brief IfxGtm_TIM0_2_P10_5_IN */

1054 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P15_8_IN; /**< \brief IfxGtm_TIM0_2_P15_8_IN */

1055 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P21_4_IN; /**< \brief IfxGtm_TIM0_2_P21_4_IN */

1056 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P23_5_IN; /**< \brief IfxGtm_TIM0_2_P23_5_IN */

1057 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P33_11_IN; /**< \brief IfxGtm_TIM0_2_P33_11_IN */

1058 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P33_6_IN; /**< \brief IfxGtm_TIM0_2_P33_6_IN */

1059 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P00_12_IN; /**< \brief IfxGtm_TIM0_3_P00_12_IN */

1060 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P02_10_IN; /**< \brief IfxGtm_TIM0_3_P02_10_IN */

1061 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P02_3_IN; /**< \brief IfxGtm_TIM0_3_P02_3_IN */

1062 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P10_14_IN; /**< \brief IfxGtm_TIM0_3_P10_14_IN */

1063 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P10_3_IN; /**< \brief IfxGtm_TIM0_3_P10_3_IN */

1064 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P10_6_IN; /**< \brief IfxGtm_TIM0_3_P10_6_IN */

1065 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P14_0_IN; /**< \brief IfxGtm_TIM0_3_P14_0_IN */

1066 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P21_5_IN; /**< \brief IfxGtm_TIM0_3_P21_5_IN */

1067 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P22_2_IN; /**< \brief IfxGtm_TIM0_3_P22_2_IN */

1068 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P32_2_IN; /**< \brief IfxGtm_TIM0_3_P32_2_IN */

1069 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P33_7_IN; /**< \brief IfxGtm_TIM0_3_P33_7_IN */

1070 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P02_4_IN; /**< \brief IfxGtm_TIM0_4_P02_4_IN */

1071 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P10_0_IN; /**< \brief IfxGtm_TIM0_4_P10_0_IN */

1072 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P10_13_IN; /**< \brief IfxGtm_TIM0_4_P10_13_IN */

1073 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P14_1_IN; /**< \brief IfxGtm_TIM0_4_P14_1_IN */

1074 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P21_6_IN; /**< \brief IfxGtm_TIM0_4_P21_6_IN */

1075 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P22_3_IN; /**< \brief IfxGtm_TIM0_4_P22_3_IN */

1076 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P32_3_IN; /**< \brief IfxGtm_TIM0_4_P32_3_IN */

1077 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P33_0_IN; /**< \brief IfxGtm_TIM0_4_P33_0_IN */

1078 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P33_8_IN; /**< \brief IfxGtm_TIM0_4_P33_8_IN */

1079 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P01_3_IN; /**< \brief IfxGtm_TIM0_5_P01_3_IN */

1080 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P02_5_IN; /**< \brief IfxGtm_TIM0_5_P02_5_IN */

1081 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P10_11_IN; /**< \brief IfxGtm_TIM0_5_P10_11_IN */

1082 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P10_8_IN; /**< \brief IfxGtm_TIM0_5_P10_8_IN */

1083 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P14_2_IN; /**< \brief IfxGtm_TIM0_5_P14_2_IN */

1084 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P21_7_IN; /**< \brief IfxGtm_TIM0_5_P21_7_IN */

1085 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P23_0_IN; /**< \brief IfxGtm_TIM0_5_P23_0_IN */

1086 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P32_4_IN; /**< \brief IfxGtm_TIM0_5_P32_4_IN */

1087 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P33_1_IN; /**< \brief IfxGtm_TIM0_5_P33_1_IN */

1088 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P01_4_IN; /**< \brief IfxGtm_TIM0_6_P01_4_IN */

1089 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P02_6_IN; /**< \brief IfxGtm_TIM0_6_P02_6_IN */

1090 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P10_15_IN; /**< \brief IfxGtm_TIM0_6_P10_15_IN */

1091 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P10_4_IN; /**< \brief IfxGtm_TIM0_6_P10_4_IN */

1092 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P14_3_IN; /**< \brief IfxGtm_TIM0_6_P14_3_IN */

1093 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P20_0_IN; /**< \brief IfxGtm_TIM0_6_P20_0_IN */

1094 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P23_1_IN; /**< \brief IfxGtm_TIM0_6_P23_1_IN */

1095 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P23_2_IN; /**< \brief IfxGtm_TIM0_6_P23_2_IN */

1096 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P33_2_IN; /**< \brief IfxGtm_TIM0_6_P33_2_IN */

1097 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P02_11_IN; /**< \brief IfxGtm_TIM0_7_P02_11_IN */

1098 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P02_7_IN; /**< \brief IfxGtm_TIM0_7_P02_7_IN */

1099 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P11_15_IN; /**< \brief IfxGtm_TIM0_7_P11_15_IN */

1100 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P14_4_IN; /**< \brief IfxGtm_TIM0_7_P14_4_IN */

1101 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P20_8_IN; /**< \brief IfxGtm_TIM0_7_P20_8_IN */

1102 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P23_3_IN; /**< \brief IfxGtm_TIM0_7_P23_3_IN */

1103 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P23_4_IN; /**< \brief IfxGtm_TIM0_7_P23_4_IN */

1104 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P33_3_IN; /**< \brief IfxGtm_TIM0_7_P33_3_IN */

1105 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P00_9_IN; /**< \brief IfxGtm_TIM1_0_P00_9_IN */

1106 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P02_0_IN; /**< \brief IfxGtm_TIM1_0_P02_0_IN */

1107 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P10_7_IN; /**< \brief IfxGtm_TIM1_0_P10_7_IN */

1108 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P14_5_IN; /**< \brief IfxGtm_TIM1_0_P14_5_IN */

1109 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P14_7_IN; /**< \brief IfxGtm_TIM1_0_P14_7_IN */

1110 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P15_6_IN; /**< \brief IfxGtm_TIM1_0_P15_6_IN */

1111 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P21_2_IN; /**< \brief IfxGtm_TIM1_0_P21_2_IN */

1112 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P22_1_IN; /**< \brief IfxGtm_TIM1_0_P22_1_IN */

1113 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P33_10_IN; /**< \brief IfxGtm_TIM1_0_P33_10_IN */

1114 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P33_4_IN; /**< \brief IfxGtm_TIM1_0_P33_4_IN */

1115 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P00_10_IN; /**< \brief IfxGtm_TIM1_1_P00_10_IN */

1116 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P02_1_IN; /**< \brief IfxGtm_TIM1_1_P02_1_IN */

1117 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P10_1_IN; /**< \brief IfxGtm_TIM1_1_P10_1_IN */

1118 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P14_6_IN; /**< \brief IfxGtm_TIM1_1_P14_6_IN */

1119 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P15_7_IN; /**< \brief IfxGtm_TIM1_1_P15_7_IN */

1120 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P21_3_IN; /**< \brief IfxGtm_TIM1_1_P21_3_IN */

1121 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P22_0_IN; /**< \brief IfxGtm_TIM1_1_P22_0_IN */

1122 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P33_5_IN; /**< \brief IfxGtm_TIM1_1_P33_5_IN */

1123 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P33_9_IN; /**< \brief IfxGtm_TIM1_1_P33_9_IN */

1124 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P00_11_IN; /**< \brief IfxGtm_TIM1_2_P00_11_IN */

1125 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P02_2_IN; /**< \brief IfxGtm_TIM1_2_P02_2_IN */

1126 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P10_2_IN; /**< \brief IfxGtm_TIM1_2_P10_2_IN */

1127 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P10_5_IN; /**< \brief IfxGtm_TIM1_2_P10_5_IN */

1128 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P15_8_IN; /**< \brief IfxGtm_TIM1_2_P15_8_IN */

1129 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P21_4_IN; /**< \brief IfxGtm_TIM1_2_P21_4_IN */

1130 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P23_5_IN; /**< \brief IfxGtm_TIM1_2_P23_5_IN */

1131 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P23_6_IN; /**< \brief IfxGtm_TIM1_2_P23_6_IN */

1132 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P33_11_IN; /**< \brief IfxGtm_TIM1_2_P33_11_IN */

1133 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P33_6_IN; /**< \brief IfxGtm_TIM1_2_P33_6_IN */

1134 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P00_12_IN; /**< \brief IfxGtm_TIM1_3_P00_12_IN */

1135 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P02_3_IN; /**< \brief IfxGtm_TIM1_3_P02_3_IN */

1136 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P10_3_IN; /**< \brief IfxGtm_TIM1_3_P10_3_IN */

1137 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P10_6_IN; /**< \brief IfxGtm_TIM1_3_P10_6_IN */

1138 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P14_0_IN; /**< \brief IfxGtm_TIM1_3_P14_0_IN */

1139 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P21_5_IN; /**< \brief IfxGtm_TIM1_3_P21_5_IN */

1140 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P22_2_IN; /**< \brief IfxGtm_TIM1_3_P22_2_IN */

1141 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P23_7_IN; /**< \brief IfxGtm_TIM1_3_P23_7_IN */

1142 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P32_2_IN; /**< \brief IfxGtm_TIM1_3_P32_2_IN */

1143 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P33_7_IN; /**< \brief IfxGtm_TIM1_3_P33_7_IN */

1144 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P02_4_IN; /**< \brief IfxGtm_TIM1_4_P02_4_IN */

1145 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P10_0_IN; /**< \brief IfxGtm_TIM1_4_P10_0_IN */

1146 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P14_1_IN; /**< \brief IfxGtm_TIM1_4_P14_1_IN */

1147 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P20_0_IN; /**< \brief IfxGtm_TIM1_4_P20_0_IN */

1148 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P21_6_IN; /**< \brief IfxGtm_TIM1_4_P21_6_IN */

1149 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P22_3_IN; /**< \brief IfxGtm_TIM1_4_P22_3_IN */

1150 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P32_3_IN; /**< \brief IfxGtm_TIM1_4_P32_3_IN */

1151 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P33_0_IN; /**< \brief IfxGtm_TIM1_4_P33_0_IN */

1152 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P33_8_IN; /**< \brief IfxGtm_TIM1_4_P33_8_IN */

1153 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P02_5_IN; /**< \brief IfxGtm_TIM1_5_P02_5_IN */

1154 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P10_8_IN; /**< \brief IfxGtm_TIM1_5_P10_8_IN */

1155 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P14_2_IN; /**< \brief IfxGtm_TIM1_5_P14_2_IN */

1156 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P20_7_IN; /**< \brief IfxGtm_TIM1_5_P20_7_IN */

1157 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P21_7_IN; /**< \brief IfxGtm_TIM1_5_P21_7_IN */

1158 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P23_0_IN; /**< \brief IfxGtm_TIM1_5_P23_0_IN */

1159 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P32_4_IN; /**< \brief IfxGtm_TIM1_5_P32_4_IN */

1160 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P33_1_IN; /**< \brief IfxGtm_TIM1_5_P33_1_IN */

1161 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_P02_6_IN; /**< \brief IfxGtm_TIM1_6_P02_6_IN */

1162 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_P10_4_IN; /**< \brief IfxGtm_TIM1_6_P10_4_IN */

1163 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_P14_3_IN; /**< \brief IfxGtm_TIM1_6_P14_3_IN */

1164 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_P20_0_IN; /**< \brief IfxGtm_TIM1_6_P20_0_IN */

1165 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_P23_1_IN; /**< \brief IfxGtm_TIM1_6_P23_1_IN */

1166 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_P23_2_IN; /**< \brief IfxGtm_TIM1_6_P23_2_IN */

1167 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_P33_2_IN; /**< \brief IfxGtm_TIM1_6_P33_2_IN */

1168 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_P02_7_IN; /**< \brief IfxGtm_TIM1_7_P02_7_IN */

1169 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_P14_4_IN; /**< \brief IfxGtm_TIM1_7_P14_4_IN */

1170 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_P20_8_IN; /**< \brief IfxGtm_TIM1_7_P20_8_IN */

1171 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_P23_3_IN; /**< \brief IfxGtm_TIM1_7_P23_3_IN */

1172 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_P23_4_IN; /**< \brief IfxGtm_TIM1_7_P23_4_IN */

1173 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_P33_3_IN; /**< \brief IfxGtm_TIM1_7_P33_3_IN */

1174 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P00_0_IN; /**< \brief IfxGtm_TIM2_0_P00_0_IN */

1175 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P01_3_IN; /**< \brief IfxGtm_TIM2_0_P01_3_IN */

1176 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P02_8_IN; /**< \brief IfxGtm_TIM2_0_P02_8_IN */

1177 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P11_0_IN; /**< \brief IfxGtm_TIM2_0_P11_0_IN */

1178 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P11_10_IN; /**< \brief IfxGtm_TIM2_0_P11_10_IN */

1179 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P13_3_IN; /**< \brief IfxGtm_TIM2_0_P13_3_IN */

1180 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P15_5_IN; /**< \brief IfxGtm_TIM2_0_P15_5_IN */

1181 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P20_12_IN; /**< \brief IfxGtm_TIM2_0_P20_12_IN */

1182 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P31_0_IN; /**< \brief IfxGtm_TIM2_0_P31_0_IN */

1183 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P33_12_IN; /**< \brief IfxGtm_TIM2_0_P33_12_IN */

1184 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P33_14_IN; /**< \brief IfxGtm_TIM2_0_P33_14_IN */

1185 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P00_1_IN; /**< \brief IfxGtm_TIM2_1_P00_1_IN */

1186 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P00_2_IN; /**< \brief IfxGtm_TIM2_1_P00_2_IN */

1187 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P01_4_IN; /**< \brief IfxGtm_TIM2_1_P01_4_IN */

1188 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P11_1_IN; /**< \brief IfxGtm_TIM2_1_P11_1_IN */

1189 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P11_2_IN; /**< \brief IfxGtm_TIM2_1_P11_2_IN */

1190 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P15_10_IN; /**< \brief IfxGtm_TIM2_1_P15_10_IN */

1191 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P20_13_IN; /**< \brief IfxGtm_TIM2_1_P20_13_IN */

1192 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P31_1_IN; /**< \brief IfxGtm_TIM2_1_P31_1_IN */

1193 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P33_13_IN; /**< \brief IfxGtm_TIM2_1_P33_13_IN */

1194 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P33_15_IN; /**< \brief IfxGtm_TIM2_1_P33_15_IN */

1195 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P00_3_IN; /**< \brief IfxGtm_TIM2_2_P00_3_IN */

1196 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P01_5_IN; /**< \brief IfxGtm_TIM2_2_P01_5_IN */

1197 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P11_3_IN; /**< \brief IfxGtm_TIM2_2_P11_3_IN */

1198 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P11_4_IN; /**< \brief IfxGtm_TIM2_2_P11_4_IN */

1199 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P14_8_IN; /**< \brief IfxGtm_TIM2_2_P14_8_IN */

1200 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P15_11_IN; /**< \brief IfxGtm_TIM2_2_P15_11_IN */

1201 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P15_6_IN; /**< \brief IfxGtm_TIM2_2_P15_6_IN */

1202 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P20_14_IN; /**< \brief IfxGtm_TIM2_2_P20_14_IN */

1203 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P31_2_IN; /**< \brief IfxGtm_TIM2_2_P31_2_IN */

1204 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P32_0_IN; /**< \brief IfxGtm_TIM2_2_P32_0_IN */

1205 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P00_4_IN; /**< \brief IfxGtm_TIM2_3_P00_4_IN */

1206 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P01_5_IN; /**< \brief IfxGtm_TIM2_3_P01_5_IN */

1207 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P11_5_IN; /**< \brief IfxGtm_TIM2_3_P11_5_IN */

1208 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P11_6_IN; /**< \brief IfxGtm_TIM2_3_P11_6_IN */

1209 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P14_9_IN; /**< \brief IfxGtm_TIM2_3_P14_9_IN */

1210 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P15_0_IN; /**< \brief IfxGtm_TIM2_3_P15_0_IN */

1211 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P15_12_IN; /**< \brief IfxGtm_TIM2_3_P15_12_IN */

1212 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P20_1_IN; /**< \brief IfxGtm_TIM2_3_P20_1_IN */

1213 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P31_3_IN; /**< \brief IfxGtm_TIM2_3_P31_3_IN */

1214 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P34_1_IN; /**< \brief IfxGtm_TIM2_3_P34_1_IN */

1215 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P00_5_IN; /**< \brief IfxGtm_TIM2_4_P00_5_IN */

1216 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P02_14_IN; /**< \brief IfxGtm_TIM2_4_P02_14_IN */

1217 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P11_7_IN; /**< \brief IfxGtm_TIM2_4_P11_7_IN */

1218 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P11_9_IN; /**< \brief IfxGtm_TIM2_4_P11_9_IN */

1219 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P14_10_IN; /**< \brief IfxGtm_TIM2_4_P14_10_IN */

1220 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P15_13_IN; /**< \brief IfxGtm_TIM2_4_P15_13_IN */

1221 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P15_1_IN; /**< \brief IfxGtm_TIM2_4_P15_1_IN */

1222 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P20_3_IN; /**< \brief IfxGtm_TIM2_4_P20_3_IN */

1223 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P21_0_IN; /**< \brief IfxGtm_TIM2_4_P21_0_IN */

1224 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P31_4_IN; /**< \brief IfxGtm_TIM2_4_P31_4_IN */

1225 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P34_2_IN; /**< \brief IfxGtm_TIM2_4_P34_2_IN */

1226 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P00_6_IN; /**< \brief IfxGtm_TIM2_5_P00_6_IN */

1227 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P01_6_IN; /**< \brief IfxGtm_TIM2_5_P01_6_IN */

1228 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P02_15_IN; /**< \brief IfxGtm_TIM2_5_P02_15_IN */

1229 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P11_10_IN; /**< \brief IfxGtm_TIM2_5_P11_10_IN */

1230 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P11_8_IN; /**< \brief IfxGtm_TIM2_5_P11_8_IN */

1231 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P13_0_IN; /**< \brief IfxGtm_TIM2_5_P13_0_IN */

1232 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P15_14_IN; /**< \brief IfxGtm_TIM2_5_P15_14_IN */

1233 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P15_2_IN; /**< \brief IfxGtm_TIM2_5_P15_2_IN */

1234 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P20_9_IN; /**< \brief IfxGtm_TIM2_5_P20_9_IN */

1235 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P21_1_IN; /**< \brief IfxGtm_TIM2_5_P21_1_IN */

1236 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P31_5_IN; /**< \brief IfxGtm_TIM2_5_P31_5_IN */

1237 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P34_3_IN; /**< \brief IfxGtm_TIM2_5_P34_3_IN */

1238 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P00_7_IN; /**< \brief IfxGtm_TIM2_6_P00_7_IN */

1239 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P01_0_IN; /**< \brief IfxGtm_TIM2_6_P01_0_IN */

1240 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P11_11_IN; /**< \brief IfxGtm_TIM2_6_P11_11_IN */

1241 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P11_13_IN; /**< \brief IfxGtm_TIM2_6_P11_13_IN */

1242 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P13_1_IN; /**< \brief IfxGtm_TIM2_6_P13_1_IN */

1243 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P15_15_IN; /**< \brief IfxGtm_TIM2_6_P15_15_IN */

1244 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P15_3_IN; /**< \brief IfxGtm_TIM2_6_P15_3_IN */

1245 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P20_10_IN; /**< \brief IfxGtm_TIM2_6_P20_10_IN */

1246 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P20_6_IN; /**< \brief IfxGtm_TIM2_6_P20_6_IN */

1247 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P22_6_IN; /**< \brief IfxGtm_TIM2_6_P22_6_IN */

1248 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P31_6_IN; /**< \brief IfxGtm_TIM2_6_P31_6_IN */

1249 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P34_4_IN; /**< \brief IfxGtm_TIM2_6_P34_4_IN */

1250 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P00_8_IN; /**< \brief IfxGtm_TIM2_7_P00_8_IN */

1251 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P01_7_IN; /**< \brief IfxGtm_TIM2_7_P01_7_IN */

1252 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P11_12_IN; /**< \brief IfxGtm_TIM2_7_P11_12_IN */

1253 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P11_14_IN; /**< \brief IfxGtm_TIM2_7_P11_14_IN */

1254 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P13_2_IN; /**< \brief IfxGtm_TIM2_7_P13_2_IN */

1255 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P13_9_IN; /**< \brief IfxGtm_TIM2_7_P13_9_IN */

1256 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P15_4_IN; /**< \brief IfxGtm_TIM2_7_P15_4_IN */

1257 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P20_11_IN; /**< \brief IfxGtm_TIM2_7_P20_11_IN */

1258 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P20_7_IN; /**< \brief IfxGtm_TIM2_7_P20_7_IN */

1259 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P31_7_IN; /**< \brief IfxGtm_TIM2_7_P31_7_IN */

1260 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P34_5_IN; /**< \brief IfxGtm_TIM2_7_P34_5_IN */

1261 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P00_0_IN; /**< \brief IfxGtm_TIM3_0_P00_0_IN */

1262 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P00_5_IN; /**< \brief IfxGtm_TIM3_0_P00_5_IN */

1263 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P02_6_IN; /**< \brief IfxGtm_TIM3_0_P02_6_IN */

1264 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P02_8_IN; /**< \brief IfxGtm_TIM3_0_P02_8_IN */

1265 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P11_11_IN; /**< \brief IfxGtm_TIM3_0_P11_11_IN */

1266 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P12_0_IN; /**< \brief IfxGtm_TIM3_0_P12_0_IN */

1267 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P13_11_IN; /**< \brief IfxGtm_TIM3_0_P13_11_IN */

1268 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P13_3_IN; /**< \brief IfxGtm_TIM3_0_P13_3_IN */

1269 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P15_5_IN; /**< \brief IfxGtm_TIM3_0_P15_5_IN */

1270 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P20_12_IN; /**< \brief IfxGtm_TIM3_0_P20_12_IN */

1271 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P22_4_IN; /**< \brief IfxGtm_TIM3_0_P22_4_IN */

1272 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P25_0_IN; /**< \brief IfxGtm_TIM3_0_P25_0_IN */

1273 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P33_0_IN; /**< \brief IfxGtm_TIM3_0_P33_0_IN */

1274 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P33_12_IN; /**< \brief IfxGtm_TIM3_0_P33_12_IN */

1275 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P00_1_IN; /**< \brief IfxGtm_TIM3_1_P00_1_IN */

1276 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P00_2_IN; /**< \brief IfxGtm_TIM3_1_P00_2_IN */

1277 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P00_6_IN; /**< \brief IfxGtm_TIM3_1_P00_6_IN */

1278 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P02_7_IN; /**< \brief IfxGtm_TIM3_1_P02_7_IN */

1279 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P11_2_IN; /**< \brief IfxGtm_TIM3_1_P11_2_IN */

1280 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P12_1_IN; /**< \brief IfxGtm_TIM3_1_P12_1_IN */

1281 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P13_10_IN; /**< \brief IfxGtm_TIM3_1_P13_10_IN */

1282 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P14_11_IN; /**< \brief IfxGtm_TIM3_1_P14_11_IN */

1283 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P20_13_IN; /**< \brief IfxGtm_TIM3_1_P20_13_IN */

1284 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P22_5_IN; /**< \brief IfxGtm_TIM3_1_P22_5_IN */

1285 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P25_1_IN; /**< \brief IfxGtm_TIM3_1_P25_1_IN */

1286 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P33_13_IN; /**< \brief IfxGtm_TIM3_1_P33_13_IN */

1287 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P33_1_IN; /**< \brief IfxGtm_TIM3_1_P33_1_IN */

1288 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P00_3_IN; /**< \brief IfxGtm_TIM3_2_P00_3_IN */

1289 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P00_7_IN; /**< \brief IfxGtm_TIM3_2_P00_7_IN */

1290 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P02_8_IN; /**< \brief IfxGtm_TIM3_2_P02_8_IN */

1291 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P11_3_IN; /**< \brief IfxGtm_TIM3_2_P11_3_IN */

1292 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P13_14_IN; /**< \brief IfxGtm_TIM3_2_P13_14_IN */

1293 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P14_14_IN; /**< \brief IfxGtm_TIM3_2_P14_14_IN */

1294 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P14_8_IN; /**< \brief IfxGtm_TIM3_2_P14_8_IN */

1295 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P20_14_IN; /**< \brief IfxGtm_TIM3_2_P20_14_IN */

1296 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P22_6_IN; /**< \brief IfxGtm_TIM3_2_P22_6_IN */

1297 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P25_2_IN; /**< \brief IfxGtm_TIM3_2_P25_2_IN */

1298 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P32_0_IN; /**< \brief IfxGtm_TIM3_2_P32_0_IN */

1299 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P33_2_IN; /**< \brief IfxGtm_TIM3_2_P33_2_IN */

1300 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P00_4_IN; /**< \brief IfxGtm_TIM3_3_P00_4_IN */

1301 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P00_8_IN; /**< \brief IfxGtm_TIM3_3_P00_8_IN */

1302 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P02_9_IN; /**< \brief IfxGtm_TIM3_3_P02_9_IN */

1303 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P11_6_IN; /**< \brief IfxGtm_TIM3_3_P11_6_IN */

1304 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P13_4_IN; /**< \brief IfxGtm_TIM3_3_P13_4_IN */

1305 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P14_13_IN; /**< \brief IfxGtm_TIM3_3_P14_13_IN */

1306 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P14_9_IN; /**< \brief IfxGtm_TIM3_3_P14_9_IN */

1307 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P15_0_IN; /**< \brief IfxGtm_TIM3_3_P15_0_IN */

1308 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P20_1_IN; /**< \brief IfxGtm_TIM3_3_P20_1_IN */

1309 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P22_7_IN; /**< \brief IfxGtm_TIM3_3_P22_7_IN */

1310 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P25_3_IN; /**< \brief IfxGtm_TIM3_3_P25_3_IN */

1311 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P32_1_IN; /**< \brief IfxGtm_TIM3_3_P32_1_IN */

1312 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P33_3_IN; /**< \brief IfxGtm_TIM3_3_P33_3_IN */

1313 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P00_5_IN; /**< \brief IfxGtm_TIM3_4_P00_5_IN */

1314 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P02_10_IN; /**< \brief IfxGtm_TIM3_4_P02_10_IN */

1315 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P11_9_IN; /**< \brief IfxGtm_TIM3_4_P11_9_IN */

1316 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P13_5_IN; /**< \brief IfxGtm_TIM3_4_P13_5_IN */

1317 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P14_10_IN; /**< \brief IfxGtm_TIM3_4_P14_10_IN */

1318 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P14_12_IN; /**< \brief IfxGtm_TIM3_4_P14_12_IN */

1319 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P15_1_IN; /**< \brief IfxGtm_TIM3_4_P15_1_IN */

1320 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P20_3_IN; /**< \brief IfxGtm_TIM3_4_P20_3_IN */

1321 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P21_0_IN; /**< \brief IfxGtm_TIM3_4_P21_0_IN */

1322 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P22_8_IN; /**< \brief IfxGtm_TIM3_4_P22_8_IN */

1323 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P25_4_IN; /**< \brief IfxGtm_TIM3_4_P25_4_IN */

1324 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P34_1_IN; /**< \brief IfxGtm_TIM3_4_P34_1_IN */

1325 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P00_6_IN; /**< \brief IfxGtm_TIM3_5_P00_6_IN */

1326 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P02_11_IN; /**< \brief IfxGtm_TIM3_5_P02_11_IN */

1327 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P11_10_IN; /**< \brief IfxGtm_TIM3_5_P11_10_IN */

1328 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P13_0_IN; /**< \brief IfxGtm_TIM3_5_P13_0_IN */

1329 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P13_13_IN; /**< \brief IfxGtm_TIM3_5_P13_13_IN */

1330 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P13_6_IN; /**< \brief IfxGtm_TIM3_5_P13_6_IN */

1331 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P15_2_IN; /**< \brief IfxGtm_TIM3_5_P15_2_IN */

1332 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P20_9_IN; /**< \brief IfxGtm_TIM3_5_P20_9_IN */

1333 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P21_1_IN; /**< \brief IfxGtm_TIM3_5_P21_1_IN */

1334 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P22_9_IN; /**< \brief IfxGtm_TIM3_5_P22_9_IN */

1335 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P25_5_IN; /**< \brief IfxGtm_TIM3_5_P25_5_IN */

1336 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P32_5_IN; /**< \brief IfxGtm_TIM3_5_P32_5_IN */

1337 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P34_2_IN; /**< \brief IfxGtm_TIM3_5_P34_2_IN */

1338 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P00_7_IN; /**< \brief IfxGtm_TIM3_6_P00_7_IN */

1339 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P02_12_IN; /**< \brief IfxGtm_TIM3_6_P02_12_IN */

1340 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P11_11_IN; /**< \brief IfxGtm_TIM3_6_P11_11_IN */

1341 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P13_1_IN; /**< \brief IfxGtm_TIM3_6_P13_1_IN */

1342 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P13_7_IN; /**< \brief IfxGtm_TIM3_6_P13_7_IN */

1343 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P14_15_IN; /**< \brief IfxGtm_TIM3_6_P14_15_IN */

1344 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P15_3_IN; /**< \brief IfxGtm_TIM3_6_P15_3_IN */

1345 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P20_10_IN; /**< \brief IfxGtm_TIM3_6_P20_10_IN */

1346 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P20_6_IN; /**< \brief IfxGtm_TIM3_6_P20_6_IN */

1347 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P22_10_IN; /**< \brief IfxGtm_TIM3_6_P22_10_IN */

1348 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P25_6_IN; /**< \brief IfxGtm_TIM3_6_P25_6_IN */

1349 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P26_0_IN; /**< \brief IfxGtm_TIM3_6_P26_0_IN */

1350 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P32_6_IN; /**< \brief IfxGtm_TIM3_6_P32_6_IN */

1351 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P34_3_IN; /**< \brief IfxGtm_TIM3_6_P34_3_IN */

1352 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P00_8_IN; /**< \brief IfxGtm_TIM3_7_P00_8_IN */

1353 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P02_13_IN; /**< \brief IfxGtm_TIM3_7_P02_13_IN */

1354 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P11_12_IN; /**< \brief IfxGtm_TIM3_7_P11_12_IN */

1355 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P13_15_IN; /**< \brief IfxGtm_TIM3_7_P13_15_IN */

1356 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P13_2_IN; /**< \brief IfxGtm_TIM3_7_P13_2_IN */

1357 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P15_4_IN; /**< \brief IfxGtm_TIM3_7_P15_4_IN */

1358 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P20_11_IN; /**< \brief IfxGtm_TIM3_7_P20_11_IN */

1359 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P20_7_IN; /**< \brief IfxGtm_TIM3_7_P20_7_IN */

1360 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P22_11_IN; /**< \brief IfxGtm_TIM3_7_P22_11_IN */

1361 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P25_7_IN; /**< \brief IfxGtm_TIM3_7_P25_7_IN */

1362 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P32_7_IN; /**< \brief IfxGtm_TIM3_7_P32_7_IN */

1363 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P34_4_IN; /**< \brief IfxGtm_TIM3_7_P34_4_IN */

1364 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P00_13_IN; /**< \brief IfxGtm_TIM4_0_P00_13_IN */

1365 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P00_9_IN; /**< \brief IfxGtm_TIM4_0_P00_9_IN */

1366 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P01_12_IN; /**< \brief IfxGtm_TIM4_0_P01_12_IN */

1367 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P02_12_IN; /**< \brief IfxGtm_TIM4_0_P02_12_IN */

1368 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P10_0_IN; /**< \brief IfxGtm_TIM4_0_P10_0_IN */

1369 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P10_8_IN; /**< \brief IfxGtm_TIM4_0_P10_8_IN */

1370 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P11_0_IN; /**< \brief IfxGtm_TIM4_0_P11_0_IN */

1371 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P12_0_IN; /**< \brief IfxGtm_TIM4_0_P12_0_IN */

1372 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P13_12_IN; /**< \brief IfxGtm_TIM4_0_P13_12_IN */

1373 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P21_0_IN; /**< \brief IfxGtm_TIM4_0_P21_0_IN */

1374 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P24_0_IN; /**< \brief IfxGtm_TIM4_0_P24_0_IN */

1375 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P25_8_IN; /**< \brief IfxGtm_TIM4_0_P25_8_IN */

1376 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P30_0_IN; /**< \brief IfxGtm_TIM4_0_P30_0_IN */

1377 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P32_7_IN; /**< \brief IfxGtm_TIM4_0_P32_7_IN */

1378 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P00_10_IN; /**< \brief IfxGtm_TIM4_1_P00_10_IN */

1379 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P00_15_IN; /**< \brief IfxGtm_TIM4_1_P00_15_IN */

1380 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P01_1_IN; /**< \brief IfxGtm_TIM4_1_P01_1_IN */

1381 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P02_15_IN; /**< \brief IfxGtm_TIM4_1_P02_15_IN */

1382 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P10_9_IN; /**< \brief IfxGtm_TIM4_1_P10_9_IN */

1383 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P11_1_IN; /**< \brief IfxGtm_TIM4_1_P11_1_IN */

1384 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P12_1_IN; /**< \brief IfxGtm_TIM4_1_P12_1_IN */

1385 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P15_10_IN; /**< \brief IfxGtm_TIM4_1_P15_10_IN */

1386 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P21_1_IN; /**< \brief IfxGtm_TIM4_1_P21_1_IN */

1387 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P24_1_IN; /**< \brief IfxGtm_TIM4_1_P24_1_IN */

1388 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P25_9_IN; /**< \brief IfxGtm_TIM4_1_P25_9_IN */

1389 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P30_1_IN; /**< \brief IfxGtm_TIM4_1_P30_1_IN */

1390 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P32_5_IN; /**< \brief IfxGtm_TIM4_1_P32_5_IN */

1391 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P00_11_IN; /**< \brief IfxGtm_TIM4_2_P00_11_IN */

1392 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P01_9_IN; /**< \brief IfxGtm_TIM4_2_P01_9_IN */

1393 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P02_13_IN; /**< \brief IfxGtm_TIM4_2_P02_13_IN */

1394 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P02_9_IN; /**< \brief IfxGtm_TIM4_2_P02_9_IN */

1395 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P10_10_IN; /**< \brief IfxGtm_TIM4_2_P10_10_IN */

1396 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P10_6_IN; /**< \brief IfxGtm_TIM4_2_P10_6_IN */

1397 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P11_4_IN; /**< \brief IfxGtm_TIM4_2_P11_4_IN */

1398 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P15_11_IN; /**< \brief IfxGtm_TIM4_2_P15_11_IN */

1399 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P21_6_IN; /**< \brief IfxGtm_TIM4_2_P21_6_IN */

1400 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P23_6_IN; /**< \brief IfxGtm_TIM4_2_P23_6_IN */

1401 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P24_2_IN; /**< \brief IfxGtm_TIM4_2_P24_2_IN */

1402 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P25_10_IN; /**< \brief IfxGtm_TIM4_2_P25_10_IN */

1403 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P30_2_IN; /**< \brief IfxGtm_TIM4_2_P30_2_IN */

1404 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P00_12_IN; /**< \brief IfxGtm_TIM4_3_P00_12_IN */

1405 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P01_13_IN; /**< \brief IfxGtm_TIM4_3_P01_13_IN */

1406 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P02_10_IN; /**< \brief IfxGtm_TIM4_3_P02_10_IN */

1407 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P02_14_IN; /**< \brief IfxGtm_TIM4_3_P02_14_IN */

1408 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P10_14_IN; /**< \brief IfxGtm_TIM4_3_P10_14_IN */

1409 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P10_5_IN; /**< \brief IfxGtm_TIM4_3_P10_5_IN */

1410 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P11_5_IN; /**< \brief IfxGtm_TIM4_3_P11_5_IN */

1411 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P15_12_IN; /**< \brief IfxGtm_TIM4_3_P15_12_IN */

1412 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P21_7_IN; /**< \brief IfxGtm_TIM4_3_P21_7_IN */

1413 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P23_7_IN; /**< \brief IfxGtm_TIM4_3_P23_7_IN */

1414 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P24_3_IN; /**< \brief IfxGtm_TIM4_3_P24_3_IN */

1415 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P25_11_IN; /**< \brief IfxGtm_TIM4_3_P25_11_IN */

1416 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P30_3_IN; /**< \brief IfxGtm_TIM4_3_P30_3_IN */

1417 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P01_0_IN; /**< \brief IfxGtm_TIM4_4_P01_0_IN */

1418 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P01_8_IN; /**< \brief IfxGtm_TIM4_4_P01_8_IN */

1419 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P02_11_IN; /**< \brief IfxGtm_TIM4_4_P02_11_IN */

1420 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P10_13_IN; /**< \brief IfxGtm_TIM4_4_P10_13_IN */

1421 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P10_1_IN; /**< \brief IfxGtm_TIM4_4_P10_1_IN */

1422 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P11_7_IN; /**< \brief IfxGtm_TIM4_4_P11_7_IN */

1423 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P15_13_IN; /**< \brief IfxGtm_TIM4_4_P15_13_IN */

1424 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P20_1_IN; /**< \brief IfxGtm_TIM4_4_P20_1_IN */

1425 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P24_4_IN; /**< \brief IfxGtm_TIM4_4_P24_4_IN */

1426 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P25_12_IN; /**< \brief IfxGtm_TIM4_4_P25_12_IN */

1427 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P30_4_IN; /**< \brief IfxGtm_TIM4_4_P30_4_IN */

1428 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P32_6_IN; /**< \brief IfxGtm_TIM4_4_P32_6_IN */

1429 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P33_10_IN; /**< \brief IfxGtm_TIM4_4_P33_10_IN */

1430 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P33_4_IN; /**< \brief IfxGtm_TIM4_4_P33_4_IN */

1431 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P01_10_IN; /**< \brief IfxGtm_TIM4_5_P01_10_IN */

1432 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P01_2_IN; /**< \brief IfxGtm_TIM4_5_P01_2_IN */

1433 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P01_3_IN; /**< \brief IfxGtm_TIM4_5_P01_3_IN */

1434 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P10_11_IN; /**< \brief IfxGtm_TIM4_5_P10_11_IN */

1435 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P10_2_IN; /**< \brief IfxGtm_TIM4_5_P10_2_IN */

1436 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P11_8_IN; /**< \brief IfxGtm_TIM4_5_P11_8_IN */

1437 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P15_14_IN; /**< \brief IfxGtm_TIM4_5_P15_14_IN */

1438 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P20_3_IN; /**< \brief IfxGtm_TIM4_5_P20_3_IN */

1439 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P24_5_IN; /**< \brief IfxGtm_TIM4_5_P24_5_IN */

1440 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P25_13_IN; /**< \brief IfxGtm_TIM4_5_P25_13_IN */

1441 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P30_5_IN; /**< \brief IfxGtm_TIM4_5_P30_5_IN */

1442 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P33_14_IN; /**< \brief IfxGtm_TIM4_5_P33_14_IN */

1443 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P33_5_IN; /**< \brief IfxGtm_TIM4_5_P33_5_IN */

1444 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P01_14_IN; /**< \brief IfxGtm_TIM4_6_P01_14_IN */

1445 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P01_15_IN; /**< \brief IfxGtm_TIM4_6_P01_15_IN */

1446 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P01_4_IN; /**< \brief IfxGtm_TIM4_6_P01_4_IN */

1447 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P10_15_IN; /**< \brief IfxGtm_TIM4_6_P10_15_IN */

1448 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P10_3_IN; /**< \brief IfxGtm_TIM4_6_P10_3_IN */

1449 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P11_13_IN; /**< \brief IfxGtm_TIM4_6_P11_13_IN */

1450 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P15_15_IN; /**< \brief IfxGtm_TIM4_6_P15_15_IN */

1451 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P24_6_IN; /**< \brief IfxGtm_TIM4_6_P24_6_IN */

1452 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P25_14_IN; /**< \brief IfxGtm_TIM4_6_P25_14_IN */

1453 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P30_6_IN; /**< \brief IfxGtm_TIM4_6_P30_6_IN */

1454 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P33_15_IN; /**< \brief IfxGtm_TIM4_6_P33_15_IN */

1455 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P00_14_IN; /**< \brief IfxGtm_TIM4_7_P00_14_IN */

1456 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P01_11_IN; /**< \brief IfxGtm_TIM4_7_P01_11_IN */

1457 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P10_4_IN; /**< \brief IfxGtm_TIM4_7_P10_4_IN */

1458 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P11_14_IN; /**< \brief IfxGtm_TIM4_7_P11_14_IN */

1459 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P11_15_IN; /**< \brief IfxGtm_TIM4_7_P11_15_IN */

1460 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P13_9_IN; /**< \brief IfxGtm_TIM4_7_P13_9_IN */

1461 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P14_7_IN; /**< \brief IfxGtm_TIM4_7_P14_7_IN */

1462 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P24_7_IN; /**< \brief IfxGtm_TIM4_7_P24_7_IN */

1463 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P25_15_IN; /**< \brief IfxGtm_TIM4_7_P25_15_IN */

1464 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P30_7_IN; /**< \brief IfxGtm_TIM4_7_P30_7_IN */

1465 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P34_5_IN; /**< \brief IfxGtm_TIM4_7_P34_5_IN */

1466 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P00_13_IN; /**< \brief IfxGtm_TIM5_0_P00_13_IN */

1467 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P01_12_IN; /**< \brief IfxGtm_TIM5_0_P01_12_IN */

1468 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P01_8_IN; /**< \brief IfxGtm_TIM5_0_P01_8_IN */

1469 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P02_12_IN; /**< \brief IfxGtm_TIM5_0_P02_12_IN */

1470 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P13_11_IN; /**< \brief IfxGtm_TIM5_0_P13_11_IN */

1471 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P22_8_IN; /**< \brief IfxGtm_TIM5_0_P22_8_IN */

1472 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P24_8_IN; /**< \brief IfxGtm_TIM5_0_P24_8_IN */

1473 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P30_8_IN; /**< \brief IfxGtm_TIM5_0_P30_8_IN */

1474 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P31_8_IN; /**< \brief IfxGtm_TIM5_0_P31_8_IN */

1475 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P33_14_IN; /**< \brief IfxGtm_TIM5_0_P33_14_IN */

1476 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P00_15_IN; /**< \brief IfxGtm_TIM5_1_P00_15_IN */

1477 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P01_1_IN; /**< \brief IfxGtm_TIM5_1_P01_1_IN */

1478 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P01_9_IN; /**< \brief IfxGtm_TIM5_1_P01_9_IN */

1479 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P02_15_IN; /**< \brief IfxGtm_TIM5_1_P02_15_IN */

1480 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P13_10_IN; /**< \brief IfxGtm_TIM5_1_P13_10_IN */

1481 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P14_11_IN; /**< \brief IfxGtm_TIM5_1_P14_11_IN */

1482 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P22_9_IN; /**< \brief IfxGtm_TIM5_1_P22_9_IN */

1483 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P24_9_IN; /**< \brief IfxGtm_TIM5_1_P24_9_IN */

1484 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P30_9_IN; /**< \brief IfxGtm_TIM5_1_P30_9_IN */

1485 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P31_9_IN; /**< \brief IfxGtm_TIM5_1_P31_9_IN */

1486 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P33_15_IN; /**< \brief IfxGtm_TIM5_1_P33_15_IN */

1487 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P01_10_IN; /**< \brief IfxGtm_TIM5_2_P01_10_IN */

1488 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P01_9_IN; /**< \brief IfxGtm_TIM5_2_P01_9_IN */

1489 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P02_13_IN; /**< \brief IfxGtm_TIM5_2_P02_13_IN */

1490 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P13_14_IN; /**< \brief IfxGtm_TIM5_2_P13_14_IN */

1491 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P14_14_IN; /**< \brief IfxGtm_TIM5_2_P14_14_IN */

1492 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P22_10_IN; /**< \brief IfxGtm_TIM5_2_P22_10_IN */

1493 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P24_10_IN; /**< \brief IfxGtm_TIM5_2_P24_10_IN */

1494 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P30_10_IN; /**< \brief IfxGtm_TIM5_2_P30_10_IN */

1495 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P31_10_IN; /**< \brief IfxGtm_TIM5_2_P31_10_IN */

1496 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P01_11_IN; /**< \brief IfxGtm_TIM5_3_P01_11_IN */

1497 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P01_13_IN; /**< \brief IfxGtm_TIM5_3_P01_13_IN */

1498 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P01_5_IN; /**< \brief IfxGtm_TIM5_3_P01_5_IN */

1499 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P02_14_IN; /**< \brief IfxGtm_TIM5_3_P02_14_IN */

1500 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P13_4_IN; /**< \brief IfxGtm_TIM5_3_P13_4_IN */

1501 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P14_13_IN; /**< \brief IfxGtm_TIM5_3_P14_13_IN */

1502 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P22_11_IN; /**< \brief IfxGtm_TIM5_3_P22_11_IN */

1503 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P24_11_IN; /**< \brief IfxGtm_TIM5_3_P24_11_IN */

1504 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P30_11_IN; /**< \brief IfxGtm_TIM5_3_P30_11_IN */

1505 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P31_11_IN; /**< \brief IfxGtm_TIM5_3_P31_11_IN */

1506 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P34_1_IN; /**< \brief IfxGtm_TIM5_3_P34_1_IN */

1507 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P00_0_IN; /**< \brief IfxGtm_TIM5_4_P00_0_IN */

1508 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P01_0_IN; /**< \brief IfxGtm_TIM5_4_P01_0_IN */

1509 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P01_8_IN; /**< \brief IfxGtm_TIM5_4_P01_8_IN */

1510 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P13_5_IN; /**< \brief IfxGtm_TIM5_4_P13_5_IN */

1511 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P14_12_IN; /**< \brief IfxGtm_TIM5_4_P14_12_IN */

1512 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P21_2_IN; /**< \brief IfxGtm_TIM5_4_P21_2_IN */

1513 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P24_12_IN; /**< \brief IfxGtm_TIM5_4_P24_12_IN */

1514 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P30_12_IN; /**< \brief IfxGtm_TIM5_4_P30_12_IN */

1515 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P31_12_IN; /**< \brief IfxGtm_TIM5_4_P31_12_IN */

1516 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P34_2_IN; /**< \brief IfxGtm_TIM5_4_P34_2_IN */

1517 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P00_1_IN; /**< \brief IfxGtm_TIM5_5_P00_1_IN */

1518 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P01_10_IN; /**< \brief IfxGtm_TIM5_5_P01_10_IN */

1519 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P01_2_IN; /**< \brief IfxGtm_TIM5_5_P01_2_IN */

1520 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P01_6_IN; /**< \brief IfxGtm_TIM5_5_P01_6_IN */

1521 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P13_13_IN; /**< \brief IfxGtm_TIM5_5_P13_13_IN */

1522 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P13_6_IN; /**< \brief IfxGtm_TIM5_5_P13_6_IN */

1523 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P21_3_IN; /**< \brief IfxGtm_TIM5_5_P21_3_IN */

1524 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P24_13_IN; /**< \brief IfxGtm_TIM5_5_P24_13_IN */

1525 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P30_13_IN; /**< \brief IfxGtm_TIM5_5_P30_13_IN */

1526 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P31_13_IN; /**< \brief IfxGtm_TIM5_5_P31_13_IN */

1527 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P32_5_IN; /**< \brief IfxGtm_TIM5_5_P32_5_IN */

1528 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P34_3_IN; /**< \brief IfxGtm_TIM5_5_P34_3_IN */

1529 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P00_2_IN; /**< \brief IfxGtm_TIM5_6_P00_2_IN */

1530 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P01_14_IN; /**< \brief IfxGtm_TIM5_6_P01_14_IN */

1531 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P01_15_IN; /**< \brief IfxGtm_TIM5_6_P01_15_IN */

1532 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P01_6_IN; /**< \brief IfxGtm_TIM5_6_P01_6_IN */

1533 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P13_7_IN; /**< \brief IfxGtm_TIM5_6_P13_7_IN */

1534 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P14_15_IN; /**< \brief IfxGtm_TIM5_6_P14_15_IN */

1535 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P21_4_IN; /**< \brief IfxGtm_TIM5_6_P21_4_IN */

1536 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P24_14_IN; /**< \brief IfxGtm_TIM5_6_P24_14_IN */

1537 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P30_14_IN; /**< \brief IfxGtm_TIM5_6_P30_14_IN */

1538 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P31_14_IN; /**< \brief IfxGtm_TIM5_6_P31_14_IN */

1539 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P32_6_IN; /**< \brief IfxGtm_TIM5_6_P32_6_IN */

1540 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P34_4_IN; /**< \brief IfxGtm_TIM5_6_P34_4_IN */

1541 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P00_14_IN; /**< \brief IfxGtm_TIM5_7_P00_14_IN */

1542 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P00_3_IN; /**< \brief IfxGtm_TIM5_7_P00_3_IN */

1543 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P01_11_IN; /**< \brief IfxGtm_TIM5_7_P01_11_IN */

1544 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P01_7_IN; /**< \brief IfxGtm_TIM5_7_P01_7_IN */

1545 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P13_15_IN; /**< \brief IfxGtm_TIM5_7_P13_15_IN */

1546 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P21_5_IN; /**< \brief IfxGtm_TIM5_7_P21_5_IN */

1547 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P24_15_IN; /**< \brief IfxGtm_TIM5_7_P24_15_IN */

1548 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P30_15_IN; /**< \brief IfxGtm_TIM5_7_P30_15_IN */

1549 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P31_15_IN; /**< \brief IfxGtm_TIM5_7_P31_15_IN */

1550 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P32_7_IN; /**< \brief IfxGtm_TIM5_7_P32_7_IN */

1551 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P34_5_IN; /**< \brief IfxGtm_TIM5_7_P34_5_IN */

1552 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P01_12_IN; /**< \brief IfxGtm_TIM6_0_P01_12_IN */

1553 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P10_9_IN; /**< \brief IfxGtm_TIM6_0_P10_9_IN */

1554 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P13_4_IN; /**< \brief IfxGtm_TIM6_0_P13_4_IN */

1555 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P20_6_IN; /**< \brief IfxGtm_TIM6_0_P20_6_IN */

1556 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P23_7_IN; /**< \brief IfxGtm_TIM6_0_P23_7_IN */

1557 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P24_0_IN; /**< \brief IfxGtm_TIM6_0_P24_0_IN */

1558 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P25_0_IN; /**< \brief IfxGtm_TIM6_0_P25_0_IN */

1559 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P30_8_IN; /**< \brief IfxGtm_TIM6_0_P30_8_IN */

1560 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P31_8_IN; /**< \brief IfxGtm_TIM6_0_P31_8_IN */

1561 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P01_13_IN; /**< \brief IfxGtm_TIM6_1_P01_13_IN */

1562 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P10_10_IN; /**< \brief IfxGtm_TIM6_1_P10_10_IN */

1563 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P13_5_IN; /**< \brief IfxGtm_TIM6_1_P13_5_IN */

1564 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P20_7_IN; /**< \brief IfxGtm_TIM6_1_P20_7_IN */

1565 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P23_6_IN; /**< \brief IfxGtm_TIM6_1_P23_6_IN */

1566 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P24_1_IN; /**< \brief IfxGtm_TIM6_1_P24_1_IN */

1567 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P25_1_IN; /**< \brief IfxGtm_TIM6_1_P25_1_IN */

1568 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P30_9_IN; /**< \brief IfxGtm_TIM6_1_P30_9_IN */

1569 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P31_9_IN; /**< \brief IfxGtm_TIM6_1_P31_9_IN */

1570 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P01_14_IN; /**< \brief IfxGtm_TIM6_2_P01_14_IN */

1571 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P10_11_IN; /**< \brief IfxGtm_TIM6_2_P10_11_IN */

1572 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P13_6_IN; /**< \brief IfxGtm_TIM6_2_P13_6_IN */

1573 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P20_8_IN; /**< \brief IfxGtm_TIM6_2_P20_8_IN */

1574 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P23_5_IN; /**< \brief IfxGtm_TIM6_2_P23_5_IN */

1575 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P24_2_IN; /**< \brief IfxGtm_TIM6_2_P24_2_IN */

1576 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P25_2_IN; /**< \brief IfxGtm_TIM6_2_P25_2_IN */

1577 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P30_10_IN; /**< \brief IfxGtm_TIM6_2_P30_10_IN */

1578 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P31_10_IN; /**< \brief IfxGtm_TIM6_2_P31_10_IN */

1579 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P01_15_IN; /**< \brief IfxGtm_TIM6_3_P01_15_IN */

1580 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P10_13_IN; /**< \brief IfxGtm_TIM6_3_P10_13_IN */

1581 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P13_7_IN; /**< \brief IfxGtm_TIM6_3_P13_7_IN */

1582 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P20_9_IN; /**< \brief IfxGtm_TIM6_3_P20_9_IN */

1583 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P23_4_IN; /**< \brief IfxGtm_TIM6_3_P23_4_IN */

1584 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P24_3_IN; /**< \brief IfxGtm_TIM6_3_P24_3_IN */

1585 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P25_3_IN; /**< \brief IfxGtm_TIM6_3_P25_3_IN */

1586 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P30_11_IN; /**< \brief IfxGtm_TIM6_3_P30_11_IN */

1587 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P31_11_IN; /**< \brief IfxGtm_TIM6_3_P31_11_IN */

1588 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P00_4_IN; /**< \brief IfxGtm_TIM6_4_P00_4_IN */

1589 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P13_9_IN; /**< \brief IfxGtm_TIM6_4_P13_9_IN */

1590 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P14_12_IN; /**< \brief IfxGtm_TIM6_4_P14_12_IN */

1591 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P23_3_IN; /**< \brief IfxGtm_TIM6_4_P23_3_IN */

1592 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P24_4_IN; /**< \brief IfxGtm_TIM6_4_P24_4_IN */

1593 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P25_4_IN; /**< \brief IfxGtm_TIM6_4_P25_4_IN */

1594 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P30_12_IN; /**< \brief IfxGtm_TIM6_4_P30_12_IN */

1595 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P31_12_IN; /**< \brief IfxGtm_TIM6_4_P31_12_IN */

1596 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P00_13_IN; /**< \brief IfxGtm_TIM6_5_P00_13_IN */

1597 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P13_10_IN; /**< \brief IfxGtm_TIM6_5_P13_10_IN */

1598 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P14_13_IN; /**< \brief IfxGtm_TIM6_5_P14_13_IN */

1599 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P23_2_IN; /**< \brief IfxGtm_TIM6_5_P23_2_IN */

1600 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P24_5_IN; /**< \brief IfxGtm_TIM6_5_P24_5_IN */

1601 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P25_5_IN; /**< \brief IfxGtm_TIM6_5_P25_5_IN */

1602 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P30_13_IN; /**< \brief IfxGtm_TIM6_5_P30_13_IN */

1603 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P31_13_IN; /**< \brief IfxGtm_TIM6_5_P31_13_IN */

1604 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P00_14_IN; /**< \brief IfxGtm_TIM6_6_P00_14_IN */

1605 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P13_11_IN; /**< \brief IfxGtm_TIM6_6_P13_11_IN */

1606 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P14_14_IN; /**< \brief IfxGtm_TIM6_6_P14_14_IN */

1607 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P23_1_IN; /**< \brief IfxGtm_TIM6_6_P23_1_IN */

1608 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P24_6_IN; /**< \brief IfxGtm_TIM6_6_P24_6_IN */

1609 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P25_6_IN; /**< \brief IfxGtm_TIM6_6_P25_6_IN */

1610 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P26_0_IN; /**< \brief IfxGtm_TIM6_6_P26_0_IN */

1611 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P30_14_IN; /**< \brief IfxGtm_TIM6_6_P30_14_IN */

1612 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P31_14_IN; /**< \brief IfxGtm_TIM6_6_P31_14_IN */

1613 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P00_15_IN; /**< \brief IfxGtm_TIM6_7_P00_15_IN */

1614 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P13_12_IN; /**< \brief IfxGtm_TIM6_7_P13_12_IN */

1615 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P14_15_IN; /**< \brief IfxGtm_TIM6_7_P14_15_IN */

1616 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P23_0_IN; /**< \brief IfxGtm_TIM6_7_P23_0_IN */

1617 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P24_7_IN; /**< \brief IfxGtm_TIM6_7_P24_7_IN */

1618 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P25_7_IN; /**< \brief IfxGtm_TIM6_7_P25_7_IN */

1619 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P30_15_IN; /**< \brief IfxGtm_TIM6_7_P30_15_IN */

1620 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P31_15_IN; /**< \brief IfxGtm_TIM6_7_P31_15_IN */

1621 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT106_P10_4_OUT; /**< \brief IfxGtm_TOM0_0N_TOUT106_P10_4_OUT */

1622 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT17_P00_8_OUT; /**< \brief IfxGtm_TOM0_0N_TOUT17_P00_8_OUT */

1623 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT25_P33_3_OUT; /**< \brief IfxGtm_TOM0_0N_TOUT25_P33_3_OUT */

1624 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT34_P33_12_OUT; /**< \brief IfxGtm_TOM0_0N_TOUT34_P33_12_OUT */

1625 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT51_P21_0_OUT; /**< \brief IfxGtm_TOM0_0N_TOUT51_P21_0_OUT */

1626 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT61_P20_3_OUT; /**< \brief IfxGtm_TOM0_0N_TOUT61_P20_3_OUT */

1627 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT72_P15_1_OUT; /**< \brief IfxGtm_TOM0_0N_TOUT72_P15_1_OUT */

1628 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT7_P02_7_OUT; /**< \brief IfxGtm_TOM0_0N_TOUT7_P02_7_OUT */

1629 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT91_P13_0_OUT; /**< \brief IfxGtm_TOM0_0N_TOUT91_P13_0_OUT */

1630 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT9_P00_0_OUT; /**< \brief IfxGtm_TOM0_0N_TOUT9_P00_0_OUT */

1631 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT0_P02_0_OUT; /**< \brief IfxGtm_TOM0_0_TOUT0_P02_0_OUT */

1632 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT109_P10_7_OUT; /**< \brief IfxGtm_TOM0_0_TOUT109_P10_7_OUT */

1633 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT151_P02_12_OUT; /**< \brief IfxGtm_TOM0_0_TOUT151_P02_12_OUT */

1634 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT18_P00_9_OUT; /**< \brief IfxGtm_TOM0_0_TOUT18_P00_9_OUT */

1635 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT26_P33_4_OUT; /**< \brief IfxGtm_TOM0_0_TOUT26_P33_4_OUT */

1636 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT32_P33_10_OUT; /**< \brief IfxGtm_TOM0_0_TOUT32_P33_10_OUT */

1637 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT53_P21_2_OUT; /**< \brief IfxGtm_TOM0_0_TOUT53_P21_2_OUT */

1638 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT76_P15_5_OUT; /**< \brief IfxGtm_TOM0_0_TOUT76_P15_5_OUT */

1639 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT77_P15_6_OUT; /**< \brief IfxGtm_TOM0_0_TOUT77_P15_6_OUT */

1640 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT85_P14_5_OUT; /**< \brief IfxGtm_TOM0_0_TOUT85_P14_5_OUT */

1641 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT87_P14_7_OUT; /**< \brief IfxGtm_TOM0_0_TOUT87_P14_7_OUT */

1642 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT12_P00_3_OUT; /**< \brief IfxGtm_TOM0_10_TOUT12_P00_3_OUT */

1643 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT2_P02_2_OUT; /**< \brief IfxGtm_TOM0_10_TOUT2_P02_2_OUT */

1644 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT41_P23_0_OUT; /**< \brief IfxGtm_TOM0_10_TOUT41_P23_0_OUT */

1645 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT46_P23_5_OUT; /**< \brief IfxGtm_TOM0_10_TOUT46_P23_5_OUT */

1646 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT96_P11_3_OUT; /**< \brief IfxGtm_TOM0_10_TOUT96_P11_3_OUT */

1647 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT13_P00_4_OUT; /**< \brief IfxGtm_TOM0_11_TOUT13_P00_4_OUT */

1648 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT3_P02_3_OUT; /**< \brief IfxGtm_TOM0_11_TOUT3_P02_3_OUT */

1649 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT43_P23_2_OUT; /**< \brief IfxGtm_TOM0_11_TOUT43_P23_2_OUT */

1650 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT49_P22_2_OUT; /**< \brief IfxGtm_TOM0_11_TOUT49_P22_2_OUT */

1651 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT97_P11_6_OUT; /**< \brief IfxGtm_TOM0_11_TOUT97_P11_6_OUT */

1652 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT14_P00_5_OUT; /**< \brief IfxGtm_TOM0_12_TOUT14_P00_5_OUT */

1653 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT44_P23_3_OUT; /**< \brief IfxGtm_TOM0_12_TOUT44_P23_3_OUT */

1654 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT4_P02_4_OUT; /**< \brief IfxGtm_TOM0_12_TOUT4_P02_4_OUT */

1655 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT50_P22_3_OUT; /**< \brief IfxGtm_TOM0_12_TOUT50_P22_3_OUT */

1656 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT98_P11_9_OUT; /**< \brief IfxGtm_TOM0_12_TOUT98_P11_9_OUT */

1657 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT15_P00_6_OUT; /**< \brief IfxGtm_TOM0_13_TOUT15_P00_6_OUT */

1658 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT5_P02_5_OUT; /**< \brief IfxGtm_TOM0_13_TOUT5_P02_5_OUT */

1659 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT99_P11_10_OUT; /**< \brief IfxGtm_TOM0_13_TOUT99_P11_10_OUT */

1660 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT100_P11_11_OUT; /**< \brief IfxGtm_TOM0_14_TOUT100_P11_11_OUT */

1661 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT16_P00_7_OUT; /**< \brief IfxGtm_TOM0_14_TOUT16_P00_7_OUT */

1662 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT6_P02_6_OUT; /**< \brief IfxGtm_TOM0_14_TOUT6_P02_6_OUT */

1663 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT101_P11_12_OUT; /**< \brief IfxGtm_TOM0_15_TOUT101_P11_12_OUT */

1664 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT17_P00_8_OUT; /**< \brief IfxGtm_TOM0_15_TOUT17_P00_8_OUT */

1665 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT42_P23_1_OUT; /**< \brief IfxGtm_TOM0_15_TOUT42_P23_1_OUT */

1666 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT7_P02_7_OUT; /**< \brief IfxGtm_TOM0_15_TOUT7_P02_7_OUT */

1667 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT107_P10_5_OUT; /**< \brief IfxGtm_TOM0_1N_TOUT107_P10_5_OUT */

1668 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT10_P00_1_OUT; /**< \brief IfxGtm_TOM0_1N_TOUT10_P00_1_OUT */

1669 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT14_P00_5_OUT; /**< \brief IfxGtm_TOM0_1N_TOUT14_P00_5_OUT */

1670 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT22_P33_0_OUT; /**< \brief IfxGtm_TOM0_1N_TOUT22_P33_0_OUT */

1671 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT30_P33_8_OUT; /**< \brief IfxGtm_TOM0_1N_TOUT30_P33_8_OUT */

1672 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT35_P33_13_OUT; /**< \brief IfxGtm_TOM0_1N_TOUT35_P33_13_OUT */

1673 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT39_P32_3_OUT; /**< \brief IfxGtm_TOM0_1N_TOUT39_P32_3_OUT */

1674 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT4_P02_4_OUT; /**< \brief IfxGtm_TOM0_1N_TOUT4_P02_4_OUT */

1675 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT52_P21_1_OUT; /**< \brief IfxGtm_TOM0_1N_TOUT52_P21_1_OUT */

1676 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT57_P21_6_OUT; /**< \brief IfxGtm_TOM0_1N_TOUT57_P21_6_OUT */

1677 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT73_P15_2_OUT; /**< \brief IfxGtm_TOM0_1N_TOUT73_P15_2_OUT */

1678 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT90_P14_10_OUT; /**< \brief IfxGtm_TOM0_1N_TOUT90_P14_10_OUT */

1679 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT92_P13_1_OUT; /**< \brief IfxGtm_TOM0_1N_TOUT92_P13_1_OUT */

1680 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT103_P10_1_OUT; /**< \brief IfxGtm_TOM0_1_TOUT103_P10_1_OUT */

1681 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT116_P02_9_OUT; /**< \brief IfxGtm_TOM0_1_TOUT116_P02_9_OUT */

1682 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT19_P00_10_OUT; /**< \brief IfxGtm_TOM0_1_TOUT19_P00_10_OUT */

1683 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT1_P02_1_OUT; /**< \brief IfxGtm_TOM0_1_TOUT1_P02_1_OUT */

1684 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT27_P33_5_OUT; /**< \brief IfxGtm_TOM0_1_TOUT27_P33_5_OUT */

1685 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT31_P33_9_OUT; /**< \brief IfxGtm_TOM0_1_TOUT31_P33_9_OUT */

1686 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT54_P21_3_OUT; /**< \brief IfxGtm_TOM0_1_TOUT54_P21_3_OUT */

1687 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT78_P15_7_OUT; /**< \brief IfxGtm_TOM0_1_TOUT78_P15_7_OUT */

1688 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT86_P14_6_OUT; /**< \brief IfxGtm_TOM0_1_TOUT86_P14_6_OUT */

1689 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT108_P10_6_OUT; /**< \brief IfxGtm_TOM0_2N_TOUT108_P10_6_OUT */

1690 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT11_P00_2_OUT; /**< \brief IfxGtm_TOM0_2N_TOUT11_P00_2_OUT */

1691 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT143_P33_14_OUT; /**< \brief IfxGtm_TOM0_2N_TOUT143_P33_14_OUT */

1692 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT15_P00_6_OUT; /**< \brief IfxGtm_TOM0_2N_TOUT15_P00_6_OUT */

1693 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT23_P33_1_OUT; /**< \brief IfxGtm_TOM0_2N_TOUT23_P33_1_OUT */

1694 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT40_P32_4_OUT; /**< \brief IfxGtm_TOM0_2N_TOUT40_P32_4_OUT */

1695 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT58_P21_7_OUT; /**< \brief IfxGtm_TOM0_2N_TOUT58_P21_7_OUT */

1696 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT5_P02_5_OUT; /**< \brief IfxGtm_TOM0_2N_TOUT5_P02_5_OUT */

1697 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT74_P15_3_OUT; /**< \brief IfxGtm_TOM0_2N_TOUT74_P15_3_OUT */

1698 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT93_P13_2_OUT; /**< \brief IfxGtm_TOM0_2N_TOUT93_P13_2_OUT */

1699 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT104_P10_2_OUT; /**< \brief IfxGtm_TOM0_2_TOUT104_P10_2_OUT */

1700 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT107_P10_5_OUT; /**< \brief IfxGtm_TOM0_2_TOUT107_P10_5_OUT */

1701 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT117_P02_10_OUT; /**< \brief IfxGtm_TOM0_2_TOUT117_P02_10_OUT */

1702 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT20_P00_11_OUT; /**< \brief IfxGtm_TOM0_2_TOUT20_P00_11_OUT */

1703 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT28_P33_6_OUT; /**< \brief IfxGtm_TOM0_2_TOUT28_P33_6_OUT */

1704 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT2_P02_2_OUT; /**< \brief IfxGtm_TOM0_2_TOUT2_P02_2_OUT */

1705 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT33_P33_11_OUT; /**< \brief IfxGtm_TOM0_2_TOUT33_P33_11_OUT */

1706 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT55_P21_4_OUT; /**< \brief IfxGtm_TOM0_2_TOUT55_P21_4_OUT */

1707 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT79_P15_8_OUT; /**< \brief IfxGtm_TOM0_2_TOUT79_P15_8_OUT */

1708 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT88_P14_8_OUT; /**< \brief IfxGtm_TOM0_2_TOUT88_P14_8_OUT */

1709 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT109_P10_7_OUT; /**< \brief IfxGtm_TOM0_3N_TOUT109_P10_7_OUT */

1710 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT12_P00_3_OUT; /**< \brief IfxGtm_TOM0_3N_TOUT12_P00_3_OUT */

1711 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT144_P33_15_OUT; /**< \brief IfxGtm_TOM0_3N_TOUT144_P33_15_OUT */

1712 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT16_P00_7_OUT; /**< \brief IfxGtm_TOM0_3N_TOUT16_P00_7_OUT */

1713 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT24_P33_2_OUT; /**< \brief IfxGtm_TOM0_3N_TOUT24_P33_2_OUT */

1714 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT42_P23_1_OUT; /**< \brief IfxGtm_TOM0_3N_TOUT42_P23_1_OUT */

1715 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT59_P20_0_OUT; /**< \brief IfxGtm_TOM0_3N_TOUT59_P20_0_OUT */

1716 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT60_P20_1_OUT; /**< \brief IfxGtm_TOM0_3N_TOUT60_P20_1_OUT */

1717 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT6_P02_6_OUT; /**< \brief IfxGtm_TOM0_3N_TOUT6_P02_6_OUT */

1718 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT75_P15_4_OUT; /**< \brief IfxGtm_TOM0_3N_TOUT75_P15_4_OUT */

1719 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT94_P13_3_OUT; /**< \brief IfxGtm_TOM0_3N_TOUT94_P13_3_OUT */

1720 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT105_P10_3_OUT; /**< \brief IfxGtm_TOM0_3_TOUT105_P10_3_OUT */

1721 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT108_P10_6_OUT; /**< \brief IfxGtm_TOM0_3_TOUT108_P10_6_OUT */

1722 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT118_P02_11_OUT; /**< \brief IfxGtm_TOM0_3_TOUT118_P02_11_OUT */

1723 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT21_P00_12_OUT; /**< \brief IfxGtm_TOM0_3_TOUT21_P00_12_OUT */

1724 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT29_P33_7_OUT; /**< \brief IfxGtm_TOM0_3_TOUT29_P33_7_OUT */

1725 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT38_P32_2_OUT; /**< \brief IfxGtm_TOM0_3_TOUT38_P32_2_OUT */

1726 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT3_P02_3_OUT; /**< \brief IfxGtm_TOM0_3_TOUT3_P02_3_OUT */

1727 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT56_P21_5_OUT; /**< \brief IfxGtm_TOM0_3_TOUT56_P21_5_OUT */

1728 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT71_P15_0_OUT; /**< \brief IfxGtm_TOM0_3_TOUT71_P15_0_OUT */

1729 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT80_P14_0_OUT; /**< \brief IfxGtm_TOM0_3_TOUT80_P14_0_OUT */

1730 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT89_P14_9_OUT; /**< \brief IfxGtm_TOM0_3_TOUT89_P14_9_OUT */

1731 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT10_P00_1_OUT; /**< \brief IfxGtm_TOM0_4N_TOUT10_P00_1_OUT */

1732 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT143_P33_14_OUT; /**< \brief IfxGtm_TOM0_4N_TOUT143_P33_14_OUT */

1733 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT147_P34_2_OUT; /**< \brief IfxGtm_TOM0_4N_TOUT147_P34_2_OUT */

1734 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT1_P02_1_OUT; /**< \brief IfxGtm_TOM0_4N_TOUT1_P02_1_OUT */

1735 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT29_P33_7_OUT; /**< \brief IfxGtm_TOM0_4N_TOUT29_P33_7_OUT */

1736 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT36_P32_0_OUT; /**< \brief IfxGtm_TOM0_4N_TOUT36_P32_0_OUT */

1737 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT54_P21_3_OUT; /**< \brief IfxGtm_TOM0_4N_TOUT54_P21_3_OUT */

1738 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT56_P21_5_OUT; /**< \brief IfxGtm_TOM0_4N_TOUT56_P21_5_OUT */

1739 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT65_P20_9_OUT; /**< \brief IfxGtm_TOM0_4N_TOUT65_P20_9_OUT */

1740 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT73_P15_2_OUT; /**< \brief IfxGtm_TOM0_4N_TOUT73_P15_2_OUT */

1741 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT89_P14_9_OUT; /**< \brief IfxGtm_TOM0_4N_TOUT89_P14_9_OUT */

1742 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT8_P02_8_OUT; /**< \brief IfxGtm_TOM0_4N_TOUT8_P02_8_OUT */

1743 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT95_P11_2_OUT; /**< \brief IfxGtm_TOM0_4N_TOUT95_P11_2_OUT */

1744 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT96_P11_3_OUT; /**< \brief IfxGtm_TOM0_4N_TOUT96_P11_3_OUT */

1745 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT0_P02_0_OUT; /**< \brief IfxGtm_TOM0_4_TOUT0_P02_0_OUT */

1746 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT102_P10_0_OUT; /**< \brief IfxGtm_TOM0_4_TOUT102_P10_0_OUT */

1747 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT124_P11_8_OUT; /**< \brief IfxGtm_TOM0_4_TOUT124_P11_8_OUT */

1748 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT22_P33_0_OUT; /**< \brief IfxGtm_TOM0_4_TOUT22_P33_0_OUT */

1749 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT30_P33_8_OUT; /**< \brief IfxGtm_TOM0_4_TOUT30_P33_8_OUT */

1750 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT37_P32_1_OUT; /**< \brief IfxGtm_TOM0_4_TOUT37_P32_1_OUT */

1751 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT39_P32_3_OUT; /**< \brief IfxGtm_TOM0_4_TOUT39_P32_3_OUT */

1752 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT53_P21_2_OUT; /**< \brief IfxGtm_TOM0_4_TOUT53_P21_2_OUT */

1753 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT57_P21_6_OUT; /**< \brief IfxGtm_TOM0_4_TOUT57_P21_6_OUT */

1754 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT64_P20_8_OUT; /**< \brief IfxGtm_TOM0_4_TOUT64_P20_8_OUT */

1755 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT72_P15_1_OUT; /**< \brief IfxGtm_TOM0_4_TOUT72_P15_1_OUT */

1756 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT81_P14_1_OUT; /**< \brief IfxGtm_TOM0_4_TOUT81_P14_1_OUT */

1757 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT90_P14_10_OUT; /**< \brief IfxGtm_TOM0_4_TOUT90_P14_10_OUT */

1758 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT94_P13_3_OUT; /**< \brief IfxGtm_TOM0_4_TOUT94_P13_3_OUT */

1759 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT9_P00_0_OUT; /**< \brief IfxGtm_TOM0_4_TOUT9_P00_0_OUT */

1760 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT121_P11_4_OUT; /**< \brief IfxGtm_TOM0_5N_TOUT121_P11_4_OUT */

1761 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT12_P00_3_OUT; /**< \brief IfxGtm_TOM0_5N_TOUT12_P00_3_OUT */

1762 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT144_P33_15_OUT; /**< \brief IfxGtm_TOM0_5N_TOUT144_P33_15_OUT */

1763 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT148_P34_3_OUT; /**< \brief IfxGtm_TOM0_5N_TOUT148_P34_3_OUT */

1764 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT26_P33_4_OUT; /**< \brief IfxGtm_TOM0_5N_TOUT26_P33_4_OUT */

1765 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT28_P33_6_OUT; /**< \brief IfxGtm_TOM0_5N_TOUT28_P33_6_OUT */

1766 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT32_P33_10_OUT; /**< \brief IfxGtm_TOM0_5N_TOUT32_P33_10_OUT */

1767 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT37_P32_1_OUT; /**< \brief IfxGtm_TOM0_5N_TOUT37_P32_1_OUT */

1768 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT3_P02_3_OUT; /**< \brief IfxGtm_TOM0_5N_TOUT3_P02_3_OUT */

1769 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT53_P21_2_OUT; /**< \brief IfxGtm_TOM0_5N_TOUT53_P21_2_OUT */

1770 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT56_P21_5_OUT; /**< \brief IfxGtm_TOM0_5N_TOUT56_P21_5_OUT */

1771 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT67_P20_11_OUT; /**< \brief IfxGtm_TOM0_5N_TOUT67_P20_11_OUT */

1772 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT76_P15_5_OUT; /**< \brief IfxGtm_TOM0_5N_TOUT76_P15_5_OUT */

1773 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT77_P15_6_OUT; /**< \brief IfxGtm_TOM0_5N_TOUT77_P15_6_OUT */

1774 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT87_P14_7_OUT; /**< \brief IfxGtm_TOM0_5N_TOUT87_P14_7_OUT */

1775 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT97_P11_6_OUT; /**< \brief IfxGtm_TOM0_5N_TOUT97_P11_6_OUT */

1776 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT110_P10_8_OUT; /**< \brief IfxGtm_TOM0_5_TOUT110_P10_8_OUT */

1777 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT11_P00_2_OUT; /**< \brief IfxGtm_TOM0_5_TOUT11_P00_2_OUT */

1778 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT128_P12_0_OUT; /**< \brief IfxGtm_TOM0_5_TOUT128_P12_0_OUT */

1779 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT23_P33_1_OUT; /**< \brief IfxGtm_TOM0_5_TOUT23_P33_1_OUT */

1780 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT27_P33_5_OUT; /**< \brief IfxGtm_TOM0_5_TOUT27_P33_5_OUT */

1781 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT2_P02_2_OUT; /**< \brief IfxGtm_TOM0_5_TOUT2_P02_2_OUT */

1782 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT40_P32_4_OUT; /**< \brief IfxGtm_TOM0_5_TOUT40_P32_4_OUT */

1783 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT55_P21_4_OUT; /**< \brief IfxGtm_TOM0_5_TOUT55_P21_4_OUT */

1784 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT58_P21_7_OUT; /**< \brief IfxGtm_TOM0_5_TOUT58_P21_7_OUT */

1785 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT66_P20_10_OUT; /**< \brief IfxGtm_TOM0_5_TOUT66_P20_10_OUT */

1786 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT74_P15_3_OUT; /**< \brief IfxGtm_TOM0_5_TOUT74_P15_3_OUT */

1787 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT82_P14_2_OUT; /**< \brief IfxGtm_TOM0_5_TOUT82_P14_2_OUT */

1788 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT91_P13_0_OUT; /**< \brief IfxGtm_TOM0_5_TOUT91_P13_0_OUT */

1789 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT96_P11_3_OUT; /**< \brief IfxGtm_TOM0_5_TOUT96_P11_3_OUT */

1790 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT149_P34_4_OUT; /**< \brief IfxGtm_TOM0_6N_TOUT149_P34_4_OUT */

1791 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT14_P00_5_OUT; /**< \brief IfxGtm_TOM0_6N_TOUT14_P00_5_OUT */

1792 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT27_P33_5_OUT; /**< \brief IfxGtm_TOM0_6N_TOUT27_P33_5_OUT */

1793 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT30_P33_8_OUT; /**< \brief IfxGtm_TOM0_6N_TOUT30_P33_8_OUT */

1794 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT31_P33_9_OUT; /**< \brief IfxGtm_TOM0_6N_TOUT31_P33_9_OUT */

1795 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT38_P32_2_OUT; /**< \brief IfxGtm_TOM0_6N_TOUT38_P32_2_OUT */

1796 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT40_P32_4_OUT; /**< \brief IfxGtm_TOM0_6N_TOUT40_P32_4_OUT */

1797 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT49_P22_2_OUT; /**< \brief IfxGtm_TOM0_6N_TOUT49_P22_2_OUT */

1798 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT54_P21_3_OUT; /**< \brief IfxGtm_TOM0_6N_TOUT54_P21_3_OUT */

1799 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT5_P02_5_OUT; /**< \brief IfxGtm_TOM0_6N_TOUT5_P02_5_OUT */

1800 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT69_P20_13_OUT; /**< \brief IfxGtm_TOM0_6N_TOUT69_P20_13_OUT */

1801 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT78_P15_7_OUT; /**< \brief IfxGtm_TOM0_6N_TOUT78_P15_7_OUT */

1802 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT82_P14_2_OUT; /**< \brief IfxGtm_TOM0_6N_TOUT82_P14_2_OUT */

1803 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT86_P14_6_OUT; /**< \brief IfxGtm_TOM0_6N_TOUT86_P14_6_OUT */

1804 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT91_P13_0_OUT; /**< \brief IfxGtm_TOM0_6N_TOUT91_P13_0_OUT */

1805 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT97_P11_6_OUT; /**< \brief IfxGtm_TOM0_6N_TOUT97_P11_6_OUT */

1806 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT99_P11_10_OUT; /**< \brief IfxGtm_TOM0_6N_TOUT99_P11_10_OUT */

1807 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT106_P10_4_OUT; /**< \brief IfxGtm_TOM0_6_TOUT106_P10_4_OUT */

1808 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT129_P12_1_OUT; /**< \brief IfxGtm_TOM0_6_TOUT129_P12_1_OUT */

1809 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT13_P00_4_OUT; /**< \brief IfxGtm_TOM0_6_TOUT13_P00_4_OUT */

1810 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT24_P33_2_OUT; /**< \brief IfxGtm_TOM0_6_TOUT24_P33_2_OUT */

1811 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT29_P33_7_OUT; /**< \brief IfxGtm_TOM0_6_TOUT29_P33_7_OUT */

1812 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT42_P23_1_OUT; /**< \brief IfxGtm_TOM0_6_TOUT42_P23_1_OUT */

1813 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT48_P22_1_OUT; /**< \brief IfxGtm_TOM0_6_TOUT48_P22_1_OUT */

1814 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT4_P02_4_OUT; /**< \brief IfxGtm_TOM0_6_TOUT4_P02_4_OUT */

1815 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT59_P20_0_OUT; /**< \brief IfxGtm_TOM0_6_TOUT59_P20_0_OUT */

1816 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT68_P20_12_OUT; /**< \brief IfxGtm_TOM0_6_TOUT68_P20_12_OUT */

1817 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT80_P14_0_OUT; /**< \brief IfxGtm_TOM0_6_TOUT80_P14_0_OUT */

1818 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT83_P14_3_OUT; /**< \brief IfxGtm_TOM0_6_TOUT83_P14_3_OUT */

1819 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT92_P13_1_OUT; /**< \brief IfxGtm_TOM0_6_TOUT92_P13_1_OUT */

1820 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT98_P11_9_OUT; /**< \brief IfxGtm_TOM0_6_TOUT98_P11_9_OUT */

1821 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT100_P11_11_OUT; /**< \brief IfxGtm_TOM0_7N_TOUT100_P11_11_OUT */

1822 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT123_P11_7_OUT; /**< \brief IfxGtm_TOM0_7N_TOUT123_P11_7_OUT */

1823 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT130_P22_4_OUT; /**< \brief IfxGtm_TOM0_7N_TOUT130_P22_4_OUT */

1824 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT150_P34_5_OUT; /**< \brief IfxGtm_TOM0_7N_TOUT150_P34_5_OUT */

1825 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT16_P00_7_OUT; /**< \brief IfxGtm_TOM0_7N_TOUT16_P00_7_OUT */

1826 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT28_P33_6_OUT; /**< \brief IfxGtm_TOM0_7N_TOUT28_P33_6_OUT */

1827 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT32_P33_10_OUT; /**< \brief IfxGtm_TOM0_7N_TOUT32_P33_10_OUT */

1828 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT33_P33_11_OUT; /**< \brief IfxGtm_TOM0_7N_TOUT33_P33_11_OUT */

1829 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT39_P32_3_OUT; /**< \brief IfxGtm_TOM0_7N_TOUT39_P32_3_OUT */

1830 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT42_P23_1_OUT; /**< \brief IfxGtm_TOM0_7N_TOUT42_P23_1_OUT */

1831 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT55_P21_4_OUT; /**< \brief IfxGtm_TOM0_7N_TOUT55_P21_4_OUT */

1832 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT71_P15_0_OUT; /**< \brief IfxGtm_TOM0_7N_TOUT71_P15_0_OUT */

1833 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT79_P15_8_OUT; /**< \brief IfxGtm_TOM0_7N_TOUT79_P15_8_OUT */

1834 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT7_P02_7_OUT; /**< \brief IfxGtm_TOM0_7N_TOUT7_P02_7_OUT */

1835 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT84_P14_4_OUT; /**< \brief IfxGtm_TOM0_7N_TOUT84_P14_4_OUT */

1836 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT88_P14_8_OUT; /**< \brief IfxGtm_TOM0_7N_TOUT88_P14_8_OUT */

1837 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT93_P13_2_OUT; /**< \brief IfxGtm_TOM0_7N_TOUT93_P13_2_OUT */

1838 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT101_P11_12_OUT; /**< \brief IfxGtm_TOM0_7_TOUT101_P11_12_OUT */

1839 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT119_P11_0_OUT; /**< \brief IfxGtm_TOM0_7_TOUT119_P11_0_OUT */

1840 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT15_P00_6_OUT; /**< \brief IfxGtm_TOM0_7_TOUT15_P00_6_OUT */

1841 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT25_P33_3_OUT; /**< \brief IfxGtm_TOM0_7_TOUT25_P33_3_OUT */

1842 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT31_P33_9_OUT; /**< \brief IfxGtm_TOM0_7_TOUT31_P33_9_OUT */

1843 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT45_P23_4_OUT; /**< \brief IfxGtm_TOM0_7_TOUT45_P23_4_OUT */

1844 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT50_P22_3_OUT; /**< \brief IfxGtm_TOM0_7_TOUT50_P22_3_OUT */

1845 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT6_P02_6_OUT; /**< \brief IfxGtm_TOM0_7_TOUT6_P02_6_OUT */

1846 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT70_P20_14_OUT; /**< \brief IfxGtm_TOM0_7_TOUT70_P20_14_OUT */

1847 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT81_P14_1_OUT; /**< \brief IfxGtm_TOM0_7_TOUT81_P14_1_OUT */

1848 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT84_P14_4_OUT; /**< \brief IfxGtm_TOM0_7_TOUT84_P14_4_OUT */

1849 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT92_P13_1_OUT; /**< \brief IfxGtm_TOM0_7_TOUT92_P13_1_OUT */

1850 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT93_P13_2_OUT; /**< \brief IfxGtm_TOM0_7_TOUT93_P13_2_OUT */

1851 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT0_P02_0_OUT; /**< \brief IfxGtm_TOM0_8_TOUT0_P02_0_OUT */

1852 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT48_P22_1_OUT; /**< \brief IfxGtm_TOM0_8_TOUT48_P22_1_OUT */

1853 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT51_P21_0_OUT; /**< \brief IfxGtm_TOM0_8_TOUT51_P21_0_OUT */

1854 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT8_P02_8_OUT; /**< \brief IfxGtm_TOM0_8_TOUT8_P02_8_OUT */

1855 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT94_P13_3_OUT; /**< \brief IfxGtm_TOM0_8_TOUT94_P13_3_OUT */

1856 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT95_P11_2_OUT; /**< \brief IfxGtm_TOM0_8_TOUT95_P11_2_OUT */

1857 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT9_P00_0_OUT; /**< \brief IfxGtm_TOM0_8_TOUT9_P00_0_OUT */

1858 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT10_P00_1_OUT; /**< \brief IfxGtm_TOM0_9_TOUT10_P00_1_OUT */

1859 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT11_P00_2_OUT; /**< \brief IfxGtm_TOM0_9_TOUT11_P00_2_OUT */

1860 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT1_P02_1_OUT; /**< \brief IfxGtm_TOM0_9_TOUT1_P02_1_OUT */

1861 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT47_P22_0_OUT; /**< \brief IfxGtm_TOM0_9_TOUT47_P22_0_OUT */

1862 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT52_P21_1_OUT; /**< \brief IfxGtm_TOM0_9_TOUT52_P21_1_OUT */

1863 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0N_TOUT17_P00_8_OUT; /**< \brief IfxGtm_TOM1_0N_TOUT17_P00_8_OUT */

1864 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0N_TOUT25_P33_3_OUT; /**< \brief IfxGtm_TOM1_0N_TOUT25_P33_3_OUT */

1865 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0N_TOUT34_P33_12_OUT; /**< \brief IfxGtm_TOM1_0N_TOUT34_P33_12_OUT */

1866 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0N_TOUT75_P15_4_OUT; /**< \brief IfxGtm_TOM1_0N_TOUT75_P15_4_OUT */

1867 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0N_TOUT7_P02_7_OUT; /**< \brief IfxGtm_TOM1_0N_TOUT7_P02_7_OUT */

1868 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT0_P02_0_OUT; /**< \brief IfxGtm_TOM1_0_TOUT0_P02_0_OUT */

1869 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT18_P00_9_OUT; /**< \brief IfxGtm_TOM1_0_TOUT18_P00_9_OUT */

1870 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT26_P33_4_OUT; /**< \brief IfxGtm_TOM1_0_TOUT26_P33_4_OUT */

1871 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT32_P33_10_OUT; /**< \brief IfxGtm_TOM1_0_TOUT32_P33_10_OUT */

1872 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT68_P20_12_OUT; /**< \brief IfxGtm_TOM1_0_TOUT68_P20_12_OUT */

1873 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT76_P15_5_OUT; /**< \brief IfxGtm_TOM1_0_TOUT76_P15_5_OUT */

1874 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT77_P15_6_OUT; /**< \brief IfxGtm_TOM1_0_TOUT77_P15_6_OUT */

1875 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT85_P14_5_OUT; /**< \brief IfxGtm_TOM1_0_TOUT85_P14_5_OUT */

1876 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT8_P02_8_OUT; /**< \brief IfxGtm_TOM1_0_TOUT8_P02_8_OUT */

1877 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT9_P00_0_OUT; /**< \brief IfxGtm_TOM1_0_TOUT9_P00_0_OUT */

1878 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT143_P33_14_OUT; /**< \brief IfxGtm_TOM1_10_TOUT143_P33_14_OUT */

1879 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT266_P10_10_OUT; /**< \brief IfxGtm_TOM1_10_TOUT266_P10_10_OUT */

1880 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT2_P02_2_OUT; /**< \brief IfxGtm_TOM1_10_TOUT2_P02_2_OUT */

1881 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT62_P20_6_OUT; /**< \brief IfxGtm_TOM1_10_TOUT62_P20_6_OUT */

1882 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT144_P33_15_OUT; /**< \brief IfxGtm_TOM1_11_TOUT144_P33_15_OUT */

1883 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT267_P10_14_OUT; /**< \brief IfxGtm_TOM1_11_TOUT267_P10_14_OUT */

1884 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT3_P02_3_OUT; /**< \brief IfxGtm_TOM1_11_TOUT3_P02_3_OUT */

1885 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT60_P20_1_OUT; /**< \brief IfxGtm_TOM1_11_TOUT60_P20_1_OUT */

1886 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT63_P20_7_OUT; /**< \brief IfxGtm_TOM1_11_TOUT63_P20_7_OUT */

1887 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT268_P10_13_OUT; /**< \brief IfxGtm_TOM1_12_TOUT268_P10_13_OUT */

1888 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT34_P33_12_OUT; /**< \brief IfxGtm_TOM1_12_TOUT34_P33_12_OUT */

1889 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT4_P02_4_OUT; /**< \brief IfxGtm_TOM1_12_TOUT4_P02_4_OUT */

1890 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT61_P20_3_OUT; /**< \brief IfxGtm_TOM1_12_TOUT61_P20_3_OUT */

1891 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT146_P34_1_OUT; /**< \brief IfxGtm_TOM1_13_TOUT146_P34_1_OUT */

1892 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT269_P10_11_OUT; /**< \brief IfxGtm_TOM1_13_TOUT269_P10_11_OUT */

1893 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT35_P33_13_OUT; /**< \brief IfxGtm_TOM1_13_TOUT35_P33_13_OUT */

1894 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT5_P02_5_OUT; /**< \brief IfxGtm_TOM1_13_TOUT5_P02_5_OUT */

1895 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT65_P20_9_OUT; /**< \brief IfxGtm_TOM1_13_TOUT65_P20_9_OUT */

1896 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT147_P34_2_OUT; /**< \brief IfxGtm_TOM1_14_TOUT147_P34_2_OUT */

1897 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT270_P10_15_OUT; /**< \brief IfxGtm_TOM1_14_TOUT270_P10_15_OUT */

1898 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT36_P32_0_OUT; /**< \brief IfxGtm_TOM1_14_TOUT36_P32_0_OUT */

1899 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT66_P20_10_OUT; /**< \brief IfxGtm_TOM1_14_TOUT66_P20_10_OUT */

1900 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT6_P02_6_OUT; /**< \brief IfxGtm_TOM1_14_TOUT6_P02_6_OUT */

1901 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT148_P34_3_OUT; /**< \brief IfxGtm_TOM1_15_TOUT148_P34_3_OUT */

1902 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT150_P34_5_OUT; /**< \brief IfxGtm_TOM1_15_TOUT150_P34_5_OUT */

1903 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT37_P32_1_OUT; /**< \brief IfxGtm_TOM1_15_TOUT37_P32_1_OUT */

1904 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT67_P20_11_OUT; /**< \brief IfxGtm_TOM1_15_TOUT67_P20_11_OUT */

1905 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT7_P02_7_OUT; /**< \brief IfxGtm_TOM1_15_TOUT7_P02_7_OUT */

1906 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT14_P00_5_OUT; /**< \brief IfxGtm_TOM1_1N_TOUT14_P00_5_OUT */

1907 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT22_P33_0_OUT; /**< \brief IfxGtm_TOM1_1N_TOUT22_P33_0_OUT */

1908 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT245_P15_13_OUT; /**< \brief IfxGtm_TOM1_1N_TOUT245_P15_13_OUT */

1909 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT30_P33_8_OUT; /**< \brief IfxGtm_TOM1_1N_TOUT30_P33_8_OUT */

1910 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT35_P33_13_OUT; /**< \brief IfxGtm_TOM1_1N_TOUT35_P33_13_OUT */

1911 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT39_P32_3_OUT; /**< \brief IfxGtm_TOM1_1N_TOUT39_P32_3_OUT */

1912 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT4_P02_4_OUT; /**< \brief IfxGtm_TOM1_1N_TOUT4_P02_4_OUT */

1913 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT72_P15_1_OUT; /**< \brief IfxGtm_TOM1_1N_TOUT72_P15_1_OUT */

1914 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT10_P00_1_OUT; /**< \brief IfxGtm_TOM1_1_TOUT10_P00_1_OUT */

1915 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT116_P02_9_OUT; /**< \brief IfxGtm_TOM1_1_TOUT116_P02_9_OUT */

1916 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT11_P00_2_OUT; /**< \brief IfxGtm_TOM1_1_TOUT11_P00_2_OUT */

1917 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT19_P00_10_OUT; /**< \brief IfxGtm_TOM1_1_TOUT19_P00_10_OUT */

1918 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT1_P02_1_OUT; /**< \brief IfxGtm_TOM1_1_TOUT1_P02_1_OUT */

1919 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT242_P15_10_OUT; /**< \brief IfxGtm_TOM1_1_TOUT242_P15_10_OUT */

1920 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT27_P33_5_OUT; /**< \brief IfxGtm_TOM1_1_TOUT27_P33_5_OUT */

1921 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT31_P33_9_OUT; /**< \brief IfxGtm_TOM1_1_TOUT31_P33_9_OUT */

1922 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT69_P20_13_OUT; /**< \brief IfxGtm_TOM1_1_TOUT69_P20_13_OUT */

1923 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT78_P15_7_OUT; /**< \brief IfxGtm_TOM1_1_TOUT78_P15_7_OUT */

1924 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT86_P14_6_OUT; /**< \brief IfxGtm_TOM1_1_TOUT86_P14_6_OUT */

1925 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT143_P33_14_OUT; /**< \brief IfxGtm_TOM1_2N_TOUT143_P33_14_OUT */

1926 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT15_P00_6_OUT; /**< \brief IfxGtm_TOM1_2N_TOUT15_P00_6_OUT */

1927 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT23_P33_1_OUT; /**< \brief IfxGtm_TOM1_2N_TOUT23_P33_1_OUT */

1928 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT246_P15_14_OUT; /**< \brief IfxGtm_TOM1_2N_TOUT246_P15_14_OUT */

1929 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT40_P32_4_OUT; /**< \brief IfxGtm_TOM1_2N_TOUT40_P32_4_OUT */

1930 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT41_P23_0_OUT; /**< \brief IfxGtm_TOM1_2N_TOUT41_P23_0_OUT */

1931 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT5_P02_5_OUT; /**< \brief IfxGtm_TOM1_2N_TOUT5_P02_5_OUT */

1932 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT73_P15_2_OUT; /**< \brief IfxGtm_TOM1_2N_TOUT73_P15_2_OUT */

1933 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT117_P02_10_OUT; /**< \brief IfxGtm_TOM1_2_TOUT117_P02_10_OUT */

1934 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT12_P00_3_OUT; /**< \brief IfxGtm_TOM1_2_TOUT12_P00_3_OUT */

1935 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT20_P00_11_OUT; /**< \brief IfxGtm_TOM1_2_TOUT20_P00_11_OUT */

1936 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT243_P15_11_OUT; /**< \brief IfxGtm_TOM1_2_TOUT243_P15_11_OUT */

1937 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT28_P33_6_OUT; /**< \brief IfxGtm_TOM1_2_TOUT28_P33_6_OUT */

1938 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT2_P02_2_OUT; /**< \brief IfxGtm_TOM1_2_TOUT2_P02_2_OUT */

1939 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT33_P33_11_OUT; /**< \brief IfxGtm_TOM1_2_TOUT33_P33_11_OUT */

1940 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT70_P20_14_OUT; /**< \brief IfxGtm_TOM1_2_TOUT70_P20_14_OUT */

1941 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT79_P15_8_OUT; /**< \brief IfxGtm_TOM1_2_TOUT79_P15_8_OUT */

1942 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3N_TOUT144_P33_15_OUT; /**< \brief IfxGtm_TOM1_3N_TOUT144_P33_15_OUT */

1943 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3N_TOUT16_P00_7_OUT; /**< \brief IfxGtm_TOM1_3N_TOUT16_P00_7_OUT */

1944 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3N_TOUT247_P15_15_OUT; /**< \brief IfxGtm_TOM1_3N_TOUT247_P15_15_OUT */

1945 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3N_TOUT24_P33_2_OUT; /**< \brief IfxGtm_TOM1_3N_TOUT24_P33_2_OUT */

1946 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3N_TOUT43_P23_2_OUT; /**< \brief IfxGtm_TOM1_3N_TOUT43_P23_2_OUT */

1947 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3N_TOUT6_P02_6_OUT; /**< \brief IfxGtm_TOM1_3N_TOUT6_P02_6_OUT */

1948 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3N_TOUT74_P15_3_OUT; /**< \brief IfxGtm_TOM1_3N_TOUT74_P15_3_OUT */

1949 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT118_P02_11_OUT; /**< \brief IfxGtm_TOM1_3_TOUT118_P02_11_OUT */

1950 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT13_P00_4_OUT; /**< \brief IfxGtm_TOM1_3_TOUT13_P00_4_OUT */

1951 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT21_P00_12_OUT; /**< \brief IfxGtm_TOM1_3_TOUT21_P00_12_OUT */

1952 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT244_P15_12_OUT; /**< \brief IfxGtm_TOM1_3_TOUT244_P15_12_OUT */

1953 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT29_P33_7_OUT; /**< \brief IfxGtm_TOM1_3_TOUT29_P33_7_OUT */

1954 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT38_P32_2_OUT; /**< \brief IfxGtm_TOM1_3_TOUT38_P32_2_OUT */

1955 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT3_P02_3_OUT; /**< \brief IfxGtm_TOM1_3_TOUT3_P02_3_OUT */

1956 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT71_P15_0_OUT; /**< \brief IfxGtm_TOM1_3_TOUT71_P15_0_OUT */

1957 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT80_P14_0_OUT; /**< \brief IfxGtm_TOM1_3_TOUT80_P14_0_OUT */

1958 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT10_P00_1_OUT; /**< \brief IfxGtm_TOM1_4N_TOUT10_P00_1_OUT */

1959 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT13_P00_4_OUT; /**< \brief IfxGtm_TOM1_4N_TOUT13_P00_4_OUT */

1960 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT143_P33_14_OUT; /**< \brief IfxGtm_TOM1_4N_TOUT143_P33_14_OUT */

1961 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT147_P34_2_OUT; /**< \brief IfxGtm_TOM1_4N_TOUT147_P34_2_OUT */

1962 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT1_P02_1_OUT; /**< \brief IfxGtm_TOM1_4N_TOUT1_P02_1_OUT */

1963 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT21_P00_12_OUT; /**< \brief IfxGtm_TOM1_4N_TOUT21_P00_12_OUT */

1964 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT244_P15_12_OUT; /**< \brief IfxGtm_TOM1_4N_TOUT244_P15_12_OUT */

1965 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT29_P33_7_OUT; /**< \brief IfxGtm_TOM1_4N_TOUT29_P33_7_OUT */

1966 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT36_P32_0_OUT; /**< \brief IfxGtm_TOM1_4N_TOUT36_P32_0_OUT */

1967 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT54_P21_3_OUT; /**< \brief IfxGtm_TOM1_4N_TOUT54_P21_3_OUT */

1968 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT65_P20_9_OUT; /**< \brief IfxGtm_TOM1_4N_TOUT65_P20_9_OUT */

1969 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT71_P15_0_OUT; /**< \brief IfxGtm_TOM1_4N_TOUT71_P15_0_OUT */

1970 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT73_P15_2_OUT; /**< \brief IfxGtm_TOM1_4N_TOUT73_P15_2_OUT */

1971 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT8_P02_8_OUT; /**< \brief IfxGtm_TOM1_4N_TOUT8_P02_8_OUT */

1972 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT95_P11_2_OUT; /**< \brief IfxGtm_TOM1_4N_TOUT95_P11_2_OUT */

1973 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT0_P02_0_OUT; /**< \brief IfxGtm_TOM1_4_TOUT0_P02_0_OUT */

1974 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT124_P11_8_OUT; /**< \brief IfxGtm_TOM1_4_TOUT124_P11_8_OUT */

1975 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT14_P00_5_OUT; /**< \brief IfxGtm_TOM1_4_TOUT14_P00_5_OUT */

1976 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT22_P33_0_OUT; /**< \brief IfxGtm_TOM1_4_TOUT22_P33_0_OUT */

1977 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT245_P15_13_OUT; /**< \brief IfxGtm_TOM1_4_TOUT245_P15_13_OUT */

1978 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT30_P33_8_OUT; /**< \brief IfxGtm_TOM1_4_TOUT30_P33_8_OUT */

1979 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT37_P32_1_OUT; /**< \brief IfxGtm_TOM1_4_TOUT37_P32_1_OUT */

1980 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT39_P32_3_OUT; /**< \brief IfxGtm_TOM1_4_TOUT39_P32_3_OUT */

1981 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT53_P21_2_OUT; /**< \brief IfxGtm_TOM1_4_TOUT53_P21_2_OUT */

1982 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT64_P20_8_OUT; /**< \brief IfxGtm_TOM1_4_TOUT64_P20_8_OUT */

1983 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT72_P15_1_OUT; /**< \brief IfxGtm_TOM1_4_TOUT72_P15_1_OUT */

1984 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT81_P14_1_OUT; /**< \brief IfxGtm_TOM1_4_TOUT81_P14_1_OUT */

1985 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT94_P13_3_OUT; /**< \brief IfxGtm_TOM1_4_TOUT94_P13_3_OUT */

1986 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT9_P00_0_OUT; /**< \brief IfxGtm_TOM1_4_TOUT9_P00_0_OUT */

1987 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT12_P00_3_OUT; /**< \brief IfxGtm_TOM1_5N_TOUT12_P00_3_OUT */

1988 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT144_P33_15_OUT; /**< \brief IfxGtm_TOM1_5N_TOUT144_P33_15_OUT */

1989 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT148_P34_3_OUT; /**< \brief IfxGtm_TOM1_5N_TOUT148_P34_3_OUT */

1990 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT18_P00_9_OUT; /**< \brief IfxGtm_TOM1_5N_TOUT18_P00_9_OUT */

1991 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT26_P33_4_OUT; /**< \brief IfxGtm_TOM1_5N_TOUT26_P33_4_OUT */

1992 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT28_P33_6_OUT; /**< \brief IfxGtm_TOM1_5N_TOUT28_P33_6_OUT */

1993 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT32_P33_10_OUT; /**< \brief IfxGtm_TOM1_5N_TOUT32_P33_10_OUT */

1994 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT37_P32_1_OUT; /**< \brief IfxGtm_TOM1_5N_TOUT37_P32_1_OUT */

1995 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT3_P02_3_OUT; /**< \brief IfxGtm_TOM1_5N_TOUT3_P02_3_OUT */

1996 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT56_P21_5_OUT; /**< \brief IfxGtm_TOM1_5N_TOUT56_P21_5_OUT */

1997 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT67_P20_11_OUT; /**< \brief IfxGtm_TOM1_5N_TOUT67_P20_11_OUT */

1998 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT76_P15_5_OUT; /**< \brief IfxGtm_TOM1_5N_TOUT76_P15_5_OUT */

1999 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT77_P15_6_OUT; /**< \brief IfxGtm_TOM1_5N_TOUT77_P15_6_OUT */

2000 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT97_P11_6_OUT; /**< \brief IfxGtm_TOM1_5N_TOUT97_P11_6_OUT */

2001 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT9_P00_0_OUT; /**< \brief IfxGtm_TOM1_5N_TOUT9_P00_0_OUT */

2002 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT11_P00_2_OUT; /**< \brief IfxGtm_TOM1_5_TOUT11_P00_2_OUT */

2003 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT15_P00_6_OUT; /**< \brief IfxGtm_TOM1_5_TOUT15_P00_6_OUT */

2004 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT23_P33_1_OUT; /**< \brief IfxGtm_TOM1_5_TOUT23_P33_1_OUT */

2005 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT246_P15_14_OUT; /**< \brief IfxGtm_TOM1_5_TOUT246_P15_14_OUT */

2006 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT27_P33_5_OUT; /**< \brief IfxGtm_TOM1_5_TOUT27_P33_5_OUT */

2007 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT2_P02_2_OUT; /**< \brief IfxGtm_TOM1_5_TOUT2_P02_2_OUT */

2008 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT40_P32_4_OUT; /**< \brief IfxGtm_TOM1_5_TOUT40_P32_4_OUT */

2009 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT41_P23_0_OUT; /**< \brief IfxGtm_TOM1_5_TOUT41_P23_0_OUT */

2010 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT55_P21_4_OUT; /**< \brief IfxGtm_TOM1_5_TOUT55_P21_4_OUT */

2011 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT66_P20_10_OUT; /**< \brief IfxGtm_TOM1_5_TOUT66_P20_10_OUT */

2012 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT73_P15_2_OUT; /**< \brief IfxGtm_TOM1_5_TOUT73_P15_2_OUT */

2013 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT74_P15_3_OUT; /**< \brief IfxGtm_TOM1_5_TOUT74_P15_3_OUT */

2014 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT82_P14_2_OUT; /**< \brief IfxGtm_TOM1_5_TOUT82_P14_2_OUT */

2015 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT96_P11_3_OUT; /**< \brief IfxGtm_TOM1_5_TOUT96_P11_3_OUT */

2016 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT10_P00_1_OUT; /**< \brief IfxGtm_TOM1_6N_TOUT10_P00_1_OUT */

2017 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT11_P00_2_OUT; /**< \brief IfxGtm_TOM1_6N_TOUT11_P00_2_OUT */

2018 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT149_P34_4_OUT; /**< \brief IfxGtm_TOM1_6N_TOUT149_P34_4_OUT */

2019 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT14_P00_5_OUT; /**< \brief IfxGtm_TOM1_6N_TOUT14_P00_5_OUT */

2020 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT19_P00_10_OUT; /**< \brief IfxGtm_TOM1_6N_TOUT19_P00_10_OUT */

2021 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT242_P15_10_OUT; /**< \brief IfxGtm_TOM1_6N_TOUT242_P15_10_OUT */

2022 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT27_P33_5_OUT; /**< \brief IfxGtm_TOM1_6N_TOUT27_P33_5_OUT */

2023 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT30_P33_8_OUT; /**< \brief IfxGtm_TOM1_6N_TOUT30_P33_8_OUT */

2024 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT31_P33_9_OUT; /**< \brief IfxGtm_TOM1_6N_TOUT31_P33_9_OUT */

2025 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT38_P32_2_OUT; /**< \brief IfxGtm_TOM1_6N_TOUT38_P32_2_OUT */

2026 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT40_P32_4_OUT; /**< \brief IfxGtm_TOM1_6N_TOUT40_P32_4_OUT */

2027 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT49_P22_2_OUT; /**< \brief IfxGtm_TOM1_6N_TOUT49_P22_2_OUT */

2028 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT5_P02_5_OUT; /**< \brief IfxGtm_TOM1_6N_TOUT5_P02_5_OUT */

2029 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT69_P20_13_OUT; /**< \brief IfxGtm_TOM1_6N_TOUT69_P20_13_OUT */

2030 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT78_P15_7_OUT; /**< \brief IfxGtm_TOM1_6N_TOUT78_P15_7_OUT */

2031 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT82_P14_2_OUT; /**< \brief IfxGtm_TOM1_6N_TOUT82_P14_2_OUT */

2032 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT91_P13_0_OUT; /**< \brief IfxGtm_TOM1_6N_TOUT91_P13_0_OUT */

2033 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT99_P11_10_OUT; /**< \brief IfxGtm_TOM1_6N_TOUT99_P11_10_OUT */

2034 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT13_P00_4_OUT; /**< \brief IfxGtm_TOM1_6_TOUT13_P00_4_OUT */

2035 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT16_P00_7_OUT; /**< \brief IfxGtm_TOM1_6_TOUT16_P00_7_OUT */

2036 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT247_P15_15_OUT; /**< \brief IfxGtm_TOM1_6_TOUT247_P15_15_OUT */

2037 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT24_P33_2_OUT; /**< \brief IfxGtm_TOM1_6_TOUT24_P33_2_OUT */

2038 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT29_P33_7_OUT; /**< \brief IfxGtm_TOM1_6_TOUT29_P33_7_OUT */

2039 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT43_P23_2_OUT; /**< \brief IfxGtm_TOM1_6_TOUT43_P23_2_OUT */

2040 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT48_P22_1_OUT; /**< \brief IfxGtm_TOM1_6_TOUT48_P22_1_OUT */

2041 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT4_P02_4_OUT; /**< \brief IfxGtm_TOM1_6_TOUT4_P02_4_OUT */

2042 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT68_P20_12_OUT; /**< \brief IfxGtm_TOM1_6_TOUT68_P20_12_OUT */

2043 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT74_P15_3_OUT; /**< \brief IfxGtm_TOM1_6_TOUT74_P15_3_OUT */

2044 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT80_P14_0_OUT; /**< \brief IfxGtm_TOM1_6_TOUT80_P14_0_OUT */

2045 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT83_P14_3_OUT; /**< \brief IfxGtm_TOM1_6_TOUT83_P14_3_OUT */

2046 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT98_P11_9_OUT; /**< \brief IfxGtm_TOM1_6_TOUT98_P11_9_OUT */

2047 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT100_P11_11_OUT; /**< \brief IfxGtm_TOM1_7N_TOUT100_P11_11_OUT */

2048 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT12_P00_3_OUT; /**< \brief IfxGtm_TOM1_7N_TOUT12_P00_3_OUT */

2049 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT130_P22_4_OUT; /**< \brief IfxGtm_TOM1_7N_TOUT130_P22_4_OUT */

2050 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT150_P34_5_OUT; /**< \brief IfxGtm_TOM1_7N_TOUT150_P34_5_OUT */

2051 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT16_P00_7_OUT; /**< \brief IfxGtm_TOM1_7N_TOUT16_P00_7_OUT */

2052 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT20_P00_11_OUT; /**< \brief IfxGtm_TOM1_7N_TOUT20_P00_11_OUT */

2053 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT243_P15_11_OUT; /**< \brief IfxGtm_TOM1_7N_TOUT243_P15_11_OUT */

2054 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT28_P33_6_OUT; /**< \brief IfxGtm_TOM1_7N_TOUT28_P33_6_OUT */

2055 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT32_P33_10_OUT; /**< \brief IfxGtm_TOM1_7N_TOUT32_P33_10_OUT */

2056 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT33_P33_11_OUT; /**< \brief IfxGtm_TOM1_7N_TOUT33_P33_11_OUT */

2057 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT39_P32_3_OUT; /**< \brief IfxGtm_TOM1_7N_TOUT39_P32_3_OUT */

2058 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT42_P23_1_OUT; /**< \brief IfxGtm_TOM1_7N_TOUT42_P23_1_OUT */

2059 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT71_P15_0_OUT; /**< \brief IfxGtm_TOM1_7N_TOUT71_P15_0_OUT */

2060 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT79_P15_8_OUT; /**< \brief IfxGtm_TOM1_7N_TOUT79_P15_8_OUT */

2061 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT7_P02_7_OUT; /**< \brief IfxGtm_TOM1_7N_TOUT7_P02_7_OUT */

2062 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT84_P14_4_OUT; /**< \brief IfxGtm_TOM1_7N_TOUT84_P14_4_OUT */

2063 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT93_P13_2_OUT; /**< \brief IfxGtm_TOM1_7N_TOUT93_P13_2_OUT */

2064 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT101_P11_12_OUT; /**< \brief IfxGtm_TOM1_7_TOUT101_P11_12_OUT */

2065 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT15_P00_6_OUT; /**< \brief IfxGtm_TOM1_7_TOUT15_P00_6_OUT */

2066 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT17_P00_8_OUT; /**< \brief IfxGtm_TOM1_7_TOUT17_P00_8_OUT */

2067 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT248_P13_9_OUT; /**< \brief IfxGtm_TOM1_7_TOUT248_P13_9_OUT */

2068 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT25_P33_3_OUT; /**< \brief IfxGtm_TOM1_7_TOUT25_P33_3_OUT */

2069 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT31_P33_9_OUT; /**< \brief IfxGtm_TOM1_7_TOUT31_P33_9_OUT */

2070 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT44_P23_3_OUT; /**< \brief IfxGtm_TOM1_7_TOUT44_P23_3_OUT */

2071 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT45_P23_4_OUT; /**< \brief IfxGtm_TOM1_7_TOUT45_P23_4_OUT */

2072 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT50_P22_3_OUT; /**< \brief IfxGtm_TOM1_7_TOUT50_P22_3_OUT */

2073 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT64_P20_8_OUT; /**< \brief IfxGtm_TOM1_7_TOUT64_P20_8_OUT */

2074 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT6_P02_6_OUT; /**< \brief IfxGtm_TOM1_7_TOUT6_P02_6_OUT */

2075 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT70_P20_14_OUT; /**< \brief IfxGtm_TOM1_7_TOUT70_P20_14_OUT */

2076 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT75_P15_4_OUT; /**< \brief IfxGtm_TOM1_7_TOUT75_P15_4_OUT */

2077 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT81_P14_1_OUT; /**< \brief IfxGtm_TOM1_7_TOUT81_P14_1_OUT */

2078 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT84_P14_4_OUT; /**< \brief IfxGtm_TOM1_7_TOUT84_P14_4_OUT */

2079 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT92_P13_1_OUT; /**< \brief IfxGtm_TOM1_7_TOUT92_P13_1_OUT */

2080 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT0_P02_0_OUT; /**< \brief IfxGtm_TOM1_8_TOUT0_P02_0_OUT */

2081 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT128_P12_0_OUT; /**< \brief IfxGtm_TOM1_8_TOUT128_P12_0_OUT */

2082 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT141_P32_6_OUT; /**< \brief IfxGtm_TOM1_8_TOUT141_P32_6_OUT */

2083 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT249_P13_12_OUT; /**< \brief IfxGtm_TOM1_8_TOUT249_P13_12_OUT */

2084 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT129_P12_1_OUT; /**< \brief IfxGtm_TOM1_9_TOUT129_P12_1_OUT */

2085 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT142_P32_7_OUT; /**< \brief IfxGtm_TOM1_9_TOUT142_P32_7_OUT */

2086 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT1_P02_1_OUT; /**< \brief IfxGtm_TOM1_9_TOUT1_P02_1_OUT */

2087 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT265_P10_9_OUT; /**< \brief IfxGtm_TOM1_9_TOUT265_P10_9_OUT */

2088 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT101_P11_12_OUT; /**< \brief IfxGtm_TOM2_0N_TOUT101_P11_12_OUT */

2089 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT126_P11_14_OUT; /**< \brief IfxGtm_TOM2_0N_TOUT126_P11_14_OUT */

2090 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT264_P13_15_OUT; /**< \brief IfxGtm_TOM2_0N_TOUT264_P13_15_OUT */

2091 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT43_P23_2_OUT; /**< \brief IfxGtm_TOM2_0N_TOUT43_P23_2_OUT */

2092 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT51_P21_0_OUT; /**< \brief IfxGtm_TOM2_0N_TOUT51_P21_0_OUT */

2093 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT61_P20_3_OUT; /**< \brief IfxGtm_TOM2_0N_TOUT61_P20_3_OUT */

2094 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT76_P15_5_OUT; /**< \brief IfxGtm_TOM2_0N_TOUT76_P15_5_OUT */

2095 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT91_P13_0_OUT; /**< \brief IfxGtm_TOM2_0N_TOUT91_P13_0_OUT */

2096 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT119_P11_0_OUT; /**< \brief IfxGtm_TOM2_0_TOUT119_P11_0_OUT */

2097 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT120_P11_1_OUT; /**< \brief IfxGtm_TOM2_0_TOUT120_P11_1_OUT */

2098 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT250_P13_11_OUT; /**< \brief IfxGtm_TOM2_0_TOUT250_P13_11_OUT */

2099 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT48_P22_1_OUT; /**< \brief IfxGtm_TOM2_0_TOUT48_P22_1_OUT */

2100 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT53_P21_2_OUT; /**< \brief IfxGtm_TOM2_0_TOUT53_P21_2_OUT */

2101 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT65_P20_9_OUT; /**< \brief IfxGtm_TOM2_0_TOUT65_P20_9_OUT */

2102 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT87_P14_7_OUT; /**< \brief IfxGtm_TOM2_0_TOUT87_P14_7_OUT */

2103 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT94_P13_3_OUT; /**< \brief IfxGtm_TOM2_0_TOUT94_P13_3_OUT */

2104 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT95_P11_2_OUT; /**< \brief IfxGtm_TOM2_0_TOUT95_P11_2_OUT */

2105 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_10_TOUT104_P10_2_OUT; /**< \brief IfxGtm_TOM2_10_TOUT104_P10_2_OUT */

2106 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_10_TOUT107_P10_5_OUT; /**< \brief IfxGtm_TOM2_10_TOUT107_P10_5_OUT */

2107 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_10_TOUT133_P22_7_OUT; /**< \brief IfxGtm_TOM2_10_TOUT133_P22_7_OUT */

2108 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_10_TOUT260_P14_13_OUT; /**< \brief IfxGtm_TOM2_10_TOUT260_P14_13_OUT */

2109 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_10_TOUT62_P20_6_OUT; /**< \brief IfxGtm_TOM2_10_TOUT62_P20_6_OUT */

2110 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_10_TOUT70_P20_14_OUT; /**< \brief IfxGtm_TOM2_10_TOUT70_P20_14_OUT */

2111 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_11_TOUT105_P10_3_OUT; /**< \brief IfxGtm_TOM2_11_TOUT105_P10_3_OUT */

2112 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_11_TOUT108_P10_6_OUT; /**< \brief IfxGtm_TOM2_11_TOUT108_P10_6_OUT */

2113 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_11_TOUT134_P22_8_OUT; /**< \brief IfxGtm_TOM2_11_TOUT134_P22_8_OUT */

2114 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_11_TOUT261_P14_12_OUT; /**< \brief IfxGtm_TOM2_11_TOUT261_P14_12_OUT */

2115 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_11_TOUT63_P20_7_OUT; /**< \brief IfxGtm_TOM2_11_TOUT63_P20_7_OUT */

2116 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_11_TOUT71_P15_0_OUT; /**< \brief IfxGtm_TOM2_11_TOUT71_P15_0_OUT */

2117 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_12_TOUT102_P10_0_OUT; /**< \brief IfxGtm_TOM2_12_TOUT102_P10_0_OUT */

2118 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_12_TOUT135_P22_9_OUT; /**< \brief IfxGtm_TOM2_12_TOUT135_P22_9_OUT */

2119 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_12_TOUT262_P13_13_OUT; /**< \brief IfxGtm_TOM2_12_TOUT262_P13_13_OUT */

2120 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_12_TOUT34_P33_12_OUT; /**< \brief IfxGtm_TOM2_12_TOUT34_P33_12_OUT */

2121 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_12_TOUT72_P15_1_OUT; /**< \brief IfxGtm_TOM2_12_TOUT72_P15_1_OUT */

2122 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_13_TOUT110_P10_8_OUT; /**< \brief IfxGtm_TOM2_13_TOUT110_P10_8_OUT */

2123 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_13_TOUT136_P22_10_OUT; /**< \brief IfxGtm_TOM2_13_TOUT136_P22_10_OUT */

2124 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_13_TOUT263_P14_15_OUT; /**< \brief IfxGtm_TOM2_13_TOUT263_P14_15_OUT */

2125 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_13_TOUT35_P33_13_OUT; /**< \brief IfxGtm_TOM2_13_TOUT35_P33_13_OUT */

2126 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_13_TOUT65_P20_9_OUT; /**< \brief IfxGtm_TOM2_13_TOUT65_P20_9_OUT */

2127 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_13_TOUT73_P15_2_OUT; /**< \brief IfxGtm_TOM2_13_TOUT73_P15_2_OUT */

2128 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_14_TOUT137_P22_11_OUT; /**< \brief IfxGtm_TOM2_14_TOUT137_P22_11_OUT */

2129 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_14_TOUT264_P13_15_OUT; /**< \brief IfxGtm_TOM2_14_TOUT264_P13_15_OUT */

2130 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_14_TOUT36_P32_0_OUT; /**< \brief IfxGtm_TOM2_14_TOUT36_P32_0_OUT */

2131 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_14_TOUT66_P20_10_OUT; /**< \brief IfxGtm_TOM2_14_TOUT66_P20_10_OUT */

2132 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_14_TOUT74_P15_3_OUT; /**< \brief IfxGtm_TOM2_14_TOUT74_P15_3_OUT */

2133 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_15_TOUT149_P34_4_OUT; /**< \brief IfxGtm_TOM2_15_TOUT149_P34_4_OUT */

2134 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_15_TOUT37_P32_1_OUT; /**< \brief IfxGtm_TOM2_15_TOUT37_P32_1_OUT */

2135 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_15_TOUT67_P20_11_OUT; /**< \brief IfxGtm_TOM2_15_TOUT67_P20_11_OUT */

2136 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_15_TOUT75_P15_4_OUT; /**< \brief IfxGtm_TOM2_15_TOUT75_P15_4_OUT */

2137 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT123_P11_7_OUT; /**< \brief IfxGtm_TOM2_1N_TOUT123_P11_7_OUT */

2138 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT124_P11_8_OUT; /**< \brief IfxGtm_TOM2_1N_TOUT124_P11_8_OUT */

2139 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT254_P13_5_OUT; /**< \brief IfxGtm_TOM2_1N_TOUT254_P13_5_OUT */

2140 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT44_P23_3_OUT; /**< \brief IfxGtm_TOM2_1N_TOUT44_P23_3_OUT */

2141 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT50_P22_3_OUT; /**< \brief IfxGtm_TOM2_1N_TOUT50_P22_3_OUT */

2142 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT52_P21_1_OUT; /**< \brief IfxGtm_TOM2_1N_TOUT52_P21_1_OUT */

2143 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT57_P21_6_OUT; /**< \brief IfxGtm_TOM2_1N_TOUT57_P21_6_OUT */

2144 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT61_P20_3_OUT; /**< \brief IfxGtm_TOM2_1N_TOUT61_P20_3_OUT */

2145 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT79_P15_8_OUT; /**< \brief IfxGtm_TOM2_1N_TOUT79_P15_8_OUT */

2146 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT90_P14_10_OUT; /**< \brief IfxGtm_TOM2_1N_TOUT90_P14_10_OUT */

2147 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT92_P13_1_OUT; /**< \brief IfxGtm_TOM2_1N_TOUT92_P13_1_OUT */

2148 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT98_P11_9_OUT; /**< \brief IfxGtm_TOM2_1N_TOUT98_P11_9_OUT */

2149 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1_TOUT120_P11_1_OUT; /**< \brief IfxGtm_TOM2_1_TOUT120_P11_1_OUT */

2150 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1_TOUT127_P11_15_OUT; /**< \brief IfxGtm_TOM2_1_TOUT127_P11_15_OUT */

2151 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1_TOUT251_P13_10_OUT; /**< \brief IfxGtm_TOM2_1_TOUT251_P13_10_OUT */

2152 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1_TOUT47_P22_0_OUT; /**< \brief IfxGtm_TOM2_1_TOUT47_P22_0_OUT */

2153 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1_TOUT54_P21_3_OUT; /**< \brief IfxGtm_TOM2_1_TOUT54_P21_3_OUT */

2154 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1_TOUT64_P20_8_OUT; /**< \brief IfxGtm_TOM2_1_TOUT64_P20_8_OUT */

2155 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1_TOUT95_P11_2_OUT; /**< \brief IfxGtm_TOM2_1_TOUT95_P11_2_OUT */

2156 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2N_TOUT124_P11_8_OUT; /**< \brief IfxGtm_TOM2_2N_TOUT124_P11_8_OUT */

2157 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2N_TOUT255_P13_6_OUT; /**< \brief IfxGtm_TOM2_2N_TOUT255_P13_6_OUT */

2158 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2N_TOUT46_P23_5_OUT; /**< \brief IfxGtm_TOM2_2N_TOUT46_P23_5_OUT */

2159 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2N_TOUT58_P21_7_OUT; /**< \brief IfxGtm_TOM2_2N_TOUT58_P21_7_OUT */

2160 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2N_TOUT78_P15_7_OUT; /**< \brief IfxGtm_TOM2_2N_TOUT78_P15_7_OUT */

2161 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2N_TOUT93_P13_2_OUT; /**< \brief IfxGtm_TOM2_2N_TOUT93_P13_2_OUT */

2162 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2N_TOUT99_P11_10_OUT; /**< \brief IfxGtm_TOM2_2N_TOUT99_P11_10_OUT */

2163 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT121_P11_4_OUT; /**< \brief IfxGtm_TOM2_2_TOUT121_P11_4_OUT */

2164 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT125_P11_13_OUT; /**< \brief IfxGtm_TOM2_2_TOUT125_P11_13_OUT */

2165 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT252_P13_14_OUT; /**< \brief IfxGtm_TOM2_2_TOUT252_P13_14_OUT */

2166 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT46_P23_5_OUT; /**< \brief IfxGtm_TOM2_2_TOUT46_P23_5_OUT */

2167 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT50_P22_3_OUT; /**< \brief IfxGtm_TOM2_2_TOUT50_P22_3_OUT */

2168 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT55_P21_4_OUT; /**< \brief IfxGtm_TOM2_2_TOUT55_P21_4_OUT */

2169 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT63_P20_7_OUT; /**< \brief IfxGtm_TOM2_2_TOUT63_P20_7_OUT */

2170 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT88_P14_8_OUT; /**< \brief IfxGtm_TOM2_2_TOUT88_P14_8_OUT */

2171 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT96_P11_3_OUT; /**< \brief IfxGtm_TOM2_2_TOUT96_P11_3_OUT */

2172 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3N_TOUT100_P11_11_OUT; /**< \brief IfxGtm_TOM2_3N_TOUT100_P11_11_OUT */

2173 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3N_TOUT106_P10_4_OUT; /**< \brief IfxGtm_TOM2_3N_TOUT106_P10_4_OUT */

2174 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3N_TOUT122_P11_5_OUT; /**< \brief IfxGtm_TOM2_3N_TOUT122_P11_5_OUT */

2175 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3N_TOUT256_P13_7_OUT; /**< \brief IfxGtm_TOM2_3N_TOUT256_P13_7_OUT */

2176 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3N_TOUT45_P23_4_OUT; /**< \brief IfxGtm_TOM2_3N_TOUT45_P23_4_OUT */

2177 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3N_TOUT59_P20_0_OUT; /**< \brief IfxGtm_TOM2_3N_TOUT59_P20_0_OUT */

2178 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3N_TOUT77_P15_6_OUT; /**< \brief IfxGtm_TOM2_3N_TOUT77_P15_6_OUT */

2179 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT122_P11_5_OUT; /**< \brief IfxGtm_TOM2_3_TOUT122_P11_5_OUT */

2180 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT126_P11_14_OUT; /**< \brief IfxGtm_TOM2_3_TOUT126_P11_14_OUT */

2181 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT253_P13_4_OUT; /**< \brief IfxGtm_TOM2_3_TOUT253_P13_4_OUT */

2182 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT49_P22_2_OUT; /**< \brief IfxGtm_TOM2_3_TOUT49_P22_2_OUT */

2183 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT56_P21_5_OUT; /**< \brief IfxGtm_TOM2_3_TOUT56_P21_5_OUT */

2184 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT60_P20_1_OUT; /**< \brief IfxGtm_TOM2_3_TOUT60_P20_1_OUT */

2185 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT62_P20_6_OUT; /**< \brief IfxGtm_TOM2_3_TOUT62_P20_6_OUT */

2186 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT89_P14_9_OUT; /**< \brief IfxGtm_TOM2_3_TOUT89_P14_9_OUT */

2187 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT97_P11_6_OUT; /**< \brief IfxGtm_TOM2_3_TOUT97_P11_6_OUT */

2188 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT106_P10_4_OUT; /**< \brief IfxGtm_TOM2_4N_TOUT106_P10_4_OUT */

2189 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT120_P11_1_OUT; /**< \brief IfxGtm_TOM2_4N_TOUT120_P11_1_OUT */

2190 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT122_P11_5_OUT; /**< \brief IfxGtm_TOM2_4N_TOUT122_P11_5_OUT */

2191 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT126_P11_14_OUT; /**< \brief IfxGtm_TOM2_4N_TOUT126_P11_14_OUT */

2192 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT137_P22_11_OUT; /**< \brief IfxGtm_TOM2_4N_TOUT137_P22_11_OUT */

2193 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT253_P13_4_OUT; /**< \brief IfxGtm_TOM2_4N_TOUT253_P13_4_OUT */

2194 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT56_P21_5_OUT; /**< \brief IfxGtm_TOM2_4N_TOUT56_P21_5_OUT */

2195 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT60_P20_1_OUT; /**< \brief IfxGtm_TOM2_4N_TOUT60_P20_1_OUT */

2196 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT89_P14_9_OUT; /**< \brief IfxGtm_TOM2_4N_TOUT89_P14_9_OUT */

2197 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT97_P11_6_OUT; /**< \brief IfxGtm_TOM2_4N_TOUT97_P11_6_OUT */

2198 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT102_P10_0_OUT; /**< \brief IfxGtm_TOM2_4_TOUT102_P10_0_OUT */

2199 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT123_P11_7_OUT; /**< \brief IfxGtm_TOM2_4_TOUT123_P11_7_OUT */

2200 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT133_P22_7_OUT; /**< \brief IfxGtm_TOM2_4_TOUT133_P22_7_OUT */

2201 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT254_P13_5_OUT; /**< \brief IfxGtm_TOM2_4_TOUT254_P13_5_OUT */

2202 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT50_P22_3_OUT; /**< \brief IfxGtm_TOM2_4_TOUT50_P22_3_OUT */

2203 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT57_P21_6_OUT; /**< \brief IfxGtm_TOM2_4_TOUT57_P21_6_OUT */

2204 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT61_P20_3_OUT; /**< \brief IfxGtm_TOM2_4_TOUT61_P20_3_OUT */

2205 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT90_P14_10_OUT; /**< \brief IfxGtm_TOM2_4_TOUT90_P14_10_OUT */

2206 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT98_P11_9_OUT; /**< \brief IfxGtm_TOM2_4_TOUT98_P11_9_OUT */

2207 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5N_TOUT107_P10_5_OUT; /**< \brief IfxGtm_TOM2_5N_TOUT107_P10_5_OUT */

2208 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5N_TOUT119_P11_0_OUT; /**< \brief IfxGtm_TOM2_5N_TOUT119_P11_0_OUT */

2209 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5N_TOUT136_P22_10_OUT; /**< \brief IfxGtm_TOM2_5N_TOUT136_P22_10_OUT */

2210 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5N_TOUT250_P13_11_OUT; /**< \brief IfxGtm_TOM2_5N_TOUT250_P13_11_OUT */

2211 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5N_TOUT53_P21_2_OUT; /**< \brief IfxGtm_TOM2_5N_TOUT53_P21_2_OUT */

2212 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5N_TOUT87_P14_7_OUT; /**< \brief IfxGtm_TOM2_5N_TOUT87_P14_7_OUT */

2213 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5N_TOUT94_P13_3_OUT; /**< \brief IfxGtm_TOM2_5N_TOUT94_P13_3_OUT */

2214 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5_TOUT103_P10_1_OUT; /**< \brief IfxGtm_TOM2_5_TOUT103_P10_1_OUT */

2215 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5_TOUT124_P11_8_OUT; /**< \brief IfxGtm_TOM2_5_TOUT124_P11_8_OUT */

2216 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5_TOUT132_P22_6_OUT; /**< \brief IfxGtm_TOM2_5_TOUT132_P22_6_OUT */

2217 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5_TOUT255_P13_6_OUT; /**< \brief IfxGtm_TOM2_5_TOUT255_P13_6_OUT */

2218 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5_TOUT58_P21_7_OUT; /**< \brief IfxGtm_TOM2_5_TOUT58_P21_7_OUT */

2219 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5_TOUT91_P13_0_OUT; /**< \brief IfxGtm_TOM2_5_TOUT91_P13_0_OUT */

2220 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5_TOUT99_P11_10_OUT; /**< \brief IfxGtm_TOM2_5_TOUT99_P11_10_OUT */

2221 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT108_P10_6_OUT; /**< \brief IfxGtm_TOM2_6N_TOUT108_P10_6_OUT */

2222 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT120_P11_1_OUT; /**< \brief IfxGtm_TOM2_6N_TOUT120_P11_1_OUT */

2223 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT122_P11_5_OUT; /**< \brief IfxGtm_TOM2_6N_TOUT122_P11_5_OUT */

2224 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT135_P22_9_OUT; /**< \brief IfxGtm_TOM2_6N_TOUT135_P22_9_OUT */

2225 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT251_P13_10_OUT; /**< \brief IfxGtm_TOM2_6N_TOUT251_P13_10_OUT */

2226 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT54_P21_3_OUT; /**< \brief IfxGtm_TOM2_6N_TOUT54_P21_3_OUT */

2227 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT86_P14_6_OUT; /**< \brief IfxGtm_TOM2_6N_TOUT86_P14_6_OUT */

2228 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT95_P11_2_OUT; /**< \brief IfxGtm_TOM2_6N_TOUT95_P11_2_OUT */

2229 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT100_P11_11_OUT; /**< \brief IfxGtm_TOM2_6_TOUT100_P11_11_OUT */

2230 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT104_P10_2_OUT; /**< \brief IfxGtm_TOM2_6_TOUT104_P10_2_OUT */

2231 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT106_P10_4_OUT; /**< \brief IfxGtm_TOM2_6_TOUT106_P10_4_OUT */

2232 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT125_P11_13_OUT; /**< \brief IfxGtm_TOM2_6_TOUT125_P11_13_OUT */

2233 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT131_P22_5_OUT; /**< \brief IfxGtm_TOM2_6_TOUT131_P22_5_OUT */

2234 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT256_P13_7_OUT; /**< \brief IfxGtm_TOM2_6_TOUT256_P13_7_OUT */

2235 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT59_P20_0_OUT; /**< \brief IfxGtm_TOM2_6_TOUT59_P20_0_OUT */

2236 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT92_P13_1_OUT; /**< \brief IfxGtm_TOM2_6_TOUT92_P13_1_OUT */

2237 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT109_P10_7_OUT; /**< \brief IfxGtm_TOM2_7N_TOUT109_P10_7_OUT */

2238 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT121_P11_4_OUT; /**< \brief IfxGtm_TOM2_7N_TOUT121_P11_4_OUT */

2239 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT134_P22_8_OUT; /**< \brief IfxGtm_TOM2_7N_TOUT134_P22_8_OUT */

2240 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT252_P13_14_OUT; /**< \brief IfxGtm_TOM2_7N_TOUT252_P13_14_OUT */

2241 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT55_P21_4_OUT; /**< \brief IfxGtm_TOM2_7N_TOUT55_P21_4_OUT */

2242 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT88_P14_8_OUT; /**< \brief IfxGtm_TOM2_7N_TOUT88_P14_8_OUT */

2243 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT96_P11_3_OUT; /**< \brief IfxGtm_TOM2_7N_TOUT96_P11_3_OUT */

2244 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT98_P11_9_OUT; /**< \brief IfxGtm_TOM2_7N_TOUT98_P11_9_OUT */

2245 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7_TOUT101_P11_12_OUT; /**< \brief IfxGtm_TOM2_7_TOUT101_P11_12_OUT */

2246 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7_TOUT105_P10_3_OUT; /**< \brief IfxGtm_TOM2_7_TOUT105_P10_3_OUT */

2247 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7_TOUT126_P11_14_OUT; /**< \brief IfxGtm_TOM2_7_TOUT126_P11_14_OUT */

2248 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7_TOUT130_P22_4_OUT; /**< \brief IfxGtm_TOM2_7_TOUT130_P22_4_OUT */

2249 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7_TOUT264_P13_15_OUT; /**< \brief IfxGtm_TOM2_7_TOUT264_P13_15_OUT */

2250 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7_TOUT64_P20_8_OUT; /**< \brief IfxGtm_TOM2_7_TOUT64_P20_8_OUT */

2251 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7_TOUT93_P13_2_OUT; /**< \brief IfxGtm_TOM2_7_TOUT93_P13_2_OUT */

2252 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_8_TOUT109_P10_7_OUT; /**< \brief IfxGtm_TOM2_8_TOUT109_P10_7_OUT */

2253 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_8_TOUT127_P11_15_OUT; /**< \brief IfxGtm_TOM2_8_TOUT127_P11_15_OUT */

2254 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_8_TOUT131_P22_5_OUT; /**< \brief IfxGtm_TOM2_8_TOUT131_P22_5_OUT */

2255 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_8_TOUT258_P14_11_OUT; /**< \brief IfxGtm_TOM2_8_TOUT258_P14_11_OUT */

2256 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_8_TOUT51_P21_0_OUT; /**< \brief IfxGtm_TOM2_8_TOUT51_P21_0_OUT */

2257 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_8_TOUT68_P20_12_OUT; /**< \brief IfxGtm_TOM2_8_TOUT68_P20_12_OUT */

2258 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_9_TOUT103_P10_1_OUT; /**< \brief IfxGtm_TOM2_9_TOUT103_P10_1_OUT */

2259 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_9_TOUT132_P22_6_OUT; /**< \brief IfxGtm_TOM2_9_TOUT132_P22_6_OUT */

2260 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_9_TOUT259_P14_14_OUT; /**< \brief IfxGtm_TOM2_9_TOUT259_P14_14_OUT */

2261 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_9_TOUT52_P21_1_OUT; /**< \brief IfxGtm_TOM2_9_TOUT52_P21_1_OUT */

2262 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_9_TOUT69_P20_13_OUT; /**< \brief IfxGtm_TOM2_9_TOUT69_P20_13_OUT */

2263 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_0N_TOUT134_P22_8_OUT; /**< \brief IfxGtm_TOM3_0N_TOUT134_P22_8_OUT */

2264 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_0N_TOUT161_P01_13_OUT; /**< \brief IfxGtm_TOM3_0N_TOUT161_P01_13_OUT */

2265 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_0N_TOUT181_P31_7_OUT; /**< \brief IfxGtm_TOM3_0N_TOUT181_P31_7_OUT */

2266 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_0N_TOUT213_P25_7_OUT; /**< \brief IfxGtm_TOM3_0N_TOUT213_P25_7_OUT */

2267 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_0N_TOUT8_P02_8_OUT; /**< \brief IfxGtm_TOM3_0N_TOUT8_P02_8_OUT */

2268 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_0_TOUT110_P10_8_OUT; /**< \brief IfxGtm_TOM3_0_TOUT110_P10_8_OUT */

2269 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_0_TOUT115_P01_7_OUT; /**< \brief IfxGtm_TOM3_0_TOUT115_P01_7_OUT */

2270 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_0_TOUT130_P22_4_OUT; /**< \brief IfxGtm_TOM3_0_TOUT130_P22_4_OUT */

2271 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_0_TOUT155_P01_0_OUT; /**< \brief IfxGtm_TOM3_0_TOUT155_P01_0_OUT */

2272 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_0_TOUT162_P01_8_OUT; /**< \brief IfxGtm_TOM3_0_TOUT162_P01_8_OUT */

2273 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_0_TOUT174_P31_0_OUT; /**< \brief IfxGtm_TOM3_0_TOUT174_P31_0_OUT */

2274 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_0_TOUT206_P25_0_OUT; /**< \brief IfxGtm_TOM3_0_TOUT206_P25_0_OUT */

2275 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_10_TOUT164_P01_14_OUT; /**< \brief IfxGtm_TOM3_10_TOUT164_P01_14_OUT */

2276 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_10_TOUT184_P31_10_OUT; /**< \brief IfxGtm_TOM3_10_TOUT184_P31_10_OUT */

2277 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_10_TOUT188_P31_14_OUT; /**< \brief IfxGtm_TOM3_10_TOUT188_P31_14_OUT */

2278 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_10_TOUT216_P25_10_OUT; /**< \brief IfxGtm_TOM3_10_TOUT216_P25_10_OUT */

2279 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_10_TOUT220_P25_14_OUT; /**< \brief IfxGtm_TOM3_10_TOUT220_P25_14_OUT */

2280 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_10_TOUT266_P10_10_OUT; /**< \brief IfxGtm_TOM3_10_TOUT266_P10_10_OUT */

2281 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_11_TOUT166_P00_14_OUT; /**< \brief IfxGtm_TOM3_11_TOUT166_P00_14_OUT */

2282 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_11_TOUT185_P31_11_OUT; /**< \brief IfxGtm_TOM3_11_TOUT185_P31_11_OUT */

2283 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_11_TOUT189_P31_15_OUT; /**< \brief IfxGtm_TOM3_11_TOUT189_P31_15_OUT */

2284 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_11_TOUT217_P25_11_OUT; /**< \brief IfxGtm_TOM3_11_TOUT217_P25_11_OUT */

2285 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_11_TOUT221_P25_15_OUT; /**< \brief IfxGtm_TOM3_11_TOUT221_P25_15_OUT */

2286 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_11_TOUT267_P10_14_OUT; /**< \brief IfxGtm_TOM3_11_TOUT267_P10_14_OUT */

2287 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_12_TOUT167_P00_13_OUT; /**< \brief IfxGtm_TOM3_12_TOUT167_P00_13_OUT */

2288 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_12_TOUT186_P31_12_OUT; /**< \brief IfxGtm_TOM3_12_TOUT186_P31_12_OUT */

2289 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_12_TOUT218_P25_12_OUT; /**< \brief IfxGtm_TOM3_12_TOUT218_P25_12_OUT */

2290 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_12_TOUT268_P10_13_OUT; /**< \brief IfxGtm_TOM3_12_TOUT268_P10_13_OUT */

2291 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_13_TOUT138_P23_6_OUT; /**< \brief IfxGtm_TOM3_13_TOUT138_P23_6_OUT */

2292 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_13_TOUT168_P00_15_OUT; /**< \brief IfxGtm_TOM3_13_TOUT168_P00_15_OUT */

2293 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_13_TOUT187_P31_13_OUT; /**< \brief IfxGtm_TOM3_13_TOUT187_P31_13_OUT */

2294 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_13_TOUT219_P25_13_OUT; /**< \brief IfxGtm_TOM3_13_TOUT219_P25_13_OUT */

2295 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_13_TOUT269_P10_11_OUT; /**< \brief IfxGtm_TOM3_13_TOUT269_P10_11_OUT */

2296 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_14_TOUT139_P23_7_OUT; /**< \brief IfxGtm_TOM3_14_TOUT139_P23_7_OUT */

2297 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_14_TOUT151_P02_12_OUT; /**< \brief IfxGtm_TOM3_14_TOUT151_P02_12_OUT */

2298 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_14_TOUT153_P02_13_OUT; /**< \brief IfxGtm_TOM3_14_TOUT153_P02_13_OUT */

2299 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_14_TOUT188_P31_14_OUT; /**< \brief IfxGtm_TOM3_14_TOUT188_P31_14_OUT */

2300 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_14_TOUT220_P25_14_OUT; /**< \brief IfxGtm_TOM3_14_TOUT220_P25_14_OUT */

2301 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_14_TOUT270_P10_15_OUT; /**< \brief IfxGtm_TOM3_14_TOUT270_P10_15_OUT */

2302 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_15_TOUT140_P32_5_OUT; /**< \brief IfxGtm_TOM3_15_TOUT140_P32_5_OUT */

2303 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_15_TOUT152_P02_15_OUT; /**< \brief IfxGtm_TOM3_15_TOUT152_P02_15_OUT */

2304 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_15_TOUT154_P02_14_OUT; /**< \brief IfxGtm_TOM3_15_TOUT154_P02_14_OUT */

2305 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_15_TOUT189_P31_15_OUT; /**< \brief IfxGtm_TOM3_15_TOUT189_P31_15_OUT */

2306 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_15_TOUT221_P25_15_OUT; /**< \brief IfxGtm_TOM3_15_TOUT221_P25_15_OUT */

2307 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1N_TOUT116_P02_9_OUT; /**< \brief IfxGtm_TOM3_1N_TOUT116_P02_9_OUT */

2308 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1N_TOUT135_P22_9_OUT; /**< \brief IfxGtm_TOM3_1N_TOUT135_P22_9_OUT */

2309 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1N_TOUT158_P01_12_OUT; /**< \brief IfxGtm_TOM3_1N_TOUT158_P01_12_OUT */

2310 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1N_TOUT178_P31_4_OUT; /**< \brief IfxGtm_TOM3_1N_TOUT178_P31_4_OUT */

2311 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1N_TOUT210_P25_4_OUT; /**< \brief IfxGtm_TOM3_1N_TOUT210_P25_4_OUT */

2312 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1N_TOUT245_P15_13_OUT; /**< \brief IfxGtm_TOM3_1N_TOUT245_P15_13_OUT */

2313 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1N_TOUT268_P10_13_OUT; /**< \brief IfxGtm_TOM3_1N_TOUT268_P10_13_OUT */

2314 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT111_P01_3_OUT; /**< \brief IfxGtm_TOM3_1_TOUT111_P01_3_OUT */

2315 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT114_P01_6_OUT; /**< \brief IfxGtm_TOM3_1_TOUT114_P01_6_OUT */

2316 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT131_P22_5_OUT; /**< \brief IfxGtm_TOM3_1_TOUT131_P22_5_OUT */

2317 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT156_P01_2_OUT; /**< \brief IfxGtm_TOM3_1_TOUT156_P01_2_OUT */

2318 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT163_P01_10_OUT; /**< \brief IfxGtm_TOM3_1_TOUT163_P01_10_OUT */

2319 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT175_P31_1_OUT; /**< \brief IfxGtm_TOM3_1_TOUT175_P31_1_OUT */

2320 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT207_P25_1_OUT; /**< \brief IfxGtm_TOM3_1_TOUT207_P25_1_OUT */

2321 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT242_P15_10_OUT; /**< \brief IfxGtm_TOM3_1_TOUT242_P15_10_OUT */

2322 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT265_P10_9_OUT; /**< \brief IfxGtm_TOM3_1_TOUT265_P10_9_OUT */

2323 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2N_TOUT117_P02_10_OUT; /**< \brief IfxGtm_TOM3_2N_TOUT117_P02_10_OUT */

2324 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2N_TOUT136_P22_10_OUT; /**< \brief IfxGtm_TOM3_2N_TOUT136_P22_10_OUT */

2325 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2N_TOUT159_P01_1_OUT; /**< \brief IfxGtm_TOM3_2N_TOUT159_P01_1_OUT */

2326 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2N_TOUT179_P31_5_OUT; /**< \brief IfxGtm_TOM3_2N_TOUT179_P31_5_OUT */

2327 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2N_TOUT211_P25_5_OUT; /**< \brief IfxGtm_TOM3_2N_TOUT211_P25_5_OUT */

2328 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2N_TOUT246_P15_14_OUT; /**< \brief IfxGtm_TOM3_2N_TOUT246_P15_14_OUT */

2329 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2N_TOUT267_P10_14_OUT; /**< \brief IfxGtm_TOM3_2N_TOUT267_P10_14_OUT */

2330 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT112_P01_4_OUT; /**< \brief IfxGtm_TOM3_2_TOUT112_P01_4_OUT */

2331 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT132_P22_6_OUT; /**< \brief IfxGtm_TOM3_2_TOUT132_P22_6_OUT */

2332 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT157_P01_15_OUT; /**< \brief IfxGtm_TOM3_2_TOUT157_P01_15_OUT */

2333 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT164_P01_14_OUT; /**< \brief IfxGtm_TOM3_2_TOUT164_P01_14_OUT */

2334 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT176_P31_2_OUT; /**< \brief IfxGtm_TOM3_2_TOUT176_P31_2_OUT */

2335 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT208_P25_2_OUT; /**< \brief IfxGtm_TOM3_2_TOUT208_P25_2_OUT */

2336 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT243_P15_11_OUT; /**< \brief IfxGtm_TOM3_2_TOUT243_P15_11_OUT */

2337 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT266_P10_10_OUT; /**< \brief IfxGtm_TOM3_2_TOUT266_P10_10_OUT */

2338 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT118_P02_11_OUT; /**< \brief IfxGtm_TOM3_3N_TOUT118_P02_11_OUT */

2339 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT137_P22_11_OUT; /**< \brief IfxGtm_TOM3_3N_TOUT137_P22_11_OUT */

2340 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT160_P01_9_OUT; /**< \brief IfxGtm_TOM3_3N_TOUT160_P01_9_OUT */

2341 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT180_P31_6_OUT; /**< \brief IfxGtm_TOM3_3N_TOUT180_P31_6_OUT */

2342 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT212_P25_6_OUT; /**< \brief IfxGtm_TOM3_3N_TOUT212_P25_6_OUT */

2343 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT212_P26_0_OUT; /**< \brief IfxGtm_TOM3_3N_TOUT212_P26_0_OUT */

2344 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT247_P15_15_OUT; /**< \brief IfxGtm_TOM3_3N_TOUT247_P15_15_OUT */

2345 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT270_P10_15_OUT; /**< \brief IfxGtm_TOM3_3N_TOUT270_P10_15_OUT */

2346 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3_TOUT113_P01_5_OUT; /**< \brief IfxGtm_TOM3_3_TOUT113_P01_5_OUT */

2347 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3_TOUT133_P22_7_OUT; /**< \brief IfxGtm_TOM3_3_TOUT133_P22_7_OUT */

2348 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3_TOUT165_P01_11_OUT; /**< \brief IfxGtm_TOM3_3_TOUT165_P01_11_OUT */

2349 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3_TOUT177_P31_3_OUT; /**< \brief IfxGtm_TOM3_3_TOUT177_P31_3_OUT */

2350 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3_TOUT209_P25_3_OUT; /**< \brief IfxGtm_TOM3_3_TOUT209_P25_3_OUT */

2351 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3_TOUT244_P15_12_OUT; /**< \brief IfxGtm_TOM3_3_TOUT244_P15_12_OUT */

2352 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3_TOUT269_P10_11_OUT; /**< \brief IfxGtm_TOM3_3_TOUT269_P10_11_OUT */

2353 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_4N_TOUT151_P02_12_OUT; /**< \brief IfxGtm_TOM3_4N_TOUT151_P02_12_OUT */

2354 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_4N_TOUT165_P01_11_OUT; /**< \brief IfxGtm_TOM3_4N_TOUT165_P01_11_OUT */

2355 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_4N_TOUT177_P31_3_OUT; /**< \brief IfxGtm_TOM3_4N_TOUT177_P31_3_OUT */

2356 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_4N_TOUT209_P25_3_OUT; /**< \brief IfxGtm_TOM3_4N_TOUT209_P25_3_OUT */

2357 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_4N_TOUT244_P15_12_OUT; /**< \brief IfxGtm_TOM3_4N_TOUT244_P15_12_OUT */

2358 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT110_P10_8_OUT; /**< \brief IfxGtm_TOM3_4_TOUT110_P10_8_OUT */

2359 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT111_P01_3_OUT; /**< \brief IfxGtm_TOM3_4_TOUT111_P01_3_OUT */

2360 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT114_P01_6_OUT; /**< \brief IfxGtm_TOM3_4_TOUT114_P01_6_OUT */

2361 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT134_P22_8_OUT; /**< \brief IfxGtm_TOM3_4_TOUT134_P22_8_OUT */

2362 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT158_P01_12_OUT; /**< \brief IfxGtm_TOM3_4_TOUT158_P01_12_OUT */

2363 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT178_P31_4_OUT; /**< \brief IfxGtm_TOM3_4_TOUT178_P31_4_OUT */

2364 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT210_P25_4_OUT; /**< \brief IfxGtm_TOM3_4_TOUT210_P25_4_OUT */

2365 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT245_P15_13_OUT; /**< \brief IfxGtm_TOM3_4_TOUT245_P15_13_OUT */

2366 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_5N_TOUT153_P02_13_OUT; /**< \brief IfxGtm_TOM3_5N_TOUT153_P02_13_OUT */

2367 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_5N_TOUT155_P01_0_OUT; /**< \brief IfxGtm_TOM3_5N_TOUT155_P01_0_OUT */

2368 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_5N_TOUT166_P00_14_OUT; /**< \brief IfxGtm_TOM3_5N_TOUT166_P00_14_OUT */

2369 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_5N_TOUT174_P31_0_OUT; /**< \brief IfxGtm_TOM3_5N_TOUT174_P31_0_OUT */

2370 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_5N_TOUT206_P25_0_OUT; /**< \brief IfxGtm_TOM3_5N_TOUT206_P25_0_OUT */

2371 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_5N_TOUT268_P10_13_OUT; /**< \brief IfxGtm_TOM3_5N_TOUT268_P10_13_OUT */

2372 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_5_TOUT115_P01_7_OUT; /**< \brief IfxGtm_TOM3_5_TOUT115_P01_7_OUT */

2373 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_5_TOUT135_P22_9_OUT; /**< \brief IfxGtm_TOM3_5_TOUT135_P22_9_OUT */

2374 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_5_TOUT159_P01_1_OUT; /**< \brief IfxGtm_TOM3_5_TOUT159_P01_1_OUT */

2375 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_5_TOUT179_P31_5_OUT; /**< \brief IfxGtm_TOM3_5_TOUT179_P31_5_OUT */

2376 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_5_TOUT211_P25_5_OUT; /**< \brief IfxGtm_TOM3_5_TOUT211_P25_5_OUT */

2377 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_5_TOUT246_P15_14_OUT; /**< \brief IfxGtm_TOM3_5_TOUT246_P15_14_OUT */

2378 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_5_TOUT265_P10_9_OUT; /**< \brief IfxGtm_TOM3_5_TOUT265_P10_9_OUT */

2379 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_6N_TOUT154_P02_14_OUT; /**< \brief IfxGtm_TOM3_6N_TOUT154_P02_14_OUT */

2380 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_6N_TOUT156_P01_2_OUT; /**< \brief IfxGtm_TOM3_6N_TOUT156_P01_2_OUT */

2381 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_6N_TOUT175_P31_1_OUT; /**< \brief IfxGtm_TOM3_6N_TOUT175_P31_1_OUT */

2382 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_6N_TOUT207_P25_1_OUT; /**< \brief IfxGtm_TOM3_6N_TOUT207_P25_1_OUT */

2383 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_6N_TOUT242_P15_10_OUT; /**< \brief IfxGtm_TOM3_6N_TOUT242_P15_10_OUT */

2384 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_6N_TOUT267_P10_14_OUT; /**< \brief IfxGtm_TOM3_6N_TOUT267_P10_14_OUT */

2385 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_6_TOUT136_P22_10_OUT; /**< \brief IfxGtm_TOM3_6_TOUT136_P22_10_OUT */

2386 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_6_TOUT160_P01_9_OUT; /**< \brief IfxGtm_TOM3_6_TOUT160_P01_9_OUT */

2387 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_6_TOUT180_P31_6_OUT; /**< \brief IfxGtm_TOM3_6_TOUT180_P31_6_OUT */

2388 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_6_TOUT212_P25_6_OUT; /**< \brief IfxGtm_TOM3_6_TOUT212_P25_6_OUT */

2389 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_6_TOUT212_P26_0_OUT; /**< \brief IfxGtm_TOM3_6_TOUT212_P26_0_OUT */

2390 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_6_TOUT247_P15_15_OUT; /**< \brief IfxGtm_TOM3_6_TOUT247_P15_15_OUT */

2391 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_6_TOUT266_P10_10_OUT; /**< \brief IfxGtm_TOM3_6_TOUT266_P10_10_OUT */

2392 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_7N_TOUT152_P02_15_OUT; /**< \brief IfxGtm_TOM3_7N_TOUT152_P02_15_OUT */

2393 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_7N_TOUT157_P01_15_OUT; /**< \brief IfxGtm_TOM3_7N_TOUT157_P01_15_OUT */

2394 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_7N_TOUT176_P31_2_OUT; /**< \brief IfxGtm_TOM3_7N_TOUT176_P31_2_OUT */

2395 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_7N_TOUT208_P25_2_OUT; /**< \brief IfxGtm_TOM3_7N_TOUT208_P25_2_OUT */

2396 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_7N_TOUT243_P15_11_OUT; /**< \brief IfxGtm_TOM3_7N_TOUT243_P15_11_OUT */

2397 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_7N_TOUT270_P10_15_OUT; /**< \brief IfxGtm_TOM3_7N_TOUT270_P10_15_OUT */

2398 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_7_TOUT137_P22_11_OUT; /**< \brief IfxGtm_TOM3_7_TOUT137_P22_11_OUT */

2399 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_7_TOUT161_P01_13_OUT; /**< \brief IfxGtm_TOM3_7_TOUT161_P01_13_OUT */

2400 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_7_TOUT181_P31_7_OUT; /**< \brief IfxGtm_TOM3_7_TOUT181_P31_7_OUT */

2401 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_7_TOUT213_P25_7_OUT; /**< \brief IfxGtm_TOM3_7_TOUT213_P25_7_OUT */

2402 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_7_TOUT248_P13_9_OUT; /**< \brief IfxGtm_TOM3_7_TOUT248_P13_9_OUT */

2403 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_7_TOUT269_P10_11_OUT; /**< \brief IfxGtm_TOM3_7_TOUT269_P10_11_OUT */

2404 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_8_TOUT162_P01_8_OUT; /**< \brief IfxGtm_TOM3_8_TOUT162_P01_8_OUT */

2405 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_8_TOUT182_P31_8_OUT; /**< \brief IfxGtm_TOM3_8_TOUT182_P31_8_OUT */

2406 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_8_TOUT186_P31_12_OUT; /**< \brief IfxGtm_TOM3_8_TOUT186_P31_12_OUT */

2407 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_8_TOUT214_P25_8_OUT; /**< \brief IfxGtm_TOM3_8_TOUT214_P25_8_OUT */

2408 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_8_TOUT218_P25_12_OUT; /**< \brief IfxGtm_TOM3_8_TOUT218_P25_12_OUT */

2409 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_8_TOUT249_P13_12_OUT; /**< \brief IfxGtm_TOM3_8_TOUT249_P13_12_OUT */

2410 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_9_TOUT163_P01_10_OUT; /**< \brief IfxGtm_TOM3_9_TOUT163_P01_10_OUT */

2411 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_9_TOUT183_P31_9_OUT; /**< \brief IfxGtm_TOM3_9_TOUT183_P31_9_OUT */

2412 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_9_TOUT187_P31_13_OUT; /**< \brief IfxGtm_TOM3_9_TOUT187_P31_13_OUT */

2413 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_9_TOUT215_P25_9_OUT; /**< \brief IfxGtm_TOM3_9_TOUT215_P25_9_OUT */

2414 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_9_TOUT219_P25_13_OUT; /**< \brief IfxGtm_TOM3_9_TOUT219_P25_13_OUT */

2415 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_9_TOUT265_P10_9_OUT; /**< \brief IfxGtm_TOM3_9_TOUT265_P10_9_OUT */

2416 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_0_TOUT155_P01_0_OUT; /**< \brief IfxGtm_TOM4_0_TOUT155_P01_0_OUT */

2417 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_0_TOUT162_P01_8_OUT; /**< \brief IfxGtm_TOM4_0_TOUT162_P01_8_OUT */

2418 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_0_TOUT190_P30_0_OUT; /**< \brief IfxGtm_TOM4_0_TOUT190_P30_0_OUT */

2419 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_0_TOUT222_P24_0_OUT; /**< \brief IfxGtm_TOM4_0_TOUT222_P24_0_OUT */

2420 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_0_TOUT250_P13_11_OUT; /**< \brief IfxGtm_TOM4_0_TOUT250_P13_11_OUT */

2421 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_10_TOUT164_P01_14_OUT; /**< \brief IfxGtm_TOM4_10_TOUT164_P01_14_OUT */

2422 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_10_TOUT200_P30_10_OUT; /**< \brief IfxGtm_TOM4_10_TOUT200_P30_10_OUT */

2423 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_10_TOUT204_P30_14_OUT; /**< \brief IfxGtm_TOM4_10_TOUT204_P30_14_OUT */

2424 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_10_TOUT232_P24_10_OUT; /**< \brief IfxGtm_TOM4_10_TOUT232_P24_10_OUT */

2425 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_10_TOUT260_P14_13_OUT; /**< \brief IfxGtm_TOM4_10_TOUT260_P14_13_OUT */

2426 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_11_TOUT166_P00_14_OUT; /**< \brief IfxGtm_TOM4_11_TOUT166_P00_14_OUT */

2427 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_11_TOUT201_P30_11_OUT; /**< \brief IfxGtm_TOM4_11_TOUT201_P30_11_OUT */

2428 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_11_TOUT205_P30_15_OUT; /**< \brief IfxGtm_TOM4_11_TOUT205_P30_15_OUT */

2429 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_11_TOUT233_P24_11_OUT; /**< \brief IfxGtm_TOM4_11_TOUT233_P24_11_OUT */

2430 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_11_TOUT261_P14_12_OUT; /**< \brief IfxGtm_TOM4_11_TOUT261_P14_12_OUT */

2431 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_12_TOUT167_P00_13_OUT; /**< \brief IfxGtm_TOM4_12_TOUT167_P00_13_OUT */

2432 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_12_TOUT202_P30_12_OUT; /**< \brief IfxGtm_TOM4_12_TOUT202_P30_12_OUT */

2433 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_12_TOUT230_P24_8_OUT; /**< \brief IfxGtm_TOM4_12_TOUT230_P24_8_OUT */

2434 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_12_TOUT234_P24_12_OUT; /**< \brief IfxGtm_TOM4_12_TOUT234_P24_12_OUT */

2435 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_12_TOUT262_P13_13_OUT; /**< \brief IfxGtm_TOM4_12_TOUT262_P13_13_OUT */

2436 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_13_TOUT168_P00_15_OUT; /**< \brief IfxGtm_TOM4_13_TOUT168_P00_15_OUT */

2437 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_13_TOUT203_P30_13_OUT; /**< \brief IfxGtm_TOM4_13_TOUT203_P30_13_OUT */

2438 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_13_TOUT231_P24_9_OUT; /**< \brief IfxGtm_TOM4_13_TOUT231_P24_9_OUT */

2439 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_13_TOUT235_P24_13_OUT; /**< \brief IfxGtm_TOM4_13_TOUT235_P24_13_OUT */

2440 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_13_TOUT263_P14_15_OUT; /**< \brief IfxGtm_TOM4_13_TOUT263_P14_15_OUT */

2441 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_14_TOUT151_P02_12_OUT; /**< \brief IfxGtm_TOM4_14_TOUT151_P02_12_OUT */

2442 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_14_TOUT153_P02_13_OUT; /**< \brief IfxGtm_TOM4_14_TOUT153_P02_13_OUT */

2443 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_14_TOUT204_P30_14_OUT; /**< \brief IfxGtm_TOM4_14_TOUT204_P30_14_OUT */

2444 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_14_TOUT232_P24_10_OUT; /**< \brief IfxGtm_TOM4_14_TOUT232_P24_10_OUT */

2445 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_14_TOUT236_P24_14_OUT; /**< \brief IfxGtm_TOM4_14_TOUT236_P24_14_OUT */

2446 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_14_TOUT264_P13_15_OUT; /**< \brief IfxGtm_TOM4_14_TOUT264_P13_15_OUT */

2447 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_15_TOUT152_P02_15_OUT; /**< \brief IfxGtm_TOM4_15_TOUT152_P02_15_OUT */

2448 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_15_TOUT154_P02_14_OUT; /**< \brief IfxGtm_TOM4_15_TOUT154_P02_14_OUT */

2449 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_15_TOUT205_P30_15_OUT; /**< \brief IfxGtm_TOM4_15_TOUT205_P30_15_OUT */

2450 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_15_TOUT233_P24_11_OUT; /**< \brief IfxGtm_TOM4_15_TOUT233_P24_11_OUT */

2451 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_15_TOUT237_P24_15_OUT; /**< \brief IfxGtm_TOM4_15_TOUT237_P24_15_OUT */

2452 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_1_TOUT156_P01_2_OUT; /**< \brief IfxGtm_TOM4_1_TOUT156_P01_2_OUT */

2453 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_1_TOUT163_P01_10_OUT; /**< \brief IfxGtm_TOM4_1_TOUT163_P01_10_OUT */

2454 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_1_TOUT191_P30_1_OUT; /**< \brief IfxGtm_TOM4_1_TOUT191_P30_1_OUT */

2455 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_1_TOUT223_P24_1_OUT; /**< \brief IfxGtm_TOM4_1_TOUT223_P24_1_OUT */

2456 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_1_TOUT251_P13_10_OUT; /**< \brief IfxGtm_TOM4_1_TOUT251_P13_10_OUT */

2457 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_2_TOUT157_P01_15_OUT; /**< \brief IfxGtm_TOM4_2_TOUT157_P01_15_OUT */

2458 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_2_TOUT164_P01_14_OUT; /**< \brief IfxGtm_TOM4_2_TOUT164_P01_14_OUT */

2459 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_2_TOUT192_P30_2_OUT; /**< \brief IfxGtm_TOM4_2_TOUT192_P30_2_OUT */

2460 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_2_TOUT224_P24_2_OUT; /**< \brief IfxGtm_TOM4_2_TOUT224_P24_2_OUT */

2461 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_2_TOUT252_P13_14_OUT; /**< \brief IfxGtm_TOM4_2_TOUT252_P13_14_OUT */

2462 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_3_TOUT165_P01_11_OUT; /**< \brief IfxGtm_TOM4_3_TOUT165_P01_11_OUT */

2463 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_3_TOUT193_P30_3_OUT; /**< \brief IfxGtm_TOM4_3_TOUT193_P30_3_OUT */

2464 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_3_TOUT225_P24_3_OUT; /**< \brief IfxGtm_TOM4_3_TOUT225_P24_3_OUT */

2465 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_3_TOUT253_P13_4_OUT; /**< \brief IfxGtm_TOM4_3_TOUT253_P13_4_OUT */

2466 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_4_TOUT111_P01_3_OUT; /**< \brief IfxGtm_TOM4_4_TOUT111_P01_3_OUT */

2467 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_4_TOUT158_P01_12_OUT; /**< \brief IfxGtm_TOM4_4_TOUT158_P01_12_OUT */

2468 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_4_TOUT194_P30_4_OUT; /**< \brief IfxGtm_TOM4_4_TOUT194_P30_4_OUT */

2469 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_4_TOUT226_P24_4_OUT; /**< \brief IfxGtm_TOM4_4_TOUT226_P24_4_OUT */

2470 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_4_TOUT254_P13_5_OUT; /**< \brief IfxGtm_TOM4_4_TOUT254_P13_5_OUT */

2471 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_4_TOUT8_P02_8_OUT; /**< \brief IfxGtm_TOM4_4_TOUT8_P02_8_OUT */

2472 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_5_TOUT116_P02_9_OUT; /**< \brief IfxGtm_TOM4_5_TOUT116_P02_9_OUT */

2473 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_5_TOUT159_P01_1_OUT; /**< \brief IfxGtm_TOM4_5_TOUT159_P01_1_OUT */

2474 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_5_TOUT195_P30_5_OUT; /**< \brief IfxGtm_TOM4_5_TOUT195_P30_5_OUT */

2475 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_5_TOUT227_P24_5_OUT; /**< \brief IfxGtm_TOM4_5_TOUT227_P24_5_OUT */

2476 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_5_TOUT255_P13_6_OUT; /**< \brief IfxGtm_TOM4_5_TOUT255_P13_6_OUT */

2477 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_6_TOUT117_P02_10_OUT; /**< \brief IfxGtm_TOM4_6_TOUT117_P02_10_OUT */

2478 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_6_TOUT160_P01_9_OUT; /**< \brief IfxGtm_TOM4_6_TOUT160_P01_9_OUT */

2479 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_6_TOUT196_P30_6_OUT; /**< \brief IfxGtm_TOM4_6_TOUT196_P30_6_OUT */

2480 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_6_TOUT228_P24_6_OUT; /**< \brief IfxGtm_TOM4_6_TOUT228_P24_6_OUT */

2481 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_6_TOUT256_P13_7_OUT; /**< \brief IfxGtm_TOM4_6_TOUT256_P13_7_OUT */

2482 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_7_TOUT118_P02_11_OUT; /**< \brief IfxGtm_TOM4_7_TOUT118_P02_11_OUT */

2483 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_7_TOUT161_P01_13_OUT; /**< \brief IfxGtm_TOM4_7_TOUT161_P01_13_OUT */

2484 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_7_TOUT197_P30_7_OUT; /**< \brief IfxGtm_TOM4_7_TOUT197_P30_7_OUT */

2485 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_7_TOUT229_P24_7_OUT; /**< \brief IfxGtm_TOM4_7_TOUT229_P24_7_OUT */

2486 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_7_TOUT264_P13_15_OUT; /**< \brief IfxGtm_TOM4_7_TOUT264_P13_15_OUT */

2487 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_8_TOUT162_P01_8_OUT; /**< \brief IfxGtm_TOM4_8_TOUT162_P01_8_OUT */

2488 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_8_TOUT198_P30_8_OUT; /**< \brief IfxGtm_TOM4_8_TOUT198_P30_8_OUT */

2489 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_8_TOUT202_P30_12_OUT; /**< \brief IfxGtm_TOM4_8_TOUT202_P30_12_OUT */

2490 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_8_TOUT230_P24_8_OUT; /**< \brief IfxGtm_TOM4_8_TOUT230_P24_8_OUT */

2491 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_8_TOUT258_P14_11_OUT; /**< \brief IfxGtm_TOM4_8_TOUT258_P14_11_OUT */

2492 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_9_TOUT163_P01_10_OUT; /**< \brief IfxGtm_TOM4_9_TOUT163_P01_10_OUT */

2493 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_9_TOUT199_P30_9_OUT; /**< \brief IfxGtm_TOM4_9_TOUT199_P30_9_OUT */

2494 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_9_TOUT203_P30_13_OUT; /**< \brief IfxGtm_TOM4_9_TOUT203_P30_13_OUT */

2495 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_9_TOUT231_P24_9_OUT; /**< \brief IfxGtm_TOM4_9_TOUT231_P24_9_OUT */

2496 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_9_TOUT259_P14_14_OUT; /**< \brief IfxGtm_TOM4_9_TOUT259_P14_14_OUT */

2497

2498 /** \} */

2499

2500 #endif /* IFXGTM_PINMAP_H */

IfxGtm_TIM5_1_P22_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P22_9_IN

IfxGtm_TIM5_1_P22_9_IN.

Definition: IfxGtm_PinMap.h:1482

IfxGtm_TOM4_5_TOUT159_P01_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_5_TOUT159_P01_1_OUT

IfxGtm_TOM4_5_TOUT159_P01_1_OUT.

Definition: IfxGtm_PinMap.h:2473

IfxGtm_ATOM6_5_TOUT187_P31_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_5_TOUT187_P31_13_OUT

IfxGtm_ATOM6_5_TOUT187_P31_13_OUT.

Definition: IfxGtm_PinMap.h:909

IfxGtm_TOM0_1_TOUT19_P00_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT19_P00_10_OUT

IfxGtm_TOM0_1_TOUT19_P00_10_OUT.

Definition: IfxGtm_PinMap.h:1682

IfxGtm_TOM1_6_TOUT83_P14_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT83_P14_3_OUT

IfxGtm_TOM1_6_TOUT83_P14_3_OUT.

Definition: IfxGtm_PinMap.h:2045

IfxGtm_TOM3_6_TOUT247_P15_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_6_TOUT247_P15_15_OUT

IfxGtm_TOM3_6_TOUT247_P15_15_OUT.

Definition: IfxGtm_PinMap.h:2390

IfxGtm_ATOM1_1_TOUT78_P15_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT78_P15_7_OUT

IfxGtm_ATOM1_1_TOUT78_P15_7_OUT.

Definition: IfxGtm_PinMap.h:286

IfxGtm_TOM2_14_TOUT264_P13_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_14_TOUT264_P13_15_OUT

IfxGtm_TOM2_14_TOUT264_P13_15_OUT.

Definition: IfxGtm_PinMap.h:2129

IfxGtm_TIM3_0_P25_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P25_0_IN

IfxGtm_TIM3_0_P25_0_IN.

Definition: IfxGtm_PinMap.h:1272

IfxGtm_TIM1_2_P15_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P15_8_IN

IfxGtm_TIM1_2_P15_8_IN.

Definition: IfxGtm_PinMap.h:1128

IfxGtm_TOM1_4_TOUT14_P00_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT14_P00_5_OUT

IfxGtm_TOM1_4_TOUT14_P00_5_OUT.

Definition: IfxGtm_PinMap.h:1975

IfxGtm_ATOM6_7_TOUT189_P31_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_7_TOUT189_P31_15_OUT

IfxGtm_ATOM6_7_TOUT189_P31_15_OUT.

Definition: IfxGtm_PinMap.h:922

IfxGtm_TIM0_5_P33_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P33_1_IN

IfxGtm_TIM0_5_P33_1_IN.

Definition: IfxGtm_PinMap.h:1087

IfxGtm_ATOM3_4N_TOUT21_P00_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4N_TOUT21_P00_12_OUT

IfxGtm_ATOM3_4N_TOUT21_P00_12_OUT.

Definition: IfxGtm_PinMap.h:562

IfxGtm_TIM0_3_P00_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P00_12_IN

IfxGtm_TIM0_3_P00_12_IN.

Definition: IfxGtm_PinMap.h:1059

IfxGtm_TIM6_3_P23_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P23_4_IN

IfxGtm_TIM6_3_P23_4_IN.

Definition: IfxGtm_PinMap.h:1583

IfxGtm_ATOM6_7_TOUT221_P25_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_7_TOUT221_P25_15_OUT

IfxGtm_ATOM6_7_TOUT221_P25_15_OUT.

Definition: IfxGtm_PinMap.h:923

IfxGtm_TIM4_0_P11_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P11_0_IN

IfxGtm_TIM4_0_P11_0_IN.

Definition: IfxGtm_PinMap.h:1370

IfxGtm_TIM1_3_P14_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P14_0_IN

IfxGtm_TIM1_3_P14_0_IN.

Definition: IfxGtm_PinMap.h:1138

IfxGtm_TOM4_12_TOUT234_P24_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_12_TOUT234_P24_12_OUT

IfxGtm_TOM4_12_TOUT234_P24_12_OUT.

Definition: IfxGtm_PinMap.h:2434

IfxGtm_TIM0_0_P33_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P33_10_IN

IfxGtm_TIM0_0_P33_10_IN.

Definition: IfxGtm_PinMap.h:1036

IfxGtm_TIM3_3_P14_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P14_13_IN

IfxGtm_TIM3_3_P14_13_IN.

Definition: IfxGtm_PinMap.h:1305

IfxGtm_ATOM5_7N_TOUT208_P25_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7N_TOUT208_P25_2_OUT

IfxGtm_ATOM5_7N_TOUT208_P25_2_OUT.

Definition: IfxGtm_PinMap.h:859

IfxGtm_ATOM5_3N_TOUT137_P22_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT137_P22_11_OUT

IfxGtm_ATOM5_3N_TOUT137_P22_11_OUT.

Definition: IfxGtm_PinMap.h:789

IfxGtm_TIM2_6_P34_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P34_4_IN

IfxGtm_TIM2_6_P34_4_IN.

Definition: IfxGtm_PinMap.h:1249

IfxGtm_ATOM2_4_TOUT22_P33_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT22_P33_0_OUT

IfxGtm_ATOM2_4_TOUT22_P33_0_OUT.

Definition: IfxGtm_PinMap.h:455

IfxGtm_TIM5_6_P21_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P21_4_IN

IfxGtm_TIM5_6_P21_4_IN.

Definition: IfxGtm_PinMap.h:1535

IfxGtm_TIM2_7_P31_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P31_7_IN

IfxGtm_TIM2_7_P31_7_IN.

Definition: IfxGtm_PinMap.h:1259

IfxGtm_TIM6_2_P10_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P10_11_IN

IfxGtm_TIM6_2_P10_11_IN.

Definition: IfxGtm_PinMap.h:1571

IfxGtm_TOM1_0_TOUT9_P00_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT9_P00_0_OUT

IfxGtm_TOM1_0_TOUT9_P00_0_OUT.

Definition: IfxGtm_PinMap.h:1877

IfxGtm_TIM3_6_P13_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P13_7_IN

IfxGtm_TIM3_6_P13_7_IN.

Definition: IfxGtm_PinMap.h:1342

IfxGtm_ATOM4_0_TOUT48_P22_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT48_P22_1_OUT

IfxGtm_ATOM4_0_TOUT48_P22_1_OUT.

Definition: IfxGtm_PinMap.h:618

IfxGtm_ATOM1_7N_TOUT134_P22_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT134_P22_8_OUT

IfxGtm_ATOM1_7N_TOUT134_P22_8_OUT.

Definition: IfxGtm_PinMap.h:375

IfxGtm_ATOM5_3_TOUT149_P34_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT149_P34_4_OUT

IfxGtm_ATOM5_3_TOUT149_P34_4_OUT.

Definition: IfxGtm_PinMap.h:801

IfxGtm_ATOM5_0N_TOUT181_P31_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT181_P31_7_OUT

IfxGtm_ATOM5_0N_TOUT181_P31_7_OUT.

Definition: IfxGtm_PinMap.h:733

IfxGtm_ATOM3_3N_TOUT93_P13_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT93_P13_2_OUT

IfxGtm_ATOM3_3N_TOUT93_P13_2_OUT.

Definition: IfxGtm_PinMap.h:554

IfxGtm_TOM0_1_TOUT54_P21_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT54_P21_3_OUT

IfxGtm_TOM0_1_TOUT54_P21_3_OUT.

Definition: IfxGtm_PinMap.h:1686

IfxGtm_TIM3_3_P00_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P00_4_IN

IfxGtm_TIM3_3_P00_4_IN.

Definition: IfxGtm_PinMap.h:1300

IfxGtm_ATOM1_0_TOUT0_P02_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT0_P02_0_OUT

IfxGtm_ATOM1_0_TOUT0_P02_0_OUT.

Definition: IfxGtm_PinMap.h:264

IfxGtm_TOM2_15_TOUT149_P34_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_15_TOUT149_P34_4_OUT

IfxGtm_TOM2_15_TOUT149_P34_4_OUT.

Definition: IfxGtm_PinMap.h:2133

IfxGtm_TIM4_7_P13_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P13_9_IN

IfxGtm_TIM4_7_P13_9_IN.

Definition: IfxGtm_PinMap.h:1460

IfxGtm_TIM1_5_P33_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P33_1_IN

IfxGtm_TIM1_5_P33_1_IN.

Definition: IfxGtm_PinMap.h:1160

IfxGtm_ATOM5_1N_TOUT128_P12_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT128_P12_0_OUT

IfxGtm_ATOM5_1N_TOUT128_P12_0_OUT.

Definition: IfxGtm_PinMap.h:747

IfxGtm_TIM2_6_P13_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P13_1_IN

IfxGtm_TIM2_6_P13_1_IN.

Definition: IfxGtm_PinMap.h:1242

IfxGtm_ATOM2_6_TOUT143_P33_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT143_P33_14_OUT

IfxGtm_ATOM2_6_TOUT143_P33_14_OUT.

Definition: IfxGtm_PinMap.h:479

IfxGtm_TOM0_7N_TOUT33_P33_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT33_P33_11_OUT

IfxGtm_TOM0_7N_TOUT33_P33_11_OUT.

Definition: IfxGtm_PinMap.h:1828

IfxGtm_ATOM3_1_TOUT90_P14_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT90_P14_10_OUT

IfxGtm_ATOM3_1_TOUT90_P14_10_OUT.

Definition: IfxGtm_PinMap.h:523

IfxGtm_TOM3_10_TOUT184_P31_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_10_TOUT184_P31_10_OUT

IfxGtm_TOM3_10_TOUT184_P31_10_OUT.

Definition: IfxGtm_PinMap.h:2276

IfxGtm_ATOM4_1_TOUT69_P20_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT69_P20_13_OUT

IfxGtm_ATOM4_1_TOUT69_P20_13_OUT.

Definition: IfxGtm_PinMap.h:637

IfxGtm_TIM0_0_P02_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P02_0_IN

IfxGtm_TIM0_0_P02_0_IN.

Definition: IfxGtm_PinMap.h:1028

IfxGtm_ATOM2_4_TOUT34_P33_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT34_P33_12_OUT

IfxGtm_ATOM2_4_TOUT34_P33_12_OUT.

Definition: IfxGtm_PinMap.h:457

IfxGtm_TIM4_1_P21_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P21_1_IN

IfxGtm_TIM4_1_P21_1_IN.

Definition: IfxGtm_PinMap.h:1386

IfxGtm_ATOM5_7_TOUT142_P32_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7_TOUT142_P32_7_OUT

IfxGtm_ATOM5_7_TOUT142_P32_7_OUT.

Definition: IfxGtm_PinMap.h:862

IfxGtm_ATOM2_1N_TOUT34_P33_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT34_P33_12_OUT

IfxGtm_ATOM2_1N_TOUT34_P33_12_OUT.

Definition: IfxGtm_PinMap.h:402

IfxGtm_ATOM1_1_TOUT69_P20_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT69_P20_13_OUT

IfxGtm_ATOM1_1_TOUT69_P20_13_OUT.

Definition: IfxGtm_PinMap.h:285

IfxGtm_ATOM7_2_TOUT192_P30_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_2_TOUT192_P30_2_OUT

IfxGtm_ATOM7_2_TOUT192_P30_2_OUT.

Definition: IfxGtm_PinMap.h:941

IfxGtm_TOM0_3_TOUT21_P00_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT21_P00_12_OUT

IfxGtm_TOM0_3_TOUT21_P00_12_OUT.

Definition: IfxGtm_PinMap.h:1723

IfxGtm_TIM3_1_P13_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P13_10_IN

IfxGtm_TIM3_1_P13_10_IN.

Definition: IfxGtm_PinMap.h:1281

IfxGtm_TOM1_7_TOUT15_P00_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT15_P00_6_OUT

IfxGtm_TOM1_7_TOUT15_P00_6_OUT.

Definition: IfxGtm_PinMap.h:2065

IfxGtm_ATOM4_0_TOUT77_P15_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT77_P15_6_OUT

IfxGtm_ATOM4_0_TOUT77_P15_6_OUT.

Definition: IfxGtm_PinMap.h:622

IfxGtm_TOM2_8_TOUT258_P14_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_8_TOUT258_P14_11_OUT

IfxGtm_TOM2_8_TOUT258_P14_11_OUT.

Definition: IfxGtm_PinMap.h:2255

IfxGtm_TOM0_3N_TOUT109_P10_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT109_P10_7_OUT

IfxGtm_TOM0_3N_TOUT109_P10_7_OUT.

Definition: IfxGtm_PinMap.h:1709

IfxGtm_ATOM7_5_TOUT251_P13_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_5_TOUT251_P13_10_OUT

IfxGtm_ATOM7_5_TOUT251_P13_10_OUT.

Definition: IfxGtm_PinMap.h:964

IfxGtm_ATOM6_0_TOUT214_P25_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT214_P25_8_OUT

IfxGtm_ATOM6_0_TOUT214_P25_8_OUT.

Definition: IfxGtm_PinMap.h:872

IfxGtm_TOM0_0_TOUT76_P15_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT76_P15_5_OUT

IfxGtm_TOM0_0_TOUT76_P15_5_OUT.

Definition: IfxGtm_PinMap.h:1638

IfxGtm_TOM4_2_TOUT164_P01_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_2_TOUT164_P01_14_OUT

IfxGtm_TOM4_2_TOUT164_P01_14_OUT.

Definition: IfxGtm_PinMap.h:2458

IfxGtm_ATOM1_5N_TOUT26_P33_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT26_P33_4_OUT

IfxGtm_ATOM1_5N_TOUT26_P33_4_OUT.

Definition: IfxGtm_PinMap.h:342

IfxGtm_ATOM2_3N_TOUT62_P20_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT62_P20_6_OUT

IfxGtm_ATOM2_3N_TOUT62_P20_6_OUT.

Definition: IfxGtm_PinMap.h:442

IfxGtm_TIM1_3_P10_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P10_3_IN

IfxGtm_TIM1_3_P10_3_IN.

Definition: IfxGtm_PinMap.h:1136

IfxGtm_ATOM5_6N_TOUT96_P11_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6N_TOUT96_P11_3_OUT

IfxGtm_ATOM5_6N_TOUT96_P11_3_OUT.

Definition: IfxGtm_PinMap.h:844

IfxGtm_ATOM6_3_TOUT217_P25_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT217_P25_11_OUT

IfxGtm_ATOM6_3_TOUT217_P25_11_OUT.

Definition: IfxGtm_PinMap.h:896

IfxGtm_TOM3_2_TOUT243_P15_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT243_P15_11_OUT

IfxGtm_TOM3_2_TOUT243_P15_11_OUT.

Definition: IfxGtm_PinMap.h:2336

IfxGtm_TOM1_5N_TOUT32_P33_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT32_P33_10_OUT

IfxGtm_TOM1_5N_TOUT32_P33_10_OUT.

Definition: IfxGtm_PinMap.h:1993

IfxGtm_TOM1_0_TOUT77_P15_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT77_P15_6_OUT

IfxGtm_TOM1_0_TOUT77_P15_6_OUT.

Definition: IfxGtm_PinMap.h:1874

IfxGtm_ATOM6_3_TOUT260_P14_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT260_P14_13_OUT

IfxGtm_ATOM6_3_TOUT260_P14_13_OUT.

Definition: IfxGtm_PinMap.h:898

IfxGtm_TIM2_6_P22_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P22_6_IN

IfxGtm_TIM2_6_P22_6_IN.

Definition: IfxGtm_PinMap.h:1247

IfxGtm_ATOM2_6_TOUT62_P20_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT62_P20_6_OUT

IfxGtm_ATOM2_6_TOUT62_P20_6_OUT.

Definition: IfxGtm_PinMap.h:482

IfxGtm_ToutSel_l

Definition: IfxGtm_PinMap.h:96

IfxGtm_ATOM0_2N_TOUT114_P01_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT114_P01_6_OUT

IfxGtm_ATOM0_2N_TOUT114_P01_6_OUT.

Definition: IfxGtm_PinMap.h:178

IfxGtm_ATOM1_2N_TOUT23_P33_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT23_P33_1_OUT

IfxGtm_ATOM1_2N_TOUT23_P33_1_OUT.

Definition: IfxGtm_PinMap.h:292

IfxGtm_TIM6_3_P01_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P01_15_IN

IfxGtm_TIM6_3_P01_15_IN.

Definition: IfxGtm_PinMap.h:1579

IfxGtm_TOM0_6N_TOUT30_P33_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT30_P33_8_OUT

IfxGtm_TOM0_6N_TOUT30_P33_8_OUT.

Definition: IfxGtm_PinMap.h:1793

IfxGtm_ATOM3_7N_TOUT61_P20_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7N_TOUT61_P20_3_OUT

IfxGtm_ATOM3_7N_TOUT61_P20_3_OUT.

Definition: IfxGtm_PinMap.h:606

IfxGtm_ATOM0_6_TOUT6_P02_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT6_P02_6_OUT

IfxGtm_ATOM0_6_TOUT6_P02_6_OUT.

Definition: IfxGtm_PinMap.h:250

IfxGtm_TOM1_3N_TOUT6_P02_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3N_TOUT6_P02_6_OUT

IfxGtm_TOM1_3N_TOUT6_P02_6_OUT.

Definition: IfxGtm_PinMap.h:1947

IfxGtm_TOM3_6_TOUT212_P26_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_6_TOUT212_P26_0_OUT

IfxGtm_TOM3_6_TOUT212_P26_0_OUT.

Definition: IfxGtm_PinMap.h:2389

IfxGtm_TOM0_4_TOUT94_P13_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT94_P13_3_OUT

IfxGtm_TOM0_4_TOUT94_P13_3_OUT.

Definition: IfxGtm_PinMap.h:1758

IfxGtm_ATOM3_1N_TOUT98_P11_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT98_P11_9_OUT

IfxGtm_ATOM3_1N_TOUT98_P11_9_OUT.

Definition: IfxGtm_PinMap.h:516

IfxGtm_TIM4_2_P00_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P00_11_IN

IfxGtm_TIM4_2_P00_11_IN.

Definition: IfxGtm_PinMap.h:1391

IfxGtm_TOM2_2_TOUT88_P14_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT88_P14_8_OUT

IfxGtm_TOM2_2_TOUT88_P14_8_OUT.

Definition: IfxGtm_PinMap.h:2170

IfxGtm_TIM4_0_P13_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P13_12_IN

IfxGtm_TIM4_0_P13_12_IN.

Definition: IfxGtm_PinMap.h:1372

IfxGtm_TOM3_3N_TOUT212_P25_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT212_P25_6_OUT

IfxGtm_TOM3_3N_TOUT212_P25_6_OUT.

Definition: IfxGtm_PinMap.h:2342

IfxGtm_ATOM4_7N_TOUT135_P22_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7N_TOUT135_P22_9_OUT

IfxGtm_ATOM4_7N_TOUT135_P22_9_OUT.

Definition: IfxGtm_PinMap.h:719

IfxGtm_ATOM3_1_TOUT128_P12_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT128_P12_0_OUT

IfxGtm_ATOM3_1_TOUT128_P12_0_OUT.

Definition: IfxGtm_PinMap.h:518

IfxGtm_ATOM1_4N_TOUT118_P02_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT118_P02_11_OUT

IfxGtm_ATOM1_4N_TOUT118_P02_11_OUT.

Definition: IfxGtm_PinMap.h:322

IfxGtm_ATOM6_2_TOUT157_P01_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT157_P01_15_OUT

IfxGtm_ATOM6_2_TOUT157_P01_15_OUT.

Definition: IfxGtm_PinMap.h:886

IfxGtm_ATOM1_6_TOUT66_P20_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT66_P20_10_OUT

IfxGtm_ATOM1_6_TOUT66_P20_10_OUT.

Definition: IfxGtm_PinMap.h:368

IfxGtm_TIM2_1_P11_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P11_2_IN

IfxGtm_TIM2_1_P11_2_IN.

Definition: IfxGtm_PinMap.h:1189

IfxGtm_TOM3_12_TOUT218_P25_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_12_TOUT218_P25_12_OUT

IfxGtm_TOM3_12_TOUT218_P25_12_OUT.

Definition: IfxGtm_PinMap.h:2289

IfxGtm_TIM5_4_P30_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P30_12_IN

IfxGtm_TIM5_4_P30_12_IN.

Definition: IfxGtm_PinMap.h:1514

IfxGtm_TOM0_0_TOUT18_P00_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT18_P00_9_OUT

IfxGtm_TOM0_0_TOUT18_P00_9_OUT.

Definition: IfxGtm_PinMap.h:1634

IfxGtm_TOM3_13_TOUT219_P25_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_13_TOUT219_P25_13_OUT

IfxGtm_TOM3_13_TOUT219_P25_13_OUT.

Definition: IfxGtm_PinMap.h:2294

IfxGtm_TIM4_5_P10_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P10_2_IN

IfxGtm_TIM4_5_P10_2_IN.

Definition: IfxGtm_PinMap.h:1435

IfxGtm_TIM6_1_P25_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P25_1_IN

IfxGtm_TIM6_1_P25_1_IN.

Definition: IfxGtm_PinMap.h:1567

IfxGtm_TIM3_5_P21_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P21_1_IN

IfxGtm_TIM3_5_P21_1_IN.

Definition: IfxGtm_PinMap.h:1333

IfxGtm_TOM4_0_TOUT162_P01_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_0_TOUT162_P01_8_OUT

IfxGtm_TOM4_0_TOUT162_P01_8_OUT.

Definition: IfxGtm_PinMap.h:2417

IfxGtm_ATOM2_0_TOUT26_P33_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT26_P33_4_OUT

IfxGtm_ATOM2_0_TOUT26_P33_4_OUT.

Definition: IfxGtm_PinMap.h:395

IfxGtm_TOM4_0_TOUT222_P24_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_0_TOUT222_P24_0_OUT

IfxGtm_TOM4_0_TOUT222_P24_0_OUT.

Definition: IfxGtm_PinMap.h:2419

IfxGtm_TOM0_2N_TOUT58_P21_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT58_P21_7_OUT

IfxGtm_TOM0_2N_TOUT58_P21_7_OUT.

Definition: IfxGtm_PinMap.h:1695

IfxGtm_TOM1_7_TOUT248_P13_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT248_P13_9_OUT

IfxGtm_TOM1_7_TOUT248_P13_9_OUT.

Definition: IfxGtm_PinMap.h:2067

IfxGtm_TIM5_3_P01_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P01_11_IN

IfxGtm_TIM5_3_P01_11_IN.

Definition: IfxGtm_PinMap.h:1496

IfxGtm_PinMap_setTimTin

IFX_EXTERN void IfxGtm_PinMap_setTimTin(IfxGtm_Tim_TinMap *config, IfxPort_InputMode inputMode)

Definition: IfxGtm_PinMap.c:2396

IfxGtm_TIM1_1_P21_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P21_3_IN

IfxGtm_TIM1_1_P21_3_IN.

Definition: IfxGtm_PinMap.h:1120

IfxGtm_TOM0_10_TOUT96_P11_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT96_P11_3_OUT

IfxGtm_TOM0_10_TOUT96_P11_3_OUT.

Definition: IfxGtm_PinMap.h:1646

IfxGtm_TIM5_6_P34_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P34_4_IN

IfxGtm_TIM5_6_P34_4_IN.

Definition: IfxGtm_PinMap.h:1540

IfxGtm_TIM6_4_P00_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P00_4_IN

IfxGtm_TIM6_4_P00_4_IN.

Definition: IfxGtm_PinMap.h:1588

IfxGtm_ATOM8_3_TOUT253_P13_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_3_TOUT253_P13_4_OUT

IfxGtm_ATOM8_3_TOUT253_P13_4_OUT.

Definition: IfxGtm_PinMap.h:998

IfxGtm_TIM3_3_P32_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P32_1_IN

IfxGtm_TIM3_3_P32_1_IN.

Definition: IfxGtm_PinMap.h:1311

IfxGtm_TOM0_1_TOUT78_P15_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT78_P15_7_OUT

IfxGtm_TOM0_1_TOUT78_P15_7_OUT.

Definition: IfxGtm_PinMap.h:1687

IfxGtm_TIM6_4_P14_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P14_12_IN

IfxGtm_TIM6_4_P14_12_IN.

Definition: IfxGtm_PinMap.h:1590

IfxGtm_ATOM1_6_TOUT42_P23_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT42_P23_1_OUT

IfxGtm_ATOM1_6_TOUT42_P23_1_OUT.

Definition: IfxGtm_PinMap.h:367

IfxGtm_TIM2_4_P11_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P11_7_IN

IfxGtm_TIM2_4_P11_7_IN.

Definition: IfxGtm_PinMap.h:1217

IfxGtm_TOM0_11_TOUT13_P00_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT13_P00_4_OUT

IfxGtm_TOM0_11_TOUT13_P00_4_OUT.

Definition: IfxGtm_PinMap.h:1647

IfxGtm_ATOM4_5N_TOUT121_P11_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5N_TOUT121_P11_4_OUT

IfxGtm_ATOM4_5N_TOUT121_P11_4_OUT.

Definition: IfxGtm_PinMap.h:689

IfxGtm_ATOM5_0_TOUT249_P13_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT249_P13_12_OUT

IfxGtm_ATOM5_0_TOUT249_P13_12_OUT.

Definition: IfxGtm_PinMap.h:744

IfxGtm_TOM2_8_TOUT51_P21_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_8_TOUT51_P21_0_OUT

IfxGtm_TOM2_8_TOUT51_P21_0_OUT.

Definition: IfxGtm_PinMap.h:2256

IfxGtm_ATOM4_5N_TOUT76_P15_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5N_TOUT76_P15_5_OUT

IfxGtm_ATOM4_5N_TOUT76_P15_5_OUT.

Definition: IfxGtm_PinMap.h:692

IfxGtm_ATOM7_1_TOUT253_P13_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT253_P13_4_OUT

IfxGtm_ATOM7_1_TOUT253_P13_4_OUT.

Definition: IfxGtm_PinMap.h:938

IfxGtm_ATOM0_0N_TOUT17_P00_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0N_TOUT17_P00_8_OUT

IfxGtm_ATOM0_0N_TOUT17_P00_8_OUT.

Definition: IfxGtm_PinMap.h:150

IfxGtm_ATOM3_3N_TOUT16_P00_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT16_P00_7_OUT

IfxGtm_ATOM3_3N_TOUT16_P00_7_OUT.

Definition: IfxGtm_PinMap.h:547

IfxGtm_TIM0_7_P23_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P23_4_IN

IfxGtm_TIM0_7_P23_4_IN.

Definition: IfxGtm_PinMap.h:1103

IfxGtm_ATOM7_4_TOUT268_P10_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_4_TOUT268_P10_13_OUT

IfxGtm_ATOM7_4_TOUT268_P10_13_OUT.

Definition: IfxGtm_PinMap.h:959

IfxGtm_TOM1_4_TOUT64_P20_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT64_P20_8_OUT

IfxGtm_TOM1_4_TOUT64_P20_8_OUT.

Definition: IfxGtm_PinMap.h:1982

IfxGtm_ATOM2_2N_TOUT106_P10_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT106_P10_4_OUT

IfxGtm_ATOM2_2N_TOUT106_P10_4_OUT.

Definition: IfxGtm_PinMap.h:414

IfxGtm_TOM2_3_TOUT253_P13_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT253_P13_4_OUT

IfxGtm_TOM2_3_TOUT253_P13_4_OUT.

Definition: IfxGtm_PinMap.h:2181

IfxGtm_TOM3_2N_TOUT267_P10_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2N_TOUT267_P10_14_OUT

IfxGtm_TOM3_2N_TOUT267_P10_14_OUT.

Definition: IfxGtm_PinMap.h:2329

IfxGtm_ATOM6_1_TOUT128_P12_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT128_P12_0_OUT

IfxGtm_ATOM6_1_TOUT128_P12_0_OUT.

Definition: IfxGtm_PinMap.h:875

IfxGtm_TOM4_4_TOUT254_P13_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_4_TOUT254_P13_5_OUT

IfxGtm_TOM4_4_TOUT254_P13_5_OUT.

Definition: IfxGtm_PinMap.h:2470

IfxGtm_ATOM1_0_TOUT9_P00_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT9_P00_0_OUT

IfxGtm_ATOM1_0_TOUT9_P00_0_OUT.

Definition: IfxGtm_PinMap.h:271

IfxGtm_ATOM2_5_TOUT99_P11_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT99_P11_10_OUT

IfxGtm_ATOM2_5_TOUT99_P11_10_OUT.

Definition: IfxGtm_PinMap.h:472

IfxGtm_TOM2_4N_TOUT97_P11_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT97_P11_6_OUT

IfxGtm_TOM2_4N_TOUT97_P11_6_OUT.

Definition: IfxGtm_PinMap.h:2197

IfxGtm_ATOM5_2N_TOUT246_P15_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT246_P15_14_OUT

IfxGtm_ATOM5_2N_TOUT246_P15_14_OUT.

Definition: IfxGtm_PinMap.h:773

IfxGtm_TIM6_7_P23_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P23_0_IN

IfxGtm_TIM6_7_P23_0_IN.

Definition: IfxGtm_PinMap.h:1616

IfxGtm_Atom_ToutMap::channel

IfxGtm_Atom_Ch channel

ATOM channel index.

Definition: IfxGtm_PinMap.h:113

IfxGtm_TOM4_0_TOUT190_P30_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_0_TOUT190_P30_0_OUT

IfxGtm_TOM4_0_TOUT190_P30_0_OUT.

Definition: IfxGtm_PinMap.h:2418

IfxGtm_ATOM8_7_TOUT244_P15_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_7_TOUT244_P15_12_OUT

IfxGtm_ATOM8_7_TOUT244_P15_12_OUT.

Definition: IfxGtm_PinMap.h:1022

IfxGtm_TIM3_7_P13_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P13_15_IN

IfxGtm_TIM3_7_P13_15_IN.

Definition: IfxGtm_PinMap.h:1355

IfxGtm_TOM1_7_TOUT25_P33_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT25_P33_3_OUT

IfxGtm_TOM1_7_TOUT25_P33_3_OUT.

Definition: IfxGtm_PinMap.h:2068

IfxGtm_ToutSel_j

Definition: IfxGtm_PinMap.h:94

IfxGtm_TOM3_0_TOUT174_P31_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_0_TOUT174_P31_0_OUT

IfxGtm_TOM3_0_TOUT174_P31_0_OUT.

Definition: IfxGtm_PinMap.h:2273

IfxGtm_ATOM5_0N_TOUT261_P14_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT261_P14_12_OUT

IfxGtm_ATOM5_0N_TOUT261_P14_12_OUT.

Definition: IfxGtm_PinMap.h:735

IfxGtm_TOM0_7N_TOUT150_P34_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT150_P34_5_OUT

IfxGtm_TOM0_7N_TOUT150_P34_5_OUT.

Definition: IfxGtm_PinMap.h:1824

IfxGtm_ATOM4_6N_TOUT134_P22_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6N_TOUT134_P22_8_OUT

IfxGtm_ATOM4_6N_TOUT134_P22_8_OUT.

Definition: IfxGtm_PinMap.h:704

IfxGtm_TOM2_3_TOUT126_P11_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT126_P11_14_OUT

IfxGtm_TOM2_3_TOUT126_P11_14_OUT.

Definition: IfxGtm_PinMap.h:2180

IfxGtm_TIM1_6_P02_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_P02_6_IN

IfxGtm_TIM1_6_P02_6_IN.

Definition: IfxGtm_PinMap.h:1161

IfxGtm_TIM4_4_P33_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P33_10_IN

IfxGtm_TIM4_4_P33_10_IN.

Definition: IfxGtm_PinMap.h:1429

IfxGtm_TIM2_7_P34_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P34_5_IN

IfxGtm_TIM2_7_P34_5_IN.

Definition: IfxGtm_PinMap.h:1260

IfxGtm_TIM6_6_P31_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P31_14_IN

IfxGtm_TIM6_6_P31_14_IN.

Definition: IfxGtm_PinMap.h:1612

IfxGtm_TIM4_7_P24_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P24_7_IN

IfxGtm_TIM4_7_P24_7_IN.

Definition: IfxGtm_PinMap.h:1462

IfxGtm_TIM5_0_P00_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P00_13_IN

IfxGtm_TIM5_0_P00_13_IN.

Definition: IfxGtm_PinMap.h:1466

IfxGtm_ATOM5_4_TOUT268_P10_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT268_P10_13_OUT

IfxGtm_ATOM5_4_TOUT268_P10_13_OUT.

Definition: IfxGtm_PinMap.h:824

IfxGtm_TOM0_5N_TOUT67_P20_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT67_P20_11_OUT

IfxGtm_TOM0_5N_TOUT67_P20_11_OUT.

Definition: IfxGtm_PinMap.h:1771

IfxGtm_TOM2_10_TOUT107_P10_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_10_TOUT107_P10_5_OUT

IfxGtm_TOM2_10_TOUT107_P10_5_OUT.

Definition: IfxGtm_PinMap.h:2106

IfxGtm_TOM0_0N_TOUT91_P13_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT91_P13_0_OUT

IfxGtm_TOM0_0N_TOUT91_P13_0_OUT.

Definition: IfxGtm_PinMap.h:1629

IfxGtm_TOM3_14_TOUT220_P25_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_14_TOUT220_P25_14_OUT

IfxGtm_TOM3_14_TOUT220_P25_14_OUT.

Definition: IfxGtm_PinMap.h:2300

IfxGtm_TIM4_0_P21_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P21_0_IN

IfxGtm_TIM4_0_P21_0_IN.

Definition: IfxGtm_PinMap.h:1373

IfxGtm_ATOM0_5_TOUT41_P23_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT41_P23_0_OUT

IfxGtm_ATOM0_5_TOUT41_P23_0_OUT.

Definition: IfxGtm_PinMap.h:235

IfxGtm_TIM1_7_P23_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_P23_3_IN

IfxGtm_TIM1_7_P23_3_IN.

Definition: IfxGtm_PinMap.h:1171

IfxGtm_TOM2_12_TOUT135_P22_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_12_TOUT135_P22_9_OUT

IfxGtm_TOM2_12_TOUT135_P22_9_OUT.

Definition: IfxGtm_PinMap.h:2118

IfxGtm_TOM0_5_TOUT66_P20_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT66_P20_10_OUT

IfxGtm_TOM0_5_TOUT66_P20_10_OUT.

Definition: IfxGtm_PinMap.h:1785

IfxGtm_TIM5_3_P01_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P01_5_IN

IfxGtm_TIM5_3_P01_5_IN.

Definition: IfxGtm_PinMap.h:1498

IfxGtm_TIM1_1_P33_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P33_5_IN

IfxGtm_TIM1_1_P33_5_IN.

Definition: IfxGtm_PinMap.h:1122

IfxGtm_ATOM0_4N_TOUT3_P02_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4N_TOUT3_P02_3_OUT

IfxGtm_ATOM0_4N_TOUT3_P02_3_OUT.

Definition: IfxGtm_PinMap.h:216

IfxGtm_TOM3_10_TOUT188_P31_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_10_TOUT188_P31_14_OUT

IfxGtm_TOM3_10_TOUT188_P31_14_OUT.

Definition: IfxGtm_PinMap.h:2277

IfxGtm_TIM6_1_P20_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P20_7_IN

IfxGtm_TIM6_1_P20_7_IN.

Definition: IfxGtm_PinMap.h:1564

IfxGtm_TIM4_6_P24_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P24_6_IN

IfxGtm_TIM4_6_P24_6_IN.

Definition: IfxGtm_PinMap.h:1451

IfxGtm_ATOM1_1_TOUT11_P00_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT11_P00_2_OUT

IfxGtm_ATOM1_1_TOUT11_P00_2_OUT.

Definition: IfxGtm_PinMap.h:282

IfxGtm_ATOM1_4_TOUT72_P15_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT72_P15_1_OUT

IfxGtm_ATOM1_4_TOUT72_P15_1_OUT.

Definition: IfxGtm_PinMap.h:337

IfxGtm_TOM1_9_TOUT1_P02_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT1_P02_1_OUT

IfxGtm_TOM1_9_TOUT1_P02_1_OUT.

Definition: IfxGtm_PinMap.h:2086

IfxGtm_TIM3_1_P12_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P12_1_IN

IfxGtm_TIM3_1_P12_1_IN.

Definition: IfxGtm_PinMap.h:1280

IfxGtm_TIM6_2_P24_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P24_2_IN

IfxGtm_TIM6_2_P24_2_IN.

Definition: IfxGtm_PinMap.h:1575

IfxGtm_TOM1_5N_TOUT144_P33_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT144_P33_15_OUT

IfxGtm_TOM1_5N_TOUT144_P33_15_OUT.

Definition: IfxGtm_PinMap.h:1988

IfxGtm_TOM3_3N_TOUT270_P10_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT270_P10_15_OUT

IfxGtm_TOM3_3N_TOUT270_P10_15_OUT.

Definition: IfxGtm_PinMap.h:2345

IfxGtm_ATOM3_5_TOUT115_P01_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT115_P01_7_OUT

IfxGtm_ATOM3_5_TOUT115_P01_7_OUT.

Definition: IfxGtm_PinMap.h:583

IfxGtm_TOM3_5_TOUT179_P31_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_5_TOUT179_P31_5_OUT

IfxGtm_TOM3_5_TOUT179_P31_5_OUT.

Definition: IfxGtm_PinMap.h:2375

IfxGtm_TOM0_6N_TOUT86_P14_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT86_P14_6_OUT

IfxGtm_TOM0_6N_TOUT86_P14_6_OUT.

Definition: IfxGtm_PinMap.h:1803

IfxGtm_TOM2_7N_TOUT252_P13_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT252_P13_14_OUT

IfxGtm_TOM2_7N_TOUT252_P13_14_OUT.

Definition: IfxGtm_PinMap.h:2240

IfxGtm_TOM0_3N_TOUT16_P00_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT16_P00_7_OUT

IfxGtm_TOM0_3N_TOUT16_P00_7_OUT.

Definition: IfxGtm_PinMap.h:1712

IfxGtm_TOM0_5N_TOUT26_P33_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT26_P33_4_OUT

IfxGtm_TOM0_5N_TOUT26_P33_4_OUT.

Definition: IfxGtm_PinMap.h:1764

IfxGtm_TOM2_3N_TOUT45_P23_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3N_TOUT45_P23_4_OUT

IfxGtm_TOM2_3N_TOUT45_P23_4_OUT.

Definition: IfxGtm_PinMap.h:2176

IfxGtm_TOM0_4N_TOUT10_P00_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT10_P00_1_OUT

IfxGtm_TOM0_4N_TOUT10_P00_1_OUT.

Definition: IfxGtm_PinMap.h:1731

IfxGtm_ATOM5_2N_TOUT179_P31_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT179_P31_5_OUT

IfxGtm_ATOM5_2N_TOUT179_P31_5_OUT.

Definition: IfxGtm_PinMap.h:771

IfxGtm_ATOM1_6N_TOUT11_P00_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT11_P00_2_OUT

IfxGtm_ATOM1_6N_TOUT11_P00_2_OUT.

Definition: IfxGtm_PinMap.h:358

IfxGtm_TIM0_7_P02_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P02_11_IN

IfxGtm_TIM0_7_P02_11_IN.

Definition: IfxGtm_PinMap.h:1097

IfxGtm_TIM3_2_P14_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P14_14_IN

IfxGtm_TIM3_2_P14_14_IN.

Definition: IfxGtm_PinMap.h:1293

IfxGtm_TIM4_1_P30_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P30_1_IN

IfxGtm_TIM4_1_P30_1_IN.

Definition: IfxGtm_PinMap.h:1389

IfxGtm_TIM5_2_P01_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P01_9_IN

IfxGtm_TIM5_2_P01_9_IN.

Definition: IfxGtm_PinMap.h:1488

IfxGtm_ATOM8_7_TOUT205_P30_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_7_TOUT205_P30_15_OUT

IfxGtm_ATOM8_7_TOUT205_P30_15_OUT.

Definition: IfxGtm_PinMap.h:1020

IfxGtm_TOM0_1N_TOUT4_P02_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT4_P02_4_OUT

IfxGtm_TOM0_1N_TOUT4_P02_4_OUT.

Definition: IfxGtm_PinMap.h:1674

IfxGtm_TIM0_6_P01_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P01_4_IN

IfxGtm_TIM0_6_P01_4_IN.

Definition: IfxGtm_PinMap.h:1088

IfxGtm_TIM5_1_P31_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P31_9_IN

IfxGtm_TIM5_1_P31_9_IN.

Definition: IfxGtm_PinMap.h:1485

IfxGtm_TIM6_7_P24_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P24_7_IN

IfxGtm_TIM6_7_P24_7_IN.

Definition: IfxGtm_PinMap.h:1617

IfxGtm_ATOM4_1_TOUT54_P21_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT54_P21_3_OUT

IfxGtm_ATOM4_1_TOUT54_P21_3_OUT.

Definition: IfxGtm_PinMap.h:636

IfxGtm_ATOM0_6N_TOUT11_P00_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6N_TOUT11_P00_2_OUT

IfxGtm_ATOM0_6N_TOUT11_P00_2_OUT.

Definition: IfxGtm_PinMap.h:240

IfxGtm_Clk_Out

GTM Clock Output.

Definition: IfxGtm_PinMap.h:135

IfxGtm_ATOM2_3N_TOUT92_P13_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT92_P13_1_OUT

IfxGtm_ATOM2_3N_TOUT92_P13_1_OUT.

Definition: IfxGtm_PinMap.h:443

IfxGtm_ATOM4_5_TOUT128_P12_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT128_P12_0_OUT

IfxGtm_ATOM4_5_TOUT128_P12_0_OUT.

Definition: IfxGtm_PinMap.h:696

IfxGtm_ATOM3_1_TOUT43_P23_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT43_P23_2_OUT

IfxGtm_ATOM3_1_TOUT43_P23_2_OUT.

Definition: IfxGtm_PinMap.h:521

IfxGtm_TOM1_11_TOUT267_P10_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT267_P10_14_OUT

IfxGtm_TOM1_11_TOUT267_P10_14_OUT.

Definition: IfxGtm_PinMap.h:1883

IfxGtm_ATOM1_4N_TOUT3_P02_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT3_P02_3_OUT

IfxGtm_ATOM1_4N_TOUT3_P02_3_OUT.

Definition: IfxGtm_PinMap.h:326

IfxGtm_TOM0_7_TOUT81_P14_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT81_P14_1_OUT

IfxGtm_TOM0_7_TOUT81_P14_1_OUT.

Definition: IfxGtm_PinMap.h:1847

IfxGtm_Atom_ToutMap::toutn

uint32 toutn

TOUT number.

Definition: IfxGtm_PinMap.h:115

IfxGtm_TIM4_3_P10_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P10_5_IN

IfxGtm_TIM4_3_P10_5_IN.

Definition: IfxGtm_PinMap.h:1409

IfxGtm_TOM4_7_TOUT118_P02_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_7_TOUT118_P02_11_OUT

IfxGtm_TOM4_7_TOUT118_P02_11_OUT.

Definition: IfxGtm_PinMap.h:2482

IfxGtm_TOM1_2N_TOUT5_P02_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT5_P02_5_OUT

IfxGtm_TOM1_2N_TOUT5_P02_5_OUT.

Definition: IfxGtm_PinMap.h:1931

IfxGtm_TIM3_4_P15_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P15_1_IN

IfxGtm_TIM3_4_P15_1_IN.

Definition: IfxGtm_PinMap.h:1319

IfxGtm_ATOM5_0N_TOUT264_P13_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT264_P13_15_OUT

IfxGtm_ATOM5_0N_TOUT264_P13_15_OUT.

Definition: IfxGtm_PinMap.h:736

IfxGtm_TIM4_5_P25_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P25_13_IN

IfxGtm_TIM4_5_P25_13_IN.

Definition: IfxGtm_PinMap.h:1440

IfxGtm_ATOM2_1_TOUT27_P33_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT27_P33_5_OUT

IfxGtm_ATOM2_1_TOUT27_P33_5_OUT.

Definition: IfxGtm_PinMap.h:410

IfxGtm_ATOM1_1N_TOUT61_P20_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1N_TOUT61_P20_3_OUT

IfxGtm_ATOM1_1N_TOUT61_P20_3_OUT.

Definition: IfxGtm_PinMap.h:277

IfxGtm_TOM1_15_TOUT7_P02_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT7_P02_7_OUT

IfxGtm_TOM1_15_TOUT7_P02_7_OUT.

Definition: IfxGtm_PinMap.h:1905

IfxGtm_ATOM1_1_TOUT86_P14_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT86_P14_6_OUT

IfxGtm_ATOM1_1_TOUT86_P14_6_OUT.

Definition: IfxGtm_PinMap.h:288

IfxGtm_TOM0_6N_TOUT54_P21_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT54_P21_3_OUT

IfxGtm_TOM0_6N_TOUT54_P21_3_OUT.

Definition: IfxGtm_PinMap.h:1798

IfxGtm_ATOM2_0N_TOUT25_P33_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0N_TOUT25_P33_3_OUT

IfxGtm_ATOM2_0N_TOUT25_P33_3_OUT.

Definition: IfxGtm_PinMap.h:390

IfxGtm_TOM4_14_TOUT236_P24_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_14_TOUT236_P24_14_OUT

IfxGtm_TOM4_14_TOUT236_P24_14_OUT.

Definition: IfxGtm_PinMap.h:2445

IfxGtm_TIM2_7_P11_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P11_14_IN

IfxGtm_TIM2_7_P11_14_IN.

Definition: IfxGtm_PinMap.h:1253

IfxGtm_TIM0_6_P23_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P23_2_IN

IfxGtm_TIM0_6_P23_2_IN.

Definition: IfxGtm_PinMap.h:1095

IfxGtm_ATOM5_6_TOUT270_P10_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT270_P10_15_OUT

IfxGtm_ATOM5_6_TOUT270_P10_15_OUT.

Definition: IfxGtm_PinMap.h:854

IfxGtm_ATOM4_2N_TOUT52_P21_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2N_TOUT52_P21_1_OUT

IfxGtm_ATOM4_2N_TOUT52_P21_1_OUT.

Definition: IfxGtm_PinMap.h:644

IfxGtm_TOM3_4_TOUT114_P01_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT114_P01_6_OUT

IfxGtm_TOM3_4_TOUT114_P01_6_OUT.

Definition: IfxGtm_PinMap.h:2360

IfxGtm_ATOM8_4_TOUT167_P00_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_4_TOUT167_P00_13_OUT

IfxGtm_ATOM8_4_TOUT167_P00_13_OUT.

Definition: IfxGtm_PinMap.h:1000

IfxGtm_TOM0_11_TOUT49_P22_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT49_P22_2_OUT

IfxGtm_TOM0_11_TOUT49_P22_2_OUT.

Definition: IfxGtm_PinMap.h:1650

IfxGtm_TOM1_0N_TOUT34_P33_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0N_TOUT34_P33_12_OUT

IfxGtm_TOM1_0N_TOUT34_P33_12_OUT.

Definition: IfxGtm_PinMap.h:1865

IfxGtm_TOM1_5N_TOUT148_P34_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT148_P34_3_OUT

IfxGtm_TOM1_5N_TOUT148_P34_3_OUT.

Definition: IfxGtm_PinMap.h:1989

IfxGtm_TIM3_3_P20_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P20_1_IN

IfxGtm_TIM3_3_P20_1_IN.

Definition: IfxGtm_PinMap.h:1308

IfxGtm_ATOM5_1N_TOUT178_P31_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT178_P31_4_OUT

IfxGtm_ATOM5_1N_TOUT178_P31_4_OUT.

Definition: IfxGtm_PinMap.h:751

IfxGtm_ATOM2_2N_TOUT35_P33_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT35_P33_13_OUT

IfxGtm_ATOM2_2N_TOUT35_P33_13_OUT.

Definition: IfxGtm_PinMap.h:421

IfxGtm_TOM3_12_TOUT167_P00_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_12_TOUT167_P00_13_OUT

IfxGtm_TOM3_12_TOUT167_P00_13_OUT.

Definition: IfxGtm_PinMap.h:2287

IfxGtm_TIM4_4_P10_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P10_13_IN

IfxGtm_TIM4_4_P10_13_IN.

Definition: IfxGtm_PinMap.h:1420

IfxGtm_ATOM4_4N_TOUT71_P15_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT71_P15_0_OUT

IfxGtm_ATOM4_4N_TOUT71_P15_0_OUT.

Definition: IfxGtm_PinMap.h:676

IfxGtm_TOM1_14_TOUT6_P02_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT6_P02_6_OUT

IfxGtm_TOM1_14_TOUT6_P02_6_OUT.

Definition: IfxGtm_PinMap.h:1900

IfxGtm_ATOM1_4_TOUT39_P32_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT39_P32_3_OUT

IfxGtm_ATOM1_4_TOUT39_P32_3_OUT.

Definition: IfxGtm_PinMap.h:334

IfxGtm_TIM3_2_P33_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P33_2_IN

IfxGtm_TIM3_2_P33_2_IN.

Definition: IfxGtm_PinMap.h:1299

IfxGtm_ATOM6_4_TOUT261_P14_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT261_P14_12_OUT

IfxGtm_ATOM6_4_TOUT261_P14_12_OUT.

Definition: IfxGtm_PinMap.h:905

IfxGtm_TIM2_2_P01_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P01_5_IN

IfxGtm_TIM2_2_P01_5_IN.

Definition: IfxGtm_PinMap.h:1196

IfxGtm_TOM0_5_TOUT11_P00_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT11_P00_2_OUT

IfxGtm_TOM0_5_TOUT11_P00_2_OUT.

Definition: IfxGtm_PinMap.h:1777

IfxGtm_ATOM2_1N_TOUT91_P13_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT91_P13_0_OUT

IfxGtm_ATOM2_1N_TOUT91_P13_0_OUT.

Definition: IfxGtm_PinMap.h:405

IfxGtm_TIM1_5_P21_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P21_7_IN

IfxGtm_TIM1_5_P21_7_IN.

Definition: IfxGtm_PinMap.h:1157

IfxGtm_TOM3_5N_TOUT268_P10_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_5N_TOUT268_P10_13_OUT

IfxGtm_TOM3_5N_TOUT268_P10_13_OUT.

Definition: IfxGtm_PinMap.h:2371

IfxGtm_TIM6_6_P25_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P25_6_IN

IfxGtm_TIM6_6_P25_6_IN.

Definition: IfxGtm_PinMap.h:1609

IfxGtm_TOM1_0_TOUT85_P14_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT85_P14_5_OUT

IfxGtm_TOM1_0_TOUT85_P14_5_OUT.

Definition: IfxGtm_PinMap.h:1875

IfxGtm_ATOM2_2N_TOUT99_P11_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT99_P11_10_OUT

IfxGtm_ATOM2_2N_TOUT99_P11_10_OUT.

Definition: IfxGtm_PinMap.h:425

IfxGtm_TOM4_6_TOUT196_P30_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_6_TOUT196_P30_6_OUT

IfxGtm_TOM4_6_TOUT196_P30_6_OUT.

Definition: IfxGtm_PinMap.h:2479

IfxGtm_ATOM5_5_TOUT246_P15_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT246_P15_14_OUT

IfxGtm_ATOM5_5_TOUT246_P15_14_OUT.

Definition: IfxGtm_PinMap.h:836

IfxGtm_TOM0_6N_TOUT5_P02_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT5_P02_5_OUT

IfxGtm_TOM0_6N_TOUT5_P02_5_OUT.

Definition: IfxGtm_PinMap.h:1799

IfxGtm_ATOM2_6N_TOUT95_P11_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6N_TOUT95_P11_2_OUT

IfxGtm_ATOM2_6N_TOUT95_P11_2_OUT.

Definition: IfxGtm_PinMap.h:476

IfxGtm_TIM4_5_P33_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P33_5_IN

IfxGtm_TIM4_5_P33_5_IN.

Definition: IfxGtm_PinMap.h:1443

IfxGtm_TOM4_5_TOUT116_P02_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_5_TOUT116_P02_9_OUT

IfxGtm_TOM4_5_TOUT116_P02_9_OUT.

Definition: IfxGtm_PinMap.h:2472

IfxGtm_TIM3_4_P14_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P14_12_IN

IfxGtm_TIM3_4_P14_12_IN.

Definition: IfxGtm_PinMap.h:1318

IfxGtm_TOM0_5N_TOUT148_P34_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT148_P34_3_OUT

IfxGtm_TOM0_5N_TOUT148_P34_3_OUT.

Definition: IfxGtm_PinMap.h:1763

IfxGtm_ATOM4_6_TOUT129_P12_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT129_P12_1_OUT

IfxGtm_ATOM4_6_TOUT129_P12_1_OUT.

Definition: IfxGtm_PinMap.h:710

IfxGtm_TOM0_8_TOUT94_P13_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT94_P13_3_OUT

IfxGtm_TOM0_8_TOUT94_P13_3_OUT.

Definition: IfxGtm_PinMap.h:1855

IfxGtm_TOM0_1N_TOUT107_P10_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT107_P10_5_OUT

IfxGtm_TOM0_1N_TOUT107_P10_5_OUT.

Definition: IfxGtm_PinMap.h:1667

IfxGtm_TOM1_5_TOUT2_P02_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT2_P02_2_OUT

IfxGtm_TOM1_5_TOUT2_P02_2_OUT.

Definition: IfxGtm_PinMap.h:2007

IfxGtm_ATOM8_1_TOUT199_P30_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_1_TOUT199_P30_9_OUT

IfxGtm_ATOM8_1_TOUT199_P30_9_OUT.

Definition: IfxGtm_PinMap.h:986

IfxGtm_TIM6_0_P10_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P10_9_IN

IfxGtm_TIM6_0_P10_9_IN.

Definition: IfxGtm_PinMap.h:1553

IfxGtm_TOM2_9_TOUT52_P21_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_9_TOUT52_P21_1_OUT

IfxGtm_TOM2_9_TOUT52_P21_1_OUT.

Definition: IfxGtm_PinMap.h:2261

IfxGtm_TOM1_12_TOUT4_P02_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT4_P02_4_OUT

IfxGtm_TOM1_12_TOUT4_P02_4_OUT.

Definition: IfxGtm_PinMap.h:1889

IfxGtm_TOM0_3_TOUT3_P02_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT3_P02_3_OUT

IfxGtm_TOM0_3_TOUT3_P02_3_OUT.

Definition: IfxGtm_PinMap.h:1726

IfxGtm_TIM5_1_P02_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P02_15_IN

IfxGtm_TIM5_1_P02_15_IN.

Definition: IfxGtm_PinMap.h:1479

IfxGtm_TOM2_9_TOUT69_P20_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_9_TOUT69_P20_13_OUT

IfxGtm_TOM2_9_TOUT69_P20_13_OUT.

Definition: IfxGtm_PinMap.h:2262

IfxGtm_ATOM8_3_TOUT166_P00_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_3_TOUT166_P00_14_OUT

IfxGtm_ATOM8_3_TOUT166_P00_14_OUT.

Definition: IfxGtm_PinMap.h:995

IfxGtm_TOM1_3_TOUT3_P02_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT3_P02_3_OUT

IfxGtm_TOM1_3_TOUT3_P02_3_OUT.

Definition: IfxGtm_PinMap.h:1955

IfxGtm_TIM5_7_P21_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P21_5_IN

IfxGtm_TIM5_7_P21_5_IN.

Definition: IfxGtm_PinMap.h:1546

IfxGtm_TOM1_6N_TOUT30_P33_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT30_P33_8_OUT

IfxGtm_TOM1_6N_TOUT30_P33_8_OUT.

Definition: IfxGtm_PinMap.h:2023

IfxGtm_ATOM0_7N_TOUT28_P33_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7N_TOUT28_P33_6_OUT

IfxGtm_ATOM0_7N_TOUT28_P33_6_OUT.

Definition: IfxGtm_PinMap.h:254

IfxGtm_TOM3_3N_TOUT160_P01_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT160_P01_9_OUT

IfxGtm_TOM3_3N_TOUT160_P01_9_OUT.

Definition: IfxGtm_PinMap.h:2340

IfxGtm_TIM4_5_P15_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P15_14_IN

IfxGtm_TIM4_5_P15_14_IN.

Definition: IfxGtm_PinMap.h:1437

IfxGtm_TOM0_11_TOUT43_P23_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT43_P23_2_OUT

IfxGtm_TOM0_11_TOUT43_P23_2_OUT.

Definition: IfxGtm_PinMap.h:1649

IfxGtm_TOM3_2_TOUT157_P01_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT157_P01_15_OUT

IfxGtm_TOM3_2_TOUT157_P01_15_OUT.

Definition: IfxGtm_PinMap.h:2332

IfxGtm_TIM3_5_P13_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P13_13_IN

IfxGtm_TIM3_5_P13_13_IN.

Definition: IfxGtm_PinMap.h:1329

IfxGtm_TIM6_4_P25_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P25_4_IN

IfxGtm_TIM6_4_P25_4_IN.

Definition: IfxGtm_PinMap.h:1593

IfxGtm_TIM2_1_P31_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P31_1_IN

IfxGtm_TIM2_1_P31_1_IN.

Definition: IfxGtm_PinMap.h:1192

IfxGtm_TIM0_2_P21_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P21_4_IN

IfxGtm_TIM0_2_P21_4_IN.

Definition: IfxGtm_PinMap.h:1055

IfxGtm_ATOM1_1N_TOUT14_P00_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1N_TOUT14_P00_5_OUT

IfxGtm_ATOM1_1N_TOUT14_P00_5_OUT.

Definition: IfxGtm_PinMap.h:274

IfxGtm_TOM3_0_TOUT115_P01_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_0_TOUT115_P01_7_OUT

IfxGtm_TOM3_0_TOUT115_P01_7_OUT.

Definition: IfxGtm_PinMap.h:2269

IfxGtm_TOM3_6_TOUT266_P10_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_6_TOUT266_P10_10_OUT

IfxGtm_TOM3_6_TOUT266_P10_10_OUT.

Definition: IfxGtm_PinMap.h:2391

IfxGtm_TIM3_6_P11_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P11_11_IN

IfxGtm_TIM3_6_P11_11_IN.

Definition: IfxGtm_PinMap.h:1340

IfxGtm_TOM2_4_TOUT98_P11_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT98_P11_9_OUT

IfxGtm_TOM2_4_TOUT98_P11_9_OUT.

Definition: IfxGtm_PinMap.h:2206

IfxGtm_TOM3_4N_TOUT244_P15_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_4N_TOUT244_P15_12_OUT

IfxGtm_TOM3_4N_TOUT244_P15_12_OUT.

Definition: IfxGtm_PinMap.h:2357

IfxGtm_TIM4_3_P21_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P21_7_IN

IfxGtm_TIM4_3_P21_7_IN.

Definition: IfxGtm_PinMap.h:1412

IfxGtm_TIM6_0_P30_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P30_8_IN

IfxGtm_TIM6_0_P30_8_IN.

Definition: IfxGtm_PinMap.h:1559

IfxGtm_TOM2_6_TOUT92_P13_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT92_P13_1_OUT

IfxGtm_TOM2_6_TOUT92_P13_1_OUT.

Definition: IfxGtm_PinMap.h:2236

IfxGtm_TOM1_2N_TOUT15_P00_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT15_P00_6_OUT

IfxGtm_TOM1_2N_TOUT15_P00_6_OUT.

Definition: IfxGtm_PinMap.h:1926

IfxGtm_TOM2_1_TOUT54_P21_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1_TOUT54_P21_3_OUT

IfxGtm_TOM2_1_TOUT54_P21_3_OUT.

Definition: IfxGtm_PinMap.h:2153

IfxGtm_TOM2_3N_TOUT256_P13_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3N_TOUT256_P13_7_OUT

IfxGtm_TOM2_3N_TOUT256_P13_7_OUT.

Definition: IfxGtm_PinMap.h:2175

IfxGtm_ATOM8_1_TOUT251_P13_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_1_TOUT251_P13_10_OUT

IfxGtm_ATOM8_1_TOUT251_P13_10_OUT.

Definition: IfxGtm_PinMap.h:988

IfxGtm_TOM4_9_TOUT259_P14_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_9_TOUT259_P14_14_OUT

IfxGtm_TOM4_9_TOUT259_P14_14_OUT.

Definition: IfxGtm_PinMap.h:2496

IfxGtm_TOM2_3_TOUT56_P21_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT56_P21_5_OUT

IfxGtm_TOM2_3_TOUT56_P21_5_OUT.

Definition: IfxGtm_PinMap.h:2183

IfxGtm_TOM1_1_TOUT242_P15_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT242_P15_10_OUT

IfxGtm_TOM1_1_TOUT242_P15_10_OUT.

Definition: IfxGtm_PinMap.h:1919

IfxGtm_ATOM0_1N_TOUT50_P22_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT50_P22_3_OUT

IfxGtm_ATOM0_1N_TOUT50_P22_3_OUT.

Definition: IfxGtm_PinMap.h:165

IfxGtm_TOM2_5_TOUT58_P21_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5_TOUT58_P21_7_OUT

IfxGtm_TOM2_5_TOUT58_P21_7_OUT.

Definition: IfxGtm_PinMap.h:2218

IfxGtm_TOM0_9_TOUT11_P00_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT11_P00_2_OUT

IfxGtm_TOM0_9_TOUT11_P00_2_OUT.

Definition: IfxGtm_PinMap.h:1859

IfxGtm_TOM3_9_TOUT183_P31_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_9_TOUT183_P31_9_OUT

IfxGtm_TOM3_9_TOUT183_P31_9_OUT.

Definition: IfxGtm_PinMap.h:2411

IfxGtm_TIM5_5_P00_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P00_1_IN

IfxGtm_TIM5_5_P00_1_IN.

Definition: IfxGtm_PinMap.h:1517

IfxGtm_ATOM4_5_TOUT65_P20_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT65_P20_9_OUT

IfxGtm_ATOM4_5_TOUT65_P20_9_OUT.

Definition: IfxGtm_PinMap.h:701

IfxGtm_TOM0_9_TOUT10_P00_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT10_P00_1_OUT

IfxGtm_TOM0_9_TOUT10_P00_1_OUT.

Definition: IfxGtm_PinMap.h:1858

IfxGtm_TOM0_0_TOUT26_P33_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT26_P33_4_OUT

IfxGtm_TOM0_0_TOUT26_P33_4_OUT.

Definition: IfxGtm_PinMap.h:1635

IfxGtm_TOM4_9_TOUT231_P24_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_9_TOUT231_P24_9_OUT

IfxGtm_TOM4_9_TOUT231_P24_9_OUT.

Definition: IfxGtm_PinMap.h:2495

IfxGtm_ATOM1_0_TOUT76_P15_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT76_P15_5_OUT

IfxGtm_ATOM1_0_TOUT76_P15_5_OUT.

Definition: IfxGtm_PinMap.h:267

IfxGtm_TIM6_5_P30_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P30_13_IN

IfxGtm_TIM6_5_P30_13_IN.

Definition: IfxGtm_PinMap.h:1602

IfxGtm_ATOM7_3_TOUT244_P15_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_3_TOUT244_P15_12_OUT

IfxGtm_ATOM7_3_TOUT244_P15_12_OUT.

Definition: IfxGtm_PinMap.h:950

IfxGtm_ATOM2_7_TOUT144_P33_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT144_P33_15_OUT

IfxGtm_ATOM2_7_TOUT144_P33_15_OUT.

Definition: IfxGtm_PinMap.h:490

IfxGtm_TOM3_3_TOUT113_P01_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3_TOUT113_P01_5_OUT

IfxGtm_TOM3_3_TOUT113_P01_5_OUT.

Definition: IfxGtm_PinMap.h:2346

IfxGtm_ATOM0_6N_TOUT149_P34_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6N_TOUT149_P34_4_OUT

IfxGtm_ATOM0_6N_TOUT149_P34_4_OUT.

Definition: IfxGtm_PinMap.h:242

IfxGtm_ATOM4_3N_TOUT66_P20_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3N_TOUT66_P20_10_OUT

IfxGtm_ATOM4_3N_TOUT66_P20_10_OUT.

Definition: IfxGtm_PinMap.h:661

IfxGtm_ATOM0_2_TOUT46_P23_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT46_P23_5_OUT

IfxGtm_ATOM0_2_TOUT46_P23_5_OUT.

Definition: IfxGtm_PinMap.h:193

IfxGtm_TIM6_6_P14_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P14_14_IN

IfxGtm_TIM6_6_P14_14_IN.

Definition: IfxGtm_PinMap.h:1606

IfxGtm_TOM1_5N_TOUT18_P00_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT18_P00_9_OUT

IfxGtm_TOM1_5N_TOUT18_P00_9_OUT.

Definition: IfxGtm_PinMap.h:1990

IfxGtm_TOM1_1N_TOUT14_P00_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT14_P00_5_OUT

IfxGtm_TOM1_1N_TOUT14_P00_5_OUT.

Definition: IfxGtm_PinMap.h:1906

IfxGtm_TIM6_2_P31_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P31_10_IN

IfxGtm_TIM6_2_P31_10_IN.

Definition: IfxGtm_PinMap.h:1578

IfxGtm_TIM5_5_P34_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P34_3_IN

IfxGtm_TIM5_5_P34_3_IN.

Definition: IfxGtm_PinMap.h:1528

IfxGtm_ATOM4_7_TOUT67_P20_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7_TOUT67_P20_11_OUT

IfxGtm_ATOM4_7_TOUT67_P20_11_OUT.

Definition: IfxGtm_PinMap.h:727

IfxGtm_TOM4_0_TOUT155_P01_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_0_TOUT155_P01_0_OUT

IfxGtm_TOM4_0_TOUT155_P01_0_OUT.

Definition: IfxGtm_PinMap.h:2416

IfxGtm_TIM3_6_P13_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P13_1_IN

IfxGtm_TIM3_6_P13_1_IN.

Definition: IfxGtm_PinMap.h:1341

IfxGtm_ATOM8_5_TOUT255_P13_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_5_TOUT255_P13_6_OUT

IfxGtm_ATOM8_5_TOUT255_P13_6_OUT.

Definition: IfxGtm_PinMap.h:1009

IfxGtm_ATOM3_4N_TOUT86_P14_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4N_TOUT86_P14_6_OUT

IfxGtm_ATOM3_4N_TOUT86_P14_6_OUT.

Definition: IfxGtm_PinMap.h:565

IfxGtm_TOM3_5_TOUT115_P01_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_5_TOUT115_P01_7_OUT

IfxGtm_TOM3_5_TOUT115_P01_7_OUT.

Definition: IfxGtm_PinMap.h:2372

IfxGtm_TIM0_3_P14_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P14_0_IN

IfxGtm_TIM0_3_P14_0_IN.

Definition: IfxGtm_PinMap.h:1065

IfxGtm_TIM4_5_P33_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P33_14_IN

IfxGtm_TIM4_5_P33_14_IN.

Definition: IfxGtm_PinMap.h:1442

IfxGtm_ATOM5_2_TOUT266_P10_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT266_P10_10_OUT

IfxGtm_ATOM5_2_TOUT266_P10_10_OUT.

Definition: IfxGtm_PinMap.h:786

IfxPort_OutputIdx

IfxPort_OutputIdx

Pin output alternate index.

Definition: IfxPort.h:126

IfxGtm_TOM2_9_TOUT103_P10_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_9_TOUT103_P10_1_OUT

IfxGtm_TOM2_9_TOUT103_P10_1_OUT.

Definition: IfxGtm_PinMap.h:2258

IfxGtm_TIM2_3_P20_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P20_1_IN

IfxGtm_TIM2_3_P20_1_IN.

Definition: IfxGtm_PinMap.h:1212

IfxGtm_ATOM4_2N_TOUT81_P14_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2N_TOUT81_P14_1_OUT

IfxGtm_ATOM4_2N_TOUT81_P14_1_OUT.

Definition: IfxGtm_PinMap.h:648

IfxGtm_TIM6_1_P01_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P01_13_IN

IfxGtm_TIM6_1_P01_13_IN.

Definition: IfxGtm_PinMap.h:1561

IfxGtm_TOM1_5_TOUT15_P00_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT15_P00_6_OUT

IfxGtm_TOM1_5_TOUT15_P00_6_OUT.

Definition: IfxGtm_PinMap.h:2003

IfxGtm_TOM2_7_TOUT126_P11_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7_TOUT126_P11_14_OUT

IfxGtm_TOM2_7_TOUT126_P11_14_OUT.

Definition: IfxGtm_PinMap.h:2247

IfxGtm_TOM2_5_TOUT132_P22_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5_TOUT132_P22_6_OUT

IfxGtm_TOM2_5_TOUT132_P22_6_OUT.

Definition: IfxGtm_PinMap.h:2216

IfxGtm_TOM1_5_TOUT41_P23_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT41_P23_0_OUT

IfxGtm_TOM1_5_TOUT41_P23_0_OUT.

Definition: IfxGtm_PinMap.h:2009

IfxGtm_TOM3_1_TOUT175_P31_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT175_P31_1_OUT

IfxGtm_TOM3_1_TOUT175_P31_1_OUT.

Definition: IfxGtm_PinMap.h:2319

IfxGtm_TOM1_6_TOUT29_P33_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT29_P33_7_OUT

IfxGtm_TOM1_6_TOUT29_P33_7_OUT.

Definition: IfxGtm_PinMap.h:2038

IfxGtm_TIM5_4_P34_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P34_2_IN

IfxGtm_TIM5_4_P34_2_IN.

Definition: IfxGtm_PinMap.h:1516

IfxGtm_Clk_Out::module

Ifx_GTM * module

Base address.

Definition: IfxGtm_PinMap.h:137

IfxGtm_TOM3_0_TOUT155_P01_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_0_TOUT155_P01_0_OUT

IfxGtm_TOM3_0_TOUT155_P01_0_OUT.

Definition: IfxGtm_PinMap.h:2271

IfxGtm_ATOM2_6_TOUT36_P32_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT36_P32_0_OUT

IfxGtm_ATOM2_6_TOUT36_P32_0_OUT.

Definition: IfxGtm_PinMap.h:481

IfxGtm_TOM3_13_TOUT168_P00_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_13_TOUT168_P00_15_OUT

IfxGtm_TOM3_13_TOUT168_P00_15_OUT.

Definition: IfxGtm_PinMap.h:2292

IfxGtm_CLK1_P32_4_OUT

IFX_EXTERN IfxGtm_Clk_Out IfxGtm_CLK1_P32_4_OUT

CGM generated clock.

Definition: IfxGtm_PinMap.h:1025

IfxGtm_TOM0_6N_TOUT82_P14_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT82_P14_2_OUT

IfxGtm_TOM0_6N_TOUT82_P14_2_OUT.

Definition: IfxGtm_PinMap.h:1802

IfxGtm_TOM2_4_TOUT123_P11_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT123_P11_7_OUT

IfxGtm_TOM2_4_TOUT123_P11_7_OUT.

Definition: IfxGtm_PinMap.h:2199

IfxGtm_TOM2_1N_TOUT123_P11_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT123_P11_7_OUT

IfxGtm_TOM2_1N_TOUT123_P11_7_OUT.

Definition: IfxGtm_PinMap.h:2137

IfxGtm_TIM0_0_P14_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P14_5_IN

IfxGtm_TIM0_0_P14_5_IN.

Definition: IfxGtm_PinMap.h:1031

IfxGtm_TOM3_15_TOUT152_P02_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_15_TOUT152_P02_15_OUT

IfxGtm_TOM3_15_TOUT152_P02_15_OUT.

Definition: IfxGtm_PinMap.h:2303

IfxGtm_ATOM4_3N_TOUT59_P20_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3N_TOUT59_P20_0_OUT

IfxGtm_ATOM4_3N_TOUT59_P20_0_OUT.

Definition: IfxGtm_PinMap.h:660

IfxGtm_ATOM5_3N_TOUT263_P14_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT263_P14_15_OUT

IfxGtm_ATOM5_3N_TOUT263_P14_15_OUT.

Definition: IfxGtm_PinMap.h:797

IfxGtm_TOM4_4_TOUT226_P24_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_4_TOUT226_P24_4_OUT

IfxGtm_TOM4_4_TOUT226_P24_4_OUT.

Definition: IfxGtm_PinMap.h:2469

IfxGtm_TOM1_4N_TOUT143_P33_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT143_P33_14_OUT

IfxGtm_TOM1_4N_TOUT143_P33_14_OUT.

Definition: IfxGtm_PinMap.h:1960

IfxGtm_ATOM4_5_TOUT56_P21_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT56_P21_5_OUT

IfxGtm_ATOM4_5_TOUT56_P21_5_OUT.

Definition: IfxGtm_PinMap.h:699

IfxGtm_TOM4_1_TOUT191_P30_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_1_TOUT191_P30_1_OUT

IfxGtm_TOM4_1_TOUT191_P30_1_OUT.

Definition: IfxGtm_PinMap.h:2454

IfxGtm_ATOM3_0_TOUT32_P33_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT32_P33_10_OUT

IfxGtm_ATOM3_0_TOUT32_P33_10_OUT.

Definition: IfxGtm_PinMap.h:504

IfxGtm_ATOM3_2N_TOUT114_P01_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT114_P01_6_OUT

IfxGtm_ATOM3_2N_TOUT114_P01_6_OUT.

Definition: IfxGtm_PinMap.h:525

IfxGtm_TOM1_3_TOUT29_P33_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT29_P33_7_OUT

IfxGtm_TOM1_3_TOUT29_P33_7_OUT.

Definition: IfxGtm_PinMap.h:1953

IfxGtm_TOM3_12_TOUT268_P10_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_12_TOUT268_P10_13_OUT

IfxGtm_TOM3_12_TOUT268_P10_13_OUT.

Definition: IfxGtm_PinMap.h:2290

IfxGtm_TOM2_3_TOUT49_P22_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT49_P22_2_OUT

IfxGtm_TOM2_3_TOUT49_P22_2_OUT.

Definition: IfxGtm_PinMap.h:2182

IfxGtm_TOM2_1N_TOUT90_P14_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT90_P14_10_OUT

IfxGtm_TOM2_1N_TOUT90_P14_10_OUT.

Definition: IfxGtm_PinMap.h:2146

IfxGtm_TIM5_7_P00_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P00_14_IN

IfxGtm_TIM5_7_P00_14_IN.

Definition: IfxGtm_PinMap.h:1541

IfxGtm_TOM0_7N_TOUT100_P11_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT100_P11_11_OUT

IfxGtm_TOM0_7N_TOUT100_P11_11_OUT.

Definition: IfxGtm_PinMap.h:1821

IfxGtm_TOM0_2_TOUT20_P00_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT20_P00_11_OUT

IfxGtm_TOM0_2_TOUT20_P00_11_OUT.

Definition: IfxGtm_PinMap.h:1702

IfxGtm_ATOM1_3_TOUT71_P15_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT71_P15_0_OUT

IfxGtm_ATOM1_3_TOUT71_P15_0_OUT.

Definition: IfxGtm_PinMap.h:319

IfxGtm_TIM6_1_P24_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P24_1_IN

IfxGtm_TIM6_1_P24_1_IN.

Definition: IfxGtm_PinMap.h:1566

IfxGtm_TIM3_6_P26_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P26_0_IN

IfxGtm_TIM3_6_P26_0_IN.

Definition: IfxGtm_PinMap.h:1349

IfxGtm_ATOM5_2_TOUT121_P11_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT121_P11_4_OUT

IfxGtm_ATOM5_2_TOUT121_P11_4_OUT.

Definition: IfxGtm_PinMap.h:777

IfxGtm_TOM4_14_TOUT204_P30_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_14_TOUT204_P30_14_OUT

IfxGtm_TOM4_14_TOUT204_P30_14_OUT.

Definition: IfxGtm_PinMap.h:2443

IfxGtm_TIM1_0_P33_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P33_4_IN

IfxGtm_TIM1_0_P33_4_IN.

Definition: IfxGtm_PinMap.h:1114

IfxGtm_ATOM3_3_TOUT113_P01_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT113_P01_5_OUT

IfxGtm_ATOM3_3_TOUT113_P01_5_OUT.

Definition: IfxGtm_PinMap.h:555

IfxGtm_TOM4_13_TOUT235_P24_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_13_TOUT235_P24_13_OUT

IfxGtm_TOM4_13_TOUT235_P24_13_OUT.

Definition: IfxGtm_PinMap.h:2439

IfxGtm_TOM0_5_TOUT128_P12_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT128_P12_0_OUT

IfxGtm_TOM0_5_TOUT128_P12_0_OUT.

Definition: IfxGtm_PinMap.h:1778

IfxGtm_TIM4_1_P10_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P10_9_IN

IfxGtm_TIM4_1_P10_9_IN.

Definition: IfxGtm_PinMap.h:1382

IfxGtm_TOM3_8_TOUT186_P31_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_8_TOUT186_P31_12_OUT

IfxGtm_TOM3_8_TOUT186_P31_12_OUT.

Definition: IfxGtm_PinMap.h:2406

IfxGtm_TOM3_11_TOUT221_P25_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_11_TOUT221_P25_15_OUT

IfxGtm_TOM3_11_TOUT221_P25_15_OUT.

Definition: IfxGtm_PinMap.h:2285

IfxGtm_TIM0_2_P15_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P15_8_IN

IfxGtm_TIM0_2_P15_8_IN.

Definition: IfxGtm_PinMap.h:1054

IfxGtm_TOM3_7_TOUT269_P10_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_7_TOUT269_P10_11_OUT

IfxGtm_TOM3_7_TOUT269_P10_11_OUT.

Definition: IfxGtm_PinMap.h:2403

IfxGtm_ATOM0_1_TOUT11_P00_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT11_P00_2_OUT

IfxGtm_ATOM0_1_TOUT11_P00_2_OUT.

Definition: IfxGtm_PinMap.h:172

IfxGtm_ATOM0_2N_TOUT41_P23_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT41_P23_0_OUT

IfxGtm_ATOM0_2N_TOUT41_P23_0_OUT.

Definition: IfxGtm_PinMap.h:182

IfxGtm_ATOM3_3_TOUT62_P20_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT62_P20_6_OUT

IfxGtm_ATOM3_3_TOUT62_P20_6_OUT.

Definition: IfxGtm_PinMap.h:558

IfxGtm_TOM3_12_TOUT186_P31_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_12_TOUT186_P31_12_OUT

IfxGtm_TOM3_12_TOUT186_P31_12_OUT.

Definition: IfxGtm_PinMap.h:2288

IfxGtm_TIM5_7_P31_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P31_15_IN

IfxGtm_TIM5_7_P31_15_IN.

Definition: IfxGtm_PinMap.h:1549

IfxGtm_ATOM6_6_TOUT147_P34_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_6_TOUT147_P34_2_OUT

IfxGtm_ATOM6_6_TOUT147_P34_2_OUT.

Definition: IfxGtm_PinMap.h:914

IfxGtm_TIM4_1_P25_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P25_9_IN

IfxGtm_TIM4_1_P25_9_IN.

Definition: IfxGtm_PinMap.h:1388

IfxGtm_TOM3_1_TOUT163_P01_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT163_P01_10_OUT

IfxGtm_TOM3_1_TOUT163_P01_10_OUT.

Definition: IfxGtm_PinMap.h:2318

IfxGtm_TIM4_2_P23_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P23_6_IN

IfxGtm_TIM4_2_P23_6_IN.

Definition: IfxGtm_PinMap.h:1400

IfxGtm_TOM0_11_TOUT97_P11_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT97_P11_6_OUT

IfxGtm_TOM0_11_TOUT97_P11_6_OUT.

Definition: IfxGtm_PinMap.h:1651

IfxGtm_TOM1_9_TOUT265_P10_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT265_P10_9_OUT

IfxGtm_TOM1_9_TOUT265_P10_9_OUT.

Definition: IfxGtm_PinMap.h:2087

IfxGtm_TOM4_2_TOUT224_P24_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_2_TOUT224_P24_2_OUT

IfxGtm_TOM4_2_TOUT224_P24_2_OUT.

Definition: IfxGtm_PinMap.h:2460

IfxGtm_TIM4_1_P00_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P00_15_IN

IfxGtm_TIM4_1_P00_15_IN.

Definition: IfxGtm_PinMap.h:1379

IfxGtm_TOM4_6_TOUT117_P02_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_6_TOUT117_P02_10_OUT

IfxGtm_TOM4_6_TOUT117_P02_10_OUT.

Definition: IfxGtm_PinMap.h:2477

IfxGtm_TOM3_4_TOUT134_P22_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT134_P22_8_OUT

IfxGtm_TOM3_4_TOUT134_P22_8_OUT.

Definition: IfxGtm_PinMap.h:2361

IfxGtm_ATOM5_4_TOUT134_P22_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT134_P22_8_OUT

IfxGtm_ATOM5_4_TOUT134_P22_8_OUT.

Definition: IfxGtm_PinMap.h:817

IfxGtm_TOM0_2N_TOUT15_P00_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT15_P00_6_OUT

IfxGtm_TOM0_2N_TOUT15_P00_6_OUT.

Definition: IfxGtm_PinMap.h:1692

IfxGtm_TOM3_2_TOUT266_P10_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT266_P10_10_OUT

IfxGtm_TOM3_2_TOUT266_P10_10_OUT.

Definition: IfxGtm_PinMap.h:2337

IfxGtm_TOM1_3N_TOUT16_P00_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3N_TOUT16_P00_7_OUT

IfxGtm_TOM1_3N_TOUT16_P00_7_OUT.

Definition: IfxGtm_PinMap.h:1943

IfxGtm_TIM1_0_P14_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P14_7_IN

IfxGtm_TIM1_0_P14_7_IN.

Definition: IfxGtm_PinMap.h:1109

IfxGtm_TOM0_3_TOUT118_P02_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT118_P02_11_OUT

IfxGtm_TOM0_3_TOUT118_P02_11_OUT.

Definition: IfxGtm_PinMap.h:1722

IfxGtm_TIM4_4_P30_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P30_4_IN

IfxGtm_TIM4_4_P30_4_IN.

Definition: IfxGtm_PinMap.h:1427

IfxGtm_TOM1_1N_TOUT245_P15_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT245_P15_13_OUT

IfxGtm_TOM1_1N_TOUT245_P15_13_OUT.

Definition: IfxGtm_PinMap.h:1908

IfxGtm_TIM6_7_P13_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P13_12_IN

IfxGtm_TIM6_7_P13_12_IN.

Definition: IfxGtm_PinMap.h:1614

IfxGtm_TOM3_1N_TOUT135_P22_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1N_TOUT135_P22_9_OUT

IfxGtm_TOM3_1N_TOUT135_P22_9_OUT.

Definition: IfxGtm_PinMap.h:2308

IfxGtm_TOM2_0_TOUT65_P20_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT65_P20_9_OUT

IfxGtm_TOM2_0_TOUT65_P20_9_OUT.

Definition: IfxGtm_PinMap.h:2101

IfxGtm_TOM3_10_TOUT164_P01_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_10_TOUT164_P01_14_OUT

IfxGtm_TOM3_10_TOUT164_P01_14_OUT.

Definition: IfxGtm_PinMap.h:2275

IfxGtm_TOM1_0_TOUT0_P02_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT0_P02_0_OUT

IfxGtm_TOM1_0_TOUT0_P02_0_OUT.

Definition: IfxGtm_PinMap.h:1868

IfxGtm_ATOM4_2N_TOUT73_P15_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2N_TOUT73_P15_2_OUT

IfxGtm_ATOM4_2N_TOUT73_P15_2_OUT.

Definition: IfxGtm_PinMap.h:647

IfxGtm_TIM0_0_P00_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P00_9_IN

IfxGtm_TIM0_0_P00_9_IN.

Definition: IfxGtm_PinMap.h:1027

IfxGtm_ATOM4_1N_TOUT53_P21_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT53_P21_2_OUT

IfxGtm_ATOM4_1N_TOUT53_P21_2_OUT.

Definition: IfxGtm_PinMap.h:628

IfxGtm_ATOM2_1_TOUT102_P10_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT102_P10_0_OUT

IfxGtm_ATOM2_1_TOUT102_P10_0_OUT.

Definition: IfxGtm_PinMap.h:408

IfxGtm_TIM1_1_P15_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P15_7_IN

IfxGtm_TIM1_1_P15_7_IN.

Definition: IfxGtm_PinMap.h:1119

IfxGtm_ATOM7_6_TOUT247_P15_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_6_TOUT247_P15_15_OUT

IfxGtm_ATOM7_6_TOUT247_P15_15_OUT.

Definition: IfxGtm_PinMap.h:970

IfxGtm_ATOM6_2_TOUT143_P33_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT143_P33_14_OUT

IfxGtm_ATOM6_2_TOUT143_P33_14_OUT.

Definition: IfxGtm_PinMap.h:884

IfxGtm_TOM3_4N_TOUT165_P01_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_4N_TOUT165_P01_11_OUT

IfxGtm_TOM3_4N_TOUT165_P01_11_OUT.

Definition: IfxGtm_PinMap.h:2354

IfxGtm_TIM1_0_P00_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P00_9_IN

IfxGtm_TIM1_0_P00_9_IN.

Definition: IfxGtm_PinMap.h:1105

IfxGtm_TOM1_4_TOUT39_P32_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT39_P32_3_OUT

IfxGtm_TOM1_4_TOUT39_P32_3_OUT.

Definition: IfxGtm_PinMap.h:1980

IfxGtm_TOM2_7N_TOUT109_P10_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT109_P10_7_OUT

IfxGtm_TOM2_7N_TOUT109_P10_7_OUT.

Definition: IfxGtm_PinMap.h:2237

IfxGtm_ATOM0_5_TOUT40_P32_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT40_P32_4_OUT

IfxGtm_ATOM0_5_TOUT40_P32_4_OUT.

Definition: IfxGtm_PinMap.h:234

IfxGtm_TOM2_5N_TOUT87_P14_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5N_TOUT87_P14_7_OUT

IfxGtm_TOM2_5N_TOUT87_P14_7_OUT.

Definition: IfxGtm_PinMap.h:2212

IfxGtm_TIM2_1_P00_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P00_2_IN

IfxGtm_TIM2_1_P00_2_IN.

Definition: IfxGtm_PinMap.h:1186

IfxGtm_ATOM1_4_TOUT102_P10_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT102_P10_0_OUT

IfxGtm_ATOM1_4_TOUT102_P10_0_OUT.

Definition: IfxGtm_PinMap.h:329

IfxGtm_TIM0_1_P15_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P15_7_IN

IfxGtm_TIM0_1_P15_7_IN.

Definition: IfxGtm_PinMap.h:1043

IfxGtm_PinMap_setTomTout

IFX_EXTERN void IfxGtm_PinMap_setTomTout(IfxGtm_Tom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)

Definition: IfxGtm_PinMap.c:2420

IfxGtm_ATOM1_0N_TOUT7_P02_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0N_TOUT7_P02_7_OUT

IfxGtm_ATOM1_0N_TOUT7_P02_7_OUT.

Definition: IfxGtm_PinMap.h:263

IfxGtm_TIM1_4_P14_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P14_1_IN

IfxGtm_TIM1_4_P14_1_IN.

Definition: IfxGtm_PinMap.h:1146

IfxGtm_TIM0_6_P10_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P10_15_IN

IfxGtm_TIM0_6_P10_15_IN.

Definition: IfxGtm_PinMap.h:1090

IfxGtm_ATOM2_6_TOUT139_P23_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT139_P23_7_OUT

IfxGtm_ATOM2_6_TOUT139_P23_7_OUT.

Definition: IfxGtm_PinMap.h:478

IfxGtm_ATOM3_5_TOUT35_P33_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT35_P33_13_OUT

IfxGtm_ATOM3_5_TOUT35_P33_13_OUT.

Definition: IfxGtm_PinMap.h:586

IfxGtm_TIM5_6_P01_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P01_6_IN

IfxGtm_TIM5_6_P01_6_IN.

Definition: IfxGtm_PinMap.h:1532

IfxGtm_TOM3_1_TOUT114_P01_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT114_P01_6_OUT

IfxGtm_TOM3_1_TOUT114_P01_6_OUT.

Definition: IfxGtm_PinMap.h:2315

IfxGtm_TOM1_6_TOUT24_P33_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT24_P33_2_OUT

IfxGtm_TOM1_6_TOUT24_P33_2_OUT.

Definition: IfxGtm_PinMap.h:2037

IfxGtm_TOM0_5_TOUT55_P21_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT55_P21_4_OUT

IfxGtm_TOM0_5_TOUT55_P21_4_OUT.

Definition: IfxGtm_PinMap.h:1783

IfxGtm_TOM0_14_TOUT6_P02_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT6_P02_6_OUT

IfxGtm_TOM0_14_TOUT6_P02_6_OUT.

Definition: IfxGtm_PinMap.h:1662

IfxGtm_TIM6_5_P23_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P23_2_IN

IfxGtm_TIM6_5_P23_2_IN.

Definition: IfxGtm_PinMap.h:1599

IfxGtm_TOM1_5_TOUT73_P15_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT73_P15_2_OUT

IfxGtm_TOM1_5_TOUT73_P15_2_OUT.

Definition: IfxGtm_PinMap.h:2012

IfxGtm_ATOM6_1_TOUT142_P32_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT142_P32_7_OUT

IfxGtm_ATOM6_1_TOUT142_P32_7_OUT.

Definition: IfxGtm_PinMap.h:876

IfxGtm_ATOM3_0_TOUT94_P13_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT94_P13_3_OUT

IfxGtm_ATOM3_0_TOUT94_P13_3_OUT.

Definition: IfxGtm_PinMap.h:506

IfxGtm_TOM1_4N_TOUT1_P02_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT1_P02_1_OUT

IfxGtm_TOM1_4N_TOUT1_P02_1_OUT.

Definition: IfxGtm_PinMap.h:1962

IfxGtm_ATOM1_7_TOUT7_P02_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT7_P02_7_OUT

IfxGtm_ATOM1_7_TOUT7_P02_7_OUT.

Definition: IfxGtm_PinMap.h:385

IfxGtm_TIM4_0_P10_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P10_8_IN

IfxGtm_TIM4_0_P10_8_IN.

Definition: IfxGtm_PinMap.h:1369

IfxGtm_TIM3_3_P13_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P13_4_IN

IfxGtm_TIM3_3_P13_4_IN.

Definition: IfxGtm_PinMap.h:1304

IfxGtm_ATOM5_3N_TOUT212_P26_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT212_P26_0_OUT

IfxGtm_ATOM5_3N_TOUT212_P26_0_OUT.

Definition: IfxGtm_PinMap.h:794

IfxGtm_ATOM3_6_TOUT100_P11_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT100_P11_11_OUT

IfxGtm_ATOM3_6_TOUT100_P11_11_OUT.

Definition: IfxGtm_PinMap.h:597

IfxGtm_ATOM0_0N_TOUT43_P23_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0N_TOUT43_P23_2_OUT

IfxGtm_ATOM0_0N_TOUT43_P23_2_OUT.

Definition: IfxGtm_PinMap.h:151

IfxGtm_ATOM5_7_TOUT213_P25_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7_TOUT213_P25_7_OUT

IfxGtm_ATOM5_7_TOUT213_P25_7_OUT.

Definition: IfxGtm_PinMap.h:865

IfxGtm_ATOM5_4_TOUT210_P25_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT210_P25_4_OUT

IfxGtm_ATOM5_4_TOUT210_P25_4_OUT.

Definition: IfxGtm_PinMap.h:821

IfxGtm_TOM0_5N_TOUT144_P33_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT144_P33_15_OUT

IfxGtm_TOM0_5N_TOUT144_P33_15_OUT.

Definition: IfxGtm_PinMap.h:1762

IfxGtm_TOM0_7_TOUT6_P02_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT6_P02_6_OUT

IfxGtm_TOM0_7_TOUT6_P02_6_OUT.

Definition: IfxGtm_PinMap.h:1845

IfxGtm_TIM5_6_P31_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P31_14_IN

IfxGtm_TIM5_6_P31_14_IN.

Definition: IfxGtm_PinMap.h:1538

IfxGtm_ATOM0_5_TOUT58_P21_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT58_P21_7_OUT

IfxGtm_ATOM0_5_TOUT58_P21_7_OUT.

Definition: IfxGtm_PinMap.h:236

IfxGtm_ATOM1_3_TOUT105_P10_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT105_P10_3_OUT

IfxGtm_ATOM1_3_TOUT105_P10_3_OUT.

Definition: IfxGtm_PinMap.h:312

IfxGtm_TIM5_2_P01_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P01_10_IN

IfxGtm_TIM5_2_P01_10_IN.

Definition: IfxGtm_PinMap.h:1487

IfxGtm_ATOM2_0N_TOUT12_P00_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0N_TOUT12_P00_3_OUT

IfxGtm_ATOM2_0N_TOUT12_P00_3_OUT.

Definition: IfxGtm_PinMap.h:388

IfxGtm_TIM0_2_P10_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P10_2_IN

IfxGtm_TIM0_2_P10_2_IN.

Definition: IfxGtm_PinMap.h:1052

IfxGtm_TOM1_5_TOUT82_P14_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT82_P14_2_OUT

IfxGtm_TOM1_5_TOUT82_P14_2_OUT.

Definition: IfxGtm_PinMap.h:2014

IfxGtm_TIM0_6_P20_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P20_0_IN

IfxGtm_TIM0_6_P20_0_IN.

Definition: IfxGtm_PinMap.h:1093

IfxGtm_ATOM6_7_TOUT244_P15_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_7_TOUT244_P15_12_OUT

IfxGtm_ATOM6_7_TOUT244_P15_12_OUT.

Definition: IfxGtm_PinMap.h:924

IfxGtm_ATOM0_5N_TOUT136_P22_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5N_TOUT136_P22_10_OUT

IfxGtm_ATOM0_5N_TOUT136_P22_10_OUT.

Definition: IfxGtm_PinMap.h:227

IfxGtm_TIM6_1_P10_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P10_10_IN

IfxGtm_TIM6_1_P10_10_IN.

Definition: IfxGtm_PinMap.h:1562

IfxGtm_TIM0_5_P23_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P23_0_IN

IfxGtm_TIM0_5_P23_0_IN.

Definition: IfxGtm_PinMap.h:1085

IfxGtm_TIM3_1_P00_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P00_2_IN

IfxGtm_TIM3_1_P00_2_IN.

Definition: IfxGtm_PinMap.h:1276

IfxGtm_TOM1_4_TOUT37_P32_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT37_P32_1_OUT

IfxGtm_TOM1_4_TOUT37_P32_1_OUT.

Definition: IfxGtm_PinMap.h:1979

IfxGtm_TOM2_15_TOUT75_P15_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_15_TOUT75_P15_4_OUT

IfxGtm_TOM2_15_TOUT75_P15_4_OUT.

Definition: IfxGtm_PinMap.h:2136

IfxGtm_TOM0_12_TOUT14_P00_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT14_P00_5_OUT

IfxGtm_TOM0_12_TOUT14_P00_5_OUT.

Definition: IfxGtm_PinMap.h:1652

IfxGtm_TOM1_7N_TOUT42_P23_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT42_P23_1_OUT

IfxGtm_TOM1_7N_TOUT42_P23_1_OUT.

Definition: IfxGtm_PinMap.h:2058

IfxGtm_TOM4_0_TOUT250_P13_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_0_TOUT250_P13_11_OUT

IfxGtm_TOM4_0_TOUT250_P13_11_OUT.

Definition: IfxGtm_PinMap.h:2420

IfxGtm_TOM1_6N_TOUT38_P32_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT38_P32_2_OUT

IfxGtm_TOM1_6N_TOUT38_P32_2_OUT.

Definition: IfxGtm_PinMap.h:2025

IfxGtm_ATOM0_0N_TOUT112_P01_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0N_TOUT112_P01_4_OUT

IfxGtm_ATOM0_0N_TOUT112_P01_4_OUT.

Definition: IfxGtm_PinMap.h:149

IfxGtm_ATOM3_0N_TOUT32_P33_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT32_P33_10_OUT

IfxGtm_ATOM3_0N_TOUT32_P33_10_OUT.

Definition: IfxGtm_PinMap.h:498

IfxGtm_ATOM7_2_TOUT164_P01_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_2_TOUT164_P01_14_OUT

IfxGtm_ATOM7_2_TOUT164_P01_14_OUT.

Definition: IfxGtm_PinMap.h:940

IfxGtm_TOM1_2_TOUT79_P15_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT79_P15_8_OUT

IfxGtm_TOM1_2_TOUT79_P15_8_OUT.

Definition: IfxGtm_PinMap.h:1941

IfxGtm_TOM3_7N_TOUT270_P10_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_7N_TOUT270_P10_15_OUT

IfxGtm_TOM3_7N_TOUT270_P10_15_OUT.

Definition: IfxGtm_PinMap.h:2397

IfxGtm_TOM3_3N_TOUT212_P26_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT212_P26_0_OUT

IfxGtm_TOM3_3N_TOUT212_P26_0_OUT.

Definition: IfxGtm_PinMap.h:2343

IfxGtm_ATOM5_2N_TOUT269_P10_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT269_P10_11_OUT

IfxGtm_ATOM5_2N_TOUT269_P10_11_OUT.

Definition: IfxGtm_PinMap.h:776

IfxGtm_TOM1_11_TOUT3_P02_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT3_P02_3_OUT

IfxGtm_TOM1_11_TOUT3_P02_3_OUT.

Definition: IfxGtm_PinMap.h:1884

IfxGtm_TOM4_11_TOUT205_P30_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_11_TOUT205_P30_15_OUT

IfxGtm_TOM4_11_TOUT205_P30_15_OUT.

Definition: IfxGtm_PinMap.h:2428

IfxGtm_ATOM4_1_TOUT84_P14_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT84_P14_4_OUT

IfxGtm_ATOM4_1_TOUT84_P14_4_OUT.

Definition: IfxGtm_PinMap.h:640

IfxGtm_ATOM0_1N_TOUT61_P20_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT61_P20_3_OUT

IfxGtm_ATOM0_1N_TOUT61_P20_3_OUT.

Definition: IfxGtm_PinMap.h:169

IfxGtm_TOM4_10_TOUT232_P24_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_10_TOUT232_P24_10_OUT

IfxGtm_TOM4_10_TOUT232_P24_10_OUT.

Definition: IfxGtm_PinMap.h:2424

IfxGtm_TOM2_4_TOUT254_P13_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT254_P13_5_OUT

IfxGtm_TOM2_4_TOUT254_P13_5_OUT.

Definition: IfxGtm_PinMap.h:2201

IfxGtm_ATOM5_1_TOUT207_P25_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT207_P25_1_OUT

IfxGtm_ATOM5_1_TOUT207_P25_1_OUT.

Definition: IfxGtm_PinMap.h:763

IfxGtm_TIM2_5_P20_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P20_9_IN

IfxGtm_TIM2_5_P20_9_IN.

Definition: IfxGtm_PinMap.h:1234

IfxGtm_ATOM4_4_TOUT264_P13_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT264_P13_15_OUT

IfxGtm_ATOM4_4_TOUT264_P13_15_OUT.

Definition: IfxGtm_PinMap.h:682

IfxGtm_TIM3_0_P13_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P13_11_IN

IfxGtm_TIM3_0_P13_11_IN.

Definition: IfxGtm_PinMap.h:1267

IfxGtm_ATOM2_6_TOUT92_P13_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT92_P13_1_OUT

IfxGtm_ATOM2_6_TOUT92_P13_1_OUT.

Definition: IfxGtm_PinMap.h:483

IfxGtm_ATOM0_2N_TOUT44_P23_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT44_P23_3_OUT

IfxGtm_ATOM0_2N_TOUT44_P23_3_OUT.

Definition: IfxGtm_PinMap.h:183

IfxGtm_TIM5_5_P24_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P24_13_IN

IfxGtm_TIM5_5_P24_13_IN.

Definition: IfxGtm_PinMap.h:1524

IfxGtm_ATOM2_2N_TOUT166_P00_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT166_P00_14_OUT

IfxGtm_ATOM2_2N_TOUT166_P00_14_OUT.

Definition: IfxGtm_PinMap.h:418

IfxGtm_TIM3_0_P00_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P00_0_IN

IfxGtm_TIM3_0_P00_0_IN.

Definition: IfxGtm_PinMap.h:1261

IfxGtm_ATOM8_5_TOUT262_P13_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_5_TOUT262_P13_13_OUT

IfxGtm_ATOM8_5_TOUT262_P13_13_OUT.

Definition: IfxGtm_PinMap.h:1010

IfxGtm_TOM2_2N_TOUT124_P11_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2N_TOUT124_P11_8_OUT

IfxGtm_TOM2_2N_TOUT124_P11_8_OUT.

Definition: IfxGtm_PinMap.h:2156

IfxGtm_TIM3_0_P12_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P12_0_IN

IfxGtm_TIM3_0_P12_0_IN.

Definition: IfxGtm_PinMap.h:1266

IfxGtm_TOM2_7_TOUT105_P10_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7_TOUT105_P10_3_OUT

IfxGtm_TOM2_7_TOUT105_P10_3_OUT.

Definition: IfxGtm_PinMap.h:2246

IfxGtm_ATOM4_0_TOUT85_P14_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT85_P14_5_OUT

IfxGtm_ATOM4_0_TOUT85_P14_5_OUT.

Definition: IfxGtm_PinMap.h:623

IfxGtm_ATOM2_4_TOUT98_P11_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT98_P11_9_OUT

IfxGtm_ATOM2_4_TOUT98_P11_9_OUT.

Definition: IfxGtm_PinMap.h:460

IfxGtm_TOM0_0N_TOUT72_P15_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT72_P15_1_OUT

IfxGtm_TOM0_0N_TOUT72_P15_1_OUT.

Definition: IfxGtm_PinMap.h:1627

IfxPort_OutputMode

IfxPort_OutputMode

Pin output mode definition.

Definition: IfxPort.h:140

IfxGtm_ATOM2_1_TOUT90_P14_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT90_P14_10_OUT

IfxGtm_ATOM2_1_TOUT90_P14_10_OUT.

Definition: IfxGtm_PinMap.h:412

IfxGtm_ATOM7_6_TOUT151_P02_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_6_TOUT151_P02_12_OUT

IfxGtm_ATOM7_6_TOUT151_P02_12_OUT.

Definition: IfxGtm_PinMap.h:966

IfxGtm_TOM0_1N_TOUT73_P15_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT73_P15_2_OUT

IfxGtm_TOM0_1N_TOUT73_P15_2_OUT.

Definition: IfxGtm_PinMap.h:1677

IfxGtm_ATOM7_3_TOUT267_P10_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_3_TOUT267_P10_14_OUT

IfxGtm_ATOM7_3_TOUT267_P10_14_OUT.

Definition: IfxGtm_PinMap.h:953

IfxGtm_TIM2_5_P11_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P11_10_IN

IfxGtm_TIM2_5_P11_10_IN.

Definition: IfxGtm_PinMap.h:1229

IfxGtm_TIM0_1_P33_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P33_5_IN

IfxGtm_TIM0_1_P33_5_IN.

Definition: IfxGtm_PinMap.h:1046

uint32

unsigned long uint32

Definition: Platform_Types.h:116

IfxGtm_TIM4_5_P24_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P24_5_IN

IfxGtm_TIM4_5_P24_5_IN.

Definition: IfxGtm_PinMap.h:1439

IfxGtm_TOM1_4N_TOUT71_P15_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT71_P15_0_OUT

IfxGtm_TOM1_4N_TOUT71_P15_0_OUT.

Definition: IfxGtm_PinMap.h:1969

IfxGtm_TIM3_1_P11_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P11_2_IN

IfxGtm_TIM3_1_P11_2_IN.

Definition: IfxGtm_PinMap.h:1279

IfxGtm_TIM1_3_P10_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P10_6_IN

IfxGtm_TIM1_3_P10_6_IN.

Definition: IfxGtm_PinMap.h:1137

IfxGtm_TOM4_11_TOUT166_P00_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_11_TOUT166_P00_14_OUT

IfxGtm_TOM4_11_TOUT166_P00_14_OUT.

Definition: IfxGtm_PinMap.h:2426

IfxGtm_TIM3_7_P25_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P25_7_IN

IfxGtm_TIM3_7_P25_7_IN.

Definition: IfxGtm_PinMap.h:1361

IfxGtm_TIM0_2_P10_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P10_5_IN

IfxGtm_TIM0_2_P10_5_IN.

Definition: IfxGtm_PinMap.h:1053

IfxGtm_ATOM8_1_TOUT258_P14_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_1_TOUT258_P14_11_OUT

IfxGtm_ATOM8_1_TOUT258_P14_11_OUT.

Definition: IfxGtm_PinMap.h:989

IfxGtm_TOM1_7N_TOUT16_P00_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT16_P00_7_OUT

IfxGtm_TOM1_7N_TOUT16_P00_7_OUT.

Definition: IfxGtm_PinMap.h:2051

IfxGtm_TIM3_7_P22_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P22_11_IN

IfxGtm_TIM3_7_P22_11_IN.

Definition: IfxGtm_PinMap.h:1360

IfxGtm_TIM5_1_P14_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P14_11_IN

IfxGtm_TIM5_1_P14_11_IN.

Definition: IfxGtm_PinMap.h:1481

IfxGtm_TOM3_2_TOUT208_P25_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT208_P25_2_OUT

IfxGtm_TOM3_2_TOUT208_P25_2_OUT.

Definition: IfxGtm_PinMap.h:2335

IfxGtm_TOM4_2_TOUT157_P01_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_2_TOUT157_P01_15_OUT

IfxGtm_TOM4_2_TOUT157_P01_15_OUT.

Definition: IfxGtm_PinMap.h:2457

IfxGtm_ATOM7_7_TOUT197_P30_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_7_TOUT197_P30_7_OUT

IfxGtm_ATOM7_7_TOUT197_P30_7_OUT.

Definition: IfxGtm_PinMap.h:976

IfxGtm_TIM4_6_P25_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P25_14_IN

IfxGtm_TIM4_6_P25_14_IN.

Definition: IfxGtm_PinMap.h:1452

IfxGtm_TIM2_2_P11_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P11_3_IN

IfxGtm_TIM2_2_P11_3_IN.

Definition: IfxGtm_PinMap.h:1197

IfxGtm_ATOM1_4N_TOUT131_P22_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT131_P22_5_OUT

IfxGtm_ATOM1_4N_TOUT131_P22_5_OUT.

Definition: IfxGtm_PinMap.h:323

IfxGtm_ATOM1_2N_TOUT15_P00_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT15_P00_6_OUT

IfxGtm_ATOM1_2N_TOUT15_P00_6_OUT.

Definition: IfxGtm_PinMap.h:291

IfxGtm_TIM4_6_P33_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P33_15_IN

IfxGtm_TIM4_6_P33_15_IN.

Definition: IfxGtm_PinMap.h:1454

IfxGtm_TIM0_3_P02_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P02_3_IN

IfxGtm_TIM0_3_P02_3_IN.

Definition: IfxGtm_PinMap.h:1061

IfxGtm_ATOM8_0_TOUT162_P01_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_0_TOUT162_P01_8_OUT

IfxGtm_ATOM8_0_TOUT162_P01_8_OUT.

Definition: IfxGtm_PinMap.h:980

IfxGtm_TOM3_4N_TOUT151_P02_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_4N_TOUT151_P02_12_OUT

IfxGtm_TOM3_4N_TOUT151_P02_12_OUT.

Definition: IfxGtm_PinMap.h:2353

IfxGtm_ATOM5_2_TOUT152_P02_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT152_P02_15_OUT

IfxGtm_ATOM5_2_TOUT152_P02_15_OUT.

Definition: IfxGtm_PinMap.h:780

IfxGtm_ATOM3_3N_TOUT33_P33_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT33_P33_11_OUT

IfxGtm_ATOM3_3N_TOUT33_P33_11_OUT.

Definition: IfxGtm_PinMap.h:549

IfxGtm_TIM4_0_P02_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P02_12_IN

IfxGtm_TIM4_0_P02_12_IN.

Definition: IfxGtm_PinMap.h:1367

IfxGtm_ChXSel_a

Definition: IfxGtm_PinMap.h:61

IfxGtm_Atom_ToutMap::toutSel

IfxGtm_ToutSel toutSel

TOUTSEL register control code.

Definition: IfxGtm_PinMap.h:114

IfxGtm_ATOM7_2_TOUT246_P15_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_2_TOUT246_P15_14_OUT

IfxGtm_ATOM7_2_TOUT246_P15_14_OUT.

Definition: IfxGtm_PinMap.h:944

IfxGtm_ATOM5_0N_TOUT213_P25_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT213_P25_7_OUT

IfxGtm_ATOM5_0N_TOUT213_P25_7_OUT.

Definition: IfxGtm_PinMap.h:734

IfxGtm_ATOM0_0_TOUT9_P00_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT9_P00_0_OUT

IfxGtm_ATOM0_0_TOUT9_P00_0_OUT.

Definition: IfxGtm_PinMap.h:159

IfxGtm_TIM2_6_P20_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P20_6_IN

IfxGtm_TIM2_6_P20_6_IN.

Definition: IfxGtm_PinMap.h:1246

IfxGtm_TOM2_11_TOUT63_P20_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_11_TOUT63_P20_7_OUT

IfxGtm_TOM2_11_TOUT63_P20_7_OUT.

Definition: IfxGtm_PinMap.h:2115

IfxGtm_TOM0_1_TOUT1_P02_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT1_P02_1_OUT

IfxGtm_TOM0_1_TOUT1_P02_1_OUT.

Definition: IfxGtm_PinMap.h:1683

IfxGtm_TOM0_0_TOUT151_P02_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT151_P02_12_OUT

IfxGtm_TOM0_0_TOUT151_P02_12_OUT.

Definition: IfxGtm_PinMap.h:1633

IfxGtm_TOM2_15_TOUT67_P20_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_15_TOUT67_P20_11_OUT

IfxGtm_TOM2_15_TOUT67_P20_11_OUT.

Definition: IfxGtm_PinMap.h:2135

IfxGtm_TOM3_9_TOUT219_P25_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_9_TOUT219_P25_13_OUT

IfxGtm_TOM3_9_TOUT219_P25_13_OUT.

Definition: IfxGtm_PinMap.h:2414

IfxGtm_ATOM4_0_TOUT87_P14_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT87_P14_7_OUT

IfxGtm_ATOM4_0_TOUT87_P14_7_OUT.

Definition: IfxGtm_PinMap.h:624

IfxGtm_TIM0_6_P10_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P10_4_IN

IfxGtm_TIM0_6_P10_4_IN.

Definition: IfxGtm_PinMap.h:1091

IfxGtm_TIM4_3_P11_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P11_5_IN

IfxGtm_TIM4_3_P11_5_IN.

Definition: IfxGtm_PinMap.h:1410

IfxGtm_TOM0_5_TOUT96_P11_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT96_P11_3_OUT

IfxGtm_TOM0_5_TOUT96_P11_3_OUT.

Definition: IfxGtm_PinMap.h:1789

IfxGtm_ATOM5_4_TOUT150_P34_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT150_P34_5_OUT

IfxGtm_ATOM5_4_TOUT150_P34_5_OUT.

Definition: IfxGtm_PinMap.h:818

IfxGtm_ATOM1_7N_TOUT150_P34_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT150_P34_5_OUT

IfxGtm_ATOM1_7N_TOUT150_P34_5_OUT.

Definition: IfxGtm_PinMap.h:376

IfxGtm_ATOM0_3_TOUT60_P20_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT60_P20_1_OUT

IfxGtm_ATOM0_3_TOUT60_P20_1_OUT.

Definition: IfxGtm_PinMap.h:210

IfxGtm_TIM3_2_P32_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P32_0_IN

IfxGtm_TIM3_2_P32_0_IN.

Definition: IfxGtm_PinMap.h:1298

IfxGtm_TIM5_1_P01_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P01_9_IN

IfxGtm_TIM5_1_P01_9_IN.

Definition: IfxGtm_PinMap.h:1478

IfxGtm_ATOM4_0_TOUT53_P21_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT53_P21_2_OUT

IfxGtm_ATOM4_0_TOUT53_P21_2_OUT.

Definition: IfxGtm_PinMap.h:619

IfxGtm_TOM4_4_TOUT111_P01_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_4_TOUT111_P01_3_OUT

IfxGtm_TOM4_4_TOUT111_P01_3_OUT.

Definition: IfxGtm_PinMap.h:2466

IfxGtm_TOM3_10_TOUT266_P10_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_10_TOUT266_P10_10_OUT

IfxGtm_TOM3_10_TOUT266_P10_10_OUT.

Definition: IfxGtm_PinMap.h:2280

IfxGtm_ATOM5_3N_TOUT249_P13_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT249_P13_12_OUT

IfxGtm_ATOM5_3N_TOUT249_P13_12_OUT.

Definition: IfxGtm_PinMap.h:796

IfxGtm_TIM2_2_P32_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P32_0_IN

IfxGtm_TIM2_2_P32_0_IN.

Definition: IfxGtm_PinMap.h:1204

IfxGtm_TIM5_1_P24_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P24_9_IN

IfxGtm_TIM5_1_P24_9_IN.

Definition: IfxGtm_PinMap.h:1483

IfxGtm_ATOM0_0N_TOUT7_P02_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0N_TOUT7_P02_7_OUT

IfxGtm_ATOM0_0N_TOUT7_P02_7_OUT.

Definition: IfxGtm_PinMap.h:153

IfxGtm_TIM2_3_P15_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P15_0_IN

IfxGtm_TIM2_3_P15_0_IN.

Definition: IfxGtm_PinMap.h:1210

IfxGtm_TIM3_0_P11_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P11_11_IN

IfxGtm_TIM3_0_P11_11_IN.

Definition: IfxGtm_PinMap.h:1265

IfxGtm_TOM0_6_TOUT92_P13_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT92_P13_1_OUT

IfxGtm_TOM0_6_TOUT92_P13_1_OUT.

Definition: IfxGtm_PinMap.h:1819

IfxGtm_TIM3_6_P34_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P34_3_IN

IfxGtm_TIM3_6_P34_3_IN.

Definition: IfxGtm_PinMap.h:1351

IfxGtm_Atom

IfxGtm_Atom

Enum for ATOM objects.

Definition: IfxGtm_cfg.h:243

IfxGtm_TOM0_2_TOUT28_P33_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT28_P33_6_OUT

IfxGtm_TOM0_2_TOUT28_P33_6_OUT.

Definition: IfxGtm_PinMap.h:1703

IfxGtm_TOM1_4_TOUT0_P02_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT0_P02_0_OUT

IfxGtm_TOM1_4_TOUT0_P02_0_OUT.

Definition: IfxGtm_PinMap.h:1973

IfxGtm_TIM0_7_P02_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P02_7_IN

IfxGtm_TIM0_7_P02_7_IN.

Definition: IfxGtm_PinMap.h:1098

IfxGtm_TOM1_3_TOUT118_P02_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT118_P02_11_OUT

IfxGtm_TOM1_3_TOUT118_P02_11_OUT.

Definition: IfxGtm_PinMap.h:1949

IfxGtm_ATOM4_5_TOUT58_P21_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT58_P21_7_OUT

IfxGtm_ATOM4_5_TOUT58_P21_7_OUT.

Definition: IfxGtm_PinMap.h:700

IfxGtm_ATOM3_5N_TOUT87_P14_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5N_TOUT87_P14_7_OUT

IfxGtm_ATOM3_5N_TOUT87_P14_7_OUT.

Definition: IfxGtm_PinMap.h:581

IfxGtm_TOM4_3_TOUT165_P01_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_3_TOUT165_P01_11_OUT

IfxGtm_TOM4_3_TOUT165_P01_11_OUT.

Definition: IfxGtm_PinMap.h:2462

IfxGtm_ATOM3_7N_TOUT28_P33_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7N_TOUT28_P33_6_OUT

IfxGtm_ATOM3_7N_TOUT28_P33_6_OUT.

Definition: IfxGtm_PinMap.h:605

IfxGtm_ToutSel_c

Definition: IfxGtm_PinMap.h:87

IfxGtm_TOM3_7N_TOUT157_P01_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_7N_TOUT157_P01_15_OUT

IfxGtm_TOM3_7N_TOUT157_P01_15_OUT.

Definition: IfxGtm_PinMap.h:2393

IfxGtm_TIM6_5_P25_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P25_5_IN

IfxGtm_TIM6_5_P25_5_IN.

Definition: IfxGtm_PinMap.h:1601

IfxGtm_ATOM2_1N_TOUT51_P21_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT51_P21_0_OUT

IfxGtm_ATOM2_1N_TOUT51_P21_0_OUT.

Definition: IfxGtm_PinMap.h:403

IfxGtm_TOM1_5_TOUT40_P32_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT40_P32_4_OUT

IfxGtm_TOM1_5_TOUT40_P32_4_OUT.

Definition: IfxGtm_PinMap.h:2008

IfxGtm_TOM1_7_TOUT31_P33_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT31_P33_9_OUT

IfxGtm_TOM1_7_TOUT31_P33_9_OUT.

Definition: IfxGtm_PinMap.h:2069

IfxGtm_TOM0_3_TOUT80_P14_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT80_P14_0_OUT

IfxGtm_TOM0_3_TOUT80_P14_0_OUT.

Definition: IfxGtm_PinMap.h:1729

IfxGtm_TOM3_8_TOUT214_P25_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_8_TOUT214_P25_8_OUT

IfxGtm_TOM3_8_TOUT214_P25_8_OUT.

Definition: IfxGtm_PinMap.h:2407

IfxGtm_TOM0_2N_TOUT108_P10_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT108_P10_6_OUT

IfxGtm_TOM0_2N_TOUT108_P10_6_OUT.

Definition: IfxGtm_PinMap.h:1689

IfxGtm_TOM0_3_TOUT38_P32_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT38_P32_2_OUT

IfxGtm_TOM0_3_TOUT38_P32_2_OUT.

Definition: IfxGtm_PinMap.h:1725

IfxGtm_TOM2_13_TOUT136_P22_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_13_TOUT136_P22_10_OUT

IfxGtm_TOM2_13_TOUT136_P22_10_OUT.

Definition: IfxGtm_PinMap.h:2123

IfxGtm_TIM4_1_P01_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P01_1_IN

IfxGtm_TIM4_1_P01_1_IN.

Definition: IfxGtm_PinMap.h:1380

IfxGtm_TOM0_4N_TOUT29_P33_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT29_P33_7_OUT

IfxGtm_TOM0_4N_TOUT29_P33_7_OUT.

Definition: IfxGtm_PinMap.h:1735

IfxGtm_ATOM4_6N_TOUT19_P00_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6N_TOUT19_P00_10_OUT

IfxGtm_ATOM4_6N_TOUT19_P00_10_OUT.

Definition: IfxGtm_PinMap.h:705

IfxGtm_TIM6_0_P23_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P23_7_IN

IfxGtm_TIM6_0_P23_7_IN.

Definition: IfxGtm_PinMap.h:1556

IfxGtm_ATOM4_3_TOUT43_P23_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3_TOUT43_P23_2_OUT

IfxGtm_ATOM4_3_TOUT43_P23_2_OUT.

Definition: IfxGtm_PinMap.h:666

IfxGtm_ATOM3_5_TOUT52_P21_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT52_P21_1_OUT

IfxGtm_ATOM3_5_TOUT52_P21_1_OUT.

Definition: IfxGtm_PinMap.h:587

IfxGtm_ATOM4_7_TOUT119_P11_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7_TOUT119_P11_0_OUT

IfxGtm_ATOM4_7_TOUT119_P11_0_OUT.

Definition: IfxGtm_PinMap.h:723

IfxGtm_ATOM4_6_TOUT139_P23_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT139_P23_7_OUT

IfxGtm_ATOM4_6_TOUT139_P23_7_OUT.

Definition: IfxGtm_PinMap.h:711

IfxGtm_ATOM2_5N_TOUT59_P20_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5N_TOUT59_P20_0_OUT

IfxGtm_ATOM2_5N_TOUT59_P20_0_OUT.

Definition: IfxGtm_PinMap.h:463

IfxGtm_ATOM8_7_TOUT161_P01_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_7_TOUT161_P01_13_OUT

IfxGtm_ATOM8_7_TOUT161_P01_13_OUT.

Definition: IfxGtm_PinMap.h:1019

IfxGtm_ATOM3_1N_TOUT30_P33_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT30_P33_8_OUT

IfxGtm_ATOM3_1N_TOUT30_P33_8_OUT.

Definition: IfxGtm_PinMap.h:510

IfxGtm_ChXSel_f

Definition: IfxGtm_PinMap.h:67

IfxGtm_TOM3_5N_TOUT155_P01_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_5N_TOUT155_P01_0_OUT

IfxGtm_TOM3_5N_TOUT155_P01_0_OUT.

Definition: IfxGtm_PinMap.h:2367

IfxGtm_TOM1_7_TOUT6_P02_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT6_P02_6_OUT

IfxGtm_TOM1_7_TOUT6_P02_6_OUT.

Definition: IfxGtm_PinMap.h:2074

IfxGtm_TOM1_1N_TOUT30_P33_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT30_P33_8_OUT

IfxGtm_TOM1_1N_TOUT30_P33_8_OUT.

Definition: IfxGtm_PinMap.h:1909

IfxGtm_TOM2_4N_TOUT120_P11_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT120_P11_1_OUT

IfxGtm_TOM2_4N_TOUT120_P11_1_OUT.

Definition: IfxGtm_PinMap.h:2189

IfxGtm_ATOM5_6N_TOUT156_P01_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6N_TOUT156_P01_2_OUT

IfxGtm_ATOM5_6N_TOUT156_P01_2_OUT.

Definition: IfxGtm_PinMap.h:840

IfxGtm_Atom_ToutMap::atom

IfxGtm_Atom atom

ATOM unit index.

Definition: IfxGtm_PinMap.h:112

IfxGtm_TOM2_7_TOUT130_P22_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7_TOUT130_P22_4_OUT

IfxGtm_TOM2_7_TOUT130_P22_4_OUT.

Definition: IfxGtm_PinMap.h:2248

IfxGtm_TOM0_3N_TOUT12_P00_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT12_P00_3_OUT

IfxGtm_TOM0_3N_TOUT12_P00_3_OUT.

Definition: IfxGtm_PinMap.h:1710

IfxGtm_TOM3_14_TOUT270_P10_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_14_TOUT270_P10_15_OUT

IfxGtm_TOM3_14_TOUT270_P10_15_OUT.

Definition: IfxGtm_PinMap.h:2301

IfxGtm_ATOM5_4_TOUT248_P13_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT248_P13_9_OUT

IfxGtm_ATOM5_4_TOUT248_P13_9_OUT.

Definition: IfxGtm_PinMap.h:823

IfxGtm_TIM4_3_P30_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P30_3_IN

IfxGtm_TIM4_3_P30_3_IN.

Definition: IfxGtm_PinMap.h:1416

IfxGtm_TOM0_2_TOUT55_P21_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT55_P21_4_OUT

IfxGtm_TOM0_2_TOUT55_P21_4_OUT.

Definition: IfxGtm_PinMap.h:1706

IfxGtm_TOM3_6N_TOUT154_P02_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_6N_TOUT154_P02_14_OUT

IfxGtm_TOM3_6N_TOUT154_P02_14_OUT.

Definition: IfxGtm_PinMap.h:2379

IfxGtm_ATOM1_2N_TOUT114_P01_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT114_P01_6_OUT

IfxGtm_ATOM1_2N_TOUT114_P01_6_OUT.

Definition: IfxGtm_PinMap.h:290

IfxGtm_TIM6_4_P13_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P13_9_IN

IfxGtm_TIM6_4_P13_9_IN.

Definition: IfxGtm_PinMap.h:1589

IfxGtm_TOM1_6N_TOUT19_P00_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT19_P00_10_OUT

IfxGtm_TOM1_6N_TOUT19_P00_10_OUT.

Definition: IfxGtm_PinMap.h:2020

IfxGtm_TOM0_7N_TOUT55_P21_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT55_P21_4_OUT

IfxGtm_TOM0_7N_TOUT55_P21_4_OUT.

Definition: IfxGtm_PinMap.h:1831

IfxGtm_ATOM7_1_TOUT265_P10_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT265_P10_9_OUT

IfxGtm_ATOM7_1_TOUT265_P10_9_OUT.

Definition: IfxGtm_PinMap.h:939

IfxGtm_TOM0_2N_TOUT40_P32_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT40_P32_4_OUT

IfxGtm_TOM0_2N_TOUT40_P32_4_OUT.

Definition: IfxGtm_PinMap.h:1694

IfxGtm_TOM4_13_TOUT263_P14_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_13_TOUT263_P14_15_OUT

IfxGtm_TOM4_13_TOUT263_P14_15_OUT.

Definition: IfxGtm_PinMap.h:2440

IfxGtm_TOM0_4_TOUT124_P11_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT124_P11_8_OUT

IfxGtm_TOM0_4_TOUT124_P11_8_OUT.

Definition: IfxGtm_PinMap.h:1747

IfxGtm_TOM0_4N_TOUT65_P20_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT65_P20_9_OUT

IfxGtm_TOM0_4N_TOUT65_P20_9_OUT.

Definition: IfxGtm_PinMap.h:1739

IfxGtm_ATOM4_2_TOUT70_P20_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT70_P20_14_OUT

IfxGtm_ATOM4_2_TOUT70_P20_14_OUT.

Definition: IfxGtm_PinMap.h:654

IfxGtm_ATOM3_2_TOUT44_P23_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT44_P23_3_OUT

IfxGtm_ATOM3_2_TOUT44_P23_3_OUT.

Definition: IfxGtm_PinMap.h:539

IfxGtm_TIM5_1_P00_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P00_15_IN

IfxGtm_TIM5_1_P00_15_IN.

Definition: IfxGtm_PinMap.h:1476

IfxGtm_ATOM6_2_TOUT259_P14_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT259_P14_14_OUT

IfxGtm_ATOM6_2_TOUT259_P14_14_OUT.

Definition: IfxGtm_PinMap.h:890

IfxGtm_ATOM0_4N_TOUT135_P22_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4N_TOUT135_P22_9_OUT

IfxGtm_ATOM0_4N_TOUT135_P22_9_OUT.

Definition: IfxGtm_PinMap.h:213

IfxGtm_ATOM6_1_TOUT164_P01_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT164_P01_14_OUT

IfxGtm_ATOM6_1_TOUT164_P01_14_OUT.

Definition: IfxGtm_PinMap.h:878

IfxGtm_ATOM3_1_TOUT111_P01_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT111_P01_3_OUT

IfxGtm_ATOM3_1_TOUT111_P01_3_OUT.

Definition: IfxGtm_PinMap.h:517

IfxGtm_TIM4_4_P10_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P10_1_IN

IfxGtm_TIM4_4_P10_1_IN.

Definition: IfxGtm_PinMap.h:1421

IfxGtm_ATOM4_0_TOUT39_P32_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT39_P32_3_OUT

IfxGtm_ATOM4_0_TOUT39_P32_3_OUT.

Definition: IfxGtm_PinMap.h:617

IfxGtm_ATOM3_3_TOUT29_P33_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT29_P33_7_OUT

IfxGtm_ATOM3_3_TOUT29_P33_7_OUT.

Definition: IfxGtm_PinMap.h:557

IfxGtm_ATOM0_3N_TOUT115_P01_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT115_P01_7_OUT

IfxGtm_ATOM0_3N_TOUT115_P01_7_OUT.

Definition: IfxGtm_PinMap.h:196

IfxGtm_TOM2_3N_TOUT77_P15_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3N_TOUT77_P15_6_OUT

IfxGtm_TOM2_3N_TOUT77_P15_6_OUT.

Definition: IfxGtm_PinMap.h:2178

IfxGtm_ATOM7_3_TOUT247_P15_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_3_TOUT247_P15_15_OUT

IfxGtm_ATOM7_3_TOUT247_P15_15_OUT.

Definition: IfxGtm_PinMap.h:951

IfxGtm_ATOM5_3N_TOUT125_P11_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT125_P11_13_OUT

IfxGtm_ATOM5_3N_TOUT125_P11_13_OUT.

Definition: IfxGtm_PinMap.h:788

IfxGtm_TIM0_1_P00_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P00_10_IN

IfxGtm_TIM0_1_P00_10_IN.

Definition: IfxGtm_PinMap.h:1038

IfxGtm_ATOM1_3N_TOUT16_P00_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3N_TOUT16_P00_7_OUT

IfxGtm_ATOM1_3N_TOUT16_P00_7_OUT.

Definition: IfxGtm_PinMap.h:307

IfxGtm_ATOM2_0_TOUT18_P00_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT18_P00_9_OUT

IfxGtm_ATOM2_0_TOUT18_P00_9_OUT.

Definition: IfxGtm_PinMap.h:394

IfxGtm_TIM3_4_P21_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P21_0_IN

IfxGtm_TIM3_4_P21_0_IN.

Definition: IfxGtm_PinMap.h:1321

IfxGtm_TOM0_7N_TOUT42_P23_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT42_P23_1_OUT

IfxGtm_TOM0_7N_TOUT42_P23_1_OUT.

Definition: IfxGtm_PinMap.h:1830

IfxGtm_TOM0_9_TOUT47_P22_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT47_P22_0_OUT

IfxGtm_TOM0_9_TOUT47_P22_0_OUT.

Definition: IfxGtm_PinMap.h:1861

IfxGtm_TIM3_1_P14_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P14_11_IN

IfxGtm_TIM3_1_P14_11_IN.

Definition: IfxGtm_PinMap.h:1282

IfxGtm_ATOM5_1_TOUT147_P34_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT147_P34_2_OUT

IfxGtm_ATOM5_1_TOUT147_P34_2_OUT.

Definition: IfxGtm_PinMap.h:759

IfxGtm_ATOM6_4_TOUT140_P32_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT140_P32_5_OUT

IfxGtm_ATOM6_4_TOUT140_P32_5_OUT.

Definition: IfxGtm_PinMap.h:899

IfxGtm_TOM2_2N_TOUT58_P21_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2N_TOUT58_P21_7_OUT

IfxGtm_TOM2_2N_TOUT58_P21_7_OUT.

Definition: IfxGtm_PinMap.h:2159

IfxGtm_ATOM7_7_TOUT152_P02_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_7_TOUT152_P02_15_OUT

IfxGtm_ATOM7_7_TOUT152_P02_15_OUT.

Definition: IfxGtm_PinMap.h:973

IfxGtm_TOM3_9_TOUT215_P25_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_9_TOUT215_P25_9_OUT

IfxGtm_TOM3_9_TOUT215_P25_9_OUT.

Definition: IfxGtm_PinMap.h:2413

IfxGtm_TOM2_1N_TOUT61_P20_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT61_P20_3_OUT

IfxGtm_TOM2_1N_TOUT61_P20_3_OUT.

Definition: IfxGtm_PinMap.h:2144

IfxGtm_TIM5_4_P13_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P13_5_IN

IfxGtm_TIM5_4_P13_5_IN.

Definition: IfxGtm_PinMap.h:1510

IfxGtm_TIM5_3_P13_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P13_4_IN

IfxGtm_TIM5_3_P13_4_IN.

Definition: IfxGtm_PinMap.h:1500

IfxGtm_Tim

IfxGtm_Tim

Enum for TIM objects.

Definition: IfxGtm_cfg.h:390

IfxGtm_ATOM2_4_TOUT167_P00_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT167_P00_13_OUT

IfxGtm_ATOM2_4_TOUT167_P00_13_OUT.

Definition: IfxGtm_PinMap.h:454

IfxGtm_TIM1_5_P23_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P23_0_IN

IfxGtm_TIM1_5_P23_0_IN.

Definition: IfxGtm_PinMap.h:1158

IfxGtm_TOM2_7N_TOUT98_P11_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT98_P11_9_OUT

IfxGtm_TOM2_7N_TOUT98_P11_9_OUT.

Definition: IfxGtm_PinMap.h:2244

IfxGtm_TIM2_0_P15_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P15_5_IN

IfxGtm_TIM2_0_P15_5_IN.

Definition: IfxGtm_PinMap.h:1180

IfxGtm_TOM1_13_TOUT146_P34_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT146_P34_1_OUT

IfxGtm_TOM1_13_TOUT146_P34_1_OUT.

Definition: IfxGtm_PinMap.h:1891

IfxGtm_TIM5_2_P22_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P22_10_IN

IfxGtm_TIM5_2_P22_10_IN.

Definition: IfxGtm_PinMap.h:1492

IfxGtm_TIM2_3_P31_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P31_3_IN

IfxGtm_TIM2_3_P31_3_IN.

Definition: IfxGtm_PinMap.h:1213

IfxGtm_TOM0_7_TOUT31_P33_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT31_P33_9_OUT

IfxGtm_TOM0_7_TOUT31_P33_9_OUT.

Definition: IfxGtm_PinMap.h:1842

IfxGtm_ATOM1_1N_TOUT39_P32_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1N_TOUT39_P32_3_OUT

IfxGtm_ATOM1_1N_TOUT39_P32_3_OUT.

Definition: IfxGtm_PinMap.h:275

IfxGtm_TOM2_4_TOUT61_P20_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT61_P20_3_OUT

IfxGtm_TOM2_4_TOUT61_P20_3_OUT.

Definition: IfxGtm_PinMap.h:2204

IfxGtm_TIM5_3_P02_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P02_14_IN

IfxGtm_TIM5_3_P02_14_IN.

Definition: IfxGtm_PinMap.h:1499

IfxGtm_TIM1_3_P21_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P21_5_IN

IfxGtm_TIM1_3_P21_5_IN.

Definition: IfxGtm_PinMap.h:1139

IfxGtm_TIM1_3_P33_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P33_7_IN

IfxGtm_TIM1_3_P33_7_IN.

Definition: IfxGtm_PinMap.h:1143

IfxGtm_TIM0_4_P33_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P33_0_IN

IfxGtm_TIM0_4_P33_0_IN.

Definition: IfxGtm_PinMap.h:1077

IfxGtm_TIM3_5_P15_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P15_2_IN

IfxGtm_TIM3_5_P15_2_IN.

Definition: IfxGtm_PinMap.h:1331

IfxGtm_ATOM5_4N_TOUT163_P01_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4N_TOUT163_P01_10_OUT

IfxGtm_ATOM5_4N_TOUT163_P01_10_OUT.

Definition: IfxGtm_PinMap.h:811

IfxGtm_TOM1_4N_TOUT73_P15_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT73_P15_2_OUT

IfxGtm_TOM1_4N_TOUT73_P15_2_OUT.

Definition: IfxGtm_PinMap.h:1970

IfxGtm_TOM2_5N_TOUT136_P22_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5N_TOUT136_P22_10_OUT

IfxGtm_TOM2_5N_TOUT136_P22_10_OUT.

Definition: IfxGtm_PinMap.h:2209

IfxGtm_ATOM3_3N_TOUT24_P33_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT24_P33_2_OUT

IfxGtm_ATOM3_3N_TOUT24_P33_2_OUT.

Definition: IfxGtm_PinMap.h:548

IfxGtm_TOM1_7N_TOUT7_P02_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT7_P02_7_OUT

IfxGtm_TOM1_7N_TOUT7_P02_7_OUT.

Definition: IfxGtm_PinMap.h:2061

IfxGtm_TOM0_3N_TOUT6_P02_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT6_P02_6_OUT

IfxGtm_TOM0_3N_TOUT6_P02_6_OUT.

Definition: IfxGtm_PinMap.h:1717

IfxGtm_TOM1_3_TOUT21_P00_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT21_P00_12_OUT

IfxGtm_TOM1_3_TOUT21_P00_12_OUT.

Definition: IfxGtm_PinMap.h:1951

IfxGtm_TIM4_2_P11_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P11_4_IN

IfxGtm_TIM4_2_P11_4_IN.

Definition: IfxGtm_PinMap.h:1397

IfxGtm_ATOM5_7N_TOUT152_P02_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7N_TOUT152_P02_15_OUT

IfxGtm_ATOM5_7N_TOUT152_P02_15_OUT.

Definition: IfxGtm_PinMap.h:856

IfxGtm_TOM2_8_TOUT68_P20_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_8_TOUT68_P20_12_OUT

IfxGtm_TOM2_8_TOUT68_P20_12_OUT.

Definition: IfxGtm_PinMap.h:2257

IfxGtm_TOM1_4_TOUT245_P15_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT245_P15_13_OUT

IfxGtm_TOM1_4_TOUT245_P15_13_OUT.

Definition: IfxGtm_PinMap.h:1977

IfxGtm_ATOM5_0N_TOUT150_P34_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT150_P34_5_OUT

IfxGtm_ATOM5_0N_TOUT150_P34_5_OUT.

Definition: IfxGtm_PinMap.h:731

IfxGtm_TIM6_6_P26_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P26_0_IN

IfxGtm_TIM6_6_P26_0_IN.

Definition: IfxGtm_PinMap.h:1610

IfxGtm_TIM1_4_P21_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P21_6_IN

IfxGtm_TIM1_4_P21_6_IN.

Definition: IfxGtm_PinMap.h:1148

IfxGtm_TIM5_7_P00_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P00_3_IN

IfxGtm_TIM5_7_P00_3_IN.

Definition: IfxGtm_PinMap.h:1542

IfxGtm_ATOM1_1N_TOUT4_P02_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1N_TOUT4_P02_4_OUT

IfxGtm_ATOM1_1N_TOUT4_P02_4_OUT.

Definition: IfxGtm_PinMap.h:276

IfxGtm_TIM3_2_P11_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P11_3_IN

IfxGtm_TIM3_2_P11_3_IN.

Definition: IfxGtm_PinMap.h:1291

IfxGtm_ATOM0_4_TOUT4_P02_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT4_P02_4_OUT

IfxGtm_ATOM0_4_TOUT4_P02_4_OUT.

Definition: IfxGtm_PinMap.h:221

IfxGtm_ATOM2_3N_TOUT36_P32_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT36_P32_0_OUT

IfxGtm_ATOM2_3N_TOUT36_P32_0_OUT.

Definition: IfxGtm_PinMap.h:441

IfxGtm_ATOM7_6_TOUT228_P24_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_6_TOUT228_P24_6_OUT

IfxGtm_ATOM7_6_TOUT228_P24_6_OUT.

Definition: IfxGtm_PinMap.h:969

IfxGtm_TIM1_5_P14_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P14_2_IN

IfxGtm_TIM1_5_P14_2_IN.

Definition: IfxGtm_PinMap.h:1155

IfxGtm_Atom_ToutMapP

IfxGtm_Atom_ToutMap * IfxGtm_Atom_ToutMapP

Pointer to IfxGtm_Atom_ToutMap.

Definition: IfxGtm_PinMap.h:121

IfxGtm_TIM2_2_P15_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P15_11_IN

IfxGtm_TIM2_2_P15_11_IN.

Definition: IfxGtm_PinMap.h:1200

IfxGtm_TOM0_7_TOUT84_P14_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT84_P14_4_OUT

IfxGtm_TOM0_7_TOUT84_P14_4_OUT.

Definition: IfxGtm_PinMap.h:1848

IfxGtm_ATOM7_6_TOUT270_P10_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_6_TOUT270_P10_15_OUT

IfxGtm_ATOM7_6_TOUT270_P10_15_OUT.

Definition: IfxGtm_PinMap.h:972

IfxGtm_ATOM4_4N_TOUT105_P10_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT105_P10_3_OUT

IfxGtm_ATOM4_4N_TOUT105_P10_3_OUT.

Definition: IfxGtm_PinMap.h:671

IfxGtm_TIM4_7_P11_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P11_14_IN

IfxGtm_TIM4_7_P11_14_IN.

Definition: IfxGtm_PinMap.h:1458

IfxGtm_ATOM3_1N_TOUT22_P33_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT22_P33_0_OUT

IfxGtm_ATOM3_1N_TOUT22_P33_0_OUT.

Definition: IfxGtm_PinMap.h:509

IfxGtm_ATOM7_5_TOUT246_P15_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_5_TOUT246_P15_14_OUT

IfxGtm_ATOM7_5_TOUT246_P15_14_OUT.

Definition: IfxGtm_PinMap.h:963

IfxGtm_ATOM0_6N_TOUT10_P00_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6N_TOUT10_P00_1_OUT

IfxGtm_ATOM0_6N_TOUT10_P00_1_OUT.

Definition: IfxGtm_PinMap.h:238

IfxGtm_ATOM5_1N_TOUT135_P22_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT135_P22_9_OUT

IfxGtm_ATOM5_1N_TOUT135_P22_9_OUT.

Definition: IfxGtm_PinMap.h:748

IfxGtm_TOM0_8_TOUT0_P02_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT0_P02_0_OUT

IfxGtm_TOM0_8_TOUT0_P02_0_OUT.

Definition: IfxGtm_PinMap.h:1851

IfxGtm_TIM1_2_P33_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P33_11_IN

IfxGtm_TIM1_2_P33_11_IN.

Definition: IfxGtm_PinMap.h:1132

IfxGtm_TOM3_9_TOUT163_P01_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_9_TOUT163_P01_10_OUT

IfxGtm_TOM3_9_TOUT163_P01_10_OUT.

Definition: IfxGtm_PinMap.h:2410

IfxGtm_TOM1_3N_TOUT144_P33_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3N_TOUT144_P33_15_OUT

IfxGtm_TOM1_3N_TOUT144_P33_15_OUT.

Definition: IfxGtm_PinMap.h:1942

IfxGtm_ATOM5_6N_TOUT175_P31_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6N_TOUT175_P31_1_OUT

IfxGtm_ATOM5_6N_TOUT175_P31_1_OUT.

Definition: IfxGtm_PinMap.h:842

IfxGtm_TOM4_10_TOUT200_P30_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_10_TOUT200_P30_10_OUT

IfxGtm_TOM4_10_TOUT200_P30_10_OUT.

Definition: IfxGtm_PinMap.h:2422

IfxGtm_TOM0_3_TOUT29_P33_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT29_P33_7_OUT

IfxGtm_TOM0_3_TOUT29_P33_7_OUT.

Definition: IfxGtm_PinMap.h:1724

IfxGtm_TOM1_7_TOUT45_P23_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT45_P23_4_OUT

IfxGtm_TOM1_7_TOUT45_P23_4_OUT.

Definition: IfxGtm_PinMap.h:2071

IfxGtm_TOM0_1N_TOUT39_P32_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT39_P32_3_OUT

IfxGtm_TOM0_1N_TOUT39_P32_3_OUT.

Definition: IfxGtm_PinMap.h:1673

IfxGtm_ATOM4_5N_TOUT77_P15_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5N_TOUT77_P15_6_OUT

IfxGtm_ATOM4_5N_TOUT77_P15_6_OUT.

Definition: IfxGtm_PinMap.h:693

IfxGtm_TOM0_3N_TOUT42_P23_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT42_P23_1_OUT

IfxGtm_TOM0_3N_TOUT42_P23_1_OUT.

Definition: IfxGtm_PinMap.h:1714

IfxGtm_TOM3_3N_TOUT118_P02_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT118_P02_11_OUT

IfxGtm_TOM3_3N_TOUT118_P02_11_OUT.

Definition: IfxGtm_PinMap.h:2338

IfxGtm_TIM3_6_P20_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P20_10_IN

IfxGtm_TIM3_6_P20_10_IN.

Definition: IfxGtm_PinMap.h:1345

IfxGtm_TIM5_5_P13_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P13_6_IN

IfxGtm_TIM5_5_P13_6_IN.

Definition: IfxGtm_PinMap.h:1522

IfxGtm_TOM2_13_TOUT35_P33_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_13_TOUT35_P33_13_OUT

IfxGtm_TOM2_13_TOUT35_P33_13_OUT.

Definition: IfxGtm_PinMap.h:2125

IfxGtm_ATOM2_3N_TOUT115_P01_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT115_P01_7_OUT

IfxGtm_ATOM2_3N_TOUT115_P01_7_OUT.

Definition: IfxGtm_PinMap.h:434

IfxGtm_TIM3_4_P14_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P14_10_IN

IfxGtm_TIM3_4_P14_10_IN.

Definition: IfxGtm_PinMap.h:1317

IfxGtm_TIM2_1_P00_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P00_1_IN

IfxGtm_TIM2_1_P00_1_IN.

Definition: IfxGtm_PinMap.h:1185

IfxGtm_ATOM8_2_TOUT252_P13_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_2_TOUT252_P13_14_OUT

IfxGtm_ATOM8_2_TOUT252_P13_14_OUT.

Definition: IfxGtm_PinMap.h:993

IfxGtm_TIM4_2_P21_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P21_6_IN

IfxGtm_TIM4_2_P21_6_IN.

Definition: IfxGtm_PinMap.h:1399

IfxGtm_TOM3_2_TOUT176_P31_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT176_P31_2_OUT

IfxGtm_TOM3_2_TOUT176_P31_2_OUT.

Definition: IfxGtm_PinMap.h:2334

IfxGtm_TIM2_2_P00_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P00_3_IN

IfxGtm_TIM2_2_P00_3_IN.

Definition: IfxGtm_PinMap.h:1195

IfxGtm_ATOM5_0N_TOUT126_P11_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT126_P11_14_OUT

IfxGtm_ATOM5_0N_TOUT126_P11_14_OUT.

Definition: IfxGtm_PinMap.h:729

IfxGtm_ATOM2_1N_TOUT90_P14_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT90_P14_10_OUT

IfxGtm_ATOM2_1N_TOUT90_P14_10_OUT.

Definition: IfxGtm_PinMap.h:404

IfxGtm_TOM4_8_TOUT162_P01_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_8_TOUT162_P01_8_OUT

IfxGtm_TOM4_8_TOUT162_P01_8_OUT.

Definition: IfxGtm_PinMap.h:2487

IfxGtm_ATOM5_0_TOUT155_P01_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT155_P01_0_OUT

IfxGtm_ATOM5_0_TOUT155_P01_0_OUT.

Definition: IfxGtm_PinMap.h:740

IfxGtm_TOM4_15_TOUT205_P30_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_15_TOUT205_P30_15_OUT

IfxGtm_TOM4_15_TOUT205_P30_15_OUT.

Definition: IfxGtm_PinMap.h:2449

IfxGtm_TOM0_6N_TOUT78_P15_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT78_P15_7_OUT

IfxGtm_TOM0_6N_TOUT78_P15_7_OUT.

Definition: IfxGtm_PinMap.h:1801

IfxGtm_ATOM1_0N_TOUT17_P00_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0N_TOUT17_P00_8_OUT

IfxGtm_ATOM1_0N_TOUT17_P00_8_OUT.

Definition: IfxGtm_PinMap.h:262

IfxGtm_ATOM7_1_TOUT245_P15_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT245_P15_13_OUT

IfxGtm_ATOM7_1_TOUT245_P15_13_OUT.

Definition: IfxGtm_PinMap.h:937

IfxGtm_TOM0_2N_TOUT143_P33_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT143_P33_14_OUT

IfxGtm_TOM0_2N_TOUT143_P33_14_OUT.

Definition: IfxGtm_PinMap.h:1691

IfxGtm_ATOM5_6_TOUT249_P13_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT249_P13_12_OUT

IfxGtm_ATOM5_6_TOUT249_P13_12_OUT.

Definition: IfxGtm_PinMap.h:853

IfxGtm_ATOM0_2N_TOUT40_P32_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT40_P32_4_OUT

IfxGtm_ATOM0_2N_TOUT40_P32_4_OUT.

Definition: IfxGtm_PinMap.h:181

IfxGtm_ATOM3_5_TOUT64_P20_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT64_P20_8_OUT

IfxGtm_ATOM3_5_TOUT64_P20_8_OUT.

Definition: IfxGtm_PinMap.h:588

IfxGtm_TOM0_15_TOUT7_P02_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT7_P02_7_OUT

IfxGtm_TOM0_15_TOUT7_P02_7_OUT.

Definition: IfxGtm_PinMap.h:1666

IfxGtm_TIM2_2_P31_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P31_2_IN

IfxGtm_TIM2_2_P31_2_IN.

Definition: IfxGtm_PinMap.h:1203

IfxGtm_ATOM7_3_TOUT255_P13_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_3_TOUT255_P13_6_OUT

IfxGtm_ATOM7_3_TOUT255_P13_6_OUT.

Definition: IfxGtm_PinMap.h:952

IfxGtm_ATOM0_3_TOUT56_P21_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT56_P21_5_OUT

IfxGtm_ATOM0_3_TOUT56_P21_5_OUT.

Definition: IfxGtm_PinMap.h:209

IfxGtm_ATOM1_5N_TOUT76_P15_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT76_P15_5_OUT

IfxGtm_ATOM1_5N_TOUT76_P15_5_OUT.

Definition: IfxGtm_PinMap.h:343

IfxGtm_TOM2_7_TOUT101_P11_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7_TOUT101_P11_12_OUT

IfxGtm_TOM2_7_TOUT101_P11_12_OUT.

Definition: IfxGtm_PinMap.h:2245

IfxGtm_TIM4_1_P02_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P02_15_IN

IfxGtm_TIM4_1_P02_15_IN.

Definition: IfxGtm_PinMap.h:1381

IfxGtm_TOM3_7N_TOUT152_P02_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_7N_TOUT152_P02_15_OUT

IfxGtm_TOM3_7N_TOUT152_P02_15_OUT.

Definition: IfxGtm_PinMap.h:2392

IfxGtm_TIM3_2_P02_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P02_8_IN

IfxGtm_TIM3_2_P02_8_IN.

Definition: IfxGtm_PinMap.h:1290

IfxGtm_ATOM7_7_TOUT161_P01_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_7_TOUT161_P01_13_OUT

IfxGtm_ATOM7_7_TOUT161_P01_13_OUT.

Definition: IfxGtm_PinMap.h:975

IfxGtm_TOM1_0N_TOUT17_P00_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0N_TOUT17_P00_8_OUT

IfxGtm_TOM1_0N_TOUT17_P00_8_OUT.

Definition: IfxGtm_PinMap.h:1863

IfxGtm_TIM2_4_P31_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P31_4_IN

IfxGtm_TIM2_4_P31_4_IN.

Definition: IfxGtm_PinMap.h:1224

IfxGtm_TOM0_4_TOUT22_P33_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT22_P33_0_OUT

IfxGtm_TOM0_4_TOUT22_P33_0_OUT.

Definition: IfxGtm_PinMap.h:1748

IfxGtm_TIM5_6_P01_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P01_14_IN

IfxGtm_TIM5_6_P01_14_IN.

Definition: IfxGtm_PinMap.h:1530

IfxGtm_TIM2_6_P20_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P20_10_IN

IfxGtm_TIM2_6_P20_10_IN.

Definition: IfxGtm_PinMap.h:1245

IfxGtm_ATOM5_5N_TOUT119_P11_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5N_TOUT119_P11_0_OUT

IfxGtm_ATOM5_5N_TOUT119_P11_0_OUT.

Definition: IfxGtm_PinMap.h:825

IfxGtm_ATOM0_1N_TOUT14_P00_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT14_P00_5_OUT

IfxGtm_ATOM0_1N_TOUT14_P00_5_OUT.

Definition: IfxGtm_PinMap.h:161

IfxGtm_TOM1_11_TOUT60_P20_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT60_P20_1_OUT

IfxGtm_TOM1_11_TOUT60_P20_1_OUT.

Definition: IfxGtm_PinMap.h:1885

IfxGtm_ChXSel_h

Definition: IfxGtm_PinMap.h:69

IfxGtm_ATOM1_4_TOUT146_P34_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT146_P34_1_OUT

IfxGtm_ATOM1_4_TOUT146_P34_1_OUT.

Definition: IfxGtm_PinMap.h:331

IfxGtm_ATOM0_5_TOUT15_P00_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT15_P00_6_OUT

IfxGtm_ATOM0_5_TOUT15_P00_6_OUT.

Definition: IfxGtm_PinMap.h:232

IfxGtm_ChXSel

IfxGtm_ChXSel

CHxSEL register control code.

Definition: IfxGtm_PinMap.h:59

IfxGtm_TOM0_4_TOUT57_P21_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT57_P21_6_OUT

IfxGtm_TOM0_4_TOUT57_P21_6_OUT.

Definition: IfxGtm_PinMap.h:1753

IfxGtm_TOM1_1_TOUT31_P33_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT31_P33_9_OUT

IfxGtm_TOM1_1_TOUT31_P33_9_OUT.

Definition: IfxGtm_PinMap.h:1921

IfxGtm_TOM1_6N_TOUT78_P15_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT78_P15_7_OUT

IfxGtm_TOM1_6N_TOUT78_P15_7_OUT.

Definition: IfxGtm_PinMap.h:2030

IfxGtm_TIM3_7_P13_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P13_2_IN

IfxGtm_TIM3_7_P13_2_IN.

Definition: IfxGtm_PinMap.h:1356

IfxGtm_TIM5_6_P30_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P30_14_IN

IfxGtm_TIM5_6_P30_14_IN.

Definition: IfxGtm_PinMap.h:1537

IfxGtm_TIM6_2_P01_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P01_14_IN

IfxGtm_TIM6_2_P01_14_IN.

Definition: IfxGtm_PinMap.h:1570

IfxGtm_TIM1_3_P23_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P23_7_IN

IfxGtm_TIM1_3_P23_7_IN.

Definition: IfxGtm_PinMap.h:1141

IfxGtm_ATOM3_1_TOUT27_P33_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT27_P33_5_OUT

IfxGtm_ATOM3_1_TOUT27_P33_5_OUT.

Definition: IfxGtm_PinMap.h:520

IfxGtm_TOM4_7_TOUT197_P30_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_7_TOUT197_P30_7_OUT

IfxGtm_TOM4_7_TOUT197_P30_7_OUT.

Definition: IfxGtm_PinMap.h:2484

IfxGtm_ATOM5_1_TOUT156_P01_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT156_P01_2_OUT

IfxGtm_ATOM5_1_TOUT156_P01_2_OUT.

Definition: IfxGtm_PinMap.h:760

IfxGtm_ATOM4_4_TOUT81_P14_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT81_P14_1_OUT

IfxGtm_ATOM4_4_TOUT81_P14_1_OUT.

Definition: IfxGtm_PinMap.h:687

IfxGtm_ToutSel_e

Definition: IfxGtm_PinMap.h:89

IfxGtm_TOM0_8_TOUT48_P22_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT48_P22_1_OUT

IfxGtm_TOM0_8_TOUT48_P22_1_OUT.

Definition: IfxGtm_PinMap.h:1852

IfxGtm_TOM0_0_TOUT77_P15_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT77_P15_6_OUT

IfxGtm_TOM0_0_TOUT77_P15_6_OUT.

Definition: IfxGtm_PinMap.h:1639

IfxGtm_TIM2_0_P33_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P33_14_IN

IfxGtm_TIM2_0_P33_14_IN.

Definition: IfxGtm_PinMap.h:1184

IfxGtm_ATOM1_5N_TOUT77_P15_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT77_P15_6_OUT

IfxGtm_ATOM1_5N_TOUT77_P15_6_OUT.

Definition: IfxGtm_PinMap.h:344

IfxGtm_TOM2_1N_TOUT92_P13_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT92_P13_1_OUT

IfxGtm_TOM2_1N_TOUT92_P13_1_OUT.

Definition: IfxGtm_PinMap.h:2147

IfxGtm_TOM3_3N_TOUT247_P15_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT247_P15_15_OUT

IfxGtm_TOM3_3N_TOUT247_P15_15_OUT.

Definition: IfxGtm_PinMap.h:2344

IfxGtm_ATOM0_6_TOUT16_P00_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT16_P00_7_OUT

IfxGtm_ATOM0_6_TOUT16_P00_7_OUT.

Definition: IfxGtm_PinMap.h:246

IfxGtm_TIM2_0_P31_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P31_0_IN

IfxGtm_TIM2_0_P31_0_IN.

Definition: IfxGtm_PinMap.h:1182

IfxGtm_TIM6_3_P10_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P10_13_IN

IfxGtm_TIM6_3_P10_13_IN.

Definition: IfxGtm_PinMap.h:1580

IfxGtm_TOM0_14_TOUT100_P11_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT100_P11_11_OUT

IfxGtm_TOM0_14_TOUT100_P11_11_OUT.

Definition: IfxGtm_PinMap.h:1660

IfxGtm_ATOM2_1N_TOUT167_P00_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT167_P00_13_OUT

IfxGtm_ATOM2_1N_TOUT167_P00_13_OUT.

Definition: IfxGtm_PinMap.h:399

IfxGtm_ATOM8_0_TOUT242_P15_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_0_TOUT242_P15_10_OUT

IfxGtm_ATOM8_0_TOUT242_P15_10_OUT.

Definition: IfxGtm_PinMap.h:983

IfxGtm_TIM6_3_P13_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P13_7_IN

IfxGtm_TIM6_3_P13_7_IN.

Definition: IfxGtm_PinMap.h:1581

IfxGtm_ATOM4_4N_TOUT108_P10_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT108_P10_6_OUT

IfxGtm_ATOM4_4N_TOUT108_P10_6_OUT.

Definition: IfxGtm_PinMap.h:672

IfxGtm_TOM2_4_TOUT90_P14_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT90_P14_10_OUT

IfxGtm_TOM2_4_TOUT90_P14_10_OUT.

Definition: IfxGtm_PinMap.h:2205

IfxGtm_ATOM0_4N_TOUT13_P00_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4N_TOUT13_P00_4_OUT

IfxGtm_ATOM0_4N_TOUT13_P00_4_OUT.

Definition: IfxGtm_PinMap.h:214

IfxGtm_TOM3_0_TOUT206_P25_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_0_TOUT206_P25_0_OUT

IfxGtm_TOM3_0_TOUT206_P25_0_OUT.

Definition: IfxGtm_PinMap.h:2274

IfxGtm_ATOM1_5_TOUT65_P20_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT65_P20_9_OUT

IfxGtm_ATOM1_5_TOUT65_P20_9_OUT.

Definition: IfxGtm_PinMap.h:353

IfxGtm_ATOM4_5N_TOUT18_P00_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5N_TOUT18_P00_9_OUT

IfxGtm_ATOM4_5N_TOUT18_P00_9_OUT.

Definition: IfxGtm_PinMap.h:691

IfxGtm_TOM4_5_TOUT227_P24_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_5_TOUT227_P24_5_OUT

IfxGtm_TOM4_5_TOUT227_P24_5_OUT.

Definition: IfxGtm_PinMap.h:2475

IfxGtm_TIM1_1_P22_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P22_0_IN

IfxGtm_TIM1_1_P22_0_IN.

Definition: IfxGtm_PinMap.h:1121

IfxGtm_ATOM4_1N_TOUT85_P14_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT85_P14_5_OUT

IfxGtm_ATOM4_1N_TOUT85_P14_5_OUT.

Definition: IfxGtm_PinMap.h:631

IfxGtm_ATOM4_6_TOUT66_P20_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT66_P20_10_OUT

IfxGtm_ATOM4_6_TOUT66_P20_10_OUT.

Definition: IfxGtm_PinMap.h:714

IfxGtm_TIM1_0_P15_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P15_6_IN

IfxGtm_TIM1_0_P15_6_IN.

Definition: IfxGtm_PinMap.h:1110

IfxGtm_ATOM4_6_TOUT59_P20_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT59_P20_0_OUT

IfxGtm_ATOM4_6_TOUT59_P20_0_OUT.

Definition: IfxGtm_PinMap.h:713

IfxGtm_ATOM3_3N_TOUT77_P15_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT77_P15_6_OUT

IfxGtm_ATOM3_3N_TOUT77_P15_6_OUT.

Definition: IfxGtm_PinMap.h:552

IfxGtm_TIM4_3_P23_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P23_7_IN

IfxGtm_TIM4_3_P23_7_IN.

Definition: IfxGtm_PinMap.h:1413

IfxGtm_ATOM0_2N_TOUT5_P02_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT5_P02_5_OUT

IfxGtm_ATOM0_2N_TOUT5_P02_5_OUT.

Definition: IfxGtm_PinMap.h:186

IfxGtm_TOM1_8_TOUT249_P13_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT249_P13_12_OUT

IfxGtm_TOM1_8_TOUT249_P13_12_OUT.

Definition: IfxGtm_PinMap.h:2083

IfxGtm_ATOM1_4N_TOUT147_P34_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT147_P34_2_OUT

IfxGtm_ATOM1_4N_TOUT147_P34_2_OUT.

Definition: IfxGtm_PinMap.h:325

IfxGtm_TIM0_3_P10_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P10_3_IN

IfxGtm_TIM0_3_P10_3_IN.

Definition: IfxGtm_PinMap.h:1063

IfxGtm_ATOM0_0_TOUT48_P22_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT48_P22_1_OUT

IfxGtm_ATOM0_0_TOUT48_P22_1_OUT.

Definition: IfxGtm_PinMap.h:155

IfxGtm_ATOM4_7_TOUT64_P20_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7_TOUT64_P20_8_OUT

IfxGtm_ATOM4_7_TOUT64_P20_8_OUT.

Definition: IfxGtm_PinMap.h:726

IfxGtm_TIM0_0_P33_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P33_4_IN

IfxGtm_TIM0_0_P33_4_IN.

Definition: IfxGtm_PinMap.h:1037

IfxGtm_TOM2_0N_TOUT51_P21_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT51_P21_0_OUT

IfxGtm_TOM2_0N_TOUT51_P21_0_OUT.

Definition: IfxGtm_PinMap.h:2092

IfxGtm_TIM5_5_P21_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P21_3_IN

IfxGtm_TIM5_5_P21_3_IN.

Definition: IfxGtm_PinMap.h:1523

IfxGtm_ATOM4_7N_TOUT104_P10_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7N_TOUT104_P10_2_OUT

IfxGtm_ATOM4_7N_TOUT104_P10_2_OUT.

Definition: IfxGtm_PinMap.h:716

IfxGtm_ATOM7_4_TOUT226_P24_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_4_TOUT226_P24_4_OUT

IfxGtm_ATOM7_4_TOUT226_P24_4_OUT.

Definition: IfxGtm_PinMap.h:956

IfxGtm_TOM2_11_TOUT105_P10_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_11_TOUT105_P10_3_OUT

IfxGtm_TOM2_11_TOUT105_P10_3_OUT.

Definition: IfxGtm_PinMap.h:2111

IfxGtm_ATOM3_2N_TOUT91_P13_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT91_P13_0_OUT

IfxGtm_ATOM3_2N_TOUT91_P13_0_OUT.

Definition: IfxGtm_PinMap.h:533

IfxGtm_ToutSel_i

Definition: IfxGtm_PinMap.h:93

IfxGtm_TOM4_6_TOUT160_P01_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_6_TOUT160_P01_9_OUT

IfxGtm_TOM4_6_TOUT160_P01_9_OUT.

Definition: IfxGtm_PinMap.h:2478

IfxGtm_TIM0_3_P10_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P10_6_IN

IfxGtm_TIM0_3_P10_6_IN.

Definition: IfxGtm_PinMap.h:1064

IfxGtm_TOM1_3N_TOUT74_P15_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3N_TOUT74_P15_3_OUT

IfxGtm_TOM1_3N_TOUT74_P15_3_OUT.

Definition: IfxGtm_PinMap.h:1948

IfxGtm_TOM1_5N_TOUT77_P15_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT77_P15_6_OUT

IfxGtm_TOM1_5N_TOUT77_P15_6_OUT.

Definition: IfxGtm_PinMap.h:1999

IfxGtm_ATOM1_1_TOUT10_P00_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT10_P00_1_OUT

IfxGtm_ATOM1_1_TOUT10_P00_1_OUT.

Definition: IfxGtm_PinMap.h:280

IfxGtm_TOM4_10_TOUT204_P30_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_10_TOUT204_P30_14_OUT

IfxGtm_TOM4_10_TOUT204_P30_14_OUT.

Definition: IfxGtm_PinMap.h:2423

IfxGtm_ATOM3_4N_TOUT135_P22_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4N_TOUT135_P22_9_OUT

IfxGtm_ATOM3_4N_TOUT135_P22_9_OUT.

Definition: IfxGtm_PinMap.h:561

IfxGtm_ATOM4_1_TOUT103_P10_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT103_P10_1_OUT

IfxGtm_ATOM4_1_TOUT103_P10_1_OUT.

Definition: IfxGtm_PinMap.h:633

IfxGtm_Tim_TinMap::tim

IfxGtm_Tim tim

TIM unit index.

Definition: IfxGtm_PinMap.h:103

IfxGtm_TOM2_8_TOUT109_P10_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_8_TOUT109_P10_7_OUT

IfxGtm_TOM2_8_TOUT109_P10_7_OUT.

Definition: IfxGtm_PinMap.h:2252

IfxGtm_TIM4_6_P10_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P10_15_IN

IfxGtm_TIM4_6_P10_15_IN.

Definition: IfxGtm_PinMap.h:1447

IfxGtm_TIM3_2_P20_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P20_14_IN

IfxGtm_TIM3_2_P20_14_IN.

Definition: IfxGtm_PinMap.h:1295

IfxGtm_ATOM3_5N_TOUT59_P20_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5N_TOUT59_P20_0_OUT

IfxGtm_ATOM3_5N_TOUT59_P20_0_OUT.

Definition: IfxGtm_PinMap.h:580

IfxGtm_TOM0_4_TOUT64_P20_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT64_P20_8_OUT

IfxGtm_TOM0_4_TOUT64_P20_8_OUT.

Definition: IfxGtm_PinMap.h:1754

IfxGtm_TOM4_6_TOUT228_P24_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_6_TOUT228_P24_6_OUT

IfxGtm_TOM4_6_TOUT228_P24_6_OUT.

Definition: IfxGtm_PinMap.h:2480

IfxGtm_TOM1_1_TOUT11_P00_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT11_P00_2_OUT

IfxGtm_TOM1_1_TOUT11_P00_2_OUT.

Definition: IfxGtm_PinMap.h:1916

IfxGtm_TOM0_2N_TOUT93_P13_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT93_P13_2_OUT

IfxGtm_TOM0_2N_TOUT93_P13_2_OUT.

Definition: IfxGtm_PinMap.h:1698

IfxGtm_TOM0_7_TOUT119_P11_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT119_P11_0_OUT

IfxGtm_TOM0_7_TOUT119_P11_0_OUT.

Definition: IfxGtm_PinMap.h:1839

IfxGtm_TIM3_6_P14_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P14_15_IN

IfxGtm_TIM3_6_P14_15_IN.

Definition: IfxGtm_PinMap.h:1343

IfxGtm_ATOM2_3_TOUT89_P14_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT89_P14_9_OUT

IfxGtm_ATOM2_3_TOUT89_P14_9_OUT.

Definition: IfxGtm_PinMap.h:448

IfxGtm_TIM5_1_P01_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P01_1_IN

IfxGtm_TIM5_1_P01_1_IN.

Definition: IfxGtm_PinMap.h:1477

IfxGtm_TIM2_7_P00_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P00_8_IN

IfxGtm_TIM2_7_P00_8_IN.

Definition: IfxGtm_PinMap.h:1250

IfxGtm_TOM1_2_TOUT28_P33_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT28_P33_6_OUT

IfxGtm_TOM1_2_TOUT28_P33_6_OUT.

Definition: IfxGtm_PinMap.h:1937

IfxGtm_TOM2_2_TOUT96_P11_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT96_P11_3_OUT

IfxGtm_TOM2_2_TOUT96_P11_3_OUT.

Definition: IfxGtm_PinMap.h:2171

IfxGtm_TOM1_3_TOUT71_P15_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT71_P15_0_OUT

IfxGtm_TOM1_3_TOUT71_P15_0_OUT.

Definition: IfxGtm_PinMap.h:1956

IfxGtm_ATOM1_7N_TOUT12_P00_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT12_P00_3_OUT

IfxGtm_ATOM1_7N_TOUT12_P00_3_OUT.

Definition: IfxGtm_PinMap.h:374

IfxGtm_TOM2_3_TOUT60_P20_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT60_P20_1_OUT

IfxGtm_TOM2_3_TOUT60_P20_1_OUT.

Definition: IfxGtm_PinMap.h:2184

IfxGtm_ATOM0_2_TOUT117_P02_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT117_P02_10_OUT

IfxGtm_ATOM0_2_TOUT117_P02_10_OUT.

Definition: IfxGtm_PinMap.h:188

IfxGtm_TOM4_1_TOUT251_P13_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_1_TOUT251_P13_10_OUT

IfxGtm_TOM4_1_TOUT251_P13_10_OUT.

Definition: IfxGtm_PinMap.h:2456

IfxGtm_ATOM0_6_TOUT59_P20_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT59_P20_0_OUT

IfxGtm_ATOM0_6_TOUT59_P20_0_OUT.

Definition: IfxGtm_PinMap.h:249

IfxGtm_ATOM3_6_TOUT168_P00_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT168_P00_15_OUT

IfxGtm_ATOM3_6_TOUT168_P00_15_OUT.

Definition: IfxGtm_PinMap.h:600

IfxGtm_ATOM1_1N_TOUT113_P01_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1N_TOUT113_P01_5_OUT

IfxGtm_ATOM1_1N_TOUT113_P01_5_OUT.

Definition: IfxGtm_PinMap.h:273

IfxGtm_ATOM0_7_TOUT25_P33_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT25_P33_3_OUT

IfxGtm_ATOM0_7_TOUT25_P33_3_OUT.

Definition: IfxGtm_PinMap.h:257

IfxGtm_TIM3_2_P22_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P22_6_IN

IfxGtm_TIM3_2_P22_6_IN.

Definition: IfxGtm_PinMap.h:1296

IfxGtm_ATOM4_3_TOUT108_P10_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3_TOUT108_P10_6_OUT

IfxGtm_ATOM4_3_TOUT108_P10_6_OUT.

Definition: IfxGtm_PinMap.h:665

IfxGtm_TIM3_1_P22_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P22_5_IN

IfxGtm_TIM3_1_P22_5_IN.

Definition: IfxGtm_PinMap.h:1284

IfxGtm_ATOM0_6N_TOUT27_P33_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6N_TOUT27_P33_5_OUT

IfxGtm_ATOM0_6N_TOUT27_P33_5_OUT.

Definition: IfxGtm_PinMap.h:244

IfxGtm_TOM1_3N_TOUT43_P23_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3N_TOUT43_P23_2_OUT

IfxGtm_TOM1_3N_TOUT43_P23_2_OUT.

Definition: IfxGtm_PinMap.h:1946

IfxGtm_ATOM8_6_TOUT263_P14_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_6_TOUT263_P14_15_OUT

IfxGtm_ATOM8_6_TOUT263_P14_15_OUT.

Definition: IfxGtm_PinMap.h:1016

IfxGtm_TOM0_13_TOUT15_P00_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT15_P00_6_OUT

IfxGtm_TOM0_13_TOUT15_P00_6_OUT.

Definition: IfxGtm_PinMap.h:1657

IfxGtm_TOM2_7N_TOUT55_P21_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT55_P21_4_OUT

IfxGtm_TOM2_7N_TOUT55_P21_4_OUT.

Definition: IfxGtm_PinMap.h:2241

IfxGtm_TIM0_0_P14_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P14_7_IN

IfxGtm_TIM0_0_P14_7_IN.

Definition: IfxGtm_PinMap.h:1032

IfxGtm_ATOM5_2N_TOUT250_P13_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT250_P13_11_OUT

IfxGtm_ATOM5_2N_TOUT250_P13_11_OUT.

Definition: IfxGtm_PinMap.h:774

IfxGtm_ATOM1_2N_TOUT40_P32_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT40_P32_4_OUT

IfxGtm_ATOM1_2N_TOUT40_P32_4_OUT.

Definition: IfxGtm_PinMap.h:293

IfxGtm_TIM2_4_P20_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P20_3_IN

IfxGtm_TIM2_4_P20_3_IN.

Definition: IfxGtm_PinMap.h:1222

IfxGtm_TOM3_1_TOUT156_P01_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT156_P01_2_OUT

IfxGtm_TOM3_1_TOUT156_P01_2_OUT.

Definition: IfxGtm_PinMap.h:2317

IfxGtm_ATOM6_4_TOUT254_P13_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT254_P13_5_OUT

IfxGtm_ATOM6_4_TOUT254_P13_5_OUT.

Definition: IfxGtm_PinMap.h:904

IfxGtm_TIM4_4_P24_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P24_4_IN

IfxGtm_TIM4_4_P24_4_IN.

Definition: IfxGtm_PinMap.h:1425

IfxGtm_TOM2_1N_TOUT98_P11_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT98_P11_9_OUT

IfxGtm_TOM2_1N_TOUT98_P11_9_OUT.

Definition: IfxGtm_PinMap.h:2148

IfxGtm_TIM5_3_P14_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P14_13_IN

IfxGtm_TIM5_3_P14_13_IN.

Definition: IfxGtm_PinMap.h:1501

IfxGtm_TOM1_6N_TOUT49_P22_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT49_P22_2_OUT

IfxGtm_TOM1_6N_TOUT49_P22_2_OUT.

Definition: IfxGtm_PinMap.h:2027

IfxGtm_TOM2_4_TOUT133_P22_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT133_P22_7_OUT

IfxGtm_TOM2_4_TOUT133_P22_7_OUT.

Definition: IfxGtm_PinMap.h:2200

IfxGtm_TOM1_1_TOUT78_P15_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT78_P15_7_OUT

IfxGtm_TOM1_1_TOUT78_P15_7_OUT.

Definition: IfxGtm_PinMap.h:1923

IfxGtm_TOM0_1_TOUT31_P33_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT31_P33_9_OUT

IfxGtm_TOM0_1_TOUT31_P33_9_OUT.

Definition: IfxGtm_PinMap.h:1685

IfxGtm_TOM1_3N_TOUT247_P15_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3N_TOUT247_P15_15_OUT

IfxGtm_TOM1_3N_TOUT247_P15_15_OUT.

Definition: IfxGtm_PinMap.h:1944

IfxGtm_TIM4_1_P24_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P24_1_IN

IfxGtm_TIM4_1_P24_1_IN.

Definition: IfxGtm_PinMap.h:1387

IfxGtm_TOM3_2N_TOUT179_P31_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2N_TOUT179_P31_5_OUT

IfxGtm_TOM3_2N_TOUT179_P31_5_OUT.

Definition: IfxGtm_PinMap.h:2326

IfxGtm_TOM2_9_TOUT132_P22_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_9_TOUT132_P22_6_OUT

IfxGtm_TOM2_9_TOUT132_P22_6_OUT.

Definition: IfxGtm_PinMap.h:2259

IfxGtm_TIM4_6_P01_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P01_4_IN

IfxGtm_TIM4_6_P01_4_IN.

Definition: IfxGtm_PinMap.h:1446

IfxGtm_TOM1_1_TOUT19_P00_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT19_P00_10_OUT

IfxGtm_TOM1_1_TOUT19_P00_10_OUT.

Definition: IfxGtm_PinMap.h:1917

IfxGtm_TOM2_5_TOUT99_P11_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5_TOUT99_P11_10_OUT

IfxGtm_TOM2_5_TOUT99_P11_10_OUT.

Definition: IfxGtm_PinMap.h:2220

IfxGtm_TOM4_10_TOUT260_P14_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_10_TOUT260_P14_13_OUT

IfxGtm_TOM4_10_TOUT260_P14_13_OUT.

Definition: IfxGtm_PinMap.h:2425

IfxGtm_TIM3_3_P15_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P15_0_IN

IfxGtm_TIM3_3_P15_0_IN.

Definition: IfxGtm_PinMap.h:1307

IfxGtm_ATOM1_6N_TOUT149_P34_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT149_P34_4_OUT

IfxGtm_ATOM1_6N_TOUT149_P34_4_OUT.

Definition: IfxGtm_PinMap.h:360

IfxGtm_TIM0_5_P32_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P32_4_IN

IfxGtm_TIM0_5_P32_4_IN.

Definition: IfxGtm_PinMap.h:1086

IfxGtm_TOM3_1_TOUT265_P10_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT265_P10_9_OUT

IfxGtm_TOM3_1_TOUT265_P10_9_OUT.

Definition: IfxGtm_PinMap.h:2322

IfxGtm_TOM1_13_TOUT35_P33_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT35_P33_13_OUT

IfxGtm_TOM1_13_TOUT35_P33_13_OUT.

Definition: IfxGtm_PinMap.h:1893

IfxGtm_ATOM0_0N_TOUT54_P21_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0N_TOUT54_P21_3_OUT

IfxGtm_ATOM0_0N_TOUT54_P21_3_OUT.

Definition: IfxGtm_PinMap.h:152

IfxGtm_TOM1_1N_TOUT4_P02_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT4_P02_4_OUT

IfxGtm_TOM1_1N_TOUT4_P02_4_OUT.

Definition: IfxGtm_PinMap.h:1912

IfxGtm_TOM4_14_TOUT153_P02_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_14_TOUT153_P02_13_OUT

IfxGtm_TOM4_14_TOUT153_P02_13_OUT.

Definition: IfxGtm_PinMap.h:2442

IfxGtm_TOM2_14_TOUT36_P32_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_14_TOUT36_P32_0_OUT

IfxGtm_TOM2_14_TOUT36_P32_0_OUT.

Definition: IfxGtm_PinMap.h:2130

IfxGtm_TIM5_5_P13_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P13_13_IN

IfxGtm_TIM5_5_P13_13_IN.

Definition: IfxGtm_PinMap.h:1521

IfxGtm_ATOM4_2_TOUT83_P14_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT83_P14_3_OUT

IfxGtm_ATOM4_2_TOUT83_P14_3_OUT.

Definition: IfxGtm_PinMap.h:656

IfxGtm_ATOM4_1_TOUT86_P14_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT86_P14_6_OUT

IfxGtm_ATOM4_1_TOUT86_P14_6_OUT.

Definition: IfxGtm_PinMap.h:641

IfxGtm_ATOM3_0N_TOUT76_P15_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT76_P15_5_OUT

IfxGtm_ATOM3_0N_TOUT76_P15_5_OUT.

Definition: IfxGtm_PinMap.h:501

IfxGtm_Tom_Ch

IfxGtm_Tom_Ch

Enum for TOM channels.

Definition: IfxGtm_cfg.h:428

IfxGtm_TIM6_6_P24_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P24_6_IN

IfxGtm_TIM6_6_P24_6_IN.

Definition: IfxGtm_PinMap.h:1608

IfxGtm_ATOM5_3_TOUT163_P01_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT163_P01_10_OUT

IfxGtm_ATOM5_3_TOUT163_P01_10_OUT.

Definition: IfxGtm_PinMap.h:802

IfxGtm_TIM3_0_P15_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P15_5_IN

IfxGtm_TIM3_0_P15_5_IN.

Definition: IfxGtm_PinMap.h:1269

IfxGtm_ATOM4_4_TOUT50_P22_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT50_P22_3_OUT

IfxGtm_ATOM4_4_TOUT50_P22_3_OUT.

Definition: IfxGtm_PinMap.h:684

IfxGtm_TOM2_3N_TOUT106_P10_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3N_TOUT106_P10_4_OUT

IfxGtm_TOM2_3N_TOUT106_P10_4_OUT.

Definition: IfxGtm_PinMap.h:2173

IfxGtm_TOM3_0N_TOUT181_P31_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_0N_TOUT181_P31_7_OUT

IfxGtm_TOM3_0N_TOUT181_P31_7_OUT.

Definition: IfxGtm_PinMap.h:2265

IfxGtm_TOM3_0N_TOUT134_P22_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_0N_TOUT134_P22_8_OUT

IfxGtm_TOM3_0N_TOUT134_P22_8_OUT.

Definition: IfxGtm_PinMap.h:2263

IfxGtm_ATOM4_5_TOUT110_P10_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT110_P10_8_OUT

IfxGtm_ATOM4_5_TOUT110_P10_8_OUT.

Definition: IfxGtm_PinMap.h:694

IfxGtm_ChXSel_o

Definition: IfxGtm_PinMap.h:78

IfxGtm_ATOM8_6_TOUT153_P02_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_6_TOUT153_P02_13_OUT

IfxGtm_ATOM8_6_TOUT153_P02_13_OUT.

Definition: IfxGtm_PinMap.h:1012

IfxGtm_TOM3_3_TOUT177_P31_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3_TOUT177_P31_3_OUT

IfxGtm_TOM3_3_TOUT177_P31_3_OUT.

Definition: IfxGtm_PinMap.h:2349

IfxGtm_ATOM5_2N_TOUT211_P25_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT211_P25_5_OUT

IfxGtm_ATOM5_2N_TOUT211_P25_5_OUT.

Definition: IfxGtm_PinMap.h:772

IfxGtm_TIM6_4_P23_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P23_3_IN

IfxGtm_TIM6_4_P23_3_IN.

Definition: IfxGtm_PinMap.h:1591

IfxGtm_TOM1_6N_TOUT91_P13_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT91_P13_0_OUT

IfxGtm_TOM1_6N_TOUT91_P13_0_OUT.

Definition: IfxGtm_PinMap.h:2032

IfxGtm_TOM0_0N_TOUT51_P21_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT51_P21_0_OUT

IfxGtm_TOM0_0N_TOUT51_P21_0_OUT.

Definition: IfxGtm_PinMap.h:1625

IfxGtm_TOM1_6N_TOUT242_P15_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT242_P15_10_OUT

IfxGtm_TOM1_6N_TOUT242_P15_10_OUT.

Definition: IfxGtm_PinMap.h:2021

IfxGtm_ATOM1_6_TOUT6_P02_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT6_P02_6_OUT

IfxGtm_ATOM1_6_TOUT6_P02_6_OUT.

Definition: IfxGtm_PinMap.h:369

IfxGtm_ATOM5_6_TOUT212_P25_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT212_P25_6_OUT

IfxGtm_ATOM5_6_TOUT212_P25_6_OUT.

Definition: IfxGtm_PinMap.h:850

IfxGtm_TOM1_4_TOUT22_P33_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT22_P33_0_OUT

IfxGtm_TOM1_4_TOUT22_P33_0_OUT.

Definition: IfxGtm_PinMap.h:1976

IfxGtm_ATOM3_4_TOUT22_P33_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT22_P33_0_OUT

IfxGtm_ATOM3_4_TOUT22_P33_0_OUT.

Definition: IfxGtm_PinMap.h:570

IfxGtm_TOM0_5_TOUT27_P33_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT27_P33_5_OUT

IfxGtm_TOM0_5_TOUT27_P33_5_OUT.

Definition: IfxGtm_PinMap.h:1780

IfxGtm_TOM0_0N_TOUT106_P10_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT106_P10_4_OUT

IfxGtm_TOM0_0N_TOUT106_P10_4_OUT.

Definition: IfxGtm_PinMap.h:1621

IfxGtm_ATOM5_7_TOUT126_P11_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7_TOUT126_P11_14_OUT

IfxGtm_ATOM5_7_TOUT126_P11_14_OUT.

Definition: IfxGtm_PinMap.h:860

IfxGtm_TOM4_1_TOUT163_P01_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_1_TOUT163_P01_10_OUT

IfxGtm_TOM4_1_TOUT163_P01_10_OUT.

Definition: IfxGtm_PinMap.h:2453

IfxGtm_ATOM1_0N_TOUT112_P01_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0N_TOUT112_P01_4_OUT

IfxGtm_ATOM1_0N_TOUT112_P01_4_OUT.

Definition: IfxGtm_PinMap.h:261

IfxGtm_TOM0_4_TOUT81_P14_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT81_P14_1_OUT

IfxGtm_TOM0_4_TOUT81_P14_1_OUT.

Definition: IfxGtm_PinMap.h:1756

IfxGtm_TOM2_1_TOUT120_P11_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1_TOUT120_P11_1_OUT

IfxGtm_TOM2_1_TOUT120_P11_1_OUT.

Definition: IfxGtm_PinMap.h:2149

IfxGtm_TIM2_7_P15_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P15_4_IN

IfxGtm_TIM2_7_P15_4_IN.

Definition: IfxGtm_PinMap.h:1256

IfxGtm_TOM0_6_TOUT48_P22_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT48_P22_1_OUT

IfxGtm_TOM0_6_TOUT48_P22_1_OUT.

Definition: IfxGtm_PinMap.h:1813

IfxGtm_TOM0_4_TOUT53_P21_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT53_P21_2_OUT

IfxGtm_TOM0_4_TOUT53_P21_2_OUT.

Definition: IfxGtm_PinMap.h:1752

IfxGtm_ATOM5_3N_TOUT270_P10_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT270_P10_15_OUT

IfxGtm_ATOM5_3N_TOUT270_P10_15_OUT.

Definition: IfxGtm_PinMap.h:798

IfxGtm_TIM0_5_P21_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P21_7_IN

IfxGtm_TIM0_5_P21_7_IN.

Definition: IfxGtm_PinMap.h:1084

IfxGtm_ATOM5_5N_TOUT174_P31_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5N_TOUT174_P31_0_OUT

IfxGtm_ATOM5_5N_TOUT174_P31_0_OUT.

Definition: IfxGtm_PinMap.h:828

IfxGtm_ATOM2_2N_TOUT52_P21_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT52_P21_1_OUT

IfxGtm_ATOM2_2N_TOUT52_P21_1_OUT.

Definition: IfxGtm_PinMap.h:422

IfxGtm_ATOM5_6_TOUT136_P22_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT136_P22_10_OUT

IfxGtm_ATOM5_6_TOUT136_P22_10_OUT.

Definition: IfxGtm_PinMap.h:846

IfxGtm_ATOM5_3_TOUT122_P11_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT122_P11_5_OUT

IfxGtm_ATOM5_3_TOUT122_P11_5_OUT.

Definition: IfxGtm_PinMap.h:799

IfxGtm_TIM3_6_P20_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P20_6_IN

IfxGtm_TIM3_6_P20_6_IN.

Definition: IfxGtm_PinMap.h:1346

IfxGtm_TOM2_6_TOUT106_P10_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT106_P10_4_OUT

IfxGtm_TOM2_6_TOUT106_P10_4_OUT.

Definition: IfxGtm_PinMap.h:2231

IfxGtm_ATOM3_5_TOUT166_P00_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT166_P00_14_OUT

IfxGtm_ATOM3_5_TOUT166_P00_14_OUT.

Definition: IfxGtm_PinMap.h:585

IfxGtm_TOM0_4_TOUT30_P33_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT30_P33_8_OUT

IfxGtm_TOM0_4_TOUT30_P33_8_OUT.

Definition: IfxGtm_PinMap.h:1749

IfxGtm_TIM4_0_P01_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P01_12_IN

IfxGtm_TIM4_0_P01_12_IN.

Definition: IfxGtm_PinMap.h:1366

IfxGtm_TIM5_0_P30_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P30_8_IN

IfxGtm_TIM5_0_P30_8_IN.

Definition: IfxGtm_PinMap.h:1473

IfxGtm_TIM3_3_P11_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P11_6_IN

IfxGtm_TIM3_3_P11_6_IN.

Definition: IfxGtm_PinMap.h:1303

IfxGtm_ATOM7_7_TOUT248_P13_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_7_TOUT248_P13_9_OUT

IfxGtm_ATOM7_7_TOUT248_P13_9_OUT.

Definition: IfxGtm_PinMap.h:978

IfxGtm_TOM0_0N_TOUT61_P20_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT61_P20_3_OUT

IfxGtm_TOM0_0N_TOUT61_P20_3_OUT.

Definition: IfxGtm_PinMap.h:1626

IfxGtm_TOM3_11_TOUT267_P10_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_11_TOUT267_P10_14_OUT

IfxGtm_TOM3_11_TOUT267_P10_14_OUT.

Definition: IfxGtm_PinMap.h:2286

IfxGtm_TOM3_7_TOUT181_P31_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_7_TOUT181_P31_7_OUT

IfxGtm_TOM3_7_TOUT181_P31_7_OUT.

Definition: IfxGtm_PinMap.h:2400

IfxGtm_TIM1_6_P23_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_P23_1_IN

IfxGtm_TIM1_6_P23_1_IN.

Definition: IfxGtm_PinMap.h:1165

IfxGtm_TOM0_2_TOUT2_P02_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT2_P02_2_OUT

IfxGtm_TOM0_2_TOUT2_P02_2_OUT.

Definition: IfxGtm_PinMap.h:1704

IfxGtm_TOM4_14_TOUT232_P24_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_14_TOUT232_P24_10_OUT

IfxGtm_TOM4_14_TOUT232_P24_10_OUT.

Definition: IfxGtm_PinMap.h:2444

IfxGtm_TOM1_6_TOUT43_P23_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT43_P23_2_OUT

IfxGtm_TOM1_6_TOUT43_P23_2_OUT.

Definition: IfxGtm_PinMap.h:2039

IfxGtm_TIM4_4_P20_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P20_1_IN

IfxGtm_TIM4_4_P20_1_IN.

Definition: IfxGtm_PinMap.h:1424

IfxGtm_TOM0_10_TOUT2_P02_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT2_P02_2_OUT

IfxGtm_TOM0_10_TOUT2_P02_2_OUT.

Definition: IfxGtm_PinMap.h:1643

IfxGtm_TIM0_5_P10_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P10_8_IN

IfxGtm_TIM0_5_P10_8_IN.

Definition: IfxGtm_PinMap.h:1082

IfxGtm_TOM1_4_TOUT94_P13_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT94_P13_3_OUT

IfxGtm_TOM1_4_TOUT94_P13_3_OUT.

Definition: IfxGtm_PinMap.h:1985

IfxGtm_ATOM2_3_TOUT104_P10_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT104_P10_2_OUT

IfxGtm_ATOM2_3_TOUT104_P10_2_OUT.

Definition: IfxGtm_PinMap.h:445

IfxGtm_ATOM6_4_TOUT158_P01_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT158_P01_12_OUT

IfxGtm_ATOM6_4_TOUT158_P01_12_OUT.

Definition: IfxGtm_PinMap.h:901

IfxGtm_ATOM8_0_TOUT250_P13_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_0_TOUT250_P13_11_OUT

IfxGtm_ATOM8_0_TOUT250_P13_11_OUT.

Definition: IfxGtm_PinMap.h:984

IfxGtm_TOM3_8_TOUT218_P25_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_8_TOUT218_P25_12_OUT

IfxGtm_TOM3_8_TOUT218_P25_12_OUT.

Definition: IfxGtm_PinMap.h:2408

IfxGtm_ATOM6_4_TOUT143_P33_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT143_P33_14_OUT

IfxGtm_ATOM6_4_TOUT143_P33_14_OUT.

Definition: IfxGtm_PinMap.h:900

IfxGtm_ATOM8_4_TOUT254_P13_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_4_TOUT254_P13_5_OUT

IfxGtm_ATOM8_4_TOUT254_P13_5_OUT.

Definition: IfxGtm_PinMap.h:1003

IfxGtm_TIM4_2_P30_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P30_2_IN

IfxGtm_TIM4_2_P30_2_IN.

Definition: IfxGtm_PinMap.h:1403

IfxGtm_TOM4_15_TOUT154_P02_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_15_TOUT154_P02_14_OUT

IfxGtm_TOM4_15_TOUT154_P02_14_OUT.

Definition: IfxGtm_PinMap.h:2448

IfxGtm_ChXSel_e

Definition: IfxGtm_PinMap.h:66

IfxGtm_TIM4_5_P01_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P01_2_IN

IfxGtm_TIM4_5_P01_2_IN.

Definition: IfxGtm_PinMap.h:1432

IfxGtm_ATOM4_3N_TOUT74_P15_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3N_TOUT74_P15_3_OUT

IfxGtm_ATOM4_3N_TOUT74_P15_3_OUT.

Definition: IfxGtm_PinMap.h:662

IfxGtm_TOM0_3_TOUT56_P21_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT56_P21_5_OUT

IfxGtm_TOM0_3_TOUT56_P21_5_OUT.

Definition: IfxGtm_PinMap.h:1727

IfxGtm_TOM2_11_TOUT71_P15_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_11_TOUT71_P15_0_OUT

IfxGtm_TOM2_11_TOUT71_P15_0_OUT.

Definition: IfxGtm_PinMap.h:2116

IfxGtm_TOM0_6N_TOUT38_P32_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT38_P32_2_OUT

IfxGtm_TOM0_6N_TOUT38_P32_2_OUT.

Definition: IfxGtm_PinMap.h:1795

IfxGtm_ATOM2_3_TOUT21_P00_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT21_P00_12_OUT

IfxGtm_ATOM2_3_TOUT21_P00_12_OUT.

Definition: IfxGtm_PinMap.h:446

IfxGtm_TIM0_6_P33_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P33_2_IN

IfxGtm_TIM0_6_P33_2_IN.

Definition: IfxGtm_PinMap.h:1096

IfxGtm_ATOM8_3_TOUT260_P14_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_3_TOUT260_P14_13_OUT

IfxGtm_ATOM8_3_TOUT260_P14_13_OUT.

Definition: IfxGtm_PinMap.h:999

IfxGtm_TIM4_3_P00_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P00_12_IN

IfxGtm_TIM4_3_P00_12_IN.

Definition: IfxGtm_PinMap.h:1404

IfxGtm_ATOM2_7_TOUT37_P32_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT37_P32_1_OUT

IfxGtm_ATOM2_7_TOUT37_P32_1_OUT.

Definition: IfxGtm_PinMap.h:491

IfxGtm_TIM6_1_P30_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P30_9_IN

IfxGtm_TIM6_1_P30_9_IN.

Definition: IfxGtm_PinMap.h:1568

IfxGtm_TIM1_6_P20_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_P20_0_IN

IfxGtm_TIM1_6_P20_0_IN.

Definition: IfxGtm_PinMap.h:1164

IfxGtm_TIM5_5_P01_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P01_10_IN

IfxGtm_TIM5_5_P01_10_IN.

Definition: IfxGtm_PinMap.h:1518

IfxGtm_TOM1_7N_TOUT12_P00_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT12_P00_3_OUT

IfxGtm_TOM1_7N_TOUT12_P00_3_OUT.

Definition: IfxGtm_PinMap.h:2048

IfxGtm_TIM0_2_P33_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P33_11_IN

IfxGtm_TIM0_2_P33_11_IN.

Definition: IfxGtm_PinMap.h:1057

IfxGtm_TIM5_7_P24_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P24_15_IN

IfxGtm_TIM5_7_P24_15_IN.

Definition: IfxGtm_PinMap.h:1547

IfxGtm_ATOM5_1N_TOUT268_P10_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT268_P10_13_OUT

IfxGtm_ATOM5_1N_TOUT268_P10_13_OUT.

Definition: IfxGtm_PinMap.h:756

IfxGtm_ATOM6_1_TOUT215_P25_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT215_P25_9_OUT

IfxGtm_ATOM6_1_TOUT215_P25_9_OUT.

Definition: IfxGtm_PinMap.h:880

IfxGtm_TOM0_7_TOUT15_P00_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT15_P00_6_OUT

IfxGtm_TOM0_7_TOUT15_P00_6_OUT.

Definition: IfxGtm_PinMap.h:1840

IfxGtm_ATOM0_4_TOUT14_P00_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT14_P00_5_OUT

IfxGtm_ATOM0_4_TOUT14_P00_5_OUT.

Definition: IfxGtm_PinMap.h:218

IfxGtm_ATOM5_0N_TOUT134_P22_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT134_P22_8_OUT

IfxGtm_ATOM5_0N_TOUT134_P22_8_OUT.

Definition: IfxGtm_PinMap.h:730

IfxGtm_TOM1_5N_TOUT12_P00_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT12_P00_3_OUT

IfxGtm_TOM1_5N_TOUT12_P00_3_OUT.

Definition: IfxGtm_PinMap.h:1987

IfxGtm_ATOM0_3_TOUT3_P02_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT3_P02_3_OUT

IfxGtm_ATOM0_3_TOUT3_P02_3_OUT.

Definition: IfxGtm_PinMap.h:207

IfxGtm_ATOM4_4_TOUT72_P15_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT72_P15_1_OUT

IfxGtm_ATOM4_4_TOUT72_P15_1_OUT.

Definition: IfxGtm_PinMap.h:686

IfxGtm_TIM4_5_P30_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P30_5_IN

IfxGtm_TIM4_5_P30_5_IN.

Definition: IfxGtm_PinMap.h:1441

IfxGtm_TOM3_6N_TOUT207_P25_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_6N_TOUT207_P25_1_OUT

IfxGtm_TOM3_6N_TOUT207_P25_1_OUT.

Definition: IfxGtm_PinMap.h:2382

IfxGtm_TOM3_1N_TOUT245_P15_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1N_TOUT245_P15_13_OUT

IfxGtm_TOM3_1N_TOUT245_P15_13_OUT.

Definition: IfxGtm_PinMap.h:2312

IfxGtm_ATOM0_2N_TOUT65_P20_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT65_P20_9_OUT

IfxGtm_ATOM0_2N_TOUT65_P20_9_OUT.

Definition: IfxGtm_PinMap.h:187

IfxGtm_TIM2_0_P01_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P01_3_IN

IfxGtm_TIM2_0_P01_3_IN.

Definition: IfxGtm_PinMap.h:1175

IfxGtm_TOM2_0N_TOUT76_P15_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT76_P15_5_OUT

IfxGtm_TOM2_0N_TOUT76_P15_5_OUT.

Definition: IfxGtm_PinMap.h:2094

IfxGtm_TIM6_6_P30_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P30_14_IN

IfxGtm_TIM6_6_P30_14_IN.

Definition: IfxGtm_PinMap.h:1611

IfxGtm_TIM2_5_P34_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P34_3_IN

IfxGtm_TIM2_5_P34_3_IN.

Definition: IfxGtm_PinMap.h:1237

IfxGtm_ATOM5_3N_TOUT160_P01_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT160_P01_9_OUT

IfxGtm_ATOM5_3N_TOUT160_P01_9_OUT.

Definition: IfxGtm_PinMap.h:791

IfxGtm_TOM1_11_TOUT144_P33_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT144_P33_15_OUT

IfxGtm_TOM1_11_TOUT144_P33_15_OUT.

Definition: IfxGtm_PinMap.h:1882

IfxGtm_TOM3_11_TOUT189_P31_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_11_TOUT189_P31_15_OUT

IfxGtm_TOM3_11_TOUT189_P31_15_OUT.

Definition: IfxGtm_PinMap.h:2283

IfxGtm_TOM0_4N_TOUT8_P02_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT8_P02_8_OUT

IfxGtm_TOM0_4N_TOUT8_P02_8_OUT.

Definition: IfxGtm_PinMap.h:1742

IfxGtm_TOM1_6_TOUT16_P00_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT16_P00_7_OUT

IfxGtm_TOM1_6_TOUT16_P00_7_OUT.

Definition: IfxGtm_PinMap.h:2035

IfxGtm_TOM1_5N_TOUT67_P20_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT67_P20_11_OUT

IfxGtm_TOM1_5N_TOUT67_P20_11_OUT.

Definition: IfxGtm_PinMap.h:1997

IfxGtm_ATOM1_1_TOUT103_P10_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT103_P10_1_OUT

IfxGtm_ATOM1_1_TOUT103_P10_1_OUT.

Definition: IfxGtm_PinMap.h:279

IfxGtm_ATOM5_1N_TOUT260_P14_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT260_P14_13_OUT

IfxGtm_ATOM5_1N_TOUT260_P14_13_OUT.

Definition: IfxGtm_PinMap.h:755

IfxGtm_ATOM5_1_TOUT242_P15_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT242_P15_10_OUT

IfxGtm_ATOM5_1_TOUT242_P15_10_OUT.

Definition: IfxGtm_PinMap.h:764

IfxGtm_TIM2_5_P01_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P01_6_IN

IfxGtm_TIM2_5_P01_6_IN.

Definition: IfxGtm_PinMap.h:1227

IfxGtm_TOM2_0_TOUT120_P11_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT120_P11_1_OUT

IfxGtm_TOM2_0_TOUT120_P11_1_OUT.

Definition: IfxGtm_PinMap.h:2097

IfxGtm_ATOM4_2_TOUT107_P10_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT107_P10_5_OUT

IfxGtm_ATOM4_2_TOUT107_P10_5_OUT.

Definition: IfxGtm_PinMap.h:650

IfxGtm_ATOM1_7_TOUT45_P23_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT45_P23_4_OUT

IfxGtm_ATOM1_7_TOUT45_P23_4_OUT.

Definition: IfxGtm_PinMap.h:382

IfxGtm_ATOM1_0_TOUT77_P15_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT77_P15_6_OUT

IfxGtm_ATOM1_0_TOUT77_P15_6_OUT.

Definition: IfxGtm_PinMap.h:268

IfxGtm_TOM0_1_TOUT116_P02_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT116_P02_9_OUT

IfxGtm_TOM0_1_TOUT116_P02_9_OUT.

Definition: IfxGtm_PinMap.h:1681

IfxGtm_TIM3_3_P00_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P00_8_IN

IfxGtm_TIM3_3_P00_8_IN.

Definition: IfxGtm_PinMap.h:1301

IfxGtm_ATOM3_7_TOUT93_P13_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT93_P13_2_OUT

IfxGtm_ATOM3_7_TOUT93_P13_2_OUT.

Definition: IfxGtm_PinMap.h:614

IfxGtm_TIM0_7_P11_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P11_15_IN

IfxGtm_TIM0_7_P11_15_IN.

Definition: IfxGtm_PinMap.h:1099

IfxGtm_ATOM2_3_TOUT97_P11_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT97_P11_6_OUT

IfxGtm_ATOM2_3_TOUT97_P11_6_OUT.

Definition: IfxGtm_PinMap.h:449

IfxGtm_TIM4_7_P34_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P34_5_IN

IfxGtm_TIM4_7_P34_5_IN.

Definition: IfxGtm_PinMap.h:1465

IfxGtm_ATOM2_3N_TOUT143_P33_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT143_P33_14_OUT

IfxGtm_ATOM2_3N_TOUT143_P33_14_OUT.

Definition: IfxGtm_PinMap.h:437

IfxGtm_ATOM1_2_TOUT107_P10_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT107_P10_5_OUT

IfxGtm_ATOM1_2_TOUT107_P10_5_OUT.

Definition: IfxGtm_PinMap.h:298

IfxGtm_TIM1_2_P02_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P02_2_IN

IfxGtm_TIM1_2_P02_2_IN.

Definition: IfxGtm_PinMap.h:1125

IfxGtm_TOM2_14_TOUT66_P20_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_14_TOUT66_P20_10_OUT

IfxGtm_TOM2_14_TOUT66_P20_10_OUT.

Definition: IfxGtm_PinMap.h:2131

IfxGtm_TIM0_4_P10_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P10_0_IN

IfxGtm_TIM0_4_P10_0_IN.

Definition: IfxGtm_PinMap.h:1071

IfxGtm_TIM1_6_P23_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_P23_2_IN

IfxGtm_TIM1_6_P23_2_IN.

Definition: IfxGtm_PinMap.h:1166

IfxGtm_TOM1_2_TOUT2_P02_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT2_P02_2_OUT

IfxGtm_TOM1_2_TOUT2_P02_2_OUT.

Definition: IfxGtm_PinMap.h:1938

IfxGtm_ATOM4_0_TOUT109_P10_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT109_P10_7_OUT

IfxGtm_ATOM4_0_TOUT109_P10_7_OUT.

Definition: IfxGtm_PinMap.h:616

IfxGtm_TOM1_10_TOUT2_P02_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT2_P02_2_OUT

IfxGtm_TOM1_10_TOUT2_P02_2_OUT.

Definition: IfxGtm_PinMap.h:1880

IfxGtm_TIM1_5_P20_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P20_7_IN

IfxGtm_TIM1_5_P20_7_IN.

Definition: IfxGtm_PinMap.h:1156

IfxGtm_TIM0_3_P21_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P21_5_IN

IfxGtm_TIM0_3_P21_5_IN.

Definition: IfxGtm_PinMap.h:1066

IfxGtm_TIM0_4_P33_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P33_8_IN

IfxGtm_TIM0_4_P33_8_IN.

Definition: IfxGtm_PinMap.h:1078

IfxGtm_TIM0_0_P15_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P15_6_IN

IfxGtm_TIM0_0_P15_6_IN.

Definition: IfxGtm_PinMap.h:1033

IfxGtm_TIM2_0_P20_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P20_12_IN

IfxGtm_TIM2_0_P20_12_IN.

Definition: IfxGtm_PinMap.h:1181

IfxGtm_ATOM1_1N_TOUT102_P10_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1N_TOUT102_P10_0_OUT

IfxGtm_ATOM1_1N_TOUT102_P10_0_OUT.

Definition: IfxGtm_PinMap.h:272

IfxGtm_TIM2_4_P34_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P34_2_IN

IfxGtm_TIM2_4_P34_2_IN.

Definition: IfxGtm_PinMap.h:1225

IfxGtm_TOM3_6_TOUT180_P31_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_6_TOUT180_P31_6_OUT

IfxGtm_TOM3_6_TOUT180_P31_6_OUT.

Definition: IfxGtm_PinMap.h:2387

IfxGtm_TOM1_6N_TOUT99_P11_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT99_P11_10_OUT

IfxGtm_TOM1_6N_TOUT99_P11_10_OUT.

Definition: IfxGtm_PinMap.h:2033

IfxGtm_Atom_ToutMap::select

IfxPort_OutputIdx select

Port control code.

Definition: IfxGtm_PinMap.h:117

IfxGtm_TIM5_0_P33_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P33_14_IN

IfxGtm_TIM5_0_P33_14_IN.

Definition: IfxGtm_PinMap.h:1475

IfxGtm_TIM0_0_P22_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P22_1_IN

IfxGtm_TIM0_0_P22_1_IN.

Definition: IfxGtm_PinMap.h:1035

IfxGtm_TOM1_2N_TOUT73_P15_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT73_P15_2_OUT

IfxGtm_TOM1_2N_TOUT73_P15_2_OUT.

Definition: IfxGtm_PinMap.h:1932

IfxGtm_ATOM2_1N_TOUT30_P33_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT30_P33_8_OUT

IfxGtm_ATOM2_1N_TOUT30_P33_8_OUT.

Definition: IfxGtm_PinMap.h:401

IfxGtm_ATOM4_1N_TOUT102_P10_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT102_P10_0_OUT

IfxGtm_ATOM4_1N_TOUT102_P10_0_OUT.

Definition: IfxGtm_PinMap.h:625

IfxGtm_TIM6_1_P13_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P13_5_IN

IfxGtm_TIM6_1_P13_5_IN.

Definition: IfxGtm_PinMap.h:1563

IfxGtm_TIM0_1_P21_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P21_3_IN

IfxGtm_TIM0_1_P21_3_IN.

Definition: IfxGtm_PinMap.h:1044

IfxGtm_ATOM5_6N_TOUT120_P11_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6N_TOUT120_P11_1_OUT

IfxGtm_ATOM5_6N_TOUT120_P11_1_OUT.

Definition: IfxGtm_PinMap.h:839

IfxGtm_ATOM1_1_TOUT79_P15_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT79_P15_8_OUT

IfxGtm_ATOM1_1_TOUT79_P15_8_OUT.

Definition: IfxGtm_PinMap.h:287

IfxGtm_TIM1_3_P02_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P02_3_IN

IfxGtm_TIM1_3_P02_3_IN.

Definition: IfxGtm_PinMap.h:1135

IfxGtm_TIM3_3_P02_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P02_9_IN

IfxGtm_TIM3_3_P02_9_IN.

Definition: IfxGtm_PinMap.h:1302

IfxGtm_Tim.h

GTM basic functionality.

IfxGtm_TIM4_5_P01_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P01_3_IN

IfxGtm_TIM4_5_P01_3_IN.

Definition: IfxGtm_PinMap.h:1433

IfxGtm_TIM4_6_P15_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P15_15_IN

IfxGtm_TIM4_6_P15_15_IN.

Definition: IfxGtm_PinMap.h:1450

IfxGtm_TOM2_8_TOUT127_P11_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_8_TOUT127_P11_15_OUT

IfxGtm_TOM2_8_TOUT127_P11_15_OUT.

Definition: IfxGtm_PinMap.h:2253

IfxGtm_ATOM0_1_TOUT10_P00_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT10_P00_1_OUT

IfxGtm_ATOM0_1_TOUT10_P00_1_OUT.

Definition: IfxGtm_PinMap.h:170

IfxGtm_ATOM3_6_TOUT92_P13_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT92_P13_1_OUT

IfxGtm_ATOM3_6_TOUT92_P13_1_OUT.

Definition: IfxGtm_PinMap.h:603

IfxGtm_TOM0_6_TOUT98_P11_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT98_P11_9_OUT

IfxGtm_TOM0_6_TOUT98_P11_9_OUT.

Definition: IfxGtm_PinMap.h:1820

IfxGtm_TIM3_4_P22_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P22_8_IN

IfxGtm_TIM3_4_P22_8_IN.

Definition: IfxGtm_PinMap.h:1322

IfxGtm_ATOM5_0_TOUT174_P31_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT174_P31_0_OUT

IfxGtm_ATOM5_0_TOUT174_P31_0_OUT.

Definition: IfxGtm_PinMap.h:742

IfxGtm_ATOM1_5_TOUT110_P10_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT110_P10_8_OUT

IfxGtm_ATOM1_5_TOUT110_P10_8_OUT.

Definition: IfxGtm_PinMap.h:347

IfxGtm_TOM3_13_TOUT187_P31_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_13_TOUT187_P31_13_OUT

IfxGtm_TOM3_13_TOUT187_P31_13_OUT.

Definition: IfxGtm_PinMap.h:2293

IfxGtm_TOM0_10_TOUT41_P23_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT41_P23_0_OUT

IfxGtm_TOM0_10_TOUT41_P23_0_OUT.

Definition: IfxGtm_PinMap.h:1644

IfxGtm_ChXSel_m

Definition: IfxGtm_PinMap.h:76

IfxGtm_TOM2_4N_TOUT56_P21_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT56_P21_5_OUT

IfxGtm_TOM2_4N_TOUT56_P21_5_OUT.

Definition: IfxGtm_PinMap.h:2194

IfxGtm_TOM0_7_TOUT70_P20_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT70_P20_14_OUT

IfxGtm_TOM0_7_TOUT70_P20_14_OUT.

Definition: IfxGtm_PinMap.h:1846

IfxGtm_ATOM3_3N_TOUT143_P33_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT143_P33_14_OUT

IfxGtm_ATOM3_3N_TOUT143_P33_14_OUT.

Definition: IfxGtm_PinMap.h:545

IfxGtm_ATOM5_0_TOUT130_P22_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT130_P22_4_OUT

IfxGtm_ATOM5_0_TOUT130_P22_4_OUT.

Definition: IfxGtm_PinMap.h:738

IfxGtm_TOM1_6N_TOUT82_P14_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT82_P14_2_OUT

IfxGtm_TOM1_6N_TOUT82_P14_2_OUT.

Definition: IfxGtm_PinMap.h:2031

IfxGtm_ATOM0_7N_TOUT12_P00_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7N_TOUT12_P00_3_OUT

IfxGtm_ATOM0_7N_TOUT12_P00_3_OUT.

Definition: IfxGtm_PinMap.h:252

IfxGtm_TOM2_7N_TOUT134_P22_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT134_P22_8_OUT

IfxGtm_TOM2_7N_TOUT134_P22_8_OUT.

Definition: IfxGtm_PinMap.h:2239

IfxGtm_ATOM6_6_TOUT220_P25_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_6_TOUT220_P25_14_OUT

IfxGtm_ATOM6_6_TOUT220_P25_14_OUT.

Definition: IfxGtm_PinMap.h:917

IfxGtm_TOM3_2N_TOUT211_P25_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2N_TOUT211_P25_5_OUT

IfxGtm_TOM3_2N_TOUT211_P25_5_OUT.

Definition: IfxGtm_PinMap.h:2327

IFX_EXTERN

#define IFX_EXTERN

Definition: Compilers.h:63

IfxGtm_ATOM5_2N_TOUT259_P14_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT259_P14_14_OUT

IfxGtm_ATOM5_2N_TOUT259_P14_14_OUT.

Definition: IfxGtm_PinMap.h:775

IfxGtm_TOM4_15_TOUT237_P24_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_15_TOUT237_P24_15_OUT

IfxGtm_TOM4_15_TOUT237_P24_15_OUT.

Definition: IfxGtm_PinMap.h:2451

IfxGtm_ATOM4_7_TOUT138_P23_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7_TOUT138_P23_6_OUT

IfxGtm_ATOM4_7_TOUT138_P23_6_OUT.

Definition: IfxGtm_PinMap.h:724

IfxGtm_ATOM6_2_TOUT252_P13_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT252_P13_14_OUT

IfxGtm_ATOM6_2_TOUT252_P13_14_OUT.

Definition: IfxGtm_PinMap.h:889

IfxGtm_TOM1_3N_TOUT24_P33_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3N_TOUT24_P33_2_OUT

IfxGtm_TOM1_3N_TOUT24_P33_2_OUT.

Definition: IfxGtm_PinMap.h:1945

IfxGtm_TOM4_2_TOUT192_P30_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_2_TOUT192_P30_2_OUT

IfxGtm_TOM4_2_TOUT192_P30_2_OUT.

Definition: IfxGtm_PinMap.h:2459

IfxGtm_TIM4_7_P30_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P30_7_IN

IfxGtm_TIM4_7_P30_7_IN.

Definition: IfxGtm_PinMap.h:1464

IfxGtm_ATOM7_4_TOUT167_P00_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_4_TOUT167_P00_13_OUT

IfxGtm_ATOM7_4_TOUT167_P00_13_OUT.

Definition: IfxGtm_PinMap.h:954

IfxGtm_CLK0_P23_1_OUT

IFX_EXTERN IfxGtm_Clk_Out IfxGtm_CLK0_P23_1_OUT

CGM generated clock.

Definition: IfxGtm_PinMap.h:1024

IfxGtm_TOM1_2_TOUT33_P33_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT33_P33_11_OUT

IfxGtm_TOM1_2_TOUT33_P33_11_OUT.

Definition: IfxGtm_PinMap.h:1939

IfxGtm_TIM2_6_P01_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P01_0_IN

IfxGtm_TIM2_6_P01_0_IN.

Definition: IfxGtm_PinMap.h:1239

IfxGtm_TOM0_1N_TOUT22_P33_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT22_P33_0_OUT

IfxGtm_TOM0_1N_TOUT22_P33_0_OUT.

Definition: IfxGtm_PinMap.h:1670

IfxGtm_TOM3_14_TOUT153_P02_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_14_TOUT153_P02_13_OUT

IfxGtm_TOM3_14_TOUT153_P02_13_OUT.

Definition: IfxGtm_PinMap.h:2298

IfxGtm_TIM4_4_P11_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P11_7_IN

IfxGtm_TIM4_4_P11_7_IN.

Definition: IfxGtm_PinMap.h:1422

IfxGtm_TIM5_0_P24_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P24_8_IN

IfxGtm_TIM5_0_P24_8_IN.

Definition: IfxGtm_PinMap.h:1472

IfxGtm_TIM0_2_P23_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P23_5_IN

IfxGtm_TIM0_2_P23_5_IN.

Definition: IfxGtm_PinMap.h:1056

IfxGtm_ATOM1_2_TOUT70_P20_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT70_P20_14_OUT

IfxGtm_ATOM1_2_TOUT70_P20_14_OUT.

Definition: IfxGtm_PinMap.h:303

IfxGtm_TIM1_4_P20_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P20_0_IN

IfxGtm_TIM1_4_P20_0_IN.

Definition: IfxGtm_PinMap.h:1147

IfxGtm_TOM1_1N_TOUT72_P15_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT72_P15_1_OUT

IfxGtm_TOM1_1N_TOUT72_P15_1_OUT.

Definition: IfxGtm_PinMap.h:1913

IfxGtm_TOM0_6N_TOUT27_P33_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT27_P33_5_OUT

IfxGtm_TOM0_6N_TOUT27_P33_5_OUT.

Definition: IfxGtm_PinMap.h:1792

IfxGtm_TOM2_6_TOUT256_P13_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT256_P13_7_OUT

IfxGtm_TOM2_6_TOUT256_P13_7_OUT.

Definition: IfxGtm_PinMap.h:2234

IfxGtm_ATOM4_4_TOUT131_P22_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT131_P22_5_OUT

IfxGtm_ATOM4_4_TOUT131_P22_5_OUT.

Definition: IfxGtm_PinMap.h:681

IfxGtm_ChXSel_p

Definition: IfxGtm_PinMap.h:79

IfxGtm_ATOM3_4_TOUT131_P22_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT131_P22_5_OUT

IfxGtm_ATOM3_4_TOUT131_P22_5_OUT.

Definition: IfxGtm_PinMap.h:568

IfxGtm_TIM2_7_P13_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P13_9_IN

IfxGtm_TIM2_7_P13_9_IN.

Definition: IfxGtm_PinMap.h:1255

IfxGtm_ATOM0_3N_TOUT16_P00_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT16_P00_7_OUT

IfxGtm_ATOM0_3N_TOUT16_P00_7_OUT.

Definition: IfxGtm_PinMap.h:197

IfxGtm_Tim_TinMap::pin

IfxPort_Pin pin

Port pin.

Definition: IfxGtm_PinMap.h:105

IfxGtm_TIM5_3_P01_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P01_13_IN

IfxGtm_TIM5_3_P01_13_IN.

Definition: IfxGtm_PinMap.h:1497

IfxGtm_TOM2_6N_TOUT86_P14_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT86_P14_6_OUT

IfxGtm_TOM2_6N_TOUT86_P14_6_OUT.

Definition: IfxGtm_PinMap.h:2227

IfxGtm_TIM1_4_P33_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P33_0_IN

IfxGtm_TIM1_4_P33_0_IN.

Definition: IfxGtm_PinMap.h:1151

IfxGtm_ATOM8_6_TOUT236_P24_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_6_TOUT236_P24_14_OUT

IfxGtm_ATOM8_6_TOUT236_P24_14_OUT.

Definition: IfxGtm_PinMap.h:1014

IfxGtm_TOM2_5N_TOUT250_P13_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5N_TOUT250_P13_11_OUT

IfxGtm_TOM2_5N_TOUT250_P13_11_OUT.

Definition: IfxGtm_PinMap.h:2210

IfxGtm_TIM0_5_P02_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P02_5_IN

IfxGtm_TIM0_5_P02_5_IN.

Definition: IfxGtm_PinMap.h:1080

IfxGtm_ATOM4_4_TOUT44_P23_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT44_P23_3_OUT

IfxGtm_ATOM4_4_TOUT44_P23_3_OUT.

Definition: IfxGtm_PinMap.h:683

IfxGtm_ATOM6_2_TOUT129_P12_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT129_P12_1_OUT

IfxGtm_ATOM6_2_TOUT129_P12_1_OUT.

Definition: IfxGtm_PinMap.h:883

IfxGtm_TOM3_1_TOUT131_P22_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT131_P22_5_OUT

IfxGtm_TOM3_1_TOUT131_P22_5_OUT.

Definition: IfxGtm_PinMap.h:2316

IfxGtm_ATOM1_6N_TOUT133_P22_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT133_P22_7_OUT

IfxGtm_ATOM1_6N_TOUT133_P22_7_OUT.

Definition: IfxGtm_PinMap.h:359

IfxGtm_ATOM2_4N_TOUT97_P11_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4N_TOUT97_P11_6_OUT

IfxGtm_ATOM2_4N_TOUT97_P11_6_OUT.

Definition: IfxGtm_PinMap.h:453

IfxGtm_TOM1_14_TOUT270_P10_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT270_P10_15_OUT

IfxGtm_TOM1_14_TOUT270_P10_15_OUT.

Definition: IfxGtm_PinMap.h:1897

IfxGtm_TOM1_10_TOUT143_P33_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT143_P33_14_OUT

IfxGtm_TOM1_10_TOUT143_P33_14_OUT.

Definition: IfxGtm_PinMap.h:1878

IfxGtm_ATOM3_4_TOUT51_P21_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT51_P21_0_OUT

IfxGtm_ATOM3_4_TOUT51_P21_0_OUT.

Definition: IfxGtm_PinMap.h:573

IfxGtm_ATOM0_5_TOUT5_P02_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT5_P02_5_OUT

IfxGtm_ATOM0_5_TOUT5_P02_5_OUT.

Definition: IfxGtm_PinMap.h:237

IfxGtm_TOM2_2N_TOUT99_P11_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2N_TOUT99_P11_10_OUT

IfxGtm_TOM2_2N_TOUT99_P11_10_OUT.

Definition: IfxGtm_PinMap.h:2162

IfxGtm_ATOM3_2N_TOUT166_P00_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT166_P00_14_OUT

IfxGtm_ATOM3_2N_TOUT166_P00_14_OUT.

Definition: IfxGtm_PinMap.h:527

IfxGtm_ATOM7_2_TOUT243_P15_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_2_TOUT243_P15_11_OUT

IfxGtm_ATOM7_2_TOUT243_P15_11_OUT.

Definition: IfxGtm_PinMap.h:943

IfxGtm_Tim_TinMap

TIN pin mapping structure.

Definition: IfxGtm_PinMap.h:101

IfxGtm_TOM1_4_TOUT81_P14_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT81_P14_1_OUT

IfxGtm_TOM1_4_TOUT81_P14_1_OUT.

Definition: IfxGtm_PinMap.h:1984

IfxGtm_TOM1_2N_TOUT143_P33_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT143_P33_14_OUT

IfxGtm_TOM1_2N_TOUT143_P33_14_OUT.

Definition: IfxGtm_PinMap.h:1925

IfxGtm_TIM2_3_P11_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P11_6_IN

IfxGtm_TIM2_3_P11_6_IN.

Definition: IfxGtm_PinMap.h:1208

IfxGtm_ATOM1_3_TOUT3_P02_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT3_P02_3_OUT

IfxGtm_ATOM1_3_TOUT3_P02_3_OUT.

Definition: IfxGtm_PinMap.h:317

IfxGtm_TOM1_13_TOUT5_P02_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT5_P02_5_OUT

IfxGtm_TOM1_13_TOUT5_P02_5_OUT.

Definition: IfxGtm_PinMap.h:1894

IfxGtm_TIM6_2_P23_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P23_5_IN

IfxGtm_TIM6_2_P23_5_IN.

Definition: IfxGtm_PinMap.h:1574

IfxGtm_TIM5_2_P14_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P14_14_IN

IfxGtm_TIM5_2_P14_14_IN.

Definition: IfxGtm_PinMap.h:1491

IfxGtm_TIM4_0_P24_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P24_0_IN

IfxGtm_TIM4_0_P24_0_IN.

Definition: IfxGtm_PinMap.h:1374

IfxGtm_TOM0_4N_TOUT89_P14_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT89_P14_9_OUT

IfxGtm_TOM0_4N_TOUT89_P14_9_OUT.

Definition: IfxGtm_PinMap.h:1741

IfxGtm_ATOM3_2N_TOUT35_P33_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT35_P33_13_OUT

IfxGtm_ATOM3_2N_TOUT35_P33_13_OUT.

Definition: IfxGtm_PinMap.h:530

IfxGtm_ATOM6_6_TOUT160_P01_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_6_TOUT160_P01_9_OUT

IfxGtm_ATOM6_6_TOUT160_P01_9_OUT.

Definition: IfxGtm_PinMap.h:915

IfxGtm_ATOM6_4_TOUT31_P33_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT31_P33_9_OUT

IfxGtm_ATOM6_4_TOUT31_P33_9_OUT.

Definition: IfxGtm_PinMap.h:906

IfxGtm_ATOM5_1N_TOUT123_P11_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT123_P11_7_OUT

IfxGtm_ATOM5_1N_TOUT123_P11_7_OUT.

Definition: IfxGtm_PinMap.h:746

IfxGtm_TIM1_6_P14_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_P14_3_IN

IfxGtm_TIM1_6_P14_3_IN.

Definition: IfxGtm_PinMap.h:1163

IfxGtm_TIM0_2_P33_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P33_6_IN

IfxGtm_TIM0_2_P33_6_IN.

Definition: IfxGtm_PinMap.h:1058

IfxGtm_ATOM5_2_TOUT208_P25_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT208_P25_2_OUT

IfxGtm_ATOM5_2_TOUT208_P25_2_OUT.

Definition: IfxGtm_PinMap.h:783

IfxGtm_ATOM6_0_TOUT141_P32_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT141_P32_6_OUT

IfxGtm_ATOM6_0_TOUT141_P32_6_OUT.

Definition: IfxGtm_PinMap.h:868

IfxGtm_ATOM6_6_TOUT188_P31_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_6_TOUT188_P31_14_OUT

IfxGtm_ATOM6_6_TOUT188_P31_14_OUT.

Definition: IfxGtm_PinMap.h:916

IfxGtm_TIM2_3_P11_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P11_5_IN

IfxGtm_TIM2_3_P11_5_IN.

Definition: IfxGtm_PinMap.h:1207

IfxGtm_ATOM3_1N_TOUT91_P13_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT91_P13_0_OUT

IfxGtm_ATOM3_1N_TOUT91_P13_0_OUT.

Definition: IfxGtm_PinMap.h:515

IfxGtm_TOM4_7_TOUT264_P13_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_7_TOUT264_P13_15_OUT

IfxGtm_TOM4_7_TOUT264_P13_15_OUT.

Definition: IfxGtm_PinMap.h:2486

IfxGtm_ATOM3_2N_TOUT92_P13_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT92_P13_1_OUT

IfxGtm_ATOM3_2N_TOUT92_P13_1_OUT.

Definition: IfxGtm_PinMap.h:534

IfxGtm_TIM0_4_P22_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P22_3_IN

IfxGtm_TIM0_4_P22_3_IN.

Definition: IfxGtm_PinMap.h:1075

IfxGtm_TOM1_7_TOUT75_P15_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT75_P15_4_OUT

IfxGtm_TOM1_7_TOUT75_P15_4_OUT.

Definition: IfxGtm_PinMap.h:2076

IfxGtm_TIM6_6_P00_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P00_14_IN

IfxGtm_TIM6_6_P00_14_IN.

Definition: IfxGtm_PinMap.h:1604

IfxGtm_TOM1_6N_TOUT31_P33_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT31_P33_9_OUT

IfxGtm_TOM1_6N_TOUT31_P33_9_OUT.

Definition: IfxGtm_PinMap.h:2024

IfxGtm_ATOM3_6N_TOUT88_P14_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6N_TOUT88_P14_8_OUT

IfxGtm_ATOM3_6N_TOUT88_P14_8_OUT.

Definition: IfxGtm_PinMap.h:595

IfxGtm_TIM0_4_P14_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P14_1_IN

IfxGtm_TIM0_4_P14_1_IN.

Definition: IfxGtm_PinMap.h:1073

IfxGtm_TOM0_12_TOUT44_P23_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT44_P23_3_OUT

IfxGtm_TOM0_12_TOUT44_P23_3_OUT.

Definition: IfxGtm_PinMap.h:1653

IfxGtm_TIM6_7_P31_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P31_15_IN

IfxGtm_TIM6_7_P31_15_IN.

Definition: IfxGtm_PinMap.h:1620

IfxGtm_ATOM0_2_TOUT55_P21_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT55_P21_4_OUT

IfxGtm_ATOM0_2_TOUT55_P21_4_OUT.

Definition: IfxGtm_PinMap.h:194

IfxGtm_TIM6_4_P30_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P30_12_IN

IfxGtm_TIM6_4_P30_12_IN.

Definition: IfxGtm_PinMap.h:1594

IfxGtm_TOM0_6N_TOUT69_P20_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT69_P20_13_OUT

IfxGtm_TOM0_6N_TOUT69_P20_13_OUT.

Definition: IfxGtm_PinMap.h:1800

IfxGtm_TOM0_4_TOUT37_P32_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT37_P32_1_OUT

IfxGtm_TOM0_4_TOUT37_P32_1_OUT.

Definition: IfxGtm_PinMap.h:1750

IfxGtm_ATOM4_5_TOUT45_P23_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT45_P23_4_OUT

IfxGtm_ATOM4_5_TOUT45_P23_4_OUT.

Definition: IfxGtm_PinMap.h:698

IfxGtm_ATOM3_7_TOUT63_P20_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT63_P20_7_OUT

IfxGtm_ATOM3_7_TOUT63_P20_7_OUT.

Definition: IfxGtm_PinMap.h:613

IfxGtm_TOM0_7_TOUT93_P13_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT93_P13_2_OUT

IfxGtm_TOM0_7_TOUT93_P13_2_OUT.

Definition: IfxGtm_PinMap.h:1850

IfxGtm_ATOM4_5_TOUT116_P02_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT116_P02_9_OUT

IfxGtm_ATOM4_5_TOUT116_P02_9_OUT.

Definition: IfxGtm_PinMap.h:695

IfxGtm_ATOM1_3N_TOUT74_P15_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3N_TOUT74_P15_3_OUT

IfxGtm_ATOM1_3N_TOUT74_P15_3_OUT.

Definition: IfxGtm_PinMap.h:311

IfxGtm_ATOM8_3_TOUT233_P24_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_3_TOUT233_P24_11_OUT

IfxGtm_ATOM8_3_TOUT233_P24_11_OUT.

Definition: IfxGtm_PinMap.h:997

IfxGtm_TOM1_6_TOUT80_P14_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT80_P14_0_OUT

IfxGtm_TOM1_6_TOUT80_P14_0_OUT.

Definition: IfxGtm_PinMap.h:2044

IfxGtm_TIM2_5_P15_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P15_2_IN

IfxGtm_TIM2_5_P15_2_IN.

Definition: IfxGtm_PinMap.h:1233

IfxGtm_TIM1_1_P00_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P00_10_IN

IfxGtm_TIM1_1_P00_10_IN.

Definition: IfxGtm_PinMap.h:1115

IfxGtm_TOM3_0_TOUT130_P22_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_0_TOUT130_P22_4_OUT

IfxGtm_TOM3_0_TOUT130_P22_4_OUT.

Definition: IfxGtm_PinMap.h:2270

IfxGtm_TOM0_4_TOUT39_P32_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT39_P32_3_OUT

IfxGtm_TOM0_4_TOUT39_P32_3_OUT.

Definition: IfxGtm_PinMap.h:1751

IfxGtm_ATOM0_4_TOUT39_P32_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT39_P32_3_OUT

IfxGtm_ATOM0_4_TOUT39_P32_3_OUT.

Definition: IfxGtm_PinMap.h:220

IfxGtm_TOM2_4N_TOUT60_P20_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT60_P20_1_OUT

IfxGtm_TOM2_4N_TOUT60_P20_1_OUT.

Definition: IfxGtm_PinMap.h:2195

IfxGtm_TOM1_6_TOUT4_P02_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT4_P02_4_OUT

IfxGtm_TOM1_6_TOUT4_P02_4_OUT.

Definition: IfxGtm_PinMap.h:2041

IfxGtm_ATOM2_0N_TOUT108_P10_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0N_TOUT108_P10_6_OUT

IfxGtm_ATOM2_0N_TOUT108_P10_6_OUT.

Definition: IfxGtm_PinMap.h:387

IfxGtm_Atom_ToutMap

ATOM TOUT pin mapping structure.

Definition: IfxGtm_PinMap.h:110

IfxGtm_TOM0_3N_TOUT75_P15_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT75_P15_4_OUT

IfxGtm_TOM0_3N_TOUT75_P15_4_OUT.

Definition: IfxGtm_PinMap.h:1718

IfxGtm_TIM3_3_P25_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P25_3_IN

IfxGtm_TIM3_3_P25_3_IN.

Definition: IfxGtm_PinMap.h:1310

IfxGtm_ATOM8_7_TOUT152_P02_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_7_TOUT152_P02_15_OUT

IfxGtm_ATOM8_7_TOUT152_P02_15_OUT.

Definition: IfxGtm_PinMap.h:1017

IfxGtm_ATOM1_0_TOUT68_P20_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT68_P20_12_OUT

IfxGtm_ATOM1_0_TOUT68_P20_12_OUT.

Definition: IfxGtm_PinMap.h:266

IfxGtm_ATOM7_5_TOUT195_P30_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_5_TOUT195_P30_5_OUT

IfxGtm_ATOM7_5_TOUT195_P30_5_OUT.

Definition: IfxGtm_PinMap.h:961

IfxGtm_TIM4_7_P00_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P00_14_IN

IfxGtm_TIM4_7_P00_14_IN.

Definition: IfxGtm_PinMap.h:1455

IfxGtm_ATOM5_5_TOUT179_P31_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT179_P31_5_OUT

IfxGtm_ATOM5_5_TOUT179_P31_5_OUT.

Definition: IfxGtm_PinMap.h:834

IfxGtm_ATOM3_2N_TOUT52_P21_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT52_P21_1_OUT

IfxGtm_ATOM3_2N_TOUT52_P21_1_OUT.

Definition: IfxGtm_PinMap.h:531

IfxGtm_TIM0_1_P33_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P33_9_IN

IfxGtm_TIM0_1_P33_9_IN.

Definition: IfxGtm_PinMap.h:1047

IfxGtm_TIM1_7_P14_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_P14_4_IN

IfxGtm_TIM1_7_P14_4_IN.

Definition: IfxGtm_PinMap.h:1169

IfxGtm_TOM4_3_TOUT193_P30_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_3_TOUT193_P30_3_OUT

IfxGtm_TOM4_3_TOUT193_P30_3_OUT.

Definition: IfxGtm_PinMap.h:2463

IfxGtm_TOM0_12_TOUT98_P11_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT98_P11_9_OUT

IfxGtm_TOM0_12_TOUT98_P11_9_OUT.

Definition: IfxGtm_PinMap.h:1656

IfxGtm_ATOM0_2N_TOUT23_P33_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT23_P33_1_OUT

IfxGtm_ATOM0_2N_TOUT23_P33_1_OUT.

Definition: IfxGtm_PinMap.h:180

IfxGtm_ATOM3_0_TOUT26_P33_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT26_P33_4_OUT

IfxGtm_ATOM3_0_TOUT26_P33_4_OUT.

Definition: IfxGtm_PinMap.h:503

IfxGtm_TOM1_7_TOUT101_P11_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT101_P11_12_OUT

IfxGtm_TOM1_7_TOUT101_P11_12_OUT.

Definition: IfxGtm_PinMap.h:2064

IfxGtm_TOM0_1N_TOUT90_P14_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT90_P14_10_OUT

IfxGtm_TOM0_1N_TOUT90_P14_10_OUT.

Definition: IfxGtm_PinMap.h:1678

IfxGtm_TIM5_3_P34_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P34_1_IN

IfxGtm_TIM5_3_P34_1_IN.

Definition: IfxGtm_PinMap.h:1506

IfxGtm_TOM3_7_TOUT248_P13_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_7_TOUT248_P13_9_OUT

IfxGtm_TOM3_7_TOUT248_P13_9_OUT.

Definition: IfxGtm_PinMap.h:2402

IfxGtm_ATOM6_5_TOUT255_P13_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_5_TOUT255_P13_6_OUT

IfxGtm_ATOM6_5_TOUT255_P13_6_OUT.

Definition: IfxGtm_PinMap.h:912

IfxGtm_ChXSel_b

Definition: IfxGtm_PinMap.h:62

IfxGtm_ATOM1_0_TOUT87_P14_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT87_P14_7_OUT

IfxGtm_ATOM1_0_TOUT87_P14_7_OUT.

Definition: IfxGtm_PinMap.h:269

IfxGtm_TOM2_12_TOUT72_P15_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_12_TOUT72_P15_1_OUT

IfxGtm_TOM2_12_TOUT72_P15_1_OUT.

Definition: IfxGtm_PinMap.h:2121

IfxGtm_ATOM0_1_TOUT1_P02_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT1_P02_1_OUT

IfxGtm_ATOM0_1_TOUT1_P02_1_OUT.

Definition: IfxGtm_PinMap.h:173

IfxGtm_TIM2_4_P21_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P21_0_IN

IfxGtm_TIM2_4_P21_0_IN.

Definition: IfxGtm_PinMap.h:1223

IfxGtm_TOM2_5N_TOUT53_P21_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5N_TOUT53_P21_2_OUT

IfxGtm_TOM2_5N_TOUT53_P21_2_OUT.

Definition: IfxGtm_PinMap.h:2211

IfxGtm_TOM2_6_TOUT59_P20_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT59_P20_0_OUT

IfxGtm_TOM2_6_TOUT59_P20_0_OUT.

Definition: IfxGtm_PinMap.h:2235

IfxGtm_TIM4_4_P15_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P15_13_IN

IfxGtm_TIM4_4_P15_13_IN.

Definition: IfxGtm_PinMap.h:1423

IfxGtm_TIM6_3_P31_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P31_11_IN

IfxGtm_TIM6_3_P31_11_IN.

Definition: IfxGtm_PinMap.h:1587

IfxGtm_ATOM2_0_TOUT32_P33_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT32_P33_10_OUT

IfxGtm_ATOM2_0_TOUT32_P33_10_OUT.

Definition: IfxGtm_PinMap.h:396

IfxGtm_TOM4_7_TOUT161_P01_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_7_TOUT161_P01_13_OUT

IfxGtm_TOM4_7_TOUT161_P01_13_OUT.

Definition: IfxGtm_PinMap.h:2483

IfxGtm_ATOM1_4N_TOUT75_P15_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT75_P15_4_OUT

IfxGtm_ATOM1_4N_TOUT75_P15_4_OUT.

Definition: IfxGtm_PinMap.h:328

IfxGtm_TIM5_3_P31_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P31_11_IN

IfxGtm_TIM5_3_P31_11_IN.

Definition: IfxGtm_PinMap.h:1505

IfxGtm_TIM5_5_P32_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P32_5_IN

IfxGtm_TIM5_5_P32_5_IN.

Definition: IfxGtm_PinMap.h:1527

IfxGtm_TOM0_4N_TOUT56_P21_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT56_P21_5_OUT

IfxGtm_TOM0_4N_TOUT56_P21_5_OUT.

Definition: IfxGtm_PinMap.h:1738

IfxGtm_Tom_ToutMap::tom

IfxGtm_Tom tom

TOM unit index.

Definition: IfxGtm_PinMap.h:126

IfxGtm_TIM3_7_P20_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P20_7_IN

IfxGtm_TIM3_7_P20_7_IN.

Definition: IfxGtm_PinMap.h:1359

IfxGtm_TOM2_1N_TOUT52_P21_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT52_P21_1_OUT

IfxGtm_TOM2_1N_TOUT52_P21_1_OUT.

Definition: IfxGtm_PinMap.h:2142

IfxGtm_TOM2_0_TOUT94_P13_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT94_P13_3_OUT

IfxGtm_TOM2_0_TOUT94_P13_3_OUT.

Definition: IfxGtm_PinMap.h:2103

IfxGtm_TIM1_0_P10_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P10_7_IN

IfxGtm_TIM1_0_P10_7_IN.

Definition: IfxGtm_PinMap.h:1107

IfxGtm_ATOM0_4_TOUT61_P20_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT61_P20_3_OUT

IfxGtm_ATOM0_4_TOUT61_P20_3_OUT.

Definition: IfxGtm_PinMap.h:224

IfxGtm_TOM1_10_TOUT266_P10_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT266_P10_10_OUT

IfxGtm_TOM1_10_TOUT266_P10_10_OUT.

Definition: IfxGtm_PinMap.h:1879

IfxGtm_ATOM3_6N_TOUT27_P33_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6N_TOUT27_P33_5_OUT

IfxGtm_ATOM3_6N_TOUT27_P33_5_OUT.

Definition: IfxGtm_PinMap.h:593

IfxGtm_ATOM2_7_TOUT63_P20_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT63_P20_7_OUT

IfxGtm_ATOM2_7_TOUT63_P20_7_OUT.

Definition: IfxGtm_PinMap.h:492

IfxGtm_ATOM2_6N_TOUT27_P33_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6N_TOUT27_P33_5_OUT

IfxGtm_ATOM2_6N_TOUT27_P33_5_OUT.

Definition: IfxGtm_PinMap.h:473

IfxGtm_ATOM2_4N_TOUT29_P33_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4N_TOUT29_P33_7_OUT

IfxGtm_ATOM2_4N_TOUT29_P33_7_OUT.

Definition: IfxGtm_PinMap.h:450

IfxGtm_ATOM2_7_TOUT93_P13_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT93_P13_2_OUT

IfxGtm_ATOM2_7_TOUT93_P13_2_OUT.

Definition: IfxGtm_PinMap.h:493

IfxGtm_TOM1_1_TOUT10_P00_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT10_P00_1_OUT

IfxGtm_TOM1_1_TOUT10_P00_1_OUT.

Definition: IfxGtm_PinMap.h:1914

IfxGtm_TIM3_0_P20_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P20_12_IN

IfxGtm_TIM3_0_P20_12_IN.

Definition: IfxGtm_PinMap.h:1270

IfxGtm_ATOM5_4_TOUT245_P15_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT245_P15_13_OUT

IfxGtm_ATOM5_4_TOUT245_P15_13_OUT.

Definition: IfxGtm_PinMap.h:822

IfxGtm_ATOM6_5_TOUT243_P15_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_5_TOUT243_P15_11_OUT

IfxGtm_ATOM6_5_TOUT243_P15_11_OUT.

Definition: IfxGtm_PinMap.h:911

IfxGtm_TOM1_0_TOUT76_P15_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT76_P15_5_OUT

IfxGtm_TOM1_0_TOUT76_P15_5_OUT.

Definition: IfxGtm_PinMap.h:1873

IfxGtm_ATOM3_7_TOUT144_P33_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT144_P33_15_OUT

IfxGtm_ATOM3_7_TOUT144_P33_15_OUT.

Definition: IfxGtm_PinMap.h:611

IfxGtm_TIM3_5_P20_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P20_9_IN

IfxGtm_TIM3_5_P20_9_IN.

Definition: IfxGtm_PinMap.h:1332

IfxGtm_ATOM1_6_TOUT16_P00_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT16_P00_7_OUT

IfxGtm_ATOM1_6_TOUT16_P00_7_OUT.

Definition: IfxGtm_PinMap.h:365

IfxGtm_ATOM2_1N_TOUT98_P11_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT98_P11_9_OUT

IfxGtm_ATOM2_1N_TOUT98_P11_9_OUT.

Definition: IfxGtm_PinMap.h:406

IfxGtm_ATOM4_7N_TOUT107_P10_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7N_TOUT107_P10_5_OUT

IfxGtm_ATOM4_7N_TOUT107_P10_5_OUT.

Definition: IfxGtm_PinMap.h:717

IfxGtm_TOM1_6N_TOUT10_P00_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT10_P00_1_OUT

IfxGtm_TOM1_6N_TOUT10_P00_1_OUT.

Definition: IfxGtm_PinMap.h:2016

IfxGtm_TOM0_7_TOUT25_P33_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT25_P33_3_OUT

IfxGtm_TOM0_7_TOUT25_P33_3_OUT.

Definition: IfxGtm_PinMap.h:1841

IfxGtm_TOM3_2_TOUT132_P22_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT132_P22_6_OUT

IfxGtm_TOM3_2_TOUT132_P22_6_OUT.

Definition: IfxGtm_PinMap.h:2331

IfxGtm_TIM4_0_P00_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P00_13_IN

IfxGtm_TIM4_0_P00_13_IN.

Definition: IfxGtm_PinMap.h:1364

IfxGtm_TOM1_1N_TOUT22_P33_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT22_P33_0_OUT

IfxGtm_TOM1_1N_TOUT22_P33_0_OUT.

Definition: IfxGtm_PinMap.h:1907

IfxGtm_TIM5_4_P00_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P00_0_IN

IfxGtm_TIM5_4_P00_0_IN.

Definition: IfxGtm_PinMap.h:1507

IfxGtm_ATOM8_7_TOUT264_P13_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_7_TOUT264_P13_15_OUT

IfxGtm_ATOM8_7_TOUT264_P13_15_OUT.

Definition: IfxGtm_PinMap.h:1023

IfxGtm_ATOM4_4_TOUT57_P21_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT57_P21_6_OUT

IfxGtm_ATOM4_4_TOUT57_P21_6_OUT.

Definition: IfxGtm_PinMap.h:685

IfxGtm_ATOM1_7N_TOUT104_P10_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT104_P10_2_OUT

IfxGtm_ATOM1_7N_TOUT104_P10_2_OUT.

Definition: IfxGtm_PinMap.h:371

IfxGtm_TOM0_15_TOUT42_P23_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT42_P23_1_OUT

IfxGtm_TOM0_15_TOUT42_P23_1_OUT.

Definition: IfxGtm_PinMap.h:1665

IfxGtm_TOM0_7_TOUT50_P22_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT50_P22_3_OUT

IfxGtm_TOM0_7_TOUT50_P22_3_OUT.

Definition: IfxGtm_PinMap.h:1844

IfxGtm_TIM0_4_P32_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P32_3_IN

IfxGtm_TIM0_4_P32_3_IN.

Definition: IfxGtm_PinMap.h:1076

IfxGtm_TOM2_13_TOUT65_P20_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_13_TOUT65_P20_9_OUT

IfxGtm_TOM2_13_TOUT65_P20_9_OUT.

Definition: IfxGtm_PinMap.h:2126

IfxGtm_TIM4_5_P10_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P10_11_IN

IfxGtm_TIM4_5_P10_11_IN.

Definition: IfxGtm_PinMap.h:1434

IfxGtm_TOM1_5N_TOUT37_P32_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT37_P32_1_OUT

IfxGtm_TOM1_5N_TOUT37_P32_1_OUT.

Definition: IfxGtm_PinMap.h:1994

IfxGtm_ATOM5_5_TOUT140_P32_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT140_P32_5_OUT

IfxGtm_ATOM5_5_TOUT140_P32_5_OUT.

Definition: IfxGtm_PinMap.h:832

IfxGtm_ATOM4_2N_TOUT110_P10_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2N_TOUT110_P10_8_OUT

IfxGtm_ATOM4_2N_TOUT110_P10_8_OUT.

Definition: IfxGtm_PinMap.h:642

IfxGtm_ATOM3_3_TOUT21_P00_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT21_P00_12_OUT

IfxGtm_ATOM3_3_TOUT21_P00_12_OUT.

Definition: IfxGtm_PinMap.h:556

IfxGtm_TOM1_5N_TOUT9_P00_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT9_P00_0_OUT

IfxGtm_TOM1_5N_TOUT9_P00_0_OUT.

Definition: IfxGtm_PinMap.h:2001

IfxGtm_TIM3_4_P13_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P13_5_IN

IfxGtm_TIM3_4_P13_5_IN.

Definition: IfxGtm_PinMap.h:1316

IfxGtm_TOM2_5N_TOUT119_P11_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5N_TOUT119_P11_0_OUT

IfxGtm_TOM2_5N_TOUT119_P11_0_OUT.

Definition: IfxGtm_PinMap.h:2208

IfxGtm_ATOM0_6_TOUT24_P33_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT24_P33_2_OUT

IfxGtm_ATOM0_6_TOUT24_P33_2_OUT.

Definition: IfxGtm_PinMap.h:247

IfxGtm_TIM0_3_P32_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P32_2_IN

IfxGtm_TIM0_3_P32_2_IN.

Definition: IfxGtm_PinMap.h:1068

IfxGtm_ATOM3_1_TOUT95_P11_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT95_P11_2_OUT

IfxGtm_ATOM3_1_TOUT95_P11_2_OUT.

Definition: IfxGtm_PinMap.h:524

IfxGtm_ATOM2_3N_TOUT168_P00_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT168_P00_15_OUT

IfxGtm_ATOM2_3N_TOUT168_P00_15_OUT.

Definition: IfxGtm_PinMap.h:438

IfxGtm_TIM2_4_P11_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P11_9_IN

IfxGtm_TIM2_4_P11_9_IN.

Definition: IfxGtm_PinMap.h:1218

IfxGtm_ATOM2_4_TOUT30_P33_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT30_P33_8_OUT

IfxGtm_ATOM2_4_TOUT30_P33_8_OUT.

Definition: IfxGtm_PinMap.h:456

IfxGtm_TOM3_4_TOUT111_P01_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT111_P01_3_OUT

IfxGtm_TOM3_4_TOUT111_P01_3_OUT.

Definition: IfxGtm_PinMap.h:2359

IfxGtm_TOM2_6N_TOUT54_P21_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT54_P21_3_OUT

IfxGtm_TOM2_6N_TOUT54_P21_3_OUT.

Definition: IfxGtm_PinMap.h:2226

IfxGtm_ATOM1_4N_TOUT108_P10_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT108_P10_6_OUT

IfxGtm_ATOM1_4N_TOUT108_P10_6_OUT.

Definition: IfxGtm_PinMap.h:321

IfxGtm_ATOM3_7N_TOUT89_P14_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7N_TOUT89_P14_9_OUT

IfxGtm_ATOM3_7N_TOUT89_P14_9_OUT.

Definition: IfxGtm_PinMap.h:607

IfxGtm_TOM2_2_TOUT46_P23_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT46_P23_5_OUT

IfxGtm_TOM2_2_TOUT46_P23_5_OUT.

Definition: IfxGtm_PinMap.h:2166

IfxGtm_TIM6_0_P31_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P31_8_IN

IfxGtm_TIM6_0_P31_8_IN.

Definition: IfxGtm_PinMap.h:1560

IfxGtm_TOM3_1N_TOUT158_P01_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1N_TOUT158_P01_12_OUT

IfxGtm_TOM3_1N_TOUT158_P01_12_OUT.

Definition: IfxGtm_PinMap.h:2309

IfxGtm_TIM3_5_P25_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P25_5_IN

IfxGtm_TIM3_5_P25_5_IN.

Definition: IfxGtm_PinMap.h:1335

IfxGtm_ATOM3_3_TOUT97_P11_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT97_P11_6_OUT

IfxGtm_ATOM3_3_TOUT97_P11_6_OUT.

Definition: IfxGtm_PinMap.h:560

IfxGtm_ATOM2_2N_TOUT31_P33_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT31_P33_9_OUT

IfxGtm_ATOM2_2N_TOUT31_P33_9_OUT.

Definition: IfxGtm_PinMap.h:420

IfxGtm_TOM0_6_TOUT80_P14_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT80_P14_0_OUT

IfxGtm_TOM0_6_TOUT80_P14_0_OUT.

Definition: IfxGtm_PinMap.h:1817

IfxGtm_TIM5_0_P01_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P01_12_IN

IfxGtm_TIM5_0_P01_12_IN.

Definition: IfxGtm_PinMap.h:1467

IfxGtm_TOM2_7N_TOUT88_P14_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT88_P14_8_OUT

IfxGtm_TOM2_7N_TOUT88_P14_8_OUT.

Definition: IfxGtm_PinMap.h:2242

IfxGtm_ATOM2_3N_TOUT107_P10_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT107_P10_5_OUT

IfxGtm_ATOM2_3N_TOUT107_P10_5_OUT.

Definition: IfxGtm_PinMap.h:433

IfxGtm_TOM2_1N_TOUT79_P15_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT79_P15_8_OUT

IfxGtm_TOM2_1N_TOUT79_P15_8_OUT.

Definition: IfxGtm_PinMap.h:2145

IfxGtm_TIM2_4_P15_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P15_1_IN

IfxGtm_TIM2_4_P15_1_IN.

Definition: IfxGtm_PinMap.h:1221

IfxGtm_ATOM0_1N_TOUT55_P21_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT55_P21_4_OUT

IfxGtm_ATOM0_1N_TOUT55_P21_4_OUT.

Definition: IfxGtm_PinMap.h:167

IfxGtm_TOM1_4_TOUT30_P33_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT30_P33_8_OUT

IfxGtm_TOM1_4_TOUT30_P33_8_OUT.

Definition: IfxGtm_PinMap.h:1978

IfxGtm_ATOM2_0N_TOUT101_P11_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0N_TOUT101_P11_12_OUT

IfxGtm_ATOM2_0N_TOUT101_P11_12_OUT.

Definition: IfxGtm_PinMap.h:386

IfxGtm_TOM3_15_TOUT140_P32_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_15_TOUT140_P32_5_OUT

IfxGtm_TOM3_15_TOUT140_P32_5_OUT.

Definition: IfxGtm_PinMap.h:2302

IfxGtm_ATOM0_5N_TOUT8_P02_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5N_TOUT8_P02_8_OUT

IfxGtm_ATOM0_5N_TOUT8_P02_8_OUT.

Definition: IfxGtm_PinMap.h:230

IfxGtm_TOM3_1N_TOUT178_P31_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1N_TOUT178_P31_4_OUT

IfxGtm_TOM3_1N_TOUT178_P31_4_OUT.

Definition: IfxGtm_PinMap.h:2310

IfxGtm_ATOM5_1_TOUT265_P10_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT265_P10_9_OUT

IfxGtm_ATOM5_1_TOUT265_P10_9_OUT.

Definition: IfxGtm_PinMap.h:766

IfxGtm_TIM6_7_P00_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P00_15_IN

IfxGtm_TIM6_7_P00_15_IN.

Definition: IfxGtm_PinMap.h:1613

IfxGtm_TOM0_5N_TOUT56_P21_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT56_P21_5_OUT

IfxGtm_TOM0_5N_TOUT56_P21_5_OUT.

Definition: IfxGtm_PinMap.h:1770

IfxGtm_TOM3_10_TOUT216_P25_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_10_TOUT216_P25_10_OUT

IfxGtm_TOM3_10_TOUT216_P25_10_OUT.

Definition: IfxGtm_PinMap.h:2278

IfxGtm_ATOM1_3N_TOUT24_P33_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3N_TOUT24_P33_2_OUT

IfxGtm_ATOM1_3N_TOUT24_P33_2_OUT.

Definition: IfxGtm_PinMap.h:308

IfxGtm_ATOM6_1_TOUT251_P13_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT251_P13_10_OUT

IfxGtm_ATOM6_1_TOUT251_P13_10_OUT.

Definition: IfxGtm_PinMap.h:881

IfxGtm_ATOM4_1N_TOUT86_P14_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT86_P14_6_OUT

IfxGtm_ATOM4_1N_TOUT86_P14_6_OUT.

Definition: IfxGtm_PinMap.h:632

IfxGtm_ATOM2_3N_TOUT93_P13_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT93_P13_2_OUT

IfxGtm_ATOM2_3N_TOUT93_P13_2_OUT.

Definition: IfxGtm_PinMap.h:444

IfxGtm_TIM1_1_P10_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P10_1_IN

IfxGtm_TIM1_1_P10_1_IN.

Definition: IfxGtm_PinMap.h:1117

IfxGtm_ATOM2_6N_TOUT88_P14_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6N_TOUT88_P14_8_OUT

IfxGtm_ATOM2_6N_TOUT88_P14_8_OUT.

Definition: IfxGtm_PinMap.h:475

IfxGtm_TOM0_2_TOUT104_P10_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT104_P10_2_OUT

IfxGtm_TOM0_2_TOUT104_P10_2_OUT.

Definition: IfxGtm_PinMap.h:1699

IfxGtm_TOM0_2_TOUT88_P14_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT88_P14_8_OUT

IfxGtm_TOM0_2_TOUT88_P14_8_OUT.

Definition: IfxGtm_PinMap.h:1708

IfxGtm_TIM2_1_P01_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P01_4_IN

IfxGtm_TIM2_1_P01_4_IN.

Definition: IfxGtm_PinMap.h:1187

IfxGtm_ATOM0_2_TOUT12_P00_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT12_P00_3_OUT

IfxGtm_ATOM0_2_TOUT12_P00_3_OUT.

Definition: IfxGtm_PinMap.h:189

IfxGtm_TOM1_2_TOUT243_P15_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT243_P15_11_OUT

IfxGtm_TOM1_2_TOUT243_P15_11_OUT.

Definition: IfxGtm_PinMap.h:1936

IfxGtm_TIM6_2_P30_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P30_10_IN

IfxGtm_TIM6_2_P30_10_IN.

Definition: IfxGtm_PinMap.h:1577

IfxGtm_TOM3_1_TOUT242_P15_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT242_P15_10_OUT

IfxGtm_TOM3_1_TOUT242_P15_10_OUT.

Definition: IfxGtm_PinMap.h:2321

IfxGtm_ATOM2_7N_TOUT96_P11_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7N_TOUT96_P11_3_OUT

IfxGtm_ATOM2_7N_TOUT96_P11_3_OUT.

Definition: IfxGtm_PinMap.h:487

IfxGtm_ATOM3_3N_TOUT92_P13_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT92_P13_1_OUT

IfxGtm_ATOM3_3N_TOUT92_P13_1_OUT.

Definition: IfxGtm_PinMap.h:553

IfxGtm_TIM6_6_P13_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P13_11_IN

IfxGtm_TIM6_6_P13_11_IN.

Definition: IfxGtm_PinMap.h:1605

IfxGtm_TIM5_3_P30_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P30_11_IN

IfxGtm_TIM5_3_P30_11_IN.

Definition: IfxGtm_PinMap.h:1504

IfxGtm_ATOM4_7_TOUT75_P15_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7_TOUT75_P15_4_OUT

IfxGtm_ATOM4_7_TOUT75_P15_4_OUT.

Definition: IfxGtm_PinMap.h:728

IfxGtm_TIM0_1_P14_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P14_6_IN

IfxGtm_TIM0_1_P14_6_IN.

Definition: IfxGtm_PinMap.h:1042

IfxGtm_TIM1_4_P10_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P10_0_IN

IfxGtm_TIM1_4_P10_0_IN.

Definition: IfxGtm_PinMap.h:1145

IfxGtm_ATOM5_0_TOUT162_P01_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT162_P01_8_OUT

IfxGtm_ATOM5_0_TOUT162_P01_8_OUT.

Definition: IfxGtm_PinMap.h:741

IfxGtm_TOM1_0_TOUT32_P33_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT32_P33_10_OUT

IfxGtm_TOM1_0_TOUT32_P33_10_OUT.

Definition: IfxGtm_PinMap.h:1871

IfxGtm_TOM4_5_TOUT195_P30_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_5_TOUT195_P30_5_OUT

IfxGtm_TOM4_5_TOUT195_P30_5_OUT.

Definition: IfxGtm_PinMap.h:2474

IfxGtm_TIM4_7_P25_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P25_15_IN

IfxGtm_TIM4_7_P25_15_IN.

Definition: IfxGtm_PinMap.h:1463

IfxGtm_ATOM7_6_TOUT196_P30_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_6_TOUT196_P30_6_OUT

IfxGtm_ATOM7_6_TOUT196_P30_6_OUT.

Definition: IfxGtm_PinMap.h:968

IfxGtm_TOM2_10_TOUT260_P14_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_10_TOUT260_P14_13_OUT

IfxGtm_TOM2_10_TOUT260_P14_13_OUT.

Definition: IfxGtm_PinMap.h:2108

IfxGtm_ATOM0_3_TOUT49_P22_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT49_P22_2_OUT

IfxGtm_ATOM0_3_TOUT49_P22_2_OUT.

Definition: IfxGtm_PinMap.h:208

IfxGtm_ATOM4_0_TOUT68_P20_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT68_P20_12_OUT

IfxGtm_ATOM4_0_TOUT68_P20_12_OUT.

Definition: IfxGtm_PinMap.h:620

IfxGtm_TIM0_6_P23_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P23_1_IN

IfxGtm_TIM0_6_P23_1_IN.

Definition: IfxGtm_PinMap.h:1094

IfxGtm_TOM0_5_TOUT91_P13_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT91_P13_0_OUT

IfxGtm_TOM0_5_TOUT91_P13_0_OUT.

Definition: IfxGtm_PinMap.h:1788

IfxGtm_ATOM3_5_TOUT132_P22_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT132_P22_6_OUT

IfxGtm_ATOM3_5_TOUT132_P22_6_OUT.

Definition: IfxGtm_PinMap.h:584

IfxGtm_ATOM6_3_TOUT163_P01_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT163_P01_10_OUT

IfxGtm_ATOM6_3_TOUT163_P01_10_OUT.

Definition: IfxGtm_PinMap.h:893

IfxGtm_TOM3_2N_TOUT246_P15_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2N_TOUT246_P15_14_OUT

IfxGtm_TOM3_2N_TOUT246_P15_14_OUT.

Definition: IfxGtm_PinMap.h:2328

IfxGtm_TIM4_0_P25_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P25_8_IN

IfxGtm_TIM4_0_P25_8_IN.

Definition: IfxGtm_PinMap.h:1375

IfxGtm_ATOM5_2_TOUT132_P22_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT132_P22_6_OUT

IfxGtm_ATOM5_2_TOUT132_P22_6_OUT.

Definition: IfxGtm_PinMap.h:778

IfxGtm_TIM0_6_P02_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P02_6_IN

IfxGtm_TIM0_6_P02_6_IN.

Definition: IfxGtm_PinMap.h:1089

IfxGtm_ATOM3_3N_TOUT115_P01_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT115_P01_7_OUT

IfxGtm_ATOM3_3N_TOUT115_P01_7_OUT.

Definition: IfxGtm_PinMap.h:544

IfxGtm_TOM0_3_TOUT108_P10_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT108_P10_6_OUT

IfxGtm_TOM0_3_TOUT108_P10_6_OUT.

Definition: IfxGtm_PinMap.h:1721

IfxGtm_ATOM3_7_TOUT37_P32_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT37_P32_1_OUT

IfxGtm_ATOM3_7_TOUT37_P32_1_OUT.

Definition: IfxGtm_PinMap.h:612

IfxGtm_ATOM3_4_TOUT34_P33_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT34_P33_12_OUT

IfxGtm_ATOM3_4_TOUT34_P33_12_OUT.

Definition: IfxGtm_PinMap.h:572

IfxGtm_ATOM1_7_TOUT75_P15_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT75_P15_4_OUT

IfxGtm_ATOM1_7_TOUT75_P15_4_OUT.

Definition: IfxGtm_PinMap.h:384

IfxGtm_TIM6_5_P24_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P24_5_IN

IfxGtm_TIM6_5_P24_5_IN.

Definition: IfxGtm_PinMap.h:1600

IfxGtm_TOM1_5_TOUT74_P15_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT74_P15_3_OUT

IfxGtm_TOM1_5_TOUT74_P15_3_OUT.

Definition: IfxGtm_PinMap.h:2013

IfxGtm_TOM2_6N_TOUT108_P10_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT108_P10_6_OUT

IfxGtm_TOM2_6N_TOUT108_P10_6_OUT.

Definition: IfxGtm_PinMap.h:2221

IfxGtm_ATOM6_7_TOUT148_P34_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_7_TOUT148_P34_3_OUT

IfxGtm_ATOM6_7_TOUT148_P34_3_OUT.

Definition: IfxGtm_PinMap.h:920

IfxGtm_ATOM2_7N_TOUT89_P14_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7N_TOUT89_P14_9_OUT

IfxGtm_ATOM2_7N_TOUT89_P14_9_OUT.

Definition: IfxGtm_PinMap.h:486

IfxGtm_TOM1_0N_TOUT75_P15_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0N_TOUT75_P15_4_OUT

IfxGtm_TOM1_0N_TOUT75_P15_4_OUT.

Definition: IfxGtm_PinMap.h:1866

IfxGtm_ATOM8_6_TOUT151_P02_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_6_TOUT151_P02_12_OUT

IfxGtm_ATOM8_6_TOUT151_P02_12_OUT.

Definition: IfxGtm_PinMap.h:1011

IfxGtm_TOM3_1_TOUT207_P25_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT207_P25_1_OUT

IfxGtm_TOM3_1_TOUT207_P25_1_OUT.

Definition: IfxGtm_PinMap.h:2320

IfxGtm_TIM2_7_P13_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P13_2_IN

IfxGtm_TIM2_7_P13_2_IN.

Definition: IfxGtm_PinMap.h:1254

IfxGtm_ATOM3_0N_TOUT144_P33_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT144_P33_15_OUT

IfxGtm_ATOM3_0N_TOUT144_P33_15_OUT.

Definition: IfxGtm_PinMap.h:495

IfxGtm_ATOM3_5N_TOUT94_P13_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5N_TOUT94_P13_3_OUT

IfxGtm_ATOM3_5N_TOUT94_P13_3_OUT.

Definition: IfxGtm_PinMap.h:582

IfxGtm_TIM0_1_P22_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P22_0_IN

IfxGtm_TIM0_1_P22_0_IN.

Definition: IfxGtm_PinMap.h:1045

IfxGtm_ATOM4_1_TOUT47_P22_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT47_P22_0_OUT

IfxGtm_ATOM4_1_TOUT47_P22_0_OUT.

Definition: IfxGtm_PinMap.h:635

IfxGtm_ATOM3_2N_TOUT23_P33_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT23_P33_1_OUT

IfxGtm_ATOM3_2N_TOUT23_P33_1_OUT.

Definition: IfxGtm_PinMap.h:528

IfxGtm_TOM3_4N_TOUT177_P31_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_4N_TOUT177_P31_3_OUT

IfxGtm_TOM3_4N_TOUT177_P31_3_OUT.

Definition: IfxGtm_PinMap.h:2355

IfxGtm_ATOM3_3N_TOUT168_P00_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT168_P00_15_OUT

IfxGtm_ATOM3_3N_TOUT168_P00_15_OUT.

Definition: IfxGtm_PinMap.h:546

IfxGtm_TOM3_4N_TOUT209_P25_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_4N_TOUT209_P25_3_OUT

IfxGtm_TOM3_4N_TOUT209_P25_3_OUT.

Definition: IfxGtm_PinMap.h:2356

IfxGtm_ATOM3_4_TOUT167_P00_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT167_P00_13_OUT

IfxGtm_ATOM3_4_TOUT167_P00_13_OUT.

Definition: IfxGtm_PinMap.h:569

IfxGtm_TIM4_0_P10_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P10_0_IN

IfxGtm_TIM4_0_P10_0_IN.

Definition: IfxGtm_PinMap.h:1368

IfxGtm_TOM1_7N_TOUT32_P33_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT32_P33_10_OUT

IfxGtm_TOM1_7N_TOUT32_P33_10_OUT.

Definition: IfxGtm_PinMap.h:2055

IfxGtm_ATOM3_1_TOUT64_P20_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT64_P20_8_OUT

IfxGtm_ATOM3_1_TOUT64_P20_8_OUT.

Definition: IfxGtm_PinMap.h:522

IfxGtm_ATOM3_5_TOUT91_P13_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT91_P13_0_OUT

IfxGtm_ATOM3_5_TOUT91_P13_0_OUT.

Definition: IfxGtm_PinMap.h:589

IfxGtm_TIM6_0_P20_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P20_6_IN

IfxGtm_TIM6_0_P20_6_IN.

Definition: IfxGtm_PinMap.h:1555

IfxGtm_ATOM0_2N_TOUT56_P21_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT56_P21_5_OUT

IfxGtm_ATOM0_2N_TOUT56_P21_5_OUT.

Definition: IfxGtm_PinMap.h:184

IfxGtm_ATOM1_5_TOUT73_P15_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT73_P15_2_OUT

IfxGtm_ATOM1_5_TOUT73_P15_2_OUT.

Definition: IfxGtm_PinMap.h:354

IfxGtm_TIM4_3_P15_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P15_12_IN

IfxGtm_TIM4_3_P15_12_IN.

Definition: IfxGtm_PinMap.h:1411

IfxGtm_TOM0_3N_TOUT24_P33_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT24_P33_2_OUT

IfxGtm_TOM0_3N_TOUT24_P33_2_OUT.

Definition: IfxGtm_PinMap.h:1713

IfxGtm_TOM1_7N_TOUT84_P14_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT84_P14_4_OUT

IfxGtm_TOM1_7N_TOUT84_P14_4_OUT.

Definition: IfxGtm_PinMap.h:2062

IfxGtm_ATOM3_0N_TOUT37_P32_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT37_P32_1_OUT

IfxGtm_ATOM3_0N_TOUT37_P32_1_OUT.

Definition: IfxGtm_PinMap.h:499

IfxGtm_ATOM4_3_TOUT56_P21_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3_TOUT56_P21_5_OUT

IfxGtm_ATOM4_3_TOUT56_P21_5_OUT.

Definition: IfxGtm_PinMap.h:668

IfxGtm_ATOM3_6N_TOUT60_P20_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6N_TOUT60_P20_1_OUT

IfxGtm_ATOM3_6N_TOUT60_P20_1_OUT.

Definition: IfxGtm_PinMap.h:594

IfxGtm_TIM4_5_P11_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P11_8_IN

IfxGtm_TIM4_5_P11_8_IN.

Definition: IfxGtm_PinMap.h:1436

IfxGtm_ATOM5_3_TOUT209_P25_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT209_P25_3_OUT

IfxGtm_ATOM5_3_TOUT209_P25_3_OUT.

Definition: IfxGtm_PinMap.h:805

IfxGtm_ATOM4_2_TOUT42_P23_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT42_P23_1_OUT

IfxGtm_ATOM4_2_TOUT42_P23_1_OUT.

Definition: IfxGtm_PinMap.h:651

IfxGtm_ATOM5_1_TOUT175_P31_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT175_P31_1_OUT

IfxGtm_ATOM5_1_TOUT175_P31_1_OUT.

Definition: IfxGtm_PinMap.h:762

IfxGtm_ATOM3_0N_TOUT63_P20_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT63_P20_7_OUT

IfxGtm_ATOM3_0N_TOUT63_P20_7_OUT.

Definition: IfxGtm_PinMap.h:500

IfxGtm_ATOM5_4N_TOUT177_P31_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4N_TOUT177_P31_3_OUT

IfxGtm_ATOM5_4N_TOUT177_P31_3_OUT.

Definition: IfxGtm_PinMap.h:813

IfxGtm_TOM1_5_TOUT27_P33_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT27_P33_5_OUT

IfxGtm_TOM1_5_TOUT27_P33_5_OUT.

Definition: IfxGtm_PinMap.h:2006

IfxGtm_TOM4_14_TOUT264_P13_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_14_TOUT264_P13_15_OUT

IfxGtm_TOM4_14_TOUT264_P13_15_OUT.

Definition: IfxGtm_PinMap.h:2446

IfxGtm_TIM2_5_P31_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P31_5_IN

IfxGtm_TIM2_5_P31_5_IN.

Definition: IfxGtm_PinMap.h:1236

IfxGtm_TOM0_6N_TOUT31_P33_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT31_P33_9_OUT

IfxGtm_TOM0_6N_TOUT31_P33_9_OUT.

Definition: IfxGtm_PinMap.h:1794

IfxGtm_TOM2_6N_TOUT95_P11_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT95_P11_2_OUT

IfxGtm_TOM2_6N_TOUT95_P11_2_OUT.

Definition: IfxGtm_PinMap.h:2228

IfxGtm_TIM5_1_P13_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P13_10_IN

IfxGtm_TIM5_1_P13_10_IN.

Definition: IfxGtm_PinMap.h:1480

IfxGtm_ATOM1_2N_TOUT110_P10_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT110_P10_8_OUT

IfxGtm_ATOM1_2N_TOUT110_P10_8_OUT.

Definition: IfxGtm_PinMap.h:289

IfxGtm_TOM4_8_TOUT202_P30_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_8_TOUT202_P30_12_OUT

IfxGtm_TOM4_8_TOUT202_P30_12_OUT.

Definition: IfxGtm_PinMap.h:2489

IfxGtm_TOM2_4N_TOUT126_P11_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT126_P11_14_OUT

IfxGtm_TOM2_4N_TOUT126_P11_14_OUT.

Definition: IfxGtm_PinMap.h:2191

IfxGtm_TIM3_1_P02_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P02_7_IN

IfxGtm_TIM3_1_P02_7_IN.

Definition: IfxGtm_PinMap.h:1278

IfxGtm_TOM3_11_TOUT217_P25_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_11_TOUT217_P25_11_OUT

IfxGtm_TOM3_11_TOUT217_P25_11_OUT.

Definition: IfxGtm_PinMap.h:2284

IfxGtm_ATOM3_2N_TOUT78_P15_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT78_P15_7_OUT

IfxGtm_ATOM3_2N_TOUT78_P15_7_OUT.

Definition: IfxGtm_PinMap.h:532

IfxGtm_TOM2_5_TOUT91_P13_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5_TOUT91_P13_0_OUT

IfxGtm_TOM2_5_TOUT91_P13_0_OUT.

Definition: IfxGtm_PinMap.h:2219

IfxGtm_ATOM2_5N_TOUT26_P33_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5N_TOUT26_P33_4_OUT

IfxGtm_ATOM2_5N_TOUT26_P33_4_OUT.

Definition: IfxGtm_PinMap.h:462

IfxGtm_TOM3_3_TOUT209_P25_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3_TOUT209_P25_3_OUT

IfxGtm_TOM3_3_TOUT209_P25_3_OUT.

Definition: IfxGtm_PinMap.h:2350

IfxGtm_ATOM1_5_TOUT5_P02_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT5_P02_5_OUT

IfxGtm_ATOM1_5_TOUT5_P02_5_OUT.

Definition: IfxGtm_PinMap.h:352

IfxGtm_TIM2_7_P20_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P20_11_IN

IfxGtm_TIM2_7_P20_11_IN.

Definition: IfxGtm_PinMap.h:1257

IfxGtm_ATOM5_4_TOUT158_P01_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT158_P01_12_OUT

IfxGtm_ATOM5_4_TOUT158_P01_12_OUT.

Definition: IfxGtm_PinMap.h:819

IfxGtm_ATOM1_5_TOUT23_P33_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT23_P33_1_OUT

IfxGtm_ATOM1_5_TOUT23_P33_1_OUT.

Definition: IfxGtm_PinMap.h:349

IfxGtm_TOM2_0N_TOUT61_P20_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT61_P20_3_OUT

IfxGtm_TOM2_0N_TOUT61_P20_3_OUT.

Definition: IfxGtm_PinMap.h:2093

IfxGtm_ATOM6_7_TOUT264_P13_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_7_TOUT264_P13_15_OUT

IfxGtm_ATOM6_7_TOUT264_P13_15_OUT.

Definition: IfxGtm_PinMap.h:925

IfxGtm_ATOM0_3N_TOUT24_P33_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT24_P33_2_OUT

IfxGtm_ATOM0_3N_TOUT24_P33_2_OUT.

Definition: IfxGtm_PinMap.h:198

IfxGtm_TIM3_5_P11_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P11_10_IN

IfxGtm_TIM3_5_P11_10_IN.

Definition: IfxGtm_PinMap.h:1327

IfxGtm_ATOM1_6N_TOUT103_P10_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT103_P10_1_OUT

IfxGtm_ATOM1_6N_TOUT103_P10_1_OUT.

Definition: IfxGtm_PinMap.h:355

IfxGtm_TIM4_4_P01_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P01_0_IN

IfxGtm_TIM4_4_P01_0_IN.

Definition: IfxGtm_PinMap.h:1417

IfxGtm_TOM3_8_TOUT182_P31_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_8_TOUT182_P31_8_OUT

IfxGtm_TOM3_8_TOUT182_P31_8_OUT.

Definition: IfxGtm_PinMap.h:2405

IfxGtm_TIM3_5_P13_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P13_0_IN

IfxGtm_TIM3_5_P13_0_IN.

Definition: IfxGtm_PinMap.h:1328

IfxGtm_TOM2_11_TOUT134_P22_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_11_TOUT134_P22_8_OUT

IfxGtm_TOM2_11_TOUT134_P22_8_OUT.

Definition: IfxGtm_PinMap.h:2113

IfxGtm_ATOM1_7_TOUT17_P00_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT17_P00_8_OUT

IfxGtm_ATOM1_7_TOUT17_P00_8_OUT.

Definition: IfxGtm_PinMap.h:380

IfxGtm_ATOM5_4N_TOUT122_P11_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4N_TOUT122_P11_5_OUT

IfxGtm_ATOM5_4N_TOUT122_P11_5_OUT.

Definition: IfxGtm_PinMap.h:809

IfxGtm_ATOM4_6N_TOUT78_P15_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6N_TOUT78_P15_7_OUT

IfxGtm_ATOM4_6N_TOUT78_P15_7_OUT.

Definition: IfxGtm_PinMap.h:706

IfxGtm_TOM0_3N_TOUT59_P20_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT59_P20_0_OUT

IfxGtm_TOM0_3N_TOUT59_P20_0_OUT.

Definition: IfxGtm_PinMap.h:1715

IfxGtm_TOM3_10_TOUT220_P25_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_10_TOUT220_P25_14_OUT

IfxGtm_TOM3_10_TOUT220_P25_14_OUT.

Definition: IfxGtm_PinMap.h:2279

IfxGtm_ATOM4_7N_TOUT20_P00_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7N_TOUT20_P00_11_OUT

IfxGtm_ATOM4_7N_TOUT20_P00_11_OUT.

Definition: IfxGtm_PinMap.h:720

IfxGtm_TOM0_2N_TOUT23_P33_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT23_P33_1_OUT

IfxGtm_TOM0_2N_TOUT23_P33_1_OUT.

Definition: IfxGtm_PinMap.h:1693

IfxGtm_TOM3_13_TOUT138_P23_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_13_TOUT138_P23_6_OUT

IfxGtm_TOM3_13_TOUT138_P23_6_OUT.

Definition: IfxGtm_PinMap.h:2291

IfxGtm_ATOM3_0N_TOUT101_P11_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT101_P11_12_OUT

IfxGtm_ATOM3_0N_TOUT101_P11_12_OUT.

Definition: IfxGtm_PinMap.h:494

IfxGtm_ATOM3_2_TOUT63_P20_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT63_P20_7_OUT

IfxGtm_ATOM3_2_TOUT63_P20_7_OUT.

Definition: IfxGtm_PinMap.h:540

IfxGtm_TOM0_6_TOUT24_P33_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT24_P33_2_OUT

IfxGtm_TOM0_6_TOUT24_P33_2_OUT.

Definition: IfxGtm_PinMap.h:1810

IfxGtm_TOM2_7_TOUT264_P13_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7_TOUT264_P13_15_OUT

IfxGtm_TOM2_7_TOUT264_P13_15_OUT.

Definition: IfxGtm_PinMap.h:2249

IfxGtm_TIM5_5_P30_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P30_13_IN

IfxGtm_TIM5_5_P30_13_IN.

Definition: IfxGtm_PinMap.h:1525

IfxGtm_ATOM3_1N_TOUT34_P33_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT34_P33_12_OUT

IfxGtm_ATOM3_1N_TOUT34_P33_12_OUT.

Definition: IfxGtm_PinMap.h:511

IfxGtm_TOM1_6_TOUT48_P22_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT48_P22_1_OUT

IfxGtm_TOM1_6_TOUT48_P22_1_OUT.

Definition: IfxGtm_PinMap.h:2040

IfxGtm_TIM0_7_P33_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P33_3_IN

IfxGtm_TIM0_7_P33_3_IN.

Definition: IfxGtm_PinMap.h:1104

IfxGtm_ATOM4_3_TOUT49_P22_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3_TOUT49_P22_2_OUT

IfxGtm_ATOM4_3_TOUT49_P22_2_OUT.

Definition: IfxGtm_PinMap.h:667

IfxGtm_ATOM2_4_TOUT51_P21_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT51_P21_0_OUT

IfxGtm_ATOM2_4_TOUT51_P21_0_OUT.

Definition: IfxGtm_PinMap.h:458

IfxGtm_TOM3_0_TOUT162_P01_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_0_TOUT162_P01_8_OUT

IfxGtm_TOM3_0_TOUT162_P01_8_OUT.

Definition: IfxGtm_PinMap.h:2272

IfxGtm_Tom_ToutMap

TOM TOUT pin mapping structure.

Definition: IfxGtm_PinMap.h:124

IfxGtm_ATOM7_5_TOUT227_P24_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_5_TOUT227_P24_5_OUT

IfxGtm_ATOM7_5_TOUT227_P24_5_OUT.

Definition: IfxGtm_PinMap.h:962

IfxGtm_ATOM2_2N_TOUT138_P23_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT138_P23_6_OUT

IfxGtm_ATOM2_2N_TOUT138_P23_6_OUT.

Definition: IfxGtm_PinMap.h:417

IfxGtm_ATOM3_2_TOUT88_P14_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT88_P14_8_OUT

IfxGtm_ATOM3_2_TOUT88_P14_8_OUT.

Definition: IfxGtm_PinMap.h:541

IfxGtm_TOM0_2N_TOUT11_P00_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT11_P00_2_OUT

IfxGtm_TOM0_2N_TOUT11_P00_2_OUT.

Definition: IfxGtm_PinMap.h:1690

IfxGtm_TIM2_5_P21_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P21_1_IN

IfxGtm_TIM2_5_P21_1_IN.

Definition: IfxGtm_PinMap.h:1235

IfxGtm_TOM1_7_TOUT84_P14_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT84_P14_4_OUT

IfxGtm_TOM1_7_TOUT84_P14_4_OUT.

Definition: IfxGtm_PinMap.h:2078

IfxGtm_TIM3_4_P20_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P20_3_IN

IfxGtm_TIM3_4_P20_3_IN.

Definition: IfxGtm_PinMap.h:1320

IfxGtm_TOM2_15_TOUT37_P32_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_15_TOUT37_P32_1_OUT

IfxGtm_TOM2_15_TOUT37_P32_1_OUT.

Definition: IfxGtm_PinMap.h:2134

IfxGtm_TOM0_0_TOUT85_P14_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT85_P14_5_OUT

IfxGtm_TOM0_0_TOUT85_P14_5_OUT.

Definition: IfxGtm_PinMap.h:1640

IfxGtm_ATOM0_1_TOUT31_P33_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT31_P33_9_OUT

IfxGtm_ATOM0_1_TOUT31_P33_9_OUT.

Definition: IfxGtm_PinMap.h:174

IfxGtm_TOM2_6N_TOUT135_P22_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT135_P22_9_OUT

IfxGtm_TOM2_6N_TOUT135_P22_9_OUT.

Definition: IfxGtm_PinMap.h:2224

IfxGtm_ATOM1_6N_TOUT116_P02_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT116_P02_9_OUT

IfxGtm_ATOM1_6N_TOUT116_P02_9_OUT.

Definition: IfxGtm_PinMap.h:357

IfxGtm_TOM0_7N_TOUT71_P15_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT71_P15_0_OUT

IfxGtm_TOM0_7N_TOUT71_P15_0_OUT.

Definition: IfxGtm_PinMap.h:1832

IfxGtm_TOM4_12_TOUT167_P00_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_12_TOUT167_P00_13_OUT

IfxGtm_TOM4_12_TOUT167_P00_13_OUT.

Definition: IfxGtm_PinMap.h:2431

IfxGtm_TOM2_1_TOUT95_P11_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1_TOUT95_P11_2_OUT

IfxGtm_TOM2_1_TOUT95_P11_2_OUT.

Definition: IfxGtm_PinMap.h:2155

IfxGtm_TIM3_6_P00_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P00_7_IN

IfxGtm_TIM3_6_P00_7_IN.

Definition: IfxGtm_PinMap.h:1338

IfxGtm_ATOM6_0_TOUT162_P01_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT162_P01_8_OUT

IfxGtm_ATOM6_0_TOUT162_P01_8_OUT.

Definition: IfxGtm_PinMap.h:870

IfxGtm_TOM2_7_TOUT64_P20_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7_TOUT64_P20_8_OUT

IfxGtm_TOM2_7_TOUT64_P20_8_OUT.

Definition: IfxGtm_PinMap.h:2250

IfxGtm_TOM1_13_TOUT269_P10_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT269_P10_11_OUT

IfxGtm_TOM1_13_TOUT269_P10_11_OUT.

Definition: IfxGtm_PinMap.h:1892

IfxGtm_TIM4_7_P11_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P11_15_IN

IfxGtm_TIM4_7_P11_15_IN.

Definition: IfxGtm_PinMap.h:1459

IfxGtm_TIM4_4_P02_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P02_11_IN

IfxGtm_TIM4_4_P02_11_IN.

Definition: IfxGtm_PinMap.h:1419

IfxGtm_ATOM3_2N_TOUT99_P11_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT99_P11_10_OUT

IfxGtm_ATOM3_2N_TOUT99_P11_10_OUT.

Definition: IfxGtm_PinMap.h:535

IfxGtm_ATOM0_2_TOUT42_P23_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT42_P23_1_OUT

IfxGtm_ATOM0_2_TOUT42_P23_1_OUT.

Definition: IfxGtm_PinMap.h:192

IfxGtm_TOM1_1_TOUT27_P33_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT27_P33_5_OUT

IfxGtm_TOM1_1_TOUT27_P33_5_OUT.

Definition: IfxGtm_PinMap.h:1920

IfxGtm_TIM5_2_P31_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P31_10_IN

IfxGtm_TIM5_2_P31_10_IN.

Definition: IfxGtm_PinMap.h:1495

IfxGtm_TOM0_2N_TOUT5_P02_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT5_P02_5_OUT

IfxGtm_TOM0_2N_TOUT5_P02_5_OUT.

Definition: IfxGtm_PinMap.h:1696

IfxGtm_ATOM7_0_TOUT190_P30_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_0_TOUT190_P30_0_OUT

IfxGtm_ATOM7_0_TOUT190_P30_0_OUT.

Definition: IfxGtm_PinMap.h:928

IfxGtm_TOM0_6N_TOUT149_P34_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT149_P34_4_OUT

IfxGtm_TOM0_6N_TOUT149_P34_4_OUT.

Definition: IfxGtm_PinMap.h:1790

IfxGtm_TOM1_2_TOUT117_P02_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT117_P02_10_OUT

IfxGtm_TOM1_2_TOUT117_P02_10_OUT.

Definition: IfxGtm_PinMap.h:1933

IfxGtm_TIM2_2_P15_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P15_6_IN

IfxGtm_TIM2_2_P15_6_IN.

Definition: IfxGtm_PinMap.h:1201

IfxGtm_TIM1_2_P10_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P10_2_IN

IfxGtm_TIM1_2_P10_2_IN.

Definition: IfxGtm_PinMap.h:1126

IfxGtm_ATOM5_3_TOUT267_P10_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT267_P10_14_OUT

IfxGtm_ATOM5_3_TOUT267_P10_14_OUT.

Definition: IfxGtm_PinMap.h:808

IfxGtm_TIM6_2_P25_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P25_2_IN

IfxGtm_TIM6_2_P25_2_IN.

Definition: IfxGtm_PinMap.h:1576

IfxGtm_ATOM1_4_TOUT4_P02_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT4_P02_4_OUT

IfxGtm_ATOM1_4_TOUT4_P02_4_OUT.

Definition: IfxGtm_PinMap.h:335

IfxGtm_TOM1_13_TOUT65_P20_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT65_P20_9_OUT

IfxGtm_TOM1_13_TOUT65_P20_9_OUT.

Definition: IfxGtm_PinMap.h:1895

IfxGtm_TOM2_1_TOUT127_P11_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1_TOUT127_P11_15_OUT

IfxGtm_TOM2_1_TOUT127_P11_15_OUT.

Definition: IfxGtm_PinMap.h:2150

IfxGtm_TIM4_6_P10_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P10_3_IN

IfxGtm_TIM4_6_P10_3_IN.

Definition: IfxGtm_PinMap.h:1448

IfxGtm_TIM2_6_P15_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P15_3_IN

IfxGtm_TIM2_6_P15_3_IN.

Definition: IfxGtm_PinMap.h:1244

IfxGtm_TOM4_3_TOUT225_P24_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_3_TOUT225_P24_3_OUT

IfxGtm_TOM4_3_TOUT225_P24_3_OUT.

Definition: IfxGtm_PinMap.h:2464

IfxGtm_TIM6_0_P24_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P24_0_IN

IfxGtm_TIM6_0_P24_0_IN.

Definition: IfxGtm_PinMap.h:1557

IfxGtm_TIM3_4_P34_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P34_1_IN

IfxGtm_TIM3_4_P34_1_IN.

Definition: IfxGtm_PinMap.h:1324

IfxGtm_TOM4_5_TOUT255_P13_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_5_TOUT255_P13_6_OUT

IfxGtm_TOM4_5_TOUT255_P13_6_OUT.

Definition: IfxGtm_PinMap.h:2476

IfxGtm_ATOM2_2N_TOUT23_P33_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT23_P33_1_OUT

IfxGtm_ATOM2_2N_TOUT23_P33_1_OUT.

Definition: IfxGtm_PinMap.h:419

IfxGtm_ATOM3_4_TOUT98_P11_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT98_P11_9_OUT

IfxGtm_ATOM3_4_TOUT98_P11_9_OUT.

Definition: IfxGtm_PinMap.h:575

IfxGtm_ATOM7_1_TOUT163_P01_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT163_P01_10_OUT

IfxGtm_ATOM7_1_TOUT163_P01_10_OUT.

Definition: IfxGtm_PinMap.h:933

IfxGtm_TOM2_4N_TOUT137_P22_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT137_P22_11_OUT

IfxGtm_TOM2_4N_TOUT137_P22_11_OUT.

Definition: IfxGtm_PinMap.h:2192

IfxGtm_TOM1_15_TOUT67_P20_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT67_P20_11_OUT

IfxGtm_TOM1_15_TOUT67_P20_11_OUT.

Definition: IfxGtm_PinMap.h:1904

IfxGtm_TOM4_13_TOUT231_P24_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_13_TOUT231_P24_9_OUT

IfxGtm_TOM4_13_TOUT231_P24_9_OUT.

Definition: IfxGtm_PinMap.h:2438

IfxGtm_ChXSel_d

Definition: IfxGtm_PinMap.h:64

IfxGtm_TOM2_5_TOUT124_P11_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5_TOUT124_P11_8_OUT

IfxGtm_TOM2_5_TOUT124_P11_8_OUT.

Definition: IfxGtm_PinMap.h:2215

IfxGtm_ATOM1_6N_TOUT27_P33_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT27_P33_5_OUT

IfxGtm_ATOM1_6N_TOUT27_P33_5_OUT.

Definition: IfxGtm_PinMap.h:362

IfxGtm_ATOM8_5_TOUT243_P15_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_5_TOUT243_P15_11_OUT

IfxGtm_ATOM8_5_TOUT243_P15_11_OUT.

Definition: IfxGtm_PinMap.h:1008

IfxGtm_TOM2_10_TOUT104_P10_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_10_TOUT104_P10_2_OUT

IfxGtm_TOM2_10_TOUT104_P10_2_OUT.

Definition: IfxGtm_PinMap.h:2105

IfxGtm_TOM0_5N_TOUT3_P02_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT3_P02_3_OUT

IfxGtm_TOM0_5N_TOUT3_P02_3_OUT.

Definition: IfxGtm_PinMap.h:1768

IfxGtm_TOM0_3_TOUT71_P15_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT71_P15_0_OUT

IfxGtm_TOM0_3_TOUT71_P15_0_OUT.

Definition: IfxGtm_PinMap.h:1728

IfxGtm_TOM1_7N_TOUT79_P15_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT79_P15_8_OUT

IfxGtm_TOM1_7N_TOUT79_P15_8_OUT.

Definition: IfxGtm_PinMap.h:2060

IfxGtm_TOM0_3_TOUT89_P14_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT89_P14_9_OUT

IfxGtm_TOM0_3_TOUT89_P14_9_OUT.

Definition: IfxGtm_PinMap.h:1730

IfxGtm_TIM2_1_P33_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P33_13_IN

IfxGtm_TIM2_1_P33_13_IN.

Definition: IfxGtm_PinMap.h:1193

IfxGtm_ChXSel_i

Definition: IfxGtm_PinMap.h:71

IfxGtm_TOM1_6N_TOUT69_P20_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT69_P20_13_OUT

IfxGtm_TOM1_6N_TOUT69_P20_13_OUT.

Definition: IfxGtm_PinMap.h:2029

IfxGtm_TIM3_1_P33_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P33_1_IN

IfxGtm_TIM3_1_P33_1_IN.

Definition: IfxGtm_PinMap.h:1287

IfxGtm_TOM1_1N_TOUT35_P33_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT35_P33_13_OUT

IfxGtm_TOM1_1N_TOUT35_P33_13_OUT.

Definition: IfxGtm_PinMap.h:1910

IfxGtm_ATOM6_4_TOUT186_P31_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT186_P31_12_OUT

IfxGtm_ATOM6_4_TOUT186_P31_12_OUT.

Definition: IfxGtm_PinMap.h:902

IfxGtm_TOM3_3_TOUT269_P10_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3_TOUT269_P10_11_OUT

IfxGtm_TOM3_3_TOUT269_P10_11_OUT.

Definition: IfxGtm_PinMap.h:2352

IfxGtm_ChXSel_c

Definition: IfxGtm_PinMap.h:63

IfxGtm_ATOM3_0_TOUT65_P20_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT65_P20_9_OUT

IfxGtm_ATOM3_0_TOUT65_P20_9_OUT.

Definition: IfxGtm_PinMap.h:505

IfxGtm_TOM0_6_TOUT106_P10_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT106_P10_4_OUT

IfxGtm_TOM0_6_TOUT106_P10_4_OUT.

Definition: IfxGtm_PinMap.h:1807

IfxGtm_TOM0_7N_TOUT32_P33_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT32_P33_10_OUT

IfxGtm_TOM0_7N_TOUT32_P33_10_OUT.

Definition: IfxGtm_PinMap.h:1827

IfxGtm_TOM2_1_TOUT47_P22_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1_TOUT47_P22_0_OUT

IfxGtm_TOM2_1_TOUT47_P22_0_OUT.

Definition: IfxGtm_PinMap.h:2152

IfxGtm_TOM2_12_TOUT102_P10_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_12_TOUT102_P10_0_OUT

IfxGtm_TOM2_12_TOUT102_P10_0_OUT.

Definition: IfxGtm_PinMap.h:2117

IfxGtm_ATOM1_7_TOUT25_P33_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT25_P33_3_OUT

IfxGtm_ATOM1_7_TOUT25_P33_3_OUT.

Definition: IfxGtm_PinMap.h:381

IfxGtm_TIM4_0_P00_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P00_9_IN

IfxGtm_TIM4_0_P00_9_IN.

Definition: IfxGtm_PinMap.h:1365

IfxGtm_TIM4_2_P15_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P15_11_IN

IfxGtm_TIM4_2_P15_11_IN.

Definition: IfxGtm_PinMap.h:1398

IfxGtm_TIM6_4_P31_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P31_12_IN

IfxGtm_TIM6_4_P31_12_IN.

Definition: IfxGtm_PinMap.h:1595

IfxGtm_TOM2_3_TOUT122_P11_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT122_P11_5_OUT

IfxGtm_TOM2_3_TOUT122_P11_5_OUT.

Definition: IfxGtm_PinMap.h:2179

IfxGtm_ATOM0_5N_TOUT0_P02_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5N_TOUT0_P02_0_OUT

IfxGtm_ATOM0_5N_TOUT0_P02_0_OUT.

Definition: IfxGtm_PinMap.h:226

IfxGtm_TOM3_5_TOUT265_P10_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_5_TOUT265_P10_9_OUT

IfxGtm_TOM3_5_TOUT265_P10_9_OUT.

Definition: IfxGtm_PinMap.h:2378

IfxGtm_TOM0_10_TOUT46_P23_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT46_P23_5_OUT

IfxGtm_TOM0_10_TOUT46_P23_5_OUT.

Definition: IfxGtm_PinMap.h:1645

IfxGtm_TIM0_1_P02_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P02_1_IN

IfxGtm_TIM0_1_P02_1_IN.

Definition: IfxGtm_PinMap.h:1039

IfxGtm_ATOM5_7_TOUT137_P22_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7_TOUT137_P22_11_OUT

IfxGtm_ATOM5_7_TOUT137_P22_11_OUT.

Definition: IfxGtm_PinMap.h:861

IfxGtm_TIM3_0_P02_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P02_6_IN

IfxGtm_TIM3_0_P02_6_IN.

Definition: IfxGtm_PinMap.h:1263

IfxGtm_TOM2_2_TOUT125_P11_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT125_P11_13_OUT

IfxGtm_TOM2_2_TOUT125_P11_13_OUT.

Definition: IfxGtm_PinMap.h:2164

IfxGtm_Tom_ToutMap::channel

IfxGtm_Tom_Ch channel

TOM channel index.

Definition: IfxGtm_PinMap.h:127

IfxGtm_TIM1_1_P33_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P33_9_IN

IfxGtm_TIM1_1_P33_9_IN.

Definition: IfxGtm_PinMap.h:1123

IfxGtm_ToutSel_d

Definition: IfxGtm_PinMap.h:88

IfxGtm_TIM2_0_P13_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P13_3_IN

IfxGtm_TIM2_0_P13_3_IN.

Definition: IfxGtm_PinMap.h:1179

IfxGtm_TIM2_0_P11_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P11_10_IN

IfxGtm_TIM2_0_P11_10_IN.

Definition: IfxGtm_PinMap.h:1178

IfxGtm_TIM2_2_P20_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P20_14_IN

IfxGtm_TIM2_2_P20_14_IN.

Definition: IfxGtm_PinMap.h:1202

IfxGtm_TIM1_2_P21_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P21_4_IN

IfxGtm_TIM1_2_P21_4_IN.

Definition: IfxGtm_PinMap.h:1129

IfxGtm_TIM3_7_P32_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P32_7_IN

IfxGtm_TIM3_7_P32_7_IN.

Definition: IfxGtm_PinMap.h:1362

IfxGtm_TOM1_2_TOUT12_P00_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT12_P00_3_OUT

IfxGtm_TOM1_2_TOUT12_P00_3_OUT.

Definition: IfxGtm_PinMap.h:1934

IfxGtm_ATOM2_5_TOUT91_P13_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT91_P13_0_OUT

IfxGtm_ATOM2_5_TOUT91_P13_0_OUT.

Definition: IfxGtm_PinMap.h:471

IfxGtm_ATOM2_6_TOUT100_P11_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT100_P11_11_OUT

IfxGtm_ATOM2_6_TOUT100_P11_11_OUT.

Definition: IfxGtm_PinMap.h:477

IfxGtm_TOM1_6_TOUT13_P00_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT13_P00_4_OUT

IfxGtm_TOM1_6_TOUT13_P00_4_OUT.

Definition: IfxGtm_PinMap.h:2034

IfxGtm_TOM1_12_TOUT34_P33_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT34_P33_12_OUT

IfxGtm_TOM1_12_TOUT34_P33_12_OUT.

Definition: IfxGtm_PinMap.h:1888

IfxGtm_TIM5_4_P01_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P01_8_IN

IfxGtm_TIM5_4_P01_8_IN.

Definition: IfxGtm_PinMap.h:1509

IfxGtm_TIM6_4_P24_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_4_P24_4_IN

IfxGtm_TIM6_4_P24_4_IN.

Definition: IfxGtm_PinMap.h:1592

IfxGtm_ATOM7_3_TOUT166_P00_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_3_TOUT166_P00_14_OUT

IfxGtm_ATOM7_3_TOUT166_P00_14_OUT.

Definition: IfxGtm_PinMap.h:947

IfxGtm_ATOM3_6N_TOUT19_P00_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6N_TOUT19_P00_10_OUT

IfxGtm_ATOM3_6N_TOUT19_P00_10_OUT.

Definition: IfxGtm_PinMap.h:592

IfxGtm_TOM3_13_TOUT269_P10_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_13_TOUT269_P10_11_OUT

IfxGtm_TOM3_13_TOUT269_P10_11_OUT.

Definition: IfxGtm_PinMap.h:2295

IfxGtm_TOM0_3_TOUT105_P10_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT105_P10_3_OUT

IfxGtm_TOM0_3_TOUT105_P10_3_OUT.

Definition: IfxGtm_PinMap.h:1720

IfxGtm_TOM3_11_TOUT185_P31_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_11_TOUT185_P31_11_OUT

IfxGtm_TOM3_11_TOUT185_P31_11_OUT.

Definition: IfxGtm_PinMap.h:2282

IfxGtm_TOM2_0N_TOUT101_P11_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT101_P11_12_OUT

IfxGtm_TOM2_0N_TOUT101_P11_12_OUT.

Definition: IfxGtm_PinMap.h:2088

IfxGtm_CLK2_P11_12_OUT

IFX_EXTERN IfxGtm_Clk_Out IfxGtm_CLK2_P11_12_OUT

CGM generated clock.

Definition: IfxGtm_PinMap.h:1026

IfxGtm_ATOM0_4_TOUT29_P33_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT29_P33_7_OUT

IfxGtm_ATOM0_4_TOUT29_P33_7_OUT.

Definition: IfxGtm_PinMap.h:219

IfxGtm_TOM2_1N_TOUT57_P21_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT57_P21_6_OUT

IfxGtm_TOM2_1N_TOUT57_P21_6_OUT.

Definition: IfxGtm_PinMap.h:2143

IfxGtm_ATOM1_1_TOUT116_P02_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT116_P02_9_OUT

IfxGtm_ATOM1_1_TOUT116_P02_9_OUT.

Definition: IfxGtm_PinMap.h:281

IfxGtm_TIM5_0_P02_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P02_12_IN

IfxGtm_TIM5_0_P02_12_IN.

Definition: IfxGtm_PinMap.h:1469

IfxGtm_ATOM4_3_TOUT105_P10_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3_TOUT105_P10_3_OUT

IfxGtm_ATOM4_3_TOUT105_P10_3_OUT.

Definition: IfxGtm_PinMap.h:664

IfxGtm_ATOM8_7_TOUT154_P02_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_7_TOUT154_P02_14_OUT

IfxGtm_ATOM8_7_TOUT154_P02_14_OUT.

Definition: IfxGtm_PinMap.h:1018

IfxGtm_TOM1_9_TOUT129_P12_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT129_P12_1_OUT

IfxGtm_TOM1_9_TOUT129_P12_1_OUT.

Definition: IfxGtm_PinMap.h:2084

IfxGtm_TOM1_2N_TOUT246_P15_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT246_P15_14_OUT

IfxGtm_TOM1_2N_TOUT246_P15_14_OUT.

Definition: IfxGtm_PinMap.h:1928

IfxGtm_TOM2_14_TOUT74_P15_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_14_TOUT74_P15_3_OUT

IfxGtm_TOM2_14_TOUT74_P15_3_OUT.

Definition: IfxGtm_PinMap.h:2132

IfxGtm_ATOM6_2_TOUT216_P25_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT216_P25_10_OUT

IfxGtm_ATOM6_2_TOUT216_P25_10_OUT.

Definition: IfxGtm_PinMap.h:888

IfxGtm_ATOM7_0_TOUT258_P14_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_0_TOUT258_P14_11_OUT

IfxGtm_ATOM7_0_TOUT258_P14_11_OUT.

Definition: IfxGtm_PinMap.h:931

IfxGtm_TOM1_7_TOUT17_P00_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT17_P00_8_OUT

IfxGtm_TOM1_7_TOUT17_P00_8_OUT.

Definition: IfxGtm_PinMap.h:2066

IfxGtm_ATOM6_0_TOUT155_P01_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT155_P01_0_OUT

IfxGtm_ATOM6_0_TOUT155_P01_0_OUT.

Definition: IfxGtm_PinMap.h:869

IfxGtm_TIM3_1_P00_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P00_6_IN

IfxGtm_TIM3_1_P00_6_IN.

Definition: IfxGtm_PinMap.h:1277

IfxGtm_TIM1_7_P33_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_P33_3_IN

IfxGtm_TIM1_7_P33_3_IN.

Definition: IfxGtm_PinMap.h:1173

IfxGtm_ATOM2_1N_TOUT9_P00_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT9_P00_0_OUT

IfxGtm_ATOM2_1N_TOUT9_P00_0_OUT.

Definition: IfxGtm_PinMap.h:407

IfxGtm_TOM2_14_TOUT137_P22_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_14_TOUT137_P22_11_OUT

IfxGtm_TOM2_14_TOUT137_P22_11_OUT.

Definition: IfxGtm_PinMap.h:2128

IfxGtm_TOM0_2_TOUT79_P15_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT79_P15_8_OUT

IfxGtm_TOM0_2_TOUT79_P15_8_OUT.

Definition: IfxGtm_PinMap.h:1707

IfxGtm_ATOM1_4N_TOUT71_P15_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT71_P15_0_OUT

IfxGtm_ATOM1_4N_TOUT71_P15_0_OUT.

Definition: IfxGtm_PinMap.h:327

IfxGtm_TOM3_9_TOUT187_P31_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_9_TOUT187_P31_13_OUT

IfxGtm_TOM3_9_TOUT187_P31_13_OUT.

Definition: IfxGtm_PinMap.h:2412

IfxGtm_ATOM0_4_TOUT81_P14_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT81_P14_1_OUT

IfxGtm_ATOM0_4_TOUT81_P14_1_OUT.

Definition: IfxGtm_PinMap.h:225

IfxGtm_ATOM5_2N_TOUT141_P32_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT141_P32_6_OUT

IfxGtm_ATOM5_2N_TOUT141_P32_6_OUT.

Definition: IfxGtm_PinMap.h:769

IfxGtm_TIM2_5_P02_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P02_15_IN

IfxGtm_TIM2_5_P02_15_IN.

Definition: IfxGtm_PinMap.h:1228

IfxGtm_ATOM4_3N_TOUT106_P10_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3N_TOUT106_P10_4_OUT

IfxGtm_ATOM4_3N_TOUT106_P10_4_OUT.

Definition: IfxGtm_PinMap.h:657

IfxGtm_TIM1_4_P22_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P22_3_IN

IfxGtm_TIM1_4_P22_3_IN.

Definition: IfxGtm_PinMap.h:1149

IfxGtm_TOM0_7N_TOUT130_P22_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT130_P22_4_OUT

IfxGtm_TOM0_7N_TOUT130_P22_4_OUT.

Definition: IfxGtm_PinMap.h:1823

IfxGtm_TIM4_1_P00_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P00_10_IN

IfxGtm_TIM4_1_P00_10_IN.

Definition: IfxGtm_PinMap.h:1378

IfxGtm_ATOM1_7N_TOUT79_P15_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT79_P15_8_OUT

IfxGtm_ATOM1_7N_TOUT79_P15_8_OUT.

Definition: IfxGtm_PinMap.h:379

IfxGtm_TOM0_2_TOUT33_P33_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT33_P33_11_OUT

IfxGtm_TOM0_2_TOUT33_P33_11_OUT.

Definition: IfxGtm_PinMap.h:1705

IfxGtm_TIM5_4_P01_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P01_0_IN

IfxGtm_TIM5_4_P01_0_IN.

Definition: IfxGtm_PinMap.h:1508

IfxGtm_ATOM2_5N_TOUT87_P14_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5N_TOUT87_P14_7_OUT

IfxGtm_ATOM2_5N_TOUT87_P14_7_OUT.

Definition: IfxGtm_PinMap.h:464

IfxGtm_TOM1_5_TOUT96_P11_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT96_P11_3_OUT

IfxGtm_TOM1_5_TOUT96_P11_3_OUT.

Definition: IfxGtm_PinMap.h:2015

IfxGtm_ATOM5_5_TOUT211_P25_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT211_P25_5_OUT

IfxGtm_ATOM5_5_TOUT211_P25_5_OUT.

Definition: IfxGtm_PinMap.h:835

IfxGtm_ATOM4_1_TOUT79_P15_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT79_P15_8_OUT

IfxGtm_ATOM4_1_TOUT79_P15_8_OUT.

Definition: IfxGtm_PinMap.h:639

IfxGtm_TOM0_0_TOUT32_P33_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT32_P33_10_OUT

IfxGtm_TOM0_0_TOUT32_P33_10_OUT.

Definition: IfxGtm_PinMap.h:1636

IfxGtm_TOM0_4_TOUT72_P15_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT72_P15_1_OUT

IfxGtm_TOM0_4_TOUT72_P15_1_OUT.

Definition: IfxGtm_PinMap.h:1755

IfxGtm_TIM3_2_P13_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P13_14_IN

IfxGtm_TIM3_2_P13_14_IN.

Definition: IfxGtm_PinMap.h:1292

IfxGtm_TIM3_7_P02_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P02_13_IN

IfxGtm_TIM3_7_P02_13_IN.

Definition: IfxGtm_PinMap.h:1353

IfxGtm_TOM1_7_TOUT64_P20_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT64_P20_8_OUT

IfxGtm_TOM1_7_TOUT64_P20_8_OUT.

Definition: IfxGtm_PinMap.h:2073

IfxGtm_TOM0_5_TOUT58_P21_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT58_P21_7_OUT

IfxGtm_TOM0_5_TOUT58_P21_7_OUT.

Definition: IfxGtm_PinMap.h:1784

IfxGtm_TOM3_7N_TOUT243_P15_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_7N_TOUT243_P15_11_OUT

IfxGtm_TOM3_7N_TOUT243_P15_11_OUT.

Definition: IfxGtm_PinMap.h:2396

IfxGtm_ATOM1_7N_TOUT28_P33_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT28_P33_6_OUT

IfxGtm_ATOM1_7N_TOUT28_P33_6_OUT.

Definition: IfxGtm_PinMap.h:377

IfxGtm_TIM3_0_P33_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P33_12_IN

IfxGtm_TIM3_0_P33_12_IN.

Definition: IfxGtm_PinMap.h:1274

IfxGtm_TIM4_7_P10_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P10_4_IN

IfxGtm_TIM4_7_P10_4_IN.

Definition: IfxGtm_PinMap.h:1457

IfxGtm_ATOM1_5N_TOUT9_P00_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT9_P00_0_OUT

IfxGtm_ATOM1_5N_TOUT9_P00_0_OUT.

Definition: IfxGtm_PinMap.h:346

IfxGtm_TIM3_5_P34_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P34_2_IN

IfxGtm_TIM3_5_P34_2_IN.

Definition: IfxGtm_PinMap.h:1337

IfxGtm_ATOM0_7N_TOUT2_P02_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7N_TOUT2_P02_2_OUT

IfxGtm_ATOM0_7N_TOUT2_P02_2_OUT.

Definition: IfxGtm_PinMap.h:255

IfxGtm_TOM1_14_TOUT36_P32_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT36_P32_0_OUT

IfxGtm_TOM1_14_TOUT36_P32_0_OUT.

Definition: IfxGtm_PinMap.h:1898

IfxGtm_ATOM0_7_TOUT64_P20_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT64_P20_8_OUT

IfxGtm_ATOM0_7_TOUT64_P20_8_OUT.

Definition: IfxGtm_PinMap.h:259

IfxGtm_ATOM7_2_TOUT254_P13_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_2_TOUT254_P13_5_OUT

IfxGtm_ATOM7_2_TOUT254_P13_5_OUT.

Definition: IfxGtm_PinMap.h:945

IfxGtm_ATOM1_4_TOUT130_P22_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT130_P22_4_OUT

IfxGtm_ATOM1_4_TOUT130_P22_4_OUT.

Definition: IfxGtm_PinMap.h:330

IfxGtm_TOM1_8_TOUT128_P12_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT128_P12_0_OUT

IfxGtm_TOM1_8_TOUT128_P12_0_OUT.

Definition: IfxGtm_PinMap.h:2081

IfxGtm_TOM2_1N_TOUT44_P23_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT44_P23_3_OUT

IfxGtm_TOM2_1N_TOUT44_P23_3_OUT.

Definition: IfxGtm_PinMap.h:2140

IfxGtm_TOM0_7N_TOUT7_P02_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT7_P02_7_OUT

IfxGtm_TOM0_7N_TOUT7_P02_7_OUT.

Definition: IfxGtm_PinMap.h:1834

IfxGtm_TIM1_4_P33_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P33_8_IN

IfxGtm_TIM1_4_P33_8_IN.

Definition: IfxGtm_PinMap.h:1152

IfxGtm_TIM4_3_P25_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P25_11_IN

IfxGtm_TIM4_3_P25_11_IN.

Definition: IfxGtm_PinMap.h:1415

IfxGtm_TIM5_6_P00_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P00_2_IN

IfxGtm_TIM5_6_P00_2_IN.

Definition: IfxGtm_PinMap.h:1529

IfxGtm_ATOM5_3_TOUT244_P15_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT244_P15_12_OUT

IfxGtm_ATOM5_3_TOUT244_P15_12_OUT.

Definition: IfxGtm_PinMap.h:806

IfxGtm_ATOM1_7_TOUT67_P20_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT67_P20_11_OUT

IfxGtm_ATOM1_7_TOUT67_P20_11_OUT.

Definition: IfxGtm_PinMap.h:383

IfxGtm_TOM4_12_TOUT262_P13_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_12_TOUT262_P13_13_OUT

IfxGtm_TOM4_12_TOUT262_P13_13_OUT.

Definition: IfxGtm_PinMap.h:2435

IfxGtm_ATOM1_3N_TOUT106_P10_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3N_TOUT106_P10_4_OUT

IfxGtm_ATOM1_3N_TOUT106_P10_4_OUT.

Definition: IfxGtm_PinMap.h:305

IfxGtm_ATOM4_5_TOUT130_P22_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT130_P22_4_OUT

IfxGtm_ATOM4_5_TOUT130_P22_4_OUT.

Definition: IfxGtm_PinMap.h:697

IfxGtm_TOM0_5_TOUT74_P15_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT74_P15_3_OUT

IfxGtm_TOM0_5_TOUT74_P15_3_OUT.

Definition: IfxGtm_PinMap.h:1786

IfxGtm_TOM1_7N_TOUT243_P15_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT243_P15_11_OUT

IfxGtm_TOM1_7N_TOUT243_P15_11_OUT.

Definition: IfxGtm_PinMap.h:2053

IfxGtm_TOM0_0N_TOUT34_P33_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT34_P33_12_OUT

IfxGtm_TOM0_0N_TOUT34_P33_12_OUT.

Definition: IfxGtm_PinMap.h:1624

IfxGtm_ATOM8_4_TOUT261_P14_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_4_TOUT261_P14_12_OUT

IfxGtm_ATOM8_4_TOUT261_P14_12_OUT.

Definition: IfxGtm_PinMap.h:1004

IfxGtm_TOM2_8_TOUT131_P22_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_8_TOUT131_P22_5_OUT

IfxGtm_TOM2_8_TOUT131_P22_5_OUT.

Definition: IfxGtm_PinMap.h:2254

IfxGtm_TIM4_7_P14_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P14_7_IN

IfxGtm_TIM4_7_P14_7_IN.

Definition: IfxGtm_PinMap.h:1461

IfxGtm_ATOM1_3_TOUT118_P02_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT118_P02_11_OUT

IfxGtm_ATOM1_3_TOUT118_P02_11_OUT.

Definition: IfxGtm_PinMap.h:314

IfxGtm_TOM1_15_TOUT148_P34_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT148_P34_3_OUT

IfxGtm_TOM1_15_TOUT148_P34_3_OUT.

Definition: IfxGtm_PinMap.h:1901

IfxGtm_ATOM3_1N_TOUT90_P14_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT90_P14_10_OUT

IfxGtm_ATOM3_1N_TOUT90_P14_10_OUT.

Definition: IfxGtm_PinMap.h:514

IfxGtm_ATOM0_6N_TOUT137_P22_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6N_TOUT137_P22_11_OUT

IfxGtm_ATOM0_6N_TOUT137_P22_11_OUT.

Definition: IfxGtm_PinMap.h:241

IfxGtm_TOM1_4N_TOUT13_P00_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT13_P00_4_OUT

IfxGtm_TOM1_4N_TOUT13_P00_4_OUT.

Definition: IfxGtm_PinMap.h:1959

IfxGtm_TIM4_4_P01_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P01_8_IN

IfxGtm_TIM4_4_P01_8_IN.

Definition: IfxGtm_PinMap.h:1418

IfxGtm_ATOM2_1N_TOUT22_P33_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT22_P33_0_OUT

IfxGtm_ATOM2_1N_TOUT22_P33_0_OUT.

Definition: IfxGtm_PinMap.h:400

IfxGtm_ATOM4_5N_TOUT133_P22_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5N_TOUT133_P22_7_OUT

IfxGtm_ATOM4_5N_TOUT133_P22_7_OUT.

Definition: IfxGtm_PinMap.h:690

IfxGtm_ATOM2_2_TOUT96_P11_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT96_P11_3_OUT

IfxGtm_ATOM2_2_TOUT96_P11_3_OUT.

Definition: IfxGtm_PinMap.h:431

IfxPort_PadDriver

IfxPort_PadDriver

Pad driver mode definition (strength and slew rate).

Definition: IfxPort.h:151

IfxGtm_TOM2_6_TOUT104_P10_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT104_P10_2_OUT

IfxGtm_TOM2_6_TOUT104_P10_2_OUT.

Definition: IfxGtm_PinMap.h:2230

IfxGtm_TIM0_0_P10_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P10_7_IN

IfxGtm_TIM0_0_P10_7_IN.

Definition: IfxGtm_PinMap.h:1029

IfxGtm_TOM1_2N_TOUT40_P32_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT40_P32_4_OUT

IfxGtm_TOM1_2N_TOUT40_P32_4_OUT.

Definition: IfxGtm_PinMap.h:1929

IfxGtm_TOM1_5N_TOUT97_P11_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT97_P11_6_OUT

IfxGtm_TOM1_5N_TOUT97_P11_6_OUT.

Definition: IfxGtm_PinMap.h:2000

IfxGtm_TIM1_0_P21_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P21_2_IN

IfxGtm_TIM1_0_P21_2_IN.

Definition: IfxGtm_PinMap.h:1111

IfxGtm_TIM6_6_P23_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_6_P23_1_IN

IfxGtm_TIM6_6_P23_1_IN.

Definition: IfxGtm_PinMap.h:1607

IfxGtm_TIM0_7_P23_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P23_3_IN

IfxGtm_TIM0_7_P23_3_IN.

Definition: IfxGtm_PinMap.h:1102

IfxGtm_TIM5_7_P01_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P01_11_IN

IfxGtm_TIM5_7_P01_11_IN.

Definition: IfxGtm_PinMap.h:1543

IfxGtm_TOM0_2_TOUT117_P02_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT117_P02_10_OUT

IfxGtm_TOM0_2_TOUT117_P02_10_OUT.

Definition: IfxGtm_PinMap.h:1701

IfxGtm_TOM2_0_TOUT53_P21_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT53_P21_2_OUT

IfxGtm_TOM2_0_TOUT53_P21_2_OUT.

Definition: IfxGtm_PinMap.h:2100

IfxGtm_TOM3_9_TOUT265_P10_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_9_TOUT265_P10_9_OUT

IfxGtm_TOM3_9_TOUT265_P10_9_OUT.

Definition: IfxGtm_PinMap.h:2415

IfxGtm_TOM0_6N_TOUT91_P13_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT91_P13_0_OUT

IfxGtm_TOM0_6N_TOUT91_P13_0_OUT.

Definition: IfxGtm_PinMap.h:1804

IfxGtm_TOM1_3_TOUT244_P15_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT244_P15_12_OUT

IfxGtm_TOM1_3_TOUT244_P15_12_OUT.

Definition: IfxGtm_PinMap.h:1952

IfxGtm_ATOM2_3_TOUT29_P33_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT29_P33_7_OUT

IfxGtm_ATOM2_3_TOUT29_P33_7_OUT.

Definition: IfxGtm_PinMap.h:447

IfxGtm_ATOM6_6_TOUT263_P14_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_6_TOUT263_P14_15_OUT

IfxGtm_ATOM6_6_TOUT263_P14_15_OUT.

Definition: IfxGtm_PinMap.h:919

IfxGtm_TIM2_5_P13_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P13_0_IN

IfxGtm_TIM2_5_P13_0_IN.

Definition: IfxGtm_PinMap.h:1231

IfxGtm_TOM0_9_TOUT1_P02_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT1_P02_1_OUT

IfxGtm_TOM0_9_TOUT1_P02_1_OUT.

Definition: IfxGtm_PinMap.h:1860

IfxGtm_TOM1_5_TOUT11_P00_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT11_P00_2_OUT

IfxGtm_TOM1_5_TOUT11_P00_2_OUT.

Definition: IfxGtm_PinMap.h:2002

IfxGtm_TOM3_5N_TOUT174_P31_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_5N_TOUT174_P31_0_OUT

IfxGtm_TOM3_5N_TOUT174_P31_0_OUT.

Definition: IfxGtm_PinMap.h:2369

IfxGtm_ATOM1_2N_TOUT41_P23_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT41_P23_0_OUT

IfxGtm_ATOM1_2N_TOUT41_P23_0_OUT.

Definition: IfxGtm_PinMap.h:294

IfxGtm_ATOM2_7N_TOUT61_P20_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7N_TOUT61_P20_3_OUT

IfxGtm_ATOM2_7N_TOUT61_P20_3_OUT.

Definition: IfxGtm_PinMap.h:485

IfxGtm_TOM3_14_TOUT139_P23_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_14_TOUT139_P23_7_OUT

IfxGtm_TOM3_14_TOUT139_P23_7_OUT.

Definition: IfxGtm_PinMap.h:2296

IfxGtm_ATOM0_1N_TOUT113_P01_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT113_P01_5_OUT

IfxGtm_ATOM0_1N_TOUT113_P01_5_OUT.

Definition: IfxGtm_PinMap.h:160

IfxGtm_ATOM5_6N_TOUT207_P25_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6N_TOUT207_P25_1_OUT

IfxGtm_ATOM5_6N_TOUT207_P25_1_OUT.

Definition: IfxGtm_PinMap.h:843

IfxGtm_Tim_TinMap::channel

IfxGtm_Tim_Ch channel

TIM channel index.

Definition: IfxGtm_PinMap.h:104

IfxGtm_TIM3_5_P02_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P02_11_IN

IfxGtm_TIM3_5_P02_11_IN.

Definition: IfxGtm_PinMap.h:1326

IfxGtm_TOM2_6N_TOUT122_P11_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT122_P11_5_OUT

IfxGtm_TOM2_6N_TOUT122_P11_5_OUT.

Definition: IfxGtm_PinMap.h:2223

IfxGtm_TIM5_5_P01_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P01_6_IN

IfxGtm_TIM5_5_P01_6_IN.

Definition: IfxGtm_PinMap.h:1520

IfxGtm_TOM2_1N_TOUT254_P13_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT254_P13_5_OUT

IfxGtm_TOM2_1N_TOUT254_P13_5_OUT.

Definition: IfxGtm_PinMap.h:2139

IfxGtm_TOM2_0N_TOUT264_P13_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT264_P13_15_OUT

IfxGtm_TOM2_0N_TOUT264_P13_15_OUT.

Definition: IfxGtm_PinMap.h:2090

IfxGtm_ATOM1_0_TOUT8_P02_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT8_P02_8_OUT

IfxGtm_ATOM1_0_TOUT8_P02_8_OUT.

Definition: IfxGtm_PinMap.h:270

IfxGtm_TIM0_2_P00_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P00_11_IN

IfxGtm_TIM0_2_P00_11_IN.

Definition: IfxGtm_PinMap.h:1048

IfxGtm_TIM5_5_P01_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P01_2_IN

IfxGtm_TIM5_5_P01_2_IN.

Definition: IfxGtm_PinMap.h:1519

IfxGtm_ATOM5_1_TOUT253_P13_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT253_P13_4_OUT

IfxGtm_ATOM5_1_TOUT253_P13_4_OUT.

Definition: IfxGtm_PinMap.h:765

IfxGtm_TIM0_4_P02_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P02_4_IN

IfxGtm_TIM0_4_P02_4_IN.

Definition: IfxGtm_PinMap.h:1070

IfxGtm_ATOM1_2N_TOUT5_P02_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT5_P02_5_OUT

IfxGtm_ATOM1_2N_TOUT5_P02_5_OUT.

Definition: IfxGtm_PinMap.h:295

IfxGtm_ATOM1_4_TOUT14_P00_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT14_P00_5_OUT

IfxGtm_ATOM1_4_TOUT14_P00_5_OUT.

Definition: IfxGtm_PinMap.h:332

IfxGtm_TOM3_6_TOUT136_P22_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_6_TOUT136_P22_10_OUT

IfxGtm_TOM3_6_TOUT136_P22_10_OUT.

Definition: IfxGtm_PinMap.h:2385

IfxGtm_TIM3_1_P20_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P20_13_IN

IfxGtm_TIM3_1_P20_13_IN.

Definition: IfxGtm_PinMap.h:1283

IfxGtm_ToutSel

IfxGtm_ToutSel

TOUTSEL register control code.

Definition: IfxGtm_PinMap.h:83

IfxGtm_TOM1_4_TOUT124_P11_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT124_P11_8_OUT

IfxGtm_TOM1_4_TOUT124_P11_8_OUT.

Definition: IfxGtm_PinMap.h:1974

IfxGtm_ATOM3_2_TOUT28_P33_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT28_P33_6_OUT

IfxGtm_ATOM3_2_TOUT28_P33_6_OUT.

Definition: IfxGtm_PinMap.h:538

IfxGtm_ATOM0_6N_TOUT116_P02_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6N_TOUT116_P02_9_OUT

IfxGtm_ATOM0_6N_TOUT116_P02_9_OUT.

Definition: IfxGtm_PinMap.h:239

IfxGtm_TIM4_1_P11_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P11_1_IN

IfxGtm_TIM4_1_P11_1_IN.

Definition: IfxGtm_PinMap.h:1383

IfxGtm_ATOM5_1_TOUT164_P01_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT164_P01_14_OUT

IfxGtm_ATOM5_1_TOUT164_P01_14_OUT.

Definition: IfxGtm_PinMap.h:761

IfxGtm_TIM1_5_P02_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P02_5_IN

IfxGtm_TIM1_5_P02_5_IN.

Definition: IfxGtm_PinMap.h:1153

IfxGtm_ATOM5_5N_TOUT155_P01_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5N_TOUT155_P01_0_OUT

IfxGtm_ATOM5_5N_TOUT155_P01_0_OUT.

Definition: IfxGtm_PinMap.h:826

IfxGtm_TOM3_7_TOUT213_P25_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_7_TOUT213_P25_7_OUT

IfxGtm_TOM3_7_TOUT213_P25_7_OUT.

Definition: IfxGtm_PinMap.h:2401

IfxGtm_TOM3_5_TOUT246_P15_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_5_TOUT246_P15_14_OUT

IfxGtm_TOM3_5_TOUT246_P15_14_OUT.

Definition: IfxGtm_PinMap.h:2377

IfxGtm_ATOM5_1_TOUT120_P11_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT120_P11_1_OUT

IfxGtm_ATOM5_1_TOUT120_P11_1_OUT.

Definition: IfxGtm_PinMap.h:757

IfxGtm_TIM3_7_P20_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P20_11_IN

IfxGtm_TIM3_7_P20_11_IN.

Definition: IfxGtm_PinMap.h:1358

IfxGtm_TIM4_6_P11_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P11_13_IN

IfxGtm_TIM4_6_P11_13_IN.

Definition: IfxGtm_PinMap.h:1449

IfxGtm_TOM4_9_TOUT203_P30_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_9_TOUT203_P30_13_OUT

IfxGtm_TOM4_9_TOUT203_P30_13_OUT.

Definition: IfxGtm_PinMap.h:2494

IfxGtm_TIM6_7_P14_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P14_15_IN

IfxGtm_TIM6_7_P14_15_IN.

Definition: IfxGtm_PinMap.h:1615

IfxGtm_TOM1_11_TOUT63_P20_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT63_P20_7_OUT

IfxGtm_TOM1_11_TOUT63_P20_7_OUT.

Definition: IfxGtm_PinMap.h:1886

IfxGtm_TOM1_1_TOUT1_P02_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT1_P02_1_OUT

IfxGtm_TOM1_1_TOUT1_P02_1_OUT.

Definition: IfxGtm_PinMap.h:1918

IfxGtm_TOM0_10_TOUT12_P00_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT12_P00_3_OUT

IfxGtm_TOM0_10_TOUT12_P00_3_OUT.

Definition: IfxGtm_PinMap.h:1642

IfxGtm_TOM4_11_TOUT233_P24_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_11_TOUT233_P24_11_OUT

IfxGtm_TOM4_11_TOUT233_P24_11_OUT.

Definition: IfxGtm_PinMap.h:2429

IfxGtm_TOM1_2_TOUT70_P20_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT70_P20_14_OUT

IfxGtm_TOM1_2_TOUT70_P20_14_OUT.

Definition: IfxGtm_PinMap.h:1940

IfxGtm_TOM4_8_TOUT230_P24_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_8_TOUT230_P24_8_OUT

IfxGtm_TOM4_8_TOUT230_P24_8_OUT.

Definition: IfxGtm_PinMap.h:2490

IfxGtm_ATOM5_5_TOUT159_P01_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT159_P01_1_OUT

IfxGtm_ATOM5_5_TOUT159_P01_1_OUT.

Definition: IfxGtm_PinMap.h:833

IfxGtm_TOM0_6_TOUT59_P20_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT59_P20_0_OUT

IfxGtm_TOM0_6_TOUT59_P20_0_OUT.

Definition: IfxGtm_PinMap.h:1815

IfxGtm_TIM3_7_P15_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P15_4_IN

IfxGtm_TIM3_7_P15_4_IN.

Definition: IfxGtm_PinMap.h:1357

IfxGtm_TIM5_7_P30_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P30_15_IN

IfxGtm_TIM5_7_P30_15_IN.

Definition: IfxGtm_PinMap.h:1548

IfxGtm_TOM3_1N_TOUT210_P25_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1N_TOUT210_P25_4_OUT

IfxGtm_TOM3_1N_TOUT210_P25_4_OUT.

Definition: IfxGtm_PinMap.h:2311

IfxGtm_TIM5_1_P30_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P30_9_IN

IfxGtm_TIM5_1_P30_9_IN.

Definition: IfxGtm_PinMap.h:1484

IfxGtm_ATOM1_1_TOUT31_P33_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT31_P33_9_OUT

IfxGtm_ATOM1_1_TOUT31_P33_9_OUT.

Definition: IfxGtm_PinMap.h:284

IfxGtm_TOM1_12_TOUT268_P10_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT268_P10_13_OUT

IfxGtm_TOM1_12_TOUT268_P10_13_OUT.

Definition: IfxGtm_PinMap.h:1887

IfxGtm_TOM0_0_TOUT87_P14_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT87_P14_7_OUT

IfxGtm_TOM0_0_TOUT87_P14_7_OUT.

Definition: IfxGtm_PinMap.h:1641

IfxGtm_TOM3_0_TOUT110_P10_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_0_TOUT110_P10_8_OUT

IfxGtm_TOM3_0_TOUT110_P10_8_OUT.

Definition: IfxGtm_PinMap.h:2268

IfxGtm_ATOM4_6N_TOUT97_P11_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6N_TOUT97_P11_6_OUT

IfxGtm_ATOM4_6N_TOUT97_P11_6_OUT.

Definition: IfxGtm_PinMap.h:707

IfxGtm_TIM4_6_P30_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P30_6_IN

IfxGtm_TIM4_6_P30_6_IN.

Definition: IfxGtm_PinMap.h:1453

IfxGtm_ATOM6_2_TOUT152_P02_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT152_P02_15_OUT

IfxGtm_ATOM6_2_TOUT152_P02_15_OUT.

Definition: IfxGtm_PinMap.h:885

IfxGtm_TIM1_1_P02_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P02_1_IN

IfxGtm_TIM1_1_P02_1_IN.

Definition: IfxGtm_PinMap.h:1116

IfxGtm_ATOM4_5N_TOUT109_P10_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5N_TOUT109_P10_7_OUT

IfxGtm_ATOM4_5N_TOUT109_P10_7_OUT.

Definition: IfxGtm_PinMap.h:688

IfxGtm_ATOM6_1_TOUT156_P01_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT156_P01_2_OUT

IfxGtm_ATOM6_1_TOUT156_P01_2_OUT.

Definition: IfxGtm_PinMap.h:877

IfxGtm_TOM2_0N_TOUT91_P13_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT91_P13_0_OUT

IfxGtm_TOM2_0N_TOUT91_P13_0_OUT.

Definition: IfxGtm_PinMap.h:2095

IfxGtm_ATOM2_5_TOUT166_P00_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT166_P00_14_OUT

IfxGtm_ATOM2_5_TOUT166_P00_14_OUT.

Definition: IfxGtm_PinMap.h:467

IfxGtm_ATOM0_6N_TOUT1_P02_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6N_TOUT1_P02_1_OUT

IfxGtm_ATOM0_6N_TOUT1_P02_1_OUT.

Definition: IfxGtm_PinMap.h:243

IfxGtm_TOM1_7N_TOUT71_P15_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT71_P15_0_OUT

IfxGtm_TOM1_7N_TOUT71_P15_0_OUT.

Definition: IfxGtm_PinMap.h:2059

IfxGtm_ATOM3_5N_TOUT26_P33_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5N_TOUT26_P33_4_OUT

IfxGtm_ATOM3_5N_TOUT26_P33_4_OUT.

Definition: IfxGtm_PinMap.h:579

IfxGtm_ATOM2_2_TOUT20_P00_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT20_P00_11_OUT

IfxGtm_ATOM2_2_TOUT20_P00_11_OUT.

Definition: IfxGtm_PinMap.h:427

IfxGtm_TIM5_7_P32_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P32_7_IN

IfxGtm_TIM5_7_P32_7_IN.

Definition: IfxGtm_PinMap.h:1550

IfxGtm_TOM0_8_TOUT51_P21_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT51_P21_0_OUT

IfxGtm_TOM0_8_TOUT51_P21_0_OUT.

Definition: IfxGtm_PinMap.h:1853

IfxGtm_ATOM4_2_TOUT104_P10_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT104_P10_2_OUT

IfxGtm_ATOM4_2_TOUT104_P10_2_OUT.

Definition: IfxGtm_PinMap.h:649

IfxGtm_ATOM1_5N_TOUT0_P02_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT0_P02_0_OUT

IfxGtm_ATOM1_5N_TOUT0_P02_0_OUT.

Definition: IfxGtm_PinMap.h:338

IfxGtm_TOM2_3N_TOUT100_P11_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3N_TOUT100_P11_11_OUT

IfxGtm_TOM2_3N_TOUT100_P11_11_OUT.

Definition: IfxGtm_PinMap.h:2172

IfxGtm_TIM5_4_P21_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P21_2_IN

IfxGtm_TIM5_4_P21_2_IN.

Definition: IfxGtm_PinMap.h:1512

IfxGtm_TIM4_3_P02_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P02_14_IN

IfxGtm_TIM4_3_P02_14_IN.

Definition: IfxGtm_PinMap.h:1407

IfxGtm_TIM5_7_P34_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P34_5_IN

IfxGtm_TIM5_7_P34_5_IN.

Definition: IfxGtm_PinMap.h:1551

IfxGtm_ATOM1_7N_TOUT2_P02_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT2_P02_2_OUT

IfxGtm_ATOM1_7N_TOUT2_P02_2_OUT.

Definition: IfxGtm_PinMap.h:378

IfxGtm_TOM0_1_TOUT103_P10_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT103_P10_1_OUT

IfxGtm_TOM0_1_TOUT103_P10_1_OUT.

Definition: IfxGtm_PinMap.h:1680

IfxGtm_TIM2_6_P00_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P00_7_IN

IfxGtm_TIM2_6_P00_7_IN.

Definition: IfxGtm_PinMap.h:1238

IfxGtm_TIM0_2_P02_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P02_2_IN

IfxGtm_TIM0_2_P02_2_IN.

Definition: IfxGtm_PinMap.h:1049

IfxGtm_TOM0_5N_TOUT97_P11_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT97_P11_6_OUT

IfxGtm_TOM0_5N_TOUT97_P11_6_OUT.

Definition: IfxGtm_PinMap.h:1775

IfxGtm_TOM0_5N_TOUT53_P21_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT53_P21_2_OUT

IfxGtm_TOM0_5N_TOUT53_P21_2_OUT.

Definition: IfxGtm_PinMap.h:1769

IfxGtm_TOM0_5_TOUT23_P33_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT23_P33_1_OUT

IfxGtm_TOM0_5_TOUT23_P33_1_OUT.

Definition: IfxGtm_PinMap.h:1779

IfxGtm_TOM1_4N_TOUT147_P34_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT147_P34_2_OUT

IfxGtm_TOM1_4N_TOUT147_P34_2_OUT.

Definition: IfxGtm_PinMap.h:1961

IfxGtm_ATOM4_6_TOUT74_P15_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT74_P15_3_OUT

IfxGtm_ATOM4_6_TOUT74_P15_3_OUT.

Definition: IfxGtm_PinMap.h:715

IfxGtm_ATOM1_2_TOUT80_P14_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT80_P14_0_OUT

IfxGtm_ATOM1_2_TOUT80_P14_0_OUT.

Definition: IfxGtm_PinMap.h:304

IfxGtm_ATOM0_1_TOUT84_P14_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT84_P14_4_OUT

IfxGtm_ATOM0_1_TOUT84_P14_4_OUT.

Definition: IfxGtm_PinMap.h:177

IfxGtm_TIM3_0_P00_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P00_5_IN

IfxGtm_TIM3_0_P00_5_IN.

Definition: IfxGtm_PinMap.h:1262

IfxGtm_TOM1_1_TOUT116_P02_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT116_P02_9_OUT

IfxGtm_TOM1_1_TOUT116_P02_9_OUT.

Definition: IfxGtm_PinMap.h:1915

IfxGtm_TOM3_7N_TOUT208_P25_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_7N_TOUT208_P25_2_OUT

IfxGtm_TOM3_7N_TOUT208_P25_2_OUT.

Definition: IfxGtm_PinMap.h:2395

IfxGtm_TOM2_13_TOUT263_P14_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_13_TOUT263_P14_15_OUT

IfxGtm_TOM2_13_TOUT263_P14_15_OUT.

Definition: IfxGtm_PinMap.h:2124

IfxGtm_ATOM4_7N_TOUT79_P15_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7N_TOUT79_P15_8_OUT

IfxGtm_ATOM4_7N_TOUT79_P15_8_OUT.

Definition: IfxGtm_PinMap.h:721

IfxGtm_ATOM8_3_TOUT201_P30_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_3_TOUT201_P30_11_OUT

IfxGtm_ATOM8_3_TOUT201_P30_11_OUT.

Definition: IfxGtm_PinMap.h:996

IfxGtm_TOM2_4_TOUT50_P22_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT50_P22_3_OUT

IfxGtm_TOM2_4_TOUT50_P22_3_OUT.

Definition: IfxGtm_PinMap.h:2202

IfxGtm_ATOM1_6N_TOUT10_P00_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT10_P00_1_OUT

IfxGtm_ATOM1_6N_TOUT10_P00_1_OUT.

Definition: IfxGtm_PinMap.h:356

IfxGtm_ATOM0_5_TOUT23_P33_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT23_P33_1_OUT

IfxGtm_ATOM0_5_TOUT23_P33_1_OUT.

Definition: IfxGtm_PinMap.h:233

IfxGtm_ATOM3_0N_TOUT17_P00_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT17_P00_8_OUT

IfxGtm_ATOM3_0N_TOUT17_P00_8_OUT.

Definition: IfxGtm_PinMap.h:496

IfxGtm_TOM0_9_TOUT52_P21_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT52_P21_1_OUT

IfxGtm_TOM0_9_TOUT52_P21_1_OUT.

Definition: IfxGtm_PinMap.h:1862

IfxGtm_ATOM7_4_TOUT248_P13_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_4_TOUT248_P13_9_OUT

IfxGtm_ATOM7_4_TOUT248_P13_9_OUT.

Definition: IfxGtm_PinMap.h:958

IfxGtm_TOM0_1N_TOUT10_P00_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT10_P00_1_OUT

IfxGtm_TOM0_1N_TOUT10_P00_1_OUT.

Definition: IfxGtm_PinMap.h:1668

IfxGtm_ATOM0_3_TOUT82_P14_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT82_P14_2_OUT

IfxGtm_ATOM0_3_TOUT82_P14_2_OUT.

Definition: IfxGtm_PinMap.h:211

IfxGtm_TOM0_1N_TOUT35_P33_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT35_P33_13_OUT

IfxGtm_TOM0_1N_TOUT35_P33_13_OUT.

Definition: IfxGtm_PinMap.h:1672

IfxGtm_TOM0_6_TOUT13_P00_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT13_P00_4_OUT

IfxGtm_TOM0_6_TOUT13_P00_4_OUT.

Definition: IfxGtm_PinMap.h:1809

IfxGtm_TIM2_0_P02_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P02_8_IN

IfxGtm_TIM2_0_P02_8_IN.

Definition: IfxGtm_PinMap.h:1176

IfxGtm_TOM3_6N_TOUT267_P10_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_6N_TOUT267_P10_14_OUT

IfxGtm_TOM3_6N_TOUT267_P10_14_OUT.

Definition: IfxGtm_PinMap.h:2384

IfxGtm_TOM0_1N_TOUT30_P33_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT30_P33_8_OUT

IfxGtm_TOM0_1N_TOUT30_P33_8_OUT.

Definition: IfxGtm_PinMap.h:1671

IfxGtm_TOM0_14_TOUT16_P00_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT16_P00_7_OUT

IfxGtm_TOM0_14_TOUT16_P00_7_OUT.

Definition: IfxGtm_PinMap.h:1661

IfxGtm_ATOM1_5N_TOUT8_P02_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT8_P02_8_OUT

IfxGtm_ATOM1_5N_TOUT8_P02_8_OUT.

Definition: IfxGtm_PinMap.h:345

IfxGtm_TOM1_5N_TOUT76_P15_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT76_P15_5_OUT

IfxGtm_TOM1_5N_TOUT76_P15_5_OUT.

Definition: IfxGtm_PinMap.h:1998

IfxGtm_TOM1_7N_TOUT130_P22_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT130_P22_4_OUT

IfxGtm_TOM1_7N_TOUT130_P22_4_OUT.

Definition: IfxGtm_PinMap.h:2049

IfxGtm_ATOM3_2_TOUT96_P11_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT96_P11_3_OUT

IfxGtm_ATOM3_2_TOUT96_P11_3_OUT.

Definition: IfxGtm_PinMap.h:542

IfxGtm_TIM0_3_P22_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P22_2_IN

IfxGtm_TIM0_3_P22_2_IN.

Definition: IfxGtm_PinMap.h:1067

IfxGtm_TOM2_10_TOUT62_P20_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_10_TOUT62_P20_6_OUT

IfxGtm_TOM2_10_TOUT62_P20_6_OUT.

Definition: IfxGtm_PinMap.h:2109

IfxGtm_Tom_ToutMapP

IfxGtm_Tom_ToutMap * IfxGtm_Tom_ToutMapP

Pointer to IfxGtm_Tom_ToutMap.

Definition: IfxGtm_PinMap.h:143

IfxGtm_TOM1_7_TOUT44_P23_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT44_P23_3_OUT

IfxGtm_TOM1_7_TOUT44_P23_3_OUT.

Definition: IfxGtm_PinMap.h:2070

IfxGtm_TOM3_5N_TOUT166_P00_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_5N_TOUT166_P00_14_OUT

IfxGtm_TOM3_5N_TOUT166_P00_14_OUT.

Definition: IfxGtm_PinMap.h:2368

IfxGtm_TOM1_3_TOUT80_P14_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT80_P14_0_OUT

IfxGtm_TOM1_3_TOUT80_P14_0_OUT.

Definition: IfxGtm_PinMap.h:1957

IfxGtm_ATOM1_4_TOUT61_P20_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT61_P20_3_OUT

IfxGtm_ATOM1_4_TOUT61_P20_3_OUT.

Definition: IfxGtm_PinMap.h:336

IfxGtm_TIM1_0_P33_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P33_10_IN

IfxGtm_TIM1_0_P33_10_IN.

Definition: IfxGtm_PinMap.h:1113

IfxGtm_TIM6_3_P24_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P24_3_IN

IfxGtm_TIM6_3_P24_3_IN.

Definition: IfxGtm_PinMap.h:1584

IfxGtm_TOM1_7N_TOUT100_P11_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT100_P11_11_OUT

IfxGtm_TOM1_7N_TOUT100_P11_11_OUT.

Definition: IfxGtm_PinMap.h:2047

IfxGtm_ATOM1_5N_TOUT109_P10_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT109_P10_7_OUT

IfxGtm_ATOM1_5N_TOUT109_P10_7_OUT.

Definition: IfxGtm_PinMap.h:339

IfxGtm_ToutSel_b

Definition: IfxGtm_PinMap.h:86

IfxGtm_TOM4_2_TOUT252_P13_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_2_TOUT252_P13_14_OUT

IfxGtm_TOM4_2_TOUT252_P13_14_OUT.

Definition: IfxGtm_PinMap.h:2461

IfxPort_Pin

Defines a pin.

Definition: IfxPort.h:246

IfxGtm_ATOM5_1N_TOUT140_P32_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT140_P32_5_OUT

IfxGtm_ATOM5_1N_TOUT140_P32_5_OUT.

Definition: IfxGtm_PinMap.h:749

IfxGtm_TOM3_5_TOUT135_P22_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_5_TOUT135_P22_9_OUT

IfxGtm_TOM3_5_TOUT135_P22_9_OUT.

Definition: IfxGtm_PinMap.h:2373

IfxGtm_ATOM5_6_TOUT247_P15_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT247_P15_15_OUT

IfxGtm_ATOM5_6_TOUT247_P15_15_OUT.

Definition: IfxGtm_PinMap.h:852

IfxGtm_TIM1_7_P23_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_P23_4_IN

IfxGtm_TIM1_7_P23_4_IN.

Definition: IfxGtm_PinMap.h:1172

IfxGtm_ATOM4_6_TOUT117_P02_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT117_P02_10_OUT

IfxGtm_ATOM4_6_TOUT117_P02_10_OUT.

Definition: IfxGtm_PinMap.h:709

IfxGtm_TOM0_1N_TOUT92_P13_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT92_P13_1_OUT

IfxGtm_TOM0_1N_TOUT92_P13_1_OUT.

Definition: IfxGtm_PinMap.h:1679

IfxGtm_TIM0_3_P33_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P33_7_IN

IfxGtm_TIM0_3_P33_7_IN.

Definition: IfxGtm_PinMap.h:1069

IfxGtm_ATOM1_6_TOUT24_P33_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT24_P33_2_OUT

IfxGtm_ATOM1_6_TOUT24_P33_2_OUT.

Definition: IfxGtm_PinMap.h:366

IfxGtm_ATOM2_5N_TOUT120_P11_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5N_TOUT120_P11_1_OUT

IfxGtm_ATOM2_5N_TOUT120_P11_1_OUT.

Definition: IfxGtm_PinMap.h:461

IfxGtm_ATOM1_7N_TOUT107_P10_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT107_P10_5_OUT

IfxGtm_ATOM1_7N_TOUT107_P10_5_OUT.

Definition: IfxGtm_PinMap.h:372

IfxGtm_ATOM8_2_TOUT232_P24_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_2_TOUT232_P24_10_OUT

IfxGtm_ATOM8_2_TOUT232_P24_10_OUT.

Definition: IfxGtm_PinMap.h:992

IfxGtm_TOM2_4N_TOUT253_P13_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT253_P13_4_OUT

IfxGtm_TOM2_4N_TOUT253_P13_4_OUT.

Definition: IfxGtm_PinMap.h:2193

IfxGtm_TOM3_4_TOUT110_P10_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT110_P10_8_OUT

IfxGtm_TOM3_4_TOUT110_P10_8_OUT.

Definition: IfxGtm_PinMap.h:2358

IfxGtm_ATOM1_2N_TOUT73_P15_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2N_TOUT73_P15_2_OUT

IfxGtm_ATOM1_2N_TOUT73_P15_2_OUT.

Definition: IfxGtm_PinMap.h:296

IfxGtm_TOM1_14_TOUT66_P20_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT66_P20_10_OUT

IfxGtm_TOM1_14_TOUT66_P20_10_OUT.

Definition: IfxGtm_PinMap.h:1899

IfxGtm_ATOM4_3_TOUT82_P14_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3_TOUT82_P14_2_OUT

IfxGtm_ATOM4_3_TOUT82_P14_2_OUT.

Definition: IfxGtm_PinMap.h:670

IfxGtm_TIM4_3_P02_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P02_10_IN

IfxGtm_TIM4_3_P02_10_IN.

Definition: IfxGtm_PinMap.h:1406

IfxGtm_ATOM2_5N_TOUT94_P13_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5N_TOUT94_P13_3_OUT

IfxGtm_ATOM2_5N_TOUT94_P13_3_OUT.

Definition: IfxGtm_PinMap.h:465

IfxGtm_ATOM3_2N_TOUT15_P00_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT15_P00_6_OUT

IfxGtm_ATOM3_2N_TOUT15_P00_6_OUT.

Definition: IfxGtm_PinMap.h:526

IfxGtm_TOM0_8_TOUT95_P11_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT95_P11_2_OUT

IfxGtm_TOM0_8_TOUT95_P11_2_OUT.

Definition: IfxGtm_PinMap.h:1856

IfxGtm_TIM4_2_P10_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P10_6_IN

IfxGtm_TIM4_2_P10_6_IN.

Definition: IfxGtm_PinMap.h:1396

IfxGtm_ATOM5_7_TOUT248_P13_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7_TOUT248_P13_9_OUT

IfxGtm_ATOM5_7_TOUT248_P13_9_OUT.

Definition: IfxGtm_PinMap.h:866

IfxGtm_ATOM7_6_TOUT249_P13_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_6_TOUT249_P13_12_OUT

IfxGtm_ATOM7_6_TOUT249_P13_12_OUT.

Definition: IfxGtm_PinMap.h:971

IfxGtm_ATOM5_1_TOUT131_P22_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1_TOUT131_P22_5_OUT

IfxGtm_ATOM5_1_TOUT131_P22_5_OUT.

Definition: IfxGtm_PinMap.h:758

IfxGtm_TOM1_5N_TOUT26_P33_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT26_P33_4_OUT

IfxGtm_TOM1_5N_TOUT26_P33_4_OUT.

Definition: IfxGtm_PinMap.h:1991

IfxGtm_TIM4_5_P01_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P01_10_IN

IfxGtm_TIM4_5_P01_10_IN.

Definition: IfxGtm_PinMap.h:1431

IfxGtm_ATOM6_3_TOUT185_P31_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT185_P31_11_OUT

IfxGtm_ATOM6_3_TOUT185_P31_11_OUT.

Definition: IfxGtm_PinMap.h:895

IfxGtm_ATOM8_4_TOUT202_P30_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_4_TOUT202_P30_12_OUT

IfxGtm_ATOM8_4_TOUT202_P30_12_OUT.

Definition: IfxGtm_PinMap.h:1001

IfxGtm_ATOM6_0_TOUT127_P11_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT127_P11_15_OUT

IfxGtm_ATOM6_0_TOUT127_P11_15_OUT.

Definition: IfxGtm_PinMap.h:867

IfxGtm_TOM1_5N_TOUT56_P21_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT56_P21_5_OUT

IfxGtm_TOM1_5N_TOUT56_P21_5_OUT.

Definition: IfxGtm_PinMap.h:1996

IfxGtm_TIM0_1_P10_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P10_1_IN

IfxGtm_TIM0_1_P10_1_IN.

Definition: IfxGtm_PinMap.h:1040

IfxGtm_TIM6_5_P31_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P31_13_IN

IfxGtm_TIM6_5_P31_13_IN.

Definition: IfxGtm_PinMap.h:1603

IfxGtm_ATOM4_4N_TOUT132_P22_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT132_P22_6_OUT

IfxGtm_ATOM4_4N_TOUT132_P22_6_OUT.

Definition: IfxGtm_PinMap.h:673

IfxGtm_TIM2_2_P11_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P11_4_IN

IfxGtm_TIM2_2_P11_4_IN.

Definition: IfxGtm_PinMap.h:1198

IfxGtm_TIM4_3_P24_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P24_3_IN

IfxGtm_TIM4_3_P24_3_IN.

Definition: IfxGtm_PinMap.h:1414

IfxGtm_ATOM2_4N_TOUT57_P21_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4N_TOUT57_P21_6_OUT

IfxGtm_ATOM2_4N_TOUT57_P21_6_OUT.

Definition: IfxGtm_PinMap.h:451

IfxGtm_TOM2_3_TOUT97_P11_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT97_P11_6_OUT

IfxGtm_TOM2_3_TOUT97_P11_6_OUT.

Definition: IfxGtm_PinMap.h:2187

IfxGtm_ATOM4_2N_TOUT58_P21_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2N_TOUT58_P21_7_OUT

IfxGtm_ATOM4_2N_TOUT58_P21_7_OUT.

Definition: IfxGtm_PinMap.h:645

IfxGtm_ATOM7_3_TOUT225_P24_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_3_TOUT225_P24_3_OUT

IfxGtm_ATOM7_3_TOUT225_P24_3_OUT.

Definition: IfxGtm_PinMap.h:949

IfxGtm_ATOM4_2_TOUT80_P14_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT80_P14_0_OUT

IfxGtm_ATOM4_2_TOUT80_P14_0_OUT.

Definition: IfxGtm_PinMap.h:655

IfxGtm_TOM0_2N_TOUT74_P15_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2N_TOUT74_P15_3_OUT

IfxGtm_TOM0_2N_TOUT74_P15_3_OUT.

Definition: IfxGtm_PinMap.h:1697

IfxGtm_TOM0_7N_TOUT39_P32_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT39_P32_3_OUT

IfxGtm_TOM0_7N_TOUT39_P32_3_OUT.

Definition: IfxGtm_PinMap.h:1829

IfxGtm_TOM0_15_TOUT101_P11_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT101_P11_12_OUT

IfxGtm_TOM0_15_TOUT101_P11_12_OUT.

Definition: IfxGtm_PinMap.h:1663

IfxGtm_TIM0_7_P14_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P14_4_IN

IfxGtm_TIM0_7_P14_4_IN.

Definition: IfxGtm_PinMap.h:1100

IfxGtm_TOM4_12_TOUT230_P24_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_12_TOUT230_P24_8_OUT

IfxGtm_TOM4_12_TOUT230_P24_8_OUT.

Definition: IfxGtm_PinMap.h:2433

IfxGtm_TOM0_4_TOUT102_P10_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT102_P10_0_OUT

IfxGtm_TOM0_4_TOUT102_P10_0_OUT.

Definition: IfxGtm_PinMap.h:1746

IfxGtm_TIM0_2_P10_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P10_10_IN

IfxGtm_TIM0_2_P10_10_IN.

Definition: IfxGtm_PinMap.h:1051

IfxGtm_TOM1_10_TOUT62_P20_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT62_P20_6_OUT

IfxGtm_TOM1_10_TOUT62_P20_6_OUT.

Definition: IfxGtm_PinMap.h:1881

IfxGtm_TOM1_5_TOUT23_P33_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT23_P33_1_OUT

IfxGtm_TOM1_5_TOUT23_P33_1_OUT.

Definition: IfxGtm_PinMap.h:2004

IfxGtm_ATOM3_1N_TOUT51_P21_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT51_P21_0_OUT

IfxGtm_ATOM3_1N_TOUT51_P21_0_OUT.

Definition: IfxGtm_PinMap.h:512

IfxGtm_TOM0_4_TOUT9_P00_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT9_P00_0_OUT

IfxGtm_TOM0_4_TOUT9_P00_0_OUT.

Definition: IfxGtm_PinMap.h:1759

IfxGtm_TOM4_1_TOUT223_P24_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_1_TOUT223_P24_1_OUT

IfxGtm_TOM4_1_TOUT223_P24_1_OUT.

Definition: IfxGtm_PinMap.h:2455

IfxGtm_ATOM2_5_TOUT65_P20_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT65_P20_9_OUT

IfxGtm_ATOM2_5_TOUT65_P20_9_OUT.

Definition: IfxGtm_PinMap.h:470

IfxGtm_TOM0_4N_TOUT143_P33_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT143_P33_14_OUT

IfxGtm_TOM0_4N_TOUT143_P33_14_OUT.

Definition: IfxGtm_PinMap.h:1732

IfxGtm_TOM1_8_TOUT141_P32_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT141_P32_6_OUT

IfxGtm_TOM1_8_TOUT141_P32_6_OUT.

Definition: IfxGtm_PinMap.h:2082

IfxGtm_TOM3_8_TOUT249_P13_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_8_TOUT249_P13_12_OUT

IfxGtm_TOM3_8_TOUT249_P13_12_OUT.

Definition: IfxGtm_PinMap.h:2409

IfxGtm_TIM2_4_P00_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P00_5_IN

IfxGtm_TIM2_4_P00_5_IN.

Definition: IfxGtm_PinMap.h:1215

IfxGtm_TIM1_7_P02_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_P02_7_IN

IfxGtm_TIM1_7_P02_7_IN.

Definition: IfxGtm_PinMap.h:1168

IfxGtm_TIM0_4_P10_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P10_13_IN

IfxGtm_TIM0_4_P10_13_IN.

Definition: IfxGtm_PinMap.h:1072

IfxGtm_TOM2_6N_TOUT120_P11_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT120_P11_1_OUT

IfxGtm_TOM2_6N_TOUT120_P11_1_OUT.

Definition: IfxGtm_PinMap.h:2222

IfxGtm_TOM3_4_TOUT178_P31_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT178_P31_4_OUT

IfxGtm_TOM3_4_TOUT178_P31_4_OUT.

Definition: IfxGtm_PinMap.h:2363

IfxGtm_TOM4_15_TOUT152_P02_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_15_TOUT152_P02_15_OUT

IfxGtm_TOM4_15_TOUT152_P02_15_OUT.

Definition: IfxGtm_PinMap.h:2447

IfxGtm_ATOM5_5_TOUT250_P13_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT250_P13_11_OUT

IfxGtm_ATOM5_5_TOUT250_P13_11_OUT.

Definition: IfxGtm_PinMap.h:837

IfxGtm_TIM1_6_P33_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_P33_2_IN

IfxGtm_TIM1_6_P33_2_IN.

Definition: IfxGtm_PinMap.h:1167

IfxGtm_ATOM2_2_TOUT103_P10_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT103_P10_1_OUT

IfxGtm_ATOM2_2_TOUT103_P10_1_OUT.

Definition: IfxGtm_PinMap.h:426

IfxGtm_TIM3_4_P00_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P00_5_IN

IfxGtm_TIM3_4_P00_5_IN.

Definition: IfxGtm_PinMap.h:1313

IfxGtm_ATOM0_1N_TOUT53_P21_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT53_P21_2_OUT

IfxGtm_ATOM0_1N_TOUT53_P21_2_OUT.

Definition: IfxGtm_PinMap.h:166

IfxGtm_TIM1_2_P23_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P23_5_IN

IfxGtm_TIM1_2_P23_5_IN.

Definition: IfxGtm_PinMap.h:1130

IfxGtm_TIM5_2_P24_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P24_10_IN

IfxGtm_TIM5_2_P24_10_IN.

Definition: IfxGtm_PinMap.h:1493

IfxGtm_TOM0_11_TOUT3_P02_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT3_P02_3_OUT

IfxGtm_TOM0_11_TOUT3_P02_3_OUT.

Definition: IfxGtm_PinMap.h:1648

IfxGtm_ATOM0_3_TOUT13_P00_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT13_P00_4_OUT

IfxGtm_ATOM0_3_TOUT13_P00_4_OUT.

Definition: IfxGtm_PinMap.h:205

IfxGtm_ATOM1_6_TOUT74_P15_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT74_P15_3_OUT

IfxGtm_ATOM1_6_TOUT74_P15_3_OUT.

Definition: IfxGtm_PinMap.h:370

IfxGtm_ATOM0_1_TOUT54_P21_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT54_P21_3_OUT

IfxGtm_ATOM0_1_TOUT54_P21_3_OUT.

Definition: IfxGtm_PinMap.h:176

IfxGtm_TIM4_0_P32_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P32_7_IN

IfxGtm_TIM4_0_P32_7_IN.

Definition: IfxGtm_PinMap.h:1377

IfxGtm_ATOM2_0N_TOUT37_P32_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0N_TOUT37_P32_1_OUT

IfxGtm_ATOM2_0N_TOUT37_P32_1_OUT.

Definition: IfxGtm_PinMap.h:392

IfxGtm_TOM3_8_TOUT162_P01_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_8_TOUT162_P01_8_OUT

IfxGtm_TOM3_8_TOUT162_P01_8_OUT.

Definition: IfxGtm_PinMap.h:2404

IfxGtm_ATOM7_2_TOUT224_P24_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_2_TOUT224_P24_2_OUT

IfxGtm_ATOM7_2_TOUT224_P24_2_OUT.

Definition: IfxGtm_PinMap.h:942

IfxGtm_TOM0_6_TOUT4_P02_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT4_P02_4_OUT

IfxGtm_TOM0_6_TOUT4_P02_4_OUT.

Definition: IfxGtm_PinMap.h:1814

IfxGtm_TOM2_5_TOUT103_P10_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5_TOUT103_P10_1_OUT

IfxGtm_TOM2_5_TOUT103_P10_1_OUT.

Definition: IfxGtm_PinMap.h:2214

IfxGtm_ATOM5_4N_TOUT165_P01_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4N_TOUT165_P01_11_OUT

IfxGtm_ATOM5_4N_TOUT165_P01_11_OUT.

Definition: IfxGtm_PinMap.h:812

IfxGtm_TOM1_1_TOUT69_P20_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT69_P20_13_OUT

IfxGtm_TOM1_1_TOUT69_P20_13_OUT.

Definition: IfxGtm_PinMap.h:1922

IfxGtm_TOM1_4_TOUT53_P21_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT53_P21_2_OUT

IfxGtm_TOM1_4_TOUT53_P21_2_OUT.

Definition: IfxGtm_PinMap.h:1981

IfxGtm_TIM2_2_P14_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_P14_8_IN

IfxGtm_TIM2_2_P14_8_IN.

Definition: IfxGtm_PinMap.h:1199

IfxGtm_TOM3_14_TOUT151_P02_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_14_TOUT151_P02_12_OUT

IfxGtm_TOM3_14_TOUT151_P02_12_OUT.

Definition: IfxGtm_PinMap.h:2297

IfxGtm_ATOM1_2_TOUT104_P10_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT104_P10_2_OUT

IfxGtm_ATOM1_2_TOUT104_P10_2_OUT.

Definition: IfxGtm_PinMap.h:297

IfxGtm_TIM0_5_P14_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P14_2_IN

IfxGtm_TIM0_5_P14_2_IN.

Definition: IfxGtm_PinMap.h:1083

IfxGtm_Tom

IfxGtm_Tom

Enum for TOM objects.

Definition: IfxGtm_cfg.h:417

IfxGtm_ATOM3_7N_TOUT20_P00_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7N_TOUT20_P00_11_OUT

IfxGtm_ATOM3_7N_TOUT20_P00_11_OUT.

Definition: IfxGtm_PinMap.h:604

IfxGtm_ATOM5_5N_TOUT162_P01_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5N_TOUT162_P01_8_OUT

IfxGtm_ATOM5_5N_TOUT162_P01_8_OUT.

Definition: IfxGtm_PinMap.h:827

IfxGtm_TOM1_1N_TOUT39_P32_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1N_TOUT39_P32_3_OUT

IfxGtm_TOM1_1N_TOUT39_P32_3_OUT.

Definition: IfxGtm_PinMap.h:1911

IfxGtm_ATOM1_3_TOUT108_P10_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT108_P10_6_OUT

IfxGtm_ATOM1_3_TOUT108_P10_6_OUT.

Definition: IfxGtm_PinMap.h:313

IfxGtm_ATOM5_5_TOUT135_P22_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT135_P22_9_OUT

IfxGtm_ATOM5_5_TOUT135_P22_9_OUT.

Definition: IfxGtm_PinMap.h:831

IfxGtm_ATOM5_7N_TOUT157_P01_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7N_TOUT157_P01_15_OUT

IfxGtm_ATOM5_7N_TOUT157_P01_15_OUT.

Definition: IfxGtm_PinMap.h:857

IfxGtm_TOM2_3N_TOUT59_P20_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3N_TOUT59_P20_0_OUT

IfxGtm_TOM2_3N_TOUT59_P20_0_OUT.

Definition: IfxGtm_PinMap.h:2177

IfxGtm_TIM4_6_P01_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P01_14_IN

IfxGtm_TIM4_6_P01_14_IN.

Definition: IfxGtm_PinMap.h:1444

IfxGtm_ATOM0_4_TOUT146_P34_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT146_P34_1_OUT

IfxGtm_ATOM0_4_TOUT146_P34_1_OUT.

Definition: IfxGtm_PinMap.h:217

IfxGtm_TOM2_10_TOUT70_P20_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_10_TOUT70_P20_14_OUT

IfxGtm_TOM2_10_TOUT70_P20_14_OUT.

Definition: IfxGtm_PinMap.h:2110

IfxGtm_TIM3_5_P22_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P22_9_IN

IfxGtm_TIM3_5_P22_9_IN.

Definition: IfxGtm_PinMap.h:1334

IfxGtm_ATOM0_2_TOUT83_P14_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT83_P14_3_OUT

IfxGtm_ATOM0_2_TOUT83_P14_3_OUT.

Definition: IfxGtm_PinMap.h:195

IfxGtm_TOM1_6_TOUT247_P15_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT247_P15_15_OUT

IfxGtm_TOM1_6_TOUT247_P15_15_OUT.

Definition: IfxGtm_PinMap.h:2036

IfxGtm_TOM0_15_TOUT17_P00_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT17_P00_8_OUT

IfxGtm_TOM0_15_TOUT17_P00_8_OUT.

Definition: IfxGtm_PinMap.h:1664

IfxGtm_TOM1_6N_TOUT40_P32_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT40_P32_4_OUT

IfxGtm_TOM1_6N_TOUT40_P32_4_OUT.

Definition: IfxGtm_PinMap.h:2026

IfxGtm_TOM0_5_TOUT2_P02_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT2_P02_2_OUT

IfxGtm_TOM0_5_TOUT2_P02_2_OUT.

Definition: IfxGtm_PinMap.h:1781

IfxGtm_TIM5_0_P31_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P31_8_IN

IfxGtm_TIM5_0_P31_8_IN.

Definition: IfxGtm_PinMap.h:1474

IfxGtm_ATOM8_7_TOUT237_P24_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_7_TOUT237_P24_15_OUT

IfxGtm_ATOM8_7_TOUT237_P24_15_OUT.

Definition: IfxGtm_PinMap.h:1021

IfxGtm_TOM3_3_TOUT244_P15_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3_TOUT244_P15_12_OUT

IfxGtm_TOM3_3_TOUT244_P15_12_OUT.

Definition: IfxGtm_PinMap.h:2351

IfxGtm_TOM0_7N_TOUT79_P15_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT79_P15_8_OUT

IfxGtm_TOM0_7N_TOUT79_P15_8_OUT.

Definition: IfxGtm_PinMap.h:1833

IfxGtm_TOM0_5N_TOUT87_P14_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT87_P14_7_OUT

IfxGtm_TOM0_5N_TOUT87_P14_7_OUT.

Definition: IfxGtm_PinMap.h:1774

IfxGtm_TOM0_6_TOUT83_P14_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT83_P14_3_OUT

IfxGtm_TOM0_6_TOUT83_P14_3_OUT.

Definition: IfxGtm_PinMap.h:1818

IfxGtm_ATOM3_3_TOUT89_P14_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT89_P14_9_OUT

IfxGtm_ATOM3_3_TOUT89_P14_9_OUT.

Definition: IfxGtm_PinMap.h:559

IfxGtm_TOM0_4N_TOUT73_P15_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT73_P15_2_OUT

IfxGtm_TOM0_4N_TOUT73_P15_2_OUT.

Definition: IfxGtm_PinMap.h:1740

IfxGtm_ATOM1_5_TOUT15_P00_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT15_P00_6_OUT

IfxGtm_ATOM1_5_TOUT15_P00_6_OUT.

Definition: IfxGtm_PinMap.h:348

IfxGtm_TOM0_1_TOUT86_P14_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT86_P14_6_OUT

IfxGtm_TOM0_1_TOUT86_P14_6_OUT.

Definition: IfxGtm_PinMap.h:1688

IfxGtm_TOM1_6_TOUT98_P11_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT98_P11_9_OUT

IfxGtm_TOM1_6_TOUT98_P11_9_OUT.

Definition: IfxGtm_PinMap.h:2046

IfxGtm_TOM2_0_TOUT250_P13_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT250_P13_11_OUT

IfxGtm_TOM2_0_TOUT250_P13_11_OUT.

Definition: IfxGtm_PinMap.h:2098

IfxGtm_TIM4_0_P12_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P12_0_IN

IfxGtm_TIM4_0_P12_0_IN.

Definition: IfxGtm_PinMap.h:1371

IfxGtm_TIM3_1_P00_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P00_1_IN

IfxGtm_TIM3_1_P00_1_IN.

Definition: IfxGtm_PinMap.h:1275

IfxGtm_TOM2_2_TOUT55_P21_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT55_P21_4_OUT

IfxGtm_TOM2_2_TOUT55_P21_4_OUT.

Definition: IfxGtm_PinMap.h:2168

IfxGtm_ATOM1_7N_TOUT117_P02_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7N_TOUT117_P02_10_OUT

IfxGtm_ATOM1_7N_TOUT117_P02_10_OUT.

Definition: IfxGtm_PinMap.h:373

IfxGtm_ATOM2_3N_TOUT100_P11_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT100_P11_11_OUT

IfxGtm_ATOM2_3N_TOUT100_P11_11_OUT.

Definition: IfxGtm_PinMap.h:432

IfxGtm_TOM1_1_TOUT86_P14_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT86_P14_6_OUT

IfxGtm_TOM1_1_TOUT86_P14_6_OUT.

Definition: IfxGtm_PinMap.h:1924

IfxGtm_ATOM4_6N_TOUT103_P10_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6N_TOUT103_P10_1_OUT

IfxGtm_ATOM4_6N_TOUT103_P10_1_OUT.

Definition: IfxGtm_PinMap.h:703

IfxGtm_TOM0_7N_TOUT88_P14_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT88_P14_8_OUT

IfxGtm_TOM0_7N_TOUT88_P14_8_OUT.

Definition: IfxGtm_PinMap.h:1836

IfxGtm_TIM3_0_P22_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P22_4_IN

IfxGtm_TIM3_0_P22_4_IN.

Definition: IfxGtm_PinMap.h:1271

IfxGtm_TIM3_6_P32_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P32_6_IN

IfxGtm_TIM3_6_P32_6_IN.

Definition: IfxGtm_PinMap.h:1350

IfxGtm_ATOM0_0_TOUT0_P02_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT0_P02_0_OUT

IfxGtm_ATOM0_0_TOUT0_P02_0_OUT.

Definition: IfxGtm_PinMap.h:154

IfxGtm_TOM1_3_TOUT13_P00_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT13_P00_4_OUT

IfxGtm_TOM1_3_TOUT13_P00_4_OUT.

Definition: IfxGtm_PinMap.h:1950

IfxGtm_TIM3_3_P14_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P14_9_IN

IfxGtm_TIM3_3_P14_9_IN.

Definition: IfxGtm_PinMap.h:1306

IfxGtm_TIM4_6_P01_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_6_P01_15_IN

IfxGtm_TIM4_6_P01_15_IN.

Definition: IfxGtm_PinMap.h:1445

IfxGtm_ATOM4_0_TOUT76_P15_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0_TOUT76_P15_5_OUT

IfxGtm_ATOM4_0_TOUT76_P15_5_OUT.

Definition: IfxGtm_PinMap.h:621

IfxGtm_TIM2_4_P14_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P14_10_IN

IfxGtm_TIM2_4_P14_10_IN.

Definition: IfxGtm_PinMap.h:1219

IfxGtm_TIM2_0_P11_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P11_0_IN

IfxGtm_TIM2_0_P11_0_IN.

Definition: IfxGtm_PinMap.h:1177

IfxGtm_ATOM0_4N_TOUT147_P34_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4N_TOUT147_P34_2_OUT

IfxGtm_ATOM0_4N_TOUT147_P34_2_OUT.

Definition: IfxGtm_PinMap.h:215

IfxGtm_TIM2_3_P34_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P34_1_IN

IfxGtm_TIM2_3_P34_1_IN.

Definition: IfxGtm_PinMap.h:1214

IfxGtm_ATOM1_3N_TOUT115_P01_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3N_TOUT115_P01_7_OUT

IfxGtm_ATOM1_3N_TOUT115_P01_7_OUT.

Definition: IfxGtm_PinMap.h:306

IfxGtm_TIM1_0_P14_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P14_5_IN

IfxGtm_TIM1_0_P14_5_IN.

Definition: IfxGtm_PinMap.h:1108

IfxGtm_TOM3_5_TOUT159_P01_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_5_TOUT159_P01_1_OUT

IfxGtm_TOM3_5_TOUT159_P01_1_OUT.

Definition: IfxGtm_PinMap.h:2374

IfxGtm_ATOM3_3N_TOUT100_P11_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT100_P11_11_OUT

IfxGtm_ATOM3_3N_TOUT100_P11_11_OUT.

Definition: IfxGtm_PinMap.h:543

IfxGtm_ATOM5_6_TOUT125_P11_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT125_P11_13_OUT

IfxGtm_ATOM5_6_TOUT125_P11_13_OUT.

Definition: IfxGtm_PinMap.h:845

IfxGtm_ToutSel_k

Definition: IfxGtm_PinMap.h:95

IfxGtm_TOM2_6_TOUT125_P11_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT125_P11_13_OUT

IfxGtm_TOM2_6_TOUT125_P11_13_OUT.

Definition: IfxGtm_PinMap.h:2232

IfxGtm_TIM6_0_P13_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P13_4_IN

IfxGtm_TIM6_0_P13_4_IN.

Definition: IfxGtm_PinMap.h:1554

IfxGtm_TOM1_5_TOUT66_P20_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT66_P20_10_OUT

IfxGtm_TOM1_5_TOUT66_P20_10_OUT.

Definition: IfxGtm_PinMap.h:2011

IfxGtm_ATOM7_6_TOUT153_P02_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_6_TOUT153_P02_13_OUT

IfxGtm_ATOM7_6_TOUT153_P02_13_OUT.

Definition: IfxGtm_PinMap.h:967

IfxGtm_TIM1_3_P00_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P00_12_IN

IfxGtm_TIM1_3_P00_12_IN.

Definition: IfxGtm_PinMap.h:1134

IfxGtm_TOM2_2N_TOUT78_P15_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2N_TOUT78_P15_7_OUT

IfxGtm_TOM2_2N_TOUT78_P15_7_OUT.

Definition: IfxGtm_PinMap.h:2160

IfxGtm_ATOM0_3N_TOUT59_P20_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT59_P20_0_OUT

IfxGtm_ATOM0_3N_TOUT59_P20_0_OUT.

Definition: IfxGtm_PinMap.h:201

IfxGtm_TIM6_3_P20_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P20_9_IN

IfxGtm_TIM6_3_P20_9_IN.

Definition: IfxGtm_PinMap.h:1582

IfxGtm_ATOM7_4_TOUT194_P30_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_4_TOUT194_P30_4_OUT

IfxGtm_ATOM7_4_TOUT194_P30_4_OUT.

Definition: IfxGtm_PinMap.h:955

IfxGtm_ATOM4_7N_TOUT124_P11_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7N_TOUT124_P11_8_OUT

IfxGtm_ATOM4_7N_TOUT124_P11_8_OUT.

Definition: IfxGtm_PinMap.h:718

IfxGtm_ATOM3_6_TOUT133_P22_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT133_P22_7_OUT

IfxGtm_ATOM3_6_TOUT133_P22_7_OUT.

Definition: IfxGtm_PinMap.h:598

IfxGtm_TIM5_0_P13_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P13_11_IN

IfxGtm_TIM5_0_P13_11_IN.

Definition: IfxGtm_PinMap.h:1470

IfxGtm_TOM2_3_TOUT89_P14_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT89_P14_9_OUT

IfxGtm_TOM2_3_TOUT89_P14_9_OUT.

Definition: IfxGtm_PinMap.h:2186

IfxGtm_ATOM0_1_TOUT116_P02_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT116_P02_9_OUT

IfxGtm_ATOM0_1_TOUT116_P02_9_OUT.

Definition: IfxGtm_PinMap.h:171

IfxGtm_TIM5_0_P22_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P22_8_IN

IfxGtm_TIM5_0_P22_8_IN.

Definition: IfxGtm_PinMap.h:1471

IfxGtm_ATOM1_6_TOUT106_P10_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT106_P10_4_OUT

IfxGtm_ATOM1_6_TOUT106_P10_4_OUT.

Definition: IfxGtm_PinMap.h:364

IfxGtm_TOM3_6_TOUT160_P01_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_6_TOUT160_P01_9_OUT

IfxGtm_TOM3_6_TOUT160_P01_9_OUT.

Definition: IfxGtm_PinMap.h:2386

IfxGtm_TIM6_5_P00_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P00_13_IN

IfxGtm_TIM6_5_P00_13_IN.

Definition: IfxGtm_PinMap.h:1596

IfxGtm_TIM5_6_P13_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P13_7_IN

IfxGtm_TIM5_6_P13_7_IN.

Definition: IfxGtm_PinMap.h:1533

IfxGtm_TIM3_1_P33_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P33_13_IN

IfxGtm_TIM3_1_P33_13_IN.

Definition: IfxGtm_PinMap.h:1286

IfxGtm_TOM4_8_TOUT258_P14_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_8_TOUT258_P14_11_OUT

IfxGtm_TOM4_8_TOUT258_P14_11_OUT.

Definition: IfxGtm_PinMap.h:2491

IfxGtm_ATOM4_3N_TOUT51_P21_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3N_TOUT51_P21_0_OUT

IfxGtm_ATOM4_3N_TOUT51_P21_0_OUT.

Definition: IfxGtm_PinMap.h:659

IfxGtm_TOM0_5N_TOUT121_P11_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT121_P11_4_OUT

IfxGtm_TOM0_5N_TOUT121_P11_4_OUT.

Definition: IfxGtm_PinMap.h:1760

IfxGtm_TIM1_0_P22_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P22_1_IN

IfxGtm_TIM1_0_P22_1_IN.

Definition: IfxGtm_PinMap.h:1112

IfxGtm_ATOM0_2N_TOUT15_P00_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT15_P00_6_OUT

IfxGtm_ATOM0_2N_TOUT15_P00_6_OUT.

Definition: IfxGtm_PinMap.h:179

IfxGtm_TIM2_5_P11_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P11_8_IN

IfxGtm_TIM2_5_P11_8_IN.

Definition: IfxGtm_PinMap.h:1230

IfxGtm_TOM0_5N_TOUT12_P00_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT12_P00_3_OUT

IfxGtm_TOM0_5N_TOUT12_P00_3_OUT.

Definition: IfxGtm_PinMap.h:1761

IfxGtm_TOM1_12_TOUT61_P20_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT61_P20_3_OUT

IfxGtm_TOM1_12_TOUT61_P20_3_OUT.

Definition: IfxGtm_PinMap.h:1890

IfxGtm_TIM4_4_P25_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P25_12_IN

IfxGtm_TIM4_4_P25_12_IN.

Definition: IfxGtm_PinMap.h:1426

IfxGtm_ATOM2_0N_TOUT144_P33_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0N_TOUT144_P33_15_OUT

IfxGtm_ATOM2_0N_TOUT144_P33_15_OUT.

Definition: IfxGtm_PinMap.h:389

IfxGtm_TIM2_1_P33_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P33_15_IN

IfxGtm_TIM2_1_P33_15_IN.

Definition: IfxGtm_PinMap.h:1194

IfxGtm_TOM0_8_TOUT8_P02_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT8_P02_8_OUT

IfxGtm_TOM0_8_TOUT8_P02_8_OUT.

Definition: IfxGtm_PinMap.h:1854

IfxGtm_TIM3_5_P32_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P32_5_IN

IfxGtm_TIM3_5_P32_5_IN.

Definition: IfxGtm_PinMap.h:1336

IfxGtm_TOM0_5N_TOUT77_P15_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT77_P15_6_OUT

IfxGtm_TOM0_5N_TOUT77_P15_6_OUT.

Definition: IfxGtm_PinMap.h:1773

IfxGtm_TOM2_7N_TOUT121_P11_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT121_P11_4_OUT

IfxGtm_TOM2_7N_TOUT121_P11_4_OUT.

Definition: IfxGtm_PinMap.h:2238

IfxGtm_TOM0_4N_TOUT36_P32_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT36_P32_0_OUT

IfxGtm_TOM0_4N_TOUT36_P32_0_OUT.

Definition: IfxGtm_PinMap.h:1736

IfxGtm_ATOM1_5_TOUT41_P23_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT41_P23_0_OUT

IfxGtm_ATOM1_5_TOUT41_P23_0_OUT.

Definition: IfxGtm_PinMap.h:351

IfxGtm_ATOM0_1N_TOUT41_P23_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT41_P23_0_OUT

IfxGtm_ATOM0_1N_TOUT41_P23_0_OUT.

Definition: IfxGtm_PinMap.h:163

IfxGtm_ATOM1_3N_TOUT6_P02_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3N_TOUT6_P02_6_OUT

IfxGtm_ATOM1_3N_TOUT6_P02_6_OUT.

Definition: IfxGtm_PinMap.h:310

IfxGtm_TOM0_6N_TOUT40_P32_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT40_P32_4_OUT

IfxGtm_TOM0_6N_TOUT40_P32_4_OUT.

Definition: IfxGtm_PinMap.h:1796

IfxGtm_TOM4_4_TOUT194_P30_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_4_TOUT194_P30_4_OUT

IfxGtm_TOM4_4_TOUT194_P30_4_OUT.

Definition: IfxGtm_PinMap.h:2468

IfxPort_InputMode

IfxPort_InputMode

Ifx_P output modification modes definition.

Definition: IfxPort.h:81

IfxGtm_TOM0_5N_TOUT76_P15_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT76_P15_5_OUT

IfxGtm_TOM0_5N_TOUT76_P15_5_OUT.

Definition: IfxGtm_PinMap.h:1772

IfxGtm_TOM3_3N_TOUT180_P31_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT180_P31_6_OUT

IfxGtm_TOM3_3N_TOUT180_P31_6_OUT.

Definition: IfxGtm_PinMap.h:2341

IfxGtm_TOM3_3_TOUT133_P22_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3_TOUT133_P22_7_OUT

IfxGtm_TOM3_3_TOUT133_P22_7_OUT.

Definition: IfxGtm_PinMap.h:2347

IfxGtm_TOM3_1N_TOUT116_P02_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1N_TOUT116_P02_9_OUT

IfxGtm_TOM3_1N_TOUT116_P02_9_OUT.

Definition: IfxGtm_PinMap.h:2307

IfxGtm_ATOM0_2_TOUT2_P02_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT2_P02_2_OUT

IfxGtm_ATOM0_2_TOUT2_P02_2_OUT.

Definition: IfxGtm_PinMap.h:190

IfxGtm_ATOM5_2_TOUT254_P13_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT254_P13_5_OUT

IfxGtm_ATOM5_2_TOUT254_P13_5_OUT.

Definition: IfxGtm_PinMap.h:785

IfxGtm_TIM6_7_P30_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P30_15_IN

IfxGtm_TIM6_7_P30_15_IN.

Definition: IfxGtm_PinMap.h:1619

IfxGtm_ATOM5_1N_TOUT210_P25_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT210_P25_4_OUT

IfxGtm_ATOM5_1N_TOUT210_P25_4_OUT.

Definition: IfxGtm_PinMap.h:752

IfxGtm_TOM4_4_TOUT8_P02_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_4_TOUT8_P02_8_OUT

IfxGtm_TOM4_4_TOUT8_P02_8_OUT.

Definition: IfxGtm_PinMap.h:2471

IfxGtm_ATOM5_6_TOUT160_P01_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT160_P01_9_OUT

IfxGtm_ATOM5_6_TOUT160_P01_9_OUT.

Definition: IfxGtm_PinMap.h:848

IfxGtm_ATOM0_3N_TOUT45_P23_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT45_P23_4_OUT

IfxGtm_ATOM0_3N_TOUT45_P23_4_OUT.

Definition: IfxGtm_PinMap.h:200

IfxGtm_ChXSel_j

Definition: IfxGtm_PinMap.h:72

IfxGtm_TOM0_7N_TOUT84_P14_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT84_P14_4_OUT

IfxGtm_TOM0_7N_TOUT84_P14_4_OUT.

Definition: IfxGtm_PinMap.h:1835

IfxGtm_ATOM5_6_TOUT141_P32_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT141_P32_6_OUT

IfxGtm_ATOM5_6_TOUT141_P32_6_OUT.

Definition: IfxGtm_PinMap.h:847

IfxGtm_ATOM5_4N_TOUT129_P12_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4N_TOUT129_P12_1_OUT

IfxGtm_ATOM5_4N_TOUT129_P12_1_OUT.

Definition: IfxGtm_PinMap.h:810

IfxGtm_ATOM5_0_TOUT146_P34_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT146_P34_1_OUT

IfxGtm_ATOM5_0_TOUT146_P34_1_OUT.

Definition: IfxGtm_PinMap.h:739

IfxGtm_ATOM2_7N_TOUT28_P33_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7N_TOUT28_P33_6_OUT

IfxGtm_ATOM2_7N_TOUT28_P33_6_OUT.

Definition: IfxGtm_PinMap.h:484

IfxGtm_TOM2_2_TOUT252_P13_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT252_P13_14_OUT

IfxGtm_TOM2_2_TOUT252_P13_14_OUT.

Definition: IfxGtm_PinMap.h:2165

IfxGtm_TIM3_2_P00_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P00_3_IN

IfxGtm_TIM3_2_P00_3_IN.

Definition: IfxGtm_PinMap.h:1288

IfxGtm_TIM2_7_P11_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P11_12_IN

IfxGtm_TIM2_7_P11_12_IN.

Definition: IfxGtm_PinMap.h:1252

IfxGtm_TOM0_7_TOUT92_P13_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT92_P13_1_OUT

IfxGtm_TOM0_7_TOUT92_P13_1_OUT.

Definition: IfxGtm_PinMap.h:1849

IfxGtm_TIM1_7_P20_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_P20_8_IN

IfxGtm_TIM1_7_P20_8_IN.

Definition: IfxGtm_PinMap.h:1170

IfxGtm_TOM2_2N_TOUT46_P23_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2N_TOUT46_P23_5_OUT

IfxGtm_TOM2_2N_TOUT46_P23_5_OUT.

Definition: IfxGtm_PinMap.h:2158

IfxGtm_ATOM2_1N_TOUT105_P10_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1N_TOUT105_P10_3_OUT

IfxGtm_ATOM2_1N_TOUT105_P10_3_OUT.

Definition: IfxGtm_PinMap.h:398

IfxGtm_TOM3_4_TOUT158_P01_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT158_P01_12_OUT

IfxGtm_TOM3_4_TOUT158_P01_12_OUT.

Definition: IfxGtm_PinMap.h:2362

IfxGtm_TOM2_12_TOUT34_P33_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_12_TOUT34_P33_12_OUT

IfxGtm_TOM2_12_TOUT34_P33_12_OUT.

Definition: IfxGtm_PinMap.h:2120

IfxGtm_TOM0_5N_TOUT37_P32_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT37_P32_1_OUT

IfxGtm_TOM0_5N_TOUT37_P32_1_OUT.

Definition: IfxGtm_PinMap.h:1767

IfxGtm_TIM2_6_P11_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P11_13_IN

IfxGtm_TIM2_6_P11_13_IN.

Definition: IfxGtm_PinMap.h:1241

IfxGtm_ATOM3_6N_TOUT95_P11_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6N_TOUT95_P11_2_OUT

IfxGtm_ATOM3_6N_TOUT95_P11_2_OUT.

Definition: IfxGtm_PinMap.h:596

IfxGtm_TOM2_6_TOUT131_P22_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT131_P22_5_OUT

IfxGtm_TOM2_6_TOUT131_P22_5_OUT.

Definition: IfxGtm_PinMap.h:2233

IfxGtm_TIM4_3_P10_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P10_14_IN

IfxGtm_TIM4_3_P10_14_IN.

Definition: IfxGtm_PinMap.h:1408

IfxGtm_ATOM2_1_TOUT95_P11_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT95_P11_2_OUT

IfxGtm_ATOM2_1_TOUT95_P11_2_OUT.

Definition: IfxGtm_PinMap.h:413

IfxGtm_TOM2_0_TOUT119_P11_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT119_P11_0_OUT

IfxGtm_TOM2_0_TOUT119_P11_0_OUT.

Definition: IfxGtm_PinMap.h:2096

IfxGtm_ATOM2_0N_TOUT32_P33_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0N_TOUT32_P33_10_OUT

IfxGtm_ATOM2_0N_TOUT32_P33_10_OUT.

Definition: IfxGtm_PinMap.h:391

IfxGtm_ATOM3_2N_TOUT31_P33_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2N_TOUT31_P33_9_OUT

IfxGtm_ATOM3_2N_TOUT31_P33_9_OUT.

Definition: IfxGtm_PinMap.h:529

IfxGtm_TIM1_4_P02_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P02_4_IN

IfxGtm_TIM1_4_P02_4_IN.

Definition: IfxGtm_PinMap.h:1144

IfxGtm_TOM0_6_TOUT42_P23_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT42_P23_1_OUT

IfxGtm_TOM0_6_TOUT42_P23_1_OUT.

Definition: IfxGtm_PinMap.h:1812

IfxGtm_ATOM5_2_TOUT176_P31_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT176_P31_2_OUT

IfxGtm_ATOM5_2_TOUT176_P31_2_OUT.

Definition: IfxGtm_PinMap.h:782

IfxGtm_TOM1_15_TOUT150_P34_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT150_P34_5_OUT

IfxGtm_TOM1_15_TOUT150_P34_5_OUT.

Definition: IfxGtm_PinMap.h:1902

IfxGtm_ATOM4_5_TOUT73_P15_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_5_TOUT73_P15_2_OUT

IfxGtm_ATOM4_5_TOUT73_P15_2_OUT.

Definition: IfxGtm_PinMap.h:702

IfxGtm_ATOM4_3N_TOUT46_P23_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3N_TOUT46_P23_5_OUT

IfxGtm_ATOM4_3N_TOUT46_P23_5_OUT.

Definition: IfxGtm_PinMap.h:658

IfxGtm_TOM0_4N_TOUT54_P21_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT54_P21_3_OUT

IfxGtm_TOM0_4N_TOUT54_P21_3_OUT.

Definition: IfxGtm_PinMap.h:1737

IfxGtm_TIM0_6_P14_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_P14_3_IN

IfxGtm_TIM0_6_P14_3_IN.

Definition: IfxGtm_PinMap.h:1092

IfxGtm_TIM0_3_P02_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P02_10_IN

IfxGtm_TIM0_3_P02_10_IN.

Definition: IfxGtm_PinMap.h:1060

IfxGtm_TIM1_3_P32_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P32_2_IN

IfxGtm_TIM1_3_P32_2_IN.

Definition: IfxGtm_PinMap.h:1142

IfxGtm_ATOM2_4_TOUT90_P14_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT90_P14_10_OUT

IfxGtm_ATOM2_4_TOUT90_P14_10_OUT.

Definition: IfxGtm_PinMap.h:459

IfxGtm_ATOM1_3N_TOUT42_P23_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3N_TOUT42_P23_1_OUT

IfxGtm_ATOM1_3N_TOUT42_P23_1_OUT.

Definition: IfxGtm_PinMap.h:309

IfxGtm_TOM1_6N_TOUT5_P02_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT5_P02_5_OUT

IfxGtm_TOM1_6N_TOUT5_P02_5_OUT.

Definition: IfxGtm_PinMap.h:2028

IfxGtm_ATOM5_1N_TOUT245_P15_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT245_P15_13_OUT

IfxGtm_ATOM5_1N_TOUT245_P15_13_OUT.

Definition: IfxGtm_PinMap.h:753

IfxGtm_ATOM6_1_TOUT183_P31_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT183_P31_9_OUT

IfxGtm_ATOM6_1_TOUT183_P31_9_OUT.

Definition: IfxGtm_PinMap.h:879

IfxGtm_ATOM0_1_TOUT47_P22_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT47_P22_0_OUT

IfxGtm_ATOM0_1_TOUT47_P22_0_OUT.

Definition: IfxGtm_PinMap.h:175

IfxGtm_TOM0_5_TOUT82_P14_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT82_P14_2_OUT

IfxGtm_TOM0_5_TOUT82_P14_2_OUT.

Definition: IfxGtm_PinMap.h:1787

IfxGtm_TOM0_0N_TOUT25_P33_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT25_P33_3_OUT

IfxGtm_TOM0_0N_TOUT25_P33_3_OUT.

Definition: IfxGtm_PinMap.h:1623

IfxGtm_ATOM4_1N_TOUT72_P15_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT72_P15_1_OUT

IfxGtm_ATOM4_1N_TOUT72_P15_1_OUT.

Definition: IfxGtm_PinMap.h:630

IfxGtm_TOM4_13_TOUT203_P30_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_13_TOUT203_P30_13_OUT

IfxGtm_TOM4_13_TOUT203_P30_13_OUT.

Definition: IfxGtm_PinMap.h:2437

IfxGtm_TOM3_5N_TOUT153_P02_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_5N_TOUT153_P02_13_OUT

IfxGtm_TOM3_5N_TOUT153_P02_13_OUT.

Definition: IfxGtm_PinMap.h:2366

IfxGtm_TOM3_2N_TOUT117_P02_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2N_TOUT117_P02_10_OUT

IfxGtm_TOM3_2N_TOUT117_P02_10_OUT.

Definition: IfxGtm_PinMap.h:2323

IfxGtm_TIM3_7_P34_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P34_4_IN

IfxGtm_TIM3_7_P34_4_IN.

Definition: IfxGtm_PinMap.h:1363

IfxGtm_TIM5_6_P14_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P14_15_IN

IfxGtm_TIM5_6_P14_15_IN.

Definition: IfxGtm_PinMap.h:1534

IfxGtm_ATOM1_6N_TOUT1_P02_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT1_P02_1_OUT

IfxGtm_ATOM1_6N_TOUT1_P02_1_OUT.

Definition: IfxGtm_PinMap.h:361

IfxGtm_TIM2_6_P15_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P15_15_IN

IfxGtm_TIM2_6_P15_15_IN.

Definition: IfxGtm_PinMap.h:1243

IfxGtm_ATOM2_2N_TOUT91_P13_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT91_P13_0_OUT

IfxGtm_ATOM2_2N_TOUT91_P13_0_OUT.

Definition: IfxGtm_PinMap.h:423

IfxGtm_ATOM8_5_TOUT168_P00_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_5_TOUT168_P00_15_OUT

IfxGtm_ATOM8_5_TOUT168_P00_15_OUT.

Definition: IfxGtm_PinMap.h:1005

IfxGtm_ATOM4_1_TOUT41_P23_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT41_P23_0_OUT

IfxGtm_ATOM4_1_TOUT41_P23_0_OUT.

Definition: IfxGtm_PinMap.h:634

IfxGtm_ATOM2_5_TOUT52_P21_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT52_P21_1_OUT

IfxGtm_ATOM2_5_TOUT52_P21_1_OUT.

Definition: IfxGtm_PinMap.h:469

IfxGtm_TIM4_2_P02_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P02_9_IN

IfxGtm_TIM4_2_P02_9_IN.

Definition: IfxGtm_PinMap.h:1394

IfxGtm_TOM0_3N_TOUT144_P33_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT144_P33_15_OUT

IfxGtm_TOM0_3N_TOUT144_P33_15_OUT.

Definition: IfxGtm_PinMap.h:1711

IfxGtm_ATOM4_7_TOUT118_P02_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7_TOUT118_P02_11_OUT

IfxGtm_ATOM4_7_TOUT118_P02_11_OUT.

Definition: IfxGtm_PinMap.h:722

IfxGtm_ATOM0_5N_TOUT26_P33_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5N_TOUT26_P33_4_OUT

IfxGtm_ATOM0_5N_TOUT26_P33_4_OUT.

Definition: IfxGtm_PinMap.h:229

IfxGtm_ATOM4_4N_TOUT56_P21_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT56_P21_5_OUT

IfxGtm_ATOM4_4N_TOUT56_P21_5_OUT.

Definition: IfxGtm_PinMap.h:675

IfxGtm_ATOM7_2_TOUT266_P10_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_2_TOUT266_P10_10_OUT

IfxGtm_ATOM7_2_TOUT266_P10_10_OUT.

Definition: IfxGtm_PinMap.h:946

IfxGtm_TIM6_5_P13_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P13_10_IN

IfxGtm_TIM6_5_P13_10_IN.

Definition: IfxGtm_PinMap.h:1597

IfxGtm_ATOM7_1_TOUT150_P34_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT150_P34_5_OUT

IfxGtm_ATOM7_1_TOUT150_P34_5_OUT.

Definition: IfxGtm_PinMap.h:932

IfxGtm_ATOM3_4_TOUT114_P01_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT114_P01_6_OUT

IfxGtm_ATOM3_4_TOUT114_P01_6_OUT.

Definition: IfxGtm_PinMap.h:567

IfxGtm_ATOM8_5_TOUT235_P24_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_5_TOUT235_P24_13_OUT

IfxGtm_ATOM8_5_TOUT235_P24_13_OUT.

Definition: IfxGtm_PinMap.h:1007

IfxGtm_ATOM8_6_TOUT256_P13_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_6_TOUT256_P13_7_OUT

IfxGtm_ATOM8_6_TOUT256_P13_7_OUT.

Definition: IfxGtm_PinMap.h:1015

IfxGtm_TIM1_3_P22_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_P22_2_IN

IfxGtm_TIM1_3_P22_2_IN.

Definition: IfxGtm_PinMap.h:1140

IfxGtm_TOM0_6N_TOUT49_P22_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT49_P22_2_OUT

IfxGtm_TOM0_6N_TOUT49_P22_2_OUT.

Definition: IfxGtm_PinMap.h:1797

IfxGtm_TIM3_0_P33_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P33_0_IN

IfxGtm_TIM3_0_P33_0_IN.

Definition: IfxGtm_PinMap.h:1273

IfxGtm_ATOM4_4N_TOUT95_P11_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT95_P11_2_OUT

IfxGtm_ATOM4_4N_TOUT95_P11_2_OUT.

Definition: IfxGtm_PinMap.h:678

IfxGtm_TIM3_5_P00_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P00_6_IN

IfxGtm_TIM3_5_P00_6_IN.

Definition: IfxGtm_PinMap.h:1325

IfxGtm_TOM2_0_TOUT95_P11_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT95_P11_2_OUT

IfxGtm_TOM2_0_TOUT95_P11_2_OUT.

Definition: IfxGtm_PinMap.h:2104

IfxGtm_TOM1_14_TOUT147_P34_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT147_P34_2_OUT

IfxGtm_TOM1_14_TOUT147_P34_2_OUT.

Definition: IfxGtm_PinMap.h:1896

IfxGtm_ATOM8_1_TOUT163_P01_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_1_TOUT163_P01_10_OUT

IfxGtm_ATOM8_1_TOUT163_P01_10_OUT.

Definition: IfxGtm_PinMap.h:985

IfxGtm_ATOM7_5_TOUT269_P10_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_5_TOUT269_P10_11_OUT

IfxGtm_ATOM7_5_TOUT269_P10_11_OUT.

Definition: IfxGtm_PinMap.h:965

IfxGtm_TOM2_5N_TOUT94_P13_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5N_TOUT94_P13_3_OUT

IfxGtm_TOM2_5N_TOUT94_P13_3_OUT.

Definition: IfxGtm_PinMap.h:2213

IfxGtm_TOM0_5_TOUT110_P10_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT110_P10_8_OUT

IfxGtm_TOM0_5_TOUT110_P10_8_OUT.

Definition: IfxGtm_PinMap.h:1776

IfxGtm_TOM0_4N_TOUT96_P11_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT96_P11_3_OUT

IfxGtm_TOM0_4N_TOUT96_P11_3_OUT.

Definition: IfxGtm_PinMap.h:1744

IfxGtm_TIM3_5_P13_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_5_P13_6_IN

IfxGtm_TIM3_5_P13_6_IN.

Definition: IfxGtm_PinMap.h:1330

IfxGtm_TIM3_4_P02_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P02_10_IN

IfxGtm_TIM3_4_P02_10_IN.

Definition: IfxGtm_PinMap.h:1314

IfxGtm_ATOM4_3_TOUT71_P15_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3_TOUT71_P15_0_OUT

IfxGtm_ATOM4_3_TOUT71_P15_0_OUT.

Definition: IfxGtm_PinMap.h:669

IfxGtm_ATOM1_3_TOUT38_P32_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT38_P32_2_OUT

IfxGtm_ATOM1_3_TOUT38_P32_2_OUT.

Definition: IfxGtm_PinMap.h:316

IfxGtm_TOM1_7_TOUT50_P22_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT50_P22_3_OUT

IfxGtm_TOM1_7_TOUT50_P22_3_OUT.

Definition: IfxGtm_PinMap.h:2072

IfxGtm_TIM3_7_P11_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P11_12_IN

IfxGtm_TIM3_7_P11_12_IN.

Definition: IfxGtm_PinMap.h:1354

IfxGtm_ATOM4_4_TOUT102_P10_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT102_P10_0_OUT

IfxGtm_ATOM4_4_TOUT102_P10_0_OUT.

Definition: IfxGtm_PinMap.h:679

IfxGtm_TOM4_12_TOUT202_P30_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_12_TOUT202_P30_12_OUT

IfxGtm_TOM4_12_TOUT202_P30_12_OUT.

Definition: IfxGtm_PinMap.h:2432

IfxGtm_ATOM7_5_TOUT168_P00_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_5_TOUT168_P00_15_OUT

IfxGtm_ATOM7_5_TOUT168_P00_15_OUT.

Definition: IfxGtm_PinMap.h:960

IfxGtm_TIM1_2_P23_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P23_6_IN

IfxGtm_TIM1_2_P23_6_IN.

Definition: IfxGtm_PinMap.h:1131

IfxGtm_ATOM0_2N_TOUT58_P21_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2N_TOUT58_P21_7_OUT

IfxGtm_ATOM0_2N_TOUT58_P21_7_OUT.

Definition: IfxGtm_PinMap.h:185

IfxGtm_TOM0_4N_TOUT1_P02_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT1_P02_1_OUT

IfxGtm_TOM0_4N_TOUT1_P02_1_OUT.

Definition: IfxGtm_PinMap.h:1734

IfxGtm_TIM2_1_P15_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P15_10_IN

IfxGtm_TIM2_1_P15_10_IN.

Definition: IfxGtm_PinMap.h:1190

IfxGtm_TOM0_7N_TOUT93_P13_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT93_P13_2_OUT

IfxGtm_TOM0_7N_TOUT93_P13_2_OUT.

Definition: IfxGtm_PinMap.h:1837

IfxGtm_TIM5_1_P33_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_1_P33_15_IN

IfxGtm_TIM5_1_P33_15_IN.

Definition: IfxGtm_PinMap.h:1486

IfxGtm_ATOM8_4_TOUT234_P24_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_4_TOUT234_P24_12_OUT

IfxGtm_ATOM8_4_TOUT234_P24_12_OUT.

Definition: IfxGtm_PinMap.h:1002

IfxGtm_TIM5_3_P22_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P22_11_IN

IfxGtm_TIM5_3_P22_11_IN.

Definition: IfxGtm_PinMap.h:1502

IfxGtm_TOM1_5N_TOUT3_P02_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT3_P02_3_OUT

IfxGtm_TOM1_5N_TOUT3_P02_3_OUT.

Definition: IfxGtm_PinMap.h:1995

IfxGtm_ATOM5_4_TOUT123_P11_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT123_P11_7_OUT

IfxGtm_ATOM5_4_TOUT123_P11_7_OUT.

Definition: IfxGtm_PinMap.h:816

IfxGtm_TOM2_7N_TOUT96_P11_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7N_TOUT96_P11_3_OUT

IfxGtm_TOM2_7N_TOUT96_P11_3_OUT.

Definition: IfxGtm_PinMap.h:2243

IfxGtm_TOM1_7_TOUT92_P13_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT92_P13_1_OUT

IfxGtm_TOM1_7_TOUT92_P13_1_OUT.

Definition: IfxGtm_PinMap.h:2079

IfxGtm_ATOM4_1N_TOUT50_P22_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT50_P22_3_OUT

IfxGtm_ATOM4_1N_TOUT50_P22_3_OUT.

Definition: IfxGtm_PinMap.h:627

IfxGtm_TOM1_2N_TOUT41_P23_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT41_P23_0_OUT

IfxGtm_TOM1_2N_TOUT41_P23_0_OUT.

Definition: IfxGtm_PinMap.h:1930

IfxGtm_ATOM2_5_TOUT35_P33_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT35_P33_13_OUT

IfxGtm_ATOM2_5_TOUT35_P33_13_OUT.

Definition: IfxGtm_PinMap.h:468

IfxGtm_Tim_TinMap::select

IfxGtm_ChXSel select

Input multiplexer value.

Definition: IfxGtm_PinMap.h:106

IfxGtm_ATOM5_6_TOUT180_P31_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT180_P31_6_OUT

IfxGtm_ATOM5_6_TOUT180_P31_6_OUT.

Definition: IfxGtm_PinMap.h:849

IfxGtm_ATOM5_2N_TOUT159_P01_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT159_P01_1_OUT

IfxGtm_ATOM5_2N_TOUT159_P01_1_OUT.

Definition: IfxGtm_PinMap.h:770

IfxGtm_ATOM8_0_TOUT198_P30_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_0_TOUT198_P30_8_OUT

IfxGtm_ATOM8_0_TOUT198_P30_8_OUT.

Definition: IfxGtm_PinMap.h:981

IfxGtm_TIM0_2_P02_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_P02_9_IN

IfxGtm_TIM0_2_P02_9_IN.

Definition: IfxGtm_PinMap.h:1050

IfxGtm_ATOM4_7_TOUT40_P32_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_7_TOUT40_P32_4_OUT

IfxGtm_ATOM4_7_TOUT40_P32_4_OUT.

Definition: IfxGtm_PinMap.h:725

IfxGtm_TOM0_13_TOUT99_P11_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT99_P11_10_OUT

IfxGtm_TOM0_13_TOUT99_P11_10_OUT.

Definition: IfxGtm_PinMap.h:1659

IfxGtm_TIM2_7_P01_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P01_7_IN

IfxGtm_TIM2_7_P01_7_IN.

Definition: IfxGtm_PinMap.h:1251

IfxGtm_TIM2_3_P00_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P00_4_IN

IfxGtm_TIM2_3_P00_4_IN.

Definition: IfxGtm_PinMap.h:1205

IfxGtm_TIM5_2_P13_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P13_14_IN

IfxGtm_TIM5_2_P13_14_IN.

Definition: IfxGtm_PinMap.h:1490

IfxGtm_TOM2_1_TOUT251_P13_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1_TOUT251_P13_10_OUT

IfxGtm_TOM2_1_TOUT251_P13_10_OUT.

Definition: IfxGtm_PinMap.h:2151

IfxGtm_TIM6_2_P20_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P20_8_IN

IfxGtm_TIM6_2_P20_8_IN.

Definition: IfxGtm_PinMap.h:1573

IfxGtm_ATOM2_6_TOUT168_P00_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT168_P00_15_OUT

IfxGtm_ATOM2_6_TOUT168_P00_15_OUT.

Definition: IfxGtm_PinMap.h:480

IfxGtm_TOM3_14_TOUT188_P31_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_14_TOUT188_P31_14_OUT

IfxGtm_TOM3_14_TOUT188_P31_14_OUT.

Definition: IfxGtm_PinMap.h:2299

IfxGtm_TOM3_3N_TOUT137_P22_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3N_TOUT137_P22_11_OUT

IfxGtm_TOM3_3N_TOUT137_P22_11_OUT.

Definition: IfxGtm_PinMap.h:2339

IfxGtm_TIM2_0_P00_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P00_0_IN

IfxGtm_TIM2_0_P00_0_IN.

Definition: IfxGtm_PinMap.h:1174

IfxGtm_TOM4_3_TOUT253_P13_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_3_TOUT253_P13_4_OUT

IfxGtm_TOM4_3_TOUT253_P13_4_OUT.

Definition: IfxGtm_PinMap.h:2465

IfxGtm_TOM2_0N_TOUT43_P23_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT43_P23_2_OUT

IfxGtm_TOM2_0N_TOUT43_P23_2_OUT.

Definition: IfxGtm_PinMap.h:2091

IfxGtm_TOM1_7_TOUT70_P20_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT70_P20_14_OUT

IfxGtm_TOM1_7_TOUT70_P20_14_OUT.

Definition: IfxGtm_PinMap.h:2075

IfxGtm_TOM2_4N_TOUT122_P11_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT122_P11_5_OUT

IfxGtm_TOM2_4N_TOUT122_P11_5_OUT.

Definition: IfxGtm_PinMap.h:2190

IfxGtm_TOM1_6N_TOUT149_P34_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT149_P34_4_OUT

IfxGtm_TOM1_6N_TOUT149_P34_4_OUT.

Definition: IfxGtm_PinMap.h:2018

IfxGtm_ATOM1_2_TOUT117_P02_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT117_P02_10_OUT

IfxGtm_ATOM1_2_TOUT117_P02_10_OUT.

Definition: IfxGtm_PinMap.h:299

IfxGtm_ATOM1_1_TOUT1_P02_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT1_P02_1_OUT

IfxGtm_ATOM1_1_TOUT1_P02_1_OUT.

Definition: IfxGtm_PinMap.h:283

IfxGtm_ATOM2_3N_TOUT139_P23_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT139_P23_7_OUT

IfxGtm_ATOM2_3N_TOUT139_P23_7_OUT.

Definition: IfxGtm_PinMap.h:436

IfxGtm_TOM2_1N_TOUT124_P11_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT124_P11_8_OUT

IfxGtm_TOM2_1N_TOUT124_P11_8_OUT.

Definition: IfxGtm_PinMap.h:2138

IfxGtm_ATOM6_3_TOUT111_P01_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT111_P01_3_OUT

IfxGtm_ATOM6_3_TOUT111_P01_3_OUT.

Definition: IfxGtm_PinMap.h:891

IfxGtm_TOM2_0_TOUT48_P22_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT48_P22_1_OUT

IfxGtm_TOM2_0_TOUT48_P22_1_OUT.

Definition: IfxGtm_PinMap.h:2099

IfxGtm_TOM0_13_TOUT5_P02_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT5_P02_5_OUT

IfxGtm_TOM0_13_TOUT5_P02_5_OUT.

Definition: IfxGtm_PinMap.h:1658

IfxGtm_TOM1_5N_TOUT28_P33_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5N_TOUT28_P33_6_OUT

IfxGtm_TOM1_5N_TOUT28_P33_6_OUT.

Definition: IfxGtm_PinMap.h:1992

IfxGtm_ChXSel_k

Definition: IfxGtm_PinMap.h:73

IfxGtm_TIM0_0_P13_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P13_12_IN

IfxGtm_TIM0_0_P13_12_IN.

Definition: IfxGtm_PinMap.h:1030

IfxGtm_TOM1_0_TOUT26_P33_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT26_P33_4_OUT

IfxGtm_TOM1_0_TOUT26_P33_4_OUT.

Definition: IfxGtm_PinMap.h:1870

IfxGtm_TIM2_1_P20_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P20_13_IN

IfxGtm_TIM2_1_P20_13_IN.

Definition: IfxGtm_PinMap.h:1191

IfxGtm_ATOM5_5N_TOUT206_P25_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5N_TOUT206_P25_0_OUT

IfxGtm_ATOM5_5N_TOUT206_P25_0_OUT.

Definition: IfxGtm_PinMap.h:829

IfxGtm_TOM0_6N_TOUT97_P11_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT97_P11_6_OUT

IfxGtm_TOM0_6N_TOUT97_P11_6_OUT.

Definition: IfxGtm_PinMap.h:1805

IfxGtm_ATOM1_6N_TOUT78_P15_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6N_TOUT78_P15_7_OUT

IfxGtm_ATOM1_6N_TOUT78_P15_7_OUT.

Definition: IfxGtm_PinMap.h:363

IfxGtm_TOM4_6_TOUT256_P13_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_6_TOUT256_P13_7_OUT

IfxGtm_TOM4_6_TOUT256_P13_7_OUT.

Definition: IfxGtm_PinMap.h:2481

IfxGtm_ATOM6_7_TOUT161_P01_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_7_TOUT161_P01_13_OUT

IfxGtm_ATOM6_7_TOUT161_P01_13_OUT.

Definition: IfxGtm_PinMap.h:921

IfxGtm_TOM1_4N_TOUT244_P15_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT244_P15_12_OUT

IfxGtm_TOM1_4N_TOUT244_P15_12_OUT.

Definition: IfxGtm_PinMap.h:1964

IfxGtm_ATOM5_1N_TOUT248_P13_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT248_P13_9_OUT

IfxGtm_ATOM5_1N_TOUT248_P13_9_OUT.

Definition: IfxGtm_PinMap.h:754

IfxGtm_ATOM0_1N_TOUT57_P21_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT57_P21_6_OUT

IfxGtm_ATOM0_1N_TOUT57_P21_6_OUT.

Definition: IfxGtm_PinMap.h:168

IfxGtm_TOM1_4_TOUT72_P15_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT72_P15_1_OUT

IfxGtm_TOM1_4_TOUT72_P15_1_OUT.

Definition: IfxGtm_PinMap.h:1983

IfxGtm_TOM4_8_TOUT198_P30_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_8_TOUT198_P30_8_OUT

IfxGtm_TOM4_8_TOUT198_P30_8_OUT.

Definition: IfxGtm_PinMap.h:2488

IfxGtm_ATOM3_4_TOUT30_P33_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT30_P33_8_OUT

IfxGtm_ATOM3_4_TOUT30_P33_8_OUT.

Definition: IfxGtm_PinMap.h:571

IfxGtm_ATOM7_0_TOUT149_P34_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_0_TOUT149_P34_4_OUT

IfxGtm_ATOM7_0_TOUT149_P34_4_OUT.

Definition: IfxGtm_PinMap.h:926

IfxGtm_TOM4_14_TOUT151_P02_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_14_TOUT151_P02_12_OUT

IfxGtm_TOM4_14_TOUT151_P02_12_OUT.

Definition: IfxGtm_PinMap.h:2441

IfxGtm_ATOM1_5N_TOUT132_P22_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT132_P22_6_OUT

IfxGtm_ATOM1_5N_TOUT132_P22_6_OUT.

Definition: IfxGtm_PinMap.h:340

IfxGtm_TOM1_4N_TOUT36_P32_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT36_P32_0_OUT

IfxGtm_TOM1_4N_TOUT36_P32_0_OUT.

Definition: IfxGtm_PinMap.h:1966

IfxGtm_TOM3_0N_TOUT8_P02_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_0N_TOUT8_P02_8_OUT

IfxGtm_TOM3_0N_TOUT8_P02_8_OUT.

Definition: IfxGtm_PinMap.h:2267

IfxGtm_TOM0_3N_TOUT94_P13_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT94_P13_3_OUT

IfxGtm_TOM0_3N_TOUT94_P13_3_OUT.

Definition: IfxGtm_PinMap.h:1719

IfxGtm_ATOM4_6_TOUT106_P10_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT106_P10_4_OUT

IfxGtm_ATOM4_6_TOUT106_P10_4_OUT.

Definition: IfxGtm_PinMap.h:708

IfxGtm_TOM0_5_TOUT40_P32_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT40_P32_4_OUT

IfxGtm_TOM0_5_TOUT40_P32_4_OUT.

Definition: IfxGtm_PinMap.h:1782

IfxGtm_TOM0_0N_TOUT7_P02_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT7_P02_7_OUT

IfxGtm_TOM0_0N_TOUT7_P02_7_OUT.

Definition: IfxGtm_PinMap.h:1628

IfxGtm_TIM3_1_P25_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_1_P25_1_IN

IfxGtm_TIM3_1_P25_1_IN.

Definition: IfxGtm_PinMap.h:1285

IfxGtm_ATOM4_4_TOUT111_P01_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4_TOUT111_P01_3_OUT

IfxGtm_ATOM4_4_TOUT111_P01_3_OUT.

Definition: IfxGtm_PinMap.h:680

IfxGtm_TOM1_4_TOUT9_P00_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT9_P00_0_OUT

IfxGtm_TOM1_4_TOUT9_P00_0_OUT.

Definition: IfxGtm_PinMap.h:1986

IfxGtm_TIM6_0_P25_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P25_0_IN

IfxGtm_TIM6_0_P25_0_IN.

Definition: IfxGtm_PinMap.h:1558

IfxGtm_TOM4_15_TOUT233_P24_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_15_TOUT233_P24_11_OUT

IfxGtm_TOM4_15_TOUT233_P24_11_OUT.

Definition: IfxGtm_PinMap.h:2450

IfxGtm_ATOM5_5_TOUT124_P11_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT124_P11_8_OUT

IfxGtm_ATOM5_5_TOUT124_P11_8_OUT.

Definition: IfxGtm_PinMap.h:830

IfxGtm_TOM3_2_TOUT164_P01_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT164_P01_14_OUT

IfxGtm_TOM3_2_TOUT164_P01_14_OUT.

Definition: IfxGtm_PinMap.h:2333

IfxGtm_ATOM2_1_TOUT19_P00_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT19_P00_10_OUT

IfxGtm_ATOM2_1_TOUT19_P00_10_OUT.

Definition: IfxGtm_PinMap.h:409

IfxGtm_ATOM6_4_TOUT218_P25_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_4_TOUT218_P25_12_OUT

IfxGtm_ATOM6_4_TOUT218_P25_12_OUT.

Definition: IfxGtm_PinMap.h:903

IfxGtm_TOM2_0_TOUT87_P14_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0_TOUT87_P14_7_OUT

IfxGtm_TOM2_0_TOUT87_P14_7_OUT.

Definition: IfxGtm_PinMap.h:2102

IfxGtm_TIM3_4_P25_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P25_4_IN

IfxGtm_TIM3_4_P25_4_IN.

Definition: IfxGtm_PinMap.h:1323

IfxGtm_ATOM4_2_TOUT55_P21_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT55_P21_4_OUT

IfxGtm_ATOM4_2_TOUT55_P21_4_OUT.

Definition: IfxGtm_PinMap.h:653

IfxGtm_ATOM8_0_TOUT230_P24_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_0_TOUT230_P24_8_OUT

IfxGtm_ATOM8_0_TOUT230_P24_8_OUT.

Definition: IfxGtm_PinMap.h:982

IfxGtm_ATOM2_2_TOUT44_P23_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT44_P23_3_OUT

IfxGtm_ATOM2_2_TOUT44_P23_3_OUT.

Definition: IfxGtm_PinMap.h:429

IfxGtm_ATOM1_2_TOUT33_P33_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT33_P33_11_OUT

IfxGtm_ATOM1_2_TOUT33_P33_11_OUT.

Definition: IfxGtm_PinMap.h:302

IfxGtm_ATOM5_3_TOUT165_P01_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT165_P01_11_OUT

IfxGtm_ATOM5_3_TOUT165_P01_11_OUT.

Definition: IfxGtm_PinMap.h:803

IfxGtm_TIM4_2_P25_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P25_10_IN

IfxGtm_TIM4_2_P25_10_IN.

Definition: IfxGtm_PinMap.h:1402

IfxGtm_TOM3_3_TOUT165_P01_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_3_TOUT165_P01_11_OUT

IfxGtm_TOM3_3_TOUT165_P01_11_OUT.

Definition: IfxGtm_PinMap.h:2348

IfxGtm_ATOM2_3N_TOUT11_P00_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT11_P00_2_OUT

IfxGtm_ATOM2_3N_TOUT11_P00_2_OUT.

Definition: IfxGtm_PinMap.h:435

IfxGtm_TOM1_0_TOUT8_P02_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT8_P02_8_OUT

IfxGtm_TOM1_0_TOUT8_P02_8_OUT.

Definition: IfxGtm_PinMap.h:1876

IfxGtm_ATOM5_6N_TOUT158_P01_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6N_TOUT158_P01_12_OUT

IfxGtm_ATOM5_6N_TOUT158_P01_12_OUT.

Definition: IfxGtm_PinMap.h:841

IfxGtm_ATOM5_4N_TOUT267_P10_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4N_TOUT267_P10_14_OUT

IfxGtm_ATOM5_4N_TOUT267_P10_14_OUT.

Definition: IfxGtm_PinMap.h:815

IfxGtm_ATOM3_5N_TOUT136_P22_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5N_TOUT136_P22_10_OUT

IfxGtm_ATOM3_5N_TOUT136_P22_10_OUT.

Definition: IfxGtm_PinMap.h:577

IfxGtm_ATOM3_6_TOUT36_P32_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT36_P32_0_OUT

IfxGtm_ATOM3_6_TOUT36_P32_0_OUT.

Definition: IfxGtm_PinMap.h:601

IfxGtm_TIM0_5_P10_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P10_11_IN

IfxGtm_TIM0_5_P10_11_IN.

Definition: IfxGtm_PinMap.h:1081

IfxGtm_Tim_Ch

IfxGtm_Tim_Ch

Enum for TIM channels.

Definition: IfxGtm_cfg.h:403

IfxGtm_ATOM1_2_TOUT12_P00_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT12_P00_3_OUT

IfxGtm_ATOM1_2_TOUT12_P00_3_OUT.

Definition: IfxGtm_PinMap.h:300

IfxGtm_TOM2_13_TOUT73_P15_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_13_TOUT73_P15_2_OUT

IfxGtm_TOM2_13_TOUT73_P15_2_OUT.

Definition: IfxGtm_PinMap.h:2127

IfxGtm_TOM1_7N_TOUT150_P34_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT150_P34_5_OUT

IfxGtm_TOM1_7N_TOUT150_P34_5_OUT.

Definition: IfxGtm_PinMap.h:2050

IfxGtm_ATOM4_2_TOUT46_P23_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2_TOUT46_P23_5_OUT

IfxGtm_ATOM4_2_TOUT46_P23_5_OUT.

Definition: IfxGtm_PinMap.h:652

IfxGtm_TIM5_7_P13_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P13_15_IN

IfxGtm_TIM5_7_P13_15_IN.

Definition: IfxGtm_PinMap.h:1545

IfxGtm_ATOM3_3N_TOUT62_P20_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT62_P20_6_OUT

IfxGtm_ATOM3_3N_TOUT62_P20_6_OUT.

Definition: IfxGtm_PinMap.h:551

IfxGtm_ATOM6_3_TOUT253_P13_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT253_P13_4_OUT

IfxGtm_ATOM6_3_TOUT253_P13_4_OUT.

Definition: IfxGtm_PinMap.h:897

IfxGtm_ATOM0_0_TOUT53_P21_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT53_P21_2_OUT

IfxGtm_ATOM0_0_TOUT53_P21_2_OUT.

Definition: IfxGtm_PinMap.h:156

IfxGtm_ATOM1_2_TOUT2_P02_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT2_P02_2_OUT

IfxGtm_ATOM1_2_TOUT2_P02_2_OUT.

Definition: IfxGtm_PinMap.h:301

IfxGtm_TIM3_6_P25_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P25_6_IN

IfxGtm_TIM3_6_P25_6_IN.

Definition: IfxGtm_PinMap.h:1348

IfxGtm_TOM0_7N_TOUT16_P00_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT16_P00_7_OUT

IfxGtm_TOM0_7N_TOUT16_P00_7_OUT.

Definition: IfxGtm_PinMap.h:1825

IfxGtm_ATOM6_3_TOUT144_P33_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT144_P33_15_OUT

IfxGtm_ATOM6_3_TOUT144_P33_15_OUT.

Definition: IfxGtm_PinMap.h:892

IfxGtm_TOM3_7_TOUT137_P22_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_7_TOUT137_P22_11_OUT

IfxGtm_TOM3_7_TOUT137_P22_11_OUT.

Definition: IfxGtm_PinMap.h:2398

IfxGtm_ATOM5_0_TOUT119_P11_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT119_P11_0_OUT

IfxGtm_ATOM5_0_TOUT119_P11_0_OUT.

Definition: IfxGtm_PinMap.h:737

IfxGtm_TOM1_6N_TOUT27_P33_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT27_P33_5_OUT

IfxGtm_TOM1_6N_TOUT27_P33_5_OUT.

Definition: IfxGtm_PinMap.h:2022

IfxGtm_TOM0_0_TOUT0_P02_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT0_P02_0_OUT

IfxGtm_TOM0_0_TOUT0_P02_0_OUT.

Definition: IfxGtm_PinMap.h:1631

IfxGtm_ATOM5_6_TOUT212_P26_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_6_TOUT212_P26_0_OUT

IfxGtm_ATOM5_6_TOUT212_P26_0_OUT.

Definition: IfxGtm_PinMap.h:851

IfxGtm_TOM3_1N_TOUT268_P10_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1N_TOUT268_P10_13_OUT

IfxGtm_TOM3_1N_TOUT268_P10_13_OUT.

Definition: IfxGtm_PinMap.h:2313

IfxGtm_ATOM8_2_TOUT200_P30_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_2_TOUT200_P30_10_OUT

IfxGtm_ATOM8_2_TOUT200_P30_10_OUT.

Definition: IfxGtm_PinMap.h:991

IfxGtm_TOM1_8_TOUT0_P02_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT0_P02_0_OUT

IfxGtm_TOM1_8_TOUT0_P02_0_OUT.

Definition: IfxGtm_PinMap.h:2080

IfxGtm_ATOM5_2N_TOUT124_P11_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT124_P11_8_OUT

IfxGtm_ATOM5_2N_TOUT124_P11_8_OUT.

Definition: IfxGtm_PinMap.h:767

IfxGtm_ATOM6_0_TOUT242_P15_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT242_P15_10_OUT

IfxGtm_ATOM6_0_TOUT242_P15_10_OUT.

Definition: IfxGtm_PinMap.h:873

IfxGtm_ATOM5_7_TOUT161_P01_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7_TOUT161_P01_13_OUT

IfxGtm_ATOM5_7_TOUT161_P01_13_OUT.

Definition: IfxGtm_PinMap.h:863

IfxGtm_ATOM0_3N_TOUT42_P23_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT42_P23_1_OUT

IfxGtm_ATOM0_3N_TOUT42_P23_1_OUT.

Definition: IfxGtm_PinMap.h:199

IfxGtm_ATOM3_7_TOUT101_P11_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT101_P11_12_OUT

IfxGtm_ATOM3_7_TOUT101_P11_12_OUT.

Definition: IfxGtm_PinMap.h:609

IfxGtm_TIM5_4_P31_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P31_12_IN

IfxGtm_TIM5_4_P31_12_IN.

Definition: IfxGtm_PinMap.h:1515

IfxGtm_TOM0_0_TOUT109_P10_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT109_P10_7_OUT

IfxGtm_TOM0_0_TOUT109_P10_7_OUT.

Definition: IfxGtm_PinMap.h:1632

IfxGtm_TOM3_11_TOUT166_P00_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_11_TOUT166_P00_14_OUT

IfxGtm_TOM3_11_TOUT166_P00_14_OUT.

Definition: IfxGtm_PinMap.h:2281

IfxGtm_TIM0_3_P10_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_P10_14_IN

IfxGtm_TIM0_3_P10_14_IN.

Definition: IfxGtm_PinMap.h:1062

IfxGtm_TIM3_6_P22_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P22_10_IN

IfxGtm_TIM3_6_P22_10_IN.

Definition: IfxGtm_PinMap.h:1347

IfxGtm_TIM6_1_P31_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P31_9_IN

IfxGtm_TIM6_1_P31_9_IN.

Definition: IfxGtm_PinMap.h:1569

IfxGtm_TOM4_13_TOUT168_P00_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_13_TOUT168_P00_15_OUT

IfxGtm_TOM4_13_TOUT168_P00_15_OUT.

Definition: IfxGtm_PinMap.h:2436

IfxGtm_TIM5_4_P14_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P14_12_IN

IfxGtm_TIM5_4_P14_12_IN.

Definition: IfxGtm_PinMap.h:1511

IfxGtm_TIM5_3_P24_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_3_P24_11_IN

IfxGtm_TIM5_3_P24_11_IN.

Definition: IfxGtm_PinMap.h:1503

IfxGtm_ATOM2_7_TOUT140_P32_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT140_P32_5_OUT

IfxGtm_ATOM2_7_TOUT140_P32_5_OUT.

Definition: IfxGtm_PinMap.h:489

IfxGtm_ATOM6_0_TOUT182_P31_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT182_P31_8_OUT

IfxGtm_ATOM6_0_TOUT182_P31_8_OUT.

Definition: IfxGtm_PinMap.h:871

IfxGtm_ATOM2_1_TOUT43_P23_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT43_P23_2_OUT

IfxGtm_ATOM2_1_TOUT43_P23_2_OUT.

Definition: IfxGtm_PinMap.h:411

IfxGtm_TOM0_7_TOUT101_P11_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT101_P11_12_OUT

IfxGtm_TOM0_7_TOUT101_P11_12_OUT.

Definition: IfxGtm_PinMap.h:1838

IfxGtm_TIM2_6_P11_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P11_11_IN

IfxGtm_TIM2_6_P11_11_IN.

Definition: IfxGtm_PinMap.h:1240

IfxGtm_TIM4_4_P32_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P32_6_IN

IfxGtm_TIM4_4_P32_6_IN.

Definition: IfxGtm_PinMap.h:1428

IfxGtm_TOM3_0N_TOUT213_P25_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_0N_TOUT213_P25_7_OUT

IfxGtm_TOM3_0N_TOUT213_P25_7_OUT.

Definition: IfxGtm_PinMap.h:2266

IfxGtm_TOM1_7_TOUT81_P14_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT81_P14_1_OUT

IfxGtm_TOM1_7_TOUT81_P14_1_OUT.

Definition: IfxGtm_PinMap.h:2077

IfxGtm_TIM1_5_P10_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P10_8_IN

IfxGtm_TIM1_5_P10_8_IN.

Definition: IfxGtm_PinMap.h:1154

IfxGtm_TOM1_0_TOUT68_P20_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT68_P20_12_OUT

IfxGtm_TOM1_0_TOUT68_P20_12_OUT.

Definition: IfxGtm_PinMap.h:1872

IfxGtm_TIM0_4_P21_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_P21_6_IN

IfxGtm_TIM0_4_P21_6_IN.

Definition: IfxGtm_PinMap.h:1074

IfxGtm_TOM1_2_TOUT20_P00_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT20_P00_11_OUT

IfxGtm_TOM1_2_TOUT20_P00_11_OUT.

Definition: IfxGtm_PinMap.h:1935

IfxGtm_TIM4_2_P01_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P01_9_IN

IfxGtm_TIM4_2_P01_9_IN.

Definition: IfxGtm_PinMap.h:1392

IfxGtm_ATOM6_3_TOUT165_P01_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_3_TOUT165_P01_11_OUT

IfxGtm_ATOM6_3_TOUT165_P01_11_OUT.

Definition: IfxGtm_PinMap.h:894

IfxGtm_TOM3_15_TOUT154_P02_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_15_TOUT154_P02_14_OUT

IfxGtm_TOM3_15_TOUT154_P02_14_OUT.

Definition: IfxGtm_PinMap.h:2304

IfxGtm_TOM3_4_TOUT245_P15_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT245_P15_13_OUT

IfxGtm_TOM3_4_TOUT245_P15_13_OUT.

Definition: IfxGtm_PinMap.h:2365

IfxGtm_TIM2_3_P15_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P15_12_IN

IfxGtm_TIM2_3_P15_12_IN.

Definition: IfxGtm_PinMap.h:1211

IfxGtm_ATOM2_2_TOUT88_P14_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT88_P14_8_OUT

IfxGtm_ATOM2_2_TOUT88_P14_8_OUT.

Definition: IfxGtm_PinMap.h:430

IfxGtm_TOM2_1_TOUT64_P20_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1_TOUT64_P20_8_OUT

IfxGtm_TOM2_1_TOUT64_P20_8_OUT.

Definition: IfxGtm_PinMap.h:2154

IfxGtm_ATOM5_3_TOUT133_P22_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT133_P22_7_OUT

IfxGtm_ATOM5_3_TOUT133_P22_7_OUT.

Definition: IfxGtm_PinMap.h:800

IfxGtm_ATOM1_5N_TOUT148_P34_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5N_TOUT148_P34_3_OUT

IfxGtm_ATOM1_5N_TOUT148_P34_3_OUT.

Definition: IfxGtm_PinMap.h:341

IfxGtm_TOM0_1N_TOUT14_P00_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT14_P00_5_OUT

IfxGtm_TOM0_1N_TOUT14_P00_5_OUT.

Definition: IfxGtm_PinMap.h:1669

IfxGtm_TIM4_5_P20_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_5_P20_3_IN

IfxGtm_TIM4_5_P20_3_IN.

Definition: IfxGtm_PinMap.h:1438

IfxGtm_TOM3_2N_TOUT159_P01_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2N_TOUT159_P01_1_OUT

IfxGtm_TOM3_2N_TOUT159_P01_1_OUT.

Definition: IfxGtm_PinMap.h:2325

IfxGtm_TOM1_9_TOUT142_P32_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT142_P32_7_OUT

IfxGtm_TOM1_9_TOUT142_P32_7_OUT.

Definition: IfxGtm_PinMap.h:2085

IfxGtm_ATOM4_3N_TOUT80_P14_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_3N_TOUT80_P14_0_OUT

IfxGtm_ATOM4_3N_TOUT80_P14_0_OUT.

Definition: IfxGtm_PinMap.h:663

IfxGtm_TIM2_1_P11_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_P11_1_IN

IfxGtm_TIM2_1_P11_1_IN.

Definition: IfxGtm_PinMap.h:1188

IfxGtm_ChXSel_n

Definition: IfxGtm_PinMap.h:77

IfxGtm_ATOM0_5N_TOUT9_P00_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5N_TOUT9_P00_0_OUT

IfxGtm_ATOM0_5N_TOUT9_P00_0_OUT.

Definition: IfxGtm_PinMap.h:231

IfxGtm_TIM1_6_P10_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_P10_4_IN

IfxGtm_TIM1_6_P10_4_IN.

Definition: IfxGtm_PinMap.h:1162

IfxGtm_ATOM5_3N_TOUT123_P11_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT123_P11_7_OUT

IfxGtm_ATOM5_3N_TOUT123_P11_7_OUT.

Definition: IfxGtm_PinMap.h:787

IfxGtm_ATOM1_0_TOUT109_P10_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT109_P10_7_OUT

IfxGtm_ATOM1_0_TOUT109_P10_7_OUT.

Definition: IfxGtm_PinMap.h:265

IfxGtm_ATOM7_0_TOUT249_P13_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_0_TOUT249_P13_12_OUT

IfxGtm_ATOM7_0_TOUT249_P13_12_OUT.

Definition: IfxGtm_PinMap.h:930

IfxGtm_ATOM3_0N_TOUT25_P33_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0N_TOUT25_P33_3_OUT

IfxGtm_ATOM3_0N_TOUT25_P33_3_OUT.

Definition: IfxGtm_PinMap.h:497

IfxGtm_ATOM0_7N_TOUT117_P02_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7N_TOUT117_P02_10_OUT

IfxGtm_ATOM0_7N_TOUT117_P02_10_OUT.

Definition: IfxGtm_PinMap.h:251

IfxGtm_ATOM2_3N_TOUT33_P33_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT33_P33_11_OUT

IfxGtm_ATOM2_3N_TOUT33_P33_11_OUT.

Definition: IfxGtm_PinMap.h:440

IfxGtm_TOM1_6N_TOUT14_P00_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT14_P00_5_OUT

IfxGtm_TOM1_6N_TOUT14_P00_5_OUT.

Definition: IfxGtm_PinMap.h:2019

IfxGtm_TOM1_7N_TOUT93_P13_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT93_P13_2_OUT

IfxGtm_TOM1_7N_TOUT93_P13_2_OUT.

Definition: IfxGtm_PinMap.h:2063

IfxGtm_TOM2_0N_TOUT126_P11_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_0N_TOUT126_P11_14_OUT

IfxGtm_TOM2_0N_TOUT126_P11_14_OUT.

Definition: IfxGtm_PinMap.h:2089

IfxGtm_TOM0_1N_TOUT57_P21_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT57_P21_6_OUT

IfxGtm_TOM0_1N_TOUT57_P21_6_OUT.

Definition: IfxGtm_PinMap.h:1676

IfxGtm_TIM4_2_P02_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P02_13_IN

IfxGtm_TIM4_2_P02_13_IN.

Definition: IfxGtm_PinMap.h:1393

IfxGtm_ATOM3_4N_TOUT97_P11_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4N_TOUT97_P11_6_OUT

IfxGtm_ATOM3_4N_TOUT97_P11_6_OUT.

Definition: IfxGtm_PinMap.h:566

IfxGtm_ATOM5_2_TOUT157_P01_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT157_P01_15_OUT

IfxGtm_ATOM5_2_TOUT157_P01_15_OUT.

Definition: IfxGtm_PinMap.h:781

IfxGtm_TIM6_0_P01_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_0_P01_12_IN

IfxGtm_TIM6_0_P01_12_IN.

Definition: IfxGtm_PinMap.h:1552

IfxGtm_TIM4_1_P32_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P32_5_IN

IfxGtm_TIM4_1_P32_5_IN.

Definition: IfxGtm_PinMap.h:1390

IfxGtm_ATOM0_4_TOUT50_P22_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT50_P22_3_OUT

IfxGtm_ATOM0_4_TOUT50_P22_3_OUT.

Definition: IfxGtm_PinMap.h:222

IfxGtm_TIM1_1_P14_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_P14_6_IN

IfxGtm_TIM1_1_P14_6_IN.

Definition: IfxGtm_PinMap.h:1118

IfxGtm_ATOM5_4_TOUT178_P31_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4_TOUT178_P31_4_OUT

IfxGtm_ATOM5_4_TOUT178_P31_4_OUT.

Definition: IfxGtm_PinMap.h:820

IfxGtm_ATOM2_2N_TOUT10_P00_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT10_P00_1_OUT

IfxGtm_ATOM2_2N_TOUT10_P00_1_OUT.

Definition: IfxGtm_PinMap.h:415

IfxGtm_TIM5_2_P02_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P02_13_IN

IfxGtm_TIM5_2_P02_13_IN.

Definition: IfxGtm_PinMap.h:1489

IfxGtm_TOM0_6_TOUT68_P20_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT68_P20_12_OUT

IfxGtm_TOM0_6_TOUT68_P20_12_OUT.

Definition: IfxGtm_PinMap.h:1816

IfxGtm_TIM4_7_P01_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_7_P01_11_IN

IfxGtm_TIM4_7_P01_11_IN.

Definition: IfxGtm_PinMap.h:1456

IfxGtm_ToutSel_h

Definition: IfxGtm_PinMap.h:92

IfxGtm_TOM0_1N_TOUT52_P21_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1N_TOUT52_P21_1_OUT

IfxGtm_TOM0_1N_TOUT52_P21_1_OUT.

Definition: IfxGtm_PinMap.h:1675

IfxGtm_TIM1_2_P33_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P33_6_IN

IfxGtm_TIM1_2_P33_6_IN.

Definition: IfxGtm_PinMap.h:1133

IfxGtm_ATOM3_2_TOUT112_P01_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT112_P01_4_OUT

IfxGtm_ATOM3_2_TOUT112_P01_4_OUT.

Definition: IfxGtm_PinMap.h:536

IfxGtm_ATOM6_5_TOUT219_P25_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_5_TOUT219_P25_13_OUT

IfxGtm_ATOM6_5_TOUT219_P25_13_OUT.

Definition: IfxGtm_PinMap.h:910

IfxGtm_ATOM8_5_TOUT203_P30_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_5_TOUT203_P30_13_OUT

IfxGtm_ATOM8_5_TOUT203_P30_13_OUT.

Definition: IfxGtm_PinMap.h:1006

IfxGtm_ATOM3_1N_TOUT14_P00_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT14_P00_5_OUT

IfxGtm_ATOM3_1N_TOUT14_P00_5_OUT.

Definition: IfxGtm_PinMap.h:507

IfxGtm_ATOM2_2N_TOUT114_P01_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT114_P01_6_OUT

IfxGtm_ATOM2_2N_TOUT114_P01_6_OUT.

Definition: IfxGtm_PinMap.h:416

IfxGtm_TOM2_2N_TOUT93_P13_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2N_TOUT93_P13_2_OUT

IfxGtm_TOM2_2N_TOUT93_P13_2_OUT.

Definition: IfxGtm_PinMap.h:2161

IfxGtm_ATOM6_5_TOUT262_P13_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_5_TOUT262_P13_13_OUT

IfxGtm_ATOM6_5_TOUT262_P13_13_OUT.

Definition: IfxGtm_PinMap.h:913

IfxGtm_TOM0_4N_TOUT147_P34_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT147_P34_2_OUT

IfxGtm_TOM0_4N_TOUT147_P34_2_OUT.

Definition: IfxGtm_PinMap.h:1733

IfxGtm_TOM3_6N_TOUT156_P01_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_6N_TOUT156_P01_2_OUT

IfxGtm_TOM3_6N_TOUT156_P01_2_OUT.

Definition: IfxGtm_PinMap.h:2380

IfxGtm_ATOM5_7_TOUT181_P31_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7_TOUT181_P31_7_OUT

IfxGtm_ATOM5_7_TOUT181_P31_7_OUT.

Definition: IfxGtm_PinMap.h:864

IfxGtm_ATOM4_4N_TOUT75_P15_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT75_P15_4_OUT

IfxGtm_ATOM4_4N_TOUT75_P15_4_OUT.

Definition: IfxGtm_PinMap.h:677

IfxGtm_TIM6_1_P23_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_1_P23_6_IN

IfxGtm_TIM6_1_P23_6_IN.

Definition: IfxGtm_PinMap.h:1565

IfxGtm_TIM0_1_P10_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_P10_9_IN

IfxGtm_TIM0_1_P10_9_IN.

Definition: IfxGtm_PinMap.h:1041

IfxGtm_ATOM5_2_TOUT243_P15_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT243_P15_11_OUT

IfxGtm_ATOM5_2_TOUT243_P15_11_OUT.

Definition: IfxGtm_PinMap.h:784

IfxGtm_ATOM3_7_TOUT134_P22_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT134_P22_8_OUT

IfxGtm_ATOM3_7_TOUT134_P22_8_OUT.

Definition: IfxGtm_PinMap.h:610

IfxGtm_TOM2_2_TOUT63_P20_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT63_P20_7_OUT

IfxGtm_TOM2_2_TOUT63_P20_7_OUT.

Definition: IfxGtm_PinMap.h:2169

IfxGtm_ATOM7_7_TOUT229_P24_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_7_TOUT229_P24_7_OUT

IfxGtm_ATOM7_7_TOUT229_P24_7_OUT.

Definition: IfxGtm_PinMap.h:977

IfxGtm_TOM0_4_TOUT0_P02_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT0_P02_0_OUT

IfxGtm_TOM0_4_TOUT0_P02_0_OUT.

Definition: IfxGtm_PinMap.h:1745

IfxGtm_ATOM4_1N_TOUT44_P23_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT44_P23_3_OUT

IfxGtm_ATOM4_1N_TOUT44_P23_3_OUT.

Definition: IfxGtm_PinMap.h:626

IfxGtm_ATOM5_2N_TOUT136_P22_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2N_TOUT136_P22_10_OUT

IfxGtm_ATOM5_2N_TOUT136_P22_10_OUT.

Definition: IfxGtm_PinMap.h:768

IfxGtm_TOM2_1N_TOUT50_P22_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_1N_TOUT50_P22_3_OUT

IfxGtm_TOM2_1N_TOUT50_P22_3_OUT.

Definition: IfxGtm_PinMap.h:2141

IfxGtm_TIM2_0_P33_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_P33_12_IN

IfxGtm_TIM2_0_P33_12_IN.

Definition: IfxGtm_PinMap.h:1183

IfxGtm_TOM2_4N_TOUT106_P10_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT106_P10_4_OUT

IfxGtm_TOM2_4N_TOUT106_P10_4_OUT.

Definition: IfxGtm_PinMap.h:2188

IfxGtm_ATOM2_0_TOUT109_P10_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT109_P10_7_OUT

IfxGtm_ATOM2_0_TOUT109_P10_7_OUT.

Definition: IfxGtm_PinMap.h:393

IfxGtm_ATOM4_2N_TOUT45_P23_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2N_TOUT45_P23_4_OUT

IfxGtm_ATOM4_2N_TOUT45_P23_4_OUT.

Definition: IfxGtm_PinMap.h:643

IfxGtm_TIM2_4_P02_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P02_14_IN

IfxGtm_TIM2_4_P02_14_IN.

Definition: IfxGtm_PinMap.h:1216

IfxGtm_ATOM2_2_TOUT28_P33_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT28_P33_6_OUT

IfxGtm_ATOM2_2_TOUT28_P33_6_OUT.

Definition: IfxGtm_PinMap.h:428

IfxGtm_ATOM3_1N_TOUT167_P00_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT167_P00_13_OUT

IfxGtm_ATOM3_1N_TOUT167_P00_13_OUT.

Definition: IfxGtm_PinMap.h:508

IfxGtm_TOM3_6_TOUT212_P25_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_6_TOUT212_P25_6_OUT

IfxGtm_TOM3_6_TOUT212_P25_6_OUT.

Definition: IfxGtm_PinMap.h:2388

IfxGtm_TIM3_0_P02_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P02_8_IN

IfxGtm_TIM3_0_P02_8_IN.

Definition: IfxGtm_PinMap.h:1264

IfxGtm_TOM1_6_TOUT74_P15_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT74_P15_3_OUT

IfxGtm_TOM1_6_TOUT74_P15_3_OUT.

Definition: IfxGtm_PinMap.h:2043

IfxGtm_ChXSel_g

Definition: IfxGtm_PinMap.h:68

IfxGtm_TIM5_4_P24_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_4_P24_12_IN

IfxGtm_TIM5_4_P24_12_IN.

Definition: IfxGtm_PinMap.h:1513

IfxGtm_TIM2_3_P01_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P01_5_IN

IfxGtm_TIM2_3_P01_5_IN.

Definition: IfxGtm_PinMap.h:1206

IfxGtm_TIM0_5_P01_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_P01_3_IN

IfxGtm_TIM0_5_P01_3_IN.

Definition: IfxGtm_PinMap.h:1079

IfxGtm_TOM0_6_TOUT129_P12_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT129_P12_1_OUT

IfxGtm_TOM0_6_TOUT129_P12_1_OUT.

Definition: IfxGtm_PinMap.h:1808

IfxGtm_ATOM7_4_TOUT245_P15_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_4_TOUT245_P15_13_OUT

IfxGtm_ATOM7_4_TOUT245_P15_13_OUT.

Definition: IfxGtm_PinMap.h:957

IfxGtm_TOM1_5_TOUT246_P15_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT246_P15_14_OUT

IfxGtm_TOM1_5_TOUT246_P15_14_OUT.

Definition: IfxGtm_PinMap.h:2005

IfxGtm_ATOM0_2_TOUT33_P33_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT33_P33_11_OUT

IfxGtm_ATOM0_2_TOUT33_P33_11_OUT.

Definition: IfxGtm_PinMap.h:191

IfxGtm_ATOM0_7_TOUT17_P00_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT17_P00_8_OUT

IfxGtm_ATOM0_7_TOUT17_P00_8_OUT.

Definition: IfxGtm_PinMap.h:256

IfxGtm_ATOM6_6_TOUT256_P13_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_6_TOUT256_P13_7_OUT

IfxGtm_ATOM6_6_TOUT256_P13_7_OUT.

Definition: IfxGtm_PinMap.h:918

IfxGtm_TIM3_0_P13_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_0_P13_3_IN

IfxGtm_TIM3_0_P13_3_IN.

Definition: IfxGtm_PinMap.h:1268

IfxGtm_ATOM0_7_TOUT45_P23_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT45_P23_4_OUT

IfxGtm_ATOM0_7_TOUT45_P23_4_OUT.

Definition: IfxGtm_PinMap.h:258

IfxGtm_ATOM5_3N_TOUT142_P32_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT142_P32_7_OUT

IfxGtm_ATOM5_3N_TOUT142_P32_7_OUT.

Definition: IfxGtm_PinMap.h:790

IfxGtm_TOM3_6N_TOUT242_P15_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_6N_TOUT242_P15_10_OUT

IfxGtm_TOM3_6N_TOUT242_P15_10_OUT.

Definition: IfxGtm_PinMap.h:2383

IfxGtm_TOM2_9_TOUT259_P14_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_9_TOUT259_P14_14_OUT

IfxGtm_TOM2_9_TOUT259_P14_14_OUT.

Definition: IfxGtm_PinMap.h:2260

IfxGtm_Atom.h

GTM basic functionality.

IfxGtm_TOM1_4N_TOUT95_P11_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT95_P11_2_OUT

IfxGtm_TOM1_4N_TOUT95_P11_2_OUT.

Definition: IfxGtm_PinMap.h:1972

IfxGtm_TOM1_7N_TOUT33_P33_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT33_P33_11_OUT

IfxGtm_TOM1_7N_TOUT33_P33_11_OUT.

Definition: IfxGtm_PinMap.h:2056

IfxGtm_TIM4_3_P01_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_3_P01_13_IN

IfxGtm_TIM4_3_P01_13_IN.

Definition: IfxGtm_PinMap.h:1405

IfxGtm_TOM4_9_TOUT163_P01_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_9_TOUT163_P01_10_OUT

IfxGtm_TOM4_9_TOUT163_P01_10_OUT.

Definition: IfxGtm_PinMap.h:2492

IfxGtm_ATOM2_6N_TOUT60_P20_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6N_TOUT60_P20_1_OUT

IfxGtm_ATOM2_6N_TOUT60_P20_1_OUT.

Definition: IfxGtm_PinMap.h:474

IfxGtm_TIM3_6_P15_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P15_3_IN

IfxGtm_TIM3_6_P15_3_IN.

Definition: IfxGtm_PinMap.h:1344

IfxGtm_ATOM3_4_TOUT90_P14_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT90_P14_10_OUT

IfxGtm_ATOM3_4_TOUT90_P14_10_OUT.

Definition: IfxGtm_PinMap.h:574

IfxGtm_ATOM0_4N_TOUT118_P02_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4N_TOUT118_P02_11_OUT

IfxGtm_ATOM0_4N_TOUT118_P02_11_OUT.

Definition: IfxGtm_PinMap.h:212

IfxGtm_TIM3_2_P25_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P25_2_IN

IfxGtm_TIM3_2_P25_2_IN.

Definition: IfxGtm_PinMap.h:1297

IfxGtm_TOM1_7N_TOUT39_P32_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT39_P32_3_OUT

IfxGtm_TOM1_7N_TOUT39_P32_3_OUT.

Definition: IfxGtm_PinMap.h:2057

IfxGtm_ATOM0_7_TOUT7_P02_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT7_P02_7_OUT

IfxGtm_ATOM0_7_TOUT7_P02_7_OUT.

Definition: IfxGtm_PinMap.h:260

IfxGtm_ATOM7_0_TOUT162_P01_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_0_TOUT162_P01_8_OUT

IfxGtm_ATOM7_0_TOUT162_P01_8_OUT.

Definition: IfxGtm_PinMap.h:927

IfxGtm_TOM1_7N_TOUT28_P33_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT28_P33_6_OUT

IfxGtm_TOM1_7N_TOUT28_P33_6_OUT.

Definition: IfxGtm_PinMap.h:2054

IfxGtm_ATOM7_1_TOUT223_P24_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT223_P24_1_OUT

IfxGtm_ATOM7_1_TOUT223_P24_1_OUT.

Definition: IfxGtm_PinMap.h:935

IfxGtm_ATOM1_4_TOUT29_P33_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT29_P33_7_OUT

IfxGtm_ATOM1_4_TOUT29_P33_7_OUT.

Definition: IfxGtm_PinMap.h:333

IfxGtm_TIM4_2_P24_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P24_2_IN

IfxGtm_TIM4_2_P24_2_IN.

Definition: IfxGtm_PinMap.h:1401

IfxGtm_ATOM5_3_TOUT255_P13_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT255_P13_6_OUT

IfxGtm_ATOM5_3_TOUT255_P13_6_OUT.

Definition: IfxGtm_PinMap.h:807

IfxGtm_TOM1_4N_TOUT8_P02_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT8_P02_8_OUT

IfxGtm_TOM1_4N_TOUT8_P02_8_OUT.

Definition: IfxGtm_PinMap.h:1971

IfxGtm_ATOM7_7_TOUT261_P14_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_7_TOUT261_P14_12_OUT

IfxGtm_ATOM7_7_TOUT261_P14_12_OUT.

Definition: IfxGtm_PinMap.h:979

IfxGtm_TOM0_6_TOUT29_P33_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT29_P33_7_OUT

IfxGtm_TOM0_6_TOUT29_P33_7_OUT.

Definition: IfxGtm_PinMap.h:1811

IfxGtm_TOM3_7N_TOUT176_P31_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_7N_TOUT176_P31_2_OUT

IfxGtm_TOM3_7N_TOUT176_P31_2_OUT.

Definition: IfxGtm_PinMap.h:2394

IfxGtm_ATOM0_3_TOUT118_P02_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT118_P02_11_OUT

IfxGtm_ATOM0_3_TOUT118_P02_11_OUT.

Definition: IfxGtm_PinMap.h:204

IfxGtm_ATOM5_7N_TOUT176_P31_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7N_TOUT176_P31_2_OUT

IfxGtm_ATOM5_7N_TOUT176_P31_2_OUT.

Definition: IfxGtm_PinMap.h:858

IfxGtm_TOM3_15_TOUT221_P25_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_15_TOUT221_P25_15_OUT

IfxGtm_TOM3_15_TOUT221_P25_15_OUT.

Definition: IfxGtm_PinMap.h:2306

IfxGtm_TOM0_12_TOUT50_P22_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT50_P22_3_OUT

IfxGtm_TOM0_12_TOUT50_P22_3_OUT.

Definition: IfxGtm_PinMap.h:1655

IfxGtm_ATOM3_1_TOUT19_P00_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT19_P00_10_OUT

IfxGtm_ATOM3_1_TOUT19_P00_10_OUT.

Definition: IfxGtm_PinMap.h:519

IfxGtm_TOM3_7_TOUT161_P01_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_7_TOUT161_P01_13_OUT

IfxGtm_TOM3_7_TOUT161_P01_13_OUT.

Definition: IfxGtm_PinMap.h:2399

IfxGtm_ATOM3_5N_TOUT18_P00_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5N_TOUT18_P00_9_OUT

IfxGtm_ATOM3_5N_TOUT18_P00_9_OUT.

Definition: IfxGtm_PinMap.h:578

IfxGtm_TOM4_10_TOUT164_P01_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_10_TOUT164_P01_14_OUT

IfxGtm_TOM4_10_TOUT164_P01_14_OUT.

Definition: IfxGtm_PinMap.h:2421

IfxGtm_ATOM6_0_TOUT250_P13_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_0_TOUT250_P13_11_OUT

IfxGtm_ATOM6_0_TOUT250_P13_11_OUT.

Definition: IfxGtm_PinMap.h:874

IfxGtm_TOM2_3N_TOUT122_P11_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3N_TOUT122_P11_5_OUT

IfxGtm_TOM2_3N_TOUT122_P11_5_OUT.

Definition: IfxGtm_PinMap.h:2174

IfxGtm_ATOM0_6_TOUT106_P10_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT106_P10_4_OUT

IfxGtm_ATOM0_6_TOUT106_P10_4_OUT.

Definition: IfxGtm_PinMap.h:245

IfxGtm_ATOM0_3_TOUT38_P32_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT38_P32_2_OUT

IfxGtm_ATOM0_3_TOUT38_P32_2_OUT.

Definition: IfxGtm_PinMap.h:206

IfxGtm_TIM1_2_P00_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P00_11_IN

IfxGtm_TIM1_2_P00_11_IN.

Definition: IfxGtm_PinMap.h:1124

IfxGtm_ATOM1_4N_TOUT105_P10_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT105_P10_3_OUT

IfxGtm_ATOM1_4N_TOUT105_P10_3_OUT.

Definition: IfxGtm_PinMap.h:320

IfxGtm_TOM1_0N_TOUT25_P33_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0N_TOUT25_P33_3_OUT

IfxGtm_TOM1_0N_TOUT25_P33_3_OUT.

Definition: IfxGtm_PinMap.h:1864

IfxGtm_TOM0_3N_TOUT60_P20_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3N_TOUT60_P20_1_OUT

IfxGtm_TOM0_3N_TOUT60_P20_1_OUT.

Definition: IfxGtm_PinMap.h:1716

IfxGtm_ATOM2_5_TOUT138_P23_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT138_P23_6_OUT

IfxGtm_ATOM2_5_TOUT138_P23_6_OUT.

Definition: IfxGtm_PinMap.h:466

IfxGtm_TIM3_7_P00_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_7_P00_8_IN

IfxGtm_TIM3_7_P00_8_IN.

Definition: IfxGtm_PinMap.h:1352

IfxGtm_TIM2_4_P15_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_P15_13_IN

IfxGtm_TIM2_4_P15_13_IN.

Definition: IfxGtm_PinMap.h:1220

IfxGtm_ATOM3_6_TOUT143_P33_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT143_P33_14_OUT

IfxGtm_ATOM3_6_TOUT143_P33_14_OUT.

Definition: IfxGtm_PinMap.h:599

IfxGtm_ATOM7_0_TOUT222_P24_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_0_TOUT222_P24_0_OUT

IfxGtm_ATOM7_0_TOUT222_P24_0_OUT.

Definition: IfxGtm_PinMap.h:929

IfxGtm_TOM3_0N_TOUT161_P01_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_0N_TOUT161_P01_13_OUT

IfxGtm_TOM3_0N_TOUT161_P01_13_OUT.

Definition: IfxGtm_PinMap.h:2264

IfxGtm_TOM1_7N_TOUT20_P00_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7N_TOUT20_P00_11_OUT

IfxGtm_TOM1_7N_TOUT20_P00_11_OUT.

Definition: IfxGtm_PinMap.h:2052

IfxGtm_TOM2_4N_TOUT89_P14_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4N_TOUT89_P14_9_OUT

IfxGtm_TOM2_4N_TOUT89_P14_9_OUT.

Definition: IfxGtm_PinMap.h:2196

IfxGtm_ATOM5_1N_TOUT158_P01_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_1N_TOUT158_P01_12_OUT

IfxGtm_ATOM5_1N_TOUT158_P01_12_OUT.

Definition: IfxGtm_PinMap.h:750

IfxGtm_TOM2_6_TOUT100_P11_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6_TOUT100_P11_11_OUT

IfxGtm_TOM2_6_TOUT100_P11_11_OUT.

Definition: IfxGtm_PinMap.h:2229

IfxGtm_TIM5_6_P01_15_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P01_15_IN

IfxGtm_TIM5_6_P01_15_IN.

Definition: IfxGtm_PinMap.h:1531

IfxGtm_TIM3_2_P14_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P14_8_IN

IfxGtm_TIM3_2_P14_8_IN.

Definition: IfxGtm_PinMap.h:1294

IfxGtm_ATOM5_3N_TOUT247_P15_15_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT247_P15_15_OUT

IfxGtm_ATOM5_3N_TOUT247_P15_15_OUT.

Definition: IfxGtm_PinMap.h:795

IfxGtm_TIM0_7_P20_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_P20_8_IN

IfxGtm_TIM0_7_P20_8_IN.

Definition: IfxGtm_PinMap.h:1101

IfxGtm_TOM0_5N_TOUT32_P33_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT32_P33_10_OUT

IfxGtm_TOM0_5N_TOUT32_P33_10_OUT.

Definition: IfxGtm_PinMap.h:1766

IfxGtm_TIM1_0_P02_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_P02_0_IN

IfxGtm_TIM1_0_P02_0_IN.

Definition: IfxGtm_PinMap.h:1106

IfxGtm_TIM2_5_P00_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P00_6_IN

IfxGtm_TIM2_5_P00_6_IN.

Definition: IfxGtm_PinMap.h:1226

IfxGtm_ATOM7_1_TOUT242_P15_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT242_P15_10_OUT

IfxGtm_ATOM7_1_TOUT242_P15_10_OUT.

Definition: IfxGtm_PinMap.h:936

IfxGtm_TOM1_2N_TOUT23_P33_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2N_TOUT23_P33_1_OUT

IfxGtm_TOM1_2N_TOUT23_P33_1_OUT.

Definition: IfxGtm_PinMap.h:1927

IfxGtm_TOM1_4N_TOUT10_P00_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT10_P00_1_OUT

IfxGtm_TOM1_4N_TOUT10_P00_1_OUT.

Definition: IfxGtm_PinMap.h:1958

IfxGtm_TOM2_4_TOUT102_P10_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT102_P10_0_OUT

IfxGtm_TOM2_4_TOUT102_P10_0_OUT.

Definition: IfxGtm_PinMap.h:2198

IfxGtm_TOM1_5_TOUT55_P21_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT55_P21_4_OUT

IfxGtm_TOM1_5_TOUT55_P21_4_OUT.

Definition: IfxGtm_PinMap.h:2010

IfxGtm_TOM3_5_TOUT211_P25_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_5_TOUT211_P25_5_OUT

IfxGtm_TOM3_5_TOUT211_P25_5_OUT.

Definition: IfxGtm_PinMap.h:2376

IfxGtm_TOM0_0_TOUT53_P21_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT53_P21_2_OUT

IfxGtm_TOM0_0_TOUT53_P21_2_OUT.

Definition: IfxGtm_PinMap.h:1637

IfxGtm_TIM2_5_P15_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_P15_14_IN

IfxGtm_TIM2_5_P15_14_IN.

Definition: IfxGtm_PinMap.h:1232

IfxGtm_TIM0_0_P21_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_P21_2_IN

IfxGtm_TIM0_0_P21_2_IN.

Definition: IfxGtm_PinMap.h:1034

IfxGtm_ATOM1_3_TOUT60_P20_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT60_P20_1_OUT

IfxGtm_ATOM1_3_TOUT60_P20_1_OUT.

Definition: IfxGtm_PinMap.h:318

IfxGtm_ATOM6_5_TOUT159_P01_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_5_TOUT159_P01_1_OUT

IfxGtm_ATOM6_5_TOUT159_P01_1_OUT.

Definition: IfxGtm_PinMap.h:908

IfxGtm_TOM1_4N_TOUT29_P33_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT29_P33_7_OUT

IfxGtm_TOM1_4N_TOUT29_P33_7_OUT.

Definition: IfxGtm_PinMap.h:1965

IfxGtm_ATOM4_1_TOUT78_P15_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1_TOUT78_P15_7_OUT

IfxGtm_ATOM4_1_TOUT78_P15_7_OUT.

Definition: IfxGtm_PinMap.h:638

IfxGtm_TOM1_0N_TOUT7_P02_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0N_TOUT7_P02_7_OUT

IfxGtm_TOM1_0N_TOUT7_P02_7_OUT.

Definition: IfxGtm_PinMap.h:1867

IfxGtm_TOM2_5N_TOUT107_P10_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5N_TOUT107_P10_5_OUT

IfxGtm_TOM2_5N_TOUT107_P10_5_OUT.

Definition: IfxGtm_PinMap.h:2207

IfxGtm_TIM1_2_P10_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_P10_5_IN

IfxGtm_TIM1_2_P10_5_IN.

Definition: IfxGtm_PinMap.h:1127

IfxGtm_TOM3_6N_TOUT175_P31_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_6N_TOUT175_P31_1_OUT

IfxGtm_TOM3_6N_TOUT175_P31_1_OUT.

Definition: IfxGtm_PinMap.h:2381

IfxGtm_ATOM0_1N_TOUT39_P32_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT39_P32_3_OUT

IfxGtm_ATOM0_1N_TOUT39_P32_3_OUT.

Definition: IfxGtm_PinMap.h:162

IfxGtm_TIM5_6_P24_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P24_14_IN

IfxGtm_TIM5_6_P24_14_IN.

Definition: IfxGtm_PinMap.h:1536

IfxGtm_ATOM1_3_TOUT13_P00_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT13_P00_4_OUT

IfxGtm_ATOM1_3_TOUT13_P00_4_OUT.

Definition: IfxGtm_PinMap.h:315

IfxGtm_ATOM2_7_TOUT101_P11_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT101_P11_12_OUT

IfxGtm_ATOM2_7_TOUT101_P11_12_OUT.

Definition: IfxGtm_PinMap.h:488

IfxGtm_TIM4_0_P30_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_0_P30_0_IN

IfxGtm_TIM4_0_P30_0_IN.

Definition: IfxGtm_PinMap.h:1376

IfxGtm_TIM3_3_P33_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P33_3_IN

IfxGtm_TIM3_3_P33_3_IN.

Definition: IfxGtm_PinMap.h:1312

IfxGtm_ToutSel_g

Definition: IfxGtm_PinMap.h:91

IfxGtm_TOM2_13_TOUT110_P10_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_13_TOUT110_P10_8_OUT

IfxGtm_TOM2_13_TOUT110_P10_8_OUT.

Definition: IfxGtm_PinMap.h:2122

IfxGtm_TIM6_3_P30_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P30_11_IN

IfxGtm_TIM6_3_P30_11_IN.

Definition: IfxGtm_PinMap.h:1586

IfxGtm_TIM4_1_P12_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P12_1_IN

IfxGtm_TIM4_1_P12_1_IN.

Definition: IfxGtm_PinMap.h:1384

IfxGtm_TOM3_5N_TOUT206_P25_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_5N_TOUT206_P25_0_OUT

IfxGtm_TOM3_5N_TOUT206_P25_0_OUT.

Definition: IfxGtm_PinMap.h:2370

IfxGtm_TOM0_12_TOUT4_P02_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT4_P02_4_OUT

IfxGtm_TOM0_12_TOUT4_P02_4_OUT.

Definition: IfxGtm_PinMap.h:1654

IfxGtm_TOM0_2_TOUT107_P10_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT107_P10_5_OUT

IfxGtm_TOM0_2_TOUT107_P10_5_OUT.

Definition: IfxGtm_PinMap.h:1700

IfxGtm_TOM2_7_TOUT93_P13_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_7_TOUT93_P13_2_OUT

IfxGtm_TOM2_7_TOUT93_P13_2_OUT.

Definition: IfxGtm_PinMap.h:2251

IfxGtm_TIM2_7_P20_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_P20_7_IN

IfxGtm_TIM2_7_P20_7_IN.

Definition: IfxGtm_PinMap.h:1258

IfxGtm_TOM0_6N_TOUT99_P11_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT99_P11_10_OUT

IfxGtm_TOM0_6N_TOUT99_P11_10_OUT.

Definition: IfxGtm_PinMap.h:1806

IfxGtm_TOM4_11_TOUT261_P14_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_11_TOUT261_P14_12_OUT

IfxGtm_TOM4_11_TOUT261_P14_12_OUT.

Definition: IfxGtm_PinMap.h:2430

IfxGtm_TOM4_7_TOUT229_P24_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_7_TOUT229_P24_7_OUT

IfxGtm_TOM4_7_TOUT229_P24_7_OUT.

Definition: IfxGtm_PinMap.h:2485

IfxGtm_TOM3_1_TOUT111_P01_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_1_TOUT111_P01_3_OUT

IfxGtm_TOM3_1_TOUT111_P01_3_OUT.

Definition: IfxGtm_PinMap.h:2314

IfxGtm_TIM3_3_P22_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_3_P22_7_IN

IfxGtm_TIM3_3_P22_7_IN.

Definition: IfxGtm_PinMap.h:1309

IfxGtm_ATOM1_5_TOUT40_P32_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT40_P32_4_OUT

IfxGtm_ATOM1_5_TOUT40_P32_4_OUT.

Definition: IfxGtm_PinMap.h:350

IfxGtm_ATOM8_6_TOUT204_P30_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_6_TOUT204_P30_14_OUT

IfxGtm_ATOM8_6_TOUT204_P30_14_OUT.

Definition: IfxGtm_PinMap.h:1013

IfxGtm_TOM0_7N_TOUT28_P33_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT28_P33_6_OUT

IfxGtm_TOM0_7N_TOUT28_P33_6_OUT.

Definition: IfxGtm_PinMap.h:1826

IfxGtm_ATOM3_4N_TOUT29_P33_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4N_TOUT29_P33_7_OUT

IfxGtm_ATOM3_4N_TOUT29_P33_7_OUT.

Definition: IfxGtm_PinMap.h:563

IfxGtm_TOM2_11_TOUT108_P10_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_11_TOUT108_P10_6_OUT

IfxGtm_TOM2_11_TOUT108_P10_6_OUT.

Definition: IfxGtm_PinMap.h:2112

IfxGtm_ATOM0_7N_TOUT150_P34_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7N_TOUT150_P34_5_OUT

IfxGtm_ATOM0_7N_TOUT150_P34_5_OUT.

Definition: IfxGtm_PinMap.h:253

IfxGtm_TOM0_7N_TOUT123_P11_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7N_TOUT123_P11_7_OUT

IfxGtm_TOM0_7N_TOUT123_P11_7_OUT.

Definition: IfxGtm_PinMap.h:1822

IfxGtm_ATOM3_5N_TOUT120_P11_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5N_TOUT120_P11_1_OUT

IfxGtm_ATOM3_5N_TOUT120_P11_1_OUT.

Definition: IfxGtm_PinMap.h:576

IfxGtm_cfg.h

GTM on-chip implementation data.

IfxGtm_TOM1_15_TOUT37_P32_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT37_P32_1_OUT

IfxGtm_TOM1_15_TOUT37_P32_1_OUT.

Definition: IfxGtm_PinMap.h:1903

IfxGtm_ATOM1_4N_TOUT13_P00_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4N_TOUT13_P00_4_OUT

IfxGtm_ATOM1_4N_TOUT13_P00_4_OUT.

Definition: IfxGtm_PinMap.h:324

IfxGtm_ATOM2_4N_TOUT86_P14_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4N_TOUT86_P14_6_OUT

IfxGtm_ATOM2_4N_TOUT86_P14_6_OUT.

Definition: IfxGtm_PinMap.h:452

IfxGtm_ATOM2_2N_TOUT92_P13_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2N_TOUT92_P13_1_OUT

IfxGtm_ATOM2_2N_TOUT92_P13_1_OUT.

Definition: IfxGtm_PinMap.h:424

IfxGtm_TOM1_6N_TOUT11_P00_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6N_TOUT11_P00_2_OUT

IfxGtm_TOM1_6N_TOUT11_P00_2_OUT.

Definition: IfxGtm_PinMap.h:2017

IfxGtm_ATOM0_3N_TOUT6_P02_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT6_P02_6_OUT

IfxGtm_ATOM0_3N_TOUT6_P02_6_OUT.

Definition: IfxGtm_PinMap.h:203

IfxGtm_TOM0_8_TOUT9_P00_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT9_P00_0_OUT

IfxGtm_TOM0_8_TOUT9_P00_0_OUT.

Definition: IfxGtm_PinMap.h:1857

IfxGtm_TOM0_5N_TOUT28_P33_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5N_TOUT28_P33_6_OUT

IfxGtm_TOM0_5N_TOUT28_P33_6_OUT.

Definition: IfxGtm_PinMap.h:1765

IfxGtm_ATOM3_6N_TOUT137_P22_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6N_TOUT137_P22_11_OUT

IfxGtm_ATOM3_6N_TOUT137_P22_11_OUT.

Definition: IfxGtm_PinMap.h:591

IfxGtm_TOM2_4_TOUT57_P21_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_4_TOUT57_P21_6_OUT

IfxGtm_TOM2_4_TOUT57_P21_6_OUT.

Definition: IfxGtm_PinMap.h:2203

IfxGtm_TOM1_3_TOUT38_P32_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT38_P32_2_OUT

IfxGtm_TOM1_3_TOUT38_P32_2_OUT.

Definition: IfxGtm_PinMap.h:1954

IfxGtm_TOM0_0N_TOUT9_P00_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT9_P00_0_OUT

IfxGtm_TOM0_0N_TOUT9_P00_0_OUT.

Definition: IfxGtm_PinMap.h:1630

IfxGtm_TOM2_5_TOUT255_P13_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_5_TOUT255_P13_6_OUT

IfxGtm_TOM2_5_TOUT255_P13_6_OUT.

Definition: IfxGtm_PinMap.h:2217

IfxGtm_TOM1_4N_TOUT21_P00_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT21_P00_12_OUT

IfxGtm_TOM1_4N_TOUT21_P00_12_OUT.

Definition: IfxGtm_PinMap.h:1963

IfxGtm_TIM5_6_P32_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_6_P32_6_IN

IfxGtm_TIM5_6_P32_6_IN.

Definition: IfxGtm_PinMap.h:1539

IfxGtm_ATOM0_3N_TOUT66_P20_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3N_TOUT66_P20_10_OUT

IfxGtm_ATOM0_3N_TOUT66_P20_10_OUT.

Definition: IfxGtm_PinMap.h:202

IfxGtm_ATOM7_1_TOUT191_P30_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_1_TOUT191_P30_1_OUT

IfxGtm_ATOM7_1_TOUT191_P30_1_OUT.

Definition: IfxGtm_PinMap.h:934

IfxGtm_ATOM8_2_TOUT164_P01_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_2_TOUT164_P01_14_OUT

IfxGtm_ATOM8_2_TOUT164_P01_14_OUT.

Definition: IfxGtm_PinMap.h:990

IfxGtm_ATOM3_6_TOUT62_P20_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT62_P20_6_OUT

IfxGtm_ATOM3_6_TOUT62_P20_6_OUT.

Definition: IfxGtm_PinMap.h:602

IfxGtm_TOM2_2N_TOUT255_P13_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2N_TOUT255_P13_6_OUT

IfxGtm_TOM2_2N_TOUT255_P13_6_OUT.

Definition: IfxGtm_PinMap.h:2157

IfxGtm_ATOM4_4N_TOUT21_P00_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_4N_TOUT21_P00_12_OUT

IfxGtm_ATOM4_4N_TOUT21_P00_12_OUT.

Definition: IfxGtm_PinMap.h:674

IfxGtm_ATOM5_3N_TOUT180_P31_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT180_P31_6_OUT

IfxGtm_ATOM5_3N_TOUT180_P31_6_OUT.

Definition: IfxGtm_PinMap.h:792

IfxGtm_TOM0_7_TOUT45_P23_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT45_P23_4_OUT

IfxGtm_TOM0_7_TOUT45_P23_4_OUT.

Definition: IfxGtm_PinMap.h:1843

IfxGtm_ATOM4_2N_TOUT65_P20_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_2N_TOUT65_P20_9_OUT

IfxGtm_ATOM4_2N_TOUT65_P20_9_OUT.

Definition: IfxGtm_PinMap.h:646

IfxGtm_ATOM4_1N_TOUT57_P21_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_1N_TOUT57_P21_6_OUT

IfxGtm_ATOM4_1N_TOUT57_P21_6_OUT.

Definition: IfxGtm_PinMap.h:629

IfxGtm_ATOM5_2_TOUT148_P34_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_2_TOUT148_P34_3_OUT

IfxGtm_ATOM5_2_TOUT148_P34_3_OUT.

Definition: IfxGtm_PinMap.h:779

IfxGtm_TOM4_4_TOUT158_P01_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_4_TOUT158_P01_12_OUT

IfxGtm_TOM4_4_TOUT158_P01_12_OUT.

Definition: IfxGtm_PinMap.h:2467

IfxGtm_Tom.h

GTM basic functionality.

IfxGtm_TIM2_6_P31_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_P31_6_IN

IfxGtm_TIM2_6_P31_6_IN.

Definition: IfxGtm_PinMap.h:1248

IfxGtm_TOM0_0N_TOUT17_P00_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0N_TOUT17_P00_8_OUT

IfxGtm_TOM0_0N_TOUT17_P00_8_OUT.

Definition: IfxGtm_PinMap.h:1622

IfxGtm_TIM1_4_P32_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_P32_3_IN

IfxGtm_TIM1_4_P32_3_IN.

Definition: IfxGtm_PinMap.h:1150

IfxGtm_ATOM0_6_TOUT42_P23_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT42_P23_1_OUT

IfxGtm_ATOM0_6_TOUT42_P23_1_OUT.

Definition: IfxGtm_PinMap.h:248

IfxGtm_ATOM7_7_TOUT154_P02_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_7_TOUT154_P02_14_OUT

IfxGtm_ATOM7_7_TOUT154_P02_14_OUT.

Definition: IfxGtm_PinMap.h:974

IfxGtm_TOM0_4N_TOUT95_P11_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4N_TOUT95_P11_2_OUT

IfxGtm_TOM0_4N_TOUT95_P11_2_OUT.

Definition: IfxGtm_PinMap.h:1743

IfxGtm_TOM1_4N_TOUT54_P21_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT54_P21_3_OUT

IfxGtm_TOM1_4N_TOUT54_P21_3_OUT.

Definition: IfxGtm_PinMap.h:1967

IfxGtm_ATOM0_1N_TOUT4_P02_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1N_TOUT4_P02_4_OUT

IfxGtm_ATOM0_1N_TOUT4_P02_4_OUT.

Definition: IfxGtm_PinMap.h:164

IfxGtm_TOM0_4_TOUT90_P14_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT90_P14_10_OUT

IfxGtm_TOM0_4_TOUT90_P14_10_OUT.

Definition: IfxGtm_PinMap.h:1757

IfxGtm_TIM1_5_P32_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_P32_4_IN

IfxGtm_TIM1_5_P32_4_IN.

Definition: IfxGtm_PinMap.h:1159

IfxGtm_TOM0_1_TOUT27_P33_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT27_P33_5_OUT

IfxGtm_TOM0_1_TOUT27_P33_5_OUT.

Definition: IfxGtm_PinMap.h:1684

IfxGtm_TOM3_2_TOUT112_P01_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2_TOUT112_P01_4_OUT

IfxGtm_TOM3_2_TOUT112_P01_4_OUT.

Definition: IfxGtm_PinMap.h:2330

IfxGtm_TOM4_11_TOUT201_P30_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_11_TOUT201_P30_11_OUT

IfxGtm_TOM4_11_TOUT201_P30_11_OUT.

Definition: IfxGtm_PinMap.h:2427

IfxGtm_TOM0_6N_TOUT14_P00_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6N_TOUT14_P00_5_OUT

IfxGtm_TOM0_6N_TOUT14_P00_5_OUT.

Definition: IfxGtm_PinMap.h:1791

IfxGtm_ATOM3_0_TOUT18_P00_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT18_P00_9_OUT

IfxGtm_ATOM3_0_TOUT18_P00_9_OUT.

Definition: IfxGtm_PinMap.h:502

IfxGtm_TIM5_5_P31_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_5_P31_13_IN

IfxGtm_TIM5_5_P31_13_IN.

Definition: IfxGtm_PinMap.h:1526

IfxGtm_ATOM3_4N_TOUT57_P21_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4N_TOUT57_P21_6_OUT

IfxGtm_ATOM3_4N_TOUT57_P21_6_OUT.

Definition: IfxGtm_PinMap.h:564

IfxGtm_TOM1_4N_TOUT65_P20_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4N_TOUT65_P20_9_OUT

IfxGtm_TOM1_4N_TOUT65_P20_9_OUT.

Definition: IfxGtm_PinMap.h:1968

IfxGtm_ATOM1_1N_TOUT72_P15_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1N_TOUT72_P15_1_OUT

IfxGtm_ATOM1_1N_TOUT72_P15_1_OUT.

Definition: IfxGtm_PinMap.h:278

IfxGtm_ATOM0_0_TOUT85_P14_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT85_P14_5_OUT

IfxGtm_ATOM0_0_TOUT85_P14_5_OUT.

Definition: IfxGtm_PinMap.h:157

IfxGtm_TIM4_1_P15_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_1_P15_10_IN

IfxGtm_TIM4_1_P15_10_IN.

Definition: IfxGtm_PinMap.h:1385

IfxGtm_TIM3_2_P00_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_2_P00_7_IN

IfxGtm_TIM3_2_P00_7_IN.

Definition: IfxGtm_PinMap.h:1289

IfxGtm_TIM3_6_P02_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_6_P02_12_IN

IfxGtm_TIM3_6_P02_12_IN.

Definition: IfxGtm_PinMap.h:1339

IfxGtm_TIM6_5_P14_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_5_P14_13_IN

IfxGtm_TIM6_5_P14_13_IN.

Definition: IfxGtm_PinMap.h:1598

IfxGtm_ATOM3_2_TOUT20_P00_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT20_P00_11_OUT

IfxGtm_ATOM3_2_TOUT20_P00_11_OUT.

Definition: IfxGtm_PinMap.h:537

IfxGtm_TIM5_2_P30_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_2_P30_10_IN

IfxGtm_TIM5_2_P30_10_IN.

Definition: IfxGtm_PinMap.h:1494

IfxGtm_TOM2_11_TOUT261_P14_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_11_TOUT261_P14_12_OUT

IfxGtm_TOM2_11_TOUT261_P14_12_OUT.

Definition: IfxGtm_PinMap.h:2114

IfxGtm_ATOM0_5N_TOUT148_P34_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5N_TOUT148_P34_3_OUT

IfxGtm_ATOM0_5N_TOUT148_P34_3_OUT.

Definition: IfxGtm_PinMap.h:228

IfxGtm_ATOM8_2_TOUT259_P14_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_2_TOUT259_P14_14_OUT

IfxGtm_ATOM8_2_TOUT259_P14_14_OUT.

Definition: IfxGtm_PinMap.h:994

IfxGtm_TOM1_6_TOUT68_P20_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT68_P20_12_OUT

IfxGtm_TOM1_6_TOUT68_P20_12_OUT.

Definition: IfxGtm_PinMap.h:2042

IfxGtm_TIM6_2_P13_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_2_P13_6_IN

IfxGtm_TIM6_2_P13_6_IN.

Definition: IfxGtm_PinMap.h:1572

IfxGtm_TOM1_0_TOUT18_P00_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT18_P00_9_OUT

IfxGtm_TOM1_0_TOUT18_P00_9_OUT.

Definition: IfxGtm_PinMap.h:1869

IfxGtm_TOM2_3_TOUT62_P20_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_3_TOUT62_P20_6_OUT

IfxGtm_TOM2_3_TOUT62_P20_6_OUT.

Definition: IfxGtm_PinMap.h:2185

IfxGtm_TOM4_1_TOUT156_P01_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_1_TOUT156_P01_2_OUT

IfxGtm_TOM4_1_TOUT156_P01_2_OUT.

Definition: IfxGtm_PinMap.h:2452

IfxGtm_ATOM6_5_TOUT146_P34_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_5_TOUT146_P34_1_OUT

IfxGtm_ATOM6_5_TOUT146_P34_1_OUT.

Definition: IfxGtm_PinMap.h:907

IfxGtm_ATOM3_1N_TOUT79_P15_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1N_TOUT79_P15_8_OUT

IfxGtm_ATOM3_1N_TOUT79_P15_8_OUT.

Definition: IfxGtm_PinMap.h:513

IfxGtm_TOM2_12_TOUT262_P13_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_12_TOUT262_P13_13_OUT

IfxGtm_TOM2_12_TOUT262_P13_13_OUT.

Definition: IfxGtm_PinMap.h:2119

IfxGtm_ATOM3_7N_TOUT96_P11_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7N_TOUT96_P11_3_OUT

IfxGtm_ATOM3_7N_TOUT96_P11_3_OUT.

Definition: IfxGtm_PinMap.h:608

IfxGtm_ATOM5_4N_TOUT209_P25_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_4N_TOUT209_P25_3_OUT

IfxGtm_ATOM5_4N_TOUT209_P25_3_OUT.

Definition: IfxGtm_PinMap.h:814

IfxGtm_TIM5_0_P01_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_0_P01_8_IN

IfxGtm_TIM5_0_P01_8_IN.

Definition: IfxGtm_PinMap.h:1468

IfxGtm_ATOM5_5_TOUT269_P10_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_5_TOUT269_P10_11_OUT

IfxGtm_ATOM5_5_TOUT269_P10_11_OUT.

Definition: IfxGtm_PinMap.h:838

IfxGtm_Atom_Ch

IfxGtm_Atom_Ch

Enum for ATOM channels.

Definition: IfxGtm_cfg.h:258

IfxGtm_ATOM6_1_TOUT258_P14_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_1_TOUT258_P14_11_OUT

IfxGtm_ATOM6_1_TOUT258_P14_11_OUT.

Definition: IfxGtm_PinMap.h:882

IfxGtm_TIM6_7_P25_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_7_P25_7_IN

IfxGtm_TIM6_7_P25_7_IN.

Definition: IfxGtm_PinMap.h:1618

IfxGtm_ATOM5_0_TOUT258_P14_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT258_P14_11_OUT

IfxGtm_ATOM5_0_TOUT258_P14_11_OUT.

Definition: IfxGtm_PinMap.h:745

IfxGtm_TIM6_3_P25_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM6_3_P25_3_IN

IfxGtm_TIM6_3_P25_3_IN.

Definition: IfxGtm_PinMap.h:1585

IfxGtm_TOM2_2_TOUT50_P22_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT50_P22_3_OUT

IfxGtm_TOM2_2_TOUT50_P22_3_OUT.

Definition: IfxGtm_PinMap.h:2167

IfxGtm_ATOM8_1_TOUT231_P24_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM8_1_TOUT231_P24_9_OUT

IfxGtm_ATOM8_1_TOUT231_P24_9_OUT.

Definition: IfxGtm_PinMap.h:987

IfxGtm_TOM3_4_TOUT210_P25_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_4_TOUT210_P25_4_OUT

IfxGtm_TOM3_4_TOUT210_P25_4_OUT.

Definition: IfxGtm_PinMap.h:2364

IfxGtm_ATOM0_4_TOUT57_P21_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT57_P21_6_OUT

IfxGtm_ATOM0_4_TOUT57_P21_6_OUT.

Definition: IfxGtm_PinMap.h:223

IfxGtm_ATOM6_2_TOUT184_P31_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM6_2_TOUT184_P31_10_OUT

IfxGtm_ATOM6_2_TOUT184_P31_10_OUT.

Definition: IfxGtm_PinMap.h:887

IfxGtm_PinMap_setAtomTout

IFX_EXTERN void IfxGtm_PinMap_setAtomTout(IfxGtm_Atom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)

Definition: IfxGtm_PinMap.c:2408

IfxGtm_ATOM4_0N_TOUT87_P14_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_0N_TOUT87_P14_7_OUT

IfxGtm_ATOM4_0N_TOUT87_P14_7_OUT.

Definition: IfxGtm_PinMap.h:615

IfxGtm_ATOM0_0_TOUT8_P02_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT8_P02_8_OUT

IfxGtm_ATOM0_0_TOUT8_P02_8_OUT.

Definition: IfxGtm_PinMap.h:158

IfxGtm_ToutSel_f

Definition: IfxGtm_PinMap.h:90

IfxGtm_ATOM5_3N_TOUT212_P25_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3N_TOUT212_P25_6_OUT

IfxGtm_ATOM5_3N_TOUT212_P25_6_OUT.

Definition: IfxGtm_PinMap.h:793

IfxGtm_ATOM4_6_TOUT46_P23_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM4_6_TOUT46_P23_5_OUT

IfxGtm_ATOM4_6_TOUT46_P23_5_OUT.

Definition: IfxGtm_PinMap.h:712

IfxGtm_TOM2_10_TOUT133_P22_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_10_TOUT133_P22_7_OUT

IfxGtm_TOM2_10_TOUT133_P22_7_OUT.

Definition: IfxGtm_PinMap.h:2107

IfxGtm_TOM2_2_TOUT121_P11_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_2_TOUT121_P11_4_OUT

IfxGtm_TOM2_2_TOUT121_P11_4_OUT.

Definition: IfxGtm_PinMap.h:2163

IfxGtm_TIM4_2_P10_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_2_P10_10_IN

IfxGtm_TIM4_2_P10_10_IN.

Definition: IfxGtm_PinMap.h:1395

IfxGtm_TIM2_3_P14_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_P14_9_IN

IfxGtm_TIM2_3_P14_9_IN.

Definition: IfxGtm_PinMap.h:1209

IfxGtm_ATOM5_0_TOUT206_P25_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0_TOUT206_P25_0_OUT

IfxGtm_ATOM5_0_TOUT206_P25_0_OUT.

Definition: IfxGtm_PinMap.h:743

IfxGtm_TIM5_7_P01_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM5_7_P01_7_IN

IfxGtm_TIM5_7_P01_7_IN.

Definition: IfxGtm_PinMap.h:1544

IfxGtm_ATOM3_5_TOUT99_P11_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT99_P11_10_OUT

IfxGtm_ATOM3_5_TOUT99_P11_10_OUT.

Definition: IfxGtm_PinMap.h:590

IfxGtm_TIM3_4_P11_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM3_4_P11_9_IN

IfxGtm_TIM3_4_P11_9_IN.

Definition: IfxGtm_PinMap.h:1315

IfxPort.h

PORT basic functionality.

IfxGtm_ATOM5_0N_TOUT161_P01_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_0N_TOUT161_P01_13_OUT

IfxGtm_ATOM5_0N_TOUT161_P01_13_OUT.

Definition: IfxGtm_PinMap.h:732

IfxGtm_ATOM5_3_TOUT177_P31_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_3_TOUT177_P31_3_OUT

IfxGtm_ATOM5_3_TOUT177_P31_3_OUT.

Definition: IfxGtm_PinMap.h:804

IfxGtm_TOM4_9_TOUT199_P30_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM4_9_TOUT199_P30_9_OUT

IfxGtm_TOM4_9_TOUT199_P30_9_OUT.

Definition: IfxGtm_PinMap.h:2493

IfxGtm_TOM3_2N_TOUT136_P22_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_2N_TOUT136_P22_10_OUT

IfxGtm_TOM3_2N_TOUT136_P22_10_OUT.

Definition: IfxGtm_PinMap.h:2324

IfxGtm_ChXSel_l

Definition: IfxGtm_PinMap.h:74

IfxGtm_ToutSel_a

Definition: IfxGtm_PinMap.h:85

IfxGtm_ATOM7_3_TOUT193_P30_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM7_3_TOUT193_P30_3_OUT

IfxGtm_ATOM7_3_TOUT193_P30_3_OUT.

Definition: IfxGtm_PinMap.h:948

IfxGtm_ATOM3_3N_TOUT36_P32_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3N_TOUT36_P32_0_OUT

IfxGtm_ATOM3_3N_TOUT36_P32_0_OUT.

Definition: IfxGtm_PinMap.h:550

IfxGtm_ATOM5_7N_TOUT121_P11_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM5_7N_TOUT121_P11_4_OUT

IfxGtm_ATOM5_7N_TOUT121_P11_4_OUT.

Definition: IfxGtm_PinMap.h:855

IfxGtm_TOM3_15_TOUT189_P31_15_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM3_15_TOUT189_P31_15_OUT

IfxGtm_TOM3_15_TOUT189_P31_15_OUT.

Definition: IfxGtm_PinMap.h:2305

IfxGtm_ATOM2_3N_TOUT24_P33_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3N_TOUT24_P33_2_OUT

IfxGtm_ATOM2_3N_TOUT24_P33_2_OUT.

Definition: IfxGtm_PinMap.h:439

IfxGtm_TIM4_4_P33_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM4_4_P33_4_IN

IfxGtm_TIM4_4_P33_4_IN.

Definition: IfxGtm_PinMap.h:1430

IfxGtm_TOM2_6N_TOUT251_P13_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM2_6N_TOUT251_P13_10_OUT

IfxGtm_TOM2_6N_TOUT251_P13_10_OUT.

Definition: IfxGtm_PinMap.h:2225

IfxGtm_ATOM2_0_TOUT94_P13_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT94_P13_3_OUT

IfxGtm_ATOM2_0_TOUT94_P13_3_OUT.

Definition: IfxGtm_PinMap.h:397


iLLD_TC38A: IfxGtm_Psm.c Source File

  • Gtm
  • Std
IfxGtm_Psm.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Psm.c
3 * \brief GTM basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 *
41 */
42
43 /******************************************************************************/
44 /*----------------------------------Includes----------------------------------*/
45 /******************************************************************************/
46
47 #include "IfxGtm_Psm.h"
48
49 /******************************************************************************/
50 /*-------------------------Function Implementations---------------------------*/
51 /******************************************************************************/
52
53 void IfxGtm_Psm_Fifo_setChannelEndAddress(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, uint32 address)
54 {
55 Ifx_GTM_PSM_FIFO_CH *fifoCh = IfxGtm_Psm_Fifo_getChannelPointer(fifo, channel);
56 uint32 start_address = IfxGtm_Psm_Fifo_getChannelStartAddress(fifo, channel);
57
58 if ((address > start_address) &&
59 (address < IFXGTM_PSM_FIFORAMSIZE))
60 {
61 fifoCh->END_ADDR.B.ADDR = (uint32)address;
62 }
63 else
64 {
65 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
66 }
67 }
68
69
70 void IfxGtm_Psm_Fifo_setChannelStartAddress(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, uint32 address)
71 {
72 Ifx_GTM_PSM_FIFO_CH *fifoCh = IfxGtm_Psm_Fifo_getChannelPointer(fifo, channel);
73
74 if (address < (IFXGTM_PSM_FIFORAMSIZE - 1)) /* START address should be within 0 - 1022 */
75 {
76 fifoCh->START_ADDR.B.ADDR = (uint32)address;
77 }
78 else
79 {
80 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
81 }
82 }
83
84
85 void IfxGtm_Psm_Fifo_setChannelSize(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, uint32 size)
86 {
87 Ifx_GTM_PSM_FIFO_CH *fifoCh = IfxGtm_Psm_Fifo_getChannelPointer(fifo, channel);
88 uint32 start_address = IfxGtm_Psm_Fifo_getChannelStartAddress(fifo, channel);
89
90 if (size < ((IFXGTM_PSM_FIFORAMSIZE - start_address) + (uint32)1))
91 {
92 fifoCh->END_ADDR.B.ADDR = (uint32)(start_address + size - (uint32)1);
93 }
94 else
95 {
96 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
97 }
98 }
99
100
101 void IfxGtm_Psm_Fifo_setChannelUpperWatermark(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, uint32 upperWm)
102 {
103 Ifx_GTM_PSM_FIFO_CH *fifoCh = IfxGtm_Psm_Fifo_getChannelPointer(fifo, channel);
104 uint32 size = IfxGtm_Psm_Fifo_getChannelSize(fifo, channel);
105
106 if (upperWm < (size)) /* should be within 0 - 1023 */
107 {
108 fifoCh->UPPER_WM.B.ADDR = (uint32)upperWm;
109 }
110 else
111 {
112 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
113 }
114 }
115
116
117 void IfxGtm_Psm_Fifo_setChannelLowerWatermark(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, uint32 lowerWm)
118 {
119 Ifx_GTM_PSM_FIFO_CH *fifoCh = IfxGtm_Psm_Fifo_getChannelPointer(fifo, channel);
120 uint32 size = IfxGtm_Psm_Fifo_getChannelSize(fifo, channel);
121
122 if (lowerWm < (size)) /* should be within 0 - 1023 */
123 {
124 fifoCh->LOWER_WM.B.ADDR = (uint32)lowerWm;
125 }
126 else
127 {
128 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
129 }
130 }
131
132
133 IfxGtm_Psm_FifoChannelStatus IfxGtm_Psm_Fifo_getChannelStatus(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
134 {
135 Ifx_GTM_PSM_FIFO_CH *fifoCh = IfxGtm_Psm_Fifo_getChannelPointer(fifo, channel);
136 IfxGtm_Psm_FifoChannelStatus status = IfxGtm_Psm_FifoChannelStatus_normal;
137 uint32 status_reg = (uint32)fifoCh->STATUS.U;
138 uint8 index = 0;
139
140 while (index < (uint8)IfxGtm_Psm_FifoChannelStatus_normal)
141 {
142 if (((status_reg >> index) & (uint32)1) == (uint32)1)
143 {
144 status = (IfxGtm_Psm_FifoChannelStatus)index;
145 break;
146 }
147
148 index++;
149 }
150
151 return status;
152 }
153
154
155 void IfxGtm_Psm_Fifo_enableChannelInterrupt(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, IfxGtm_Psm_FifoChannelInterrupt interrupt)
156 {
157 Ifx_GTM_PSM_FIFO_CH *fifoCh = IfxGtm_Psm_Fifo_getChannelPointer(fifo, channel);
158 uint32 *irq_en = (uint32 *)&(fifoCh->IRQ.EN.U);
159
160 *irq_en |= ((uint32)1 << (uint32)interrupt);
161 }
162
163
164 void IfxGtm_Psm_Fifo_disableChannelInterrupt(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, IfxGtm_Psm_FifoChannelInterrupt interrupt)
165 {
166 Ifx_GTM_PSM_FIFO_CH *fifoCh = IfxGtm_Psm_Fifo_getChannelPointer(fifo, channel);
167 uint32 *irq_en = (uint32 *)&(fifoCh->IRQ.EN.U);
168
169 *irq_en ^= ((uint32)1 << (uint32)interrupt);
170 }
171
172
173 void IfxGtm_Psm_Fifo_setChannelInterrupt(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, IfxGtm_Psm_FifoChannelInterrupt interrupt)
174 {
175 Ifx_GTM_PSM_FIFO_CH *fifoCh = IfxGtm_Psm_Fifo_getChannelPointer(fifo, channel);
176 uint32 *irq_force = (uint32 *)&(fifoCh->IRQ.FORCINT.U);
177
178 *irq_force |= ((uint32)1 << (uint32)interrupt);
179 }
180
181
182 void IfxGtm_Psm_F2a_enableStream(IfxGtm_Psm_F2a f2a, IfxGtm_Psm_F2aStream f2aStream)
183 {
184 Ifx_GTM_PSM_F2A *f2aPtr = IfxGtm_Psm_F2a_getPointer(f2a);
185 uint32 *f2a_enable = (uint32 *)&(f2aPtr->ENABLE.U);
186 uint32 value = (uint32)IfxGtm_Psm_F2aStreamState_enabled << (uint32)(f2aStream * 2);
187 uint32 mask = (uint32)3 << (f2aStream * 2);
188
189 __ldmst_c((volatile void *)f2a_enable, mask, value);
190 }
191
192
193 void IfxGtm_Psm_F2a_disableStream(IfxGtm_Psm_F2a f2a, IfxGtm_Psm_F2aStream f2aStream)
194 {
195 Ifx_GTM_PSM_F2A *f2aPtr = IfxGtm_Psm_F2a_getPointer(f2a);
196 uint32 *f2a_enable = (uint32 *)&(f2aPtr->ENABLE.U);
197 uint32 value = (uint32)IfxGtm_Psm_F2aStreamState_disabled << (uint32)(f2aStream * 2);
198 uint32 mask = (uint32)3 << (f2aStream * 2);
199
200 __ldmst_c((volatile void *)f2a_enable, mask, value);
201 }
202
203
204 IfxGtm_Psm_F2aStreamState IfxGtm_Psm_F2a_getStreamState(IfxGtm_Psm_F2a f2a, IfxGtm_Psm_F2aStream f2aStream)
205 {
206 Ifx_GTM_PSM_F2A *f2aPtr = IfxGtm_Psm_F2a_getPointer(f2a);
207 uint32 f2a_enable = f2aPtr->ENABLE.U;
208
209 f2a_enable &= ((uint32)3 << (f2aStream * 2));
210
211 return (IfxGtm_Psm_F2aStreamState)(f2a_enable >> (f2aStream * 2));
212 }
IfxGtm_Psm_F2aStreamState_enabled
Stream enabled.
Definition: IfxGtm_Psm.h:96
IFXGTM_PSM_FIFORAMSIZE
#define IFXGTM_PSM_FIFORAMSIZE
FIFO RAM size is 1024 * 29 bit words.
Definition: IfxGtm_cfg.h:217
IfxGtm_Psm_Fifo_getChannelSize
IFX_INLINE uint32 IfxGtm_Psm_Fifo_getChannelSize(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
get the RAM size usage of the specified FIFO channel. Returns the value : (END_ADDRESS - START_ADDRES...
Definition: IfxGtm_Psm.h:573
IfxGtm_Psm_F2a_getPointer
IFX_INLINE Ifx_GTM_PSM_F2A * IfxGtm_Psm_F2a_getPointer(IfxGtm_Psm_F2a f2a)
get the pointer to the F2A of the specified Fifo object.
Definition: IfxGtm_Psm.h:654
IfxGtm_Psm_F2a_disableStream
void IfxGtm_Psm_F2a_disableStream(IfxGtm_Psm_F2a f2a, IfxGtm_Psm_F2aStream f2aStream)
disables the specified stream of the F2A
Definition: IfxGtm_Psm.c:193
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxGtm_Psm_FifoChannelStatus
IfxGtm_Psm_FifoChannelStatus
Enumeration listing the Fifo Channel Status. Definition in FIFO_CH_STATUS register.
Definition: IfxGtm_Psm.h:164
IfxGtm_Psm_Fifo_getChannelStatus
IfxGtm_Psm_FifoChannelStatus IfxGtm_Psm_Fifo_getChannelStatus(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
get the Status of the Fifo Channel. Returns either Full, Empty, Upper WM or Lower WM reached status...
Definition: IfxGtm_Psm.c:133
uint32
unsigned long uint32
Definition: Platform_Types.h:116
__ldmst_c
IFX_INLINE void __ldmst_c(volatile void *address, unsigned mask, unsigned value)
Definition: IfxCpu_Intrinsics.h:108
IfxGtm_Psm_Fifo_setChannelLowerWatermark
void IfxGtm_Psm_Fifo_setChannelLowerWatermark(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, uint32 lowerWm)
set the upper watermark of the specified Fifo Channel. Upper watermark must be in range: 0 < addr < (...
Definition: IfxGtm_Psm.c:117
IfxGtm_Psm_FifoChannelInterrupt
IfxGtm_Psm_FifoChannelInterrupt
Interrupts of the Fifo Channel.
Definition: IfxGtm_Psm.h:144
IfxGtm_Psm_Fifo_enableChannelInterrupt
void IfxGtm_Psm_Fifo_enableChannelInterrupt(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, IfxGtm_Psm_FifoChannelInterrupt interrupt)
enable the interrupt type
Definition: IfxGtm_Psm.c:155
IfxGtm_Psm_Fifo
IfxGtm_Psm_Fifo
Enumeration listing the Fifo Channels.
Definition: IfxGtm_cfg.h:469
IfxGtm_Psm_F2a_getStreamState
IfxGtm_Psm_F2aStreamState IfxGtm_Psm_F2a_getStreamState(IfxGtm_Psm_F2a f2a, IfxGtm_Psm_F2aStream f2aStream)
get the state of the specified fifo stream.
Definition: IfxGtm_Psm.c:204
IfxGtm_Psm_F2a
IfxGtm_Psm_F2a
Enumeration listing the F2A objects.
Definition: IfxGtm_cfg.h:461
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxGtm_Psm_F2aStreamState_disabled
Stream disabled and states reset.
Definition: IfxGtm_Psm.h:95
IfxGtm_Psm_FifoChannelStatus_normal
normal running status
Definition: IfxGtm_Psm.h:170
IfxGtm_Psm_Fifo_setChannelSize
void IfxGtm_Psm_Fifo_setChannelSize(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, uint32 size)
set the RAM size of the specified FIFO channel. The RAM size should be in range: 0 - ((IFXGTM_PSM_FIF...
Definition: IfxGtm_Psm.c:85
IfxGtm_Psm_Fifo_setChannelStartAddress
void IfxGtm_Psm_Fifo_setChannelStartAddress(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, uint32 address)
Set the logical start address for the specified Fifo Channel. The address range is 0 - (IFXGTM_PSM_FI...
Definition: IfxGtm_Psm.c:70
IfxGtm_Psm_F2aStreamState
IfxGtm_Psm_F2aStreamState
Enumeration lisitng the enabled/disabled state of the F2A channel streams.
Definition: IfxGtm_Psm.h:92
IfxGtm_Psm_Fifo_setChannelUpperWatermark
void IfxGtm_Psm_Fifo_setChannelUpperWatermark(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, uint32 upperWm)
set the upper watermark of the specified Fifo Channel. Upper watermark must be in range: 0 < addr < (...
Definition: IfxGtm_Psm.c:101
IfxGtm_Psm_Fifo_getChannelStartAddress
IFX_INLINE uint32 IfxGtm_Psm_Fifo_getChannelStartAddress(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
get the logical start address of the Fifo Channel. The address range is 0 - (IFXGTM_PSM_FIFORAMSIZE-1...
Definition: IfxGtm_Psm.h:559
IfxGtm_Psm_F2aStream
IfxGtm_Psm_F2aStream
Enumeration listing the F2A streams.
Definition: IfxGtm_Psm.h:78
IfxGtm_Psm_F2a_enableStream
void IfxGtm_Psm_F2a_enableStream(IfxGtm_Psm_F2a f2a, IfxGtm_Psm_F2aStream f2aStream)
enable the selected stream of the F2A.
Definition: IfxGtm_Psm.c:182
IfxGtm_Psm_Fifo_getChannelPointer
IFX_INLINE Ifx_GTM_PSM_FIFO_CH * IfxGtm_Psm_Fifo_getChannelPointer(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
get the Pointer to the Fifo Channel SFR
Definition: IfxGtm_Psm.h:526
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxGtm_Psm.h
GTM basic functionality.
IfxGtm_Psm_Fifo_disableChannelInterrupt
void IfxGtm_Psm_Fifo_disableChannelInterrupt(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, IfxGtm_Psm_FifoChannelInterrupt interrupt)
disable the interrupt for Fifo Channel
Definition: IfxGtm_Psm.c:164
IfxGtm_Psm_Fifo_setChannelInterrupt
void IfxGtm_Psm_Fifo_setChannelInterrupt(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, IfxGtm_Psm_FifoChannelInterrupt interrupt)
forces the Interrupt from Fifo Channel
Definition: IfxGtm_Psm.c:173
IfxGtm_Psm_Fifo_setChannelEndAddress
void IfxGtm_Psm_Fifo_setChannelEndAddress(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, uint32 address)
Set the logical end address for the specified Fifo Channel. The address range is 0 - (IFXGTM_PSM_FIFO...
Definition: IfxGtm_Psm.c:53
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxGtm_Psm_FifoChannel
IfxGtm_Psm_FifoChannel
Enumeration lisiting Fifo Channels.
Definition: IfxGtm_Psm.h:121


iLLD_TC38A: IfxGtm_Psm.h Source File

  • Gtm
  • Std
IfxGtm_Psm.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Psm.h
3 * \brief GTM basic functionality
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 * This Module provides the standard interfaces to manipulate and read PSM sub-module registers in GTM.
43 * This Module can be used to abstract the register names and addressing from higher layer software code.
44 * PSM includes:
45 * FIFO, A2F (AEI to FIFO) and F2A (FIFO to ARU) Interfaces.
46 *
47 * \defgroup IfxLld_Gtm_Std_Psm PSM
48 * \ingroup IfxLld_Gtm_Std
49 * \defgroup IfxLld_Gtm_Std_Psm_PSMDataStructures PSM Data Structures
50 * \ingroup IfxLld_Gtm_Std_Psm
51 * \defgroup IfxLld_Gtm_Std_Psm_PSMEnumerations PSM Enumerations
52 * \ingroup IfxLld_Gtm_Std_Psm
53 * \defgroup IfxLld_Gtm_Std_Psm_PSMFunctions PSM Functions
54 * \ingroup IfxLld_Gtm_Std_Psm
55 */
56
57 #ifndef IFXGTM_PSM_H
58 #define IFXGTM_PSM_H 1
59
60 /******************************************************************************/
61 /*----------------------------------Includes----------------------------------*/
62 /******************************************************************************/
63
64 #include "_Impl/IfxGtm_cfg.h"
65 #include "IfxGtm.h"
66 #include "_Impl/IfxGtm_cfg.h"
67 #include "_Utilities/Ifx_Assert.h"
68 #include "Src/Std/IfxSrc.h"
69
70 /******************************************************************************/
71 /*--------------------------------Enumerations--------------------------------*/
72 /******************************************************************************/
73
74 /** \addtogroup IfxLld_Gtm_Std_Psm_PSMEnumerations
75 * \{ */
76 /** \brief Enumeration listing the F2A streams
77 */
78 typedef enum
79 {
80 IfxGtm_Psm_F2aStream_0, /**< \brief F2A Stream 0 */
81 IfxGtm_Psm_F2aStream_1, /**< \brief F2A Stream 1 */
82 IfxGtm_Psm_F2aStream_2, /**< \brief F2A Stream 2 */
83 IfxGtm_Psm_F2aStream_3, /**< \brief F2A Stream 3 */
84 IfxGtm_Psm_F2aStream_4, /**< \brief F2A Stream 4 */
85 IfxGtm_Psm_F2aStream_5, /**< \brief F2A Stream 5 */
86 IfxGtm_Psm_F2aStream_6, /**< \brief F2A Stream 6 */
87 IfxGtm_Psm_F2aStream_7 /**< \brief F2A Stream 7 */
88 } IfxGtm_Psm_F2aStream;
89
90 /** \brief Enumeration lisitng the enabled/disabled state of the F2A channel streams.
91 */
92 typedef enum
93 {
94 IfxGtm_Psm_F2aStreamState_readDisabled = 0, /**< \brief Read as disabled. */
95 IfxGtm_Psm_F2aStreamState_disabled = 1, /**< \brief Stream disabled and states reset */
96 IfxGtm_Psm_F2aStreamState_enabled = 2, /**< \brief Stream enabled */
97 IfxGtm_Psm_F2aStreamState_readEnabled = 3 /**< \brief Read as enabled. */
98 } IfxGtm_Psm_F2aStreamState;
99
100 /** \brief Enumeration listing the transfer direction of the F2a Streams.
101 * Definition in F2A_CH_STR_CFG.B.DIR
102 */
103 typedef enum
104 {
105 IfxGtm_Psm_F2aTransferDirection_aruToFifo = 0, /**< \brief ARU to FIFO transfer */
106 IfxGtm_Psm_F2aTransferDirection_fifoToAru = 1 /**< \brief FIFO to ARU transfer */
107 } IfxGtm_Psm_F2aTransferDirection;
108
109 /** \brief Enumeration listing the Transfer Mode of the F2A.
110 * Definition in F2A_CH_STR_CFG.TMODE
111 */
112 typedef enum
113 {
114 IfxGtm_Psm_F2aTransferMode_transferLowWord = 0, /**< \brief Transfer ARU bits 23:0 from/to FIFO */
115 IfxGtm_Psm_F2aTransferMode_transferHighWord = 1, /**< \brief Transfer ARU bits 47:24 from/to FIFO */
116 IfxGtm_Psm_F2aTransferMode_transferBothWords = 2 /**< \brief Transfer Both words from/to FIFO */
117 } IfxGtm_Psm_F2aTransferMode;
118
119 /** \brief Enumeration lisiting Fifo Channels
120 */
121 typedef enum
122 {
123 IfxGtm_Psm_FifoChannel_0, /**< \brief FIFO Channel 0 */
124 IfxGtm_Psm_FifoChannel_1, /**< \brief FIFO Channel 1 */
125 IfxGtm_Psm_FifoChannel_2, /**< \brief FIFO Channel 2 */
126 IfxGtm_Psm_FifoChannel_3, /**< \brief FIFO Channel 3 */
127 IfxGtm_Psm_FifoChannel_4, /**< \brief FIFO Channel 4 */
128 IfxGtm_Psm_FifoChannel_5, /**< \brief FIFO Channel 5 */
129 IfxGtm_Psm_FifoChannel_6, /**< \brief FIFO Channel 6 */
130 IfxGtm_Psm_FifoChannel_7 /**< \brief FIFO Channel 7 */
131 } IfxGtm_Psm_FifoChannel;
132
133 /** \brief Enumeration list of the DMA direction in hysteresis modes.\n
134 * definition in FIFO_CH_IRQ_MODE.DMA_HYST_DIR
135 */
136 typedef enum
137 {
138 IfxGtm_Psm_FifoChannelDmaHystDir_read = 0, /**< \brief read direction */
139 IfxGtm_Psm_FifoChannelDmaHystDir_write = 1 /**< \brief write */
140 } IfxGtm_Psm_FifoChannelDmaHystDir;
141
142 /** \brief Interrupts of the Fifo Channel
143 */
144 typedef enum
145 {
146 IfxGtm_Psm_FifoChannelInterrupt_empty = 0, /**< \brief empty Fifo Channel */
147 IfxGtm_Psm_FifoChannelInterrupt_full = 1, /**< \brief full fifo channel */
148 IfxGtm_Psm_FifoChannelInterrupt_lowerWm = 2, /**< \brief Lower watermark reached */
149 IfxGtm_Psm_FifoChannelInterrupt_upperWm = 3 /**< \brief Upper watermark reached, */
150 } IfxGtm_Psm_FifoChannelInterrupt;
151
152 /** \brief Enumeration list for modes of FIFO operation.\n
153 * Definition in FIFO_CH_CTRL.RBM
154 */
155 typedef enum
156 {
157 IfxGtm_Psm_FifoChannelMode_normal = 0, /**< \brief normal mode of operation */
158 IfxGtm_Psm_FifoChannelMode_ringBuffer = 1 /**< \brief Ring Buffer Mode */
159 } IfxGtm_Psm_FifoChannelMode;
160
161 /** \brief Enumeration listing the Fifo Channel Status.\n
162 * Definition in FIFO_CH_STATUS register.
163 */
164 typedef enum
165 {
166 IfxGtm_Psm_FifoChannelStatus_empty = 0, /**< \brief empty */
167 IfxGtm_Psm_FifoChannelStatus_full = 1, /**< \brief full */
168 IfxGtm_Psm_FifoChannelStatus_lowerWm = 2, /**< \brief Lower Watermark reached */
169 IfxGtm_Psm_FifoChannelStatus_upperWm = 3, /**< \brief Upper Watermark reached */
170 IfxGtm_Psm_FifoChannelStatus_normal = 4 /**< \brief normal running status */
171 } IfxGtm_Psm_FifoChannelStatus;
172
173 /** \brief List of mode of interrupt
174 * Definition in FIFO_CH_IRQ_MODE.IRQ_MODE
175 */
176 typedef enum
177 {
178 IfxGtm_Psm_InterruptMode_level = 0, /**< \brief level mode */
179 IfxGtm_Psm_InterruptMode_pulse = 1, /**< \brief pulse mode */
180 IfxGtm_Psm_InterruptMode_pulseNotify = 2, /**< \brief pulse notify mode */
181 IfxGtm_Psm_InterruptMode_singlePulse = 3 /**< \brief single pulse mode */
182 } IfxGtm_Psm_InterruptMode;
183
184 /** \} */
185
186 /** \addtogroup IfxLld_Gtm_Std_Psm_PSMFunctions
187 * \{ */
188
189 /******************************************************************************/
190 /*-------------------------Inline Function Prototypes-------------------------*/
191 /******************************************************************************/
192
193 /** \brief sets the mode of operation of FIFO
194 * \param fifo Fifo Object
195 * \param channel Fifo Channel
196 * \param mode Fifo Channel mode
197 * \return None
198 */
199 IFX_INLINE void IfxGtm_Psm_Fifo_setChannelMode(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, IfxGtm_Psm_FifoChannelMode mode);
200
201 /** \brief get the Pointer to the Fifo Channel SFR
202 * \param fifo fifo object
203 * \param channel Fifo Channel
204 * \return Pointer to the FIFO channel SFR
205 */
206 IFX_INLINE Ifx_GTM_PSM_FIFO_CH *IfxGtm_Psm_Fifo_getChannelPointer(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel);
207
208 /** \brief get pointer to the FIFO object SFR block
209 * \param fifo fifo object
210 * \return Pointer to the FIFO SFR
211 */
212 IFX_INLINE Ifx_GTM_PSM_FIFO *IfxGtm_Psm_Fifo_getPointer(IfxGtm_Psm_Fifo fifo);
213
214 /** \brief Flush the contents of the specified Fifo Channel.
215 * \param fifo fifo object
216 * \param channel Fifo Channel
217 * \return None
218 */
219 IFX_INLINE void IfxGtm_Psm_Fifo_flushChannelFifo(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel);
220
221 /** \brief Unlock the direct RAM access to the FIFO specified.
222 * This control bit applies RAM write access to all channels of the specified FIFO.
223 * \param fifo fifo object
224 * \return None
225 */
226 IFX_INLINE void IfxGtm_Psm_Fifo_enableRamAccess(IfxGtm_Psm_Fifo fifo);
227
228 /** \brief Disable Direct RAM access to the specified Fifo.
229 * The setting is applicable to all channels of specified Fifo.
230 * \param fifo fifo object
231 * \return None
232 */
233 IFX_INLINE void IfxGtm_Psm_Fifo_disableRamAccess(IfxGtm_Psm_Fifo fifo);
234
235 /** \brief get the logical start address of the Fifo Channel.
236 * The address range is 0 - (IFXGTM_PSM_FIFORAMSIZE-1).
237 * \param fifo fifo object
238 * \param channel Fifo Channel
239 * \return start address of fifo channel
240 */
241 IFX_INLINE uint32 IfxGtm_Psm_Fifo_getChannelStartAddress(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel);
242
243 /** \brief get the logical end address of the Fifo Channel.
244 * The address range is 0 - (IFXGTM_PSM_FIFORAMSIZE-1).
245 * \param fifo fifo object
246 * \param channel Fifo Channel
247 * \return end address of the fifo channel
248 */
249 IFX_INLINE uint32 IfxGtm_Psm_Fifo_getChannelEndAddress(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel);
250
251 /** \brief get the RAM size usage of the specified FIFO channel.
252 * Returns the value : (END_ADDRESS - START_ADDRESS) + 1
253 * Each unit is 29 bits wide.
254 * \param fifo fifo object
255 * \param channel Fifo Channel
256 * \return size of the Fifo Channel
257 */
258 IFX_INLINE uint32 IfxGtm_Psm_Fifo_getChannelSize(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel);
259
260 /** \brief get the Fill level of the Fifo Channel specified.
261 * The Fill level is in range: 0 < Level <= ( (END_ADDRESS - START_ADDRESS) + 1 )
262 * \param fifo fifo object
263 * \param channel Fifo Channel
264 * \return Fill level of the Fifo channel
265 */
266 IFX_INLINE uint32 IfxGtm_Psm_Fifo_getChannelFillLevel(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel);
267
268 /** \brief Get the upper watermark level of the Fifo Channel.
269 * \param fifo fifo object
270 * \param channel Fifo Channel
271 * \return Upper Watermark
272 */
273 IFX_INLINE uint32 IfxGtm_Psm_Fifo_getChannelUpperWatermark(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel);
274
275 /** \brief Get the Lower watermark level of the Fifo Channel.
276 * \param fifo fifo object
277 * \param channel Fifo Channel
278 * \return Lower Watermark
279 */
280 IFX_INLINE uint32 IfxGtm_Psm_Fifo_getChannelLowerWatermark(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel);
281
282 /** \brief get the write pointer of the specified Fifo Channel
283 * \param fifo fifo object
284 * \param channel Fifo Channel
285 * \return Write Pointer
286 */
287 IFX_INLINE uint32 IfxGtm_Psm_Fifo_getChannelWritePtr(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel);
288
289 /** \brief get the read pointer of the specified Fifo Channel
290 * \param fifo fifo object
291 * \param channel Fifo Channel
292 * \return Read Pointer
293 */
294 IFX_INLINE uint32 IfxGtm_Psm_Fifo_getChannelReadPtr(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel);
295
296 /** \brief get the Status of Interrupt raised.
297 * \param fifo fifo object
298 * \param channel Fifo Channel
299 * \param interrupt interrupt type
300 * \return Interrupt Status
301 */
302 IFX_INLINE boolean IfxGtm_Psm_Fifo_getChannelInterruptStatus(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, IfxGtm_Psm_FifoChannelInterrupt interrupt);
303
304 /** \brief set the mode of interrupt
305 * \param fifo fifo object
306 * \param channel Fifo Channel
307 * \param irqmode Interrupt Mode
308 * \return None
309 */
310 IFX_INLINE void IfxGtm_Psm_Fifo_setChannelInterruptMode(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, IfxGtm_Psm_InterruptMode irqmode);
311
312 /** \brief set the mode of DMA hysteresis.
313 * \param fifo fifo object
314 * \param channel Fifo Channel
315 * \param enabled DMA hysteresis enable
316 * \param dir direction
317 * \return None
318 */
319 IFX_INLINE void IfxGtm_Psm_Fifo_setChannelDmaHystMode(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, boolean enabled, IfxGtm_Psm_FifoChannelDmaHystDir dir);
320
321 /** \brief clear the interrupt of specified type.
322 * \param fifo fifo object
323 * \param channel Fifo Channel
324 * \param interrupt interrupt type
325 * \return None
326 */
327 IFX_INLINE void IfxGtm_Psm_Fifo_clearChannelInterrupt(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, IfxGtm_Psm_FifoChannelInterrupt interrupt);
328
329 /** \brief clear all the interrupts for the Fifo Channel
330 * \param fifo fifo object
331 * \param channel Fifo Channel
332 * \return None
333 */
334 IFX_INLINE void IfxGtm_Psm_Fifo_clearAllChannelInterrupts(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel);
335
336 /** \brief get the pointer to the F2A of the specified Fifo object.
337 * \param f2a f2a object
338 * \return pointer to f2a object sfr
339 */
340 IFX_INLINE Ifx_GTM_PSM_F2A *IfxGtm_Psm_F2a_getPointer(IfxGtm_Psm_F2a f2a);
341
342 /** \brief set the ARU read address of the specified F2A stream
343 * \param f2a f2a object number
344 * \param f2aStream f2a stream number
345 * \param address ARU read address
346 * \return None
347 */
348 IFX_INLINE void IfxGtm_Psm_F2a_setAruReadAddress(IfxGtm_Psm_F2a f2a, IfxGtm_Psm_F2aStream f2aStream, uint32 address);
349
350 /** \brief set the Transfer Mode of the F2A stream.
351 * \param f2a f2a object number
352 * \param f2aStream f2a stream number
353 * \param mode transfer mode
354 * \return None
355 */
356 IFX_INLINE void IfxGtm_Psm_F2a_setTransferMode(IfxGtm_Psm_F2a f2a, IfxGtm_Psm_F2aStream f2aStream, IfxGtm_Psm_F2aTransferMode mode);
357
358 /** \brief get the Transfer mode of the specified F2A stream.
359 * \param f2a f2a object number
360 * \param f2aStream f2a stream number
361 * \return transfer mode
362 */
363 IFX_INLINE IfxGtm_Psm_F2aTransferMode IfxGtm_Psm_F2a_getTransferMode(IfxGtm_Psm_F2a f2a, IfxGtm_Psm_F2aStream f2aStream);
364
365 /** \brief set the transfer direction of the F2A stream.
366 * \param f2a f2a object number
367 * \param f2aStream f2a stream number
368 * \param dir transfer direction
369 * \return None
370 */
371 IFX_INLINE void IfxGtm_Psm_F2a_setTransferDirection(IfxGtm_Psm_F2a f2a, IfxGtm_Psm_F2aStream f2aStream, IfxGtm_Psm_F2aTransferDirection dir);
372
373 /** \brief get the transfer direction of the F2A stream.
374 * \param f2a f2a object number
375 * \param f2aStream f2a stream number
376 * \return transfer direction
377 */
378 IFX_INLINE IfxGtm_Psm_F2aTransferDirection IfxGtm_Psm_F2a_getTransferDirection(IfxGtm_Psm_F2a f2a, IfxGtm_Psm_F2aStream f2aStream);
379
380 /** \brief get the SRC pointer for the specified FIFO channel.
381 * \param fifo fifo object
382 * \param channel Fifo Channel
383 * \return SRC pointer
384 */
385 IFX_INLINE Ifx_SRC_SRCR *IfxGtm_Psm_Fifo_getChannelSrcPointer(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel);
386
387 /** \brief get the Pointer to the AFD buffer for Fifo channel.
388 * \param fifo fifo object
389 * \param channel Fifo Channel
390 * \return afd channel pointer
391 */
392 IFX_INLINE Ifx_GTM_PSM_AFD_CH *IfxGtm_Psm_Afd_getChannelPointer(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel);
393
394 /** \brief write the data into the Buffer access register of specified Fifo Channel
395 * \param fifo fifo object
396 * \param channel Fifo Channel
397 * \param data data to be written
398 * \return None
399 */
400 IFX_INLINE void IfxGtm_Psm_Afd_writeChannelBuffer(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, uint32 data);
401
402 /******************************************************************************/
403 /*-------------------------Global Function Prototypes-------------------------*/
404 /******************************************************************************/
405
406 /** \brief Set the logical end address for the specified Fifo Channel.
407 * The address range is 0 - (IFXGTM_PSM_FIFORAMSIZE - 1).
408 * END address should be in range: START address<address<IFXGTM_PSM_FIFORAMSIZE
409 *
410 * Caution: A modification of the address will flush the corresponding Fifo Channel.
411 * \param fifo fifo object
412 * \param channel Fifo Channel
413 * \param address End address of Fifo Channel
414 * \return None
415 */
416 IFX_EXTERN void IfxGtm_Psm_Fifo_setChannelEndAddress(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, uint32 address);
417
418 /** \brief Set the logical start address for the specified Fifo Channel.
419 * The address range is 0 - (IFXGTM_PSM_FIFORAMSIZE - 1).
420 * START address should be in range: 0<address<IFXGTM_PSM_FIFORAMSIZE
421 *
422 * Caution: A modification of the address will flush the corresponding Fifo Channel.
423 * \param fifo fifo object
424 * \param channel Fifo Channel
425 * \param address Start address of Fifo Channel
426 * \return None
427 */
428 IFX_EXTERN void IfxGtm_Psm_Fifo_setChannelStartAddress(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, uint32 address);
429
430 /** \brief set the RAM size of the specified FIFO channel.
431 * The RAM size should be in range: 0 - ((IFXGTM_PSM_FIFORAMSIZE - START address) + 1)
432 * Caution: This will modify the END address of the Fifo Channel RAM.
433 * This will also flush the FIFO as the END address gets modified.
434 * \param fifo fifo object
435 * \param channel Fifo Channel
436 * \param size size of Fifo Channel
437 * \return None
438 */
439 IFX_EXTERN void IfxGtm_Psm_Fifo_setChannelSize(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, uint32 size);
440
441 /** \brief set the upper watermark of the specified Fifo Channel.
442 * Upper watermark must be in range: 0 < addr < (END_ADDRESS - START_ADDRESS)
443 * \param fifo fifo object
444 * \param channel Fifo Channel
445 * \param upperWm Upper Watermark level
446 * \return None
447 */
448 IFX_EXTERN void IfxGtm_Psm_Fifo_setChannelUpperWatermark(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, uint32 upperWm);
449
450 /** \brief set the upper watermark of the specified Fifo Channel.
451 * Upper watermark must be in range: 0 < addr < (END_ADDRESS - START_ADDRESS)
452 * \param fifo fifo object
453 * \param channel Fifo Channel
454 * \param lowerWm Lower Watermark level
455 * \return None
456 */
457 IFX_EXTERN void IfxGtm_Psm_Fifo_setChannelLowerWatermark(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, uint32 lowerWm);
458
459 /** \brief get the Status of the Fifo Channel.
460 * Returns either Full, Empty, Upper WM or Lower WM reached status.
461 * If none of the above, it will return "normal" status.
462 * \param fifo fifo object
463 * \param channel Fifo Channel
464 * \return Status of the Fifo Channel
465 */
466 IFX_EXTERN IfxGtm_Psm_FifoChannelStatus IfxGtm_Psm_Fifo_getChannelStatus(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel);
467
468 /** \brief enable the interrupt type
469 * \param fifo fifo object
470 * \param channel Fifo Channel
471 * \param interrupt interrupt type
472 * \return None
473 */
474 IFX_EXTERN void IfxGtm_Psm_Fifo_enableChannelInterrupt(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, IfxGtm_Psm_FifoChannelInterrupt interrupt);
475
476 /** \brief disable the interrupt for Fifo Channel
477 * \param fifo fifo object
478 * \param channel Fifo Channel
479 * \param interrupt interrupt type
480 * \return None
481 */
482 IFX_EXTERN void IfxGtm_Psm_Fifo_disableChannelInterrupt(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, IfxGtm_Psm_FifoChannelInterrupt interrupt);
483
484 /** \brief forces the Interrupt from Fifo Channel
485 * \param fifo fifo object
486 * \param channel Fifo Channel
487 * \param interrupt interrupt type
488 * \return None
489 */
490 IFX_EXTERN void IfxGtm_Psm_Fifo_setChannelInterrupt(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, IfxGtm_Psm_FifoChannelInterrupt interrupt);
491
492 /** \brief enable the selected stream of the F2A.
493 * \param f2a f2a object number
494 * \param f2aStream f2a stream number
495 * \return None
496 */
497 IFX_EXTERN void IfxGtm_Psm_F2a_enableStream(IfxGtm_Psm_F2a f2a, IfxGtm_Psm_F2aStream f2aStream);
498
499 /** \brief disables the specified stream of the F2A
500 * \param f2a f2a object number
501 * \param f2aStream f2a stream number
502 * \return None
503 */
504 IFX_EXTERN void IfxGtm_Psm_F2a_disableStream(IfxGtm_Psm_F2a f2a, IfxGtm_Psm_F2aStream f2aStream);
505
506 /** \brief get the state of the specified fifo stream.
507 * \param f2a f2a object number
508 * \param f2aStream f2a stream number
509 * \return stream state
510 */
511 IFX_EXTERN IfxGtm_Psm_F2aStreamState IfxGtm_Psm_F2a_getStreamState(IfxGtm_Psm_F2a f2a, IfxGtm_Psm_F2aStream f2aStream);
512
513 /** \} */
514
515 /******************************************************************************/
516 /*---------------------Inline Function Implementations------------------------*/
517 /******************************************************************************/
518
519 IFX_INLINE void IfxGtm_Psm_Fifo_setChannelMode(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, IfxGtm_Psm_FifoChannelMode mode)
520 {
521 Ifx_GTM_PSM_FIFO_CH *fifoCh = IfxGtm_Psm_Fifo_getChannelPointer(fifo, channel);
522 fifoCh->CTRL.B.RBM = (uint32)mode;
523 }
524
525
526 IFX_INLINE Ifx_GTM_PSM_FIFO_CH *IfxGtm_Psm_Fifo_getChannelPointer(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
527 {
528 return (Ifx_GTM_PSM_FIFO_CH *)&(MODULE_GTM.PSM[fifo].FIFO.CH[channel]);
529 }
530
531
532 IFX_INLINE Ifx_GTM_PSM_FIFO *IfxGtm_Psm_Fifo_getPointer(IfxGtm_Psm_Fifo fifo)
533 {
534 return (Ifx_GTM_PSM_FIFO *)&(MODULE_GTM.PSM[fifo].FIFO);
535 }
536
537
538 IFX_INLINE void IfxGtm_Psm_Fifo_flushChannelFifo(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
539 {
540 Ifx_GTM_PSM_FIFO_CH *fifoCh = IfxGtm_Psm_Fifo_getChannelPointer(fifo, channel);
541 fifoCh->CTRL.B.FLUSH = (uint32)1;
542 }
543
544
545 IFX_INLINE void IfxGtm_Psm_Fifo_enableRamAccess(IfxGtm_Psm_Fifo fifo)
546 {
547 Ifx_GTM_PSM_FIFO_CH *fifoCh = IfxGtm_Psm_Fifo_getChannelPointer(fifo, (IfxGtm_Psm_FifoChannel)0);
548 fifoCh->CTRL.B.WULOCK = (uint32)1;
549 }
550
551
552 IFX_INLINE void IfxGtm_Psm_Fifo_disableRamAccess(IfxGtm_Psm_Fifo fifo)
553 {
554 Ifx_GTM_PSM_FIFO_CH *fifoCh = IfxGtm_Psm_Fifo_getChannelPointer(fifo, (IfxGtm_Psm_FifoChannel)0);
555 fifoCh->CTRL.B.WULOCK = (uint32)0;
556 }
557
558
559 IFX_INLINE uint32 IfxGtm_Psm_Fifo_getChannelStartAddress(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
560 {
561 Ifx_GTM_PSM_FIFO_CH *fifoCh = IfxGtm_Psm_Fifo_getChannelPointer(fifo, channel);
562 return (uint32)fifoCh->START_ADDR.B.ADDR;
563 }
564
565
566 IFX_INLINE uint32 IfxGtm_Psm_Fifo_getChannelEndAddress(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
567 {
568 Ifx_GTM_PSM_FIFO_CH *fifoCh = IfxGtm_Psm_Fifo_getChannelPointer(fifo, channel);
569 return (uint32)fifoCh->END_ADDR.B.ADDR;
570 }
571
572
573 IFX_INLINE uint32 IfxGtm_Psm_Fifo_getChannelSize(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
574 {
575 Ifx_GTM_PSM_FIFO_CH *fifoCh = IfxGtm_Psm_Fifo_getChannelPointer(fifo, channel);
576 return (uint32)(((uint32)fifoCh->END_ADDR.B.ADDR - (uint32)fifoCh->START_ADDR.B.ADDR) + (uint32)1);
577 }
578
579
580 IFX_INLINE uint32 IfxGtm_Psm_Fifo_getChannelFillLevel(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
581 {
582 Ifx_GTM_PSM_FIFO_CH *fifoCh = IfxGtm_Psm_Fifo_getChannelPointer(fifo, channel);
583 return (uint32)fifoCh->FILL_LEVEL.B.LEVEL;
584 }
585
586
587 IFX_INLINE uint32 IfxGtm_Psm_Fifo_getChannelUpperWatermark(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
588 {
589 Ifx_GTM_PSM_FIFO_CH *fifoCh = IfxGtm_Psm_Fifo_getChannelPointer(fifo, channel);
590 return (uint32)fifoCh->UPPER_WM.B.ADDR;
591 }
592
593
594 IFX_INLINE uint32 IfxGtm_Psm_Fifo_getChannelLowerWatermark(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
595 {
596 Ifx_GTM_PSM_FIFO_CH *fifoCh = IfxGtm_Psm_Fifo_getChannelPointer(fifo, channel);
597 return (uint32)fifoCh->LOWER_WM.B.ADDR;
598 }
599
600
601 IFX_INLINE uint32 IfxGtm_Psm_Fifo_getChannelWritePtr(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
602 {
603 Ifx_GTM_PSM_FIFO_CH *fifoCh = IfxGtm_Psm_Fifo_getChannelPointer(fifo, channel);
604
605 return (uint32)fifoCh->WR_PTR.B.ADDR;
606 }
607
608
609 IFX_INLINE uint32 IfxGtm_Psm_Fifo_getChannelReadPtr(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
610 {
611 Ifx_GTM_PSM_FIFO_CH *fifoCh = IfxGtm_Psm_Fifo_getChannelPointer(fifo, channel);
612
613 return (uint32)fifoCh->RD_PTR.B.ADDR;
614 }
615
616
617 IFX_INLINE boolean IfxGtm_Psm_Fifo_getChannelInterruptStatus(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, IfxGtm_Psm_FifoChannelInterrupt interrupt)
618 {
619 Ifx_GTM_PSM_FIFO_CH *fifoCh = IfxGtm_Psm_Fifo_getChannelPointer(fifo, channel);
620 uint32 irq_notify = (uint32)fifoCh->IRQ.NOTIFY.U;
621 return ((irq_notify >> interrupt) & (uint32)1) == (uint32)1;
622 }
623
624
625 IFX_INLINE void IfxGtm_Psm_Fifo_setChannelInterruptMode(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, IfxGtm_Psm_InterruptMode irqmode)
626 {
627 Ifx_GTM_PSM_FIFO_CH *fifoCh = IfxGtm_Psm_Fifo_getChannelPointer(fifo, channel);
628 fifoCh->IRQ.MODE.B.IRQ_MODE = irqmode;
629 }
630
631
632 IFX_INLINE void IfxGtm_Psm_Fifo_setChannelDmaHystMode(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, boolean enabled, IfxGtm_Psm_FifoChannelDmaHystDir dir)
633 {
634 Ifx_GTM_PSM_FIFO_CH *fifoCh = IfxGtm_Psm_Fifo_getChannelPointer(fifo, channel);
635 fifoCh->IRQ.MODE.B.DMA_HYSTERESIS = (uint32)enabled;
636 fifoCh->IRQ.MODE.B.DMA_HYST_DIR = (uint32)dir;
637 }
638
639
640 IFX_INLINE void IfxGtm_Psm_Fifo_clearChannelInterrupt(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, IfxGtm_Psm_FifoChannelInterrupt interrupt)
641 {
642 Ifx_GTM_PSM_FIFO_CH *fifoCh = IfxGtm_Psm_Fifo_getChannelPointer(fifo, channel);
643 fifoCh->IRQ.NOTIFY.U |= ((uint32)1 << (uint32)interrupt);
644 }
645
646
647 IFX_INLINE void IfxGtm_Psm_Fifo_clearAllChannelInterrupts(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
648 {
649 Ifx_GTM_PSM_FIFO_CH *fifoCh = IfxGtm_Psm_Fifo_getChannelPointer(fifo, channel);
650 fifoCh->IRQ.NOTIFY.U |= (uint32)0xFu;
651 }
652
653
654 IFX_INLINE Ifx_GTM_PSM_F2A *IfxGtm_Psm_F2a_getPointer(IfxGtm_Psm_F2a f2a)
655 {
656 return (Ifx_GTM_PSM_F2A *)&(MODULE_GTM.PSM[f2a].F2A);
657 }
658
659
660 IFX_INLINE void IfxGtm_Psm_F2a_setAruReadAddress(IfxGtm_Psm_F2a f2a, IfxGtm_Psm_F2aStream f2aStream, uint32 address)
661 {
662 Ifx_GTM_PSM_F2A *f2aPtr = IfxGtm_Psm_F2a_getPointer(f2a);
663
664 f2aPtr->RD_CH[f2aStream].ARU_RD_FIFO.B.ADDR = address;
665 }
666
667
668 IFX_INLINE void IfxGtm_Psm_F2a_setTransferMode(IfxGtm_Psm_F2a f2a, IfxGtm_Psm_F2aStream f2aStream, IfxGtm_Psm_F2aTransferMode mode)
669 {
670 Ifx_GTM_PSM_F2A *f2aPtr = IfxGtm_Psm_F2a_getPointer(f2a);
671
672 f2aPtr->STR_CH[f2aStream].STR_CFG.B.TMODE = (uint32)mode;
673 }
674
675
676 IFX_INLINE IfxGtm_Psm_F2aTransferMode IfxGtm_Psm_F2a_getTransferMode(IfxGtm_Psm_F2a f2a, IfxGtm_Psm_F2aStream f2aStream)
677 {
678 Ifx_GTM_PSM_F2A *f2aPtr = IfxGtm_Psm_F2a_getPointer(f2a);
679
680 return (IfxGtm_Psm_F2aTransferMode)(f2aPtr->STR_CH[f2aStream].STR_CFG.B.TMODE);
681 }
682
683
684 IFX_INLINE void IfxGtm_Psm_F2a_setTransferDirection(IfxGtm_Psm_F2a f2a, IfxGtm_Psm_F2aStream f2aStream, IfxGtm_Psm_F2aTransferDirection dir)
685 {
686 Ifx_GTM_PSM_F2A *f2aPtr = IfxGtm_Psm_F2a_getPointer(f2a);
687
688 f2aPtr->STR_CH[f2aStream].STR_CFG.B.DIR = (uint32)dir;
689 }
690
691
692 IFX_INLINE IfxGtm_Psm_F2aTransferDirection IfxGtm_Psm_F2a_getTransferDirection(IfxGtm_Psm_F2a f2a, IfxGtm_Psm_F2aStream f2aStream)
693 {
694 Ifx_GTM_PSM_F2A *f2aPtr = IfxGtm_Psm_F2a_getPointer(f2a);
695
696 return (IfxGtm_Psm_F2aTransferDirection)f2aPtr->STR_CH[f2aStream].STR_CFG.B.DIR;
697 }
698
699
700 IFX_INLINE Ifx_SRC_SRCR *IfxGtm_Psm_Fifo_getChannelSrcPointer(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
701 {
702 return (Ifx_SRC_SRCR *)&MODULE_SRC.GTM_PSM[fifo][channel];
703 }
704
705
706 IFX_INLINE Ifx_GTM_PSM_AFD_CH *IfxGtm_Psm_Afd_getChannelPointer(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
707 {
708 return (Ifx_GTM_PSM_AFD_CH *)&(MODULE_GTM.PSM[fifo].AFD.CH[channel]);
709 }
710
711
712 IFX_INLINE void IfxGtm_Psm_Afd_writeChannelBuffer(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, uint32 data)
713 {
714 Ifx_GTM_PSM_AFD_CH *AfdCh = IfxGtm_Psm_Afd_getChannelPointer(fifo, channel);
715
716 AfdCh->BUF_ACC.B.DATA = data;
717 }
718
719
720 #endif /* IFXGTM_PSM_H */
IfxGtm_Psm_F2aStreamState_enabled
Stream enabled.
Definition: IfxGtm_Psm.h:96
IfxGtm_Psm_Fifo_getChannelSize
IFX_INLINE uint32 IfxGtm_Psm_Fifo_getChannelSize(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
get the RAM size usage of the specified FIFO channel. Returns the value : (END_ADDRESS - START_ADDRES...
Definition: IfxGtm_Psm.h:573
IfxGtm_Psm_FifoChannelStatus_lowerWm
Lower Watermark reached.
Definition: IfxGtm_Psm.h:168
IfxGtm_Psm_F2a_getPointer
IFX_INLINE Ifx_GTM_PSM_F2A * IfxGtm_Psm_F2a_getPointer(IfxGtm_Psm_F2a f2a)
get the pointer to the F2A of the specified Fifo object.
Definition: IfxGtm_Psm.h:654
IfxGtm_Psm_F2a_disableStream
IFX_EXTERN void IfxGtm_Psm_F2a_disableStream(IfxGtm_Psm_F2a f2a, IfxGtm_Psm_F2aStream f2aStream)
disables the specified stream of the F2A
Definition: IfxGtm_Psm.c:193
IfxGtm_Psm_F2aTransferMode_transferHighWord
Transfer ARU bits 47:24 from/to FIFO.
Definition: IfxGtm_Psm.h:115
IfxGtm_Psm_FifoChannelMode_ringBuffer
Ring Buffer Mode.
Definition: IfxGtm_Psm.h:158
IfxGtm_Psm_FifoChannelStatus
IfxGtm_Psm_FifoChannelStatus
Enumeration listing the Fifo Channel Status. Definition in FIFO_CH_STATUS register.
Definition: IfxGtm_Psm.h:164
IfxGtm_Psm_FifoChannel_4
FIFO Channel 4.
Definition: IfxGtm_Psm.h:127
IfxGtm_Psm_F2a_getTransferDirection
IFX_INLINE IfxGtm_Psm_F2aTransferDirection IfxGtm_Psm_F2a_getTransferDirection(IfxGtm_Psm_F2a f2a, IfxGtm_Psm_F2aStream f2aStream)
get the transfer direction of the F2A stream.
Definition: IfxGtm_Psm.h:692
IfxGtm_Psm_FifoChannel_7
FIFO Channel 7.
Definition: IfxGtm_Psm.h:130
IfxGtm_Psm_InterruptMode_pulseNotify
pulse notify mode
Definition: IfxGtm_Psm.h:180
IfxGtm_Psm_FifoChannel_6
FIFO Channel 6.
Definition: IfxGtm_Psm.h:129
IfxGtm_Psm_Fifo_getChannelStatus
IFX_EXTERN IfxGtm_Psm_FifoChannelStatus IfxGtm_Psm_Fifo_getChannelStatus(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
get the Status of the Fifo Channel. Returns either Full, Empty, Upper WM or Lower WM reached status...
Definition: IfxGtm_Psm.c:133
IfxGtm_Psm_Fifo_clearAllChannelInterrupts
IFX_INLINE void IfxGtm_Psm_Fifo_clearAllChannelInterrupts(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
clear all the interrupts for the Fifo Channel
Definition: IfxGtm_Psm.h:647
IfxGtm_Psm_FifoChannel_5
FIFO Channel 5.
Definition: IfxGtm_Psm.h:128
IfxGtm_Psm_F2aStream_3
F2A Stream 3.
Definition: IfxGtm_Psm.h:83
IfxGtm_Psm_F2aTransferDirection_aruToFifo
ARU to FIFO transfer.
Definition: IfxGtm_Psm.h:105
IfxGtm_Psm_InterruptMode_singlePulse
single pulse mode
Definition: IfxGtm_Psm.h:181
IfxGtm_Psm_FifoChannelStatus_upperWm
Upper Watermark reached.
Definition: IfxGtm_Psm.h:169
IfxGtm_Psm_FifoChannelStatus_full
full
Definition: IfxGtm_Psm.h:167
IfxGtm_Psm_FifoChannel_3
FIFO Channel 3.
Definition: IfxGtm_Psm.h:126
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxGtm_Psm_FifoChannel_1
FIFO Channel 1.
Definition: IfxGtm_Psm.h:124
Ifx_Assert.h
Assert functions.
IfxGtm_Psm_Fifo_setChannelLowerWatermark
IFX_EXTERN void IfxGtm_Psm_Fifo_setChannelLowerWatermark(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, uint32 lowerWm)
set the upper watermark of the specified Fifo Channel. Upper watermark must be in range: 0 < addr < (...
Definition: IfxGtm_Psm.c:117
IfxSrc.h
SRC basic functionality.
IfxGtm_Psm_FifoChannelInterrupt
IfxGtm_Psm_FifoChannelInterrupt
Interrupts of the Fifo Channel.
Definition: IfxGtm_Psm.h:144
IfxGtm_Psm_Fifo_enableChannelInterrupt
IFX_EXTERN void IfxGtm_Psm_Fifo_enableChannelInterrupt(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, IfxGtm_Psm_FifoChannelInterrupt interrupt)
enable the interrupt type
Definition: IfxGtm_Psm.c:155
IfxGtm_Psm_F2a_setTransferMode
IFX_INLINE void IfxGtm_Psm_F2a_setTransferMode(IfxGtm_Psm_F2a f2a, IfxGtm_Psm_F2aStream f2aStream, IfxGtm_Psm_F2aTransferMode mode)
set the Transfer Mode of the F2A stream.
Definition: IfxGtm_Psm.h:668
IfxGtm_Psm_Fifo
IfxGtm_Psm_Fifo
Enumeration listing the Fifo Channels.
Definition: IfxGtm_cfg.h:469
IfxGtm_Psm_Fifo_setChannelDmaHystMode
IFX_INLINE void IfxGtm_Psm_Fifo_setChannelDmaHystMode(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, boolean enabled, IfxGtm_Psm_FifoChannelDmaHystDir dir)
set the mode of DMA hysteresis.
Definition: IfxGtm_Psm.h:632
IfxGtm_Psm_Fifo_getChannelSrcPointer
IFX_INLINE Ifx_SRC_SRCR * IfxGtm_Psm_Fifo_getChannelSrcPointer(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
get the SRC pointer for the specified FIFO channel.
Definition: IfxGtm_Psm.h:700
IfxGtm_Psm_F2a_setTransferDirection
IFX_INLINE void IfxGtm_Psm_F2a_setTransferDirection(IfxGtm_Psm_F2a f2a, IfxGtm_Psm_F2aStream f2aStream, IfxGtm_Psm_F2aTransferDirection dir)
set the transfer direction of the F2A stream.
Definition: IfxGtm_Psm.h:684
IfxGtm_Psm_F2aTransferDirection
IfxGtm_Psm_F2aTransferDirection
Enumeration listing the transfer direction of the F2a Streams. Definition in F2A_CH_STR_CFG.B.DIR.
Definition: IfxGtm_Psm.h:103
IfxGtm_Psm_F2a_getStreamState
IFX_EXTERN IfxGtm_Psm_F2aStreamState IfxGtm_Psm_F2a_getStreamState(IfxGtm_Psm_F2a f2a, IfxGtm_Psm_F2aStream f2aStream)
get the state of the specified fifo stream.
Definition: IfxGtm_Psm.c:204
IfxGtm_Psm_F2a
IfxGtm_Psm_F2a
Enumeration listing the F2A objects.
Definition: IfxGtm_cfg.h:461
IfxGtm_Psm_InterruptMode
IfxGtm_Psm_InterruptMode
List of mode of interrupt Definition in FIFO_CH_IRQ_MODE.IRQ_MODE.
Definition: IfxGtm_Psm.h:176
IfxGtm_Psm_Fifo_flushChannelFifo
IFX_INLINE void IfxGtm_Psm_Fifo_flushChannelFifo(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
Flush the contents of the specified Fifo Channel.
Definition: IfxGtm_Psm.h:538
IfxGtm_Psm_F2aStreamState_readEnabled
Read as enabled.
Definition: IfxGtm_Psm.h:97
IfxGtm_Psm_F2aStream_0
F2A Stream 0.
Definition: IfxGtm_Psm.h:80
IfxGtm_Psm_F2aStream_6
F2A Stream 6.
Definition: IfxGtm_Psm.h:86
IfxGtm_Psm_F2aStreamState_disabled
Stream disabled and states reset.
Definition: IfxGtm_Psm.h:95
IfxGtm_Psm_Fifo_getChannelReadPtr
IFX_INLINE uint32 IfxGtm_Psm_Fifo_getChannelReadPtr(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
get the read pointer of the specified Fifo Channel
Definition: IfxGtm_Psm.h:609
IfxGtm_Psm_Fifo_getChannelEndAddress
IFX_INLINE uint32 IfxGtm_Psm_Fifo_getChannelEndAddress(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
get the logical end address of the Fifo Channel. The address range is 0 - (IFXGTM_PSM_FIFORAMSIZE-1)...
Definition: IfxGtm_Psm.h:566
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxGtm_Psm_FifoChannelMode
IfxGtm_Psm_FifoChannelMode
Enumeration list for modes of FIFO operation. Definition in FIFO_CH_CTRL.RBM.
Definition: IfxGtm_Psm.h:155
IfxGtm_Psm_FifoChannelDmaHystDir_read
read direction
Definition: IfxGtm_Psm.h:138
IfxGtm_Psm_FifoChannelStatus_normal
normal running status
Definition: IfxGtm_Psm.h:170
IfxGtm_Psm_F2aTransferMode
IfxGtm_Psm_F2aTransferMode
Enumeration listing the Transfer Mode of the F2A. Definition in F2A_CH_STR_CFG.TMODE.
Definition: IfxGtm_Psm.h:112
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxGtm_Psm_FifoChannelDmaHystDir_write
write
Definition: IfxGtm_Psm.h:139
IfxGtm_Psm_Fifo_setChannelSize
IFX_EXTERN void IfxGtm_Psm_Fifo_setChannelSize(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, uint32 size)
set the RAM size of the specified FIFO channel. The RAM size should be in range: 0 - ((IFXGTM_PSM_FIF...
Definition: IfxGtm_Psm.c:85
IfxGtm_Psm_F2a_setAruReadAddress
IFX_INLINE void IfxGtm_Psm_F2a_setAruReadAddress(IfxGtm_Psm_F2a f2a, IfxGtm_Psm_F2aStream f2aStream, uint32 address)
set the ARU read address of the specified F2A stream
Definition: IfxGtm_Psm.h:660
IfxGtm_Psm_F2aStreamState_readDisabled
Read as disabled.
Definition: IfxGtm_Psm.h:94
IfxGtm_Psm_F2aTransferMode_transferBothWords
Transfer Both words from/to FIFO.
Definition: IfxGtm_Psm.h:116
IfxGtm_Psm_FifoChannelDmaHystDir
IfxGtm_Psm_FifoChannelDmaHystDir
Enumeration list of the DMA direction in hysteresis modes. definition in FIFO_CH_IRQ_MODE.DMA_HYST_DIR.
Definition: IfxGtm_Psm.h:136
IfxGtm_Psm_Fifo_setChannelStartAddress
IFX_EXTERN void IfxGtm_Psm_Fifo_setChannelStartAddress(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, uint32 address)
Set the logical start address for the specified Fifo Channel. The address range is 0 - (IFXGTM_PSM_FI...
Definition: IfxGtm_Psm.c:70
IfxGtm_Psm_Fifo_getChannelUpperWatermark
IFX_INLINE uint32 IfxGtm_Psm_Fifo_getChannelUpperWatermark(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
Get the upper watermark level of the Fifo Channel.
Definition: IfxGtm_Psm.h:587
IfxGtm_Psm_F2aStreamState
IfxGtm_Psm_F2aStreamState
Enumeration lisitng the enabled/disabled state of the F2A channel streams.
Definition: IfxGtm_Psm.h:92
IfxGtm_Psm_Fifo_setChannelUpperWatermark
IFX_EXTERN void IfxGtm_Psm_Fifo_setChannelUpperWatermark(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, uint32 upperWm)
set the upper watermark of the specified Fifo Channel. Upper watermark must be in range: 0 < addr < (...
Definition: IfxGtm_Psm.c:101
IfxGtm_Psm_Afd_getChannelPointer
IFX_INLINE Ifx_GTM_PSM_AFD_CH * IfxGtm_Psm_Afd_getChannelPointer(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
get the Pointer to the AFD buffer for Fifo channel.
Definition: IfxGtm_Psm.h:706
IfxGtm_Psm_F2aStream_4
F2A Stream 4.
Definition: IfxGtm_Psm.h:84
IfxGtm_Psm_FifoChannel_2
FIFO Channel 2.
Definition: IfxGtm_Psm.h:125
IfxGtm_Psm_Fifo_setChannelMode
IFX_INLINE void IfxGtm_Psm_Fifo_setChannelMode(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, IfxGtm_Psm_FifoChannelMode mode)
sets the mode of operation of FIFO
Definition: IfxGtm_Psm.h:519
IfxGtm_Psm_F2aStream_5
F2A Stream 5.
Definition: IfxGtm_Psm.h:85
IfxGtm_Psm_F2aTransferDirection_fifoToAru
FIFO to ARU transfer.
Definition: IfxGtm_Psm.h:106
IfxGtm_Psm_FifoChannelInterrupt_empty
empty Fifo Channel
Definition: IfxGtm_Psm.h:146
IfxGtm_Psm_Fifo_disableRamAccess
IFX_INLINE void IfxGtm_Psm_Fifo_disableRamAccess(IfxGtm_Psm_Fifo fifo)
Disable Direct RAM access to the specified Fifo. The setting is applicable to all channels of specifi...
Definition: IfxGtm_Psm.h:552
IfxGtm_Psm_Fifo_getChannelStartAddress
IFX_INLINE uint32 IfxGtm_Psm_Fifo_getChannelStartAddress(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
get the logical start address of the Fifo Channel. The address range is 0 - (IFXGTM_PSM_FIFORAMSIZE-1...
Definition: IfxGtm_Psm.h:559
IfxGtm_Psm_F2aStream
IfxGtm_Psm_F2aStream
Enumeration listing the F2A streams.
Definition: IfxGtm_Psm.h:78
IfxGtm_Psm_Fifo_enableRamAccess
IFX_INLINE void IfxGtm_Psm_Fifo_enableRamAccess(IfxGtm_Psm_Fifo fifo)
Unlock the direct RAM access to the FIFO specified. This control bit applies RAM write access to all ...
Definition: IfxGtm_Psm.h:545
IfxGtm_Psm_FifoChannelStatus_empty
empty
Definition: IfxGtm_Psm.h:166
IfxGtm_Psm_Fifo_getChannelFillLevel
IFX_INLINE uint32 IfxGtm_Psm_Fifo_getChannelFillLevel(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
get the Fill level of the Fifo Channel specified. The Fill level is in range: 0 < Level <= ( (END_ADD...
Definition: IfxGtm_Psm.h:580
IfxGtm_Psm_InterruptMode_pulse
pulse mode
Definition: IfxGtm_Psm.h:179
IfxGtm_Psm_Fifo_setChannelInterruptMode
IFX_INLINE void IfxGtm_Psm_Fifo_setChannelInterruptMode(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, IfxGtm_Psm_InterruptMode irqmode)
set the mode of interrupt
Definition: IfxGtm_Psm.h:625
IfxGtm_Psm_Fifo_getChannelWritePtr
IFX_INLINE uint32 IfxGtm_Psm_Fifo_getChannelWritePtr(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
get the write pointer of the specified Fifo Channel
Definition: IfxGtm_Psm.h:601
IfxGtm_Psm_Fifo_getPointer
IFX_INLINE Ifx_GTM_PSM_FIFO * IfxGtm_Psm_Fifo_getPointer(IfxGtm_Psm_Fifo fifo)
get pointer to the FIFO object SFR block
Definition: IfxGtm_Psm.h:532
IfxGtm_Psm_Fifo_getChannelLowerWatermark
IFX_INLINE uint32 IfxGtm_Psm_Fifo_getChannelLowerWatermark(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
Get the Lower watermark level of the Fifo Channel.
Definition: IfxGtm_Psm.h:594
IfxGtm_Psm_F2aStream_2
F2A Stream 2.
Definition: IfxGtm_Psm.h:82
IfxGtm_Psm_Afd_writeChannelBuffer
IFX_INLINE void IfxGtm_Psm_Afd_writeChannelBuffer(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, uint32 data)
write the data into the Buffer access register of specified Fifo Channel
Definition: IfxGtm_Psm.h:712
IfxGtm_Psm_F2a_enableStream
IFX_EXTERN void IfxGtm_Psm_F2a_enableStream(IfxGtm_Psm_F2a f2a, IfxGtm_Psm_F2aStream f2aStream)
enable the selected stream of the F2A.
Definition: IfxGtm_Psm.c:182
IfxGtm_Psm_FifoChannelMode_normal
normal mode of operation
Definition: IfxGtm_Psm.h:157
IfxGtm_Psm_Fifo_getChannelPointer
IFX_INLINE Ifx_GTM_PSM_FIFO_CH * IfxGtm_Psm_Fifo_getChannelPointer(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel)
get the Pointer to the Fifo Channel SFR
Definition: IfxGtm_Psm.h:526
IfxGtm_Psm_Fifo_getChannelInterruptStatus
IFX_INLINE boolean IfxGtm_Psm_Fifo_getChannelInterruptStatus(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, IfxGtm_Psm_FifoChannelInterrupt interrupt)
get the Status of Interrupt raised.
Definition: IfxGtm_Psm.h:617
IfxGtm_Psm_F2aStream_1
F2A Stream 1.
Definition: IfxGtm_Psm.h:81
IfxGtm_Psm_FifoChannelInterrupt_upperWm
Upper watermark reached,.
Definition: IfxGtm_Psm.h:149
IfxGtm_Psm_FifoChannelInterrupt_full
full fifo channel
Definition: IfxGtm_Psm.h:147
IfxGtm_Psm_Fifo_disableChannelInterrupt
IFX_EXTERN void IfxGtm_Psm_Fifo_disableChannelInterrupt(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, IfxGtm_Psm_FifoChannelInterrupt interrupt)
disable the interrupt for Fifo Channel
Definition: IfxGtm_Psm.c:164
IfxGtm_Psm_Fifo_clearChannelInterrupt
IFX_INLINE void IfxGtm_Psm_Fifo_clearChannelInterrupt(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, IfxGtm_Psm_FifoChannelInterrupt interrupt)
clear the interrupt of specified type.
Definition: IfxGtm_Psm.h:640
IfxGtm_Psm_Fifo_setChannelInterrupt
IFX_EXTERN void IfxGtm_Psm_Fifo_setChannelInterrupt(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, IfxGtm_Psm_FifoChannelInterrupt interrupt)
forces the Interrupt from Fifo Channel
Definition: IfxGtm_Psm.c:173
IfxGtm_Psm_F2a_getTransferMode
IFX_INLINE IfxGtm_Psm_F2aTransferMode IfxGtm_Psm_F2a_getTransferMode(IfxGtm_Psm_F2a f2a, IfxGtm_Psm_F2aStream f2aStream)
get the Transfer mode of the specified F2A stream.
Definition: IfxGtm_Psm.h:676
IfxGtm_Psm_Fifo_setChannelEndAddress
IFX_EXTERN void IfxGtm_Psm_Fifo_setChannelEndAddress(IfxGtm_Psm_Fifo fifo, IfxGtm_Psm_FifoChannel channel, uint32 address)
Set the logical end address for the specified Fifo Channel. The address range is 0 - (IFXGTM_PSM_FIFO...
Definition: IfxGtm_Psm.c:53
IfxGtm.h
GTM basic functionality.
IfxGtm_cfg.h
GTM on-chip implementation data.
IfxGtm_Psm_InterruptMode_level
level mode
Definition: IfxGtm_Psm.h:178
IfxGtm_Psm_FifoChannel
IfxGtm_Psm_FifoChannel
Enumeration lisiting Fifo Channels.
Definition: IfxGtm_Psm.h:121
IfxGtm_Psm_FifoChannelInterrupt_lowerWm
Lower watermark reached.
Definition: IfxGtm_Psm.h:148
IfxGtm_Psm_F2aStream_7
F2A Stream 7.
Definition: IfxGtm_Psm.h:87
IfxGtm_Psm_FifoChannel_0
FIFO Channel 0.
Definition: IfxGtm_Psm.h:123
IfxGtm_Psm_F2aTransferMode_transferLowWord
Transfer ARU bits 23:0 from/to FIFO.
Definition: IfxGtm_Psm.h:114


iLLD_TC38A: IfxGtm_Spe.c Source File

  • Gtm
  • Std
IfxGtm_Spe.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Spe.c
3 * \brief GTM basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 *
41 */
42
43 /******************************************************************************/
44 /*----------------------------------Includes----------------------------------*/
45 /******************************************************************************/
46
47 #include "IfxGtm_Spe.h"
48
49 /******************************************************************************/
50 /*-------------------------Function Implementations---------------------------*/
51 /******************************************************************************/
52
53 void IfxGtm_Spe_disableInterrupt(Ifx_GTM_SPE *spe, IfxGtm_Spe_InterruptSignal interrupt)
54 {
55 uint32 irqen_temp = spe->IRQ.EN.U;
56 irqen_temp = (irqen_temp ^ ((uint32)1 << interrupt));
57 spe->IRQ.EN.U = irqen_temp;
58 }
59
60
61 void IfxGtm_Spe_enableErrorInterrupt(Ifx_GTM_SPE *spe, IfxGtm_Spe_InterruptSignal interrupt, boolean enabled)
62 {
63 uint32 irqen_temp = spe->EIRQ_EN.U;
64 irqen_temp = (irqen_temp | ((uint32)1 << interrupt)) & ((uint32)enabled << interrupt);
65 spe->EIRQ_EN.U = irqen_temp;
66 }
67
68
69 void IfxGtm_Spe_enableInput(Ifx_GTM_SPE *spe, IfxGtm_Spe_InputSignal inputSignal, boolean enabled)
70 {
71 switch (enabled)
72 {
73 case TRUE:
74 {
75 spe->CTRL_STAT.U |= ((uint32)enabled << ((uint32)inputSignal + IFX_GTM_SPE_CTRL_STAT_SIE0_OFF));
76 break;
77 }
78 case FALSE:
79 spe->CTRL_STAT.U &= ((uint32)enabled << ((uint32)inputSignal + IFX_GTM_SPE_CTRL_STAT_SIE0_OFF));
80 break;
81 }
82 }
83
84
85 void IfxGtm_Spe_enableInterrupt(Ifx_GTM_SPE *spe, IfxGtm_Spe_InterruptSignal interrupt)
86 {
87 uint32 irqen_temp = spe->IRQ.EN.U;
88 irqen_temp = (irqen_temp | ((uint32)1 << interrupt));
89 spe->IRQ.EN.U = irqen_temp;
90 }
91
92
93 uint32 IfxGtm_Spe_getFastShutoffLevel(Ifx_GTM_SPE *spe, IfxGtm_Spe_OutChannel channel)
94 {
95 uint32 fsol_temp = (uint32)(spe->CTRL_STAT.B.FSOL);
96 fsol_temp = (fsol_temp & (uint32)(1 << (uint32)channel)) >> (uint32)channel;
97 return (uint32)fsol_temp;
98 }
99
100
101 boolean IfxGtm_Spe_getInterruptStatus(Ifx_GTM_SPE *spe, IfxGtm_Spe_InterruptSignal interrupt)
102 {
103 return (((spe->IRQ.NOTIFY.U) >> interrupt) & (uint32)1) == (uint32)1;
104 }
105
106
107 uint32 IfxGtm_Spe_getRevCompare(Ifx_GTM_SPE *spe)
108 {
109 return (uint32)(spe->REV_CMP.B.REV_CMP);
110 }
111
112
113 void IfxGtm_Spe_selectTrigger(Ifx_GTM_SPE *spe, IfxGtm_Spe_TriggerSource trigger)
114 {
115 Ifx_GTM_SPE_CTRL_STAT ctrl_stat;
116 ctrl_stat.U = spe->CTRL_STAT.U;
117
118 ctrl_stat.B.TRIG_SEL = IFXGTM_SPE_GET_TRIGSEL(trigger);
119 ctrl_stat.B.ETRIG_SEL = IFXGTM_SPE_GET_ETRIG(trigger);
120
121 spe->CTRL_STAT.U = ctrl_stat.U;
122 }
123
124
125 void IfxGtm_Spe_setAllInputPatterns(Ifx_GTM_SPE *spe, IfxGtm_Spe_InputPattern *patPtr)
126 {
127 uint32 spepat_temp = spe->PAT.U;
128
129 spepat_temp = IFXGTM_SPE_GETALLPATTERNS(patPtr);
130
131 spe->PAT.U = spepat_temp;
132 }
133
134
135 void IfxGtm_Spe_setInputPattern(Ifx_GTM_SPE *spe, IfxGtm_Spe_InputPattern *patPtr, IfxGtm_Spe_PatternIndex patIndex)
136 {
137 uint32 pattern = patPtr->U;
138 uint32 spepat_temp = spe->PAT.U;
139
140 spepat_temp = IFXGTM_SPE_SETSINGLEPATTERN(spepat_temp, pattern, patIndex);
141
142 spe->PAT.U = spepat_temp;
143 }
144
145
146 void IfxGtm_Spe_setInterrupt(Ifx_GTM_SPE *spe, IfxGtm_Spe_InterruptSignal interrupt)
147 {
148 uint32 forceirq_temp = spe->IRQ.FORCINT.U;
149 forceirq_temp = (forceirq_temp | ((uint32)1 << interrupt));
150 spe->IRQ.FORCINT.U = forceirq_temp;
151 }
152
153
154 void IfxGtm_Spe_setOutputPattern(Ifx_GTM_SPE *spe, IfxGtm_Spe_OutputPattern *patPtr, IfxGtm_Spe_PatternIndex patIndex)
155 {
156 spe->OUT_PAT[patIndex].U = patPtr->U;
157 }
158
159
160 void IfxGtm_Spe_setRevCompare(Ifx_GTM_SPE *spe, uint32 count)
161 {
162 spe->REV_CMP.B.REV_CMP = count;
163 }
IfxGtm_Spe_setOutputPattern
void IfxGtm_Spe_setOutputPattern(Ifx_GTM_SPE *spe, IfxGtm_Spe_OutputPattern *patPtr, IfxGtm_Spe_PatternIndex patIndex)
sets the output pattern from pointer to the corresponding SPE_OUT_PAT register specified by the index...
Definition: IfxGtm_Spe.c:154
IfxGtm_Spe_InputPattern
Struct describing the pattern of Input signal to the SPE submodule.
Definition: IfxGtm_Spe.h:239
IfxGtm_Spe_enableInterrupt
void IfxGtm_Spe_enableInterrupt(Ifx_GTM_SPE *spe, IfxGtm_Spe_InterruptSignal interrupt)
enables the SPE interrupt of specified type.
Definition: IfxGtm_Spe.c:85
IfxGtm_Spe_selectTrigger
void IfxGtm_Spe_selectTrigger(Ifx_GTM_SPE *spe, IfxGtm_Spe_TriggerSource trigger)
selects the source which will trigger the spe control output.a
Definition: IfxGtm_Spe.c:113
IfxGtm_Spe_OutChannel
IfxGtm_Spe_OutChannel
SPE module output channel number.
Definition: IfxGtm_Spe.h:174
IfxGtm_Spe_setRevCompare
void IfxGtm_Spe_setRevCompare(Ifx_GTM_SPE *spe, uint32 count)
sets the step compare count to the specified value.
Definition: IfxGtm_Spe.c:160
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxGtm_Spe_setInterrupt
void IfxGtm_Spe_setInterrupt(Ifx_GTM_SPE *spe, IfxGtm_Spe_InterruptSignal interrupt)
forces the interrupt of specified type by software
Definition: IfxGtm_Spe.c:146
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxGtm_Spe_enableErrorInterrupt
void IfxGtm_Spe_enableErrorInterrupt(Ifx_GTM_SPE *spe, IfxGtm_Spe_InterruptSignal interrupt, boolean enabled)
enables the error interrupt of the specified type.
Definition: IfxGtm_Spe.c:61
IfxGtm_Spe_getRevCompare
uint32 IfxGtm_Spe_getRevCompare(Ifx_GTM_SPE *spe)
returns the step counter compare value as a 32 bit word.
Definition: IfxGtm_Spe.c:107
IfxGtm_Spe_setAllInputPatterns
void IfxGtm_Spe_setAllInputPatterns(Ifx_GTM_SPE *spe, IfxGtm_Spe_InputPattern *patPtr)
sets all the specified input patterns into the SPE_PAT register
Definition: IfxGtm_Spe.c:125
IfxGtm_Spe_InterruptSignal
IfxGtm_Spe_InterruptSignal
Enumeration containing interrupt signals from SPE. This is used to manipulate and retrieve interrupt ...
Definition: IfxGtm_Spe.h:162
IfxGtm_Spe_OutputPattern
specifies the output pattern to be given to the TOM output from given SPE. Union implementation can b...
Definition: IfxGtm_Spe.h:248
IfxGtm_Spe_TriggerSource
IfxGtm_Spe_TriggerSource
selects the source of trigger to control command output from SPE.
Definition: IfxGtm_cfg.h:376
IfxGtm_Spe_getInterruptStatus
boolean IfxGtm_Spe_getInterruptStatus(Ifx_GTM_SPE *spe, IfxGtm_Spe_InterruptSignal interrupt)
returns the interrupt status of specified interrupt signal
Definition: IfxGtm_Spe.c:101
IfxGtm_Spe_enableInput
void IfxGtm_Spe_enableInput(Ifx_GTM_SPE *spe, IfxGtm_Spe_InputSignal inputSignal, boolean enabled)
enables/disables the input to sPE from the selected input signal source.
Definition: IfxGtm_Spe.c:69
IFXGTM_SPE_GETALLPATTERNS
#define IFXGTM_SPE_GETALLPATTERNS(pat_ptr)
sets all the input patterns specified into the SPE_PAT register. This can be used to derive SPE_PAT f...
Definition: IfxGtm_Spe.h:89
IfxGtm_Spe_PatternIndex
IfxGtm_Spe_PatternIndex
Pattern Index Number of the valid Input sequence to the SPE. range from 0-7.
Definition: IfxGtm_Spe.h:189
IfxGtm_Spe_disableInterrupt
void IfxGtm_Spe_disableInterrupt(Ifx_GTM_SPE *spe, IfxGtm_Spe_InterruptSignal interrupt)
disables the SPE interrupt of specified type.
Definition: IfxGtm_Spe.c:53
IFXGTM_SPE_GET_TRIGSEL
#define IFXGTM_SPE_GET_TRIGSEL(x)
Macro to get the TRIG_SEL value in CTRL_STAT register. Input(x): Enum value of IfxGtm_Spe_TriggerSour...
Definition: IfxGtm_Spe.h:75
IFXGTM_SPE_SETSINGLEPATTERN
#define IFXGTM_SPE_SETSINGLEPATTERN(spepat_temp, pattern, pat_index)
sets a single input pattern into the SPE_PAT register.
Definition: IfxGtm_Spe.h:84
IfxGtm_Spe_getFastShutoffLevel
uint32 IfxGtm_Spe_getFastShutoffLevel(Ifx_GTM_SPE *spe, IfxGtm_Spe_OutChannel channel)
return fast shutoff level.
Definition: IfxGtm_Spe.c:93
IfxGtm_Spe_InputPattern::U
uint32 U
read pattern as word
Definition: IfxGtm_Spe.h:242
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxGtm_Spe.h
GTM basic functionality.
IFXGTM_SPE_GET_ETRIG
#define IFXGTM_SPE_GET_ETRIG(x)
Macro to get the ETRIG_SEL value in CTRL_STAT register. Input(x): Enum value of IfxGtm_Spe_TriggerSou...
Definition: IfxGtm_Spe.h:80
IfxGtm_Spe_setInputPattern
void IfxGtm_Spe_setInputPattern(Ifx_GTM_SPE *spe, IfxGtm_Spe_InputPattern *patPtr, IfxGtm_Spe_PatternIndex patIndex)
writes SPE[i]_PAT with the individual pattern specified according to the pattern index.
Definition: IfxGtm_Spe.c:135
IfxGtm_Spe_InputSignal
IfxGtm_Spe_InputSignal
Input signal which is mapped from TIMj_CH(48) Used to set GTM.SPE.CTRL_STAT.B.SIEx.
Definition: IfxGtm_Spe.h:142


iLLD_TC38A: IfxGtm_Spe.h Source File

  • Gtm
  • Std
IfxGtm_Spe.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Spe.h
3 * \brief GTM basic functionality
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 * This Module provides the standard interfaces to manipulate and read SPE sub-module registers in GTM.
43 * This Module can be used to abstract the register names and addressing from higher layer software code.
44 *
45 * \defgroup IfxLld_Gtm_Std_Spe Spe Basic Functionality
46 * \ingroup IfxLld_Gtm_Std
47 * \defgroup IfxLld_Gtm_Std_Spe_SPEDataStructures SPE Data Structures
48 * \ingroup IfxLld_Gtm_Std_Spe
49 * \defgroup IfxLld_Gtm_Std_Spe_SPEEnumerations SPE Enumerations
50 * \ingroup IfxLld_Gtm_Std_Spe
51 * \defgroup IfxLld_Gtm_Std_Spe_SPEFunctions SPE Functions
52 * \ingroup IfxLld_Gtm_Std_Spe
53 */
54
55 #ifndef IFXGTM_SPE_H
56 #define IFXGTM_SPE_H 1
57
58 /******************************************************************************/
59 /*----------------------------------Includes----------------------------------*/
60 /******************************************************************************/
61
62 #include "_Impl/IfxGtm_cfg.h"
63 #include "IfxGtm.h"
64 #include "Cpu/Std/IfxCpu_Intrinsics.h"
65 #include "IfxGtm_bf.h"
66 #include "Src/Std/IfxSrc.h"
67
68 /******************************************************************************/
69 /*-----------------------------------Macros-----------------------------------*/
70 /******************************************************************************/
71
72 /** \brief Macro to get the TRIG_SEL value in CTRL_STAT register.
73 * Input(x): Enum value of IfxGtm_Spe_TriggerSource
74 */
75 #define IFXGTM_SPE_GET_TRIGSEL(x) ((uint32)(x & (uint32)3))
76
77 /** \brief Macro to get the ETRIG_SEL value in CTRL_STAT register.
78 * Input(x): Enum value of IfxGtm_Spe_TriggerSource
79 */
80 #define IFXGTM_SPE_GET_ETRIG(x) ((uint32)((x & (uint32)4) >> 2))
81
82 /** \brief sets a single input pattern into the SPE_PAT register.
83 */
84 #define IFXGTM_SPE_SETSINGLEPATTERN(spepat_temp, pattern, pat_index) ((spepat_temp | ((uint32)0xFu << (pat_index * 4))) & (pattern << (pat_index * 4)))
85
86 /** \brief sets all the input patterns specified into the SPE_PAT register.
87 * This can be used to derive SPE_PAT from pattern array specified by user.
88 */
89 #define IFXGTM_SPE_GETALLPATTERNS(pat_ptr) \
90 ((pat_ptr->U) | \
91 ((pat_ptr + 1)->U << 4) | \
92 ((pat_ptr + 2)->U << 8) | \
93 ((pat_ptr + 3)->U << 12) | \
94 ((pat_ptr + 4)->U << 16) | \
95 ((pat_ptr + 5)->U << 20) | \
96 ((pat_ptr + 6)->U << 24) | \
97 ((pat_ptr + 7)->U << 28))
98
99 /** \brief macro used to set a single channel output into the SPE OUT PAT register.
100 */
101 #define IFXGTM_SPE_SETCHANNELOUTPUT(speoutpat, output, ch) ((speoutpat | ((uint32)0x3u << (ch * 2))) & ((uint32)output << (ch * 2)))
102
103 /******************************************************************************/
104 /*--------------------------------Enumerations--------------------------------*/
105 /******************************************************************************/
106
107 /** \addtogroup IfxLld_Gtm_Std_Spe_SPEEnumerations
108 * \{ */
109 /** \brief enumeration containing TOM channel output types possible from SPE.
110 * Used to specify the Channel outputs in individual SPE_OUT_PAT registers.
111 */
112 typedef enum
113 {
114 IfxGtm_Spe_ChannelOutputType_tomCh0Sour = 0, /**< \brief set output to TOM Channel 0 SOUR output */
115 IfxGtm_Spe_ChannelOutputType_tomCh1Sour = 1, /**< \brief set output to TOM Channel 1 SOUR output */
116 IfxGtm_Spe_ChannelOutputType_0 = 2, /**< \brief set output to 0 */
117 IfxGtm_Spe_ChannelOutputType_1 = 3 /**< \brief set output to 1 */
118 } IfxGtm_Spe_ChannelOutputType;
119
120 /** \brief Specifies the type of control command which selects the output pattern register(OUT_PAT) used to udpate OUT_CTRL.
121 * Used to fill in the SPE_CTRL_CMD field in SPE_CMD register.
122 */
123 typedef enum
124 {
125 IfxGtm_Spe_ControlCommand_patPtr = 0, /**< \brief use SPE_PAT_PTR to select OUT_PAT */
126 IfxGtm_Spe_ControlCommand_bwdPatPtr = 1, /**< \brief Use SPE_PAT_PTR_BWD to select OUT_PAT */
127 IfxGtm_Spe_ControlCommand_outPat6 = 2, /**< \brief Select OUT_PAT_6 directly. */
128 IfxGtm_Spe_ControlCommand_outPat7 = 3 /**< \brief Select OUT_PAT_7 directly. */
129 } IfxGtm_Spe_ControlCommand;
130
131 /** \brief Describes the rotation direction of the input signal patterns.
132 */
133 typedef enum
134 {
135 IfxGtm_Spe_Direction_fwd = 0, /**< \brief Rotation direction is forward (Incrementing pattern) */
136 IfxGtm_Spe_Direction_bwd = 1 /**< \brief Rotation direction is backwards (decrementing Pattern) */
137 } IfxGtm_Spe_Direction;
138
139 /** \brief Input signal which is mapped from TIMj_CH(48)
140 * Used to set GTM.SPE.CTRL_STAT.B.SIEx
141 */
142 typedef enum
143 {
144 IfxGtm_Spe_InputSignal_chX = 0, /**< \brief Select for CHx */
145 IfxGtm_Spe_InputSignal_chY = 1, /**< \brief select for CHy */
146 IfxGtm_Spe_InputSignal_chZ = 2 /**< \brief select for CHz */
147 } IfxGtm_Spe_InputSignal;
148
149 /** \brief mode of interrupt - used to specify the IRQ_MODE register.
150 */
151 typedef enum
152 {
153 IfxGtm_Spe_InterruptMode_level = 0, /**< \brief level mode */
154 IfxGtm_Spe_InterruptMode_pulse = 1, /**< \brief Pulse mode */
155 IfxGtm_Spe_InterruptMode_pulseNotify = 2, /**< \brief Pulse Notify mode */
156 IfxGtm_Spe_InterruptMode_singlePulse = 3 /**< \brief Single Pulse Mode */
157 } IfxGtm_Spe_InterruptMode;
158
159 /** \brief Enumeration containing interrupt signals from SPE.
160 * This is used to manipulate and retrieve interrupt flags from Interrupt control registers in SPE.
161 */
162 typedef enum
163 {
164 IfxGtm_Spe_InterruptSignal_nipd = 0, /**< \brief new input pattern detected interrupt */
165 IfxGtm_Spe_InterruptSignal_dchg = 1, /**< \brief direction change interrupt */
166 IfxGtm_Spe_InterruptSignal_perr = 2, /**< \brief Pattern error: invalid input pattern interrupt */
167 IfxGtm_Spe_InterruptSignal_bis = 3, /**< \brief Bouncing Input signal interrupt */
168 IfxGtm_Spe_InterruptSignal_rcmp = 4, /**< \brief Revolution compare match interrupt */
169 IfxGtm_Spe_InterruptSignal_count = 5 /**< \brief Number of interrupt signals from SPE. */
170 } IfxGtm_Spe_InterruptSignal;
171
172 /** \brief SPE module output channel number.
173 */
174 typedef enum
175 {
176 IfxGtm_Spe_OutChannel_0, /**< \brief SPE output channel 0 */
177 IfxGtm_Spe_OutChannel_1, /**< \brief SPE output channel 1 */
178 IfxGtm_Spe_OutChannel_2, /**< \brief SPE output channel 2 */
179 IfxGtm_Spe_OutChannel_3, /**< \brief SPE output channel 3 */
180 IfxGtm_Spe_OutChannel_4, /**< \brief SPE output channel 4 */
181 IfxGtm_Spe_OutChannel_5, /**< \brief SPE output channel 5 */
182 IfxGtm_Spe_OutChannel_6, /**< \brief SPE output channel 6 */
183 IfxGtm_Spe_OutChannel_7 /**< \brief SPE output channel 7 */
184 } IfxGtm_Spe_OutChannel;
185
186 /** \brief Pattern Index Number of the valid Input sequence to the SPE.
187 * range from 0-7.
188 */
189 typedef enum
190 {
191 IfxGtm_Spe_PatternIndex_0, /**< \brief SPE Pattern Index 0 */
192 IfxGtm_Spe_PatternIndex_1, /**< \brief SPE Pattern Index 1 */
193 IfxGtm_Spe_PatternIndex_2, /**< \brief SPE Pattern Index 2 */
194 IfxGtm_Spe_PatternIndex_3, /**< \brief SPE Pattern Index 3 */
195 IfxGtm_Spe_PatternIndex_4, /**< \brief SPE Pattern Index 4 */
196 IfxGtm_Spe_PatternIndex_5, /**< \brief SPE Pattern Index 5 */
197 IfxGtm_Spe_PatternIndex_6, /**< \brief SPE Pattern Index 6 */
198 IfxGtm_Spe_PatternIndex_7 /**< \brief SPE Pattern Index 7 */
199 } IfxGtm_Spe_PatternIndex;
200
201 /** \} */
202
203 /******************************************************************************/
204 /*-----------------------------Data Structures--------------------------------*/
205 /******************************************************************************/
206
207 /** \addtogroup IfxLld_Gtm_Std_Spe_SPEDataStructures
208 * \{ */
209 /** \brief specifies the output pattern structure.
210 */
211 typedef struct
212 {
213 uint32 CH0 : 2; /**< \brief output from Channel 0 */
214 uint32 CH1 : 2; /**< \brief output from Channel 0 */
215 uint32 CH2 : 2; /**< \brief output from Channel 2 */
216 uint32 CH3 : 2; /**< \brief output from Channel 3 */
217 uint32 CH4 : 2; /**< \brief output from Channel 4 */
218 uint32 CH5 : 2; /**< \brief output from Channel 5 */
219 uint32 CH6 : 2; /**< \brief output from Channel 6 */
220 uint32 CH7 : 2; /**< \brief output from Channel 7 */
221 } IfxGtm_Spe_ChannelOutputs;
222
223 /** \brief Struct describing the individual input signals in the pattern
224 */
225 typedef struct
226 {
227 uint32 valid : 1; /**< \brief validity of the specified Pattern */
228 uint32 x : 1; /**< \brief CHx input Signal */
229 uint32 y : 1; /**< \brief CHy input Signal */
230 uint32 z : 1; /**< \brief CHz input Signal */
231 } IfxGtm_Spe_PatternSignal;
232
233 /** \} */
234
235 /** \addtogroup IfxLld_Gtm_Std_Spe_SPEDataStructures
236 * \{ */
237 /** \brief Struct describing the pattern of Input signal to the SPE submodule.
238 */
239 typedef union
240 {
241 IfxGtm_Spe_PatternSignal Signal; /**< \brief Individual Pattern Signals. */
242 uint32 U; /**< \brief read pattern as word */
243 } IfxGtm_Spe_InputPattern;
244
245 /** \brief specifies the output pattern to be given to the TOM output from given SPE.
246 * Union implementation can be read in word or individual channel output units.
247 */
248 typedef union
249 {
250 IfxGtm_Spe_ChannelOutputs Outputs; /**< \brief Structure containing individual channel outputs. */
251 uint32 U; /**< \brief word */
252 } IfxGtm_Spe_OutputPattern;
253
254 /** \} */
255
256 /** \addtogroup IfxLld_Gtm_Std_Spe_SPEFunctions
257 * \{ */
258
259 /******************************************************************************/
260 /*-------------------------Inline Function Prototypes-------------------------*/
261 /******************************************************************************/
262
263 /** \brief clears all the Interrupts
264 * \param spe pointer to the spe device.
265 * \return None
266 */
267 IFX_INLINE void IfxGtm_Spe_clearAllInterrupts(Ifx_GTM_SPE *spe);
268
269 /** \brief clears the specific interrupt flag.
270 * \param spe pointer to the spe device.
271 * \param interrupt interrupt signal
272 * \return None
273 */
274 IFX_INLINE void IfxGtm_Spe_clearInterrupt(Ifx_GTM_SPE *spe, IfxGtm_Spe_InterruptSignal interrupt);
275
276 /** \brief enables/disables the SPE module based on boolean input.
277 * \param spe pointer to spe device.
278 * \param enabled enable status for SPE sub module
279 * \return None
280 */
281 IFX_INLINE void IfxGtm_Spe_enableModule(Ifx_GTM_SPE *spe, boolean enabled);
282
283 /** \brief returns the actual input pattern as a word format.
284 * \param spe pointer to the spe device.
285 * \return actual input pattern
286 */
287 IFX_INLINE uint32 IfxGtm_Spe_getActualInputPat(Ifx_GTM_SPE *spe);
288
289 /** \brief returns the backwards pattern pointer.
290 * \param spe pointer to the spe device.
291 * \return current pattern pointer
292 */
293 IFX_INLINE uint32 IfxGtm_Spe_getBwdPatternPtr(Ifx_GTM_SPE *spe);
294
295 /** \brief retrieves the Control command used to select Pattern pointer which selects OUT_PAT.
296 * \param spe pointer to the spe device.
297 * \return control command selection
298 */
299 IFX_INLINE IfxGtm_Spe_ControlCommand IfxGtm_Spe_getControlCommand(Ifx_GTM_SPE *spe);
300
301 /** \brief gets the actual rotation direction of the input signals.
302 * \param spe pointer to the spe device.
303 * \return Direction
304 */
305 IFX_INLINE IfxGtm_Spe_Direction IfxGtm_Spe_getDir(Ifx_GTM_SPE *spe);
306
307 /** \brief gets the new input pattern in word format.
308 * \param spe pointer to the spe device.
309 * \return new input pattern
310 */
311 IFX_INLINE uint32 IfxGtm_Spe_getNewInputPat(Ifx_GTM_SPE *spe);
312
313 /** \brief gets the output control register (OUT_CTRL) as a whole word to read the curent output patttern.
314 * \param spe pointer to the spe device
315 * \return output control register as whole word
316 */
317 IFX_INLINE uint32 IfxGtm_Spe_getOutputCtrl(Ifx_GTM_SPE *spe);
318
319 /** \brief returns the output pattern for the specified index as a whole word.
320 * \param spe pointer to the spe device
321 * \param patIndex step or index number of the pattern specified.
322 * \return output pattern as whole word
323 */
324 IFX_INLINE uint32 IfxGtm_Spe_getOutputPattern(Ifx_GTM_SPE *spe, IfxGtm_Spe_PatternIndex patIndex);
325
326 /** \brief returns the pattern pointer which indicates the currently pointed SPE_OUT_PAT register.
327 * \param spe pointer to the spe device.
328 * \return current pattern pointer
329 */
330 IFX_INLINE uint32 IfxGtm_Spe_getPatternPtr(Ifx_GTM_SPE *spe);
331
332 /** \brief gets the previous rotation direction.
333 * \param spe pointer to the spe device.
334 * \return Previous Direction
335 */
336 IFX_INLINE IfxGtm_Spe_Direction IfxGtm_Spe_getPrevDir(Ifx_GTM_SPE *spe);
337
338 /** \brief gets the previous input pattern in word format.
339 * \param spe pointer to the spe device.
340 * \return previous input pattern
341 */
342 IFX_INLINE uint32 IfxGtm_Spe_getPreviousInputPat(Ifx_GTM_SPE *spe);
343
344 /** \brief returns the step counter as a 32 bit word
345 * \param spe pointer to the spe device
346 * \return step counter
347 */
348 IFX_INLINE uint32 IfxGtm_Spe_getRevCounter(Ifx_GTM_SPE *spe);
349
350 /** \brief Get the Pointer to the Interrupt Request Node of specified SPE object.
351 * \param spe Spe Index Number
352 * \return SRC pointer
353 */
354 IFX_INLINE volatile Ifx_SRC_SRCR *IfxGtm_Spe_getSrcPointer(IfxGtm_Spe spe);
355
356 /** \brief selects the Tim Input Channels to give input to the SPE submodule.
357 * \param spe pointer to the spe device.
358 * \param timInput TIM input signal to be selected
359 * \return None
360 */
361 IFX_INLINE void IfxGtm_Spe_selectTimInput(Ifx_GTM_SPE *spe, IfxGtm_Spe_TimInput timInput);
362
363 /** \brief sets the Backward pattern pointer to the CTRL_STAT2 register. This will be used to command if control command is set to backwards in CTRL_CMD register.
364 * \param spe pointer to the spe device
365 * \param patIndex pattern index number
366 * \return None
367 */
368 IFX_INLINE void IfxGtm_Spe_setBwdPatternPtr(Ifx_GTM_SPE *spe, IfxGtm_Spe_PatternIndex patIndex);
369
370 /** \brief set the CTRL_CMD field to select which pattern pointer is used to select OUT_PAT.
371 * \param spe pointer to the spe device.
372 * \param cmd control command selection
373 * \return None
374 */
375 IFX_INLINE void IfxGtm_Spe_setControlCommand(Ifx_GTM_SPE *spe, IfxGtm_Spe_ControlCommand cmd);
376
377 /** \brief Used to set the Fast shutoff Mode.
378 * True: Enable Fast Shutoff
379 * False: Disable Fast Shutoff
380 * \param spe pointer to the spe device
381 * \param enabled status of Fast shutoff
382 * \return None
383 */
384 IFX_INLINE void IfxGtm_Spe_setFastShutoff(Ifx_GTM_SPE *spe, boolean enabled);
385
386 /** \brief sets the desired mode as the interrupt mode from SPE submodule.
387 * \param spe pointer to the spe device
388 * \param mode interrupt mode
389 * \return None
390 */
391 IFX_INLINE void IfxGtm_Spe_setInterruptMode(Ifx_GTM_SPE *spe, IfxGtm_Spe_InterruptMode mode);
392
393 /** \brief writes into the out_ctrl register with the specified output pattern.
394 * \param spe pointer to the spe device
395 * \param patPtr pointer to the output pattern
396 * \return None
397 */
398 IFX_INLINE void IfxGtm_Spe_setOutputCtrl(Ifx_GTM_SPE *spe, IfxGtm_Spe_OutputPattern *patPtr);
399
400 /** \brief sets the Pattern Index into the CTRL_STAT register, which will in turn point to the corresponding SPE_OUT_PAT register.
401 * \param spe pointer to the spe device
402 * \param patIndex pattern index number
403 * \return None
404 */
405 IFX_INLINE void IfxGtm_Spe_setPatternPtr(Ifx_GTM_SPE *spe, IfxGtm_Spe_PatternIndex patIndex);
406
407 /** \brief sets the step counter to a specific value.
408 * \param spe pointer to the spe device
409 * \param count step counter value.
410 * \return None
411 */
412 IFX_INLINE void IfxGtm_Spe_setRevCounter(Ifx_GTM_SPE *spe, uint32 count);
413
414 /** \brief Trigger the update of OUT_CTRL register with the OUT_PAT selected by Control Command.
415 * \param spe pointer to the spe device.
416 * \return None
417 */
418 IFX_INLINE void IfxGtm_Spe_triggerUpdate(Ifx_GTM_SPE *spe);
419
420 /******************************************************************************/
421 /*-------------------------Global Function Prototypes-------------------------*/
422 /******************************************************************************/
423
424 /** \brief disables the SPE interrupt of specified type.
425 * \param spe pointer to the spe device
426 * \param interrupt interrupt signal
427 * \return None
428 */
429 IFX_EXTERN void IfxGtm_Spe_disableInterrupt(Ifx_GTM_SPE *spe, IfxGtm_Spe_InterruptSignal interrupt);
430
431 /** \brief enables the error interrupt of the specified type.
432 * \param spe pointer to the spe device
433 * \param interrupt interrupt signal
434 * \param enabled interrupt enable status
435 * \return None
436 */
437 IFX_EXTERN void IfxGtm_Spe_enableErrorInterrupt(Ifx_GTM_SPE *spe, IfxGtm_Spe_InterruptSignal interrupt, boolean enabled);
438
439 /** \brief enables/disables the input to sPE from the selected input signal source.
440 * \param spe pointer to spe device
441 * \param inputSignal Input signal
442 * \param enabled enable signal
443 * \return None
444 */
445 IFX_EXTERN void IfxGtm_Spe_enableInput(Ifx_GTM_SPE *spe, IfxGtm_Spe_InputSignal inputSignal, boolean enabled);
446
447 /** \brief enables the SPE interrupt of specified type.
448 * \param spe pointer to the spe device
449 * \param interrupt interrupt signal
450 * \return None
451 */
452 IFX_EXTERN void IfxGtm_Spe_enableInterrupt(Ifx_GTM_SPE *spe, IfxGtm_Spe_InterruptSignal interrupt);
453
454 /** \brief return fast shutoff level.
455 * \param spe pointer to the spe device.
456 * \param channel TOM[x] output channel
457 * \return fast shutoff level
458 */
459 IFX_EXTERN uint32 IfxGtm_Spe_getFastShutoffLevel(Ifx_GTM_SPE *spe, IfxGtm_Spe_OutChannel channel);
460
461 /** \brief returns the interrupt status of specified interrupt signal
462 * \param spe pointer to the spe device
463 * \param interrupt interrupt signal
464 * \return interrupt status
465 */
466 IFX_EXTERN boolean IfxGtm_Spe_getInterruptStatus(Ifx_GTM_SPE *spe, IfxGtm_Spe_InterruptSignal interrupt);
467
468 /** \brief returns the step counter compare value as a 32 bit word.
469 * \param spe pointer to the spe device
470 * \return step counter
471 */
472 IFX_EXTERN uint32 IfxGtm_Spe_getRevCompare(Ifx_GTM_SPE *spe);
473
474 /** \brief selects the source which will trigger the spe control output.a
475 * \param spe pointer to spe device
476 * \param trigger trigger source
477 * \return None
478 */
479 IFX_EXTERN void IfxGtm_Spe_selectTrigger(Ifx_GTM_SPE *spe, IfxGtm_Spe_TriggerSource trigger);
480
481 /** \brief sets all the specified input patterns into the SPE_PAT register
482 * \param spe pointer to the spe device
483 * \param patPtr pointer to the pattern specified
484 * \return None
485 */
486 IFX_EXTERN void IfxGtm_Spe_setAllInputPatterns(Ifx_GTM_SPE *spe, IfxGtm_Spe_InputPattern *patPtr);
487
488 /** \brief writes SPE[i]_PAT with the individual pattern specified according to the pattern index.
489 * \param spe pointer to the spe device
490 * \param patPtr pointer to the pattern specified
491 * \param patIndex step or index number of the pattern specified.
492 * \return None
493 */
494 IFX_EXTERN void IfxGtm_Spe_setInputPattern(Ifx_GTM_SPE *spe, IfxGtm_Spe_InputPattern *patPtr, IfxGtm_Spe_PatternIndex patIndex);
495
496 /** \brief forces the interrupt of specified type by software
497 * \param spe pointer to the spe device
498 * \param interrupt interrupt signal
499 * \return None
500 */
501 IFX_EXTERN void IfxGtm_Spe_setInterrupt(Ifx_GTM_SPE *spe, IfxGtm_Spe_InterruptSignal interrupt);
502
503 /** \brief sets the output pattern from pointer to the corresponding SPE_OUT_PAT register specified by the index.
504 * \param spe pointer to the spe device
505 * \param patPtr pointer to the output pattern
506 * \param patIndex step or index number of the pattern specified.
507 * \return None
508 */
509 IFX_EXTERN void IfxGtm_Spe_setOutputPattern(Ifx_GTM_SPE *spe, IfxGtm_Spe_OutputPattern *patPtr, IfxGtm_Spe_PatternIndex patIndex);
510
511 /** \brief sets the step compare count to the specified value.
512 * \param spe pointer to the spe device
513 * \param count step counter value.
514 * \return None
515 */
516 IFX_EXTERN void IfxGtm_Spe_setRevCompare(Ifx_GTM_SPE *spe, uint32 count);
517
518 /** \} */
519
520 /******************************************************************************/
521 /*---------------------Inline Function Implementations------------------------*/
522 /******************************************************************************/
523
524 IFX_INLINE void IfxGtm_Spe_clearAllInterrupts(Ifx_GTM_SPE *spe)
525 {
526 spe->IRQ.NOTIFY.U |= (uint32)0x1Fu;
527 }
528
529
530 IFX_INLINE void IfxGtm_Spe_clearInterrupt(Ifx_GTM_SPE *spe, IfxGtm_Spe_InterruptSignal interrupt)
531 {
532 spe->IRQ.NOTIFY.U |= ((uint32)1 << (uint32)interrupt);
533 }
534
535
536 IFX_INLINE void IfxGtm_Spe_enableModule(Ifx_GTM_SPE *spe, boolean enabled)
537 {
538 spe->CTRL_STAT.B.EN = (uint32)enabled;
539 }
540
541
542 IFX_INLINE uint32 IfxGtm_Spe_getActualInputPat(Ifx_GTM_SPE *spe)
543 {
544 return (uint32)(spe->CTRL_STAT.B.AIP);
545 }
546
547
548 IFX_INLINE uint32 IfxGtm_Spe_getBwdPatternPtr(Ifx_GTM_SPE *spe)
549 {
550 return (uint32)(spe->CTRL_STAT2.B.SPE_PAT_PTR_BWD);
551 }
552
553
554 IFX_INLINE IfxGtm_Spe_ControlCommand IfxGtm_Spe_getControlCommand(Ifx_GTM_SPE *spe)
555 {
556 return (IfxGtm_Spe_ControlCommand)(spe->CMD.B.SPE_CTRL_CMD);
557 }
558
559
560 IFX_INLINE IfxGtm_Spe_Direction IfxGtm_Spe_getDir(Ifx_GTM_SPE *spe)
561 {
562 return (IfxGtm_Spe_Direction)(spe->CTRL_STAT.B.ADIR);
563 }
564
565
566 IFX_INLINE uint32 IfxGtm_Spe_getNewInputPat(Ifx_GTM_SPE *spe)
567 {
568 return (uint32)(spe->CTRL_STAT.B.NIP);
569 }
570
571
572 IFX_INLINE uint32 IfxGtm_Spe_getOutputCtrl(Ifx_GTM_SPE *spe)
573 {
574 return spe->OUT_CTRL.U;
575 }
576
577
578 IFX_INLINE uint32 IfxGtm_Spe_getOutputPattern(Ifx_GTM_SPE *spe, IfxGtm_Spe_PatternIndex patIndex)
579 {
580 return spe->OUT_PAT[patIndex].U;
581 }
582
583
584 IFX_INLINE uint32 IfxGtm_Spe_getPatternPtr(Ifx_GTM_SPE *spe)
585 {
586 return (uint32)(spe->CTRL_STAT.B.SPE_PAT_PTR);
587 }
588
589
590 IFX_INLINE IfxGtm_Spe_Direction IfxGtm_Spe_getPrevDir(Ifx_GTM_SPE *spe)
591 {
592 return (IfxGtm_Spe_Direction)(spe->CTRL_STAT.B.PDIR);
593 }
594
595
596 IFX_INLINE uint32 IfxGtm_Spe_getPreviousInputPat(Ifx_GTM_SPE *spe)
597 {
598 return (uint32)(spe->CTRL_STAT.B.PIP);
599 }
600
601
602 IFX_INLINE uint32 IfxGtm_Spe_getRevCounter(Ifx_GTM_SPE *spe)
603 {
604 return (uint32)(spe->REV_CNT.B.REV_CNT);
605 }
606
607
608 IFX_INLINE volatile Ifx_SRC_SRCR *IfxGtm_Spe_getSrcPointer(IfxGtm_Spe spe)
609 {
610 return (Ifx_SRC_SRCR *)(&(MODULE_SRC.GTM_SPEIRQ[spe]));
611 }
612
613
614 IFX_INLINE void IfxGtm_Spe_selectTimInput(Ifx_GTM_SPE *spe, IfxGtm_Spe_TimInput timInput)
615 {
616 spe->CTRL_STAT.B.TIM_SEL = (uint32)(timInput & (uint32)1);
617 }
618
619
620 IFX_INLINE void IfxGtm_Spe_setBwdPatternPtr(Ifx_GTM_SPE *spe, IfxGtm_Spe_PatternIndex patIndex)
621 {
622 spe->CTRL_STAT2.B.SPE_PAT_PTR_BWD = (uint32)patIndex;
623 }
624
625
626 IFX_INLINE void IfxGtm_Spe_setControlCommand(Ifx_GTM_SPE *spe, IfxGtm_Spe_ControlCommand cmd)
627 {
628 spe->CMD.B.SPE_CTRL_CMD = (uint32)cmd;
629 }
630
631
632 IFX_INLINE void IfxGtm_Spe_setFastShutoff(Ifx_GTM_SPE *spe, boolean enabled)
633 {
634 spe->CTRL_STAT.B.FSOM = (uint32)enabled;
635 }
636
637
638 IFX_INLINE void IfxGtm_Spe_setInterruptMode(Ifx_GTM_SPE *spe, IfxGtm_Spe_InterruptMode mode)
639 {
640 spe->IRQ.MODE.B.IRQ_MODE = (uint32)mode;
641 }
642
643
644 IFX_INLINE void IfxGtm_Spe_setOutputCtrl(Ifx_GTM_SPE *spe, IfxGtm_Spe_OutputPattern *patPtr)
645 {
646 spe->OUT_CTRL.U = patPtr->U;
647 }
648
649
650 IFX_INLINE void IfxGtm_Spe_setPatternPtr(Ifx_GTM_SPE *spe, IfxGtm_Spe_PatternIndex patIndex)
651 {
652 spe->CTRL_STAT.B.SPE_PAT_PTR = (uint32)patIndex;
653 }
654
655
656 IFX_INLINE void IfxGtm_Spe_setRevCounter(Ifx_GTM_SPE *spe, uint32 count)
657 {
658 spe->REV_CNT.B.REV_CNT = count;
659 }
660
661
662 IFX_INLINE void IfxGtm_Spe_triggerUpdate(Ifx_GTM_SPE *spe)
663 {
664 spe->CMD.B.SPE_UPD_TRIG = (uint32)1;
665 }
666
667
668 #endif /* IFXGTM_SPE_H */
IfxGtm_Spe_ChannelOutputType_tomCh0Sour
set output to TOM Channel 0 SOUR output
Definition: IfxGtm_Spe.h:114
IfxGtm_Spe_setControlCommand
IFX_INLINE void IfxGtm_Spe_setControlCommand(Ifx_GTM_SPE *spe, IfxGtm_Spe_ControlCommand cmd)
set the CTRL_CMD field to select which pattern pointer is used to select OUT_PAT. ...
Definition: IfxGtm_Spe.h:626
IfxGtm_Spe_setBwdPatternPtr
IFX_INLINE void IfxGtm_Spe_setBwdPatternPtr(Ifx_GTM_SPE *spe, IfxGtm_Spe_PatternIndex patIndex)
sets the Backward pattern pointer to the CTRL_STAT2 register. This will be used to command if control...
Definition: IfxGtm_Spe.h:620
IfxGtm_Spe_PatternSignal::y
uint32 y
CHy input Signal.
Definition: IfxGtm_Spe.h:229
IfxGtm_Spe_ChannelOutputType
IfxGtm_Spe_ChannelOutputType
enumeration containing TOM channel output types possible from SPE. Used to specify the Channel output...
Definition: IfxGtm_Spe.h:112
IfxGtm_Spe_InterruptMode_level
level mode
Definition: IfxGtm_Spe.h:153
IfxGtm_Spe_getBwdPatternPtr
IFX_INLINE uint32 IfxGtm_Spe_getBwdPatternPtr(Ifx_GTM_SPE *spe)
returns the backwards pattern pointer.
Definition: IfxGtm_Spe.h:548
IfxGtm_Spe_setOutputPattern
IFX_EXTERN void IfxGtm_Spe_setOutputPattern(Ifx_GTM_SPE *spe, IfxGtm_Spe_OutputPattern *patPtr, IfxGtm_Spe_PatternIndex patIndex)
sets the output pattern from pointer to the corresponding SPE_OUT_PAT register specified by the index...
Definition: IfxGtm_Spe.c:154
IfxGtm_Spe_setRevCounter
IFX_INLINE void IfxGtm_Spe_setRevCounter(Ifx_GTM_SPE *spe, uint32 count)
sets the step counter to a specific value.
Definition: IfxGtm_Spe.h:656
IfxGtm_Spe_ControlCommand
IfxGtm_Spe_ControlCommand
Specifies the type of control command which selects the output pattern register(OUT_PAT) used to udpa...
Definition: IfxGtm_Spe.h:123
IfxGtm_Spe_InputSignal_chZ
select for CHz
Definition: IfxGtm_Spe.h:146
IfxGtm_Spe_InputPattern
Struct describing the pattern of Input signal to the SPE submodule.
Definition: IfxGtm_Spe.h:239
IfxGtm_Spe_getPreviousInputPat
IFX_INLINE uint32 IfxGtm_Spe_getPreviousInputPat(Ifx_GTM_SPE *spe)
gets the previous input pattern in word format.
Definition: IfxGtm_Spe.h:596
IfxGtm_Spe
IfxGtm_Spe
Spe Objects.
Definition: IfxGtm_cfg.h:344
IfxGtm_Spe_InterruptSignal_dchg
direction change interrupt
Definition: IfxGtm_Spe.h:165
IfxGtm_Spe_ControlCommand_patPtr
use SPE_PAT_PTR to select OUT_PAT
Definition: IfxGtm_Spe.h:125
IfxGtm_Spe_setOutputCtrl
IFX_INLINE void IfxGtm_Spe_setOutputCtrl(Ifx_GTM_SPE *spe, IfxGtm_Spe_OutputPattern *patPtr)
writes into the out_ctrl register with the specified output pattern.
Definition: IfxGtm_Spe.h:644
IfxGtm_Spe_enableInterrupt
IFX_EXTERN void IfxGtm_Spe_enableInterrupt(Ifx_GTM_SPE *spe, IfxGtm_Spe_InterruptSignal interrupt)
enables the SPE interrupt of specified type.
Definition: IfxGtm_Spe.c:85
IfxGtm_Spe_OutChannel_6
SPE output channel 6.
Definition: IfxGtm_Spe.h:182
IfxGtm_Spe_InterruptSignal_count
Number of interrupt signals from SPE.
Definition: IfxGtm_Spe.h:169
IfxGtm_Spe_selectTrigger
IFX_EXTERN void IfxGtm_Spe_selectTrigger(Ifx_GTM_SPE *spe, IfxGtm_Spe_TriggerSource trigger)
selects the source which will trigger the spe control output.a
Definition: IfxGtm_Spe.c:113
IfxGtm_Spe_OutChannel
IfxGtm_Spe_OutChannel
SPE module output channel number.
Definition: IfxGtm_Spe.h:174
IfxGtm_Spe_OutChannel_1
SPE output channel 1.
Definition: IfxGtm_Spe.h:177
IfxGtm_Spe_InterruptMode_singlePulse
Single Pulse Mode.
Definition: IfxGtm_Spe.h:156
IfxGtm_Spe_InterruptMode_pulse
Pulse mode.
Definition: IfxGtm_Spe.h:154
IfxGtm_Spe_selectTimInput
IFX_INLINE void IfxGtm_Spe_selectTimInput(Ifx_GTM_SPE *spe, IfxGtm_Spe_TimInput timInput)
selects the Tim Input Channels to give input to the SPE submodule.
Definition: IfxGtm_Spe.h:614
IfxGtm_Spe_setRevCompare
IFX_EXTERN void IfxGtm_Spe_setRevCompare(Ifx_GTM_SPE *spe, uint32 count)
sets the step compare count to the specified value.
Definition: IfxGtm_Spe.c:160
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxGtm_Spe_InterruptSignal_perr
Pattern error: invalid input pattern interrupt.
Definition: IfxGtm_Spe.h:166
IfxGtm_Spe_OutChannel_7
SPE output channel 7.
Definition: IfxGtm_Spe.h:183
IfxGtm_Spe_ControlCommand_outPat7
Select OUT_PAT_7 directly.
Definition: IfxGtm_Spe.h:128
IfxGtm_Spe_PatternIndex_0
SPE Pattern Index 0.
Definition: IfxGtm_Spe.h:191
IfxGtm_Spe_ChannelOutputs::CH0
uint32 CH0
output from Channel 0
Definition: IfxGtm_Spe.h:213
IfxGtm_Spe_getRevCounter
IFX_INLINE uint32 IfxGtm_Spe_getRevCounter(Ifx_GTM_SPE *spe)
returns the step counter as a 32 bit word
Definition: IfxGtm_Spe.h:602
IfxGtm_Spe_setInterrupt
IFX_EXTERN void IfxGtm_Spe_setInterrupt(Ifx_GTM_SPE *spe, IfxGtm_Spe_InterruptSignal interrupt)
forces the interrupt of specified type by software
Definition: IfxGtm_Spe.c:146
IfxGtm_Spe_getActualInputPat
IFX_INLINE uint32 IfxGtm_Spe_getActualInputPat(Ifx_GTM_SPE *spe)
returns the actual input pattern as a word format.
Definition: IfxGtm_Spe.h:542
IfxSrc.h
SRC basic functionality.
IfxCpu_Intrinsics.h
IfxGtm_Spe_OutChannel_3
SPE output channel 3.
Definition: IfxGtm_Spe.h:179
IfxGtm_Spe_Direction_bwd
Rotation direction is backwards (decrementing Pattern)
Definition: IfxGtm_Spe.h:136
IfxGtm_Spe_PatternIndex_1
SPE Pattern Index 1.
Definition: IfxGtm_Spe.h:192
IfxGtm_Spe_PatternIndex_7
SPE Pattern Index 7.
Definition: IfxGtm_Spe.h:198
IfxGtm_Spe_PatternIndex_2
SPE Pattern Index 2.
Definition: IfxGtm_Spe.h:193
IfxGtm_Spe_ChannelOutputs::CH2
uint32 CH2
output from Channel 2
Definition: IfxGtm_Spe.h:215
IfxGtm_Spe_setFastShutoff
IFX_INLINE void IfxGtm_Spe_setFastShutoff(Ifx_GTM_SPE *spe, boolean enabled)
Used to set the Fast shutoff Mode. True: Enable Fast Shutoff False: Disable Fast Shutoff.
Definition: IfxGtm_Spe.h:632
IfxGtm_Spe_PatternSignal
Struct describing the individual input signals in the pattern.
Definition: IfxGtm_Spe.h:225
IfxGtm_Spe_enableErrorInterrupt
IFX_EXTERN void IfxGtm_Spe_enableErrorInterrupt(Ifx_GTM_SPE *spe, IfxGtm_Spe_InterruptSignal interrupt, boolean enabled)
enables the error interrupt of the specified type.
Definition: IfxGtm_Spe.c:61
IfxGtm_Spe_InputPattern::Signal
IfxGtm_Spe_PatternSignal Signal
Individual Pattern Signals.
Definition: IfxGtm_Spe.h:241
IfxGtm_Spe_ControlCommand_outPat6
Select OUT_PAT_6 directly.
Definition: IfxGtm_Spe.h:127
IfxGtm_Spe_getOutputPattern
IFX_INLINE uint32 IfxGtm_Spe_getOutputPattern(Ifx_GTM_SPE *spe, IfxGtm_Spe_PatternIndex patIndex)
returns the output pattern for the specified index as a whole word.
Definition: IfxGtm_Spe.h:578
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxGtm_Spe_InterruptSignal_nipd
new input pattern detected interrupt
Definition: IfxGtm_Spe.h:164
IfxGtm_Spe_getControlCommand
IFX_INLINE IfxGtm_Spe_ControlCommand IfxGtm_Spe_getControlCommand(Ifx_GTM_SPE *spe)
retrieves the Control command used to select Pattern pointer which selects OUT_PAT.
Definition: IfxGtm_Spe.h:554
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxGtm_Spe_setPatternPtr
IFX_INLINE void IfxGtm_Spe_setPatternPtr(Ifx_GTM_SPE *spe, IfxGtm_Spe_PatternIndex patIndex)
sets the Pattern Index into the CTRL_STAT register, which will in turn point to the corresponding SPE...
Definition: IfxGtm_Spe.h:650
IfxGtm_Spe_getRevCompare
IFX_EXTERN uint32 IfxGtm_Spe_getRevCompare(Ifx_GTM_SPE *spe)
returns the step counter compare value as a 32 bit word.
Definition: IfxGtm_Spe.c:107
IfxGtm_Spe_getSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxGtm_Spe_getSrcPointer(IfxGtm_Spe spe)
Get the Pointer to the Interrupt Request Node of specified SPE object.
Definition: IfxGtm_Spe.h:608
IfxGtm_Spe_setAllInputPatterns
IFX_EXTERN void IfxGtm_Spe_setAllInputPatterns(Ifx_GTM_SPE *spe, IfxGtm_Spe_InputPattern *patPtr)
sets all the specified input patterns into the SPE_PAT register
Definition: IfxGtm_Spe.c:125
IfxGtm_Spe_getOutputCtrl
IFX_INLINE uint32 IfxGtm_Spe_getOutputCtrl(Ifx_GTM_SPE *spe)
gets the output control register (OUT_CTRL) as a whole word to read the curent output patttern...
Definition: IfxGtm_Spe.h:572
IfxGtm_Spe_ChannelOutputs
specifies the output pattern structure.
Definition: IfxGtm_Spe.h:211
IfxGtm_Spe_PatternIndex_3
SPE Pattern Index 3.
Definition: IfxGtm_Spe.h:194
IfxGtm_Spe_ControlCommand_bwdPatPtr
Use SPE_PAT_PTR_BWD to select OUT_PAT.
Definition: IfxGtm_Spe.h:126
IfxGtm_Spe_OutputPattern::Outputs
IfxGtm_Spe_ChannelOutputs Outputs
Structure containing individual channel outputs.
Definition: IfxGtm_Spe.h:250
IfxGtm_Spe_getNewInputPat
IFX_INLINE uint32 IfxGtm_Spe_getNewInputPat(Ifx_GTM_SPE *spe)
gets the new input pattern in word format.
Definition: IfxGtm_Spe.h:566
IfxGtm_Spe_InterruptSignal
IfxGtm_Spe_InterruptSignal
Enumeration containing interrupt signals from SPE. This is used to manipulate and retrieve interrupt ...
Definition: IfxGtm_Spe.h:162
IfxGtm_Spe_OutputPattern
specifies the output pattern to be given to the TOM output from given SPE. Union implementation can b...
Definition: IfxGtm_Spe.h:248
IfxGtm_Spe_TriggerSource
IfxGtm_Spe_TriggerSource
selects the source of trigger to control command output from SPE.
Definition: IfxGtm_cfg.h:376
IfxGtm_Spe_getInterruptStatus
IFX_EXTERN boolean IfxGtm_Spe_getInterruptStatus(Ifx_GTM_SPE *spe, IfxGtm_Spe_InterruptSignal interrupt)
returns the interrupt status of specified interrupt signal
Definition: IfxGtm_Spe.c:101
IfxGtm_Spe_ChannelOutputs::CH6
uint32 CH6
output from Channel 6
Definition: IfxGtm_Spe.h:219
IfxGtm_Spe_InputSignal_chX
Select for CHx.
Definition: IfxGtm_Spe.h:144
IfxGtm_Spe_TimInput
IfxGtm_Spe_TimInput
Specifies the TIM inputs to the SPE submodule instances. Two possible input sources are present per S...
Definition: IfxGtm_cfg.h:358
IfxGtm_Spe_clearAllInterrupts
IFX_INLINE void IfxGtm_Spe_clearAllInterrupts(Ifx_GTM_SPE *spe)
clears all the Interrupts
Definition: IfxGtm_Spe.h:524
IfxGtm_Spe_getPrevDir
IFX_INLINE IfxGtm_Spe_Direction IfxGtm_Spe_getPrevDir(Ifx_GTM_SPE *spe)
gets the previous rotation direction.
Definition: IfxGtm_Spe.h:590
IfxGtm_Spe_InterruptMode
IfxGtm_Spe_InterruptMode
mode of interrupt - used to specify the IRQ_MODE register.
Definition: IfxGtm_Spe.h:151
IfxGtm_Spe_enableModule
IFX_INLINE void IfxGtm_Spe_enableModule(Ifx_GTM_SPE *spe, boolean enabled)
enables/disables the SPE module based on boolean input.
Definition: IfxGtm_Spe.h:536
IfxGtm_Spe_ChannelOutputs::CH1
uint32 CH1
output from Channel 0
Definition: IfxGtm_Spe.h:214
IfxGtm_Spe_OutChannel_5
SPE output channel 5.
Definition: IfxGtm_Spe.h:181
IfxGtm_Spe_Direction_fwd
Rotation direction is forward (Incrementing pattern)
Definition: IfxGtm_Spe.h:135
IfxGtm_Spe_PatternIndex_6
SPE Pattern Index 6.
Definition: IfxGtm_Spe.h:197
IfxGtm_Spe_ChannelOutputType_0
set output to 0
Definition: IfxGtm_Spe.h:116
IfxGtm_Spe_OutChannel_0
SPE output channel 0.
Definition: IfxGtm_Spe.h:176
IfxGtm_Spe_PatternIndex_5
SPE Pattern Index 5.
Definition: IfxGtm_Spe.h:196
IfxGtm_Spe_InputSignal_chY
select for CHy
Definition: IfxGtm_Spe.h:145
IfxGtm_Spe_enableInput
IFX_EXTERN void IfxGtm_Spe_enableInput(Ifx_GTM_SPE *spe, IfxGtm_Spe_InputSignal inputSignal, boolean enabled)
enables/disables the input to sPE from the selected input signal source.
Definition: IfxGtm_Spe.c:69
IfxGtm_Spe_ChannelOutputs::CH4
uint32 CH4
output from Channel 4
Definition: IfxGtm_Spe.h:217
IfxGtm_Spe_getDir
IFX_INLINE IfxGtm_Spe_Direction IfxGtm_Spe_getDir(Ifx_GTM_SPE *spe)
gets the actual rotation direction of the input signals.
Definition: IfxGtm_Spe.h:560
IfxGtm_Spe_Direction
IfxGtm_Spe_Direction
Describes the rotation direction of the input signal patterns.
Definition: IfxGtm_Spe.h:133
IfxGtm_Spe_PatternIndex
IfxGtm_Spe_PatternIndex
Pattern Index Number of the valid Input sequence to the SPE. range from 0-7.
Definition: IfxGtm_Spe.h:189
IfxGtm_Spe_getPatternPtr
IFX_INLINE uint32 IfxGtm_Spe_getPatternPtr(Ifx_GTM_SPE *spe)
returns the pattern pointer which indicates the currently pointed SPE_OUT_PAT register.
Definition: IfxGtm_Spe.h:584
IfxGtm_Spe_disableInterrupt
IFX_EXTERN void IfxGtm_Spe_disableInterrupt(Ifx_GTM_SPE *spe, IfxGtm_Spe_InterruptSignal interrupt)
disables the SPE interrupt of specified type.
Definition: IfxGtm_Spe.c:53
IfxGtm_Spe_triggerUpdate
IFX_INLINE void IfxGtm_Spe_triggerUpdate(Ifx_GTM_SPE *spe)
Trigger the update of OUT_CTRL register with the OUT_PAT selected by Control Command.
Definition: IfxGtm_Spe.h:662
IfxGtm_Spe_getFastShutoffLevel
IFX_EXTERN uint32 IfxGtm_Spe_getFastShutoffLevel(Ifx_GTM_SPE *spe, IfxGtm_Spe_OutChannel channel)
return fast shutoff level.
Definition: IfxGtm_Spe.c:93
IfxGtm_Spe_OutChannel_4
SPE output channel 4.
Definition: IfxGtm_Spe.h:180
IfxGtm_Spe_ChannelOutputType_tomCh1Sour
set output to TOM Channel 1 SOUR output
Definition: IfxGtm_Spe.h:115
IfxGtm_Spe_InputPattern::U
uint32 U
read pattern as word
Definition: IfxGtm_Spe.h:242
IfxGtm_Spe_InterruptSignal_bis
Bouncing Input signal interrupt.
Definition: IfxGtm_Spe.h:167
IfxGtm_Spe_ChannelOutputs::CH7
uint32 CH7
output from Channel 7
Definition: IfxGtm_Spe.h:220
IfxGtm_Spe_ChannelOutputs::CH5
uint32 CH5
output from Channel 5
Definition: IfxGtm_Spe.h:218
IfxGtm_Spe_OutChannel_2
SPE output channel 2.
Definition: IfxGtm_Spe.h:178
IfxGtm_Spe_clearInterrupt
IFX_INLINE void IfxGtm_Spe_clearInterrupt(Ifx_GTM_SPE *spe, IfxGtm_Spe_InterruptSignal interrupt)
clears the specific interrupt flag.
Definition: IfxGtm_Spe.h:530
IfxGtm_Spe_PatternSignal::valid
uint32 valid
validity of the specified Pattern
Definition: IfxGtm_Spe.h:227
IfxGtm_Spe_PatternSignal::x
uint32 x
CHx input Signal.
Definition: IfxGtm_Spe.h:228
IfxGtm_Spe_PatternIndex_4
SPE Pattern Index 4.
Definition: IfxGtm_Spe.h:195
IfxGtm.h
GTM basic functionality.
IfxGtm_Spe_InterruptMode_pulseNotify
Pulse Notify mode.
Definition: IfxGtm_Spe.h:155
IfxGtm_cfg.h
GTM on-chip implementation data.
IfxGtm_Spe_PatternSignal::z
uint32 z
CHz input Signal.
Definition: IfxGtm_Spe.h:230
IfxGtm_Spe_ChannelOutputType_1
set output to 1
Definition: IfxGtm_Spe.h:117
IfxGtm_Spe_InterruptSignal_rcmp
Revolution compare match interrupt.
Definition: IfxGtm_Spe.h:168
IfxGtm_Spe_setInputPattern
IFX_EXTERN void IfxGtm_Spe_setInputPattern(Ifx_GTM_SPE *spe, IfxGtm_Spe_InputPattern *patPtr, IfxGtm_Spe_PatternIndex patIndex)
writes SPE[i]_PAT with the individual pattern specified according to the pattern index.
Definition: IfxGtm_Spe.c:135
IfxGtm_Spe_InputSignal
IfxGtm_Spe_InputSignal
Input signal which is mapped from TIMj_CH(48) Used to set GTM.SPE.CTRL_STAT.B.SIEx.
Definition: IfxGtm_Spe.h:142
IfxGtm_Spe_setInterruptMode
IFX_INLINE void IfxGtm_Spe_setInterruptMode(Ifx_GTM_SPE *spe, IfxGtm_Spe_InterruptMode mode)
sets the desired mode as the interrupt mode from SPE submodule.
Definition: IfxGtm_Spe.h:638
IfxGtm_Spe_ChannelOutputs::CH3
uint32 CH3
output from Channel 3
Definition: IfxGtm_Spe.h:216


iLLD_TC38A: IfxGtm_Tbu.c Source File

  • Gtm
  • Std
IfxGtm_Tbu.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Tbu.c
3 * \brief GTM basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxGtm_Tbu.h"
47 #include "IfxGtm_Cmu.h"
48
49 /******************************************************************************/
50 /*-------------------------Function Implementations---------------------------*/
51 /******************************************************************************/
52
53 float32 IfxGtm_Tbu_getClockFrequency(Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel)
54 {
55 float32 result = 0.0F;
56
57 if (channel == IfxGtm_Tbu_Ts_0)
58 {
59 result = IfxGtm_Cmu_getClkFrequency(gtm, (IfxGtm_Cmu_Clk)gtm->TBU.CH0_CTRL.B.CH_CLK_SRC, TRUE);
60 }
61 else if (channel == IfxGtm_Tbu_Ts_1)
62 {
63 result = IfxGtm_Cmu_getClkFrequency(gtm, (IfxGtm_Cmu_Clk)gtm->TBU.CH1_CTRL.B.CH_CLK_SRC, TRUE);
64 }
65 else if (channel == IfxGtm_Tbu_Ts_2)
66 {
67 result = IfxGtm_Cmu_getClkFrequency(gtm, (IfxGtm_Cmu_Clk)gtm->TBU.CH2_CTRL.B.CH_CLK_SRC, TRUE);
68 }
69
70 return result;
71 }
IfxGtm_Tbu_Ts_0
Definition: IfxGtm_Tbu.h:68
IfxGtm_Tbu_Ts
IfxGtm_Tbu_Ts
GTM TOM TBU Time stamps.
Definition: IfxGtm_Tbu.h:66
float32
float float32
Definition: Platform_Types.h:170
IfxGtm_Tbu_getClockFrequency
float32 IfxGtm_Tbu_getClockFrequency(Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel)
Returns the clock frequency.
Definition: IfxGtm_Tbu.c:53
IfxGtm_Cmu_Clk
IfxGtm_Cmu_Clk
Definition: IfxGtm_Cmu.h:64
IfxGtm_Tbu.h
GTM basic functionality.
IfxGtm_Tbu_Ts_1
Definition: IfxGtm_Tbu.h:69
IfxGtm_Cmu.h
GTM basic functionality.
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxGtm_Tbu_Ts_2
Definition: IfxGtm_Tbu.h:70
IfxGtm_Cmu_getClkFrequency
float32 IfxGtm_Cmu_getClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean assumeEnabled)
Returns the GTM configurable clock frequency in Hz.
Definition: IfxGtm_Cmu.c:64


iLLD_TC38A: IfxGtm_Tbu.h Source File

  • Gtm
  • Std
IfxGtm_Tbu.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Tbu.h
3 * \brief GTM basic functionality
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Gtm_Std_Tbu Tbu Basic Functionality
42 * \ingroup IfxLld_Gtm_Std
43 * \defgroup IfxLld_Gtm_Std_Tbu_Enumerations TBU Enumerations
44 * \ingroup IfxLld_Gtm_Std_Tbu
45 * \defgroup IfxLld_Gtm_Std_Tbu_Basic_Functions TBU Basic Functions
46 * \ingroup IfxLld_Gtm_Std_Tbu
47 */
48
49 #ifndef IFXGTM_TBU_H
50 #define IFXGTM_TBU_H 1
51
52 /******************************************************************************/
53 /*----------------------------------Includes----------------------------------*/
54 /******************************************************************************/
55
56 #include "_Impl/IfxGtm_cfg.h"
57
58 /******************************************************************************/
59 /*--------------------------------Enumerations--------------------------------*/
60 /******************************************************************************/
61
62 /** \addtogroup IfxLld_Gtm_Std_Tbu_Enumerations
63 * \{ */
64 /** \brief GTM TOM TBU Time stamps
65 */
66 typedef enum
67 {
68 IfxGtm_Tbu_Ts_0,
69 IfxGtm_Tbu_Ts_1,
70 IfxGtm_Tbu_Ts_2,
71 IfxGtm_Tbu_Ts_3
72 } IfxGtm_Tbu_Ts;
73
74 /** \} */
75
76 /** \addtogroup IfxLld_Gtm_Std_Tbu_Basic_Functions
77 * \{ */
78
79 /******************************************************************************/
80 /*-------------------------Inline Function Prototypes-------------------------*/
81 /******************************************************************************/
82
83 /** \brief Enables the channel
84 * \param gtm Pointer to GTM module
85 * \param channel TBU Time stamps
86 * \return None
87 */
88 IFX_INLINE void IfxGtm_Tbu_enableChannel(Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel);
89
90 /** \brief Function to check if a TBU channel is enabled.
91 * Returns TRUE if the corresponding channel is enabled
92 * Returns FALSE if the corresponding channel is disabled.
93 * \param gtm Pointer to GTM SFR
94 * \param channel Channel of TBU
95 * \return TRUE: channel is enabled
96 */
97 IFX_INLINE boolean IfxGtm_Tbu_isChannelEnabled(Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel);
98
99 /******************************************************************************/
100 /*-------------------------Global Function Prototypes-------------------------*/
101 /******************************************************************************/
102
103 /** \brief Returns the clock frequency
104 * \param gtm Pointer to GTM module
105 * \param channel TBU Time stamps
106 * \return frequency
107 */
108 IFX_EXTERN float32 IfxGtm_Tbu_getClockFrequency(Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel);
109
110 /** \} */
111
112 /******************************************************************************/
113 /*---------------------Inline Function Implementations------------------------*/
114 /******************************************************************************/
115
116 IFX_INLINE void IfxGtm_Tbu_enableChannel(Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel)
117 {
118 uint32 shift = channel * 2;
119
120 __ldmst_c(&gtm->TBU.CHEN.U, (3U << shift), (IfxGtm_FeatureControl_enable << shift));
121 }
122
123
124 IFX_INLINE boolean IfxGtm_Tbu_isChannelEnabled(Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel)
125 {
126 uint32 shift = channel * 2;
127 uint32 enable_status = (gtm->TBU.CHEN.U & ((uint32)3 << shift)) >> shift;
128
129 return enable_status == (uint32)IfxGtm_FeatureControl_enabled;
130 }
131
132
133 #endif /* IFXGTM_TBU_H */
IfxGtm_Tbu_enableChannel
IFX_INLINE void IfxGtm_Tbu_enableChannel(Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel)
Enables the channel.
Definition: IfxGtm_Tbu.h:116
IfxGtm_Tbu_Ts_0
Definition: IfxGtm_Tbu.h:68
IfxGtm_Tbu_Ts
IfxGtm_Tbu_Ts
GTM TOM TBU Time stamps.
Definition: IfxGtm_Tbu.h:66
uint32
unsigned long uint32
Definition: Platform_Types.h:116
float32
float float32
Definition: Platform_Types.h:170
__ldmst_c
IFX_INLINE void __ldmst_c(volatile void *address, unsigned mask, unsigned value)
Definition: IfxCpu_Intrinsics.h:108
IfxGtm_Tbu_isChannelEnabled
IFX_INLINE boolean IfxGtm_Tbu_isChannelEnabled(Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel)
Function to check if a TBU channel is enabled. Returns TRUE if the corresponding channel is enabled R...
Definition: IfxGtm_Tbu.h:124
IfxGtm_FeatureControl_enabled
enabled
Definition: IfxGtm_cfg.h:339
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxGtm_Tbu_Ts_3
Definition: IfxGtm_Tbu.h:71
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxGtm_Tbu_getClockFrequency
IFX_EXTERN float32 IfxGtm_Tbu_getClockFrequency(Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel)
Returns the clock frequency.
Definition: IfxGtm_Tbu.c:53
IfxGtm_FeatureControl_enable
enable
Definition: IfxGtm_cfg.h:338
IfxGtm_Tbu_Ts_1
Definition: IfxGtm_Tbu.h:69
IfxGtm_Tbu_Ts_2
Definition: IfxGtm_Tbu.h:70
IfxGtm_cfg.h
GTM on-chip implementation data.


iLLD_TC38A: IfxGtm_Tim.c Source File

  • Gtm
  • Std
IfxGtm_Tim.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Tim.c
3 * \brief GTM basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxGtm_Tim.h"
47
48 /******************************************************************************/
49 /*-------------------------Function Implementations---------------------------*/
50 /******************************************************************************/
51
52 float32 IfxGtm_Tim_Ch_getCaptureClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
53 {
54 IfxGtm_Cmu_Clk clock;
55
56 clock = IfxGtm_Tim_Ch_getCaptureClockSource(channel);
57
58 return IfxGtm_Cmu_getClkFrequency(gtm, clock, TRUE);
59 }
60
61
62 IfxGtm_Cmu_Clk IfxGtm_Tim_Ch_getCaptureClockSource(Ifx_GTM_TIM_CH *channel)
63 {
64 return (IfxGtm_Cmu_Clk)channel->CTRL.B.CLK_SEL;
65 }
66
67
68 float32 IfxGtm_Tim_Ch_getFilterClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
69 {
70 IfxGtm_Cmu_Tim_Filter_Clk filterClock;
71 IfxGtm_Cmu_Clk clock;
72
73 filterClock = IfxGtm_Tim_Ch_getFilterClockSource(channel);
74
75 switch (filterClock)
76 {
77 case IfxGtm_Cmu_Tim_Filter_Clk_0:
78 clock = IfxGtm_Cmu_Clk_0;
79 break;
80 case IfxGtm_Cmu_Tim_Filter_Clk_1:
81 clock = IfxGtm_Cmu_Clk_1;
82 break;
83 case IfxGtm_Cmu_Tim_Filter_Clk_6:
84 clock = IfxGtm_Cmu_Clk_6;
85 break;
86 case IfxGtm_Cmu_Tim_Filter_Clk_7:
87 clock = IfxGtm_Cmu_Clk_7;
88 break;
89 default:
90 clock = IfxGtm_Cmu_Clk_0; // This case never occurs
91 break;
92 }
93
94 return IfxGtm_Cmu_getClkFrequency(gtm, clock, TRUE);
95 }
96
97
98 IfxGtm_Cmu_Tim_Filter_Clk IfxGtm_Tim_Ch_getFilterClockSource(Ifx_GTM_TIM_CH *channel)
99 {
100 return (IfxGtm_Cmu_Tim_Filter_Clk)channel->CTRL.B.FLT_CNT_FRQ;
101 }
102
103
104 float32 IfxGtm_Tim_Ch_getTimeoutClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
105 {
106 IfxGtm_Cmu_Clk clock;
107
108 clock = IfxGtm_Tim_Ch_getTimeoutClockSource(channel);
109
110 return IfxGtm_Cmu_getClkFrequency(gtm, clock, TRUE);
111 }
112
113
114 IfxGtm_Cmu_Clk IfxGtm_Tim_Ch_getTimeoutClockSource(Ifx_GTM_TIM_CH *channel)
115 {
116 return (IfxGtm_Cmu_Clk)channel->TDUV.B.TCS;
117 }
118
119
120 void IfxGtm_Tim_Ch_setChannelNotification(Ifx_GTM_TIM_CH *channel, boolean irqOnNewVal, boolean irqOnCntOverflow, boolean irqOnEcntOverflow, boolean irqOnDatalost)
121 {
122 Ifx_GTM_TIM_CH_IRQ_EN en;
123 en.U = channel->IRQ.EN.U;
124
125 en.B.NEWVAL_IRQ_EN = irqOnNewVal ? 1 : 0;
126 en.B.CNTOFL_IRQ_EN = irqOnCntOverflow ? 1 : 0;
127 en.B.ECNTOFL_IRQ_EN = irqOnEcntOverflow ? 1 : 0;
128 en.B.GPROFL_IRQ_EN = irqOnDatalost ? 1 : 0;
129 channel->IRQ.EN.U = en.U;
130 }
131
132
133 void IfxGtm_Tim_Ch_setClockSource(Ifx_GTM_TIM_CH *channel, IfxGtm_Cmu_Clk clock)
134 {
135 channel->CTRL.B.CLK_SEL = clock;
136 }
137
138
139 void IfxGtm_Tim_Ch_setControl(Ifx_GTM_TIM_CH *channel, IfxGtm_Tim_ChannelControl control)
140 {
141 Ifx_GTM_TIM_CH_CTRL ctrl;
142 ctrl.U = channel->CTRL.U;
143 ctrl.B.TIM_EN = control.enable;
144 ctrl.B.TIM_MODE = control.mode;
145 ctrl.B.OSM = control.enableOneShotMode;
146 ctrl.B.ARU_EN = control.enableAruRouting;
147 ctrl.B.CICTRL = control.channelInputControl;
148 ctrl.B.GPR0_SEL = control.gpr0Sel;
149 ctrl.B.GPR1_SEL = control.gpr1Sel;
150 ctrl.B.CNTS_SEL = control.cntsSel;
151 ctrl.B.DSL = control.signalLevelControl;
152 ctrl.B.ISL = control.ignoreSignalLevel;
153 ctrl.B.ECNT_RESET = control.enableCounterReset;
154 ctrl.B.FLT_EN = control.enableFilter;
155 ctrl.B.FLT_CNT_FRQ = control.filterCounterFrequency;
156 ctrl.B.EXT_CAP_EN = control.enableExternalCaptureMode;
157
158 ctrl.B.FLT_MODE_RE = control.filterModeRisingEdge;
159 ctrl.B.FLT_CTR_RE = control.filterCounterModeRisingEdge;
160 ctrl.B.FLT_MODE_FE = control.filterModeFallingEdge;
161 ctrl.B.FLT_CTR_FE = control.filterCounterModeFallingEdge;
162 ctrl.B.CLK_SEL = control.clkSel;
163
164 ctrl.B.FR_ECNT_OFL = control.extendEdgeCounterOverflow;
165 ctrl.B.EGPR0_SEL = control.egpr0Sel;
166 ctrl.B.EGPR1_SEL = control.egpr1Sel;
167 ctrl.B.TOCTRL = control.timeoutControl;
168
169 channel->CTRL.U = ctrl.U;
170 }
171
172
173 void IfxGtm_Tim_Ch_setFilterNotification(Ifx_GTM_TIM_CH *channel, boolean irqOnGlitch)
174 {
175 Ifx_GTM_TIM_CH_IRQ_EN en;
176 en.U = channel->IRQ.EN.U;
177
178 en.B.GLITCHDET_IRQ_EN = irqOnGlitch ? 1 : 0;
179
180 channel->IRQ.EN.U = en.U;
181 }
182
183
184 void IfxGtm_Tim_Ch_setNotificationMode(Ifx_GTM_TIM_CH *channel, IfxGtm_IrqMode mode)
185 {
186 Ifx_GTM_TIM_CH_IRQ_EN en;
187 en.U = channel->IRQ.EN.U;
188
189 /* Disable all interrupts of the interrupt set to change mode */
190 channel->IRQ.EN.U = 0;
191 channel->IRQ.MODE.B.IRQ_MODE = mode;
192 channel->IRQ.EN.U = en.U; /* Set the values back */
193 }
194
195
196 void IfxGtm_Tim_Ch_setTimeoutNotification(Ifx_GTM_TIM_CH *channel, boolean irqOnTimeout)
197 {
198 Ifx_GTM_TIM_CH_IRQ_EN en;
199 en.U = channel->IRQ.EN.U;
200
201 en.B.TODET_IRQ_EN = irqOnTimeout ? 1 : 0;
202
203 channel->IRQ.EN.U = en.U;
204 }
IfxGtm_Tim_ChannelControl::filterCounterFrequency
IfxGtm_Tim_FilterCounterFreqSel filterCounterFrequency
Filter counter frequency select.
Definition: IfxGtm_Tim.h:190
IfxGtm_Tim_ChannelControl::gpr0Sel
IfxGtm_Tim_GprSel gpr0Sel
Selection for GPR0 register.
Definition: IfxGtm_Tim.h:173
IfxGtm_Tim_ChannelControl::ignoreSignalLevel
boolean ignoreSignalLevel
ignore Signal Level. 0- use DSL bit for selecting active signal level (TIEM). 1- ignore DSL and treat...
Definition: IfxGtm_Tim.h:182
IfxGtm_Tim_ChannelControl::filterModeRisingEdge
IfxGtm_Tim_FilterMode filterModeRisingEdge
Filter mode for rising edge.
Definition: IfxGtm_Tim.h:192
IfxGtm_Tim_ChannelControl::mode
IfxGtm_Tim_Mode mode
TIM channel Mode.
Definition: IfxGtm_Tim.h:166
IfxGtm_Tim_Ch_setTimeoutNotification
void IfxGtm_Tim_Ch_setTimeoutNotification(Ifx_GTM_TIM_CH *channel, boolean irqOnTimeout)
Set the timeout notification.
Definition: IfxGtm_Tim.c:196
IfxGtm_Tim_ChannelControl::clkSel
IfxGtm_Cmu_Clk clkSel
CMU clock source select for channel.
Definition: IfxGtm_Tim.h:196
IfxGtm_Cmu_Tim_Filter_Clk_6
FLT_CNT counts with CMU_CLK6.
Definition: IfxGtm_Cmu.h:98
float32
float float32
Definition: Platform_Types.h:170
IfxGtm_Tim_ChannelControl::enableCounterReset
boolean enableCounterReset
Enables resetting of counter in certain modes ( TIM_MODE=0b101 (TGPS) / TIM_MODE=0b000 (TPWM)) 0- ECN...
Definition: IfxGtm_Tim.h:185
IfxGtm_Tim_Ch_getFilterClockFrequency
float32 IfxGtm_Tim_Ch_getFilterClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Filter Clock Frequency.
Definition: IfxGtm_Tim.c:68
IfxGtm_Tim_ChannelControl::enableAruRouting
boolean enableAruRouting
GPR0 and GPR1 register values routed to ARU. 0- Registers content not routed. 1- Registers content ro...
Definition: IfxGtm_Tim.h:168
IfxGtm_Tim_ChannelControl::enable
boolean enable
TIM channel enable.
Definition: IfxGtm_Tim.h:165
IfxGtm_Tim_ChannelControl::gpr1Sel
IfxGtm_Tim_GprSel gpr1Sel
Selection for GPR1 register.
Definition: IfxGtm_Tim.h:174
IfxGtm_Tim_Ch_getCaptureClockFrequency
float32 IfxGtm_Tim_Ch_getCaptureClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Capture Clock Frequency.
Definition: IfxGtm_Tim.c:52
IfxGtm_Tim_ChannelControl
Channel control.
Definition: IfxGtm_Tim.h:163
IfxGtm_Cmu_Tim_Filter_Clk_1
FLT_CNT counts with CMU_CLK1.
Definition: IfxGtm_Cmu.h:97
IfxGtm_Cmu_Clk_0
Definition: IfxGtm_Cmu.h:66
IfxGtm_Tim_ChannelControl::filterCounterModeFallingEdge
IfxGtm_Tim_FilterCounter filterCounterModeFallingEdge
Filter counter mode for falling edge.
Definition: IfxGtm_Tim.h:195
IfxGtm_Tim.h
GTM basic functionality.
IfxGtm_Tim_ChannelControl::signalLevelControl
boolean signalLevelControl
Signal level control 0- Measurement starts with falling edge (low level measurement). 1- Measurement starts with rising edge (high level measurement) In TIM_MODE=0b110 (TSSM) the bit field DSL defines the shift direction. 0- Shift left 1- Shift right.
Definition: IfxGtm_Tim.h:176
IfxGtm_Cmu_Tim_Filter_Clk
IfxGtm_Cmu_Tim_Filter_Clk
Tim Filter counter frequency select.
Definition: IfxGtm_Cmu.h:94
IfxGtm_Cmu_Clk_6
Definition: IfxGtm_Cmu.h:72
IfxGtm_Tim_Ch_setFilterNotification
void IfxGtm_Tim_Ch_setFilterNotification(Ifx_GTM_TIM_CH *channel, boolean irqOnGlitch)
Set the filter notification.
Definition: IfxGtm_Tim.c:173
IfxGtm_Tim_Ch_setChannelNotification
void IfxGtm_Tim_Ch_setChannelNotification(Ifx_GTM_TIM_CH *channel, boolean irqOnNewVal, boolean irqOnCntOverflow, boolean irqOnEcntOverflow, boolean irqOnDatalost)
Set the channel notification.
Definition: IfxGtm_Tim.c:120
IfxGtm_Cmu_Tim_Filter_Clk_7
FLT_CNT counts with CMU_CLK7.
Definition: IfxGtm_Cmu.h:99
IfxGtm_Tim_Ch_setNotificationMode
void IfxGtm_Tim_Ch_setNotificationMode(Ifx_GTM_TIM_CH *channel, IfxGtm_IrqMode mode)
This function configures the TIM channel IRQ mode.
Definition: IfxGtm_Tim.c:184
IfxGtm_Tim_ChannelControl::filterCounterModeRisingEdge
IfxGtm_Tim_FilterCounter filterCounterModeRisingEdge
Filter counter mode for rising edge.
Definition: IfxGtm_Tim.h:193
IfxGtm_Tim_ChannelControl::enableOneShotMode
boolean enableOneShotMode
enable OneShot Mode (disable - continous operation mode)
Definition: IfxGtm_Tim.h:167
IfxGtm_Cmu_Clk
IfxGtm_Cmu_Clk
Definition: IfxGtm_Cmu.h:64
IfxGtm_Tim_ChannelControl::enableExternalCaptureMode
boolean enableExternalCaptureMode
Enables external capture mode.
Definition: IfxGtm_Tim.h:191
IfxGtm_Tim_ChannelControl::filterModeFallingEdge
IfxGtm_Tim_FilterMode filterModeFallingEdge
Filter mode for falling edge.
Definition: IfxGtm_Tim.h:194
IfxGtm_Tim_Ch_getTimeoutClockFrequency
float32 IfxGtm_Tim_Ch_getTimeoutClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Timeout Clock Frequency.
Definition: IfxGtm_Tim.c:104
IfxGtm_Tim_ChannelControl::cntsSel
IfxGtm_Tim_CntsSel cntsSel
Selection for CNTS register.
Definition: IfxGtm_Tim.h:175
IfxGtm_Tim_ChannelControl::enableFilter
boolean enableFilter
enable Filter
Definition: IfxGtm_Tim.h:189
IfxGtm_Tim_ChannelControl::timeoutControl
IfxGtm_Tim_Timeout timeoutControl
Timeout control.
Definition: IfxGtm_Tim.h:202
IfxGtm_Tim_Ch_getTimeoutClockSource
IfxGtm_Cmu_Clk IfxGtm_Tim_Ch_getTimeoutClockSource(Ifx_GTM_TIM_CH *channel)
Returns the Timeout clock source selected.
Definition: IfxGtm_Tim.c:114
IfxGtm_Tim_Ch_setClockSource
void IfxGtm_Tim_Ch_setClockSource(Ifx_GTM_TIM_CH *channel, IfxGtm_Cmu_Clk clock)
Set the channel clock source.
Definition: IfxGtm_Tim.c:133
IfxGtm_Tim_ChannelControl::egpr1Sel
boolean egpr1Sel
Extension of GPR1_SEL bit field.
Definition: IfxGtm_Tim.h:201
IfxGtm_Tim_ChannelControl::egpr0Sel
boolean egpr0Sel
Extension of GPR0_SEL bit field.
Definition: IfxGtm_Tim.h:200
IfxGtm_IrqMode
IfxGtm_IrqMode
Enum for GTM interrupt modes.
Definition: IfxGtm.h:64
IfxGtm_Tim_Ch_setControl
void IfxGtm_Tim_Ch_setControl(Ifx_GTM_TIM_CH *channel, IfxGtm_Tim_ChannelControl control)
This function configures the TIM channel Control register.
Definition: IfxGtm_Tim.c:139
IfxGtm_Tim_Ch_getCaptureClockSource
IfxGtm_Cmu_Clk IfxGtm_Tim_Ch_getCaptureClockSource(Ifx_GTM_TIM_CH *channel)
Returns the capture clock source selected.
Definition: IfxGtm_Tim.c:62
IfxGtm_Tim_ChannelControl::channelInputControl
boolean channelInputControl
0- use signal TIM_IN(x) as input for channel . 1- use signal TIM_IN(x-1) as input for channel x (or T...
Definition: IfxGtm_Tim.h:171
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxGtm_Cmu_Clk_1
Definition: IfxGtm_Cmu.h:67
IfxGtm_Cmu_Tim_Filter_Clk_0
FLT_CNT counts with CMU_CLK0.
Definition: IfxGtm_Cmu.h:96
IfxGtm_Cmu_getClkFrequency
float32 IfxGtm_Cmu_getClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean assumeEnabled)
Returns the GTM configurable clock frequency in Hz.
Definition: IfxGtm_Cmu.c:64
IfxGtm_Tim_Ch_getFilterClockSource
IfxGtm_Cmu_Tim_Filter_Clk IfxGtm_Tim_Ch_getFilterClockSource(Ifx_GTM_TIM_CH *channel)
Returns the Filter clock source selected.
Definition: IfxGtm_Tim.c:98
IfxGtm_Cmu_Clk_7
Definition: IfxGtm_Cmu.h:73
IfxGtm_Tim_ChannelControl::extendEdgeCounterOverflow
boolean extendEdgeCounterOverflow
Extended Edge counter overflow behavior 0- Overflow will be signaled on ECNT bit width = 8 1- Overflo...
Definition: IfxGtm_Tim.h:197


iLLD_TC38A: IfxGtm_Tim.h Source File

  • Gtm
  • Std
IfxGtm_Tim.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Tim.h
3 * \brief GTM basic functionality
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 *
43 * \defgroup IfxLld_Gtm_Std_Tim Tim Basic Functionality
44 * \ingroup IfxLld_Gtm_Std
45 * \defgroup IfxLld_Gtm_Std_Tim_Enumerations TIM Enumerations
46 * \ingroup IfxLld_Gtm_Std_Tim
47 * \defgroup IfxLld_Gtm_Std_Tim_Channel_Functions TIM Channel Functions
48 * \ingroup IfxLld_Gtm_Std_Tim
49 */
50
51 #ifndef IFXGTM_TIM_H
52 #define IFXGTM_TIM_H 1
53
54 /******************************************************************************/
55 /*----------------------------------Includes----------------------------------*/
56 /******************************************************************************/
57
58 #include "_Impl/IfxGtm_cfg.h"
59 #include "Src/Std/IfxSrc.h"
60 #include "IfxGtm.h"
61 #include "IfxGtm_Cmu.h"
62 #include "IfxGtm_bf.h"
63 #include "Cpu/Std/IfxCpu_Intrinsics.h"
64
65 /******************************************************************************/
66 /*--------------------------------Enumerations--------------------------------*/
67 /******************************************************************************/
68
69 /** \addtogroup IfxLld_Gtm_Std_Tim_Enumerations
70 * \{ */
71 typedef enum
72 {
73 IfxGtm_Tim_CntsSel_cntReg = 0,
74 IfxGtm_Tim_CntsSel_tbuTs0
75 } IfxGtm_Tim_CntsSel;
76
77 /** \brief Enum for Filter counter
78 */
79 typedef enum
80 {
81 IfxGtm_Tim_FilterCounter_upDown = 0,
82 IfxGtm_Tim_FilterCounter_hold
83 } IfxGtm_Tim_FilterCounter;
84
85 /** \brief Enum for Filter counter Frequency Selection
86 */
87 typedef enum
88 {
89 IfxGtm_Tim_FilterCounterFreqSel_cmuClk0 = 0, /**< \brief FLT_CNT counts with CMU_CLK0 */
90 IfxGtm_Tim_FilterCounterFreqSel_cmuClk1 = 1, /**< \brief FLT_CNT counts with CMU_CLK1 */
91 IfxGtm_Tim_FilterCounterFreqSel_cmuClk6 = 2, /**< \brief FLT_CNT counts with CMU_CLK6 */
92 IfxGtm_Tim_FilterCounterFreqSel_cmuClk7 = 3 /**< \brief FLT_CNT counts with CMU_CLK7 */
93 } IfxGtm_Tim_FilterCounterFreqSel;
94
95 /** \brief Enum for Filter mode
96 */
97 typedef enum
98 {
99 IfxGtm_Tim_FilterMode_immediateEdgePropagation = 0, /**< \brief Immediate edge Propagation mode */
100 IfxGtm_Tim_FilterMode_individualDeglitchTime /**< \brief Individual deglitch mode */
101 } IfxGtm_Tim_FilterMode;
102
103 typedef enum
104 {
105 IfxGtm_Tim_GprSel_tbuTs0 = 0,
106 IfxGtm_Tim_GprSel_tbuTs1,
107 IfxGtm_Tim_GprSel_tbuTs2,
108 IfxGtm_Tim_GprSel_cnts
109 } IfxGtm_Tim_GprSel;
110
111 typedef enum
112 {
113 IfxGtm_Tim_Input_currentChannel = 0,
114 IfxGtm_Tim_Input_adjacentChannel
115 } IfxGtm_Tim_Input;
116
117 typedef enum
118 {
119 IfxGtm_Tim_IrqMode_level = 0, /**< \brief Level Mode */
120 IfxGtm_Tim_IrqMode_pulse, /**< \brief Pulse Mode */
121 IfxGtm_Tim_IrqMode_pulseNotify, /**< \brief pulse notify Mode */
122 IfxGtm_Tim_IrqMode_singlePulseMode, /**< \brief Single Pulse Mode */
123 IfxGtm_Tim_IrqMode_none = -1 /**< \brief none */
124 } IfxGtm_Tim_IrqMode;
125
126 typedef enum
127 {
128 IfxGtm_Tim_IrqType_newVal = 0, /**< \brief New measurement value detected by SMU of channel */
129 IfxGtm_Tim_IrqType_ecntOverflow = 1, /**< \brief ECNT counter overflow of channel */
130 IfxGtm_Tim_IrqType_cntOverflow = 2, /**< \brief CNT counter overflow of channel */
131 IfxGtm_Tim_IrqType_gprOverflow = 3, /**< \brief GPR0 and GPR1 data overflow */
132 IfxGtm_Tim_IrqType_timeoutDetect = 4, /**< \brief Time out reached for input signal of channel */
133 IfxGtm_Tim_IrqType_glitchDetect = 5 /**< \brief A glitch was detected by the TIM filter of channel */
134 } IfxGtm_Tim_IrqType;
135
136 typedef enum
137 {
138 IfxGtm_Tim_Mode_pwmMeasurement = 0, /**< \brief TPWM */
139 IfxGtm_Tim_Mode_pulseIntegration, /**< \brief TPIM */
140 IfxGtm_Tim_Mode_inputEvent, /**< \brief TIEM */
141 IfxGtm_Tim_Mode_inputPrescaler, /**< \brief TIPM */
142 IfxGtm_Tim_Mode_bitCompression /**< \brief TBCM */
143 } IfxGtm_Tim_Mode;
144
145 /** \brief Enum for Timeout control
146 */
147 typedef enum
148 {
149 IfxGtm_Tim_Timeout_disabled, /**< \brief Timeout feature disabled */
150 IfxGtm_Tim_Timeout_risingEdge, /**< \brief Timeout feature enabled for rising edge only */
151 IfxGtm_Tim_Timeout_fallingEdge, /**< \brief Timeout feature enabled for falling edge only */
152 IfxGtm_Tim_Timeout_bothEdge /**< \brief Timeout feature enabled for both edges */
153 } IfxGtm_Tim_Timeout;
154
155 /** \} */
156
157 /******************************************************************************/
158 /*-----------------------------Data Structures--------------------------------*/
159 /******************************************************************************/
160
161 /** \brief Channel control
162 */
163 typedef struct
164 {
165 boolean enable; /**< \brief TIM channel enable */
166 IfxGtm_Tim_Mode mode; /**< \brief TIM channel Mode */
167 boolean enableOneShotMode; /**< \brief enable OneShot Mode (disable - continous operation mode) */
168 boolean enableAruRouting; /**< \brief GPR0 and GPR1 register values routed to ARU.
169 * 0- Registers content not routed.
170 * 1- Registers content routed */
171 boolean channelInputControl; /**< \brief 0- use signal TIM_IN(x) as input for channel .
172 * 1- use signal TIM_IN(x-1) as input for channel x (or TIM_IN(m-1) if x is 0) */
173 IfxGtm_Tim_GprSel gpr0Sel; /**< \brief Selection for GPR0 register */
174 IfxGtm_Tim_GprSel gpr1Sel; /**< \brief Selection for GPR1 register */
175 IfxGtm_Tim_CntsSel cntsSel; /**< \brief Selection for CNTS register */
176 boolean signalLevelControl; /**< \brief Signal level control
177 * 0- Measurement starts with falling edge (low level measurement).
178 * 1- Measurement starts with rising edge (high level measurement)
179 * In TIM_MODE=0b110 (TSSM) the bit field DSL defines the shift direction.
180 * 0- Shift left
181 * 1- Shift right */
182 boolean ignoreSignalLevel; /**< \brief ignore Signal Level.
183 * 0- use DSL bit for selecting active signal level (TIEM).
184 * 1- ignore DSL and treat both edges as active edge (TIEM). */
185 boolean enableCounterReset; /**< \brief Enables resetting of counter in certain modes ( TIM_MODE=0b101 (TGPS) / TIM_MODE=0b000 (TPWM))
186 * 0- ECNT counter operating in wrap around mode / ECNT counter operating in wrap around mode, CNT is reset on active input edge defined by DSL
187 * 1 - ECNT counter is reset with periodic sampling / ECNT counter operating in wrap around mode, CNT is reset on active and inactive input edge else ECNT counter operating in wrap around mode;
188 * In TIM_MODE=0b110 (TSSM) the bit field ECNT_RESET defines the initial polarity for the shift register. */
189 boolean enableFilter; /**< \brief enable Filter */
190 IfxGtm_Tim_FilterCounterFreqSel filterCounterFrequency; /**< \brief Filter counter frequency select */
191 boolean enableExternalCaptureMode; /**< \brief Enables external capture mode */
192 IfxGtm_Tim_FilterMode filterModeRisingEdge; /**< \brief Filter mode for rising edge */
193 IfxGtm_Tim_FilterCounter filterCounterModeRisingEdge; /**< \brief Filter counter mode for rising edge */
194 IfxGtm_Tim_FilterMode filterModeFallingEdge; /**< \brief Filter mode for falling edge */
195 IfxGtm_Tim_FilterCounter filterCounterModeFallingEdge; /**< \brief Filter counter mode for falling edge */
196 IfxGtm_Cmu_Clk clkSel; /**< \brief CMU clock source select for channel */
197 boolean extendEdgeCounterOverflow; /**< \brief Extended Edge counter overflow behavior
198 * 0- Overflow will be signaled on ECNT bit width = 8
199 * 1- Overflow will be signaled on EECNT bit width (full range) */
200 boolean egpr0Sel; /**< \brief Extension of GPR0_SEL bit field */
201 boolean egpr1Sel; /**< \brief Extension of GPR1_SEL bit field */
202 IfxGtm_Tim_Timeout timeoutControl; /**< \brief Timeout control */
203 } IfxGtm_Tim_ChannelControl;
204
205 typedef struct
206 {
207 uint8 mode; /**< \brief Input source to Channel. multi-core encoding in use (MODE_x(1) defines the state of the signal)
208 * 00- State is 0 (ignore write access)
209 * 01- Change state to 0
210 * 10- Change state to 1
211 * 11- State is 1 (ignore write access) */
212 uint8 value;
213 } IfxGtm_Tim_InputSourceSelect;
214
215 /** \addtogroup IfxLld_Gtm_Std_Tim_Channel_Functions
216 * \{ */
217
218 /******************************************************************************/
219 /*-------------------------Inline Function Prototypes-------------------------*/
220 /******************************************************************************/
221
222 /** \brief This function clears the Aux input Source selection for the given channel
223 * \param gtm Pointer to GTM module
224 * \param timIndex TIM instance number
225 * \param channel Channel index
226 * \return None
227 */
228 IFX_INLINE void IfxGtm_Tim_Ch_clearAuxInputSourceSelection(Ifx_GTM *gtm, IfxGtm_Tim timIndex, IfxGtm_Tim_Ch channel);
229
230 /** \brief Clears the counter overflow flag
231 * \param channel TIM channel pointer
232 * \return None
233 */
234 IFX_INLINE void IfxGtm_Tim_Ch_clearCntOverflowEvent(Ifx_GTM_TIM_CH *channel);
235
236 /** \brief Clears the data lost flag
237 * \param channel TIM channel pointer
238 * \return None
239 */
240 IFX_INLINE void IfxGtm_Tim_Ch_clearDataLostEvent(Ifx_GTM_TIM_CH *channel);
241
242 /** \brief Clears the event counter overflow flag
243 * \param channel TIM channel pointer
244 * \return None
245 */
246 IFX_INLINE void IfxGtm_Tim_Ch_clearEcntOverflowEvent(Ifx_GTM_TIM_CH *channel);
247
248 /** \brief Clears the glitch flag
249 * \param channel TIM channel pointer
250 * \return None
251 */
252 IFX_INLINE void IfxGtm_Tim_Ch_clearGlitchEvent(Ifx_GTM_TIM_CH *channel);
253
254 /** \brief Clears the new value flag
255 * \param channel TIM channel pointer
256 * \return None
257 */
258 IFX_INLINE void IfxGtm_Tim_Ch_clearNewValueEvent(Ifx_GTM_TIM_CH *channel);
259
260 /** \brief Clear the interrupt notification.
261 * \param channel TIM channel pointer
262 * \param irqType Interrupt type
263 * \return None
264 */
265 IFX_INLINE void IfxGtm_Tim_Ch_clearNotification(Ifx_GTM_TIM_CH *channel, IfxGtm_Tim_IrqType irqType);
266
267 /** \brief Returns the status of channel notification
268 * \param channel TIM channel pointer
269 * \param irqType Interrupt type
270 * \return Status of channel notification
271 */
272 IFX_INLINE boolean IfxGtm_Tim_Ch_getNotification(Ifx_GTM_TIM_CH *channel, IfxGtm_Tim_IrqType irqType);
273
274 /** \brief Returns a pointer to the TIM channel SRC
275 * \param gtm Pointer to GTM module
276 * \param tim Specifies the tim module no
277 * \param channel Channel index
278 * \return Pointer to the TIM channel SRC
279 */
280 IFX_INLINE volatile Ifx_SRC_SRCR *IfxGtm_Tim_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Tim tim, IfxGtm_Tim_Ch channel);
281
282 /** \brief Test the counter overflow flag
283 * \param channel TIM channel pointer
284 * \return TRUE if the flag is set, else FALSE
285 */
286 IFX_INLINE boolean IfxGtm_Tim_Ch_isCntOverflowEvent(Ifx_GTM_TIM_CH *channel);
287
288 /** \brief Test the data lost flag
289 * \param channel TIM channel pointer
290 * \return TRUE if the flag is set, else FALSE
291 */
292 IFX_INLINE boolean IfxGtm_Tim_Ch_isDataLostEvent(Ifx_GTM_TIM_CH *channel);
293
294 /** \brief Test the event counter overflow flag
295 * \param channel TIM channel pointer
296 * \return TRUE if the flag is set, else FALSE
297 */
298 IFX_INLINE boolean IfxGtm_Tim_Ch_isEcntOverflowEvent(Ifx_GTM_TIM_CH *channel);
299
300 /** \brief Test the glitch flag
301 * \param channel TIM channel pointer
302 * \return TRUE if the flag is set, else FALSE
303 */
304 IFX_INLINE boolean IfxGtm_Tim_Ch_isGlitchEvent(Ifx_GTM_TIM_CH *channel);
305
306 /** \brief Test the new value flag
307 * \param channel TIM channel pointer
308 * \return TRUE if the flag is set, else FALSE
309 */
310 IFX_INLINE boolean IfxGtm_Tim_Ch_isNewValueEvent(Ifx_GTM_TIM_CH *channel);
311
312 /** \brief set the Auxilary input source selection of a particular channel.
313 * \param gtm Pointer to GTM module
314 * \param timIndex TIM instance number
315 * \param channel Channel index
316 * \return None
317 */
318 IFX_INLINE void IfxGtm_Tim_Ch_setAuxInputSourceSelection(Ifx_GTM *gtm, IfxGtm_Tim timIndex, IfxGtm_Tim_Ch channel);
319
320 /** \brief This function configures the Edge counter register.
321 * \param channel TIM channel pointer
322 * \param edgeCounter Edge counter value
323 * \return None
324 */
325 IFX_INLINE void IfxGtm_Tim_Ch_setEdgeCounter(Ifx_GTM_TIM_CH *channel, uint8 edgeCounter);
326
327 /** \brief This function configures the Falling edge Filter Parameter.
328 * \param channel TIM channel pointer
329 * \param filterTime Falling edge Filter Parameter.
330 * \return None
331 */
332 IFX_INLINE void IfxGtm_Tim_Ch_setFallingEdgeFilterTime(Ifx_GTM_TIM_CH *channel, uint32 filterTime);
333
334 /** \brief This function configures the Input source selection register.
335 * \param tim TIM instance number
336 * \param channel Channel index
337 * \param inputSource Input source to Channel
338 * \return None
339 */
340 IFX_INLINE void IfxGtm_Tim_Ch_setInputSourceSelection(Ifx_GTM_TIM *tim, IfxGtm_Tim_Ch channel, IfxGtm_Tim_InputSourceSelect inputSource);
341
342 /** \brief set the Interrupt Notification
343 * \param channel TIM channel pointer
344 * \param irqType Interrupt type
345 * \return None
346 */
347 IFX_INLINE void IfxGtm_Tim_Ch_setNotification(Ifx_GTM_TIM_CH *channel, IfxGtm_Tim_IrqType irqType);
348
349 /** \brief This function configures theRaising edge Filter Parameter.
350 * \param channel TIM channel pointer
351 * \param filterTime Raising edge Filter Parameter.
352 * \return None
353 */
354 IFX_INLINE void IfxGtm_Tim_Ch_setRisingEdgeFilterTime(Ifx_GTM_TIM_CH *channel, uint32 filterTime);
355
356 /** \brief This function configures the Shadow counter register.
357 * \param channel TIM channel pointer
358 * \param shadowCounter Shadow counter value
359 * \return None
360 */
361 IFX_INLINE void IfxGtm_Tim_Ch_setShadowCounter(Ifx_GTM_TIM_CH *channel, uint32 shadowCounter);
362
363 /** \brief Returns the pointer to the TIM channel
364 * \param tim Pointer to Tim base
365 * \param channel TIM channel
366 * \return Pointer to TIM channel base
367 */
368 IFX_INLINE Ifx_GTM_TIM_CH *IfxGtm_Tim_getChannel(Ifx_GTM_TIM *tim, IfxGtm_Tim_Ch channel);
369
370 /** \brief Reset the specified TIM channel
371 * \param tim Pointer to GTM TIM instance
372 * \param channel Channel index
373 * \return None
374 */
375 IFX_INLINE void IfxGtm_Tim_Ch_resetChannel(Ifx_GTM_TIM *tim, IfxGtm_Tim_Ch channel);
376
377 /******************************************************************************/
378 /*-------------------------Global Function Prototypes-------------------------*/
379 /******************************************************************************/
380
381 /** \brief Returns the Capture Clock Frequency
382 * \param gtm Pointer to GTM module
383 * \param channel Pointer to TIM channel base
384 * \return Capture clock frequency
385 */
386 IFX_EXTERN float32 IfxGtm_Tim_Ch_getCaptureClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel);
387
388 /** \brief Returns the capture clock source selected
389 * \param channel TIM channel pointer
390 * \return capture clock source
391 */
392 IFX_EXTERN IfxGtm_Cmu_Clk IfxGtm_Tim_Ch_getCaptureClockSource(Ifx_GTM_TIM_CH *channel);
393
394 /** \brief Returns the Filter Clock Frequency
395 * \param gtm Pointer to GTM module
396 * \param channel Pointer to TIM channel base
397 * \return Filter clock frequency
398 */
399 IFX_EXTERN float32 IfxGtm_Tim_Ch_getFilterClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel);
400
401 /** \brief Returns the Filter clock source selected
402 * \param channel TIM channel pointer
403 * \return Filter clock source
404 */
405 IFX_EXTERN IfxGtm_Cmu_Tim_Filter_Clk IfxGtm_Tim_Ch_getFilterClockSource(Ifx_GTM_TIM_CH *channel);
406
407 /** \brief Returns the Timeout Clock Frequency
408 * \param gtm Pointer to GTM module
409 * \param channel Pointer to TIM channel base
410 * \return Timeout clock frequency
411 */
412 IFX_EXTERN float32 IfxGtm_Tim_Ch_getTimeoutClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel);
413
414 /** \brief Returns the Timeout clock source selected
415 * \param channel TIM channel pointer
416 * \return Timeout clock source
417 */
418 IFX_EXTERN IfxGtm_Cmu_Clk IfxGtm_Tim_Ch_getTimeoutClockSource(Ifx_GTM_TIM_CH *channel);
419
420 /** \brief Set the channel notification
421 * \param channel TIM channel pointer
422 * \param irqOnNewVal If TRUE, the interrupt on new value is enabled
423 * \param irqOnCntOverflow If TRUE, the interrupt on CNT overflow is enabled
424 * \param irqOnEcntOverflow If TRUE, the interrupt on ECNT overflow is enabled
425 * \param irqOnDatalost If TRUE, the interrupt on data lost (GPR0, GPR1) is enabled
426 * \return None
427 */
428 IFX_EXTERN void IfxGtm_Tim_Ch_setChannelNotification(Ifx_GTM_TIM_CH *channel, boolean irqOnNewVal, boolean irqOnCntOverflow, boolean irqOnEcntOverflow, boolean irqOnDatalost);
429
430 /** \brief Set the channel clock source
431 * \param channel TIM channel pointer
432 * \param clock Selected clock
433 * \return None
434 */
435 IFX_EXTERN void IfxGtm_Tim_Ch_setClockSource(Ifx_GTM_TIM_CH *channel, IfxGtm_Cmu_Clk clock);
436
437 /** \brief This function configures the TIM channel Control register
438 * \param channel TIM channel pointer
439 * \param control channel control configuration
440 * \return None
441 */
442 IFX_EXTERN void IfxGtm_Tim_Ch_setControl(Ifx_GTM_TIM_CH *channel, IfxGtm_Tim_ChannelControl control);
443
444 /** \brief Set the filter notification
445 * \param channel TIM channel pointer
446 * \param irqOnGlitch If TRUE, the interrupt on glitch is enabled
447 * \return None
448 */
449 IFX_EXTERN void IfxGtm_Tim_Ch_setFilterNotification(Ifx_GTM_TIM_CH *channel, boolean irqOnGlitch);
450
451 /** \brief This function configures the TIM channel IRQ mode
452 * \param channel TIM channel pointer
453 * \param mode Notification Mode
454 * \return None
455 */
456 IFX_EXTERN void IfxGtm_Tim_Ch_setNotificationMode(Ifx_GTM_TIM_CH *channel, IfxGtm_IrqMode mode);
457
458 /** \brief Set the timeout notification
459 * \param channel TIM channel pointer
460 * \param irqOnTimeout If TRUE, the interrupt on timeout is enabled
461 * \return None
462 */
463 IFX_EXTERN void IfxGtm_Tim_Ch_setTimeoutNotification(Ifx_GTM_TIM_CH *channel, boolean irqOnTimeout);
464
465 /** \} */
466
467 /******************************************************************************/
468 /*-------------------------Inline Function Prototypes-------------------------*/
469 /******************************************************************************/
470
471 /** \brief sets the TIMINSEL register with the required mux setting
472 * \param timIndex Index of TIM module
473 * \param channelIndex index of TIM channel
474 * \param tinSel MUX value selection
475 * \return None
476 */
477 IFX_INLINE void IfxGtm_Tim_Ch_setTimTin(IfxGtm_Tim timIndex, IfxGtm_Tim_Ch channelIndex, uint32 tinSel);
478
479 /******************************************************************************/
480 /*---------------------Inline Function Implementations------------------------*/
481 /******************************************************************************/
482
483 IFX_INLINE void IfxGtm_Tim_Ch_clearAuxInputSourceSelection(Ifx_GTM *gtm, IfxGtm_Tim timIndex, IfxGtm_Tim_Ch channel)
484 {
485 Ifx_GTM_AUX_IN_SRC src;
486 src.TIM[timIndex].U = gtm->AUX_IN_SRC.TIM[timIndex].U;
487 src.TIM[timIndex].U &= ~(1 << (uint8)channel);
488 gtm->AUX_IN_SRC.TIM[timIndex].U = src.TIM[timIndex].U;
489 }
490
491
492 IFX_INLINE void IfxGtm_Tim_Ch_clearCntOverflowEvent(Ifx_GTM_TIM_CH *channel)
493 {
494 channel->IRQ.NOTIFY.U = 0x1 << IFX_GTM_TIM_CH_IRQ_NOTIFY_CNTOFL_OFF;
495 }
496
497
498 IFX_INLINE void IfxGtm_Tim_Ch_clearDataLostEvent(Ifx_GTM_TIM_CH *channel)
499 {
500 channel->IRQ.NOTIFY.U = 0x1 << IFX_GTM_TIM_CH_IRQ_NOTIFY_GPROFL_OFF;
501 }
502
503
504 IFX_INLINE void IfxGtm_Tim_Ch_clearEcntOverflowEvent(Ifx_GTM_TIM_CH *channel)
505 {
506 channel->IRQ.NOTIFY.U = 0x1 << IFX_GTM_TIM_CH_IRQ_NOTIFY_ECNTOFL_OFF;
507 }
508
509
510 IFX_INLINE void IfxGtm_Tim_Ch_clearGlitchEvent(Ifx_GTM_TIM_CH *channel)
511 {
512 channel->IRQ.NOTIFY.U = 0x1 << IFX_GTM_TIM_CH_IRQ_NOTIFY_GLITCHDET_OFF;
513 }
514
515
516 IFX_INLINE void IfxGtm_Tim_Ch_clearNewValueEvent(Ifx_GTM_TIM_CH *channel)
517 {
518 channel->IRQ.NOTIFY.U = 0x1 << IFX_GTM_TIM_CH_IRQ_NOTIFY_NEWVAL_OFF;
519 }
520
521
522 IFX_INLINE void IfxGtm_Tim_Ch_clearNotification(Ifx_GTM_TIM_CH *channel, IfxGtm_Tim_IrqType irqType)
523 {
524 channel->IRQ.EN.U &= ~(1 << irqType);
525 channel->IRQ.NOTIFY.U = (1 << irqType);
526 }
527
528
529 IFX_INLINE boolean IfxGtm_Tim_Ch_getNotification(Ifx_GTM_TIM_CH *channel, IfxGtm_Tim_IrqType irqType)
530 {
531 boolean result;
532 result = ((channel->IRQ.NOTIFY.U >> irqType) & 0x1);
533 return result;
534 }
535
536
537 IFX_INLINE volatile Ifx_SRC_SRCR *IfxGtm_Tim_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Tim tim, IfxGtm_Tim_Ch channel)
538 {
539 IFX_UNUSED_PARAMETER(gtm)
540 return &MODULE_SRC.GTM_TIM[tim][channel];
541 }
542
543
544 IFX_INLINE boolean IfxGtm_Tim_Ch_isCntOverflowEvent(Ifx_GTM_TIM_CH *channel)
545 {
546 return channel->IRQ.NOTIFY.B.CNTOFL == 1;
547 }
548
549
550 IFX_INLINE boolean IfxGtm_Tim_Ch_isDataLostEvent(Ifx_GTM_TIM_CH *channel)
551 {
552 return channel->IRQ.NOTIFY.B.GPROFL == 1;
553 }
554
555
556 IFX_INLINE boolean IfxGtm_Tim_Ch_isEcntOverflowEvent(Ifx_GTM_TIM_CH *channel)
557 {
558 return channel->IRQ.NOTIFY.B.ECNTOFL == 1;
559 }
560
561
562 IFX_INLINE boolean IfxGtm_Tim_Ch_isGlitchEvent(Ifx_GTM_TIM_CH *channel)
563 {
564 return channel->IRQ.NOTIFY.B.GLITCHDET == 1;
565 }
566
567
568 IFX_INLINE boolean IfxGtm_Tim_Ch_isNewValueEvent(Ifx_GTM_TIM_CH *channel)
569 {
570 return channel->IRQ.NOTIFY.B.NEWVAL == 1;
571 }
572
573
574 IFX_INLINE void IfxGtm_Tim_Ch_setAuxInputSourceSelection(Ifx_GTM *gtm, IfxGtm_Tim timIndex, IfxGtm_Tim_Ch channel)
575 {
576 Ifx_GTM_AUX_IN_SRC src;
577 src.TIM[timIndex].U = gtm->AUX_IN_SRC.TIM[timIndex].U;
578 src.TIM[timIndex].U |= (1 << (uint8)channel);
579 gtm->AUX_IN_SRC.TIM[timIndex].U = src.TIM[timIndex].U;
580 }
581
582
583 IFX_INLINE void IfxGtm_Tim_Ch_setEdgeCounter(Ifx_GTM_TIM_CH *channel, uint8 edgeCounter)
584 {
585 channel->CNTS.B.ECNT = edgeCounter;
586 }
587
588
589 IFX_INLINE void IfxGtm_Tim_Ch_setFallingEdgeFilterTime(Ifx_GTM_TIM_CH *channel, uint32 filterTime)
590 {
591 channel->FLT_FE.B.FLT_FE = filterTime;
592 }
593
594
595 IFX_INLINE void IfxGtm_Tim_Ch_setInputSourceSelection(Ifx_GTM_TIM *tim, IfxGtm_Tim_Ch channel, IfxGtm_Tim_InputSourceSelect inputSource)
596 {
597 uint8 bitPos = 1U << ((uint8)channel);
598
599 __imaskldmst((void *)&tim->IN_SRC.U, inputSource.mode, bitPos, 2);
600 __imaskldmst((void *)&tim->IN_SRC.U, inputSource.value, (bitPos + 2), 2);
601 }
602
603
604 IFX_INLINE void IfxGtm_Tim_Ch_setNotification(Ifx_GTM_TIM_CH *channel, IfxGtm_Tim_IrqType irqType)
605 {
606 channel->IRQ.EN.U |= 1 << irqType;
607 channel->IRQ.NOTIFY.U |= 1 << irqType;
608 }
609
610
611 IFX_INLINE void IfxGtm_Tim_Ch_setRisingEdgeFilterTime(Ifx_GTM_TIM_CH *channel, uint32 filterTime)
612 {
613 channel->FLT_RE.B.FLT_RE = filterTime;
614 }
615
616
617 IFX_INLINE void IfxGtm_Tim_Ch_setShadowCounter(Ifx_GTM_TIM_CH *channel, uint32 shadowCounter)
618 {
619 channel->CNTS.B.CNTS = shadowCounter;
620 }
621
622
623 IFX_INLINE Ifx_GTM_TIM_CH *IfxGtm_Tim_getChannel(Ifx_GTM_TIM *tim, IfxGtm_Tim_Ch channel)
624 {
625 return (Ifx_GTM_TIM_CH *)((uint32)&tim->CH0.GPR0.U + ((uint32)&tim->CH1 - (uint32)&tim->CH0) * channel);
626 }
627
628
629 IFX_INLINE void IfxGtm_Tim_Ch_resetChannel(Ifx_GTM_TIM *tim, IfxGtm_Tim_Ch channel)
630 {
631 tim->RST.U |= (uint32)1 << (uint32)channel;
632 }
633
634
635 IFX_INLINE void IfxGtm_Tim_Ch_setTimTin(IfxGtm_Tim timIndex, IfxGtm_Tim_Ch channelIndex, uint32 tinSel)
636 {
637 uint32 shift = channelIndex * 4;
638
639 __ldmst_c(&(MODULE_GTM.TIMINSEL[timIndex].U), (0xFU << shift), (tinSel) << shift);
640 }
641
642
643 #endif /* IFXGTM_TIM_H */
IfxGtm_Tim_GprSel_tbuTs2
Definition: IfxGtm_Tim.h:107
IfxGtm_Tim_ChannelControl::filterCounterFrequency
IfxGtm_Tim_FilterCounterFreqSel filterCounterFrequency
Filter counter frequency select.
Definition: IfxGtm_Tim.h:190
IfxGtm_Tim_ChannelControl::gpr0Sel
IfxGtm_Tim_GprSel gpr0Sel
Selection for GPR0 register.
Definition: IfxGtm_Tim.h:173
IfxGtm_Tim_ChannelControl::ignoreSignalLevel
boolean ignoreSignalLevel
ignore Signal Level. 0- use DSL bit for selecting active signal level (TIEM). 1- ignore DSL and treat...
Definition: IfxGtm_Tim.h:182
IfxGtm_Tim_Timeout_risingEdge
Timeout feature enabled for rising edge only.
Definition: IfxGtm_Tim.h:150
IfxGtm_Tim_Timeout_bothEdge
Timeout feature enabled for both edges.
Definition: IfxGtm_Tim.h:152
IfxGtm_Tim_FilterCounterFreqSel_cmuClk0
FLT_CNT counts with CMU_CLK0.
Definition: IfxGtm_Tim.h:89
IfxGtm_Tim_Mode_inputEvent
TIEM.
Definition: IfxGtm_Tim.h:140
IfxGtm_Tim_Input_currentChannel
Definition: IfxGtm_Tim.h:113
IfxGtm_Tim_Ch_setAuxInputSourceSelection
IFX_INLINE void IfxGtm_Tim_Ch_setAuxInputSourceSelection(Ifx_GTM *gtm, IfxGtm_Tim timIndex, IfxGtm_Tim_Ch channel)
set the Auxilary input source selection of a particular channel.
Definition: IfxGtm_Tim.h:574
IfxGtm_Tim_IrqMode_pulse
Pulse Mode.
Definition: IfxGtm_Tim.h:120
IfxGtm_Tim_IrqMode_pulseNotify
pulse notify Mode
Definition: IfxGtm_Tim.h:121
IfxGtm_Tim_Ch_clearNotification
IFX_INLINE void IfxGtm_Tim_Ch_clearNotification(Ifx_GTM_TIM_CH *channel, IfxGtm_Tim_IrqType irqType)
Clear the interrupt notification.
Definition: IfxGtm_Tim.h:522
IfxGtm_Tim_InputSourceSelect
Definition: IfxGtm_Tim.h:205
IfxGtm_Tim_ChannelControl::filterModeRisingEdge
IfxGtm_Tim_FilterMode filterModeRisingEdge
Filter mode for rising edge.
Definition: IfxGtm_Tim.h:192
IfxGtm_Tim_Ch_getNotification
IFX_INLINE boolean IfxGtm_Tim_Ch_getNotification(Ifx_GTM_TIM_CH *channel, IfxGtm_Tim_IrqType irqType)
Returns the status of channel notification.
Definition: IfxGtm_Tim.h:529
IfxGtm_Tim_IrqMode_singlePulseMode
Single Pulse Mode.
Definition: IfxGtm_Tim.h:122
IfxGtm_Tim_GprSel_tbuTs0
Definition: IfxGtm_Tim.h:105
IfxGtm_Tim_ChannelControl::mode
IfxGtm_Tim_Mode mode
TIM channel Mode.
Definition: IfxGtm_Tim.h:166
IfxGtm_Tim_Ch_setTimeoutNotification
IFX_EXTERN void IfxGtm_Tim_Ch_setTimeoutNotification(Ifx_GTM_TIM_CH *channel, boolean irqOnTimeout)
Set the timeout notification.
Definition: IfxGtm_Tim.c:196
IfxGtm_Tim_Timeout_disabled
Timeout feature disabled.
Definition: IfxGtm_Tim.h:149
IfxGtm_Tim_ChannelControl::clkSel
IfxGtm_Cmu_Clk clkSel
CMU clock source select for channel.
Definition: IfxGtm_Tim.h:196
IfxGtm_Tim_Timeout
IfxGtm_Tim_Timeout
Enum for Timeout control.
Definition: IfxGtm_Tim.h:147
IfxGtm_Tim_Ch_isNewValueEvent
IFX_INLINE boolean IfxGtm_Tim_Ch_isNewValueEvent(Ifx_GTM_TIM_CH *channel)
Test the new value flag.
Definition: IfxGtm_Tim.h:568
IfxGtm_Tim_IrqType_ecntOverflow
ECNT counter overflow of channel.
Definition: IfxGtm_Tim.h:129
IfxGtm_Tim_Mode_inputPrescaler
TIPM.
Definition: IfxGtm_Tim.h:141
uint32
unsigned long uint32
Definition: Platform_Types.h:116
float32
float float32
Definition: Platform_Types.h:170
IfxGtm_Tim_ChannelControl::enableCounterReset
boolean enableCounterReset
Enables resetting of counter in certain modes ( TIM_MODE=0b101 (TGPS) / TIM_MODE=0b000 (TPWM)) 0- ECN...
Definition: IfxGtm_Tim.h:185
__ldmst_c
IFX_INLINE void __ldmst_c(volatile void *address, unsigned mask, unsigned value)
Definition: IfxCpu_Intrinsics.h:108
IfxGtm_Tim_Ch_setFallingEdgeFilterTime
IFX_INLINE void IfxGtm_Tim_Ch_setFallingEdgeFilterTime(Ifx_GTM_TIM_CH *channel, uint32 filterTime)
This function configures the Falling edge Filter Parameter.
Definition: IfxGtm_Tim.h:589
IfxGtm_Tim_Ch_setRisingEdgeFilterTime
IFX_INLINE void IfxGtm_Tim_Ch_setRisingEdgeFilterTime(Ifx_GTM_TIM_CH *channel, uint32 filterTime)
This function configures theRaising edge Filter Parameter.
Definition: IfxGtm_Tim.h:611
IfxGtm_Tim_Ch_getFilterClockFrequency
IFX_EXTERN float32 IfxGtm_Tim_Ch_getFilterClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Filter Clock Frequency.
Definition: IfxGtm_Tim.c:68
IfxGtm_Tim_ChannelControl::enableAruRouting
boolean enableAruRouting
GPR0 and GPR1 register values routed to ARU. 0- Registers content not routed. 1- Registers content ro...
Definition: IfxGtm_Tim.h:168
IfxGtm_Tim
IfxGtm_Tim
Enum for TIM objects.
Definition: IfxGtm_cfg.h:390
IfxSrc.h
SRC basic functionality.
IfxCpu_Intrinsics.h
IfxGtm_Tim_GprSel
IfxGtm_Tim_GprSel
Definition: IfxGtm_Tim.h:103
IfxGtm_Tim_ChannelControl::enable
boolean enable
TIM channel enable.
Definition: IfxGtm_Tim.h:165
IfxGtm_Tim_GprSel_tbuTs1
Definition: IfxGtm_Tim.h:106
IfxGtm_Tim_IrqType_timeoutDetect
Time out reached for input signal of channel.
Definition: IfxGtm_Tim.h:132
IfxGtm_Tim_IrqType
IfxGtm_Tim_IrqType
Definition: IfxGtm_Tim.h:126
IfxGtm_Tim_ChannelControl::gpr1Sel
IfxGtm_Tim_GprSel gpr1Sel
Selection for GPR1 register.
Definition: IfxGtm_Tim.h:174
IfxGtm_Tim_FilterCounter
IfxGtm_Tim_FilterCounter
Enum for Filter counter.
Definition: IfxGtm_Tim.h:79
IfxGtm_Tim_Ch_getCaptureClockFrequency
IFX_EXTERN float32 IfxGtm_Tim_Ch_getCaptureClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Capture Clock Frequency.
Definition: IfxGtm_Tim.c:52
IfxGtm_Tim_Ch_isDataLostEvent
IFX_INLINE boolean IfxGtm_Tim_Ch_isDataLostEvent(Ifx_GTM_TIM_CH *channel)
Test the data lost flag.
Definition: IfxGtm_Tim.h:550
IfxGtm_Tim_GprSel_cnts
Definition: IfxGtm_Tim.h:108
IfxGtm_Tim_ChannelControl
Channel control.
Definition: IfxGtm_Tim.h:163
IfxGtm_Tim_Ch_setShadowCounter
IFX_INLINE void IfxGtm_Tim_Ch_setShadowCounter(Ifx_GTM_TIM_CH *channel, uint32 shadowCounter)
This function configures the Shadow counter register.
Definition: IfxGtm_Tim.h:617
IfxGtm_Tim_CntsSel_cntReg
Definition: IfxGtm_Tim.h:73
IfxGtm_Tim_FilterMode_immediateEdgePropagation
Immediate edge Propagation mode.
Definition: IfxGtm_Tim.h:99
IfxGtm_Tim_Ch_isGlitchEvent
IFX_INLINE boolean IfxGtm_Tim_Ch_isGlitchEvent(Ifx_GTM_TIM_CH *channel)
Test the glitch flag.
Definition: IfxGtm_Tim.h:562
IfxGtm_Tim_ChannelControl::filterCounterModeFallingEdge
IfxGtm_Tim_FilterCounter filterCounterModeFallingEdge
Filter counter mode for falling edge.
Definition: IfxGtm_Tim.h:195
IfxGtm_Tim_FilterCounter_hold
Definition: IfxGtm_Tim.h:82
IfxGtm_Tim_IrqMode
IfxGtm_Tim_IrqMode
Definition: IfxGtm_Tim.h:117
IfxGtm_Tim_CntsSel_tbuTs0
Definition: IfxGtm_Tim.h:74
IfxGtm_Tim_Ch_setEdgeCounter
IFX_INLINE void IfxGtm_Tim_Ch_setEdgeCounter(Ifx_GTM_TIM_CH *channel, uint8 edgeCounter)
This function configures the Edge counter register.
Definition: IfxGtm_Tim.h:583
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxGtm_Tim_FilterMode
IfxGtm_Tim_FilterMode
Enum for Filter mode.
Definition: IfxGtm_Tim.h:97
IfxGtm_Tim_ChannelControl::signalLevelControl
boolean signalLevelControl
Signal level control 0- Measurement starts with falling edge (low level measurement). 1- Measurement starts with rising edge (high level measurement) In TIM_MODE=0b110 (TSSM) the bit field DSL defines the shift direction. 0- Shift left 1- Shift right.
Definition: IfxGtm_Tim.h:176
IfxGtm_Cmu_Tim_Filter_Clk
IfxGtm_Cmu_Tim_Filter_Clk
Tim Filter counter frequency select.
Definition: IfxGtm_Cmu.h:94
IfxGtm_Tim_FilterMode_individualDeglitchTime
Individual deglitch mode.
Definition: IfxGtm_Tim.h:100
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxGtm_Tim_Ch_setFilterNotification
IFX_EXTERN void IfxGtm_Tim_Ch_setFilterNotification(Ifx_GTM_TIM_CH *channel, boolean irqOnGlitch)
Set the filter notification.
Definition: IfxGtm_Tim.c:173
IfxGtm_Tim_IrqMode_none
none
Definition: IfxGtm_Tim.h:123
IfxGtm_Tim_Ch_setChannelNotification
IFX_EXTERN void IfxGtm_Tim_Ch_setChannelNotification(Ifx_GTM_TIM_CH *channel, boolean irqOnNewVal, boolean irqOnCntOverflow, boolean irqOnEcntOverflow, boolean irqOnDatalost)
Set the channel notification.
Definition: IfxGtm_Tim.c:120
IfxGtm_Tim_Ch_setNotificationMode
IFX_EXTERN void IfxGtm_Tim_Ch_setNotificationMode(Ifx_GTM_TIM_CH *channel, IfxGtm_IrqMode mode)
This function configures the TIM channel IRQ mode.
Definition: IfxGtm_Tim.c:184
IfxGtm_Tim_Ch_resetChannel
IFX_INLINE void IfxGtm_Tim_Ch_resetChannel(Ifx_GTM_TIM *tim, IfxGtm_Tim_Ch channel)
Reset the specified TIM channel.
Definition: IfxGtm_Tim.h:629
IfxGtm_Tim_ChannelControl::filterCounterModeRisingEdge
IfxGtm_Tim_FilterCounter filterCounterModeRisingEdge
Filter counter mode for rising edge.
Definition: IfxGtm_Tim.h:193
IfxGtm_Tim_Mode_pulseIntegration
TPIM.
Definition: IfxGtm_Tim.h:139
__imaskldmst
#define __imaskldmst
Definition: IfxCpu_IntrinsicsDcc.h:1753
IfxGtm_Tim_ChannelControl::enableOneShotMode
boolean enableOneShotMode
enable OneShot Mode (disable - continous operation mode)
Definition: IfxGtm_Tim.h:167
IfxGtm_Tim_InputSourceSelect::value
uint8 value
Definition: IfxGtm_Tim.h:212
IfxGtm_Cmu_Clk
IfxGtm_Cmu_Clk
Definition: IfxGtm_Cmu.h:64
IfxGtm_Tim_InputSourceSelect::mode
uint8 mode
Input source to Channel. multi-core encoding in use (MODE_x(1) defines the state of the signal) 00- S...
Definition: IfxGtm_Tim.h:207
IfxGtm_Tim_Ch_isEcntOverflowEvent
IFX_INLINE boolean IfxGtm_Tim_Ch_isEcntOverflowEvent(Ifx_GTM_TIM_CH *channel)
Test the event counter overflow flag.
Definition: IfxGtm_Tim.h:556
IfxGtm_Tim_ChannelControl::enableExternalCaptureMode
boolean enableExternalCaptureMode
Enables external capture mode.
Definition: IfxGtm_Tim.h:191
IfxGtm_Tim_FilterCounterFreqSel_cmuClk7
FLT_CNT counts with CMU_CLK7.
Definition: IfxGtm_Tim.h:92
IfxGtm_Tim_IrqMode_level
Level Mode.
Definition: IfxGtm_Tim.h:119
IfxGtm_Tim_ChannelControl::filterModeFallingEdge
IfxGtm_Tim_FilterMode filterModeFallingEdge
Filter mode for falling edge.
Definition: IfxGtm_Tim.h:194
IfxGtm_Tim_Ch_clearEcntOverflowEvent
IFX_INLINE void IfxGtm_Tim_Ch_clearEcntOverflowEvent(Ifx_GTM_TIM_CH *channel)
Clears the event counter overflow flag.
Definition: IfxGtm_Tim.h:504
IfxGtm_Tim_IrqType_glitchDetect
A glitch was detected by the TIM filter of channel.
Definition: IfxGtm_Tim.h:133
IfxGtm_Tim_Mode
IfxGtm_Tim_Mode
Definition: IfxGtm_Tim.h:136
IfxGtm_Tim_Ch_setNotification
IFX_INLINE void IfxGtm_Tim_Ch_setNotification(Ifx_GTM_TIM_CH *channel, IfxGtm_Tim_IrqType irqType)
set the Interrupt Notification
Definition: IfxGtm_Tim.h:604
IfxGtm_Tim_Ch_getTimeoutClockFrequency
IFX_EXTERN float32 IfxGtm_Tim_Ch_getTimeoutClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Timeout Clock Frequency.
Definition: IfxGtm_Tim.c:104
IfxGtm_Tim_IrqType_gprOverflow
GPR0 and GPR1 data overflow.
Definition: IfxGtm_Tim.h:131
IfxGtm_Tim_ChannelControl::cntsSel
IfxGtm_Tim_CntsSel cntsSel
Selection for CNTS register.
Definition: IfxGtm_Tim.h:175
IfxGtm_Tim_ChannelControl::enableFilter
boolean enableFilter
enable Filter
Definition: IfxGtm_Tim.h:189
IfxGtm_Tim_ChannelControl::timeoutControl
IfxGtm_Tim_Timeout timeoutControl
Timeout control.
Definition: IfxGtm_Tim.h:202
IfxGtm_Tim_Ch_clearDataLostEvent
IFX_INLINE void IfxGtm_Tim_Ch_clearDataLostEvent(Ifx_GTM_TIM_CH *channel)
Clears the data lost flag.
Definition: IfxGtm_Tim.h:498
IfxGtm_Tim_Ch_getTimeoutClockSource
IFX_EXTERN IfxGtm_Cmu_Clk IfxGtm_Tim_Ch_getTimeoutClockSource(Ifx_GTM_TIM_CH *channel)
Returns the Timeout clock source selected.
Definition: IfxGtm_Tim.c:114
IfxGtm_Tim_Ch_setClockSource
IFX_EXTERN void IfxGtm_Tim_Ch_setClockSource(Ifx_GTM_TIM_CH *channel, IfxGtm_Cmu_Clk clock)
Set the channel clock source.
Definition: IfxGtm_Tim.c:133
IfxGtm_Tim_Ch_clearAuxInputSourceSelection
IFX_INLINE void IfxGtm_Tim_Ch_clearAuxInputSourceSelection(Ifx_GTM *gtm, IfxGtm_Tim timIndex, IfxGtm_Tim_Ch channel)
This function clears the Aux input Source selection for the given channel.
Definition: IfxGtm_Tim.h:483
IfxGtm_Tim_Ch_setInputSourceSelection
IFX_INLINE void IfxGtm_Tim_Ch_setInputSourceSelection(Ifx_GTM_TIM *tim, IfxGtm_Tim_Ch channel, IfxGtm_Tim_InputSourceSelect inputSource)
This function configures the Input source selection register.
Definition: IfxGtm_Tim.h:595
IfxGtm_Tim_ChannelControl::egpr1Sel
boolean egpr1Sel
Extension of GPR1_SEL bit field.
Definition: IfxGtm_Tim.h:201
IfxGtm_Tim_ChannelControl::egpr0Sel
boolean egpr0Sel
Extension of GPR0_SEL bit field.
Definition: IfxGtm_Tim.h:200
IfxGtm_Tim_Ch_getSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxGtm_Tim_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Tim tim, IfxGtm_Tim_Ch channel)
Returns a pointer to the TIM channel SRC.
Definition: IfxGtm_Tim.h:537
IfxGtm_Tim_Ch_isCntOverflowEvent
IFX_INLINE boolean IfxGtm_Tim_Ch_isCntOverflowEvent(Ifx_GTM_TIM_CH *channel)
Test the counter overflow flag.
Definition: IfxGtm_Tim.h:544
IfxGtm_IrqMode
IfxGtm_IrqMode
Enum for GTM interrupt modes.
Definition: IfxGtm.h:64
IfxGtm_Tim_CntsSel
IfxGtm_Tim_CntsSel
Definition: IfxGtm_Tim.h:71
IfxGtm_Tim_Ch_clearGlitchEvent
IFX_INLINE void IfxGtm_Tim_Ch_clearGlitchEvent(Ifx_GTM_TIM_CH *channel)
Clears the glitch flag.
Definition: IfxGtm_Tim.h:510
IfxGtm_Tim_Ch_clearCntOverflowEvent
IFX_INLINE void IfxGtm_Tim_Ch_clearCntOverflowEvent(Ifx_GTM_TIM_CH *channel)
Clears the counter overflow flag.
Definition: IfxGtm_Tim.h:492
IfxGtm_Tim_Ch_setControl
IFX_EXTERN void IfxGtm_Tim_Ch_setControl(Ifx_GTM_TIM_CH *channel, IfxGtm_Tim_ChannelControl control)
This function configures the TIM channel Control register.
Definition: IfxGtm_Tim.c:139
IfxGtm_Cmu.h
GTM basic functionality.
IfxGtm_Tim_Ch
IfxGtm_Tim_Ch
Enum for TIM channels.
Definition: IfxGtm_cfg.h:403
IfxGtm_Tim_Input_adjacentChannel
Definition: IfxGtm_Tim.h:114
IfxGtm_Tim_Ch_getCaptureClockSource
IFX_EXTERN IfxGtm_Cmu_Clk IfxGtm_Tim_Ch_getCaptureClockSource(Ifx_GTM_TIM_CH *channel)
Returns the capture clock source selected.
Definition: IfxGtm_Tim.c:62
IfxGtm_Tim_Input
IfxGtm_Tim_Input
Definition: IfxGtm_Tim.h:111
IfxGtm_Tim_FilterCounter_upDown
Definition: IfxGtm_Tim.h:81
IfxGtm_Tim_Mode_pwmMeasurement
TPWM.
Definition: IfxGtm_Tim.h:138
IfxGtm_Tim_ChannelControl::channelInputControl
boolean channelInputControl
0- use signal TIM_IN(x) as input for channel . 1- use signal TIM_IN(x-1) as input for channel x (or T...
Definition: IfxGtm_Tim.h:171
IfxGtm_Tim_Ch_clearNewValueEvent
IFX_INLINE void IfxGtm_Tim_Ch_clearNewValueEvent(Ifx_GTM_TIM_CH *channel)
Clears the new value flag.
Definition: IfxGtm_Tim.h:516
IfxGtm_Tim_getChannel
IFX_INLINE Ifx_GTM_TIM_CH * IfxGtm_Tim_getChannel(Ifx_GTM_TIM *tim, IfxGtm_Tim_Ch channel)
Returns the pointer to the TIM channel.
Definition: IfxGtm_Tim.h:623
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
IfxGtm_Tim_FilterCounterFreqSel_cmuClk6
FLT_CNT counts with CMU_CLK6.
Definition: IfxGtm_Tim.h:91
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxGtm.h
GTM basic functionality.
IfxGtm_Tim_Mode_bitCompression
TBCM.
Definition: IfxGtm_Tim.h:142
IfxGtm_cfg.h
GTM on-chip implementation data.
IfxGtm_Tim_Ch_setTimTin
IFX_INLINE void IfxGtm_Tim_Ch_setTimTin(IfxGtm_Tim timIndex, IfxGtm_Tim_Ch channelIndex, uint32 tinSel)
sets the TIMINSEL register with the required mux setting
Definition: IfxGtm_Tim.h:635
IfxGtm_Tim_IrqType_cntOverflow
CNT counter overflow of channel.
Definition: IfxGtm_Tim.h:130
IfxGtm_Tim_Timeout_fallingEdge
Timeout feature enabled for falling edge only.
Definition: IfxGtm_Tim.h:151
IfxGtm_Tim_Ch_getFilterClockSource
IFX_EXTERN IfxGtm_Cmu_Tim_Filter_Clk IfxGtm_Tim_Ch_getFilterClockSource(Ifx_GTM_TIM_CH *channel)
Returns the Filter clock source selected.
Definition: IfxGtm_Tim.c:98
IfxGtm_Tim_IrqType_newVal
New measurement value detected by SMU of channel.
Definition: IfxGtm_Tim.h:128
IfxGtm_Tim_FilterCounterFreqSel_cmuClk1
FLT_CNT counts with CMU_CLK1.
Definition: IfxGtm_Tim.h:90
IfxGtm_Tim_FilterCounterFreqSel
IfxGtm_Tim_FilterCounterFreqSel
Enum for Filter counter Frequency Selection.
Definition: IfxGtm_Tim.h:87
IfxGtm_Tim_ChannelControl::extendEdgeCounterOverflow
boolean extendEdgeCounterOverflow
Extended Edge counter overflow behavior 0- Overflow will be signaled on ECNT bit width = 8 1- Overflo...
Definition: IfxGtm_Tim.h:197


iLLD_TC38A: IfxGtm_Tim_In.c Source File

  • Gtm
  • Tim
  • In
IfxGtm_Tim_In.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Tim_In.c
3 * \brief GTM IN details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxGtm_Tim_In.h"
47 #include "IfxGtm_bf.h"
48 #include "string.h"
49
50 /******************************************************************************/
51 /*-------------------------Function Implementations---------------------------*/
52 /******************************************************************************/
53
54 boolean IfxGtm_Tim_In_init(IfxGtm_Tim_In *driver, const IfxGtm_Tim_In_Config *config)
55 {
56 boolean result = TRUE;
57 Ifx_GTM_TIM_CH *channel;
58
59 IfxGtm_Tim_Ch channelIndex;
60 IfxGtm_Tim timIndex;
61 IfxGtm_Tim_In_Input input;
62
63 if (config->filter.inputPin != NULL_PTR)
64 {
65 channelIndex = config->filter.inputPin->channel;
66 timIndex = config->filter.inputPin->tim;
67
68 input = IfxGtm_Tim_In_Input_currentChannel;
69 }
70 else
71 {
72 channelIndex = config->channelIndex;
73 timIndex = config->timIndex;
74 input = config->filter.input;
75 }
76
77 channel = IfxGtm_Tim_getChannel(&config->gtm->TIM[timIndex], channelIndex);
78 driver->timIndex = config->timIndex;
79 driver->channelIndex = config->channelIndex;
80 driver->channel = channel;
81 driver->periodTick = 0;
82 driver->pulseLengthTick = 0;
83 driver->dataCoherent = FALSE;
84 driver->newData = FALSE;
85 driver->dataLost = FALSE;
86 driver->overflowCnt = FALSE;
87 driver->edgeCounterUpper = 0;
88
89 channel->CTRL.B.TIM_MODE = IfxGtm_Tim_Mode_pwmMeasurement;
90
91 IfxGtm_Tim_Ch_setClockSource(channel, config->capture.clock);
92
93 driver->captureClockFrequency = IfxGtm_Tim_Ch_getCaptureClockFrequency(config->gtm, channel);
94
95 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (config->capture.mode == Ifx_Pwm_Mode_leftAligned) || (config->capture.mode == Ifx_Pwm_Mode_rightAligned));
96
97 result &= (config->capture.mode == Ifx_Pwm_Mode_leftAligned) || (config->capture.mode == Ifx_Pwm_Mode_rightAligned);
98 channel->CTRL.B.DSL = config->capture.mode == Ifx_Pwm_Mode_leftAligned ? 1 : 0;
99
100 channel->CTRL.B.CNTS_SEL = IfxGtm_Tim_CntsSel_cntReg;
101 channel->CTRL.B.GPR0_SEL = IfxGtm_Tim_GprSel_cnts; /* Use CNTS as input for GPR0 */
102 channel->CTRL.B.GPR1_SEL = IfxGtm_Tim_GprSel_cnts; /* Use CNT as input for GPR1 */
103
104 /* Interrupt configuration */
105 if (config->isrPriority)
106 {
107 volatile Ifx_SRC_SRCR *src;
108 IfxGtm_Tim_Ch_setNotificationMode(channel, config->irqMode);
109 IfxGtm_Tim_Ch_setChannelNotification(channel, config->capture.irqOnNewVal,
110 config->capture.irqOnCntOverflow, config->capture.irqOnEcntOverflow, config->capture.irqOnDatalost);
111
112 src = IfxGtm_Tim_Ch_getSrcPointer(config->gtm, timIndex, channelIndex);
113 IfxSrc_init(src, config->isrProvider, config->isrPriority);
114 IfxSrc_enable(src);
115 }
116
117 /* Timeout configuration */
118 if (config->timeout.timeout > 0)
119 {
120 float32 clockFrequency;
121 sint32 timeout;
122 channel->TDUV.B.TCS = config->timeout.clock;
123 clockFrequency = IfxGtm_Tim_Ch_getTimeoutClockFrequency(config->gtm, channel);
124
125 timeout = (uint32)(config->timeout.timeout * clockFrequency) - 1;
126
127 if (timeout < 0)
128 {
129 timeout = 0;
130 }
131 else if (timeout >= (1 << IFX_GTM_TIM_CH_TDUV_TCS_MSK))
132 {
133 timeout = IFX_GTM_TIM_CH_TDUV_TCS_MSK;
134 result = FALSE;
135 }
136
137 channel->CTRL.B.TOCTRL = config->capture.mode == Ifx_Pwm_Mode_leftAligned ? IfxGtm_Tim_Timeout_risingEdge : IfxGtm_Tim_Timeout_fallingEdge;
138 channel->TDUV.B.TOV = timeout;
139
140 IfxGtm_Tim_Ch_setTimeoutNotification(channel, config->timeout.irqOnTimeout);
141 }
142
143 /* Input configuration */
144
145 config->gtm->TIM[timIndex].IN_SRC.U = 1 << (IFX_GTM_TIM_IN_SRC_MODE_0_OFF + channelIndex * (IFX_GTM_TIM_IN_SRC_MODE_1_OFF - IFX_GTM_TIM_IN_SRC_MODE_0_OFF)); // MODE 0
146
147 switch (input)
148 {
149 case IfxGtm_Tim_In_Input_currentChannel:
150 config->gtm->TIM[timIndex].IN_SRC.U = 1 << (IFX_GTM_TIM_IN_SRC_VAL_0_OFF + channelIndex * (IFX_GTM_TIM_IN_SRC_VAL_1_OFF - IFX_GTM_TIM_IN_SRC_VAL_0_OFF)); // VAL 0
151 channel->CTRL.B.CICTRL = IfxGtm_Tim_Input_currentChannel;
152 break;
153 case IfxGtm_Tim_In_Input_adjacentChannel:
154 config->gtm->TIM[timIndex].IN_SRC.U = 1 << (IFX_GTM_TIM_IN_SRC_VAL_0_OFF + channelIndex * (IFX_GTM_TIM_IN_SRC_VAL_1_OFF - IFX_GTM_TIM_IN_SRC_VAL_0_OFF)); // VAL 0
155 channel->CTRL.B.CICTRL = IfxGtm_Tim_Input_adjacentChannel;
156 break;
157 case IfxGtm_Tim_In_Input_aux:
158 config->gtm->TIM[timIndex].IN_SRC.U = 2 << (IFX_GTM_TIM_IN_SRC_VAL_0_OFF + channelIndex * (IFX_GTM_TIM_IN_SRC_VAL_1_OFF - IFX_GTM_TIM_IN_SRC_VAL_0_OFF)); // VAL 1
159 break;
160 }
161
162 if (config->filter.inputPin != NULL_PTR)
163 {
164 IfxGtm_PinMap_setTimTin(config->filter.inputPin, config->filter.inputPinMode);
165 }
166
167 /*Filter configuration */
168 if ((config->filter.fallingEdgeMode != IfxGtm_Tim_In_ConfigFilterMode_none)
169 || (config->filter.risingEdgeMode != IfxGtm_Tim_In_ConfigFilterMode_none))
170 {
171 float32 clockFrequency;
172 sint32 fallingfilterTime;
173 sint32 risingfilterTime;
174
175 channel->CTRL.B.FLT_EN = 1;
176 channel->CTRL.B.FLT_CNT_FRQ = config->filter.clock;
177
178 clockFrequency = IfxGtm_Tim_Ch_getFilterClockFrequency(config->gtm, channel);
179
180 fallingfilterTime = (uint32)(config->filter.fallingEdgeFilterTime * clockFrequency) - 1;
181
182 if (fallingfilterTime < 0)
183 {
184 fallingfilterTime = 0;
185 }
186 else if (fallingfilterTime > (sint32)IFX_GTM_TIM_CH_FLT_FE_FLT_FE_MSK)
187 {
188 fallingfilterTime = IFX_GTM_TIM_CH_FLT_FE_FLT_FE_MSK;
189 result = FALSE;
190 }
191
192 channel->FLT_FE.B.FLT_FE = fallingfilterTime;
193
194 risingfilterTime = (uint32)(config->filter.risingEdgeFilterTime * clockFrequency) - 1;
195
196 if (risingfilterTime < 0)
197 {
198 risingfilterTime = 0;
199 }
200 else if (risingfilterTime > (sint32)IFX_GTM_TIM_CH_FLT_FE_FLT_FE_MSK)
201 {
202 risingfilterTime = IFX_GTM_TIM_CH_FLT_FE_FLT_FE_MSK;
203 result = FALSE;
204 }
205
206 channel->FLT_RE.B.FLT_RE = risingfilterTime;
207
208 if (config->filter.fallingEdgeMode != IfxGtm_Tim_In_ConfigFilterMode_none)
209 {
210 if (config->filter.fallingEdgeMode == IfxGtm_Tim_In_ConfigFilterMode_immediateEdgePropagation)
211 {
212 channel->CTRL.B.FLT_MODE_FE = IfxGtm_Tim_FilterMode_immediateEdgePropagation;
213 }
214 else
215 {
216 channel->CTRL.B.FLT_MODE_FE = IfxGtm_Tim_FilterMode_individualDeglitchTime;
217 channel->CTRL.B.FLT_CTR_FE = config->filter.fallingEdgeMode == IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeUpDown ? IfxGtm_Tim_FilterCounter_upDown : IfxGtm_Tim_FilterCounter_hold;
218 }
219 }
220 else
221 {
222 channel->CTRL.B.FLT_MODE_FE = IfxGtm_Tim_FilterMode_immediateEdgePropagation;
223 channel->FLT_FE.B.FLT_FE = 0;
224 }
225
226 if (config->filter.risingEdgeMode != IfxGtm_Tim_In_ConfigFilterMode_none)
227 {
228 if (config->filter.risingEdgeMode == IfxGtm_Tim_In_ConfigFilterMode_immediateEdgePropagation)
229 {
230 channel->CTRL.B.FLT_MODE_RE = IfxGtm_Tim_FilterMode_immediateEdgePropagation;
231 }
232 else
233 {
234 channel->CTRL.B.FLT_MODE_RE = IfxGtm_Tim_FilterMode_individualDeglitchTime;
235 channel->CTRL.B.FLT_CTR_RE = config->filter.risingEdgeMode == IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeUpDown ? IfxGtm_Tim_FilterCounter_upDown : IfxGtm_Tim_FilterCounter_hold;
236 }
237 }
238 else
239 {
240 channel->CTRL.B.FLT_MODE_RE = IfxGtm_Tim_FilterMode_immediateEdgePropagation;
241 channel->FLT_RE.B.FLT_RE = 0;
242 }
243
244 IfxGtm_Tim_Ch_setFilterNotification(channel, config->filter.irqOnGlitch);
245 }
246
247 /* Enable TIM channel */
248 channel->CTRL.B.TIM_EN = 1;
249
250 return result;
251 }
252
253
254 void IfxGtm_Tim_In_initConfig(IfxGtm_Tim_In_Config *config, Ifx_GTM *gtm)
255 {
256 memset(config, 0, sizeof(IfxGtm_Tim_In_Config));
257
258 config->gtm = gtm;
259 config->timIndex = IfxGtm_Tim_0;
260 config->channelIndex = IfxGtm_Tim_Ch_0;
261 config->irqMode = IfxGtm_IrqMode_pulseNotify;
262 config->isrProvider = IfxSrc_Tos_cpu0;
263 config->isrPriority = 0;
264 config->capture.irqOnNewVal = FALSE;
265 config->capture.irqOnCntOverflow = FALSE;
266 config->capture.irqOnEcntOverflow = FALSE;
267 config->capture.irqOnDatalost = FALSE;
268 config->capture.clock = IfxGtm_Cmu_Clk_0;
269 config->capture.mode = Ifx_Pwm_Mode_leftAligned;
270 config->timeout.irqOnTimeout = FALSE;
271 config->timeout.clock = IfxGtm_Cmu_Clk_0;
272 config->timeout.timeout = 0.0;
273 config->filter.input = IfxGtm_Tim_In_Input_currentChannel;
274 config->filter.inputPin = NULL_PTR;
275 config->filter.inputPinMode = IfxPort_InputMode_noPullDevice;
276 config->filter.risingEdgeMode = IfxGtm_Tim_In_ConfigFilterMode_none;
277 config->filter.fallingEdgeMode = IfxGtm_Tim_In_ConfigFilterMode_none;
278 config->filter.risingEdgeFilterTime = 0;
279 config->filter.fallingEdgeFilterTime = 0;
280 config->filter.clock = IfxGtm_Cmu_Tim_Filter_Clk_0;
281 }
282
283
284 void IfxGtm_Tim_In_onIsr(IfxGtm_Tim_In *driver)
285 {
286 IfxGtm_Tim_In_update(driver);
287 }
288
289
290 void IfxGtm_Tim_In_update(IfxGtm_Tim_In *driver)
291 {
292 driver->dataLost = IfxGtm_Tim_Ch_isDataLostEvent(driver->channel);
293
294 if (driver->dataLost)
295 {
296 IfxGtm_Tim_Ch_clearDataLostEvent(driver->channel);
297 }
298
299 driver->glitch = IfxGtm_Tim_Ch_isGlitchEvent(driver->channel);
300
301 if (driver->glitch)
302 {
303 IfxGtm_Tim_Ch_clearGlitchEvent(driver->channel);
304 }
305
306 driver->newData = IfxGtm_Tim_Ch_isNewValueEvent(driver->channel);
307
308 if (driver->newData)
309 {
310 Ifx_GTM_TIM_CH_GPR0 gpr0;
311 Ifx_GTM_TIM_CH_GPR1 gpr1;
312
313 gpr0.U = driver->channel->GPR0.U;
314 gpr1.U = driver->channel->GPR1.U;
315 driver->periodTick = gpr1.B.GPR1;
316 driver->pulseLengthTick = gpr0.B.GPR0;
317 driver->dataCoherent = gpr0.B.ECNT == gpr1.B.ECNT;
318
319 // read the edge counter
320 driver->edgeCount = driver->channel->ECNT.B.ECNT;
321
322 if (IfxGtm_Tim_Ch_isEcntOverflowEvent(driver->channel))
323 {
324 driver->edgeCounterUpper++;
325 IfxGtm_Tim_Ch_clearEcntOverflowEvent(driver->channel);
326 }
327
328 driver->overflowCnt = IfxGtm_Tim_Ch_isCntOverflowEvent(driver->channel);
329
330 if (driver->overflowCnt)
331 {
332 driver->newData = FALSE;
333 IfxGtm_Tim_Ch_clearCntOverflowEvent(driver->channel);
334 }
335
336 IfxGtm_Tim_Ch_clearNewValueEvent(driver->channel);
337 }
338 }
IfxGtm_Tim_In::pulseLengthTick
uint32 pulseLengthTick
Duty value in clock ticks.
Definition: IfxGtm_Tim_In.h:143
IfxGtm_Tim_In_ConfigCapture::mode
Ifx_Pwm_Mode mode
PWM mode, only Ifx_Pwm_Mode_leftAligned and Ifx_Pwm_Mode_righAligned are supported.
Definition: IfxGtm_Tim_In.h:106
IfxGtm_Tim_In::dataCoherent
boolean dataCoherent
TRUE, if the duty and period values are measured from the same period.
Definition: IfxGtm_Tim_In.h:144
IfxGtm_Tim_Timeout_risingEdge
Timeout feature enabled for rising edge only.
Definition: IfxGtm_Tim.h:150
IfxGtm_Tim_0
TIM object 0.
Definition: IfxGtm_cfg.h:392
IfxGtm_PinMap_setTimTin
void IfxGtm_PinMap_setTimTin(IfxGtm_Tim_TinMap *config, IfxPort_InputMode inputMode)
Definition: IfxGtm_PinMap.c:2396
IfxGtm_Tim_In::newData
boolean newData
TRUE when values are updated, and if none of the counter CNT, CNTS have overflowed.
Definition: IfxGtm_Tim_In.h:146
IfxGtm_Tim_In_Config
Configuration structure for TIM input capture.
Definition: IfxGtm_Tim_In.h:158
IfxGtm_Tim_Input_currentChannel
Definition: IfxGtm_Tim.h:113
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxGtm_Tim_In_ConfigCapture::irqOnDatalost
boolean irqOnDatalost
If TRUE, the interrupt on data lost (GPR0, GPR1) is enabled.
Definition: IfxGtm_Tim_In.h:104
IfxGtm_Tim_In_Input_adjacentChannel
Use the input from the adjacent channel.
Definition: IfxGtm_Tim_In.h:85
IfxGtm_Tim_In_ConfigFilter::clock
IfxGtm_Cmu_Tim_Filter_Clk clock
Timeout clock.
Definition: IfxGtm_Tim_In.h:113
IfxGtm_Tim_In::edgeCount
uint16 edgeCount
number of edges counted.
Definition: IfxGtm_Tim_In.h:153
IfxGtm_Tim_Ch_setTimeoutNotification
void IfxGtm_Tim_Ch_setTimeoutNotification(Ifx_GTM_TIM_CH *channel, boolean irqOnTimeout)
Set the timeout notification.
Definition: IfxGtm_Tim.c:196
IfxGtm_Tim_In_ConfigFilter::fallingEdgeMode
IfxGtm_Tim_In_ConfigFilterMode fallingEdgeMode
Filter mode for falling edge.
Definition: IfxGtm_Tim_In.h:115
IfxGtm_Tim_Ch_0
TIM channel 0.
Definition: IfxGtm_cfg.h:405
memset
void * memset(void *s, int c, syze_t n)
IfxGtm_Tim_Ch_isNewValueEvent
IFX_INLINE boolean IfxGtm_Tim_Ch_isNewValueEvent(Ifx_GTM_TIM_CH *channel)
Test the new value flag.
Definition: IfxGtm_Tim.h:568
IfxGtm_Tim_In_Config::gtm
Ifx_GTM * gtm
GTM used.
Definition: IfxGtm_Tim_In.h:160
uint32
unsigned long uint32
Definition: Platform_Types.h:116
float32
float float32
Definition: Platform_Types.h:170
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
IfxGtm_Tim_In_ConfigTimeout::irqOnTimeout
boolean irqOnTimeout
If TRUE, the interrupt on timeout is enabled.
Definition: IfxGtm_Tim_In.h:130
IfxGtm_Tim_In_Config::capture
IfxGtm_Tim_In_ConfigCapture capture
Capture configuration.
Definition: IfxGtm_Tim_In.h:166
IfxGtm_Tim_In_ConfigFilter::fallingEdgeFilterTime
float32 fallingEdgeFilterTime
Falling edge filter time in second.
Definition: IfxGtm_Tim_In.h:117
IfxGtm_Tim_Ch_getFilterClockFrequency
float32 IfxGtm_Tim_Ch_getFilterClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Filter Clock Frequency.
Definition: IfxGtm_Tim.c:68
IfxGtm_Tim
IfxGtm_Tim
Enum for TIM objects.
Definition: IfxGtm_cfg.h:390
IfxGtm_Tim_In_Input_aux
Use the input from the aux.
Definition: IfxGtm_Tim_In.h:86
IfxGtm_Tim_In_Input_currentChannel
Use the input from the current channel.
Definition: IfxGtm_Tim_In.h:84
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxGtm_Tim_Ch_getCaptureClockFrequency
float32 IfxGtm_Tim_Ch_getCaptureClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Capture Clock Frequency.
Definition: IfxGtm_Tim.c:52
IfxGtm_Tim_Ch_isDataLostEvent
IFX_INLINE boolean IfxGtm_Tim_Ch_isDataLostEvent(Ifx_GTM_TIM_CH *channel)
Test the data lost flag.
Definition: IfxGtm_Tim.h:550
IfxGtm_Tim_GprSel_cnts
Definition: IfxGtm_Tim.h:108
IfxGtm_Tim_TinMap::tim
IfxGtm_Tim tim
TIM unit index.
Definition: IfxGtm_PinMap.h:103
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxGtm_Tim_CntsSel_cntReg
Definition: IfxGtm_Tim.h:73
IfxGtm_Tim_In_Config::isrProvider
IfxSrc_Tos isrProvider
Interrupt service provider for the timer interrupt.
Definition: IfxGtm_Tim_In.h:164
IfxGtm_Tim_In_Config::timIndex
IfxGtm_Tim timIndex
TIM index.
Definition: IfxGtm_Tim_In.h:161
IfxGtm_Tim_FilterMode_immediateEdgePropagation
Immediate edge Propagation mode.
Definition: IfxGtm_Tim.h:99
IfxGtm_Tim_Ch_isGlitchEvent
IFX_INLINE boolean IfxGtm_Tim_Ch_isGlitchEvent(Ifx_GTM_TIM_CH *channel)
Test the glitch flag.
Definition: IfxGtm_Tim.h:562
IfxGtm_Cmu_Clk_0
Definition: IfxGtm_Cmu.h:66
IfxGtm_Tim_In::glitch
boolean glitch
TRUE if glitch is detected.
Definition: IfxGtm_Tim_In.h:149
IfxGtm_Tim_FilterCounter_hold
Definition: IfxGtm_Tim.h:82
IfxGtm_Tim_In_ConfigFilter::input
IfxGtm_Tim_In_Input input
selected input
Definition: IfxGtm_Tim_In.h:119
Ifx_Pwm_Mode_leftAligned
Left aligned mode. The PWM period starts with a rising edge.
Definition: Ifx_Types.h:179
IfxGtm_Tim_In_ConfigFilter::risingEdgeFilterTime
float32 risingEdgeFilterTime
Rising edge filter time in second.
Definition: IfxGtm_Tim_In.h:116
IfxGtm_Tim_FilterMode_individualDeglitchTime
Individual deglitch mode.
Definition: IfxGtm_Tim.h:100
IfxGtm_Tim_Ch_setFilterNotification
void IfxGtm_Tim_Ch_setFilterNotification(Ifx_GTM_TIM_CH *channel, boolean irqOnGlitch)
Set the filter notification.
Definition: IfxGtm_Tim.c:173
IfxGtm_Tim_Ch_setChannelNotification
void IfxGtm_Tim_Ch_setChannelNotification(Ifx_GTM_TIM_CH *channel, boolean irqOnNewVal, boolean irqOnCntOverflow, boolean irqOnEcntOverflow, boolean irqOnDatalost)
Set the channel notification.
Definition: IfxGtm_Tim.c:120
IfxGtm_Tim_In::overflowCnt
boolean overflowCnt
TRUE if the last measurement show an overflow in CNT.
Definition: IfxGtm_Tim_In.h:145
IfxGtm_Tim_In_ConfigFilter::inputPin
IfxGtm_Tim_TinMap * inputPin
If defined, this value overwrites the IfxGtm_Tim_In_Config.filter.input, IfxGtm_Tim_In_Config.timIndex, IfxGtm_Tim_In_Config.channelIndex.
Definition: IfxGtm_Tim_In.h:120
IfxGtm_Tim_Ch_setNotificationMode
void IfxGtm_Tim_Ch_setNotificationMode(Ifx_GTM_TIM_CH *channel, IfxGtm_IrqMode mode)
This function configures the TIM channel IRQ mode.
Definition: IfxGtm_Tim.c:184
IfxGtm_Tim_In_ConfigCapture::irqOnCntOverflow
boolean irqOnCntOverflow
If TRUE, the interrupt on CNT overflow is enabled.
Definition: IfxGtm_Tim_In.h:102
IfxGtm_Tim_In_ConfigCapture::irqOnNewVal
boolean irqOnNewVal
If TRUE, the interrupt on new value is enabled.
Definition: IfxGtm_Tim_In.h:101
IfxPort_InputMode_noPullDevice
Definition: IfxPort.h:84
IfxGtm_Tim_In_ConfigTimeout::timeout
float32 timeout
Timeout in second. Value of 0 disable the timeout functionality see 27.10.3 Timeout Detection Unit (T...
Definition: IfxGtm_Tim_In.h:129
IfxGtm_Tim_Ch_isEcntOverflowEvent
IFX_INLINE boolean IfxGtm_Tim_Ch_isEcntOverflowEvent(Ifx_GTM_TIM_CH *channel)
Test the event counter overflow flag.
Definition: IfxGtm_Tim.h:556
IfxGtm_Tim_In
Driver Handle.
Definition: IfxGtm_Tim_In.h:139
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:68
IfxGtm_Tim_In_Config::filter
IfxGtm_Tim_In_ConfigFilter filter
Filter configuration.
Definition: IfxGtm_Tim_In.h:167
IfxGtm_Tim_In_update
void IfxGtm_Tim_In_update(IfxGtm_Tim_In *driver)
Updates the period and duty cycle.
Definition: IfxGtm_Tim_In.c:290
Ifx_Pwm_Mode_rightAligned
Right aligned mode. The PWM period starts with a falling edge.
Definition: Ifx_Types.h:180
IfxGtm_Tim_In_ConfigFilterMode_immediateEdgePropagation
Immediate edge propagation mode.
Definition: IfxGtm_Tim_In.h:74
IfxGtm_Tim_In::dataLost
boolean dataLost
TRUE if data are lost.
Definition: IfxGtm_Tim_In.h:147
IfxGtm_Tim_In_ConfigCapture::irqOnEcntOverflow
boolean irqOnEcntOverflow
If TRUE, the interrupt on ECNT (Edge counter) overflow is enabled.
Definition: IfxGtm_Tim_In.h:103
IfxGtm_Tim_Ch_clearEcntOverflowEvent
IFX_INLINE void IfxGtm_Tim_Ch_clearEcntOverflowEvent(Ifx_GTM_TIM_CH *channel)
Clears the event counter overflow flag.
Definition: IfxGtm_Tim.h:504
IfxGtm_Tim_Ch_getTimeoutClockFrequency
float32 IfxGtm_Tim_Ch_getTimeoutClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Timeout Clock Frequency.
Definition: IfxGtm_Tim.c:104
IfxGtm_Tim_In::periodTick
uint32 periodTick
Period value in clock ticks.
Definition: IfxGtm_Tim_In.h:142
IfxGtm_Tim_In_ConfigFilter::risingEdgeMode
IfxGtm_Tim_In_ConfigFilterMode risingEdgeMode
Filter mode for rising edge.
Definition: IfxGtm_Tim_In.h:114
IfxGtm_Tim_TinMap::channel
IfxGtm_Tim_Ch channel
TIM channel index.
Definition: IfxGtm_PinMap.h:104
IfxGtm_Tim_In_init
boolean IfxGtm_Tim_In_init(IfxGtm_Tim_In *driver, const IfxGtm_Tim_In_Config *config)
Initializes the input capture object.
Definition: IfxGtm_Tim_In.c:54
IfxGtm_Tim_In::captureClockFrequency
float32 captureClockFrequency
Capture clock frequency in Hz.
Definition: IfxGtm_Tim_In.h:150
IfxGtm_Tim_In_Input
IfxGtm_Tim_In_Input
Input Source.
Definition: IfxGtm_Tim_In.h:82
IfxGtm_IrqMode_pulseNotify
Definition: IfxGtm.h:68
IfxGtm_Tim_In_initConfig
void IfxGtm_Tim_In_initConfig(IfxGtm_Tim_In_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default.
Definition: IfxGtm_Tim_In.c:254
IfxGtm_Tim_In_Config::irqMode
IfxGtm_IrqMode irqMode
Interrupt mode for the new value available.
Definition: IfxGtm_Tim_In.h:163
IfxGtm_Tim_Ch_clearDataLostEvent
IFX_INLINE void IfxGtm_Tim_Ch_clearDataLostEvent(Ifx_GTM_TIM_CH *channel)
Clears the data lost flag.
Definition: IfxGtm_Tim.h:498
IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeUpDown
Individual deglitch time mode (Up Down)
Definition: IfxGtm_Tim_In.h:75
IfxGtm_Tim_Ch_setClockSource
void IfxGtm_Tim_Ch_setClockSource(Ifx_GTM_TIM_CH *channel, IfxGtm_Cmu_Clk clock)
Set the channel clock source.
Definition: IfxGtm_Tim.c:133
IfxGtm_Tim_In_Config::isrPriority
Ifx_Priority isrPriority
Set the interrupt priority for new value available. If 0, no interrupt will be generated.
Definition: IfxGtm_Tim_In.h:165
IfxGtm_Tim_In::edgeCounterUpper
uint32 edgeCounterUpper
upper part of the edge counter
Definition: IfxGtm_Tim_In.h:148
IfxGtm_Tim_In_Config::timeout
IfxGtm_Tim_In_ConfigTimeout timeout
Timeout configuration.
Definition: IfxGtm_Tim_In.h:168
sint32
long sint32
Definition: Platform_Types.h:134
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxGtm_Tim_In_ConfigFilter::inputPinMode
IfxPort_InputMode inputPinMode
Input pin mode.
Definition: IfxGtm_Tim_In.h:121
IfxGtm_Tim_Ch_getSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxGtm_Tim_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Tim tim, IfxGtm_Tim_Ch channel)
Returns a pointer to the TIM channel SRC.
Definition: IfxGtm_Tim.h:537
IfxGtm_Tim_In_ConfigCapture::clock
IfxGtm_Cmu_Clk clock
Timer input clock.
Definition: IfxGtm_Tim_In.h:105
IfxGtm_Tim_In_onIsr
void IfxGtm_Tim_In_onIsr(IfxGtm_Tim_In *driver)
will update the driver state To be called in the interrupt generated by the IfxGtm_Tim_In driver ...
Definition: IfxGtm_Tim_In.c:284
IfxGtm_Tim_Ch_isCntOverflowEvent
IFX_INLINE boolean IfxGtm_Tim_Ch_isCntOverflowEvent(Ifx_GTM_TIM_CH *channel)
Test the counter overflow flag.
Definition: IfxGtm_Tim.h:544
IfxGtm_Tim_In::channel
Ifx_GTM_TIM_CH * channel
TIM channel used.
Definition: IfxGtm_Tim_In.h:141
IfxGtm_Tim_Ch_clearGlitchEvent
IFX_INLINE void IfxGtm_Tim_Ch_clearGlitchEvent(Ifx_GTM_TIM_CH *channel)
Clears the glitch flag.
Definition: IfxGtm_Tim.h:510
IfxGtm_Tim_Ch_clearCntOverflowEvent
IFX_INLINE void IfxGtm_Tim_Ch_clearCntOverflowEvent(Ifx_GTM_TIM_CH *channel)
Clears the counter overflow flag.
Definition: IfxGtm_Tim.h:492
IfxGtm_Tim_Ch
IfxGtm_Tim_Ch
Enum for TIM channels.
Definition: IfxGtm_cfg.h:403
IfxGtm_Tim_Input_adjacentChannel
Definition: IfxGtm_Tim.h:114
IfxGtm_Tim_In_ConfigFilter::irqOnGlitch
boolean irqOnGlitch
If TRUE, the interrupt on glitch is enabled.
Definition: IfxGtm_Tim_In.h:118
IfxGtm_Tim_FilterCounter_upDown
Definition: IfxGtm_Tim.h:81
IfxGtm_Tim_Mode_pwmMeasurement
TPWM.
Definition: IfxGtm_Tim.h:138
IfxGtm_Tim_Ch_clearNewValueEvent
IFX_INLINE void IfxGtm_Tim_Ch_clearNewValueEvent(Ifx_GTM_TIM_CH *channel)
Clears the new value flag.
Definition: IfxGtm_Tim.h:516
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxGtm_Tim_getChannel
IFX_INLINE Ifx_GTM_TIM_CH * IfxGtm_Tim_getChannel(Ifx_GTM_TIM *tim, IfxGtm_Tim_Ch channel)
Returns the pointer to the TIM channel.
Definition: IfxGtm_Tim.h:623
IfxGtm_Tim_In.h
GTM IN details.
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxGtm_Tim_In_ConfigFilterMode_none
No filter.
Definition: IfxGtm_Tim_In.h:77
IfxGtm_Cmu_Tim_Filter_Clk_0
FLT_CNT counts with CMU_CLK0.
Definition: IfxGtm_Cmu.h:96
IfxGtm_Tim_Timeout_fallingEdge
Timeout feature enabled for falling edge only.
Definition: IfxGtm_Tim.h:151
IfxGtm_Tim_In_Config::channelIndex
IfxGtm_Tim_Ch channelIndex
Channel index.
Definition: IfxGtm_Tim_In.h:162


iLLD_TC38A: IfxGtm_Tim_In.h Source File

  • Gtm
  • Tim
  • In
IfxGtm_Tim_In.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Tim_In.h
3 * \brief GTM IN details
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Gtm_Tim_In TIM Input Interface
42 * \ingroup IfxLld_Gtm_Tim
43 * \defgroup IfxLld_Gtm_Tim_In_DataStructures Data Structures
44 * \ingroup IfxLld_Gtm_Tim_In
45 * \defgroup IfxLld_Gtm_Tim_In_Enumerations Enumerations
46 * \ingroup IfxLld_Gtm_Tim_In
47 * \defgroup IfxLld_Gtm_Tim_In_Funtions Funtions
48 * \ingroup IfxLld_Gtm_Tim_In
49 */
50
51 #ifndef IFXGTM_TIM_IN_H
52 #define IFXGTM_TIM_IN_H 1
53
54 /******************************************************************************/
55 /*----------------------------------Includes----------------------------------*/
56 /******************************************************************************/
57
58 #include "_PinMap/IfxGtm_PinMap.h"
59 #include "Gtm/Std/IfxGtm_Tim.h"
60 #include "Gtm/Std/IfxGtm_Cmu.h"
61 #include "Cpu/Std/IfxCpu.h"
62 #include "_Utilities/Ifx_Assert.h"
63
64 /******************************************************************************/
65 /*--------------------------------Enumerations--------------------------------*/
66 /******************************************************************************/
67
68 /** \addtogroup IfxLld_Gtm_Tim_In_Enumerations
69 * \{ */
70 /** \brief Config Filter Mode
71 */
72 typedef enum
73 {
74 IfxGtm_Tim_In_ConfigFilterMode_immediateEdgePropagation, /**< \brief Immediate edge propagation mode */
75 IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeUpDown, /**< \brief Individual deglitch time mode (Up Down) */
76 IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeHold, /**< \brief Individual deglitch time mode (Hold) */
77 IfxGtm_Tim_In_ConfigFilterMode_none /**< \brief No filter */
78 } IfxGtm_Tim_In_ConfigFilterMode;
79
80 /** \brief Input Source
81 */
82 typedef enum
83 {
84 IfxGtm_Tim_In_Input_currentChannel, /**< \brief Use the input from the current channel */
85 IfxGtm_Tim_In_Input_adjacentChannel, /**< \brief Use the input from the adjacent channel */
86 IfxGtm_Tim_In_Input_aux /**< \brief Use the input from the aux */
87 } IfxGtm_Tim_In_Input;
88
89 /** \} */
90
91 /******************************************************************************/
92 /*-----------------------------Data Structures--------------------------------*/
93 /******************************************************************************/
94
95 /** \addtogroup IfxLld_Gtm_Tim_In_DataStructures
96 * \{ */
97 /** \brief Configuration structure for TIM capture
98 */
99 typedef struct
100 {
101 boolean irqOnNewVal; /**< \brief If TRUE, the interrupt on new value is enabled */
102 boolean irqOnCntOverflow; /**< \brief If TRUE, the interrupt on CNT overflow is enabled */
103 boolean irqOnEcntOverflow; /**< \brief If TRUE, the interrupt on ECNT (Edge counter) overflow is enabled */
104 boolean irqOnDatalost; /**< \brief If TRUE, the interrupt on data lost (GPR0, GPR1) is enabled */
105 IfxGtm_Cmu_Clk clock; /**< \brief Timer input clock */
106 Ifx_Pwm_Mode mode; /**< \brief PWM mode, only Ifx_Pwm_Mode_leftAligned and Ifx_Pwm_Mode_righAligned are supported */
107 } IfxGtm_Tim_In_ConfigCapture;
108
109 /** \brief Configuration structure for TIM filter
110 */
111 typedef struct
112 {
113 IfxGtm_Cmu_Tim_Filter_Clk clock; /**< \brief Timeout clock */
114 IfxGtm_Tim_In_ConfigFilterMode risingEdgeMode; /**< \brief Filter mode for rising edge */
115 IfxGtm_Tim_In_ConfigFilterMode fallingEdgeMode; /**< \brief Filter mode for falling edge */
116 float32 risingEdgeFilterTime; /**< \brief Rising edge filter time in second */
117 float32 fallingEdgeFilterTime; /**< \brief Falling edge filter time in second */
118 boolean irqOnGlitch; /**< \brief If TRUE, the interrupt on glitch is enabled */
119 IfxGtm_Tim_In_Input input; /**< \brief selected input */
120 IfxGtm_Tim_TinMap *inputPin; /**< \brief If defined, this value overwrites the IfxGtm_Tim_In_Config.filter.input, IfxGtm_Tim_In_Config.timIndex, IfxGtm_Tim_In_Config.channelIndex */
121 IfxPort_InputMode inputPinMode; /**< \brief Input pin mode */
122 } IfxGtm_Tim_In_ConfigFilter;
123
124 /** \brief Configuration structure for TIM timeout
125 */
126 typedef struct
127 {
128 IfxGtm_Cmu_Clk clock; /**< \brief Timeout clock */
129 float32 timeout; /**< \brief Timeout in second. Value of 0 disable the timeout functionality see 27.10.3 Timeout Detection Unit (TDU) */
130 boolean irqOnTimeout; /**< \brief If TRUE, the interrupt on timeout is enabled */
131 } IfxGtm_Tim_In_ConfigTimeout;
132
133 /** \} */
134
135 /** \addtogroup IfxLld_Gtm_Tim_In_DataStructures
136 * \{ */
137 /** \brief Driver Handle
138 */
139 typedef struct
140 {
141 Ifx_GTM_TIM_CH *channel; /**< \brief TIM channel used */
142 uint32 periodTick; /**< \brief Period value in clock ticks */
143 uint32 pulseLengthTick; /**< \brief Duty value in clock ticks */
144 boolean dataCoherent; /**< \brief TRUE, if the duty and period values are measured from the same period */
145 boolean overflowCnt; /**< \brief TRUE if the last measurement show an overflow in CNT */
146 boolean newData; /**< \brief TRUE when values are updated, and if none of the counter CNT, CNTS have overflowed */
147 boolean dataLost; /**< \brief TRUE if data are lost */
148 uint32 edgeCounterUpper; /**< \brief upper part of the edge counter */
149 boolean glitch; /**< \brief TRUE if glitch is detected */
150 float32 captureClockFrequency; /**< \brief Capture clock frequency in Hz */
151 IfxGtm_Tim timIndex; /**< \brief Index of the TIM module being used. */
152 IfxGtm_Tim_Ch channelIndex; /**< \brief Index of the TIM channel being used. */
153 uint16 edgeCount; /**< \brief number of edges counted. */
154 } IfxGtm_Tim_In;
155
156 /** \brief Configuration structure for TIM input capture
157 */
158 typedef struct
159 {
160 Ifx_GTM *gtm; /**< \brief GTM used */
161 IfxGtm_Tim timIndex; /**< \brief TIM index */
162 IfxGtm_Tim_Ch channelIndex; /**< \brief Channel index */
163 IfxGtm_IrqMode irqMode; /**< \brief Interrupt mode for the new value available */
164 IfxSrc_Tos isrProvider; /**< \brief Interrupt service provider for the timer interrupt */
165 Ifx_Priority isrPriority; /**< \brief Set the interrupt priority for new value available. If 0, no interrupt will be generated */
166 IfxGtm_Tim_In_ConfigCapture capture; /**< \brief Capture configuration */
167 IfxGtm_Tim_In_ConfigFilter filter; /**< \brief Filter configuration */
168 IfxGtm_Tim_In_ConfigTimeout timeout; /**< \brief Timeout configuration */
169 } IfxGtm_Tim_In_Config;
170
171 /** \} */
172
173 /** \addtogroup IfxLld_Gtm_Tim_In_Funtions
174 * \{ */
175
176 /******************************************************************************/
177 /*-------------------------Inline Function Prototypes-------------------------*/
178 /******************************************************************************/
179
180 /** \brief Clear the new data flag
181 * \param driver TIM Input object
182 * \return None
183 */
184 IFX_INLINE void IfxGtm_Tim_In_clearNewData(IfxGtm_Tim_In *driver);
185
186 /** \brief return the dutycycle in percent
187 * \param driver TIM Input object
188 * \param dataCoherent If true, the duty cycle has been calculated with coherent values for the period and duty, else the period and duty value are from 2 adjacent periods
189 * \return duty
190 */
191 IFX_INLINE float32 IfxGtm_Tim_In_getDutyPercent(IfxGtm_Tim_In *driver, boolean *dataCoherent);
192
193 /** \brief Return the period in second
194 * \param driver TIM Input object
195 * \return period value in seconds
196 */
197 IFX_INLINE float32 IfxGtm_Tim_In_getPeriodSecond(IfxGtm_Tim_In *driver);
198
199 /** \brief Return the period value in tick
200 * \param driver TIM Input object
201 * \return period value in ticks
202 */
203 IFX_INLINE sint32 IfxGtm_Tim_In_getPeriodTicks(IfxGtm_Tim_In *driver);
204
205 /** \brief Return the pulse length value in tick
206 * \param driver TIM Input object
207 * \return pulse length
208 */
209 IFX_INLINE sint32 IfxGtm_Tim_In_getPulseLengthTick(IfxGtm_Tim_In *driver);
210
211 /** \brief Indicates if data were lost
212 * \param driver TIM Input object
213 * \return TRUE if Data is lost FALSE otherwise
214 */
215 IFX_INLINE boolean IfxGtm_Tim_In_isDataLost(IfxGtm_Tim_In *driver);
216
217 /** \brief Indicates if new data are present (new data flag)
218 * \param driver TIM Input object
219 * \return TRUE if New Data FALSE otherwise
220 */
221 IFX_INLINE boolean IfxGtm_Tim_In_isNewData(IfxGtm_Tim_In *driver);
222
223 /******************************************************************************/
224 /*-------------------------Global Function Prototypes-------------------------*/
225 /******************************************************************************/
226
227 /** \brief Initializes the input capture object
228 * \param driver TIM Input object
229 * \param config Configuration structure for the input capture Timer
230 * \return TRUE on success else FALSE
231 */
232 IFX_EXTERN boolean IfxGtm_Tim_In_init(IfxGtm_Tim_In *driver, const IfxGtm_Tim_In_Config *config);
233
234 /** \brief Initializes the configuration structure to default
235 * \param config Configuration structure for the input capture Timer
236 * \param gtm Pointer to GTM module
237 * \return None
238 */
239 IFX_EXTERN void IfxGtm_Tim_In_initConfig(IfxGtm_Tim_In_Config *config, Ifx_GTM *gtm);
240
241 /** \brief will update the driver state\n
242 * To be called in the interrupt generated by the IfxGtm_Tim_In driver
243 * \param driver TIM Input object
244 * \return None
245 */
246 IFX_EXTERN void IfxGtm_Tim_In_onIsr(IfxGtm_Tim_In *driver);
247
248 /** \brief Updates the period and duty cycle
249 * \param driver TIM Input object
250 * \return None
251 */
252 IFX_EXTERN void IfxGtm_Tim_In_update(IfxGtm_Tim_In *driver);
253
254 /** \} */
255
256 /******************************************************************************/
257 /*---------------------Inline Function Implementations------------------------*/
258 /******************************************************************************/
259
260 IFX_INLINE void IfxGtm_Tim_In_clearNewData(IfxGtm_Tim_In *driver)
261 {
262 driver->newData = FALSE;
263 }
264
265
266 IFX_INLINE float32 IfxGtm_Tim_In_getDutyPercent(IfxGtm_Tim_In *driver, boolean *dataCoherent)
267 {
268 float32 duty;
269 boolean interruptState = IfxCpu_disableInterrupts();
270 duty = (float32)(driver->pulseLengthTick * 100) / driver->periodTick;
271 *dataCoherent = driver->dataCoherent;
272 IfxCpu_restoreInterrupts(interruptState);
273
274 return duty;
275 }
276
277
278 IFX_INLINE float32 IfxGtm_Tim_In_getPeriodSecond(IfxGtm_Tim_In *driver)
279 {
280 return IfxGtm_Tim_In_getPeriodTicks(driver) / driver->captureClockFrequency;
281 }
282
283
284 IFX_INLINE sint32 IfxGtm_Tim_In_getPeriodTicks(IfxGtm_Tim_In *driver)
285 {
286 return driver->periodTick;
287 }
288
289
290 IFX_INLINE sint32 IfxGtm_Tim_In_getPulseLengthTick(IfxGtm_Tim_In *driver)
291 {
292 return driver->pulseLengthTick;
293 }
294
295
296 IFX_INLINE boolean IfxGtm_Tim_In_isDataLost(IfxGtm_Tim_In *driver)
297 {
298 return driver->dataLost;
299 }
300
301
302 IFX_INLINE boolean IfxGtm_Tim_In_isNewData(IfxGtm_Tim_In *driver)
303 {
304 return driver->newData;
305 }
306
307
308 #endif /* IFXGTM_TIM_IN_H */
IfxGtm_Tim_In::pulseLengthTick
uint32 pulseLengthTick
Duty value in clock ticks.
Definition: IfxGtm_Tim_In.h:143
Ifx_Pwm_Mode
Ifx_Pwm_Mode
Definition: Ifx_Types.h:175
IfxGtm_Tim_In_ConfigFilter
Configuration structure for TIM filter.
Definition: IfxGtm_Tim_In.h:111
IfxGtm_Tim_In_ConfigCapture::mode
Ifx_Pwm_Mode mode
PWM mode, only Ifx_Pwm_Mode_leftAligned and Ifx_Pwm_Mode_righAligned are supported.
Definition: IfxGtm_Tim_In.h:106
IfxGtm_Tim_In::dataCoherent
boolean dataCoherent
TRUE, if the duty and period values are measured from the same period.
Definition: IfxGtm_Tim_In.h:144
IfxGtm_Tim_In::newData
boolean newData
TRUE when values are updated, and if none of the counter CNT, CNTS have overflowed.
Definition: IfxGtm_Tim_In.h:146
IfxGtm_Tim_In_Config
Configuration structure for TIM input capture.
Definition: IfxGtm_Tim_In.h:158
IfxGtm_Tim_In_ConfigCapture::irqOnDatalost
boolean irqOnDatalost
If TRUE, the interrupt on data lost (GPR0, GPR1) is enabled.
Definition: IfxGtm_Tim_In.h:104
IfxGtm_Tim_In_Input_adjacentChannel
Use the input from the adjacent channel.
Definition: IfxGtm_Tim_In.h:85
IfxGtm_Tim_In_ConfigFilter::clock
IfxGtm_Cmu_Tim_Filter_Clk clock
Timeout clock.
Definition: IfxGtm_Tim_In.h:113
IfxGtm_Tim_In::edgeCount
uint16 edgeCount
number of edges counted.
Definition: IfxGtm_Tim_In.h:153
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:100
IfxGtm_Tim_In_ConfigFilter::fallingEdgeMode
IfxGtm_Tim_In_ConfigFilterMode fallingEdgeMode
Filter mode for falling edge.
Definition: IfxGtm_Tim_In.h:115
IfxGtm_Tim_In_isNewData
IFX_INLINE boolean IfxGtm_Tim_In_isNewData(IfxGtm_Tim_In *driver)
Indicates if new data are present (new data flag)
Definition: IfxGtm_Tim_In.h:302
IfxGtm_Tim_In_Config::gtm
Ifx_GTM * gtm
GTM used.
Definition: IfxGtm_Tim_In.h:160
IfxGtm_Tim_In_getPeriodTicks
IFX_INLINE sint32 IfxGtm_Tim_In_getPeriodTicks(IfxGtm_Tim_In *driver)
Return the period value in tick.
Definition: IfxGtm_Tim_In.h:284
uint32
unsigned long uint32
Definition: Platform_Types.h:116
float32
float float32
Definition: Platform_Types.h:170
IfxGtm_PinMap.h
GTM I/O map.
IfxGtm_Tim_In_ConfigTimeout::irqOnTimeout
boolean irqOnTimeout
If TRUE, the interrupt on timeout is enabled.
Definition: IfxGtm_Tim_In.h:130
Ifx_Assert.h
Assert functions.
IfxGtm_Tim_In_ConfigCapture
Configuration structure for TIM capture.
Definition: IfxGtm_Tim_In.h:99
IfxGtm_Tim_In_Config::capture
IfxGtm_Tim_In_ConfigCapture capture
Capture configuration.
Definition: IfxGtm_Tim_In.h:166
IfxGtm_Tim_In_ConfigFilter::fallingEdgeFilterTime
float32 fallingEdgeFilterTime
Falling edge filter time in second.
Definition: IfxGtm_Tim_In.h:117
IfxGtm_Tim_In_getPulseLengthTick
IFX_INLINE sint32 IfxGtm_Tim_In_getPulseLengthTick(IfxGtm_Tim_In *driver)
Return the pulse length value in tick.
Definition: IfxGtm_Tim_In.h:290
IfxGtm_Tim
IfxGtm_Tim
Enum for TIM objects.
Definition: IfxGtm_cfg.h:390
IfxGtm_Tim_In_Input_aux
Use the input from the aux.
Definition: IfxGtm_Tim_In.h:86
IfxGtm_Tim_In_Input_currentChannel
Use the input from the current channel.
Definition: IfxGtm_Tim_In.h:84
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxCpu_restoreInterrupts
IFX_INLINE void IfxCpu_restoreInterrupts(boolean enabled)
API to restore global interrupt with that of the passed parameter.
Definition: IfxCpu.h:1026
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxGtm_Tim_In_Config::isrProvider
IfxSrc_Tos isrProvider
Interrupt service provider for the timer interrupt.
Definition: IfxGtm_Tim_In.h:164
IfxGtm_Tim_In::timIndex
IfxGtm_Tim timIndex
Index of the TIM module being used.
Definition: IfxGtm_Tim_In.h:151
IfxGtm_Tim_In::glitch
boolean glitch
TRUE if glitch is detected.
Definition: IfxGtm_Tim_In.h:149
IfxGtm_Tim.h
GTM basic functionality.
IfxGtm_Tim_In_ConfigFilter::input
IfxGtm_Tim_In_Input input
selected input
Definition: IfxGtm_Tim_In.h:119
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxGtm_Cmu_Tim_Filter_Clk
IfxGtm_Cmu_Tim_Filter_Clk
Tim Filter counter frequency select.
Definition: IfxGtm_Cmu.h:94
IfxGtm_Tim_In_ConfigFilter::risingEdgeFilterTime
float32 risingEdgeFilterTime
Rising edge filter time in second.
Definition: IfxGtm_Tim_In.h:116
IfxGtm_Tim_TinMap
TIN pin mapping structure.
Definition: IfxGtm_PinMap.h:101
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxCpu_disableInterrupts
IFX_INLINE boolean IfxCpu_disableInterrupts(void)
API to disable global interrupt and return the previous status.
Definition: IfxCpu.h:749
IfxGtm_Tim_In::overflowCnt
boolean overflowCnt
TRUE if the last measurement show an overflow in CNT.
Definition: IfxGtm_Tim_In.h:145
IfxGtm_Tim_In_ConfigTimeout
Configuration structure for TIM timeout.
Definition: IfxGtm_Tim_In.h:126
IfxGtm_Tim_In_ConfigFilter::inputPin
IfxGtm_Tim_TinMap * inputPin
If defined, this value overwrites the IfxGtm_Tim_In_Config.filter.input, IfxGtm_Tim_In_Config.timIndex, IfxGtm_Tim_In_Config.channelIndex.
Definition: IfxGtm_Tim_In.h:120
IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeHold
Individual deglitch time mode (Hold)
Definition: IfxGtm_Tim_In.h:76
IfxGtm_Tim_In_ConfigCapture::irqOnCntOverflow
boolean irqOnCntOverflow
If TRUE, the interrupt on CNT overflow is enabled.
Definition: IfxGtm_Tim_In.h:102
IfxGtm_Tim_In_ConfigCapture::irqOnNewVal
boolean irqOnNewVal
If TRUE, the interrupt on new value is enabled.
Definition: IfxGtm_Tim_In.h:101
IfxGtm_Tim_In_getPeriodSecond
IFX_INLINE float32 IfxGtm_Tim_In_getPeriodSecond(IfxGtm_Tim_In *driver)
Return the period in second.
Definition: IfxGtm_Tim_In.h:278
IfxGtm_Tim_In_ConfigTimeout::timeout
float32 timeout
Timeout in second. Value of 0 disable the timeout functionality see 27.10.3 Timeout Detection Unit (T...
Definition: IfxGtm_Tim_In.h:129
IfxGtm_Cmu_Clk
IfxGtm_Cmu_Clk
Definition: IfxGtm_Cmu.h:64
IfxGtm_Tim_In
Driver Handle.
Definition: IfxGtm_Tim_In.h:139
IfxGtm_Tim_In_isDataLost
IFX_INLINE boolean IfxGtm_Tim_In_isDataLost(IfxGtm_Tim_In *driver)
Indicates if data were lost.
Definition: IfxGtm_Tim_In.h:296
IfxGtm_Tim_In_Config::filter
IfxGtm_Tim_In_ConfigFilter filter
Filter configuration.
Definition: IfxGtm_Tim_In.h:167
IfxGtm_Tim_In_update
IFX_EXTERN void IfxGtm_Tim_In_update(IfxGtm_Tim_In *driver)
Updates the period and duty cycle.
Definition: IfxGtm_Tim_In.c:290
IfxGtm_Tim_In_ConfigFilterMode_immediateEdgePropagation
Immediate edge propagation mode.
Definition: IfxGtm_Tim_In.h:74
IfxGtm_Tim_In::dataLost
boolean dataLost
TRUE if data are lost.
Definition: IfxGtm_Tim_In.h:147
IfxGtm_Tim_In_ConfigCapture::irqOnEcntOverflow
boolean irqOnEcntOverflow
If TRUE, the interrupt on ECNT (Edge counter) overflow is enabled.
Definition: IfxGtm_Tim_In.h:103
IfxGtm_Tim_In::periodTick
uint32 periodTick
Period value in clock ticks.
Definition: IfxGtm_Tim_In.h:142
IfxGtm_Tim_In_ConfigFilter::risingEdgeMode
IfxGtm_Tim_In_ConfigFilterMode risingEdgeMode
Filter mode for rising edge.
Definition: IfxGtm_Tim_In.h:114
IfxGtm_Tim_In_init
IFX_EXTERN boolean IfxGtm_Tim_In_init(IfxGtm_Tim_In *driver, const IfxGtm_Tim_In_Config *config)
Initializes the input capture object.
Definition: IfxGtm_Tim_In.c:54
IfxGtm_Tim_In_clearNewData
IFX_INLINE void IfxGtm_Tim_In_clearNewData(IfxGtm_Tim_In *driver)
Clear the new data flag.
Definition: IfxGtm_Tim_In.h:260
IfxGtm_Tim_In::captureClockFrequency
float32 captureClockFrequency
Capture clock frequency in Hz.
Definition: IfxGtm_Tim_In.h:150
IfxGtm_Tim_In_Input
IfxGtm_Tim_In_Input
Input Source.
Definition: IfxGtm_Tim_In.h:82
IfxCpu.h
CPU basic functionality.
IfxGtm_Tim_In_initConfig
IFX_EXTERN void IfxGtm_Tim_In_initConfig(IfxGtm_Tim_In_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default.
Definition: IfxGtm_Tim_In.c:254
IfxGtm_Tim_In_Config::irqMode
IfxGtm_IrqMode irqMode
Interrupt mode for the new value available.
Definition: IfxGtm_Tim_In.h:163
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeUpDown
Individual deglitch time mode (Up Down)
Definition: IfxGtm_Tim_In.h:75
IfxGtm_Tim_In_Config::isrPriority
Ifx_Priority isrPriority
Set the interrupt priority for new value available. If 0, no interrupt will be generated.
Definition: IfxGtm_Tim_In.h:165
IfxGtm_Tim_In::edgeCounterUpper
uint32 edgeCounterUpper
upper part of the edge counter
Definition: IfxGtm_Tim_In.h:148
IfxGtm_Tim_In_Config::timeout
IfxGtm_Tim_In_ConfigTimeout timeout
Timeout configuration.
Definition: IfxGtm_Tim_In.h:168
IfxGtm_Tim_In_getDutyPercent
IFX_INLINE float32 IfxGtm_Tim_In_getDutyPercent(IfxGtm_Tim_In *driver, boolean *dataCoherent)
return the dutycycle in percent
Definition: IfxGtm_Tim_In.h:266
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:81
sint32
long sint32
Definition: Platform_Types.h:134
IfxGtm_Tim_In_ConfigFilter::inputPinMode
IfxPort_InputMode inputPinMode
Input pin mode.
Definition: IfxGtm_Tim_In.h:121
IfxGtm_Tim_In_ConfigCapture::clock
IfxGtm_Cmu_Clk clock
Timer input clock.
Definition: IfxGtm_Tim_In.h:105
IfxGtm_Tim_In_onIsr
IFX_EXTERN void IfxGtm_Tim_In_onIsr(IfxGtm_Tim_In *driver)
will update the driver state To be called in the interrupt generated by the IfxGtm_Tim_In driver ...
Definition: IfxGtm_Tim_In.c:284
IfxGtm_IrqMode
IfxGtm_IrqMode
Enum for GTM interrupt modes.
Definition: IfxGtm.h:64
IfxGtm_Tim_In::channel
Ifx_GTM_TIM_CH * channel
TIM channel used.
Definition: IfxGtm_Tim_In.h:141
IfxGtm_Cmu.h
GTM basic functionality.
IfxGtm_Tim_Ch
IfxGtm_Tim_Ch
Enum for TIM channels.
Definition: IfxGtm_cfg.h:403
IfxGtm_Tim_In_ConfigFilter::irqOnGlitch
boolean irqOnGlitch
If TRUE, the interrupt on glitch is enabled.
Definition: IfxGtm_Tim_In.h:118
IfxGtm_Tim_In_ConfigFilterMode
IfxGtm_Tim_In_ConfigFilterMode
Config Filter Mode.
Definition: IfxGtm_Tim_In.h:72
IfxGtm_Tim_In_ConfigFilterMode_none
No filter.
Definition: IfxGtm_Tim_In.h:77
IfxGtm_Tim_In::channelIndex
IfxGtm_Tim_Ch channelIndex
Index of the TIM channel being used.
Definition: IfxGtm_Tim_In.h:152


iLLD_TC38A: IfxGtm_Tim_Timer.c Source File

  • Gtm
  • Tim
  • Timer
IfxGtm_Tim_Timer.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Tim_Timer.c
3 * \brief GTM TIMER details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxGtm_Tim_Timer.h"
47 #include "_Utilities/Ifx_Assert.h"
48
49 /******************************************************************************/
50 /*-------------------------Function Implementations---------------------------*/
51 /******************************************************************************/
52
53 void IfxGtm_Tim_Timer_initChannel(IfxGtm_Tim_Timer *driver, IfxGtm_Tim_Timer_Config *config)
54 {
55 driver->gtm = &MODULE_GTM;
56 driver->timIndex = config->timIndex;
57
58 driver->tim = &driver->gtm->TIM[config->timIndex];
59 driver->channel = config->channel;
60
61 Ifx_GTM_TIM_CH *channel = IfxGtm_Tim_getChannel(driver->tim, driver->channel);
62
63 IfxGtm_Tim_Ch_setControl(channel, config->channelControl);
64
65 if (config->enableAuxInputSourceSelect)
66 {
67 IfxGtm_Tim_Ch_setAuxInputSourceSelection(driver->gtm, driver->timIndex, driver->channel);
68 }
69
70 IfxGtm_Tim_Ch_setRisingEdgeFilterTime(channel, config->raisingEdgeFilterTime);
71 IfxGtm_Tim_Ch_setFallingEdgeFilterTime(channel, config->fallingEdgeFilterTime);
72 IfxGtm_Tim_Ch_setInputSourceSelection(driver->tim, driver->channel, config->inputSourceSelect);
73
74 if (config->irqEnable)
75 {
76 IfxGtm_Tim_Ch_setNotificationMode(channel, config->irqMode);
77 IfxGtm_Tim_Ch_setNotification(channel, config->irqType);
78 }
79
80 if ((config->channelControl.mode == IfxGtm_Tim_Mode_inputPrescaler) || (config->channelControl.mode == IfxGtm_Tim_Mode_bitCompression))
81 {
82 IfxGtm_Tim_Ch_setShadowCounter(channel, config->shadowCounter);
83 }
84 }
85
86
87 void IfxGtm_Tim_Timer_initChannelConfig(IfxGtm_Tim_Timer_Config *config, Ifx_GTM *gtm)
88 {
89 IFX_UNUSED_PARAMETER(gtm)
90 const IfxGtm_Tim_Timer_Config IfxGtm_Tim_Timer_defaultChannelConfig = {
91 .timIndex = IfxGtm_Tim_0,
92 .channel = IfxGtm_Tim_Ch_0,
93 .channelControl = { //
94 .enable = 1,
95 .mode = IfxGtm_Tim_Mode_pwmMeasurement,
96 .enableOneShotMode = 0,
97 .enableAruRouting = 0,
98 .channelInputControl = 0,
99 .gpr0Sel = IfxGtm_Tim_GprSel_tbuTs0,
100 .gpr1Sel = IfxGtm_Tim_GprSel_tbuTs0,
101 .cntsSel = IfxGtm_Tim_CntsSel_cntReg,
102 .signalLevelControl = 0,
103 .ignoreSignalLevel = 0,
104 .enableCounterReset = 0,
105 .enableFilter = 0,
106 .filterCounterFrequency = IfxGtm_Tim_FilterCounterFreqSel_cmuClk0,
107 .enableExternalCaptureMode = 0,
108 .filterModeRisingEdge = IfxGtm_Tim_FilterMode_immediateEdgePropagation,
109 .filterCounterModeRisingEdge = IfxGtm_Tim_FilterCounter_upDown,
110 .filterModeFallingEdge = IfxGtm_Tim_FilterMode_immediateEdgePropagation,
111 .filterCounterModeFallingEdge = IfxGtm_Tim_FilterCounter_upDown,
112 .clkSel = IfxGtm_Cmu_Clk_0,
113 .extendEdgeCounterOverflow = 0,
114 .egpr0Sel = 0,
115 .egpr1Sel = 0,
116 .timeoutControl = IfxGtm_Tim_Timeout_disabled,
117 },
118 .raisingEdgeFilterTime = 0,
119 .fallingEdgeFilterTime = 0,
120 .shadowCounter = 0,
121 .irqEnable = 0,
122 .irqMode = IfxGtm_IrqMode_level,
123 .irqType = IfxGtm_Tim_IrqType_newVal,
124 .inputSourceSelect = {
125 .mode = 0,
126 .value = 0,
127 },
128 .enableAuxInputSourceSelect = 0,
129 };
130
131 *config = IfxGtm_Tim_Timer_defaultChannelConfig;
132 }
IfxGtm_Tim_0
TIM object 0.
Definition: IfxGtm_cfg.h:392
IfxGtm_Tim_FilterCounterFreqSel_cmuClk0
FLT_CNT counts with CMU_CLK0.
Definition: IfxGtm_Tim.h:89
IfxGtm_Tim_Ch_setAuxInputSourceSelection
IFX_INLINE void IfxGtm_Tim_Ch_setAuxInputSourceSelection(Ifx_GTM *gtm, IfxGtm_Tim timIndex, IfxGtm_Tim_Ch channel)
set the Auxilary input source selection of a particular channel.
Definition: IfxGtm_Tim.h:574
IfxGtm_IrqMode_level
Definition: IfxGtm.h:66
IfxGtm_Tim_Timer_Config::inputSourceSelect
IfxGtm_Tim_InputSourceSelect inputSourceSelect
input source selection (mode , Value)
Definition: IfxGtm_Tim_Timer.h:83
IfxGtm_Tim_GprSel_tbuTs0
Definition: IfxGtm_Tim.h:105
IfxGtm_Tim_ChannelControl::mode
IfxGtm_Tim_Mode mode
TIM channel Mode.
Definition: IfxGtm_Tim.h:166
IfxGtm_Tim_Timer_initChannel
void IfxGtm_Tim_Timer_initChannel(IfxGtm_Tim_Timer *driver, IfxGtm_Tim_Timer_Config *config)
Initialises the TIM channel object.
Definition: IfxGtm_Tim_Timer.c:53
IfxGtm_Tim_Timeout_disabled
Timeout feature disabled.
Definition: IfxGtm_Tim.h:149
IfxGtm_Tim_Ch_0
TIM channel 0.
Definition: IfxGtm_cfg.h:405
IfxGtm_Tim_Timer::channel
IfxGtm_Tim_Ch channel
Tim channel no.
Definition: IfxGtm_Tim_Timer.h:67
IfxGtm_Tim_Timer_Config::channelControl
IfxGtm_Tim_ChannelControl channelControl
Control configuration.
Definition: IfxGtm_Tim_Timer.h:76
IfxGtm_Tim_Timer_Config
Tim configuration data structure.
Definition: IfxGtm_Tim_Timer.h:72
IfxGtm_Tim_Timer_Config::irqType
IfxGtm_Tim_IrqType irqType
interrupt type (new value/ ecnt overflow/ gpr overflow/ cnt overflow / TO detect / glitch detect) ...
Definition: IfxGtm_Tim_Timer.h:82
IfxGtm_Tim_Mode_inputPrescaler
TIPM.
Definition: IfxGtm_Tim.h:141
IfxGtm_Tim_Timer_Config::irqMode
IfxGtm_IrqMode irqMode
interrupt mode (level/pulse/pulse notify/single pulse)
Definition: IfxGtm_Tim_Timer.h:81
IfxGtm_Tim_Ch_setFallingEdgeFilterTime
IFX_INLINE void IfxGtm_Tim_Ch_setFallingEdgeFilterTime(Ifx_GTM_TIM_CH *channel, uint32 filterTime)
This function configures the Falling edge Filter Parameter.
Definition: IfxGtm_Tim.h:589
Ifx_Assert.h
Assert functions.
IfxGtm_Tim_Ch_setRisingEdgeFilterTime
IFX_INLINE void IfxGtm_Tim_Ch_setRisingEdgeFilterTime(Ifx_GTM_TIM_CH *channel, uint32 filterTime)
This function configures theRaising edge Filter Parameter.
Definition: IfxGtm_Tim.h:611
IfxGtm_Tim_Timer.h
GTM TIMER details.
IfxGtm_Tim_Timer_Config::raisingEdgeFilterTime
uint32 raisingEdgeFilterTime
Filter Raising Edge parameter.
Definition: IfxGtm_Tim_Timer.h:77
IfxGtm_Tim_Ch_setShadowCounter
IFX_INLINE void IfxGtm_Tim_Ch_setShadowCounter(Ifx_GTM_TIM_CH *channel, uint32 shadowCounter)
This function configures the Shadow counter register.
Definition: IfxGtm_Tim.h:617
IfxGtm_Tim_CntsSel_cntReg
Definition: IfxGtm_Tim.h:73
IfxGtm_Tim_FilterMode_immediateEdgePropagation
Immediate edge Propagation mode.
Definition: IfxGtm_Tim.h:99
IfxGtm_Cmu_Clk_0
Definition: IfxGtm_Cmu.h:66
IfxGtm_Tim_Timer_Config::enableAuxInputSourceSelect
boolean enableAuxInputSourceSelect
enable aurilliary input source selection
Definition: IfxGtm_Tim_Timer.h:84
IfxGtm_Tim_Ch_setNotificationMode
void IfxGtm_Tim_Ch_setNotificationMode(Ifx_GTM_TIM_CH *channel, IfxGtm_IrqMode mode)
This function configures the TIM channel IRQ mode.
Definition: IfxGtm_Tim.c:184
IfxGtm_Tim_Timer_Config::shadowCounter
uint32 shadowCounter
Shadow counter value.
Definition: IfxGtm_Tim_Timer.h:79
IfxGtm_Tim_Timer_Config::fallingEdgeFilterTime
uint32 fallingEdgeFilterTime
Filter Falling Edge parameter.
Definition: IfxGtm_Tim_Timer.h:78
IfxGtm_Tim_Ch_setNotification
IFX_INLINE void IfxGtm_Tim_Ch_setNotification(Ifx_GTM_TIM_CH *channel, IfxGtm_Tim_IrqType irqType)
set the Interrupt Notification
Definition: IfxGtm_Tim.h:604
IfxGtm_Tim_Timer_Config::irqEnable
boolean irqEnable
enable interrupt notification
Definition: IfxGtm_Tim_Timer.h:80
IfxGtm_Tim_Timer_initChannelConfig
void IfxGtm_Tim_Timer_initChannelConfig(IfxGtm_Tim_Timer_Config *config, Ifx_GTM *gtm)
Initialise the config struct with default TIM channel configuration.
Definition: IfxGtm_Tim_Timer.c:87
IfxGtm_Tim_Timer::timIndex
IfxGtm_Tim timIndex
Specifies the TIM module no.
Definition: IfxGtm_Tim_Timer.h:66
IfxGtm_Tim_Ch_setInputSourceSelection
IFX_INLINE void IfxGtm_Tim_Ch_setInputSourceSelection(Ifx_GTM_TIM *tim, IfxGtm_Tim_Ch channel, IfxGtm_Tim_InputSourceSelect inputSource)
This function configures the Input source selection register.
Definition: IfxGtm_Tim.h:595
IfxGtm_Tim_Timer
Tim handle data structure.
Definition: IfxGtm_Tim_Timer.h:62
IfxGtm_Tim_Ch_setControl
void IfxGtm_Tim_Ch_setControl(Ifx_GTM_TIM_CH *channel, IfxGtm_Tim_ChannelControl control)
This function configures the TIM channel Control register.
Definition: IfxGtm_Tim.c:139
IfxGtm_Tim_Timer::tim
Ifx_GTM_TIM * tim
Pointer to TIM module.
Definition: IfxGtm_Tim_Timer.h:65
IfxGtm_Tim_FilterCounter_upDown
Definition: IfxGtm_Tim.h:81
IfxGtm_Tim_Mode_pwmMeasurement
TPWM.
Definition: IfxGtm_Tim.h:138
IfxGtm_Tim_getChannel
IFX_INLINE Ifx_GTM_TIM_CH * IfxGtm_Tim_getChannel(Ifx_GTM_TIM *tim, IfxGtm_Tim_Ch channel)
Returns the pointer to the TIM channel.
Definition: IfxGtm_Tim.h:623
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
IfxGtm_Tim_Mode_bitCompression
TBCM.
Definition: IfxGtm_Tim.h:142
IfxGtm_Tim_Timer::gtm
Ifx_GTM * gtm
Pointer to GTM module.
Definition: IfxGtm_Tim_Timer.h:64
IfxGtm_Tim_IrqType_newVal
New measurement value detected by SMU of channel.
Definition: IfxGtm_Tim.h:128


iLLD_TC38A: IfxGtm_Tim_Timer.h Source File

  • Gtm
  • Tim
  • Timer
IfxGtm_Tim_Timer.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Tim_Timer.h
3 * \brief GTM TIMER details
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Gtm_Tim_Timer TIM Timer Interface
42 * \ingroup IfxLld_Gtm_Tim
43 */
44
45 #ifndef IFXGTM_TIM_TIMER_H
46 #define IFXGTM_TIM_TIMER_H 1
47
48 /******************************************************************************/
49 /*----------------------------------Includes----------------------------------*/
50 /******************************************************************************/
51
52 #include "Gtm/Std/IfxGtm_Tim.h"
53 #include "Gtm/Std/IfxGtm_Cmu.h"
54 #include "_Impl/IfxGtm_cfg.h"
55
56 /******************************************************************************/
57 /*-----------------------------Data Structures--------------------------------*/
58 /******************************************************************************/
59
60 /** \brief Tim handle data structure
61 */
62 typedef struct
63 {
64 Ifx_GTM *gtm; /**< \brief Pointer to GTM module */
65 Ifx_GTM_TIM *tim; /**< \brief Pointer to TIM module */
66 IfxGtm_Tim timIndex; /**< \brief Specifies the TIM module no */
67 IfxGtm_Tim_Ch channel; /**< \brief Tim channel no */
68 } IfxGtm_Tim_Timer;
69
70 /** \brief Tim configuration data structure
71 */
72 typedef struct
73 {
74 IfxGtm_Tim timIndex; /**< \brief Specifies the TIM instance number */
75 IfxGtm_Tim_Ch channel; /**< \brief Tim channel no */
76 IfxGtm_Tim_ChannelControl channelControl; /**< \brief Control configuration */
77 uint32 raisingEdgeFilterTime; /**< \brief Filter Raising Edge parameter */
78 uint32 fallingEdgeFilterTime; /**< \brief Filter Falling Edge parameter */
79 uint32 shadowCounter; /**< \brief Shadow counter value */
80 boolean irqEnable; /**< \brief enable interrupt notification */
81 IfxGtm_IrqMode irqMode; /**< \brief interrupt mode (level/pulse/pulse notify/single pulse) */
82 IfxGtm_Tim_IrqType irqType; /**< \brief interrupt type (new value/ ecnt overflow/ gpr overflow/ cnt overflow / TO detect / glitch detect) */
83 IfxGtm_Tim_InputSourceSelect inputSourceSelect; /**< \brief input source selection (mode , Value) */
84 boolean enableAuxInputSourceSelect; /**< \brief enable aurilliary input source selection */
85 } IfxGtm_Tim_Timer_Config;
86
87 /******************************************************************************/
88 /*-------------------------Global Function Prototypes-------------------------*/
89 /******************************************************************************/
90
91 /** \brief Initialises the TIM channel object
92 * \param driver TOM Timer interface Handle
93 * \param config Configuration structure for TIM
94 * \return None
95 */
96 IFX_EXTERN void IfxGtm_Tim_Timer_initChannel(IfxGtm_Tim_Timer *driver, IfxGtm_Tim_Timer_Config *config);
97
98 /** \brief Initialise the config struct with default TIM channel configuration
99 * \param config pointer to the TIM Channel configuration (it will be initialized by this function)
100 * \param gtm Pointer to GTM module
101 * \return None
102 */
103 IFX_EXTERN void IfxGtm_Tim_Timer_initChannelConfig(IfxGtm_Tim_Timer_Config *config, Ifx_GTM *gtm);
104
105 #endif /* IFXGTM_TIM_TIMER_H */
IfxGtm_Tim_Timer_Config::inputSourceSelect
IfxGtm_Tim_InputSourceSelect inputSourceSelect
input source selection (mode , Value)
Definition: IfxGtm_Tim_Timer.h:83
IfxGtm_Tim_InputSourceSelect
Definition: IfxGtm_Tim.h:205
IfxGtm_Tim_Timer::channel
IfxGtm_Tim_Ch channel
Tim channel no.
Definition: IfxGtm_Tim_Timer.h:67
IfxGtm_Tim_Timer_Config::channelControl
IfxGtm_Tim_ChannelControl channelControl
Control configuration.
Definition: IfxGtm_Tim_Timer.h:76
IfxGtm_Tim_Timer_Config
Tim configuration data structure.
Definition: IfxGtm_Tim_Timer.h:72
IfxGtm_Tim_Timer_Config::irqType
IfxGtm_Tim_IrqType irqType
interrupt type (new value/ ecnt overflow/ gpr overflow/ cnt overflow / TO detect / glitch detect) ...
Definition: IfxGtm_Tim_Timer.h:82
IfxGtm_Tim_Timer_Config::irqMode
IfxGtm_IrqMode irqMode
interrupt mode (level/pulse/pulse notify/single pulse)
Definition: IfxGtm_Tim_Timer.h:81
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxGtm_Tim_Timer_initChannel
IFX_EXTERN void IfxGtm_Tim_Timer_initChannel(IfxGtm_Tim_Timer *driver, IfxGtm_Tim_Timer_Config *config)
Initialises the TIM channel object.
Definition: IfxGtm_Tim_Timer.c:53
IfxGtm_Tim
IfxGtm_Tim
Enum for TIM objects.
Definition: IfxGtm_cfg.h:390
IfxGtm_Tim_Timer_Config::raisingEdgeFilterTime
uint32 raisingEdgeFilterTime
Filter Raising Edge parameter.
Definition: IfxGtm_Tim_Timer.h:77
IfxGtm_Tim_IrqType
IfxGtm_Tim_IrqType
Definition: IfxGtm_Tim.h:126
IfxGtm_Tim_ChannelControl
Channel control.
Definition: IfxGtm_Tim.h:163
IfxGtm_Tim.h
GTM basic functionality.
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxGtm_Tim_Timer_Config::enableAuxInputSourceSelect
boolean enableAuxInputSourceSelect
enable aurilliary input source selection
Definition: IfxGtm_Tim_Timer.h:84
IfxGtm_Tim_Timer_Config::shadowCounter
uint32 shadowCounter
Shadow counter value.
Definition: IfxGtm_Tim_Timer.h:79
IfxGtm_Tim_Timer_Config::fallingEdgeFilterTime
uint32 fallingEdgeFilterTime
Filter Falling Edge parameter.
Definition: IfxGtm_Tim_Timer.h:78
IfxGtm_Tim_Timer_initChannelConfig
IFX_EXTERN void IfxGtm_Tim_Timer_initChannelConfig(IfxGtm_Tim_Timer_Config *config, Ifx_GTM *gtm)
Initialise the config struct with default TIM channel configuration.
Definition: IfxGtm_Tim_Timer.c:87
IfxGtm_Tim_Timer_Config::irqEnable
boolean irqEnable
enable interrupt notification
Definition: IfxGtm_Tim_Timer.h:80
IfxGtm_Tim_Timer::timIndex
IfxGtm_Tim timIndex
Specifies the TIM module no.
Definition: IfxGtm_Tim_Timer.h:66
IfxGtm_Tim_Timer
Tim handle data structure.
Definition: IfxGtm_Tim_Timer.h:62
IfxGtm_IrqMode
IfxGtm_IrqMode
Enum for GTM interrupt modes.
Definition: IfxGtm.h:64
IfxGtm_Tim_Timer::tim
Ifx_GTM_TIM * tim
Pointer to TIM module.
Definition: IfxGtm_Tim_Timer.h:65
IfxGtm_Cmu.h
GTM basic functionality.
IfxGtm_Tim_Ch
IfxGtm_Tim_Ch
Enum for TIM channels.
Definition: IfxGtm_cfg.h:403
IfxGtm_cfg.h
GTM on-chip implementation data.
IfxGtm_Tim_Timer::gtm
Ifx_GTM * gtm
Pointer to GTM module.
Definition: IfxGtm_Tim_Timer.h:64


iLLD_TC38A: IfxGtm_Tom.c Source File

  • Gtm
  • Std
IfxGtm_Tom.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Tom.c
3 * \brief GTM basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxGtm_Tom.h"
47 #include "IfxGtm_bf.h"
48 #include "IfxGtm_Cmu.h"
49
50 /******************************************************************************/
51 /*-------------------------Function Implementations---------------------------*/
52 /******************************************************************************/
53
54 void IfxGtm_Tom_Ch_clearOneNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
55 {
56 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
57 tomCh->IRQ.NOTIFY.B.CCU1TC = 1;
58 }
59
60
61 void IfxGtm_Tom_Ch_clearZeroNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
62 {
63 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
64 tomCh->IRQ.NOTIFY.B.CCU0TC = 1;
65 }
66
67
68 float32 IfxGtm_Tom_Ch_getClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
69 {
70 IfxGtm_Tom_Ch_ClkSrc clock;
71 IfxGtm_Cmu_Fxclk clkIndex[5] = {
72 IfxGtm_Cmu_Fxclk_0, /*IfxGtm_Tom_Ch_ClkSrc_cmuFxclk0 */
73 IfxGtm_Cmu_Fxclk_1, /*IfxGtm_Tom_Ch_ClkSrc_cmuFxclk1 */
74 IfxGtm_Cmu_Fxclk_2, /*IfxGtm_Tom_Ch_ClkSrc_cmuFxclk2 */
75 IfxGtm_Cmu_Fxclk_3, /*IfxGtm_Tom_Ch_ClkSrc_cmuFxclk3 */
76 IfxGtm_Cmu_Fxclk_4 /*IfxGtm_Tom_Ch_ClkSrc_cmuFxclk4 */
77 };
78
79 clock = IfxGtm_Tom_Ch_getClockSource(tom, channel);
80
81 if (clock == IfxGtm_Tom_Ch_ClkSrc_noClock)
82 {
83 return 0.0;
84 }
85 else
86 {
87 return IfxGtm_Cmu_getFxClkFrequency(gtm, clkIndex[clock], TRUE);
88 }
89 }
90
91
92 IfxGtm_Tom_Ch_ClkSrc IfxGtm_Tom_Ch_getClockSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
93 {
94 IfxGtm_Tom_Ch_ClkSrc clock = IfxGtm_Tom_Ch_ClkSrc_noClock;
95
96 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
97
98 clock = (IfxGtm_Tom_Ch_ClkSrc)tomCh->CTRL.B.CLK_SRC_SR;
99
100 return clock;
101 }
102
103
104 uint32 IfxGtm_Tom_Ch_getCompareOne(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
105 {
106 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
107
108 return tomCh->CM1.U;
109 }
110
111
112 volatile uint32 *IfxGtm_Tom_Ch_getCompareOnePointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
113 {
114 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
115
116 return (volatile uint32 *)&tomCh->CM1.U;
117 }
118
119
120 uint32 IfxGtm_Tom_Ch_getCompareZero(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
121 {
122 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
123
124 return tomCh->CM0.U;
125 }
126
127
128 volatile uint32 *IfxGtm_Tom_Ch_getCompareZeroPointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
129 {
130 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
131 return (volatile uint32 *)&tomCh->CM0.U;
132 }
133
134
135 boolean IfxGtm_Tom_Ch_getOutputLevel(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
136 {
137 boolean result;
138 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
139
140 result = tomCh->STAT.B.OL == 1;
141
142 return result;
143 }
144
145
146 volatile Ifx_SRC_SRCR *IfxGtm_Tom_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Tom tom, IfxGtm_Tom_Ch channel)
147 {
148 IFX_UNUSED_PARAMETER(gtm)
149 return &MODULE_SRC.GTM_TOM[tom][channel / 2];
150 }
151
152
153 Ifx_GTM_TOM_TGC *IfxGtm_Tom_Ch_getTgcPointer(Ifx_GTM_TOM *tom, uint32 tgcIndex)
154 {
155 Ifx_GTM_TOM_TGC *pointer;
156
157 if (tgcIndex == 0)
158 {
159 pointer = (Ifx_GTM_TOM_TGC *)&tom->TGC0_GLB_CTRL;
160 }
161 else
162 {
163 pointer = (Ifx_GTM_TOM_TGC *)&tom->TGC1_GLB_CTRL;
164 }
165
166 return pointer;
167 }
168
169
170 volatile uint32 *IfxGtm_Tom_Ch_getTimerPointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
171 {
172 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
173 return (volatile uint32 *)&tomCh->CN0.U;
174 }
175
176
177 boolean IfxGtm_Tom_Ch_isOneNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
178 {
179 boolean result;
180 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
181 result = tomCh->IRQ.NOTIFY.B.CCU1TC != 0;
182 return result;
183 }
184
185
186 boolean IfxGtm_Tom_Ch_isZeroNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
187 {
188 boolean result;
189 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
190 result = tomCh->IRQ.NOTIFY.B.CCU0TC != 0;
191 return result;
192 }
193
194
195 void IfxGtm_Tom_Ch_raiseInterruptOne(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
196 {
197 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
198 tomCh->IRQ.FORCINT.B.TRG_CCU1TC0 = 1;
199 }
200
201
202 void IfxGtm_Tom_Ch_raiseInterruptZero(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
203 {
204 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
205 tomCh->IRQ.FORCINT.B.TRG_CCU0TC0 = 1;
206 }
207
208
209 void IfxGtm_Tom_Ch_setClockSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ClkSrc clock)
210 {
211 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
212
213 tomCh->CTRL.B.CLK_SRC_SR = clock;
214 }
215
216
217 void IfxGtm_Tom_Ch_setCompare(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareZero, uint32 compareOne)
218 {
219 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
220
221 tomCh->CM0.U = compareZero; // TK: replaced .B access to optimize runtime
222 tomCh->CM1.U = compareOne;
223 }
224
225
226 void IfxGtm_Tom_Ch_setCompareOne(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareOne)
227 {
228 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
229
230 tomCh->CM1.U = compareOne; // TK: replaced .B access to optimize runtime
231 }
232
233
234 void IfxGtm_Tom_Ch_setCompareOneShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowOne)
235 {
236 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
237
238 tomCh->SR1.U = shadowOne; // TK: replaced .B access to optimize runtime
239 }
240
241
242 void IfxGtm_Tom_Ch_setCompareShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero, uint32 shadowOne)
243 {
244 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
245
246 tomCh->SR0.U = shadowZero; // TK: replaced .B access to optimize runtime
247 tomCh->SR1.U = shadowOne;
248 }
249
250
251 void IfxGtm_Tom_Ch_setCompareZero(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareZero)
252 {
253 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
254
255 tomCh->CM0.U = compareZero; // TK: replaced .B access to optimize runtime
256 }
257
258
259 void IfxGtm_Tom_Ch_setCompareZeroShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero)
260 {
261 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
262
263 tomCh->SR0.U = shadowZero; // TK: replaced .B access to optimize runtime
264 }
265
266
267 void IfxGtm_Tom_Ch_setCounterValue(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 value)
268 {
269 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
270
271 tomCh->CN0.U = value; // TK: replaced .B access to optimize runtime
272 }
273
274
275 void IfxGtm_Tom_Ch_setGatedCounter(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
276 {
277 if (channel <= IfxGtm_Tom_Ch_7)
278 {
279 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
280
281 tomCh->CTRL.B.GCM = enabled ? 1 : 0;
282 }
283 }
284
285
286 void IfxGtm_Tom_Ch_setNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne)
287 {
288 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
289
290 Ifx_GTM_TOM_CH_IRQ_EN en;
291 en.U = tomCh->IRQ.EN.U;
292
293 /* Disable all interrupts of the interrupt set to change mode */
294 tomCh->IRQ.EN.U = IFX_ZEROS;
295 tomCh->IRQ.MODE.B.IRQ_MODE = mode;
296 tomCh->IRQ.EN.U = en.U; /* Set the values back */
297
298 en.B.CCU0TC_IRQ_EN = interruptOnCompareZero ? 1 : 0;
299 en.B.CCU1TC_IRQ_EN = interruptOnCompareOne ? 1 : 0;
300 tomCh->IRQ.EN.U = en.U;
301 }
302
303
304 void IfxGtm_Tom_Ch_setOneShotMode(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
305 {
306 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
307
308 tomCh->CTRL.B.OSM = enabled ? 1 : 0;
309 }
310
311
312 void IfxGtm_Tom_Ch_setPcm(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
313 {
314 if (channel == IfxGtm_Tom_Ch_15)
315 {
316 tom->CH15.CTRL.B.BITREV = enabled ? 1 : 0;
317 }
318 }
319
320
321 void IfxGtm_Tom_Ch_setResetSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ResetEvent event)
322 {
323 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
324
325 tomCh->CTRL.B.RST_CCU0 = event;
326 }
327
328
329 void IfxGtm_Tom_Ch_setSignalLevel(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, Ifx_ActiveState activeState)
330 {
331 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
332
333 tomCh->CTRL.B.SL = activeState == Ifx_ActiveState_high ? 1 : 0;
334 }
335
336
337 void IfxGtm_Tom_Ch_setSpe(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
338 {
339 if (channel <= IfxGtm_Tom_Ch_7)
340 {
341 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
342
343 tomCh->CTRL.B.SPEM = enabled ? 1 : 0;
344 }
345 }
346
347
348 void IfxGtm_Tom_Ch_setTriggerOutput(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_OutputTrigger trigger)
349 {
350 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
351
352 tomCh->CTRL.B.TRIGOUT = trigger;
353 }
354
355
356 uint32 IfxGtm_Tom_Tgc_buildFeature(uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset)
357 {
358 uint8 i;
359 uint32 reg = 0;
360 uint32 mask = enableMask | (disableMask << 16);
361
362 for (i = 0; i < IFXGTM_TOM_NUM_TGC_CHANNELS; i++)
363 {
364 /* Bitfield length is 2 bits */
365 uint8 shift = (i * 2) + bitfieldOffset;
366
367 if (mask & 0x1)
368 {
369 reg |= IfxGtm_FeatureControl_enable << shift;
370 }
371
372 if (mask & 0x10000)
373 {
374 reg |= IfxGtm_FeatureControl_disable << shift;
375 }
376
377 mask = mask >> 1;
378 }
379
380 return reg;
381 }
382
383
384 uint32 IfxGtm_Tom_Tgc_buildFeatureForChannel(IfxGtm_Tom_Ch channel, boolean enabled, uint8 bitfieldOffset)
385 {
386 uint32 reg = 0;
387
388 /* Bitfield length is 2 bits */
389 uint8 shift = ((channel % 8) * 2) + bitfieldOffset;
390
391 if (enabled == 1)
392 {
393 reg = IfxGtm_FeatureControl_enable << shift;
394 }
395 else
396 {
397 reg = IfxGtm_FeatureControl_disable << shift;
398 }
399
400 return reg;
401 }
402
403
404 void IfxGtm_Tom_Tgc_enableChannel(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean immediate)
405 {
406 uint32 value;
407
408 value = IfxGtm_Tom_Tgc_buildFeatureForChannel(channel, enabled, IFX_GTM_TOM_TGC_ENDIS_CTRL_ENDIS_CTRL0_OFF);
409
410 if (immediate)
411 {
412 tgc->ENDIS_CTRL.U = value;
413 tgc->ENDIS_STAT.U = value;
414 }
415 else
416 {
417 tgc->ENDIS_CTRL.U = value;
418 }
419 }
420
421
422 void IfxGtm_Tom_Tgc_enableChannelOutput(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean immediate)
423 {
424 uint32 value;
425
426 value = IfxGtm_Tom_Tgc_buildFeatureForChannel(channel, enabled, IFX_GTM_TOM_TGC_OUTEN_CTRL_OUTEN_CTRL0_OFF);
427
428 if (immediate)
429 {
430 tgc->OUTEN_CTRL.U = value;
431 tgc->OUTEN_STAT.U = value;
432 }
433 else
434 {
435 tgc->OUTEN_CTRL.U = value;
436 }
437 }
438
439
440 void IfxGtm_Tom_Tgc_enableChannelUpdate(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled)
441 {
442 tgc->GLB_CTRL.U = IfxGtm_Tom_Tgc_buildFeatureForChannel(channel, enabled, IFX_GTM_TOM_TGC_GLB_CTRL_UPEN_CTRL0_OFF);
443 }
444
445
446 void IfxGtm_Tom_Tgc_enableChannels(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate)
447 {
448 uint32 value;
449
450 value = IfxGtm_Tom_Tgc_buildFeature(enableMask, disableMask, IFX_GTM_TOM_TGC_ENDIS_CTRL_ENDIS_CTRL0_OFF);
451
452 if (immediate)
453 {
454 tgc->ENDIS_CTRL.U = value;
455 tgc->ENDIS_STAT.U = value;
456 }
457 else
458 {
459 tgc->ENDIS_CTRL.U = value;
460 }
461 }
462
463
464 void IfxGtm_Tom_Tgc_enableChannelsOutput(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate)
465 {
466 uint32 value;
467
468 value = IfxGtm_Tom_Tgc_buildFeature(enableMask, disableMask, IFX_GTM_TOM_TGC_OUTEN_CTRL_OUTEN_CTRL0_OFF);
469
470 if (immediate)
471 {
472 tgc->OUTEN_CTRL.U = value;
473 tgc->OUTEN_STAT.U = value;
474 }
475 else
476 {
477 tgc->OUTEN_CTRL.U = value;
478 }
479 }
480
481
482 void IfxGtm_Tom_Tgc_enableChannelsTrigger(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask)
483 {
484 tgc->INT_TRIG.U = IfxGtm_Tom_Tgc_buildFeature(enableMask, disableMask, IFX_GTM_TOM_TGC_INT_TRIG_INT_TRIG0_OFF);
485 }
486
487
488 void IfxGtm_Tom_Tgc_enableChannelsUpdate(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask)
489 {
490 tgc->GLB_CTRL.U = IfxGtm_Tom_Tgc_buildFeature(enableMask, disableMask, IFX_GTM_TOM_TGC_GLB_CTRL_UPEN_CTRL0_OFF);
491 }
492
493
494 void IfxGtm_Tom_Tgc_enableTimeTrigger(Ifx_GTM_TOM_TGC *tgc, boolean enabled)
495 {
496 tgc->ACT_TB.B.TB_TRIG = enabled ? 1 : 0;
497 }
498
499
500 void IfxGtm_Tom_Tgc_resetChannels(Ifx_GTM_TOM_TGC *tgc, uint32 resetMask)
501 {
502 uint8 i;
503 uint32 reg = 0;
504
505 for (i = 0; i < IFXGTM_TOM_NUM_TGC_CHANNELS; i++)
506 {
507 if (resetMask & 0x1)
508 {
509 reg |= 1 << i;
510 }
511
512 resetMask = resetMask >> 1;
513 }
514
515 tgc->GLB_CTRL.U = reg << IFX_GTM_TOM_TGC_GLB_CTRL_RST_CH0_OFF;
516 }
517
518
519 void IfxGtm_Tom_Tgc_setChannelForceUpdate(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean resetEnabled)
520 {
521 uint32 regEnable, regReset;
522
523 regEnable = IfxGtm_Tom_Tgc_buildFeatureForChannel(channel, enabled, IFX_GTM_TOM_TGC_FUPD_CTRL_FUPD_CTRL0_OFF);
524 regReset = IfxGtm_Tom_Tgc_buildFeatureForChannel(channel, resetEnabled, IFX_GTM_TOM_TGC_FUPD_CTRL_RSTCN0_CH0_OFF);
525
526 tgc->FUPD_CTRL.U = regEnable | (regReset << 16);
527 }
528
529
530 void IfxGtm_Tom_Tgc_setChannelsForceUpdate(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
531 {
532 uint32 regEnable, regReset;
533
534 regEnable = IfxGtm_Tom_Tgc_buildFeature(enableMask, disableMask, IFX_GTM_TOM_TGC_FUPD_CTRL_FUPD_CTRL0_OFF);
535 regReset = IfxGtm_Tom_Tgc_buildFeature(resetEnableMask, resetDisableMask, IFX_GTM_TOM_TGC_FUPD_CTRL_RSTCN0_CH0_OFF);
536
537 tgc->FUPD_CTRL.U = regEnable | regReset;
538 }
539
540
541 void IfxGtm_Tom_Tgc_setTimeTrigger(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tbu_Ts base, uint32 value)
542 {
543 Ifx_GTM_TOM_TGC_ACT_TB act_tb;
544
545 act_tb.U = tgc->ACT_TB.U;
546 act_tb.B.TBU_SEL = base;
547 act_tb.B.ACT_TB = value;
548 tgc->ACT_TB.U = act_tb.U;
549 }
550
551
552 void IfxGtm_Tom_Tgc_trigger(Ifx_GTM_TOM_TGC *tgc)
553 {
554 tgc->GLB_CTRL.U = 1 << IFX_GTM_TOM_TGC_GLB_CTRL_HOST_TRIG_OFF;
555 }
Ifx_ActiveState_high
The signal is high active.
Definition: Ifx_Types.h:116
IfxGtm_Cmu_Fxclk_4
Definition: IfxGtm_Cmu.h:89
IfxGtm_Tom_Ch_setTriggerOutput
void IfxGtm_Tom_Ch_setTriggerOutput(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_OutputTrigger trigger)
Sets the channel trigger output.
Definition: IfxGtm_Tom.c:348
IfxGtm_Tom_Ch_raiseInterruptZero
void IfxGtm_Tom_Ch_raiseInterruptZero(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Raises the interrupt for Compare 0.
Definition: IfxGtm_Tom.c:202
IfxGtm_Tom_Tgc_setTimeTrigger
void IfxGtm_Tom_Tgc_setTimeTrigger(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tbu_Ts base, uint32 value)
Sets the trigger time base and time base value.
Definition: IfxGtm_Tom.c:541
IfxGtm_Tom_Ch_getCompareOnePointer
volatile uint32 * IfxGtm_Tom_Ch_getCompareOnePointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare one pointer.
Definition: IfxGtm_Tom.c:112
IfxGtm_Tom_Tgc_buildFeature
uint32 IfxGtm_Tom_Tgc_buildFeature(uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable.
Definition: IfxGtm_Tom.c:356
IfxGtm_Tom_Tgc_resetChannels
void IfxGtm_Tom_Tgc_resetChannels(Ifx_GTM_TOM_TGC *tgc, uint32 resetMask)
Reset one or more channels.
Definition: IfxGtm_Tom.c:500
IfxGtm_Cmu_Fxclk_3
Definition: IfxGtm_Cmu.h:88
IfxGtm_Tom_Ch_isZeroNotification
boolean IfxGtm_Tom_Ch_isZeroNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the status of channel Zero notification.
Definition: IfxGtm_Tom.c:186
IfxGtm_Tom_Ch_setResetSource
void IfxGtm_Tom_Ch_setResetSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ResetEvent event)
Sets the channel clock source either from local or from previous channel.
Definition: IfxGtm_Tom.c:321
IfxGtm_Cmu_Fxclk_0
Definition: IfxGtm_Cmu.h:85
IfxGtm_Tbu_Ts
IfxGtm_Tbu_Ts
GTM TOM TBU Time stamps.
Definition: IfxGtm_Tbu.h:66
IfxGtm_Tom_Ch_setSignalLevel
void IfxGtm_Tom_Ch_setSignalLevel(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, Ifx_ActiveState activeState)
Sets the signal level.
Definition: IfxGtm_Tom.c:329
IfxGtm_Tom_Ch_isOneNotification
boolean IfxGtm_Tom_Ch_isOneNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the status of channel One notification.
Definition: IfxGtm_Tom.c:177
IfxGtm_Tom_Ch_getTgcPointer
Ifx_GTM_TOM_TGC * IfxGtm_Tom_Ch_getTgcPointer(Ifx_GTM_TOM *tom, uint32 tgcIndex)
Returns the TGC pointer.
Definition: IfxGtm_Tom.c:153
IfxGtm_Tom_Ch_setCompare
void IfxGtm_Tom_Ch_setCompare(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareZero, uint32 compareOne)
Sets the compare 0 and 1 values.
Definition: IfxGtm_Tom.c:217
IfxGtm_Tom_Ch_setNotification
void IfxGtm_Tom_Ch_setNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne)
Sets the channel notification.
Definition: IfxGtm_Tom.c:286
uint32
unsigned long uint32
Definition: Platform_Types.h:116
float32
float float32
Definition: Platform_Types.h:170
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:113
IfxGtm_Tom_Tgc_setChannelForceUpdate
void IfxGtm_Tom_Tgc_setChannelForceUpdate(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean resetEnabled)
Enable/disable one channel for update (FUPD)
Definition: IfxGtm_Tom.c:519
IfxGtm_Tom_Ch_setSpe
void IfxGtm_Tom_Ch_setSpe(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the SPE mode (channel 0 to 7 only)
Definition: IfxGtm_Tom.c:337
IfxGtm_Tom_Ch_OutputTrigger
IfxGtm_Tom_Ch_OutputTrigger
Reset source for channel counter CN0.
Definition: IfxGtm_Tom.h:95
IfxGtm_Cmu_Fxclk_1
Definition: IfxGtm_Cmu.h:86
IfxGtm_Tom_Ch
IfxGtm_Tom_Ch
Enum for TOM channels.
Definition: IfxGtm_cfg.h:428
IfxGtm_Tom_Ch_getCompareZeroPointer
volatile uint32 * IfxGtm_Tom_Ch_getCompareZeroPointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare zero pointer.
Definition: IfxGtm_Tom.c:128
IfxGtm_Tom_Ch_setOneShotMode
void IfxGtm_Tom_Ch_setOneShotMode(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the one shot mode.
Definition: IfxGtm_Tom.c:304
IfxGtm_FeatureControl_disable
disable
Definition: IfxGtm_cfg.h:337
IfxGtm_Tom_Ch_setCompareZero
void IfxGtm_Tom_Ch_setCompareZero(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareZero)
Sets the compare 0 value.
Definition: IfxGtm_Tom.c:251
IfxGtm_Tom_Ch_getClockFrequency
float32 IfxGtm_Tom_Ch_getClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the TOM channel input clock frequency in Hz.
Definition: IfxGtm_Tom.c:68
IFXGTM_TOM_NUM_TGC_CHANNELS
#define IFXGTM_TOM_NUM_TGC_CHANNELS
Number of channels per TOM TGC.
Definition: IfxGtm_Tom.h:73
IfxGtm_Tom_Ch_getCompareZero
uint32 IfxGtm_Tom_Ch_getCompareZero(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare zero value.
Definition: IfxGtm_Tom.c:120
IfxGtm_Cmu_Fxclk
IfxGtm_Cmu_Fxclk
Definition: IfxGtm_Cmu.h:83
IfxGtm_Tom_Ch_setCompareShadow
void IfxGtm_Tom_Ch_setCompareShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero, uint32 shadowOne)
Sets the compare 0 and 1 shadow values.
Definition: IfxGtm_Tom.c:242
IfxGtm_Tom_Ch_clearZeroNotification
void IfxGtm_Tom_Ch_clearZeroNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Clears the channel Zero notification.
Definition: IfxGtm_Tom.c:61
Ifx_GTM_TOM_TGC
volatile struct IfxGtm_Tom_TGC Ifx_GTM_TOM_TGC
Definition: IfxGtm_cfg.h:233
IFX_ZEROS
#define IFX_ZEROS
Definition: Ifx_Types.h:81
IfxGtm_Tom_Ch_setCounterValue
void IfxGtm_Tom_Ch_setCounterValue(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 value)
Sets the counter value.
Definition: IfxGtm_Tom.c:267
IfxGtm_FeatureControl_enable
enable
Definition: IfxGtm_cfg.h:338
IfxGtm_Tom_Ch_ClkSrc_noClock
no clock
Definition: IfxGtm_Tom.h:90
IfxGtm_Cmu_Fxclk_2
Definition: IfxGtm_Cmu.h:87
IfxGtm_Tom_Ch_getCompareOne
uint32 IfxGtm_Tom_Ch_getCompareOne(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare one value.
Definition: IfxGtm_Tom.c:104
IfxGtm_Tom_Tgc_trigger
void IfxGtm_Tom_Tgc_trigger(Ifx_GTM_TOM_TGC *tgc)
Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG)
Definition: IfxGtm_Tom.c:552
IfxGtm_Tom_Ch_clearOneNotification
void IfxGtm_Tom_Ch_clearOneNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Clears the channel One notification.
Definition: IfxGtm_Tom.c:54
IfxGtm_Tom_Ch_getSrcPointer
volatile Ifx_SRC_SRCR * IfxGtm_Tom_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Tom tom, IfxGtm_Tom_Ch channel)
Returns a pointer to the TOM channel SRC.
Definition: IfxGtm_Tom.c:146
IfxGtm_Tom_Ch_setGatedCounter
void IfxGtm_Tom_Ch_setGatedCounter(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the gated counter mode (channel 0 to 7 only)
Definition: IfxGtm_Tom.c:275
IfxGtm_Cmu_getFxClkFrequency
float32 IfxGtm_Cmu_getFxClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Fxclk clkIndex, boolean assumeEnabled)
Returns the GTM fixed clock frequency in Hz.
Definition: IfxGtm_Cmu.c:138
IfxGtm_Tom_Ch_setCompareOneShadow
void IfxGtm_Tom_Ch_setCompareOneShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowOne)
Sets the compare 1 shadow value.
Definition: IfxGtm_Tom.c:234
IfxGtm_Tom_Ch_ResetEvent
IfxGtm_Tom_Ch_ResetEvent
Reset event for channel counter CN0.
Definition: IfxGtm_Tom.h:103
IfxGtm_Tom_Tgc_enableChannelUpdate
void IfxGtm_Tom_Tgc_enableChannelUpdate(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable one channel for update (UPEN)
Definition: IfxGtm_Tom.c:440
IfxGtm_Tom_Ch_getTimerPointer
volatile uint32 * IfxGtm_Tom_Ch_getTimerPointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the Timer pointer.
Definition: IfxGtm_Tom.c:170
IfxGtm_Tom_Tgc_enableChannelsUpdate
void IfxGtm_Tom_Tgc_enableChannelsUpdate(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask)
Enable/disable one or more channels for update (UPEN)
Definition: IfxGtm_Tom.c:488
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxGtm_Tom
IfxGtm_Tom
Enum for TOM objects.
Definition: IfxGtm_cfg.h:417
IfxGtm_Tom_Ch_setClockSource
void IfxGtm_Tom_Ch_setClockSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ClkSrc clock)
Sets the channel clock source.
Definition: IfxGtm_Tom.c:209
IfxGtm_Tom_Ch_getClockSource
IfxGtm_Tom_Ch_ClkSrc IfxGtm_Tom_Ch_getClockSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the channel clock source.
Definition: IfxGtm_Tom.c:92
IfxGtm_Tom_Ch_setCompareOne
void IfxGtm_Tom_Ch_setCompareOne(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareOne)
Sets the compare 1 value.
Definition: IfxGtm_Tom.c:226
IfxGtm_Tom_Tgc_setChannelsForceUpdate
void IfxGtm_Tom_Tgc_setChannelsForceUpdate(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
Enable/disable one or more channels for the force update feature (FUPD)
Definition: IfxGtm_Tom.c:530
IfxGtm_Tom_Tgc_enableChannelsOutput
void IfxGtm_Tom_Tgc_enableChannelsOutput(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels output (OUTEN)
Definition: IfxGtm_Tom.c:464
IfxGtm_Tom_Tgc_enableTimeTrigger
void IfxGtm_Tom_Tgc_enableTimeTrigger(Ifx_GTM_TOM_TGC *tgc, boolean enabled)
Enable/disable the time base trigger.
Definition: IfxGtm_Tom.c:494
IfxGtm_Tom_Tgc_enableChannelOutput
void IfxGtm_Tom_Tgc_enableChannelOutput(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel output (OUTEN)
Definition: IfxGtm_Tom.c:422
IfxGtm_IrqMode
IfxGtm_IrqMode
Enum for GTM interrupt modes.
Definition: IfxGtm.h:64
IfxGtm_Tom_Ch_7
TOM channel 7.
Definition: IfxGtm_cfg.h:438
IfxGtm_Cmu.h
GTM basic functionality.
IfxGtm_Tom_Tgc_buildFeatureForChannel
uint32 IfxGtm_Tom_Tgc_buildFeatureForChannel(IfxGtm_Tom_Ch channel, boolean enabled, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable for a single channel.
Definition: IfxGtm_Tom.c:384
IfxGtm_Tom_Ch_setPcm
void IfxGtm_Tom_Ch_setPcm(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the PCM mode (channel 15 only)
Definition: IfxGtm_Tom.c:312
IfxGtm_Tom_Tgc_enableChannelsTrigger
void IfxGtm_Tom_Tgc_enableChannelsTrigger(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask)
Enable/disable the TGC channels trigger.
Definition: IfxGtm_Tom.c:482
IfxGtm_Tom_Tgc_enableChannels
void IfxGtm_Tom_Tgc_enableChannels(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels (ENDIS)
Definition: IfxGtm_Tom.c:446
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxGtm_Tom_Ch_getOutputLevel
boolean IfxGtm_Tom_Ch_getOutputLevel(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Gets the TOM output level.
Definition: IfxGtm_Tom.c:135
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
IfxGtm_Tom_Ch_getChannelPointer
IFX_INLINE Ifx_GTM_TOM_CH * IfxGtm_Tom_Ch_getChannelPointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the base addredd of selected Tom channel.
Definition: IfxGtm_Tom.h:540
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxGtm_Tom_Ch_setCompareZeroShadow
void IfxGtm_Tom_Ch_setCompareZeroShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero)
Sets the compare 0 shadow value.
Definition: IfxGtm_Tom.c:259
IfxGtm_Tom_Ch_ClkSrc
IfxGtm_Tom_Ch_ClkSrc
Clock source for the TOM channels.
Definition: IfxGtm_Tom.h:83
IfxGtm_Tom.h
GTM basic functionality.
IfxGtm_Tom_Ch_15
TOM channel 15.
Definition: IfxGtm_cfg.h:446
IfxGtm_Tom_Ch_raiseInterruptOne
void IfxGtm_Tom_Ch_raiseInterruptOne(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Raises the interrupt for Compare 1.
Definition: IfxGtm_Tom.c:195
IfxGtm_Tom_Tgc_enableChannel
void IfxGtm_Tom_Tgc_enableChannel(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel (ENDIS)
Definition: IfxGtm_Tom.c:404


iLLD_TC38A: IfxGtm_Tom.h Source File

  • Gtm
  • Std
IfxGtm_Tom.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Tom.h
3 * \brief GTM basic functionality
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 *
43 * \defgroup IfxLld_Gtm_Std_Tom Tom Basic Functionality
44 * \ingroup IfxLld_Gtm_Std
45 * \defgroup IfxLld_Gtm_Std_Tom_Enumerations TOM Enumerations
46 * \ingroup IfxLld_Gtm_Std_Tom
47 * \defgroup IfxLld_Gtm_Std_Tom_Channel_Functions TOM Channel Functions
48 * \ingroup IfxLld_Gtm_Std_Tom
49 * \defgroup IfxLld_Gtm_Std_Tom_TGC_Functions TOM TGC Functions
50 * \ingroup IfxLld_Gtm_Std_Tom
51 * \defgroup IfxLld_Gtm_Std_Tom_Module_Functions TOM Module Functions
52 * \ingroup IfxLld_Gtm_Std_Tom
53 */
54
55 #ifndef IFXGTM_TOM_H
56 #define IFXGTM_TOM_H 1
57
58 /******************************************************************************/
59 /*----------------------------------Includes----------------------------------*/
60 /******************************************************************************/
61
62 #include "_Impl/IfxGtm_cfg.h"
63 #include "IfxGtm.h"
64 #include "IfxGtm_Tbu.h"
65 #include "Src/Std/IfxSrc.h"
66
67 /******************************************************************************/
68 /*-----------------------------------Macros-----------------------------------*/
69 /******************************************************************************/
70
71 /** \brief Number of channels per TOM TGC
72 */
73 #define IFXGTM_TOM_NUM_TGC_CHANNELS (8)
74
75 /******************************************************************************/
76 /*--------------------------------Enumerations--------------------------------*/
77 /******************************************************************************/
78
79 /** \addtogroup IfxLld_Gtm_Std_Tom_Enumerations
80 * \{ */
81 /** \brief Clock source for the TOM channels
82 */
83 typedef enum
84 {
85 IfxGtm_Tom_Ch_ClkSrc_cmuFxclk0 = 0, /**< \brief div 1 */
86 IfxGtm_Tom_Ch_ClkSrc_cmuFxclk1 = 1, /**< \brief div 16 */
87 IfxGtm_Tom_Ch_ClkSrc_cmuFxclk2 = 2, /**< \brief div 256 */
88 IfxGtm_Tom_Ch_ClkSrc_cmuFxclk3 = 3, /**< \brief div 4096 */
89 IfxGtm_Tom_Ch_ClkSrc_cmuFxclk4 = 4, /**< \brief div 32768 */
90 IfxGtm_Tom_Ch_ClkSrc_noClock = 5 /**< \brief no clock */
91 } IfxGtm_Tom_Ch_ClkSrc;
92
93 /** \brief Reset source for channel counter CN0
94 */
95 typedef enum
96 {
97 IfxGtm_Tom_Ch_OutputTrigger_forward = 0, /**< \brief Forward the trigger from the previous channel */
98 IfxGtm_Tom_Ch_OutputTrigger_generate = 1 /**< \brief Generate the trigger from the current channel */
99 } IfxGtm_Tom_Ch_OutputTrigger;
100
101 /** \brief Reset event for channel counter CN0
102 */
103 typedef enum
104 {
105 IfxGtm_Tom_Ch_ResetEvent_onCm0 = 0,
106 IfxGtm_Tom_Ch_ResetEvent_onTrigger = 1
107 } IfxGtm_Tom_Ch_ResetEvent;
108
109 /** \} */
110
111 /** \addtogroup IfxLld_Gtm_Std_Tom_Channel_Functions
112 * \{ */
113
114 /******************************************************************************/
115 /*-------------------------Inline Function Prototypes-------------------------*/
116 /******************************************************************************/
117
118 /** \brief Returns the base addredd of selected Tom channel
119 * \param tom Pointer to the TOM object
120 * \param channel Channel index
121 * \return Pointer to channel base address
122 */
123 IFX_INLINE Ifx_GTM_TOM_CH *IfxGtm_Tom_Ch_getChannelPointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
124
125 /******************************************************************************/
126 /*-------------------------Global Function Prototypes-------------------------*/
127 /******************************************************************************/
128
129 /** \brief Clears the channel One notification
130 * \param tom Pointer to the TOM object
131 * \param channel Channel index
132 * \return None
133 */
134 IFX_EXTERN void IfxGtm_Tom_Ch_clearOneNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
135
136 /** \brief Clears the channel Zero notification
137 * \param tom Pointer to the TOM object
138 * \param channel Channel index
139 * \return None
140 */
141 IFX_EXTERN void IfxGtm_Tom_Ch_clearZeroNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
142
143 /** \brief Returns the TOM channel input clock frequency in Hz
144 * \param gtm Pointer to GTM module
145 * \param tom Pointer to the TOM object
146 * \param channel Channel index
147 * \return TOM channel input clock frequency in Hz
148 */
149 IFX_EXTERN float32 IfxGtm_Tom_Ch_getClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
150
151 /** \brief Returns the channel clock source
152 * \param tom Pointer to the TOM object
153 * \param channel Channel index
154 * \return The clock source
155 */
156 IFX_EXTERN IfxGtm_Tom_Ch_ClkSrc IfxGtm_Tom_Ch_getClockSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
157
158 /** \brief Returns the compare one value
159 * \param tom Pointer to the TOM object
160 * \param channel Channel index
161 * \return compare one value
162 */
163 IFX_EXTERN uint32 IfxGtm_Tom_Ch_getCompareOne(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
164
165 /** \brief Returns the compare one pointer
166 * \param tom Pointer to the TOM object
167 * \param channel Channel index
168 * \return compare one pointer
169 */
170 IFX_EXTERN volatile uint32 *IfxGtm_Tom_Ch_getCompareOnePointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
171
172 /** \brief Returns the compare zero value
173 * \param tom Pointer to the TOM object
174 * \param channel Channel index
175 * \return compare zero value
176 */
177 IFX_EXTERN uint32 IfxGtm_Tom_Ch_getCompareZero(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
178
179 /** \brief Returns the compare zero pointer
180 * \param tom Pointer to the TOM object
181 * \param channel Channel index
182 * \return compare zero pointer
183 */
184 IFX_EXTERN volatile uint32 *IfxGtm_Tom_Ch_getCompareZeroPointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
185
186 /** \brief Gets the TOM output level
187 * \param tom Pointer to the TOM object
188 * \param channel Channel index
189 * \return TRUE the output is high, FALSE the output is low
190 */
191 IFX_EXTERN boolean IfxGtm_Tom_Ch_getOutputLevel(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
192
193 /** \brief Returns a pointer to the TOM channel SRC
194 * \param gtm Pointer to GTM module
195 * \param tom Specifies the tom object
196 * \param channel Channel index
197 * \return Pointer to the TOM channel SRC
198 */
199 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxGtm_Tom_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Tom tom, IfxGtm_Tom_Ch channel);
200
201 /** \brief Returns the TGC pointer
202 * \param tom Pointer to the TOM object
203 * \param tgcIndex TGC index
204 * \return TOM TGC object pointer
205 */
206 IFX_EXTERN Ifx_GTM_TOM_TGC *IfxGtm_Tom_Ch_getTgcPointer(Ifx_GTM_TOM *tom, uint32 tgcIndex);
207
208 /** \brief Returns the Timer pointer
209 * \param tom Pointer to the TOM object
210 * \param channel Channel index
211 * \return Timer pointer
212 */
213 IFX_EXTERN volatile uint32 *IfxGtm_Tom_Ch_getTimerPointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
214
215 /** \brief Returns the status of channel One notification
216 * \param tom Pointer to the TOM object
217 * \param channel Channel index
218 * \return Status of channel One notification
219 */
220 IFX_EXTERN boolean IfxGtm_Tom_Ch_isOneNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
221
222 /** \brief Returns the status of channel Zero notification
223 * \param tom Pointer to the TOM object
224 * \param channel Channel index
225 * \return Status of channel Zero notification
226 */
227 IFX_EXTERN boolean IfxGtm_Tom_Ch_isZeroNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
228
229 /** \brief Raises the interrupt for Compare 1
230 * \param tom Pointer to the TOM object
231 * \param channel Channel index
232 * \return None
233 */
234 IFX_EXTERN void IfxGtm_Tom_Ch_raiseInterruptOne(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
235
236 /** \brief Raises the interrupt for Compare 0
237 * \param tom Pointer to the TOM object
238 * \param channel Channel index
239 * \return None
240 */
241 IFX_EXTERN void IfxGtm_Tom_Ch_raiseInterruptZero(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
242
243 /** \brief Sets the channel clock source
244 * \param tom Pointer to the TOM object
245 * \param channel Channel index
246 * \param clock Channel clock source
247 * \return None
248 */
249 IFX_EXTERN void IfxGtm_Tom_Ch_setClockSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ClkSrc clock);
250
251 /** \brief Sets the compare 0 and 1 values
252 * \param tom Pointer to the TOM object
253 * \param channel Channel index
254 * \param compareZero Compare zero value
255 * \param compareOne Compare one value
256 * \return None
257 */
258 IFX_EXTERN void IfxGtm_Tom_Ch_setCompare(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareZero, uint32 compareOne);
259
260 /** \brief Sets the compare 1 value
261 * \param tom Pointer to the TOM object
262 * \param channel Channel index
263 * \param compareOne Compare one value
264 * \return None
265 */
266 IFX_EXTERN void IfxGtm_Tom_Ch_setCompareOne(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareOne);
267
268 /** \brief Sets the compare 1 shadow value
269 * \param tom Pointer to the TOM object
270 * \param channel Channel index
271 * \param shadowOne Compare one shadow value
272 * \return None
273 */
274 IFX_EXTERN void IfxGtm_Tom_Ch_setCompareOneShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowOne);
275
276 /** \brief Sets the compare 0 and 1 shadow values
277 * \param tom Pointer to the TOM object
278 * \param channel Channel index
279 * \param shadowZero Compare zero shadow value
280 * \param shadowOne Compare one shadow value
281 * \return None
282 */
283 IFX_EXTERN void IfxGtm_Tom_Ch_setCompareShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero, uint32 shadowOne);
284
285 /** \brief Sets the compare 0 value
286 * \param tom Pointer to the TOM object
287 * \param channel Channel index
288 * \param compareZero Compare zero value
289 * \return None
290 */
291 IFX_EXTERN void IfxGtm_Tom_Ch_setCompareZero(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareZero);
292
293 /** \brief Sets the compare 0 shadow value
294 * \param tom Pointer to the TOM object
295 * \param channel Channel index
296 * \param shadowZero Compare zero shadow value
297 * \return None
298 */
299 IFX_EXTERN void IfxGtm_Tom_Ch_setCompareZeroShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero);
300
301 /** \brief Sets the counter value
302 * \param tom Pointer to the TOM object
303 * \param channel Channel index
304 * \param value Counter value
305 * \return None
306 */
307 IFX_EXTERN void IfxGtm_Tom_Ch_setCounterValue(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 value);
308
309 /** \brief Enable/disable the gated counter mode (channel 0 to 7 only)
310 * \param tom Pointer to the TOM object
311 * \param channel Channel index
312 * \param enabled If TRUE, the feature is enabled, else disabled
313 * \return None
314 */
315 IFX_EXTERN void IfxGtm_Tom_Ch_setGatedCounter(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled);
316
317 /** \brief Sets the channel notification
318 * \param tom Pointer to the TOM object
319 * \param channel Channel index
320 * \param mode Interrupt mode
321 * \param interruptOnCompareZero If TRUE, an interrupt is generated on compare 0, else no interrupt is generated
322 * \param interruptOnCompareOne If TRUE, an interrupt is generated on compare 1, else no interrupt is generated
323 * \return None
324 */
325 IFX_EXTERN void IfxGtm_Tom_Ch_setNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne);
326
327 /** \brief Enable/disable the one shot mode
328 * \param tom Pointer to the TOM object
329 * \param channel Channel index
330 * \param enabled If TRUE, the feature is enabled, else disabled
331 * \return None
332 */
333 IFX_EXTERN void IfxGtm_Tom_Ch_setOneShotMode(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled);
334
335 /** \brief Enable/disable the PCM mode (channel 15 only)
336 * \param tom Pointer to the TOM object
337 * \param channel Channel index
338 * \param enabled If TRUE, the feature is enabled, else disabled
339 * \return None
340 */
341 IFX_EXTERN void IfxGtm_Tom_Ch_setPcm(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled);
342
343 /** \brief Sets the channel clock source either from local or from previous channel
344 * \param tom Pointer to the TOM object
345 * \param channel Channel index
346 * \param event Channel reset event
347 * \return None
348 */
349 IFX_EXTERN void IfxGtm_Tom_Ch_setResetSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ResetEvent event);
350
351 /** \brief Sets the signal level
352 * \param tom Pointer to the TOM object
353 * \param channel Channel index
354 * \param activeState Signal level active state. In case the channel is reset, the output is set to not active. The signal is active between 0 and the leading edge (CM1) and inactive between the leading edge and the trailing edge (CM0).
355 * \return None
356 */
357 IFX_EXTERN void IfxGtm_Tom_Ch_setSignalLevel(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, Ifx_ActiveState activeState);
358
359 /** \brief Enable/disable the SPE mode (channel 0 to 7 only)
360 * \param tom Pointer to the TOM object
361 * \param channel Channel index
362 * \param enabled If TRUE, the feature is enabled, else disabled
363 * \return None
364 */
365 IFX_EXTERN void IfxGtm_Tom_Ch_setSpe(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled);
366
367 /** \brief Sets the channel trigger output
368 * \param tom Pointer to the TOM object
369 * \param channel Channel index
370 * \param trigger Channel trigger output mode
371 * \return None
372 */
373 IFX_EXTERN void IfxGtm_Tom_Ch_setTriggerOutput(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_OutputTrigger trigger);
374
375 /** \} */
376
377 /** \addtogroup IfxLld_Gtm_Std_Tom_TGC_Functions
378 * \{ */
379
380 /******************************************************************************/
381 /*-------------------------Inline Function Prototypes-------------------------*/
382 /******************************************************************************/
383
384 /** \brief Sets the tgc global control value
385 * \param tgc Pointer to the TGC object
386 * \param control global control value
387 * \return None
388 */
389 IFX_INLINE void IfxGtm_Tom_Tgc_writeGlobalControl(Ifx_GTM_TOM_TGC *tgc, uint32 control);
390
391 /******************************************************************************/
392 /*-------------------------Global Function Prototypes-------------------------*/
393 /******************************************************************************/
394
395 /** \brief Builds the register value for the feature enable/disable
396 * \param enableMask Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
397 * \param disableMask Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
398 * \param bitfieldOffset Offset of the channel 0 bitfield in the register
399 * \return The register value
400 */
401 IFX_EXTERN uint32 IfxGtm_Tom_Tgc_buildFeature(uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset);
402
403 /** \brief Builds the register value for the feature enable/disable for a single channel
404 * \param channel Channel index
405 * \param enabled Enable/ Disable choise of the feature
406 * \param bitfieldOffset Offset of the channel 0 bitfield in the register
407 * \return The register value
408 */
409 IFX_EXTERN uint32 IfxGtm_Tom_Tgc_buildFeatureForChannel(IfxGtm_Tom_Ch channel, boolean enabled, uint8 bitfieldOffset);
410
411 /** \brief Enable/disable one channel (ENDIS)
412 * \param tgc Pointer to the TGC object
413 * \param channel Channel index
414 * \param enabled Enable/ Disable choise of the feature
415 * \param immediate If TRUE, the action is done immediately else, the action is done on TGC trigger (CTRL_TRIG)
416 * \return None
417 */
418 IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannel(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean immediate);
419
420 /** \brief Enable/disable one channel output (OUTEN)
421 * \param tgc Pointer to the TGC object
422 * \param channel Channel index
423 * \param enabled Enable/ Disable choise of the feature
424 * \param immediate If TRUE, the action is done immediately else, the action is done on TGC trigger (CTRL_TRIG)
425 * \return None
426 */
427 IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannelOutput(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean immediate);
428
429 /** \brief Enable/disable one channel for update (UPEN)
430 * \param tgc Pointer to the TGC object
431 * \param channel Channel index
432 * \param enabled Enable/ Disable choise of the feature
433 * \return None
434 */
435 IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannelUpdate(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled);
436
437 /** \brief Enable/disable one or more channels (ENDIS)
438 * \param tgc Pointer to the TGC object
439 * \param enableMask Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
440 * \param disableMask Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
441 * \param immediate If TRUE, the action is done immediately else, the action is done on TGC trigger (CTRL_TRIG)
442 * \return None
443 */
444 IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannels(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate);
445
446 /** \brief Enable/disable one or more channels output (OUTEN)
447 * \param tgc Pointer to the TGC object
448 * \param enableMask Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
449 * \param disableMask Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
450 * \param immediate If TRUE, the action is done immediately else, the action is done on TGC trigger (CTRL_TRIG)
451 * \return None
452 */
453 IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannelsOutput(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate);
454
455 /** \brief Enable/disable the TGC channels trigger
456 * \param tgc Pointer to the TGC object
457 * \param enableMask Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
458 * \param disableMask Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
459 * \return None
460 */
461 IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannelsTrigger(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask);
462
463 /** \brief Enable/disable one or more channels for update (UPEN)
464 * \param tgc Pointer to the TGC object
465 * \param enableMask Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
466 * \param disableMask Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
467 * \return None
468 */
469 IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannelsUpdate(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask);
470
471 /** \brief Enable/disable the time base trigger
472 * \param tgc Pointer to the TGC object
473 * \param enabled If TRUE, the trigger is enabled else disabled
474 * \return None
475 */
476 IFX_EXTERN void IfxGtm_Tom_Tgc_enableTimeTrigger(Ifx_GTM_TOM_TGC *tgc, boolean enabled);
477
478 /** \brief Reset one or more channels
479 * \param tgc Pointer to the TGC object
480 * \param resetMask Mask for the channel reset (bit 0: Channel 0, bit 1: channel 1, ...)
481 * \return None
482 */
483 IFX_EXTERN void IfxGtm_Tom_Tgc_resetChannels(Ifx_GTM_TOM_TGC *tgc, uint32 resetMask);
484
485 /** \brief Enable/disable one channel for update (FUPD)
486 * \param tgc Pointer to the TGC object
487 * \param channel Channel index
488 * \param enabled Enable/ Disable choise of the feature
489 * \param resetEnabled Enable/ Disable reset choise of the feature
490 * \return None
491 */
492 IFX_EXTERN void IfxGtm_Tom_Tgc_setChannelForceUpdate(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean resetEnabled);
493
494 /** \brief Enable/disable one or more channels for the force update feature (FUPD)
495 * \param tgc Pointer to the TGC object
496 * \param enableMask Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
497 * \param disableMask Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
498 * \param resetEnableMask Mask for the enabled channels counter reset on force update (bit 0: Channel 0, bit 1: channel 1, ...) Channel 0, bit 1: channel 1, ...)
499 * \param resetDisableMask Mask for the disabled channels with no counter reset on force update (bit 0: Channel 0, bit 1: channel 1, ...)
500 * \return None
501 */
502 IFX_EXTERN void IfxGtm_Tom_Tgc_setChannelsForceUpdate(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask);
503
504 /** \brief Sets the trigger time base and time base value
505 * \param tgc Pointer to the TGC object
506 * \param base Time base used for comparison
507 * \param value Compare value that raise the trigger
508 * \return None
509 */
510 IFX_EXTERN void IfxGtm_Tom_Tgc_setTimeTrigger(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tbu_Ts base, uint32 value);
511
512 /** \brief Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG)
513 * \param tgc Pointer to the TGC object
514 * \return None
515 */
516 IFX_EXTERN void IfxGtm_Tom_Tgc_trigger(Ifx_GTM_TOM_TGC *tgc);
517
518 /** \} */
519
520 /** \addtogroup IfxLld_Gtm_Std_Tom_Module_Functions
521 * \{ */
522
523 /******************************************************************************/
524 /*-------------------------Inline Function Prototypes-------------------------*/
525 /******************************************************************************/
526
527 /** \brief Configures the tout selection
528 * \param toutNum TOUT number
529 * \param toutSel TOUTselection
530 * \return None
531 */
532 IFX_INLINE void IfxGtm_Tom_setTout(uint32 toutNum, uint32 toutSel);
533
534 /** \} */
535
536 /******************************************************************************/
537 /*---------------------Inline Function Implementations------------------------*/
538 /******************************************************************************/
539
540 IFX_INLINE Ifx_GTM_TOM_CH *IfxGtm_Tom_Ch_getChannelPointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
541 {
542 return (Ifx_GTM_TOM_CH *)((uint32)&tom->CH0.CTRL.U + 0x40 * channel);
543 }
544
545
546 IFX_INLINE void IfxGtm_Tom_Tgc_writeGlobalControl(Ifx_GTM_TOM_TGC *tgc, uint32 control)
547 {
548 tgc->GLB_CTRL.U = control;
549 }
550
551
552 IFX_INLINE void IfxGtm_Tom_setTout(uint32 toutNum, uint32 toutSel)
553 {
554 uint32 outselReg = (toutNum >> 3);
555 uint32 shift = (toutNum & 0x7U) * 4;
556 uint32 outsel = toutSel << shift;
557 uint32 mask = 0xFU << shift;
558
559 __ldmst_c(&(MODULE_GTM.TOUTSEL[outselReg].U), mask, outsel);
560 }
561
562
563 #endif /* IFXGTM_TOM_H */
IfxGtm_Tom_Ch_setTriggerOutput
IFX_EXTERN void IfxGtm_Tom_Ch_setTriggerOutput(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_OutputTrigger trigger)
Sets the channel trigger output.
Definition: IfxGtm_Tom.c:348
IfxGtm_Tom_Ch_raiseInterruptZero
IFX_EXTERN void IfxGtm_Tom_Ch_raiseInterruptZero(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Raises the interrupt for Compare 0.
Definition: IfxGtm_Tom.c:202
IfxGtm_Tom_Tgc_setTimeTrigger
IFX_EXTERN void IfxGtm_Tom_Tgc_setTimeTrigger(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tbu_Ts base, uint32 value)
Sets the trigger time base and time base value.
Definition: IfxGtm_Tom.c:541
IfxGtm_Tom_Ch_getCompareOnePointer
IFX_EXTERN volatile uint32 * IfxGtm_Tom_Ch_getCompareOnePointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare one pointer.
Definition: IfxGtm_Tom.c:112
IfxGtm_Tom_Tgc_buildFeature
IFX_EXTERN uint32 IfxGtm_Tom_Tgc_buildFeature(uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable.
Definition: IfxGtm_Tom.c:356
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk1
div 16
Definition: IfxGtm_Tom.h:86
IfxGtm_Tom_Tgc_resetChannels
IFX_EXTERN void IfxGtm_Tom_Tgc_resetChannels(Ifx_GTM_TOM_TGC *tgc, uint32 resetMask)
Reset one or more channels.
Definition: IfxGtm_Tom.c:500
IfxGtm_Tom_Ch_isZeroNotification
IFX_EXTERN boolean IfxGtm_Tom_Ch_isZeroNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the status of channel Zero notification.
Definition: IfxGtm_Tom.c:186
IfxGtm_Tom_Ch_setResetSource
IFX_EXTERN void IfxGtm_Tom_Ch_setResetSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ResetEvent event)
Sets the channel clock source either from local or from previous channel.
Definition: IfxGtm_Tom.c:321
IfxGtm_Tbu_Ts
IfxGtm_Tbu_Ts
GTM TOM TBU Time stamps.
Definition: IfxGtm_Tbu.h:66
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk0
div 1
Definition: IfxGtm_Tom.h:85
IfxGtm_Tom_Ch_setSignalLevel
IFX_EXTERN void IfxGtm_Tom_Ch_setSignalLevel(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, Ifx_ActiveState activeState)
Sets the signal level.
Definition: IfxGtm_Tom.c:329
IfxGtm_Tom_Ch_isOneNotification
IFX_EXTERN boolean IfxGtm_Tom_Ch_isOneNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the status of channel One notification.
Definition: IfxGtm_Tom.c:177
IfxGtm_Tom_Ch_getTgcPointer
IFX_EXTERN Ifx_GTM_TOM_TGC * IfxGtm_Tom_Ch_getTgcPointer(Ifx_GTM_TOM *tom, uint32 tgcIndex)
Returns the TGC pointer.
Definition: IfxGtm_Tom.c:153
IfxGtm_Tom_Ch_setCompare
IFX_EXTERN void IfxGtm_Tom_Ch_setCompare(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareZero, uint32 compareOne)
Sets the compare 0 and 1 values.
Definition: IfxGtm_Tom.c:217
IfxGtm_Tom_Ch_setNotification
IFX_EXTERN void IfxGtm_Tom_Ch_setNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne)
Sets the channel notification.
Definition: IfxGtm_Tom.c:286
uint32
unsigned long uint32
Definition: Platform_Types.h:116
float32
float float32
Definition: Platform_Types.h:170
__ldmst_c
IFX_INLINE void __ldmst_c(volatile void *address, unsigned mask, unsigned value)
Definition: IfxCpu_Intrinsics.h:108
IfxSrc.h
SRC basic functionality.
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:113
IfxGtm_Tom_Tgc_setChannelForceUpdate
IFX_EXTERN void IfxGtm_Tom_Tgc_setChannelForceUpdate(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean resetEnabled)
Enable/disable one channel for update (FUPD)
Definition: IfxGtm_Tom.c:519
IfxGtm_Tom_Ch_setSpe
IFX_EXTERN void IfxGtm_Tom_Ch_setSpe(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the SPE mode (channel 0 to 7 only)
Definition: IfxGtm_Tom.c:337
IfxGtm_Tom_Ch_OutputTrigger
IfxGtm_Tom_Ch_OutputTrigger
Reset source for channel counter CN0.
Definition: IfxGtm_Tom.h:95
IfxGtm_Tom_Ch
IfxGtm_Tom_Ch
Enum for TOM channels.
Definition: IfxGtm_cfg.h:428
IfxGtm_Tom_Ch_getCompareZeroPointer
IFX_EXTERN volatile uint32 * IfxGtm_Tom_Ch_getCompareZeroPointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare zero pointer.
Definition: IfxGtm_Tom.c:128
IfxGtm_Tom_Ch_setOneShotMode
IFX_EXTERN void IfxGtm_Tom_Ch_setOneShotMode(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the one shot mode.
Definition: IfxGtm_Tom.c:304
IfxGtm_Tom_Ch_setCompareZero
IFX_EXTERN void IfxGtm_Tom_Ch_setCompareZero(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareZero)
Sets the compare 0 value.
Definition: IfxGtm_Tom.c:251
IfxGtm_Tom_Ch_getClockFrequency
IFX_EXTERN float32 IfxGtm_Tom_Ch_getClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the TOM channel input clock frequency in Hz.
Definition: IfxGtm_Tom.c:68
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxGtm_Tom_Ch_ResetEvent_onTrigger
Definition: IfxGtm_Tom.h:106
IfxGtm_Tom_setTout
IFX_INLINE void IfxGtm_Tom_setTout(uint32 toutNum, uint32 toutSel)
Configures the tout selection.
Definition: IfxGtm_Tom.h:552
IfxGtm_Tom_Ch_getCompareZero
IFX_EXTERN uint32 IfxGtm_Tom_Ch_getCompareZero(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare zero value.
Definition: IfxGtm_Tom.c:120
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxGtm_Tom_Ch_setCompareShadow
IFX_EXTERN void IfxGtm_Tom_Ch_setCompareShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero, uint32 shadowOne)
Sets the compare 0 and 1 shadow values.
Definition: IfxGtm_Tom.c:242
IfxGtm_Tom_Ch_clearZeroNotification
IFX_EXTERN void IfxGtm_Tom_Ch_clearZeroNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Clears the channel Zero notification.
Definition: IfxGtm_Tom.c:61
Ifx_GTM_TOM_TGC
volatile struct IfxGtm_Tom_TGC Ifx_GTM_TOM_TGC
Definition: IfxGtm_cfg.h:233
IfxGtm_Tom_Ch_setCounterValue
IFX_EXTERN void IfxGtm_Tom_Ch_setCounterValue(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 value)
Sets the counter value.
Definition: IfxGtm_Tom.c:267
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk3
div 4096
Definition: IfxGtm_Tom.h:88
IfxGtm_Tom_Ch_ClkSrc_noClock
no clock
Definition: IfxGtm_Tom.h:90
IfxGtm_Tom_Ch_getCompareOne
IFX_EXTERN uint32 IfxGtm_Tom_Ch_getCompareOne(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare one value.
Definition: IfxGtm_Tom.c:104
IfxGtm_Tom_Tgc_trigger
IFX_EXTERN void IfxGtm_Tom_Tgc_trigger(Ifx_GTM_TOM_TGC *tgc)
Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG)
Definition: IfxGtm_Tom.c:552
IfxGtm_Tom_Ch_clearOneNotification
IFX_EXTERN void IfxGtm_Tom_Ch_clearOneNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Clears the channel One notification.
Definition: IfxGtm_Tom.c:54
IfxGtm_Tom_Ch_getSrcPointer
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxGtm_Tom_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Tom tom, IfxGtm_Tom_Ch channel)
Returns a pointer to the TOM channel SRC.
Definition: IfxGtm_Tom.c:146
IfxGtm_Tom_Ch_setGatedCounter
IFX_EXTERN void IfxGtm_Tom_Ch_setGatedCounter(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the gated counter mode (channel 0 to 7 only)
Definition: IfxGtm_Tom.c:275
IfxGtm_Tom_Ch_setCompareOneShadow
IFX_EXTERN void IfxGtm_Tom_Ch_setCompareOneShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowOne)
Sets the compare 1 shadow value.
Definition: IfxGtm_Tom.c:234
IfxGtm_Tom_Ch_ResetEvent
IfxGtm_Tom_Ch_ResetEvent
Reset event for channel counter CN0.
Definition: IfxGtm_Tom.h:103
IfxGtm_Tbu.h
GTM basic functionality.
IfxGtm_Tom_Tgc_enableChannelUpdate
IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannelUpdate(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable one channel for update (UPEN)
Definition: IfxGtm_Tom.c:440
IfxGtm_Tom_Ch_getTimerPointer
IFX_EXTERN volatile uint32 * IfxGtm_Tom_Ch_getTimerPointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the Timer pointer.
Definition: IfxGtm_Tom.c:170
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk4
div 32768
Definition: IfxGtm_Tom.h:89
IfxGtm_Tom_Tgc_enableChannelsUpdate
IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannelsUpdate(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask)
Enable/disable one or more channels for update (UPEN)
Definition: IfxGtm_Tom.c:488
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxGtm_Tom_Ch_OutputTrigger_forward
Forward the trigger from the previous channel.
Definition: IfxGtm_Tom.h:97
IfxGtm_Tom
IfxGtm_Tom
Enum for TOM objects.
Definition: IfxGtm_cfg.h:417
IfxGtm_Tom_Ch_setClockSource
IFX_EXTERN void IfxGtm_Tom_Ch_setClockSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ClkSrc clock)
Sets the channel clock source.
Definition: IfxGtm_Tom.c:209
IfxGtm_Tom_Ch_getClockSource
IFX_EXTERN IfxGtm_Tom_Ch_ClkSrc IfxGtm_Tom_Ch_getClockSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the channel clock source.
Definition: IfxGtm_Tom.c:92
IfxGtm_Tom_Ch_setCompareOne
IFX_EXTERN void IfxGtm_Tom_Ch_setCompareOne(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareOne)
Sets the compare 1 value.
Definition: IfxGtm_Tom.c:226
IfxGtm_Tom_Tgc_setChannelsForceUpdate
IFX_EXTERN void IfxGtm_Tom_Tgc_setChannelsForceUpdate(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
Enable/disable one or more channels for the force update feature (FUPD)
Definition: IfxGtm_Tom.c:530
IfxGtm_Tom_Tgc_enableChannelsOutput
IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannelsOutput(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels output (OUTEN)
Definition: IfxGtm_Tom.c:464
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk2
div 256
Definition: IfxGtm_Tom.h:87
IfxGtm_Tom_Tgc_enableTimeTrigger
IFX_EXTERN void IfxGtm_Tom_Tgc_enableTimeTrigger(Ifx_GTM_TOM_TGC *tgc, boolean enabled)
Enable/disable the time base trigger.
Definition: IfxGtm_Tom.c:494
IfxGtm_Tom_Tgc_writeGlobalControl
IFX_INLINE void IfxGtm_Tom_Tgc_writeGlobalControl(Ifx_GTM_TOM_TGC *tgc, uint32 control)
Sets the tgc global control value.
Definition: IfxGtm_Tom.h:546
IfxGtm_Tom_Tgc_enableChannelOutput
IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannelOutput(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel output (OUTEN)
Definition: IfxGtm_Tom.c:422
IfxGtm_IrqMode
IfxGtm_IrqMode
Enum for GTM interrupt modes.
Definition: IfxGtm.h:64
IfxGtm_Tom_Tgc_buildFeatureForChannel
IFX_EXTERN uint32 IfxGtm_Tom_Tgc_buildFeatureForChannel(IfxGtm_Tom_Ch channel, boolean enabled, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable for a single channel.
Definition: IfxGtm_Tom.c:384
IfxGtm_Tom_Ch_setPcm
IFX_EXTERN void IfxGtm_Tom_Ch_setPcm(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the PCM mode (channel 15 only)
Definition: IfxGtm_Tom.c:312
IfxGtm_Tom_Tgc_enableChannelsTrigger
IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannelsTrigger(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask)
Enable/disable the TGC channels trigger.
Definition: IfxGtm_Tom.c:482
IfxGtm_Tom_Tgc_enableChannels
IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannels(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels (ENDIS)
Definition: IfxGtm_Tom.c:446
IfxGtm_Tom_Ch_getOutputLevel
IFX_EXTERN boolean IfxGtm_Tom_Ch_getOutputLevel(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Gets the TOM output level.
Definition: IfxGtm_Tom.c:135
IfxGtm_Tom_Ch_getChannelPointer
IFX_INLINE Ifx_GTM_TOM_CH * IfxGtm_Tom_Ch_getChannelPointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the base addredd of selected Tom channel.
Definition: IfxGtm_Tom.h:540
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxGtm.h
GTM basic functionality.
IfxGtm_Tom_Ch_setCompareZeroShadow
IFX_EXTERN void IfxGtm_Tom_Ch_setCompareZeroShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero)
Sets the compare 0 shadow value.
Definition: IfxGtm_Tom.c:259
IfxGtm_cfg.h
GTM on-chip implementation data.
IfxGtm_Tom_Ch_ClkSrc
IfxGtm_Tom_Ch_ClkSrc
Clock source for the TOM channels.
Definition: IfxGtm_Tom.h:83
IfxGtm_Tom_Ch_OutputTrigger_generate
Generate the trigger from the current channel.
Definition: IfxGtm_Tom.h:98
IfxGtm_Tom_Ch_raiseInterruptOne
IFX_EXTERN void IfxGtm_Tom_Ch_raiseInterruptOne(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Raises the interrupt for Compare 1.
Definition: IfxGtm_Tom.c:195
IfxGtm_Tom_Ch_ResetEvent_onCm0
Definition: IfxGtm_Tom.h:105
IfxGtm_Tom_Tgc_enableChannel
IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannel(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel (ENDIS)
Definition: IfxGtm_Tom.c:404


iLLD_TC38A: IfxGtm_Tom_Dtm_PwmHl.c Source File

  • Gtm
  • Tom
  • Dtm_PwmHl
IfxGtm_Tom_Dtm_PwmHl.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Tom_Dtm_PwmHl.c
3 * \brief GTM DTM_PWMHL details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxGtm_Tom_Dtm_PwmHl.h"
47 #include "_Utilities/Ifx_Assert.h"
48 #include "stddef.h"
49 #include "string.h"
50
51 /******************************************************************************/
52 /*------------------------Inline Function Prototypes--------------------------*/
53 /******************************************************************************/
54
55 /** \brief Sets the ON time
56 * \return None
57 */
58 IFX_INLINE void IfxGtm_Tom_Dtm_PwmHl_setOnTime(IfxGtm_TomDtm_PwmHl *driver, Ifx_TimerValue *tOn);
59
60 /** \brief Inverts the active state
61 * \param activeState Active state
62 * \return State
63 */
64 IFX_INLINE Ifx_ActiveState IfxGtm_Tom_Dtm_PwmHl_invertActiveState(Ifx_ActiveState activeState);
65
66 /******************************************************************************/
67 /*-----------------------Private Function Prototypes--------------------------*/
68 /******************************************************************************/
69
70 /** \brief Sets switched to OFF
71 * \param driver driver GTM TOM PWM driver
72 * \param tOn ON time
73 * \param shift Shift value in ticks
74 * \return None
75 */
76 IFX_STATIC void IfxGtm_Tom_Dtm_PwmHl_updateAndShiftOff(IfxGtm_TomDtm_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift);
77
78 /** \brief Updates the x output duty cycle in center aligned and center aligned inverted modes
79 * \param driver GTM TOM PWM driver
80 * \param tOn T on
81 * \return None
82 */
83 IFX_STATIC void IfxGtm_Tom_Dtm_PwmHl_updateCenterAligned(IfxGtm_TomDtm_PwmHl *driver, Ifx_TimerValue *tOn);
84
85 /** \brief Updates the x output duty cycle in edge aligned modes (left and right aligned)
86 * \param driver GTM TOM PWM driver
87 * \param tOn T On
88 * \return None
89 */
90 IFX_STATIC void IfxGtm_Tom_Dtm_PwmHl_updateEdgeAligned(IfxGtm_TomDtm_PwmHl *driver, Ifx_TimerValue *tOn);
91
92 /** \brief Set the outputs to inactive
93 * \param driver GTM TOM PWM driver
94 * \param tOn T On
95 * \return None
96 */
97 IFX_STATIC void IfxGtm_Tom_Dtm_PwmHl_updateOff(IfxGtm_TomDtm_PwmHl *driver, Ifx_TimerValue *tOn);
98
99 /** \brief Update Pulse
100 * \param driver GTM TOM PWM driver
101 * \param tOn ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
102 * \param offset Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
103 * \return None
104 */
105 IFX_STATIC void IfxGtm_Tom_Dtm_PwmHl_updatePulse(IfxGtm_TomDtm_PwmHl *driver, float32 *tOn, float32 *offset);
106
107 /** \brief Set Pulse to OFF
108 * \param driver GTM TOM PWM driver
109 * \param tOn ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
110 * \param offset Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
111 * \return None
112 */
113 IFX_STATIC void IfxGtm_Tom_Dtm_PwmHl_updatePulseOff(IfxGtm_TomDtm_PwmHl *driver, float32 *tOn, float32 *offset);
114
115 /** \brief Update Shift Center Aligned
116 * \param driver GTM TOM PWM driver
117 * \param tOn ON time
118 * \param shift Shift value in ticks
119 * \return None
120 */
121 IFX_STATIC void IfxGtm_Tom_Dtm_PwmHl_updateShiftCenterAligned(IfxGtm_TomDtm_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift);
122
123 /**
124 */
125 IFX_STATIC Ifx_TimerValue IfxGtm_Tom_Dtm_PwmHl_getDeadtimeInTimerClockTicks(IfxGtm_TomDtm_PwmHl *driver);
126
127 /******************************************************************************/
128 /*------------------------Private Variables/Constants-------------------------*/
129 /******************************************************************************/
130
131 IFX_STATIC IFX_CONST IfxGtm_Tom_Dtm_PwmHl_Mode IfxGtm_Tom_Dtm_PwmHl_modes[Ifx_Pwm_Mode_off + 1] = {
132 {Ifx_Pwm_Mode_centerAligned, FALSE, &IfxGtm_Tom_Dtm_PwmHl_updateCenterAligned, &IfxGtm_Tom_Dtm_PwmHl_updateShiftCenterAligned, &IfxGtm_Tom_Dtm_PwmHl_updatePulse },
133 {Ifx_Pwm_Mode_centerAlignedInverted, TRUE, &IfxGtm_Tom_Dtm_PwmHl_updateCenterAligned, &IfxGtm_Tom_Dtm_PwmHl_updateShiftCenterAligned, &IfxGtm_Tom_Dtm_PwmHl_updatePulse },
134 {Ifx_Pwm_Mode_leftAligned, FALSE, &IfxGtm_Tom_Dtm_PwmHl_updateEdgeAligned, &IfxGtm_Tom_Dtm_PwmHl_updateAndShiftOff, &IfxGtm_Tom_Dtm_PwmHl_updatePulse },
135 {Ifx_Pwm_Mode_rightAligned, TRUE, &IfxGtm_Tom_Dtm_PwmHl_updateEdgeAligned, &IfxGtm_Tom_Dtm_PwmHl_updateAndShiftOff, &IfxGtm_Tom_Dtm_PwmHl_updatePulse },
136 {Ifx_Pwm_Mode_off, FALSE, &IfxGtm_Tom_Dtm_PwmHl_updateOff, &IfxGtm_Tom_Dtm_PwmHl_updateAndShiftOff, &IfxGtm_Tom_Dtm_PwmHl_updatePulseOff},
137 };
138
139 /******************************************************************************/
140 /*---------------------Inline Function Implementations------------------------*/
141 /******************************************************************************/
142
143 IFX_INLINE void IfxGtm_Tom_Dtm_PwmHl_setOnTime(IfxGtm_TomDtm_PwmHl *driver, Ifx_TimerValue *tOn)
144 {
145 driver->update(driver, tOn);
146 }
147
148
149 IFX_INLINE Ifx_ActiveState IfxGtm_Tom_Dtm_PwmHl_invertActiveState(Ifx_ActiveState activeState)
150 {
151 return activeState == Ifx_ActiveState_low ? Ifx_ActiveState_high : Ifx_ActiveState_low;
152 }
153
154
155 /******************************************************************************/
156 /*-------------------------Function Implementations---------------------------*/
157 /******************************************************************************/
158
159 boolean IfxGtm_Tom_Dtm_PwmHl_init(IfxGtm_TomDtm_PwmHl *driver, const IfxGtm_Tom_Dtm_PwmHl_Config *config)
160 {
161 boolean result = TRUE;
162 uint16 channelMask;
163 uint16 channelsMask = 0;
164 uint32 channelIndex;
165
166 IfxGtm_Tom_Timer *timer = config->timer;
167
168 driver->base.mode = Ifx_Pwm_Mode_init;
169 driver->timer = timer;
170 driver->base.setMode = 0;
171 driver->base.inverted = FALSE;
172 driver->base.ccxActiveState = config->base.ccxActiveState;
173 driver->base.coutxActiveState = config->base.coutxActiveState;
174 driver->base.channelCount = config->base.channelCount;
175
176 driver->tom = &(timer->gtm->TOM[config->tom]);
177
178 driver->tgc = (Ifx_GTM_TOM_TGC *)&driver->tom->TGC0_GLB_CTRL;
179
180 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->base.channelCount <= IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS);
181
182 IfxGtm_Cmu_Clk clock = IfxGtm_Tom_Ch_getClockSource(timer->tom, timer->timerChannel);
183
184 for (channelIndex = 0; channelIndex < config->base.channelCount; channelIndex++)
185 {
186 IfxGtm_Tom_Ch channel;
187
188 /* Initialise the Deadtime generation */
189 driver->dtm[channelIndex] = IfxGtm_Dtm_getDtmPointer(timer->gtm, IfxGtm_Dtm_getCdtmIndex(config->tom), IfxGtm_Dtm_getDtmIndex(config->tom, config->ccx[channelIndex]->channel));
190 result &= driver->dtm[channelIndex] != NULL_PTR;
191
192 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, driver->dtm[channelIndex] != NULL_PTR);
193
194 if (driver->dtm[channelIndex] != NULL_PTR)
195 {
196 /* CCX */
197 channel = config->ccx[channelIndex]->channel;
198 driver->ccx[channelIndex] = channel;
199 channelMask = 1 << channel;
200 channelsMask |= channelMask;
201
202 /* Initialize the timer part */
203 IfxGtm_Tom_Ch_setClockSource(driver->tom, channel, clock);
204 IfxGtm_Tom_Ch_setResetSource( driver->tom, channel, IfxGtm_Tom_Ch_ResetEvent_onTrigger);
205 IfxGtm_Tom_Ch_setSignalLevel(driver->tom, channel, config->base.ccxActiveState);
206 IfxGtm_Tom_Ch_setTriggerOutput(driver->tom, channel, IfxGtm_Tom_Ch_OutputTrigger_forward);
207
208 /* Initialize the DTM part */
209 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, IfxGtm_Dtm_getDtmChannel(config->ccx[channelIndex]->channel) == IfxGtm_Dtm_getDtmChannel(config->coutx[channelIndex]->channel));
210
211 IfxGtm_Dtm_setClockSource(driver->dtm[channelIndex], config->deadTimeClock);
212 driver->dtmChannel[channelIndex] = IfxGtm_Dtm_getDtmChannel(config->ccx[channelIndex]->channel);
213 IfxGtm_Dtm_setOutput0DeadTimePath(driver->dtm[channelIndex], driver->dtmChannel[channelIndex], IfxGtm_Dtm_DeadTimePath_enable);
214 IfxGtm_Dtm_setOutput1DeadTimePath(driver->dtm[channelIndex], driver->dtmChannel[channelIndex], IfxGtm_Dtm_DeadTimePath_enable);
215
216 /* Initialize the port */
217 if (config->initPins == TRUE)
218 {
219 IfxGtm_PinMap_setTomTout(config->ccx[channelIndex],
220 ((config->base.ccxOutputEnabled & (0x1 << channelIndex)) != 0) ? config->base.outputMode : IfxPort_OutputMode_none, config->base.outputDriver);
221 }
222
223 /* COUTX */
224 channel = config->coutx[channelIndex]->channel;
225 driver->coutx[channelIndex] = channel;
226
227 /* Initialize the port */
228 if (config->initPins == TRUE)
229 {
230 IfxGtm_PinMap_setTomTout(config->coutx[channelIndex],
231 ((config->base.coutxOutputEnabled & (0x1 << channelIndex)) != 0) ? config->base.outputMode : IfxPort_OutputMode_none, config->base.outputDriver);
232 }
233 }
234 }
235
236 /* Initialize the clock value, assumes all DTM are connected to the same clock */
237 if (config->base.channelCount > 0)
238 {
239 driver->dtmClockFreq = IfxGtm_Dtm_getClockFrequency(timer->gtm, IfxGtm_Dtm_getCdtmIndex(config->tom), IfxGtm_Dtm_getDtmIndex(config->tom, config->ccx[0]->channel));
240 result &= IfxGtm_Tom_Dtm_PwmHl_setDeadtime(driver, config->base.deadtime);
241 }
242 else
243 {
244 driver->dtmClockFreq = 0;
245 }
246
247 IfxGtm_Tom_Dtm_PwmHl_setMinPulse(driver, config->base.minPulse); // must be called after IfxGtm_TomDtm_PwmHl_setDeadtime
248
249 IfxGtm_Tom_Tgc_enableChannelsOutput(driver->tgc, channelsMask, 0, FALSE);
250 IfxGtm_Tom_Tgc_enableChannels(driver->tgc, channelsMask, 0, FALSE);
251
252 IfxGtm_Tom_Dtm_PwmHl_setMode(driver, Ifx_Pwm_Mode_off);
253
254 Ifx_TimerValue tOn[IFXGTM_TOM_DTM_PWMHL_MAX_NUM_CHANNELS] = {0};
255 IfxGtm_Tom_Dtm_PwmHl_updateOff(driver, tOn); /* tOn do not need defined values */
256
257 /* Transfer the shadow registers */
258 IfxGtm_Tom_Tgc_setChannelsForceUpdate(driver->tgc, channelsMask, 0, 0, 0);
259 IfxGtm_Tom_Tgc_trigger(driver->tgc);
260 IfxGtm_Tom_Tgc_setChannelsForceUpdate(driver->tgc, 0, channelsMask, 0, 0);
261
262 /* Enable timer to update the channels */
263
264 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
265 {
266 IfxGtm_Tom_Timer_addToChannelMask(timer, driver->ccx[channelIndex]);
267 }
268
269 return result;
270 }
271
272
273 void IfxGtm_Tom_Dtm_PwmHl_initConfig(IfxGtm_Tom_Dtm_PwmHl_Config *config)
274 {
275 IfxStdIf_PwmHl_initConfig(&config->base);
276 config->timer = NULL_PTR;
277 config->tom = IfxGtm_Tom_0;
278 config->ccx = NULL_PTR;
279 config->coutx = NULL_PTR;
280 config->deadTimeClock = IfxGtm_Dtm_ClockSource_systemClock;
281 config->initPins = TRUE;
282 }
283
284
285 float32 IfxGtm_Tom_Dtm_PwmHl_getDeadtime(IfxGtm_TomDtm_PwmHl *driver)
286 {
287 return IfxStdIf_Timer_tickToS(driver->dtmClockFreq, driver->base.deadtime);
288 }
289
290
291 Ifx_TickTime IfxGtm_Tom_Dtm_PwmHl_getDeadtimeTick(IfxGtm_TomDtm_PwmHl *driver)
292 {
293 return driver->base.deadtime;
294 }
295
296
297 float32 IfxGtm_Tom_Dtm_PwmHl_getMinPulse(IfxGtm_TomDtm_PwmHl *driver)
298 {
299 return IfxStdIf_Timer_tickToS(driver->timer->base.clockFreq, driver->base.minPulse - IfxGtm_Tom_Dtm_PwmHl_getDeadtimeInTimerClockTicks(driver));
300 }
301
302
303 Ifx_Pwm_Mode IfxGtm_Tom_Dtm_PwmHl_getMode(IfxGtm_TomDtm_PwmHl *driver)
304 {
305 return driver->base.mode;
306 }
307
308
309 boolean IfxGtm_Tom_Dtm_PwmHl_setDeadtime(IfxGtm_TomDtm_PwmHl *driver, float32 deadtime)
310 {
311 uint32 channelIndex;
312 Ifx_TimerValue value = IfxStdIf_Timer_sToTick(driver->dtmClockFreq, deadtime);
313
314 if (value > IFXGTM_TOM_DTM_PWMHL_MAX_DEADTIME_IN_TICKS)
315 {
316 return FALSE;
317 }
318 else
319 {
320 driver->base.deadtime = value;
321
322 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
323 {
324 IfxGtm_Dtm_setDeadtime(driver->dtm[channelIndex], driver->dtmChannel[channelIndex], value, value);
325 }
326 }
327
328 return TRUE;
329 }
330
331
332 boolean IfxGtm_Tom_Dtm_PwmHl_setMinPulse(IfxGtm_TomDtm_PwmHl *driver, float32 minPulse)
333 {
334 Ifx_TimerValue value = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, minPulse);
335
336 driver->base.minPulse = value + IfxGtm_Tom_Dtm_PwmHl_getDeadtimeInTimerClockTicks(driver);
337 driver->base.maxPulse = driver->timer->base.period - driver->base.minPulse;
338
339 return TRUE;
340 }
341
342
343 boolean IfxGtm_Tom_Dtm_PwmHl_setMode(IfxGtm_TomDtm_PwmHl *driver, Ifx_Pwm_Mode mode)
344 {
345 boolean result = TRUE;
346 IfxGtm_Tom_Dtm_PwmHl_Base *base = &driver->base;
347
348 if (base->mode != mode)
349 {
350 if ((mode > Ifx_Pwm_Mode_off) || (IfxGtm_Tom_Dtm_PwmHl_modes[mode].update == NULL_PTR))
351 {
352 mode = Ifx_Pwm_Mode_off;
353 result = FALSE;
354 }
355
356 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, mode == IfxGtm_TomDtm_PwmHl_modes[mode].mode);
357
358 base->mode = mode;
359 driver->update = IfxGtm_Tom_Dtm_PwmHl_modes[mode].update;
360 driver->updateAndShift = IfxGtm_Tom_Dtm_PwmHl_modes[mode].updateAndShift;
361 driver->updatePulse = IfxGtm_Tom_Dtm_PwmHl_modes[mode].updatePulse;
362
363 if (base->mode != Ifx_Pwm_Mode_off)
364 {
365 base->inverted = IfxGtm_Tom_Dtm_PwmHl_modes[mode].inverted;
366 }
367 else
368 { /* Keep previous inverted for off mode */
369 }
370
371 if (base->inverted)
372 {
373 // TODO update DTM to invert, user SR
374 }
375 else
376 {
377 // TODO update DTM to invert, user SR
378 }
379 }
380
381 return result;
382 }
383
384
385 void IfxGtm_Tom_Dtm_PwmHl_setOnTimeAndShift(IfxGtm_TomDtm_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
386 {
387 driver->updateAndShift(driver, tOn, shift);
388 }
389
390
391 void IfxGtm_Tom_Dtm_PwmHl_setPulse(IfxGtm_TomDtm_PwmHl *driver, float32 *tOn, float32 *offset)
392 {
393 driver->updatePulse(driver, tOn, offset);
394 }
395
396
397 void IfxGtm_Tom_Dtm_PwmHl_setupChannels(IfxGtm_TomDtm_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
398 {
399 /* Dummy Function for StdIf Compile*/
400 IFX_UNUSED_PARAMETER(driver)
401 IFX_UNUSED_PARAMETER(activeCh)
402 IFX_UNUSED_PARAMETER(stuckSt)
403 }
404
405
406 boolean IfxGtm_Tom_Dtm_PwmHl_stdIfPwmHlInit(IfxStdIf_PwmHl *stdif, IfxGtm_TomDtm_PwmHl *driver)
407 {
408 /* Ensure the stdif is reset to zeros */
409 memset(stdif, 0, sizeof(IfxStdIf_PwmHl));
410
411 /* *INDENT-OFF* Note: this file was indented manually by the author. */
412 /* Set the API link */
413 stdif->driver = driver;
414 stdif->setDeadtime = (IfxStdIf_PwmHl_SetDeadtime )&IfxGtm_Tom_Dtm_PwmHl_setDeadtime;
415 stdif->getDeadtime = (IfxStdIf_PwmHl_GetDeadtime )&IfxGtm_Tom_Dtm_PwmHl_getDeadtime;
416 stdif->getDeadtimeTick = (IfxStdIf_PwmHl_GetDeadtimeTick )&IfxGtm_Tom_Dtm_PwmHl_getDeadtimeTick ;
417 stdif->setMinPulse = (IfxStdIf_PwmHl_SetMinPulse )&IfxGtm_Tom_Dtm_PwmHl_setMinPulse;
418 stdif->getMinPulse = (IfxStdIf_PwmHl_GetMinPulse )&IfxGtm_Tom_Dtm_PwmHl_getMinPulse;
419 stdif->getMode = (IfxStdIf_PwmHl_GetMode )&IfxGtm_Tom_Dtm_PwmHl_getMode;
420 stdif->setMode = (IfxStdIf_PwmHl_SetMode )&IfxGtm_Tom_Dtm_PwmHl_setMode;
421 stdif->setOnTime = (IfxStdIf_PwmHl_SetOnTime )&IfxGtm_Tom_Dtm_PwmHl_setOnTime;
422 stdif->setOnTimeAndShift = (IfxStdIf_PwmHl_SetOnTimeAndShift)&IfxGtm_Tom_Dtm_PwmHl_setOnTimeAndShift;
423 stdif->setPulse = (IfxStdIf_PwmHl_SetPulse )&IfxGtm_Tom_Dtm_PwmHl_setPulse;
424 stdif->setupChannels = (IfxStdIf_PwmHl_SetupChannels )&IfxGtm_Tom_Dtm_PwmHl_setupChannels;
425 IfxGtm_Tom_Timer_stdIfTimerInit(&stdif->timer, driver->timer);
426 /* *INDENT-ON* */
427
428 return TRUE;
429 }
430
431
432 IFX_STATIC void IfxGtm_Tom_Dtm_PwmHl_updateAndShiftOff(IfxGtm_TomDtm_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
433 {
434 IfxGtm_Tom_Dtm_PwmHl_updateOff(driver, NULL_PTR);
435 IFX_UNUSED_PARAMETER(tOn)
436 IFX_UNUSED_PARAMETER(shift)
437 }
438
439
440 IFX_STATIC void IfxGtm_Tom_Dtm_PwmHl_updateCenterAligned(IfxGtm_TomDtm_PwmHl *driver, Ifx_TimerValue *tOn)
441 {
442 /* FIXME make use of the Up Down counter mode */
443 uint8 channelIndex;
444 Ifx_TimerValue period;
445
446 period = driver->timer->base.period;
447
448 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
449 {
450 Ifx_TimerValue x; /* x=period*dutyCycle, x=OnTime+deadTime */
451 x = tOn[channelIndex];
452
453 if (driver->base.inverted != FALSE)
454 {
455 x = period - x;
456 }
457 else
458 {}
459
460 if (x < driver->base.minPulse)
461 { /* For deadtime condition: avoid leading edge of top channel to occur after the trailing edge */
462 x = 0;
463 }
464 else if (x > driver->base.maxPulse)
465 {
466 x = period;
467 }
468 else
469 {}
470
471 if (x == 0)
472 { /* 0% duty cycle */
473 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccx[channelIndex], period + 1, period + 1);
474 }
475 else
476 { /* x% duty cycle and 100 % duty cycle */
477 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccx[channelIndex], (period - x) / 2, (period + x) / 2);
478 }
479 }
480 }
481
482
483 IFX_STATIC void IfxGtm_Tom_Dtm_PwmHl_updateEdgeAligned(IfxGtm_TomDtm_PwmHl *driver, Ifx_TimerValue *tOn)
484 {
485 uint8 channelIndex;
486 Ifx_TimerValue period;
487
488 period = driver->timer->base.period;
489
490 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
491 {
492 Ifx_TimerValue x; /* x=period*dutyCycle, x=OnTime+deadTime */
493 Ifx_TimerValue cm0, cm1;
494 x = tOn[channelIndex];
495
496 if (driver->base.inverted != FALSE)
497 {
498 x = period - x;
499 }
500 else
501 {}
502
503 if (x < driver->base.minPulse)
504 { /* For deadtime condition: avoid leading edge of top channel to occur after the trailing edge */
505 x = 0;
506 }
507 else if (x > driver->base.maxPulse)
508 {
509 x = period;
510 }
511 else
512 {}
513
514 /* Special handling due to GTM issue */
515 if (x == period) /* 100% duty cycle */
516 {
517 cm0 = 0;
518 cm1 = period + 1;
519 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccx[channelIndex], cm0, cm1);
520 }
521 else if (x == 0)
522 {
523 cm0 = period + 1;
524 cm1 = 0;
525 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccx[channelIndex], cm0, cm1);
526 }
527 else
528 {
529 /* x% duty cycle */
530
531 if (driver->base.mode == Ifx_Pwm_Mode_leftAligned)
532 {
533 cm0 = 0;
534 cm1 = x;
535 }
536 else
537 {
538 // right aligned
539 cm0 = x;
540 cm1 = 0;
541 }
542
543 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccx[channelIndex], cm0, cm1);
544 }
545 }
546 }
547
548
549 IFX_STATIC void IfxGtm_Tom_Dtm_PwmHl_updateOff(IfxGtm_TomDtm_PwmHl *driver, Ifx_TimerValue *tOn)
550 {
551 IFX_UNUSED_PARAMETER(tOn)
552 uint8 channelIndex;
553 Ifx_TimerValue period;
554 period = driver->timer->base.period;
555
556 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
557 {
558 /* 0% duty cycle */
559 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccx[channelIndex], period + 1, period + 1);
560 }
561 }
562
563
564 IFX_STATIC void IfxGtm_Tom_Dtm_PwmHl_updatePulse(IfxGtm_TomDtm_PwmHl *driver, float32 *tOn, float32 *offset)
565 {
566 uint8 channelIndex;
567 Ifx_TimerValue period;
568
569 period = driver->timer->base.period;
570
571 /* Top channels */
572 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
573 {
574 Ifx_TimerValue x; /* x=period*dutyCycle, x=OnTime+deadTime */
575 Ifx_TimerValue o;
576 Ifx_TimerValue cm0, cm1;
577
578 x = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, tOn[channelIndex]);
579 o = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, offset[channelIndex]);
580
581 if (driver->base.inverted != FALSE)
582 {
583 x = period - x;
584 }
585 else
586 {}
587
588 if ((x < driver->base.minPulse) || (o > period))
589 {
590 x = 0;
591 }
592 else if ((x > driver->base.maxPulse) || (o + x > period))
593 {
594 x = period;
595 }
596 else
597 {}
598
599 /* Special handling due to GTM issue */
600 if (x == period)
601 { /* 100% duty cycle */
602 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccx[channelIndex],
603 period + 1 /* No compare event */,
604 2 /* 1st compare event (issue: expected to be 1)*/);
605 }
606 else if (x == 0)
607 {
608 cm0 = 1;
609 cm1 = period + 2;
610 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccx[channelIndex], cm0, cm1);
611 }
612 else
613 { /* x% duty cycle */
614 cm1 = 2 + o; // CM1, set to 2 due to a GTM issue. should be 1 according to spec
615 cm0 = o + x; // CM0, set to x+2 due to a GTM issue. should be x+1 according to spec
616 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccx[channelIndex], cm0, cm1);
617 }
618 }
619
620 /* FIXME enable selection between top and bottom channels. See PWM HL without DTM */
621 }
622
623
624 IFX_STATIC void IfxGtm_Tom_Dtm_PwmHl_updatePulseOff(IfxGtm_TomDtm_PwmHl *driver, float32 *tOn, float32 *offset)
625 {
626 IFX_UNUSED_PARAMETER(tOn)
627 IFX_UNUSED_PARAMETER(offset)
628
629 IfxGtm_Tom_Dtm_PwmHl_updateOff(driver, NULL_PTR);
630 }
631
632
633 IFX_STATIC void IfxGtm_Tom_Dtm_PwmHl_updateShiftCenterAligned(IfxGtm_TomDtm_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
634 {
635 uint8 channelIndex;
636 Ifx_TimerValue period;
637
638 period = driver->timer->base.period;
639
640 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
641 {
642 Ifx_TimerValue x; /* x=period*dutyCycle, x=OnTime+deadTime */
643 Ifx_TimerValue s; /* Shift value */
644 Ifx_TimerValue cm0, cm1;
645 x = tOn[channelIndex];
646
647 if (driver->base.inverted != FALSE)
648 {
649 x = period - x;
650 }
651 else
652 {}
653
654 if (x < driver->base.minPulse)
655 { /* For deadtime condition: avoid leading edge of top channel to occur after the trailing edge */
656 x = 0;
657 }
658 else if (x > driver->base.maxPulse)
659 {
660 x = period;
661 }
662 else
663 {}
664
665 /* Special handling due to GTM issue */
666 if (x == period)
667 { /* 100% duty cycle */
668 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccx[channelIndex],
669 period + 1 /* No compare event */,
670 2 /* 1st compare event (issue: expected to be 1)*/);
671 }
672 else if (x == 0)
673 {
674 cm0 = 1;
675 cm1 = period + 2;
676 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccx[channelIndex], cm0, cm1);
677 }
678 else
679 { /* x% duty cycle */
680 s = shift[channelIndex];
681
682 if (s > 0)
683 {
684 s = __minX(s, (period - x) / 2 - 1);
685 }
686 else
687 {
688 s = __maxX(s, (x - period) / 2 + 1);
689 }
690
691 cm1 = s + (period - x) / 2; // CM1
692 cm0 = s + (period + x) / 2; // CM0
693 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccx[channelIndex], cm0, cm1);
694 }
695 }
696 }
697
698
699 IFX_STATIC Ifx_TimerValue IfxGtm_Tom_Dtm_PwmHl_getDeadtimeInTimerClockTicks(IfxGtm_TomDtm_PwmHl *driver)
700 {
701 Ifx_TimerValue deadtimeInTimerClkTicks;
702
703 if (driver->dtmClockFreq == driver->timer->base.clockFreq)
704 {
705 // same clock frequency
706 deadtimeInTimerClkTicks = driver->base.deadtime;
707 }
708 else if (driver->base.deadtime == 0)
709 {
710 deadtimeInTimerClkTicks = 0;
711 }
712 else
713 {
714 // convert deadtime from DTM clk frequency to TIMER clk frequency
715 float32 deadtimeInS = IfxStdIf_Timer_tickToS(driver->dtmClockFreq, driver->base.deadtime);
716 deadtimeInTimerClkTicks = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, deadtimeInS);
717 //TODO: round-up?
718 }
719
720 return deadtimeInTimerClkTicks;
721 }
Ifx_ActiveState_high
The signal is high active.
Definition: Ifx_Types.h:116
IfxStdIf_PwmHl_::timer
IfxStdIf_Timer timer
Timer related standard interface.
Definition: IfxStdIf_PwmHl.h:196
IfxGtm_Tom_Dtm_PwmHl_Base::setMode
sint8 setMode
A non zero flag indicates that the PWM mode is being modified.
Definition: IfxGtm_Tom_Dtm_PwmHl.h:129
Ifx_Pwm_Mode
Ifx_Pwm_Mode
Definition: Ifx_Types.h:175
Ifx_ActiveState_low
The signal is low active.
Definition: Ifx_Types.h:115
IfxGtm_Tom_Timer_addToChannelMask
void IfxGtm_Tom_Timer_addToChannelMask(IfxGtm_Tom_Timer *driver, IfxGtm_Tom_Ch channel)
Add a channel to the channel mask Channels present in the mask are started, stopped, updated at the same time as the timer: IfxGtm_Tom_Timer_applyUpdate, IfxGtm_Tom_Timer_disableUpdate, IfxGtm_Tom_Timer_stop, IfxGtm_Tom_Timer_run.
Definition: IfxGtm_Tom_Timer.c:90
Ifx_TickTime
sint64 Ifx_TickTime
Time in ticks.
Definition: Ifx_Types.h:76
IfxGtm_Tom_Timer_Base::clockFreq
float32 clockFreq
Timer input clock frequency (cached value)
Definition: IfxGtm_Tom_Timer.h:151
IfxGtm_Tom_Ch_setTriggerOutput
void IfxGtm_Tom_Ch_setTriggerOutput(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_OutputTrigger trigger)
Sets the channel trigger output.
Definition: IfxGtm_Tom.c:348
IfxGtm_Tom_Dtm_PwmHl_s::coutx
IfxGtm_Tom_Ch coutx[IFXGTM_TOM_DTM_PWMHL_MAX_NUM_CHANNELS]
TOM channels used for the OUTX outputs.
Definition: IfxGtm_Tom_Dtm_PwmHl.h:172
IfxGtm_Tom_Dtm_PwmHl_Config::timer
IfxGtm_Tom_Timer * timer
Pointer to the linked timer object.
Definition: IfxGtm_Tom_Dtm_PwmHl.h:141
IfxStdIf_PwmHl_GetDeadtimeTick
float32(* IfxStdIf_PwmHl_GetDeadtimeTick)(IfxStdIf_InterfaceDriver stdIf)
Return the dead time ticks in s.
Definition: IfxStdIf_PwmHl.h:102
IfxGtm_Dtm_getDtmPointer
Ifx_GTM_CDTM_DTM * IfxGtm_Dtm_getDtmPointer(Ifx_GTM *gtm, IfxGtm_Cdtm cdtmIndex, IfxGtm_Dtm dtmIndex)
returns the base address of selected DTM instance
Definition: IfxGtm_Dtm.c:52
IfxStdIf_PwmHl_::setupChannels
IfxStdIf_PwmHl_SetupChannels setupChannels
IfxStdIf_PwmHl_SetupChannels.
Definition: IfxStdIf_PwmHl.h:194
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxGtm_Tom_Dtm_PwmHl_setOnTime
IFX_INLINE void IfxGtm_Tom_Dtm_PwmHl_setOnTime(IfxGtm_TomDtm_PwmHl *driver, Ifx_TimerValue *tOn)
Sets the ON time.
Definition: IfxGtm_Tom_Dtm_PwmHl.c:143
IfxGtm_Tom_Timer::gtm
Ifx_GTM * gtm
Pointer to GTM module.
Definition: IfxGtm_Tom_Timer.h:164
IfxStdIf_PwmHl_::getMinPulse
IfxStdIf_PwmHl_GetMinPulse getMinPulse
IfxStdIf_PwmHl_GetMinPulse.
Definition: IfxStdIf_PwmHl.h:188
IfxGtm_Tom_Dtm_PwmHl_Base::channelCount
uint8 channelCount
Number of PWM channels, one channel is made of a top and bottom channel.
Definition: IfxGtm_Tom_Dtm_PwmHl.h:133
IfxStdIf_PwmHl_::getDeadtime
IfxStdIf_PwmHl_GetDeadtime getDeadtime
IfxStdIf_PwmHl_GetDeadtime.
Definition: IfxStdIf_PwmHl.h:185
IfxGtm_Tom_Dtm_PwmHl_setPulse
void IfxGtm_Tom_Dtm_PwmHl_setPulse(IfxGtm_TomDtm_PwmHl *driver, float32 *tOn, float32 *offset)
Sets the ON time and offset, all switched are independent.
Definition: IfxGtm_Tom_Dtm_PwmHl.c:391
IfxGtm_Tom_Dtm_PwmHl_setDeadtime
boolean IfxGtm_Tom_Dtm_PwmHl_setDeadtime(IfxGtm_TomDtm_PwmHl *driver, float32 deadtime)
Sets the dead time.
Definition: IfxGtm_Tom_Dtm_PwmHl.c:309
IfxGtm_Dtm_ClockSource_systemClock
SYS_CLK as clock source.
Definition: IfxGtm_Dtm.h:72
IFXGTM_TOM_DTM_PWMHL_MAX_NUM_CHANNELS
#define IFXGTM_TOM_DTM_PWMHL_MAX_NUM_CHANNELS
Maximal number of channels handled by the driver. One channel has a top and bottom pwm output...
Definition: IfxGtm_Tom_Dtm_PwmHl.h:101
IfxGtm_Tom_Ch_setResetSource
void IfxGtm_Tom_Ch_setResetSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ResetEvent event)
Sets the channel clock source either from local or from previous channel.
Definition: IfxGtm_Tom.c:321
IfxGtm_Tom_Dtm_PwmHl_updateAndShiftOff
IFX_STATIC void IfxGtm_Tom_Dtm_PwmHl_updateAndShiftOff(IfxGtm_TomDtm_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets switched to OFF.
Definition: IfxGtm_Tom_Dtm_PwmHl.c:432
IfxGtm_PinMap_setTomTout
void IfxGtm_PinMap_setTomTout(IfxGtm_Tom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Definition: IfxGtm_PinMap.c:2420
Ifx_Pwm_Mode_centerAligned
Center aligned mode.
Definition: Ifx_Types.h:177
memset
void * memset(void *s, int c, syze_t n)
IfxStdIf_Timer_tickToS
IFX_INLINE float32 IfxStdIf_Timer_tickToS(float32 clockFreq, Ifx_TimerValue ticks)
Convert timer ticks to seconds.
Definition: IfxStdIf_Timer.h:435
IfxGtm_Tom_Ch_setSignalLevel
void IfxGtm_Tom_Ch_setSignalLevel(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, Ifx_ActiveState activeState)
Sets the signal level.
Definition: IfxGtm_Tom.c:329
IfxGtm_Tom_Dtm_PwmHl_s::updatePulse
IfxGtm_Tom_Dtm_PwmHl_UpdatePulse updatePulse
update pulse call back function for the selected mode
Definition: IfxGtm_Tom_Dtm_PwmHl.h:168
IfxStdIf_PwmHl_SetupChannels
void(* IfxStdIf_PwmHl_SetupChannels)(IfxStdIf_InterfaceDriver stdIf, boolean *activeCh, boolean *stuckSt)
Set channels which are generating PWM or in "stuck-at" state.
Definition: IfxStdIf_PwmHl.h:175
IfxGtm_Tom_Dtm_PwmHl_modes
IFX_STATIC IFX_CONST IfxGtm_Tom_Dtm_PwmHl_Mode IfxGtm_Tom_Dtm_PwmHl_modes[Ifx_Pwm_Mode_off+1]
Definition: IfxGtm_Tom_Dtm_PwmHl.c:131
IfxGtm_Tom_Dtm_PwmHl_setMinPulse
boolean IfxGtm_Tom_Dtm_PwmHl_setMinPulse(IfxGtm_TomDtm_PwmHl *driver, float32 minPulse)
Sets the minimum pulse.
Definition: IfxGtm_Tom_Dtm_PwmHl.c:332
IfxStdIf_PwmHl_GetMode
Ifx_Pwm_Mode(* IfxStdIf_PwmHl_GetMode)(IfxStdIf_InterfaceDriver stdIf)
Return the PWM mode.
Definition: IfxStdIf_PwmHl.h:125
IfxGtm_Tom_Dtm_PwmHl_Config
GTM TOM: PWM HL configuration.
Definition: IfxGtm_Tom_Dtm_PwmHl.h:138
IfxStdIf_PwmHl_initConfig
void IfxStdIf_PwmHl_initConfig(IfxStdIf_PwmHl_Config *config)
Definition: IfxStdIf_PwmHl.c:45
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxGtm_Dtm_getDtmChannel
IFX_INLINE IfxGtm_Dtm_Ch IfxGtm_Dtm_getDtmChannel(IfxGtm_Atom_Ch atomChannel)
return the ATOM channel corresponding DTM channel
Definition: IfxGtm_Dtm.h:277
IfxStdIf_Timer_sToTick
IFX_INLINE Ifx_TimerValue IfxStdIf_Timer_sToTick(float32 clockFreq, float32 seconds)
Convert seconds to timer ticks.
Definition: IfxStdIf_Timer.h:446
float32
float float32
Definition: Platform_Types.h:170
IfxGtm_Tom_Dtm_PwmHl_getMode
Ifx_Pwm_Mode IfxGtm_Tom_Dtm_PwmHl_getMode(IfxGtm_TomDtm_PwmHl *driver)
Returns Pwm mode.
Definition: IfxGtm_Tom_Dtm_PwmHl.c:303
Ifx_Assert.h
Assert functions.
IfxStdIf_PwmHl_::setPulse
IfxStdIf_PwmHl_SetPulse setPulse
IfxStdIf_PwmHl_Pulse.
Definition: IfxStdIf_PwmHl.h:193
IfxGtm_Tom_Dtm_PwmHl_Base
Multi-channels PWM object definition (channels only)
Definition: IfxGtm_Tom_Dtm_PwmHl.h:123
__maxX
#define __maxX
Definition: IfxCpu_IntrinsicsDcc.h:1597
IFXGTM_TOM_DTM_PWMHL_MAX_DEADTIME_IN_TICKS
#define IFXGTM_TOM_DTM_PWMHL_MAX_DEADTIME_IN_TICKS
Definition: IfxGtm_Tom_Dtm_PwmHl.h:103
IfxGtm_Dtm_setOutput0DeadTimePath
IFX_INLINE void IfxGtm_Dtm_setOutput0DeadTimePath(Ifx_GTM_CDTM_DTM *dtm, IfxGtm_Dtm_Ch channel, IfxGtm_Dtm_DeadTimePath deadTimePath)
Sets the Output 0 Dead Time Path for DTM channel.
Definition: IfxGtm_Dtm.h:218
IfxGtm_Tom_Timer_Base::period
Ifx_TimerValue period
Timer period in ticks (cached value)
Definition: IfxGtm_Tom_Timer.h:149
IfxGtm_Tom_Dtm_PwmHl_s::dtmClockFreq
float32 dtmClockFreq
Deadtime module input clock frequency (cached value)
Definition: IfxGtm_Tom_Dtm_PwmHl.h:175
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:113
IfxGtm_Tom_Dtm_PwmHl_getDeadtimeTick
Ifx_TickTime IfxGtm_Tom_Dtm_PwmHl_getDeadtimeTick(IfxGtm_TomDtm_PwmHl *driver)
Definition: IfxGtm_Tom_Dtm_PwmHl.c:291
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxGtm_Tom_Dtm_PwmHl_updatePulseOff
IFX_STATIC void IfxGtm_Tom_Dtm_PwmHl_updatePulseOff(IfxGtm_TomDtm_PwmHl *driver, float32 *tOn, float32 *offset)
Set Pulse to OFF.
Definition: IfxGtm_Tom_Dtm_PwmHl.c:624
IfxGtm_Tom_Dtm_PwmHl_stdIfPwmHlInit
boolean IfxGtm_Tom_Dtm_PwmHl_stdIfPwmHlInit(IfxStdIf_PwmHl *stdif, IfxGtm_TomDtm_PwmHl *driver)
Initialises the statndard interface Pwm.
Definition: IfxGtm_Tom_Dtm_PwmHl.c:406
IfxStdIf_PwmHl_Config::deadtime
float32 deadtime
Dead time between the top and bottom channels in seconds.
Definition: IfxStdIf_PwmHl.h:202
IfxGtm_Dtm_getCdtmIndex
IFX_INLINE IfxGtm_Cdtm IfxGtm_Dtm_getCdtmIndex(IfxGtm_Atom atom)
return the ATOM corresponding CDTM
Definition: IfxGtm_Dtm.h:254
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxStdIf_PwmHl_::driver
IfxStdIf_InterfaceDriver driver
Interface driver object.
Definition: IfxStdIf_PwmHl.h:181
IfxGtm_Tom_Ch
IfxGtm_Tom_Ch
Enum for TOM channels.
Definition: IfxGtm_cfg.h:428
IfxGtm_Tom_Dtm_PwmHl_updateOff
IFX_STATIC void IfxGtm_Tom_Dtm_PwmHl_updateOff(IfxGtm_TomDtm_PwmHl *driver, Ifx_TimerValue *tOn)
Set the outputs to inactive.
Definition: IfxGtm_Tom_Dtm_PwmHl.c:549
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxGtm_Tom_Dtm_PwmHl_Base::mode
Ifx_Pwm_Mode mode
actual PWM mode
Definition: IfxGtm_Tom_Dtm_PwmHl.h:128
IfxGtm_Tom_Dtm_PwmHl_Config::tom
IfxGtm_Tom tom
TOM unit used.
Definition: IfxGtm_Tom_Dtm_PwmHl.h:142
IfxStdIf_PwmHl_SetPulse
void(* IfxStdIf_PwmHl_SetPulse)(IfxStdIf_InterfaceDriver stdIf, float32 *tOn, float32 *offset)
Set the pwm pulse of all switched independently.
Definition: IfxStdIf_PwmHl.h:156
Ifx_Pwm_Mode_leftAligned
Left aligned mode. The PWM period starts with a rising edge.
Definition: Ifx_Types.h:179
IfxGtm_Tom_Dtm_PwmHl_updatePulse
IFX_STATIC void IfxGtm_Tom_Dtm_PwmHl_updatePulse(IfxGtm_TomDtm_PwmHl *driver, float32 *tOn, float32 *offset)
Update Pulse.
Definition: IfxGtm_Tom_Dtm_PwmHl.c:564
IfxGtm_Tom_Ch_ResetEvent_onTrigger
Definition: IfxGtm_Tom.h:106
IfxStdIf_PwmHl_GetMinPulse
float32(* IfxStdIf_PwmHl_GetMinPulse)(IfxStdIf_InterfaceDriver stdIf)
Return the minimum pulse time in s.
Definition: IfxStdIf_PwmHl.h:117
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxGtm_Tom_Dtm_PwmHl_Base::ccxActiveState
Ifx_ActiveState ccxActiveState
Top PWM active state.
Definition: IfxGtm_Tom_Dtm_PwmHl.h:130
IfxStdIf_PwmHl_Config::outputDriver
IfxPort_PadDriver outputDriver
Output pad driver of ccx and coutx pins.
Definition: IfxStdIf_PwmHl.h:208
IfxStdIf_PwmHl_Config::ccxActiveState
Ifx_ActiveState ccxActiveState
Top PWM active state.
Definition: IfxStdIf_PwmHl.h:211
Ifx_Pwm_Mode_init
Initialisation mode, do not use at run time.
Definition: Ifx_Types.h:182
IfxGtm_Tom_Ch_setCompareShadow
void IfxGtm_Tom_Ch_setCompareShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero, uint32 shadowOne)
Sets the compare 0 and 1 shadow values.
Definition: IfxGtm_Tom.c:242
Ifx_GTM_TOM_TGC
volatile struct IfxGtm_Tom_TGC Ifx_GTM_TOM_TGC
Definition: IfxGtm_cfg.h:233
IfxStdIf_PwmHl_
Standard interface object.
Definition: IfxStdIf_PwmHl.h:179
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:50
Ifx_Pwm_Mode_off
All switch open.
Definition: Ifx_Types.h:181
IfxGtm_Tom_Dtm_PwmHl_Config::coutx
IFX_CONST IfxGtm_Tom_ToutMapP * coutx
Pointer to an array of size pwmHl.channels.channelCount containing the channels used. Channels must be adjacent channels.
Definition: IfxGtm_Tom_Dtm_PwmHl.h:144
IfxGtm_Tom_Dtm_PwmHl_setOnTimeAndShift
void IfxGtm_Tom_Dtm_PwmHl_setOnTimeAndShift(IfxGtm_TomDtm_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets the ON time and Shift.
Definition: IfxGtm_Tom_Dtm_PwmHl.c:385
__minX
#define __minX
Definition: IfxCpu_IntrinsicsDcc.h:1593
IfxStdIf_PwmHl_::setOnTime
IfxStdIf_PwmHl_SetOnTime setOnTime
IfxStdIf_PwmHl_SetOnTime.
Definition: IfxStdIf_PwmHl.h:191
IfxGtm_Tom_Timer_stdIfTimerInit
boolean IfxGtm_Tom_Timer_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxGtm_Tom_Timer *driver)
Initializes the standard interface timer.
Definition: IfxGtm_Tom_Timer.c:431
IfxGtm_Tom_Dtm_PwmHl_updateCenterAligned
IFX_STATIC void IfxGtm_Tom_Dtm_PwmHl_updateCenterAligned(IfxGtm_TomDtm_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in center aligned and center aligned inverted modes.
Definition: IfxGtm_Tom_Dtm_PwmHl.c:440
IfxGtm_Tom_Dtm_PwmHl_s::tgc
Ifx_GTM_TOM_TGC * tgc
TGC unit used.
Definition: IfxGtm_Tom_Dtm_PwmHl.h:170
IfxGtm_Tom_Dtm_PwmHl_Base::deadtime
Ifx_TimerValue deadtime
Dead time between the top and bottom channel in ticks.
Definition: IfxGtm_Tom_Dtm_PwmHl.h:125
IfxGtm_Tom_Dtm_PwmHl_s::dtm
Ifx_GTM_CDTM_DTM * dtm[IFXGTM_TOM_DTM_PWMHL_MAX_NUM_CHANNELS]
Dead time module (DTM) used. Matching the Tom.
Definition: IfxGtm_Tom_Dtm_PwmHl.h:173
IfxGtm_Dtm_getDtmIndex
IFX_INLINE IfxGtm_Dtm IfxGtm_Dtm_getDtmIndex(IfxGtm_Atom atom, IfxGtm_Atom_Ch channel)
return the ATOM channel corresponding DTM
Definition: IfxGtm_Dtm.h:260
IfxStdIf_PwmHl_SetMinPulse
boolean(* IfxStdIf_PwmHl_SetMinPulse)(IfxStdIf_InterfaceDriver stdIf, float32 minPulse)
Set the minimum pulse time in s.
Definition: IfxStdIf_PwmHl.h:109
IfxGtm_Tom_Timer::tom
Ifx_GTM_TOM * tom
Pointer to the TOM object.
Definition: IfxGtm_Tom_Timer.h:165
IfxGtm_Tom_Dtm_PwmHl_s::updateAndShift
IfxGtm_Tom_Dtm_PwmHl_UpdateShift updateAndShift
update shift call back function for the selected mode
Definition: IfxGtm_Tom_Dtm_PwmHl.h:167
IfxGtm_Tom_Dtm_PwmHl_setupChannels
void IfxGtm_Tom_Dtm_PwmHl_setupChannels(IfxGtm_TomDtm_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set up channels.
Definition: IfxGtm_Tom_Dtm_PwmHl.c:397
IfxGtm_Cmu_Clk
IfxGtm_Cmu_Clk
Definition: IfxGtm_Cmu.h:64
IfxStdIf_PwmHl_Config::minPulse
float32 minPulse
Min pulse allowed as active state for the top and bottom PWM in seconds.
Definition: IfxStdIf_PwmHl.h:203
Ifx_Pwm_Mode_centerAlignedInverted
Center aligned inverted aligned mode.
Definition: Ifx_Types.h:178
IfxGtm_Dtm_setOutput1DeadTimePath
IFX_INLINE void IfxGtm_Dtm_setOutput1DeadTimePath(Ifx_GTM_CDTM_DTM *dtm, IfxGtm_Dtm_Ch channel, IfxGtm_Dtm_DeadTimePath deadTimePath)
Sets the Output 1 Dead Time Path for DTM channel.
Definition: IfxGtm_Dtm.h:227
IfxGtm_Tom_Dtm_PwmHl_setMode
boolean IfxGtm_Tom_Dtm_PwmHl_setMode(IfxGtm_TomDtm_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate()
Definition: IfxGtm_Tom_Dtm_PwmHl.c:343
IfxGtm_Tom_Dtm_PwmHl_s
GTM TOM PWM driver.
Definition: IfxGtm_Tom_Dtm_PwmHl.h:162
IfxGtm_Tom_ToutMap::channel
IfxGtm_Tom_Ch channel
TOM channel index.
Definition: IfxGtm_PinMap.h:127
IfxGtm_Tom_Tgc_trigger
void IfxGtm_Tom_Tgc_trigger(Ifx_GTM_TOM_TGC *tgc)
Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG)
Definition: IfxGtm_Tom.c:552
IfxStdIf_PwmHl_::setMode
IfxStdIf_PwmHl_SetMode setMode
IfxStdIf_PwmHl_SetMode.
Definition: IfxStdIf_PwmHl.h:190
Ifx_Pwm_Mode_rightAligned
Right aligned mode. The PWM period starts with a falling edge.
Definition: Ifx_Types.h:180
IfxGtm_Dtm_setClockSource
IFX_INLINE void IfxGtm_Dtm_setClockSource(Ifx_GTM_CDTM_DTM *dtm, IfxGtm_Dtm_ClockSource clockSource)
Sets the clock source for DTM object.
Definition: IfxGtm_Dtm.h:212
IfxStdIf_PwmHl_Config::outputMode
IfxPort_OutputMode outputMode
Output mode of ccx and coutx pins.
Definition: IfxStdIf_PwmHl.h:207
IfxStdIf_PwmHl_Config::ccxOutputEnabled
Ifx_ActiveState ccxOutputEnabled
Definition: IfxStdIf_PwmHl.h:209
IfxGtm_Tom_Dtm_PwmHl_Config::initPins
boolean initPins
TRUE: Initialize pins in driver, FALSE: Don&#39;t initialize pins in driver. User handles separately...
Definition: IfxGtm_Tom_Dtm_PwmHl.h:146
IfxGtm_Tom_Dtm_PwmHl_s::base
IfxGtm_Tom_Dtm_PwmHl_Base base
Multi-channels PWM object definition (channels only)
Definition: IfxGtm_Tom_Dtm_PwmHl.h:164
IfxGtm_Tom_Timer
TOM Timer interface Handle.
Definition: IfxGtm_Tom_Timer.h:161
IfxGtm_Tom_Dtm_PwmHl_Base::minPulse
Ifx_TimerValue minPulse
minimum pulse that is output, shorter pulse time will be output as 0% duty cycle
Definition: IfxGtm_Tom_Dtm_PwmHl.h:126
IfxGtm_Tom_Dtm_PwmHl_s::ccx
IfxGtm_Tom_Ch ccx[IFXGTM_TOM_DTM_PWMHL_MAX_NUM_CHANNELS]
TOM channels used for the CCCX outputs.
Definition: IfxGtm_Tom_Dtm_PwmHl.h:171
IfxStdIf_PwmHl_SetDeadtime
boolean(* IfxStdIf_PwmHl_SetDeadtime)(IfxStdIf_InterfaceDriver stdIf, float32 deadtime)
Set the dead time in s.
Definition: IfxStdIf_PwmHl.h:86
IfxGtm_Dtm_getClockFrequency
float32 IfxGtm_Dtm_getClockFrequency(Ifx_GTM *gtm, IfxGtm_Cdtm cdtmIndex, IfxGtm_Dtm dtmIndex)
Returns the clock frequency in Hz of the DTM.
Definition: IfxGtm_Dtm.c:69
IfxStdIf_PwmHl_::getDeadtimeTick
IfxStdIf_PwmHl_GetDeadtimeTick getDeadtimeTick
Definition: IfxStdIf_PwmHl.h:186
IfxGtm_Tom_Dtm_PwmHl_s::update
IfxGtm_Tom_Dtm_PwmHl_Update update
update call back function for the selected mode
Definition: IfxGtm_Tom_Dtm_PwmHl.h:166
IfxGtm_Tom_Dtm_PwmHl_getDeadtime
float32 IfxGtm_Tom_Dtm_PwmHl_getDeadtime(IfxGtm_TomDtm_PwmHl *driver)
Returns the dead time.
Definition: IfxGtm_Tom_Dtm_PwmHl.c:285
IfxGtm_Tom_Dtm_PwmHl_s::dtmChannel
IfxGtm_Dtm_Ch dtmChannel[IFXGTM_TOM_DTM_PWMHL_MAX_NUM_CHANNELS]
DTM channel used.
Definition: IfxGtm_Tom_Dtm_PwmHl.h:174
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxStdIf_PwmHl_Config::channelCount
uint8 channelCount
Number of PWM channels, one channel is made of a top and bottom channel.
Definition: IfxStdIf_PwmHl.h:204
IfxGtm_Tom_Dtm_PwmHl_getDeadtimeInTimerClockTicks
IFX_STATIC Ifx_TimerValue IfxGtm_Tom_Dtm_PwmHl_getDeadtimeInTimerClockTicks(IfxGtm_TomDtm_PwmHl *driver)
Definition: IfxGtm_Tom_Dtm_PwmHl.c:699
IfxGtm_Tom_Dtm_PwmHl_Base::maxPulse
Ifx_TimerValue maxPulse
internal parameter
Definition: IfxGtm_Tom_Dtm_PwmHl.h:127
IfxGtm_Tom_Dtm_PwmHl_updateShiftCenterAligned
IFX_STATIC void IfxGtm_Tom_Dtm_PwmHl_updateShiftCenterAligned(IfxGtm_TomDtm_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Update Shift Center Aligned.
Definition: IfxGtm_Tom_Dtm_PwmHl.c:633
IfxGtm_Tom_Ch_OutputTrigger_forward
Forward the trigger from the previous channel.
Definition: IfxGtm_Tom.h:97
IfxGtm_Tom_Ch_setClockSource
void IfxGtm_Tom_Ch_setClockSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ClkSrc clock)
Sets the channel clock source.
Definition: IfxGtm_Tom.c:209
IfxGtm_Tom_Dtm_PwmHl_s::tom
Ifx_GTM_TOM * tom
TOM unit used.
Definition: IfxGtm_Tom_Dtm_PwmHl.h:169
IfxGtm_Tom_Ch_getClockSource
IfxGtm_Tom_Ch_ClkSrc IfxGtm_Tom_Ch_getClockSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the channel clock source.
Definition: IfxGtm_Tom.c:92
IfxGtm_Tom_Dtm_PwmHl_Mode
Structure for PWM configuration.
Definition: IfxGtm_Tom_Dtm_PwmHl.h:151
IfxGtm_Tom_Tgc_setChannelsForceUpdate
void IfxGtm_Tom_Tgc_setChannelsForceUpdate(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
Enable/disable one or more channels for the force update feature (FUPD)
Definition: IfxGtm_Tom.c:530
IfxStdIf_PwmHl_::setMinPulse
IfxStdIf_PwmHl_SetMinPulse setMinPulse
IfxStdIf_PwmHl_SetMinPulse.
Definition: IfxStdIf_PwmHl.h:187
IfxGtm_Tom_Tgc_enableChannelsOutput
void IfxGtm_Tom_Tgc_enableChannelsOutput(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels output (OUTEN)
Definition: IfxGtm_Tom.c:464
IfxGtm_Tom_Dtm_PwmHl.h
GTM DTM_PWMHL details.
IfxStdIf_PwmHl_::setOnTimeAndShift
IfxStdIf_PwmHl_SetOnTimeAndShift setOnTimeAndShift
IfxStdIf_PwmHl_SetOnTime.
Definition: IfxStdIf_PwmHl.h:192
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxGtm_Tom_0
TOM object 0.
Definition: IfxGtm_cfg.h:419
IfxStdIf_PwmHl_SetOnTime
void(* IfxStdIf_PwmHl_SetOnTime)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue *tOn)
Set the pwm ON time.
Definition: IfxStdIf_PwmHl.h:140
IfxGtm_Dtm_DeadTimePath_enable
Dead Time Path enabled.
Definition: IfxGtm_Dtm.h:106
IfxGtm_Tom_Dtm_PwmHl_init
boolean IfxGtm_Tom_Dtm_PwmHl_init(IfxGtm_TomDtm_PwmHl *driver, const IfxGtm_Tom_Dtm_PwmHl_Config *config)
Initializes the timer object note : To ensure that the channels counter are reset by the timer and do...
Definition: IfxGtm_Tom_Dtm_PwmHl.c:159
IfxGtm_Tom_Timer::base
IfxGtm_Tom_Timer_Base base
Timer base structure.
Definition: IfxGtm_Tom_Timer.h:163
IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS
#define IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS
Maximal number of channels handled by the driver. One channel has a top and bottom pwm output Limited...
Definition: IfxGtm_Tom_PwmHl.h:146
IfxStdIf_PwmHl_::getMode
IfxStdIf_PwmHl_GetMode getMode
IfxStdIf_PwmHl_GetMode.
Definition: IfxStdIf_PwmHl.h:189
IfxStdIf_PwmHl_SetOnTimeAndShift
void(* IfxStdIf_PwmHl_SetOnTimeAndShift)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Set the pwm ON time and shift value.
Definition: IfxStdIf_PwmHl.h:148
IfxStdIf_PwmHl_GetDeadtime
float32(* IfxStdIf_PwmHl_GetDeadtime)(IfxStdIf_InterfaceDriver stdIf)
Return the dead time in s.
Definition: IfxStdIf_PwmHl.h:94
IfxGtm_Tom_Dtm_PwmHl_initConfig
void IfxGtm_Tom_Dtm_PwmHl_initConfig(IfxGtm_Tom_Dtm_PwmHl_Config *config)
Initialize the configuration structure to default.
Definition: IfxGtm_Tom_Dtm_PwmHl.c:273
IfxStdIf_PwmHl_::setDeadtime
IfxStdIf_PwmHl_SetDeadtime setDeadtime
IfxStdIf_PwmHl_SetDeadtime.
Definition: IfxStdIf_PwmHl.h:184
IfxStdIf_PwmHl_Config::coutxOutputEnabled
Ifx_ActiveState coutxOutputEnabled
Definition: IfxStdIf_PwmHl.h:210
IfxGtm_Tom_Dtm_PwmHl_updateEdgeAligned
IFX_STATIC void IfxGtm_Tom_Dtm_PwmHl_updateEdgeAligned(IfxGtm_TomDtm_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in edge aligned modes (left and right aligned)
Definition: IfxGtm_Tom_Dtm_PwmHl.c:483
IfxGtm_Tom_Dtm_PwmHl_invertActiveState
IFX_INLINE Ifx_ActiveState IfxGtm_Tom_Dtm_PwmHl_invertActiveState(Ifx_ActiveState activeState)
Inverts the active state.
Definition: IfxGtm_Tom_Dtm_PwmHl.c:149
IfxPort_OutputMode_none
Definition: IfxPort.h:144
IfxGtm_Tom_Tgc_enableChannels
void IfxGtm_Tom_Tgc_enableChannels(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels (ENDIS)
Definition: IfxGtm_Tom.c:446
IfxGtm_Tom_Dtm_PwmHl_Base::coutxActiveState
Ifx_ActiveState coutxActiveState
Bottom PWM active state.
Definition: IfxGtm_Tom_Dtm_PwmHl.h:131
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxStdIf_PwmHl_Config::coutxActiveState
Ifx_ActiveState coutxActiveState
Bottom PWM active state.
Definition: IfxStdIf_PwmHl.h:212
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
IfxGtm_Tom_Timer::timerChannel
IfxGtm_Tom_Ch timerChannel
TOM channel used for the timer.
Definition: IfxGtm_Tom_Timer.h:168
IfxGtm_Tom_Dtm_PwmHl_Config::base
IfxStdIf_PwmHl_Config base
PWM HL standard interface configuration.
Definition: IfxGtm_Tom_Dtm_PwmHl.h:140
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxGtm_Tom_Dtm_PwmHl_Config::deadTimeClock
IfxGtm_Dtm_ClockSource deadTimeClock
Clock used for the dead time generation.
Definition: IfxGtm_Tom_Dtm_PwmHl.h:145
IfxStdIf_PwmHl_SetMode
boolean(* IfxStdIf_PwmHl_SetMode)(IfxStdIf_InterfaceDriver stdIf, Ifx_Pwm_Mode mode)
Set the pwm mode.
Definition: IfxStdIf_PwmHl.h:133
IfxGtm_Tom_Dtm_PwmHl_Config::ccx
IFX_CONST IfxGtm_Tom_ToutMapP * ccx
Pointer to an array of size pwmHl.channels.channelCount containing the channels used. Channels must be adjacent channels.
Definition: IfxGtm_Tom_Dtm_PwmHl.h:143
IfxGtm_Dtm_setDeadtime
IFX_INLINE void IfxGtm_Dtm_setDeadtime(Ifx_GTM_CDTM_DTM *dtm, IfxGtm_Dtm_Ch channel, uint32 risingEdge, float32 fallingEdge)
Sets the deadtime.
Definition: IfxGtm_Dtm.h:298
IfxGtm_Tom_Dtm_PwmHl_Base::inverted
boolean inverted
Flag indicating the center aligned inverted mode (TRUE)
Definition: IfxGtm_Tom_Dtm_PwmHl.h:132
IfxGtm_Tom_Dtm_PwmHl_getMinPulse
float32 IfxGtm_Tom_Dtm_PwmHl_getMinPulse(IfxGtm_TomDtm_PwmHl *driver)
Returns the minimum pulse.
Definition: IfxGtm_Tom_Dtm_PwmHl.c:297


iLLD_TC38A: IfxGtm_Tom_Dtm_PwmHl.h Source File

  • Gtm
  • Tom
  • Dtm_PwmHl
IfxGtm_Tom_Dtm_PwmHl.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Tom_Dtm_PwmHl.h
3 * \brief GTM DTM_PWMHL details
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Gtm_Tom_PwmHl_Usage How to use the GTM TOM PWM Driver
42 * \ingroup IfxLld_Gtm_Tom_PwmHl
43 *
44 * This driver implements the PWM functionalities as defined by \ref library_srvsw_stdif_pwmhl.
45 * The user is free to use either the driver specific APIs below or to used the \ref library_srvsw_stdif_pwmhl "standard interface APIs".
46 *
47 * \section Specific Specific implementation
48 * Implementation is similar to \ref IfxLld_Gtm_Tom_PwmHl
49 *
50 * \todo add documentation
51 *
52 * For a detailed configuration of the microcontroller, see \ref IfxGtm_TomDtm_PwmHl_init().
53 *
54 * \section Example Usage example
55 * Initialisation is done by, e.g:
56 * \code
57 * IfxGtm_TomDtm_PwmHl_Config driverConfig;
58 * IfxGtm_TomDtm_PwmHl driverData;
59 * IfxStdIf_PwmHl pwmhl;
60 * IfxGtm_TomDtm_PwmHl_initConfig(&driverConfig, &MODULE_GTM);
61 * IfxGtm_TomDtm_PwmHl_init(&driverData, &driverConfig);
62 * IfxGtm_TomDtm_PwmHl_stdIfPwmHlInit(pwmhl, &driverData);
63 * \endcode
64 *
65 * During run-time, \ref library_srvsw_stdif_pwmhl "the interface functions" shall be used, e.g.:
66 * \code
67 * IfxStdIf_Timer* timer = IfxStdIf_PwmHl_getTimer(pwmhl);
68 * Ifx_TimerValue onTime[3]; // assume configured for three HL channels
69 *
70 * onTime[0] = 10;
71 * onTime[1] = 20;
72 * onTime[2] = 30;
73 *
74 * IfxStdIf_Timer_disableUpdate(timer);
75 * IfxStdIf_Timer_setPeriod(timer, period);
76 * IfxStdIf_PwmHl_setOnTime(pwmhl, onTime);
77 * IfxStdIf_Timer_applyUpdate(timer);
78 * \endcode
79 *
80 * \defgroup IfxLld_Gtm_Tom_Dtm_PwmHl TOM DTM Interface Driver
81 * \ingroup IfxLld_Gtm_Tom
82 */
83
84 #ifndef IFXGTM_TOM_DTM_PWMHL_H
85 #define IFXGTM_TOM_DTM_PWMHL_H 1
86
87 /******************************************************************************/
88 /*----------------------------------Includes----------------------------------*/
89 /******************************************************************************/
90
91 #include "StdIf/IfxStdIf_PwmHl.h"
92 #include "Gtm/Tom/Timer/IfxGtm_Tom_Timer.h"
93 #include "Gtm/Std/IfxGtm_Dtm.h"
94
95 /******************************************************************************/
96 /*-----------------------------------Macros-----------------------------------*/
97 /******************************************************************************/
98
99 /** \brief Maximal number of channels handled by the driver. One channel has a top and bottom pwm output
100 */
101 #define IFXGTM_TOM_DTM_PWMHL_MAX_NUM_CHANNELS (3)
102
103 #define IFXGTM_TOM_DTM_PWMHL_MAX_DEADTIME_IN_TICKS (1023)
104
105 /******************************************************************************/
106 /*------------------------------Type Definitions------------------------------*/
107 /******************************************************************************/
108
109 typedef struct IfxGtm_Tom_Dtm_PwmHl_s IfxGtm_TomDtm_PwmHl;
110
111 typedef void (*IfxGtm_Tom_Dtm_PwmHl_Update)(IfxGtm_TomDtm_PwmHl *driver, Ifx_TimerValue *tOn);
112
113 typedef void (*IfxGtm_Tom_Dtm_PwmHl_UpdateShift)(IfxGtm_TomDtm_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift);
114
115 typedef void (*IfxGtm_Tom_Dtm_PwmHl_UpdatePulse)(IfxGtm_TomDtm_PwmHl *driver, float32 *tOn, float32 *offset);
116
117 /******************************************************************************/
118 /*-----------------------------Data Structures--------------------------------*/
119 /******************************************************************************/
120
121 /** \brief Multi-channels PWM object definition (channels only)
122 */
123 typedef struct
124 {
125 Ifx_TimerValue deadtime; /**< \brief Dead time between the top and bottom channel in ticks */
126 Ifx_TimerValue minPulse; /**< \brief minimum pulse that is output, shorter pulse time will be output as 0% duty cycle */
127 Ifx_TimerValue maxPulse; /**< \brief internal parameter */
128 Ifx_Pwm_Mode mode; /**< \brief actual PWM mode */
129 sint8 setMode; /**< \brief A non zero flag indicates that the PWM mode is being modified */
130 Ifx_ActiveState ccxActiveState; /**< \brief Top PWM active state */
131 Ifx_ActiveState coutxActiveState; /**< \brief Bottom PWM active state */
132 boolean inverted; /**< \brief Flag indicating the center aligned inverted mode (TRUE) */
133 uint8 channelCount; /**< \brief Number of PWM channels, one channel is made of a top and bottom channel */
134 } IfxGtm_Tom_Dtm_PwmHl_Base;
135
136 /** \brief GTM TOM: PWM HL configuration
137 */
138 typedef struct
139 {
140 IfxStdIf_PwmHl_Config base; /**< \brief PWM HL standard interface configuration */
141 IfxGtm_Tom_Timer *timer; /**< \brief Pointer to the linked timer object */
142 IfxGtm_Tom tom; /**< \brief TOM unit used */
143 IFX_CONST IfxGtm_Tom_ToutMapP *ccx; /**< \brief Pointer to an array of size pwmHl.channels.channelCount containing the channels used. Channels must be adjacent channels */
144 IFX_CONST IfxGtm_Tom_ToutMapP *coutx; /**< \brief Pointer to an array of size pwmHl.channels.channelCount containing the channels used. Channels must be adjacent channels */
145 IfxGtm_Dtm_ClockSource deadTimeClock; /**< \brief Clock used for the dead time generation */
146 boolean initPins; /**< \brief TRUE: Initialize pins in driver, FALSE: Don't initialize pins in driver. User handles separately. */
147 } IfxGtm_Tom_Dtm_PwmHl_Config;
148
149 /** \brief Structure for PWM configuration
150 */
151 typedef struct
152 {
153 Ifx_Pwm_Mode mode; /**< \brief PWM mode */
154 boolean inverted; /**< \brief Inverted configuration for the selected mode */
155 IfxGtm_Tom_Dtm_PwmHl_Update update; /**< \brief update call back function for the selected mode */
156 IfxGtm_Tom_Dtm_PwmHl_UpdateShift updateAndShift; /**< \brief update shift call back function for the selected mode */
157 IfxGtm_Tom_Dtm_PwmHl_UpdatePulse updatePulse; /**< \brief update pulse call back function for the selected mode */
158 } IfxGtm_Tom_Dtm_PwmHl_Mode;
159
160 /** \brief GTM TOM PWM driver
161 */
162 struct IfxGtm_Tom_Dtm_PwmHl_s
163 {
164 IfxGtm_Tom_Dtm_PwmHl_Base base; /**< \brief Multi-channels PWM object definition (channels only) */
165 IfxGtm_Tom_Timer *timer; /**< \brief Pointer to the linked timer object */
166 IfxGtm_Tom_Dtm_PwmHl_Update update; /**< \brief update call back function for the selected mode */
167 IfxGtm_Tom_Dtm_PwmHl_UpdateShift updateAndShift; /**< \brief update shift call back function for the selected mode */
168 IfxGtm_Tom_Dtm_PwmHl_UpdatePulse updatePulse; /**< \brief update pulse call back function for the selected mode */
169 Ifx_GTM_TOM *tom; /**< \brief TOM unit used */
170 Ifx_GTM_TOM_TGC *tgc; /**< \brief TGC unit used */
171 IfxGtm_Tom_Ch ccx[IFXGTM_TOM_DTM_PWMHL_MAX_NUM_CHANNELS]; /**< \brief TOM channels used for the CCCX outputs */
172 IfxGtm_Tom_Ch coutx[IFXGTM_TOM_DTM_PWMHL_MAX_NUM_CHANNELS]; /**< \brief TOM channels used for the OUTX outputs */
173 Ifx_GTM_CDTM_DTM *dtm[IFXGTM_TOM_DTM_PWMHL_MAX_NUM_CHANNELS]; /**< \brief Dead time module (DTM) used. Matching the Tom */
174 IfxGtm_Dtm_Ch dtmChannel[IFXGTM_TOM_DTM_PWMHL_MAX_NUM_CHANNELS]; /**< \brief DTM channel used */
175 float32 dtmClockFreq; /**< \brief Deadtime module input clock frequency (cached value) */
176 };
177
178 /******************************************************************************/
179 /*-------------------------Global Function Prototypes-------------------------*/
180 /******************************************************************************/
181
182 /** \brief Initializes the timer object
183 * note : To ensure that the channels counter are reset by the timer and do not overflow, leading to random signal on the output, the timer must be started before the call to this function.
184 * \param driver driver GTM TOM PWM driver
185 * \param config config GTM TOM: PWM HL configuration
186 * \return TRUE on success else FALSE
187 */
188 IFX_EXTERN boolean IfxGtm_Tom_Dtm_PwmHl_init(IfxGtm_TomDtm_PwmHl *driver, const IfxGtm_Tom_Dtm_PwmHl_Config *config);
189
190 /** \brief Initialize the configuration structure to default
191 * \param config config Channel configuration. This parameter is Initialised by the function
192 * \return None
193 */
194 IFX_EXTERN void IfxGtm_Tom_Dtm_PwmHl_initConfig(IfxGtm_Tom_Dtm_PwmHl_Config *config);
195
196 /** \brief Returns the dead time
197 * \param driver driver GTM TOM PWM driver
198 * \return Dead Time
199 */
200 IFX_EXTERN float32 IfxGtm_Tom_Dtm_PwmHl_getDeadtime(IfxGtm_TomDtm_PwmHl *driver);
201
202 /**
203 */
204 IFX_EXTERN Ifx_TickTime IfxGtm_Tom_Dtm_PwmHl_getDeadtimeTick(IfxGtm_TomDtm_PwmHl *driver);
205
206 /** \brief Returns the minimum pulse
207 * \param driver driver GTM TOM PWM driver
208 * \return Min Pulse
209 */
210 IFX_EXTERN float32 IfxGtm_Tom_Dtm_PwmHl_getMinPulse(IfxGtm_TomDtm_PwmHl *driver);
211
212 /** \brief Returns Pwm mode
213 * \param driver driver GTM TOM PWM driver
214 * \return Pwm mode
215 */
216 IFX_EXTERN Ifx_Pwm_Mode IfxGtm_Tom_Dtm_PwmHl_getMode(IfxGtm_TomDtm_PwmHl *driver);
217
218 /** \brief Sets the dead time
219 * \param driver driver GTM TOM PWM driver
220 * \param deadtime deadtime Dead time value
221 * \return TRUE on success else FALSE
222 */
223 IFX_EXTERN boolean IfxGtm_Tom_Dtm_PwmHl_setDeadtime(IfxGtm_TomDtm_PwmHl *driver, float32 deadtime);
224
225 /** \brief Sets the minimum pulse
226 * \param driver driver GTM TOM PWM driver
227 * \param minPulse minPulse Minimum pulse
228 * \return TRUE on success else FALSE
229 */
230 IFX_EXTERN boolean IfxGtm_Tom_Dtm_PwmHl_setMinPulse(IfxGtm_TomDtm_PwmHl *driver, float32 minPulse);
231
232 /** \brief Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate()
233 * \param driver driver GTM TOM PWM driver
234 * \param mode mode Pwm mode
235 * \return TRUE on success else FALSE
236 */
237 IFX_EXTERN boolean IfxGtm_Tom_Dtm_PwmHl_setMode(IfxGtm_TomDtm_PwmHl *driver, Ifx_Pwm_Mode mode);
238
239 /** \brief Sets the ON time and Shift
240 * \param driver driver GTM TOM PWM driver
241 * \param tOn tOn ON time
242 * \param shift Shift value in ticks
243 * \return None
244 */
245 IFX_EXTERN void IfxGtm_Tom_Dtm_PwmHl_setOnTimeAndShift(IfxGtm_TomDtm_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift);
246
247 /** \brief Sets the ON time and offset, all switched are independent
248 * \param driver driver GTM TOM PWM driver
249 * \param tOn tOn ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
250 * \param offset offset Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
251 * \return None
252 */
253 IFX_EXTERN void IfxGtm_Tom_Dtm_PwmHl_setPulse(IfxGtm_TomDtm_PwmHl *driver, float32 *tOn, float32 *offset);
254
255 /** \brief Set up channels
256 * \param driver driver GTM TOM PWM driver
257 * \param activeCh Active channel
258 * \param stuckSt Stuck state
259 * \return None
260 */
261 IFX_EXTERN void IfxGtm_Tom_Dtm_PwmHl_setupChannels(IfxGtm_TomDtm_PwmHl *driver, boolean *activeCh, boolean *stuckSt);
262
263 /** \brief Initialises the statndard interface Pwm
264 * \param stdif Standard interface object, will be initialized by the function
265 * \param driver Interface driver to be used by the standard interface. must be initialised separately
266 * \return TRUE on success else FALSE
267 */
268 IFX_EXTERN boolean IfxGtm_Tom_Dtm_PwmHl_stdIfPwmHlInit(IfxStdIf_PwmHl *stdif, IfxGtm_TomDtm_PwmHl *driver);
269
270 #endif /* IFXGTM_TOM_DTM_PWMHL_H */
IfxGtm_Tom_Dtm_PwmHl_Base::setMode
sint8 setMode
A non zero flag indicates that the PWM mode is being modified.
Definition: IfxGtm_Tom_Dtm_PwmHl.h:129
Ifx_Pwm_Mode
Ifx_Pwm_Mode
Definition: Ifx_Types.h:175
IfxGtm_Tom_Dtm_PwmHl_setOnTimeAndShift
IFX_EXTERN void IfxGtm_Tom_Dtm_PwmHl_setOnTimeAndShift(IfxGtm_TomDtm_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets the ON time and Shift.
Definition: IfxGtm_Tom_Dtm_PwmHl.c:385
Ifx_TickTime
sint64 Ifx_TickTime
Time in ticks.
Definition: Ifx_Types.h:76
IfxGtm_Tom_Dtm_PwmHl_s::coutx
IfxGtm_Tom_Ch coutx[IFXGTM_TOM_DTM_PWMHL_MAX_NUM_CHANNELS]
TOM channels used for the OUTX outputs.
Definition: IfxGtm_Tom_Dtm_PwmHl.h:172
IfxGtm_Tom_Dtm_PwmHl_Config::timer
IfxGtm_Tom_Timer * timer
Pointer to the linked timer object.
Definition: IfxGtm_Tom_Dtm_PwmHl.h:141
IfxGtm_Tom_Dtm_PwmHl_Base::channelCount
uint8 channelCount
Number of PWM channels, one channel is made of a top and bottom channel.
Definition: IfxGtm_Tom_Dtm_PwmHl.h:133
IfxGtm_Tom_Dtm_PwmHl_getDeadtime
IFX_EXTERN float32 IfxGtm_Tom_Dtm_PwmHl_getDeadtime(IfxGtm_TomDtm_PwmHl *driver)
Returns the dead time.
Definition: IfxGtm_Tom_Dtm_PwmHl.c:285
IfxGtm_Tom_Dtm_PwmHl_initConfig
IFX_EXTERN void IfxGtm_Tom_Dtm_PwmHl_initConfig(IfxGtm_Tom_Dtm_PwmHl_Config *config)
Initialize the configuration structure to default.
Definition: IfxGtm_Tom_Dtm_PwmHl.c:273
IFXGTM_TOM_DTM_PWMHL_MAX_NUM_CHANNELS
#define IFXGTM_TOM_DTM_PWMHL_MAX_NUM_CHANNELS
Maximal number of channels handled by the driver. One channel has a top and bottom pwm output...
Definition: IfxGtm_Tom_Dtm_PwmHl.h:101
IfxGtm_Tom_Dtm_PwmHl_setPulse
IFX_EXTERN void IfxGtm_Tom_Dtm_PwmHl_setPulse(IfxGtm_TomDtm_PwmHl *driver, float32 *tOn, float32 *offset)
Sets the ON time and offset, all switched are independent.
Definition: IfxGtm_Tom_Dtm_PwmHl.c:391
IfxGtm_Tom_Dtm_PwmHl_Mode::updatePulse
IfxGtm_Tom_Dtm_PwmHl_UpdatePulse updatePulse
update pulse call back function for the selected mode
Definition: IfxGtm_Tom_Dtm_PwmHl.h:157
IfxGtm_Tom_Dtm_PwmHl_getDeadtimeTick
IFX_EXTERN Ifx_TickTime IfxGtm_Tom_Dtm_PwmHl_getDeadtimeTick(IfxGtm_TomDtm_PwmHl *driver)
Definition: IfxGtm_Tom_Dtm_PwmHl.c:291
IfxGtm_Tom_Dtm_PwmHl_Config
GTM TOM: PWM HL configuration.
Definition: IfxGtm_Tom_Dtm_PwmHl.h:138
float32
float float32
Definition: Platform_Types.h:170
IfxGtm_Tom_Dtm_PwmHl_setDeadtime
IFX_EXTERN boolean IfxGtm_Tom_Dtm_PwmHl_setDeadtime(IfxGtm_TomDtm_PwmHl *driver, float32 deadtime)
Sets the dead time.
Definition: IfxGtm_Tom_Dtm_PwmHl.c:309
IfxGtm_Tom_Dtm_PwmHl_Base
Multi-channels PWM object definition (channels only)
Definition: IfxGtm_Tom_Dtm_PwmHl.h:123
IfxGtm_Tom_Dtm_PwmHl_UpdateShift
void(* IfxGtm_Tom_Dtm_PwmHl_UpdateShift)(IfxGtm_TomDtm_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Definition: IfxGtm_Tom_Dtm_PwmHl.h:113
IfxGtm_Tom_Dtm_PwmHl_getMinPulse
IFX_EXTERN float32 IfxGtm_Tom_Dtm_PwmHl_getMinPulse(IfxGtm_TomDtm_PwmHl *driver)
Returns the minimum pulse.
Definition: IfxGtm_Tom_Dtm_PwmHl.c:297
IfxGtm_Tom_Dtm_PwmHl_s::dtmClockFreq
float32 dtmClockFreq
Deadtime module input clock frequency (cached value)
Definition: IfxGtm_Tom_Dtm_PwmHl.h:175
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:113
IfxGtm_Tom_Dtm_PwmHl_setMinPulse
IFX_EXTERN boolean IfxGtm_Tom_Dtm_PwmHl_setMinPulse(IfxGtm_TomDtm_PwmHl *driver, float32 minPulse)
Sets the minimum pulse.
Definition: IfxGtm_Tom_Dtm_PwmHl.c:332
IfxGtm_Tom_Dtm_PwmHl_stdIfPwmHlInit
IFX_EXTERN boolean IfxGtm_Tom_Dtm_PwmHl_stdIfPwmHlInit(IfxStdIf_PwmHl *stdif, IfxGtm_TomDtm_PwmHl *driver)
Initialises the statndard interface Pwm.
Definition: IfxGtm_Tom_Dtm_PwmHl.c:406
IfxGtm_Tom_Ch
IfxGtm_Tom_Ch
Enum for TOM channels.
Definition: IfxGtm_cfg.h:428
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxGtm_Tom_Dtm_PwmHl_Base::mode
Ifx_Pwm_Mode mode
actual PWM mode
Definition: IfxGtm_Tom_Dtm_PwmHl.h:128
IfxGtm_Tom_Dtm_PwmHl_Config::tom
IfxGtm_Tom tom
TOM unit used.
Definition: IfxGtm_Tom_Dtm_PwmHl.h:142
IfxGtm_Dtm.h
GTM basic functionality.
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxGtm_Tom_Dtm_PwmHl_getMode
IFX_EXTERN Ifx_Pwm_Mode IfxGtm_Tom_Dtm_PwmHl_getMode(IfxGtm_TomDtm_PwmHl *driver)
Returns Pwm mode.
Definition: IfxGtm_Tom_Dtm_PwmHl.c:303
IfxGtm_Tom_Dtm_PwmHl_Base::ccxActiveState
Ifx_ActiveState ccxActiveState
Top PWM active state.
Definition: IfxGtm_Tom_Dtm_PwmHl.h:130
IfxStdIf_PwmHl_Config
Multi-channels PWM object configuration.
Definition: IfxStdIf_PwmHl.h:200
Ifx_GTM_TOM_TGC
volatile struct IfxGtm_Tom_TGC Ifx_GTM_TOM_TGC
Definition: IfxGtm_cfg.h:233
IfxStdIf_PwmHl_
Standard interface object.
Definition: IfxStdIf_PwmHl.h:179
IfxGtm_Tom_Dtm_PwmHl_Config::coutx
IFX_CONST IfxGtm_Tom_ToutMapP * coutx
Pointer to an array of size pwmHl.channels.channelCount containing the channels used. Channels must be adjacent channels.
Definition: IfxGtm_Tom_Dtm_PwmHl.h:144
IfxGtm_Tom_Dtm_PwmHl_s::tgc
Ifx_GTM_TOM_TGC * tgc
TGC unit used.
Definition: IfxGtm_Tom_Dtm_PwmHl.h:170
IfxGtm_Tom_Dtm_PwmHl_Base::deadtime
Ifx_TimerValue deadtime
Dead time between the top and bottom channel in ticks.
Definition: IfxGtm_Tom_Dtm_PwmHl.h:125
IfxGtm_Tom_Dtm_PwmHl_s::dtm
Ifx_GTM_CDTM_DTM * dtm[IFXGTM_TOM_DTM_PWMHL_MAX_NUM_CHANNELS]
Dead time module (DTM) used. Matching the Tom.
Definition: IfxGtm_Tom_Dtm_PwmHl.h:173
IfxGtm_Tom_ToutMap
TOM TOUT pin mapping structure.
Definition: IfxGtm_PinMap.h:124
IfxGtm_Tom_Dtm_PwmHl_Mode::updateAndShift
IfxGtm_Tom_Dtm_PwmHl_UpdateShift updateAndShift
update shift call back function for the selected mode
Definition: IfxGtm_Tom_Dtm_PwmHl.h:156
IfxGtm_Tom_Dtm_PwmHl_s
GTM TOM PWM driver.
Definition: IfxGtm_Tom_Dtm_PwmHl.h:162
IfxGtm_Dtm_ClockSource
IfxGtm_Dtm_ClockSource
Clock source for DTM object Definition in IfxGTM.DTM[i].CTRL.B.CLKSEL ( i = 0 to 35) ...
Definition: IfxGtm_Dtm.h:70
IfxStdIf_PwmHl.h
Standard interface: Multi-channels, dual-complementary PWM interface.
IfxGtm_Tom_Dtm_PwmHl_init
IFX_EXTERN boolean IfxGtm_Tom_Dtm_PwmHl_init(IfxGtm_TomDtm_PwmHl *driver, const IfxGtm_Tom_Dtm_PwmHl_Config *config)
Initializes the timer object note : To ensure that the channels counter are reset by the timer and do...
Definition: IfxGtm_Tom_Dtm_PwmHl.c:159
IfxGtm_Tom_Dtm_PwmHl_Config::initPins
boolean initPins
TRUE: Initialize pins in driver, FALSE: Don&#39;t initialize pins in driver. User handles separately...
Definition: IfxGtm_Tom_Dtm_PwmHl.h:146
IfxGtm_Tom_Dtm_PwmHl_s::base
IfxGtm_Tom_Dtm_PwmHl_Base base
Multi-channels PWM object definition (channels only)
Definition: IfxGtm_Tom_Dtm_PwmHl.h:164
IfxGtm_Tom_Timer
TOM Timer interface Handle.
Definition: IfxGtm_Tom_Timer.h:161
IfxGtm_Tom_Dtm_PwmHl_Base::minPulse
Ifx_TimerValue minPulse
minimum pulse that is output, shorter pulse time will be output as 0% duty cycle
Definition: IfxGtm_Tom_Dtm_PwmHl.h:126
IfxGtm_Tom_Dtm_PwmHl_s::ccx
IfxGtm_Tom_Ch ccx[IFXGTM_TOM_DTM_PWMHL_MAX_NUM_CHANNELS]
TOM channels used for the CCCX outputs.
Definition: IfxGtm_Tom_Dtm_PwmHl.h:171
IfxGtm_Dtm_Ch
IfxGtm_Dtm_Ch
Enum for DTM channels.
Definition: IfxGtm_cfg.h:323
IfxGtm_Tom_Dtm_PwmHl_UpdatePulse
void(* IfxGtm_Tom_Dtm_PwmHl_UpdatePulse)(IfxGtm_TomDtm_PwmHl *driver, float32 *tOn, float32 *offset)
Definition: IfxGtm_Tom_Dtm_PwmHl.h:115
IfxGtm_Tom_Dtm_PwmHl_Mode::update
IfxGtm_Tom_Dtm_PwmHl_Update update
update call back function for the selected mode
Definition: IfxGtm_Tom_Dtm_PwmHl.h:155
IfxGtm_Tom_Dtm_PwmHl_s::dtmChannel
IfxGtm_Dtm_Ch dtmChannel[IFXGTM_TOM_DTM_PWMHL_MAX_NUM_CHANNELS]
DTM channel used.
Definition: IfxGtm_Tom_Dtm_PwmHl.h:174
IfxGtm_Tom_Dtm_PwmHl_Base::maxPulse
Ifx_TimerValue maxPulse
internal parameter
Definition: IfxGtm_Tom_Dtm_PwmHl.h:127
IfxGtm_Tom
IfxGtm_Tom
Enum for TOM objects.
Definition: IfxGtm_cfg.h:417
IfxGtm_Tom_Dtm_PwmHl_s::tom
Ifx_GTM_TOM * tom
TOM unit used.
Definition: IfxGtm_Tom_Dtm_PwmHl.h:169
IfxGtm_Tom_Dtm_PwmHl_Mode
Structure for PWM configuration.
Definition: IfxGtm_Tom_Dtm_PwmHl.h:151
IfxGtm_Tom_Dtm_PwmHl_setMode
IFX_EXTERN boolean IfxGtm_Tom_Dtm_PwmHl_setMode(IfxGtm_TomDtm_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate()
Definition: IfxGtm_Tom_Dtm_PwmHl.c:343
IfxGtm_Tom_Dtm_PwmHl_Update
void(* IfxGtm_Tom_Dtm_PwmHl_Update)(IfxGtm_TomDtm_PwmHl *driver, Ifx_TimerValue *tOn)
Definition: IfxGtm_Tom_Dtm_PwmHl.h:111
IfxGtm_Tom_Dtm_PwmHl_setupChannels
IFX_EXTERN void IfxGtm_Tom_Dtm_PwmHl_setupChannels(IfxGtm_TomDtm_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set up channels.
Definition: IfxGtm_Tom_Dtm_PwmHl.c:397
IfxGtm_Tom_Dtm_PwmHl_Base::coutxActiveState
Ifx_ActiveState coutxActiveState
Bottom PWM active state.
Definition: IfxGtm_Tom_Dtm_PwmHl.h:131
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
IfxGtm_Tom_Dtm_PwmHl_Config::base
IfxStdIf_PwmHl_Config base
PWM HL standard interface configuration.
Definition: IfxGtm_Tom_Dtm_PwmHl.h:140
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxGtm_Tom_Dtm_PwmHl_Config::deadTimeClock
IfxGtm_Dtm_ClockSource deadTimeClock
Clock used for the dead time generation.
Definition: IfxGtm_Tom_Dtm_PwmHl.h:145
sint8
signed char sint8
Definition: Platform_Types.h:125
IfxGtm_Tom_Dtm_PwmHl_Config::ccx
IFX_CONST IfxGtm_Tom_ToutMapP * ccx
Pointer to an array of size pwmHl.channels.channelCount containing the channels used. Channels must be adjacent channels.
Definition: IfxGtm_Tom_Dtm_PwmHl.h:143
IfxGtm_Tom_Dtm_PwmHl_Base::inverted
boolean inverted
Flag indicating the center aligned inverted mode (TRUE)
Definition: IfxGtm_Tom_Dtm_PwmHl.h:132
IfxGtm_Tom_Timer.h
GTM TIMER details.


iLLD_TC38A: IfxGtm_Tom_Pwm.c Source File

  • Gtm
  • Tom
  • Pwm
IfxGtm_Tom_Pwm.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Tom_Pwm.c
3 * \brief GTM PWM details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxGtm_Tom_Pwm.h"
47
48 /******************************************************************************/
49 /*-------------------------Function Implementations---------------------------*/
50 /******************************************************************************/
51
52 boolean IfxGtm_Tom_Pwm_init(IfxGtm_Tom_Pwm_Driver *driver, const IfxGtm_Tom_Pwm_Config *config)
53 {
54 boolean result = TRUE;
55
56 driver->gtm = config->gtm;
57 driver->tomIndex = config->tom;
58
59 Ifx_GTM_TOM *tomSFR = &config->gtm->TOM[config->tom];
60 driver->tom = tomSFR;
61 driver->tomChannel = config->tomChannel;
62 #if defined(IFXGTM_DTM_AVAILABLE)
63
64 IfxGtm_Dtm dtmIndex = IfxGtm_Dtm_getTomChannelDtmIndex(config->tom, config->timerChannel);
65 boolean dtmAvailable = FALSE;
66
67 if (dtmIndex != IfxGtm_Dtm_none)
68 {
69 driver->dtm = &config->gtm->CDTM.DTM[dtmIndex];
70 driver->dtmChannel = (IfxGtm_Dtm_Ch)(config->timerChannel % 4);
71 dtmAvailable = TRUE;
72 }
73 else
74 {
75 dtmAvailable = FALSE;
76 }
77
78 #endif
79
80 if (config->tomChannel <= 7)
81 {
82 driver->tgc[0] = IfxGtm_Tom_Ch_getTgcPointer(driver->tom, 0);
83 driver->tgc[1] = IfxGtm_Tom_Ch_getTgcPointer(driver->tom, 1);
84 }
85 else
86 {
87 driver->tgc[0] = IfxGtm_Tom_Ch_getTgcPointer(driver->tom, 1);
88 driver->tgc[1] = NULL_PTR; /* NOTE currently no concatenation between TOMs */
89 }
90
91 /* Initialize the timer part */
92 if (config->synchronousUpdateEnabled == 1)
93 {
94 IfxGtm_Tom_Tgc_enableChannelUpdate(driver->tgc[0], config->tomChannel, TRUE);
95 }
96
97 IfxGtm_Tom_Ch_setClockSource(tomSFR, config->tomChannel, config->clock);
98
99 IfxGtm_Tom_Tgc_setChannelForceUpdate(driver->tgc[0], config->tomChannel, TRUE, TRUE);
100
101 IfxGtm_Tom_Ch_setSignalLevel(tomSFR, config->tomChannel, config->signalLevel);
102
103 if (config->pin.outputPin != NULL_PTR)
104 {
105 IfxGtm_PinMap_setTomTout(config->pin.outputPin, config->pin.outputMode, config->pin.padDriver);
106 }
107
108 // enable and initialise interrupts if chosen
109 if ((config->interrupt.ccu0Enabled == 1) || (config->interrupt.ccu1Enabled == 1))
110 {
111 IfxGtm_Tom_Ch_setNotification(tomSFR, config->tomChannel, config->interrupt.mode, config->interrupt.ccu0Enabled, config->interrupt.ccu1Enabled);
112
113 volatile Ifx_SRC_SRCR *src;
114 src = IfxGtm_Tom_Ch_getSrcPointer(config->gtm, config->tom, config->tomChannel);
115 IfxSrc_init(src, config->interrupt.isrProvider, config->interrupt.isrPriority);
116 IfxSrc_enable(src);
117 }
118
119 if (config->synchronousUpdateEnabled == 1)
120 {
121 IfxGtm_Tom_Ch_setCompareZeroShadow(tomSFR, config->tomChannel, config->period);
122 IfxGtm_Tom_Ch_setCompareOneShadow(tomSFR, config->tomChannel, config->dutyCycle);
123 IfxGtm_Tom_Tgc_trigger(driver->tgc[0]);
124 }
125 else
126 {
127 IfxGtm_Tom_Ch_setCompareZero(tomSFR, config->tomChannel, config->period);
128 IfxGtm_Tom_Ch_setCompareOne(tomSFR, config->tomChannel, config->dutyCycle);
129 }
130
131 IfxGtm_Tom_Tgc_enableChannel(driver->tgc[0], config->tomChannel, TRUE, FALSE);
132 IfxGtm_Tom_Tgc_enableChannelOutput(driver->tgc[0], config->tomChannel, TRUE, FALSE);
133
134 if (config->immediateStartEnabled == TRUE)
135 {
136 IfxGtm_Tom_Tgc_trigger(driver->tgc[0]);
137 }
138
139 #if defined(IFXGTM_DTM_AVAILABLE)
140
141 if (dtmAvailable)
142 {
143 // bypassing the DTM functionality
144 IfxGtm_Dtm_setClockSource(driver->dtm, config->dtmClockSource);
145 IfxGtm_Dtm_setOutput0DeadTimePath(driver->dtm, driver->dtmChannel, IfxGtm_Dtm_DeadTimePath_feedThrough);
146
147 IfxGtm_Dtm_setOutput1Select(driver->dtm, driver->dtmChannel, IfxGtm_Dtm_Output1Select_specialFunction);
148 IfxGtm_Dtm_setOutput1Function(driver->dtm, driver->dtmChannel, IfxGtm_Dtm_Output1Function_dtmInputSignal);
149 IfxGtm_Dtm_setOutput1DeadTimePath(driver->dtm, driver->dtmChannel, IfxGtm_Dtm_DeadTimePath_enable);
150 }
151
152 #endif
153 return result;
154 }
155
156
157 void IfxGtm_Tom_Pwm_initConfig(IfxGtm_Tom_Pwm_Config *config, Ifx_GTM *gtm)
158 {
159 config->gtm = gtm;
160 config->tom = IfxGtm_Tom_0;
161 config->tomChannel = IfxGtm_Tom_Ch_0;
162 config->clock = IfxGtm_Tom_Ch_ClkSrc_cmuFxclk0;
163 config->period = 20;
164 config->dutyCycle = 10;
165 config->signalLevel = Ifx_ActiveState_high;
166 config->oneShotModeEnabled = FALSE;
167 config->synchronousUpdateEnabled = FALSE;
168 config->immediateStartEnabled = TRUE;
169 config->interrupt.ccu0Enabled = FALSE;
170 config->interrupt.ccu1Enabled = FALSE;
171 config->interrupt.mode = IfxGtm_IrqMode_pulseNotify;
172 config->interrupt.isrProvider = IfxSrc_Tos_cpu0;
173 config->interrupt.isrPriority = 0;
174 config->pin.outputPin = NULL_PTR;
175 config->pin.outputMode = IfxPort_OutputMode_pushPull;
176 config->pin.padDriver = IfxPort_PadDriver_cmosAutomotiveSpeed1;
177
178 #if defined(IFXGTM_DTM_AVAILABLE)
179 config->dtmClockSource = IfxGtm_Dtm_ClockSource_cmuClock1;
180 #endif
181 }
182
183
184 void IfxGtm_Tom_Pwm_start(IfxGtm_Tom_Pwm_Driver *driver, boolean immediate)
185 {
186 /* Enable channel if not enabled already */
187 IfxGtm_Tom_Tgc_enableChannel(driver->tgc[0], driver->tomChannel, TRUE, immediate);
188 IfxGtm_Tom_Tgc_enableChannelOutput(driver->tgc[0], driver->tomChannel, TRUE, immediate);
189
190 /* Trigger the start now */
191 IfxGtm_Tom_Tgc_trigger(driver->tgc[0]);
192 }
193
194
195 void IfxGtm_Tom_Pwm_stop(IfxGtm_Tom_Pwm_Driver *driver, boolean immediate)
196 {
197 /* Disable channels */
198 IfxGtm_Tom_Tgc_enableChannel(driver->tgc[0], driver->tomChannel, FALSE, immediate);
199 IfxGtm_Tom_Tgc_enableChannelOutput(driver->tgc[0], driver->tomChannel, FALSE, immediate);
200
201 /* Trigger the stop now */
202 IfxGtm_Tom_Tgc_trigger(driver->tgc[0]);
203 }
Ifx_ActiveState_high
The signal is high active.
Definition: Ifx_Types.h:116
IfxGtm_Tom_Pwm_Config::dtmClockSource
IfxGtm_Dtm_ClockSource dtmClockSource
DTM clock source.
Definition: IfxGtm_Tom_Pwm.h:171
IfxGtm_Tom_Pwm_initConfig
void IfxGtm_Tom_Pwm_initConfig(IfxGtm_Tom_Pwm_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default.
Definition: IfxGtm_Tom_Pwm.c:157
IfxGtm_Dtm_none
No DTM object.
Definition: IfxGtm_cfg.h:312
IfxGtm_Dtm_Output1Select_specialFunction
Special Function as selected by O1Fx (x = 0 to 3)
Definition: IfxGtm_Dtm.h:95
IfxGtm_Dtm_setOutput1Function
IFX_INLINE void IfxGtm_Dtm_setOutput1Function(Ifx_GTM_CDTM_DTM *dtm, IfxGtm_Dtm_Ch channel, IfxGtm_Dtm_Output1Function output1Function)
Sets the Output Function for DTM channel.
Definition: IfxGtm_Dtm.h:236
IfxGtm_Tom_Pwm_Driver::tgc
Ifx_GTM_TOM_TGC * tgc[2]
Pointer to the TGC object.
Definition: IfxGtm_Tom_Pwm.h:186
IfxPort_OutputMode_pushPull
Definition: IfxPort.h:142
IfxGtm_Tom_Pwm_start
void IfxGtm_Tom_Pwm_start(IfxGtm_Tom_Pwm_Driver *driver, boolean immediate)
starts the PWM generation from the configured channel
Definition: IfxGtm_Tom_Pwm.c:184
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk0
div 1
Definition: IfxGtm_Tom.h:85
IfxGtm_PinMap_setTomTout
void IfxGtm_PinMap_setTomTout(IfxGtm_Tom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Definition: IfxGtm_PinMap.c:2420
IfxGtm_Tom_Ch_setSignalLevel
void IfxGtm_Tom_Ch_setSignalLevel(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, Ifx_ActiveState activeState)
Sets the signal level.
Definition: IfxGtm_Tom.c:329
IfxGtm_Dtm_Output1Function_dtmInputSignal
DTM Input Signal DTM[i]_INx_T (i = 0 to 35 and x = 0 to 3)
Definition: IfxGtm_Dtm.h:86
IfxGtm_Tom_Ch_getTgcPointer
Ifx_GTM_TOM_TGC * IfxGtm_Tom_Ch_getTgcPointer(Ifx_GTM_TOM *tom, uint32 tgcIndex)
Returns the TGC pointer.
Definition: IfxGtm_Tom.c:153
IfxGtm_Tom_Pwm_pin::outputPin
IfxGtm_Tom_ToutMap * outputPin
output pin
Definition: IfxGtm_Tom_Pwm.h:152
IfxGtm_Tom_Ch_setNotification
void IfxGtm_Tom_Ch_setNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne)
Sets the channel notification.
Definition: IfxGtm_Tom.c:286
IfxGtm_Tom_Pwm_Interrupt::ccu1Enabled
boolean ccu1Enabled
Enable/Disable choice for CCU1 trigger interrupt.
Definition: IfxGtm_Tom_Pwm.h:140
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
IfxGtm_Dtm_setOutput1Select
IFX_INLINE void IfxGtm_Dtm_setOutput1Select(Ifx_GTM_CDTM_DTM *dtm, IfxGtm_Dtm_Ch channel, IfxGtm_Dtm_Output1Select output1Select)
Sets the Output Selection for DTM channel.
Definition: IfxGtm_Dtm.h:245
IfxGtm_Tom_Pwm_Config::signalLevel
Ifx_ActiveState signalLevel
Signal Level.
Definition: IfxGtm_Tom_Pwm.h:169
IfxGtm_Dtm_setOutput0DeadTimePath
IFX_INLINE void IfxGtm_Dtm_setOutput0DeadTimePath(Ifx_GTM_CDTM_DTM *dtm, IfxGtm_Dtm_Ch channel, IfxGtm_Dtm_DeadTimePath deadTimePath)
Sets the Output 0 Dead Time Path for DTM channel.
Definition: IfxGtm_Dtm.h:218
IfxGtm_Tom_Pwm_Driver::tomIndex
IfxGtm_Tom tomIndex
Index of the TOM object used.
Definition: IfxGtm_Tom_Pwm.h:183
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxGtm_Tom_Tgc_setChannelForceUpdate
void IfxGtm_Tom_Tgc_setChannelForceUpdate(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean resetEnabled)
Enable/disable one channel for update (FUPD)
Definition: IfxGtm_Tom.c:519
IfxGtm_Tom_Pwm_Config::interrupt
IfxGtm_Tom_Pwm_Interrupt interrupt
configuration structure for interrupt
Definition: IfxGtm_Tom_Pwm.h:173
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxGtm_Tom_Pwm_Driver
Driver Handle.
Definition: IfxGtm_Tom_Pwm.h:180
IfxGtm_Tom_Pwm_Config::tom
IfxGtm_Tom tom
Index of the TOM object used.
Definition: IfxGtm_Tom_Pwm.h:164
IfxGtm_Tom_Pwm_stop
void IfxGtm_Tom_Pwm_stop(IfxGtm_Tom_Pwm_Driver *driver, boolean immediate)
Stops the PWM generation from the configured channel.
Definition: IfxGtm_Tom_Pwm.c:195
IfxGtm_Tom_Ch_setCompareZero
void IfxGtm_Tom_Ch_setCompareZero(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareZero)
Sets the compare 0 value.
Definition: IfxGtm_Tom.c:251
IfxGtm_Tom_Pwm_Interrupt::ccu0Enabled
boolean ccu0Enabled
Enable/Disable choice for CCU0 trigger interrupt.
Definition: IfxGtm_Tom_Pwm.h:139
IfxPort_PadDriver_cmosAutomotiveSpeed1
Speed grade 1.
Definition: IfxPort.h:153
IfxGtm_Tom_Pwm.h
GTM PWM details.
IfxGtm_Tom_Pwm_Config::oneShotModeEnabled
boolean oneShotModeEnabled
Enable/Disable the one shot mode.
Definition: IfxGtm_Tom_Pwm.h:170
IfxGtm_Tom_Pwm_Interrupt::mode
IfxGtm_IrqMode mode
IRQ mode of interrupt.
Definition: IfxGtm_Tom_Pwm.h:141
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:68
IfxGtm_Tom_Pwm_init
boolean IfxGtm_Tom_Pwm_init(IfxGtm_Tom_Pwm_Driver *driver, const IfxGtm_Tom_Pwm_Config *config)
Initialises the Timer object.
Definition: IfxGtm_Tom_Pwm.c:52
IfxGtm_Dtm_setOutput1DeadTimePath
IFX_INLINE void IfxGtm_Dtm_setOutput1DeadTimePath(Ifx_GTM_CDTM_DTM *dtm, IfxGtm_Dtm_Ch channel, IfxGtm_Dtm_DeadTimePath deadTimePath)
Sets the Output 1 Dead Time Path for DTM channel.
Definition: IfxGtm_Dtm.h:227
IfxGtm_Tom_Tgc_trigger
void IfxGtm_Tom_Tgc_trigger(Ifx_GTM_TOM_TGC *tgc)
Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG)
Definition: IfxGtm_Tom.c:552
IfxGtm_Dtm_setClockSource
IFX_INLINE void IfxGtm_Dtm_setClockSource(Ifx_GTM_CDTM_DTM *dtm, IfxGtm_Dtm_ClockSource clockSource)
Sets the clock source for DTM object.
Definition: IfxGtm_Dtm.h:212
IfxGtm_Dtm_ClockSource_cmuClock1
CMU_CLK1 (if DTM is connected to ATOM) or CMU_FXCLK0 (if DTM is connected to TOM) as clock source...
Definition: IfxGtm_Dtm.h:74
IfxGtm_Tom_Pwm_pin::padDriver
IfxPort_PadDriver padDriver
Pad driver.
Definition: IfxGtm_Tom_Pwm.h:154
IfxGtm_Tom_Ch_getSrcPointer
volatile Ifx_SRC_SRCR * IfxGtm_Tom_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Tom tom, IfxGtm_Tom_Ch channel)
Returns a pointer to the TOM channel SRC.
Definition: IfxGtm_Tom.c:146
IfxGtm_Tom_Pwm_Config::dutyCycle
uint32 dutyCycle
Duty Cycle.
Definition: IfxGtm_Tom_Pwm.h:168
IfxGtm_Tom_Pwm_Config::pin
IfxGtm_Tom_Pwm_pin pin
configuration structure for output pin
Definition: IfxGtm_Tom_Pwm.h:174
IfxGtm_Tom_Pwm_Driver::tomChannel
IfxGtm_Tom_Ch tomChannel
TOM channel used for the timer.
Definition: IfxGtm_Tom_Pwm.h:184
IfxGtm_Tom_Pwm_Config::immediateStartEnabled
boolean immediateStartEnabled
enable/disable immediate start of PWM
Definition: IfxGtm_Tom_Pwm.h:175
IfxGtm_IrqMode_pulseNotify
Definition: IfxGtm.h:68
IfxGtm_Tom_Ch_setCompareOneShadow
void IfxGtm_Tom_Ch_setCompareOneShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowOne)
Sets the compare 1 shadow value.
Definition: IfxGtm_Tom.c:234
IfxGtm_Dtm_Ch
IfxGtm_Dtm_Ch
Enum for DTM channels.
Definition: IfxGtm_cfg.h:323
IfxGtm_Tom_Tgc_enableChannelUpdate
void IfxGtm_Tom_Tgc_enableChannelUpdate(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable one channel for update (UPEN)
Definition: IfxGtm_Tom.c:440
IfxGtm_Tom_Ch_0
TOM channel 0.
Definition: IfxGtm_cfg.h:431
IfxGtm_Tom_Pwm_Driver::tom
Ifx_GTM_TOM * tom
Pointer to the TOM object.
Definition: IfxGtm_Tom_Pwm.h:185
IfxGtm_Tom_Pwm_Config
Configuration structure.
Definition: IfxGtm_Tom_Pwm.h:161
IfxGtm_Tom_Ch_setClockSource
void IfxGtm_Tom_Ch_setClockSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ClkSrc clock)
Sets the channel clock source.
Definition: IfxGtm_Tom.c:209
IfxGtm_Tom_Ch_setCompareOne
void IfxGtm_Tom_Ch_setCompareOne(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareOne)
Sets the compare 1 value.
Definition: IfxGtm_Tom.c:226
IfxGtm_Tom_Pwm_Config::clock
IfxGtm_Tom_Ch_ClkSrc clock
Timer input clock.
Definition: IfxGtm_Tom_Pwm.h:166
IfxGtm_Dtm_DeadTimePath_feedThrough
Feed through from DTM input to output (DTM[i]_INx to DTM[i]_OUTx (i = 0 to 35 and x = 0 to 4) ...
Definition: IfxGtm_Dtm.h:105
IfxGtm_Tom_Pwm_Driver::gtm
Ifx_GTM * gtm
Pointer to GTM module.
Definition: IfxGtm_Tom_Pwm.h:182
IfxGtm_Tom_Pwm_Interrupt::isrPriority
Ifx_Priority isrPriority
Priority for Ccu0/1 interrupt.
Definition: IfxGtm_Tom_Pwm.h:143
IfxGtm_Tom_0
TOM object 0.
Definition: IfxGtm_cfg.h:419
IfxGtm_Tom_Tgc_enableChannelOutput
void IfxGtm_Tom_Tgc_enableChannelOutput(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel output (OUTEN)
Definition: IfxGtm_Tom.c:422
IfxGtm_Dtm_DeadTimePath_enable
Dead Time Path enabled.
Definition: IfxGtm_Dtm.h:106
IfxGtm_Tom_Pwm_Interrupt::isrProvider
IfxSrc_Tos isrProvider
Type of Service for Ccu0/1 interrupt.
Definition: IfxGtm_Tom_Pwm.h:142
IfxGtm_Dtm
IfxGtm_Dtm
Enum for DTM objects.
Definition: IfxGtm_cfg.h:310
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxGtm_Tom_Pwm_Config::period
uint32 period
Period.
Definition: IfxGtm_Tom_Pwm.h:167
IfxGtm_Tom_Ch_setCompareZeroShadow
void IfxGtm_Tom_Ch_setCompareZeroShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero)
Sets the compare 0 shadow value.
Definition: IfxGtm_Tom.c:259
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxGtm_Tom_Pwm_Config::synchronousUpdateEnabled
boolean synchronousUpdateEnabled
Synchronous or Asynchronous update.
Definition: IfxGtm_Tom_Pwm.h:172
IfxGtm_Tom_Pwm_pin::outputMode
IfxPort_OutputMode outputMode
Output mode.
Definition: IfxGtm_Tom_Pwm.h:153
IfxGtm_Tom_Tgc_enableChannel
void IfxGtm_Tom_Tgc_enableChannel(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel (ENDIS)
Definition: IfxGtm_Tom.c:404


iLLD_TC38A: IfxGtm_Tom_Pwm.h Source File

  • Gtm
  • Tom
  • Pwm
IfxGtm_Tom_Pwm.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Tom_Pwm.h
3 * \brief GTM PWM details
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Gtm_Tom_Pwm_Usage How to use the GTM TOM PWM Driver
42 * \ingroup IfxLld_Gtm_Tom_Pwm
43 *
44 * This interface allows to generate simple PWM signal on a TOM out put and can generate interrupts if enabled.
45 * this output can also be routed to port pin if required.
46 *
47 * \section Preparation Preparation
48 * \subsection Include Include Files
49 *
50 * Include following header file into your C code:
51 * \code
52 * #include <Gtm/Tom/Pwm/IfxGtm_Tom_Pwm.h>
53 * \endcode
54 *
55 * \subsection Variables Variables
56 * define global variables if necessary
57 *
58 * \code
59 * Ifx_GTM *gtm = &MODULE_GTM;
60 * #define TOM0_CH0_PRIO 10
61 * \endcode
62 *
63 * \subsection Interrupts Interrupts
64 * define Interrupts if needed
65 *
66 * \code
67 * IFX_INTERRUPT(TOM0Ch0_ISR, 0, TOM0_CH0_PRIO)
68 * {}
69 * \endcode
70 *
71 * \subsection Initialization Initialization
72 *
73 * \code
74 * // install interrupt handlers
75 * IfxCpu_Irq_installInterruptHandler (TOM0Ch0_ISR, TOM0_CH0_PRIO);
76 *
77 * // enable GTM clock
78 * {
79 * float32 frequency = IfxGtm_Cmu_getModuleFrequency(gtm);
80 * // Enables the GTM
81 * IfxGtm_enable(gtm);
82 * // Set the global clock frequency to the max
83 * IfxGtm_Cmu_setGclkFrequency(gtm, frequency);
84 * // Set the CMU CLK0
85 * IfxGtm_Cmu_setClkFrequency(gtm, IfxGtm_Cmu_Clk_0, frequency);
86 * // FXCLK: used by TOM and CLK0: used by ATOM
87 * IfxGtm_Cmu_enableClocks(gtm, IFXGTM_CMU_CLKEN_FXCLK | IFXGTM_CMU_CLKEN_CLK0);
88 * }
89 *
90 * // initialise TOM
91 * IfxGtm_Tom_Pwm_Config tomConfig; \\configuration structure
92 * IfxGtm_Tom_Pwm_Driver tomHandle; \\ handle
93 *
94 * IfxGtm_Tom_Pwm_initConfig(&tomConfig, gtm);
95 *
96 * tomConfig.tomChannel = IfxGtm_Tom_Ch_0;
97 * tomConfig.period = 20;
98 * tomConfig.dutyCycle = 10;
99 * tomConfig.interrupt.ccu0Enabled = TRUE;
100 * tomConfig.interrupt.isrPriority = TOM0_CH0_PRIO;
101 * tomConfig.pin.outputPin = &IfxGtm_TOM0_0_TOUT106_P10_4_OUT;
102 *
103 * IfxGtm_Tom_Pwm_init(&tomHandle, &tomConfig);
104 * \endcode
105 *
106 * TOM will be now generating a PWM signal on the selected port pin while generating selected interrupt according to above configured period and duty cycle.
107 *
108 * \defgroup IfxLld_Gtm_Tom_Pwm TOM PWM Interface Driver
109 * \ingroup IfxLld_Gtm_Tom
110 * \defgroup IfxLld_Gtm_Tom_Pwm_DataStructures TOM PWM DataStructures
111 * \ingroup IfxLld_Gtm_Tom_Pwm
112 * \defgroup IfxLld_Gtm_Tom_Pwm_Pwm_Functions Pwm Functions
113 * \ingroup IfxLld_Gtm_Tom_Pwm
114 */
115
116 #ifndef IFXGTM_TOM_PWM_H
117 #define IFXGTM_TOM_PWM_H 1
118
119 /******************************************************************************/
120 /*----------------------------------Includes----------------------------------*/
121 /******************************************************************************/
122
123 #include "_PinMap/IfxGtm_PinMap.h"
124 #include "Gtm/Std/IfxGtm_Tom.h"
125 #include "Gtm/Std/IfxGtm_Cmu.h"
126 #include "Gtm/Std/IfxGtm_Dtm.h"
127 #include "Cpu/Std/IfxCpu.h"
128
129 /******************************************************************************/
130 /*-----------------------------Data Structures--------------------------------*/
131 /******************************************************************************/
132
133 /** \addtogroup IfxLld_Gtm_Tom_Pwm_DataStructures
134 * \{ */
135 /** \brief configuration structure for interrupts
136 */
137 typedef struct
138 {
139 boolean ccu0Enabled; /**< \brief Enable/Disable choice for CCU0 trigger interrupt */
140 boolean ccu1Enabled; /**< \brief Enable/Disable choice for CCU1 trigger interrupt */
141 IfxGtm_IrqMode mode; /**< \brief IRQ mode of interrupt */
142 IfxSrc_Tos isrProvider; /**< \brief Type of Service for Ccu0/1 interrupt */
143 Ifx_Priority isrPriority; /**< \brief Priority for Ccu0/1 interrupt */
144 } IfxGtm_Tom_Pwm_Interrupt;
145
146 /** \} */
147
148 /** \brief configuration structure for output pin
149 */
150 typedef struct
151 {
152 IfxGtm_Tom_ToutMap *outputPin; /**< \brief output pin */
153 IfxPort_OutputMode outputMode; /**< \brief Output mode */
154 IfxPort_PadDriver padDriver; /**< \brief Pad driver */
155 } IfxGtm_Tom_Pwm_pin;
156
157 /** \addtogroup IfxLld_Gtm_Tom_Pwm_DataStructures
158 * \{ */
159 /** \brief Configuration structure
160 */
161 typedef struct
162 {
163 Ifx_GTM *gtm; /**< \brief Pointer to GTM module */
164 IfxGtm_Tom tom; /**< \brief Index of the TOM object used */
165 IfxGtm_Tom_Ch tomChannel; /**< \brief TOM channel used for the timer */
166 IfxGtm_Tom_Ch_ClkSrc clock; /**< \brief Timer input clock */
167 uint32 period; /**< \brief Period */
168 uint32 dutyCycle; /**< \brief Duty Cycle */
169 Ifx_ActiveState signalLevel; /**< \brief Signal Level */
170 boolean oneShotModeEnabled; /**< \brief Enable/Disable the one shot mode */
171 IfxGtm_Dtm_ClockSource dtmClockSource; /**< \brief DTM clock source */
172 boolean synchronousUpdateEnabled; /**< \brief Synchronous or Asynchronous update */
173 IfxGtm_Tom_Pwm_Interrupt interrupt; /**< \brief configuration structure for interrupt */
174 IfxGtm_Tom_Pwm_pin pin; /**< \brief configuration structure for output pin */
175 boolean immediateStartEnabled; /**< \brief enable/disable immediate start of PWM */
176 } IfxGtm_Tom_Pwm_Config;
177
178 /** \brief Driver Handle
179 */
180 typedef struct
181 {
182 Ifx_GTM *gtm; /**< \brief Pointer to GTM module */
183 IfxGtm_Tom tomIndex; /**< \brief Index of the TOM object used */
184 IfxGtm_Tom_Ch tomChannel; /**< \brief TOM channel used for the timer */
185 Ifx_GTM_TOM *tom; /**< \brief Pointer to the TOM object */
186 Ifx_GTM_TOM_TGC *tgc[2]; /**< \brief Pointer to the TGC object */
187 } IfxGtm_Tom_Pwm_Driver;
188
189 /** \} */
190
191 /** \addtogroup IfxLld_Gtm_Tom_Pwm_Pwm_Functions
192 * \{ */
193
194 /******************************************************************************/
195 /*-------------------------Global Function Prototypes-------------------------*/
196 /******************************************************************************/
197
198 /** \brief Initialises the Timer object
199 * \param driver TOM Handle
200 * \param config Configuration structure for TOM Timer
201 * \return TRUE on success else FALSE
202 */
203 IFX_EXTERN boolean IfxGtm_Tom_Pwm_init(IfxGtm_Tom_Pwm_Driver *driver, const IfxGtm_Tom_Pwm_Config *config);
204
205 /** \brief Initializes the configuration structure to default
206 * \param config This parameter is Initialised by the function
207 * \param gtm Pointer to GTM module
208 * \return None
209 */
210 IFX_EXTERN void IfxGtm_Tom_Pwm_initConfig(IfxGtm_Tom_Pwm_Config *config, Ifx_GTM *gtm);
211
212 /** \} */
213
214 /******************************************************************************/
215 /*-------------------------Global Function Prototypes-------------------------*/
216 /******************************************************************************/
217
218 /** \brief starts the PWM generation from the configured channel
219 * \param driver handle for the PWM device
220 * \param immediate immediate start or not
221 * \return None
222 */
223 IFX_EXTERN void IfxGtm_Tom_Pwm_start(IfxGtm_Tom_Pwm_Driver *driver, boolean immediate);
224
225 /** \brief Stops the PWM generation from the configured channel
226 * \param driver handle for the PWM device
227 * \param immediate immediate start or not.
228 * \return None
229 */
230 IFX_EXTERN void IfxGtm_Tom_Pwm_stop(IfxGtm_Tom_Pwm_Driver *driver, boolean immediate);
231
232 #endif /* IFXGTM_TOM_PWM_H */
IfxGtm_Tom_Pwm_Config::dtmClockSource
IfxGtm_Dtm_ClockSource dtmClockSource
DTM clock source.
Definition: IfxGtm_Tom_Pwm.h:171
IfxGtm_Tom_Pwm_initConfig
IFX_EXTERN void IfxGtm_Tom_Pwm_initConfig(IfxGtm_Tom_Pwm_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default.
Definition: IfxGtm_Tom_Pwm.c:157
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:100
IfxGtm_Tom_Pwm_stop
IFX_EXTERN void IfxGtm_Tom_Pwm_stop(IfxGtm_Tom_Pwm_Driver *driver, boolean immediate)
Stops the PWM generation from the configured channel.
Definition: IfxGtm_Tom_Pwm.c:195
IfxGtm_Tom_Pwm_Interrupt
configuration structure for interrupts
Definition: IfxGtm_Tom_Pwm.h:137
IfxGtm_Tom_Pwm_pin::outputPin
IfxGtm_Tom_ToutMap * outputPin
output pin
Definition: IfxGtm_Tom_Pwm.h:152
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:140
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxGtm_Tom_Pwm_Interrupt::ccu1Enabled
boolean ccu1Enabled
Enable/Disable choice for CCU1 trigger interrupt.
Definition: IfxGtm_Tom_Pwm.h:140
IfxGtm_PinMap.h
GTM I/O map.
IfxGtm_Tom_Pwm_Config::signalLevel
Ifx_ActiveState signalLevel
Signal Level.
Definition: IfxGtm_Tom_Pwm.h:169
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:113
IfxGtm_Tom_Pwm_Driver::tomIndex
IfxGtm_Tom tomIndex
Index of the TOM object used.
Definition: IfxGtm_Tom_Pwm.h:183
IfxGtm_Tom_Pwm_pin
configuration structure for output pin
Definition: IfxGtm_Tom_Pwm.h:150
IfxGtm_Tom_Pwm_Config::interrupt
IfxGtm_Tom_Pwm_Interrupt interrupt
configuration structure for interrupt
Definition: IfxGtm_Tom_Pwm.h:173
IfxGtm_Tom_Ch
IfxGtm_Tom_Ch
Enum for TOM channels.
Definition: IfxGtm_cfg.h:428
IfxGtm_Tom_Pwm_Driver
Driver Handle.
Definition: IfxGtm_Tom_Pwm.h:180
IfxGtm_Tom_Pwm_Config::tom
IfxGtm_Tom tom
Index of the TOM object used.
Definition: IfxGtm_Tom_Pwm.h:164
IfxGtm_Tom_Pwm_Interrupt::ccu0Enabled
boolean ccu0Enabled
Enable/Disable choice for CCU0 trigger interrupt.
Definition: IfxGtm_Tom_Pwm.h:139
IfxGtm_Dtm.h
GTM basic functionality.
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxGtm_Tom_Pwm_Config::oneShotModeEnabled
boolean oneShotModeEnabled
Enable/Disable the one shot mode.
Definition: IfxGtm_Tom_Pwm.h:170
Ifx_GTM_TOM_TGC
volatile struct IfxGtm_Tom_TGC Ifx_GTM_TOM_TGC
Definition: IfxGtm_cfg.h:233
IfxGtm_Tom_Pwm_Interrupt::mode
IfxGtm_IrqMode mode
IRQ mode of interrupt.
Definition: IfxGtm_Tom_Pwm.h:141
IfxGtm_Tom_ToutMap
TOM TOUT pin mapping structure.
Definition: IfxGtm_PinMap.h:124
IfxGtm_Tom_Pwm_init
IFX_EXTERN boolean IfxGtm_Tom_Pwm_init(IfxGtm_Tom_Pwm_Driver *driver, const IfxGtm_Tom_Pwm_Config *config)
Initialises the Timer object.
Definition: IfxGtm_Tom_Pwm.c:52
IfxGtm_Dtm_ClockSource
IfxGtm_Dtm_ClockSource
Clock source for DTM object Definition in IfxGTM.DTM[i].CTRL.B.CLKSEL ( i = 0 to 35) ...
Definition: IfxGtm_Dtm.h:70
IfxGtm_Tom_Pwm_pin::padDriver
IfxPort_PadDriver padDriver
Pad driver.
Definition: IfxGtm_Tom_Pwm.h:154
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:151
IfxGtm_Tom_Pwm_Config::dutyCycle
uint32 dutyCycle
Duty Cycle.
Definition: IfxGtm_Tom_Pwm.h:168
IfxGtm_Tom_Pwm_Config::pin
IfxGtm_Tom_Pwm_pin pin
configuration structure for output pin
Definition: IfxGtm_Tom_Pwm.h:174
IfxGtm_Tom_Pwm_Config::tomChannel
IfxGtm_Tom_Ch tomChannel
TOM channel used for the timer.
Definition: IfxGtm_Tom_Pwm.h:165
IfxGtm_Tom_Pwm_Config::immediateStartEnabled
boolean immediateStartEnabled
enable/disable immediate start of PWM
Definition: IfxGtm_Tom_Pwm.h:175
IfxCpu.h
CPU basic functionality.
IfxGtm_Tom_Pwm_Driver::tom
Ifx_GTM_TOM * tom
Pointer to the TOM object.
Definition: IfxGtm_Tom_Pwm.h:185
IfxGtm_Tom_Pwm_Config
Configuration structure.
Definition: IfxGtm_Tom_Pwm.h:161
IfxGtm_Tom
IfxGtm_Tom
Enum for TOM objects.
Definition: IfxGtm_cfg.h:417
IfxGtm_Tom_Pwm_start
IFX_EXTERN void IfxGtm_Tom_Pwm_start(IfxGtm_Tom_Pwm_Driver *driver, boolean immediate)
starts the PWM generation from the configured channel
Definition: IfxGtm_Tom_Pwm.c:184
IfxGtm_Tom_Pwm_Config::clock
IfxGtm_Tom_Ch_ClkSrc clock
Timer input clock.
Definition: IfxGtm_Tom_Pwm.h:166
IfxGtm_Tom_Pwm_Config::gtm
Ifx_GTM * gtm
Pointer to GTM module.
Definition: IfxGtm_Tom_Pwm.h:163
IfxGtm_Tom_Pwm_Interrupt::isrPriority
Ifx_Priority isrPriority
Priority for Ccu0/1 interrupt.
Definition: IfxGtm_Tom_Pwm.h:143
IfxGtm_IrqMode
IfxGtm_IrqMode
Enum for GTM interrupt modes.
Definition: IfxGtm.h:64
IfxGtm_Cmu.h
GTM basic functionality.
IfxGtm_Tom_Pwm_Interrupt::isrProvider
IfxSrc_Tos isrProvider
Type of Service for Ccu0/1 interrupt.
Definition: IfxGtm_Tom_Pwm.h:142
IfxGtm_Tom_Pwm_Config::period
uint32 period
Period.
Definition: IfxGtm_Tom_Pwm.h:167
IfxGtm_Tom_Ch_ClkSrc
IfxGtm_Tom_Ch_ClkSrc
Clock source for the TOM channels.
Definition: IfxGtm_Tom.h:83
IfxGtm_Tom_Pwm_Config::synchronousUpdateEnabled
boolean synchronousUpdateEnabled
Synchronous or Asynchronous update.
Definition: IfxGtm_Tom_Pwm.h:172
IfxGtm_Tom.h
GTM basic functionality.
IfxGtm_Tom_Pwm_pin::outputMode
IfxPort_OutputMode outputMode
Output mode.
Definition: IfxGtm_Tom_Pwm.h:153


iLLD_TC38A: IfxGtm_Tom_PwmHl.c Source File

  • Gtm
  • Tom
  • PwmHl
IfxGtm_Tom_PwmHl.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Tom_PwmHl.c
3 * \brief GTM PWMHL details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxGtm_Tom_PwmHl.h"
47 #include "_Utilities/Ifx_Assert.h"
48 #include "stddef.h"
49 #include "string.h"
50
51 /** \addtogroup IfxLld_Gtm_Tom_PwmHl_PwmHl_StdIf_Functions
52 * \{ */
53 /******************************************************************************/
54 /*------------------------Inline Function Prototypes--------------------------*/
55 /******************************************************************************/
56
57 /** \brief Inverts the active state
58 * \param activeState Active state
59 * \return State
60 */
61 IFX_INLINE Ifx_ActiveState IfxGtm_Tom_PwmHl_invertActiveState(Ifx_ActiveState activeState);
62
63 /******************************************************************************/
64 /*-----------------------Private Function Prototypes--------------------------*/
65 /******************************************************************************/
66
67 /** \brief Sets switched to OFF
68 * \param driver GTM TOM PWM driver
69 * \param tOn ON time
70 * \param shift Shift value in ticks
71 * \return None
72 */
73 IFX_STATIC void IfxGtm_Tom_PwmHl_updateAndShiftOff(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift);
74
75 /** \brief Updates the x output duty cycle in center aligned and center aligned inverted modes
76 * \param driver GTM TOM PWM driver
77 * \param tOn T on
78 * \return None
79 */
80 IFX_STATIC void IfxGtm_Tom_PwmHl_updateCenterAligned(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn);
81
82 /** \brief Updates the x output duty cycle in edge aligned modes (left and right aligned)
83 * \param driver GTM TOM PWM driver
84 * \param tOn T on
85 * \return None
86 */
87 IFX_STATIC void IfxGtm_Tom_PwmHl_updateEdgeAligned(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn);
88
89 /** \brief Set the outputs to inactive
90 * \param driver GTM TOM PWM driver
91 * \param tOn T on
92 * \return None
93 */
94 IFX_STATIC void IfxGtm_Tom_PwmHl_updateOff(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn);
95
96 /** \brief Update Pulse
97 * \param driver GTM TOM PWM driver
98 * \param tOn ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
99 * \param offset Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
100 * \return None
101 */
102 IFX_STATIC void IfxGtm_Tom_PwmHl_updatePulse(IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset);
103
104 /** \brief Set Pulse to OFF
105 * \param driver GTM TOM PWM driver
106 * \param tOn ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
107 * \param offset Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
108 * \return None
109 */
110 IFX_STATIC void IfxGtm_Tom_PwmHl_updatePulseOff(IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset);
111
112 /** \brief Update Shift Center Aligned
113 * \param driver GTM TOM PWM driver
114 * \param tOn ON time
115 * \param shift Shift value in ticks
116 * \return None
117 */
118 IFX_STATIC void IfxGtm_Tom_PwmHl_updateShiftCenterAligned(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift);
119
120 /** \} */
121
122 /******************************************************************************/
123 /*------------------------Private Variables/Constants-------------------------*/
124 /******************************************************************************/
125
126 IFX_STATIC IFX_CONST IfxGtm_Tom_PwmHl_Mode IfxGtm_Tom_PwmHl_modes[Ifx_Pwm_Mode_off + 1] = {
127 {Ifx_Pwm_Mode_centerAligned, FALSE, &IfxGtm_Tom_PwmHl_updateCenterAligned, &IfxGtm_Tom_PwmHl_updateShiftCenterAligned, &IfxGtm_Tom_PwmHl_updatePulse },
128 {Ifx_Pwm_Mode_centerAlignedInverted, TRUE, &IfxGtm_Tom_PwmHl_updateCenterAligned, &IfxGtm_Tom_PwmHl_updateShiftCenterAligned, &IfxGtm_Tom_PwmHl_updatePulse },
129 {Ifx_Pwm_Mode_leftAligned, FALSE, &IfxGtm_Tom_PwmHl_updateEdgeAligned, &IfxGtm_Tom_PwmHl_updateAndShiftOff, &IfxGtm_Tom_PwmHl_updatePulse },
130 {Ifx_Pwm_Mode_rightAligned, TRUE, &IfxGtm_Tom_PwmHl_updateEdgeAligned, &IfxGtm_Tom_PwmHl_updateAndShiftOff, &IfxGtm_Tom_PwmHl_updatePulse },
131 {Ifx_Pwm_Mode_off, FALSE, &IfxGtm_Tom_PwmHl_updateOff, &IfxGtm_Tom_PwmHl_updateAndShiftOff, &IfxGtm_Tom_PwmHl_updatePulseOff}
132 };
133
134 /******************************************************************************/
135 /*---------------------Inline Function Implementations------------------------*/
136 /******************************************************************************/
137
138 IFX_INLINE Ifx_ActiveState IfxGtm_Tom_PwmHl_invertActiveState(Ifx_ActiveState activeState)
139 {
140 return activeState == Ifx_ActiveState_low ? Ifx_ActiveState_high : Ifx_ActiveState_low;
141 }
142
143
144 /******************************************************************************/
145 /*-------------------------Function Implementations---------------------------*/
146 /******************************************************************************/
147
148 float32 IfxGtm_Tom_PwmHl_getDeadtime(IfxGtm_Tom_PwmHl *driver)
149 {
150 return IfxStdIf_Timer_tickToS(driver->timer->base.clockFreq, driver->base.deadtime);
151 }
152
153
154 float32 IfxGtm_Tom_PwmHl_getMinPulse(IfxGtm_Tom_PwmHl *driver)
155 {
156 return IfxStdIf_Timer_tickToS(driver->timer->base.clockFreq, driver->base.minPulse - driver->base.deadtime);
157 }
158
159
160 Ifx_Pwm_Mode IfxGtm_Tom_PwmHl_getMode(IfxGtm_Tom_PwmHl *driver)
161 {
162 return driver->base.mode;
163 }
164
165
166 boolean IfxGtm_Tom_PwmHl_init(IfxGtm_Tom_PwmHl *driver, const IfxGtm_Tom_PwmHl_Config *config)
167 {
168 boolean result = TRUE;
169 uint16 channelMask;
170 uint16 channelsMask = 0;
171 uint32 channelIndex;
172 uint16 maskShift = 0;
173 IfxGtm_Tom_Timer *timer = config->timer;
174
175 driver->base.mode = Ifx_Pwm_Mode_init;
176 driver->timer = timer;
177 driver->base.setMode = 0;
178 driver->base.inverted = FALSE;
179 driver->base.ccxActiveState = config->base.ccxActiveState;
180 driver->base.coutxActiveState = config->base.coutxActiveState;
181 driver->base.channelCount = config->base.channelCount;
182
183 IfxGtm_Tom_PwmHl_setDeadtime(driver, config->base.deadtime);
184 IfxGtm_Tom_PwmHl_setMinPulse(driver, config->base.minPulse);
185
186 driver->tom = &(timer->gtm->TOM[config->tom]);
187
188 /* config->ccx[0] is used for the definition of the TGC */
189 if (config->ccx[0]->channel <= 7)
190 {
191 driver->tgc = IfxGtm_Tom_Ch_getTgcPointer(driver->tom, 0);
192 }
193 else
194 {
195 driver->tgc = IfxGtm_Tom_Ch_getTgcPointer(driver->tom, 1);
196 }
197
198 maskShift = (config->ccx[0]->channel <= 7) ? 0 : 8;
199
200 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->base.channelCount <= IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS);
201
202 IfxGtm_Tom_Ch_ClkSrc clock = IfxGtm_Tom_Ch_getClockSource(timer->tom, timer->timerChannel);
203
204 for (channelIndex = 0; channelIndex < config->base.channelCount; channelIndex++)
205 {
206 IfxGtm_Tom_Ch channel;
207 /* CCX */
208 channel = config->ccx[channelIndex]->channel;
209 driver->ccx[channelIndex] = channel;
210 channelMask = 1 << (channel - maskShift);
211 channelsMask |= channelMask;
212
213 /* Initialize the timer part */
214 IfxGtm_Tom_Ch_setClockSource(driver->tom, channel, clock);
215
216 /* Initialize the SOUR reset value and enable the channel */
217 IfxGtm_Tom_Ch_setSignalLevel(driver->tom, channel, !driver->base.inverted
218 ? config->base.ccxActiveState
219 : IfxGtm_Tom_PwmHl_invertActiveState(config->base.ccxActiveState));
220 IfxGtm_Tom_Tgc_enableChannels(driver->tgc, channelMask, 0, TRUE); /* Write the SOUR outout with !SL */
221 IfxGtm_Tom_Tgc_enableChannelsOutput(driver->tgc, channelMask, 0, TRUE);
222
223 /* Set the SL to the required level for run time */
224 IfxGtm_Tom_Ch_setSignalLevel(driver->tom, channel, driver->base.inverted
225 ? config->base.ccxActiveState
226 : IfxGtm_Tom_PwmHl_invertActiveState(config->base.ccxActiveState));
227 IfxGtm_Tom_Ch_setResetSource(driver->tom, channel, IfxGtm_Tom_Ch_ResetEvent_onTrigger);
228 IfxGtm_Tom_Ch_setTriggerOutput(driver->tom, channel, IfxGtm_Tom_Ch_OutputTrigger_forward);
229 IfxGtm_Tom_Ch_setCounterValue(driver->tom, channel, IfxGtm_Tom_Timer_getOffset(driver->timer));
230
231 /*Initialize the port */
232 if (config->initPins == TRUE)
233 {
234 IfxGtm_PinMap_setTomTout(config->ccx[channelIndex],
235 config->base.outputMode, config->base.outputDriver);
236 IfxPort_setPinState(config->ccx[channelIndex]->pin.port, config->ccx[channelIndex]->pin.pinIndex, config->base.ccxActiveState ? IfxPort_State_low : IfxPort_State_high);
237 }
238
239 /* COUTX */
240 channel = config->coutx[channelIndex]->channel;
241 driver->coutx[channelIndex] = channel;
242 channelMask = 1 << (channel - maskShift);
243 channelsMask |= channelMask;
244
245 /* Initialize the timer part */
246 IfxGtm_Tom_Ch_setClockSource(driver->tom, channel, clock);
247
248 /* Initialize the SOUR reset value, SL and enable the channel */
249 IfxGtm_Tom_Ch_setSignalLevel(driver->tom, channel, driver->base.inverted
250 ? IfxGtm_Tom_PwmHl_invertActiveState(config->base.coutxActiveState)
251 : config->base.coutxActiveState);
252 IfxGtm_Tom_Tgc_enableChannels(driver->tgc, channelMask, 0, TRUE);
253 IfxGtm_Tom_Tgc_enableChannelsOutput(driver->tgc, channelMask, 0, TRUE);
254
255 IfxGtm_Tom_Ch_setResetSource(driver->tom, channel, IfxGtm_Tom_Ch_ResetEvent_onTrigger);
256 IfxGtm_Tom_Ch_setTriggerOutput(driver->tom, channel, IfxGtm_Tom_Ch_OutputTrigger_forward);
257 IfxGtm_Tom_Ch_setCounterValue(driver->tom, channel, IfxGtm_Tom_Timer_getOffset(driver->timer));
258
259 /*Initialize the port */
260 if (config->initPins == TRUE)
261 {
262 IfxGtm_PinMap_setTomTout(config->coutx[channelIndex],
263 config->base.outputMode, config->base.outputDriver);
264 IfxPort_setPinState(config->coutx[channelIndex]->pin.port, config->coutx[channelIndex]->pin.pinIndex, config->base.coutxActiveState ? IfxPort_State_low : IfxPort_State_high);
265 }
266 }
267
268 IfxGtm_Tom_PwmHl_setMode(driver, Ifx_Pwm_Mode_off);
269
270 Ifx_TimerValue tOn[IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS] = {0};
271 IfxGtm_Tom_PwmHl_updateOff(driver, tOn); /* tOn do not need defined values */
272
273 /* Transfer the shadow registers */
274 IfxGtm_Tom_Tgc_setChannelsForceUpdate(driver->tgc, channelsMask, 0, 0, 0);
275 IfxGtm_Tom_Tgc_trigger(driver->tgc);
276 IfxGtm_Tom_Tgc_setChannelsForceUpdate(driver->tgc, 0, channelsMask, 0, 0);
277
278 /* Enable timer to update the channels */
279 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
280 {
281 IfxGtm_Tom_Timer_addToChannelMask(timer, driver->ccx[channelIndex]);
282 IfxGtm_Tom_Timer_addToChannelMask(timer, driver->coutx[channelIndex]);
283 }
284
285 return result;
286 }
287
288
289 void IfxGtm_Tom_PwmHl_initConfig(IfxGtm_Tom_PwmHl_Config *config)
290 {
291 IfxStdIf_PwmHl_initConfig(&config->base);
292 config->timer = NULL_PTR;
293 config->tom = IfxGtm_Tom_0;
294 config->ccx = NULL_PTR;
295 config->coutx = NULL_PTR;
296 config->initPins = TRUE;
297 }
298
299
300 boolean IfxGtm_Tom_PwmHl_setDeadtime(IfxGtm_Tom_PwmHl *driver, float32 deadtime)
301 {
302 Ifx_TimerValue value = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, deadtime);
303 driver->base.deadtime = value;
304
305 return TRUE;
306 }
307
308
309 boolean IfxGtm_Tom_PwmHl_setMinPulse(IfxGtm_Tom_PwmHl *driver, float32 minPulse)
310 {
311 Ifx_TimerValue value = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, minPulse);
312
313 driver->base.minPulse = value + driver->base.deadtime;
314 driver->base.maxPulse = driver->timer->base.period - driver->base.minPulse;
315
316 return TRUE;
317 }
318
319
320 boolean IfxGtm_Tom_PwmHl_setMode(IfxGtm_Tom_PwmHl *driver, Ifx_Pwm_Mode mode)
321 {
322 boolean result = TRUE;
323 IfxGtm_Tom_PwmHl_Base *base = &driver->base;
324
325 if (base->mode != mode)
326 {
327 if ((mode > Ifx_Pwm_Mode_off) || (IfxGtm_Tom_PwmHl_modes[mode].update == NULL_PTR))
328 {
329 mode = Ifx_Pwm_Mode_off;
330 result = FALSE;
331 }
332
333 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, mode == IfxGtm_Tom_PwmHl_modes[mode].mode);
334
335 base->mode = mode;
336 driver->update = IfxGtm_Tom_PwmHl_modes[mode].update;
337 driver->updateAndShift = IfxGtm_Tom_PwmHl_modes[mode].updateAndShift;
338 driver->updatePulse = IfxGtm_Tom_PwmHl_modes[mode].updatePulse;
339
340 if (base->mode != Ifx_Pwm_Mode_off)
341 {
342 base->inverted = IfxGtm_Tom_PwmHl_modes[mode].inverted;
343 }
344 else
345 { /* Keep previous inverted for off mode */
346 }
347
348 if (base->inverted)
349 {
350 driver->ccxTemp = driver->coutx;
351 driver->coutxTemp = driver->ccx;
352 }
353 else
354 {
355 driver->ccxTemp = driver->ccx;
356 driver->coutxTemp = driver->coutx;
357 }
358
359 { /* Workaround to enable the signal inversion required for center aligned inverted
360 * and right aligned modes */
361 /** \note that changing signal level may produce short circuit at the power stage,
362 * in which case the inverter must be disable during this action. */
363
364 /* Ifx_Pwm_Mode_centerAligned and Ifx_Pwm_Mode_LeftAligned use inverted=FALSE */
365 /* Ifx_Pwm_Mode_centerAlignedInverted and Ifx_Pwm_Mode_RightAligned use inverted=TRUE */
366 uint32 channelIndex;
367
368 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
369 {
370 IfxGtm_Tom_Ch channel;
371
372 channel = driver->ccx[channelIndex];
373 IfxGtm_Tom_Ch_setSignalLevel(driver->tom, channel, base->inverted
374 ? base->ccxActiveState
375 : IfxGtm_Tom_PwmHl_invertActiveState(driver->base.ccxActiveState));
376
377 channel = driver->coutx[channelIndex];
378 IfxGtm_Tom_Ch_setSignalLevel(driver->tom, channel, base->inverted
379 ? IfxGtm_Tom_PwmHl_invertActiveState(driver->base.coutxActiveState)
380 : base->coutxActiveState);
381 }
382 }
383 }
384
385 return result;
386 }
387
388
389 void IfxGtm_Tom_PwmHl_setOnTime(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
390 {
391 driver->update(driver, tOn);
392 }
393
394
395 void IfxGtm_Tom_PwmHl_setOnTimeAndShift(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
396 {
397 driver->updateAndShift(driver, tOn, shift);
398 }
399
400
401 void IfxGtm_Tom_PwmHl_setPulse(IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
402 {
403 driver->updatePulse(driver, tOn, offset);
404 }
405
406
407 void IfxGtm_Tom_PwmHl_setupChannels(IfxGtm_Tom_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
408 {
409 /* Dummy Function for StdIf compile */
410 IFX_UNUSED_PARAMETER(driver)
411 IFX_UNUSED_PARAMETER(activeCh)
412 IFX_UNUSED_PARAMETER(stuckSt)
413 }
414
415
416 boolean IfxGtm_Tom_PwmHl_stdIfPwmHlInit(IfxStdIf_PwmHl *stdif, IfxGtm_Tom_PwmHl *driver)
417 {
418 /* Ensure the stdif is reset to zeros */
419 memset(stdif, 0, sizeof(IfxStdIf_PwmHl));
420
421 /* *INDENT-OFF* Note: this file was indented manually by the author. */
422 /* Set the API link */
423 stdif->driver = driver;
424 stdif->setDeadtime = (IfxStdIf_PwmHl_SetDeadtime )&IfxGtm_Tom_PwmHl_setDeadtime;
425 stdif->getDeadtime = (IfxStdIf_PwmHl_GetDeadtime )&IfxGtm_Tom_PwmHl_getDeadtime;
426 stdif->setMinPulse = (IfxStdIf_PwmHl_SetMinPulse )&IfxGtm_Tom_PwmHl_setMinPulse;
427 stdif->getMinPulse = (IfxStdIf_PwmHl_GetMinPulse )&IfxGtm_Tom_PwmHl_getMinPulse;
428 stdif->getMode = (IfxStdIf_PwmHl_GetMode )&IfxGtm_Tom_PwmHl_getMode;
429 stdif->setMode = (IfxStdIf_PwmHl_SetMode )&IfxGtm_Tom_PwmHl_setMode;
430 stdif->setOnTime = (IfxStdIf_PwmHl_SetOnTime )&IfxGtm_Tom_PwmHl_setOnTime;
431 stdif->setOnTimeAndShift = (IfxStdIf_PwmHl_SetOnTimeAndShift)&IfxGtm_Tom_PwmHl_setOnTimeAndShift;
432 stdif->setPulse = (IfxStdIf_PwmHl_SetPulse )&IfxGtm_Tom_PwmHl_setPulse;
433 stdif->setupChannels = (IfxStdIf_PwmHl_SetupChannels )&IfxGtm_Tom_PwmHl_setupChannels;
434 IfxGtm_Tom_Timer_stdIfTimerInit(&stdif->timer, driver->timer);
435 /* *INDENT-ON* */
436
437 return TRUE;
438 }
439
440
441 IFX_STATIC void IfxGtm_Tom_PwmHl_updateAndShiftOff(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
442 {
443 IFX_UNUSED_PARAMETER(tOn)
444 IFX_UNUSED_PARAMETER(shift)
445
446 IfxGtm_Tom_PwmHl_updateOff(driver, NULL_PTR);
447 }
448
449
450 IFX_STATIC void IfxGtm_Tom_PwmHl_updateCenterAligned(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
451 {
452 uint8 channelIndex;
453 Ifx_TimerValue period;
454 Ifx_TimerValue deadtime = driver->base.deadtime;
455
456 period = driver->timer->base.period;
457
458 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
459 {
460 Ifx_TimerValue x; /* x=period*dutyCycle, x=OnTime+deadTime */
461 Ifx_TimerValue cm0, cm1;
462 x = tOn[channelIndex];
463
464 if (driver->base.inverted != FALSE)
465 {
466 x = period - x;
467 }
468 else
469 {}
470
471 if ((x < driver->base.minPulse) || (x <= deadtime))
472 { /* For deadtime condition: avoid leading edge of top channel to occur after the trailing edge */
473 x = 0;
474 }
475 else if (x > driver->base.maxPulse)
476 {
477 x = period;
478 }
479 else
480 {}
481
482 /* Special handling due to GTM issue */
483 if (x == period)
484 { /* 100% duty cycle */
485 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccxTemp[channelIndex],
486 period + 1 /* No compare event */,
487 2 /* 1st compare event (issue: expected to be 1) */ + deadtime);
488 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->coutxTemp[channelIndex],
489 period + 2 /* No compare event, issues has been seen with +1 */,
490 2 /* 1st compare event (issue: expected to be 1) */);
491 }
492 else if (x == 0)
493 {
494 cm0 = 1;
495 cm1 = period + 2;
496 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccxTemp[channelIndex], cm0, cm1);
497 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->coutxTemp[channelIndex], cm0 + deadtime, cm1);
498 }
499 else
500 { /* x% duty cycle */
501 cm1 = (period - x) / 2; // CM1
502 cm0 = (period + x) / 2; // CM0
503 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccxTemp[channelIndex], cm0, cm1 + deadtime);
504 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->coutxTemp[channelIndex], cm0 + deadtime, cm1);
505 }
506 }
507 }
508
509
510 IFX_STATIC void IfxGtm_Tom_PwmHl_updateEdgeAligned(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
511 {
512 uint8 channelIndex;
513 Ifx_TimerValue period;
514 Ifx_TimerValue deadtime = driver->base.deadtime;
515
516 period = driver->timer->base.period;
517
518 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
519 {
520 Ifx_TimerValue x; /* x=period*dutyCycle, x=OnTime+deadTime */
521 Ifx_TimerValue cm0, cm1;
522 x = tOn[channelIndex];
523
524 if (driver->base.inverted != FALSE)
525 {
526 x = period - x;
527 }
528 else
529 {}
530
531 if ((x < driver->base.minPulse) || (x <= deadtime))
532 { /* For deadtime condition: avoid leading edge of top channel to occur after the trailing edge */
533 x = 0;
534 }
535 else if (x > driver->base.maxPulse)
536 {
537 x = period;
538 }
539 else
540 {}
541
542 /* Special handling due to GTM issue */
543 if (x == period)
544 { /* 100% duty cycle */
545 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccxTemp[channelIndex],
546 period + 1 /* No compare event */,
547 2 /* 1st compare event (issue: expected to be 1) */ + deadtime);
548 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->coutxTemp[channelIndex],
549 period + 2 /* No compare event, issues has been seen with +1 */,
550 2 /* 1st compare event (issue: expected to be 1) */);
551 }
552 else if (x == 0)
553 {
554 cm0 = 1;
555 cm1 = period + 2;
556 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccxTemp[channelIndex], cm0, cm1);
557 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->coutxTemp[channelIndex], cm0 + deadtime, cm1);
558 }
559 else
560 { /* x% duty cycle */
561 cm1 = 2; // CM1, set to 2 due to a GTM issue. should be 1 according to spec
562 cm0 = x; // CM0, set to x+2 due to a GTM issue. should be x+1 according to spec
563 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccxTemp[channelIndex], cm0, cm1 + deadtime);
564 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->coutxTemp[channelIndex], cm0 + deadtime, cm1);
565 }
566 }
567 }
568
569
570 IFX_STATIC void IfxGtm_Tom_PwmHl_updateOff(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
571 {
572 IFX_UNUSED_PARAMETER(tOn)
573 uint8 channelIndex;
574 Ifx_TimerValue period;
575
576 period = driver->timer->base.period;
577
578 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
579 {
580 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccxTemp[channelIndex],
581 2 /* 1 will keep the previous level */, period + 2);
582 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->coutxTemp[channelIndex], period + 1, 2);
583 }
584 }
585
586
587 IFX_STATIC void IfxGtm_Tom_PwmHl_updatePulse(IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
588 {
589 uint8 channelIndex;
590 Ifx_TimerValue period;
591
592 period = driver->timer->base.period;
593
594 /* Top channels */
595 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
596 {
597 Ifx_TimerValue x; /* x=period*dutyCycle, x=OnTime+deadTime */
598 Ifx_TimerValue o;
599 Ifx_TimerValue cm0, cm1;
600
601 x = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, tOn[channelIndex]);
602 o = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, offset[channelIndex]);
603
604 if (driver->base.inverted != FALSE)
605 {
606 x = period - x;
607 }
608 else
609 {}
610
611 if ((x < driver->base.minPulse) || (o > period))
612 {
613 x = 0;
614 }
615 else if ((x > driver->base.maxPulse) || (o + x > period))
616 {
617 x = period;
618 }
619 else
620 {}
621
622 /* Special handling due to GTM issue */
623 if (x == period)
624 { /* 100% duty cycle */
625 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccxTemp[channelIndex],
626 period + 1 /* No compare event */,
627 2 /* 1st compare event (issue: expected to be 1)*/);
628 }
629 else if (x == 0)
630 {
631 cm0 = 1;
632 cm1 = period + 2;
633 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccxTemp[channelIndex], cm0, cm1);
634 }
635 else
636 { /* x% duty cycle */
637 cm1 = 2 + o; // CM1, set to 2 due to a GTM issue. should be 1 according to spec
638 cm0 = o + x; // CM0, set to x+2 due to a GTM issue. should be x+1 according to spec
639 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccxTemp[channelIndex], cm0, cm1);
640 }
641 }
642
643 /* Bottom channels */
644 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
645 {
646 Ifx_TimerValue x; /* x=period*dutyCycle, x=OnTime+deadTime */
647 Ifx_TimerValue o;
648 Ifx_TimerValue cm0, cm1;
649
650 x = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, tOn[channelIndex + driver->base.channelCount]);
651 o = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, offset[channelIndex + driver->base.channelCount]);
652
653 if (driver->base.inverted != FALSE)
654 {
655 x = period - x;
656 }
657 else
658 {}
659
660 if (x < driver->base.minPulse)
661 {
662 x = 0;
663 }
664 else if (x > driver->base.maxPulse)
665 {
666 x = period;
667 }
668 else
669 {}
670
671 /* Special handling due to GTM issue */
672 if (x == period)
673 { /* 100% duty cycle */
674 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->coutxTemp[channelIndex],
675 period + 2 /* No compare event, issues has been seen with +1 */,
676 2 /* 1st compare event (issue: expected to be 1)*/);
677 }
678 else if (x == 0)
679 {
680 cm0 = 1;
681 cm1 = period + 2;
682 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->coutxTemp[channelIndex], cm0, cm1);
683 }
684 else
685 { /* x% duty cycle */
686 cm1 = 2 + o; // CM1, set to 2 due to a GTM issue. should be 1 according to spec
687 cm0 = o + x; // CM0, set to x+2 due to a GTM issue. should be x+1 according to spec
688 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->coutxTemp[channelIndex], cm0, cm1);
689 }
690 }
691 }
692
693
694 IFX_STATIC void IfxGtm_Tom_PwmHl_updatePulseOff(IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
695 {
696 IFX_UNUSED_PARAMETER(tOn)
697 IFX_UNUSED_PARAMETER(offset)
698 IfxGtm_Tom_PwmHl_updateOff(driver, NULL_PTR);
699 }
700
701
702 IFX_STATIC void IfxGtm_Tom_PwmHl_updateShiftCenterAligned(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
703 {
704 uint8 channelIndex;
705 Ifx_TimerValue period;
706 Ifx_TimerValue deadtime = driver->base.deadtime;
707
708 period = driver->timer->base.period;
709
710 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
711 {
712 Ifx_TimerValue x; /* x=period*dutyCycle, x=OnTime+deadTime */
713 Ifx_TimerValue s; /* Shift value */
714 Ifx_TimerValue cm0, cm1;
715 x = tOn[channelIndex];
716
717 if (driver->base.inverted != FALSE)
718 {
719 x = period - x;
720 }
721 else
722 {}
723
724 if ((x < driver->base.minPulse) || (x <= deadtime))
725 { /* For deadtime condition: avoid leading edge of top channel to occur after the trailing edge */
726 x = 0;
727 }
728 else if (x > driver->base.maxPulse)
729 {
730 x = period;
731 }
732 else
733 {}
734
735 /* Special handling due to GTM issue */
736 if (x == period)
737 { /* 100% duty cycle */
738 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccxTemp[channelIndex],
739 period + 1 /* No compare event */,
740 2 /* 1st compare event (issue: expected to be 1)*/ + deadtime);
741 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->coutxTemp[channelIndex],
742 period + 2 /* No compare event, issues has been seen with +1 */,
743 2 /* 1st compare event (issue: expected to be 1)*/);
744 }
745 else if (x == 0)
746 {
747 cm0 = 1;
748 cm1 = period + 2;
749 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccxTemp[channelIndex], cm0, cm1);
750 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->coutxTemp[channelIndex], cm0 + deadtime, cm1);
751 }
752 else
753 { /* x% duty cycle */
754 s = shift[channelIndex];
755
756 if (s > 0)
757 {
758 s = __minX(s, (period - x) / 2 - 1);
759 }
760 else
761 {
762 s = __maxX(s, (x - period) / 2 + 1);
763 }
764
765 cm1 = s + (period - x) / 2; // CM1
766 cm0 = s + (period + x) / 2; // CM0
767 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccxTemp[channelIndex], cm0, cm1 + deadtime);
768 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->coutxTemp[channelIndex], cm0 + deadtime, cm1);
769 }
770 }
771 }
Ifx_ActiveState_high
The signal is high active.
Definition: Ifx_Types.h:116
IfxStdIf_PwmHl_::timer
IfxStdIf_Timer timer
Timer related standard interface.
Definition: IfxStdIf_PwmHl.h:196
Ifx_Pwm_Mode
Ifx_Pwm_Mode
Definition: Ifx_Types.h:175
IfxGtm_Tom_PwmHl_Config::coutx
IFX_CONST IfxGtm_Tom_ToutMapP * coutx
Pointer to an array of size base.channelCount/2 containing the channels used. All channels used for c...
Definition: IfxGtm_Tom_PwmHl.h:193
Ifx_ActiveState_low
The signal is low active.
Definition: Ifx_Types.h:115
IfxGtm_Tom_Timer_addToChannelMask
void IfxGtm_Tom_Timer_addToChannelMask(IfxGtm_Tom_Timer *driver, IfxGtm_Tom_Ch channel)
Add a channel to the channel mask Channels present in the mask are started, stopped, updated at the same time as the timer: IfxGtm_Tom_Timer_applyUpdate, IfxGtm_Tom_Timer_disableUpdate, IfxGtm_Tom_Timer_stop, IfxGtm_Tom_Timer_run.
Definition: IfxGtm_Tom_Timer.c:90
IfxGtm_Tom_Timer_Base::clockFreq
float32 clockFreq
Timer input clock frequency (cached value)
Definition: IfxGtm_Tom_Timer.h:151
IfxGtm_Tom_Ch_setTriggerOutput
void IfxGtm_Tom_Ch_setTriggerOutput(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_OutputTrigger trigger)
Sets the channel trigger output.
Definition: IfxGtm_Tom.c:348
IfxGtm_Tom_PwmHl_getMinPulse
float32 IfxGtm_Tom_PwmHl_getMinPulse(IfxGtm_Tom_PwmHl *driver)
Returns the minimum pulse.
Definition: IfxGtm_Tom_PwmHl.c:154
IfxStdIf_PwmHl_::setupChannels
IfxStdIf_PwmHl_SetupChannels setupChannels
IfxStdIf_PwmHl_SetupChannels.
Definition: IfxStdIf_PwmHl.h:194
IfxGtm_Tom_PwmHl_Base::maxPulse
Ifx_TimerValue maxPulse
internal parameter
Definition: IfxGtm_Tom_PwmHl.h:172
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxGtm_Tom_Timer::gtm
Ifx_GTM * gtm
Pointer to GTM module.
Definition: IfxGtm_Tom_Timer.h:164
IfxStdIf_PwmHl_::getMinPulse
IfxStdIf_PwmHl_GetMinPulse getMinPulse
IfxStdIf_PwmHl_GetMinPulse.
Definition: IfxStdIf_PwmHl.h:188
IfxStdIf_PwmHl_::getDeadtime
IfxStdIf_PwmHl_GetDeadtime getDeadtime
IfxStdIf_PwmHl_GetDeadtime.
Definition: IfxStdIf_PwmHl.h:185
IfxGtm_Tom_PwmHl_Base::channelCount
uint8 channelCount
Number of PWM channels, one channel is made of a top and bottom channel.
Definition: IfxGtm_Tom_PwmHl.h:178
IfxGtm_Tom_PwmHl_setMinPulse
boolean IfxGtm_Tom_PwmHl_setMinPulse(IfxGtm_Tom_PwmHl *driver, float32 minPulse)
Sets the minimum pulse.
Definition: IfxGtm_Tom_PwmHl.c:309
IfxGtm_Tom_PwmHl_setPulse
void IfxGtm_Tom_PwmHl_setPulse(IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
Sets the ON time and offset, all switched are independent.
Definition: IfxGtm_Tom_PwmHl.c:401
IfxGtm_Tom_PwmHl_setDeadtime
boolean IfxGtm_Tom_PwmHl_setDeadtime(IfxGtm_Tom_PwmHl *driver, float32 deadtime)
Sets the dead time.
Definition: IfxGtm_Tom_PwmHl.c:300
IfxGtm_Tom_Ch_setResetSource
void IfxGtm_Tom_Ch_setResetSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ResetEvent event)
Sets the channel clock source either from local or from previous channel.
Definition: IfxGtm_Tom.c:321
IfxGtm_Tom_PwmHl_s::base
IfxGtm_Tom_PwmHl_Base base
Multi-channels PWM object definition (channels only)
Definition: IfxGtm_Tom_PwmHl.h:213
IfxGtm_Tom_PwmHl_updatePulse
IFX_STATIC void IfxGtm_Tom_PwmHl_updatePulse(IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
Update Pulse.
Definition: IfxGtm_Tom_PwmHl.c:587
IfxGtm_Tom_PwmHl_updateCenterAligned
IFX_STATIC void IfxGtm_Tom_PwmHl_updateCenterAligned(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in center aligned and center aligned inverted modes.
Definition: IfxGtm_Tom_PwmHl.c:450
IfxGtm_PinMap_setTomTout
void IfxGtm_PinMap_setTomTout(IfxGtm_Tom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Definition: IfxGtm_PinMap.c:2420
IfxPort_State_high
Ifx_P pin is set to high.
Definition: IfxPort.h:190
IfxGtm_Tom_PwmHl_updateAndShiftOff
IFX_STATIC void IfxGtm_Tom_PwmHl_updateAndShiftOff(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets switched to OFF.
Definition: IfxGtm_Tom_PwmHl.c:441
Ifx_Pwm_Mode_centerAligned
Center aligned mode.
Definition: Ifx_Types.h:177
memset
void * memset(void *s, int c, syze_t n)
IfxStdIf_Timer_tickToS
IFX_INLINE float32 IfxStdIf_Timer_tickToS(float32 clockFreq, Ifx_TimerValue ticks)
Convert timer ticks to seconds.
Definition: IfxStdIf_Timer.h:435
IfxGtm_Tom_Ch_setSignalLevel
void IfxGtm_Tom_Ch_setSignalLevel(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, Ifx_ActiveState activeState)
Sets the signal level.
Definition: IfxGtm_Tom.c:329
IfxStdIf_PwmHl_SetupChannels
void(* IfxStdIf_PwmHl_SetupChannels)(IfxStdIf_InterfaceDriver stdIf, boolean *activeCh, boolean *stuckSt)
Set channels which are generating PWM or in "stuck-at" state.
Definition: IfxStdIf_PwmHl.h:175
IfxGtm_Tom_Ch_getTgcPointer
Ifx_GTM_TOM_TGC * IfxGtm_Tom_Ch_getTgcPointer(Ifx_GTM_TOM *tom, uint32 tgcIndex)
Returns the TGC pointer.
Definition: IfxGtm_Tom.c:153
IfxGtm_Tom_PwmHl_Config::base
IfxStdIf_PwmHl_Config base
PWM HL standard interface configuration.
Definition: IfxGtm_Tom_PwmHl.h:189
IfxGtm_Tom_PwmHl_stdIfPwmHlInit
boolean IfxGtm_Tom_PwmHl_stdIfPwmHlInit(IfxStdIf_PwmHl *stdif, IfxGtm_Tom_PwmHl *driver)
Initialises the statndard interface Pwm.
Definition: IfxGtm_Tom_PwmHl.c:416
IfxStdIf_PwmHl_GetMode
Ifx_Pwm_Mode(* IfxStdIf_PwmHl_GetMode)(IfxStdIf_InterfaceDriver stdIf)
Return the PWM mode.
Definition: IfxStdIf_PwmHl.h:125
IfxStdIf_PwmHl_initConfig
void IfxStdIf_PwmHl_initConfig(IfxStdIf_PwmHl_Config *config)
Definition: IfxStdIf_PwmHl.c:45
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxStdIf_Timer_sToTick
IFX_INLINE Ifx_TimerValue IfxStdIf_Timer_sToTick(float32 clockFreq, float32 seconds)
Convert seconds to timer ticks.
Definition: IfxStdIf_Timer.h:446
float32
float float32
Definition: Platform_Types.h:170
Ifx_Assert.h
Assert functions.
IfxStdIf_PwmHl_::setPulse
IfxStdIf_PwmHl_SetPulse setPulse
IfxStdIf_PwmHl_Pulse.
Definition: IfxStdIf_PwmHl.h:193
__maxX
#define __maxX
Definition: IfxCpu_IntrinsicsDcc.h:1597
IfxGtm_Tom_PwmHl_setOnTimeAndShift
void IfxGtm_Tom_PwmHl_setOnTimeAndShift(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets the ON time and Shift.
Definition: IfxGtm_Tom_PwmHl.c:395
IfxGtm_Tom_Timer_Base::period
Ifx_TimerValue period
Timer period in ticks (cached value)
Definition: IfxGtm_Tom_Timer.h:149
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:113
IfxGtm_Tom_PwmHl_getDeadtime
float32 IfxGtm_Tom_PwmHl_getDeadtime(IfxGtm_Tom_PwmHl *driver)
Returns the dead time.
Definition: IfxGtm_Tom_PwmHl.c:148
IfxGtm_Tom_PwmHl.h
GTM PWMHL details.
IfxGtm_Tom_PwmHl_setMode
boolean IfxGtm_Tom_PwmHl_setMode(IfxGtm_Tom_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate()
Definition: IfxGtm_Tom_PwmHl.c:320
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxStdIf_PwmHl_Config::deadtime
float32 deadtime
Dead time between the top and bottom channels in seconds.
Definition: IfxStdIf_PwmHl.h:202
IfxGtm_Tom_PwmHl_getMode
Ifx_Pwm_Mode IfxGtm_Tom_PwmHl_getMode(IfxGtm_Tom_PwmHl *driver)
Returns Pwm mode.
Definition: IfxGtm_Tom_PwmHl.c:160
IfxGtm_Tom_PwmHl_setupChannels
void IfxGtm_Tom_PwmHl_setupChannels(IfxGtm_Tom_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set up channels.
Definition: IfxGtm_Tom_PwmHl.c:407
IfxGtm_Tom_PwmHl_Base::ccxActiveState
Ifx_ActiveState ccxActiveState
Top PWM active state.
Definition: IfxGtm_Tom_PwmHl.h:175
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxStdIf_PwmHl_::driver
IfxStdIf_InterfaceDriver driver
Interface driver object.
Definition: IfxStdIf_PwmHl.h:181
IfxGtm_Tom_Ch
IfxGtm_Tom_Ch
Enum for TOM channels.
Definition: IfxGtm_cfg.h:428
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxStdIf_PwmHl_SetPulse
void(* IfxStdIf_PwmHl_SetPulse)(IfxStdIf_InterfaceDriver stdIf, float32 *tOn, float32 *offset)
Set the pwm pulse of all switched independently.
Definition: IfxStdIf_PwmHl.h:156
IfxGtm_Tom_PwmHl_Base::setMode
sint8 setMode
A non zero flag indicates that the PWM mode is being modified.
Definition: IfxGtm_Tom_PwmHl.h:174
IfxGtm_Tom_PwmHl_Base::mode
Ifx_Pwm_Mode mode
actual PWM mode
Definition: IfxGtm_Tom_PwmHl.h:173
IfxGtm_Tom_PwmHl_invertActiveState
IFX_INLINE Ifx_ActiveState IfxGtm_Tom_PwmHl_invertActiveState(Ifx_ActiveState activeState)
Inverts the active state.
Definition: IfxGtm_Tom_PwmHl.c:138
IfxGtm_Tom_PwmHl_s::coutx
IfxGtm_Tom_Ch coutx[IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS]
TOM channels used for the OUTX outputs.
Definition: IfxGtm_Tom_PwmHl.h:221
IfxGtm_Tom_PwmHl_Config
GTM TOM: PWM HL configuration.
Definition: IfxGtm_Tom_PwmHl.h:187
Ifx_Pwm_Mode_leftAligned
Left aligned mode. The PWM period starts with a rising edge.
Definition: Ifx_Types.h:179
IfxGtm_Tom_ToutMap::pin
IfxPort_Pin pin
Port pin.
Definition: IfxGtm_PinMap.h:130
IfxGtm_Tom_Ch_ResetEvent_onTrigger
Definition: IfxGtm_Tom.h:106
IfxStdIf_PwmHl_GetMinPulse
float32(* IfxStdIf_PwmHl_GetMinPulse)(IfxStdIf_InterfaceDriver stdIf)
Return the minimum pulse time in s.
Definition: IfxStdIf_PwmHl.h:117
IfxGtm_Tom_PwmHl_initConfig
void IfxGtm_Tom_PwmHl_initConfig(IfxGtm_Tom_PwmHl_Config *config)
Initialize the configuration structure to default.
Definition: IfxGtm_Tom_PwmHl.c:289
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxGtm_Tom_PwmHl_s::ccxTemp
IfxGtm_Tom_Ch * ccxTemp
cached value
Definition: IfxGtm_Tom_PwmHl.h:222
IfxStdIf_PwmHl_Config::outputDriver
IfxPort_PadDriver outputDriver
Output pad driver of ccx and coutx pins.
Definition: IfxStdIf_PwmHl.h:208
IfxStdIf_PwmHl_Config::ccxActiveState
Ifx_ActiveState ccxActiveState
Top PWM active state.
Definition: IfxStdIf_PwmHl.h:211
Ifx_Pwm_Mode_init
Initialisation mode, do not use at run time.
Definition: Ifx_Types.h:182
IfxGtm_Tom_Ch_setCompareShadow
void IfxGtm_Tom_Ch_setCompareShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero, uint32 shadowOne)
Sets the compare 0 and 1 shadow values.
Definition: IfxGtm_Tom.c:242
IfxGtm_Tom_PwmHl_Base::coutxActiveState
Ifx_ActiveState coutxActiveState
Bottom PWM active state.
Definition: IfxGtm_Tom_PwmHl.h:176
IfxStdIf_PwmHl_
Standard interface object.
Definition: IfxStdIf_PwmHl.h:179
IfxGtm_Tom_PwmHl_modes
IFX_STATIC IFX_CONST IfxGtm_Tom_PwmHl_Mode IfxGtm_Tom_PwmHl_modes[Ifx_Pwm_Mode_off+1]
Definition: IfxGtm_Tom_PwmHl.c:126
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:50
Ifx_Pwm_Mode_off
All switch open.
Definition: Ifx_Types.h:181
__minX
#define __minX
Definition: IfxCpu_IntrinsicsDcc.h:1593
IfxStdIf_PwmHl_::setOnTime
IfxStdIf_PwmHl_SetOnTime setOnTime
IfxStdIf_PwmHl_SetOnTime.
Definition: IfxStdIf_PwmHl.h:191
IfxGtm_Tom_Timer_stdIfTimerInit
boolean IfxGtm_Tom_Timer_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxGtm_Tom_Timer *driver)
Initializes the standard interface timer.
Definition: IfxGtm_Tom_Timer.c:431
IfxGtm_Tom_Ch_setCounterValue
void IfxGtm_Tom_Ch_setCounterValue(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 value)
Sets the counter value.
Definition: IfxGtm_Tom.c:267
IfxStdIf_PwmHl_SetMinPulse
boolean(* IfxStdIf_PwmHl_SetMinPulse)(IfxStdIf_InterfaceDriver stdIf, float32 minPulse)
Set the minimum pulse time in s.
Definition: IfxStdIf_PwmHl.h:109
IfxGtm_Tom_Timer::tom
Ifx_GTM_TOM * tom
Pointer to the TOM object.
Definition: IfxGtm_Tom_Timer.h:165
IfxGtm_Tom_PwmHl_updatePulseOff
IFX_STATIC void IfxGtm_Tom_PwmHl_updatePulseOff(IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
Set Pulse to OFF.
Definition: IfxGtm_Tom_PwmHl.c:694
IfxPort_setPinState
IFX_INLINE void IfxPort_setPinState(Ifx_P *port, uint8 pinIndex, IfxPort_State action)
Set / Resets / Toggle the port output.
Definition: IfxPort.h:681
IfxGtm_Tom_PwmHl_init
boolean IfxGtm_Tom_PwmHl_init(IfxGtm_Tom_PwmHl *driver, const IfxGtm_Tom_PwmHl_Config *config)
Initializes the timer object note To ensure that the channels counter are reset by the timer and do n...
Definition: IfxGtm_Tom_PwmHl.c:166
IfxGtm_Tom_PwmHl_Base::minPulse
Ifx_TimerValue minPulse
minimum pulse that is output, shorter pulse time will be output as 0% duty cycle
Definition: IfxGtm_Tom_PwmHl.h:171
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:249
IfxStdIf_PwmHl_Config::minPulse
float32 minPulse
Min pulse allowed as active state for the top and bottom PWM in seconds.
Definition: IfxStdIf_PwmHl.h:203
Ifx_Pwm_Mode_centerAlignedInverted
Center aligned inverted aligned mode.
Definition: Ifx_Types.h:178
IfxGtm_Tom_PwmHl_Base::deadtime
Ifx_TimerValue deadtime
Dead time between the top and bottom channel in ticks.
Definition: IfxGtm_Tom_PwmHl.h:170
IfxGtm_Tom_ToutMap::channel
IfxGtm_Tom_Ch channel
TOM channel index.
Definition: IfxGtm_PinMap.h:127
IfxGtm_Tom_Tgc_trigger
void IfxGtm_Tom_Tgc_trigger(Ifx_GTM_TOM_TGC *tgc)
Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG)
Definition: IfxGtm_Tom.c:552
IfxStdIf_PwmHl_::setMode
IfxStdIf_PwmHl_SetMode setMode
IfxStdIf_PwmHl_SetMode.
Definition: IfxStdIf_PwmHl.h:190
Ifx_Pwm_Mode_rightAligned
Right aligned mode. The PWM period starts with a falling edge.
Definition: Ifx_Types.h:180
IfxStdIf_PwmHl_Config::outputMode
IfxPort_OutputMode outputMode
Output mode of ccx and coutx pins.
Definition: IfxStdIf_PwmHl.h:207
IfxGtm_Tom_PwmHl_s::update
IfxGtm_Tom_PwmHl_Update update
Update function for actual selected mode.
Definition: IfxGtm_Tom_PwmHl.h:215
IfxGtm_Tom_Timer
TOM Timer interface Handle.
Definition: IfxGtm_Tom_Timer.h:161
IfxGtm_Tom_PwmHl_s::updatePulse
IfxGtm_Tom_PwmHl_UpdatePulse updatePulse
Update pulse function for actual selected mode.
Definition: IfxGtm_Tom_PwmHl.h:217
IfxStdIf_PwmHl_SetDeadtime
boolean(* IfxStdIf_PwmHl_SetDeadtime)(IfxStdIf_InterfaceDriver stdIf, float32 deadtime)
Set the dead time in s.
Definition: IfxStdIf_PwmHl.h:86
IfxGtm_Tom_PwmHl_s
GTM TOM PWM driver.
Definition: IfxGtm_Tom_PwmHl.h:211
IfxPort_State_low
Ifx_P pin is set to low.
Definition: IfxPort.h:191
IfxGtm_Tom_PwmHl_s::timer
IfxGtm_Tom_Timer * timer
Pointer to the linked timer object.
Definition: IfxGtm_Tom_PwmHl.h:214
IfxGtm_Tom_PwmHl_updateShiftCenterAligned
IFX_STATIC void IfxGtm_Tom_PwmHl_updateShiftCenterAligned(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Update Shift Center Aligned.
Definition: IfxGtm_Tom_PwmHl.c:702
IfxGtm_Tom_PwmHl_s::tgc
Ifx_GTM_TOM_TGC * tgc
TGC unit used.
Definition: IfxGtm_Tom_PwmHl.h:219
IfxGtm_Tom_PwmHl_s::tom
Ifx_GTM_TOM * tom
TOM unit used.
Definition: IfxGtm_Tom_PwmHl.h:218
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxStdIf_PwmHl_Config::channelCount
uint8 channelCount
Number of PWM channels, one channel is made of a top and bottom channel.
Definition: IfxStdIf_PwmHl.h:204
IfxGtm_Tom_Ch_OutputTrigger_forward
Forward the trigger from the previous channel.
Definition: IfxGtm_Tom.h:97
IfxGtm_Tom_PwmHl_s::coutxTemp
IfxGtm_Tom_Ch * coutxTemp
cached value
Definition: IfxGtm_Tom_PwmHl.h:223
IfxGtm_Tom_Ch_setClockSource
void IfxGtm_Tom_Ch_setClockSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ClkSrc clock)
Sets the channel clock source.
Definition: IfxGtm_Tom.c:209
IfxGtm_Tom_PwmHl_Mode
Structure for PWM configuration.
Definition: IfxGtm_Tom_PwmHl.h:200
IfxGtm_Tom_Ch_getClockSource
IfxGtm_Tom_Ch_ClkSrc IfxGtm_Tom_Ch_getClockSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the channel clock source.
Definition: IfxGtm_Tom.c:92
IfxGtm_Tom_Tgc_setChannelsForceUpdate
void IfxGtm_Tom_Tgc_setChannelsForceUpdate(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
Enable/disable one or more channels for the force update feature (FUPD)
Definition: IfxGtm_Tom.c:530
IfxStdIf_PwmHl_::setMinPulse
IfxStdIf_PwmHl_SetMinPulse setMinPulse
IfxStdIf_PwmHl_SetMinPulse.
Definition: IfxStdIf_PwmHl.h:187
IfxGtm_Tom_Tgc_enableChannelsOutput
void IfxGtm_Tom_Tgc_enableChannelsOutput(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels output (OUTEN)
Definition: IfxGtm_Tom.c:464
IfxStdIf_PwmHl_::setOnTimeAndShift
IfxStdIf_PwmHl_SetOnTimeAndShift setOnTimeAndShift
IfxStdIf_PwmHl_SetOnTime.
Definition: IfxStdIf_PwmHl.h:192
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxGtm_Tom_PwmHl_s::ccx
IfxGtm_Tom_Ch ccx[IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS]
TOM channels used for the CCCX outputs.
Definition: IfxGtm_Tom_PwmHl.h:220
IfxGtm_Tom_0
TOM object 0.
Definition: IfxGtm_cfg.h:419
IfxGtm_Tom_PwmHl_Base::inverted
boolean inverted
Flag indicating the center aligned inverted mode (TRUE)
Definition: IfxGtm_Tom_PwmHl.h:177
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:248
IfxStdIf_PwmHl_SetOnTime
void(* IfxStdIf_PwmHl_SetOnTime)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue *tOn)
Set the pwm ON time.
Definition: IfxStdIf_PwmHl.h:140
IfxGtm_Tom_Timer::base
IfxGtm_Tom_Timer_Base base
Timer base structure.
Definition: IfxGtm_Tom_Timer.h:163
IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS
#define IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS
Maximal number of channels handled by the driver. One channel has a top and bottom pwm output Limited...
Definition: IfxGtm_Tom_PwmHl.h:146
IfxStdIf_PwmHl_::getMode
IfxStdIf_PwmHl_GetMode getMode
IfxStdIf_PwmHl_GetMode.
Definition: IfxStdIf_PwmHl.h:189
IfxGtm_Tom_PwmHl_setOnTime
void IfxGtm_Tom_PwmHl_setOnTime(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Sets the ON time.
Definition: IfxGtm_Tom_PwmHl.c:389
IfxStdIf_PwmHl_SetOnTimeAndShift
void(* IfxStdIf_PwmHl_SetOnTimeAndShift)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Set the pwm ON time and shift value.
Definition: IfxStdIf_PwmHl.h:148
IfxStdIf_PwmHl_GetDeadtime
float32(* IfxStdIf_PwmHl_GetDeadtime)(IfxStdIf_InterfaceDriver stdIf)
Return the dead time in s.
Definition: IfxStdIf_PwmHl.h:94
IfxStdIf_PwmHl_::setDeadtime
IfxStdIf_PwmHl_SetDeadtime setDeadtime
IfxStdIf_PwmHl_SetDeadtime.
Definition: IfxStdIf_PwmHl.h:184
IfxGtm_Tom_PwmHl_s::updateAndShift
IfxGtm_Tom_PwmHl_UpdateShift updateAndShift
Update shift function for actual selected mode.
Definition: IfxGtm_Tom_PwmHl.h:216
IfxGtm_Tom_PwmHl_Config::tom
IfxGtm_Tom tom
TOM unit used.
Definition: IfxGtm_Tom_PwmHl.h:191
IfxGtm_Tom_PwmHl_updateEdgeAligned
IFX_STATIC void IfxGtm_Tom_PwmHl_updateEdgeAligned(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in edge aligned modes (left and right aligned)
Definition: IfxGtm_Tom_PwmHl.c:510
IfxGtm_Tom_Tgc_enableChannels
void IfxGtm_Tom_Tgc_enableChannels(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels (ENDIS)
Definition: IfxGtm_Tom.c:446
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxStdIf_PwmHl_Config::coutxActiveState
Ifx_ActiveState coutxActiveState
Bottom PWM active state.
Definition: IfxStdIf_PwmHl.h:212
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
IfxGtm_Tom_Timer::timerChannel
IfxGtm_Tom_Ch timerChannel
TOM channel used for the timer.
Definition: IfxGtm_Tom_Timer.h:168
IfxGtm_Tom_PwmHl_Config::initPins
boolean initPins
TRUE: Initialize pins in driver FALSE: Don&#39;t initialize pins in driver: user handles separately...
Definition: IfxGtm_Tom_PwmHl.h:194
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxGtm_Tom_PwmHl_Config::ccx
IFX_CONST IfxGtm_Tom_ToutMapP * ccx
Pointer to an array of size base.channelCount/2 containing the channels used. All channels used for c...
Definition: IfxGtm_Tom_PwmHl.h:192
IfxStdIf_PwmHl_SetMode
boolean(* IfxStdIf_PwmHl_SetMode)(IfxStdIf_InterfaceDriver stdIf, Ifx_Pwm_Mode mode)
Set the pwm mode.
Definition: IfxStdIf_PwmHl.h:133
IfxGtm_Tom_Ch_ClkSrc
IfxGtm_Tom_Ch_ClkSrc
Clock source for the TOM channels.
Definition: IfxGtm_Tom.h:83
IfxGtm_Tom_PwmHl_Base
Multi-channels PWM object definition (channels only)
Definition: IfxGtm_Tom_PwmHl.h:168
IfxGtm_Tom_Timer_getOffset
Ifx_TimerValue IfxGtm_Tom_Timer_getOffset(IfxGtm_Tom_Timer *driver)
Returns the initial timer offset in ticks.
Definition: IfxGtm_Tom_Timer.c:150
IfxGtm_Tom_PwmHl_updateOff
IFX_STATIC void IfxGtm_Tom_PwmHl_updateOff(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Set the outputs to inactive.
Definition: IfxGtm_Tom_PwmHl.c:570


iLLD_TC38A: IfxGtm_Tom_PwmHl.h Source File

  • Gtm
  • Tom
  • PwmHl
IfxGtm_Tom_PwmHl.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Tom_PwmHl.h
3 * \brief GTM PWMHL details
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Gtm_Tom_PwmHl_Usage How to use the GTM TOM PWM Driver
42 * \ingroup IfxLld_Gtm_Tom_PwmHl
43 *
44 * This driver implements the PWM functionalities as defined by \ref library_srvsw_stdif_pwmhl.
45 * The user is free to use either the driver specific APIs below or to used the \ref library_srvsw_stdif_pwmhl "standard interface APIs".
46 *
47 * \section specific Specific implementation
48 * The PWM driver is a concatenation of a \ref IfxLld_Gtm_Tom_Timer "timer" with additional PWM generation cells.
49 *
50 * The timer is implemented as described in \ref IfxLld_Gtm_Tom_Timer, it generate an internal trigger
51 * that is used to synchronize all the TOM channel used (shown in red in the pictures below).
52 *
53 * The picture below presents two configuration examples:
54 * - On the left, the timer and trigger are generated using the same TOM channel CH0. The 3 dual-complementary
55 * PWMs, CCx and COUTx, are generated using 6 additional TOM channels (CH1 to Ch6).
56 * - On the right, the timer and the trigger uses separate TOM channels to allow the triggering of the ADC
57 * conversions. The order of the CCx and COUTx has been allocated freely between CH9 up to CH14.
58 *
59 * \image html "IfxGtm_Tom_PwmHl-0.png" "PWM implementations on GTM TOM"
60 *
61 *
62 * Each of the TOM channel used for the generation of the CCx and COUTx signals are configured as in the figure below:
63 *
64 * \image html "IfxGtm_Tom_PwmHl-1.png" "TOM channel configuration".
65 *
66 * The internal trigger (red line) is generated by the \ref IfxLld_Gtm_Tom_Timer "timer" on timer rest and used by the
67 * TOM PWM channels to reset the counters CN0 and transfer the shadow values saved in SR0 and SR1 to the
68 * CM0 and CM1 registers. When the counter CN0 reach the values of the CM0 or CM1 compare registers,
69 * a rising or falling edge is generated on the output PWM signal. The signal active state configuration
70 * define which of the CM0 or CM1 is generating the falling or rising edge.
71 *
72 * This trigger mechanism ensure that all the PWM channels, period and trigger are updated at the
73 * exact same time, avoiding any possibility for glitch or incoherent signals.
74 *
75 * The clock use is the same as the timer clock.
76 *
77 * In order to ensure a coherent update of all registers, the internal trigger must be disable before updating
78 * the timer, trigger and PWM duty cycles shadow values, and enabled once the update is done. The transfer will ocucrs at the next timer reset.
79 *
80 * \subsection features Features
81 * - This implementation allows from 1 up to 3 dual-complementary PWM channels.
82 * - Resources used:
83 * - Additionally to the linked timer resources used, the following resources are used:
84 * - 2 TOM channels per PWM channels
85 * - All TOM channels used must be own by the same TOM and TGC as for the linked timer
86 * - The TOM channel used for the timer must always have a lower index than the TOM channels
87 * used for the pwm.
88 * - All TOM channels used (including the timer and the trigger) must be contiguous but the order of the TOM channels is free.
89 *
90 *
91 * For a detailed configuration of the microcontroller, see \ref IfxGtm_Tom_PwmHl_init().
92 *
93 * \section example Usage Example
94 * Initialisation is done by, e.g:
95 * \code
96 * IfxGtm_Tom_PwmHl_Config driverConfig;
97 * IfxGtm_Tom_PwmHl driverData;
98 * IfxStdIf_PwmHl pwmhl;
99 * IfxGtm_Tom_PwmHl_initConfig(&driverConfig, &MODULE_GTM);
100 * IfxGtm_Tom_PwmHl_init(&driverData, &driverConfig);
101 * IfxGtm_Tom_PwmHl_stdIfPwmHlInit(pwmhl, &driverData);
102 * \endcode
103 *
104 * During run-time, \ref library_srvsw_stdif_pwmhl "the interface functions" shall be used, e.g.:
105 * \code
106 * IfxStdIf_Timer* timer = IfxStdIf_PwmHl_getTimer(pwmhl);
107 * Ifx_TimerValue onTime[3]; // assume configured for three HL channels
108 *
109 * onTime[0] = 10;
110 * onTime[1] = 20;
111 * onTime[2] = 30;
112 *
113 * IfxStdIf_Timer_disableUpdate(timer);
114 * IfxStdIf_Timer_setPeriod(timer, period);
115 * IfxStdIf_PwmHl_setOnTime(pwmhl, onTime);
116 * IfxStdIf_Timer_applyUpdate(timer);
117 * \endcode
118 *
119 * \defgroup IfxLld_Gtm_Tom_PwmHl TOM PWM HL Interface Driver
120 * \ingroup IfxLld_Gtm_Tom
121 * \defgroup IfxLld_Gtm_Tom_PwmHl_Data_Structures Data Structures
122 * \ingroup IfxLld_Gtm_Tom_PwmHl
123 * \defgroup IfxLld_Gtm_Tom_PwmHl_PwmHl_Functions PwmHl Functions
124 * \ingroup IfxLld_Gtm_Tom_PwmHl
125 * \defgroup IfxLld_Gtm_Tom_PwmHl_PwmHl_StdIf_Functions PwmHl StdIf Functions
126 * \ingroup IfxLld_Gtm_Tom_PwmHl
127 */
128
129 #ifndef IFXGTM_TOM_PWMHL_H
130 #define IFXGTM_TOM_PWMHL_H 1
131
132 /******************************************************************************/
133 /*----------------------------------Includes----------------------------------*/
134 /******************************************************************************/
135
136 #include "StdIf/IfxStdIf_PwmHl.h"
137 #include "Gtm/Tom/Timer/IfxGtm_Tom_Timer.h"
138
139 /******************************************************************************/
140 /*-----------------------------------Macros-----------------------------------*/
141 /******************************************************************************/
142
143 /** \brief Maximal number of channels handled by the driver. One channel has a top and bottom pwm output
144 * Limited to 3 because the PWM channels used must be owned by the same TGC
145 */
146 #define IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS (3)
147
148 /******************************************************************************/
149 /*------------------------------Type Definitions------------------------------*/
150 /******************************************************************************/
151
152 typedef struct IfxGtm_Tom_PwmHl_s IfxGtm_Tom_PwmHl;
153
154 typedef void (*IfxGtm_Tom_PwmHl_Update)(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn);
155
156 typedef void (*IfxGtm_Tom_PwmHl_UpdateShift)(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift);
157
158 typedef void (*IfxGtm_Tom_PwmHl_UpdatePulse)(IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset);
159
160 /******************************************************************************/
161 /*-----------------------------Data Structures--------------------------------*/
162 /******************************************************************************/
163
164 /** \addtogroup IfxLld_Gtm_Tom_PwmHl_Data_Structures
165 * \{ */
166 /** \brief Multi-channels PWM object definition (channels only)
167 */
168 typedef struct
169 {
170 Ifx_TimerValue deadtime; /**< \brief Dead time between the top and bottom channel in ticks */
171 Ifx_TimerValue minPulse; /**< \brief minimum pulse that is output, shorter pulse time will be output as 0% duty cycle */
172 Ifx_TimerValue maxPulse; /**< \brief internal parameter */
173 Ifx_Pwm_Mode mode; /**< \brief actual PWM mode */
174 sint8 setMode; /**< \brief A non zero flag indicates that the PWM mode is being modified */
175 Ifx_ActiveState ccxActiveState; /**< \brief Top PWM active state */
176 Ifx_ActiveState coutxActiveState; /**< \brief Bottom PWM active state */
177 boolean inverted; /**< \brief Flag indicating the center aligned inverted mode (TRUE) */
178 uint8 channelCount; /**< \brief Number of PWM channels, one channel is made of a top and bottom channel */
179 } IfxGtm_Tom_PwmHl_Base;
180
181 /** \} */
182
183 /** \addtogroup IfxLld_Gtm_Tom_PwmHl_Data_Structures
184 * \{ */
185 /** \brief GTM TOM: PWM HL configuration
186 */
187 typedef struct
188 {
189 IfxStdIf_PwmHl_Config base; /**< \brief PWM HL standard interface configuration */
190 IfxGtm_Tom_Timer *timer; /**< \brief Pointer to the linked timer object */
191 IfxGtm_Tom tom; /**< \brief TOM unit used */
192 IFX_CONST IfxGtm_Tom_ToutMapP *ccx; /**< \brief Pointer to an array of size base.channelCount/2 containing the channels used. All channels used for ccx and coutx must be adjacent to the channel used for the timer, order is not important. */
193 IFX_CONST IfxGtm_Tom_ToutMapP *coutx; /**< \brief Pointer to an array of size base.channelCount/2 containing the channels used. All channels used for ccx and coutx must be adjacent to the channel used for the timer, order is not important */
194 boolean initPins; /**< \brief TRUE: Initialize pins in driver
195 * FALSE: Don't initialize pins in driver: user handles separately */
196 } IfxGtm_Tom_PwmHl_Config;
197
198 /** \brief Structure for PWM configuration
199 */
200 typedef struct
201 {
202 Ifx_Pwm_Mode mode; /**< \brief Pwm Mode */
203 boolean inverted; /**< \brief Inverted configuration for the selected mode */
204 IfxGtm_Tom_PwmHl_Update update; /**< \brief update call back function for the selected mode */
205 IfxGtm_Tom_PwmHl_UpdateShift updateAndShift; /**< \brief update shift call back function for the selected mode */
206 IfxGtm_Tom_PwmHl_UpdatePulse updatePulse; /**< \brief update pulse call back function for the selected mode */
207 } IfxGtm_Tom_PwmHl_Mode;
208
209 /** \brief GTM TOM PWM driver
210 */
211 struct IfxGtm_Tom_PwmHl_s
212 {
213 IfxGtm_Tom_PwmHl_Base base; /**< \brief Multi-channels PWM object definition (channels only) */
214 IfxGtm_Tom_Timer *timer; /**< \brief Pointer to the linked timer object */
215 IfxGtm_Tom_PwmHl_Update update; /**< \brief Update function for actual selected mode */
216 IfxGtm_Tom_PwmHl_UpdateShift updateAndShift; /**< \brief Update shift function for actual selected mode */
217 IfxGtm_Tom_PwmHl_UpdatePulse updatePulse; /**< \brief Update pulse function for actual selected mode */
218 Ifx_GTM_TOM *tom; /**< \brief TOM unit used */
219 Ifx_GTM_TOM_TGC *tgc; /**< \brief TGC unit used */
220 IfxGtm_Tom_Ch ccx[IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS]; /**< \brief TOM channels used for the CCCX outputs */
221 IfxGtm_Tom_Ch coutx[IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS]; /**< \brief TOM channels used for the OUTX outputs */
222 IfxGtm_Tom_Ch *ccxTemp; /**< \brief cached value */
223 IfxGtm_Tom_Ch *coutxTemp; /**< \brief cached value */
224 };
225
226 /** \} */
227
228 /** \addtogroup IfxLld_Gtm_Tom_PwmHl_PwmHl_Functions
229 * \{ */
230
231 /******************************************************************************/
232 /*-------------------------Global Function Prototypes-------------------------*/
233 /******************************************************************************/
234
235 /** \brief Initializes the timer object
236 * note To ensure that the channels counter are reset by the timer and do not overflow, leading to random signal on the output, the timer must be started before the call to this function.
237 * Note: all PWM channels must use the same TGC
238 * Note: the current implementation must use the same TGC for the timer and PWM channels
239 * \param driver GTM TOM PWM driver
240 * \param config GTM TOM: PWM HL configuration
241 * \return TRUE on success else FALSE
242 */
243 IFX_EXTERN boolean IfxGtm_Tom_PwmHl_init(IfxGtm_Tom_PwmHl *driver, const IfxGtm_Tom_PwmHl_Config *config);
244
245 /** \brief Initialize the configuration structure to default
246 * \param config Channel configuration. This parameter is Initialised by the function
247 * \return None
248 */
249 IFX_EXTERN void IfxGtm_Tom_PwmHl_initConfig(IfxGtm_Tom_PwmHl_Config *config);
250
251 /** \} */
252
253 /** \addtogroup IfxLld_Gtm_Tom_PwmHl_PwmHl_StdIf_Functions
254 * \{ */
255
256 /******************************************************************************/
257 /*-------------------------Global Function Prototypes-------------------------*/
258 /******************************************************************************/
259
260 /** \brief Returns the dead time
261 * \see IfxStdIf_PwmHl_GetDeadtime
262 * \param driver GTM TOM PWM driver
263 * \return Dead Time
264 */
265 IFX_EXTERN float32 IfxGtm_Tom_PwmHl_getDeadtime(IfxGtm_Tom_PwmHl *driver);
266
267 /** \brief Returns the minimum pulse
268 * \see IfxStdIf_PwmHl_GetMinPulse
269 * \param driver GTM TOM PWM driver
270 * \return Min Pulse
271 */
272 IFX_EXTERN float32 IfxGtm_Tom_PwmHl_getMinPulse(IfxGtm_Tom_PwmHl *driver);
273
274 /** \brief Returns Pwm mode
275 * \see IfxStdIf_PwmHl_GetMode
276 * \param driver GTM TOM PWM driver
277 * \return Pwm mode
278 */
279 IFX_EXTERN Ifx_Pwm_Mode IfxGtm_Tom_PwmHl_getMode(IfxGtm_Tom_PwmHl *driver);
280
281 /** \brief Sets the dead time
282 * \see IfxStdIf_PwmHl_setDeadtime
283 * \param driver GTM TOM PWM driver
284 * \param deadtime Dead time value
285 * \return TRUE on success else FALSE
286 */
287 IFX_EXTERN boolean IfxGtm_Tom_PwmHl_setDeadtime(IfxGtm_Tom_PwmHl *driver, float32 deadtime);
288
289 /** \brief Sets the minimum pulse
290 * \see IfxStdIf_PwmHl_setMinPulse
291 * \param driver GTM TOM PWM driver
292 * \param minPulse Minimum pulse
293 * \return TRUE on success else FALSE
294 */
295 IFX_EXTERN boolean IfxGtm_Tom_PwmHl_setMinPulse(IfxGtm_Tom_PwmHl *driver, float32 minPulse);
296
297 /** \brief Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate()
298 * \see IfxStdIf_PwmHl_SetMode
299 * \param driver GTM TOM PWM driver
300 * \param mode Pwm mode
301 * \return TRUE on success else FALSE
302 */
303 IFX_EXTERN boolean IfxGtm_Tom_PwmHl_setMode(IfxGtm_Tom_PwmHl *driver, Ifx_Pwm_Mode mode);
304
305 /** \brief Sets the ON time
306 * \see IfxStdIf_PwmHl_SetOnTime
307 * \param driver GTM TOM PWM driver
308 * \param tOn ON time
309 * \return None
310 */
311 IFX_EXTERN void IfxGtm_Tom_PwmHl_setOnTime(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn);
312
313 /** \brief Sets the ON time and Shift
314 * \param driver GTM TOM PWM driver
315 * \param tOn ON time
316 * \param shift Shift value in ticks
317 * \return None
318 */
319 IFX_EXTERN void IfxGtm_Tom_PwmHl_setOnTimeAndShift(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift);
320
321 /** \brief Sets the ON time and offset, all switched are independent
322 * \param driver GTM TOM PWM driver
323 * \param tOn ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
324 * \param offset Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
325 * \return None
326 */
327 IFX_EXTERN void IfxGtm_Tom_PwmHl_setPulse(IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset);
328
329 /** \brief Set up channels
330 * \see IfxStdIf_PwmHl_SetupChannels
331 * \param driver GTM TOM PWM driver
332 * \param activeCh Active channel
333 * \param stuckSt Stuck state
334 * \return None
335 */
336 IFX_EXTERN void IfxGtm_Tom_PwmHl_setupChannels(IfxGtm_Tom_PwmHl *driver, boolean *activeCh, boolean *stuckSt);
337
338 /** \brief Initialises the statndard interface Pwm
339 * \param stdif Standard interface object, will be initialized by the function
340 * \param driver Interface driver to be used by the standard interface. must be initialised separately
341 * \return TRUE on success else FALSE
342 */
343 IFX_EXTERN boolean IfxGtm_Tom_PwmHl_stdIfPwmHlInit(IfxStdIf_PwmHl *stdif, IfxGtm_Tom_PwmHl *driver);
344
345 /** \} */
346
347 #endif /* IFXGTM_TOM_PWMHL_H */
Ifx_Pwm_Mode
Ifx_Pwm_Mode
Definition: Ifx_Types.h:175
IfxGtm_Tom_PwmHl_Config::coutx
IFX_CONST IfxGtm_Tom_ToutMapP * coutx
Pointer to an array of size base.channelCount/2 containing the channels used. All channels used for c...
Definition: IfxGtm_Tom_PwmHl.h:193
IfxGtm_Tom_PwmHl_getMinPulse
IFX_EXTERN float32 IfxGtm_Tom_PwmHl_getMinPulse(IfxGtm_Tom_PwmHl *driver)
Returns the minimum pulse.
Definition: IfxGtm_Tom_PwmHl.c:154
IfxGtm_Tom_PwmHl_Base::maxPulse
Ifx_TimerValue maxPulse
internal parameter
Definition: IfxGtm_Tom_PwmHl.h:172
IfxGtm_Tom_PwmHl_Base::channelCount
uint8 channelCount
Number of PWM channels, one channel is made of a top and bottom channel.
Definition: IfxGtm_Tom_PwmHl.h:178
IfxGtm_Tom_PwmHl_setMinPulse
IFX_EXTERN boolean IfxGtm_Tom_PwmHl_setMinPulse(IfxGtm_Tom_PwmHl *driver, float32 minPulse)
Sets the minimum pulse.
Definition: IfxGtm_Tom_PwmHl.c:309
IfxGtm_Tom_PwmHl_setPulse
IFX_EXTERN void IfxGtm_Tom_PwmHl_setPulse(IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
Sets the ON time and offset, all switched are independent.
Definition: IfxGtm_Tom_PwmHl.c:401
IfxGtm_Tom_PwmHl_setDeadtime
IFX_EXTERN boolean IfxGtm_Tom_PwmHl_setDeadtime(IfxGtm_Tom_PwmHl *driver, float32 deadtime)
Sets the dead time.
Definition: IfxGtm_Tom_PwmHl.c:300
IfxGtm_Tom_PwmHl_s::base
IfxGtm_Tom_PwmHl_Base base
Multi-channels PWM object definition (channels only)
Definition: IfxGtm_Tom_PwmHl.h:213
IfxGtm_Tom_PwmHl_Config::base
IfxStdIf_PwmHl_Config base
PWM HL standard interface configuration.
Definition: IfxGtm_Tom_PwmHl.h:189
IfxGtm_Tom_PwmHl_stdIfPwmHlInit
IFX_EXTERN boolean IfxGtm_Tom_PwmHl_stdIfPwmHlInit(IfxStdIf_PwmHl *stdif, IfxGtm_Tom_PwmHl *driver)
Initialises the statndard interface Pwm.
Definition: IfxGtm_Tom_PwmHl.c:416
float32
float float32
Definition: Platform_Types.h:170
IfxGtm_Tom_PwmHl_Update
void(* IfxGtm_Tom_PwmHl_Update)(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Definition: IfxGtm_Tom_PwmHl.h:154
IfxGtm_Tom_PwmHl_setOnTimeAndShift
IFX_EXTERN void IfxGtm_Tom_PwmHl_setOnTimeAndShift(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets the ON time and Shift.
Definition: IfxGtm_Tom_PwmHl.c:395
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:113
IfxGtm_Tom_PwmHl_getDeadtime
IFX_EXTERN float32 IfxGtm_Tom_PwmHl_getDeadtime(IfxGtm_Tom_PwmHl *driver)
Returns the dead time.
Definition: IfxGtm_Tom_PwmHl.c:148
IfxGtm_Tom_PwmHl_setMode
IFX_EXTERN boolean IfxGtm_Tom_PwmHl_setMode(IfxGtm_Tom_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate()
Definition: IfxGtm_Tom_PwmHl.c:320
IfxGtm_Tom_PwmHl_getMode
IFX_EXTERN Ifx_Pwm_Mode IfxGtm_Tom_PwmHl_getMode(IfxGtm_Tom_PwmHl *driver)
Returns Pwm mode.
Definition: IfxGtm_Tom_PwmHl.c:160
IfxGtm_Tom_PwmHl_setupChannels
IFX_EXTERN void IfxGtm_Tom_PwmHl_setupChannels(IfxGtm_Tom_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set up channels.
Definition: IfxGtm_Tom_PwmHl.c:407
IfxGtm_Tom_PwmHl_Base::ccxActiveState
Ifx_ActiveState ccxActiveState
Top PWM active state.
Definition: IfxGtm_Tom_PwmHl.h:175
IfxGtm_Tom_Ch
IfxGtm_Tom_Ch
Enum for TOM channels.
Definition: IfxGtm_cfg.h:428
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxGtm_Tom_PwmHl_Base::setMode
sint8 setMode
A non zero flag indicates that the PWM mode is being modified.
Definition: IfxGtm_Tom_PwmHl.h:174
IfxGtm_Tom_PwmHl_Base::mode
Ifx_Pwm_Mode mode
actual PWM mode
Definition: IfxGtm_Tom_PwmHl.h:173
IfxGtm_Tom_PwmHl_s::coutx
IfxGtm_Tom_Ch coutx[IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS]
TOM channels used for the OUTX outputs.
Definition: IfxGtm_Tom_PwmHl.h:221
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxGtm_Tom_PwmHl_Config
GTM TOM: PWM HL configuration.
Definition: IfxGtm_Tom_PwmHl.h:187
IfxGtm_Tom_PwmHl_initConfig
IFX_EXTERN void IfxGtm_Tom_PwmHl_initConfig(IfxGtm_Tom_PwmHl_Config *config)
Initialize the configuration structure to default.
Definition: IfxGtm_Tom_PwmHl.c:289
IfxGtm_Tom_PwmHl_s::ccxTemp
IfxGtm_Tom_Ch * ccxTemp
cached value
Definition: IfxGtm_Tom_PwmHl.h:222
IfxStdIf_PwmHl_Config
Multi-channels PWM object configuration.
Definition: IfxStdIf_PwmHl.h:200
IfxGtm_Tom_PwmHl_Base::coutxActiveState
Ifx_ActiveState coutxActiveState
Bottom PWM active state.
Definition: IfxGtm_Tom_PwmHl.h:176
Ifx_GTM_TOM_TGC
volatile struct IfxGtm_Tom_TGC Ifx_GTM_TOM_TGC
Definition: IfxGtm_cfg.h:233
IfxStdIf_PwmHl_
Standard interface object.
Definition: IfxStdIf_PwmHl.h:179
IfxGtm_Tom_PwmHl_UpdatePulse
void(* IfxGtm_Tom_PwmHl_UpdatePulse)(IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
Definition: IfxGtm_Tom_PwmHl.h:158
IfxGtm_Tom_PwmHl_init
IFX_EXTERN boolean IfxGtm_Tom_PwmHl_init(IfxGtm_Tom_PwmHl *driver, const IfxGtm_Tom_PwmHl_Config *config)
Initializes the timer object note To ensure that the channels counter are reset by the timer and do n...
Definition: IfxGtm_Tom_PwmHl.c:166
IfxGtm_Tom_ToutMap
TOM TOUT pin mapping structure.
Definition: IfxGtm_PinMap.h:124
IfxGtm_Tom_PwmHl_Base::minPulse
Ifx_TimerValue minPulse
minimum pulse that is output, shorter pulse time will be output as 0% duty cycle
Definition: IfxGtm_Tom_PwmHl.h:171
IfxGtm_Tom_PwmHl_Base::deadtime
Ifx_TimerValue deadtime
Dead time between the top and bottom channel in ticks.
Definition: IfxGtm_Tom_PwmHl.h:170
IfxGtm_Tom_PwmHl_Mode::update
IfxGtm_Tom_PwmHl_Update update
update call back function for the selected mode
Definition: IfxGtm_Tom_PwmHl.h:204
IfxStdIf_PwmHl.h
Standard interface: Multi-channels, dual-complementary PWM interface.
IfxGtm_Tom_Timer
TOM Timer interface Handle.
Definition: IfxGtm_Tom_Timer.h:161
IfxGtm_Tom_PwmHl_Mode::updatePulse
IfxGtm_Tom_PwmHl_UpdatePulse updatePulse
update pulse call back function for the selected mode
Definition: IfxGtm_Tom_PwmHl.h:206
IfxGtm_Tom_PwmHl_s
GTM TOM PWM driver.
Definition: IfxGtm_Tom_PwmHl.h:211
IfxGtm_Tom_PwmHl_Config::timer
IfxGtm_Tom_Timer * timer
Pointer to the linked timer object.
Definition: IfxGtm_Tom_PwmHl.h:190
IfxGtm_Tom_PwmHl_s::tgc
Ifx_GTM_TOM_TGC * tgc
TGC unit used.
Definition: IfxGtm_Tom_PwmHl.h:219
IfxGtm_Tom_PwmHl_s::tom
Ifx_GTM_TOM * tom
TOM unit used.
Definition: IfxGtm_Tom_PwmHl.h:218
IfxGtm_Tom
IfxGtm_Tom
Enum for TOM objects.
Definition: IfxGtm_cfg.h:417
IfxGtm_Tom_PwmHl_s::coutxTemp
IfxGtm_Tom_Ch * coutxTemp
cached value
Definition: IfxGtm_Tom_PwmHl.h:223
IfxGtm_Tom_PwmHl_Mode
Structure for PWM configuration.
Definition: IfxGtm_Tom_PwmHl.h:200
IfxGtm_Tom_PwmHl_s::ccx
IfxGtm_Tom_Ch ccx[IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS]
TOM channels used for the CCCX outputs.
Definition: IfxGtm_Tom_PwmHl.h:220
IfxGtm_Tom_PwmHl_Base::inverted
boolean inverted
Flag indicating the center aligned inverted mode (TRUE)
Definition: IfxGtm_Tom_PwmHl.h:177
IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS
#define IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS
Maximal number of channels handled by the driver. One channel has a top and bottom pwm output Limited...
Definition: IfxGtm_Tom_PwmHl.h:146
IfxGtm_Tom_PwmHl_setOnTime
IFX_EXTERN void IfxGtm_Tom_PwmHl_setOnTime(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Sets the ON time.
Definition: IfxGtm_Tom_PwmHl.c:389
IfxGtm_Tom_PwmHl_Mode::updateAndShift
IfxGtm_Tom_PwmHl_UpdateShift updateAndShift
update shift call back function for the selected mode
Definition: IfxGtm_Tom_PwmHl.h:205
IfxGtm_Tom_PwmHl_Config::tom
IfxGtm_Tom tom
TOM unit used.
Definition: IfxGtm_Tom_PwmHl.h:191
IfxGtm_Tom_PwmHl_UpdateShift
void(* IfxGtm_Tom_PwmHl_UpdateShift)(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Definition: IfxGtm_Tom_PwmHl.h:156
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
IfxGtm_Tom_PwmHl_Config::initPins
boolean initPins
TRUE: Initialize pins in driver FALSE: Don&#39;t initialize pins in driver: user handles separately...
Definition: IfxGtm_Tom_PwmHl.h:194
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxGtm_Tom_PwmHl_Config::ccx
IFX_CONST IfxGtm_Tom_ToutMapP * ccx
Pointer to an array of size base.channelCount/2 containing the channels used. All channels used for c...
Definition: IfxGtm_Tom_PwmHl.h:192
sint8
signed char sint8
Definition: Platform_Types.h:125
IfxGtm_Tom_PwmHl_Base
Multi-channels PWM object definition (channels only)
Definition: IfxGtm_Tom_PwmHl.h:168
IfxGtm_Tom_Timer.h
GTM TIMER details.


iLLD_TC38A: IfxGtm_Tom_Timer.c Source File

  • Gtm
  • Tom
  • Timer
IfxGtm_Tom_Timer.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Tom_Timer.c
3 * \brief GTM TIMER details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxGtm_Tom_Timer.h"
47 #include "_Utilities/Ifx_Assert.h"
48 #include "IfxGtm_bf.h"
49 #include "stddef.h"
50 #include "string.h"
51
52 /******************************************************************************/
53 /*-------------------------Function Implementations---------------------------*/
54 /******************************************************************************/
55
56 boolean IfxGtm_Tom_Timer_acknowledgeTimerIrq(IfxGtm_Tom_Timer *driver)
57 {
58 boolean event;
59
60 event = IfxGtm_Tom_Ch_isZeroNotification(driver->tom, driver->timerChannel);
61
62 if (event)
63 {
64 IfxGtm_Tom_Ch_clearZeroNotification(driver->tom, driver->timerChannel);
65 }
66 else
67 {}
68
69 return event;
70 }
71
72
73 boolean IfxGtm_Tom_Timer_acknowledgeTriggerIrq(IfxGtm_Tom_Timer *driver)
74 {
75 boolean event;
76
77 event = IfxGtm_Tom_Ch_isOneNotification(driver->tom, driver->triggerChannel);
78
79 if (event)
80 {
81 IfxGtm_Tom_Ch_clearOneNotification(driver->tom, driver->triggerChannel);
82 }
83 else
84 {}
85
86 return event;
87 }
88
89
90 void IfxGtm_Tom_Timer_addToChannelMask(IfxGtm_Tom_Timer *driver, IfxGtm_Tom_Ch channel)
91 {
92 if (driver->timerChannel <= IfxGtm_Tom_Ch_7)
93 {
94 if (channel <= IfxGtm_Tom_Ch_7)
95 {
96 driver->channelsMask[0] |= 1 << channel;
97 driver->tgcGlobalControlDisableUpdate[0] = IfxGtm_Tom_Tgc_buildFeature(0, driver->channelsMask[0], IFX_GTM_TOM_TGC_GLB_CTRL_UPEN_CTRL0_OFF);
98 driver->tgcGlobalControlApplyUpdate[0] = IfxGtm_Tom_Tgc_buildFeature(driver->channelsMask[0], 0, IFX_GTM_TOM_TGC_GLB_CTRL_UPEN_CTRL0_OFF);
99 }
100 else
101 {
102 driver->channelsMask[1] |= 1 << (channel - IfxGtm_Tom_Ch_8);
103 driver->tgcGlobalControlDisableUpdate[1] = IfxGtm_Tom_Tgc_buildFeature(0, driver->channelsMask[1], IFX_GTM_TOM_TGC_GLB_CTRL_UPEN_CTRL0_OFF);
104 driver->tgcGlobalControlApplyUpdate[1] = IfxGtm_Tom_Tgc_buildFeature(driver->channelsMask[1], 0, IFX_GTM_TOM_TGC_GLB_CTRL_UPEN_CTRL0_OFF);
105 }
106 }
107 else
108 {
109 driver->channelsMask[0] |= 1 << (channel - IfxGtm_Tom_Ch_8);
110 driver->tgcGlobalControlDisableUpdate[0] = IfxGtm_Tom_Tgc_buildFeature(0, driver->channelsMask[0], IFX_GTM_TOM_TGC_GLB_CTRL_UPEN_CTRL0_OFF);
111 driver->tgcGlobalControlApplyUpdate[0] = IfxGtm_Tom_Tgc_buildFeature(driver->channelsMask[0], 0, IFX_GTM_TOM_TGC_GLB_CTRL_UPEN_CTRL0_OFF);
112 }
113 }
114
115
116 void IfxGtm_Tom_Timer_applyUpdate(IfxGtm_Tom_Timer *driver)
117 {
118 IfxGtm_Tom_Tgc_writeGlobalControl(driver->tgc[0], driver->tgcGlobalControlApplyUpdate[0]);
119
120 if (driver->tgc[1])
121 {
122 IfxGtm_Tom_Tgc_writeGlobalControl(driver->tgc[1], driver->tgcGlobalControlApplyUpdate[1]); /* Note: Write of 0 value has no effect */
123 }
124 }
125
126
127 void IfxGtm_Tom_Timer_disableUpdate(IfxGtm_Tom_Timer *driver)
128 {
129 IfxGtm_Tom_Tgc_writeGlobalControl(driver->tgc[0], driver->tgcGlobalControlDisableUpdate[0]);
130
131 if (driver->tgc[1])
132 {
133 IfxGtm_Tom_Tgc_writeGlobalControl(driver->tgc[1], driver->tgcGlobalControlDisableUpdate[1]); /* Note: Write of 0 value has no effect */
134 }
135 }
136
137
138 float32 IfxGtm_Tom_Timer_getFrequency(IfxGtm_Tom_Timer *driver)
139 {
140 return 1.0 / IfxStdIf_Timer_tickToS(driver->base.clockFreq, driver->base.period);
141 }
142
143
144 float32 IfxGtm_Tom_Timer_getInputFrequency(IfxGtm_Tom_Timer *driver)
145 {
146 return driver->base.clockFreq;
147 }
148
149
150 Ifx_TimerValue IfxGtm_Tom_Timer_getOffset(IfxGtm_Tom_Timer *driver)
151 {
152 return driver->offset;
153 }
154
155
156 Ifx_TimerValue IfxGtm_Tom_Timer_getPeriod(IfxGtm_Tom_Timer *driver)
157 {
158 return driver->base.period;
159 }
160
161
162 volatile uint32 *IfxGtm_Tom_Timer_getPointer(IfxGtm_Tom_Timer *driver)
163 {
164 return IfxGtm_Tom_Ch_getTimerPointer(driver->tom, driver->timerChannel);
165 }
166
167
168 float32 IfxGtm_Tom_Timer_getResolution(IfxGtm_Tom_Timer *driver)
169 {
170 return 1.0 / driver->base.clockFreq;
171 }
172
173
174 Ifx_TimerValue IfxGtm_Tom_Timer_getTrigger(IfxGtm_Tom_Timer *driver)
175 {
176 return IfxGtm_Tom_Ch_getCompareOne(driver->tom, driver->triggerChannel) - 1;
177 }
178
179
180 volatile uint32 *IfxGtm_Tom_Timer_getTriggerPointer(IfxGtm_Tom_Timer *driver)
181 {
182 return IfxGtm_Tom_Ch_getCompareOnePointer(driver->tom, driver->triggerChannel);
183 }
184
185
186 boolean IfxGtm_Tom_Timer_init(IfxGtm_Tom_Timer *driver, const IfxGtm_Tom_Timer_Config *config)
187 {
188 boolean result = TRUE;
189 IfxGtm_Tom_Timer_Base *base = &driver->base;
190 uint16 maskShift;
191
192 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->base.countDir == IfxStdIf_Timer_CountDir_up); /* only this mode is supported */
193
194 driver->gtm = config->gtm;
195 driver->tomIndex = config->tom;
196 driver->tom = &config->gtm->TOM[config->tom];
197 driver->timerChannel = config->timerChannel;
198
199 /*
200 * IfxGtm_Dtm dtmIndex = IfxGtm_Dtm_getTomChannelDtmIndex(config->tom, config->timerChannel);
201 * boolean dtmAvailable = FALSE;
202 * if (dtmIndex != IfxGtm_Dtm_none)
203 * {
204 * driver->dtm = &config->gtm->CDTM.DTM[dtmIndex];
205 * driver->dtmChannel = (IfxGtm_Dtm_Ch) (config->timerChannel % 4);
206 * dtmAvailable = TRUE;
207 * }
208 * else
209 * {
210 * dtmAvailable = FALSE;
211 * }
212 */
213
214 base->triggerEnabled = config->base.trigger.enabled;
215
216 if (base->triggerEnabled)
217 {
218 if (config->triggerOut != NULL_PTR)
219 {
220 driver->triggerChannel = config->triggerOut->channel;
221 }
222 else
223 {
224 result = FALSE;
225 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, result); /* triggerOut is required */
226 }
227 }
228 else
229 {
230 driver->triggerChannel = driver->timerChannel; // Set to timer channel to disable its use
231 }
232
233 if (config->timerChannel <= 7)
234 {
235 driver->tgc[0] = IfxGtm_Tom_Ch_getTgcPointer(driver->tom, 0);
236 driver->tgc[1] = IfxGtm_Tom_Ch_getTgcPointer(driver->tom, 1);
237 }
238 else
239 {
240 driver->tgc[0] = IfxGtm_Tom_Ch_getTgcPointer(driver->tom, 1);
241 driver->tgc[1] = NULL_PTR; /* NOTE currently no concatenation between TOMs */
242 }
243
244 driver->channelsMask[0] = 0;
245 driver->tgcGlobalControlApplyUpdate[0] = 0;
246 driver->tgcGlobalControlDisableUpdate[0] = 0;
247
248 driver->channelsMask[1] = 0;
249 driver->tgcGlobalControlApplyUpdate[1] = 0;
250 driver->tgcGlobalControlDisableUpdate[1] = 0;
251
252 /* Initialize the timer part */
253 IfxGtm_Tom_Ch_setClockSource(driver->tom, driver->timerChannel, config->clock);
254 IfxGtm_Tom_Ch_setTriggerOutput(driver->tom, driver->timerChannel, IfxGtm_Tom_Ch_OutputTrigger_generate);
255
256 IfxGtm_Tom_Timer_updateInputFrequency(driver);
257
258 if ((config->base.minResolution > 0) && ((1.0 / base->clockFreq) > config->base.minResolution))
259 {
260 result = FALSE;
261 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
262 }
263 else
264 {}
265
266 IfxGtm_Tom_Timer_setFrequency(driver, config->base.frequency);
267
268 driver->offset = IfxStdIf_Timer_sToTick(driver->base.clockFreq, 1.0 / config->base.frequency * config->base.startOffset);
269
270 IfxGtm_Tom_Ch_setCounterValue(driver->tom, driver->timerChannel, driver->offset);
271
272 /* Initialize the trigger part */
273 maskShift = (config->timerChannel <= 7) ? 0 : 8;
274 IfxGtm_Tom_Timer_addToChannelMask(driver, driver->timerChannel);
275
276 if (base->triggerEnabled)
277 {
278 IfxGtm_Tom_Ch triggerChannel = driver->triggerChannel;
279 uint16 triggerChannelMask = 1 << (triggerChannel - maskShift);
280 /* TO DO: enable the trigger to be not in the same TGC group as the timer */
281
282 IfxGtm_Tom_Ch_setSignalLevel(driver->tom, triggerChannel, config->base.trigger.risingEdgeAtPeriod ? Ifx_ActiveState_high : Ifx_ActiveState_low);
283 IfxGtm_Tom_Ch_setCounterValue(driver->tom, triggerChannel, driver->offset);
284
285 if (triggerChannel != driver->timerChannel)
286 {
287 IfxGtm_Tom_Ch_setResetSource(driver->tom, triggerChannel, IfxGtm_Tom_Ch_ResetEvent_onTrigger);
288 IfxGtm_Tom_Ch_setClockSource(driver->tom, triggerChannel, config->clock);
289 IfxGtm_Tom_Ch_setTriggerOutput(driver->tom, triggerChannel, IfxGtm_Tom_Ch_OutputTrigger_forward);
290 IfxGtm_Tom_Tgc_enableChannels(driver->tgc[0], triggerChannelMask, 0, FALSE);
291 IfxGtm_Tom_Timer_addToChannelMask(driver, driver->triggerChannel);
292 }
293 else
294 {}
295
296 /* Signal must go out of the GTM even if the port outpout is not enabled */
297 IfxGtm_Tom_Tgc_enableChannelsOutput(driver->tgc[0], triggerChannelMask, 0, FALSE);
298
299 if ((config->base.trigger.outputEnabled) && (config->initPins == TRUE))
300 {
301 /* Initialize the port */
302 IfxGtm_PinMap_setTomTout(config->triggerOut, config->base.trigger.outputMode, config->base.trigger.outputDriver);
303 }
304 else
305 {}
306
307 IfxGtm_Tom_Timer_setTrigger(driver, config->base.trigger.triggerPoint);
308 }
309 else
310 {}
311
312 /* Interrupt configuration */
313 {
314 volatile Ifx_SRC_SRCR *src;
315 boolean timerHasIrq = config->base.isrPriority > 0;
316 boolean triggerHasIrq = (config->base.trigger.isrPriority > 0) && base->triggerEnabled;
317
318 if (driver->triggerChannel == driver->timerChannel)
319 {
320 IfxGtm_Tom_Ch_setNotification(driver->tom, driver->timerChannel, timerHasIrq ? config->irqModeTimer : config->irqModeTrigger, timerHasIrq, triggerHasIrq);
321 src = IfxGtm_Tom_Ch_getSrcPointer(driver->gtm, config->tom, driver->timerChannel);
322 IfxSrc_init(src, timerHasIrq ? config->base.isrProvider : config->base.trigger.isrProvider, timerHasIrq ? config->base.isrPriority : config->base.trigger.isrPriority);
323 IfxSrc_enable(src);
324 }
325 else
326 {
327 IfxGtm_IrqMode irqMode = IfxGtm_IrqMode_pulseNotify;
328
329 if (timerHasIrq)
330 {
331 IfxGtm_Tom_Ch_setNotification(driver->tom, driver->timerChannel, irqMode, TRUE, FALSE);
332 src = IfxGtm_Tom_Ch_getSrcPointer(driver->gtm, config->tom, driver->timerChannel);
333 IfxSrc_init(src, config->base.isrProvider, config->base.isrPriority);
334 IfxSrc_enable(src);
335 }
336
337 if (triggerHasIrq)
338 {
339 IfxGtm_Tom_Ch_setNotification(driver->tom, driver->triggerChannel, irqMode, FALSE, TRUE);
340 src = IfxGtm_Tom_Ch_getSrcPointer(driver->gtm, config->tom, driver->triggerChannel);
341 IfxSrc_init(src, config->base.trigger.isrProvider, config->base.trigger.isrPriority);
342 IfxSrc_enable(src);
343 }
344 }
345 }
346
347 /* Transfer the shadow registers */
348 IfxGtm_Tom_Tgc_setChannelsForceUpdate(driver->tgc[0], driver->channelsMask[0], 0, 0, 0);
349 IfxGtm_Tom_Tgc_trigger(driver->tgc[0]);
350 IfxGtm_Tom_Tgc_setChannelsForceUpdate(driver->tgc[0], 0, driver->channelsMask[0], 0, 0);
351
352 /*
353 * if (dtmAvailable)
354 * {
355 * // bypassing the DTM functionality
356 * IfxGtm_Dtm_setClockSource(driver->dtm, config->dtmClockSource);
357 * IfxGtm_Dtm_setOutput0DeadTimePath(driver->dtm, driver->dtmChannel, IfxGtm_Dtm_DeadTimePath_feedThrough);
358 *
359 * IfxGtm_Dtm_setOutput1Select(driver->dtm, driver->dtmChannel, IfxGtm_Dtm_Output1Select_specialFunction);
360 * IfxGtm_Dtm_setOutput1Function(driver->dtm, driver->dtmChannel, IfxGtm_Dtm_Output1Function_dtmInputSignal);
361 * IfxGtm_Dtm_setOutput1DeadTimePath(driver->dtm, driver->dtmChannel, IfxGtm_Dtm_DeadTimePath_enable);
362 * }
363 */
364
365 return result;
366 }
367
368
369 void IfxGtm_Tom_Timer_initConfig(IfxGtm_Tom_Timer_Config *config, Ifx_GTM *gtm)
370 {
371 IfxStdIf_Timer_initConfig(&config->base);
372 config->gtm = gtm;
373 config->tom = IfxGtm_Tom_0;
374 config->timerChannel = IfxGtm_Tom_Ch_0;
375 config->triggerOut = NULL_PTR;
376 config->clock = IfxGtm_Tom_Ch_ClkSrc_cmuFxclk0;
377 config->base.countDir = IfxStdIf_Timer_CountDir_up;
378 config->irqModeTimer = IfxGtm_IrqMode_level;
379 config->irqModeTrigger = IfxGtm_IrqMode_level;
380 config->initPins = TRUE;
381
382 // config->dtmClockSource = IfxGtm_Dtm_ClockSource_cmuClock1;
383 }
384
385
386 void IfxGtm_Tom_Timer_run(IfxGtm_Tom_Timer *driver)
387 {
388 IfxGtm_Tom_Tgc_enableChannels(driver->tgc[0], driver->channelsMask[0], 0, TRUE);
389
390 if (driver->tgc[1])
391 {
392 IfxGtm_Tom_Tgc_enableChannels(driver->tgc[1], driver->channelsMask[1], 0, TRUE); /* Note: Write of 0 value has no effect */
393 }
394 }
395
396
397 boolean IfxGtm_Tom_Timer_setFrequency(IfxGtm_Tom_Timer *driver, float32 frequency)
398 {
399 Ifx_TimerValue period = IfxStdIf_Timer_sToTick(driver->base.clockFreq, 1.0 / frequency);
400
401 return IfxGtm_Tom_Timer_setPeriod(driver, period);
402 }
403
404
405 boolean IfxGtm_Tom_Timer_setPeriod(IfxGtm_Tom_Timer *driver, Ifx_TimerValue period)
406 {
407 driver->base.period = period;
408 IfxGtm_Tom_Ch_setCompareZeroShadow(driver->tom, driver->timerChannel, period);
409
410 if (driver->triggerChannel != driver->timerChannel)
411 {
412 IfxGtm_Tom_Ch_setCompareZeroShadow(driver->tom, driver->triggerChannel, period);
413 }
414
415 return TRUE;
416 }
417
418
419 void IfxGtm_Tom_Timer_setSingleMode(IfxGtm_Tom_Timer *driver, boolean enabled)
420 {
421 IfxGtm_Tom_Ch_setOneShotMode(driver->tom, driver->timerChannel, enabled);
422 }
423
424
425 void IfxGtm_Tom_Timer_setTrigger(IfxGtm_Tom_Timer *driver, Ifx_TimerValue triggerPoint)
426 {
427 IfxGtm_Tom_Ch_setCompareOneShadow(driver->tom, driver->triggerChannel, triggerPoint + 1);
428 }
429
430
431 boolean IfxGtm_Tom_Timer_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxGtm_Tom_Timer *driver)
432 {
433 /* Ensure the stdif is reset to zeros */
434 memset(stdif, 0, sizeof(IfxStdIf_Timer));
435
436 /* *INDENT-OFF* Note: this file was indented manually by the author. */
437 /* Set the API link */
438 stdif->driver = driver;
439 stdif->getFrequency =(IfxStdIf_Timer_GetFrequency )&IfxGtm_Tom_Timer_getFrequency;
440 stdif->getPeriod =(IfxStdIf_Timer_GetPeriod )&IfxGtm_Tom_Timer_getPeriod;
441 stdif->getResolution =(IfxStdIf_Timer_GetResolution )&IfxGtm_Tom_Timer_getResolution;
442 stdif->getTrigger =(IfxStdIf_Timer_GetTrigger )&IfxGtm_Tom_Timer_getTrigger;
443 stdif->setFrequency =(IfxStdIf_Timer_SetFrequency )&IfxGtm_Tom_Timer_setFrequency;
444 stdif->updateInputFrequency =(IfxStdIf_Timer_UpdateInputFrequency)&IfxGtm_Tom_Timer_updateInputFrequency;
445 stdif->applyUpdate =(IfxStdIf_Timer_ApplyUpdate )&IfxGtm_Tom_Timer_applyUpdate;
446 stdif->disableUpdate =(IfxStdIf_Timer_DisableUpdate )&IfxGtm_Tom_Timer_disableUpdate;
447 stdif->getInputFrequency =(IfxStdIf_Timer_GetInputFrequency )&IfxGtm_Tom_Timer_getInputFrequency;
448 stdif->run =(IfxStdIf_Timer_Run )&IfxGtm_Tom_Timer_run;
449 stdif->setPeriod =(IfxStdIf_Timer_SetPeriod )&IfxGtm_Tom_Timer_setPeriod;
450 stdif->setSingleMode =(IfxStdIf_Timer_SetSingleMode )&IfxGtm_Tom_Timer_setSingleMode;
451 stdif->setTrigger =(IfxStdIf_Timer_SetTrigger )&IfxGtm_Tom_Timer_setTrigger;
452 stdif->stop =(IfxStdIf_Timer_Stop )&IfxGtm_Tom_Timer_stop;
453 stdif->ackTimerIrq =(IfxStdIf_Timer_AckTimerIrq )&IfxGtm_Tom_Timer_acknowledgeTimerIrq;
454 stdif->ackTriggerIrq =(IfxStdIf_Timer_AckTriggerIrq )&IfxGtm_Tom_Timer_acknowledgeTriggerIrq;
455 /* *INDENT-ON* */
456
457 return TRUE;
458 }
459
460
461 void IfxGtm_Tom_Timer_stop(IfxGtm_Tom_Timer *driver)
462 {
463 IfxGtm_Tom_Tgc_enableChannels(driver->tgc[0], 0, driver->channelsMask[0], TRUE);
464
465 if (driver->tgc[1])
466 {
467 IfxGtm_Tom_Tgc_enableChannels(driver->tgc[1], 0, driver->channelsMask[1], TRUE); /* Note: Write of 0 value has no effect */
468 }
469 }
470
471
472 void IfxGtm_Tom_Timer_updateInputFrequency(IfxGtm_Tom_Timer *driver)
473 {
474 driver->base.clockFreq = IfxGtm_Tom_Ch_getClockFrequency(driver->gtm, driver->tom, driver->timerChannel);
475 }
Ifx_ActiveState_high
The signal is high active.
Definition: Ifx_Types.h:116
IfxStdIf_Timer_::getTrigger
IfxStdIf_Timer_GetTrigger getTrigger
Definition: IfxStdIf_Timer.h:243
Ifx_ActiveState_low
The signal is low active.
Definition: Ifx_Types.h:115
IfxGtm_Tom_Timer_addToChannelMask
void IfxGtm_Tom_Timer_addToChannelMask(IfxGtm_Tom_Timer *driver, IfxGtm_Tom_Ch channel)
Add a channel to the channel mask Channels present in the mask are started, stopped, updated at the same time as the timer: IfxGtm_Tom_Timer_applyUpdate, IfxGtm_Tom_Timer_disableUpdate, IfxGtm_Tom_Timer_stop, IfxGtm_Tom_Timer_run.
Definition: IfxGtm_Tom_Timer.c:90
IfxGtm_Tom_Timer_Base::clockFreq
float32 clockFreq
Timer input clock frequency (cached value)
Definition: IfxGtm_Tom_Timer.h:151
IfxGtm_Tom_Ch_setTriggerOutput
void IfxGtm_Tom_Ch_setTriggerOutput(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_OutputTrigger trigger)
Sets the channel trigger output.
Definition: IfxGtm_Tom.c:348
IfxStdIf_Timer_GetTrigger
Ifx_TimerValue(* IfxStdIf_Timer_GetTrigger)(IfxStdIf_InterfaceDriver stdIf)
Return the timer trigger point.
Definition: IfxStdIf_Timer.h:117
IfxGtm_Tom_Timer_setFrequency
boolean IfxGtm_Tom_Timer_setFrequency(IfxGtm_Tom_Timer *driver, float32 frequency)
Sets the frequency.
Definition: IfxGtm_Tom_Timer.c:397
IfxGtm_Tom_Timer_Config::tom
IfxGtm_Tom tom
Index of the TOM object used.
Definition: IfxGtm_Tom_Timer.h:184
IfxStdIf_Timer_Config::isrProvider
IfxSrc_Tos isrProvider
Interrupt service provider for the timer interrupt.
Definition: IfxStdIf_Timer.h:276
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxGtm_Tom_Timer::gtm
Ifx_GTM * gtm
Pointer to GTM module.
Definition: IfxGtm_Tom_Timer.h:164
IfxGtm_IrqMode_level
Definition: IfxGtm.h:66
IfxGtm_Tom_Ch_getCompareOnePointer
volatile uint32 * IfxGtm_Tom_Ch_getCompareOnePointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare one pointer.
Definition: IfxGtm_Tom.c:112
IfxStdIf_Timer_GetFrequency
float32(* IfxStdIf_Timer_GetFrequency)(IfxStdIf_InterfaceDriver stdIf)
Return the timer frequency in Hz.
Definition: IfxStdIf_Timer.h:99
IfxGtm_Tom_Timer_Config::initPins
boolean initPins
TRUE : Initialize pins in driver. FALSE: Don&#39;t initialize pins : handled separately by user...
Definition: IfxGtm_Tom_Timer.h:191
IfxGtm_Tom_Tgc_buildFeature
uint32 IfxGtm_Tom_Tgc_buildFeature(uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable.
Definition: IfxGtm_Tom.c:356
IfxGtm_Tom_Ch_isZeroNotification
boolean IfxGtm_Tom_Ch_isZeroNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the status of channel Zero notification.
Definition: IfxGtm_Tom.c:186
IfxGtm_Tom_Timer_getPointer
volatile uint32 * IfxGtm_Tom_Timer_getPointer(IfxGtm_Tom_Timer *driver)
Returns the pointer to timer channel.
Definition: IfxGtm_Tom_Timer.c:162
IfxStdIf_Timer_AckTriggerIrq
boolean(* IfxStdIf_Timer_AckTriggerIrq)(IfxStdIf_InterfaceDriver stdIf)
Return the trigger interrupt flag and reset it.
Definition: IfxStdIf_Timer.h:233
IfxStdIf_Timer_UpdateInputFrequency
void(* IfxStdIf_Timer_UpdateInputFrequency)(IfxStdIf_InterfaceDriver stdIf)
Indicates the stdIf that the imput frequency has changed and that it should be taken in account...
Definition: IfxStdIf_Timer.h:131
IfxGtm_Tom_Ch_setResetSource
void IfxGtm_Tom_Ch_setResetSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ResetEvent event)
Sets the channel clock source either from local or from previous channel.
Definition: IfxGtm_Tom.c:321
IfxStdIf_Timer_::stop
IfxStdIf_Timer_Stop stop
Definition: IfxStdIf_Timer.h:253
IfxStdIf_Timer_::setSingleMode
IfxStdIf_Timer_SetSingleMode setSingleMode
Definition: IfxStdIf_Timer.h:251
IfxGtm_Tom_Timer_getTriggerPointer
volatile uint32 * IfxGtm_Tom_Timer_getTriggerPointer(IfxGtm_Tom_Timer *driver)
Returns the pointer to trigger channel.
Definition: IfxGtm_Tom_Timer.c:180
IfxGtm_Tom_Timer_disableUpdate
void IfxGtm_Tom_Timer_disableUpdate(IfxGtm_Tom_Timer *driver)
Disables the upadte.
Definition: IfxGtm_Tom_Timer.c:127
IfxStdIf_Timer_::driver
IfxStdIf_InterfaceDriver driver
Interface driver object.
Definition: IfxStdIf_Timer.h:239
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk0
div 1
Definition: IfxGtm_Tom.h:85
IfxGtm_PinMap_setTomTout
void IfxGtm_PinMap_setTomTout(IfxGtm_Tom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Definition: IfxGtm_PinMap.c:2420
memset
void * memset(void *s, int c, syze_t n)
IfxStdIf_Timer_tickToS
IFX_INLINE float32 IfxStdIf_Timer_tickToS(float32 clockFreq, Ifx_TimerValue ticks)
Convert timer ticks to seconds.
Definition: IfxStdIf_Timer.h:435
IfxGtm_Tom_Ch_setSignalLevel
void IfxGtm_Tom_Ch_setSignalLevel(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, Ifx_ActiveState activeState)
Sets the signal level.
Definition: IfxGtm_Tom.c:329
IfxStdIf_Timer_TrigConfig::outputDriver
IfxPort_PadDriver outputDriver
Output pad driver.
Definition: IfxStdIf_Timer.h:266
IfxGtm_Tom_Ch_isOneNotification
boolean IfxGtm_Tom_Ch_isOneNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the status of channel One notification.
Definition: IfxGtm_Tom.c:177
IfxGtm_Tom_Ch_getTgcPointer
Ifx_GTM_TOM_TGC * IfxGtm_Tom_Ch_getTgcPointer(Ifx_GTM_TOM *tom, uint32 tgcIndex)
Returns the TGC pointer.
Definition: IfxGtm_Tom.c:153
IfxGtm_Tom_Ch_setNotification
void IfxGtm_Tom_Ch_setNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne)
Sets the channel notification.
Definition: IfxGtm_Tom.c:286
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxGtm_Tom_Timer::tgcGlobalControlApplyUpdate
uint32 tgcGlobalControlApplyUpdate[2]
Cached value for TGC GLOB_CTR.
Definition: IfxGtm_Tom_Timer.h:173
IfxStdIf_Timer_SetFrequency
boolean(* IfxStdIf_Timer_SetFrequency)(IfxStdIf_InterfaceDriver stdIf, float32 frequency)
Set the timer frequency in Hz.
Definition: IfxStdIf_Timer.h:125
IfxStdIf_Timer_sToTick
IFX_INLINE Ifx_TimerValue IfxStdIf_Timer_sToTick(float32 clockFreq, float32 seconds)
Convert seconds to timer ticks.
Definition: IfxStdIf_Timer.h:446
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
float32
float float32
Definition: Platform_Types.h:170
IfxStdIf_Timer_
Standard interface object.
Definition: IfxStdIf_Timer.h:237
Ifx_Assert.h
Assert functions.
IfxGtm_Tom_Timer::offset
Ifx_TimerValue offset
Timer initial offset in ticks.
Definition: IfxGtm_Tom_Timer.h:171
IfxStdIf_Timer_::getFrequency
IfxStdIf_Timer_GetFrequency getFrequency
Definition: IfxStdIf_Timer.h:240
IfxGtm_Tom_Timer_getFrequency
float32 IfxGtm_Tom_Timer_getFrequency(IfxGtm_Tom_Timer *driver)
Returns the frequency.
Definition: IfxGtm_Tom_Timer.c:138
IfxGtm_Tom_Timer_setTrigger
void IfxGtm_Tom_Timer_setTrigger(IfxGtm_Tom_Timer *driver, Ifx_TimerValue triggerPoint)
Sets the trigger.
Definition: IfxGtm_Tom_Timer.c:425
IfxGtm_Tom_Timer_Base::period
Ifx_TimerValue period
Timer period in ticks (cached value)
Definition: IfxGtm_Tom_Timer.h:149
IfxStdIf_Timer_GetResolution
float32(* IfxStdIf_Timer_GetResolution)(IfxStdIf_InterfaceDriver stdIf)
Return the timer resolution in seconds.
Definition: IfxStdIf_Timer.h:111
IfxGtm_Tom_Timer_getResolution
float32 IfxGtm_Tom_Timer_getResolution(IfxGtm_Tom_Timer *driver)
Returns the resolution.
Definition: IfxGtm_Tom_Timer.c:168
IfxGtm_Tom_Timer_Config::base
IfxStdIf_Timer_Config base
Standard interface timer configuration.
Definition: IfxGtm_Tom_Timer.h:182
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxGtm_Tom_Timer_acknowledgeTriggerIrq
boolean IfxGtm_Tom_Timer_acknowledgeTriggerIrq(IfxGtm_Tom_Timer *driver)
Returns the trigger event.
Definition: IfxGtm_Tom_Timer.c:73
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxGtm_Tom_Ch
IfxGtm_Tom_Ch
Enum for TOM channels.
Definition: IfxGtm_cfg.h:428
IfxStdIf_Timer_Config::isrPriority
Ifx_Priority isrPriority
Interrupt isrPriority of the timer interrupt, if 0 the interrupt is disable.
Definition: IfxStdIf_Timer.h:275
IfxGtm_Tom_Ch_setOneShotMode
void IfxGtm_Tom_Ch_setOneShotMode(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the one shot mode.
Definition: IfxGtm_Tom.c:304
IfxGtm_Tom_Timer_Config::irqModeTimer
IfxGtm_IrqMode irqModeTimer
Interrupt mode for the timer.
Definition: IfxGtm_Tom_Timer.h:188
IfxGtm_Tom_Timer_getInputFrequency
float32 IfxGtm_Tom_Timer_getInputFrequency(IfxGtm_Tom_Timer *driver)
Returns the Input frequncy.
Definition: IfxGtm_Tom_Timer.c:144
IfxGtm_Tom_Timer_acknowledgeTimerIrq
boolean IfxGtm_Tom_Timer_acknowledgeTimerIrq(IfxGtm_Tom_Timer *driver)
Returns the timer event.
Definition: IfxGtm_Tom_Timer.c:56
IfxGtm_Tom_Ch_getClockFrequency
float32 IfxGtm_Tom_Ch_getClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the TOM channel input clock frequency in Hz.
Definition: IfxGtm_Tom.c:68
IfxGtm_Tom_Timer_run
void IfxGtm_Tom_Timer_run(IfxGtm_Tom_Timer *driver)
Runs the timer.
Definition: IfxGtm_Tom_Timer.c:386
IfxGtm_Tom_Ch_ResetEvent_onTrigger
Definition: IfxGtm_Tom.h:106
IfxStdIf_Timer_::disableUpdate
IfxStdIf_Timer_DisableUpdate disableUpdate
Definition: IfxStdIf_Timer.h:247
IfxGtm_Tom_Timer::tgc
Ifx_GTM_TOM_TGC * tgc[2]
Pointer to the TGC object.
Definition: IfxGtm_Tom_Timer.h:166
IfxGtm_Tom_Ch_clearZeroNotification
void IfxGtm_Tom_Ch_clearZeroNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Clears the channel Zero notification.
Definition: IfxGtm_Tom.c:61
IfxStdIf_Timer_GetInputFrequency
float32(* IfxStdIf_Timer_GetInputFrequency)(IfxStdIf_InterfaceDriver stdIf)
Return the timer input frequency in Hz.
Definition: IfxStdIf_Timer.h:175
IfxStdIf_Timer_SetTrigger
void(* IfxStdIf_Timer_SetTrigger)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue triggerPoint)
Set trigger point.
Definition: IfxStdIf_Timer.h:215
IfxGtm_Tom_Timer_Config
Configuration structure for TOM Timer.
Definition: IfxGtm_Tom_Timer.h:180
IfxGtm_Tom_Timer_stdIfTimerInit
boolean IfxGtm_Tom_Timer_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxGtm_Tom_Timer *driver)
Initializes the standard interface timer.
Definition: IfxGtm_Tom_Timer.c:431
IfxGtm_Tom_Ch_setCounterValue
void IfxGtm_Tom_Ch_setCounterValue(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 value)
Sets the counter value.
Definition: IfxGtm_Tom.c:267
IfxGtm_Tom_Timer::tom
Ifx_GTM_TOM * tom
Pointer to the TOM object.
Definition: IfxGtm_Tom_Timer.h:165
IfxStdIf_Timer_Config::countDir
IfxStdIf_Timer_CountDir countDir
Timer counting mode.
Definition: IfxStdIf_Timer.h:279
IfxStdIf_Timer_TrigConfig::risingEdgeAtPeriod
boolean risingEdgeAtPeriod
Set the clock signal polarity, if TRUE, the rising edge is at the period, else at the trigger offset...
Definition: IfxStdIf_Timer.h:267
IfxGtm_Tom_Ch_getCompareOne
uint32 IfxGtm_Tom_Ch_getCompareOne(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare one value.
Definition: IfxGtm_Tom.c:104
IfxGtm_Tom_Timer_getTrigger
Ifx_TimerValue IfxGtm_Tom_Timer_getTrigger(IfxGtm_Tom_Timer *driver)
Returns the trigger point.
Definition: IfxGtm_Tom_Timer.c:174
IfxGtm_Tom_Timer_applyUpdate
void IfxGtm_Tom_Timer_applyUpdate(IfxGtm_Tom_Timer *driver)
Enables the transfer of the shadow registers.
Definition: IfxGtm_Tom_Timer.c:116
IfxStdIf_Timer_initConfig
void IfxStdIf_Timer_initConfig(IfxStdIf_Timer_Config *config)
Definition: IfxStdIf_Timer.c:45
IfxGtm_Tom_ToutMap::channel
IfxGtm_Tom_Ch channel
TOM channel index.
Definition: IfxGtm_PinMap.h:127
IfxGtm_Tom_Tgc_trigger
void IfxGtm_Tom_Tgc_trigger(Ifx_GTM_TOM_TGC *tgc)
Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG)
Definition: IfxGtm_Tom.c:552
IfxGtm_Tom_Ch_clearOneNotification
void IfxGtm_Tom_Ch_clearOneNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Clears the channel One notification.
Definition: IfxGtm_Tom.c:54
IfxStdIf_Timer_CountDir_up
Timer is counting up.
Definition: IfxStdIf_Timer.h:87
IfxGtm_Tom_Timer_Base::triggerEnabled
boolean triggerEnabled
If TRUE, the trigger functionality is Initialised.
Definition: IfxGtm_Tom_Timer.h:150
IfxStdIf_Timer_::getInputFrequency
IfxStdIf_Timer_GetInputFrequency getInputFrequency
Definition: IfxStdIf_Timer.h:248
IfxGtm_Tom_Ch_getSrcPointer
volatile Ifx_SRC_SRCR * IfxGtm_Tom_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Tom tom, IfxGtm_Tom_Ch channel)
Returns a pointer to the TOM channel SRC.
Definition: IfxGtm_Tom.c:146
IfxGtm_Tom_Timer
TOM Timer interface Handle.
Definition: IfxGtm_Tom_Timer.h:161
IfxGtm_Tom_Timer_setSingleMode
void IfxGtm_Tom_Timer_setSingleMode(IfxGtm_Tom_Timer *driver, boolean enabled)
Sets the single shot mode of the timer.
Definition: IfxGtm_Tom_Timer.c:419
IfxGtm_Tom_Timer_updateInputFrequency
void IfxGtm_Tom_Timer_updateInputFrequency(IfxGtm_Tom_Timer *driver)
Updates the input frequency.
Definition: IfxGtm_Tom_Timer.c:472
IfxGtm_IrqMode_pulseNotify
Definition: IfxGtm.h:68
IfxGtm_Tom_Ch_setCompareOneShadow
void IfxGtm_Tom_Ch_setCompareOneShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowOne)
Sets the compare 1 shadow value.
Definition: IfxGtm_Tom.c:234
IfxStdIf_Timer_TrigConfig::triggerPoint
Ifx_TimerValue triggerPoint
Trigger point in timer ticks.
Definition: IfxStdIf_Timer.h:262
IfxGtm_Tom_Ch_0
TOM channel 0.
Definition: IfxGtm_cfg.h:431
IfxGtm_Tom_Ch_getTimerPointer
volatile uint32 * IfxGtm_Tom_Ch_getTimerPointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the Timer pointer.
Definition: IfxGtm_Tom.c:170
IfxGtm_Tom_Timer_setPeriod
boolean IfxGtm_Tom_Timer_setPeriod(IfxGtm_Tom_Timer *driver, Ifx_TimerValue period)
Sets the period for the timer.
Definition: IfxGtm_Tom_Timer.c:405
IfxStdIf_Timer_::setTrigger
IfxStdIf_Timer_SetTrigger setTrigger
Definition: IfxStdIf_Timer.h:252
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxGtm_Tom_Ch_OutputTrigger_forward
Forward the trigger from the previous channel.
Definition: IfxGtm_Tom.h:97
IfxGtm_Tom_Timer_Config::clock
IfxGtm_Tom_Ch_ClkSrc clock
Timer input clock.
Definition: IfxGtm_Tom_Timer.h:187
IfxGtm_Tom_Timer::channelsMask
uint16 channelsMask[2]
Mask for channels to be modified together, The 1st value corresponds to the Timer&#39;s TGC...
Definition: IfxGtm_Tom_Timer.h:170
IfxGtm_Tom_Ch_setClockSource
void IfxGtm_Tom_Ch_setClockSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ClkSrc clock)
Sets the channel clock source.
Definition: IfxGtm_Tom.c:209
IfxStdIf_Timer_::setFrequency
IfxStdIf_Timer_SetFrequency setFrequency
Definition: IfxStdIf_Timer.h:244
IfxStdIf_Timer_::run
IfxStdIf_Timer_Run run
Definition: IfxStdIf_Timer.h:249
IfxStdIf_Timer_::updateInputFrequency
IfxStdIf_Timer_UpdateInputFrequency updateInputFrequency
Definition: IfxStdIf_Timer.h:245
IfxGtm_Tom_Tgc_setChannelsForceUpdate
void IfxGtm_Tom_Tgc_setChannelsForceUpdate(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
Enable/disable one or more channels for the force update feature (FUPD)
Definition: IfxGtm_Tom.c:530
IfxGtm_Tom_Tgc_enableChannelsOutput
void IfxGtm_Tom_Tgc_enableChannelsOutput(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels output (OUTEN)
Definition: IfxGtm_Tom.c:464
IfxStdIf_Timer_GetPeriod
Ifx_TimerValue(* IfxStdIf_Timer_GetPeriod)(IfxStdIf_InterfaceDriver stdIf)
Return the timer period in ticks.
Definition: IfxStdIf_Timer.h:105
IfxGtm_Tom_Timer_initConfig
void IfxGtm_Tom_Timer_initConfig(IfxGtm_Tom_Timer_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default.
Definition: IfxGtm_Tom_Timer.c:369
IfxStdIf_Timer_DisableUpdate
void(* IfxStdIf_Timer_DisableUpdate)(IfxStdIf_InterfaceDriver stdIf)
Disable updates.
Definition: IfxStdIf_Timer.h:169
IfxGtm_Tom_Timer_stop
void IfxGtm_Tom_Timer_stop(IfxGtm_Tom_Timer *driver)
Stops the timer.
Definition: IfxGtm_Tom_Timer.c:461
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxGtm_Tom_0
TOM object 0.
Definition: IfxGtm_cfg.h:419
IfxGtm_Tom_Tgc_writeGlobalControl
IFX_INLINE void IfxGtm_Tom_Tgc_writeGlobalControl(Ifx_GTM_TOM_TGC *tgc, uint32 control)
Sets the tgc global control value.
Definition: IfxGtm_Tom.h:546
IfxStdIf_Timer_::setPeriod
IfxStdIf_Timer_SetPeriod setPeriod
Definition: IfxStdIf_Timer.h:250
IfxGtm_Tom_Timer_Config::triggerOut
IfxGtm_Tom_ToutMap * triggerOut
TOM channel used for the trigger output, can be identical to the timer channel.
Definition: IfxGtm_Tom_Timer.h:186
IfxStdIf_Timer_::ackTriggerIrq
IfxStdIf_Timer_AckTriggerIrq ackTriggerIrq
Definition: IfxStdIf_Timer.h:255
IfxGtm_Tom_Timer::base
IfxGtm_Tom_Timer_Base base
Timer base structure.
Definition: IfxGtm_Tom_Timer.h:163
IfxStdIf_Timer_Config::frequency
float32 frequency
PWM frequency in Hz. This parameter is only used to initialise the timer structure. An additional cell is required to build the timer.
Definition: IfxStdIf_Timer.h:274
IfxStdIf_Timer_ApplyUpdate
void(* IfxStdIf_Timer_ApplyUpdate)(IfxStdIf_InterfaceDriver stdIf)
Apply requested updates.
Definition: IfxStdIf_Timer.h:152
IfxGtm_Tom_Timer::tomIndex
IfxGtm_Tom tomIndex
Enum for TOM objects.
Definition: IfxGtm_Tom_Timer.h:167
IfxGtm_IrqMode
IfxGtm_IrqMode
Enum for GTM interrupt modes.
Definition: IfxGtm.h:64
IfxGtm_Tom_Ch_7
TOM channel 7.
Definition: IfxGtm_cfg.h:438
IfxStdIf_Timer_Run
void(* IfxStdIf_Timer_Run)(IfxStdIf_InterfaceDriver stdIf)
Immediately start the timer.
Definition: IfxStdIf_Timer.h:184
IfxGtm_Tom_Ch_8
TOM channel 8.
Definition: IfxGtm_cfg.h:439
IfxStdIf_Timer_::getResolution
IfxStdIf_Timer_GetResolution getResolution
Definition: IfxStdIf_Timer.h:242
IfxStdIf_Timer_Config::trigger
IfxStdIf_Timer_TrigConfig trigger
Trigger configuration.
Definition: IfxStdIf_Timer.h:278
IfxGtm_Tom_Timer_Base
Structure for the timer base.
Definition: IfxGtm_Tom_Timer.h:147
IfxGtm_Tom_Timer_getPeriod
Ifx_TimerValue IfxGtm_Tom_Timer_getPeriod(IfxGtm_Tom_Timer *driver)
Returns the period of the timer.
Definition: IfxGtm_Tom_Timer.c:156
IfxGtm_Tom_Tgc_enableChannels
void IfxGtm_Tom_Tgc_enableChannels(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels (ENDIS)
Definition: IfxGtm_Tom.c:446
IfxStdIf_Timer_Config::startOffset
float32 startOffset
FIXME make startOffset as Ifx_TimerValue. Timer initial offset in % of the period.
Definition: IfxStdIf_Timer.h:280
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxStdIf_Timer_Stop
void(* IfxStdIf_Timer_Stop)(IfxStdIf_InterfaceDriver stdIf)
Immediately stops the timer.
Definition: IfxStdIf_Timer.h:221
IfxStdIf_Timer_::applyUpdate
IfxStdIf_Timer_ApplyUpdate applyUpdate
Definition: IfxStdIf_Timer.h:246
IfxStdIf_Timer_AckTimerIrq
boolean(* IfxStdIf_Timer_AckTimerIrq)(IfxStdIf_InterfaceDriver stdIf)
Return the timer interrupt flag and reset it.
Definition: IfxStdIf_Timer.h:227
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
IfxGtm_Tom_Timer::timerChannel
IfxGtm_Tom_Ch timerChannel
TOM channel used for the timer.
Definition: IfxGtm_Tom_Timer.h:168
IfxStdIf_Timer_TrigConfig::enabled
boolean enabled
If true, the trigger functionality is Initialised, else ignored.
Definition: IfxStdIf_Timer.h:261
IfxStdIf_Timer_TrigConfig::outputEnabled
boolean outputEnabled
If TRUE, the output pin is enabled, else disabled. In case the output is disabled, the output pin is not initialized.
Definition: IfxStdIf_Timer.h:268
IfxGtm_Tom_Ch_setCompareZeroShadow
void IfxGtm_Tom_Ch_setCompareZeroShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero)
Sets the compare 0 shadow value.
Definition: IfxGtm_Tom.c:259
IfxStdIf_Timer_SetPeriod
boolean(* IfxStdIf_Timer_SetPeriod)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue period)
Set the timer period.
Definition: IfxStdIf_Timer.h:194
IfxStdIf_Timer_Config::minResolution
float32 minResolution
Minimum resolution of the timer in seconds. if 0, this parameter is ignored. If the configuration doe...
Definition: IfxStdIf_Timer.h:277
IfxGtm_Tom_Timer_Config::irqModeTrigger
IfxGtm_IrqMode irqModeTrigger
Interrupt mode for the trigger.
Definition: IfxGtm_Tom_Timer.h:189
IfxGtm_Tom_Timer_init
boolean IfxGtm_Tom_Timer_init(IfxGtm_Tom_Timer *driver, const IfxGtm_Tom_Timer_Config *config)
Initialises the timer object.
Definition: IfxGtm_Tom_Timer.c:186
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxGtm_Tom_Ch_OutputTrigger_generate
Generate the trigger from the current channel.
Definition: IfxGtm_Tom.h:98
IfxStdIf_Timer_TrigConfig::outputMode
IfxPort_OutputMode outputMode
Output mode.
Definition: IfxStdIf_Timer.h:265
IfxStdIf_Timer_::ackTimerIrq
IfxStdIf_Timer_AckTimerIrq ackTimerIrq
Definition: IfxStdIf_Timer.h:254
IfxStdIf_Timer_SetSingleMode
void(* IfxStdIf_Timer_SetSingleMode)(IfxStdIf_InterfaceDriver stdIf, boolean enabled)
Stop timer at the end of the period.
Definition: IfxStdIf_Timer.h:203
IfxGtm_Tom_Timer_getOffset
Ifx_TimerValue IfxGtm_Tom_Timer_getOffset(IfxGtm_Tom_Timer *driver)
Returns the initial timer offset in ticks.
Definition: IfxGtm_Tom_Timer.c:150
IfxStdIf_Timer_::getPeriod
IfxStdIf_Timer_GetPeriod getPeriod
Definition: IfxStdIf_Timer.h:241
IfxGtm_Tom_Timer.h
GTM TIMER details.
IfxGtm_Tom_Timer::tgcGlobalControlDisableUpdate
uint32 tgcGlobalControlDisableUpdate[2]
Cached value for TGC GLOB_CTR.
Definition: IfxGtm_Tom_Timer.h:172
IfxGtm_Tom_Timer::triggerChannel
IfxGtm_Tom_Ch triggerChannel
TOM channel used for the trigger, can be identical to the timer channel.
Definition: IfxGtm_Tom_Timer.h:169


iLLD_TC38A: IfxGtm_Tom_Timer.h Source File

  • Gtm
  • Tom
  • Timer
IfxGtm_Tom_Timer.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Tom_Timer.h
3 * \brief GTM TIMER details
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Gtm_Tom_Timer_Usage How to use the GTM TOM Timer Driver
42 * \ingroup IfxLld_Gtm_Tom_Timer
43 *
44 * This driver implements the timer functionalities as defined by \ref library_srvsw_stdif_timer.
45 * The user is free to use either the driver specific APIs below or to used the \ref library_srvsw_stdif_timer "standard interface APIs".
46 *
47 * \section specific Specific Implementation
48 * The timer fucntinality is implemented using either a single or 2 TOM channels. The dicision to use 1 or 2 channels is done
49 * depending on the following requirements:
50 * - relative position of the timer channel to the other channels used if any
51 * - need to trigger an other module, for example ADC triggering.
52 *
53 * The figure below show how the TOM is \ref IfxGtm_Tom_Timer_Config "configured" when a single TOM channel is used for the timer and trigger functinalities.
54 * The internal trigger signal (red line) is generated when the counter CN0 reach the CM0 compare register. The value of CM0 act as the period value. This internal
55 * trigger is used to reset the CN0 counter and simultaneously transfer the shadow values for the period value (SR0->CM0)
56 * and trigger edge (SR1->CM1). The internal trigger is used as a trigger input to the next TOM channel.
57 * The trigger signal (output trigger) is generated by the CM0 and CM1 compare values. Depending on the trigger signal active
58 * edge \ref IfxGtm_Tom_Timer_Config "configuiration", the CM0 will reset, and the CM1 will set the trigger signal, or vice versa.
59 *
60 * \image html "IfxGtm_Tom_Timer-0.png" "Timer using one signle TOM channel"
61 *
62 * In case 2 TOM channels are used for the timer and trigger functionalities,
63 * the 1st channel (CHz in the figure below) is used for the generation of the period,
64 * and the 2nd channel (CHz+n the below figure, the figure shows n=1 as example) is used for the trigger generation.
65 *
66 * The CHz TOM channel generates the internal trigger signal (red line) when the counter CN0 reach the CM0 compare register.
67 * The value of CM0 of CHz act as the period value. This internal trigger is used to reset the CN0 counter and simultaneously
68 * transfer the shadow period value (SR0->CM0). The internal trigger is used as an input for the next TOM channel.
69 *
70 * The CHz+n TOM channel, uses the internal trigger signal to simultaneously resets the
71 * counter CN0, and transfer the shadow values used for the generation of the trigger falling and rising edges (SR0->CM0 and SR1->CM1).
72 * The internal trigger is used as a trigger input to the next TOM channel.
73 * Depending on the trigger signal active edge \ref IfxGtm_Tom_Timer_Config "configuiration", the CM0 will reset, and the CM1 will set the trigger signal, or vice versa.
74 * In orter to have a similar behaviour to the single channel implementation,
75 * the CM0 is set to the same value as CHz CM0, and CM1 is used for the trigger edge.
76 *
77 * \image html "IfxGtm_Tom_Timer-1.png" "Timer using two different TOM channels for the timer and the trigger"
78 *
79 *
80 * In order to ensure a coherent update of all registers, the internal trigger must be disable before updating
81 * the timer and trigger shadow values, and enabled once the update is done. The transfer will ocucrs at the next timer reset.
82 *
83 * - Resources used:
84 * - if the trigger channel is identical to the timer channel, only one TOM channels is used
85 * - if the trigger channel is different from the timer channel, 2 TOM channels are used
86 * - All channels used must be own by the same TOM and TOM TGC
87 * - The timer counting direction is limited to \ref IfxStdIf_Timer_CountDir_up
88 * - If the TOM trigger channel is not the same as the TOM timer channels
89 * - The TOM channel used for the trigger must have a lower index than the TOM channels
90 * used for the timer.
91 * - the TOM channels must be contiguous, unless specified by the driver using the timer driver.
92 *
93 * Note: the timer and trigger must bepart of the same TGC, but PWM channels can be of different TGC of the same TOM as the timer
94 *
95 * For a detailed configuration of the microcontroller, see \ref IfxGtm_Tom_Timer_init().
96 *
97 * \section example Usage example
98 * Initialisation:
99 * \code
100 * IfxGtm_Tom_Timer_Config driverConfig;
101 * IfxGtm_Tom_Timer driverData;
102 * IfxStdIf_Timer timer;
103 * IfxGtm_Tom_Timer_initConfig(&driverConfig, &MODULE_GTM);
104 * IfxGtm_Tom_Timer_init (&driverData, &driverConfig);
105 * boolean IfxGtm_Tom_Timer_stdIfTimerInit(&timer, &driverData);
106 * \endcode
107 *
108 * During run-time, \ref library_srvsw_stdif_timer "the interface functions" should be used:
109 * \code
110 * IfxStdIf_Timer_run(timer);
111 * IfxStdIf_Timer_disableUpdate(timer);
112 * IfxStdIf_Timer_setPeriod(timer, period);
113 * IfxStdIf_Timer_applyUpdate(timer);
114 * \endcode
115 *
116 * \defgroup IfxLld_Gtm_Tom_Timer TOM Timer Interface Driver
117 * \ingroup IfxLld_Gtm_Tom
118 * \defgroup IfxLld_Gtm_Tom_Timer_Data_Structures Data Structures
119 * \ingroup IfxLld_Gtm_Tom_Timer
120 * \defgroup IfxLld_Gtm_Tom_Timer_Timer_Functions Timer Functions
121 * \ingroup IfxLld_Gtm_Tom_Timer
122 * \defgroup IfxLld_Gtm_Tom_Timer_Timer_StdIf_Functions Timer StdIf Functions
123 * \ingroup IfxLld_Gtm_Tom_Timer
124 */
125
126 #ifndef IFXGTM_TOM_TIMER_H
127 #define IFXGTM_TOM_TIMER_H 1
128
129 /******************************************************************************/
130 /*----------------------------------Includes----------------------------------*/
131 /******************************************************************************/
132
133 #include "_PinMap/IfxGtm_PinMap.h"
134 #include "Gtm/Std/IfxGtm_Tom.h"
135 #include "Gtm/Std/IfxGtm_Cmu.h"
136 #include "Gtm/Std/IfxGtm_Dtm.h"
137 #include "StdIf/IfxStdIf_Timer.h"
138
139 /******************************************************************************/
140 /*-----------------------------Data Structures--------------------------------*/
141 /******************************************************************************/
142
143 /** \addtogroup IfxLld_Gtm_Tom_Timer_Data_Structures
144 * \{ */
145 /** \brief Structure for the timer base
146 */
147 typedef struct
148 {
149 Ifx_TimerValue period; /**< \brief Timer period in ticks (cached value) */
150 boolean triggerEnabled; /**< \brief If TRUE, the trigger functionality is Initialised */
151 float32 clockFreq; /**< \brief Timer input clock frequency (cached value) */
152 IfxStdIf_Timer_CountDir countDir; /**< \brief Timer counting mode */
153 } IfxGtm_Tom_Timer_Base;
154
155 /** \} */
156
157 /** \addtogroup IfxLld_Gtm_Tom_Timer_Data_Structures
158 * \{ */
159 /** \brief TOM Timer interface Handle
160 */
161 typedef struct
162 {
163 IfxGtm_Tom_Timer_Base base; /**< \brief Timer base structure */
164 Ifx_GTM *gtm; /**< \brief Pointer to GTM module */
165 Ifx_GTM_TOM *tom; /**< \brief Pointer to the TOM object */
166 Ifx_GTM_TOM_TGC *tgc[2]; /**< \brief Pointer to the TGC object */
167 IfxGtm_Tom tomIndex; /**< \brief Enum for TOM objects */
168 IfxGtm_Tom_Ch timerChannel; /**< \brief TOM channel used for the timer */
169 IfxGtm_Tom_Ch triggerChannel; /**< \brief TOM channel used for the trigger, can be identical to the timer channel */
170 uint16 channelsMask[2]; /**< \brief Mask for channels to be modified together, The 1st value corresponds to the Timer's TGC, the 2nd value corresponds to the timer's next TGC if any */
171 Ifx_TimerValue offset; /**< \brief Timer initial offset in ticks */
172 uint32 tgcGlobalControlDisableUpdate[2]; /**< \brief Cached value for TGC GLOB_CTR */
173 uint32 tgcGlobalControlApplyUpdate[2]; /**< \brief Cached value for TGC GLOB_CTR */
174 Ifx_GTM_CDTM_DTM *dtm; /**< \brief Pointer to DTM object used by TOM */
175 IfxGtm_Dtm_Ch dtmChannel; /**< \brief DTM Channel */
176 } IfxGtm_Tom_Timer;
177
178 /** \brief Configuration structure for TOM Timer
179 */
180 typedef struct
181 {
182 IfxStdIf_Timer_Config base; /**< \brief Standard interface timer configuration */
183 Ifx_GTM *gtm; /**< \brief Pointer to GTM module */
184 IfxGtm_Tom tom; /**< \brief Index of the TOM object used */
185 IfxGtm_Tom_Ch timerChannel; /**< \brief TOM channel used for the timer */
186 IfxGtm_Tom_ToutMap *triggerOut; /**< \brief TOM channel used for the trigger output, can be identical to the timer channel */
187 IfxGtm_Tom_Ch_ClkSrc clock; /**< \brief Timer input clock */
188 IfxGtm_IrqMode irqModeTimer; /**< \brief Interrupt mode for the timer */
189 IfxGtm_IrqMode irqModeTrigger; /**< \brief Interrupt mode for the trigger */
190 IfxGtm_Dtm_ClockSource dtmClockSource; /**< \brief DTM clock source */
191 boolean initPins; /**< \brief TRUE : Initialize pins in driver.
192 * FALSE: Don't initialize pins : handled separately by user */
193 } IfxGtm_Tom_Timer_Config;
194
195 /** \} */
196
197 /** \addtogroup IfxLld_Gtm_Tom_Timer_Timer_Functions
198 * \{ */
199
200 /******************************************************************************/
201 /*-------------------------Global Function Prototypes-------------------------*/
202 /******************************************************************************/
203
204 /** \brief Returns the initial timer offset in ticks
205 * \param driver TOM Timer interface Handle
206 * \return Returns the initial timer offset in ticks
207 */
208 IFX_EXTERN Ifx_TimerValue IfxGtm_Tom_Timer_getOffset(IfxGtm_Tom_Timer *driver);
209
210 /** \brief Returns the pointer to timer channel
211 * \param driver TOM Timer interface Handle
212 * \return Pointer
213 */
214 IFX_EXTERN volatile uint32 *IfxGtm_Tom_Timer_getPointer(IfxGtm_Tom_Timer *driver);
215
216 /** \brief Returns the pointer to trigger channel
217 * \param driver TOM Timer interface Handle
218 * \return Pointer
219 */
220 IFX_EXTERN volatile uint32 *IfxGtm_Tom_Timer_getTriggerPointer(IfxGtm_Tom_Timer *driver);
221
222 /** \brief Initialises the timer object
223 * \param driver TOM Timer interface Handle
224 * \param config Configuration structure for TOM Timer
225 * \return TRUE on success else FALSE
226 */
227 IFX_EXTERN boolean IfxGtm_Tom_Timer_init(IfxGtm_Tom_Timer *driver, const IfxGtm_Tom_Timer_Config *config);
228
229 /** \brief Initializes the configuration structure to default
230 * \param config This parameter is Initialised by the function
231 * \param gtm Pointer to GTM module
232 * \return None
233 */
234 IFX_EXTERN void IfxGtm_Tom_Timer_initConfig(IfxGtm_Tom_Timer_Config *config, Ifx_GTM *gtm);
235
236 /** \} */
237
238 /** \addtogroup IfxLld_Gtm_Tom_Timer_Timer_StdIf_Functions
239 * \{ */
240
241 /******************************************************************************/
242 /*-------------------------Global Function Prototypes-------------------------*/
243 /******************************************************************************/
244
245 /** \brief Returns the timer event
246 * \see IfxStdIf_Timer_AckTimerIrq
247 * \param driver TOM Timer interface Handle
248 * \return Timer event
249 */
250 IFX_EXTERN boolean IfxGtm_Tom_Timer_acknowledgeTimerIrq(IfxGtm_Tom_Timer *driver);
251
252 /** \brief Returns the trigger event
253 * \see IfxStdIf_Timer_AckTriggerIrq
254 * \param driver TOM Timer interface Handle
255 * \return Trigger event
256 */
257 IFX_EXTERN boolean IfxGtm_Tom_Timer_acknowledgeTriggerIrq(IfxGtm_Tom_Timer *driver);
258
259 /** \brief Add a channel to the channel mask
260 * Channels present in the mask are started, stopped, updated at the same time as the timer:
261 * IfxGtm_Tom_Timer_applyUpdate, IfxGtm_Tom_Timer_disableUpdate, IfxGtm_Tom_Timer_stop, IfxGtm_Tom_Timer_run
262 * \param driver TOM Timer interface Handle
263 * \param channel Channel to ba added to the mask
264 * \return None
265 */
266 IFX_EXTERN void IfxGtm_Tom_Timer_addToChannelMask(IfxGtm_Tom_Timer *driver, IfxGtm_Tom_Ch channel);
267
268 /** \brief Enables the transfer of the shadow registers
269 * \see IfxStdIf_Timer_ApplyUpdate
270 * Specific implementation: Enable the transfer of the shadow registers
271 * \param driver TOM Timer interface Handle
272 * \return None
273 */
274 IFX_EXTERN void IfxGtm_Tom_Timer_applyUpdate(IfxGtm_Tom_Timer *driver);
275
276 /** \brief Disables the upadte
277 * \see IfxStdIf_Timer_DisableUpdate
278 * Specific implementation: Disable the transfer of the shadow registers
279 * \param driver TOM Timer interface Handle
280 * \return None
281 */
282 IFX_EXTERN void IfxGtm_Tom_Timer_disableUpdate(IfxGtm_Tom_Timer *driver);
283
284 /** \brief Returns the frequency
285 * \see IfxStdIf_Timer_GetFrequency
286 * \param driver TOM Timer interface Handle
287 * \return Frequency
288 */
289 IFX_EXTERN float32 IfxGtm_Tom_Timer_getFrequency(IfxGtm_Tom_Timer *driver);
290
291 /** \brief Returns the Input frequncy
292 * \param driver TOM Timer interface Handle
293 * \return Frequency
294 */
295 IFX_EXTERN float32 IfxGtm_Tom_Timer_getInputFrequency(IfxGtm_Tom_Timer *driver);
296
297 /** \brief Returns the period of the timer
298 * \see IfxStdIf_Timer_GetPeriod
299 * \param driver TOM Timer interface Handle
300 * \return Period
301 */
302 IFX_EXTERN Ifx_TimerValue IfxGtm_Tom_Timer_getPeriod(IfxGtm_Tom_Timer *driver);
303
304 /** \brief Returns the resolution
305 * \see IfxStdIf_Timer_GetResolution
306 * \param driver TOM Timer interface Handle
307 * \return Resolution
308 */
309 IFX_EXTERN float32 IfxGtm_Tom_Timer_getResolution(IfxGtm_Tom_Timer *driver);
310
311 /** \brief Returns the trigger point
312 * \param driver TOM Timer interface Handle
313 * \return Trigger point
314 */
315 IFX_EXTERN Ifx_TimerValue IfxGtm_Tom_Timer_getTrigger(IfxGtm_Tom_Timer *driver);
316
317 /** \brief Runs the timer
318 * \see IfxStdIf_Timer_Run
319 * \param driver TOM Timer interface Handle
320 * \return None
321 */
322 IFX_EXTERN void IfxGtm_Tom_Timer_run(IfxGtm_Tom_Timer *driver);
323
324 /** \brief Sets the frequency
325 * \see IfxStdIf_Timer_SetFrequency
326 * \param driver TOM Timer interface Handle
327 * \param frequency Frequency
328 * \return TRUE on success else FALSE
329 */
330 IFX_EXTERN boolean IfxGtm_Tom_Timer_setFrequency(IfxGtm_Tom_Timer *driver, float32 frequency);
331
332 /** \brief Sets the period for the timer
333 * \see IfxStdIf_Timer_SetPeriod
334 * \param driver TOM Timer interface Handle
335 * \param period Period value
336 * \return TRUE on success else FALSE
337 */
338 IFX_EXTERN boolean IfxGtm_Tom_Timer_setPeriod(IfxGtm_Tom_Timer *driver, Ifx_TimerValue period);
339
340 /** \brief Sets the single shot mode of the timer
341 * \see IfxStdIf_Timer_SetSingleMode
342 * \param driver TOM Timer interface Handle
343 * \param enabled If TRUE, sets the single shot mode
344 * \return None
345 */
346 IFX_EXTERN void IfxGtm_Tom_Timer_setSingleMode(IfxGtm_Tom_Timer *driver, boolean enabled);
347
348 /** \brief Sets the trigger
349 * \see IfxStdIf_Timer_SetTrigger
350 * \param driver TOM Timer interface Handle
351 * \param triggerPoint Trigger point value
352 * \return None
353 */
354 IFX_EXTERN void IfxGtm_Tom_Timer_setTrigger(IfxGtm_Tom_Timer *driver, Ifx_TimerValue triggerPoint);
355
356 /** \brief Initializes the standard interface timer
357 * \param stdif Standard interface timer object, will be initialized by the function
358 * \param driver Interface driver to be used by the standard interface. must be initialised separately
359 * \return TRUE on success else FALSE
360 */
361 IFX_EXTERN boolean IfxGtm_Tom_Timer_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxGtm_Tom_Timer *driver);
362
363 /** \brief Stops the timer
364 * \see IfxStdIf_Timer_Stop
365 * \param driver TOM Timer interface Handle
366 * \return None
367 */
368 IFX_EXTERN void IfxGtm_Tom_Timer_stop(IfxGtm_Tom_Timer *driver);
369
370 /** \brief Updates the input frequency
371 * \see IfxStdIf_Timer_UpdateInputFrequency
372 * \param driver TOM Timer interface Handle
373 * \return None
374 */
375 IFX_EXTERN void IfxGtm_Tom_Timer_updateInputFrequency(IfxGtm_Tom_Timer *driver);
376
377 /** \} */
378
379 #endif /* IFXGTM_TOM_TIMER_H */
IfxGtm_Tom_Timer_addToChannelMask
IFX_EXTERN void IfxGtm_Tom_Timer_addToChannelMask(IfxGtm_Tom_Timer *driver, IfxGtm_Tom_Ch channel)
Add a channel to the channel mask Channels present in the mask are started, stopped, updated at the same time as the timer: IfxGtm_Tom_Timer_applyUpdate, IfxGtm_Tom_Timer_disableUpdate, IfxGtm_Tom_Timer_stop, IfxGtm_Tom_Timer_run.
Definition: IfxGtm_Tom_Timer.c:90
IfxGtm_Tom_Timer_Base::clockFreq
float32 clockFreq
Timer input clock frequency (cached value)
Definition: IfxGtm_Tom_Timer.h:151
IfxGtm_Tom_Timer_setFrequency
IFX_EXTERN boolean IfxGtm_Tom_Timer_setFrequency(IfxGtm_Tom_Timer *driver, float32 frequency)
Sets the frequency.
Definition: IfxGtm_Tom_Timer.c:397
IfxGtm_Tom_Timer_Config::tom
IfxGtm_Tom tom
Index of the TOM object used.
Definition: IfxGtm_Tom_Timer.h:184
IfxGtm_Tom_Timer_Base::countDir
IfxStdIf_Timer_CountDir countDir
Timer counting mode.
Definition: IfxGtm_Tom_Timer.h:152
IfxGtm_Tom_Timer::gtm
Ifx_GTM * gtm
Pointer to GTM module.
Definition: IfxGtm_Tom_Timer.h:164
IfxGtm_Tom_Timer_Config::initPins
boolean initPins
TRUE : Initialize pins in driver. FALSE: Don&#39;t initialize pins : handled separately by user...
Definition: IfxGtm_Tom_Timer.h:191
IfxGtm_Tom_Timer_getPointer
IFX_EXTERN volatile uint32 * IfxGtm_Tom_Timer_getPointer(IfxGtm_Tom_Timer *driver)
Returns the pointer to timer channel.
Definition: IfxGtm_Tom_Timer.c:162
IfxGtm_Tom_Timer_getTriggerPointer
IFX_EXTERN volatile uint32 * IfxGtm_Tom_Timer_getTriggerPointer(IfxGtm_Tom_Timer *driver)
Returns the pointer to trigger channel.
Definition: IfxGtm_Tom_Timer.c:180
IfxGtm_Tom_Timer_disableUpdate
IFX_EXTERN void IfxGtm_Tom_Timer_disableUpdate(IfxGtm_Tom_Timer *driver)
Disables the upadte.
Definition: IfxGtm_Tom_Timer.c:127
uint32
unsigned long uint32
Definition: Platform_Types.h:116
float32
float float32
Definition: Platform_Types.h:170
IfxStdIf_Timer_
Standard interface object.
Definition: IfxStdIf_Timer.h:237
IfxGtm_PinMap.h
GTM I/O map.
IfxGtm_Tom_Timer::offset
Ifx_TimerValue offset
Timer initial offset in ticks.
Definition: IfxGtm_Tom_Timer.h:171
IfxGtm_Tom_Timer_getFrequency
IFX_EXTERN float32 IfxGtm_Tom_Timer_getFrequency(IfxGtm_Tom_Timer *driver)
Returns the frequency.
Definition: IfxGtm_Tom_Timer.c:138
IfxGtm_Tom_Timer_setTrigger
IFX_EXTERN void IfxGtm_Tom_Timer_setTrigger(IfxGtm_Tom_Timer *driver, Ifx_TimerValue triggerPoint)
Sets the trigger.
Definition: IfxGtm_Tom_Timer.c:425
IfxGtm_Tom_Timer_Base::period
Ifx_TimerValue period
Timer period in ticks (cached value)
Definition: IfxGtm_Tom_Timer.h:149
IfxGtm_Tom_Timer_getResolution
IFX_EXTERN float32 IfxGtm_Tom_Timer_getResolution(IfxGtm_Tom_Timer *driver)
Returns the resolution.
Definition: IfxGtm_Tom_Timer.c:168
IfxGtm_Tom_Timer_Config::base
IfxStdIf_Timer_Config base
Standard interface timer configuration.
Definition: IfxGtm_Tom_Timer.h:182
IfxGtm_Tom_Timer_acknowledgeTriggerIrq
IFX_EXTERN boolean IfxGtm_Tom_Timer_acknowledgeTriggerIrq(IfxGtm_Tom_Timer *driver)
Returns the trigger event.
Definition: IfxGtm_Tom_Timer.c:73
IfxStdIf_Timer_Config
Timer configuration.
Definition: IfxStdIf_Timer.h:272
IfxGtm_Tom_Ch
IfxGtm_Tom_Ch
Enum for TOM channels.
Definition: IfxGtm_cfg.h:428
IfxGtm_Tom_Timer::dtm
Ifx_GTM_CDTM_DTM * dtm
Pointer to DTM object used by TOM.
Definition: IfxGtm_Tom_Timer.h:174
IfxGtm_Tom_Timer_Config::irqModeTimer
IfxGtm_IrqMode irqModeTimer
Interrupt mode for the timer.
Definition: IfxGtm_Tom_Timer.h:188
IfxGtm_Tom_Timer_Config::dtmClockSource
IfxGtm_Dtm_ClockSource dtmClockSource
DTM clock source.
Definition: IfxGtm_Tom_Timer.h:190
IfxGtm_Tom_Timer_getInputFrequency
IFX_EXTERN float32 IfxGtm_Tom_Timer_getInputFrequency(IfxGtm_Tom_Timer *driver)
Returns the Input frequncy.
Definition: IfxGtm_Tom_Timer.c:144
IfxGtm_Tom_Timer_acknowledgeTimerIrq
IFX_EXTERN boolean IfxGtm_Tom_Timer_acknowledgeTimerIrq(IfxGtm_Tom_Timer *driver)
Returns the timer event.
Definition: IfxGtm_Tom_Timer.c:56
IfxGtm_Tom_Timer_run
IFX_EXTERN void IfxGtm_Tom_Timer_run(IfxGtm_Tom_Timer *driver)
Runs the timer.
Definition: IfxGtm_Tom_Timer.c:386
IfxGtm_Dtm.h
GTM basic functionality.
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
Ifx_GTM_TOM_TGC
volatile struct IfxGtm_Tom_TGC Ifx_GTM_TOM_TGC
Definition: IfxGtm_cfg.h:233
IfxGtm_Tom_Timer_Config
Configuration structure for TOM Timer.
Definition: IfxGtm_Tom_Timer.h:180
IfxGtm_Tom_Timer_stdIfTimerInit
IFX_EXTERN boolean IfxGtm_Tom_Timer_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxGtm_Tom_Timer *driver)
Initializes the standard interface timer.
Definition: IfxGtm_Tom_Timer.c:431
IfxGtm_Tom_Timer::tom
Ifx_GTM_TOM * tom
Pointer to the TOM object.
Definition: IfxGtm_Tom_Timer.h:165
IfxGtm_Tom_ToutMap
TOM TOUT pin mapping structure.
Definition: IfxGtm_PinMap.h:124
IfxGtm_Tom_Timer_getTrigger
IFX_EXTERN Ifx_TimerValue IfxGtm_Tom_Timer_getTrigger(IfxGtm_Tom_Timer *driver)
Returns the trigger point.
Definition: IfxGtm_Tom_Timer.c:174
IfxGtm_Tom_Timer_applyUpdate
IFX_EXTERN void IfxGtm_Tom_Timer_applyUpdate(IfxGtm_Tom_Timer *driver)
Enables the transfer of the shadow registers.
Definition: IfxGtm_Tom_Timer.c:116
IfxStdIf_Timer.h
Standard interface: Timer.
IfxGtm_Dtm_ClockSource
IfxGtm_Dtm_ClockSource
Clock source for DTM object Definition in IfxGTM.DTM[i].CTRL.B.CLKSEL ( i = 0 to 35) ...
Definition: IfxGtm_Dtm.h:70
IfxGtm_Tom_Timer_Base::triggerEnabled
boolean triggerEnabled
If TRUE, the trigger functionality is Initialised.
Definition: IfxGtm_Tom_Timer.h:150
IfxStdIf_Timer_CountDir
IfxStdIf_Timer_CountDir
Timer increment direction.
Definition: IfxStdIf_Timer.h:85
IfxGtm_Tom_Timer
TOM Timer interface Handle.
Definition: IfxGtm_Tom_Timer.h:161
IfxGtm_Tom_Timer_setSingleMode
IFX_EXTERN void IfxGtm_Tom_Timer_setSingleMode(IfxGtm_Tom_Timer *driver, boolean enabled)
Sets the single shot mode of the timer.
Definition: IfxGtm_Tom_Timer.c:419
IfxGtm_Tom_Timer_updateInputFrequency
IFX_EXTERN void IfxGtm_Tom_Timer_updateInputFrequency(IfxGtm_Tom_Timer *driver)
Updates the input frequency.
Definition: IfxGtm_Tom_Timer.c:472
IfxGtm_Dtm_Ch
IfxGtm_Dtm_Ch
Enum for DTM channels.
Definition: IfxGtm_cfg.h:323
IfxGtm_Tom_Timer_setPeriod
IFX_EXTERN boolean IfxGtm_Tom_Timer_setPeriod(IfxGtm_Tom_Timer *driver, Ifx_TimerValue period)
Sets the period for the timer.
Definition: IfxGtm_Tom_Timer.c:405
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxGtm_Tom_Timer_Config::clock
IfxGtm_Tom_Ch_ClkSrc clock
Timer input clock.
Definition: IfxGtm_Tom_Timer.h:187
IfxGtm_Tom
IfxGtm_Tom
Enum for TOM objects.
Definition: IfxGtm_cfg.h:417
IfxGtm_Tom_Timer_initConfig
IFX_EXTERN void IfxGtm_Tom_Timer_initConfig(IfxGtm_Tom_Timer_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default.
Definition: IfxGtm_Tom_Timer.c:369
IfxGtm_Tom_Timer_stop
IFX_EXTERN void IfxGtm_Tom_Timer_stop(IfxGtm_Tom_Timer *driver)
Stops the timer.
Definition: IfxGtm_Tom_Timer.c:461
IfxGtm_Tom_Timer_Config::triggerOut
IfxGtm_Tom_ToutMap * triggerOut
TOM channel used for the trigger output, can be identical to the timer channel.
Definition: IfxGtm_Tom_Timer.h:186
IfxGtm_Tom_Timer::base
IfxGtm_Tom_Timer_Base base
Timer base structure.
Definition: IfxGtm_Tom_Timer.h:163
IfxGtm_Tom_Timer::tomIndex
IfxGtm_Tom tomIndex
Enum for TOM objects.
Definition: IfxGtm_Tom_Timer.h:167
IfxGtm_IrqMode
IfxGtm_IrqMode
Enum for GTM interrupt modes.
Definition: IfxGtm.h:64
IfxGtm_Cmu.h
GTM basic functionality.
IfxGtm_Tom_Timer_Base
Structure for the timer base.
Definition: IfxGtm_Tom_Timer.h:147
IfxGtm_Tom_Timer_getPeriod
IFX_EXTERN Ifx_TimerValue IfxGtm_Tom_Timer_getPeriod(IfxGtm_Tom_Timer *driver)
Returns the period of the timer.
Definition: IfxGtm_Tom_Timer.c:156
IfxGtm_Tom_Timer::dtmChannel
IfxGtm_Dtm_Ch dtmChannel
DTM Channel.
Definition: IfxGtm_Tom_Timer.h:175
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
IfxGtm_Tom_Timer::timerChannel
IfxGtm_Tom_Ch timerChannel
TOM channel used for the timer.
Definition: IfxGtm_Tom_Timer.h:168
IfxGtm_Tom_Timer_Config::irqModeTrigger
IfxGtm_IrqMode irqModeTrigger
Interrupt mode for the trigger.
Definition: IfxGtm_Tom_Timer.h:189
IfxGtm_Tom_Timer_init
IFX_EXTERN boolean IfxGtm_Tom_Timer_init(IfxGtm_Tom_Timer *driver, const IfxGtm_Tom_Timer_Config *config)
Initialises the timer object.
Definition: IfxGtm_Tom_Timer.c:186
IfxGtm_Tom_Ch_ClkSrc
IfxGtm_Tom_Ch_ClkSrc
Clock source for the TOM channels.
Definition: IfxGtm_Tom.h:83
IfxGtm_Tom.h
GTM basic functionality.
IfxGtm_Tom_Timer_getOffset
IFX_EXTERN Ifx_TimerValue IfxGtm_Tom_Timer_getOffset(IfxGtm_Tom_Timer *driver)
Returns the initial timer offset in ticks.
Definition: IfxGtm_Tom_Timer.c:150
IfxGtm_Tom_Timer::triggerChannel
IfxGtm_Tom_Ch triggerChannel
TOM channel used for the trigger, can be identical to the timer channel.
Definition: IfxGtm_Tom_Timer.h:169


iLLD_TC38A: IfxGtm_Trig.c Source File

  • Gtm
  • Trig
IfxGtm_Trig.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Trig.c
3 * \brief GTM TRIG details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxGtm_Trig.h"
47 #include "_Utilities/Ifx_Assert.h"
48 #include "Cpu/Std/IfxCpu_Intrinsics.h"
49
50 /******************************************************************************/
51 /*-----------------------------Data Structures--------------------------------*/
52 /******************************************************************************/
53
54 /** \addtogroup IfxLld_Gtm_Trig_Data_Structures
55 * \{ */
56 typedef struct
57 {
58 sint8 config; /**< \brief Value for SEL0/1. config=0xFF means "not available" */
59 } IfxGtm_Trig_AdcTrig_Channel;
60
61 typedef struct
62 {
63 sint8 config; /**< \brief Value for SEL0/1. config=0xFF means "not available" */
64 } IfxGtm_Trig_CanTrig_Channel;
65
66 typedef struct
67 {
68 sint8 config; /**< \brief Value for SELx. config=0xFF means "not available" */
69 } IfxGtm_Trig_MscTrig_Channel;
70
71 /** \} */
72
73 /** \addtogroup IfxLld_Gtm_Trig_Data_Structures
74 * \{ */
75 typedef struct
76 {
77 IfxGtm_Trig_AdcTrig_Channel channel[IfxGtm_Trig_AdcTrigChannel_count];
78 } IfxGtm_Trig_AdcTrig_Source;
79
80 typedef struct
81 {
82 IfxGtm_Trig_CanTrig_Channel channel[IfxGtm_Trig_CanTrigChannel_count];
83 } IfxGtm_Trig_CanTrig_Source;
84
85 typedef struct
86 {
87 IfxGtm_Trig_MscTrig_Channel channel[IfxGtm_Trig_MscTrigChannel_count];
88 } IfxGtm_Trig_MscTrig_Source;
89
90 /** \} */
91
92 /** \addtogroup IfxLld_Gtm_Trig_Data_Structures
93 * \{ */
94 typedef struct
95 {
96 IfxGtm_Trig_AdcTrig_Source source[IfxGtm_Trig_AdcTrigSource_count];
97 } IfxGtm_Trig_AdcTrig_Trigger;
98
99 typedef struct
100 {
101 IfxGtm_Trig_CanTrig_Source source[IfxGtm_Trig_CanTrigSource_count];
102 } IfxGtm_Trig_CanTrig_Trigger;
103
104 typedef struct
105 {
106 IfxGtm_Trig_MscTrig_Source source[IfxGtm_Trig_MscTrigSource_count];
107 } IfxGtm_Trig_MscTrig_Set;
108
109 /** \} */
110
111 /** \addtogroup IfxLld_Gtm_Trig_Data_Structures
112 * \{ */
113 typedef struct
114 {
115 IfxGtm_Trig_AdcTrig_Trigger trigger[IfxGtm_Trig_AdcTrig_count];
116 } IfxGtm_Trig_AdcTrig_Table;
117
118 typedef struct
119 {
120 IfxGtm_Trig_CanTrig_Trigger trigger;
121 } IfxGtm_Trig_CanTrig_Table;
122
123 typedef struct
124 {
125 IfxGtm_Trig_MscTrig_Set set[IfxGtm_Trig_MscTrigSet_count];
126 } IfxGtm_Trig_MscTrig_Table;
127
128 /** \} */
129
130 /******************************************************************************/
131 /*------------------------Private Variables/Constants-------------------------*/
132 /******************************************************************************/
133
134 IFX_STATIC IFX_CONST IfxGtm_Trig_CanTrig_Table IfxGtm_Trig_CanTrig_table0 = {
135 .trigger = {
136 .source = { //IfxGtm_CanTrig_0
137 //{.channel = { {Channel_0 }, {Channel_1 }, {Channel_2 }, {Channel_3 }, {Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 }, {Channel_11 }, {Channel_12 }, {Channel_13 }, {Channel_14 }}},
138 {.channel= { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x08}, {.config = 0x09}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x0A}, {.config = 0x0B}}}, //IfxGtm_CanTrigSource_tom0
139 {.channel= { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x00}, {.config = 0x01}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x02}, {.config = 0x03}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_CanTrigSource_tom1
140
141 {.channel= { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x0C}, {.config = 0x0D}, {.config = 0x0E}, {.config = 0x0F}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_CanTrigSource_atom0
142 {.channel= { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_CanTrigSource_atom1
143 {.channel= { {.config = 0x04}, {.config = 0x05}, {.config = 0x06}, {.config = 0x07}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_CanTrigSource_atom2
144 }
145 },
146 };
147
148 IFX_STATIC IFX_CONST IfxGtm_Trig_CanTrig_Table IfxGtm_Trig_CanTrig_table1 = {
149 .trigger = {
150 .source = { //IfxGtm_CanTrig_1
151 //{.channel = { {Channel_0 }, {Channel_1 }, {Channel_2 }, {Channel_3 }, {Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 }, {Channel_11 }, {Channel_12 }, {Channel_13 }, {Channel_14 }}},
152 {.channel= { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_CanTrigSource_tom0
153 {.channel= { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x00}, {.config = 0x01}, {.config = 0x08}, {.config = 0x09}, {.config = 0x02}, {.config = 0x03}, {.config = 0x0A}, {.config = 0x0B}}}, //IfxGtm_CanTrigSource_tom1
154
155 {.channel= { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_CanTrigSource_atom0
156 {.channel= { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x0C}, {.config = 0x0D}, {.config = 0x0E}, {.config = 0x0F}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_CanTrigSource_atom1
157 {.channel= { {.config = 0x04}, {.config = 0x05}, {.config = 0x06}, {.config = 0x07}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_CanTrigSource_atom2
158 }
159 },
160 };
161
162 IFX_STATIC IFX_CONST IfxGtm_Trig_CanTrig_Table IfxGtm_Trig_CanTrig_table2_3 = {
163 .trigger = {
164 .source = { //IfxGtm_CanTrig_2 to 7
165 //{.channel = { {Channel_0 }, {Channel_1 }, {Channel_2 }, {Channel_3 }, {Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 }, {Channel_11 }, {Channel_12 }, {Channel_13 }, {Channel_14 }}},
166 {.channel= { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_CanTrigSource_tom0
167 {.channel= { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x00}, {.config = 0x01}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x02}, {.config = 0x03}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_CanTrigSource_tom1
168
169 {.channel= { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_CanTrigSource_atom0
170 {.channel= { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_CanTrigSource_atom1
171 {.channel= { {.config = 0x04}, {.config = 0x05}, {.config = 0x06}, {.config = 0x07}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_CanTrigSource_atom2
172 }
173 },
174 };
175
176 IFX_STATIC IFX_CONST IfxGtm_Trig_AdcTrig_Table IfxGtm_Trig_EvadcTrig_tableAdc0_1_2 = {
177 .trigger = {
178 {.source = { //IfxGtm_AdcTrig_0
179 //{.channel = { {Channel_3 }, {Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 }, {Channel_11 }, {Channel_12 }, {Channel_13 }, {Channel_14 }, {Channel_15 }}},
180 {.channel = { {.config = 0xFF}, {.config = 0x05}, {.config = 0x06}, {.config = 0x07}, {.config = 0x08}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom0
181 {.channel = { {.config = 0xFF}, {.config = 0x09}, {.config = 0x0A}, {.config = 0x0B}, {.config = 0x0C}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom1
182 {.channel = { {.config = 0xFF}, {.config = 0x0D}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x0E}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom2
183 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom3
184 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom4
185 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom5
186 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom6
187 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom7
188 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom8
189 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom9
190 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom10
191 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom11
192
193 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x01}, {.config = 0x02}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x03}, {.config = 0x04}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom0
194 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom1
195 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x0F}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom2
196 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom3
197 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom4
198 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom5
199 }},
200 {.source = { //IfxGtm_AdcTrig_1
201 //{.channel = { {Channel_3 }, {Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 }, {Channel_11 }, {Channel_12 }, {Channel_13 }, {Channel_14 }, {Channel_15 }}},
202 {.channel = { {.config = 0xFF}, {.config = 0x0B}, {.config = 0x0C}, {.config = 0x0D}, {.config = 0x0E}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom0
203 {.channel = { {.config = 0xFF}, {.config = 0x05}, {.config = 0x06}, {.config = 0x07}, {.config = 0x08}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom1
204 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom2
205 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom3
206 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom4
207 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom5
208 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom6
209 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom7
210 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom8
211 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom9
212 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom10
213 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom11
214
215 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x09}, {.config = 0x0A}}}, //IfxGtm_AdcTrigSource_tom0
216 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x01}, {.config = 0x02}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x03}, {.config = 0x04}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom1
217 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom2
218 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x0F}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom3
219 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom4
220 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom5
221 }},
222 {.source = { //IfxGtm_AdcTrig_2
223 //{.channel = { {Channel_3 }, {Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 }, {Channel_11 }, {Channel_12 }, {Channel_13 }, {Channel_14 }, {Channel_15 }}},
224 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom0
225 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom1
226 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom2
227 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom3
228 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom4
229 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom5
230 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom6
231 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom7
232 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom8
233 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom9
234 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom10
235 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom11
236
237 {.channel = { {.config = 0x01}, {.config = 0x02}, {.config = 0x03}, {.config = 0x04}, {.config = 0x05}, {.config = 0x06}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x07}}}, //IfxGtm_AdcTrigSource_tom0
238 {.channel = { {.config = 0x08}, {.config = 0x09}, {.config = 0x0A}, {.config = 0x0B}, {.config = 0x0C}, {.config = 0x0D}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x0E}}}, //IfxGtm_AdcTrigSource_tom1
239 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom2
240 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom3
241 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom4
242 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom5
243 }},
244 {.source = { //IfxGtm_AdcTrig_3
245 //{.channel = { {Channel_3 }, {Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 }, {Channel_11 }, {Channel_12 }, {Channel_13 }, {Channel_14 }, {Channel_15 }}},
246 {.channel = { {.config = 0x01}, {.config = 0xFF}, {.config = 0x02}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom0
247 {.channel = { {.config = 0x03}, {.config = 0xFF}, {.config = 0x04}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom1
248 {.channel = { {.config = 0x05}, {.config = 0xFF}, {.config = 0x06}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom2
249 {.channel = { {.config = 0x07}, {.config = 0x08}, {.config = 0x09}, {.config = 0xFF}, {.config = 0x0A}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom3
250 {.channel = { {.config = 0x0B}, {.config = 0x0C}, {.config = 0x0D}, {.config = 0xFF}, {.config = 0x0E}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom4
251 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom5
252 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom6
253 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom7
254 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom8
255 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom9
256 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom10
257 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom11
258
259 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom0
260 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom1
261 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x0F}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom2
262 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom3
263 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom4
264 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom5
265 }},
266 {.source = { //IfxGtm_AdcTrig_4
267 //{.channel = { {Channel_3 }, {Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 }, {Channel_11 }, {Channel_12 }, {Channel_13 }, {Channel_14 }, {Channel_15 }}},
268 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom0
269 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom1
270 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom2
271 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom3
272 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom4
273 {.channel = { {.config = 0x0B}, {.config = 0x0C}, {.config = 0x0D}, {.config = 0xFF}, {.config = 0x0E}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom5
274 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom6
275 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom7
276 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom8
277 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom9
278 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom10
279 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom11
280
281 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom0
282 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom1
283 {.channel = { {.config = 0x01}, {.config = 0x02}, {.config = 0x03}, {.config = 0xFF}, {.config = 0x04}, {.config = 0x05}, {.config = 0x06}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom2
284 {.channel = { {.config = 0x07}, {.config = 0x08}, {.config = 0x09}, {.config = 0xFF}, {.config = 0x0A}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x0F}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom3
285 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom4
286 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom5
287 }}
288 }
289 };
290
291 IFX_STATIC IFX_CONST IfxGtm_Trig_AdcTrig_Table IfxGtm_Trig_EvadcTrig_tableAdc3_4 = {
292 .trigger = {
293 {.source = { //IfxGtm_AdcTrig_0
294 //{.channel = { {Channel_3 }, {Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 }, {Channel_11 }, {Channel_12 }, {Channel_13 }, {Channel_14 }, {Channel_15 }}},
295 {.channel = { {.config = 0xFF}, {.config = 0x05}, {.config = 0x06}, {.config = 0x07}, {.config = 0x08}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom0
296 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom1
297 {.channel = { {.config = 0xFF}, {.config = 0x0B}, {.config = 0x0C}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom2
298 {.channel = { {.config = 0xFF}, {.config = 0x0D}, {.config = 0x0E}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom3
299 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom4
300 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom5
301 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom6
302 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom7
303 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom8
304 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom9
305 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom10
306 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom11
307
308 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x01}, {.config = 0x02}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x03}, {.config = 0x04 }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom0
309 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x09}, {.config = 0x0A}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom1
310 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x0F}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom2
311 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom3
312 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom4
313 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom5
314 }},
315 {.source = { //IfxGtm_AdcTrig_1
316 //{.channel = { {Channel_3 }, {Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 }, {Channel_11 }, {Channel_12 }, {Channel_13 }, {Channel_14 }, {Channel_15 }}},
317 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom0
318 {.channel = { {.config = 0xFF}, {.config = 0x05}, {.config = 0x06}, {.config = 0x07}, {.config = 0x08}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom1
319 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x0B}, {.config = 0x0C}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom2
320 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x0D}, {.config = 0x0E}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom3
321 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom4
322 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom5
323 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom6
324 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom7
325 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom8
326 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom9
327 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom10
328 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom11
329
330 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom0
331 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x01}, {.config = 0x02}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x03}, {.config = 0x04 /*0x09*/}, {.config = 0x0A}}}, //IfxGtm_AdcTrigSource_tom1
332 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom2
333 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x0F}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom3
334 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom4
335 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom5
336 }},
337 {.source = { //IfxGtm_AdcTrig_2
338 //{.channel = { {Channel_3 }, {Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 }, {Channel_11 }, {Channel_12 }, {Channel_13 }, {Channel_14 }, {Channel_15 }}},
339 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom0
340 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom1
341 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom2
342 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom3
343 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom4
344 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom5
345 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom6
346 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom7
347 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom8
348 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom9
349 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom10
350 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom11
351
352 {.channel = { {.config = 0x01}, {.config = 0x02}, {.config = 0x03}, {.config = 0x04}, {.config = 0x05}, {.config = 0x06}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0x07}}}, //IfxGtm_AdcTrigSource_tom0
353 {.channel = { {.config = 0x08}, {.config = 0x09}, {.config = 0x0A}, {.config = 0x0B}, {.config = 0x0C}, {.config = 0x0D}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0x0E}}}, //IfxGtm_AdcTrigSource_tom1
354 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom2
355 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom3
356 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom4
357 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom5
358 }},
359 {.source = { //IfxGtm_AdcTrig_3
360 //{.channel = { {Channel_3 }, {Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 }, {Channel_11 }, {Channel_12 }, {Channel_13 }, {Channel_14 }, {Channel_15 }}},
361 {.channel = { {.config = 0x01}, {.config = 0xFF}, {.config = 0x02}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom0
362 {.channel = { {.config = 0x03}, {.config = 0xFF}, {.config = 0x04}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom1
363 {.channel = { {.config = 0x05}, {.config = 0xFF}, {.config = 0x06}, {.config = 0xFF}, {.config = 0x07}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom2
364 {.channel = { {.config = 0x08}, {.config = 0xFF}, {.config = 0x09}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom3
365 {.channel = { {.config = 0x0A}, {.config = 0x0B}, {.config = 0x0C}, {.config = 0xFF}, {.config = 0x0D}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom4
366 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom5
367 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom6
368 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom7
369 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom8
370 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom9
371 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom10
372 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom11
373
374 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom0
375 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom1
376 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x0F }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom2
377 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom3
378 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom4
379 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom5
380 }},
381 {.source = { //IfxGtm_AdcTrig_4
382 //{.channel = { {Channel_3 }, {Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 }, {Channel_11 }, {Channel_12 }, {Channel_13 }, {Channel_14 }, {Channel_15 }}},
383 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom0
384 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom1
385 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom2
386 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom3
387 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom4
388 {.channel = { {.config = 0x0B}, {.config = 0x0C}, {.config = 0x0D}, {.config = 0xFF}, {.config = 0x0E}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom5
389 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom6
390 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom7
391 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom8
392 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom9
393 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom10
394 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom11
395
396 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom0
397 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom1
398 {.channel = { {.config = 0x01}, {.config = 0x02}, {.config = 0x03}, {.config = 0xFF}, {.config = 0x04}, {.config = 0x05}, {.config = 0x06}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom2
399 {.channel = { {.config = 0x07}, {.config = 0x08}, {.config = 0x09}, {.config = 0xFF}, {.config = 0x0A}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x0F }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom3
400 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom4
401 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom5
402 }}
403 }
404 };
405
406 IFX_STATIC IFX_CONST IfxGtm_Trig_AdcTrig_Table IfxGtm_Trig_EvadcTrig_tableAdc5_6_7 = {
407 .trigger = {
408 {.source = { //IfxGtm_AdcTrig_0
409 //{.channel = { {Channel_3 }, {Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 }, {Channel_11 }, {Channel_12 }, {Channel_13 }, {Channel_14 }, {Channel_15 }}},
410 {.channel = { {.config = 0xFF}, {.config = 0x0B}, {.config = 0x0C}, {.config = 0x0D}, {.config = 0x0E}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom0
411 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom1
412 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x0F}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom2
413 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom3
414 {.channel = { {.config = 0xFF}, {.config = 0x05}, {.config = 0x06}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom4
415 {.channel = { {.config = 0xFF}, {.config = 0x07}, {.config = 0x08}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom5
416 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom6
417 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom7
418 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom8
419 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom9
420 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom10
421 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom11
422
423 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x09}, {.config = 0x0A}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x03}, {.config = 0x04}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom0
424 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom1
425 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x01}, {.config = 0x02}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom2
426 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom3
427 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom4
428 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom5
429 }},
430 {.source = { //IfxGtm_AdcTrig_1
431 //{.channel = { {Channel_3 }, {Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 }, {Channel_11 }, {Channel_12 }, {Channel_13 }, {Channel_14 }, {Channel_15 }}},
432 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom0
433 {.channel = { {.config = 0xFF}, {.config = 0x0B}, {.config = 0x0C}, {.config = 0x0D}, {.config = 0x0E}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom1
434 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom2
435 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x0F}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom3
436 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x05}, {.config = 0x06}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom4
437 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x08}, {.config = 0x09}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom5
438 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom6
439 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom7
440 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom8
441 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom9
442 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom10
443 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom11
444
445 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom0
446 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x09}, {.config = 0x0A}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x03}, {.config = 0x04}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom1
447 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x01}, {.config = 0x02}}}, //IfxGtm_AdcTrigSource_tom2
448 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom3
449 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom4
450 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom5
451 }},
452 {.source = { //IfxGtm_AdcTrig_2
453 //{.channel = { {Channel_3 }, {Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 }, {Channel_11 }, {Channel_12 }, {Channel_13 }, {Channel_14 }, {Channel_15 }}},
454 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom0
455 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom1
456 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom2
457 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom3
458 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom4
459 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom5
460 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom6
461 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom7
462 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom8
463 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom9
464 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom10
465 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom11
466
467 {.channel = { {.config = 0x01}, {.config = 0x02}, {.config = 0x03}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom0
468 {.channel = { {.config = 0x04}, {.config = 0x05}, {.config = 0x06}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom1
469 {.channel = { {.config = 0x07}, {.config = 0x08}, {.config = 0x09}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom2
470 {.channel = { {.config = 0xFF}, {.config = 0x0A}, {.config = 0x0B}, {.config = 0xFF}, {.config = 0x0C}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom3
471 {.channel = { {.config = 0xFF}, {.config = 0x0D}, {.config = 0x0E}, {.config = 0xFF}, {.config = 0x0F}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom4
472 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom5
473 }},
474 {.source = { //IfxGtm_AdcTrig_3
475 //{.channel = { {Channel_3 }, {Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 }, {Channel_11 }, {Channel_12 }, {Channel_13 }, {Channel_14 }, {Channel_15 }}},
476 {.channel = { {.config = 0x01}, {.config = 0xFF}, {.config = 0x02}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom0
477 {.channel = { {.config = 0x03}, {.config = 0xFF}, {.config = 0x04}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom1
478 {.channel = { {.config = 0x05}, {.config = 0xFF}, {.config = 0x06}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom2
479 {.channel = { {.config = 0x07}, {.config = 0xFF}, {.config = 0x08}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom3
480 {.channel = { {.config = 0x09}, {.config = 0xFF}, {.config = 0x0A}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom4
481 {.channel = { {.config = 0x0B}, {.config = 0xFF}, {.config = 0x0C}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom5
482 {.channel = { {.config = 0xFF}, {.config = 0x0D}, {.config = 0x0D}, {.config = 0xFF}, {.config = 0x0F}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom6
483 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom7
484 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom8
485 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom9
486 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom10
487 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom11
488
489 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom0
490 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom1
491 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom2
492 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom3
493 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom4
494 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom5
495 }},
496 {.source = { //IfxGtm_AdcTrig_4
497 //{.channel = { {Channel_3 }, {Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 }, {Channel_11 }, {Channel_12 }, {Channel_13 }, {Channel_14 }, {Channel_15 }}},
498 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom0
499 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom1
500 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom2
501 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom3
502 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom4
503 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom5
504 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom6
505 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0x03}, {.config = 0xFF}, {.config = 0x04}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom7
506 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0x05}, {.config = 0xFF}, {.config = 0x06}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom8
507 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0x09}, {.config = 0xFF}, {.config = 0x0A}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom9
508 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0x0B}, {.config = 0xFF}, {.config = 0x0C}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom10
509 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0x0D}, {.config = 0xFF}, {.config = 0x0E}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom11
510
511 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom0
512 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom1
513 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom2
514 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom3
515 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x01}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom4
516 {.channel = { {.config = 0xFF}, {.config = 0x0F}, {.config = 0x07}, {.config = 0xFF}, {.config = 0x08}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x02}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom5
517 }}
518 }
519 };
520
521 IFX_STATIC IFX_CONST IfxGtm_Trig_AdcTrig_Table IfxGtm_Trig_EvadcTrig_tableAdc8_9_10_11 = {
522 .trigger = {
523 {.source = { //IfxGtm_AdcTrig_0
524 //{.channel = { {Channel_3 }, {Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 }, {Channel_11 }, {Channel_12 }, {Channel_13 }, {Channel_14 }, {Channel_15 }}},
525 {.channel = { {.config = 0xFF}, {.config = 0x05}, {.config = 0x06}, {.config = 0x07 }, {.config = 0x08 }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom0
526 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom1
527 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom2
528 {.channel = { {.config = 0xFF}, {.config = 0x0D}, {.config = 0x0E}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom3
529 {.channel = { {.config = 0xFF}, {.config = 0x0B}, {.config = 0x0C}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom4
530 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom5
531 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom6
532 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom7
533 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom8
534 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom9
535 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom10
536 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom11
537
538 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x01 /*0x09*/}, {.config = 0x02 /*0x0A*/}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x03}, {.config = 0x04}, {.config = 0x0F}}}, //IfxGtm_AdcTrigSource_tom0
539 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom1
540 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom2
541 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom3
542 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom4
543 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom5
544 }},
545 {.source = { //IfxGtm_AdcTrig_1
546 //{.channel = { {Channel_3 }, {Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 }, {Channel_11 }, {Channel_12 }, {Channel_13 }, {Channel_14 }, {Channel_15 }}},
547 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom0
548 {.channel = { {.config = 0xFF}, {.config = 0x05}, {.config = 0x06}, {.config = 0x07 }, {.config = 0x08 }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom1
549 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom2
550 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x0D }, {.config = 0x0E }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom3
551 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x0B }, {.config = 0x0C }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom4
552 {.channel = { {.config = 0x0F}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom5
553 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom6
554 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom7
555 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom8
556 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom9
557 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom10
558 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom11
559
560 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x09}, {.config = 0x0A}}}, //IfxGtm_AdcTrigSource_tom0
561 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x01 }, {.config = 0x02 }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x03}, {.config = 0x04}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom1
562 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom2
563 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom3
564 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom4
565 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom5
566 }},
567 {.source = { //IfxGtm_AdcTrig_2
568 //{.channel = { {Channel_3 }, {Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 }, {Channel_11 }, {Channel_12 }, {Channel_13 }, {Channel_14 }, {Channel_15 }}},
569 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom0
570 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom1
571 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom2
572 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom3
573 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom4
574 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom5
575 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom6
576 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom7
577 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom8
578 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom9
579 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom10
580 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom11
581
582 {.channel = { {.config = 0x01}, {.config = 0x02}, {.config = 0x03}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom0
583 {.channel = { {.config = 0x04}, {.config = 0x05}, {.config = 0x06}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom1
584 {.channel = { {.config = 0x07}, {.config = 0x08}, {.config = 0x09}, {.config = 0xFF }, {.config = 0x0A }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom2
585 {.channel = { {.config = 0x0B}, {.config = 0x0C}, {.config = 0x0D}, {.config = 0xFF }, {.config = 0x0E }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom3
586 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom4
587 {.channel = { {.config = 0x0F}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom5
588 }},
589 {.source = { //IfxGtm_AdcTrig_3
590 //{.channel = { {Channel_3 }, {Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 }, {Channel_11 }, {Channel_12 }, {Channel_13 }, {Channel_14 }, {Channel_15 }}},
591 {.channel = { {.config = 0x01}, {.config = 0xFF}, {.config = 0x02}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom0
592 {.channel = { {.config = 0x03}, {.config = 0xFF}, {.config = 0x04}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom1
593 {.channel = { {.config = 0x05}, {.config = 0x06}, {.config = 0x07}, {.config = 0xFF }, {.config = 0x08 }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom2
594 {.channel = { {.config = 0x09}, {.config = 0xFF}, {.config = 0x0A}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom3
595 {.channel = { {.config = 0x0B}, {.config = 0xFF}, {.config = 0x0C}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom4
596 {.channel = { {.config = 0xFF}, {.config = 0x0D}, {.config = 0x0E}, {.config = 0xFF }, {.config = 0x0F }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom5
597 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom6
598 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom7
599 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom8
600 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom9
601 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom10
602 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom11
603
604 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom0
605 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom1
606 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom2
607 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom3
608 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom4
609 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom5
610 }},
611 {.source = { //IfxGtm_AdcTrig_4
612 //{.channel = { {Channel_3 }, {Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 }, {Channel_11 }, {Channel_12 }, {Channel_13 }, {Channel_14 }, {Channel_15 }}},
613 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom0
614 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom1
615 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom2
616 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom3
617 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom4
618 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom5
619 {.channel = { {.config = 0xFF}, {.config = 0x04}, {.config = 0x05}, {.config = 0xFF }, {.config = 0x06 }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom6
620 {.channel = { {.config = 0xFF}, {.config = 0x07}, {.config = 0x08}, {.config = 0xFF }, {.config = 0x09 }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom7
621 {.channel = { {.config = 0xFF}, {.config = 0x0A}, {.config = 0x0B}, {.config = 0xFF }, {.config = 0x0C }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom8
622 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom9
623 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom10
624 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom11
625
626 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom0
627 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom1
628 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x01}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom2
629 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x02}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom3
630 {.channel = { {.config = 0xFF}, {.config = 0x0D}, {.config = 0x0E}, {.config = 0xFF }, {.config = 0x0F }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x03}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom4
631 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF }, {.config = 0xFF }, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom5
632 }}
633 }
634 };
635
636 IFX_STATIC IFX_CONST IfxGtm_Trig_MscTrig_Table IfxGtm_Trig_MscTrig_table = {
637 .set = {
638 {.source = { //IfxGtm_MsccSet_1
639 //{.channel = { {Channel_0 }, {Channel_1 }, {Channel_2 }, {Channel_3 }, {Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 },
640 // {Channel_8 }, {Channel_9 }, {Channel_10 }, {Channel_11 }, {Channel_12 }, {Channel_13 }, {Channel_14 }, {Channel_15 }}},
641
642 {.channel = { {.config = 0x00}, {.config = 0x01}, {.config = 0x02}, {.config = 0x03}, {.config = 0x04}, {.config = 0x05}, {.config = 0x06}, {.config = 0x07},
643 {.config = 0x08}, {.config = 0x09}, {.config = 0x0A}, {.config = 0x0B}, {.config = 0x0C}, {.config = 0x0D}, {.config = 0x0E}, {.config = 0x0F}}}, //IfxGtm_MscTrigSource_tom0
644 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
645 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_tom1
646 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
647 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_tom2
648 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
649 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_tom3
650 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
651 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_tom4
652 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
653 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_tom5
654 {.channel = { {.config = 0x10}, {.config = 0x11}, {.config = 0x12}, {.config = 0x13}, {.config = 0x14}, {.config = 0x15}, {.config = 0x16}, {.config = 0x17},
655 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom0
656 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
657 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom1
658 {.channel = { {.config = 0x18}, {.config = 0x19}, {.config = 0x1A}, {.config = 0x1B}, {.config = 0x1C}, {.config = 0x1D}, {.config = 0x1E}, {.config = 0x1F},
659 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom2
660 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
661 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom3
662 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
663 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom4
664 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
665 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom5
666 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
667 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom6
668 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
669 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom7
670 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
671 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom8
672 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
673 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom9
674 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
675 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom10
676 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
677 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom11
678 }},
679 {.source = { //IfxGtm_MsccSet_2
680 //{.channel = { {Channel_0 }, {Channel_1 }, {Channel_2 }, {Channel_3 }, {Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 },
681 // {Channel_8 }, {Channel_9 }, {Channel_10 }, {Channel_11 }, {Channel_12 }, {Channel_13 }, {Channel_14 }, {Channel_15 }}},
682
683 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
684 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_tom0
685 {.channel = { {.config = 0x00}, {.config = 0x01}, {.config = 0x02}, {.config = 0x03}, {.config = 0x04}, {.config = 0x05}, {.config = 0x06}, {.config = 0x07},
686 {.config = 0x08}, {.config = 0x09}, {.config = 0x0A}, {.config = 0x0B}, {.config = 0x0C}, {.config = 0x0D}, {.config = 0x0E}, {.config = 0x0F}}}, //IfxGtm_MscTrigSource_tom1
687 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
688 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_tom2
689 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
690 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_tom3
691 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
692 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_tom4
693 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
694 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_tom5
695 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
696 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom0
697 {.channel = { {.config = 0x10}, {.config = 0x11}, {.config = 0x12}, {.config = 0x13}, {.config = 0x14}, {.config = 0x15}, {.config = 0x16}, {.config = 0x17},
698 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom1
699 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
700 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom2
701 {.channel = { {.config = 0x18}, {.config = 0x19}, {.config = 0x1A}, {.config = 0x1B}, {.config = 0x1C}, {.config = 0x1D}, {.config = 0x1E}, {.config = 0x1F},
702 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom3
703 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
704 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom4
705 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
706 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom5
707 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
708 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom6
709 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
710 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom7
711 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
712 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom8
713 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
714 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom9
715 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
716 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom10
717 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
718 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom11
719 }},
720 {.source = { //IfxGtm_MsccSet_3
721 //{.channel = { {Channel_0 }, {Channel_1 }, {Channel_2 }, {Channel_3 }, {Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 },
722 // {Channel_8 }, {Channel_9 }, {Channel_10 }, {Channel_11 }, {Channel_12 }, {Channel_13 }, {Channel_14 }, {Channel_15 }}},
723
724 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
725 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_tom0
726 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
727 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_tom1
728 {.channel = { {.config = 0x00}, {.config = 0x01}, {.config = 0x02}, {.config = 0x03}, {.config = 0x04}, {.config = 0x05}, {.config = 0x06}, {.config = 0x07},
729 {.config = 0x08}, {.config = 0x09}, {.config = 0x0A}, {.config = 0x0B}, {.config = 0x0C}, {.config = 0x0D}, {.config = 0x0E}, {.config = 0x0F}}}, //IfxGtm_MscTrigSource_tom2
730 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
731 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_tom3
732 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
733 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_tom4
734 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
735 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_tom5
736 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
737 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom0
738 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
739 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom1
740 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
741 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom2
742 {.channel = { {.config = 0x18}, {.config = 0x19}, {.config = 0x1A}, {.config = 0x1B}, {.config = 0x1C}, {.config = 0x1D}, {.config = 0x1E}, {.config = 0x1F},
743 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom3
744 {.channel = { {.config = 0x10}, {.config = 0x11}, {.config = 0x12}, {.config = 0x13}, {.config = 0x14}, {.config = 0x15}, {.config = 0x16}, {.config = 0x17},
745 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom4
746 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
747 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom5
748 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
749 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom6
750 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
751 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom7
752 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
753 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom8
754 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
755 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom9
756 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
757 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom10
758 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
759 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom11
760 }},
761 {.source = { //IfxGtm_MsccSet_4
762 //{.channel = { {Channel_0 }, {Channel_1 }, {Channel_2 }, {Channel_3 }, {Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 },
763 // {Channel_8 }, {Channel_9 }, {Channel_10 }, {Channel_11 }, {Channel_12 }, {Channel_13 }, {Channel_14 }, {Channel_15 }}},
764
765 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
766 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_tom0
767 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
768 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_tom1
769 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
770 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_tom2
771 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
772 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_tom3
773 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
774 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_tom4
775 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
776 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_tom5
777 {.channel = { {.config = 0x00}, {.config = 0x01}, {.config = 0x02}, {.config = 0x03}, {.config = 0x04}, {.config = 0x05}, {.config = 0x06}, {.config = 0x07},
778 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom0
779 {.channel = { {.config = 0x08}, {.config = 0x09}, {.config = 0x0A}, {.config = 0x0B}, {.config = 0x0C}, {.config = 0x0D}, {.config = 0x0E}, {.config = 0x0F},
780 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom1
781 {.channel = { {.config = 0x10}, {.config = 0x11}, {.config = 0x12}, {.config = 0x13}, {.config = 0x14}, {.config = 0x15}, {.config = 0x16}, {.config = 0x17},
782 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom2
783 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
784 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom3
785 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
786 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom4
787 {.channel = { {.config = 0x18}, {.config = 0x19}, {.config = 0x1A}, {.config = 0x1B}, {.config = 0x1C}, {.config = 0x1D}, {.config = 0x1E}, {.config = 0x1F},
788 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom5
789 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
790 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom6
791 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
792 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom7
793 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
794 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom8
795 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
796 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom9
797 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
798 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom10
799 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
800 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom11
801 }},
802 {.source = { //IfxGtm_MsccSet_5
803 //{.channel = { {Channel_0 }, {Channel_1 }, {Channel_2 }, {Channel_3 }, {Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 },
804 // {Channel_8 }, {Channel_9 }, {Channel_10 }, {Channel_11 }, {Channel_12 }, {Channel_13 }, {Channel_14 }, {Channel_15 }}},
805
806 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
807 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_tom0
808 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
809 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_tom1
810 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
811 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_tom2
812 {.channel = { {.config = 0x00}, {.config = 0x01}, {.config = 0x02}, {.config = 0x03}, {.config = 0x04}, {.config = 0x05}, {.config = 0x06}, {.config = 0x07},
813 {.config = 0x08}, {.config = 0x09}, {.config = 0x0A}, {.config = 0x0B}, {.config = 0x0C}, {.config = 0x0D}, {.config = 0x0E}, {.config = 0x0F}}}, //IfxGtm_MscTrigSource_tom3
814 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
815 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_tom4
816 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
817 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_tom5
818 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
819 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom0
820 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
821 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom1
822 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
823 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom2
824 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
825 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom3
826 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
827 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom4
828 {.channel = { {.config = 0x10}, {.config = 0x11}, {.config = 0x12}, {.config = 0x13}, {.config = 0x14}, {.config = 0x15}, {.config = 0x16}, {.config = 0x17},
829 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom5
830 {.channel = { {.config = 0x18}, {.config = 0x19}, {.config = 0x1A}, {.config = 0x1B}, {.config = 0x1C}, {.config = 0x1D}, {.config = 0x1E}, {.config = 0x1F},
831 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom6
832 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
833 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom7
834 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
835 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom8
836 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
837 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom9
838 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
839 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom10
840 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
841 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom11
842 }},
843 {.source = { //IfxGtm_MsccSet_6
844 //{.channel = { {Channel_0 }, {Channel_1 }, {Channel_2 }, {Channel_3 }, {Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 },
845 // {Channel_8 }, {Channel_9 }, {Channel_10 }, {Channel_11 }, {Channel_12 }, {Channel_13 }, {Channel_14 }, {Channel_15 }}},
846
847 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
848 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_tom0
849 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
850 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_tom1
851 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
852 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_tom2
853 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
854 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_tom3
855 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
856 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_tom4
857 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
858 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_tom5
859 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
860 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom0
861 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
862 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom1
863 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
864 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom2
865 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
866 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom3
867 {.channel = { {.config = 0x00}, {.config = 0x01}, {.config = 0x02}, {.config = 0x03}, {.config = 0x04}, {.config = 0x05}, {.config = 0x06}, {.config = 0x07},
868 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom4
869 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
870 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom5
871 {.channel = { {.config = 0x08}, {.config = 0x09}, {.config = 0x0A}, {.config = 0x0B}, {.config = 0x0C}, {.config = 0x0D}, {.config = 0x0E}, {.config = 0x0F},
872 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom6
873 {.channel = { {.config = 0x10}, {.config = 0x11}, {.config = 0x12}, {.config = 0x13}, {.config = 0x14}, {.config = 0x15}, {.config = 0x16}, {.config = 0x17},
874 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom7
875 {.channel = { {.config = 0x18}, {.config = 0x19}, {.config = 0x1A}, {.config = 0x1B}, {.config = 0x1C}, {.config = 0x1D}, {.config = 0x1E}, {.config = 0x1F},
876 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom8
877 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
878 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom9
879 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
880 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom10
881 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
882 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom11
883 }},
884 {.source = { //IfxGtm_MsccSet_7
885 //{.channel = { {Channel_0 }, {Channel_1 }, {Channel_2 }, {Channel_3 }, {Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 },
886 // {Channel_8 }, {Channel_9 }, {Channel_10 }, {Channel_11 }, {Channel_12 }, {Channel_13 }, {Channel_14 }, {Channel_15 }}},
887
888 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
889 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_tom0
890 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
891 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_tom1
892 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
893 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_tom2
894 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
895 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_tom3
896 {.channel = { {.config = 0x00}, {.config = 0x01}, {.config = 0x02}, {.config = 0x03}, {.config = 0x04}, {.config = 0x05}, {.config = 0x06}, {.config = 0x07},
897 {.config = 0x08}, {.config = 0x09}, {.config = 0x0A}, {.config = 0x0B}, {.config = 0x0C}, {.config = 0x0D}, {.config = 0x0E}, {.config = 0x0F}}}, //IfxGtm_MscTrigSource_tom4
898 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
899 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_tom5
900 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
901 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom0
902 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
903 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom1
904 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
905 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom2
906 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
907 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom3
908 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
909 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom4
910 {.channel = { {.config = 0x18}, {.config = 0x19}, {.config = 0x1A}, {.config = 0x1B}, {.config = 0x1C}, {.config = 0x1D}, {.config = 0x1E}, {.config = 0x1F},
911 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom5
912 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
913 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom6
914 {.channel = { {.config = 0x10}, {.config = 0x11}, {.config = 0x12}, {.config = 0x13}, {.config = 0x14}, {.config = 0x15}, {.config = 0x16}, {.config = 0x17},
915 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom7
916 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
917 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom8
918 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
919 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom9
920 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
921 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom10
922 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
923 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom11
924 }},
925 {.source = { //IfxGtm_MsccSet_8
926 //{.channel = { {Channel_0 }, {Channel_1 }, {Channel_2 }, {Channel_3 }, {Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 },
927 // {Channel_8 }, {Channel_9 }, {Channel_10 }, {Channel_11 }, {Channel_12 }, {Channel_13 }, {Channel_14 }, {Channel_15 }}},
928
929 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
930 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_tom0
931 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
932 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_tom1
933 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
934 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_tom2
935 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
936 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_tom3
937 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
938 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_tom4
939 {.channel = { {.config = 0x00}, {.config = 0x01}, {.config = 0x02}, {.config = 0x03}, {.config = 0x04}, {.config = 0x05}, {.config = 0x06}, {.config = 0x07},
940 {.config = 0x08}, {.config = 0x09}, {.config = 0x0A}, {.config = 0x0B}, {.config = 0x0C}, {.config = 0x0D}, {.config = 0x0E}, {.config = 0x0F}}}, //IfxGtm_MscTrigSource_tom5
941 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
942 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom0
943 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
944 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom1
945 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
946 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom2
947 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
948 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom3
949 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
950 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom4
951 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
952 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom5
953 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
954 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom6
955 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
956 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom7
957 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
958 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom8
959 {.channel = { {.config = 0x10}, {.config = 0x11}, {.config = 0x12}, {.config = 0x13}, {.config = 0x14}, {.config = 0x15}, {.config = 0x16}, {.config = 0x17},
960 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom9
961 {.channel = { {.config = 0x18}, {.config = 0x19}, {.config = 0x1A}, {.config = 0x1B}, {.config = 0x1C}, {.config = 0x1D}, {.config = 0x1E}, {.config = 0x1F},
962 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom10
963 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
964 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom11
965 }},
966 {.source = { //IfxGtm_MsccSet_9
967 //{.channel = { {Channel_0 }, {Channel_1 }, {Channel_2 }, {Channel_3 }, {Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 },
968 // {Channel_8 }, {Channel_9 }, {Channel_10 }, {Channel_11 }, {Channel_12 }, {Channel_13 }, {Channel_14 }, {Channel_15 }}},
969
970 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
971 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_tom0
972 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
973 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_tom1
974 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
975 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_tom2
976 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
977 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_tom3
978 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
979 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_tom4
980 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
981 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_tom5
982 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
983 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom0
984 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
985 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom1
986 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
987 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom2
988 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
989 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom3
990 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
991 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom4
992 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
993 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom5
994 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
995 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom6
996 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF},
997 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom7
998 {.channel = { {.config = 0x18}, {.config = 0x19}, {.config = 0x1A}, {.config = 0x1B}, {.config = 0x1C}, {.config = 0x1D}, {.config = 0x1E}, {.config = 0x1F},
999 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom8
1000 {.channel = { {.config = 0x10}, {.config = 0x11}, {.config = 0x12}, {.config = 0x13}, {.config = 0x14}, {.config = 0x15}, {.config = 0x16}, {.config = 0x17},
1001 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom9
1002 {.channel = { {.config = 0x08}, {.config = 0x09}, {.config = 0x0A}, {.config = 0x0B}, {.config = 0x0C}, {.config = 0x0D}, {.config = 0x0E}, {.config = 0x0F},
1003 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom10
1004 {.channel = { {.config = 0x00}, {.config = 0x01}, {.config = 0x02}, {.config = 0x03}, {.config = 0x04}, {.config = 0x05}, {.config = 0x06}, {.config = 0x07},
1005 {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_MscTrigSource_atom11
1006 }},
1007 }
1008 };
1009
1010 IFX_STATIC IFX_CONST IfxGtm_Trig_AdcTrig_Table IfxGtm_Trig_SentTrig_table12_13_14_15 = {
1011 .trigger = {
1012 {.source = { //IfxGtm_AdcTrig_0
1013 //{.channel = { {Channel_3 }, {Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 }, {Channel_11 }, {Channel_12 }, {Channel_13 }, {Channel_14 }, {Channel_15 }}},
1014 {.channel = { {.config = 0xFF}, {.config = 0x04}, {.config = 0x05}, {.config = 0x06}, {.config = 0x07}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom0
1015 {.channel = { {.config = 0xFF}, {.config = 0x08}, {.config = 0x09}, {.config = 0x0A}, {.config = 0x0B}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom1
1016 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom2
1017 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom3
1018 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x0C}, {.config = 0x0D}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom4
1019 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom5
1020 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x0E}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom6
1021 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom7
1022 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom8
1023 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom9
1024 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom10
1025 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom11
1026
1027 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x00}, {.config = 0x01}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x02}, {.config = 0x03}, {.config = 0x0F}}}, //IfxGtm_AdcTrigSource_tom0
1028 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom1
1029 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom2
1030 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom3
1031 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom4
1032 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom5
1033 }},
1034 {.source = { //IfxGtm_AdcTrig_1
1035 //{.channel = { {Channel_3 }, {Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 }, {Channel_11 }, {Channel_12 }, {Channel_13 }, {Channel_14 }, {Channel_15 }}},
1036 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom0
1037 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom1
1038 {.channel = { {.config = 0xFF}, {.config = 0x04}, {.config = 0x05}, {.config = 0x06}, {.config = 0x07}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom2
1039 {.channel = { {.config = 0xFF}, {.config = 0x08}, {.config = 0x09}, {.config = 0x0A}, {.config = 0x0B}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom3
1040 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom4
1041 {.channel = { {.config = 0x0F}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x0C}, {.config = 0x0D}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom5
1042 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x0E}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom6
1043 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom7
1044 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom8
1045 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom9
1046 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom10
1047 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom11
1048
1049 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom0
1050 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom1
1051 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x00}, {.config = 0x01}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x02}, {.config = 0x03}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom2
1052 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom3
1053 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom4
1054 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom5
1055 }},
1056 {.source = { //IfxGtm_AdcTrig_2
1057 //{.channel = { {Channel_3 }, {Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 }, {Channel_11 }, {Channel_12 }, {Channel_13 }, {Channel_14 }, {Channel_15 }}},
1058 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom0
1059 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom1
1060 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom2
1061 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom3
1062 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom4
1063 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom5
1064 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom6
1065 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x08}, {.config = 0x09}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom7
1066 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x0A}, {.config = 0x0B}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom8
1067 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x0C}, {.config = 0x0D}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom9
1068 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom10
1069 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x0E}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom11
1070
1071 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom0
1072 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x00}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x01}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom1
1073 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom2
1074 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x02}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x03}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom3
1075 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x04}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x05}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom4
1076 {.channel = { {.config = 0x0F}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x06}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x07}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom5
1077 }},
1078 {.source = { //IfxGtm_AdcTrig_3
1079 //{.channel = { {Channel_3 }, {Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 }, {Channel_11 }, {Channel_12 }, {Channel_13 }, {Channel_14 }, {Channel_15 }}},
1080 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom0
1081 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom1
1082 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom2
1083 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom3
1084 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom4
1085 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x0F}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom5
1086 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom6
1087 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom7
1088 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom8
1089 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom9
1090 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x01}, {.config = 0x02}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom10
1091 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x03}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom11
1092
1093 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom0
1094 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x00}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom1
1095 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom2
1096 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom3
1097 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom4
1098 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom5
1099 }},
1100 {.source = { //IfxGtm_AdcTrig_4
1101 //{.channel = { {Channel_3 }, {Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 }, {Channel_11 }, {Channel_12 }, {Channel_13 }, {Channel_14 }, {Channel_15 }}},
1102 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom0
1103 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom1
1104 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom2
1105 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom3
1106 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom4
1107 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom5
1108 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom6
1109 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom7
1110 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom8
1111 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom9
1112 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom10
1113 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom11
1114
1115 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom0
1116 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom1
1117 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom2
1118 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom3
1119 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x0F}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom4
1120 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom5
1121 }}
1122 }
1123 };
1124
1125 /******************************************************************************/
1126 /*-------------------------Function Implementations---------------------------*/
1127 /******************************************************************************/
1128
1129 boolean IfxGtm_Trig_fromEdsadc(Ifx_GTM *gtm, uint32 edsadcChannel, IfxGtm_Tim tim, IfxGtm_Tim_Ch timChannel)
1130 {
1131 boolean result = __checkrange(edsadcChannel, 2, 13);
1132
1133 if (result == FALSE)
1134 {
1135 // do nothing
1136 }
1137 else
1138 {
1139 uint32 mask = 0xFU << (timChannel * 4);
1140 __ldmst_c(&(gtm->DSADCINSEL[tim].U), mask, edsadcChannel << (timChannel * 4));
1141 }
1142
1143 return result;
1144 }
1145
1146
1147 boolean IfxGtm_Trig_fromMsc(Ifx_GTM *gtm, uint32 msc, IfxGtm_Trig_MscTrigInput input, IfxGtm_Trig_MscTrigOutput output, IfxGtm_Trig_MscTrigSignal signal)
1148 {
1149 uint32 shift = signal * 2;
1150 uint32 mask = 0x3U << shift;
1151 uint32 value = output << shift;
1152 boolean result = TRUE;
1153
1154 switch (input)
1155 {
1156 case IfxGtm_Trig_MscTrigInput_low:
1157 __ldmst_c(&(gtm->MSC.MSCQ[msc].INLCON.U), mask, value);
1158 break;
1159 case IfxGtm_Trig_MscTrigInput_lowExtended:
1160 __ldmst_c(&(gtm->MSC.MSCQ[msc].INLEXTCON.U), mask, value);
1161 break;
1162 case IfxGtm_Trig_MscTrigInput_high:
1163 __ldmst_c(&(gtm->MSC.MSCQ[msc].INHCON.U), mask, value);
1164 break;
1165 default: result = FALSE;
1166 break;
1167 }
1168
1169 return result;
1170 }
1171
1172
1173 boolean IfxGtm_Trig_toCan(Ifx_GTM *gtm, IfxGtm_Trig_CanTrig canTrig, IfxGtm_Trig_CanDevice canDevice, IfxGtm_Trig_CanTrigSource source, IfxGtm_Trig_CanTrigChannel channel)
1174 {
1175 IFX_CONST IfxGtm_Trig_CanTrig_Table *table = NULL_PTR;
1176 uint8 config;
1177 boolean result = 0;
1178 uint32 shift;
1179 uint32 mask;
1180 uint32 value;
1181
1182 switch (canTrig)
1183 {
1184 case IfxGtm_Trig_CanTrig_0:
1185 table = &IfxGtm_Trig_CanTrig_table0;
1186 break;
1187 case IfxGtm_Trig_CanTrig_1:
1188 table = &IfxGtm_Trig_CanTrig_table1;
1189 break;
1190 case IfxGtm_Trig_CanTrig_2:
1191 case IfxGtm_Trig_CanTrig_3:
1192 table = &IfxGtm_Trig_CanTrig_table2_3;
1193 break;
1194 default:
1195 break;
1196 }
1197
1198 if (table != NULL_PTR)
1199 {
1200 config = table->trigger.source[source].channel[channel].config;
1201 result = config != 0xFF;
1202
1203 switch (canDevice)
1204 {
1205 case IfxGtm_Trig_CanDevice_0:
1206 case IfxGtm_Trig_CanDevice_1:
1207 shift = (canTrig * 4) + (canDevice * 16);
1208 mask = 0xFU << shift;
1209 value = config << shift;
1210 __ldmst_c(&(gtm->CANOUTSEL0.U), mask, value);
1211 break;
1212 case IfxGtm_Trig_CanDevice_2:
1213 shift = canTrig * 4;
1214 mask = 0xFU << shift;
1215 value = config << shift;
1216 __ldmst_c(&(gtm->CANOUTSEL1.U), mask, value);
1217 break;
1218 default:
1219 break;
1220 }
1221 }
1222
1223 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, result);
1224
1225 return result;
1226 }
1227
1228
1229 boolean IfxGtm_Trig_toEVadc(Ifx_GTM *gtm, IfxGtm_Trig_AdcGroup adcGroup, IfxGtm_Trig_AdcTrig adcTrig, IfxGtm_Trig_AdcTrigSource source, IfxGtm_Trig_AdcTrigChannel channel)
1230 {
1231 IFX_CONST IfxGtm_Trig_AdcTrig_Table *table = NULL_PTR;
1232 uint8 config;
1233
1234 boolean result = 0;
1235
1236 switch (adcGroup)
1237 {
1238 case IfxGtm_Trig_AdcGroup_0:
1239 case IfxGtm_Trig_AdcGroup_1:
1240 case IfxGtm_Trig_AdcGroup_2:
1241 table = &IfxGtm_Trig_EvadcTrig_tableAdc0_1_2;
1242 break;
1243 case IfxGtm_Trig_AdcGroup_3:
1244 case IfxGtm_Trig_AdcGroup_4:
1245 table = &IfxGtm_Trig_EvadcTrig_tableAdc3_4;
1246 break;
1247 case IfxGtm_Trig_AdcGroup_5:
1248 case IfxGtm_Trig_AdcGroup_6:
1249 case IfxGtm_Trig_AdcGroup_7:
1250 table = &IfxGtm_Trig_EvadcTrig_tableAdc5_6_7;
1251 break;
1252 case IfxGtm_Trig_AdcGroup_8:
1253 case IfxGtm_Trig_AdcGroup_9:
1254 case IfxGtm_Trig_AdcGroup_10:
1255 case IfxGtm_Trig_AdcGroup_11:
1256 table = &IfxGtm_Trig_EvadcTrig_tableAdc8_9_10_11;
1257 break;
1258 default:
1259 break;
1260 }
1261
1262 if (table != NULL_PTR)
1263 {
1264 config = table->trigger[adcTrig].source[source].channel[channel].config;
1265 result = config != 0xFF;
1266
1267 uint32 shift = (adcGroup % 8) * 4;
1268 uint32 mask = 0xFU << shift;
1269 uint32 value = config << shift;
1270
1271 if ((adcGroup / 8) == 0)
1272 {
1273 __ldmst_c(&(gtm->ADCTRIG[adcTrig].OUT0.U), mask, value);
1274 }
1275 else
1276 {
1277 __ldmst_c(&(gtm->ADCTRIG[adcTrig].OUT1.U), mask, value);
1278 }
1279 }
1280
1281 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, result);
1282
1283 return result;
1284 }
1285
1286
1287 void IfxGtm_Trig_toEVadcClear(Ifx_GTM *gtm, IfxGtm_Trig_AdcGroup adcGroup, IfxGtm_Trig_AdcTrig adcTrig)
1288 {
1289 uint8 config = 0x0;
1290 uint32 shift = (adcGroup % 8) * 4;
1291 uint32 mask = 0xFU << shift;
1292 uint32 value = config << shift;
1293
1294 if ((adcGroup / 8) == 0)
1295 {
1296 __ldmst_c(&(gtm->ADCTRIG[adcTrig].OUT0.U), mask, value);
1297 }
1298 else
1299 {
1300 __ldmst_c(&(gtm->ADCTRIG[adcTrig].OUT1.U), mask, value);
1301 }
1302 }
1303
1304
1305 void IfxGtm_Trig_toEdsadc(Ifx_GTM *gtm, uint32 edsadcChannel, IfxGtm_Trig_EdsadcTrig edsadcTrig, IfxGtm_Trig_EdsadcTrigSource sel)
1306 {
1307 uint32 shift = (edsadcChannel % 8) * 4;
1308 uint32 mask = 0xFU << shift;
1309 uint32 value = (sel % 16) << shift;
1310
1311 if ((edsadcChannel / 8) == 0)
1312 {
1313 __ldmst_c(&(gtm->DSADC[edsadcTrig].OUTSEL0.U), mask, value);
1314 }
1315 else
1316 {
1317 __ldmst_c(&(gtm->DSADC[edsadcTrig].OUTSEL1.U), mask, value);
1318 }
1319 }
1320
1321
1322 boolean IfxGtm_Trig_toMsc(Ifx_GTM *gtm, IfxGtm_Trig_MscTrigSignal signal, IfxGtm_Trig_MscTrigSet mscSet, IfxGtm_Trig_MscTrigSource source, IfxGtm_Trig_MscTrigChannel channel)
1323 {
1324 IFX_CONST IfxGtm_Trig_MscTrig_Table *table = NULL_PTR;
1325 table = &IfxGtm_Trig_MscTrig_table;
1326 uint8 config;
1327
1328 boolean result = 0;
1329
1330 {
1331 config = table->set[mscSet].source[source].channel[channel].config;
1332 result = config != 0xFF;
1333 uint32 shift = (signal % 4) * 8;
1334 uint32 mask = 0x1FU << shift;
1335 uint32 value = config << shift;
1336
1337 if (mscSet < IfxGtm_Trig_MscTrigSet_count)
1338 {
1339 switch (signal / 4)
1340 {
1341 case 0:
1342 __ldmst_c(&(gtm->MSC.SET[mscSet].CON0.U), mask, value);
1343 break;
1344 case 1:
1345 __ldmst_c(&(gtm->MSC.SET[mscSet].CON1.U), mask, value);
1346 break;
1347 case 2:
1348 __ldmst_c(&(gtm->MSC.SET[mscSet].CON2.U), mask, value);
1349 break;
1350 case 3:
1351 __ldmst_c(&(gtm->MSC.SET[mscSet].CON3.U), mask, value);
1352 break;
1353 default:
1354 break;
1355 }
1356 }
1357 else
1358 {
1359 result = FALSE;
1360 }
1361 }
1362
1363 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, result);
1364
1365 return result;
1366 }
1367
1368
1369 void IfxGtm_Trig_toPsi5(Ifx_GTM *gtm, uint32 psi5Channel, IfxGtm_Trig_Psi5TrigSource sel)
1370 {
1371 uint32 shift = (psi5Channel * 4);
1372 uint32 mask = 0xFU << shift;
1373 uint32 value = sel << shift;
1374 __ldmst_c(&(gtm->PSI5OUTSEL.U), mask, value);
1375 }
1376
1377
1378 void IfxGtm_Trig_toPsi5s(Ifx_GTM *gtm, uint32 psi5sChannel, IfxGtm_Trig_Psi5sTrigSource sel)
1379 {
1380 uint32 shift = (psi5sChannel * 4);
1381 uint32 mask = 0xFU << shift;
1382 uint32 value = sel << shift;
1383
1384 __ldmst_c(&(gtm->PSI5SOUTSEL.U), mask, value);
1385 }
1386
1387
1388 boolean IfxGtm_Trig_toSent(Ifx_GTM *gtm, IfxGtm_Trig_SentGroup sentGroup, IfxGtm_Trig_SentTrig sentTrig, IfxGtm_Trig_SentTrigSource source, IfxGtm_Trig_SentTrigChannel channel)
1389 {
1390 IFX_CONST IfxGtm_Trig_AdcTrig_Table *table = NULL_PTR;
1391 uint8 config;
1392 uint32 shift, mask, value;
1393
1394 boolean result = 0;
1395
1396 switch (sentGroup)
1397 {
1398 case IfxGtm_Trig_SentGroup_0:
1399 case IfxGtm_Trig_SentGroup_1:
1400 case IfxGtm_Trig_SentGroup_2:
1401 table = &IfxGtm_Trig_EvadcTrig_tableAdc0_1_2;
1402 break;
1403 case IfxGtm_Trig_SentGroup_3:
1404 case IfxGtm_Trig_SentGroup_4:
1405 table = &IfxGtm_Trig_EvadcTrig_tableAdc3_4;
1406 break;
1407 case IfxGtm_Trig_SentGroup_5:
1408 case IfxGtm_Trig_SentGroup_6:
1409 case IfxGtm_Trig_SentGroup_7:
1410 table = &IfxGtm_Trig_EvadcTrig_tableAdc5_6_7;
1411 break;
1412 case IfxGtm_Trig_SentGroup_8:
1413 case IfxGtm_Trig_SentGroup_9:
1414 case IfxGtm_Trig_SentGroup_10:
1415 case IfxGtm_Trig_SentGroup_11:
1416 table = &IfxGtm_Trig_EvadcTrig_tableAdc8_9_10_11;
1417 break;
1418 case IfxGtm_Trig_SentGroup_12:
1419 case IfxGtm_Trig_SentGroup_13:
1420 case IfxGtm_Trig_SentGroup_14:
1421 case IfxGtm_Trig_SentGroup_15:
1422 table = &IfxGtm_Trig_SentTrig_table12_13_14_15;
1423 break;
1424 default:
1425 break;
1426 }
1427
1428 if (table != NULL_PTR)
1429 {
1430 config = table->trigger[sentTrig].source[source].channel[channel].config;
1431 result = config != 0xFF;
1432
1433 if ((sentGroup / 12) == 0) // write to EVADC registers
1434 {
1435 shift = (sentGroup % 8) * 4;
1436 }
1437 else // write EDSADC registers
1438 {
1439 shift = (sentGroup % 12) * 4;
1440 }
1441
1442 mask = 0xFU << shift;
1443 value = config << shift;
1444
1445 if ((sentGroup / 12) == 0) // write to EVADC registers
1446 {
1447 if ((sentGroup / 8) == 0)
1448 {
1449 __ldmst_c(&(gtm->ADCTRIG[sentTrig].OUT0.U), mask, value);
1450 }
1451 else
1452 {
1453 __ldmst_c(&(gtm->ADCTRIG[sentTrig].OUT1.U), mask, value);
1454 }
1455 }
1456 else
1457 {
1458 __ldmst_c(&(gtm->DSADC[sentTrig].OUTSEL0.U), mask, value);
1459 }
1460 }
1461
1462 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, result);
1463
1464 return result;
1465 }
IfxGtm_Trig_CanTrigSource_count
count of the enum definition
Definition: IfxGtm_Trig.h:189
IfxGtm_Trig_toCan
boolean IfxGtm_Trig_toCan(Ifx_GTM *gtm, IfxGtm_Trig_CanTrig canTrig, IfxGtm_Trig_CanDevice canDevice, IfxGtm_Trig_CanTrigSource source, IfxGtm_Trig_CanTrigChannel channel)
Definition: IfxGtm_Trig.c:1173
IfxGtm_Trig_SentTrig
IfxGtm_Trig_SentTrig
Enum for SENT trigger.
Definition: IfxGtm_Trig.h:423
IfxGtm_Trig_toPsi5
void IfxGtm_Trig_toPsi5(Ifx_GTM *gtm, uint32 psi5Channel, IfxGtm_Trig_Psi5TrigSource sel)
Definition: IfxGtm_Trig.c:1369
IfxGtm_Trig_CanTrig_Source::channel
IfxGtm_Trig_CanTrig_Channel channel[IfxGtm_Trig_CanTrigChannel_count]
Definition: IfxGtm_Trig.c:82
IfxGtm_Trig_CanDevice
IfxGtm_Trig_CanDevice
CAN device enum.
Definition: IfxGtm_Trig.h:142
IfxGtm_Trig_SentGroup_7
For SENT group 7.
Definition: IfxGtm_Trig.h:410
IfxGtm_Trig_AdcTrigChannel_count
count of the enum definition
Definition: IfxGtm_Trig.h:112
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxGtm_Trig_CanTrig_Trigger
Definition: IfxGtm_Trig.c:99
IfxGtm_Trig_AdcTrig_count
count of the enum definition
Definition: IfxGtm_Trig.h:95
IfxGtm_Trig_fromEdsadc
boolean IfxGtm_Trig_fromEdsadc(Ifx_GTM *gtm, uint32 edsadcChannel, IfxGtm_Tim tim, IfxGtm_Tim_Ch timChannel)
Definition: IfxGtm_Trig.c:1129
IfxGtm_Trig_AdcTrig_Source
Definition: IfxGtm_Trig.c:75
IfxGtm_Trig_CanTrig_3
For CAN Trig 3.
Definition: IfxGtm_Trig.h:157
IfxGtm_Trig_AdcTrig_Table::trigger
IfxGtm_Trig_AdcTrig_Trigger trigger[IfxGtm_Trig_AdcTrig_count]
Definition: IfxGtm_Trig.c:115
IfxGtm_Trig_SentGroup_10
For SENT group 10.
Definition: IfxGtm_Trig.h:413
IfxGtm_Trig_CanTrig_2
For CAN Trig 2.
Definition: IfxGtm_Trig.h:156
IfxGtm_Trig_AdcTrig_Channel
Definition: IfxGtm_Trig.c:56
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxGtm_Trig_toSent
boolean IfxGtm_Trig_toSent(Ifx_GTM *gtm, IfxGtm_Trig_SentGroup sentGroup, IfxGtm_Trig_SentTrig sentTrig, IfxGtm_Trig_SentTrigSource source, IfxGtm_Trig_SentTrigChannel channel)
Definition: IfxGtm_Trig.c:1388
__ldmst_c
IFX_INLINE void __ldmst_c(volatile void *address, unsigned mask, unsigned value)
Definition: IfxCpu_Intrinsics.h:108
IfxGtm_Trig_SentGroup_13
For SENT group 13.
Definition: IfxGtm_Trig.h:416
Ifx_Assert.h
Assert functions.
IfxGtm_Trig_toPsi5s
void IfxGtm_Trig_toPsi5s(Ifx_GTM *gtm, uint32 psi5sChannel, IfxGtm_Trig_Psi5sTrigSource sel)
Definition: IfxGtm_Trig.c:1378
IfxGtm_Trig_SentGroup_12
For SENT group 12.
Definition: IfxGtm_Trig.h:415
IfxGtm_Trig_SentTrigSource
IfxGtm_Trig_SentTrigSource
Enum for SENT trigger source.
Definition: IfxGtm_Trig.h:450
IfxGtm_Tim
IfxGtm_Tim
Enum for TIM objects.
Definition: IfxGtm_cfg.h:390
IfxGtm_Trig_SentGroup_6
For SENT group 6.
Definition: IfxGtm_Trig.h:409
IfxGtm_Trig_CanTrig_Table::trigger
IfxGtm_Trig_CanTrig_Trigger trigger
Definition: IfxGtm_Trig.c:120
IfxGtm_Trig_MscTrig_table
IFX_STATIC IFX_CONST IfxGtm_Trig_MscTrig_Table IfxGtm_Trig_MscTrig_table
Definition: IfxGtm_Trig.c:636
IfxGtm_Trig_SentGroup_9
For SENT group 9.
Definition: IfxGtm_Trig.h:412
IfxGtm_Trig_AdcTrig
IfxGtm_Trig_AdcTrig
Enum for ADC trigger.
Definition: IfxGtm_Trig.h:88
IfxCpu_Intrinsics.h
IfxGtm_Trig_AdcTrigSource_count
count of the enum definition
Definition: IfxGtm_Trig.h:137
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxGtm_Trig_CanTrig_Table
Definition: IfxGtm_Trig.c:118
IfxGtm_Trig_SentTrigChannel
IfxGtm_Trig_SentTrigChannel
Enum for SENT trigger channel.
Definition: IfxGtm_Trig.h:433
IfxGtm_Trig_AdcTrig_Trigger
Definition: IfxGtm_Trig.c:94
IfxGtm_Trig_MscTrigInput_low
Definition: IfxGtm_Trig.h:287
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxGtm_Trig_CanTrig_Source
Definition: IfxGtm_Trig.c:80
IfxGtm_Trig_MscTrigSource
IfxGtm_Trig_MscTrigSource
Enum for MSC trigger source.
Definition: IfxGtm_Trig.h:342
IfxGtm_Trig_MscTrig_Source
Definition: IfxGtm_Trig.c:85
IfxGtm_Trig_SentTrig_table12_13_14_15
IFX_STATIC IFX_CONST IfxGtm_Trig_AdcTrig_Table IfxGtm_Trig_SentTrig_table12_13_14_15
Definition: IfxGtm_Trig.c:1010
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxGtm_Trig_MscTrigSet
IfxGtm_Trig_MscTrigSet
Enum for MSC Sets.
Definition: IfxGtm_Trig.h:304
IfxGtm_Trig_EvadcTrig_tableAdc8_9_10_11
IFX_STATIC IFX_CONST IfxGtm_Trig_AdcTrig_Table IfxGtm_Trig_EvadcTrig_tableAdc8_9_10_11
Definition: IfxGtm_Trig.c:521
IfxGtm_Trig_EvadcTrig_tableAdc5_6_7
IFX_STATIC IFX_CONST IfxGtm_Trig_AdcTrig_Table IfxGtm_Trig_EvadcTrig_tableAdc5_6_7
Definition: IfxGtm_Trig.c:406
IfxGtm_Trig_EdsadcTrigSource
IfxGtm_Trig_EdsadcTrigSource
Enum for EDSADC trigger source.
Definition: IfxGtm_Trig.h:204
IfxGtm_Trig_AdcGroup_1
For ADC group 1.
Definition: IfxGtm_Trig.h:73
IfxGtm_Trig_AdcTrig_Source::channel
IfxGtm_Trig_AdcTrig_Channel channel[IfxGtm_Trig_AdcTrigChannel_count]
Definition: IfxGtm_Trig.c:77
IfxGtm_Trig_AdcTrigSource
IfxGtm_Trig_AdcTrigSource
Enum for ADC trigger source.
Definition: IfxGtm_Trig.h:117
IfxGtm_Trig_MscTrig_Source::channel
IfxGtm_Trig_MscTrig_Channel channel[IfxGtm_Trig_MscTrigChannel_count]
Definition: IfxGtm_Trig.c:87
IfxGtm_Trig_Psi5sTrigSource
IfxGtm_Trig_Psi5sTrigSource
Enum for DSADC trigger source.
Definition: IfxGtm_Trig.h:386
IfxGtm_Trig_CanTrigSource
IfxGtm_Trig_CanTrigSource
Enum for CAN trigger source.
Definition: IfxGtm_Trig.h:182
IfxGtm_Trig_EvadcTrig_tableAdc0_1_2
IFX_STATIC IFX_CONST IfxGtm_Trig_AdcTrig_Table IfxGtm_Trig_EvadcTrig_tableAdc0_1_2
Definition: IfxGtm_Trig.c:176
IfxGtm_Trig_AdcTrig_Trigger::source
IfxGtm_Trig_AdcTrig_Source source[IfxGtm_Trig_AdcTrigSource_count]
Definition: IfxGtm_Trig.c:96
IfxGtm_Trig_MscTrigInput_high
Definition: IfxGtm_Trig.h:289
IfxGtm_Trig_MscTrig_Table
Definition: IfxGtm_Trig.c:123
IfxGtm_Trig_MscTrig_Channel
Definition: IfxGtm_Trig.c:66
IfxGtm_Trig_Psi5TrigSource
IfxGtm_Trig_Psi5TrigSource
Enum for PSI5 trigger source.
Definition: IfxGtm_Trig.h:367
IfxGtm_Trig_CanTrig_0
For CAN Trig 0.
Definition: IfxGtm_Trig.h:154
IfxGtm_Trig_CanTrig
IfxGtm_Trig_CanTrig
Enum for CAN trigger.
Definition: IfxGtm_Trig.h:152
IfxGtm_Trig_MscTrigChannel_count
count of the enum definition
Definition: IfxGtm_Trig.h:280
IfxGtm_Trig_AdcTrig_Table
Definition: IfxGtm_Trig.c:113
IfxGtm_Trig_fromMsc
boolean IfxGtm_Trig_fromMsc(Ifx_GTM *gtm, uint32 msc, IfxGtm_Trig_MscTrigInput input, IfxGtm_Trig_MscTrigOutput output, IfxGtm_Trig_MscTrigSignal signal)
Definition: IfxGtm_Trig.c:1147
IfxGtm_Trig_MscTrigInput
IfxGtm_Trig_MscTrigInput
Enum for MSC trigger Input Type.
Definition: IfxGtm_Trig.h:285
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:50
IfxGtm_Trig_MscTrigChannel
IfxGtm_Trig_MscTrigChannel
Enum for MSC trigger channel.
Definition: IfxGtm_Trig.h:262
IfxGtm_Trig_MscTrigOutput
IfxGtm_Trig_MscTrigOutput
Enum for MSC trigger output select.
Definition: IfxGtm_Trig.h:294
IfxGtm_Trig_AdcGroup_11
For ADC group 11.
Definition: IfxGtm_Trig.h:83
IfxGtm_Trig_AdcGroup_7
For ADC group 7.
Definition: IfxGtm_Trig.h:79
IfxGtm_Trig_AdcGroup
IfxGtm_Trig_AdcGroup
Enum for ADC group.
Definition: IfxGtm_Trig.h:70
IfxGtm_Trig_CanDevice_2
CAN device 2.
Definition: IfxGtm_Trig.h:146
IfxGtm_Trig_toEVadcClear
void IfxGtm_Trig_toEVadcClear(Ifx_GTM *gtm, IfxGtm_Trig_AdcGroup adcGroup, IfxGtm_Trig_AdcTrig adcTrig)
Definition: IfxGtm_Trig.c:1287
IfxGtm_Trig_MscTrigSignal
IfxGtm_Trig_MscTrigSignal
Enum for MSC Signal.
Definition: IfxGtm_Trig.h:320
IfxGtm_Trig_AdcGroup_10
For ADC group 10.
Definition: IfxGtm_Trig.h:82
IfxGtm_Trig_SentGroup_2
For SENT group 2.
Definition: IfxGtm_Trig.h:405
IfxGtm_Trig_SentGroup_15
For SENT group 15.
Definition: IfxGtm_Trig.h:418
IfxGtm_Trig_SentGroup_0
For SENT group 0.
Definition: IfxGtm_Trig.h:403
IfxGtm_Trig_SentGroup
IfxGtm_Trig_SentGroup
Enum for SENT group.
Definition: IfxGtm_Trig.h:401
__checkrange
#define __checkrange
Definition: IfxCpu_IntrinsicsDcc.h:1621
IfxGtm_Trig_MscTrigSource_count
count of the enum definition
Definition: IfxGtm_Trig.h:362
IfxGtm_Trig_SentGroup_1
For SENT group 1.
Definition: IfxGtm_Trig.h:404
IfxGtm_Trig_CanTrig_Trigger::source
IfxGtm_Trig_CanTrig_Source source[IfxGtm_Trig_CanTrigSource_count]
Definition: IfxGtm_Trig.c:101
IfxGtm_Trig_AdcGroup_9
For ADC group 9.
Definition: IfxGtm_Trig.h:81
IfxGtm_Trig_toMsc
boolean IfxGtm_Trig_toMsc(Ifx_GTM *gtm, IfxGtm_Trig_MscTrigSignal signal, IfxGtm_Trig_MscTrigSet mscSet, IfxGtm_Trig_MscTrigSource source, IfxGtm_Trig_MscTrigChannel channel)
Definition: IfxGtm_Trig.c:1322
IfxGtm_Trig_AdcGroup_6
For ADC group 6.
Definition: IfxGtm_Trig.h:78
IfxGtm_Trig_EvadcTrig_tableAdc3_4
IFX_STATIC IFX_CONST IfxGtm_Trig_AdcTrig_Table IfxGtm_Trig_EvadcTrig_tableAdc3_4
Definition: IfxGtm_Trig.c:291
IfxGtm_Trig_AdcGroup_2
For ADC group 2.
Definition: IfxGtm_Trig.h:74
IfxGtm_Trig_MscTrig_Table::set
IfxGtm_Trig_MscTrig_Set set[IfxGtm_Trig_MscTrigSet_count]
Definition: IfxGtm_Trig.c:125
IfxGtm_Trig_AdcGroup_0
For ADC group 0.
Definition: IfxGtm_Trig.h:72
IfxGtm_Trig_CanTrig_1
For CAN Trig 1.
Definition: IfxGtm_Trig.h:155
IfxGtm_Trig_AdcGroup_4
For ADC group 4.
Definition: IfxGtm_Trig.h:76
IfxGtm_Trig_SentGroup_3
For SENT group 3.
Definition: IfxGtm_Trig.h:406
IfxGtm_Trig_SentGroup_8
For SENT group 8.
Definition: IfxGtm_Trig.h:411
IfxGtm_Trig_AdcGroup_8
For ADC group 8.
Definition: IfxGtm_Trig.h:80
IfxGtm_Trig_MscTrigInput_lowExtended
Definition: IfxGtm_Trig.h:288
IfxGtm_Trig_AdcTrig_Channel::config
sint8 config
Value for SEL0/1. config=0xFF means "not available".
Definition: IfxGtm_Trig.c:58
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxGtm_Trig_AdcGroup_3
For ADC group 3.
Definition: IfxGtm_Trig.h:75
IfxGtm_Trig_toEVadc
boolean IfxGtm_Trig_toEVadc(Ifx_GTM *gtm, IfxGtm_Trig_AdcGroup adcGroup, IfxGtm_Trig_AdcTrig adcTrig, IfxGtm_Trig_AdcTrigSource source, IfxGtm_Trig_AdcTrigChannel channel)
Definition: IfxGtm_Trig.c:1229
IfxGtm_Trig_CanTrigChannel_count
count of the enum definition
Definition: IfxGtm_Trig.h:177
IfxGtm_Trig_EdsadcTrig
IfxGtm_Trig_EdsadcTrig
Enum for EDSADC trigger.
Definition: IfxGtm_Trig.h:194
IfxGtm_Trig_SentGroup_11
For SENT group 11.
Definition: IfxGtm_Trig.h:414
IfxGtm_Trig_CanDevice_0
CAN device 0.
Definition: IfxGtm_Trig.h:144
IfxGtm_Trig_SentGroup_5
For SENT group 5.
Definition: IfxGtm_Trig.h:408
IfxGtm_Tim_Ch
IfxGtm_Tim_Ch
Enum for TIM channels.
Definition: IfxGtm_cfg.h:403
IfxGtm_Trig_CanDevice_1
CAN device 1.
Definition: IfxGtm_Trig.h:145
IfxGtm_Trig_CanTrigChannel
IfxGtm_Trig_CanTrigChannel
Enum for CAN trigger channel.
Definition: IfxGtm_Trig.h:163
IfxGtm_Trig_CanTrig_table0
IFX_STATIC IFX_CONST IfxGtm_Trig_CanTrig_Table IfxGtm_Trig_CanTrig_table0
Definition: IfxGtm_Trig.c:134
IfxGtm_Trig_AdcGroup_5
For ADC group 5.
Definition: IfxGtm_Trig.h:77
IfxGtm_Trig_AdcTrigChannel
IfxGtm_Trig_AdcTrigChannel
Enum for ADC trigger channel.
Definition: IfxGtm_Trig.h:100
IfxGtm_Trig_toEdsadc
void IfxGtm_Trig_toEdsadc(Ifx_GTM *gtm, uint32 edsadcChannel, IfxGtm_Trig_EdsadcTrig edsadcTrig, IfxGtm_Trig_EdsadcTrigSource sel)
Definition: IfxGtm_Trig.c:1305
IfxGtm_Trig_MscTrig_Set::source
IfxGtm_Trig_MscTrig_Source source[IfxGtm_Trig_MscTrigSource_count]
Definition: IfxGtm_Trig.c:106
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxGtm_Trig_CanTrig_table2_3
IFX_STATIC IFX_CONST IfxGtm_Trig_CanTrig_Table IfxGtm_Trig_CanTrig_table2_3
Definition: IfxGtm_Trig.c:162
IfxGtm_Trig.h
GTM TRIG details.
IfxGtm_Trig_CanTrig_table1
IFX_STATIC IFX_CONST IfxGtm_Trig_CanTrig_Table IfxGtm_Trig_CanTrig_table1
Definition: IfxGtm_Trig.c:148
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxGtm_Trig_MscTrig_Set
Definition: IfxGtm_Trig.c:104
IfxGtm_Trig_CanTrig_Channel
Definition: IfxGtm_Trig.c:61
IfxGtm_Trig_SentGroup_4
For SENT group 4.
Definition: IfxGtm_Trig.h:407
sint8
signed char sint8
Definition: Platform_Types.h:125
IfxGtm_Trig_SentGroup_14
For SENT group 14.
Definition: IfxGtm_Trig.h:417
IfxGtm_Trig_MscTrigSet_count
count of the enum definition
Definition: IfxGtm_Trig.h:315


iLLD_TC38A: IfxGtm_Trig.h Source File

  • Gtm
  • Trig
IfxGtm_Trig.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Trig.h
3 * \brief GTM TRIG details
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Gtm_Trig GTM Trigger Configuration
42 * \ingroup IfxLld_Gtm
43 * \defgroup IfxLld_Gtm_Trig_Enumerations Enumerations
44 * \ingroup IfxLld_Gtm_Trig
45 * \defgroup IfxLld_Gtm_Trig_Data_Structures Data Structures
46 * \ingroup IfxLld_Gtm_Trig
47 * \defgroup IfxLld_Gtm_Trig_Trigger_Functions Trigger Functions
48 * \ingroup IfxLld_Gtm_Trig
49 */
50
51 #ifndef IFXGTM_TRIG_H
52 #define IFXGTM_TRIG_H 1
53
54 /******************************************************************************/
55 /*----------------------------------Includes----------------------------------*/
56 /******************************************************************************/
57
58 #include "Cpu/Std/Ifx_Types.h"
59 #include "_Impl/IfxGtm_cfg.h"
60 #include "Gtm/Std/IfxGtm_Tim.h"
61
62 /******************************************************************************/
63 /*--------------------------------Enumerations--------------------------------*/
64 /******************************************************************************/
65
66 /** \addtogroup IfxLld_Gtm_Trig_Enumerations
67 * \{ */
68 /** \brief Enum for ADC group
69 */
70 typedef enum
71 {
72 IfxGtm_Trig_AdcGroup_0, /**< \brief For ADC group 0 */
73 IfxGtm_Trig_AdcGroup_1, /**< \brief For ADC group 1 */
74 IfxGtm_Trig_AdcGroup_2, /**< \brief For ADC group 2 */
75 IfxGtm_Trig_AdcGroup_3, /**< \brief For ADC group 3 */
76 IfxGtm_Trig_AdcGroup_4, /**< \brief For ADC group 4 */
77 IfxGtm_Trig_AdcGroup_5, /**< \brief For ADC group 5 */
78 IfxGtm_Trig_AdcGroup_6, /**< \brief For ADC group 6 */
79 IfxGtm_Trig_AdcGroup_7, /**< \brief For ADC group 7 */
80 IfxGtm_Trig_AdcGroup_8, /**< \brief For ADC group 8 */
81 IfxGtm_Trig_AdcGroup_9, /**< \brief For ADC group 9 */
82 IfxGtm_Trig_AdcGroup_10, /**< \brief For ADC group 10 */
83 IfxGtm_Trig_AdcGroup_11 /**< \brief For ADC group 11 */
84 } IfxGtm_Trig_AdcGroup;
85
86 /** \brief Enum for ADC trigger
87 */
88 typedef enum
89 {
90 IfxGtm_Trig_AdcTrig_0,
91 IfxGtm_Trig_AdcTrig_1,
92 IfxGtm_Trig_AdcTrig_2,
93 IfxGtm_Trig_AdcTrig_3,
94 IfxGtm_Trig_AdcTrig_4,
95 IfxGtm_Trig_AdcTrig_count /**< \brief count of the enum definition */
96 } IfxGtm_Trig_AdcTrig;
97
98 /** \brief Enum for ADC trigger channel
99 */
100 typedef enum
101 {
102 IfxGtm_Trig_AdcTrigChannel_3,
103 IfxGtm_Trig_AdcTrigChannel_4,
104 IfxGtm_Trig_AdcTrigChannel_5,
105 IfxGtm_Trig_AdcTrigChannel_6,
106 IfxGtm_Trig_AdcTrigChannel_7,
107 IfxGtm_Trig_AdcTrigChannel_11,
108 IfxGtm_Trig_AdcTrigChannel_12,
109 IfxGtm_Trig_AdcTrigChannel_13,
110 IfxGtm_Trig_AdcTrigChannel_14,
111 IfxGtm_Trig_AdcTrigChannel_15,
112 IfxGtm_Trig_AdcTrigChannel_count /**< \brief count of the enum definition */
113 } IfxGtm_Trig_AdcTrigChannel;
114
115 /** \brief Enum for ADC trigger source
116 */
117 typedef enum
118 {
119 IfxGtm_Trig_AdcTrigSource_atom0,
120 IfxGtm_Trig_AdcTrigSource_atom1,
121 IfxGtm_Trig_AdcTrigSource_atom2,
122 IfxGtm_Trig_AdcTrigSource_atom3,
123 IfxGtm_Trig_AdcTrigSource_atom4,
124 IfxGtm_Trig_AdcTrigSource_atom5,
125 IfxGtm_Trig_AdcTrigSource_atom6,
126 IfxGtm_Trig_AdcTrigSource_atom7,
127 IfxGtm_Trig_AdcTrigSource_atom8,
128 IfxGtm_Trig_AdcTrigSource_atom9,
129 IfxGtm_Trig_AdcTrigSource_atom10,
130 IfxGtm_Trig_AdcTrigSource_atom11,
131 IfxGtm_Trig_AdcTrigSource_tom0,
132 IfxGtm_Trig_AdcTrigSource_tom1,
133 IfxGtm_Trig_AdcTrigSource_tom2,
134 IfxGtm_Trig_AdcTrigSource_tom3,
135 IfxGtm_Trig_AdcTrigSource_tom4,
136 IfxGtm_Trig_AdcTrigSource_tom5,
137 IfxGtm_Trig_AdcTrigSource_count /**< \brief count of the enum definition */
138 } IfxGtm_Trig_AdcTrigSource;
139
140 /** \brief CAN device enum
141 */
142 typedef enum
143 {
144 IfxGtm_Trig_CanDevice_0, /**< \brief CAN device 0 */
145 IfxGtm_Trig_CanDevice_1, /**< \brief CAN device 1 */
146 IfxGtm_Trig_CanDevice_2, /**< \brief CAN device 2 */
147 IfxGtm_Trig_CanDevice_count /**< \brief count of the enum definition */
148 } IfxGtm_Trig_CanDevice;
149
150 /** \brief Enum for CAN trigger
151 */
152 typedef enum
153 {
154 IfxGtm_Trig_CanTrig_0, /**< \brief For CAN Trig 0 */
155 IfxGtm_Trig_CanTrig_1, /**< \brief For CAN Trig 1 */
156 IfxGtm_Trig_CanTrig_2, /**< \brief For CAN Trig 2 */
157 IfxGtm_Trig_CanTrig_3, /**< \brief For CAN Trig 3 */
158 IfxGtm_Trig_CanTrig_count /**< \brief count of the enum definition */
159 } IfxGtm_Trig_CanTrig;
160
161 /** \brief Enum for CAN trigger channel
162 */
163 typedef enum
164 {
165 IfxGtm_Trig_CanTrigChannel_0,
166 IfxGtm_Trig_CanTrigChannel_1,
167 IfxGtm_Trig_CanTrigChannel_2,
168 IfxGtm_Trig_CanTrigChannel_3,
169 IfxGtm_Trig_CanTrigChannel_4,
170 IfxGtm_Trig_CanTrigChannel_5,
171 IfxGtm_Trig_CanTrigChannel_6,
172 IfxGtm_Trig_CanTrigChannel_7,
173 IfxGtm_Trig_CanTrigChannel_11,
174 IfxGtm_Trig_CanTrigChannel_12,
175 IfxGtm_Trig_CanTrigChannel_13,
176 IfxGtm_Trig_CanTrigChannel_14,
177 IfxGtm_Trig_CanTrigChannel_count /**< \brief count of the enum definition */
178 } IfxGtm_Trig_CanTrigChannel;
179
180 /** \brief Enum for CAN trigger source
181 */
182 typedef enum
183 {
184 IfxGtm_Trig_CanTrigSource_tom0,
185 IfxGtm_Trig_CanTrigSource_tom1,
186 IfxGtm_Trig_CanTrigSource_atom0,
187 IfxGtm_Trig_CanTrigSource_atom1,
188 IfxGtm_Trig_CanTrigSource_atom2,
189 IfxGtm_Trig_CanTrigSource_count /**< \brief count of the enum definition */
190 } IfxGtm_Trig_CanTrigSource;
191
192 /** \brief Enum for EDSADC trigger
193 */
194 typedef enum
195 {
196 IfxGtm_Trig_EdsadcTrig_0,
197 IfxGtm_Trig_EdsadcTrig_1,
198 IfxGtm_Trig_EdsadcTrig_2,
199 IfxGtm_Trig_EdsadcTrig_3
200 } IfxGtm_Trig_EdsadcTrig;
201
202 /** \brief Enum for EDSADC trigger source
203 */
204 typedef enum
205 {
206 IfxGtm_Trig_EdsadcTrigSource_tom0_6,
207 IfxGtm_Trig_EdsadcTrigSource_tom0_7,
208 IfxGtm_Trig_EdsadcTrigSource_tom0_13,
209 IfxGtm_Trig_EdsadcTrigSource_tom0_14,
210 IfxGtm_Trig_EdsadcTrigSource_atom0_4,
211 IfxGtm_Trig_EdsadcTrigSource_atom0_5,
212 IfxGtm_Trig_EdsadcTrigSource_atom0_6,
213 IfxGtm_Trig_EdsadcTrigSource_atom0_7,
214 IfxGtm_Trig_EdsadcTrigSource_atom1_4,
215 IfxGtm_Trig_EdsadcTrigSource_atom1_5,
216 IfxGtm_Trig_EdsadcTrigSource_atom1_6,
217 IfxGtm_Trig_EdsadcTrigSource_atom1_7,
218 IfxGtm_Trig_EdsadcTrigSource_atom4_6,
219 IfxGtm_Trig_EdsadcTrigSource_atom4_7,
220 IfxGtm_Trig_EdsadcTrigSource_atom6_6,
221 IfxGtm_Trig_EdsadcTrigSource_reserved0,
222 IfxGtm_Trig_EdsadcTrigSource_tom2_6,
223 IfxGtm_Trig_EdsadcTrigSource_tom2_7,
224 IfxGtm_Trig_EdsadcTrigSource_tom2_13,
225 IfxGtm_Trig_EdsadcTrigSource_tom2_14,
226 IfxGtm_Trig_EdsadcTrigSource_atom2_4,
227 IfxGtm_Trig_EdsadcTrigSource_atom2_5,
228 IfxGtm_Trig_EdsadcTrigSource_atom2_6,
229 IfxGtm_Trig_EdsadcTrigSource_atom2_7,
230 IfxGtm_Trig_EdsadcTrigSource_atom3_4,
231 IfxGtm_Trig_EdsadcTrigSource_atom3_5,
232 IfxGtm_Trig_EdsadcTrigSource_atom3_6,
233 IfxGtm_Trig_EdsadcTrigSource_atom3_7,
234 IfxGtm_Trig_EdsadcTrigSource_atom5_6,
235 IfxGtm_Trig_EdsadcTrigSource_atom5_7,
236 IfxGtm_Trig_EdsadcTrigSource_atom6_7,
237 IfxGtm_Trig_EdsadcTrigSource_reserved1,
238 IfxGtm_Trig_EdsadcTrigSource_tom1_7,
239 IfxGtm_Trig_EdsadcTrigSource_tom1_14,
240 IfxGtm_Trig_EdsadcTrigSource_tom3_7,
241 IfxGtm_Trig_EdsadcTrigSource_tom3_14,
242 IfxGtm_Trig_EdsadcTrigSource_tom4_7,
243 IfxGtm_Trig_EdsadcTrigSource_tom4_14,
244 IfxGtm_Trig_EdsadcTrigSource_tom5_7,
245 IfxGtm_Trig_EdsadcTrigSource_tom5_14,
246 IfxGtm_Trig_EdsadcTrigSource_atom7_6,
247 IfxGtm_Trig_EdsadcTrigSource_atom7_7,
248 IfxGtm_Trig_EdsadcTrigSource_atom8_6,
249 IfxGtm_Trig_EdsadcTrigSource_atom8_7,
250 IfxGtm_Trig_EdsadcTrigSource_atom9_6,
251 IfxGtm_Trig_EdsadcTrigSource_atom9_7,
252 IfxGtm_Trig_EdsadcTrigSource_atom11_6,
253 IfxGtm_Trig_EdsadcTrigSource_reserved2,
254 IfxGtm_Trig_EdsadcTrigSource_tom1_6,
255 IfxGtm_Trig_EdsadcTrigSource_atom10_6,
256 IfxGtm_Trig_EdsadcTrigSource_atom10_7,
257 IfxGtm_Trig_EdsadcTrigSource_atom11_7
258 } IfxGtm_Trig_EdsadcTrigSource;
259
260 /** \brief Enum for MSC trigger channel
261 */
262 typedef enum
263 {
264 IfxGtm_Trig_MscTrigChannel_0,
265 IfxGtm_Trig_MscTrigChannel_1,
266 IfxGtm_Trig_MscTrigChannel_2,
267 IfxGtm_Trig_MscTrigChannel_3,
268 IfxGtm_Trig_MscTrigChannel_4,
269 IfxGtm_Trig_MscTrigChannel_5,
270 IfxGtm_Trig_MscTrigChannel_6,
271 IfxGtm_Trig_MscTrigChannel_7,
272 IfxGtm_Trig_MscTrigChannel_8,
273 IfxGtm_Trig_MscTrigChannel_9,
274 IfxGtm_Trig_MscTrigChannel_10,
275 IfxGtm_Trig_MscTrigChannel_11,
276 IfxGtm_Trig_MscTrigChannel_12,
277 IfxGtm_Trig_MscTrigChannel_13,
278 IfxGtm_Trig_MscTrigChannel_14,
279 IfxGtm_Trig_MscTrigChannel_15,
280 IfxGtm_Trig_MscTrigChannel_count /**< \brief count of the enum definition */
281 } IfxGtm_Trig_MscTrigChannel;
282
283 /** \brief Enum for MSC trigger Input Type
284 */
285 typedef enum
286 {
287 IfxGtm_Trig_MscTrigInput_low,
288 IfxGtm_Trig_MscTrigInput_lowExtended,
289 IfxGtm_Trig_MscTrigInput_high
290 } IfxGtm_Trig_MscTrigInput;
291
292 /** \brief Enum for MSC trigger output select
293 */
294 typedef enum
295 {
296 IfxGtm_Trig_MscTrigOutput_0,
297 IfxGtm_Trig_MscTrigOutput_1,
298 IfxGtm_Trig_MscTrigOutput_2,
299 IfxGtm_Trig_MscTrigOutput_3
300 } IfxGtm_Trig_MscTrigOutput;
301
302 /** \brief Enum for MSC Sets
303 */
304 typedef enum
305 {
306 IfxGtm_Trig_MscTrigSet_1, /**< \brief For MSC set 1 */
307 IfxGtm_Trig_MscTrigSet_2, /**< \brief For MSC set 2 */
308 IfxGtm_Trig_MscTrigSet_3, /**< \brief For MSC set 3 */
309 IfxGtm_Trig_MscTrigSet_4, /**< \brief For MSC set 4 */
310 IfxGtm_Trig_MscTrigSet_5, /**< \brief For MSC set 5 */
311 IfxGtm_Trig_MscTrigSet_6, /**< \brief For MSC set 6 */
312 IfxGtm_Trig_MscTrigSet_7, /**< \brief For MSC set 7 */
313 IfxGtm_Trig_MscTrigSet_8, /**< \brief For MSC set 8 */
314 IfxGtm_Trig_MscTrigSet_9, /**< \brief For MSC set 9 */
315 IfxGtm_Trig_MscTrigSet_count /**< \brief count of the enum definition */
316 } IfxGtm_Trig_MscTrigSet;
317
318 /** \brief Enum for MSC Signal
319 */
320 typedef enum
321 {
322 IfxGtm_Trig_MscTrigSignal_0, /**< \brief For MSC set 0 */
323 IfxGtm_Trig_MscTrigSignal_1, /**< \brief For MSC set 1 */
324 IfxGtm_Trig_MscTrigSignal_2, /**< \brief For MSC set 2 */
325 IfxGtm_Trig_MscTrigSignal_3, /**< \brief For MSC set 3 */
326 IfxGtm_Trig_MscTrigSignal_4, /**< \brief For MSC set 4 */
327 IfxGtm_Trig_MscTrigSignal_5, /**< \brief For MSC set 5 */
328 IfxGtm_Trig_MscTrigSignal_6, /**< \brief For MSC set 6 */
329 IfxGtm_Trig_MscTrigSignal_7, /**< \brief For MSC set 7 */
330 IfxGtm_Trig_MscTrigSignal_8, /**< \brief For MSC set 8 */
331 IfxGtm_Trig_MscTrigSignal_9, /**< \brief For MSC set 9 */
332 IfxGtm_Trig_MscTrigSignal_10, /**< \brief For MSC set 10 */
333 IfxGtm_Trig_MscTrigSignal_11, /**< \brief For MSC set 11 */
334 IfxGtm_Trig_MscTrigSignal_12, /**< \brief For MSC set 12 */
335 IfxGtm_Trig_MscTrigSignal_13, /**< \brief For MSC set 13 */
336 IfxGtm_Trig_MscTrigSignal_14, /**< \brief For MSC set 14 */
337 IfxGtm_Trig_MscTrigSignal_15 /**< \brief For MSC set 15 */
338 } IfxGtm_Trig_MscTrigSignal;
339
340 /** \brief Enum for MSC trigger source
341 */
342 typedef enum
343 {
344 IfxGtm_Trig_MscTrigSource_tom0,
345 IfxGtm_Trig_MscTrigSource_tom1,
346 IfxGtm_Trig_MscTrigSource_tom2,
347 IfxGtm_Trig_MscTrigSource_tom3,
348 IfxGtm_Trig_MscTrigSource_tom4,
349 IfxGtm_Trig_MscTrigSource_tom5,
350 IfxGtm_Trig_MscTrigSource_atom0,
351 IfxGtm_Trig_MscTrigSource_atom1,
352 IfxGtm_Trig_MscTrigSource_atom2,
353 IfxGtm_Trig_MscTrigSource_atom3,
354 IfxGtm_Trig_MscTrigSource_atom4,
355 IfxGtm_Trig_MscTrigSource_atom5,
356 IfxGtm_Trig_MscTrigSource_atom6,
357 IfxGtm_Trig_MscTrigSource_atom7,
358 IfxGtm_Trig_MscTrigSource_atom8,
359 IfxGtm_Trig_MscTrigSource_atom9,
360 IfxGtm_Trig_MscTrigSource_atom10,
361 IfxGtm_Trig_MscTrigSource_atom11,
362 IfxGtm_Trig_MscTrigSource_count /**< \brief count of the enum definition */
363 } IfxGtm_Trig_MscTrigSource;
364
365 /** \brief Enum for PSI5 trigger source
366 */
367 typedef enum
368 {
369 IfxGtm_Trig_Psi5TrigSource_no_Trigger,
370 IfxGtm_Trig_Psi5TrigSource_tom2_6,
371 IfxGtm_Trig_Psi5TrigSource_tom2_7,
372 IfxGtm_Trig_Psi5TrigSource_tom2_13,
373 IfxGtm_Trig_Psi5TrigSource_tom2_14,
374 IfxGtm_Trig_Psi5TrigSource_atom2_4,
375 IfxGtm_Trig_Psi5TrigSource_atom2_5,
376 IfxGtm_Trig_Psi5TrigSource_atom2_6,
377 IfxGtm_Trig_Psi5TrigSource_atom2_7,
378 IfxGtm_Trig_Psi5TrigSource_tom0_6,
379 IfxGtm_Trig_Psi5TrigSource_tom0_7,
380 IfxGtm_Trig_Psi5TrigSource_tom0_13,
381 IfxGtm_Trig_Psi5TrigSource_tom0_14
382 } IfxGtm_Trig_Psi5TrigSource;
383
384 /** \brief Enum for DSADC trigger source
385 */
386 typedef enum
387 {
388 IfxGtm_Trig_Psi5sTrigSource_no_Trigger,
389 IfxGtm_Trig_Psi5sTrigSource_tomX_6,
390 IfxGtm_Trig_Psi5sTrigSource_tomX_7,
391 IfxGtm_Trig_Psi5sTrigSource_tomX_13,
392 IfxGtm_Trig_Psi5sTrigSource_tomX_14,
393 IfxGtm_Trig_Psi5sTrigSource_atomX_4,
394 IfxGtm_Trig_Psi5sTrigSource_atomX_5,
395 IfxGtm_Trig_Psi5sTrigSource_atomX_6,
396 IfxGtm_Trig_Psi5sTrigSource_atomX_7
397 } IfxGtm_Trig_Psi5sTrigSource;
398
399 /** \brief Enum for SENT group
400 */
401 typedef enum
402 {
403 IfxGtm_Trig_SentGroup_0, /**< \brief For SENT group 0 */
404 IfxGtm_Trig_SentGroup_1, /**< \brief For SENT group 1 */
405 IfxGtm_Trig_SentGroup_2, /**< \brief For SENT group 2 */
406 IfxGtm_Trig_SentGroup_3, /**< \brief For SENT group 3 */
407 IfxGtm_Trig_SentGroup_4, /**< \brief For SENT group 4 */
408 IfxGtm_Trig_SentGroup_5, /**< \brief For SENT group 5 */
409 IfxGtm_Trig_SentGroup_6, /**< \brief For SENT group 6 */
410 IfxGtm_Trig_SentGroup_7, /**< \brief For SENT group 7 */
411 IfxGtm_Trig_SentGroup_8, /**< \brief For SENT group 8 */
412 IfxGtm_Trig_SentGroup_9, /**< \brief For SENT group 9 */
413 IfxGtm_Trig_SentGroup_10, /**< \brief For SENT group 10 */
414 IfxGtm_Trig_SentGroup_11, /**< \brief For SENT group 11 */
415 IfxGtm_Trig_SentGroup_12, /**< \brief For SENT group 12 */
416 IfxGtm_Trig_SentGroup_13, /**< \brief For SENT group 13 */
417 IfxGtm_Trig_SentGroup_14, /**< \brief For SENT group 14 */
418 IfxGtm_Trig_SentGroup_15 /**< \brief For SENT group 15 */
419 } IfxGtm_Trig_SentGroup;
420
421 /** \brief Enum for SENT trigger
422 */
423 typedef enum
424 {
425 IfxGtm_Trig_SentTrig_0, /**< \brief sent trigger 0 */
426 IfxGtm_Trig_SentTrig_1, /**< \brief sent trigger 1 */
427 IfxGtm_Trig_SentTrig_2, /**< \brief sent trigger 2 */
428 IfxGtm_Trig_SentTrig_3 /**< \brief sent trigger 3 */
429 } IfxGtm_Trig_SentTrig;
430
431 /** \brief Enum for SENT trigger channel
432 */
433 typedef enum
434 {
435 IfxGtm_Trig_SentTrigChannel_3,
436 IfxGtm_Trig_SentTrigChannel_4,
437 IfxGtm_Trig_SentTrigChannel_5,
438 IfxGtm_Trig_SentTrigChannel_6,
439 IfxGtm_Trig_SentTrigChannel_7,
440 IfxGtm_Trig_SentTrigChannel_11,
441 IfxGtm_Trig_SentTrigChannel_12,
442 IfxGtm_Trig_SentTrigChannel_13,
443 IfxGtm_Trig_SentTrigChannel_14,
444 IfxGtm_Trig_SentTrigChannel_15,
445 IfxGtm_Trig_SentTrigChannel_count /**< \brief count of the enum definition */
446 } IfxGtm_Trig_SentTrigChannel;
447
448 /** \brief Enum for SENT trigger source
449 */
450 typedef enum
451 {
452 IfxGtm_Trig_SentTrigSource_atom0,
453 IfxGtm_Trig_SentTrigSource_atom1,
454 IfxGtm_Trig_SentTrigSource_atom2,
455 IfxGtm_Trig_SentTrigSource_atom3,
456 IfxGtm_Trig_SentTrigSource_atom4,
457 IfxGtm_Trig_SentTrigSource_atom5,
458 IfxGtm_Trig_SentTrigSource_atom6,
459 IfxGtm_Trig_SentTrigSource_atom7,
460 IfxGtm_Trig_SentTrigSource_atom8,
461 IfxGtm_Trig_SentTrigSource_atom9,
462 IfxGtm_Trig_SentTrigSource_atom10,
463 IfxGtm_Trig_SentTrigSource_atom11,
464 IfxGtm_Trig_SentTrigSource_tom0,
465 IfxGtm_Trig_SentTrigSource_tom1,
466 IfxGtm_Trig_SentTrigSource_tom2,
467 IfxGtm_Trig_SentTrigSource_tom3,
468 IfxGtm_Trig_SentTrigSource_tom4,
469 IfxGtm_Trig_SentTrigSource_tom5,
470 IfxGtm_Trig_SentTrigSource_count /**< \brief count of the enum definition */
471 } IfxGtm_Trig_SentTrigSource;
472
473 /** \} */
474
475 /** \addtogroup IfxLld_Gtm_Trig_Trigger_Functions
476 * \{ */
477
478 /******************************************************************************/
479 /*-------------------------Global Function Prototypes-------------------------*/
480 /******************************************************************************/
481
482 /**
483 * \param gtm Pointer to GTM module
484 * \param edsadcChannel EDSADC channel
485 * \param tim TIM object
486 * \param timChannel TIM channel
487 * \return TRUE on success else FALSE
488 */
489 IFX_EXTERN boolean IfxGtm_Trig_fromEdsadc(Ifx_GTM *gtm, uint32 edsadcChannel, IfxGtm_Tim tim, IfxGtm_Tim_Ch timChannel);
490
491 /**
492 * \param gtm Pointer to GTM module
493 * \param msc MSC Id
494 * \param input MSC Input Type
495 * \param output Output Select
496 * \param signal MSC signal
497 * \return TRUE on success else FALSE
498 */
499 IFX_EXTERN boolean IfxGtm_Trig_fromMsc(Ifx_GTM *gtm, uint32 msc, IfxGtm_Trig_MscTrigInput input, IfxGtm_Trig_MscTrigOutput output, IfxGtm_Trig_MscTrigSignal signal);
500
501 /**
502 * \param gtm Pointer to GTM module
503 * \param canTrig CAN trigger
504 * \param canDevice CAN device
505 * \param source CAN trigger source
506 * \param channel CAN trigger channel
507 * \return TRUE on success else FALSE
508 */
509 IFX_EXTERN boolean IfxGtm_Trig_toCan(Ifx_GTM *gtm, IfxGtm_Trig_CanTrig canTrig, IfxGtm_Trig_CanDevice canDevice, IfxGtm_Trig_CanTrigSource source, IfxGtm_Trig_CanTrigChannel channel);
510
511 /**
512 * \param gtm Pointer to GTM module
513 * \param adcGroup ADC group
514 * \param adcTrig ADC trigger
515 * \param source ADC trigger source
516 * \param channel ADC trigger channel
517 * \return TRUE on success else FALSE
518 */
519 IFX_EXTERN boolean IfxGtm_Trig_toEVadc(Ifx_GTM *gtm, IfxGtm_Trig_AdcGroup adcGroup, IfxGtm_Trig_AdcTrig adcTrig, IfxGtm_Trig_AdcTrigSource source, IfxGtm_Trig_AdcTrigChannel channel);
520
521 /**
522 * \param gtm Pointer to GTM module
523 * \param adcGroup ADC group
524 * \param adcTrig ADC trigger
525 * \return None
526 */
527 IFX_EXTERN void IfxGtm_Trig_toEVadcClear(Ifx_GTM *gtm, IfxGtm_Trig_AdcGroup adcGroup, IfxGtm_Trig_AdcTrig adcTrig);
528
529 /**
530 * \param gtm Pointer to GTM module
531 * \param edsadcChannel EDSADC channel
532 * \param edsadcTrig EDSADC trigger
533 * \param sel DSADC trigger source
534 * \return None
535 */
536 IFX_EXTERN void IfxGtm_Trig_toEdsadc(Ifx_GTM *gtm, uint32 edsadcChannel, IfxGtm_Trig_EdsadcTrig edsadcTrig, IfxGtm_Trig_EdsadcTrigSource sel);
537
538 /**
539 * \param gtm Pointer to GTM module
540 * \param signal MSC signal
541 * \param mscSet MSC set
542 * \param source MSC trigger source
543 * \param channel MSC trigger channel
544 * \return TRUE on success else FALSE
545 */
546 IFX_EXTERN boolean IfxGtm_Trig_toMsc(Ifx_GTM *gtm, IfxGtm_Trig_MscTrigSignal signal, IfxGtm_Trig_MscTrigSet mscSet, IfxGtm_Trig_MscTrigSource source, IfxGtm_Trig_MscTrigChannel channel);
547
548 /**
549 * \param gtm Pointer to GTM module
550 * \param psi5Channel PSI5 channel
551 * \param sel PSI5 trigger source
552 * \return None
553 */
554 IFX_EXTERN void IfxGtm_Trig_toPsi5(Ifx_GTM *gtm, uint32 psi5Channel, IfxGtm_Trig_Psi5TrigSource sel);
555
556 /**
557 * \param gtm Pointer to GTM module
558 * \param psi5sChannel PSI5S channel
559 * \param sel PSI5S trigger source
560 * \return None
561 */
562 IFX_EXTERN void IfxGtm_Trig_toPsi5s(Ifx_GTM *gtm, uint32 psi5sChannel, IfxGtm_Trig_Psi5sTrigSource sel);
563
564 /**
565 * \param gtm Pointer to GTM module
566 * \param sentGroup SENT group
567 * \param sentTrig SENT trigger
568 * \param source SENT trigger source
569 * \param channel SENT trigger channel
570 * \return TRUE on success else FALSE
571 */
572 IFX_EXTERN boolean IfxGtm_Trig_toSent(Ifx_GTM *gtm, IfxGtm_Trig_SentGroup sentGroup, IfxGtm_Trig_SentTrig sentTrig, IfxGtm_Trig_SentTrigSource source, IfxGtm_Trig_SentTrigChannel channel);
573
574 /** \} */
575
576 #endif /* IFXGTM_TRIG_H */
IfxGtm_Trig_MscTrigSignal_11
For MSC set 11.
Definition: IfxGtm_Trig.h:333
IfxGtm_Trig_CanTrigSource_count
count of the enum definition
Definition: IfxGtm_Trig.h:189
IfxGtm_Trig_Psi5sTrigSource_tomX_7
Definition: IfxGtm_Trig.h:390
IfxGtm_Trig_Psi5TrigSource_tom0_14
Definition: IfxGtm_Trig.h:381
IfxGtm_Trig_toCan
IFX_EXTERN boolean IfxGtm_Trig_toCan(Ifx_GTM *gtm, IfxGtm_Trig_CanTrig canTrig, IfxGtm_Trig_CanDevice canDevice, IfxGtm_Trig_CanTrigSource source, IfxGtm_Trig_CanTrigChannel channel)
Definition: IfxGtm_Trig.c:1173
IfxGtm_Trig_MscTrigOutput_2
Definition: IfxGtm_Trig.h:298
IfxGtm_Trig_SentTrigChannel_3
Definition: IfxGtm_Trig.h:435
IfxGtm_Trig_AdcTrigSource_tom1
Definition: IfxGtm_Trig.h:132
IfxGtm_Trig_SentTrig
IfxGtm_Trig_SentTrig
Enum for SENT trigger.
Definition: IfxGtm_Trig.h:423
IfxGtm_Trig_toPsi5
IFX_EXTERN void IfxGtm_Trig_toPsi5(Ifx_GTM *gtm, uint32 psi5Channel, IfxGtm_Trig_Psi5TrigSource sel)
Definition: IfxGtm_Trig.c:1369
IfxGtm_Trig_EdsadcTrigSource_atom2_5
Definition: IfxGtm_Trig.h:227
IfxGtm_Trig_AdcTrigChannel_3
Definition: IfxGtm_Trig.h:102
IfxGtm_Trig_MscTrigSource_tom4
Definition: IfxGtm_Trig.h:348
IfxGtm_Trig_SentTrigSource_atom3
Definition: IfxGtm_Trig.h:455
IfxGtm_Trig_Psi5TrigSource_tom2_7
Definition: IfxGtm_Trig.h:371
IfxGtm_Trig_Psi5sTrigSource_tomX_14
Definition: IfxGtm_Trig.h:392
IfxGtm_Trig_EdsadcTrigSource_atom1_4
Definition: IfxGtm_Trig.h:214
IfxGtm_Trig_MscTrigSet_7
For MSC set 7.
Definition: IfxGtm_Trig.h:312
IfxGtm_Trig_CanDevice
IfxGtm_Trig_CanDevice
CAN device enum.
Definition: IfxGtm_Trig.h:142
IfxGtm_Trig_SentGroup_7
For SENT group 7.
Definition: IfxGtm_Trig.h:410
IfxGtm_Trig_AdcTrigChannel_count
count of the enum definition
Definition: IfxGtm_Trig.h:112
IfxGtm_Trig_AdcTrigSource_atom2
Definition: IfxGtm_Trig.h:121
IfxGtm_Trig_EdsadcTrigSource_atom1_6
Definition: IfxGtm_Trig.h:216
IfxGtm_Trig_SentTrigSource_tom1
Definition: IfxGtm_Trig.h:465
IfxGtm_Trig_CanTrigChannel_1
Definition: IfxGtm_Trig.h:166
IfxGtm_Trig_AdcTrig_count
count of the enum definition
Definition: IfxGtm_Trig.h:95
IfxGtm_Trig_AdcTrig_0
Definition: IfxGtm_Trig.h:90
IfxGtm_Trig_fromEdsadc
IFX_EXTERN boolean IfxGtm_Trig_fromEdsadc(Ifx_GTM *gtm, uint32 edsadcChannel, IfxGtm_Tim tim, IfxGtm_Tim_Ch timChannel)
Definition: IfxGtm_Trig.c:1129
IfxGtm_Trig_MscTrigChannel_4
Definition: IfxGtm_Trig.h:268
IfxGtm_Trig_CanTrigSource_tom0
Definition: IfxGtm_Trig.h:184
IfxGtm_Trig_CanTrig_3
For CAN Trig 3.
Definition: IfxGtm_Trig.h:157
IfxGtm_Trig_EdsadcTrigSource_atom9_6
Definition: IfxGtm_Trig.h:250
IfxGtm_Trig_SentTrigSource_tom0
Definition: IfxGtm_Trig.h:464
IfxGtm_Trig_EdsadcTrigSource_atom11_7
Definition: IfxGtm_Trig.h:257
IfxGtm_Trig_MscTrigSource_atom9
Definition: IfxGtm_Trig.h:359
IfxGtm_Trig_MscTrigChannel_8
Definition: IfxGtm_Trig.h:272
IfxGtm_Trig_CanTrigChannel_13
Definition: IfxGtm_Trig.h:175
IfxGtm_Trig_CanDevice_count
count of the enum definition
Definition: IfxGtm_Trig.h:147
IfxGtm_Trig_SentTrig_2
sent trigger 2
Definition: IfxGtm_Trig.h:427
IfxGtm_Trig_AdcTrigChannel_15
Definition: IfxGtm_Trig.h:111
IfxGtm_Trig_SentTrigSource_atom4
Definition: IfxGtm_Trig.h:456
IfxGtm_Trig_Psi5TrigSource_tom0_13
Definition: IfxGtm_Trig.h:380
IfxGtm_Trig_EdsadcTrigSource_tom4_7
Definition: IfxGtm_Trig.h:242
IfxGtm_Trig_SentTrigSource_count
count of the enum definition
Definition: IfxGtm_Trig.h:470
IfxGtm_Trig_MscTrigSignal_7
For MSC set 7.
Definition: IfxGtm_Trig.h:329
IfxGtm_Trig_SentGroup_10
For SENT group 10.
Definition: IfxGtm_Trig.h:413
IfxGtm_Trig_MscTrigSet_5
For MSC set 5.
Definition: IfxGtm_Trig.h:310
IfxGtm_Trig_AdcTrigSource_atom4
Definition: IfxGtm_Trig.h:123
IfxGtm_Trig_SentTrigChannel_6
Definition: IfxGtm_Trig.h:438
IfxGtm_Trig_EdsadcTrigSource_tom2_6
Definition: IfxGtm_Trig.h:222
IfxGtm_Trig_CanTrigChannel_3
Definition: IfxGtm_Trig.h:168
IfxGtm_Trig_EdsadcTrigSource_tom2_13
Definition: IfxGtm_Trig.h:224
IfxGtm_Trig_AdcTrigSource_atom10
Definition: IfxGtm_Trig.h:129
IfxGtm_Trig_AdcTrigSource_atom6
Definition: IfxGtm_Trig.h:125
IfxGtm_Trig_CanTrig_2
For CAN Trig 2.
Definition: IfxGtm_Trig.h:156
IfxGtm_Trig_MscTrigSource_atom0
Definition: IfxGtm_Trig.h:350
IfxGtm_Trig_AdcTrig_1
Definition: IfxGtm_Trig.h:91
IfxGtm_Trig_SentTrigSource_atom1
Definition: IfxGtm_Trig.h:453
IfxGtm_Trig_Psi5sTrigSource_tomX_6
Definition: IfxGtm_Trig.h:389
IfxGtm_Trig_SentTrig_3
sent trigger 3
Definition: IfxGtm_Trig.h:428
IfxGtm_Trig_AdcTrigSource_tom5
Definition: IfxGtm_Trig.h:136
IfxGtm_Trig_SentTrigSource_atom7
Definition: IfxGtm_Trig.h:459
IfxGtm_Trig_MscTrigSource_tom0
Definition: IfxGtm_Trig.h:344
IfxGtm_Trig_CanTrigChannel_4
Definition: IfxGtm_Trig.h:169
IfxGtm_Trig_MscTrigSource_atom7
Definition: IfxGtm_Trig.h:357
IfxGtm_Trig_Psi5sTrigSource_atomX_4
Definition: IfxGtm_Trig.h:393
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxGtm_Trig_toSent
IFX_EXTERN boolean IfxGtm_Trig_toSent(Ifx_GTM *gtm, IfxGtm_Trig_SentGroup sentGroup, IfxGtm_Trig_SentTrig sentTrig, IfxGtm_Trig_SentTrigSource source, IfxGtm_Trig_SentTrigChannel channel)
Definition: IfxGtm_Trig.c:1388
IfxGtm_Trig_SentTrigChannel_12
Definition: IfxGtm_Trig.h:441
IfxGtm_Trig_SentTrigChannel_15
Definition: IfxGtm_Trig.h:444
IfxGtm_Trig_MscTrigSignal_8
For MSC set 8.
Definition: IfxGtm_Trig.h:330
IfxGtm_Trig_AdcTrig_2
Definition: IfxGtm_Trig.h:92
IfxGtm_Trig_MscTrigSource_atom11
Definition: IfxGtm_Trig.h:361
IfxGtm_Trig_SentTrigSource_atom9
Definition: IfxGtm_Trig.h:461
IfxGtm_Trig_SentGroup_13
For SENT group 13.
Definition: IfxGtm_Trig.h:416
IfxGtm_Trig_MscTrigSet_1
For MSC set 1.
Definition: IfxGtm_Trig.h:306
IfxGtm_Trig_AdcTrigChannel_13
Definition: IfxGtm_Trig.h:109
IfxGtm_Trig_EdsadcTrigSource_atom0_5
Definition: IfxGtm_Trig.h:211
IfxGtm_Trig_CanTrigSource_atom0
Definition: IfxGtm_Trig.h:186
IfxGtm_Trig_MscTrigSource_tom5
Definition: IfxGtm_Trig.h:349
IfxGtm_Trig_EdsadcTrigSource_atom2_6
Definition: IfxGtm_Trig.h:228
IfxGtm_Trig_toPsi5s
IFX_EXTERN void IfxGtm_Trig_toPsi5s(Ifx_GTM *gtm, uint32 psi5sChannel, IfxGtm_Trig_Psi5sTrigSource sel)
Definition: IfxGtm_Trig.c:1378
IfxGtm_Trig_SentGroup_12
For SENT group 12.
Definition: IfxGtm_Trig.h:415
IfxGtm_Trig_SentTrigSource
IfxGtm_Trig_SentTrigSource
Enum for SENT trigger source.
Definition: IfxGtm_Trig.h:450
IfxGtm_Trig_CanTrigChannel_11
Definition: IfxGtm_Trig.h:173
IfxGtm_Tim
IfxGtm_Tim
Enum for TIM objects.
Definition: IfxGtm_cfg.h:390
IfxGtm_Trig_EdsadcTrigSource_tom3_14
Definition: IfxGtm_Trig.h:241
IfxGtm_Trig_AdcTrigChannel_4
Definition: IfxGtm_Trig.h:103
IfxGtm_Trig_Psi5TrigSource_tom2_14
Definition: IfxGtm_Trig.h:373
IfxGtm_Trig_SentGroup_6
For SENT group 6.
Definition: IfxGtm_Trig.h:409
IfxGtm_Trig_SentGroup_9
For SENT group 9.
Definition: IfxGtm_Trig.h:412
IfxGtm_Trig_AdcTrigSource_atom11
Definition: IfxGtm_Trig.h:130
IfxGtm_Trig_MscTrigOutput_3
Definition: IfxGtm_Trig.h:299
IfxGtm_Trig_AdcTrig
IfxGtm_Trig_AdcTrig
Enum for ADC trigger.
Definition: IfxGtm_Trig.h:88
IfxGtm_Trig_SentTrigChannel_7
Definition: IfxGtm_Trig.h:439
IfxGtm_Trig_EdsadcTrigSource_tom1_14
Definition: IfxGtm_Trig.h:239
IfxGtm_Trig_EdsadcTrigSource_atom4_6
Definition: IfxGtm_Trig.h:218
IfxGtm_Trig_MscTrigSet_9
For MSC set 9.
Definition: IfxGtm_Trig.h:314
IfxGtm_Trig_AdcTrigSource_count
count of the enum definition
Definition: IfxGtm_Trig.h:137
IfxGtm_Trig_CanTrigChannel_14
Definition: IfxGtm_Trig.h:176
IfxGtm_Trig_EdsadcTrigSource_atom5_7
Definition: IfxGtm_Trig.h:235
IfxGtm_Trig_SentTrigChannel
IfxGtm_Trig_SentTrigChannel
Enum for SENT trigger channel.
Definition: IfxGtm_Trig.h:433
IfxGtm_Trig_CanTrigSource_atom2
Definition: IfxGtm_Trig.h:188
IfxGtm_Trig_MscTrigSignal_1
For MSC set 1.
Definition: IfxGtm_Trig.h:323
IfxGtm_Trig_Psi5TrigSource_tom0_7
Definition: IfxGtm_Trig.h:379
IfxGtm_Trig_MscTrigSource_tom2
Definition: IfxGtm_Trig.h:346
IfxGtm_Trig_MscTrigInput_low
Definition: IfxGtm_Trig.h:287
IfxGtm_Trig_SentTrigSource_tom4
Definition: IfxGtm_Trig.h:468
IfxGtm_Trig_AdcTrigSource_atom1
Definition: IfxGtm_Trig.h:120
IfxGtm_Trig_AdcTrigSource_atom9
Definition: IfxGtm_Trig.h:128
IfxGtm_Trig_MscTrigSource
IfxGtm_Trig_MscTrigSource
Enum for MSC trigger source.
Definition: IfxGtm_Trig.h:342
IfxGtm_Trig_EdsadcTrigSource_atom8_6
Definition: IfxGtm_Trig.h:248
IfxGtm_Trig_SentTrigChannel_11
Definition: IfxGtm_Trig.h:440
IfxGtm_Trig_MscTrigSignal_13
For MSC set 13.
Definition: IfxGtm_Trig.h:335
IfxGtm_Trig_EdsadcTrigSource_tom4_14
Definition: IfxGtm_Trig.h:243
IfxGtm_Trig_Psi5TrigSource_atom2_7
Definition: IfxGtm_Trig.h:377
IfxGtm_Trig_AdcTrig_3
Definition: IfxGtm_Trig.h:93
IfxGtm_Trig_MscTrigSet_6
For MSC set 6.
Definition: IfxGtm_Trig.h:311
IfxGtm_Trig_MscTrigSource_atom5
Definition: IfxGtm_Trig.h:355
IfxGtm_Trig_MscTrigSet
IfxGtm_Trig_MscTrigSet
Enum for MSC Sets.
Definition: IfxGtm_Trig.h:304
IfxGtm_Trig_CanTrigChannel_12
Definition: IfxGtm_Trig.h:174
IfxGtm_Trig_MscTrigChannel_7
Definition: IfxGtm_Trig.h:271
IfxGtm_Trig_EdsadcTrigSource_tom3_7
Definition: IfxGtm_Trig.h:240
IfxGtm_Trig_AdcTrigSource_atom5
Definition: IfxGtm_Trig.h:124
IfxGtm_Trig_Psi5TrigSource_atom2_4
Definition: IfxGtm_Trig.h:374
IfxGtm_Trig_Psi5TrigSource_tom0_6
Definition: IfxGtm_Trig.h:378
IfxGtm_Trig_EdsadcTrig_2
Definition: IfxGtm_Trig.h:198
IfxGtm_Trig_EdsadcTrigSource
IfxGtm_Trig_EdsadcTrigSource
Enum for EDSADC trigger source.
Definition: IfxGtm_Trig.h:204
IfxGtm_Trig_AdcGroup_1
For ADC group 1.
Definition: IfxGtm_Trig.h:73
IfxGtm_Trig_CanTrigChannel_6
Definition: IfxGtm_Trig.h:171
IfxGtm_Trig_AdcTrigSource_tom4
Definition: IfxGtm_Trig.h:135
IfxGtm_Trig_EdsadcTrigSource_atom0_4
Definition: IfxGtm_Trig.h:210
IfxGtm_Tim.h
GTM basic functionality.
IfxGtm_Trig_AdcTrigSource
IfxGtm_Trig_AdcTrigSource
Enum for ADC trigger source.
Definition: IfxGtm_Trig.h:117
IfxGtm_Trig_Psi5sTrigSource
IfxGtm_Trig_Psi5sTrigSource
Enum for DSADC trigger source.
Definition: IfxGtm_Trig.h:386
IfxGtm_Trig_CanTrigSource
IfxGtm_Trig_CanTrigSource
Enum for CAN trigger source.
Definition: IfxGtm_Trig.h:182
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxGtm_Trig_EdsadcTrigSource_tom1_6
Definition: IfxGtm_Trig.h:254
IfxGtm_Trig_EdsadcTrigSource_atom9_7
Definition: IfxGtm_Trig.h:251
IfxGtm_Trig_Psi5sTrigSource_atomX_6
Definition: IfxGtm_Trig.h:395
IfxGtm_Trig_MscTrigSet_8
For MSC set 8.
Definition: IfxGtm_Trig.h:313
IfxGtm_Trig_MscTrigInput_high
Definition: IfxGtm_Trig.h:289
IfxGtm_Trig_MscTrigChannel_9
Definition: IfxGtm_Trig.h:273
IfxGtm_Trig_Psi5TrigSource
IfxGtm_Trig_Psi5TrigSource
Enum for PSI5 trigger source.
Definition: IfxGtm_Trig.h:367
IfxGtm_Trig_CanTrig_0
For CAN Trig 0.
Definition: IfxGtm_Trig.h:154
IfxGtm_Trig_Psi5sTrigSource_no_Trigger
Definition: IfxGtm_Trig.h:388
IfxGtm_Trig_AdcTrigSource_atom0
Definition: IfxGtm_Trig.h:119
IfxGtm_Trig_MscTrigChannel_10
Definition: IfxGtm_Trig.h:274
IfxGtm_Trig_EdsadcTrigSource_atom11_6
Definition: IfxGtm_Trig.h:252
IfxGtm_Trig_MscTrigSignal_10
For MSC set 10.
Definition: IfxGtm_Trig.h:332
IfxGtm_Trig_CanTrig
IfxGtm_Trig_CanTrig
Enum for CAN trigger.
Definition: IfxGtm_Trig.h:152
IfxGtm_Trig_MscTrigChannel_count
count of the enum definition
Definition: IfxGtm_Trig.h:280
IfxGtm_Trig_SentTrigSource_tom5
Definition: IfxGtm_Trig.h:469
IfxGtm_Trig_EdsadcTrigSource_tom0_7
Definition: IfxGtm_Trig.h:207
IfxGtm_Trig_SentTrigSource_tom3
Definition: IfxGtm_Trig.h:467
IfxGtm_Trig_fromMsc
IFX_EXTERN boolean IfxGtm_Trig_fromMsc(Ifx_GTM *gtm, uint32 msc, IfxGtm_Trig_MscTrigInput input, IfxGtm_Trig_MscTrigOutput output, IfxGtm_Trig_MscTrigSignal signal)
Definition: IfxGtm_Trig.c:1147
IfxGtm_Trig_SentTrigSource_atom6
Definition: IfxGtm_Trig.h:458
IfxGtm_Trig_MscTrigInput
IfxGtm_Trig_MscTrigInput
Enum for MSC trigger Input Type.
Definition: IfxGtm_Trig.h:285
IfxGtm_Trig_Psi5sTrigSource_atomX_7
Definition: IfxGtm_Trig.h:396
IfxGtm_Trig_EdsadcTrigSource_tom0_14
Definition: IfxGtm_Trig.h:209
IfxGtm_Trig_EdsadcTrigSource_atom3_4
Definition: IfxGtm_Trig.h:230
IfxGtm_Trig_MscTrigChannel
IfxGtm_Trig_MscTrigChannel
Enum for MSC trigger channel.
Definition: IfxGtm_Trig.h:262
IfxGtm_Trig_MscTrigOutput_1
Definition: IfxGtm_Trig.h:297
IfxGtm_Trig_EdsadcTrigSource_atom1_7
Definition: IfxGtm_Trig.h:217
IfxGtm_Trig_CanTrigSource_atom1
Definition: IfxGtm_Trig.h:187
IfxGtm_Trig_Psi5TrigSource_no_Trigger
Definition: IfxGtm_Trig.h:369
IfxGtm_Trig_SentTrigSource_atom10
Definition: IfxGtm_Trig.h:462
IfxGtm_Trig_MscTrigSource_atom10
Definition: IfxGtm_Trig.h:360
IfxGtm_Trig_SentTrigSource_atom2
Definition: IfxGtm_Trig.h:454
IfxGtm_Trig_SentTrig_1
sent trigger 1
Definition: IfxGtm_Trig.h:426
IfxGtm_Trig_CanTrigChannel_5
Definition: IfxGtm_Trig.h:170
IfxGtm_Trig_AdcTrigChannel_6
Definition: IfxGtm_Trig.h:105
IfxGtm_Trig_MscTrigOutput
IfxGtm_Trig_MscTrigOutput
Enum for MSC trigger output select.
Definition: IfxGtm_Trig.h:294
IfxGtm_Trig_EdsadcTrig_1
Definition: IfxGtm_Trig.h:197
IfxGtm_Trig_SentTrigSource_atom11
Definition: IfxGtm_Trig.h:463
IfxGtm_Trig_EdsadcTrigSource_reserved1
Definition: IfxGtm_Trig.h:237
IfxGtm_Trig_EdsadcTrigSource_tom0_13
Definition: IfxGtm_Trig.h:208
IfxGtm_Trig_EdsadcTrigSource_atom3_5
Definition: IfxGtm_Trig.h:231
IfxGtm_Trig_AdcTrigChannel_11
Definition: IfxGtm_Trig.h:107
IfxGtm_Trig_EdsadcTrigSource_atom0_6
Definition: IfxGtm_Trig.h:212
IfxGtm_Trig_AdcGroup_11
For ADC group 11.
Definition: IfxGtm_Trig.h:83
IfxGtm_Trig_AdcGroup_7
For ADC group 7.
Definition: IfxGtm_Trig.h:79
IfxGtm_Trig_MscTrigSignal_5
For MSC set 5.
Definition: IfxGtm_Trig.h:327
IfxGtm_Trig_AdcGroup
IfxGtm_Trig_AdcGroup
Enum for ADC group.
Definition: IfxGtm_Trig.h:70
IfxGtm_Trig_CanDevice_2
CAN device 2.
Definition: IfxGtm_Trig.h:146
IfxGtm_Trig_Psi5sTrigSource_tomX_13
Definition: IfxGtm_Trig.h:391
IfxGtm_Trig_toEVadcClear
IFX_EXTERN void IfxGtm_Trig_toEVadcClear(Ifx_GTM *gtm, IfxGtm_Trig_AdcGroup adcGroup, IfxGtm_Trig_AdcTrig adcTrig)
Definition: IfxGtm_Trig.c:1287
IfxGtm_Trig_EdsadcTrigSource_atom6_6
Definition: IfxGtm_Trig.h:220
IfxGtm_Trig_AdcTrigSource_tom3
Definition: IfxGtm_Trig.h:134
IfxGtm_Trig_EdsadcTrigSource_atom10_7
Definition: IfxGtm_Trig.h:256
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxGtm_Trig_MscTrigSignal_15
For MSC set 15.
Definition: IfxGtm_Trig.h:337
IfxGtm_Trig_Psi5sTrigSource_atomX_5
Definition: IfxGtm_Trig.h:394
IfxGtm_Trig_MscTrigSignal
IfxGtm_Trig_MscTrigSignal
Enum for MSC Signal.
Definition: IfxGtm_Trig.h:320
IfxGtm_Trig_AdcTrigSource_atom3
Definition: IfxGtm_Trig.h:122
IfxGtm_Trig_EdsadcTrigSource_tom2_14
Definition: IfxGtm_Trig.h:225
IfxGtm_Trig_AdcGroup_10
For ADC group 10.
Definition: IfxGtm_Trig.h:82
IfxGtm_Trig_SentGroup_2
For SENT group 2.
Definition: IfxGtm_Trig.h:405
IfxGtm_Trig_SentGroup_15
For SENT group 15.
Definition: IfxGtm_Trig.h:418
IfxGtm_Trig_MscTrigSource_atom4
Definition: IfxGtm_Trig.h:354
IfxGtm_Trig_SentGroup_0
For SENT group 0.
Definition: IfxGtm_Trig.h:403
IfxGtm_Trig_SentGroup
IfxGtm_Trig_SentGroup
Enum for SENT group.
Definition: IfxGtm_Trig.h:401
IfxGtm_Trig_MscTrigChannel_15
Definition: IfxGtm_Trig.h:279
IfxGtm_Trig_EdsadcTrig_3
Definition: IfxGtm_Trig.h:199
IfxGtm_Trig_MscTrigSignal_4
For MSC set 4.
Definition: IfxGtm_Trig.h:326
IfxGtm_Trig_EdsadcTrigSource_reserved0
Definition: IfxGtm_Trig.h:221
IfxGtm_Trig_EdsadcTrigSource_atom5_6
Definition: IfxGtm_Trig.h:234
IfxGtm_Trig_EdsadcTrig_0
Definition: IfxGtm_Trig.h:196
IfxGtm_Trig_Psi5TrigSource_atom2_5
Definition: IfxGtm_Trig.h:375
IfxGtm_Trig_SentTrigChannel_14
Definition: IfxGtm_Trig.h:443
IfxGtm_Trig_MscTrigSource_atom2
Definition: IfxGtm_Trig.h:352
IfxGtm_Trig_SentTrigSource_atom0
Definition: IfxGtm_Trig.h:452
IfxGtm_Trig_MscTrigSource_count
count of the enum definition
Definition: IfxGtm_Trig.h:362
IfxGtm_Trig_SentGroup_1
For SENT group 1.
Definition: IfxGtm_Trig.h:404
IfxGtm_Trig_MscTrigSignal_14
For MSC set 14.
Definition: IfxGtm_Trig.h:336
IfxGtm_Trig_AdcGroup_9
For ADC group 9.
Definition: IfxGtm_Trig.h:81
IfxGtm_Trig_CanTrigChannel_2
Definition: IfxGtm_Trig.h:167
IfxGtm_Trig_SentTrigChannel_5
Definition: IfxGtm_Trig.h:437
IfxGtm_Trig_Psi5TrigSource_tom2_13
Definition: IfxGtm_Trig.h:372
IfxGtm_Trig_EdsadcTrigSource_tom0_6
Definition: IfxGtm_Trig.h:206
IfxGtm_Trig_toMsc
IFX_EXTERN boolean IfxGtm_Trig_toMsc(Ifx_GTM *gtm, IfxGtm_Trig_MscTrigSignal signal, IfxGtm_Trig_MscTrigSet mscSet, IfxGtm_Trig_MscTrigSource source, IfxGtm_Trig_MscTrigChannel channel)
Definition: IfxGtm_Trig.c:1322
IfxGtm_Trig_AdcGroup_6
For ADC group 6.
Definition: IfxGtm_Trig.h:78
IfxGtm_Trig_SentTrigSource_tom2
Definition: IfxGtm_Trig.h:466
IfxGtm_Trig_EdsadcTrigSource_atom7_7
Definition: IfxGtm_Trig.h:247
IfxGtm_Trig_MscTrigSource_atom3
Definition: IfxGtm_Trig.h:353
IfxGtm_Trig_MscTrigChannel_13
Definition: IfxGtm_Trig.h:277
IfxGtm_Trig_AdcGroup_2
For ADC group 2.
Definition: IfxGtm_Trig.h:74
IfxGtm_Trig_AdcTrigSource_tom2
Definition: IfxGtm_Trig.h:133
IfxGtm_Trig_MscTrigChannel_2
Definition: IfxGtm_Trig.h:266
IfxGtm_Trig_AdcGroup_0
For ADC group 0.
Definition: IfxGtm_Trig.h:72
IfxGtm_Trig_CanTrig_1
For CAN Trig 1.
Definition: IfxGtm_Trig.h:155
IfxGtm_Trig_EdsadcTrigSource_atom3_6
Definition: IfxGtm_Trig.h:232
IfxGtm_Trig_AdcGroup_4
For ADC group 4.
Definition: IfxGtm_Trig.h:76
IfxGtm_Trig_MscTrigOutput_0
Definition: IfxGtm_Trig.h:296
IfxGtm_Trig_EdsadcTrigSource_atom2_7
Definition: IfxGtm_Trig.h:229
IfxGtm_Trig_CanTrigSource_tom1
Definition: IfxGtm_Trig.h:185
IfxGtm_Trig_SentGroup_3
For SENT group 3.
Definition: IfxGtm_Trig.h:406
IfxGtm_Trig_AdcTrigSource_atom7
Definition: IfxGtm_Trig.h:126
IfxGtm_Trig_AdcTrigSource_tom0
Definition: IfxGtm_Trig.h:131
IfxGtm_Trig_MscTrigSource_atom1
Definition: IfxGtm_Trig.h:351
IfxGtm_Trig_SentTrigSource_atom5
Definition: IfxGtm_Trig.h:457
IfxGtm_Trig_SentTrig_0
sent trigger 0
Definition: IfxGtm_Trig.h:425
IfxGtm_Trig_AdcTrig_4
Definition: IfxGtm_Trig.h:94
IfxGtm_Trig_SentGroup_8
For SENT group 8.
Definition: IfxGtm_Trig.h:411
IfxGtm_Trig_EdsadcTrigSource_atom3_7
Definition: IfxGtm_Trig.h:233
IfxGtm_Trig_MscTrigSource_tom3
Definition: IfxGtm_Trig.h:347
IfxGtm_Trig_AdcGroup_8
For ADC group 8.
Definition: IfxGtm_Trig.h:80
IfxGtm_Trig_MscTrigInput_lowExtended
Definition: IfxGtm_Trig.h:288
IfxGtm_Trig_MscTrigSource_tom1
Definition: IfxGtm_Trig.h:345
IfxGtm_Trig_EdsadcTrigSource_atom6_7
Definition: IfxGtm_Trig.h:236
IfxGtm_Trig_MscTrigChannel_11
Definition: IfxGtm_Trig.h:275
IfxGtm_Trig_EdsadcTrigSource_reserved2
Definition: IfxGtm_Trig.h:253
IfxGtm_Trig_MscTrigSignal_0
For MSC set 0.
Definition: IfxGtm_Trig.h:322
IfxGtm_Trig_MscTrigChannel_0
Definition: IfxGtm_Trig.h:264
IfxGtm_Trig_MscTrigSet_2
For MSC set 2.
Definition: IfxGtm_Trig.h:307
IfxGtm_Trig_AdcTrigChannel_12
Definition: IfxGtm_Trig.h:108
IfxGtm_Trig_EdsadcTrigSource_tom2_7
Definition: IfxGtm_Trig.h:223
IfxGtm_Trig_Psi5TrigSource_atom2_6
Definition: IfxGtm_Trig.h:376
IfxGtm_Trig_MscTrigSet_3
For MSC set 3.
Definition: IfxGtm_Trig.h:308
IfxGtm_Trig_AdcGroup_3
For ADC group 3.
Definition: IfxGtm_Trig.h:75
IfxGtm_Trig_CanTrigChannel_7
Definition: IfxGtm_Trig.h:172
IfxGtm_Trig_Psi5TrigSource_tom2_6
Definition: IfxGtm_Trig.h:370
IfxGtm_Trig_toEVadc
IFX_EXTERN boolean IfxGtm_Trig_toEVadc(Ifx_GTM *gtm, IfxGtm_Trig_AdcGroup adcGroup, IfxGtm_Trig_AdcTrig adcTrig, IfxGtm_Trig_AdcTrigSource source, IfxGtm_Trig_AdcTrigChannel channel)
Definition: IfxGtm_Trig.c:1229
IfxGtm_Trig_CanTrigChannel_count
count of the enum definition
Definition: IfxGtm_Trig.h:177
IfxGtm_Trig_CanTrig_count
count of the enum definition
Definition: IfxGtm_Trig.h:158
IfxGtm_Trig_EdsadcTrig
IfxGtm_Trig_EdsadcTrig
Enum for EDSADC trigger.
Definition: IfxGtm_Trig.h:194
IfxGtm_Trig_EdsadcTrigSource_tom5_7
Definition: IfxGtm_Trig.h:244
IfxGtm_Trig_EdsadcTrigSource_atom0_7
Definition: IfxGtm_Trig.h:213
IfxGtm_Trig_EdsadcTrigSource_tom5_14
Definition: IfxGtm_Trig.h:245
IfxGtm_Trig_SentTrigChannel_13
Definition: IfxGtm_Trig.h:442
IfxGtm_Trig_SentGroup_11
For SENT group 11.
Definition: IfxGtm_Trig.h:414
IfxGtm_Trig_MscTrigSet_4
For MSC set 4.
Definition: IfxGtm_Trig.h:309
IfxGtm_Trig_MscTrigSignal_3
For MSC set 3.
Definition: IfxGtm_Trig.h:325
IfxGtm_Trig_MscTrigSignal_12
For MSC set 12.
Definition: IfxGtm_Trig.h:334
IfxGtm_Trig_AdcTrigChannel_5
Definition: IfxGtm_Trig.h:104
IfxGtm_Trig_CanDevice_0
CAN device 0.
Definition: IfxGtm_Trig.h:144
IfxGtm_Trig_SentGroup_5
For SENT group 5.
Definition: IfxGtm_Trig.h:408
IfxGtm_Tim_Ch
IfxGtm_Tim_Ch
Enum for TIM channels.
Definition: IfxGtm_cfg.h:403
IfxGtm_Trig_EdsadcTrigSource_atom10_6
Definition: IfxGtm_Trig.h:255
IfxGtm_Trig_EdsadcTrigSource_atom7_6
Definition: IfxGtm_Trig.h:246
IfxGtm_Trig_MscTrigChannel_12
Definition: IfxGtm_Trig.h:276
IfxGtm_Trig_AdcTrigChannel_7
Definition: IfxGtm_Trig.h:106
IfxGtm_Trig_AdcTrigChannel_14
Definition: IfxGtm_Trig.h:110
IfxGtm_Trig_EdsadcTrigSource_tom1_7
Definition: IfxGtm_Trig.h:238
IfxGtm_Trig_MscTrigSignal_2
For MSC set 2.
Definition: IfxGtm_Trig.h:324
IfxGtm_Trig_CanDevice_1
CAN device 1.
Definition: IfxGtm_Trig.h:145
IfxGtm_Trig_SentTrigSource_atom8
Definition: IfxGtm_Trig.h:460
IfxGtm_Trig_MscTrigChannel_3
Definition: IfxGtm_Trig.h:267
IfxGtm_Trig_CanTrigChannel
IfxGtm_Trig_CanTrigChannel
Enum for CAN trigger channel.
Definition: IfxGtm_Trig.h:163
IfxGtm_Trig_EdsadcTrigSource_atom4_7
Definition: IfxGtm_Trig.h:219
IfxGtm_Trig_AdcGroup_5
For ADC group 5.
Definition: IfxGtm_Trig.h:77
IfxGtm_Trig_AdcTrigChannel
IfxGtm_Trig_AdcTrigChannel
Enum for ADC trigger channel.
Definition: IfxGtm_Trig.h:100
IfxGtm_Trig_toEdsadc
IFX_EXTERN void IfxGtm_Trig_toEdsadc(Ifx_GTM *gtm, uint32 edsadcChannel, IfxGtm_Trig_EdsadcTrig edsadcTrig, IfxGtm_Trig_EdsadcTrigSource sel)
Definition: IfxGtm_Trig.c:1305
IfxGtm_Trig_MscTrigChannel_6
Definition: IfxGtm_Trig.h:270
IfxGtm_Trig_AdcTrigSource_atom8
Definition: IfxGtm_Trig.h:127
IfxGtm_Trig_MscTrigSource_atom6
Definition: IfxGtm_Trig.h:356
IfxGtm_Trig_SentGroup_4
For SENT group 4.
Definition: IfxGtm_Trig.h:407
IfxGtm_cfg.h
GTM on-chip implementation data.
IfxGtm_Trig_MscTrigChannel_14
Definition: IfxGtm_Trig.h:278
IfxGtm_Trig_SentTrigChannel_count
count of the enum definition
Definition: IfxGtm_Trig.h:445
IfxGtm_Trig_MscTrigSource_atom8
Definition: IfxGtm_Trig.h:358
IfxGtm_Trig_MscTrigSignal_9
For MSC set 9.
Definition: IfxGtm_Trig.h:331
IfxGtm_Trig_EdsadcTrigSource_atom1_5
Definition: IfxGtm_Trig.h:215
IfxGtm_Trig_MscTrigSignal_6
For MSC set 6.
Definition: IfxGtm_Trig.h:328
IfxGtm_Trig_SentGroup_14
For SENT group 14.
Definition: IfxGtm_Trig.h:417
IfxGtm_Trig_MscTrigChannel_5
Definition: IfxGtm_Trig.h:269
IfxGtm_Trig_SentTrigChannel_4
Definition: IfxGtm_Trig.h:436
IfxGtm_Trig_EdsadcTrigSource_atom2_4
Definition: IfxGtm_Trig.h:226
IfxGtm_Trig_MscTrigChannel_1
Definition: IfxGtm_Trig.h:265
IfxGtm_Trig_CanTrigChannel_0
Definition: IfxGtm_Trig.h:165
IfxGtm_Trig_EdsadcTrigSource_atom8_7
Definition: IfxGtm_Trig.h:249
IfxGtm_Trig_MscTrigSet_count
count of the enum definition
Definition: IfxGtm_Trig.h:315


iLLD_TC38A: IfxGtm_cfg.c Source File

  • _Impl
IfxGtm_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_cfg.c
3 * \brief GTM on-chip implementation data
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxGtm_cfg.h"
47
48 /******************************************************************************/
49 /*-----------------------Exported Variables/Constants-------------------------*/
50 /******************************************************************************/
51
52 IFX_CONST IfxGtm_Cdtm IfxGtm_dtmAtom_map[IFXGTM_NUM_ATOM_OBJECTS] = {
53 IfxGtm_Cdtm_0, /* ATOM0 */
54 IfxGtm_Cdtm_1, /* ATOM1 */
55 IfxGtm_Cdtm_2, /* ATOM2 */
56 IfxGtm_Cdtm_3, /* ATOM3 */
57 IfxGtm_Cdtm_4, /* ATOM4 */
58 IfxGtm_Cdtm_5, /* ATOM5 */
59 IfxGtm_Cdtm_none, /* ATOM6 */
60 IfxGtm_Cdtm_none, /* ATOM7 */
61 IfxGtm_Cdtm_none, /* ATOM8 */
62 };
63
64 IFX_CONST IfxGtm_Cdtm IfxGtm_dtmTom_map[IFXGTM_NUM_TOM_OBJECTS] = {
65 IfxGtm_Cdtm_0, /* TOM0 */
66 IfxGtm_Cdtm_1, /* TOM1 */
67 IfxGtm_Cdtm_2, /* TOM2 */
68 IfxGtm_Cdtm_3, /* TOM3 */
69 IfxGtm_Cdtm_none, /* TOM4 */
70 };
71
72 IFX_CONST IfxModule_IndexMap IfxGtm_spe_indexMap[IFXGTM_NUM_SPE_OBJECTS] = {
73 {&(MODULE_GTM.SPE[0]), (uint32)IfxGtm_Spe_0},
74 {&(MODULE_GTM.SPE[1]), (uint32)IfxGtm_Spe_1},
75 {&(MODULE_GTM.SPE[2]), (uint32)IfxGtm_Spe_2},
76 {&(MODULE_GTM.SPE[3]), (uint32)IfxGtm_Spe_3},
77 };
IfxGtm_spe_indexMap
IFX_CONST IfxModule_IndexMap IfxGtm_spe_indexMap[IFXGTM_NUM_SPE_OBJECTS]
Definition: IfxGtm_cfg.c:72
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxGtm_Cdtm_1
DTM object 1.
Definition: IfxGtm_cfg.h:277
IfxGtm_Cdtm_4
DTM object 4.
Definition: IfxGtm_cfg.h:280
IfxGtm_Spe_0
SPE 0.
Definition: IfxGtm_cfg.h:346
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxGtm_Spe_1
SPE 1.
Definition: IfxGtm_cfg.h:347
IfxGtm_Spe_2
SPE 2.
Definition: IfxGtm_cfg.h:348
IfxGtm_Spe_3
SPE 3.
Definition: IfxGtm_cfg.h:349
IfxGtm_dtmAtom_map
IFX_CONST IfxGtm_Cdtm IfxGtm_dtmAtom_map[IFXGTM_NUM_ATOM_OBJECTS]
Definition: IfxGtm_cfg.c:52
IFXGTM_NUM_ATOM_OBJECTS
#define IFXGTM_NUM_ATOM_OBJECTS
Definition: IfxGtm_cfg.h:181
IfxGtm_Cdtm_2
DTM object 2.
Definition: IfxGtm_cfg.h:278
IFXGTM_NUM_SPE_OBJECTS
#define IFXGTM_NUM_SPE_OBJECTS
Number of Sensor Pattern Evaluation Modules.
Definition: IfxGtm_cfg.h:209
IFXGTM_NUM_TOM_OBJECTS
#define IFXGTM_NUM_TOM_OBJECTS
Definition: IfxGtm_cfg.h:183
IfxGtm_Cdtm_0
DTM object 0.
Definition: IfxGtm_cfg.h:276
IfxGtm_Cdtm_5
DTM object 5.
Definition: IfxGtm_cfg.h:281
IfxGtm_dtmTom_map
IFX_CONST IfxGtm_Cdtm IfxGtm_dtmTom_map[IFXGTM_NUM_TOM_OBJECTS]
Definition: IfxGtm_cfg.c:64
IfxGtm_Cdtm_3
DTM object 3.
Definition: IfxGtm_cfg.h:279
IfxGtm_Cdtm_none
No DTM object.
Definition: IfxGtm_cfg.h:275
IfxGtm_Cdtm
IfxGtm_Cdtm
Enum for CDTM objects.
Definition: IfxGtm_cfg.h:273
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:140
IfxGtm_cfg.h
GTM on-chip implementation data.


iLLD_TC38A: IfxGtm_cfg.h Source File

  • _Impl
IfxGtm_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_cfg.h
3 * \brief GTM on-chip implementation data
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Gtm GTM
42 * \ingroup IfxLld
43 * \defgroup IfxLld_Gtm_Impl Implementation
44 * \ingroup IfxLld_Gtm
45 * \defgroup IfxLld_Gtm_Std Standard Driver
46 * \ingroup IfxLld_Gtm
47 * \defgroup IfxLld_Gtm_Atom Atom Interface Drivers
48 * \ingroup IfxLld_Gtm
49 * \defgroup IfxLld_Gtm_Tom TOM Interface Drivers
50 * \ingroup IfxLld_Gtm
51 * \defgroup IfxLld_Gtm_Tim Tim Interface Drivers
52 * \ingroup IfxLld_Gtm
53 * \defgroup IfxLld_Gtm_Impl_Enumerations Enumerations
54 * \ingroup IfxLld_Gtm_Impl
55 * \defgroup IfxLld_Gtm_Impl_Data_Structures Data Structures
56 * \ingroup IfxLld_Gtm_Impl
57 */
58
59 #ifndef IFXGTM_CFG_H
60 #define IFXGTM_CFG_H 1
61
62 /******************************************************************************/
63 /*----------------------------------Includes----------------------------------*/
64 /******************************************************************************/
65
66 #include "Cpu/Std/IfxCpu_Intrinsics.h"
67 #include "Ifx_Cfg.h"
68 #include "IfxGtm_reg.h"
69 #include "Port/Std/IfxPort.h"
70
71 /******************************************************************************/
72 /*-----------------------------------Macros-----------------------------------*/
73 /******************************************************************************/
74
75 /** \brief Mask for CMU_CLK_EN register (Enable): CLK0
76 */
77 #define IFXGTM_CMU_CLKEN_CLK0 (0x00000002)
78
79 /** \brief Mask for CMU_CLK_EN register (Enable): CLK1
80 */
81 #define IFXGTM_CMU_CLKEN_CLK1 (0x00000008)
82
83 /** \brief Mask for CMU_CLK_EN register (Enable): CLK2
84 */
85 #define IFXGTM_CMU_CLKEN_CLK2 (0x00000020)
86
87 /** \brief Mask for CMU_CLK_EN register (Enable): CLK3
88 */
89 #define IFXGTM_CMU_CLKEN_CLK3 (0x00000080)
90
91 /** \brief Mask for CMU_CLK_EN register (Enable): CLK4
92 */
93 #define IFXGTM_CMU_CLKEN_CLK4 (0x00000200)
94
95 /** \brief Mask for CMU_CLK_EN register (Enable): CLK5
96 */
97 #define IFXGTM_CMU_CLKEN_CLK5 (0x00000800)
98
99 /** \brief Mask for CMU_CLK_EN register (Enable): CLK6
100 */
101 #define IFXGTM_CMU_CLKEN_CLK6 (0x00002000)
102
103 /** \brief Mask for CMU_CLK_EN register (Enable): CLK7
104 */
105 #define IFXGTM_CMU_CLKEN_CLK7 (0x00008000)
106
107 /** \brief Mask for CMU_CLK_EN register (Enable): ECLK0
108 */
109 #define IFXGTM_CMU_CLKEN_ECLK0 (0x00020000)
110
111 /** \brief Mask for CMU_CLK_EN register (Enable): ECLK1
112 */
113 #define IFXGTM_CMU_CLKEN_ECLK1 (0x00080000)
114
115 /** \brief Mask for CMU_CLK_EN register (Enable): ECLK2
116 */
117 #define IFXGTM_CMU_CLKEN_ECLK2 (0x00200000)
118
119 /** \brief Mask for CMU_CLK_EN register (Enable): FXCLK
120 */
121 #define IFXGTM_CMU_CLKEN_FXCLK (0x00800000)
122
123 /** \brief Mask for CMU_CLK_EN register (Enable): ALL clocks
124 */
125 #define IFXGTM_CMU_CLKEN_ALL (0x00AAAAAA)
126
127 /** \brief Mask for CMU_CLK_EN register (Disable): CLK0
128 */
129 #define IFXGTM_CMU_CLKDIS_CLK0 (0x00000001)
130
131 /** \brief Mask for CMU_CLK_EN register (Disable): CLK1
132 */
133 #define IFXGTM_CMU_CLKDIS_CLK1 (0x00000004)
134
135 /** \brief Mask for CMU_CLK_EN register (Disable): CLK2
136 */
137 #define IFXGTM_CMU_CLKDIS_CLK2 (0x00000010)
138
139 /** \brief Mask for CMU_CLK_EN register (Disable): CLK3
140 */
141 #define IFXGTM_CMU_CLKDIS_CLK3 (0x00000040)
142
143 /** \brief Mask for CMU_CLK_EN register (Disable): CLK4
144 */
145 #define IFXGTM_CMU_CLKDIS_CLK4 (0x00000100)
146
147 /** \brief Mask for CMU_CLK_EN register (Disable): CLK5
148 */
149 #define IFXGTM_CMU_CLKDIS_CLK5 (0x00000400)
150
151 /** \brief Mask for CMU_CLK_EN register (Disable): CLK6
152 */
153 #define IFXGTM_CMU_CLKDIS_CLK6 (0x00001000)
154
155 /** \brief Mask for CMU_CLK_EN register (Disable): CLK7
156 */
157 #define IFXGTM_CMU_CLKDIS_CLK7 (0x00004000)
158
159 /** \brief Mask for CMU_CLK_EN register (Disable): ECLK0
160 */
161 #define IFXGTM_CMU_CLKDIS_ECLK0 (0x00010000)
162
163 /** \brief Mask for CMU_CLK_EN register (Disable): ECLK1
164 */
165 #define IFXGTM_CMU_CLKDIS_ECLK1 (0x00040000)
166
167 /** \brief Mask for CMU_CLK_EN register (Disable): ECLK2
168 */
169 #define IFXGTM_CMU_CLKDIS_ECLK2 (0x00100000)
170
171 /** \brief Mask for CMU_CLK_EN register (Disable): FXCLK
172 */
173 #define IFXGTM_CMU_CLKDIS_FXCLK (0x00400000)
174
175 /** \brief Mask for CMU_CLK_EN register (Disable): ALL clocks
176 */
177 #define IFXGTM_CMU_CLKDIS_ALL (0x00555555)
178
179 /** \brief
180 */
181 #define IFXGTM_NUM_ATOM_OBJECTS (9)
182
183 #define IFXGTM_NUM_TOM_OBJECTS (5)
184
185 #define IFXGTM_NUM_ATOM_CHANNELS (8)
186
187 #define IFXGTM_NUM_TOM_CHANNELS (16)
188
189 #define IFXGTM_NUM_MODULES (1)
190
191 /** \brief Number of Multi Channel Sequencer modules
192 */
193 #define IFXGTM_NUM_MCS_OBJECTS (7)
194
195 /** \brief Number of Parameter Storage Modules
196 */
197 #define IFXGTM_NUM_PSM_OBJECTS (2)
198
199 /** \brief Number of Cluster Dead Time Modules
200 */
201 #define IFXGTM_NUM_CDTM_OBJECTS (5)
202
203 /** \brief Number of Dead Time Modules in each cluster
204 */
205 #define IFXGTM_NUM_DTM_PER_CDTM_OBJECTS (4)
206
207 /** \brief Number of Sensor Pattern Evaluation Modules
208 */
209 #define IFXGTM_NUM_SPE_OBJECTS (4)
210
211 /** \brief Number of Cluster Configuration Module
212 */
213 #define IFXGTM_NUM_CCM_OBJECTS (9)
214
215 /** \brief FIFO RAM size is 1024 * 29 bit words.
216 */
217 #define IFXGTM_PSM_FIFORAMSIZE (1024u)
218
219 /** \brief FIFO word width is 29 bits.
220 */
221 #define IFXGTM_PSM_FIFOWORDWIDTH (29u)
222
223 #define IFXGTM_NUM_TIM_OBJECTS (7)
224
225 /** \brief number of TIM channels.
226 */
227 #define IFXGTM_NUM_TIM_CHANNELS (8)
228
229 /******************************************************************************/
230 /*------------------------------Type Definitions------------------------------*/
231 /******************************************************************************/
232
233 typedef volatile struct IfxGtm_Tom_TGC Ifx_GTM_TOM_TGC;
234
235 /******************************************************************************/
236 /*--------------------------------Enumerations--------------------------------*/
237 /******************************************************************************/
238
239 /** \addtogroup IfxLld_Gtm_Impl_Enumerations
240 * \{ */
241 /** \brief Enum for ATOM objects
242 */
243 typedef enum
244 {
245 IfxGtm_Atom_0, /**< \brief ATOM object 0 */
246 IfxGtm_Atom_1, /**< \brief ATOM object 1 */
247 IfxGtm_Atom_2, /**< \brief ATOM object 2 */
248 IfxGtm_Atom_3, /**< \brief ATOM object 3 */
249 IfxGtm_Atom_4, /**< \brief ATOM object 4 */
250 IfxGtm_Atom_5, /**< \brief ATOM object 5 */
251 IfxGtm_Atom_6, /**< \brief ATOM object 6 */
252 IfxGtm_Atom_7, /**< \brief ATOM object 7 */
253 IfxGtm_Atom_8 /**< \brief ATOM object 8 */
254 } IfxGtm_Atom;
255
256 /** \brief Enum for ATOM channels
257 */
258 typedef enum
259 {
260 IfxGtm_Atom_Ch_none = -1, /**< \brief Not Selected */
261 IfxGtm_Atom_Ch_0, /**< \brief ATOM channel 0 */
262 IfxGtm_Atom_Ch_1, /**< \brief ATOM channel 1 */
263 IfxGtm_Atom_Ch_2, /**< \brief ATOM channel 2 */
264 IfxGtm_Atom_Ch_3, /**< \brief ATOM channel 3 */
265 IfxGtm_Atom_Ch_4, /**< \brief ATOM channel 4 */
266 IfxGtm_Atom_Ch_5, /**< \brief ATOM channel 5 */
267 IfxGtm_Atom_Ch_6, /**< \brief ATOM channel 6 */
268 IfxGtm_Atom_Ch_7 /**< \brief ATOM channel 7 */
269 } IfxGtm_Atom_Ch;
270
271 /** \brief Enum for CDTM objects
272 */
273 typedef enum
274 {
275 IfxGtm_Cdtm_none = -1, /**< \brief No DTM object */
276 IfxGtm_Cdtm_0, /**< \brief DTM object 0 */
277 IfxGtm_Cdtm_1, /**< \brief DTM object 1 */
278 IfxGtm_Cdtm_2, /**< \brief DTM object 2 */
279 IfxGtm_Cdtm_3, /**< \brief DTM object 3 */
280 IfxGtm_Cdtm_4, /**< \brief DTM object 4 */
281 IfxGtm_Cdtm_5, /**< \brief DTM object 5 */
282 IfxGtm_Cdtm_6 /**< \brief DTM object 6 */
283 } IfxGtm_Cdtm;
284
285 /** \brief Enumeration listing the clusters of GTM
286 */
287 typedef enum
288 {
289 IfxGtm_Cluster_0, /**< \brief GTM cluster 0 */
290 IfxGtm_Cluster_1, /**< \brief GTM cluster 1 */
291 IfxGtm_Cluster_2, /**< \brief GTM cluster 2 */
292 IfxGtm_Cluster_3, /**< \brief GTM cluster 3 */
293 IfxGtm_Cluster_4, /**< \brief GTM cluster 4 */
294 IfxGtm_Cluster_5, /**< \brief GTM cluster 5 */
295 IfxGtm_Cluster_6, /**< \brief GTM cluster 6 */
296 IfxGtm_Cluster_7, /**< \brief GTM cluster 7 */
297 IfxGtm_Cluster_8 /**< \brief GTM cluster 8 */
298 } IfxGtm_Cluster;
299
300 /** \brief Enum for Dpll subincrements
301 */
302 typedef enum
303 {
304 IfxGtm_Dpll_SubInc_1 = 0, /**< \brief subincrement1 */
305 IfxGtm_Dpll_SubInc_2 /**< \brief subincrement2 */
306 } IfxGtm_Dpll_SubInc;
307
308 /** \brief Enum for DTM objects
309 */
310 typedef enum
311 {
312 IfxGtm_Dtm_none = -1, /**< \brief No DTM object */
313 IfxGtm_Dtm_0, /**< \brief DTM object 0 */
314 IfxGtm_Dtm_1, /**< \brief DTM object 1 */
315 IfxGtm_Dtm_2, /**< \brief DTM object 2 */
316 IfxGtm_Dtm_3, /**< \brief DTM object 3 */
317 IfxGtm_Dtm_4, /**< \brief DTM object 4 */
318 IfxGtm_Dtm_5 /**< \brief DTM object 5 */
319 } IfxGtm_Dtm;
320
321 /** \brief Enum for DTM channels
322 */
323 typedef enum
324 {
325 IfxGtm_Dtm_Ch_none = -1, /**< \brief Not Selected */
326 IfxGtm_Dtm_Ch_0, /**< \brief DTM object 0 */
327 IfxGtm_Dtm_Ch_1, /**< \brief DTM object 1 */
328 IfxGtm_Dtm_Ch_2, /**< \brief DTM object 2 */
329 IfxGtm_Dtm_Ch_3 /**< \brief DTM object 3 */
330 } IfxGtm_Dtm_Ch;
331
332 /** \brief Enum Enable disable feature control
333 */
334 typedef enum
335 {
336 IfxGtm_FeatureControl_disabled = 0, /**< \brief disabled */
337 IfxGtm_FeatureControl_disable = 1, /**< \brief disable */
338 IfxGtm_FeatureControl_enable = 2, /**< \brief enable */
339 IfxGtm_FeatureControl_enabled = 3 /**< \brief enabled */
340 } IfxGtm_FeatureControl;
341
342 /** \brief Spe Objects
343 */
344 typedef enum
345 {
346 IfxGtm_Spe_0, /**< \brief SPE 0 */
347 IfxGtm_Spe_1, /**< \brief SPE 1 */
348 IfxGtm_Spe_2, /**< \brief SPE 2 */
349 IfxGtm_Spe_3 /**< \brief SPE 3 */
350 } IfxGtm_Spe;
351
352 /** \brief Specifies the TIM inputs to the SPE submodule instances.
353 * Two possible input sources are present per SPE for CHx,y,z
354 * Choose the appropriate input source as per the used SPE.
355 *
356 * sed to set: GTM.SPE.CTRL_STAT.TIM_SEL
357 */
358 typedef enum
359 {
360 IfxGtm_Spe_TimInput_spe0Tim0Ch0to2 = 0, /**< \brief SPE0: select TIM 0 Channel 0-2 */
361 IfxGtm_Spe_TimInput_spe0Tim1Ch0to2 = 1, /**< \brief SPE0: Select TIM 1 Channel 0 to 2 */
362 IfxGtm_Spe_TimInput_spe1Tim0Ch3to5 = 2, /**< \brief SPE1: select TIM 0 Channel 3 to 5 */
363 IfxGtm_Spe_TimInput_spe1Tim1Ch3to5 = 3, /**< \brief SPE1: Select TIM 1 Channel 3 to 5 */
364 IfxGtm_Spe_TimInput_spe2Tim2Ch0to2 = 4, /**< \brief SPE2: Select TIM 2 Channel 0 to 2 */
365 IfxGtm_Spe_TimInput_spe2Tim3Ch0to2 = 5, /**< \brief SPE2: Select TIM 3 Channel 0 to 2 */
366 IfxGtm_Spe_TimInput_spe3Tim2Ch3to5 = 6, /**< \brief SPE3: Select TIM 2 Channel 3 to 5 */
367 IfxGtm_Spe_TimInput_spe3Tim3Ch3to5 = 7, /**< \brief SPE3: Select TIM 3 Channel 3 to 5 */
368 IfxGtm_Spe_TimInput_spe4Tim4Ch0to2 = 8, /**< \brief SPE4: Select TIM 4 channel 0 to 2 */
369 IfxGtm_Spe_TimInput_spe4Tim5Ch0to2 = 9, /**< \brief SPE4: Select TIM 5 Channel 0 to 2 */
370 IfxGtm_Spe_TimInput_spe5Tim4Ch3to5 = 10, /**< \brief SPE5: Select TIM 4 Channel 3 to 5 */
371 IfxGtm_Spe_TimInput_spe5Tim5Ch3to5 = 11 /**< \brief SPE5: Select TIM 5 Channel 3 to 5 */
372 } IfxGtm_Spe_TimInput;
373
374 /** \brief selects the source of trigger to control command output from SPE.
375 */
376 typedef enum
377 {
378 IfxGtm_Spe_TriggerSource_speNipd = 0, /**< \brief select NIPD as trigger */
379 IfxGtm_Spe_TriggerSource_tomCh0Ccu0 = 1, /**< \brief select TOM channl 0 CCU0 as trigger */
380 IfxGtm_Spe_TriggerSource_tomCh0Ccu1 = 2, /**< \brief select TOM channl 0 CCU1 as trigger */
381 IfxGtm_Spe_TriggerSource_tomCh2Ccu1 = 3, /**< \brief select TOM channl 2 CCU1 as trigger */
382 IfxGtm_Spe_TriggerSource_tomCh6Ccu1 = 4, /**< \brief select TOM channl 6 CCU1 as trigger */
383 IfxGtm_Spe_TriggerSource_tomCh7Ccu1 = 5, /**< \brief select TOM channl 7 CCU1 as trigger */
384 IfxGtm_Spe_TriggerSource_tomCh8Ccu1 = 6, /**< \brief select TOM channl 8 CCU1 as trigger */
385 IfxGtm_Spe_TriggerSource_tomCh9Ccu1 = 7 /**< \brief select TOM channl 9 CCU1 as trigger */
386 } IfxGtm_Spe_TriggerSource;
387
388 /** \brief Enum for TIM objects
389 */
390 typedef enum
391 {
392 IfxGtm_Tim_0, /**< \brief TIM object 0 */
393 IfxGtm_Tim_1, /**< \brief TIM object 1 */
394 IfxGtm_Tim_2, /**< \brief TIM object 2 */
395 IfxGtm_Tim_3, /**< \brief TIM object 3 */
396 IfxGtm_Tim_4, /**< \brief TIM object 4 */
397 IfxGtm_Tim_5, /**< \brief TIM object 5 */
398 IfxGtm_Tim_6 /**< \brief TIM object 6 */
399 } IfxGtm_Tim;
400
401 /** \brief Enum for TIM channels
402 */
403 typedef enum
404 {
405 IfxGtm_Tim_Ch_0, /**< \brief TIM channel 0 */
406 IfxGtm_Tim_Ch_1, /**< \brief TIM channel 1 */
407 IfxGtm_Tim_Ch_2, /**< \brief TIM channel 2 */
408 IfxGtm_Tim_Ch_3, /**< \brief TIM channel 3 */
409 IfxGtm_Tim_Ch_4, /**< \brief TIM channel 4 */
410 IfxGtm_Tim_Ch_5, /**< \brief TIM channel 5 */
411 IfxGtm_Tim_Ch_6, /**< \brief TIM channel 6 */
412 IfxGtm_Tim_Ch_7 /**< \brief TIM channel 7 */
413 } IfxGtm_Tim_Ch;
414
415 /** \brief Enum for TOM objects
416 */
417 typedef enum
418 {
419 IfxGtm_Tom_0, /**< \brief TOM object 0 */
420 IfxGtm_Tom_1, /**< \brief TOM object 1 */
421 IfxGtm_Tom_2, /**< \brief TOM object 2 */
422 IfxGtm_Tom_3, /**< \brief TOM object 3 */
423 IfxGtm_Tom_4 /**< \brief TOM object 4 */
424 } IfxGtm_Tom;
425
426 /** \brief Enum for TOM channels
427 */
428 typedef enum
429 {
430 IfxGtm_Tom_Ch_none = -1, /**< \brief Not Selected */
431 IfxGtm_Tom_Ch_0, /**< \brief TOM channel 0 */
432 IfxGtm_Tom_Ch_1, /**< \brief TOM channel 1 */
433 IfxGtm_Tom_Ch_2, /**< \brief TOM channel 2 */
434 IfxGtm_Tom_Ch_3, /**< \brief TOM channel 3 */
435 IfxGtm_Tom_Ch_4, /**< \brief TOM channel 4 */
436 IfxGtm_Tom_Ch_5, /**< \brief TOM channel 5 */
437 IfxGtm_Tom_Ch_6, /**< \brief TOM channel 6 */
438 IfxGtm_Tom_Ch_7, /**< \brief TOM channel 7 */
439 IfxGtm_Tom_Ch_8, /**< \brief TOM channel 8 */
440 IfxGtm_Tom_Ch_9, /**< \brief TOM channel 9 */
441 IfxGtm_Tom_Ch_10, /**< \brief TOM channel 10 */
442 IfxGtm_Tom_Ch_11, /**< \brief TOM channel 11 */
443 IfxGtm_Tom_Ch_12, /**< \brief TOM channel 12 */
444 IfxGtm_Tom_Ch_13, /**< \brief TOM channel 13 */
445 IfxGtm_Tom_Ch_14, /**< \brief TOM channel 14 */
446 IfxGtm_Tom_Ch_15 /**< \brief TOM channel 15 */
447 } IfxGtm_Tom_Ch;
448
449 /** \brief Enum for TOM global channel control units
450 */
451 typedef enum
452 {
453 IfxGtm_Tom_Tgc_0, /**< \brief TOM global channel control unit0 */
454 IfxGtm_Tom_Tgc_1 /**< \brief TOM global channel control unit1 */
455 } IfxGtm_Tom_Tgc;
456
457 /** \} */
458
459 /** \brief Enumeration listing the F2A objects
460 */
461 typedef enum
462 {
463 IfxGtm_Psm_F2a_0, /**< \brief PSM F2a 0 */
464 IfxGtm_Psm_F2a_1 /**< \brief PSM F2a 1 */
465 } IfxGtm_Psm_F2a;
466
467 /** \brief Enumeration listing the Fifo Channels.
468 */
469 typedef enum
470 {
471 IfxGtm_Psm_Fifo_0, /**< \brief PSM Fifo 0 */
472 IfxGtm_Psm_Fifo_1 /**< \brief PSM Fifo 1 */
473 } IfxGtm_Psm_Fifo;
474
475 /******************************************************************************/
476 /*-----------------------------Data Structures--------------------------------*/
477 /******************************************************************************/
478
479 /** \addtogroup IfxLld_Gtm_Impl_Data_Structures
480 * \{ */
481 /** \brief TOM TGC objects
482 */
483 struct IfxGtm_Tom_TGC
484 {
485 Ifx_GTM_TOM_TGC_GLB_CTRL GLB_CTRL; /**< \brief 30, TOM TGC0 Global Control Register */
486 Ifx_GTM_TOM_TGC_ACT_TB ACT_TB; /**< \brief 34, TOM TGC0 Action Time Base Register */
487 Ifx_GTM_TOM_TGC_FUPD_CTRL FUPD_CTRL; /**< \brief 38, TOM TGC0 Force Update Control Register */
488 Ifx_GTM_TOM_TGC_INT_TRIG INT_TRIG; /**< \brief 3C, TOM TGC0 Internal Trigger Control Register */
489 Ifx_GTM_TOM_CH xxxCH1;
490 uint32 reserved; /**< \brief reserved area */
491 Ifx_GTM_TOM_TGC_ENDIS_CTRL ENDIS_CTRL; /**< \brief 70, TOM TGC0 Enable/Disable Control Register */
492 Ifx_GTM_TOM_TGC_ENDIS_STAT ENDIS_STAT; /**< \brief 74, TOM TGC0 Enable/Disable Status Register */
493 Ifx_GTM_TOM_TGC_OUTEN_CTRL OUTEN_CTRL; /**< \brief 78, TOM TGC0 Output Enable Control Register */
494 Ifx_GTM_TOM_TGC_OUTEN_STAT OUTEN_STAT; /**< \brief 7C, TOM TGC0 Output Enable Status Register */
495 };
496
497 /** \} */
498
499 /******************************************************************************/
500 /*-------------------Global Exported Variables/Constants----------------------*/
501 /******************************************************************************/
502
503 /** \brief Table containing the ATOM mapped CDTM index
504 */
505 IFX_EXTERN IFX_CONST IfxGtm_Cdtm IfxGtm_dtmAtom_map[IFXGTM_NUM_ATOM_OBJECTS];
506
507 /** \brief Table containing the TOM mapped CDTM index
508 */
509 IFX_EXTERN IFX_CONST IfxGtm_Cdtm IfxGtm_dtmTom_map[IFXGTM_NUM_TOM_OBJECTS];
510
511 /** \brief Table containing the address and index of SPE Objects.
512 */
513 IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxGtm_spe_indexMap[IFXGTM_NUM_SPE_OBJECTS];
514
515 #endif /* IFXGTM_CFG_H */
IfxGtm_Dtm_Ch_none
Not Selected.
Definition: IfxGtm_cfg.h:325
IfxGtm_Dtm_Ch_1
DTM object 1.
Definition: IfxGtm_cfg.h:327
IfxGtm_Atom_2
ATOM object 2.
Definition: IfxGtm_cfg.h:247
IfxGtm_Dtm_Ch_2
DTM object 2.
Definition: IfxGtm_cfg.h:328
IfxGtm_Spe_TimInput_spe0Tim0Ch0to2
SPE0: select TIM 0 Channel 0-2.
Definition: IfxGtm_cfg.h:360
IfxGtm_Tim_0
TIM object 0.
Definition: IfxGtm_cfg.h:392
IfxGtm_Spe_TimInput_spe2Tim2Ch0to2
SPE2: Select TIM 2 Channel 0 to 2.
Definition: IfxGtm_cfg.h:364
IfxGtm_FeatureControl_disabled
disabled
Definition: IfxGtm_cfg.h:336
IfxGtm_Tom_1
TOM object 1.
Definition: IfxGtm_cfg.h:420
IfxGtm_dtmTom_map
IFX_EXTERN IFX_CONST IfxGtm_Cdtm IfxGtm_dtmTom_map[IFXGTM_NUM_TOM_OBJECTS]
Table containing the TOM mapped CDTM index.
Definition: IfxGtm_cfg.h:509
IfxGtm_Spe_TriggerSource_speNipd
select NIPD as trigger
Definition: IfxGtm_cfg.h:378
IfxGtm_Dtm_none
No DTM object.
Definition: IfxGtm_cfg.h:312
IfxGtm_Spe_TriggerSource_tomCh8Ccu1
select TOM channl 8 CCU1 as trigger
Definition: IfxGtm_cfg.h:384
IfxGtm_Cluster_3
GTM cluster 3.
Definition: IfxGtm_cfg.h:292
IfxGtm_Spe
IfxGtm_Spe
Spe Objects.
Definition: IfxGtm_cfg.h:344
IfxGtm_Spe_TimInput_spe4Tim4Ch0to2
SPE4: Select TIM 4 channel 0 to 2.
Definition: IfxGtm_cfg.h:368
IfxGtm_Tim_Ch_0
TIM channel 0.
Definition: IfxGtm_cfg.h:405
IfxGtm_Dtm_1
DTM object 1.
Definition: IfxGtm_cfg.h:314
IfxGtm_Atom_Ch_0
ATOM channel 0.
Definition: IfxGtm_cfg.h:261
IfxGtm_Dpll_SubInc_1
subincrement1
Definition: IfxGtm_cfg.h:304
IfxGtm_Tom_TGC::reserved
uint32 reserved
reserved area
Definition: IfxGtm_cfg.h:490
IfxGtm_Spe_TimInput_spe5Tim5Ch3to5
SPE5: Select TIM 5 Channel 3 to 5.
Definition: IfxGtm_cfg.h:371
IfxGtm_Atom_7
ATOM object 7.
Definition: IfxGtm_cfg.h:252
IfxGtm_Spe_TimInput_spe4Tim5Ch0to2
SPE4: Select TIM 5 Channel 0 to 2.
Definition: IfxGtm_cfg.h:369
IfxGtm_Spe_TriggerSource_tomCh7Ccu1
select TOM channl 7 CCU1 as trigger
Definition: IfxGtm_cfg.h:383
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxGtm_Cluster_5
GTM cluster 5.
Definition: IfxGtm_cfg.h:294
IfxGtm_Spe_TimInput_spe2Tim3Ch0to2
SPE2: Select TIM 3 Channel 0 to 2.
Definition: IfxGtm_cfg.h:365
IfxGtm_Dtm_4
DTM object 4.
Definition: IfxGtm_cfg.h:317
IfxGtm_Tim_2
TIM object 2.
Definition: IfxGtm_cfg.h:394
IfxGtm_Atom
IfxGtm_Atom
Enum for ATOM objects.
Definition: IfxGtm_cfg.h:243
IfxGtm_Atom_Ch_4
ATOM channel 4.
Definition: IfxGtm_cfg.h:265
IfxGtm_Tom_Ch_10
TOM channel 10.
Definition: IfxGtm_cfg.h:441
IfxGtm_dtmAtom_map
IFX_EXTERN IFX_CONST IfxGtm_Cdtm IfxGtm_dtmAtom_map[IFXGTM_NUM_ATOM_OBJECTS]
Table containing the ATOM mapped CDTM index.
Definition: IfxGtm_cfg.h:505
IfxGtm_Tim
IfxGtm_Tim
Enum for TIM objects.
Definition: IfxGtm_cfg.h:390
IfxCpu_Intrinsics.h
IfxGtm_Psm_Fifo
IfxGtm_Psm_Fifo
Enumeration listing the Fifo Channels.
Definition: IfxGtm_cfg.h:469
IfxGtm_Dtm_Ch_3
DTM object 3.
Definition: IfxGtm_cfg.h:329
IfxGtm_Dtm_0
DTM object 0.
Definition: IfxGtm_cfg.h:313
IfxGtm_Cdtm_6
DTM object 6.
Definition: IfxGtm_cfg.h:282
IfxGtm_Spe_TimInput_spe1Tim1Ch3to5
SPE1: Select TIM 1 Channel 3 to 5.
Definition: IfxGtm_cfg.h:363
IfxGtm_Tom_Ch_9
TOM channel 9.
Definition: IfxGtm_cfg.h:440
IfxGtm_Psm_F2a
IfxGtm_Psm_F2a
Enumeration listing the F2A objects.
Definition: IfxGtm_cfg.h:461
IfxGtm_Tom_Tgc_0
TOM global channel control unit0.
Definition: IfxGtm_cfg.h:453
IfxGtm_Cdtm_1
DTM object 1.
Definition: IfxGtm_cfg.h:277
IfxGtm_Cdtm_4
DTM object 4.
Definition: IfxGtm_cfg.h:280
IfxGtm_Tom_TGC::FUPD_CTRL
Ifx_GTM_TOM_TGC_FUPD_CTRL FUPD_CTRL
38, TOM TGC0 Force Update Control Register
Definition: IfxGtm_cfg.h:487
IfxGtm_Spe_0
SPE 0.
Definition: IfxGtm_cfg.h:346
IfxGtm_Psm_F2a_1
PSM F2a 1.
Definition: IfxGtm_cfg.h:464
IfxGtm_Tom_Ch
IfxGtm_Tom_Ch
Enum for TOM channels.
Definition: IfxGtm_cfg.h:428
IfxGtm_Tom_TGC::OUTEN_CTRL
Ifx_GTM_TOM_TGC_OUTEN_CTRL OUTEN_CTRL
78, TOM TGC0 Output Enable Control Register
Definition: IfxGtm_cfg.h:493
IfxGtm_Atom_6
ATOM object 6.
Definition: IfxGtm_cfg.h:251
IfxGtm_spe_indexMap
IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxGtm_spe_indexMap[IFXGTM_NUM_SPE_OBJECTS]
Table containing the address and index of SPE Objects.
Definition: IfxGtm_cfg.h:513
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxGtm_Tim_Ch_5
TIM channel 5.
Definition: IfxGtm_cfg.h:410
IfxGtm_Tom_Ch_3
TOM channel 3.
Definition: IfxGtm_cfg.h:434
IfxGtm_Tom_Ch_13
TOM channel 13.
Definition: IfxGtm_cfg.h:444
IfxGtm_Tom_TGC
TOM TGC objects.
Definition: IfxGtm_cfg.h:483
IfxGtm_FeatureControl_disable
disable
Definition: IfxGtm_cfg.h:337
IfxGtm_Tom_TGC::OUTEN_STAT
Ifx_GTM_TOM_TGC_OUTEN_STAT OUTEN_STAT
7C, TOM TGC0 Output Enable Status Register
Definition: IfxGtm_cfg.h:494
IfxGtm_Tom_Ch_1
TOM channel 1.
Definition: IfxGtm_cfg.h:432
IfxGtm_Tom_4
TOM object 4.
Definition: IfxGtm_cfg.h:423
IfxGtm_Atom_Ch_6
ATOM channel 6.
Definition: IfxGtm_cfg.h:267
IfxGtm_FeatureControl_enabled
enabled
Definition: IfxGtm_cfg.h:339
IfxGtm_Spe_1
SPE 1.
Definition: IfxGtm_cfg.h:347
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxGtm_Spe_2
SPE 2.
Definition: IfxGtm_cfg.h:348
IfxGtm_Atom_Ch_2
ATOM channel 2.
Definition: IfxGtm_cfg.h:263
IfxGtm_Tom_TGC::ENDIS_STAT
Ifx_GTM_TOM_TGC_ENDIS_STAT ENDIS_STAT
74, TOM TGC0 Enable/Disable Status Register
Definition: IfxGtm_cfg.h:492
IfxGtm_Spe_3
SPE 3.
Definition: IfxGtm_cfg.h:349
IfxGtm_Tim_1
TIM object 1.
Definition: IfxGtm_cfg.h:393
IfxGtm_Spe_TriggerSource_tomCh0Ccu1
select TOM channl 0 CCU1 as trigger
Definition: IfxGtm_cfg.h:380
IfxGtm_Cluster_4
GTM cluster 4.
Definition: IfxGtm_cfg.h:293
IfxGtm_Spe_TimInput_spe0Tim1Ch0to2
SPE0: Select TIM 1 Channel 0 to 2.
Definition: IfxGtm_cfg.h:361
IfxGtm_Tom_Ch_6
TOM channel 6.
Definition: IfxGtm_cfg.h:437
IfxGtm_Dpll_SubInc
IfxGtm_Dpll_SubInc
Enum for Dpll subincrements.
Definition: IfxGtm_cfg.h:302
Ifx_GTM_TOM_TGC
volatile struct IfxGtm_Tom_TGC Ifx_GTM_TOM_TGC
Definition: IfxGtm_cfg.h:233
IfxGtm_Spe_TimInput_spe5Tim4Ch3to5
SPE5: Select TIM 4 Channel 3 to 5.
Definition: IfxGtm_cfg.h:370
IfxGtm_Psm_Fifo_0
PSM Fifo 0.
Definition: IfxGtm_cfg.h:471
IfxGtm_Cluster_6
GTM cluster 6.
Definition: IfxGtm_cfg.h:295
IfxGtm_Atom_4
ATOM object 4.
Definition: IfxGtm_cfg.h:249
IfxGtm_Tom_Ch_4
TOM channel 4.
Definition: IfxGtm_cfg.h:435
IfxGtm_Tom_Ch_none
Not Selected.
Definition: IfxGtm_cfg.h:430
IfxGtm_Tim_Ch_7
TIM channel 7.
Definition: IfxGtm_cfg.h:412
IfxGtm_FeatureControl_enable
enable
Definition: IfxGtm_cfg.h:338
IFXGTM_NUM_ATOM_OBJECTS
#define IFXGTM_NUM_ATOM_OBJECTS
Definition: IfxGtm_cfg.h:181
IfxGtm_Spe_TriggerSource
IfxGtm_Spe_TriggerSource
selects the source of trigger to control command output from SPE.
Definition: IfxGtm_cfg.h:376
IfxGtm_FeatureControl
IfxGtm_FeatureControl
Enum Enable disable feature control.
Definition: IfxGtm_cfg.h:334
IfxGtm_Atom_1
ATOM object 1.
Definition: IfxGtm_cfg.h:246
IfxGtm_Tim_Ch_6
TIM channel 6.
Definition: IfxGtm_cfg.h:411
IfxGtm_Tim_6
TIM object 6.
Definition: IfxGtm_cfg.h:398
IfxGtm_Tom_Ch_12
TOM channel 12.
Definition: IfxGtm_cfg.h:443
IfxGtm_Spe_TimInput_spe1Tim0Ch3to5
SPE1: select TIM 0 Channel 3 to 5.
Definition: IfxGtm_cfg.h:362
IfxGtm_Tim_5
TIM object 5.
Definition: IfxGtm_cfg.h:397
IfxGtm_Cluster_2
GTM cluster 2.
Definition: IfxGtm_cfg.h:291
IfxGtm_Spe_TimInput
IfxGtm_Spe_TimInput
Specifies the TIM inputs to the SPE submodule instances. Two possible input sources are present per S...
Definition: IfxGtm_cfg.h:358
IfxGtm_Cdtm_2
DTM object 2.
Definition: IfxGtm_cfg.h:278
IfxGtm_Atom_5
ATOM object 5.
Definition: IfxGtm_cfg.h:250
IfxGtm_Cluster
IfxGtm_Cluster
Enumeration listing the clusters of GTM.
Definition: IfxGtm_cfg.h:287
IfxGtm_Tim_Ch_3
TIM channel 3.
Definition: IfxGtm_cfg.h:408
IfxGtm_Tom_Ch_5
TOM channel 5.
Definition: IfxGtm_cfg.h:436
IFXGTM_NUM_SPE_OBJECTS
#define IFXGTM_NUM_SPE_OBJECTS
Number of Sensor Pattern Evaluation Modules.
Definition: IfxGtm_cfg.h:209
IfxGtm_Atom_Ch_3
ATOM channel 3.
Definition: IfxGtm_cfg.h:264
IfxGtm_Atom_Ch_1
ATOM channel 1.
Definition: IfxGtm_cfg.h:262
IfxGtm_Atom_3
ATOM object 3.
Definition: IfxGtm_cfg.h:248
IfxGtm_Cluster_0
GTM cluster 0.
Definition: IfxGtm_cfg.h:289
IfxGtm_Tim_3
TIM object 3.
Definition: IfxGtm_cfg.h:395
IfxGtm_Cluster_1
GTM cluster 1.
Definition: IfxGtm_cfg.h:290
IfxGtm_Tom_TGC::INT_TRIG
Ifx_GTM_TOM_TGC_INT_TRIG INT_TRIG
3C, TOM TGC0 Internal Trigger Control Register
Definition: IfxGtm_cfg.h:488
IFXGTM_NUM_TOM_OBJECTS
#define IFXGTM_NUM_TOM_OBJECTS
Definition: IfxGtm_cfg.h:183
IfxGtm_Dtm_Ch_0
DTM object 0.
Definition: IfxGtm_cfg.h:326
IfxGtm_Cdtm_0
DTM object 0.
Definition: IfxGtm_cfg.h:276
IfxGtm_Dtm_Ch
IfxGtm_Dtm_Ch
Enum for DTM channels.
Definition: IfxGtm_cfg.h:323
IfxGtm_Spe_TriggerSource_tomCh2Ccu1
select TOM channl 2 CCU1 as trigger
Definition: IfxGtm_cfg.h:381
IfxGtm_Spe_TriggerSource_tomCh9Ccu1
select TOM channl 9 CCU1 as trigger
Definition: IfxGtm_cfg.h:385
IfxGtm_Tom_Ch_0
TOM channel 0.
Definition: IfxGtm_cfg.h:431
IfxGtm_Cdtm_5
DTM object 5.
Definition: IfxGtm_cfg.h:281
IfxGtm_Atom_0
ATOM object 0.
Definition: IfxGtm_cfg.h:245
IfxGtm_Dtm_3
DTM object 3.
Definition: IfxGtm_cfg.h:316
IfxGtm_Psm_Fifo_1
PSM Fifo 1.
Definition: IfxGtm_cfg.h:472
IfxGtm_Tom
IfxGtm_Tom
Enum for TOM objects.
Definition: IfxGtm_cfg.h:417
IfxGtm_Tim_4
TIM object 4.
Definition: IfxGtm_cfg.h:396
IfxGtm_Psm_F2a_0
PSM F2a 0.
Definition: IfxGtm_cfg.h:463
IfxGtm_Atom_Ch_none
Not Selected.
Definition: IfxGtm_cfg.h:260
IfxGtm_Dpll_SubInc_2
subincrement2
Definition: IfxGtm_cfg.h:305
IfxGtm_Tom_Ch_11
TOM channel 11.
Definition: IfxGtm_cfg.h:442
IfxGtm_Tom_3
TOM object 3.
Definition: IfxGtm_cfg.h:422
IfxGtm_Tom_TGC::GLB_CTRL
Ifx_GTM_TOM_TGC_GLB_CTRL GLB_CTRL
30, TOM TGC0 Global Control Register
Definition: IfxGtm_cfg.h:485
IfxGtm_Tom_TGC::ENDIS_CTRL
Ifx_GTM_TOM_TGC_ENDIS_CTRL ENDIS_CTRL
70, TOM TGC0 Enable/Disable Control Register
Definition: IfxGtm_cfg.h:491
IfxGtm_Cdtm_3
DTM object 3.
Definition: IfxGtm_cfg.h:279
IfxGtm_Tom_0
TOM object 0.
Definition: IfxGtm_cfg.h:419
IfxGtm_Atom_Ch_7
ATOM channel 7.
Definition: IfxGtm_cfg.h:268
IfxGtm_Spe_TimInput_spe3Tim3Ch3to5
SPE3: Select TIM 3 Channel 3 to 5.
Definition: IfxGtm_cfg.h:367
IfxGtm_Cluster_8
GTM cluster 8.
Definition: IfxGtm_cfg.h:297
IfxGtm_Tom_Tgc_1
TOM global channel control unit1.
Definition: IfxGtm_cfg.h:454
IfxGtm_Tim_Ch_1
TIM channel 1.
Definition: IfxGtm_cfg.h:406
IfxGtm_Tom_Ch_7
TOM channel 7.
Definition: IfxGtm_cfg.h:438
IfxGtm_Tom_Ch_8
TOM channel 8.
Definition: IfxGtm_cfg.h:439
IfxGtm_Tim_Ch
IfxGtm_Tim_Ch
Enum for TIM channels.
Definition: IfxGtm_cfg.h:403
IfxGtm_Cdtm_none
No DTM object.
Definition: IfxGtm_cfg.h:275
IfxGtm_Tom_Tgc
IfxGtm_Tom_Tgc
Enum for TOM global channel control units.
Definition: IfxGtm_cfg.h:451
IfxGtm_Cdtm
IfxGtm_Cdtm
Enum for CDTM objects.
Definition: IfxGtm_cfg.h:273
IfxGtm_Spe_TriggerSource_tomCh0Ccu0
select TOM channl 0 CCU0 as trigger
Definition: IfxGtm_cfg.h:379
IfxGtm_Spe_TimInput_spe3Tim2Ch3to5
SPE3: Select TIM 2 Channel 3 to 5.
Definition: IfxGtm_cfg.h:366
IfxGtm_Tom_Ch_2
TOM channel 2.
Definition: IfxGtm_cfg.h:433
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:140
IfxGtm_Dtm
IfxGtm_Dtm
Enum for DTM objects.
Definition: IfxGtm_cfg.h:310
IfxGtm_Atom_8
ATOM object 8.
Definition: IfxGtm_cfg.h:253
IfxGtm_Tim_Ch_4
TIM channel 4.
Definition: IfxGtm_cfg.h:409
IfxGtm_Tim_Ch_2
TIM channel 2.
Definition: IfxGtm_cfg.h:407
IfxGtm_Dtm_5
DTM object 5.
Definition: IfxGtm_cfg.h:318
IfxGtm_Tom_2
TOM object 2.
Definition: IfxGtm_cfg.h:421
IfxGtm_Tom_TGC::ACT_TB
Ifx_GTM_TOM_TGC_ACT_TB ACT_TB
34, TOM TGC0 Action Time Base Register
Definition: IfxGtm_cfg.h:486
IfxGtm_Spe_TriggerSource_tomCh6Ccu1
select TOM channl 6 CCU1 as trigger
Definition: IfxGtm_cfg.h:382
IfxGtm_Atom_Ch_5
ATOM channel 5.
Definition: IfxGtm_cfg.h:266
IfxGtm_Tom_Ch_15
TOM channel 15.
Definition: IfxGtm_cfg.h:446
IfxGtm_Tom_Ch_14
TOM channel 14.
Definition: IfxGtm_cfg.h:445
IfxGtm_Atom_Ch
IfxGtm_Atom_Ch
Enum for ATOM channels.
Definition: IfxGtm_cfg.h:258
IfxGtm_Tom_TGC::xxxCH1
Ifx_GTM_TOM_CH xxxCH1
Definition: IfxGtm_cfg.h:489
IfxPort.h
PORT basic functionality.
IfxGtm_Cluster_7
GTM cluster 7.
Definition: IfxGtm_cfg.h:296
IfxGtm_Dtm_2
DTM object 2.
Definition: IfxGtm_cfg.h:315


iLLD_TC38A: IfxHssl.c Source File

  • Hssl
  • Std
IfxHssl.c
Go to the documentation of this file.
1 /**
2 * \file IfxHssl.c
3 * \brief HSSL basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 *
41 */
42
43 /******************************************************************************/
44 /*----------------------------------Includes----------------------------------*/
45 /******************************************************************************/
46
47 #include "IfxHssl.h"
48
49 /******************************************************************************/
50 /*-------------------------Function Implementations---------------------------*/
51 /******************************************************************************/
52
53 void IfxHssl_disableHsctModule(Ifx_HSCT *hsct)
54 {
55 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
56 IfxScuWdt_clearCpuEndinit(psw); /* clears the endinit protection */
57 hsct->CLC.B.DISR = 1; /* disables the module */
58 IfxScuWdt_setCpuEndinit(psw); /* sets the endinit protection back on */
59 }
60
61
62 void IfxHssl_disableHsslModule(Ifx_HSSL *hssl)
63 {
64 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
65 IfxScuWdt_clearCpuEndinit(psw); /* clears the endinit protection */
66 hssl->CLC.B.DISR = 1; /* disables the module */
67 IfxScuWdt_setCpuEndinit(psw); /* sets the endinit protection back on */
68 }
69
70
71 void IfxHssl_enableHsctModule(Ifx_HSCT *hsct)
72 {
73 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
74 IfxScuWdt_clearCpuEndinit(psw); /* clears the endinit protection */
75 hsct->CLC.B.DISR = 0; /* enables the module */
76 IfxScuWdt_setCpuEndinit(psw); /* sets the endinit protection back on */
77 }
78
79
80 void IfxHssl_enableHsslModule(Ifx_HSSL *hssl)
81 {
82 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
83 IfxScuWdt_clearCpuEndinit(psw); /* clears the endinit protection */
84 hssl->CLC.B.DISR = 0; /* enables the module */
85 IfxScuWdt_setCpuEndinit(psw); /* sets the endinit protection back on */
86 }
87
88
89 Ifx_HSCT *IfxHssl_getHsctAddress(IfxHssl_hsctIndex hsct)
90 {
91 Ifx_HSCT *module;
92
93 if (hsct < IFXHSSL_NUM_MODULES)
94 {
95 module = (Ifx_HSCT *)IfxHssl_cfg_hsctIndexMap[hsct].module;
96 }
97 else
98 {
99 module = NULL_PTR;
100 }
101
102 return module;
103 }
104
105
106 IfxHssl_hsctIndex IfxHssl_getHsctIndex(Ifx_HSCT *hsct)
107 {
108 uint32 index;
109 IfxHssl_hsctIndex result;
110
111 result = IfxHssl_hsctIndex_none;
112
113 for (index = 0; index < IFXHSSL_NUM_MODULES; index++)
114 {
115 if (IfxHssl_cfg_hsctIndexMap[index].module == hsct)
116 {
117 result = (IfxHssl_hsctIndex)IfxHssl_cfg_hsctIndexMap[index].index;
118 break;
119 }
120 }
121
122 return result;
123 }
124
125
126 volatile Ifx_SRC_SRCR *IfxHssl_getHsctSrcPointer(Ifx_HSCT *hsct)
127 {
128 IFX_UNUSED_PARAMETER(hsct);
129 return &MODULE_SRC.HSCT.HSCT[0].SR;
130 }
131
132
133 Ifx_HSSL *IfxHssl_getHsslAddress(IfxHssl_hsslIndex hssl)
134 {
135 Ifx_HSSL *module;
136
137 if (hssl < IFXHSSL_NUM_MODULES)
138 {
139 module = (Ifx_HSSL *)IfxHssl_cfg_hsslIndexMap[hssl].module;
140 }
141 else
142 {
143 module = NULL_PTR;
144 }
145
146 return module;
147 }
148
149
150 volatile Ifx_SRC_SRCR *IfxHssl_getHsslCOKSrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
151 {
152 IFX_UNUSED_PARAMETER(hssl);
153 return &MODULE_SRC.HSSL.HSSL[0].CH[(uint32)channelId].COK;
154 }
155
156
157 volatile Ifx_SRC_SRCR *IfxHssl_getHsslERRSrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
158 {
159 IFX_UNUSED_PARAMETER(hssl);
160 return &MODULE_SRC.HSSL.HSSL[0].CH[(uint32)channelId].ERR;
161 }
162
163
164 volatile Ifx_SRC_SRCR *IfxHssl_getHsslEXISrcPointer(Ifx_HSSL *hssl)
165 {
166 IFX_UNUSED_PARAMETER(hssl);
167 return &MODULE_SRC.HSSL.HSSL[0].EXI;
168 }
169
170
171 IfxHssl_hsslIndex IfxHssl_getHsslIndex(Ifx_HSSL *hssl)
172 {
173 uint32 index;
174 IfxHssl_hsslIndex result;
175
176 result = IfxHssl_hsslIndex_none;
177
178 for (index = 0; index < IFXHSSL_NUM_MODULES; index++)
179 {
180 if (IfxHssl_cfg_hsslIndexMap[index].module == hssl)
181 {
182 result = (IfxHssl_hsslIndex)IfxHssl_cfg_hsslIndexMap[index].index;
183 break;
184 }
185 }
186
187 return result;
188 }
189
190
191 volatile Ifx_SRC_SRCR *IfxHssl_getHsslRDISrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
192 {
193 IFX_UNUSED_PARAMETER(hssl);
194 return &MODULE_SRC.HSSL.HSSL[0].CH[(uint32)channelId].RDI;
195 }
196
197
198 volatile Ifx_SRC_SRCR *IfxHssl_getHsslTRGSrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
199 {
200 IFX_UNUSED_PARAMETER(hssl);
201 return &MODULE_SRC.HSSL.HSSL[0].CH[(uint32)channelId].TRG;
202 }
203
204
205 void IfxHssl_resetHsctKernel(Ifx_HSCT *hsct)
206 {
207 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
208
209 IfxScuWdt_clearCpuEndinit(passwd);
210 hsct->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
211 hsct->KRST1.B.RST = 1;
212 IfxScuWdt_setCpuEndinit(passwd);
213
214 while (0 == hsct->KRST0.B.RSTSTAT) /* Wait until reset is executed */
215
216 {}
217
218 IfxScuWdt_clearCpuEndinit(passwd);
219 hsct->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
220 IfxScuWdt_setCpuEndinit(passwd);
221 }
222
223
224 void IfxHssl_resetHsslKernel(Ifx_HSSL *hssl)
225 {
226 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
227
228 IfxScuWdt_clearCpuEndinit(passwd);
229 hssl->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
230 hssl->KRST1.B.RST = 1;
231 IfxScuWdt_setCpuEndinit(passwd);
232
233 while (0 == hssl->KRST0.B.RSTSTAT) /* Wait until reset is executed */
234
235 {}
236
237 IfxScuWdt_clearCpuEndinit(passwd);
238 hssl->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
239 IfxScuWdt_setCpuEndinit(passwd);
240 }
IfxHssl_ChannelId
IfxHssl_ChannelId
channel selection
Definition: IfxHssl.h:74
IfxHssl_resetHsslKernel
void IfxHssl_resetHsslKernel(Ifx_HSSL *hssl)
resets the HSSL kernel
Definition: IfxHssl.c:224
IfxHssl_hsslIndex_none
Not Selected.
Definition: IfxHssl_cfg.h:90
IfxHssl_hsctIndex_none
Not Selected.
Definition: IfxHssl_cfg.h:82
IfxHssl_resetHsctKernel
void IfxHssl_resetHsctKernel(Ifx_HSCT *hsct)
resets HSCT kernel
Definition: IfxHssl.c:205
IfxHssl_enableHsslModule
void IfxHssl_enableHsslModule(Ifx_HSSL *hssl)
Enables the hssl module.
Definition: IfxHssl.c:80
IfxHssl_hsslIndex
IfxHssl_hsslIndex
List of the available Hssl resources.
Definition: IfxHssl_cfg.h:88
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxHssl_getHsslIndex
IfxHssl_hsslIndex IfxHssl_getHsslIndex(Ifx_HSSL *hssl)
API to get the resource index of the HSSL specified.
Definition: IfxHssl.c:171
IfxHssl_getHsctSrcPointer
volatile Ifx_SRC_SRCR * IfxHssl_getHsctSrcPointer(Ifx_HSCT *hsct)
Returns the SRC pointer for HSCT.
Definition: IfxHssl.c:126
IfxHssl_enableHsctModule
void IfxHssl_enableHsctModule(Ifx_HSCT *hsct)
Enables hsct module.
Definition: IfxHssl.c:71
IfxHssl_getHsslTRGSrcPointer
volatile Ifx_SRC_SRCR * IfxHssl_getHsslTRGSrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL TRG of specified channel.
Definition: IfxHssl.c:198
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxHssl_getHsctAddress
Ifx_HSCT * IfxHssl_getHsctAddress(IfxHssl_hsctIndex hsct)
Definition: IfxHssl.c:89
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxHssl_getHsslAddress
Ifx_HSSL * IfxHssl_getHsslAddress(IfxHssl_hsslIndex hssl)
Definition: IfxHssl.c:133
IfxHssl_getHsslEXISrcPointer
volatile Ifx_SRC_SRCR * IfxHssl_getHsslEXISrcPointer(Ifx_HSSL *hssl)
Returns the SRC pointer for HSSL EXI interrupt.
Definition: IfxHssl.c:164
IfxHssl_getHsslRDISrcPointer
volatile Ifx_SRC_SRCR * IfxHssl_getHsslRDISrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL COK of specified channel.
Definition: IfxHssl.c:191
IfxHssl_disableHsctModule
void IfxHssl_disableHsctModule(Ifx_HSCT *hsct)
Disables hsct module.
Definition: IfxHssl.c:53
IFXHSSL_NUM_MODULES
#define IFXHSSL_NUM_MODULES
Definition: IfxHssl_cfg.h:68
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxHssl_getHsctIndex
IfxHssl_hsctIndex IfxHssl_getHsctIndex(Ifx_HSCT *hsct)
API to get the resource index of the HSCT specified.
Definition: IfxHssl.c:106
IfxHssl_cfg_hsctIndexMap
IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsctIndexMap[IFXHSSL_NUM_MODULES]
Definition: IfxHssl_cfg.c:52
IfxHssl_getHsslCOKSrcPointer
volatile Ifx_SRC_SRCR * IfxHssl_getHsslCOKSrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL COK of specified channel.
Definition: IfxHssl.c:150
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxHssl_getHsslERRSrcPointer
volatile Ifx_SRC_SRCR * IfxHssl_getHsslERRSrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL ERR of specified channel.
Definition: IfxHssl.c:157
IfxHssl_disableHsslModule
void IfxHssl_disableHsslModule(Ifx_HSSL *hssl)
DIsables the hssl module.
Definition: IfxHssl.c:62
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
IfxHssl.h
HSSL basic functionality.
IfxHssl_cfg_hsslIndexMap
IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsslIndexMap[IFXHSSL_NUM_MODULES]
Definition: IfxHssl_cfg.c:56
IfxHssl_hsctIndex
IfxHssl_hsctIndex
List of the available Hsct resources.
Definition: IfxHssl_cfg.h:80


iLLD_TC38A: IfxHssl.h Source File

  • Hssl
  • Std
IfxHssl.h
Go to the documentation of this file.
1 /**
2 * \file IfxHssl.h
3 * \brief HSSL basic functionality
4 * \ingroup IfxLld_Hssl
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 * \defgroup IfxLld_Hssl_Std_Enumerations Enumerations
43 * \ingroup IfxLld_Hssl_Std
44 * \defgroup IfxLld_Hssl_Std_HsctFunctions Hsct Functions
45 * \ingroup IfxLld_Hssl_Std
46 * \defgroup IfxLld_Hssl_Std_Structures Data Structures
47 * \ingroup IfxLld_Hssl_Std
48 * \defgroup IfxLld_Hssl_Std_HsslFunctions Hssl Functions
49 * \ingroup IfxLld_Hssl_Std
50 */
51
52 #ifndef IFXHSSL_H
53 #define IFXHSSL_H 1
54
55 /******************************************************************************/
56 /*----------------------------------Includes----------------------------------*/
57 /******************************************************************************/
58
59 #include "_Impl/IfxHssl_cfg.h"
60 #include "Cpu/Std/IfxCpu_Intrinsics.h"
61 #include "Scu/Std/IfxScuWdt.h"
62 #include "IfxHssl_bf.h"
63 #include "IfxHsct_bf.h"
64 #include "Src/Std/IfxSrc.h"
65
66 /******************************************************************************/
67 /*--------------------------------Enumerations--------------------------------*/
68 /******************************************************************************/
69
70 /** \addtogroup IfxLld_Hssl_Std_Enumerations
71 * \{ */
72 /** \brief channel selection
73 */
74 typedef enum
75 {
76 IfxHssl_ChannelId_0, /**< \brief Channel 0 */
77 IfxHssl_ChannelId_1, /**< \brief Channel 1 */
78 IfxHssl_ChannelId_2, /**< \brief Channel 2 */
79 IfxHssl_ChannelId_3 /**< \brief Channel 3 */
80 } IfxHssl_ChannelId;
81
82 /** \brief communication command selection
83 * Definition in Ifx_HSSL.I.ICON.B.RWT
84 */
85 typedef enum
86 {
87 IfxHssl_Command_noAction = 0, /**< \brief command no action */
88 IfxHssl_Command_readFrame = 1, /**< \brief command read frame */
89 IfxHssl_Command_writeFrame = 2, /**< \brief command write frame */
90 IfxHssl_Command_triggerFrame = 3 /**< \brief command trigger frame */
91 } IfxHssl_Command;
92
93 /** \brief predefined control command payload values
94 */
95 typedef enum
96 {
97 IfxHssl_ControlCommand_ping = 0, /**< \brief ping (send by master. Slave sends back a fixed 32-bit payload result.) */
98 IfxHssl_ControlCommand_highSpeedClockStart = 2, /**< \brief slave interface clock multiplier start (in preparation for high speed mode) */
99 IfxHssl_ControlCommand_highSpeedClockStop = 4, /**< \brief slave interface clock multiplier stop (after fallback from high speed mode) */
100 IfxHssl_ControlCommand_lowSpeedTransmission = 8, /**< \brief select low speed mode for transfers from the Master to the Slave */
101 IfxHssl_ControlCommand_highSpeedTransmission = 16, /**< \brief select high speed mode for transfers from the Master to the Slave */
102 IfxHssl_ControlCommand_lowSpeedReception = 32, /**< \brief select low speed mode for transfers from the Slave to the Master */
103 IfxHssl_ControlCommand_mediumSpeedReception = 64, /**< \brief select medium speed mode for transfers from the Slave to the master */
104 IfxHssl_ControlCommand_highSpeedReception = 128, /**< \brief select high speed mode for transfers from the Slave to the master */
105 IfxHssl_ControlCommand_enableReception = 49, /**< \brief enable Slave interface transmitter */
106 IfxHssl_ControlCommand_disableReception = 50, /**< \brief disable Slave interface transmitter */
107 IfxHssl_ControlCommand_turnOnClockTestMode = 52, /**< \brief turn on clock test mode */
108 IfxHssl_ControlCommand_turnOffClockTestMode = 56, /**< \brief turn off clock test mode */
109 IfxHssl_ControlCommand_turnOnPayloadLoopback = 255 /**< \brief turn on payload loopback */
110 } IfxHssl_ControlCommand;
111
112 /** \brief Defines the length of the data in bits of the write and read command.
113 * Definition in Ifx_HSSL.I.ICON.B.DATLEN
114 */
115 typedef enum
116 {
117 IfxHssl_DataLength_8bit = 0, /**< \brief 8 bit */
118 IfxHssl_DataLength_16bit = 1, /**< \brief 16 bit */
119 IfxHssl_DataLength_32bit = 2 /**< \brief 32 bit */
120 } IfxHssl_DataLength;
121
122 /** \brief HSCT interrupt source
123 * Definition in Ifx_HSCT.IRQ
124 */
125 typedef enum
126 {
127 IfxHssl_Hsct_InterruptSource_headerError = IFX_HSCT_IRQ_HER_OFF, /**< \brief Header error detected */
128 IfxHssl_Hsct_InterruptSource_payloadError = IFX_HSCT_IRQ_PYER_OFF, /**< \brief Payload error detected */
129 IfxHssl_Hsct_InterruptSource_commandError = IFX_HSCT_IRQ_CER_OFF, /**< \brief HSCT Command error */
130 IfxHssl_Hsct_InterruptSource_interfaceControlFrameSend = IFX_HSCT_IRQ_IFCFS_OFF, /**< \brief Interface control frame send */
131 IfxHssl_Hsct_InterruptSource_speedModeSwitchError = IFX_HSCT_IRQ_SMER_OFF, /**< \brief Speed mode switch error */
132 IfxHssl_Hsct_InterruptSource_unsolicitedMessageSendFinished = IFX_HSCT_IRQ_USMSF_OFF, /**< \brief Unsolicited message frame send finished */
133 IfxHssl_Hsct_InterruptSource_pllLockLosterror = IFX_HSCT_IRQ_PLER_OFF, /**< \brief Pll lock lost error */
134 IfxHssl_Hsct_InterruptSource_UnsolicitedMessageReceived = IFX_HSCT_IRQ_USM_OFF, /**< \brief Unsolicited message received */
135 IfxHssl_Hsct_InterruptSource_pingAnswerReceived = IFX_HSCT_IRQ_PAR_OFF, /**< \brief PING Answer Received */
136 IfxHssl_Hsct_InterruptSource_txTransferError = IFX_HSCT_IRQ_TXTE_OFF, /**< \brief TX transfer error occurred on a disabled
137 * TX channel */
138 IfxHssl_Hsct_InterruptSource_synchronizationFifoOverflow = IFX_HSCT_IRQ_SFO_OFF, /**< \brief Synchronization FIFO overflow (in RX
139 * direction) */
140 IfxHssl_Hsct_InterruptSource_synchronizationFifoUnderflow = IFX_HSCT_IRQ_SFU_OFF /**< \brief Synchronization FIFO underflow (in TX
141 * direction) */
142 } IfxHssl_Hsct_InterruptSource;
143
144 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
145 * Definition in Ifx_HSCT.CLC.B.EDIS
146 */
147 typedef enum
148 {
149 IfxHssl_Hsct_SleepMode_enable = 0, /**< \brief enables sleep mode */
150 IfxHssl_Hsct_SleepMode_disable = 1 /**< \brief disables sleep mode */
151 } IfxHssl_Hsct_SleepMode;
152
153 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
154 * Definition in Ifx_HSSL.CLC.B.EDIS
155 */
156 typedef enum
157 {
158 IfxHssl_Hssl_SleepMode_enable = 0, /**< \brief enables sleep mode */
159 IfxHssl_Hssl_SleepMode_disable = 1 /**< \brief disables sleep mode */
160 } IfxHssl_Hssl_SleepMode;
161
162 /** \brief interface mode (master IF /slave IF)
163 * Definition in Ifx_HSCT.INIT.B.IFM
164 */
165 typedef enum
166 {
167 IfxHssl_InterfaceMode_master = 0, /**< \brief master IF mode */
168 IfxHssl_InterfaceMode_slave = 1 /**< \brief slave IF mode */
169 } IfxHssl_InterfaceMode;
170
171 /** \brief master mode receive speed
172 * Definition in Ifx_HSCT.IFCTRL.B.MRXSPEED
173 */
174 typedef enum
175 {
176 IfxHssl_MasterModeRxSpeed_lowSpeed = 0, /**< \brief low speed */
177 IfxHssl_MasterModeRxSpeed_mediumSpeed = 1, /**< \brief medium speed */
178 IfxHssl_MasterModeRxSpeed_highSpeed = 2 /**< \brief high speed */
179 } IfxHssl_MasterModeRxSpeed;
180
181 /** \brief master mode transmit speed
182 * Definition in Ifx_HSCT.IFCTRL.B.MTXSPEED
183 */
184 typedef enum
185 {
186 IfxHssl_MasterModeTxSpeed_lowSpeed = 0, /**< \brief low speed */
187 IfxHssl_MasterModeTxSpeed_highSpeed = 2 /**< \brief high speed */
188 } IfxHssl_MasterModeTxSpeed;
189
190 /** \brief PLL reference clock
191 * Definition in Ifx_HSCT.CONFIGPHY.B.OSCCLKEN
192 */
193 typedef enum
194 {
195 IfxHssl_PllReferenceClock_hsctSystemClockInput = 0, /**< \brief hsct system clock input (HSCT SysClk_i) */
196 IfxHssl_PllReferenceClock_oscillatorInput = 1 /**< \brief oscillator input */
197 } IfxHssl_PllReferenceClock;
198
199 /** \brief SysClk / Reference Clock Frequency rate
200 * Definition in Ifx_HSCT.INIT.B.SRCF
201 */
202 typedef enum
203 {
204 IfxHssl_RefClockFrequency_10Mhz = 0, /**< \brief SysClk/ RefClk is 10 MHz */
205 IfxHssl_RefClockFrequency_20Mhz = 1, /**< \brief SysClk/ RefClk is 20 MHz */
206 IfxHssl_RefClockFrequency_40Mhz = 2 /**< \brief SysClk/ RefClk is 40 MHz */
207 } IfxHssl_RefClockFrequency;
208
209 /** \brief streaming mode ( single / continuous )
210 * Definition in Ifx_HSSL.CFG.B.SMT/SMR
211 */
212 typedef enum
213 {
214 IfxHssl_StreamingMode_continuous = 0, /**< \brief streaming mode continuous (with two memory blocks) */
215 IfxHssl_StreamingMode_single = 1 /**< \brief streaming mode single (with one memory block) */
216 } IfxHssl_StreamingMode;
217
218 /** \brief OCDS Suspend Control (OCDS.SUS)
219 */
220 typedef enum
221 {
222 IfxHssl_SuspendMode_none = 0, /**< \brief No suspend */
223 IfxHssl_SuspendMode_hard = 1, /**< \brief Hard Suspend */
224 IfxHssl_SuspendMode_soft = 2 /**< \brief Soft Suspend */
225 } IfxHssl_SuspendMode;
226
227 /** \brief SysClk divider
228 * Definition in Ifx_HSCT.INIT.B.SSCF
229 */
230 typedef enum
231 {
232 IfxHssl_SysClockDivider_1 = 0, /**< \brief SysClk Divider 1/1 */
233 IfxHssl_SysClockDivider_2 = 1, /**< \brief SysClk Divider 1/2 */
234 IfxHssl_SysClockDivider_4 = 2 /**< \brief SysClk Divider 1/4 */
235 } IfxHssl_SysClockDivider;
236
237 /** \} */
238
239 /** \brief HSSL channel error interrupt source, which triggers the ERR interrupt
240 * Definition in Ifx_HSSL.MFLAGS
241 */
242 typedef enum
243 {
244 IfxHssl_Hssl_ERRInterruptSource_notAcknowledgeError = IFX_HSSL_MFLAGS_NACK_OFF, /**< \brief NACK error (triggers ERR interrupt) */
245 IfxHssl_Hssl_ERRInterruptSource_transactionTagError = IFX_HSSL_MFLAGS_TTE_OFF, /**< \brief Transaction Tag Error (triggers ERR interrupt) */
246 IfxHssl_Hssl_ERRInterruptSource_timeoutError = IFX_HSSL_MFLAGS_TIMEOUT_OFF, /**< \brief Timeout error (triggers ERR interrupt) */
247 IfxHssl_Hssl_ERRInterruptSource_unexpectedError = IFX_HSSL_MFLAGS_UNEXPECTED_OFF /**< \brief Unexpected error (triggers ERR interrupt) */
248 } IfxHssl_Hssl_ERRInterruptSource;
249
250 /** \brief HSSL global error interrupt source, which triggers the EXI interrupt
251 * Definition in Ifx_HSSL.MFLAGS
252 */
253 typedef enum
254 {
255 IfxHssl_Hssl_EXIInterruptSource_memoryAccessViolation = IFX_HSSL_MFLAGS_MAV_OFF, /**< \brief Memory Access Violation error (triggers EXI interrupt) */
256 IfxHssl_Hssl_EXIInterruptSource_busAccessError = IFX_HSSL_MFLAGS_SRIE_OFF, /**< \brief SRI/SPB Bus Access Error (triggers EXI interrupt) */
257 IfxHssl_Hssl_EXIInterruptSource_channelNumberCodeError = IFX_HSSL_MFLAGS_PIE1_OFF, /**< \brief PHY Inconsistency Error 1 (Channel Number
258 * Code Error, triggers EXI interrupt) */
259 IfxHssl_Hssl_EXIInterruptSource_dataLengthError = IFX_HSSL_MFLAGS_PIE2_OFF, /**< \brief PHY Inconsistency Error 2 (Data Length Error, triggers EXI interrupt) */
260 IfxHssl_Hssl_EXIInterruptSource_crcError = IFX_HSSL_MFLAGS_CRCE_OFF /**< \brief CRC error (triggers EXI interrupt) */
261 } IfxHssl_Hssl_EXIInterruptSource;
262
263 /******************************************************************************/
264 /*-----------------------------Data Structures--------------------------------*/
265 /******************************************************************************/
266
267 /** \addtogroup IfxLld_Hssl_Std_Structures
268 * \{ */
269 /** \brief HSCT module handle
270 */
271 typedef struct
272 {
273 Ifx_HSCT *hsct; /**< \brief pointer to HSCT registers */
274 boolean loopBack; /**< \brief loopc back selection */
275 } IfxHssl_Hsct;
276
277 /** \brief Configuration structure of the HSCT module
278 */
279 typedef struct
280 {
281 Ifx_HSCT *hsct; /**< \brief pointer to HSCT registers */
282 IfxHssl_InterfaceMode interfaceMode; /**< \brief interface mode (master IF /slave IF) */
283 boolean highSpeedMode; /**< \brief high speed mode selection */
284 boolean loopBack; /**< \brief loopc back selection */
285 } IfxHssl_Hsct_Config;
286
287 /** \} */
288
289 /** \addtogroup IfxLld_Hssl_Std_HsctFunctions
290 * \{ */
291
292 /******************************************************************************/
293 /*-------------------------Inline Function Prototypes-------------------------*/
294 /******************************************************************************/
295
296 /** \brief Clears the HSCT interrupt flag
297 * \param hsct pointer to HSCT registers
298 * \param source HSCT interrupt source
299 * \return None
300 */
301 IFX_INLINE void IfxHssl_clearHsctInterruptFlag(Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source);
302
303 /** \brief Enables HSCT interrupt flag
304 * \param hsct pointer to HSCT registers
305 * \param source HSCT interrupt source
306 * \return None
307 */
308 IFX_INLINE void IfxHssl_disableHsctInterruptFlag(Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source);
309
310 /** \brief Enables HSCT interrupt
311 * \param hsct pointer to HSCT registers
312 * \param typeOfService Type of Service (Cpu or DMA)
313 * \param priority Priority of the interrupt
314 * \return None
315 */
316 IFX_INLINE void IfxHssl_enableHsctInterrupt(Ifx_HSCT *hsct, IfxSrc_Tos typeOfService, uint16 priority);
317
318 /** \brief Enables HSCT interrupt flag
319 * \param hsct pointer to HSCT registers
320 * \param source HSCT interrupt source
321 * \return None
322 */
323 IFX_INLINE void IfxHssl_enableHsctInterruptFlag(Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source);
324
325 /** \brief Enables HSCT LVDS loopback
326 * \param hsct pointer to HSCT registers
327 * \return None
328 */
329 IFX_INLINE void IfxHssl_enableHsctLvdsLoopback(Ifx_HSCT *hsct);
330
331 /** \brief Returns the HSCT interrupt flag status
332 * \param hsct pointer to HSCT registers
333 * \param source HSCT interrupt source
334 * \return Status (TRUE / FALSE)
335 */
336 IFX_INLINE boolean IfxHssl_getHsctInterruptFlagStatus(Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source);
337
338 /** \brief Sets the sensitivity of the module to sleep signal
339 * \param hsct pointer to HSCT registers
340 * \param mode mode selection (enable/disable)
341 * \return None
342 */
343 IFX_INLINE void IfxHssl_setHsctSleepMode(Ifx_HSCT *hsct, IfxHssl_Hsct_SleepMode mode);
344
345 /** \brief Get the last received unsolicited status message
346 * \param hsct pointer to HSCT registers
347 * \return Get the unsolicited status message.
348 */
349 IFX_INLINE uint32 IfxHssl_getHsctUnsolicitedStatusMessage(Ifx_HSCT *hsct);
350
351 /** \brief Send the unsolicited status message
352 * \param hsct pointer to HSCT registers
353 * \param message Unsolicited status message to be sent
354 * \return None
355 */
356 IFX_INLINE void IfxHssl_sendHsctUnsolicitedStatusMessage(Ifx_HSCT *hsct, uint32 message);
357
358 /** \brief Set the HSCT RX link speed
359 * \param hsct pointer to HSCT registers
360 * \param rxSpeed Speed for Rx link
361 * \return None
362 */
363 IFX_INLINE void IfxHssl_setHsctRxLinkSpeed(Ifx_HSCT *hsct, IfxHssl_MasterModeRxSpeed rxSpeed);
364
365 /** \brief Set the HSCT TX link speed
366 * \param hsct pointer to HSCT registers
367 * \param txSpeed Speed for Tx link
368 * \return None
369 */
370 IFX_INLINE void IfxHssl_setHsctTxLinkSpeed(Ifx_HSCT *hsct, IfxHssl_MasterModeTxSpeed txSpeed);
371
372 /** \brief Enable hsct transmit path in master interface
373 * \param hsct pointer to HSCT registers
374 * \return None
375 */
376 IFX_INLINE void IfxHssl_enableHsctTransmitPath(Ifx_HSCT *hsct);
377
378 /** \brief Enable hsct receive path in master interface
379 * \param hsct pointer to HSCT registers
380 * \return None
381 */
382 IFX_INLINE void IfxHssl_enableHsctReceivePath(Ifx_HSCT *hsct);
383
384 /** \brief Disable hsct transmit path in master interface
385 * \param hsct pointer to HSCT registers
386 * \return None
387 */
388 IFX_INLINE void IfxHssl_disableHsctTransmitPath(Ifx_HSCT *hsct);
389
390 /** \brief Disable hsct receive path in master interface
391 * \param hsct pointer to HSCT registers
392 * \return None
393 */
394 IFX_INLINE void IfxHssl_disableHsctReceivePath(Ifx_HSCT *hsct);
395
396 /******************************************************************************/
397 /*-------------------------Global Function Prototypes-------------------------*/
398 /******************************************************************************/
399
400 /** \brief Disables hsct module
401 * \param hsct pointer to HSCT registers
402 * \return None
403 */
404 IFX_EXTERN void IfxHssl_disableHsctModule(Ifx_HSCT *hsct);
405
406 /** \brief Enables hsct module
407 * \param hsct pointer to HSCT registers
408 * \return None
409 */
410 IFX_EXTERN void IfxHssl_enableHsctModule(Ifx_HSCT *hsct);
411
412 /**
413 * \param hsct Resource index of the HSCT
414 * \return HSCT module register address
415 */
416 IFX_EXTERN Ifx_HSCT *IfxHssl_getHsctAddress(IfxHssl_hsctIndex hsct);
417
418 /** \brief API to get the resource index of the HSCT specified.
419 * \return Resource index of the HSCT
420 */
421 IFX_EXTERN IfxHssl_hsctIndex IfxHssl_getHsctIndex(Ifx_HSCT *hsct);
422
423 /** \brief Returns the SRC pointer for HSCT
424 * \param hsct pointer to HSCT registers
425 * \return SRC pointer for HSCT
426 */
427 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxHssl_getHsctSrcPointer(Ifx_HSCT *hsct);
428
429 /** \brief resets HSCT kernel
430 * \param hsct pointer to HSCT registers
431 * \return None
432 */
433 IFX_EXTERN void IfxHssl_resetHsctKernel(Ifx_HSCT *hsct);
434
435 /** \} */
436
437 /** \addtogroup IfxLld_Hssl_Std_HsslFunctions
438 * \{ */
439
440 /******************************************************************************/
441 /*-------------------------Inline Function Prototypes-------------------------*/
442 /******************************************************************************/
443
444 /** \brief Clears the HSSl channel error interrupt flag
445 * \param hssl pointer to HSSl registers
446 * \param source HSSL channel error interrupt source
447 * \param channelId HSSL channel number
448 * \return None
449 */
450 IFX_INLINE void IfxHssl_clearHsslChannelErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId);
451
452 /** \brief Clears the HSSl global error interrupt flag
453 * \param hssl pointer to HSSl registers
454 * \param source HSSL global error interrupt source
455 * \return None
456 */
457 IFX_INLINE void IfxHssl_clearHsslGlobalErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source);
458
459 /** \brief Clears the Initialise Mode Flag status
460 * \param hssl pointer to HSSL registers
461 * \return None
462 */
463 IFX_INLINE void IfxHssl_clearInitialiseModeFlag(Ifx_HSSL *hssl);
464
465 /** \brief Enables the HSSl channel error interrupt flag, which trggers the ERR interrupt
466 * \param hssl pointer to HSSl registers
467 * \param source HSSL channel error interrupt source
468 * \param channelId HSSL channel number
469 * \return None
470 */
471 IFX_INLINE void IfxHssl_disableHsslChannelErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId);
472
473 /** \brief Disables the HSSl channel error interrupt flag, which trggers the EXI interrupt
474 * \param hssl pointer to HSSl registers
475 * \param source HSSL global error interrupt source
476 * \return None
477 */
478 IFX_INLINE void IfxHssl_disableHsslGlobalErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source);
479
480 /** \brief Enables all error flags
481 * \param hssl pointer to HSSL registers
482 * \return None
483 */
484 IFX_INLINE void IfxHssl_enableAllErrorFlags(Ifx_HSSL *hssl);
485
486 /** \brief Enables HSSL COK interrupt of specified channel
487 * \param hssl pointer to HSSl registers
488 * \param channelId HSSL channel number
489 * \param typeOfService Type of Service (Cpu or DMA)
490 * \param priority Priority of the interrupt
491 * \return None
492 */
493 IFX_INLINE void IfxHssl_enableHsslCOKInterrupt(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority);
494
495 /** \brief Enables the HSSl channel error interrupt flag, which trggers the ERR interrupt
496 * \param hssl pointer to HSSl registers
497 * \param source HSSL channel error interrupt source
498 * \param channelId HSSL channel number
499 * \return None
500 */
501 IFX_INLINE void IfxHssl_enableHsslChannelErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId);
502
503 /** \brief Enables HSSL ERR interrupt of specified channel
504 * \param hssl pointer to HSSl registers
505 * \param channelId HSSL channel number
506 * \param typeOfService Type of Service (Cpu or DMA)
507 * \param priority Priority of the interrupt
508 * \return None
509 */
510 IFX_INLINE void IfxHssl_enableHsslERRInterrupt(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority);
511
512 /** \brief Enables HSSL EXI interrupt of specified channel
513 * \param hssl pointer to HSSl registers
514 * \param typeOfService Type of Service (Cpu or DMA)
515 * \param priority Priority of the interrupt
516 * \return None
517 */
518 IFX_INLINE void IfxHssl_enableHsslEXIInterrupt(Ifx_HSSL *hssl, IfxSrc_Tos typeOfService, uint16 priority);
519
520 /** \brief Enables the HSSl global error interrupt flag, which trggers the EXI interrupt
521 * \param hssl pointer to HSSl registers
522 * \param source HSSL global error interrupt source
523 * \return None
524 */
525 IFX_INLINE void IfxHssl_enableHsslGlobalErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source);
526
527 /** \brief Enables HSSL RDI interrupt of specified channel
528 * \param hssl pointer to HSSl registers
529 * \param channelId HSSL channel number
530 * \param typeOfService Type of Service (Cpu or DMA)
531 * \param priority Priority of the interrupt
532 * \return None
533 */
534 IFX_INLINE void IfxHssl_enableHsslRDIInterrupt(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority);
535
536 /** \brief Enables HSSL TRG interrupt of specified channel
537 * \param hssl pointer to HSSl registers
538 * \param channelId HSSL channel number
539 * \param typeOfService Type of Service (Cpu or DMA)
540 * \param priority Priority of the interrupt
541 * \return None
542 */
543 IFX_INLINE void IfxHssl_enableHsslTRGInterrupt(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority);
544
545 /** \brief Returns the status of all MFLAGS status
546 * \param hssl pointer to HSSL registers
547 * \return MFLAGS status
548 */
549 IFX_INLINE uint32 IfxHssl_getAllMflagsStatus(Ifx_HSSL *hssl);
550
551 /** \brief Returns the Current Count value
552 * \param hssl pointer to HSSL registers
553 * \return Current Count value
554 */
555 IFX_INLINE uint16 IfxHssl_getCurrentCount(Ifx_HSSL *hssl);
556
557 /** \brief Clears the HSSl channel error interrupt flag
558 * \param hssl pointer to HSSl registers
559 * \param source HSSL channel error interrupt source
560 * \param channelId HSSL channel number
561 * \return Status (TRUE / FALSE)
562 */
563 IFX_INLINE boolean IfxHssl_getHsslChannelErrorInterruptFlagStatus(Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId);
564
565 /** \brief Clears the HSSl global error interrupt flag
566 * \param hssl pointer to HSSl registers
567 * \param source HSSL global error interrupt source
568 * \return Status (TRUE / FALSE)
569 */
570 IFX_INLINE boolean IfxHssl_getHsslGloabalErrorInterruptFlagStatus(Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source);
571
572 /** \brief Returns the Initialise Mode Flag status
573 * \param hssl pointer to HSSL registers
574 * \return status : TRUE/FALSE
575 */
576 IFX_INLINE boolean IfxHssl_getInitialiseModeFlagStatus(Ifx_HSSL *hssl);
577
578 /** \brief Returns the Reload Count value
579 * \param hssl pointer to HSSL registers
580 * \return Current Count value
581 */
582 IFX_INLINE uint16 IfxHssl_getReloadCount(Ifx_HSSL *hssl);
583
584 /** \brief Returns the module's suspend state.
585 * TRUE :if module is suspended.
586 * FALSE:if module is not yet suspended.
587 * \param hssl Pointer to HSSL module registers
588 * \return Suspend status (TRUE / FALSE)
589 */
590 IFX_INLINE boolean IfxHssl_isModuleSuspended(Ifx_HSSL *hssl);
591
592 /** \brief Sets the sensitivity of the module to sleep signal
593 * \param hssl pointer to HSSL registers
594 * \param mode mode selection (enable/disable)
595 * \return None
596 */
597 IFX_INLINE void IfxHssl_setHsslSleepMode(Ifx_HSSL *hssl, IfxHssl_Hssl_SleepMode mode);
598
599 /** \brief Sets the Initialise Mode Flag
600 * \param hssl pointer to HSSL registers
601 * \return None
602 */
603 IFX_INLINE void IfxHssl_setInitialiseModeFlag(Ifx_HSSL *hssl);
604
605 /** \brief Sets the reload Count
606 * \param hssl pointer to HSSL registers
607 * \param reloadValue Reload Value
608 * \return None
609 */
610 IFX_INLINE void IfxHssl_setReloadCount(Ifx_HSSL *hssl, uint16 reloadValue);
611
612 /** \brief Configure the Module to Hard/Soft suspend mode.
613 * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
614 * \param hssl Pointer to HSSL module registers
615 * \param mode Module suspend mode
616 * \return None
617 */
618 IFX_INLINE void IfxHssl_setSuspendMode(Ifx_HSSL *hssl, IfxHssl_SuspendMode mode);
619
620 /** \brief Sets the Timeout Reload Value
621 * \param hssl pointer to HSSL registers
622 * \param channelId HSSL channel number
623 * \param timeoutValue Timeout Value
624 * \return None
625 */
626 IFX_INLINE void IfxHssl_setTimeoutReloadValue(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, uint8 timeoutValue);
627
628 /******************************************************************************/
629 /*-------------------------Global Function Prototypes-------------------------*/
630 /******************************************************************************/
631
632 /** \brief DIsables the hssl module
633 * \param hssl pointer to HSSl registers
634 * \return None
635 */
636 IFX_EXTERN void IfxHssl_disableHsslModule(Ifx_HSSL *hssl);
637
638 /** \brief Enables the hssl module
639 * \param hssl pointer to HSSl registers
640 * \return None
641 */
642 IFX_EXTERN void IfxHssl_enableHsslModule(Ifx_HSSL *hssl);
643
644 /**
645 * \param hssl Resource index of the HSSL
646 * \return HSSL module register address
647 */
648 IFX_EXTERN Ifx_HSSL *IfxHssl_getHsslAddress(IfxHssl_hsslIndex hssl);
649
650 /** \brief Returns the SRC pointer for HSSL COK of specified channel
651 * \param hssl pointer to HSSl registers
652 * \param channelId HSSL channel number
653 * \return SRC pointer for HSSL COK interrupt of specific channel
654 */
655 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxHssl_getHsslCOKSrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId);
656
657 /** \brief Returns the SRC pointer for HSSL ERR of specified channel
658 * \param hssl pointer to HSSl registers
659 * \param channelId HSSL channel number
660 * \return SRC pointer for HSSL ERR interrupt of specific channel
661 */
662 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxHssl_getHsslERRSrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId);
663
664 /** \brief Returns the SRC pointer for HSSL EXI interrupt
665 * \param hssl pointer to HSSl registers
666 * \return SRC pointer for HSSL EXI interrupt
667 */
668 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxHssl_getHsslEXISrcPointer(Ifx_HSSL *hssl);
669
670 /** \brief API to get the resource index of the HSSL specified.
671 * \return Resource index of the HSSL
672 */
673 IFX_EXTERN IfxHssl_hsslIndex IfxHssl_getHsslIndex(Ifx_HSSL *hssl);
674
675 /** \brief Returns the SRC pointer for HSSL COK of specified channel
676 * \param hssl pointer to HSSl registers
677 * \param channelId HSSL channel number
678 * \return SRC pointer for HSSL RDI interrupt of specific channel
679 */
680 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxHssl_getHsslRDISrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId);
681
682 /** \brief Returns the SRC pointer for HSSL TRG of specified channel
683 * \param hssl pointer to HSSl registers
684 * \param channelId HSSL channel number
685 * \return SRC pointer for HSSL TRG interrupt of specific channel
686 */
687 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxHssl_getHsslTRGSrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId);
688
689 /** \brief resets the HSSL kernel
690 * \param hssl pointer to HSSL registers
691 * \return None
692 */
693 IFX_EXTERN void IfxHssl_resetHsslKernel(Ifx_HSSL *hssl);
694
695 /** \} */
696
697 /******************************************************************************/
698 /*---------------------Inline Function Implementations------------------------*/
699 /******************************************************************************/
700
701 IFX_INLINE void IfxHssl_clearHsctInterruptFlag(Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source)
702 {
703 uint32 value = 1 << source;
704 hsct->IRQCLR.U = value;
705 }
706
707
708 IFX_INLINE void IfxHssl_clearHsslChannelErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId)
709 {
710 uint32 value = 1 << ((uint32)(channelId + source));
711 hssl->MFLAGSCL.U = value;
712 }
713
714
715 IFX_INLINE void IfxHssl_clearHsslGlobalErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source)
716 {
717 uint32 value = 1 << source;
718 hssl->MFLAGSCL.U = value;
719 }
720
721
722 IFX_INLINE void IfxHssl_clearInitialiseModeFlag(Ifx_HSSL *hssl)
723 {
724 hssl->MFLAGSCL.B.INIC = 0x1U;
725 }
726
727
728 IFX_INLINE void IfxHssl_disableHsctInterruptFlag(Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source)
729 {
730 uint32 value = 1 << source;
731 hsct->IRQEN.U &= ~value;
732 }
733
734
735 IFX_INLINE void IfxHssl_disableHsslChannelErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId)
736 {
737 uint32 value = 1 << ((uint32)(channelId + source));
738 hssl->MFLAGSEN.U &= ~value;
739 }
740
741
742 IFX_INLINE void IfxHssl_disableHsslGlobalErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source)
743 {
744 uint32 value = 1 << source;
745 hssl->MFLAGSEN.U &= ~value;
746 }
747
748
749 IFX_INLINE void IfxHssl_enableAllErrorFlags(Ifx_HSSL *hssl)
750 {
751 hssl->MFLAGSEN.U = 0x23E0FFFFU;
752 }
753
754
755 IFX_INLINE void IfxHssl_enableHsctInterrupt(Ifx_HSCT *hsct, IfxSrc_Tos typeOfService, uint16 priority)
756 {
757 volatile Ifx_SRC_SRCR *src;
758 src = IfxHssl_getHsctSrcPointer(hsct);
759 IfxSrc_init(src, typeOfService, priority);
760 IfxSrc_enable(src);
761 }
762
763
764 IFX_INLINE void IfxHssl_enableHsctInterruptFlag(Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source)
765 {
766 uint32 value = 1 << source;
767 hsct->IRQEN.U |= value;
768 }
769
770
771 IFX_INLINE void IfxHssl_enableHsctLvdsLoopback(Ifx_HSCT *hsct)
772 {
773 hsct->TESTCTRL.B.LLOPTXRX = 0x1U;
774 }
775
776
777 IFX_INLINE void IfxHssl_enableHsslCOKInterrupt(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority)
778 {
779 volatile Ifx_SRC_SRCR *src;
780 src = IfxHssl_getHsslCOKSrcPointer(hssl, channelId);
781 IfxSrc_init(src, typeOfService, priority);
782 IfxSrc_enable(src);
783 }
784
785
786 IFX_INLINE void IfxHssl_enableHsslChannelErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId)
787 {
788 uint32 value = 1 << ((uint32)(channelId + source));
789 hssl->MFLAGSEN.U |= value;
790 }
791
792
793 IFX_INLINE void IfxHssl_enableHsslERRInterrupt(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority)
794 {
795 volatile Ifx_SRC_SRCR *src;
796 src = IfxHssl_getHsslERRSrcPointer(hssl, channelId);
797 IfxSrc_init(src, typeOfService, priority);
798 IfxSrc_enable(src);
799 }
800
801
802 IFX_INLINE void IfxHssl_enableHsslEXIInterrupt(Ifx_HSSL *hssl, IfxSrc_Tos typeOfService, uint16 priority)
803 {
804 volatile Ifx_SRC_SRCR *src;
805 src = IfxHssl_getHsslEXISrcPointer(hssl);
806 IfxSrc_init(src, typeOfService, priority);
807 IfxSrc_enable(src);
808 }
809
810
811 IFX_INLINE void IfxHssl_enableHsslGlobalErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source)
812 {
813 uint32 value = 1 << source;
814 hssl->MFLAGSEN.U |= value;
815 }
816
817
818 IFX_INLINE void IfxHssl_enableHsslRDIInterrupt(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority)
819 {
820 volatile Ifx_SRC_SRCR *src;
821 src = IfxHssl_getHsslRDISrcPointer(hssl, channelId);
822 IfxSrc_init(src, typeOfService, priority);
823 IfxSrc_enable(src);
824 }
825
826
827 IFX_INLINE void IfxHssl_enableHsslTRGInterrupt(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority)
828 {
829 volatile Ifx_SRC_SRCR *src;
830 src = IfxHssl_getHsslTRGSrcPointer(hssl, channelId);
831 IfxSrc_init(src, typeOfService, priority);
832 IfxSrc_enable(src);
833 }
834
835
836 IFX_INLINE uint32 IfxHssl_getAllMflagsStatus(Ifx_HSSL *hssl)
837 {
838 return hssl->MFLAGS.U;
839 }
840
841
842 IFX_INLINE uint16 IfxHssl_getCurrentCount(Ifx_HSSL *hssl)
843 {
844 return hssl->IS.FC.B.CURCOUNT;
845 }
846
847
848 IFX_INLINE boolean IfxHssl_getHsctInterruptFlagStatus(Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source)
849 {
850 return (hsct->IRQ.U >> source) & 0x1;
851 }
852
853
854 IFX_INLINE boolean IfxHssl_getHsslChannelErrorInterruptFlagStatus(Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId)
855 {
856 return (hssl->MFLAGS.U >> ((uint32)(channelId + source))) & 0x1;
857 }
858
859
860 IFX_INLINE boolean IfxHssl_getHsslGloabalErrorInterruptFlagStatus(Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source)
861 {
862 return (hssl->MFLAGS.U >> source) & 0x1;
863 }
864
865
866 IFX_INLINE boolean IfxHssl_getInitialiseModeFlagStatus(Ifx_HSSL *hssl)
867 {
868 return hssl->MFLAGS.B.INI != 0;
869 }
870
871
872 IFX_INLINE uint16 IfxHssl_getReloadCount(Ifx_HSSL *hssl)
873 {
874 return hssl->IS.FC.B.RELCOUNT;
875 }
876
877
878 IFX_INLINE boolean IfxHssl_isModuleSuspended(Ifx_HSSL *hssl)
879 {
880 Ifx_HSSL_OCS ocs;
881
882 /* read the status */
883 ocs.U = hssl->OCS.U;
884
885 /* return the status */
886 return ocs.B.SUSSTA;
887 }
888
889
890 IFX_INLINE void IfxHssl_setHsctSleepMode(Ifx_HSCT *hsct, IfxHssl_Hsct_SleepMode mode)
891 {
892 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
893 IfxScuWdt_clearCpuEndinit(passwd);
894 hsct->CLC.B.EDIS = mode;
895 IfxScuWdt_setCpuEndinit(passwd);
896 }
897
898
899 IFX_INLINE void IfxHssl_setHsslSleepMode(Ifx_HSSL *hssl, IfxHssl_Hssl_SleepMode mode)
900 {
901 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
902 IfxScuWdt_clearCpuEndinit(passwd);
903 hssl->CLC.B.EDIS = mode;
904 IfxScuWdt_setCpuEndinit(passwd);
905 }
906
907
908 IFX_INLINE void IfxHssl_setInitialiseModeFlag(Ifx_HSSL *hssl)
909 {
910 hssl->MFLAGSSET.B.INIS = 0x1U;
911 }
912
913
914 IFX_INLINE void IfxHssl_setReloadCount(Ifx_HSSL *hssl, uint16 reloadValue)
915 {
916 hssl->IS.FC.B.RELCOUNT = reloadValue;
917 }
918
919
920 IFX_INLINE void IfxHssl_setSuspendMode(Ifx_HSSL *hssl, IfxHssl_SuspendMode mode)
921 {
922 Ifx_HSSL_OCS ocs;
923
924 /* remove protection and configure the suspend mode. */
925 ocs.B.SUS_P = 1;
926 ocs.B.SUS = mode;
927 hssl->OCS.U = ocs.U;
928 }
929
930
931 IFX_INLINE void IfxHssl_setTimeoutReloadValue(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, uint8 timeoutValue)
932 {
933 hssl->I[channelId].ICON.B.TOREL = timeoutValue;
934 }
935
936
937 IFX_INLINE uint32 IfxHssl_getHsctUnsolicitedStatusMessage(Ifx_HSCT *hsct)
938 {
939 return hsct->USMR.U;
940 }
941
942
943 IFX_INLINE void IfxHssl_sendHsctUnsolicitedStatusMessage(Ifx_HSCT *hsct, uint32 message)
944 {
945 hsct->USMS.U = message;
946 }
947
948
949 IFX_INLINE void IfxHssl_setHsctRxLinkSpeed(Ifx_HSCT *hsct, IfxHssl_MasterModeRxSpeed rxSpeed)
950 {
951 hsct->IFCTRL.B.MRXSPEED = rxSpeed;
952 }
953
954
955 IFX_INLINE void IfxHssl_setHsctTxLinkSpeed(Ifx_HSCT *hsct, IfxHssl_MasterModeTxSpeed txSpeed)
956 {
957 hsct->IFCTRL.B.MTXSPEED = txSpeed;
958 }
959
960
961 IFX_INLINE void IfxHssl_enableHsctTransmitPath(Ifx_HSCT *hsct)
962 {
963 hsct->DISABLE.B.TX_DIS = 0x0U;
964 }
965
966
967 IFX_INLINE void IfxHssl_enableHsctReceivePath(Ifx_HSCT *hsct)
968 {
969 hsct->DISABLE.B.RX_DIS = 0x0U;
970 }
971
972
973 IFX_INLINE void IfxHssl_disableHsctTransmitPath(Ifx_HSCT *hsct)
974 {
975 hsct->DISABLE.B.TX_DIS = 0x1U;
976 }
977
978
979 IFX_INLINE void IfxHssl_disableHsctReceivePath(Ifx_HSCT *hsct)
980 {
981 hsct->DISABLE.B.RX_DIS = 0x1U;
982 }
983
984
985 #endif /* IFXHSSL_H */
IfxHssl_ChannelId
IfxHssl_ChannelId
channel selection
Definition: IfxHssl.h:74
IfxHssl_StreamingMode_continuous
streaming mode continuous (with two memory blocks)
Definition: IfxHssl.h:214
IfxHssl_resetHsslKernel
IFX_EXTERN void IfxHssl_resetHsslKernel(Ifx_HSSL *hssl)
resets the HSSL kernel
Definition: IfxHssl.c:224
IfxHssl_ChannelId_3
Channel 3.
Definition: IfxHssl.h:79
IfxHssl_ControlCommand_highSpeedTransmission
select high speed mode for transfers from the Master to the Slave
Definition: IfxHssl.h:101
IfxHssl_Hssl_EXIInterruptSource
IfxHssl_Hssl_EXIInterruptSource
HSSL global error interrupt source, which triggers the EXI interrupt Definition in Ifx_HSSL...
Definition: IfxHssl.h:253
IfxHssl_MasterModeTxSpeed_lowSpeed
low speed
Definition: IfxHssl.h:186
IfxHssl_Hsct_InterruptSource_unsolicitedMessageSendFinished
Unsolicited message frame send finished.
Definition: IfxHssl.h:132
IfxHssl_setHsctRxLinkSpeed
IFX_INLINE void IfxHssl_setHsctRxLinkSpeed(Ifx_HSCT *hsct, IfxHssl_MasterModeRxSpeed rxSpeed)
Set the HSCT RX link speed.
Definition: IfxHssl.h:949
IfxHssl_enableHsctTransmitPath
IFX_INLINE void IfxHssl_enableHsctTransmitPath(Ifx_HSCT *hsct)
Enable hsct transmit path in master interface.
Definition: IfxHssl.h:961
IfxHssl_clearInitialiseModeFlag
IFX_INLINE void IfxHssl_clearInitialiseModeFlag(Ifx_HSSL *hssl)
Clears the Initialise Mode Flag status.
Definition: IfxHssl.h:722
IfxHssl_enableHsctInterruptFlag
IFX_INLINE void IfxHssl_enableHsctInterruptFlag(Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source)
Enables HSCT interrupt flag.
Definition: IfxHssl.h:764
IfxHssl_StreamingMode
IfxHssl_StreamingMode
streaming mode ( single / continuous ) Definition in Ifx_HSSL.CFG.B.SMT/SMR
Definition: IfxHssl.h:212
IfxHssl_ControlCommand_mediumSpeedReception
select medium speed mode for transfers from the Slave to the master
Definition: IfxHssl.h:103
IfxHssl_Hsct_InterruptSource_pingAnswerReceived
PING Answer Received.
Definition: IfxHssl.h:135
IfxHssl_Hssl_EXIInterruptSource_crcError
CRC error (triggers EXI interrupt)
Definition: IfxHssl.h:260
IfxHssl_resetHsctKernel
IFX_EXTERN void IfxHssl_resetHsctKernel(Ifx_HSCT *hsct)
resets HSCT kernel
Definition: IfxHssl.c:205
IfxHssl_ControlCommand_turnOffClockTestMode
turn off clock test mode
Definition: IfxHssl.h:108
IfxHssl_Hsct_InterruptSource
IfxHssl_Hsct_InterruptSource
HSCT interrupt source Definition in Ifx_HSCT.IRQ.
Definition: IfxHssl.h:125
IfxHssl_Hssl_SleepMode_disable
disables sleep mode
Definition: IfxHssl.h:159
IfxHssl_SysClockDivider_4
SysClk Divider 1/4.
Definition: IfxHssl.h:234
IfxHssl_RefClockFrequency_40Mhz
SysClk/ RefClk is 40 MHz.
Definition: IfxHssl.h:206
IfxHssl_enableHsslERRInterrupt
IFX_INLINE void IfxHssl_enableHsslERRInterrupt(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSSL ERR interrupt of specified channel.
Definition: IfxHssl.h:793
IfxHssl_getHsctInterruptFlagStatus
IFX_INLINE boolean IfxHssl_getHsctInterruptFlagStatus(Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source)
Returns the HSCT interrupt flag status.
Definition: IfxHssl.h:848
IfxHssl_ControlCommand_lowSpeedTransmission
select low speed mode for transfers from the Master to the Slave
Definition: IfxHssl.h:100
IfxHssl_clearHsslChannelErrorInterruptFlag
IFX_INLINE void IfxHssl_clearHsslChannelErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId)
Clears the HSSl channel error interrupt flag.
Definition: IfxHssl.h:708
IfxHssl_Hsct_InterruptSource_headerError
Header error detected.
Definition: IfxHssl.h:127
IfxHssl_PllReferenceClock_oscillatorInput
oscillator input
Definition: IfxHssl.h:196
IfxHssl_Hssl_EXIInterruptSource_channelNumberCodeError
PHY Inconsistency Error 1 (Channel Number Code Error, triggers EXI interrupt)
Definition: IfxHssl.h:257
IfxHssl_sendHsctUnsolicitedStatusMessage
IFX_INLINE void IfxHssl_sendHsctUnsolicitedStatusMessage(Ifx_HSCT *hsct, uint32 message)
Send the unsolicited status message.
Definition: IfxHssl.h:943
IfxHssl_enableHsslModule
IFX_EXTERN void IfxHssl_enableHsslModule(Ifx_HSSL *hssl)
Enables the hssl module.
Definition: IfxHssl.c:80
IfxHssl_Hsct_InterruptSource_txTransferError
TX transfer error occurred on a disabled TX channel.
Definition: IfxHssl.h:136
IfxHssl_Hsct_Config::interfaceMode
IfxHssl_InterfaceMode interfaceMode
interface mode (master IF /slave IF)
Definition: IfxHssl.h:282
IfxHssl_getHsctUnsolicitedStatusMessage
IFX_INLINE uint32 IfxHssl_getHsctUnsolicitedStatusMessage(Ifx_HSCT *hsct)
Get the last received unsolicited status message.
Definition: IfxHssl.h:937
IfxHssl_getInitialiseModeFlagStatus
IFX_INLINE boolean IfxHssl_getInitialiseModeFlagStatus(Ifx_HSSL *hssl)
Returns the Initialise Mode Flag status.
Definition: IfxHssl.h:866
IfxHssl_ControlCommand_highSpeedClockStop
slave interface clock multiplier stop (after fallback from high speed mode)
Definition: IfxHssl.h:99
IfxHssl_hsslIndex
IfxHssl_hsslIndex
List of the available Hssl resources.
Definition: IfxHssl_cfg.h:88
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxHssl_SuspendMode_hard
Hard Suspend.
Definition: IfxHssl.h:223
IfxHssl_Hsct::loopBack
boolean loopBack
loopc back selection
Definition: IfxHssl.h:274
IfxHssl_MasterModeRxSpeed_lowSpeed
low speed
Definition: IfxHssl.h:176
IfxHssl_enableAllErrorFlags
IFX_INLINE void IfxHssl_enableAllErrorFlags(Ifx_HSSL *hssl)
Enables all error flags.
Definition: IfxHssl.h:749
IfxHssl_disableHsctInterruptFlag
IFX_INLINE void IfxHssl_disableHsctInterruptFlag(Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source)
Enables HSCT interrupt flag.
Definition: IfxHssl.h:728
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
IfxHssl_getAllMflagsStatus
IFX_INLINE uint32 IfxHssl_getAllMflagsStatus(Ifx_HSSL *hssl)
Returns the status of all MFLAGS status.
Definition: IfxHssl.h:836
IfxHssl_enableHsslRDIInterrupt
IFX_INLINE void IfxHssl_enableHsslRDIInterrupt(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSSL RDI interrupt of specified channel.
Definition: IfxHssl.h:818
IfxHssl_getHsslIndex
IFX_EXTERN IfxHssl_hsslIndex IfxHssl_getHsslIndex(Ifx_HSSL *hssl)
API to get the resource index of the HSSL specified.
Definition: IfxHssl.c:171
IfxHssl_getHsctSrcPointer
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxHssl_getHsctSrcPointer(Ifx_HSCT *hsct)
Returns the SRC pointer for HSCT.
Definition: IfxHssl.c:126
IfxHssl_Hsct_InterruptSource_commandError
HSCT Command error.
Definition: IfxHssl.h:129
IfxHssl_Hsct
HSCT module handle.
Definition: IfxHssl.h:271
IfxHssl_enableHsctModule
IFX_EXTERN void IfxHssl_enableHsctModule(Ifx_HSCT *hsct)
Enables hsct module.
Definition: IfxHssl.c:71
IfxHssl_Hssl_ERRInterruptSource_timeoutError
Timeout error (triggers ERR interrupt)
Definition: IfxHssl.h:246
IfxHssl_getHsslTRGSrcPointer
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxHssl_getHsslTRGSrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL TRG of specified channel.
Definition: IfxHssl.c:198
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxHssl_Command
IfxHssl_Command
communication command selection Definition in Ifx_HSSL.I.ICON.B.RWT
Definition: IfxHssl.h:85
IfxHssl_ChannelId_0
Channel 0.
Definition: IfxHssl.h:76
IfxSrc.h
SRC basic functionality.
IfxHssl_Hssl_EXIInterruptSource_busAccessError
SRI/SPB Bus Access Error (triggers EXI interrupt)
Definition: IfxHssl.h:256
IfxHssl_Hsct_InterruptSource_speedModeSwitchError
Speed mode switch error.
Definition: IfxHssl.h:131
IfxHssl_Hsct_InterruptSource_synchronizationFifoUnderflow
Synchronization FIFO underflow (in TX direction)
Definition: IfxHssl.h:140
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxCpu_Intrinsics.h
IfxHssl_Hsct_SleepMode_disable
disables sleep mode
Definition: IfxHssl.h:150
IfxHssl_RefClockFrequency_20Mhz
SysClk/ RefClk is 20 MHz.
Definition: IfxHssl.h:205
IfxHssl_enableHsslGlobalErrorInterruptFlag
IFX_INLINE void IfxHssl_enableHsslGlobalErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source)
Enables the HSSl global error interrupt flag, which trggers the EXI interrupt.
Definition: IfxHssl.h:811
IfxHssl_getHsctAddress
IFX_EXTERN Ifx_HSCT * IfxHssl_getHsctAddress(IfxHssl_hsctIndex hsct)
Definition: IfxHssl.c:89
IfxHssl_Hssl_ERRInterruptSource
IfxHssl_Hssl_ERRInterruptSource
HSSL channel error interrupt source, which triggers the ERR interrupt Definition in Ifx_HSSL...
Definition: IfxHssl.h:242
IfxHssl_Hsct_InterruptSource_synchronizationFifoOverflow
Synchronization FIFO overflow (in RX direction)
Definition: IfxHssl.h:138
IfxHssl_ChannelId_1
Channel 1.
Definition: IfxHssl.h:77
IfxHssl_InterfaceMode_master
master IF mode
Definition: IfxHssl.h:167
IfxHssl_ControlCommand_highSpeedReception
select high speed mode for transfers from the Slave to the master
Definition: IfxHssl.h:104
IfxHssl_InterfaceMode
IfxHssl_InterfaceMode
interface mode (master IF /slave IF) Definition in Ifx_HSCT.INIT.B.IFM
Definition: IfxHssl.h:165
IfxScuWdt.h
SCU basic functionality.
IfxHssl_Hssl_SleepMode
IfxHssl_Hssl_SleepMode
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_HSSL.CLC.B.EDIS.
Definition: IfxHssl.h:156
IfxHssl_isModuleSuspended
IFX_INLINE boolean IfxHssl_isModuleSuspended(Ifx_HSSL *hssl)
Returns the module&#39;s suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspende...
Definition: IfxHssl.h:878
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxHssl_ControlCommand
IfxHssl_ControlCommand
predefined control command payload values
Definition: IfxHssl.h:95
IfxHssl_SysClockDivider
IfxHssl_SysClockDivider
SysClk divider Definition in Ifx_HSCT.INIT.B.SSCF.
Definition: IfxHssl.h:230
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxHssl_getHsslAddress
IFX_EXTERN Ifx_HSSL * IfxHssl_getHsslAddress(IfxHssl_hsslIndex hssl)
Definition: IfxHssl.c:133
IfxHssl_Hssl_ERRInterruptSource_notAcknowledgeError
NACK error (triggers ERR interrupt)
Definition: IfxHssl.h:244
IfxHssl_clearHsslGlobalErrorInterruptFlag
IFX_INLINE void IfxHssl_clearHsslGlobalErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source)
Clears the HSSl global error interrupt flag.
Definition: IfxHssl.h:715
IfxHssl_SysClockDivider_2
SysClk Divider 1/2.
Definition: IfxHssl.h:233
IfxHssl_setInitialiseModeFlag
IFX_INLINE void IfxHssl_setInitialiseModeFlag(Ifx_HSSL *hssl)
Sets the Initialise Mode Flag.
Definition: IfxHssl.h:908
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxHssl_ControlCommand_lowSpeedReception
select low speed mode for transfers from the Slave to the Master
Definition: IfxHssl.h:102
IfxHssl_Command_writeFrame
command write frame
Definition: IfxHssl.h:89
IfxHssl_enableHsctReceivePath
IFX_INLINE void IfxHssl_enableHsctReceivePath(Ifx_HSCT *hsct)
Enable hsct receive path in master interface.
Definition: IfxHssl.h:967
IfxHssl_Hsct_SleepMode
IfxHssl_Hsct_SleepMode
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_HSCT.CLC.B.EDIS.
Definition: IfxHssl.h:147
IfxHssl_setReloadCount
IFX_INLINE void IfxHssl_setReloadCount(Ifx_HSSL *hssl, uint16 reloadValue)
Sets the reload Count.
Definition: IfxHssl.h:914
IfxHssl_PllReferenceClock_hsctSystemClockInput
hsct system clock input (HSCT SysClk_i)
Definition: IfxHssl.h:195
IfxHssl_MasterModeRxSpeed
IfxHssl_MasterModeRxSpeed
master mode receive speed Definition in Ifx_HSCT.IFCTRL.B.MRXSPEED
Definition: IfxHssl.h:174
IfxHssl_getReloadCount
IFX_INLINE uint16 IfxHssl_getReloadCount(Ifx_HSSL *hssl)
Returns the Reload Count value.
Definition: IfxHssl.h:872
IfxHssl_RefClockFrequency_10Mhz
SysClk/ RefClk is 10 MHz.
Definition: IfxHssl.h:204
IfxHssl_InterfaceMode_slave
slave IF mode
Definition: IfxHssl.h:168
IfxHssl_enableHsctLvdsLoopback
IFX_INLINE void IfxHssl_enableHsctLvdsLoopback(Ifx_HSCT *hsct)
Enables HSCT LVDS loopback.
Definition: IfxHssl.h:771
IfxHssl_Command_triggerFrame
command trigger frame
Definition: IfxHssl.h:90
IfxHssl_ControlCommand_ping
ping (send by master. Slave sends back a fixed 32-bit payload result.)
Definition: IfxHssl.h:97
IfxHssl_Hsct_InterruptSource_interfaceControlFrameSend
Interface control frame send.
Definition: IfxHssl.h:130
IfxHssl_getHsslEXISrcPointer
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxHssl_getHsslEXISrcPointer(Ifx_HSSL *hssl)
Returns the SRC pointer for HSSL EXI interrupt.
Definition: IfxHssl.c:164
IfxHssl_enableHsslEXIInterrupt
IFX_INLINE void IfxHssl_enableHsslEXIInterrupt(Ifx_HSSL *hssl, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSSL EXI interrupt of specified channel.
Definition: IfxHssl.h:802
IfxHssl_getHsslRDISrcPointer
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxHssl_getHsslRDISrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL COK of specified channel.
Definition: IfxHssl.c:191
IfxHssl_DataLength
IfxHssl_DataLength
Defines the length of the data in bits of the write and read command. Definition in Ifx_HSSL...
Definition: IfxHssl.h:115
IfxHssl_cfg.h
HSSL on-chip implementation data.
IfxHssl_Hssl_EXIInterruptSource_dataLengthError
PHY Inconsistency Error 2 (Data Length Error, triggers EXI interrupt)
Definition: IfxHssl.h:259
IfxHssl_MasterModeTxSpeed_highSpeed
high speed
Definition: IfxHssl.h:187
IfxHssl_ControlCommand_turnOnClockTestMode
turn on clock test mode
Definition: IfxHssl.h:107
IfxHssl_DataLength_16bit
16 bit
Definition: IfxHssl.h:118
IfxHssl_SuspendMode
IfxHssl_SuspendMode
OCDS Suspend Control (OCDS.SUS)
Definition: IfxHssl.h:220
IfxHssl_disableHsctModule
IFX_EXTERN void IfxHssl_disableHsctModule(Ifx_HSCT *hsct)
Disables hsct module.
Definition: IfxHssl.c:53
IfxHssl_Hssl_SleepMode_enable
enables sleep mode
Definition: IfxHssl.h:158
IfxHssl_Hsct_InterruptSource_pllLockLosterror
Pll lock lost error.
Definition: IfxHssl.h:133
IfxHssl_Hsct_Config::highSpeedMode
boolean highSpeedMode
high speed mode selection
Definition: IfxHssl.h:283
IfxHssl_DataLength_32bit
32 bit
Definition: IfxHssl.h:119
IfxHssl_SuspendMode_soft
Soft Suspend.
Definition: IfxHssl.h:224
IfxHssl_SuspendMode_none
No suspend.
Definition: IfxHssl.h:222
IfxHssl_DataLength_8bit
8 bit
Definition: IfxHssl.h:117
IfxHssl_enableHsctInterrupt
IFX_INLINE void IfxHssl_enableHsctInterrupt(Ifx_HSCT *hsct, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSCT interrupt.
Definition: IfxHssl.h:755
IfxHssl_disableHsctTransmitPath
IFX_INLINE void IfxHssl_disableHsctTransmitPath(Ifx_HSCT *hsct)
Disable hsct transmit path in master interface.
Definition: IfxHssl.h:973
IfxHssl_MasterModeRxSpeed_highSpeed
high speed
Definition: IfxHssl.h:178
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxHssl_getHsctIndex
IFX_EXTERN IfxHssl_hsctIndex IfxHssl_getHsctIndex(Ifx_HSCT *hsct)
API to get the resource index of the HSCT specified.
Definition: IfxHssl.c:106
IfxHssl_clearHsctInterruptFlag
IFX_INLINE void IfxHssl_clearHsctInterruptFlag(Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source)
Clears the HSCT interrupt flag.
Definition: IfxHssl.h:701
IfxHssl_setHsctSleepMode
IFX_INLINE void IfxHssl_setHsctSleepMode(Ifx_HSCT *hsct, IfxHssl_Hsct_SleepMode mode)
Sets the sensitivity of the module to sleep signal.
Definition: IfxHssl.h:890
IfxHssl_setHsslSleepMode
IFX_INLINE void IfxHssl_setHsslSleepMode(Ifx_HSSL *hssl, IfxHssl_Hssl_SleepMode mode)
Sets the sensitivity of the module to sleep signal.
Definition: IfxHssl.h:899
IfxHssl_MasterModeTxSpeed
IfxHssl_MasterModeTxSpeed
master mode transmit speed Definition in Ifx_HSCT.IFCTRL.B.MTXSPEED
Definition: IfxHssl.h:184
IfxHssl_Hsct_Config
Configuration structure of the HSCT module.
Definition: IfxHssl.h:279
IfxHssl_SysClockDivider_1
SysClk Divider 1/1.
Definition: IfxHssl.h:232
IfxHssl_ControlCommand_disableReception
disable Slave interface transmitter
Definition: IfxHssl.h:106
IfxHssl_enableHsslChannelErrorInterruptFlag
IFX_INLINE void IfxHssl_enableHsslChannelErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId)
Enables the HSSl channel error interrupt flag, which trggers the ERR interrupt.
Definition: IfxHssl.h:786
IfxHssl_Command_readFrame
command read frame
Definition: IfxHssl.h:88
IfxHssl_ChannelId_2
Channel 2.
Definition: IfxHssl.h:78
IfxHssl_getHsslGloabalErrorInterruptFlagStatus
IFX_INLINE boolean IfxHssl_getHsslGloabalErrorInterruptFlagStatus(Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source)
Clears the HSSl global error interrupt flag.
Definition: IfxHssl.h:860
IfxHssl_PllReferenceClock
IfxHssl_PllReferenceClock
PLL reference clock Definition in Ifx_HSCT.CONFIGPHY.B.OSCCLKEN.
Definition: IfxHssl.h:193
IfxHssl_setTimeoutReloadValue
IFX_INLINE void IfxHssl_setTimeoutReloadValue(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, uint8 timeoutValue)
Sets the Timeout Reload Value.
Definition: IfxHssl.h:931
IfxHssl_getHsslCOKSrcPointer
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxHssl_getHsslCOKSrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL COK of specified channel.
Definition: IfxHssl.c:150
IfxHssl_Hsct_InterruptSource_UnsolicitedMessageReceived
Unsolicited message received.
Definition: IfxHssl.h:134
IfxHssl_Hssl_ERRInterruptSource_unexpectedError
Unexpected error (triggers ERR interrupt)
Definition: IfxHssl.h:247
IfxHssl_Hssl_EXIInterruptSource_memoryAccessViolation
Memory Access Violation error (triggers EXI interrupt)
Definition: IfxHssl.h:255
IfxHssl_Hssl_ERRInterruptSource_transactionTagError
Transaction Tag Error (triggers ERR interrupt)
Definition: IfxHssl.h:245
IfxHssl_disableHsctReceivePath
IFX_INLINE void IfxHssl_disableHsctReceivePath(Ifx_HSCT *hsct)
Disable hsct receive path in master interface.
Definition: IfxHssl.h:979
IfxHssl_Command_noAction
command no action
Definition: IfxHssl.h:87
IfxHssl_RefClockFrequency
IfxHssl_RefClockFrequency
SysClk / Reference Clock Frequency rate Definition in Ifx_HSCT.INIT.B.SRCF.
Definition: IfxHssl.h:202
IfxHssl_MasterModeRxSpeed_mediumSpeed
medium speed
Definition: IfxHssl.h:177
IfxHssl_StreamingMode_single
streaming mode single (with one memory block)
Definition: IfxHssl.h:215
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxHssl_getHsslERRSrcPointer
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxHssl_getHsslERRSrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL ERR of specified channel.
Definition: IfxHssl.c:157
IfxHssl_Hsct_SleepMode_enable
enables sleep mode
Definition: IfxHssl.h:149
IfxHssl_setHsctTxLinkSpeed
IFX_INLINE void IfxHssl_setHsctTxLinkSpeed(Ifx_HSCT *hsct, IfxHssl_MasterModeTxSpeed txSpeed)
Set the HSCT TX link speed.
Definition: IfxHssl.h:955
IfxHssl_disableHsslModule
IFX_EXTERN void IfxHssl_disableHsslModule(Ifx_HSSL *hssl)
DIsables the hssl module.
Definition: IfxHssl.c:62
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxHssl_disableHsslChannelErrorInterruptFlag
IFX_INLINE void IfxHssl_disableHsslChannelErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId)
Enables the HSSl channel error interrupt flag, which trggers the ERR interrupt.
Definition: IfxHssl.h:735
IfxHssl_Hsct_InterruptSource_payloadError
Payload error detected.
Definition: IfxHssl.h:128
IfxHssl_disableHsslGlobalErrorInterruptFlag
IFX_INLINE void IfxHssl_disableHsslGlobalErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source)
Disables the HSSl channel error interrupt flag, which trggers the EXI interrupt.
Definition: IfxHssl.h:742
IfxHssl_getCurrentCount
IFX_INLINE uint16 IfxHssl_getCurrentCount(Ifx_HSSL *hssl)
Returns the Current Count value.
Definition: IfxHssl.h:842
IfxHssl_ControlCommand_enableReception
enable Slave interface transmitter
Definition: IfxHssl.h:105
IfxHssl_ControlCommand_highSpeedClockStart
slave interface clock multiplier start (in preparation for high speed mode)
Definition: IfxHssl.h:98
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxHssl_getHsslChannelErrorInterruptFlagStatus
IFX_INLINE boolean IfxHssl_getHsslChannelErrorInterruptFlagStatus(Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId)
Clears the HSSl channel error interrupt flag.
Definition: IfxHssl.h:854
IfxHssl_enableHsslTRGInterrupt
IFX_INLINE void IfxHssl_enableHsslTRGInterrupt(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSSL TRG interrupt of specified channel.
Definition: IfxHssl.h:827
IfxHssl_hsctIndex
IfxHssl_hsctIndex
List of the available Hsct resources.
Definition: IfxHssl_cfg.h:80
IfxHssl_Hsct::hsct
Ifx_HSCT * hsct
pointer to HSCT registers
Definition: IfxHssl.h:273
IfxHssl_setSuspendMode
IFX_INLINE void IfxHssl_setSuspendMode(Ifx_HSSL *hssl, IfxHssl_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and...
Definition: IfxHssl.h:920
IfxHssl_enableHsslCOKInterrupt
IFX_INLINE void IfxHssl_enableHsslCOKInterrupt(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSSL COK interrupt of specified channel.
Definition: IfxHssl.h:777
IfxHssl_ControlCommand_turnOnPayloadLoopback
turn on payload loopback
Definition: IfxHssl.h:109


iLLD_TC38A: IfxHssl_Hssl.c Source File

  • Hssl
  • Hssl
IfxHssl_Hssl.c
Go to the documentation of this file.
1 /**
2 * \file IfxHssl_Hssl.c
3 * \brief HSSL HSSL details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 *
41 */
42
43 /******************************************************************************/
44 /*----------------------------------Includes----------------------------------*/
45 /******************************************************************************/
46
47 #include "IfxHssl_Hssl.h"
48
49 /******************************************************************************/
50 /*-------------------------Function Implementations---------------------------*/
51 /******************************************************************************/
52
53 void IfxHssl_Hssl_checkErrors(IfxHssl_Hssl *hssl)
54 {
55 Ifx_HSSL *hsslSFR = hssl->hssl; /* pointer to HSSL registers */
56
57 /* store the errors in the structure */
58 if (hsslSFR->MFLAGS.B.NACK != 0)
59 {
60 hssl->errorFlags.notAcknowledgeError = 1;
61 }
62
63 if (hsslSFR->MFLAGS.B.TTE != 0)
64 {
65 hssl->errorFlags.transactionTagError = 1;
66 }
67
68 if (hsslSFR->MFLAGS.B.TIMEOUT != 0)
69 {
70 hssl->errorFlags.timeoutError = 1;
71 }
72
73 if (hsslSFR->MFLAGS.B.UNEXPECTED != 0)
74 {
75 hssl->errorFlags.unexpectedError = 1;
76 }
77
78 if (hsslSFR->MFLAGS.B.MAV != 0)
79 {
80 hssl->errorFlags.memoryAccessViolation = 1;
81 }
82
83 if (hsslSFR->MFLAGS.B.SRIE != 0)
84 {
85 hssl->errorFlags.busAccessError = 1;
86 }
87
88 if (hsslSFR->MFLAGS.B.PIE1 != 0)
89 {
90 hssl->errorFlags.channelNumberCodeError = 1;
91 }
92
93 if (hsslSFR->MFLAGS.B.PIE2 != 0)
94 {
95 hssl->errorFlags.dataLengthError = 1;
96 }
97
98 if (hsslSFR->MFLAGS.B.CRCE != 0)
99 {
100 hssl->errorFlags.crcError = 1;
101 }
102 }
103
104
105 void IfxHssl_Hssl_clearErrorFlags(IfxHssl_Hssl *hssl)
106 {
107 hssl->errorFlags.notAcknowledgeError = 0;
108 hssl->errorFlags.transactionTagError = 0;
109 hssl->errorFlags.timeoutError = 0;
110 hssl->errorFlags.unexpectedError = 0;
111 hssl->errorFlags.memoryAccessViolation = 0;
112 hssl->errorFlags.busAccessError = 0;
113 hssl->errorFlags.channelNumberCodeError = 0;
114 hssl->errorFlags.dataLengthError = 0;
115 hssl->errorFlags.crcError = 0;
116 }
117
118
119 void IfxHssl_Hssl_delay(IfxHssl_Hsct *hsct)
120 {
121 uint32 i;
122 IFX_UNUSED_PARAMETER(hsct);
123
124 for (i = 0; i < 8000; i++)
125 {
126 __nop();
127 }
128 }
129
130
131 void IfxHssl_Hssl_initChannel(IfxHssl_Hssl_Channel *channel, const IfxHssl_Hssl_ChannelConfig *channelConfig)
132 {
133 channel->hssl = channelConfig->hssl; /* adding HSSL register pointer to channel handle */
134 channel->hsct = channelConfig->hsct; /* adding HSCT register pointer to channel handle */
135
136 channel->channelId = channelConfig->channelId; /* adding channel id to channel handle */
137 channel->currentFrameRequest = IfxHssl_Hssl_FrameRequest_noAction; /* default request, no action */
138
139 channel->streamingModeOn = FALSE; /* command mode (used in waitAcknowledge function) */
140 channel->streamingMode = channelConfig->streamingMode; /* adding streaming mode to channel handle */
141 channel->loopBack = channelConfig->loopBack; /* adding loopback selection to channel handle */
142 }
143
144
145 void IfxHssl_Hssl_initChannelConfig(IfxHssl_Hssl_ChannelConfig *channelConfig, IfxHssl_Hssl *hssl, IfxHssl_Hsct *hsct)
146 {
147 channelConfig->hssl = hssl->hssl;
148 channelConfig->hsct = hsct->hsct;
149
150 channelConfig->channelId = IfxHssl_ChannelId_0; /* default channel 0 */
151 channelConfig->streamingMode = IfxHssl_StreamingMode_single; /* default streaming mode continuous */
152 channelConfig->loopBack = hsct->loopBack;
153 hssl->loopBack = hsct->loopBack; /* copy to hssl handle, used in trasfer apis */
154 }
155
156
157 void IfxHssl_Hssl_initHsctModule(IfxHssl_Hsct *hsct, const IfxHssl_Hsct_Config *config)
158 {
159 Ifx_HSCT *hsctSFR = config->hsct; /* pointer to HSCT registers */
160
161 hsct->hsct = hsctSFR; /* adding HSCT register pointer to module handle */
162 hsct->loopBack = config->loopBack; /* adding loopback selection to module handle */
163
164 #ifndef IFXHSSL_HSCT_DISABLE_PINCONFIG
165 /* Pad initialisiation */
166 IfxPort_setPinModeInput(&MODULE_P21, 2, IfxPort_InputMode_noPullDevice); /* RXDN */
167 IfxPort_setPinModeInput(&MODULE_P21, 3, IfxPort_InputMode_noPullDevice); /* RXDP */
168 IfxPort_setPinModeOutput(&MODULE_P21, 4, IfxPort_OutputMode_pushPull, IfxPort_OutputIdx_general); /* TXDN */
169 IfxPort_setPinModeOutput(&MODULE_P21, 5, IfxPort_OutputMode_pushPull, IfxPort_OutputIdx_general); /* TXDP */
170
171 /* select the clock direction */
172 if (config->interfaceMode == IfxHssl_InterfaceMode_master)
173 {
174 IfxPort_setPinModeOutput(&MODULE_P20, 0, IfxPort_OutputMode_pushPull, IfxPort_OutputIdx_alt5); /* CLKOUT */
175 #ifdef IFXHSSL_HSCT_ENABLE_SYS_CLK_DIV_2
176 IfxPort_setPinPadDriver(&MODULE_P20, 0, IfxPort_PadDriver_cmosAutomotiveSpeed2);
177 #else
178 IfxPort_setPinPadDriver(&MODULE_P20, 0, IfxPort_PadDriver_cmosAutomotiveSpeed1);
179 #endif
180 }
181 else
182 {
183 IfxPort_setPinModeInput(&MODULE_P20, 0, IfxPort_InputMode_pullDown); /* CLKIN */
184 }
185
186 if (config->loopBack == FALSE)
187 /* LVDS configuration */
188 {
189 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
190 IfxScuWdt_clearCpuEndinit(psw); /* clears the endinit protection */
191
192 P21_LPCR1.B.REN_CTRL = 1;
193 P21_LPCR1.B.RX_EN = 1;
194
195 P21_LPCR2.B.TEN_CTRL = 1;
196 P21_LPCR2.B.TX_EN = 1;
197 P21_LPCR2.B.TX_PD = 0;
198 P21_LPCR1.B.LVDSM = 0; /* Setting P21 to LVDS-H mode */
199
200 IfxScuWdt_setCpuEndinit(psw); /* sets the endinit protection back on */
201 }
202
203 #endif
204
205 /* HSCT initialisation */
206 IfxHssl_enableHsctModule(hsctSFR); /* enabling the HSCT module */
207
208 hsctSFR->IRQCLR.B.TXTECLR = 1; /* due to AI */
209
210 /* slave interface initialisation */
211 if (config->interfaceMode == IfxHssl_InterfaceMode_slave) /* slave mode initialisation */
212 {
213 hsctSFR->INIT.B.IFM = IfxHssl_InterfaceMode_slave; /* slave mode */
214 hsctSFR->INIT.B.SYS_CLK_EN = 0; /* disabling the system clock */
215 #ifdef IFXHSSL_HSCT_ENABLE_REF_CLK_10MHZ
216 hsctSFR->INIT.B.SRCF = IfxHssl_RefClockFrequency_10Mhz; /* Reference Clock Frequency rate 10 MHz */
217 #else
218 hsctSFR->INIT.B.SRCF = IfxHssl_RefClockFrequency_20Mhz; /* Reference Clock Frequency rate 20 MHz */
219 #endif
220
221 #ifdef IFXHSSL_HSCT_ENABLE_SYS_CLK_DIV_2
222 hsctSFR->INIT.B.SSCF = IfxHssl_SysClockDivider_2; /* SysClk divider 1/2 */
223 #else
224 hsctSFR->INIT.B.SSCF = IfxHssl_SysClockDivider_1; /* SysClk divider 1/1 */
225 #endif
226 hsctSFR->CONFIGPHY.B.PON = 1; /* Peripheral power on */
227
228 hsctSFR->DISABLE.U = 0;
229 }
230
231 /* master interface initialisation */
232 else /* master mode initialisation */
233 {
234 hsctSFR->INIT.B.IFM = IfxHssl_InterfaceMode_master; /* master mode */
235 hsctSFR->INIT.B.SYS_CLK_EN = 1; /* enabling the system clock */
236 #ifdef IFXHSSL_HSCT_ENABLE_REF_CLK_10MHZ
237 hsctSFR->INIT.B.SRCF = IfxHssl_RefClockFrequency_10Mhz; /* Reference Clock Frequency rate 10 MHz */
238 #else
239 hsctSFR->INIT.B.SRCF = IfxHssl_RefClockFrequency_20Mhz; /* Reference Clock Frequency rate 20 MHz */
240 #endif
241
242 #ifdef IFXHSSL_HSCT_ENABLE_SYS_CLK_DIV_2
243 hsctSFR->INIT.B.SSCF = IfxHssl_SysClockDivider_2; /* SysClk divider 1/2 */
244 #else
245 hsctSFR->INIT.B.SSCF = IfxHssl_SysClockDivider_1; /* SysClk divider 1/1 */
246 #endif
247 hsctSFR->CONFIGPHY.B.PON = 1; /* Peripheral power on */
248 hsctSFR->IFCTRL.B.MTXSPEED = IfxHssl_MasterModeTxSpeed_lowSpeed; /* Tx low speed */
249 hsctSFR->IFCTRL.B.MRXSPEED = IfxHssl_MasterModeRxSpeed_lowSpeed; /* Rx low speed */
250
251 /* change from low speed to high speed */
252 if (config->highSpeedMode)
253 {
254 hsctSFR->IFCTRL.B.MTXSPEED = IfxHssl_MasterModeTxSpeed_highSpeed; /* Tx high speed */
255 hsctSFR->IFCTRL.B.MRXSPEED = IfxHssl_MasterModeRxSpeed_highSpeed; /* Rx high speed */
256 }
257
258 hsctSFR->DISABLE.U = 0;
259
260 while (hsctSFR->STATPHY.B.PLOCK == 0) /* wait until pll is locked */
261 {}
262 }
263 }
264
265
266 void IfxHssl_Hssl_initHsctModuleConfig(IfxHssl_Hsct_Config *config, Ifx_HSCT *hsct)
267 {
268 config->hsct = hsct;
269
270 /* interface mode */
271 config->interfaceMode = IfxHssl_InterfaceMode_master;
272
273 /* high speed mode disabled */
274 config->highSpeedMode = FALSE;
275
276 config->loopBack = FALSE; /* default with out loopback */
277 }
278
279
280 void IfxHssl_Hssl_initHsslModule(IfxHssl_Hssl *hssl, const IfxHssl_Hssl_Config *config)
281 {
282 Ifx_HSSL *hsslSFR = config->hssl; /* pointer to HSSL registers */
283
284 hssl->hssl = hsslSFR; /* adding HSSL register pointer to module handle */
285
286 /* HSSL initialisation */
287 IfxHssl_enableHsslModule(hsslSFR); /* enabling the HSSL module */
288 hsslSFR->CFG.B.PREDIV = config->preDivider; /* predivivder */
289 hsslSFR->CFG.B.SCM = 0; /* command mode */
290
291 /* Access windows */
292 hsslSFR->AW[0].AWSTART.U = config->accessWindow0.start; /* start of access window */
293 hsslSFR->AW[0].AWEND.U = config->accessWindow0.end; /* end of access window */
294 hsslSFR->AW[1].AWSTART.U = config->accessWindow1.start; /* start of access window */
295 hsslSFR->AW[1].AWEND.U = config->accessWindow1.end; /* end of access window */
296 hsslSFR->AW[2].AWSTART.U = config->accessWindow2.start; /* start of access window */
297 hsslSFR->AW[2].AWEND.U = config->accessWindow2.end; /* end of access window */
298 hsslSFR->AW[3].AWSTART.U = config->accessWindow3.start; /* start of access window */
299 hsslSFR->AW[3].AWEND.U = config->accessWindow3.end; /* end of access window */
300
301 hsslSFR->AR.U = 0x000000ff; /* allow read/write access for all windows */
302
303 hsslSFR->MFLAGSCL.B.INIC = 1; /* chnage into run mode */
304 hsslSFR->TIDADD.U = (Ifx_UReg_32Bit)IFXHSSL_JTAG_ID_ADDRESS; /* Writing JTAG_ID of the device to TIDADD.This'll be used in the response when the other device queries for ID */
305
306 while (hsslSFR->MFLAGS.B.INI) /* wait until the mode changes */
307 {}
308 }
309
310
311 void IfxHssl_Hssl_initHsslModuleConfig(IfxHssl_Hssl_Config *config, Ifx_HSSL *hssl)
312 {
313 config->hssl = hssl;
314
315 /* Access windows */
316 config->accessWindow0.start = 0x00000000; /* start of access window */
317 config->accessWindow0.end = 0xffffffff; /* end of access window */
318 config->accessWindow1.start = 0x00000000; /* start of access window */
319 config->accessWindow1.end = 0xffffffff; /* end of access window */
320 config->accessWindow2.start = 0x00000000; /* start of access window */
321 config->accessWindow2.end = 0xffffffff; /* end of access window */
322 config->accessWindow3.start = 0x00000000; /* start of access window */
323 config->accessWindow3.end = 0xffffffff; /* end of access window */
324
325 /* predivider */
326 config->preDivider = 256;
327 }
328
329
330 IfxHssl_Hssl_Status IfxHssl_Hssl_prepareStream(IfxHssl_Hssl_Channel *channel, uint32 slaveTargetAddress, Ifx_SizeT count)
331 {
332 IfxHssl_ChannelId channelId = channel->channelId;
333 Ifx_HSSL_TS_FC tsfcReg;
334
335 if (channelId == IfxHssl_ChannelId_2)
336 {
337 return IfxHssl_Hssl_Status_error;
338 }
339
340 /* target start address to memeroy block 0 on target device (writing into HSSL_TSSA0 of the target) */
341 IfxHssl_Hssl_singleFrameRequest(channel, IfxHssl_Hssl_FrameRequest_writeFrame, (uint32)&channel->hssl->TS.SA[0], slaveTargetAddress, IfxHssl_DataLength_32bit);
342
343 while (IfxHssl_Hssl_waitAcknowledge(channel) != IfxHssl_Hssl_Status_ok)
344 {
345 if (IfxHssl_Hssl_waitAcknowledge(channel) == IfxHssl_Hssl_Status_error)
346 {
347 return IfxHssl_Hssl_Status_error;
348 }
349 }
350
351 /* Precautionary measure on target for any last streaming interruption */
352 /* Read count register on the target */
353 IfxHssl_Hssl_read(channel, (uint32)&channel->hssl->TS.FC, IfxHssl_DataLength_32bit);
354
355 while (IfxHssl_Hssl_waitAcknowledge(channel) != IfxHssl_Hssl_Status_ok)
356 {
357 if (IfxHssl_Hssl_waitAcknowledge(channel) == IfxHssl_Hssl_Status_error)
358 {
359 return IfxHssl_Hssl_Status_error;
360 }
361 }
362
363 tsfcReg.U = IfxHssl_Hssl_getReadData(channel);
364 tsfcReg.B.RELCOUNT = tsfcReg.B.CURCOUNT;
365 /* Set the RELCOUNT equal to CURCOUNT on the target */
366 IfxHssl_Hssl_singleFrameRequest(channel, IfxHssl_Hssl_FrameRequest_writeFrame, (uint32)&channel->hssl->TS.FC, count, IfxHssl_DataLength_16bit);
367
368 while (IfxHssl_Hssl_waitAcknowledge(channel) != IfxHssl_Hssl_Status_ok)
369 {
370 if (IfxHssl_Hssl_waitAcknowledge(channel) == IfxHssl_Hssl_Status_error)
371 {
372 return IfxHssl_Hssl_Status_error;
373 }
374 }
375
376 /* Disable the streaming on the target */
377 IfxHssl_Hssl_singleFrameRequest(channel, IfxHssl_Hssl_FrameRequest_writeFrame, (uint32)&channel->hssl->MFLAGSCL, (1 << IFX_HSSL_MFLAGSCL_TSEC_OFF), IfxHssl_DataLength_32bit);
378
379 while (IfxHssl_Hssl_waitAcknowledge(channel) != IfxHssl_Hssl_Status_ok)
380 {
381 if (IfxHssl_Hssl_waitAcknowledge(channel) == IfxHssl_Hssl_Status_error)
382 {
383 return IfxHssl_Hssl_Status_error;
384 }
385 }
386
387 /* memory count into target reload count register on target device */
388 IfxHssl_Hssl_singleFrameRequest(channel, IfxHssl_Hssl_FrameRequest_writeFrame, (uint32)&channel->hssl->TS.FC, count, IfxHssl_DataLength_16bit);
389
390 while (IfxHssl_Hssl_waitAcknowledge(channel) != IfxHssl_Hssl_Status_ok)
391 {
392 if (IfxHssl_Hssl_waitAcknowledge(channel) == IfxHssl_Hssl_Status_error)
393 {
394 return IfxHssl_Hssl_Status_error;
395 }
396 }
397
398 /* incase of transfers between two different devices (loopback off) */
399 if (!channel->loopBack)
400 {
401 /* Get the target configuration */
402 IfxHssl_Hssl_read(channel, (uint32)&channel->hssl->CFG, IfxHssl_DataLength_32bit);
403
404 while (IfxHssl_Hssl_waitAcknowledge(channel) != IfxHssl_Hssl_Status_ok)
405 {
406 if (IfxHssl_Hssl_waitAcknowledge(channel) == IfxHssl_Hssl_Status_error)
407 {
408 return IfxHssl_Hssl_Status_error;
409 }
410 }
411
412 /* Check if the target streaming is enabled */
413 if ((IfxHssl_Hssl_getReadData(channel) & (0x00070100)) != 0x00070100)
414 {
415 /* enable streaming mode (single) of channel 2 on target device */
416 IfxHssl_Hssl_singleFrameRequest(channel, IfxHssl_Hssl_FrameRequest_writeFrame, (uint32)&channel->hssl->CFG, 0x00070100, IfxHssl_DataLength_32bit);
417
418 while (IfxHssl_Hssl_waitAcknowledge(channel) != IfxHssl_Hssl_Status_ok)
419 {
420 if (IfxHssl_Hssl_waitAcknowledge(channel) == IfxHssl_Hssl_Status_error)
421 {
422 return IfxHssl_Hssl_Status_error;
423 }
424 }
425 }
426
427 /* enable streaming on target device */
428 IfxHssl_Hssl_singleFrameRequest(channel, IfxHssl_Hssl_FrameRequest_writeFrame, (uint32)&channel->hssl->MFLAGSSET, 0x10000000, IfxHssl_DataLength_32bit);
429
430 while (IfxHssl_Hssl_waitAcknowledge(channel) != IfxHssl_Hssl_Status_ok)
431 {
432 if (IfxHssl_Hssl_waitAcknowledge(channel) == IfxHssl_Hssl_Status_error)
433 {
434 return IfxHssl_Hssl_Status_error;
435 }
436 }
437 }
438
439 channel->streamingModeOn = TRUE; /* for waitAcknowledge function */
440 /* preperation was successful */
441 return IfxHssl_Hssl_Status_ok;
442 }
443
444
445 IfxHssl_Hssl_Status IfxHssl_Hssl_read(IfxHssl_Hssl_Channel *channel, uint32 address, IfxHssl_DataLength dataLength)
446 {
447 uint32 data = 0; /* not required, data will be read back */
448 return IfxHssl_Hssl_singleFrameRequest(channel, IfxHssl_Hssl_FrameRequest_readFrame, address, data, dataLength); /* initiate the read request */
449 }
450
451
452 void IfxHssl_Hssl_sendControlCommand(IfxHssl_Hsct *hsct, uint8 command)
453 {
454 Ifx_HSCT *hsctSFR = hsct->hsct;
455
456 hsctSFR->IFCTRL.B.IFCVS = command; /* write the command into the register */
457 hsctSFR->IFCTRL.B.SIFCV = 1; /* activate the command */
458
459 IfxHssl_Hssl_delay(hsct); /* wait until the change happens */
460 }
461
462
463 IfxHssl_Hssl_Status IfxHssl_Hssl_singleFrameRequest(IfxHssl_Hssl_Channel *channel, IfxHssl_Hssl_FrameRequest frameRequest, uint32 address, uint32 data, IfxHssl_DataLength dataLength)
464 {
465 Ifx_HSSL_I *hsslI = (Ifx_HSSL_I *)&channel->hssl->I[channel->channelId];
466
467 if (channel->currentFrameRequest != IfxHssl_Hssl_FrameRequest_noAction)
468 {
469 return IfxHssl_Hssl_Status_busy;
470 }
471
472 hsslI->ICON.B.DATLEN = dataLength; /* 0x2 -> word size */
473 hsslI->ICON.B.TOREL = 0xff; /* max reload value */
474
475 switch (frameRequest)
476 {
477 case IfxHssl_Hssl_FrameRequest_readFrame:
478 hsslI->ICON.B.RWT = IfxHssl_Command_readFrame;
479 hsslI->IRWA.U = address;
480 break;
481 case IfxHssl_Hssl_FrameRequest_writeFrame:
482 hsslI->ICON.B.RWT = IfxHssl_Command_writeFrame;
483 hsslI->IWD.U = data;
484 hsslI->IRWA.U = address;
485 break;
486 case IfxHssl_Hssl_FrameRequest_triggerFrame:
487 hsslI->ICON.B.RWT = IfxHssl_Command_triggerFrame;
488 hsslI->IWD.U = data; /* dummy */
489 hsslI->IRWA.U = address; /* dummy */
490 break;
491 case IfxHssl_Hssl_FrameRequest_readId:
492 /* request an ID frame */
493 hsslI->ICON.B.IDQ = 1;
494 break;
495 default:
496 /* invalid request */
497 return IfxHssl_Hssl_Status_error;
498 }
499
500 channel->currentFrameRequest = frameRequest;
501
502 return IfxHssl_Hssl_Status_ok;
503 }
504
505
506 IfxHssl_Hssl_Status IfxHssl_Hssl_waitAcknowledge(IfxHssl_Hssl_Channel *channel)
507 {
508 uint32 requestType = channel->currentFrameRequest;
509 IfxHssl_ChannelId channelId = channel->channelId;
510
511 if ((channelId == IfxHssl_ChannelId_2) && (channel->hssl->CFG.B.SCM == 1))
512 {
513 while (channel->hssl->MFLAGS.B.ISB)
514 {
515 /* transfer in progress */
516 }
517 }
518 else
519 {
520 if (channel->currentFrameRequest == IfxHssl_Hssl_FrameRequest_writeFrame)
521 {
522 requestType = 1;
523 }
524
525 /* expect a read frame when requestType == IfxHssl_Hssl_FrameRequest_readId */
526 if ((channel->currentFrameRequest == IfxHssl_Hssl_FrameRequest_readFrame) || (channel->currentFrameRequest == IfxHssl_Hssl_FrameRequest_readId))
527 {
528 requestType = 2;
529 }
530
531 if (channel->currentFrameRequest == IfxHssl_Hssl_FrameRequest_triggerFrame)
532 {
533 requestType = 3;
534 }
535
536 uint32 qFlags = channel->hssl->QFLAGS.U;
537 uint32 mFlags = channel->hssl->MFLAGS.U;
538 uint32 acknwoledgeFlagsMask = ((requestType << (16 + (channel->channelId * 2))) | (1 << channel->channelId));
539 uint32 errorFlagsMask = ((0x03E00000) | (4369 << channel->channelId)); /* all the possible errors */
540
541 if (channel->hssl->I[channelId].ICON.B.BSY == 1)
542 {
543 return IfxHssl_Hssl_Status_busy;
544 }
545
546 if (qFlags & acknwoledgeFlagsMask) /* transfer in progress? */
547 {
548 return IfxHssl_Hssl_Status_busy; /* return busy status in case of no error */
549 }
550
551 if (mFlags & errorFlagsMask) /* check for errors */
552 {
553 channel->currentFrameRequest = IfxHssl_Hssl_FrameRequest_noAction;
554 return IfxHssl_Hssl_Status_error; /* return error status in case of an error */
555 }
556
557 /* transfer is finished */
558 channel->currentFrameRequest = IfxHssl_Hssl_FrameRequest_noAction;
559 }
560
561 return IfxHssl_Hssl_Status_ok;
562 }
563
564
565 IfxHssl_Hssl_Status IfxHssl_Hssl_write(IfxHssl_Hssl_Channel *channel, uint32 address, uint32 data, IfxHssl_DataLength dataLength)
566 {
567 return IfxHssl_Hssl_singleFrameRequest(channel, IfxHssl_Hssl_FrameRequest_writeFrame, address, data, dataLength);
568 }
569
570
571 IfxHssl_Hssl_Status IfxHssl_Hssl_writeStream(IfxHssl_Hssl *hssl, uint32 *data, Ifx_SizeT count)
572 {
573 Ifx_HSSL *hsslSFR = hssl->hssl;
574 Ifx_HSSL_IS *hsslIS = (Ifx_HSSL_IS *)&hsslSFR->IS;
575 IfxHssl_StreamingMode streamingMode = IfxHssl_StreamingMode_single;
576
577 /* single memory block streaming */
578 hsslIS->SA[0].U = (uint32)data; /* initiator start address to memeroy block 0 */
579
580 hsslIS->FC.B.RELCOUNT = count; /* memory count into initiator reload count register */
581
582 hsslSFR->CFG.B.SCM = 1; /* enable streaming mode of channel 2 on the initiator */
583 hsslSFR->CFG.B.SMT = streamingMode; /* set transmitter streaming mode ( single / continuous ) on the initiator */
584 hsslSFR->CFG.B.SMR = streamingMode; /* set receiver streaming mode ( single / continuous ) on the initiator */
585 /* streaming is supported only on IfxHssl_ChannelId_2 */
586 hsslSFR->I[IfxHssl_ChannelId_2].ICON.B.TOREL = 0xff; /* set the transmitter reload value to 0xff.*/
587
588 /* incase of transfers within the device(loopback on) */
589 if (hssl->loopBack)
590 {
591 hsslSFR->MFLAGSSET.B.TSES = 1; /* enable target */
592 }
593
594 /* initiate the transfer */
595 hsslSFR->MFLAGSSET.B.ISBS = 1;
596
597 /* streaming started */
598 return IfxHssl_Hssl_Status_ok;
599 }
IfxHssl_ChannelId
IfxHssl_ChannelId
channel selection
Definition: IfxHssl.h:74
IfxHssl_Hssl_Channel::channelId
IfxHssl_ChannelId channelId
channel number (id)
Definition: IfxHssl_Hssl.h:540
IfxHssl_Hssl_Config
configuration structure of the HSSL module
Definition: IfxHssl_Hssl.h:560
IfxHssl_Hssl_AccessWindow::start
uint32 start
start of the access
Definition: IfxHssl_Hssl.h:502
IfxHssl_MasterModeTxSpeed_lowSpeed
low speed
Definition: IfxHssl.h:186
IfxHssl_Hssl_initChannel
void IfxHssl_Hssl_initChannel(IfxHssl_Hssl_Channel *channel, const IfxHssl_Hssl_ChannelConfig *channelConfig)
Initialises the channel.
Definition: IfxHssl_Hssl.c:131
IfxHssl_StreamingMode
IfxHssl_StreamingMode
streaming mode ( single / continuous ) Definition in Ifx_HSSL.CFG.B.SMT/SMR
Definition: IfxHssl.h:212
IfxHssl_Hssl_initHsctModuleConfig
void IfxHssl_Hssl_initHsctModuleConfig(IfxHssl_Hsct_Config *config, Ifx_HSCT *hsct)
Fills the config structure with default values.
Definition: IfxHssl_Hssl.c:266
IfxHssl_Hssl_errorFlags::transactionTagError
uint8 transactionTagError
transaction tag error
Definition: IfxHssl_Hssl.h:513
IfxHssl_Hssl_errorFlags::unexpectedError
uint8 unexpectedError
unexpected type of frame error
Definition: IfxHssl_Hssl.h:515
IfxPort_OutputMode_pushPull
Definition: IfxPort.h:142
IfxHssl_Hssl_Channel::currentFrameRequest
IfxHssl_Hssl_FrameRequest currentFrameRequest
current frame request
Definition: IfxHssl_Hssl.h:541
IfxHssl_Hssl_initHsctModule
void IfxHssl_Hssl_initHsctModule(IfxHssl_Hsct *hsct, const IfxHssl_Hsct_Config *config)
Initialises the module.
Definition: IfxHssl_Hssl.c:157
IfxHssl_Hssl_delay
void IfxHssl_Hssl_delay(IfxHssl_Hsct *hsct)
a simple software delay
Definition: IfxHssl_Hssl.c:119
IfxHssl_enableHsslModule
void IfxHssl_enableHsslModule(Ifx_HSSL *hssl)
Enables the hssl module.
Definition: IfxHssl.c:80
IfxHssl_Hsct_Config::interfaceMode
IfxHssl_InterfaceMode interfaceMode
interface mode (master IF /slave IF)
Definition: IfxHssl.h:282
__nop
void __nop(void) __attribute__((intrinsic_function(0x103
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxHssl_Hsct::loopBack
boolean loopBack
loopc back selection
Definition: IfxHssl.h:274
IfxHssl_MasterModeRxSpeed_lowSpeed
low speed
Definition: IfxHssl.h:176
IfxHssl_Hssl_Config::preDivider
uint16 preDivider
Defines the down-scaled module clock to be used by all channel timeout timers.
Definition: IfxHssl_Hssl.h:567
IfxHssl_Hssl_initChannelConfig
void IfxHssl_Hssl_initChannelConfig(IfxHssl_Hssl_ChannelConfig *channelConfig, IfxHssl_Hssl *hssl, IfxHssl_Hsct *hsct)
Fills the channel config structure with default values.
Definition: IfxHssl_Hssl.c:145
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:322
IfxHssl_Hsct
HSCT module handle.
Definition: IfxHssl.h:271
IfxHssl_enableHsctModule
void IfxHssl_enableHsctModule(Ifx_HSCT *hsct)
Enables hsct module.
Definition: IfxHssl.c:71
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxHssl_ChannelId_0
Channel 0.
Definition: IfxHssl.h:76
IfxHssl_Hssl_FrameRequest_readFrame
read frame rquest
Definition: IfxHssl_Hssl.h:474
IfxHssl_RefClockFrequency_20Mhz
SysClk/ RefClk is 20 MHz.
Definition: IfxHssl.h:205
IfxHssl_Hssl_errorFlags::busAccessError
uint8 busAccessError
SRI/SPB bus access error.
Definition: IfxHssl_Hssl.h:517
IfxHssl_Hssl_FrameRequest_writeFrame
write frame rquest
Definition: IfxHssl_Hssl.h:475
IfxHssl_Hssl_write
IfxHssl_Hssl_Status IfxHssl_Hssl_write(IfxHssl_Hssl_Channel *channel, uint32 address, uint32 data, IfxHssl_DataLength dataLength)
writes single frame of data into the specified address
Definition: IfxHssl_Hssl.c:565
IfxHssl_Hssl_initHsslModule
void IfxHssl_Hssl_initHsslModule(IfxHssl_Hssl *hssl, const IfxHssl_Hssl_Config *config)
Initialises the Hssl module.
Definition: IfxHssl_Hssl.c:280
IfxHssl_InterfaceMode_master
master IF mode
Definition: IfxHssl.h:167
IfxPort_setPinModeInput
IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode.
Definition: IfxPort.h:669
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxHssl_Hssl_errorFlags::notAcknowledgeError
uint8 notAcknowledgeError
not acknowledge error / tag error
Definition: IfxHssl_Hssl.h:512
IfxHssl_Hssl_FrameRequest_readId
read id request
Definition: IfxHssl_Hssl.h:477
IfxHssl_Hssl_Channel
channel handle
Definition: IfxHssl_Hssl.h:536
IfxHssl_Hssl_errorFlags::channelNumberCodeError
uint8 channelNumberCodeError
PHY inconsistency error 1 (channel number code error)
Definition: IfxHssl_Hssl.h:518
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxHssl_Hssl_FrameRequest_noAction
no action
Definition: IfxHssl_Hssl.h:478
IfxHssl_Hssl_errorFlags::timeoutError
uint8 timeoutError
timeout error
Definition: IfxHssl_Hssl.h:514
IfxPort_OutputIdx_general
Definition: IfxPort.h:128
IfxHssl_Hssl_Config::accessWindow0
IfxHssl_Hssl_AccessWindow accessWindow0
access window of channel 0
Definition: IfxHssl_Hssl.h:563
IfxHssl_Hssl_prepareStream
IfxHssl_Hssl_Status IfxHssl_Hssl_prepareStream(IfxHssl_Hssl_Channel *channel, uint32 slaveTargetAddress, Ifx_SizeT count)
Prepares the target device for streaming.
Definition: IfxHssl_Hssl.c:330
IfxHssl_SysClockDivider_2
SysClk Divider 1/2.
Definition: IfxHssl.h:233
IfxPort_PadDriver_cmosAutomotiveSpeed1
Speed grade 1.
Definition: IfxPort.h:153
IfxHssl_Hssl::hssl
Ifx_HSSL * hssl
pointer to HSSL register
Definition: IfxHssl_Hssl.h:529
IfxHssl_Hssl_sendControlCommand
void IfxHssl_Hssl_sendControlCommand(IfxHssl_Hsct *hsct, uint8 command)
sends a predefined command from master to slave
Definition: IfxHssl_Hssl.c:452
IfxHssl_Command_writeFrame
command write frame
Definition: IfxHssl.h:89
IfxHssl_Hssl_errorFlags::dataLengthError
uint8 dataLengthError
PHY inconsistency error 2 (data length error)
Definition: IfxHssl_Hssl.h:519
IfxHssl_Hssl_Channel::hsct
Ifx_HSCT * hsct
pointer to HSCT registers
Definition: IfxHssl_Hssl.h:539
IfxHssl_Hssl_Status_ok
status ok
Definition: IfxHssl_Hssl.h:485
IfxHssl_Hssl_ChannelConfig
configuration structure for channel
Definition: IfxHssl_Hssl.h:549
IfxHssl_RefClockFrequency_10Mhz
SysClk/ RefClk is 10 MHz.
Definition: IfxHssl.h:204
IFXHSSL_JTAG_ID_ADDRESS
#define IFXHSSL_JTAG_ID_ADDRESS
Definition: IfxHssl_cfg.h:70
IfxPort_InputMode_noPullDevice
Definition: IfxPort.h:84
IfxHssl_InterfaceMode_slave
slave IF mode
Definition: IfxHssl.h:168
IfxHssl_Hssl_checkErrors
void IfxHssl_Hssl_checkErrors(IfxHssl_Hssl *hssl)
stores the status of errors in the respective members of the error flags structure ...
Definition: IfxHssl_Hssl.c:53
IfxHssl_Hssl
HSSL Handle.
Definition: IfxHssl_Hssl.h:527
IfxHssl_Command_triggerFrame
command trigger frame
Definition: IfxHssl.h:90
IfxHssl_DataLength
IfxHssl_DataLength
Defines the length of the data in bits of the write and read command. Definition in Ifx_HSSL...
Definition: IfxHssl.h:115
IfxHssl_Hssl_writeStream
IfxHssl_Hssl_Status IfxHssl_Hssl_writeStream(IfxHssl_Hssl *hssl, uint32 *data, Ifx_SizeT count)
transfers one memory block of data useful for transfering huge data from one location to another and ...
Definition: IfxHssl_Hssl.c:571
IfxHssl_MasterModeTxSpeed_highSpeed
high speed
Definition: IfxHssl.h:187
IfxHssl_DataLength_16bit
16 bit
Definition: IfxHssl.h:118
IfxHssl_Hssl.h
HSSL HSSL details.
IfxHssl_Hsct_Config::highSpeedMode
boolean highSpeedMode
high speed mode selection
Definition: IfxHssl.h:283
IfxHssl_DataLength_32bit
32 bit
Definition: IfxHssl.h:119
IfxHssl_Hssl_Status_error
status error
Definition: IfxHssl_Hssl.h:487
IfxHssl_Hssl_Config::accessWindow1
IfxHssl_Hssl_AccessWindow accessWindow1
access window of channel 1
Definition: IfxHssl_Hssl.h:564
IfxHssl_MasterModeRxSpeed_highSpeed
high speed
Definition: IfxHssl.h:178
IfxPort_InputMode_pullDown
Definition: IfxPort.h:85
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxHssl_Hssl_read
IfxHssl_Hssl_Status IfxHssl_Hssl_read(IfxHssl_Hssl_Channel *channel, uint32 address, IfxHssl_DataLength dataLength)
Initiates read request.
Definition: IfxHssl_Hssl.c:445
IfxHssl_Hsct_Config
Configuration structure of the HSCT module.
Definition: IfxHssl.h:279
IfxHssl_Hssl_Status_busy
status busy
Definition: IfxHssl_Hssl.h:486
IfxHssl_SysClockDivider_1
SysClk Divider 1/1.
Definition: IfxHssl.h:232
IfxHssl_Hssl_FrameRequest_triggerFrame
trigger frame rquest
Definition: IfxHssl_Hssl.h:476
IfxHssl_Command_readFrame
command read frame
Definition: IfxHssl.h:88
IfxHssl_ChannelId_2
Channel 2.
Definition: IfxHssl.h:78
IfxHssl_Hssl_Channel::loopBack
boolean loopBack
loopback (enable / disable) for streaming transfers within the microcontroller
Definition: IfxHssl_Hssl.h:543
IfxHssl_Hssl_getReadData
IFX_INLINE uint32 IfxHssl_Hssl_getReadData(IfxHssl_Hssl_Channel *channel)
reads and returs the data
Definition: IfxHssl_Hssl.h:793
IfxHssl_StreamingMode_single
streaming mode single (with one memory block)
Definition: IfxHssl.h:215
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxPort_OutputIdx_alt5
Definition: IfxPort.h:133
IfxHssl_Hssl_initHsslModuleConfig
void IfxHssl_Hssl_initHsslModuleConfig(IfxHssl_Hssl_Config *config, Ifx_HSSL *hssl)
Fills the config structure with default values.
Definition: IfxHssl_Hssl.c:311
IfxHssl_Hssl_singleFrameRequest
IfxHssl_Hssl_Status IfxHssl_Hssl_singleFrameRequest(IfxHssl_Hssl_Channel *channel, IfxHssl_Hssl_FrameRequest frameRequest, uint32 address, uint32 data, IfxHssl_DataLength dataLength)
serves the frame request (read, write, trigger frame and read id)
Definition: IfxHssl_Hssl.c:463
IfxHssl_Hssl_AccessWindow::end
uint32 end
end of the access
Definition: IfxHssl_Hssl.h:503
TRUE
#define TRUE
Definition: Platform_Types.h:90
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
IfxHssl_Hssl_FrameRequest
IfxHssl_Hssl_FrameRequest
frame request selection
Definition: IfxHssl_Hssl.h:472
IfxPort_PadDriver_cmosAutomotiveSpeed2
Speed grade 2.
Definition: IfxPort.h:154
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxHssl_Hssl::errorFlags
IfxHssl_Hssl_errorFlags errorFlags
structure for error flags
Definition: IfxHssl_Hssl.h:530
IfxHssl_Hssl_waitAcknowledge
IfxHssl_Hssl_Status IfxHssl_Hssl_waitAcknowledge(IfxHssl_Hssl_Channel *channel)
waits until the current transaction is done
Definition: IfxHssl_Hssl.c:506
IfxHssl_Hssl_Channel::streamingModeOn
boolean streamingModeOn
streaming mode or command mode
Definition: IfxHssl_Hssl.h:544
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:675
IfxHssl_Hssl_errorFlags::memoryAccessViolation
uint8 memoryAccessViolation
memory access violation
Definition: IfxHssl_Hssl.h:516
IfxHssl_Hssl_errorFlags::crcError
uint8 crcError
CRC error.
Definition: IfxHssl_Hssl.h:520
IfxHssl_Hssl_Status
IfxHssl_Hssl_Status
module status
Definition: IfxHssl_Hssl.h:483
IfxHssl_Hssl_Channel::streamingMode
IfxHssl_StreamingMode streamingMode
streaming mode selection ( single / continuous )
Definition: IfxHssl_Hssl.h:542
IfxHssl_Hssl_clearErrorFlags
void IfxHssl_Hssl_clearErrorFlags(IfxHssl_Hssl *hssl)
clears the status of members in the error flags structure
Definition: IfxHssl_Hssl.c:105
IfxHssl_Hsct::hsct
Ifx_HSCT * hsct
pointer to HSCT registers
Definition: IfxHssl.h:273
IfxHssl_Hssl_Config::accessWindow2
IfxHssl_Hssl_AccessWindow accessWindow2
access window of channel 2
Definition: IfxHssl_Hssl.h:565
IfxHssl_Hssl_Config::accessWindow3
IfxHssl_Hssl_AccessWindow accessWindow3
access window of channel 3
Definition: IfxHssl_Hssl.h:566


iLLD_TC38A: IfxHssl_Hssl.h Source File

  • Hssl
  • Hssl
IfxHssl_Hssl.h
Go to the documentation of this file.
1 /**
2 * \file IfxHssl_Hssl.h
3 * \brief HSSL HSSL details
4 * \ingroup IfxLld_Hssl
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 * \defgroup IfxLld_Hssl_Hssl_Usage How to use the HSSL Interface driver?
43 * \ingroup IfxLld_Hssl
44 *
45 * The HSSL interface driver provides a default HSSL/HSCT configuration for point to point communication at two transfer speeds, 5MBaud (low speed) and 320MBaud (high speed).
46 * It also supports streaming transfers of data a memory block at both low and high speeds.
47 *
48 * In the following sections it will be described, how to integrate the driver into the application framework.
49 *
50 * \section IfxLld_Hssl_Hssl_Preparation Preparation
51 * \subsection IfxLld_Hssl_Hssl_Include Include Files
52 *
53 * Include following header file into your C code:
54 * \code
55 * #include <Hssl/Hssl/IfxHssl_Hssl.h>
56 * \endcode
57 *
58 * \subsection IfxLld_Hssl_Hssl_Variables Variables
59 *
60 * Declare the HSSL handle, HSCT handle and channel array as global variables in your C code:
61 *
62 * \code
63 * // used globally
64 * static IfxHssl_Hssl hssl;
65 * static IfxHssl_Hsct hsct;
66 * IfxHssl_Hssl_Channel hsslChannel[4];
67 * __attribute__ ((aligned(256))) uint32 txData[80]; // needs to be declared globally in case of streaming transfers
68 * \endcode
69 *
70 * \subsection IfxLld_Hssl_Hssl_InitModule Module Initialisation
71 *
72 * The module initialisation can be done as follows:
73 *
74 * \code
75 * // create module config
76 * IfxHssl_Hsct_Config hsctConfig;
77 * IfxHssl_Hssl_initHsctModuleConfig(&hsctConfig, &MODULE_HSCT);
78 *
79 * // select the interface mode (in case of slave)
80 * hsctConfig.interfaceMode = IfxHssl_InterfaceMode_slave;
81 *
82 * // select the high speed mode if required
83 * hsctConfig.highSpeedMode = TRUE;
84 *
85 * // initialize module
86 * // IfxHssl_Hsct hsct; defined globally
87 * IfxHssl_Hssl_initHsctModule(&hsct, &hsctConfig);
88 *
89 * // create module config
90 * IfxHssl_Hssl_Config hsslConfig;
91 * IfxHssl_Hssl_initHsslModuleConfig(&hsslConfig, &MODULE_HSSL);
92 *
93 * // IfxHssl_Hssl hssl; defined globally
94 * IfxHssl_Hssl_initHsslModule(&hssl, &hsslConfig);
95 * \endcode
96 *
97 * If application intends to explicitly configure the pins for HSCT module IFXHSSL_HSCT_DISABLE_PINCONFIG macro should be defined in the application.
98 * The explicit pin assignment should be done prior to IfxHssl_Hssl_initHsctModule().
99 *
100 *
101 * For explicitly changing the default configuration of the REFCLK and the SYSCLK of HSCT module the below macros are provided
102 *
103 * IFXHSSL_HSCT_ENABLE_REF_CLK_10MHZ - This macro sets the REFCLK in the Hsct module to 10MHz (Default value of REFCLK is 20MHz).
104 *
105 * IFXHSSL_HSCT_ENABLE_SYS_CLK_DIV_2 - This macro sets the SYSCLK divider value. Recomended value for SYSCLK is 20MHz.
106 *
107 * Application can use the macros for changing the default clock configuration on HSCT module.
108 *
109 * Note: In case of HSCT Slave configuration, application has to select SysClk pin as the clock source.
110 *
111 * After the port initialisation of HSCT slave device ie. after calling IfxHssl_Hssl_initHsctModule(), configure the SCU system PLL as below
112 *
113 * \code
114 *
115 * IfxScuCcu_initConfig(&IfxScuCcu_sampleClockConfig);
116 * // Set the clock to SysClk generated from HSCT master interface
117 * IfxScuCcu_sampleClockConfig.pllInitialStepConfig.pllsParameters.pllInputClockSelection = IfxScuCcu_PllInputClockSelection_fSysclk;
118 * IfxScuCcu_init(&IfxScuCcu_sampleClockConfig);
119 * // Wait till PLL is locked
120 *
121 * \endcode
122 *
123 * \subsection IfxLld_Hssl_Hssl_InitChannel Channel Initialisation
124 *
125 * The Channel initialisation can be done as follows:
126 *
127 * \code
128 * // create HSSL channel config
129 * IfxHssl_Hssl_ChannelConfig hsslChannelConfig;
130 * IfxHssl_Hssl_initChannelConfig(&hsslChannelConfig, &hssl, &hsct);
131 *
132 * // initialize the channels
133 * // IfxHssl_Hssl_Channel hsslChannel[4]; defined globally
134 * for(int i=0; i<4; ++i)
135 * {
136 * hsslChannelConfig.channelId = (IfxHssl_ChannelId)i;
137 * IfxHssl_Hssl_initChannel(&hsslChannel[i], &hsslChannelConfig);
138 * }
139 * \endcode
140 *
141 * \subsection IfxLld_Hssl_Hssl_LinkSpeed Changing HSCT link speed
142 *
143 * The link speed change can be done as follows
144 *
145 * As per the above settings the HSCT master is in High speed reception and transmission.
146 *
147 * The pseudo code for setting the target to High speed is as below
148 *
149 * \code
150 *
151 * // Set the Tx link speed of the master to Low speed
152 * IfxHssl_setHsctTxLinkSpeed(&hsct , IfxHssl_MasterModeTxSpeed_lowSpeed);
153 *
154 * // Enable reception at the Slave
155 * IfxHssl_Hssl_sendControlCommand(&hsct,IfxHssl_ControlCommand_enableReception);
156 *
157 * // Send interface commmand to change Rx to High speed at the target
158 * IfxHssl_Hssl_sendControlCommand(&hsct,IfxHssl_ControlCommand_highSpeedReception);
159 *
160 * // Send interface commmand to change Tx to High speed at the target
161 * IfxHssl_Hssl_sendControlCommand(&hsct,IfxHssl_ControlCommand_highSpeedTransmission);
162 *
163 * // Set the Tx link speed of the master to High speed
164 * IfxHssl_setHsctTxLinkSpeed(&hsct , IfxHssl_MasterModeTxSpeed_highSpeed);
165 *
166 * \endcode
167 *
168 * The pseudo code for setitng the target to Low speed from High speed (ie. if hsctConfig.highSpeedMode is set to TRUE).
169 *
170 * \code
171 *
172 * // Set the Tx link speed of master to Low speed
173 * IfxHssl_setHsctTxLinkSpeed(&hsct , IfxHssl_MasterModeTxSpeed_lowSpeed);
174 *
175 * // Send interface command to change Rx to low speed at the target
176 * IfxHssl_Hssl_sendControlCommand(&hsct,IfxHssl_ControlCommand_lowSpeedReception);
177 *
178 * // Set the Rx link speed of master to Low speed
179 * IfxHssl_setHsctRxLinkSpeed(&hsct, IfxHssl_MasterModeRxSpeed_lowSpeed);
180 *
181 * // Send interface command to change Tx to low speed at the target
182 * IfxHssl_Hssl_sendControlCommand(&hsct,IfxHssl_ControlCommand_lowSpeedTransmission);
183 *
184 * \endcode
185 *
186 * The HSSL is ready for use now!
187 *
188 *
189 * \section IfxLld_Hssl_Hssl_DataTransfers Data Transfers
190 * \subsection IfxLld_Hssl_Hssl_SimpleTransfers Simple Transfers
191 *
192 * The HSSL driver provides simple to use data transfer functions,
193 *
194 * It supports direct writing of 8/16/32 bit data from the initiator into a target's register, as well as reading a value from the target
195 *
196 * \code
197 * // write some data to remote location:
198 * IfxHssl_Hssl_write(&hsslChannel[0], 0x70000000, 0x12345678, IfxHssl_DataLength_32bit);
199 *
200 * // wait for the acknowledgement
201 * while( IfxHssl_Hssl_waitAcknowledge(&hsslChannel[0]) != IfxHssl_Hssl_Status_ok )
202 * {
203 * if( IfxHssl_Hssl_waitAcknowledge(&hsslChannel[0]) == IfxHssl_Hssl_Status_error )
204 * {
205 * IfxHssl_Hssl_checkErrors(&hssl);
206 * break;
207 * }
208 * }
209 * \endcode
210 *
211 * A simple to use receive function is available as well.
212 *
213 * \code
214 * // read some data from remote location:
215 * IfxHssl_Hssl_read(&hsslChannel[0], 0x70000000, IfxHssl_DataLength_32bit);
216 *
217 * // wait for the acknowledgement
218 * while( IfxHssl_Hssl_waitAcknowledge(&hsslChannel[0]) != IfxHssl_Hssl_Status_ok )
219 * {
220 * if( IfxHssl_Hssl_waitAcknowledge(&hsslChannel[0]) == IfxHssl_Hssl_Status_error )
221 * {
222 * IfxHssl_Hssl_checkErrors(&hssl);
223 * break;
224 * }
225 * }
226 *
227 * // read data from the register
228 * uint32 dataL = IfxHssl_Hssl_getReadData(&hsslChannel[0]);
229 * \endcode
230 *
231 * \subsection IfxLld_Hssl_Hssl_StreamingTransfers Streaming Transfers
232 *
233 * HSSL driver also supports streaming transfers of data as a memory block at both low and high speeds.
234 *
235 * Preparing the target for streaming with the desired memory location where the data needs to be transfered
236 *
237 * \code
238 * // choose a channel other than channel2 for register access
239 * // prepare streaming of single memory block
240 * IfxHssl_Hssl_prepareStream(&hsslChannel[0], 0x70000000, 10);
241 * \endcode
242 *
243 * Stream the memory block
244 *
245 * Usage Example:
246 * \code
247 * // __attribute__ ((aligned(256))) uint32 txData[80]; expected to be declared globally
248 *
249 * // for single block streaming transfer
250 * // change the txData address to global address before passing it to the API
251 *
252 * // IfxHssl_Hssl_writeStream(&hssl, (uint32 *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), (uint32)txData), 10);
253 *
254 * IfxHssl_Hssl_writeStream(&hssl, txData, 10);
255 *
256 * // wait until the streaming is finished
257 * while( IfxHssl_Hssl_waitAcknowledge(&hsslChannel[2]) != IfxHssl_Hssl_Status_ok )
258 * {}
259 * \endcode
260 *
261 * \subsection IfxLld_Hssl_Hssl_DMAOperatedCommandQueues DMA Operated Command Queues
262 *
263 * It makes sense to do this from outside the driver, by initialising the DMA after HSSL, and send command queues through linked lists
264 * here is an example of how to use DMA operated command queues.
265 *
266 *
267 * Include following header files into your C code:
268 * \code
269 * #include <Hssl/Hssl/IfxHssl_Hssl.h>
270 * #include <Dma/Dma/IfxDma_Dma.h>
271 * #include <Scu/Std/IfxScuWdt.h>
272 * \endcode
273 *
274 * Declare the HSSL handle, HSCT handle, HSSL channel handle and DMA channel handle as global variables in your C code:
275 *
276 * \code
277 * // used globally
278 * static IfxHssl_Hssl hssl;
279 * static IfxHssl_Hsct hsct;
280 * IfxHssl_Hssl_Channel hsslChannel;
281 * // DMA channel handle
282 * IfxDma_Dma_Channel chn;
283 *
284 * // Linked List storage
285 * // IMPORTANT: it has to be aligned to an 64bit address, otherwise DMA can't read it
286 * #define NUM_LINKED_LIST_ITEMS 3
287 * __attribute__ ((aligned(64))) Ifx_DMA_CH linkedList[NUM_LINKED_LIST_ITEMS] ;
288 * // transfer these values to channel 0 : HSSL_IWD0, HSSL_ICON0, HSSL_IRWA0 registers via linked lists
289 * #define NUM_TRANSFERED_WORDS 3
290 * // three write command queues with different data and to different addresses on slave
291 * uint32 sourceBuffer[NUM_LINKED_LIST_ITEMS][NUM_TRANSFERED_WORDS] = {
292 * {0xC0CAC01A, 0xFF0A0000, 0x70000000},
293 * {0xBA5EBA11, 0xFF0A0000, 0x70000010},
294 * {0xDEADBEEF, 0xFF0A0000, 0x70000020}
295 * };
296 *
297 * // three command queues to the same channel 0
298 * const uint32 destinationAddresses[NUM_LINKED_LIST_ITEMS] = {
299 * (uint32)&HSSL_I0_IWD,
300 * (uint32)&HSSL_I0_IWD,
301 * (uint32)&HSSL_I0_IWD
302 * };
303 * \endcode
304 *
305 * Initialise the hssl module, see \ref IfxLld_Hssl_Hssl_InitModule
306 *
307 * Initialise the hssl channel
308 *
309 * \code
310 * // create HSSL channel config
311 * IfxHssl_Hssl_ChannelConfig hsslChannelConfig;
312 * IfxHssl_Hssl_initChannelConfig(&hsslChannelConfig, &hssl, &hsct);
313 *
314 * // initialize the channel 0
315 * // IfxHssl_Hssl_Channel hsslChannel; defined globally
316 * hsslChannelConfig.channelId = 0;
317 * IfxHssl_Hssl_initChannel(&hsslChannel, &hsslChannelConfig);
318 * \endcode
319 *
320 * Build a linked list
321 *
322 * \code
323 * // create module config
324 * IfxDma_Dma_Config dmaConfig;
325 * IfxDma_Dma_initModuleConfig(&dmaConfig, &MODULE_DMA);
326 * // initialize module
327 * IfxDma_Dma dma;
328 * IfxDma_Dma_initModule(&dma, &dmaConfig);
329 * // initial channel configuration
330 * IfxDma_Dma_ChannelConfig cfg;
331 * IfxDma_Dma_initChannelConfig(&cfg, &dma);
332 * // following settings are used by all transactions
333 * cfg.transferCount = NUM_TRANSFERED_WORDS;
334 * cfg.requestMode = IfxDma_ChannelRequestMode_completeTransactionPerRequest;
335 * cfg.moveSize = IfxDma_ChannelMoveSize_32bit;
336 * cfg.shadowControl = IfxDma_ChannelShadow_linkedList;
337 * // generate linked list items
338 * for(int i=0; i<NUM_LINKED_LIST_ITEMS; ++i) {
339 * cfg.sourceAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &sourceBuffer[i]);
340 * cfg.destinationAddress = destinationAddresses[i];
341 * // address to next transaction set
342 * cfg.shadowAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), (uint32)&linkedList[(i + 1) % NUM_LINKED_LIST_ITEMS]);
343 * // transfer first transaction set into DMA channel
344 * if( i == 0 ) {
345 * IfxDma_Dma_initChannel(&chn, &cfg);
346 * }
347 * // transfer into linked list storage
348 * IfxDma_Dma_initLinkedListEntry((void *)&linkedList[i], &cfg);
349 * if( i == 0 ) {
350 * // - trigger channel interrupt once the first transaction set has been loaded (again) into DMA channel
351 * linkedList[i].CHCSR.B.SIT = 1;
352 * } else {
353 * // - activate SCH (transaction request) for each entry, expect for the first one (linked list terminated here)
354 * linkedList[i].CHCSR.B.SCH = 1;
355 * }
356 * }
357 * \endcode
358 *
359 * The transfer can be started via software with:
360 *
361 * \code
362 * // clear service request flag
363 * (IfxDma_Dma_getSrcPointer(&chn))->B.CLRR = 1;
364 * // start linked list transaction
365 * IfxDma_Dma_startChannelTransaction(&chn);
366 * // wait for service request which is triggered at the end of linked list transfers
367 * while( !(IfxDma_Dma_getSrcPointer(&chn))->B.SRR );
368 * \endcode
369 *
370 * \subsection IfxLld_Hssl_Hssl_Interrupts Interrupts usage
371 *
372 * Interrupts can be enabled from the application by using the APIs provided in the driver,
373 * there are APIs available in the driver to enable, disable, clear and read the status of interrupt falgs, along with these,\n
374 * APIs to enable the the enterrupts are also available.
375 *
376 * here is an example of how to use the interrupts in HSSL driver.
377 *
378 * Using HSCT interrupts
379 *
380 * After initialising HSCT module \ref IfxLld_Hssl_Hssl_InitModule
381 *
382 * choose what flags needs to be enabled for HSCT interrupt and call the following function once for each flag by choosing the right flag as parameter,\n
383 * and after choosing all the flags needed, enable the HSCT interrupt with desired type of service and priority.
384 *
385 * \code
386 * Ifx_HSCT *hsct = &MODULE_HSCT;
387 * IfxHssl_enableHsctInterruptFlag(hsct, IfxHssl_Hsct_InterruptSource_headerError);
388 * IfxHssl_enableHsctInterruptFlag(hsct, IfxHssl_Hsct_InterruptSource_payloadError);
389 * IfxHssl_enableHsctInterruptFlag(hsct, IfxHssl_Hsct_InterruptSource_commandError);
390 * IfxHssl_enableHsctInterruptFlag(hsct, IfxHssl_Hsct_InterruptSource_speedModeSwitchError);
391 *
392 * // enable the HSCT interrupt
393 * IfxHssl_enableHsctInterrupt(hsct, IfxSrc_Tos_cpu0, 4);
394 * \endcode
395 *
396 * Using HSSl interrupts
397 *
398 * HSSL global error interrupt (EXI)
399 *
400 * After initilaising HSSL module \ref IfxLld_Hssl_Hssl_InitModule
401 *
402 * choose what flags needs to be enabled for HSSL global error (EXI) interrupt and call the following function once for each flag by choosing the right flag as parameter,\n
403 * and after choosing all the flags needed, enable the HSSL EXI interrupt with desired type of service and priority
404 *
405 * \code
406 * Ifx_HSSL *hssl = &MODULE_HSSL;
407 * IfxHssl_enableHsslGlobalErrorInterruptFlag(hssl, IfxHssl_Hssl_EXIInterruptSource_busAccessError);
408 * IfxHssl_enableHsslGlobalErrorInterruptFlag(hssl, IfxHssl_Hssl_EXIInterruptSource_dataLengthError);
409 * IfxHssl_enableHsslGlobalErrorInterruptFlag(hssl, IfxHssl_Hssl_EXIInterruptSource_crcError);
410 *
411 *
412 * // enable the HSSL EXI interrupt
413 * IfxHssl_enableHsslEXIInterrupt(hssl, IfxSrc_Tos_cpu0, 6);
414 * \endcode
415 *
416 * HSSL channel specific error interrupt (ERR)
417 *
418 * After initilaising HSSL channel \ref IfxLld_Hssl_Hssl_InitChannel
419 *
420 * choose what flags needs to be enabled for HSSL channel specific error (ERR) interrupt and call the following function once for each flag by choosing the right flag as parameter,\n
421 * and after choosing all the flags needed, enable the HSSL ERR interrupt with desired channel, type of service and priority
422 *
423 * \code
424 * Ifx_HSSL *hssl = &MODULE_HSSL;
425 * IfxHssl_enableHsslChannelErrorInterruptFlag(hssl, channelId_0, IfxHssl_Hssl_ERRInterruptSource_transactionTagError);
426 * IfxHssl_enableHsslChannelErrorInterruptFlag(hssl, channelId_0, IfxHssl_Hssl_ERRInterruptSource_timeoutError);
427 *
428 * // enable the HSSL ERR interrupt
429 * IfxHssl_enableHsslERRInterrupt(hssl, channelId_0, IfxSrc_Tos_cpu0, 8);
430 * \endcode
431 *
432 * you can define the ISR of your own and service the interrupt, please refer to more general usage of interrupts \ref IfxLld_Cpu_Irq_Usage
433 *
434 * some additional APIs to clear, disable interrupt flags and get flag status are also available.
435 *
436 * \defgroup IfxLld_Hssl_Hssl HSSL
437 * \ingroup IfxLld_Hssl
438 * \defgroup IfxLld_Hssl_Hssl_DataStructures Data Structures
439 * \ingroup IfxLld_Hssl_Hssl
440 * \defgroup IfxLld_Hssl_Hssl_Enumerations Enumerations
441 * \ingroup IfxLld_Hssl_Hssl
442 * \defgroup IfxLld_Hssl_Hssl_ModuleFunctions Module Functions
443 * \ingroup IfxLld_Hssl_Hssl
444 * \defgroup IfxLld_Hssl_Hssl_ChannelFunctions Channel Functions
445 * \ingroup IfxLld_Hssl_Hssl
446 * \defgroup IfxLld_Hssl_Hssl_SimpleCom Simple Communication
447 * \ingroup IfxLld_Hssl_Hssl
448 * \defgroup IfxLld_Hssl_Hssl_ErrorHandling Error Handling
449 * \ingroup IfxLld_Hssl_Hssl
450 * \defgroup IfxLld_Hssl_Hssl_StreamingCom Streaming Communication
451 * \ingroup IfxLld_Hssl_Hssl
452 */
453
454 #ifndef IFXHSSL_HSSL_H
455 #define IFXHSSL_HSSL_H 1
456
457 /******************************************************************************/
458 /*----------------------------------Includes----------------------------------*/
459 /******************************************************************************/
460
461 #include "Hssl/Std/IfxHssl.h"
462 #include "Port/Std/IfxPort.h"
463
464 /******************************************************************************/
465 /*--------------------------------Enumerations--------------------------------*/
466 /******************************************************************************/
467
468 /** \addtogroup IfxLld_Hssl_Hssl_Enumerations
469 * \{ */
470 /** \brief frame request selection
471 */
472 typedef enum
473 {
474 IfxHssl_Hssl_FrameRequest_readFrame = 1, /**< \brief read frame rquest */
475 IfxHssl_Hssl_FrameRequest_writeFrame = 2, /**< \brief write frame rquest */
476 IfxHssl_Hssl_FrameRequest_triggerFrame = 3, /**< \brief trigger frame rquest */
477 IfxHssl_Hssl_FrameRequest_readId = 4, /**< \brief read id request */
478 IfxHssl_Hssl_FrameRequest_noAction = 5 /**< \brief no action */
479 } IfxHssl_Hssl_FrameRequest;
480
481 /** \brief module status
482 */
483 typedef enum
484 {
485 IfxHssl_Hssl_Status_ok = 0, /**< \brief status ok */
486 IfxHssl_Hssl_Status_busy = 1, /**< \brief status busy */
487 IfxHssl_Hssl_Status_error = 2 /**< \brief status error */
488 } IfxHssl_Hssl_Status;
489
490 /** \} */
491
492 /******************************************************************************/
493 /*-----------------------------Data Structures--------------------------------*/
494 /******************************************************************************/
495
496 /** \addtogroup IfxLld_Hssl_Hssl_DataStructures
497 * \{ */
498 /** \brief structure for access windows
499 */
500 typedef struct
501 {
502 uint32 start; /**< \brief start of the access */
503 uint32 end; /**< \brief end of the access */
504 } IfxHssl_Hssl_AccessWindow;
505
506 /** \} */
507
508 /** \brief structure for error flags
509 */
510 typedef struct
511 {
512 uint8 notAcknowledgeError : 1; /**< \brief not acknowledge error / tag error */
513 uint8 transactionTagError : 1; /**< \brief transaction tag error */
514 uint8 timeoutError : 1; /**< \brief timeout error */
515 uint8 unexpectedError : 1; /**< \brief unexpected type of frame error */
516 uint8 memoryAccessViolation : 1; /**< \brief memory access violation */
517 uint8 busAccessError : 1; /**< \brief SRI/SPB bus access error */
518 uint8 channelNumberCodeError : 1; /**< \brief PHY inconsistency error 1 (channel number code error) */
519 uint8 dataLengthError : 1; /**< \brief PHY inconsistency error 2 (data length error) */
520 uint8 crcError : 1; /**< \brief CRC error */
521 } IfxHssl_Hssl_errorFlags;
522
523 /** \addtogroup IfxLld_Hssl_Hssl_DataStructures
524 * \{ */
525 /** \brief HSSL Handle
526 */
527 typedef struct
528 {
529 Ifx_HSSL *hssl; /**< \brief pointer to HSSL register */
530 IfxHssl_Hssl_errorFlags errorFlags; /**< \brief structure for error flags */
531 boolean loopBack; /**< \brief loop back (enable / disable) for streaming transfers within the microcontroller */
532 } IfxHssl_Hssl;
533
534 /** \brief channel handle
535 */
536 typedef struct
537 {
538 Ifx_HSSL *hssl; /**< \brief pointer to HSSL registers */
539 Ifx_HSCT *hsct; /**< \brief pointer to HSCT registers */
540 IfxHssl_ChannelId channelId; /**< \brief channel number (id) */
541 IfxHssl_Hssl_FrameRequest currentFrameRequest; /**< \brief current frame request */
542 IfxHssl_StreamingMode streamingMode; /**< \brief streaming mode selection ( single / continuous ) */
543 boolean loopBack; /**< \brief loopback (enable / disable) for streaming transfers within the microcontroller */
544 boolean streamingModeOn; /**< \brief streaming mode or command mode */
545 } IfxHssl_Hssl_Channel;
546
547 /** \brief configuration structure for channel
548 */
549 typedef struct
550 {
551 Ifx_HSSL *hssl; /**< \brief pointer to HSSL registers */
552 Ifx_HSCT *hsct; /**< \brief pointer to HSCT registers */
553 IfxHssl_ChannelId channelId; /**< \brief channel number (id) */
554 IfxHssl_StreamingMode streamingMode; /**< \brief streaming mode selection ( single / continuous ) */
555 boolean loopBack; /**< \brief loop back (enable / disable) for streaming transfers within the microcontroller */
556 } IfxHssl_Hssl_ChannelConfig;
557
558 /** \brief configuration structure of the HSSL module
559 */
560 typedef struct
561 {
562 Ifx_HSSL *hssl; /**< \brief pointer to HSSL registers */
563 IfxHssl_Hssl_AccessWindow accessWindow0; /**< \brief access window of channel 0 */
564 IfxHssl_Hssl_AccessWindow accessWindow1; /**< \brief access window of channel 1 */
565 IfxHssl_Hssl_AccessWindow accessWindow2; /**< \brief access window of channel 2 */
566 IfxHssl_Hssl_AccessWindow accessWindow3; /**< \brief access window of channel 3 */
567 uint16 preDivider; /**< \brief Defines the down-scaled module clock to be used by all channel timeout timers */
568 } IfxHssl_Hssl_Config;
569
570 /** \} */
571
572 /** \addtogroup IfxLld_Hssl_Hssl_ModuleFunctions
573 * \{ */
574
575 /******************************************************************************/
576 /*-------------------------Global Function Prototypes-------------------------*/
577 /******************************************************************************/
578
579 /** \brief Initialises the module
580 * \param hsct HSCT Handle
581 * \param config configuration structure of the HSCT module
582 * \return None
583 *
584 * A coding example can be found in \ref IfxLld_Hssl_Hssl_Usage
585 *
586 */
587 IFX_EXTERN void IfxHssl_Hssl_initHsctModule(IfxHssl_Hsct *hsct, const IfxHssl_Hsct_Config *config);
588
589 /** \brief Fills the config structure with default values
590 * \param config configuration structure of the HSCT module
591 * \param hsct pointer to HSCT register
592 * \return None
593 *
594 * A coding example can be found in \ref IfxLld_Hssl_Hssl_Usage
595 *
596 */
597 IFX_EXTERN void IfxHssl_Hssl_initHsctModuleConfig(IfxHssl_Hsct_Config *config, Ifx_HSCT *hsct);
598
599 /** \brief Initialises the Hssl module
600 * \param hssl HSSL handle
601 * \param config configuration structure of the module
602 * \return None
603 *
604 * A coding example can be found in \ref IfxLld_Hssl_Hssl_Usage
605 *
606 */
607 IFX_EXTERN void IfxHssl_Hssl_initHsslModule(IfxHssl_Hssl *hssl, const IfxHssl_Hssl_Config *config);
608
609 /** \brief Fills the config structure with default values
610 * \param config configuration structure of the module
611 * \param hssl pointer to HSSL registers
612 * \return None
613 *
614 * A coding example can be found in \ref IfxLld_Hssl_Hssl_Usage
615 *
616 */
617 IFX_EXTERN void IfxHssl_Hssl_initHsslModuleConfig(IfxHssl_Hssl_Config *config, Ifx_HSSL *hssl);
618
619 /** \} */
620
621 /** \addtogroup IfxLld_Hssl_Hssl_ChannelFunctions
622 * \{ */
623
624 /******************************************************************************/
625 /*-------------------------Global Function Prototypes-------------------------*/
626 /******************************************************************************/
627
628 /** \brief Initialises the channel
629 * \param channel channel handle
630 * \param channelConfig configuration structure for channel
631 * \return None
632 *
633 * A coding example can be found in \ref IfxLld_Hssl_Hssl_Usage
634 *
635 */
636 IFX_EXTERN void IfxHssl_Hssl_initChannel(IfxHssl_Hssl_Channel *channel, const IfxHssl_Hssl_ChannelConfig *channelConfig);
637
638 /** \brief Fills the channel config structure with default values
639 * \param channelConfig configuration structure for channel
640 * \param hssl HSSL Handle
641 * \param hsct HSCT Handle
642 * \return None
643 *
644 * A coding example can be found in \ref IfxLld_Hssl_Hssl_Usage
645 *
646 */
647 IFX_EXTERN void IfxHssl_Hssl_initChannelConfig(IfxHssl_Hssl_ChannelConfig *channelConfig, IfxHssl_Hssl *hssl, IfxHssl_Hsct *hsct);
648
649 /** \} */
650
651 /** \addtogroup IfxLld_Hssl_Hssl_SimpleCom
652 * \{ */
653
654 /******************************************************************************/
655 /*-------------------------Inline Function Prototypes-------------------------*/
656 /******************************************************************************/
657
658 /** \brief reads and returs the data
659 * \param channel channel handle
660 * \return data
661 *
662 * A coding example can be found in \ref IfxLld_Hssl_Hssl_Usage
663 *
664 */
665 IFX_INLINE uint32 IfxHssl_Hssl_getReadData(IfxHssl_Hssl_Channel *channel);
666
667 /******************************************************************************/
668 /*-------------------------Global Function Prototypes-------------------------*/
669 /******************************************************************************/
670
671 /** \brief Initiates read request
672 * \param channel channel handle
673 * \param address address of the location from where the data is to be read
674 * \param dataLength length of the data
675 * \return module status (ok, busy, error)
676 *
677 * A coding example can be found in \ref IfxLld_Hssl_Hssl_Usage
678 *
679 */
680 IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_read(IfxHssl_Hssl_Channel *channel, uint32 address, IfxHssl_DataLength dataLength);
681
682 /** \brief sends a predefined command from master to slave
683 * \param hsct HSCT Handle
684 * \param command command value
685 * \return None
686 *
687 * Usage Example:
688 * \code
689 * // enable slave Tx channel (Rx disable to Rx low peed)
690 * IfxHssl_Hssl_sendControlCommand(&channel, IfxHssl_ControlCommand_enableReception);
691 * \endcode
692 *
693 */
694 IFX_EXTERN void IfxHssl_Hssl_sendControlCommand(IfxHssl_Hsct *hsct, uint8 command);
695
696 /** \brief serves the frame request (read, write, trigger frame and read id)
697 * \param channel channel handle
698 * \param frameRequest frame request
699 * \param address address of the location (to be written into / read from)
700 * \param data data to be written
701 * \param dataLength length of the data
702 * \return module status (ok, busy, error)
703 */
704 IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_singleFrameRequest(IfxHssl_Hssl_Channel *channel, IfxHssl_Hssl_FrameRequest frameRequest, uint32 address, uint32 data, IfxHssl_DataLength dataLength);
705
706 /** \brief waits until the current transaction is done
707 * \param channel channel handle
708 * \return module status (ok, busy, error)
709 *
710 * A coding example can be found in \ref IfxLld_Hssl_Hssl_Usage
711 *
712 */
713 IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_waitAcknowledge(IfxHssl_Hssl_Channel *channel);
714
715 /** \brief writes single frame of data into the specified address
716 * \param channel channel handle
717 * \param address address of the location where the data is to be written
718 * \param data data that needs to be written
719 * \param dataLength length of the data (8, 16, 32 bit)
720 * \return module status (ok, busy, error)
721 *
722 * A coding example can be found in \ref IfxLld_Hssl_Hssl_Usage
723 *
724 */
725 IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_write(IfxHssl_Hssl_Channel *channel, uint32 address, uint32 data, IfxHssl_DataLength dataLength);
726
727 /** \} */
728
729 /** \addtogroup IfxLld_Hssl_Hssl_ErrorHandling
730 * \{ */
731
732 /******************************************************************************/
733 /*-------------------------Global Function Prototypes-------------------------*/
734 /******************************************************************************/
735
736 /** \brief stores the status of errors in the respective members of the error flags structure
737 * \param hssl HSSL Handle
738 * \return None
739 */
740 IFX_EXTERN void IfxHssl_Hssl_checkErrors(IfxHssl_Hssl *hssl);
741
742 /** \brief clears the status of members in the error flags structure
743 * \param hssl HSSL Handle
744 * \return None
745 */
746 IFX_EXTERN void IfxHssl_Hssl_clearErrorFlags(IfxHssl_Hssl *hssl);
747
748 /** \brief a simple software delay
749 * \param hsct HSCT Handle
750 * \return None
751 */
752 IFX_EXTERN void IfxHssl_Hssl_delay(IfxHssl_Hsct *hsct);
753
754 /** \} */
755
756 /** \addtogroup IfxLld_Hssl_Hssl_StreamingCom
757 * \{ */
758
759 /******************************************************************************/
760 /*-------------------------Global Function Prototypes-------------------------*/
761 /******************************************************************************/
762
763 /** \brief Prepares the target device for streaming
764 * \param channel channel handle
765 * \param slaveTargetAddress address of the location on target device where the data needs to be transfered
766 * \param count Frame count (length of the data in the memory as 256 bytes per frame)
767 * \return module status (ok, busy, error)
768 *
769 * A coding example can be found in \ref IfxLld_Hssl_Hssl_Usage
770 *
771 */
772 IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_prepareStream(IfxHssl_Hssl_Channel *channel, uint32 slaveTargetAddress, Ifx_SizeT count);
773
774 /** \brief transfers one memory block of data
775 * useful for transfering huge data from one location to another and between devices.
776 * NOTE: This function should be called only for IfxHssl_ChannelId_2
777 * \param hssl HSSL handle
778 * \param data starting address of the location to be read from (memory block 0 / HSSL_ISSA0)
779 * \param count Frame count (length of the data in the memory as 256 bytes per frame)
780 * \return module status (ok, busy, error)
781 *
782 * A coding example can be found in \ref IfxLld_Hssl_Hssl_Usage
783 *
784 */
785 IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_writeStream(IfxHssl_Hssl *hssl, uint32 *data, Ifx_SizeT count);
786
787 /** \} */
788
789 /******************************************************************************/
790 /*---------------------Inline Function Implementations------------------------*/
791 /******************************************************************************/
792
793 IFX_INLINE uint32 IfxHssl_Hssl_getReadData(IfxHssl_Hssl_Channel *channel)
794 {
795 Ifx_HSSL_I *hsslI = (Ifx_HSSL_I *)&channel->hssl->I[channel->channelId];
796 return hsslI->IRD.U; /* retutn the data read from the data register */
797 }
798
799
800 #endif /* IFXHSSL_HSSL_H */
IfxHssl_ChannelId
IfxHssl_ChannelId
channel selection
Definition: IfxHssl.h:74
IfxHssl_Hssl_Channel::channelId
IfxHssl_ChannelId channelId
channel number (id)
Definition: IfxHssl_Hssl.h:540
IfxHssl_Hssl_Config
configuration structure of the HSSL module
Definition: IfxHssl_Hssl.h:560
IfxHssl_Hssl_AccessWindow::start
uint32 start
start of the access
Definition: IfxHssl_Hssl.h:502
IfxHssl_Hssl_initChannel
IFX_EXTERN void IfxHssl_Hssl_initChannel(IfxHssl_Hssl_Channel *channel, const IfxHssl_Hssl_ChannelConfig *channelConfig)
Initialises the channel.
Definition: IfxHssl_Hssl.c:131
IfxHssl_StreamingMode
IfxHssl_StreamingMode
streaming mode ( single / continuous ) Definition in Ifx_HSSL.CFG.B.SMT/SMR
Definition: IfxHssl.h:212
IfxHssl_Hssl_initHsctModuleConfig
IFX_EXTERN void IfxHssl_Hssl_initHsctModuleConfig(IfxHssl_Hsct_Config *config, Ifx_HSCT *hsct)
Fills the config structure with default values.
Definition: IfxHssl_Hssl.c:266
IfxHssl_Hssl_errorFlags::transactionTagError
uint8 transactionTagError
transaction tag error
Definition: IfxHssl_Hssl.h:513
IfxHssl_Hssl_errorFlags::unexpectedError
uint8 unexpectedError
unexpected type of frame error
Definition: IfxHssl_Hssl.h:515
IfxHssl_Hssl_Channel::currentFrameRequest
IfxHssl_Hssl_FrameRequest currentFrameRequest
current frame request
Definition: IfxHssl_Hssl.h:541
IfxHssl_Hssl_initHsctModule
IFX_EXTERN void IfxHssl_Hssl_initHsctModule(IfxHssl_Hsct *hsct, const IfxHssl_Hsct_Config *config)
Initialises the module.
Definition: IfxHssl_Hssl.c:157
IfxHssl_Hssl_delay
IFX_EXTERN void IfxHssl_Hssl_delay(IfxHssl_Hsct *hsct)
a simple software delay
Definition: IfxHssl_Hssl.c:119
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxHssl_Hssl_Config::preDivider
uint16 preDivider
Defines the down-scaled module clock to be used by all channel timeout timers.
Definition: IfxHssl_Hssl.h:567
IfxHssl_Hssl_initChannelConfig
IFX_EXTERN void IfxHssl_Hssl_initChannelConfig(IfxHssl_Hssl_ChannelConfig *channelConfig, IfxHssl_Hssl *hssl, IfxHssl_Hsct *hsct)
Fills the channel config structure with default values.
Definition: IfxHssl_Hssl.c:145
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
IfxHssl_Hsct
HSCT module handle.
Definition: IfxHssl.h:271
IfxHssl_Hssl_FrameRequest_readFrame
read frame rquest
Definition: IfxHssl_Hssl.h:474
IfxHssl_Hssl_errorFlags::busAccessError
uint8 busAccessError
SRI/SPB bus access error.
Definition: IfxHssl_Hssl.h:517
IfxHssl_Hssl_FrameRequest_writeFrame
write frame rquest
Definition: IfxHssl_Hssl.h:475
IfxHssl_Hssl_write
IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_write(IfxHssl_Hssl_Channel *channel, uint32 address, uint32 data, IfxHssl_DataLength dataLength)
writes single frame of data into the specified address
Definition: IfxHssl_Hssl.c:565
IfxHssl_Hssl_initHsslModule
IFX_EXTERN void IfxHssl_Hssl_initHsslModule(IfxHssl_Hssl *hssl, const IfxHssl_Hssl_Config *config)
Initialises the Hssl module.
Definition: IfxHssl_Hssl.c:280
IfxHssl_Hssl_errorFlags::notAcknowledgeError
uint8 notAcknowledgeError
not acknowledge error / tag error
Definition: IfxHssl_Hssl.h:512
IfxHssl_Hssl_FrameRequest_readId
read id request
Definition: IfxHssl_Hssl.h:477
IfxHssl_Hssl_Channel
channel handle
Definition: IfxHssl_Hssl.h:536
IfxHssl_Hssl_errorFlags::channelNumberCodeError
uint8 channelNumberCodeError
PHY inconsistency error 1 (channel number code error)
Definition: IfxHssl_Hssl.h:518
IfxHssl_Hssl_FrameRequest_noAction
no action
Definition: IfxHssl_Hssl.h:478
IfxHssl_Hssl_errorFlags::timeoutError
uint8 timeoutError
timeout error
Definition: IfxHssl_Hssl.h:514
IfxHssl_Hssl_Config::accessWindow0
IfxHssl_Hssl_AccessWindow accessWindow0
access window of channel 0
Definition: IfxHssl_Hssl.h:563
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxHssl_Hssl_prepareStream
IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_prepareStream(IfxHssl_Hssl_Channel *channel, uint32 slaveTargetAddress, Ifx_SizeT count)
Prepares the target device for streaming.
Definition: IfxHssl_Hssl.c:330
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxHssl_Hssl::hssl
Ifx_HSSL * hssl
pointer to HSSL register
Definition: IfxHssl_Hssl.h:529
IfxHssl_Hssl_sendControlCommand
IFX_EXTERN void IfxHssl_Hssl_sendControlCommand(IfxHssl_Hsct *hsct, uint8 command)
sends a predefined command from master to slave
Definition: IfxHssl_Hssl.c:452
IfxHssl_Hssl_errorFlags::dataLengthError
uint8 dataLengthError
PHY inconsistency error 2 (data length error)
Definition: IfxHssl_Hssl.h:519
IfxHssl_Hssl_Channel::hsct
Ifx_HSCT * hsct
pointer to HSCT registers
Definition: IfxHssl_Hssl.h:539
IfxHssl_Hssl_Status_ok
status ok
Definition: IfxHssl_Hssl.h:485
IfxHssl_Hssl_ChannelConfig
configuration structure for channel
Definition: IfxHssl_Hssl.h:549
IfxHssl_Hssl_checkErrors
IFX_EXTERN void IfxHssl_Hssl_checkErrors(IfxHssl_Hssl *hssl)
stores the status of errors in the respective members of the error flags structure ...
Definition: IfxHssl_Hssl.c:53
IfxHssl_Hssl
HSSL Handle.
Definition: IfxHssl_Hssl.h:527
IfxHssl_Hssl_errorFlags
structure for error flags
Definition: IfxHssl_Hssl.h:510
IfxHssl_DataLength
IfxHssl_DataLength
Defines the length of the data in bits of the write and read command. Definition in Ifx_HSSL...
Definition: IfxHssl.h:115
IfxHssl_Hssl_writeStream
IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_writeStream(IfxHssl_Hssl *hssl, uint32 *data, Ifx_SizeT count)
transfers one memory block of data useful for transfering huge data from one location to another and ...
Definition: IfxHssl_Hssl.c:571
IfxHssl_Hssl_Status_error
status error
Definition: IfxHssl_Hssl.h:487
IfxHssl_Hssl_Config::accessWindow1
IfxHssl_Hssl_AccessWindow accessWindow1
access window of channel 1
Definition: IfxHssl_Hssl.h:564
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxHssl_Hssl_read
IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_read(IfxHssl_Hssl_Channel *channel, uint32 address, IfxHssl_DataLength dataLength)
Initiates read request.
Definition: IfxHssl_Hssl.c:445
IfxHssl_Hsct_Config
Configuration structure of the HSCT module.
Definition: IfxHssl.h:279
IfxHssl_Hssl_Status_busy
status busy
Definition: IfxHssl_Hssl.h:486
IfxHssl_Hssl_FrameRequest_triggerFrame
trigger frame rquest
Definition: IfxHssl_Hssl.h:476
IfxHssl_Hssl::loopBack
boolean loopBack
loop back (enable / disable) for streaming transfers within the microcontroller
Definition: IfxHssl_Hssl.h:531
IfxHssl_Hssl_getReadData
IFX_INLINE uint32 IfxHssl_Hssl_getReadData(IfxHssl_Hssl_Channel *channel)
reads and returs the data
Definition: IfxHssl_Hssl.h:793
IfxHssl_Hssl_initHsslModuleConfig
IFX_EXTERN void IfxHssl_Hssl_initHsslModuleConfig(IfxHssl_Hssl_Config *config, Ifx_HSSL *hssl)
Fills the config structure with default values.
Definition: IfxHssl_Hssl.c:311
IfxHssl_Hssl_singleFrameRequest
IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_singleFrameRequest(IfxHssl_Hssl_Channel *channel, IfxHssl_Hssl_FrameRequest frameRequest, uint32 address, uint32 data, IfxHssl_DataLength dataLength)
serves the frame request (read, write, trigger frame and read id)
Definition: IfxHssl_Hssl.c:463
IfxHssl_Hssl_AccessWindow::end
uint32 end
end of the access
Definition: IfxHssl_Hssl.h:503
IfxHssl_Hssl_FrameRequest
IfxHssl_Hssl_FrameRequest
frame request selection
Definition: IfxHssl_Hssl.h:472
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxHssl.h
HSSL basic functionality.
IfxHssl_Hssl::errorFlags
IfxHssl_Hssl_errorFlags errorFlags
structure for error flags
Definition: IfxHssl_Hssl.h:530
IfxHssl_Hssl_waitAcknowledge
IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_waitAcknowledge(IfxHssl_Hssl_Channel *channel)
waits until the current transaction is done
Definition: IfxHssl_Hssl.c:506
IfxHssl_Hssl_Channel::streamingModeOn
boolean streamingModeOn
streaming mode or command mode
Definition: IfxHssl_Hssl.h:544
IfxHssl_Hssl_errorFlags::memoryAccessViolation
uint8 memoryAccessViolation
memory access violation
Definition: IfxHssl_Hssl.h:516
IfxHssl_Hssl_errorFlags::crcError
uint8 crcError
CRC error.
Definition: IfxHssl_Hssl.h:520
IfxHssl_Hssl_Status
IfxHssl_Hssl_Status
module status
Definition: IfxHssl_Hssl.h:483
IfxHssl_Hssl_Channel::streamingMode
IfxHssl_StreamingMode streamingMode
streaming mode selection ( single / continuous )
Definition: IfxHssl_Hssl.h:542
IfxHssl_Hssl_clearErrorFlags
IFX_EXTERN void IfxHssl_Hssl_clearErrorFlags(IfxHssl_Hssl *hssl)
clears the status of members in the error flags structure
Definition: IfxHssl_Hssl.c:105
IfxPort.h
PORT basic functionality.
IfxHssl_Hssl_Config::accessWindow2
IfxHssl_Hssl_AccessWindow accessWindow2
access window of channel 2
Definition: IfxHssl_Hssl.h:565
IfxHssl_Hssl_AccessWindow
structure for access windows
Definition: IfxHssl_Hssl.h:500
IfxHssl_Hssl_Config::accessWindow3
IfxHssl_Hssl_AccessWindow accessWindow3
access window of channel 3
Definition: IfxHssl_Hssl.h:566


iLLD_TC38A: IfxHssl_cfg.c Source File

  • _Impl
IfxHssl_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxHssl_cfg.c
3 * \brief HSSL on-chip implementation data
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxHssl_cfg.h"
47
48 /******************************************************************************/
49 /*-----------------------Exported Variables/Constants-------------------------*/
50 /******************************************************************************/
51
52 IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsctIndexMap[IFXHSSL_NUM_MODULES] = {
53 {&MODULE_HSCT0, (uint32)IfxHssl_hsctIndex_0}
54 };
55
56 IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsslIndexMap[IFXHSSL_NUM_MODULES] = {
57 {&MODULE_HSSL0, (uint32)IfxHssl_hsslIndex_0}
58 };
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxHssl_hsctIndex_0
HSCT index 0.
Definition: IfxHssl_cfg.h:83
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxHssl_cfg.h
HSSL on-chip implementation data.
IFXHSSL_NUM_MODULES
#define IFXHSSL_NUM_MODULES
Definition: IfxHssl_cfg.h:68
IfxHssl_cfg_hsctIndexMap
IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsctIndexMap[IFXHSSL_NUM_MODULES]
Definition: IfxHssl_cfg.c:52
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:140
IfxHssl_hsslIndex_0
HSSL index 0.
Definition: IfxHssl_cfg.h:91
IfxHssl_cfg_hsslIndexMap
IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsslIndexMap[IFXHSSL_NUM_MODULES]
Definition: IfxHssl_cfg.c:56


iLLD_TC38A: IfxHssl_cfg.h Source File

  • _Impl
IfxHssl_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxHssl_cfg.h
3 * \brief HSSL on-chip implementation data
4 * \ingroup IfxLld_Hssl
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Hssl HSSL
42 * \ingroup IfxLld
43 * \defgroup IfxLld_Hssl_Impl Implementation
44 * \ingroup IfxLld_Hssl
45 * \defgroup IfxLld_Hssl_Std Standard Driver
46 * \ingroup IfxLld_Hssl
47 * \defgroup IfxLld_Hssl_Impl_Enumerations Enumerations
48 * \ingroup IfxLld_Hssl_Impl
49 */
50
51 #ifndef IFXHSSL_CFG_H
52 #define IFXHSSL_CFG_H 1
53
54 /******************************************************************************/
55 /*----------------------------------Includes----------------------------------*/
56 /******************************************************************************/
57
58 #include "Cpu/Std/Ifx_Types.h"
59 #include "IfxHssl_reg.h"
60 #include "IfxHsct_reg.h"
61
62 /******************************************************************************/
63 /*-----------------------------------Macros-----------------------------------*/
64 /******************************************************************************/
65
66 #define IFXHSSL_NUM_CHANNELS 4
67
68 #define IFXHSSL_NUM_MODULES 1
69
70 #define IFXHSSL_JTAG_ID_ADDRESS (0xF0000464u)
71
72 /******************************************************************************/
73 /*--------------------------------Enumerations--------------------------------*/
74 /******************************************************************************/
75
76 /** \addtogroup IfxLld_Hssl_Impl_Enumerations
77 * \{ */
78 /** \brief List of the available Hsct resources
79 */
80 typedef enum
81 {
82 IfxHssl_hsctIndex_none = -1, /**< \brief Not Selected */
83 IfxHssl_hsctIndex_0 = 0, /**< \brief HSCT index 0 */
84 } IfxHssl_hsctIndex;
85
86 /** \brief List of the available Hssl resources
87 */
88 typedef enum
89 {
90 IfxHssl_hsslIndex_none = -1, /**< \brief Not Selected */
91 IfxHssl_hsslIndex_0 = 0, /**< \brief HSSL index 0 */
92 } IfxHssl_hsslIndex;
93
94 /** \} */
95
96 /** \addtogroup IfxLld_Hssl_Impl_Enumerations
97 * \{ */
98
99 /******************************************************************************/
100 /*-------------------Global Exported Variables/Constants----------------------*/
101 /******************************************************************************/
102
103 IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsctIndexMap[IFXHSSL_NUM_MODULES];
104
105 IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsslIndexMap[IFXHSSL_NUM_MODULES];
106
107 /** \} */
108
109 #endif /* IFXHSSL_CFG_H */
IfxHssl_hsslIndex_none
Not Selected.
Definition: IfxHssl_cfg.h:90
IfxHssl_hsctIndex_none
Not Selected.
Definition: IfxHssl_cfg.h:82
IfxHssl_hsslIndex
IfxHssl_hsslIndex
List of the available Hssl resources.
Definition: IfxHssl_cfg.h:88
IfxHssl_cfg_hsctIndexMap
IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsctIndexMap[IFXHSSL_NUM_MODULES]
Definition: IfxHssl_cfg.h:103
IfxHssl_hsctIndex_0
HSCT index 0.
Definition: IfxHssl_cfg.h:83
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxHssl_cfg_hsslIndexMap
IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsslIndexMap[IFXHSSL_NUM_MODULES]
Definition: IfxHssl_cfg.h:105
IFXHSSL_NUM_MODULES
#define IFXHSSL_NUM_MODULES
Definition: IfxHssl_cfg.h:68
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:140
IfxHssl_hsslIndex_0
HSSL index 0.
Definition: IfxHssl_cfg.h:91
IfxHssl_hsctIndex
IfxHssl_hsctIndex
List of the available Hsct resources.
Definition: IfxHssl_cfg.h:80


iLLD_TC38A: IfxI2c.c Source File

  • I2c
  • Std
IfxI2c.c
Go to the documentation of this file.
1 /**
2 * \file IfxI2c.c
3 * \brief I2C basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxI2c.h"
47
48 /******************************************************************************/
49 /*-------------------------Function Implementations---------------------------*/
50 /******************************************************************************/
51
52 void IfxI2c_configureAsMaster(Ifx_I2C *i2c)
53 {
54 // enter config Mode
55 IfxI2c_stop(i2c);
56
57 i2c->ADDRCFG.U = 0;
58 i2c->ADDRCFG.B.MNS = 1; // master mode
59 i2c->ADDRCFG.B.SONA = 0; // don't release the bus on NACK
60 i2c->ADDRCFG.B.SOPE = 0; // after transfer go into master restart state
61 i2c->ADDRCFG.B.TBAM = 0; // 7 bit address mode
62 i2c->FIFOCFG.U = 0;
63 i2c->FIFOCFG.B.TXFC = 1; // FIFO as flow controller
64 i2c->FIFOCFG.B.RXFC = 1; // FIFO as flow controller
65 i2c->FIFOCFG.B.TXBS = 0; // Burst size 1 word
66 i2c->FIFOCFG.B.RXBS = 0; // Burst size 1 word
67 i2c->FIFOCFG.B.TXFA = 0; // fifo is byte aligned
68 i2c->FIFOCFG.B.RXFA = 0; // fifo is byte aligned
69 }
70
71
72 void IfxI2c_disableModule(Ifx_I2C *i2c)
73 {
74 uint16 pwd = IfxScuWdt_getCpuWatchdogPassword();
75
76 IfxScuWdt_clearCpuEndinit(pwd);
77
78 i2c->CLC.B.DISR = 1;
79
80 while (i2c->CLC.B.DISS == 0)
81 {}
82
83 IfxScuWdt_setCpuEndinit(pwd);
84 }
85
86
87 void IfxI2c_enableDtrInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
88 {
89 volatile Ifx_SRC_SRCR *src;
90 src = IfxI2c_getDtrSrcPointer(i2c);
91 IfxSrc_init(src, typeOfService, priority);
92 IfxSrc_enable(src);
93 }
94
95
96 void IfxI2c_enableErrorInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
97 {
98 volatile Ifx_SRC_SRCR *src;
99 src = IfxI2c_getErrorSrcPointer(i2c);
100 IfxSrc_init(src, typeOfService, priority);
101 IfxSrc_enable(src);
102 }
103
104
105 void IfxI2c_enableModule(Ifx_I2C *i2c)
106 {
107 uint16 pwd = IfxScuWdt_getCpuWatchdogPassword();
108
109 IfxScuWdt_clearCpuEndinit(pwd);
110 i2c->CLC.B.DISR = 0U;
111
112 while (i2c->CLC.B.DISS == 1U)
113 {}
114
115 i2c->CLC1.B.RMC = 1U;
116
117 while (i2c->CLC1.B.RMC != 1U)
118 {}
119
120 i2c->CLC1.B.DISR = 0U;
121
122 while (i2c->CLC1.B.DISS == 1U)
123 {}
124
125 // disable all interrupts
126 i2c->ERRIRQSM.U = 0x00;
127 i2c->PIRQSM.U = 0x00;
128 i2c->IMSC.U = 0x00;
129
130 IfxScuWdt_setCpuEndinit(pwd);
131 }
132
133
134 void IfxI2c_enableProtocolInterrupt(void *i2c, IfxSrc_Tos typeOfService, uint16 priority)
135 {
136 volatile Ifx_SRC_SRCR *src;
137 src = IfxI2c_getProtocolSrcPointer(i2c);
138 IfxSrc_init(src, typeOfService, priority);
139 IfxSrc_enable(src);
140 }
141
142
143 Ifx_I2C *IfxI2c_getAddress(IfxI2c_Index i2c)
144 {
145 Ifx_I2C *module;
146
147 if (i2c < IFXI2C_NUM_MODULES)
148 {
149 module = (Ifx_I2C *)IfxI2c_cfg_indexMap[i2c].module;
150 }
151 else
152 {
153 module = NULL_PTR;
154 }
155
156 return module;
157 }
158
159
160 float32 IfxI2c_getBaudrate(Ifx_I2C *i2c)
161 {
162 uint8 rmc = i2c->CLC1.B.RMC;
163 #ifdef IFX_CFG_AURIX_SCUCCU_USED
164 float32 fKernel = IfxScuCcu_getBaud1Frequency();
165 #else
166 float32 fKernel = IfxScuCcu_getI2cFrequency();
167 #endif
168
169 if (0 == i2c->FDIVHIGHCFG.U)
170 {
171 uint8 inc = i2c->FDIVCFG.B.INC;
172 uint16 dec = i2c->FDIVCFG.B.DEC;
173 return (fKernel / rmc) / ((2 * dec / inc) + 3);
174 }
175 else
176 {
177 uint8 inc = i2c->FDIVHIGHCFG.B.INC;
178 uint16 dec = i2c->FDIVHIGHCFG.B.DEC;
179 return (fKernel / rmc) / ((dec / inc * 5) + 2);
180 }
181 }
182
183
184 IfxI2c_Index IfxI2c_getIndex(Ifx_I2C *i2c)
185 {
186 uint32 index;
187 IfxI2c_Index result;
188
189 result = IfxI2c_Index_none;
190
191 for (index = 0; index < IFXI2C_NUM_MODULES; index++)
192 {
193 if (IfxI2c_cfg_indexMap[index].module == i2c)
194 {
195 result = (IfxI2c_Index)IfxI2c_cfg_indexMap[index].index;
196 break;
197 }
198 }
199
200 return result;
201 }
202
203
204 void IfxI2c_initSclSdaPin(const IfxI2c_Scl_InOut *scl, const IfxI2c_Sda_InOut *sda, IfxPort_PadDriver padDriver)
205 {
206 IfxPort_OutputMode mode = (IfxPort_OutputMode)IfxPort_Mode_outputOpenDrainGeneral;
207 IfxPort_setPinModeOutput(scl->pin.port, scl->pin.pinIndex, mode, scl->outSelect);
208 IfxPort_setPinModeOutput(sda->pin.port, sda->pin.pinIndex, mode, sda->outSelect);
209 IfxPort_setPinPadDriver(scl->pin.port, scl->pin.pinIndex, padDriver);
210 IfxPort_setPinPadDriver(sda->pin.port, sda->pin.pinIndex, padDriver);
211 IfxI2c_setPinSelection(scl->module, (IfxI2c_PinSelect)scl->inSelect); // note: uses the same PISEL register like SDA
212 }
213
214
215 void IfxI2c_releaseBus(Ifx_I2C *i2c)
216 {
217 // only set the set end of transmisson bit if bus is not free
218 if (i2c->BUSSTAT.B.BS != IfxI2c_BusStatus_idle)
219 {
220 i2c->ENDDCTRL.B.SETEND = 1;
221
222 // wait until bus is free
223 while (IfxI2c_getProtocolInterruptSourceStatus(i2c, IfxI2c_ProtocolInterruptSource_transmissionEnd) == FALSE)
224 {}
225
226 IfxI2c_clearProtocolInterruptSource(i2c, IfxI2c_ProtocolInterruptSource_transmissionEnd);
227 }
228 }
229
230
231 void IfxI2c_resetFifo(Ifx_I2C *i2c)
232 {
233 /* reset FIFO */
234 i2c->FIFOCFG.U = 0x0;
235 i2c->FIFOCFG.B.TXFC = 0U;
236 i2c->FIFOCFG.B.RXFC = 0U;
237 i2c->FIFOCFG.B.TXBS = 0U;
238 i2c->FIFOCFG.B.RXBS = 0U;
239 i2c->FIFOCFG.B.TXFA = 0U;
240 i2c->FIFOCFG.B.RXFA = 0U;
241 }
242
243
244 void IfxI2c_resetModule(Ifx_I2C *i2c)
245 {
246 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
247
248 IfxScuWdt_clearCpuEndinit(passwd);
249 i2c->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
250 i2c->KRST1.B.RST = 1;
251 IfxScuWdt_setCpuEndinit(passwd);
252
253 while (0 == i2c->KRST0.B.RSTSTAT) /* Wait until reset is executed */
254
255 {}
256
257 IfxScuWdt_clearCpuEndinit(passwd);
258 i2c->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
259 IfxScuWdt_setCpuEndinit(passwd);
260 }
261
262
263 void IfxI2c_setBaudrate(Ifx_I2C *i2c, float32 baudrate)
264 {
265 float32 fKernel = IfxScuCcu_getI2cFrequency();
266 uint8 rmc = i2c->CLC1.B.RMC;
267 float32 dec;
268
269 if (baudrate > 400000) // for High Speed mode
270 {
271 dec = ((((fKernel / baudrate) * 46) - 92) / 5); // always: Inc = 46
272 }
273 else // for Standard and fast mode
274 {
275 dec = (((fKernel / rmc) / baudrate) - 3) / 2; // always: Inc = 1
276 }
277
278 // dec:inc must be at least 6
279 if (dec < 6)
280 {
281 dec = 6;
282 }
283 else if (dec > (1 << IFX_I2C_FDIVCFG_DEC_LEN) - 1)
284 {
285 dec = (1 << IFX_I2C_FDIVCFG_DEC_LEN) - 1;
286 }
287
288 uint16 pwd = IfxScuWdt_getCpuWatchdogPassword();
289
290 IfxScuWdt_clearCpuEndinit(pwd);
291
292 /* Baudrate configuration */
293 if (baudrate > 400000)
294 {
295 i2c->FDIVCFG.B.INC = 5;
296 i2c->FDIVCFG.B.DEC = 0x1D2;
297
298 i2c->FDIVHIGHCFG.B.INC = 46;
299 i2c->FDIVHIGHCFG.B.DEC = (uint16)(dec + 0.5);
300 }
301 else
302 {
303 i2c->FDIVCFG.B.INC = 1;
304 i2c->FDIVCFG.B.DEC = (uint16)(dec + 0.5);
305 }
306
307 i2c->TIMCFG.B.SDA_DEL_HD_DAT = 0x3F;
308 i2c->TIMCFG.B.FS_SCL_LOW = 1;
309 i2c->TIMCFG.B.EN_SCL_LOW_LEN = 1;
310 i2c->TIMCFG.B.SCL_LOW_LEN = 0x20;
311
312 IfxScuWdt_setCpuEndinit(pwd);
313 }
314
315
316 void IfxI2c_configureHighSpeedMode(Ifx_I2C *i2c)
317 {
318 // enter config Mode
319 IfxI2c_stop(i2c);
320
321 i2c->ADDRCFG.B.MCE = 1; // master code enable
322 i2c->ADDRCFG.B.SONA = 1;
323 i2c->ADDRCFG.B.SOPE = 1;
324
325 IfxI2c_run(i2c);
326 IfxI2c_setTransmitPacketSize(i2c, 1);
327 IfxI2c_writeFifo(i2c, IFXI2C_HIGHSPEED_MASTER_CODE); // Send the Master code to switch to high speed mode
328
329 while (!(IfxI2c_getProtocolInterruptSourceStatus(i2c, IfxI2c_ProtocolInterruptSource_transmissionEnd)))
330 {}
331
332 IfxI2c_clearAllDtrInterruptSources(i2c);
333 IfxI2c_clearAllProtocolInterruptSources(i2c);
334
335 IfxI2c_stop(i2c);
336
337 while (IfxI2c_getBusStatus(i2c) != 0U)
338 {}
339 }
IfxI2c_Index_none
Not Selected.
Definition: IfxI2c_cfg.h:79
IfxI2c_enableErrorInterrupt
void IfxI2c_enableErrorInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
Enables the Error interrupt.
Definition: IfxI2c.c:96
IfxI2c_writeFifo
IFX_INLINE void IfxI2c_writeFifo(Ifx_I2C *i2c, uint32 packet)
Writes a packet (4 bytes) into the Fifo.
Definition: IfxI2c.h:786
IfxI2c_releaseBus
void IfxI2c_releaseBus(Ifx_I2C *i2c)
Releases the bus, i.e puts a stop condition on the bus.
Definition: IfxI2c.c:215
IfxI2c_getBusStatus
IFX_INLINE IfxI2c_BusStatus IfxI2c_getBusStatus(Ifx_I2C *i2c)
Definition: IfxI2c.h:650
IfxI2c_PinSelect
IfxI2c_PinSelect
Definition: IfxI2c.h:124
IfxI2c_Scl_InOut::pin
IfxPort_Pin pin
Port pin.
Definition: IfxI2c_PinMap.h:59
IfxI2c_setBaudrate
void IfxI2c_setBaudrate(Ifx_I2C *i2c, float32 baudrate)
Calculates the desired baudrate.
Definition: IfxI2c.c:263
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:140
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxI2c.h
I2C basic functionality.
float32
float float32
Definition: Platform_Types.h:170
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
IfxI2c_getBaudrate
float32 IfxI2c_getBaudrate(Ifx_I2C *i2c)
Returns the real Baudrate.
Definition: IfxI2c.c:160
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:322
IfxI2c_Scl_InOut::inSelect
Ifx_RxSel inSelect
Input multiplexer value.
Definition: IfxI2c_PinMap.h:60
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxI2c_getProtocolSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxI2c_getProtocolSrcPointer(Ifx_I2C *i2c)
Returns the SRC pointer for I2C Protocol interrupt.
Definition: IfxI2c.h:712
IfxI2c_Sda_InOut
SDA input mapping structure.
Definition: IfxI2c_PinMap.h:65
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxI2c_resetFifo
void IfxI2c_resetFifo(Ifx_I2C *i2c)
Definition: IfxI2c.c:231
IfxI2c_enableDtrInterrupt
void IfxI2c_enableDtrInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
enables the DTR interrupt
Definition: IfxI2c.c:87
IfxI2c_configureHighSpeedMode
void IfxI2c_configureHighSpeedMode(Ifx_I2C *i2c)
Configure the i2c master to high speed mode baudrate > 400kbits/s.
Definition: IfxI2c.c:316
IfxI2c_Index
IfxI2c_Index
List of the available I2c interfaces.
Definition: IfxI2c_cfg.h:77
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxI2c_getAddress
Ifx_I2C * IfxI2c_getAddress(IfxI2c_Index i2c)
Definition: IfxI2c.c:143
IfxI2c_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxI2c_cfg_indexMap[IFXI2C_NUM_MODULES]
Definition: IfxI2c_cfg.c:54
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxI2c_disableModule
void IfxI2c_disableModule(Ifx_I2C *i2c)
Disables the I2c Module.
Definition: IfxI2c.c:72
IFXI2C_NUM_MODULES
#define IFXI2C_NUM_MODULES
Definition: IfxI2c_cfg.h:67
IfxI2c_Scl_InOut::module
Ifx_I2C * module
Base address.
Definition: IfxI2c_PinMap.h:58
IfxI2c_configureAsMaster
void IfxI2c_configureAsMaster(Ifx_I2C *i2c)
Configures the Module as Master.
Definition: IfxI2c.c:52
IfxPort_Mode_outputOpenDrainGeneral
Open-drain, General-purpose output.
Definition: IfxPort.h:114
IfxI2c_enableProtocolInterrupt
void IfxI2c_enableProtocolInterrupt(void *i2c, IfxSrc_Tos typeOfService, uint16 priority)
Enables the protocol interrupt.
Definition: IfxI2c.c:134
IfxI2c_enableModule
void IfxI2c_enableModule(Ifx_I2C *i2c)
Enables the I2c Module.
Definition: IfxI2c.c:105
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:249
IFXI2C_HIGHSPEED_MASTER_CODE
#define IFXI2C_HIGHSPEED_MASTER_CODE
Master code for high speed mode.
Definition: IfxI2c.h:69
IfxI2c_clearProtocolInterruptSource
IFX_INLINE void IfxI2c_clearProtocolInterruptSource(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
clears the specified source of protocol interrupt
Definition: IfxI2c.h:578
IfxI2c_clearAllProtocolInterruptSources
IFX_INLINE void IfxI2c_clearAllProtocolInterruptSources(Ifx_I2C *i2c)
Clears all Protocol Interrupt sources.
Definition: IfxI2c.h:560
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:151
IfxI2c_initSclSdaPin
void IfxI2c_initSclSdaPin(const IfxI2c_Scl_InOut *scl, const IfxI2c_Sda_InOut *sda, IfxPort_PadDriver padDriver)
Definition: IfxI2c.c:204
IfxI2c_clearAllDtrInterruptSources
IFX_INLINE void IfxI2c_clearAllDtrInterruptSources(Ifx_I2C *i2c)
clears all DTR interrupt sources
Definition: IfxI2c.h:548
IfxI2c_Scl_InOut
SCL input mapping structure.
Definition: IfxI2c_PinMap.h:56
IfxI2c_getProtocolInterruptSourceStatus
IFX_INLINE boolean IfxI2c_getProtocolInterruptSourceStatus(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
returns the status of specified protocol interrupt source
Definition: IfxI2c.h:706
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxI2c_stop
IFX_INLINE void IfxI2c_stop(Ifx_I2C *i2c)
Definition: IfxI2c.h:773
IfxI2c_getIndex
IfxI2c_Index IfxI2c_getIndex(Ifx_I2C *i2c)
API to get the resource index of the I2C specified.
Definition: IfxI2c.c:184
IfxI2c_getErrorSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxI2c_getErrorSrcPointer(Ifx_I2C *i2c)
Returns the SRC pointer for I2C Error interrupt.
Definition: IfxI2c.h:687
IfxScuCcu_getI2cFrequency
IFX_INLINE float32 IfxScuCcu_getI2cFrequency(void)
API to get I2C frequency. This API returns the based on the divider value in CCUCON register and fSOU...
Definition: IfxScuCcu.h:1623
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:248
IfxI2c_resetModule
void IfxI2c_resetModule(Ifx_I2C *i2c)
resets the I2c kernel
Definition: IfxI2c.c:244
IfxI2c_ProtocolInterruptSource_transmissionEnd
transmission end service request
Definition: IfxI2c.h:146
IfxI2c_run
IFX_INLINE void IfxI2c_run(Ifx_I2C *i2c)
Definition: IfxI2c.h:731
IfxI2c_getDtrSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxI2c_getDtrSrcPointer(Ifx_I2C *i2c)
Returns the SRC pointer for I2C DTR interrupt.
Definition: IfxI2c.h:656
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxI2c_setTransmitPacketSize
IFX_INLINE void IfxI2c_setTransmitPacketSize(Ifx_I2C *i2c, Ifx_SizeT size)
Sets the number of bytes to be tansmitted.
Definition: IfxI2c.h:767
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxI2c_BusStatus_idle
idle
Definition: IfxI2c.h:88
IfxI2c_setPinSelection
IFX_INLINE void IfxI2c_setPinSelection(Ifx_I2C *i2c, IfxI2c_PinSelect pisel)
selects the pin
Definition: IfxI2c.h:743
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:675
IfxI2c_Scl_InOut::outSelect
IfxPort_OutputIdx outSelect
Port control code.
Definition: IfxI2c_PinMap.h:61


iLLD_TC38A: IfxI2c.h Source File

  • I2c
  • Std
IfxI2c.h
Go to the documentation of this file.
1 /**
2 * \file IfxI2c.h
3 * \brief I2C basic functionality
4 * \ingroup IfxLld_I2c
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_I2c_Std_enums Enumerations
42 * \ingroup IfxLld_I2c_Std
43 * \defgroup IfxLld_I2c_Std_functions Functions
44 * \ingroup IfxLld_I2c_Std
45 * \defgroup IfxLld_I2c_Std_structures Data Structures
46 * \ingroup IfxLld_I2c_Std
47 */
48
49 #ifndef IFXI2C_H
50 #define IFXI2C_H 1
51
52 /******************************************************************************/
53 /*----------------------------------Includes----------------------------------*/
54 /******************************************************************************/
55
56 #include "_Impl/IfxI2c_cfg.h"
57 #include "Scu/Std/IfxScuWdt.h"
58 #include "Scu/Std/IfxScuCcu.h"
59 #include "IfxI2c_bf.h"
60 #include "_PinMap/IfxI2c_PinMap.h"
61 #include "Src/Std/IfxSrc.h"
62
63 /******************************************************************************/
64 /*-----------------------------------Macros-----------------------------------*/
65 /******************************************************************************/
66
67 /** \brief Master code for high speed mode
68 */
69 #define IFXI2C_HIGHSPEED_MASTER_CODE (0xEU)
70
71 /******************************************************************************/
72 /*--------------------------------Enumerations--------------------------------*/
73 /******************************************************************************/
74
75 /** \addtogroup IfxLld_I2c_Std_enums
76 * \{ */
77 /** \brief Selects width of address bits (7 or 10 bits)
78 * Definition in Ifx_I2C.ADDRCFG.B.TBAM
79 */
80 typedef enum
81 {
82 IfxI2c_AddressMode_7Bit = 0, /**< \brief sets 7 bit address */
83 IfxI2c_AddressMode_10Bit = 1 /**< \brief sets 10 bit address */
84 } IfxI2c_AddressMode;
85
86 typedef enum
87 {
88 IfxI2c_BusStatus_idle = 0, /**< \brief idle */
89 IfxI2c_BusStatus_started = 1, /**< \brief started */
90 IfxI2c_BusStatus_busyMaster = 2, /**< \brief busy Master */
91 IfxI2c_BusStatus_remoteSlave = 3 /**< \brief remote Slave */
92 } IfxI2c_BusStatus;
93
94 /** \brief enables DTR interrupt flags
95 * Definition in Ifx.I2C.IMSC.U
96 */
97 typedef enum
98 {
99 IfxI2c_DtrInterruptSource_lastSingleRequest = IFX_I2C_IMSC_LSREQ_INT_OFF, /**< \brief last single service request */
100 IfxI2c_DtrInterruptSource_singleRequest = IFX_I2C_IMSC_SREQ_INT_OFF, /**< \brief single service request */
101 IfxI2c_DtrInterruptSource_lastBurstRequest = IFX_I2C_IMSC_LBREQ_INT_OFF, /**< \brief last burst service request */
102 IfxI2c_DtrInterruptSource_burstRequest = IFX_I2C_IMSC_BREQ_INT_OFF /**< \brief burst service request */
103 } IfxI2c_DtrInterruptSource;
104
105 /** \brief enable error interrupt request source
106 * Definition in Ifx.I2C.ERRIRQSM.U
107 */
108 typedef enum
109 {
110 IfxI2c_ErrorInterruptSource_rxFifoUnderflow = IFX_I2C_ERRIRQSM_RXF_UFL_OFF, /**< \brief receive fifo underflow service request */
111 IfxI2c_ErrorInterruptSource_rxFifoOverflow = IFX_I2C_ERRIRQSM_RXF_OFL_OFF, /**< \brief receive fifo overflow service request */
112 IfxI2c_ErrorInterruptSource_txFifoUnderflow = IFX_I2C_ERRIRQSM_TXF_UFL_OFF, /**< \brief transmit fifo underflow service request */
113 IfxI2c_ErrorInterruptSource_txFifoOverflow = IFX_I2C_ERRIRQSM_TXF_OFL_OFF /**< \brief transmit fifo overflow service request */
114 } IfxI2c_ErrorInterruptSource;
115
116 /** \brief Select speed mode. Standard and Fast or High Speed mode.
117 */
118 typedef enum
119 {
120 IfxI2c_Mode_StandardAndFast = 0, /**< \brief Sets Standard and Fast speed mode */
121 IfxI2c_Mode_HighSpeed = 1 /**< \brief Sets HighSpeed Mode */
122 } IfxI2c_Mode;
123
124 typedef enum
125 {
126 IfxI2c_PinSelect_a = 0,
127 IfxI2c_PinSelect_b = 1,
128 IfxI2c_PinSelect_c = 2,
129 IfxI2c_PinSelect_d = 3,
130 IfxI2c_PinSelect_e = 4,
131 IfxI2c_PinSelect_f = 5,
132 IfxI2c_PinSelect_g = 6,
133 IfxI2c_PinSelect_h = 7
134 } IfxI2c_PinSelect;
135
136 /** \brief enable protocol interrupt source
137 * Definition in Ifx.I2C.PIRQSM.U
138 */
139 typedef enum
140 {
141 IfxI2c_ProtocolInterruptSource_addressMatch = IFX_I2C_PIRQSM_AM_OFF, /**< \brief address match service request */
142 IfxI2c_ProtocolInterruptSource_generalCall = IFX_I2C_PIRQSM_GC_OFF, /**< \brief general call service request */
143 IfxI2c_ProtocolInterruptSource_masterCode = IFX_I2C_PIRQSM_MC_OFF, /**< \brief master code service request */
144 IfxI2c_ProtocolInterruptSource_arbitrationLost = IFX_I2C_PIRQSM_AL_OFF, /**< \brief arbitration lost service request */
145 IfxI2c_ProtocolInterruptSource_notAcknowledgeReceived = IFX_I2C_PIRQSM_NACK_OFF, /**< \brief not acknowledge received service request */
146 IfxI2c_ProtocolInterruptSource_transmissionEnd = IFX_I2C_PIRQSM_TX_END_OFF, /**< \brief transmission end service request */
147 IfxI2c_ProtocolInterruptSource_receiveMode = IFX_I2C_PIRQSM_RX_OFF /**< \brief receive mode service request */
148 } IfxI2c_ProtocolInterruptSource;
149
150 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
151 * Definition in Ifx_I2C.CLC1.B.EDIS
152 */
153 typedef enum
154 {
155 IfxI2c_SleepMode_enable = 0, /**< \brief enables sleep mode */
156 IfxI2c_SleepMode_disable = 1 /**< \brief disables sleep mode */
157 } IfxI2c_SleepMode;
158
159 /** \} */
160
161 /******************************************************************************/
162 /*-----------------------------Data Structures--------------------------------*/
163 /******************************************************************************/
164
165 /** \addtogroup IfxLld_I2c_Std_structures
166 * \{ */
167 /** \brief Pin Structure
168 */
169 typedef struct
170 {
171 IfxI2c_Scl_InOut *scl;
172 IfxI2c_Sda_InOut *sda;
173 IfxPort_PadDriver padDriver;
174 } IfxI2c_Pins;
175
176 /** \} */
177
178 /** \addtogroup IfxLld_I2c_Std_functions
179 * \{ */
180
181 /******************************************************************************/
182 /*-------------------------Inline Function Prototypes-------------------------*/
183 /******************************************************************************/
184
185 /** \brief Returns if the bus is free
186 */
187 IFX_INLINE boolean IfxI2c_busIsFree(Ifx_I2C *i2c);
188
189 /** \brief clears all DTR interrupt sources
190 * \param i2c pointer to i2c registers
191 * \return None
192 */
193 IFX_INLINE void IfxI2c_clearAllDtrInterruptSources(Ifx_I2C *i2c);
194
195 /** \brief clears all Error Interrupt sources
196 * \param i2c pointer to i2c registers
197 * \return None
198 */
199 IFX_INLINE void IfxI2c_clearAllErrorInterruptSources(Ifx_I2C *i2c);
200
201 /** \brief Clears all Protocol Interrupt sources
202 * \param i2c pointer to i2c registers
203 * \return None
204 */
205 IFX_INLINE void IfxI2c_clearAllProtocolInterruptSources(Ifx_I2C *i2c);
206
207 /** \brief clears the specified source of DTR interrupt
208 * \param i2c pointer to i2c registers
209 * \param source DTR interrupt source
210 * \return None
211 */
212 IFX_INLINE void IfxI2c_clearDtrInterruptSource(Ifx_I2C *i2c, IfxI2c_DtrInterruptSource source);
213
214 /** \brief clears the specified source of error interrupt
215 * \param i2c pointer to i2c registers
216 * \param source error interrupt source
217 * \return None
218 */
219 IFX_INLINE void IfxI2c_clearErrorInterruptSource(Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source);
220
221 /** \brief clears the specified source of protocol interrupt
222 * \param i2c pointer to i2c registers
223 * \param source protocol interrupt source
224 * \return None
225 */
226 IFX_INLINE void IfxI2c_clearProtocolInterruptSource(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source);
227
228 /** \brief Data request is cleared automatically
229 * \param i2c pointer to i2c registers
230 * \return None
231 */
232 IFX_INLINE void IfxI2c_clearRequestBuffer(Ifx_I2C *i2c);
233
234 /** \brief disables the specified source of DTR interupt
235 * \param i2c pointer to i2c registers
236 * \param source DTR interrupt source
237 * \return None
238 */
239 IFX_INLINE void IfxI2c_disableDtrInterruptSource(Ifx_I2C *i2c, IfxI2c_DtrInterruptSource source);
240
241 /** \brief disables the error interrupt flag
242 * \param i2c pointer to i2c registers
243 * \return None
244 */
245 IFX_INLINE void IfxI2c_disableErrorInterruptFlag(Ifx_I2C *i2c);
246
247 /** \brief disables the specified source of error interrupt
248 * \param i2c pointer to i2c registers
249 * \param source error interrupt source
250 * \return None
251 */
252 IFX_INLINE void IfxI2c_disableErrorInterruptSource(Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source);
253
254 /** \brief disables the Protocol interrupt flag
255 * \param i2c pointer to i2c registers
256 * \return None
257 */
258 IFX_INLINE void IfxI2c_disableProtocolInterruptFlag(Ifx_I2C *i2c);
259
260 /** \brief disables the specified source of protocol interrupt
261 * \param i2c pointer to i2c registers
262 * \param source protocol interrupt source
263 * \return None
264 */
265 IFX_INLINE void IfxI2c_disableProtocolInterruptSource(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source);
266
267 /** \brief enables the specified source of DTR interupt
268 * \param i2c pointer to i2c registers
269 * \param source DTR interrupt source
270 * \return None
271 */
272 IFX_INLINE void IfxI2c_enableDtrInterruptSource(Ifx_I2C *i2c, IfxI2c_DtrInterruptSource source);
273
274 /** \brief enables the error interrupt flag
275 * \param i2c pointer to i2c registers
276 * \return None
277 */
278 IFX_INLINE void IfxI2c_enableErrorInterruptFlag(Ifx_I2C *i2c);
279
280 /** \brief enables the specified source of error interrupt
281 * \param i2c pointer to i2c registers
282 * \param source error interrupt source
283 * \return None
284 */
285 IFX_INLINE void IfxI2c_enableErrorInterruptSource(Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source);
286
287 /** \brief enables the protocol interrupt flag
288 * \param i2c pointer to I2C registers
289 * \return None
290 */
291 IFX_INLINE void IfxI2c_enableProtocolInterruptFlag(Ifx_I2C *i2c);
292
293 /** \brief enables the specified source of protocol interrupt
294 * \param i2c pointer to I2C registers
295 * \param source protocol interrupt source
296 * \return None
297 */
298 IFX_INLINE void IfxI2c_enableProtocolInterruptSource(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source);
299
300 /**
301 * \param i2c pointer to i2c registers
302 * \return BusStatus
303 */
304 IFX_INLINE IfxI2c_BusStatus IfxI2c_getBusStatus(Ifx_I2C *i2c);
305
306 /** \brief Returns the SRC pointer for I2C DTR interrupt
307 * \param i2c pointer to i2c registers
308 * \return SRC pointer for I2C DTR interrupt
309 */
310 IFX_INLINE volatile Ifx_SRC_SRCR *IfxI2c_getDtrSrcPointer(Ifx_I2C *i2c);
311
312 /** \brief returns the status of specified DTR interrupt source
313 * \param i2c pointer to i2c registers
314 * \param source DTR interrupt source
315 * \return status
316 */
317 IFX_INLINE boolean IfxI2c_getDtrinterruptSourceStatus(Ifx_I2C *i2c, IfxI2c_DtrInterruptSource source);
318
319 /** \brief returns the current status of error interrupt flag
320 * \param i2c pointer to i2c registers
321 * \return status
322 */
323 IFX_INLINE boolean IfxI2c_getErrorInterruptFlagStatus(Ifx_I2C *i2c);
324
325 /** \brief returns the status of the error interrupt source
326 * \param i2c pointer to i2c registers
327 * \param source error interrupt source
328 * \return status
329 */
330 IFX_INLINE boolean IfxI2c_getErrorInterruptSourceStatus(Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source);
331
332 /** \brief Returns the SRC pointer for I2C Error interrupt
333 * \param i2c pointer to i2c registers
334 * \return SRC pointer for I2C Error Service interrupt
335 */
336 IFX_INLINE volatile Ifx_SRC_SRCR *IfxI2c_getErrorSrcPointer(Ifx_I2C *i2c);
337
338 /** \brief returns the current raw status of protocol interrupt
339 * \param i2c pointer to i2c registers
340 * \return status
341 */
342 IFX_INLINE boolean IfxI2c_getProtocolInterruptFlagStatus(Ifx_I2C *i2c);
343
344 /** \brief returns the status of specified protocol interrupt source
345 * \param i2c pointer to i2c registers
346 * \param source protocol interrupt source
347 * \return status
348 */
349 IFX_INLINE boolean IfxI2c_getProtocolInterruptSourceStatus(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source);
350
351 /** \brief Returns the SRC pointer for I2C Protocol interrupt
352 * \param i2c pointer to i2c registers
353 * \return SRC pointer for I2C Protocol Service interrupt
354 */
355 IFX_INLINE volatile Ifx_SRC_SRCR *IfxI2c_getProtocolSrcPointer(Ifx_I2C *i2c);
356
357 /** \brief Returns if the Fifo is requesting new data
358 */
359 IFX_INLINE boolean IfxI2c_isFifoRequest(Ifx_I2C *i2c);
360
361 /**
362 * \param i2c pointer to i2c registers
363 * \return None
364 */
365 IFX_INLINE void IfxI2c_run(Ifx_I2C *i2c);
366
367 /** \brief Sets width of I2C address to 7 or 10 bits
368 * \param i2c pointer to i2c registers
369 * \param mode selects 7 or 10 bits address
370 * \return None
371 */
372 IFX_INLINE void IfxI2c_setBitAddressMode(Ifx_I2C *i2c, IfxI2c_AddressMode mode);
373
374 /** \brief selects the pin
375 * \param i2c pointer to i2c registers
376 * \param pisel pin to be select
377 * \return None
378 */
379 IFX_INLINE void IfxI2c_setPinSelection(Ifx_I2C *i2c, IfxI2c_PinSelect pisel);
380
381 /** \brief Sets the number of bytes to be received
382 * \param i2c pointer to i2c registers
383 * \param size number of packets
384 * \return None
385 */
386 IFX_INLINE void IfxI2c_setReceivePacketSize(Ifx_I2C *i2c, Ifx_SizeT size);
387
388 /**
389 * \param i2c pointer to i2c registers
390 * \param address device address
391 * \return None
392 */
393 IFX_INLINE void IfxI2c_setSlaveDeviceAddress(Ifx_I2C *i2c, uint16 address);
394
395 /** \brief Sets the sensitivity of the module to sleep signal
396 * \param i2c pointer to i2c registers
397 * \param mode mode selection (enable / disable)
398 * \return None
399 */
400 IFX_INLINE void IfxI2c_setSleepMode(Ifx_I2C *i2c, IfxI2c_SleepMode mode);
401
402 /** \brief Sets the number of bytes to be tansmitted
403 * \param i2c pointer to i2c registers
404 * \param size number of packets
405 * \return None
406 */
407 IFX_INLINE void IfxI2c_setTransmitPacketSize(Ifx_I2C *i2c, Ifx_SizeT size);
408
409 /**
410 * \param i2c pointer to i2c registers
411 * \return None
412 */
413 IFX_INLINE void IfxI2c_stop(Ifx_I2C *i2c);
414
415 /**
416 * \param i2c pointer to i2c registers
417 * \return None
418 */
419 IFX_INLINE void IfxI2c_waitBusFree(Ifx_I2C *i2c);
420
421 /** \brief Writes a packet (4 bytes) into the Fifo
422 * \param i2c pointer to i2c registers
423 * \param packet specifies the byte to be transfer
424 * \return None
425 */
426 IFX_INLINE void IfxI2c_writeFifo(Ifx_I2C *i2c, uint32 packet);
427
428 /******************************************************************************/
429 /*-------------------------Global Function Prototypes-------------------------*/
430 /******************************************************************************/
431
432 /** \brief Configures the Module as Master
433 * \param i2c pointer to i2c registers
434 * \return None
435 */
436 IFX_EXTERN void IfxI2c_configureAsMaster(Ifx_I2C *i2c);
437
438 /** \brief Disables the I2c Module
439 * \param i2c pointer to i2c registers
440 * \return None
441 */
442 IFX_EXTERN void IfxI2c_disableModule(Ifx_I2C *i2c);
443
444 /** \brief enables the DTR interrupt
445 * \param i2c pointer to i2c registers
446 * \param typeOfService Type of Service (Cpu or DMA)
447 * \param priority priority of the interrupt
448 * \return None
449 */
450 IFX_EXTERN void IfxI2c_enableDtrInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority);
451
452 /** \brief Enables the Error interrupt
453 * \param i2c pointer to i2c registers
454 * \param typeOfService Type of Service (Cpu or DMA)
455 * \param priority priority of the interrupt
456 * \return None
457 */
458 IFX_EXTERN void IfxI2c_enableErrorInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority);
459
460 /** \brief Enables the I2c Module
461 * \param i2c pointer to i2c registers
462 * \return None
463 */
464 IFX_EXTERN void IfxI2c_enableModule(Ifx_I2C *i2c);
465
466 /** \brief Enables the protocol interrupt
467 * \param i2c pointer to i2c registers
468 * \param typeOfService Type of Service (Cpu or DMA)
469 * \param priority Priority of the interrupt
470 * \return None
471 */
472 IFX_EXTERN void IfxI2c_enableProtocolInterrupt(void *i2c, IfxSrc_Tos typeOfService, uint16 priority);
473
474 /**
475 * \param i2c Resource index of the I2c
476 * \return I2C module register address
477 */
478 IFX_EXTERN Ifx_I2C *IfxI2c_getAddress(IfxI2c_Index i2c);
479
480 /** \brief Returns the real Baudrate
481 * \return Baudrate
482 */
483 IFX_EXTERN float32 IfxI2c_getBaudrate(Ifx_I2C *i2c);
484
485 /** \brief API to get the resource index of the I2C specified.
486 * \param i2c Pointer to the I2C HW module (register memory map)
487 * \return Resource index of the I2C
488 */
489 IFX_EXTERN IfxI2c_Index IfxI2c_getIndex(Ifx_I2C *i2c);
490
491 /**
492 * \return None
493 */
494 IFX_EXTERN void IfxI2c_initSclSdaPin(const IfxI2c_Scl_InOut *scl, const IfxI2c_Sda_InOut *sda, IfxPort_PadDriver padDriver);
495
496 /** \brief Releases the bus, i.e puts a stop condition on the bus
497 * \return None
498 */
499 IFX_EXTERN void IfxI2c_releaseBus(Ifx_I2C *i2c);
500
501 /**
502 * \return None
503 */
504 IFX_EXTERN void IfxI2c_resetFifo(Ifx_I2C *i2c);
505
506 /** \brief resets the I2c kernel
507 * \param i2c pointer to i2c registers
508 * \return None
509 */
510 IFX_EXTERN void IfxI2c_resetModule(Ifx_I2C *i2c);
511
512 /** \brief Calculates the desired baudrate
513 * \param i2c pointer to i2c registers
514 * \param baudrate specifies the baud rate
515 * \return None
516 */
517 IFX_EXTERN void IfxI2c_setBaudrate(Ifx_I2C *i2c, float32 baudrate);
518
519 /** \} */
520
521 /******************************************************************************/
522 /*-------------------------Global Function Prototypes-------------------------*/
523 /******************************************************************************/
524
525 /** \brief Configure the i2c master to high speed mode baudrate > 400kbits/s
526 * \param i2c pointer to i2c registers
527 * \return None
528 */
529 IFX_EXTERN void IfxI2c_configureHighSpeedMode(Ifx_I2C *i2c);
530
531 /******************************************************************************/
532 /*---------------------Inline Function Implementations------------------------*/
533 /******************************************************************************/
534
535 IFX_INLINE boolean IfxI2c_busIsFree(Ifx_I2C *i2c)
536 {
537 boolean free = FALSE;
538
539 if (i2c->BUSSTAT.B.BS == IfxI2c_BusStatus_idle)
540 {
541 free = TRUE;
542 }
543
544 return free;
545 }
546
547
548 IFX_INLINE void IfxI2c_clearAllDtrInterruptSources(Ifx_I2C *i2c)
549 {
550 i2c->ICR.U = (1 << IFX_I2C_ICR_LSREQ_INT_OFF) | (1 << IFX_I2C_ICR_SREQ_INT_OFF) | (1 << IFX_I2C_ICR_LBREQ_INT_OFF) | (1 << IFX_I2C_ICR_BREQ_INT_OFF);
551 }
552
553
554 IFX_INLINE void IfxI2c_clearAllErrorInterruptSources(Ifx_I2C *i2c)
555 {
556 i2c->ERRIRQSC.U = (1 << IFX_I2C_ERRIRQSC_RXF_UFL_OFF) | (1 << IFX_I2C_ERRIRQSC_RXF_OFL_OFF) | (1 << IFX_I2C_ERRIRQSC_TXF_UFL_OFF) | (1 << IFX_I2C_ERRIRQSC_TXF_OFL_OFF);
557 }
558
559
560 IFX_INLINE void IfxI2c_clearAllProtocolInterruptSources(Ifx_I2C *i2c)
561 {
562 i2c->PIRQSC.U = (1 << IFX_I2C_PIRQSC_AM_OFF) | (1 << IFX_I2C_PIRQSC_GC_OFF) | (1 << IFX_I2C_PIRQSC_MC_OFF) | (1 << IFX_I2C_PIRQSC_AL_OFF) | (1 << IFX_I2C_PIRQSC_NACK_OFF) | (1 << IFX_I2C_PIRQSC_TX_END_OFF) | (1 << IFX_I2C_PIRQSC_RX_OFF);
563 }
564
565
566 IFX_INLINE void IfxI2c_clearDtrInterruptSource(Ifx_I2C *i2c, IfxI2c_DtrInterruptSource source)
567 {
568 i2c->ICR.U = (1 << source);
569 }
570
571
572 IFX_INLINE void IfxI2c_clearErrorInterruptSource(Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source)
573 {
574 i2c->ERRIRQSC.U = (1 << source);
575 }
576
577
578 IFX_INLINE void IfxI2c_clearProtocolInterruptSource(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
579 {
580 i2c->PIRQSC.U = (1 << source);
581 }
582
583
584 IFX_INLINE void IfxI2c_clearRequestBuffer(Ifx_I2C *i2c)
585 {
586 i2c->FIFOCFG.B.CRBC = 1;
587 }
588
589
590 IFX_INLINE void IfxI2c_disableDtrInterruptSource(Ifx_I2C *i2c, IfxI2c_DtrInterruptSource source)
591 {
592 i2c->IMSC.U &= ~(1 << source);
593 }
594
595
596 IFX_INLINE void IfxI2c_disableErrorInterruptFlag(Ifx_I2C *i2c)
597 {
598 i2c->IMSC.B.I2C_ERR_INT = 0;
599 }
600
601
602 IFX_INLINE void IfxI2c_disableErrorInterruptSource(Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source)
603 {
604 i2c->ERRIRQSM.U &= ~(1 << source);
605 }
606
607
608 IFX_INLINE void IfxI2c_disableProtocolInterruptFlag(Ifx_I2C *i2c)
609 {
610 i2c->IMSC.B.I2C_P_INT = 0;
611 }
612
613
614 IFX_INLINE void IfxI2c_disableProtocolInterruptSource(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
615 {
616 i2c->PIRQSM.U &= ~(1 << source);
617 }
618
619
620 IFX_INLINE void IfxI2c_enableDtrInterruptSource(Ifx_I2C *i2c, IfxI2c_DtrInterruptSource source)
621 {
622 i2c->IMSC.U |= (1 << source);
623 }
624
625
626 IFX_INLINE void IfxI2c_enableErrorInterruptFlag(Ifx_I2C *i2c)
627 {
628 i2c->IMSC.B.I2C_ERR_INT = 1;
629 }
630
631
632 IFX_INLINE void IfxI2c_enableErrorInterruptSource(Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source)
633 {
634 i2c->ERRIRQSM.U |= (1 << source);
635 }
636
637
638 IFX_INLINE void IfxI2c_enableProtocolInterruptFlag(Ifx_I2C *i2c)
639 {
640 i2c->IMSC.B.I2C_P_INT = 1;
641 }
642
643
644 IFX_INLINE void IfxI2c_enableProtocolInterruptSource(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
645 {
646 i2c->PIRQSM.U |= (1 << source);
647 }
648
649
650 IFX_INLINE IfxI2c_BusStatus IfxI2c_getBusStatus(Ifx_I2C *i2c)
651 {
652 return (IfxI2c_BusStatus)i2c->BUSSTAT.B.BS;
653 }
654
655
656 IFX_INLINE volatile Ifx_SRC_SRCR *IfxI2c_getDtrSrcPointer(Ifx_I2C *i2c)
657 {
658 if (i2c == &MODULE_I2C0)
659 {
660 return &MODULE_SRC.I2C.I2C[0].DTR;
661 }
662 else
663 {
664 return &MODULE_SRC.I2C.I2C[1].DTR;
665 }
666 }
667
668
669 IFX_INLINE boolean IfxI2c_getDtrinterruptSourceStatus(Ifx_I2C *i2c, IfxI2c_DtrInterruptSource source)
670 {
671 return (i2c->RIS.U & (1 << source)) ? TRUE : FALSE;
672 }
673
674
675 IFX_INLINE boolean IfxI2c_getErrorInterruptFlagStatus(Ifx_I2C *i2c)
676 {
677 return i2c->RIS.B.I2C_ERR_INT;
678 }
679
680
681 IFX_INLINE boolean IfxI2c_getErrorInterruptSourceStatus(Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source)
682 {
683 return (i2c->ERRIRQSS.U & (1 << source)) ? TRUE : FALSE;
684 }
685
686
687 IFX_INLINE volatile Ifx_SRC_SRCR *IfxI2c_getErrorSrcPointer(Ifx_I2C *i2c)
688 {
689 if (i2c == &MODULE_I2C0)
690 {
691 return &MODULE_SRC.I2C.I2C[0].ERR;
692 }
693 else
694 {
695 return &MODULE_SRC.I2C.I2C[1].ERR;
696 }
697 }
698
699
700 IFX_INLINE boolean IfxI2c_getProtocolInterruptFlagStatus(Ifx_I2C *i2c)
701 {
702 return i2c->RIS.B.I2C_P_INT;
703 }
704
705
706 IFX_INLINE boolean IfxI2c_getProtocolInterruptSourceStatus(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
707 {
708 return (i2c->PIRQSS.U & (1 << source)) ? TRUE : FALSE;
709 }
710
711
712 IFX_INLINE volatile Ifx_SRC_SRCR *IfxI2c_getProtocolSrcPointer(Ifx_I2C *i2c)
713 {
714 if (i2c == &MODULE_I2C0)
715 {
716 return &MODULE_SRC.I2C.I2C[0].P;
717 }
718 else
719 {
720 return &MODULE_SRC.I2C.I2C[1].P;
721 }
722 }
723
724
725 IFX_INLINE boolean IfxI2c_isFifoRequest(Ifx_I2C *i2c)
726 {
727 return i2c->RIS.U & 0x0F ? TRUE : FALSE;
728 }
729
730
731 IFX_INLINE void IfxI2c_run(Ifx_I2C *i2c)
732 {
733 i2c->RUNCTRL.U = 1;
734 }
735
736
737 IFX_INLINE void IfxI2c_setBitAddressMode(Ifx_I2C *i2c, IfxI2c_AddressMode mode)
738 {
739 i2c->ADDRCFG.B.TBAM = mode;
740 }
741
742
743 IFX_INLINE void IfxI2c_setPinSelection(Ifx_I2C *i2c, IfxI2c_PinSelect pisel)
744 {
745 i2c->GPCTL.B.PISEL = pisel;
746 }
747
748
749 IFX_INLINE void IfxI2c_setReceivePacketSize(Ifx_I2C *i2c, Ifx_SizeT size)
750 {
751 i2c->MRPSCTRL.B.MRPS = size;
752 }
753
754
755 IFX_INLINE void IfxI2c_setSlaveDeviceAddress(Ifx_I2C *i2c, uint16 address)
756 {
757 i2c->ADDRCFG.B.ADR = address;
758 }
759
760
761 IFX_INLINE void IfxI2c_setSleepMode(Ifx_I2C *i2c, IfxI2c_SleepMode mode)
762 {
763 i2c->CLC1.B.EDIS = mode;
764 }
765
766
767 IFX_INLINE void IfxI2c_setTransmitPacketSize(Ifx_I2C *i2c, Ifx_SizeT size)
768 {
769 i2c->TPSCTRL.B.TPS = size;
770 }
771
772
773 IFX_INLINE void IfxI2c_stop(Ifx_I2C *i2c)
774 {
775 i2c->RUNCTRL.U = 0;
776 }
777
778
779 IFX_INLINE void IfxI2c_waitBusFree(Ifx_I2C *i2c)
780 {
781 while (IfxI2c_getBusStatus(i2c) != IfxI2c_BusStatus_idle)
782 {}
783 }
784
785
786 IFX_INLINE void IfxI2c_writeFifo(Ifx_I2C *i2c, uint32 packet)
787 {
788 i2c->TXD.U = packet;
789 }
790
791
792 #endif /* IFXI2C_H */
IfxI2c_getProtocolInterruptFlagStatus
IFX_INLINE boolean IfxI2c_getProtocolInterruptFlagStatus(Ifx_I2C *i2c)
returns the current raw status of protocol interrupt
Definition: IfxI2c.h:700
IfxI2c_enableErrorInterrupt
IFX_EXTERN void IfxI2c_enableErrorInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
Enables the Error interrupt.
Definition: IfxI2c.c:96
IfxI2c_Pins::padDriver
IfxPort_PadDriver padDriver
Definition: IfxI2c.h:173
IfxI2c_writeFifo
IFX_INLINE void IfxI2c_writeFifo(Ifx_I2C *i2c, uint32 packet)
Writes a packet (4 bytes) into the Fifo.
Definition: IfxI2c.h:786
IfxI2c_releaseBus
IFX_EXTERN void IfxI2c_releaseBus(Ifx_I2C *i2c)
Releases the bus, i.e puts a stop condition on the bus.
Definition: IfxI2c.c:215
IfxI2c_BusStatus_remoteSlave
remote Slave
Definition: IfxI2c.h:91
IfxI2c_BusStatus
IfxI2c_BusStatus
Definition: IfxI2c.h:86
IfxI2c_BusStatus_busyMaster
busy Master
Definition: IfxI2c.h:90
IfxI2c_setReceivePacketSize
IFX_INLINE void IfxI2c_setReceivePacketSize(Ifx_I2C *i2c, Ifx_SizeT size)
Sets the number of bytes to be received.
Definition: IfxI2c.h:749
IfxI2c_busIsFree
IFX_INLINE boolean IfxI2c_busIsFree(Ifx_I2C *i2c)
Returns if the bus is free.
Definition: IfxI2c.h:535
IfxI2c_getBusStatus
IFX_INLINE IfxI2c_BusStatus IfxI2c_getBusStatus(Ifx_I2C *i2c)
Definition: IfxI2c.h:650
IfxI2c_PinSelect_h
Definition: IfxI2c.h:133
IfxI2c_PinSelect
IfxI2c_PinSelect
Definition: IfxI2c.h:124
IfxI2c_Mode
IfxI2c_Mode
Select speed mode. Standard and Fast or High Speed mode.
Definition: IfxI2c.h:118
IfxI2c_ErrorInterruptSource_rxFifoUnderflow
receive fifo underflow service request
Definition: IfxI2c.h:110
IfxI2c_AddressMode
IfxI2c_AddressMode
Selects width of address bits (7 or 10 bits) Definition in Ifx_I2C.ADDRCFG.B.TBAM.
Definition: IfxI2c.h:80
IfxI2c_setBaudrate
IFX_EXTERN void IfxI2c_setBaudrate(Ifx_I2C *i2c, float32 baudrate)
Calculates the desired baudrate.
Definition: IfxI2c.c:263
uint32
unsigned long uint32
Definition: Platform_Types.h:116
float32
float float32
Definition: Platform_Types.h:170
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
IfxI2c_getBaudrate
IFX_EXTERN float32 IfxI2c_getBaudrate(Ifx_I2C *i2c)
Returns the real Baudrate.
Definition: IfxI2c.c:160
IfxI2c_SleepMode_enable
enables sleep mode
Definition: IfxI2c.h:155
IfxI2c_setSlaveDeviceAddress
IFX_INLINE void IfxI2c_setSlaveDeviceAddress(Ifx_I2C *i2c, uint16 address)
Definition: IfxI2c.h:755
IfxI2c_DtrInterruptSource_burstRequest
burst service request
Definition: IfxI2c.h:102
IfxI2c_setSleepMode
IFX_INLINE void IfxI2c_setSleepMode(Ifx_I2C *i2c, IfxI2c_SleepMode mode)
Sets the sensitivity of the module to sleep signal.
Definition: IfxI2c.h:761
IfxI2c_configureHighSpeedMode
IFX_EXTERN void IfxI2c_configureHighSpeedMode(Ifx_I2C *i2c)
Configure the i2c master to high speed mode baudrate > 400kbits/s.
Definition: IfxI2c.c:316
IfxI2c_ProtocolInterruptSource_generalCall
general call service request
Definition: IfxI2c.h:142
IfxSrc.h
SRC basic functionality.
IfxI2c_getProtocolSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxI2c_getProtocolSrcPointer(Ifx_I2C *i2c)
Returns the SRC pointer for I2C Protocol interrupt.
Definition: IfxI2c.h:712
IfxI2c_Pins::scl
IfxI2c_Scl_InOut * scl
Definition: IfxI2c.h:171
IfxI2c_Sda_InOut
SDA input mapping structure.
Definition: IfxI2c_PinMap.h:65
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxI2c_resetFifo
IFX_EXTERN void IfxI2c_resetFifo(Ifx_I2C *i2c)
Definition: IfxI2c.c:231
IfxI2c_enableDtrInterrupt
IFX_EXTERN void IfxI2c_enableDtrInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
enables the DTR interrupt
Definition: IfxI2c.c:87
IfxI2c_PinSelect_b
Definition: IfxI2c.h:127
IfxI2c_disableErrorInterruptSource
IFX_INLINE void IfxI2c_disableErrorInterruptSource(Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source)
disables the specified source of error interrupt
Definition: IfxI2c.h:602
IfxI2c_Index
IfxI2c_Index
List of the available I2c interfaces.
Definition: IfxI2c_cfg.h:77
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxI2c_ErrorInterruptSource_txFifoOverflow
transmit fifo overflow service request
Definition: IfxI2c.h:113
IfxI2c_getAddress
IFX_EXTERN Ifx_I2C * IfxI2c_getAddress(IfxI2c_Index i2c)
Definition: IfxI2c.c:143
IfxI2c_enableProtocolInterruptFlag
IFX_INLINE void IfxI2c_enableProtocolInterruptFlag(Ifx_I2C *i2c)
enables the protocol interrupt flag
Definition: IfxI2c.h:638
IfxScuWdt.h
SCU basic functionality.
IfxI2c_clearRequestBuffer
IFX_INLINE void IfxI2c_clearRequestBuffer(Ifx_I2C *i2c)
Data request is cleared automatically.
Definition: IfxI2c.h:584
IfxI2c_Mode_StandardAndFast
Sets Standard and Fast speed mode.
Definition: IfxI2c.h:120
IfxI2c_PinSelect_g
Definition: IfxI2c.h:132
IfxI2c_disableErrorInterruptFlag
IFX_INLINE void IfxI2c_disableErrorInterruptFlag(Ifx_I2C *i2c)
disables the error interrupt flag
Definition: IfxI2c.h:596
IfxI2c_disableDtrInterruptSource
IFX_INLINE void IfxI2c_disableDtrInterruptSource(Ifx_I2C *i2c, IfxI2c_DtrInterruptSource source)
disables the specified source of DTR interupt
Definition: IfxI2c.h:590
IfxI2c_disableModule
IFX_EXTERN void IfxI2c_disableModule(Ifx_I2C *i2c)
Disables the I2c Module.
Definition: IfxI2c.c:72
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxI2c_PinMap.h
I2C I/O map.
IfxI2c_ErrorInterruptSource_txFifoUnderflow
transmit fifo underflow service request
Definition: IfxI2c.h:112
IfxI2c_SleepMode
IfxI2c_SleepMode
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_I2C.CLC1.B.EDIS.
Definition: IfxI2c.h:153
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxI2c_configureAsMaster
IFX_EXTERN void IfxI2c_configureAsMaster(Ifx_I2C *i2c)
Configures the Module as Master.
Definition: IfxI2c.c:52
IfxI2c_enableDtrInterruptSource
IFX_INLINE void IfxI2c_enableDtrInterruptSource(Ifx_I2C *i2c, IfxI2c_DtrInterruptSource source)
enables the specified source of DTR interupt
Definition: IfxI2c.h:620
IfxI2c_AddressMode_7Bit
sets 7 bit address
Definition: IfxI2c.h:82
IfxI2c_getDtrinterruptSourceStatus
IFX_INLINE boolean IfxI2c_getDtrinterruptSourceStatus(Ifx_I2C *i2c, IfxI2c_DtrInterruptSource source)
returns the status of specified DTR interrupt source
Definition: IfxI2c.h:669
IfxI2c_ProtocolInterruptSource_receiveMode
receive mode service request
Definition: IfxI2c.h:147
IfxI2c_clearErrorInterruptSource
IFX_INLINE void IfxI2c_clearErrorInterruptSource(Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source)
clears the specified source of error interrupt
Definition: IfxI2c.h:572
IfxI2c_isFifoRequest
IFX_INLINE boolean IfxI2c_isFifoRequest(Ifx_I2C *i2c)
Returns if the Fifo is requesting new data.
Definition: IfxI2c.h:725
IfxI2c_enableErrorInterruptSource
IFX_INLINE void IfxI2c_enableErrorInterruptSource(Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source)
enables the specified source of error interrupt
Definition: IfxI2c.h:632
IfxI2c_ErrorInterruptSource_rxFifoOverflow
receive fifo overflow service request
Definition: IfxI2c.h:111
IfxI2c_enableProtocolInterrupt
IFX_EXTERN void IfxI2c_enableProtocolInterrupt(void *i2c, IfxSrc_Tos typeOfService, uint16 priority)
Enables the protocol interrupt.
Definition: IfxI2c.c:134
IfxI2c_cfg.h
I2C on-chip implementation data.
IfxI2c_enableModule
IFX_EXTERN void IfxI2c_enableModule(Ifx_I2C *i2c)
Enables the I2c Module.
Definition: IfxI2c.c:105
IfxI2c_getErrorInterruptFlagStatus
IFX_INLINE boolean IfxI2c_getErrorInterruptFlagStatus(Ifx_I2C *i2c)
returns the current status of error interrupt flag
Definition: IfxI2c.h:675
IfxI2c_ProtocolInterruptSource_arbitrationLost
arbitration lost service request
Definition: IfxI2c.h:144
IfxI2c_clearProtocolInterruptSource
IFX_INLINE void IfxI2c_clearProtocolInterruptSource(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
clears the specified source of protocol interrupt
Definition: IfxI2c.h:578
IfxI2c_clearAllProtocolInterruptSources
IFX_INLINE void IfxI2c_clearAllProtocolInterruptSources(Ifx_I2C *i2c)
Clears all Protocol Interrupt sources.
Definition: IfxI2c.h:560
IfxI2c_DtrInterruptSource_singleRequest
single service request
Definition: IfxI2c.h:100
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:151
IfxI2c_ErrorInterruptSource
IfxI2c_ErrorInterruptSource
enable error interrupt request source Definition in Ifx.I2C.ERRIRQSM.U
Definition: IfxI2c.h:108
IfxI2c_initSclSdaPin
IFX_EXTERN void IfxI2c_initSclSdaPin(const IfxI2c_Scl_InOut *scl, const IfxI2c_Sda_InOut *sda, IfxPort_PadDriver padDriver)
Definition: IfxI2c.c:204
IfxI2c_clearAllDtrInterruptSources
IFX_INLINE void IfxI2c_clearAllDtrInterruptSources(Ifx_I2C *i2c)
clears all DTR interrupt sources
Definition: IfxI2c.h:548
IfxI2c_Scl_InOut
SCL input mapping structure.
Definition: IfxI2c_PinMap.h:56
IfxI2c_getProtocolInterruptSourceStatus
IFX_INLINE boolean IfxI2c_getProtocolInterruptSourceStatus(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
returns the status of specified protocol interrupt source
Definition: IfxI2c.h:706
IfxI2c_disableProtocolInterruptFlag
IFX_INLINE void IfxI2c_disableProtocolInterruptFlag(Ifx_I2C *i2c)
disables the Protocol interrupt flag
Definition: IfxI2c.h:608
IfxI2c_waitBusFree
IFX_INLINE void IfxI2c_waitBusFree(Ifx_I2C *i2c)
Definition: IfxI2c.h:779
IfxI2c_SleepMode_disable
disables sleep mode
Definition: IfxI2c.h:156
IfxI2c_enableProtocolInterruptSource
IFX_INLINE void IfxI2c_enableProtocolInterruptSource(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
enables the specified source of protocol interrupt
Definition: IfxI2c.h:644
IfxI2c_BusStatus_started
started
Definition: IfxI2c.h:89
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxI2c_PinSelect_f
Definition: IfxI2c.h:131
IfxI2c_stop
IFX_INLINE void IfxI2c_stop(Ifx_I2C *i2c)
Definition: IfxI2c.h:773
IfxI2c_getErrorInterruptSourceStatus
IFX_INLINE boolean IfxI2c_getErrorInterruptSourceStatus(Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source)
returns the status of the error interrupt source
Definition: IfxI2c.h:681
IfxI2c_ProtocolInterruptSource
IfxI2c_ProtocolInterruptSource
enable protocol interrupt source Definition in Ifx.I2C.PIRQSM.U
Definition: IfxI2c.h:139
IfxI2c_getIndex
IFX_EXTERN IfxI2c_Index IfxI2c_getIndex(Ifx_I2C *i2c)
API to get the resource index of the I2C specified.
Definition: IfxI2c.c:184
IfxI2c_getErrorSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxI2c_getErrorSrcPointer(Ifx_I2C *i2c)
Returns the SRC pointer for I2C Error interrupt.
Definition: IfxI2c.h:687
IfxScuCcu.h
SCU basic functionality.
IfxI2c_Mode_HighSpeed
Sets HighSpeed Mode.
Definition: IfxI2c.h:121
IfxI2c_Pins
Pin Structure.
Definition: IfxI2c.h:169
IfxI2c_Pins::sda
IfxI2c_Sda_InOut * sda
Definition: IfxI2c.h:172
IfxI2c_resetModule
IFX_EXTERN void IfxI2c_resetModule(Ifx_I2C *i2c)
resets the I2c kernel
Definition: IfxI2c.c:244
IfxI2c_DtrInterruptSource
IfxI2c_DtrInterruptSource
enables DTR interrupt flags Definition in Ifx.I2C.IMSC.U
Definition: IfxI2c.h:97
IfxI2c_ProtocolInterruptSource_transmissionEnd
transmission end service request
Definition: IfxI2c.h:146
IfxI2c_run
IFX_INLINE void IfxI2c_run(Ifx_I2C *i2c)
Definition: IfxI2c.h:731
IfxI2c_setBitAddressMode
IFX_INLINE void IfxI2c_setBitAddressMode(Ifx_I2C *i2c, IfxI2c_AddressMode mode)
Sets width of I2C address to 7 or 10 bits.
Definition: IfxI2c.h:737
IfxI2c_ProtocolInterruptSource_addressMatch
address match service request
Definition: IfxI2c.h:141
IfxI2c_PinSelect_a
Definition: IfxI2c.h:126
IfxI2c_getDtrSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxI2c_getDtrSrcPointer(Ifx_I2C *i2c)
Returns the SRC pointer for I2C DTR interrupt.
Definition: IfxI2c.h:656
IfxI2c_clearAllErrorInterruptSources
IFX_INLINE void IfxI2c_clearAllErrorInterruptSources(Ifx_I2C *i2c)
clears all Error Interrupt sources
Definition: IfxI2c.h:554
IfxI2c_setTransmitPacketSize
IFX_INLINE void IfxI2c_setTransmitPacketSize(Ifx_I2C *i2c, Ifx_SizeT size)
Sets the number of bytes to be tansmitted.
Definition: IfxI2c.h:767
IfxI2c_ProtocolInterruptSource_notAcknowledgeReceived
not acknowledge received service request
Definition: IfxI2c.h:145
IfxI2c_DtrInterruptSource_lastBurstRequest
last burst service request
Definition: IfxI2c.h:101
IfxI2c_enableErrorInterruptFlag
IFX_INLINE void IfxI2c_enableErrorInterruptFlag(Ifx_I2C *i2c)
enables the error interrupt flag
Definition: IfxI2c.h:626
IfxI2c_PinSelect_d
Definition: IfxI2c.h:129
IfxI2c_PinSelect_e
Definition: IfxI2c.h:130
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxI2c_BusStatus_idle
idle
Definition: IfxI2c.h:88
IfxI2c_setPinSelection
IFX_INLINE void IfxI2c_setPinSelection(Ifx_I2C *i2c, IfxI2c_PinSelect pisel)
selects the pin
Definition: IfxI2c.h:743
IfxI2c_AddressMode_10Bit
sets 10 bit address
Definition: IfxI2c.h:83
IfxI2c_DtrInterruptSource_lastSingleRequest
last single service request
Definition: IfxI2c.h:99
IfxI2c_ProtocolInterruptSource_masterCode
master code service request
Definition: IfxI2c.h:143
IfxI2c_clearDtrInterruptSource
IFX_INLINE void IfxI2c_clearDtrInterruptSource(Ifx_I2C *i2c, IfxI2c_DtrInterruptSource source)
clears the specified source of DTR interrupt
Definition: IfxI2c.h:566
IfxI2c_PinSelect_c
Definition: IfxI2c.h:128
IfxI2c_disableProtocolInterruptSource
IFX_INLINE void IfxI2c_disableProtocolInterruptSource(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
disables the specified source of protocol interrupt
Definition: IfxI2c.h:614


iLLD_TC38A: IfxI2c_I2c.c Source File

  • I2c
  • I2c
IfxI2c_I2c.c
Go to the documentation of this file.
1 /**
2 * \file IfxI2c_I2c.c
3 * \brief I2C I2C details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 *
41 */
42
43 /******************************************************************************/
44 /*----------------------------------Includes----------------------------------*/
45 /******************************************************************************/
46
47 #include "IfxI2c_I2c.h"
48
49 /******************************************************************************/
50 /*-------------------------Function Implementations---------------------------*/
51 /******************************************************************************/
52
53 float32 IfxI2c_I2c_getBaudrate(IfxI2c_I2c *i2c)
54 {
55 return IfxI2c_getBaudrate(i2c->i2c);
56 }
57
58
59 void IfxI2c_I2c_initConfig(IfxI2c_I2c_Config *config, Ifx_I2C *i2c)
60 {
61 config->i2c = i2c;
62 config->baudrate = 400000;
63 config->pins = NULL_PTR;
64 config->mode = IfxI2c_Mode_StandardAndFast;
65 }
66
67
68 void IfxI2c_I2c_initDevice(IfxI2c_I2c_Device *i2cDevice, const IfxI2c_I2c_deviceConfig *i2cDeviceConfig)
69 {
70 i2cDevice->i2c = i2cDeviceConfig->i2c;
71 i2cDevice->deviceAddress = i2cDeviceConfig->deviceAddress;
72 i2cDevice->addressMode = i2cDeviceConfig->addressMode;
73 i2cDevice->speedMode = i2cDeviceConfig->speedMode;
74 }
75
76
77 void IfxI2c_I2c_initDeviceConfig(IfxI2c_I2c_deviceConfig *i2cDeviceConfig, IfxI2c_I2c *i2c)
78 {
79 i2cDeviceConfig->i2c = i2c;
80 i2cDeviceConfig->deviceAddress = 0xff;
81 i2cDeviceConfig->addressMode = IfxI2c_AddressMode_7Bit;
82 i2cDeviceConfig->speedMode = IfxI2c_Mode_StandardAndFast;
83 }
84
85
86 void IfxI2c_I2c_initModule(IfxI2c_I2c *i2c, const IfxI2c_I2c_Config *config)
87 {
88 Ifx_I2C *i2cSFR = config->i2c;
89 i2c->i2c = i2cSFR;
90
91 IfxI2c_enableModule(i2cSFR);
92 IfxI2c_stop(i2cSFR); // enter config Mode
93 IfxI2c_configureAsMaster(i2cSFR);
94 IfxI2c_setBaudrate(i2cSFR, config->baudrate);
95
96 if (config->pins != NULL_PTR)
97 {
98 IfxI2c_initSclSdaPin(config->pins->scl, config->pins->sda, config->pins->padDriver);
99 }
100
101 IfxI2c_run(i2cSFR);
102
103 /* To Switch to HighSpeed Mode, first switch to Fast mode and send the MasterCode to switch to HighSpeed Mode*/
104 if (config->mode == IfxI2c_Mode_HighSpeed)
105 {
106 IfxI2c_configureHighSpeedMode(i2cSFR);
107 IfxI2c_run(i2cSFR);
108 }
109
110 i2c->baudrate = IfxI2c_getBaudrate(i2cSFR);
111 i2c->busStatus = IfxI2c_getBusStatus(i2cSFR);
112 i2c->status = IfxI2c_I2c_Status_ok;
113 }
114
115
116 IfxI2c_I2c_Status IfxI2c_I2c_read(IfxI2c_I2c_Device *i2cDevice, volatile uint8 *data, Ifx_SizeT size)
117 {
118 IfxI2c_I2c_Status status = IfxI2c_I2c_Status_ok;
119 Ifx_I2C *i2c = i2cDevice->i2c->i2c;
120 uint32 packet;
121 uint16 slAddr = i2cDevice->deviceAddress;
122 IfxI2c_AddressMode addressMode = i2cDevice->addressMode;
123
124 union data
125 {
126 uint32 packet;
127 uint8 packetbyte[4];
128 } rxdata;
129
130 rxdata.packet = 0;
131
132 sint32 bytesToReceive = size;
133 uint32 bytes;
134
135 // bus free?
136 if (IfxI2c_busIsFree(i2c) == FALSE)
137 {
138 status = IfxI2c_I2c_Status_busNotFree;
139 i2cDevice->i2c->busStatus = IfxI2c_getBusStatus(i2c);
140 i2cDevice->i2c->status = status;
141 return status;
142 }
143
144 IfxI2c_clearAllProtocolInterruptSources(i2c);
145 IfxI2c_clearAllErrorInterruptSources(i2c);
146
147 /* switch to highspeed mode if needed */
148 if (i2cDevice->speedMode == IfxI2c_Mode_HighSpeed)
149 {
150 IfxI2c_setTransmitPacketSize(i2c, 1);
151 IfxI2c_writeFifo(i2c, IFXI2C_HIGHSPEED_MASTER_CODE | 0x1); // Send the Master code to switch to high speed mode
152
153 // wait until packet is sent
154 while (IfxI2c_getProtocolInterruptSourceStatus(i2c, IfxI2c_ProtocolInterruptSource_transmissionEnd) == FALSE)
155 {}
156
157 // check status
158 if (IfxI2c_getProtocolInterruptSourceStatus(i2c, IfxI2c_ProtocolInterruptSource_notAcknowledgeReceived) == FALSE)
159 {
160 // the MASTER_CODE should not be responded, must be always shows a NAK
161 IfxI2c_clearAllProtocolInterruptSources(i2c);
162 status = IfxI2c_I2c_Status_error;
163 IfxI2c_releaseBus(i2c);
164 i2cDevice->i2c->busStatus = IfxI2c_getBusStatus(i2c);
165 i2cDevice->i2c->status = status;
166 return status;
167 }
168
169 IfxI2c_clearAllProtocolInterruptSources(i2c);
170 IfxI2c_clearAllDtrInterruptSources(i2c);
171 }
172
173 // send device address with RnW bit set
174 if (addressMode == IfxI2c_AddressMode_10Bit) /* for 10 bit slave address */
175 {
176 packet = ((0xF000) | ((slAddr & (0x3 << 8)) << 9) | (1 << 8) | (slAddr & 0xFF)); /* the first 3 parts of the RHS makes most significant 8 bits of the address and last(4th) part of RHS makes least significant 8 bits of the address*/
177 IfxI2c_setTransmitPacketSize(i2c, 2);
178 }
179 else /* for 7 bit slave address */
180 {
181 packet = slAddr | 1; // set read bit
182 IfxI2c_setTransmitPacketSize(i2c, 1);
183 }
184
185 IfxI2c_setReceivePacketSize(i2c, size); // set number of bytes to reveive
186 IfxI2c_writeFifo(i2c, packet);
187 IfxI2c_clearAllDtrInterruptSources(i2c);
188
189 /* Poll until aribtration lost, nack, or rx mode flag is reset, or the error is gone*/
190 while ((i2c->PIRQSS.U & ((1 << IFX_I2C_PIRQSS_AL_OFF) | (1 << IFX_I2C_PIRQSS_NACK_OFF) | (1 << IFX_I2C_PIRQSS_RX_OFF))) || i2c->ERRIRQSS.U)
191 {}
192
193 /* check status*/
194 if (i2c->ERRIRQSS.U)
195 {
196 IfxI2c_clearAllErrorInterruptSources(i2c);
197 status = IfxI2c_I2c_Status_error;
198 }
199
200 /*Check Arbitration Lost in Protocol Interrupts*/
201 else if (i2c->PIRQSS.U & (1 << IFX_I2C_PIRQSS_AL_OFF))
202 {
203 i2c->PIRQSC.U = (1 << IFX_I2C_PIRQSS_AL_OFF);
204 status = IfxI2c_I2c_Status_al;
205 }
206 /*Check NACK in Protocol Interrupts*/
207 else if (i2c->PIRQSS.U & (1 << IFX_I2C_PIRQSS_NACK_OFF))
208 {
209 i2c->PIRQSC.U = (1 << IFX_I2C_PIRQSS_NACK_OFF);
210 status = IfxI2c_I2c_Status_nak;
211 }
212
213 else if (size > 0) // required to poll for nak
214
215 {
216 if (size > 32) // if fifo is too small => disable global interrupts!
217 { // assumes TC is faster than i2c and therefor a fifo overflow is not possible
218 boolean intEnabled = IfxCpu_disableInterrupts(); // disable global interrupts to prevent fifo overflow
219 uint32 i;
220
221 for (i = 0; i < (uint32)size; i += 4)
222 {
223 if (bytesToReceive >= 4)
224 {
225 bytes = 4;
226 bytesToReceive -= 4;
227 }
228 else
229 {
230 bytes = bytesToReceive;
231 bytesToReceive = 0;
232 }
233
234 uint32 ris;
235
236 while (!(ris = i2c->RIS.U)) // wait for fifo request or error
237
238 {}
239
240 // check request flags
241 if (ris & ((1 << IFX_I2C_RIS_LSREQ_INT_OFF) | (1 << IFX_I2C_RIS_SREQ_INT_OFF) | (1 << IFX_I2C_RIS_LBREQ_INT_OFF) | (1 << IFX_I2C_RIS_BREQ_INT_OFF)))
242 {
243 rxdata.packet = i2c->RXD.U;
244 uint32 k;
245
246 for (k = 0; k < bytes; k++)
247 {
248 data[i + k] = rxdata.packetbyte[k];
249 }
250
251 IfxI2c_clearAllDtrInterruptSources(i2c);
252 }
253
254 /* check errors. Must have enabled corresponding bits in Mask registers*/
255 if (ris & (1 << IFX_I2C_RIS_I2C_ERR_INT_OFF)) // error flags
256 {
257 IfxI2c_clearAllErrorInterruptSources(i2c);
258 status = IfxI2c_I2c_Status_error;
259 break;
260 }
261
262 /* check protocol interrupts. Must have enabled corresponding bits in Mask registers*/
263 if (ris & (1 << IFX_I2C_RIS_I2C_P_INT_OFF)) // check protocol flags
264 {
265 /*Check Arbitration Lost*/
266 if (i2c->PIRQSS.U & (1 << IFX_I2C_PIRQSS_AL_OFF))
267 {
268 i2c->PIRQSC.U = (1 << IFX_I2C_PIRQSS_AL_OFF);
269 status = IfxI2c_I2c_Status_al;
270 break;
271 }
272
273 /*Check NACK*/
274 else if (i2c->PIRQSS.U & (1 << IFX_I2C_PIRQSS_NACK_OFF))
275 {
276 i2c->PIRQSC.U = (1 << IFX_I2C_PIRQSS_NACK_OFF);
277 status = IfxI2c_I2c_Status_nak;
278 break;
279 }
280
281 /*Check TX_END*/
282 if (i2c->PIRQSS.U & (1 << IFX_I2C_PIRQSS_TX_END_OFF))
283 {
284 /*Should not be cleared here, otherwise it will cause infinite while loop*/
285 status = IfxI2c_I2c_Status_ok; //Default value of status. Still kept for readability*/
286 }
287
288 /*Check and clear Address Match, General Call, Master Code and Receive Mode*/
289 if (i2c->PIRQSS.U & ((1 << IFX_I2C_PIRQSS_AM_OFF) | (1 << IFX_I2C_PIRQSS_GC_OFF) | (1 << IFX_I2C_PIRQSS_MC_OFF) | (1 << IFX_I2C_PIRQSS_RX_OFF)))
290 {
291 /*Just clearing the bits. Status need not be updated*/
292 i2c->PIRQSC.U = ((1 << IFX_I2C_PIRQSS_AM_OFF) | (1 << IFX_I2C_PIRQSS_GC_OFF) | (1 << IFX_I2C_PIRQSS_MC_OFF) | (1 << IFX_I2C_PIRQSS_RX_OFF));
293 }
294 }
295 }
296
297 IfxCpu_restoreInterrupts(intEnabled); // (re-) enable global interrupts
298
299 // TX_END: transmission finished
300 while (IfxI2c_getProtocolInterruptSourceStatus(i2c, IfxI2c_ProtocolInterruptSource_transmissionEnd) == FALSE)
301 {}
302
303 IfxI2c_clearProtocolInterruptSource(i2c, IfxI2c_ProtocolInterruptSource_transmissionEnd);
304 }
305 else
306 {
307 // wait until all bytes are received
308 while (IfxI2c_getProtocolInterruptSourceStatus(i2c, IfxI2c_ProtocolInterruptSource_transmissionEnd) == FALSE)
309 {}
310
311 IfxI2c_clearProtocolInterruptSource(i2c, IfxI2c_ProtocolInterruptSource_transmissionEnd);
312
313 // check errors
314 uint32 ris;
315 ris = i2c->RIS.U;
316
317 if (ris & (1 << IFX_I2C_RIS_I2C_ERR_INT_OFF)) // error flags
318 {
319 IfxI2c_clearAllErrorInterruptSources(i2c);
320 status = IfxI2c_I2c_Status_error;
321 }
322
323 else if (ris & (1 << IFX_I2C_RIS_I2C_P_INT_OFF)) // check protocol flags
324 {
325 if (i2c->PIRQSS.U & (1 << IFX_I2C_PIRQSS_AL_OFF))
326 {
327 i2c->PIRQSC.U = (1 << IFX_I2C_PIRQSS_AL_OFF);
328 status = IfxI2c_I2c_Status_al;
329 }
330
331 else if (i2c->PIRQSS.U & (1 << IFX_I2C_PIRQSS_NACK_OFF))
332 {
333 i2c->PIRQSC.U = (1 << IFX_I2C_PIRQSS_NACK_OFF);
334 status = IfxI2c_I2c_Status_nak;
335 }
336
337 /*Clear remaining flags*/
338 /* Check and clear Address Match, General Call, Master Code, Transmission End and Receive Mode*/
339 if (i2c->PIRQSS.U & ((1 << IFX_I2C_PIRQSS_AM_OFF) | (1 << IFX_I2C_PIRQSS_GC_OFF) | (1 << IFX_I2C_PIRQSS_MC_OFF) | (1 << IFX_I2C_PIRQSS_TX_END_OFF) | (1 << IFX_I2C_PIRQSS_RX_OFF)))
340 {
341 /*Just clearing the bits. Status need not be updated*/
342 i2c->PIRQSC.U = ((1 << IFX_I2C_PIRQSS_AM_OFF) | (1 << IFX_I2C_PIRQSS_GC_OFF) | (1 << IFX_I2C_PIRQSS_MC_OFF) | (1 << IFX_I2C_PIRQSS_TX_END_OFF) | (1 << IFX_I2C_PIRQSS_RX_OFF));
343 }
344 }
345
346 if ((status != IfxI2c_I2c_Status_error) && (status != IfxI2c_I2c_Status_al) && (status != IfxI2c_I2c_Status_nak))
347 {
348 // read fifo
349 uint32 i;
350
351 for (i = 0; i < (uint32)size; i += 4)
352 {
353 if (bytesToReceive >= 4)
354 {
355 bytes = 4;
356 bytesToReceive -= 4;
357 }
358 else
359 {
360 bytes = bytesToReceive;
361 bytesToReceive = 0;
362 }
363
364 uint32 k;
365 rxdata.packet = i2c->RXD.U;
366 IfxI2c_clearAllDtrInterruptSources(i2c);
367
368 for (k = 0; k < bytes; k++)
369 {
370 data[i + k] = rxdata.packetbyte[k];
371 }
372 }
373 }
374 }
375 }
376
377 IfxI2c_clearAllErrorInterruptSources(i2c);
378 IfxI2c_clearAllProtocolInterruptSources(i2c);
379
380 IfxI2c_releaseBus(i2c);
381 i2cDevice->i2c->busStatus = IfxI2c_getBusStatus(i2c);
382 i2cDevice->i2c->status = status;
383 return status;
384 }
385
386
387 IfxI2c_I2c_Status IfxI2c_I2c_write(IfxI2c_I2c_Device *i2cDevice, volatile uint8 *data, Ifx_SizeT size)
388 {
389 IfxI2c_I2c_Status status = IfxI2c_I2c_Status_ok;
390 Ifx_I2C *i2c = i2cDevice->i2c->i2c;
391 uint16 addr = i2cDevice->deviceAddress;
392 uint16 slAddr;
393 IfxI2c_AddressMode addressMode = i2cDevice->addressMode;
394 union data
395 {
396 uint32 packet;
397 uint8 packetbyte[4];
398 } txdata;
399
400 sint32 bytesToSend = size + 1; // +1 slave device address
401 uint32 bytes;
402
403 if (IfxI2c_busIsFree(i2c) == FALSE)
404 {
405 status = IfxI2c_I2c_Status_busNotFree;
406 i2cDevice->i2c->busStatus = IfxI2c_getBusStatus(i2c);
407 i2cDevice->i2c->status = status;
408 return status;
409 }
410
411 // build one packet containing the slave address
412
413 IfxI2c_clearAllProtocolInterruptSources(i2c);
414 IfxI2c_clearAllErrorInterruptSources(i2c);
415
416 /* switch to highspeed mode if needed */
417 if (i2cDevice->speedMode == IfxI2c_Mode_HighSpeed)
418 {
419 IfxI2c_setTransmitPacketSize(i2c, 1);
420 IfxI2c_writeFifo(i2c, IFXI2C_HIGHSPEED_MASTER_CODE); // Send the Master code to switch to high speed mode
421
422 // wait until packet is sent
423 while (IfxI2c_getProtocolInterruptSourceStatus(i2c, IfxI2c_ProtocolInterruptSource_transmissionEnd) == FALSE)
424 {}
425
426 // check status
427 if (IfxI2c_getProtocolInterruptSourceStatus(i2c, IfxI2c_ProtocolInterruptSource_notAcknowledgeReceived) == FALSE)
428 {
429 // the MASTER_CODE should not be responded, must be always shows a NAK
430 IfxI2c_clearAllProtocolInterruptSources(i2c);
431 status = IfxI2c_I2c_Status_error;
432 IfxI2c_releaseBus(i2c);
433 i2cDevice->i2c->busStatus = IfxI2c_getBusStatus(i2c);
434 i2cDevice->i2c->status = status;
435 return status;
436 }
437
438 IfxI2c_clearAllProtocolInterruptSources(i2c);
439 IfxI2c_clearAllDtrInterruptSources(i2c);
440 }
441
442 // try to seize control, if not return
443 if (addressMode == IfxI2c_AddressMode_10Bit) /* for 10 bit slave address */
444 {
445 slAddr = (uint16)((0xF000) | ((addr & (0x3 << 8)) << 9) | (~(1 << 8)) | (addr & 0xFF)); /* the first 3 parts of the RHS makes
446 * most significant 8 bits of the address and last(4th) part of RHS
447 * makes least significant 8 bits of the address*/
448 }
449 else /* for 7 bit slave address */
450 {
451 slAddr = (uint16)(addr & 0xfe);
452 }
453
454 if (size > 0) // write i2c device
455
456 {
457 uint32 i, j = 0;
458
459 // assumes TC is faster then i2c and therefor a fifo underflow is not possible
460 boolean intEnabled = IfxCpu_disableInterrupts(); // disable global interrupts to prevent FIFO underflow
461 IfxI2c_setTransmitPacketSize(i2c, size + 1);
462
463 for (i = 0; i < (uint32)(size + 1); i += 4)
464 {
465 if (bytesToSend >= 4)
466 {
467 bytes = 4;
468 bytesToSend -= 4;
469 }
470 else
471 {
472 bytes = bytesToSend;
473 bytesToSend = 0;
474 }
475
476 txdata.packet = 0;
477
478 for (j = 0; j < bytes; j++)
479 {
480 if (addressMode == IfxI2c_AddressMode_10Bit)
481 {
482 if ((i == 0) && (j < 2))
483 {
484 if (j == 0)
485 {
486 txdata.packetbyte[j] = (uint8)((slAddr & 0xff00) >> 8);
487 }
488 else
489 {
490 txdata.packetbyte[j] = (uint8)(slAddr & 0x00ff);
491 }
492 }
493 else
494 {
495 txdata.packetbyte[j] = (uint8)data[i + j - 1];
496 }
497 }
498
499 else
500 {
501 if ((i == 0) && (j == 0))
502 {
503 txdata.packetbyte[j] = (uint8)slAddr;
504 }
505
506 else
507 {
508 txdata.packetbyte[j] = (uint8)data[i + j - 1];
509 }
510 }
511 }
512
513 do
514 {
515 // check errors
516 uint32 ris;
517 ris = i2c->RIS.U;
518
519 if (ris & (1 << IFX_I2C_RIS_I2C_P_INT_OFF)) // check protocol flags
520 {
521 IfxI2c_clearAllProtocolInterruptSources(i2c);
522 status = IfxI2c_I2c_Status_error;
523 }
524
525 if (ris & (1 << IFX_I2C_RIS_I2C_ERR_INT_OFF)) // error flags
526 {
527 IfxI2c_clearAllErrorInterruptSources(i2c);
528 status = IfxI2c_I2c_Status_error;
529 }
530 } while (i2c->FFSSTAT.B.FFS == 8 && status != IfxI2c_I2c_Status_error); // wait to prevent FIFO overflow
531
532 if (status == IfxI2c_I2c_Status_error)
533 {
534 break;
535 }
536
537 IfxI2c_writeFifo(i2c, txdata.packet);
538 IfxI2c_clearAllDtrInterruptSources(i2c);
539 }
540
541 IfxCpu_restoreInterrupts(intEnabled); // (re-) enable global interrupts
542
543 // wait until all bytes are sent
544 while (IfxI2c_getProtocolInterruptSourceStatus(i2c, IfxI2c_ProtocolInterruptSource_transmissionEnd) == FALSE)
545 {}
546
547 IfxI2c_clearProtocolInterruptSource(i2c, IfxI2c_ProtocolInterruptSource_transmissionEnd);
548
549 // finally check errors
550 uint32 ris;
551 ris = i2c->RIS.U;
552
553 if (ris & (1 << IFX_I2C_RIS_I2C_P_INT_OFF)) // check protocol flags
554 {
555 IfxI2c_clearAllProtocolInterruptSources(i2c);
556 status = IfxI2c_I2c_Status_error;
557 }
558
559 if (ris & (1 << IFX_I2C_RIS_I2C_ERR_INT_OFF)) // error flags
560 {
561 IfxI2c_clearAllErrorInterruptSources(i2c);
562 status = IfxI2c_I2c_Status_error;
563 }
564 }
565
566 IfxI2c_releaseBus(i2c);
567 i2cDevice->i2c->busStatus = IfxI2c_getBusStatus(i2c);
568 i2cDevice->i2c->status = status;
569 return status;
570 }
IfxI2c_Pins::padDriver
IfxPort_PadDriver padDriver
Definition: IfxI2c.h:173
IfxI2c_I2c_getBaudrate
float32 IfxI2c_I2c_getBaudrate(IfxI2c_I2c *i2c)
returns the baudrate of SCL
Definition: IfxI2c_I2c.c:53
IfxI2c_writeFifo
IFX_INLINE void IfxI2c_writeFifo(Ifx_I2C *i2c, uint32 packet)
Writes a packet (4 bytes) into the Fifo.
Definition: IfxI2c.h:786
IfxI2c_releaseBus
void IfxI2c_releaseBus(Ifx_I2C *i2c)
Releases the bus, i.e puts a stop condition on the bus.
Definition: IfxI2c.c:215
IfxI2c_setReceivePacketSize
IFX_INLINE void IfxI2c_setReceivePacketSize(Ifx_I2C *i2c, Ifx_SizeT size)
Sets the number of bytes to be received.
Definition: IfxI2c.h:749
IfxI2c_busIsFree
IFX_INLINE boolean IfxI2c_busIsFree(Ifx_I2C *i2c)
Returns if the bus is free.
Definition: IfxI2c.h:535
IfxI2c_getBusStatus
IFX_INLINE IfxI2c_BusStatus IfxI2c_getBusStatus(Ifx_I2C *i2c)
Definition: IfxI2c.h:650
IfxI2c_AddressMode
IfxI2c_AddressMode
Selects width of address bits (7 or 10 bits) Definition in Ifx_I2C.ADDRCFG.B.TBAM.
Definition: IfxI2c.h:80
IfxI2c_setBaudrate
void IfxI2c_setBaudrate(Ifx_I2C *i2c, float32 baudrate)
Calculates the desired baudrate.
Definition: IfxI2c.c:263
uint32
unsigned long uint32
Definition: Platform_Types.h:116
float32
float float32
Definition: Platform_Types.h:170
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
IfxI2c_getBaudrate
float32 IfxI2c_getBaudrate(Ifx_I2C *i2c)
Returns the real Baudrate.
Definition: IfxI2c.c:160
IfxI2c_Pins::scl
IfxI2c_Scl_InOut * scl
Definition: IfxI2c.h:171
IfxI2c_I2c_Config::baudrate
float32 baudrate
Baudrate.
Definition: IfxI2c_I2c.h:301
IfxI2c_I2c_Config
Structure to configure the Module.
Definition: IfxI2c_I2c.h:298
IfxCpu_restoreInterrupts
IFX_INLINE void IfxCpu_restoreInterrupts(boolean enabled)
API to restore global interrupt with that of the passed parameter.
Definition: IfxCpu.h:1026
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxI2c_configureHighSpeedMode
void IfxI2c_configureHighSpeedMode(Ifx_I2C *i2c)
Configure the i2c master to high speed mode baudrate > 400kbits/s.
Definition: IfxI2c.c:316
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxI2c_I2c_read
IfxI2c_I2c_Status IfxI2c_I2c_read(IfxI2c_I2c_Device *i2cDevice, volatile uint8 *data, Ifx_SizeT size)
reads the I2c device
Definition: IfxI2c_I2c.c:116
IfxI2c_I2c_Status
IfxI2c_I2c_Status
Definition: IfxI2c_I2c.h:269
IfxI2c_I2c_Status_busNotFree
bus is not free
Definition: IfxI2c_I2c.h:274
IfxI2c_Mode_StandardAndFast
Sets Standard and Fast speed mode.
Definition: IfxI2c.h:120
IfxI2c_I2c_deviceConfig
Structure to configure the device&#39;s data structure.
Definition: IfxI2c_I2c.h:318
IfxCpu_disableInterrupts
IFX_INLINE boolean IfxCpu_disableInterrupts(void)
API to disable global interrupt and return the previous status.
Definition: IfxCpu.h:749
IfxI2c_configureAsMaster
void IfxI2c_configureAsMaster(Ifx_I2C *i2c)
Configures the Module as Master.
Definition: IfxI2c.c:52
IfxI2c_I2c_initModule
void IfxI2c_I2c_initModule(IfxI2c_I2c *i2c, const IfxI2c_I2c_Config *config)
Initializes the Module.
Definition: IfxI2c_I2c.c:86
IfxI2c_I2c_Device::i2c
IfxI2c_I2c * i2c
Module Pionter.
Definition: IfxI2c_I2c.h:310
IfxI2c_AddressMode_7Bit
sets 7 bit address
Definition: IfxI2c.h:82
IfxI2c_I2c_Device::deviceAddress
uint16 deviceAddress
the slave device&#39;s address
Definition: IfxI2c_I2c.h:311
IfxI2c_I2c::i2c
Ifx_I2C * i2c
Module Pointer.
Definition: IfxI2c_I2c.h:290
IfxI2c_I2c_Status_nak
NAK.
Definition: IfxI2c_I2c.h:272
IfxI2c_enableModule
void IfxI2c_enableModule(Ifx_I2C *i2c)
Enables the I2c Module.
Definition: IfxI2c.c:105
IfxI2c_I2c_write
IfxI2c_I2c_Status IfxI2c_I2c_write(IfxI2c_I2c_Device *i2cDevice, volatile uint8 *data, Ifx_SizeT size)
writes to the I2c device
Definition: IfxI2c_I2c.c:387
IFXI2C_HIGHSPEED_MASTER_CODE
#define IFXI2C_HIGHSPEED_MASTER_CODE
Master code for high speed mode.
Definition: IfxI2c.h:69
IfxI2c_I2c::busStatus
IfxI2c_BusStatus busStatus
Status of the bus.
Definition: IfxI2c_I2c.h:291
IfxI2c_clearProtocolInterruptSource
IFX_INLINE void IfxI2c_clearProtocolInterruptSource(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
clears the specified source of protocol interrupt
Definition: IfxI2c.h:578
IfxI2c_clearAllProtocolInterruptSources
IFX_INLINE void IfxI2c_clearAllProtocolInterruptSources(Ifx_I2C *i2c)
Clears all Protocol Interrupt sources.
Definition: IfxI2c.h:560
IfxI2c_I2c_Device::speedMode
IfxI2c_Mode speedMode
slave device in Standard/Fast or High Speed mode.
Definition: IfxI2c_I2c.h:313
IfxI2c_I2c_Config::pins
IFX_CONST IfxI2c_Pins * pins
Pins.
Definition: IfxI2c_I2c.h:302
IfxI2c_initSclSdaPin
void IfxI2c_initSclSdaPin(const IfxI2c_Scl_InOut *scl, const IfxI2c_Sda_InOut *sda, IfxPort_PadDriver padDriver)
Definition: IfxI2c.c:204
IfxI2c_clearAllDtrInterruptSources
IFX_INLINE void IfxI2c_clearAllDtrInterruptSources(Ifx_I2C *i2c)
clears all DTR interrupt sources
Definition: IfxI2c.h:548
IfxI2c_I2c_Status_error
error
Definition: IfxI2c_I2c.h:275
IfxI2c_getProtocolInterruptSourceStatus
IFX_INLINE boolean IfxI2c_getProtocolInterruptSourceStatus(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
returns the status of specified protocol interrupt source
Definition: IfxI2c.h:706
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxI2c_stop
IFX_INLINE void IfxI2c_stop(Ifx_I2C *i2c)
Definition: IfxI2c.h:773
IfxI2c_I2c_Device
Structure with slave device data.
Definition: IfxI2c_I2c.h:308
IfxI2c_Mode_HighSpeed
Sets HighSpeed Mode.
Definition: IfxI2c.h:121
sint32
long sint32
Definition: Platform_Types.h:134
IfxI2c_Pins::sda
IfxI2c_Sda_InOut * sda
Definition: IfxI2c.h:172
IfxI2c_I2c.h
I2C I2C details.
IfxI2c_I2c_Device::addressMode
IfxI2c_AddressMode addressMode
slave device&#39;s address (7 or 10 bits)
Definition: IfxI2c_I2c.h:312
IfxI2c_I2c_initConfig
void IfxI2c_I2c_initConfig(IfxI2c_I2c_Config *config, Ifx_I2C *i2c)
Fills the config structure with default values.
Definition: IfxI2c_I2c.c:59
IfxI2c_I2c_Status_al
Arbitration Lost.
Definition: IfxI2c_I2c.h:273
IfxI2c_I2c_initDeviceConfig
void IfxI2c_I2c_initDeviceConfig(IfxI2c_I2c_deviceConfig *i2cDeviceConfig, IfxI2c_I2c *i2c)
Fills the config structure of the slave device with default values.
Definition: IfxI2c_I2c.c:77
IfxI2c_I2c
Handler.
Definition: IfxI2c_I2c.h:288
IfxI2c_ProtocolInterruptSource_transmissionEnd
transmission end service request
Definition: IfxI2c.h:146
IfxI2c_run
IFX_INLINE void IfxI2c_run(Ifx_I2C *i2c)
Definition: IfxI2c.h:731
IfxI2c_I2c_initDevice
void IfxI2c_I2c_initDevice(IfxI2c_I2c_Device *i2cDevice, const IfxI2c_I2c_deviceConfig *i2cDeviceConfig)
Initializes the device Handler.
Definition: IfxI2c_I2c.c:68
IfxI2c_I2c::status
IfxI2c_I2c_Status status
Status of the last bus operation.
Definition: IfxI2c_I2c.h:292
IfxI2c_clearAllErrorInterruptSources
IFX_INLINE void IfxI2c_clearAllErrorInterruptSources(Ifx_I2C *i2c)
clears all Error Interrupt sources
Definition: IfxI2c.h:554
IfxI2c_setTransmitPacketSize
IFX_INLINE void IfxI2c_setTransmitPacketSize(Ifx_I2C *i2c, Ifx_SizeT size)
Sets the number of bytes to be tansmitted.
Definition: IfxI2c.h:767
IfxI2c_ProtocolInterruptSource_notAcknowledgeReceived
not acknowledge received service request
Definition: IfxI2c.h:145
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxI2c_AddressMode_10Bit
sets 10 bit address
Definition: IfxI2c.h:83
IfxI2c_I2c_Status_ok
ok
Definition: IfxI2c_I2c.h:271
IfxI2c_I2c_Config::mode
IfxI2c_Mode mode
Speed Mode.
Definition: IfxI2c_I2c.h:303


iLLD_TC38A: IfxI2c_I2c.h Source File

  • I2c
  • I2c
IfxI2c_I2c.h
Go to the documentation of this file.
1 /**
2 * \file IfxI2c_I2c.h
3 * \brief I2C I2C details
4 * \ingroup IfxLld_I2c
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_I2c_I2c_Usage How to use the I2c driver?
42 * \ingroup IfxLld_I2c
43 *
44 * The I2c driver provides a default configuration for 8bit wide data transfers in Master mode.
45 *
46 * NOTE: Interrupts are disabled during data transfers as long as the driver operates on the I2C hardware FIFO,
47 * except for reading 32 bytes or less. This is due to limitations of the I2c Module.
48 *
49 * NOTE : Send Slave address as 8-bit by left shifting it by 1.E.g incase of EEPROM,slave address is 7 bit represented
50 * as 0x50, after left shifting it by 1, it will be 0xa0
51 *
52 * In the following sections it will be described, how to integrate the driver into the application framework.
53 *
54 * \section IfxLld_I2c_I2c Preparation Preparation
55 * \subsection IfxLld_I2c_I2c_Include Include Files
56 *
57 * Include following header file into your C code:
58 * \code
59 * #include <I2c/I2c/IfxI2c_I2c.h>
60 * \endcode
61 *
62 * \subsection IfxLld_I2c_I2c_Variables Variables
63 *
64 * Declare the I2c handle, the I2c device handle and the data buffer in your C code:
65 *
66 * \code
67 * // used globally
68 * static IfxI2c_I2c i2c; // i2c handle
69 * static IfxI2c_I2c_Device i2cDev; // slave device handle
70 * uint8 data[128]; // data buffer
71 * \endcode
72 *
73 * \subsection IfxLld_I2c_I2c_Init Module Initialisation
74 *
75 * \code
76 * // create config structure
77 * IfxI2c_I2c_Config config;
78 *
79 * // fill structure with default values and Module address
80 * IfxI2c_I2c_initConfig(&config, &MODULE_I2C0);
81 *
82 * // configure pins
83 * const IfxI2c_Pins pins = {
84 * &IfxI2c0_SCL_P02_5_INOUT,
85 * &IfxI2c0_SDA_P02_4_INOUT,
86 * IfxPort_PadDriver_cmosAutomotiveSpeed1
87 * };
88 *
89 * config.pins = &pins;
90 *
91 * // For HighSpeed Mode configure the baudrate greater than 400KHz and set config.mode = IfxI2c_Mode_HighSpeed;
92 * config.mode = IfxI2c_Mode_StandardAndFast;
93 * config.baudrate = 400000; // 400 kHz
94 *
95 * // initialize module
96 * IfxI2c_I2c_initModule(&i2c, &config);
97 * \endcode
98 *
99 * \subsection IfxLld_I2c_I2c_InitDevice Device Initialisation
100 * Here the i2c device handle is initialized.
101 * \code
102 * // create device config
103 * IfxI2c_I2c_deviceConfig i2cDeviceConfig;
104 *
105 * // fill structure with default values and i2c Handler
106 * IfxI2c_I2c_initDeviceConfig(&i2cDeviceConfig, &i2c);
107 *
108 * // set device specifig values.
109 * i2cDeviceConfig.deviceAddress = 0xa0; // 8 bit device address
110 *
111 * // initialize the i2c device handle
112 * IfxI2c_I2c_initDevice(&i2cDev, &i2cDeviceConfig);
113 * \endcode
114 *
115 * \section IfxLld_I2c_I2c_DataTransfers Data Transfers
116 * Example for an i2c EEPROM.
117 *
118 * \subsection IfxLld_I2c_I2c_Write Write
119 *
120 * \code
121 * uint16 addr = 0x0000;
122 *
123 * // setup the device's internal address
124 * data[0] = addr >> 8; // High byte
125 * data[1] = (uint8)addr; // Low byte
126 * // setup data to be written
127 * data[2] = 0x01;
128 * data[3] = 0x02;
129 * data[4] = 0x03;
130 *
131 * uint8 size = 5; // 5 bytes to transmit to i2cDev (data and internal address)
132 *
133 * // write data to device as soon as it is ready
134 * while(IfxI2c_I2c_write(&i2cDev, data, size) == IfxI2c_I2c_Status_nak);
135 * \endcode
136 *
137 * \subsection IfxLld_I2c_I2c_Read Read
138 *
139 * \code
140 * Ifx_SizeT size;
141 * uint16 addr = 0x0000;
142 *
143 * // setup internal address to be read from
144 * data[0] = addr >> 8; // High byte
145 * data[1] = (uint8)addr; // Low byte
146 * size = 2;
147 * while(IfxI2c_I2c_write(&i2cDev, data, size) == IfxI2c_I2c_Status_nak);
148 *
149 * size = 8; // 8 bytes to read
150 *
151 * // read device data to data array
152 * while(IfxI2c_I2c_read(&i2cDev, data, size) == IfxI2c_I2c_Status_nak);
153 * \endcode
154 *
155 * \subsection IfxLld_I2c_I2c_ACK Acknowledge Polling
156 * It is also possible to poll explicitly for NAK.
157 *
158 * By using write operations:
159 * \code
160 * // size = 0;
161 * while(IfxI2c_I2c_write(&i2cDev, data, 0) == IfxI2c_I2c_Status_nak)); // where data is just a dummy pointer
162 * \endcode
163 *
164 * By using read operations:
165 * \code
166 * // size = 0;
167 * while(IfxI2c_I2c_read(&i2cDev, data, 0) == IfxI2c_I2c_Status_nak)); // where data is just a dummy pointer
168 * \endcode
169 *
170 * \subsection IfxLld_I2c_I2c_Interrupts Interrupts usage
171 *
172 * Interrupts can be enabled from the application by using the APIs provided in the driver,
173 * there are APIs available in the driver to enable, disable, clear and read the status of interrupt falgs, along with these,\n
174 * APIs to enable the the interrupts are also available.
175 *
176 * here is an example of how to use the interrupts in I2C driver.
177 *
178 * Using I2C interrupts
179 *
180 *
181 * I2C DTR interrupt (DTR)
182 *
183 * After initilaising I2C device \ref IfxLld_I2c_I2c_InitDevice
184 *
185 * choose the DTR interrupt sources needed to be enabled for I2C module and call the following functions once for each DTR interrupt source by choosing the right \n
186 * DTR interrupt source as parameter,and after choosing all the DTR interrupt sources, enable I2C DTR service request or interrupt with desired type of service and priority
187 *
188 * \code
189 * //enable DTR interrupt sources
190 * Ifx_I2C *i2c = &MODULE_I2C0; // or choose &MODULE_I2C1
191 * IfxI2c_enableDTRInterruptSource(i2c, IfxI2c_DtrInterruptSource_lastSingleRequest);
192 * IfxI2c_enableDTRInterruptSource(i2c, IfxI2c_DtrInterruptSource_lastBurstRequest);
193 *
194 * // enable the DTR interrupt
195 * IfxI2c_enableDTRInterrupt(i2c, IfxSrc_Tos_cpu0, 8);
196 * \endcode
197 * I2C error interrupt (ERR)
198 *
199 * After initilaising I2C device \ref IfxLld_I2c_I2c_InitDevice
200 *
201 * choose the error interrupt sources needed to be enabled for I2C module and call the following functions once for each error interrupt source by choosing the right \n
202 * error interrupt source as parameter,and after choosing all the error interrupt sources, enable the I2C error interrupt flag and then enable I2C error service request or interrupt with desired type of service and priority
203 *
204 * \code
205 * //enable error interrupt sources
206 * Ifx_I2C *i2c = &MODULE_I2C0; // or choose &MODULE_I2C1
207 * IfxI2c_enableErrorInterruptSource(i2c, IfxI2c_ErrorInterruptSource_rxFifoUnderflow);
208 * IfxI2c_enableErrorInterruptSource(i2c, IfxI2c_ErrorInterruptSource_txFifoOverflow);
209 *
210 * // enable the error interrupt flag
211 * IfxI2c_enableErrorInterruptFlag(Ifx_I2C *i2c);
212 *
213 * // enable the error interrupt
214 * IfxI2c_enableErrorInterrupt(i2c, IfxSrc_Tos_cpu0, 8);
215 * \endcode
216 *
217 *
218 * I2C protocol interrupt (PROTOCOL)
219 *
220 * After initilaising I2C device \ref IfxLld_I2c_I2c_InitDevice
221 *
222 * choose the protocol interrupt sources needed to be enabled for I2C module and call the following functions once for each protocol interrupt source by choosing the \n
223 * right protocol interrupt source as parameter,and after choosing all the protocol interrupt sources, enable the I2C protocol interrupt flag and then enable \n
224 * I2C protocol service request or interrupt with desired type of service and priority
225 *
226 * \code
227 * //enable protocol interrupt sources
228 * Ifx_I2C *i2c = &MODULE_I2C0; // or choose &MODULE_I2C1
229 * IfxI2c_enableProtocolInterruptSource(i2c, IfxI2c_ProtocolInterruptSource_addressMatch);
230 * IfxI2c_enableProtocolInterruptSource(i2c, IfxI2c_ProtocolInterruptSource_arbitrationLost);
231 *
232 * // enable the protocol interrupt flag
233 * IfxI2c_enableProtocolInterruptFlag(Ifx_I2C *i2c);
234 *
235 * // enable the protocol interrupt
236 * IfxI2c_enableProtocolInterrupt(i2c, IfxSrc_Tos_cpu0, 8);
237 * \endcode
238 *
239 * you can define the ISR of your own and service the interrupt, please refer to more general usage of interrupts \ref IfxLld_Cpu_Irq_Usage
240 *
241 * some additional APIs to clear, disable interrupt flags and get flag status are also available.
242 *
243 * \defgroup IfxLld_I2c_I2c I2C
244 * \ingroup IfxLld_I2c
245 * \defgroup IfxLld_I2c_I2c_Functions Module Functions
246 * \ingroup IfxLld_I2c_I2c
247 * \defgroup IfxLld_I2c_I2c_Enum Enumerations
248 * \ingroup IfxLld_I2c_I2c
249 * \defgroup IfxLld_I2c_I2c_DataStructures Data Structures
250 * \ingroup IfxLld_I2c_I2c
251 */
252
253 #ifndef IFXI2C_I2C_H
254 #define IFXI2C_I2C_H 1
255
256 /******************************************************************************/
257 /*----------------------------------Includes----------------------------------*/
258 /******************************************************************************/
259
260 #include "I2c/Std/IfxI2c.h"
261 #include "Cpu/Std/IfxCpu.h"
262
263 /******************************************************************************/
264 /*--------------------------------Enumerations--------------------------------*/
265 /******************************************************************************/
266
267 /** \addtogroup IfxLld_I2c_I2c_Enum
268 * \{ */
269 typedef enum
270 {
271 IfxI2c_I2c_Status_ok = 0, /**< \brief ok */
272 IfxI2c_I2c_Status_nak = 1, /**< \brief NAK */
273 IfxI2c_I2c_Status_al = 2, /**< \brief Arbitration Lost */
274 IfxI2c_I2c_Status_busNotFree = 3, /**< \brief bus is not free */
275 IfxI2c_I2c_Status_error = 4 /**< \brief error */
276 } IfxI2c_I2c_Status;
277
278 /** \} */
279
280 /******************************************************************************/
281 /*-----------------------------Data Structures--------------------------------*/
282 /******************************************************************************/
283
284 /** \addtogroup IfxLld_I2c_I2c_DataStructures
285 * \{ */
286 /** \brief Handler
287 */
288 typedef struct
289 {
290 Ifx_I2C *i2c; /**< \brief Module Pointer */
291 IfxI2c_BusStatus busStatus; /**< \brief Status of the bus */
292 IfxI2c_I2c_Status status; /**< \brief Status of the last bus operation */
293 float32 baudrate; /**< \brief Baudrate */
294 } IfxI2c_I2c;
295
296 /** \brief Structure to configure the Module
297 */
298 typedef struct
299 {
300 Ifx_I2C *i2c; /**< \brief Module Pointer */
301 float32 baudrate; /**< \brief Baudrate */
302 IFX_CONST IfxI2c_Pins *pins; /**< \brief Pins */
303 IfxI2c_Mode mode; /**< \brief Speed Mode */
304 } IfxI2c_I2c_Config;
305
306 /** \brief Structure with slave device data
307 */
308 typedef struct
309 {
310 IfxI2c_I2c *i2c; /**< \brief Module Pionter */
311 uint16 deviceAddress; /**< \brief the slave device's address */
312 IfxI2c_AddressMode addressMode; /**< \brief slave device's address (7 or 10 bits) */
313 IfxI2c_Mode speedMode; /**< \brief slave device in Standard/Fast or High Speed mode. */
314 } IfxI2c_I2c_Device;
315
316 /** \brief Structure to configure the device's data structure
317 */
318 typedef struct
319 {
320 IfxI2c_I2c *i2c; /**< \brief Module Pointer */
321 uint16 deviceAddress; /**< \brief the slave device's address */
322 IfxI2c_AddressMode addressMode; /**< \brief slave device's address (7 or 10 bits) */
323 IfxI2c_Mode speedMode; /**< \brief slave device in Standard/Fast or High Speed mode. */
324 } IfxI2c_I2c_deviceConfig;
325
326 /** \} */
327
328 /** \addtogroup IfxLld_I2c_I2c_Functions
329 * \{ */
330
331 /******************************************************************************/
332 /*-------------------------Global Function Prototypes-------------------------*/
333 /******************************************************************************/
334
335 /** \brief returns the baudrate of SCL
336 * \param i2c i2c Handler
337 */
338 IFX_EXTERN float32 IfxI2c_I2c_getBaudrate(IfxI2c_I2c *i2c);
339
340 /** \brief Fills the config structure with default values
341 * \param config Structure to configure the Module
342 * \param i2c Module address
343 * \return None
344 */
345 IFX_EXTERN void IfxI2c_I2c_initConfig(IfxI2c_I2c_Config *config, Ifx_I2C *i2c);
346
347 /** \brief Initializes the device Handler
348 * \param i2cDevice I2c device Handler
349 * \param i2cDeviceConfig Structure to configure the device's data structure
350 * \return None
351 *
352 * A coding example can be found in \ref IfxLld_I2c_I2c_Usage
353 *
354 */
355 IFX_EXTERN void IfxI2c_I2c_initDevice(IfxI2c_I2c_Device *i2cDevice, const IfxI2c_I2c_deviceConfig *i2cDeviceConfig);
356
357 /** \brief Fills the config structure of the slave device with default values.
358 * \param i2cDeviceConfig Structure to configure the device's data structure
359 * \param i2c Handler
360 * \return None
361 */
362 IFX_EXTERN void IfxI2c_I2c_initDeviceConfig(IfxI2c_I2c_deviceConfig *i2cDeviceConfig, IfxI2c_I2c *i2c);
363
364 /** \brief Initializes the Module
365 * \param i2c Handler
366 * \param config Configuration structure
367 * \return None
368 *
369 * A coding example can be found in \ref IfxLld_I2c_I2c_Usage
370 *
371 */
372 IFX_EXTERN void IfxI2c_I2c_initModule(IfxI2c_I2c *i2c, const IfxI2c_I2c_Config *config);
373
374 /** \brief reads the I2c device
375 *
376 * A coding example can be found in \ref IfxLld_I2c_I2c_Usage
377 *
378 */
379 IFX_EXTERN IfxI2c_I2c_Status IfxI2c_I2c_read(IfxI2c_I2c_Device *i2cDevice, volatile uint8 *data, Ifx_SizeT size);
380
381 /** \brief writes to the I2c device
382 *
383 * A coding example can be found in \ref IfxLld_I2c_I2c_Usage
384 *
385 */
386 IFX_EXTERN IfxI2c_I2c_Status IfxI2c_I2c_write(IfxI2c_I2c_Device *i2cDevice, volatile uint8 *data, Ifx_SizeT size);
387
388 /** \} */
389
390 #endif /* IFXI2C_I2C_H */
IfxI2c_I2c_getBaudrate
IFX_EXTERN float32 IfxI2c_I2c_getBaudrate(IfxI2c_I2c *i2c)
returns the baudrate of SCL
Definition: IfxI2c_I2c.c:53
IfxI2c_BusStatus
IfxI2c_BusStatus
Definition: IfxI2c.h:86
IfxI2c_Mode
IfxI2c_Mode
Select speed mode. Standard and Fast or High Speed mode.
Definition: IfxI2c.h:118
IfxI2c_AddressMode
IfxI2c_AddressMode
Selects width of address bits (7 or 10 bits) Definition in Ifx_I2C.ADDRCFG.B.TBAM.
Definition: IfxI2c.h:80
IfxI2c.h
I2C basic functionality.
float32
float float32
Definition: Platform_Types.h:170
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
IfxI2c_I2c::baudrate
float32 baudrate
Baudrate.
Definition: IfxI2c_I2c.h:293
IfxI2c_I2c_Config
Structure to configure the Module.
Definition: IfxI2c_I2c.h:298
IfxI2c_I2c_read
IFX_EXTERN IfxI2c_I2c_Status IfxI2c_I2c_read(IfxI2c_I2c_Device *i2cDevice, volatile uint8 *data, Ifx_SizeT size)
reads the I2c device
Definition: IfxI2c_I2c.c:116
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxI2c_I2c_Status
IfxI2c_I2c_Status
Definition: IfxI2c_I2c.h:269
IfxI2c_I2c_Status_busNotFree
bus is not free
Definition: IfxI2c_I2c.h:274
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxI2c_I2c_deviceConfig
Structure to configure the device&#39;s data structure.
Definition: IfxI2c_I2c.h:318
IfxI2c_I2c_initModule
IFX_EXTERN void IfxI2c_I2c_initModule(IfxI2c_I2c *i2c, const IfxI2c_I2c_Config *config)
Initializes the Module.
Definition: IfxI2c_I2c.c:86
IfxI2c_I2c_Device::i2c
IfxI2c_I2c * i2c
Module Pionter.
Definition: IfxI2c_I2c.h:310
IfxI2c_I2c_Device::deviceAddress
uint16 deviceAddress
the slave device&#39;s address
Definition: IfxI2c_I2c.h:311
IfxI2c_I2c::i2c
Ifx_I2C * i2c
Module Pointer.
Definition: IfxI2c_I2c.h:290
IfxI2c_I2c_Status_nak
NAK.
Definition: IfxI2c_I2c.h:272
IfxI2c_I2c_write
IFX_EXTERN IfxI2c_I2c_Status IfxI2c_I2c_write(IfxI2c_I2c_Device *i2cDevice, volatile uint8 *data, Ifx_SizeT size)
writes to the I2c device
Definition: IfxI2c_I2c.c:387
IfxI2c_I2c::busStatus
IfxI2c_BusStatus busStatus
Status of the bus.
Definition: IfxI2c_I2c.h:291
IfxI2c_I2c_Device::speedMode
IfxI2c_Mode speedMode
slave device in Standard/Fast or High Speed mode.
Definition: IfxI2c_I2c.h:313
IfxI2c_I2c_Config::pins
IFX_CONST IfxI2c_Pins * pins
Pins.
Definition: IfxI2c_I2c.h:302
IfxI2c_I2c_Status_error
error
Definition: IfxI2c_I2c.h:275
IfxCpu.h
CPU basic functionality.
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxI2c_I2c_Device
Structure with slave device data.
Definition: IfxI2c_I2c.h:308
IfxI2c_Pins
Pin Structure.
Definition: IfxI2c.h:169
IfxI2c_I2c_Device::addressMode
IfxI2c_AddressMode addressMode
slave device&#39;s address (7 or 10 bits)
Definition: IfxI2c_I2c.h:312
IfxI2c_I2c_initConfig
IFX_EXTERN void IfxI2c_I2c_initConfig(IfxI2c_I2c_Config *config, Ifx_I2C *i2c)
Fills the config structure with default values.
Definition: IfxI2c_I2c.c:59
IfxI2c_I2c_Status_al
Arbitration Lost.
Definition: IfxI2c_I2c.h:273
IfxI2c_I2c_initDeviceConfig
IFX_EXTERN void IfxI2c_I2c_initDeviceConfig(IfxI2c_I2c_deviceConfig *i2cDeviceConfig, IfxI2c_I2c *i2c)
Fills the config structure of the slave device with default values.
Definition: IfxI2c_I2c.c:77
IfxI2c_I2c
Handler.
Definition: IfxI2c_I2c.h:288
IfxI2c_I2c_initDevice
IFX_EXTERN void IfxI2c_I2c_initDevice(IfxI2c_I2c_Device *i2cDevice, const IfxI2c_I2c_deviceConfig *i2cDeviceConfig)
Initializes the device Handler.
Definition: IfxI2c_I2c.c:68
IfxI2c_I2c::status
IfxI2c_I2c_Status status
Status of the last bus operation.
Definition: IfxI2c_I2c.h:292
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxI2c_I2c_Status_ok
ok
Definition: IfxI2c_I2c.h:271
IfxI2c_I2c_Config::mode
IfxI2c_Mode mode
Speed Mode.
Definition: IfxI2c_I2c.h:303


iLLD_TC38A: IfxI2c_PinMap.c Source File

  • _PinMap
IfxI2c_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxI2c_PinMap.c
3 * \brief I2C I/O map
4 * \ingroup IfxLld_I2c
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "IfxI2c_PinMap.h"
44
45 IfxI2c_Scl_InOut IfxI2c0_SCL_P02_5_INOUT = {&MODULE_I2C0, {&MODULE_P02, 5}, Ifx_RxSel_a, IfxPort_OutputIdx_alt5};
46 IfxI2c_Scl_InOut IfxI2c0_SCL_P13_1_INOUT = {&MODULE_I2C0, {&MODULE_P13, 1}, Ifx_RxSel_b, IfxPort_OutputIdx_alt6};
47 IfxI2c_Scl_InOut IfxI2c0_SCL_P15_4_INOUT = {&MODULE_I2C0, {&MODULE_P15, 4}, Ifx_RxSel_c, IfxPort_OutputIdx_alt6};
48 IfxI2c_Scl_InOut IfxI2c1_SCL_P11_14_INOUT = {&MODULE_I2C1, {&MODULE_P11,14}, Ifx_RxSel_a, IfxPort_OutputIdx_alt6};
49 IfxI2c_Scl_InOut IfxI2c1_SCL_P13_9_INOUT = {&MODULE_I2C1, {&MODULE_P13, 9}, Ifx_RxSel_b, IfxPort_OutputIdx_alt6};
50 IfxI2c_Sda_InOut IfxI2c0_SDA_P02_4_INOUT = {&MODULE_I2C0, {&MODULE_P02, 4}, Ifx_RxSel_a, IfxPort_OutputIdx_alt5};
51 IfxI2c_Sda_InOut IfxI2c0_SDA_P13_2_INOUT = {&MODULE_I2C0, {&MODULE_P13, 2}, Ifx_RxSel_b, IfxPort_OutputIdx_alt6};
52 IfxI2c_Sda_InOut IfxI2c0_SDA_P15_5_INOUT = {&MODULE_I2C0, {&MODULE_P15, 5}, Ifx_RxSel_c, IfxPort_OutputIdx_alt6};
53 IfxI2c_Sda_InOut IfxI2c1_SDA_P11_13_INOUT = {&MODULE_I2C1, {&MODULE_P11,13}, Ifx_RxSel_a, IfxPort_OutputIdx_alt6};
54 IfxI2c_Sda_InOut IfxI2c1_SDA_P13_12_INOUT = {&MODULE_I2C1, {&MODULE_P13,12}, Ifx_RxSel_b, IfxPort_OutputIdx_alt6};
55
56
57 const IfxI2c_Scl_InOut *IfxI2c_Scl_InOut_pinTable[IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS] = {
58 {
59 &IfxI2c0_SCL_P02_5_INOUT,
60 &IfxI2c0_SCL_P13_1_INOUT,
61 &IfxI2c0_SCL_P15_4_INOUT
62 },
63 {
64 &IfxI2c1_SCL_P11_14_INOUT,
65 &IfxI2c1_SCL_P13_9_INOUT,
66 NULL_PTR
67 }
68 };
69
70 const IfxI2c_Sda_InOut *IfxI2c_Sda_InOut_pinTable[IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS] = {
71 {
72 &IfxI2c0_SDA_P02_4_INOUT,
73 &IfxI2c0_SDA_P13_2_INOUT,
74 &IfxI2c0_SDA_P15_5_INOUT
75 },
76 {
77 &IfxI2c1_SDA_P11_13_INOUT,
78 &IfxI2c1_SDA_P13_12_INOUT,
79 NULL_PTR
80 }
81 };
IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS
#define IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS
Definition: IfxI2c_PinMap.h:86
IfxI2c1_SDA_P11_13_INOUT
IfxI2c_Sda_InOut IfxI2c1_SDA_P11_13_INOUT
Definition: IfxI2c_PinMap.c:53
IfxI2c_Sda_InOut_pinTable
const IfxI2c_Sda_InOut * IfxI2c_Sda_InOut_pinTable[IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS]
Definition: IfxI2c_PinMap.c:70
IfxI2c1_SDA_P13_12_INOUT
IfxI2c_Sda_InOut IfxI2c1_SDA_P13_12_INOUT
Definition: IfxI2c_PinMap.c:54
Ifx_RxSel_a
Definition: Ifx_Types.h:129
IfxI2c_Sda_InOut
SDA input mapping structure.
Definition: IfxI2c_PinMap.h:65
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
Ifx_RxSel_b
Definition: Ifx_Types.h:130
IfxI2c0_SCL_P13_1_INOUT
IfxI2c_Scl_InOut IfxI2c0_SCL_P13_1_INOUT
Definition: IfxI2c_PinMap.c:46
IfxI2c1_SCL_P11_14_INOUT
IfxI2c_Scl_InOut IfxI2c1_SCL_P11_14_INOUT
Definition: IfxI2c_PinMap.c:48
IfxI2c_Scl_InOut_pinTable
const IfxI2c_Scl_InOut * IfxI2c_Scl_InOut_pinTable[IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS]
Definition: IfxI2c_PinMap.c:57
IfxI2c0_SDA_P15_5_INOUT
IfxI2c_Sda_InOut IfxI2c0_SDA_P15_5_INOUT
Definition: IfxI2c_PinMap.c:52
IfxPort_OutputIdx_alt6
Definition: IfxPort.h:134
IfxI2c0_SDA_P13_2_INOUT
IfxI2c_Sda_InOut IfxI2c0_SDA_P13_2_INOUT
Definition: IfxI2c_PinMap.c:51
IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS
#define IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS
Definition: IfxI2c_PinMap.h:87
IfxI2c_PinMap.h
I2C I/O map.
IfxI2c1_SCL_P13_9_INOUT
IfxI2c_Scl_InOut IfxI2c1_SCL_P13_9_INOUT
Definition: IfxI2c_PinMap.c:49
Ifx_RxSel_c
Definition: Ifx_Types.h:131
IfxI2c0_SDA_P02_4_INOUT
IfxI2c_Sda_InOut IfxI2c0_SDA_P02_4_INOUT
Definition: IfxI2c_PinMap.c:50
IfxI2c0_SCL_P02_5_INOUT
IfxI2c_Scl_InOut IfxI2c0_SCL_P02_5_INOUT
Definition: IfxI2c_PinMap.c:45
IfxI2c_Scl_InOut
SCL input mapping structure.
Definition: IfxI2c_PinMap.h:56
IFXI2C_PINMAP_NUM_MODULES
#define IFXI2C_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxI2c_PinMap.h:85
IfxI2c0_SCL_P15_4_INOUT
IfxI2c_Scl_InOut IfxI2c0_SCL_P15_4_INOUT
Definition: IfxI2c_PinMap.c:47
IfxPort_OutputIdx_alt5
Definition: IfxPort.h:133


iLLD_TC38A: IfxI2c_PinMap.h Source File

  • _PinMap
IfxI2c_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxI2c_PinMap.h
3 * \brief I2C I/O map
4 * \ingroup IfxLld_I2c
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_I2c_pinmap I2C Pin Mapping
42 * \ingroup IfxLld_I2c
43 */
44
45 #ifndef IFXI2C_PINMAP_H
46 #define IFXI2C_PINMAP_H
47
48 #include <IfxI2c_reg.h>
49 #include <_Impl/IfxI2c_cfg.h>
50 #include <Port/Std/IfxPort.h>
51
52 /** \addtogroup IfxLld_I2c_pinmap
53 * \{ */
54
55 /** \brief SCL input mapping structure */
56 typedef const struct
57 {
58 Ifx_I2C* module; /**< \brief Base address */
59 IfxPort_Pin pin; /**< \brief Port pin */
60 Ifx_RxSel inSelect; /**< \brief Input multiplexer value */
61 IfxPort_OutputIdx outSelect; /**< \brief Port control code */
62 } IfxI2c_Scl_InOut;
63
64 /** \brief SDA input mapping structure */
65 typedef const struct
66 {
67 Ifx_I2C* module; /**< \brief Base address */
68 IfxPort_Pin pin; /**< \brief Port pin */
69 Ifx_RxSel inSelect; /**< \brief Input multiplexer value */
70 IfxPort_OutputIdx outSelect; /**< \brief Port control code */
71 } IfxI2c_Sda_InOut;
72
73 IFX_EXTERN IfxI2c_Scl_InOut IfxI2c0_SCL_P02_5_INOUT; /**< \brief Serial Clock Output and input */
74 IFX_EXTERN IfxI2c_Scl_InOut IfxI2c0_SCL_P13_1_INOUT; /**< \brief Serial Clock Output and input */
75 IFX_EXTERN IfxI2c_Scl_InOut IfxI2c0_SCL_P15_4_INOUT; /**< \brief Serial Clock Output and input */
76 IFX_EXTERN IfxI2c_Scl_InOut IfxI2c1_SCL_P11_14_INOUT; /**< \brief Serial Clock Output and input */
77 IFX_EXTERN IfxI2c_Scl_InOut IfxI2c1_SCL_P13_9_INOUT; /**< \brief Serial Clock Output and input */
78 IFX_EXTERN IfxI2c_Sda_InOut IfxI2c0_SDA_P02_4_INOUT; /**< \brief Serial Data Output and input */
79 IFX_EXTERN IfxI2c_Sda_InOut IfxI2c0_SDA_P13_2_INOUT; /**< \brief Serial Data Output and input */
80 IFX_EXTERN IfxI2c_Sda_InOut IfxI2c0_SDA_P15_5_INOUT; /**< \brief Serial Data Output and input */
81 IFX_EXTERN IfxI2c_Sda_InOut IfxI2c1_SDA_P11_13_INOUT; /**< \brief Serial Data Output and input */
82 IFX_EXTERN IfxI2c_Sda_InOut IfxI2c1_SDA_P13_12_INOUT; /**< \brief Serial Data Output and input */
83
84 /** \brief Table dimensions */
85 #define IFXI2C_PINMAP_NUM_MODULES 2
86 #define IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS 3
87 #define IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS 3
88
89
90 /** \brief IfxI2c_Scl_InOut table */
91 IFX_EXTERN const IfxI2c_Scl_InOut *IfxI2c_Scl_InOut_pinTable[IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS];
92
93 /** \brief IfxI2c_Sda_InOut table */
94 IFX_EXTERN const IfxI2c_Sda_InOut *IfxI2c_Sda_InOut_pinTable[IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS];
95
96 /** \} */
97
98 #endif /* IFXI2C_PINMAP_H */
IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS
#define IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS
Definition: IfxI2c_PinMap.h:86
IfxI2c1_SCL_P13_9_INOUT
IFX_EXTERN IfxI2c_Scl_InOut IfxI2c1_SCL_P13_9_INOUT
Serial Clock Output and input.
Definition: IfxI2c_PinMap.h:77
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:126
IfxI2c_Scl_InOut::pin
IfxPort_Pin pin
Port pin.
Definition: IfxI2c_PinMap.h:59
IfxI2c0_SCL_P15_4_INOUT
IFX_EXTERN IfxI2c_Scl_InOut IfxI2c0_SCL_P15_4_INOUT
Serial Clock Output and input.
Definition: IfxI2c_PinMap.h:75
IfxI2c_Scl_InOut::inSelect
Ifx_RxSel inSelect
Input multiplexer value.
Definition: IfxI2c_PinMap.h:60
IfxI2c1_SDA_P11_13_INOUT
IFX_EXTERN IfxI2c_Sda_InOut IfxI2c1_SDA_P11_13_INOUT
Serial Data Output and input.
Definition: IfxI2c_PinMap.h:81
IfxI2c_Sda_InOut
SDA input mapping structure.
Definition: IfxI2c_PinMap.h:65
IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS
#define IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS
Definition: IfxI2c_PinMap.h:87
IfxI2c0_SCL_P02_5_INOUT
IFX_EXTERN IfxI2c_Scl_InOut IfxI2c0_SCL_P02_5_INOUT
Serial Clock Output and input.
Definition: IfxI2c_PinMap.h:73
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxI2c_Sda_InOut_pinTable
IFX_EXTERN const IfxI2c_Sda_InOut * IfxI2c_Sda_InOut_pinTable[IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS]
IfxI2c_Sda_InOut table.
Definition: IfxI2c_PinMap.h:94
IfxI2c_Scl_InOut::module
Ifx_I2C * module
Base address.
Definition: IfxI2c_PinMap.h:58
IfxI2c1_SCL_P11_14_INOUT
IFX_EXTERN IfxI2c_Scl_InOut IfxI2c1_SCL_P11_14_INOUT
Serial Clock Output and input.
Definition: IfxI2c_PinMap.h:76
IfxI2c_cfg.h
I2C on-chip implementation data.
IfxI2c_Scl_InOut_pinTable
IFX_EXTERN const IfxI2c_Scl_InOut * IfxI2c_Scl_InOut_pinTable[IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS]
IfxI2c_Scl_InOut table.
Definition: IfxI2c_PinMap.h:91
IfxI2c_Scl_InOut
SCL input mapping structure.
Definition: IfxI2c_PinMap.h:56
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:246
Ifx_RxSel
Ifx_RxSel
input multiplexer definition used in PinMaps
Definition: Ifx_Types.h:127
IFXI2C_PINMAP_NUM_MODULES
#define IFXI2C_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxI2c_PinMap.h:85
IfxI2c0_SDA_P02_4_INOUT
IFX_EXTERN IfxI2c_Sda_InOut IfxI2c0_SDA_P02_4_INOUT
Serial Data Output and input.
Definition: IfxI2c_PinMap.h:78
IfxI2c1_SDA_P13_12_INOUT
IFX_EXTERN IfxI2c_Sda_InOut IfxI2c1_SDA_P13_12_INOUT
Serial Data Output and input.
Definition: IfxI2c_PinMap.h:82
IfxI2c0_SDA_P13_2_INOUT
IFX_EXTERN IfxI2c_Sda_InOut IfxI2c0_SDA_P13_2_INOUT
Serial Data Output and input.
Definition: IfxI2c_PinMap.h:79
IfxI2c0_SDA_P15_5_INOUT
IFX_EXTERN IfxI2c_Sda_InOut IfxI2c0_SDA_P15_5_INOUT
Serial Data Output and input.
Definition: IfxI2c_PinMap.h:80
IfxI2c0_SCL_P13_1_INOUT
IFX_EXTERN IfxI2c_Scl_InOut IfxI2c0_SCL_P13_1_INOUT
Serial Clock Output and input.
Definition: IfxI2c_PinMap.h:74
IfxI2c_Scl_InOut::outSelect
IfxPort_OutputIdx outSelect
Port control code.
Definition: IfxI2c_PinMap.h:61
IfxPort.h
PORT basic functionality.


iLLD_TC38A: IfxI2c_cfg.c Source File

  • _Impl
IfxI2c_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxI2c_cfg.c
3 * \brief I2C on-chip implementation data
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 */
43
44 /******************************************************************************/
45 /*----------------------------------Includes----------------------------------*/
46 /******************************************************************************/
47
48 #include "IfxI2c_cfg.h"
49
50 /******************************************************************************/
51 /*-----------------------Exported Variables/Constants-------------------------*/
52 /******************************************************************************/
53
54 IFX_CONST IfxModule_IndexMap IfxI2c_cfg_indexMap[IFXI2C_NUM_MODULES] = {
55 {&MODULE_I2C0, (uint32)IfxI2c_Index_0},
56 {&MODULE_I2C1, (uint32)IfxI2c_Index_1}
57 };
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxI2c_Index_1
I2C Index 1.
Definition: IfxI2c_cfg.h:81
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxI2c_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxI2c_cfg_indexMap[IFXI2C_NUM_MODULES]
Definition: IfxI2c_cfg.c:54
IfxI2c_Index_0
I2C Index 0.
Definition: IfxI2c_cfg.h:80
IFXI2C_NUM_MODULES
#define IFXI2C_NUM_MODULES
Definition: IfxI2c_cfg.h:67
IfxI2c_cfg.h
I2C on-chip implementation data.
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:140


iLLD_TC38A: IfxI2c_cfg.h Source File

  • _Impl
IfxI2c_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxI2c_cfg.h
3 * \brief I2C on-chip implementation data
4 * \ingroup IfxLld_I2c
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 *
43 * \defgroup IfxLld_I2c I2C
44 * \ingroup IfxLld
45 * \defgroup IfxLld_I2c_Impl Implementation
46 * \ingroup IfxLld_I2c
47 * \defgroup IfxLld_I2c_Std Standard Driver
48 * \ingroup IfxLld_I2c
49 * \defgroup IfxLld_I2c_Impl_Enumerations Enumerations
50 * \ingroup IfxLld_I2c_Impl
51 */
52
53 #ifndef IFXI2C_CFG_H
54 #define IFXI2C_CFG_H 1
55
56 /******************************************************************************/
57 /*----------------------------------Includes----------------------------------*/
58 /******************************************************************************/
59
60 #include "Cpu/Std/Ifx_Types.h"
61 #include "IfxI2c_reg.h"
62
63 /******************************************************************************/
64 /*-----------------------------------Macros-----------------------------------*/
65 /******************************************************************************/
66
67 #define IFXI2C_NUM_MODULES (2)
68
69 /******************************************************************************/
70 /*--------------------------------Enumerations--------------------------------*/
71 /******************************************************************************/
72
73 /** \addtogroup IfxLld_I2c_Impl_Enumerations
74 * \{ */
75 /** \brief List of the available I2c interfaces
76 */
77 typedef enum
78 {
79 IfxI2c_Index_none = -1, /**< \brief Not Selected */
80 IfxI2c_Index_0 = 0, /**< \brief I2C Index 0 */
81 IfxI2c_Index_1 /**< \brief I2C Index 1 */
82 } IfxI2c_Index;
83
84 /** \} */
85
86 /** \addtogroup IfxLld_I2c_Impl_Enumerations
87 * \{ */
88
89 /******************************************************************************/
90 /*-------------------Global Exported Variables/Constants----------------------*/
91 /******************************************************************************/
92 IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxI2c_cfg_indexMap[IFXI2C_NUM_MODULES];
93
94 /** \} */
95
96 #endif /* IFXI2C_CFG_H */
IfxI2c_Index_none
Not Selected.
Definition: IfxI2c_cfg.h:79
IfxI2c_Index_1
I2C Index 1.
Definition: IfxI2c_cfg.h:81
IfxI2c_Index
IfxI2c_Index
List of the available I2c interfaces.
Definition: IfxI2c_cfg.h:77
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxI2c_Index_0
I2C Index 0.
Definition: IfxI2c_cfg.h:80
IFXI2C_NUM_MODULES
#define IFXI2C_NUM_MODULES
Definition: IfxI2c_cfg.h:67
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:140
IfxI2c_cfg_indexMap
IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxI2c_cfg_indexMap[IFXI2C_NUM_MODULES]
Definition: IfxI2c_cfg.h:92


iLLD_TC38A: IfxIom.c Source File

  • Iom
  • Std
IfxIom.c
Go to the documentation of this file.
1 /**
2 * \file IfxIom.c
3 * \brief IOM basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxIom.h"
47 #include "Scu/Std/IfxScuCcu.h"
48
49 /******************************************************************************/
50 /*-------------------------Function Implementations---------------------------*/
51 /******************************************************************************/
52
53 float32 IfxIom_getFrequency(Ifx_IOM *iom)
54 {
55 IFX_UNUSED_PARAMETER(iom)
56 float32 fspb;
57 float32 fgtm;
58
59 fspb = IfxScuCcu_getSpbFrequency();
60 fgtm = IfxScuCcu_getGtmFrequency();
61
62 return fspb > fgtm ? fspb : fgtm;
63 }
64
65
66 void IfxIom_resetModule(Ifx_IOM *iom)
67 {
68 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
69
70 IfxScuWdt_clearCpuEndinit(passwd);
71 iom->KRST1.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
72 iom->KRST0.B.RST = 1;
73 IfxScuWdt_setCpuEndinit(passwd);
74
75 while (iom->KRST0.B.RSTSTAT == 0) /* Wait until reset is executed */
76
77 {}
78
79 IfxScuWdt_clearCpuEndinit(passwd);
80 iom->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
81 IfxScuWdt_setCpuEndinit(passwd);
82 }
IfxScuCcu_getSpbFrequency
float32 IfxScuCcu_getSpbFrequency(void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider...
Definition: IfxScuCcu.c:479
IfxIom.h
IOM basic functionality.
float32
float float32
Definition: Platform_Types.h:170
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxIom_getFrequency
float32 IfxIom_getFrequency(Ifx_IOM *iom)
Return the frequency used for the filter and timers clock.
Definition: IfxIom.c:53
IfxScuCcu_getGtmFrequency
IFX_INLINE float32 IfxScuCcu_getGtmFrequency(void)
API to get GTMdivider frequency This API returns the based on the divider value in CCUCON register an...
Definition: IfxScuCcu.h:1597
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxIom_resetModule
void IfxIom_resetModule(Ifx_IOM *iom)
Reset the IOM module.
Definition: IfxIom.c:66
IfxScuCcu.h
SCU basic functionality.
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222


iLLD_TC38A: IfxIom.h Source File

  • Iom
  • Std
IfxIom.h
Go to the documentation of this file.
1 /**
2 * \file IfxIom.h
3 * \brief IOM basic functionality
4 * \ingroup IfxLld_Iom
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Iom_Std_Enumeration Enumeration
42 * \ingroup IfxLld_Iom_Std
43 * \defgroup IfxLld_Iom_Std_Utility Utility Functions
44 * \ingroup IfxLld_Iom_Std
45 * \defgroup IfxLld_Iom_Std_Enumeration_Obsolete Enumeration Obsolete (NOt recommended for use)
46 * \ingroup IfxLld_Iom_Std
47 * \defgroup IfxLld_Iom_Std_Module_Obsolete Module Functions Obsolete (NOt recommended for use)
48 * \ingroup IfxLld_Iom_Std
49 */
50
51 #ifndef IFXIOM_H
52 #define IFXIOM_H 1
53
54 /******************************************************************************/
55 /*----------------------------------Includes----------------------------------*/
56 /******************************************************************************/
57
58 #include "_Impl/IfxIom_cfg.h"
59 #include "IfxIom_reg.h"
60 #include "Scu/Std/IfxScuWdt.h"
61 #include "Cpu/Std/IfxCpu_Intrinsics.h"
62
63 /******************************************************************************/
64 /*--------------------------------Enumerations--------------------------------*/
65 /******************************************************************************/
66
67 /** \addtogroup IfxLld_Iom_Std_Enumeration
68 * \{ */
69 /** \brief Event source configuration
70 * IOM_LAMCFGm.MOS
71 */
72 typedef enum
73 {
74 IfxIom_LamEventSource_mon = 0, /**< \brief Monitor signal is sourced directly from FPCmch */
75 IfxIom_LamEventSource_monXorRef = 1 /**< \brief Monitor signal is EXOR'd with FPCrch */
76 } IfxIom_LamEventSource;
77
78 /** \brief Event trigger configuration
79 * IOM_LAMCFGm.EDS upper two bits
80 */
81 typedef enum
82 {
83 IfxIom_LamEventTrigger_none = 0, /**< \brief Neither edge used to gate event generation */
84 IfxIom_LamEventTrigger_risingEdge = 1, /**< \brief Positive edge used to gate event generation */
85 IfxIom_LamEventTrigger_fallingEdge = 2, /**< \brief Negative edge used to gate event generation */
86 IfxIom_LamEventTrigger_anyEdge = 3 /**< \brief Either edge used to gate event generation */
87 } IfxIom_LamEventTrigger;
88
89 /** \brief Timer clear event configuration
90 * IOM_LAMCFGm.EDS upper lower bits
91 */
92 typedef enum
93 {
94 IfxIom_LamEventWindowClearEvent_none = 0, /**< \brief Neither edge used to clear event windowcounter */
95 IfxIom_LamEventWindowClearEvent_risingEdge = 1, /**< \brief Positive edge used to clear event windowcounter */
96 IfxIom_LamEventWindowClearEvent_fallingEdge = 2, /**< \brief Negative edge used to clear event windowcounter */
97 IfxIom_LamEventWindowClearEvent_anyEdge = 3 /**< \brief Either edge used to clear event windowcounter */
98 } IfxIom_LamEventWindowClearEvent;
99
100 /** \brief Timer control source configuration
101 * IOM_LAMCFGm.EWS
102 */
103 typedef enum
104 {
105 IfxIom_LamEventWindowControlSource_ref = 0, /**< \brief Event window generation is determined from the reference signal */
106 IfxIom_LamEventWindowControlSource_mon = 1 /**< \brief Event window generation is determined from the monitor signal */
107 } IfxIom_LamEventWindowControlSource;
108
109 /** \brief Timer run configuration
110 * IOM_LAMCFGm.RMS
111 */
112 typedef enum
113 {
114 IfxIom_LamEventWindowRunControl_freeRunning = 0, /**< \brief Event window generation is free-running. */
115 IfxIom_LamEventWindowRunControl_gated = 1 /**< \brief Event window generation is gated with the monitor or reference signal */
116 } IfxIom_LamEventWindowRunControl;
117
118 /** \brief FPC filer mode
119 * IOM_FPCCTRk.MOD, with additional definition for noFilter
120 */
121 typedef enum
122 {
123 IfxIom_LamFilterMode_delayDebounceBothEdge = 0, /**< \brief Delayed Debounce Filter Mode on both edges */
124 IfxIom_LamFilterMode_immediateDebounceBothEdge = 1, /**< \brief Immediate Debounce Filter Mode on both edges */
125 IfxIom_LamFilterMode_immediateDebounceRisingEdge = 2, /**< \brief Rising edge: Immediate Debounce Filter Mode, falling edge: no filtering */
126 IfxIom_LamFilterMode_immediateDebounceFallingEdge = 3, /**< \brief Rising edge: no filtering, falling edge: Immediate Debounce Filter Mode */
127 IfxIom_LamFilterMode_delayDebounceRisingEdgeImmediateDebounceFallingEdge = 4, /**< \brief Rising edge: Delayed Debounce Filter Mode, falling edge: Immediate Debounce Filter Mode */
128 IfxIom_LamFilterMode_immediateDebounceRisingEdgeDelayDebounceFallingEdge = 5, /**< \brief Immediate Debounce Filter Mode, falling edge: Delayed Debounce Filter Mode */
129 IfxIom_LamFilterMode_prescalerOnRisingEdge = 6, /**< \brief Prescaler Mode (triggered on rising edge) */
130 IfxIom_LamFilterMode_prescalerOnFallingEdge = 7, /**< \brief Prescaler Mode (triggered on falling edge) */
131 IfxIom_LamFilterMode_noFilter = 8 /**< \brief No filter (value used for software only ) */
132 } IfxIom_LamFilterMode;
133
134 /** \brief Specifies the Logic Module Analyser Module Number
135 */
136 typedef enum
137 {
138 IfxIom_LamId_0 = 0, /**< \brief Specifies the LAM Id0 */
139 IfxIom_LamId_1, /**< \brief Specifies the LAM Id1 */
140 IfxIom_LamId_2, /**< \brief Specifies the LAM Id2 */
141 IfxIom_LamId_3, /**< \brief Specifies the LAM Id3 */
142 IfxIom_LamId_4, /**< \brief Specifies the LAM Id4 */
143 IfxIom_LamId_5, /**< \brief Specifies the LAM Id5 */
144 IfxIom_LamId_6, /**< \brief Specifies the LAM Id6 */
145 IfxIom_LamId_7, /**< \brief Specifies the LAM Id7 */
146 IfxIom_LamId_8, /**< \brief Specifies the LAM Id8 */
147 IfxIom_LamId_9, /**< \brief Specifies the LAM Id9 */
148 IfxIom_LamId_10, /**< \brief Specifies the LAM Id10 */
149 IfxIom_LamId_11, /**< \brief Specifies the LAM Id11 */
150 IfxIom_LamId_12, /**< \brief Specifies the LAM Id12 */
151 IfxIom_LamId_13, /**< \brief Specifies the LAM Id13 */
152 IfxIom_LamId_14, /**< \brief Specifies the LAM Id14 */
153 IfxIom_LamId_15 /**< \brief Specifies the LAM Id15 */
154 } IfxIom_LamId;
155
156 /** \brief Enable/disable the sensitivity of the module to sleep signal
157 * Definition in Ifx_IOM.CLC.B.EDIS
158 */
159 typedef enum
160 {
161 IfxIom_SleepMode_enable = 0, /**< \brief Enables sleep mode */
162 IfxIom_SleepMode_disable = 1 /**< \brief Disables sleep mode */
163 } IfxIom_SleepMode;
164
165 /** \} */
166
167 /** \addtogroup IfxLld_Iom_Std_Enumeration_Obsolete
168 * \{ */
169 /** \brief Specifies the edge type which need to be cleared.
170 */
171 typedef enum
172 {
173 IfxIom_EdgeClearType_rising = 0, /**< \brief Specifies rising edge to be cleared. */
174 IfxIom_EdgeClearType_falling = 1, /**< \brief Specifies falling edge to be cleared. */
175 IfxIom_EdgeClearType_risingFalling = 2 /**< \brief Specifies both rising falling edge to be cleared. */
176 } IfxIom_EdgeClearType;
177
178 /** \brief LAMCFG[lamId].EDS, Specifies which active edges of the monitor and reference signals are used for the event window generation.
179 */
180 typedef enum
181 {
182 IfxIom_EventActiveEdgeSelection_neitherGateNeitherClear = 0, /**< \brief neither edge used to gate event generation and neither edge used to clear event windowcounter. */
183 IfxIom_EventActiveEdgeSelection_neitherGatePositiveClear = 1, /**< \brief neither edge used to gate event generation and positive edge used to clear event windowcounter. */
184 IfxIom_EventActiveEdgeSelection_neitherGateNegativeClear = 2, /**< \brief neither edge used to gate event generation and negative edge used to clear event windowcounter. */
185 IfxIom_EventActiveEdgeSelection_neitherGateEitherClear = 3, /**< \brief neither edge used to gate event generation and either edge used to clear event windowcounter. */
186 IfxIom_EventActiveEdgeSelection_positiveGateNeitherClear = 4, /**< \brief positive edge used to gate event generation and neither edge used to clear event windowcounter. */
187 IfxIom_EventActiveEdgeSelection_positiveGatePositiveClear = 5, /**< \brief positive edge used to gate event generation and positive edge used to clear event windowcounter. */
188 IfxIom_EventActiveEdgeSelection_positiveGateNegativeClear = 6, /**< \brief positive edge used to gate event generation and negative edge used to clear event windowcounter. */
189 IfxIom_EventActiveEdgeSelection_positiveGateEitherClear = 7, /**< \brief positive edge used to gate event generation and negative edge used to clear event windowcounter. */
190 IfxIom_EventActiveEdgeSelection_negativeGateNeitherClear = 8, /**< \brief negative edge used to gate event generation and neither edge used to clear event windowcounter. */
191 IfxIom_EventActiveEdgeSelection_negativeGatePositiveClear = 9, /**< \brief negative edge used to gate event generation and positive edge used to clear event windowcounter. */
192 IfxIom_EventActiveEdgeSelection_negativeGateNegativeClear = 10, /**< \brief negative edge used to gate event generation and negative edge used to clear event windowcounter. */
193 IfxIom_EventActiveEdgeSelection_negativeGateEitherClear = 11, /**< \brief negative edge used to gate event generation and either edge used to clear event windowcounter. */
194 IfxIom_EventActiveEdgeSelection_eitherGateNeitherClear = 12, /**< \brief either edge used to gate event generation and neither edge used to clear event windowcounter. */
195 IfxIom_EventActiveEdgeSelection_eitherGatePositiveClear = 13, /**< \brief either edge used to gate event generation and positive edge used to clear event windowcounter. */
196 IfxIom_EventActiveEdgeSelection_eitherGateNegativeClear = 14, /**< \brief either edge used to gate event generation and negative edge used to clear event windowcounter. */
197 IfxIom_EventActiveEdgeSelection_eitherGateEitherClear = 15 /**< \brief either edge used to gate event generation and either edge used to clear event windowcounter. */
198 } IfxIom_EventActiveEdgeSelection;
199
200 /** \brief ECMCCFG.SELCx(x= 0,1,2,3), Specifies which channel event output is to be routed to counterCn.
201 */
202 typedef enum
203 {
204 IfxIom_EventCounterChannel_0 = 0, /**< \brief channel 0 event output to be routed to event counter */
205 IfxIom_EventCounterChannel_1, /**< \brief channel 1 event output to be routed to event counter */
206 IfxIom_EventCounterChannel_2, /**< \brief channel 2 event output to be routed to event counter */
207 IfxIom_EventCounterChannel_3, /**< \brief channel 3 event output to be routed to event counter */
208 IfxIom_EventCounterChannel_4, /**< \brief channel 4 event output to be routed to event counter */
209 IfxIom_EventCounterChannel_5, /**< \brief channel 5 event output to be routed to event counter */
210 IfxIom_EventCounterChannel_6, /**< \brief channel 6 event output to be routed to event counter */
211 IfxIom_EventCounterChannel_7, /**< \brief channel 7 event output to be routed to event counter */
212 IfxIom_EventCounterChannel_8, /**< \brief channel 8 event output to be routed to event counter */
213 IfxIom_EventCounterChannel_9, /**< \brief channel 9 event output to be routed to event counter */
214 IfxIom_EventCounterChannel_10, /**< \brief channel 10 event output to be routed to event counter */
215 IfxIom_EventCounterChannel_11, /**< \brief channel 11 event output to be routed to event counter */
216 IfxIom_EventCounterChannel_12, /**< \brief channel 12 event output to be routed to event counter */
217 IfxIom_EventCounterChannel_13, /**< \brief channel 13 event output to be routed to event counter */
218 IfxIom_EventCounterChannel_14, /**< \brief channel 14 event output to be routed to event counter */
219 IfxIom_EventCounterChannel_15 /**< \brief channel 15 event output to be routed to event counter */
220 } IfxIom_EventCounterChannel;
221
222 /** \brief ECMCCFG.THRCx(x= 0,1,2,3), Specifies the threshold count value. Upon the counter meeting the threshold, the counter event output becomes active high
223 */
224 typedef enum
225 {
226 IfxIom_EventCounterThreshold_disable = 0, /**< \brief Specifies counter event output set to
227 * inactive */
228 IfxIom_EventCounterThreshold_1 = 1, /**< \brief Specifies threshold count value 1 */
229 IfxIom_EventCounterThreshold_2, /**< \brief Specifies threshold count value 2 */
230 IfxIom_EventCounterThreshold_3, /**< \brief Specifies threshold count value 3 */
231 IfxIom_EventCounterThreshold_4, /**< \brief Specifies threshold count value 4 */
232 IfxIom_EventCounterThreshold_5, /**< \brief Specifies threshold count value 5 */
233 IfxIom_EventCounterThreshold_6, /**< \brief Specifies threshold count value 6 */
234 IfxIom_EventCounterThreshold_7, /**< \brief Specifies threshold count value 7 */
235 IfxIom_EventCounterThreshold_8, /**< \brief Specifies threshold count value 8 */
236 IfxIom_EventCounterThreshold_9, /**< \brief Specifies threshold count value 9 */
237 IfxIom_EventCounterThreshold_10, /**< \brief Specifies threshold count value 10 */
238 IfxIom_EventCounterThreshold_11, /**< \brief Specifies threshold count value 11 */
239 IfxIom_EventCounterThreshold_12, /**< \brief Specifies threshold count value 12 */
240 IfxIom_EventCounterThreshold_13, /**< \brief Specifies threshold count value 13 */
241 IfxIom_EventCounterThreshold_14, /**< \brief Specifies threshold count value 14 */
242 IfxIom_EventCounterThreshold_15 /**< \brief Specifies threshold count value 15 */
243 } IfxIom_EventCounterThreshold;
244
245 /** \brief LAMCFG[lamId].EWS, Specifies whether the event window generation is from the monitor or reference signal.
246 */
247 typedef enum
248 {
249 IfxIom_EventSource_reference = 0, /**< \brief Specifies the event window generation is from the reference signal. */
250 IfxIom_EventSource_monitor = 1 /**< \brief Specifies the event window generation is from the monitor signal. */
251 } IfxIom_EventSource;
252
253 /** \brief FPCCTR[channelId].MOD, Specifies the Filter & Prescaler Cell mode
254 */
255 typedef enum
256 {
257 IfxIom_FilterMode_delayedDebounce = 0, /**< \brief Specifies Delayed Debounce filter mode */
258 IfxIom_FilterMode_immediateDebounce = 1, /**< \brief Specifies Immediate Debounce filter mode */
259 IfxIom_FilterMode_risingEdgeImmediateDebounce = 2, /**< \brief Specifies Rising Edge Immediate Debounce filter mode */
260 IfxIom_FilterMode_fallingEdgeImmediateDebounce = 3, /**< \brief Specifies Falling Edge Immediate Debounce filter mode */
261 IfxIom_FilterMode_risingEdgeDelayedFallingEdgeImmediateDebounce = 4, /**< \brief Specifies RisingEdge Delayed FallingEdge Immediate Debounce filter mode */
262 IfxIom_FilterMode_fallingEdgeDelayedRisingEdgeImmediateDebounce = 5, /**< \brief Specifies FallingEdge Delayed RisingEdge Immediate Debounce filter mode */
263 IfxIom_FilterMode_risingEdgePrescaler = 6, /**< \brief Specifies RisingEdge Prescaler filter mode */
264 IfxIom_FilterMode_FallingEdgePrescaler = 7 /**< \brief Specifies FallingEdge Prescaler filter mode */
265 } IfxIom_FilterMode;
266
267 /** \brief Specifies the number of Filter & Prescaler Cell channel Id
268 */
269 typedef enum
270 {
271 IfxIom_FpcChannelId_0 = 0, /**< \brief Specifies the FPC channel 0 */
272 IfxIom_FpcChannelId_1, /**< \brief Specifies the FPC channel 1 */
273 IfxIom_FpcChannelId_2, /**< \brief Specifies the FPC channel 2 */
274 IfxIom_FpcChannelId_3, /**< \brief Specifies the FPC channel 3 */
275 IfxIom_FpcChannelId_4, /**< \brief Specifies the FPC channel 4 */
276 IfxIom_FpcChannelId_5, /**< \brief Specifies the FPC channel 5 */
277 IfxIom_FpcChannelId_6, /**< \brief Specifies the FPC channel 6 */
278 IfxIom_FpcChannelId_7, /**< \brief Specifies the FPC channel 7 */
279 IfxIom_FpcChannelId_8, /**< \brief Specifies the FPC channel 8 */
280 IfxIom_FpcChannelId_9, /**< \brief Specifies the FPC channel 9 */
281 IfxIom_FpcChannelId_10, /**< \brief Specifies the FPC channel 10 */
282 IfxIom_FpcChannelId_11, /**< \brief Specifies the FPC channel 11 */
283 IfxIom_FpcChannelId_12, /**< \brief Specifies the FPC channel 12 */
284 IfxIom_FpcChannelId_13, /**< \brief Specifies the FPC channel 13 */
285 IfxIom_FpcChannelId_14, /**< \brief Specifies the FPC channel 14 */
286 IfxIom_FpcChannelId_15 /**< \brief Specifies the FPC channel 15 */
287 } IfxIom_FpcChannelId;
288
289 /** \brief LAMCFG[lamId].MCS, Specifies which FPC/mux block monitor output signal is to be used for LAM block
290 */
291 typedef enum
292 {
293 IfxIom_LamMonitorInputChannel_0 = 0, /**< \brief Specifies 0 FPC/mux block monitor output signal is to be used for LAM block */
294 IfxIom_LamMonitorInputChannel_1, /**< \brief Specifies 1 FPC/mux block monitor output signal is to be used for LAM block */
295 IfxIom_LamMonitorInputChannel_2, /**< \brief Specifies 2 FPC/mux block monitor output signal is to be used for LAM block */
296 IfxIom_LamMonitorInputChannel_3, /**< \brief Specifies 3 FPC/mux block monitor output signal is to be used for LAM block */
297 IfxIom_LamMonitorInputChannel_4, /**< \brief Specifies 4 FPC/mux block monitor output signal is to be used for LAM block */
298 IfxIom_LamMonitorInputChannel_5, /**< \brief Specifies 5 FPC/mux block monitor output signal is to be used for LAM block */
299 IfxIom_LamMonitorInputChannel_6, /**< \brief Specifies 6 FPC/mux block monitor output signal is to be used for LAM block */
300 IfxIom_LamMonitorInputChannel_7, /**< \brief Specifies 7 FPC/mux block monitor output signal is to be used for LAM block */
301 IfxIom_LamMonitorInputChannel_8, /**< \brief Specifies 8 FPC/mux block monitor output signal is to be used for LAM block */
302 IfxIom_LamMonitorInputChannel_9, /**< \brief Specifies 9 FPC/mux block monitor output signal is to be used for LAM block */
303 IfxIom_LamMonitorInputChannel_10, /**< \brief Specifies 10 FPC/mux block monitor output signal is to be used for LAM block */
304 IfxIom_LamMonitorInputChannel_11, /**< \brief Specifies 11 FPC/mux block monitor output signal is to be used for LAM block */
305 IfxIom_LamMonitorInputChannel_12, /**< \brief Specifies 12 FPC/mux block monitor output signal is to be used for LAM block */
306 IfxIom_LamMonitorInputChannel_13, /**< \brief Specifies 13 FPC/mux block monitor output signal is to be used for LAM block */
307 IfxIom_LamMonitorInputChannel_14, /**< \brief Specifies 14 FPC/mux block monitor output signal is to be used for LAM block */
308 IfxIom_LamMonitorInputChannel_15 /**< \brief Specifies 15 FPC/mux block monitor output signal is to be used for LAM block */
309 } IfxIom_LamMonitorInputChannel;
310
311 /** \brief LAMCFG[lamId].MOS, Specifies whether the monitor signal from the FPC monitor channel is sourced directly or compared with the reference signal from the FPC reference channel for the event compare.
312 */
313 typedef enum
314 {
315 IfxIom_LamMonitorSource_directFpcMonitor = 0, /**< \brief Monitor signal is sourced directly from FPC monitor channel. */
316 IfxIom_LamMonitorSource_exoredFpcMonitor = 1 /**< \brief Monitor signal is EXORed with FPC reference channel. */
317 } IfxIom_LamMonitorSource;
318
319 /** \brief LAMCFG[lamId].RCS, Specifies which FPC/mux block reference output signal is to be used for LAM block
320 */
321 typedef enum
322 {
323 IfxIom_LamReferenceInputChannel_0 = 0, /**< \brief Specifies 0 FPC/mux block reference output signal is to be used for LAM block */
324 IfxIom_LamReferenceInputChannel_1, /**< \brief Specifies 1 FPC/mux block reference output signal is to be used for LAM block */
325 IfxIom_LamReferenceInputChannel_2, /**< \brief Specifies 2 FPC/mux block reference output signal is to be used for LAM block */
326 IfxIom_LamReferenceInputChannel_3, /**< \brief Specifies 3 FPC/mux block reference output signal is to be used for LAM block */
327 IfxIom_LamReferenceInputChannel_4, /**< \brief Specifies 4 FPC/mux block reference output signal is to be used for LAM block */
328 IfxIom_LamReferenceInputChannel_5, /**< \brief Specifies 5 FPC/mux block reference output signal is to be used for LAM block */
329 IfxIom_LamReferenceInputChannel_6, /**< \brief Specifies 6 FPC/mux block reference output signal is to be used for LAM block */
330 IfxIom_LamReferenceInputChannel_7, /**< \brief Specifies 7 FPC/mux block reference output signal is to be used for LAM block */
331 IfxIom_LamReferenceInputChannel_8, /**< \brief Specifies 8 FPC/mux block reference output signal is to be used for LAM block */
332 IfxIom_LamReferenceInputChannel_9, /**< \brief Specifies 9 FPC/mux block reference output signal is to be used for LAM block */
333 IfxIom_LamReferenceInputChannel_10, /**< \brief Specifies 10 FPC/mux block reference output signal is to be used for LAM block */
334 IfxIom_LamReferenceInputChannel_11, /**< \brief Specifies 11 FPC/mux block reference output signal is to be used for LAM block */
335 IfxIom_LamReferenceInputChannel_12, /**< \brief Specifies 12 FPC/mux block reference output signal is to be used for LAM block */
336 IfxIom_LamReferenceInputChannel_13, /**< \brief Specifies 13 FPC/mux block reference output signal is to be used for LAM block */
337 IfxIom_LamReferenceInputChannel_14, /**< \brief Specifies 14 FPC/mux block reference output signal is to be used for LAM block */
338 IfxIom_LamReferenceInputChannel_15 /**< \brief Specifies 15 FPC/mux block reference output signal is to be used for LAM block */
339 } IfxIom_LamReferenceInputChannel;
340
341 /** \brief LAMCFG[lamId].RMS, Specifies whether the event window generation is free-running or gated with the monitor or reference.
342 */
343 typedef enum
344 {
345 IfxIom_LamRunMode_freeRunning = 0, /**< \brief Specifies event window generation is free-running. */
346 IfxIom_LamRunMode_gated = 1 /**< \brief Specifies event window generation is gated with the monitor or
347 * reference signal. */
348 } IfxIom_LamRunMode;
349
350 /** \brief FPCCTR[channelId].ISM, Specifies the monitor signal input for Filter & Prescaler cell
351 */
352 typedef enum
353 {
354 IfxIom_MonitorSignal_portLogic = 0, /**< \brief Specifies the specific pad pins as monitor signal */
355 IfxIom_MonitorSignal_0 = 1, /**< \brief Specifies the monitor signal 0 */
356 IfxIom_MonitorSignal_1, /**< \brief Specifies the monitor signal 1 */
357 IfxIom_MonitorSignal_2 /**< \brief Specifies the monitor signal 2 */
358 } IfxIom_MonitorSignal;
359
360 /** \brief FPCCTR[channelId].ISR,Specifies the reference signal input for Filter & Prescaler cell
361 */
362 typedef enum
363 {
364 IfxIom_ReferenceSignal_portLogic = 0, /**< \brief Specifies the specific pad pins as reference signal */
365 IfxIom_ReferenceSignal_0 = 1, /**< \brief Specifies the reference signal 0 */
366 IfxIom_ReferenceSignal_1, /**< \brief Specifies the reference signal 1 */
367 IfxIom_ReferenceSignal_2, /**< \brief Specifies the reference signal 2 */
368 IfxIom_ReferenceSignal_gtmEXORCombiner = 4 /**< \brief Specifies the GTM EXOR Combiner pins */
369 } IfxIom_ReferenceSignal;
370
371 /** \} */
372
373 /** \addtogroup IfxLld_Iom_Std_Utility
374 * \{ */
375
376 /******************************************************************************/
377 /*-------------------------Inline Function Prototypes-------------------------*/
378 /******************************************************************************/
379
380 /** \brief Disables the IOM module .
381 * \param iom Pointer to IOM module registers
382 * \return None
383 */
384 IFX_INLINE void IfxIom_disableModule(Ifx_IOM *iom);
385
386 /** \brief Enable the IOM module control.
387 * \param iom Pointer to IOM module registers
388 * \param clockDivider IOM clock divider. Set to 1 for max clock.
389 * \return None
390 */
391 IFX_INLINE void IfxIom_enableModule(Ifx_IOM *iom, uint8 clockDivider);
392
393 /** \brief Enable/disable the sensitivity of the module to sleep signal
394 * \param iom Pointer to IOM registers
395 * \param mode Mode selection (enable/disable)
396 * \return None
397 */
398 IFX_INLINE void IfxIom_setSleepMode(Ifx_IOM *iom, IfxIom_SleepMode mode);
399
400 /** \brief Enable/disable the sensitivity of the module to sleep signal
401 * \param iom Pointer to IOM registers
402 * \param channelId FPC channel ID
403 * \param value Prescaler Value
404 * \return None
405 */
406 IFX_INLINE void IfxIom_setTimerValueOfFilterAndPrescalerCell(Ifx_IOM *iom, IfxIom_FpcChannelId channelId, uint16 value);
407
408 /******************************************************************************/
409 /*-------------------------Global Function Prototypes-------------------------*/
410 /******************************************************************************/
411
412 /** \brief Return the frequency used for the filter and timers clock
413 * \param iom Pointer to IOM module registers
414 */
415 IFX_EXTERN float32 IfxIom_getFrequency(Ifx_IOM *iom);
416
417 /** \brief Reset the IOM module
418 * \param iom Pointer to IOM module registers
419 * \return None
420 */
421 IFX_EXTERN void IfxIom_resetModule(Ifx_IOM *iom);
422
423 /** \} */
424
425 /** \addtogroup IfxLld_Iom_Std_Module_Obsolete
426 * \{ */
427
428 /******************************************************************************/
429 /*-------------------------Inline Function Prototypes-------------------------*/
430 /******************************************************************************/
431
432 /**
433 * \param iom pointer to IOM register space
434 * \return the last generated event
435 */
436 IFX_INLINE uint16 IfxIom_eventTriggerHistory(Ifx_IOM *iom);
437
438 /** \} */
439
440 /******************************************************************************/
441 /*---------------------Inline Function Implementations------------------------*/
442 /******************************************************************************/
443
444 IFX_INLINE void IfxIom_disableModule(Ifx_IOM *iom)
445 {
446 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
447
448 IfxScuWdt_clearCpuEndinit(psw);
449 iom->CLC.B.DISR = 1;
450 IfxScuWdt_setCpuEndinit(psw);
451 }
452
453
454 IFX_INLINE void IfxIom_enableModule(Ifx_IOM *iom, uint8 clockDivider)
455 {
456 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
457
458 IfxScuWdt_clearCpuEndinit(psw);
459 iom->CLC.B.RMC = clockDivider;
460 iom->CLC.B.DISR = 0;
461 IfxScuWdt_setCpuEndinit(psw);
462 }
463
464
465 IFX_INLINE uint16 IfxIom_eventTriggerHistory(Ifx_IOM *iom)
466 {
467 uint16 tempECMETH0;
468
469 tempECMETH0 = (uint16)iom->ECMETH0.U;
470 return tempECMETH0;
471 }
472
473
474 IFX_INLINE void IfxIom_setSleepMode(Ifx_IOM *iom, IfxIom_SleepMode mode)
475 {
476 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
477 IfxScuWdt_clearCpuEndinit(passwd);
478 iom->CLC.B.EDIS = mode;
479 IfxScuWdt_setCpuEndinit(passwd);
480 }
481
482
483 IFX_INLINE void IfxIom_setTimerValueOfFilterAndPrescalerCell(Ifx_IOM *iom, IfxIom_FpcChannelId channelId, uint16 value)
484 {
485 iom->FPCTIM[channelId].B.TIM = value;
486 }
487
488
489 #endif /* IFXIOM_H */
IfxIom_LamEventWindowClearEvent_none
Neither edge used to clear event windowcounter.
Definition: IfxIom.h:94
IfxIom_LamId_7
Specifies the LAM Id7.
Definition: IfxIom.h:145
IfxIom_LamFilterMode_immediateDebounceBothEdge
Immediate Debounce Filter Mode on both edges.
Definition: IfxIom.h:124
IfxIom_FpcChannelId_2
Specifies the FPC channel 2.
Definition: IfxIom.h:273
IfxIom_LamReferenceInputChannel_3
Specifies 3 FPC/mux block reference output signal is to be used for LAM block.
Definition: IfxIom.h:326
IfxIom_EdgeClearType_rising
Specifies rising edge to be cleared.
Definition: IfxIom.h:173
IfxIom_LamReferenceInputChannel_5
Specifies 5 FPC/mux block reference output signal is to be used for LAM block.
Definition: IfxIom.h:328
IfxIom_LamId_0
Specifies the LAM Id0.
Definition: IfxIom.h:138
IfxIom_LamReferenceInputChannel_0
Specifies 0 FPC/mux block reference output signal is to be used for LAM block.
Definition: IfxIom.h:323
IfxIom_FilterMode_fallingEdgeImmediateDebounce
Specifies Falling Edge Immediate Debounce filter mode.
Definition: IfxIom.h:260
IfxIom_LamMonitorInputChannel_7
Specifies 7 FPC/mux block monitor output signal is to be used for LAM block.
Definition: IfxIom.h:300
IfxIom_LamFilterMode
IfxIom_LamFilterMode
FPC filer mode IOM_FPCCTRk.MOD, with additional definition for noFilter.
Definition: IfxIom.h:121
IfxIom_EventActiveEdgeSelection_neitherGatePositiveClear
neither edge used to gate event generation and positive edge used to clear event windowcounter.
Definition: IfxIom.h:183
IfxIom_EventCounterThreshold_6
Specifies threshold count value 6.
Definition: IfxIom.h:233
IfxIom_LamMonitorInputChannel_5
Specifies 5 FPC/mux block monitor output signal is to be used for LAM block.
Definition: IfxIom.h:298
IfxIom_EventCounterThreshold_8
Specifies threshold count value 8.
Definition: IfxIom.h:235
IfxIom_LamId_14
Specifies the LAM Id14.
Definition: IfxIom.h:152
IfxIom_setSleepMode
IFX_INLINE void IfxIom_setSleepMode(Ifx_IOM *iom, IfxIom_SleepMode mode)
Enable/disable the sensitivity of the module to sleep signal.
Definition: IfxIom.h:474
IfxIom_EventCounterChannel_1
channel 1 event output to be routed to event counter
Definition: IfxIom.h:205
IfxIom_EventCounterChannel_10
channel 10 event output to be routed to event counter
Definition: IfxIom.h:214
IfxIom_LamFilterMode_delayDebounceBothEdge
Delayed Debounce Filter Mode on both edges.
Definition: IfxIom.h:123
IfxIom_MonitorSignal_1
Specifies the monitor signal 1.
Definition: IfxIom.h:356
IfxIom_LamRunMode_freeRunning
Specifies event window generation is free-running.
Definition: IfxIom.h:345
IfxIom_LamMonitorInputChannel_15
Specifies 15 FPC/mux block monitor output signal is to be used for LAM block.
Definition: IfxIom.h:308
IfxIom_LamMonitorInputChannel_2
Specifies 2 FPC/mux block monitor output signal is to be used for LAM block.
Definition: IfxIom.h:295
IfxIom_LamRunMode_gated
Specifies event window generation is gated with the monitor or reference signal.
Definition: IfxIom.h:346
IfxIom_EventCounterThreshold_13
Specifies threshold count value 13.
Definition: IfxIom.h:240
IfxIom_LamReferenceInputChannel_10
Specifies 10 FPC/mux block reference output signal is to be used for LAM block.
Definition: IfxIom.h:333
IfxIom_EventCounterThreshold_14
Specifies threshold count value 14.
Definition: IfxIom.h:241
IfxIom_FpcChannelId_13
Specifies the FPC channel 13.
Definition: IfxIom.h:284
IfxIom_EventCounterThreshold_10
Specifies threshold count value 10.
Definition: IfxIom.h:237
IfxIom_FpcChannelId_5
Specifies the FPC channel 5.
Definition: IfxIom.h:276
IfxIom_EventSource_monitor
Specifies the event window generation is from the monitor signal.
Definition: IfxIom.h:250
IfxIom_EventCounterChannel_5
channel 5 event output to be routed to event counter
Definition: IfxIom.h:209
IfxIom_LamMonitorInputChannel_8
Specifies 8 FPC/mux block monitor output signal is to be used for LAM block.
Definition: IfxIom.h:301
IfxIom_LamMonitorInputChannel_4
Specifies 4 FPC/mux block monitor output signal is to be used for LAM block.
Definition: IfxIom.h:297
IfxIom_LamMonitorInputChannel_14
Specifies 14 FPC/mux block monitor output signal is to be used for LAM block.
Definition: IfxIom.h:307
IfxIom_LamFilterMode_delayDebounceRisingEdgeImmediateDebounceFallingEdge
Rising edge: Delayed Debounce Filter Mode, falling edge: Immediate Debounce Filter Mode...
Definition: IfxIom.h:127
IfxIom_FilterMode_delayedDebounce
Specifies Delayed Debounce filter mode.
Definition: IfxIom.h:257
IfxIom_LamMonitorInputChannel_10
Specifies 10 FPC/mux block monitor output signal is to be used for LAM block.
Definition: IfxIom.h:303
IfxIom_LamReferenceInputChannel_13
Specifies 13 FPC/mux block reference output signal is to be used for LAM block.
Definition: IfxIom.h:336
IfxIom_MonitorSignal_portLogic
Specifies the specific pad pins as monitor signal.
Definition: IfxIom.h:354
IfxIom_LamEventWindowClearEvent_fallingEdge
Negative edge used to clear event windowcounter.
Definition: IfxIom.h:96
IfxIom_LamId_11
Specifies the LAM Id11.
Definition: IfxIom.h:149
float32
float float32
Definition: Platform_Types.h:170
IfxIom_LamFilterMode_immediateDebounceRisingEdgeDelayDebounceFallingEdge
Immediate Debounce Filter Mode, falling edge: Delayed Debounce Filter Mode.
Definition: IfxIom.h:128
IfxIom_LamId_15
Specifies the LAM Id15.
Definition: IfxIom.h:153
IfxIom_LamEventWindowClearEvent_risingEdge
Positive edge used to clear event windowcounter.
Definition: IfxIom.h:95
IfxIom_LamRunMode
IfxIom_LamRunMode
LAMCFG[lamId].RMS, Specifies whether the event window generation is free-running or gated with the mo...
Definition: IfxIom.h:343
IfxIom_LamEventWindowControlSource_ref
Event window generation is determined from the reference signal.
Definition: IfxIom.h:105
IfxIom_LamId_4
Specifies the LAM Id4.
Definition: IfxIom.h:142
IfxIom_ReferenceSignal_2
Specifies the reference signal 2.
Definition: IfxIom.h:367
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxIom_EventCounterChannel
IfxIom_EventCounterChannel
ECMCCFG.SELCx(x= 0,1,2,3), Specifies which channel event output is to be routed to counterCn...
Definition: IfxIom.h:202
IfxIom_LamMonitorInputChannel
IfxIom_LamMonitorInputChannel
LAMCFG[lamId].MCS, Specifies which FPC/mux block monitor output signal is to be used for LAM block...
Definition: IfxIom.h:291
IfxIom_EventActiveEdgeSelection_neitherGateEitherClear
neither edge used to gate event generation and either edge used to clear event windowcounter.
Definition: IfxIom.h:185
IfxIom_EdgeClearType_risingFalling
Specifies both rising falling edge to be cleared.
Definition: IfxIom.h:175
IfxIom_LamReferenceInputChannel_12
Specifies 12 FPC/mux block reference output signal is to be used for LAM block.
Definition: IfxIom.h:335
IfxIom_SleepMode_enable
Enables sleep mode.
Definition: IfxIom.h:161
IfxCpu_Intrinsics.h
IfxIom_MonitorSignal_0
Specifies the monitor signal 0.
Definition: IfxIom.h:355
IfxIom_enableModule
IFX_INLINE void IfxIom_enableModule(Ifx_IOM *iom, uint8 clockDivider)
Enable the IOM module control.
Definition: IfxIom.h:454
IfxIom_FilterMode_immediateDebounce
Specifies Immediate Debounce filter mode.
Definition: IfxIom.h:258
IfxIom_LamEventWindowRunControl_gated
Event window generation is gated with the monitor or reference signal.
Definition: IfxIom.h:115
IfxIom_EventActiveEdgeSelection_positiveGateNegativeClear
positive edge used to gate event generation and negative edge used to clear event windowcounter...
Definition: IfxIom.h:188
IfxIom_EdgeClearType
IfxIom_EdgeClearType
Specifies the edge type which need to be cleared.
Definition: IfxIom.h:171
IfxIom_LamReferenceInputChannel_11
Specifies 11 FPC/mux block reference output signal is to be used for LAM block.
Definition: IfxIom.h:334
IfxIom_LamEventWindowControlSource
IfxIom_LamEventWindowControlSource
Timer control source configuration IOM_LAMCFGm.EWS.
Definition: IfxIom.h:103
IfxIom_FpcChannelId_4
Specifies the FPC channel 4.
Definition: IfxIom.h:275
IfxIom_LamEventWindowRunControl
IfxIom_LamEventWindowRunControl
Timer run configuration IOM_LAMCFGm.RMS.
Definition: IfxIom.h:112
IfxIom_EventActiveEdgeSelection_eitherGateNeitherClear
either edge used to gate event generation and neither edge used to clear event windowcounter.
Definition: IfxIom.h:194
IfxIom_EventActiveEdgeSelection_eitherGateEitherClear
either edge used to gate event generation and either edge used to clear event windowcounter.
Definition: IfxIom.h:197
IfxIom_LamEventTrigger_fallingEdge
Negative edge used to gate event generation.
Definition: IfxIom.h:85
IfxIom_LamEventSource_monXorRef
Monitor signal is EXOR&#39;d with FPCrch.
Definition: IfxIom.h:75
IfxScuWdt.h
SCU basic functionality.
IfxIom_FpcChannelId_3
Specifies the FPC channel 3.
Definition: IfxIom.h:274
IfxIom_EventCounterChannel_11
channel 11 event output to be routed to event counter
Definition: IfxIom.h:215
IfxIom_EventActiveEdgeSelection_eitherGateNegativeClear
either edge used to gate event generation and negative edge used to clear event windowcounter.
Definition: IfxIom.h:196
IfxIom_setTimerValueOfFilterAndPrescalerCell
IFX_INLINE void IfxIom_setTimerValueOfFilterAndPrescalerCell(Ifx_IOM *iom, IfxIom_FpcChannelId channelId, uint16 value)
Enable/disable the sensitivity of the module to sleep signal.
Definition: IfxIom.h:483
IfxIom_EventActiveEdgeSelection_eitherGatePositiveClear
either edge used to gate event generation and positive edge used to clear event windowcounter.
Definition: IfxIom.h:195
IfxIom_EventCounterThreshold_15
Specifies threshold count value 15.
Definition: IfxIom.h:242
IfxIom_EventCounterThreshold
IfxIom_EventCounterThreshold
ECMCCFG.THRCx(x= 0,1,2,3), Specifies the threshold count value. Upon the counter meeting the threshol...
Definition: IfxIom.h:224
IfxIom_EventActiveEdgeSelection_negativeGateNeitherClear
negative edge used to gate event generation and neither edge used to clear event windowcounter.
Definition: IfxIom.h:190
IfxIom_LamFilterMode_immediateDebounceRisingEdge
Rising edge: Immediate Debounce Filter Mode, falling edge: no filtering.
Definition: IfxIom.h:125
IfxIom_FpcChannelId_8
Specifies the FPC channel 8.
Definition: IfxIom.h:279
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxIom_EventCounterChannel_6
channel 6 event output to be routed to event counter
Definition: IfxIom.h:210
IfxIom_EventCounterChannel_0
channel 0 event output to be routed to event counter
Definition: IfxIom.h:204
IfxIom_SleepMode_disable
Disables sleep mode.
Definition: IfxIom.h:162
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxIom_ReferenceSignal_1
Specifies the reference signal 1.
Definition: IfxIom.h:366
IfxIom_LamId_3
Specifies the LAM Id3.
Definition: IfxIom.h:141
IfxIom_EventCounterThreshold_2
Specifies threshold count value 2.
Definition: IfxIom.h:229
IfxIom_EventCounterThreshold_1
Specifies threshold count value 1.
Definition: IfxIom.h:228
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxIom_LamMonitorSource_directFpcMonitor
Monitor signal is sourced directly from FPC monitor channel.
Definition: IfxIom.h:315
IfxIom_LamId_2
Specifies the LAM Id2.
Definition: IfxIom.h:140
IfxIom_LamEventWindowControlSource_mon
Event window generation is determined from the monitor signal.
Definition: IfxIom.h:106
IfxIom_FilterMode_fallingEdgeDelayedRisingEdgeImmediateDebounce
Specifies FallingEdge Delayed RisingEdge Immediate Debounce filter mode.
Definition: IfxIom.h:262
IfxIom_cfg.h
IOM on-chip implementation data.
IfxIom_getFrequency
IFX_EXTERN float32 IfxIom_getFrequency(Ifx_IOM *iom)
Return the frequency used for the filter and timers clock.
Definition: IfxIom.c:53
IfxIom_eventTriggerHistory
IFX_INLINE uint16 IfxIom_eventTriggerHistory(Ifx_IOM *iom)
Definition: IfxIom.h:465
IfxIom_LamEventWindowClearEvent_anyEdge
Either edge used to clear event windowcounter.
Definition: IfxIom.h:97
IfxIom_EventActiveEdgeSelection
IfxIom_EventActiveEdgeSelection
LAMCFG[lamId].EDS, Specifies which active edges of the monitor and reference signals are used for the...
Definition: IfxIom.h:180
IfxIom_LamReferenceInputChannel_15
Specifies 15 FPC/mux block reference output signal is to be used for LAM block.
Definition: IfxIom.h:338
IfxIom_MonitorSignal_2
Specifies the monitor signal 2.
Definition: IfxIom.h:357
IfxIom_LamEventSource
IfxIom_LamEventSource
Event source configuration IOM_LAMCFGm.MOS.
Definition: IfxIom.h:72
IfxIom_ReferenceSignal_0
Specifies the reference signal 0.
Definition: IfxIom.h:365
IfxIom_EdgeClearType_falling
Specifies falling edge to be cleared.
Definition: IfxIom.h:174
IfxIom_EventCounterChannel_2
channel 2 event output to be routed to event counter
Definition: IfxIom.h:206
IfxIom_EventActiveEdgeSelection_negativeGateEitherClear
negative edge used to gate event generation and either edge used to clear event windowcounter.
Definition: IfxIom.h:193
IfxIom_LamReferenceInputChannel_7
Specifies 7 FPC/mux block reference output signal is to be used for LAM block.
Definition: IfxIom.h:330
IfxIom_EventCounterChannel_13
channel 13 event output to be routed to event counter
Definition: IfxIom.h:217
IfxIom_LamFilterMode_noFilter
No filter (value used for software only )
Definition: IfxIom.h:131
IfxIom_EventActiveEdgeSelection_negativeGateNegativeClear
negative edge used to gate event generation and negative edge used to clear event windowcounter...
Definition: IfxIom.h:192
IfxIom_FpcChannelId_0
Specifies the FPC channel 0.
Definition: IfxIom.h:271
IfxIom_MonitorSignal
IfxIom_MonitorSignal
FPCCTR[channelId].ISM, Specifies the monitor signal input for Filter & Prescaler cell.
Definition: IfxIom.h:352
IfxIom_LamReferenceInputChannel_14
Specifies 14 FPC/mux block reference output signal is to be used for LAM block.
Definition: IfxIom.h:337
IfxIom_LamMonitorInputChannel_9
Specifies 9 FPC/mux block monitor output signal is to be used for LAM block.
Definition: IfxIom.h:302
IfxIom_EventCounterChannel_15
channel 15 event output to be routed to event counter
Definition: IfxIom.h:219
IfxIom_EventCounterThreshold_9
Specifies threshold count value 9.
Definition: IfxIom.h:236
IfxIom_EventCounterChannel_3
channel 3 event output to be routed to event counter
Definition: IfxIom.h:207
IfxIom_LamEventTrigger
IfxIom_LamEventTrigger
Event trigger configuration IOM_LAMCFGm.EDS upper two bits.
Definition: IfxIom.h:81
IfxIom_LamMonitorInputChannel_13
Specifies 13 FPC/mux block monitor output signal is to be used for LAM block.
Definition: IfxIom.h:306
IfxIom_FpcChannelId_11
Specifies the FPC channel 11.
Definition: IfxIom.h:282
IfxIom_LamEventTrigger_none
Neither edge used to gate event generation.
Definition: IfxIom.h:83
IfxIom_LamMonitorSource_exoredFpcMonitor
Monitor signal is EXORed with FPC reference channel.
Definition: IfxIom.h:316
IfxIom_EventCounterChannel_14
channel 14 event output to be routed to event counter
Definition: IfxIom.h:218
IfxIom_EventCounterThreshold_disable
Specifies counter event output set to inactive.
Definition: IfxIom.h:226
IfxIom_LamId
IfxIom_LamId
Specifies the Logic Module Analyser Module Number.
Definition: IfxIom.h:136
IfxIom_LamEventWindowRunControl_freeRunning
Event window generation is free-running.
Definition: IfxIom.h:114
IfxIom_EventCounterThreshold_4
Specifies threshold count value 4.
Definition: IfxIom.h:231
IfxIom_FpcChannelId_7
Specifies the FPC channel 7.
Definition: IfxIom.h:278
IfxIom_disableModule
IFX_INLINE void IfxIom_disableModule(Ifx_IOM *iom)
Disables the IOM module .
Definition: IfxIom.h:444
IfxIom_EventCounterThreshold_7
Specifies threshold count value 7.
Definition: IfxIom.h:234
IfxIom_FilterMode_risingEdgeImmediateDebounce
Specifies Rising Edge Immediate Debounce filter mode.
Definition: IfxIom.h:259
IfxIom_FpcChannelId_1
Specifies the FPC channel 1.
Definition: IfxIom.h:272
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxIom_resetModule
IFX_EXTERN void IfxIom_resetModule(Ifx_IOM *iom)
Reset the IOM module.
Definition: IfxIom.c:66
IfxIom_EventSource_reference
Specifies the event window generation is from the reference signal.
Definition: IfxIom.h:249
IfxIom_EventCounterChannel_7
channel 7 event output to be routed to event counter
Definition: IfxIom.h:211
IfxIom_LamMonitorInputChannel_3
Specifies 3 FPC/mux block monitor output signal is to be used for LAM block.
Definition: IfxIom.h:296
IfxIom_EventCounterChannel_4
channel 4 event output to be routed to event counter
Definition: IfxIom.h:208
IfxIom_EventActiveEdgeSelection_positiveGateNeitherClear
positive edge used to gate event generation and neither edge used to clear event windowcounter.
Definition: IfxIom.h:186
IfxIom_LamId_9
Specifies the LAM Id9.
Definition: IfxIom.h:147
IfxIom_LamMonitorInputChannel_6
Specifies 6 FPC/mux block monitor output signal is to be used for LAM block.
Definition: IfxIom.h:299
IfxIom_FilterMode
IfxIom_FilterMode
FPCCTR[channelId].MOD, Specifies the Filter & Prescaler Cell mode.
Definition: IfxIom.h:255
IfxIom_LamId_6
Specifies the LAM Id6.
Definition: IfxIom.h:144
IfxIom_ReferenceSignal_gtmEXORCombiner
Specifies the GTM EXOR Combiner pins.
Definition: IfxIom.h:368
IfxIom_EventSource
IfxIom_EventSource
LAMCFG[lamId].EWS, Specifies whether the event window generation is from the monitor or reference sig...
Definition: IfxIom.h:247
IfxIom_LamReferenceInputChannel_4
Specifies 4 FPC/mux block reference output signal is to be used for LAM block.
Definition: IfxIom.h:327
IfxIom_EventActiveEdgeSelection_neitherGateNegativeClear
neither edge used to gate event generation and negative edge used to clear event windowcounter.
Definition: IfxIom.h:184
IfxIom_LamFilterMode_immediateDebounceFallingEdge
Rising edge: no filtering, falling edge: Immediate Debounce Filter Mode.
Definition: IfxIom.h:126
IfxIom_EventCounterThreshold_5
Specifies threshold count value 5.
Definition: IfxIom.h:232
IfxIom_LamFilterMode_prescalerOnFallingEdge
Prescaler Mode (triggered on falling edge)
Definition: IfxIom.h:130
IfxIom_FpcChannelId_10
Specifies the FPC channel 10.
Definition: IfxIom.h:281
IfxIom_FpcChannelId_14
Specifies the FPC channel 14.
Definition: IfxIom.h:285
IfxIom_LamReferenceInputChannel
IfxIom_LamReferenceInputChannel
LAMCFG[lamId].RCS, Specifies which FPC/mux block reference output signal is to be used for LAM block...
Definition: IfxIom.h:321
IfxIom_LamId_13
Specifies the LAM Id13.
Definition: IfxIom.h:151
IfxIom_LamMonitorInputChannel_1
Specifies 1 FPC/mux block monitor output signal is to be used for LAM block.
Definition: IfxIom.h:294
IfxIom_LamEventTrigger_risingEdge
Positive edge used to gate event generation.
Definition: IfxIom.h:84
IfxIom_LamEventSource_mon
Monitor signal is sourced directly from FPCmch.
Definition: IfxIom.h:74
IfxIom_LamMonitorSource
IfxIom_LamMonitorSource
LAMCFG[lamId].MOS, Specifies whether the monitor signal from the FPC monitor channel is sourced direc...
Definition: IfxIom.h:313
IfxIom_LamReferenceInputChannel_6
Specifies 6 FPC/mux block reference output signal is to be used for LAM block.
Definition: IfxIom.h:329
IfxIom_EventCounterThreshold_11
Specifies threshold count value 11.
Definition: IfxIom.h:238
IfxIom_FilterMode_FallingEdgePrescaler
Specifies FallingEdge Prescaler filter mode.
Definition: IfxIom.h:264
IfxIom_EventCounterChannel_12
channel 12 event output to be routed to event counter
Definition: IfxIom.h:216
IfxIom_LamEventTrigger_anyEdge
Either edge used to gate event generation.
Definition: IfxIom.h:86
IfxIom_FilterMode_risingEdgePrescaler
Specifies RisingEdge Prescaler filter mode.
Definition: IfxIom.h:263
IfxIom_LamId_8
Specifies the LAM Id8.
Definition: IfxIom.h:146
IfxIom_EventCounterChannel_8
channel 8 event output to be routed to event counter
Definition: IfxIom.h:212
IfxIom_LamMonitorInputChannel_12
Specifies 12 FPC/mux block monitor output signal is to be used for LAM block.
Definition: IfxIom.h:305
IfxIom_LamEventWindowClearEvent
IfxIom_LamEventWindowClearEvent
Timer clear event configuration IOM_LAMCFGm.EDS upper lower bits.
Definition: IfxIom.h:92
IfxIom_FpcChannelId
IfxIom_FpcChannelId
Specifies the number of Filter & Prescaler Cell channel Id.
Definition: IfxIom.h:269
IfxIom_LamMonitorInputChannel_11
Specifies 11 FPC/mux block monitor output signal is to be used for LAM block.
Definition: IfxIom.h:304
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxIom_LamReferenceInputChannel_1
Specifies 1 FPC/mux block reference output signal is to be used for LAM block.
Definition: IfxIom.h:324
IfxIom_LamReferenceInputChannel_2
Specifies 2 FPC/mux block reference output signal is to be used for LAM block.
Definition: IfxIom.h:325
IfxIom_EventActiveEdgeSelection_negativeGatePositiveClear
negative edge used to gate event generation and positive edge used to clear event windowcounter...
Definition: IfxIom.h:191
IfxIom_EventActiveEdgeSelection_neitherGateNeitherClear
neither edge used to gate event generation and neither edge used to clear event windowcounter.
Definition: IfxIom.h:182
IfxIom_LamId_12
Specifies the LAM Id12.
Definition: IfxIom.h:150
IfxIom_EventActiveEdgeSelection_positiveGateEitherClear
positive edge used to gate event generation and negative edge used to clear event windowcounter...
Definition: IfxIom.h:189
IfxIom_EventCounterChannel_9
channel 9 event output to be routed to event counter
Definition: IfxIom.h:213
IfxIom_FpcChannelId_12
Specifies the FPC channel 12.
Definition: IfxIom.h:283
IfxIom_LamFilterMode_prescalerOnRisingEdge
Prescaler Mode (triggered on rising edge)
Definition: IfxIom.h:129
IfxIom_LamReferenceInputChannel_8
Specifies 8 FPC/mux block reference output signal is to be used for LAM block.
Definition: IfxIom.h:331
IfxIom_FpcChannelId_9
Specifies the FPC channel 9.
Definition: IfxIom.h:280
IfxIom_LamId_5
Specifies the LAM Id5.
Definition: IfxIom.h:143
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxIom_LamId_1
Specifies the LAM Id1.
Definition: IfxIom.h:139
IfxIom_LamReferenceInputChannel_9
Specifies 9 FPC/mux block reference output signal is to be used for LAM block.
Definition: IfxIom.h:332
IfxIom_EventActiveEdgeSelection_positiveGatePositiveClear
positive edge used to gate event generation and positive edge used to clear event windowcounter...
Definition: IfxIom.h:187
IfxIom_LamId_10
Specifies the LAM Id10.
Definition: IfxIom.h:148
IfxIom_FpcChannelId_15
Specifies the FPC channel 15.
Definition: IfxIom.h:286
IfxIom_ReferenceSignal_portLogic
Specifies the specific pad pins as reference signal.
Definition: IfxIom.h:364
IfxIom_FpcChannelId_6
Specifies the FPC channel 6.
Definition: IfxIom.h:277
IfxIom_LamMonitorInputChannel_0
Specifies 0 FPC/mux block monitor output signal is to be used for LAM block.
Definition: IfxIom.h:293
IfxIom_SleepMode
IfxIom_SleepMode
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_IOM.CLC.B.EDIS.
Definition: IfxIom.h:159
IfxIom_FilterMode_risingEdgeDelayedFallingEdgeImmediateDebounce
Specifies RisingEdge Delayed FallingEdge Immediate Debounce filter mode.
Definition: IfxIom.h:261
IfxIom_EventCounterThreshold_3
Specifies threshold count value 3.
Definition: IfxIom.h:230
IfxIom_EventCounterThreshold_12
Specifies threshold count value 12.
Definition: IfxIom.h:239
IfxIom_ReferenceSignal
IfxIom_ReferenceSignal
FPCCTR[channelId].ISR,Specifies the reference signal input for Filter & Prescaler cell...
Definition: IfxIom.h:362


iLLD_TC38A: IfxIom_Driver.c Source File

  • Iom
  • Driver
IfxIom_Driver.c
Go to the documentation of this file.
1 /**
2 * \file IfxIom_Driver.c
3 * \brief IOM DRIVER details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxIom_Driver.h"
47 #include "IfxIom_bf.h"
48 #include "_Utilities/Ifx_Assert.h"
49
50 /******************************************************************************/
51 /*----------------------------------Macros------------------------------------*/
52 /******************************************************************************/
53
54 #define IFXIOM_DRIVER_LAM_GET_REF_INPUT_SIGNAL(refInput) ((IfxIom_RefInputSignal)((refInput >> 8) & 0xFF))
55
56 #define IFXIOM_DRIVER_LAM_GET_MON_INPUT_SIGNAL(monInput) ((IfxIom_MonInputSignal)((monInput >> 8) & 0xFF))
57
58 #define IFXIOM_DRIVER_LAM_GET_REF_INPUT_INDEX(refInput) ((refInput >> 0) & 0xFF)
59
60 #define IFXIOM_DRIVER_LAM_GET_MON_INPUT_INDEX(monInput) ((monInput >> 0) & 0xFF)
61
62 /******************************************************************************/
63 /*-------------------------Function Implementations---------------------------*/
64 /******************************************************************************/
65
66 void IfxIom_Driver_clearAllGlitch(IfxIom_Driver *driver)
67 {
68 Ifx_IOM *module = driver->module;
69 module->FPCESR.U = 0xFFFFFFFF;
70 }
71
72
73 void IfxIom_Driver_clearHistory(IfxIom_Driver *driver)
74 {
75 Ifx_IOM *module = driver->module;
76 module->ECMETH0.U = 0;
77 }
78
79
80 void IfxIom_Driver_clearLamMonGlitch(IfxIom_Driver_Lam *driver)
81 {
82 Ifx_IOM *module = driver->iomDriver->module;
83
84 if (driver->monInput == IfxIom_MonInputSignal_p)
85 {
86 module->FPCESR.U = 0x10001 << driver->monIndex;
87 }
88 }
89
90
91 void IfxIom_Driver_clearLamRefGlitch(IfxIom_Driver_Lam *driver)
92 {
93 Ifx_IOM *module = driver->iomDriver->module;
94
95 if (driver->refInput == IfxIom_RefInputSignal_p)
96 {
97 module->FPCESR.U = 0x10001 << driver->refIndex;
98 }
99 }
100
101
102 uint32 IfxIom_Driver_disableEvents(IfxIom_Driver *driver)
103 {
104 uint32 value;
105 value = driver->module->ECMSELR.U;
106 driver->module->ECMSELR.U = 0;
107 return value;
108 }
109
110
111 void IfxIom_Driver_disableLamEvent(IfxIom_Driver_Lam *driver)
112 {
113 IfxIom_Driver *iomDriver = driver->iomDriver;
114 Ifx_IOM *module = iomDriver->module;
115
116 /* Configure the ECM */
117 if (driver->systemEventTriggerThreshold == 1)
118 {
119 module->ECMSELR.U &= ~(1 << (driver->channel + IFX_IOM_ECMSELR_CES0_OFF));
120 }
121 else if (driver->systemEventTriggerThreshold >= 2)
122 {
123 module->ECMSELR.U &= ~(1 << (driver->accumulatedCounterIndex + IFX_IOM_ECMSELR_CTS0_OFF));
124 }
125 else
126 {
127 /* No event generated */
128 }
129 }
130
131
132 void IfxIom_Driver_enableLamEvent(IfxIom_Driver_Lam *driver)
133 {
134 IfxIom_Driver *iomDriver = driver->iomDriver;
135 Ifx_IOM *module = iomDriver->module;
136
137 /* Configure the ECM */
138 if (driver->systemEventTriggerThreshold == 1)
139 {
140 module->ECMSELR.U |= (1 << (driver->channel + IFX_IOM_ECMSELR_CES0_OFF));
141 }
142 else if (driver->systemEventTriggerThreshold >= 2)
143 {
144 module->ECMSELR.U |= (1 << (driver->accumulatedCounterIndex + IFX_IOM_ECMSELR_CTS0_OFF));
145 }
146 else
147 {
148 /* No event generated */
149 }
150 }
151
152
153 void IfxIom_Driver_getHistory(IfxIom_Driver *driver, uint16 *a, uint16 *b, uint16 *c, uint16 *d)
154 {
155 Ifx_IOM *module = driver->module;
156 uint32 value;
157
158 value = module->ECMETH0.U;
159 *a = value & 0xFFFF;
160 *b = value >> 16;
161
162 value = module->ECMETH1.U;
163 *c = value & 0xFFFF;
164 *d = value >> 16;
165 }
166
167
168 boolean IfxIom_Driver_init(IfxIom_Driver *driver, IfxIom_Driver_Config *config)
169 {
170 driver->module = config->module;
171 driver->accumulatedEventUsedMask = 0;
172 driver->lamUsedMask = 0;
173 return TRUE;
174 }
175
176
177 void IfxIom_Driver_initConfig(IfxIom_Driver_Config *config, Ifx_IOM *module)
178 {
179 config->module = module;
180 }
181
182
183 boolean IfxIom_Driver_initLam(IfxIom_Driver_Lam *driver, IfxIom_Driver_LamConfig *config)
184 {
185 boolean result = TRUE;
186 IfxIom_Driver *iomDriver = config->iomDriver;
187 Ifx_IOM *module = iomDriver->module;
188 float32 fiom;
189 fiom = IfxIom_getFrequency(module);
190
191 /* Check parameter ranges */
192 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (config->systemEventTriggerThreshold & (~IFX_IOM_ECMCCFG_THRC0_MSK)) == 0);
193
194 driver->accumulatedCounterIndex = -1;
195 driver->channel = config->channel;
196 driver->iomDriver = iomDriver;
197
198 if (iomDriver->lamUsedMask & (1 << driver->channel))
199 {
200 /* LAM already in use */
201 result = FALSE;
202 }
203 else
204 {
205 iomDriver->lamUsedMask |= 1 << driver->channel;
206
207 {
208 /* Configure reference input signal */
209 uint8 refIndex;
210 IfxIom_RefInputSignal refInput;
211
212 refIndex = IFXIOM_DRIVER_LAM_GET_REF_INPUT_INDEX(config->ref.input);
213 refInput = IFXIOM_DRIVER_LAM_GET_REF_INPUT_SIGNAL(config->ref.input);
214 driver->refIndex = refIndex;
215 driver->refInput = refInput;
216
217 module->FPCCTR[refIndex].B.ISR = refInput;
218
219 if (refInput == IfxIom_RefInputSignal_p)
220 {
221 if (config->ref.filter.mode == IfxIom_LamFilterMode_noFilter)
222 {
223 module->FPCCTR[refIndex].B.MOD = IfxIom_LamFilterMode_immediateDebounceBothEdge;
224 module->FPCCTR[refIndex].B.CMP = 0;
225 }
226 else if ((config->ref.filter.mode == IfxIom_LamFilterMode_prescalerOnFallingEdge)
227 ||
228 (config->ref.filter.mode == IfxIom_LamFilterMode_prescalerOnRisingEdge))
229 {
230 module->FPCCTR[refIndex].B.MOD = config->ref.filter.mode;
231 module->FPCCTR[refIndex].B.CMP = config->ref.filter.prescalerFactor - 1;
232 }
233 else
234 {
235 module->FPCCTR[refIndex].B.MOD = config->ref.filter.mode;
236 module->FPCCTR[refIndex].B.CMP = fiom * config->ref.filter.risingEdgeFilterTime;
237 module->FPCCTR[refIndex].B.RTG = config->ref.filter.clearTimerOnGlitch ? 1 : 0;
238 }
239 }
240 }
241
242 {
243 /* Configure monitor input signal */
244 uint8 monIndex;
245 IfxIom_MonInputSignal monInput;
246
247 monIndex = IFXIOM_DRIVER_LAM_GET_MON_INPUT_INDEX(config->mon.input);
248 monInput = IFXIOM_DRIVER_LAM_GET_MON_INPUT_SIGNAL(config->mon.input);
249 driver->monIndex = monIndex;
250 driver->monInput = monInput;
251
252 module->FPCCTR[monIndex].B.ISM = monInput;
253
254 if (monInput == IfxIom_MonInputSignal_p)
255 {
256 if (config->mon.filter.mode == IfxIom_LamFilterMode_noFilter)
257 {
258 module->FPCCTR[monIndex].B.MOD = IfxIom_LamFilterMode_immediateDebounceBothEdge;
259 module->FPCCTR[monIndex].B.CMP = 0;
260 }
261 else
262 {
263 module->FPCCTR[monIndex].B.MOD = config->mon.filter.mode;
264 module->FPCCTR[monIndex].B.CMP = fiom * config->mon.filter.risingEdgeFilterTime;
265 module->FPCCTR[monIndex].B.RTG = config->mon.filter.clearTimerOnGlitch ? 1 : 0;
266 }
267 }
268 }
269
270 {
271 /* Configure the LAM */
272 module->LAMCFG[driver->channel].B.IVR = config->ref.inverted ? 1 : 0;
273 module->LAMCFG[driver->channel].B.IVM = config->mon.inverted ? 1 : 0;
274 module->LAMCFG[driver->channel].B.MOS = config->event.source == IfxIom_LamEventSource_mon ? 0 : 1;
275 module->LAMCFG[driver->channel].B.RMS = config->eventWindow.run;
276 module->LAMCFG[driver->channel].B.EWS = config->eventWindow.controlSource;
277 module->LAMCFG[driver->channel].B.EDS =
278 ((config->eventWindow.clearEvent) << 0)
279 | ((config->event.trigger) << 2)
280 ;
281 module->LAMCFG[driver->channel].B.IVW = config->eventWindow.inverted ? 1 : 0;
282 module->LAMCFG[driver->channel].B.MCS = IFXIOM_DRIVER_LAM_GET_MON_INPUT_INDEX(config->mon.input);
283 module->LAMCFG[driver->channel].B.RCS = IFXIOM_DRIVER_LAM_GET_REF_INPUT_INDEX(config->ref.input);
284
285 module->LAMEWS[driver->channel].B.THR = fiom * config->eventWindow.threshold;
286 }
287
288 {
289 /* Configure the ECM */
290 driver->systemEventTriggerThreshold = config->systemEventTriggerThreshold;
291
292 if (driver->systemEventTriggerThreshold == 1)
293 {
294 module->ECMSELR.U |= 1 << (config->channel + IFX_IOM_ECMSELR_CES0_OFF);
295 }
296 else if (driver->systemEventTriggerThreshold >= 2)
297 {
298 /* Look for a free counter */
299 sint8 index;
300 uint8 accumulatedEventUsedMask = iomDriver->accumulatedEventUsedMask;
301 boolean success = FALSE;
302
303 for (index = 0; index < 4; index++)
304 {
305 if ((accumulatedEventUsedMask & (1 << index)) == 0)
306 {
307 success = TRUE;
308 iomDriver->accumulatedEventUsedMask |= 1 << index;
309 driver->accumulatedCounterIndex = index;
310 module->ECMSELR.U |= 1 << (index + IFX_IOM_ECMSELR_CTS0_OFF);
311
312 module->ECMCCFG.U |= (
313 (driver->channel << IFX_IOM_ECMCCFG_SELC0_OFF)
314 | (driver->systemEventTriggerThreshold << IFX_IOM_ECMCCFG_THRC0_OFF)
315 ) << (index * IFX_IOM_ECMCCFG_SELC1_OFF);
316 break;
317 }
318 }
319
320 result &= success;
321 }
322 else
323 {
324 /* No event generated */
325 }
326 }
327 }
328
329 return result;
330 }
331
332
333 void IfxIom_Driver_initLamConfig(IfxIom_Driver_LamConfig *config, IfxIom_Driver *driver)
334 {
335 config->iomDriver = driver;
336 config->channel = IfxIom_LamId_0;
337 config->event.source = IfxIom_LamEventSource_mon;
338 config->event.trigger = IfxIom_LamEventTrigger_none;
339 config->eventWindow.clearEvent = IfxIom_LamEventWindowClearEvent_anyEdge;
340 config->eventWindow.controlSource = IfxIom_LamEventWindowControlSource_ref;
341 config->eventWindow.inverted = FALSE;
342 config->eventWindow.run = IfxIom_LamEventWindowRunControl_freeRunning;
343 config->eventWindow.threshold = 0.0;
344 config->mon.filter.clearTimerOnGlitch = FALSE;
345 config->mon.filter.fallingEdgeFilterTime = 0.0;
346 config->mon.filter.mode = IfxIom_LamFilterMode_noFilter;
347 config->mon.filter.prescalerFactor = 1;
348 config->mon.filter.risingEdgeFilterTime = 0.0;
349 config->mon.input = IfxIom_MonInput_p33_0;
350 config->mon.inverted = FALSE;
351 config->ref.filter.clearTimerOnGlitch = FALSE;
352 config->ref.filter.fallingEdgeFilterTime = 0.0;
353 config->ref.filter.mode = IfxIom_LamFilterMode_noFilter;
354 config->ref.filter.prescalerFactor = 1;
355 config->ref.filter.risingEdgeFilterTime = 0.0;
356 config->ref.input = IfxIom_RefInput_p33_0;
357 config->ref.inverted = FALSE;
358 config->systemEventTriggerThreshold = 1;
359 }
360
361
362 void IfxIom_Driver_isLamMonGlitch(IfxIom_Driver_Lam *driver, boolean *risingEdgeGlitch, boolean *fallingEdgeGlitch)
363 {
364 Ifx_IOM *module = driver->iomDriver->module;
365
366 if (driver->monInput == IfxIom_MonInputSignal_p)
367 {
368 uint32 index;
369 index = driver->monIndex;
370 *risingEdgeGlitch = (module->FPCESR.U >> (index + IFX_IOM_FPCESR_REG0_OFF)) != 0;
371 *fallingEdgeGlitch = (module->FPCESR.U >> (index + IFX_IOM_FPCESR_FEG0_OFF)) != 0;
372 }
373 else
374 {
375 *risingEdgeGlitch = FALSE;
376 *fallingEdgeGlitch = FALSE;
377 }
378 }
379
380
381 void IfxIom_Driver_isLamRefGlitch(IfxIom_Driver_Lam *driver, boolean *risingEdgeGlitch, boolean *fallingEdgeGlitch)
382 {
383 Ifx_IOM *module = driver->iomDriver->module;
384
385 if (driver->refInput == IfxIom_RefInputSignal_p)
386 {
387 uint32 index;
388 index = driver->refIndex;
389 *risingEdgeGlitch = (module->FPCESR.U >> (index + IFX_IOM_FPCESR_REG0_OFF)) != 0;
390 *fallingEdgeGlitch = (module->FPCESR.U >> (index + IFX_IOM_FPCESR_FEG0_OFF)) != 0;
391 }
392 else
393 {
394 *risingEdgeGlitch = FALSE;
395 *fallingEdgeGlitch = FALSE;
396 }
397 }
398
399
400 void IfxIom_Driver_restoreEvents(IfxIom_Driver *driver, uint32 mask)
401 {
402 driver->module->ECMSELR.U = mask;
403 }
IfxIom_Driver_init
boolean IfxIom_Driver_init(IfxIom_Driver *driver, IfxIom_Driver_Config *config)
Initialize the IOM Must be called before IfxIom_Driver_initLam()
Definition: IfxIom_Driver.c:168
IfxIom_LamFilterMode_immediateDebounceBothEdge
Immediate Debounce Filter Mode on both edges.
Definition: IfxIom.h:124
IfxIom_Driver_LamConfig
IOM LAM configuration.
Definition: IfxIom_Driver.h:208
IfxIom_Driver::module
Ifx_IOM * module
Pointer to IOM module SFR set.
Definition: IfxIom_Driver.h:139
IfxIom_Driver_Lam::refIndex
uint8 refIndex
Reference input index.
Definition: IfxIom_Driver.h:199
IfxIom_LamId_0
Specifies the LAM Id0.
Definition: IfxIom.h:138
IfxIom_Driver_Lam::accumulatedCounterIndex
sint8 accumulatedCounterIndex
Accumulated counter used. Negative value means no counter used.
Definition: IfxIom_Driver.h:202
IfxIom_Driver_LamFilterConfig::clearTimerOnGlitch
boolean clearTimerOnGlitch
If set, the timer is cleared on glitch, else it is decremented.
Definition: IfxIom_Driver.h:124
IfxIom_Driver_LamFilterConfig::risingEdgeFilterTime
float32 risingEdgeFilterTime
Rising edge filter time in second for immediate debounce filter mode. In delayed filter time this cor...
Definition: IfxIom_Driver.h:128
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxIom_RefInput_p33_0
Definition: IfxIom_cfg.h:173
IfxIom_Driver_Config
IOM Driver Configuration.
Definition: IfxIom_Driver.h:187
IfxIom_Driver_Lam::systemEventTriggerThreshold
uint8 systemEventTriggerThreshold
Specifies the number of LAM event that triggers the System Event. Value 0 disables the trigger event...
Definition: IfxIom_Driver.h:203
IfxIom_Driver_LamEventWindowConfig::controlSource
IfxIom_LamEventWindowControlSource controlSource
Timer control source.
Definition: IfxIom_Driver.h:157
IfxIom_Driver_disableEvents
uint32 IfxIom_Driver_disableEvents(IfxIom_Driver *driver)
Disable all event generation.
Definition: IfxIom_Driver.c:102
IfxIom_Driver_LamConfig::mon
IfxIom_Driver_LamMonConfig mon
LAM Monitor input configuration.
Definition: IfxIom_Driver.h:214
IfxIom_Driver_LamRefConfig::input
IfxIom_RefInput input
Reference input.
Definition: IfxIom_Driver.h:177
IfxIom_Driver_clearAllGlitch
void IfxIom_Driver_clearAllGlitch(IfxIom_Driver *driver)
Clear all LAM monitor and reference glitch flags.
Definition: IfxIom_Driver.c:66
IfxIom_Driver_clearHistory
void IfxIom_Driver_clearHistory(IfxIom_Driver *driver)
Clear the IOM event history.
Definition: IfxIom_Driver.c:73
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxIom_Driver_LamRefConfig::inverted
boolean inverted
If TRUE, the signal is inverted.
Definition: IfxIom_Driver.h:178
float32
float float32
Definition: Platform_Types.h:170
Ifx_Assert.h
Assert functions.
IFXIOM_DRIVER_LAM_GET_MON_INPUT_INDEX
#define IFXIOM_DRIVER_LAM_GET_MON_INPUT_INDEX(monInput)
Definition: IfxIom_Driver.c:60
IfxIom_LamEventWindowControlSource_ref
Event window generation is determined from the reference signal.
Definition: IfxIom.h:105
IfxIom_RefInputSignal
IfxIom_RefInputSignal
IOM_FPCCTRk.ISR.
Definition: IfxIom_cfg.h:86
IfxIom_Driver_LamConfig::event
IfxIom_Driver_LamEventConfig event
LAM event configuration.
Definition: IfxIom_Driver.h:212
IfxIom_Driver_Lam::channel
IfxIom_LamId channel
LAM Channel.
Definition: IfxIom_Driver.h:197
IfxIom_Driver_LamEventWindowConfig::clearEvent
IfxIom_LamEventWindowClearEvent clearEvent
Timer clear event.
Definition: IfxIom_Driver.h:156
IfxIom_Driver_isLamMonGlitch
void IfxIom_Driver_isLamMonGlitch(IfxIom_Driver_Lam *driver, boolean *risingEdgeGlitch, boolean *fallingEdgeGlitch)
Return the LAM monitor glitch flags.
Definition: IfxIom_Driver.c:362
IfxIom_Driver.h
IOM DRIVER details.
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxIom_Driver_clearLamMonGlitch
void IfxIom_Driver_clearLamMonGlitch(IfxIom_Driver_Lam *driver)
Clear the LAM monitor signal glitch flag.
Definition: IfxIom_Driver.c:80
IfxIom_Driver_LamEventConfig::trigger
IfxIom_LamEventTrigger trigger
Event trigger.
Definition: IfxIom_Driver.h:149
IfxIom_Driver_LamFilterConfig::fallingEdgeFilterTime
float32 fallingEdgeFilterTime
Falling edge filter time in second for immediate debounce filter mode. In delayed filter time this co...
Definition: IfxIom_Driver.h:125
IfxIom_Driver_disableLamEvent
void IfxIom_Driver_disableLamEvent(IfxIom_Driver_Lam *driver)
Disable the event generation for the LAM.
Definition: IfxIom_Driver.c:111
IfxIom_Driver_initConfig
void IfxIom_Driver_initConfig(IfxIom_Driver_Config *config, Ifx_IOM *module)
Set the IOM default configuration.
Definition: IfxIom_Driver.c:177
IfxIom_Driver_isLamRefGlitch
void IfxIom_Driver_isLamRefGlitch(IfxIom_Driver_Lam *driver, boolean *risingEdgeGlitch, boolean *fallingEdgeGlitch)
Return the LAM reference glitch flags.
Definition: IfxIom_Driver.c:381
IfxIom_Driver_LamRefConfig::filter
IfxIom_Driver_LamFilterConfig filter
Filter configuration.
Definition: IfxIom_Driver.h:176
IfxIom_getFrequency
float32 IfxIom_getFrequency(Ifx_IOM *iom)
Return the frequency used for the filter and timers clock.
Definition: IfxIom.c:53
IfxIom_LamEventWindowClearEvent_anyEdge
Either edge used to clear event windowcounter.
Definition: IfxIom.h:97
IfxIom_Driver_enableLamEvent
void IfxIom_Driver_enableLamEvent(IfxIom_Driver_Lam *driver)
Enable the event genration for the LAM.
Definition: IfxIom_Driver.c:132
IfxIom_MonInput_p33_0
Value=0xXXYY where XX=ISM, YY=k.
Definition: IfxIom_cfg.h:103
IfxIom_Driver
IOM driver.
Definition: IfxIom_Driver.h:137
IfxIom_LamFilterMode_noFilter
No filter (value used for software only )
Definition: IfxIom.h:131
IfxIom_Driver_getHistory
void IfxIom_Driver_getHistory(IfxIom_Driver *driver, uint16 *a, uint16 *b, uint16 *c, uint16 *d)
Return the IOM event history. In returned mask value, bit0= LAM0, bit1=LAM1, ...
Definition: IfxIom_Driver.c:153
IfxIom_Driver::lamUsedMask
uint16 lamUsedMask
Indicates the used / unused LAM. bit0=LAM0, bit1=LAM2, ... 0=unused, 1=used.
Definition: IfxIom_Driver.h:141
IfxIom_Driver_LamEventConfig::source
IfxIom_LamEventSource source
Event source.
Definition: IfxIom_Driver.h:148
IfxIom_RefInputSignal_p
Signal input Pn_IN (from portlogic) selected.
Definition: IfxIom_cfg.h:88
IFXIOM_DRIVER_LAM_GET_MON_INPUT_SIGNAL
#define IFXIOM_DRIVER_LAM_GET_MON_INPUT_SIGNAL(monInput)
Definition: IfxIom_Driver.c:56
IfxIom_Driver_LamConfig::eventWindow
IfxIom_Driver_LamEventWindowConfig eventWindow
LAM eventWindow configuration.
Definition: IfxIom_Driver.h:213
IfxIom_Driver_LamEventWindowConfig::run
IfxIom_LamEventWindowRunControl run
Timer run control.
Definition: IfxIom_Driver.h:159
IfxIom_Driver_LamConfig::ref
IfxIom_Driver_LamRefConfig ref
LAM reference input configuration.
Definition: IfxIom_Driver.h:215
IfxIom_Driver_clearLamRefGlitch
void IfxIom_Driver_clearLamRefGlitch(IfxIom_Driver_Lam *driver)
Clear the LAM reference signal glitch flag.
Definition: IfxIom_Driver.c:91
IfxIom_LamEventTrigger_none
Neither edge used to gate event generation.
Definition: IfxIom.h:83
IFXIOM_DRIVER_LAM_GET_REF_INPUT_SIGNAL
#define IFXIOM_DRIVER_LAM_GET_REF_INPUT_SIGNAL(refInput)
Definition: IfxIom_Driver.c:54
IfxIom_Driver_initLamConfig
void IfxIom_Driver_initLamConfig(IfxIom_Driver_LamConfig *config, IfxIom_Driver *driver)
Set the LAM default configuration.
Definition: IfxIom_Driver.c:333
IfxIom_Driver_restoreEvents
void IfxIom_Driver_restoreEvents(IfxIom_Driver *driver, uint32 mask)
Restore the IOM event mask.
Definition: IfxIom_Driver.c:400
IfxIom_Driver::accumulatedEventUsedMask
uint8 accumulatedEventUsedMask
Indicates the used / unused accumulated counter ECM. bit0=CTS0, bit1=CTS2, ... 0=unused, 1=used.
Definition: IfxIom_Driver.h:140
IfxIom_LamEventWindowRunControl_freeRunning
Event window generation is free-running.
Definition: IfxIom.h:114
IfxIom_Driver_LamFilterConfig::prescalerFactor
uint32 prescalerFactor
Prescaler factor, must be > 0, only valid for prescaler mode.
Definition: IfxIom_Driver.h:127
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxIom_Driver_initLam
boolean IfxIom_Driver_initLam(IfxIom_Driver_Lam *driver, IfxIom_Driver_LamConfig *config)
Initialize the LAM channel.
Definition: IfxIom_Driver.c:183
IfxIom_Driver_LamMonConfig::input
IfxIom_MonInput input
Monitor input.
Definition: IfxIom_Driver.h:168
IfxIom_Driver_Lam::refInput
IfxIom_RefInputSignal refInput
Reference input.
Definition: IfxIom_Driver.h:200
IfxIom_Driver_LamEventWindowConfig::threshold
float32 threshold
Event window threshold in second. If 0, no event are generated.
Definition: IfxIom_Driver.h:160
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxIom_LamFilterMode_prescalerOnFallingEdge
Prescaler Mode (triggered on falling edge)
Definition: IfxIom.h:130
IfxIom_LamEventSource_mon
Monitor signal is sourced directly from FPCmch.
Definition: IfxIom.h:74
IfxIom_MonInputSignal_p
Signal input Pn_IN (from portlogic) selected.
Definition: IfxIom_cfg.h:78
IFXIOM_DRIVER_LAM_GET_REF_INPUT_INDEX
#define IFXIOM_DRIVER_LAM_GET_REF_INPUT_INDEX(refInput)
Definition: IfxIom_Driver.c:58
IfxIom_LamFilterMode_prescalerOnRisingEdge
Prescaler Mode (triggered on rising edge)
Definition: IfxIom.h:129
IfxIom_Driver_LamFilterConfig::mode
IfxIom_LamFilterMode mode
Filter mode.
Definition: IfxIom_Driver.h:126
TRUE
#define TRUE
Definition: Platform_Types.h:90
uint8
unsigned char uint8
Definition: Platform_Types.h:108
sint8
signed char sint8
Definition: Platform_Types.h:125
IfxIom_Driver_Lam
IOM LAM object.
Definition: IfxIom_Driver.h:194
IfxIom_Driver_Lam::iomDriver
IfxIom_Driver * iomDriver
Main IOM Driver.
Definition: IfxIom_Driver.h:196
IfxIom_MonInputSignal
IfxIom_MonInputSignal
IOM_FPCCTRk.ISM.
Definition: IfxIom_cfg.h:76
IfxIom_Driver_Lam::monIndex
uint8 monIndex
Monitor input index.
Definition: IfxIom_Driver.h:198
IfxIom_Driver_Lam::monInput
IfxIom_MonInputSignal monInput
Monitor input.
Definition: IfxIom_Driver.h:201


iLLD_TC38A: IfxIom_Driver.h Source File

  • Iom
  • Driver
IfxIom_Driver.h
Go to the documentation of this file.
1 /**
2 * \file IfxIom_Driver.h
3 * \brief IOM DRIVER details
4 * \ingroup IfxLld_Iom
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * The IOM driver enable easy usage of the IOM module, by abstracting the internal module structure.
42 * For it's configuration it requires the LAM channel to be used together with the reference and monitor signal. The muxes and filters
43 * are configured accordingly. The driver handles the event combiner "accumulated event timer" resources base on the single or multi-event
44 * configuration making use of the next free timer if required.
45 *
46 * Double resource usage (LAM channel, accumulated event timers) is checked and reported at driver initialization .
47 *
48 * The driver care for the timing and clock conversion, all timing configuration are to be given in second.
49 *
50 * Example of use:
51 * - Initialization of the Iom
52 * - Initialization of LAM channel 0 with:
53 * - IOM monitor input: External pin P20.13, delay debounce filter both edge 0.5us, signal inverted,
54 * - IOM reference: GTM TOUT14, no filter, not inverted
55 * - Event window controlled by ref signal, with a free running timer and cleared on any edge of the reference signal, threshold set to 1us
56 * - Event source is XOR of monitor and reference signal, event is triggered on falling edge of the XOR
57 * - An alarm signal is generated if the monitor signal is not within the threshold, after two events.
58 *
59 *
60 * \code
61 * void InitLam(IfxIom_Driver *driver, IfxIom_Driver *lam){
62 * IfxIom_Driver_Config configDriver;
63 * IfxIom_Driver_LamConfig configLam;
64 *
65 * IfxIom_Driver_initConfig(&configDriver, &MODULE_IOM);
66 * IfxIom_Driver_init(driver, &configDriver);
67 *
68 * IfxIom_Driver_initLamConfig(&configLam, driver);
69 *
70 * configLam.channel = IfxIom_LamId_0;
71 *
72 * configLam.mon.input = IfxIom_MonInput_p20_13;
73 * configLam.mon.filter.mode = IfxIom_LamFilterMode_delayDebounceBothEdge;
74 * configLam.mon.filter.clearTimerOnGlitch = FALSE;
75 * configLam.mon.filter.fallingEdgeFilterTime = 0.5e-6;
76 * configLam.mon.filter.risingEdgeFilterTime = configLam.ref.filter.fallingEdgeFilterTime;
77 * configLam.mon.inverted = TRUE;
78 *
79 * configLam.ref.input= IfxIom_RefInput_gtmTout14;
80 * configLam.ref.filter.mode = IfxIom_LamFilterMode_noFilter;
81 * configLam.ref.inverted = FALSE;
82 *
83 * configLam.eventWindow.controlSource = IfxIom_LamEventWindowControlSource_ref;
84 * configLam.eventWindow.run = IfxIom_LamEventWindowRunControl_freeRunning;
85 * configLam.eventWindow.clearEvent = IfxIom_LamEventWindowClearEvent_anyEdge;
86 * configLam.eventWindow.threshold = 1e-6;
87 * configLam.event.source = IfxIom_LamEventSource_monXorRef;
88 * configLam.event.trigger = IfxIom_LamEventTrigger_fallingEdge;
89 *
90 * configLam.systemEventTriggerThreshold = 2;
91 *
92 * IfxIom_Driver_initLam(lam, &configLam);
93 *
94 * }
95 * \endcode
96 *
97 * \defgroup IfxLld_Iom_Driver IOM Driver
98 * \ingroup IfxLld_Iom
99 * \defgroup IfxLld_Iom_Driver_func Driver Functions
100 * \ingroup IfxLld_Iom_Driver
101 * \defgroup IfxLld_Iom_Driver_struct Structures
102 * \ingroup IfxLld_Iom_Driver
103 */
104
105 #ifndef IFXIOM_DRIVER_H
106 #define IFXIOM_DRIVER_H 1
107
108 /******************************************************************************/
109 /*----------------------------------Includes----------------------------------*/
110 /******************************************************************************/
111
112 #include "Iom/Std/IfxIom.h"
113
114 /******************************************************************************/
115 /*-----------------------------Data Structures--------------------------------*/
116 /******************************************************************************/
117
118 /** \addtogroup IfxLld_Iom_Driver_struct
119 * \{ */
120 /** \brief IOM LAM filter configuration
121 */
122 typedef struct
123 {
124 boolean clearTimerOnGlitch; /**< \brief If set, the timer is cleared on glitch, else it is decremented */
125 float32 fallingEdgeFilterTime; /**< \brief Falling edge filter time in second for immediate debounce filter mode. In delayed filter time this corresponds to the minimal filter time. */
126 IfxIom_LamFilterMode mode; /**< \brief Filter mode */
127 uint32 prescalerFactor; /**< \brief Prescaler factor, must be > 0, only valid for prescaler mode */
128 float32 risingEdgeFilterTime; /**< \brief Rising edge filter time in second for immediate debounce filter mode. In delayed filter time this corresponds to the minimal filter time. */
129 } IfxIom_Driver_LamFilterConfig;
130
131 /** \} */
132
133 /** \addtogroup IfxLld_Iom_Driver_struct
134 * \{ */
135 /** \brief IOM driver
136 */
137 typedef struct
138 {
139 Ifx_IOM *module; /**< \brief Pointer to IOM module SFR set */
140 uint8 accumulatedEventUsedMask; /**< \brief Indicates the used / unused accumulated counter ECM. bit0=CTS0, bit1=CTS2, ... 0=unused, 1=used */
141 uint16 lamUsedMask; /**< \brief Indicates the used / unused LAM. bit0=LAM0, bit1=LAM2, ... 0=unused, 1=used */
142 } IfxIom_Driver;
143
144 /** \brief IOM LAM event configuration
145 */
146 typedef struct
147 {
148 IfxIom_LamEventSource source; /**< \brief Event source */
149 IfxIom_LamEventTrigger trigger; /**< \brief Event trigger */
150 } IfxIom_Driver_LamEventConfig;
151
152 /** \brief IOM LAM event window configuration
153 */
154 typedef struct
155 {
156 IfxIom_LamEventWindowClearEvent clearEvent; /**< \brief Timer clear event */
157 IfxIom_LamEventWindowControlSource controlSource; /**< \brief Timer control source */
158 boolean inverted; /**< \brief If TRUE, the event window is inverted */
159 IfxIom_LamEventWindowRunControl run; /**< \brief Timer run control */
160 float32 threshold; /**< \brief Event window threshold in second. If 0, no event are generated */
161 } IfxIom_Driver_LamEventWindowConfig;
162
163 /** \brief IOM LAM monitor input configuration
164 */
165 typedef struct
166 {
167 IfxIom_Driver_LamFilterConfig filter; /**< \brief Filter configuration */
168 IfxIom_MonInput input; /**< \brief Monitor input */
169 boolean inverted; /**< \brief If TRUE, the signal is inverted */
170 } IfxIom_Driver_LamMonConfig;
171
172 /** \brief IOM LAM reference input configuration
173 */
174 typedef struct
175 {
176 IfxIom_Driver_LamFilterConfig filter; /**< \brief Filter configuration */
177 IfxIom_RefInput input; /**< \brief Reference input */
178 boolean inverted; /**< \brief If TRUE, the signal is inverted */
179 } IfxIom_Driver_LamRefConfig;
180
181 /** \} */
182
183 /** \addtogroup IfxLld_Iom_Driver_struct
184 * \{ */
185 /** \brief IOM Driver Configuration
186 */
187 typedef struct
188 {
189 Ifx_IOM *module; /**< \brief IOM module SFRs */
190 } IfxIom_Driver_Config;
191
192 /** \brief IOM LAM object
193 */
194 typedef struct
195 {
196 IfxIom_Driver *iomDriver; /**< \brief Main IOM Driver */
197 IfxIom_LamId channel; /**< \brief LAM Channel */
198 uint8 monIndex; /**< \brief Monitor input index */
199 uint8 refIndex; /**< \brief Reference input index */
200 IfxIom_RefInputSignal refInput; /**< \brief Reference input */
201 IfxIom_MonInputSignal monInput; /**< \brief Monitor input */
202 sint8 accumulatedCounterIndex; /**< \brief Accumulated counter used. Negative value means no counter used */
203 uint8 systemEventTriggerThreshold; /**< \brief Specifies the number of LAM event that triggers the System Event. Value 0 disables the trigger event. Value one enables the trigger event. Value from 2 to 15 will use the counter to filter events, max 4 counters exists for the IOM. */
204 } IfxIom_Driver_Lam;
205
206 /** \brief IOM LAM configuration
207 */
208 typedef struct
209 {
210 IfxIom_Driver *iomDriver; /**< \brief Pointer to the IOM driver */
211 IfxIom_LamId channel; /**< \brief LAM channel to be used */
212 IfxIom_Driver_LamEventConfig event; /**< \brief LAM event configuration */
213 IfxIom_Driver_LamEventWindowConfig eventWindow; /**< \brief LAM eventWindow configuration */
214 IfxIom_Driver_LamMonConfig mon; /**< \brief LAM Monitor input configuration */
215 IfxIom_Driver_LamRefConfig ref; /**< \brief LAM reference input configuration */
216 uint8 systemEventTriggerThreshold; /**< \brief Specifies the number of LAM event that triggers the System Event. Value 0 disables the trigger event. Value one enables the trigger event. Value from 2 to 15 will use the counter to filter events, max 4 counters exists for the IOM. */
217 } IfxIom_Driver_LamConfig;
218
219 /** \} */
220
221 /** \addtogroup IfxLld_Iom_Driver_func
222 * \{ */
223
224 /******************************************************************************/
225 /*-------------------------Global Function Prototypes-------------------------*/
226 /******************************************************************************/
227
228 /** \brief Clear all LAM monitor and reference glitch flags
229 * \param driver Pointer to the IOM driver object
230 * \return None
231 */
232 IFX_EXTERN void IfxIom_Driver_clearAllGlitch(IfxIom_Driver *driver);
233
234 /** \brief Clear the IOM event history
235 * \param driver Pointer to the IOM driver object
236 * \return None
237 */
238 IFX_EXTERN void IfxIom_Driver_clearHistory(IfxIom_Driver *driver);
239
240 /** \brief Clear the LAM monitor signal glitch flag
241 * \param driver Pointer to the LAM driver object
242 * \return None
243 */
244 IFX_EXTERN void IfxIom_Driver_clearLamMonGlitch(IfxIom_Driver_Lam *driver);
245
246 /** \brief Clear the LAM reference signal glitch flag
247 * \param driver Pointer to the LAM driver object
248 * \return None
249 */
250 IFX_EXTERN void IfxIom_Driver_clearLamRefGlitch(IfxIom_Driver_Lam *driver);
251
252 /** \brief Disable all event generation
253 * \param driver Pointer to the IOM driver object
254 * \return Return the configured events
255 */
256 IFX_EXTERN uint32 IfxIom_Driver_disableEvents(IfxIom_Driver *driver);
257
258 /** \brief Disable the event generation for the LAM
259 * \param driver Pointer to the LAM driver object
260 * \return None
261 */
262 IFX_EXTERN void IfxIom_Driver_disableLamEvent(IfxIom_Driver_Lam *driver);
263
264 /** \brief Enable the event genration for the LAM
265 * \param driver Pointer to the LAM driver object
266 * \return None
267 */
268 IFX_EXTERN void IfxIom_Driver_enableLamEvent(IfxIom_Driver_Lam *driver);
269
270 /** \brief Return the IOM event history.
271 * In returned mask value, bit0= LAM0, bit1=LAM1, ...
272 * \param driver Pointer to the IOM driver object
273 * \param a Event mask of history level 0 (Last event)
274 * \param b Event mask of history level 1
275 * \param c Event mask of history level 2
276 * \param d Event mask of history level 3 (oldest event)
277 * \return None
278 */
279 IFX_EXTERN void IfxIom_Driver_getHistory(IfxIom_Driver *driver, uint16 *a, uint16 *b, uint16 *c, uint16 *d);
280
281 /** \brief Initialize the IOM
282 * Must be called before IfxIom_Driver_initLam()
283 * \param driver Pointer to the IOM driver object. Will be initialized by the function
284 * \param config IOM driver configuration
285 * \return TRUE in case of success else FALSE
286 */
287 IFX_EXTERN boolean IfxIom_Driver_init(IfxIom_Driver *driver, IfxIom_Driver_Config *config);
288
289 /** \brief Set the IOM default configuration
290 * \param config IOM configuration. Will be initialized by the function
291 * \param module Pointer to the IOM module
292 * \return None
293 */
294 IFX_EXTERN void IfxIom_Driver_initConfig(IfxIom_Driver_Config *config, Ifx_IOM *module);
295
296 /** \brief Initialize the LAM channel
297 * \param driver Pointer to the LAM driver object. Will be initialized by the function
298 * \param config LAM driver configuration
299 * \return TRUE in case of success else FALSE
300 */
301 IFX_EXTERN boolean IfxIom_Driver_initLam(IfxIom_Driver_Lam *driver, IfxIom_Driver_LamConfig *config);
302
303 /** \brief Set the LAM default configuration
304 * \param config LAM configuration. Will be initialized by the function
305 * \param driver Pointer to the IOM driver object
306 * \return None
307 */
308 IFX_EXTERN void IfxIom_Driver_initLamConfig(IfxIom_Driver_LamConfig *config, IfxIom_Driver *driver);
309
310 /** \brief Return the LAM monitor glitch flags
311 * \param driver Pointer to the LAM driver object
312 * \param risingEdgeGlitch Set to TRUE by the function if rising edge glitch were detected on the monitor signal
313 * \param fallingEdgeGlitch Set to TRUE by the function if falling edge glitch were detected on the monitor signal
314 * \return None
315 */
316 IFX_EXTERN void IfxIom_Driver_isLamMonGlitch(IfxIom_Driver_Lam *driver, boolean *risingEdgeGlitch, boolean *fallingEdgeGlitch);
317
318 /** \brief Return the LAM reference glitch flags
319 * \param driver Pointer to the LAM driver object
320 * \param risingEdgeGlitch Set to TRUE by the function if rising edge glitch were detected on the reference signal
321 * \param fallingEdgeGlitch Set to TRUE by the function if falling edge glitch were detected on the reference signal
322 * \return None
323 */
324 IFX_EXTERN void IfxIom_Driver_isLamRefGlitch(IfxIom_Driver_Lam *driver, boolean *risingEdgeGlitch, boolean *fallingEdgeGlitch);
325
326 /** \brief Restore the IOM event mask
327 * \param driver Pointer to the IOM driver object
328 * \param mask Event configuration as returned by IfxIom_Driver_disableEvents()
329 * \return None
330 */
331 IFX_EXTERN void IfxIom_Driver_restoreEvents(IfxIom_Driver *driver, uint32 mask);
332
333 /** \} */
334
335 #endif /* IFXIOM_DRIVER_H */
IfxIom_Driver_init
IFX_EXTERN boolean IfxIom_Driver_init(IfxIom_Driver *driver, IfxIom_Driver_Config *config)
Initialize the IOM Must be called before IfxIom_Driver_initLam()
Definition: IfxIom_Driver.c:168
IfxIom_Driver_LamConfig
IOM LAM configuration.
Definition: IfxIom_Driver.h:208
IfxIom_Driver::module
Ifx_IOM * module
Pointer to IOM module SFR set.
Definition: IfxIom_Driver.h:139
IfxIom_Driver_Lam::refIndex
uint8 refIndex
Reference input index.
Definition: IfxIom_Driver.h:199
IfxIom_LamFilterMode
IfxIom_LamFilterMode
FPC filer mode IOM_FPCCTRk.MOD, with additional definition for noFilter.
Definition: IfxIom.h:121
IfxIom_Driver_Lam::accumulatedCounterIndex
sint8 accumulatedCounterIndex
Accumulated counter used. Negative value means no counter used.
Definition: IfxIom_Driver.h:202
IfxIom_Driver_LamEventWindowConfig
IOM LAM event window configuration.
Definition: IfxIom_Driver.h:154
IfxIom_Driver_LamFilterConfig::clearTimerOnGlitch
boolean clearTimerOnGlitch
If set, the timer is cleared on glitch, else it is decremented.
Definition: IfxIom_Driver.h:124
IfxIom_Driver_LamFilterConfig::risingEdgeFilterTime
float32 risingEdgeFilterTime
Rising edge filter time in second for immediate debounce filter mode. In delayed filter time this cor...
Definition: IfxIom_Driver.h:128
IfxIom_Driver_LamMonConfig
IOM LAM monitor input configuration.
Definition: IfxIom_Driver.h:165
IfxIom_Driver_Config
IOM Driver Configuration.
Definition: IfxIom_Driver.h:187
IfxIom_Driver_Lam::systemEventTriggerThreshold
uint8 systemEventTriggerThreshold
Specifies the number of LAM event that triggers the System Event. Value 0 disables the trigger event...
Definition: IfxIom_Driver.h:203
IfxIom_Driver_LamEventWindowConfig::controlSource
IfxIom_LamEventWindowControlSource controlSource
Timer control source.
Definition: IfxIom_Driver.h:157
IfxIom_Driver_disableEvents
IFX_EXTERN uint32 IfxIom_Driver_disableEvents(IfxIom_Driver *driver)
Disable all event generation.
Definition: IfxIom_Driver.c:102
IfxIom_Driver_LamConfig::mon
IfxIom_Driver_LamMonConfig mon
LAM Monitor input configuration.
Definition: IfxIom_Driver.h:214
IfxIom_Driver_LamRefConfig::input
IfxIom_RefInput input
Reference input.
Definition: IfxIom_Driver.h:177
IfxIom_Driver_clearAllGlitch
IFX_EXTERN void IfxIom_Driver_clearAllGlitch(IfxIom_Driver *driver)
Clear all LAM monitor and reference glitch flags.
Definition: IfxIom_Driver.c:66
IfxIom.h
IOM basic functionality.
IfxIom_Driver_clearHistory
IFX_EXTERN void IfxIom_Driver_clearHistory(IfxIom_Driver *driver)
Clear the IOM event history.
Definition: IfxIom_Driver.c:73
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxIom_Driver_LamEventWindowConfig::inverted
boolean inverted
If TRUE, the event window is inverted.
Definition: IfxIom_Driver.h:158
float32
float float32
Definition: Platform_Types.h:170
IfxIom_RefInputSignal
IfxIom_RefInputSignal
IOM_FPCCTRk.ISR.
Definition: IfxIom_cfg.h:86
IfxIom_Driver_LamConfig::event
IfxIom_Driver_LamEventConfig event
LAM event configuration.
Definition: IfxIom_Driver.h:212
IfxIom_Driver_Lam::channel
IfxIom_LamId channel
LAM Channel.
Definition: IfxIom_Driver.h:197
IfxIom_LamEventWindowControlSource
IfxIom_LamEventWindowControlSource
Timer control source configuration IOM_LAMCFGm.EWS.
Definition: IfxIom.h:103
IfxIom_Driver_LamEventWindowConfig::clearEvent
IfxIom_LamEventWindowClearEvent clearEvent
Timer clear event.
Definition: IfxIom_Driver.h:156
IfxIom_Driver_LamRefConfig
IOM LAM reference input configuration.
Definition: IfxIom_Driver.h:174
IfxIom_Driver_isLamMonGlitch
IFX_EXTERN void IfxIom_Driver_isLamMonGlitch(IfxIom_Driver_Lam *driver, boolean *risingEdgeGlitch, boolean *fallingEdgeGlitch)
Return the LAM monitor glitch flags.
Definition: IfxIom_Driver.c:362
IfxIom_LamEventWindowRunControl
IfxIom_LamEventWindowRunControl
Timer run configuration IOM_LAMCFGm.RMS.
Definition: IfxIom.h:112
IfxIom_Driver_clearLamMonGlitch
IFX_EXTERN void IfxIom_Driver_clearLamMonGlitch(IfxIom_Driver_Lam *driver)
Clear the LAM monitor signal glitch flag.
Definition: IfxIom_Driver.c:80
IfxIom_Driver_LamEventConfig::trigger
IfxIom_LamEventTrigger trigger
Event trigger.
Definition: IfxIom_Driver.h:149
IfxIom_Driver_LamFilterConfig::fallingEdgeFilterTime
float32 fallingEdgeFilterTime
Falling edge filter time in second for immediate debounce filter mode. In delayed filter time this co...
Definition: IfxIom_Driver.h:125
IfxIom_Driver_disableLamEvent
IFX_EXTERN void IfxIom_Driver_disableLamEvent(IfxIom_Driver_Lam *driver)
Disable the event generation for the LAM.
Definition: IfxIom_Driver.c:111
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxIom_Driver_initConfig
IFX_EXTERN void IfxIom_Driver_initConfig(IfxIom_Driver_Config *config, Ifx_IOM *module)
Set the IOM default configuration.
Definition: IfxIom_Driver.c:177
IfxIom_Driver_isLamRefGlitch
IFX_EXTERN void IfxIom_Driver_isLamRefGlitch(IfxIom_Driver_Lam *driver, boolean *risingEdgeGlitch, boolean *fallingEdgeGlitch)
Return the LAM reference glitch flags.
Definition: IfxIom_Driver.c:381
IfxIom_Driver_LamMonConfig::filter
IfxIom_Driver_LamFilterConfig filter
Filter configuration.
Definition: IfxIom_Driver.h:167
IfxIom_LamEventSource
IfxIom_LamEventSource
Event source configuration IOM_LAMCFGm.MOS.
Definition: IfxIom.h:72
IfxIom_Driver_enableLamEvent
IFX_EXTERN void IfxIom_Driver_enableLamEvent(IfxIom_Driver_Lam *driver)
Enable the event genration for the LAM.
Definition: IfxIom_Driver.c:132
IfxIom_Driver
IOM driver.
Definition: IfxIom_Driver.h:137
IfxIom_Driver_getHistory
IFX_EXTERN void IfxIom_Driver_getHistory(IfxIom_Driver *driver, uint16 *a, uint16 *b, uint16 *c, uint16 *d)
Return the IOM event history. In returned mask value, bit0= LAM0, bit1=LAM1, ...
Definition: IfxIom_Driver.c:153
IfxIom_Driver::lamUsedMask
uint16 lamUsedMask
Indicates the used / unused LAM. bit0=LAM0, bit1=LAM2, ... 0=unused, 1=used.
Definition: IfxIom_Driver.h:141
IfxIom_Driver_LamEventConfig::source
IfxIom_LamEventSource source
Event source.
Definition: IfxIom_Driver.h:148
IfxIom_LamEventTrigger
IfxIom_LamEventTrigger
Event trigger configuration IOM_LAMCFGm.EDS upper two bits.
Definition: IfxIom.h:81
IfxIom_Driver_LamConfig::eventWindow
IfxIom_Driver_LamEventWindowConfig eventWindow
LAM eventWindow configuration.
Definition: IfxIom_Driver.h:213
IfxIom_Driver_LamEventWindowConfig::run
IfxIom_LamEventWindowRunControl run
Timer run control.
Definition: IfxIom_Driver.h:159
IfxIom_Driver_LamConfig::ref
IfxIom_Driver_LamRefConfig ref
LAM reference input configuration.
Definition: IfxIom_Driver.h:215
IfxIom_Driver_clearLamRefGlitch
IFX_EXTERN void IfxIom_Driver_clearLamRefGlitch(IfxIom_Driver_Lam *driver)
Clear the LAM reference signal glitch flag.
Definition: IfxIom_Driver.c:91
IfxIom_Driver_initLamConfig
IFX_EXTERN void IfxIom_Driver_initLamConfig(IfxIom_Driver_LamConfig *config, IfxIom_Driver *driver)
Set the LAM default configuration.
Definition: IfxIom_Driver.c:333
IfxIom_Driver_restoreEvents
IFX_EXTERN void IfxIom_Driver_restoreEvents(IfxIom_Driver *driver, uint32 mask)
Restore the IOM event mask.
Definition: IfxIom_Driver.c:400
IfxIom_LamId
IfxIom_LamId
Specifies the Logic Module Analyser Module Number.
Definition: IfxIom.h:136
IfxIom_Driver::accumulatedEventUsedMask
uint8 accumulatedEventUsedMask
Indicates the used / unused accumulated counter ECM. bit0=CTS0, bit1=CTS2, ... 0=unused, 1=used.
Definition: IfxIom_Driver.h:140
IfxIom_Driver_LamFilterConfig::prescalerFactor
uint32 prescalerFactor
Prescaler factor, must be > 0, only valid for prescaler mode.
Definition: IfxIom_Driver.h:127
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxIom_Driver_LamEventConfig
IOM LAM event configuration.
Definition: IfxIom_Driver.h:146
IfxIom_Driver_LamFilterConfig
IOM LAM filter configuration.
Definition: IfxIom_Driver.h:122
IfxIom_Driver_initLam
IFX_EXTERN boolean IfxIom_Driver_initLam(IfxIom_Driver_Lam *driver, IfxIom_Driver_LamConfig *config)
Initialize the LAM channel.
Definition: IfxIom_Driver.c:183
IfxIom_Driver_LamMonConfig::input
IfxIom_MonInput input
Monitor input.
Definition: IfxIom_Driver.h:168
IfxIom_Driver_Lam::refInput
IfxIom_RefInputSignal refInput
Reference input.
Definition: IfxIom_Driver.h:200
IfxIom_RefInput
IfxIom_RefInput
LAM ref inputs.
Definition: IfxIom_cfg.h:171
IfxIom_Driver_LamEventWindowConfig::threshold
float32 threshold
Event window threshold in second. If 0, no event are generated.
Definition: IfxIom_Driver.h:160
IfxIom_LamEventWindowClearEvent
IfxIom_LamEventWindowClearEvent
Timer clear event configuration IOM_LAMCFGm.EDS upper lower bits.
Definition: IfxIom.h:92
IfxIom_MonInput
IfxIom_MonInput
LAM mon inputs.
Definition: IfxIom_cfg.h:101
IfxIom_Driver_LamFilterConfig::mode
IfxIom_LamFilterMode mode
Filter mode.
Definition: IfxIom_Driver.h:126
uint8
unsigned char uint8
Definition: Platform_Types.h:108
sint8
signed char sint8
Definition: Platform_Types.h:125
IfxIom_Driver_Lam
IOM LAM object.
Definition: IfxIom_Driver.h:194
IfxIom_Driver_Lam::iomDriver
IfxIom_Driver * iomDriver
Main IOM Driver.
Definition: IfxIom_Driver.h:196
IfxIom_MonInputSignal
IfxIom_MonInputSignal
IOM_FPCCTRk.ISM.
Definition: IfxIom_cfg.h:76
IfxIom_Driver_Lam::monIndex
uint8 monIndex
Monitor input index.
Definition: IfxIom_Driver.h:198
IfxIom_Driver_Lam::monInput
IfxIom_MonInputSignal monInput
Monitor input.
Definition: IfxIom_Driver.h:201


iLLD_TC38A: IfxIom_Iom.c Source File

  • Iom
  • Iom
IfxIom_Iom.c
Go to the documentation of this file.
1 /**
2 * \file IfxIom_Iom.c
3 * \brief IOM IOM details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 *
41 */
42
43 /******************************************************************************/
44 /*----------------------------------Includes----------------------------------*/
45 /******************************************************************************/
46
47 #include "IfxIom_Iom.h"
48
49 /******************************************************************************/
50 /*-------------------------Function Implementations---------------------------*/
51 /******************************************************************************/
52
53 void IfxIom_Iom_clearFpcEdges(IfxIom_Iom_FpcConfig *fpcConfig, IfxIom_Iom *iom)
54 {
55 Ifx_IOM *iomSFR = iom->iom;
56 uint8 channelId = (IfxIom_FpcChannelId)fpcConfig->channelId;
57
58 if (fpcConfig->edgeType == IfxIom_EdgeClearType_rising) /* to clear rising edge */
59 {
60 Ifx_IOM_FPCESR tempFPCESR;
61 tempFPCESR.U = (1 << (channelId + 16U));
62 iomSFR->FPCESR.U = tempFPCESR.U;
63 }
64 else if (fpcConfig->edgeType == IfxIom_EdgeClearType_falling) /* to clear falling edge */
65 {
66 Ifx_IOM_FPCESR tempFPCESR;
67 tempFPCESR.U = (1 << channelId);
68 iomSFR->FPCESR.U = tempFPCESR.U;
69 }
70 else if (fpcConfig->edgeType == IfxIom_EdgeClearType_risingFalling) /* to clear both edges */
71 {
72 Ifx_IOM_FPCESR tempFPCESR;
73 tempFPCESR.U = (1 << channelId);
74 tempFPCESR.U |= (1 << (channelId + 16U));
75 iomSFR->FPCESR.U = tempFPCESR.U;
76 }
77 else
78 {
79 /* do nothing */
80 }
81 }
82
83
84 void IfxIom_Iom_deInitModule(IfxIom_Iom *iom)
85 {
86 IfxIom_resetModule(iom->iom);
87 }
88
89
90 boolean IfxIom_Iom_initAnalyser(IfxIom_Iom *iom, const IfxIom_Iom_LamConfig *lamConfig)
91 {
92 boolean status = TRUE;
93
94 Ifx_IOM *iomSFR = iom->iom;
95 uint8 lamId = (IfxIom_LamId)lamConfig->lamId;
96 {
97 Ifx_IOM_LAMCFG tempLAMCFG;
98 tempLAMCFG.U = 0;
99 tempLAMCFG.B.IVR = lamConfig->referenceSignalInverted;
100 tempLAMCFG.B.IVM = lamConfig->monitorSignalInverted;
101 tempLAMCFG.B.MOS = lamConfig->lamMonitorSource;
102 tempLAMCFG.B.RMS = lamConfig->lamMode;
103 tempLAMCFG.B.EWS = lamConfig->eventSource;
104 tempLAMCFG.B.EDS = lamConfig->eventActiveEdgeSelection;
105 tempLAMCFG.B.IVW = lamConfig->eventWindowInverted;
106 tempLAMCFG.B.MCS = lamConfig->lamMonitorInputChannel;
107 tempLAMCFG.B.RCS = lamConfig->lamReferenceInputChannel;
108 iomSFR->LAMCFG[lamId].U = tempLAMCFG.U;
109 }
110
111 {
112 Ifx_IOM_LAMEWS tempLAMEWS;
113 tempLAMEWS.U = 0;
114 tempLAMEWS.B.THR = lamConfig->eventWindowThreshold;
115 iomSFR->LAMEWS[lamId].U = tempLAMEWS.U;
116 }
117 return status;
118 }
119
120
121 void IfxIom_Iom_initAnalyserConfig(IfxIom_Iom_LamConfig *lamConfig)
122 {
123 lamConfig->lamId = IfxIom_LamId_0;
124 lamConfig->lamMode = IfxIom_LamRunMode_freeRunning;
125 lamConfig->lamMonitorInputChannel = IfxIom_LamMonitorInputChannel_0;
126 lamConfig->lamReferenceInputChannel = IfxIom_LamReferenceInputChannel_0;
127 lamConfig->eventWindowThreshold = 15;
128 lamConfig->monitorSignalInverted = TRUE;
129 lamConfig->referenceSignalInverted = TRUE;
130 lamConfig->eventSource = IfxIom_EventSource_reference;
131 lamConfig->lamMonitorSource = IfxIom_LamMonitorSource_directFpcMonitor;
132 lamConfig->eventWindowInverted = TRUE;
133 lamConfig->eventActiveEdgeSelection = IfxIom_EventActiveEdgeSelection_positiveGateEitherClear;
134 }
135
136
137 boolean IfxIom_Iom_initCombiner(IfxIom_Iom *iom, const IfxIom_Iom_EcmConfig *ecmConfig)
138 {
139 boolean status = TRUE;
140 Ifx_IOM *iomSFR = iom->iom;
141 {
142 Ifx_IOM_ECMCCFG tempECMCCFG;
143 tempECMCCFG.U = 0;
144 tempECMCCFG.B.SELC0 = ecmConfig->eventCounter[0].input;
145 tempECMCCFG.B.THRC0 = ecmConfig->eventCounter[0].threshold;
146 tempECMCCFG.B.SELC1 = ecmConfig->eventCounter[1].input;
147 tempECMCCFG.B.THRC1 = ecmConfig->eventCounter[1].threshold;
148 tempECMCCFG.B.SELC2 = ecmConfig->eventCounter[2].input;
149 tempECMCCFG.B.THRC2 = ecmConfig->eventCounter[2].threshold;
150 tempECMCCFG.B.SELC3 = ecmConfig->eventCounter[3].input;
151 tempECMCCFG.B.THRC3 = ecmConfig->eventCounter[3].threshold;
152 iomSFR->ECMCCFG.U = tempECMCCFG.U;
153 }
154
155 {
156 iomSFR->ECMSELR.U = ecmConfig->globalEventSelection.U;
157 }
158 return status;
159 }
160
161
162 void IfxIom_Iom_initCombinerConfig(IfxIom_Iom_EcmConfig *ecmConfig)
163 {
164 uint8 counterId;
165 ecmConfig->globalEventSelection.U = 0;
166
167 for (counterId = 0; counterId <= 3; counterId++)
168 {
169 ecmConfig->eventCounter[counterId].input = IfxIom_EventCounterChannel_0;
170 ecmConfig->eventCounter[counterId].threshold = IfxIom_EventCounterThreshold_disable;
171 }
172 }
173
174
175 boolean IfxIom_Iom_initFpcChannel(IfxIom_Iom *iom, const IfxIom_Iom_FpcConfig *fpcConfig)
176 {
177 boolean status = TRUE;
178
179 Ifx_IOM *iomSFR = iom->iom;
180 uint8 exorInput;
181
182 {
183 uint8 channelId = (IfxIom_FpcChannelId)fpcConfig->channelId;
184 Ifx_IOM_FPCCTR tempFPCCTR;
185 tempFPCCTR.U = 0;
186 tempFPCCTR.B.CMP = fpcConfig->comparatorThreshold;
187 tempFPCCTR.B.MOD = fpcConfig->filterMode;
188 tempFPCCTR.B.ISM = fpcConfig->monitorSignal;
189 tempFPCCTR.B.RTG = fpcConfig->timerReset;
190 tempFPCCTR.B.ISR = fpcConfig->referenceSignal;
191 iomSFR->FPCCTR[channelId].U = tempFPCCTR.U;
192 }
193
194 {
195 Ifx_IOM_GTMEXR tempGTMEXR;
196 tempGTMEXR.U = 0;
197
198 for (exorInput = 0; exorInput <= 7; exorInput++)
199 {
200 if (fpcConfig->exorInputEnable[exorInput])
201 {
202 tempGTMEXR.U |= (1 << exorInput);
203 }
204 else
205 {
206 tempGTMEXR.U &= ~(1 << exorInput);
207 }
208 }
209
210 iomSFR->GTMEXR.U = tempGTMEXR.U;
211 }
212 return status;
213 }
214
215
216 void IfxIom_Iom_initFpcChannelConfig(IfxIom_Iom_FpcConfig *fpcConfig)
217 {
218 uint8 exorInput;
219 fpcConfig->channelId = IfxIom_FpcChannelId_0;
220 fpcConfig->filterMode = IfxIom_FilterMode_delayedDebounce;
221 fpcConfig->referenceSignal = IfxIom_ReferenceSignal_portLogic;
222 fpcConfig->monitorSignal = IfxIom_MonitorSignal_portLogic;
223 fpcConfig->comparatorThreshold = 15;
224 fpcConfig->timerReset = TRUE;
225 fpcConfig->edgeType = IfxIom_EdgeClearType_risingFalling;
226
227 for (exorInput = 0; exorInput <= 7; exorInput++)
228 {
229 fpcConfig->exorInputEnable[exorInput] = FALSE;
230 }
231 }
232
233
234 boolean IfxIom_Iom_initModule(IfxIom_Iom *iom)
235 {
236 boolean status = TRUE;
237
238 Ifx_IOM *iomSFR = iom->iom;
239 {
240 Ifx_IOM_CLC tempCLC;
241 tempCLC.U = 0;
242 tempCLC.B.EDIS = 0;
243 tempCLC.B.RMC = 1;
244 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
245 IfxScuWdt_clearCpuEndinit(passwd);
246 iomSFR->CLC.U = tempCLC.U;
247 IfxIom_enableModule(iomSFR, 1);
248 IfxScuWdt_setCpuEndinit(passwd);
249 }
250
251 return status;
252 }
253
254
255 void IfxIom_Iom_initModuleConfig(IfxIom_Iom *iom, Ifx_IOM *module)
256 {
257 iom->iom = module;
258 }
IfxIom_Iom_initModule
boolean IfxIom_Iom_initModule(IfxIom_Iom *iom)
Initialize the IOM module with supplied configuration.
Definition: IfxIom_Iom.c:234
IfxIom_EdgeClearType_rising
Specifies rising edge to be cleared.
Definition: IfxIom.h:173
IfxIom_LamId_0
Specifies the LAM Id0.
Definition: IfxIom.h:138
IfxIom_LamReferenceInputChannel_0
Specifies 0 FPC/mux block reference output signal is to be used for LAM block.
Definition: IfxIom.h:323
IfxIom_Iom_LamConfig::lamReferenceInputChannel
IfxIom_LamReferenceInputChannel lamReferenceInputChannel
Specifies which FPC/mux block reference output signal is to be used for LAM block.
Definition: IfxIom_Iom.h:245
IfxIom_Iom_initAnalyser
boolean IfxIom_Iom_initAnalyser(IfxIom_Iom *iom, const IfxIom_Iom_LamConfig *lamConfig)
Initializes the Logic Analyser Module for internal event generation.
Definition: IfxIom_Iom.c:90
IfxIom_LamRunMode_freeRunning
Specifies event window generation is free-running.
Definition: IfxIom.h:345
IfxIom_Iom_LamConfig::lamId
IfxIom_LamId lamId
Specifies Id of Logic Analyser Module.
Definition: IfxIom_Iom.h:238
IfxIom_Iom::iom
Ifx_IOM * iom
Specifies the pointer to IOM registers.
Definition: IfxIom_Iom.h:209
IfxIom_FilterMode_delayedDebounce
Specifies Delayed Debounce filter mode.
Definition: IfxIom.h:257
IfxIom_MonitorSignal_portLogic
Specifies the specific pad pins as monitor signal.
Definition: IfxIom.h:354
IfxIom_Iom_EcmConfig::eventCounter
IfxIom_Iom_EcmConfigCounter eventCounter[4]
Definition: IfxIom_Iom.h:216
IfxIom_Iom_FpcConfig::filterMode
IfxIom_FilterMode filterMode
Specifies the Filter & Prescaler Cell mode.
Definition: IfxIom_Iom.h:228
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxIom_Iom_initFpcChannelConfig
void IfxIom_Iom_initFpcChannelConfig(IfxIom_Iom_FpcConfig *fpcConfig)
Initializes the default Filter & Prescaler Cell buffer.
Definition: IfxIom_Iom.c:216
IfxIom_Iom_LamConfig::referenceSignalInverted
boolean referenceSignalInverted
Specifies whether the reference signal from the FPC channel to LAM is inverted or not...
Definition: IfxIom_Iom.h:242
IfxIom_EdgeClearType_risingFalling
Specifies both rising falling edge to be cleared.
Definition: IfxIom.h:175
IfxIom_Iom_LamConfig::eventActiveEdgeSelection
IfxIom_EventActiveEdgeSelection eventActiveEdgeSelection
Specifies which active edges of the monitor and reference signals are used for the event window gener...
Definition: IfxIom_Iom.h:249
IfxIom_Iom_initCombinerConfig
void IfxIom_Iom_initCombinerConfig(IfxIom_Iom_EcmConfig *ecmConfig)
Initializes the default Event Combiner Module buffer.
Definition: IfxIom_Iom.c:162
IfxIom_enableModule
IFX_INLINE void IfxIom_enableModule(Ifx_IOM *iom, uint8 clockDivider)
Enable the IOM module control.
Definition: IfxIom.h:454
IfxIom_Iom_FpcConfig::timerReset
boolean timerReset
Specifies the timer reset bit.
Definition: IfxIom_Iom.h:225
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxIom_Iom_FpcConfig::monitorSignal
IfxIom_MonitorSignal monitorSignal
Specifies the monitor signal input for Filter & Prescaler cell.
Definition: IfxIom_Iom.h:226
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxIom_Iom_FpcConfig::exorInputEnable
boolean exorInputEnable[8]
Specifies the EXOR GTM input signal enable array (8 GTM inputs can be selected by enabling them)...
Definition: IfxIom_Iom.h:231
IfxIom_Iom_EcmConfig
Specifies the ECM block configuration structure.
Definition: IfxIom_Iom.h:214
IfxIom_Iom_EcmConfigCounter::input
IfxIom_EventCounterChannel input
Specifies which channel output event to be routed to the Counter.
Definition: IfxIom_Iom.h:189
IfxIom_EventCounterChannel_0
channel 0 event output to be routed to event counter
Definition: IfxIom.h:204
IfxIom_Iom_FpcConfig::edgeType
IfxIom_EdgeClearType edgeType
Specifies the edge type which need to be cleared.
Definition: IfxIom_Iom.h:230
IfxIom_Iom_clearFpcEdges
void IfxIom_Iom_clearFpcEdges(IfxIom_Iom_FpcConfig *fpcConfig, IfxIom_Iom *iom)
clear the falling and rising edges which are detected.
Definition: IfxIom_Iom.c:53
IfxIom_LamMonitorSource_directFpcMonitor
Monitor signal is sourced directly from FPC monitor channel.
Definition: IfxIom.h:315
IfxIom_Iom_LamConfig::eventWindowThreshold
uint32 eventWindowThreshold
This bit field determines the threshold value for the event window counter from which an event is gen...
Definition: IfxIom_Iom.h:239
IfxIom_Iom_FpcConfig
Specifies Filter and Prescaler Cell configuration.
Definition: IfxIom_Iom.h:222
IfxIom_Iom_LamConfig::lamMode
IfxIom_LamRunMode lamMode
Specifies whether the event window generation is free-running or gated with the monitor or reference...
Definition: IfxIom_Iom.h:247
IfxIom_EdgeClearType_falling
Specifies falling edge to be cleared.
Definition: IfxIom.h:174
IfxIom_FpcChannelId_0
Specifies the FPC channel 0.
Definition: IfxIom.h:271
IfxIom_Iom_initFpcChannel
boolean IfxIom_Iom_initFpcChannel(IfxIom_Iom *iom, const IfxIom_Iom_FpcConfig *fpcConfig)
Initializes the Filter & Prescaler Cell for filtering the signals.
Definition: IfxIom_Iom.c:175
IfxIom_Iom_FpcConfig::referenceSignal
IfxIom_ReferenceSignal referenceSignal
Specifies the reference signal input for Filter & Prescaler cell.
Definition: IfxIom_Iom.h:227
IfxIom_EventCounterThreshold_disable
Specifies counter event output set to inactive.
Definition: IfxIom.h:226
IfxIom_LamId
IfxIom_LamId
Specifies the Logic Module Analyser Module Number.
Definition: IfxIom.h:136
IfxIom_Iom_deInitModule
void IfxIom_Iom_deInitModule(IfxIom_Iom *iom)
Reset the IOM module.
Definition: IfxIom_Iom.c:84
IfxIom_Iom_LamConfig::monitorSignalInverted
boolean monitorSignalInverted
Specifies whether the monitor signal from the FPC channel to LAM is inverted or not.
Definition: IfxIom_Iom.h:241
IfxIom_Iom.h
IOM IOM details.
IfxIom_Iom_FpcConfig::channelId
IfxIom_FpcChannelId channelId
Specifies the number of Filter & Prescaler Cell channel.
Definition: IfxIom_Iom.h:229
IfxIom_Iom_EcmConfig::globalEventSelection
IfxIom_Iom_EcmGlobalEventSelection globalEventSelection
Specifies which channel event & which counted event to be included in global event generation...
Definition: IfxIom_Iom.h:217
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxIom_resetModule
void IfxIom_resetModule(Ifx_IOM *iom)
Reset the IOM module.
Definition: IfxIom.c:66
IfxIom_Iom_LamConfig::eventWindowInverted
boolean eventWindowInverted
Specifies whether the event window polarity is inverted or not.
Definition: IfxIom_Iom.h:248
IfxIom_Iom_EcmConfigCounter::threshold
IfxIom_EventCounterThreshold threshold
Specifies the Counter threshold value.
Definition: IfxIom_Iom.h:190
IfxIom_EventSource_reference
Specifies the event window generation is from the reference signal.
Definition: IfxIom.h:249
IfxIom_Iom_initAnalyserConfig
void IfxIom_Iom_initAnalyserConfig(IfxIom_Iom_LamConfig *lamConfig)
Initializes the default Logic Analyser Module buffer.
Definition: IfxIom_Iom.c:121
IfxIom_FpcChannelId
IfxIom_FpcChannelId
Specifies the number of Filter & Prescaler Cell channel Id.
Definition: IfxIom.h:269
IfxIom_Iom
Specifies handle to IOM module.
Definition: IfxIom_Iom.h:207
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxIom_EventActiveEdgeSelection_positiveGateEitherClear
positive edge used to gate event generation and negative edge used to clear event windowcounter...
Definition: IfxIom.h:189
IfxIom_Iom_LamConfig::lamMonitorSource
IfxIom_LamMonitorSource lamMonitorSource
Specifies whether the monitor signal from the FPC monitor channel is sourced directly or compared wit...
Definition: IfxIom_Iom.h:246
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxIom_Iom_initCombiner
boolean IfxIom_Iom_initCombiner(IfxIom_Iom *iom, const IfxIom_Iom_EcmConfig *ecmConfig)
Initializes the Event Combiner Module for Global event.
Definition: IfxIom_Iom.c:137
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxIom_Iom_LamConfig::eventSource
IfxIom_EventSource eventSource
Specifies whether the event window generation is from the monitor or reference signal.
Definition: IfxIom_Iom.h:243
IfxIom_Iom_EcmGlobalEventSelection::U
uint32 U
Definition: IfxIom_Iom.h:198
IfxIom_ReferenceSignal_portLogic
Specifies the specific pad pins as reference signal.
Definition: IfxIom.h:364
IfxIom_Iom_initModuleConfig
void IfxIom_Iom_initModuleConfig(IfxIom_Iom *iom, Ifx_IOM *module)
Initializes the Module default configuration buffer.
Definition: IfxIom_Iom.c:255
IfxIom_LamMonitorInputChannel_0
Specifies 0 FPC/mux block monitor output signal is to be used for LAM block.
Definition: IfxIom.h:293
IfxIom_Iom_LamConfig::lamMonitorInputChannel
IfxIom_LamMonitorInputChannel lamMonitorInputChannel
Specifies which FPC/mux block monitor output signal is to be used for LAM block.
Definition: IfxIom_Iom.h:244
IfxIom_Iom_FpcConfig::comparatorThreshold
uint16 comparatorThreshold
Specifies the threshold value that is compared with timer.
Definition: IfxIom_Iom.h:224
IfxIom_Iom_LamConfig
Specifies Logic Analyser Module configuration.
Definition: IfxIom_Iom.h:236


iLLD_TC38A: IfxIom_Iom.h Source File

  • Iom
  • Iom
IfxIom_Iom.h
Go to the documentation of this file.
1 /**
2 * \file IfxIom_Iom.h
3 * \brief IOM IOM details
4 * \ingroup IfxLld_Iom
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 * \defgroup IfxLld_Iom_obsoleteInterface Obselete Interface for backward compatibility, (Not recommended for use)
43 * \ingroup IfxLld_Iom
44 *
45 * \defgroup IfxLld_Iom_Iom_Usage How to use the IOM Iom Interface driver?
46 * \ingroup IfxLld_Iom_obsoleteInterface
47 *
48 * IOM Module takes the monitor and reference signals from applicable system peripherals(GTM,CCU6,QSPI,PSI5,ASCLIN) and also from external hardware(Sensors) and compare them with respect to one another and generate the alarm events which are routed to SMU.
49 *
50 * In the following sections it will be described, how to integrate the driver into the application framework.
51 *
52 * \section IfxLld_Iom_Iom_Preparation Preparation
53 * \subsection IfxLld_Iom_Iom_Include Include Files
54 *
55 * Include following header file into your C code:
56 *
57 * \code
58 *
59 * #include <Iom/Iom/IfxIom_Iom.h>
60 *
61 * \endcode
62 *
63 * \subsection IfxLld_Iom_Iom_Variables Variables
64 *
65 * Declare the IOM handle and the configuration buffers as global variables in your C code:
66 * \code
67 *
68 * static IfxIom_Iom_EcmConfig ecmConfig;
69 * static IfxIom_Iom_FpcConfig fpcConfig;
70 * static IfxIom_Iom_LamConfig lamConfig;
71 * static IfxIom_Iom iom;
72 *
73 * \endcode
74 * \subsection IfxLld_Iom_Iom_Init Module Initialisation
75 *
76 * The module initialisation can be done in the same function. Here an example:
77 * \code
78 * //Initialize the module handle
79 * IfxIom_Iom_initModuleConfig(&iom, &MODULE_IOM);
80 *
81 * //Enable the module control
82 * IfxIom_Iom_initModule(&iom);
83 *
84 * //Initialize the default Filter & Prescaler Cell channel configuration buffer
85 * IfxIom_Iom_initFpcChannelConfig(&fpcConfig);
86 * //Filter & Prescaler Cell channel supplied configuration
87 * fpcConfig.channelId = IfxIom_FpcChannelId_2;
88 * fpcConfig.filterMode = IfxIom_FilterMode_delayedDebounce;
89 * fpcConfig.comparatorThreshold = 15;
90 * fpcConfig.monitorSignal = IfxIom_MonitorSignal_portLogic;
91 * fpcConfig.referenceSignal = IfxIom_ReferenceSignal_0;
92 * fpcConfig.timerReset = TRUE;
93 * //Initialize the Filter & Prescaler Cell channel with supplied configuration
94 * IfxIom_Iom_initFpcChannel(&iom, &fpcConfig);
95 *
96 * //Initialize the default Logic Analyser Module configuration buffer
97 * IfxIom_Iom_initAnalyserConfig(&lamConfig);
98 * //Logic Analyser Module Block supplied configuration
99 * lamConfig.monitorSignalInverted = FALSE;
100 * lamConfig.referenceSignalInverted = FALSE;
101 * lamConfig.lamMonitorSource = IfxIom_LamMonitorSource_directFpcMonitor;
102 * lamConfig.lamMode = IfxIom_LamRunMode_freeRunning;
103 * lamConfig.eventSource = IfxIom_EventSource_monitor;
104 * lamConfig.eventActiveEdgeSelection = IfxIom_EventActiveEdgeSelection_negativeGateEitherClear;
105 * lamConfig.eventWindowInverted = TRUE;
106 * lamConfig.lamMonitorInputChannel = IfxIom_LamMonitorInputChannel_2;
107 * lamConfig.lamReferenceInputChannel = IfxIom_LamReferenceInputChannel_2;
108 * lamConfig.lamId = IfxIom_LamId_2;
109 * lamConfig.eventWindowThreshold = 15;
110 * //Initialize the Logic Analyser Module with supplied configuration
111 * IfxIom_Iom_initAnalyser(&iom, &lamConfig);
112 *
113 * //Initialize the default Event Combiner Module configuration buffer
114 * IfxIom_Iom_initCombinerConfig(&ecmConfig);
115 * //Initialize the Logic Analyser Module with supplied configuration
116 * IfxIom_Iom_initCombiner(&iom, &ecmConfig);
117 * \endcode
118 *
119 * The IOM is ready for use now!
120 *
121 * Once the Iom driver is initialized, GTM or CCU6 or QSPI or PSI5 or ASCLIN should be configured to get the two signals with some delay by which event occur.
122 *
123 * The tested two signals are at below pins.
124 *
125 * To generate GTM signals see IfxLld_Gtm_Tom_PwmHl_Usage
126 *
127 * Two GTM signals at below PWM out pins are used as monitor or reference to IOM
128 *
129 * First pin is for Monitor and second pin is for reference. The above initialized IOM generates the event to SMU if pulse or duty cycle too short.
130 *
131 * \defgroup IfxLld_Iom_Iom_obsoleteInterface Obselete Interface for backward compatibility, (Not recommended for use)
132 * \ingroup IfxLld_Iom
133 * \defgroup IfxLld_Iom_Iom_obsoleteInterface_Structures Data Structures
134 * \ingroup IfxLld_Iom_Iom_obsoleteInterface
135 * \defgroup IfxLld_Iom_Iom_obsoleteInterface_Module Module Functions
136 * \ingroup IfxLld_Iom_Iom_obsoleteInterface
137 * \defgroup IfxLld_Iom_Iom_obsoleteInterface_Operative Operative Functions
138 * \ingroup IfxLld_Iom_Iom_obsoleteInterface
139 */
140
141 #ifndef IFXIOM_IOM_H
142 #define IFXIOM_IOM_H 1
143
144 /******************************************************************************/
145 /*----------------------------------Includes----------------------------------*/
146 /******************************************************************************/
147
148 #include "Iom/Std/IfxIom.h"
149
150 /******************************************************************************/
151 /*-----------------------------Data Structures--------------------------------*/
152 /******************************************************************************/
153
154 /** \addtogroup IfxLld_Iom_Iom_obsoleteInterface_Structures
155 * \{ */
156 /** \brief Event Combiner Module Global Event Selection Bit Field
157 */
158 typedef struct
159 {
160 uint32 eventCombinerSelection0 : 1; /**< \brief Determines the inclusion of the channel0 event in the generation of the global event */
161 uint32 eventCombinerSelection1 : 1; /**< \brief Determines the inclusion of the channel1 event in the generation of the global event */
162 uint32 eventCombinerSelection2 : 1; /**< \brief Determines the inclusion of the channel2 event in the generation of the global event */
163 uint32 eventCombinerSelection3 : 1; /**< \brief Determines the inclusion of the channel3 event in the generation of the global event */
164 uint32 eventCombinerSelection4 : 1; /**< \brief Determines the inclusion of the channel4 event in the generation of the global event */
165 uint32 eventCombinerSelection5 : 1; /**< \brief Determines the inclusion of the channel5 event in the generation of the global event */
166 uint32 eventCombinerSelection6 : 1; /**< \brief Determines the inclusion of the channel6 event in the generation of the global event */
167 uint32 eventCombinerSelection7 : 1; /**< \brief Determines the inclusion of the channel7 event in the generation of the global event */
168 uint32 eventCombinerSelection8 : 1; /**< \brief Determines the inclusion of the channel8 event in the generation of the global event */
169 uint32 eventCombinerSelection9 : 1; /**< \brief Determines the inclusion of the channel9 event in the generation of the global event */
170 uint32 eventCombinerSelection10 : 1; /**< \brief Determines the inclusion of the channel10 event in the generation of the global event */
171 uint32 eventCombinerSelection11 : 1; /**< \brief Determines the inclusion of the channel11 event in the generation of the global event */
172 uint32 eventCombinerSelection12 : 1; /**< \brief Determines the inclusion of the channel12 event in the generation of the global event */
173 uint32 eventCombinerSelection13 : 1; /**< \brief Determines the inclusion of the channel13 event in the generation of the global event */
174 uint32 eventCombinerSelection14 : 1; /**< \brief Determines the inclusion of the channel14 event in the generation of the global event */
175 uint32 eventCombinerSelection15 : 1; /**< \brief Determines the inclusion of the channel15 event in the generation of the global event */
176 uint32 countedEventCombinerSelection0 : 1; /**< \brief Determines the inclusion of the respective channel event counter output (1 of 4) in the generation of the global event (AND function). */
177 uint32 countedEventCombinerSelection1 : 1; /**< \brief Determines the inclusion of the respective channel event counter output (1 of 4) in the generation of the global event (AND function). */
178 uint32 countedEventCombinerSelection2 : 1; /**< \brief Determines the inclusion of the respective channel event counter output (1 of 4) in the generation of the global event (AND function). */
179 uint32 countedEventCombinerSelection3 : 1; /**< \brief Determines the inclusion of the respective channel event counter output (1 of 4) in the generation of the global event (AND function). */
180 uint32 reserved : 12; /**< \brief reserved */
181 } IfxIom_Iom_EcmGlobalEventSelectionBits;
182
183 /** \} */
184
185 /** \addtogroup IfxLld_Iom_Iom_obsoleteInterface_Structures
186 * \{ */
187 typedef struct
188 {
189 IfxIom_EventCounterChannel input; /**< \brief Specifies which channel output event to be routed to the Counter */
190 IfxIom_EventCounterThreshold threshold; /**< \brief Specifies the Counter threshold value */
191 } IfxIom_Iom_EcmConfigCounter;
192
193 /** \brief Event Combiner Module Global Event Selection
194 */
195 typedef union
196 {
197 IfxIom_Iom_EcmGlobalEventSelectionBits B;
198 uint32 U;
199 } IfxIom_Iom_EcmGlobalEventSelection;
200
201 /** \} */
202
203 /** \addtogroup IfxLld_Iom_Iom_obsoleteInterface_Structures
204 * \{ */
205 /** \brief Specifies handle to IOM module.
206 */
207 typedef struct
208 {
209 Ifx_IOM *iom; /**< \brief Specifies the pointer to IOM registers. */
210 } IfxIom_Iom;
211
212 /** \brief Specifies the ECM block configuration structure
213 */
214 typedef struct
215 {
216 IfxIom_Iom_EcmConfigCounter eventCounter[4];
217 IfxIom_Iom_EcmGlobalEventSelection globalEventSelection; /**< \brief Specifies which channel event & which counted event to be included in global event generation. bit [15:0] specifies the channel event selection and bit [19:16] specifies accumulated event */
218 } IfxIom_Iom_EcmConfig;
219
220 /** \brief Specifies Filter and Prescaler Cell configuration.
221 */
222 typedef struct
223 {
224 uint16 comparatorThreshold; /**< \brief Specifies the threshold value that is compared with timer */
225 boolean timerReset; /**< \brief Specifies the timer reset bit */
226 IfxIom_MonitorSignal monitorSignal; /**< \brief Specifies the monitor signal input for Filter & Prescaler cell */
227 IfxIom_ReferenceSignal referenceSignal; /**< \brief Specifies the reference signal input for Filter & Prescaler cell */
228 IfxIom_FilterMode filterMode; /**< \brief Specifies the Filter & Prescaler Cell mode */
229 IfxIom_FpcChannelId channelId; /**< \brief Specifies the number of Filter & Prescaler Cell channel */
230 IfxIom_EdgeClearType edgeType; /**< \brief Specifies the edge type which need to be cleared. */
231 boolean exorInputEnable[8]; /**< \brief Specifies the EXOR GTM input signal enable array (8 GTM inputs can be selected by enabling them). */
232 } IfxIom_Iom_FpcConfig;
233
234 /** \brief Specifies Logic Analyser Module configuration.
235 */
236 typedef struct
237 {
238 IfxIom_LamId lamId; /**< \brief Specifies Id of Logic Analyser Module */
239 uint32 eventWindowThreshold; /**< \brief This bit field determines the threshold value for the event window
240 * counter from which an event is generated. */
241 boolean monitorSignalInverted; /**< \brief Specifies whether the monitor signal from the FPC channel to LAM is inverted or not. */
242 boolean referenceSignalInverted; /**< \brief Specifies whether the reference signal from the FPC channel to LAM is inverted or not. */
243 IfxIom_EventSource eventSource; /**< \brief Specifies whether the event window generation is from the monitor or reference signal. */
244 IfxIom_LamMonitorInputChannel lamMonitorInputChannel; /**< \brief Specifies which FPC/mux block monitor output signal is to be used for LAM block */
245 IfxIom_LamReferenceInputChannel lamReferenceInputChannel; /**< \brief Specifies which FPC/mux block reference output signal is to be used for LAM block */
246 IfxIom_LamMonitorSource lamMonitorSource; /**< \brief Specifies whether the monitor signal from the FPC monitor channel is sourced directly or compared with the reference signal from the FPC reference channel for the event compare. */
247 IfxIom_LamRunMode lamMode; /**< \brief Specifies whether the event window generation is free-running or gated with the monitor or reference. */
248 boolean eventWindowInverted; /**< \brief Specifies whether the event window polarity is inverted or not. */
249 IfxIom_EventActiveEdgeSelection eventActiveEdgeSelection; /**< \brief Specifies which active edges of the monitor and reference signals are used for the event window generation. */
250 } IfxIom_Iom_LamConfig;
251
252 /** \} */
253
254 /** \addtogroup IfxLld_Iom_Iom_obsoleteInterface_Module
255 * \{ */
256
257 /******************************************************************************/
258 /*-------------------------Global Function Prototypes-------------------------*/
259 /******************************************************************************/
260
261 /** \brief Reset the IOM module
262 * \param iom Specifies handle to IOM module.
263 * \return None
264 */
265 IFX_EXTERN void IfxIom_Iom_deInitModule(IfxIom_Iom *iom);
266
267 /** \brief Initializes the Logic Analyser Module for internal event generation
268 * \param iom Specifies handle to IOM module.
269 * \param lamConfig Specifies Logic Analyser Module configuration.
270 * \return Return TRUE if valid initialization otherwise FALSE
271 *
272 * Usage example: see \ref IfxLld_Iom_Iom_Usage
273 *
274 */
275 IFX_EXTERN boolean IfxIom_Iom_initAnalyser(IfxIom_Iom *iom, const IfxIom_Iom_LamConfig *lamConfig);
276
277 /** \brief Initializes the default Logic Analyser Module buffer
278 * \param lamConfig Specifies Logic Analyser Module configuration.
279 * \return None
280 *
281 * Usage example: see \ref IfxLld_Iom_Iom_Usage
282 *
283 */
284 IFX_EXTERN void IfxIom_Iom_initAnalyserConfig(IfxIom_Iom_LamConfig *lamConfig);
285
286 /** \brief Initializes the Event Combiner Module for Global event
287 * \param iom Specifies handle to IOM module.
288 * \param ecmConfig Specifies the ECM block configuration structure
289 * \return Return TRUE if valid initialization otherwise FALSE
290 *
291 * Usage example: see \ref IfxLld_Iom_Iom_Usage
292 *
293 */
294 IFX_EXTERN boolean IfxIom_Iom_initCombiner(IfxIom_Iom *iom, const IfxIom_Iom_EcmConfig *ecmConfig);
295
296 /** \brief Initializes the default Event Combiner Module buffer
297 * \param ecmConfig Specifies the ECM block configuration structure
298 * \return None
299 *
300 * Usage example: see \ref IfxLld_Iom_Iom_Usage
301 *
302 */
303 IFX_EXTERN void IfxIom_Iom_initCombinerConfig(IfxIom_Iom_EcmConfig *ecmConfig);
304
305 /** \brief Initializes the Filter & Prescaler Cell for filtering the signals.
306 * \param iom Specifies handle to IOM module.
307 * \param fpcConfig Specifies Filter and Prescaler Cell configuration.
308 * \return Return TRUE if valid initialization otherwise FALSE
309 *
310 * Usage example: see \ref IfxLld_Iom_Iom_Usage
311 *
312 */
313 IFX_EXTERN boolean IfxIom_Iom_initFpcChannel(IfxIom_Iom *iom, const IfxIom_Iom_FpcConfig *fpcConfig);
314
315 /** \brief Initializes the default Filter & Prescaler Cell buffer
316 * \param fpcConfig Specifies Filter and Prescaler Cell configuration.
317 * \return None
318 *
319 * Usage example: see \ref IfxLld_Iom_Iom_Usage
320 *
321 */
322 IFX_EXTERN void IfxIom_Iom_initFpcChannelConfig(IfxIom_Iom_FpcConfig *fpcConfig);
323
324 /** \brief Initialize the IOM module with supplied configuration.
325 * \param iom Specifies handle to IOM module.
326 * \return Return TRUE if valid module initialization otherwise FALSE.
327 *
328 * Usage example: see \ref IfxLld_Iom_Iom_Usage
329 *
330 */
331 IFX_EXTERN boolean IfxIom_Iom_initModule(IfxIom_Iom *iom);
332
333 /** \brief Initializes the Module default configuration buffer.
334 * \param iom Specifies the IOM configuration structure
335 * \param module Specifies handle to IOM module.
336 * \return None
337 *
338 * Usage example: see \ref IfxLld_Iom_Iom_Usage
339 *
340 */
341 IFX_EXTERN void IfxIom_Iom_initModuleConfig(IfxIom_Iom *iom, Ifx_IOM *module);
342
343 /** \} */
344
345 /** \addtogroup IfxLld_Iom_Iom_obsoleteInterface_Operative
346 * \{ */
347
348 /******************************************************************************/
349 /*-------------------------Global Function Prototypes-------------------------*/
350 /******************************************************************************/
351
352 /** \brief clear the falling and rising edges which are detected.
353 * \param fpcConfig Specifies Filter and Prescaler Cell configuration.
354 * \param iom Specifies handle to IOM module.
355 * \return None
356 *
357 * Usage example: see \ref IfxLld_Iom_Iom_Usage
358 *
359 */
360 IFX_EXTERN void IfxIom_Iom_clearFpcEdges(IfxIom_Iom_FpcConfig *fpcConfig, IfxIom_Iom *iom);
361
362 /** \} */
363
364 #endif /* IFXIOM_IOM_H */
IfxIom_Iom_EcmGlobalEventSelectionBits::countedEventCombinerSelection3
uint32 countedEventCombinerSelection3
Determines the inclusion of the respective channel event counter output (1 of 4) in the generation of...
Definition: IfxIom_Iom.h:179
IfxIom_Iom_initModule
IFX_EXTERN boolean IfxIom_Iom_initModule(IfxIom_Iom *iom)
Initialize the IOM module with supplied configuration.
Definition: IfxIom_Iom.c:234
IfxIom_Iom_EcmGlobalEventSelectionBits::eventCombinerSelection12
uint32 eventCombinerSelection12
Determines the inclusion of the channel12 event in the generation of the global event.
Definition: IfxIom_Iom.h:172
IfxIom_Iom_EcmGlobalEventSelectionBits::eventCombinerSelection2
uint32 eventCombinerSelection2
Determines the inclusion of the channel2 event in the generation of the global event.
Definition: IfxIom_Iom.h:162
IfxIom_Iom_EcmGlobalEventSelectionBits::eventCombinerSelection8
uint32 eventCombinerSelection8
Determines the inclusion of the channel8 event in the generation of the global event.
Definition: IfxIom_Iom.h:168
IfxIom_Iom_LamConfig::lamReferenceInputChannel
IfxIom_LamReferenceInputChannel lamReferenceInputChannel
Specifies which FPC/mux block reference output signal is to be used for LAM block.
Definition: IfxIom_Iom.h:245
IfxIom_Iom_EcmGlobalEventSelectionBits::eventCombinerSelection5
uint32 eventCombinerSelection5
Determines the inclusion of the channel5 event in the generation of the global event.
Definition: IfxIom_Iom.h:165
IfxIom_Iom_initAnalyser
IFX_EXTERN boolean IfxIom_Iom_initAnalyser(IfxIom_Iom *iom, const IfxIom_Iom_LamConfig *lamConfig)
Initializes the Logic Analyser Module for internal event generation.
Definition: IfxIom_Iom.c:90
IfxIom_Iom_LamConfig::lamId
IfxIom_LamId lamId
Specifies Id of Logic Analyser Module.
Definition: IfxIom_Iom.h:238
IfxIom.h
IOM basic functionality.
IfxIom_Iom::iom
Ifx_IOM * iom
Specifies the pointer to IOM registers.
Definition: IfxIom_Iom.h:209
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxIom_Iom_EcmGlobalEventSelectionBits::eventCombinerSelection3
uint32 eventCombinerSelection3
Determines the inclusion of the channel3 event in the generation of the global event.
Definition: IfxIom_Iom.h:163
IfxIom_Iom_EcmGlobalEventSelectionBits::eventCombinerSelection14
uint32 eventCombinerSelection14
Determines the inclusion of the channel14 event in the generation of the global event.
Definition: IfxIom_Iom.h:174
IfxIom_LamRunMode
IfxIom_LamRunMode
LAMCFG[lamId].RMS, Specifies whether the event window generation is free-running or gated with the mo...
Definition: IfxIom.h:343
IfxIom_Iom_FpcConfig::filterMode
IfxIom_FilterMode filterMode
Specifies the Filter & Prescaler Cell mode.
Definition: IfxIom_Iom.h:228
IfxIom_Iom_EcmGlobalEventSelectionBits::eventCombinerSelection6
uint32 eventCombinerSelection6
Determines the inclusion of the channel6 event in the generation of the global event.
Definition: IfxIom_Iom.h:166
IfxIom_Iom_initFpcChannelConfig
IFX_EXTERN void IfxIom_Iom_initFpcChannelConfig(IfxIom_Iom_FpcConfig *fpcConfig)
Initializes the default Filter & Prescaler Cell buffer.
Definition: IfxIom_Iom.c:216
IfxIom_EventCounterChannel
IfxIom_EventCounterChannel
ECMCCFG.SELCx(x= 0,1,2,3), Specifies which channel event output is to be routed to counterCn...
Definition: IfxIom.h:202
IfxIom_LamMonitorInputChannel
IfxIom_LamMonitorInputChannel
LAMCFG[lamId].MCS, Specifies which FPC/mux block monitor output signal is to be used for LAM block...
Definition: IfxIom.h:291
IfxIom_Iom_LamConfig::referenceSignalInverted
boolean referenceSignalInverted
Specifies whether the reference signal from the FPC channel to LAM is inverted or not...
Definition: IfxIom_Iom.h:242
IfxIom_Iom_LamConfig::eventActiveEdgeSelection
IfxIom_EventActiveEdgeSelection eventActiveEdgeSelection
Specifies which active edges of the monitor and reference signals are used for the event window gener...
Definition: IfxIom_Iom.h:249
IfxIom_Iom_EcmGlobalEventSelectionBits::eventCombinerSelection7
uint32 eventCombinerSelection7
Determines the inclusion of the channel7 event in the generation of the global event.
Definition: IfxIom_Iom.h:167
IfxIom_Iom_initCombinerConfig
IFX_EXTERN void IfxIom_Iom_initCombinerConfig(IfxIom_Iom_EcmConfig *ecmConfig)
Initializes the default Event Combiner Module buffer.
Definition: IfxIom_Iom.c:162
IfxIom_Iom_EcmGlobalEventSelectionBits::eventCombinerSelection11
uint32 eventCombinerSelection11
Determines the inclusion of the channel11 event in the generation of the global event.
Definition: IfxIom_Iom.h:171
IfxIom_EdgeClearType
IfxIom_EdgeClearType
Specifies the edge type which need to be cleared.
Definition: IfxIom.h:171
IfxIom_Iom_FpcConfig::timerReset
boolean timerReset
Specifies the timer reset bit.
Definition: IfxIom_Iom.h:225
IfxIom_Iom_FpcConfig::monitorSignal
IfxIom_MonitorSignal monitorSignal
Specifies the monitor signal input for Filter & Prescaler cell.
Definition: IfxIom_Iom.h:226
IfxIom_EventCounterThreshold
IfxIom_EventCounterThreshold
ECMCCFG.THRCx(x= 0,1,2,3), Specifies the threshold count value. Upon the counter meeting the threshol...
Definition: IfxIom.h:224
IfxIom_Iom_EcmConfig
Specifies the ECM block configuration structure.
Definition: IfxIom_Iom.h:214
IfxIom_Iom_EcmConfigCounter::input
IfxIom_EventCounterChannel input
Specifies which channel output event to be routed to the Counter.
Definition: IfxIom_Iom.h:189
IfxIom_Iom_EcmGlobalEventSelectionBits::eventCombinerSelection4
uint32 eventCombinerSelection4
Determines the inclusion of the channel4 event in the generation of the global event.
Definition: IfxIom_Iom.h:164
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxIom_Iom_FpcConfig::edgeType
IfxIom_EdgeClearType edgeType
Specifies the edge type which need to be cleared.
Definition: IfxIom_Iom.h:230
IfxIom_Iom_clearFpcEdges
IFX_EXTERN void IfxIom_Iom_clearFpcEdges(IfxIom_Iom_FpcConfig *fpcConfig, IfxIom_Iom *iom)
clear the falling and rising edges which are detected.
Definition: IfxIom_Iom.c:53
IfxIom_EventActiveEdgeSelection
IfxIom_EventActiveEdgeSelection
LAMCFG[lamId].EDS, Specifies which active edges of the monitor and reference signals are used for the...
Definition: IfxIom.h:180
IfxIom_Iom_LamConfig::eventWindowThreshold
uint32 eventWindowThreshold
This bit field determines the threshold value for the event window counter from which an event is gen...
Definition: IfxIom_Iom.h:239
IfxIom_Iom_FpcConfig
Specifies Filter and Prescaler Cell configuration.
Definition: IfxIom_Iom.h:222
IfxIom_Iom_LamConfig::lamMode
IfxIom_LamRunMode lamMode
Specifies whether the event window generation is free-running or gated with the monitor or reference...
Definition: IfxIom_Iom.h:247
IfxIom_Iom_EcmGlobalEventSelectionBits
Event Combiner Module Global Event Selection Bit Field.
Definition: IfxIom_Iom.h:158
IfxIom_Iom_EcmGlobalEventSelectionBits::reserved
uint32 reserved
reserved
Definition: IfxIom_Iom.h:180
IfxIom_Iom_EcmGlobalEventSelectionBits::countedEventCombinerSelection0
uint32 countedEventCombinerSelection0
Determines the inclusion of the respective channel event counter output (1 of 4) in the generation of...
Definition: IfxIom_Iom.h:176
IfxIom_Iom_EcmGlobalEventSelectionBits::eventCombinerSelection10
uint32 eventCombinerSelection10
Determines the inclusion of the channel10 event in the generation of the global event.
Definition: IfxIom_Iom.h:170
IfxIom_MonitorSignal
IfxIom_MonitorSignal
FPCCTR[channelId].ISM, Specifies the monitor signal input for Filter & Prescaler cell.
Definition: IfxIom.h:352
IfxIom_Iom_EcmGlobalEventSelection
Event Combiner Module Global Event Selection.
Definition: IfxIom_Iom.h:195
IfxIom_Iom_initFpcChannel
IFX_EXTERN boolean IfxIom_Iom_initFpcChannel(IfxIom_Iom *iom, const IfxIom_Iom_FpcConfig *fpcConfig)
Initializes the Filter & Prescaler Cell for filtering the signals.
Definition: IfxIom_Iom.c:175
IfxIom_Iom_FpcConfig::referenceSignal
IfxIom_ReferenceSignal referenceSignal
Specifies the reference signal input for Filter & Prescaler cell.
Definition: IfxIom_Iom.h:227
IfxIom_Iom_EcmGlobalEventSelectionBits::countedEventCombinerSelection2
uint32 countedEventCombinerSelection2
Determines the inclusion of the respective channel event counter output (1 of 4) in the generation of...
Definition: IfxIom_Iom.h:178
IfxIom_LamId
IfxIom_LamId
Specifies the Logic Module Analyser Module Number.
Definition: IfxIom.h:136
IfxIom_Iom_deInitModule
IFX_EXTERN void IfxIom_Iom_deInitModule(IfxIom_Iom *iom)
Reset the IOM module.
Definition: IfxIom_Iom.c:84
IfxIom_Iom_EcmConfigCounter
Definition: IfxIom_Iom.h:187
IfxIom_Iom_LamConfig::monitorSignalInverted
boolean monitorSignalInverted
Specifies whether the monitor signal from the FPC channel to LAM is inverted or not.
Definition: IfxIom_Iom.h:241
IfxIom_Iom_FpcConfig::channelId
IfxIom_FpcChannelId channelId
Specifies the number of Filter & Prescaler Cell channel.
Definition: IfxIom_Iom.h:229
IfxIom_Iom_EcmConfig::globalEventSelection
IfxIom_Iom_EcmGlobalEventSelection globalEventSelection
Specifies which channel event & which counted event to be included in global event generation...
Definition: IfxIom_Iom.h:217
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxIom_Iom_LamConfig::eventWindowInverted
boolean eventWindowInverted
Specifies whether the event window polarity is inverted or not.
Definition: IfxIom_Iom.h:248
IfxIom_Iom_EcmConfigCounter::threshold
IfxIom_EventCounterThreshold threshold
Specifies the Counter threshold value.
Definition: IfxIom_Iom.h:190
IfxIom_FilterMode
IfxIom_FilterMode
FPCCTR[channelId].MOD, Specifies the Filter & Prescaler Cell mode.
Definition: IfxIom.h:255
IfxIom_EventSource
IfxIom_EventSource
LAMCFG[lamId].EWS, Specifies whether the event window generation is from the monitor or reference sig...
Definition: IfxIom.h:247
IfxIom_LamReferenceInputChannel
IfxIom_LamReferenceInputChannel
LAMCFG[lamId].RCS, Specifies which FPC/mux block reference output signal is to be used for LAM block...
Definition: IfxIom.h:321
IfxIom_Iom_EcmGlobalEventSelectionBits::eventCombinerSelection9
uint32 eventCombinerSelection9
Determines the inclusion of the channel9 event in the generation of the global event.
Definition: IfxIom_Iom.h:169
IfxIom_LamMonitorSource
IfxIom_LamMonitorSource
LAMCFG[lamId].MOS, Specifies whether the monitor signal from the FPC monitor channel is sourced direc...
Definition: IfxIom.h:313
IfxIom_Iom_initAnalyserConfig
IFX_EXTERN void IfxIom_Iom_initAnalyserConfig(IfxIom_Iom_LamConfig *lamConfig)
Initializes the default Logic Analyser Module buffer.
Definition: IfxIom_Iom.c:121
IfxIom_FpcChannelId
IfxIom_FpcChannelId
Specifies the number of Filter & Prescaler Cell channel Id.
Definition: IfxIom.h:269
IfxIom_Iom
Specifies handle to IOM module.
Definition: IfxIom_Iom.h:207
IfxIom_Iom_EcmGlobalEventSelection::B
IfxIom_Iom_EcmGlobalEventSelectionBits B
Definition: IfxIom_Iom.h:197
IfxIom_Iom_LamConfig::lamMonitorSource
IfxIom_LamMonitorSource lamMonitorSource
Specifies whether the monitor signal from the FPC monitor channel is sourced directly or compared wit...
Definition: IfxIom_Iom.h:246
IfxIom_Iom_initCombiner
IFX_EXTERN boolean IfxIom_Iom_initCombiner(IfxIom_Iom *iom, const IfxIom_Iom_EcmConfig *ecmConfig)
Initializes the Event Combiner Module for Global event.
Definition: IfxIom_Iom.c:137
IfxIom_Iom_EcmGlobalEventSelectionBits::eventCombinerSelection0
uint32 eventCombinerSelection0
Determines the inclusion of the channel0 event in the generation of the global event.
Definition: IfxIom_Iom.h:160
IfxIom_Iom_LamConfig::eventSource
IfxIom_EventSource eventSource
Specifies whether the event window generation is from the monitor or reference signal.
Definition: IfxIom_Iom.h:243
IfxIom_Iom_EcmGlobalEventSelection::U
uint32 U
Definition: IfxIom_Iom.h:198
IfxIom_Iom_initModuleConfig
IFX_EXTERN void IfxIom_Iom_initModuleConfig(IfxIom_Iom *iom, Ifx_IOM *module)
Initializes the Module default configuration buffer.
Definition: IfxIom_Iom.c:255
IfxIom_Iom_EcmGlobalEventSelectionBits::eventCombinerSelection13
uint32 eventCombinerSelection13
Determines the inclusion of the channel13 event in the generation of the global event.
Definition: IfxIom_Iom.h:173
IfxIom_Iom_LamConfig::lamMonitorInputChannel
IfxIom_LamMonitorInputChannel lamMonitorInputChannel
Specifies which FPC/mux block monitor output signal is to be used for LAM block.
Definition: IfxIom_Iom.h:244
IfxIom_Iom_FpcConfig::comparatorThreshold
uint16 comparatorThreshold
Specifies the threshold value that is compared with timer.
Definition: IfxIom_Iom.h:224
IfxIom_Iom_EcmGlobalEventSelectionBits::countedEventCombinerSelection1
uint32 countedEventCombinerSelection1
Determines the inclusion of the respective channel event counter output (1 of 4) in the generation of...
Definition: IfxIom_Iom.h:177
IfxIom_Iom_EcmGlobalEventSelectionBits::eventCombinerSelection15
uint32 eventCombinerSelection15
Determines the inclusion of the channel15 event in the generation of the global event.
Definition: IfxIom_Iom.h:175
IfxIom_ReferenceSignal
IfxIom_ReferenceSignal
FPCCTR[channelId].ISR,Specifies the reference signal input for Filter & Prescaler cell...
Definition: IfxIom.h:362
IfxIom_Iom_LamConfig
Specifies Logic Analyser Module configuration.
Definition: IfxIom_Iom.h:236
IfxIom_Iom_EcmGlobalEventSelectionBits::eventCombinerSelection1
uint32 eventCombinerSelection1
Determines the inclusion of the channel1 event in the generation of the global event.
Definition: IfxIom_Iom.h:161


iLLD_TC38A: IfxIom_cfg.h Source File

  • _Impl
IfxIom_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxIom_cfg.h
3 * \brief IOM on-chip implementation data
4 * \ingroup IfxLld_Iom
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Iom IOM
42 * \ingroup IfxLld
43 * \defgroup IfxLld_Iom_Impl Implementation
44 * \ingroup IfxLld_Iom
45 * \defgroup IfxLld_Iom_Std Standard Driver
46 * \ingroup IfxLld_Iom
47 * \defgroup IfxLld_Iom_Impl_Enum Enum input signals
48 * \ingroup IfxLld_Iom_Impl
49 * \defgroup IfxLld_Iom_Impl_Enumeration Enumeration inputs
50 * \ingroup IfxLld_Iom_Impl
51 */
52
53 #ifndef IFXIOM_CFG_H
54 #define IFXIOM_CFG_H 1
55
56 /******************************************************************************/
57 /*----------------------------------Includes----------------------------------*/
58 /******************************************************************************/
59
60 /******************************************************************************/
61 /*-----------------------------------Macros-----------------------------------*/
62 /******************************************************************************/
63
64 /** \brief Specifies maximum number of channels
65 */
66 #define IFXIOM_NUM_CHANNELS 16
67
68 /******************************************************************************/
69 /*--------------------------------Enumerations--------------------------------*/
70 /******************************************************************************/
71
72 /** \addtogroup IfxLld_Iom_Impl_Enum
73 * \{ */
74 /** \brief IOM_FPCCTRk.ISM
75 */
76 typedef enum
77 {
78 IfxIom_MonInputSignal_p = 0, /**< \brief Signal input Pn_IN (from portlogic) selected */
79 IfxIom_MonInputSignal_0 = 1, /**< \brief Monitor Signal Input 0 selected */
80 IfxIom_MonInputSignal_1 = 2, /**< \brief Monitor Signal Input 1 selected */
81 IfxIom_MonInputSignal_2 = 3 /**< \brief Monitor Signal Input 2 selected */
82 } IfxIom_MonInputSignal;
83
84 /** \brief IOM_FPCCTRk.ISR
85 */
86 typedef enum
87 {
88 IfxIom_RefInputSignal_p = 0, /**< \brief Signal input Pn_IN (from portlogic) selected */
89 IfxIom_RefInputSignal_0 = 1, /**< \brief Monitor Signal Input 0 selected */
90 IfxIom_RefInputSignal_1 = 2, /**< \brief Monitor Signal Input 1 selected */
91 IfxIom_RefInputSignal_2 = 3, /**< \brief Monitor Signal Input 2 selected */
92 IfxIom_RefInputSignal_xorCombiner = 4 /**< \brief GTM XOR Combiner selected */
93 } IfxIom_RefInputSignal;
94
95 /** \} */
96
97 /** \addtogroup IfxLld_Iom_Impl_Enumeration
98 * \{ */
99 /** \brief LAM mon inputs
100 */
101 typedef enum
102 {
103 IfxIom_MonInput_p33_0 = (IfxIom_MonInputSignal_p << 8) | 0x0, /**< \brief Value=0xXXYY where XX=ISM, YY=k */
104 IfxIom_MonInput_p33_1 = (IfxIom_MonInputSignal_p << 8) | 0x1,
105 IfxIom_MonInput_p33_2 = (IfxIom_MonInputSignal_p << 8) | 0x2,
106 IfxIom_MonInput_p33_3 = (IfxIom_MonInputSignal_p << 8) | 0x3,
107 IfxIom_MonInput_p33_4 = (IfxIom_MonInputSignal_p << 8) | 0x4,
108 IfxIom_MonInput_p33_5 = (IfxIom_MonInputSignal_p << 8) | 0x5,
109 IfxIom_MonInput_p33_6 = (IfxIom_MonInputSignal_p << 8) | 0x6,
110 IfxIom_MonInput_p33_7 = (IfxIom_MonInputSignal_p << 8) | 0x7,
111 IfxIom_MonInput_p33_8 = (IfxIom_MonInputSignal_p << 8) | 0x8,
112 IfxIom_MonInput_p33_9 = (IfxIom_MonInputSignal_p << 8) | 0x9,
113 IfxIom_MonInput_p33_10 = (IfxIom_MonInputSignal_p << 8) | 0xa,
114 IfxIom_MonInput_p33_11 = (IfxIom_MonInputSignal_p << 8) | 0xb,
115 IfxIom_MonInput_p33_12 = (IfxIom_MonInputSignal_p << 8) | 0xc,
116 IfxIom_MonInput_p20_12 = (IfxIom_MonInputSignal_p << 8) | 0xd,
117 IfxIom_MonInput_p20_13 = (IfxIom_MonInputSignal_p << 8) | 0xe,
118 IfxIom_MonInput_p20_14 = (IfxIom_MonInputSignal_p << 8) | 0xf,
119 IfxIom_MonInput_gtmTout22 = (IfxIom_MonInputSignal_0 << 8) | 0x0,
120 IfxIom_MonInput_gtmTout23 = (IfxIom_MonInputSignal_0 << 8) | 0x1,
121 IfxIom_MonInput_gtmTout24 = (IfxIom_MonInputSignal_0 << 8) | 0x2,
122 IfxIom_MonInput_gtmTout25 = (IfxIom_MonInputSignal_0 << 8) | 0x3,
123 IfxIom_MonInput_gtmTout26 = (IfxIom_MonInputSignal_0 << 8) | 0x4,
124 IfxIom_MonInput_gtmTout27 = (IfxIom_MonInputSignal_0 << 8) | 0x5,
125 IfxIom_MonInput_gtmTout28 = (IfxIom_MonInputSignal_0 << 8) | 0x6,
126 IfxIom_MonInput_gtmTout29 = (IfxIom_MonInputSignal_0 << 8) | 0x7,
127 IfxIom_MonInput_gtmTout30 = (IfxIom_MonInputSignal_0 << 8) | 0x8,
128 IfxIom_MonInput_gtmTout31 = (IfxIom_MonInputSignal_0 << 8) | 0x9,
129 IfxIom_MonInput_gtmTout32 = (IfxIom_MonInputSignal_0 << 8) | 0xa,
130 IfxIom_MonInput_gtmTout33 = (IfxIom_MonInputSignal_0 << 8) | 0xb,
131 IfxIom_MonInput_gtmTout34 = (IfxIom_MonInputSignal_0 << 8) | 0xc,
132 IfxIom_MonInput_gtmTout68 = (IfxIom_MonInputSignal_0 << 8) | 0xd,
133 IfxIom_MonInput_gtmTout69 = (IfxIom_MonInputSignal_0 << 8) | 0xe,
134 IfxIom_MonInput_gtmTout70 = (IfxIom_MonInputSignal_0 << 8) | 0xf,
135 IfxIom_MonInput_ccu60Cc62 = (IfxIom_MonInputSignal_1 << 8) | 0x0,
136 IfxIom_MonInput_ccu60Cc61 = (IfxIom_MonInputSignal_1 << 8) | 0x1,
137 IfxIom_MonInput_ccu60Cc60 = (IfxIom_MonInputSignal_1 << 8) | 0x2,
138 IfxIom_MonInput_ccu60Cout60 = (IfxIom_MonInputSignal_1 << 8) | 0x3,
139 IfxIom_MonInput_ccu60Cout61 = (IfxIom_MonInputSignal_1 << 8) | 0x4,
140 IfxIom_MonInput_ccu60Cout62 = (IfxIom_MonInputSignal_1 << 8) | 0x5,
141 IfxIom_MonInput_ccu60Cout63 = (IfxIom_MonInputSignal_1 << 8) | 0x6,
142 IfxIom_MonInput_ccu61Cout63 = (IfxIom_MonInputSignal_1 << 8) | 0x7,
143 IfxIom_MonInput_ccu61Cc60 = (IfxIom_MonInputSignal_1 << 8) | 0x8,
144 IfxIom_MonInput_ccu61Cc61 = (IfxIom_MonInputSignal_1 << 8) | 0x9,
145 IfxIom_MonInput_ccu61Cc62 = (IfxIom_MonInputSignal_1 << 8) | 0xa,
146 IfxIom_MonInput_ccu61Cout60 = (IfxIom_MonInputSignal_1 << 8) | 0xb,
147 IfxIom_MonInput_ccu61Cout61 = (IfxIom_MonInputSignal_1 << 8) | 0xc,
148 IfxIom_MonInput_ccu61Cout62 = (IfxIom_MonInputSignal_1 << 8) | 0xd,
149 IfxIom_MonInput_psi5Psitx0 = (IfxIom_MonInputSignal_1 << 8) | 0xe,
150 IfxIom_MonInput_psi5Psitx1 = (IfxIom_MonInputSignal_1 << 8) | 0xf,
151 IfxIom_MonInput_qspi0Mrst = (IfxIom_MonInputSignal_2 << 8) | 0x0,
152 IfxIom_MonInput_qspi1Mrst = (IfxIom_MonInputSignal_2 << 8) | 0x1,
153 IfxIom_MonInput_qspi2Mrst = (IfxIom_MonInputSignal_2 << 8) | 0x2,
154 IfxIom_MonInput_qspi3Mrst = (IfxIom_MonInputSignal_2 << 8) | 0x3,
155 IfxIom_MonInput_gnd = (IfxIom_MonInputSignal_2 << 8) | 0x4,
156 IfxIom_MonInput_canNode0Txd = (IfxIom_MonInputSignal_2 << 8) | 0x5,
157 IfxIom_MonInput_canNode1Txd = (IfxIom_MonInputSignal_2 << 8) | 0x6,
158 IfxIom_MonInput_canNode2Txd = (IfxIom_MonInputSignal_2 << 8) | 0x7,
159 IfxIom_MonInput_canNode3Txd = (IfxIom_MonInputSignal_2 << 8) | 0x8,
160 IfxIom_MonInput_gtmTout104 = (IfxIom_MonInputSignal_2 << 8) | 0x9,
161 IfxIom_MonInput_gtmTout105 = (IfxIom_MonInputSignal_2 << 8) | 0xa,
162 IfxIom_MonInput_gtmTout106 = (IfxIom_MonInputSignal_2 << 8) | 0xb,
163 IfxIom_MonInput_asclin0Atx = (IfxIom_MonInputSignal_2 << 8) | 0xc,
164 IfxIom_MonInput_asclin1Atx = (IfxIom_MonInputSignal_2 << 8) | 0xd,
165 IfxIom_MonInput_asclin2Atx = (IfxIom_MonInputSignal_2 << 8) | 0xe,
166 IfxIom_MonInput_asclin3Atx = (IfxIom_MonInputSignal_2 << 8) | 0xf
167 } IfxIom_MonInput;
168
169 /** \brief LAM ref inputs
170 */
171 typedef enum
172 {
173 IfxIom_RefInput_p33_0 = (IfxIom_RefInputSignal_p << 8) | 0x0,
174 IfxIom_RefInput_p33_1 = (IfxIom_RefInputSignal_p << 8) | 0x1,
175 IfxIom_RefInput_p33_2 = (IfxIom_RefInputSignal_p << 8) | 0x2,
176 IfxIom_RefInput_p33_3 = (IfxIom_RefInputSignal_p << 8) | 0x3,
177 IfxIom_RefInput_p33_4 = (IfxIom_RefInputSignal_p << 8) | 0x4,
178 IfxIom_RefInput_p33_5 = (IfxIom_RefInputSignal_p << 8) | 0x5,
179 IfxIom_RefInput_p33_6 = (IfxIom_RefInputSignal_p << 8) | 0x6,
180 IfxIom_RefInput_p33_7 = (IfxIom_RefInputSignal_p << 8) | 0x7,
181 IfxIom_RefInput_p33_8 = (IfxIom_RefInputSignal_p << 8) | 0x8,
182 IfxIom_RefInput_p33_9 = (IfxIom_RefInputSignal_p << 8) | 0x9,
183 IfxIom_RefInput_p33_10 = (IfxIom_RefInputSignal_p << 8) | 0xa,
184 IfxIom_RefInput_p33_11 = (IfxIom_RefInputSignal_p << 8) | 0xb,
185 IfxIom_RefInput_p33_12 = (IfxIom_RefInputSignal_p << 8) | 0xc,
186 IfxIom_RefInput_p20_12 = (IfxIom_RefInputSignal_p << 8) | 0xd,
187 IfxIom_RefInput_p20_13 = (IfxIom_RefInputSignal_p << 8) | 0xe,
188 IfxIom_RefInput_p20_14 = (IfxIom_RefInputSignal_p << 8) | 0xf,
189 IfxIom_RefInput_gtmTout0 = (IfxIom_RefInputSignal_0 << 8) | 0x0,
190 IfxIom_RefInput_gtmTout1 = (IfxIom_RefInputSignal_0 << 8) | 0x1,
191 IfxIom_RefInput_gtmTout2 = (IfxIom_RefInputSignal_0 << 8) | 0x2,
192 IfxIom_RefInput_gtmTout3 = (IfxIom_RefInputSignal_0 << 8) | 0x3,
193 IfxIom_RefInput_gtmTout4 = (IfxIom_RefInputSignal_0 << 8) | 0x4,
194 IfxIom_RefInput_gtmTout5 = (IfxIom_RefInputSignal_0 << 8) | 0x5,
195 IfxIom_RefInput_gtmTout6 = (IfxIom_RefInputSignal_0 << 8) | 0x6,
196 IfxIom_RefInput_gtmTout7 = (IfxIom_RefInputSignal_0 << 8) | 0x7,
197 IfxIom_RefInput_gtmTout8 = (IfxIom_RefInputSignal_0 << 8) | 0x8,
198 IfxIom_RefInput_gtmTout9 = (IfxIom_RefInputSignal_0 << 8) | 0x9,
199 IfxIom_RefInput_gtmTout10 = (IfxIom_RefInputSignal_0 << 8) | 0xa,
200 IfxIom_RefInput_gtmTout11 = (IfxIom_RefInputSignal_0 << 8) | 0xb,
201 IfxIom_RefInput_gtmTout12 = (IfxIom_RefInputSignal_0 << 8) | 0xc,
202 IfxIom_RefInput_gtmTout13 = (IfxIom_RefInputSignal_0 << 8) | 0xd,
203 IfxIom_RefInput_gtmTout14 = (IfxIom_RefInputSignal_0 << 8) | 0xe,
204 IfxIom_RefInput_gtmTout15 = (IfxIom_RefInputSignal_0 << 8) | 0xf,
205 IfxIom_RefInput_ccu60Cout63 = (IfxIom_RefInputSignal_1 << 8) | 0x0,
206 IfxIom_RefInput_ccu60Cout62 = (IfxIom_RefInputSignal_1 << 8) | 0x1,
207 IfxIom_RefInput_ccu60Cout61 = (IfxIom_RefInputSignal_1 << 8) | 0x2,
208 IfxIom_RefInput_ccu60Cout60 = (IfxIom_RefInputSignal_1 << 8) | 0x3,
209 IfxIom_RefInput_ccu60Cc62 = (IfxIom_RefInputSignal_1 << 8) | 0x4,
210 IfxIom_RefInput_ccu60Cc61 = (IfxIom_RefInputSignal_1 << 8) | 0x5,
211 IfxIom_RefInput_ccu60Cc60 = (IfxIom_RefInputSignal_1 << 8) | 0x6,
212 IfxIom_RefInput_ccu61Cout63 = (IfxIom_RefInputSignal_1 << 8) | 0x7,
213 IfxIom_RefInput_ccu61Cout62 = (IfxIom_RefInputSignal_1 << 8) | 0x8,
214 IfxIom_RefInput_ccu61Cout61 = (IfxIom_RefInputSignal_1 << 8) | 0x9,
215 IfxIom_RefInput_ccu61Cout60 = (IfxIom_RefInputSignal_1 << 8) | 0xa,
216 IfxIom_RefInput_ccu61Cc62 = (IfxIom_RefInputSignal_1 << 8) | 0xb,
217 IfxIom_RefInput_ccu61Cc61 = (IfxIom_RefInputSignal_1 << 8) | 0xc,
218 IfxIom_RefInput_ccu61Cc60 = (IfxIom_RefInputSignal_1 << 8) | 0xd,
219 IfxIom_RefInput_psi5Psitx0 = (IfxIom_RefInputSignal_1 << 8) | 0xe,
220 IfxIom_RefInput_psi5Psitx2 = (IfxIom_RefInputSignal_1 << 8) | 0xf,
221 IfxIom_RefInput_qspi0Mrst = (IfxIom_RefInputSignal_2 << 8) | 0x0,
222 IfxIom_RefInput_qspi1Mrst = (IfxIom_RefInputSignal_2 << 8) | 0x1,
223 IfxIom_RefInput_qspi2Mrst = (IfxIom_RefInputSignal_2 << 8) | 0x2,
224 IfxIom_RefInput_qspi3Mrst = (IfxIom_RefInputSignal_2 << 8) | 0x3,
225 IfxIom_RefInput_gnd = (IfxIom_RefInputSignal_2 << 8) | 0x4,
226 IfxIom_RefInput_canNode0Txd = (IfxIom_RefInputSignal_2 << 8) | 0x5,
227 IfxIom_RefInput_canNode1Txd = (IfxIom_RefInputSignal_2 << 8) | 0x6,
228 IfxIom_RefInput_canNode2Txd = (IfxIom_RefInputSignal_2 << 8) | 0x7,
229 IfxIom_RefInput_canNode3Txd = (IfxIom_RefInputSignal_2 << 8) | 0x8,
230 IfxIom_RefInput_gtmTout107 = (IfxIom_RefInputSignal_2 << 8) | 0x9,
231 IfxIom_RefInput_gtmTout108 = (IfxIom_RefInputSignal_2 << 8) | 0xa,
232 IfxIom_RefInput_gtmTout109 = (IfxIom_RefInputSignal_2 << 8) | 0xb,
233 IfxIom_RefInput_asclin0Atx = (IfxIom_RefInputSignal_2 << 8) | 0xc,
234 IfxIom_RefInput_asclin1Atx = (IfxIom_RefInputSignal_2 << 8) | 0xd,
235 IfxIom_RefInput_asclin2Atx = (IfxIom_RefInputSignal_2 << 8) | 0xe,
236 IfxIom_RefInput_asclin3Atx = (IfxIom_RefInputSignal_2 << 8) | 0xf,
237 IfxIom_RefInput_exorCombiner = (IfxIom_RefInputSignal_xorCombiner << 8) | 0x0
238 } IfxIom_RefInput;
239
240 /** \} */
241
242 #endif /* IFXIOM_CFG_H */
IfxIom_RefInput_gtmTout6
Definition: IfxIom_cfg.h:195
IfxIom_MonInput_gtmTout69
Definition: IfxIom_cfg.h:133
IfxIom_MonInput_p33_12
Definition: IfxIom_cfg.h:115
IfxIom_MonInput_qspi1Mrst
Definition: IfxIom_cfg.h:152
IfxIom_RefInput_gtmTout2
Definition: IfxIom_cfg.h:191
IfxIom_MonInput_gtmTout27
Definition: IfxIom_cfg.h:124
IfxIom_MonInput_ccu61Cout63
Definition: IfxIom_cfg.h:142
IfxIom_MonInput_gtmTout34
Definition: IfxIom_cfg.h:131
IfxIom_MonInput_p33_5
Definition: IfxIom_cfg.h:108
IfxIom_RefInput_qspi2Mrst
Definition: IfxIom_cfg.h:223
IfxIom_RefInput_ccu60Cout60
Definition: IfxIom_cfg.h:208
IfxIom_RefInput_p33_0
Definition: IfxIom_cfg.h:173
IfxIom_RefInput_ccu61Cout62
Definition: IfxIom_cfg.h:213
IfxIom_RefInput_p20_13
Definition: IfxIom_cfg.h:187
IfxIom_RefInput_ccu60Cc61
Definition: IfxIom_cfg.h:210
IfxIom_MonInput_canNode1Txd
Definition: IfxIom_cfg.h:157
IfxIom_MonInput_asclin2Atx
Definition: IfxIom_cfg.h:165
IfxIom_RefInput_ccu61Cc61
Definition: IfxIom_cfg.h:217
IfxIom_MonInput_p33_11
Definition: IfxIom_cfg.h:114
IfxIom_MonInput_qspi2Mrst
Definition: IfxIom_cfg.h:153
IfxIom_MonInput_gtmTout28
Definition: IfxIom_cfg.h:125
IfxIom_RefInput_gtmTout7
Definition: IfxIom_cfg.h:196
IfxIom_MonInput_gtmTout104
Definition: IfxIom_cfg.h:160
IfxIom_MonInput_ccu61Cout61
Definition: IfxIom_cfg.h:147
IfxIom_RefInput_asclin0Atx
Definition: IfxIom_cfg.h:233
IfxIom_MonInputSignal_2
Monitor Signal Input 2 selected.
Definition: IfxIom_cfg.h:81
IfxIom_RefInput_ccu61Cc62
Definition: IfxIom_cfg.h:216
IfxIom_MonInput_qspi0Mrst
Definition: IfxIom_cfg.h:151
IfxIom_MonInput_p20_14
Definition: IfxIom_cfg.h:118
IfxIom_RefInput_gtmTout10
Definition: IfxIom_cfg.h:199
IfxIom_MonInput_p20_12
Definition: IfxIom_cfg.h:116
IfxIom_RefInput_ccu60Cout63
Definition: IfxIom_cfg.h:205
IfxIom_RefInput_gtmTout1
Definition: IfxIom_cfg.h:190
IfxIom_MonInput_ccu61Cc61
Definition: IfxIom_cfg.h:144
IfxIom_RefInput_gtmTout11
Definition: IfxIom_cfg.h:200
IfxIom_RefInputSignal
IfxIom_RefInputSignal
IOM_FPCCTRk.ISR.
Definition: IfxIom_cfg.h:86
IfxIom_RefInput_canNode1Txd
Definition: IfxIom_cfg.h:227
IfxIom_MonInput_p33_7
Definition: IfxIom_cfg.h:110
IfxIom_MonInputSignal_1
Monitor Signal Input 1 selected.
Definition: IfxIom_cfg.h:80
IfxIom_MonInput_p33_8
Definition: IfxIom_cfg.h:111
IfxIom_RefInput_gtmTout8
Definition: IfxIom_cfg.h:197
IfxIom_MonInput_psi5Psitx0
Definition: IfxIom_cfg.h:149
IfxIom_RefInput_ccu61Cc60
Definition: IfxIom_cfg.h:218
IfxIom_MonInput_gtmTout23
Definition: IfxIom_cfg.h:120
IfxIom_MonInput_gtmTout33
Definition: IfxIom_cfg.h:130
IfxIom_RefInput_ccu61Cout61
Definition: IfxIom_cfg.h:214
IfxIom_MonInput_gtmTout22
Definition: IfxIom_cfg.h:119
IfxIom_RefInputSignal_xorCombiner
GTM XOR Combiner selected.
Definition: IfxIom_cfg.h:92
IfxIom_MonInput_ccu61Cc60
Definition: IfxIom_cfg.h:143
IfxIom_MonInput_p33_1
Definition: IfxIom_cfg.h:104
IfxIom_MonInputSignal_0
Monitor Signal Input 0 selected.
Definition: IfxIom_cfg.h:79
IfxIom_MonInput_ccu60Cout61
Definition: IfxIom_cfg.h:139
IfxIom_RefInput_qspi1Mrst
Definition: IfxIom_cfg.h:222
IfxIom_MonInput_asclin3Atx
Definition: IfxIom_cfg.h:166
IfxIom_RefInput_asclin2Atx
Definition: IfxIom_cfg.h:235
IfxIom_MonInput_gtmTout25
Definition: IfxIom_cfg.h:122
IfxIom_MonInput_gtmTout70
Definition: IfxIom_cfg.h:134
IfxIom_MonInput_p33_6
Definition: IfxIom_cfg.h:109
IfxIom_MonInput_p33_9
Definition: IfxIom_cfg.h:112
IfxIom_MonInput_ccu61Cc62
Definition: IfxIom_cfg.h:145
IfxIom_RefInput_asclin3Atx
Definition: IfxIom_cfg.h:236
IfxIom_RefInput_canNode3Txd
Definition: IfxIom_cfg.h:229
IfxIom_RefInput_ccu60Cc60
Definition: IfxIom_cfg.h:211
IfxIom_MonInput_gnd
Definition: IfxIom_cfg.h:155
IfxIom_RefInput_ccu60Cout62
Definition: IfxIom_cfg.h:206
IfxIom_RefInput_ccu61Cout63
Definition: IfxIom_cfg.h:212
IfxIom_MonInput_p33_2
Definition: IfxIom_cfg.h:105
IfxIom_MonInput_qspi3Mrst
Definition: IfxIom_cfg.h:154
IfxIom_MonInput_gtmTout32
Definition: IfxIom_cfg.h:129
IfxIom_RefInput_p33_1
Definition: IfxIom_cfg.h:174
IfxIom_RefInput_p33_7
Definition: IfxIom_cfg.h:180
IfxIom_MonInput_asclin1Atx
Definition: IfxIom_cfg.h:164
IfxIom_MonInput_canNode2Txd
Definition: IfxIom_cfg.h:158
IfxIom_MonInput_p33_0
Value=0xXXYY where XX=ISM, YY=k.
Definition: IfxIom_cfg.h:103
IfxIom_RefInput_p33_4
Definition: IfxIom_cfg.h:177
IfxIom_MonInput_canNode3Txd
Definition: IfxIom_cfg.h:159
IfxIom_MonInput_ccu60Cc60
Definition: IfxIom_cfg.h:137
IfxIom_RefInput_gtmTout9
Definition: IfxIom_cfg.h:198
IfxIom_MonInput_gtmTout30
Definition: IfxIom_cfg.h:127
IfxIom_RefInputSignal_2
Monitor Signal Input 2 selected.
Definition: IfxIom_cfg.h:91
IfxIom_MonInput_ccu60Cout62
Definition: IfxIom_cfg.h:140
IfxIom_MonInput_psi5Psitx1
Definition: IfxIom_cfg.h:150
IfxIom_RefInput_exorCombiner
Definition: IfxIom_cfg.h:237
IfxIom_RefInputSignal_p
Signal input Pn_IN (from portlogic) selected.
Definition: IfxIom_cfg.h:88
IfxIom_MonInput_gtmTout105
Definition: IfxIom_cfg.h:161
IfxIom_RefInput_psi5Psitx0
Definition: IfxIom_cfg.h:219
IfxIom_RefInput_p33_3
Definition: IfxIom_cfg.h:176
IfxIom_MonInput_gtmTout31
Definition: IfxIom_cfg.h:128
IfxIom_MonInput_ccu60Cc61
Definition: IfxIom_cfg.h:136
IfxIom_MonInput_gtmTout106
Definition: IfxIom_cfg.h:162
IfxIom_MonInput_gtmTout68
Definition: IfxIom_cfg.h:132
IfxIom_RefInput_gtmTout15
Definition: IfxIom_cfg.h:204
IfxIom_RefInput_ccu60Cout61
Definition: IfxIom_cfg.h:207
IfxIom_RefInput_gtmTout108
Definition: IfxIom_cfg.h:231
IfxIom_MonInput_ccu60Cout60
Definition: IfxIom_cfg.h:138
IfxIom_MonInput_ccu60Cout63
Definition: IfxIom_cfg.h:141
IfxIom_RefInput_qspi0Mrst
Definition: IfxIom_cfg.h:221
IfxIom_RefInputSignal_0
Monitor Signal Input 0 selected.
Definition: IfxIom_cfg.h:89
IfxIom_RefInput_p33_11
Definition: IfxIom_cfg.h:184
IfxIom_RefInput_gtmTout5
Definition: IfxIom_cfg.h:194
IfxIom_MonInput_gtmTout24
Definition: IfxIom_cfg.h:121
IfxIom_RefInput_canNode0Txd
Definition: IfxIom_cfg.h:226
IfxIom_MonInput_gtmTout29
Definition: IfxIom_cfg.h:126
IfxIom_MonInput_ccu61Cout60
Definition: IfxIom_cfg.h:146
IfxIom_RefInput_gtmTout3
Definition: IfxIom_cfg.h:192
IfxIom_RefInput_asclin1Atx
Definition: IfxIom_cfg.h:234
IfxIom_RefInput
IfxIom_RefInput
LAM ref inputs.
Definition: IfxIom_cfg.h:171
IfxIom_MonInput_p33_10
Definition: IfxIom_cfg.h:113
IfxIom_RefInput_p33_6
Definition: IfxIom_cfg.h:179
IfxIom_RefInput_gtmTout109
Definition: IfxIom_cfg.h:232
IfxIom_MonInput_asclin0Atx
Definition: IfxIom_cfg.h:163
IfxIom_MonInput_gtmTout26
Definition: IfxIom_cfg.h:123
IfxIom_MonInput_ccu61Cout62
Definition: IfxIom_cfg.h:148
IfxIom_RefInput_gtmTout14
Definition: IfxIom_cfg.h:203
IfxIom_MonInputSignal_p
Signal input Pn_IN (from portlogic) selected.
Definition: IfxIom_cfg.h:78
IfxIom_MonInput_p33_3
Definition: IfxIom_cfg.h:106
IfxIom_RefInput_p20_14
Definition: IfxIom_cfg.h:188
IfxIom_RefInput_gtmTout107
Definition: IfxIom_cfg.h:230
IfxIom_RefInput_psi5Psitx2
Definition: IfxIom_cfg.h:220
IfxIom_RefInput_p33_9
Definition: IfxIom_cfg.h:182
IfxIom_RefInput_p33_5
Definition: IfxIom_cfg.h:178
IfxIom_RefInput_p33_2
Definition: IfxIom_cfg.h:175
IfxIom_MonInput
IfxIom_MonInput
LAM mon inputs.
Definition: IfxIom_cfg.h:101
IfxIom_RefInput_p33_8
Definition: IfxIom_cfg.h:181
IfxIom_MonInput_p20_13
Definition: IfxIom_cfg.h:117
IfxIom_RefInput_gnd
Definition: IfxIom_cfg.h:225
IfxIom_RefInput_gtmTout12
Definition: IfxIom_cfg.h:201
IfxIom_MonInput_ccu60Cc62
Definition: IfxIom_cfg.h:135
IfxIom_RefInput_ccu60Cc62
Definition: IfxIom_cfg.h:209
IfxIom_RefInput_qspi3Mrst
Definition: IfxIom_cfg.h:224
IfxIom_RefInputSignal_1
Monitor Signal Input 1 selected.
Definition: IfxIom_cfg.h:90
IfxIom_MonInput_canNode0Txd
Definition: IfxIom_cfg.h:156
IfxIom_RefInput_p33_10
Definition: IfxIom_cfg.h:183
IfxIom_RefInput_gtmTout0
Definition: IfxIom_cfg.h:189
IfxIom_MonInputSignal
IfxIom_MonInputSignal
IOM_FPCCTRk.ISM.
Definition: IfxIom_cfg.h:76
IfxIom_RefInput_gtmTout13
Definition: IfxIom_cfg.h:202
IfxIom_RefInput_p20_12
Definition: IfxIom_cfg.h:186
IfxIom_RefInput_canNode2Txd
Definition: IfxIom_cfg.h:228
IfxIom_RefInput_gtmTout4
Definition: IfxIom_cfg.h:193
IfxIom_MonInput_p33_4
Definition: IfxIom_cfg.h:107
IfxIom_RefInput_p33_12
Definition: IfxIom_cfg.h:185
IfxIom_RefInput_ccu61Cout60
Definition: IfxIom_cfg.h:215


iLLD_TC38A: IfxLldVersion.h Source File

IfxLldVersion.h
Go to the documentation of this file.
1 /**
2 *
3 * \version iLLD_1_0_1_12_0
4 * \copyright Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
5 *
6 *
7 *
8 * IMPORTANT NOTICE
9 *
10 * Use of this file is subject to the terms of use agreed between (i) you or
11 * the company in which ordinary course of business you are acting and (ii)
12 * Infineon Technologies AG or its licensees. If and as long as no such terms
13 * of use are agreed, use of this file is subject to following:
14 *
15 * Boost Software License - Version 1.0 - August 17th, 2003
16 *
17 * Permission is hereby granted, free of charge, to any person or organization
18 * obtaining a copy of the software and accompanying documentation covered by
19 * this license (the "Software") to use, reproduce, display, distribute,
20 * execute, and transmit the Software, and to prepare derivative works of the
21 * Software, and to permit third-parties to whom the Software is furnished to
22 * do so, all subject to the following:
23 *
24 * The copyright notices in the Software and this entire statement, including
25 * the above license grant, this restriction and the following disclaimer, must
26 * be included in all copies of the Software, in whole or in part, and all
27 * derivative works of the Software, unless such copies or derivative works are
28 * solely in the form of machine-executable object code generated by a source
29 * language processor.
30 *
31 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
32 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
33 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
34 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
35 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
36 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
37 * DEALINGS IN THE SOFTWARE.
38 *
39 */
40 #ifndef IFX_LLD_VERSION_H
41 #define IFX_LLD_VERSION_H
42
43 #define IFX_LLD_VERSION_GENERATION 1 /**< \brief Indicates the driver generation */
44 #define IFX_LLD_VERSION_MAJOR 0 /**< \brief Informs about changes which could lead to incompatibilities */
45 #define IFX_LLD_VERSION_MAJOR_UPDATE 1 /**< \brief Informs about a release for a new derivative without further API changes */
46 #define IFX_LLD_VERSION_MINOR 12 /**< \brief Informs about new additions to the library */
47 #define IFX_LLD_VERSION_REVISION 0 /**< \brief Informs about patches and/or documentation changes */
48
49 #endif /* IFX_LLD_VERSION_H */


iLLD_TC38A: IfxLmu_cfg.h Source File

  • _Impl
IfxLmu_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxLmu_cfg.h
3 * \brief Lmu on-chip implementation data
4 * \ingroup IfxLld_Lmu
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Lmu Lmu
42 * \ingroup IfxLld
43 * \defgroup IfxLld_Lmu_Impl Implementation
44 * \ingroup IfxLld_Lmu
45 */
46
47 #ifndef IFXLMU_CFG_H
48 #define IFXLMU_CFG_H 1
49
50 /******************************************************************************/
51 /*----------------------------------Includes----------------------------------*/
52 /******************************************************************************/
53
54 /******************************************************************************/
55 /*-----------------------------------Macros-----------------------------------*/
56 /******************************************************************************/
57
58 /** \brief Specifies maximum number of Modules
59 */
60 #define IFXLMU_NUM_MODULES 1
61
62 #endif /* IFXLMU_CFG_H */


iLLD_TC38A: IfxMsc.c Source File

  • Msc
  • Std
IfxMsc.c
Go to the documentation of this file.
1 /**
2 * \file IfxMsc.c
3 * \brief MSC basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 */
43
44 /******************************************************************************/
45 /*----------------------------------Includes----------------------------------*/
46 /******************************************************************************/
47
48 #include "IfxMsc.h"
49
50 /******************************************************************************/
51 /*-------------------------Function Implementations---------------------------*/
52 /******************************************************************************/
53
54 void IfxMsc_clearDataFrameInterruptFlag(Ifx_MSC *msc)
55 {
56 /* Data Frame Interrupt Clear */
57 msc->ISC.B.CDEDI = 1;
58 }
59
60
61 void IfxMsc_clearReset(Ifx_MSC *msc)
62 {
63 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
64
65 IfxScuWdt_clearCpuEndinit(passwd);
66
67 if (msc->KRST0.B.RSTSTAT == 1)
68 {
69 msc->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
70 }
71
72 IfxScuWdt_setCpuEndinit(passwd);
73 }
74
75
76 void IfxMsc_disableModule(Ifx_MSC *msc)
77 {
78 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
79 IfxScuWdt_clearCpuEndinit(passwd);
80 /* Disable module */
81 msc->CLC.B.DISR = 1;
82 IfxScuWdt_setCpuEndinit(passwd);
83 }
84
85
86 uint32 IfxMsc_downstreamAbraBaudCalculator(uint32 baud)
87 {
88 uint32 fsys = IfxScuCcu_getSpbFrequency();
89 uint32 ndd = 0;
90
91 /* DSTE.NDD = fsys / 2*BR */
92
93 ndd = fsys / (2 * baud);
94
95 return ndd - 1;
96 }
97
98
99 uint64 IfxMsc_downstreamFractionalBaudCalculator(Ifx_MSC *msc, uint32 baud)
100 {
101 IFX_UNUSED_PARAMETER(msc);
102
103 float32 fsys = IfxScuCcu_getSpbFrequency();
104 uint64 step = 0;
105
106 step = (uint64)((uint64)(2 * baud * 1024)) / fsys;
107
108 return step;
109 }
110
111
112 uint32 IfxMsc_downstreamNormalBaudCalculator(Ifx_MSC *msc, uint32 baud)
113 {
114 IFX_UNUSED_PARAMETER(msc);
115
116 float32 fsys = IfxScuCcu_getSpbFrequency();
117 uint32 step = 0;
118
119 /* FDR.STEP = 1024 - fsys / (2*BR) */
120
121 step = 1024 - (fsys / (2 * baud));
122
123 return step;
124 }
125
126
127 void IfxMsc_enableModule(Ifx_MSC *msc)
128 {
129 /* Disable module disable bit */
130 msc->CLC.U = 0;
131 }
132
133
134 boolean IfxMsc_getActiveDataFrameStatus(Ifx_MSC *msc)
135 {
136 return msc->DSS.B.DFA;
137 }
138
139
140 Ifx_MSC *IfxMsc_getAddress(IfxMsc_Index msc)
141 {
142 Ifx_MSC *module;
143
144 if (msc < IFXMSC_NUM_MODULES)
145 {
146 module = (Ifx_MSC *)IfxMsc_cfg_indexMap[msc].module;
147 }
148 else
149 {
150 module = NULL_PTR;
151 }
152
153 return module;
154 }
155
156
157 boolean IfxMsc_getDataFrameInterruptFlag(Ifx_MSC *msc)
158 {
159 boolean flag = 0;
160
161 flag = msc->ISR.B.DEDI;
162
163 return flag;
164 }
165
166
167 IfxMsc_Index IfxMsc_getIndex(Ifx_MSC *msc)
168 {
169 uint32 index;
170 IfxMsc_Index result;
171
172 result = IfxMsc_Index_none;
173
174 for (index = 0; index < IFXMSC_NUM_MODULES; index++)
175 {
176 if (IfxMsc_cfg_indexMap[index].module == msc)
177 {
178 result = (IfxMsc_Index)IfxMsc_cfg_indexMap[index].index;
179 break;
180 }
181 }
182
183 return result;
184 }
185
186
187 void IfxMsc_manualLoadCxModeCommand(Ifx_MSC *msc, IfxMsc_CxModeCommand *command64)
188 {
189 msc->DCE.U = command64->dce;
190 msc->DC.U = command64->dc;
191 }
192
193
194 void IfxMsc_resetModule(Ifx_MSC *msc)
195 {
196 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
197
198 IfxScuWdt_clearCpuEndinit(passwd);
199
200 /* Reset kernel */
201 msc->KRST1.B.RST = 1;
202 msc->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
203
204 while (msc->KRST0.B.RSTSTAT == 0) /* Wait until reset is executed */
205
206 {}
207
208 /* TODO Check if CLC enable is required */
209 //msc->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
210
211 IfxScuWdt_setCpuEndinit(passwd);
212 }
213
214
215 uint64 IfxMsc_upstreamFractionalBaudCalculator(Ifx_MSC *msc, uint32 baud)
216 {
217 float32 fsys = IfxScuCcu_getSpbFrequency();
218 uint64 step = 0;
219 uint32 df = 1;
220
221 /* FDR.STEP = DF*BR*1024 / fsys */
222
223 if (msc->USR.B.URR != 0)
224 {
225 df = 1 << (msc->USR.B.URR + 1);
226 }
227 else
228 {
229 df = 0;
230 }
231
232 step = (uint64)((uint64)((df * baud) * 1024)) / fsys;
233
234 return step;
235 }
236
237
238 uint32 IfxMsc_upstreamNormalBaudCalculator(Ifx_MSC *msc, uint32 baud)
239 {
240 float32 fsys = IfxScuCcu_getSpbFrequency();
241 uint32 step = 0;
242 uint32 df = 1;
243
244 /* FDR.STEP = 1024 - fsys / DF*BR */
245
246 if (msc->USR.B.URR != 0)
247 {
248 df = 1 << (msc->USR.B.URR + 1);
249 }
250 else
251 {
252 df = 0;
253 }
254
255 step = 1024 - (fsys / (df * baud));
256
257 return step;
258 }
259
260
261 float32 IfxMsc_getDownstreamAbraBaudrate(Ifx_MSC *msc)
262 {
263 float32 f_MSC = IfxScuCcu_getMscFrequency();
264
265 uint8 nda = msc->ABC.B.NDA;
266 uint8 low = msc->ABC.B.LOW;
267 uint8 high = msc->ABC.B.HIGH;
268
269 float32 baudrate = (f_MSC / ((nda + 1) * (low + high + 2)));
270
271 return baudrate;
272 }
273
274
275 float32 IfxMsc_getDownstreamAbraDisabledBaudrate(Ifx_MSC *msc)
276 {
277 float32 baudrate = 0;
278 float32 f_spb = IfxScuCcu_getSpbFrequency();
279 uint16 step = (uint16)(msc->FDR.B.STEP);
280
281 /* normal divider mode( DM = 1) */
282 if (msc->FDR.B.DM == 1)
283 {
284 baudrate = (f_spb / 2) * (1 / (1024 - step));
285 }
286 else
287 {
288 /*fractional divider mode*/
289 baudrate = (f_spb / 2) * (step / 1024);
290 }
291
292 return baudrate;
293 }
294
295
296 float32 IfxMsc_getDownstreamBaudrate(Ifx_MSC *msc)
297 {
298 float32 downstreamBaudrate = 0;
299
300 if (msc->ABC.B.ABB == 1)
301 {
302 /* ABRA enabled*/
303 downstreamBaudrate = IfxMsc_getDownstreamAbraBaudrate(msc);
304 }
305 else
306 {
307 /* ABRA disabled*/
308 downstreamBaudrate = IfxMsc_getDownstreamAbraDisabledBaudrate(msc);
309 }
310
311 return downstreamBaudrate;
312 }
IfxScuCcu_getSpbFrequency
float32 IfxScuCcu_getSpbFrequency(void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider...
Definition: IfxScuCcu.c:479
IfxMsc_getDownstreamAbraDisabledBaudrate
float32 IfxMsc_getDownstreamAbraDisabledBaudrate(Ifx_MSC *msc)
Returns the downstream baudrate(with ABRA disabled)
Definition: IfxMsc.c:275
IfxMsc_Index
IfxMsc_Index
List of the available MSC resources.
Definition: IfxMsc_cfg.h:79
IfxMsc_downstreamFractionalBaudCalculator
uint64 IfxMsc_downstreamFractionalBaudCalculator(Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is fractional for downstream...
Definition: IfxMsc.c:99
IfxMsc_downstreamAbraBaudCalculator
uint32 IfxMsc_downstreamAbraBaudCalculator(uint32 baud)
Get the NDD value for the supplied baud rate when when ABRA block is enabled.
Definition: IfxMsc.c:86
IfxMsc_Index_none
Not Selected.
Definition: IfxMsc_cfg.h:81
uint32
unsigned long uint32
Definition: Platform_Types.h:116
float32
float float32
Definition: Platform_Types.h:170
IfxMsc_disableModule
void IfxMsc_disableModule(Ifx_MSC *msc)
Disable MSC kernel.
Definition: IfxMsc.c:76
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
uint64
unsigned long long uint64
Definition: Platform_Types.h:121
IfxMsc_clearReset
void IfxMsc_clearReset(Ifx_MSC *msc)
Clear reset bit of MSC kernel.
Definition: IfxMsc.c:61
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxMsc_manualLoadCxModeCommand
void IfxMsc_manualLoadCxModeCommand(Ifx_MSC *msc, IfxMsc_CxModeCommand *command64)
Definition: IfxMsc.c:187
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxMsc_getAddress
Ifx_MSC * IfxMsc_getAddress(IfxMsc_Index msc)
Definition: IfxMsc.c:140
IfxMsc_clearDataFrameInterruptFlag
void IfxMsc_clearDataFrameInterruptFlag(Ifx_MSC *msc)
clear data frame interrupt flag
Definition: IfxMsc.c:54
IfxMsc_getDownstreamBaudrate
float32 IfxMsc_getDownstreamBaudrate(Ifx_MSC *msc)
Definition: IfxMsc.c:296
IfxMsc_upstreamFractionalBaudCalculator
uint64 IfxMsc_upstreamFractionalBaudCalculator(Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is fractional.
Definition: IfxMsc.c:215
IFXMSC_NUM_MODULES
#define IFXMSC_NUM_MODULES
Definition: IfxMsc_cfg.h:67
IfxMsc_CxModeCommand::dc
uint32 dc
Command to be wrtten to DC register.
Definition: IfxMsc.h:956
IfxMsc.h
MSC basic functionality.
IfxMsc_upstreamNormalBaudCalculator
uint32 IfxMsc_upstreamNormalBaudCalculator(Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is normal.
Definition: IfxMsc.c:238
IfxMsc_getDownstreamAbraBaudrate
float32 IfxMsc_getDownstreamAbraBaudrate(Ifx_MSC *msc)
Returns the downstream ABRA baudrate.
Definition: IfxMsc.c:261
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxMsc_getIndex
IfxMsc_Index IfxMsc_getIndex(Ifx_MSC *msc)
API to get the resource index of the MSC specified.
Definition: IfxMsc.c:167
IfxMsc_getActiveDataFrameStatus
boolean IfxMsc_getActiveDataFrameStatus(Ifx_MSC *msc)
get the status of the active data frame
Definition: IfxMsc.c:134
IfxMsc_CxModeCommand
64 bit commnd to be loaded first to DCE & then to DC for transmission.
Definition: IfxMsc.h:953
IfxScuCcu_getMscFrequency
float32 IfxScuCcu_getMscFrequency(void)
API to get MSC divider frequency. This API returns the based on the divider value in CCUCON register ...
Definition: IfxScuCcu.c:331
IfxMsc_downstreamNormalBaudCalculator
uint32 IfxMsc_downstreamNormalBaudCalculator(Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is normal for downstream.
Definition: IfxMsc.c:112
IfxMsc_CxModeCommand::dce
uint32 dce
Command to be wrtten to DCE register.
Definition: IfxMsc.h:955
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxMsc_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxMsc_cfg_indexMap[IFXMSC_NUM_MODULES]
Definition: IfxMsc_cfg.c:54
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxMsc_enableModule
void IfxMsc_enableModule(Ifx_MSC *msc)
Enable MSC kernel.
Definition: IfxMsc.c:127
IfxMsc_getDataFrameInterruptFlag
boolean IfxMsc_getDataFrameInterruptFlag(Ifx_MSC *msc)
get the status of the data frame interrupt flag
Definition: IfxMsc.c:157
IfxMsc_resetModule
void IfxMsc_resetModule(Ifx_MSC *msc)
Reset MSC kernel.
Definition: IfxMsc.c:194


iLLD_TC38A: IfxMsc.h Source File

  • Msc
  • Std
IfxMsc.h
Go to the documentation of this file.
1 /**
2 * \file IfxMsc.h
3 * \brief MSC basic functionality
4 * \ingroup IfxLld_Msc
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 *
43 * \defgroup IfxLld_Msc_Std_Enum Enumerations
44 * \ingroup IfxLld_Msc_Std
45 * \defgroup IfxLld_Msc_Std_Config_Flags Configure Flags
46 * \ingroup IfxLld_Msc_Std
47 * \defgroup IfxLld_Msc_Std_Set_Command_Target Set Command Target
48 * \ingroup IfxLld_Msc_Std
49 * \defgroup IfxLld_Msc_Std_Set_Data Set Data
50 * \ingroup IfxLld_Msc_Std
51 * \defgroup IfxLld_Msc_Std_Get_Data Get Data
52 * \ingroup IfxLld_Msc_Std
53 * \defgroup IfxLld_Msc_Std_Enable_Module Enable Module
54 * \ingroup IfxLld_Msc_Std
55 * \defgroup IfxLld_Msc_Std_Reset_Module Reset Module
56 * \ingroup IfxLld_Msc_Std
57 * \defgroup IfxLld_Msc_Std_Baud_Calculator Baud Calculator
58 * \ingroup IfxLld_Msc_Std
59 * \defgroup IfxLld_Msc_Std_IO IO Pin Configuration Functions
60 * \ingroup IfxLld_Msc_Std
61 * \defgroup IfxLld_Msc_Std_Module Module Functions
62 * \ingroup IfxLld_Msc_Std
63 */
64
65 #ifndef IFXMSC_H
66 #define IFXMSC_H 1
67
68 /******************************************************************************/
69 /*----------------------------------Includes----------------------------------*/
70 /******************************************************************************/
71
72 #include "_Impl/IfxMsc_cfg.h"
73 #include "Scu/Std/IfxScuCcu.h"
74 #include "Scu/Std/IfxScuWdt.h"
75 #include "_PinMap/IfxMsc_PinMap.h"
76 #include "Cpu/Std/IfxCpu_Intrinsics.h"
77
78 /******************************************************************************/
79 /*--------------------------------Enumerations--------------------------------*/
80 /******************************************************************************/
81
82 /** \addtogroup IfxLld_Msc_Std_Enum
83 * \{ */
84 /** \brief Enable SRL/SRH Active Phase Selection Bit\n
85 * Definition in Ifx_MSC.DSC.B.ENSELH and Ifx_MSC.DSC.B.ENSELL
86 */
87 typedef enum
88 {
89 IfxMsc_ActivePhaseSelection_none = 0, /**< \brief No selection bit inserted */
90 IfxMsc_ActivePhaseSelection_lowLevel = 1 /**< \brief Low level selection bit inserted */
91 } IfxMsc_ActivePhaseSelection;
92
93 /** \brief Asynchronous Block Configuration Register - Asynchronous Block Bypass\n
94 * Definition in Ifx_MSC.ABC.B.ABB
95 */
96 typedef enum
97 {
98 IfxMsc_AsynchronousBlock_bypassed = 0, /**< \brief Asynchronous block and the n-divider of the MSC downstream path are bypassed and are disabled */
99 IfxMsc_AsynchronousBlock_noBypassed = 1 /**< \brief Asynchronous block and the n-divider of the MSC downstream path are active */
100 } IfxMsc_AsynchronousBlock;
101
102 /** \brief Output Control Register - Chip Selection Line Polarity\n
103 * Definition in Ifx_MSC.OCR.B.CSLP
104 */
105 typedef enum
106 {
107 IfxMsc_ChipSelectActiveState_high = 0, /**< \brief EN[3:0] and ENL,ENH,ENC polarities are identical */
108 IfxMsc_ChipSelectActiveState_low = 1 /**< \brief EN[3:0] and ENL,ENH,ENC polarities are inverted */
109 } IfxMsc_ChipSelectActiveState;
110
111 /** \brief Asynchronous Block Configuration Register - Clock Select\n
112 * Definition in Ifx_MSC.ABC.B.CLKSEL
113 */
114 typedef enum
115 {
116 IfxMsc_ClockSelect_noClock = 0, /**< \brief no clock source for the ABRA block */
117 IfxMsc_ClockSelect_fper = 1 /**< \brief f_PER is the clock source for the ABRA block */
118 } IfxMsc_ClockSelect;
119
120 /** \brief Downstream Control Enhanced Register - Command-Data-Command in Data Repetition Mode\n
121 * Definition in Ifx_MSC.DSCE.B.CDCM
122 */
123 typedef enum
124 {
125 IfxMsc_CommandDataCommandRepetitionMode_disabled = 0, /**< \brief Disables the automatic insertion of data */
126 IfxMsc_CommandDataCommandRepetitionMode_enabled = 1 /**< \brief Enables the automatic insertion of data */
127 } IfxMsc_CommandDataCommandRepetitionMode;
128
129 /** \brief Interrupt Control Register - Command Frame Interrupt Enable\n
130 * Definition in Ifx_MSC.ICR.B.ECIE
131 */
132 typedef enum
133 {
134 IfxMsc_CommandFrameInterrupt_disabled = 0, /**< \brief Interrupt generation disabled */
135 IfxMsc_CommandFrameInterrupt_enabled = 1 /**< \brief Interrupt generation enabled */
136 } IfxMsc_CommandFrameInterrupt;
137
138 /** \brief Interrupt Control Register - Command Frame Interrupt Node Pointer\n
139 * Definition in Ifx_MSC.ICR.B.ECIP
140 */
141 typedef enum
142 {
143 IfxMsc_CommandFrameInterruptNode_SR0 = 0, /**< \brief Service request output SR0 selected */
144 IfxMsc_CommandFrameInterruptNode_SR1, /**< \brief Service request output SR1 selected */
145 IfxMsc_CommandFrameInterruptNode_SR2, /**< \brief Service request output SR2 selected */
146 IfxMsc_CommandFrameInterruptNode_SR3 /**< \brief Service request output SR3 selected */
147 } IfxMsc_CommandFrameInterruptNode;
148
149 /** \brief Number of Bits shifted at command frames\n
150 * Definition in Ifx_MSC.DSC.B.NBC
151 */
152 typedef enum
153 {
154 IfxMsc_CommandFrameLength_0 = 0, /**< \brief No bit shifted */
155 IfxMsc_CommandFrameLength_1 = 1, /**< \brief SRL[0] Shifted */
156 IfxMsc_CommandFrameLength_2 = 2, /**< \brief SRL[1:0] Shifted */
157 IfxMsc_CommandFrameLength_3, /**< \brief SRL[2:0] Shifted */
158 IfxMsc_CommandFrameLength_4, /**< \brief SRL[3:0] Shifted */
159 IfxMsc_CommandFrameLength_5, /**< \brief SRL[4:0] Shifted */
160 IfxMsc_CommandFrameLength_6, /**< \brief SRL[5:0] Shifted */
161 IfxMsc_CommandFrameLength_7, /**< \brief SRL[6:0] Shifted */
162 IfxMsc_CommandFrameLength_8, /**< \brief SRL[7:0] Shifted */
163 IfxMsc_CommandFrameLength_9, /**< \brief SRL[8:0] Shifted */
164 IfxMsc_CommandFrameLength_10, /**< \brief SRL[9:0] Shifted */
165 IfxMsc_CommandFrameLength_11, /**< \brief SRL[10:0] Shifted */
166 IfxMsc_CommandFrameLength_12, /**< \brief SRL[11:0] Shifted */
167 IfxMsc_CommandFrameLength_13, /**< \brief SRL[12:0] Shifted */
168 IfxMsc_CommandFrameLength_14, /**< \brief SRL[13:0] Shifted */
169 IfxMsc_CommandFrameLength_15, /**< \brief SRL[14:0] Shifted */
170 IfxMsc_CommandFrameLength_16, /**< \brief SRL[15:0] Shifted */
171 IfxMsc_CommandFrameLength_17 = 17, /**< \brief SRL[15:0] and SRH[0] Shifted */
172 IfxMsc_CommandFrameLength_18 = 18, /**< \brief SRL[15:0] and SRH[1:0] Shifted */
173 IfxMsc_CommandFrameLength_19, /**< \brief SRL[15:0] and SRH[2:0] Shifted */
174 IfxMsc_CommandFrameLength_20, /**< \brief SRL[15:0] and SRH[3:0] Shifted */
175 IfxMsc_CommandFrameLength_21, /**< \brief SRL[15:0] and SRH[4:0] Shifted */
176 IfxMsc_CommandFrameLength_22, /**< \brief SRL[15:0] and SRH[5:0] Shifted */
177 IfxMsc_CommandFrameLength_23, /**< \brief SRL[15:0] and SRH[6:0] Shifted */
178 IfxMsc_CommandFrameLength_24, /**< \brief SRL[15:0] and SRH[7:0] Shifted */
179 IfxMsc_CommandFrameLength_25, /**< \brief SRL[15:0] and SRH[8:0] Shifted */
180 IfxMsc_CommandFrameLength_26, /**< \brief SRL[15:0] and SRH[9:0] Shifted */
181 IfxMsc_CommandFrameLength_27, /**< \brief SRL[15:0] and SRH[10:0] Shifted */
182 IfxMsc_CommandFrameLength_28, /**< \brief SRL[15:0] and SRH[11:0] Shifted */
183 IfxMsc_CommandFrameLength_29, /**< \brief SRL[15:0] and SRH[12:0] Shifted */
184 IfxMsc_CommandFrameLength_30, /**< \brief SRL[15:0] and SRH[13:0] Shifted */
185 IfxMsc_CommandFrameLength_31, /**< \brief SRL[15:0] and SRH[14:0] Shifted */
186 IfxMsc_CommandFrameLength_32 /**< \brief SRL[15:0] and SRH[15:0] Shifted */
187 } IfxMsc_CommandFrameLength;
188
189 /** \brief Downstream Timing Extension Register - Passive Phase Length at Control Frames Extension\n
190 * Definition in Ifx_MSC.DSTE.B.PPCE
191 */
192 typedef enum
193 {
194 IfxMsc_ControlFrameExtensionPassivePhaseLength_0 = 0, /**< \brief Length of Command frames passive phase is 2 */
195 IfxMsc_ControlFrameExtensionPassivePhaseLength_1, /**< \brief Length of Command frames passive phase is 3 */
196 IfxMsc_ControlFrameExtensionPassivePhaseLength_2, /**< \brief Length of Command frames passive phase is 4 */
197 IfxMsc_ControlFrameExtensionPassivePhaseLength_3, /**< \brief Length of Command frames passive phase is 5 */
198 IfxMsc_ControlFrameExtensionPassivePhaseLength_4, /**< \brief Length of Command frames passive phase is 6 */
199 IfxMsc_ControlFrameExtensionPassivePhaseLength_5, /**< \brief Length of Command frames passive phase is 7 */
200 IfxMsc_ControlFrameExtensionPassivePhaseLength_6, /**< \brief Length of Command frames passive phase is 8 */
201 IfxMsc_ControlFrameExtensionPassivePhaseLength_7, /**< \brief Length of Command frames passive phase is 9 */
202 IfxMsc_ControlFrameExtensionPassivePhaseLength_8, /**< \brief Length of Command frames passive phase is 10 */
203 IfxMsc_ControlFrameExtensionPassivePhaseLength_9, /**< \brief Length of Command frames passive phase is 11 */
204 IfxMsc_ControlFrameExtensionPassivePhaseLength_10, /**< \brief Length of Command frames passive phase is 12 */
205 IfxMsc_ControlFrameExtensionPassivePhaseLength_11, /**< \brief Length of Command frames passive phase is 13 */
206 IfxMsc_ControlFrameExtensionPassivePhaseLength_12, /**< \brief Length of Command frames passive phase is 14 */
207 IfxMsc_ControlFrameExtensionPassivePhaseLength_13, /**< \brief Length of Command frames passive phase is 15 */
208 IfxMsc_ControlFrameExtensionPassivePhaseLength_14, /**< \brief Length of Command frames passive phase is 16 */
209 IfxMsc_ControlFrameExtensionPassivePhaseLength_15, /**< \brief Length of Command frames passive phase is 17 */
210 IfxMsc_ControlFrameExtensionPassivePhaseLength_16, /**< \brief Length of Command frames passive phase is 18 */
211 IfxMsc_ControlFrameExtensionPassivePhaseLength_17, /**< \brief Length of Command frames passive phase is 19 */
212 IfxMsc_ControlFrameExtensionPassivePhaseLength_18, /**< \brief Length of Command frames passive phase is 20 */
213 IfxMsc_ControlFrameExtensionPassivePhaseLength_19, /**< \brief Length of Command frames passive phase is 21 */
214 IfxMsc_ControlFrameExtensionPassivePhaseLength_20, /**< \brief Length of Command frames passive phase is 22 */
215 IfxMsc_ControlFrameExtensionPassivePhaseLength_21, /**< \brief Length of Command frames passive phase is 23 */
216 IfxMsc_ControlFrameExtensionPassivePhaseLength_22, /**< \brief Length of Command frames passive phase is 24 */
217 IfxMsc_ControlFrameExtensionPassivePhaseLength_23, /**< \brief Length of Command frames passive phase is 25 */
218 IfxMsc_ControlFrameExtensionPassivePhaseLength_24, /**< \brief Length of Command frames passive phase is 26 */
219 IfxMsc_ControlFrameExtensionPassivePhaseLength_25, /**< \brief Length of Command frames passive phase is 27 */
220 IfxMsc_ControlFrameExtensionPassivePhaseLength_26, /**< \brief Length of Command frames passive phase is 28 */
221 IfxMsc_ControlFrameExtensionPassivePhaseLength_27, /**< \brief Length of Command frames passive phase is 29 */
222 IfxMsc_ControlFrameExtensionPassivePhaseLength_28, /**< \brief Length of Command frames passive phase is 30 */
223 IfxMsc_ControlFrameExtensionPassivePhaseLength_29, /**< \brief Length of Command frames passive phase is 31 */
224 IfxMsc_ControlFrameExtensionPassivePhaseLength_30, /**< \brief Length of Command frames passive phase is 32 */
225 IfxMsc_ControlFrameExtensionPassivePhaseLength_31, /**< \brief Length of Command frames passive phase is 33 */
226 IfxMsc_ControlFrameExtensionPassivePhaseLength_32, /**< \brief Length of Command frames passive phase is 34 */
227 IfxMsc_ControlFrameExtensionPassivePhaseLength_33, /**< \brief Length of Command frames passive phase is 35 */
228 IfxMsc_ControlFrameExtensionPassivePhaseLength_34, /**< \brief Length of Command frames passive phase is 36 */
229 IfxMsc_ControlFrameExtensionPassivePhaseLength_35, /**< \brief Length of Command frames passive phase is 37 */
230 IfxMsc_ControlFrameExtensionPassivePhaseLength_36, /**< \brief Length of Command frames passive phase is 38 */
231 IfxMsc_ControlFrameExtensionPassivePhaseLength_37, /**< \brief Length of Command frames passive phase is 39 */
232 IfxMsc_ControlFrameExtensionPassivePhaseLength_38, /**< \brief Length of Command frames passive phase is 40 */
233 IfxMsc_ControlFrameExtensionPassivePhaseLength_39, /**< \brief Length of Command frames passive phase is 41 */
234 IfxMsc_ControlFrameExtensionPassivePhaseLength_40, /**< \brief Length of Command frames passive phase is 42 */
235 IfxMsc_ControlFrameExtensionPassivePhaseLength_41, /**< \brief Length of Command frames passive phase is 43 */
236 IfxMsc_ControlFrameExtensionPassivePhaseLength_42, /**< \brief Length of Command frames passive phase is 44 */
237 IfxMsc_ControlFrameExtensionPassivePhaseLength_43, /**< \brief Length of Command frames passive phase is 45 */
238 IfxMsc_ControlFrameExtensionPassivePhaseLength_44, /**< \brief Length of Command frames passive phase is 46 */
239 IfxMsc_ControlFrameExtensionPassivePhaseLength_45, /**< \brief Length of Command frames passive phase is 47 */
240 IfxMsc_ControlFrameExtensionPassivePhaseLength_46, /**< \brief Length of Command frames passive phase is 48 */
241 IfxMsc_ControlFrameExtensionPassivePhaseLength_47, /**< \brief Length of Command frames passive phase is 49 */
242 IfxMsc_ControlFrameExtensionPassivePhaseLength_48, /**< \brief Length of Command frames passive phase is 50 */
243 IfxMsc_ControlFrameExtensionPassivePhaseLength_49, /**< \brief Length of Command frames passive phase is 51 */
244 IfxMsc_ControlFrameExtensionPassivePhaseLength_50, /**< \brief Length of Command frames passive phase is 52 */
245 IfxMsc_ControlFrameExtensionPassivePhaseLength_51, /**< \brief Length of Command frames passive phase is 53 */
246 IfxMsc_ControlFrameExtensionPassivePhaseLength_52, /**< \brief Length of Command frames passive phase is 54 */
247 IfxMsc_ControlFrameExtensionPassivePhaseLength_53, /**< \brief Length of Command frames passive phase is 55 */
248 IfxMsc_ControlFrameExtensionPassivePhaseLength_54, /**< \brief Length of Command frames passive phase is 56 */
249 IfxMsc_ControlFrameExtensionPassivePhaseLength_55, /**< \brief Length of Command frames passive phase is 57 */
250 IfxMsc_ControlFrameExtensionPassivePhaseLength_56, /**< \brief Length of Command frames passive phase is 58 */
251 IfxMsc_ControlFrameExtensionPassivePhaseLength_57, /**< \brief Length of Command frames passive phase is 59 */
252 IfxMsc_ControlFrameExtensionPassivePhaseLength_58, /**< \brief Length of Command frames passive phase is 60 */
253 IfxMsc_ControlFrameExtensionPassivePhaseLength_59, /**< \brief Length of Command frames passive phase is 61 */
254 IfxMsc_ControlFrameExtensionPassivePhaseLength_60, /**< \brief Length of Command frames passive phase is 62 */
255 IfxMsc_ControlFrameExtensionPassivePhaseLength_61, /**< \brief Length of Command frames passive phase is 63 */
256 IfxMsc_ControlFrameExtensionPassivePhaseLength_62, /**< \brief Length of Command frames passive phase is 64 */
257 IfxMsc_ControlFrameExtensionPassivePhaseLength_63, /**< \brief Length of Command frames passive phase is 65 */
258 IfxMsc_ControlFrameExtensionPassivePhaseLength_64, /**< \brief Length of Command frames passive phase is 66 */
259 IfxMsc_ControlFrameExtensionPassivePhaseLength_65, /**< \brief Length of Command frames passive phase is 67 */
260 IfxMsc_ControlFrameExtensionPassivePhaseLength_66, /**< \brief Length of Command frames passive phase is 68 */
261 IfxMsc_ControlFrameExtensionPassivePhaseLength_67, /**< \brief Length of Command frames passive phase is 69 */
262 IfxMsc_ControlFrameExtensionPassivePhaseLength_68, /**< \brief Length of Command frames passive phase is 70 */
263 IfxMsc_ControlFrameExtensionPassivePhaseLength_69, /**< \brief Length of Command frames passive phase is 71 */
264 IfxMsc_ControlFrameExtensionPassivePhaseLength_70, /**< \brief Length of Command frames passive phase is 72 */
265 IfxMsc_ControlFrameExtensionPassivePhaseLength_71, /**< \brief Length of Command frames passive phase is 73 */
266 IfxMsc_ControlFrameExtensionPassivePhaseLength_72, /**< \brief Length of Command frames passive phase is 74 */
267 IfxMsc_ControlFrameExtensionPassivePhaseLength_73, /**< \brief Length of Command frames passive phase is 75 */
268 IfxMsc_ControlFrameExtensionPassivePhaseLength_74, /**< \brief Length of Command frames passive phase is 76 */
269 IfxMsc_ControlFrameExtensionPassivePhaseLength_75, /**< \brief Length of Command frames passive phase is 77 */
270 IfxMsc_ControlFrameExtensionPassivePhaseLength_76, /**< \brief Length of Command frames passive phase is 78 */
271 IfxMsc_ControlFrameExtensionPassivePhaseLength_77, /**< \brief Length of Command frames passive phase is 79 */
272 IfxMsc_ControlFrameExtensionPassivePhaseLength_78, /**< \brief Length of Command frames passive phase is 80 */
273 IfxMsc_ControlFrameExtensionPassivePhaseLength_79, /**< \brief Length of Command frames passive phase is 81 */
274 IfxMsc_ControlFrameExtensionPassivePhaseLength_80, /**< \brief Length of Command frames passive phase is 82 */
275 IfxMsc_ControlFrameExtensionPassivePhaseLength_81, /**< \brief Length of Command frames passive phase is 83 */
276 IfxMsc_ControlFrameExtensionPassivePhaseLength_82, /**< \brief Length of Command frames passive phase is 84 */
277 IfxMsc_ControlFrameExtensionPassivePhaseLength_83, /**< \brief Length of Command frames passive phase is 85 */
278 IfxMsc_ControlFrameExtensionPassivePhaseLength_84, /**< \brief Length of Command frames passive phase is 86 */
279 IfxMsc_ControlFrameExtensionPassivePhaseLength_85, /**< \brief Length of Command frames passive phase is 87 */
280 IfxMsc_ControlFrameExtensionPassivePhaseLength_86, /**< \brief Length of Command frames passive phase is 88 */
281 IfxMsc_ControlFrameExtensionPassivePhaseLength_87, /**< \brief Length of Command frames passive phase is 89 */
282 IfxMsc_ControlFrameExtensionPassivePhaseLength_88, /**< \brief Length of Command frames passive phase is 90 */
283 IfxMsc_ControlFrameExtensionPassivePhaseLength_89, /**< \brief Length of Command frames passive phase is 91 */
284 IfxMsc_ControlFrameExtensionPassivePhaseLength_90, /**< \brief Length of Command frames passive phase is 92 */
285 IfxMsc_ControlFrameExtensionPassivePhaseLength_91, /**< \brief Length of Command frames passive phase is 93 */
286 IfxMsc_ControlFrameExtensionPassivePhaseLength_92, /**< \brief Length of Command frames passive phase is 94 */
287 IfxMsc_ControlFrameExtensionPassivePhaseLength_93, /**< \brief Length of Command frames passive phase is 95 */
288 IfxMsc_ControlFrameExtensionPassivePhaseLength_94, /**< \brief Length of Command frames passive phase is 96 */
289 IfxMsc_ControlFrameExtensionPassivePhaseLength_95, /**< \brief Length of Command frames passive phase is 97 */
290 IfxMsc_ControlFrameExtensionPassivePhaseLength_96, /**< \brief Length of Command frames passive phase is 98 */
291 IfxMsc_ControlFrameExtensionPassivePhaseLength_97, /**< \brief Length of Command frames passive phase is 99 */
292 IfxMsc_ControlFrameExtensionPassivePhaseLength_98, /**< \brief Length of Command frames passive phase is 100 */
293 IfxMsc_ControlFrameExtensionPassivePhaseLength_99, /**< \brief Length of Command frames passive phase is 101 */
294 IfxMsc_ControlFrameExtensionPassivePhaseLength_100, /**< \brief Length of Command frames passive phase is 102 */
295 IfxMsc_ControlFrameExtensionPassivePhaseLength_101, /**< \brief Length of Command frames passive phase is 103 */
296 IfxMsc_ControlFrameExtensionPassivePhaseLength_102, /**< \brief Length of Command frames passive phase is 104 */
297 IfxMsc_ControlFrameExtensionPassivePhaseLength_103, /**< \brief Length of Command frames passive phase is 105 */
298 IfxMsc_ControlFrameExtensionPassivePhaseLength_104, /**< \brief Length of Command frames passive phase is 106 */
299 IfxMsc_ControlFrameExtensionPassivePhaseLength_105, /**< \brief Length of Command frames passive phase is 107 */
300 IfxMsc_ControlFrameExtensionPassivePhaseLength_106, /**< \brief Length of Command frames passive phase is 108 */
301 IfxMsc_ControlFrameExtensionPassivePhaseLength_107, /**< \brief Length of Command frames passive phase is 109 */
302 IfxMsc_ControlFrameExtensionPassivePhaseLength_108, /**< \brief Length of Command frames passive phase is 110 */
303 IfxMsc_ControlFrameExtensionPassivePhaseLength_109, /**< \brief Length of Command frames passive phase is 111 */
304 IfxMsc_ControlFrameExtensionPassivePhaseLength_110, /**< \brief Length of Command frames passive phase is 112 */
305 IfxMsc_ControlFrameExtensionPassivePhaseLength_111, /**< \brief Length of Command frames passive phase is 113 */
306 IfxMsc_ControlFrameExtensionPassivePhaseLength_112, /**< \brief Length of Command frames passive phase is 114 */
307 IfxMsc_ControlFrameExtensionPassivePhaseLength_113, /**< \brief Length of Command frames passive phase is 115 */
308 IfxMsc_ControlFrameExtensionPassivePhaseLength_114, /**< \brief Length of Command frames passive phase is 116 */
309 IfxMsc_ControlFrameExtensionPassivePhaseLength_115, /**< \brief Length of Command frames passive phase is 117 */
310 IfxMsc_ControlFrameExtensionPassivePhaseLength_116, /**< \brief Length of Command frames passive phase is 118 */
311 IfxMsc_ControlFrameExtensionPassivePhaseLength_117, /**< \brief Length of Command frames passive phase is 119 */
312 IfxMsc_ControlFrameExtensionPassivePhaseLength_118, /**< \brief Length of Command frames passive phase is 120 */
313 IfxMsc_ControlFrameExtensionPassivePhaseLength_119, /**< \brief Length of Command frames passive phase is 121 */
314 IfxMsc_ControlFrameExtensionPassivePhaseLength_120, /**< \brief Length of Command frames passive phase is 122 */
315 IfxMsc_ControlFrameExtensionPassivePhaseLength_121, /**< \brief Length of Command frames passive phase is 123 */
316 IfxMsc_ControlFrameExtensionPassivePhaseLength_122, /**< \brief Length of Command frames passive phase is 124 */
317 IfxMsc_ControlFrameExtensionPassivePhaseLength_123, /**< \brief Length of Command frames passive phase is 125 */
318 IfxMsc_ControlFrameExtensionPassivePhaseLength_124, /**< \brief Length of Command frames passive phase is 126 */
319 IfxMsc_ControlFrameExtensionPassivePhaseLength_125, /**< \brief Length of Command frames passive phase is 127 */
320 IfxMsc_ControlFrameExtensionPassivePhaseLength_126, /**< \brief Length of Command frames passive phase is 128 */
321 IfxMsc_ControlFrameExtensionPassivePhaseLength_127 /**< \brief Length of Command frames passive phase is 129 */
322 } IfxMsc_ControlFrameExtensionPassivePhaseLength;
323
324 /** \brief Downstream Timing Extension Register - Passive Phase Length at Data Frames Extension\n
325 * Definition in Ifx_MSC.DSTE.B.PPDE
326 */
327 typedef enum
328 {
329 IfxMsc_DataFrameExtensionPassivePhaseLength_0 = 0, /**< \brief 0 Additional MSB bits extension of the PPD bit field */
330 IfxMsc_DataFrameExtensionPassivePhaseLength_1, /**< \brief 1 Additional MSB bits extension of the PPD bit field */
331 IfxMsc_DataFrameExtensionPassivePhaseLength_2, /**< \brief 2 Additional MSB bits extension of the PPD bit field */
332 IfxMsc_DataFrameExtensionPassivePhaseLength_3 /**< \brief 3 Additional MSB bits extension of the PPD bit field */
333 } IfxMsc_DataFrameExtensionPassivePhaseLength;
334
335 /** \brief Interrupt Control Register - Data Frame Interrupt Enable\n
336 * Definition in Ifx_MSC.ICR.B.EDIE
337 */
338 typedef enum
339 {
340 IfxMsc_DataFrameInterrupt_disabled = 0, /**< \brief Interrupt generation Disable */
341 IfxMsc_DataFrameInterrupt_atLastDataBit = 1, /**< \brief An interrupt is generated when the last data bit has been shifted out */
342 IfxMsc_DataFrameInterrupt_atFirstDataBit = 2 /**< \brief An interrupt is generated when the First data bit has been shifted out */
343 } IfxMsc_DataFrameInterrupt;
344
345 /** \brief Interrupt Control Register - Data Frame Interrupt Node Pointer\n
346 * Definition in Ifx_MSC.ICR.B.EDIP
347 */
348 typedef enum
349 {
350 IfxMsc_DataFrameInterruptNode_SR0 = 0, /**< \brief Service request output SR0 selected */
351 IfxMsc_DataFrameInterruptNode_SR1, /**< \brief Service request output SR1 selected */
352 IfxMsc_DataFrameInterruptNode_SR2, /**< \brief Service request output SR2 selected */
353 IfxMsc_DataFrameInterruptNode_SR3 /**< \brief Service request output SR3 selected */
354 } IfxMsc_DataFrameInterruptNode;
355
356 /** \brief Number of SRx[] (x->SRL/SRH) Bits Shifted at Data Frames\n
357 * Definition in Ifx_MSC.DSC.B.NDBH and Ifx_MSC.DSC.B.NDBL
358 */
359 typedef enum
360 {
361 IfxMsc_DataFrameLength_0 = 0, /**< \brief No SRx bit shifted */
362 IfxMsc_DataFrameLength_1 = 1, /**< \brief SRx[0] Shifted */
363 IfxMsc_DataFrameLength_2 = 2, /**< \brief SRx[1:0] Shifted */
364 IfxMsc_DataFrameLength_3, /**< \brief SRx[2:0] Shifted */
365 IfxMsc_DataFrameLength_4, /**< \brief SRx[3:0] Shifted */
366 IfxMsc_DataFrameLength_5, /**< \brief SRx[4:0] Shifted */
367 IfxMsc_DataFrameLength_6, /**< \brief SRx[5:0] Shifted */
368 IfxMsc_DataFrameLength_7, /**< \brief SRx[6:0] Shifted */
369 IfxMsc_DataFrameLength_8, /**< \brief SRx[7:0] Shifted */
370 IfxMsc_DataFrameLength_9, /**< \brief SRx[8:0] Shifted */
371 IfxMsc_DataFrameLength_10, /**< \brief SRx[9:0] Shifted */
372 IfxMsc_DataFrameLength_11, /**< \brief SRx[10:0] Shifted */
373 IfxMsc_DataFrameLength_12, /**< \brief SRx[11:0] Shifted */
374 IfxMsc_DataFrameLength_13, /**< \brief SRx[12:0] Shifted */
375 IfxMsc_DataFrameLength_14, /**< \brief SRx[13:0] Shifted */
376 IfxMsc_DataFrameLength_15, /**< \brief SRx[14:0] Shifted */
377 IfxMsc_DataFrameLength_16 /**< \brief SRx[15:0] Shifted */
378 } IfxMsc_DataFrameLength;
379
380 /** \brief Passive Phase Length at Data Frames\n
381 * Definition in Ifx_MSC.DSC.B.PPD
382 */
383 typedef enum
384 {
385 IfxMsc_DataFramePassivePhaseLength_2 = 2, /**< \brief Passive phase length is 2 tFCL */
386 IfxMsc_DataFramePassivePhaseLength_3, /**< \brief Passive phase length is 3 tFCL */
387 IfxMsc_DataFramePassivePhaseLength_4, /**< \brief Passive phase length is 4 tFCL */
388 IfxMsc_DataFramePassivePhaseLength_5, /**< \brief Passive phase length is 5 tFCL */
389 IfxMsc_DataFramePassivePhaseLength_6, /**< \brief Passive phase length is 6 tFCL */
390 IfxMsc_DataFramePassivePhaseLength_7, /**< \brief Passive phase length is 7 tFCL */
391 IfxMsc_DataFramePassivePhaseLength_8, /**< \brief Passive phase length is 8 tFCL */
392 IfxMsc_DataFramePassivePhaseLength_9, /**< \brief Passive phase length is 9 tFCL */
393 IfxMsc_DataFramePassivePhaseLength_10, /**< \brief Passive phase length is 10 tFCL */
394 IfxMsc_DataFramePassivePhaseLength_11, /**< \brief Passive phase length is 11 tFCL */
395 IfxMsc_DataFramePassivePhaseLength_12, /**< \brief Passive phase length is 12 tFCL */
396 IfxMsc_DataFramePassivePhaseLength_13, /**< \brief Passive phase length is 13 tFCL */
397 IfxMsc_DataFramePassivePhaseLength_14, /**< \brief Passive phase length is 14 tFCL */
398 IfxMsc_DataFramePassivePhaseLength_15, /**< \brief Passive phase length is 15 tFCL */
399 IfxMsc_DataFramePassivePhaseLength_16, /**< \brief Passive phase length is 16 tFCL */
400 IfxMsc_DataFramePassivePhaseLength_17, /**< \brief Passive phase length is 17 tFCL */
401 IfxMsc_DataFramePassivePhaseLength_18, /**< \brief Passive phase length is 18 tFCL */
402 IfxMsc_DataFramePassivePhaseLength_19, /**< \brief Passive phase length is 19 tFCL */
403 IfxMsc_DataFramePassivePhaseLength_20, /**< \brief Passive phase length is 20 tFCL */
404 IfxMsc_DataFramePassivePhaseLength_21, /**< \brief Passive phase length is 21 tFCL */
405 IfxMsc_DataFramePassivePhaseLength_22, /**< \brief Passive phase length is 22 tFCL */
406 IfxMsc_DataFramePassivePhaseLength_23, /**< \brief Passive phase length is 23 tFCL */
407 IfxMsc_DataFramePassivePhaseLength_24, /**< \brief Passive phase length is 24 tFCL */
408 IfxMsc_DataFramePassivePhaseLength_25, /**< \brief Passive phase length is 25 tFCL */
409 IfxMsc_DataFramePassivePhaseLength_26, /**< \brief Passive phase length is 26 tFCL */
410 IfxMsc_DataFramePassivePhaseLength_27, /**< \brief Passive phase length is 27 tFCL */
411 IfxMsc_DataFramePassivePhaseLength_28, /**< \brief Passive phase length is 28 tFCL */
412 IfxMsc_DataFramePassivePhaseLength_29, /**< \brief Passive phase length is 29 tFCL */
413 IfxMsc_DataFramePassivePhaseLength_30, /**< \brief Passive phase length is 30 tFCL */
414 IfxMsc_DataFramePassivePhaseLength_31, /**< \brief Passive phase length is 31 tFCL */
415 IfxMsc_DataFramePassivePhaseLength_32 /**< \brief Passive phase length is 32 tFCL */
416 } IfxMsc_DataFramePassivePhaseLength;
417
418 /** \brief Divider mode
419 */
420 typedef enum
421 {
422 IfxMsc_DividerMode_normal = 1, /**< \brief divider mode is normal */
423 IfxMsc_DividerMode_fractional = 2 /**< \brief divider mode is fractional */
424 } IfxMsc_DividerMode;
425
426 /** \brief Emergency Stop Register - Emergency stop feature Enable or Disable - SRL and SRH\n
427 * Definition in Ifx_MSC.ESR
428 */
429 typedef enum
430 {
431 IfxMsc_EmergencyStop_disabled = 0, /**< \brief Emergency stop feature for SRx bit is Disabled */
432 IfxMsc_EmergencyStop_enabled = 1 /**< \brief Emergency stop feature for SRx bit is Enabled */
433 } IfxMsc_EmergencyStop;
434
435 /** \brief Downstream Control Enhanced Register - Extension Enable\n
436 * Definition in Ifx_MSC.DSCE.B.NDBLE
437 */
438 typedef enum
439 {
440 IfxMsc_Extension_disabled = 0, /**< \brief Disables the extension bit fields */
441 IfxMsc_Extension_enabled = 1 /**< \brief Enables the extension bit fields */
442 } IfxMsc_Extension;
443
444 /** \brief Downstream Control Enhanced Register - Injection Position of the Pin 0 and 1 Signal\n
445 * Definition in Ifx_MSC.DSCE.B.INJPOSP0 and Ifx_MSC.DSCE.B.INJPOSP1
446 */
447 typedef enum
448 {
449 IfxMsc_ExternalBitInjectionPosition_0 = 0, /**< \brief Injected external bit is at Position 0 of the data frame */
450 IfxMsc_ExternalBitInjectionPosition_1, /**< \brief Injected external bit is at Position 1 of the data frame */
451 IfxMsc_ExternalBitInjectionPosition_2, /**< \brief Injected external bit is at Position 2 of the data frame */
452 IfxMsc_ExternalBitInjectionPosition_3, /**< \brief Injected external bit is at Position 3 of the data frame */
453 IfxMsc_ExternalBitInjectionPosition_4, /**< \brief Injected external bit is at Position 4 of the data frame */
454 IfxMsc_ExternalBitInjectionPosition_5, /**< \brief Injected external bit is at Position 5 of the data frame */
455 IfxMsc_ExternalBitInjectionPosition_6, /**< \brief Injected external bit is at Position 6 of the data frame */
456 IfxMsc_ExternalBitInjectionPosition_7, /**< \brief Injected external bit is at Position 7 of the data frame */
457 IfxMsc_ExternalBitInjectionPosition_8, /**< \brief Injected external bit is at Position 8 of the data frame */
458 IfxMsc_ExternalBitInjectionPosition_9, /**< \brief Injected external bit is at Position 9 of the data frame */
459 IfxMsc_ExternalBitInjectionPosition_10, /**< \brief Injected external bit is at Position 10 of the data frame */
460 IfxMsc_ExternalBitInjectionPosition_11, /**< \brief Injected external bit is at Position 11 of the data frame */
461 IfxMsc_ExternalBitInjectionPosition_12, /**< \brief Injected external bit is at Position 12 of the data frame */
462 IfxMsc_ExternalBitInjectionPosition_13, /**< \brief Injected external bit is at Position 13 of the data frame */
463 IfxMsc_ExternalBitInjectionPosition_14, /**< \brief Injected external bit is at Position 14 of the data frame */
464 IfxMsc_ExternalBitInjectionPosition_15, /**< \brief Injected external bit is at Position 15 of the data frame */
465 IfxMsc_ExternalBitInjectionPosition_16, /**< \brief Injected external bit is at Position 16 of the data frame */
466 IfxMsc_ExternalBitInjectionPosition_17, /**< \brief Injected external bit is at Position 17 of the data frame */
467 IfxMsc_ExternalBitInjectionPosition_18, /**< \brief Injected external bit is at Position 18 of the data frame */
468 IfxMsc_ExternalBitInjectionPosition_19, /**< \brief Injected external bit is at Position 19 of the data frame */
469 IfxMsc_ExternalBitInjectionPosition_20, /**< \brief Injected external bit is at Position 20 of the data frame */
470 IfxMsc_ExternalBitInjectionPosition_21, /**< \brief Injected external bit is at Position 21 of the data frame */
471 IfxMsc_ExternalBitInjectionPosition_22, /**< \brief Injected external bit is at Position 22 of the data frame */
472 IfxMsc_ExternalBitInjectionPosition_23, /**< \brief Injected external bit is at Position 23 of the data frame */
473 IfxMsc_ExternalBitInjectionPosition_24, /**< \brief Injected external bit is at Position 24 of the data frame */
474 IfxMsc_ExternalBitInjectionPosition_25, /**< \brief Injected external bit is at Position 25 of the data frame */
475 IfxMsc_ExternalBitInjectionPosition_26, /**< \brief Injected external bit is at Position 26 of the data frame */
476 IfxMsc_ExternalBitInjectionPosition_27, /**< \brief Injected external bit is at Position 27 of the data frame */
477 IfxMsc_ExternalBitInjectionPosition_28, /**< \brief Injected external bit is at Position 28 of the data frame */
478 IfxMsc_ExternalBitInjectionPosition_29, /**< \brief Injected external bit is at Position 29 of the data frame */
479 IfxMsc_ExternalBitInjectionPosition_30, /**< \brief Injected external bit is at Position 30 of the data frame */
480 IfxMsc_ExternalBitInjectionPosition_31, /**< \brief Injected external bit is at Position 31 of the data frame */
481 IfxMsc_ExternalBitInjectionPosition_32, /**< \brief Injected external bit is at Position 32 of the data frame */
482 IfxMsc_ExternalBitInjectionPosition_33, /**< \brief Injected external bit is at Position 33 of the data frame */
483 IfxMsc_ExternalBitInjectionPosition_34, /**< \brief Injected external bit is at Position 34 of the data frame */
484 IfxMsc_ExternalBitInjectionPosition_35, /**< \brief Injected external bit is at Position 35 of the data frame */
485 IfxMsc_ExternalBitInjectionPosition_36, /**< \brief Injected external bit is at Position 36 of the data frame */
486 IfxMsc_ExternalBitInjectionPosition_37, /**< \brief Injected external bit is at Position 37 of the data frame */
487 IfxMsc_ExternalBitInjectionPosition_38, /**< \brief Injected external bit is at Position 38 of the data frame */
488 IfxMsc_ExternalBitInjectionPosition_39, /**< \brief Injected external bit is at Position 39 of the data frame */
489 IfxMsc_ExternalBitInjectionPosition_40, /**< \brief Injected external bit is at Position 40 of the data frame */
490 IfxMsc_ExternalBitInjectionPosition_41, /**< \brief Injected external bit is at Position 41 of the data frame */
491 IfxMsc_ExternalBitInjectionPosition_42, /**< \brief Injected external bit is at Position 42 of the data frame */
492 IfxMsc_ExternalBitInjectionPosition_43, /**< \brief Injected external bit is at Position 43 of the data frame */
493 IfxMsc_ExternalBitInjectionPosition_44, /**< \brief Injected external bit is at Position 44 of the data frame */
494 IfxMsc_ExternalBitInjectionPosition_45, /**< \brief Injected external bit is at Position 45 of the data frame */
495 IfxMsc_ExternalBitInjectionPosition_46, /**< \brief Injected external bit is at Position 46 of the data frame */
496 IfxMsc_ExternalBitInjectionPosition_47, /**< \brief Injected external bit is at Position 47 of the data frame */
497 IfxMsc_ExternalBitInjectionPosition_48, /**< \brief Injected external bit is at Position 48 of the data frame */
498 IfxMsc_ExternalBitInjectionPosition_49, /**< \brief Injected external bit is at Position 49 of the data frame */
499 IfxMsc_ExternalBitInjectionPosition_50, /**< \brief Injected external bit is at Position 50 of the data frame */
500 IfxMsc_ExternalBitInjectionPosition_51, /**< \brief Injected external bit is at Position 51 of the data frame */
501 IfxMsc_ExternalBitInjectionPosition_52, /**< \brief Injected external bit is at Position 52 of the data frame */
502 IfxMsc_ExternalBitInjectionPosition_53, /**< \brief Injected external bit is at Position 53 of the data frame */
503 IfxMsc_ExternalBitInjectionPosition_54, /**< \brief Injected external bit is at Position 54 of the data frame */
504 IfxMsc_ExternalBitInjectionPosition_55, /**< \brief Injected external bit is at Position 55 of the data frame */
505 IfxMsc_ExternalBitInjectionPosition_56, /**< \brief Injected external bit is at Position 56 of the data frame */
506 IfxMsc_ExternalBitInjectionPosition_57, /**< \brief Injected external bit is at Position 57 of the data frame */
507 IfxMsc_ExternalBitInjectionPosition_58, /**< \brief Injected external bit is at Position 58 of the data frame */
508 IfxMsc_ExternalBitInjectionPosition_59, /**< \brief Injected external bit is at Position 59 of the data frame */
509 IfxMsc_ExternalBitInjectionPosition_60, /**< \brief Injected external bit is at Position 60 of the data frame */
510 IfxMsc_ExternalBitInjectionPosition_61, /**< \brief Injected external bit is at Position 61 of the data frame */
511 IfxMsc_ExternalBitInjectionPosition_62, /**< \brief Injected external bit is at Position 62 of the data frame */
512 IfxMsc_ExternalBitInjectionPosition_63 /**< \brief Injected external bit is at Position 63 of the data frame */
513 } IfxMsc_ExternalBitInjectionPosition;
514
515 /** \brief Downstream Control Enhanced Register - Injection Enable of the Pin 0 and 1 Signal\n
516 * Definition in Ifx_MSC.DSCE.B.INJENP0 and Ifx_MSC.DSCE.B.INJENP1
517 */
518 typedef enum
519 {
520 IfxMsc_ExternalSignalInjection_disabled = 0, /**< \brief Disables the external signal injection in a data frame */
521 IfxMsc_ExternalSignalInjection_enabled = 1 /**< \brief Enables the external signal injection in a data frame */
522 } IfxMsc_ExternalSignalInjection;
523
524 /** \brief Enum for enable and disable Fast Mode
525 */
526 typedef enum
527 {
528 IfxMsc_FastMode_disabled = 0, /**< \brief Disable Fast Mode(DSTE.FM=0).Needs to be cleared with DSTE.UL1=1 in the same cycle */
529 IfxMsc_FastMode_enabled = 1 /**< \brief Enable Fast Mode(DSTE.FM=1).Needs to be cleared with DSTE.UL1=1 in the same cycle */
530 } IfxMsc_FastMode;
531
532 /** \brief Output Control Register - Clock Control\n
533 * Definition in Ifx_MSC.OCR.B.CLKCTRL
534 */
535 typedef enum
536 {
537 IfxMsc_FclClockControlEnabled_activePhaseOnly = 0, /**< \brief FCL is active during active phases of data or command frames */
538 IfxMsc_FclClockControlEnabled_always = 1 /**< \brief FCL is always active */
539 } IfxMsc_FclClockControlEnabled;
540
541 /** \brief Output Control Register - FCLP Line Polarity\n
542 * Definition in Ifx_MSC.OCR.B.CLP
543 */
544 typedef enum
545 {
546 IfxMsc_FclLinePolarity_nonInverted = 0, /**< \brief FCLP and FCL signal polarity is identical */
547 IfxMsc_FclLinePolarity_inverted = 1 /**< \brief FCLP signal has inverted FCL signal polarity */
548 } IfxMsc_FclLinePolarity;
549
550 /** \brief Enable hardware clock control
551 */
552 typedef enum
553 {
554 IfxMsc_HardwareClock_disabled = 0, /**< \brief Hardware clock disable */
555 IfxMsc_HardwareClock_enabled = 1 /**< \brief Hardware clock enable */
556 } IfxMsc_HardwareClock;
557
558 /** \brief Interrupt Service Request
559 */
560 typedef enum
561 {
562 IfxMsc_InterruptServiceRequest_0 = 0, /**< \brief Interrupt Service Request number0 */
563 IfxMsc_InterruptServiceRequest_1, /**< \brief Interrupt Service Request number1 */
564 IfxMsc_InterruptServiceRequest_2, /**< \brief Interrupt Service Request number2 */
565 IfxMsc_InterruptServiceRequest_3, /**< \brief Interrupt Service Request number3 */
566 IfxMsc_InterruptServiceRequest_4 /**< \brief Interrupt Service Request number4 */
567 } IfxMsc_InterruptServiceRequest;
568
569 /** \brief OCDS Control and Status - OCDS Suspend Control
570 * Definition in Ifx_MSC.OCS.B.SUS
571 */
572 typedef enum
573 {
574 IfxMsc_ModuleSuspendRequestBit_noSuspend = 0, /**< \brief OCDS is not suspended */
575 IfxMsc_ModuleSuspendRequestBit_hardSuspend = 1, /**< \brief OCDS is Hard suspended. Clock is switched off immediately */
576 IfxMsc_ModuleSuspendRequestBit_softSuspend = 2 /**< \brief OCDS is Soft suspended */
577 } IfxMsc_ModuleSuspendRequestBit;
578
579 /** \brief Downstream Control Enhanced Register - Number of SRL/SRH Bits Shifted at Data Frames Extension (NDBL/NDBH)\n
580 * Definition in Ifx_MSC.DSCE.B.NDBLE and Ifx_MSC.DSCE.B.NDBHE
581 */
582 typedef enum
583 {
584 IfxMsc_MsbBitDataExtension_notPresent = 0, /**< \brief Additional MSB bit is not present in the extension of the NDBL/NDBH bit field */
585 IfxMsc_MsbBitDataExtension_present = 1 /**< \brief Additional MSB bit is present in the extension of the NDBL/NDBH bit field */
586 } IfxMsc_MsbBitDataExtension;
587
588 /** \brief Asynchronous Block Configuration Register - N Divider ABRA\n
589 * Definition in Ifx_MSC.ABC.B.NDA
590 */
591 typedef enum
592 {
593 IfxMsc_NDividerAbra_1 = 0, /**< \brief Division ratio is 1 */
594 IfxMsc_NDividerAbra_2, /**< \brief Division ratio is 2 */
595 IfxMsc_NDividerAbra_3, /**< \brief Division ratio is 3 */
596 IfxMsc_NDividerAbra_4, /**< \brief Division ratio is 4 */
597 IfxMsc_NDividerAbra_5, /**< \brief Division ratio is 5 */
598 IfxMsc_NDividerAbra_6, /**< \brief Division ratio is 6 */
599 IfxMsc_NDividerAbra_7, /**< \brief Division ratio is 7 */
600 IfxMsc_NDividerAbra_8 /**< \brief Division ratio is 8 */
601 } IfxMsc_NDividerAbra;
602
603 /** \brief Downstream Timing Extension Register - N Divider Downstream\n
604 * Definition in Ifx_MSC.DSTE.B.NDD
605 */
606 typedef enum
607 {
608 IfxMsc_NDividerDownstream_1 = 0, /**< \brief division ratio is 1 */
609 IfxMsc_NDividerDownstream_2, /**< \brief division ratio is 2 */
610 IfxMsc_NDividerDownstream_3, /**< \brief division ratio is 3 */
611 IfxMsc_NDividerDownstream_4, /**< \brief division ratio is 4 */
612 IfxMsc_NDividerDownstream_5, /**< \brief division ratio is 5 */
613 IfxMsc_NDividerDownstream_6, /**< \brief division ratio is 6 */
614 IfxMsc_NDividerDownstream_7, /**< \brief division ratio is 7 */
615 IfxMsc_NDividerDownstream_8, /**< \brief division ratio is 8 */
616 IfxMsc_NDividerDownstream_9, /**< \brief division ratio is 9 */
617 IfxMsc_NDividerDownstream_10, /**< \brief division ratio is 10 */
618 IfxMsc_NDividerDownstream_11, /**< \brief division ratio is 11 */
619 IfxMsc_NDividerDownstream_12, /**< \brief division ratio is 12 */
620 IfxMsc_NDividerDownstream_13, /**< \brief division ratio is 13 */
621 IfxMsc_NDividerDownstream_14, /**< \brief division ratio is 14 */
622 IfxMsc_NDividerDownstream_15, /**< \brief division ratio is 15 */
623 IfxMsc_NDividerDownstream_16 /**< \brief division ratio is 16 */
624 } IfxMsc_NDividerDownstream;
625
626 /** \brief Asynchronous Block Configuration Register - Overflow Interrupt Enable\n
627 * Definition in Ifx_MSC.ABC.B.OIE
628 */
629 typedef enum
630 {
631 IfxMsc_OverflowInterrupt_disabled = 0, /**< \brief Disables the path of the overflow interrupt towards the interrupt node */
632 IfxMsc_OverflowInterrupt_enabled = 1 /**< \brief Enables the path of the overflow interrupt towards the interrupt node */
633 } IfxMsc_OverflowInterrupt;
634
635 /** \brief Asynchronous Block Configuration Register - Overflow Interrupt Node Pointer\n
636 * Definition in Ifx_MSC.ABC.B.OIP
637 */
638 typedef enum
639 {
640 IfxMsc_OverflowInterruptNode_SR0 = 0, /**< \brief Service request output SR0 selected */
641 IfxMsc_OverflowInterruptNode_SR1, /**< \brief Service request output SR1 selected */
642 IfxMsc_OverflowInterruptNode_SR2, /**< \brief Service request output SR2 selected */
643 IfxMsc_OverflowInterruptNode_SR3, /**< \brief Service request output SR3 selected */
644 IfxMsc_OverflowInterruptNode_SR4 /**< \brief Service request output SR4 selected */
645 } IfxMsc_OverflowInterruptNode;
646
647 /** \brief Parity Mode\n
648 * Definition in Ifx_MSC.USR.B.PCT
649 */
650 typedef enum
651 {
652 IfxMsc_Parity_even = 0, /**< \brief Even Parity */
653 IfxMsc_Parity_odd = 1 /**< \brief Odd Parity */
654 } IfxMsc_Parity;
655
656 /** \brief Downstream Status Register - Number Of Passive Time Frames\n
657 * Definition in Ifx_MSC.DSS.B.NPTF
658 */
659 typedef enum
660 {
661 IfxMsc_PassiveTimeFrameCount_0 = 0, /**< \brief No Passive time frames inserted */
662 IfxMsc_PassiveTimeFrameCount_1 = 1, /**< \brief 1 Passive time frames inserted */
663 IfxMsc_PassiveTimeFrameCount_2, /**< \brief 2 Passive time frames inserted */
664 IfxMsc_PassiveTimeFrameCount_3, /**< \brief 3 Passive time frames inserted */
665 IfxMsc_PassiveTimeFrameCount_4, /**< \brief 4 Passive time frames inserted */
666 IfxMsc_PassiveTimeFrameCount_5, /**< \brief 5 Passive time frames inserted */
667 IfxMsc_PassiveTimeFrameCount_6, /**< \brief 6 Passive time frames inserted */
668 IfxMsc_PassiveTimeFrameCount_7, /**< \brief 7 Passive time frames inserted */
669 IfxMsc_PassiveTimeFrameCount_8, /**< \brief 8 Passive time frames inserted */
670 IfxMsc_PassiveTimeFrameCount_9, /**< \brief 9 Passive time frames inserted */
671 IfxMsc_PassiveTimeFrameCount_10, /**< \brief 10 Passive time frames inserted */
672 IfxMsc_PassiveTimeFrameCount_11, /**< \brief 11 Passive time frames inserted */
673 IfxMsc_PassiveTimeFrameCount_12, /**< \brief 12 Passive time frames inserted */
674 IfxMsc_PassiveTimeFrameCount_13, /**< \brief 13 Passive time frames inserted */
675 IfxMsc_PassiveTimeFrameCount_14, /**< \brief 14 Passive time frames inserted */
676 IfxMsc_PassiveTimeFrameCount_15 /**< \brief 15 Passive time frames inserted */
677 } IfxMsc_PassiveTimeFrameCount;
678
679 /** \brief Interrupt Control Register - Receive Data Interrupt Enable\n
680 * Definition in Ifx_MSC.ICR.B.RDIE
681 */
682 typedef enum
683 {
684 IfxMsc_ReceiveDataInterrupt_disabled = 0, /**< \brief Interrupt generation disabled */
685 IfxMsc_ReceiveDataInterrupt_onDataReceive = 1, /**< \brief An interrupt is generated when data is received and written into the upstream data registers */
686 IfxMsc_ReceiveDataInterrupt_onRdieSet = 2, /**< \brief An interrupt is generated as with RDIE = 01B but only if the received data is not equal to 00H */
687 IfxMsc_ReceiveDataInterrupt_onDataReceiveInUd3 = 3 /**< \brief An interrupt is generated as with RDIE = 01B but only if the received data is not equal to 00H */
688 } IfxMsc_ReceiveDataInterrupt;
689
690 /** \brief Interrupt Control Register - Receive Data Interrupt Pointer\n
691 * Definition in Ifx_MSC.ICR.B.RDIP
692 */
693 typedef enum
694 {
695 IfxMsc_ReceiveDataInterruptNode_SR0 = 0, /**< \brief Service request output SR0 selected */
696 IfxMsc_ReceiveDataInterruptNode_SR1, /**< \brief Service request output SR1 selected */
697 IfxMsc_ReceiveDataInterruptNode_SR2, /**< \brief Service request output SR2 selected */
698 IfxMsc_ReceiveDataInterruptNode_SR3 /**< \brief Service request output SR3 selected */
699 } IfxMsc_ReceiveDataInterruptNode;
700
701 /** \brief Output Control Register - SDI Line Polarity\n
702 * Definition in Ifx_MSC.OCR.B.ILP
703 */
704 typedef enum
705 {
706 IfxMsc_SdiLinePolarity_likeSi = 0, /**< \brief SDI and SI signal polarities are identical */
707 IfxMsc_SdiLinePolarity_invertedSi = 1 /**< \brief SDI and SI signal polarities are inverted */
708 } IfxMsc_SdiLinePolarity;
709
710 /** \brief Output Control Register - Serial Data Input Selection\n
711 * Definition in Ifx_MSC.OCR.B.SDISEL
712 */
713 typedef enum
714 {
715 IfxMsc_SerialDataInput_0 = 0, /**< \brief SDI0 is selected for the SDI of the upstream channel */
716 IfxMsc_SerialDataInput_1, /**< \brief SDI1 is selected for the SDI of the upstream channel */
717 IfxMsc_SerialDataInput_2, /**< \brief SDI2 is selected for the SDI of the upstream channel */
718 IfxMsc_SerialDataInput_3, /**< \brief SDI3 is selected for the SDI of the upstream channel */
719 IfxMsc_SerialDataInput_4, /**< \brief SDI4 is selected for the SDI of the upstream channel */
720 IfxMsc_SerialDataInput_5, /**< \brief SDI5 is selected for the SDI of the upstream channel */
721 IfxMsc_SerialDataInput_6, /**< \brief SDI6 is selected for the SDI of the upstream channel */
722 IfxMsc_SerialDataInput_7 /**< \brief SDI7 is selected for the SDI of the upstream channel */
723 } IfxMsc_SerialDataInput;
724
725 /** \brief Service Request Delay\n
726 * Definition in Ifx_MSC.USR.B.SRDC
727 */
728 typedef enum
729 {
730 IfxMsc_ServiceRequestDelay_noDelay = 0, /**< \brief No Delay */
731 IfxMsc_ServiceRequestDelay_1bit = 1 /**< \brief Delay of 1 bit time */
732 } IfxMsc_ServiceRequestDelay;
733
734 /** \brief Asynchronous Block Configuration Register - Duration of the Low/High Phase of the Shift Clock\n
735 * Definition in Ifx_MSC.ABC.B.LOW and Ifx_MSC.ABC.B.HIGH
736 */
737 typedef enum
738 {
739 IfxMsc_ShiftClockPhaseDuration_1 = 0, /**< \brief Duration in periods of f_A is 1 */
740 IfxMsc_ShiftClockPhaseDuration_2, /**< \brief Duration in periods of f_A is 2 */
741 IfxMsc_ShiftClockPhaseDuration_3, /**< \brief Duration in periods of f_A is 3 */
742 IfxMsc_ShiftClockPhaseDuration_4, /**< \brief Duration in periods of f_A is 4 */
743 IfxMsc_ShiftClockPhaseDuration_5, /**< \brief Duration in periods of f_A is 5 */
744 IfxMsc_ShiftClockPhaseDuration_6, /**< \brief Duration in periods of f_A is 6 */
745 IfxMsc_ShiftClockPhaseDuration_7, /**< \brief Duration in periods of f_A is 7 */
746 IfxMsc_ShiftClockPhaseDuration_8, /**< \brief Duration in periods of f_A is 8 */
747 IfxMsc_ShiftClockPhaseDuration_9, /**< \brief Duration in periods of f_A is 9 */
748 IfxMsc_ShiftClockPhaseDuration_10, /**< \brief Duration in periods of f_A is 10 */
749 IfxMsc_ShiftClockPhaseDuration_11, /**< \brief Duration in periods of f_A is 11 */
750 IfxMsc_ShiftClockPhaseDuration_12, /**< \brief Duration in periods of f_A is 12 */
751 IfxMsc_ShiftClockPhaseDuration_13, /**< \brief Duration in periods of f_A is 13 */
752 IfxMsc_ShiftClockPhaseDuration_14, /**< \brief Duration in periods of f_A is 14 */
753 IfxMsc_ShiftClockPhaseDuration_15, /**< \brief Duration in periods of f_A is 15 */
754 IfxMsc_ShiftClockPhaseDuration_16 /**< \brief Duration in periods of f_A is 16 */
755 } IfxMsc_ShiftClockPhaseDuration;
756
757 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
758 * Definition in Ifx_MSC.CLC.B.EDIS
759 */
760 typedef enum
761 {
762 IfxMsc_SleepMode_enable = 0, /**< \brief enables sleep mode */
763 IfxMsc_SleepMode_disable = 1 /**< \brief disables sleep mode */
764 } IfxMsc_SleepMode;
765
766 /** \brief Output Control Register - SOP Line Polarity\n
767 * Definition in Ifx_MSC.OCR.B.SLP
768 */
769 typedef enum
770 {
771 IfxMsc_SoLinePolarity_nonInverted = 0, /**< \brief SOP and SO polarity is identical */
772 IfxMsc_SoLinePolarity_inverted = 1 /**< \brief SOP and SO polarity is inverted */
773 } IfxMsc_SoLinePolarity;
774
775 /** \brief Downstream Select Data Source Low Register - Select Source for - SRL and SRHNumber Of Passive Time Frames\n
776 * Definition in Ifx_MSC.DSDSL and Ifx_MSC.DSDSH
777 */
778 typedef enum
779 {
780 IfxMsc_Source_downstreamDataRegister = 0, /**< \brief SRx[16] is taken from data Register DD.DDL[xx] */
781 IfxMsc_Source_alternateInputLine = 2, /**< \brief SRx[16] is taken from ALTINL input line */
782 IfxMsc_Source_alternateInputLineInverted = 3 /**< \brief SRx[16] is taken from ALTINL input line in inverted state */
783 } IfxMsc_Source;
784
785 /** \brief OCDS Suspend Control (OCDS.SUS)
786 */
787 typedef enum
788 {
789 IfxMsc_SuspendMode_none = 0, /**< \brief No suspend */
790 IfxMsc_SuspendMode_hard = 1, /**< \brief Hard Suspend */
791 IfxMsc_SuspendMode_soft = 2 /**< \brief Soft Suspend */
792 } IfxMsc_SuspendMode;
793
794 /** \brief Msc Targets - use as chip enable selection for ENH, ENL and ENC
795 */
796 typedef enum
797 {
798 IfxMsc_Target_en0 = 0, /**< \brief Target EN0 */
799 IfxMsc_Target_en1, /**< \brief Target EN1 */
800 IfxMsc_Target_en2, /**< \brief Target EN2 */
801 IfxMsc_Target_en3 /**< \brief Target EN3 */
802 } IfxMsc_Target;
803
804 /** \brief Interrupt Control Register - Time Frame Interrupt Enable\n
805 * Definition in Ifx_MSC.ICR.B.TFIE
806 */
807 typedef enum
808 {
809 IfxMsc_TimeFrameInterrupt_disabled = 0, /**< \brief Interrupt generation disabled */
810 IfxMsc_TimeFrameInterrupt_enabled = 1 /**< \brief Interrupt generation enabled */
811 } IfxMsc_TimeFrameInterrupt;
812
813 /** \brief Interrupt Control Register - Time Frame Interrupt Pointer\n
814 * Definition in Ifx_MSC.ICR.B.TFIP
815 */
816 typedef enum
817 {
818 IfxMsc_TimeFrameInterruptNode_SR0 = 0, /**< \brief Service request output SR0 selected */
819 IfxMsc_TimeFrameInterruptNode_SR1, /**< \brief Service request output SR1 selected */
820 IfxMsc_TimeFrameInterruptNode_SR2, /**< \brief Service request output SR2 selected */
821 IfxMsc_TimeFrameInterruptNode_SR3 /**< \brief Service request output SR3 selected */
822 } IfxMsc_TimeFrameInterruptNode;
823
824 /** \brief Downstream Channel Transmission Mode\n
825 * Definition in Ifx_MSC.DSC.B.TM
826 */
827 typedef enum
828 {
829 IfxMsc_TransmissionMode_triggered = 0, /**< \brief Triggered Mode */
830 IfxMsc_TransmissionMode_dataRepetition = 1 /**< \brief Data Repetition Mode */
831 } IfxMsc_TransmissionMode;
832
833 /** \brief Asynchronous Block Configuration Register - Underflow Interrupt Enable\n
834 * Definition in Ifx_MSC.ABC.B.UIE
835 */
836 typedef enum
837 {
838 IfxMsc_UnderflowInterrupt_disabled = 0, /**< \brief Disables the path of the Underflow interrupt towards the interrupt node */
839 IfxMsc_UnderflowInterrupt_enabled = 1 /**< \brief Enables the path of the Underflow interrupt towards the interrupt node */
840 } IfxMsc_UnderflowInterrupt;
841
842 /** \brief Asynchronous Block Configuration Register - Underflow Interrupt Node Pointer\n
843 * Definition in Ifx_MSC.ABC.B.UIP
844 */
845 typedef enum
846 {
847 IfxMsc_UnderflowInterruptNode_SR0 = 0, /**< \brief Service request output SR0 selected */
848 IfxMsc_UnderflowInterruptNode_SR1, /**< \brief Service request output SR1 selected */
849 IfxMsc_UnderflowInterruptNode_SR2, /**< \brief Service request output SR2 selected */
850 IfxMsc_UnderflowInterruptNode_SR3, /**< \brief Service request output SR3 selected */
851 IfxMsc_UnderflowInterruptNode_SR4 /**< \brief Service request output SR4 selected */
852 } IfxMsc_UnderflowInterruptNode;
853
854 /** \brief Channel Frame Type\n
855 * Definition in Ifx_MSC.USR.B.UFT
856 */
857 typedef enum
858 {
859 IfxMsc_UpstreamChannelFrameType_12bit = 0, /**< \brief 12-bit Upstream frame selected */
860 IfxMsc_UpstreamChannelFrameType_16bit = 1 /**< \brief 16-bit Upstream frame selected */
861 } IfxMsc_UpstreamChannelFrameType;
862
863 /** \brief Upstream Receiving Rate\n
864 * Definition in Ifx_MSC.USR.B.URR
865 */
866 typedef enum
867 {
868 IfxMsc_UpstreamChannelReceivingRate_disabled = 0, /**< \brief Disabled */
869 IfxMsc_UpstreamChannelReceivingRate_4 = 1, /**< \brief Baud rate = f_MSC / 4 */
870 IfxMsc_UpstreamChannelReceivingRate_8 = 2, /**< \brief Baud rate = f_MSC / 8 */
871 IfxMsc_UpstreamChannelReceivingRate_16 = 3, /**< \brief Baud rate = f_MSC / 16 */
872 IfxMsc_UpstreamChannelReceivingRate_32 = 4, /**< \brief Baud rate = f_MSC / 32 */
873 IfxMsc_UpstreamChannelReceivingRate_64 = 5, /**< \brief Baud rate = f_MSC / 64 */
874 IfxMsc_UpstreamChannelReceivingRate_128 = 6, /**< \brief Baud rate = f_MSC / 128 */
875 IfxMsc_UpstreamChannelReceivingRate_256 = 7 /**< \brief Baud rate = f_MSC / 256 */
876 } IfxMsc_UpstreamChannelReceivingRate;
877
878 /** \brief Upstream Control Enhanced Register 1 - Upstream Timeout Interrupt Enable\n
879 * Definition in Ifx_MSC.USCE.B.USTOEN
880 */
881 typedef enum
882 {
883 IfxMsc_UpstreamTimeoutInterrupt_disabled = 0, /**< \brief Upstream Timeout Interrupt Disabled */
884 IfxMsc_UpstreamTimeoutInterrupt_enabled = 1 /**< \brief Upstream Timeout Interrupt Enabled */
885 } IfxMsc_UpstreamTimeoutInterrupt;
886
887 /** \brief Upstream Control Enhanced Register 1 - Upstream Timeout Interrupt Node Pointer\n
888 * Definition in Ifx_MSC.USCE.B.USTOIP
889 */
890 typedef enum
891 {
892 IfxMsc_UpstreamTimeoutInterruptNode_SR0 = 0, /**< \brief Service request output SR0 selected */
893 IfxMsc_UpstreamTimeoutInterruptNode_SR1, /**< \brief Service request output SR1 selected */
894 IfxMsc_UpstreamTimeoutInterruptNode_SR2, /**< \brief Service request output SR2 selected */
895 IfxMsc_UpstreamTimeoutInterruptNode_SR3, /**< \brief Service request output SR3 selected */
896 IfxMsc_UpstreamTimeoutInterruptNode_SR4 /**< \brief Service request output SR4 selected */
897 } IfxMsc_UpstreamTimeoutInterruptNode;
898
899 /** \brief Upstream Control Enhanced Register 1 - Upstream Timeout Prescaler\n
900 * Definition in Ifx_MSC.USCE.B.USTOPRE
901 */
902 typedef enum
903 {
904 IfxMsc_UpstreamTimeoutPrescaler_1 = 0, /**< \brief Prescale value 1 for the upstream time-out limit */
905 IfxMsc_UpstreamTimeoutPrescaler_2 = 1, /**< \brief Prescale value 2 for the upstream time-out limit */
906 IfxMsc_UpstreamTimeoutPrescaler_4 = 2, /**< \brief Prescale value 4 for the upstream time-out limit */
907 IfxMsc_UpstreamTimeoutPrescaler_8 = 3, /**< \brief Prescale value 8 for the upstream time-out limit */
908 IfxMsc_UpstreamTimeoutPrescaler_16 = 4, /**< \brief Prescale value 16 for the upstream time-out limit */
909 IfxMsc_UpstreamTimeoutPrescaler_32 = 5, /**< \brief Prescale value 32 for the upstream time-out limit */
910 IfxMsc_UpstreamTimeoutPrescaler_64 = 6, /**< \brief Prescale value 64 for the upstream time-out limit */
911 IfxMsc_UpstreamTimeoutPrescaler_128 = 7, /**< \brief Prescale value 128 for the upstream time-out limit */
912 IfxMsc_UpstreamTimeoutPrescaler_256 = 8, /**< \brief Prescale value 256 for the upstream time-out limit */
913 IfxMsc_UpstreamTimeoutPrescaler_512 = 9, /**< \brief Prescale value 512 for the upstream time-out limit */
914 IfxMsc_UpstreamTimeoutPrescaler_1024 = 10, /**< \brief Prescale value 1024 for the upstream time-out limit */
915 IfxMsc_UpstreamTimeoutPrescaler_2048 = 11, /**< \brief Prescale value 2048 for the upstream time-out limit */
916 IfxMsc_UpstreamTimeoutPrescaler_4096 = 12, /**< \brief Prescale value 4096 for the upstream time-out limit */
917 IfxMsc_UpstreamTimeoutPrescaler_8192 = 13, /**< \brief Prescale value 8192 for the upstream time-out limit */
918 IfxMsc_UpstreamTimeoutPrescaler_16384 = 14, /**< \brief Prescale value 16384 for the upstream time-out limit */
919 IfxMsc_UpstreamTimeoutPrescaler_32768 = 15 /**< \brief Prescale value 32768 for the upstream time-out limit */
920 } IfxMsc_UpstreamTimeoutPrescaler;
921
922 /** \brief Upstream Control Enhanced Register 1 - Upstream Timeout Value\n
923 * Definition in Ifx_MSC.USCE.B.USTOVAL
924 */
925 typedef enum
926 {
927 IfxMsc_UpstreamTimeoutValue_1 = 0, /**< \brief Upstream timeout value for the N-Divider */
928 IfxMsc_UpstreamTimeoutValue_2, /**< \brief Upstream timeout value for the N-Divider */
929 IfxMsc_UpstreamTimeoutValue_3, /**< \brief Upstream timeout value for the N-Divider */
930 IfxMsc_UpstreamTimeoutValue_4, /**< \brief Upstream timeout value for the N-Divider */
931 IfxMsc_UpstreamTimeoutValue_5, /**< \brief Upstream timeout value for the N-Divider */
932 IfxMsc_UpstreamTimeoutValue_6, /**< \brief Upstream timeout value for the N-Divider */
933 IfxMsc_UpstreamTimeoutValue_7, /**< \brief Upstream timeout value for the N-Divider */
934 IfxMsc_UpstreamTimeoutValue_8, /**< \brief Upstream timeout value for the N-Divider */
935 IfxMsc_UpstreamTimeoutValue_9, /**< \brief Upstream timeout value for the N-Divider */
936 IfxMsc_UpstreamTimeoutValue_10, /**< \brief Upstream timeout value for the N-Divider */
937 IfxMsc_UpstreamTimeoutValue_11, /**< \brief Upstream timeout value for the N-Divider */
938 IfxMsc_UpstreamTimeoutValue_12, /**< \brief Upstream timeout value for the N-Divider */
939 IfxMsc_UpstreamTimeoutValue_13, /**< \brief Upstream timeout value for the N-Divider */
940 IfxMsc_UpstreamTimeoutValue_14, /**< \brief Upstream timeout value for the N-Divider */
941 IfxMsc_UpstreamTimeoutValue_15, /**< \brief Upstream timeout value for the N-Divider */
942 IfxMsc_UpstreamTimeoutValue_16 /**< \brief Upstream timeout value for the N-Divider */
943 } IfxMsc_UpstreamTimeoutValue;
944
945 /** \} */
946
947 /******************************************************************************/
948 /*-----------------------------Data Structures--------------------------------*/
949 /******************************************************************************/
950
951 /** \brief 64 bit commnd to be loaded first to DCE & then to DC for transmission.
952 */
953 typedef struct
954 {
955 uint32 dce; /**< \brief Command to be wrtten to DCE register */
956 uint32 dc; /**< \brief Command to be wrtten to DC register */
957 } IfxMsc_CxModeCommand;
958
959 /** \addtogroup IfxLld_Msc_Std_Config_Flags
960 * \{ */
961
962 /******************************************************************************/
963 /*-------------------------Inline Function Prototypes-------------------------*/
964 /******************************************************************************/
965
966 /** \brief Clear ABRA overflow flag
967 * \param msc pointer to the base of MSC registers
968 * \return None
969 */
970 IFX_INLINE void IfxMsc_clearAbraOverflowFlag(Ifx_MSC *msc);
971
972 /** \brief Clear ABRA underflow flag
973 * \param msc pointer to the base of MSC registers
974 * \return None
975 */
976 IFX_INLINE void IfxMsc_clearAbraUnderflowFlag(Ifx_MSC *msc);
977
978 /** \brief Clear Upstream timeout
979 * \param msc pointer to the base of MSC registers
980 * \return None
981 */
982 IFX_INLINE void IfxMsc_clearUpstreamTimeout(Ifx_MSC *msc);
983
984 /** \brief Clear the valid flag
985 * \param msc pointer to the base of MSC registers
986 * \param upstreamIdx data register ID
987 * \return None
988 */
989 IFX_INLINE void IfxMsc_clearUpstreamValidFlag(Ifx_MSC *msc, uint8 upstreamIdx);
990
991 /** \brief Get the status of the valid flag
992 * \param msc pointer to the base of MSC registers
993 * \param upstreamIdx data register ID
994 * \return Status TRUE or FALSE
995 */
996 IFX_INLINE boolean IfxMsc_getUpstreamValidFlag(Ifx_MSC *msc, uint8 upstreamIdx);
997
998 /** \} */
999
1000 /** \addtogroup IfxLld_Msc_Std_Set_Command_Target
1001 * \{ */
1002
1003 /******************************************************************************/
1004 /*-------------------------Inline Function Prototypes-------------------------*/
1005 /******************************************************************************/
1006
1007 /** \brief Select the target for command phase
1008 * \param msc pointer to the base of MSC registers
1009 * \param enX Target to be selected
1010 * \return None
1011 */
1012 IFX_INLINE void IfxMsc_setCommandTarget(Ifx_MSC *msc, IfxMsc_Target enX);
1013
1014 /** \} */
1015
1016 /** \addtogroup IfxLld_Msc_Std_Set_Data
1017 * \{ */
1018
1019 /******************************************************************************/
1020 /*-------------------------Inline Function Prototypes-------------------------*/
1021 /******************************************************************************/
1022
1023 /** \brief Select the target for data high phase
1024 * \param msc pointer to the base of MSC registers
1025 * \param enX Target to be selected
1026 * \return None
1027 */
1028 IFX_INLINE void IfxMsc_setDataHighTarget(Ifx_MSC *msc, IfxMsc_Target enX);
1029
1030 /** \brief Select the target for data low phase
1031 * \param msc pointer to the base of MSC registers
1032 * \param enX Target to be selected
1033 * \return None
1034 */
1035 IFX_INLINE void IfxMsc_setDataLowTarget(Ifx_MSC *msc, IfxMsc_Target enX);
1036
1037 /** \} */
1038
1039 /** \addtogroup IfxLld_Msc_Std_Get_Data
1040 * \{ */
1041
1042 /******************************************************************************/
1043 /*-------------------------Inline Function Prototypes-------------------------*/
1044 /******************************************************************************/
1045
1046 /** \brief Get the upstream data from upstream data register
1047 * \param msc pointer to the base of MSC registers
1048 * \param upstreamIdx Upstream data register ID
1049 * \return Recevived data
1050 */
1051 IFX_INLINE uint16 IfxMsc_getData(Ifx_MSC *msc, uint8 upstreamIdx);
1052
1053 /** \brief Get the selected target during high phase
1054 * \param msc pointer to the base of MSC registers
1055 * \return Selected target
1056 */
1057 IFX_INLINE IfxMsc_Target IfxMsc_getDataHighTarget(Ifx_MSC *msc);
1058
1059 /** \brief Get the selected target during low phase
1060 * \param msc pointer to the base of MSC registers
1061 * \return Selected target
1062 */
1063 IFX_INLINE IfxMsc_Target IfxMsc_getDataLowTarget(Ifx_MSC *msc);
1064
1065 /** \} */
1066
1067 /** \addtogroup IfxLld_Msc_Std_Enable_Module
1068 * \{ */
1069
1070 /******************************************************************************/
1071 /*-------------------------Global Function Prototypes-------------------------*/
1072 /******************************************************************************/
1073
1074 /** \brief Disable MSC kernel
1075 * \param msc pointer to the base of MSC registers
1076 * \return None
1077 */
1078 IFX_EXTERN void IfxMsc_disableModule(Ifx_MSC *msc);
1079
1080 /** \brief Enable MSC kernel
1081 * \param msc pointer to the base of MSC registers
1082 * \return None
1083 */
1084 IFX_EXTERN void IfxMsc_enableModule(Ifx_MSC *msc);
1085
1086 /** \} */
1087
1088 /** \addtogroup IfxLld_Msc_Std_Reset_Module
1089 * \{ */
1090
1091 /******************************************************************************/
1092 /*-------------------------Global Function Prototypes-------------------------*/
1093 /******************************************************************************/
1094
1095 /** \brief Clear reset bit of MSC kernel
1096 * \param msc pointer to the base of MSC registers
1097 * \return None
1098 */
1099 IFX_EXTERN void IfxMsc_clearReset(Ifx_MSC *msc);
1100
1101 /** \brief Reset MSC kernel
1102 * \param msc pointer to the base of MSC registers
1103 * \return None
1104 */
1105 IFX_EXTERN void IfxMsc_resetModule(Ifx_MSC *msc);
1106
1107 /** \} */
1108
1109 /** \addtogroup IfxLld_Msc_Std_Baud_Calculator
1110 * \{ */
1111
1112 /******************************************************************************/
1113 /*-------------------------Global Function Prototypes-------------------------*/
1114 /******************************************************************************/
1115
1116 /** \brief Get the NDD value for the supplied baud rate when when ABRA block is enabled
1117 * \param baud Required baud rate
1118 * \return NDD value
1119 */
1120 IFX_EXTERN uint32 IfxMsc_downstreamAbraBaudCalculator(uint32 baud);
1121
1122 /** \brief Get the step value for the supplied baud rate when divider mode is fractional
1123 * \param msc pointer to the base of MSC registers
1124 * \param baud Required baud rate
1125 * \return Step value
1126 */
1127 IFX_EXTERN uint64 IfxMsc_upstreamFractionalBaudCalculator(Ifx_MSC *msc, uint32 baud);
1128
1129 /** \brief Get the step value for the supplied baud rate when divider mode is normal
1130 * \param msc pointer to the base of MSC registers
1131 * \param baud Required baud rate
1132 * \return Step value
1133 */
1134 IFX_EXTERN uint32 IfxMsc_upstreamNormalBaudCalculator(Ifx_MSC *msc, uint32 baud);
1135
1136 /** \} */
1137
1138 /** \addtogroup IfxLld_Msc_Std_IO
1139 * \{ */
1140
1141 /******************************************************************************/
1142 /*-------------------------Inline Function Prototypes-------------------------*/
1143 /******************************************************************************/
1144
1145 /** \brief Initializes a EN output
1146 * \param en the EN Pin which should be configured
1147 * \param pinMode the pin output mode which should be configured
1148 * \param padDriver the pad driver mode which should be configured
1149 * \return None
1150 */
1151 IFX_INLINE void IfxMsc_initEnPin(const IfxMsc_En_Out *en, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver);
1152
1153 /** \brief Initializes a FCLN output
1154 * \param fcln the FCLN Pin which should be configured
1155 * \param pinMode the pin output mode which should be configured
1156 * \param padDriver the pad driver mode which should be configured
1157 * \return None
1158 */
1159 IFX_INLINE void IfxMsc_initFclnPin(const IfxMsc_Fcln_Out *fcln, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver);
1160
1161 /** \brief Initializes a FCLP output
1162 * \param fclp the FCLP Pin which should be configured
1163 * \param pinMode the pin output mode which should be configured
1164 * \param padDriver the pad driver mode which should be configured
1165 * \return None
1166 */
1167 IFX_INLINE void IfxMsc_initFclpPin(const IfxMsc_Fclp_Out *fclp, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver);
1168
1169 /** \brief Initializes a INJ input
1170 * \param inj the INJ Pin which should be configured
1171 * \param pinMode the pin input mode which should be configured
1172 * \param padDriver the pad driver mode which should be configured
1173 * \return None
1174 */
1175 IFX_INLINE void IfxMsc_initInjPin(const IfxMsc_Inj_In *inj, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver);
1176
1177 /** \brief Initializes a SDI input
1178 * \param sdi the SDI Pin which should be configured
1179 * \param pinMode the pin input mode which should be configured
1180 * \param padDriver the pad driver mode which should be configured
1181 * \return None
1182 */
1183 IFX_INLINE void IfxMsc_initSdiPin(const IfxMsc_Sdi_In *sdi, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver);
1184
1185 /** \brief Initializes a SON output
1186 * \param son the SON Pin which should be configured
1187 * \param pinMode the pin output mode which should be configured
1188 * \param padDriver the pad driver mode which should be configured
1189 * \return None
1190 */
1191 IFX_INLINE void IfxMsc_initSonPin(const IfxMsc_Son_Out *son, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver);
1192
1193 /** \brief Initializes a SOP output
1194 * \param sop the SOP Pin which should be configured
1195 * \param pinMode the pin output mode which should be configured
1196 * \param padDriver the pad driver mode which should be configured
1197 * \return None
1198 */
1199 IFX_INLINE void IfxMsc_initSopPin(const IfxMsc_Sop_Out *sop, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver);
1200
1201 /** \} */
1202
1203 /** \addtogroup IfxLld_Msc_Std_Module
1204 * \{ */
1205
1206 /******************************************************************************/
1207 /*-------------------------Global Function Prototypes-------------------------*/
1208 /******************************************************************************/
1209
1210 /**
1211 * \param msc Resource index of the MSC
1212 * \return MSC module register address
1213 */
1214 IFX_EXTERN Ifx_MSC *IfxMsc_getAddress(IfxMsc_Index msc);
1215
1216 /** \brief API to get the resource index of the MSC specified.
1217 * \param msc Pointer to the MSC HW module (register memory map)
1218 * \return Resource index of the ERAY
1219 */
1220 IFX_EXTERN IfxMsc_Index IfxMsc_getIndex(Ifx_MSC *msc);
1221
1222 /** \} */
1223
1224 /******************************************************************************/
1225 /*-------------------------Inline Function Prototypes-------------------------*/
1226 /******************************************************************************/
1227
1228 /** \brief Clears The Recieve Data Interrupt Flag
1229 * \param msc pointer to the base of MSC registers
1230 * \return None
1231 */
1232 IFX_INLINE void IfxMsc_clearRecieveDataInterruptFlag(Ifx_MSC *msc);
1233
1234 /** \brief Clears the Valid bit
1235 * \param msc pointer to the base of MSC registers
1236 * \param upstreamIdx upstream index
1237 * \return None
1238 */
1239 IFX_INLINE void IfxMsc_clearValidbit(Ifx_MSC *msc, uint8 upstreamIdx);
1240
1241 /** \brief Disables the Upstream Timeout Interrupt
1242 * \param msc pointer to the base of MSC registers
1243 * \return None
1244 */
1245 IFX_INLINE void IfxMsc_disableUpstreamTimeoutInterrupt(Ifx_MSC *msc);
1246
1247 /** \brief Enables the Upstream Timeout Interrupt
1248 * \param msc pointer to the base of MSC registers
1249 * \return None
1250 */
1251 IFX_INLINE void IfxMsc_enableUpstreamTimeoutInterrupt(Ifx_MSC *msc);
1252
1253 /** \brief Returns the value of Asynchronous clock Bypass bit.
1254 * \param msc pointer to the base of MSC registers
1255 * \return Get the value of Asynchronous clock bypass enable bit.
1256 */
1257 IFX_INLINE boolean IfxMsc_getAsyncClockBypass(Ifx_MSC *msc);
1258
1259 /** \brief Returns the value of Down stream extension enable bit.
1260 * \param msc pointer to the base of MSC registers
1261 * \return Get the value of Down stream extension enable bit.
1262 */
1263 IFX_INLINE boolean IfxMsc_getDownStreamExtension(Ifx_MSC *msc);
1264
1265 /** \brief Returns the Recieve DataInterrupt Flag Status
1266 * \param msc pointer to the base of MSC registers
1267 * \return Status
1268 */
1269 IFX_INLINE boolean IfxMsc_getRecieveDataInterruptFlag(Ifx_MSC *msc);
1270
1271 /** \brief Returns the Src pointer for the selected MSC interrupt node
1272 * \param msc pointer to the base of MSC registers
1273 * \param intRequest Interrupt Request
1274 * \return Pointer to SRCR register
1275 */
1276 IFX_INLINE volatile Ifx_SRC_SRCR *IfxMsc_getSrcPointer(Ifx_MSC *msc, IfxMsc_InterruptServiceRequest intRequest);
1277
1278 /** \brief Returns the Upstream Data
1279 * \param msc pointer to the base of MSC registers
1280 * \param upstreamIdx upstream index
1281 * \return Upstream Data
1282 */
1283 IFX_INLINE uint32 IfxMsc_getUpstreamData(Ifx_MSC *msc, uint8 upstreamIdx);
1284
1285 /** \brief Returns the Upstream Parity Error Flag Status
1286 * \param msc pointer to the base of MSC registers
1287 * \param upstreamIdx upstream index
1288 * \return Status
1289 */
1290 IFX_INLINE boolean IfxMsc_getUpstreamParityErrorFlag(Ifx_MSC *msc, uint8 upstreamIdx);
1291
1292 /** \brief Returns Upstream Timeout Flag Status
1293 * \param msc pointer to the base of MSC registers
1294 * \return Status
1295 */
1296 IFX_INLINE boolean IfxMsc_getUpstreamTimeoutFlag(Ifx_MSC *msc);
1297
1298 /** \brief Returns the module's suspend state.
1299 * TRUE :if module is suspended.
1300 * FALSE:if module is not yet suspended.
1301 * \param msc Pointer to MSC module registers
1302 * \return Suspend status (TRUE / FALSE)
1303 */
1304 IFX_INLINE boolean IfxMsc_isModuleSuspended(Ifx_MSC *msc);
1305
1306 /** \brief Set or reset the Asynchronous clock bypass bit.
1307 * \param msc pointer to the base of MSC registers
1308 * \param value Set / reset value.
1309 * \return None
1310 */
1311 IFX_INLINE void IfxMsc_setAsyncClockBypass(Ifx_MSC *msc, boolean value);
1312
1313 /** \brief Sets the Down stream data
1314 * \param msc pointer to the base of MSC registers
1315 * \param data Data
1316 * \return None
1317 */
1318 IFX_INLINE void IfxMsc_setDownStreamData(Ifx_MSC *msc, uint32 data);
1319
1320 /** \brief Set or reset the Down stream extension enable bit.
1321 * \param msc pointer to the base of MSC registers
1322 * \param value Set / reset value.
1323 * \return None
1324 */
1325 IFX_INLINE void IfxMsc_setDownStreamExtension(Ifx_MSC *msc, boolean value);
1326
1327 /** \brief Sets the Down stream Extension data
1328 * \param msc pointer to the base of MSC registers
1329 * \param data Data
1330 * \return None
1331 */
1332 IFX_INLINE void IfxMsc_setDownStreamExtensionData(Ifx_MSC *msc, uint32 data);
1333
1334 /** \brief Set or reset the Fast Mode bit.
1335 * Select the correct NDD value when using Fast mode.
1336 * \param msc pointer to the base of MSC registers
1337 * \param value Set / reset value.
1338 * \return None
1339 */
1340 IFX_INLINE void IfxMsc_setFastMode(Ifx_MSC *msc, boolean value);
1341
1342 /** \brief Sets The Fractional Divider Step
1343 * \param msc pointer to the base of MSC registers
1344 * \param value Value
1345 * \return None
1346 */
1347 IFX_INLINE void IfxMsc_setFractionalDividerStep(Ifx_MSC *msc, uint16 value);
1348
1349 /** \brief Set the required N divider downstream value.
1350 * \param msc pointer to the base of MSC registers
1351 * \param divisionRatio select the required division ratio.
1352 * \return None
1353 */
1354 IFX_INLINE void IfxMsc_setNdividerDownstream(Ifx_MSC *msc, IfxMsc_NDividerDownstream divisionRatio);
1355
1356 /** \brief To enable or disable CX mode
1357 * \param msc
1358 * \param value To enable or disable CX mode
1359 * \return None
1360 */
1361 IFX_INLINE void IfxMsc_setResetCommandExtensionMode(Ifx_MSC *msc, boolean value);
1362
1363 /** \brief Sets The Serial Data Input Select
1364 * \param msc pointer to the base of MSC registers
1365 * \param select Serial Data Input Select
1366 * \return None
1367 */
1368 IFX_INLINE void IfxMsc_setSerialDataInputSelect(Ifx_MSC *msc, IfxMsc_SerialDataInput select);
1369
1370 /** \brief Sets the sensitivity of the module to sleep signal
1371 * \param msc pointer to MSC registers
1372 * \param mode mode selection (enable/disable)
1373 * \return None
1374 */
1375 IFX_INLINE void IfxMsc_setSleepMode(Ifx_MSC *msc, IfxMsc_SleepMode mode);
1376
1377 /** \brief Configure the Module to Hard/Soft suspend mode.
1378 * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
1379 * \param msc Pointer to MSC module registers
1380 * \param mode Module suspend mode
1381 * \return None
1382 */
1383 IFX_INLINE void IfxMsc_setSuspendMode(Ifx_MSC *msc, IfxMsc_SuspendMode mode);
1384
1385 /** \brief Sets the Transmission Mode
1386 * \param msc pointer to the base of MSC registers
1387 * \param mode mode
1388 * \return None
1389 */
1390 IFX_INLINE void IfxMsc_setTransmissionMode(Ifx_MSC *msc, IfxMsc_TransmissionMode mode);
1391
1392 /** \brief Sets The Upstream Channel Recieve Rate
1393 * \param msc pointer to the base of MSC registers
1394 * \param recieveRate Recieve Rate
1395 * \return None
1396 */
1397 IFX_INLINE void IfxMsc_setUpstreamChannelRecieveRate(Ifx_MSC *msc, IfxMsc_UpstreamChannelReceivingRate recieveRate);
1398
1399 /** \brief Sets The Upstream Timeout
1400 * \param msc pointer to the base of MSC registers
1401 * \param timeoutVal Timeout Value
1402 * \return None
1403 */
1404 IFX_INLINE void IfxMsc_setUpstreamTimeout(Ifx_MSC *msc, IfxMsc_UpstreamTimeoutValue timeoutVal);
1405
1406 /** \brief Sets The Upstream Timeout Prescalar
1407 * \param msc pointer to the base of MSC registers
1408 * \param prescalar prescalar
1409 * \return None
1410 */
1411 IFX_INLINE void IfxMsc_setUpstreamTimeoutPrescalar(Ifx_MSC *msc, IfxMsc_UpstreamTimeoutPrescaler prescalar);
1412
1413 /** \brief Indicates if Overflow error has occured
1414 * \param msc Pointer to MSC SFR base address
1415 * \return Returns overflow error status
1416 */
1417 IFX_INLINE boolean IfxMsc_hasAbraOverflowErrorOccured(Ifx_MSC *msc);
1418
1419 /** \brief Indicates if Underflow error has occured
1420 * \param msc Pointer to MSC SFR base address
1421 * \return Returns underflow error status
1422 */
1423 IFX_INLINE boolean IfxMsc_hasAbraUnderflowErrorOccured(Ifx_MSC *msc);
1424
1425 /** \brief Sets the Overflow Flag and will trigger the overflow interrupt, if enabled
1426 * \param msc Pointer to MSC SFR base address
1427 * \return None
1428 */
1429 IFX_INLINE void IfxMsc_setAbraOverflowFlag(Ifx_MSC *msc);
1430
1431 /** \brief Sets the Underflow Flag and will trigger the underflow interrupt, if enabled
1432 * \param msc Pointer to MSC SFR base address
1433 * \return None
1434 */
1435 IFX_INLINE void IfxMsc_setAbraUnderflowFlag(Ifx_MSC *msc);
1436
1437 /******************************************************************************/
1438 /*-------------------------Global Function Prototypes-------------------------*/
1439 /******************************************************************************/
1440
1441 /** \brief clear data frame interrupt flag
1442 * \param msc pointer to the base of MSC registers
1443 * \return None
1444 */
1445 IFX_EXTERN void IfxMsc_clearDataFrameInterruptFlag(Ifx_MSC *msc);
1446
1447 /** \brief Get the step value for the supplied baud rate when divider mode is fractional for downstream
1448 * \param msc pointer to the base of MSC registers
1449 * \param baud Required baud rate
1450 * \return Step Value
1451 */
1452 IFX_EXTERN uint64 IfxMsc_downstreamFractionalBaudCalculator(Ifx_MSC *msc, uint32 baud);
1453
1454 /** \brief Get the step value for the supplied baud rate when divider mode is normal for downstream
1455 * \param msc Select DataType Ref
1456 * \param baud Required baud rate
1457 * \return Step value
1458 */
1459 IFX_EXTERN uint32 IfxMsc_downstreamNormalBaudCalculator(Ifx_MSC *msc, uint32 baud);
1460
1461 /** \brief get the status of the active data frame
1462 * \param msc pointer to the base of MSC registers
1463 * \return Status TRUE or FALSE
1464 */
1465 IFX_EXTERN boolean IfxMsc_getActiveDataFrameStatus(Ifx_MSC *msc);
1466
1467 /** \brief get the status of the data frame interrupt flag
1468 * \param msc pointer to the base of MSC registers
1469 * \return Status TRUE or FALSE
1470 */
1471 IFX_EXTERN boolean IfxMsc_getDataFrameInterruptFlag(Ifx_MSC *msc);
1472
1473 /**
1474 * \param msc Pointer to MSC module SFRs
1475 * \param command64 Command struct to be loaded to DCE & DC
1476 * \return None
1477 */
1478 IFX_EXTERN void IfxMsc_manualLoadCxModeCommand(Ifx_MSC *msc, IfxMsc_CxModeCommand *command64);
1479
1480 /** \brief Returns the downstream ABRA baudrate
1481 * \param msc Pointer to MSC SFR base address
1482 * \return Downstream ABRA baudrate
1483 */
1484 IFX_EXTERN float32 IfxMsc_getDownstreamAbraBaudrate(Ifx_MSC *msc);
1485
1486 /** \brief Returns the downstream baudrate(with ABRA disabled)
1487 * \param msc Pointer to MSC SFR base address
1488 * \return Returns the downstream baudrate(in case of ABRA disabled)
1489 */
1490 IFX_EXTERN float32 IfxMsc_getDownstreamAbraDisabledBaudrate(Ifx_MSC *msc);
1491
1492 /**
1493 * \param msc Pointer to MSC SFR base address
1494 * \return Returns the downstream baudrate.
1495 */
1496 IFX_EXTERN float32 IfxMsc_getDownstreamBaudrate(Ifx_MSC *msc);
1497
1498 /******************************************************************************/
1499 /*---------------------Inline Function Implementations------------------------*/
1500 /******************************************************************************/
1501
1502 IFX_INLINE void IfxMsc_clearAbraOverflowFlag(Ifx_MSC *msc)
1503 {
1504 /* Overflow Flag Clear */
1505 msc->ABC.B.OFM = 2;
1506 }
1507
1508
1509 IFX_INLINE void IfxMsc_clearAbraUnderflowFlag(Ifx_MSC *msc)
1510 {
1511 /* Underflow Flag Clear */
1512 msc->ABC.B.UFM = 2;
1513 }
1514
1515
1516 IFX_INLINE void IfxMsc_clearRecieveDataInterruptFlag(Ifx_MSC *msc)
1517 {
1518 msc->ISC.B.CURDI = 0x01U;
1519 }
1520
1521
1522 IFX_INLINE void IfxMsc_clearUpstreamTimeout(Ifx_MSC *msc)
1523 {
1524 /* Upstream Timeout Clear */
1525 msc->USCE.B.USTC = 1;
1526 }
1527
1528
1529 IFX_INLINE void IfxMsc_clearUpstreamValidFlag(Ifx_MSC *msc, uint8 upstreamIdx)
1530 {
1531 msc->UD[upstreamIdx].B.C = 1;
1532 }
1533
1534
1535 IFX_INLINE void IfxMsc_clearValidbit(Ifx_MSC *msc, uint8 upstreamIdx)
1536 {
1537 msc->UD[upstreamIdx].B.C = 0x01U;
1538 }
1539
1540
1541 IFX_INLINE void IfxMsc_disableUpstreamTimeoutInterrupt(Ifx_MSC *msc)
1542 {
1543 msc->USCE.B.USTOEN = 0x0U;
1544 }
1545
1546
1547 IFX_INLINE void IfxMsc_enableUpstreamTimeoutInterrupt(Ifx_MSC *msc)
1548 {
1549 msc->USCE.B.USTOEN = 0x1U;
1550 }
1551
1552
1553 IFX_INLINE boolean IfxMsc_getAsyncClockBypass(Ifx_MSC *msc)
1554 {
1555 return msc->ABC.B.ABB;
1556 }
1557
1558
1559 IFX_INLINE uint16 IfxMsc_getData(Ifx_MSC *msc, uint8 upstreamIdx)
1560 {
1561 uint16 data = 0;
1562
1563 data = msc->UD[upstreamIdx].B.DATA;
1564
1565 return data;
1566 }
1567
1568
1569 IFX_INLINE IfxMsc_Target IfxMsc_getDataHighTarget(Ifx_MSC *msc)
1570 {
1571 /* get data high target - en0, en1, en2 or en3 */
1572 return (IfxMsc_Target)msc->OCR.B.CSH;
1573 }
1574
1575
1576 IFX_INLINE IfxMsc_Target IfxMsc_getDataLowTarget(Ifx_MSC *msc)
1577 {
1578 /* get data low target - en0, en1, en2 or en3 */
1579 return (IfxMsc_Target)msc->OCR.B.CSL;
1580 }
1581
1582
1583 IFX_INLINE boolean IfxMsc_getDownStreamExtension(Ifx_MSC *msc)
1584 {
1585 return msc->DSCE.B.EXEN;
1586 }
1587
1588
1589 IFX_INLINE boolean IfxMsc_getRecieveDataInterruptFlag(Ifx_MSC *msc)
1590 {
1591 return msc->ISR.B.URDI;
1592 }
1593
1594
1595 IFX_INLINE volatile Ifx_SRC_SRCR *IfxMsc_getSrcPointer(Ifx_MSC *msc, IfxMsc_InterruptServiceRequest intRequest)
1596 {
1597 IfxMsc_Index mscIndex;
1598 volatile Ifx_SRC_SRCR *src;
1599 mscIndex = IfxMsc_getIndex(msc);
1600 src = &MODULE_SRC.MSC.MSC[mscIndex].SR[intRequest];
1601 return src;
1602 }
1603
1604
1605 IFX_INLINE uint32 IfxMsc_getUpstreamData(Ifx_MSC *msc, uint8 upstreamIdx)
1606 {
1607 return msc->UD[upstreamIdx].U;
1608 }
1609
1610
1611 IFX_INLINE boolean IfxMsc_getUpstreamParityErrorFlag(Ifx_MSC *msc, uint8 upstreamIdx)
1612 {
1613 return msc->UD[upstreamIdx].B.PERR;
1614 }
1615
1616
1617 IFX_INLINE boolean IfxMsc_getUpstreamTimeoutFlag(Ifx_MSC *msc)
1618 {
1619 return msc->USCE.B.USTF;
1620 }
1621
1622
1623 IFX_INLINE boolean IfxMsc_getUpstreamValidFlag(Ifx_MSC *msc, uint8 upstreamIdx)
1624 {
1625 boolean flag = 0;
1626
1627 flag = msc->UD[upstreamIdx].B.V;
1628
1629 return flag;
1630 }
1631
1632
1633 IFX_INLINE void IfxMsc_initEnPin(const IfxMsc_En_Out *en, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
1634 {
1635 if (en->pin.port != NULL_PTR)
1636 {
1637 IfxPort_setPinModeOutput(en->pin.port, en->pin.pinIndex, pinMode, en->select);
1638 IfxPort_setPinPadDriver(en->pin.port, en->pin.pinIndex, padDriver);
1639 }
1640 }
1641
1642
1643 IFX_INLINE void IfxMsc_initFclnPin(const IfxMsc_Fcln_Out *fcln, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
1644 {
1645 if (fcln->pin.port != NULL_PTR)
1646 {
1647 IfxPort_setPinModeOutput(fcln->pin.port, fcln->pin.pinIndex, pinMode, fcln->select);
1648 IfxPort_setPinPadDriver(fcln->pin.port, fcln->pin.pinIndex, padDriver);
1649 }
1650 }
1651
1652
1653 IFX_INLINE void IfxMsc_initFclpPin(const IfxMsc_Fclp_Out *fclp, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
1654 {
1655 if (fclp->pin.port != NULL_PTR)
1656 {
1657 IfxPort_setPinModeOutput(fclp->pin.port, fclp->pin.pinIndex, pinMode, fclp->select);
1658 IfxPort_setPinPadDriver(fclp->pin.port, fclp->pin.pinIndex, padDriver);
1659 }
1660 }
1661
1662
1663 IFX_INLINE void IfxMsc_initInjPin(const IfxMsc_Inj_In *inj, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
1664 {
1665 if (inj->pin.port != NULL_PTR)
1666 {
1667 IfxPort_setPinModeInput(inj->pin.port, inj->pin.pinIndex, pinMode);
1668 IfxPort_setPinPadDriver(inj->pin.port, inj->pin.pinIndex, padDriver);
1669 }
1670 }
1671
1672
1673 IFX_INLINE void IfxMsc_initSdiPin(const IfxMsc_Sdi_In *sdi, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
1674 {
1675 if (sdi->pin.port != NULL_PTR)
1676 {
1677 IfxPort_setPinModeInput(sdi->pin.port, sdi->pin.pinIndex, pinMode);
1678 IfxPort_setPinPadDriver(sdi->pin.port, sdi->pin.pinIndex, padDriver);
1679 sdi->module->OCR.B.SDISEL = sdi->select;
1680 }
1681 }
1682
1683
1684 IFX_INLINE void IfxMsc_initSonPin(const IfxMsc_Son_Out *son, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
1685 {
1686 if (son->pin.port != NULL_PTR)
1687 {
1688 IfxPort_setPinModeOutput(son->pin.port, son->pin.pinIndex, pinMode, son->select);
1689 IfxPort_setPinPadDriver(son->pin.port, son->pin.pinIndex, padDriver);
1690 }
1691 }
1692
1693
1694 IFX_INLINE void IfxMsc_initSopPin(const IfxMsc_Sop_Out *sop, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
1695 {
1696 if (sop->pin.port != NULL_PTR)
1697 {
1698 IfxPort_setPinModeOutput(sop->pin.port, sop->pin.pinIndex, pinMode, sop->select);
1699 IfxPort_setPinPadDriver(sop->pin.port, sop->pin.pinIndex, padDriver);
1700 }
1701 }
1702
1703
1704 IFX_INLINE boolean IfxMsc_isModuleSuspended(Ifx_MSC *msc)
1705 {
1706 Ifx_MSC_OCS ocs;
1707
1708 // read the status
1709 ocs.U = msc->OCS.U;
1710
1711 // return the status
1712 return ocs.B.SUSSTA;
1713 }
1714
1715
1716 IFX_INLINE void IfxMsc_setAsyncClockBypass(Ifx_MSC *msc, boolean value)
1717 {
1718 msc->ABC.B.ABB = value;
1719 }
1720
1721
1722 IFX_INLINE void IfxMsc_setCommandTarget(Ifx_MSC *msc, IfxMsc_Target enX)
1723 {
1724 /* Set command target - en0, en1, en2 or en3 */
1725 msc->OCR.B.CSC = enX;
1726 }
1727
1728
1729 IFX_INLINE void IfxMsc_setDataHighTarget(Ifx_MSC *msc, IfxMsc_Target enX)
1730 {
1731 /* Set data high target - en0, en1, en2 or en3 */
1732 msc->OCR.B.CSH = enX;
1733 }
1734
1735
1736 IFX_INLINE void IfxMsc_setDataLowTarget(Ifx_MSC *msc, IfxMsc_Target enX)
1737 {
1738 /* Set data low target - en0, en1, en2 or en3 */
1739 msc->OCR.B.CSL = enX;
1740 }
1741
1742
1743 IFX_INLINE void IfxMsc_setDownStreamData(Ifx_MSC *msc, uint32 data)
1744 {
1745 msc->DD.U = data;
1746 }
1747
1748
1749 IFX_INLINE void IfxMsc_setDownStreamExtension(Ifx_MSC *msc, boolean value)
1750 {
1751 msc->DSCE.B.EXEN = value;
1752 }
1753
1754
1755 IFX_INLINE void IfxMsc_setDownStreamExtensionData(Ifx_MSC *msc, uint32 data)
1756 {
1757 msc->DDE.U = data;
1758 }
1759
1760
1761 IFX_INLINE void IfxMsc_setFastMode(Ifx_MSC *msc, boolean value)
1762 {
1763 uint32 bit_pattern;
1764 uint32 mask = 0x80010000; // Mask to clear the bits(FM & UL1)
1765
1766 if (value == 1)
1767 {
1768 /*set the fast mode bit */
1769 bit_pattern = 0x80010000; // bit pattern(UL1=1 and FM=1) for activating Fast Mode.It's written with DTSE.U access instead of DTSE.B.<individual_bit_fields> as both UL1 & FM bit fields have to be written at once.
1770 }
1771 else
1772 {
1773 /*reset the fast mode bit */
1774 bit_pattern = 0x80000000; // bit pattern(UL1=1 and FM=0) bit pattern for deactivating Fast Mode.It's written with DTSE.U access instead of DTSE.B.<individual_bit_fields> as both UL1 & FM bit fields have to be written at once.
1775 }
1776
1777 msc->DSTE.U = (msc->DSTE.U & ~mask) | bit_pattern;
1778 }
1779
1780
1781 IFX_INLINE void IfxMsc_setFractionalDividerStep(Ifx_MSC *msc, uint16 value)
1782 {
1783 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
1784 IfxScuWdt_clearCpuEndinit(passwd);
1785
1786 msc->FDR.B.DISCLK = 1; /* Disable MSC clock*/
1787
1788 while (msc->FDR.B.DISCLK != 1)
1789 {}
1790
1791 /* Configure the DIVIDER STEP */
1792 msc->FDR.B.STEP = value;
1793 msc->FDR.B.DISCLK = 0; /* Enable MSC clock */
1794
1795 while (msc->FDR.B.DISCLK != 0)
1796 {}
1797
1798 IfxScuWdt_setCpuEndinit(passwd);
1799 }
1800
1801
1802 IFX_INLINE void IfxMsc_setNdividerDownstream(Ifx_MSC *msc, IfxMsc_NDividerDownstream divisionRatio)
1803 {
1804 msc->DSTE.B.NDD = divisionRatio;
1805 }
1806
1807
1808 IFX_INLINE void IfxMsc_setResetCommandExtensionMode(Ifx_MSC *msc, boolean value)
1809 {
1810 uint32 bit_pattern;
1811 uint32 mask = 0x90000000; // Mask to clear the bits(CX & UL1)
1812
1813 if (value == 1)
1814 {
1815 bit_pattern = 0x90000000; // bit pattern(UL1=1 and CX=1) for activating Command Extension Mode.It's written with DTSE.U access instead of DTSE.B.<individual_bit_fields> as both UL1 & CX bit fields have to be written at once( in a single cycle).
1816 }
1817 else
1818 {
1819 bit_pattern = 0x80000000; // bit pattern(UL1=1 and CX=0) bit pattern for deactivating Command Extension Mode.It's written with DTSE.U access instead of DTSE.B.<individual_bit_fields> as both UL1 & CX bit fields have to be written at once.
1820 }
1821
1822 msc->DSTE.U = (msc->DSTE.U & ~mask) | bit_pattern;
1823 }
1824
1825
1826 IFX_INLINE void IfxMsc_setSerialDataInputSelect(Ifx_MSC *msc, IfxMsc_SerialDataInput select)
1827 {
1828 msc->OCR.B.SDISEL = select;
1829 }
1830
1831
1832 IFX_INLINE void IfxMsc_setSleepMode(Ifx_MSC *msc, IfxMsc_SleepMode mode)
1833 {
1834 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
1835 IfxScuWdt_clearCpuEndinit(passwd);
1836 msc->CLC.B.EDIS = mode;
1837 IfxScuWdt_setCpuEndinit(passwd);
1838 }
1839
1840
1841 IFX_INLINE void IfxMsc_setSuspendMode(Ifx_MSC *msc, IfxMsc_SuspendMode mode)
1842 {
1843 Ifx_MSC_OCS ocs;
1844
1845 // remove protection and configure the suspend mode.
1846 ocs.B.SUS_P = 1;
1847 ocs.B.SUS = mode;
1848 msc->OCS.U = ocs.U;
1849 }
1850
1851
1852 IFX_INLINE void IfxMsc_setTransmissionMode(Ifx_MSC *msc, IfxMsc_TransmissionMode mode)
1853 {
1854 msc->DSC.B.TM = mode;
1855 }
1856
1857
1858 IFX_INLINE void IfxMsc_setUpstreamChannelRecieveRate(Ifx_MSC *msc, IfxMsc_UpstreamChannelReceivingRate recieveRate)
1859 {
1860 msc->USR.B.URR = recieveRate;
1861 }
1862
1863
1864 IFX_INLINE void IfxMsc_setUpstreamTimeout(Ifx_MSC *msc, IfxMsc_UpstreamTimeoutValue timeoutVal)
1865 {
1866 msc->USCE.B.USTOVAL = timeoutVal;
1867 }
1868
1869
1870 IFX_INLINE void IfxMsc_setUpstreamTimeoutPrescalar(Ifx_MSC *msc, IfxMsc_UpstreamTimeoutPrescaler prescalar)
1871 {
1872 msc->USCE.B.USTOPRE = prescalar;
1873 }
1874
1875
1876 IFX_INLINE boolean IfxMsc_hasAbraOverflowErrorOccured(Ifx_MSC *msc)
1877 {
1878 return msc->ABC.B.OVF == 1U;
1879 }
1880
1881
1882 IFX_INLINE boolean IfxMsc_hasAbraUnderflowErrorOccured(Ifx_MSC *msc)
1883 {
1884 return msc->ABC.B.UNF == 1U;
1885 }
1886
1887
1888 IFX_INLINE void IfxMsc_setAbraOverflowFlag(Ifx_MSC *msc)
1889 {
1890 /* Set Overflow Flag */
1891 msc->ABC.B.OFM = 1U;
1892 }
1893
1894
1895 IFX_INLINE void IfxMsc_setAbraUnderflowFlag(Ifx_MSC *msc)
1896 {
1897 /* Set Underflow Flag */
1898 msc->ABC.B.UFM = 1U;
1899 }
1900
1901
1902 #endif /* IFXMSC_H */
IfxMsc_ControlFrameExtensionPassivePhaseLength_81
Length of Command frames passive phase is 83.
Definition: IfxMsc.h:275
IfxMsc_ExternalBitInjectionPosition_42
Injected external bit is at Position 42 of the data frame.
Definition: IfxMsc.h:491
IfxMsc_UpstreamChannelReceivingRate_256
Baud rate = f_MSC / 256.
Definition: IfxMsc.h:875
IfxMsc_NDividerDownstream_3
division ratio is 3
Definition: IfxMsc.h:610
IfxMsc_CommandFrameLength_21
SRL[15:0] and SRH[4:0] Shifted.
Definition: IfxMsc.h:175
IfxMsc_ShiftClockPhaseDuration_13
Duration in periods of f_A is 13.
Definition: IfxMsc.h:751
IfxMsc_downstreamFractionalBaudCalculator
IFX_EXTERN uint64 IfxMsc_downstreamFractionalBaudCalculator(Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is fractional for downstream...
Definition: IfxMsc.c:99
IfxMsc_NDividerAbra_5
Division ratio is 5.
Definition: IfxMsc.h:597
IfxMsc_isModuleSuspended
IFX_INLINE boolean IfxMsc_isModuleSuspended(Ifx_MSC *msc)
Returns the module&#39;s suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspende...
Definition: IfxMsc.h:1704
IfxMsc_Source_alternateInputLineInverted
SRx[16] is taken from ALTINL input line in inverted state.
Definition: IfxMsc.h:782
IfxMsc_ControlFrameExtensionPassivePhaseLength_72
Length of Command frames passive phase is 74.
Definition: IfxMsc.h:266
IfxMsc_Sdi_In
SDI pin mapping structure.
Definition: IfxMsc_PinMap.h:64
IfxMsc_CommandFrameLength_10
SRL[9:0] Shifted.
Definition: IfxMsc.h:164
IfxMsc_ControlFrameExtensionPassivePhaseLength_61
Length of Command frames passive phase is 63.
Definition: IfxMsc.h:255
IfxMsc_ControlFrameExtensionPassivePhaseLength_39
Length of Command frames passive phase is 41.
Definition: IfxMsc.h:233
IfxMsc_ExternalBitInjectionPosition_6
Injected external bit is at Position 6 of the data frame.
Definition: IfxMsc.h:455
IfxMsc_ModuleSuspendRequestBit_noSuspend
OCDS is not suspended.
Definition: IfxMsc.h:574
IfxMsc_ExternalBitInjectionPosition_31
Injected external bit is at Position 31 of the data frame.
Definition: IfxMsc.h:480
IfxMsc_ControlFrameExtensionPassivePhaseLength_27
Length of Command frames passive phase is 29.
Definition: IfxMsc.h:221
IfxMsc_ExternalBitInjectionPosition_35
Injected external bit is at Position 35 of the data frame.
Definition: IfxMsc.h:484
IfxMsc_DataFrameLength_12
SRx[11:0] Shifted.
Definition: IfxMsc.h:373
IfxMsc_TimeFrameInterruptNode_SR2
Service request output SR2 selected.
Definition: IfxMsc.h:820
IfxMsc_FastMode_enabled
Enable Fast Mode(DSTE.FM=1).Needs to be cleared with DSTE.UL1=1 in the same cycle.
Definition: IfxMsc.h:529
IfxMsc_UpstreamTimeoutPrescaler_4096
Prescale value 4096 for the upstream time-out limit.
Definition: IfxMsc.h:916
IfxMsc_ExternalBitInjectionPosition_29
Injected external bit is at Position 29 of the data frame.
Definition: IfxMsc.h:478
IfxMsc_UpstreamTimeoutPrescaler_1024
Prescale value 1024 for the upstream time-out limit.
Definition: IfxMsc.h:914
IfxMsc_ControlFrameExtensionPassivePhaseLength_12
Length of Command frames passive phase is 14.
Definition: IfxMsc.h:206
IfxMsc_ExternalBitInjectionPosition_46
Injected external bit is at Position 46 of the data frame.
Definition: IfxMsc.h:495
IfxMsc_ExternalBitInjectionPosition_5
Injected external bit is at Position 5 of the data frame.
Definition: IfxMsc.h:454
IfxMsc_CommandFrameLength_2
SRL[1:0] Shifted.
Definition: IfxMsc.h:156
IfxMsc_clearUpstreamTimeout
IFX_INLINE void IfxMsc_clearUpstreamTimeout(Ifx_MSC *msc)
Clear Upstream timeout.
Definition: IfxMsc.h:1522
IfxMsc_ExternalBitInjectionPosition_54
Injected external bit is at Position 54 of the data frame.
Definition: IfxMsc.h:503
IfxMsc_ExternalBitInjectionPosition_59
Injected external bit is at Position 59 of the data frame.
Definition: IfxMsc.h:508
IfxMsc_DataFrameLength_16
SRx[15:0] Shifted.
Definition: IfxMsc.h:377
IfxMsc_ControlFrameExtensionPassivePhaseLength_67
Length of Command frames passive phase is 69.
Definition: IfxMsc.h:261
IfxMsc_ControlFrameExtensionPassivePhaseLength_22
Length of Command frames passive phase is 24.
Definition: IfxMsc.h:216
IfxMsc_ExternalBitInjectionPosition_2
Injected external bit is at Position 2 of the data frame.
Definition: IfxMsc.h:451
IfxMsc_DataFramePassivePhaseLength_11
Passive phase length is 11 tFCL.
Definition: IfxMsc.h:394
IfxMsc_CommandFrameInterruptNode_SR3
Service request output SR3 selected.
Definition: IfxMsc.h:146
IfxMsc_Index
IfxMsc_Index
List of the available MSC resources.
Definition: IfxMsc_cfg.h:79
IfxMsc_CommandFrameLength_4
SRL[3:0] Shifted.
Definition: IfxMsc.h:158
IfxMsc_ExternalBitInjectionPosition_50
Injected external bit is at Position 50 of the data frame.
Definition: IfxMsc.h:499
IfxMsc_getUpstreamData
IFX_INLINE uint32 IfxMsc_getUpstreamData(Ifx_MSC *msc, uint8 upstreamIdx)
Returns the Upstream Data.
Definition: IfxMsc.h:1605
IfxMsc_DataFramePassivePhaseLength_13
Passive phase length is 13 tFCL.
Definition: IfxMsc.h:396
IfxMsc_ControlFrameExtensionPassivePhaseLength_79
Length of Command frames passive phase is 81.
Definition: IfxMsc.h:273
IfxMsc_ExternalBitInjectionPosition_28
Injected external bit is at Position 28 of the data frame.
Definition: IfxMsc.h:477
IfxMsc_UpstreamTimeoutPrescaler_256
Prescale value 256 for the upstream time-out limit.
Definition: IfxMsc.h:912
IfxMsc_getRecieveDataInterruptFlag
IFX_INLINE boolean IfxMsc_getRecieveDataInterruptFlag(Ifx_MSC *msc)
Returns the Recieve DataInterrupt Flag Status.
Definition: IfxMsc.h:1589
IfxMsc_ExternalSignalInjection
IfxMsc_ExternalSignalInjection
Downstream Control Enhanced Register - Injection Enable of the Pin 0 and 1 Signal Definition in Ifx_M...
Definition: IfxMsc.h:518
IfxMsc_ExternalBitInjectionPosition_4
Injected external bit is at Position 4 of the data frame.
Definition: IfxMsc.h:453
IfxMsc_hasAbraUnderflowErrorOccured
IFX_INLINE boolean IfxMsc_hasAbraUnderflowErrorOccured(Ifx_MSC *msc)
Indicates if Underflow error has occured.
Definition: IfxMsc.h:1882
IfxMsc_ControlFrameExtensionPassivePhaseLength_88
Length of Command frames passive phase is 90.
Definition: IfxMsc.h:282
IfxMsc_ControlFrameExtensionPassivePhaseLength_49
Length of Command frames passive phase is 51.
Definition: IfxMsc.h:243
IfxMsc_ClockSelect_fper
f_PER is the clock source for the ABRA block
Definition: IfxMsc.h:117
IfxMsc_setUpstreamChannelRecieveRate
IFX_INLINE void IfxMsc_setUpstreamChannelRecieveRate(Ifx_MSC *msc, IfxMsc_UpstreamChannelReceivingRate recieveRate)
Sets The Upstream Channel Recieve Rate.
Definition: IfxMsc.h:1858
IfxMsc_TimeFrameInterruptNode_SR0
Service request output SR0 selected.
Definition: IfxMsc.h:818
IfxMsc_CommandFrameLength_15
SRL[14:0] Shifted.
Definition: IfxMsc.h:169
IfxMsc_ControlFrameExtensionPassivePhaseLength_2
Length of Command frames passive phase is 4.
Definition: IfxMsc.h:196
IfxMsc_OverflowInterruptNode_SR0
Service request output SR0 selected.
Definition: IfxMsc.h:640
IfxMsc_ControlFrameExtensionPassivePhaseLength_46
Length of Command frames passive phase is 48.
Definition: IfxMsc.h:240
IfxMsc_downstreamAbraBaudCalculator
IFX_EXTERN uint32 IfxMsc_downstreamAbraBaudCalculator(uint32 baud)
Get the NDD value for the supplied baud rate when when ABRA block is enabled.
Definition: IfxMsc.c:86
IfxMsc_ControlFrameExtensionPassivePhaseLength_9
Length of Command frames passive phase is 11.
Definition: IfxMsc.h:203
IfxMsc_FclLinePolarity_inverted
FCLP signal has inverted FCL signal polarity.
Definition: IfxMsc.h:547
IfxMsc_setDataHighTarget
IFX_INLINE void IfxMsc_setDataHighTarget(Ifx_MSC *msc, IfxMsc_Target enX)
Select the target for data high phase.
Definition: IfxMsc.h:1729
IfxMsc_InterruptServiceRequest
IfxMsc_InterruptServiceRequest
Interrupt Service Request.
Definition: IfxMsc.h:560
IfxMsc_FastMode
IfxMsc_FastMode
Enum for enable and disable Fast Mode.
Definition: IfxMsc.h:526
IfxMsc_UpstreamTimeoutValue_2
Upstream timeout value for the N-Divider.
Definition: IfxMsc.h:928
IfxMsc_ExternalBitInjectionPosition_27
Injected external bit is at Position 27 of the data frame.
Definition: IfxMsc.h:476
IfxMsc_ControlFrameExtensionPassivePhaseLength_80
Length of Command frames passive phase is 82.
Definition: IfxMsc.h:274
IfxMsc_NDividerAbra_6
Division ratio is 6.
Definition: IfxMsc.h:598
IfxMsc_DataFramePassivePhaseLength_5
Passive phase length is 5 tFCL.
Definition: IfxMsc.h:388
IfxMsc_ReceiveDataInterruptNode_SR2
Service request output SR2 selected.
Definition: IfxMsc.h:697
IfxMsc_ControlFrameExtensionPassivePhaseLength_104
Length of Command frames passive phase is 106.
Definition: IfxMsc.h:298
IfxMsc_ShiftClockPhaseDuration_16
Duration in periods of f_A is 16.
Definition: IfxMsc.h:754
IfxMsc_ReceiveDataInterrupt
IfxMsc_ReceiveDataInterrupt
Interrupt Control Register - Receive Data Interrupt Enable Definition in Ifx_MSC.ICR.B.RDIE.
Definition: IfxMsc.h:682
IfxMsc_CommandFrameLength_27
SRL[15:0] and SRH[10:0] Shifted.
Definition: IfxMsc.h:181
IfxMsc_setUpstreamTimeout
IFX_INLINE void IfxMsc_setUpstreamTimeout(Ifx_MSC *msc, IfxMsc_UpstreamTimeoutValue timeoutVal)
Sets The Upstream Timeout.
Definition: IfxMsc.h:1864
IfxMsc_SdiLinePolarity_likeSi
SDI and SI signal polarities are identical.
Definition: IfxMsc.h:706
IfxMsc_CommandFrameLength_11
SRL[10:0] Shifted.
Definition: IfxMsc.h:165
IfxMsc_Source_alternateInputLine
SRx[16] is taken from ALTINL input line.
Definition: IfxMsc.h:781
IfxMsc_PassiveTimeFrameCount_4
4 Passive time frames inserted
Definition: IfxMsc.h:665
IfxMsc_TimeFrameInterrupt_disabled
Interrupt generation disabled.
Definition: IfxMsc.h:809
IfxMsc_ExternalBitInjectionPosition_18
Injected external bit is at Position 18 of the data frame.
Definition: IfxMsc.h:467
IfxMsc_ExternalBitInjectionPosition_7
Injected external bit is at Position 7 of the data frame.
Definition: IfxMsc.h:456
IfxMsc_PassiveTimeFrameCount_7
7 Passive time frames inserted
Definition: IfxMsc.h:668
IfxMsc_DataFramePassivePhaseLength_2
Passive phase length is 2 tFCL.
Definition: IfxMsc.h:385
IfxMsc_ExternalBitInjectionPosition_41
Injected external bit is at Position 41 of the data frame.
Definition: IfxMsc.h:490
IfxMsc_setNdividerDownstream
IFX_INLINE void IfxMsc_setNdividerDownstream(Ifx_MSC *msc, IfxMsc_NDividerDownstream divisionRatio)
Set the required N divider downstream value.
Definition: IfxMsc.h:1802
IfxMsc_NDividerDownstream_6
division ratio is 6
Definition: IfxMsc.h:613
IfxMsc_DataFramePassivePhaseLength_25
Passive phase length is 25 tFCL.
Definition: IfxMsc.h:408
IfxMsc_UpstreamTimeoutPrescaler
IfxMsc_UpstreamTimeoutPrescaler
Upstream Control Enhanced Register 1 - Upstream Timeout Prescaler Definition in Ifx_MSC.USCE.B.USTOPRE.
Definition: IfxMsc.h:902
IfxMsc_CommandFrameLength_1
SRL[0] Shifted.
Definition: IfxMsc.h:155
IfxMsc_setDownStreamExtensionData
IFX_INLINE void IfxMsc_setDownStreamExtensionData(Ifx_MSC *msc, uint32 data)
Sets the Down stream Extension data.
Definition: IfxMsc.h:1755
IfxMsc_ControlFrameExtensionPassivePhaseLength_73
Length of Command frames passive phase is 75.
Definition: IfxMsc.h:267
IfxMsc_NDividerDownstream_1
division ratio is 1
Definition: IfxMsc.h:608
IfxMsc_SuspendMode_hard
Hard Suspend.
Definition: IfxMsc.h:790
IfxMsc_ControlFrameExtensionPassivePhaseLength_127
Length of Command frames passive phase is 129.
Definition: IfxMsc.h:321
IfxMsc_ControlFrameExtensionPassivePhaseLength_57
Length of Command frames passive phase is 59.
Definition: IfxMsc.h:251
IfxMsc_UpstreamTimeoutValue_1
Upstream timeout value for the N-Divider.
Definition: IfxMsc.h:927
IfxMsc_NDividerDownstream_4
division ratio is 4
Definition: IfxMsc.h:611
IfxMsc_Sdi_In::module
Ifx_MSC * module
Base address.
Definition: IfxMsc_PinMap.h:66
IfxMsc_DataFramePassivePhaseLength_17
Passive phase length is 17 tFCL.
Definition: IfxMsc.h:400
IfxMsc_ControlFrameExtensionPassivePhaseLength_63
Length of Command frames passive phase is 65.
Definition: IfxMsc.h:257
IfxMsc_DataFramePassivePhaseLength_6
Passive phase length is 6 tFCL.
Definition: IfxMsc.h:389
IfxMsc_UpstreamTimeoutValue_12
Upstream timeout value for the N-Divider.
Definition: IfxMsc.h:938
IfxMsc_DataFramePassivePhaseLength_22
Passive phase length is 22 tFCL.
Definition: IfxMsc.h:405
IfxMsc_ExternalSignalInjection_disabled
Disables the external signal injection in a data frame.
Definition: IfxMsc.h:520
IfxMsc_ExternalBitInjectionPosition_20
Injected external bit is at Position 20 of the data frame.
Definition: IfxMsc.h:469
IfxMsc_CommandFrameLength_3
SRL[2:0] Shifted.
Definition: IfxMsc.h:157
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:140
IfxMsc_ControlFrameExtensionPassivePhaseLength_11
Length of Command frames passive phase is 13.
Definition: IfxMsc.h:205
IfxMsc_DataFramePassivePhaseLength_14
Passive phase length is 14 tFCL.
Definition: IfxMsc.h:397
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxMsc_ControlFrameExtensionPassivePhaseLength_25
Length of Command frames passive phase is 27.
Definition: IfxMsc.h:219
IfxMsc_ControlFrameExtensionPassivePhaseLength_125
Length of Command frames passive phase is 127.
Definition: IfxMsc.h:319
IfxMsc_ActivePhaseSelection
IfxMsc_ActivePhaseSelection
Enable SRL/SRH Active Phase Selection Bit Definition in Ifx_MSC.DSC.B.ENSELH and Ifx_MSC.DSC.B.ENSELL.
Definition: IfxMsc.h:87
IfxMsc_ShiftClockPhaseDuration_10
Duration in periods of f_A is 10.
Definition: IfxMsc.h:748
IfxMsc_setCommandTarget
IFX_INLINE void IfxMsc_setCommandTarget(Ifx_MSC *msc, IfxMsc_Target enX)
Select the target for command phase.
Definition: IfxMsc.h:1722
IfxMsc_DataFrameLength_14
SRx[13:0] Shifted.
Definition: IfxMsc.h:375
IfxMsc_SuspendMode_soft
Soft Suspend.
Definition: IfxMsc.h:791
IfxMsc_ExternalBitInjectionPosition_12
Injected external bit is at Position 12 of the data frame.
Definition: IfxMsc.h:461
IfxMsc_NDividerDownstream
IfxMsc_NDividerDownstream
Downstream Timing Extension Register - N Divider Downstream Definition in Ifx_MSC.DSTE.B.NDD.
Definition: IfxMsc.h:606
IfxMsc_ControlFrameExtensionPassivePhaseLength_4
Length of Command frames passive phase is 6.
Definition: IfxMsc.h:198
IfxMsc_UpstreamChannelFrameType_12bit
12-bit Upstream frame selected
Definition: IfxMsc.h:859
float32
float float32
Definition: Platform_Types.h:170
IfxMsc_setDownStreamData
IFX_INLINE void IfxMsc_setDownStreamData(Ifx_MSC *msc, uint32 data)
Sets the Down stream data.
Definition: IfxMsc.h:1743
IfxMsc_ControlFrameExtensionPassivePhaseLength_98
Length of Command frames passive phase is 100.
Definition: IfxMsc.h:292
IfxMsc_ControlFrameExtensionPassivePhaseLength_0
Length of Command frames passive phase is 2.
Definition: IfxMsc.h:194
IfxMsc_ControlFrameExtensionPassivePhaseLength_100
Length of Command frames passive phase is 102.
Definition: IfxMsc.h:294
IfxMsc_ControlFrameExtensionPassivePhaseLength_103
Length of Command frames passive phase is 105.
Definition: IfxMsc.h:297
IfxMsc_OverflowInterruptNode_SR3
Service request output SR3 selected.
Definition: IfxMsc.h:643
IfxMsc_CommandDataCommandRepetitionMode_enabled
Enables the automatic insertion of data.
Definition: IfxMsc.h:126
IfxMsc_UpstreamTimeoutPrescaler_8192
Prescale value 8192 for the upstream time-out limit.
Definition: IfxMsc.h:917
IfxMsc_ShiftClockPhaseDuration_8
Duration in periods of f_A is 8.
Definition: IfxMsc.h:746
IfxMsc_disableModule
IFX_EXTERN void IfxMsc_disableModule(Ifx_MSC *msc)
Disable MSC kernel.
Definition: IfxMsc.c:76
IfxMsc_getDataFrameInterruptFlag
IFX_EXTERN boolean IfxMsc_getDataFrameInterruptFlag(Ifx_MSC *msc)
get the status of the data frame interrupt flag
Definition: IfxMsc.c:157
IfxMsc_UpstreamTimeoutPrescaler_4
Prescale value 4 for the upstream time-out limit.
Definition: IfxMsc.h:906
IfxMsc_ControlFrameExtensionPassivePhaseLength_93
Length of Command frames passive phase is 95.
Definition: IfxMsc.h:287
IfxMsc_DataFramePassivePhaseLength_26
Passive phase length is 26 tFCL.
Definition: IfxMsc.h:409
IfxMsc_NDividerDownstream_5
division ratio is 5
Definition: IfxMsc.h:612
IfxMsc_ExternalBitInjectionPosition_10
Injected external bit is at Position 10 of the data frame.
Definition: IfxMsc.h:459
IfxMsc_DataFramePassivePhaseLength_3
Passive phase length is 3 tFCL.
Definition: IfxMsc.h:386
IfxMsc_ClockSelect_noClock
no clock source for the ABRA block
Definition: IfxMsc.h:116
IfxMsc_NDividerDownstream_2
division ratio is 2
Definition: IfxMsc.h:609
IfxMsc_NDividerAbra_2
Division ratio is 2.
Definition: IfxMsc.h:594
IfxMsc_ControlFrameExtensionPassivePhaseLength_8
Length of Command frames passive phase is 10.
Definition: IfxMsc.h:202
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:322
IfxMsc_Parity_odd
Odd Parity.
Definition: IfxMsc.h:653
IfxMsc_DataFrameLength_8
SRx[7:0] Shifted.
Definition: IfxMsc.h:369
IfxMsc_UpstreamChannelReceivingRate_8
Baud rate = f_MSC / 8.
Definition: IfxMsc.h:870
IfxMsc_ExternalBitInjectionPosition_19
Injected external bit is at Position 19 of the data frame.
Definition: IfxMsc.h:468
IfxMsc_UpstreamTimeoutInterruptNode_SR1
Service request output SR1 selected.
Definition: IfxMsc.h:893
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxMsc_setDataLowTarget
IFX_INLINE void IfxMsc_setDataLowTarget(Ifx_MSC *msc, IfxMsc_Target enX)
Select the target for data low phase.
Definition: IfxMsc.h:1736
IfxMsc_UpstreamTimeoutInterrupt_enabled
Upstream Timeout Interrupt Enabled.
Definition: IfxMsc.h:884
IfxMsc_ExternalSignalInjection_enabled
Enables the external signal injection in a data frame.
Definition: IfxMsc.h:521
IfxMsc_ExternalBitInjectionPosition_15
Injected external bit is at Position 15 of the data frame.
Definition: IfxMsc.h:464
IfxMsc_ControlFrameExtensionPassivePhaseLength_122
Length of Command frames passive phase is 124.
Definition: IfxMsc.h:316
IfxMsc_ControlFrameExtensionPassivePhaseLength_23
Length of Command frames passive phase is 25.
Definition: IfxMsc.h:217
IfxMsc_CommandDataCommandRepetitionMode_disabled
Disables the automatic insertion of data.
Definition: IfxMsc.h:125
IfxMsc_TimeFrameInterrupt
IfxMsc_TimeFrameInterrupt
Interrupt Control Register - Time Frame Interrupt Enable Definition in Ifx_MSC.ICR.B.TFIE.
Definition: IfxMsc.h:807
IfxMsc_UpstreamTimeoutInterrupt
IfxMsc_UpstreamTimeoutInterrupt
Upstream Control Enhanced Register 1 - Upstream Timeout Interrupt Enable Definition in Ifx_MSC...
Definition: IfxMsc.h:881
IfxMsc_DataFrameInterrupt
IfxMsc_DataFrameInterrupt
Interrupt Control Register - Data Frame Interrupt Enable Definition in Ifx_MSC.ICR.B.EDIE.
Definition: IfxMsc.h:338
IfxMsc_UpstreamTimeoutPrescaler_512
Prescale value 512 for the upstream time-out limit.
Definition: IfxMsc.h:913
IfxMsc_ShiftClockPhaseDuration_7
Duration in periods of f_A is 7.
Definition: IfxMsc.h:745
IfxMsc_ActivePhaseSelection_none
No selection bit inserted.
Definition: IfxMsc.h:89
IfxMsc_OverflowInterruptNode_SR4
Service request output SR4 selected.
Definition: IfxMsc.h:644
IfxMsc_DataFramePassivePhaseLength_28
Passive phase length is 28 tFCL.
Definition: IfxMsc.h:411
IfxMsc_ControlFrameExtensionPassivePhaseLength_13
Length of Command frames passive phase is 15.
Definition: IfxMsc.h:207
IfxMsc_ControlFrameExtensionPassivePhaseLength_74
Length of Command frames passive phase is 76.
Definition: IfxMsc.h:268
IfxMsc_FclLinePolarity_nonInverted
FCLP and FCL signal polarity is identical.
Definition: IfxMsc.h:546
IfxMsc_ControlFrameExtensionPassivePhaseLength_101
Length of Command frames passive phase is 103.
Definition: IfxMsc.h:295
IfxMsc_ExternalBitInjectionPosition_25
Injected external bit is at Position 25 of the data frame.
Definition: IfxMsc.h:474
IfxMsc_initSopPin
IFX_INLINE void IfxMsc_initSopPin(const IfxMsc_Sop_Out *sop, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a SOP output.
Definition: IfxMsc.h:1694
IfxCpu_Intrinsics.h
IfxMsc_ControlFrameExtensionPassivePhaseLength_65
Length of Command frames passive phase is 67.
Definition: IfxMsc.h:259
IfxMsc_Extension
IfxMsc_Extension
Downstream Control Enhanced Register - Extension Enable Definition in Ifx_MSC.DSCE.B.NDBLE.
Definition: IfxMsc.h:438
IfxMsc_DataFrameInterruptNode_SR0
Service request output SR0 selected.
Definition: IfxMsc.h:350
IfxMsc_AsynchronousBlock
IfxMsc_AsynchronousBlock
Asynchronous Block Configuration Register - Asynchronous Block Bypass Definition in Ifx_MSC...
Definition: IfxMsc.h:96
uint64
unsigned long long uint64
Definition: Platform_Types.h:121
IfxMsc_clearReset
IFX_EXTERN void IfxMsc_clearReset(Ifx_MSC *msc)
Clear reset bit of MSC kernel.
Definition: IfxMsc.c:61
IfxMsc_AsynchronousBlock_bypassed
Asynchronous block and the n-divider of the MSC downstream path are bypassed and are disabled...
Definition: IfxMsc.h:98
IfxMsc_ControlFrameExtensionPassivePhaseLength_60
Length of Command frames passive phase is 62.
Definition: IfxMsc.h:254
IfxMsc_hasAbraOverflowErrorOccured
IFX_INLINE boolean IfxMsc_hasAbraOverflowErrorOccured(Ifx_MSC *msc)
Indicates if Overflow error has occured.
Definition: IfxMsc.h:1876
IfxMsc_ControlFrameExtensionPassivePhaseLength_14
Length of Command frames passive phase is 16.
Definition: IfxMsc.h:208
IfxMsc_ExternalBitInjectionPosition_37
Injected external bit is at Position 37 of the data frame.
Definition: IfxMsc.h:486
IfxMsc_ControlFrameExtensionPassivePhaseLength_16
Length of Command frames passive phase is 18.
Definition: IfxMsc.h:210
IfxMsc_UpstreamTimeoutValue_16
Upstream timeout value for the N-Divider.
Definition: IfxMsc.h:942
IfxMsc_setSuspendMode
IFX_INLINE void IfxMsc_setSuspendMode(Ifx_MSC *msc, IfxMsc_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and...
Definition: IfxMsc.h:1841
IfxMsc_setSerialDataInputSelect
IFX_INLINE void IfxMsc_setSerialDataInputSelect(Ifx_MSC *msc, IfxMsc_SerialDataInput select)
Sets The Serial Data Input Select.
Definition: IfxMsc.h:1826
IfxMsc_Target_en3
Target EN3.
Definition: IfxMsc.h:801
IfxMsc_PassiveTimeFrameCount_0
No Passive time frames inserted.
Definition: IfxMsc.h:661
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxMsc_ControlFrameExtensionPassivePhaseLength_123
Length of Command frames passive phase is 125.
Definition: IfxMsc.h:317
IfxMsc_getAsyncClockBypass
IFX_INLINE boolean IfxMsc_getAsyncClockBypass(Ifx_MSC *msc)
Returns the value of Asynchronous clock Bypass bit.
Definition: IfxMsc.h:1553
IfxMsc_setUpstreamTimeoutPrescalar
IFX_INLINE void IfxMsc_setUpstreamTimeoutPrescalar(Ifx_MSC *msc, IfxMsc_UpstreamTimeoutPrescaler prescalar)
Sets The Upstream Timeout Prescalar.
Definition: IfxMsc.h:1870
IfxMsc_PassiveTimeFrameCount_11
11 Passive time frames inserted
Definition: IfxMsc.h:672
IfxMsc_DataFramePassivePhaseLength_27
Passive phase length is 27 tFCL.
Definition: IfxMsc.h:410
IfxMsc_initSdiPin
IFX_INLINE void IfxMsc_initSdiPin(const IfxMsc_Sdi_In *sdi, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a SDI input.
Definition: IfxMsc.h:1673
IfxMsc_TransmissionMode
IfxMsc_TransmissionMode
Downstream Channel Transmission Mode Definition in Ifx_MSC.DSC.B.TM.
Definition: IfxMsc.h:827
IfxMsc_ControlFrameExtensionPassivePhaseLength_118
Length of Command frames passive phase is 120.
Definition: IfxMsc.h:312
IfxMsc_DataFrameLength_13
SRx[12:0] Shifted.
Definition: IfxMsc.h:374
IfxMsc_NDividerDownstream_12
division ratio is 12
Definition: IfxMsc.h:619
IfxMsc_DataFrameLength_6
SRx[5:0] Shifted.
Definition: IfxMsc.h:367
IfxMsc_UpstreamChannelReceivingRate
IfxMsc_UpstreamChannelReceivingRate
Upstream Receiving Rate Definition in Ifx_MSC.USR.B.URR.
Definition: IfxMsc.h:866
IfxMsc_ControlFrameExtensionPassivePhaseLength_18
Length of Command frames passive phase is 20.
Definition: IfxMsc.h:212
IfxMsc_ControlFrameExtensionPassivePhaseLength_53
Length of Command frames passive phase is 55.
Definition: IfxMsc.h:247
IfxMsc_getSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxMsc_getSrcPointer(Ifx_MSC *msc, IfxMsc_InterruptServiceRequest intRequest)
Returns the Src pointer for the selected MSC interrupt node.
Definition: IfxMsc.h:1595
IfxPort_setPinModeInput
IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode.
Definition: IfxPort.h:669
IfxMsc_ChipSelectActiveState_low
EN[3:0] and ENL,ENH,ENC polarities are inverted.
Definition: IfxMsc.h:108
IfxMsc_ControlFrameExtensionPassivePhaseLength_28
Length of Command frames passive phase is 30.
Definition: IfxMsc.h:222
IfxMsc_ExternalBitInjectionPosition_45
Injected external bit is at Position 45 of the data frame.
Definition: IfxMsc.h:494
IfxMsc_OverflowInterruptNode_SR1
Service request output SR1 selected.
Definition: IfxMsc.h:641
IfxMsc_clearAbraOverflowFlag
IFX_INLINE void IfxMsc_clearAbraOverflowFlag(Ifx_MSC *msc)
Clear ABRA overflow flag.
Definition: IfxMsc.h:1502
IfxMsc_SerialDataInput_6
SDI6 is selected for the SDI of the upstream channel.
Definition: IfxMsc.h:721
IfxMsc_Target_en2
Target EN2.
Definition: IfxMsc.h:800
IfxMsc_UpstreamChannelFrameType_16bit
16-bit Upstream frame selected
Definition: IfxMsc.h:860
IfxMsc_UpstreamTimeoutValue_14
Upstream timeout value for the N-Divider.
Definition: IfxMsc.h:940
IfxMsc_CommandFrameLength_24
SRL[15:0] and SRH[7:0] Shifted.
Definition: IfxMsc.h:178
IfxMsc_AsynchronousBlock_noBypassed
Asynchronous block and the n-divider of the MSC downstream path are active.
Definition: IfxMsc.h:99
IfxMsc_UpstreamTimeoutValue_11
Upstream timeout value for the N-Divider.
Definition: IfxMsc.h:937
IfxMsc_EmergencyStop
IfxMsc_EmergencyStop
Emergency Stop Register - Emergency stop feature Enable or Disable - SRL and SRH Definition in Ifx_MS...
Definition: IfxMsc.h:429
IfxMsc_ControlFrameExtensionPassivePhaseLength_55
Length of Command frames passive phase is 57.
Definition: IfxMsc.h:249
IfxMsc_InterruptServiceRequest_1
Interrupt Service Request number1.
Definition: IfxMsc.h:563
IfxMsc_ExternalBitInjectionPosition_34
Injected external bit is at Position 34 of the data frame.
Definition: IfxMsc.h:483
IfxMsc_ExternalBitInjectionPosition_44
Injected external bit is at Position 44 of the data frame.
Definition: IfxMsc.h:493
IfxMsc_CommandFrameLength_29
SRL[15:0] and SRH[12:0] Shifted.
Definition: IfxMsc.h:183
IfxMsc_ControlFrameExtensionPassivePhaseLength_119
Length of Command frames passive phase is 121.
Definition: IfxMsc.h:313
IfxMsc_initInjPin
IFX_INLINE void IfxMsc_initInjPin(const IfxMsc_Inj_In *inj, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a INJ input.
Definition: IfxMsc.h:1663
IfxMsc_ControlFrameExtensionPassivePhaseLength_111
Length of Command frames passive phase is 113.
Definition: IfxMsc.h:305
IfxMsc_DataFramePassivePhaseLength_30
Passive phase length is 30 tFCL.
Definition: IfxMsc.h:413
IfxScuWdt.h
SCU basic functionality.
IfxMsc_ControlFrameExtensionPassivePhaseLength_30
Length of Command frames passive phase is 32.
Definition: IfxMsc.h:224
IfxMsc_NDividerAbra_3
Division ratio is 3.
Definition: IfxMsc.h:595
IfxMsc_initFclnPin
IFX_INLINE void IfxMsc_initFclnPin(const IfxMsc_Fcln_Out *fcln, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a FCLN output.
Definition: IfxMsc.h:1643
IfxMsc_setSleepMode
IFX_INLINE void IfxMsc_setSleepMode(Ifx_MSC *msc, IfxMsc_SleepMode mode)
Sets the sensitivity of the module to sleep signal.
Definition: IfxMsc.h:1832
IfxMsc_ServiceRequestDelay_noDelay
No Delay.
Definition: IfxMsc.h:730
IfxMsc_InterruptServiceRequest_0
Interrupt Service Request number0.
Definition: IfxMsc.h:562
IfxMsc_EmergencyStop_disabled
Emergency stop feature for SRx bit is Disabled.
Definition: IfxMsc.h:431
IfxMsc_ControlFrameExtensionPassivePhaseLength_71
Length of Command frames passive phase is 73.
Definition: IfxMsc.h:265
IfxMsc_PassiveTimeFrameCount_10
10 Passive time frames inserted
Definition: IfxMsc.h:671
IfxMsc_ExternalBitInjectionPosition_62
Injected external bit is at Position 62 of the data frame.
Definition: IfxMsc.h:511
IfxMsc_ExternalBitInjectionPosition_30
Injected external bit is at Position 30 of the data frame.
Definition: IfxMsc.h:479
IfxMsc_ControlFrameExtensionPassivePhaseLength_41
Length of Command frames passive phase is 43.
Definition: IfxMsc.h:235
IfxMsc_ControlFrameExtensionPassivePhaseLength_48
Length of Command frames passive phase is 50.
Definition: IfxMsc.h:242
IfxMsc_clearRecieveDataInterruptFlag
IFX_INLINE void IfxMsc_clearRecieveDataInterruptFlag(Ifx_MSC *msc)
Clears The Recieve Data Interrupt Flag.
Definition: IfxMsc.h:1516
IfxMsc_UnderflowInterruptNode_SR3
Service request output SR3 selected.
Definition: IfxMsc.h:850
IfxMsc_ModuleSuspendRequestBit_hardSuspend
OCDS is Hard suspended. Clock is switched off immediately.
Definition: IfxMsc.h:575
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxMsc_ControlFrameExtensionPassivePhaseLength
IfxMsc_ControlFrameExtensionPassivePhaseLength
Downstream Timing Extension Register - Passive Phase Length at Control Frames Extension Definition in...
Definition: IfxMsc.h:192
IfxMsc_ReceiveDataInterrupt_onDataReceiveInUd3
An interrupt is generated as with RDIE = 01B but only if the received data is not equal to 00H...
Definition: IfxMsc.h:687
IfxMsc_ReceiveDataInterrupt_onDataReceive
An interrupt is generated when data is received and written into the upstream data registers...
Definition: IfxMsc.h:685
IfxMsc_NDividerDownstream_13
division ratio is 13
Definition: IfxMsc.h:620
IfxMsc_ShiftClockPhaseDuration_9
Duration in periods of f_A is 9.
Definition: IfxMsc.h:747
IfxMsc_ControlFrameExtensionPassivePhaseLength_90
Length of Command frames passive phase is 92.
Definition: IfxMsc.h:284
IfxMsc_SerialDataInput_1
SDI1 is selected for the SDI of the upstream channel.
Definition: IfxMsc.h:716
IfxMsc_ControlFrameExtensionPassivePhaseLength_26
Length of Command frames passive phase is 28.
Definition: IfxMsc.h:220
IfxMsc_OverflowInterrupt_enabled
Enables the path of the overflow interrupt towards the interrupt node.
Definition: IfxMsc.h:632
IfxMsc_setResetCommandExtensionMode
IFX_INLINE void IfxMsc_setResetCommandExtensionMode(Ifx_MSC *msc, boolean value)
To enable or disable CX mode.
Definition: IfxMsc.h:1808
IfxMsc_ControlFrameExtensionPassivePhaseLength_7
Length of Command frames passive phase is 9.
Definition: IfxMsc.h:201
IfxMsc_ControlFrameExtensionPassivePhaseLength_43
Length of Command frames passive phase is 45.
Definition: IfxMsc.h:237
IfxMsc_ControlFrameExtensionPassivePhaseLength_124
Length of Command frames passive phase is 126.
Definition: IfxMsc.h:318
IfxMsc_PassiveTimeFrameCount_15
15 Passive time frames inserted
Definition: IfxMsc.h:676
IfxMsc_UpstreamTimeoutValue_15
Upstream timeout value for the N-Divider.
Definition: IfxMsc.h:941
IfxMsc_CommandDataCommandRepetitionMode
IfxMsc_CommandDataCommandRepetitionMode
Downstream Control Enhanced Register - Command-Data-Command in Data Repetition Mode Definition in Ifx...
Definition: IfxMsc.h:123
IfxMsc_MsbBitDataExtension_present
Additional MSB bit is present in the extension of the NDBL/NDBH bit field.
Definition: IfxMsc.h:585
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxMsc_setFastMode
IFX_INLINE void IfxMsc_setFastMode(Ifx_MSC *msc, boolean value)
Set or reset the Fast Mode bit. Select the correct NDD value when using Fast mode.
Definition: IfxMsc.h:1761
IfxMsc_CommandFrameLength_0
No bit shifted.
Definition: IfxMsc.h:154
IfxMsc_getAddress
IFX_EXTERN Ifx_MSC * IfxMsc_getAddress(IfxMsc_Index msc)
Definition: IfxMsc.c:140
IfxMsc_En_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxMsc_PinMap.h:77
IfxMsc_DataFrameInterruptNode_SR1
Service request output SR1 selected.
Definition: IfxMsc.h:351
IfxMsc_DataFramePassivePhaseLength_4
Passive phase length is 4 tFCL.
Definition: IfxMsc.h:387
IfxMsc_UpstreamTimeoutValue_13
Upstream timeout value for the N-Divider.
Definition: IfxMsc.h:939
IfxMsc_ControlFrameExtensionPassivePhaseLength_6
Length of Command frames passive phase is 8.
Definition: IfxMsc.h:200
IfxMsc_setAbraUnderflowFlag
IFX_INLINE void IfxMsc_setAbraUnderflowFlag(Ifx_MSC *msc)
Sets the Underflow Flag and will trigger the underflow interrupt, if enabled.
Definition: IfxMsc.h:1895
IfxMsc_getDataHighTarget
IFX_INLINE IfxMsc_Target IfxMsc_getDataHighTarget(Ifx_MSC *msc)
Get the selected target during high phase.
Definition: IfxMsc.h:1569
IfxMsc_UpstreamTimeoutInterruptNode_SR3
Service request output SR3 selected.
Definition: IfxMsc.h:895
IfxMsc_setAsyncClockBypass
IFX_INLINE void IfxMsc_setAsyncClockBypass(Ifx_MSC *msc, boolean value)
Set or reset the Asynchronous clock bypass bit.
Definition: IfxMsc.h:1716
IfxMsc_ControlFrameExtensionPassivePhaseLength_10
Length of Command frames passive phase is 12.
Definition: IfxMsc.h:204
IfxMsc_ControlFrameExtensionPassivePhaseLength_35
Length of Command frames passive phase is 37.
Definition: IfxMsc.h:229
IfxMsc_setFractionalDividerStep
IFX_INLINE void IfxMsc_setFractionalDividerStep(Ifx_MSC *msc, uint16 value)
Sets The Fractional Divider Step.
Definition: IfxMsc.h:1781
IfxMsc_DataFrameExtensionPassivePhaseLength_3
3 Additional MSB bits extension of the PPD bit field
Definition: IfxMsc.h:332
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxMsc_ControlFrameExtensionPassivePhaseLength_94
Length of Command frames passive phase is 96.
Definition: IfxMsc.h:288
IfxMsc_ControlFrameExtensionPassivePhaseLength_47
Length of Command frames passive phase is 49.
Definition: IfxMsc.h:241
IfxMsc_ChipSelectActiveState_high
EN[3:0] and ENL,ENH,ENC polarities are identical.
Definition: IfxMsc.h:107
IfxMsc_ReceiveDataInterruptNode_SR1
Service request output SR1 selected.
Definition: IfxMsc.h:696
IfxMsc_getDownstreamAbraDisabledBaudrate
IFX_EXTERN float32 IfxMsc_getDownstreamAbraDisabledBaudrate(Ifx_MSC *msc)
Returns the downstream baudrate(with ABRA disabled)
Definition: IfxMsc.c:275
IfxMsc_ExternalBitInjectionPosition_43
Injected external bit is at Position 43 of the data frame.
Definition: IfxMsc.h:492
IfxMsc_ExternalBitInjectionPosition_24
Injected external bit is at Position 24 of the data frame.
Definition: IfxMsc.h:473
IfxMsc_MsbBitDataExtension
IfxMsc_MsbBitDataExtension
Downstream Control Enhanced Register - Number of SRL/SRH Bits Shifted at Data Frames Extension (NDBL/...
Definition: IfxMsc.h:582
IfxMsc_OverflowInterruptNode
IfxMsc_OverflowInterruptNode
Asynchronous Block Configuration Register - Overflow Interrupt Node Pointer Definition in Ifx_MSC...
Definition: IfxMsc.h:638
IfxMsc_getActiveDataFrameStatus
IFX_EXTERN boolean IfxMsc_getActiveDataFrameStatus(Ifx_MSC *msc)
get the status of the active data frame
Definition: IfxMsc.c:134
IfxMsc_ExternalBitInjectionPosition_63
Injected external bit is at Position 63 of the data frame.
Definition: IfxMsc.h:512
IfxMsc_DataFramePassivePhaseLength_15
Passive phase length is 15 tFCL.
Definition: IfxMsc.h:398
IfxMsc_ExternalBitInjectionPosition_57
Injected external bit is at Position 57 of the data frame.
Definition: IfxMsc.h:506
IfxMsc_CommandFrameLength_14
SRL[13:0] Shifted.
Definition: IfxMsc.h:168
IfxMsc_ControlFrameExtensionPassivePhaseLength_120
Length of Command frames passive phase is 122.
Definition: IfxMsc.h:314
IfxMsc_ExternalBitInjectionPosition_22
Injected external bit is at Position 22 of the data frame.
Definition: IfxMsc.h:471
IfxMsc_HardwareClock
IfxMsc_HardwareClock
Enable hardware clock control.
Definition: IfxMsc.h:552
IfxMsc_ControlFrameExtensionPassivePhaseLength_126
Length of Command frames passive phase is 128.
Definition: IfxMsc.h:320
IfxMsc_DataFrameInterrupt_disabled
Interrupt generation Disable.
Definition: IfxMsc.h:340
IfxMsc_ControlFrameExtensionPassivePhaseLength_114
Length of Command frames passive phase is 116.
Definition: IfxMsc.h:308
IfxMsc_DividerMode
IfxMsc_DividerMode
Divider mode.
Definition: IfxMsc.h:420
IfxMsc_NDividerDownstream_14
division ratio is 14
Definition: IfxMsc.h:621
IfxMsc_MsbBitDataExtension_notPresent
Additional MSB bit is not present in the extension of the NDBL/NDBH bit field.
Definition: IfxMsc.h:584
IfxMsc_PassiveTimeFrameCount_12
12 Passive time frames inserted
Definition: IfxMsc.h:673
IfxMsc_PassiveTimeFrameCount_5
5 Passive time frames inserted
Definition: IfxMsc.h:666
IfxMsc_DataFrameExtensionPassivePhaseLength_0
0 Additional MSB bits extension of the PPD bit field
Definition: IfxMsc.h:329
IfxMsc_UpstreamTimeoutValue_9
Upstream timeout value for the N-Divider.
Definition: IfxMsc.h:935
IfxMsc_ExternalBitInjectionPosition_33
Injected external bit is at Position 33 of the data frame.
Definition: IfxMsc.h:482
IfxMsc_ControlFrameExtensionPassivePhaseLength_1
Length of Command frames passive phase is 3.
Definition: IfxMsc.h:195
IfxMsc_ExternalBitInjectionPosition_14
Injected external bit is at Position 14 of the data frame.
Definition: IfxMsc.h:463
IfxMsc_UpstreamTimeoutPrescaler_1
Prescale value 1 for the upstream time-out limit.
Definition: IfxMsc.h:904
IfxMsc_ControlFrameExtensionPassivePhaseLength_97
Length of Command frames passive phase is 99.
Definition: IfxMsc.h:291
IfxMsc_PassiveTimeFrameCount_1
1 Passive time frames inserted
Definition: IfxMsc.h:662
IfxMsc_SoLinePolarity
IfxMsc_SoLinePolarity
Output Control Register - SOP Line Polarity Definition in Ifx_MSC.OCR.B.SLP.
Definition: IfxMsc.h:769
IfxMsc_ControlFrameExtensionPassivePhaseLength_58
Length of Command frames passive phase is 60.
Definition: IfxMsc.h:252
IfxMsc_UpstreamTimeoutPrescaler_128
Prescale value 128 for the upstream time-out limit.
Definition: IfxMsc.h:911
IfxMsc_DataFramePassivePhaseLength_21
Passive phase length is 21 tFCL.
Definition: IfxMsc.h:404
IfxMsc_UpstreamTimeoutValue_6
Upstream timeout value for the N-Divider.
Definition: IfxMsc.h:932
IfxMsc_CommandFrameLength_7
SRL[6:0] Shifted.
Definition: IfxMsc.h:161
IfxMsc_PassiveTimeFrameCount_8
8 Passive time frames inserted
Definition: IfxMsc.h:669
IfxMsc_NDividerAbra_7
Division ratio is 7.
Definition: IfxMsc.h:599
IfxMsc_ControlFrameExtensionPassivePhaseLength_24
Length of Command frames passive phase is 26.
Definition: IfxMsc.h:218
IfxMsc_DataFrameLength_2
SRx[1:0] Shifted.
Definition: IfxMsc.h:363
IfxMsc_Son_Out
SON pin mapping structure.
Definition: IfxMsc_PinMap.h:105
IfxMsc_UpstreamTimeoutValue_10
Upstream timeout value for the N-Divider.
Definition: IfxMsc.h:936
IfxMsc_clearDataFrameInterruptFlag
IFX_EXTERN void IfxMsc_clearDataFrameInterruptFlag(Ifx_MSC *msc)
clear data frame interrupt flag
Definition: IfxMsc.c:54
IfxMsc_DataFrameLength_5
SRx[4:0] Shifted.
Definition: IfxMsc.h:366
IfxMsc_ServiceRequestDelay
IfxMsc_ServiceRequestDelay
Service Request Delay Definition in Ifx_MSC.USR.B.SRDC.
Definition: IfxMsc.h:728
IfxMsc_ShiftClockPhaseDuration_15
Duration in periods of f_A is 15.
Definition: IfxMsc.h:753
IfxMsc_UpstreamTimeoutPrescaler_2
Prescale value 2 for the upstream time-out limit.
Definition: IfxMsc.h:905
IfxMsc_ReceiveDataInterruptNode
IfxMsc_ReceiveDataInterruptNode
Interrupt Control Register - Receive Data Interrupt Pointer Definition in Ifx_MSC.ICR.B.RDIP.
Definition: IfxMsc.h:693
IfxMsc_CommandFrameLength_18
SRL[15:0] and SRH[1:0] Shifted.
Definition: IfxMsc.h:172
IfxMsc_CommandFrameLength_20
SRL[15:0] and SRH[3:0] Shifted.
Definition: IfxMsc.h:174
IfxMsc_SerialDataInput_4
SDI4 is selected for the SDI of the upstream channel.
Definition: IfxMsc.h:719
IfxMsc_ControlFrameExtensionPassivePhaseLength_113
Length of Command frames passive phase is 115.
Definition: IfxMsc.h:307
IfxMsc_Parity
IfxMsc_Parity
Parity Mode Definition in Ifx_MSC.USR.B.PCT.
Definition: IfxMsc.h:650
IfxMsc_ControlFrameExtensionPassivePhaseLength_86
Length of Command frames passive phase is 88.
Definition: IfxMsc.h:280
IfxMsc_FclClockControlEnabled_activePhaseOnly
FCL is active during active phases of data or command frames.
Definition: IfxMsc.h:537
IfxMsc_SerialDataInput_5
SDI5 is selected for the SDI of the upstream channel.
Definition: IfxMsc.h:720
IfxMsc_CommandFrameLength_30
SRL[15:0] and SRH[13:0] Shifted.
Definition: IfxMsc.h:184
IfxMsc_ControlFrameExtensionPassivePhaseLength_117
Length of Command frames passive phase is 119.
Definition: IfxMsc.h:311
IfxMsc_NDividerAbra
IfxMsc_NDividerAbra
Asynchronous Block Configuration Register - N Divider ABRA Definition in Ifx_MSC.ABC.B.NDA.
Definition: IfxMsc.h:591
IfxMsc_upstreamFractionalBaudCalculator
IFX_EXTERN uint64 IfxMsc_upstreamFractionalBaudCalculator(Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is fractional.
Definition: IfxMsc.c:215
IfxMsc_ExternalBitInjectionPosition_23
Injected external bit is at Position 23 of the data frame.
Definition: IfxMsc.h:472
IfxMsc_DataFrameLength_4
SRx[3:0] Shifted.
Definition: IfxMsc.h:365
IfxMsc_SleepMode_enable
enables sleep mode
Definition: IfxMsc.h:762
IfxMsc_PassiveTimeFrameCount
IfxMsc_PassiveTimeFrameCount
Downstream Status Register - Number Of Passive Time Frames Definition in Ifx_MSC.DSS.B.NPTF.
Definition: IfxMsc.h:659
IfxMsc_UpstreamTimeoutPrescaler_32768
Prescale value 32768 for the upstream time-out limit.
Definition: IfxMsc.h:919
IfxMsc_CommandFrameLength_26
SRL[15:0] and SRH[9:0] Shifted.
Definition: IfxMsc.h:180
IfxMsc_CommandFrameLength_17
SRL[15:0] and SRH[0] Shifted.
Definition: IfxMsc.h:171
IfxMsc_ControlFrameExtensionPassivePhaseLength_75
Length of Command frames passive phase is 77.
Definition: IfxMsc.h:269
IfxMsc_ClockSelect
IfxMsc_ClockSelect
Asynchronous Block Configuration Register - Clock Select Definition in Ifx_MSC.ABC.B.CLKSEL.
Definition: IfxMsc.h:114
IfxMsc_NDividerDownstream_10
division ratio is 10
Definition: IfxMsc.h:617
IfxMsc_ControlFrameExtensionPassivePhaseLength_64
Length of Command frames passive phase is 66.
Definition: IfxMsc.h:258
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:249
IfxMsc_ExternalBitInjectionPosition_21
Injected external bit is at Position 21 of the data frame.
Definition: IfxMsc.h:470
IfxMsc_ControlFrameExtensionPassivePhaseLength_107
Length of Command frames passive phase is 109.
Definition: IfxMsc.h:301
IfxMsc_ControlFrameExtensionPassivePhaseLength_92
Length of Command frames passive phase is 94.
Definition: IfxMsc.h:286
IfxMsc_UpstreamChannelReceivingRate_32
Baud rate = f_MSC / 32.
Definition: IfxMsc.h:872
IfxMsc_ControlFrameExtensionPassivePhaseLength_51
Length of Command frames passive phase is 53.
Definition: IfxMsc.h:245
IfxMsc_SdiLinePolarity
IfxMsc_SdiLinePolarity
Output Control Register - SDI Line Polarity Definition in Ifx_MSC.OCR.B.ILP.
Definition: IfxMsc.h:704
IfxMsc_Fcln_Out
FCLN pin mapping structure.
Definition: IfxMsc_PinMap.h:89
IfxMsc_CxModeCommand::dc
uint32 dc
Command to be wrtten to DC register.
Definition: IfxMsc.h:956
IfxMsc_setDownStreamExtension
IFX_INLINE void IfxMsc_setDownStreamExtension(Ifx_MSC *msc, boolean value)
Set or reset the Down stream extension enable bit.
Definition: IfxMsc.h:1749
IfxMsc_ControlFrameExtensionPassivePhaseLength_38
Length of Command frames passive phase is 40.
Definition: IfxMsc.h:232
IfxMsc_ControlFrameExtensionPassivePhaseLength_29
Length of Command frames passive phase is 31.
Definition: IfxMsc.h:223
IfxMsc_ExternalBitInjectionPosition_17
Injected external bit is at Position 17 of the data frame.
Definition: IfxMsc.h:466
IfxMsc_DataFrameInterrupt_atLastDataBit
An interrupt is generated when the last data bit has been shifted out.
Definition: IfxMsc.h:341
IfxMsc_NDividerDownstream_16
division ratio is 16
Definition: IfxMsc.h:623
IfxMsc_UpstreamTimeoutPrescaler_8
Prescale value 8 for the upstream time-out limit.
Definition: IfxMsc.h:907
IfxMsc_Extension_enabled
Enables the extension bit fields.
Definition: IfxMsc.h:441
IfxMsc_SleepMode
IfxMsc_SleepMode
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_MSC.CLC.B.EDIS.
Definition: IfxMsc.h:760
IfxMsc_upstreamNormalBaudCalculator
IFX_EXTERN uint32 IfxMsc_upstreamNormalBaudCalculator(Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is normal.
Definition: IfxMsc.c:238
IfxMsc_UpstreamTimeoutValue_8
Upstream timeout value for the N-Divider.
Definition: IfxMsc.h:934
IfxMsc_UnderflowInterrupt_disabled
Disables the path of the Underflow interrupt towards the interrupt node.
Definition: IfxMsc.h:838
IfxMsc_PassiveTimeFrameCount_6
6 Passive time frames inserted
Definition: IfxMsc.h:667
IfxMsc_ControlFrameExtensionPassivePhaseLength_102
Length of Command frames passive phase is 104.
Definition: IfxMsc.h:296
IfxMsc_ShiftClockPhaseDuration_1
Duration in periods of f_A is 1.
Definition: IfxMsc.h:739
IfxMsc_PassiveTimeFrameCount_9
9 Passive time frames inserted
Definition: IfxMsc.h:670
IfxMsc_TimeFrameInterruptNode
IfxMsc_TimeFrameInterruptNode
Interrupt Control Register - Time Frame Interrupt Pointer Definition in Ifx_MSC.ICR.B.TFIP.
Definition: IfxMsc.h:816
IfxMsc_setAbraOverflowFlag
IFX_INLINE void IfxMsc_setAbraOverflowFlag(Ifx_MSC *msc)
Sets the Overflow Flag and will trigger the overflow interrupt, if enabled.
Definition: IfxMsc.h:1888
IfxMsc_getDownstreamBaudrate
IFX_EXTERN float32 IfxMsc_getDownstreamBaudrate(Ifx_MSC *msc)
Definition: IfxMsc.c:296
IfxMsc_ControlFrameExtensionPassivePhaseLength_83
Length of Command frames passive phase is 85.
Definition: IfxMsc.h:277
IfxMsc_ShiftClockPhaseDuration_4
Duration in periods of f_A is 4.
Definition: IfxMsc.h:742
IfxMsc_En_Out
EN pin mapping structure.
Definition: IfxMsc_PinMap.h:72
IfxMsc_HardwareClock_enabled
Hardware clock enable.
Definition: IfxMsc.h:555
IfxMsc_enableUpstreamTimeoutInterrupt
IFX_INLINE void IfxMsc_enableUpstreamTimeoutInterrupt(Ifx_MSC *msc)
Enables the Upstream Timeout Interrupt.
Definition: IfxMsc.h:1547
IfxMsc_ControlFrameExtensionPassivePhaseLength_84
Length of Command frames passive phase is 86.
Definition: IfxMsc.h:278
IfxMsc_ControlFrameExtensionPassivePhaseLength_5
Length of Command frames passive phase is 7.
Definition: IfxMsc.h:199
IfxMsc_ShiftClockPhaseDuration_5
Duration in periods of f_A is 5.
Definition: IfxMsc.h:743
IfxMsc_CommandFrameLength
IfxMsc_CommandFrameLength
Number of Bits shifted at command frames Definition in Ifx_MSC.DSC.B.NBC.
Definition: IfxMsc.h:152
IfxMsc_DividerMode_fractional
divider mode is fractional
Definition: IfxMsc.h:423
IfxMsc_ExternalBitInjectionPosition_8
Injected external bit is at Position 8 of the data frame.
Definition: IfxMsc.h:457
IfxMsc_ExternalBitInjectionPosition_11
Injected external bit is at Position 11 of the data frame.
Definition: IfxMsc.h:460
IfxMsc_ExternalBitInjectionPosition_16
Injected external bit is at Position 16 of the data frame.
Definition: IfxMsc.h:465
IfxMsc_ShiftClockPhaseDuration_12
Duration in periods of f_A is 12.
Definition: IfxMsc.h:750
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:151
IfxMsc_initFclpPin
IFX_INLINE void IfxMsc_initFclpPin(const IfxMsc_Fclp_Out *fclp, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a FCLP output.
Definition: IfxMsc.h:1653
IfxMsc_ControlFrameExtensionPassivePhaseLength_45
Length of Command frames passive phase is 47.
Definition: IfxMsc.h:239
IfxMsc_ControlFrameExtensionPassivePhaseLength_82
Length of Command frames passive phase is 84.
Definition: IfxMsc.h:276
IfxMsc_OverflowInterrupt_disabled
Disables the path of the overflow interrupt towards the interrupt node.
Definition: IfxMsc.h:631
IfxMsc_ControlFrameExtensionPassivePhaseLength_115
Length of Command frames passive phase is 117.
Definition: IfxMsc.h:309
IfxMsc_TimeFrameInterruptNode_SR1
Service request output SR1 selected.
Definition: IfxMsc.h:819
IfxMsc_OverflowInterrupt
IfxMsc_OverflowInterrupt
Asynchronous Block Configuration Register - Overflow Interrupt Enable Definition in Ifx_MSC...
Definition: IfxMsc.h:629
IfxMsc_ActivePhaseSelection_lowLevel
Low level selection bit inserted.
Definition: IfxMsc.h:90
IfxMsc_ReceiveDataInterruptNode_SR0
Service request output SR0 selected.
Definition: IfxMsc.h:695
IfxMsc_ExternalBitInjectionPosition_1
Injected external bit is at Position 1 of the data frame.
Definition: IfxMsc.h:450
IfxMsc_ExternalBitInjectionPosition_36
Injected external bit is at Position 36 of the data frame.
Definition: IfxMsc.h:485
IfxMsc_DataFrameInterruptNode_SR2
Service request output SR2 selected.
Definition: IfxMsc.h:352
IfxMsc_DataFramePassivePhaseLength_12
Passive phase length is 12 tFCL.
Definition: IfxMsc.h:395
IfxMsc_ModuleSuspendRequestBit_softSuspend
OCDS is Soft suspended.
Definition: IfxMsc.h:576
IfxMsc_ExternalBitInjectionPosition_38
Injected external bit is at Position 38 of the data frame.
Definition: IfxMsc.h:487
IfxMsc_PassiveTimeFrameCount_14
14 Passive time frames inserted
Definition: IfxMsc.h:675
IfxMsc_ControlFrameExtensionPassivePhaseLength_95
Length of Command frames passive phase is 97.
Definition: IfxMsc.h:289
IfxMsc_DataFrameInterruptNode_SR3
Service request output SR3 selected.
Definition: IfxMsc.h:353
IfxMsc_CommandFrameLength_31
SRL[15:0] and SRH[14:0] Shifted.
Definition: IfxMsc.h:185
IfxMsc_DataFrameLength_10
SRx[9:0] Shifted.
Definition: IfxMsc.h:371
IfxMsc_setTransmissionMode
IFX_INLINE void IfxMsc_setTransmissionMode(Ifx_MSC *msc, IfxMsc_TransmissionMode mode)
Sets the Transmission Mode.
Definition: IfxMsc.h:1852
IfxMsc_Fclp_Out
FCLP pin mapping structure.
Definition: IfxMsc_PinMap.h:81
IfxMsc_ControlFrameExtensionPassivePhaseLength_106
Length of Command frames passive phase is 108.
Definition: IfxMsc.h:300
IfxMsc_CommandFrameLength_5
SRL[4:0] Shifted.
Definition: IfxMsc.h:159
IfxMsc_ControlFrameExtensionPassivePhaseLength_37
Length of Command frames passive phase is 39.
Definition: IfxMsc.h:231
IfxMsc_ExternalBitInjectionPosition_40
Injected external bit is at Position 40 of the data frame.
Definition: IfxMsc.h:489
IfxMsc_NDividerDownstream_7
division ratio is 7
Definition: IfxMsc.h:614
IfxMsc_CommandFrameInterruptNode
IfxMsc_CommandFrameInterruptNode
Interrupt Control Register - Command Frame Interrupt Node Pointer Definition in Ifx_MSC.ICR.B.ECIP.
Definition: IfxMsc.h:141
IfxMsc_ControlFrameExtensionPassivePhaseLength_20
Length of Command frames passive phase is 22.
Definition: IfxMsc.h:214
IfxMsc_CommandFrameInterruptNode_SR0
Service request output SR0 selected.
Definition: IfxMsc.h:143
IfxMsc_SleepMode_disable
disables sleep mode
Definition: IfxMsc.h:763
IfxMsc_CommandFrameLength_25
SRL[15:0] and SRH[8:0] Shifted.
Definition: IfxMsc.h:179
IfxMsc_UpstreamTimeoutValue_3
Upstream timeout value for the N-Divider.
Definition: IfxMsc.h:929
IfxMsc_PassiveTimeFrameCount_2
2 Passive time frames inserted
Definition: IfxMsc.h:663
IfxMsc_SuspendMode
IfxMsc_SuspendMode
OCDS Suspend Control (OCDS.SUS)
Definition: IfxMsc.h:787
IfxMsc_DataFramePassivePhaseLength_8
Passive phase length is 8 tFCL.
Definition: IfxMsc.h:391
IfxMsc_DataFramePassivePhaseLength_16
Passive phase length is 16 tFCL.
Definition: IfxMsc.h:399
IfxMsc_DataFrameExtensionPassivePhaseLength_1
1 Additional MSB bits extension of the PPD bit field
Definition: IfxMsc.h:330
IfxMsc_ControlFrameExtensionPassivePhaseLength_87
Length of Command frames passive phase is 89.
Definition: IfxMsc.h:281
IfxMsc_NDividerDownstream_9
division ratio is 9
Definition: IfxMsc.h:616
IfxMsc_ControlFrameExtensionPassivePhaseLength_50
Length of Command frames passive phase is 52.
Definition: IfxMsc.h:244
IfxMsc_ControlFrameExtensionPassivePhaseLength_36
Length of Command frames passive phase is 38.
Definition: IfxMsc.h:230
IfxMsc_CommandFrameLength_8
SRL[7:0] Shifted.
Definition: IfxMsc.h:162
IfxMsc_ControlFrameExtensionPassivePhaseLength_76
Length of Command frames passive phase is 78.
Definition: IfxMsc.h:270
IfxMsc_CommandFrameLength_16
SRL[15:0] Shifted.
Definition: IfxMsc.h:170
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxMsc_UpstreamTimeoutPrescaler_64
Prescale value 64 for the upstream time-out limit.
Definition: IfxMsc.h:910
IfxMsc_Source_downstreamDataRegister
SRx[16] is taken from data Register DD.DDL[xx].
Definition: IfxMsc.h:780
IfxMsc_ExternalBitInjectionPosition_48
Injected external bit is at Position 48 of the data frame.
Definition: IfxMsc.h:497
IfxMsc_ControlFrameExtensionPassivePhaseLength_89
Length of Command frames passive phase is 91.
Definition: IfxMsc.h:283
IfxMsc_Inj_In
INJ pin mapping structure.
Definition: IfxMsc_PinMap.h:56
IfxMsc_UpstreamChannelReceivingRate_128
Baud rate = f_MSC / 128.
Definition: IfxMsc.h:874
IfxMsc_DataFramePassivePhaseLength_32
Passive phase length is 32 tFCL.
Definition: IfxMsc.h:415
IfxMsc_DataFramePassivePhaseLength_20
Passive phase length is 20 tFCL.
Definition: IfxMsc.h:403
IfxMsc_ControlFrameExtensionPassivePhaseLength_66
Length of Command frames passive phase is 68.
Definition: IfxMsc.h:260
IfxMsc_getIndex
IFX_EXTERN IfxMsc_Index IfxMsc_getIndex(Ifx_MSC *msc)
API to get the resource index of the MSC specified.
Definition: IfxMsc.c:167
IfxMsc_ControlFrameExtensionPassivePhaseLength_77
Length of Command frames passive phase is 79.
Definition: IfxMsc.h:271
IfxMsc_Target_en1
Target EN1.
Definition: IfxMsc.h:799
IfxMsc_UnderflowInterrupt
IfxMsc_UnderflowInterrupt
Asynchronous Block Configuration Register - Underflow Interrupt Enable Definition in Ifx_MSC...
Definition: IfxMsc.h:836
IfxMsc_UpstreamTimeoutValue
IfxMsc_UpstreamTimeoutValue
Upstream Control Enhanced Register 1 - Upstream Timeout Value Definition in Ifx_MSC.USCE.B.USTOVAL.
Definition: IfxMsc.h:925
IfxMsc_ControlFrameExtensionPassivePhaseLength_17
Length of Command frames passive phase is 19.
Definition: IfxMsc.h:211
IfxMsc_ExternalBitInjectionPosition_51
Injected external bit is at Position 51 of the data frame.
Definition: IfxMsc.h:500
IfxMsc_getUpstreamParityErrorFlag
IFX_INLINE boolean IfxMsc_getUpstreamParityErrorFlag(Ifx_MSC *msc, uint8 upstreamIdx)
Returns the Upstream Parity Error Flag Status.
Definition: IfxMsc.h:1611
IfxMsc_SuspendMode_none
No suspend.
Definition: IfxMsc.h:789
IfxMsc_ExternalBitInjectionPosition_58
Injected external bit is at Position 58 of the data frame.
Definition: IfxMsc.h:507
IfxMsc_UnderflowInterruptNode_SR2
Service request output SR2 selected.
Definition: IfxMsc.h:849
IfxMsc_manualLoadCxModeCommand
IFX_EXTERN void IfxMsc_manualLoadCxModeCommand(Ifx_MSC *msc, IfxMsc_CxModeCommand *command64)
Definition: IfxMsc.c:187
IfxMsc_ControlFrameExtensionPassivePhaseLength_19
Length of Command frames passive phase is 21.
Definition: IfxMsc.h:213
IfxMsc_DataFramePassivePhaseLength_31
Passive phase length is 31 tFCL.
Definition: IfxMsc.h:414
IfxMsc_CxModeCommand
64 bit commnd to be loaded first to DCE & then to DC for transmission.
Definition: IfxMsc.h:953
IfxMsc_ControlFrameExtensionPassivePhaseLength_78
Length of Command frames passive phase is 80.
Definition: IfxMsc.h:272
IfxMsc_clearValidbit
IFX_INLINE void IfxMsc_clearValidbit(Ifx_MSC *msc, uint8 upstreamIdx)
Clears the Valid bit.
Definition: IfxMsc.h:1535
IfxMsc_SerialDataInput
IfxMsc_SerialDataInput
Output Control Register - Serial Data Input Selection Definition in Ifx_MSC.OCR.B.SDISEL.
Definition: IfxMsc.h:713
IfxMsc_ExternalBitInjectionPosition_32
Injected external bit is at Position 32 of the data frame.
Definition: IfxMsc.h:481
IfxMsc_FclLinePolarity
IfxMsc_FclLinePolarity
Output Control Register - FCLP Line Polarity Definition in Ifx_MSC.OCR.B.CLP.
Definition: IfxMsc.h:544
IfxMsc_SerialDataInput_0
SDI0 is selected for the SDI of the upstream channel.
Definition: IfxMsc.h:715
IfxMsc_getDownstreamAbraBaudrate
IFX_EXTERN float32 IfxMsc_getDownstreamAbraBaudrate(Ifx_MSC *msc)
Returns the downstream ABRA baudrate.
Definition: IfxMsc.c:261
IfxMsc_UpstreamTimeoutPrescaler_16
Prescale value 16 for the upstream time-out limit.
Definition: IfxMsc.h:908
IfxMsc_getUpstreamTimeoutFlag
IFX_INLINE boolean IfxMsc_getUpstreamTimeoutFlag(Ifx_MSC *msc)
Returns Upstream Timeout Flag Status.
Definition: IfxMsc.h:1617
IfxMsc_HardwareClock_disabled
Hardware clock disable.
Definition: IfxMsc.h:554
IfxScuCcu.h
SCU basic functionality.
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:81
IfxMsc_CommandFrameLength_23
SRL[15:0] and SRH[6:0] Shifted.
Definition: IfxMsc.h:177
IfxMsc_UpstreamTimeoutInterrupt_disabled
Upstream Timeout Interrupt Disabled.
Definition: IfxMsc.h:883
IfxMsc_TransmissionMode_dataRepetition
Data Repetition Mode.
Definition: IfxMsc.h:830
IfxMsc_ExternalBitInjectionPosition
IfxMsc_ExternalBitInjectionPosition
Downstream Control Enhanced Register - Injection Position of the Pin 0 and 1 Signal Definition in Ifx...
Definition: IfxMsc.h:447
IfxMsc_SoLinePolarity_inverted
SOP and SO polarity is inverted.
Definition: IfxMsc.h:772
IfxMsc_disableUpstreamTimeoutInterrupt
IFX_INLINE void IfxMsc_disableUpstreamTimeoutInterrupt(Ifx_MSC *msc)
Disables the Upstream Timeout Interrupt.
Definition: IfxMsc.h:1541
IfxMsc_SerialDataInput_7
SDI7 is selected for the SDI of the upstream channel.
Definition: IfxMsc.h:722
IfxMsc_UpstreamTimeoutInterruptNode_SR2
Service request output SR2 selected.
Definition: IfxMsc.h:894
IfxMsc_NDividerDownstream_15
division ratio is 15
Definition: IfxMsc.h:622
IfxMsc_ExternalBitInjectionPosition_0
Injected external bit is at Position 0 of the data frame.
Definition: IfxMsc.h:449
IfxMsc_NDividerAbra_8
Division ratio is 8.
Definition: IfxMsc.h:600
IfxMsc_SerialDataInput_3
SDI3 is selected for the SDI of the upstream channel.
Definition: IfxMsc.h:718
IfxMsc_FastMode_disabled
Disable Fast Mode(DSTE.FM=0).Needs to be cleared with DSTE.UL1=1 in the same cycle.
Definition: IfxMsc.h:528
IfxMsc_ReceiveDataInterrupt_onRdieSet
An interrupt is generated as with RDIE = 01B but only if the received data is not equal to 00H...
Definition: IfxMsc.h:686
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:248
IfxMsc_SdiLinePolarity_invertedSi
SDI and SI signal polarities are inverted.
Definition: IfxMsc.h:707
IfxMsc_ControlFrameExtensionPassivePhaseLength_96
Length of Command frames passive phase is 98.
Definition: IfxMsc.h:290
IfxMsc_UpstreamTimeoutPrescaler_2048
Prescale value 2048 for the upstream time-out limit.
Definition: IfxMsc.h:915
IfxMsc_Parity_even
Even Parity.
Definition: IfxMsc.h:652
IfxMsc_OverflowInterruptNode_SR2
Service request output SR2 selected.
Definition: IfxMsc.h:642
IfxMsc_DataFramePassivePhaseLength_19
Passive phase length is 19 tFCL.
Definition: IfxMsc.h:402
IfxMsc_InterruptServiceRequest_2
Interrupt Service Request number2.
Definition: IfxMsc.h:564
IfxMsc_SoLinePolarity_nonInverted
SOP and SO polarity is identical.
Definition: IfxMsc.h:771
IfxMsc_UnderflowInterruptNode
IfxMsc_UnderflowInterruptNode
Asynchronous Block Configuration Register - Underflow Interrupt Node Pointer Definition in Ifx_MSC...
Definition: IfxMsc.h:845
IfxMsc_DataFramePassivePhaseLength_29
Passive phase length is 29 tFCL.
Definition: IfxMsc.h:412
IfxMsc_InterruptServiceRequest_4
Interrupt Service Request number4.
Definition: IfxMsc.h:566
IfxMsc_ExternalBitInjectionPosition_52
Injected external bit is at Position 52 of the data frame.
Definition: IfxMsc.h:501
IfxMsc_NDividerDownstream_11
division ratio is 11
Definition: IfxMsc.h:618
IfxMsc_ExternalBitInjectionPosition_49
Injected external bit is at Position 49 of the data frame.
Definition: IfxMsc.h:498
IfxMsc_Sop_Out
SOP pin mapping structure.
Definition: IfxMsc_PinMap.h:97
IfxMsc_SerialDataInput_2
SDI2 is selected for the SDI of the upstream channel.
Definition: IfxMsc.h:717
IfxMsc_FclClockControlEnabled_always
FCL is always active.
Definition: IfxMsc.h:538
IfxMsc_ControlFrameExtensionPassivePhaseLength_3
Length of Command frames passive phase is 5.
Definition: IfxMsc.h:197
IfxMsc_ExternalBitInjectionPosition_55
Injected external bit is at Position 55 of the data frame.
Definition: IfxMsc.h:504
IfxMsc_ExternalBitInjectionPosition_47
Injected external bit is at Position 47 of the data frame.
Definition: IfxMsc.h:496
IfxMsc_ExternalBitInjectionPosition_3
Injected external bit is at Position 3 of the data frame.
Definition: IfxMsc.h:452
IfxMsc_UpstreamTimeoutInterruptNode
IfxMsc_UpstreamTimeoutInterruptNode
Upstream Control Enhanced Register 1 - Upstream Timeout Interrupt Node Pointer Definition in Ifx_MSC...
Definition: IfxMsc.h:890
IfxMsc_ControlFrameExtensionPassivePhaseLength_21
Length of Command frames passive phase is 23.
Definition: IfxMsc.h:215
IfxMsc_ServiceRequestDelay_1bit
Delay of 1 bit time.
Definition: IfxMsc.h:731
IfxMsc_UpstreamChannelReceivingRate_16
Baud rate = f_MSC / 16.
Definition: IfxMsc.h:871
IfxMsc_CommandFrameInterruptNode_SR1
Service request output SR1 selected.
Definition: IfxMsc.h:144
IfxMsc_InterruptServiceRequest_3
Interrupt Service Request number3.
Definition: IfxMsc.h:565
IfxMsc_DataFramePassivePhaseLength_9
Passive phase length is 9 tFCL.
Definition: IfxMsc.h:392
IfxMsc_Sdi_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxMsc_PinMap.h:68
IfxMsc_UpstreamChannelFrameType
IfxMsc_UpstreamChannelFrameType
Channel Frame Type Definition in Ifx_MSC.USR.B.UFT.
Definition: IfxMsc.h:857
IfxMsc_DataFrameInterruptNode
IfxMsc_DataFrameInterruptNode
Interrupt Control Register - Data Frame Interrupt Node Pointer Definition in Ifx_MSC.ICR.B.EDIP.
Definition: IfxMsc.h:348
IfxMsc_CxModeCommand::dce
uint32 dce
Command to be wrtten to DCE register.
Definition: IfxMsc.h:955
IfxMsc_ExternalBitInjectionPosition_9
Injected external bit is at Position 9 of the data frame.
Definition: IfxMsc.h:458
IfxMsc_UpstreamTimeoutValue_7
Upstream timeout value for the N-Divider.
Definition: IfxMsc.h:933
IfxMsc_ControlFrameExtensionPassivePhaseLength_15
Length of Command frames passive phase is 17.
Definition: IfxMsc.h:209
IfxMsc_DataFrameLength_7
SRx[6:0] Shifted.
Definition: IfxMsc.h:368
IfxMsc_PassiveTimeFrameCount_3
3 Passive time frames inserted
Definition: IfxMsc.h:664
IfxMsc_ControlFrameExtensionPassivePhaseLength_34
Length of Command frames passive phase is 36.
Definition: IfxMsc.h:228
IfxMsc_ControlFrameExtensionPassivePhaseLength_110
Length of Command frames passive phase is 112.
Definition: IfxMsc.h:304
IfxMsc_En_Out::pin
IfxPort_Pin pin
Port pin.
Definition: IfxMsc_PinMap.h:76
IfxMsc_ShiftClockPhaseDuration
IfxMsc_ShiftClockPhaseDuration
Asynchronous Block Configuration Register - Duration of the Low/High Phase of the Shift Clock Definit...
Definition: IfxMsc.h:737
IfxMsc_UpstreamTimeoutValue_5
Upstream timeout value for the N-Divider.
Definition: IfxMsc.h:931
IfxMsc_UnderflowInterruptNode_SR1
Service request output SR1 selected.
Definition: IfxMsc.h:848
IfxMsc_initEnPin
IFX_INLINE void IfxMsc_initEnPin(const IfxMsc_En_Out *en, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a EN output.
Definition: IfxMsc.h:1633
IfxMsc_UnderflowInterruptNode_SR4
Service request output SR4 selected.
Definition: IfxMsc.h:851
IfxMsc_UpstreamChannelReceivingRate_64
Baud rate = f_MSC / 64.
Definition: IfxMsc.h:873
IfxMsc_ControlFrameExtensionPassivePhaseLength_121
Length of Command frames passive phase is 123.
Definition: IfxMsc.h:315
IfxMsc_DataFrameLength_15
SRx[14:0] Shifted.
Definition: IfxMsc.h:376
IfxMsc_UpstreamTimeoutValue_4
Upstream timeout value for the N-Divider.
Definition: IfxMsc.h:930
IfxMsc_ControlFrameExtensionPassivePhaseLength_32
Length of Command frames passive phase is 34.
Definition: IfxMsc.h:226
IfxMsc_DataFramePassivePhaseLength_18
Passive phase length is 18 tFCL.
Definition: IfxMsc.h:401
IfxMsc_ExternalBitInjectionPosition_13
Injected external bit is at Position 13 of the data frame.
Definition: IfxMsc.h:462
IfxMsc_ExternalBitInjectionPosition_56
Injected external bit is at Position 56 of the data frame.
Definition: IfxMsc.h:505
IfxMsc_ControlFrameExtensionPassivePhaseLength_109
Length of Command frames passive phase is 111.
Definition: IfxMsc.h:303
IfxMsc_ShiftClockPhaseDuration_2
Duration in periods of f_A is 2.
Definition: IfxMsc.h:740
IfxMsc_PassiveTimeFrameCount_13
13 Passive time frames inserted
Definition: IfxMsc.h:674
IfxMsc_ShiftClockPhaseDuration_14
Duration in periods of f_A is 14.
Definition: IfxMsc.h:752
IfxMsc_getUpstreamValidFlag
IFX_INLINE boolean IfxMsc_getUpstreamValidFlag(Ifx_MSC *msc, uint8 upstreamIdx)
Get the status of the valid flag.
Definition: IfxMsc.h:1623
IfxMsc_ControlFrameExtensionPassivePhaseLength_69
Length of Command frames passive phase is 71.
Definition: IfxMsc.h:263
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxMsc_PinMap.h
MSC I/O map.
IfxMsc_TimeFrameInterruptNode_SR3
Service request output SR3 selected.
Definition: IfxMsc.h:821
IfxMsc_ControlFrameExtensionPassivePhaseLength_59
Length of Command frames passive phase is 61.
Definition: IfxMsc.h:253
IfxMsc_UnderflowInterrupt_enabled
Enables the path of the Underflow interrupt towards the interrupt node.
Definition: IfxMsc.h:839
IfxMsc_ReceiveDataInterrupt_disabled
Interrupt generation disabled.
Definition: IfxMsc.h:684
IfxMsc_DataFrameLength_1
SRx[0] Shifted.
Definition: IfxMsc.h:362
IfxMsc_ExternalBitInjectionPosition_53
Injected external bit is at Position 53 of the data frame.
Definition: IfxMsc.h:502
IfxMsc_Extension_disabled
Disables the extension bit fields.
Definition: IfxMsc.h:440
IfxMsc_ReceiveDataInterruptNode_SR3
Service request output SR3 selected.
Definition: IfxMsc.h:698
IfxMsc_ControlFrameExtensionPassivePhaseLength_31
Length of Command frames passive phase is 33.
Definition: IfxMsc.h:225
IfxMsc_CommandFrameInterrupt_disabled
Interrupt generation disabled.
Definition: IfxMsc.h:134
IfxMsc_DataFrameInterrupt_atFirstDataBit
An interrupt is generated when the First data bit has been shifted out.
Definition: IfxMsc.h:342
IfxMsc_ControlFrameExtensionPassivePhaseLength_44
Length of Command frames passive phase is 46.
Definition: IfxMsc.h:238
IfxMsc_DataFramePassivePhaseLength
IfxMsc_DataFramePassivePhaseLength
Passive Phase Length at Data Frames Definition in Ifx_MSC.DSC.B.PPD.
Definition: IfxMsc.h:383
IfxMsc_DataFrameLength_11
SRx[10:0] Shifted.
Definition: IfxMsc.h:372
IfxMsc_UpstreamTimeoutPrescaler_32
Prescale value 32 for the upstream time-out limit.
Definition: IfxMsc.h:909
IfxMsc_DataFrameLength
IfxMsc_DataFrameLength
Number of SRx[] (x->SRL/SRH) Bits Shifted at Data Frames Definition in Ifx_MSC.DSC.B.NDBH and Ifx_MSC.DSC.B.NDBL.
Definition: IfxMsc.h:359
IfxMsc_ExternalBitInjectionPosition_39
Injected external bit is at Position 39 of the data frame.
Definition: IfxMsc.h:488
IfxMsc_Source
IfxMsc_Source
Downstream Select Data Source Low Register - Select Source for - SRL and SRHNumber Of Passive Time Fr...
Definition: IfxMsc.h:778
IfxMsc_downstreamNormalBaudCalculator
IFX_EXTERN uint32 IfxMsc_downstreamNormalBaudCalculator(Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is normal for downstream.
Definition: IfxMsc.c:112
IfxMsc_ControlFrameExtensionPassivePhaseLength_70
Length of Command frames passive phase is 72.
Definition: IfxMsc.h:264
IfxMsc_DataFrameLength_9
SRx[8:0] Shifted.
Definition: IfxMsc.h:370
IfxMsc_DataFramePassivePhaseLength_24
Passive phase length is 24 tFCL.
Definition: IfxMsc.h:407
IfxMsc_UnderflowInterruptNode_SR0
Service request output SR0 selected.
Definition: IfxMsc.h:847
IfxMsc_ControlFrameExtensionPassivePhaseLength_56
Length of Command frames passive phase is 58.
Definition: IfxMsc.h:250
IfxMsc_ShiftClockPhaseDuration_6
Duration in periods of f_A is 6.
Definition: IfxMsc.h:744
IfxMsc_TimeFrameInterrupt_enabled
Interrupt generation enabled.
Definition: IfxMsc.h:810
IfxMsc_CommandFrameLength_28
SRL[15:0] and SRH[11:0] Shifted.
Definition: IfxMsc.h:182
IfxMsc_Target_en0
Target EN0.
Definition: IfxMsc.h:798
IfxMsc_ExternalBitInjectionPosition_26
Injected external bit is at Position 26 of the data frame.
Definition: IfxMsc.h:475
IfxMsc_cfg.h
MSC on-chip implementation data.
IfxMsc_ModuleSuspendRequestBit
IfxMsc_ModuleSuspendRequestBit
OCDS Control and Status - OCDS Suspend Control Definition in Ifx_MSC.OCS.B.SUS.
Definition: IfxMsc.h:572
IfxMsc_Target
IfxMsc_Target
Msc Targets - use as chip enable selection for ENH, ENL and ENC.
Definition: IfxMsc.h:796
IfxMsc_ExternalBitInjectionPosition_61
Injected external bit is at Position 61 of the data frame.
Definition: IfxMsc.h:510
IfxMsc_UpstreamTimeoutPrescaler_16384
Prescale value 16384 for the upstream time-out limit.
Definition: IfxMsc.h:918
IfxMsc_ControlFrameExtensionPassivePhaseLength_62
Length of Command frames passive phase is 64.
Definition: IfxMsc.h:256
IfxMsc_ControlFrameExtensionPassivePhaseLength_85
Length of Command frames passive phase is 87.
Definition: IfxMsc.h:279
IfxMsc_CommandFrameLength_19
SRL[15:0] and SRH[2:0] Shifted.
Definition: IfxMsc.h:173
IfxMsc_getDownStreamExtension
IFX_INLINE boolean IfxMsc_getDownStreamExtension(Ifx_MSC *msc)
Returns the value of Down stream extension enable bit.
Definition: IfxMsc.h:1583
IfxMsc_UpstreamChannelReceivingRate_disabled
Disabled.
Definition: IfxMsc.h:868
IfxMsc_DataFramePassivePhaseLength_7
Passive phase length is 7 tFCL.
Definition: IfxMsc.h:390
IfxMsc_DataFramePassivePhaseLength_10
Passive phase length is 10 tFCL.
Definition: IfxMsc.h:393
IfxMsc_getData
IFX_INLINE uint16 IfxMsc_getData(Ifx_MSC *msc, uint8 upstreamIdx)
Get the upstream data from upstream data register.
Definition: IfxMsc.h:1559
IfxMsc_EmergencyStop_enabled
Emergency stop feature for SRx bit is Enabled.
Definition: IfxMsc.h:432
IfxMsc_NDividerAbra_4
Division ratio is 4.
Definition: IfxMsc.h:596
IfxMsc_CommandFrameLength_32
SRL[15:0] and SRH[15:0] Shifted.
Definition: IfxMsc.h:186
IfxMsc_ControlFrameExtensionPassivePhaseLength_42
Length of Command frames passive phase is 44.
Definition: IfxMsc.h:236
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxMsc_NDividerDownstream_8
division ratio is 8
Definition: IfxMsc.h:615
IfxMsc_ExternalBitInjectionPosition_60
Injected external bit is at Position 60 of the data frame.
Definition: IfxMsc.h:509
IfxMsc_UpstreamTimeoutInterruptNode_SR0
Service request output SR0 selected.
Definition: IfxMsc.h:892
IfxMsc_ControlFrameExtensionPassivePhaseLength_33
Length of Command frames passive phase is 35.
Definition: IfxMsc.h:227
IfxMsc_enableModule
IFX_EXTERN void IfxMsc_enableModule(Ifx_MSC *msc)
Enable MSC kernel.
Definition: IfxMsc.c:127
IfxMsc_ControlFrameExtensionPassivePhaseLength_116
Length of Command frames passive phase is 118.
Definition: IfxMsc.h:310
IfxMsc_DataFramePassivePhaseLength_23
Passive phase length is 23 tFCL.
Definition: IfxMsc.h:406
IfxMsc_DataFrameExtensionPassivePhaseLength
IfxMsc_DataFrameExtensionPassivePhaseLength
Downstream Timing Extension Register - Passive Phase Length at Data Frames Extension Definition in If...
Definition: IfxMsc.h:327
IfxMsc_CommandFrameInterruptNode_SR2
Service request output SR2 selected.
Definition: IfxMsc.h:145
IfxMsc_UpstreamTimeoutInterruptNode_SR4
Service request output SR4 selected.
Definition: IfxMsc.h:896
IfxMsc_initSonPin
IFX_INLINE void IfxMsc_initSonPin(const IfxMsc_Son_Out *son, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a SON output.
Definition: IfxMsc.h:1684
IfxMsc_ControlFrameExtensionPassivePhaseLength_108
Length of Command frames passive phase is 110.
Definition: IfxMsc.h:302
IfxMsc_clearUpstreamValidFlag
IFX_INLINE void IfxMsc_clearUpstreamValidFlag(Ifx_MSC *msc, uint8 upstreamIdx)
Clear the valid flag.
Definition: IfxMsc.h:1529
IfxMsc_TransmissionMode_triggered
Triggered Mode.
Definition: IfxMsc.h:829
IfxMsc_CommandFrameLength_9
SRL[8:0] Shifted.
Definition: IfxMsc.h:163
IfxMsc_FclClockControlEnabled
IfxMsc_FclClockControlEnabled
Output Control Register - Clock Control Definition in Ifx_MSC.OCR.B.CLKCTRL.
Definition: IfxMsc.h:535
IfxMsc_DividerMode_normal
divider mode is normal
Definition: IfxMsc.h:422
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:675
IfxMsc_CommandFrameLength_6
SRL[5:0] Shifted.
Definition: IfxMsc.h:160
IfxMsc_CommandFrameLength_12
SRL[11:0] Shifted.
Definition: IfxMsc.h:166
IfxMsc_ShiftClockPhaseDuration_3
Duration in periods of f_A is 3.
Definition: IfxMsc.h:741
IfxMsc_ControlFrameExtensionPassivePhaseLength_52
Length of Command frames passive phase is 54.
Definition: IfxMsc.h:246
IfxMsc_ShiftClockPhaseDuration_11
Duration in periods of f_A is 11.
Definition: IfxMsc.h:749
IfxMsc_ControlFrameExtensionPassivePhaseLength_68
Length of Command frames passive phase is 70.
Definition: IfxMsc.h:262
IfxMsc_DataFrameLength_0
No SRx bit shifted.
Definition: IfxMsc.h:361
IfxMsc_ControlFrameExtensionPassivePhaseLength_91
Length of Command frames passive phase is 93.
Definition: IfxMsc.h:285
IfxMsc_clearAbraUnderflowFlag
IFX_INLINE void IfxMsc_clearAbraUnderflowFlag(Ifx_MSC *msc)
Clear ABRA underflow flag.
Definition: IfxMsc.h:1509
IfxMsc_CommandFrameLength_13
SRL[12:0] Shifted.
Definition: IfxMsc.h:167
IfxMsc_ControlFrameExtensionPassivePhaseLength_112
Length of Command frames passive phase is 114.
Definition: IfxMsc.h:306
IfxMsc_DataFrameExtensionPassivePhaseLength_2
2 Additional MSB bits extension of the PPD bit field
Definition: IfxMsc.h:331
IfxMsc_CommandFrameLength_22
SRL[15:0] and SRH[5:0] Shifted.
Definition: IfxMsc.h:176
IfxMsc_ControlFrameExtensionPassivePhaseLength_54
Length of Command frames passive phase is 56.
Definition: IfxMsc.h:248
IfxMsc_CommandFrameInterrupt
IfxMsc_CommandFrameInterrupt
Interrupt Control Register - Command Frame Interrupt Enable Definition in Ifx_MSC.ICR.B.ECIE.
Definition: IfxMsc.h:132
IfxMsc_UpstreamChannelReceivingRate_4
Baud rate = f_MSC / 4.
Definition: IfxMsc.h:869
IfxMsc_ControlFrameExtensionPassivePhaseLength_105
Length of Command frames passive phase is 107.
Definition: IfxMsc.h:299
IfxMsc_NDividerAbra_1
Division ratio is 1.
Definition: IfxMsc.h:593
IfxMsc_getDataLowTarget
IFX_INLINE IfxMsc_Target IfxMsc_getDataLowTarget(Ifx_MSC *msc)
Get the selected target during low phase.
Definition: IfxMsc.h:1576
IfxMsc_CommandFrameInterrupt_enabled
Interrupt generation enabled.
Definition: IfxMsc.h:135
IfxMsc_DataFrameLength_3
SRx[2:0] Shifted.
Definition: IfxMsc.h:364
IfxMsc_ControlFrameExtensionPassivePhaseLength_40
Length of Command frames passive phase is 42.
Definition: IfxMsc.h:234
IfxMsc_resetModule
IFX_EXTERN void IfxMsc_resetModule(Ifx_MSC *msc)
Reset MSC kernel.
Definition: IfxMsc.c:194
IfxMsc_ChipSelectActiveState
IfxMsc_ChipSelectActiveState
Output Control Register - Chip Selection Line Polarity Definition in Ifx_MSC.OCR.B.CSLP.
Definition: IfxMsc.h:105
IfxMsc_ControlFrameExtensionPassivePhaseLength_99
Length of Command frames passive phase is 101.
Definition: IfxMsc.h:293


iLLD_TC38A: IfxMsc_Msc.c Source File

  • Msc
  • Msc
IfxMsc_Msc.c
Go to the documentation of this file.
1 /**
2 * \file IfxMsc_Msc.c
3 * \brief MSC MSC details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 */
43
44 /******************************************************************************/
45 /*----------------------------------Includes----------------------------------*/
46 /******************************************************************************/
47
48 #include "IfxMsc_Msc.h"
49
50 /******************************************************************************/
51 /*-------------------------Function Implementations---------------------------*/
52 /******************************************************************************/
53
54 void IfxMsc_Msc_deInitModule(IfxMsc_Msc *msc)
55 {
56 IfxMsc_resetModule(msc->msc);
57 }
58
59
60 IfxMsc_Target IfxMsc_Msc_getTarget(IfxMsc_Msc *msc, IfxMsc_Msc_Target target)
61 {
62 Ifx_MSC *mscSfr = msc->msc;
63 IfxMsc_Target enX = IfxMsc_Target_en0;
64
65 if (target == IfxMsc_Msc_Target_low)
66 {
67 enX = IfxMsc_getDataLowTarget(mscSfr);
68 }
69 else if (target == IfxMsc_Msc_Target_high)
70 {
71 enX = IfxMsc_getDataHighTarget(mscSfr);
72 }
73
74 return enX;
75 }
76
77
78 void IfxMsc_Msc_initModule(IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
79 {
80 Ifx_MSC *mscSfr = config->msc;
81
82 msc->msc = mscSfr;
83
84 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
85 IfxScuWdt_clearCpuEndinit(passwd);
86
87 /* Enable the MSCx Clock */
88 IfxMsc_enableModule(mscSfr);
89
90 /* Configure MSC hadrware enable and set the divider mode */
91 {
92 Ifx_MSC_FDR fdr;
93
94 /* Read the FDR register content */
95 fdr.U = mscSfr->FDR.U;
96 /* Select the divider mode */
97 fdr.B.DM = config->clockConfig.dividerMode;
98 /* Enable Hardware Clock Control */
99 fdr.B.ENHW = IfxMsc_HardwareClock_enabled;
100
101 mscSfr->FDR.U = fdr.U;
102 }
103
104 /* Configure Upstream Channel Data Format */
105 {
106 Ifx_MSC_USR usr;
107
108 /* Read the USR register content */
109 usr.U = mscSfr->USR.U;
110 /* Service Request Delay Control */
111 usr.B.SRDC = config->upstreamConfig.serviceRequestDelay;
112 /* Select parity control Even - 0, Odd - 1 */
113 usr.B.PCTR = config->upstreamConfig.parity;
114 /* Select upstream baud rate fMSC/xx */
115 usr.B.URR = config->upstreamConfig.upstreamChannelReceivingRate;
116 /* Select 12 bit or 16 bit frame */
117 usr.B.UFT = config->upstreamConfig.upstreamChannelFrameType;
118
119 mscSfr->USR.U = usr.U;
120 }
121
122 /* Normal divider */
123 if (config->clockConfig.dividerMode == 1)
124 {
125 /* Initialize MSC BaudRate at 6.25MHz, Fsys = 100MHz */
126 mscSfr->FDR.B.STEP =
127 IfxMsc_upstreamNormalBaudCalculator(mscSfr, config->clockConfig.baudrate);
128 }
129 /* Fractional divider */
130 else
131 {
132 /* Initialize MSC BaudRate at 6.25MHz, Fsys = 100MHz */
133 mscSfr->FDR.B.STEP = (uint32)IfxMsc_upstreamFractionalBaudCalculator(mscSfr, config->clockConfig.baudrate);
134 }
135
136 IfxScuWdt_setCpuEndinit(passwd);
137
138 /* Configure IOs */
139 {
140 IfxMsc_Msc_Io *io = (IfxMsc_Msc_Io *)&config->io;
141
142 IfxMsc_Fclp_Out *fclp = io->fclp.pin;
143
144 if (fclp != NULL_PTR)
145 {
146 IfxMsc_initFclpPin(fclp, io->fclp.mode, io->pinDriver);
147 }
148
149 IfxMsc_Fcln_Out *fcln = io->fcln.pin;
150
151 if (fcln != NULL_PTR)
152 {
153 IfxMsc_initFclnPin(fcln, io->fcln.mode, io->pinDriver);
154 }
155
156 IfxMsc_Sop_Out *sop = io->sop.pin;
157
158 if (sop != NULL_PTR)
159 {
160 IfxMsc_initSopPin(sop, io->sop.mode, io->pinDriver);
161 }
162
163 IfxMsc_Son_Out *son = io->son.pin;
164
165 if (son != NULL_PTR)
166 {
167 IfxMsc_initSonPin(son, io->son.mode, io->pinDriver);
168 }
169
170 IfxMsc_En_Out *en0 = io->en0.pin;
171
172 if (en0 != NULL_PTR)
173 {
174 IfxMsc_initEnPin(en0, io->en0.mode, io->pinDriver);
175 }
176
177 IfxMsc_En_Out *en1 = io->en1.pin;
178
179 if (en1 != NULL_PTR)
180 {
181 IfxMsc_initEnPin(en1, io->en1.mode, io->pinDriver);
182 }
183
184 IfxMsc_En_Out *en2 = io->en2.pin;
185
186 if (en2 != NULL_PTR)
187 {
188 IfxMsc_initEnPin(en2, io->en2.mode, io->pinDriver);
189 }
190
191 IfxMsc_En_Out *en3 = io->en3.pin;
192
193 if (en3 != NULL_PTR)
194 {
195 IfxMsc_initEnPin(en3, io->en3.mode, io->pinDriver);
196 }
197
198 IfxMsc_Sdi_In *sdi = io->sdi.pin;
199
200 if (sdi != NULL_PTR)
201 {
202 IfxMsc_initSdiPin(sdi, io->sdi.mode, io->pinDriver);
203 }
204
205 IfxMsc_Inj_In *inj0 = io->inj0.pin;
206
207 if (inj0 != NULL_PTR)
208 {
209 IfxMsc_initInjPin(inj0, io->inj0.mode, io->pinDriver);
210 }
211
212 IfxMsc_Inj_In *inj1 = io->inj1.pin;
213
214 if (inj1 != NULL_PTR)
215 {
216 IfxMsc_initInjPin(inj1, io->inj1.mode, io->pinDriver);
217 }
218 }
219
220 /* Configure the control of upstream channel timeout feature */
221 {
222 Ifx_MSC_USCE usce;
223
224 /* Read the USCE register content */
225 usce.U = mscSfr->USCE.U;
226 /* Upstream Timeout Value */
227 usce.B.USTOVAL = config->upstreamConfig.upstreamTimeoutValue;
228 /* Upstream Timeout Prescaler */
229 usce.B.USTOPRE = config->upstreamConfig.upstreamTimeoutPrescaler;
230 /* Upstream Timeout Interrupt */
231 usce.B.USTOIP = config->interruptConfig.upstreamTimeoutInterruptNode,
232 usce.B.USTOEN = config->interruptConfig.upstreamTimeoutInterrupt,
233
234 mscSfr->USCE.U = usce.U;
235 }
236
237 /* Control the operation mode and frame layout of the downstream channel transmission */
238 {
239 Ifx_MSC_DSC dsc;
240
241 /* Read the DSC register content */
242 dsc.U = mscSfr->DSC.U;
243
244 /* Passive Phase Length */
245 dsc.B.PPD = config->downstreamConfig.dataFramePassivePhaseLength;
246 /* Number of command bits transmitted */
247 dsc.B.NBC = config->downstreamConfig.commandFrameLength;
248 /* SRH Selection Bit */
249 dsc.B.ENSELH = config->downstreamConfig.srhActivePhaseSelection;
250 /* SRL Selection Bit */
251 dsc.B.ENSELL = config->downstreamConfig.srlActivePhaseSelection;
252 /* Number of SRH Bits transmitted */
253 dsc.B.NDBH = config->downstreamConfig.srhDataFrameLength;
254 /* Number of SRL Bits transmitted */
255 dsc.B.NDBL = config->downstreamConfig.srlDataFrameLength;
256 /* Transmission Mode - Triggered or data repetition */
257 dsc.B.TM = config->downstreamConfig.transmissionMode;
258
259 mscSfr->DSC.U = dsc.U;
260 }
261
262 /* Number Of Passive Time Frames */
263 mscSfr->DSS.B.NPTF = config->downstreamConfig.passiveTimeFrameCount;
264
265 /* Select Source for SRL */
266 mscSfr->DSDSL.U = config->downstreamConfig.downstreamDataSourcesLow;
267 /* Select Source for SRH */
268 mscSfr->DSDSH.U = config->downstreamConfig.downstreamDataSourcesHigh;
269
270 /* Emergency Stop Enable for Bits */
271 mscSfr->ESR.U = config->downstreamConfig.emergencyStopEnableBits;
272
273 /* Interrupt configuration */
274 {
275 Ifx_MSC_ICR icr;
276
277 icr.U = mscSfr->ICR.U;
278
279 icr.B.EDIP = config->interruptConfig.dataFrameInterruptNode;
280 icr.B.EDIE = config->interruptConfig.dataFrameInterrupt;
281 icr.B.ECIP = config->interruptConfig.commandFrameInterruptNode;
282 icr.B.ECIE = config->interruptConfig.commandFrameInterrupt;
283 icr.B.TFIP = config->interruptConfig.timeFrameInterruptNode;
284 icr.B.TFIE = config->interruptConfig.timeFrameInterrupt;
285 icr.B.RDIP = config->interruptConfig.receiveDataInterruptNode;
286 icr.B.RDIE = config->interruptConfig.receiveDataInterrupt;
287
288 /* additional interrupt configured in USCE for Upstream Interrupt node SR4 */
289
290 Ifx_MSC_USCE usce;
291
292 /* Read the USCE register content */
293 usce.U = mscSfr->USCE.U;
294
295 if (config->interruptConfig.upstreamTimeoutInterruptNode == IfxMsc_UpstreamTimeoutInterruptNode_SR4)
296 {
297 usce.B.USTOIP = 0;
298 usce.B.UTASR = 1;
299 }
300 else
301 {
302 usce.B.USTOIP = config->interruptConfig.upstreamTimeoutInterruptNode;
303 usce.B.UTASR = 0;
304 }
305
306 usce.B.USTOEN = config->interruptConfig.upstreamTimeoutInterrupt;
307
308 mscSfr->USCE.U = usce.U;
309
310 mscSfr->ICR.U = icr.U;
311
312 /* ABRA */
313 Ifx_MSC_ABC abc;
314 abc.U = mscSfr->ABC.U;
315
316 if (config->interruptConfig.overflowInterruptNode == IfxMsc_OverflowInterruptNode_SR4)
317 {
318 abc.B.OIP = 0;
319 abc.B.OASR = 1;
320 }
321 else
322 {
323 abc.B.OIP = config->interruptConfig.overflowInterruptNode;
324 abc.B.OASR = 0;
325 }
326
327 abc.B.OIE = config->interruptConfig.overflowInterrupt;
328
329 if (config->interruptConfig.underflowInterruptNode == IfxMsc_UnderflowInterruptNode_SR4)
330 {
331 abc.B.UIP = 0;
332 abc.B.UASR = 1;
333 }
334 else
335 {
336 abc.B.UIP = config->interruptConfig.underflowInterruptNode;
337 abc.B.UASR = 0;
338 }
339
340 abc.B.UIE = config->interruptConfig.underflowInterrupt;
341
342 mscSfr->ABC.U = abc.U;
343 }
344
345 /* MSC inputs/outputs signal polarities */
346 {
347 Ifx_MSC_OCR ocr;
348
349 /* Read the OCR register content */
350 ocr.U = mscSfr->OCR.U;
351 /* FCL is activated during active phases or always */
352 ocr.B.CLKCTRL = config->outputControlConfig.fclClockControl;
353 /* SDI Line Polarity - SDI and SI */
354 ocr.B.ILP = config->outputControlConfig.sdiLinePolarity;
355 /* Chip Selection Lines Polarity - EN[0:3, ENL, ENH and ENC */
356 ocr.B.CSLP = config->outputControlConfig.cslpPolarity;
357 /* SOP Line Polarity - SOP, SON, SO */
358 ocr.B.SLP = config->outputControlConfig.sopPolarity;
359 /* FCLP Line Polarity - FCLP, FCLN and FCL */
360 ocr.B.CLP = config->outputControlConfig.fclpPolarity;
361
362 mscSfr->OCR.U = ocr.U;
363 }
364 /* Chip Enable Selection for ENL */
365 IfxMsc_setDataLowTarget(mscSfr, config->target[0]);
366
367 /* Chip Enable Selection for ENH */
368 IfxMsc_setDataHighTarget(mscSfr, config->target[0]);
369
370 /* Chip Enable Selection for ENC */
371 IfxMsc_setCommandTarget(mscSfr, IfxMsc_Msc_getTarget(msc, IfxMsc_Msc_Target_low));
372
373 /* Configure the Injection Enable and number of SRHE, SRLE Bits transmitted and Extension Enable */
374 {
375 Ifx_MSC_DSCE dsce;
376
377 /* Read the DSCE register content */
378 dsce.U = mscSfr->DSCE.U;
379 /* Command-Data-Command in Data Repetition Mode */
380 dsce.B.CDCM = config->downstreamConfig.commandDataCommandReceptionMode;
381 /* Injection Position of the Pin 1 Signal */
382 dsce.B.INJPOSP1 = config->downstreamConfig.injectionPositionPin1;
383 /* Injection Enable of the Pin 1 Signal */
384 dsce.B.INJENP1 = config->downstreamConfig.externalSignalInjectionPin1;
385 /* Injection Position of the Pin 0 Signal */
386 dsce.B.INJPOSP0 = config->downstreamConfig.injectionPositionPin0;
387 /* Injection Enable of the Pin 0 Signal */
388 dsce.B.INJENP0 = config->downstreamConfig.externalSignalInjectionPin0;
389
390 mscSfr->DSCE.U = dsce.U;
391 }
392
393 /* If enabled configure extension registers */
394 if (config->downstreamExtensionConfig.extension == IfxMsc_Extension_enabled)
395 {
396 IfxMsc_Msc_initializeDataExtension(msc, config);
397 }
398
399 /* If enabled, configure ABRA block */
400 if (config->abraConfig.abraBlockBypass != IfxMsc_AsynchronousBlock_bypassed)
401 {
402 IfxMsc_Msc_initializeAbra(msc, config);
403 }
404
405 /* If enabled, configure command extension mode */
406 if (config->commandExtensionConfig.extension == IfxMsc_Extension_enabled)
407 {
408 IfxMsc_Msc_initializeCommandExtension(msc, config);
409 }
410 }
411
412
413 void IfxMsc_Msc_initModuleConfig(IfxMsc_Msc_Config *config, Ifx_MSC *msc)
414 {
415 const IfxMsc_Msc_Config defaultConfig = {
416 .msc = NULL_PTR,
417 .clockConfig = {
418 .baudrate = 3125000,
419 .dividerMode = IfxMsc_DividerMode_normal,
420 .step = 0
421 },
422 .upstreamConfig = {
423 .upstreamChannelFrameType = IfxMsc_UpstreamChannelFrameType_12bit,
424 .upstreamChannelReceivingRate = IfxMsc_UpstreamChannelReceivingRate_16,
425 .parity = IfxMsc_Parity_even,
426 .serviceRequestDelay = IfxMsc_ServiceRequestDelay_noDelay,
427 .upstreamTimeoutPrescaler = IfxMsc_UpstreamTimeoutPrescaler_32768,
428 .upstreamTimeoutValue = IfxMsc_UpstreamTimeoutValue_16
429 },
430 .interruptConfig = {
431 .dataFrameInterruptNode = IfxMsc_DataFrameInterruptNode_SR0,
432 .dataFrameInterrupt = IfxMsc_DataFrameInterrupt_disabled,
433 .commandFrameInterruptNode = IfxMsc_CommandFrameInterruptNode_SR0,
434 .commandFrameInterrupt = IfxMsc_CommandFrameInterrupt_disabled,
435 .timeFrameInterruptNode = IfxMsc_TimeFrameInterruptNode_SR0,
436 .timeFrameInterrupt = IfxMsc_TimeFrameInterrupt_disabled,
437 .receiveDataInterruptNode = IfxMsc_ReceiveDataInterruptNode_SR0,
438 .receiveDataInterrupt = IfxMsc_ReceiveDataInterrupt_disabled,
439 .upstreamTimeoutInterruptNode = IfxMsc_UpstreamTimeoutInterruptNode_SR0,
440 .upstreamTimeoutInterrupt = IfxMsc_UpstreamTimeoutInterrupt_disabled,
441 .overflowInterruptNode = IfxMsc_OverflowInterruptNode_SR0,
442 .overflowInterrupt = IfxMsc_OverflowInterrupt_disabled,
443 .underflowInterruptNode = IfxMsc_UnderflowInterruptNode_SR0,
444 .underflowInterrupt = IfxMsc_UnderflowInterrupt_disabled
445 },
446 .outputControlConfig = {
447 .fclpPolarity = IfxMsc_FclLinePolarity_nonInverted,
448 .sopPolarity = IfxMsc_SoLinePolarity_nonInverted,
449 .cslpPolarity = IfxMsc_ChipSelectActiveState_low,
450 .sdiLinePolarity = IfxMsc_SdiLinePolarity_likeSi,
451 .fclClockControl = IfxMsc_FclClockControlEnabled_activePhaseOnly
452 },
453 .downstreamConfig = {
454 .transmissionMode = IfxMsc_TransmissionMode_triggered,
455 .srlDataFrameLength = IfxMsc_DataFrameLength_16,
456 .srhDataFrameLength = IfxMsc_DataFrameLength_16,
457 .srlActivePhaseSelection = IfxMsc_ActivePhaseSelection_none,
458 .srhActivePhaseSelection = IfxMsc_ActivePhaseSelection_none,
459 .commandFrameLength = IfxMsc_CommandFrameLength_32,
460 .dataFramePassivePhaseLength = IfxMsc_DataFramePassivePhaseLength_2,
461 .passiveTimeFrameCount = IfxMsc_PassiveTimeFrameCount_0,
462 .externalSignalInjectionPin0 = IfxMsc_ExternalSignalInjection_disabled,
463 .injectionPositionPin0 = IfxMsc_ExternalBitInjectionPosition_0,
464 .externalSignalInjectionPin1 = IfxMsc_ExternalSignalInjection_disabled,
465 .injectionPositionPin1 = IfxMsc_ExternalBitInjectionPosition_0,
466 .commandDataCommandReceptionMode = IfxMsc_CommandDataCommandRepetitionMode_disabled,
467 .downstreamDataSourcesLow = 0,
468 .downstreamDataSourcesHigh = 0,
469 .emergencyStopEnableBits = 0
470 },
471 .downstreamExtensionConfig = {
472 .extension = IfxMsc_Extension_disabled,
473 .srlBitsShiftedAtDataFramesExtension = IfxMsc_MsbBitDataExtension_notPresent,
474 .srhBitsShiftedAtDataFramesExtension = IfxMsc_MsbBitDataExtension_notPresent,
475 .downstreamExtensionDataSourcesLow = 0,
476 .downstreamExtensionDataSourcesHigh = 0,
477 .emergencyStopExtensionEnableBits = 0,
478 .dataFrameExtensionPassivePhaseLength = IfxMsc_DataFrameExtensionPassivePhaseLength_0,
479 .controlFrameExtensionPassivePhaseLength = IfxMsc_ControlFrameExtensionPassivePhaseLength_0,
480 .nDividerDownstream = IfxMsc_NDividerDownstream_1
481 },
482 .abraConfig = {
483 .abraDownstreamBlockBaudrate = 500000,
484 .lowPhaseOfShiftClock = IfxMsc_ShiftClockPhaseDuration_1,
485 .highPhaseOfShiftClock = IfxMsc_ShiftClockPhaseDuration_1,
486 .clockSelectAbra = IfxMsc_ClockSelect_fper,
487 .nDividerAbra = IfxMsc_NDividerAbra_1,
488 .abraBlockBypass = IfxMsc_AsynchronousBlock_bypassed
489 },
490 .io = {
491 .fclp = {
492 .pin = NULL_PTR,
493 .mode = IfxPort_OutputMode_pushPull
494 },
495 .fcln = {
496 .pin = NULL_PTR,
497 .mode = IfxPort_OutputMode_pushPull
498 },
499 .sop = {
500 .pin = NULL_PTR,
501 .mode = IfxPort_OutputMode_pushPull
502 },
503 .son = {
504 .pin = NULL_PTR,
505 .mode = IfxPort_OutputMode_pushPull
506 },
507 .en0 = {
508 .pin = NULL_PTR,
509 .mode = IfxPort_OutputMode_pushPull
510 },
511 .en1 = {
512 .pin = NULL_PTR,
513 .mode = IfxPort_OutputMode_pushPull
514 },
515 .en2 = {
516 .pin = NULL_PTR,
517 .mode = IfxPort_OutputMode_pushPull
518 },
519 .en3 = {
520 .pin = NULL_PTR,
521 .mode = IfxPort_OutputMode_pushPull
522 },
523 .sdi = {
524 .pin = NULL_PTR,
525 .mode = IfxPort_InputMode_pullUp
526 },
527 .inj0 = {
528 .pin = NULL_PTR,
529 .mode = IfxPort_InputMode_pullUp
530 },
531 .inj1 = {
532 .pin = NULL_PTR,
533 .mode = IfxPort_InputMode_pullUp
534 },
535 .pinDriver = IfxPort_PadDriver_cmosAutomotiveSpeed3
536 },
537 .commandExtensionConfig = {
538 .extension = IfxMsc_Extension_disabled,
539 .commandFrameLength = IfxMsc_CommandFrameLength_32,
540 .commandFramePassivePhaseLength = IfxMsc_ControlFrameExtensionPassivePhaseLength_0,
541 .srlActivePhaseSelection = IfxMsc_ActivePhaseSelection_none,
542 .srhActivePhaseSelection = IfxMsc_ActivePhaseSelection_none,
543 .srlDataFrameLength = IfxMsc_DataFrameLength_16,
544 .srhDataFrameLength = IfxMsc_DataFrameLength_16,
545 .srlBitsShiftedAtDataFramesExtension = IfxMsc_MsbBitDataExtension_notPresent,
546 .srhBitsShiftedAtDataFramesExtension = IfxMsc_MsbBitDataExtension_notPresent,
547 .fastMode = IfxMsc_FastMode_disabled,
548 .nDividerDownstream = IfxMsc_NDividerDownstream_1
549 }
550 };
551
552 /* Default Configuration */
553 *config = defaultConfig;
554
555 /* take over module pointer */
556 config->msc = msc;
557 }
558
559
560 void IfxMsc_Msc_initializeAbra(IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
561 {
562 Ifx_MSC *mscSfr = msc->msc;
563
564 /* N Divider Downstream */
565 mscSfr->DSTE.B.NDD =
566 IfxMsc_downstreamAbraBaudCalculator(config->abraConfig.abraDownstreamBlockBaudrate);
567
568 /* Configure Asynchronous block */
569 {
570 Ifx_MSC_ABC abc;
571
572 /* Read the ABC register content */
573 abc.U = mscSfr->ABC.U;
574 /* Asynchronous Block Bypass */
575 abc.B.ABB = config->abraConfig.abraBlockBypass;
576 /* Clock Select */
577 abc.B.CLKSEL = config->abraConfig.clockSelectAbra;
578 /* N Divider ABRA */
579 abc.B.NDA = config->abraConfig.nDividerAbra;
580 /* Duration of the High Phase of the Shift Clock */
581 abc.B.HIGH = config->abraConfig.highPhaseOfShiftClock;
582 /* Duration of the Low Phase of the Shift Clock */
583 abc.B.LOW = config->abraConfig.lowPhaseOfShiftClock;
584
585 mscSfr->ABC.U = abc.U;
586 }
587 }
588
589
590 void IfxMsc_Msc_initializeDataExtension(IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
591 {
592 Ifx_MSC *mscSfr = msc->msc;
593
594 /* Configure the number of SRHE, SRLE Bits transmitted and Extension Enable */
595 {
596 Ifx_MSC_DSCE dsce;
597
598 /* Read the DSCE register content */
599 dsce.U = mscSfr->DSCE.U;
600 /* Extension Enable */
601 dsce.B.EXEN = config->downstreamExtensionConfig.extension;
602 /* Configure the number of SRLE Bits transmitted */
603 dsce.B.NDBLE = config->downstreamExtensionConfig.srlBitsShiftedAtDataFramesExtension;
604 /* Configure the number of SRHE Bits transmitted */
605 dsce.B.NDBHE = config->downstreamExtensionConfig.srhBitsShiftedAtDataFramesExtension;
606
607 mscSfr->DSCE.U = dsce.U;
608 }
609
610 /* Select Source for SRLE */
611 mscSfr->DSDSLE.U = config->downstreamExtensionConfig.downstreamExtensionDataSourcesLow;
612
613 /* Select Source for SRHE */
614 mscSfr->DSDSHE.U = config->downstreamExtensionConfig.downstreamExtensionDataSourcesHigh;
615
616 /* Emergency Stop Enable for Bit */
617 mscSfr->ESRE.U = config->downstreamExtensionConfig.emergencyStopExtensionEnableBits;
618
619 /* Passive Phase Length at Data and Control Frames Extension */
620 {
621 Ifx_MSC_DSTE dste;
622
623 /* Read the DSTE register content */
624 dste.U = mscSfr->DSTE.U;
625 /* Passive Phase Length at Control Frames Extension */
626 dste.B.PPCE = config->downstreamExtensionConfig.controlFrameExtensionPassivePhaseLength;
627 /* Passive Phase Length at Data Frames Extension */
628 dste.B.PPDE = config->downstreamExtensionConfig.dataFrameExtensionPassivePhaseLength;
629 /* N Divider for Downstream */
630 dste.B.NDD = config->downstreamExtensionConfig.nDividerDownstream;
631
632 mscSfr->DSTE.U = dste.U;
633 }
634 }
635
636
637 uint32 IfxMsc_Msc_receiveData(IfxMsc_Msc *msc, uint8 upstreamIdx)
638 {
639 Ifx_MSC *mscSfr = msc->msc;
640 uint16 data = 0;
641
642 /* Check for valid flag */
643 if (!IfxMsc_getUpstreamValidFlag(mscSfr, upstreamIdx))
644 {
645 return (uint32)0xFFFFFFFF;
646 }
647
648 /* Clear the flag */
649 IfxMsc_clearUpstreamValidFlag(mscSfr, upstreamIdx);
650
651 /* Read the data */
652 data = IfxMsc_getData(mscSfr, upstreamIdx);
653
654 return data;
655 }
656
657
658 void IfxMsc_Msc_sendCommand(IfxMsc_Msc *msc, uint32 command)
659 {
660 Ifx_MSC *mscSfr = msc->msc;
661
662 /* Downstream command */
663 mscSfr->DC.U = command;
664 }
665
666
667 void IfxMsc_Msc_sendData(IfxMsc_Msc *msc, uint16 dataLow, uint16 dataHigh)
668 {
669 Ifx_MSC *mscSfr = msc->msc;
670
671 {
672 Ifx_MSC_DD dd;
673 dd.B.DDL = dataLow;
674 dd.B.DDH = dataHigh;
675
676 /* Downstream Data */
677 mscSfr->DD.U = dd.U;
678 }
679
680 /* Send data */
681 mscSfr->ISC.B.SDP = 1;
682 }
683
684
685 void IfxMsc_Msc_sendDataExtension(IfxMsc_Msc *msc, uint32 data, uint32 dataExtension)
686 {
687 Ifx_MSC *mscSfr = msc->msc;
688
689 /* Downstream Data (mirror) + extension */
690 mscSfr->DDE.U = dataExtension;
691 mscSfr->DDM.U = data;
692
693 /* Send data */
694 mscSfr->ISC.B.SDP = 1;
695 }
696
697
698 void IfxMsc_Msc_sendDataHigh(IfxMsc_Msc *msc, uint16 data)
699 {
700 Ifx_MSC *mscSfr = msc->msc;
701
702 /* Downstream Data High only */
703 mscSfr->DD.B.DDH = data;
704
705 /* Send data */
706 mscSfr->ISC.B.SDP = 1;
707 }
708
709
710 void IfxMsc_Msc_sendDataLow(IfxMsc_Msc *msc, uint16 data)
711 {
712 Ifx_MSC *mscSfr = msc->msc;
713
714 /* Downstream Data Low only */
715 mscSfr->DD.B.DDL = data;
716
717 /* Send data */
718 mscSfr->ISC.B.SDP = 1;
719 }
720
721
722 void IfxMsc_Msc_setCommandTarget(IfxMsc_Msc *msc, IfxMsc_Target enX)
723 {
724 Ifx_MSC *mscSfr = msc->msc;
725
726 IfxMsc_setCommandTarget(mscSfr, enX);
727 }
728
729
730 void IfxMsc_Msc_setDataTarget(IfxMsc_Msc *msc, IfxMsc_Target enXHigh, IfxMsc_Target enXLow)
731 {
732 Ifx_MSC *mscSfr = msc->msc;
733
734 /* Set data low target */
735 IfxMsc_setDataLowTarget(mscSfr, enXLow);
736 /* Set data high target */
737 IfxMsc_setDataHighTarget(mscSfr, enXHigh);
738 }
739
740
741 void IfxMsc_Msc_initializeCommandExtension(IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
742 {
743 Ifx_MSC *mscSfr = msc->msc;
744 /*Configure the command related settings*/
745
746 Ifx_MSC_DSCE dsce;
747 Ifx_MSC_DSC dsc;
748 Ifx_MSC_DSTE dste;
749
750 /* Read the DSTE & DSC register contents */
751 dste.U = mscSfr->DSTE.U;
752 dsc.U = mscSfr->DSC.U;
753 dsce.U = mscSfr->DSCE.U;
754
755 /* Extension Enable */
756 dste.B.UL1 = 1; //Unlocking for writing into CX register.Write of 1 to UL1 & CX must be done in the same cycle.
757 dste.B.CX = config->commandExtensionConfig.extension;
758 dste.B.FM = config->commandExtensionConfig.fastMode;
759
760 /* Configure the command passive phase length */
761
762 if (config->commandExtensionConfig.commandFramePassivePhaseLength > IfxMsc_ControlFrameExtensionPassivePhaseLength_63)
763 {
764 // MSB extension
765 dste.B.PPCEM = 1;
766 //Logic behind this is that passive phase length(PPL) = [PPCEM PPCE]+2.So the value [PPCEM PPCE] = PPL - 2.When PPCEM = 1,the equation is 64 + PPCE = PPL -2 => PPCE = PPL - 66
767 //Another way to look at it is that PPCE_max is 65...add one and MSB(PPCEM)becomes 1.So next whatever we incrase will start from 0 in PPCE.So PPCE = PPL - 66
768 dste.B.PPCE = config->commandExtensionConfig.commandFramePassivePhaseLength - 66;
769 }
770 else
771 {
772 dste.B.PPCE = config->commandExtensionConfig.commandFramePassivePhaseLength;
773 }
774
775 /* Data Frame related configurations*/
776
777 //SRH Selection Bit
778 dsc.B.ENSELH = config->commandExtensionConfig.srhActivePhaseSelection;
779 //SRL Selection Bit
780 dsc.B.ENSELL = config->commandExtensionConfig.srlActivePhaseSelection;
781 //Number of SRH Bits transmitted
782 dsc.B.NDBH = config->commandExtensionConfig.srhDataFrameLength;
783 //Number of SRL Bits transmitted
784 dsc.B.NDBL = config->commandExtensionConfig.srlDataFrameLength;
785 //Extension of number of SRL Bits transmitted in EXEN mode
786 dsce.B.NDBLE = config->commandExtensionConfig.srlBitsShiftedAtDataFramesExtension;
787 //Number of SRL Bits transmitted in EXEN mode
788 dsce.B.NDBHE = config->commandExtensionConfig.srlBitsShiftedAtDataFramesExtension;
789
790 //N Divider for Downstream
791 dste.B.NDD = config->commandExtensionConfig.nDividerDownstream;
792
793 mscSfr->DSC.U = dsc.U;
794 mscSfr->DSCE.U = dsce.U;
795 mscSfr->DSTE.U = dste.U;
796 }
IfxMsc_Msc_sendDataLow
void IfxMsc_Msc_sendDataLow(IfxMsc_Msc *msc, uint16 data)
send high downstream data
Definition: IfxMsc_Msc.c:710
IfxMsc_Msc_Target
IfxMsc_Msc_Target
Msc Instance Number.
Definition: IfxMsc_Msc.h:197
IfxMsc_Msc_UpstreamStatusConfig::upstreamTimeoutValue
IfxMsc_UpstreamTimeoutValue upstreamTimeoutValue
Specifies the Upstream Timeout Value.
Definition: IfxMsc_Msc.h:396
IfxMsc_Sdi_In
SDI pin mapping structure.
Definition: IfxMsc_PinMap.h:64
IfxMsc_Msc_DownstreamControlConfig::passiveTimeFrameCount
IfxMsc_PassiveTimeFrameCount passiveTimeFrameCount
Specifies the Number of Passive Time Frames.
Definition: IfxMsc_Msc.h:312
IfxMsc_Msc_Abra::clockSelectAbra
IfxMsc_ClockSelect clockSelectAbra
Specifies the clock select for ABRA.
Definition: IfxMsc_Msc.h:270
IfxMsc_DataFrameLength_16
SRx[15:0] Shifted.
Definition: IfxMsc.h:377
IfxMsc_Msc_DownstreamControlConfig::srhActivePhaseSelection
IfxMsc_ActivePhaseSelection srhActivePhaseSelection
Specifies the Enable SRL active phase selection bit.
Definition: IfxMsc_Msc.h:309
IfxMsc_Msc_Io::fclp
IfxMsc_Msc_fclp fclp
Definition: IfxMsc_Msc.h:362
IfxMsc_Msc_InterruptConfig::timeFrameInterrupt
IfxMsc_TimeFrameInterrupt timeFrameInterrupt
Specifies the Time Frame Interrupt Mode.
Definition: IfxMsc_Msc.h:347
IfxMsc_Msc_OutputControlConfig::sopPolarity
IfxMsc_SoLinePolarity sopPolarity
Specifies the SLP Polarity.
Definition: IfxMsc_Msc.h:381
IfxMsc_Msc_Io::en1
IfxMsc_Msc_en en1
Definition: IfxMsc_Msc.h:367
IfxMsc_Msc_setCommandTarget
void IfxMsc_Msc_setCommandTarget(IfxMsc_Msc *msc, IfxMsc_Target enX)
set the command for target
Definition: IfxMsc_Msc.c:722
IfxMsc_Msc_DownstreamControlConfig::externalSignalInjectionPin0
IfxMsc_ExternalSignalInjection externalSignalInjectionPin0
Specifies the Injection Enable Pin 0.
Definition: IfxMsc_Msc.h:313
IfxMsc_Msc_UpstreamStatusConfig::serviceRequestDelay
IfxMsc_ServiceRequestDelay serviceRequestDelay
Specifies the Service Request Delay.
Definition: IfxMsc_Msc.h:394
IfxMsc_ClockSelect_fper
f_PER is the clock source for the ABRA block
Definition: IfxMsc.h:117
IfxPort_OutputMode_pushPull
Definition: IfxPort.h:142
IfxMsc_TimeFrameInterruptNode_SR0
Service request output SR0 selected.
Definition: IfxMsc.h:818
IfxMsc_OverflowInterruptNode_SR0
Service request output SR0 selected.
Definition: IfxMsc.h:640
IfxMsc_downstreamAbraBaudCalculator
uint32 IfxMsc_downstreamAbraBaudCalculator(uint32 baud)
Get the NDD value for the supplied baud rate when when ABRA block is enabled.
Definition: IfxMsc.c:86
IfxMsc_Msc_CommandExtensionConfig::commandFramePassivePhaseLength
IfxMsc_ControlFrameExtensionPassivePhaseLength commandFramePassivePhaseLength
Definition: IfxMsc_Msc.h:290
IfxMsc_setDataHighTarget
IFX_INLINE void IfxMsc_setDataHighTarget(Ifx_MSC *msc, IfxMsc_Target enX)
Select the target for data high phase.
Definition: IfxMsc.h:1729
IfxMsc_Msc
MSC base address data Structure.
Definition: IfxMsc_Msc.h:405
IfxMsc_Msc_fclp::pin
IfxMsc_Fclp_Out * pin
Definition: IfxMsc_Msc.h:225
IfxMsc_Msc_Target_low
MSC Target Low.
Definition: IfxMsc_Msc.h:199
IfxMsc_Msc_en::pin
IfxMsc_En_Out * pin
Definition: IfxMsc_Msc.h:213
IfxMsc_Msc_initializeCommandExtension
void IfxMsc_Msc_initializeCommandExtension(IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
Definition: IfxMsc_Msc.c:741
IfxMsc_Msc_DownstreamControlExtensionConfig::downstreamExtensionDataSourcesLow
uint32 downstreamExtensionDataSourcesLow
Specifies the Downstream Select Data Source Low Extension.
Definition: IfxMsc_Msc.h:330
IfxMsc_Msc_DownstreamControlConfig::dataFramePassivePhaseLength
IfxMsc_DataFramePassivePhaseLength dataFramePassivePhaseLength
Specifies the Passive Phase Length at Data Frames.
Definition: IfxMsc_Msc.h:311
IfxMsc_SdiLinePolarity_likeSi
SDI and SI signal polarities are identical.
Definition: IfxMsc.h:706
IfxMsc_TimeFrameInterrupt_disabled
Interrupt generation disabled.
Definition: IfxMsc.h:809
IfxMsc_DataFramePassivePhaseLength_2
Passive phase length is 2 tFCL.
Definition: IfxMsc.h:385
IfxMsc_Msc_Abra::highPhaseOfShiftClock
IfxMsc_ShiftClockPhaseDuration highPhaseOfShiftClock
Specifies High phase of shift clock.
Definition: IfxMsc_Msc.h:269
IfxMsc_Msc_Io::en3
IfxMsc_Msc_en en3
Definition: IfxMsc_Msc.h:369
IfxMsc_NDividerDownstream_1
division ratio is 1
Definition: IfxMsc.h:608
IfxMsc_Msc_InterruptConfig::receiveDataInterrupt
IfxMsc_ReceiveDataInterrupt receiveDataInterrupt
Specifies the Receive Interrupt Mode.
Definition: IfxMsc_Msc.h:349
IfxMsc_ControlFrameExtensionPassivePhaseLength_63
Length of Command frames passive phase is 65.
Definition: IfxMsc.h:257
IfxMsc_ExternalSignalInjection_disabled
Disables the external signal injection in a data frame.
Definition: IfxMsc.h:520
IfxMsc_Msc_OutputControlConfig::fclClockControl
IfxMsc_FclClockControlEnabled fclClockControl
Specifies the CLKCTRL Polarity.
Definition: IfxMsc_Msc.h:384
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxMsc_setCommandTarget
IFX_INLINE void IfxMsc_setCommandTarget(Ifx_MSC *msc, IfxMsc_Target enX)
Select the target for command phase.
Definition: IfxMsc.h:1722
IfxMsc_UpstreamChannelFrameType_12bit
12-bit Upstream frame selected
Definition: IfxMsc.h:859
IfxMsc_ControlFrameExtensionPassivePhaseLength_0
Length of Command frames passive phase is 2.
Definition: IfxMsc.h:194
IfxMsc_Msc_DownstreamControlExtensionConfig::downstreamExtensionDataSourcesHigh
uint32 downstreamExtensionDataSourcesHigh
Specifies the Downstream Select Data Source High Extension.
Definition: IfxMsc_Msc.h:331
IfxMsc_Msc_sdi::mode
IfxPort_InputMode mode
Definition: IfxMsc_Msc.h:244
IfxMsc_Msc_sendDataHigh
void IfxMsc_Msc_sendDataHigh(IfxMsc_Msc *msc, uint16 data)
send high downstream data
Definition: IfxMsc_Msc.c:698
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxMsc_setDataLowTarget
IFX_INLINE void IfxMsc_setDataLowTarget(Ifx_MSC *msc, IfxMsc_Target enX)
Select the target for data low phase.
Definition: IfxMsc.h:1736
IfxMsc_Msc_InterruptConfig::underflowInterrupt
IfxMsc_UnderflowInterrupt underflowInterrupt
Specifies the ABRA Underflow Interrupt Mode.
Definition: IfxMsc_Msc.h:355
IfxMsc_CommandDataCommandRepetitionMode_disabled
Disables the automatic insertion of data.
Definition: IfxMsc.h:125
IfxMsc_ActivePhaseSelection_none
No selection bit inserted.
Definition: IfxMsc.h:89
IfxMsc_OverflowInterruptNode_SR4
Service request output SR4 selected.
Definition: IfxMsc.h:644
IfxMsc_FclLinePolarity_nonInverted
FCLP and FCL signal polarity is identical.
Definition: IfxMsc.h:546
IfxMsc_Msc_DownstreamControlConfig::srlActivePhaseSelection
IfxMsc_ActivePhaseSelection srlActivePhaseSelection
Specifies the Enable SRL active phase selection bit.
Definition: IfxMsc_Msc.h:308
IfxMsc_initSopPin
IFX_INLINE void IfxMsc_initSopPin(const IfxMsc_Sop_Out *sop, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a SOP output.
Definition: IfxMsc.h:1694
IfxMsc_DataFrameInterruptNode_SR0
Service request output SR0 selected.
Definition: IfxMsc.h:350
IfxMsc_Msc_Config::abraConfig
IfxMsc_Msc_Abra abraConfig
Specifies the ABRA configuration.
Definition: IfxMsc_Msc.h:421
IfxMsc_AsynchronousBlock_bypassed
Asynchronous block and the n-divider of the MSC downstream path are bypassed and are disabled...
Definition: IfxMsc.h:98
IfxMsc_Msc_Io::pinDriver
IfxPort_PadDriver pinDriver
Definition: IfxMsc_Msc.h:373
IfxMsc_Msc_fcln::pin
IfxMsc_Fcln_Out * pin
Definition: IfxMsc_Msc.h:219
IfxMsc_UpstreamTimeoutValue_16
Upstream timeout value for the N-Divider.
Definition: IfxMsc.h:942
IfxMsc_Msc_CommandExtensionConfig::fastMode
IfxMsc_FastMode fastMode
To enable or disable Fast Mode.
Definition: IfxMsc_Msc.h:297
IfxMsc_PassiveTimeFrameCount_0
No Passive time frames inserted.
Definition: IfxMsc.h:661
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxMsc_Msc_UpstreamStatusConfig::upstreamTimeoutPrescaler
IfxMsc_UpstreamTimeoutPrescaler upstreamTimeoutPrescaler
Specifies the Upstream Timeout Prescaler.
Definition: IfxMsc_Msc.h:395
IfxMsc_initSdiPin
IFX_INLINE void IfxMsc_initSdiPin(const IfxMsc_Sdi_In *sdi, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a SDI input.
Definition: IfxMsc.h:1673
IfxMsc_Msc_sendCommand
void IfxMsc_Msc_sendCommand(IfxMsc_Msc *msc, uint32 command)
send downstream command
Definition: IfxMsc_Msc.c:658
IfxMsc_ChipSelectActiveState_low
EN[3:0] and ENL,ENH,ENC polarities are inverted.
Definition: IfxMsc.h:108
IfxMsc_Msc_sdi::pin
IfxMsc_Sdi_In * pin
Definition: IfxMsc_Msc.h:243
IfxMsc_Msc_initModule
void IfxMsc_Msc_initModule(IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
initialize the MSC module
Definition: IfxMsc_Msc.c:78
IfxMsc_initInjPin
IFX_INLINE void IfxMsc_initInjPin(const IfxMsc_Inj_In *inj, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a INJ input.
Definition: IfxMsc.h:1663
IfxMsc_Msc_deInitModule
void IfxMsc_Msc_deInitModule(IfxMsc_Msc *msc)
de-initialize MSC module
Definition: IfxMsc_Msc.c:54
IfxMsc_initFclnPin
IFX_INLINE void IfxMsc_initFclnPin(const IfxMsc_Fcln_Out *fcln, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a FCLN output.
Definition: IfxMsc.h:1643
IfxMsc_Msc_setDataTarget
void IfxMsc_Msc_setDataTarget(IfxMsc_Msc *msc, IfxMsc_Target enXHigh, IfxMsc_Target enXLow)
set the target data to be transmitted during low and high phase
Definition: IfxMsc_Msc.c:730
IfxMsc_ServiceRequestDelay_noDelay
No Delay.
Definition: IfxMsc.h:730
IfxMsc_Msc_Config::clockConfig
IfxMsc_Msc_Clock clockConfig
Specifies the Clock configuration.
Definition: IfxMsc_Msc.h:415
IfxMsc_Msc_DownstreamControlConfig::externalSignalInjectionPin1
IfxMsc_ExternalSignalInjection externalSignalInjectionPin1
Specifies the Injection Enable Pin 1.
Definition: IfxMsc_Msc.h:315
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxMsc_Msc_getTarget
IfxMsc_Target IfxMsc_Msc_getTarget(IfxMsc_Msc *msc, IfxMsc_Msc_Target target)
get the target during high and low phase
Definition: IfxMsc_Msc.c:60
IfxMsc_Msc_son::pin
IfxMsc_Son_Out * pin
Definition: IfxMsc_Msc.h:249
IfxMsc_Msc_Config::commandExtensionConfig
IfxMsc_Msc_CommandExtensionConfig commandExtensionConfig
Configuration for CX mode.
Definition: IfxMsc_Msc.h:424
IfxMsc_Msc_initializeAbra
void IfxMsc_Msc_initializeAbra(IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
initialize the ABRA block
Definition: IfxMsc_Msc.c:560
IfxMsc_Msc_InterruptConfig::timeFrameInterruptNode
IfxMsc_TimeFrameInterruptNode timeFrameInterruptNode
Specifies the Time Frame Interrupt Node.
Definition: IfxMsc_Msc.h:346
IfxMsc_Msc_DownstreamControlConfig::srlDataFrameLength
IfxMsc_DataFrameLength srlDataFrameLength
Specifies the Number of SRL bits shifted at data frames.
Definition: IfxMsc_Msc.h:306
IfxMsc_getDataHighTarget
IFX_INLINE IfxMsc_Target IfxMsc_getDataHighTarget(Ifx_MSC *msc)
Get the selected target during high phase.
Definition: IfxMsc.h:1569
IfxMsc_Msc_InterruptConfig::overflowInterruptNode
IfxMsc_OverflowInterruptNode overflowInterruptNode
Specifies the ABRA Overflow Interrupt Node.
Definition: IfxMsc_Msc.h:352
IfxMsc_Msc_InterruptConfig::upstreamTimeoutInterrupt
IfxMsc_UpstreamTimeoutInterrupt upstreamTimeoutInterrupt
Specifies the Upstream Timeout Interrupt Mode.
Definition: IfxMsc_Msc.h:351
IfxMsc_Msc_initializeDataExtension
void IfxMsc_Msc_initializeDataExtension(IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
initialize the MSC data extension block for 64bit operation
Definition: IfxMsc_Msc.c:590
IfxMsc_Msc_DownstreamControlConfig::injectionPositionPin1
IfxMsc_ExternalBitInjectionPosition injectionPositionPin1
Specifies the Injection Position Pin 1.
Definition: IfxMsc_Msc.h:316
IfxMsc_Msc_InterruptConfig::underflowInterruptNode
IfxMsc_UnderflowInterruptNode underflowInterruptNode
Specifies the ABRA Underflow Interrupt Node.
Definition: IfxMsc_Msc.h:354
IfxMsc_Msc_DownstreamControlConfig::commandDataCommandReceptionMode
IfxMsc_CommandDataCommandRepetitionMode commandDataCommandReceptionMode
Specifies the Command-Data-Command in Data Repetition Mode.
Definition: IfxMsc_Msc.h:317
IfxPort_PadDriver_cmosAutomotiveSpeed3
Speed grade 3.
Definition: IfxPort.h:155
IfxMsc_DataFrameInterrupt_disabled
Interrupt generation Disable.
Definition: IfxMsc.h:340
IfxMsc_MsbBitDataExtension_notPresent
Additional MSB bit is not present in the extension of the NDBL/NDBH bit field.
Definition: IfxMsc.h:584
IfxMsc_DataFrameExtensionPassivePhaseLength_0
0 Additional MSB bits extension of the PPD bit field
Definition: IfxMsc.h:329
IfxMsc_Msc_InterruptConfig::commandFrameInterruptNode
IfxMsc_CommandFrameInterruptNode commandFrameInterruptNode
Specifies the Command Frame Interrupt Node.
Definition: IfxMsc_Msc.h:344
IfxMsc_Msc_DownstreamControlExtensionConfig::emergencyStopExtensionEnableBits
uint32 emergencyStopExtensionEnableBits
Emergency Stop Extension.
Definition: IfxMsc_Msc.h:332
IfxMsc_Msc_Abra::abraDownstreamBlockBaudrate
uint32 abraDownstreamBlockBaudrate
Specifies ABRA downstream block baud.
Definition: IfxMsc_Msc.h:267
IfxMsc_Msc_Config::upstreamConfig
IfxMsc_Msc_UpstreamStatusConfig upstreamConfig
Specifies the Upstream configuration.
Definition: IfxMsc_Msc.h:416
IfxMsc_Msc_InterruptConfig::overflowInterrupt
IfxMsc_OverflowInterrupt overflowInterrupt
Specifies the ABRA Overflow Interrupt Mode.
Definition: IfxMsc_Msc.h:353
IfxMsc_Son_Out
SON pin mapping structure.
Definition: IfxMsc_PinMap.h:105
IfxMsc_Msc_Io::fcln
IfxMsc_Msc_fcln fcln
Definition: IfxMsc_Msc.h:363
IfxMsc_Msc_OutputControlConfig::cslpPolarity
IfxMsc_ChipSelectActiveState cslpPolarity
Specifies the CSLP Polarity.
Definition: IfxMsc_Msc.h:382
IfxMsc_FclClockControlEnabled_activePhaseOnly
FCL is active during active phases of data or command frames.
Definition: IfxMsc.h:537
IfxMsc_Msc_OutputControlConfig::fclpPolarity
IfxMsc_FclLinePolarity fclpPolarity
Specifies the FCLP Polarity.
Definition: IfxMsc_Msc.h:380
IfxMsc_Msc_Abra::abraBlockBypass
IfxMsc_AsynchronousBlock abraBlockBypass
Specifies ABRA block bypass.
Definition: IfxMsc_Msc.h:272
IfxMsc_Msc_sendData
void IfxMsc_Msc_sendData(IfxMsc_Msc *msc, uint16 dataLow, uint16 dataHigh)
send complete downstream data, both high and low
Definition: IfxMsc_Msc.c:667
IfxMsc_upstreamFractionalBaudCalculator
uint64 IfxMsc_upstreamFractionalBaudCalculator(Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is fractional.
Definition: IfxMsc.c:215
IfxMsc_Msc_Io::sdi
IfxMsc_Msc_sdi sdi
Definition: IfxMsc_Msc.h:370
IfxMsc_UpstreamTimeoutPrescaler_32768
Prescale value 32768 for the upstream time-out limit.
Definition: IfxMsc.h:919
IfxMsc_Msc_InterruptConfig::dataFrameInterrupt
IfxMsc_DataFrameInterrupt dataFrameInterrupt
Specifies the Data Frame Interrupt Mode.
Definition: IfxMsc_Msc.h:343
IfxMsc_Msc_Io::en2
IfxMsc_Msc_en en2
Definition: IfxMsc_Msc.h:368
IfxMsc_Fcln_Out
FCLN pin mapping structure.
Definition: IfxMsc_PinMap.h:89
IfxMsc_Msc_sendDataExtension
void IfxMsc_Msc_sendDataExtension(IfxMsc_Msc *msc, uint32 data, uint32 dataExtension)
Send downstream data extension (64bit)
Definition: IfxMsc_Msc.c:685
IfxMsc_Msc::msc
Ifx_MSC * msc
Specifies the pointer to the MSC registers.
Definition: IfxMsc_Msc.h:407
IfxMsc_Extension_enabled
Enables the extension bit fields.
Definition: IfxMsc.h:441
IfxMsc_Msc_InterruptConfig::upstreamTimeoutInterruptNode
IfxMsc_UpstreamTimeoutInterruptNode upstreamTimeoutInterruptNode
Specifies the Upstream Timeout Interrupt Node.
Definition: IfxMsc_Msc.h:350
IfxMsc_upstreamNormalBaudCalculator
uint32 IfxMsc_upstreamNormalBaudCalculator(Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is normal.
Definition: IfxMsc.c:238
IfxMsc_UnderflowInterrupt_disabled
Disables the path of the Underflow interrupt towards the interrupt node.
Definition: IfxMsc.h:838
IfxMsc_ShiftClockPhaseDuration_1
Duration in periods of f_A is 1.
Definition: IfxMsc.h:739
IfxMsc_Msc_InterruptConfig::dataFrameInterruptNode
IfxMsc_DataFrameInterruptNode dataFrameInterruptNode
Specifies the Data Frame Interrupt Node.
Definition: IfxMsc_Msc.h:342
IfxMsc_En_Out
EN pin mapping structure.
Definition: IfxMsc_PinMap.h:72
IfxMsc_HardwareClock_enabled
Hardware clock enable.
Definition: IfxMsc.h:555
IfxMsc_Msc_Clock::dividerMode
IfxMsc_DividerMode dividerMode
Specifies divided clock properties.
Definition: IfxMsc_Msc.h:280
IfxMsc_Msc_DownstreamControlConfig::downstreamDataSourcesHigh
uint32 downstreamDataSourcesHigh
Specifies the Downstream Data Source selections High.
Definition: IfxMsc_Msc.h:319
IfxMsc_initFclpPin
IFX_INLINE void IfxMsc_initFclpPin(const IfxMsc_Fclp_Out *fclp, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a FCLP output.
Definition: IfxMsc.h:1653
IfxMsc_Msc_Config::downstreamExtensionConfig
IfxMsc_Msc_DownstreamControlExtensionConfig downstreamExtensionConfig
Specifies the Downstream Extension configuration.
Definition: IfxMsc_Msc.h:420
IfxMsc_OverflowInterrupt_disabled
Disables the path of the overflow interrupt towards the interrupt node.
Definition: IfxMsc.h:631
IfxMsc_Msc_DownstreamControlExtensionConfig::nDividerDownstream
IfxMsc_NDividerDownstream nDividerDownstream
Specifies the division ratio for downstream generator clock.
Definition: IfxMsc_Msc.h:335
IfxMsc_Msc_Abra::nDividerAbra
IfxMsc_NDividerAbra nDividerAbra
Specifies the N divider.
Definition: IfxMsc_Msc.h:271
IfxMsc_Msc.h
MSC MSC details.
IfxMsc_ReceiveDataInterruptNode_SR0
Service request output SR0 selected.
Definition: IfxMsc.h:695
IfxMsc_Msc_DownstreamControlConfig::commandFrameLength
IfxMsc_CommandFrameLength commandFrameLength
Specifies the Number of bits shifted at command frames.
Definition: IfxMsc_Msc.h:310
IfxMsc_Msc_Config::downstreamConfig
IfxMsc_Msc_DownstreamControlConfig downstreamConfig
Specifies the Downstream configuration.
Definition: IfxMsc_Msc.h:419
IfxMsc_Msc_fclp::mode
IfxPort_OutputMode mode
Definition: IfxMsc_Msc.h:226
IfxMsc_Fclp_Out
FCLP pin mapping structure.
Definition: IfxMsc_PinMap.h:81
IfxMsc_CommandFrameInterruptNode_SR0
Service request output SR0 selected.
Definition: IfxMsc.h:143
IfxMsc_Msc_InterruptConfig::commandFrameInterrupt
IfxMsc_CommandFrameInterrupt commandFrameInterrupt
Specifies the Command Frame Interrupt Mode.
Definition: IfxMsc_Msc.h:345
IfxMsc_Msc_DownstreamControlExtensionConfig::srlBitsShiftedAtDataFramesExtension
IfxMsc_MsbBitDataExtension srlBitsShiftedAtDataFramesExtension
Specifies the Number of SRLE bits shifted at Data Frames.
Definition: IfxMsc_Msc.h:328
IfxMsc_Msc_receiveData
uint32 IfxMsc_Msc_receiveData(IfxMsc_Msc *msc, uint8 upstreamIdx)
receive upstream data
Definition: IfxMsc_Msc.c:637
IfxMsc_Msc_DownstreamControlConfig::injectionPositionPin0
IfxMsc_ExternalBitInjectionPosition injectionPositionPin0
Specifies the Injection Position Pin 0.
Definition: IfxMsc_Msc.h:314
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxMsc_Msc_UpstreamStatusConfig::upstreamChannelFrameType
IfxMsc_UpstreamChannelFrameType upstreamChannelFrameType
Specifies the Upstream Channel Frame Type.
Definition: IfxMsc_Msc.h:391
IfxMsc_Inj_In
INJ pin mapping structure.
Definition: IfxMsc_PinMap.h:56
IfxMsc_Msc_Config::interruptConfig
IfxMsc_Msc_InterruptConfig interruptConfig
Specifies the Interrupt configuration.
Definition: IfxMsc_Msc.h:417
IfxMsc_Msc_DownstreamControlConfig::emergencyStopEnableBits
uint32 emergencyStopEnableBits
Emergency Stop.
Definition: IfxMsc_Msc.h:320
IfxMsc_Msc_InterruptConfig::receiveDataInterruptNode
IfxMsc_ReceiveDataInterruptNode receiveDataInterruptNode
Specifies the Receive Interrupt Node.
Definition: IfxMsc_Msc.h:348
IfxMsc_Msc_Io::inj0
IfxMsc_Msc_inj0 inj0
Definition: IfxMsc_Msc.h:371
IfxMsc_Msc_initModuleConfig
void IfxMsc_Msc_initModuleConfig(IfxMsc_Msc_Config *config, Ifx_MSC *msc)
initialize the MSC module configuration
Definition: IfxMsc_Msc.c:413
IfxMsc_Msc_DownstreamControlConfig::downstreamDataSourcesLow
uint32 downstreamDataSourcesLow
Specifies the Downstream Data Source selections Low.
Definition: IfxMsc_Msc.h:318
IfxMsc_Msc_UpstreamStatusConfig::upstreamChannelReceivingRate
IfxMsc_UpstreamChannelReceivingRate upstreamChannelReceivingRate
Specifies the Upstream Channel Receiving Rate.
Definition: IfxMsc_Msc.h:392
IfxMsc_UpstreamTimeoutInterrupt_disabled
Upstream Timeout Interrupt Disabled.
Definition: IfxMsc.h:883
IfxMsc_Msc_Abra::lowPhaseOfShiftClock
IfxMsc_ShiftClockPhaseDuration lowPhaseOfShiftClock
Specifies Low phase of shift clock.
Definition: IfxMsc_Msc.h:268
IfxMsc_ExternalBitInjectionPosition_0
Injected external bit is at Position 0 of the data frame.
Definition: IfxMsc.h:449
IfxMsc_Msc_Clock::baudrate
uint32 baudrate
Specifies the baud rate.
Definition: IfxMsc_Msc.h:279
IfxMsc_FastMode_disabled
Disable Fast Mode(DSTE.FM=0).Needs to be cleared with DSTE.UL1=1 in the same cycle.
Definition: IfxMsc.h:528
IfxMsc_Parity_even
Even Parity.
Definition: IfxMsc.h:652
IfxMsc_SoLinePolarity_nonInverted
SOP and SO polarity is identical.
Definition: IfxMsc.h:771
IfxMsc_Msc_DownstreamControlConfig::transmissionMode
IfxMsc_TransmissionMode transmissionMode
Specifies the transmission Mode.
Definition: IfxMsc_Msc.h:305
IfxMsc_Sop_Out
SOP pin mapping structure.
Definition: IfxMsc_PinMap.h:97
IfxMsc_UpstreamChannelReceivingRate_16
Baud rate = f_MSC / 16.
Definition: IfxMsc.h:871
IfxMsc_Msc_sop::pin
IfxMsc_Sop_Out * pin
Definition: IfxMsc_Msc.h:255
IfxMsc_initEnPin
IFX_INLINE void IfxMsc_initEnPin(const IfxMsc_En_Out *en, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a EN output.
Definition: IfxMsc.h:1633
IfxMsc_UnderflowInterruptNode_SR4
Service request output SR4 selected.
Definition: IfxMsc.h:851
IfxMsc_Msc_OutputControlConfig::sdiLinePolarity
IfxMsc_SdiLinePolarity sdiLinePolarity
Specifies the ILP Polarity.
Definition: IfxMsc_Msc.h:383
IfxMsc_getUpstreamValidFlag
IFX_INLINE boolean IfxMsc_getUpstreamValidFlag(Ifx_MSC *msc, uint8 upstreamIdx)
Get the status of the valid flag.
Definition: IfxMsc.h:1623
IfxMsc_Msc_Io
MSC Pin Configuration Structure.
Definition: IfxMsc_Msc.h:360
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxMsc_Msc_Io::en0
IfxMsc_Msc_en en0
Definition: IfxMsc_Msc.h:366
IfxMsc_ReceiveDataInterrupt_disabled
Interrupt generation disabled.
Definition: IfxMsc.h:684
IfxMsc_Extension_disabled
Disables the extension bit fields.
Definition: IfxMsc.h:440
IfxMsc_Msc_inj0::pin
IfxMsc_Inj_In * pin
Definition: IfxMsc_Msc.h:231
IfxMsc_CommandFrameInterrupt_disabled
Interrupt generation disabled.
Definition: IfxMsc.h:134
IfxMsc_Msc_Io::inj1
IfxMsc_Msc_inj1 inj1
Definition: IfxMsc_Msc.h:372
IfxMsc_Msc_Target_high
MSC Target High.
Definition: IfxMsc_Msc.h:200
IfxMsc_UnderflowInterruptNode_SR0
Service request output SR0 selected.
Definition: IfxMsc.h:847
IfxMsc_Target_en0
Target EN0.
Definition: IfxMsc.h:798
IfxMsc_Target
IfxMsc_Target
Msc Targets - use as chip enable selection for ENH, ENL and ENC.
Definition: IfxMsc.h:796
IfxMsc_Msc_Io::son
IfxMsc_Msc_son son
Definition: IfxMsc_Msc.h:365
IfxMsc_Msc_Config
MSC Module Configuration Structure.
Definition: IfxMsc_Msc.h:412
IfxMsc_getData
IFX_INLINE uint16 IfxMsc_getData(Ifx_MSC *msc, uint8 upstreamIdx)
Get the upstream data from upstream data register.
Definition: IfxMsc.h:1559
IfxMsc_CommandFrameLength_32
SRL[15:0] and SRH[15:0] Shifted.
Definition: IfxMsc.h:186
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxMsc_UpstreamTimeoutInterruptNode_SR0
Service request output SR0 selected.
Definition: IfxMsc.h:892
IfxMsc_enableModule
void IfxMsc_enableModule(Ifx_MSC *msc)
Enable MSC kernel.
Definition: IfxMsc.c:127
IfxMsc_Msc_DownstreamControlExtensionConfig::dataFrameExtensionPassivePhaseLength
IfxMsc_DataFrameExtensionPassivePhaseLength dataFrameExtensionPassivePhaseLength
Specifies the Passive Phase Length at Data Frames Extension.
Definition: IfxMsc_Msc.h:333
IfxMsc_UpstreamTimeoutInterruptNode_SR4
Service request output SR4 selected.
Definition: IfxMsc.h:896
IfxPort_InputMode_pullUp
Definition: IfxPort.h:86
IfxMsc_Msc_DownstreamControlExtensionConfig::controlFrameExtensionPassivePhaseLength
IfxMsc_ControlFrameExtensionPassivePhaseLength controlFrameExtensionPassivePhaseLength
Specifies the Passive Phase Length at Control Frames Extension.
Definition: IfxMsc_Msc.h:334
IfxMsc_initSonPin
IFX_INLINE void IfxMsc_initSonPin(const IfxMsc_Son_Out *son, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a SON output.
Definition: IfxMsc.h:1684
IfxMsc_clearUpstreamValidFlag
IFX_INLINE void IfxMsc_clearUpstreamValidFlag(Ifx_MSC *msc, uint8 upstreamIdx)
Clear the valid flag.
Definition: IfxMsc.h:1529
IfxMsc_TransmissionMode_triggered
Triggered Mode.
Definition: IfxMsc.h:829
IfxMsc_Msc_DownstreamControlConfig::srhDataFrameLength
IfxMsc_DataFrameLength srhDataFrameLength
Specifies the Number of SRH bits shifted at data frames.
Definition: IfxMsc_Msc.h:307
IfxMsc_Msc_DownstreamControlExtensionConfig::extension
IfxMsc_Extension extension
Specifies the Extension Enable.
Definition: IfxMsc_Msc.h:327
IfxMsc_DividerMode_normal
divider mode is normal
Definition: IfxMsc.h:422
IfxMsc_Msc_Config::outputControlConfig
IfxMsc_Msc_OutputControlConfig outputControlConfig
Specifies the Output Control configuration.
Definition: IfxMsc_Msc.h:418
IfxMsc_Msc_Config::io
IfxMsc_Msc_Io io
Specifies the IO Pin configuration.
Definition: IfxMsc_Msc.h:423
IfxMsc_Msc_DownstreamControlExtensionConfig::srhBitsShiftedAtDataFramesExtension
IfxMsc_MsbBitDataExtension srhBitsShiftedAtDataFramesExtension
Specifies the Number of SRHE bits shifted at Data Frames.
Definition: IfxMsc_Msc.h:329
IfxMsc_NDividerAbra_1
Division ratio is 1.
Definition: IfxMsc.h:593
IfxMsc_getDataLowTarget
IFX_INLINE IfxMsc_Target IfxMsc_getDataLowTarget(Ifx_MSC *msc)
Get the selected target during low phase.
Definition: IfxMsc.h:1576
IfxMsc_Msc_UpstreamStatusConfig::parity
IfxMsc_Parity parity
Specifies the Parity Mode.
Definition: IfxMsc_Msc.h:393
IfxMsc_Msc_Config::target
IfxMsc_Target target[IFXMSC_NUM_ENABLE_SELECT_LINES]
Specifies the Downstream targets.
Definition: IfxMsc_Msc.h:422
IfxMsc_resetModule
void IfxMsc_resetModule(Ifx_MSC *msc)
Reset MSC kernel.
Definition: IfxMsc.c:194
IfxMsc_Msc_Io::sop
IfxMsc_Msc_sop sop
Definition: IfxMsc_Msc.h:364


iLLD_TC38A: IfxMsc_Msc.h Source File

  • Msc
  • Msc
IfxMsc_Msc.h
Go to the documentation of this file.
1 /**
2 * \file IfxMsc_Msc.h
3 * \brief MSC MSC details
4 * \ingroup IfxLld_Msc
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 *
43 * \defgroup IfxLld_Msc_Msc_Usage How to use the MSC Interface driver?
44 * \ingroup IfxLld_Msc
45 *
46 * The MSC interface driver provides a default MSC configuration
47 *
48 *
49 *
50 * In the following sections it will be described, how to integrate the driver into the application framework.
51 *
52 * \section IfxLld_Msc_Msc_Preparation Preparation
53 * \subsection IfxLld_Msc_Msc_Include Include Files
54 *
55 * Include following header file into your C code:
56 * \code
57 * #include <Msc/Msc/IfxMsc_Msc.h>
58 * \endcode
59 *
60 * \subsection IfxLld_Msc_Msc_Variables Variables
61 *
62 * Declare the MSC handle as global variable in your C code:
63 *
64 * \code
65 * // MSC handle
66 * static IfxMsc_Msc *msc;
67 *
68 * // IO Pins
69 * static const IfxMsc_Msc_Io IfxMsc_PinMap[IFXMSC_NUM_MODULES] = {
70 * {
71 * { &IfxMsc0_FCLP_P13_1_OUT, IfxPort_OutputMode_pushPull },
72 * { &IfxMsc0_FCLN_P13_0_OUT, IfxPort_OutputMode_pushPull },
73 * { &IfxMsc0_SOP_P13_3_OUT, IfxPort_OutputMode_pushPull },
74 * { &IfxMsc0_SON_P13_2_OUT, IfxPort_OutputMode_pushPull },
75 * { &IfxMsc0_EN0_P10_3_OUT, IfxPort_OutputMode_pushPull },
76 * { &IfxMsc0_EN1_P11_2_OUT, IfxPort_OutputMode_pushPull },
77 * {NULL_PTR},
78 * {NULL_PTR},
79 * { &IfxMsc0_SDI0_P11_10_IN, IfxPort_InputMode_pullUp },
80 * { &IfxMsc0_INJ0_P00_0_IN, IfxPort_InputMode_pullUp },
81 * { &IfxMsc0_INJ1_P10_5_IN, IfxPort_InputMode_pullUp },
82 * IfxPort_PadDriver_cmosAutomotiveSpeed3
83 * },
84 *
85 * #if IFXMSC_NUM_MODULES >= 2
86 * {
87 * { &IfxMsc1_FCLP_P22_1_OUT, IfxPort_OutputMode_pushPull },
88 * { &IfxMsc1_FCLN_P22_0_OUT, IfxPort_OutputMode_pushPull },
89 * { &IfxMsc1_SOP_P22_3_OUT, IfxPort_OutputMode_pushPull },
90 * { &IfxMsc1_SON_P22_2_OUT, IfxPort_OutputMode_pushPull },
91 * { &IfxMsc1_EN0_P23_4_OUT, IfxPort_OutputMode_pushPull },
92 * { &IfxMsc1_EN1_P23_5_OUT, IfxPort_OutputMode_pushPull },
93 * {NULL_PTR},
94 * {NULL_PTR},
95 * { &IfxMsc1_SDI0_P23_1_IN, IfxPort_InputMode_pullUp },
96 * { &IfxMsc1_INJ0_P23_3_IN, IfxPort_InputMode_pullUp },
97 * { &IfxMsc1_INJ1_P33_13_IN, IfxPort_InputMode_pullUp },
98 * IfxPort_PadDriver_cmosAutomotiveSpeed3
99 * },
100 * #endif
101 * };
102 * \endcode
103 *
104 * \subsection IfxLld_Msc_Msc_Init Module Initialisation
105 *
106 * The module initialisation can be done as followed:
107 * \code
108 * // create configuration (same is used for all MSCs)
109 * IfxMsc_Msc_Config mscConfig;
110 * IfxMsc_Msc_initModuleConfig(&mscConfig, &MODULE_MSC0);
111 *
112 * // increase baudrate for faster simulation:
113 * mscConfig.clockConfig.baudrate = 25000000;
114 * mscConfig.clockConfig.dividerMode = IfxMsc_DividerMode_fractional;
115 *
116 * // FCL only activated on transfers
117 * mscConfig.outputControlConfig.fclClockControl = IfxMsc_FclClockControlEnabled_activePhaseOnly;
118 *
119 * // in this case we also don't need a selection bit
120 * mscConfig.downstreamConfig.srlActivePhaseSelection = IfxMsc_ActivePhaseSelection_none;
121 * mscConfig.downstreamConfig.srhActivePhaseSelection = IfxMsc_ActivePhaseSelection_none;
122 *
123 * // initialize MSCs
124 * for(int i=0; i<IFXMSC_NUM_MODULES; ++i) {
125 * // init module pointer
126 * mscConfig.msc = (Ifx_MSC*)IfxMsc_cfg_indexMap[i].module;
127 *
128 * // IO Config
129 * mscConfig.io = IfxMsc_PinMap[i];
130 *
131 * // initialize module
132 * IfxMsc_Msc_initModule(&msc[i], &mscConfig);
133 * }
134 * \endcode
135 *
136 * The MSC is ready for use now!
137 *
138 *
139 * \section IfxLld_Msc_Msc_DataTransfers Data Transfers
140 *
141 * The MSC driver provides simple to use transfer function
142 *
143 * \code
144 * for(int n=0; n<10; ++n) {
145 * // clear IRQ flag of previous transfer
146 * for(int i=0; i<IFXMSC_NUM_MODULES; ++i) {
147 * msc[i].msc->ISC.B.CDEDI = 1;
148 * }
149 *
150 * // new transfer
151 * for(int i=0; i<IFXMSC_NUM_MODULES; ++i) {
152 * const unsigned dataL = i*0x1000 + n;
153 * const unsigned dataH = i*0x1000 + 0x0100 + n;
154 * IfxMsc_Msc_sendData(&msc[i], dataL, dataH);
155 * }
156 * // wait until transfers are finished
157 * for(int i=0; i<IFXMSC_NUM_MODULES; ++i) {
158 * while( !msc[i].msc->ISR.B.DEDI ); // check if new data could be written
159 * while( msc[i].msc->DSS.B.DFA ); // check if we are still in the active data phase
160 * }
161 * }
162 * \endcode
163 *
164 * \defgroup IfxLld_Msc_Msc MSC
165 * \ingroup IfxLld_Msc
166 * \defgroup IfxLld_Msc_Msc_Enumerations Enumerations
167 * \ingroup IfxLld_Msc_Msc
168 * \defgroup IfxLld_Msc_Msc_Data_Structures Data Structures
169 * \ingroup IfxLld_Msc_Msc
170 * \defgroup IfxLld_Msc_Msc_Module_Initialize_Functions Module Initialize Functions
171 * \ingroup IfxLld_Msc_Msc
172 * \defgroup IfxLld_Msc_Msc_Send_Functions Send Functions
173 * \ingroup IfxLld_Msc_Msc
174 * \defgroup IfxLld_Msc_Msc_Receive_Functions Receive Functions
175 * \ingroup IfxLld_Msc_Msc
176 * \defgroup IfxLld_Msc_Msc_Target_Read_Write_Functions Target Read Write Functions
177 * \ingroup IfxLld_Msc_Msc
178 */
179
180 #ifndef IFXMSC_MSC_H
181 #define IFXMSC_MSC_H 1
182
183 /******************************************************************************/
184 /*----------------------------------Includes----------------------------------*/
185 /******************************************************************************/
186
187 #include "Msc/Std/IfxMsc.h"
188
189 /******************************************************************************/
190 /*--------------------------------Enumerations--------------------------------*/
191 /******************************************************************************/
192
193 /** \addtogroup IfxLld_Msc_Msc_Enumerations
194 * \{ */
195 /** \brief Msc Instance Number
196 */
197 typedef enum
198 {
199 IfxMsc_Msc_Target_low = 0, /**< \brief MSC Target Low */
200 IfxMsc_Msc_Target_high = 1 /**< \brief MSC Target High */
201 } IfxMsc_Msc_Target;
202
203 /** \} */
204
205 /******************************************************************************/
206 /*-----------------------------Data Structures--------------------------------*/
207 /******************************************************************************/
208
209 /** \addtogroup IfxLld_Msc_Msc_Data_Structures
210 * \{ */
211 typedef struct
212 {
213 IfxMsc_En_Out *pin;
214 IfxPort_OutputMode mode;
215 } IfxMsc_Msc_en;
216
217 typedef struct
218 {
219 IfxMsc_Fcln_Out *pin;
220 IfxPort_OutputMode mode;
221 } IfxMsc_Msc_fcln;
222
223 typedef struct
224 {
225 IfxMsc_Fclp_Out *pin;
226 IfxPort_OutputMode mode;
227 } IfxMsc_Msc_fclp;
228
229 typedef struct
230 {
231 IfxMsc_Inj_In *pin;
232 IfxPort_InputMode mode;
233 } IfxMsc_Msc_inj0;
234
235 typedef struct
236 {
237 IfxMsc_Inj_In *pin;
238 IfxPort_InputMode mode;
239 } IfxMsc_Msc_inj1;
240
241 typedef struct
242 {
243 IfxMsc_Sdi_In *pin;
244 IfxPort_InputMode mode;
245 } IfxMsc_Msc_sdi;
246
247 typedef struct
248 {
249 IfxMsc_Son_Out *pin;
250 IfxPort_OutputMode mode;
251 } IfxMsc_Msc_son;
252
253 typedef struct
254 {
255 IfxMsc_Sop_Out *pin;
256 IfxPort_OutputMode mode;
257 } IfxMsc_Msc_sop;
258
259 /** \} */
260
261 /** \addtogroup IfxLld_Msc_Msc_Data_Structures
262 * \{ */
263 /** \brief ABRA block Configuration Structure
264 */
265 typedef struct
266 {
267 uint32 abraDownstreamBlockBaudrate; /**< \brief Specifies ABRA downstream block baud */
268 IfxMsc_ShiftClockPhaseDuration lowPhaseOfShiftClock; /**< \brief Specifies Low phase of shift clock */
269 IfxMsc_ShiftClockPhaseDuration highPhaseOfShiftClock; /**< \brief Specifies High phase of shift clock */
270 IfxMsc_ClockSelect clockSelectAbra; /**< \brief Specifies the clock select for ABRA */
271 IfxMsc_NDividerAbra nDividerAbra; /**< \brief Specifies the N divider */
272 IfxMsc_AsynchronousBlock abraBlockBypass; /**< \brief Specifies ABRA block bypass */
273 } IfxMsc_Msc_Abra;
274
275 /** \brief Clock configuration data Structure
276 */
277 typedef struct
278 {
279 uint32 baudrate; /**< \brief Specifies the baud rate */
280 IfxMsc_DividerMode dividerMode; /**< \brief Specifies divided clock properties */
281 uint16 step; /**< \brief Specifies the step value */
282 } IfxMsc_Msc_Clock;
283
284 /** \brief Configuration Settings for CX mode
285 */
286 typedef struct
287 {
288 IfxMsc_Extension extension; /**< \brief To enable or disable the CX mode */
289 IfxMsc_CommandFrameLength commandFrameLength;
290 IfxMsc_ControlFrameExtensionPassivePhaseLength commandFramePassivePhaseLength;
291 IfxMsc_ActivePhaseSelection srlActivePhaseSelection; /**< \brief Specifies the Enable SRL active phase selection bit */
292 IfxMsc_ActivePhaseSelection srhActivePhaseSelection; /**< \brief Specifies the Enable SRH active phase selection bit */
293 IfxMsc_DataFrameLength srlDataFrameLength; /**< \brief Number of SRL bits to be transmitted */
294 IfxMsc_DataFrameLength srhDataFrameLength; /**< \brief Number of SRH bits to be transmitted */
295 IfxMsc_MsbBitDataExtension srlBitsShiftedAtDataFramesExtension; /**< \brief Adds 16 to number of SRL data frame bits if enabled */
296 IfxMsc_MsbBitDataExtension srhBitsShiftedAtDataFramesExtension; /**< \brief Adds 16 to number of SRH data frame bits if enabled */
297 IfxMsc_FastMode fastMode; /**< \brief To enable or disable Fast Mode */
298 IfxMsc_NDividerDownstream nDividerDownstream; /**< \brief For configuring DSTE.NDD divider value */
299 } IfxMsc_Msc_CommandExtensionConfig;
300
301 /** \brief Downstream Control Configuration Structure
302 */
303 typedef struct
304 {
305 IfxMsc_TransmissionMode transmissionMode; /**< \brief Specifies the transmission Mode */
306 IfxMsc_DataFrameLength srlDataFrameLength; /**< \brief Specifies the Number of SRL bits shifted at data frames */
307 IfxMsc_DataFrameLength srhDataFrameLength; /**< \brief Specifies the Number of SRH bits shifted at data frames */
308 IfxMsc_ActivePhaseSelection srlActivePhaseSelection; /**< \brief Specifies the Enable SRL active phase selection bit */
309 IfxMsc_ActivePhaseSelection srhActivePhaseSelection; /**< \brief Specifies the Enable SRL active phase selection bit */
310 IfxMsc_CommandFrameLength commandFrameLength; /**< \brief Specifies the Number of bits shifted at command frames */
311 IfxMsc_DataFramePassivePhaseLength dataFramePassivePhaseLength; /**< \brief Specifies the Passive Phase Length at Data Frames */
312 IfxMsc_PassiveTimeFrameCount passiveTimeFrameCount; /**< \brief Specifies the Number of Passive Time Frames */
313 IfxMsc_ExternalSignalInjection externalSignalInjectionPin0; /**< \brief Specifies the Injection Enable Pin 0 */
314 IfxMsc_ExternalBitInjectionPosition injectionPositionPin0; /**< \brief Specifies the Injection Position Pin 0 */
315 IfxMsc_ExternalSignalInjection externalSignalInjectionPin1; /**< \brief Specifies the Injection Enable Pin 1 */
316 IfxMsc_ExternalBitInjectionPosition injectionPositionPin1; /**< \brief Specifies the Injection Position Pin 1 */
317 IfxMsc_CommandDataCommandRepetitionMode commandDataCommandReceptionMode; /**< \brief Specifies the Command-Data-Command in Data Repetition Mode */
318 uint32 downstreamDataSourcesLow; /**< \brief Specifies the Downstream Data Source selections Low */
319 uint32 downstreamDataSourcesHigh; /**< \brief Specifies the Downstream Data Source selections High */
320 uint32 emergencyStopEnableBits; /**< \brief Emergency Stop */
321 } IfxMsc_Msc_DownstreamControlConfig;
322
323 /** \brief Downstream Control Extension Configuration Structure
324 */
325 typedef struct
326 {
327 IfxMsc_Extension extension; /**< \brief Specifies the Extension Enable */
328 IfxMsc_MsbBitDataExtension srlBitsShiftedAtDataFramesExtension; /**< \brief Specifies the Number of SRLE bits shifted at Data Frames */
329 IfxMsc_MsbBitDataExtension srhBitsShiftedAtDataFramesExtension; /**< \brief Specifies the Number of SRHE bits shifted at Data Frames */
330 uint32 downstreamExtensionDataSourcesLow; /**< \brief Specifies the Downstream Select Data Source Low Extension */
331 uint32 downstreamExtensionDataSourcesHigh; /**< \brief Specifies the Downstream Select Data Source High Extension */
332 uint32 emergencyStopExtensionEnableBits; /**< \brief Emergency Stop Extension */
333 IfxMsc_DataFrameExtensionPassivePhaseLength dataFrameExtensionPassivePhaseLength; /**< \brief Specifies the Passive Phase Length at Data Frames Extension */
334 IfxMsc_ControlFrameExtensionPassivePhaseLength controlFrameExtensionPassivePhaseLength; /**< \brief Specifies the Passive Phase Length at Control Frames Extension */
335 IfxMsc_NDividerDownstream nDividerDownstream; /**< \brief Specifies the division ratio for downstream generator clock */
336 } IfxMsc_Msc_DownstreamControlExtensionConfig;
337
338 /** \brief Interrupt Configuration Structure
339 */
340 typedef struct
341 {
342 IfxMsc_DataFrameInterruptNode dataFrameInterruptNode; /**< \brief Specifies the Data Frame Interrupt Node */
343 IfxMsc_DataFrameInterrupt dataFrameInterrupt; /**< \brief Specifies the Data Frame Interrupt Mode */
344 IfxMsc_CommandFrameInterruptNode commandFrameInterruptNode; /**< \brief Specifies the Command Frame Interrupt Node */
345 IfxMsc_CommandFrameInterrupt commandFrameInterrupt; /**< \brief Specifies the Command Frame Interrupt Mode */
346 IfxMsc_TimeFrameInterruptNode timeFrameInterruptNode; /**< \brief Specifies the Time Frame Interrupt Node */
347 IfxMsc_TimeFrameInterrupt timeFrameInterrupt; /**< \brief Specifies the Time Frame Interrupt Mode */
348 IfxMsc_ReceiveDataInterruptNode receiveDataInterruptNode; /**< \brief Specifies the Receive Interrupt Node */
349 IfxMsc_ReceiveDataInterrupt receiveDataInterrupt; /**< \brief Specifies the Receive Interrupt Mode */
350 IfxMsc_UpstreamTimeoutInterruptNode upstreamTimeoutInterruptNode; /**< \brief Specifies the Upstream Timeout Interrupt Node */
351 IfxMsc_UpstreamTimeoutInterrupt upstreamTimeoutInterrupt; /**< \brief Specifies the Upstream Timeout Interrupt Mode */
352 IfxMsc_OverflowInterruptNode overflowInterruptNode; /**< \brief Specifies the ABRA Overflow Interrupt Node */
353 IfxMsc_OverflowInterrupt overflowInterrupt; /**< \brief Specifies the ABRA Overflow Interrupt Mode */
354 IfxMsc_UnderflowInterruptNode underflowInterruptNode; /**< \brief Specifies the ABRA Underflow Interrupt Node */
355 IfxMsc_UnderflowInterrupt underflowInterrupt; /**< \brief Specifies the ABRA Underflow Interrupt Mode */
356 } IfxMsc_Msc_InterruptConfig;
357
358 /** \brief MSC Pin Configuration Structure
359 */
360 typedef struct
361 {
362 IfxMsc_Msc_fclp fclp;
363 IfxMsc_Msc_fcln fcln;
364 IfxMsc_Msc_sop sop;
365 IfxMsc_Msc_son son;
366 IfxMsc_Msc_en en0;
367 IfxMsc_Msc_en en1;
368 IfxMsc_Msc_en en2;
369 IfxMsc_Msc_en en3;
370 IfxMsc_Msc_sdi sdi;
371 IfxMsc_Msc_inj0 inj0;
372 IfxMsc_Msc_inj1 inj1;
373 IfxPort_PadDriver pinDriver;
374 } IfxMsc_Msc_Io;
375
376 /** \brief Output Control Configuration Structure
377 */
378 typedef struct
379 {
380 IfxMsc_FclLinePolarity fclpPolarity; /**< \brief Specifies the FCLP Polarity */
381 IfxMsc_SoLinePolarity sopPolarity; /**< \brief Specifies the SLP Polarity */
382 IfxMsc_ChipSelectActiveState cslpPolarity; /**< \brief Specifies the CSLP Polarity */
383 IfxMsc_SdiLinePolarity sdiLinePolarity; /**< \brief Specifies the ILP Polarity */
384 IfxMsc_FclClockControlEnabled fclClockControl; /**< \brief Specifies the CLKCTRL Polarity */
385 } IfxMsc_Msc_OutputControlConfig;
386
387 /** \brief Upstream Control Configuration Structure
388 */
389 typedef struct
390 {
391 IfxMsc_UpstreamChannelFrameType upstreamChannelFrameType; /**< \brief Specifies the Upstream Channel Frame Type */
392 IfxMsc_UpstreamChannelReceivingRate upstreamChannelReceivingRate; /**< \brief Specifies the Upstream Channel Receiving Rate */
393 IfxMsc_Parity parity; /**< \brief Specifies the Parity Mode */
394 IfxMsc_ServiceRequestDelay serviceRequestDelay; /**< \brief Specifies the Service Request Delay */
395 IfxMsc_UpstreamTimeoutPrescaler upstreamTimeoutPrescaler; /**< \brief Specifies the Upstream Timeout Prescaler */
396 IfxMsc_UpstreamTimeoutValue upstreamTimeoutValue; /**< \brief Specifies the Upstream Timeout Value */
397 } IfxMsc_Msc_UpstreamStatusConfig;
398
399 /** \} */
400
401 /** \addtogroup IfxLld_Msc_Msc_Data_Structures
402 * \{ */
403 /** \brief MSC base address data Structure
404 */
405 typedef struct
406 {
407 Ifx_MSC *msc; /**< \brief Specifies the pointer to the MSC registers */
408 } IfxMsc_Msc;
409
410 /** \brief MSC Module Configuration Structure
411 */
412 typedef struct
413 {
414 Ifx_MSC *msc; /**< \brief Specifies the pointer to the MSC registers */
415 IfxMsc_Msc_Clock clockConfig; /**< \brief Specifies the Clock configuration */
416 IfxMsc_Msc_UpstreamStatusConfig upstreamConfig; /**< \brief Specifies the Upstream configuration */
417 IfxMsc_Msc_InterruptConfig interruptConfig; /**< \brief Specifies the Interrupt configuration */
418 IfxMsc_Msc_OutputControlConfig outputControlConfig; /**< \brief Specifies the Output Control configuration */
419 IfxMsc_Msc_DownstreamControlConfig downstreamConfig; /**< \brief Specifies the Downstream configuration */
420 IfxMsc_Msc_DownstreamControlExtensionConfig downstreamExtensionConfig; /**< \brief Specifies the Downstream Extension configuration */
421 IfxMsc_Msc_Abra abraConfig; /**< \brief Specifies the ABRA configuration */
422 IfxMsc_Target target[IFXMSC_NUM_ENABLE_SELECT_LINES]; /**< \brief Specifies the Downstream targets */
423 IfxMsc_Msc_Io io; /**< \brief Specifies the IO Pin configuration */
424 IfxMsc_Msc_CommandExtensionConfig commandExtensionConfig; /**< \brief Configuration for CX mode. */
425 } IfxMsc_Msc_Config;
426
427 /** \} */
428
429 /** \addtogroup IfxLld_Msc_Msc_Module_Initialize_Functions
430 * \{ */
431
432 /******************************************************************************/
433 /*-------------------------Global Function Prototypes-------------------------*/
434 /******************************************************************************/
435
436 /** \brief de-initialize MSC module
437 * \param msc pointer to the MSC module handle
438 * \return None
439 *
440 * \code
441 * IfxMsc_Msc_deInitModule(&msc);
442 * \endcode
443 *
444 */
445 IFX_EXTERN void IfxMsc_Msc_deInitModule(IfxMsc_Msc *msc);
446
447 /** \brief initialize the MSC module
448 * \param msc pointer to the MSC module handle
449 * \param config pointer to the MSC module configuration
450 * \return None
451 *
452 * A coding example can be found in \ref IfxLld_Msc_Msc_Usage
453 *
454 */
455 IFX_EXTERN void IfxMsc_Msc_initModule(IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config);
456
457 /** \brief initialize the MSC module configuration
458 * \param config pointer to the MSC configuration
459 * \param msc pointer to the MSC registers
460 * \return None
461 *
462 * A coding example can be found in \ref IfxLld_Msc_Msc_Usage
463 *
464 */
465 IFX_EXTERN void IfxMsc_Msc_initModuleConfig(IfxMsc_Msc_Config *config, Ifx_MSC *msc);
466
467 /** \brief initialize the ABRA block
468 * \param msc pointer to the MSC module handle
469 * \param config pointer to the MSC module configuration
470 * \return None
471 */
472 IFX_EXTERN void IfxMsc_Msc_initializeAbra(IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config);
473
474 /** \brief initialize the MSC data extension block for 64bit operation
475 * \param msc pointer to the MSC module handle
476 * \param config pointer to the MSC module configuration
477 * \return None
478 */
479 IFX_EXTERN void IfxMsc_Msc_initializeDataExtension(IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config);
480
481 /**
482 * \param msc MSC handle
483 * \param config configuration
484 * \return None
485 */
486 IFX_EXTERN void IfxMsc_Msc_initializeCommandExtension(IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config);
487
488 /** \} */
489
490 /** \addtogroup IfxLld_Msc_Msc_Send_Functions
491 * \{ */
492
493 /******************************************************************************/
494 /*-------------------------Global Function Prototypes-------------------------*/
495 /******************************************************************************/
496
497 /** \brief send downstream command
498 * \param msc pointer to the MSC module handle
499 * \param command transmit command
500 * \return None
501 */
502 IFX_EXTERN void IfxMsc_Msc_sendCommand(IfxMsc_Msc *msc, uint32 command);
503
504 /** \brief send complete downstream data, both high and low
505 * \param msc pointer to the MSC module handle
506 * \param dataLow low data to be transmitted
507 * \param dataHigh high data to be transmitted
508 * \return None
509 *
510 * A coding example can be found in \ref IfxLld_Msc_Msc_Usage
511 *
512 */
513 IFX_EXTERN void IfxMsc_Msc_sendData(IfxMsc_Msc *msc, uint16 dataLow, uint16 dataHigh);
514
515 /** \brief Send downstream data extension (64bit)
516 * \param msc pointer to the MSC module handle
517 * \param data Data to send
518 * \param dataExtension Data extension to send
519 * \return None
520 */
521 IFX_EXTERN void IfxMsc_Msc_sendDataExtension(IfxMsc_Msc *msc, uint32 data, uint32 dataExtension);
522
523 /** \brief send high downstream data
524 * \param msc pointer to the MSC module handle
525 * \param data high downstream data to be transmitted
526 * \return None
527 */
528 IFX_EXTERN void IfxMsc_Msc_sendDataHigh(IfxMsc_Msc *msc, uint16 data);
529
530 /** \brief send high downstream data
531 * \param msc pointer to the MSC module handle
532 * \param data low downstream data to be transmitted
533 * \return None
534 */
535 IFX_EXTERN void IfxMsc_Msc_sendDataLow(IfxMsc_Msc *msc, uint16 data);
536
537 /** \} */
538
539 /** \addtogroup IfxLld_Msc_Msc_Receive_Functions
540 * \{ */
541
542 /******************************************************************************/
543 /*-------------------------Global Function Prototypes-------------------------*/
544 /******************************************************************************/
545
546 /** \brief receive upstream data
547 * \param msc pointer to the MSC module handle
548 * \param upstreamIdx index of the upstream data register
549 * \return data
550 */
551 IFX_EXTERN uint32 IfxMsc_Msc_receiveData(IfxMsc_Msc *msc, uint8 upstreamIdx);
552
553 /** \} */
554
555 /** \addtogroup IfxLld_Msc_Msc_Target_Read_Write_Functions
556 * \{ */
557
558 /******************************************************************************/
559 /*-------------------------Global Function Prototypes-------------------------*/
560 /******************************************************************************/
561
562 /** \brief get the target during high and low phase
563 * \param msc pointer to the MSC module handle
564 * \param target low phase target or high phase target
565 * \return selected target
566 */
567 IFX_EXTERN IfxMsc_Target IfxMsc_Msc_getTarget(IfxMsc_Msc *msc, IfxMsc_Msc_Target target);
568
569 /** \brief set the command for target
570 * \param msc pointer to the MSC module handle
571 * \param enX enX target to be selected
572 * \return None
573 */
574 IFX_EXTERN void IfxMsc_Msc_setCommandTarget(IfxMsc_Msc *msc, IfxMsc_Target enX);
575
576 /** \brief set the target data to be transmitted during low and high phase
577 * \param msc pointer to the MSC module handle
578 * \param enXHigh high target to be selected
579 * \param enXLow low target to be selected
580 * \return None
581 */
582 IFX_EXTERN void IfxMsc_Msc_setDataTarget(IfxMsc_Msc *msc, IfxMsc_Target enXHigh, IfxMsc_Target enXLow);
583
584 /** \} */
585
586 /******************************************************************************/
587 /*-------------------------Inline Function Prototypes-------------------------*/
588 /******************************************************************************/
589
590 /**
591 * \param msc pointer to the MSC module handle
592 * \return None
593 */
594 IFX_INLINE void IfxMsc_Msc_clearDataFrameInterrupt(IfxMsc_Msc *msc);
595
596 /**
597 * \param msc pointer to the MSC module handle
598 * \return status of the active data frame
599 */
600 IFX_INLINE boolean IfxMsc_Msc_getActiveDataFrameStatus(IfxMsc_Msc *msc);
601
602 /**
603 * \param msc pointer to the MSC module handle
604 * \return status of the data frame interrupt
605 */
606 IFX_INLINE boolean IfxMsc_Msc_getDataFrameInterruptStatus(IfxMsc_Msc *msc);
607
608 /******************************************************************************/
609 /*---------------------Inline Function Implementations------------------------*/
610 /******************************************************************************/
611
612 IFX_INLINE void IfxMsc_Msc_clearDataFrameInterrupt(IfxMsc_Msc *msc)
613 {
614 IfxMsc_clearDataFrameInterruptFlag(msc->msc);
615 }
616
617
618 IFX_INLINE boolean IfxMsc_Msc_getActiveDataFrameStatus(IfxMsc_Msc *msc)
619 {
620 return IfxMsc_getActiveDataFrameStatus(msc->msc);
621 }
622
623
624 IFX_INLINE boolean IfxMsc_Msc_getDataFrameInterruptStatus(IfxMsc_Msc *msc)
625 {
626 return IfxMsc_getDataFrameInterruptFlag(msc->msc);
627 }
628
629
630 #endif /* IFXMSC_MSC_H */
IfxMsc_Msc_sendDataLow
IFX_EXTERN void IfxMsc_Msc_sendDataLow(IfxMsc_Msc *msc, uint16 data)
send high downstream data
Definition: IfxMsc_Msc.c:710
IfxMsc_Msc_Target
IfxMsc_Msc_Target
Msc Instance Number.
Definition: IfxMsc_Msc.h:197
IfxMsc_Msc_UpstreamStatusConfig::upstreamTimeoutValue
IfxMsc_UpstreamTimeoutValue upstreamTimeoutValue
Specifies the Upstream Timeout Value.
Definition: IfxMsc_Msc.h:396
IfxMsc_Sdi_In
SDI pin mapping structure.
Definition: IfxMsc_PinMap.h:64
IfxMsc_Msc_DownstreamControlConfig::passiveTimeFrameCount
IfxMsc_PassiveTimeFrameCount passiveTimeFrameCount
Specifies the Number of Passive Time Frames.
Definition: IfxMsc_Msc.h:312
IfxMsc_Msc_Abra::clockSelectAbra
IfxMsc_ClockSelect clockSelectAbra
Specifies the clock select for ABRA.
Definition: IfxMsc_Msc.h:270
IfxMsc_Msc_CommandExtensionConfig::srhActivePhaseSelection
IfxMsc_ActivePhaseSelection srhActivePhaseSelection
Specifies the Enable SRH active phase selection bit.
Definition: IfxMsc_Msc.h:292
IfxMsc_Msc_Io::fclp
IfxMsc_Msc_fclp fclp
Definition: IfxMsc_Msc.h:362
IfxMsc_Msc_InterruptConfig::timeFrameInterrupt
IfxMsc_TimeFrameInterrupt timeFrameInterrupt
Specifies the Time Frame Interrupt Mode.
Definition: IfxMsc_Msc.h:347
IfxMsc_Msc_OutputControlConfig::sopPolarity
IfxMsc_SoLinePolarity sopPolarity
Specifies the SLP Polarity.
Definition: IfxMsc_Msc.h:381
IfxMsc_ExternalSignalInjection
IfxMsc_ExternalSignalInjection
Downstream Control Enhanced Register - Injection Enable of the Pin 0 and 1 Signal Definition in Ifx_M...
Definition: IfxMsc.h:518
IfxMsc_Msc_Io::en1
IfxMsc_Msc_en en1
Definition: IfxMsc_Msc.h:367
IfxMsc_Msc_setCommandTarget
IFX_EXTERN void IfxMsc_Msc_setCommandTarget(IfxMsc_Msc *msc, IfxMsc_Target enX)
set the command for target
Definition: IfxMsc_Msc.c:722
IfxMsc_Msc_DownstreamControlConfig::externalSignalInjectionPin0
IfxMsc_ExternalSignalInjection externalSignalInjectionPin0
Specifies the Injection Enable Pin 0.
Definition: IfxMsc_Msc.h:313
IfxMsc_Msc_UpstreamStatusConfig::serviceRequestDelay
IfxMsc_ServiceRequestDelay serviceRequestDelay
Specifies the Service Request Delay.
Definition: IfxMsc_Msc.h:394
IfxMsc_Msc_CommandExtensionConfig::commandFramePassivePhaseLength
IfxMsc_ControlFrameExtensionPassivePhaseLength commandFramePassivePhaseLength
Definition: IfxMsc_Msc.h:290
IfxMsc_Msc
MSC base address data Structure.
Definition: IfxMsc_Msc.h:405
IfxMsc_FastMode
IfxMsc_FastMode
Enum for enable and disable Fast Mode.
Definition: IfxMsc.h:526
IfxMsc_Msc_fclp::pin
IfxMsc_Fclp_Out * pin
Definition: IfxMsc_Msc.h:225
IfxMsc_Msc_Target_low
MSC Target Low.
Definition: IfxMsc_Msc.h:199
IfxMsc_Msc_en::pin
IfxMsc_En_Out * pin
Definition: IfxMsc_Msc.h:213
IfxMsc_ReceiveDataInterrupt
IfxMsc_ReceiveDataInterrupt
Interrupt Control Register - Receive Data Interrupt Enable Definition in Ifx_MSC.ICR.B.RDIE.
Definition: IfxMsc.h:682
IfxMsc_Msc_initializeCommandExtension
IFX_EXTERN void IfxMsc_Msc_initializeCommandExtension(IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
Definition: IfxMsc_Msc.c:741
IfxMsc_Msc_DownstreamControlExtensionConfig::downstreamExtensionDataSourcesLow
uint32 downstreamExtensionDataSourcesLow
Specifies the Downstream Select Data Source Low Extension.
Definition: IfxMsc_Msc.h:330
IfxMsc_Msc_DownstreamControlConfig::dataFramePassivePhaseLength
IfxMsc_DataFramePassivePhaseLength dataFramePassivePhaseLength
Specifies the Passive Phase Length at Data Frames.
Definition: IfxMsc_Msc.h:311
IfxMsc_Msc_Abra::highPhaseOfShiftClock
IfxMsc_ShiftClockPhaseDuration highPhaseOfShiftClock
Specifies High phase of shift clock.
Definition: IfxMsc_Msc.h:269
IfxMsc_Msc_Io::en3
IfxMsc_Msc_en en3
Definition: IfxMsc_Msc.h:369
IfxMsc_UpstreamTimeoutPrescaler
IfxMsc_UpstreamTimeoutPrescaler
Upstream Control Enhanced Register 1 - Upstream Timeout Prescaler Definition in Ifx_MSC.USCE.B.USTOPRE.
Definition: IfxMsc.h:902
IfxMsc_Msc_InterruptConfig::receiveDataInterrupt
IfxMsc_ReceiveDataInterrupt receiveDataInterrupt
Specifies the Receive Interrupt Mode.
Definition: IfxMsc_Msc.h:349
IfxMsc_Msc_OutputControlConfig::fclClockControl
IfxMsc_FclClockControlEnabled fclClockControl
Specifies the CLKCTRL Polarity.
Definition: IfxMsc_Msc.h:384
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:140
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxMsc_ActivePhaseSelection
IfxMsc_ActivePhaseSelection
Enable SRL/SRH Active Phase Selection Bit Definition in Ifx_MSC.DSC.B.ENSELH and Ifx_MSC.DSC.B.ENSELL.
Definition: IfxMsc.h:87
IfxMsc_NDividerDownstream
IfxMsc_NDividerDownstream
Downstream Timing Extension Register - N Divider Downstream Definition in Ifx_MSC.DSTE.B.NDD.
Definition: IfxMsc.h:606
IfxMsc_Msc_DownstreamControlExtensionConfig::downstreamExtensionDataSourcesHigh
uint32 downstreamExtensionDataSourcesHigh
Specifies the Downstream Select Data Source High Extension.
Definition: IfxMsc_Msc.h:331
IfxMsc_Msc_inj0::mode
IfxPort_InputMode mode
Definition: IfxMsc_Msc.h:232
IfxMsc_Msc_sendDataHigh
IFX_EXTERN void IfxMsc_Msc_sendDataHigh(IfxMsc_Msc *msc, uint16 data)
send high downstream data
Definition: IfxMsc_Msc.c:698
IfxMsc_Msc_InterruptConfig::underflowInterrupt
IfxMsc_UnderflowInterrupt underflowInterrupt
Specifies the ABRA Underflow Interrupt Mode.
Definition: IfxMsc_Msc.h:355
IfxMsc_TimeFrameInterrupt
IfxMsc_TimeFrameInterrupt
Interrupt Control Register - Time Frame Interrupt Enable Definition in Ifx_MSC.ICR.B.TFIE.
Definition: IfxMsc.h:807
IfxMsc_UpstreamTimeoutInterrupt
IfxMsc_UpstreamTimeoutInterrupt
Upstream Control Enhanced Register 1 - Upstream Timeout Interrupt Enable Definition in Ifx_MSC...
Definition: IfxMsc.h:881
IfxMsc_DataFrameInterrupt
IfxMsc_DataFrameInterrupt
Interrupt Control Register - Data Frame Interrupt Enable Definition in Ifx_MSC.ICR.B.EDIE.
Definition: IfxMsc.h:338
IfxMsc_Msc_CommandExtensionConfig::srlActivePhaseSelection
IfxMsc_ActivePhaseSelection srlActivePhaseSelection
Specifies the Enable SRL active phase selection bit.
Definition: IfxMsc_Msc.h:291
IfxMsc_Extension
IfxMsc_Extension
Downstream Control Enhanced Register - Extension Enable Definition in Ifx_MSC.DSCE.B.NDBLE.
Definition: IfxMsc.h:438
IfxMsc_AsynchronousBlock
IfxMsc_AsynchronousBlock
Asynchronous Block Configuration Register - Asynchronous Block Bypass Definition in Ifx_MSC...
Definition: IfxMsc.h:96
IfxMsc_Msc_Config::abraConfig
IfxMsc_Msc_Abra abraConfig
Specifies the ABRA configuration.
Definition: IfxMsc_Msc.h:421
IfxMsc_Msc_Io::pinDriver
IfxPort_PadDriver pinDriver
Definition: IfxMsc_Msc.h:373
IfxMsc_Msc_fcln::pin
IfxMsc_Fcln_Out * pin
Definition: IfxMsc_Msc.h:219
IfxMsc_Msc_CommandExtensionConfig::fastMode
IfxMsc_FastMode fastMode
To enable or disable Fast Mode.
Definition: IfxMsc_Msc.h:297
IfxMsc_Msc_UpstreamStatusConfig::upstreamTimeoutPrescaler
IfxMsc_UpstreamTimeoutPrescaler upstreamTimeoutPrescaler
Specifies the Upstream Timeout Prescaler.
Definition: IfxMsc_Msc.h:395
IfxMsc_TransmissionMode
IfxMsc_TransmissionMode
Downstream Channel Transmission Mode Definition in Ifx_MSC.DSC.B.TM.
Definition: IfxMsc.h:827
IfxMsc_UpstreamChannelReceivingRate
IfxMsc_UpstreamChannelReceivingRate
Upstream Receiving Rate Definition in Ifx_MSC.USR.B.URR.
Definition: IfxMsc.h:866
IfxMsc_Msc_sendCommand
IFX_EXTERN void IfxMsc_Msc_sendCommand(IfxMsc_Msc *msc, uint32 command)
send downstream command
Definition: IfxMsc_Msc.c:658
IfxMsc_Msc_sdi::pin
IfxMsc_Sdi_In * pin
Definition: IfxMsc_Msc.h:243
IfxMsc_Msc_initModule
IFX_EXTERN void IfxMsc_Msc_initModule(IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
initialize the MSC module
Definition: IfxMsc_Msc.c:78
IfxMsc_Msc_getDataFrameInterruptStatus
IFX_INLINE boolean IfxMsc_Msc_getDataFrameInterruptStatus(IfxMsc_Msc *msc)
Definition: IfxMsc_Msc.h:624
IFXMSC_NUM_ENABLE_SELECT_LINES
#define IFXMSC_NUM_ENABLE_SELECT_LINES
Definition: IfxMsc_cfg.h:69
IfxMsc_Msc_deInitModule
IFX_EXTERN void IfxMsc_Msc_deInitModule(IfxMsc_Msc *msc)
de-initialize MSC module
Definition: IfxMsc_Msc.c:54
IfxMsc_Msc_setDataTarget
IFX_EXTERN void IfxMsc_Msc_setDataTarget(IfxMsc_Msc *msc, IfxMsc_Target enXHigh, IfxMsc_Target enXLow)
set the target data to be transmitted during low and high phase
Definition: IfxMsc_Msc.c:730
IfxMsc_Msc_Config::clockConfig
IfxMsc_Msc_Clock clockConfig
Specifies the Clock configuration.
Definition: IfxMsc_Msc.h:415
IfxMsc_Msc_DownstreamControlConfig::externalSignalInjectionPin1
IfxMsc_ExternalSignalInjection externalSignalInjectionPin1
Specifies the Injection Enable Pin 1.
Definition: IfxMsc_Msc.h:315
IfxMsc_ControlFrameExtensionPassivePhaseLength
IfxMsc_ControlFrameExtensionPassivePhaseLength
Downstream Timing Extension Register - Passive Phase Length at Control Frames Extension Definition in...
Definition: IfxMsc.h:192
IfxMsc_Msc_getTarget
IFX_EXTERN IfxMsc_Target IfxMsc_Msc_getTarget(IfxMsc_Msc *msc, IfxMsc_Msc_Target target)
get the target during high and low phase
Definition: IfxMsc_Msc.c:60
IfxMsc_Msc_InterruptConfig
Interrupt Configuration Structure.
Definition: IfxMsc_Msc.h:340
IfxMsc_CommandDataCommandRepetitionMode
IfxMsc_CommandDataCommandRepetitionMode
Downstream Control Enhanced Register - Command-Data-Command in Data Repetition Mode Definition in Ifx...
Definition: IfxMsc.h:123
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxMsc_Msc_son::pin
IfxMsc_Son_Out * pin
Definition: IfxMsc_Msc.h:249
IfxMsc_Msc_Config::commandExtensionConfig
IfxMsc_Msc_CommandExtensionConfig commandExtensionConfig
Configuration for CX mode.
Definition: IfxMsc_Msc.h:424
IfxMsc_Msc_initializeAbra
IFX_EXTERN void IfxMsc_Msc_initializeAbra(IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
initialize the ABRA block
Definition: IfxMsc_Msc.c:560
IfxMsc_Msc_InterruptConfig::timeFrameInterruptNode
IfxMsc_TimeFrameInterruptNode timeFrameInterruptNode
Specifies the Time Frame Interrupt Node.
Definition: IfxMsc_Msc.h:346
IfxMsc_Msc_CommandExtensionConfig::srlDataFrameLength
IfxMsc_DataFrameLength srlDataFrameLength
Number of SRL bits to be transmitted.
Definition: IfxMsc_Msc.h:293
IfxMsc_Msc_DownstreamControlExtensionConfig
Downstream Control Extension Configuration Structure.
Definition: IfxMsc_Msc.h:325
IfxMsc_Msc_InterruptConfig::overflowInterruptNode
IfxMsc_OverflowInterruptNode overflowInterruptNode
Specifies the ABRA Overflow Interrupt Node.
Definition: IfxMsc_Msc.h:352
IfxMsc_Msc_InterruptConfig::upstreamTimeoutInterrupt
IfxMsc_UpstreamTimeoutInterrupt upstreamTimeoutInterrupt
Specifies the Upstream Timeout Interrupt Mode.
Definition: IfxMsc_Msc.h:351
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxMsc_Msc_initializeDataExtension
IFX_EXTERN void IfxMsc_Msc_initializeDataExtension(IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
initialize the MSC data extension block for 64bit operation
Definition: IfxMsc_Msc.c:590
IfxMsc_MsbBitDataExtension
IfxMsc_MsbBitDataExtension
Downstream Control Enhanced Register - Number of SRL/SRH Bits Shifted at Data Frames Extension (NDBL/...
Definition: IfxMsc.h:582
IfxMsc_OverflowInterruptNode
IfxMsc_OverflowInterruptNode
Asynchronous Block Configuration Register - Overflow Interrupt Node Pointer Definition in Ifx_MSC...
Definition: IfxMsc.h:638
IfxMsc_Msc_DownstreamControlConfig::injectionPositionPin1
IfxMsc_ExternalBitInjectionPosition injectionPositionPin1
Specifies the Injection Position Pin 1.
Definition: IfxMsc_Msc.h:316
IfxMsc_Msc_InterruptConfig::underflowInterruptNode
IfxMsc_UnderflowInterruptNode underflowInterruptNode
Specifies the ABRA Underflow Interrupt Node.
Definition: IfxMsc_Msc.h:354
IfxMsc_Msc_DownstreamControlConfig::commandDataCommandReceptionMode
IfxMsc_CommandDataCommandRepetitionMode commandDataCommandReceptionMode
Specifies the Command-Data-Command in Data Repetition Mode.
Definition: IfxMsc_Msc.h:317
IfxMsc_DividerMode
IfxMsc_DividerMode
Divider mode.
Definition: IfxMsc.h:420
IfxMsc_Msc_getActiveDataFrameStatus
IFX_INLINE boolean IfxMsc_Msc_getActiveDataFrameStatus(IfxMsc_Msc *msc)
Definition: IfxMsc_Msc.h:618
IfxMsc_Msc_InterruptConfig::commandFrameInterruptNode
IfxMsc_CommandFrameInterruptNode commandFrameInterruptNode
Specifies the Command Frame Interrupt Node.
Definition: IfxMsc_Msc.h:344
IfxMsc_SoLinePolarity
IfxMsc_SoLinePolarity
Output Control Register - SOP Line Polarity Definition in Ifx_MSC.OCR.B.SLP.
Definition: IfxMsc.h:769
IfxMsc_Msc_DownstreamControlExtensionConfig::emergencyStopExtensionEnableBits
uint32 emergencyStopExtensionEnableBits
Emergency Stop Extension.
Definition: IfxMsc_Msc.h:332
IfxMsc_Msc_Abra::abraDownstreamBlockBaudrate
uint32 abraDownstreamBlockBaudrate
Specifies ABRA downstream block baud.
Definition: IfxMsc_Msc.h:267
IfxMsc_Msc_en
Definition: IfxMsc_Msc.h:211
IfxMsc_Msc_Config::upstreamConfig
IfxMsc_Msc_UpstreamStatusConfig upstreamConfig
Specifies the Upstream configuration.
Definition: IfxMsc_Msc.h:416
IfxMsc_Msc_InterruptConfig::overflowInterrupt
IfxMsc_OverflowInterrupt overflowInterrupt
Specifies the ABRA Overflow Interrupt Mode.
Definition: IfxMsc_Msc.h:353
IfxMsc_Son_Out
SON pin mapping structure.
Definition: IfxMsc_PinMap.h:105
IfxMsc_Msc_fclp
Definition: IfxMsc_Msc.h:223
IfxMsc_ServiceRequestDelay
IfxMsc_ServiceRequestDelay
Service Request Delay Definition in Ifx_MSC.USR.B.SRDC.
Definition: IfxMsc.h:728
IfxMsc_Msc_fcln
Definition: IfxMsc_Msc.h:217
IfxMsc_ReceiveDataInterruptNode
IfxMsc_ReceiveDataInterruptNode
Interrupt Control Register - Receive Data Interrupt Pointer Definition in Ifx_MSC.ICR.B.RDIP.
Definition: IfxMsc.h:693
IfxMsc_Msc_Io::fcln
IfxMsc_Msc_fcln fcln
Definition: IfxMsc_Msc.h:363
IfxMsc_Parity
IfxMsc_Parity
Parity Mode Definition in Ifx_MSC.USR.B.PCT.
Definition: IfxMsc.h:650
IfxMsc_Msc_OutputControlConfig::cslpPolarity
IfxMsc_ChipSelectActiveState cslpPolarity
Specifies the CSLP Polarity.
Definition: IfxMsc_Msc.h:382
IfxMsc_Msc_sdi
Definition: IfxMsc_Msc.h:241
IfxMsc_clearDataFrameInterruptFlag
void IfxMsc_clearDataFrameInterruptFlag(Ifx_MSC *msc)
clear data frame interrupt flag
Definition: IfxMsc.c:54
IfxMsc_Msc_OutputControlConfig::fclpPolarity
IfxMsc_FclLinePolarity fclpPolarity
Specifies the FCLP Polarity.
Definition: IfxMsc_Msc.h:380
IfxMsc_Msc_Abra::abraBlockBypass
IfxMsc_AsynchronousBlock abraBlockBypass
Specifies ABRA block bypass.
Definition: IfxMsc_Msc.h:272
IfxMsc_NDividerAbra
IfxMsc_NDividerAbra
Asynchronous Block Configuration Register - N Divider ABRA Definition in Ifx_MSC.ABC.B.NDA.
Definition: IfxMsc.h:591
IfxMsc_Msc_sendData
IFX_EXTERN void IfxMsc_Msc_sendData(IfxMsc_Msc *msc, uint16 dataLow, uint16 dataHigh)
send complete downstream data, both high and low
Definition: IfxMsc_Msc.c:667
IfxMsc_Msc_Io::sdi
IfxMsc_Msc_sdi sdi
Definition: IfxMsc_Msc.h:370
IfxMsc_PassiveTimeFrameCount
IfxMsc_PassiveTimeFrameCount
Downstream Status Register - Number Of Passive Time Frames Definition in Ifx_MSC.DSS.B.NPTF.
Definition: IfxMsc.h:659
IfxMsc_ClockSelect
IfxMsc_ClockSelect
Asynchronous Block Configuration Register - Clock Select Definition in Ifx_MSC.ABC.B.CLKSEL.
Definition: IfxMsc.h:114
IfxMsc_Msc_InterruptConfig::dataFrameInterrupt
IfxMsc_DataFrameInterrupt dataFrameInterrupt
Specifies the Data Frame Interrupt Mode.
Definition: IfxMsc_Msc.h:343
IfxMsc_Msc_son
Definition: IfxMsc_Msc.h:247
IfxMsc_Msc_sop
Definition: IfxMsc_Msc.h:253
IfxMsc_Msc_Io::en2
IfxMsc_Msc_en en2
Definition: IfxMsc_Msc.h:368
IfxMsc_SdiLinePolarity
IfxMsc_SdiLinePolarity
Output Control Register - SDI Line Polarity Definition in Ifx_MSC.OCR.B.ILP.
Definition: IfxMsc.h:704
IfxMsc_Fcln_Out
FCLN pin mapping structure.
Definition: IfxMsc_PinMap.h:89
IfxMsc_Msc_sendDataExtension
IFX_EXTERN void IfxMsc_Msc_sendDataExtension(IfxMsc_Msc *msc, uint32 data, uint32 dataExtension)
Send downstream data extension (64bit)
Definition: IfxMsc_Msc.c:685
IfxMsc_Msc::msc
Ifx_MSC * msc
Specifies the pointer to the MSC registers.
Definition: IfxMsc_Msc.h:407
IfxMsc.h
MSC basic functionality.
IfxMsc_Msc_InterruptConfig::upstreamTimeoutInterruptNode
IfxMsc_UpstreamTimeoutInterruptNode upstreamTimeoutInterruptNode
Specifies the Upstream Timeout Interrupt Node.
Definition: IfxMsc_Msc.h:350
IfxMsc_TimeFrameInterruptNode
IfxMsc_TimeFrameInterruptNode
Interrupt Control Register - Time Frame Interrupt Pointer Definition in Ifx_MSC.ICR.B.TFIP.
Definition: IfxMsc.h:816
IfxMsc_Msc_InterruptConfig::dataFrameInterruptNode
IfxMsc_DataFrameInterruptNode dataFrameInterruptNode
Specifies the Data Frame Interrupt Node.
Definition: IfxMsc_Msc.h:342
IfxMsc_En_Out
EN pin mapping structure.
Definition: IfxMsc_PinMap.h:72
IfxMsc_Msc_clearDataFrameInterrupt
IFX_INLINE void IfxMsc_Msc_clearDataFrameInterrupt(IfxMsc_Msc *msc)
Definition: IfxMsc_Msc.h:612
IfxMsc_Msc_Clock::dividerMode
IfxMsc_DividerMode dividerMode
Specifies divided clock properties.
Definition: IfxMsc_Msc.h:280
IfxMsc_Msc_DownstreamControlConfig::downstreamDataSourcesHigh
uint32 downstreamDataSourcesHigh
Specifies the Downstream Data Source selections High.
Definition: IfxMsc_Msc.h:319
IfxMsc_CommandFrameLength
IfxMsc_CommandFrameLength
Number of Bits shifted at command frames Definition in Ifx_MSC.DSC.B.NBC.
Definition: IfxMsc.h:152
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:151
IfxMsc_Msc_Config::downstreamExtensionConfig
IfxMsc_Msc_DownstreamControlExtensionConfig downstreamExtensionConfig
Specifies the Downstream Extension configuration.
Definition: IfxMsc_Msc.h:420
IfxMsc_OverflowInterrupt
IfxMsc_OverflowInterrupt
Asynchronous Block Configuration Register - Overflow Interrupt Enable Definition in Ifx_MSC...
Definition: IfxMsc.h:629
IfxMsc_Msc_CommandExtensionConfig::nDividerDownstream
IfxMsc_NDividerDownstream nDividerDownstream
For configuring DSTE.NDD divider value.
Definition: IfxMsc_Msc.h:298
IfxMsc_Msc_Abra::nDividerAbra
IfxMsc_NDividerAbra nDividerAbra
Specifies the N divider.
Definition: IfxMsc_Msc.h:271
IfxMsc_Msc_CommandExtensionConfig::commandFrameLength
IfxMsc_CommandFrameLength commandFrameLength
Definition: IfxMsc_Msc.h:289
IfxMsc_Msc_Config::downstreamConfig
IfxMsc_Msc_DownstreamControlConfig downstreamConfig
Specifies the Downstream configuration.
Definition: IfxMsc_Msc.h:419
IfxMsc_Msc_en::mode
IfxPort_OutputMode mode
Definition: IfxMsc_Msc.h:214
IfxMsc_Fclp_Out
FCLP pin mapping structure.
Definition: IfxMsc_PinMap.h:81
IfxMsc_CommandFrameInterruptNode
IfxMsc_CommandFrameInterruptNode
Interrupt Control Register - Command Frame Interrupt Node Pointer Definition in Ifx_MSC.ICR.B.ECIP.
Definition: IfxMsc.h:141
IfxMsc_Msc_InterruptConfig::commandFrameInterrupt
IfxMsc_CommandFrameInterrupt commandFrameInterrupt
Specifies the Command Frame Interrupt Mode.
Definition: IfxMsc_Msc.h:345
IfxMsc_Msc_CommandExtensionConfig::srlBitsShiftedAtDataFramesExtension
IfxMsc_MsbBitDataExtension srlBitsShiftedAtDataFramesExtension
Adds 16 to number of SRL data frame bits if enabled.
Definition: IfxMsc_Msc.h:295
IfxMsc_Msc_receiveData
IFX_EXTERN uint32 IfxMsc_Msc_receiveData(IfxMsc_Msc *msc, uint8 upstreamIdx)
receive upstream data
Definition: IfxMsc_Msc.c:637
IfxMsc_Msc_CommandExtensionConfig
Configuration Settings for CX mode.
Definition: IfxMsc_Msc.h:286
IfxMsc_Msc_DownstreamControlConfig::injectionPositionPin0
IfxMsc_ExternalBitInjectionPosition injectionPositionPin0
Specifies the Injection Position Pin 0.
Definition: IfxMsc_Msc.h:314
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxMsc_Msc_UpstreamStatusConfig::upstreamChannelFrameType
IfxMsc_UpstreamChannelFrameType upstreamChannelFrameType
Specifies the Upstream Channel Frame Type.
Definition: IfxMsc_Msc.h:391
IfxMsc_Inj_In
INJ pin mapping structure.
Definition: IfxMsc_PinMap.h:56
IfxMsc_Msc_DownstreamControlConfig
Downstream Control Configuration Structure.
Definition: IfxMsc_Msc.h:303
IfxMsc_UnderflowInterrupt
IfxMsc_UnderflowInterrupt
Asynchronous Block Configuration Register - Underflow Interrupt Enable Definition in Ifx_MSC...
Definition: IfxMsc.h:836
IfxMsc_UpstreamTimeoutValue
IfxMsc_UpstreamTimeoutValue
Upstream Control Enhanced Register 1 - Upstream Timeout Value Definition in Ifx_MSC.USCE.B.USTOVAL.
Definition: IfxMsc.h:925
IfxMsc_getActiveDataFrameStatus
boolean IfxMsc_getActiveDataFrameStatus(Ifx_MSC *msc)
get the status of the active data frame
Definition: IfxMsc.c:134
IfxMsc_Msc_Config::interruptConfig
IfxMsc_Msc_InterruptConfig interruptConfig
Specifies the Interrupt configuration.
Definition: IfxMsc_Msc.h:417
IfxMsc_Msc_DownstreamControlConfig::emergencyStopEnableBits
uint32 emergencyStopEnableBits
Emergency Stop.
Definition: IfxMsc_Msc.h:320
IfxMsc_FclLinePolarity
IfxMsc_FclLinePolarity
Output Control Register - FCLP Line Polarity Definition in Ifx_MSC.OCR.B.CLP.
Definition: IfxMsc.h:544
IfxMsc_Msc_InterruptConfig::receiveDataInterruptNode
IfxMsc_ReceiveDataInterruptNode receiveDataInterruptNode
Specifies the Receive Interrupt Node.
Definition: IfxMsc_Msc.h:348
IfxMsc_Msc_Io::inj0
IfxMsc_Msc_inj0 inj0
Definition: IfxMsc_Msc.h:371
IfxMsc_Msc_inj0
Definition: IfxMsc_Msc.h:229
IfxMsc_Msc_inj1
Definition: IfxMsc_Msc.h:235
IfxMsc_Msc_initModuleConfig
IFX_EXTERN void IfxMsc_Msc_initModuleConfig(IfxMsc_Msc_Config *config, Ifx_MSC *msc)
initialize the MSC module configuration
Definition: IfxMsc_Msc.c:413
IfxMsc_Msc_DownstreamControlConfig::downstreamDataSourcesLow
uint32 downstreamDataSourcesLow
Specifies the Downstream Data Source selections Low.
Definition: IfxMsc_Msc.h:318
IfxMsc_Msc_UpstreamStatusConfig::upstreamChannelReceivingRate
IfxMsc_UpstreamChannelReceivingRate upstreamChannelReceivingRate
Specifies the Upstream Channel Receiving Rate.
Definition: IfxMsc_Msc.h:392
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:81
IfxMsc_Msc_Abra::lowPhaseOfShiftClock
IfxMsc_ShiftClockPhaseDuration lowPhaseOfShiftClock
Specifies Low phase of shift clock.
Definition: IfxMsc_Msc.h:268
IfxMsc_ExternalBitInjectionPosition
IfxMsc_ExternalBitInjectionPosition
Downstream Control Enhanced Register - Injection Position of the Pin 0 and 1 Signal Definition in Ifx...
Definition: IfxMsc.h:447
IfxMsc_Msc_OutputControlConfig
Output Control Configuration Structure.
Definition: IfxMsc_Msc.h:378
IfxMsc_Msc_Clock::baudrate
uint32 baudrate
Specifies the baud rate.
Definition: IfxMsc_Msc.h:279
IfxMsc_UnderflowInterruptNode
IfxMsc_UnderflowInterruptNode
Asynchronous Block Configuration Register - Underflow Interrupt Node Pointer Definition in Ifx_MSC...
Definition: IfxMsc.h:845
IfxMsc_Msc_DownstreamControlConfig::transmissionMode
IfxMsc_TransmissionMode transmissionMode
Specifies the transmission Mode.
Definition: IfxMsc_Msc.h:305
IfxMsc_Sop_Out
SOP pin mapping structure.
Definition: IfxMsc_PinMap.h:97
IfxMsc_Msc_UpstreamStatusConfig
Upstream Control Configuration Structure.
Definition: IfxMsc_Msc.h:389
IfxMsc_UpstreamTimeoutInterruptNode
IfxMsc_UpstreamTimeoutInterruptNode
Upstream Control Enhanced Register 1 - Upstream Timeout Interrupt Node Pointer Definition in Ifx_MSC...
Definition: IfxMsc.h:890
IfxMsc_UpstreamChannelFrameType
IfxMsc_UpstreamChannelFrameType
Channel Frame Type Definition in Ifx_MSC.USR.B.UFT.
Definition: IfxMsc.h:857
IfxMsc_DataFrameInterruptNode
IfxMsc_DataFrameInterruptNode
Interrupt Control Register - Data Frame Interrupt Node Pointer Definition in Ifx_MSC.ICR.B.EDIP.
Definition: IfxMsc.h:348
IfxMsc_Msc_Abra
ABRA block Configuration Structure.
Definition: IfxMsc_Msc.h:265
IfxMsc_Msc_Clock::step
uint16 step
Specifies the step value.
Definition: IfxMsc_Msc.h:281
IfxMsc_ShiftClockPhaseDuration
IfxMsc_ShiftClockPhaseDuration
Asynchronous Block Configuration Register - Duration of the Low/High Phase of the Shift Clock Definit...
Definition: IfxMsc.h:737
IfxMsc_Msc_sop::pin
IfxMsc_Sop_Out * pin
Definition: IfxMsc_Msc.h:255
IfxMsc_Msc_OutputControlConfig::sdiLinePolarity
IfxMsc_SdiLinePolarity sdiLinePolarity
Specifies the ILP Polarity.
Definition: IfxMsc_Msc.h:383
IfxMsc_Msc_Io
MSC Pin Configuration Structure.
Definition: IfxMsc_Msc.h:360
IfxMsc_Msc_Io::en0
IfxMsc_Msc_en en0
Definition: IfxMsc_Msc.h:366
IfxMsc_Msc_inj0::pin
IfxMsc_Inj_In * pin
Definition: IfxMsc_Msc.h:231
IfxMsc_Msc_Io::inj1
IfxMsc_Msc_inj1 inj1
Definition: IfxMsc_Msc.h:372
IfxMsc_DataFramePassivePhaseLength
IfxMsc_DataFramePassivePhaseLength
Passive Phase Length at Data Frames Definition in Ifx_MSC.DSC.B.PPD.
Definition: IfxMsc.h:383
IfxMsc_DataFrameLength
IfxMsc_DataFrameLength
Number of SRx[] (x->SRL/SRH) Bits Shifted at Data Frames Definition in Ifx_MSC.DSC.B.NDBH and Ifx_MSC.DSC.B.NDBL.
Definition: IfxMsc.h:359
IfxMsc_Msc_Target_high
MSC Target High.
Definition: IfxMsc_Msc.h:200
IfxMsc_Target
IfxMsc_Target
Msc Targets - use as chip enable selection for ENH, ENL and ENC.
Definition: IfxMsc.h:796
IfxMsc_Msc_Io::son
IfxMsc_Msc_son son
Definition: IfxMsc_Msc.h:365
IfxMsc_Msc_Config
MSC Module Configuration Structure.
Definition: IfxMsc_Msc.h:412
IfxMsc_Msc_Clock
Clock configuration data Structure.
Definition: IfxMsc_Msc.h:277
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxMsc_Msc_DownstreamControlExtensionConfig::dataFrameExtensionPassivePhaseLength
IfxMsc_DataFrameExtensionPassivePhaseLength dataFrameExtensionPassivePhaseLength
Specifies the Passive Phase Length at Data Frames Extension.
Definition: IfxMsc_Msc.h:333
IfxMsc_DataFrameExtensionPassivePhaseLength
IfxMsc_DataFrameExtensionPassivePhaseLength
Downstream Timing Extension Register - Passive Phase Length at Data Frames Extension Definition in If...
Definition: IfxMsc.h:327
IfxMsc_Msc_DownstreamControlExtensionConfig::controlFrameExtensionPassivePhaseLength
IfxMsc_ControlFrameExtensionPassivePhaseLength controlFrameExtensionPassivePhaseLength
Specifies the Passive Phase Length at Control Frames Extension.
Definition: IfxMsc_Msc.h:334
IfxMsc_Msc_CommandExtensionConfig::srhDataFrameLength
IfxMsc_DataFrameLength srhDataFrameLength
Number of SRH bits to be transmitted.
Definition: IfxMsc_Msc.h:294
IfxMsc_Msc_CommandExtensionConfig::extension
IfxMsc_Extension extension
To enable or disable the CX mode.
Definition: IfxMsc_Msc.h:288
IfxMsc_FclClockControlEnabled
IfxMsc_FclClockControlEnabled
Output Control Register - Clock Control Definition in Ifx_MSC.OCR.B.CLKCTRL.
Definition: IfxMsc.h:535
IfxMsc_Msc_Config::outputControlConfig
IfxMsc_Msc_OutputControlConfig outputControlConfig
Specifies the Output Control configuration.
Definition: IfxMsc_Msc.h:418
IfxMsc_Msc_Config::io
IfxMsc_Msc_Io io
Specifies the IO Pin configuration.
Definition: IfxMsc_Msc.h:423
IfxMsc_getDataFrameInterruptFlag
boolean IfxMsc_getDataFrameInterruptFlag(Ifx_MSC *msc)
get the status of the data frame interrupt flag
Definition: IfxMsc.c:157
IfxMsc_CommandFrameInterrupt
IfxMsc_CommandFrameInterrupt
Interrupt Control Register - Command Frame Interrupt Enable Definition in Ifx_MSC.ICR.B.ECIE.
Definition: IfxMsc.h:132
IfxMsc_Msc_CommandExtensionConfig::srhBitsShiftedAtDataFramesExtension
IfxMsc_MsbBitDataExtension srhBitsShiftedAtDataFramesExtension
Adds 16 to number of SRH data frame bits if enabled.
Definition: IfxMsc_Msc.h:296
IfxMsc_Msc_UpstreamStatusConfig::parity
IfxMsc_Parity parity
Specifies the Parity Mode.
Definition: IfxMsc_Msc.h:393
IfxMsc_ChipSelectActiveState
IfxMsc_ChipSelectActiveState
Output Control Register - Chip Selection Line Polarity Definition in Ifx_MSC.OCR.B.CSLP.
Definition: IfxMsc.h:105
IfxMsc_Msc_Io::sop
IfxMsc_Msc_sop sop
Definition: IfxMsc_Msc.h:364


iLLD_TC38A: IfxMsc_PinMap.c Source File

  • _PinMap
IfxMsc_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxMsc_PinMap.c
3 * \brief MSC I/O map
4 * \ingroup IfxLld_Msc
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "IfxMsc_PinMap.h"
44
45 IfxMsc_En_Out IfxMsc0_EN0_P10_2_OUT = {&MODULE_MSC0, 0, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt4};
46 IfxMsc_En_Out IfxMsc0_EN0_P10_3_OUT = {&MODULE_MSC0, 0, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt4};
47 IfxMsc_En_Out IfxMsc0_EN0_P10_4_OUT = {&MODULE_MSC0, 0, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt5};
48 IfxMsc_En_Out IfxMsc0_EN0_P11_11_OUT = {&MODULE_MSC0, 0, {&MODULE_P11,11}, IfxPort_OutputIdx_alt5};
49 IfxMsc_En_Out IfxMsc0_EN0_P14_10_OUT = {&MODULE_MSC0, 0, {&MODULE_P14,10}, IfxPort_OutputIdx_alt3};
50 IfxMsc_En_Out IfxMsc0_EN0_P15_5_OUT = {&MODULE_MSC0, 0, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt5};
51 IfxMsc_En_Out IfxMsc0_EN1_P10_1_OUT = {&MODULE_MSC0, 1, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt4};
52 IfxMsc_En_Out IfxMsc0_EN1_P11_2_OUT = {&MODULE_MSC0, 1, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt5};
53 IfxMsc_En_Out IfxMsc0_EN1_P13_0_OUT = {&MODULE_MSC0, 1, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt4};
54 IfxMsc_En_Out IfxMsc0_EN1_P14_9_OUT = {&MODULE_MSC0, 1, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt3};
55 IfxMsc_En_Out IfxMsc0_EN1_P15_3_OUT = {&MODULE_MSC0, 1, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt5};
56 IfxMsc_En_Out IfxMsc1_EN0_P23_4_OUT = {&MODULE_MSC1, 0, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt5};
57 IfxMsc_En_Out IfxMsc1_EN0_P32_4_OUT = {&MODULE_MSC1, 0, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt5};
58 IfxMsc_En_Out IfxMsc1_EN1_P23_5_OUT = {&MODULE_MSC1, 1, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt5};
59 IfxMsc_En_Out IfxMsc2_EN0_P13_4_OUT = {&MODULE_MSC2, 0, {&MODULE_P13, 4}, IfxPort_OutputIdx_alt4};
60 IfxMsc_En_Out IfxMsc2_EN0_P14_14_OUT = {&MODULE_MSC2, 0, {&MODULE_P14,14}, IfxPort_OutputIdx_alt4};
61 IfxMsc_En_Out IfxMsc2_EN1_P14_13_OUT = {&MODULE_MSC2, 1, {&MODULE_P14,13}, IfxPort_OutputIdx_alt4};
62 IfxMsc_En_Out IfxMsc2_EN2_P14_11_OUT = {&MODULE_MSC2, 2, {&MODULE_P14,11}, IfxPort_OutputIdx_alt4};
63 IfxMsc_Fcln_Out IfxMsc0_FCLN_P13_0_OUT = {&MODULE_MSC0, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt5};
64 IfxMsc_Fcln_Out IfxMsc1_FCLN_P22_0_OUT = {&MODULE_MSC1, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt5};
65 IfxMsc_Fcln_Out IfxMsc2_FCLN_P13_4_OUT = {&MODULE_MSC2, {&MODULE_P13, 4}, IfxPort_OutputIdx_alt5};
66 IfxMsc_Fclp_Out IfxMsc0_FCLP_P11_6_OUT = {&MODULE_MSC0, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt5};
67 IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_1_OUT = {&MODULE_MSC0, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt5};
68 IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_2_OUT = {&MODULE_MSC0, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt4};
69 IfxMsc_Fclp_Out IfxMsc1_FCLP_P22_1_OUT = {&MODULE_MSC1, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt5};
70 IfxMsc_Fclp_Out IfxMsc2_FCLP_P13_5_OUT = {&MODULE_MSC2, {&MODULE_P13, 5}, IfxPort_OutputIdx_alt5};
71 IfxMsc_Inj_In IfxMsc0_INJ0_P00_0_IN = {&MODULE_MSC0, {&MODULE_P00, 0}, Ifx_RxSel_a};
72 IfxMsc_Inj_In IfxMsc0_INJ1_P10_5_IN = {&MODULE_MSC0, {&MODULE_P10, 5}, Ifx_RxSel_b};
73 IfxMsc_Inj_In IfxMsc1_INJ0_P23_3_IN = {&MODULE_MSC1, {&MODULE_P23, 3}, Ifx_RxSel_a};
74 IfxMsc_Inj_In IfxMsc1_INJ1_P33_13_IN = {&MODULE_MSC1, {&MODULE_P33,13}, Ifx_RxSel_b};
75 IfxMsc_Inj_In IfxMsc2_INJ0_P13_13_IN = {&MODULE_MSC2, {&MODULE_P13,13}, Ifx_RxSel_a};
76 IfxMsc_Inj_In IfxMsc2_INJ1_P14_15_IN = {&MODULE_MSC2, {&MODULE_P14,15}, Ifx_RxSel_b};
77 IfxMsc_Sdi_In IfxMsc0_SDI0_P11_10_IN = {&MODULE_MSC0, {&MODULE_P11,10}, Ifx_RxSel_a};
78 IfxMsc_Sdi_In IfxMsc0_SDI1_P10_2_IN = {&MODULE_MSC0, {&MODULE_P10, 2}, Ifx_RxSel_b};
79 IfxMsc_Sdi_In IfxMsc0_SDI2_P14_3_IN = {&MODULE_MSC0, {&MODULE_P14, 3}, Ifx_RxSel_c};
80 IfxMsc_Sdi_In IfxMsc0_SDI3_P11_3_IN = {&MODULE_MSC0, {&MODULE_P11, 3}, Ifx_RxSel_d};
81 IfxMsc_Sdi_In IfxMsc1_SDI0_P23_1_IN = {&MODULE_MSC1, {&MODULE_P23, 1}, Ifx_RxSel_a};
82 IfxMsc_Sdi_In IfxMsc1_SDI1_P02_3_IN = {&MODULE_MSC1, {&MODULE_P02, 3}, Ifx_RxSel_b};
83 IfxMsc_Sdi_In IfxMsc1_SDI2_P32_4_IN = {&MODULE_MSC1, {&MODULE_P32, 4}, Ifx_RxSel_c};
84 IfxMsc_Sdi_In IfxMsc2_SDI0_P14_12_IN = {&MODULE_MSC2, {&MODULE_P14,12}, Ifx_RxSel_a};
85 IfxMsc_Sdi_In IfxMsc2_SDI1_P14_11_IN = {&MODULE_MSC2, {&MODULE_P14,11}, Ifx_RxSel_b};
86 IfxMsc_Son_Out IfxMsc0_SON_P13_2_OUT = {&MODULE_MSC0, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt5};
87 IfxMsc_Son_Out IfxMsc1_SON_P22_2_OUT = {&MODULE_MSC1, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt5};
88 IfxMsc_Son_Out IfxMsc2_SON_P13_6_OUT = {&MODULE_MSC2, {&MODULE_P13, 6}, IfxPort_OutputIdx_alt5};
89 IfxMsc_Sop_Out IfxMsc0_SOP_P11_9_OUT = {&MODULE_MSC0, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt5};
90 IfxMsc_Sop_Out IfxMsc0_SOP_P13_3_OUT = {&MODULE_MSC0, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt5};
91 IfxMsc_Sop_Out IfxMsc1_SOP_P22_3_OUT = {&MODULE_MSC1, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt5};
92 IfxMsc_Sop_Out IfxMsc2_SOP_P13_7_OUT = {&MODULE_MSC2, {&MODULE_P13, 7}, IfxPort_OutputIdx_alt5};
93 IfxMsc_Sop_Out IfxMsc2_SOP_P14_11_OUT = {&MODULE_MSC2, {&MODULE_P14,11}, IfxPort_OutputIdx_alt5};
94
95
96 const IfxMsc_En_Out *IfxMsc_En_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_NUM_TARGETS][IFXMSC_PINMAP_EN_OUT_NUM_ITEMS] = {
97 {
98 {
99 &IfxMsc0_EN0_P10_2_OUT,
100 &IfxMsc0_EN0_P10_3_OUT,
101 &IfxMsc0_EN0_P10_4_OUT,
102 &IfxMsc0_EN0_P11_11_OUT,
103 &IfxMsc0_EN0_P14_10_OUT,
104 &IfxMsc0_EN0_P15_5_OUT
105 },
106 {
107 &IfxMsc0_EN1_P10_1_OUT,
108 &IfxMsc0_EN1_P11_2_OUT,
109 &IfxMsc0_EN1_P13_0_OUT,
110 &IfxMsc0_EN1_P14_9_OUT,
111 &IfxMsc0_EN1_P15_3_OUT,
112 NULL_PTR
113 },
114 {
115 NULL_PTR,
116 NULL_PTR,
117 NULL_PTR,
118 NULL_PTR,
119 NULL_PTR,
120 NULL_PTR
121 }
122 },
123 {
124 {
125 &IfxMsc1_EN0_P23_4_OUT,
126 &IfxMsc1_EN0_P32_4_OUT,
127 NULL_PTR,
128 NULL_PTR,
129 NULL_PTR,
130 NULL_PTR
131 },
132 {
133 &IfxMsc1_EN1_P23_5_OUT,
134 NULL_PTR,
135 NULL_PTR,
136 NULL_PTR,
137 NULL_PTR,
138 NULL_PTR
139 },
140 {
141 NULL_PTR,
142 NULL_PTR,
143 NULL_PTR,
144 NULL_PTR,
145 NULL_PTR,
146 NULL_PTR
147 }
148 },
149 {
150 {
151 &IfxMsc2_EN0_P13_4_OUT,
152 &IfxMsc2_EN0_P14_14_OUT,
153 NULL_PTR,
154 NULL_PTR,
155 NULL_PTR,
156 NULL_PTR
157 },
158 {
159 &IfxMsc2_EN1_P14_13_OUT,
160 NULL_PTR,
161 NULL_PTR,
162 NULL_PTR,
163 NULL_PTR,
164 NULL_PTR
165 },
166 {
167 &IfxMsc2_EN2_P14_11_OUT,
168 NULL_PTR,
169 NULL_PTR,
170 NULL_PTR,
171 NULL_PTR,
172 NULL_PTR
173 }
174 }
175 };
176
177 const IfxMsc_Fcln_Out *IfxMsc_Fcln_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS] = {
178 {
179 &IfxMsc0_FCLN_P13_0_OUT
180 },
181 {
182 &IfxMsc1_FCLN_P22_0_OUT
183 },
184 {
185 &IfxMsc2_FCLN_P13_4_OUT
186 }
187 };
188
189 const IfxMsc_Fclp_Out *IfxMsc_Fclp_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS] = {
190 {
191 &IfxMsc0_FCLP_P11_6_OUT,
192 &IfxMsc0_FCLP_P13_1_OUT,
193 &IfxMsc0_FCLP_P13_2_OUT
194 },
195 {
196 &IfxMsc1_FCLP_P22_1_OUT,
197 NULL_PTR,
198 NULL_PTR
199 },
200 {
201 &IfxMsc2_FCLP_P13_5_OUT,
202 NULL_PTR,
203 NULL_PTR
204 }
205 };
206
207 const IfxMsc_Inj_In *IfxMsc_Inj_In_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_INJ_IN_NUM_ITEMS] = {
208 {
209 &IfxMsc0_INJ0_P00_0_IN,
210 &IfxMsc0_INJ1_P10_5_IN
211 },
212 {
213 &IfxMsc1_INJ0_P23_3_IN,
214 &IfxMsc1_INJ1_P33_13_IN
215 },
216 {
217 &IfxMsc2_INJ0_P13_13_IN,
218 &IfxMsc2_INJ1_P14_15_IN
219 }
220 };
221
222 const IfxMsc_Sdi_In *IfxMsc_Sdi_In_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SDI_IN_NUM_ITEMS] = {
223 {
224 &IfxMsc0_SDI0_P11_10_IN,
225 &IfxMsc0_SDI1_P10_2_IN,
226 &IfxMsc0_SDI2_P14_3_IN,
227 &IfxMsc0_SDI3_P11_3_IN
228 },
229 {
230 &IfxMsc1_SDI0_P23_1_IN,
231 &IfxMsc1_SDI1_P02_3_IN,
232 &IfxMsc1_SDI2_P32_4_IN,
233 NULL_PTR
234 },
235 {
236 &IfxMsc2_SDI0_P14_12_IN,
237 &IfxMsc2_SDI1_P14_11_IN,
238 NULL_PTR,
239 NULL_PTR
240 }
241 };
242
243 const IfxMsc_Son_Out *IfxMsc_Son_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SON_OUT_NUM_ITEMS] = {
244 {
245 &IfxMsc0_SON_P13_2_OUT
246 },
247 {
248 &IfxMsc1_SON_P22_2_OUT
249 },
250 {
251 &IfxMsc2_SON_P13_6_OUT
252 }
253 };
254
255 const IfxMsc_Sop_Out *IfxMsc_Sop_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS] = {
256 {
257 &IfxMsc0_SOP_P11_9_OUT,
258 &IfxMsc0_SOP_P13_3_OUT
259 },
260 {
261 &IfxMsc1_SOP_P22_3_OUT,
262 NULL_PTR
263 },
264 {
265 &IfxMsc2_SOP_P13_7_OUT,
266 &IfxMsc2_SOP_P14_11_OUT
267 }
268 };
IfxMsc1_INJ0_P23_3_IN
IfxMsc_Inj_In IfxMsc1_INJ0_P23_3_IN
Definition: IfxMsc_PinMap.c:73
IfxMsc0_EN0_P10_3_OUT
IfxMsc_En_Out IfxMsc0_EN0_P10_3_OUT
Definition: IfxMsc_PinMap.c:46
IfxMsc_Sdi_In
SDI pin mapping structure.
Definition: IfxMsc_PinMap.h:64
IfxMsc2_SOP_P14_11_OUT
IfxMsc_Sop_Out IfxMsc2_SOP_P14_11_OUT
Definition: IfxMsc_PinMap.c:93
IfxMsc0_EN0_P10_2_OUT
IfxMsc_En_Out IfxMsc0_EN0_P10_2_OUT
Definition: IfxMsc_PinMap.c:45
Ifx_RxSel_d
Definition: Ifx_Types.h:132
IFXMSC_PINMAP_SDI_IN_NUM_ITEMS
#define IFXMSC_PINMAP_SDI_IN_NUM_ITEMS
Definition: IfxMsc_PinMap.h:169
IfxMsc2_INJ0_P13_13_IN
IfxMsc_Inj_In IfxMsc2_INJ0_P13_13_IN
Definition: IfxMsc_PinMap.c:75
IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS
#define IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS
Definition: IfxMsc_PinMap.h:166
IfxMsc1_SDI0_P23_1_IN
IfxMsc_Sdi_In IfxMsc1_SDI0_P23_1_IN
Definition: IfxMsc_PinMap.c:81
IfxMsc1_SDI2_P32_4_IN
IfxMsc_Sdi_In IfxMsc1_SDI2_P32_4_IN
Definition: IfxMsc_PinMap.c:83
IfxMsc2_SON_P13_6_OUT
IfxMsc_Son_Out IfxMsc2_SON_P13_6_OUT
Definition: IfxMsc_PinMap.c:88
IfxMsc0_FCLP_P13_1_OUT
IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_1_OUT
Definition: IfxMsc_PinMap.c:67
IfxMsc2_INJ1_P14_15_IN
IfxMsc_Inj_In IfxMsc2_INJ1_P14_15_IN
Definition: IfxMsc_PinMap.c:76
IfxMsc0_INJ1_P10_5_IN
IfxMsc_Inj_In IfxMsc0_INJ1_P10_5_IN
Definition: IfxMsc_PinMap.c:72
IfxMsc0_EN0_P10_4_OUT
IfxMsc_En_Out IfxMsc0_EN0_P10_4_OUT
Definition: IfxMsc_PinMap.c:47
IfxMsc2_SDI1_P14_11_IN
IfxMsc_Sdi_In IfxMsc2_SDI1_P14_11_IN
Definition: IfxMsc_PinMap.c:85
IfxMsc_Fcln_Out_pinTable
const IfxMsc_Fcln_Out * IfxMsc_Fcln_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS]
Definition: IfxMsc_PinMap.c:177
Ifx_RxSel_a
Definition: Ifx_Types.h:129
IfxMsc2_SDI0_P14_12_IN
IfxMsc_Sdi_In IfxMsc2_SDI0_P14_12_IN
Definition: IfxMsc_PinMap.c:84
IfxMsc2_EN1_P14_13_OUT
IfxMsc_En_Out IfxMsc2_EN1_P14_13_OUT
Definition: IfxMsc_PinMap.c:61
IfxMsc0_INJ0_P00_0_IN
IfxMsc_Inj_In IfxMsc0_INJ0_P00_0_IN
Definition: IfxMsc_PinMap.c:71
IfxMsc0_SDI2_P14_3_IN
IfxMsc_Sdi_In IfxMsc0_SDI2_P14_3_IN
Definition: IfxMsc_PinMap.c:79
IfxMsc_En_Out_pinTable
const IfxMsc_En_Out * IfxMsc_En_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_NUM_TARGETS][IFXMSC_PINMAP_EN_OUT_NUM_ITEMS]
Definition: IfxMsc_PinMap.c:96
IfxMsc1_FCLN_P22_0_OUT
IfxMsc_Fcln_Out IfxMsc1_FCLN_P22_0_OUT
Definition: IfxMsc_PinMap.c:64
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
Ifx_RxSel_b
Definition: Ifx_Types.h:130
IfxMsc0_SDI3_P11_3_IN
IfxMsc_Sdi_In IfxMsc0_SDI3_P11_3_IN
Definition: IfxMsc_PinMap.c:80
IfxMsc1_SOP_P22_3_OUT
IfxMsc_Sop_Out IfxMsc1_SOP_P22_3_OUT
Definition: IfxMsc_PinMap.c:91
IfxMsc1_FCLP_P22_1_OUT
IfxMsc_Fclp_Out IfxMsc1_FCLP_P22_1_OUT
Definition: IfxMsc_PinMap.c:69
IfxMsc0_EN1_P10_1_OUT
IfxMsc_En_Out IfxMsc0_EN1_P10_1_OUT
Definition: IfxMsc_PinMap.c:51
IfxMsc_Fclp_Out_pinTable
const IfxMsc_Fclp_Out * IfxMsc_Fclp_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS]
Definition: IfxMsc_PinMap.c:189
IfxMsc2_SOP_P13_7_OUT
IfxMsc_Sop_Out IfxMsc2_SOP_P13_7_OUT
Definition: IfxMsc_PinMap.c:92
IfxPort_OutputIdx_alt3
Definition: IfxPort.h:131
IfxMsc_Sop_Out_pinTable
const IfxMsc_Sop_Out * IfxMsc_Sop_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS]
Definition: IfxMsc_PinMap.c:255
IfxMsc0_FCLP_P13_2_OUT
IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_2_OUT
Definition: IfxMsc_PinMap.c:68
IfxMsc2_EN2_P14_11_OUT
IfxMsc_En_Out IfxMsc2_EN2_P14_11_OUT
Definition: IfxMsc_PinMap.c:62
IfxMsc0_FCLN_P13_0_OUT
IfxMsc_Fcln_Out IfxMsc0_FCLN_P13_0_OUT
Definition: IfxMsc_PinMap.c:63
IfxMsc_Son_Out_pinTable
const IfxMsc_Son_Out * IfxMsc_Son_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SON_OUT_NUM_ITEMS]
Definition: IfxMsc_PinMap.c:243
Ifx_RxSel_c
Definition: Ifx_Types.h:131
IfxMsc_Son_Out
SON pin mapping structure.
Definition: IfxMsc_PinMap.h:105
IfxMsc1_EN0_P23_4_OUT
IfxMsc_En_Out IfxMsc1_EN0_P23_4_OUT
Definition: IfxMsc_PinMap.c:56
IfxMsc2_FCLP_P13_5_OUT
IfxMsc_Fclp_Out IfxMsc2_FCLP_P13_5_OUT
Definition: IfxMsc_PinMap.c:70
IfxMsc0_EN1_P13_0_OUT
IfxMsc_En_Out IfxMsc0_EN1_P13_0_OUT
Definition: IfxMsc_PinMap.c:53
IfxMsc_Fcln_Out
FCLN pin mapping structure.
Definition: IfxMsc_PinMap.h:89
IfxMsc0_EN0_P11_11_OUT
IfxMsc_En_Out IfxMsc0_EN0_P11_11_OUT
Definition: IfxMsc_PinMap.c:48
IfxMsc2_EN0_P13_4_OUT
IfxMsc_En_Out IfxMsc2_EN0_P13_4_OUT
Definition: IfxMsc_PinMap.c:59
IFXMSC_PINMAP_INJ_IN_NUM_ITEMS
#define IFXMSC_PINMAP_INJ_IN_NUM_ITEMS
Definition: IfxMsc_PinMap.h:168
IfxMsc_En_Out
EN pin mapping structure.
Definition: IfxMsc_PinMap.h:72
IfxMsc2_EN0_P14_14_OUT
IfxMsc_En_Out IfxMsc2_EN0_P14_14_OUT
Definition: IfxMsc_PinMap.c:60
IfxPort_OutputIdx_alt4
Definition: IfxPort.h:132
IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS
#define IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS
Definition: IfxMsc_PinMap.h:171
IfxMsc0_SOP_P11_9_OUT
IfxMsc_Sop_Out IfxMsc0_SOP_P11_9_OUT
Definition: IfxMsc_PinMap.c:89
IfxMsc0_SDI1_P10_2_IN
IfxMsc_Sdi_In IfxMsc0_SDI1_P10_2_IN
Definition: IfxMsc_PinMap.c:78
IfxMsc_Fclp_Out
FCLP pin mapping structure.
Definition: IfxMsc_PinMap.h:81
IfxMsc1_EN1_P23_5_OUT
IfxMsc_En_Out IfxMsc1_EN1_P23_5_OUT
Definition: IfxMsc_PinMap.c:58
IfxMsc0_EN0_P15_5_OUT
IfxMsc_En_Out IfxMsc0_EN0_P15_5_OUT
Definition: IfxMsc_PinMap.c:50
IFXMSC_PINMAP_NUM_TARGETS
#define IFXMSC_PINMAP_NUM_TARGETS
Definition: IfxMsc_PinMap.h:164
IfxMsc0_SON_P13_2_OUT
IfxMsc_Son_Out IfxMsc0_SON_P13_2_OUT
Definition: IfxMsc_PinMap.c:86
IfxMsc0_FCLP_P11_6_OUT
IfxMsc_Fclp_Out IfxMsc0_FCLP_P11_6_OUT
Definition: IfxMsc_PinMap.c:66
IfxMsc_Inj_In
INJ pin mapping structure.
Definition: IfxMsc_PinMap.h:56
IfxMsc1_INJ1_P33_13_IN
IfxMsc_Inj_In IfxMsc1_INJ1_P33_13_IN
Definition: IfxMsc_PinMap.c:74
IfxMsc0_EN1_P14_9_OUT
IfxMsc_En_Out IfxMsc0_EN1_P14_9_OUT
Definition: IfxMsc_PinMap.c:54
IfxMsc0_SDI0_P11_10_IN
IfxMsc_Sdi_In IfxMsc0_SDI0_P11_10_IN
Definition: IfxMsc_PinMap.c:77
IfxMsc0_EN1_P15_3_OUT
IfxMsc_En_Out IfxMsc0_EN1_P15_3_OUT
Definition: IfxMsc_PinMap.c:55
IFXMSC_PINMAP_SON_OUT_NUM_ITEMS
#define IFXMSC_PINMAP_SON_OUT_NUM_ITEMS
Definition: IfxMsc_PinMap.h:170
IfxMsc1_SON_P22_2_OUT
IfxMsc_Son_Out IfxMsc1_SON_P22_2_OUT
Definition: IfxMsc_PinMap.c:87
IfxMsc1_EN0_P32_4_OUT
IfxMsc_En_Out IfxMsc1_EN0_P32_4_OUT
Definition: IfxMsc_PinMap.c:57
IfxMsc_Sop_Out
SOP pin mapping structure.
Definition: IfxMsc_PinMap.h:97
IfxMsc2_FCLN_P13_4_OUT
IfxMsc_Fcln_Out IfxMsc2_FCLN_P13_4_OUT
Definition: IfxMsc_PinMap.c:65
IfxMsc1_SDI1_P02_3_IN
IfxMsc_Sdi_In IfxMsc1_SDI1_P02_3_IN
Definition: IfxMsc_PinMap.c:82
IfxMsc_Sdi_In_pinTable
const IfxMsc_Sdi_In * IfxMsc_Sdi_In_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SDI_IN_NUM_ITEMS]
Definition: IfxMsc_PinMap.c:222
IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS
#define IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS
Definition: IfxMsc_PinMap.h:167
IfxMsc_PinMap.h
MSC I/O map.
IfxMsc0_EN0_P14_10_OUT
IfxMsc_En_Out IfxMsc0_EN0_P14_10_OUT
Definition: IfxMsc_PinMap.c:49
IfxMsc_Inj_In_pinTable
const IfxMsc_Inj_In * IfxMsc_Inj_In_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_INJ_IN_NUM_ITEMS]
Definition: IfxMsc_PinMap.c:207
IfxPort_OutputIdx_alt5
Definition: IfxPort.h:133
IFXMSC_PINMAP_EN_OUT_NUM_ITEMS
#define IFXMSC_PINMAP_EN_OUT_NUM_ITEMS
Definition: IfxMsc_PinMap.h:165
IfxMsc0_EN1_P11_2_OUT
IfxMsc_En_Out IfxMsc0_EN1_P11_2_OUT
Definition: IfxMsc_PinMap.c:52
IFXMSC_PINMAP_NUM_MODULES
#define IFXMSC_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxMsc_PinMap.h:163
IfxMsc0_SOP_P13_3_OUT
IfxMsc_Sop_Out IfxMsc0_SOP_P13_3_OUT
Definition: IfxMsc_PinMap.c:90


iLLD_TC38A: IfxMsc_PinMap.h Source File

  • _PinMap
IfxMsc_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxMsc_PinMap.h
3 * \brief MSC I/O map
4 * \ingroup IfxLld_Msc
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Msc_pinmap MSC Pin Mapping
42 * \ingroup IfxLld_Msc
43 */
44
45 #ifndef IFXMSC_PINMAP_H
46 #define IFXMSC_PINMAP_H
47
48 #include <IfxMsc_reg.h>
49 #include <_Impl/IfxMsc_cfg.h>
50 #include <Port/Std/IfxPort.h>
51
52 /** \addtogroup IfxLld_Msc_pinmap
53 * \{ */
54
55 /** \brief INJ pin mapping structure */
56 typedef const struct
57 {
58 Ifx_MSC* module; /**< \brief Base address */
59 IfxPort_Pin pin; /**< \brief Port pin */
60 Ifx_RxSel select; /**< \brief Input multiplexer value */
61 } IfxMsc_Inj_In;
62
63 /** \brief SDI pin mapping structure */
64 typedef const struct
65 {
66 Ifx_MSC* module; /**< \brief Base address */
67 IfxPort_Pin pin; /**< \brief Port pin */
68 Ifx_RxSel select; /**< \brief Input multiplexer value */
69 } IfxMsc_Sdi_In;
70
71 /** \brief EN pin mapping structure */
72 typedef const struct
73 {
74 Ifx_MSC* module; /**< \brief Base address */
75 uint8 target; /**< \brief Target ID */
76 IfxPort_Pin pin; /**< \brief Port pin */
77 IfxPort_OutputIdx select; /**< \brief Port control code */
78 } IfxMsc_En_Out;
79
80 /** \brief FCLP pin mapping structure */
81 typedef const struct
82 {
83 Ifx_MSC* module; /**< \brief Base address */
84 IfxPort_Pin pin; /**< \brief Port pin */
85 IfxPort_OutputIdx select; /**< \brief Port control code */
86 } IfxMsc_Fclp_Out;
87
88 /** \brief FCLN pin mapping structure */
89 typedef const struct
90 {
91 Ifx_MSC* module; /**< \brief Base address */
92 IfxPort_Pin pin; /**< \brief Port pin */
93 IfxPort_OutputIdx select; /**< \brief Port control code */
94 } IfxMsc_Fcln_Out;
95
96 /** \brief SOP pin mapping structure */
97 typedef const struct
98 {
99 Ifx_MSC* module; /**< \brief Base address */
100 IfxPort_Pin pin; /**< \brief Port pin */
101 IfxPort_OutputIdx select; /**< \brief Port control code */
102 } IfxMsc_Sop_Out;
103
104 /** \brief SON pin mapping structure */
105 typedef const struct
106 {
107 Ifx_MSC* module; /**< \brief Base address */
108 IfxPort_Pin pin; /**< \brief Port pin */
109 IfxPort_OutputIdx select; /**< \brief Port control code */
110 } IfxMsc_Son_Out;
111
112 IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P10_2_OUT; /**< \brief Chip Select */
113 IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P10_3_OUT; /**< \brief Chip Select */
114 IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P10_4_OUT; /**< \brief Chip Select */
115 IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P11_11_OUT; /**< \brief Chip Select */
116 IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P14_10_OUT; /**< \brief Chip Select */
117 IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P15_5_OUT; /**< \brief Chip Select */
118 IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P10_1_OUT; /**< \brief Chip Select */
119 IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P11_2_OUT; /**< \brief Chip Select */
120 IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P13_0_OUT; /**< \brief Chip Select */
121 IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P14_9_OUT; /**< \brief Chip Select */
122 IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P15_3_OUT; /**< \brief Chip Select */
123 IFX_EXTERN IfxMsc_En_Out IfxMsc1_EN0_P23_4_OUT; /**< \brief Chip Select */
124 IFX_EXTERN IfxMsc_En_Out IfxMsc1_EN0_P32_4_OUT; /**< \brief Chip Select */
125 IFX_EXTERN IfxMsc_En_Out IfxMsc1_EN1_P23_5_OUT; /**< \brief Chip Select */
126 IFX_EXTERN IfxMsc_En_Out IfxMsc2_EN0_P13_4_OUT; /**< \brief Chip Select */
127 IFX_EXTERN IfxMsc_En_Out IfxMsc2_EN0_P14_14_OUT; /**< \brief Chip Select */
128 IFX_EXTERN IfxMsc_En_Out IfxMsc2_EN1_P14_13_OUT; /**< \brief Chip Select */
129 IFX_EXTERN IfxMsc_En_Out IfxMsc2_EN2_P14_11_OUT; /**< \brief Chip Select */
130 IFX_EXTERN IfxMsc_Fcln_Out IfxMsc0_FCLN_P13_0_OUT; /**< \brief Shift-clock inverted part of the differential signal */
131 IFX_EXTERN IfxMsc_Fcln_Out IfxMsc1_FCLN_P22_0_OUT; /**< \brief Shift-clock inverted part of the differential signal */
132 IFX_EXTERN IfxMsc_Fcln_Out IfxMsc2_FCLN_P13_4_OUT; /**< \brief Shift-clock inverted part of the differential signal */
133 IFX_EXTERN IfxMsc_Fclp_Out IfxMsc0_FCLP_P11_6_OUT; /**< \brief Shift-clock direct part of the differential signal */
134 IFX_EXTERN IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_1_OUT; /**< \brief Shift-clock direct part of the differential signal */
135 IFX_EXTERN IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_2_OUT; /**< \brief Shift-clock direct part of the differential signal */
136 IFX_EXTERN IfxMsc_Fclp_Out IfxMsc1_FCLP_P22_1_OUT; /**< \brief Shift-clock direct part of the differential signal */
137 IFX_EXTERN IfxMsc_Fclp_Out IfxMsc2_FCLP_P13_5_OUT; /**< \brief Shift-clock direct part of the differential signal */
138 IFX_EXTERN IfxMsc_Inj_In IfxMsc0_INJ0_P00_0_IN; /**< \brief Injection signal from port */
139 IFX_EXTERN IfxMsc_Inj_In IfxMsc0_INJ1_P10_5_IN; /**< \brief Injection signal from port */
140 IFX_EXTERN IfxMsc_Inj_In IfxMsc1_INJ0_P23_3_IN; /**< \brief Injection signal from port */
141 IFX_EXTERN IfxMsc_Inj_In IfxMsc1_INJ1_P33_13_IN; /**< \brief Injection signal from port */
142 IFX_EXTERN IfxMsc_Inj_In IfxMsc2_INJ0_P13_13_IN; /**< \brief Injection signal from port */
143 IFX_EXTERN IfxMsc_Inj_In IfxMsc2_INJ1_P14_15_IN; /**< \brief Injection signal from port */
144 IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI0_P11_10_IN; /**< \brief Upstream assynchronous input signal */
145 IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI1_P10_2_IN; /**< \brief Upstream assynchronous input signal */
146 IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI2_P14_3_IN; /**< \brief Upstream assynchronous input signal */
147 IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI3_P11_3_IN; /**< \brief Upstream assynchronous input signal */
148 IFX_EXTERN IfxMsc_Sdi_In IfxMsc1_SDI0_P23_1_IN; /**< \brief Upstream assynchronous input signal */
149 IFX_EXTERN IfxMsc_Sdi_In IfxMsc1_SDI1_P02_3_IN; /**< \brief Upstream assynchronous input signal */
150 IFX_EXTERN IfxMsc_Sdi_In IfxMsc1_SDI2_P32_4_IN; /**< \brief Upstream assynchronous input signal */
151 IFX_EXTERN IfxMsc_Sdi_In IfxMsc2_SDI0_P14_12_IN; /**< \brief Upstream assynchronous input signal */
152 IFX_EXTERN IfxMsc_Sdi_In IfxMsc2_SDI1_P14_11_IN; /**< \brief Upstream assynchronous input signal */
153 IFX_EXTERN IfxMsc_Son_Out IfxMsc0_SON_P13_2_OUT; /**< \brief Data output - inverted part of the differential signal */
154 IFX_EXTERN IfxMsc_Son_Out IfxMsc1_SON_P22_2_OUT; /**< \brief Data output - inverted part of the differential signal */
155 IFX_EXTERN IfxMsc_Son_Out IfxMsc2_SON_P13_6_OUT; /**< \brief Data output - inverted part of the differential signal */
156 IFX_EXTERN IfxMsc_Sop_Out IfxMsc0_SOP_P11_9_OUT; /**< \brief Data output - direct part of the differential signal */
157 IFX_EXTERN IfxMsc_Sop_Out IfxMsc0_SOP_P13_3_OUT; /**< \brief Data output - direct part of the differential signal */
158 IFX_EXTERN IfxMsc_Sop_Out IfxMsc1_SOP_P22_3_OUT; /**< \brief Data output - direct part of the differential signal */
159 IFX_EXTERN IfxMsc_Sop_Out IfxMsc2_SOP_P13_7_OUT; /**< \brief Data output - direct part of the differential signal */
160 IFX_EXTERN IfxMsc_Sop_Out IfxMsc2_SOP_P14_11_OUT; /**< \brief Data output - direct part of the differential signal */
161
162 /** \brief Table dimensions */
163 #define IFXMSC_PINMAP_NUM_MODULES 3
164 #define IFXMSC_PINMAP_NUM_TARGETS 3
165 #define IFXMSC_PINMAP_EN_OUT_NUM_ITEMS 6
166 #define IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS 1
167 #define IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS 3
168 #define IFXMSC_PINMAP_INJ_IN_NUM_ITEMS 2
169 #define IFXMSC_PINMAP_SDI_IN_NUM_ITEMS 4
170 #define IFXMSC_PINMAP_SON_OUT_NUM_ITEMS 1
171 #define IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS 2
172
173
174 /** \brief IfxMsc_En_Out table */
175 IFX_EXTERN const IfxMsc_En_Out *IfxMsc_En_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_NUM_TARGETS][IFXMSC_PINMAP_EN_OUT_NUM_ITEMS];
176
177 /** \brief IfxMsc_Fcln_Out table */
178 IFX_EXTERN const IfxMsc_Fcln_Out *IfxMsc_Fcln_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS];
179
180 /** \brief IfxMsc_Fclp_Out table */
181 IFX_EXTERN const IfxMsc_Fclp_Out *IfxMsc_Fclp_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS];
182
183 /** \brief IfxMsc_Inj_In table */
184 IFX_EXTERN const IfxMsc_Inj_In *IfxMsc_Inj_In_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_INJ_IN_NUM_ITEMS];
185
186 /** \brief IfxMsc_Sdi_In table */
187 IFX_EXTERN const IfxMsc_Sdi_In *IfxMsc_Sdi_In_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SDI_IN_NUM_ITEMS];
188
189 /** \brief IfxMsc_Son_Out table */
190 IFX_EXTERN const IfxMsc_Son_Out *IfxMsc_Son_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SON_OUT_NUM_ITEMS];
191
192 /** \brief IfxMsc_Sop_Out table */
193 IFX_EXTERN const IfxMsc_Sop_Out *IfxMsc_Sop_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS];
194
195 /** \} */
196
197 #endif /* IFXMSC_PINMAP_H */
IfxMsc_Sdi_In
SDI pin mapping structure.
Definition: IfxMsc_PinMap.h:64
IfxMsc0_SDI0_P11_10_IN
IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI0_P11_10_IN
Upstream assynchronous input signal.
Definition: IfxMsc_PinMap.h:144
IFXMSC_PINMAP_SDI_IN_NUM_ITEMS
#define IFXMSC_PINMAP_SDI_IN_NUM_ITEMS
Definition: IfxMsc_PinMap.h:169
IfxMsc2_EN2_P14_11_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc2_EN2_P14_11_OUT
Chip Select.
Definition: IfxMsc_PinMap.h:129
IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS
#define IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS
Definition: IfxMsc_PinMap.h:166
IfxMsc1_INJ1_P33_13_IN
IFX_EXTERN IfxMsc_Inj_In IfxMsc1_INJ1_P33_13_IN
Injection signal from port.
Definition: IfxMsc_PinMap.h:141
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:126
IfxMsc1_EN1_P23_5_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc1_EN1_P23_5_OUT
Chip Select.
Definition: IfxMsc_PinMap.h:125
IfxMsc0_EN1_P13_0_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P13_0_OUT
Chip Select.
Definition: IfxMsc_PinMap.h:120
IfxMsc1_INJ0_P23_3_IN
IFX_EXTERN IfxMsc_Inj_In IfxMsc1_INJ0_P23_3_IN
Injection signal from port.
Definition: IfxMsc_PinMap.h:140
IfxMsc2_EN1_P14_13_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc2_EN1_P14_13_OUT
Chip Select.
Definition: IfxMsc_PinMap.h:128
IfxMsc0_SDI2_P14_3_IN
IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI2_P14_3_IN
Upstream assynchronous input signal.
Definition: IfxMsc_PinMap.h:146
IfxMsc0_EN0_P11_11_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P11_11_OUT
Chip Select.
Definition: IfxMsc_PinMap.h:115
IfxMsc_En_Out_pinTable
IFX_EXTERN const IfxMsc_En_Out * IfxMsc_En_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_NUM_TARGETS][IFXMSC_PINMAP_EN_OUT_NUM_ITEMS]
IfxMsc_En_Out table.
Definition: IfxMsc_PinMap.h:175
IfxMsc2_FCLP_P13_5_OUT
IFX_EXTERN IfxMsc_Fclp_Out IfxMsc2_FCLP_P13_5_OUT
Shift-clock direct part of the differential signal.
Definition: IfxMsc_PinMap.h:137
IfxMsc0_INJ1_P10_5_IN
IFX_EXTERN IfxMsc_Inj_In IfxMsc0_INJ1_P10_5_IN
Injection signal from port.
Definition: IfxMsc_PinMap.h:139
IfxMsc2_FCLN_P13_4_OUT
IFX_EXTERN IfxMsc_Fcln_Out IfxMsc2_FCLN_P13_4_OUT
Shift-clock inverted part of the differential signal.
Definition: IfxMsc_PinMap.h:132
IfxMsc_Inj_In::module
Ifx_MSC * module
Base address.
Definition: IfxMsc_PinMap.h:58
IfxMsc2_EN0_P13_4_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc2_EN0_P13_4_OUT
Chip Select.
Definition: IfxMsc_PinMap.h:126
IfxMsc1_EN0_P23_4_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc1_EN0_P23_4_OUT
Chip Select.
Definition: IfxMsc_PinMap.h:123
IfxMsc0_FCLP_P13_2_OUT
IFX_EXTERN IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_2_OUT
Shift-clock direct part of the differential signal.
Definition: IfxMsc_PinMap.h:135
IfxMsc0_FCLP_P11_6_OUT
IFX_EXTERN IfxMsc_Fclp_Out IfxMsc0_FCLP_P11_6_OUT
Shift-clock direct part of the differential signal.
Definition: IfxMsc_PinMap.h:133
IfxMsc0_EN0_P14_10_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P14_10_OUT
Chip Select.
Definition: IfxMsc_PinMap.h:116
IfxMsc2_INJ0_P13_13_IN
IFX_EXTERN IfxMsc_Inj_In IfxMsc2_INJ0_P13_13_IN
Injection signal from port.
Definition: IfxMsc_PinMap.h:142
IfxMsc0_SOP_P11_9_OUT
IFX_EXTERN IfxMsc_Sop_Out IfxMsc0_SOP_P11_9_OUT
Data output - direct part of the differential signal.
Definition: IfxMsc_PinMap.h:156
IfxMsc2_SOP_P14_11_OUT
IFX_EXTERN IfxMsc_Sop_Out IfxMsc2_SOP_P14_11_OUT
Data output - direct part of the differential signal.
Definition: IfxMsc_PinMap.h:160
IfxMsc2_SON_P13_6_OUT
IFX_EXTERN IfxMsc_Son_Out IfxMsc2_SON_P13_6_OUT
Data output - inverted part of the differential signal.
Definition: IfxMsc_PinMap.h:155
IfxMsc0_SON_P13_2_OUT
IFX_EXTERN IfxMsc_Son_Out IfxMsc0_SON_P13_2_OUT
Data output - inverted part of the differential signal.
Definition: IfxMsc_PinMap.h:153
IfxMsc0_FCLP_P13_1_OUT
IFX_EXTERN IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_1_OUT
Shift-clock direct part of the differential signal.
Definition: IfxMsc_PinMap.h:134
IfxMsc0_EN0_P10_2_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P10_2_OUT
Chip Select.
Definition: IfxMsc_PinMap.h:112
IfxMsc_Sdi_In_pinTable
IFX_EXTERN const IfxMsc_Sdi_In * IfxMsc_Sdi_In_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SDI_IN_NUM_ITEMS]
IfxMsc_Sdi_In table.
Definition: IfxMsc_PinMap.h:187
IfxMsc2_INJ1_P14_15_IN
IFX_EXTERN IfxMsc_Inj_In IfxMsc2_INJ1_P14_15_IN
Injection signal from port.
Definition: IfxMsc_PinMap.h:143
IfxMsc_Inj_In_pinTable
IFX_EXTERN const IfxMsc_Inj_In * IfxMsc_Inj_In_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_INJ_IN_NUM_ITEMS]
IfxMsc_Inj_In table.
Definition: IfxMsc_PinMap.h:184
IfxMsc_Fcln_Out_pinTable
IFX_EXTERN const IfxMsc_Fcln_Out * IfxMsc_Fcln_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS]
IfxMsc_Fcln_Out table.
Definition: IfxMsc_PinMap.h:178
IfxMsc1_SDI1_P02_3_IN
IFX_EXTERN IfxMsc_Sdi_In IfxMsc1_SDI1_P02_3_IN
Upstream assynchronous input signal.
Definition: IfxMsc_PinMap.h:149
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxMsc_En_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxMsc_PinMap.h:77
IfxMsc_Son_Out_pinTable
IFX_EXTERN const IfxMsc_Son_Out * IfxMsc_Son_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SON_OUT_NUM_ITEMS]
IfxMsc_Son_Out table.
Definition: IfxMsc_PinMap.h:190
IfxMsc0_SOP_P13_3_OUT
IFX_EXTERN IfxMsc_Sop_Out IfxMsc0_SOP_P13_3_OUT
Data output - direct part of the differential signal.
Definition: IfxMsc_PinMap.h:157
IfxMsc2_SOP_P13_7_OUT
IFX_EXTERN IfxMsc_Sop_Out IfxMsc2_SOP_P13_7_OUT
Data output - direct part of the differential signal.
Definition: IfxMsc_PinMap.h:159
IfxMsc0_INJ0_P00_0_IN
IFX_EXTERN IfxMsc_Inj_In IfxMsc0_INJ0_P00_0_IN
Injection signal from port.
Definition: IfxMsc_PinMap.h:138
IfxMsc_Sop_Out_pinTable
IFX_EXTERN const IfxMsc_Sop_Out * IfxMsc_Sop_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS]
IfxMsc_Sop_Out table.
Definition: IfxMsc_PinMap.h:193
IfxMsc_Son_Out
SON pin mapping structure.
Definition: IfxMsc_PinMap.h:105
IfxMsc1_SON_P22_2_OUT
IFX_EXTERN IfxMsc_Son_Out IfxMsc1_SON_P22_2_OUT
Data output - inverted part of the differential signal.
Definition: IfxMsc_PinMap.h:154
IfxMsc0_FCLN_P13_0_OUT
IFX_EXTERN IfxMsc_Fcln_Out IfxMsc0_FCLN_P13_0_OUT
Shift-clock inverted part of the differential signal.
Definition: IfxMsc_PinMap.h:130
IfxMsc0_EN0_P15_5_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P15_5_OUT
Chip Select.
Definition: IfxMsc_PinMap.h:117
IfxMsc1_SDI0_P23_1_IN
IFX_EXTERN IfxMsc_Sdi_In IfxMsc1_SDI0_P23_1_IN
Upstream assynchronous input signal.
Definition: IfxMsc_PinMap.h:148
IfxMsc2_EN0_P14_14_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc2_EN0_P14_14_OUT
Chip Select.
Definition: IfxMsc_PinMap.h:127
IfxMsc_Fcln_Out
FCLN pin mapping structure.
Definition: IfxMsc_PinMap.h:89
IfxMsc1_SOP_P22_3_OUT
IFX_EXTERN IfxMsc_Sop_Out IfxMsc1_SOP_P22_3_OUT
Data output - direct part of the differential signal.
Definition: IfxMsc_PinMap.h:158
IFXMSC_PINMAP_INJ_IN_NUM_ITEMS
#define IFXMSC_PINMAP_INJ_IN_NUM_ITEMS
Definition: IfxMsc_PinMap.h:168
IfxMsc_En_Out
EN pin mapping structure.
Definition: IfxMsc_PinMap.h:72
IfxMsc0_EN1_P14_9_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P14_9_OUT
Chip Select.
Definition: IfxMsc_PinMap.h:121
IfxMsc0_EN1_P15_3_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P15_3_OUT
Chip Select.
Definition: IfxMsc_PinMap.h:122
IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS
#define IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS
Definition: IfxMsc_PinMap.h:171
IfxMsc_En_Out::target
uint8 target
Target ID.
Definition: IfxMsc_PinMap.h:75
IfxMsc_Fclp_Out
FCLP pin mapping structure.
Definition: IfxMsc_PinMap.h:81
IFXMSC_PINMAP_NUM_TARGETS
#define IFXMSC_PINMAP_NUM_TARGETS
Definition: IfxMsc_PinMap.h:164
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:246
IfxMsc1_SDI2_P32_4_IN
IFX_EXTERN IfxMsc_Sdi_In IfxMsc1_SDI2_P32_4_IN
Upstream assynchronous input signal.
Definition: IfxMsc_PinMap.h:150
Ifx_RxSel
Ifx_RxSel
input multiplexer definition used in PinMaps
Definition: Ifx_Types.h:127
IfxMsc_Inj_In
INJ pin mapping structure.
Definition: IfxMsc_PinMap.h:56
IfxMsc0_EN1_P11_2_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P11_2_OUT
Chip Select.
Definition: IfxMsc_PinMap.h:119
IfxMsc0_SDI1_P10_2_IN
IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI1_P10_2_IN
Upstream assynchronous input signal.
Definition: IfxMsc_PinMap.h:145
IfxMsc1_EN0_P32_4_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc1_EN0_P32_4_OUT
Chip Select.
Definition: IfxMsc_PinMap.h:124
IfxMsc0_EN0_P10_3_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P10_3_OUT
Chip Select.
Definition: IfxMsc_PinMap.h:113
IFXMSC_PINMAP_SON_OUT_NUM_ITEMS
#define IFXMSC_PINMAP_SON_OUT_NUM_ITEMS
Definition: IfxMsc_PinMap.h:170
IfxMsc_Sop_Out
SOP pin mapping structure.
Definition: IfxMsc_PinMap.h:97
IfxMsc_Inj_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxMsc_PinMap.h:60
IfxMsc_Inj_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxMsc_PinMap.h:59
IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS
#define IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS
Definition: IfxMsc_PinMap.h:167
IfxMsc0_EN1_P10_1_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P10_1_OUT
Chip Select.
Definition: IfxMsc_PinMap.h:118
IfxMsc_Fclp_Out_pinTable
IFX_EXTERN const IfxMsc_Fclp_Out * IfxMsc_Fclp_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS]
IfxMsc_Fclp_Out table.
Definition: IfxMsc_PinMap.h:181
IfxMsc1_FCLN_P22_0_OUT
IFX_EXTERN IfxMsc_Fcln_Out IfxMsc1_FCLN_P22_0_OUT
Shift-clock inverted part of the differential signal.
Definition: IfxMsc_PinMap.h:131
IFXMSC_PINMAP_EN_OUT_NUM_ITEMS
#define IFXMSC_PINMAP_EN_OUT_NUM_ITEMS
Definition: IfxMsc_PinMap.h:165
IfxMsc2_SDI0_P14_12_IN
IFX_EXTERN IfxMsc_Sdi_In IfxMsc2_SDI0_P14_12_IN
Upstream assynchronous input signal.
Definition: IfxMsc_PinMap.h:151
IfxMsc_cfg.h
MSC on-chip implementation data.
IFXMSC_PINMAP_NUM_MODULES
#define IFXMSC_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxMsc_PinMap.h:163
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxMsc1_FCLP_P22_1_OUT
IFX_EXTERN IfxMsc_Fclp_Out IfxMsc1_FCLP_P22_1_OUT
Shift-clock direct part of the differential signal.
Definition: IfxMsc_PinMap.h:136
IfxMsc0_EN0_P10_4_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P10_4_OUT
Chip Select.
Definition: IfxMsc_PinMap.h:114
IfxMsc0_SDI3_P11_3_IN
IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI3_P11_3_IN
Upstream assynchronous input signal.
Definition: IfxMsc_PinMap.h:147
IfxMsc2_SDI1_P14_11_IN
IFX_EXTERN IfxMsc_Sdi_In IfxMsc2_SDI1_P14_11_IN
Upstream assynchronous input signal.
Definition: IfxMsc_PinMap.h:152
IfxPort.h
PORT basic functionality.


iLLD_TC38A: IfxMsc_cfg.c Source File

  • _Impl
IfxMsc_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxMsc_cfg.c
3 * \brief MSC on-chip implementation data
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 */
43
44 /******************************************************************************/
45 /*----------------------------------Includes----------------------------------*/
46 /******************************************************************************/
47
48 #include "IfxMsc_cfg.h"
49
50 /******************************************************************************/
51 /*-----------------------Exported Variables/Constants-------------------------*/
52 /******************************************************************************/
53
54 IFX_CONST IfxModule_IndexMap IfxMsc_cfg_indexMap[IFXMSC_NUM_MODULES] = {
55 {&MODULE_MSC0, IfxMsc_Index_0},
56 {&MODULE_MSC1, IfxMsc_Index_1},
57 {&MODULE_MSC2, IfxMsc_Index_2}
58 };
IfxMsc_Index_2
"MSC index "+str(x)
Definition: IfxMsc_cfg.h:84
IfxMsc_Index_0
"MSC index "+str(x)
Definition: IfxMsc_cfg.h:82
IfxMsc_Index_1
"MSC index "+str(x)
Definition: IfxMsc_cfg.h:83
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IFXMSC_NUM_MODULES
#define IFXMSC_NUM_MODULES
Definition: IfxMsc_cfg.h:67
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:140
IfxMsc_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxMsc_cfg_indexMap[IFXMSC_NUM_MODULES]
Definition: IfxMsc_cfg.c:54
IfxMsc_cfg.h
MSC on-chip implementation data.


iLLD_TC38A: IfxMsc_cfg.h Source File

  • _Impl
IfxMsc_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxMsc_cfg.h
3 * \brief MSC on-chip implementation data
4 * \ingroup IfxLld_Msc
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 *
43 * \defgroup IfxLld_Msc MSC
44 * \ingroup IfxLld
45 * \defgroup IfxLld_Msc_Impl Implementation
46 * \ingroup IfxLld_Msc
47 * \defgroup IfxLld_Msc_Std Standard Driver
48 * \ingroup IfxLld_Msc
49 * \defgroup IfxLld_Msc_Impl_Enumerations Enumerations
50 * \ingroup IfxLld_Msc_Impl
51 */
52
53 #ifndef IFXMSC_CFG_H
54 #define IFXMSC_CFG_H 1
55
56 /******************************************************************************/
57 /*----------------------------------Includes----------------------------------*/
58 /******************************************************************************/
59
60 #include "Cpu/Std/Ifx_Types.h"
61 #include "IfxMsc_reg.h"
62
63 /******************************************************************************/
64 /*-----------------------------------Macros-----------------------------------*/
65 /******************************************************************************/
66
67 #define IFXMSC_NUM_MODULES 3
68
69 #define IFXMSC_NUM_ENABLE_SELECT_LINES (4)
70
71 /******************************************************************************/
72 /*--------------------------------Enumerations--------------------------------*/
73 /******************************************************************************/
74
75 /** \addtogroup IfxLld_Msc_Impl_Enumerations
76 * \{ */
77 /** \brief List of the available MSC resources
78 */
79 typedef enum
80 {
81 IfxMsc_Index_none = -1, /**< \brief Not Selected */
82 IfxMsc_Index_0 = 0, /**< \brief "MSC index "+str(x) */
83 IfxMsc_Index_1, /**< \brief "MSC index "+str(x) */
84 IfxMsc_Index_2 /**< \brief "MSC index "+str(x) */
85 } IfxMsc_Index;
86
87 /** \} */
88
89 /******************************************************************************/
90 /*-------------------Global Exported Variables/Constants----------------------*/
91 /******************************************************************************/
92 IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxMsc_cfg_indexMap[IFXMSC_NUM_MODULES];
93
94 #endif /* IFXMSC_CFG_H */
IfxMsc_Index
IfxMsc_Index
List of the available MSC resources.
Definition: IfxMsc_cfg.h:79
IfxMsc_Index_none
Not Selected.
Definition: IfxMsc_cfg.h:81
IfxMsc_Index_2
"MSC index "+str(x)
Definition: IfxMsc_cfg.h:84
IfxMsc_Index_0
"MSC index "+str(x)
Definition: IfxMsc_cfg.h:82
IfxMsc_Index_1
"MSC index "+str(x)
Definition: IfxMsc_cfg.h:83
IfxMsc_cfg_indexMap
IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxMsc_cfg_indexMap[IFXMSC_NUM_MODULES]
Definition: IfxMsc_cfg.h:92
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IFXMSC_NUM_MODULES
#define IFXMSC_NUM_MODULES
Definition: IfxMsc_cfg.h:67
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:140


iLLD_TC38A: IfxMtu.c Source File

  • Mtu
  • Std
IfxMtu.c
Go to the documentation of this file.
1 /**
2 * \file IfxMtu.c
3 * \brief MTU basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 *
41 */
42
43 /******************************************************************************/
44 /*----------------------------------Includes----------------------------------*/
45 /******************************************************************************/
46
47 #include "IfxMtu.h"
48
49 /******************************************************************************/
50 /*----------------------------------Macros------------------------------------*/
51 /******************************************************************************/
52
53 /** \brief Set Global safety endinit.\n
54 * Note: IFXMTU_SET_GLOBAL_SAFETY_ENDINIT() function macros is added to avoid issues with tasking compiler \n when higher optimization is enabled.
55 */
56 #define IFXMTU_SET_GLOBAL_SAFETY_ENDINIT() \
57 { \
58 MODULE_SCU.SEICON0.U = (0xFFFCU << 16U) | \
59 ((MODULE_SCU.SEICON0.B.EPW ^ 0x003F) << IFX_SCU_SEICON0_EPW_OFF) | \
60 (1 << IFX_SCU_SEICON0_ENDINIT_OFF); \
61 MODULE_SCU.SEICON0.U; \
62 }
63
64 /** \brief Clear Global safety endinit.\n
65 * Note: IFXMTU_CLEAR_GLOBAL_SAFETY_ENDINIT() function macros is added to avoid issues with tasking compiler \n when higher optimization is enabled.
66 */
67 #define IFXMTU_CLEAR_GLOBAL_SAFETY_ENDINIT() \
68 { \
69 MODULE_SCU.SEICON0.U = (0xFFFCU << 16U) | \
70 ((MODULE_SCU.SEICON0.B.EPW ^ 0x003F) << IFX_SCU_SEICON0_EPW_OFF); \
71 MODULE_SCU.SEICON0.U; \
72 }
73
74 #define IFXMTU_CLEAR_SRAM_MCONTROL_CONFIG (0x4000 | (1U << IFX_MTU_MC_MCONTROL_SRAM_CLR_OFF))
75
76 /** \addtogroup IfxLld_Mtu_Std_Operative
77 * \{ */
78
79 /******************************************************************************/
80 /*-----------------------Private Function Prototypes--------------------------*/
81 /******************************************************************************/
82
83 /** \brief
84 * \param mbistConfig pointer to the configuration structure for the RAM test
85 * \return None
86 */
87 IFX_STATIC void IfxMtu_runMbistConfigMtest(const IfxMtu_MbistConfig *mbistConfig);
88
89 /** \brief
90 * \param mbistConfig pointer to the configuration structure for the RAM test
91 * \return None
92 */
93 IFX_STATIC void IfxMtu_runMbistConfigRange(const IfxMtu_MbistConfig *mbistConfig);
94
95 /** \brief
96 * \param mbistConfig pointer to the configuration structure for the RAM test
97 * \return None
98 */
99 IFX_STATIC void IfxMtu_runMbistClearRam(const IfxMtu_MbistConfig *mbistConfig);
100
101 /** \brief
102 * \param mbistConfig pointer to the configuration structure for the RAM test
103 * \return None
104 */
105 IFX_STATIC void IfxMtu_runMbistConfigPatterns(const IfxMtu_MbistConfig *mbistConfig);
106
107 /** \brief
108 * \param testsDone tests Done status
109 * \return test done status
110 */
111 IFX_STATIC boolean IfxMtu_runMbistEnd(uint32 testsDone);
112
113 /** \} */
114
115 /******************************************************************************/
116 /*-------------------------Function Implementations---------------------------*/
117 /******************************************************************************/
118
119 void IfxMtu_clearErrorTracking(IfxMtu_MbistSel mbistSel)
120 {
121 Ifx_MTU_MC *mc = &MODULE_MTU.MC[mbistSel];
122 mc->ECCD.U |= (1 << IFX_MTU_MC_ECCD_TRC_OFF);
123 }
124
125
126 void IfxMtu_clearSram(IfxMtu_MbistSel mbistSel)
127 {
128 uint8 isEndInitEnabled = 0;
129 uint16 password = 0;
130
131 password = IfxScuWdt_getSafetyWatchdogPassword();
132
133 /* Check if the Endinit is cleared by application. If not, then handle it internally inside teh function.*/
134 if (IfxScuWdt_getSafetyWatchdogEndInit() == 1U)
135 {
136 /* Clear EndInit */
137 IfxScuWdt_clearSafetyEndinit(password);
138 isEndInitEnabled = 1;
139 }
140
141 IfxMtu_clearSramStart(mbistSel);
142
143 /* Set EndInit Watchdog (to prevent Watchdog TO)*/
144 IfxScuWdt_setSafetyEndinit(password);
145
146 /* wait for the end of the fill operation */
147
148 while (!IfxMtu_isMbistDone(mbistSel))
149 {
150 __nop();
151 }
152
153 /* Clear EndInit */
154 IfxScuWdt_clearSafetyEndinit(password);
155
156 IfxMtu_clearSramContinue(mbistSel);
157
158 if (isEndInitEnabled == 1)
159 {
160 /* Set EndInit Watchdog (to prevent Watchdog TO)*/
161 IfxScuWdt_setSafetyEndinit(password);
162 }
163 }
164
165
166 void IfxMtu_clearSramContinue(IfxMtu_MbistSel mbistSel)
167 {
168 /* Before clearing the ECC error flags we've to issue a dummy SRAM access to get a valid memory output */
169 IfxMtu_readSramAddress(mbistSel, 0x0000);
170 /* Note: a SMU alarm will be flagged HERE if the wrong ECC has been written! */
171 IfxMtu_disableMbistShell(mbistSel);
172
173 /* for auto-init memories: wait for the end of the clear operation */
174 while (IfxMtu_isAutoInitRunning(mbistSel))
175 {}
176 }
177
178
179 void IfxMtu_clearSramStart(IfxMtu_MbistSel mbistSel)
180 {
181 Ifx_MTU_MC *mc = &MODULE_MTU.MC[mbistSel];
182
183 IfxMtu_enableMbistShell(mbistSel);
184
185 /* for auto-init memories: wait for the end of the clear operation */
186 while (IfxMtu_isAutoInitRunning(mbistSel))
187 {}
188
189 /* start init operation */
190 uint16 mcontrolMask = 0x4000; /* set USERED flag */
191 mc->MCONTROL.U = mcontrolMask | (1 << IFX_MTU_MC_MCONTROL_SRAM_CLR_OFF) | (1 << IFX_MTU_MC_MCONTROL_START_OFF); /* START = SRAM_CLR = 1 */
192 mc->MCONTROL.U = mcontrolMask | (1 << IFX_MTU_MC_MCONTROL_SRAM_CLR_OFF);
193 }
194
195
196 void IfxMtu_enableErrorTracking(IfxMtu_MbistSel mbistSel, boolean enable)
197 {
198 Ifx_MTU_MC *mc = &MODULE_MTU.MC[mbistSel];
199
200 if (enable == FALSE)
201 {
202 mc->ECCS.U &= ~(1 << IFX_MTU_MC_ECCS_TRE_OFF);
203 }
204 else
205 {
206 mc->ECCS.U |= (1 << IFX_MTU_MC_ECCS_TRE_OFF);
207 }
208 }
209
210
211 uint32 IfxMtu_getSystemAddress(IfxMtu_MbistSel mbistSel, Ifx_MTU_MC_ETRR trackedSramAddress)
212 {
213 uint32 sramAddress = trackedSramAddress.B.ADDR;
214 uint32 mbi = trackedSramAddress.B.MBI;
215 uint32 systemAddress = 0;
216
217 switch (mbistSel)
218 {
219 case IfxMtu_MbistSel_cpu0Pspr:
220 systemAddress = 0x70100000 | ((sramAddress << 5) | ((mbi & 1) << 4));
221 break;
222
223 case IfxMtu_MbistSel_cpu0Dspr:
224 systemAddress = 0x70000000 | ((sramAddress << 4) | ((mbi & 3) << 2));
225 break;
226 case IfxMtu_MbistSel_cpu1Pspr:
227 systemAddress = 0x60100000 | ((sramAddress << 5) | ((mbi & 1) << 4));
228 break;
229
230 case IfxMtu_MbistSel_cpu1Dspr:
231 systemAddress = 0x60000000 | ((sramAddress << 4) | ((mbi & 3) << 2));
232 break;
233 case IfxMtu_MbistSel_cpu2Pspr:
234 systemAddress = 0x50100000 | ((sramAddress << 5) | ((mbi & 1) << 4));
235 break;
236
237 case IfxMtu_MbistSel_cpu2Dspr:
238 systemAddress = 0x50000000 | ((sramAddress << 4) | ((mbi & 3) << 2));
239 break;
240 case IfxMtu_MbistSel_cpu3Pspr:
241 systemAddress = 0x40100000 | ((sramAddress << 5) | ((mbi & 1) << 4));
242 break;
243 case IfxMtu_MbistSel_cpu3Dspr:
244 systemAddress = 0x40000000 | ((sramAddress << 4) | ((mbi & 3) << 2));
245 break;
246 case IfxMtu_MbistSel_lmu0:
247 systemAddress = 0xb0040000 | ((sramAddress << 5) | ((mbi & 1) << 4));
248 break;
249
250 case IfxMtu_MbistSel_cpu0Dlmu:
251 systemAddress = 0xb0000000 | (sramAddress << 4);
252 break;
253 case IfxMtu_MbistSel_cpu1Dlmu:
254 systemAddress = 0xb0010000 | (sramAddress << 4);
255 break;
256 case IfxMtu_MbistSel_cpu2Dlmu:
257 systemAddress = 0xb0020000 | (sramAddress << 4);
258 break;
259 case IfxMtu_MbistSel_cpu3Dlmu:
260 systemAddress = 0xb0030000 | (sramAddress << 4);
261 break;
262 case IfxMtu_MbistSel_dma:
263 systemAddress = 0xf0012000 | ((sramAddress << 5) | ((mbi & 3) << 3));
264 break;
265 case IfxMtu_MbistSel_miniMcds:
266 systemAddress = 0x90200000 | (sramAddress << 5);
267 break;
268 case IfxMtu_MbistSel_mcan0:
269 systemAddress = 0xF0200000 | (sramAddress << 2);
270 break;
271 case IfxMtu_MbistSel_mcan1:
272 systemAddress = 0xF0210000 | (sramAddress << 2);
273 break;
274 case IfxMtu_MbistSel_mcan2:
275 systemAddress = 0xF0220000 | (sramAddress << 2);
276 break;
277 case IfxMtu_MbistSel_psi5:
278 systemAddress = 0xf0005600 | (sramAddress << 2);
279 break;
280 case IfxMtu_MbistSel_scrXram:
281 systemAddress = 0xF0240000 | (sramAddress << 2);
282 break;
283 case IfxMtu_MbistSel_scrIram:
284 case IfxMtu_MbistSel_eray0Obf:
285 case IfxMtu_MbistSel_eray0IbfTbf:
286 case IfxMtu_MbistSel_eray0Mbf:
287 case IfxMtu_MbistSel_eray1Obf:
288 case IfxMtu_MbistSel_eray1IbfTbf:
289 case IfxMtu_MbistSel_eray1Mbf:
290 default:
291 systemAddress = 0; /* unsupported address descrambling */
292 }
293
294 return systemAddress;
295 }
296
297
298 uint8 IfxMtu_getTrackedSramAddresses(IfxMtu_MbistSel mbistSel, Ifx_MTU_MC_ETRR *trackedSramAddresses)
299 {
300 Ifx_MTU_MC *mc = &MODULE_MTU.MC[mbistSel];
301 uint8 validFlags = (mc->ECCD.U >> IFX_MTU_MC_ECCD_VAL_OFF) & IFX_MTU_MC_ECCD_VAL_MSK;
302 uint8 numTrackedAddresses = 0;
303 int i;
304
305 #if IFX_MC_ECCD_VAL_LEN > IFXMTU_MAX_TRACKED_ADDRESSES
306 # error "Unexpected size of VAL mask"
307 #endif
308
309 for (i = 0; i < IFXMTU_MAX_TRACKED_ADDRESSES; ++i)
310 {
311 if (validFlags & (1 << i))
312 {
313 trackedSramAddresses[numTrackedAddresses].U = mc->ETRR[i].U;
314 ++numTrackedAddresses;
315 }
316 }
317
318 return numTrackedAddresses;
319 }
320
321
322 boolean IfxMtu_isTestPass(const IfxMtu_MbistConfig *mbistConfig)
323 {
324 boolean retVal = 1;
325 uint32 sshConfigCount;
326
327 for (sshConfigCount = 0; sshConfigCount < mbistConfig->numOfSshConfigurations; sshConfigCount++)
328 {
329 Ifx_MTU_MC *mc = &MODULE_MTU.MC[mbistConfig->sshConfigurations[sshConfigCount].sshSel];
330
331 if (mc->ECCD.U & (uint32)((IFX_MTU_MC_ECCD_EOV_MSK << IFX_MTU_MC_ECCD_EOV_OFF) | \
332 (IFX_MTU_MC_ECCD_MERR_MSK << IFX_MTU_MC_ECCD_MERR_OFF) | \
333 (IFX_MTU_MC_ECCD_UCERR_MSK << IFX_MTU_MC_ECCD_UCERR_OFF)))
334 {
335 retVal = 0;
336 }
337 }
338
339 return retVal;
340 }
341
342
343 void IfxMtu_readSramAddress(IfxMtu_MbistSel mbistSel, uint16 sramAddress)
344 {
345 Ifx_MTU_MC *mc = &MODULE_MTU.MC[mbistSel];
346
347 /* configure MBIST for single read opeation */
348 uint16 mcontrolMask = 0x4000; /* set USERED flag */
349 mc->MCONTROL.U = mcontrolMask | (1 << IFX_MTU_MC_MCONTROL_DIR_OFF);
350 mc->CONFIG0.U = (1 << IFX_MTU_MC_CONFIG0_NUMACCS_OFF) | (1 << IFX_MTU_MC_CONFIG0_ACCSTYPE_OFF); /* 1 read access */
351 mc->CONFIG1.U = 0; /* ensure that linear scrambling is used */
352
353 /* Set the address to be read (RAEN = 0) */
354 mc->RANGE.U = sramAddress;
355
356 /* Start operation */
357 mc->MCONTROL.U = mcontrolMask | (1 << IFX_MTU_MC_MCONTROL_DIR_OFF) | (1 << IFX_MTU_MC_MCONTROL_START_OFF);
358 mc->MCONTROL.U = mcontrolMask | (1 << IFX_MTU_MC_MCONTROL_DIR_OFF);
359
360 /* wait for the end of the fill operation */
361 while (!IfxMtu_isMbistDone(mbistSel))
362 {
363 __nop();
364 }
365 }
366
367
368 uint8 IfxMtu_runCheckerBoardTest(IfxMtu_MbistSel mbistSel, uint8 rangeSel, uint8 rangeAddrUp, uint8 rangeAddrLow, uint16 *errorAddr, uint32 numberRedundancyLines)
369 {
370 /* Select MBIST Memory Controller:
371 * Ifx_MC is a type describing structure of MBIST Memory Controller
372 * registers defined in IfxMc_regdef.h file - MC object */
373 Ifx_MTU_MC *mc = &MODULE_MTU.MC[mbistSel];
374 uint32 configCheckerBoardSequence[4] = {
375 0x08001000, //up /lin/w0
376 0x08001001, //up /lin/r0
377 0x00011000, //down/lin/w1
378 0x00011001
379 }; //down/lin/r1
380 uint16 password = 0;
381 uint8 retVal = 0U;
382 uint8 testStep;
383 uint8 isEndInitEnabled = 0;
384 password = IfxScuWdt_getSafetyWatchdogPassword();
385
386 /* Check if the Endinit is cleared by application. If not, then handle it internally inside teh function.*/
387 if (IfxScuWdt_getSafetyWatchdogEndInit() == 1U)
388 {
389 /* Clear EndInit */
390 IfxScuWdt_clearSafetyEndinit(password);
391 isEndInitEnabled = 1;
392 }
393
394 /* Enable MBIST Memory Controller */
395 IfxMtu_enableMbistShell(mbistSel);
396
397 /* for auto-init memories: wait for the end of the clear operation */
398 while (IfxMtu_isAutoInitRunning(mbistSel))
399 {}
400
401 /* Set the range register */
402 mc->RANGE.U = (rangeSel << 15) | (rangeAddrUp << 7) | (rangeAddrLow << 0);
403
404 /* Run the test */
405 for (testStep = 0; testStep < 4; ++testStep)
406 {
407 mc->CONFIG0.U = configCheckerBoardSequence[testStep] & 0x0000FFFF;
408 mc->CONFIG1.U = (configCheckerBoardSequence[testStep] & 0xFFFF0000) >> 16;
409 mc->MCONTROL.U = numberRedundancyLines ? 0x40c9 : 0x00c9; // bit and row toggle
410 mc->MCONTROL.U = numberRedundancyLines ? 0x40c8 : 0x00c8; // MCONTROL.B.START will generate a RMW which is too long for small SRAMs!
411
412 /* Set EndInit Watchdog (to prevent Watchdog TO)*/
413 IfxScuWdt_setSafetyEndinit(password);
414
415 /* wait for the end of the fill operation */
416
417 while (!IfxMtu_isMbistDone(mbistSel))
418 {
419 __nop();
420 }
421
422 /* Clear EndInit Again */
423 IfxScuWdt_clearSafetyEndinit(password);
424
425 /* Check the Fail Status */
426 if (mc->MSTATUS.B.FAIL)
427 {
428 /* Test has failed, check if any un-correctable error */
429 if (mc->ECCD.B.UCERR)
430 {
431 /* Read Error tracking register and return saying test failed */
432 *errorAddr = mc->ETRR[0].U;
433 retVal = 1U;
434 break;
435 }
436 }
437 }
438
439 /* Disable Memory Controller */
440
441 IfxMtu_disableMbistShell(mbistSel);
442
443 while (IfxMtu_isAutoInitRunning(mbistSel))
444 {}
445
446 if (isEndInitEnabled == 1)
447 {
448 /* Set EndInit Watchdog (to prevent Watchdog TO)*/
449 IfxScuWdt_setSafetyEndinit(password);
450 }
451
452 return retVal;
453 }
454
455
456 uint8 IfxMtu_runMarchUTest(IfxMtu_MbistSel mbistSel, uint8 rangeSel, uint8 rangeAddrUp, uint8 rangeAddrLow, uint16 *errorAddr)
457 {
458 /* Select MBIST Memory Controller:
459 * Ifx_MC is a type describing structure of MBIST Memory Controller
460 * registers defined in IfxMc_regdef.h file - MC object */
461 Ifx_MTU_MC *mc = &MODULE_MTU.MC[mbistSel];
462 uint32 configMarchUSequence[6] = {
463 0x08001000, //up /lin/w0
464 0x08064005, //up /lin/r0->w1->r1->w0
465 0x08022001, //up /lin/r0->w1
466 0x00094005, //down/lin/r1->w0->r0->w1
467 0x00012001, //down/lin/r1->w0
468 0x00001001
469 }; //down/lin/r0
470 uint16 password = 0;
471 uint8 retVal = 0U;
472 uint8 testStep;
473 uint8 isEndInitEnabled = 0;
474 password = IfxScuWdt_getSafetyWatchdogPassword();
475
476 /* Check if the Endinit is cleared by application. If not, then handle it internally inside teh function.*/
477 if (IfxScuWdt_getSafetyWatchdogEndInit() == 1U)
478 {
479 /* Clear EndInit */
480 IfxScuWdt_clearSafetyEndinit(password);
481 isEndInitEnabled = 1;
482 }
483
484 /* Enable MBIST Memory Controller */
485 IfxMtu_enableMbistShell(mbistSel);
486
487 /* for auto-init memories: wait for the end of the clear operation */
488 while (IfxMtu_isAutoInitRunning(mbistSel))
489 {}
490
491 /* Set the range register */
492 mc->RANGE.U = (rangeSel << 15) | (rangeAddrUp << 7) | (rangeAddrLow << 0);
493
494 /* Run the test */
495 for (testStep = 0; testStep < 6; ++testStep)
496 {
497 mc->CONFIG0.U = configMarchUSequence[testStep] & 0x0000FFFF;
498 mc->CONFIG1.U = (configMarchUSequence[testStep] & 0xFFFF0000) >> 16;
499 mc->MCONTROL.U = 0x4209;
500 mc->MCONTROL.B.START = 0;
501
502 /* Set EndInit Watchdog (to prevent Watchdog TO)*/
503 IfxScuWdt_setSafetyEndinit(password);
504
505 /* wait for the end of the fill operation */
506
507 while (!IfxMtu_isMbistDone(mbistSel))
508 {
509 __nop();
510 }
511
512 /* Clear EndInit Again */
513 IfxScuWdt_clearSafetyEndinit(password);
514
515 /* Check the Fail Status */
516 if (mc->MSTATUS.B.FAIL)
517 {
518 /* Test has failed, check if any un-correctable error */
519 if (mc->ECCD.B.UCERR)
520 {
521 /* Read Error tracking register and return saying test failed */
522 *errorAddr = mc->ETRR[0].U;
523 retVal = 1U;
524 break;
525 }
526 }
527 }
528
529 /* Disable Memory Controller */
530 IfxMtu_disableMbistShell(mbistSel);
531
532 /* for auto-init memories: wait for the end of the clear operation */
533 while (IfxMtu_isAutoInitRunning(mbistSel))
534 {}
535
536 /* Restore the endinit state */
537 if (isEndInitEnabled == 1)
538 {
539 /* Set EndInit Watchdog (to prevent Watchdog TO)*/
540 IfxScuWdt_setSafetyEndinit(password);
541 }
542
543 return retVal;
544 }
545
546
547 uint8 IfxMtu_runNonDestructiveInversionTest(IfxMtu_MbistSel mbistSel, uint8 rangeSel, uint8 rangeAddrUp, uint8 rangeAddrLow, uint16 *errorAddr)
548 {
549 /* Select MBIST Memory Controller:
550 * Ifx_MC is a type describing structure of MBIST Memory Controller
551 * registers defined in IfxMc_regdef.h file - MC object */
552 Ifx_MTU_MC *mc = &MODULE_MTU.MC[mbistSel];
553 uint16 password = 0;
554 uint8 retVal = 0U;
555 uint8 isEndInitEnabled = 0;
556 password = IfxScuWdt_getSafetyWatchdogPassword();
557
558 /* Check if the Endinit is cleared by application. If not, then handle it internally inside teh function.*/
559 if (IfxScuWdt_getSafetyWatchdogEndInit() == 1U)
560 {
561 /* Clear EndInit */
562 IfxScuWdt_clearSafetyEndinit(password);
563 isEndInitEnabled = 1;
564 }
565
566 /* Enable MBIST Memory Controller */
567 IfxMtu_enableMbistShell(mbistSel);
568
569 /* for auto-init memories: wait for the end of the clear operation */
570 while (IfxMtu_isAutoInitRunning(mbistSel))
571 {}
572
573 /* Configure Non-destructive Inversion test */
574 mc->CONFIG0.U = 0x4005; //NUMACCS=4, ACCSTYPE=5
575 mc->CONFIG1.U = 0x5008; //AG_MOD=5
576 /* Set the range register */
577 mc->RANGE.U = (rangeSel << 15) | (rangeAddrUp << 7) | (rangeAddrLow << 0);
578 /* Run the tests */
579 mc->MCONTROL.U = 0x4009;
580 mc->MCONTROL.B.START = 0;
581 /* Set EndInit Watchdog (to prevent Watchdog TO)*/
582 IfxScuWdt_setSafetyEndinit(password);
583
584 /* wait for the end of the fill operation */
585
586 while (!IfxMtu_isMbistDone(mbistSel))
587 {
588 __nop();
589 }
590
591 /* Clear EndInit Again */
592 IfxScuWdt_clearSafetyEndinit(password);
593
594 /* Check the Fail Status */
595 if (IfxMtu_checkErrorFlags(mbistSel))
596 {
597 /* Read the Error tracking register and return saying test failed */
598 *errorAddr = mc->ETRR[0].U;
599 retVal = 1U;
600 }
601
602 /* Disable Memory Controller */
603 IfxMtu_disableMbistShell(mbistSel);
604
605 /* for auto-init memories: wait for the end of the clear operation */
606 while (IfxMtu_isAutoInitRunning(mbistSel))
607 {}
608
609 /* Restore the endinit state */
610 if (isEndInitEnabled == 1)
611 {
612 /* Set EndInit Watchdog (to prevent Watchdog TO)*/
613 IfxScuWdt_setSafetyEndinit(password);
614 }
615
616 return retVal;
617 }
618
619
620 void IfxMtu_writeSramAddress(IfxMtu_MbistSel mbistSel, uint16 sramAddress)
621 {
622 Ifx_MTU_MC *mc = &MODULE_MTU.MC[mbistSel];
623 uint8 isEndInitEnabled = 0;
624 uint16 password = 0;
625 password = IfxScuWdt_getSafetyWatchdogPassword();
626
627 /* Check if the Endinit is cleared by application. If not, then handle it internally inside teh function.*/
628 if (IfxScuWdt_getSafetyWatchdogEndInit() == 1U)
629 {
630 /* Clear EndInit */
631 IfxScuWdt_clearSafetyEndinit(password);
632 isEndInitEnabled = 1;
633 }
634
635 /* configure MBIST for single write opeation */
636 uint16 mcontrolMask = 0x4000; /* set USERED flag */
637 mc->MCONTROL.U = mcontrolMask | (1 << IFX_MTU_MC_MCONTROL_DIR_OFF);
638 mc->CONFIG0.U = (1 << IFX_MTU_MC_CONFIG0_NUMACCS_OFF) | (0 << IFX_MTU_MC_CONFIG0_ACCSTYPE_OFF); /* 1 write access */
639 mc->CONFIG1.U = 0; /* ensure that linear scrambling is used */
640
641 /* Set the address to be written (RAEN = 0) */
642 mc->RANGE.U = sramAddress;
643
644 /* Start operation */
645 mc->MCONTROL.U = mcontrolMask | (1 << IFX_MTU_MC_MCONTROL_DIR_OFF) | (1 << IFX_MTU_MC_MCONTROL_START_OFF);
646 mc->MCONTROL.U = mcontrolMask | (1 << IFX_MTU_MC_MCONTROL_DIR_OFF);
647
648 if (isEndInitEnabled == 1)
649 {
650 /* Set EndInit Watchdog (to prevent Watchdog TO)*/
651 IfxScuWdt_setSafetyEndinit(password);
652 }
653
654 /* Wait for the end of the operation */
655
656 while (!IfxMtu_isMbistDone(mbistSel))
657 {
658 __nop();
659 }
660 }
661
662
663 boolean IfxMtu_runMbistAll(const IfxMtu_MbistConfig *const mbistConfig[])
664 {
665 unsigned int gangConfigCount = 0;
666 boolean mBistError = 0;
667 uint16 cpuWdtPassword = IfxScuWdt_getCpuWatchdogPassword();
668 uint16 safetyWdtPassword = IfxScuWdt_getSafetyWatchdogPassword();
669
670 while (mbistConfig[gangConfigCount] != (void *)0)
671 {
672 if (IfxMtu_runMbist(mbistConfig[gangConfigCount]))
673 {
674 if (!IfxMtu_isTestPass(mbistConfig[gangConfigCount]))
675 {
676 mBistError = 1;
677 }
678 }
679 else
680 {
681 mBistError = 1;
682 }
683
684 gangConfigCount++;
685 IfxScuWdt_serviceCpuWatchdog(cpuWdtPassword);
686 IfxScuWdt_serviceSafetyWatchdog(safetyWdtPassword);
687 }
688
689 return mBistError;
690 }
691
692
693 #if defined(__TASKING__)
694 #pragma optimize R
695 #elif defined(__HIGHTEC__)
696 #pragma GCC optimize ("-O1")
697 #endif
698 boolean IfxMtu_runMbist(const IfxMtu_MbistConfig *mbistConfig)
699 {
700 uint16 endinitCpu_pw = IfxScuWdt_getCpuWatchdogPassword();
701
702 if (IfxMtu_isModuleEnabled() == 0)
703 {
704 IfxScuWdt_clearCpuEndinit(endinitCpu_pw);
705 IfxMtu_enableModule(); /* Enable MTU module */
706 IfxScuWdt_setCpuEndinit(endinitCpu_pw);
707 }
708
709 __moveToAddrParam0(mbistConfig);
710 __jumpToFunction((voidfuncvoid)IfxMtu_runMbistConfigMtest);
711
712 return FALSE; /*dummy return, control shall not reach here*/
713 }
714
715
716 IFX_STATIC void IfxMtu_runMbistConfigMtest(const IfxMtu_MbistConfig *mbistConfig)
717 {
718 uint32 memTest0 = 0;
719 uint32 memTest1 = 0;
720 uint32 memTest2 = 0;
721 sint32 count;
722
723 /*prepare the MTEST registers with local variables*/
724 for (count = 0; count < mbistConfig->numOfSshConfigurations; count++)
725 {
726 /*Set MEMTESTx registers for each SSH cell configured*/
727 if (mbistConfig->sshConfigurations[count].sshSel < 32)
728 {
729 memTest0 |= (uint32)1U << (mbistConfig->sshConfigurations[count].sshSel & 0x1FU);
730 }
731 else if (mbistConfig->sshConfigurations[count].sshSel < 64)
732 {
733 memTest1 |= (uint32)1U << (mbistConfig->sshConfigurations[count].sshSel & 0x1FU);
734 }
735 else
736 {
737 memTest2 |= (uint32)1U << (mbistConfig->sshConfigurations[count].sshSel & 0x1FU);
738 }
739 }
740
741 /*Write to MEMTESTx registers*/
742 IFXMTU_CLEAR_GLOBAL_SAFETY_ENDINIT();
743
744 /*The code below this point, we shall not use any function call*/
745 MTU_MEMTEST0.U = memTest0;
746 MTU_MEMTEST1.U = memTest1;
747 MTU_MEMTEST2.U = memTest2;
748
749 IFXMTU_SET_GLOBAL_SAFETY_ENDINIT();
750
751 count = IFXMTU_WAIT_TIMEOUTCOUNT;
752
753 /* Wait until MEMTEST bits are reset */
754 while ((MTU_MEMTEST0.U != memTest0) || (MTU_MEMTEST1.U != memTest1) || (MTU_MEMTEST2.U != memTest2))
755 {
756 if ((--count) <= 0)
757 {
758 count = 0;
759 /*When there is some error, reset the MBISTTEST registers*/
760 __moveToDataParam0(count);
761 __jumpToFunction((voidfuncvoid)IfxMtu_runMbistEnd);
762 // break;
763 }
764 }
765
766 __moveToAddrParam0(mbistConfig);
767 __jumpToFunction((voidfuncvoid)IfxMtu_runMbistConfigRange);
768 }
769
770
771 IFX_STATIC void IfxMtu_runMbistConfigRange(const IfxMtu_MbistConfig *mbistConfig)
772 {
773 uint32 sshConfigCount;
774
775 IFXMTU_CLEAR_GLOBAL_SAFETY_ENDINIT();
776
777 for (sshConfigCount = 0; sshConfigCount < mbistConfig->numOfSshConfigurations; sshConfigCount++)
778 {
779 Ifx_MTU_MC *mc = &MODULE_MTU.MC[mbistConfig->sshConfigurations[sshConfigCount].sshSel];
780
781 while (IfxMtu_isAutoInitRunning(mbistConfig->sshConfigurations[sshConfigCount].sshSel))
782 {}
783
784 mc->RANGE.U = (1 << 15) | mbistConfig->sshConfigurations[sshConfigCount].highAddress << 7 |
785 mbistConfig->sshConfigurations[sshConfigCount].lowAddress;
786
787 /* Clear the alarms, which are set during bootup, applicable for 39xB, 38x, 37x and 35x devices only */
788 mc->ALMSRCS.B.MISCE = 0U;
789 mc->ALMSRCS.B.OPENE = 0U;
790 /*Clear all the error bits*/
791 mc->ECCD.U = 0x10;
792 /*Enable Error tracking*/
793 mc->ECCS.U = 0x001F;
794 }
795
796 IFXMTU_SET_GLOBAL_SAFETY_ENDINIT();
797
798 __moveToAddrParam0(mbistConfig);
799 __jumpToFunction((voidfuncvoid)IfxMtu_runMbistClearRam);
800 }
801
802
803 IFX_STATIC void IfxMtu_runMbistClearRam(const IfxMtu_MbistConfig *mbistConfig)
804 {
805 uint32 patternCount;
806 uint32 sshConfigCount;
807 uint32 status = 0;
808 sint32 count;
809
810 Ifx_MTU_MC *mc;
811
812 /*Loop through each configuration pattern*/
813 for (patternCount = 0; patternCount < mbistConfig->numOfConfigPatterns; patternCount++)
814 {
815 /** Setup Configuration pattern for each SSH CONFIGx*/
816 IFXMTU_CLEAR_GLOBAL_SAFETY_ENDINIT();
817
818 for (sshConfigCount = 0; sshConfigCount < mbistConfig->numOfSshConfigurations; sshConfigCount++)
819 {
820 if (mbistConfig->sshConfigurations[sshConfigCount].preClearEnable)
821 {
822 mc = &MODULE_MTU.MC[mbistConfig->sshConfigurations[sshConfigCount].sshSel];
823 mc->MCONTROL.U = IFXMTU_CLEAR_SRAM_MCONTROL_CONFIG | (1 << IFX_MTU_MC_MCONTROL_START_OFF); // Configure the MCONTROL and set Start bit
824 mc->MCONTROL.U = IFXMTU_CLEAR_SRAM_MCONTROL_CONFIG; //Reset the start bit
825 }
826 }
827
828 IFXMTU_SET_GLOBAL_SAFETY_ENDINIT();
829
830 count = IFXMTU_WAIT_TIMEOUTCOUNT;
831
832 do
833 {
834 status = 1;
835
836 for (sshConfigCount = 0; sshConfigCount < mbistConfig->numOfSshConfigurations; sshConfigCount++)
837 {
838 if (mbistConfig->sshConfigurations[sshConfigCount].preClearEnable)
839 {
840 Ifx_MTU_MC *mc = &MODULE_MTU.MC[mbistConfig->sshConfigurations[sshConfigCount].sshSel];
841 status &= (mc->MSTATUS.B.DONE & (!IfxMtu_isAutoInitRunning(mbistConfig->sshConfigurations[sshConfigCount].sshSel)));
842 }
843 }
844
845 if ((--count) <= 0)
846 {
847 __moveToDataParam0(status);
848 __jumpToFunction((voidfuncvoid)IfxMtu_runMbistEnd);
849 }
850 } while (status == 0);
851 }
852
853 __moveToAddrParam0(mbistConfig);
854 __jumpToFunction((voidfuncvoid)IfxMtu_runMbistConfigPatterns);
855 }
856
857
858 IFX_STATIC void IfxMtu_runMbistConfigPatterns(const IfxMtu_MbistConfig *mbistConfig)
859 {
860 uint32 patternCount;
861 uint32 sshConfigCount;
862 uint32 status = 0;
863 sint32 count;
864
865 Ifx_MTU_MC *mc;
866
867 /*Loop through each configuration pattern*/
868 for (patternCount = 0; patternCount < mbistConfig->numOfConfigPatterns; patternCount++)
869 {
870 /** Setup Configuration pattern for each SSH CONFIGx*/
871 IFXMTU_CLEAR_GLOBAL_SAFETY_ENDINIT();
872
873 for (sshConfigCount = 0; sshConfigCount < mbistConfig->numOfSshConfigurations; sshConfigCount++)
874 {
875 mc = &MODULE_MTU.MC[mbistConfig->sshConfigurations[sshConfigCount].sshSel];
876 mc->CONFIG0.U = mbistConfig->configPatterns[patternCount].config0.U; /* Set the CONFIG0 register */
877 mc->CONFIG1.U = mbistConfig->configPatterns[patternCount].config1.U; /* Set the CONFIG1 register */
878 }
879
880 /* Start memory test for each SSH CONFIGx*/
881
882 for (sshConfigCount = 0; sshConfigCount < mbistConfig->numOfSshConfigurations; sshConfigCount++)
883 {
884 mc = &MODULE_MTU.MC[mbistConfig->sshConfigurations[sshConfigCount].sshSel];
885 mc->MCONTROL.U = mbistConfig->mcontrol.U | 1; // Configure the MCONTROL and set Start bit
886
887 mc->MCONTROL.U = mbistConfig->mcontrol.U; //Reset the start bit
888 }
889
890 IFXMTU_SET_GLOBAL_SAFETY_ENDINIT();
891
892 count = IFXMTU_WAIT_TIMEOUTCOUNT;
893
894 do
895 {
896 status = 1;
897
898 for (sshConfigCount = 0; sshConfigCount < mbistConfig->numOfSshConfigurations; sshConfigCount++)
899 {
900 Ifx_MTU_MC *mc = &MODULE_MTU.MC[mbistConfig->sshConfigurations[sshConfigCount].sshSel];
901 status &= ((mc->MSTATUS.B.DONE | mc->MSTATUS.B.FAIL) & (!IfxMtu_isAutoInitRunning(mbistConfig->sshConfigurations[sshConfigCount].sshSel)));
902 }
903
904 if ((--count) <= 0)
905 {
906 __moveToDataParam0(status);
907 __jumpToFunction((voidfuncvoid)IfxMtu_runMbistEnd);
908 }
909 } while (status == 0);
910 }
911
912 __moveToDataParam0(status);
913 __jumpToFunction((voidfuncvoid)IfxMtu_runMbistEnd);
914 }
915
916
917 IFX_STATIC boolean IfxMtu_runMbistEnd(uint32 testsDone)
918 {
919 sint32 timeoutCount = IFXMTU_WAIT_TIMEOUTCOUNT;
920
921 /*ReSet MEMTESTx registers for each SSH cell configured*/
922 IFXMTU_CLEAR_GLOBAL_SAFETY_ENDINIT();
923
924 MTU_MEMTEST0.U = 0;
925 MTU_MEMTEST1.U = 0;
926 MTU_MEMTEST2.U = 0;
927
928 IFXMTU_SET_GLOBAL_SAFETY_ENDINIT();
929
930 /*Check if the MTEST is actually reset*/
931 {
932 while ((MTU_MEMTEST0.U > 0) || (MTU_MEMTEST1.U > 0) || (MTU_MEMTEST2.U > 0)) /* Wait until the MEMTEST bits are still set */
933 {
934 if ((--timeoutCount) <= 0)
935 {
936 testsDone = 0;
937 break;
938 }
939 }
940 }
941
942 return (boolean)testsDone;
943 }
944 #if defined(__TASKING__)
945 #pragma endoptimize
946 #elif defined(__HIGHTEC__)
947 #pragma GCC reset_options
948 #endif
IfxMtu_MbistSel_cpu1Dlmu
Definition: IfxMtu_cfg.h:111
IfxMtu.h
MTU basic functionality.
IfxMtu_MbistSel_eray1Mbf
Definition: IfxMtu_cfg.h:145
IfxMtu_MbistSshConfig::lowAddress
uint8 lowAddress
Lower address (scrambled) of memory Range to be tested.
Definition: IfxMtu.h:380
IfxMtu_runMbistConfigRange
IFX_STATIC void IfxMtu_runMbistConfigRange(const IfxMtu_MbistConfig *mbistConfig)
Definition: IfxMtu.c:771
IfxMtu_MbistConfig
Definition: IfxMtu.h:390
IfxMtu_MbistSel_cpu0Pspr
Definition: IfxMtu_cfg.h:104
IfxMtu_MbistSel_eray1IbfTbf
Definition: IfxMtu_cfg.h:143
IfxMtu_MbistConfigPattern::config0
Ifx_MTU_MC_CONFIG0 config0
Definition: IfxMtu.h:373
IfxMtu_MbistSel_eray0Mbf
Definition: IfxMtu_cfg.h:144
IfxMtu_MbistSel_mcan1
Definition: IfxMtu_cfg.h:137
IfxMtu_runMbistClearRam
IFX_STATIC void IfxMtu_runMbistClearRam(const IfxMtu_MbistConfig *mbistConfig)
Definition: IfxMtu.c:803
IfxMtu_clearSram
void IfxMtu_clearSram(IfxMtu_MbistSel mbistSel)
Function to Clear the MBIST SRAM (Synchronous mode). Note: The function clears & sets safety endinit ...
Definition: IfxMtu.c:126
__nop
void __nop(void) __attribute__((intrinsic_function(0x103
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxMtu_runNonDestructiveInversionTest
uint8 IfxMtu_runNonDestructiveInversionTest(IfxMtu_MbistSel mbistSel, uint8 rangeSel, uint8 rangeAddrUp, uint8 rangeAddrLow, uint16 *errorAddr)
This function runs the Non-Destructive Inversion test algorithm. Non-Destructive Inversion test can b...
Definition: IfxMtu.c:547
__moveToDataParam0
#define __moveToDataParam0
Definition: IfxCpu_IntrinsicsDcc.h:1565
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxMtu_MbistSel
IfxMtu_MbistSel
MBIST Selection.
Definition: IfxMtu_cfg.h:99
IfxMtu_MbistSel_cpu2Dspr
Definition: IfxMtu_cfg.h:112
IFXMTU_CLEAR_SRAM_MCONTROL_CONFIG
#define IFXMTU_CLEAR_SRAM_MCONTROL_CONFIG
Definition: IfxMtu.c:74
IfxMtu_runCheckerBoardTest
uint8 IfxMtu_runCheckerBoardTest(IfxMtu_MbistSel mbistSel, uint8 rangeSel, uint8 rangeAddrUp, uint8 rangeAddrLow, uint16 *errorAddr, uint32 numberRedundancyLines)
Run CheckerBoard test. This test consists of writing the physical checkerboard pattern into the memor...
Definition: IfxMtu.c:368
IfxMtu_MbistSshConfig::sshSel
IfxMtu_MbistSel sshSel
Member (config0)
Definition: IfxMtu.h:379
IfxMtu_runMbist
boolean IfxMtu_runMbist(const IfxMtu_MbistConfig *mbistConfig)
Run the MBIST on configured Gang configuration Requirements: 1) This function shall run the tests on ...
Definition: IfxMtu.c:698
IfxMtu_getTrackedSramAddresses
uint8 IfxMtu_getTrackedSramAddresses(IfxMtu_MbistSel mbistSel, Ifx_MTU_MC_ETRR *trackedSramAddresses)
Returns the tracked SRAM error addresses and memory blocks which are stored in the MBIST ETRR registe...
Definition: IfxMtu.c:298
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxMtu_MbistSel_miniMcds
Definition: IfxMtu_cfg.h:127
IfxScuWdt_serviceCpuWatchdog
void IfxScuWdt_serviceCpuWatchdog(uint16 password)
SCUWDT API to service CPU Watchdog functionality.
Definition: IfxScuWdt.c:601
IfxMtu_enableModule
IFX_INLINE void IfxMtu_enableModule(void)
Enables the MTU module.
Definition: IfxMtu.h:816
IfxScuWdt_serviceSafetyWatchdog
void IfxScuWdt_serviceSafetyWatchdog(uint16 password)
SCUWDT API to service Safety Watchdog functionality.
Definition: IfxScuWdt.c:607
IfxScuWdt_clearSafetyEndinit
void IfxScuWdt_clearSafetyEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:305
IfxMtu_clearSramContinue
void IfxMtu_clearSramContinue(IfxMtu_MbistSel mbistSel)
This Function should be called after MBIST Clear SRAM operation is completed. Note: The function shou...
Definition: IfxMtu.c:166
IfxMtu_MbistSel_cpu2Pspr
Definition: IfxMtu_cfg.h:114
IfxMtu_MbistSel_cpu1Pspr
Definition: IfxMtu_cfg.h:109
IfxMtu_checkErrorFlags
IFX_INLINE boolean IfxMtu_checkErrorFlags(IfxMtu_MbistSel mbistSel)
Returns True if any Error Flags are set.
Definition: IfxMtu.h:902
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxMtu_runMbistEnd
IFX_STATIC boolean IfxMtu_runMbistEnd(uint32 testsDone)
Definition: IfxMtu.c:917
IfxMtu_clearSramStart
void IfxMtu_clearSramStart(IfxMtu_MbistSel mbistSel)
This Function triggers the Clear the MBIST SRAM operation (Asynchronous operation). It doesn&#39;t wait till the end of operation. The application has to poll the Mbist status (IfxMtu_isMbistDone()) in a task and once the operation is done, the IfxMtu_clearSramContinue() function should be called to complete the operation. Alternately the application can enable the "memory test done" interrupt. And in the ISR, the IfxMtu_clearSramContinue() has to be called. If Synchronous usage is need, use IfxMtu_clearSram() function. Note: The function should be called with safety endinit bit cleared.
Definition: IfxMtu.c:179
IfxMtu_MbistSel_cpu2Dlmu
Definition: IfxMtu_cfg.h:116
IFXMTU_MAX_TRACKED_ADDRESSES
#define IFXMTU_MAX_TRACKED_ADDRESSES
Maximum number of tracked SRAM addresses (ETTR)
Definition: IfxMtu_cfg.h:74
IfxMtu_MbistSel_eray1Obf
Definition: IfxMtu_cfg.h:141
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:50
IfxMtu_MbistSel_cpu3Dlmu
Definition: IfxMtu_cfg.h:121
IfxMtu_isModuleEnabled
IFX_INLINE boolean IfxMtu_isModuleEnabled(void)
Returns the status of whether the module is enabled or not.
Definition: IfxMtu.h:896
IfxMtu_MbistSel_psi5
Definition: IfxMtu_cfg.h:139
IfxMtu_readSramAddress
void IfxMtu_readSramAddress(IfxMtu_MbistSel mbistSel, uint16 sramAddress)
Definition: IfxMtu.c:343
IfxMtu_MbistSel_lmu0
Definition: IfxMtu_cfg.h:122
IfxMtu_runMbistConfigMtest
IFX_STATIC void IfxMtu_runMbistConfigMtest(const IfxMtu_MbistConfig *mbistConfig)
Definition: IfxMtu.c:716
IfxMtu_enableMbistShell
IFX_INLINE void IfxMtu_enableMbistShell(IfxMtu_MbistSel mbistSel)
Enables the MBIST Shell of the given SRAM.
Definition: IfxMtu.h:805
IfxMtu_MbistSel_mcan0
Definition: IfxMtu_cfg.h:136
IfxMtu_MbistSel_eray0Obf
Definition: IfxMtu_cfg.h:140
IfxMtu_MbistSel_cpu3Dspr
Definition: IfxMtu_cfg.h:117
__moveToAddrParam0
#define __moveToAddrParam0
Definition: IfxCpu_IntrinsicsDcc.h:1577
voidfuncvoid
void(* voidfuncvoid)(void)
void pointer which takes void argument
Definition: Ifx_Types.h:56
IfxMtu_MbistSel_cpu1Dspr
Definition: IfxMtu_cfg.h:107
IFXMTU_WAIT_TIMEOUTCOUNT
#define IFXMTU_WAIT_TIMEOUTCOUNT
Definition: IfxMtu.h:321
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxScuWdt_setSafetyEndinit
void IfxScuWdt_setSafetyEndinit(uint16 password)
SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:668
IfxMtu_MbistSel_scrIram
Definition: IfxMtu_cfg.h:147
IfxScuWdt_getSafetyWatchdogPassword
uint16 IfxScuWdt_getSafetyWatchdogPassword(void)
SCUWDT API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.c:393
IfxMtu_MbistSel_scrXram
Definition: IfxMtu_cfg.h:146
IfxMtu_MbistSel_mcan2
Definition: IfxMtu_cfg.h:138
IfxMtu_MbistConfig::numOfConfigPatterns
uint8 numOfConfigPatterns
Number of configuration patterns.
Definition: IfxMtu.h:394
IfxMtu_getSystemAddress
uint32 IfxMtu_getSystemAddress(IfxMtu_MbistSel mbistSel, Ifx_MTU_MC_ETRR trackedSramAddress)
Returns the descrambled system address based on a tracked SRAM error which consists of ADDR and MBI (...
Definition: IfxMtu.c:211
IfxMtu_MbistSel_cpu3Pspr
Definition: IfxMtu_cfg.h:119
sint32
long sint32
Definition: Platform_Types.h:134
IfxMtu_writeSramAddress
void IfxMtu_writeSramAddress(IfxMtu_MbistSel mbistSel, uint16 sramAddress)
Definition: IfxMtu.c:620
IfxMtu_MbistSel_cpu0Dlmu
Definition: IfxMtu_cfg.h:106
IfxMtu_MbistSel_cpu0Dspr
Definition: IfxMtu_cfg.h:102
enable
void enable
Definition: IfxCpu_IntrinsicsDcc.h:477
IfxMtu_MbistConfigPattern::config1
Ifx_MTU_MC_CONFIG1 config1
Definition: IfxMtu.h:374
IFXMTU_SET_GLOBAL_SAFETY_ENDINIT
#define IFXMTU_SET_GLOBAL_SAFETY_ENDINIT()
Set Global safety endinit. Note: IFXMTU_SET_GLOBAL_SAFETY_ENDINIT() function macros is added to avoid...
Definition: IfxMtu.c:56
IfxMtu_runMbistAll
boolean IfxMtu_runMbistAll(const IfxMtu_MbistConfig *const mbistConfig[])
Run the MBIST on all configured Gang configurations Requirements: 1) This function shall run the test...
Definition: IfxMtu.c:663
IFXMTU_CLEAR_GLOBAL_SAFETY_ENDINIT
#define IFXMTU_CLEAR_GLOBAL_SAFETY_ENDINIT()
Clear Global safety endinit. Note: IFXMTU_CLEAR_GLOBAL_SAFETY_ENDINIT() function macros is added to a...
Definition: IfxMtu.c:67
IfxMtu_MbistSshConfig::highAddress
uint8 highAddress
Higher address (scrambled) of memory Range to be tested.
Definition: IfxMtu.h:381
IfxMtu_isMbistDone
IFX_INLINE boolean IfxMtu_isMbistDone(IfxMtu_MbistSel mbistSel)
This Function returns the status of MBIST clear Sram operation.
Definition: IfxMtu.h:882
IfxMtu_MbistSel_eray0IbfTbf
Definition: IfxMtu_cfg.h:142
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxMtu_MbistConfig::configPatterns
IFX_CONST IfxMtu_MbistConfigPattern * configPatterns
Pointer to number of configuration patterns.
Definition: IfxMtu.h:396
IfxMtu_isTestPass
boolean IfxMtu_isTestPass(const IfxMtu_MbistConfig *mbistConfig)
Check if the last MBIST Passed This function shall check for all the configured SSH cells if the test...
Definition: IfxMtu.c:322
IfxMtu_MbistConfig::numOfSshConfigurations
uint8 numOfSshConfigurations
Number of SSH Configurations in the memory test.
Definition: IfxMtu.h:393
IfxMtu_enableErrorTracking
void IfxMtu_enableErrorTracking(IfxMtu_MbistSel mbistSel, boolean enable)
Enables the tracking of SRAM errors.
Definition: IfxMtu.c:196
IfxMtu_MbistConfig::mcontrol
Ifx_MTU_MC_MCONTROL mcontrol
Value of MCONTROL register except START bit.
Definition: IfxMtu.h:392
IfxMtu_runMbistConfigPatterns
IFX_STATIC void IfxMtu_runMbistConfigPatterns(const IfxMtu_MbistConfig *mbistConfig)
Definition: IfxMtu.c:858
IfxMtu_clearErrorTracking
void IfxMtu_clearErrorTracking(IfxMtu_MbistSel mbistSel)
Clears the error tracking registers (ETRR), valid and overflow bits.
Definition: IfxMtu.c:119
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxMtu_disableMbistShell
IFX_INLINE void IfxMtu_disableMbistShell(IfxMtu_MbistSel mbistSel)
Disables the MBIST Shell of the given SRAM.
Definition: IfxMtu.h:774
IfxMtu_MbistConfig::sshConfigurations
IFX_CONST IfxMtu_MbistSshConfig * sshConfigurations
Pointer to number of SSH configuration structures.
Definition: IfxMtu.h:395
IfxMtu_isAutoInitRunning
IFX_INLINE boolean IfxMtu_isAutoInitRunning(IfxMtu_MbistSel mbistSel)
Returns TRUE if Auto-Initialisation is running for the given SRAM.
Definition: IfxMtu.h:860
IfxMtu_runMarchUTest
uint8 IfxMtu_runMarchUTest(IfxMtu_MbistSel mbistSel, uint8 rangeSel, uint8 rangeAddrUp, uint8 rangeAddrLow, uint16 *errorAddr)
Run March U test. This test MARCHES 0 and 1 values through the memory array in an up and down directi...
Definition: IfxMtu.c:456
IfxMtu_MbistSshConfig::preClearEnable
uint8 preClearEnable
Enable SRAM clearing before the test.
Definition: IfxMtu.h:383
IfxScuWdt_getSafetyWatchdogEndInit
IFX_INLINE boolean IfxScuWdt_getSafetyWatchdogEndInit(void)
SCUWDT API to fetch current endinit of Safety/System Watchdog module.
Definition: IfxScuWdt.h:635
IfxMtu_MbistSel_dma
Definition: IfxMtu_cfg.h:126
__jumpToFunction
#define __jumpToFunction
Definition: IfxCpu_IntrinsicsDcc.h:1581


iLLD_TC38A: IfxMtu.h Source File

  • Mtu
  • Std
IfxMtu.h
Go to the documentation of this file.
1 /**
2 * \file IfxMtu.h
3 * \brief MTU basic functionality
4 * \ingroup IfxLld_Mtu
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 * \defgroup IfxLld_Mtu_Usage How to use the Mtu driver?
43 * \ingroup IfxLld_Mtu
44 *
45 * The Memory Test Unit (MTU) controls and monitors the test, initialization and data integrity checking functions of the various internal memories in the device
46 *
47 * The Mtu driver provides set of routines for various Mbist operations
48 *
49 * In the following sections it will be described, how to integrate the Mtu driver into the application framework.
50 *
51 * \section IfxLld_Mtu_SramInit Sram Initialisation
52 * \subsection IfxLld_Mtu_Include Include Files
53 *
54 * Include following header file into your C code:
55 * \code
56 * #include <Mtu/IfxMtu.h>
57 * // include below file only if interrupt mode is used.
58 * #include "Src/Std/IfxSrc.h"
59 * \endcode
60 *
61 * \subsection IfxLld_Mtu_Variables Variables
62 *
63 * \code
64 * // used only if interrupt mode is used.
65 * static IfxMtu_MbistSel mbistSel;
66 * \endcode
67 *
68 * \subsection IfxLld_Mtu_Interrupt Interrupt Handler Installation
69 *
70 * See also \ref IfxLld_Cpu_Irq_Usage
71 *
72 * Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:
73 * \code
74 * // priorities are normally defined in Ifx_IntPrioDef.h
75 * #define IFX_INTPRIO_MTU 10
76 *
77 * \endcode
78 *
79 * Add the interrupt service routines to your C code. They have to call the Mtu interrupt handlers:
80 * \code
81 * IFX_INTERRUPT(mtuDoneISR, 0, IFX_INTPRIO_MTU)
82 * {
83 * IfxMtu_isrDone();
84 * }
85 * \endcode
86 *
87 * Finally install the interrupt handlers in your initialisation function:
88 * \code
89 * volatile Ifx_SRC_SRCR *src;
90 * src = &MODULE_SRC.MTUDONE ;
91 * IfxSrc_init(src, IfxCpu_Irq_getTos(IfxCpu_getCoreIndex()) , IFX_INTPRIO_MTU );
92 * IfxSrc_enable(src);
93 *
94 * // install interrupt handlers
95 * IfxCpu_Irq_installInterruptHandler(&mtuDoneISR, IFX_INTPRIO_MTU);
96 * IfxCpu_enableInterrupts();
97 * \endcode
98 *
99 * \subsection IfxLld_Mtu_ClearSram_SyncPolling Clear Sram (Synchronous polling mode)
100 *
101 * The Sram initialisation in synchronous polling mode (i.e wait till the complete operation is done) can be used as:
102 *
103 * \code
104 * clearSram(IfxMtu_MbistSel_cpu0Dspr);
105 * \endcode
106 *
107 * \subsection IfxLld_Mtu_ClearSram_ASyncPolling Clear Sram (Asynchronous polling mode)
108 *
109 * The Sram initialisation can be triggered by calling IfxMtu_clearSramStart() function, then can be queried for completion in a task using IfxMtu_isMbistDone. Once it's completed, then IfxMtu_clearSramContinue() has to be
110 * called.
111 * Note: The Safety Endinit watchdog has to be cleared before and set after for the IfxMtu_clearSramStart() and IfxMtu_clearSramContinue() functions.
112 *
113 * Following code triggers Sram initilisation.
114 * \code
115 *
116 * uint16 password = 0;
117 *
118 * password = IfxScuWdt_getSafetyWatchdogPassword();
119 *
120 * // Clear EndInit
121 * IfxScuWdt_clearSafetyEndinit(password);
122 *
123 * IfxMtu_clearSramStart(IfxMtu_MbistSel_cpu0Dspr);
124 *
125 * // Set EndInit Watchdog
126 * IfxScuWdt_setSafetyEndinit(password);
127 * \endcode
128 *
129 * Sram initialisation status can be queried in a task and once done complete the operation using:
130 * \code
131 * if (IfxMtu_isMbistDone(IfxMtu_MbistSel_cpu0Dspr))
132 * {
133 * // Sram Clear operation done
134 *
135 * // Clear EndInit
136 * IfxScuWdt_clearSafetyEndinit(password);
137 *
138 * IfxMtu_clearSramContinue(IfxMtu_MbistSel_cpu0Dspr);
139 *
140 * // Set EndInit Watchdog
141 * IfxScuWdt_setSafetyEndinit(password);
142 * }
143 * else
144 * {
145 * // Sram operation is still in progress
146 * }
147 * \endcode
148 *
149 * \subsection IfxLld_Mtu_ClearSram_ASyncInterrupt Clear Sram (Asynchronous interrupt mode)
150 * Do the interrupt configuration and initialisation as specified in \ref IfxLld_Mtu_Interrupt
151 * The Sram initialisation can be triggered by calling IfxMtu_clearSramStart() function. Once the operation is completed, Mtu Done isr is raised. Inside the Isr IfxMtu_clearSramContinue() has to be called.
152 * Note: The Safety Endinit watchdog has to be cleared before and set after for the IfxMtu_clearSramStart() and IfxMtu_clearSramContinue() functions.
153 *
154 * Following code triggers Sram initialisation.
155 * \code
156 *
157 * uint16 password = 0;
158 *
159 * password = IfxScuWdt_getSafetyWatchdogPassword();
160 *
161 * // Clear EndInit
162 * IfxScuWdt_clearSafetyEndinit(password);
163 *
164 * mbistSel = IfxMtu_MbistSel_cpu0Dspr; // mbistSel is a static / global variable.
165 * IfxMtu_clearSramStart(mbistSel);
166 *
167 * // Set EndInit Watchdog
168 * IfxScuWdt_setSafetyEndinit(password);
169 * \endcode
170 * In the Mtu done isr, the following code can be used.
171 *
172 * \code
173 * if (IfxMtu_isMbistDone(mbistSel))
174 * {
175 * // Sram Clear operation done
176 *
177 * // Clear EndInit
178 * IfxScuWdt_clearSafetyEndinit(password);
179 *
180 * IfxMtu_clearSramContinue(mbistSel);
181 *
182 * // Set EndInit Watchdog
183 * IfxScuWdt_setSafetyEndinit(password);
184 * }
185 *
186 * \endcode
187 *
188 * \section IfxLld_Mtu_SramError Sram Error tracking
189 * Example usage of Sram Error tracking
190 * \code
191 * IfxScuWdt_clearSafetyEndinit(password);
192 *
193 * IfxMtu_MbistSel mbistSel = IfxMtu_MbistSel_cpu1Dspr;
194 * Ifx_MC *mc = (Ifx_MC *)(IFXMTU_MC_ADDRESS_BASE + 0x100 * mbistSel);
195 *
196 * IfxMtu_enableMbistShell(mbistSel);
197 *
198 * // for auto-init memories: wait for the end of the clear operation
199 * while (IfxMtu_isAutoInitRunning(mbistSel))
200 * {}
201 * IfxMtu_enableErrorTracking(mbistSel, TRUE);
202 * uint32 numEtrr = 5;
203 * // print tracked error address
204 * {
205 * Ifx_MC_ETRR trackedSramAddresses[IFXMTU_MAX_TRACKED_ADDRESSES];
206 * uint8 numTrackedAddresses = IfxMtu_getTrackedSramAddresses(mbistSel, trackedSramAddresses);
207 * for(uint32 i=0; i<numEtrr; ++i) {
208 * printf("%d: Error Address:0x%04x, Error System Address:0x%04x \n",
209 * i,
210 * trackedSramAddresses[i].B.ADDR,
211 * IfxMtu_getSystemAddress(mbistSel, trackedSramAddresses[i]));
212 * }
213 * }
214 * }
215 *
216 * IfxMtu_disableMbistShell(mbistSel);
217 * IfxScuWdt_setSafetyEndinit(password);
218 * \endcode
219 *
220 * \section IfxLld_Mtu_MemoryTest Memory Tests
221 * \subsection IfxLld_Mtu_MemoryTest_NDI Non Destructive Inversion Test
222 *
223 * Usage Example:
224 * \code
225 * // Enable MTU clock
226 * {
227 * uint16 password = IfxScuWdt_getCpuWatchdogPassword();
228 * IfxScuWdt_clearCpuEndinit(password);
229 * IfxMtu_enableModule();
230 * IfxScuWdt_setCpuEndinit(password);
231 * }
232 *
233 *
234 * {
235 * uint16 password = IfxScuWdt_getSafetyWatchdogPassword();
236 * uint16 errAddr = 0;
237 * IfxScuWdt_clearSafetyEndinit(password);
238 *
239 * // run Non distructive inversion test for cpu0 DSPR memory (Range selection disabled)
240 * IfxMtu_runNonDestructiveInversionTest(IfxMtu_MbistSel_cpu0Dspr, 0, 0xFF, 0, &errAddr);
241 * // Clear Error Flags which are set in case you want to run further tests
242 * IfxMtu_clearErrorTracking(IfxMtu_MbistSel_cpu0Dspr);
243 *
244 * IfxScuWdt_setSafetyEndinit(password);
245 * }
246 * \endcode
247 *
248 * \subsection IfxLld_Mtu_MemoryTest_CheckerBoard Checker Board Test
249 * Usage Example:
250 * \code
251 * // Enable MTU clock
252 * {
253 * uint16 password = IfxScuWdt_getCpuWatchdogPassword();
254 * IfxScuWdt_clearCpuEndinit(password);
255 * IfxMtu_enableModule();
256 * IfxScuWdt_setCpuEndinit(password);
257 * }
258 *
259 *
260 * {
261 * uint16 password = IfxScuWdt_getSafetyWatchdogPassword();
262 * uint16 errAddr = 0;
263 * IfxScuWdt_clearSafetyEndinit(password);
264 * // run checkerboard test for cpu0 DSPR memory (Range selection disabled)
265 * IfxMtu_runCheckerBoardTest(IfxMtu_MbistSel_cpu0Dspr, 0, 0xFFFF, 0, &errAddr, 0);
266 *
267 * IfxScuWdt_setSafetyEndinit(password);
268 * }
269 * \endcode
270 *
271 * \subsection IfxLld_Mtu_MemoryTest_MarchU MarchU Test
272 * Usage Example:
273 * \code
274 * // Enable MTU clock
275 * {
276 * uint16 password = IfxScuWdt_getCpuWatchdogPassword();
277 * IfxScuWdt_clearCpuEndinit(password);
278 * IfxMtu_enableModule();
279 * IfxScuWdt_setCpuEndinit(password);
280 * }
281 *
282 *
283 * {
284 * uint16 password = IfxScuWdt_getSafetyWatchdogPassword();
285 * uint16 errAddr = 0;
286 * IfxScuWdt_clearSafetyEndinit(password);
287 * // run March U test for cpu0 DSPR memory (Range selection disabled)
288 * IfxMtu_runMarchUTest(IfxMtu_MbistSel_cpu0Dspr, 0, 0xFFFF, 0, &errAddr);
289 *
290 * IfxScuWdt_setSafetyEndinit(password);
291 * }
292 * \endcode
293 *
294 * \defgroup IfxLld_Mtu_Std_Utility Utility Functions
295 * \ingroup IfxLld_Mtu_Std
296 * \defgroup IfxLld_Mtu_Std_Operative MBIST Operations
297 * \ingroup IfxLld_Mtu_Std
298 * \defgroup IfxLld_Mtu_Std_ErrorTracking MBIST Error Tracking
299 * \ingroup IfxLld_Mtu_Std
300 */
301
302 #ifndef IFXMTU_H
303 #define IFXMTU_H 1
304
305 /******************************************************************************/
306 /*----------------------------------Includes----------------------------------*/
307 /******************************************************************************/
308
309 #include "_Impl/IfxMtu_cfg.h"
310 #include "IfxMtu_reg.h"
311 #include "IfxScu_reg.h"
312 #include "_Utilities/Ifx_Assert.h"
313 #include "Scu/Std/IfxScuWdt.h"
314 #include "Scu/Std/IfxScuCcu.h"
315 #include "IfxMtu_bf.h"
316
317 /******************************************************************************/
318 /*-----------------------------------Macros-----------------------------------*/
319 /******************************************************************************/
320
321 #define IFXMTU_WAIT_TIMEOUTCOUNT (((sint32)0x1000))
322
323 #define IFXMTU_LOOP_TIMEOUT_CHECK(tVar, tErr) \
324 { \
325 if (((sint32)--tVar) <= 0) \
326 { \
327 tErr = (uint8)1; \
328 break; \
329 } \
330 else \
331 { \
332 } \
333 }
334
335 /** \brief Configuration patterns for the MBIST
336 * Array of configurations which are used by MCx_CONFIG0 register
337 */
338 #define IFXMTU_MBIST_CONFIG_NONDISTTEST_MCONTROL {(0x4008U)}
339
340 #define IFXMTU_MBIST_CONFIG_NONDISTTEST_CONFIG0 \
341 { \
342 ( \
343 (5U << IFX_MTU_MC_CONFIG0_ACCSTYPE_OFF) | \
344 (4U << IFX_MTU_MC_CONFIG0_NUMACCS_OFF) \
345 ) \
346 }
347
348 #define IFXMTU_MBIST_CONFIG_NONDISTTEST_CONFIG1 \
349 { \
350 ( \
351 (8U << IFX_MTU_MC_CONFIG1_ACCSPAT_OFF) | \
352 (0U << IFX_MTU_MC_CONFIG1_SELFASTB_OFF) | \
353 (5U << IFX_MTU_MC_CONFIG1_AG_MOD_OFF) \
354 ) \
355 }
356
357 /** \brief Mask for the ERROR flags
358 */
359 #define IFXMTU_ERROR_FLAGS_MASK \
360 (((unsigned int)IFX_MTU_MC_ECCD_EOV_MSK << IFX_MTU_MC_ECCD_EOV_OFF) | \
361 ((unsigned int)IFX_MTU_MC_ECCD_CERR_MSK << IFX_MTU_MC_ECCD_CERR_OFF) | \
362 ((unsigned int)IFX_MTU_MC_ECCD_UCERR_MSK << IFX_MTU_MC_ECCD_UCERR_OFF) | \
363 ((unsigned int)IFX_MTU_MC_ECCD_MERR_MSK << IFX_MTU_MC_ECCD_MERR_OFF))
364
365 /******************************************************************************/
366 /*-----------------------------Data Structures--------------------------------*/
367 /******************************************************************************/
368
369 /** \addtogroup IfxLld_Mtu_Std_Operative
370 * \{ */
371 typedef struct
372 {
373 Ifx_MTU_MC_CONFIG0 config0;
374 Ifx_MTU_MC_CONFIG1 config1;
375 } IfxMtu_MbistConfigPattern;
376
377 typedef struct
378 {
379 IfxMtu_MbistSel sshSel; /**< \brief Member (config0) */
380 uint8 lowAddress; /**< \brief Lower address (scrambled) of memory Range to be tested */
381 uint8 highAddress; /**< \brief Higher address (scrambled) of memory Range to be tested */
382 uint8 uncorrectableErrorThreshold; /**< \brief Threshold number for uncorrectable errors */
383 uint8 preClearEnable; /**< \brief Enable SRAM clearing before the test */
384 } IfxMtu_MbistSshConfig;
385
386 /** \} */
387
388 /** \addtogroup IfxLld_Mtu_Std_Operative
389 * \{ */
390 typedef struct
391 {
392 Ifx_MTU_MC_MCONTROL mcontrol; /**< \brief Value of MCONTROL register except START bit */
393 uint8 numOfSshConfigurations; /**< \brief Number of SSH Configurations in the memory test */
394 uint8 numOfConfigPatterns; /**< \brief Number of configuration patterns */
395 IFX_CONST IfxMtu_MbistSshConfig *sshConfigurations; /**< \brief Pointer to number of SSH configuration structures */
396 IFX_CONST IfxMtu_MbistConfigPattern *configPatterns; /**< \brief Pointer to number of configuration patterns */
397 } IfxMtu_MbistConfig;
398
399 /** \} */
400
401 /** \addtogroup IfxLld_Mtu_Std_Utility
402 * \{ */
403
404 /******************************************************************************/
405 /*-------------------------Inline Function Prototypes-------------------------*/
406 /******************************************************************************/
407
408 /** \brief Disables the MBIST Shell of the given SRAM
409 * \param mbistSel Memory Selection
410 * \return None
411 *
412 * Usage Example
413 * \code
414 *
415 * IfxMtu_disableMbistShell(IfxMtu_MbistSel_cpu0Dtag);
416 *
417 * // Note: Wait for Auto-initilisation to be completed for auto-init memories like cpu-Dtag, cpu-Ptag, Cpu-Dcache, Cpu-Pcache
418 * while (IfxMtu_isAutoInitRunning(IfxMtu_MbistSel_cpu0Dtag))
419 * {}
420 * \endcode
421 *
422 */
423 IFX_INLINE void IfxMtu_disableMbistShell(IfxMtu_MbistSel mbistSel);
424
425 /** \brief Enables the MBIST Shell of the given SRAM.
426 * \param mbistSel Memory Selection
427 * \return None
428 *
429 * Usage Example
430 * \code
431 * // Enable MTU clock
432 * {
433 * uint16 password = IfxScuWdt_getCpuWatchdogPassword();
434 * IfxScuWdt_clearCpuEndinit(password);
435 * IfxMtu_enableModule();
436 * IfxScuWdt_setCpuEndinit(password);
437 * }
438 *
439 * {
440 * IfxMtu_enableMbistShell(IfxMtu_MbistSel_cpu0Dtag);
441 *
442 * // Note: Wait for Auto-initilisation to be completed for auto-init memories like cpu-Dtag, cpu-Ptag, Cpu-Dcache, Cpu-Pcache,
443 * while (IfxMtu_isAutoInitRunning(IfxMtu_MbistSel_cpu0Dtag))
444 * {}
445 * }
446 * \endcode
447 *
448 */
449 IFX_INLINE void IfxMtu_enableMbistShell(IfxMtu_MbistSel mbistSel);
450
451 /** \brief Enables the MTU module
452 * \return None
453 */
454 IFX_INLINE void IfxMtu_enableModule(void);
455
456 /** \brief returns register offset (x) and register bit offset (y) (MEMDONE[x].B.y)
457 * \param mbistSel Memory Selection
458 * \return returns register offset (x) and register bit offset (y) (MEMDONE[x].B.y)
459 */
460 IFX_INLINE uint32 IfxMtu_getMemDoneRegisterIndex(IfxMtu_MbistSel mbistSel);
461
462 /** \brief Returns TRUE if Auto-Initialisation is running for the given SRAM.
463 *
464 * Should be polled after MBIST enableMbistShell to ensure that an auto-init operation is finished before starting a new operation.
465 * \param mbistSel Memory Selection
466 * \return TRUE if auto-initialisation running.
467 */
468 IFX_INLINE boolean IfxMtu_isAutoInitRunning(IfxMtu_MbistSel mbistSel);
469
470 /** \brief Returns the status of whether the module is enabled or not
471 * \return
472 */
473 IFX_INLINE boolean IfxMtu_isModuleEnabled(void);
474
475 /** \} */
476
477 /** \addtogroup IfxLld_Mtu_Std_Operative
478 * \{ */
479
480 /******************************************************************************/
481 /*-------------------------Inline Function Prototypes-------------------------*/
482 /******************************************************************************/
483
484 /** \brief This function disables alarm-reporting flags
485 * \param mbistSel Memory Selection
486 * \return None
487 */
488 IFX_INLINE void IfxMtu_disableErrorReporting(IfxMtu_MbistSel mbistSel);
489
490 /** \brief This function enables alarm-reporting flags
491 * \param mbistSel Memory Selection
492 * \return None
493 */
494 IFX_INLINE void IfxMtu_enableErrorReporting(IfxMtu_MbistSel mbistSel);
495
496 /** \brief This Function returns the status of MBIST clear Sram operation.
497 * \param mbistSel Memory Selection
498 * \return status of Mbist Clear Sram operation (TRUE - Operation completed, FALSE - Operation still in progress)
499 *
500 * A coding example can be found in \ref IfxLld_Mtu_Usage
501 *
502 */
503 IFX_INLINE boolean IfxMtu_isMbistDone(IfxMtu_MbistSel mbistSel);
504
505 /******************************************************************************/
506 /*-------------------------Global Function Prototypes-------------------------*/
507 /******************************************************************************/
508
509 /** \brief Function to Clear the MBIST SRAM (Synchronous mode).
510 * Note: The function clears & sets safety endinit bit while running the test to prevent watchdog TO and automatically restores the endinit state (same state at the time of entering the function) at the end.
511 * \param mbistSel Memory Selection
512 * \return None
513 *
514 * A coding example can be found in \ref IfxLld_Mtu_Usage
515 *
516 */
517 IFX_EXTERN void IfxMtu_clearSram(IfxMtu_MbistSel mbistSel);
518
519 /** \brief This Function should be called after MBIST Clear SRAM operation is completed.
520 * Note: The function should be called with safety endinit bit cleared.
521 * \param mbistSel Memory Selection
522 * \return None
523 *
524 * A coding example can be found in \ref IfxLld_Mtu_Usage
525 *
526 */
527 IFX_EXTERN void IfxMtu_clearSramContinue(IfxMtu_MbistSel mbistSel);
528
529 /** \brief This Function triggers the Clear the MBIST SRAM operation (Asynchronous operation). It doesn't wait till the end of operation.
530 * The application has to poll the Mbist status (IfxMtu_isMbistDone()) in a task and once the operation is done, the IfxMtu_clearSramContinue() function should be called to complete the operation.
531 * Alternately the application can enable the "memory test done" interrupt. And in the ISR, the IfxMtu_clearSramContinue() has to be called.
532 * If Synchronous usage is need, use IfxMtu_clearSram() function.
533 * Note: The function should be called with safety endinit bit cleared.
534 * \param mbistSel Memory Selection
535 * \return None
536 *
537 * A coding example can be found in \ref IfxLld_Mtu_Usage
538 *
539 */
540 IFX_EXTERN void IfxMtu_clearSramStart(IfxMtu_MbistSel mbistSel);
541
542 /** \brief Check if the last MBIST Passed
543 * This function shall check for all the configured SSH cells if the tests were passed
544 * \param mbistConfig pointer to the configuration structure for the RAM test
545 * \return TRUE: Test passed; FALSE: Test failed.
546 */
547 IFX_EXTERN boolean IfxMtu_isTestPass(const IfxMtu_MbistConfig *mbistConfig);
548
549 /**
550 * \param mbistSel Memory Selection
551 * \param sramAddress SRAM address which should be read
552 * \return None
553 *
554 * A coding example can be found in \ref IfxLld_Mtu_Usage
555 *
556 */
557 IFX_EXTERN void IfxMtu_readSramAddress(IfxMtu_MbistSel mbistSel, uint16 sramAddress);
558
559 /** \brief Run CheckerBoard test. This test consists of writing the physical checkerboard pattern into the memory, then reading it back for verification
560 * Note: The function clears & sets safety endinit bit while running the test to prevent watchdog TO and automatically restores the endinit state (same state at the time of entering the function) at the end.
561 * \param mbistSel Memory Selection
562 * \param rangeSel enable/disable range Selection (0 - disable, 1- enable)
563 * \param rangeAddrUp when range mode is enabled, it specifies the upper logical block address limit in 64 word increments.
564 * \param rangeAddrLow when range mode is enabled, it specifies the lower logical block address limit.
565 * \param errorAddr If the test fails, it contains the error address (bit0 - bit12) and memory block index (Bit13 - Bit15)
566 * \param numberRedundancyLines Number of redundancy lines
567 * \return Test Status (0-PASS, 1- FAIL)
568 */
569 IFX_EXTERN uint8 IfxMtu_runCheckerBoardTest(IfxMtu_MbistSel mbistSel, uint8 rangeSel, uint8 rangeAddrUp, uint8 rangeAddrLow, uint16 *errorAddr, uint32 numberRedundancyLines);
570
571 /** \brief Run March U test. This test MARCHES 0 and 1 values through the memory array in an up and down direction. More precisely, 0 and 1 values are propagated through the memory in each direction; i.e. a single bit cell toggles into each direction with the neighboring cells having a given value and, in another run, the inverse given value.
572 * Note: The function clears & sets safety endinit bit while running the test to prevent watchdog TO and automatically restores the endinit state (same state at the time of entering the function) at the end.
573 * \param mbistSel Memory Selection
574 * \param rangeSel enable/disable range Selection (0 - disable, 1- enable)
575 * \param rangeAddrUp when range mode is enabled, it specifies the upper logical block address limit in 64 word increments.
576 * \param rangeAddrLow when range mode is enabled, it specifies the lower logical block address limit.
577 * \param errorAddr If the test fails, it contains the error address (bit0 - bit12) and memory block index (Bit13 - Bit15)
578 * \return Test Status (0-PASS, 1- FAIL)
579 */
580 IFX_EXTERN uint8 IfxMtu_runMarchUTest(IfxMtu_MbistSel mbistSel, uint8 rangeSel, uint8 rangeAddrUp, uint8 rangeAddrLow, uint16 *errorAddr);
581
582 /** \brief This function runs the Non-Destructive Inversion test algorithm.
583 * Non-Destructive Inversion test can be considered as a simple linear test that is able to find all Stuck-At faults (the cell remains stuck at a value for any operation) without destroying any user data. The test accesses every Word in the address range defined by the RANGE register, four times.
584 * Test Steps:
585 * 1. Read data Word including check bits
586 * 2. write back all bits inverted
587 * 3. Read data Word including check bits
588 * 4. Write back all bits inverted
589 * At the end of this procedure the user data remains unchanged and and every bit has been set to 0 and 1. Any single Stuck-At error will be visible as a correctable error.
590 * Note: The function clears & sets safety endinit bit while running the test to prevent watchdog TO and automatically restores the endinit state (same state at the time of entering the function) at the end.
591 * The Error flags need to be cleared to enable further tracking after the test
592 * \param mbistSel Memory Selection
593 * \param rangeSel enable/disable range Selection (0 - disable, 1- enable)
594 * \param rangeAddrUp when range mode is enabled, it specifies the upper logical block address limit in 64 word increments.
595 * \param rangeAddrLow when range mode is enabled, it specifies the lower logical block address limit.
596 * \param errorAddr If the test fails, it contains the error address (bit0 - bit12) and memory block index (Bit13 - Bit15)
597 * \return Test Status (0-PASS, 1- FAIL)
598 */
599 IFX_EXTERN uint8 IfxMtu_runNonDestructiveInversionTest(IfxMtu_MbistSel mbistSel, uint8 rangeSel, uint8 rangeAddrUp, uint8 rangeAddrLow, uint16 *errorAddr);
600
601 /**
602 * \param mbistSel Memory Selection
603 * \param sramAddress SRAM address which should be written
604 * \return None
605 */
606 IFX_EXTERN void IfxMtu_writeSramAddress(IfxMtu_MbistSel mbistSel, uint16 sramAddress);
607
608 /** \brief Run the MBIST on all configured Gang configurations
609 * Requirements:
610 * 1) This function shall run the tests on all SRAMs, which configured by the SSH structure array
611 * 1.1) Address range (already scrambled address info) is made available through configuration
612 * 1.2) Part of the test pattern is passed through MCONTROL
613 * 2) For each cell, the test shall execute all the configuration patterns as passed through pattern array
614 * 2.1) Test for each configuration pattern shall end either for the completion or for the failure
615 * 2.2) Test shall only end if the test is finished (with or without pass) or timeout
616 * 2.3) Failed test shall not be evaluated (this function only runs the tests)
617 * 3) Function shall return TRUE if the test execution for one of the configuration patterns is not finished
618 * 4) Function shall return FALSE if the test execution is finished
619 * Assumptions of usage:
620 * 1) This function is not interrupted.
621 * 2) DSPRAM of the CPU on which this function is running is being tested
622 * 2) For destructive tests, the tested ram shall be re initialized by user
623 * \param mbistConfig pointer to the configuration structure for the RAM test
624 * \return TRUE: Test is successfully finished; FALSE: Test is not successfully finished.
625 */
626 IFX_EXTERN boolean IfxMtu_runMbistAll(const IfxMtu_MbistConfig *const mbistConfig[]);
627
628 /** \brief Run the MBIST on configured Gang configuration
629 * Requirements:
630 * 1) This function shall run the tests on all SRAMs, which configured by the SSH structure array
631 * 1.1) Address range (already scrambled address info) is made available through configuration
632 * 1.2) Part of the test pattern is passed through MCONTROL
633 * 2) For each cell, the test shall execute all the configuration patterns as passed through pattern array
634 * 2.1) Test for each configuration pattern shall end either for the completion or for the failure
635 * 2.2) Test shall only end if the test is finished (with or without pass) or timeout
636 * 2.3) Failed test shall not be evaluated (this function only runs the tests)
637 * 3) Function shall return TRUE if the test execution for one of the configuration patterns is not finished
638 * 4) Function shall return FALSE if the test execution is finished
639 * Assumptions of usage:
640 * 1) This function is not interrupted.
641 * 2) DSPRAM of the CPU on which this function is running is being tested
642 * 2) For destructive tests, the tested ram shall be re initialized by user
643 * \param mbistConfig pointer to the configuration structure for the RAM test
644 * \return TRUE: Test is successfully finished; FALSE: Test is not successfully finished.
645 */
646 IFX_EXTERN boolean IfxMtu_runMbist(const IfxMtu_MbistConfig *mbistConfig);
647
648 /** \} */
649
650 /** \addtogroup IfxLld_Mtu_Std_ErrorTracking
651 * \{ */
652
653 /******************************************************************************/
654 /*-------------------------Inline Function Prototypes-------------------------*/
655 /******************************************************************************/
656
657 /** \brief Returns the status of the error tracking
658 * \param mbistSel Memory Selection
659 * \return TRUE if error tracking enabled.
660 */
661 IFX_INLINE boolean IfxMtu_isErrorTrackingEnabled(IfxMtu_MbistSel mbistSel);
662
663 /** \brief Returns the error tracking overflow status.
664 * \param mbistSel Memory Selection
665 * \return TRUE if more errors were detected since last clear than error tracking registers are available, or if more than one memory block was in error at the same time.
666 */
667 IFX_INLINE boolean IfxMtu_isErrorTrackingOverflow(IfxMtu_MbistSel mbistSel);
668
669 /** \brief Returns True if any Error Flags are set
670 * \param mbistSel Memory slection
671 * \return True if any error Flag is set
672 */
673 IFX_INLINE boolean IfxMtu_checkErrorFlags(IfxMtu_MbistSel mbistSel);
674
675 /******************************************************************************/
676 /*-------------------------Global Function Prototypes-------------------------*/
677 /******************************************************************************/
678
679 /** \brief Clears the error tracking registers (ETRR), valid and overflow bits.
680 * \param mbistSel Memory Selection
681 * \return None
682 *
683 * A coding example can be found in \ref IfxLld_Mtu_Usage
684 *
685 */
686 IFX_EXTERN void IfxMtu_clearErrorTracking(IfxMtu_MbistSel mbistSel);
687
688 /** \brief Enables the tracking of SRAM errors.
689 * \param mbistSel Memory Selection
690 * \param enable TRUE to enable error tracking, FALSE to disable error tracking.
691 * \return None
692 *
693 * A coding example can be found in \ref IfxLld_Mtu_Usage
694 *
695 */
696 IFX_EXTERN void IfxMtu_enableErrorTracking(IfxMtu_MbistSel mbistSel, boolean enable);
697
698 /** \brief Returns the descrambled system address based on a tracked SRAM error which consists of ADDR and MBI (SRAM address and block)
699 *
700 * Please note that not all memories of the system are supported by this function.
701 * Additional memories will be considered on request.
702 * \param mbistSel Memory Selection
703 * \param trackedSramAddress tracked SRAM address which consists of an ADDR and MBI field (SRAM address and block)
704 * \return descrambled system address if supported by this function, otherwise 0
705 *
706 * Example usage: see \ref IfxMtu_getTrackedSramAddresses
707 *
708 */
709 IFX_EXTERN uint32 IfxMtu_getSystemAddress(IfxMtu_MbistSel mbistSel, Ifx_MTU_MC_ETRR trackedSramAddress);
710
711 /** \brief Returns the tracked SRAM error addresses and memory blocks which are stored in the MBIST ETRR registers.
712 * \param mbistSel Memory Selection
713 * \param trackedSramAddresses will contain the tracked error addresses in trackedSramAdresses[x].B.ADDR and affected blocks in sramAddresses[x].B.MBI
714 *
715 * The array size shall be IFXMTU_MAX_TRACKED_ADDRESSES
716 * \return number of tracked errors (0..IFXMTU_MAX_TRACKED_ADDRESSES)
717 *
718 * Example usage to print out tracked errors of a given memory:
719 *
720 * We assume that the MTU clock has already been enabled, and that the MBIST instance has been selected; e.g. for LMU:
721 * \code
722 * uint16 password = IfxScuWdt_getCpuWatchdogPassword();
723 * IfxScuWdt_clearCpuEndinit(password);
724 *
725 * IfxMtu_enableModule();
726 *
727 * IfxMtu_MbistSel mbistSel = IfxMtu_MbistSel_lmu;
728 *
729 * IfxMtu_enableMbistShell(mbistSel);
730 *
731 * // for auto-init memories: wait for the end of the clear operation
732 * while (IfxMtu_isAutoInitRunning(mbistSel))
733 * {}
734 * \endcode
735 *
736 * Now the tracking information can be retrieved with:
737 *
738 * \code
739 * {
740 * Ifx_MC_ETRR trackedSramAddresses[IFXMTU_MAX_TRACKED_ADDRESSES];
741 * uint8 numTrackedAddresses = IfxMtu_getTrackedSramAddresses(mbistSel, trackedSramAddresses);
742 *
743 * clib_ver_printf("Tracked addresses: %d (Overflow: %d)\n",
744 * numTrackedAddresses,
745 * IfxMtu_isErrorTrackingOverflow(mbistSel) ? 1 : 0);
746 *
747 * for(int i=0; i<numTrackedAddresses; ++i) {
748 * clib_ver_printf("%d: A:0x%04x MBI:%d -> SystemAddress: 0x%08x\n",
749 * i,
750 * trackedSramAddresses[i].B.ADDR,
751 * trackedSramAddresses[i].B.MBI,
752 * IfxMtu_getSystemAddress(mbistSel, trackedSramAddresses[i]));
753 * }
754 * }
755 * \endcode
756 *
757 */
758 IFX_EXTERN uint8 IfxMtu_getTrackedSramAddresses(IfxMtu_MbistSel mbistSel, Ifx_MTU_MC_ETRR *trackedSramAddresses);
759
760 /** \} */
761
762 /******************************************************************************/
763 /*---------------------Inline Function Implementations------------------------*/
764 /******************************************************************************/
765
766 IFX_INLINE void IfxMtu_disableErrorReporting(IfxMtu_MbistSel mbistSel)
767 {
768 Ifx_MTU_MC *mc = &MODULE_MTU.MC[mbistSel];
769 mc->ALMSRCS.B.MISCE = 0;
770 mc->ALMSRCS.B.OPENE = 0;
771 }
772
773
774 IFX_INLINE void IfxMtu_disableMbistShell(IfxMtu_MbistSel mbistSel)
775 {
776 volatile uint32 *mtuMemtest = (volatile uint32 *)((uint32)&MTU_MEMTEST0 + 4 * (mbistSel >> 5));
777 uint32 mask = 1 << (mbistSel & 0x1f);
778 *mtuMemtest &= ~mask;
779 /* Set EndInit Watchdog (to prevent Watchdog TO)*/
780 uint16 password = IfxScuWdt_getSafetyWatchdogPassword();
781 IfxScuWdt_setSafetyEndinit(password);
782
783 while (!IfxMtu_isMbistDone(mbistSel))
784 {
785 __nop();
786 }
787
788 /* Clear EndInit */
789 IfxScuWdt_clearSafetyEndinit(password);
790 /*Enable Error Reporting */
791 Ifx_MTU_MC *mc = &MODULE_MTU.MC[mbistSel];
792 mc->ALMSRCS.B.MISCE = 1;
793 mc->ALMSRCS.B.OPENE = 1;
794 }
795
796
797 IFX_INLINE void IfxMtu_enableErrorReporting(IfxMtu_MbistSel mbistSel)
798 {
799 Ifx_MTU_MC *mc = &MODULE_MTU.MC[mbistSel];
800 mc->ALMSRCS.B.MISCE = 1;
801 mc->ALMSRCS.B.OPENE = 1;
802 }
803
804
805 IFX_INLINE void IfxMtu_enableMbistShell(IfxMtu_MbistSel mbistSel)
806 {
807 Ifx_MTU_MC *mc = &MODULE_MTU.MC[mbistSel];
808 mc->ALMSRCS.B.MISCE = 0;
809 mc->ALMSRCS.B.OPENE = 0;
810 volatile uint32 *mtuMemtest = (volatile uint32 *)((uint32)&MTU_MEMTEST0 + 4 * (mbistSel >> 5));
811 uint32 mask = 1 << (mbistSel & 0x1f);
812 *mtuMemtest |= mask;
813 }
814
815
816 IFX_INLINE void IfxMtu_enableModule(void)
817 {
818 uint8 isEndInitEnabled = 0;
819
820 if (IfxScuWdt_getCpuWatchdogEndInit() == 1U)
821 {
822 /* Clear EndInit */
823 IfxScuWdt_clearCpuEndinit(IfxScuWdt_getCpuWatchdogPassword());
824 isEndInitEnabled = 1;
825 }
826
827 /* MTU clock enable */
828 MTU_CLC.U = 0x0U;
829
830 if (isEndInitEnabled == 1U)
831 {
832 IfxScuWdt_setCpuEndinit(IfxScuWdt_getCpuWatchdogPassword());
833 }
834 }
835
836
837 IFX_INLINE uint32 IfxMtu_getMemDoneRegisterIndex(IfxMtu_MbistSel mbistSel)
838 {
839 uint32 index;
840
841 if (mbistSel > 63)
842 {
843 index = mbistSel - 64;
844 index = index << 8 | 2;
845 }
846 else if (mbistSel > 31)
847 {
848 index = mbistSel - 32;
849 index = index << 8 | 1;
850 }
851 else
852 {
853 index = mbistSel << 8;
854 }
855
856 return index;
857 }
858
859
860 IFX_INLINE boolean IfxMtu_isAutoInitRunning(IfxMtu_MbistSel mbistSel)
861 {
862 volatile uint32 *mtuMemstat = (volatile uint32 *)((uint32)&MTU_MEMSTAT0 + 4 * (mbistSel >> 5));
863 uint32 mask = 1 << (mbistSel & 0x1f);
864 return (*mtuMemstat & mask) != 0;
865 }
866
867
868 IFX_INLINE boolean IfxMtu_isErrorTrackingEnabled(IfxMtu_MbistSel mbistSel)
869 {
870 Ifx_MTU_MC *mc = &MODULE_MTU.MC[mbistSel];
871 return mc->ECCS.B.TRE ? TRUE : FALSE;
872 }
873
874
875 IFX_INLINE boolean IfxMtu_isErrorTrackingOverflow(IfxMtu_MbistSel mbistSel)
876 {
877 Ifx_MTU_MC *mc = &MODULE_MTU.MC[mbistSel];
878 return mc->ECCD.B.EOV ? TRUE : FALSE;
879 }
880
881
882 IFX_INLINE boolean IfxMtu_isMbistDone(IfxMtu_MbistSel mbistSel)
883 {
884 volatile uint32 index;
885 volatile uint32 bitIndex;
886 uint32 memDone;
887
888 index = IfxMtu_getMemDoneRegisterIndex(mbistSel);
889 bitIndex = index >> 8;
890 index = index & 0xF;
891 memDone = *((volatile uint32 *)(&MTU_MEMDONE0 + index));
892 return ((memDone) >> bitIndex) & 0x1;
893 }
894
895
896 IFX_INLINE boolean IfxMtu_isModuleEnabled(void)
897 {
898 return MTU_CLC.B.DISS == 0;
899 }
900
901
902 IFX_INLINE boolean IfxMtu_checkErrorFlags(IfxMtu_MbistSel mbistSel)
903 {
904 Ifx_MTU_MC *mc = &MODULE_MTU.MC[mbistSel];
905 return (boolean)((mc->ECCD.U & IFXMTU_ERROR_FLAGS_MASK) > 0);
906 }
907
908
909 #endif /* IFXMTU_H */
IfxMtu_MbistSshConfig::lowAddress
uint8 lowAddress
Lower address (scrambled) of memory Range to be tested.
Definition: IfxMtu.h:380
IfxMtu_MbistConfig
Definition: IfxMtu.h:390
IfxMtu_MbistSshConfig::uncorrectableErrorThreshold
uint8 uncorrectableErrorThreshold
Threshold number for uncorrectable errors.
Definition: IfxMtu.h:382
IfxMtu_MbistConfigPattern::config0
Ifx_MTU_MC_CONFIG0 config0
Definition: IfxMtu.h:373
IfxMtu_clearSram
IFX_EXTERN void IfxMtu_clearSram(IfxMtu_MbistSel mbistSel)
Function to Clear the MBIST SRAM (Synchronous mode). Note: The function clears & sets safety endinit ...
Definition: IfxMtu.c:126
__nop
void __nop(void) __attribute__((intrinsic_function(0x103
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxMtu_runNonDestructiveInversionTest
IFX_EXTERN uint8 IfxMtu_runNonDestructiveInversionTest(IfxMtu_MbistSel mbistSel, uint8 rangeSel, uint8 rangeAddrUp, uint8 rangeAddrLow, uint16 *errorAddr)
This function runs the Non-Destructive Inversion test algorithm. Non-Destructive Inversion test can b...
Definition: IfxMtu.c:547
Ifx_Assert.h
Assert functions.
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxMtu_disableErrorReporting
IFX_INLINE void IfxMtu_disableErrorReporting(IfxMtu_MbistSel mbistSel)
This function disables alarm-reporting flags.
Definition: IfxMtu.h:766
IfxMtu_MbistSel
IfxMtu_MbistSel
MBIST Selection.
Definition: IfxMtu_cfg.h:99
IfxMtu_runCheckerBoardTest
IFX_EXTERN uint8 IfxMtu_runCheckerBoardTest(IfxMtu_MbistSel mbistSel, uint8 rangeSel, uint8 rangeAddrUp, uint8 rangeAddrLow, uint16 *errorAddr, uint32 numberRedundancyLines)
Run CheckerBoard test. This test consists of writing the physical checkerboard pattern into the memor...
Definition: IfxMtu.c:368
IfxMtu_MbistSshConfig::sshSel
IfxMtu_MbistSel sshSel
Member (config0)
Definition: IfxMtu.h:379
IfxMtu_isErrorTrackingOverflow
IFX_INLINE boolean IfxMtu_isErrorTrackingOverflow(IfxMtu_MbistSel mbistSel)
Returns the error tracking overflow status.
Definition: IfxMtu.h:875
IfxMtu_runMbist
IFX_EXTERN boolean IfxMtu_runMbist(const IfxMtu_MbistConfig *mbistConfig)
Run the MBIST on configured Gang configuration Requirements: 1) This function shall run the tests on ...
Definition: IfxMtu.c:698
IfxMtu_getTrackedSramAddresses
IFX_EXTERN uint8 IfxMtu_getTrackedSramAddresses(IfxMtu_MbistSel mbistSel, Ifx_MTU_MC_ETRR *trackedSramAddresses)
Returns the tracked SRAM error addresses and memory blocks which are stored in the MBIST ETRR registe...
Definition: IfxMtu.c:298
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxScuWdt.h
SCU basic functionality.
IfxMtu_enableModule
IFX_INLINE void IfxMtu_enableModule(void)
Enables the MTU module.
Definition: IfxMtu.h:816
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxMtu_getMemDoneRegisterIndex
IFX_INLINE uint32 IfxMtu_getMemDoneRegisterIndex(IfxMtu_MbistSel mbistSel)
returns register offset (x) and register bit offset (y) (MEMDONE[x].B.y)
Definition: IfxMtu.h:837
IfxScuWdt_clearSafetyEndinit
void IfxScuWdt_clearSafetyEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:305
IfxMtu_clearSramContinue
IFX_EXTERN void IfxMtu_clearSramContinue(IfxMtu_MbistSel mbistSel)
This Function should be called after MBIST Clear SRAM operation is completed. Note: The function shou...
Definition: IfxMtu.c:166
IfxMtu_checkErrorFlags
IFX_INLINE boolean IfxMtu_checkErrorFlags(IfxMtu_MbistSel mbistSel)
Returns True if any Error Flags are set.
Definition: IfxMtu.h:902
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxMtu_clearSramStart
IFX_EXTERN void IfxMtu_clearSramStart(IfxMtu_MbistSel mbistSel)
This Function triggers the Clear the MBIST SRAM operation (Asynchronous operation). It doesn&#39;t wait till the end of operation. The application has to poll the Mbist status (IfxMtu_isMbistDone()) in a task and once the operation is done, the IfxMtu_clearSramContinue() function should be called to complete the operation. Alternately the application can enable the "memory test done" interrupt. And in the ISR, the IfxMtu_clearSramContinue() has to be called. If Synchronous usage is need, use IfxMtu_clearSram() function. Note: The function should be called with safety endinit bit cleared.
Definition: IfxMtu.c:179
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxScuWdt_getCpuWatchdogEndInit
boolean IfxScuWdt_getCpuWatchdogEndInit(void)
SCUWDT API to fetch current endinit of CPU Watchdog module.
Definition: IfxScuWdt.c:357
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxMtu_MbistSshConfig
Definition: IfxMtu.h:377
IfxMtu_isModuleEnabled
IFX_INLINE boolean IfxMtu_isModuleEnabled(void)
Returns the status of whether the module is enabled or not.
Definition: IfxMtu.h:896
IfxMtu_readSramAddress
IFX_EXTERN void IfxMtu_readSramAddress(IfxMtu_MbistSel mbistSel, uint16 sramAddress)
Definition: IfxMtu.c:343
IfxMtu_enableMbistShell
IFX_INLINE void IfxMtu_enableMbistShell(IfxMtu_MbistSel mbistSel)
Enables the MBIST Shell of the given SRAM.
Definition: IfxMtu.h:805
IfxMtu_isErrorTrackingEnabled
IFX_INLINE boolean IfxMtu_isErrorTrackingEnabled(IfxMtu_MbistSel mbistSel)
Returns the status of the error tracking.
Definition: IfxMtu.h:868
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxScuWdt_setSafetyEndinit
void IfxScuWdt_setSafetyEndinit(uint16 password)
SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:668
IfxScuWdt_getSafetyWatchdogPassword
uint16 IfxScuWdt_getSafetyWatchdogPassword(void)
SCUWDT API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.c:393
IfxMtu_MbistConfig::numOfConfigPatterns
uint8 numOfConfigPatterns
Number of configuration patterns.
Definition: IfxMtu.h:394
IfxMtu_getSystemAddress
IFX_EXTERN uint32 IfxMtu_getSystemAddress(IfxMtu_MbistSel mbistSel, Ifx_MTU_MC_ETRR trackedSramAddress)
Returns the descrambled system address based on a tracked SRAM error which consists of ADDR and MBI (...
Definition: IfxMtu.c:211
IfxScuCcu.h
SCU basic functionality.
IfxMtu_writeSramAddress
IFX_EXTERN void IfxMtu_writeSramAddress(IfxMtu_MbistSel mbistSel, uint16 sramAddress)
Definition: IfxMtu.c:620
enable
void enable
Definition: IfxCpu_IntrinsicsDcc.h:477
IfxMtu_MbistConfigPattern
Definition: IfxMtu.h:371
IfxMtu_MbistConfigPattern::config1
Ifx_MTU_MC_CONFIG1 config1
Definition: IfxMtu.h:374
IfxMtu_runMbistAll
IFX_EXTERN boolean IfxMtu_runMbistAll(const IfxMtu_MbistConfig *const mbistConfig[])
Run the MBIST on all configured Gang configurations Requirements: 1) This function shall run the test...
Definition: IfxMtu.c:663
IfxMtu_enableErrorReporting
IFX_INLINE void IfxMtu_enableErrorReporting(IfxMtu_MbistSel mbistSel)
This function enables alarm-reporting flags.
Definition: IfxMtu.h:797
IfxMtu_MbistSshConfig::highAddress
uint8 highAddress
Higher address (scrambled) of memory Range to be tested.
Definition: IfxMtu.h:381
IfxMtu_cfg.h
Mtu on-chip implementation data.
IfxMtu_isMbistDone
IFX_INLINE boolean IfxMtu_isMbistDone(IfxMtu_MbistSel mbistSel)
This Function returns the status of MBIST clear Sram operation.
Definition: IfxMtu.h:882
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxMtu_MbistConfig::configPatterns
IFX_CONST IfxMtu_MbistConfigPattern * configPatterns
Pointer to number of configuration patterns.
Definition: IfxMtu.h:396
IfxMtu_isTestPass
IFX_EXTERN boolean IfxMtu_isTestPass(const IfxMtu_MbistConfig *mbistConfig)
Check if the last MBIST Passed This function shall check for all the configured SSH cells if the test...
Definition: IfxMtu.c:322
IfxMtu_MbistConfig::numOfSshConfigurations
uint8 numOfSshConfigurations
Number of SSH Configurations in the memory test.
Definition: IfxMtu.h:393
IfxMtu_enableErrorTracking
IFX_EXTERN void IfxMtu_enableErrorTracking(IfxMtu_MbistSel mbistSel, boolean enable)
Enables the tracking of SRAM errors.
Definition: IfxMtu.c:196
IfxMtu_MbistConfig::mcontrol
Ifx_MTU_MC_MCONTROL mcontrol
Value of MCONTROL register except START bit.
Definition: IfxMtu.h:392
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxMtu_clearErrorTracking
IFX_EXTERN void IfxMtu_clearErrorTracking(IfxMtu_MbistSel mbistSel)
Clears the error tracking registers (ETRR), valid and overflow bits.
Definition: IfxMtu.c:119
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxMtu_disableMbistShell
IFX_INLINE void IfxMtu_disableMbistShell(IfxMtu_MbistSel mbistSel)
Disables the MBIST Shell of the given SRAM.
Definition: IfxMtu.h:774
IfxMtu_MbistConfig::sshConfigurations
IFX_CONST IfxMtu_MbistSshConfig * sshConfigurations
Pointer to number of SSH configuration structures.
Definition: IfxMtu.h:395
IfxMtu_isAutoInitRunning
IFX_INLINE boolean IfxMtu_isAutoInitRunning(IfxMtu_MbistSel mbistSel)
Returns TRUE if Auto-Initialisation is running for the given SRAM.
Definition: IfxMtu.h:860
IfxMtu_runMarchUTest
IFX_EXTERN uint8 IfxMtu_runMarchUTest(IfxMtu_MbistSel mbistSel, uint8 rangeSel, uint8 rangeAddrUp, uint8 rangeAddrLow, uint16 *errorAddr)
Run March U test. This test MARCHES 0 and 1 values through the memory array in an up and down directi...
Definition: IfxMtu.c:456
IfxMtu_MbistSshConfig::preClearEnable
uint8 preClearEnable
Enable SRAM clearing before the test.
Definition: IfxMtu.h:383
IFXMTU_ERROR_FLAGS_MASK
#define IFXMTU_ERROR_FLAGS_MASK
Mask for the ERROR flags.
Definition: IfxMtu.h:359


iLLD_TC38A: IfxMtu_cfg.c Source File

  • _Impl
IfxMtu_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxMtu_cfg.c
3 * \brief Mtu on-chip implementation data
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxMtu_cfg.h"
47 #include "Mtu/Std/IfxMtu.h"
48
49 /******************************************************************************/
50 /*-----------------------Exported Variables/Constants-------------------------*/
51 /******************************************************************************/
52
53 const IfxMtu_SramItem IfxMtu_sramTable[IFXMTU_NUM_MBIST_TABLE_ITEMS] = {
54 {2 * 4, 16, 6, 0, 1}, /**< \brief IfxMtu_MbistSel_cpu0Dspr0 */
55 {2 * 1, 19, 10, 0, 4}, /**< \brief IfxMtu_MbistSel_cpu0Dtag */
56 {2 * 2, 64, 8, 0, 1}, /**< \brief IfxMtu_MbistSel_cpu0Pspr */
57 {2 * 1, 19, 10, 0, 4}, /**< \brief IfxMtu_MbistSel_cpu0Ptag */
58 {2 * 1, 64, 8, 0, 1}, /**< \brief IfxMtu_MbistSel_cpu0Dlmu */
59 {2 * 4, 16, 6, 0, 1}, /**< \brief IfxMtu_MbistSel_cpu1Dspr0 */
60 {2 * 1, 19, 10, 0, 4}, /**< \brief IfxMtu_MbistSel_cpu1Dtag */
61 {2 * 2, 64, 8, 0, 1}, /**< \brief IfxMtu_MbistSel_cpu1Pspr */
62 {2 * 1, 19, 10, 0, 4}, /**< \brief IfxMtu_MbistSel_cpu1Ptag */
63 {2 * 1, 64, 8, 0, 1}, /**< \brief IfxMtu_MbistSel_cpu1Dlmu */
64 {2 * 4, 16, 6, 0, 1}, /**< \brief IfxMtu_MbistSel_cpu2Dspr */
65 {2 * 1, 19, 10, 0, 4}, /**< \brief IfxMtu_MbistSel_cpu2Dtag */
66 {2 * 2, 64, 8, 0, 1}, /**< \brief IfxMtu_MbistSel_cpu2Pspr */
67 {2 * 1, 19, 10, 0, 4}, /**< \brief IfxMtu_MbistSel_cpu2Ptag */
68 {2 * 1, 64, 8, 0, 1}, /**< \brief IfxMtu_MbistSel_cpu2Dlmu */
69 {2 * 4, 16, 6, 0, 1}, /**< \brief IfxMtu_MbistSel_cpu3Dspr */
70 {2 * 1, 19, 10, 0, 4}, /**< \brief IfxMtu_MbistSel_cpu3Dtag */
71 {2 * 2, 64, 8, 0, 1}, /**< \brief IfxMtu_MbistSel_cpu3Pspr */
72 {2 * 1, 19, 10, 0, 4}, /**< \brief IfxMtu_MbistSel_cpu3Ptag */
73 {2 * 1, 64, 8, 0, 1}, /**< \brief IfxMtu_MbistSel_cpu3Dlmu */
74 {0 * 0, 0, 0, 0, 0}, /**< \brief IfxMtu_MbistSel_none */
75 {0 * 0, 0, 0, 0, 0}, /**< \brief IfxMtu_MbistSel_none */
76 {0 * 0, 0, 0, 0, 0}, /**< \brief IfxMtu_MbistSel_none */
77 {0 * 0, 0, 0, 0, 0}, /**< \brief IfxMtu_MbistSel_none */
78 {0 * 0, 0, 0, 0, 0}, /**< \brief IfxMtu_MbistSel_none */
79 {0 * 0, 0, 0, 0, 0}, /**< \brief IfxMtu_MbistSel_none */
80 {0 * 0, 0, 0, 0, 0}, /**< \brief IfxMtu_MbistSel_none */
81 {0 * 0, 0, 0, 0, 0}, /**< \brief IfxMtu_MbistSel_none */
82 {0 * 0, 0, 0, 0, 0}, /**< \brief IfxMtu_MbistSel_none */
83 {0 * 0, 0, 0, 0, 0}, /**< \brief IfxMtu_MbistSel_none */
84 {2 * 2, 64, 8, 0, 1}, /**< \brief IfxMtu_MbistSel_lmu0 */
85 {0 * 0, 0, 0, 0, 0}, /**< \brief IfxMtu_MbistSel_none */
86 {0 * 0, 0, 0, 0, 0}, /**< \brief IfxMtu_MbistSel_none */
87 {0 * 0, 0, 0, 0, 0}, /**< \brief IfxMtu_MbistSel_none */
88 {2 * 4, 16, 6, 0, 1}, /**< \brief IfxMtu_MbistSel_cpu0Dspr1 */
89 {2 * 4, 16, 6, 0, 1}, /**< \brief IfxMtu_MbistSel_cpu1Dspr1 */
90 {0 * 0, 0, 0, 0, 0}, /**< \brief IfxMtu_MbistSel_none */
91 {0 * 0, 0, 0, 0, 0}, /**< \brief IfxMtu_MbistSel_none */
92 {1 * 2, 64, 8, 0, 1}, /**< \brief IfxMtu_MbistSel_dam0 */
93 {0 * 0, 0, 0, 0, 0}, /**< \brief IfxMtu_MbistSel_none */
94 {0 * 0, 0, 0, 0, 0}, /**< \brief IfxMtu_MbistSel_none */
95 {1 * 4, 64, 8, 0, 1}, /**< \brief IfxMtu_MbistSel_dma */
96 {1 * 2, 128, 9, 0, 1}, /**< \brief IfxMtu_MbistSel_miniMcds */
97 {0 * 0, 0, 0, 0, 0}, /**< \brief IfxMtu_MbistSel_none */
98 {0 * 0, 0, 0, 0, 0}, /**< \brief IfxMtu_MbistSel_none */
99 {0 * 0, 0, 0, 0, 0}, /**< \brief IfxMtu_MbistSel_none */
100 {0 * 0, 0, 0, 0, 0}, /**< \brief IfxMtu_MbistSel_none */
101 {0 * 0, 0, 0, 0, 0}, /**< \brief IfxMtu_MbistSel_none */
102 {0 * 0, 0, 0, 0, 0}, /**< \brief IfxMtu_MbistSel_none */
103 {0 * 0, 0, 0, 0, 0}, /**< \brief IfxMtu_MbistSel_none */
104 {0 * 0, 0, 0, 0, 0}, /**< \brief IfxMtu_MbistSel_none */
105 {0 * 0, 0, 0, 0, 0}, /**< \brief IfxMtu_MbistSel_none */
106 {0 * 0, 0, 0, 0, 0}, /**< \brief IfxMtu_MbistSel_none */
107 {1 * 3, 29, 7, 0, 1}, /**< \brief IfxMtu_MbistSel_gtmFifo */
108 {1 * 5, 32, 7, 0, 1}, /**< \brief IfxMtu_MbistSel_gtmMcs0 */
109 {1 * 5, 32, 7, 0, 1}, /**< \brief IfxMtu_MbistSel_gtmMcs01 */
110 {1 * 5, 32, 7, 0, 1}, /**< \brief IfxMtu_MbistSel_gtmMcs1 */
111 {1 * 5, 32, 7, 0, 1}, /**< \brief IfxMtu_MbistSel_gtmMcs11 */
112 {1 * 1, 24, 6, 0, 1}, /**< \brief IfxMtu_MbistSel_gtmDpll1a */
113 {1 * 1, 24, 6, 0, 1}, /**< \brief IfxMtu_MbistSel_gtmDpll1b */
114 {1 * 1, 24, 6, 0, 1}, /**< \brief IfxMtu_MbistSel_gtmDpll2 */
115 {0 * 0, 0, 0, 0, 0}, /**< \brief IfxMtu_MbistSel_none */
116 {1 * 1, 32, 7, 0, 1}, /**< \brief IfxMtu_MbistSel_mcan0 */
117 {1 * 1, 32, 7, 0, 1}, /**< \brief IfxMtu_MbistSel_mcan1 */
118 {1 * 1, 32, 7, 0, 1}, /**< \brief IfxMtu_MbistSel_mcan2 */
119 {1 * 1, 32, 7, 0, 1}, /**< \brief IfxMtu_MbistSel_psi5 */
120 {1 * 2, 32, 7, 0, 1}, /**< \brief IfxMtu_MbistSel_eray0Obf */
121 {1 * 2, 32, 7, 0, 1}, /**< \brief IfxMtu_MbistSel_eray1Obf */
122 {1 * 4, 32, 7, 0, 1}, /**< \brief IfxMtu_MbistSel_eray0IbfTbf */
123 {1 * 4, 32, 7, 0, 1}, /**< \brief IfxMtu_MbistSel_eray1IbfTbf */
124 {1 * 1, 32, 7, 0, 1}, /**< \brief IfxMtu_MbistSel_eray0Mbf */
125 {1 * 1, 32, 7, 0, 1}, /**< \brief IfxMtu_MbistSel_eray1Mbf */
126 {0 * 0, 0, 0, 0, 0}, /**< \brief IfxMtu_MbistSel_none */
127 {0 * 0, 0, 0, 0, 0}, /**< \brief IfxMtu_MbistSel_none */
128 {0 * 0, 0, 0, 0, 0}, /**< \brief IfxMtu_MbistSel_none */
129 {0 * 0, 0, 0, 0, 0}, /**< \brief IfxMtu_MbistSel_none */
130 {0 * 0, 0, 0, 0, 0}, /**< \brief IfxMtu_MbistSel_none */
131 {2 * 2, 8, 5, 0, 1}, /**< \brief IfxMtu_MbistSel_scrXram */
132 {1 * 1, 8, 5, 0, 1}, /**< \brief IfxMtu_MbistSel_scrIram */
133 {0 * 0, 0, 0, 0, 0}, /**< \brief IfxMtu_MbistSel_none */
134 {0 * 0, 0, 0, 0, 0}, /**< \brief IfxMtu_MbistSel_none */
135 {0 * 0, 0, 0, 0, 0}, /**< \brief IfxMtu_MbistSel_none */
136 {1 * 2, 35, 7, 0, 1}, /**< \brief IfxMtu_MbistSel_ethermacRx */
137 {1 * 2, 35, 7, 0, 1}, /**< \brief IfxMtu_MbistSel_ethermacTx */
138 };
139
140 const IfxMtu_MbistConfigPattern nonDestructiveTestPattern[] = {
141 {
142 IFXMTU_MBIST_CONFIG_NONDISTTEST_CONFIG0,
143 IFXMTU_MBIST_CONFIG_NONDISTTEST_CONFIG1
144 }
145 };
146
147 const IfxMtu_MbistSshConfig mbistSshConfigGang0[] = {
148 {
149 IfxMtu_MbistSel_mcan0, /* sshSel */
150 0x00, /* lowAddress */
151 0x7F, /* highAddress */
152 5, /* uncorrectableErrorThreshold*/
153 1 /* preClearEnable */
154 },
155 {
156 IfxMtu_MbistSel_mcan1, /* sshSel */
157 0x00, /* lowAddress */
158 0x3F, /* highAddress */
159 5, /* uncorrectableErrorThreshold*/
160 1 /* preClearEnable */
161 },
162 {
163 IfxMtu_MbistSel_mcan2, /* sshSel */
164 0x00, /* lowAddress */
165 0x3F, /* highAddress */
166 5, /* uncorrectableErrorThreshold*/
167 1 /* preClearEnable */
168 },
169 {
170 IfxMtu_MbistSel_cpu0Dspr, /* sshSel */
171 0x00, /* lowAddress */
172 0x7F, /* highAddress */
173 5, /* uncorrectableErrorThreshold*/
174 0 /* preClearEnable */
175 },
176 {
177 IfxMtu_MbistSel_cpu0Dlmu, /* sshSel */
178 0x00, /* lowAddress */
179 0x3F, /* highAddress */
180 5, /* uncorrectableErrorThreshold*/
181 0 /* preClearEnable */
182 },
183 {
184 IfxMtu_MbistSel_cpu1Dlmu, /* sshSel */
185 0x00, /* lowAddress */
186 0x3F, /* highAddress */
187 5, /* uncorrectableErrorThreshold*/
188 0 /* preClearEnable */
189 }
190 };
191
192 const IfxMtu_MbistSshConfig mbistSshConfigGang1[] = {
193 {
194 IfxMtu_MbistSel_cpu1Dspr, /* sshSel */
195 0x00, /* lowAddress */
196 0x7F, /* highAddress */
197 5, /* uncorrectableErrorThreshold*/
198 0 /* preClearEnable */
199 },
200 {
201 IfxMtu_MbistSel_gtmDpll2, /* sshSel */
202 0x00, /* lowAddress */
203 0x3F, /* highAddress */
204 5, /* uncorrectableErrorThreshold*/
205 1 /* preClearEnable */
206 },
207 {
208 IfxMtu_MbistSel_eray0Mbf, /* sshSel */
209 0x00, /* lowAddress */
210 0x1F, /* highAddress */
211 5, /* uncorrectableErrorThreshold*/
212 1 /* preClearEnable */
213 }
214 };
215
216 const IfxMtu_MbistSshConfig mbistSshConfigGang2[] = {
217 {
218 IfxMtu_MbistSel_cpu2Dspr, /* sshSel */
219 0x00, /* lowAddress */
220 0x6F, /* highAddress */
221 5, /* uncorrectableErrorThreshold*/
222 0 /* preClearEnable */
223 },
224 {
225 IfxMtu_MbistSel_eray1Mbf, /* sshSel */
226 0x00, /* lowAddress */
227 0x1F, /* highAddress */
228 5, /* uncorrectableErrorThreshold*/
229 1 /* preClearEnable */
230 }
231 };
232
233 const IfxMtu_MbistSshConfig mbistSshConfigGang3[] = {
234 {
235 IfxMtu_MbistSel_cpu3Dspr, /* sshSel */
236 0x00, /* lowAddress */
237 0x6F, /* highAddress */
238 5, /* uncorrectableErrorThreshold*/
239 0 /* preClearEnable */
240 },
241 {
242 IfxMtu_MbistSel_cpu3Dlmu, /* sshSel */
243 0x00, /* lowAddress */
244 0x3F, /* highAddress */
245 5, /* uncorrectableErrorThreshold*/
246 0 /* preClearEnable */
247 },
248 {
249 IfxMtu_MbistSel_gtmMcs0Fast, /* sshSel */
250 0x00, /* lowAddress */
251 0x1F, /* highAddress */
252 5, /* uncorrectableErrorThreshold*/
253 1 /* preClearEnable */
254 }
255 };
256
257 const IfxMtu_MbistSshConfig mbistSshConfigGang4[] = {
258 {
259 IfxMtu_MbistSel_cpu2Dlmu, /* sshSel */
260 0x00, /* lowAddress */
261 0x3F, /* highAddress */
262 5, /* uncorrectableErrorThreshold*/
263 0 /* preClearEnable */
264 },
265 {
266 IfxMtu_MbistSel_lmu0, /* sshSel */
267 0x00, /* lowAddress */
268 0x3F, /* highAddress */
269 5, /* uncorrectableErrorThreshold*/
270 0 /* preClearEnable */
271 },
272 {
273 IfxMtu_MbistSel_cpu0Pspr, /* sshSel */
274 0x00, /* lowAddress */
275 0x2F, /* highAddress */
276 5, /* uncorrectableErrorThreshold*/
277 0 /* preClearEnable */
278 },
279 {
280 IfxMtu_MbistSel_gtmMcs1Slow, /* sshSel */
281 0x00, /* lowAddress */
282 0x0F, /* highAddress */
283 5, /* uncorrectableErrorThreshold*/
284 1 /* preClearEnable */
285 }
286 };
287
288 const IfxMtu_MbistSshConfig mbistSshConfigGang5[] = {
289 {
290 IfxMtu_MbistSel_cpu1Pspr, /* sshSel */
291 0x00, /* lowAddress */
292 0x2F, /* highAddress */
293 5, /* uncorrectableErrorThreshold*/
294 0 /* preClearEnable */
295 },
296 {
297 IfxMtu_MbistSel_cpu2Pspr, /* sshSel */
298 0x00, /* lowAddress */
299 0x2F, /* highAddress */
300 5, /* uncorrectableErrorThreshold*/
301 0 /* preClearEnable */
302 },
303 {
304 IfxMtu_MbistSel_gtmMcs0Slow, /* sshSel */
305 0x00, /* lowAddress */
306 0x1F, /* highAddress */
307 5, /* uncorrectableErrorThreshold*/
308 1 /* preClearEnable */
309 },
310 {
311 IfxMtu_MbistSel_gtmFifo, /* sshSel */
312 0x00, /* lowAddress */
313 0xF, /* highAddress */
314 5, /* uncorrectableErrorThreshold*/
315 1 /* preClearEnable */
316 },
317 {
318 IfxMtu_MbistSel_gtmMcs1Fast, /* sshSel */
319 0x00, /* lowAddress */
320 0x0F, /* highAddress */
321 5, /* uncorrectableErrorThreshold*/
322 1 /* preClearEnable */
323 },
324 {
325 IfxMtu_MbistSel_gtmDpll1b, /* sshSel */
326 0x00, /* lowAddress */
327 0x5, /* highAddress */
328 5, /* uncorrectableErrorThreshold*/
329 1 /* preClearEnable */
330 }
331 };
332
333 const IfxMtu_MbistSshConfig mbistSshConfigGang6[] = {
334 {
335 IfxMtu_MbistSel_cpu3Pspr, /* sshSel */
336 0x00, /* lowAddress */
337 0x2F, /* highAddress */
338 5, /* uncorrectableErrorThreshold*/
339 0 /* preClearEnable */
340 },
341 {
342 IfxMtu_MbistSel_psi5, /* sshSel */
343 0x00, /* lowAddress */
344 0x03, /* highAddress */
345 5, /* uncorrectableErrorThreshold*/
346 1 /* preClearEnable */
347 },
348 {
349 IfxMtu_MbistSel_cpu0Ptag, /* sshSel */
350 0x00, /* lowAddress */
351 0x7, /* highAddress */
352 5, /* uncorrectableErrorThreshold*/
353 0 /* preClearEnable */
354 },
355 {
356 IfxMtu_MbistSel_cpu1Ptag, /* sshSel */
357 0x00, /* lowAddress */
358 0x7, /* highAddress */
359 5, /* uncorrectableErrorThreshold*/
360 0 /* preClearEnable */
361 },
362 {
363 IfxMtu_MbistSel_cpu2Ptag, /* sshSel */
364 0x00, /* lowAddress */
365 0x7, /* highAddress */
366 5, /* uncorrectableErrorThreshold*/
367 0 /* preClearEnable */
368 },
369 {
370 IfxMtu_MbistSel_cpu3Ptag, /* sshSel */
371 0x00, /* lowAddress */
372 0x7, /* highAddress */
373 5, /* uncorrectableErrorThreshold*/
374 0 /* preClearEnable */
375 },
376 {
377 IfxMtu_MbistSel_dma, /* sshSel */
378 0x00, /* lowAddress */
379 0x01, /* highAddress */
380 5, /* uncorrectableErrorThreshold*/
381 1 /* preClearEnable */
382 },
383 {
384 IfxMtu_MbistSel_eray0IbfTbf, /* sshSel */
385 0x00, /* lowAddress */
386 0x01, /* highAddress */
387 5, /* uncorrectableErrorThreshold*/
388 1 /* preClearEnable */
389 },
390 {
391 IfxMtu_MbistSel_eray1IbfTbf, /* sshSel */
392 0x00, /* lowAddress */
393 0x01, /* highAddress */
394 5, /* uncorrectableErrorThreshold*/
395 1 /* preClearEnable */
396 },
397 // {
398 // IfxMtu_MbistSel_mod7, /*PKC SCM*/ /* sshSel */
399 // 0x00, /* lowAddress */
400 // 0x01, /* highAddress */
401 // 5, /* uncorrectableErrorThreshold*/
402 // 1 /* preClearEnable */
403 // },
404 {
405 IfxMtu_MbistSel_cpu0Dtag, /* sshSel */
406 0x00, /* lowAddress */
407 0x03, /* highAddress */
408 5, /* uncorrectableErrorThreshold*/
409 0 /* preClearEnable */
410 },
411 {
412 IfxMtu_MbistSel_cpu1Dtag, /* sshSel */
413 0x00, /* lowAddress */
414 0x03, /* highAddress */
415 5, /* uncorrectableErrorThreshold*/
416 0 /* preClearEnable */
417 },
418 {
419 IfxMtu_MbistSel_cpu2Dtag, /* sshSel */
420 0x00, /* lowAddress */
421 0x03, /* highAddress */
422 5, /* uncorrectableErrorThreshold*/
423 0 /* preClearEnable */
424 },
425 {
426 IfxMtu_MbistSel_cpu3Dtag, /* sshSel */
427 0x00, /* lowAddress */
428 0x03, /* highAddress */
429 5, /* uncorrectableErrorThreshold*/
430 0 /* preClearEnable */
431 },
432 {
433 IfxMtu_MbistSel_gtmDpll1a, /* sshSel */
434 0x00, /* lowAddress */
435 0x01, /* highAddress */
436 5, /* uncorrectableErrorThreshold*/
437 1 /* preClearEnable */
438 },
439 {
440 IfxMtu_MbistSel_eray0Obf, /* sshSel */
441 0x00, /* lowAddress */
442 0x00, /* highAddress */
443 5, /* uncorrectableErrorThreshold*/
444 1 /* preClearEnable */
445 }
446 };
447
448 const IfxMtu_MbistSshConfig mbistSshConfigGang7[] = {
449 {
450 IfxMtu_MbistSel_eray1Obf, /* sshSel */
451 0x00, /* lowAddress */
452 0x00, /* highAddress */
453 5, /* uncorrectableErrorThreshold*/
454 1 /* preClearEnable */
455 },
456 // {
457 // IfxMtu_MbistSel_mod6, /*PKC TCM*/ /* sshSel */
458 // 0x00, /* lowAddress */
459 // 0x01, /* highAddress */
460 // 5, /* uncorrectableErrorThreshold*/
461 // 1 /* preClearEnable */
462 // }
463 };
464
465 const IfxMtu_MbistConfig mbistGang0Config = {
466 IFXMTU_MBIST_CONFIG_NONDISTTEST_MCONTROL, /* mcontrol */
467 sizeof(mbistSshConfigGang0) / sizeof(IfxMtu_MbistSshConfig),
468 sizeof(nonDestructiveTestPattern) / sizeof(IfxMtu_MbistConfigPattern),
469 mbistSshConfigGang0,
470 nonDestructiveTestPattern
471 };
472
473 const IfxMtu_MbistConfig mbistGang1Config = {
474 IFXMTU_MBIST_CONFIG_NONDISTTEST_MCONTROL, /* mcontrol */
475 sizeof(mbistSshConfigGang1) / sizeof(IfxMtu_MbistSshConfig),
476 sizeof(nonDestructiveTestPattern) / sizeof(IfxMtu_MbistConfigPattern),
477 mbistSshConfigGang1,
478 nonDestructiveTestPattern
479 };
480
481 const IfxMtu_MbistConfig mbistGang2Config = {
482 IFXMTU_MBIST_CONFIG_NONDISTTEST_MCONTROL, /* mcontrol */
483 sizeof(mbistSshConfigGang2) / sizeof(IfxMtu_MbistSshConfig),
484 sizeof(nonDestructiveTestPattern) / sizeof(IfxMtu_MbistConfigPattern),
485 mbistSshConfigGang2,
486 nonDestructiveTestPattern
487 };
488
489 const IfxMtu_MbistConfig mbistGang3Config = {
490 IFXMTU_MBIST_CONFIG_NONDISTTEST_MCONTROL, /* mcontrol */
491 sizeof(mbistSshConfigGang3) / sizeof(IfxMtu_MbistSshConfig),
492 sizeof(nonDestructiveTestPattern) / sizeof(IfxMtu_MbistConfigPattern),
493 mbistSshConfigGang3,
494 nonDestructiveTestPattern
495 };
496
497 const IfxMtu_MbistConfig mbistGang4Config = {
498 IFXMTU_MBIST_CONFIG_NONDISTTEST_MCONTROL, /* mcontrol */
499 sizeof(mbistSshConfigGang4) / sizeof(IfxMtu_MbistSshConfig),
500 sizeof(nonDestructiveTestPattern) / sizeof(IfxMtu_MbistConfigPattern),
501 mbistSshConfigGang4,
502 nonDestructiveTestPattern
503 };
504
505 const IfxMtu_MbistConfig mbistGang5Config = {
506 IFXMTU_MBIST_CONFIG_NONDISTTEST_MCONTROL, /* mcontrol */
507 sizeof(mbistSshConfigGang5) / sizeof(IfxMtu_MbistSshConfig),
508 sizeof(nonDestructiveTestPattern) / sizeof(IfxMtu_MbistConfigPattern),
509 mbistSshConfigGang5,
510 nonDestructiveTestPattern
511 };
512
513 const IfxMtu_MbistConfig mbistGang6Config = {
514 IFXMTU_MBIST_CONFIG_NONDISTTEST_MCONTROL, /* mcontrol */
515 sizeof(mbistSshConfigGang6) / sizeof(IfxMtu_MbistSshConfig),
516 sizeof(nonDestructiveTestPattern) / sizeof(IfxMtu_MbistConfigPattern),
517 mbistSshConfigGang6,
518 nonDestructiveTestPattern
519 };
520
521 const IfxMtu_MbistConfig mbistGang7Config = {
522 IFXMTU_MBIST_CONFIG_NONDISTTEST_MCONTROL, /* mcontrol */
523 sizeof(mbistSshConfigGang7) / sizeof(IfxMtu_MbistSshConfig),
524 sizeof(nonDestructiveTestPattern) / sizeof(IfxMtu_MbistConfigPattern),
525 mbistSshConfigGang7,
526 nonDestructiveTestPattern
527 };
528
529 const IfxMtu_MbistConfig *const mbistGangConfig[] = {
530 &mbistGang0Config,
531 &mbistGang1Config,
532 &mbistGang2Config,
533 &mbistGang3Config,
534 &mbistGang4Config,
535 &mbistGang5Config,
536 &mbistGang6Config,
537 &mbistGang7Config,
538 (void *)0 //End indicator
539 };
mbistGang3Config
const IfxMtu_MbistConfig mbistGang3Config
Definition: IfxMtu_cfg.c:489
IfxMtu_MbistSel_cpu1Dlmu
Definition: IfxMtu_cfg.h:111
IfxMtu.h
MTU basic functionality.
IfxMtu_MbistSel_eray1Mbf
Definition: IfxMtu_cfg.h:145
IfxMtu_sramTable
const IfxMtu_SramItem IfxMtu_sramTable[IFXMTU_NUM_MBIST_TABLE_ITEMS]
Definition: IfxMtu_cfg.c:53
IFXMTU_MBIST_CONFIG_NONDISTTEST_CONFIG0
#define IFXMTU_MBIST_CONFIG_NONDISTTEST_CONFIG0
Definition: IfxMtu.h:340
IfxMtu_MbistConfig
Definition: IfxMtu.h:390
IfxMtu_MbistSel_gtmMcs0Fast
Definition: IfxMtu_cfg.h:130
IfxMtu_MbistSel_cpu0Pspr
Definition: IfxMtu_cfg.h:104
mbistSshConfigGang1
const IfxMtu_MbistSshConfig mbistSshConfigGang1[]
Definition: IfxMtu_cfg.c:192
IfxMtu_MbistSel_eray1IbfTbf
Definition: IfxMtu_cfg.h:143
mbistSshConfigGang7
const IfxMtu_MbistSshConfig mbistSshConfigGang7[]
Definition: IfxMtu_cfg.c:448
mbistSshConfigGang2
const IfxMtu_MbistSshConfig mbistSshConfigGang2[]
Definition: IfxMtu_cfg.c:216
IfxMtu_MbistSel_eray0Mbf
Definition: IfxMtu_cfg.h:144
IfxMtu_MbistSel_mcan1
Definition: IfxMtu_cfg.h:137
IFXMTU_MBIST_CONFIG_NONDISTTEST_MCONTROL
#define IFXMTU_MBIST_CONFIG_NONDISTTEST_MCONTROL
Configuration patterns for the MBIST Array of configurations which are used by MCx_CONFIG0 register...
Definition: IfxMtu.h:338
mbistSshConfigGang6
const IfxMtu_MbistSshConfig mbistSshConfigGang6[]
Definition: IfxMtu_cfg.c:333
IFXMTU_MBIST_CONFIG_NONDISTTEST_CONFIG1
#define IFXMTU_MBIST_CONFIG_NONDISTTEST_CONFIG1
Definition: IfxMtu.h:348
IfxMtu_MbistSel_cpu0Dtag
Definition: IfxMtu_cfg.h:103
IfxMtu_MbistSel_cpu2Ptag
Definition: IfxMtu_cfg.h:115
IfxMtu_MbistSel_cpu2Dspr
Definition: IfxMtu_cfg.h:112
IFXMTU_NUM_MBIST_TABLE_ITEMS
#define IFXMTU_NUM_MBIST_TABLE_ITEMS
Number of MBIST Table items.
Definition: IfxMtu_cfg.h:70
IfxMtu_MbistSel_cpu1Ptag
Definition: IfxMtu_cfg.h:110
IfxMtu_MbistSel_cpu0Ptag
Definition: IfxMtu_cfg.h:105
IfxMtu_MbistSel_gtmFifo
Definition: IfxMtu_cfg.h:128
IfxMtu_MbistSel_cpu2Pspr
Definition: IfxMtu_cfg.h:114
IfxMtu_MbistSel_cpu1Pspr
Definition: IfxMtu_cfg.h:109
IfxMtu_MbistSel_cpu3Dtag
Definition: IfxMtu_cfg.h:118
IfxMtu_MbistSel_cpu2Dlmu
Definition: IfxMtu_cfg.h:116
mbistGang4Config
const IfxMtu_MbistConfig mbistGang4Config
Definition: IfxMtu_cfg.c:497
IfxMtu_MbistSel_eray1Obf
Definition: IfxMtu_cfg.h:141
IfxMtu_MbistSshConfig
Definition: IfxMtu.h:377
IfxMtu_MbistSel_cpu1Dtag
Definition: IfxMtu_cfg.h:108
IfxMtu_MbistSel_gtmDpll2
Definition: IfxMtu_cfg.h:135
IfxMtu_MbistSel_cpu3Dlmu
Definition: IfxMtu_cfg.h:121
IfxMtu_MbistSel_psi5
Definition: IfxMtu_cfg.h:139
IfxMtu_MbistSel_cpu3Ptag
Definition: IfxMtu_cfg.h:120
IfxMtu_MbistSel_gtmMcs1Fast
Definition: IfxMtu_cfg.h:132
mbistGang5Config
const IfxMtu_MbistConfig mbistGang5Config
Definition: IfxMtu_cfg.c:505
mbistGang6Config
const IfxMtu_MbistConfig mbistGang6Config
Definition: IfxMtu_cfg.c:513
nonDestructiveTestPattern
const IfxMtu_MbistConfigPattern nonDestructiveTestPattern[]
Definition: IfxMtu_cfg.c:140
IfxMtu_MbistSel_gtmDpll1b
Definition: IfxMtu_cfg.h:134
mbistGang7Config
const IfxMtu_MbistConfig mbistGang7Config
Definition: IfxMtu_cfg.c:521
IfxMtu_MbistSel_lmu0
Definition: IfxMtu_cfg.h:122
IfxMtu_MbistSel_gtmMcs1Slow
Definition: IfxMtu_cfg.h:131
IfxMtu_MbistSel_mcan0
Definition: IfxMtu_cfg.h:136
mbistSshConfigGang5
const IfxMtu_MbistSshConfig mbistSshConfigGang5[]
Definition: IfxMtu_cfg.c:288
IfxMtu_MbistSel_eray0Obf
Definition: IfxMtu_cfg.h:140
IfxMtu_MbistSel_cpu3Dspr
Definition: IfxMtu_cfg.h:117
IfxMtu_MbistSel_gtmDpll1a
Definition: IfxMtu_cfg.h:133
IfxMtu_MbistSel_cpu1Dspr
Definition: IfxMtu_cfg.h:107
mbistSshConfigGang0
const IfxMtu_MbistSshConfig mbistSshConfigGang0[]
Definition: IfxMtu_cfg.c:147
IfxMtu_MbistSel_mcan2
Definition: IfxMtu_cfg.h:138
mbistSshConfigGang3
const IfxMtu_MbistSshConfig mbistSshConfigGang3[]
Definition: IfxMtu_cfg.c:233
IfxMtu_MbistSel_cpu3Pspr
Definition: IfxMtu_cfg.h:119
IfxMtu_MbistSel_cpu0Dlmu
Definition: IfxMtu_cfg.h:106
IfxMtu_MbistSel_cpu0Dspr
Definition: IfxMtu_cfg.h:102
mbistGang2Config
const IfxMtu_MbistConfig mbistGang2Config
Definition: IfxMtu_cfg.c:481
IfxMtu_MbistConfigPattern
Definition: IfxMtu.h:371
mbistSshConfigGang4
const IfxMtu_MbistSshConfig mbistSshConfigGang4[]
Definition: IfxMtu_cfg.c:257
IfxMtu_MbistSel_gtmMcs0Slow
Definition: IfxMtu_cfg.h:129
IfxMtu_cfg.h
Mtu on-chip implementation data.
IfxMtu_MbistSel_eray0IbfTbf
Definition: IfxMtu_cfg.h:142
mbistGang1Config
const IfxMtu_MbistConfig mbistGang1Config
Definition: IfxMtu_cfg.c:473
IfxMtu_MbistSel_cpu2Dtag
Definition: IfxMtu_cfg.h:113
mbistGangConfig
const IfxMtu_MbistConfig *const mbistGangConfig[]
Definition: IfxMtu_cfg.c:529
mbistGang0Config
const IfxMtu_MbistConfig mbistGang0Config
Definition: IfxMtu_cfg.c:465
IfxMtu_SramItem
Describes physical parameters of a SRAM memory.
Definition: IfxMtu_cfg.h:158
IfxMtu_MbistSel_dma
Definition: IfxMtu_cfg.h:126


iLLD_TC38A: IfxMtu_cfg.h Source File

  • _Impl
IfxMtu_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxMtu_cfg.h
3 * \brief Mtu on-chip implementation data
4 * \ingroup IfxLld_Mtu
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Mtu MTU
42 * \ingroup IfxLld
43 * \defgroup IfxLld_Mtu_Impl Implementation
44 * \ingroup IfxLld_Mtu
45 * \defgroup IfxLld_Mtu_Std Standard Driver
46 * \ingroup IfxLld_Mtu
47 */
48
49 #ifndef IFXMTU_CFG_H
50 #define IFXMTU_CFG_H 1
51
52 /******************************************************************************/
53 /*----------------------------------Includes----------------------------------*/
54 /******************************************************************************/
55
56 #include "Cpu/Std/IfxCpu.h"
57 #include "Cpu/Std/IfxCpu_Intrinsics.h"
58 #include "IfxMtu_reg.h"
59
60 /******************************************************************************/
61 /*-----------------------------------Macros-----------------------------------*/
62 /******************************************************************************/
63
64 /** \brief Base address of first MBIST Control Block
65 */
66 #define IFXMTU_MC_ADDRESS_BASE (0xF0061000u)
67
68 /** \brief Number of MBIST Table items
69 */
70 #define IFXMTU_NUM_MBIST_TABLE_ITEMS (84)
71
72 /** \brief Maximum number of tracked SRAM addresses (ETTR)
73 */
74 #define IFXMTU_MAX_TRACKED_ADDRESSES (5)
75
76 /**
77 * Conversion to SRAM address from Memory Mapped address
78 */
79 #define IFXMTU_SCRAMBLED_RANGE_ADDR_DSPR0(memoryMapedAddr) (uint8)((memoryMapedAddr - 0x70000000) / (16 * 64))
80 #define IFXMTU_SCRAMBLED_RANGE_ADDR_DSPR1(memoryMapedAddr) (uint8)((memoryMapedAddr - 0x60000000) / (16 * 64))
81 #define IFXMTU_SCRAMBLED_RANGE_ADDR_DSPR2(memoryMapedAddr) (uint8)((memoryMapedAddr - 0x50000000) / (16 * 64))
82 #define IFXMTU_SCRAMBLED_RANGE_ADDR_DSPR3(memoryMapedAddr) (uint8)((memoryMapedAddr - 0x40000000) / (16 * 64))
83 #define IFXMTU_SCRAMBLED_RANGE_ADDR_PSPR0(memoryMapedAddr) (uint8)((memoryMapedAddr - 0x70100000) / (16 * 64))
84 #define IFXMTU_SCRAMBLED_RANGE_ADDR_PSPR1(memoryMapedAddr) (uint8)((memoryMapedAddr - 0x60100000) / (16 * 64))
85 #define IFXMTU_SCRAMBLED_RANGE_ADDR_PSPR2(memoryMapedAddr) (uint8)((memoryMapedAddr - 0x50100000) / (16 * 64))
86 #define IFXMTU_SCRAMBLED_RANGE_ADDR_PSPR3(memoryMapedAddr) (uint8)((memoryMapedAddr - 0x40100000) / (16 * 64))
87 #define IFXMTU_SCRAMBLED_RANGE_ADDR_DLMU0(memoryMapedAddr) (uint8)((memoryMapedAddr - 0x90000000) / (16 * 64))
88 #define IFXMTU_SCRAMBLED_RANGE_ADDR_DLMU1(memoryMapedAddr) (uint8)((memoryMapedAddr - 0x90010000) / (16 * 64))
89 #define IFXMTU_SCRAMBLED_RANGE_ADDR_DLMU2(memoryMapedAddr) (uint8)((memoryMapedAddr - 0x90020000) / (16 * 64))
90 #define IFXMTU_SCRAMBLED_RANGE_ADDR_DLMU3(memoryMapedAddr) (uint8)((memoryMapedAddr - 0x90030000) / (16 * 64))
91
92 /******************************************************************************/
93 /*-------------------------------Enumerations---------------------------------*/
94 /******************************************************************************/
95
96 /** \brief MBIST Selection
97 */
98
99 typedef enum
100 {
101 IfxMtu_MbistSel_none = -1,
102 IfxMtu_MbistSel_cpu0Dspr = 0,
103 IfxMtu_MbistSel_cpu0Dtag = 1,
104 IfxMtu_MbistSel_cpu0Pspr = 2,
105 IfxMtu_MbistSel_cpu0Ptag = 3,
106 IfxMtu_MbistSel_cpu0Dlmu = 4,
107 IfxMtu_MbistSel_cpu1Dspr = 5,
108 IfxMtu_MbistSel_cpu1Dtag = 6,
109 IfxMtu_MbistSel_cpu1Pspr = 7,
110 IfxMtu_MbistSel_cpu1Ptag = 8,
111 IfxMtu_MbistSel_cpu1Dlmu = 9,
112 IfxMtu_MbistSel_cpu2Dspr = 10,
113 IfxMtu_MbistSel_cpu2Dtag = 11,
114 IfxMtu_MbistSel_cpu2Pspr = 12,
115 IfxMtu_MbistSel_cpu2Ptag = 13,
116 IfxMtu_MbistSel_cpu2Dlmu = 14,
117 IfxMtu_MbistSel_cpu3Dspr = 15,
118 IfxMtu_MbistSel_cpu3Dtag = 16,
119 IfxMtu_MbistSel_cpu3Pspr = 17,
120 IfxMtu_MbistSel_cpu3Ptag = 18,
121 IfxMtu_MbistSel_cpu3Dlmu = 19,
122 IfxMtu_MbistSel_lmu0 = 30,
123 IfxMtu_MbistSel_cpu0Dspr1 = 34,
124 IfxMtu_MbistSel_cpu1Dspr1 = 35,
125 IfxMtu_MbistSel_dam0 = 38,
126 IfxMtu_MbistSel_dma = 41,
127 IfxMtu_MbistSel_miniMcds = 42,
128 IfxMtu_MbistSel_gtmFifo = 53,
129 IfxMtu_MbistSel_gtmMcs0Slow = 54,
130 IfxMtu_MbistSel_gtmMcs0Fast = 55,
131 IfxMtu_MbistSel_gtmMcs1Slow = 56,
132 IfxMtu_MbistSel_gtmMcs1Fast = 57,
133 IfxMtu_MbistSel_gtmDpll1a = 58,
134 IfxMtu_MbistSel_gtmDpll1b = 59,
135 IfxMtu_MbistSel_gtmDpll2 = 60,
136 IfxMtu_MbistSel_mcan0 = 62,
137 IfxMtu_MbistSel_mcan1 = 63,
138 IfxMtu_MbistSel_mcan2 = 64,
139 IfxMtu_MbistSel_psi5 = 65,
140 IfxMtu_MbistSel_eray0Obf = 66,
141 IfxMtu_MbistSel_eray1Obf = 67,
142 IfxMtu_MbistSel_eray0IbfTbf = 68,
143 IfxMtu_MbistSel_eray1IbfTbf = 69,
144 IfxMtu_MbistSel_eray0Mbf = 70,
145 IfxMtu_MbistSel_eray1Mbf = 71,
146 IfxMtu_MbistSel_scrXram = 77,
147 IfxMtu_MbistSel_scrIram = 78,
148 IfxMtu_MbistSel_ethermacRx = 82,
149 IfxMtu_MbistSel_ethermacTx = 83
150 } IfxMtu_MbistSel;
151
152 /******************************************************************************/
153 /*-----------------------------Data Structures--------------------------------*/
154 /******************************************************************************/
155
156 /** \brief Describes physical parameters of a SRAM memory
157 */
158 typedef struct
159 {
160 uint8 numBlocks; /**< \brief number of SRAM blocks */
161 uint16 dataSize; /**< \brief Data Size of each memory block */
162 uint8 eccSize; /**< \brief ECC Size of each memory block */
163 uint8 eccInvPos0; /**< \brief First ECC bit which needs to be inverted */
164 uint8 eccInvPos1; /**< \brief Second ECC bit which needs to be inverted */
165 } IfxMtu_SramItem;
166
167 /******************************************************************************/
168 /*-------------------Global Exported Variables/Constants----------------------*/
169 /******************************************************************************/
170
171 IFX_EXTERN const IfxMtu_SramItem IfxMtu_sramTable[IFXMTU_NUM_MBIST_TABLE_ITEMS];
172
173 #endif /* IFXMTU_CFG_H */
IfxMtu_MbistSel_cpu1Dlmu
Definition: IfxMtu_cfg.h:111
IfxMtu_MbistSel_eray1Mbf
Definition: IfxMtu_cfg.h:145
IfxMtu_sramTable
IFX_EXTERN const IfxMtu_SramItem IfxMtu_sramTable[IFXMTU_NUM_MBIST_TABLE_ITEMS]
Definition: IfxMtu_cfg.h:171
IfxMtu_MbistSel_gtmMcs0Fast
Definition: IfxMtu_cfg.h:130
IfxMtu_MbistSel_cpu0Pspr
Definition: IfxMtu_cfg.h:104
IfxMtu_MbistSel_ethermacRx
Definition: IfxMtu_cfg.h:148
IfxMtu_MbistSel_eray1IbfTbf
Definition: IfxMtu_cfg.h:143
IfxMtu_MbistSel_eray0Mbf
Definition: IfxMtu_cfg.h:144
IfxMtu_MbistSel_mcan1
Definition: IfxMtu_cfg.h:137
IfxMtu_MbistSel_none
Definition: IfxMtu_cfg.h:101
IfxMtu_MbistSel_cpu0Dtag
Definition: IfxMtu_cfg.h:103
IfxMtu_SramItem::eccInvPos0
uint8 eccInvPos0
First ECC bit which needs to be inverted.
Definition: IfxMtu_cfg.h:163
IfxMtu_MbistSel
IfxMtu_MbistSel
MBIST Selection.
Definition: IfxMtu_cfg.h:99
IfxCpu_Intrinsics.h
IfxMtu_MbistSel_cpu2Ptag
Definition: IfxMtu_cfg.h:115
IfxMtu_MbistSel_cpu2Dspr
Definition: IfxMtu_cfg.h:112
IFXMTU_NUM_MBIST_TABLE_ITEMS
#define IFXMTU_NUM_MBIST_TABLE_ITEMS
Number of MBIST Table items.
Definition: IfxMtu_cfg.h:70
IfxMtu_MbistSel_cpu1Ptag
Definition: IfxMtu_cfg.h:110
IfxMtu_SramItem::eccInvPos1
uint8 eccInvPos1
Second ECC bit which needs to be inverted.
Definition: IfxMtu_cfg.h:164
IfxMtu_MbistSel_cpu0Ptag
Definition: IfxMtu_cfg.h:105
IfxMtu_MbistSel_miniMcds
Definition: IfxMtu_cfg.h:127
IfxMtu_MbistSel_gtmFifo
Definition: IfxMtu_cfg.h:128
IfxMtu_MbistSel_cpu2Pspr
Definition: IfxMtu_cfg.h:114
IfxMtu_MbistSel_cpu1Pspr
Definition: IfxMtu_cfg.h:109
IfxMtu_MbistSel_ethermacTx
Definition: IfxMtu_cfg.h:149
IfxMtu_MbistSel_cpu3Dtag
Definition: IfxMtu_cfg.h:118
IfxMtu_MbistSel_cpu2Dlmu
Definition: IfxMtu_cfg.h:116
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxMtu_SramItem::dataSize
uint16 dataSize
Data Size of each memory block.
Definition: IfxMtu_cfg.h:161
IfxMtu_SramItem::numBlocks
uint8 numBlocks
number of SRAM blocks
Definition: IfxMtu_cfg.h:160
IfxMtu_MbistSel_eray1Obf
Definition: IfxMtu_cfg.h:141
IfxMtu_MbistSel_cpu1Dtag
Definition: IfxMtu_cfg.h:108
IfxMtu_MbistSel_gtmDpll2
Definition: IfxMtu_cfg.h:135
IfxMtu_MbistSel_cpu3Dlmu
Definition: IfxMtu_cfg.h:121
IfxMtu_MbistSel_psi5
Definition: IfxMtu_cfg.h:139
IfxMtu_MbistSel_cpu3Ptag
Definition: IfxMtu_cfg.h:120
IfxMtu_MbistSel_cpu0Dspr1
Definition: IfxMtu_cfg.h:123
IfxMtu_MbistSel_gtmMcs1Fast
Definition: IfxMtu_cfg.h:132
IfxMtu_MbistSel_gtmDpll1b
Definition: IfxMtu_cfg.h:134
IfxMtu_MbistSel_cpu1Dspr1
Definition: IfxMtu_cfg.h:124
IfxMtu_MbistSel_lmu0
Definition: IfxMtu_cfg.h:122
IfxMtu_MbistSel_gtmMcs1Slow
Definition: IfxMtu_cfg.h:131
IfxMtu_MbistSel_mcan0
Definition: IfxMtu_cfg.h:136
IfxMtu_MbistSel_eray0Obf
Definition: IfxMtu_cfg.h:140
IfxMtu_MbistSel_cpu3Dspr
Definition: IfxMtu_cfg.h:117
IfxMtu_MbistSel_gtmDpll1a
Definition: IfxMtu_cfg.h:133
IfxCpu.h
CPU basic functionality.
IfxMtu_MbistSel_cpu1Dspr
Definition: IfxMtu_cfg.h:107
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxMtu_MbistSel_scrIram
Definition: IfxMtu_cfg.h:147
IfxMtu_MbistSel_scrXram
Definition: IfxMtu_cfg.h:146
IfxMtu_MbistSel_mcan2
Definition: IfxMtu_cfg.h:138
IfxMtu_MbistSel_cpu3Pspr
Definition: IfxMtu_cfg.h:119
IfxMtu_MbistSel_cpu0Dlmu
Definition: IfxMtu_cfg.h:106
IfxMtu_MbistSel_cpu0Dspr
Definition: IfxMtu_cfg.h:102
IfxMtu_MbistSel_gtmMcs0Slow
Definition: IfxMtu_cfg.h:129
IfxMtu_MbistSel_eray0IbfTbf
Definition: IfxMtu_cfg.h:142
IfxMtu_MbistSel_cpu2Dtag
Definition: IfxMtu_cfg.h:113
IfxMtu_MbistSel_dam0
Definition: IfxMtu_cfg.h:125
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxMtu_SramItem::eccSize
uint8 eccSize
ECC Size of each memory block.
Definition: IfxMtu_cfg.h:162
IfxMtu_SramItem
Describes physical parameters of a SRAM memory.
Definition: IfxMtu_cfg.h:158
IfxMtu_MbistSel_dma
Definition: IfxMtu_cfg.h:126


iLLD_TC38A: IfxPms_PinMap.c Source File

  • _PinMap
IfxPms_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxPms_PinMap.c
3 * \brief PMS I/O map
4 * \ingroup IfxLld_Pms
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "IfxPms_PinMap.h"
44
45 IfxPms_Dcdcsync_Out IfxPms_DCDCSYNC_P32_2_OUT = {&MODULE_PMS, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt6};
46 IfxPms_Dcdcsync_Out IfxPms_DCDCSYNC_P32_4_OUT = {&MODULE_PMS, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt2};
47 IfxPms_Hwcfg_In IfxPms_HWCFG1IN_P14_5_IN = {&MODULE_PMS, {&MODULE_P14, 5}};
48 IfxPms_Hwcfg_In IfxPms_HWCFG2IN_P14_2_IN = {&MODULE_PMS, {&MODULE_P14, 2}};
49 IfxPms_Hwcfg_In IfxPms_HWCFG3IN_P14_3_IN = {&MODULE_PMS, {&MODULE_P14, 3}};
50 IfxPms_Hwcfg_In IfxPms_HWCFG4IN_P10_5_IN = {&MODULE_PMS, {&MODULE_P10, 5}};
51 IfxPms_Hwcfg_In IfxPms_HWCFG5IN_P10_6_IN = {&MODULE_PMS, {&MODULE_P10, 6}};
52 IfxPms_Hwcfg_In IfxPms_HWCFG6IN_P14_4_IN = {&MODULE_PMS, {&MODULE_P14, 4}};
53 IfxPms_Wkp_In IfxPms_PINAWKP_P14_1_IN = {&MODULE_PMS, {&MODULE_P14, 1}, Ifx_RxSel_a};
54 IfxPms_Wkp_In IfxPms_PINBWKP_P33_12_IN = {&MODULE_PMS, {&MODULE_P33,12}, Ifx_RxSel_b};
55
56
57 const IfxPms_Dcdcsync_Out *IfxPms_Dcdcsync_Out_pinTable[IFXPMS_PINMAP_NUM_MODULES][IFXPMS_PINMAP_DCDCSYNC_OUT_NUM_ITEMS] = {
58 {
59 &IfxPms_DCDCSYNC_P32_2_OUT,
60 &IfxPms_DCDCSYNC_P32_4_OUT
61 }
62 };
63
64 const IfxPms_Hwcfg_In *IfxPms_Hwcfg_In_pinTable[IFXPMS_PINMAP_NUM_MODULES][IFXPMS_PINMAP_HWCFG_IN_NUM_ITEMS] = {
65 {
66 &IfxPms_HWCFG6IN_P14_4_IN,
67 &IfxPms_HWCFG3IN_P14_3_IN,
68 &IfxPms_HWCFG1IN_P14_5_IN,
69 &IfxPms_HWCFG2IN_P14_2_IN,
70 &IfxPms_HWCFG5IN_P10_6_IN,
71 &IfxPms_HWCFG4IN_P10_5_IN
72 }
73 };
74
75 const IfxPms_Wkp_In *IfxPms_Wkp_In_pinTable[IFXPMS_PINMAP_NUM_MODULES][IFXPMS_PINMAP_WKP_IN_NUM_ITEMS] = {
76 {
77 &IfxPms_PINAWKP_P14_1_IN,
78 &IfxPms_PINBWKP_P33_12_IN
79 }
80 };
IfxPms_HWCFG1IN_P14_5_IN
IfxPms_Hwcfg_In IfxPms_HWCFG1IN_P14_5_IN
Definition: IfxPms_PinMap.c:47
IFXPMS_PINMAP_NUM_MODULES
#define IFXPMS_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxPms_PinMap.h:91
IfxPort_OutputIdx_alt2
Definition: IfxPort.h:130
Ifx_RxSel_a
Definition: Ifx_Types.h:129
IfxPms_Dcdcsync_Out
DCDC Sync pin mapping structure.
Definition: IfxPms_PinMap.h:64
IfxPms_DCDCSYNC_P32_4_OUT
IfxPms_Dcdcsync_Out IfxPms_DCDCSYNC_P32_4_OUT
Definition: IfxPms_PinMap.c:46
Ifx_RxSel_b
Definition: Ifx_Types.h:130
IfxPms_Wkp_In_pinTable
const IfxPms_Wkp_In * IfxPms_Wkp_In_pinTable[IFXPMS_PINMAP_NUM_MODULES][IFXPMS_PINMAP_WKP_IN_NUM_ITEMS]
Definition: IfxPms_PinMap.c:75
IfxPort_OutputIdx_alt6
Definition: IfxPort.h:134
IFXPMS_PINMAP_DCDCSYNC_OUT_NUM_ITEMS
#define IFXPMS_PINMAP_DCDCSYNC_OUT_NUM_ITEMS
Definition: IfxPms_PinMap.h:92
IfxPms_HWCFG2IN_P14_2_IN
IfxPms_Hwcfg_In IfxPms_HWCFG2IN_P14_2_IN
Definition: IfxPms_PinMap.c:48
IfxPms_HWCFG5IN_P10_6_IN
IfxPms_Hwcfg_In IfxPms_HWCFG5IN_P10_6_IN
Definition: IfxPms_PinMap.c:51
IfxPms_Hwcfg_In_pinTable
const IfxPms_Hwcfg_In * IfxPms_Hwcfg_In_pinTable[IFXPMS_PINMAP_NUM_MODULES][IFXPMS_PINMAP_HWCFG_IN_NUM_ITEMS]
Definition: IfxPms_PinMap.c:64
IfxPms_PINAWKP_P14_1_IN
IfxPms_Wkp_In IfxPms_PINAWKP_P14_1_IN
Definition: IfxPms_PinMap.c:53
IFXPMS_PINMAP_WKP_IN_NUM_ITEMS
#define IFXPMS_PINMAP_WKP_IN_NUM_ITEMS
Definition: IfxPms_PinMap.h:94
IfxPms_DCDCSYNC_P32_2_OUT
IfxPms_Dcdcsync_Out IfxPms_DCDCSYNC_P32_2_OUT
Definition: IfxPms_PinMap.c:45
IfxPms_Dcdcsync_Out_pinTable
const IfxPms_Dcdcsync_Out * IfxPms_Dcdcsync_Out_pinTable[IFXPMS_PINMAP_NUM_MODULES][IFXPMS_PINMAP_DCDCSYNC_OUT_NUM_ITEMS]
Definition: IfxPms_PinMap.c:57
IfxPms_Hwcfg_In
Hardware Configuration pin mapping structure.
Definition: IfxPms_PinMap.h:72
IfxPms_PINBWKP_P33_12_IN
IfxPms_Wkp_In IfxPms_PINBWKP_P33_12_IN
Definition: IfxPms_PinMap.c:54
IfxPms_Wkp_In
Wakeup pin mapping structure.
Definition: IfxPms_PinMap.h:56
IfxPms_HWCFG4IN_P10_5_IN
IfxPms_Hwcfg_In IfxPms_HWCFG4IN_P10_5_IN
Definition: IfxPms_PinMap.c:50
IfxPms_PinMap.h
PMS I/O map.
IFXPMS_PINMAP_HWCFG_IN_NUM_ITEMS
#define IFXPMS_PINMAP_HWCFG_IN_NUM_ITEMS
Definition: IfxPms_PinMap.h:93
IfxPms_HWCFG6IN_P14_4_IN
IfxPms_Hwcfg_In IfxPms_HWCFG6IN_P14_4_IN
Definition: IfxPms_PinMap.c:52
IfxPms_HWCFG3IN_P14_3_IN
IfxPms_Hwcfg_In IfxPms_HWCFG3IN_P14_3_IN
Definition: IfxPms_PinMap.c:49


iLLD_TC38A: IfxPms_PinMap.h Source File

  • _PinMap
IfxPms_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxPms_PinMap.h
3 * \brief PMS I/O map
4 * \ingroup IfxLld_Pms
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Pms_pinmap PMS Pin Mapping
42 * \ingroup IfxLld_Pms
43 */
44
45 #ifndef IFXPMS_PINMAP_H
46 #define IFXPMS_PINMAP_H
47
48 #include <IfxPms_reg.h>
49 #include <_Impl/IfxPms_cfg.h>
50 #include <Port/Std/IfxPort.h>
51
52 /** \addtogroup IfxLld_Pms_pinmap
53 * \{ */
54
55 /** \brief Wakeup pin mapping structure */
56 typedef const struct
57 {
58 Ifx_PMS* module; /**< \brief Base address */
59 IfxPort_Pin pin; /**< \brief Port pin */
60 Ifx_RxSel select; /**< \brief Input multiplexer value */
61 } IfxPms_Wkp_In;
62
63 /** \brief DCDC Sync pin mapping structure */
64 typedef const struct
65 {
66 Ifx_PMS* module; /**< \brief Base address */
67 IfxPort_Pin pin; /**< \brief Port pin */
68 IfxPort_OutputIdx select; /**< \brief Port control code */
69 } IfxPms_Dcdcsync_Out;
70
71 /** \brief Hardware Configuration pin mapping structure */
72 typedef const struct
73 {
74 Ifx_PMS* module; /**< \brief Base address */
75 IfxPort_Pin pin; /**< \brief Port pin */
76 } IfxPms_Hwcfg_In;
77
78
79 IFX_EXTERN IfxPms_Dcdcsync_Out IfxPms_DCDCSYNC_P32_2_OUT; /**< \brief DC-DC synchronization output */
80 IFX_EXTERN IfxPms_Dcdcsync_Out IfxPms_DCDCSYNC_P32_4_OUT; /**< \brief DC-DC synchronization output */
81 IFX_EXTERN IfxPms_Hwcfg_In IfxPms_HWCFG1IN_P14_5_IN; /**< \brief HWCFG1 pin input */
82 IFX_EXTERN IfxPms_Hwcfg_In IfxPms_HWCFG2IN_P14_2_IN; /**< \brief HWCFG2 pin input */
83 IFX_EXTERN IfxPms_Hwcfg_In IfxPms_HWCFG3IN_P14_3_IN; /**< \brief HWCFG3 pin input */
84 IFX_EXTERN IfxPms_Hwcfg_In IfxPms_HWCFG4IN_P10_5_IN; /**< \brief HWCFG4 pin input */
85 IFX_EXTERN IfxPms_Hwcfg_In IfxPms_HWCFG5IN_P10_6_IN; /**< \brief HWCFG5 pin input */
86 IFX_EXTERN IfxPms_Hwcfg_In IfxPms_HWCFG6IN_P14_4_IN; /**< \brief HWCFG6 pin input */
87 IFX_EXTERN IfxPms_Wkp_In IfxPms_PINAWKP_P14_1_IN; /**< \brief PINA ( P14.1) pin input */
88 IFX_EXTERN IfxPms_Wkp_In IfxPms_PINBWKP_P33_12_IN; /**< \brief PINB (P33.12) pin input */
89
90 /** \brief Table dimensions */
91 #define IFXPMS_PINMAP_NUM_MODULES 1
92 #define IFXPMS_PINMAP_DCDCSYNC_OUT_NUM_ITEMS 2
93 #define IFXPMS_PINMAP_HWCFG_IN_NUM_ITEMS 6
94 #define IFXPMS_PINMAP_WKP_IN_NUM_ITEMS 2
95
96
97 /** \brief IfxPms_Dcdcsync_Out table */
98 IFX_EXTERN const IfxPms_Dcdcsync_Out *IfxPms_Dcdcsync_Out_pinTable[IFXPMS_PINMAP_NUM_MODULES][IFXPMS_PINMAP_DCDCSYNC_OUT_NUM_ITEMS];
99
100 /** \brief IfxPms_Hwcfg_In table */
101 IFX_EXTERN const IfxPms_Hwcfg_In *IfxPms_Hwcfg_In_pinTable[IFXPMS_PINMAP_NUM_MODULES][IFXPMS_PINMAP_HWCFG_IN_NUM_ITEMS];
102
103 /** \brief IfxPms_Wkp_In table */
104 IFX_EXTERN const IfxPms_Wkp_In *IfxPms_Wkp_In_pinTable[IFXPMS_PINMAP_NUM_MODULES][IFXPMS_PINMAP_WKP_IN_NUM_ITEMS];
105
106 /** \} */
107
108 #endif /* IFXPMS_PINMAP_H */
IfxPms_Wkp_In_pinTable
IFX_EXTERN const IfxPms_Wkp_In * IfxPms_Wkp_In_pinTable[IFXPMS_PINMAP_NUM_MODULES][IFXPMS_PINMAP_WKP_IN_NUM_ITEMS]
IfxPms_Wkp_In table.
Definition: IfxPms_PinMap.h:104
IfxPms_Wkp_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxPms_PinMap.h:60
IfxPms_DCDCSYNC_P32_2_OUT
IFX_EXTERN IfxPms_Dcdcsync_Out IfxPms_DCDCSYNC_P32_2_OUT
DC-DC synchronization output.
Definition: IfxPms_PinMap.h:79
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:126
IfxPms_cfg.h
PMS on-chip implementation data.
IfxPms_Wkp_In::module
Ifx_PMS * module
Base address.
Definition: IfxPms_PinMap.h:58
IfxPms_HWCFG6IN_P14_4_IN
IFX_EXTERN IfxPms_Hwcfg_In IfxPms_HWCFG6IN_P14_4_IN
HWCFG6 pin input.
Definition: IfxPms_PinMap.h:86
IFXPMS_PINMAP_NUM_MODULES
#define IFXPMS_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxPms_PinMap.h:91
IfxPms_Dcdcsync_Out
DCDC Sync pin mapping structure.
Definition: IfxPms_PinMap.h:64
IfxPms_HWCFG2IN_P14_2_IN
IFX_EXTERN IfxPms_Hwcfg_In IfxPms_HWCFG2IN_P14_2_IN
HWCFG2 pin input.
Definition: IfxPms_PinMap.h:82
IFXPMS_PINMAP_DCDCSYNC_OUT_NUM_ITEMS
#define IFXPMS_PINMAP_DCDCSYNC_OUT_NUM_ITEMS
Definition: IfxPms_PinMap.h:92
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxPms_PINBWKP_P33_12_IN
IFX_EXTERN IfxPms_Wkp_In IfxPms_PINBWKP_P33_12_IN
PINB (P33.12) pin input.
Definition: IfxPms_PinMap.h:88
IfxPms_PINAWKP_P14_1_IN
IFX_EXTERN IfxPms_Wkp_In IfxPms_PINAWKP_P14_1_IN
PINA ( P14.1) pin input.
Definition: IfxPms_PinMap.h:87
IfxPms_HWCFG5IN_P10_6_IN
IFX_EXTERN IfxPms_Hwcfg_In IfxPms_HWCFG5IN_P10_6_IN
HWCFG5 pin input.
Definition: IfxPms_PinMap.h:85
IfxPms_Dcdcsync_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxPms_PinMap.h:68
IfxPms_Dcdcsync_Out_pinTable
IFX_EXTERN const IfxPms_Dcdcsync_Out * IfxPms_Dcdcsync_Out_pinTable[IFXPMS_PINMAP_NUM_MODULES][IFXPMS_PINMAP_DCDCSYNC_OUT_NUM_ITEMS]
IfxPms_Dcdcsync_Out table.
Definition: IfxPms_PinMap.h:98
IfxPms_DCDCSYNC_P32_4_OUT
IFX_EXTERN IfxPms_Dcdcsync_Out IfxPms_DCDCSYNC_P32_4_OUT
DC-DC synchronization output.
Definition: IfxPms_PinMap.h:80
IFXPMS_PINMAP_WKP_IN_NUM_ITEMS
#define IFXPMS_PINMAP_WKP_IN_NUM_ITEMS
Definition: IfxPms_PinMap.h:94
IfxPms_Wkp_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxPms_PinMap.h:59
IfxPms_HWCFG1IN_P14_5_IN
IFX_EXTERN IfxPms_Hwcfg_In IfxPms_HWCFG1IN_P14_5_IN
HWCFG1 pin input.
Definition: IfxPms_PinMap.h:81
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:246
Ifx_RxSel
Ifx_RxSel
input multiplexer definition used in PinMaps
Definition: Ifx_Types.h:127
IfxPms_HWCFG3IN_P14_3_IN
IFX_EXTERN IfxPms_Hwcfg_In IfxPms_HWCFG3IN_P14_3_IN
HWCFG3 pin input.
Definition: IfxPms_PinMap.h:83
IfxPms_Hwcfg_In
Hardware Configuration pin mapping structure.
Definition: IfxPms_PinMap.h:72
IfxPms_Wkp_In
Wakeup pin mapping structure.
Definition: IfxPms_PinMap.h:56
IfxPms_Hwcfg_In_pinTable
IFX_EXTERN const IfxPms_Hwcfg_In * IfxPms_Hwcfg_In_pinTable[IFXPMS_PINMAP_NUM_MODULES][IFXPMS_PINMAP_HWCFG_IN_NUM_ITEMS]
IfxPms_Hwcfg_In table.
Definition: IfxPms_PinMap.h:101
IFXPMS_PINMAP_HWCFG_IN_NUM_ITEMS
#define IFXPMS_PINMAP_HWCFG_IN_NUM_ITEMS
Definition: IfxPms_PinMap.h:93
IfxPms_HWCFG4IN_P10_5_IN
IFX_EXTERN IfxPms_Hwcfg_In IfxPms_HWCFG4IN_P10_5_IN
HWCFG4 pin input.
Definition: IfxPms_PinMap.h:84
IfxPort.h
PORT basic functionality.


iLLD_TC38A: IfxPms_cfg.h Source File

  • _Impl
IfxPms_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxPms_cfg.h
3 * \brief PMS on-chip implementation data
4 * \ingroup IfxLld_Pms
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Pms PMS
42 * \ingroup IfxLld
43 * \defgroup IfxLld_Pms_Impl Implementation
44 * \ingroup IfxLld_Pms
45 * \defgroup IfxLld_Pms_Std Pm and Evr Drivers
46 * \ingroup IfxLld_Pms
47 */
48
49 #ifndef IFXPMS_CFG_H
50 #define IFXPMS_CFG_H 1
51
52 /******************************************************************************/
53 /*----------------------------------Includes----------------------------------*/
54 /******************************************************************************/
55
56 #include "Ifx_Cfg.h"
57
58 /******************************************************************************/
59 /*-----------------------------------Macros-----------------------------------*/
60 /******************************************************************************/
61
62 #define IFXPMS_STANDBY_CPU0_DLMU_RAR_AREA (0x90000000U)
63
64 #define IFXPMS_STANDBY_DLMU_RAR_SIZE (16U /* in words (32 bit) */)
65
66 #define IFXPMS_STANDBY_CPU1_DLMU_RAR_AREA (0x90010000U)
67
68 #define IFXPMS_NUM_MODULES (1)
69
70 /** \brief This macro is intended to be defined in Ifx_Cfg.h and is meant to cut off the clock supply to desired modules by writing to their respective CLC.B.DISR or CLC.B.EDIS
71 * It is used in IfxPmsPm_startSleepSequenceinFlash().
72 * This macro is empty by default.For example:
73 *
74 *
75 * Example usage:
76 * #define IFXPMS_DISABLE_MODULES_DURING_SLEEP \
77 * { \
78 * uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();\
79 * IfxScuWdt_clearCpuEndinit(passwd); \
80 * MODULE_ASCLIN.CLC.B.DISR = 1; \
81 * MODULE_EVADC.CLC.B.DISR = 1; \
82 * MODULE_EDSADC.CLC.B.DISR = 1; \
83 * IfxScuWdt_setCpuEndinit(passwd); \
84 * }
85 */
86 #ifndef IFXPMS_DISABLE_MODULES_DURING_SLEEP
87 #define IFXPMS_DISABLE_MODULES_DURING_SLEEP
88 #endif
89
90 /** \brief This macro is intended to be defined in Ifx_Cfg.h and is meant to cut off the clock supply to desired modules by writing to their respective CLC.B.DISR or CLC.B.EDIS.
91 * It is used in IfxPmsPm_startStandbySequenceInFlash().
92 *
93 * This macro is empty by default.For example:
94 *
95 *
96 * Example usage:
97 * #define IFXPMS_DISABLE_ALL_MODULES_STANDBY \
98 * { \
99 * uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();\
100 * IfxScuWdt_clearCpuEndinit(passwd); \
101 * MODULE_ASCLIN.CLC.B.DISR = 1; \
102 * MODULE_EVADC.CLC.B.DISR = 1; \
103 * MODULE_EDSADC.CLC.B.DISR = 1; \
104 * IfxScuWdt_setCpuEndinit(passwd); \
105 * }
106 */
107 #ifndef IFXPMS_DISABLE_ALL_MODULES_STANDBY
108 #define IFXPMS_DISABLE_ALL_MODULES_STANDBY
109 #endif
110
111 /** \brief This macro is intended to be defined in Ifx_Cfg.h and is meant to restore the clock supply to desired modules by writing to their respective CLC.B.DISR.
112 * This is used in IfxPmsPm_initiateWakeup()
113 * This macro is empty by default.For example:
114 *
115 *
116 * Example usage:
117 * #define IFXPMS_WAKEUP_MODULES \
118 * { \
119 * uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();\
120 * IfxScuWdt_clearCpuEndinit(passwd); \
121 * MODULE_ASCLIN.CLC.B.DISR = 0; \
122 * MODULE_EVADC.CLC.B.DISR = 0; \
123 * MODULE_EDSADC.CLC.B.DISR = 0; \
124 * IfxScuWdt_setCpuEndinit(passwd); \
125 * }
126 */
127 #ifndef IFXPMS_WAKEUP_MODULES
128 #define IFXPMS_WAKEUP_MODULES
129 #endif
130
131 /** \brief This macro is intended to be defined in Ifx_Cfg.h and is meant to contain any activity the application might need to do after wakeup.
132 * This can be done here in this macro or after the control returns from IfxPmsPm_initiateWakeup()
133 * This macro is empty by default.
134 */
135 #ifndef IFXPMS_RESTART_EXECUTION
136 #define IFXPMS_RESTART_EXECUTION
137 #endif
138
139 /** \brief Number of cycles to wait after switching to backup clock is triggered before shutting down the oscillator.
140 * This is given as a configurable macro because the value required has been seen to vary and so the application may define it in Ifx_Cfg.h.
141 */
142 #ifndef IFXPMS_WAIT_CYCLES
143 #define IFXPMS_WAIT_CYCLES 100
144 #endif
145
146 #endif /* IFXPMS_CFG_H */


iLLD_TC38A: IfxPmsEvr.c Source File

  • Pms
  • Std
IfxPmsEvr.c
Go to the documentation of this file.
1 /**
2 * \file IfxPmsEvr.c
3 * \brief PMS basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxPmsEvr.h"
47
48 /******************************************************************************/
49 /*-----------------------Exported Variables/Constants-------------------------*/
50 /******************************************************************************/
51
52 IFX_CONST IfxPmsEvr_StepDownRegulatorRegConfig IfxPmsEvr_cfgPhase1Default[] = {
53 {&PMS_EVRSDCOEFF6.U, (0x00873802U), (0xFFFFFFFFU)},
54 {&PMS_EVRSDCOEFF7.U, (0x0000D066U), (0xFFFFFFFFU)},
55 {&PMS_EVRSDCOEFF8.U, (0x00073802U), (0xFFFFFFFFU)},
56 {&PMS_EVRSDCOEFF9.U, (0x00009826U), (0xFFFFFFFFU)},
57 {&PMS_EVRSDCTRL7.U, (0x000000C9U), (0xFFFFFFFFU)},
58 {&PMS_EVRSDCTRL0.U, (0x30360001U), (0xFFFFFFFFU)},
59 {&PMS_EVRSDCTRL1.U, (0x0B690708U), (0xFFFFFFFFU)},
60 {&PMS_EVRSDCTRL8.U, (0x0121048EU), (0xFFFFFFFFU)},
61 };
62
63 IFX_CONST IfxPmsEvr_StepDownRegulatorRegConfig IfxPmsEvr_cfgPhase2Default[] = {
64 {&PMS_EVRSDCOEFF0.U, (0x350873B6U), (0xFFFFFFFFU)},
65 {&PMS_EVRSDCOEFF1.U, (0x02946C46U), (0xFFFFFFFFU)},
66 }
67
68
69 ;
70
71 IFX_CONST IfxPmsEvr_StepDownRegulatorRegConfig IfxPmsEvr_cfgPhase3Default[] = {
72 {&PMS_EVRSDCTRL0.U, (0x30360002U), (0xFFFFFFFFU)},
73 {&PMS_EVRSDCTRL2.U, (0x0036033BU), (0xFFFFFFFFU)},
74 {&PMS_EVRSDCTRL3.U, (0x0B690810U), (0xFFFFFFFFU)},
75 {&PMS_EVRSDCOEFF2.U, (0x3408710EU), (0xFFFFFFFFU)},
76 {&PMS_EVRSDCOEFF3.U, (0x02946C44U), (0xFFFFFFFFU)},
77 {&PMS_EVRSDCTRL4.U, (0x00360009U), (0xFFFFFFFFU)},
78 {&PMS_EVRSDCTRL5.U, (0x0B690808U), (0xFFFFFFFFU)},
79 {&PMS_EVRSDCTRL6.U, (0x00231C94U), (0xFFFFFFFFU)},
80 {&PMS_EVRSDCOEFF4.U, (0x1B0822B6U), (0xFFFFFFFFU)},
81 {&PMS_EVRSDCOEFF5.U, (0x02946C46U), (0xFFFFFFFFU)},
82 {&PMS_EVRSDCTRL9.U, (0x00000434U), (0xFFFFFFFFU)},
83 {&PMS_EVRSDCTRL10.U, (0x00005A82U), (0xFFFFFFFFU)},
84 {&PMS_EVRSDCTRL11.U, (0x12070909U), (0xFFFFFFFFU)},
85 };
86
87 IFX_CONST IfxPmsEvr_initSequencePhase IfxPmsEvr_cfgPhasesDefault[] = {
88 {
89 sizeof(IfxPmsEvr_cfgPhase1Default) / sizeof(IfxPmsEvr_StepDownRegulatorRegConfig),
90 IfxPmsEvr_cfgPhase1Default,
91 (0.00002F)
92 },
93 {
94 sizeof(IfxPmsEvr_cfgPhase2Default) / sizeof(IfxPmsEvr_StepDownRegulatorRegConfig),
95 IfxPmsEvr_cfgPhase2Default,
96 (0.00002F)
97 },
98 {
99 sizeof(IfxPmsEvr_cfgPhase3Default) / sizeof(IfxPmsEvr_StepDownRegulatorRegConfig),
100 IfxPmsEvr_cfgPhase3Default,
101 (0.00002F)
102 }
103 };
104
105 IFX_CONST IfxPmsEvr_initSequence IfxPmsEvr_cfgSequenceDefault = {
106 sizeof(IfxPmsEvr_cfgPhasesDefault) / sizeof(IfxPmsEvr_initSequencePhase),
107 IfxPmsEvr_cfgPhasesDefault
108 };
109
110
111 IFX_CONST IfxPmsEvr_StepDownRegulatorRegConfig IfxPmsEvr_checkRegValuesDefault[] = {
112 {&PMS_EVRSDCOEFF6.U, (0x00873802U), (0xFFFFFFFFU)},
113 {&PMS_EVRSDCOEFF7.U, (0x0000D066U), (0xFFFFFFFFU)},
114 {&PMS_EVRSDCOEFF8.U, (0x00073802U), (0xFFFFFFFFU)},
115 {&PMS_EVRSDCOEFF9.U, (0x00009826U), (0xFFFFFFFFU)},
116 {&PMS_EVRSDCTRL7.U, (0x000000C9U), (0xFFFFFFFFU)},
117 {&PMS_EVRSDCTRL1.U, (0x0B690708U), (0xFFFFFFFFU)},
118 {&PMS_EVRSDCTRL8.U, (0x0121048EU), (0xFFFFFFFFU)},
119 {&PMS_EVRSDCOEFF0.U, (0x350873B6U), (0xFFFFFFFFU)},
120 {&PMS_EVRSDCOEFF1.U, (0x02946C46U), (0xFFFFFFFFU)},
121 {&PMS_EVRSDCTRL0.U, (0x30360002U), (0xFFFFFFFFU)},
122 {&PMS_EVRSDCTRL2.U, (0x0036033BU), (0xFFFFFFFFU)},
123 {&PMS_EVRSDCTRL3.U, (0x0B690810U), (0xFFFFFFFFU)},
124 {&PMS_EVRSDCOEFF2.U, (0x3408710EU), (0xFFFFFFFFU)},
125 {&PMS_EVRSDCOEFF3.U, (0x02946C44U), (0xFFFFFFFFU)},
126 {&PMS_EVRSDCTRL4.U, (0x00360009U), (0xFFFFFFFFU)},
127 {&PMS_EVRSDCTRL5.U, (0x0B690808U), (0xFFFFFFFFU)},
128 {&PMS_EVRSDCTRL6.U, (0x00231C94U), (0xFFFFFFFFU)},
129 {&PMS_EVRSDCOEFF4.U, (0x1B0822B6U), (0xFFFFFFFFU)},
130 {&PMS_EVRSDCOEFF5.U, (0x02946C46U), (0xFFFFFFFFU)},
131 {&PMS_EVRSDCTRL9.U, (0x00000434U), (0xFFFFFFFFU)},
132 {&PMS_EVRSDCTRL10.U, (0x00005A82U), (0xFFFFFFFFU)},
133 {&PMS_EVRSDCTRL11.U, (0x12070909U), (0xFFFFFFFFU)},
134 };
135
136 IFX_CONST IfxPmsEvr_checkRegConfig IfxPmsEvr_checkRegCfgDefault = {
137 sizeof(IfxPmsEvr_checkRegValuesDefault) / sizeof(IfxPmsEvr_StepDownRegulatorRegConfig),
138 IfxPmsEvr_checkRegValuesDefault
139 };
140
141 /******************************************************************************/
142 /*-------------------------Function Implementations---------------------------*/
143 /******************************************************************************/
144
145 void IfxPmsEvr_filterSecondaryConversionResult(Ifx_PMS *pms, IfxPmsEvr_SupplyFilter adcFilterValue, IfxPmsEvr_SupplyMode supply)
146 {
147 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
148
149 Ifx_PMS_MONFILT tempMONFILT;
150 IfxScuWdt_clearSafetyEndinit(passwd);
151 tempMONFILT.U = pms->MONFILT.U;
152
153 switch (supply)
154 {
155 case IfxPmsEvr_SupplyMode_evrc:
156 tempMONFILT.B.EVRCFIL = adcFilterValue;
157 break;
158 case IfxPmsEvr_SupplyMode_evr33:
159 tempMONFILT.B.EVR33FIL = adcFilterValue;
160 break;
161 case IfxPmsEvr_SupplyMode_swd:
162 tempMONFILT.B.SWDFIL = adcFilterValue;
163 break;
164 case IfxPmsEvr_SupplyMode_evrpr:
165 tempMONFILT.B.PREFIL = adcFilterValue;
166 break;
167 case IfxPmsEvr_SupplyMode_vddm:
168 tempMONFILT.B.VDDMFIL = adcFilterValue;
169 break;
170 case IfxPmsEvr_SupplyMode_sb:
171 tempMONFILT.B.SBFIL = adcFilterValue;
172 break;
173 }
174
175 pms->MONFILT.U = tempMONFILT.U;
176
177 IfxScuWdt_setSafetyEndinit(passwd);
178 }
179
180
181 uint8 IfxPmsEvr_getSecondaryAdcResult(Ifx_PMS *pms, IfxPmsEvr_SupplyMode supply)
182 {
183 uint8 adcResult = 0;
184
185 switch (supply)
186 {
187 case IfxPmsEvr_SupplyMode_evrc: adcResult = pms->MONSTAT1.B.ADCCV;
188 break;
189 case IfxPmsEvr_SupplyMode_evr33: adcResult = pms->MONSTAT1.B.ADC33V;
190 break;
191 case IfxPmsEvr_SupplyMode_swd: adcResult = pms->MONSTAT1.B.ADCSWDV;
192 break;
193 case IfxPmsEvr_SupplyMode_evrpr: adcResult = pms->MONSTAT2.B.ADCPRE;
194 break;
195 case IfxPmsEvr_SupplyMode_sb: adcResult = pms->MONSTAT2.B.ADCSB;
196 break;
197 case IfxPmsEvr_SupplyMode_vddm: adcResult = pms->MONSTAT2.B.ADCVDDM;
198 break;
199 }
200
201 return adcResult;
202 }
203
204
205 void IfxPmsEvr_setSecondaryOverVoltageThresholdMv(Ifx_PMS *pms, float32 thresholdLevel, IfxPmsEvr_SupplyMode supply)
206 {
207 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
208 Ifx_PMS_OVMON tempOVMON;
209 Ifx_PMS_OVMON2 tempOVMON2;
210 IfxScuWdt_clearSafetyEndinit(passwd);
211
212 tempOVMON.U = pms->OVMON.U;
213 tempOVMON2.U = pms->OVMON2.U;
214
215 switch (supply)
216 {
217 case IfxPmsEvr_SupplyMode_evrc:
218 tempOVMON.B.EVRCOVVAL = (uint8)((thresholdLevel / 5.7692) + 1);
219 break;
220 case IfxPmsEvr_SupplyMode_evr33:
221 tempOVMON.B.EVR33OVVAL = (uint8)((thresholdLevel / 15) + 1);
222 break;
223 case IfxPmsEvr_SupplyMode_swd:
224 tempOVMON.B.SWDOVVAL = (uint8)((thresholdLevel / 23.077) + 1);
225 break;
226 case IfxPmsEvr_SupplyMode_evrpr:
227 tempOVMON2.B.PREOVVAL = (uint8)((thresholdLevel / 5.7692) + 1);
228 break;
229 case IfxPmsEvr_SupplyMode_vddm:
230 tempOVMON2.B.VDDMOVVAL = (uint8)((thresholdLevel / 23.077) + 1);
231 break;
232 case IfxPmsEvr_SupplyMode_sb:
233 tempOVMON2.B.SBOVVAL = (uint8)((thresholdLevel / 23.077) + 1);
234 break;
235 }
236
237 pms->OVMON.U = tempOVMON.U;
238 pms->OVMON2.U = tempOVMON2.U;
239
240 IfxScuWdt_setSafetyEndinit(passwd);
241 }
242
243
244 void IfxPmsEvr_setSecondaryUnderVoltageThresholdMv(Ifx_PMS *pms, float32 thresholdLevel, IfxPmsEvr_SupplyMode supply)
245 {
246 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
247
248 Ifx_PMS_UVMON tempUVMON;
249 Ifx_PMS_UVMON2 tempUVMON2;
250 IfxScuWdt_clearSafetyEndinit(passwd);
251 tempUVMON.U = pms->UVMON.U;
252 tempUVMON2.U = pms->UVMON2.U;
253
254 switch (supply)
255 {
256 case IfxPmsEvr_SupplyMode_evrc:
257 tempUVMON.B.EVRCUVVAL = (uint8)((thresholdLevel / 5.7692) + 1);
258 break;
259 case IfxPmsEvr_SupplyMode_evr33:
260 tempUVMON.B.EVR33UVVAL = (uint8)((thresholdLevel / 15) + 1);
261 break;
262 case IfxPmsEvr_SupplyMode_swd:
263 tempUVMON.B.SWDUVVAL = (uint8)((thresholdLevel / 23.077) + 1);
264 break;
265 case IfxPmsEvr_SupplyMode_evrpr:
266 tempUVMON2.B.PREUVVAL = (uint8)((thresholdLevel / 5.7692) + 1);
267 break;
268 case IfxPmsEvr_SupplyMode_vddm:
269 tempUVMON2.B.VDDMUVVAL = (uint8)((thresholdLevel / 23.077) + 1);
270 break;
271 case IfxPmsEvr_SupplyMode_sb:
272 tempUVMON2.B.SBUVVAL = (uint8)((thresholdLevel / 23.077) + 1);
273 break;
274 }
275
276 pms->UVMON.U = tempUVMON.U;
277 pms->UVMON2.U = tempUVMON2.U;
278
279 IfxScuWdt_setSafetyEndinit(passwd);
280 }
IfxPmsEvr_checkRegCfgDefault
IFX_CONST IfxPmsEvr_checkRegConfig IfxPmsEvr_checkRegCfgDefault
Definition: IfxPmsEvr.c:136
IfxPmsEvr_cfgPhase2Default
IFX_CONST IfxPmsEvr_StepDownRegulatorRegConfig IfxPmsEvr_cfgPhase2Default[]
Definition: IfxPmsEvr.c:63
IfxPmsEvr_SupplyMode_sb
EVR Standby Supply or VEVRSB supply.
Definition: IfxPmsEvr.h:331
IfxPmsEvr_SupplyFilter
IfxPmsEvr_SupplyFilter
ADC result for the generating Alarm declare in Ifx_PMS.EVR.MONFILT.
Definition: IfxPmsEvr.h:302
IfxPmsEvr_cfgPhase3Default
IFX_CONST IfxPmsEvr_StepDownRegulatorRegConfig IfxPmsEvr_cfgPhase3Default[]
Definition: IfxPmsEvr.c:71
IfxPmsEvr_SupplyMode_swd
select external VEXT suppy watchdog
Definition: IfxPmsEvr.h:328
IfxPmsEvr_SupplyMode
IfxPmsEvr_SupplyMode
Controls the voltage supply Type.
Definition: IfxPmsEvr.h:324
float32
float float32
Definition: Platform_Types.h:170
IfxPmsEvr_checkRegValuesDefault
IFX_CONST IfxPmsEvr_StepDownRegulatorRegConfig IfxPmsEvr_checkRegValuesDefault[]
Definition: IfxPmsEvr.c:111
IfxPmsEvr_initSequence
Definition: IfxPmsEvr.h:371
IfxPmsEvr_initSequencePhase
Definition: IfxPmsEvr.h:358
IfxPmsEvr_setSecondaryUnderVoltageThresholdMv
void IfxPmsEvr_setSecondaryUnderVoltageThresholdMv(Ifx_PMS *pms, float32 thresholdLevel, IfxPmsEvr_SupplyMode supply)
set Secondary under Voltage Threshold level
Definition: IfxPmsEvr.c:244
IfxPmsEvr_SupplyMode_evrpr
select EVRPR or VDDPD supply
Definition: IfxPmsEvr.h:329
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxScuWdt_clearSafetyEndinit
void IfxScuWdt_clearSafetyEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:305
IfxPmsEvr_StepDownRegulatorRegConfig
Definition: IfxPmsEvr.h:351
IfxPmsEvr_getSecondaryAdcResult
uint8 IfxPmsEvr_getSecondaryAdcResult(Ifx_PMS *pms, IfxPmsEvr_SupplyMode supply)
get secondray ADC result for respective Voltage supply
Definition: IfxPmsEvr.c:181
IfxPmsEvr_checkRegConfig
Definition: IfxPmsEvr.h:365
IfxPmsEvr_SupplyMode_evrc
select EVRC regulator or VDD Supply
Definition: IfxPmsEvr.h:326
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxScuWdt_setSafetyEndinit
void IfxScuWdt_setSafetyEndinit(uint16 password)
SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:668
IfxPmsEvr_cfgPhase1Default
IFX_CONST IfxPmsEvr_StepDownRegulatorRegConfig IfxPmsEvr_cfgPhase1Default[]
Definition: IfxPmsEvr.c:52
IfxScuWdt_getSafetyWatchdogPassword
uint16 IfxScuWdt_getSafetyWatchdogPassword(void)
SCUWDT API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.c:393
IfxPmsEvr_cfgSequenceDefault
IFX_CONST IfxPmsEvr_initSequence IfxPmsEvr_cfgSequenceDefault
Definition: IfxPmsEvr.c:105
IfxPmsEvr.h
PMS basic functionality.
IfxPmsEvr_filterSecondaryConversionResult
void IfxPmsEvr_filterSecondaryConversionResult(Ifx_PMS *pms, IfxPmsEvr_SupplyFilter adcFilterValue, IfxPmsEvr_SupplyMode supply)
filter the each conversion result or avarage of consecutive adc result to compare with threshold ...
Definition: IfxPmsEvr.c:145
IfxPmsEvr_setSecondaryOverVoltageThresholdMv
void IfxPmsEvr_setSecondaryOverVoltageThresholdMv(Ifx_PMS *pms, float32 thresholdLevel, IfxPmsEvr_SupplyMode supply)
set Secondary Over Voltage Threshold level
Definition: IfxPmsEvr.c:205
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxPmsEvr_cfgPhasesDefault
IFX_CONST IfxPmsEvr_initSequencePhase IfxPmsEvr_cfgPhasesDefault[]
Definition: IfxPmsEvr.c:87
IfxPmsEvr_SupplyMode_vddm
VDDM ADC Supply.
Definition: IfxPmsEvr.h:330
IfxPmsEvr_SupplyMode_evr33
select EVR33 regulator or VDDP3 Supply
Definition: IfxPmsEvr.h:327


iLLD_TC38A: IfxPmsEvr.h Source File

  • Pms
  • Std
IfxPmsEvr.h
Go to the documentation of this file.
1 /**
2 * \file IfxPmsEvr.h
3 * \brief PMS basic functionality
4 * \ingroup IfxLld_Pms
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Pms_Std_Evr EVR
42 * \ingroup IfxLld_Pms_Std
43 * \defgroup IfxLld_Pms_Std_Evr_Enum Enumerations
44 * \ingroup IfxLld_Pms_Std_Evr
45 * \defgroup IfxLld_Pms_Std_Evr_Over-Voltage Over Voltage Functions
46 * \ingroup IfxLld_Pms_Std_Evr
47 * \defgroup IfxLld_Pms_Std_Evr_Module Module Functions
48 * \ingroup IfxLld_Pms_Std_Evr
49 * \defgroup IfxLld_Pms_Std_Evr_Under-Voltage Under Voltage Functions
50 * \ingroup IfxLld_Pms_Std_Evr
51 * \defgroup IfxLld_Pms_Std_Evr_EVRC EVRC Functions
52 * \ingroup IfxLld_Pms_Std_Evr
53 * \defgroup IfxLld_Pms_Std_Evr_EVR33 EVR33 Functions
54 * \ingroup IfxLld_Pms_Std_Evr
55 * \defgroup IfxLld_Pms_Std_Evr_SWD SWD Functions
56 * \ingroup IfxLld_Pms_Std_Evr
57 */
58
59 #ifndef IFXPMSEVR_H
60 #define IFXPMSEVR_H 1
61
62 /******************************************************************************/
63 /*----------------------------------Includes----------------------------------*/
64 /******************************************************************************/
65
66 #include "_Impl/IfxPms_cfg.h"
67 #include "Cpu/Std/IfxCpu.h"
68 #include "Cpu/Std/IfxCpu_Intrinsics.h"
69 #include "IfxPms_bf.h"
70 #include "IfxPms_reg.h"
71 #include "IfxStm_reg.h"
72 #include "IfxScu_reg.h"
73
74 /******************************************************************************/
75 /*-----------------------------------Macros-----------------------------------*/
76 /******************************************************************************/
77
78 #define IFXPMSEVR_ADC_VDD_LSB (0.005f)
79
80 #define IFXPMSEVR_ADC_VDDP3_LSB (0.015f)
81
82 #define IFXPMSEVR_ADC_VEXT_LSB (0.02f)
83
84 #define IFXPMSEVR_CTRL_UP_WAIT_TIMEOUTCOUNT (0x100)
85
86 /******************************************************************************/
87 /*--------------------------------Enumerations--------------------------------*/
88 /******************************************************************************/
89
90 /** \addtogroup IfxLld_Pms_Std_Evr_Enum
91 * \{ */
92 /** \brief Configure respective interrupts define in register Ifx_PMS.PMSIEN
93 */
94 typedef enum
95 {
96 IfxPmsEvr_EnableInterrupt_ovswd = 0, /**< \brief OVSWD Interrupt enable */
97 IfxPmsEvr_EnableInterrupt_uvswd = 1, /**< \brief UVSWD Interrupt enable */
98 IfxPmsEvr_EnableInterrupt_ov33 = 2, /**< \brief OV33Interrupt enable */
99 IfxPmsEvr_EnableInterrupt_uv33 = 3, /**< \brief UV33 Interrupt enable */
100 IfxPmsEvr_EnableInterrupt_ovc = 4, /**< \brief OVC Interrupt enable */
101 IfxPmsEvr_EnableInterrupt_uvc = 5, /**< \brief UVC Interrupt enable */
102 IfxPmsEvr_EnableInterrupt_ovpre = 6, /**< \brief OVPRE Interrupt enable */
103 IfxPmsEvr_EnableInterrupt_uvpre = 7, /**< \brief UVPRE Interrupt enable */
104 IfxPmsEvr_EnableInterrupt_ovddm = 8, /**< \brief OVDDM Interrupt enable */
105 IfxPmsEvr_EnableInterrupt_uvddm = 9, /**< \brief UVDDM Interrupt enable */
106 IfxPmsEvr_EnableInterrupt_ovsb = 10, /**< \brief OVSB Interrupt enable */
107 IfxPmsEvr_EnableInterrupt_uvsb = 11, /**< \brief UVSB Interrupt enable */
108 IfxPmsEvr_EnableInterrupt_evrcmod = 16, /**< \brief EVRCMOD Interrupt enable */
109 IfxPmsEvr_EnableInterrupt_sdvok = 17, /**< \brief SDVOK Interrupt enable */
110 IfxPmsEvr_EnableInterrupt_synclck = 18, /**< \brief SD SYNCLCK Interrupt enable */
111 IfxPmsEvr_EnableInterrupt_swdlvl = 19, /**< \brief SWDLVL Interrupt enable */
112 IfxPmsEvr_EnableInterrupt_wutwkp = 21, /**< \brief WUT WKP Interrupt enable */
113 IfxPmsEvr_EnableInterrupt_esr0wkp = 22, /**< \brief ESR0 WKP Interrupt enable */
114 IfxPmsEvr_EnableInterrupt_esr1wkp = 23, /**< \brief ESR1 WKP Interrupt enable */
115 IfxPmsEvr_EnableInterrupt_pinawkp = 24, /**< \brief PINA WKP Interrupt enable */
116 IfxPmsEvr_EnableInterrupt_pinbwkp = 25, /**< \brief PINB WKP Interrupt enable */
117 IfxPmsEvr_EnableInterrupt_scrint = 26, /**< \brief SCR INT Interrupt enable */
118 IfxPmsEvr_EnableInterrupt_scrrst = 27, /**< \brief SCR RST Interrupt enable */
119 IfxPmsEvr_EnableInterrupt_screcc = 28, /**< \brief SCR ECC Interrupt enable */
120 IfxPmsEvr_EnableInterrupt_scrwdt = 29 /**< \brief SCR WDT Interrupt enable */
121 } IfxPmsEvr_EnableInterrupt;
122
123 /** \brief Current operation mode of EVRC Regulator defined in Ifx_PMS.EVR.STAT.B.EVRCMOD
124 */
125 typedef enum
126 {
127 IfxPmsEvr_EvrcMode_pwmMode = 0, /**< \brief The step-down converter is in
128 * normal operational closed loop state */
129 IfxPmsEvr_EvrcMode_lowPowerMode = 1, /**< \brief The step-down converter is in low
130 * power state */
131 IfxPmsEvr_EvrcMode_startupMode = 2, /**< \brief The step-down converter is in start-up
132 * phase */
133 IfxPmsEvr_EvrcMode_disableMode = 3 /**< \brief EVRC is Disable */
134 } IfxPmsEvr_EvrcMode;
135
136 /** \brief Switching frequency division factor for external synchronisation defined in Ifx_PMS.EVRSDCTRL7.B.SYNCDIVFAC
137 */
138 typedef enum
139 {
140 IfxPmsEvr_ExtSyncSwitchingFreqDivFactor_1 = 0, /**< \brief fDCDCSYNC = fDCDC. The actual duty cycle is routed. */
141 IfxPmsEvr_ExtSyncSwitchingFreqDivFactor_2 = 1, /**< \brief fDCDCSYNC = fDCDC/2. Duty cycle is constant at 50%. */
142 IfxPmsEvr_ExtSyncSwitchingFreqDivFactor_4 = 2, /**< \brief fDCDCSYNC = fDCDC/4. Duty cycle is constant at 50%. */
143 IfxPmsEvr_ExtSyncSwitchingFreqDivFactor_8 = 3, /**< \brief fDCDCSYNC = fDCDC/8. Duty cycle is constant at 50%. */
144 IfxPmsEvr_ExtSyncSwitchingFreqDivFactor_16 = 4, /**< \brief fDCDCSYNC = fDCDC/16. Duty cycle is constant at 50%. */
145 IfxPmsEvr_ExtSyncSwitchingFreqDivFactor_32 = 5 /**< \brief fDCDCSYNC = fDCDC/32. Duty cycle is constant at 50%. */
146 } IfxPmsEvr_ExtSyncSwitchingFreqDivFactor;
147
148 /** \brief Monitoring OverVoltage for all bitfields defined
149 * in .Ifx_PMS.EVR.MONCTRL register for overvoltage monitoring
150 */
151 typedef enum
152 {
153 IfxPmsEvr_OverVoltageMonitoring_inactive = 0, /**< \brief Over-Voltage Monitoring inactive */
154 IfxPmsEvr_OverVoltageMonitoring_lowToHighVoltageTransition = 1, /**< \brief Over-Voltage event is generated when threshold is crossed in lower to higher voltage transition */
155 IfxPmsEvr_OverVoltageMonitoring_highToLowVoltageTransition = 2, /**< \brief Over-Voltage event is generated when threshold is crossed in higher to lower voltage transition */
156 IfxPmsEvr_OverVoltageMonitoring_eitherDirectionVoltageTransition = 3 /**< \brief Over-Voltage event is generated when threshold is crossed in either direction */
157 } IfxPmsEvr_OverVoltageMonitoring;
158
159 /** \brief set TRIM Value For respective Voltages.
160 * Defined in Ifx_PMS.EVR.TRIM and Ifx_PMS.EVR.TRIM2
161 */
162 typedef enum
163 {
164 IfxPmsEvr_PrimaryAdcTrimValue_0 = 0, /**< \brief Primary Adc Trim Value 0 */
165 IfxPmsEvr_PrimaryAdcTrimValue_1, /**< \brief Primary Adc Trim Value 1 */
166 IfxPmsEvr_PrimaryAdcTrimValue_2, /**< \brief Primary Adc Trim Value 2 */
167 IfxPmsEvr_PrimaryAdcTrimValue_3, /**< \brief Primary Adc Trim Value 3 */
168 IfxPmsEvr_PrimaryAdcTrimValue_4, /**< \brief Primary Adc Trim Value 4 */
169 IfxPmsEvr_PrimaryAdcTrimValue_5, /**< \brief Primary Adc Trim Value 5 */
170 IfxPmsEvr_PrimaryAdcTrimValue_6, /**< \brief Primary Adc Trim Value 6 */
171 IfxPmsEvr_PrimaryAdcTrimValue_7, /**< \brief Primary Adc Trim Value 7 */
172 IfxPmsEvr_PrimaryAdcTrimValue_8, /**< \brief Primary Adc Trim Value 8 */
173 IfxPmsEvr_PrimaryAdcTrimValue_9, /**< \brief Primary Adc Trim Value 9 */
174 IfxPmsEvr_PrimaryAdcTrimValue_10, /**< \brief Primary Adc Trim Value 10 */
175 IfxPmsEvr_PrimaryAdcTrimValue_11, /**< \brief Primary Adc Trim Value 11 */
176 IfxPmsEvr_PrimaryAdcTrimValue_12, /**< \brief Primary Adc Trim Value 12 */
177 IfxPmsEvr_PrimaryAdcTrimValue_13, /**< \brief Primary Adc Trim Value 13 */
178 IfxPmsEvr_PrimaryAdcTrimValue_14, /**< \brief Primary Adc Trim Value 14 */
179 IfxPmsEvr_PrimaryAdcTrimValue_15, /**< \brief Primary Adc Trim Value 15 */
180 IfxPmsEvr_PrimaryAdcTrimValue_16, /**< \brief Primary Adc Trim Value 16 */
181 IfxPmsEvr_PrimaryAdcTrimValue_17, /**< \brief Primary Adc Trim Value 17 */
182 IfxPmsEvr_PrimaryAdcTrimValue_18, /**< \brief Primary Adc Trim Value 18 */
183 IfxPmsEvr_PrimaryAdcTrimValue_19, /**< \brief Primary Adc Trim Value 19 */
184 IfxPmsEvr_PrimaryAdcTrimValue_20, /**< \brief Primary Adc Trim Value 20 */
185 IfxPmsEvr_PrimaryAdcTrimValue_21, /**< \brief Primary Adc Trim Value 21 */
186 IfxPmsEvr_PrimaryAdcTrimValue_22, /**< \brief Primary Adc Trim Value 22 */
187 IfxPmsEvr_PrimaryAdcTrimValue_23, /**< \brief Primary Adc Trim Value 23 */
188 IfxPmsEvr_PrimaryAdcTrimValue_24, /**< \brief Primary Adc Trim Value 24 */
189 IfxPmsEvr_PrimaryAdcTrimValue_25, /**< \brief Primary Adc Trim Value 25 */
190 IfxPmsEvr_PrimaryAdcTrimValue_26, /**< \brief Primary Adc Trim Value 26 */
191 IfxPmsEvr_PrimaryAdcTrimValue_27, /**< \brief Primary Adc Trim Value 27 */
192 IfxPmsEvr_PrimaryAdcTrimValue_28, /**< \brief Primary Adc Trim Value 28 */
193 IfxPmsEvr_PrimaryAdcTrimValue_29, /**< \brief Primary Adc Trim Value 29 */
194 IfxPmsEvr_PrimaryAdcTrimValue_30, /**< \brief Primary Adc Trim Value 30 */
195 IfxPmsEvr_PrimaryAdcTrimValue_31, /**< \brief Primary Adc Trim Value 31 */
196 IfxPmsEvr_PrimaryAdcTrimValue_32, /**< \brief Primary Adc Trim Value 32 */
197 IfxPmsEvr_PrimaryAdcTrimValue_33, /**< \brief Primary Adc Trim Value 33 */
198 IfxPmsEvr_PrimaryAdcTrimValue_34, /**< \brief Primary Adc Trim Value 34 */
199 IfxPmsEvr_PrimaryAdcTrimValue_35, /**< \brief Primary Adc Trim Value 35 */
200 IfxPmsEvr_PrimaryAdcTrimValue_36, /**< \brief Primary Adc Trim Value 36 */
201 IfxPmsEvr_PrimaryAdcTrimValue_37, /**< \brief Primary Adc Trim Value 37 */
202 IfxPmsEvr_PrimaryAdcTrimValue_38, /**< \brief Primary Adc Trim Value 38 */
203 IfxPmsEvr_PrimaryAdcTrimValue_39, /**< \brief Primary Adc Trim Value 39 */
204 IfxPmsEvr_PrimaryAdcTrimValue_40, /**< \brief Primary Adc Trim Value 40 */
205 IfxPmsEvr_PrimaryAdcTrimValue_41, /**< \brief Primary Adc Trim Value 41 */
206 IfxPmsEvr_PrimaryAdcTrimValue_42, /**< \brief Primary Adc Trim Value 42 */
207 IfxPmsEvr_PrimaryAdcTrimValue_43, /**< \brief Primary Adc Trim Value 43 */
208 IfxPmsEvr_PrimaryAdcTrimValue_44, /**< \brief Primary Adc Trim Value 44 */
209 IfxPmsEvr_PrimaryAdcTrimValue_45, /**< \brief Primary Adc Trim Value 45 */
210 IfxPmsEvr_PrimaryAdcTrimValue_46, /**< \brief Primary Adc Trim Value 46 */
211 IfxPmsEvr_PrimaryAdcTrimValue_47, /**< \brief Primary Adc Trim Value 47 */
212 IfxPmsEvr_PrimaryAdcTrimValue_48, /**< \brief Primary Adc Trim Value 48 */
213 IfxPmsEvr_PrimaryAdcTrimValue_49, /**< \brief Primary Adc Trim Value 49 */
214 IfxPmsEvr_PrimaryAdcTrimValue_50, /**< \brief Primary Adc Trim Value 50 */
215 IfxPmsEvr_PrimaryAdcTrimValue_51, /**< \brief Primary Adc Trim Value 51 */
216 IfxPmsEvr_PrimaryAdcTrimValue_52, /**< \brief Primary Adc Trim Value 52 */
217 IfxPmsEvr_PrimaryAdcTrimValue_53, /**< \brief Primary Adc Trim Value 53 */
218 IfxPmsEvr_PrimaryAdcTrimValue_54, /**< \brief Primary Adc Trim Value 54 */
219 IfxPmsEvr_PrimaryAdcTrimValue_55, /**< \brief Primary Adc Trim Value 55 */
220 IfxPmsEvr_PrimaryAdcTrimValue_56, /**< \brief Primary Adc Trim Value 56 */
221 IfxPmsEvr_PrimaryAdcTrimValue_57, /**< \brief Primary Adc Trim Value 57 */
222 IfxPmsEvr_PrimaryAdcTrimValue_58, /**< \brief Primary Adc Trim Value 58 */
223 IfxPmsEvr_PrimaryAdcTrimValue_59, /**< \brief Primary Adc Trim Value 59 */
224 IfxPmsEvr_PrimaryAdcTrimValue_60, /**< \brief Primary Adc Trim Value 60 */
225 IfxPmsEvr_PrimaryAdcTrimValue_61, /**< \brief Primary Adc Trim Value 61 */
226 IfxPmsEvr_PrimaryAdcTrimValue_62, /**< \brief Primary Adc Trim Value 62 */
227 IfxPmsEvr_PrimaryAdcTrimValue_63 /**< \brief Primary Adc Trim Value 63 */
228 } IfxPmsEvr_PrimaryAdcTrimValue;
229
230 /** \brief This Declare the Under and overvoltage counter defined in Ifx_PMS.EVR.MONFILT.B.ERRCNTLIMT
231 */
232 typedef enum
233 {
234 IfxPmsEvr_SecondaryVoltageErrorCounter_level0 = 0, /**< \brief Error Counter Limit 0 */
235 IfxPmsEvr_SecondaryVoltageErrorCounter_level1, /**< \brief Error Counter Limit 1 */
236 IfxPmsEvr_SecondaryVoltageErrorCounter_level2, /**< \brief Error Counter Limit 2 */
237 IfxPmsEvr_SecondaryVoltageErrorCounter_level3, /**< \brief Error Counter Limit 3 */
238 IfxPmsEvr_SecondaryVoltageErrorCounter_level4, /**< \brief Error Counter Limit 4 */
239 IfxPmsEvr_SecondaryVoltageErrorCounter_level5, /**< \brief Error Counter Limit 5 */
240 IfxPmsEvr_SecondaryVoltageErrorCounter_level6, /**< \brief Error Counter Limit 6 */
241 IfxPmsEvr_SecondaryVoltageErrorCounter_level7, /**< \brief Error Counter Limit 7 */
242 IfxPmsEvr_SecondaryVoltageErrorCounter_level8, /**< \brief Error Counter Limit 8 */
243 IfxPmsEvr_SecondaryVoltageErrorCounter_level9, /**< \brief Error Counter Limit 9 */
244 IfxPmsEvr_SecondaryVoltageErrorCounter_level10, /**< \brief Error Counter Limit 10 */
245 IfxPmsEvr_SecondaryVoltageErrorCounter_level11, /**< \brief Error Counter Limit 11 */
246 IfxPmsEvr_SecondaryVoltageErrorCounter_level12, /**< \brief Error Counter Limit 12 */
247 IfxPmsEvr_SecondaryVoltageErrorCounter_level13, /**< \brief Error Counter Limit 13 */
248 IfxPmsEvr_SecondaryVoltageErrorCounter_level14, /**< \brief Error Counter Limit 14 */
249 IfxPmsEvr_SecondaryVoltageErrorCounter_level15, /**< \brief Error Counter Limit 15 */
250 IfxPmsEvr_SecondaryVoltageErrorCounter_level16, /**< \brief Error Counter Limit 16 */
251 IfxPmsEvr_SecondaryVoltageErrorCounter_level17, /**< \brief Error Counter Limit 17 */
252 IfxPmsEvr_SecondaryVoltageErrorCounter_level18, /**< \brief Error Counter Limit 18 */
253 IfxPmsEvr_SecondaryVoltageErrorCounter_level19, /**< \brief Error Counter Limit 19 */
254 IfxPmsEvr_SecondaryVoltageErrorCounter_level20, /**< \brief Error Counter Limit 20 */
255 IfxPmsEvr_SecondaryVoltageErrorCounter_level21, /**< \brief Error Counter Limit 21 */
256 IfxPmsEvr_SecondaryVoltageErrorCounter_level22, /**< \brief Error Counter Limit 22 */
257 IfxPmsEvr_SecondaryVoltageErrorCounter_level23, /**< \brief Error Counter Limit 23 */
258 IfxPmsEvr_SecondaryVoltageErrorCounter_level24, /**< \brief Error Counter Limit 24 */
259 IfxPmsEvr_SecondaryVoltageErrorCounter_level25, /**< \brief Error Counter Limit 25 */
260 IfxPmsEvr_SecondaryVoltageErrorCounter_level26, /**< \brief Error Counter Limit 26 */
261 IfxPmsEvr_SecondaryVoltageErrorCounter_level27, /**< \brief Error Counter Limit 27 */
262 IfxPmsEvr_SecondaryVoltageErrorCounter_level28, /**< \brief Error Counter Limit 28 */
263 IfxPmsEvr_SecondaryVoltageErrorCounter_level29, /**< \brief Error Counter Limit 29 */
264 IfxPmsEvr_SecondaryVoltageErrorCounter_level30, /**< \brief Error Counter Limit 30 */
265 IfxPmsEvr_SecondaryVoltageErrorCounter_level31, /**< \brief Error Counter Limit 31 */
266 IfxPmsEvr_SecondaryVoltageErrorCounter_level32, /**< \brief Error Counter Limit 32 */
267 IfxPmsEvr_SecondaryVoltageErrorCounter_level33, /**< \brief Error Counter Limit 33 */
268 IfxPmsEvr_SecondaryVoltageErrorCounter_level34, /**< \brief Error Counter Limit 34 */
269 IfxPmsEvr_SecondaryVoltageErrorCounter_level35, /**< \brief Error Counter Limit 35 */
270 IfxPmsEvr_SecondaryVoltageErrorCounter_level36, /**< \brief Error Counter Limit 36 */
271 IfxPmsEvr_SecondaryVoltageErrorCounter_level37, /**< \brief Error Counter Limit 37 */
272 IfxPmsEvr_SecondaryVoltageErrorCounter_level38, /**< \brief Error Counter Limit 38 */
273 IfxPmsEvr_SecondaryVoltageErrorCounter_level39, /**< \brief Error Counter Limit 39 */
274 IfxPmsEvr_SecondaryVoltageErrorCounter_level40, /**< \brief Error Counter Limit 40 */
275 IfxPmsEvr_SecondaryVoltageErrorCounter_level41, /**< \brief Error Counter Limit 41 */
276 IfxPmsEvr_SecondaryVoltageErrorCounter_level42, /**< \brief Error Counter Limit 42 */
277 IfxPmsEvr_SecondaryVoltageErrorCounter_level43, /**< \brief Error Counter Limit 43 */
278 IfxPmsEvr_SecondaryVoltageErrorCounter_level44, /**< \brief Error Counter Limit 44 */
279 IfxPmsEvr_SecondaryVoltageErrorCounter_level45, /**< \brief Error Counter Limit 45 */
280 IfxPmsEvr_SecondaryVoltageErrorCounter_level46, /**< \brief Error Counter Limit 46 */
281 IfxPmsEvr_SecondaryVoltageErrorCounter_level47, /**< \brief Error Counter Limit 47 */
282 IfxPmsEvr_SecondaryVoltageErrorCounter_level48, /**< \brief Error Counter Limit 48 */
283 IfxPmsEvr_SecondaryVoltageErrorCounter_level49, /**< \brief Error Counter Limit 49 */
284 IfxPmsEvr_SecondaryVoltageErrorCounter_level50, /**< \brief Error Counter Limit 50 */
285 IfxPmsEvr_SecondaryVoltageErrorCounter_level51, /**< \brief Error Counter Limit 51 */
286 IfxPmsEvr_SecondaryVoltageErrorCounter_level52, /**< \brief Error Counter Limit 52 */
287 IfxPmsEvr_SecondaryVoltageErrorCounter_level53, /**< \brief Error Counter Limit 53 */
288 IfxPmsEvr_SecondaryVoltageErrorCounter_level54, /**< \brief Error Counter Limit 54 */
289 IfxPmsEvr_SecondaryVoltageErrorCounter_level55, /**< \brief Error Counter Limit 55 */
290 IfxPmsEvr_SecondaryVoltageErrorCounter_level56, /**< \brief Error Counter Limit 56 */
291 IfxPmsEvr_SecondaryVoltageErrorCounter_level57, /**< \brief Error Counter Limit 57 */
292 IfxPmsEvr_SecondaryVoltageErrorCounter_level58, /**< \brief Error Counter Limit 58 */
293 IfxPmsEvr_SecondaryVoltageErrorCounter_level59, /**< \brief Error Counter Limit 59 */
294 IfxPmsEvr_SecondaryVoltageErrorCounter_level60, /**< \brief Error Counter Limit 60 */
295 IfxPmsEvr_SecondaryVoltageErrorCounter_level61, /**< \brief Error Counter Limit 61 */
296 IfxPmsEvr_SecondaryVoltageErrorCounter_level62, /**< \brief Error Counter Limit 62 */
297 IfxPmsEvr_SecondaryVoltageErrorCounter_level63 /**< \brief Error Counter Limit 63 */
298 } IfxPmsEvr_SecondaryVoltageErrorCounter;
299
300 /** \brief ADC result for the generating Alarm declare in Ifx_PMS.EVR.MONFILT
301 */
302 typedef enum
303 {
304 IfxPmsEvr_SupplyFilter_eachConversionResult = 0, /**< \brief Each conversion result is compared with threshold to generate alarm */
305 IfxPmsEvr_SupplyFilter_avgAdcConversionResult0 = 1, /**< \brief A moving mean average of consecutive 0 ADC results */
306 IfxPmsEvr_SupplyFilter_avgAdcConversionResult1, /**< \brief A moving mean average of consecutive 1 ADC results */
307 IfxPmsEvr_SupplyFilter_avgAdcConversionResult2, /**< \brief A moving mean average of consecutive 2 ADC results */
308 IfxPmsEvr_SupplyFilter_avgAdcConversionResult3, /**< \brief A moving mean average of consecutive 3 ADC results */
309 IfxPmsEvr_SupplyFilter_avgAdcConversionResult4, /**< \brief A moving mean average of consecutive 4 ADC results */
310 IfxPmsEvr_SupplyFilter_avgAdcConversionResult5, /**< \brief A moving mean average of consecutive 5 ADC results */
311 IfxPmsEvr_SupplyFilter_avgAdcConversionResult6, /**< \brief A moving mean average of consecutive 6 ADC results */
312 IfxPmsEvr_SupplyFilter_avgAdcConversionResult7, /**< \brief A moving mean average of consecutive 7 ADC results */
313 IfxPmsEvr_SupplyFilter_avgAdcConversionResult8, /**< \brief A moving mean average of consecutive 8 ADC results */
314 IfxPmsEvr_SupplyFilter_avgAdcConversionResult9, /**< \brief A moving mean average of consecutive 9 ADC results */
315 IfxPmsEvr_SupplyFilter_avgAdcConversionResult10, /**< \brief A moving mean average of consecutive 10 ADC results */
316 IfxPmsEvr_SupplyFilter_avgAdcConversionResult11, /**< \brief A moving mean average of consecutive 11 ADC results */
317 IfxPmsEvr_SupplyFilter_avgAdcConversionResult12, /**< \brief A moving mean average of consecutive 12 ADC results */
318 IfxPmsEvr_SupplyFilter_avgAdcConversionResult13, /**< \brief A moving mean average of consecutive 13 ADC results */
319 IfxPmsEvr_SupplyFilter_avgAdcConversionResult14 /**< \brief A moving mean average of consecutive 14 ADC results */
320 } IfxPmsEvr_SupplyFilter;
321
322 /** \brief Controls the voltage supply Type
323 */
324 typedef enum
325 {
326 IfxPmsEvr_SupplyMode_evrc = 0, /**< \brief select EVRC regulator or VDD Supply */
327 IfxPmsEvr_SupplyMode_evr33 = 1, /**< \brief select EVR33 regulator or VDDP3 Supply */
328 IfxPmsEvr_SupplyMode_swd = 2, /**< \brief select external VEXT suppy watchdog */
329 IfxPmsEvr_SupplyMode_evrpr = 3, /**< \brief select EVRPR or VDDPD supply */
330 IfxPmsEvr_SupplyMode_vddm = 4, /**< \brief VDDM ADC Supply */
331 IfxPmsEvr_SupplyMode_sb = 5 /**< \brief EVR Standby Supply or VEVRSB supply */
332 } IfxPmsEvr_SupplyMode;
333
334 /** \brief Monitoring underVoltage for all bitfields defined
335 * in Ifx_PMS.EVR.MONCTRL register for undervoltage monitoring
336 */
337 typedef enum
338 {
339 IfxPmsEvr_UnderVoltageMonitoring_inactive = 0, /**< \brief Under-Voltage Monitoring inactive */
340 IfxPmsEvr_UnderVoltageMonitoring_lowToHighVoltageTransition = 1, /**< \brief under-Voltage event is generated when threshold is crossed in lower to higher voltage transition */
341 IfxPmsEvr_UnderVoltageMonitoring_highToLowVoltageTransition = 2, /**< \brief Under-Voltage event is generated when threshold is crossed in higher to lower voltage transition */
342 IfxPmsEvr_UnderVoltageMonitoring_eitherDirectionVoltageTransition = 3 /**< \brief Under-Voltage event is generated when threshold is crossed in either direction */
343 } IfxPmsEvr_UnderVoltageMonitoring;
344
345 /** \} */
346
347 /******************************************************************************/
348 /*-----------------------------Data Structures--------------------------------*/
349 /******************************************************************************/
350
351 typedef struct
352 {
353 volatile void *regAddr; /**< \brief Register Address to be updated. */
354 uint32 value; /**< \brief Register value to be updated. */
355 uint32 mask; /**< \brief Mask to select the bit fields to be updated. */
356 } IfxPmsEvr_StepDownRegulatorRegConfig;
357
358 typedef struct
359 {
360 uint8 numOfRegisters;
361 IFX_CONST IfxPmsEvr_StepDownRegulatorRegConfig *regConfig;
362 float32 waitInSecs;
363 } IfxPmsEvr_initSequencePhase;
364
365 typedef struct
366 {
367 uint8 numOfRegisters;
368 IFX_CONST IfxPmsEvr_StepDownRegulatorRegConfig *regConfig;
369 } IfxPmsEvr_checkRegConfig;
370
371 typedef struct
372 {
373 uint8 numOfPhases;
374 IFX_CONST IfxPmsEvr_initSequencePhase *phaseConfig;
375 } IfxPmsEvr_initSequence;
376
377 /** \addtogroup IfxLld_Pms_Std_Evr_Over-Voltage
378 * \{ */
379
380 /******************************************************************************/
381 /*-------------------------Inline Function Prototypes-------------------------*/
382 /******************************************************************************/
383
384 /** \brief set Over Voltage Monitoring Mode
385 * \param pms pointer to the Module space
386 * \param mode specifies the monitoring mode
387 * \param supply select EVRC,EVR33,VDDM,SWD or SB supply
388 * \return None
389 */
390 IFX_INLINE void IfxPmsEvr_setOverVoltageMonitoringMode(Ifx_PMS *pms, IfxPmsEvr_OverVoltageMonitoring mode, IfxPmsEvr_SupplyMode supply);
391
392 /******************************************************************************/
393 /*-------------------------Global Function Prototypes-------------------------*/
394 /******************************************************************************/
395
396 /** \brief set Secondary Over Voltage Threshold level
397 * \param pms Pointer to PMS Module
398 * \param thresholdLevel over-voltage monitoring threshold level of the respective
399 * regulator output or supply
400 * \param supply select EVRC,EVR33,SWD,EVRPR,VDDM or SB supply mode
401 * \return None
402 */
403 IFX_EXTERN void IfxPmsEvr_setSecondaryOverVoltageThresholdMv(Ifx_PMS *pms, float32 thresholdLevel, IfxPmsEvr_SupplyMode supply);
404
405 /** \} */
406
407 /** \addtogroup IfxLld_Pms_Std_Evr_Module
408 * \{ */
409
410 /******************************************************************************/
411 /*-------------------------Inline Function Prototypes-------------------------*/
412 /******************************************************************************/
413
414 /** \brief Configure a Blanking Filter Delay
415 * \param pms Pointer To PMS Module
416 * \param delay Blanking Filter Delay in ms
417 * \return None
418 */
419 IFX_INLINE void IfxPmsEvr_configureBlankingFilterDelay(Ifx_PMS *pms, uint8 delay);
420
421 /** \brief This function enables the synchronisation output to synchronize the external
422 * SMPS regulator with respect to the internal EVRC regulator
423 * \param pms Pointer to PMS Module
424 * \param enabled enable/disable DC-DC synchronisation
425 * \return None
426 */
427 IFX_INLINE void IfxPmsEvr_enableDcdcSynchronisation(Ifx_PMS *pms, boolean enabled);
428
429 /** \brief Enable Interrupts
430 * \param pms Pointer to PMS Module
431 * \param interruptType Select The Interrupt Type
432 * \return None
433 */
434 IFX_INLINE void IfxPmsEvr_enableInterrupts(Ifx_PMS *pms, IfxPmsEvr_EnableInterrupt interruptType);
435
436 /** \brief enables wakeup on VEXT supply ramp-up after blanking filter
437 * time has expired
438 * \param pms Pointer To PMS Module
439 * \param enabled Wake-up Enable on VEXT Supply ramp-up
440 * \return None
441 */
442 IFX_INLINE void IfxPmsEvr_enableWakeupOnVextSupplyRampUp(Ifx_PMS *pms, boolean enabled);
443
444 /** \brief OSC Fine Trim 100MHz Clock
445 * \param pms pointer to PMS Module
446 * \param trimValue OSC fine trim value
447 * \return None
448 */
449 IFX_INLINE void IfxPmsEvr_fineTrimEvrClock(Ifx_PMS *pms, uint8 trimValue);
450
451 /** \brief set frequency spread threshold
452 * \param pms pointer to PMS module
453 * \param thresholdLevel maximum frequency spreading value
454 * \return None
455 */
456 IFX_INLINE void IfxPmsEvr_setFrequencySpreadThreshold(Ifx_PMS *pms, uint16 thresholdLevel);
457
458 /** \brief This configures the state of N ch. MOSFET driver during start-up and
459 * shut-down phases
460 * \param pms Pointer to PMS Module
461 * \param nmosLevel TRISTATE/LOW
462 * \return None
463 */
464 IFX_INLINE void IfxPmsEvr_setNmosLevel(Ifx_PMS *pms, boolean nmosLevel);
465
466 /** \brief This configures the state of P ch. MOSFET driver during start-up and
467 * shut-down phases
468 * \param pms Pointer to PMS Module
469 * \param pmosLevel TRISTATE/LOW
470 * \return None
471 */
472 IFX_INLINE void IfxPmsEvr_setPmosLevel(Ifx_PMS *pms, boolean pmosLevel);
473
474 /** \brief set regulator switching frequency in Hz....(100MHz/samplingFactor)
475 * \param pms Pointer to PMS Module
476 * \param samplingFactor Over-sampling Factor
477 * \return None
478 */
479 IFX_INLINE void IfxPmsEvr_setRegulatorSwitchingFrequency(Ifx_PMS *pms, uint16 samplingFactor);
480
481 /** \brief set reset trim value for EVRC,EVR33 and external VEXT supply
482 * \param pms Pointer to PMS Module Space
483 * \param resetTrimValue Reset Trim Value
484 * \param supply select EVRC,EVR33 regulator or external VEXT supply watchdog
485 * \return None
486 */
487 IFX_INLINE void IfxPmsEvr_setResetTrimValueMv(Ifx_PMS *pms, float32 resetTrimValue, IfxPmsEvr_SupplyMode supply);
488
489 /** \brief SD Regulator Voltage Target selection
490 * \param pms Pointer to PMS Module
491 * \param outputLevel The VDD output level of the Step down regulator
492 * \return None
493 */
494 IFX_INLINE void IfxPmsEvr_setSdRegulatorOutputLevel(Ifx_PMS *pms, uint8 outputLevel);
495
496 /** \brief SD Regulator Voltage Trim Value
497 * \param pms Pointer to PMS Moule Space
498 * \param trimValue offset added to the VDD output level
499 * \return None
500 */
501 IFX_INLINE void IfxPmsEvr_setSdRegulatorPrimaryAdcTrimValue(Ifx_PMS *pms, IfxPmsEvr_PrimaryAdcTrimValue trimValue);
502
503 /** \brief set DLMU RAM Block in Standby Mode
504 * \param pms Pointer To PMS Module
505 * \param ramBlock DLMU RAM block
506 * \return None
507 */
508 IFX_INLINE void IfxPmsEvr_setStandbyRamSupply(Ifx_PMS *pms, uint8 ramBlock);
509
510 /** \brief Set Switching frequency division factor for external synchronisation.
511 * \param pms Pointer To PMS Module
512 * \param divider Switching frequency division factor for external synchronisation
513 * \return None
514 */
515 IFX_INLINE void IfxPmsEvr_setSwitchingFreqDivFactorForExternalsync(Ifx_PMS *pms, IfxPmsEvr_ExtSyncSwitchingFreqDivFactor divider);
516
517 /** \brief OSC Fine Trim 100MHz Clock
518 * \param pms Pointer to PMS Module
519 * \param trimValue OSC Signed fine trim value
520 * \return None
521 */
522 IFX_INLINE void IfxPmsEvr_signedFineTrimEvrClock(Ifx_PMS *pms, sint8 trimValue);
523
524 /******************************************************************************/
525 /*-------------------------Global Function Prototypes-------------------------*/
526 /******************************************************************************/
527
528 /** \brief filter the each conversion result or avarage of consecutive adc result to compare with threshold
529 * \param pms Pointer to PMS Module
530 * \param adcFilterValue specify average of consecutive ADC results
531 * \param supply select EVRC,EVR33,SWD,EVRPR,VDDM or SB supply mode
532 * \return None
533 */
534 IFX_EXTERN void IfxPmsEvr_filterSecondaryConversionResult(Ifx_PMS *pms, IfxPmsEvr_SupplyFilter adcFilterValue, IfxPmsEvr_SupplyMode supply);
535
536 /** \brief get secondray ADC result for respective Voltage supply
537 * \param pms Pointer To PMS Module
538 * \param supply select EVRC,EVR33,SWD,EVRPR,VDDM or SB supply mode
539 * \return last conversion result of the ADC measurement
540 * of respective voltage by secondary monitor
541 */
542 IFX_EXTERN uint8 IfxPmsEvr_getSecondaryAdcResult(Ifx_PMS *pms, IfxPmsEvr_SupplyMode supply);
543
544 /** \} */
545
546 /** \addtogroup IfxLld_Pms_Std_Evr_Under-Voltage
547 * \{ */
548
549 /******************************************************************************/
550 /*-------------------------Inline Function Prototypes-------------------------*/
551 /******************************************************************************/
552
553 /** \brief set Under Voltage Monitoring mode
554 * \param pms Pointer to the PMS Module space
555 * \param mode specifies the monitoring mode
556 * \param supply select EVRC,EVR33,VDDM,SWD or SB supply
557 * \return None
558 */
559 IFX_INLINE void IfxPmsEvr_setUnderVoltageMonitoringMode(Ifx_PMS *pms, IfxPmsEvr_UnderVoltageMonitoring mode, IfxPmsEvr_SupplyMode supply);
560
561 /******************************************************************************/
562 /*-------------------------Global Function Prototypes-------------------------*/
563 /******************************************************************************/
564
565 /** \brief set Secondary under Voltage Threshold level
566 * \param pms Pointer to PMS Module space
567 * \param thresholdLevel under-voltage monitoring threshold level of the respective
568 * regulator output or supply
569 * \param supply select EVRC,EVR33,SWD,EVRPR,VDDM or SB supply mode
570 * \return None
571 */
572 IFX_EXTERN void IfxPmsEvr_setSecondaryUnderVoltageThresholdMv(Ifx_PMS *pms, float32 thresholdLevel, IfxPmsEvr_SupplyMode supply);
573
574 /** \} */
575
576 /** \addtogroup IfxLld_Pms_Std_Evr_EVRC
577 * \{ */
578
579 /******************************************************************************/
580 /*-------------------------Inline Function Prototypes-------------------------*/
581 /******************************************************************************/
582
583 /** \brief Enabled/Disable Reset Trigger signal for EVRC
584 * \param pms pointer to PMS Module
585 * \param enableReset Enable/Disable the reset trigger signal
586 * \return None
587 */
588 IFX_INLINE void IfxPmsEvr_evrcResetTriggerSignalConfig(Ifx_PMS *pms, boolean enableReset);
589
590 /**
591 * \param averageADCC Average value of PMS_EVRADCSTAT.ADCCV.
592 * \return ADC VDD Core Voltage Conversion Result
593 */
594 IFX_INLINE float32 IfxPmsEvr_getAdcVddResult(float32 averageADCC);
595
596 /** \brief get current operating mode of EVRC
597 * \param pms Pointer to PMS Module Space
598 * \return EVRC Mode
599 */
600 IFX_INLINE IfxPmsEvr_EvrcMode IfxPmsEvr_getEvrcMode(Ifx_PMS *pms);
601
602 /** \brief get EVRC Regulator Voltage status
603 * \param pms Pointer to PMS Module Space
604 * \return EVRC Regulator Voltage OK status
605 */
606 IFX_INLINE boolean IfxPmsEvr_getEvrcVoltageRegulator(Ifx_PMS *pms);
607
608 /** \brief get ADC 1.25 V Core Voltage Conversion Result
609 * \param pms Pointer to PMS Module space
610 * \return last conversion result of the ADC measurement of
611 * the VDD / EVRC supply by the Primary Monitor
612 */
613 IFX_INLINE uint8 IfxPmsEvr_getPrimaryAdcEvrcResult(Ifx_PMS *pms);
614
615 /** \} */
616
617 /** \addtogroup IfxLld_Pms_Std_Evr_EVR33
618 * \{ */
619
620 /******************************************************************************/
621 /*-------------------------Inline Function Prototypes-------------------------*/
622 /******************************************************************************/
623
624 /** \brief Enabled/Disable Reset Trigger signal for EVR33
625 * \param pms pointer to PMS Module
626 * \param enableReset Enable/Disable the reset trigger signal
627 * \return None
628 */
629 IFX_INLINE void IfxPmsEvr_evr33ResetTriggerSignalConfig(Ifx_PMS *pms, boolean enableReset);
630
631 /** \brief get ADC 3.3 V Voltage Conversion Result
632 * \param pms Pointer to PMS Module Space
633 * \return last conversion result of the ADC measurement of
634 * the VDDP3 / EVR33 supply by the Primary Monitor
635 */
636 IFX_INLINE uint8 IfxPmsEvr_getPrimaryAdcEvr33Result(Ifx_PMS *pms);
637
638 /** \brief set 3.3 V Regulator Voltage Primary ADC Trim Value
639 * \param pms Pointer to PMS Module
640 * \param trimValue Trimming value offeset added to Output level
641 * \return None
642 */
643 IFX_INLINE void IfxPmsEvr_setEvr33PrimaryAdcTrimValue(Ifx_PMS *pms, IfxPmsEvr_PrimaryAdcTrimValue trimValue);
644
645 /** \brief The VDDP3 output level of the EVR33 LDO regulator
646 * \param pms Pointer to PMS Module
647 * \param outputLevel define VDDP3 output level of the EVR33 LDO regulator.
648 * \return None
649 */
650 IFX_INLINE void IfxPmsEvr_setEvr33VoltageOutputlevel(Ifx_PMS *pms, uint8 outputLevel);
651
652 /** \} */
653
654 /** \addtogroup IfxLld_Pms_Std_Evr_SWD
655 * \{ */
656
657 /******************************************************************************/
658 /*-------------------------Inline Function Prototypes-------------------------*/
659 /******************************************************************************/
660
661 /** \brief get ADC External Supply Conversion Result
662 * \param pms Pointer to PMS Module space
663 * \return last conversion result of the ADC measurement of
664 * the external VEXT (3.3V / 5V) supply by the Primary Monitor
665 */
666 IFX_INLINE uint8 IfxPmsEvr_getPrimaryAdcSwdResult(Ifx_PMS *pms);
667
668 /** \brief Enabled/Disable Reset Trigger signal for SWD
669 * \param pms Pointer to PMS Module
670 * \param enableReset Enable/Disable the reset trigger signal
671 * \return None
672 */
673 IFX_INLINE void IfxPmsEvr_swdResetTriggerSignalConfig(Ifx_PMS *pms, boolean enableReset);
674
675 /** \} */
676
677 /******************************************************************************/
678 /*-------------------------Inline Function Prototypes-------------------------*/
679 /******************************************************************************/
680
681 /**
682 */
683 IFX_INLINE boolean IfxPmsEvr_areInitValuesRight(const IfxPmsEvr_checkRegConfig *const checkConfig);
684
685 /** \brief Disable Interrupts
686 * \return None
687 */
688 IFX_INLINE void IfxPmsEvr_disableInterrupt(Ifx_PMS *pms, IfxPmsEvr_EnableInterrupt interruptType);
689
690 /**
691 * \param averageADC33V Average of PMS_EVRSTAT.ADC33V values
692 * \return ADC VDDP3 Voltage Conversion Result
693 */
694 IFX_INLINE float32 IfxPmsEvr_getAdcVddp3Result(float32 averageADC33V);
695
696 /**
697 * \param averageADCSWDV Average of PMS_EVRADCSTAT.ADCSWDV values.
698 * \return ADC VEXT Supply Conversion Result
699 */
700 IFX_INLINE float32 IfxPmsEvr_getAdcVextResult(float32 averageADCSWDV);
701
702 /**
703 */
704 IFX_INLINE boolean IfxPmsEvr_runInitSequence(const IfxPmsEvr_initSequence *const sequence);
705
706 /**
707 * \return None
708 */
709 IFX_INLINE void IfxPmsEvr_wait(float32 waitInSec);
710
711 /******************************************************************************/
712 /*-------------------Global Exported Variables/Constants----------------------*/
713 /******************************************************************************/
714
715 IFX_EXTERN IFX_CONST IfxPmsEvr_StepDownRegulatorRegConfig IfxPmsEvr_cfgPhase1Default[];
716
717 IFX_EXTERN IFX_CONST IfxPmsEvr_StepDownRegulatorRegConfig IfxPmsEvr_cfgPhase2Default[];
718
719 /** \brief
720 */
721 IFX_EXTERN IFX_CONST IfxPmsEvr_StepDownRegulatorRegConfig IfxPmsEvr_cfgPhase3Default[];
722
723 IFX_EXTERN IFX_CONST IfxPmsEvr_initSequencePhase IfxPmsEvr_cfgPhasesDefault[];
724
725 IFX_EXTERN IFX_CONST IfxPmsEvr_initSequence IfxPmsEvr_cfgSequenceDefault;
726
727 IFX_EXTERN IFX_CONST IfxPmsEvr_checkRegConfig IfxPmsEvr_checkRegCfgDefault;
728
729 IFX_EXTERN IFX_CONST IfxPmsEvr_StepDownRegulatorRegConfig IfxPmsEvr_checkRegValuesDefault[];
730
731 /******************************************************************************/
732 /*---------------------Inline Function Implementations------------------------*/
733 /******************************************************************************/
734
735 IFX_INLINE boolean IfxPmsEvr_areInitValuesRight(const IfxPmsEvr_checkRegConfig *const checkConfig)
736 {
737 boolean allRight = TRUE;
738 sint32 regCfgCount;
739
740 if (PMS_EVRSTAT.B.EVRC == 1U)
741 {
742 for (regCfgCount = 0; regCfgCount < checkConfig->numOfRegisters; regCfgCount++)
743 {
744 uint32 regVal;
745 const IfxPmsEvr_StepDownRegulatorRegConfig *regConfig = &checkConfig->regConfig[regCfgCount];
746 regVal = (*((volatile uint32 *)regConfig->regAddr));
747 regVal &= regConfig->mask;
748
749 if (regVal != regConfig->value)
750 {
751 allRight = FALSE;
752 }
753 }
754
755 /*Check if EVRSTAT.SDVOK is set*/
756 if (allRight == TRUE)
757 {
758 if (PMS_EVRSTAT.B.SDVOK != 1)
759 {
760 allRight = FALSE;
761 }
762 }
763 }
764
765 return allRight;
766 }
767
768
769 IFX_INLINE void IfxPmsEvr_configureBlankingFilterDelay(Ifx_PMS *pms, uint8 delay)
770 {
771 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
772
773 IfxScuWdt_clearSafetyEndinit(passwd);
774
775 pms->PMSWCR0.B.BLNKFIL = delay;
776
777 IfxScuWdt_setSafetyEndinit(passwd);
778 }
779
780
781 IFX_INLINE void IfxPmsEvr_disableInterrupt(Ifx_PMS *pms, IfxPmsEvr_EnableInterrupt interruptType)
782 {
783 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
784
785 IfxScuWdt_clearSafetyEndinit(passwd);
786 uint32 mask = (1U << interruptType);
787 pms->PMSIEN.U &= (~mask);
788
789 IfxScuWdt_setSafetyEndinit(passwd);
790 }
791
792
793 IFX_INLINE void IfxPmsEvr_enableDcdcSynchronisation(Ifx_PMS *pms, boolean enabled)
794 {
795 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
796
797 IfxScuWdt_clearSafetyEndinit(passwd);
798
799 pms->PMSWCR5.B.DCDCSYNCO = enabled;
800
801 IfxScuWdt_setSafetyEndinit(passwd);
802 }
803
804
805 IFX_INLINE void IfxPmsEvr_enableInterrupts(Ifx_PMS *pms, IfxPmsEvr_EnableInterrupt interruptType)
806 {
807 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
808
809 IfxScuWdt_clearSafetyEndinit(passwd);
810
811 pms->PMSIEN.U |= (1U << interruptType);
812
813 IfxScuWdt_setSafetyEndinit(passwd);
814 }
815
816
817 IFX_INLINE void IfxPmsEvr_enableWakeupOnVextSupplyRampUp(Ifx_PMS *pms, boolean enabled)
818 {
819 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
820
821 IfxScuWdt_clearSafetyEndinit(passwd);
822
823 pms->PMSWCR0.B.PWRWKEN = enabled;
824
825 IfxScuWdt_setSafetyEndinit(passwd);
826 }
827
828
829 IFX_INLINE void IfxPmsEvr_evr33ResetTriggerSignalConfig(Ifx_PMS *pms, boolean enableReset)
830 {
831 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
832
833 IfxScuWdt_clearSafetyEndinit(passwd);
834 pms->EVRRSTCON.B.BPRST33OFF = 1;
835 pms->EVRRSTCON.B.RST33OFF = enableReset;
836
837 IfxScuWdt_setSafetyEndinit(passwd);
838 }
839
840
841 IFX_INLINE void IfxPmsEvr_evrcResetTriggerSignalConfig(Ifx_PMS *pms, boolean enableReset)
842 {
843 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
844
845 IfxScuWdt_clearSafetyEndinit(passwd);
846
847 pms->EVRRSTCON.B.BPRSTCOFF = 1;
848 pms->EVRRSTCON.B.RSTCOFF = enableReset;
849
850 IfxScuWdt_setSafetyEndinit(passwd);
851 }
852
853
854 IFX_INLINE void IfxPmsEvr_fineTrimEvrClock(Ifx_PMS *pms, uint8 trimValue)
855 {
856 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
857
858 IfxScuWdt_clearSafetyEndinit(passwd);
859
860 pms->EVROSCCTRL.B.OSCFTRIM = trimValue;
861
862 IfxScuWdt_setSafetyEndinit(passwd);
863 }
864
865
866 IFX_INLINE float32 IfxPmsEvr_getAdcVddResult(float32 averageADCC)
867 {
868 float32 vddVoltage = 0;
869 vddVoltage = (IFXPMSEVR_ADC_VDD_LSB * averageADCC + 0.7125);
870 return vddVoltage;
871 }
872
873
874 IFX_INLINE float32 IfxPmsEvr_getAdcVddp3Result(float32 averageADC33V)
875 {
876 float32 vddp3Voltage = 0;
877 vddp3Voltage = (IFXPMSEVR_ADC_VDDP3_LSB * averageADC33V + 0.9375);
878 return vddp3Voltage;
879 }
880
881
882 IFX_INLINE float32 IfxPmsEvr_getAdcVextResult(float32 averageADCSWDV)
883 {
884 float32 vextVoltage = 0;
885 vextVoltage = (IFXPMSEVR_ADC_VEXT_LSB * averageADCSWDV + 1.050);
886 return vextVoltage;
887 }
888
889
890 IFX_INLINE IfxPmsEvr_EvrcMode IfxPmsEvr_getEvrcMode(Ifx_PMS *pms)
891 {
892 return (IfxPmsEvr_EvrcMode)pms->EVRSTAT.B.EVRCMOD;
893 }
894
895
896 IFX_INLINE boolean IfxPmsEvr_getEvrcVoltageRegulator(Ifx_PMS *pms)
897 {
898 return (boolean)pms->EVRSTAT.B.SDVOK;
899 }
900
901
902 IFX_INLINE uint8 IfxPmsEvr_getPrimaryAdcEvr33Result(Ifx_PMS *pms)
903 {
904 return pms->EVRADCSTAT.B.ADC33V;
905 }
906
907
908 IFX_INLINE uint8 IfxPmsEvr_getPrimaryAdcEvrcResult(Ifx_PMS *pms)
909 {
910 return pms->EVRADCSTAT.B.ADCCV;
911 }
912
913
914 IFX_INLINE uint8 IfxPmsEvr_getPrimaryAdcSwdResult(Ifx_PMS *pms)
915 {
916 return pms->EVRADCSTAT.B.ADCSWDV;
917 }
918
919
920 #if defined(__TASKING__)
921 #pragma optimize L
922 #elif defined(__HIGHTEC__)
923 #pragma GCC optimize ("-O2")
924 #endif
925 IFX_INLINE boolean IfxPmsEvr_runInitSequence(const IfxPmsEvr_initSequence *const sequence)
926 {
927 boolean pmsInitDone = TRUE;
928 uint32 regVal;
929 uint16 endinitSfty_pw = IfxScuWdt_getGlobalSafetyEndinitPasswordInline();
930 const IfxPmsEvr_initSequencePhase *phaseConfig;
931 const IfxPmsEvr_StepDownRegulatorRegConfig *regConfig;
932
933 if (PMS_EVRSTAT.B.EVRC == 1U)
934 {
935 /*Loop through each configured phase*/
936 for (phaseConfig = &sequence->phaseConfig[0];
937 phaseConfig < &sequence->phaseConfig[sequence->numOfPhases];
938 phaseConfig++)
939 {
940 IfxScuWdt_clearGlobalSafetyEndinitInline(endinitSfty_pw);
941
942 /*Loop through each register which is configured in the phase configuration*/
943 for (regConfig = &phaseConfig->regConfig[0];
944 regConfig < &phaseConfig->regConfig[phaseConfig->numOfRegisters];
945 regConfig++)
946 {
947 regVal = (*((volatile uint32 *)regConfig->regAddr));
948 regVal &= ~regConfig->mask;
949 regVal |= regConfig->value;
950
951 /** During normal running one must wait for the LCK bit.
952 * However, for this function, as this is used only with CPU0 startup no wait required
953 */
954 (*((volatile uint32 *)regConfig->regAddr)) = regVal; /*Write to the physical register*/
955 }
956
957 PMS_EVRSDCTRL0.B.UP = 1;
958 IfxScuWdt_setGlobalSafetyEndinitInline(endinitSfty_pw);
959
960 /* wait for the UP bit*/
961 sint32 timeoutCount = IFXPMSEVR_CTRL_UP_WAIT_TIMEOUTCOUNT;
962
963 /*Now, wait for the UP bit at EVRSDCTRL0 is reset, which is to indicate the configurations are done*/
964 do
965 {
966 if (--timeoutCount <= 0)
967 {
968 pmsInitDone = FALSE;
969 break;
970 }
971 } while (PMS_EVRSDCTRL0.B.UP == 1);
972
973 IfxPmsEvr_wait(phaseConfig->waitInSecs); // wait for configured time
974 }
975 }
976
977 /*return the status*/
978 return pmsInitDone;
979 }
980 #if defined(__TASKING__)
981 #pragma endoptimize
982 #elif defined(__HIGHTEC__)
983 #pragma GCC reset_options
984 #endif
985
986
987 IFX_INLINE void IfxPmsEvr_setEvr33PrimaryAdcTrimValue(Ifx_PMS *pms, IfxPmsEvr_PrimaryAdcTrimValue trimValue)
988 {
989 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
990
991 IfxScuWdt_clearSafetyEndinit(passwd);
992 pms->EVRTRIM.B.EVR33VOUTTRIM = trimValue;
993
994 IfxScuWdt_setSafetyEndinit(passwd);
995 }
996
997
998 IFX_INLINE void IfxPmsEvr_setEvr33VoltageOutputlevel(Ifx_PMS *pms, uint8 outputLevel)
999 {
1000 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
1001
1002 IfxScuWdt_clearSafetyEndinit(passwd);
1003
1004 pms->EVRTRIM.B.EVR33VOUTSEL = outputLevel;
1005
1006 IfxScuWdt_setSafetyEndinit(passwd);
1007 }
1008
1009
1010 IFX_INLINE void IfxPmsEvr_setFrequencySpreadThreshold(Ifx_PMS *pms, uint16 thresholdLevel)
1011 {
1012 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
1013
1014 IfxScuWdt_clearSafetyEndinit(passwd);
1015 pms->EVRSDCTRL0.B.SDFREQSPRD = thresholdLevel;
1016 pms->EVRSDCTRL0.B.UP = 1;
1017
1018 IfxScuWdt_setSafetyEndinit(passwd);
1019 }
1020
1021
1022 IFX_INLINE void IfxPmsEvr_setNmosLevel(Ifx_PMS *pms, boolean nmosLevel)
1023 {
1024 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
1025
1026 IfxScuWdt_clearSafetyEndinit(passwd);
1027
1028 pms->EVRSDCTRL0.B.NGOFF = nmosLevel;
1029 pms->EVRSDCTRL0.B.UP = 1;
1030
1031 IfxScuWdt_setSafetyEndinit(passwd);
1032 }
1033
1034
1035 IFX_INLINE void IfxPmsEvr_setOverVoltageMonitoringMode(Ifx_PMS *pms, IfxPmsEvr_OverVoltageMonitoring mode, IfxPmsEvr_SupplyMode supply)
1036 {
1037 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
1038
1039 Ifx_PMS_MONCTRL tempMONCTRL;
1040 IfxScuWdt_clearSafetyEndinit(passwd);
1041 tempMONCTRL.U = pms->MONCTRL.U;
1042
1043 switch (supply)
1044 {
1045 case IfxPmsEvr_SupplyMode_evrc:
1046 tempMONCTRL.B.EVRCOVMOD = mode;
1047 break;
1048 case IfxPmsEvr_SupplyMode_evr33:
1049 tempMONCTRL.B.EVR33OVMOD = mode;
1050 break;
1051 case IfxPmsEvr_SupplyMode_swd:
1052 tempMONCTRL.B.SWDOVMOD = mode;
1053 break;
1054 case IfxPmsEvr_SupplyMode_evrpr:
1055 tempMONCTRL.B.PREOVMOD = mode;
1056 break;
1057 case IfxPmsEvr_SupplyMode_vddm:
1058 tempMONCTRL.B.VDDMOVMOD = mode;
1059 break;
1060 case IfxPmsEvr_SupplyMode_sb:
1061 tempMONCTRL.B.SBOVMOD = mode;
1062 break;
1063 }
1064
1065 pms->MONCTRL.U = tempMONCTRL.U;
1066
1067 IfxScuWdt_setSafetyEndinit(passwd);
1068 }
1069
1070
1071 IFX_INLINE void IfxPmsEvr_setPmosLevel(Ifx_PMS *pms, boolean pmosLevel)
1072 {
1073 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
1074
1075 IfxScuWdt_clearSafetyEndinit(passwd);
1076
1077 pms->EVRSDCTRL0.B.PGOFF = pmosLevel;
1078 pms->EVRSDCTRL0.B.UP = 1;
1079
1080 IfxScuWdt_setSafetyEndinit(passwd);
1081 }
1082
1083
1084 IFX_INLINE void IfxPmsEvr_setRegulatorSwitchingFrequency(Ifx_PMS *pms, uint16 samplingFactor)
1085 {
1086 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
1087
1088 IfxScuWdt_clearSafetyEndinit(passwd);
1089
1090 pms->EVRSDCTRL0.B.SDFREQ = samplingFactor;
1091 pms->EVRSDCTRL0.B.UP = 1;
1092
1093 IfxScuWdt_setSafetyEndinit(passwd);
1094 }
1095
1096
1097 IFX_INLINE void IfxPmsEvr_setResetTrimValueMv(Ifx_PMS *pms, float32 resetTrimValue, IfxPmsEvr_SupplyMode supply)
1098 {
1099 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
1100
1101 Ifx_PMS_EVRRSTCON tempRSTCON;
1102 IfxScuWdt_clearSafetyEndinit(passwd);
1103 tempRSTCON.U = pms->EVRRSTCON.U;
1104
1105 switch (supply)
1106 {
1107 case IfxPmsEvr_SupplyMode_evrc:
1108 tempRSTCON.B.RSTCTRIM = ((resetTrimValue - 712.5) / 5);
1109 break;
1110 case IfxPmsEvr_SupplyMode_evr33:
1111 tempRSTCON.B.RST33TRIM = ((resetTrimValue - 937.5) / 15);
1112 break;
1113 case IfxPmsEvr_SupplyMode_swd:
1114 tempRSTCON.B.RSTSWDTRIM = ((resetTrimValue - 1050) / 20);
1115 break;
1116 default:
1117 break;
1118 }
1119
1120 pms->EVRRSTCON.U = tempRSTCON.U;
1121
1122 IfxScuWdt_setSafetyEndinit(passwd);
1123 }
1124
1125
1126 IFX_INLINE void IfxPmsEvr_setSdRegulatorOutputLevel(Ifx_PMS *pms, uint8 outputLevel)
1127 {
1128 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
1129
1130 IfxScuWdt_clearSafetyEndinit(passwd);
1131
1132 pms->EVRTRIM.B.SDVOUTSEL = outputLevel;
1133
1134 IfxScuWdt_setSafetyEndinit(passwd);
1135 }
1136
1137
1138 IFX_INLINE void IfxPmsEvr_setSdRegulatorPrimaryAdcTrimValue(Ifx_PMS *pms, IfxPmsEvr_PrimaryAdcTrimValue trimValue)
1139 {
1140 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
1141
1142 IfxScuWdt_clearSafetyEndinit(passwd);
1143 pms->EVRTRIM.B.SDVOUTTRIM = trimValue;
1144
1145 IfxScuWdt_setSafetyEndinit(passwd);
1146 }
1147
1148
1149 IFX_INLINE void IfxPmsEvr_setStandbyRamSupply(Ifx_PMS *pms, uint8 ramBlock)
1150 {
1151 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
1152
1153 IfxScuWdt_clearSafetyEndinit(passwd);
1154
1155 pms->PMSWCR0.B.STBYRAMSEL = ramBlock;
1156
1157 IfxScuWdt_setSafetyEndinit(passwd);
1158 }
1159
1160
1161 IFX_INLINE void IfxPmsEvr_setSwitchingFreqDivFactorForExternalsync(Ifx_PMS *pms, IfxPmsEvr_ExtSyncSwitchingFreqDivFactor divider)
1162 {
1163 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
1164
1165 IfxScuWdt_clearSafetyEndinit(passwd);
1166 pms->EVRSDCTRL7.B.SYNCDIVFAC = divider;
1167 IfxScuWdt_setSafetyEndinit(passwd);
1168 }
1169
1170
1171 IFX_INLINE void IfxPmsEvr_setUnderVoltageMonitoringMode(Ifx_PMS *pms, IfxPmsEvr_UnderVoltageMonitoring mode, IfxPmsEvr_SupplyMode supply)
1172 {
1173 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
1174 Ifx_PMS_MONCTRL tempMONCTRL;
1175 IfxScuWdt_clearSafetyEndinit(passwd);
1176 tempMONCTRL.U = pms->MONCTRL.U;
1177
1178 switch (supply)
1179 {
1180 case IfxPmsEvr_SupplyMode_evrc:
1181 tempMONCTRL.B.EVRCUVMOD = mode;
1182 break;
1183 case IfxPmsEvr_SupplyMode_evr33:
1184 tempMONCTRL.B.EVR33UVMOD = mode;
1185 break;
1186 case IfxPmsEvr_SupplyMode_swd:
1187 tempMONCTRL.B.SWDUVMOD = mode;
1188 break;
1189 case IfxPmsEvr_SupplyMode_evrpr:
1190 tempMONCTRL.B.PREUVMOD = mode;
1191 break;
1192 case IfxPmsEvr_SupplyMode_vddm:
1193 tempMONCTRL.B.VDDMUVMOD = mode;
1194 break;
1195 case IfxPmsEvr_SupplyMode_sb:
1196 tempMONCTRL.B.SBUVMOD = mode;
1197 break;
1198 }
1199
1200 pms->MONCTRL.U = tempMONCTRL.U;
1201
1202 IfxScuWdt_setSafetyEndinit(passwd);
1203 }
1204
1205
1206 IFX_INLINE void IfxPmsEvr_signedFineTrimEvrClock(Ifx_PMS *pms, sint8 trimValue)
1207 {
1208 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
1209
1210 IfxScuWdt_clearSafetyEndinit(passwd);
1211 pms->EVROSCCTRL.B.OSCFPTRIM = trimValue;
1212
1213 IfxScuWdt_setSafetyEndinit(passwd);
1214 }
1215
1216
1217 IFX_INLINE void IfxPmsEvr_swdResetTriggerSignalConfig(Ifx_PMS *pms, boolean enableReset)
1218 {
1219 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
1220
1221 IfxScuWdt_clearSafetyEndinit(passwd);
1222 pms->EVRRSTCON.B.BPRSTSWDOFF = 1;
1223 pms->EVRRSTCON.B.RSTSWDOFF = enableReset;
1224
1225 IfxScuWdt_setSafetyEndinit(passwd);
1226 }
1227
1228
1229 IFX_INLINE void IfxPmsEvr_wait(float32 waitInSec)
1230 {
1231 uint32 stmCount = (uint32)((float32)33000000UL * waitInSec);
1232 uint32 stmCountBegin = STM0_TIM0.U; /* it is necessary to get this value to have minimum 100uS delay in subsequent CPU start */
1233
1234 while ((uint32)(STM0_TIM0.U - stmCountBegin) < stmCount)
1235 {
1236 /* There is no need to check overflow of the STM timer.
1237 * When counter after overflow subtracted with counter before overflow,
1238 * the subtraction result will be as expected, as long as both are unsigned 32 bits
1239 * eg: stmCountBegin= 0xFFFFFFFE (before overflow)
1240 * stmCountNow = 0x00000002 (before overflow)
1241 * diff= stmCountNow - stmCountBegin = 4 as expected.*/
1242 }
1243 }
1244
1245
1246 #endif /* IFXPMSEVR_H */
IfxPmsEvr_PrimaryAdcTrimValue_18
Primary Adc Trim Value 18.
Definition: IfxPmsEvr.h:182
IfxPmsEvr_ExtSyncSwitchingFreqDivFactor_16
fDCDCSYNC = fDCDC/16. Duty cycle is constant at 50%.
Definition: IfxPmsEvr.h:144
IfxPmsEvr_SecondaryVoltageErrorCounter_level22
Error Counter Limit 22.
Definition: IfxPmsEvr.h:256
IfxPmsEvr_SupplyFilter_avgAdcConversionResult4
A moving mean average of consecutive 4 ADC results.
Definition: IfxPmsEvr.h:309
IfxPmsEvr_SecondaryVoltageErrorCounter_level40
Error Counter Limit 40.
Definition: IfxPmsEvr.h:274
IfxPmsEvr_PrimaryAdcTrimValue_29
Primary Adc Trim Value 29.
Definition: IfxPmsEvr.h:193
IfxPmsEvr_PrimaryAdcTrimValue_20
Primary Adc Trim Value 20.
Definition: IfxPmsEvr.h:184
IfxPmsEvr_SecondaryVoltageErrorCounter_level9
Error Counter Limit 9.
Definition: IfxPmsEvr.h:243
IfxPmsEvr_EnableInterrupt_uvsb
UVSB Interrupt enable.
Definition: IfxPmsEvr.h:107
IfxPmsEvr_areInitValuesRight
IFX_INLINE boolean IfxPmsEvr_areInitValuesRight(const IfxPmsEvr_checkRegConfig *const checkConfig)
Definition: IfxPmsEvr.h:735
IfxPmsEvr_PrimaryAdcTrimValue_58
Primary Adc Trim Value 58.
Definition: IfxPmsEvr.h:222
IfxPmsEvr_PrimaryAdcTrimValue_50
Primary Adc Trim Value 50.
Definition: IfxPmsEvr.h:214
IfxPmsEvr_SecondaryVoltageErrorCounter_level41
Error Counter Limit 41.
Definition: IfxPmsEvr.h:275
IfxPmsEvr_SupplyFilter_avgAdcConversionResult7
A moving mean average of consecutive 7 ADC results.
Definition: IfxPmsEvr.h:312
IfxPmsEvr_getAdcVextResult
IFX_INLINE float32 IfxPmsEvr_getAdcVextResult(float32 averageADCSWDV)
Definition: IfxPmsEvr.h:882
IfxPmsEvr_wait
IFX_INLINE void IfxPmsEvr_wait(float32 waitInSec)
Definition: IfxPmsEvr.h:1229
IfxPmsEvr_SupplyFilter_avgAdcConversionResult14
A moving mean average of consecutive 14 ADC results.
Definition: IfxPmsEvr.h:319
IfxPmsEvr_setSwitchingFreqDivFactorForExternalsync
IFX_INLINE void IfxPmsEvr_setSwitchingFreqDivFactorForExternalsync(Ifx_PMS *pms, IfxPmsEvr_ExtSyncSwitchingFreqDivFactor divider)
Set Switching frequency division factor for external synchronisation.
Definition: IfxPmsEvr.h:1161
IfxPmsEvr_EnableInterrupt_uvc
UVC Interrupt enable.
Definition: IfxPmsEvr.h:101
IfxPmsEvr_PrimaryAdcTrimValue_24
Primary Adc Trim Value 24.
Definition: IfxPmsEvr.h:188
IfxPmsEvr_EvrcMode_pwmMode
The step-down converter is in normal operational closed loop state.
Definition: IfxPmsEvr.h:127
IfxPmsEvr_StepDownRegulatorRegConfig::value
uint32 value
Register value to be updated.
Definition: IfxPmsEvr.h:354
IfxPmsEvr_ExtSyncSwitchingFreqDivFactor
IfxPmsEvr_ExtSyncSwitchingFreqDivFactor
Switching frequency division factor for external synchronisation defined in Ifx_PMS.EVRSDCTRL7.B.SYNCDIVFAC.
Definition: IfxPmsEvr.h:138
IfxPmsEvr_EnableInterrupt_uvddm
UVDDM Interrupt enable.
Definition: IfxPmsEvr.h:105
IfxPmsEvr_SupplyFilter_avgAdcConversionResult6
A moving mean average of consecutive 6 ADC results.
Definition: IfxPmsEvr.h:311
IfxPmsEvr_StepDownRegulatorRegConfig::mask
uint32 mask
Mask to select the bit fields to be updated.
Definition: IfxPmsEvr.h:355
IfxPmsEvr_SecondaryVoltageErrorCounter_level39
Error Counter Limit 39.
Definition: IfxPmsEvr.h:273
IfxPmsEvr_PrimaryAdcTrimValue_1
Primary Adc Trim Value 1.
Definition: IfxPmsEvr.h:165
IfxPmsEvr_setSdRegulatorOutputLevel
IFX_INLINE void IfxPmsEvr_setSdRegulatorOutputLevel(Ifx_PMS *pms, uint8 outputLevel)
SD Regulator Voltage Target selection.
Definition: IfxPmsEvr.h:1126
IfxPmsEvr_SecondaryVoltageErrorCounter_level29
Error Counter Limit 29.
Definition: IfxPmsEvr.h:263
IfxPmsEvr_cfgPhase3Default
IFX_EXTERN IFX_CONST IfxPmsEvr_StepDownRegulatorRegConfig IfxPmsEvr_cfgPhase3Default[]
Definition: IfxPmsEvr.h:721
IfxPmsEvr_EnableInterrupt_scrwdt
SCR WDT Interrupt enable.
Definition: IfxPmsEvr.h:120
IfxPmsEvr_PrimaryAdcTrimValue_43
Primary Adc Trim Value 43.
Definition: IfxPmsEvr.h:207
IfxPmsEvr_PrimaryAdcTrimValue_52
Primary Adc Trim Value 52.
Definition: IfxPmsEvr.h:216
IfxPmsEvr_runInitSequence
IFX_INLINE boolean IfxPmsEvr_runInitSequence(const IfxPmsEvr_initSequence *const sequence)
Definition: IfxPmsEvr.h:925
IfxPmsEvr_SupplyMode_sb
EVR Standby Supply or VEVRSB supply.
Definition: IfxPmsEvr.h:331
IfxPmsEvr_setStandbyRamSupply
IFX_INLINE void IfxPmsEvr_setStandbyRamSupply(Ifx_PMS *pms, uint8 ramBlock)
set DLMU RAM Block in Standby Mode
Definition: IfxPmsEvr.h:1149
IfxPmsEvr_EnableInterrupt_synclck
SD SYNCLCK Interrupt enable.
Definition: IfxPmsEvr.h:110
IfxPmsEvr_EnableInterrupt_esr0wkp
ESR0 WKP Interrupt enable.
Definition: IfxPmsEvr.h:113
IFXPMSEVR_ADC_VDD_LSB
#define IFXPMSEVR_ADC_VDD_LSB
Definition: IfxPmsEvr.h:78
IfxPmsEvr_PrimaryAdcTrimValue_42
Primary Adc Trim Value 42.
Definition: IfxPmsEvr.h:206
IfxPmsEvr_SupplyFilter
IfxPmsEvr_SupplyFilter
ADC result for the generating Alarm declare in Ifx_PMS.EVR.MONFILT.
Definition: IfxPmsEvr.h:302
IfxPmsEvr_SecondaryVoltageErrorCounter_level18
Error Counter Limit 18.
Definition: IfxPmsEvr.h:252
IfxPmsEvr_initSequencePhase::numOfRegisters
uint8 numOfRegisters
Definition: IfxPmsEvr.h:360
IfxPmsEvr_PrimaryAdcTrimValue_35
Primary Adc Trim Value 35.
Definition: IfxPmsEvr.h:199
IfxPms_cfg.h
PMS on-chip implementation data.
IfxPmsEvr_SecondaryVoltageErrorCounter_level37
Error Counter Limit 37.
Definition: IfxPmsEvr.h:271
IfxPmsEvr_UnderVoltageMonitoring_inactive
Under-Voltage Monitoring inactive.
Definition: IfxPmsEvr.h:339
IfxPmsEvr_PrimaryAdcTrimValue_26
Primary Adc Trim Value 26.
Definition: IfxPmsEvr.h:190
IfxPmsEvr_setEvr33PrimaryAdcTrimValue
IFX_INLINE void IfxPmsEvr_setEvr33PrimaryAdcTrimValue(Ifx_PMS *pms, IfxPmsEvr_PrimaryAdcTrimValue trimValue)
set 3.3 V Regulator Voltage Primary ADC Trim Value
Definition: IfxPmsEvr.h:987
IfxPmsEvr_SecondaryVoltageErrorCounter_level27
Error Counter Limit 27.
Definition: IfxPmsEvr.h:261
IfxPmsEvr_PrimaryAdcTrimValue_46
Primary Adc Trim Value 46.
Definition: IfxPmsEvr.h:210
IfxPmsEvr_SecondaryVoltageErrorCounter_level28
Error Counter Limit 28.
Definition: IfxPmsEvr.h:262
IfxPmsEvr_EvrcMode_lowPowerMode
The step-down converter is in low power state.
Definition: IfxPmsEvr.h:129
IfxPmsEvr_SupplyMode_swd
select external VEXT suppy watchdog
Definition: IfxPmsEvr.h:328
IfxPmsEvr_SecondaryVoltageErrorCounter_level30
Error Counter Limit 30.
Definition: IfxPmsEvr.h:264
IfxPmsEvr_StepDownRegulatorRegConfig::regAddr
volatile void * regAddr
Register Address to be updated.
Definition: IfxPmsEvr.h:353
IfxPmsEvr_SecondaryVoltageErrorCounter_level4
Error Counter Limit 4.
Definition: IfxPmsEvr.h:238
IfxPmsEvr_SupplyMode
IfxPmsEvr_SupplyMode
Controls the voltage supply Type.
Definition: IfxPmsEvr.h:324
IfxPmsEvr_PrimaryAdcTrimValue_25
Primary Adc Trim Value 25.
Definition: IfxPmsEvr.h:189
IfxPmsEvr_EnableInterrupt_ovsb
OVSB Interrupt enable.
Definition: IfxPmsEvr.h:106
IfxPmsEvr_PrimaryAdcTrimValue_34
Primary Adc Trim Value 34.
Definition: IfxPmsEvr.h:198
IfxPmsEvr_PrimaryAdcTrimValue_16
Primary Adc Trim Value 16.
Definition: IfxPmsEvr.h:180
IfxPmsEvr_enableInterrupts
IFX_INLINE void IfxPmsEvr_enableInterrupts(Ifx_PMS *pms, IfxPmsEvr_EnableInterrupt interruptType)
Enable Interrupts.
Definition: IfxPmsEvr.h:805
IfxPmsEvr_SecondaryVoltageErrorCounter_level11
Error Counter Limit 11.
Definition: IfxPmsEvr.h:245
IfxPmsEvr_SecondaryVoltageErrorCounter_level53
Error Counter Limit 53.
Definition: IfxPmsEvr.h:287
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxPmsEvr_SecondaryVoltageErrorCounter_level56
Error Counter Limit 56.
Definition: IfxPmsEvr.h:290
IfxPmsEvr_SecondaryVoltageErrorCounter_level5
Error Counter Limit 5.
Definition: IfxPmsEvr.h:239
IfxPmsEvr_setResetTrimValueMv
IFX_INLINE void IfxPmsEvr_setResetTrimValueMv(Ifx_PMS *pms, float32 resetTrimValue, IfxPmsEvr_SupplyMode supply)
set reset trim value for EVRC,EVR33 and external VEXT supply
Definition: IfxPmsEvr.h:1097
IfxPmsEvr_PrimaryAdcTrimValue_60
Primary Adc Trim Value 60.
Definition: IfxPmsEvr.h:224
IfxPmsEvr_PrimaryAdcTrimValue_12
Primary Adc Trim Value 12.
Definition: IfxPmsEvr.h:176
float32
float float32
Definition: Platform_Types.h:170
IfxPmsEvr_EnableInterrupt_swdlvl
SWDLVL Interrupt enable.
Definition: IfxPmsEvr.h:111
IfxPmsEvr_PrimaryAdcTrimValue_41
Primary Adc Trim Value 41.
Definition: IfxPmsEvr.h:205
IfxPmsEvr_SecondaryVoltageErrorCounter_level25
Error Counter Limit 25.
Definition: IfxPmsEvr.h:259
IfxPmsEvr_getPrimaryAdcEvrcResult
IFX_INLINE uint8 IfxPmsEvr_getPrimaryAdcEvrcResult(Ifx_PMS *pms)
get ADC 1.25 V Core Voltage Conversion Result
Definition: IfxPmsEvr.h:908
IfxPmsEvr_ExtSyncSwitchingFreqDivFactor_8
fDCDCSYNC = fDCDC/8. Duty cycle is constant at 50%.
Definition: IfxPmsEvr.h:143
IfxPmsEvr_SecondaryVoltageErrorCounter_level51
Error Counter Limit 51.
Definition: IfxPmsEvr.h:285
IfxPmsEvr_UnderVoltageMonitoring_highToLowVoltageTransition
Under-Voltage event is generated when threshold is crossed in higher to lower voltage transition...
Definition: IfxPmsEvr.h:341
IfxPmsEvr_initSequence
Definition: IfxPmsEvr.h:371
IfxPmsEvr_SecondaryVoltageErrorCounter_level13
Error Counter Limit 13.
Definition: IfxPmsEvr.h:247
IfxPmsEvr_PrimaryAdcTrimValue_6
Primary Adc Trim Value 6.
Definition: IfxPmsEvr.h:170
IfxCpu_Intrinsics.h
IFXPMSEVR_ADC_VDDP3_LSB
#define IFXPMSEVR_ADC_VDDP3_LSB
Definition: IfxPmsEvr.h:80
IFXPMSEVR_CTRL_UP_WAIT_TIMEOUTCOUNT
#define IFXPMSEVR_CTRL_UP_WAIT_TIMEOUTCOUNT
Definition: IfxPmsEvr.h:84
IfxPmsEvr_EnableInterrupt_screcc
SCR ECC Interrupt enable.
Definition: IfxPmsEvr.h:119
IfxPmsEvr_initSequencePhase
Definition: IfxPmsEvr.h:358
IfxPmsEvr_PrimaryAdcTrimValue_5
Primary Adc Trim Value 5.
Definition: IfxPmsEvr.h:169
IfxPmsEvr_setSecondaryUnderVoltageThresholdMv
IFX_EXTERN void IfxPmsEvr_setSecondaryUnderVoltageThresholdMv(Ifx_PMS *pms, float32 thresholdLevel, IfxPmsEvr_SupplyMode supply)
set Secondary under Voltage Threshold level
Definition: IfxPmsEvr.c:244
IfxPmsEvr_EnableInterrupt_scrrst
SCR RST Interrupt enable.
Definition: IfxPmsEvr.h:118
IfxPmsEvr_EnableInterrupt
IfxPmsEvr_EnableInterrupt
Configure respective interrupts define in register Ifx_PMS.PMSIEN.
Definition: IfxPmsEvr.h:94
IfxPmsEvr_SecondaryVoltageErrorCounter_level46
Error Counter Limit 46.
Definition: IfxPmsEvr.h:280
IfxPmsEvr_SupplyMode_evrpr
select EVRPR or VDDPD supply
Definition: IfxPmsEvr.h:329
IfxPmsEvr_EvrcMode_startupMode
The step-down converter is in start-up phase.
Definition: IfxPmsEvr.h:131
IfxPmsEvr_SecondaryVoltageErrorCounter_level42
Error Counter Limit 42.
Definition: IfxPmsEvr.h:276
IfxPmsEvr_SecondaryVoltageErrorCounter_level49
Error Counter Limit 49.
Definition: IfxPmsEvr.h:283
IfxPmsEvr_EnableInterrupt_uvswd
UVSWD Interrupt enable.
Definition: IfxPmsEvr.h:97
IfxScuWdt_setGlobalSafetyEndinitInline
IFX_INLINE void IfxScuWdt_setGlobalSafetyEndinitInline(uint16 password)
Set the Global safety Endinit password (Inline)
Definition: IfxScuWdt.h:679
IfxPmsEvr_SecondaryVoltageErrorCounter_level7
Error Counter Limit 7.
Definition: IfxPmsEvr.h:241
IfxPmsEvr_OverVoltageMonitoring_inactive
Over-Voltage Monitoring inactive.
Definition: IfxPmsEvr.h:153
IfxPmsEvr_SecondaryVoltageErrorCounter_level61
Error Counter Limit 61.
Definition: IfxPmsEvr.h:295
IfxPmsEvr_SecondaryVoltageErrorCounter_level44
Error Counter Limit 44.
Definition: IfxPmsEvr.h:278
IfxPmsEvr_getAdcVddp3Result
IFX_INLINE float32 IfxPmsEvr_getAdcVddp3Result(float32 averageADC33V)
Definition: IfxPmsEvr.h:874
IfxPmsEvr_PrimaryAdcTrimValue_44
Primary Adc Trim Value 44.
Definition: IfxPmsEvr.h:208
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxPmsEvr_PrimaryAdcTrimValue_54
Primary Adc Trim Value 54.
Definition: IfxPmsEvr.h:218
IfxPmsEvr_enableDcdcSynchronisation
IFX_INLINE void IfxPmsEvr_enableDcdcSynchronisation(Ifx_PMS *pms, boolean enabled)
This function enables the synchronisation output to synchronize the external SMPS regulator with resp...
Definition: IfxPmsEvr.h:793
IfxPmsEvr_PrimaryAdcTrimValue_13
Primary Adc Trim Value 13.
Definition: IfxPmsEvr.h:177
IfxPmsEvr_PrimaryAdcTrimValue_36
Primary Adc Trim Value 36.
Definition: IfxPmsEvr.h:200
IfxPmsEvr_EnableInterrupt_ovpre
OVPRE Interrupt enable.
Definition: IfxPmsEvr.h:102
IfxPmsEvr_SecondaryVoltageErrorCounter_level50
Error Counter Limit 50.
Definition: IfxPmsEvr.h:284
IfxPmsEvr_SecondaryVoltageErrorCounter_level21
Error Counter Limit 21.
Definition: IfxPmsEvr.h:255
IfxPmsEvr_SecondaryVoltageErrorCounter_level43
Error Counter Limit 43.
Definition: IfxPmsEvr.h:277
IfxPmsEvr_SecondaryVoltageErrorCounter
IfxPmsEvr_SecondaryVoltageErrorCounter
This Declare the Under and overvoltage counter defined in Ifx_PMS.EVR.MONFILT.B.ERRCNTLIMT.
Definition: IfxPmsEvr.h:232
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxPmsEvr_configureBlankingFilterDelay
IFX_INLINE void IfxPmsEvr_configureBlankingFilterDelay(Ifx_PMS *pms, uint8 delay)
Configure a Blanking Filter Delay.
Definition: IfxPmsEvr.h:769
IfxScuWdt_clearSafetyEndinit
void IfxScuWdt_clearSafetyEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:305
IfxPmsEvr_SecondaryVoltageErrorCounter_level63
Error Counter Limit 63.
Definition: IfxPmsEvr.h:297
IfxPmsEvr_PrimaryAdcTrimValue_7
Primary Adc Trim Value 7.
Definition: IfxPmsEvr.h:171
IfxPmsEvr_PrimaryAdcTrimValue_9
Primary Adc Trim Value 9.
Definition: IfxPmsEvr.h:173
IfxPmsEvr_SecondaryVoltageErrorCounter_level58
Error Counter Limit 58.
Definition: IfxPmsEvr.h:292
IfxPmsEvr_OverVoltageMonitoring_eitherDirectionVoltageTransition
Over-Voltage event is generated when threshold is crossed in either direction.
Definition: IfxPmsEvr.h:156
IfxPmsEvr_EnableInterrupt_uvpre
UVPRE Interrupt enable.
Definition: IfxPmsEvr.h:103
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxPmsEvr_PrimaryAdcTrimValue_17
Primary Adc Trim Value 17.
Definition: IfxPmsEvr.h:181
IfxPmsEvr_SupplyFilter_avgAdcConversionResult12
A moving mean average of consecutive 12 ADC results.
Definition: IfxPmsEvr.h:317
IfxPmsEvr_PrimaryAdcTrimValue_62
Primary Adc Trim Value 62.
Definition: IfxPmsEvr.h:226
IfxPmsEvr_PrimaryAdcTrimValue_49
Primary Adc Trim Value 49.
Definition: IfxPmsEvr.h:213
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxPmsEvr_StepDownRegulatorRegConfig
Definition: IfxPmsEvr.h:351
IfxPmsEvr_PrimaryAdcTrimValue_22
Primary Adc Trim Value 22.
Definition: IfxPmsEvr.h:186
IfxPmsEvr_PrimaryAdcTrimValue_30
Primary Adc Trim Value 30.
Definition: IfxPmsEvr.h:194
IfxPmsEvr_EnableInterrupt_pinbwkp
PINB WKP Interrupt enable.
Definition: IfxPmsEvr.h:116
IfxPmsEvr_SupplyFilter_avgAdcConversionResult13
A moving mean average of consecutive 13 ADC results.
Definition: IfxPmsEvr.h:318
IfxPmsEvr_SecondaryVoltageErrorCounter_level45
Error Counter Limit 45.
Definition: IfxPmsEvr.h:279
IfxPmsEvr_OverVoltageMonitoring_lowToHighVoltageTransition
Over-Voltage event is generated when threshold is crossed in lower to higher voltage transition...
Definition: IfxPmsEvr.h:154
IfxPmsEvr_SecondaryVoltageErrorCounter_level6
Error Counter Limit 6.
Definition: IfxPmsEvr.h:240
IfxPmsEvr_PrimaryAdcTrimValue_63
Primary Adc Trim Value 63.
Definition: IfxPmsEvr.h:227
IfxPmsEvr_OverVoltageMonitoring
IfxPmsEvr_OverVoltageMonitoring
Monitoring OverVoltage for all bitfields defined in .Ifx_PMS.EVR.MONCTRL register for overvoltage mon...
Definition: IfxPmsEvr.h:151
IfxPmsEvr_SupplyFilter_avgAdcConversionResult1
A moving mean average of consecutive 1 ADC results.
Definition: IfxPmsEvr.h:306
IfxPmsEvr_ExtSyncSwitchingFreqDivFactor_4
fDCDCSYNC = fDCDC/4. Duty cycle is constant at 50%.
Definition: IfxPmsEvr.h:142
IfxPmsEvr_PrimaryAdcTrimValue_19
Primary Adc Trim Value 19.
Definition: IfxPmsEvr.h:183
IfxPmsEvr_evr33ResetTriggerSignalConfig
IFX_INLINE void IfxPmsEvr_evr33ResetTriggerSignalConfig(Ifx_PMS *pms, boolean enableReset)
Enabled/Disable Reset Trigger signal for EVR33.
Definition: IfxPmsEvr.h:829
IfxPmsEvr_getPrimaryAdcSwdResult
IFX_INLINE uint8 IfxPmsEvr_getPrimaryAdcSwdResult(Ifx_PMS *pms)
get ADC External Supply Conversion Result
Definition: IfxPmsEvr.h:914
IfxPmsEvr_getEvrcVoltageRegulator
IFX_INLINE boolean IfxPmsEvr_getEvrcVoltageRegulator(Ifx_PMS *pms)
get EVRC Regulator Voltage status
Definition: IfxPmsEvr.h:896
IfxPmsEvr_SecondaryVoltageErrorCounter_level57
Error Counter Limit 57.
Definition: IfxPmsEvr.h:291
IfxPmsEvr_SupplyFilter_avgAdcConversionResult10
A moving mean average of consecutive 10 ADC results.
Definition: IfxPmsEvr.h:315
IfxPmsEvr_PrimaryAdcTrimValue_55
Primary Adc Trim Value 55.
Definition: IfxPmsEvr.h:219
IfxPmsEvr_EnableInterrupt_ov33
OV33Interrupt enable.
Definition: IfxPmsEvr.h:98
IfxPmsEvr_PrimaryAdcTrimValue_39
Primary Adc Trim Value 39.
Definition: IfxPmsEvr.h:203
IfxPmsEvr_cfgSequenceDefault
IFX_EXTERN IFX_CONST IfxPmsEvr_initSequence IfxPmsEvr_cfgSequenceDefault
Definition: IfxPmsEvr.h:725
IfxPmsEvr_SecondaryVoltageErrorCounter_level20
Error Counter Limit 20.
Definition: IfxPmsEvr.h:254
IfxPmsEvr_SupplyFilter_avgAdcConversionResult0
A moving mean average of consecutive 0 ADC results.
Definition: IfxPmsEvr.h:305
IfxPmsEvr_SecondaryVoltageErrorCounter_level34
Error Counter Limit 34.
Definition: IfxPmsEvr.h:268
IfxPmsEvr_SupplyFilter_avgAdcConversionResult5
A moving mean average of consecutive 5 ADC results.
Definition: IfxPmsEvr.h:310
IfxPmsEvr_PrimaryAdcTrimValue_37
Primary Adc Trim Value 37.
Definition: IfxPmsEvr.h:201
IfxPmsEvr_initSequence::numOfPhases
uint8 numOfPhases
Definition: IfxPmsEvr.h:373
IfxPmsEvr_getSecondaryAdcResult
IFX_EXTERN uint8 IfxPmsEvr_getSecondaryAdcResult(Ifx_PMS *pms, IfxPmsEvr_SupplyMode supply)
get secondray ADC result for respective Voltage supply
Definition: IfxPmsEvr.c:181
IfxPmsEvr_PrimaryAdcTrimValue_57
Primary Adc Trim Value 57.
Definition: IfxPmsEvr.h:221
IfxPmsEvr_PrimaryAdcTrimValue_14
Primary Adc Trim Value 14.
Definition: IfxPmsEvr.h:178
IfxPmsEvr_PrimaryAdcTrimValue_53
Primary Adc Trim Value 53.
Definition: IfxPmsEvr.h:217
IfxPmsEvr_setUnderVoltageMonitoringMode
IFX_INLINE void IfxPmsEvr_setUnderVoltageMonitoringMode(Ifx_PMS *pms, IfxPmsEvr_UnderVoltageMonitoring mode, IfxPmsEvr_SupplyMode supply)
set Under Voltage Monitoring mode
Definition: IfxPmsEvr.h:1171
IfxPmsEvr_SecondaryVoltageErrorCounter_level35
Error Counter Limit 35.
Definition: IfxPmsEvr.h:269
IfxPmsEvr_PrimaryAdcTrimValue_2
Primary Adc Trim Value 2.
Definition: IfxPmsEvr.h:166
IfxPmsEvr_SupplyFilter_avgAdcConversionResult8
A moving mean average of consecutive 8 ADC results.
Definition: IfxPmsEvr.h:313
IfxPmsEvr_cfgPhasesDefault
IFX_EXTERN IFX_CONST IfxPmsEvr_initSequencePhase IfxPmsEvr_cfgPhasesDefault[]
Definition: IfxPmsEvr.h:723
IfxPmsEvr_SecondaryVoltageErrorCounter_level52
Error Counter Limit 52.
Definition: IfxPmsEvr.h:286
IfxScuWdt_clearGlobalSafetyEndinitInline
IFX_INLINE void IfxScuWdt_clearGlobalSafetyEndinitInline(uint16 password)
Clear the Global safety Endinit password (Inline)
Definition: IfxScuWdt.h:571
IfxPmsEvr_PrimaryAdcTrimValue_28
Primary Adc Trim Value 28.
Definition: IfxPmsEvr.h:192
IfxPmsEvr_getPrimaryAdcEvr33Result
IFX_INLINE uint8 IfxPmsEvr_getPrimaryAdcEvr33Result(Ifx_PMS *pms)
get ADC 3.3 V Voltage Conversion Result
Definition: IfxPmsEvr.h:902
IfxPmsEvr_checkRegConfig
Definition: IfxPmsEvr.h:365
IfxPmsEvr_SecondaryVoltageErrorCounter_level36
Error Counter Limit 36.
Definition: IfxPmsEvr.h:270
IfxPmsEvr_PrimaryAdcTrimValue_21
Primary Adc Trim Value 21.
Definition: IfxPmsEvr.h:185
IfxPmsEvr_SecondaryVoltageErrorCounter_level2
Error Counter Limit 2.
Definition: IfxPmsEvr.h:236
IfxPmsEvr_PrimaryAdcTrimValue
IfxPmsEvr_PrimaryAdcTrimValue
set TRIM Value For respective Voltages. Defined in Ifx_PMS.EVR.TRIM and Ifx_PMS.EVR.TRIM2
Definition: IfxPmsEvr.h:162
IfxPmsEvr_EnableInterrupt_pinawkp
PINA WKP Interrupt enable.
Definition: IfxPmsEvr.h:115
IfxPmsEvr_initSequencePhase::regConfig
IFX_CONST IfxPmsEvr_StepDownRegulatorRegConfig * regConfig
Definition: IfxPmsEvr.h:361
IfxPmsEvr_SecondaryVoltageErrorCounter_level15
Error Counter Limit 15.
Definition: IfxPmsEvr.h:249
IfxPmsEvr_setPmosLevel
IFX_INLINE void IfxPmsEvr_setPmosLevel(Ifx_PMS *pms, boolean pmosLevel)
This configures the state of P ch. MOSFET driver during start-up and shut-down phases.
Definition: IfxPmsEvr.h:1071
IfxPmsEvr_SecondaryVoltageErrorCounter_level0
Error Counter Limit 0.
Definition: IfxPmsEvr.h:234
IfxCpu.h
CPU basic functionality.
IfxScuWdt_getGlobalSafetyEndinitPasswordInline
IFX_INLINE uint16 IfxScuWdt_getGlobalSafetyEndinitPasswordInline(void)
API to fetch current password of global safety endinit Watchdog module.
Definition: IfxScuWdt.h:624
IfxPmsEvr_SecondaryVoltageErrorCounter_level12
Error Counter Limit 12.
Definition: IfxPmsEvr.h:246
IfxPmsEvr_PrimaryAdcTrimValue_45
Primary Adc Trim Value 45.
Definition: IfxPmsEvr.h:209
IfxPmsEvr_SecondaryVoltageErrorCounter_level38
Error Counter Limit 38.
Definition: IfxPmsEvr.h:272
IfxPmsEvr_SecondaryVoltageErrorCounter_level32
Error Counter Limit 32.
Definition: IfxPmsEvr.h:266
IfxPmsEvr_PrimaryAdcTrimValue_59
Primary Adc Trim Value 59.
Definition: IfxPmsEvr.h:223
IfxPmsEvr_PrimaryAdcTrimValue_15
Primary Adc Trim Value 15.
Definition: IfxPmsEvr.h:179
IfxPmsEvr_EvrcMode_disableMode
EVRC is Disable.
Definition: IfxPmsEvr.h:133
IfxPmsEvr_SupplyFilter_avgAdcConversionResult11
A moving mean average of consecutive 11 ADC results.
Definition: IfxPmsEvr.h:316
IfxPmsEvr_PrimaryAdcTrimValue_47
Primary Adc Trim Value 47.
Definition: IfxPmsEvr.h:211
IfxPmsEvr_SupplyFilter_avgAdcConversionResult9
A moving mean average of consecutive 9 ADC results.
Definition: IfxPmsEvr.h:314
IfxPmsEvr_SupplyMode_evrc
select EVRC regulator or VDD Supply
Definition: IfxPmsEvr.h:326
IfxPmsEvr_SecondaryVoltageErrorCounter_level60
Error Counter Limit 60.
Definition: IfxPmsEvr.h:294
IfxPmsEvr_EnableInterrupt_esr1wkp
ESR1 WKP Interrupt enable.
Definition: IfxPmsEvr.h:114
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxPmsEvr_PrimaryAdcTrimValue_23
Primary Adc Trim Value 23.
Definition: IfxPmsEvr.h:187
IfxPmsEvr_swdResetTriggerSignalConfig
IFX_INLINE void IfxPmsEvr_swdResetTriggerSignalConfig(Ifx_PMS *pms, boolean enableReset)
Enabled/Disable Reset Trigger signal for SWD.
Definition: IfxPmsEvr.h:1217
IFXPMSEVR_ADC_VEXT_LSB
#define IFXPMSEVR_ADC_VEXT_LSB
Definition: IfxPmsEvr.h:82
IfxScuWdt_setSafetyEndinit
void IfxScuWdt_setSafetyEndinit(uint16 password)
SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:668
IfxPmsEvr_setOverVoltageMonitoringMode
IFX_INLINE void IfxPmsEvr_setOverVoltageMonitoringMode(Ifx_PMS *pms, IfxPmsEvr_OverVoltageMonitoring mode, IfxPmsEvr_SupplyMode supply)
set Over Voltage Monitoring Mode
Definition: IfxPmsEvr.h:1035
IfxPmsEvr_UnderVoltageMonitoring
IfxPmsEvr_UnderVoltageMonitoring
Monitoring underVoltage for all bitfields defined in Ifx_PMS.EVR.MONCTRL register for undervoltage mo...
Definition: IfxPmsEvr.h:337
IfxPmsEvr_ExtSyncSwitchingFreqDivFactor_32
fDCDCSYNC = fDCDC/32. Duty cycle is constant at 50%.
Definition: IfxPmsEvr.h:145
IfxScuWdt_getSafetyWatchdogPassword
uint16 IfxScuWdt_getSafetyWatchdogPassword(void)
SCUWDT API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.c:393
IfxPmsEvr_SecondaryVoltageErrorCounter_level62
Error Counter Limit 62.
Definition: IfxPmsEvr.h:296
IfxPmsEvr_PrimaryAdcTrimValue_61
Primary Adc Trim Value 61.
Definition: IfxPmsEvr.h:225
IfxPmsEvr_EvrcMode
IfxPmsEvr_EvrcMode
Current operation mode of EVRC Regulator defined in Ifx_PMS.EVR.STAT.B.EVRCMOD.
Definition: IfxPmsEvr.h:125
IfxPmsEvr_OverVoltageMonitoring_highToLowVoltageTransition
Over-Voltage event is generated when threshold is crossed in higher to lower voltage transition...
Definition: IfxPmsEvr.h:155
IfxPmsEvr_PrimaryAdcTrimValue_56
Primary Adc Trim Value 56.
Definition: IfxPmsEvr.h:220
IfxPmsEvr_EnableInterrupt_scrint
SCR INT Interrupt enable.
Definition: IfxPmsEvr.h:117
IfxPmsEvr_SecondaryVoltageErrorCounter_level26
Error Counter Limit 26.
Definition: IfxPmsEvr.h:260
IfxPmsEvr_SecondaryVoltageErrorCounter_level31
Error Counter Limit 31.
Definition: IfxPmsEvr.h:265
IfxPmsEvr_initSequencePhase::waitInSecs
float32 waitInSecs
Definition: IfxPmsEvr.h:362
IfxPmsEvr_SupplyFilter_avgAdcConversionResult2
A moving mean average of consecutive 2 ADC results.
Definition: IfxPmsEvr.h:307
IfxPmsEvr_PrimaryAdcTrimValue_38
Primary Adc Trim Value 38.
Definition: IfxPmsEvr.h:202
sint32
long sint32
Definition: Platform_Types.h:134
IfxPmsEvr_getEvrcMode
IFX_INLINE IfxPmsEvr_EvrcMode IfxPmsEvr_getEvrcMode(Ifx_PMS *pms)
get current operating mode of EVRC
Definition: IfxPmsEvr.h:890
IfxPmsEvr_PrimaryAdcTrimValue_48
Primary Adc Trim Value 48.
Definition: IfxPmsEvr.h:212
IfxPmsEvr_initSequence::phaseConfig
IFX_CONST IfxPmsEvr_initSequencePhase * phaseConfig
Definition: IfxPmsEvr.h:374
IfxPmsEvr_checkRegCfgDefault
IFX_EXTERN IFX_CONST IfxPmsEvr_checkRegConfig IfxPmsEvr_checkRegCfgDefault
Definition: IfxPmsEvr.h:727
IfxPmsEvr_ExtSyncSwitchingFreqDivFactor_2
fDCDCSYNC = fDCDC/2. Duty cycle is constant at 50%.
Definition: IfxPmsEvr.h:141
IfxPmsEvr_fineTrimEvrClock
IFX_INLINE void IfxPmsEvr_fineTrimEvrClock(Ifx_PMS *pms, uint8 trimValue)
OSC Fine Trim 100MHz Clock.
Definition: IfxPmsEvr.h:854
IfxPmsEvr_EnableInterrupt_sdvok
SDVOK Interrupt enable.
Definition: IfxPmsEvr.h:109
IfxPmsEvr_SecondaryVoltageErrorCounter_level47
Error Counter Limit 47.
Definition: IfxPmsEvr.h:281
IfxPmsEvr_EnableInterrupt_wutwkp
WUT WKP Interrupt enable.
Definition: IfxPmsEvr.h:112
IfxPmsEvr_EnableInterrupt_ovc
OVC Interrupt enable.
Definition: IfxPmsEvr.h:100
IfxPmsEvr_SecondaryVoltageErrorCounter_level23
Error Counter Limit 23.
Definition: IfxPmsEvr.h:257
IfxPmsEvr_getAdcVddResult
IFX_INLINE float32 IfxPmsEvr_getAdcVddResult(float32 averageADCC)
Definition: IfxPmsEvr.h:866
IfxPmsEvr_setRegulatorSwitchingFrequency
IFX_INLINE void IfxPmsEvr_setRegulatorSwitchingFrequency(Ifx_PMS *pms, uint16 samplingFactor)
set regulator switching frequency in Hz....(100MHz/samplingFactor)
Definition: IfxPmsEvr.h:1084
IfxPmsEvr_UnderVoltageMonitoring_eitherDirectionVoltageTransition
Under-Voltage event is generated when threshold is crossed in either direction.
Definition: IfxPmsEvr.h:342
IfxPmsEvr_SupplyFilter_avgAdcConversionResult3
A moving mean average of consecutive 3 ADC results.
Definition: IfxPmsEvr.h:308
IfxPmsEvr_SecondaryVoltageErrorCounter_level59
Error Counter Limit 59.
Definition: IfxPmsEvr.h:293
IfxPmsEvr_setEvr33VoltageOutputlevel
IFX_INLINE void IfxPmsEvr_setEvr33VoltageOutputlevel(Ifx_PMS *pms, uint8 outputLevel)
The VDDP3 output level of the EVR33 LDO regulator.
Definition: IfxPmsEvr.h:998
IfxPmsEvr_EnableInterrupt_evrcmod
EVRCMOD Interrupt enable.
Definition: IfxPmsEvr.h:108
IfxPmsEvr_ExtSyncSwitchingFreqDivFactor_1
fDCDCSYNC = fDCDC. The actual duty cycle is routed.
Definition: IfxPmsEvr.h:140
IfxPmsEvr_filterSecondaryConversionResult
IFX_EXTERN void IfxPmsEvr_filterSecondaryConversionResult(Ifx_PMS *pms, IfxPmsEvr_SupplyFilter adcFilterValue, IfxPmsEvr_SupplyMode supply)
filter the each conversion result or avarage of consecutive adc result to compare with threshold ...
Definition: IfxPmsEvr.c:145
IfxPmsEvr_SecondaryVoltageErrorCounter_level55
Error Counter Limit 55.
Definition: IfxPmsEvr.h:289
IfxPmsEvr_PrimaryAdcTrimValue_32
Primary Adc Trim Value 32.
Definition: IfxPmsEvr.h:196
IfxPmsEvr_SupplyFilter_eachConversionResult
Each conversion result is compared with threshold to generate alarm.
Definition: IfxPmsEvr.h:304
IfxPmsEvr_setNmosLevel
IFX_INLINE void IfxPmsEvr_setNmosLevel(Ifx_PMS *pms, boolean nmosLevel)
This configures the state of N ch. MOSFET driver during start-up and shut-down phases.
Definition: IfxPmsEvr.h:1022
IfxPmsEvr_EnableInterrupt_uv33
UV33 Interrupt enable.
Definition: IfxPmsEvr.h:99
IfxPmsEvr_setFrequencySpreadThreshold
IFX_INLINE void IfxPmsEvr_setFrequencySpreadThreshold(Ifx_PMS *pms, uint16 thresholdLevel)
set frequency spread threshold
Definition: IfxPmsEvr.h:1010
IfxPmsEvr_SecondaryVoltageErrorCounter_level19
Error Counter Limit 19.
Definition: IfxPmsEvr.h:253
IfxPmsEvr_setSdRegulatorPrimaryAdcTrimValue
IFX_INLINE void IfxPmsEvr_setSdRegulatorPrimaryAdcTrimValue(Ifx_PMS *pms, IfxPmsEvr_PrimaryAdcTrimValue trimValue)
SD Regulator Voltage Trim Value.
Definition: IfxPmsEvr.h:1138
IfxPmsEvr_PrimaryAdcTrimValue_4
Primary Adc Trim Value 4.
Definition: IfxPmsEvr.h:168
IfxPmsEvr_evrcResetTriggerSignalConfig
IFX_INLINE void IfxPmsEvr_evrcResetTriggerSignalConfig(Ifx_PMS *pms, boolean enableReset)
Enabled/Disable Reset Trigger signal for EVRC.
Definition: IfxPmsEvr.h:841
IfxPmsEvr_SecondaryVoltageErrorCounter_level24
Error Counter Limit 24.
Definition: IfxPmsEvr.h:258
IfxPmsEvr_PrimaryAdcTrimValue_10
Primary Adc Trim Value 10.
Definition: IfxPmsEvr.h:174
IfxPmsEvr_signedFineTrimEvrClock
IFX_INLINE void IfxPmsEvr_signedFineTrimEvrClock(Ifx_PMS *pms, sint8 trimValue)
OSC Fine Trim 100MHz Clock.
Definition: IfxPmsEvr.h:1206
IfxPmsEvr_SecondaryVoltageErrorCounter_level8
Error Counter Limit 8.
Definition: IfxPmsEvr.h:242
IfxPmsEvr_PrimaryAdcTrimValue_33
Primary Adc Trim Value 33.
Definition: IfxPmsEvr.h:197
IfxPmsEvr_PrimaryAdcTrimValue_8
Primary Adc Trim Value 8.
Definition: IfxPmsEvr.h:172
IfxPmsEvr_SecondaryVoltageErrorCounter_level14
Error Counter Limit 14.
Definition: IfxPmsEvr.h:248
IfxPmsEvr_PrimaryAdcTrimValue_11
Primary Adc Trim Value 11.
Definition: IfxPmsEvr.h:175
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxPmsEvr_PrimaryAdcTrimValue_3
Primary Adc Trim Value 3.
Definition: IfxPmsEvr.h:167
IfxPmsEvr_SecondaryVoltageErrorCounter_level48
Error Counter Limit 48.
Definition: IfxPmsEvr.h:282
IfxPmsEvr_setSecondaryOverVoltageThresholdMv
IFX_EXTERN void IfxPmsEvr_setSecondaryOverVoltageThresholdMv(Ifx_PMS *pms, float32 thresholdLevel, IfxPmsEvr_SupplyMode supply)
set Secondary Over Voltage Threshold level
Definition: IfxPmsEvr.c:205
IfxPmsEvr_cfgPhase2Default
IFX_EXTERN IFX_CONST IfxPmsEvr_StepDownRegulatorRegConfig IfxPmsEvr_cfgPhase2Default[]
Definition: IfxPmsEvr.h:717
IfxPmsEvr_cfgPhase1Default
IFX_EXTERN IFX_CONST IfxPmsEvr_StepDownRegulatorRegConfig IfxPmsEvr_cfgPhase1Default[]
Definition: IfxPmsEvr.h:715
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxPmsEvr_enableWakeupOnVextSupplyRampUp
IFX_INLINE void IfxPmsEvr_enableWakeupOnVextSupplyRampUp(Ifx_PMS *pms, boolean enabled)
enables wakeup on VEXT supply ramp-up after blanking filter time has expired
Definition: IfxPmsEvr.h:817
IfxPmsEvr_PrimaryAdcTrimValue_51
Primary Adc Trim Value 51.
Definition: IfxPmsEvr.h:215
IfxPmsEvr_disableInterrupt
IFX_INLINE void IfxPmsEvr_disableInterrupt(Ifx_PMS *pms, IfxPmsEvr_EnableInterrupt interruptType)
Disable Interrupts.
Definition: IfxPmsEvr.h:781
sint8
signed char sint8
Definition: Platform_Types.h:125
IfxPmsEvr_SecondaryVoltageErrorCounter_level1
Error Counter Limit 1.
Definition: IfxPmsEvr.h:235
IfxPmsEvr_EnableInterrupt_ovswd
OVSWD Interrupt enable.
Definition: IfxPmsEvr.h:96
IfxPmsEvr_checkRegValuesDefault
IFX_EXTERN IFX_CONST IfxPmsEvr_StepDownRegulatorRegConfig IfxPmsEvr_checkRegValuesDefault[]
Definition: IfxPmsEvr.h:729
IfxPmsEvr_UnderVoltageMonitoring_lowToHighVoltageTransition
under-Voltage event is generated when threshold is crossed in lower to higher voltage transition ...
Definition: IfxPmsEvr.h:340
IfxPmsEvr_PrimaryAdcTrimValue_40
Primary Adc Trim Value 40.
Definition: IfxPmsEvr.h:204
IfxPmsEvr_SupplyMode_vddm
VDDM ADC Supply.
Definition: IfxPmsEvr.h:330
IfxPmsEvr_SecondaryVoltageErrorCounter_level10
Error Counter Limit 10.
Definition: IfxPmsEvr.h:244
IfxPmsEvr_PrimaryAdcTrimValue_31
Primary Adc Trim Value 31.
Definition: IfxPmsEvr.h:195
IfxPmsEvr_PrimaryAdcTrimValue_0
Primary Adc Trim Value 0.
Definition: IfxPmsEvr.h:164
IfxPmsEvr_SecondaryVoltageErrorCounter_level16
Error Counter Limit 16.
Definition: IfxPmsEvr.h:250
IfxPmsEvr_PrimaryAdcTrimValue_27
Primary Adc Trim Value 27.
Definition: IfxPmsEvr.h:191
IfxPmsEvr_SecondaryVoltageErrorCounter_level3
Error Counter Limit 3.
Definition: IfxPmsEvr.h:237
IfxPmsEvr_EnableInterrupt_ovddm
OVDDM Interrupt enable.
Definition: IfxPmsEvr.h:104
IfxPmsEvr_SecondaryVoltageErrorCounter_level33
Error Counter Limit 33.
Definition: IfxPmsEvr.h:267
IfxPmsEvr_SecondaryVoltageErrorCounter_level17
Error Counter Limit 17.
Definition: IfxPmsEvr.h:251
IfxPmsEvr_SupplyMode_evr33
select EVR33 regulator or VDDP3 Supply
Definition: IfxPmsEvr.h:327
IfxPmsEvr_SecondaryVoltageErrorCounter_level54
Error Counter Limit 54.
Definition: IfxPmsEvr.h:288


iLLD_TC38A: IfxPmsPm.c Source File

  • Pms
  • Std
IfxPmsPm.c
Go to the documentation of this file.
1 /**
2 * \file IfxPmsPm.c
3 * \brief PMS basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxPmsPm.h"
47
48 /******************************************************************************/
49 /*-------------------------Function Implementations---------------------------*/
50 /******************************************************************************/
51
52 void IfxPmsPm_setStandbyMode(Ifx_PMS *pms, IfxPmsPm_WakeupConfig *config, IfxPmsPm_RequestPowerMode powerMode)
53 {
54 uint8 alarmGroup = 8;
55 uint32 alarmMask = 0x1DU;
56 uint8 smuTrapEnable;
57 uint32 wait_cycles = 0;
58 uint16 cpuWdtPw = IfxScuWdt_getCpuWatchdogPassword();
59 uint16 safetyWdtPw = IfxScuWdt_getSafetyWatchdogPassword();
60 {
61 /* Disable TRAP for SMU (oscillator watchdog and unlock detection) */
62 IfxScuWdt_clearCpuEndinit(cpuWdtPw);
63 smuTrapEnable = SCU_TRAPDIS0.B.CPU0SMUT;
64 SCU_TRAPDIS0.B.CPU0SMUT = 1U;
65 IfxScuWdt_setCpuEndinit(cpuWdtPw);
66 }
67
68 /* Select fback (fosc-evr) as CCU input clock */
69 IfxScuWdt_clearSafetyEndinit(safetyWdtPw);
70 /* Disable SMU Alarms */
71 {
72 /* Enable access to SMU registers */
73 SMU_KEYS.U = (uint32)0x000000bc;
74 /*Clear all SMU alarms for PLL and OSC*/
75 MODULE_SMU.AGCF[alarmGroup][0].U = (MODULE_SMU.AGCF[alarmGroup][0].U & ~alarmMask);
76 MODULE_SMU.AGCF[alarmGroup][1].U = (MODULE_SMU.AGCF[alarmGroup][1].U & ~alarmMask);
77 MODULE_SMU.AGCF[alarmGroup][2].U = (MODULE_SMU.AGCF[alarmGroup][2].U & ~alarmMask);
78
79 /* Clear the keys to avoid any further update to SMU registers */
80 SMU_KEYS.U = (uint32)0U;
81 }
82 /* Select fback (fosc-evr) as CCU input clock */
83 SCU_CCUCON0.B.CLKSEL = IfxScu_CCUCON0_CLKSEL_fBack;
84
85 /* Update for all CCUCONx registers*/
86 SCU_CCUCON0.B.UP = 1U;
87
88 /* Providing delay between Clock source switch to Backup and PLL power down*/
89 for (wait_cycles = 0; wait_cycles < IFXPMS_WAIT_CYCLES; wait_cycles++)
90 {
91 __nop();
92 }
93
94 /* PLL block is put into the Power Saving Mode */
95 SCU_SYSPLLCON0.B.PLLPWD = 0U;
96 SCU_PERPLLCON0.B.PLLPWD = 0U;
97
98 /* Disable Oscillator*/
99 SCU_OSCCON.B.MODE = 3U;
100
101 /* Configure IRADIS bit to disable Idle Request Acknowledge sequence
102 * activation for fast Standby Mode entry. This ensures that standby request
103 * is not blocked by pending request or sequence*/
104
105 SCU_PMSWCR1.B.IRADIS = 1U;
106
107 /* Configure Standby entry through REQSLP bit setting only */
108 SCU_PMSWCR1.B.STBYEVEN = 1U;
109 SCU_PMSWCR1.B.STBYEV = 0U;
110
111 /* Set all pads to tristate and enable Standby RAM */
112
113 pms->PMSWCR5.B.BPTRISTREQ = 1;
114 pms->PMSWCR5.B.TRISTREQ = 0;
115 pms->PMSWCR0.B.STBYRAMSEL = config->standbyRam;
116
117 IfxPmsPm_enableWakeup(pms, config);
118
119 IfxScuWdt_setSafetyEndinit(safetyWdtPw);
120
121 {
122 /* Enable VCO unlock Trap if it was disabled before */
123 IfxScuWdt_clearCpuEndinit(cpuWdtPw);
124 SCU_TRAPCLR.B.SMUT = 1U;
125 SCU_TRAPDIS0.B.CPU0SMUT = smuTrapEnable;
126 IfxScuWdt_setCpuEndinit(cpuWdtPw);
127 }
128
129 uint8 index = IfxCpu_getCoreIndex();
130 IfxScuWdt_clearCpuEndinit(cpuWdtPw);
131
132 switch (index)
133 {
134 case 0:
135 MODULE_SCU.PMCSR0.B.REQSLP = powerMode;
136 break;
137 case 1:
138 MODULE_SCU.PMCSR1.B.REQSLP = powerMode;
139 break;
140 case 2:
141 MODULE_SCU.PMCSR2.B.REQSLP = powerMode;
142 break;
143 case 3:
144 MODULE_SCU.PMCSR3.B.REQSLP = powerMode;
145 break;
146 }
147
148 IfxScuWdt_setCpuEndinit(cpuWdtPw);
149 }
150
151
152 boolean IfxPmsPm_setCoreMode(IfxCpu_ResourceCpu cpuIndex, IfxCpu_CoreMode mode)
153 {
154 uint8 reqSleep = (uint8)-1;
155 boolean retValue;
156 Ifx_CPU *cpu;
157
158 uint8 pmcIndex = cpuIndex;
159
160 /*Modes such as HALT and STBY are not handled at CPU level */
161 retValue = ((mode == IfxCpu_CoreMode_halt) || (mode == IfxCpu_CoreMode_stby)) ? FALSE : TRUE;
162
163 switch (mode)
164 {
165 case IfxCpu_CoreMode_idle:
166 reqSleep = IfxScu_PMCSR_REQSLP_Idle;
167 break;
168 case IfxCpu_CoreMode_run:
169 reqSleep = IfxScu_PMCSR_REQSLP_Run;
170 break;
171 case IfxCpu_CoreMode_sleep:
172 reqSleep = IfxScu_PMCSR_REQSLP_Sleep;
173 break;
174 default:
175 return 0;
176 }
177
178 if (retValue == TRUE)
179 {
180 /*Check if the same core is requesting to change the core run mode */
181 if (IfxCpu_getCoreIndex() != cpuIndex)
182 { /*Request is for the other core */
183 /*To access PMCSR of other CPUs handle the safety EndInit protection */
184 uint16 safetyWdtPw = IfxScuWdt_getSafetyWatchdogPassword();
185 IfxScuWdt_clearSafetyEndinit(safetyWdtPw);
186
187 switch (pmcIndex)
188 {
189 case 0:
190 MODULE_SCU.PMCSR0.B.REQSLP = reqSleep;
191 break;
192 case 1:
193 MODULE_SCU.PMCSR1.B.REQSLP = reqSleep;
194 break;
195 case 2:
196 MODULE_SCU.PMCSR2.B.REQSLP = reqSleep;
197 break;
198 case 3:
199 MODULE_SCU.PMCSR3.B.REQSLP = reqSleep;
200 break;
201 }
202
203 IfxScuWdt_setSafetyEndinit(safetyWdtPw);
204 cpu = IfxCpu_getAddress(cpuIndex);
205 cpu->DBGSR.B.HALT = 2; /*reset the HALT bit, if it is already done it is no harm in writing again */
206 }
207 else
208 { /*Request is for self, this request normally only for halt, otherwise the core is already running anyway! */
209 /*To access PMCSR of self handle the cpu EndInit protection */
210 uint16 cpuWdtPw = IfxScuWdt_getCpuWatchdogPassword();
211 IfxScuWdt_clearCpuEndinit(cpuWdtPw);
212
213 switch (pmcIndex)
214 {
215 case 0:
216 MODULE_SCU.PMCSR0.B.REQSLP = reqSleep;
217 break;
218 case 1:
219 MODULE_SCU.PMCSR1.B.REQSLP = reqSleep;
220 break;
221 case 2:
222 MODULE_SCU.PMCSR2.B.REQSLP = reqSleep;
223 break;
224 case 3:
225 MODULE_SCU.PMCSR3.B.REQSLP = reqSleep;
226 break;
227 }
228
229 IfxScuWdt_setCpuEndinit(cpuWdtPw);
230 }
231 }
232
233 return retValue;
234 }
235
236
237 void IfxPmsPm_enableWakeup(Ifx_PMS *pms, IfxPmsPm_WakeupConfig *wakeup)
238 {
239 Ifx_PMS_PMSWCR0 tempPMSW;
240
241 switch (wakeup->wakeup)
242 {
243 case IfxPmsPm_WakeupOn_esr0:
244 tempPMSW.U = pms->PMSWCR0.U;
245 tempPMSW.B.PORSTWKEN = 0;
246 tempPMSW.B.ESR0WKEN = 1;
247 tempPMSW.B.ESR0DFEN = wakeup->filter;
248 tempPMSW.B.ESR0EDCON = wakeup->trigger;
249 pms->PMSWCR0.U = tempPMSW.U;
250 break;
251 case IfxPmsPm_WakeupOn_esr1:
252 tempPMSW.U = pms->PMSWCR0.U;
253 tempPMSW.B.PORSTWKEN = 0;
254 tempPMSW.B.ESR1WKEN = 1;
255 tempPMSW.B.ESR1DFEN = wakeup->filter;
256 tempPMSW.B.ESR1EDCON = wakeup->trigger;
257 pms->PMSWCR0.U = tempPMSW.U;
258 break;
259 case IfxPmsPm_WakeupOn_pinA:
260 tempPMSW.U = pms->PMSWCR0.U;
261 tempPMSW.B.PORSTWKEN = 0;
262 tempPMSW.B.PINAWKEN = 1;
263 tempPMSW.B.PINADFEN = wakeup->filter;
264 tempPMSW.B.PINAEDCON = wakeup->trigger;
265 pms->PMSWCR0.U = tempPMSW.U;
266 break;
267 case IfxPmsPm_WakeupOn_pinB:
268 tempPMSW.U = pms->PMSWCR0.U;
269 tempPMSW.B.PORSTWKEN = 0;
270 tempPMSW.B.PINBWKEN = 1;
271 tempPMSW.B.PINBDFEN = wakeup->filter;
272 tempPMSW.B.PINBEDCON = wakeup->trigger;
273 pms->PMSWCR0.U = tempPMSW.U;
274 break;
275 case IfxPmsPm_WakeupOn_timer:
276 tempPMSW.U = pms->PMSWCR0.U;
277 tempPMSW.B.WUTWKEN = 1;
278 pms->PMSWCR0.U = tempPMSW.U;
279 pms->PMSWCR3.U |= ((wakeup->mode << 30) | (1 << 27) | (wakeup->reloadCounter));
280 break;
281 case IfxPmsPm_WakeupOn_porst:
282 tempPMSW.U = pms->PMSWCR0.U;
283 tempPMSW.B.PORSTWKEN = 1;
284 pms->PMSWCR0.U = tempPMSW.U;
285 break;
286 case IfxPmsPm_WakeupOn_scr:
287 tempPMSW.U = pms->PMSWCR0.U;
288 tempPMSW.B.SCRWKEN = 1;
289 tempPMSW.B.PORSTWKEN = 0;
290 pms->PMSWCR0.U = tempPMSW.U;
291 break;
292 case IfxPmsPm_WakeupOn_power:
293 tempPMSW.U = pms->PMSWCR0.U;
294 tempPMSW.B.PWRWKEN = 1;
295 pms->PMSWCR0.U = tempPMSW.U;
296 break;
297 default:
298 tempPMSW.U = pms->PMSWCR0.U;
299 tempPMSW.B.PORSTWKEN = 1;
300 pms->PMSWCR0.U = tempPMSW.U;
301 break;
302 }
303 }
304
305
306 void IfxPmsPm_configureSupplyMonitoring(Ifx_PMS *pms, IfxPmsPm_VoltageSource source, IfxPmsPm_ThresholdEvent event, IfxPmsPm_RampingMode mode)
307 {
308 uint16 safetyWdtPw = IfxScuWdt_getSafetyWatchdogPassword();
309 IfxScuWdt_clearSafetyEndinit(safetyWdtPw);
310 uint32 mask = 0x3 << (source + event);
311 pms->MONCTRL.U = (pms->MONCTRL.U & ~mask) | ((mode & 0x3) << (source + event)); //ramp & 0x3 added to ensure that even if a value>3 is passed as an argument and compiler doesn't catch it, other bits aren't screwed up.
312 IfxScuWdt_setSafetyEndinit(safetyWdtPw);
313 }
314
315
316 void IfxPmsPm_initStandbyConfig(IfxPmsPm_StandbyConfig *standbyConfig)
317 {
318 standbyConfig->trigger = IfxPmsPm_StandbyTriggerMode_hardware_undervoltage;
319 standbyConfig->standbyRamBlock = IfxPmsPm_StandbyRamSupply_cpu0Cpu1;
320 standbyConfig->enableScr = TRUE;
321 standbyConfig->minDelayBeforeWakeUp = IfxPmsPm_BlankingFilterDelay_5ms;
322 standbyConfig->vextUnderVoltageThresholdLevel = 0x0;
323 standbyConfig->vddUnderVoltageThresholdLevel = 0x0;
324
325 standbyConfig->enableStandbyOnVextRampDown = FALSE;
326 standbyConfig->enableStandbyOnVddRampDown = FALSE;
327 standbyConfig->scrClockSupply = IfxPmsPm_ScrClocking_100mhzOptional;
328 standbyConfig->esr0PinStateRequest = IfxPmsPm_Esr0PinStateRequest_tristate;
329 standbyConfig->padStateRequest = IfxPmsPm_PadStateRequest_tristate;
330 standbyConfig->enableWakeupOnEsr0 = FALSE;
331 standbyConfig->enableWakeupOnEsr1 = FALSE;
332 standbyConfig->enableWakeupOnPinA = FALSE;
333 standbyConfig->enableWakeupOnPinB = FALSE;
334 standbyConfig->enableWakeupOnPorst = TRUE;
335 standbyConfig->enableWakeupOnScr = FALSE;
336 standbyConfig->enableWakeupOnPower = FALSE;
337 standbyConfig->enableWakeupOnTimer = FALSE;
338 standbyConfig->wutClock = IfxPmsPm_WutClock_70kHz;
339 standbyConfig->useWutStandbyAutoStopMode = FALSE;
340 standbyConfig->wutReloadValue = 0xFFFF000;
341
342 standbyConfig->esr0DigitalFilterUsage = IfxPmsPm_DigitalFilter_used;
343 standbyConfig->esr1DigitalFilterUsage = IfxPmsPm_DigitalFilter_used;
344 standbyConfig->pinADigitalFilterUsage = IfxPmsPm_DigitalFilter_used;
345 standbyConfig->pinBDigitalFilterUsage = IfxPmsPm_DigitalFilter_used;
346
347 standbyConfig->esr0TriggerEvent = IfxPmsPm_PinEdgeTriggerEvent_risingEdge;
348 standbyConfig->esr1TriggerEvent = IfxPmsPm_PinEdgeTriggerEvent_risingEdge;
349 standbyConfig->pinATriggerEvent = IfxPmsPm_PinEdgeTriggerEvent_risingEdge;
350 standbyConfig->pinBTriggerEvent = IfxPmsPm_PinEdgeTriggerEvent_risingEdge;
351 }
352
353
354 void IfxPmsPm_startStandbySequenceInFlash(IfxPmsPm_StandbyConfig *standbyConfig, const IfxScuCcu_Config *clockConfig)
355 {
356 uint16 endinitSfty_pw;
357 Ifx_SCU_PMSWCR1 pmswcr1;
358
359 IFXPMS_DISABLE_ALL_MODULES_STANDBY
360 /*Setting the current CPU as the Master CPU.Care has to be taken while locating IfxPmsPm_runStandbySequenceInPSPR() and standbyConfig in RAM.*/
361
362 IfxPmsPm_setMasterCpu(IfxCpu_getCoreIndex());
363
364 standbyConfig->masterCpu = IfxPmsPm_getMasterCpu();
365
366 /*Disabling interrupts for all CPUs except the Master CPU, a designation assigned to current CPU using IfxPmsPm_setMasterCpu(). This is to avoid wakeup
367 * of the CPUs once they are put into IDLE state.*/
368 IfxCpu_disableInterruptsAllExceptMaster(IfxCpu_getCoreIndex());
369
370 /*Placing all CPUs to Idle state except the Master CPU, a designation assigned to current CPU using IfxPmsPm_setMasterCpu().*/
371 IfxCpu_setAllIdleExceptMasterCpu(IfxCpu_getCoreIndex());
372
373 endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPasswordInline();
374 IfxScuWdt_clearSafetyEndinitInline(endinitSfty_pw);
375
376 /*Clearing all overrun and wakeup status bits.*/
377 PMS_PMSWSTATCLR.U = (PMS_PMSWSTATCLR.U | 0xEFFF);
378
379 /*Choosing Standby entry mode in the case of both VEVRSB and VEXT remaining active in Standby Mode*/
380 if ((standbyConfig->trigger == IfxPmsPm_StandbyTriggerMode_software) || (standbyConfig->trigger == IfxPmsPm_StandbyTriggerMode_hardware_nmi))
381 {
382 pmswcr1.U = SCU_PMSWCR1.U;
383 pmswcr1.B.STBYEVEN = 1;
384 pmswcr1.B.STBYEV = standbyConfig->trigger;
385 SCU_PMSWCR1.U = pmswcr1.U;
386 }
387
388 if (standbyConfig->enableStandbyOnVextRampDown)
389 {
390 PMS_PMSWCR0.B.VEXTSTBYEN = 1;
391 }
392
393 if (standbyConfig->enableStandbyOnVddRampDown)
394 {
395 PMS_PMSWCR0.B.VDDSTBYEN = 1;
396 }
397
398 IfxScuWdt_setSafetyEndinitInline(endinitSfty_pw);
399
400 if (standbyConfig->enableStandbyOnVextRampDown)
401 {
402 IfxPmsEvr_setSecondaryUnderVoltageThresholdMv(&MODULE_PMS, standbyConfig->vextUnderVoltageThresholdLevel, IfxPmsEvr_SupplyMode_swd);
403 }
404
405 if (standbyConfig->enableStandbyOnVddRampDown)
406 {
407 IfxPmsEvr_setSecondaryUnderVoltageThresholdMv(&MODULE_PMS, standbyConfig->vddUnderVoltageThresholdLevel, IfxPmsEvr_SupplyMode_evrc);
408 }
409
410 /*Configuring Wakeup modes.*/
411 IfxPmsPm_configureWakeup(standbyConfig);
412
413 /* Frequency Ramp-down and switching of clock source to 100MHz Backup clock */
414 uint32 pllStepsCount;
415 IfxScuCcu_PllThrottleConfig pllThrottleConfig = clockConfig->sysPllThrottleConfig;
416
417 if (SCU_CCUCON0.B.CLKSEL != 0) /* If source not already using backup clock */
418 {
419 endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPasswordInline();
420
421 /*Start Pll ramp down sequence */
422 for (pllStepsCount = pllThrottleConfig.numOfSteps; pllStepsCount > 0; pllStepsCount--)
423 { /*iterate through number of pll steps */
424 {
425 IfxScuWdt_clearSafetyEndinitInline(endinitSfty_pw);
426
427 /*Configure K2 divider */
428 while (SCU_SYSPLLSTAT.B.K2RDY == 0U)
429 {
430 /*Wait until K2 divider is ready */
431 /*No "timeout" required, because if it hangs, Safety Endinit will give a trap */
432 }
433
434 /*Now set the K2 divider value for the step corresponding to step count */
435 SCU_SYSPLLCON1.B.K2DIV = pllThrottleConfig.pllSteps[pllStepsCount - 1].k2Step;
436 IfxScuWdt_setSafetyEndinitInline(endinitSfty_pw);
437
438 /*Wait for waitCounter corresponding to the pll step */
439 //IfxScuCcu_wait(pllThrottleConfig.pllSteps[pllStepsCount - 1].waitTime);
440 }
441 }
442
443 /* Reset Safety ENDINIT, SCU_CCUCON registers are protected*/
444 IfxScuWdt_clearSafetyEndinitInline(endinitSfty_pw);
445
446 while (SCU_CCUCON0.B.LCK != 0U)
447 {} /*Wait till ccucon0 lock is set, No "timeout" required, ENDINIT watch-dog is active! */
448
449 {
450 Ifx_SCU_CCUCON0 scu_ccucon0;
451 scu_ccucon0.U = SCU_CCUCON0.U;
452 scu_ccucon0.B.CLKSEL = 0; /*Select the EVR as fsource0/1/2 for the clock distribution */
453 scu_ccucon0.B.UP = 1; /*Update the ccucon0 register */
454 SCU_CCUCON0.U = scu_ccucon0.U;
455 }
456 }
457
458 IfxScuWdt_setSafetyEndinitInline(endinitSfty_pw);
459 }
460
461
462 void IfxPmsPm_continueStandbySequenceInRAM(IfxPmsPm_StandbyConfig *standbyConfig, const IfxScuCcu_Config *clockConfig)
463 {
464 uint16 endinitSfty_pw = 0;
465 uint16 cpuPassword = 0;
466
467 IFX_UNUSED_PARAMETER(clockConfig);
468 /*Putting Flash to Sleep*/
469 DMU_HF_PCONTROL.B.SLEEP = 0x3;
470
471 /*Waiting for flash to enter sleep mode*/
472 while (!DMU_HF_PSTATUS.B.SLEEP)
473 {}
474
475 endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPasswordInline();
476 IfxScuWdt_clearSafetyEndinitInline(endinitSfty_pw);
477
478 /*Clock dividers for SPB, SRI, BBB, FSI, GETH, GTM, ADAS programmed to have lowest frequency*/
479 SCU_CCUCON0.B.LPDIV = 0x4;
480
481 /* Shutting down System PLL and Peripheral PLL */
482
483 SCU_SYSPLLCON0.B.PLLPWD = 0U;
484 SCU_PERPLLCON0.B.PLLPWD = 0U;
485
486 /*Disabling SMU Standby module*/
487 Ifx_PMS_CMD_STDBY cmdStdby;
488 cmdStdby.U = PMS_CMD_STDBY.U;
489 cmdStdby.B.SMUEN = 0;
490 cmdStdby.B.BITPROT = 1;
491 PMS_CMD_STDBY.U = cmdStdby.U;
492
493 /* Disabling Idle Request Acknowledge sequence activation for fast Standby Mode entry so that standby request is not blocked by a pending reset idle request acknowledge sequence */
494 SCU_PMSWCR1.B.IRADIS = 1U;
495
496 /*Disabling possibilities for Application Reset and System Reset*/
497 MODULE_SCU.RSTCON.U = 0U;
498
499 Ifx_PMS_PMSWCR0 pmswcr0;
500 pmswcr0.U = PMS_PMSWCR0.U;
501 /* Setting the amount of blanking filter delay required */
502 pmswcr0.B.BLNKFIL = standbyConfig->minDelayBeforeWakeUp;
503
504 /* Select standby RAM region to be powered on during standby */
505 pmswcr0.B.STBYRAMSEL = standbyConfig->standbyRamBlock;
506
507 /*Configuring the Pins for use in wakeup mode*/
508
509 if ((standbyConfig->trigger == IfxPmsPm_StandbyTriggerMode_software) || (standbyConfig->trigger == IfxPmsPm_StandbyTriggerMode_hardware_nmi))
510 {
511 pmswcr0.B.ESR0DFEN = standbyConfig->esr0DigitalFilterUsage;
512 pmswcr0.B.ESR1DFEN = standbyConfig->esr1DigitalFilterUsage;
513 pmswcr0.B.PINADFEN = standbyConfig->pinADigitalFilterUsage;
514 pmswcr0.B.PINBDFEN = standbyConfig->pinBDigitalFilterUsage;
515
516 pmswcr0.B.ESR0EDCON = standbyConfig->esr0TriggerEvent;
517 pmswcr0.B.ESR1EDCON = standbyConfig->esr1TriggerEvent;
518 pmswcr0.B.PINAEDCON = standbyConfig->pinATriggerEvent;
519 pmswcr0.B.PINBEDCON = standbyConfig->pinBTriggerEvent;
520 }
521
522 PMS_PMSWCR0.U = pmswcr0.U;
523
524 /* Configuring state of port pins and ESR0 pins upon wakeup */
525 Ifx_PMS_PMSWCR5 pmswcr5;
526 pmswcr5.U = PMS_PMSWCR5.U;
527 pmswcr5.B.BPTRISTREQ = 1;
528 pmswcr5.B.TRISTREQ = 1;
529 pmswcr5.B.BPTRISTREQ = 1;
530 pmswcr5.B.ESR0TRIST = 1;
531 PMS_PMSWCR5.U = pmswcr5.U;
532
533 /* Configuring Standby Controller(SCR) if usage during standby mode is enabled */
534
535 Ifx_PMS_PMSWCR4 pmswcr4;
536 pmswcr4.U = PMS_PMSWCR4.U;
537 pmswcr4.B.BPSCREN = 1U;
538 pmswcr4.B.SCREN = standbyConfig->enableScr;
539 /* SCR clock supply configuration */
540 pmswcr4.B.SCRCLKSEL = standbyConfig->scrClockSupply;
541
542 if (standbyConfig->trigger == IfxPmsPm_StandbyTriggerMode_hardware_undervoltage)
543 {
544 /* Disabling reset of SCR due to standby entry*/
545 pmswcr4.B.PORSTREQ = 0;
546 }
547
548 PMS_PMSWCR4.U = pmswcr4.U;
549
550 IfxScuWdt_setSafetyEndinitInline(endinitSfty_pw);
551 /* In case of manual standby entry using software, requesting Standby entry and waiting for Standby Reqested status */
552 cpuPassword = IfxScuWdt_getCpuWatchdogPasswordInline(&MODULE_SCU.WDTCPU[standbyConfig->masterCpu]);
553
554 if (standbyConfig->trigger == IfxPmsPm_StandbyTriggerMode_software)
555 {
556 IfxScuWdt_clearCpuEndinitInline(&MODULE_SCU.WDTCPU[standbyConfig->masterCpu], cpuPassword);
557
558 switch (standbyConfig->masterCpu)
559 {
560 case IfxCpu_ResourceCpu_0: SCU_PMCSR0.B.REQSLP = 0x3;
561 break;
562 case IfxCpu_ResourceCpu_1: SCU_PMCSR1.B.REQSLP = 0x3;
563 break;
564 case IfxCpu_ResourceCpu_2: SCU_PMCSR2.B.REQSLP = 0x3;
565 break;
566 case IfxCpu_ResourceCpu_3: SCU_PMCSR3.B.REQSLP = 0x3;
567 break;
568 default:
569 /* Invalid core selected */
570 break;
571 }
572 }
573
574 IfxScuWdt_setCpuEndinitInline(&MODULE_SCU.WDTCPU[standbyConfig->masterCpu], cpuPassword);
575 }
576
577
578 void IfxPmsPm_configureWakeup(IfxPmsPm_StandbyConfig *standbyConfig)
579 {
580 uint16 endinitSfty_pw;
581 Ifx_PMS_PMSWCR0 pmswcr0;
582 Ifx_PMS_PMSWCR3 pmswcr3;
583 pmswcr0.U = PMS_PMSWCR0.U;
584 pmswcr3.U = PMS_PMSWCR3.U;
585
586 pmswcr0.B.ESR0WKEN = standbyConfig->enableWakeupOnEsr0;
587 pmswcr0.B.ESR1WKEN = standbyConfig->enableWakeupOnEsr1;
588 pmswcr0.B.PINAWKEN = standbyConfig->enableWakeupOnPinA;
589 pmswcr0.B.PINBWKEN = standbyConfig->enableWakeupOnPinB;
590 pmswcr0.B.PWRWKEN = standbyConfig->enableWakeupOnPower;
591 pmswcr0.B.SCRWKEN = standbyConfig->enableWakeupOnScr;
592 pmswcr0.B.PORSTWKEN = standbyConfig->enableWakeupOnPorst;
593 pmswcr0.B.WUTWKEN = standbyConfig->enableWakeupOnTimer;
594
595 if ((standbyConfig->enableWakeupOnTimer == TRUE) && (standbyConfig->useWutStandbyAutoStopMode == TRUE))
596 {
597 /* Setting the clock input for WUT*/
598 pmswcr3.B.WUTDIV = standbyConfig->wutClock;
599 /*Enable Wakeup Timer*/
600 pmswcr3.B.WUTEN = TRUE;
601 /* Load the value from which the WUT will start downward count upon entering Standby */
602 pmswcr3.B.WUTREL = standbyConfig->wutReloadValue;
603 /* Selecting WUT Auto Stop Mode */
604 pmswcr3.B.WUTMODE = 1;
605 }
606
607 /*get the watch-dog passwords for usage with this function*/
608 endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPasswordInline();
609 IfxScuWdt_clearSafetyEndinitInline(endinitSfty_pw);
610 PMS_PMSWCR0.U = pmswcr0.U;
611 PMS_PMSWCR3.U = pmswcr3.U;
612 IfxScuWdt_setSafetyEndinitInline(endinitSfty_pw);
613 }
614
615
616 void IfxPmsPm_initSleepConfig(IfxPmsPm_SleepConfig *sleepConfig)
617 {
618 sleepConfig->mcanEnabled = FALSE;
619 sleepConfig->mcanClockSource = IfxScuCcu_Fsource_0;
620 sleepConfig->asclinEnabled = FALSE;
621 sleepConfig->asclinClockSource = IfxScuCcu_Fsource_0;
622 sleepConfig->gpt12Enabled = FALSE;
623 sleepConfig->ccu6Enabled = FALSE;
624 sleepConfig->qspiEnabled = FALSE;
625 sleepConfig->qspiClockSource = IfxScuCcu_Fsource_0;
626 sleepConfig->gethEnabled = FALSE;
627 sleepConfig->i2cEnabled = FALSE;
628 sleepConfig->gtmEnabled = FALSE;
629 sleepConfig->stmEnabled = FALSE;
630 }
631
632
633 void IfxPmsPm_startSleepSequenceinFlash(IfxPmsPm_SleepConfig *sleepConfig, IfxScuCcu_Config *clockConfig)
634 {
635 uint16 endinitSfty_pw = 0;
636
637 /*Set current CPU as the Master CPU*/
638
639 IfxPmsPm_setMasterCpu(IfxCpu_getCoreIndex());
640
641 sleepConfig->masterCpu = IfxPmsPm_getMasterCpu();
642
643 /*Placing all CPUs to Idle state except the Master CPU, a designation assigned to current CPU using IfxPmsPm_setMasterCpu().*/
644 IfxCpu_setAllIdleExceptMasterCpu(IfxCpu_getCoreIndex());
645
646 IFXPMS_DISABLE_MODULES_DURING_SLEEP
647
648 /*Disable(or not) SYSPLL and PERPLL depending on which modules are required to be kept active*/
649
650 Ifx_SCU_SYSPLLCON0 syspllcon0;
651 Ifx_SCU_PERPLLCON0 perpllcon0;
652 syspllcon0.U = SCU_SYSPLLCON0.U;
653 perpllcon0.U = SCU_PERPLLCON0.U;
654
655 syspllcon0.B.PLLPWD = 0; //Setting in Power Saving Mode.Will enable it if any of the modules(GPT12(through SPB),CCU6(through SPB),GETH,GTM,STM) need it.
656 perpllcon0.B.PLLPWD = 0; //Setting in Power Saving Mode.Will enable it if any of the modules need it.
657
658 if (sleepConfig->gpt12Enabled || sleepConfig->ccu6Enabled || sleepConfig->gethEnabled || sleepConfig->gtmEnabled || sleepConfig->stmEnabled)
659 {
660 syspllcon0.B.PLLPWD = 1;
661 }
662
663 if (sleepConfig->qspiEnabled | sleepConfig->i2cEnabled)
664 {
665 perpllcon0.B.PLLPWD = 1;
666 }
667
668 if ((sleepConfig->mcanEnabled && (sleepConfig->mcanClockSource == IfxScuCcu_Fsource_1)) || (sleepConfig->asclinEnabled && (sleepConfig->asclinClockSource == IfxScuCcu_Fsource_1)))
669 {
670 perpllcon0.B.PLLPWD = 1;
671 }
672
673 endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPasswordInline();
674 IfxScuWdt_clearSafetyEndinitInline(endinitSfty_pw);
675
676 SCU_SYSPLLCON0.U = syspllcon0.U;
677 SCU_PERPLLCON0.U = perpllcon0.U;
678 /*Clock dividers for SPB, SRI, BBB, FSI, GETH, GTM, ADAS programmed to operate at lowest frequency*/
679 SCU_CCUCON0.B.LPDIV = 0x4;
680 SCU_CCUCON0.B.UP = 1;
681 SCU_CCUCON1.B.CLKSELMCAN = sleepConfig->mcanClockSource;
682 SCU_CCUCON2.B.CLKSELASCLINS = sleepConfig->asclinClockSource;
683 SCU_CCUCON1.B.CLKSELQSPI = sleepConfig->qspiClockSource;
684
685 IfxScuWdt_setSafetyEndinitInline(endinitSfty_pw);
686
687 if (!(sleepConfig->asclinEnabled || sleepConfig->mcanEnabled || sleepConfig->gpt12Enabled || sleepConfig->ccu6Enabled || sleepConfig->qspiEnabled || sleepConfig->gethEnabled || sleepConfig->i2cEnabled || sleepConfig->gtmEnabled || sleepConfig->stmEnabled))
688 {
689 IfxScuCcu_switchToBackupClock(clockConfig);
690 }
691
692 IfxPmsPm_continueSleepSequenceInRAM(sleepConfig);
693 }
694
695
696 void IfxPmsPm_continueSleepSequenceInRAM(IfxPmsPm_SleepConfig *sleepConfig)
697 {
698 uint16 endinit_pw = 0;
699
700 /*Putting Flash to Sleep*/
701 DMU_HF_PCONTROL.B.SLEEP = 3;
702
703 /*Waiting for flash to sleep*/
704 while (!DMU_HF_PSTATUS.B.SLEEP)
705 {}
706
707 endinit_pw = IfxScuWdt_getCpuWatchdogPasswordInline(&MODULE_SCU.WDTCPU[sleepConfig->masterCpu]);
708
709 IfxScuWdt_clearCpuEndinitInline(&MODULE_SCU.WDTCPU[IfxCpu_getCoreIndex()], endinit_pw);
710
711 switch (sleepConfig->masterCpu)
712 {
713 case IfxCpu_ResourceCpu_0: SCU_PMCSR0.B.REQSLP = 0x2;
714
715 while (SCU_PMCSR0.B.PMST == 0x4)
716 {}
717
718 break;
719
720 case IfxCpu_ResourceCpu_1: SCU_PMCSR1.B.REQSLP = 0x2;
721
722 while (SCU_PMCSR1.B.PMST == 0x4)
723 {}
724
725 break;
726
727 case IfxCpu_ResourceCpu_2: SCU_PMCSR2.B.REQSLP = 0x2;
728
729 while (SCU_PMCSR2.B.PMST == 0x4)
730 {}
731
732 break;
733
734 case IfxCpu_ResourceCpu_3: SCU_PMCSR3.B.REQSLP = 0x2;
735
736 while (SCU_PMCSR3.B.PMST == 0x4)
737 {}
738
739 break;
740 default:
741 /* Invalid core selected */
742 break;
743 }
744
745 IfxScuWdt_setCpuEndinitInline(&MODULE_SCU.WDTCPU[sleepConfig->masterCpu], endinit_pw);
746 }
747
748
749 void IfxPmsPm_initiateWakeup(IfxScuCcu_Config *clockConfig)
750 {
751 /*Put Flash to Normal mode from Sleep*/
752
753 DMU_HF_PCONTROL.B.SLEEP = 0;
754
755 /*Wait till Flash is active*/
756
757 while (DMU_HF_PSTATUS.B.SLEEP)
758 {}
759
760 IfxScuCcu_init(clockConfig);
761
762 IFXPMS_WAKEUP_MODULES
763
764 IFXPMS_RESTART_EXECUTION
765 }
766
767
768 void IfxPmsPm_initLoadJumpConfig(IfxPmsPm_LoadJumpConfig *loadJumpConfig)
769 {
770 loadJumpConfig->enableLoadJumpTimer = TRUE;
771 loadJumpConfig->enableLoadJumpTimerOverflowFlag = TRUE;
772 loadJumpConfig->enableLoadJumpTimerOverflowInterrupt = FALSE;
773 }
774
775
776 void IfxPmsPm_initAndRequestLoadJump(IfxPmsPm_LoadJumpConfig *loadJumpConfig)
777 {
778 uint16 safetyWdtPw = IfxScuWdt_getSafetyWatchdogPassword();
779 IfxScuWdt_clearSafetyEndinit(safetyWdtPw);
780
781 SCU_PMTRCSR0.B.LJTEN = loadJumpConfig->enableLoadJumpTimer;
782 SCU_PMTRCSR0.B.LJTOVEN = loadJumpConfig->enableLoadJumpTimerOverflowFlag;
783 SCU_PMTRCSR0.B.LJTOVIEN = loadJumpConfig->enableLoadJumpTimerOverflowInterrupt;
784 __dsync();
785 SCU_PMTRCSR2.B.LDJMPREQ = 1U;
786 IfxScuWdt_setSafetyEndinit(safetyWdtPw);
787 }
788
789
790 void IfxPmsPm_initVoltageDroopConfig(IfxPmsPm_VoltageDroopConfig *voltageDroopConfig)
791 {
792 /*Enabling usage of Voltage Droop Timer*/
793 voltageDroopConfig->enableVoltageDroopTimer = TRUE;
794 /*Enabling update of Voltage Droop Timer Overflow Flag in event of overflow*/
795 voltageDroopConfig->enableVoltageDroopTimerOverflowFlag = TRUE;
796 /*Disabling Voltage Droop Timer interrupt*/
797 voltageDroopConfig->enableVoltageDroopTimerOverflowInterrupt = FALSE;
798 /* Requesting for a reduction voltage(negative voltage droop)*/
799 voltageDroopConfig->droopRequestType = IfxPmsPm_VoltageDroopRequest_negative;
800 /*The amount by which voltage change is required is 40mV*/
801 voltageDroopConfig->droopStep = IfxPmsPm_VoltageDroopStep_40mV;
802 }
803
804
805 void IfxPmsPm_initAndRequestVoltageDroop(IfxPmsPm_VoltageDroopConfig *voltageDroopConfig)
806 {
807 uint16 safetyWdtPw = IfxScuWdt_getSafetyWatchdogPassword();
808 IfxScuWdt_clearSafetyEndinit(safetyWdtPw);
809
810 SCU_PMTRCSR0.B.VDTEN = voltageDroopConfig->enableVoltageDroopTimer;
811 SCU_PMTRCSR0.B.VDTOVEN = voltageDroopConfig->enableVoltageDroopTimerOverflowFlag;
812 SCU_PMTRCSR0.B.VDTOVIEN = voltageDroopConfig->enableVoltageDroopTimerOverflowInterrupt;
813 SCU_PMTRCSR0.B.SDSTEP = voltageDroopConfig->droopStep;
814 __dsync();
815 SCU_PMTRCSR3.B.VDROOPREQ = voltageDroopConfig->droopRequestType;
816 IfxScuWdt_setSafetyEndinit(safetyWdtPw);
817 }
818
819
820 void IfxPmsPm_handleStandbyRam(uint32 *dataPointer, uint8 dataSize)
821 {
822 uint32 *redundantDataPointer = (uint32 *)dataPointer;
823
824 uint32 i;
825
826 for (i = 0U; i < dataSize; i++)
827 {
828 {
829 /*Effectively reading addresses from redundantDataPointer and replacing it with data in those addresses*/
830 uint32 *temp;
831 /*Copy the data(which is an address) into temp pointer */
832 temp = (uint32 *)(*redundantDataPointer);
833 /*Copy the data in temp pointer to redundant data pointer*/
834 *redundantDataPointer = *temp;
835 }
836 redundantDataPointer++;
837 }
838
839 /*Calculate the CRC over all the copied data*/
840 *redundantDataPointer = IfxCpu_calculateCrc32(dataPointer, dataSize);
841 }
IfxPmsPm_initLoadJumpConfig
void IfxPmsPm_initLoadJumpConfig(IfxPmsPm_LoadJumpConfig *loadJumpConfig)
Definition: IfxPmsPm.c:768
IfxPmsPm_WakeupConfig::mode
IfxPmsPm_WakeupTimerMode mode
wake-up timer mode
Definition: IfxPmsPm.h:410
IfxPmsPm_StandbyConfig::enableWakeupOnEsr0
boolean enableWakeupOnEsr0
Enable wake-up on ESR0.
Definition: IfxPmsPm.h:369
IfxPmsPm_StandbyConfig::pinBDigitalFilterUsage
IfxPmsPm_DigitalFilter pinBDigitalFilterUsage
Whether to use didital filer withe interpreting the pulse on PINB pin.
Definition: IfxPmsPm.h:383
IfxScuWdt_setSafetyEndinitInline
IFX_INLINE void IfxScuWdt_setSafetyEndinitInline(uint16 password)
SCUWDT Inline API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.h:689
IfxScuWdt_getSafetyWatchdogPasswordInline
IFX_INLINE uint16 IfxScuWdt_getSafetyWatchdogPasswordInline(void)
SCUWDT Inline API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.h:641
IfxPmsPm_initAndRequestVoltageDroop
void IfxPmsPm_initAndRequestVoltageDroop(IfxPmsPm_VoltageDroopConfig *voltageDroopConfig)
Definition: IfxPmsPm.c:805
IfxCpu_calculateCrc32
IFX_INLINE unsigned int IfxCpu_calculateCrc32(uint32 *startaddress, uint8 length)
Definition: IfxCpu_IntrinsicsDcc.h:1511
IfxScuCcu_Config::sysPllThrottleConfig
IfxScuCcu_PllThrottleConfig sysPllThrottleConfig
Configuration of PLL throttling.
Definition: IfxScuCcu.h:660
IfxPmsPm_StandbyConfig::pinATriggerEvent
IfxPmsPm_PinEdgeTriggerEvent pinATriggerEvent
Trigger will be generated on which pulse edge of a pulse on PINA pin.
Definition: IfxPmsPm.h:386
IfxPmsPm_StandbyConfig::useWutStandbyAutoStopMode
boolean useWutStandbyAutoStopMode
Use the Auto Stop mode in WUT.
Definition: IfxPmsPm.h:377
IfxPmsPm_StandbyRamSupply_cpu0Cpu1
Standby RAM (CPU0 dLMU RAM Block0 + Block1) & (CPU1 dLMU RAM Block0 + Block1) is supplied.
Definition: IfxPmsPm.h:203
IfxCpu_getAddress
IFX_INLINE Ifx_CPU * IfxCpu_getAddress(IfxCpu_ResourceCpu cpu)
API to get the address for CPU HW module register memory map.
Definition: IfxCpu.h:834
IfxScu_PMCSR_REQSLP_Idle
Definition: IfxScu_cfg.h:1332
IFXPMS_RESTART_EXECUTION
#define IFXPMS_RESTART_EXECUTION
This macro is intended to be defined in Ifx_Cfg.h and is meant to contain any activity the applicatio...
Definition: IfxPms_cfg.h:136
IfxScuWdt_clearSafetyEndinitInline
IFX_INLINE void IfxScuWdt_clearSafetyEndinitInline(uint16 password)
SCUWDT Inline API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.h:581
IfxCpu_CoreMode_idle
Definition: IfxCpu.h:133
IfxPmsPm_SleepConfig::gethEnabled
boolean gethEnabled
Whether QSPI will be enabled ir disabled during Sleep mode.
Definition: IfxPmsPm.h:347
IfxPmsPm_StandbyConfig::esr0PinStateRequest
IfxPmsPm_Esr0PinStateRequest esr0PinStateRequest
Request to remain in input with weak pull-up or get into tristate.
Definition: IfxPmsPm.h:364
IfxPmsPm_StandbyConfig::trigger
IfxPmsPm_StandbyTriggerMode trigger
Events which&#39;ll trigger Standby mode.
Definition: IfxPmsPm.h:358
IfxPmsPm_configureSupplyMonitoring
void IfxPmsPm_configureSupplyMonitoring(Ifx_PMS *pms, IfxPmsPm_VoltageSource source, IfxPmsPm_ThresholdEvent event, IfxPmsPm_RampingMode mode)
Definition: IfxPmsPm.c:306
IfxScuCcu_Config
Configuration structure SCU module.
Definition: IfxScuCcu.h:657
IfxPmsPm_StandbyConfig::enableWakeupOnScr
boolean enableWakeupOnScr
Enable wake-up on request from SCR.
Definition: IfxPmsPm.h:375
IfxPmsPm_initAndRequestLoadJump
void IfxPmsPm_initAndRequestLoadJump(IfxPmsPm_LoadJumpConfig *loadJumpConfig)
Definition: IfxPmsPm.c:776
IfxPmsPm_WakeupOn_esr0
ESR0 Wake-up enable from Standby.
Definition: IfxPmsPm.h:285
IfxPmsEvr_SupplyMode_swd
select external VEXT suppy watchdog
Definition: IfxPmsEvr.h:328
IfxScuWdt_clearCpuEndinitInline
IFX_INLINE void IfxScuWdt_clearCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, uint16 password)
SCUWDT Inline API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.h:548
IfxScuWdt_getCpuWatchdogPasswordInline
IFX_INLINE uint16 IfxScuWdt_getCpuWatchdogPasswordInline(Ifx_SCU_WDTCPU *watchdog)
SCUWDT Inline API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.h:604
IfxPmsPm_SleepConfig::qspiClockSource
IfxScuCcu_Fsource qspiClockSource
Clock Source for MCAN IfxScuCcu_Fsource_1 is f_source1 from K2 divider of Peripheral PLL IfxScuCcu_Fs...
Definition: IfxPmsPm.h:344
IfxPmsPm_StandbyConfig::vddUnderVoltageThresholdLevel
float32 vddUnderVoltageThresholdLevel
Undervoltage threshold for VDD.
Definition: IfxPmsPm.h:368
IfxScuCcu_PllStepConfig::k2Step
uint8 k2Step
K2 divider value for this step.
Definition: IfxScuCcu.h:583
__nop
void __nop(void) __attribute__((intrinsic_function(0x103
IfxPmsPm_StandbyTriggerMode_hardware_nmi
Standby request arising from any NMI/ESR1 pin assertion.
Definition: IfxPmsPm.h:212
IFXPMS_WAIT_CYCLES
#define IFXPMS_WAIT_CYCLES
Number of cycles to wait after switching to backup clock is triggered before shutting down the oscill...
Definition: IfxPms_cfg.h:143
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxPmsPm_VoltageDroopRequest_negative
A Negative Voltage Droop Request made and taken. Voltage Droop Timer activated.
Definition: IfxPmsPm.h:230
IfxScuCcu_Fsource_0
fSource0
Definition: IfxScuCcu.h:302
IfxPmsPm_SleepConfig::asclinEnabled
boolean asclinEnabled
Whether ASCLIN will be enabled ir disabled during Sleep mode.
Definition: IfxPmsPm.h:337
IfxPmsPm_setStandbyMode
void IfxPmsPm_setStandbyMode(Ifx_PMS *pms, IfxPmsPm_WakeupConfig *config, IfxPmsPm_RequestPowerMode powerMode)
set system into stand by mode Note: In this API Alarm has been disabled.Enable of SMU alarm has to be...
Definition: IfxPmsPm.c:52
IfxCpu_CoreMode
IfxCpu_CoreMode
Enumeration for the Cpu mode.
Definition: IfxCpu.h:129
IfxPmsPm_VoltageDroopConfig
Volatge Droop Configuration.
Definition: IfxPmsPm.h:393
IfxScuCcu_PllThrottleConfig::numOfSteps
uint8 numOfSteps
Number of PLL divider steps during clock throttling.
Definition: IfxScuCcu.h:639
IfxPmsPm_StandbyConfig::enableWakeupOnPower
uint8 enableWakeupOnPower
Enable wake-up on VEXT ramp up.
Definition: IfxPmsPm.h:376
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxPmsPm_StandbyConfig::enableWakeupOnPinA
boolean enableWakeupOnPinA
Enable wake-up on PINA.
Definition: IfxPmsPm.h:371
IfxPmsPm_StandbyConfig::enableWakeupOnTimer
boolean enableWakeupOnTimer
Enable wake-up on Wake Up Timer(WUT)
Definition: IfxPmsPm.h:373
IfxPmsPm_RequestPowerMode
IfxPmsPm_RequestPowerMode
System power mode As defined in Ifx_SCU.PMCSR[x].B.REQSLP.
Definition: IfxPmsPm.h:174
IfxPmsPm_initiateWakeup
void IfxPmsPm_initiateWakeup(IfxScuCcu_Config *clockConfig)
Definition: IfxPmsPm.c:749
IfxPmsEvr_setSecondaryUnderVoltageThresholdMv
void IfxPmsEvr_setSecondaryUnderVoltageThresholdMv(Ifx_PMS *pms, float32 thresholdLevel, IfxPmsEvr_SupplyMode supply)
set Secondary under Voltage Threshold level
Definition: IfxPmsEvr.c:244
IfxPmsPm_WutClock_70kHz
WUT has a 70 kHz clock input.
Definition: IfxPmsPm.h:308
IfxPmsPm_DigitalFilter_used
The Filter is Used.
Definition: IfxPmsPm.h:106
IfxPmsPm_PinEdgeTriggerEvent_risingEdge
Trigger is generated upon a rising edge.
Definition: IfxPmsPm.h:149
IfxPmsPm_LoadJumpConfig
Options for Load Jump.
Definition: IfxPmsPm.h:322
IfxPmsPm_StandbyConfig::wutReloadValue
uint32 wutReloadValue
The value from which the WUT will start downward count upon entering Standby.
Definition: IfxPmsPm.h:378
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxPmsPm_StandbyConfig::minDelayBeforeWakeUp
IfxPmsPm_BlankingFilterDelay minDelayBeforeWakeUp
Selecting the duration, starting from Standby entry, after which wake-up triggers are effective...
Definition: IfxPmsPm.h:362
IfxPmsPm_StandbyConfig::enableStandbyOnVextRampDown
boolean enableStandbyOnVextRampDown
Enable Standby On VEXT Ramp Down.
Definition: IfxPmsPm.h:365
IFXPMS_WAKEUP_MODULES
#define IFXPMS_WAKEUP_MODULES
This macro is intended to be defined in Ifx_Cfg.h and is meant to restore the clock supply to desired...
Definition: IfxPms_cfg.h:128
IfxCpu_CoreMode_sleep
Definition: IfxCpu.h:134
IfxPmsPm_WakeupConfig::trigger
IfxPmsPm_EdgeDetectionControl trigger
Enable Wake-up on rising or falling edge.
Definition: IfxPmsPm.h:408
IfxPmsPm_StandbyConfig::esr1TriggerEvent
IfxPmsPm_PinEdgeTriggerEvent esr1TriggerEvent
Trigger will be generated on which pulse edge of a pulse on ESR1 pin.
Definition: IfxPmsPm.h:385
IFXPMS_DISABLE_MODULES_DURING_SLEEP
#define IFXPMS_DISABLE_MODULES_DURING_SLEEP
This macro is intended to be defined in Ifx_Cfg.h and is meant to cut off the clock supply to desired...
Definition: IfxPms_cfg.h:87
IfxPmsPm_WakeupConfig::filter
IfxPmsPm_DigitalFilter filter
bypass/use digital filter
Definition: IfxPmsPm.h:407
IfxPmsPm_ThresholdEvent
IfxPmsPm_ThresholdEvent
types of event
Definition: IfxPmsPm.h:217
IfxPmsPm_WakeupConfig::wakeup
IfxPmsPm_WakeupOn wakeup
wake-up configuration
Definition: IfxPmsPm.h:406
IfxScuWdt_clearSafetyEndinit
void IfxScuWdt_clearSafetyEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:305
IfxPmsPm_continueSleepSequenceInRAM
void IfxPmsPm_continueSleepSequenceInRAM(IfxPmsPm_SleepConfig *sleepConfig)
This is to be placed in PSPR of the Master CPU.
Definition: IfxPmsPm.c:696
IfxCpu_ResourceCpu
IfxCpu_ResourceCpu
List of the available CPU resources.
Definition: IfxCpu_cfg.h:157
IfxPmsPm_SleepConfig::mcanEnabled
boolean mcanEnabled
Whether MCAN will be enabled ir disabled during Sleep mode.
Definition: IfxPmsPm.h:333
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxPmsPm_StandbyConfig::standbyRamBlock
IfxPmsPm_StandbyRamSupply standbyRamBlock
Options for which part of the DLMU can be provided supply during standby.
Definition: IfxPmsPm.h:359
IfxCpu_disableInterruptsAllExceptMaster
void IfxCpu_disableInterruptsAllExceptMaster(IfxCpu_ResourceCpu masterCpu)
Disables interrupts for all CPUs except the Master CPU,index of which is given as the parameter...
Definition: IfxCpu.c:632
IfxPmsPm_SleepConfig::qspiEnabled
boolean qspiEnabled
Whether QSPI will be enabled ir disabled during Sleep mode.
Definition: IfxPmsPm.h:343
IfxPmsPm_StandbyConfig::esr0DigitalFilterUsage
IfxPmsPm_DigitalFilter esr0DigitalFilterUsage
Whether to use didital filer withe interpreting the pulse on ESR0 pin.
Definition: IfxPmsPm.h:380
IfxPmsPm_StandbyConfig::enableStandbyOnVddRampDown
boolean enableStandbyOnVddRampDown
Enable Standby On VDD Ramp Down.
Definition: IfxPmsPm.h:366
IfxPmsPm_VoltageDroopStep_40mV
Voltage Droop request of 40 mV.
Definition: IfxPmsPm.h:258
IfxCpu_CoreMode_stby
Definition: IfxCpu.h:135
IfxPmsPm_ScrClocking_100mhzOptional
100MHz oscillator can be enabled or disabled based on request from Standby Controller. By default 100 MHz Oscillator is requested by SCR in Standby Mode.
Definition: IfxPmsPm.h:186
IfxPmsPm_StandbyConfig::vextUnderVoltageThresholdLevel
float32 vextUnderVoltageThresholdLevel
Undervoltage threshold for VEXT.
Definition: IfxPmsPm.h:367
IfxPmsPm_SleepConfig
Configurable options for sleep mode.
Definition: IfxPmsPm.h:331
IfxPmsPm_startStandbySequenceInFlash
void IfxPmsPm_startStandbySequenceInFlash(IfxPmsPm_StandbyConfig *standbyConfig, const IfxScuCcu_Config *clockConfig)
Definition: IfxPmsPm.c:354
IfxCpu_ResourceCpu_2
CPU 2.
Definition: IfxCpu_cfg.h:161
IfxPmsPm.h
PMS basic functionality.
IfxPmsPm_StandbyConfig::enableWakeupOnPorst
boolean enableWakeupOnPorst
Enable wake-up on PORST pin assertion.
Definition: IfxPmsPm.h:374
IfxPmsPm_WakeupConfig::standbyRam
IfxPmsPm_StandbyRamSupply standbyRam
RAM being supply during standby mode.
Definition: IfxPmsPm.h:409
IfxScu_PMCSR_REQSLP_Run
Definition: IfxScu_cfg.h:1331
IfxPmsPm_WakeupOn_power
Power Wake-up enable Standby.
Definition: IfxPmsPm.h:291
IfxPmsPm_continueStandbySequenceInRAM
void IfxPmsPm_continueStandbySequenceInRAM(IfxPmsPm_StandbyConfig *standbyConfig, const IfxScuCcu_Config *clockConfig)
Definition: IfxPmsPm.c:462
IfxPmsPm_StandbyConfig::wutClock
IfxPmsPm_WutClock wutClock
Clock select for WUT.
Definition: IfxPmsPm.h:379
IfxPmsPm_StandbyTriggerMode_software
Standby request using MODULE_SCU.PMCSRx.B.REQSLP.
Definition: IfxPmsPm.h:210
IfxPmsPm_Esr0PinStateRequest_tristate
Set the ESR0 pin pad to tristate.
Definition: IfxPmsPm.h:125
IfxScuCcu_PllThrottleConfig
Definition: IfxScuCcu.h:637
IfxPmsPm_setCoreMode
boolean IfxPmsPm_setCoreMode(IfxCpu_ResourceCpu cpuIndex, IfxCpu_CoreMode mode)
Set core mode(Idle/Run)
Definition: IfxPmsPm.c:152
__dsync
void __dsync(void) __attribute__((intrinsic_function(0x103
IfxPmsPm_BlankingFilterDelay_5ms
Blanking delay on 5ms.
Definition: IfxPmsPm.h:86
IfxScuCcu_PllThrottleConfig::pllSteps
IFX_CONST IfxScuCcu_PllStepConfig * pllSteps
Pointer to the array of Pll divider step configuration.
Definition: IfxScuCcu.h:640
IfxScu_CCUCON0_CLKSEL_fBack
Definition: IfxScu_cfg.h:1317
IfxPmsPm_StandbyConfig::enableScr
boolean enableScr
Whether to enable SCR or not.
Definition: IfxPmsPm.h:360
IfxPmsPm_LoadJumpConfig::enableLoadJumpTimerOverflowInterrupt
boolean enableLoadJumpTimerOverflowInterrupt
Enable or disable Load Jump Timer Overflow Interrupt.
Definition: IfxPmsPm.h:326
IfxPmsPm_StandbyConfig::esr1DigitalFilterUsage
IfxPmsPm_DigitalFilter esr1DigitalFilterUsage
Whether to use didital filer withe interpreting the pulse on ESR1 pin.
Definition: IfxPmsPm.h:382
IfxPmsPm_StandbyConfig::enableWakeupOnPinB
boolean enableWakeupOnPinB
Enable wake-up on PINB.
Definition: IfxPmsPm.h:372
IfxPmsPm_SleepConfig::mcanClockSource
IfxScuCcu_Fsource mcanClockSource
Clock Source for MCAN IfxScuCcu_Fsource_1 is f_source1 from K2 divider of Peripheral PLL IfxScuCcu_Fs...
Definition: IfxPmsPm.h:334
IfxPmsPm_VoltageDroopConfig::enableVoltageDroopTimerOverflowFlag
boolean enableVoltageDroopTimerOverflowFlag
Enable or disable usage of Voltage Droop Timer Overflow Flag.
Definition: IfxPmsPm.h:396
IfxPmsPm_StandbyConfig::pinADigitalFilterUsage
IfxPmsPm_DigitalFilter pinADigitalFilterUsage
Whether to use didital filer withe interpreting the pulse on PINA pin.
Definition: IfxPmsPm.h:381
IfxPmsPm_startSleepSequenceinFlash
void IfxPmsPm_startSleepSequenceinFlash(IfxPmsPm_SleepConfig *sleepConfig, IfxScuCcu_Config *clockConfig)
Definition: IfxPmsPm.c:633
IfxPmsPm_VoltageDroopConfig::enableVoltageDroopTimer
boolean enableVoltageDroopTimer
Enable or disable usage of Voltage Droop Timer.
Definition: IfxPmsPm.h:395
IfxScuCcu_init
boolean IfxScuCcu_init(const IfxScuCcu_Config *config)
API to initialize the SCU Clock Control Unit. This API initialize the Sys PLL with ramp steps...
Definition: IfxScuCcu.c:563
IfxPmsPm_StandbyConfig::pinBTriggerEvent
IfxPmsPm_PinEdgeTriggerEvent pinBTriggerEvent
Trigger will be generated on which pulse edge of a pulse on PINB pin.
Definition: IfxPmsPm.h:387
IfxPmsPm_SleepConfig::asclinClockSource
IfxScuCcu_Fsource asclinClockSource
Clock Source for ASCLIN IfxScuCcu_Fsource_1 is f_source1 from K2 divider of Peripheral PLL IfxScuCcu_...
Definition: IfxPmsPm.h:338
IfxPmsPm_handleStandbyRam
void IfxPmsPm_handleStandbyRam(uint32 *dataPointer, uint8 dataSize)
Copies dataSize bytes of data to standby RAM starting at dataPointer and appends the CRC over the cop...
Definition: IfxPmsPm.c:820
IfxScu_PMCSR_REQSLP_Sleep
Definition: IfxScu_cfg.h:1333
IfxPmsPm_StandbyConfig::padStateRequest
IfxPmsPm_PadStateRequest padStateRequest
Request to remain in input with weak pull-up or get into tristate.
Definition: IfxPmsPm.h:363
IfxCpu_setAllIdleExceptMasterCpu
void IfxCpu_setAllIdleExceptMasterCpu(IfxCpu_ResourceCpu masterCpu)
Sets all CPUs to Idle mode except the Master CPU,index of which is given as the parameter.
Definition: IfxCpu.c:544
IfxScuCcu_Fsource_1
fSource1
Definition: IfxScuCcu.h:303
IfxCpu_ResourceCpu_3
CPU 3.
Definition: IfxCpu_cfg.h:162
IfxPmsPm_initVoltageDroopConfig
void IfxPmsPm_initVoltageDroopConfig(IfxPmsPm_VoltageDroopConfig *voltageDroopConfig)
Definition: IfxPmsPm.c:790
IfxScuWdt_setCpuEndinitInline
IFX_INLINE void IfxScuWdt_setCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, uint16 password)
SCUWDT Inline API to Set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.h:656
IfxPmsPm_VoltageDroopConfig::enableVoltageDroopTimerOverflowInterrupt
boolean enableVoltageDroopTimerOverflowInterrupt
Enable or disable usage of Voltage Droop Interrupt.
Definition: IfxPmsPm.h:397
IfxPmsEvr_SupplyMode_evrc
select EVRC regulator or VDD Supply
Definition: IfxPmsEvr.h:326
IfxPmsPm_StandbyConfig
Configurable Standby options.
Definition: IfxPmsPm.h:356
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxPmsPm_SleepConfig::i2cEnabled
boolean i2cEnabled
Whether I2C will be enabled ir disabled during Sleep mode.
Definition: IfxPmsPm.h:348
IfxPmsPm_getMasterCpu
IFX_INLINE IfxCpu_ResourceCpu IfxPmsPm_getMasterCpu(void)
Gets the index of Master CPU.
Definition: IfxPmsPm.h:823
IfxPmsPm_PadStateRequest_tristate
Set pads to tristate.
Definition: IfxPmsPm.h:143
IfxScuWdt_setSafetyEndinit
void IfxScuWdt_setSafetyEndinit(uint16 password)
SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:668
IfxPmsPm_SleepConfig::gtmEnabled
boolean gtmEnabled
Whether GTM will be enabled ir disabled during Sleep mode.
Definition: IfxPmsPm.h:349
IfxPmsPm_LoadJumpConfig::enableLoadJumpTimerOverflowFlag
boolean enableLoadJumpTimerOverflowFlag
Enable or disable update of Load Jump Timer Overflow Flag.
Definition: IfxPmsPm.h:325
IfxScuWdt_getSafetyWatchdogPassword
uint16 IfxScuWdt_getSafetyWatchdogPassword(void)
SCUWDT API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.c:393
IfxPmsPm_initStandbyConfig
void IfxPmsPm_initStandbyConfig(IfxPmsPm_StandbyConfig *standbyConfig)
This function will initialize the configuration structure with default values. NOTE: ...
Definition: IfxPmsPm.c:316
IfxPmsPm_WakeupOn_pinB
PINB Wake-up enable from Standby.
Definition: IfxPmsPm.h:288
IfxCpu_ResourceCpu_0
CPU 0.
Definition: IfxCpu_cfg.h:159
IfxPmsPm_enableWakeup
void IfxPmsPm_enableWakeup(Ifx_PMS *pms, IfxPmsPm_WakeupConfig *wakeup)
Enable Wakeup using PORST/ESR1/PINA/PINB/WUT/SCR/Power.
Definition: IfxPmsPm.c:237
IfxPmsPm_LoadJumpConfig::enableLoadJumpTimer
boolean enableLoadJumpTimer
Enable or disable Load Jump Timer.
Definition: IfxPmsPm.h:324
IfxCpu_getCoreIndex
IFX_INLINE IfxCpu_ResourceCpu IfxCpu_getCoreIndex(void)
API to get cpu index of the caller CPU. Note: This api can be used whereever cpu no/index is needed...
Definition: IfxCpu.h:871
IfxPmsPm_StandbyConfig::masterCpu
IfxCpu_ResourceCpu masterCpu
CPU which can call powerdown modes.In IfxPmsPm_startStandbySequenceInFlash(),this value is being fill...
Definition: IfxPmsPm.h:388
IFXPMS_DISABLE_ALL_MODULES_STANDBY
#define IFXPMS_DISABLE_ALL_MODULES_STANDBY
This macro is intended to be defined in Ifx_Cfg.h and is meant to cut off the clock supply to desired...
Definition: IfxPms_cfg.h:108
IfxPmsPm_configureWakeup
void IfxPmsPm_configureWakeup(IfxPmsPm_StandbyConfig *standbyConfig)
Definition: IfxPmsPm.c:578
IfxPmsPm_SleepConfig::gpt12Enabled
boolean gpt12Enabled
Whether GPT12 will be enabled ir disabled during Sleep mode.
Definition: IfxPmsPm.h:341
IfxPmsPm_StandbyTriggerMode_hardware_undervoltage
Standby trigger arising from VEXT/VDD undervoltage.
Definition: IfxPmsPm.h:211
IfxPmsPm_WakeupConfig
Configure Wakeup in standby mode.
Definition: IfxPmsPm.h:404
IfxPmsPm_StandbyConfig::esr0TriggerEvent
IfxPmsPm_PinEdgeTriggerEvent esr0TriggerEvent
Trigger will be generated on which pulse edge of a pulse on ESR0 pin.
Definition: IfxPmsPm.h:384
IfxPmsPm_StandbyConfig::scrClockSupply
IfxPmsPm_ScrClocking scrClockSupply
Options for SCR clock supply.
Definition: IfxPmsPm.h:361
IfxPmsPm_VoltageDroopConfig::droopStep
IfxPmsPm_VoltageDroopStep droopStep
Value by which voltage change must happen.
Definition: IfxPmsPm.h:399
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxPmsPm_WakeupConfig::reloadCounter
uint32 reloadCounter
reload count from where value starts counting down used in case of WUT configuration ...
Definition: IfxPmsPm.h:411
IfxCpu_CoreMode_run
Definition: IfxCpu.h:132
IfxScuCcu_switchToBackupClock
void IfxScuCcu_switchToBackupClock(const IfxScuCcu_Config *cfg)
API to switch to Backup clock from the current PLL frequency.
Definition: IfxScuCcu.c:1354
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxPmsPm_WakeupOn_porst
PORST Wake-up enable from Standby.
Definition: IfxPmsPm.h:289
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
IfxPmsPm_setMasterCpu
IFX_INLINE void IfxPmsPm_setMasterCpu(IfxCpu_ResourceCpu cpuIndex)
Set a given CPU as a Master CPU i.e. ability to trigger power down modes.
Definition: IfxPmsPm.h:811
IfxPmsPm_WakeupOn_scr
SCR Wake-up enable from Standby.
Definition: IfxPmsPm.h:292
IfxCpu_CoreMode_halt
Definition: IfxCpu.h:131
IfxPmsPm_VoltageDroopConfig::droopRequestType
IfxPmsPm_VoltageDroopRequest droopRequestType
Type of Voltage Droop Request.
Definition: IfxPmsPm.h:398
IfxPmsPm_WakeupOn_timer
WUT Wake-up enable from Standby.
Definition: IfxPmsPm.h:290
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxPmsPm_SleepConfig::ccu6Enabled
boolean ccu6Enabled
Whether CCU6 will be enabled ir disabled during Sleep mode.
Definition: IfxPmsPm.h:342
IfxPmsPm_StandbyConfig::enableWakeupOnEsr1
boolean enableWakeupOnEsr1
Enable wake-up on ESR1.
Definition: IfxPmsPm.h:370
IfxPmsPm_VoltageSource
IfxPmsPm_VoltageSource
Different voltage sources extrnally supplied to/inside AURIX2G.
Definition: IfxPmsPm.h:270
IfxPmsPm_SleepConfig::stmEnabled
boolean stmEnabled
Whether STM will be enabled ir disabled during Sleep mode.
Definition: IfxPmsPm.h:350
IfxPmsPm_RampingMode
IfxPmsPm_RampingMode
Different options for when event triggering is desired(See EVRMONCTRL).
Definition: IfxPmsPm.h:156
IfxPmsPm_WakeupOn_pinA
PINA Wake-up enable from Standby.
Definition: IfxPmsPm.h:287
IfxCpu_ResourceCpu_1
CPU 1.
Definition: IfxCpu_cfg.h:160
IfxPmsPm_WakeupOn_esr1
ESR1 Wake-up enable from Standby.
Definition: IfxPmsPm.h:286
IfxPmsPm_initSleepConfig
void IfxPmsPm_initSleepConfig(IfxPmsPm_SleepConfig *sleepConfig)
Definition: IfxPmsPm.c:616


iLLD_TC38A: IfxPmsPm.h Source File

  • Pms
  • Std
IfxPmsPm.h
Go to the documentation of this file.
1 /**
2 * \file IfxPmsPm.h
3 * \brief PMS basic functionality
4 * \ingroup IfxLld_Pms
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 *
43 * \defgroup IfxLld_Pms_Std_Pm PM
44 * \ingroup IfxLld_Pms_Std
45 * \defgroup IfxLld_Pms_Std_Pm_Enumerations Enumerations
46 * \ingroup IfxLld_Pms_Std_Pm
47 * \defgroup IfxLld_Pms_Std_Pm_DataStructures Data Structures
48 * \ingroup IfxLld_Pms_Std_Pm
49 * \defgroup IfxLld_Pms_Std_Pm_SystemModes System Modes
50 * \ingroup IfxLld_Pms_Std_Pm
51 * \defgroup IfxLld_Pms_Std_Pm_CpuModes Cpu Modes
52 * \ingroup IfxLld_Pms_Std_Pm
53 * \defgroup IfxLld_Pms_Std_Pm_WakeupModes WakeupModes
54 * \ingroup IfxLld_Pms_Std_Pm
55 */
56
57 #ifndef IFXPMSPM_H
58 #define IFXPMSPM_H 1
59
60 /******************************************************************************/
61 /*----------------------------------Includes----------------------------------*/
62 /******************************************************************************/
63
64 #include "_Impl/IfxPms_cfg.h"
65 #include "Scu/Std/IfxScuWdt.h"
66 #include "Pms/Std/IfxPmsEvr.h"
67 #include "Cpu/Irq/IfxCpu_Irq.h"
68 #include "Scu/Std/IfxScuCcu.h"
69 #include "IfxCpu_bf.h"
70 #include "Scu/Std/IfxScuWdt.h"
71 #include "Cpu/Std/IfxCpu.h"
72 #include "IfxDmu_reg.h"
73
74 /******************************************************************************/
75 /*--------------------------------Enumerations--------------------------------*/
76 /******************************************************************************/
77
78 /** \addtogroup IfxLld_Pms_Std_Pm_Enumerations
79 * \{ */
80 /** \brief Exposes the optons for minimum duration between standby entry and Wakeup.If any wakeup request comes up before this time is elapsed after standby entry, then it's ignored.Configured in PMS_PMSWCR.B.BLNKFIL
81 */
82 typedef enum
83 {
84 IfxPmsPm_BlankingFilterDelay_0ms = 0, /**< \brief No blanking filter delay */
85 IfxPmsPm_BlankingFilterDelay_2_5ms = 1, /**< \brief Blanking delay on 2.5ms */
86 IfxPmsPm_BlankingFilterDelay_5ms = 2, /**< \brief Blanking delay on 5ms */
87 IfxPmsPm_BlankingFilterDelay_10ms = 3, /**< \brief Blanking delay on 10ms */
88 IfxPmsPm_BlankingFilterDelay_20ms = 4, /**< \brief Blanking delay on 20ms */
89 IfxPmsPm_BlankingFilterDelay_40ms = 5, /**< \brief Blanking delay on 40ms */
90 IfxPmsPm_BlankingFilterDelay_80ms = 6, /**< \brief Blanking delay on 80ms */
91 IfxPmsPm_BlankingFilterDelay_160ms = 7, /**< \brief Blanking delay on 160ms */
92 IfxPmsPm_BlankingFilterDelay_320ms = 8, /**< \brief Blanking delay on 320ms */
93 IfxPmsPm_BlankingFilterDelay_640ms = 9, /**< \brief Blanking delay on 640ms */
94 IfxPmsPm_BlankingFilterDelay_1280ms = 0xA, /**< \brief Blanking delay on 1280ms */
95 IfxPmsPm_BlankingFilterDelay_2560ms = 0xB, /**< \brief Blanking delay on 2560ms */
96 IfxPmsPm_BlankingFilterDelay_5120ms = 0xC, /**< \brief Blanking delay on 5120ms */
97 IfxPmsPm_BlankingFilterDelay_10240ms = 0xD /**< \brief Blanking delay on 1024ms */
98 } IfxPmsPm_BlankingFilterDelay;
99
100 /** \brief The Digital filter enable/disabled
101 * As defined in Ifx_PMS.PMSW.CR0.B.ESRxDFEN and Ifx_PMS.PMSW.CR0.B.PINxDFEN
102 */
103 typedef enum
104 {
105 IfxPmsPm_DigitalFilter_bypassed = 0, /**< \brief The Filter is Bypassed */
106 IfxPmsPm_DigitalFilter_used = 1 /**< \brief The Filter is Used */
107 } IfxPmsPm_DigitalFilter;
108
109 /** \brief Edge detection control mode for ESR and PINA/PINB
110 * As defined in Ifx_PMS.PMSW.CR0.B.ESRxEDCON and Ifx_PMS.PMSW.CR0.B.PINxEDCON
111 */
112 typedef enum
113 {
114 IfxPmsPm_EdgeDetectionControl_never = 0, /**< \brief No Trigger is Generated */
115 IfxPmsPm_EdgeDetectionControl_onRisingEdge = 1, /**< \brief Trigger is generated upon a Rising edge */
116 IfxPmsPm_EdgeDetectionControl_onFallingEdge = 2, /**< \brief Triggerr is generated upon a falling edge */
117 IfxPmsPm_EdgeDetectionControl_always = 3 /**< \brief A trigger is generated upon a either edges */
118 } IfxPmsPm_EdgeDetectionControl;
119
120 /** \brief Request to set ESR0 pin pads to either input with weak pullup or tristate.Configured in PMS_PMSWCR5.B.ESR0TRIST
121 */
122 typedef enum
123 {
124 IfxPmsPm_Esr0PinStateRequest_resetOutput = 0,
125 IfxPmsPm_Esr0PinStateRequest_tristate = 1 /**< \brief Set the ESR0 pin pad to tristate */
126 } IfxPmsPm_Esr0PinStateRequest;
127
128 /** \brief List of different statuses related to Load Jump
129 * This is reflected in SCU_PMTRCSR2.B.LJTRUN
130 */
131 typedef enum
132 {
133 IfxPmsPm_LoadJumpStatus_inactive = 0, /**< \brief Load Jump and Load Jump Timer inactive */
134 IfxPmsPm_LoadJumpStatus_swTriggeredRequestActive = 1, /**< \brief A SW triggered Load Jump active and Load Jump Timer active */
135 IfxPmsPm_LoadJumpStatus_hwTriggeredRequestActive = 2 /**< \brief A HW triggered Load Jump active and Load Jump Timer active */
136 } IfxPmsPm_LoadJumpStatus;
137
138 /** \brief Request to set pads to either input with weak pullup or tristate.Configured in PMS_PMSWCR5.B.TRISTREQ
139 */
140 typedef enum
141 {
142 IfxPmsPm_PadStateRequest_inputWithWeakPullUp = 0, /**< \brief Set pads to input with weak pullup */
143 IfxPmsPm_PadStateRequest_tristate = 1 /**< \brief Set pads to tristate */
144 } IfxPmsPm_PadStateRequest;
145
146 typedef enum
147 {
148 IfxPmsPm_PinEdgeTriggerEvent_none = 0, /**< \brief None of the edges will trigger anything */
149 IfxPmsPm_PinEdgeTriggerEvent_risingEdge = 1, /**< \brief Trigger is generated upon a rising edge */
150 IfxPmsPm_PinEdgeTriggerEvent_fallingEdge = 2, /**< \brief Trigger is generated upon a falling edge */
151 IfxPmsPm_PinEdgeTriggerEvent_bothRisingAndFallingEdge = 3 /**< \brief A trigger is generated upon a rising OR falling edge */
152 } IfxPmsPm_PinEdgeTriggerEvent;
153
154 /** \brief Different options for when event triggering is desired(See EVRMONCTRL).
155 */
156 typedef enum
157 {
158 IfxPmsPm_RampingMode_none = 0, /**< \brief Monitoring inactive. This results in a complete reset
159 * of the comparator unit, status bits and filter values and alarm is
160 * deasserted. */
161 IfxPmsPm_RampingMode_up = 1, /**< \brief Event is triggered when the threshold is crossed in
162 * a lower to higher voltage transition. Greater than or equal compare
163 * is used. */
164 IfxPmsPm_RampingMode_down = 2, /**< \brief Event is triggered when the threshold is crossed in
165 * a higher to lower voltage transition. Less than or equal compare is
166 * used. */
167 IfxPmsPm_RampingMode_both = 3 /**< \brief Event is triggered when the threshold is crossed in
168 * either direction. Greater than or equal compare is used. */
169 } IfxPmsPm_RampingMode;
170
171 /** \brief System power mode
172 * As defined in Ifx_SCU.PMCSR[x].B.REQSLP
173 */
174 typedef enum
175 {
176 IfxPmsPm_RequestPowerMode_run = 0, /**< \brief Request CPU Run Mode */
177 IfxPmsPm_RequestPowerMode_idle = 1, /**< \brief Request CPU Idle Mode */
178 IfxPmsPm_RequestPowerMode_sleep = 2, /**< \brief Request CPU Sleep Mode */
179 IfxPmsPm_RequestPowerMode_standby = 3 /**< \brief Request CPU Standby Mode */
180 } IfxPmsPm_RequestPowerMode;
181
182 /** \brief Defines Clocking options for SCR in PMS_PMSWCR4.B.SCRCLKSEL
183 */
184 typedef enum
185 {
186 IfxPmsPm_ScrClocking_100mhzOptional = 0, /**< \brief 100MHz oscillator can be enabled or disabled based on request
187 * from Standby Controller. By default 100 MHz Oscillator is
188 * requested by SCR in Standby Mode. */
189 IfxPmsPm_ScrClocking_bothClocksActiive = 1 /**< \brief 100MHz oscillator is always active irrespective of SCR requests.
190 * Thus both 70 KHz Oscillator and 100 MHz oscillator are active in
191 * Standby Mode. */
192 } IfxPmsPm_ScrClocking;
193
194 /** \brief The RAM being used in Standby mode
195 * As defined in Ifx_PMS.PMSW.CR0.B.STBYRAMSEL
196 */
197 typedef enum
198 {
199 IfxPmsPm_StandbyRamSupply_never = 0, /**< \brief Standby RAM is not supplied */
200 IfxPmsPm_StandbyRamSupply_cpu0Block0 = 1, /**< \brief Standby RAM (CPU0 dLMU RAM Block 0) is supplied */
201 IfxPmsPm_StandbyRamSupply_cpu0Block01 = 2, /**< \brief Standby RAM (CPU0 dLMU RAM Block0 + Block1) is supplied */
202 IfxPmsPm_StandbyRamSupply_cpu1Block01 = 4, /**< \brief Standby RAM (CPU1 dLMU RAM Block0 + Block1) is supplied */
203 IfxPmsPm_StandbyRamSupply_cpu0Cpu1 = 7 /**< \brief Standby RAM (CPU0 dLMU RAM Block0 + Block1) & (CPU1 dLMU RAM Block0 + Block1) is supplied */
204 } IfxPmsPm_StandbyRamSupply;
205
206 /** \brief Defines events to trigger entry to Standby mode.
207 */
208 typedef enum
209 {
210 IfxPmsPm_StandbyTriggerMode_software = 0, /**< \brief Standby request using MODULE_SCU.PMCSRx.B.REQSLP */
211 IfxPmsPm_StandbyTriggerMode_hardware_undervoltage = 1, /**< \brief Standby trigger arising from VEXT/VDD undervoltage */
212 IfxPmsPm_StandbyTriggerMode_hardware_nmi = 4 /**< \brief Standby request arising from any NMI/ESR1 pin assertion */
213 } IfxPmsPm_StandbyTriggerMode;
214
215 /** \brief types of event
216 */
217 typedef enum
218 {
219 IfxPmsPm_ThresholdEvent_overvoltage = 0, /**< \brief Voltage is greater than the higher threshold */
220 IfxPmsPm_ThresholdEvent_undervoltage = 4 /**< \brief Voltage is lesser than the lower threshold */
221 } IfxPmsPm_ThresholdEvent;
222
223 /** \brief Direction of Voltage Droop(positive and negative)
224 * To be specified in SCU_PMTRCSR3.B.VDROOPREQ
225 */
226 typedef enum
227 {
228 IfxPmsPm_VoltageDroopRequest_positive = 1, /**< \brief A Positive Voltage Droop Request made and taken. Voltage Droop
229 * Timer activated. */
230 IfxPmsPm_VoltageDroopRequest_negative = 2 /**< \brief A Negative Voltage Droop Request made and taken. Voltage Droop
231 * Timer activated. */
232 } IfxPmsPm_VoltageDroopRequest;
233
234 /** \brief List of different statuses related to Load Jump
235 * This is reflected in SCU_PMTRCSR3.B.VDTRUN
236 */
237 typedef enum
238 {
239 IfxPmsPm_VoltageDroopStatus_inactive = 0, /**< \brief Voltage Droop and Voltage Droop Timer inactive */
240 IfxPmsPm_VoltageDroopStatus_swTriggeredRequestActive = 1, /**< \brief A SW triggered Voltage Droop active and Voltage Droop Timer
241 * active */
242 IfxPmsPm_VoltageDroopStatus_hwTriggeredRequestActive = 2 /**< \brief A HW triggered Voltage Droop active and Voltage Droop Timer
243 * active */
244 } IfxPmsPm_VoltageDroopStatus;
245
246 /** \brief Lists out volatge droop steps
247 */
248 typedef enum
249 {
250 IfxPmsPm_VoltageDroopStep_0mV = 0, /**< \brief Voltage Droop request of 0 mV */
251 IfxPmsPm_VoltageDroopStep_5mV = 1U, /**< \brief Voltage Droop request of 5 mV */
252 IfxPmsPm_VoltageDroopStep_10mV = 2U, /**< \brief Voltage Droop request of 10 mV */
253 IfxPmsPm_VoltageDroopStep_15mV = 3U, /**< \brief Voltage Droop request of 15 mV */
254 IfxPmsPm_VoltageDroopStep_20mV = 4U, /**< \brief Voltage Droop request of 20 mV */
255 IfxPmsPm_VoltageDroopStep_25mV = 5U, /**< \brief Voltage Droop request of 25 mV */
256 IfxPmsPm_VoltageDroopStep_30mV = 6U, /**< \brief Voltage Droop request of 30 mV */
257 IfxPmsPm_VoltageDroopStep_35mV = 7U, /**< \brief Voltage Droop request of 35 mV */
258 IfxPmsPm_VoltageDroopStep_40mV = 8U, /**< \brief Voltage Droop request of 40 mV */
259 IfxPmsPm_VoltageDroopStep_45mV = 9U, /**< \brief Voltage Droop request of 45 mV */
260 IfxPmsPm_VoltageDroopStep_50mV = 10U, /**< \brief Voltage Droop request of 50 mV */
261 IfxPmsPm_VoltageDroopStep_55mV = 11U, /**< \brief Voltage Droop request of 55 mV */
262 IfxPmsPm_VoltageDroopStep_60mV = 12U, /**< \brief Voltage Droop request of 60 mV */
263 IfxPmsPm_VoltageDroopStep_65mV = 13U, /**< \brief Voltage Droop request of 65 mV */
264 IfxPmsPm_VoltageDroopStep_70mV = 14U, /**< \brief Voltage Droop request of 70 mV */
265 IfxPmsPm_VoltageDroopStep_75mV = 15U /**< \brief Voltage Droop request of 75 mV */
266 } IfxPmsPm_VoltageDroopStep;
267
268 /** \brief Different voltage sources extrnally supplied to/inside AURIX2G
269 */
270 typedef enum
271 {
272 IfxPmsPm_VoltageSource_vdd = 0, /**< \brief 1.25V VDD voltage source(either from EVRC/supplied externally) */
273 IfxPmsPm_VoltageSource_vddpd = 2, /**< \brief 1.25V VDDPD Pre-Regulator Voltage */
274 IfxPmsPm_VoltageSource_vddp3 = 8, /**< \brief 3.3V VDDP3(either generated by EVR33 or externally provided) */
275 IfxPmsPm_VoltageSource_vddm = 10, /**< \brief VDDM - Analog supply for ADCs */
276 IfxPmsPm_VoltageSource_vext = 16, /**< \brief VEXT(3.3V or 5V) external supply */
277 IfxPmsPm_VoltageSource_vevrsb = 18 /**< \brief VEVRSB(3.3V or 5V) - Standby Domain Supply */
278 } IfxPmsPm_VoltageSource;
279
280 /** \brief Wake up configuration defined in Ifx_PMS.PMSW.CR0.B.ESRxWKEN,Ifx_PMS.PMSW.CR0.B.PINxWKEN
281 * and Ifx_PMS.PMSW.CR0.B.PORSTWKEN
282 */
283 typedef enum
284 {
285 IfxPmsPm_WakeupOn_esr0 = 0, /**< \brief ESR0 Wake-up enable from Standby */
286 IfxPmsPm_WakeupOn_esr1 = 1, /**< \brief ESR1 Wake-up enable from Standby */
287 IfxPmsPm_WakeupOn_pinA = 2, /**< \brief PINA Wake-up enable from Standby */
288 IfxPmsPm_WakeupOn_pinB = 3, /**< \brief PINB Wake-up enable from Standby */
289 IfxPmsPm_WakeupOn_porst = 4, /**< \brief PORST Wake-up enable from Standby */
290 IfxPmsPm_WakeupOn_timer = 5, /**< \brief WUT Wake-up enable from Standby */
291 IfxPmsPm_WakeupOn_power = 6, /**< \brief Power Wake-up enable Standby */
292 IfxPmsPm_WakeupOn_scr = 7 /**< \brief SCR Wake-up enable from Standby */
293 } IfxPmsPm_WakeupOn;
294
295 /** \brief Select wakup timer operation mode
296 * As defined in Ifx_PMS.PMSW.CR3.B.WUTMODE
297 */
298 typedef enum
299 {
300 IfxPmsPm_WakeupTimerMode_autoReload = 0, /**< \brief WUT auto reload mode selected */
301 IfxPmsPm_WakeupTimerMode_autoStop = 1 /**< \brief WUT auto stop mode selected */
302 } IfxPmsPm_WakeupTimerMode;
303
304 /** \brief Clock for WUT
305 */
306 typedef enum
307 {
308 IfxPmsPm_WutClock_70kHz = 0, /**< \brief WUT has a 70 kHz clock input */
309 IfxPmsPm_WutClock_68Hz = 1 /**< \brief Clock to WUT passes through a divider of 10 */
310 } IfxPmsPm_WutClock;
311
312 /** \} */
313
314 /******************************************************************************/
315 /*-----------------------------Data Structures--------------------------------*/
316 /******************************************************************************/
317
318 /** \addtogroup IfxLld_Pms_Std_Pm_DataStructures
319 * \{ */
320 /** \brief Options for Load Jump
321 */
322 typedef struct
323 {
324 boolean enableLoadJumpTimer; /**< \brief Enable or disable Load Jump Timer */
325 boolean enableLoadJumpTimerOverflowFlag; /**< \brief Enable or disable update of Load Jump Timer Overflow Flag */
326 boolean enableLoadJumpTimerOverflowInterrupt; /**< \brief Enable or disable Load Jump Timer Overflow Interrupt */
327 } IfxPmsPm_LoadJumpConfig;
328
329 /** \brief Configurable options for sleep mode
330 */
331 typedef struct
332 {
333 boolean mcanEnabled; /**< \brief Whether MCAN will be enabled ir disabled during Sleep mode. */
334 IfxScuCcu_Fsource mcanClockSource; /**< \brief Clock Source for MCAN
335 * IfxScuCcu_Fsource_1 is f_source1 from K2 divider of Peripheral PLL
336 * IfxScuCcu_Fsource_2 is Oscillator clock bypassing the Peripheral PLL */
337 boolean asclinEnabled; /**< \brief Whether ASCLIN will be enabled ir disabled during Sleep mode. */
338 IfxScuCcu_Fsource asclinClockSource; /**< \brief Clock Source for ASCLIN
339 * IfxScuCcu_Fsource_1 is f_source1 from K2 divider of Peripheral PLL
340 * IfxScuCcu_Fsource_2 is Oscillator clock bypassing the Peripheral PLL */
341 boolean gpt12Enabled; /**< \brief Whether GPT12 will be enabled ir disabled during Sleep mode. */
342 boolean ccu6Enabled; /**< \brief Whether CCU6 will be enabled ir disabled during Sleep mode. */
343 boolean qspiEnabled; /**< \brief Whether QSPI will be enabled ir disabled during Sleep mode. */
344 IfxScuCcu_Fsource qspiClockSource; /**< \brief Clock Source for MCAN
345 * IfxScuCcu_Fsource_1 is f_source1 from K2 divider of Peripheral PLL
346 * IfxScuCcu_Fsource_2 is f_source2 from K3 divider of Peripheral PLL */
347 boolean gethEnabled; /**< \brief Whether QSPI will be enabled ir disabled during Sleep mode. */
348 boolean i2cEnabled; /**< \brief Whether I2C will be enabled ir disabled during Sleep mode. */
349 boolean gtmEnabled; /**< \brief Whether GTM will be enabled ir disabled during Sleep mode. */
350 boolean stmEnabled; /**< \brief Whether STM will be enabled ir disabled during Sleep mode. */
351 IfxCpu_ResourceCpu masterCpu; /**< \brief Core index of the master CPU */
352 } IfxPmsPm_SleepConfig;
353
354 /** \brief Configurable Standby options
355 */
356 typedef struct
357 {
358 IfxPmsPm_StandbyTriggerMode trigger; /**< \brief Events which'll trigger Standby mode */
359 IfxPmsPm_StandbyRamSupply standbyRamBlock; /**< \brief Options for which part of the DLMU can be provided supply during standby. */
360 boolean enableScr; /**< \brief Whether to enable SCR or not. */
361 IfxPmsPm_ScrClocking scrClockSupply; /**< \brief Options for SCR clock supply */
362 IfxPmsPm_BlankingFilterDelay minDelayBeforeWakeUp; /**< \brief Selecting the duration, starting from Standby entry, after which wake-up triggers are effective. */
363 IfxPmsPm_PadStateRequest padStateRequest; /**< \brief Request to remain in input with weak pull-up or get into tristate. */
364 IfxPmsPm_Esr0PinStateRequest esr0PinStateRequest; /**< \brief Request to remain in input with weak pull-up or get into tristate. */
365 boolean enableStandbyOnVextRampDown; /**< \brief Enable Standby On VEXT Ramp Down */
366 boolean enableStandbyOnVddRampDown; /**< \brief Enable Standby On VDD Ramp Down */
367 float32 vextUnderVoltageThresholdLevel; /**< \brief Undervoltage threshold for VEXT */
368 float32 vddUnderVoltageThresholdLevel; /**< \brief Undervoltage threshold for VDD */
369 boolean enableWakeupOnEsr0; /**< \brief Enable wake-up on ESR0 */
370 boolean enableWakeupOnEsr1; /**< \brief Enable wake-up on ESR1 */
371 boolean enableWakeupOnPinA; /**< \brief Enable wake-up on PINA */
372 boolean enableWakeupOnPinB; /**< \brief Enable wake-up on PINB */
373 boolean enableWakeupOnTimer; /**< \brief Enable wake-up on Wake Up Timer(WUT) */
374 boolean enableWakeupOnPorst; /**< \brief Enable wake-up on PORST pin assertion */
375 boolean enableWakeupOnScr; /**< \brief Enable wake-up on request from SCR */
376 uint8 enableWakeupOnPower; /**< \brief Enable wake-up on VEXT ramp up. */
377 boolean useWutStandbyAutoStopMode; /**< \brief Use the Auto Stop mode in WUT */
378 uint32 wutReloadValue; /**< \brief The value from which the WUT will start downward count upon entering Standby */
379 IfxPmsPm_WutClock wutClock; /**< \brief Clock select for WUT */
380 IfxPmsPm_DigitalFilter esr0DigitalFilterUsage; /**< \brief Whether to use didital filer withe interpreting the pulse on ESR0 pin */
381 IfxPmsPm_DigitalFilter pinADigitalFilterUsage; /**< \brief Whether to use didital filer withe interpreting the pulse on PINA pin */
382 IfxPmsPm_DigitalFilter esr1DigitalFilterUsage; /**< \brief Whether to use didital filer withe interpreting the pulse on ESR1 pin */
383 IfxPmsPm_DigitalFilter pinBDigitalFilterUsage; /**< \brief Whether to use didital filer withe interpreting the pulse on PINB pin */
384 IfxPmsPm_PinEdgeTriggerEvent esr0TriggerEvent; /**< \brief Trigger will be generated on which pulse edge of a pulse on ESR0 pin. */
385 IfxPmsPm_PinEdgeTriggerEvent esr1TriggerEvent; /**< \brief Trigger will be generated on which pulse edge of a pulse on ESR1 pin. */
386 IfxPmsPm_PinEdgeTriggerEvent pinATriggerEvent; /**< \brief Trigger will be generated on which pulse edge of a pulse on PINA pin. */
387 IfxPmsPm_PinEdgeTriggerEvent pinBTriggerEvent; /**< \brief Trigger will be generated on which pulse edge of a pulse on PINB pin. */
388 IfxCpu_ResourceCpu masterCpu; /**< \brief CPU which can call powerdown modes.In IfxPmsPm_startStandbySequenceInFlash(),this value is being filled to reflect the core in which standby sequence is running as we're explicitly making it as the master CPU. */
389 } IfxPmsPm_StandbyConfig;
390
391 /** \brief Volatge Droop Configuration
392 */
393 typedef struct
394 {
395 boolean enableVoltageDroopTimer; /**< \brief Enable or disable usage of Voltage Droop Timer */
396 boolean enableVoltageDroopTimerOverflowFlag; /**< \brief Enable or disable usage of Voltage Droop Timer Overflow Flag */
397 boolean enableVoltageDroopTimerOverflowInterrupt; /**< \brief Enable or disable usage of Voltage Droop Interrupt */
398 IfxPmsPm_VoltageDroopRequest droopRequestType; /**< \brief Type of Voltage Droop Request */
399 IfxPmsPm_VoltageDroopStep droopStep; /**< \brief Value by which voltage change must happen */
400 } IfxPmsPm_VoltageDroopConfig;
401
402 /** \brief Configure Wakeup in standby mode
403 */
404 typedef struct
405 {
406 IfxPmsPm_WakeupOn wakeup; /**< \brief wake-up configuration */
407 IfxPmsPm_DigitalFilter filter; /**< \brief bypass/use digital filter */
408 IfxPmsPm_EdgeDetectionControl trigger; /**< \brief Enable Wake-up on rising or falling edge */
409 IfxPmsPm_StandbyRamSupply standbyRam; /**< \brief RAM being supply during standby mode */
410 IfxPmsPm_WakeupTimerMode mode; /**< \brief wake-up timer mode */
411 uint32 reloadCounter; /**< \brief reload count from where value starts counting down used in case of WUT configuration */
412 } IfxPmsPm_WakeupConfig;
413
414 /** \} */
415
416 /** \addtogroup IfxLld_Pms_Std_Pm_SystemModes
417 * \{ */
418
419 /******************************************************************************/
420 /*-------------------------Inline Function Prototypes-------------------------*/
421 /******************************************************************************/
422
423 /** \brief set system into sleep mode
424 * \param powerMode Select System power mode
425 * \return None
426 *
427 * IfxPmsPm_setSleepMode(IfxPmsPm_RequestPowerMode_idle);
428 *
429 */
430 IFX_INLINE void IfxPmsPm_setSleepMode(IfxPmsPm_RequestPowerMode powerMode);
431
432 /******************************************************************************/
433 /*-------------------------Global Function Prototypes-------------------------*/
434 /******************************************************************************/
435
436 /** \brief set system into stand by mode
437 * Note: In this API Alarm has been disabled.Enable of SMU alarm has to be taken care
438 * seprately at application level
439 * \param pms Pointer to Module Space
440 * \param config Pointer to Wakeup configuration Structure
441 * \param powerMode Selects System standby mode
442 * \return None
443 *
444 * IfxPmsPm_WakeupConfig config;
445 * config.wakeup =IfxPmsPm_WakeupOn_esr1; //Wakeup using ESR1
446 * config.filter = IfxPmsPm_DigitalFilter_used; //Digital Filter is used
447 * config.trigger = IfxPmsPm_EdgeDetectionControl_onRisingEdge; //Trigger is generated upon rising edge
448 * config.standbyRam = IfxPmsPm_StandbyRamSupply_cpu0Block0; // Standby RAM (CPU0 dLMU RAM Block 0) is supplied
449 * IfxPmsPm_setStandbyMode(&MODULE_PMS,&config, IfxPmsPm_RequestPowerMode_standby);
450 *
451 */
452 IFX_EXTERN void IfxPmsPm_setStandbyMode(Ifx_PMS *pms, IfxPmsPm_WakeupConfig *config, IfxPmsPm_RequestPowerMode powerMode);
453
454 /** \brief This function will initialize the configuration structure with default values.
455 * NOTE:
456 *
457 * 1. Default values of vextUnderVoltageThresholdLevel and vddUnderVoltageThresholdLevel in the StandbyConfig structure are set to 0.
458 * Set it to appropriate levels(depending on application) before calling IfxPmsPm_startStandbySequenceInFlash().
459 * \param standbyConfig Configurable options for Standby Mode
460 * \return None
461 */
462 IFX_EXTERN void IfxPmsPm_initStandbyConfig(IfxPmsPm_StandbyConfig *standbyConfig);
463
464 /**
465 * \param standbyConfig Configuration structure with initialized Standby configuration options
466 * \param clockConfig Clock Configuration, with frequency ramp-up/down sequence
467 * \return None
468 */
469 IFX_EXTERN void IfxPmsPm_startStandbySequenceInFlash(IfxPmsPm_StandbyConfig *standbyConfig, const IfxScuCcu_Config *clockConfig);
470
471 /**
472 * \param standbyConfig Configuration structure with initialized Standby configuration options
473 * \param clockConfig Clock Configuration, with frequency ramp-up/down sequence
474 * \return None
475 */
476 IFX_EXTERN void IfxPmsPm_continueStandbySequenceInRAM(IfxPmsPm_StandbyConfig *standbyConfig, const IfxScuCcu_Config *clockConfig);
477
478 /**
479 * \param sleepConfig Configurable options for sleep mode
480 * \return None
481 */
482 IFX_EXTERN void IfxPmsPm_initSleepConfig(IfxPmsPm_SleepConfig *sleepConfig);
483
484 /**
485 * \param sleepConfig Configurable options for sleep mode
486 * \param clockConfig
487 * \return None
488 */
489 IFX_EXTERN void IfxPmsPm_startSleepSequenceinFlash(IfxPmsPm_SleepConfig *sleepConfig, IfxScuCcu_Config *clockConfig);
490
491 /** \brief This is to be placed in PSPR of the Master CPU
492 * \param sleepConfig Configurable options for sleep mode
493 * \return None
494 */
495 IFX_EXTERN void IfxPmsPm_continueSleepSequenceInRAM(IfxPmsPm_SleepConfig *sleepConfig);
496
497 /** \} */
498
499 /** \addtogroup IfxLld_Pms_Std_Pm_CpuModes
500 * \{ */
501
502 /******************************************************************************/
503 /*-------------------------Inline Function Prototypes-------------------------*/
504 /******************************************************************************/
505
506 /** \brief Set a given CPU as a Master CPU i.e. ability to trigger power down modes
507 * \param cpuIndex Index to identify different CPU cores
508 * \return None
509 */
510 IFX_INLINE void IfxPmsPm_setMasterCpu(IfxCpu_ResourceCpu cpuIndex);
511
512 /** \brief Gets the index of Master CPU
513 */
514 IFX_INLINE IfxCpu_ResourceCpu IfxPmsPm_getMasterCpu(void);
515
516 /******************************************************************************/
517 /*-------------------------Global Function Prototypes-------------------------*/
518 /******************************************************************************/
519
520 /** \brief Set core mode(Idle/Run)
521 * \param cpuIndex specifies cpu index
522 * \param mode Select mode to be set to put CPU into IDLE/RUN State
523 * \return TRUE: If activity successfully performed
524 * FALSE: If Activity is not performed successfully
525 *
526 * IfxCpu_setCoreMode(&MODULE_CPU0, IfxCpu_CoreMode_idle);
527 *
528 */
529 IFX_EXTERN boolean IfxPmsPm_setCoreMode(IfxCpu_ResourceCpu cpuIndex, IfxCpu_CoreMode mode);
530
531 /** \} */
532
533 /** \addtogroup IfxLld_Pms_Std_Pm_WakeupModes
534 * \{ */
535
536 /******************************************************************************/
537 /*-------------------------Global Function Prototypes-------------------------*/
538 /******************************************************************************/
539
540 /** \brief Enable Wakeup using PORST/ESR1/PINA/PINB/WUT/SCR/Power
541 * \param pms Pointer to PMS Module space
542 * \param wakeup Pointer to wakeup configuration strucutre
543 * \return None
544 */
545 IFX_EXTERN void IfxPmsPm_enableWakeup(Ifx_PMS *pms, IfxPmsPm_WakeupConfig *wakeup);
546
547 /**
548 * \param standbyConfig Pointer to Standby Configuration Structure
549 * \return None
550 */
551 IFX_EXTERN void IfxPmsPm_configureWakeup(IfxPmsPm_StandbyConfig *standbyConfig);
552
553 /**
554 * \return None
555 */
556 IFX_EXTERN void IfxPmsPm_initiateWakeup(IfxScuCcu_Config *clockConfig);
557
558 /** \} */
559
560 /******************************************************************************/
561 /*-------------------------Inline Function Prototypes-------------------------*/
562 /******************************************************************************/
563
564 /** \brief Enables the usage of load jump timer
565 * \return None
566 */
567 IFX_INLINE void IfxPmsPm_enableLoadJumpTimer(void);
568
569 /** \brief Disables the usage of load jump timer
570 * \return None
571 */
572 IFX_INLINE void IfxPmsPm_disableLoadJumpTimer(void);
573
574 /** \brief Enables the update of SCU_PMTRCSR2.B.LJTOV status bit on timer overflow or timeout.
575 * \return None
576 */
577 IFX_INLINE void IfxPmsPm_enableLoadJumpTimerOverflowFlag(void);
578
579 /** \brief Disables the update of SCU_PMTRCSR2.B.LJTOV status bit on timer overflow or timeout.
580 * \return None
581 */
582 IFX_INLINE void IfxPmsPm_disableLoadJumpTimerOverflowFlag(void);
583
584 /** \brief Enables the activation of interrupt on timer overflow or timeout.
585 * \return None
586 */
587 IFX_INLINE void IfxPmsPm_enableLoadJumpTimerOverflowInterrupt(void);
588
589 /** \brief Disables the activation of interrupt on timer overflow or timeout.
590 * \return None
591 */
592 IFX_INLINE void IfxPmsPm_disableLoadJumpTimerOverflowInterrupt(void);
593
594 /** \brief Starts Load jump timer. The SCU_PMTRCSR0.B.LJTSTRT bitfield remains set on a write and is cleared when SCU_PMTRCSR2.B.LJTOV bit is set if SCU_PMTRCSR0.B.LJTOVEN bit is enabled(Update of Load Jump Timer Overflow Flag SCU_PMTRCSR2.B.LJTOV is enabled ).
595 * \return None
596 */
597 IFX_INLINE void IfxPmsPm_startLoadJumpTimer(void);
598
599 /** \brief This stops the Load jump timer. The Load Jump Timer stops counter at the current value and timer
600 * re-starts from that value when LJTSTP is cleared and LJTSTRT is set.
601 * \return None
602 */
603 IFX_INLINE void IfxPmsPm_stopLoadJumpTimer(void);
604
605 /** \brief Clears the Load Jump timer count
606 * \return None
607 */
608 IFX_INLINE void IfxPmsPm_clearLoadJumpTimer(void);
609
610 /** \brief Clears Load Jump Timer Overflow Flag (SCU_PMTRCSR2.B.LJTOV) and sets PMTRCSR3.B.VDROOPREQ and PMTRCSR2.B.LDJMPREQ to
611 * 0 if Load Jump Timer Overflow Flag bit is enabled
612 * \return None
613 */
614 IFX_INLINE void IfxPmsPm_clearLoadJumpTimerOverflowFlag(void);
615
616 /** \brief Returns status of Load Jump Timer Overflow condition
617 * \return Status of Load Jump Timer Overflow condition
618 */
619 IFX_INLINE boolean IfxPmsPm_hasLoadJumpTimerOverflowOccured(void);
620
621 /** \brief Loads the compare value for Load Jump Timer in SCU_PMTRCSR1.B.LJTCV
622 * When the Timer count reaches this value, overflow condition occurs and the respective flag and interrupt occurs, if enabled
623 * \param compareValue Compare value for Load Jump Timer
624 * \return None
625 */
626 IFX_INLINE void IfxPmsPm_setLoadJumpTimerCompareValue(uint16 compareValue);
627
628 /** \brief Reads the Load Jump Timer Compare value
629 * \return Load Jump Timer compare value
630 */
631 IFX_INLINE uint16 IfxPmsPm_getLoadJumpTimerCompareValue(void);
632
633 /** \brief Returns the Load Jump Timer count value
634 * \return Load Jump Timer count value
635 */
636 IFX_INLINE uint16 IfxPmsPm_getLoadJumpTimerCountValue(void);
637
638 /** \brief Issues a Load Jump request
639 * \return None
640 */
641 IFX_INLINE void IfxPmsPm_requestLoadJump(void);
642
643 /** \brief Returns the status of Load Jump request
644 * \return Load Jump request status
645 */
646 IFX_INLINE IfxPmsPm_LoadJumpStatus IfxPmsPm_getLoadJumpStatus(void);
647
648 /** \brief Enables the usage of Voltage Droop Timer
649 * \return None
650 */
651 IFX_INLINE void IfxPmsPm_enableVoltageDroopTimer(void);
652
653 /** \brief Enables the update of Voltage Droop Timer Overflow Flag on timer overflow or timeout.
654 * \return None
655 */
656 IFX_INLINE void IfxPmsPm_enableVoltageDroopTimerOverflowFlag(void);
657
658 /** \brief Enables the activation of interrupt on timer overflow or timeout.
659 * \return None
660 */
661 IFX_INLINE void IfxPmsPm_enableVoltageDroopTimerOverflowInterrupt(void);
662
663 /** \brief Disables the usage of Voltage Droop Timer
664 * \return None
665 */
666 IFX_INLINE void IfxPmsPm_disableVoltageDroopTimer(void);
667
668 /** \brief Disables the update of Voltage Droop Timer Overflow Flag on timer overflow or timeout.
669 * \return None
670 */
671 IFX_INLINE void IfxPmsPm_disableVoltageDroopTimerOverflowFlag(void);
672
673 /** \brief Disables the activation of interrupt on timer overflow or timeout.
674 * \return None
675 */
676 IFX_INLINE void IfxPmsPm_disableVoltageDroopTimerOverflowInterrupt(void);
677
678 /** \brief Starts Voltage Droop timer
679 * \return None
680 */
681 IFX_INLINE void IfxPmsPm_startVoltageDroopTimer(void);
682
683 /** \brief Stops Voltage Droop timer and SCU cancels the droop request.
684 * \return None
685 */
686 IFX_INLINE void IfxPmsPm_stopVoltageDroopTimer(void);
687
688 /** \brief Clear Voltage Droop timer count. Resets the Voltage Droop Timer and clears VDTRUN if usage of Voltage Droop Timer is enabled.
689 * \return None
690 */
691 IFX_INLINE void IfxPmsPm_clearVoltageDroopTimer(void);
692
693 /** \brief Clears Voltage Droop Timer Overflow Flag if Overflow Flag is enabled
694 * \return None
695 */
696 IFX_INLINE void IfxPmsPm_clearVoltageDroopTimerOverflowFlag(void);
697
698 /** \brief Returns Status of Voltage Droop Time overflow condition
699 * \return Status of Voltage Droop Time overflow
700 */
701 IFX_INLINE boolean IfxPmsPm_hasVoltageDroopTimerOverflowOccured(void);
702
703 /** \brief Loads the compare value for Voltage Droop Timer in SCU_PMTRCSR1.B.VDTCV
704 * When the Timer count reaches this value, overflow condition occurs and the respective flag and interrupt occurs, if enabled
705 * \param compareValue Voltage Droop Timer Compare Value
706 * \return None
707 */
708 IFX_INLINE void IfxPmsPm_setVoltageDroopTimerCompareValue(uint16 compareValue);
709
710 /** \brief Reads the Voltage Droop Timer Compare Value
711 * \return Voltage Droop Timer Compare Value
712 */
713 IFX_INLINE uint16 IfxPmsPm_getVoltageDroopTimerCompareValue(void);
714
715 /** \brief Gives Voltage Droop Timer count value
716 * \return Voltage Droop Timer Count Value
717 */
718 IFX_INLINE uint16 IfxPmsPm_readVoltageDroopTimerCountValue(void);
719
720 /** \brief Issue a voltage droop request
721 * \param droopRequest Type of Voltage Droop Request
722 * \return None
723 */
724 IFX_INLINE void IfxPmsPm_requestVoltageDroop(IfxPmsPm_VoltageDroopRequest droopRequest);
725
726 /** \brief Returns the status of Load Jump request
727 * \return Voltage Droop request status
728 */
729 IFX_INLINE IfxPmsPm_VoltageDroopStatus IfxPmsPm_getVoltageDroopStatus(void);
730
731 /** \brief Loads the amount by which voltage will be requested to change
732 * \param droopStep The amount why by voltage change is requested
733 * \return None
734 */
735 IFX_INLINE void IfxPmsPm_setVoltageDroopStep(IfxPmsPm_VoltageDroopStep droopStep);
736
737 /******************************************************************************/
738 /*-------------------------Global Function Prototypes-------------------------*/
739 /******************************************************************************/
740
741 /**
742 * \param pms Pointer to PMS SFRs
743 * \param source Voltage source to be monitored
744 * \param event Type of event to be monitored.
745 * \param mode Ramping directions on which event needs to be detected.
746 * \return None
747 */
748 IFX_EXTERN void IfxPmsPm_configureSupplyMonitoring(Ifx_PMS *pms, IfxPmsPm_VoltageSource source, IfxPmsPm_ThresholdEvent event, IfxPmsPm_RampingMode mode);
749
750 /**
751 * \param loadJumpConfig Initialize the Load Jump configuration
752 * \return None
753 */
754 IFX_EXTERN void IfxPmsPm_initLoadJumpConfig(IfxPmsPm_LoadJumpConfig *loadJumpConfig);
755
756 /**
757 * \return None
758 */
759 IFX_EXTERN void IfxPmsPm_initAndRequestLoadJump(IfxPmsPm_LoadJumpConfig *loadJumpConfig);
760
761 /**
762 * \return None
763 */
764 IFX_EXTERN void IfxPmsPm_initVoltageDroopConfig(IfxPmsPm_VoltageDroopConfig *voltageDroopConfig);
765
766 /**
767 * \param voltageDroopConfig Voltage Droop Configuration Structure
768 * \return None
769 */
770 IFX_EXTERN void IfxPmsPm_initAndRequestVoltageDroop(IfxPmsPm_VoltageDroopConfig *voltageDroopConfig);
771
772 /** \brief Copies dataSize bytes of data to standby RAM starting at dataPointer and appends the CRC over the copied data to it.
773 * \param dataPointer Pointer to beginning of the region containing addresses of the data to be saved.
774 * This is in standby RAM
775 * \param dataSize Total size(in units of 32 bit word) of the data to be copied
776 * \return None
777 */
778 IFX_EXTERN void IfxPmsPm_handleStandbyRam(uint32 *dataPointer, uint8 dataSize);
779
780 /******************************************************************************/
781 /*---------------------Inline Function Implementations------------------------*/
782 /******************************************************************************/
783
784 IFX_INLINE void IfxPmsPm_setSleepMode(IfxPmsPm_RequestPowerMode powerMode)
785 {
786 uint16 cpuWdtPw = IfxScuWdt_getCpuWatchdogPassword();
787
788 uint8 index = IfxCpu_getCoreIndex();
789 IfxScuWdt_clearCpuEndinit(cpuWdtPw);
790
791 switch (index)
792 {
793 case 0:
794 MODULE_SCU.PMCSR0.B.REQSLP = powerMode;
795 break;
796 case 1:
797 MODULE_SCU.PMCSR1.B.REQSLP = powerMode;
798 break;
799 case 2:
800 MODULE_SCU.PMCSR2.B.REQSLP = powerMode;
801 break;
802 case 3:
803 MODULE_SCU.PMCSR3.B.REQSLP = powerMode;
804 break;
805 }
806
807 IfxScuWdt_setCpuEndinit(cpuWdtPw);
808 }
809
810
811 IFX_INLINE void IfxPmsPm_setMasterCpu(IfxCpu_ResourceCpu cpuIndex)
812 {
813 uint16 endinitSfty_pw;
814 /*get the watch-dog passwords for usage with this function*/
815 endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPasswordInline();
816 /* Reset Safety ENDINIT, SCU_CCUCON registers are protected*/
817 IfxScuWdt_clearSafetyEndinitInline(endinitSfty_pw);
818 MODULE_SCU.PMSWCR1.B.CPUSEL = cpuIndex + 1; //check if it's xENDINIT protected
819 IfxScuWdt_setSafetyEndinitInline(endinitSfty_pw);
820 }
821
822
823 IFX_INLINE IfxCpu_ResourceCpu IfxPmsPm_getMasterCpu(void)
824 {
825 return (IfxCpu_ResourceCpu)(MODULE_SCU.PMSWCR1.B.CPUSEL - 1);
826 }
827
828
829 IFX_INLINE void IfxPmsPm_enableLoadJumpTimer(void)
830 {
831 uint16 safetyWdtPw = IfxScuWdt_getSafetyWatchdogPassword();
832 IfxScuWdt_clearSafetyEndinit(safetyWdtPw);
833 SCU_PMTRCSR0.B.LJTEN = 1;
834 IfxScuWdt_setSafetyEndinit(safetyWdtPw);
835 }
836
837
838 IFX_INLINE void IfxPmsPm_disableLoadJumpTimer(void)
839 {
840 uint16 safetyWdtPw = IfxScuWdt_getSafetyWatchdogPassword();
841 IfxScuWdt_clearSafetyEndinit(safetyWdtPw);
842 SCU_PMTRCSR0.B.LJTEN = 0;
843 IfxScuWdt_setSafetyEndinit(safetyWdtPw);
844 }
845
846
847 IFX_INLINE void IfxPmsPm_enableLoadJumpTimerOverflowFlag(void)
848 {
849 uint16 safetyWdtPw = IfxScuWdt_getSafetyWatchdogPassword();
850 IfxScuWdt_clearSafetyEndinit(safetyWdtPw);
851 SCU_PMTRCSR0.B.LJTOVEN = 1;
852 IfxScuWdt_setSafetyEndinit(safetyWdtPw);
853 }
854
855
856 IFX_INLINE void IfxPmsPm_disableLoadJumpTimerOverflowFlag(void)
857 {
858 uint16 safetyWdtPw = IfxScuWdt_getSafetyWatchdogPassword();
859 IfxScuWdt_clearSafetyEndinit(safetyWdtPw);
860 SCU_PMTRCSR0.B.LJTOVEN = 0;
861 IfxScuWdt_setSafetyEndinit(safetyWdtPw);
862 }
863
864
865 IFX_INLINE void IfxPmsPm_enableLoadJumpTimerOverflowInterrupt(void)
866 {
867 uint16 safetyWdtPw = IfxScuWdt_getSafetyWatchdogPassword();
868 IfxScuWdt_clearSafetyEndinit(safetyWdtPw);
869 SCU_PMTRCSR0.B.LJTOVIEN = 1;
870 IfxScuWdt_setSafetyEndinit(safetyWdtPw);
871 }
872
873
874 IFX_INLINE void IfxPmsPm_disableLoadJumpTimerOverflowInterrupt(void)
875 {
876 uint16 safetyWdtPw = IfxScuWdt_getSafetyWatchdogPassword();
877 IfxScuWdt_clearSafetyEndinit(safetyWdtPw);
878 SCU_PMTRCSR0.B.LJTOVIEN = 0;
879 IfxScuWdt_setSafetyEndinit(safetyWdtPw);
880 }
881
882
883 IFX_INLINE void IfxPmsPm_startLoadJumpTimer(void)
884 {
885 uint16 safetyWdtPw = IfxScuWdt_getSafetyWatchdogPassword();
886 IfxScuWdt_clearSafetyEndinit(safetyWdtPw);
887 SCU_PMTRCSR0.B.LJTSTRT = 1;
888 IfxScuWdt_setSafetyEndinit(safetyWdtPw);
889 }
890
891
892 IFX_INLINE void IfxPmsPm_stopLoadJumpTimer(void)
893 {
894 uint16 safetyWdtPw = IfxScuWdt_getSafetyWatchdogPassword();
895 IfxScuWdt_clearSafetyEndinit(safetyWdtPw);
896 SCU_PMTRCSR0.B.LJTSTP = 1;
897 IfxScuWdt_setSafetyEndinit(safetyWdtPw);
898 }
899
900
901 IFX_INLINE void IfxPmsPm_clearLoadJumpTimer(void)
902 {
903 uint16 safetyWdtPw = IfxScuWdt_getSafetyWatchdogPassword();
904 IfxScuWdt_clearSafetyEndinit(safetyWdtPw);
905 SCU_PMTRCSR0.B.LJTCLR = 1;
906 IfxScuWdt_setSafetyEndinit(safetyWdtPw);
907 }
908
909
910 IFX_INLINE void IfxPmsPm_clearLoadJumpTimerOverflowFlag(void)
911 {
912 uint16 safetyWdtPw = IfxScuWdt_getSafetyWatchdogPassword();
913 IfxScuWdt_clearSafetyEndinit(safetyWdtPw);
914 SCU_PMTRCSR2.B.LJTOVCLR = 1;
915 IfxScuWdt_setSafetyEndinit(safetyWdtPw);
916 }
917
918
919 IFX_INLINE boolean IfxPmsPm_hasLoadJumpTimerOverflowOccured(void)
920 {
921 return (boolean)SCU_PMTRCSR2.B.LJTOV;
922 }
923
924
925 IFX_INLINE void IfxPmsPm_setLoadJumpTimerCompareValue(uint16 compareValue)
926 {
927 uint16 safetyWdtPw = IfxScuWdt_getSafetyWatchdogPassword();
928 IfxScuWdt_clearSafetyEndinit(safetyWdtPw);
929 SCU_PMTRCSR1.B.LJTCV = compareValue;
930 IfxScuWdt_setSafetyEndinit(safetyWdtPw);
931 }
932
933
934 IFX_INLINE uint16 IfxPmsPm_getLoadJumpTimerCompareValue(void)
935 {
936 return (uint16)SCU_PMTRCSR1.B.LJTCV;
937 }
938
939
940 IFX_INLINE uint16 IfxPmsPm_getLoadJumpTimerCountValue(void)
941 {
942 return (uint16)SCU_PMTRCSR2.B.LJTCNT;
943 }
944
945
946 IFX_INLINE void IfxPmsPm_requestLoadJump(void)
947 {
948 uint16 safetyWdtPw = IfxScuWdt_getSafetyWatchdogPassword();
949 IfxScuWdt_clearSafetyEndinit(safetyWdtPw);
950 SCU_PMTRCSR2.B.LDJMPREQ = 1U;
951 IfxScuWdt_setSafetyEndinit(safetyWdtPw);
952 }
953
954
955 IFX_INLINE IfxPmsPm_LoadJumpStatus IfxPmsPm_getLoadJumpStatus(void)
956 {
957 return (IfxPmsPm_LoadJumpStatus)SCU_PMTRCSR2.B.LJTRUN;
958 }
959
960
961 IFX_INLINE void IfxPmsPm_enableVoltageDroopTimer(void)
962 {
963 uint16 safetyWdtPw = IfxScuWdt_getSafetyWatchdogPassword();
964 IfxScuWdt_clearSafetyEndinit(safetyWdtPw);
965 SCU_PMTRCSR0.B.VDTEN = 1;
966 IfxScuWdt_setSafetyEndinit(safetyWdtPw);
967 }
968
969
970 IFX_INLINE void IfxPmsPm_enableVoltageDroopTimerOverflowFlag(void)
971 {
972 uint16 safetyWdtPw = IfxScuWdt_getSafetyWatchdogPassword();
973 IfxScuWdt_clearSafetyEndinit(safetyWdtPw);
974 SCU_PMTRCSR0.B.VDTOVEN = 1;
975 IfxScuWdt_setSafetyEndinit(safetyWdtPw);
976 }
977
978
979 IFX_INLINE void IfxPmsPm_enableVoltageDroopTimerOverflowInterrupt(void)
980 {
981 uint16 safetyWdtPw = IfxScuWdt_getSafetyWatchdogPassword();
982 IfxScuWdt_clearSafetyEndinit(safetyWdtPw);
983 SCU_PMTRCSR0.B.VDTOVIEN = 1;
984 IfxScuWdt_setSafetyEndinit(safetyWdtPw);
985 }
986
987
988 IFX_INLINE void IfxPmsPm_disableVoltageDroopTimer(void)
989 {
990 uint16 safetyWdtPw = IfxScuWdt_getSafetyWatchdogPassword();
991 IfxScuWdt_clearSafetyEndinit(safetyWdtPw);
992 SCU_PMTRCSR0.B.VDTEN = 0;
993 IfxScuWdt_setSafetyEndinit(safetyWdtPw);
994 }
995
996
997 IFX_INLINE void IfxPmsPm_disableVoltageDroopTimerOverflowFlag(void)
998 {
999 uint16 safetyWdtPw = IfxScuWdt_getSafetyWatchdogPassword();
1000 IfxScuWdt_clearSafetyEndinit(safetyWdtPw);
1001 SCU_PMTRCSR0.B.VDTOVEN = 0;
1002 IfxScuWdt_setSafetyEndinit(safetyWdtPw);
1003 }
1004
1005
1006 IFX_INLINE void IfxPmsPm_disableVoltageDroopTimerOverflowInterrupt(void)
1007 {
1008 uint16 safetyWdtPw = IfxScuWdt_getSafetyWatchdogPassword();
1009 IfxScuWdt_clearSafetyEndinit(safetyWdtPw);
1010 SCU_PMTRCSR0.B.VDTOVIEN = 0;
1011 IfxScuWdt_setSafetyEndinit(safetyWdtPw);
1012 }
1013
1014
1015 IFX_INLINE void IfxPmsPm_startVoltageDroopTimer(void)
1016 {
1017 uint16 safetyWdtPw = IfxScuWdt_getSafetyWatchdogPassword();
1018 IfxScuWdt_clearSafetyEndinit(safetyWdtPw);
1019 SCU_PMTRCSR0.B.VDTSTRT = 1;
1020 IfxScuWdt_setSafetyEndinit(safetyWdtPw);
1021 }
1022
1023
1024 IFX_INLINE void IfxPmsPm_stopVoltageDroopTimer(void)
1025 {
1026 uint16 safetyWdtPw = IfxScuWdt_getSafetyWatchdogPassword();
1027 IfxScuWdt_clearSafetyEndinit(safetyWdtPw);
1028 SCU_PMTRCSR0.B.VDTSTP = 1;
1029 IfxScuWdt_setSafetyEndinit(safetyWdtPw);
1030 }
1031
1032
1033 IFX_INLINE void IfxPmsPm_clearVoltageDroopTimer(void)
1034 {
1035 uint16 safetyWdtPw = IfxScuWdt_getSafetyWatchdogPassword();
1036 IfxScuWdt_clearSafetyEndinit(safetyWdtPw);
1037 SCU_PMTRCSR0.B.VDTCLR = 1;
1038 IfxScuWdt_setSafetyEndinit(safetyWdtPw);
1039 }
1040
1041
1042 IFX_INLINE void IfxPmsPm_clearVoltageDroopTimerOverflowFlag(void)
1043 {
1044 uint16 safetyWdtPw = IfxScuWdt_getSafetyWatchdogPassword();
1045 IfxScuWdt_clearSafetyEndinit(safetyWdtPw);
1046 SCU_PMTRCSR3.B.VDTOVCLR = 1;
1047 IfxScuWdt_setSafetyEndinit(safetyWdtPw);
1048 }
1049
1050
1051 IFX_INLINE boolean IfxPmsPm_hasVoltageDroopTimerOverflowOccured(void)
1052 {
1053 return (boolean)SCU_PMTRCSR3.B.VDTOV;
1054 }
1055
1056
1057 IFX_INLINE void IfxPmsPm_setVoltageDroopTimerCompareValue(uint16 compareValue)
1058 {
1059 uint16 safetyWdtPw = IfxScuWdt_getSafetyWatchdogPassword();
1060 IfxScuWdt_clearSafetyEndinit(safetyWdtPw);
1061 SCU_PMTRCSR1.B.VDTCV = compareValue;
1062 IfxScuWdt_setSafetyEndinit(safetyWdtPw);
1063 }
1064
1065
1066 IFX_INLINE uint16 IfxPmsPm_getVoltageDroopTimerCompareValue(void)
1067 {
1068 return (uint16)SCU_PMTRCSR1.B.VDTCV;
1069 }
1070
1071
1072 IFX_INLINE uint16 IfxPmsPm_readVoltageDroopTimerCountValue(void)
1073 {
1074 return (uint16)SCU_PMTRCSR3.B.VDTCNT;
1075 }
1076
1077
1078 IFX_INLINE void IfxPmsPm_requestVoltageDroop(IfxPmsPm_VoltageDroopRequest droopRequest)
1079 {
1080 uint16 safetyWdtPw = IfxScuWdt_getSafetyWatchdogPassword();
1081 IfxScuWdt_clearSafetyEndinit(safetyWdtPw);
1082 SCU_PMTRCSR3.B.VDROOPREQ = droopRequest;
1083 IfxScuWdt_setSafetyEndinit(safetyWdtPw);
1084 }
1085
1086
1087 IFX_INLINE IfxPmsPm_VoltageDroopStatus IfxPmsPm_getVoltageDroopStatus(void)
1088 {
1089 return (IfxPmsPm_VoltageDroopStatus)SCU_PMTRCSR3.B.VDTRUN;
1090 }
1091
1092
1093 IFX_INLINE void IfxPmsPm_setVoltageDroopStep(IfxPmsPm_VoltageDroopStep droopStep)
1094 {
1095 uint16 safetyWdtPw = IfxScuWdt_getSafetyWatchdogPassword();
1096 IfxScuWdt_clearSafetyEndinit(safetyWdtPw);
1097 SCU_PMTRCSR0.B.SDSTEP = droopStep;
1098 IfxScuWdt_setSafetyEndinit(safetyWdtPw);
1099 }
1100
1101
1102 #endif /* IFXPMSPM_H */
IfxPmsPm_requestLoadJump
IFX_INLINE void IfxPmsPm_requestLoadJump(void)
Issues a Load Jump request.
Definition: IfxPmsPm.h:946
IfxPmsPm_WakeupConfig::mode
IfxPmsPm_WakeupTimerMode mode
wake-up timer mode
Definition: IfxPmsPm.h:410
IfxPmsPm_readVoltageDroopTimerCountValue
IFX_INLINE uint16 IfxPmsPm_readVoltageDroopTimerCountValue(void)
Gives Voltage Droop Timer count value.
Definition: IfxPmsPm.h:1072
IfxPmsPm_EdgeDetectionControl_onRisingEdge
Trigger is generated upon a Rising edge.
Definition: IfxPmsPm.h:115
IfxPmsPm_StandbyConfig::enableWakeupOnEsr0
boolean enableWakeupOnEsr0
Enable wake-up on ESR0.
Definition: IfxPmsPm.h:369
IfxPmsPm_StandbyConfig::pinBDigitalFilterUsage
IfxPmsPm_DigitalFilter pinBDigitalFilterUsage
Whether to use didital filer withe interpreting the pulse on PINB pin.
Definition: IfxPmsPm.h:383
IfxScuWdt_setSafetyEndinitInline
IFX_INLINE void IfxScuWdt_setSafetyEndinitInline(uint16 password)
SCUWDT Inline API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.h:689
IfxPmsPm_getVoltageDroopTimerCompareValue
IFX_INLINE uint16 IfxPmsPm_getVoltageDroopTimerCompareValue(void)
Reads the Voltage Droop Timer Compare Value.
Definition: IfxPmsPm.h:1066
IfxScuWdt_getSafetyWatchdogPasswordInline
IFX_INLINE uint16 IfxScuWdt_getSafetyWatchdogPasswordInline(void)
SCUWDT Inline API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.h:641
IfxPmsPm_VoltageDroopRequest_positive
A Positive Voltage Droop Request made and taken. Voltage Droop Timer activated.
Definition: IfxPmsPm.h:228
IfxPmsPm_VoltageSource_vext
VEXT(3.3V or 5V) external supply.
Definition: IfxPmsPm.h:276
IfxPmsPm_VoltageSource_vevrsb
VEVRSB(3.3V or 5V) - Standby Domain Supply.
Definition: IfxPmsPm.h:277
IfxPmsPm_clearVoltageDroopTimerOverflowFlag
IFX_INLINE void IfxPmsPm_clearVoltageDroopTimerOverflowFlag(void)
Clears Voltage Droop Timer Overflow Flag if Overflow Flag is enabled.
Definition: IfxPmsPm.h:1042
IfxPmsPm_StandbyConfig::pinATriggerEvent
IfxPmsPm_PinEdgeTriggerEvent pinATriggerEvent
Trigger will be generated on which pulse edge of a pulse on PINA pin.
Definition: IfxPmsPm.h:386
IfxPmsPm_setSleepMode
IFX_INLINE void IfxPmsPm_setSleepMode(IfxPmsPm_RequestPowerMode powerMode)
set system into sleep mode
Definition: IfxPmsPm.h:784
IfxPmsPm_BlankingFilterDelay
IfxPmsPm_BlankingFilterDelay
Exposes the optons for minimum duration between standby entry and Wakeup.If any wakeup request comes ...
Definition: IfxPmsPm.h:82
IfxPmsPm_disableVoltageDroopTimerOverflowFlag
IFX_INLINE void IfxPmsPm_disableVoltageDroopTimerOverflowFlag(void)
Disables the update of Voltage Droop Timer Overflow Flag on timer overflow or timeout.
Definition: IfxPmsPm.h:997
IfxPmsPm_StandbyConfig::useWutStandbyAutoStopMode
boolean useWutStandbyAutoStopMode
Use the Auto Stop mode in WUT.
Definition: IfxPmsPm.h:377
IfxPmsPm_StandbyRamSupply_cpu0Cpu1
Standby RAM (CPU0 dLMU RAM Block0 + Block1) & (CPU1 dLMU RAM Block0 + Block1) is supplied.
Definition: IfxPmsPm.h:203
IfxPmsPm_VoltageSource_vddpd
1.25V VDDPD Pre-Regulator Voltage
Definition: IfxPmsPm.h:273
IfxPmsPm_BlankingFilterDelay_40ms
Blanking delay on 40ms.
Definition: IfxPmsPm.h:89
IfxPmsPm_VoltageDroopStep_55mV
Voltage Droop request of 55 mV.
Definition: IfxPmsPm.h:261
IfxPmsPm_getLoadJumpTimerCompareValue
IFX_INLINE uint16 IfxPmsPm_getLoadJumpTimerCompareValue(void)
Reads the Load Jump Timer Compare value.
Definition: IfxPmsPm.h:934
IfxPmsPm_VoltageDroopStep_75mV
Voltage Droop request of 75 mV.
Definition: IfxPmsPm.h:265
IfxPmsPm_WutClock
IfxPmsPm_WutClock
Clock for WUT.
Definition: IfxPmsPm.h:306
IfxScuWdt_clearSafetyEndinitInline
IFX_INLINE void IfxScuWdt_clearSafetyEndinitInline(uint16 password)
SCUWDT Inline API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.h:581
IfxPmsPm_setVoltageDroopStep
IFX_INLINE void IfxPmsPm_setVoltageDroopStep(IfxPmsPm_VoltageDroopStep droopStep)
Loads the amount by which voltage will be requested to change.
Definition: IfxPmsPm.h:1093
IfxPmsPm_SleepConfig::gethEnabled
boolean gethEnabled
Whether QSPI will be enabled ir disabled during Sleep mode.
Definition: IfxPmsPm.h:347
IfxPmsPm_VoltageDroopStep_60mV
Voltage Droop request of 60 mV.
Definition: IfxPmsPm.h:262
IfxPmsPm_StandbyConfig::esr0PinStateRequest
IfxPmsPm_Esr0PinStateRequest esr0PinStateRequest
Request to remain in input with weak pull-up or get into tristate.
Definition: IfxPmsPm.h:364
IfxPmsPm_StandbyConfig::trigger
IfxPmsPm_StandbyTriggerMode trigger
Events which&#39;ll trigger Standby mode.
Definition: IfxPmsPm.h:358
IfxPmsPm_BlankingFilterDelay_0ms
No blanking filter delay.
Definition: IfxPmsPm.h:84
IfxPms_cfg.h
PMS on-chip implementation data.
IfxPmsPm_VoltageDroopStep_35mV
Voltage Droop request of 35 mV.
Definition: IfxPmsPm.h:257
IfxPmsPm_BlankingFilterDelay_10ms
Blanking delay on 10ms.
Definition: IfxPmsPm.h:87
IfxPmsPm_StandbyRamSupply_cpu0Block01
Standby RAM (CPU0 dLMU RAM Block0 + Block1) is supplied.
Definition: IfxPmsPm.h:201
IfxPmsPm_BlankingFilterDelay_160ms
Blanking delay on 160ms.
Definition: IfxPmsPm.h:91
IfxScuCcu_Config
Configuration structure SCU module.
Definition: IfxScuCcu.h:657
IfxPmsPm_RequestPowerMode_run
Request CPU Run Mode.
Definition: IfxPmsPm.h:176
IfxPmsPm_StandbyConfig::enableWakeupOnScr
boolean enableWakeupOnScr
Enable wake-up on request from SCR.
Definition: IfxPmsPm.h:375
IfxPmsPm_WakeupOn_esr0
ESR0 Wake-up enable from Standby.
Definition: IfxPmsPm.h:285
IfxPmsPm_PinEdgeTriggerEvent_fallingEdge
Trigger is generated upon a falling edge.
Definition: IfxPmsPm.h:150
IfxPmsPm_hasVoltageDroopTimerOverflowOccured
IFX_INLINE boolean IfxPmsPm_hasVoltageDroopTimerOverflowOccured(void)
Returns Status of Voltage Droop Time overflow condition.
Definition: IfxPmsPm.h:1051
IfxPmsPm_LoadJumpStatus_hwTriggeredRequestActive
A HW triggered Load Jump active and Load Jump Timer active.
Definition: IfxPmsPm.h:135
IfxPmsPm_SleepConfig::qspiClockSource
IfxScuCcu_Fsource qspiClockSource
Clock Source for MCAN IfxScuCcu_Fsource_1 is f_source1 from K2 divider of Peripheral PLL IfxScuCcu_Fs...
Definition: IfxPmsPm.h:344
IfxPmsPm_enableLoadJumpTimerOverflowInterrupt
IFX_INLINE void IfxPmsPm_enableLoadJumpTimerOverflowInterrupt(void)
Enables the activation of interrupt on timer overflow or timeout.
Definition: IfxPmsPm.h:865
IfxPmsPm_StandbyConfig::vddUnderVoltageThresholdLevel
float32 vddUnderVoltageThresholdLevel
Undervoltage threshold for VDD.
Definition: IfxPmsPm.h:368
IfxPmsPm_BlankingFilterDelay_10240ms
Blanking delay on 1024ms.
Definition: IfxPmsPm.h:97
IfxPmsPm_StandbyTriggerMode_hardware_nmi
Standby request arising from any NMI/ESR1 pin assertion.
Definition: IfxPmsPm.h:212
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxPmsPm_VoltageDroopRequest_negative
A Negative Voltage Droop Request made and taken. Voltage Droop Timer activated.
Definition: IfxPmsPm.h:230
IfxPmsPm_ThresholdEvent_overvoltage
Voltage is greater than the higher threshold.
Definition: IfxPmsPm.h:219
IfxPmsPm_VoltageDroopStatus_swTriggeredRequestActive
A SW triggered Voltage Droop active and Voltage Droop Timer active.
Definition: IfxPmsPm.h:240
float32
float float32
Definition: Platform_Types.h:170
IfxPmsPm_enableVoltageDroopTimerOverflowInterrupt
IFX_INLINE void IfxPmsPm_enableVoltageDroopTimerOverflowInterrupt(void)
Enables the activation of interrupt on timer overflow or timeout.
Definition: IfxPmsPm.h:979
IfxPmsPm_SleepConfig::asclinEnabled
boolean asclinEnabled
Whether ASCLIN will be enabled ir disabled during Sleep mode.
Definition: IfxPmsPm.h:337
IfxPmsPm_enableLoadJumpTimer
IFX_INLINE void IfxPmsPm_enableLoadJumpTimer(void)
Enables the usage of load jump timer.
Definition: IfxPmsPm.h:829
IfxPmsPm_setStandbyMode
IFX_EXTERN void IfxPmsPm_setStandbyMode(Ifx_PMS *pms, IfxPmsPm_WakeupConfig *config, IfxPmsPm_RequestPowerMode powerMode)
set system into stand by mode Note: In this API Alarm has been disabled.Enable of SMU alarm has to be...
Definition: IfxPmsPm.c:52
IfxPmsPm_initAndRequestVoltageDroop
IFX_EXTERN void IfxPmsPm_initAndRequestVoltageDroop(IfxPmsPm_VoltageDroopConfig *voltageDroopConfig)
Definition: IfxPmsPm.c:805
IfxCpu_CoreMode
IfxCpu_CoreMode
Enumeration for the Cpu mode.
Definition: IfxCpu.h:129
IfxPmsPm_VoltageDroopConfig
Volatge Droop Configuration.
Definition: IfxPmsPm.h:393
IfxPmsPm_VoltageDroopStatus
IfxPmsPm_VoltageDroopStatus
List of different statuses related to Load Jump This is reflected in SCU_PMTRCSR3.B.VDTRUN.
Definition: IfxPmsPm.h:237
IfxPmsPm_WakeupTimerMode_autoReload
WUT auto reload mode selected.
Definition: IfxPmsPm.h:300
IfxPmsPm_handleStandbyRam
IFX_EXTERN void IfxPmsPm_handleStandbyRam(uint32 *dataPointer, uint8 dataSize)
Copies dataSize bytes of data to standby RAM starting at dataPointer and appends the CRC over the cop...
Definition: IfxPmsPm.c:820
IfxPmsPm_StandbyConfig::enableWakeupOnPower
uint8 enableWakeupOnPower
Enable wake-up on VEXT ramp up.
Definition: IfxPmsPm.h:376
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxPmsPm_DigitalFilter_bypassed
The Filter is Bypassed.
Definition: IfxPmsPm.h:105
IfxPmsPm_StandbyConfig::enableWakeupOnPinA
boolean enableWakeupOnPinA
Enable wake-up on PINA.
Definition: IfxPmsPm.h:371
IfxPmsPm_StandbyConfig::enableWakeupOnTimer
boolean enableWakeupOnTimer
Enable wake-up on Wake Up Timer(WUT)
Definition: IfxPmsPm.h:373
IfxPmsPm_RequestPowerMode
IfxPmsPm_RequestPowerMode
System power mode As defined in Ifx_SCU.PMCSR[x].B.REQSLP.
Definition: IfxPmsPm.h:174
IfxPmsPm_BlankingFilterDelay_1280ms
Blanking delay on 1280ms.
Definition: IfxPmsPm.h:94
IfxPmsPm_initiateWakeup
IFX_EXTERN void IfxPmsPm_initiateWakeup(IfxScuCcu_Config *clockConfig)
Definition: IfxPmsPm.c:749
IfxPmsPm_BlankingFilterDelay_2_5ms
Blanking delay on 2.5ms.
Definition: IfxPmsPm.h:85
IfxPmsPm_StandbyRamSupply_cpu0Block0
Standby RAM (CPU0 dLMU RAM Block 0) is supplied.
Definition: IfxPmsPm.h:200
IfxPmsPm_StandbyTriggerMode
IfxPmsPm_StandbyTriggerMode
Defines events to trigger entry to Standby mode.
Definition: IfxPmsPm.h:208
IfxPmsPm_getVoltageDroopStatus
IFX_INLINE IfxPmsPm_VoltageDroopStatus IfxPmsPm_getVoltageDroopStatus(void)
Returns the status of Load Jump request.
Definition: IfxPmsPm.h:1087
IfxPmsPm_WutClock_70kHz
WUT has a 70 kHz clock input.
Definition: IfxPmsPm.h:308
IfxPmsPm_ThresholdEvent_undervoltage
Voltage is lesser than the lower threshold.
Definition: IfxPmsPm.h:220
IfxPmsPm_DigitalFilter_used
The Filter is Used.
Definition: IfxPmsPm.h:106
IfxPmsPm_enableLoadJumpTimerOverflowFlag
IFX_INLINE void IfxPmsPm_enableLoadJumpTimerOverflowFlag(void)
Enables the update of SCU_PMTRCSR2.B.LJTOV status bit on timer overflow or timeout.
Definition: IfxPmsPm.h:847
IfxPmsPm_PinEdgeTriggerEvent_risingEdge
Trigger is generated upon a rising edge.
Definition: IfxPmsPm.h:149
IfxPmsPm_LoadJumpConfig
Options for Load Jump.
Definition: IfxPmsPm.h:322
IfxPmsPm_StandbyConfig::wutReloadValue
uint32 wutReloadValue
The value from which the WUT will start downward count upon entering Standby.
Definition: IfxPmsPm.h:378
IfxPmsPm_StandbyConfig::minDelayBeforeWakeUp
IfxPmsPm_BlankingFilterDelay minDelayBeforeWakeUp
Selecting the duration, starting from Standby entry, after which wake-up triggers are effective...
Definition: IfxPmsPm.h:362
IfxPmsPm_StandbyConfig::enableStandbyOnVextRampDown
boolean enableStandbyOnVextRampDown
Enable Standby On VEXT Ramp Down.
Definition: IfxPmsPm.h:365
IfxPmsPm_VoltageDroopStep_70mV
Voltage Droop request of 70 mV.
Definition: IfxPmsPm.h:264
IfxPmsPm_WakeupConfig::trigger
IfxPmsPm_EdgeDetectionControl trigger
Enable Wake-up on rising or falling edge.
Definition: IfxPmsPm.h:408
IfxScuWdt.h
SCU basic functionality.
IfxPmsPm_StandbyConfig::esr1TriggerEvent
IfxPmsPm_PinEdgeTriggerEvent esr1TriggerEvent
Trigger will be generated on which pulse edge of a pulse on ESR1 pin.
Definition: IfxPmsPm.h:385
IfxPmsPm_WakeupConfig::filter
IfxPmsPm_DigitalFilter filter
bypass/use digital filter
Definition: IfxPmsPm.h:407
IfxPmsPm_ThresholdEvent
IfxPmsPm_ThresholdEvent
types of event
Definition: IfxPmsPm.h:217
IfxPmsPm_disableVoltageDroopTimerOverflowInterrupt
IFX_INLINE void IfxPmsPm_disableVoltageDroopTimerOverflowInterrupt(void)
Disables the activation of interrupt on timer overflow or timeout.
Definition: IfxPmsPm.h:1006
IfxPmsPm_clearLoadJumpTimer
IFX_INLINE void IfxPmsPm_clearLoadJumpTimer(void)
Clears the Load Jump timer count.
Definition: IfxPmsPm.h:901
IfxPmsPm_WutClock_68Hz
Clock to WUT passes through a divider of 10.
Definition: IfxPmsPm.h:309
IfxPmsPm_WakeupConfig::wakeup
IfxPmsPm_WakeupOn wakeup
wake-up configuration
Definition: IfxPmsPm.h:406
IfxScuWdt_clearSafetyEndinit
void IfxScuWdt_clearSafetyEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:305
IfxPmsPm_WakeupOn
IfxPmsPm_WakeupOn
Wake up configuration defined in Ifx_PMS.PMSW.CR0.B.ESRxWKEN,Ifx_PMS.PMSW.CR0.B.PINxWKEN and Ifx_PMS...
Definition: IfxPmsPm.h:283
IfxPmsPm_continueSleepSequenceInRAM
IFX_EXTERN void IfxPmsPm_continueSleepSequenceInRAM(IfxPmsPm_SleepConfig *sleepConfig)
This is to be placed in PSPR of the Master CPU.
Definition: IfxPmsPm.c:696
IfxCpu_ResourceCpu
IfxCpu_ResourceCpu
List of the available CPU resources.
Definition: IfxCpu_cfg.h:157
IfxPmsPm_SleepConfig::mcanEnabled
boolean mcanEnabled
Whether MCAN will be enabled ir disabled during Sleep mode.
Definition: IfxPmsPm.h:333
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxPmsPm_StandbyConfig::standbyRamBlock
IfxPmsPm_StandbyRamSupply standbyRamBlock
Options for which part of the DLMU can be provided supply during standby.
Definition: IfxPmsPm.h:359
IfxPmsPm_SleepConfig::qspiEnabled
boolean qspiEnabled
Whether QSPI will be enabled ir disabled during Sleep mode.
Definition: IfxPmsPm.h:343
IfxPmsPm_RequestPowerMode_idle
Request CPU Idle Mode.
Definition: IfxPmsPm.h:177
IfxPmsPm_StandbyConfig::esr0DigitalFilterUsage
IfxPmsPm_DigitalFilter esr0DigitalFilterUsage
Whether to use didital filer withe interpreting the pulse on ESR0 pin.
Definition: IfxPmsPm.h:380
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxPmsPm_StandbyConfig::enableStandbyOnVddRampDown
boolean enableStandbyOnVddRampDown
Enable Standby On VDD Ramp Down.
Definition: IfxPmsPm.h:366
IfxPmsPm_VoltageDroopStep_40mV
Voltage Droop request of 40 mV.
Definition: IfxPmsPm.h:258
IfxPmsPm_VoltageDroopStep_65mV
Voltage Droop request of 65 mV.
Definition: IfxPmsPm.h:263
IfxPmsPm_RampingMode_up
Event is triggered when the threshold is crossed in a lower to higher voltage transition. Greater than or equal compare is used.
Definition: IfxPmsPm.h:161
IfxPmsPm_StandbyRamSupply_cpu1Block01
Standby RAM (CPU1 dLMU RAM Block0 + Block1) is supplied.
Definition: IfxPmsPm.h:202
IfxPmsPm_ScrClocking_100mhzOptional
100MHz oscillator can be enabled or disabled based on request from Standby Controller. By default 100 MHz Oscillator is requested by SCR in Standby Mode.
Definition: IfxPmsPm.h:186
IfxPmsPm_BlankingFilterDelay_20ms
Blanking delay on 20ms.
Definition: IfxPmsPm.h:88
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxPmsPm_EdgeDetectionControl
IfxPmsPm_EdgeDetectionControl
Edge detection control mode for ESR and PINA/PINB As defined in Ifx_PMS.PMSW.CR0.B.ESRxEDCON and Ifx_PMS.PMSW.CR0.B.PINxEDCON.
Definition: IfxPmsPm.h:112
IfxPmsPm_RampingMode_both
Event is triggered when the threshold is crossed in either direction. Greater than or equal compare i...
Definition: IfxPmsPm.h:167
IfxPmsPm_requestVoltageDroop
IFX_INLINE void IfxPmsPm_requestVoltageDroop(IfxPmsPm_VoltageDroopRequest droopRequest)
Issue a voltage droop request.
Definition: IfxPmsPm.h:1078
IfxPmsPm_StandbyConfig::vextUnderVoltageThresholdLevel
float32 vextUnderVoltageThresholdLevel
Undervoltage threshold for VEXT.
Definition: IfxPmsPm.h:367
IfxPmsPm_SleepConfig
Configurable options for sleep mode.
Definition: IfxPmsPm.h:331
IfxPmsPm_setVoltageDroopTimerCompareValue
IFX_INLINE void IfxPmsPm_setVoltageDroopTimerCompareValue(uint16 compareValue)
Loads the compare value for Voltage Droop Timer in SCU_PMTRCSR1.B.VDTCV When the Timer count reaches ...
Definition: IfxPmsPm.h:1057
IfxPmsPm_VoltageSource_vdd
1.25V VDD voltage source(either from EVRC/supplied externally)
Definition: IfxPmsPm.h:272
IfxPmsPm_enableVoltageDroopTimerOverflowFlag
IFX_INLINE void IfxPmsPm_enableVoltageDroopTimerOverflowFlag(void)
Enables the update of Voltage Droop Timer Overflow Flag on timer overflow or timeout.
Definition: IfxPmsPm.h:970
IfxPmsPm_VoltageDroopStep
IfxPmsPm_VoltageDroopStep
Lists out volatge droop steps.
Definition: IfxPmsPm.h:248
IfxPmsPm_startStandbySequenceInFlash
IFX_EXTERN void IfxPmsPm_startStandbySequenceInFlash(IfxPmsPm_StandbyConfig *standbyConfig, const IfxScuCcu_Config *clockConfig)
Definition: IfxPmsPm.c:354
IfxPmsPm_StandbyConfig::enableWakeupOnPorst
boolean enableWakeupOnPorst
Enable wake-up on PORST pin assertion.
Definition: IfxPmsPm.h:374
IfxPmsPm_WakeupConfig::standbyRam
IfxPmsPm_StandbyRamSupply standbyRam
RAM being supply during standby mode.
Definition: IfxPmsPm.h:409
IfxPmsPm_VoltageDroopStep_50mV
Voltage Droop request of 50 mV.
Definition: IfxPmsPm.h:260
IfxPmsPm_VoltageDroopStep_25mV
Voltage Droop request of 25 mV.
Definition: IfxPmsPm.h:255
IfxPmsPm_configureSupplyMonitoring
IFX_EXTERN void IfxPmsPm_configureSupplyMonitoring(Ifx_PMS *pms, IfxPmsPm_VoltageSource source, IfxPmsPm_ThresholdEvent event, IfxPmsPm_RampingMode mode)
Definition: IfxPmsPm.c:306
IfxPmsPm_stopVoltageDroopTimer
IFX_INLINE void IfxPmsPm_stopVoltageDroopTimer(void)
Stops Voltage Droop timer and SCU cancels the droop request.
Definition: IfxPmsPm.h:1024
IfxPmsPm_startVoltageDroopTimer
IFX_INLINE void IfxPmsPm_startVoltageDroopTimer(void)
Starts Voltage Droop timer.
Definition: IfxPmsPm.h:1015
IfxPmsPm_WakeupOn_power
Power Wake-up enable Standby.
Definition: IfxPmsPm.h:291
IfxPmsPm_stopLoadJumpTimer
IFX_INLINE void IfxPmsPm_stopLoadJumpTimer(void)
This stops the Load jump timer. The Load Jump Timer stops counter at the current value and timer re-s...
Definition: IfxPmsPm.h:892
IfxPmsPm_VoltageSource_vddm
VDDM - Analog supply for ADCs.
Definition: IfxPmsPm.h:275
IfxPmsPm_continueStandbySequenceInRAM
IFX_EXTERN void IfxPmsPm_continueStandbySequenceInRAM(IfxPmsPm_StandbyConfig *standbyConfig, const IfxScuCcu_Config *clockConfig)
Definition: IfxPmsPm.c:462
IfxScuCcu_Fsource
IfxScuCcu_Fsource
clock source selection
Definition: IfxScuCcu.h:300
IfxPmsPm_disableLoadJumpTimer
IFX_INLINE void IfxPmsPm_disableLoadJumpTimer(void)
Disables the usage of load jump timer.
Definition: IfxPmsPm.h:838
IfxPmsPm_VoltageSource_vddp3
3.3V VDDP3(either generated by EVR33 or externally provided)
Definition: IfxPmsPm.h:274
IfxPmsPm_StandbyConfig::wutClock
IfxPmsPm_WutClock wutClock
Clock select for WUT.
Definition: IfxPmsPm.h:379
IfxPmsPm_PadStateRequest
IfxPmsPm_PadStateRequest
Request to set pads to either input with weak pullup or tristate.Configured in PMS_PMSWCR5.B.TRISTREQ.
Definition: IfxPmsPm.h:140
IfxPmsPm_ScrClocking_bothClocksActiive
100MHz oscillator is always active irrespective of SCR requests. Thus both 70 KHz Oscillator and 100 ...
Definition: IfxPmsPm.h:189
IfxPmsPm_initLoadJumpConfig
IFX_EXTERN void IfxPmsPm_initLoadJumpConfig(IfxPmsPm_LoadJumpConfig *loadJumpConfig)
Definition: IfxPmsPm.c:768
IfxPmsPm_StandbyTriggerMode_software
Standby request using MODULE_SCU.PMCSRx.B.REQSLP.
Definition: IfxPmsPm.h:210
IfxPmsPm_Esr0PinStateRequest_tristate
Set the ESR0 pin pad to tristate.
Definition: IfxPmsPm.h:125
IfxPmsPm_PinEdgeTriggerEvent_bothRisingAndFallingEdge
A trigger is generated upon a rising OR falling edge.
Definition: IfxPmsPm.h:151
IfxPmsPm_setCoreMode
IFX_EXTERN boolean IfxPmsPm_setCoreMode(IfxCpu_ResourceCpu cpuIndex, IfxCpu_CoreMode mode)
Set core mode(Idle/Run)
Definition: IfxPmsPm.c:152
IfxPmsPm_EdgeDetectionControl_always
A trigger is generated upon a either edges.
Definition: IfxPmsPm.h:117
IfxPmsPm_BlankingFilterDelay_5ms
Blanking delay on 5ms.
Definition: IfxPmsPm.h:86
IfxPmsPm_EdgeDetectionControl_onFallingEdge
Triggerr is generated upon a falling edge.
Definition: IfxPmsPm.h:116
IfxPmsPm_RequestPowerMode_sleep
Request CPU Sleep Mode.
Definition: IfxPmsPm.h:178
IfxPmsPm_LoadJumpStatus_inactive
Load Jump and Load Jump Timer inactive.
Definition: IfxPmsPm.h:133
IfxPmsPm_StandbyConfig::enableScr
boolean enableScr
Whether to enable SCR or not.
Definition: IfxPmsPm.h:360
IfxPmsPm_LoadJumpStatus
IfxPmsPm_LoadJumpStatus
List of different statuses related to Load Jump This is reflected in SCU_PMTRCSR2.B.LJTRUN.
Definition: IfxPmsPm.h:131
IfxPmsPm_initVoltageDroopConfig
IFX_EXTERN void IfxPmsPm_initVoltageDroopConfig(IfxPmsPm_VoltageDroopConfig *voltageDroopConfig)
Definition: IfxPmsPm.c:790
IfxPmsPm_LoadJumpConfig::enableLoadJumpTimerOverflowInterrupt
boolean enableLoadJumpTimerOverflowInterrupt
Enable or disable Load Jump Timer Overflow Interrupt.
Definition: IfxPmsPm.h:326
IfxPmsPm_StandbyConfig::esr1DigitalFilterUsage
IfxPmsPm_DigitalFilter esr1DigitalFilterUsage
Whether to use didital filer withe interpreting the pulse on ESR1 pin.
Definition: IfxPmsPm.h:382
IfxPmsPm_getLoadJumpStatus
IFX_INLINE IfxPmsPm_LoadJumpStatus IfxPmsPm_getLoadJumpStatus(void)
Returns the status of Load Jump request.
Definition: IfxPmsPm.h:955
IfxPmsPm_StandbyConfig::enableWakeupOnPinB
boolean enableWakeupOnPinB
Enable wake-up on PINB.
Definition: IfxPmsPm.h:372
IfxPmsPm_VoltageDroopStep_45mV
Voltage Droop request of 45 mV.
Definition: IfxPmsPm.h:259
IfxPmsPm_PinEdgeTriggerEvent_none
None of the edges will trigger anything.
Definition: IfxPmsPm.h:148
IfxPmsPm_SleepConfig::mcanClockSource
IfxScuCcu_Fsource mcanClockSource
Clock Source for MCAN IfxScuCcu_Fsource_1 is f_source1 from K2 divider of Peripheral PLL IfxScuCcu_Fs...
Definition: IfxPmsPm.h:334
IfxPmsPm_VoltageDroopConfig::enableVoltageDroopTimerOverflowFlag
boolean enableVoltageDroopTimerOverflowFlag
Enable or disable usage of Voltage Droop Timer Overflow Flag.
Definition: IfxPmsPm.h:396
IfxPmsPm_Esr0PinStateRequest_resetOutput
Definition: IfxPmsPm.h:124
IfxPmsPm_DigitalFilter
IfxPmsPm_DigitalFilter
The Digital filter enable/disabled As defined in Ifx_PMS.PMSW.CR0.B.ESRxDFEN and Ifx_PMS.PMSW.CR0.B.PINxDFEN.
Definition: IfxPmsPm.h:103
IfxPmsPm_StandbyConfig::pinADigitalFilterUsage
IfxPmsPm_DigitalFilter pinADigitalFilterUsage
Whether to use didital filer withe interpreting the pulse on PINA pin.
Definition: IfxPmsPm.h:381
IfxPmsPm_startSleepSequenceinFlash
IFX_EXTERN void IfxPmsPm_startSleepSequenceinFlash(IfxPmsPm_SleepConfig *sleepConfig, IfxScuCcu_Config *clockConfig)
Definition: IfxPmsPm.c:633
IfxPmsPm_VoltageDroopConfig::enableVoltageDroopTimer
boolean enableVoltageDroopTimer
Enable or disable usage of Voltage Droop Timer.
Definition: IfxPmsPm.h:395
IfxPmsPm_StandbyConfig::pinBTriggerEvent
IfxPmsPm_PinEdgeTriggerEvent pinBTriggerEvent
Trigger will be generated on which pulse edge of a pulse on PINB pin.
Definition: IfxPmsPm.h:387
IfxPmsPm_SleepConfig::asclinClockSource
IfxScuCcu_Fsource asclinClockSource
Clock Source for ASCLIN IfxScuCcu_Fsource_1 is f_source1 from K2 divider of Peripheral PLL IfxScuCcu_...
Definition: IfxPmsPm.h:338
IfxPmsPm_BlankingFilterDelay_5120ms
Blanking delay on 5120ms.
Definition: IfxPmsPm.h:96
IfxPmsPm_StandbyConfig::padStateRequest
IfxPmsPm_PadStateRequest padStateRequest
Request to remain in input with weak pull-up or get into tristate.
Definition: IfxPmsPm.h:363
IfxPmsPm_setLoadJumpTimerCompareValue
IFX_INLINE void IfxPmsPm_setLoadJumpTimerCompareValue(uint16 compareValue)
Loads the compare value for Load Jump Timer in SCU_PMTRCSR1.B.LJTCV When the Timer count reaches this...
Definition: IfxPmsPm.h:925
IfxCpu.h
CPU basic functionality.
IfxPmsPm_disableLoadJumpTimerOverflowInterrupt
IFX_INLINE void IfxPmsPm_disableLoadJumpTimerOverflowInterrupt(void)
Disables the activation of interrupt on timer overflow or timeout.
Definition: IfxPmsPm.h:874
IfxPmsPm_VoltageDroopStep_0mV
Voltage Droop request of 0 mV.
Definition: IfxPmsPm.h:250
IfxPmsPm_VoltageDroopStep_20mV
Voltage Droop request of 20 mV.
Definition: IfxPmsPm.h:254
IfxPmsPm_VoltageDroopStep_30mV
Voltage Droop request of 30 mV.
Definition: IfxPmsPm.h:256
IfxPmsPm_VoltageDroopConfig::enableVoltageDroopTimerOverflowInterrupt
boolean enableVoltageDroopTimerOverflowInterrupt
Enable or disable usage of Voltage Droop Interrupt.
Definition: IfxPmsPm.h:397
IfxPmsPm_StandbyConfig
Configurable Standby options.
Definition: IfxPmsPm.h:356
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxPmsPm_BlankingFilterDelay_320ms
Blanking delay on 320ms.
Definition: IfxPmsPm.h:92
IfxPmsPm_VoltageDroopRequest
IfxPmsPm_VoltageDroopRequest
Direction of Voltage Droop(positive and negative) To be specified in SCU_PMTRCSR3.B.VDROOPREQ.
Definition: IfxPmsPm.h:226
IfxPmsPm_SleepConfig::i2cEnabled
boolean i2cEnabled
Whether I2C will be enabled ir disabled during Sleep mode.
Definition: IfxPmsPm.h:348
IfxPmsPm_getMasterCpu
IFX_INLINE IfxCpu_ResourceCpu IfxPmsPm_getMasterCpu(void)
Gets the index of Master CPU.
Definition: IfxPmsPm.h:823
IfxPmsPm_PadStateRequest_tristate
Set pads to tristate.
Definition: IfxPmsPm.h:143
IfxScuWdt_setSafetyEndinit
void IfxScuWdt_setSafetyEndinit(uint16 password)
SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:668
IfxPmsPm_SleepConfig::gtmEnabled
boolean gtmEnabled
Whether GTM will be enabled ir disabled during Sleep mode.
Definition: IfxPmsPm.h:349
IfxPmsPm_StandbyRamSupply_never
Standby RAM is not supplied.
Definition: IfxPmsPm.h:199
IfxPmsPm_LoadJumpConfig::enableLoadJumpTimerOverflowFlag
boolean enableLoadJumpTimerOverflowFlag
Enable or disable update of Load Jump Timer Overflow Flag.
Definition: IfxPmsPm.h:325
IfxScuWdt_getSafetyWatchdogPassword
uint16 IfxScuWdt_getSafetyWatchdogPassword(void)
SCUWDT API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.c:393
IfxPmsPm_EdgeDetectionControl_never
No Trigger is Generated.
Definition: IfxPmsPm.h:114
IfxPmsPm_initStandbyConfig
IFX_EXTERN void IfxPmsPm_initStandbyConfig(IfxPmsPm_StandbyConfig *standbyConfig)
This function will initialize the configuration structure with default values. NOTE: ...
Definition: IfxPmsPm.c:316
IfxPmsPm_WakeupOn_pinB
PINB Wake-up enable from Standby.
Definition: IfxPmsPm.h:288
IfxPmsPm_disableLoadJumpTimerOverflowFlag
IFX_INLINE void IfxPmsPm_disableLoadJumpTimerOverflowFlag(void)
Disables the update of SCU_PMTRCSR2.B.LJTOV status bit on timer overflow or timeout.
Definition: IfxPmsPm.h:856
IfxPmsPm_LoadJumpStatus_swTriggeredRequestActive
A SW triggered Load Jump active and Load Jump Timer active.
Definition: IfxPmsPm.h:134
IfxPmsPm_VoltageDroopStatus_hwTriggeredRequestActive
A HW triggered Voltage Droop active and Voltage Droop Timer active.
Definition: IfxPmsPm.h:242
IfxPmsPm_getLoadJumpTimerCountValue
IFX_INLINE uint16 IfxPmsPm_getLoadJumpTimerCountValue(void)
Returns the Load Jump Timer count value.
Definition: IfxPmsPm.h:940
IfxScuCcu.h
SCU basic functionality.
IfxPmsPm_enableWakeup
IFX_EXTERN void IfxPmsPm_enableWakeup(Ifx_PMS *pms, IfxPmsPm_WakeupConfig *wakeup)
Enable Wakeup using PORST/ESR1/PINA/PINB/WUT/SCR/Power.
Definition: IfxPmsPm.c:237
IfxPmsPm_clearLoadJumpTimerOverflowFlag
IFX_INLINE void IfxPmsPm_clearLoadJumpTimerOverflowFlag(void)
Clears Load Jump Timer Overflow Flag (SCU_PMTRCSR2.B.LJTOV) and sets PMTRCSR3.B.VDROOPREQ and PMTRCSR...
Definition: IfxPmsPm.h:910
IfxPmsPm_WakeupTimerMode
IfxPmsPm_WakeupTimerMode
Select wakup timer operation mode As defined in Ifx_PMS.PMSW.CR3.B.WUTMODE.
Definition: IfxPmsPm.h:298
IfxPmsPm_ScrClocking
IfxPmsPm_ScrClocking
Defines Clocking options for SCR in PMS_PMSWCR4.B.SCRCLKSEL.
Definition: IfxPmsPm.h:184
IfxPmsPm_PadStateRequest_inputWithWeakPullUp
Set pads to input with weak pullup.
Definition: IfxPmsPm.h:142
IfxPmsPm_LoadJumpConfig::enableLoadJumpTimer
boolean enableLoadJumpTimer
Enable or disable Load Jump Timer.
Definition: IfxPmsPm.h:324
IfxCpu_getCoreIndex
IFX_INLINE IfxCpu_ResourceCpu IfxCpu_getCoreIndex(void)
API to get cpu index of the caller CPU. Note: This api can be used whereever cpu no/index is needed...
Definition: IfxCpu.h:871
IfxPmsPm_SleepConfig::masterCpu
IfxCpu_ResourceCpu masterCpu
Core index of the master CPU.
Definition: IfxPmsPm.h:351
IfxPmsPm_Esr0PinStateRequest
IfxPmsPm_Esr0PinStateRequest
Request to set ESR0 pin pads to either input with weak pullup or tristate.Configured in PMS_PMSWCR5...
Definition: IfxPmsPm.h:122
IfxPmsPm_configureWakeup
IFX_EXTERN void IfxPmsPm_configureWakeup(IfxPmsPm_StandbyConfig *standbyConfig)
Definition: IfxPmsPm.c:578
IfxPmsPm_SleepConfig::gpt12Enabled
boolean gpt12Enabled
Whether GPT12 will be enabled ir disabled during Sleep mode.
Definition: IfxPmsPm.h:341
IfxPmsPm_BlankingFilterDelay_640ms
Blanking delay on 640ms.
Definition: IfxPmsPm.h:93
IfxPmsPm_BlankingFilterDelay_2560ms
Blanking delay on 2560ms.
Definition: IfxPmsPm.h:95
IfxPmsPm_StandbyRamSupply
IfxPmsPm_StandbyRamSupply
The RAM being used in Standby mode As defined in Ifx_PMS.PMSW.CR0.B.STBYRAMSEL.
Definition: IfxPmsPm.h:197
IfxPmsPm_StandbyTriggerMode_hardware_undervoltage
Standby trigger arising from VEXT/VDD undervoltage.
Definition: IfxPmsPm.h:211
IfxPmsPm_VoltageDroopStatus_inactive
Voltage Droop and Voltage Droop Timer inactive.
Definition: IfxPmsPm.h:239
IfxPmsPm_PinEdgeTriggerEvent
IfxPmsPm_PinEdgeTriggerEvent
Definition: IfxPmsPm.h:146
IfxPmsEvr.h
PMS basic functionality.
IfxPmsPm_WakeupConfig
Configure Wakeup in standby mode.
Definition: IfxPmsPm.h:404
IfxPmsPm_StandbyConfig::esr0TriggerEvent
IfxPmsPm_PinEdgeTriggerEvent esr0TriggerEvent
Trigger will be generated on which pulse edge of a pulse on ESR0 pin.
Definition: IfxPmsPm.h:384
IfxCpu_Irq.h
This file contains the APIs for Interrupt related functions.
IfxPmsPm_StandbyConfig::scrClockSupply
IfxPmsPm_ScrClocking scrClockSupply
Options for SCR clock supply.
Definition: IfxPmsPm.h:361
IfxPmsPm_VoltageDroopConfig::droopStep
IfxPmsPm_VoltageDroopStep droopStep
Value by which voltage change must happen.
Definition: IfxPmsPm.h:399
IfxPmsPm_WakeupTimerMode_autoStop
WUT auto stop mode selected.
Definition: IfxPmsPm.h:301
IfxPmsPm_disableVoltageDroopTimer
IFX_INLINE void IfxPmsPm_disableVoltageDroopTimer(void)
Disables the usage of Voltage Droop Timer.
Definition: IfxPmsPm.h:988
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxPmsPm_RequestPowerMode_standby
Request CPU Standby Mode.
Definition: IfxPmsPm.h:179
IfxPmsPm_hasLoadJumpTimerOverflowOccured
IFX_INLINE boolean IfxPmsPm_hasLoadJumpTimerOverflowOccured(void)
Returns status of Load Jump Timer Overflow condition.
Definition: IfxPmsPm.h:919
IfxPmsPm_RampingMode_down
Event is triggered when the threshold is crossed in a higher to lower voltage transition. Less than or equal compare is used.
Definition: IfxPmsPm.h:164
IfxPmsPm_initAndRequestLoadJump
IFX_EXTERN void IfxPmsPm_initAndRequestLoadJump(IfxPmsPm_LoadJumpConfig *loadJumpConfig)
Definition: IfxPmsPm.c:776
IfxPmsPm_WakeupConfig::reloadCounter
uint32 reloadCounter
reload count from where value starts counting down used in case of WUT configuration ...
Definition: IfxPmsPm.h:411
IfxPmsPm_BlankingFilterDelay_80ms
Blanking delay on 80ms.
Definition: IfxPmsPm.h:90
IfxPmsPm_WakeupOn_porst
PORST Wake-up enable from Standby.
Definition: IfxPmsPm.h:289
IfxPmsPm_setMasterCpu
IFX_INLINE void IfxPmsPm_setMasterCpu(IfxCpu_ResourceCpu cpuIndex)
Set a given CPU as a Master CPU i.e. ability to trigger power down modes.
Definition: IfxPmsPm.h:811
IfxPmsPm_WakeupOn_scr
SCR Wake-up enable from Standby.
Definition: IfxPmsPm.h:292
IfxPmsPm_startLoadJumpTimer
IFX_INLINE void IfxPmsPm_startLoadJumpTimer(void)
Starts Load jump timer. The SCU_PMTRCSR0.B.LJTSTRT bitfield remains set on a write and is cleared whe...
Definition: IfxPmsPm.h:883
IfxPmsPm_VoltageDroopConfig::droopRequestType
IfxPmsPm_VoltageDroopRequest droopRequestType
Type of Voltage Droop Request.
Definition: IfxPmsPm.h:398
IfxPmsPm_enableVoltageDroopTimer
IFX_INLINE void IfxPmsPm_enableVoltageDroopTimer(void)
Enables the usage of Voltage Droop Timer.
Definition: IfxPmsPm.h:961
IfxPmsPm_WakeupOn_timer
WUT Wake-up enable from Standby.
Definition: IfxPmsPm.h:290
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxPmsPm_SleepConfig::ccu6Enabled
boolean ccu6Enabled
Whether CCU6 will be enabled ir disabled during Sleep mode.
Definition: IfxPmsPm.h:342
IfxPmsPm_VoltageDroopStep_15mV
Voltage Droop request of 15 mV.
Definition: IfxPmsPm.h:253
IfxPmsPm_StandbyConfig::enableWakeupOnEsr1
boolean enableWakeupOnEsr1
Enable wake-up on ESR1.
Definition: IfxPmsPm.h:370
IfxPmsPm_VoltageDroopStep_10mV
Voltage Droop request of 10 mV.
Definition: IfxPmsPm.h:252
IfxPmsPm_VoltageSource
IfxPmsPm_VoltageSource
Different voltage sources extrnally supplied to/inside AURIX2G.
Definition: IfxPmsPm.h:270
IfxPmsPm_SleepConfig::stmEnabled
boolean stmEnabled
Whether STM will be enabled ir disabled during Sleep mode.
Definition: IfxPmsPm.h:350
IfxPmsPm_clearVoltageDroopTimer
IFX_INLINE void IfxPmsPm_clearVoltageDroopTimer(void)
Clear Voltage Droop timer count. Resets the Voltage Droop Timer and clears VDTRUN if usage of Voltage...
Definition: IfxPmsPm.h:1033
IfxPmsPm_RampingMode
IfxPmsPm_RampingMode
Different options for when event triggering is desired(See EVRMONCTRL).
Definition: IfxPmsPm.h:156
IfxPmsPm_WakeupOn_pinA
PINA Wake-up enable from Standby.
Definition: IfxPmsPm.h:287
IfxPmsPm_VoltageDroopStep_5mV
Voltage Droop request of 5 mV.
Definition: IfxPmsPm.h:251
IfxPmsPm_WakeupOn_esr1
ESR1 Wake-up enable from Standby.
Definition: IfxPmsPm.h:286
IfxPmsPm_RampingMode_none
Monitoring inactive. This results in a complete reset of the comparator unit, status bits and filter ...
Definition: IfxPmsPm.h:158
IfxPmsPm_initSleepConfig
IFX_EXTERN void IfxPmsPm_initSleepConfig(IfxPmsPm_SleepConfig *sleepConfig)
Definition: IfxPmsPm.c:616


iLLD_TC38A: IfxPort.c Source File

  • Port
  • Std
IfxPort.c
Go to the documentation of this file.
1 /**
2 * \file IfxPort.c
3 * \brief PORT basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxPort.h"
47
48 /******************************************************************************/
49 /*-------------------------Function Implementations---------------------------*/
50 /******************************************************************************/
51
52 boolean IfxPort_disableEmergencyStop(Ifx_P *port, uint8 pinIndex)
53 {
54 sint32 portIndex;
55 boolean result = FALSE;
56
57 for (portIndex = 0; portIndex < IFXPORT_NUM_MODULES; portIndex++)
58 {
59 if (port == IfxPort_cfg_esrMasks[portIndex].port)
60 {
61 if ((1U << pinIndex) & IfxPort_cfg_esrMasks[portIndex].masks)
62 {
63 IfxPort_resetESR(port, pinIndex);
64 result = TRUE;
65 }
66
67 break;
68 }
69 }
70
71 return result;
72 }
73
74
75 boolean IfxPort_enableEmergencyStop(Ifx_P *port, uint8 pinIndex)
76 {
77 sint32 portIndex;
78 boolean result = FALSE;
79
80 for (portIndex = 0; portIndex < IFXPORT_NUM_MODULES; portIndex++)
81 {
82 if (port == IfxPort_cfg_esrMasks[portIndex].port)
83 {
84 if ((1U << pinIndex) & IfxPort_cfg_esrMasks[portIndex].masks)
85 {
86 IfxPort_setESR(port, pinIndex);
87 result = TRUE;
88 }
89 }
90 }
91
92 return result;
93 }
94
95
96 Ifx_P *IfxPort_getAddress(IfxPort_Index port)
97 {
98 Ifx_P *module = NULL_PTR;
99 uint8 i = 0;
100
101 while ((i < IFXPORT_NUM_MODULES) && (module == NULL_PTR))
102 {
103 if (IfxPort_cfg_indexMap[i].index == port)
104 {
105 module = IfxPort_cfg_indexMap[i].module;
106 }
107
108 i++;
109 }
110
111 return module;
112 }
113
114
115 IfxPort_Index IfxPort_getIndex(Ifx_P *port)
116 {
117 uint32 index;
118 IfxPort_Index result;
119
120 result = IfxPort_Index_none;
121
122 for (index = 0; index < IFXPORT_NUM_MODULES; index++)
123 {
124 if (IfxPort_cfg_indexMap[index].module == port)
125 {
126 result = (IfxPort_Index)IfxPort_cfg_indexMap[index].index;
127 break;
128 }
129 }
130
131 return result;
132 }
133
134
135 void IfxPort_resetESR(Ifx_P *port, uint8 pinIndex)
136 {
137 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
138
139 IfxScuWdt_clearCpuEndinit(passwd);
140 __ldmst(&port->ESR.U, 1U << pinIndex, 0);
141 IfxScuWdt_setCpuEndinit(passwd);
142 }
143
144
145 void IfxPort_setESR(Ifx_P *port, uint8 pinIndex)
146 {
147 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
148
149 IfxScuWdt_clearCpuEndinit(passwd);
150 __ldmst(&port->ESR.U, 1U << pinIndex, 1U << pinIndex);
151 IfxScuWdt_setCpuEndinit(passwd);
152 }
153
154
155 void IfxPort_setGroupModeInput(Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_InputMode mode)
156 {
157 uint32 i;
158 uint32 iocrVal[4];
159 uint32 iocrMask[4];
160
161 /* initialise */
162 for (i = 0; i < 4; i++)
163 {
164 iocrVal[i] = 0;
165 iocrMask[i] = 0;
166 }
167
168 /* calculate IOCRx values and masks */
169 uint32 imask = (uint32)mask << pinIndex;
170
171 for (i = pinIndex; i < 16; i++)
172 {
173 if ((imask & (1U << i)) != 0)
174 {
175 uint32 index = i / 4;
176 uint32 shift = (i & 0x3U) * 8;
177 iocrMask[index] |= (0x1FU << 3) << shift;
178 iocrVal[index] |= (mode) << shift;
179 }
180 }
181
182 /* write IOCRx */
183 for (i = 0; i < 4; i++)
184 {
185 if (iocrMask[i] != 0)
186 {
187 __ldmst(&((&(port->IOCR0.U))[i]), iocrMask[i], iocrVal[i]);
188 }
189 }
190 }
191
192
193 void IfxPort_setGroupModeOutput(Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
194 {
195 uint32 i;
196 uint32 iocrVal[4];
197 uint32 iocrMask[4];
198
199 IFX_UNUSED_PARAMETER(index == IfxPort_OutputIdx_general);
200
201 /* initialise */
202 for (i = 0; i < 4; i++)
203 {
204 iocrVal[i] = 0;
205 iocrMask[i] = 0;
206 }
207
208 /* calculate IOCRx values and masks */
209 uint32 imask = (uint32)mask << pinIndex;
210
211 for (i = pinIndex; i < 16; i++)
212 {
213 if ((imask & (1U << i)) != 0)
214 {
215 uint32 index = i / 4;
216 uint32 shift = (i & 0x3U) * 8;
217 iocrMask[index] |= (0x1FU << 3) << shift;
218 iocrVal[index] |= (mode | index) << shift;
219 }
220 }
221
222 /* write IOCRx */
223 for (i = 0; i < 4; i++)
224 {
225 if (iocrMask[i] != 0)
226 {
227 __ldmst(&((&(port->IOCR0.U))[i]), iocrMask[i], iocrVal[i]);
228 }
229 }
230 }
231
232
233 void IfxPort_setGroupPadDriver(Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_PadDriver padDriver)
234 {
235 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
236
237 IfxScuWdt_clearCpuEndinit(passwd);
238 {
239 uint32 i;
240 uint32 pdrVal[2];
241 uint32 pdrMask[2];
242
243 /* initialise */
244 for (i = 0; i < 2; i++)
245 {
246 pdrVal[i] = 0;
247 pdrMask[i] = 0;
248 }
249
250 /* calculate PDRx values and masks */
251 uint32 imask = (uint32)mask << pinIndex;
252
253 for (i = pinIndex; i < 16; i++)
254 {
255 if ((imask & (1U << i)) != 0)
256 {
257 uint32 index = i / 8;
258 uint32 shift = (i & 0x7U) * 4;
259 pdrMask[index] |= (0xFUL << shift);
260 pdrVal[index] |= (padDriver << shift);
261 }
262 }
263
264 /* write PDRx */
265 for (i = 0; i < 2; i++)
266 {
267 if (pdrMask[i] != 0)
268 {
269 __ldmst(&((&(port->PDR0.U))[i]), pdrMask[i], pdrVal[i]);
270 }
271 }
272 }
273 IfxScuWdt_setCpuEndinit(passwd);
274 }
275
276
277 void IfxPort_setPinMode(Ifx_P *port, uint8 pinIndex, IfxPort_Mode mode)
278 {
279 volatile Ifx_P_IOCR0 *iocr = &(port->IOCR0);
280 uint8 iocrIndex = (pinIndex / 4);
281 uint8 shift = (pinIndex & 0x3U) * 8;
282
283 if ((port == &MODULE_P40) || (port == &MODULE_P41))
284 {
285 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
286 IfxScuWdt_clearCpuEndinit(passwd);
287 port->PDISC.U &= ~(1 << pinIndex);
288 IfxScuWdt_setCpuEndinit(passwd);
289 }
290
291 __ldmst(&iocr[iocrIndex].U, (0xFFUL << shift), (mode << shift));
292 }
293
294
295 void IfxPort_setPinModeLVDS(Ifx_P *port, uint8 pinIndex, IfxPort_Mode pinMode, IfxPort_LvdsConfig *lvds)
296 {
297 uint32 lpcrOffset = (pinIndex / 2);
298
299 volatile Ifx_P_LPCR *lpcr = &(port->LPCR[0]);
300 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
301
302 IfxScuWdt_clearCpuEndinit(passwd);
303 lpcr[lpcrOffset].B.LVDSM = lvds->lvdsMode;
304 lpcr[lpcrOffset].B.PS = lvds->padSupply;
305
306 if (pinMode < IfxPort_Mode_outputPushPullGeneral)
307 {
308 lpcr[lpcrOffset].B.REN_CTRL = lvds->enablePortControlled;
309 lpcr[lpcrOffset].B.RX_EN = 1;
310 }
311 else
312 {
313 lpcr[lpcrOffset].B.TEN_CTRL = lvds->enablePortControlled;
314 lpcr[lpcrOffset].B.TX_EN = 1;
315 lpcr[lpcrOffset].B.TX_PD = 0;
316 }
317
318 IfxScuWdt_setCpuEndinit(passwd);
319 }
320
321
322 void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
323 {
324 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
325
326 IfxScuWdt_clearCpuEndinit(passwd);
327 {
328 volatile uint32 *pdr = (volatile uint32 *)&(port->PDR0.U);
329 uint8 pdrIndex = (pinIndex / 8);
330 uint8 shift = (pinIndex & 0x7U) * 4;
331 __ldmst(&(pdr[pdrIndex]), (0xFUL << shift), (padDriver << shift));
332 }
333 IfxScuWdt_setCpuEndinit(passwd);
334 }
335
336
337 void IfxPort_setPinControllerSelection(Ifx_P *port, uint8 pinIndex)
338 {
339 boolean select = 0, lock = 0;
340 IfxPort_Index portIndex = IfxPort_getIndex(port);
341
342 switch (portIndex)
343 {
344 case IfxPort_Index_00:
345
346 if ((pinIndex == 10) || (pinIndex == 11))
347
348 {
349 select = 1;
350 }
351
352 break;
353
354 case IfxPort_Index_11:
355
356 if ((pinIndex == 0) || (pinIndex == 1) || (pinIndex == 2) || (pinIndex == 3) || (pinIndex == 4) || (pinIndex == 6))
357 {
358 select = 1;
359 }
360
361 break;
362
363 case IfxPort_Index_22:
364
365 if ((pinIndex == 10) || (pinIndex == 11))
366 {
367 select = 1;
368 }
369
370 break;
371
372 case IfxPort_Index_23:
373
374 if ((pinIndex == 2) || (pinIndex == 3) || (pinIndex == 4))
375
376 {
377 select = 1;
378 }
379
380 break;
381
382 case IfxPort_Index_33:
383
384 select = 1;
385 lock = 1;
386 break;
387 case IfxPort_Index_34:
388
389 if (pinIndex == 1)
390 {
391 select = 1;
392 lock = 1;
393 }
394
395 break;
396
397 case IfxPort_Index_40:
398
399 if ((pinIndex == 1) || (pinIndex == 2) || (pinIndex == 3) || (pinIndex == 5) || (pinIndex == 10) || (pinIndex == 11) || (pinIndex == 12) || (pinIndex == 15))
400 {
401 select = 1;
402 }
403
404 break;
405
406 default:
407 break;
408 }
409
410 if (select == 1)
411 {
412 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
413
414 IfxScuWdt_clearSafetyEndinit(passwd);
415
416 if ((lock == 1) && (port->PCSR.B.LCK == 1))
417 {
418 IFX_ASSERT(IFX_VERBOSE_LEVEL_WARNING, FALSE);
419 }
420
421 __ldmst(&port->PCSR.U, 1U << pinIndex, 1U << pinIndex);
422
423 IfxScuWdt_setSafetyEndinit(passwd);
424 }
425 }
426
427
428 void IfxPort_resetPinControllerSelection(Ifx_P *port, uint8 pinIndex)
429 {
430 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
431
432 IfxScuWdt_clearSafetyEndinit(passwd);
433 __ldmst(&port->PCSR.U, 1U << pinIndex, 0);
434 IfxScuWdt_setSafetyEndinit(passwd);
435 }
436
437
438 void IfxPort_modifyPinControllerSelection(Ifx_P *port, uint8 pinIndex, boolean mode)
439 {
440 boolean select = 0, lock = 0;
441 IfxPort_Index portIndex = IfxPort_getIndex(port);
442
443 switch (portIndex)
444 {
445 case IfxPort_Index_00:
446
447 if ((pinIndex == 10) || (pinIndex == 11))
448 {
449 select = 1;
450 }
451
452 break;
453
454 case IfxPort_Index_11:
455
456 if ((pinIndex == 0) || (pinIndex == 1) || (pinIndex == 2) || (pinIndex == 3) || (pinIndex == 4) || (pinIndex == 6))
457 {
458 select = 1;
459 }
460
461 break;
462
463 case IfxPort_Index_22:
464
465 if ((pinIndex == 10) || (pinIndex == 11) || (pinIndex == 12))
466 {
467 select = 1;
468 }
469
470 break;
471 case IfxPort_Index_23:
472
473 if ((pinIndex == 2) || (pinIndex == 3) || (pinIndex == 4))
474 {
475 select = 1;
476 }
477
478 break;
479
480 case IfxPort_Index_33:
481
482 select = 1;
483 lock = 1;
484 break;
485 case IfxPort_Index_34:
486
487 if (pinIndex == 1)
488 {
489 select = 1;
490 lock = 1;
491 }
492
493 break;
494 case IfxPort_Index_40:
495
496 if ((pinIndex == 1) || (pinIndex == 2) || (pinIndex == 3) || (pinIndex == 5) || (pinIndex == 10) || (pinIndex == 11) || (pinIndex == 12) || (pinIndex == 15))
497 {
498 select = 1;
499 }
500
501 break;
502 default:
503 break;
504 }
505
506 if (select == 1)
507 {
508 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
509
510 IfxScuWdt_clearSafetyEndinit(passwd);
511
512 if ((lock == 1) && (port->PCSR.B.LCK == 1))
513 {
514 IFX_ASSERT(IFX_VERBOSE_LEVEL_WARNING, FALSE);
515 }
516
517 __ldmst(&port->PCSR.U, 1U << pinIndex, mode << pinIndex);
518
519 IfxScuWdt_setSafetyEndinit(passwd);
520 }
521 }
IfxPort_Index
IfxPort_Index
List of the available Port resources.
Definition: IfxPort_cfg.h:76
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:126
IfxPort_LvdsConfig
To Configure LVDS mode.
Definition: IfxPort.h:237
IfxPort_setPinMode
void IfxPort_setPinMode(Ifx_P *port, uint8 pinIndex, IfxPort_Mode mode)
Configure the port input / output mode. Also Configures the P40/P41 Port for digital functionality wh...
Definition: IfxPort.c:277
IfxPort_Mode_outputPushPullGeneral
Push-pull, General-purpose output.
Definition: IfxPort.h:106
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:140
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxPort_setPinModeLVDS
void IfxPort_setPinModeLVDS(Ifx_P *port, uint8 pinIndex, IfxPort_Mode pinMode, IfxPort_LvdsConfig *lvds)
set lvds mode
Definition: IfxPort.c:295
IFXPORT_NUM_MODULES
#define IFXPORT_NUM_MODULES
Port count.
Definition: IfxPort_cfg.h:66
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:322
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxPort_setGroupModeInput
void IfxPort_setGroupModeInput(Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_InputMode mode)
Set pin modes to input at the pin location specified by &#39;1&#39; by the mask.
Definition: IfxPort.c:155
IfxPort_setPinControllerSelection
void IfxPort_setPinControllerSelection(Ifx_P *port, uint8 pinIndex)
Enable the Pin Controller Selection.
Definition: IfxPort.c:337
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxPort_Index_00
PORT 00.
Definition: IfxPort_cfg.h:78
IFX_VERBOSE_LEVEL_WARNING
#define IFX_VERBOSE_LEVEL_WARNING
Assertion level warning.
Definition: Ifx_Assert.h:59
IfxScuWdt_clearSafetyEndinit
void IfxScuWdt_clearSafetyEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:305
IfxPort_setGroupModeOutput
void IfxPort_setGroupModeOutput(Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Set pin modes to output at the pin location specified by &#39;1&#39; by the mask starting at pinIndex...
Definition: IfxPort.c:193
IfxPort_resetESR
void IfxPort_resetESR(Ifx_P *port, uint8 pinIndex)
Disable the emergency stop function. This function disables the emergency stop function. No check is done on port functionality.
Definition: IfxPort.c:135
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxPort_OutputIdx_general
Definition: IfxPort.h:128
IfxPort_Index_23
PORT 23.
Definition: IfxPort_cfg.h:90
IfxPort_Index_33
PORT 33.
Definition: IfxPort_cfg.h:97
IfxModule_IndexMap::module
volatile void * module
Module address.
Definition: Ifx_Types.h:142
IfxPort_getIndex
IfxPort_Index IfxPort_getIndex(Ifx_P *port)
Return port index within IfxModule_IndexMap (defined in IfxPort_cfg.c)
Definition: IfxPort.c:115
IfxPort_enableEmergencyStop
boolean IfxPort_enableEmergencyStop(Ifx_P *port, uint8 pinIndex)
Enable the emergency stop function. This function enables the emergency stop function. A check is done on port functionality.
Definition: IfxPort.c:75
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:151
__ldmst
#define __ldmst
Definition: IfxCpu_IntrinsicsDcc.h:2065
IfxPort_Index_22
PORT 22.
Definition: IfxPort_cfg.h:89
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxPort_disableEmergencyStop
boolean IfxPort_disableEmergencyStop(Ifx_P *port, uint8 pinIndex)
Disable the emergency stop function. This function disables the emergency stop function. A check is done on port functionality.
Definition: IfxPort.c:52
IfxScuWdt_setSafetyEndinit
void IfxScuWdt_setSafetyEndinit(uint16 password)
SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:668
IfxScuWdt_getSafetyWatchdogPassword
uint16 IfxScuWdt_getSafetyWatchdogPassword(void)
SCUWDT API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.c:393
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:81
sint32
long sint32
Definition: Platform_Types.h:134
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxPort_getAddress
Ifx_P * IfxPort_getAddress(IfxPort_Index port)
Returns the module address of the selected Port module.
Definition: IfxPort.c:96
IfxPort_LvdsConfig::enablePortControlled
IfxPort_ControlledBy enablePortControlled
specifies whether LVDS is controlled by PORT or HSCT
Definition: IfxPort.h:240
IfxPort_LvdsConfig::lvdsMode
IfxPort_LvdsMode lvdsMode
specifies LVDS-M or LVDS-H mode
Definition: IfxPort.h:239
IfxPort_modifyPinControllerSelection
void IfxPort_modifyPinControllerSelection(Ifx_P *port, uint8 pinIndex, boolean mode)
Definition: IfxPort.c:438
IfxPort_cfg_esrMasks
IFX_CONST IfxPort_Esr_Masks IfxPort_cfg_esrMasks[IFXPORT_NUM_MODULES]
Definition: IfxPort_cfg.c:53
IfxPort_Mode
IfxPort_Mode
Ifx_P input / output mode definition.
Definition: IfxPort.h:101
IfxPort_setGroupPadDriver
void IfxPort_setGroupPadDriver(Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_PadDriver padDriver)
Set pad driver strength at the pin location specified by &#39;1&#39; by the mask.
Definition: IfxPort.c:233
IfxPort_Index_34
PORT 34.
Definition: IfxPort_cfg.h:98
IfxPort_Index_none
none
Definition: IfxPort_cfg.h:101
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxPort_setESR
void IfxPort_setESR(Ifx_P *port, uint8 pinIndex)
Enable the emergency stop function. This function enables the emergency stop function. No check is done on port functionality.
Definition: IfxPort.c:145
TRUE
#define TRUE
Definition: Platform_Types.h:90
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
IfxPort_Index_40
PORT 40.
Definition: IfxPort_cfg.h:99
IfxPort_Index_11
PORT 11.
Definition: IfxPort_cfg.h:82
IfxPort_LvdsConfig::padSupply
IfxPort_PadSupply padSupply
specify supply voltage
Definition: IfxPort.h:241
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxPort_resetPinControllerSelection
void IfxPort_resetPinControllerSelection(Ifx_P *port, uint8 pinIndex)
Disable the Pin Controller Selection.
Definition: IfxPort.c:428
IfxPort.h
PORT basic functionality.
IfxPort_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxPort_cfg_indexMap[IFXPORT_NUM_MODULES]
Definition: IfxPort_cfg.c:79


iLLD_TC38A: IfxPort.h Source File

  • Port
  • Std
IfxPort.h
Go to the documentation of this file.
1 /**
2 * \file IfxPort.h
3 * \brief PORT basic functionality
4 * \ingroup IfxLld_Port
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 *
43 * \defgroup IfxLld_Port_Std_Enum Enumerations
44 * \ingroup IfxLld_Port_Std
45 * \defgroup IfxLld_Port_Std_DataStructures Data structures
46 * \ingroup IfxLld_Port_Std
47 * \defgroup IfxLld_Port_Std_SinglePin Single Pin Functions
48 * \ingroup IfxLld_Port_Std
49 * \defgroup IfxLld_Port_Std_PortGroup Group Access Functions
50 * \ingroup IfxLld_Port_Std
51 */
52
53 #ifndef IFXPORT_H
54 #define IFXPORT_H 1
55
56 /******************************************************************************/
57 /*----------------------------------Includes----------------------------------*/
58 /******************************************************************************/
59
60 #include "_Impl/IfxPort_cfg.h"
61 #include "Scu/Std/IfxScuWdt.h"
62 #include "_Utilities/Ifx_Assert.h"
63
64 /******************************************************************************/
65 /*--------------------------------Enumerations--------------------------------*/
66 /******************************************************************************/
67
68 /** \addtogroup IfxLld_Port_Std_Enum
69 * \{ */
70 /** \brief The LVDS RX_DIS control function can be selected from the Port (default) or
71 * HSCT module.declared in MODULE_PORTx.LPCRx
72 */
73 typedef enum
74 {
75 IfxPort_ControlledBy_port = 0, /**< \brief port controlled by PORT Module */
76 IfxPort_ControlledBy_hsct = 1 /**< \brief Port controlled by HSCT Module */
77 } IfxPort_ControlledBy;
78
79 /** \brief Ifx_P output modification modes definition.
80 */
81 typedef enum
82 {
83 IfxPort_InputMode_undefined = -1,
84 IfxPort_InputMode_noPullDevice = 0 << 3,
85 IfxPort_InputMode_pullDown = 1U << 3,
86 IfxPort_InputMode_pullUp = 2U << 3 /**< \brief */
87 } IfxPort_InputMode;
88
89 /** \brief specifies LVDS-M or LVDS-H mode as declare in Register MODULE_PORT.LPCRx.LVDSM
90 */
91 typedef enum
92 {
93 IfxPort_LvdsMode_high = 0, /**< \brief LVDS-H Mode */
94 IfxPort_LvdsMode_medium = 1 /**< \brief LVDS-M Mode */
95 } IfxPort_LvdsMode;
96
97 /** \brief Ifx_P input / output mode definition.
98 *
99 * \see Ifx_P.IOCR, IfxPort_setPinMode()
100 */
101 typedef enum
102 {
103 IfxPort_Mode_inputNoPullDevice = 0, /**< \brief Input, No pull device connected. */
104 IfxPort_Mode_inputPullDown = 8U, /**< \brief Input, pull-down device connected. */
105 IfxPort_Mode_inputPullUp = 0x10U, /**< \brief Input, pull-up device connected. */
106 IfxPort_Mode_outputPushPullGeneral = 0x80U, /**< \brief Push-pull, General-purpose output */
107 IfxPort_Mode_outputPushPullAlt1 = 0x88U, /**< \brief Push-pull, Alternate output function 1. */
108 IfxPort_Mode_outputPushPullAlt2 = 0x90U, /**< \brief Push-pull, Alternate output function 2. */
109 IfxPort_Mode_outputPushPullAlt3 = 0x98U, /**< \brief Push-pull, Alternate output function 3. */
110 IfxPort_Mode_outputPushPullAlt4 = 0xA0U, /**< \brief Push-pull, Alternate output function 4. */
111 IfxPort_Mode_outputPushPullAlt5 = 0xA8U, /**< \brief Push-pull, Alternate output function 5. */
112 IfxPort_Mode_outputPushPullAlt6 = 0xB0U, /**< \brief Push-pull, Alternate output function 6. */
113 IfxPort_Mode_outputPushPullAlt7 = 0xB8U, /**< \brief Push-pull, Alternate output function 7. */
114 IfxPort_Mode_outputOpenDrainGeneral = 0xC0U, /**< \brief Open-drain, General-purpose output. */
115 IfxPort_Mode_outputOpenDrainAlt1 = 0xC8U, /**< \brief Open-drain, Alternate output function 1. */
116 IfxPort_Mode_outputOpenDrainAlt2 = 0xD0U, /**< \brief Open-drain, Alternate output function 2. */
117 IfxPort_Mode_outputOpenDrainAlt3 = 0xD8U, /**< \brief Open-drain, Alternate output function 3. */
118 IfxPort_Mode_outputOpenDrainAlt4 = 0xE0U, /**< \brief Open-drain, Alternate output function 4. */
119 IfxPort_Mode_outputOpenDrainAlt5 = 0xE8U, /**< \brief Open-drain, Alternate output function 5. */
120 IfxPort_Mode_outputOpenDrainAlt6 = 0xF0U, /**< \brief Open-drain, Alternate output function 6. */
121 IfxPort_Mode_outputOpenDrainAlt7 = 0xF8U /**< \brief Open-drain, Alternate output function 7. */
122 } IfxPort_Mode;
123
124 /** \brief Pin output alternate index
125 */
126 typedef enum
127 {
128 IfxPort_OutputIdx_general = 0x10U << 3,
129 IfxPort_OutputIdx_alt1 = 0x11U << 3,
130 IfxPort_OutputIdx_alt2 = 0x12U << 3,
131 IfxPort_OutputIdx_alt3 = 0x13U << 3,
132 IfxPort_OutputIdx_alt4 = 0x14U << 3,
133 IfxPort_OutputIdx_alt5 = 0x15U << 3,
134 IfxPort_OutputIdx_alt6 = 0x16U << 3,
135 IfxPort_OutputIdx_alt7 = 0x17U << 3
136 } IfxPort_OutputIdx;
137
138 /** \brief Pin output mode definition
139 */
140 typedef enum
141 {
142 IfxPort_OutputMode_pushPull = 0x10U << 3,
143 IfxPort_OutputMode_openDrain = 0x18U << 3,
144 IfxPort_OutputMode_none = 0
145 } IfxPort_OutputMode;
146
147 /** \brief Pad driver mode definition (strength and slew rate).
148 *
149 * \see Ifx_P.PDR, IfxPort_setPinPadDriver()
150 */
151 typedef enum
152 {
153 IfxPort_PadDriver_cmosAutomotiveSpeed1 = 0, /**< \brief Speed grade 1. */
154 IfxPort_PadDriver_cmosAutomotiveSpeed2 = 1, /**< \brief Speed grade 2. */
155 IfxPort_PadDriver_cmosAutomotiveSpeed3 = 2, /**< \brief Speed grade 3. */
156 IfxPort_PadDriver_cmosAutomotiveSpeed4 = 3, /**< \brief Speed grade 4. */
157 IfxPort_PadDriver_ttlSpeed1 = 8, /**< \brief Speed grade 1. */
158 IfxPort_PadDriver_ttlSpeed2 = 9, /**< \brief Speed grade 2. */
159 IfxPort_PadDriver_ttlSpeed3 = 10, /**< \brief Speed grade 3. */
160 IfxPort_PadDriver_ttlSpeed4 = 11, /**< \brief Speed grade 4. */
161 IfxPort_PadDriver_ttl3v3Speed1 = 12, /**< \brief 3.3v Pad supply speed1 */
162 IfxPort_PadDriver_ttl3v3Speed2 = 13, /**< \brief 3.3v Pad supply speed2 */
163 IfxPort_PadDriver_ttl3v3Speed3 = 14, /**< \brief 3.3v Pad supply speed3 */
164 IfxPort_PadDriver_ttl3v3Speed4 = 15 /**< \brief 3.3v Pad supply speed4 */
165 } IfxPort_PadDriver;
166
167 /** \brief MODULE_PORTx.LPCRx.B.PS1.Selects between 5v and 3.3v on Vext supply for the LVDSM pair
168 */
169 typedef enum
170 {
171 IfxPort_PadSupply_3v = 0, /**< \brief select,3.3v */
172 IfxPort_PadSupply_5v = 1 /**< \brief select,5V */
173 } IfxPort_PadSupply;
174
175 /** \brief enable analog/digital mode for port pin, as Defined in MODULE_PORTx.PDISC
176 */
177 typedef enum
178 {
179 IfxPort_PinFunctionMode_digital = 0, /**< \brief Pad Pn.x is enabled and can be selected for digital function */
180 IfxPort_PinFunctionMode_analog = 1 /**< \brief Pad Pn.x is enabled and can be selected for analog function */
181 } IfxPort_PinFunctionMode;
182
183 /** \brief Ifx_P output modification modes definition.
184 *
185 * \see Ifx_P.OMR, IfxPort_setPinState()
186 */
187 typedef enum
188 {
189 IfxPort_State_notChanged = (0 << 16) | (0 << 0), /**< \brief Ifx_P pin is left unchanged. */
190 IfxPort_State_high = (0 << 16) | (1U << 0), /**< \brief Ifx_P pin is set to high. */
191 IfxPort_State_low = (1U << 16) | (0 << 0), /**< \brief Ifx_P pin is set to low. */
192 IfxPort_State_toggled = (1U << 16) | (1U << 0) /**< \brief Ifx_P pin is toggled. */
193 } IfxPort_State;
194
195 /** \} */
196
197 /** \brief Enable/DIsable LVDS direction TX or RX
198 */
199 typedef enum
200 {
201 IfxPort_LvdsDirection_rx = 0, /**< \brief LVDS direction RX */
202 IfxPort_LvdsDirection_tx = 1 /**< \brief LVDS direction TX */
203 } IfxPort_LvdsDirection;
204
205 /** \brief Enable/DIsable LVDS Path.declared in MODULE_PORTx.LPCRx.TX_EN and MODULE_PORTx.LPCRx.RX_EN
206 */
207 typedef enum
208 {
209 IfxPort_LvdsPath_enable = 0, /**< \brief LVDS enabled */
210 IfxPort_LvdsPath_disable = 1 /**< \brief LVDS disabled */
211 } IfxPort_LvdsPath;
212
213 /** \brief Specifies whether LVDS pull down resistor must be enabled/disabled as declared in Register MODULE_PORT.LPCRx.PWDPD
214 */
215 typedef enum
216 {
217 IfxPort_LvdsPullDown_disable = 0, /**< \brief Disable Pull Down resistor */
218 IfxPort_LvdsPullDown_enable = 1 /**< \brief Enable Pull Down resistor */
219 } IfxPort_LvdsPullDown;
220
221 /** \brief Specifies LVDS-Termination mode as declare in Register MODULE_PORT.LPCRx.TERM
222 */
223 typedef enum
224 {
225 IfxPort_LvdsTerminationMode_external = 0, /**< \brief Termination Mode External */
226 IfxPort_LvdsTerminationMode_internal = 1 /**< \brief Termination Mode Internal */
227 } IfxPort_LvdsTerminationMode;
228
229 /******************************************************************************/
230 /*-----------------------------Data Structures--------------------------------*/
231 /******************************************************************************/
232
233 /** \addtogroup IfxLld_Port_Std_DataStructures
234 * \{ */
235 /** \brief To Configure LVDS mode
236 */
237 typedef struct
238 {
239 IfxPort_LvdsMode lvdsMode; /**< \brief specifies LVDS-M or LVDS-H mode */
240 IfxPort_ControlledBy enablePortControlled; /**< \brief specifies whether LVDS is controlled by PORT or HSCT */
241 IfxPort_PadSupply padSupply; /**< \brief specify supply voltage */
242 } IfxPort_LvdsConfig;
243
244 /** \brief Defines a pin
245 */
246 typedef struct
247 {
248 Ifx_P *port;
249 uint8 pinIndex;
250 } IfxPort_Pin;
251
252 /** \brief To configure pins
253 */
254 typedef struct
255 {
256 Ifx_P *port;
257 uint8 pinIndex;
258 IfxPort_OutputIdx mode;
259 IfxPort_PadDriver padDriver;
260 } IfxPort_Pin_Config;
261
262 /** \} */
263
264 /** \addtogroup IfxLld_Port_Std_SinglePin
265 * \{ */
266
267 /******************************************************************************/
268 /*-------------------------Inline Function Prototypes-------------------------*/
269 /******************************************************************************/
270
271 /** \brief Return the port state.
272 * \param port Pointer to the port which should be accessed.
273 * \param pinIndex Specifies the pin for which the state should be returned.
274 * \return Returns TRUE the pin is high; FALSE the pin is low
275 *
276 * Coding example:
277 * \code
278 * if( IfxPort_getPinState(&MODULE_P33, 0) ) {
279 * // ...
280 * }
281 * \endcode
282 *
283 */
284 IFX_INLINE boolean IfxPort_getPinState(Ifx_P *port, uint8 pinIndex);
285
286 /** \brief set analog/digital mode for pin
287 * \param port Pointer to Port register space
288 * \param pinIndex specifies the pin index
289 * \param mode set analog/digital mode
290 * \return None
291 */
292 IFX_INLINE void IfxPort_setPinFunctionMode(Ifx_P *port, uint8 pinIndex, IfxPort_PinFunctionMode mode);
293
294 /** \brief Set the port output.
295 * \param port Pointer to the port which should be accessed.
296 * \param pinIndex Specifies the pin to be set.
297 * \return None
298 *
299 * Coding example:
300 * \code
301 * IfxPort_setPinHigh(&MODULE_P33, 0);
302 * \endcode
303 *
304 * \see IfxPort_setPinState(), IfxPort_setPinLow(), IfxPort_togglePin()
305 *
306 */
307 IFX_INLINE void IfxPort_setPinHigh(Ifx_P *port, uint8 pinIndex);
308
309 /** \brief Reset the port output.
310 * \param port Pointer to the port which should be accessed.
311 * \param pinIndex Specifies the pin to be reset.
312 * \return None
313 *
314 * Coding example:
315 * \code
316 * IfxPort_setPinLow(&MODULE_P33, 0);
317 * \endcode
318 *
319 * \see IfxPort_setPinState(), IfxPort_setPinHigh(), IfxPort_togglePin()
320 *
321 */
322 IFX_INLINE void IfxPort_setPinLow(Ifx_P *port, uint8 pinIndex);
323
324 /** \brief Configure the port input / output mode.
325 * \param port Pointer to the port which should be accessed.
326 * \param pinIndex Specifies the pin to be configured.
327 * \param mode Specifies the port pin mode.
328 * \return None
329 *
330 * Coding example:
331 * \code
332 * IfxPort_setPinModeInput(&MODULE_P33, 0, IfxPort_InputMode_pullUp);
333 * \endcode
334 *
335 */
336 IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode);
337
338 /** \brief Configure the port input / output mode.
339 * \param port Pointer to the port which should be accessed.
340 * \param pinIndex Specifies the pin to be configured.
341 * \param mode Specifies the port pin mode.
342 * \param index Specifies the alternate (or general purpose) output channel.
343 * \return None
344 *
345 * Coding example:
346 * \code
347 * IfxPort_setPinModeOutput(&MODULE_P33, 0, IfxPort_OutputMode_pushPull, IfxPort_OutputIdx_general);
348 * \endcode
349 *
350 */
351 IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index);
352
353 /** \brief Set / Resets / Toggle the port output.
354 * \param port Pointer to the port which should be accessed.
355 * \param pinIndex Specifies the pin to modify.
356 * \param action Specifies the action: set, reset, toggle.
357 * \return None
358 *
359 * Coding example:
360 * \code
361 * IfxPort_setPinState(&MODULE_P33, 0, IfxPort_State_toggled);
362 * IfxPort_setPinState(&MODULE_P33, 0, IfxPort_State_toggled);
363 * IfxPort_setPinState(&MODULE_P33, 0, IfxPort_State_toggled);
364 * \endcode
365 *
366 */
367 IFX_INLINE void IfxPort_setPinState(Ifx_P *port, uint8 pinIndex, IfxPort_State action);
368
369 /** \brief Toggle the port output.
370 * \param port Pointer to the port which should be accessed.
371 * \param pinIndex Specifies the pin to be toggled.
372 * \return None
373 *
374 * Coding example:
375 * \code
376 * IfxPort_togglePin(&MODULE_P33, 0);
377 * \endcode
378 *
379 * \see IfxPort_setPinState(), IfxPort_setPinLow(), IfxPort_setPinHigh()
380 *
381 */
382 IFX_INLINE void IfxPort_togglePin(Ifx_P *port, uint8 pinIndex);
383
384 /******************************************************************************/
385 /*-------------------------Global Function Prototypes-------------------------*/
386 /******************************************************************************/
387
388 /** \brief Disable the emergency stop function.
389 * This function disables the emergency stop function. A check is done on port functionality.
390 * \param port Pointer to the port which should be accessed.
391 * \param pinIndex Specifies the pin for which the emergency stop function should be disabled.
392 * \return Returns TRUE if the emergency stop function has been disabled; FALSE if the emergency stop function could not be disabled
393 *
394 * Coding example:
395 * /code
396 * if( !IfxPort_disableEmergencyStop(&MODULE_P33, 0) )
397 * {
398 * // failed to disable emergency stop for P33.0
399 * }
400 * /endcode
401 *
402 * \see IfxPort_disableEmergencyStop(), IfxPort_resetESR()
403 *
404 */
405 IFX_EXTERN boolean IfxPort_disableEmergencyStop(Ifx_P *port, uint8 pinIndex);
406
407 /** \brief Enable the emergency stop function.
408 * This function enables the emergency stop function. A check is done on port functionality.
409 * \param port Pointer to the port which should be accessed.
410 * \param pinIndex Specifies the pin for which the emergency stop function should be enabled.
411 * \return Returns TRUE if the emergency stop function has been enabled; FALSE if the emergency stop function could not be enabled
412 *
413 * Coding example:
414 * \code
415 * if( !IfxPort_enableEmergencyStop(&MODULE_P33, 0) ) {
416 * // failed to enable emergency stop for P33.0
417 * }
418 * \endcode
419 *
420 * \see IfxPort_disableEmergencyStop(), IfxPort_setESR()
421 *
422 */
423 IFX_EXTERN boolean IfxPort_enableEmergencyStop(Ifx_P *port, uint8 pinIndex);
424
425 /** \brief Configure the port input / output mode.
426 * Also Configures the P40/P41 Port for digital functionality
427 * which bydefault support analog functionality.
428 * \param port Pointer to the port which should be accessed.
429 * \param pinIndex Specifies the pin to be configured.
430 * \param mode Specifies the port pin mode.
431 * \return None
432 *
433 * Coding example:
434 * \code
435 * IfxPort_setPinMode(&MODULE_P33, 0, IfxPort_Mode_outputPushPullGeneral);
436 * \endcode
437 *
438 */
439 IFX_EXTERN void IfxPort_setPinMode(Ifx_P *port, uint8 pinIndex, IfxPort_Mode mode);
440
441 /** \brief set lvds mode
442 * \param port pointer to Port Register space
443 * \param pinIndex specifies pin index
444 * \param pinMode specifes the mode of pin
445 * \param lvds config LVDS
446 * \return None
447 */
448 IFX_EXTERN void IfxPort_setPinModeLVDS(Ifx_P *port, uint8 pinIndex, IfxPort_Mode pinMode, IfxPort_LvdsConfig *lvds);
449
450 /** \brief Configure the pad driver mode.
451 * \param port Pointer to the port which should be accessed.
452 * \param pinIndex Specifies the pin for which the mode will be set.
453 * \param padDriver Specifies the driver mode.
454 * \return None
455 *
456 * Coding example:
457 * \code
458 * // enable strong 3.3V driver
459 * IfxPort_setPinPadDriver(&MODULE_P33, 0, IfxPort_PadDriver_cmosAutomotiveSpeed1);
460 * \endcode
461 *
462 */
463 IFX_EXTERN void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver);
464
465 /** \brief Enable the Pin Controller Selection.
466 * \param port Pointer to the port which should be accessed.
467 * \param pinIndex Specifies the pin for which the mode has to be set.
468 * \return None
469 */
470 IFX_EXTERN void IfxPort_setPinControllerSelection(Ifx_P *port, uint8 pinIndex);
471
472 /** \brief Disable the Pin Controller Selection.
473 * \param port Pointer to the port which should be accessed.
474 * \param pinIndex Specifies the pin for which the mode has to be cleared.
475 * \return None
476 */
477 IFX_EXTERN void IfxPort_resetPinControllerSelection(Ifx_P *port, uint8 pinIndex);
478
479 /** \} */
480
481 /** \addtogroup IfxLld_Port_Std_PortGroup
482 * \{ */
483
484 /******************************************************************************/
485 /*-------------------------Inline Function Prototypes-------------------------*/
486 /******************************************************************************/
487
488 /** \brief Return the port group state
489 * \param port Pointer to the port which should be accessed.
490 * \param pinIndex start at the given pin
491 * \param mask selects the pins which should be read (starting from pinIndex)
492 * \return Returns the selected pin values
493 *
494 * Coding example:
495 * \code
496 * // read the current value of P33[7:0]
497 * uint16 value = IfxPort_getGroupState(&MODULE_P33, 0, 0xff);
498 * \endcode
499 *
500 */
501 IFX_INLINE uint32 IfxPort_getGroupState(Ifx_P *port, uint8 pinIndex, uint16 mask);
502
503 /** \brief Set the port group state.
504 * \param port Pointer to the port which should be accessed.
505 * \param pinIndex start at the given pin
506 * \param mask selects the pins which should be modified (starting from pinIndex)
507 * \param data specifies the value which should be set
508 * \return None
509 *
510 * Coding example:
511 * \code
512 * // configure P33.[7:0] as GPIO outputs
513 * IfxPort_setGroupModeOutput(&MODULE_P33, 0, 0xff, IfxPort_OutputMode_pushPull, IfxPort_OutputIdx_general);
514 *
515 * // set initial value
516 * IfxPort_setGroupState(&MODULE_P33, 0, 0xff, 0x42);
517 * \endcode
518 *
519 */
520 IFX_INLINE void IfxPort_setGroupState(Ifx_P *port, uint8 pinIndex, uint16 mask, uint16 data);
521
522 /******************************************************************************/
523 /*-------------------------Global Function Prototypes-------------------------*/
524 /******************************************************************************/
525
526 /** \brief Returns the module address of the selected Port module
527 * \param port Pointer to PORT module registers
528 * \return PORT module register address
529 */
530 IFX_EXTERN Ifx_P *IfxPort_getAddress(IfxPort_Index port);
531
532 /** \brief Return port index within IfxModule_IndexMap (defined in IfxPort_cfg.c)
533 * \param port Pointer to the port for which the index number in IfxModule_IndexMap should be retrieved.
534 * \return port index of IfxModule_IndexMap. return -1 in case of unknown port index.
535 */
536 IFX_EXTERN IfxPort_Index IfxPort_getIndex(Ifx_P *port);
537
538 /** \brief Set pin modes to input at the pin location specified by '1' by the mask
539 * \param port Pointer to the port which should be accessed.
540 * \param pinIndex start at the given pin
541 * \param mask selects the pins which should be modified (starting from pinIndex)
542 * \param mode Specifies the port pin mode.
543 * \return None
544 *
545 * Coding example:
546 * \code
547 * // configure P33.[7:0] as GPIO inputs with Pull-Down enabled
548 * IfxPort_setGroupModeInput(&MODULE_P33, 0, 0xff, IfxPort_InputMode_pullDown);
549 * \endcode
550 *
551 */
552 IFX_EXTERN void IfxPort_setGroupModeInput(Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_InputMode mode);
553
554 /** \brief Set pin modes to output at the pin location specified by '1' by the mask starting at pinIndex
555 * \param port Pointer to the port which should be accessed.
556 * \param pinIndex start at the given pin
557 * \param mask selects the pins which should be modified (starting from pinIndex)
558 * \param mode Specifies the port pin mode.
559 * \param index Specifies the alternate (or general purpose) output channel.
560 * \return None
561 *
562 * Coding example:
563 * \code
564 * // configure P33.[7:0] as GPIO outputs
565 * IfxPort_setGroupModeOutput(&MODULE_P33, 0, 0xff, IfxPort_OutputMode_pushPull, IfxPort_OutputIdx_general);
566 * \endcode
567 *
568 */
569 IFX_EXTERN void IfxPort_setGroupModeOutput(Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_OutputMode mode, IfxPort_OutputIdx index);
570
571 /** \brief Set pad driver strength at the pin location specified by '1' by the mask
572 * \param port Pointer to the port which should be accessed.
573 * \param pinIndex start at the given pin
574 * \param mask selects the pins which should be modified (starting from pinIndex)
575 * \param padDriver Specifies the pad driver strength.
576 * \return None
577 *
578 * Coding example:
579 * \code
580 * // configure P33.[7:0] to use CMOS pad driver with speed 1
581 * IfxPort_setGroupPadDriver(&MODULE_P33, 0, 0xff, IfxPort_PadDriver_cmosAutomotiveSpeed1);
582 * \endcode
583 *
584 */
585 IFX_EXTERN void IfxPort_setGroupPadDriver(Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_PadDriver padDriver);
586
587 /** \} */
588
589 /******************************************************************************/
590 /*-------------------------Global Function Prototypes-------------------------*/
591 /******************************************************************************/
592
593 /** \brief Disable the emergency stop function.
594 * This function disables the emergency stop function. No check is done on port functionality.
595 * \param port Pointer to the port which should be accessed.
596 * \param pinIndex Specifies the pin for which the emergency stop function should be disabled.
597 * \return None
598 *
599 * \see IfxPort_disableEmergencyStop()
600 *
601 */
602 IFX_EXTERN void IfxPort_resetESR(Ifx_P *port, uint8 pinIndex);
603
604 /** \brief Enable the emergency stop function.
605 * This function enables the emergency stop function. No check is done on port functionality.
606 * \param port Pointer to the port which should be accessed.
607 * \param pinIndex Specifies the pin for which the emergency stop function should be enabled.
608 * \return None
609 *
610 * \see IfxPort_enableEmergencyStop()
611 *
612 */
613 IFX_EXTERN void IfxPort_setESR(Ifx_P *port, uint8 pinIndex);
614
615 /**
616 * \param port Pointer to the port which should be accessed.
617 * \param pinIndex Specifies the pin for which the mode has to be set.
618 * \param mode Selects the controller for the port pin(Tricore,EVADC,GETH,SCR etc)
619 * 0-> normal function
620 * 1-> Alternate functionality(SCR pin,EVADC PDD,GETH RGMII/MII etc)
621 * \return None
622 */
623 IFX_EXTERN void IfxPort_modifyPinControllerSelection(Ifx_P *port, uint8 pinIndex, boolean mode);
624
625 /******************************************************************************/
626 /*---------------------Inline Function Implementations------------------------*/
627 /******************************************************************************/
628
629 IFX_INLINE uint32 IfxPort_getGroupState(Ifx_P *port, uint8 pinIndex, uint16 mask)
630 {
631 return (uint32)((port->IN.U) >> (pinIndex)) & mask;
632 }
633
634
635 IFX_INLINE boolean IfxPort_getPinState(Ifx_P *port, uint8 pinIndex)
636 {
637 return (__getbit(&port->IN.U, pinIndex) != 0) ? TRUE : FALSE;
638 }
639
640
641 IFX_INLINE void IfxPort_setGroupState(Ifx_P *port, uint8 pinIndex, uint16 mask, uint16 data)
642 {
643 port->OUT.U = (port->OUT.U & ~((uint32)(mask)) << pinIndex) | (data << pinIndex);
644 }
645
646
647 IFX_INLINE void IfxPort_setPinFunctionMode(Ifx_P *port, uint8 pinIndex, IfxPort_PinFunctionMode mode)
648 {
649 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
650
651 IfxScuWdt_clearCpuEndinit(passwd);
652 port->PDISC.U |= (mode << pinIndex);
653 IfxScuWdt_setCpuEndinit(passwd);
654 }
655
656
657 IFX_INLINE void IfxPort_setPinHigh(Ifx_P *port, uint8 pinIndex)
658 {
659 IfxPort_setPinState(port, pinIndex, IfxPort_State_high);
660 }
661
662
663 IFX_INLINE void IfxPort_setPinLow(Ifx_P *port, uint8 pinIndex)
664 {
665 IfxPort_setPinState(port, pinIndex, IfxPort_State_low);
666 }
667
668
669 IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
670 {
671 IfxPort_setPinMode(port, pinIndex, (IfxPort_Mode)mode);
672 }
673
674
675 IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
676 {
677 IfxPort_setPinMode(port, pinIndex, (IfxPort_Mode)(index | mode));
678 }
679
680
681 IFX_INLINE void IfxPort_setPinState(Ifx_P *port, uint8 pinIndex, IfxPort_State action)
682 {
683 port->OMR.U = action << pinIndex;
684 }
685
686
687 IFX_INLINE void IfxPort_togglePin(Ifx_P *port, uint8 pinIndex)
688 {
689 IfxPort_setPinState(port, pinIndex, IfxPort_State_toggled);
690 }
691
692
693 #endif /* IFXPORT_H */
IfxPort_PadSupply_5v
select,5V
Definition: IfxPort.h:172
IfxPort_State_toggled
Ifx_P pin is toggled.
Definition: IfxPort.h:192
IfxPort_LvdsPath_disable
LVDS disabled.
Definition: IfxPort.h:210
IfxPort_Mode_outputOpenDrainAlt5
Open-drain, Alternate output function 5.
Definition: IfxPort.h:119
IfxPort_Mode_outputOpenDrainAlt4
Open-drain, Alternate output function 4.
Definition: IfxPort.h:118
IfxPort_Mode_outputPushPullAlt1
Push-pull, Alternate output function 1.
Definition: IfxPort.h:107
IfxPort_PinFunctionMode
IfxPort_PinFunctionMode
enable analog/digital mode for port pin, as Defined in MODULE_PORTx.PDISC
Definition: IfxPort.h:177
IfxPort_PadDriver_ttlSpeed4
Speed grade 4.
Definition: IfxPort.h:160
IfxPort_LvdsTerminationMode
IfxPort_LvdsTerminationMode
Specifies LVDS-Termination mode as declare in Register MODULE_PORT.LPCRx.TERM.
Definition: IfxPort.h:223
IfxPort_OutputMode_pushPull
Definition: IfxPort.h:142
IfxPort_Index
IfxPort_Index
List of the available Port resources.
Definition: IfxPort_cfg.h:76
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:126
IfxPort_PadDriver_ttlSpeed1
Speed grade 1.
Definition: IfxPort.h:157
IfxPort_LvdsPath
IfxPort_LvdsPath
Enable/DIsable LVDS Path.declared in MODULE_PORTx.LPCRx.TX_EN and MODULE_PORTx.LPCRx.RX_EN.
Definition: IfxPort.h:207
IfxPort_LvdsConfig
To Configure LVDS mode.
Definition: IfxPort.h:237
IfxPort_State_high
Ifx_P pin is set to high.
Definition: IfxPort.h:190
IfxPort_Mode_inputNoPullDevice
Input, No pull device connected.
Definition: IfxPort.h:103
IfxPort_setPinMode
IFX_EXTERN void IfxPort_setPinMode(Ifx_P *port, uint8 pinIndex, IfxPort_Mode mode)
Configure the port input / output mode. Also Configures the P40/P41 Port for digital functionality wh...
Definition: IfxPort.c:277
IfxPort_Mode_outputPushPullGeneral
Push-pull, General-purpose output.
Definition: IfxPort.h:106
IfxPort_Mode_outputOpenDrainAlt7
Open-drain, Alternate output function 7.
Definition: IfxPort.h:121
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:140
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxPort_setPinModeLVDS
IFX_EXTERN void IfxPort_setPinModeLVDS(Ifx_P *port, uint8 pinIndex, IfxPort_Mode pinMode, IfxPort_LvdsConfig *lvds)
set lvds mode
Definition: IfxPort.c:295
IfxPort_PinFunctionMode_analog
Pad Pn.x is enabled and can be selected for analog function.
Definition: IfxPort.h:180
IfxPort_OutputIdx_alt2
Definition: IfxPort.h:130
IfxPort_Mode_outputOpenDrainAlt6
Open-drain, Alternate output function 6.
Definition: IfxPort.h:120
Ifx_Assert.h
Assert functions.
IfxPort_LvdsPullDown_enable
Enable Pull Down resistor.
Definition: IfxPort.h:218
IfxPort_setPinPadDriver
IFX_EXTERN void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:322
IfxPort_ControlledBy_hsct
Port controlled by HSCT Module.
Definition: IfxPort.h:76
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxPort_PadDriver_ttl3v3Speed3
3.3v Pad supply speed3
Definition: IfxPort.h:163
IfxPort_setGroupModeInput
IFX_EXTERN void IfxPort_setGroupModeInput(Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_InputMode mode)
Set pin modes to input at the pin location specified by &#39;1&#39; by the mask.
Definition: IfxPort.c:155
IfxPort_Mode_inputPullDown
Input, pull-down device connected.
Definition: IfxPort.h:104
IfxPort_Pin_Config::padDriver
IfxPort_PadDriver padDriver
Definition: IfxPort.h:259
IfxPort_setGroupState
IFX_INLINE void IfxPort_setGroupState(Ifx_P *port, uint8 pinIndex, uint16 mask, uint16 data)
Set the port group state.
Definition: IfxPort.h:641
IfxPort_LvdsPullDown_disable
Disable Pull Down resistor.
Definition: IfxPort.h:217
IfxPort_InputMode_undefined
Definition: IfxPort.h:83
IfxPort_setPinControllerSelection
IFX_EXTERN void IfxPort_setPinControllerSelection(Ifx_P *port, uint8 pinIndex)
Enable the Pin Controller Selection.
Definition: IfxPort.c:337
IfxPort_State
IfxPort_State
Ifx_P output modification modes definition.
Definition: IfxPort.h:187
IfxPort_LvdsTerminationMode_internal
Termination Mode Internal.
Definition: IfxPort.h:226
IfxPort_LvdsPullDown
IfxPort_LvdsPullDown
Specifies whether LVDS pull down resistor must be enabled/disabled as declared in Register MODULE_POR...
Definition: IfxPort.h:215
IfxPort_setPinModeInput
IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode.
Definition: IfxPort.h:669
IfxPort_Pin_Config::mode
IfxPort_OutputIdx mode
Definition: IfxPort.h:258
IfxPort_LvdsDirection
IfxPort_LvdsDirection
Enable/DIsable LVDS direction TX or RX.
Definition: IfxPort.h:199
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxPort_Mode_outputPushPullAlt4
Push-pull, Alternate output function 4.
Definition: IfxPort.h:110
IfxPort_ControlledBy
IfxPort_ControlledBy
The LVDS RX_DIS control function can be selected from the Port (default) or HSCT module.declared in MODULE_PORTx.LPCRx.
Definition: IfxPort.h:73
IfxPort_PadDriver_cmosAutomotiveSpeed4
Speed grade 4.
Definition: IfxPort.h:156
IfxScuWdt.h
SCU basic functionality.
IfxPort_OutputIdx_alt6
Definition: IfxPort.h:134
IfxPort_setGroupModeOutput
IFX_EXTERN void IfxPort_setGroupModeOutput(Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Set pin modes to output at the pin location specified by &#39;1&#39; by the mask starting at pinIndex...
Definition: IfxPort.c:193
IfxPort_Mode_outputOpenDrainAlt2
Open-drain, Alternate output function 2.
Definition: IfxPort.h:116
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxPort_setESR
IFX_EXTERN void IfxPort_setESR(Ifx_P *port, uint8 pinIndex)
Enable the emergency stop function. This function enables the emergency stop function. No check is done on port functionality.
Definition: IfxPort.c:145
IfxPort_OutputIdx_general
Definition: IfxPort.h:128
IfxPort_Mode_outputPushPullAlt7
Push-pull, Alternate output function 7.
Definition: IfxPort.h:113
IfxPort_PadDriver_ttl3v3Speed2
3.3v Pad supply speed2
Definition: IfxPort.h:162
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxPort_OutputIdx_alt3
Definition: IfxPort.h:131
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxPort_PadDriver_cmosAutomotiveSpeed1
Speed grade 1.
Definition: IfxPort.h:153
IfxPort_LvdsDirection_tx
LVDS direction TX.
Definition: IfxPort.h:202
IfxPort_PadDriver_cmosAutomotiveSpeed3
Speed grade 3.
Definition: IfxPort.h:155
IfxPort_Mode_outputPushPullAlt2
Push-pull, Alternate output function 2.
Definition: IfxPort.h:108
IfxPort_getGroupState
IFX_INLINE uint32 IfxPort_getGroupState(Ifx_P *port, uint8 pinIndex, uint16 mask)
Return the port group state.
Definition: IfxPort.h:629
IfxPort_Mode_outputOpenDrainGeneral
Open-drain, General-purpose output.
Definition: IfxPort.h:114
__getbit
#define __getbit
Definition: IfxCpu_IntrinsicsDcc.h:1749
IfxPort_Pin_Config
To configure pins.
Definition: IfxPort.h:254
IfxPort_Mode_outputPushPullAlt6
Push-pull, Alternate output function 6.
Definition: IfxPort.h:112
IfxPort_InputMode_noPullDevice
Definition: IfxPort.h:84
IfxPort_modifyPinControllerSelection
IFX_EXTERN void IfxPort_modifyPinControllerSelection(Ifx_P *port, uint8 pinIndex, boolean mode)
Definition: IfxPort.c:438
IfxPort_LvdsMode_medium
LVDS-M Mode.
Definition: IfxPort.h:94
IfxPort_setPinState
IFX_INLINE void IfxPort_setPinState(Ifx_P *port, uint8 pinIndex, IfxPort_State action)
Set / Resets / Toggle the port output.
Definition: IfxPort.h:681
IfxPort_OutputIdx_alt1
Definition: IfxPort.h:129
IfxPort_PadDriver_ttlSpeed2
Speed grade 2.
Definition: IfxPort.h:158
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:249
IfxPort_PadSupply_3v
select,3.3v
Definition: IfxPort.h:171
IfxPort_getIndex
IFX_EXTERN IfxPort_Index IfxPort_getIndex(Ifx_P *port)
Return port index within IfxModule_IndexMap (defined in IfxPort_cfg.c)
Definition: IfxPort.c:115
IfxPort_togglePin
IFX_INLINE void IfxPort_togglePin(Ifx_P *port, uint8 pinIndex)
Toggle the port output.
Definition: IfxPort.h:687
IfxPort_enableEmergencyStop
IFX_EXTERN boolean IfxPort_enableEmergencyStop(Ifx_P *port, uint8 pinIndex)
Enable the emergency stop function. This function enables the emergency stop function. A check is done on port functionality.
Definition: IfxPort.c:75
IfxPort_OutputIdx_alt4
Definition: IfxPort.h:132
IfxPort_Mode_outputPushPullAlt3
Push-pull, Alternate output function 3.
Definition: IfxPort.h:109
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:151
IfxPort_LvdsTerminationMode_external
Termination Mode External.
Definition: IfxPort.h:225
IfxPort_PadDriver_ttl3v3Speed1
3.3v Pad supply speed1
Definition: IfxPort.h:161
IfxPort_setPinLow
IFX_INLINE void IfxPort_setPinLow(Ifx_P *port, uint8 pinIndex)
Reset the port output.
Definition: IfxPort.h:663
IfxPort_State_low
Ifx_P pin is set to low.
Definition: IfxPort.h:191
IfxPort_PinFunctionMode_digital
Pad Pn.x is enabled and can be selected for digital function.
Definition: IfxPort.h:179
IfxPort_ControlledBy_port
port controlled by PORT Module
Definition: IfxPort.h:75
IfxPort_OutputIdx_alt7
Definition: IfxPort.h:135
IfxPort_Mode_inputPullUp
Input, pull-up device connected.
Definition: IfxPort.h:105
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:246
IfxPort_InputMode_pullDown
Definition: IfxPort.h:85
IfxPort_LvdsPath_enable
LVDS enabled.
Definition: IfxPort.h:209
IfxPort_LvdsMode
IfxPort_LvdsMode
specifies LVDS-M or LVDS-H mode as declare in Register MODULE_PORT.LPCRx.LVDSM
Definition: IfxPort.h:91
IfxPort_cfg.h
PORT on-chip implementation data.
IfxPort_State_notChanged
Ifx_P pin is left unchanged.
Definition: IfxPort.h:189
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxPort_disableEmergencyStop
IFX_EXTERN boolean IfxPort_disableEmergencyStop(Ifx_P *port, uint8 pinIndex)
Disable the emergency stop function. This function disables the emergency stop function. A check is done on port functionality.
Definition: IfxPort.c:52
IfxPort_PadDriver_ttlSpeed3
Speed grade 3.
Definition: IfxPort.h:159
IfxPort_PadSupply
IfxPort_PadSupply
MODULE_PORTx.LPCRx.B.PS1.Selects between 5v and 3.3v on Vext supply for the LVDSM pair...
Definition: IfxPort.h:169
IfxPort_LvdsMode_high
LVDS-H Mode.
Definition: IfxPort.h:93
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:81
IfxPort_getPinState
IFX_INLINE boolean IfxPort_getPinState(Ifx_P *port, uint8 pinIndex)
Return the port state.
Definition: IfxPort.h:635
IfxPort_getAddress
IFX_EXTERN Ifx_P * IfxPort_getAddress(IfxPort_Index port)
Returns the module address of the selected Port module.
Definition: IfxPort.c:96
IfxPort_LvdsConfig::enablePortControlled
IfxPort_ControlledBy enablePortControlled
specifies whether LVDS is controlled by PORT or HSCT
Definition: IfxPort.h:240
IfxPort_LvdsConfig::lvdsMode
IfxPort_LvdsMode lvdsMode
specifies LVDS-M or LVDS-H mode
Definition: IfxPort.h:239
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:248
IfxPort_setPinHigh
IFX_INLINE void IfxPort_setPinHigh(Ifx_P *port, uint8 pinIndex)
Set the port output.
Definition: IfxPort.h:657
IfxPort_PadDriver_ttl3v3Speed4
3.3v Pad supply speed4
Definition: IfxPort.h:164
IfxPort_Mode_outputOpenDrainAlt3
Open-drain, Alternate output function 3.
Definition: IfxPort.h:117
IfxPort_Mode
IfxPort_Mode
Ifx_P input / output mode definition.
Definition: IfxPort.h:101
IfxPort_LvdsDirection_rx
LVDS direction RX.
Definition: IfxPort.h:201
IfxPort_setGroupPadDriver
IFX_EXTERN void IfxPort_setGroupPadDriver(Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_PadDriver padDriver)
Set pad driver strength at the pin location specified by &#39;1&#39; by the mask.
Definition: IfxPort.c:233
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxPort_resetESR
IFX_EXTERN void IfxPort_resetESR(Ifx_P *port, uint8 pinIndex)
Disable the emergency stop function. This function disables the emergency stop function. No check is done on port functionality.
Definition: IfxPort.c:135
IfxPort_OutputIdx_alt5
Definition: IfxPort.h:133
IfxPort_setPinFunctionMode
IFX_INLINE void IfxPort_setPinFunctionMode(Ifx_P *port, uint8 pinIndex, IfxPort_PinFunctionMode mode)
set analog/digital mode for pin
Definition: IfxPort.h:647
IfxPort_OutputMode_none
Definition: IfxPort.h:144
IfxPort_Mode_outputPushPullAlt5
Push-pull, Alternate output function 5.
Definition: IfxPort.h:111
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxPort_OutputMode_openDrain
Definition: IfxPort.h:143
IfxPort_PadDriver_cmosAutomotiveSpeed2
Speed grade 2.
Definition: IfxPort.h:154
IfxPort_LvdsConfig::padSupply
IfxPort_PadSupply padSupply
specify supply voltage
Definition: IfxPort.h:241
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxPort_InputMode_pullUp
Definition: IfxPort.h:86
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:675
IfxPort_Mode_outputOpenDrainAlt1
Open-drain, Alternate output function 1.
Definition: IfxPort.h:115
IfxPort_resetPinControllerSelection
IFX_EXTERN void IfxPort_resetPinControllerSelection(Ifx_P *port, uint8 pinIndex)
Disable the Pin Controller Selection.
Definition: IfxPort.c:428


iLLD_TC38A: IfxPort_Io.c Source File

  • Port
  • Io
IfxPort_Io.c
Go to the documentation of this file.
1 /**
2 * \file IfxPort_Io.c
3 * \brief PORT IO details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxPort_Io.h"
47
48 /******************************************************************************/
49 /*-------------------------Function Implementations---------------------------*/
50 /******************************************************************************/
51
52 void IfxPort_Io_initModule(const IfxPort_Io_Config *config)
53 {
54 IfxPort_Io_ConfigPin *pinTable = (IfxPort_Io_ConfigPin *)&config->pinTable[0];
55
56 uint32 i;
57
58 for (i = 0; i < config->size; i++, ++pinTable)
59 {
60 IfxPort_Pin *pin = (IfxPort_Pin *)pinTable->pin;
61 IfxPort_setPinMode(pin->port, pin->pinIndex, pinTable->mode);
62 IfxPort_setPinPadDriver(pin->port, pin->pinIndex, pinTable->padDriver);
63 }
64 }
IfxPort_Io.h
PORT IO details.
IfxPort_setPinMode
void IfxPort_setPinMode(Ifx_P *port, uint8 pinIndex, IfxPort_Mode mode)
Configure the port input / output mode. Also Configures the P40/P41 Port for digital functionality wh...
Definition: IfxPort.c:277
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:322
IfxPort_Io_ConfigPin::pin
IFX_CONST IfxPort_Pin * pin
Definition: IfxPort_Io.h:178
IfxPort_Io_Config::size
uint32 size
Definition: IfxPort_Io.h:189
IfxPort_Io_ConfigPin::mode
IfxPort_Mode mode
Definition: IfxPort_Io.h:179
IfxPort_Io_Config::pinTable
IfxPort_Io_ConfigPin * pinTable
Definition: IfxPort_Io.h:190
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:249
IfxPort_Io_initModule
void IfxPort_Io_initModule(const IfxPort_Io_Config *config)
Definition: IfxPort_Io.c:52
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:246
IfxPort_Io_ConfigPin::padDriver
IfxPort_PadDriver padDriver
Definition: IfxPort_Io.h:180
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:248
IfxPort_Io_ConfigPin
Definition: IfxPort_Io.h:176
IfxPort_Io_Config
Definition: IfxPort_Io.h:187


iLLD_TC38A: IfxPort_Io.h Source File

  • Port
  • Io
IfxPort_Io.h
Go to the documentation of this file.
1 /**
2 * \file IfxPort_Io.h
3 * \brief PORT IO details
4 * \ingroup IfxLld_Port
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Port_Io_Usage How to use the PORT I/O driver?
42 * \ingroup IfxLld_Port
43 *
44 * The PORT I/O driver provides several functions to easily configure and read pins.
45 * The configuration includes input/output, mode, pad driver strength and state. For referencing the pins and their ports a IfxPort_PinMap is available as well.
46 *
47 * In the following sections it will be described, how to integrate the driver into the application framework.
48 *
49 * \section IfxLld_Port_Io_Preparation Preparation
50 * \subsection IfxLld_Port_Io_Include Include Files
51 *
52 * Include following header file into your C code:
53 * \code
54 * #include <Port/Io/IfxPort_Io.h>
55 * \endcode
56 *
57 * \subsection IfxLld_Port_Io_Variables Conifguration Table
58 *
59 * Specify the used pins, their modes and (for outputs) the pad driver strength:
60 * <br> Note: For inputs the pad driver strength is only a dummy.
61 * \code
62 * const IfxPort_Io_ConfigPin configPin[] = {
63 * {&IfxPort_P00_0, IfxPort_Mode_inputPullDown, IfxPort_PadDriver_cmosAutomotiveSpeed1}, // P00.0
64 * {&IfxPort_P33_0, IfxPort_Mode_outputPushPullGeneral, IfxPort_PadDriver_cmosAutomotiveSpeed1}, // P33.0
65 * };
66 * \endcode
67 *
68 * Note: the IfxPort_* pins are defined in IfxPort_PinMap
69 *
70 * \subsection IfxLld_Port_Io_Init Port Initialisation
71 *
72 * Assemble the final configuration structure:
73 *
74 * \code
75 * const IfxPort_Io_Config conf = {
76 * sizeof(configPin)/sizeof(IfxPort_Io_ConfigPin),
77 * (IfxPort_Io_ConfigPin *)configPin
78 * };
79 * \endcode
80 *
81 * Call the initialisation function:
82 *
83 * \code
84 * IfxPort_Io_initModule(&conf);
85 * \endcode
86 *
87 * Now the pins are configured as specified.
88 *
89 * \section IfxLld_Port_Io_MiscFunctions Misc. Functions of the Standard Layer
90 *
91 * \subsection IfxLld_Port_Io_Mode Pin Mode Configuration
92 *
93 * Generally, you can use one function for both inputs and outputs to set the desired mode.
94 *
95 * \code
96 * // configure P33.0 as general output
97 * IfxPort_setPinMode(&MODULE_P33, 0, IfxPort_Mode_outputPushPullGeneral);
98 * \endcode
99 *
100 * For inputs use the IfxPort_setPinModeInput function:
101 *
102 * \code
103 * // configure P33.0 as input with pullUp
104 * IfxPort_setPinModeInput(&MODULE_P33, 0, IfxPort_InputMode_pullUp);
105 * \endcode
106 *
107 * For outputs use the IfxPort_setModeOutput function:
108 *
109 * \code
110 * // configure P33.0 as output in general pushPull mode
111 * IfxPort_setPinModeOutput(&MODULE_P33, 0, IfxPort_OutputMode_pushPull, IfxPort_OutputIdx_general);
112 * \endcode
113 *
114 * If the pin is an output, the pad driver should be configured as well:
115 *
116 * \code
117 * IfxPort_setPinPadDriver(&MODULE_P33, 0, IfxPort_PadDriver_cmosAutomotiveSpeed1);
118 * \endcode
119 *
120 * \subsection IfxLld_Port_Io_Input Reading Input State
121 * Read the state of a single pin:
122 * \code
123 * uint8 state = IfxPort_getPinState(&MODULE_P33, 0); // read P33.0
124 * \endcode
125 *
126 * \subsection IfxLld_Port_Io_Output Setting Output State
127 *
128 * Generally, you can use one function to set an output pin high or low or to toggle it.
129 *
130 * \code
131 * IfxPort_setPinState(&MODULE_P33, 0, IfxPort_State_toggled); // toggle P33.0
132 * \endcode
133 *
134 * An output pin can be set high as following:
135 * \code
136 * IfxPort_setPinHigh(&MODULE_P33, 0); // P33.0 = 1
137 * \endcode
138 *
139 * An output pin can be set low as following:
140 * \code
141 * IfxPort_setPinLow(&MODULE_P33, 0); // P33.0 = 0
142 * \endcode
143 *
144 * \subsection IfxLld_Port_Io_Emergency Configure Emergency Function
145 *
146 * Enable emergency stop for P33.0:
147 * \code
148 * IfxPort_enableEmergencyStop(&MODULE_P33, 0);
149 * \endcode
150 *
151 * The driver also provides a function to disable this feature.
152 *
153 * \defgroup IfxLld_Port_Io Interface Driver
154 * \ingroup IfxLld_Port
155 * \defgroup IfxLld_Port_Io_DataStructures Data Structures
156 * \ingroup IfxLld_Port_Io
157 * \defgroup IfxLld_Port_Io_ModuleFunctions Module Functions
158 * \ingroup IfxLld_Port_Io
159 */
160
161 #ifndef IFXPORT_IO_H
162 #define IFXPORT_IO_H 1
163
164 /******************************************************************************/
165 /*----------------------------------Includes----------------------------------*/
166 /******************************************************************************/
167
168 #include "Port/Std/IfxPort.h"
169
170 /******************************************************************************/
171 /*-----------------------------Data Structures--------------------------------*/
172 /******************************************************************************/
173
174 /** \addtogroup IfxLld_Port_Io_DataStructures
175 * \{ */
176 typedef struct
177 {
178 IFX_CONST IfxPort_Pin *pin;
179 IfxPort_Mode mode;
180 IfxPort_PadDriver padDriver;
181 } IfxPort_Io_ConfigPin;
182
183 /** \} */
184
185 /** \addtogroup IfxLld_Port_Io_DataStructures
186 * \{ */
187 typedef struct
188 {
189 uint32 size;
190 IfxPort_Io_ConfigPin *pinTable;
191 } IfxPort_Io_Config;
192
193 /** \} */
194
195 /** \addtogroup IfxLld_Port_Io_ModuleFunctions
196 * \{ */
197
198 /******************************************************************************/
199 /*-------------------------Global Function Prototypes-------------------------*/
200 /******************************************************************************/
201
202 /**
203 * \return None
204 */
205 IFX_EXTERN void IfxPort_Io_initModule(const IfxPort_Io_Config *config);
206
207 /** \} */
208
209 #endif /* IFXPORT_IO_H */
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxPort_Io_ConfigPin::pin
IFX_CONST IfxPort_Pin * pin
Definition: IfxPort_Io.h:178
IfxPort_Io_Config::size
uint32 size
Definition: IfxPort_Io.h:189
IfxPort_Io_ConfigPin::mode
IfxPort_Mode mode
Definition: IfxPort_Io.h:179
IfxPort_Io_Config::pinTable
IfxPort_Io_ConfigPin * pinTable
Definition: IfxPort_Io.h:190
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxPort_Io_initModule
IFX_EXTERN void IfxPort_Io_initModule(const IfxPort_Io_Config *config)
Definition: IfxPort_Io.c:52
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:151
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:246
IfxPort_Io_ConfigPin::padDriver
IfxPort_PadDriver padDriver
Definition: IfxPort_Io.h:180
IfxPort_Io_ConfigPin
Definition: IfxPort_Io.h:176
IfxPort_Mode
IfxPort_Mode
Ifx_P input / output mode definition.
Definition: IfxPort.h:101
IfxPort_Io_Config
Definition: IfxPort_Io.h:187
IfxPort.h
PORT basic functionality.


iLLD_TC38A: IfxPort_PinMap.c Source File

  • _PinMap
IfxPort_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxPort_PinMap.c
3 * \brief PORT I/O map
4 * \ingroup IfxLld_Port
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "IfxPort_PinMap.h"
44
45 IfxPort_Pin IfxPort_P00_0 = {&MODULE_P00, 0};
46 IfxPort_Pin IfxPort_P00_1 = {&MODULE_P00, 1};
47 IfxPort_Pin IfxPort_P00_10 = {&MODULE_P00,10};
48 IfxPort_Pin IfxPort_P00_11 = {&MODULE_P00,11};
49 IfxPort_Pin IfxPort_P00_12 = {&MODULE_P00,12};
50 IfxPort_Pin IfxPort_P00_13 = {&MODULE_P00,13};
51 IfxPort_Pin IfxPort_P00_14 = {&MODULE_P00,14};
52 IfxPort_Pin IfxPort_P00_15 = {&MODULE_P00,15};
53 IfxPort_Pin IfxPort_P00_2 = {&MODULE_P00, 2};
54 IfxPort_Pin IfxPort_P00_3 = {&MODULE_P00, 3};
55 IfxPort_Pin IfxPort_P00_4 = {&MODULE_P00, 4};
56 IfxPort_Pin IfxPort_P00_5 = {&MODULE_P00, 5};
57 IfxPort_Pin IfxPort_P00_6 = {&MODULE_P00, 6};
58 IfxPort_Pin IfxPort_P00_7 = {&MODULE_P00, 7};
59 IfxPort_Pin IfxPort_P00_8 = {&MODULE_P00, 8};
60 IfxPort_Pin IfxPort_P00_9 = {&MODULE_P00, 9};
61 IfxPort_Pin IfxPort_P01_0 = {&MODULE_P01, 0};
62 IfxPort_Pin IfxPort_P01_1 = {&MODULE_P01, 1};
63 IfxPort_Pin IfxPort_P01_10 = {&MODULE_P01,10};
64 IfxPort_Pin IfxPort_P01_11 = {&MODULE_P01,11};
65 IfxPort_Pin IfxPort_P01_12 = {&MODULE_P01,12};
66 IfxPort_Pin IfxPort_P01_13 = {&MODULE_P01,13};
67 IfxPort_Pin IfxPort_P01_14 = {&MODULE_P01,14};
68 IfxPort_Pin IfxPort_P01_15 = {&MODULE_P01,15};
69 IfxPort_Pin IfxPort_P01_2 = {&MODULE_P01, 2};
70 IfxPort_Pin IfxPort_P01_3 = {&MODULE_P01, 3};
71 IfxPort_Pin IfxPort_P01_4 = {&MODULE_P01, 4};
72 IfxPort_Pin IfxPort_P01_5 = {&MODULE_P01, 5};
73 IfxPort_Pin IfxPort_P01_6 = {&MODULE_P01, 6};
74 IfxPort_Pin IfxPort_P01_7 = {&MODULE_P01, 7};
75 IfxPort_Pin IfxPort_P01_8 = {&MODULE_P01, 8};
76 IfxPort_Pin IfxPort_P01_9 = {&MODULE_P01, 9};
77 IfxPort_Pin IfxPort_P02_0 = {&MODULE_P02, 0};
78 IfxPort_Pin IfxPort_P02_1 = {&MODULE_P02, 1};
79 IfxPort_Pin IfxPort_P02_10 = {&MODULE_P02,10};
80 IfxPort_Pin IfxPort_P02_11 = {&MODULE_P02,11};
81 IfxPort_Pin IfxPort_P02_12 = {&MODULE_P02,12};
82 IfxPort_Pin IfxPort_P02_13 = {&MODULE_P02,13};
83 IfxPort_Pin IfxPort_P02_14 = {&MODULE_P02,14};
84 IfxPort_Pin IfxPort_P02_15 = {&MODULE_P02,15};
85 IfxPort_Pin IfxPort_P02_2 = {&MODULE_P02, 2};
86 IfxPort_Pin IfxPort_P02_3 = {&MODULE_P02, 3};
87 IfxPort_Pin IfxPort_P02_4 = {&MODULE_P02, 4};
88 IfxPort_Pin IfxPort_P02_5 = {&MODULE_P02, 5};
89 IfxPort_Pin IfxPort_P02_6 = {&MODULE_P02, 6};
90 IfxPort_Pin IfxPort_P02_7 = {&MODULE_P02, 7};
91 IfxPort_Pin IfxPort_P02_8 = {&MODULE_P02, 8};
92 IfxPort_Pin IfxPort_P02_9 = {&MODULE_P02, 9};
93 IfxPort_Pin IfxPort_P10_0 = {&MODULE_P10, 0};
94 IfxPort_Pin IfxPort_P10_1 = {&MODULE_P10, 1};
95 IfxPort_Pin IfxPort_P10_10 = {&MODULE_P10,10};
96 IfxPort_Pin IfxPort_P10_11 = {&MODULE_P10,11};
97 IfxPort_Pin IfxPort_P10_13 = {&MODULE_P10,13};
98 IfxPort_Pin IfxPort_P10_14 = {&MODULE_P10,14};
99 IfxPort_Pin IfxPort_P10_15 = {&MODULE_P10,15};
100 IfxPort_Pin IfxPort_P10_2 = {&MODULE_P10, 2};
101 IfxPort_Pin IfxPort_P10_3 = {&MODULE_P10, 3};
102 IfxPort_Pin IfxPort_P10_4 = {&MODULE_P10, 4};
103 IfxPort_Pin IfxPort_P10_5 = {&MODULE_P10, 5};
104 IfxPort_Pin IfxPort_P10_6 = {&MODULE_P10, 6};
105 IfxPort_Pin IfxPort_P10_7 = {&MODULE_P10, 7};
106 IfxPort_Pin IfxPort_P10_8 = {&MODULE_P10, 8};
107 IfxPort_Pin IfxPort_P10_9 = {&MODULE_P10, 9};
108 IfxPort_Pin IfxPort_P11_0 = {&MODULE_P11, 0};
109 IfxPort_Pin IfxPort_P11_1 = {&MODULE_P11, 1};
110 IfxPort_Pin IfxPort_P11_10 = {&MODULE_P11,10};
111 IfxPort_Pin IfxPort_P11_11 = {&MODULE_P11,11};
112 IfxPort_Pin IfxPort_P11_12 = {&MODULE_P11,12};
113 IfxPort_Pin IfxPort_P11_13 = {&MODULE_P11,13};
114 IfxPort_Pin IfxPort_P11_14 = {&MODULE_P11,14};
115 IfxPort_Pin IfxPort_P11_15 = {&MODULE_P11,15};
116 IfxPort_Pin IfxPort_P11_2 = {&MODULE_P11, 2};
117 IfxPort_Pin IfxPort_P11_3 = {&MODULE_P11, 3};
118 IfxPort_Pin IfxPort_P11_4 = {&MODULE_P11, 4};
119 IfxPort_Pin IfxPort_P11_5 = {&MODULE_P11, 5};
120 IfxPort_Pin IfxPort_P11_6 = {&MODULE_P11, 6};
121 IfxPort_Pin IfxPort_P11_7 = {&MODULE_P11, 7};
122 IfxPort_Pin IfxPort_P11_8 = {&MODULE_P11, 8};
123 IfxPort_Pin IfxPort_P11_9 = {&MODULE_P11, 9};
124 IfxPort_Pin IfxPort_P12_0 = {&MODULE_P12, 0};
125 IfxPort_Pin IfxPort_P12_1 = {&MODULE_P12, 1};
126 IfxPort_Pin IfxPort_P13_0 = {&MODULE_P13, 0};
127 IfxPort_Pin IfxPort_P13_1 = {&MODULE_P13, 1};
128 IfxPort_Pin IfxPort_P13_10 = {&MODULE_P13,10};
129 IfxPort_Pin IfxPort_P13_11 = {&MODULE_P13,11};
130 IfxPort_Pin IfxPort_P13_12 = {&MODULE_P13,12};
131 IfxPort_Pin IfxPort_P13_13 = {&MODULE_P13,13};
132 IfxPort_Pin IfxPort_P13_14 = {&MODULE_P13,14};
133 IfxPort_Pin IfxPort_P13_15 = {&MODULE_P13,15};
134 IfxPort_Pin IfxPort_P13_2 = {&MODULE_P13, 2};
135 IfxPort_Pin IfxPort_P13_3 = {&MODULE_P13, 3};
136 IfxPort_Pin IfxPort_P13_4 = {&MODULE_P13, 4};
137 IfxPort_Pin IfxPort_P13_5 = {&MODULE_P13, 5};
138 IfxPort_Pin IfxPort_P13_6 = {&MODULE_P13, 6};
139 IfxPort_Pin IfxPort_P13_7 = {&MODULE_P13, 7};
140 IfxPort_Pin IfxPort_P13_9 = {&MODULE_P13, 9};
141 IfxPort_Pin IfxPort_P14_0 = {&MODULE_P14, 0};
142 IfxPort_Pin IfxPort_P14_1 = {&MODULE_P14, 1};
143 IfxPort_Pin IfxPort_P14_10 = {&MODULE_P14,10};
144 IfxPort_Pin IfxPort_P14_11 = {&MODULE_P14,11};
145 IfxPort_Pin IfxPort_P14_12 = {&MODULE_P14,12};
146 IfxPort_Pin IfxPort_P14_13 = {&MODULE_P14,13};
147 IfxPort_Pin IfxPort_P14_14 = {&MODULE_P14,14};
148 IfxPort_Pin IfxPort_P14_15 = {&MODULE_P14,15};
149 IfxPort_Pin IfxPort_P14_2 = {&MODULE_P14, 2};
150 IfxPort_Pin IfxPort_P14_3 = {&MODULE_P14, 3};
151 IfxPort_Pin IfxPort_P14_4 = {&MODULE_P14, 4};
152 IfxPort_Pin IfxPort_P14_5 = {&MODULE_P14, 5};
153 IfxPort_Pin IfxPort_P14_6 = {&MODULE_P14, 6};
154 IfxPort_Pin IfxPort_P14_7 = {&MODULE_P14, 7};
155 IfxPort_Pin IfxPort_P14_8 = {&MODULE_P14, 8};
156 IfxPort_Pin IfxPort_P14_9 = {&MODULE_P14, 9};
157 IfxPort_Pin IfxPort_P15_0 = {&MODULE_P15, 0};
158 IfxPort_Pin IfxPort_P15_1 = {&MODULE_P15, 1};
159 IfxPort_Pin IfxPort_P15_10 = {&MODULE_P15,10};
160 IfxPort_Pin IfxPort_P15_11 = {&MODULE_P15,11};
161 IfxPort_Pin IfxPort_P15_12 = {&MODULE_P15,12};
162 IfxPort_Pin IfxPort_P15_13 = {&MODULE_P15,13};
163 IfxPort_Pin IfxPort_P15_14 = {&MODULE_P15,14};
164 IfxPort_Pin IfxPort_P15_15 = {&MODULE_P15,15};
165 IfxPort_Pin IfxPort_P15_2 = {&MODULE_P15, 2};
166 IfxPort_Pin IfxPort_P15_3 = {&MODULE_P15, 3};
167 IfxPort_Pin IfxPort_P15_4 = {&MODULE_P15, 4};
168 IfxPort_Pin IfxPort_P15_5 = {&MODULE_P15, 5};
169 IfxPort_Pin IfxPort_P15_6 = {&MODULE_P15, 6};
170 IfxPort_Pin IfxPort_P15_7 = {&MODULE_P15, 7};
171 IfxPort_Pin IfxPort_P15_8 = {&MODULE_P15, 8};
172 IfxPort_Pin IfxPort_P20_0 = {&MODULE_P20, 0};
173 IfxPort_Pin IfxPort_P20_1 = {&MODULE_P20, 1};
174 IfxPort_Pin IfxPort_P20_10 = {&MODULE_P20,10};
175 IfxPort_Pin IfxPort_P20_11 = {&MODULE_P20,11};
176 IfxPort_Pin IfxPort_P20_12 = {&MODULE_P20,12};
177 IfxPort_Pin IfxPort_P20_13 = {&MODULE_P20,13};
178 IfxPort_Pin IfxPort_P20_14 = {&MODULE_P20,14};
179 IfxPort_Pin IfxPort_P20_3 = {&MODULE_P20, 3};
180 IfxPort_Pin IfxPort_P20_6 = {&MODULE_P20, 6};
181 IfxPort_Pin IfxPort_P20_7 = {&MODULE_P20, 7};
182 IfxPort_Pin IfxPort_P20_8 = {&MODULE_P20, 8};
183 IfxPort_Pin IfxPort_P20_9 = {&MODULE_P20, 9};
184 IfxPort_Pin IfxPort_P21_0 = {&MODULE_P21, 0};
185 IfxPort_Pin IfxPort_P21_1 = {&MODULE_P21, 1};
186 IfxPort_Pin IfxPort_P21_2 = {&MODULE_P21, 2};
187 IfxPort_Pin IfxPort_P21_3 = {&MODULE_P21, 3};
188 IfxPort_Pin IfxPort_P21_4 = {&MODULE_P21, 4};
189 IfxPort_Pin IfxPort_P21_5 = {&MODULE_P21, 5};
190 IfxPort_Pin IfxPort_P21_6 = {&MODULE_P21, 6};
191 IfxPort_Pin IfxPort_P21_7 = {&MODULE_P21, 7};
192 IfxPort_Pin IfxPort_P22_0 = {&MODULE_P22, 0};
193 IfxPort_Pin IfxPort_P22_1 = {&MODULE_P22, 1};
194 IfxPort_Pin IfxPort_P22_10 = {&MODULE_P22,10};
195 IfxPort_Pin IfxPort_P22_11 = {&MODULE_P22,11};
196 IfxPort_Pin IfxPort_P22_2 = {&MODULE_P22, 2};
197 IfxPort_Pin IfxPort_P22_3 = {&MODULE_P22, 3};
198 IfxPort_Pin IfxPort_P22_4 = {&MODULE_P22, 4};
199 IfxPort_Pin IfxPort_P22_5 = {&MODULE_P22, 5};
200 IfxPort_Pin IfxPort_P22_6 = {&MODULE_P22, 6};
201 IfxPort_Pin IfxPort_P22_7 = {&MODULE_P22, 7};
202 IfxPort_Pin IfxPort_P22_8 = {&MODULE_P22, 8};
203 IfxPort_Pin IfxPort_P22_9 = {&MODULE_P22, 9};
204 IfxPort_Pin IfxPort_P23_0 = {&MODULE_P23, 0};
205 IfxPort_Pin IfxPort_P23_1 = {&MODULE_P23, 1};
206 IfxPort_Pin IfxPort_P23_2 = {&MODULE_P23, 2};
207 IfxPort_Pin IfxPort_P23_3 = {&MODULE_P23, 3};
208 IfxPort_Pin IfxPort_P23_4 = {&MODULE_P23, 4};
209 IfxPort_Pin IfxPort_P23_5 = {&MODULE_P23, 5};
210 IfxPort_Pin IfxPort_P23_6 = {&MODULE_P23, 6};
211 IfxPort_Pin IfxPort_P23_7 = {&MODULE_P23, 7};
212 IfxPort_Pin IfxPort_P24_0 = {&MODULE_P24, 0};
213 IfxPort_Pin IfxPort_P24_1 = {&MODULE_P24, 1};
214 IfxPort_Pin IfxPort_P24_10 = {&MODULE_P24,10};
215 IfxPort_Pin IfxPort_P24_11 = {&MODULE_P24,11};
216 IfxPort_Pin IfxPort_P24_12 = {&MODULE_P24,12};
217 IfxPort_Pin IfxPort_P24_13 = {&MODULE_P24,13};
218 IfxPort_Pin IfxPort_P24_14 = {&MODULE_P24,14};
219 IfxPort_Pin IfxPort_P24_15 = {&MODULE_P24,15};
220 IfxPort_Pin IfxPort_P24_2 = {&MODULE_P24, 2};
221 IfxPort_Pin IfxPort_P24_3 = {&MODULE_P24, 3};
222 IfxPort_Pin IfxPort_P24_4 = {&MODULE_P24, 4};
223 IfxPort_Pin IfxPort_P24_5 = {&MODULE_P24, 5};
224 IfxPort_Pin IfxPort_P24_6 = {&MODULE_P24, 6};
225 IfxPort_Pin IfxPort_P24_7 = {&MODULE_P24, 7};
226 IfxPort_Pin IfxPort_P24_8 = {&MODULE_P24, 8};
227 IfxPort_Pin IfxPort_P24_9 = {&MODULE_P24, 9};
228 IfxPort_Pin IfxPort_P25_0 = {&MODULE_P25, 0};
229 IfxPort_Pin IfxPort_P25_1 = {&MODULE_P25, 1};
230 IfxPort_Pin IfxPort_P25_10 = {&MODULE_P25,10};
231 IfxPort_Pin IfxPort_P25_11 = {&MODULE_P25,11};
232 IfxPort_Pin IfxPort_P25_12 = {&MODULE_P25,12};
233 IfxPort_Pin IfxPort_P25_13 = {&MODULE_P25,13};
234 IfxPort_Pin IfxPort_P25_14 = {&MODULE_P25,14};
235 IfxPort_Pin IfxPort_P25_15 = {&MODULE_P25,15};
236 IfxPort_Pin IfxPort_P25_2 = {&MODULE_P25, 2};
237 IfxPort_Pin IfxPort_P25_3 = {&MODULE_P25, 3};
238 IfxPort_Pin IfxPort_P25_4 = {&MODULE_P25, 4};
239 IfxPort_Pin IfxPort_P25_5 = {&MODULE_P25, 5};
240 IfxPort_Pin IfxPort_P25_6 = {&MODULE_P25, 6};
241 IfxPort_Pin IfxPort_P25_7 = {&MODULE_P25, 7};
242 IfxPort_Pin IfxPort_P25_8 = {&MODULE_P25, 8};
243 IfxPort_Pin IfxPort_P25_9 = {&MODULE_P25, 9};
244 IfxPort_Pin IfxPort_P26_0 = {&MODULE_P26, 0};
245 IfxPort_Pin IfxPort_P30_0 = {&MODULE_P30, 0};
246 IfxPort_Pin IfxPort_P30_1 = {&MODULE_P30, 1};
247 IfxPort_Pin IfxPort_P30_10 = {&MODULE_P30,10};
248 IfxPort_Pin IfxPort_P30_11 = {&MODULE_P30,11};
249 IfxPort_Pin IfxPort_P30_12 = {&MODULE_P30,12};
250 IfxPort_Pin IfxPort_P30_13 = {&MODULE_P30,13};
251 IfxPort_Pin IfxPort_P30_14 = {&MODULE_P30,14};
252 IfxPort_Pin IfxPort_P30_15 = {&MODULE_P30,15};
253 IfxPort_Pin IfxPort_P30_2 = {&MODULE_P30, 2};
254 IfxPort_Pin IfxPort_P30_3 = {&MODULE_P30, 3};
255 IfxPort_Pin IfxPort_P30_4 = {&MODULE_P30, 4};
256 IfxPort_Pin IfxPort_P30_5 = {&MODULE_P30, 5};
257 IfxPort_Pin IfxPort_P30_6 = {&MODULE_P30, 6};
258 IfxPort_Pin IfxPort_P30_7 = {&MODULE_P30, 7};
259 IfxPort_Pin IfxPort_P30_8 = {&MODULE_P30, 8};
260 IfxPort_Pin IfxPort_P30_9 = {&MODULE_P30, 9};
261 IfxPort_Pin IfxPort_P31_0 = {&MODULE_P31, 0};
262 IfxPort_Pin IfxPort_P31_1 = {&MODULE_P31, 1};
263 IfxPort_Pin IfxPort_P31_10 = {&MODULE_P31,10};
264 IfxPort_Pin IfxPort_P31_11 = {&MODULE_P31,11};
265 IfxPort_Pin IfxPort_P31_12 = {&MODULE_P31,12};
266 IfxPort_Pin IfxPort_P31_13 = {&MODULE_P31,13};
267 IfxPort_Pin IfxPort_P31_14 = {&MODULE_P31,14};
268 IfxPort_Pin IfxPort_P31_15 = {&MODULE_P31,15};
269 IfxPort_Pin IfxPort_P31_2 = {&MODULE_P31, 2};
270 IfxPort_Pin IfxPort_P31_3 = {&MODULE_P31, 3};
271 IfxPort_Pin IfxPort_P31_4 = {&MODULE_P31, 4};
272 IfxPort_Pin IfxPort_P31_5 = {&MODULE_P31, 5};
273 IfxPort_Pin IfxPort_P31_6 = {&MODULE_P31, 6};
274 IfxPort_Pin IfxPort_P31_7 = {&MODULE_P31, 7};
275 IfxPort_Pin IfxPort_P31_8 = {&MODULE_P31, 8};
276 IfxPort_Pin IfxPort_P31_9 = {&MODULE_P31, 9};
277 IfxPort_Pin IfxPort_P32_0 = {&MODULE_P32, 0};
278 IfxPort_Pin IfxPort_P32_1 = {&MODULE_P32, 1};
279 IfxPort_Pin IfxPort_P32_2 = {&MODULE_P32, 2};
280 IfxPort_Pin IfxPort_P32_3 = {&MODULE_P32, 3};
281 IfxPort_Pin IfxPort_P32_4 = {&MODULE_P32, 4};
282 IfxPort_Pin IfxPort_P32_5 = {&MODULE_P32, 5};
283 IfxPort_Pin IfxPort_P32_6 = {&MODULE_P32, 6};
284 IfxPort_Pin IfxPort_P32_7 = {&MODULE_P32, 7};
285 IfxPort_Pin IfxPort_P33_0 = {&MODULE_P33, 0};
286 IfxPort_Pin IfxPort_P33_1 = {&MODULE_P33, 1};
287 IfxPort_Pin IfxPort_P33_10 = {&MODULE_P33,10};
288 IfxPort_Pin IfxPort_P33_11 = {&MODULE_P33,11};
289 IfxPort_Pin IfxPort_P33_12 = {&MODULE_P33,12};
290 IfxPort_Pin IfxPort_P33_13 = {&MODULE_P33,13};
291 IfxPort_Pin IfxPort_P33_14 = {&MODULE_P33,14};
292 IfxPort_Pin IfxPort_P33_15 = {&MODULE_P33,15};
293 IfxPort_Pin IfxPort_P33_2 = {&MODULE_P33, 2};
294 IfxPort_Pin IfxPort_P33_3 = {&MODULE_P33, 3};
295 IfxPort_Pin IfxPort_P33_4 = {&MODULE_P33, 4};
296 IfxPort_Pin IfxPort_P33_5 = {&MODULE_P33, 5};
297 IfxPort_Pin IfxPort_P33_6 = {&MODULE_P33, 6};
298 IfxPort_Pin IfxPort_P33_7 = {&MODULE_P33, 7};
299 IfxPort_Pin IfxPort_P33_8 = {&MODULE_P33, 8};
300 IfxPort_Pin IfxPort_P33_9 = {&MODULE_P33, 9};
301 IfxPort_Pin IfxPort_P34_1 = {&MODULE_P34, 1};
302 IfxPort_Pin IfxPort_P34_2 = {&MODULE_P34, 2};
303 IfxPort_Pin IfxPort_P34_3 = {&MODULE_P34, 3};
304 IfxPort_Pin IfxPort_P34_4 = {&MODULE_P34, 4};
305 IfxPort_Pin IfxPort_P34_5 = {&MODULE_P34, 5};
306 IfxPort_Pin IfxPort_P40_0 = {&MODULE_P40, 0};
307 IfxPort_Pin IfxPort_P40_1 = {&MODULE_P40, 1};
308 IfxPort_Pin IfxPort_P40_10 = {&MODULE_P40,10};
309 IfxPort_Pin IfxPort_P40_11 = {&MODULE_P40,11};
310 IfxPort_Pin IfxPort_P40_12 = {&MODULE_P40,12};
311 IfxPort_Pin IfxPort_P40_13 = {&MODULE_P40,13};
312 IfxPort_Pin IfxPort_P40_14 = {&MODULE_P40,14};
313 IfxPort_Pin IfxPort_P40_15 = {&MODULE_P40,15};
314 IfxPort_Pin IfxPort_P40_2 = {&MODULE_P40, 2};
315 IfxPort_Pin IfxPort_P40_3 = {&MODULE_P40, 3};
316 IfxPort_Pin IfxPort_P40_4 = {&MODULE_P40, 4};
317 IfxPort_Pin IfxPort_P40_5 = {&MODULE_P40, 5};
318 IfxPort_Pin IfxPort_P40_6 = {&MODULE_P40, 6};
319 IfxPort_Pin IfxPort_P40_7 = {&MODULE_P40, 7};
320 IfxPort_Pin IfxPort_P40_8 = {&MODULE_P40, 8};
321 IfxPort_Pin IfxPort_P40_9 = {&MODULE_P40, 9};
322 IfxPort_Pin IfxPort_P41_0 = {&MODULE_P41, 0};
323 IfxPort_Pin IfxPort_P41_1 = {&MODULE_P41, 1};
324 IfxPort_Pin IfxPort_P41_2 = {&MODULE_P41, 2};
325 IfxPort_Pin IfxPort_P41_3 = {&MODULE_P41, 3};
326 IfxPort_Pin IfxPort_P41_4 = {&MODULE_P41, 4};
327 IfxPort_Pin IfxPort_P41_5 = {&MODULE_P41, 5};
328 IfxPort_Pin IfxPort_P41_6 = {&MODULE_P41, 6};
329 IfxPort_Pin IfxPort_P41_7 = {&MODULE_P41, 7};
330 IfxPort_Pin IfxPort_P41_8 = {&MODULE_P41, 8};
331
332
333 const IfxPort_Pin *IfxPort_Pin_pinTable[IFXPORT_PINMAP_NUM_MODULES][IFXPORT_PINMAP_PIN_NUM_ITEMS] = {
334 {
335 &IfxPort_P00_0,
336 &IfxPort_P00_1,
337 &IfxPort_P00_2,
338 &IfxPort_P00_3,
339 &IfxPort_P00_4,
340 &IfxPort_P00_5,
341 &IfxPort_P00_6,
342 &IfxPort_P00_7,
343 &IfxPort_P00_8,
344 &IfxPort_P00_9,
345 &IfxPort_P00_10,
346 &IfxPort_P00_11,
347 &IfxPort_P00_12,
348 &IfxPort_P00_13,
349 &IfxPort_P00_14,
350 &IfxPort_P00_15
351 },
352 {
353 &IfxPort_P01_0,
354 &IfxPort_P01_1,
355 &IfxPort_P01_2,
356 &IfxPort_P01_3,
357 &IfxPort_P01_4,
358 &IfxPort_P01_5,
359 &IfxPort_P01_6,
360 &IfxPort_P01_7,
361 &IfxPort_P01_8,
362 &IfxPort_P01_9,
363 &IfxPort_P01_10,
364 &IfxPort_P01_11,
365 &IfxPort_P01_12,
366 &IfxPort_P01_13,
367 &IfxPort_P01_14,
368 &IfxPort_P01_15
369 },
370 {
371 &IfxPort_P02_0,
372 &IfxPort_P02_1,
373 &IfxPort_P02_2,
374 &IfxPort_P02_3,
375 &IfxPort_P02_4,
376 &IfxPort_P02_5,
377 &IfxPort_P02_6,
378 &IfxPort_P02_7,
379 &IfxPort_P02_8,
380 &IfxPort_P02_9,
381 &IfxPort_P02_10,
382 &IfxPort_P02_11,
383 &IfxPort_P02_12,
384 &IfxPort_P02_13,
385 &IfxPort_P02_14,
386 &IfxPort_P02_15
387 },
388 {
389 NULL_PTR,
390 NULL_PTR,
391 NULL_PTR,
392 NULL_PTR,
393 NULL_PTR,
394 NULL_PTR,
395 NULL_PTR,
396 NULL_PTR,
397 NULL_PTR,
398 NULL_PTR,
399 NULL_PTR,
400 NULL_PTR,
401 NULL_PTR,
402 NULL_PTR,
403 NULL_PTR,
404 NULL_PTR
405 },
406 {
407 NULL_PTR,
408 NULL_PTR,
409 NULL_PTR,
410 NULL_PTR,
411 NULL_PTR,
412 NULL_PTR,
413 NULL_PTR,
414 NULL_PTR,
415 NULL_PTR,
416 NULL_PTR,
417 NULL_PTR,
418 NULL_PTR,
419 NULL_PTR,
420 NULL_PTR,
421 NULL_PTR,
422 NULL_PTR
423 },
424 {
425 NULL_PTR,
426 NULL_PTR,
427 NULL_PTR,
428 NULL_PTR,
429 NULL_PTR,
430 NULL_PTR,
431 NULL_PTR,
432 NULL_PTR,
433 NULL_PTR,
434 NULL_PTR,
435 NULL_PTR,
436 NULL_PTR,
437 NULL_PTR,
438 NULL_PTR,
439 NULL_PTR,
440 NULL_PTR
441 },
442 {
443 NULL_PTR,
444 NULL_PTR,
445 NULL_PTR,
446 NULL_PTR,
447 NULL_PTR,
448 NULL_PTR,
449 NULL_PTR,
450 NULL_PTR,
451 NULL_PTR,
452 NULL_PTR,
453 NULL_PTR,
454 NULL_PTR,
455 NULL_PTR,
456 NULL_PTR,
457 NULL_PTR,
458 NULL_PTR
459 },
460 {
461 NULL_PTR,
462 NULL_PTR,
463 NULL_PTR,
464 NULL_PTR,
465 NULL_PTR,
466 NULL_PTR,
467 NULL_PTR,
468 NULL_PTR,
469 NULL_PTR,
470 NULL_PTR,
471 NULL_PTR,
472 NULL_PTR,
473 NULL_PTR,
474 NULL_PTR,
475 NULL_PTR,
476 NULL_PTR
477 },
478 {
479 NULL_PTR,
480 NULL_PTR,
481 NULL_PTR,
482 NULL_PTR,
483 NULL_PTR,
484 NULL_PTR,
485 NULL_PTR,
486 NULL_PTR,
487 NULL_PTR,
488 NULL_PTR,
489 NULL_PTR,
490 NULL_PTR,
491 NULL_PTR,
492 NULL_PTR,
493 NULL_PTR,
494 NULL_PTR
495 },
496 {
497 NULL_PTR,
498 NULL_PTR,
499 NULL_PTR,
500 NULL_PTR,
501 NULL_PTR,
502 NULL_PTR,
503 NULL_PTR,
504 NULL_PTR,
505 NULL_PTR,
506 NULL_PTR,
507 NULL_PTR,
508 NULL_PTR,
509 NULL_PTR,
510 NULL_PTR,
511 NULL_PTR,
512 NULL_PTR
513 },
514 {
515 &IfxPort_P10_0,
516 &IfxPort_P10_1,
517 &IfxPort_P10_2,
518 &IfxPort_P10_3,
519 &IfxPort_P10_4,
520 &IfxPort_P10_5,
521 &IfxPort_P10_6,
522 &IfxPort_P10_7,
523 &IfxPort_P10_8,
524 &IfxPort_P10_9,
525 &IfxPort_P10_10,
526 &IfxPort_P10_11,
527 NULL_PTR,
528 &IfxPort_P10_13,
529 &IfxPort_P10_14,
530 &IfxPort_P10_15
531 },
532 {
533 &IfxPort_P11_0,
534 &IfxPort_P11_1,
535 &IfxPort_P11_2,
536 &IfxPort_P11_3,
537 &IfxPort_P11_4,
538 &IfxPort_P11_5,
539 &IfxPort_P11_6,
540 &IfxPort_P11_7,
541 &IfxPort_P11_8,
542 &IfxPort_P11_9,
543 &IfxPort_P11_10,
544 &IfxPort_P11_11,
545 &IfxPort_P11_12,
546 &IfxPort_P11_13,
547 &IfxPort_P11_14,
548 &IfxPort_P11_15
549 },
550 {
551 &IfxPort_P12_0,
552 &IfxPort_P12_1,
553 NULL_PTR,
554 NULL_PTR,
555 NULL_PTR,
556 NULL_PTR,
557 NULL_PTR,
558 NULL_PTR,
559 NULL_PTR,
560 NULL_PTR,
561 NULL_PTR,
562 NULL_PTR,
563 NULL_PTR,
564 NULL_PTR,
565 NULL_PTR,
566 NULL_PTR
567 },
568 {
569 &IfxPort_P13_0,
570 &IfxPort_P13_1,
571 &IfxPort_P13_2,
572 &IfxPort_P13_3,
573 &IfxPort_P13_4,
574 &IfxPort_P13_5,
575 &IfxPort_P13_6,
576 &IfxPort_P13_7,
577 NULL_PTR,
578 &IfxPort_P13_9,
579 &IfxPort_P13_10,
580 &IfxPort_P13_11,
581 &IfxPort_P13_12,
582 &IfxPort_P13_13,
583 &IfxPort_P13_14,
584 &IfxPort_P13_15
585 },
586 {
587 &IfxPort_P14_0,
588 &IfxPort_P14_1,
589 &IfxPort_P14_2,
590 &IfxPort_P14_3,
591 &IfxPort_P14_4,
592 &IfxPort_P14_5,
593 &IfxPort_P14_6,
594 &IfxPort_P14_7,
595 &IfxPort_P14_8,
596 &IfxPort_P14_9,
597 &IfxPort_P14_10,
598 &IfxPort_P14_11,
599 &IfxPort_P14_12,
600 &IfxPort_P14_13,
601 &IfxPort_P14_14,
602 &IfxPort_P14_15
603 },
604 {
605 &IfxPort_P15_0,
606 &IfxPort_P15_1,
607 &IfxPort_P15_2,
608 &IfxPort_P15_3,
609 &IfxPort_P15_4,
610 &IfxPort_P15_5,
611 &IfxPort_P15_6,
612 &IfxPort_P15_7,
613 &IfxPort_P15_8,
614 NULL_PTR,
615 &IfxPort_P15_10,
616 &IfxPort_P15_11,
617 &IfxPort_P15_12,
618 &IfxPort_P15_13,
619 &IfxPort_P15_14,
620 &IfxPort_P15_15
621 },
622 {
623 NULL_PTR,
624 NULL_PTR,
625 NULL_PTR,
626 NULL_PTR,
627 NULL_PTR,
628 NULL_PTR,
629 NULL_PTR,
630 NULL_PTR,
631 NULL_PTR,
632 NULL_PTR,
633 NULL_PTR,
634 NULL_PTR,
635 NULL_PTR,
636 NULL_PTR,
637 NULL_PTR,
638 NULL_PTR
639 },
640 {
641 NULL_PTR,
642 NULL_PTR,
643 NULL_PTR,
644 NULL_PTR,
645 NULL_PTR,
646 NULL_PTR,
647 NULL_PTR,
648 NULL_PTR,
649 NULL_PTR,
650 NULL_PTR,
651 NULL_PTR,
652 NULL_PTR,
653 NULL_PTR,
654 NULL_PTR,
655 NULL_PTR,
656 NULL_PTR
657 },
658 {
659 NULL_PTR,
660 NULL_PTR,
661 NULL_PTR,
662 NULL_PTR,
663 NULL_PTR,
664 NULL_PTR,
665 NULL_PTR,
666 NULL_PTR,
667 NULL_PTR,
668 NULL_PTR,
669 NULL_PTR,
670 NULL_PTR,
671 NULL_PTR,
672 NULL_PTR,
673 NULL_PTR,
674 NULL_PTR
675 },
676 {
677 NULL_PTR,
678 NULL_PTR,
679 NULL_PTR,
680 NULL_PTR,
681 NULL_PTR,
682 NULL_PTR,
683 NULL_PTR,
684 NULL_PTR,
685 NULL_PTR,
686 NULL_PTR,
687 NULL_PTR,
688 NULL_PTR,
689 NULL_PTR,
690 NULL_PTR,
691 NULL_PTR,
692 NULL_PTR
693 },
694 {
695 &IfxPort_P20_0,
696 &IfxPort_P20_1,
697 NULL_PTR,
698 &IfxPort_P20_3,
699 NULL_PTR,
700 NULL_PTR,
701 &IfxPort_P20_6,
702 &IfxPort_P20_7,
703 &IfxPort_P20_8,
704 &IfxPort_P20_9,
705 &IfxPort_P20_10,
706 &IfxPort_P20_11,
707 &IfxPort_P20_12,
708 &IfxPort_P20_13,
709 &IfxPort_P20_14,
710 NULL_PTR
711 },
712 {
713 &IfxPort_P21_0,
714 &IfxPort_P21_1,
715 &IfxPort_P21_2,
716 &IfxPort_P21_3,
717 &IfxPort_P21_4,
718 &IfxPort_P21_5,
719 &IfxPort_P21_6,
720 &IfxPort_P21_7,
721 NULL_PTR,
722 NULL_PTR,
723 NULL_PTR,
724 NULL_PTR,
725 NULL_PTR,
726 NULL_PTR,
727 NULL_PTR,
728 NULL_PTR
729 },
730 {
731 &IfxPort_P22_0,
732 &IfxPort_P22_1,
733 &IfxPort_P22_2,
734 &IfxPort_P22_3,
735 &IfxPort_P22_4,
736 &IfxPort_P22_5,
737 &IfxPort_P22_6,
738 &IfxPort_P22_7,
739 &IfxPort_P22_8,
740 &IfxPort_P22_9,
741 &IfxPort_P22_10,
742 &IfxPort_P22_11,
743 NULL_PTR,
744 NULL_PTR,
745 NULL_PTR,
746 NULL_PTR
747 },
748 {
749 &IfxPort_P23_0,
750 &IfxPort_P23_1,
751 &IfxPort_P23_2,
752 &IfxPort_P23_3,
753 &IfxPort_P23_4,
754 &IfxPort_P23_5,
755 &IfxPort_P23_6,
756 &IfxPort_P23_7,
757 NULL_PTR,
758 NULL_PTR,
759 NULL_PTR,
760 NULL_PTR,
761 NULL_PTR,
762 NULL_PTR,
763 NULL_PTR,
764 NULL_PTR
765 },
766 {
767 &IfxPort_P24_0,
768 &IfxPort_P24_1,
769 &IfxPort_P24_2,
770 &IfxPort_P24_3,
771 &IfxPort_P24_4,
772 &IfxPort_P24_5,
773 &IfxPort_P24_6,
774 &IfxPort_P24_7,
775 &IfxPort_P24_8,
776 &IfxPort_P24_9,
777 &IfxPort_P24_10,
778 &IfxPort_P24_11,
779 &IfxPort_P24_12,
780 &IfxPort_P24_13,
781 &IfxPort_P24_14,
782 &IfxPort_P24_15
783 },
784 {
785 &IfxPort_P25_0,
786 &IfxPort_P25_1,
787 &IfxPort_P25_2,
788 &IfxPort_P25_3,
789 &IfxPort_P25_4,
790 &IfxPort_P25_5,
791 &IfxPort_P25_6,
792 &IfxPort_P25_7,
793 &IfxPort_P25_8,
794 &IfxPort_P25_9,
795 &IfxPort_P25_10,
796 &IfxPort_P25_11,
797 &IfxPort_P25_12,
798 &IfxPort_P25_13,
799 &IfxPort_P25_14,
800 &IfxPort_P25_15
801 },
802 {
803 &IfxPort_P26_0,
804 NULL_PTR,
805 NULL_PTR,
806 NULL_PTR,
807 NULL_PTR,
808 NULL_PTR,
809 NULL_PTR,
810 NULL_PTR,
811 NULL_PTR,
812 NULL_PTR,
813 NULL_PTR,
814 NULL_PTR,
815 NULL_PTR,
816 NULL_PTR,
817 NULL_PTR,
818 NULL_PTR
819 },
820 {
821 NULL_PTR,
822 NULL_PTR,
823 NULL_PTR,
824 NULL_PTR,
825 NULL_PTR,
826 NULL_PTR,
827 NULL_PTR,
828 NULL_PTR,
829 NULL_PTR,
830 NULL_PTR,
831 NULL_PTR,
832 NULL_PTR,
833 NULL_PTR,
834 NULL_PTR,
835 NULL_PTR,
836 NULL_PTR
837 },
838 {
839 NULL_PTR,
840 NULL_PTR,
841 NULL_PTR,
842 NULL_PTR,
843 NULL_PTR,
844 NULL_PTR,
845 NULL_PTR,
846 NULL_PTR,
847 NULL_PTR,
848 NULL_PTR,
849 NULL_PTR,
850 NULL_PTR,
851 NULL_PTR,
852 NULL_PTR,
853 NULL_PTR,
854 NULL_PTR
855 },
856 {
857 NULL_PTR,
858 NULL_PTR,
859 NULL_PTR,
860 NULL_PTR,
861 NULL_PTR,
862 NULL_PTR,
863 NULL_PTR,
864 NULL_PTR,
865 NULL_PTR,
866 NULL_PTR,
867 NULL_PTR,
868 NULL_PTR,
869 NULL_PTR,
870 NULL_PTR,
871 NULL_PTR,
872 NULL_PTR
873 },
874 {
875 &IfxPort_P30_0,
876 &IfxPort_P30_1,
877 &IfxPort_P30_2,
878 &IfxPort_P30_3,
879 &IfxPort_P30_4,
880 &IfxPort_P30_5,
881 &IfxPort_P30_6,
882 &IfxPort_P30_7,
883 &IfxPort_P30_8,
884 &IfxPort_P30_9,
885 &IfxPort_P30_10,
886 &IfxPort_P30_11,
887 &IfxPort_P30_12,
888 &IfxPort_P30_13,
889 &IfxPort_P30_14,
890 &IfxPort_P30_15
891 },
892 {
893 &IfxPort_P31_0,
894 &IfxPort_P31_1,
895 &IfxPort_P31_2,
896 &IfxPort_P31_3,
897 &IfxPort_P31_4,
898 &IfxPort_P31_5,
899 &IfxPort_P31_6,
900 &IfxPort_P31_7,
901 &IfxPort_P31_8,
902 &IfxPort_P31_9,
903 &IfxPort_P31_10,
904 &IfxPort_P31_11,
905 &IfxPort_P31_12,
906 &IfxPort_P31_13,
907 &IfxPort_P31_14,
908 &IfxPort_P31_15
909 },
910 {
911 &IfxPort_P32_0,
912 &IfxPort_P32_1,
913 &IfxPort_P32_2,
914 &IfxPort_P32_3,
915 &IfxPort_P32_4,
916 &IfxPort_P32_5,
917 &IfxPort_P32_6,
918 &IfxPort_P32_7,
919 NULL_PTR,
920 NULL_PTR,
921 NULL_PTR,
922 NULL_PTR,
923 NULL_PTR,
924 NULL_PTR,
925 NULL_PTR,
926 NULL_PTR
927 },
928 {
929 &IfxPort_P33_0,
930 &IfxPort_P33_1,
931 &IfxPort_P33_2,
932 &IfxPort_P33_3,
933 &IfxPort_P33_4,
934 &IfxPort_P33_5,
935 &IfxPort_P33_6,
936 &IfxPort_P33_7,
937 &IfxPort_P33_8,
938 &IfxPort_P33_9,
939 &IfxPort_P33_10,
940 &IfxPort_P33_11,
941 &IfxPort_P33_12,
942 &IfxPort_P33_13,
943 &IfxPort_P33_14,
944 &IfxPort_P33_15
945 },
946 {
947 NULL_PTR,
948 &IfxPort_P34_1,
949 &IfxPort_P34_2,
950 &IfxPort_P34_3,
951 &IfxPort_P34_4,
952 &IfxPort_P34_5,
953 NULL_PTR,
954 NULL_PTR,
955 NULL_PTR,
956 NULL_PTR,
957 NULL_PTR,
958 NULL_PTR,
959 NULL_PTR,
960 NULL_PTR,
961 NULL_PTR,
962 NULL_PTR
963 },
964 {
965 NULL_PTR,
966 NULL_PTR,
967 NULL_PTR,
968 NULL_PTR,
969 NULL_PTR,
970 NULL_PTR,
971 NULL_PTR,
972 NULL_PTR,
973 NULL_PTR,
974 NULL_PTR,
975 NULL_PTR,
976 NULL_PTR,
977 NULL_PTR,
978 NULL_PTR,
979 NULL_PTR,
980 NULL_PTR
981 },
982 {
983 NULL_PTR,
984 NULL_PTR,
985 NULL_PTR,
986 NULL_PTR,
987 NULL_PTR,
988 NULL_PTR,
989 NULL_PTR,
990 NULL_PTR,
991 NULL_PTR,
992 NULL_PTR,
993 NULL_PTR,
994 NULL_PTR,
995 NULL_PTR,
996 NULL_PTR,
997 NULL_PTR,
998 NULL_PTR
999 },
1000 {
1001 NULL_PTR,
1002 NULL_PTR,
1003 NULL_PTR,
1004 NULL_PTR,
1005 NULL_PTR,
1006 NULL_PTR,
1007 NULL_PTR,
1008 NULL_PTR,
1009 NULL_PTR,
1010 NULL_PTR,
1011 NULL_PTR,
1012 NULL_PTR,
1013 NULL_PTR,
1014 NULL_PTR,
1015 NULL_PTR,
1016 NULL_PTR
1017 },
1018 {
1019 NULL_PTR,
1020 NULL_PTR,
1021 NULL_PTR,
1022 NULL_PTR,
1023 NULL_PTR,
1024 NULL_PTR,
1025 NULL_PTR,
1026 NULL_PTR,
1027 NULL_PTR,
1028 NULL_PTR,
1029 NULL_PTR,
1030 NULL_PTR,
1031 NULL_PTR,
1032 NULL_PTR,
1033 NULL_PTR,
1034 NULL_PTR
1035 },
1036 {
1037 NULL_PTR,
1038 NULL_PTR,
1039 NULL_PTR,
1040 NULL_PTR,
1041 NULL_PTR,
1042 NULL_PTR,
1043 NULL_PTR,
1044 NULL_PTR,
1045 NULL_PTR,
1046 NULL_PTR,
1047 NULL_PTR,
1048 NULL_PTR,
1049 NULL_PTR,
1050 NULL_PTR,
1051 NULL_PTR,
1052 NULL_PTR
1053 },
1054 {
1055 &IfxPort_P40_0,
1056 &IfxPort_P40_1,
1057 &IfxPort_P40_2,
1058 &IfxPort_P40_3,
1059 &IfxPort_P40_4,
1060 &IfxPort_P40_5,
1061 &IfxPort_P40_6,
1062 &IfxPort_P40_7,
1063 &IfxPort_P40_8,
1064 &IfxPort_P40_9,
1065 &IfxPort_P40_10,
1066 &IfxPort_P40_11,
1067 &IfxPort_P40_12,
1068 &IfxPort_P40_13,
1069 &IfxPort_P40_14,
1070 &IfxPort_P40_15
1071 },
1072 {
1073 &IfxPort_P41_0,
1074 &IfxPort_P41_1,
1075 &IfxPort_P41_2,
1076 &IfxPort_P41_3,
1077 &IfxPort_P41_4,
1078 &IfxPort_P41_5,
1079 &IfxPort_P41_6,
1080 &IfxPort_P41_7,
1081 &IfxPort_P41_8,
1082 NULL_PTR,
1083 NULL_PTR,
1084 NULL_PTR,
1085 NULL_PTR,
1086 NULL_PTR,
1087 NULL_PTR,
1088 NULL_PTR
1089 }
1090 };
IfxPort_P15_3
IfxPort_Pin IfxPort_P15_3
Definition: IfxPort_PinMap.c:166
IfxPort_P11_1
IfxPort_Pin IfxPort_P11_1
Definition: IfxPort_PinMap.c:109
IfxPort_P25_0
IfxPort_Pin IfxPort_P25_0
Definition: IfxPort_PinMap.c:228
IfxPort_P01_2
IfxPort_Pin IfxPort_P01_2
Definition: IfxPort_PinMap.c:69
IfxPort_P14_5
IfxPort_Pin IfxPort_P14_5
Definition: IfxPort_PinMap.c:152
IfxPort_P13_3
IfxPort_Pin IfxPort_P13_3
Definition: IfxPort_PinMap.c:135
IfxPort_P14_4
IfxPort_Pin IfxPort_P14_4
Definition: IfxPort_PinMap.c:151
IfxPort_P21_3
IfxPort_Pin IfxPort_P21_3
Definition: IfxPort_PinMap.c:187
IfxPort_P22_7
IfxPort_Pin IfxPort_P22_7
Definition: IfxPort_PinMap.c:201
IfxPort_P31_7
IfxPort_Pin IfxPort_P31_7
Definition: IfxPort_PinMap.c:274
IfxPort_P34_2
IfxPort_Pin IfxPort_P34_2
Definition: IfxPort_PinMap.c:302
IfxPort_P13_1
IfxPort_Pin IfxPort_P13_1
Definition: IfxPort_PinMap.c:127
IfxPort_P13_14
IfxPort_Pin IfxPort_P13_14
Definition: IfxPort_PinMap.c:132
IfxPort_P23_5
IfxPort_Pin IfxPort_P23_5
Definition: IfxPort_PinMap.c:209
IfxPort_P00_3
IfxPort_Pin IfxPort_P00_3
Definition: IfxPort_PinMap.c:54
IfxPort_P24_8
IfxPort_Pin IfxPort_P24_8
Definition: IfxPort_PinMap.c:226
IfxPort_P02_14
IfxPort_Pin IfxPort_P02_14
Definition: IfxPort_PinMap.c:83
IfxPort_P15_5
IfxPort_Pin IfxPort_P15_5
Definition: IfxPort_PinMap.c:168
IfxPort_P22_5
IfxPort_Pin IfxPort_P22_5
Definition: IfxPort_PinMap.c:199
IfxPort_P33_12
IfxPort_Pin IfxPort_P33_12
Definition: IfxPort_PinMap.c:289
IfxPort_P31_2
IfxPort_Pin IfxPort_P31_2
Definition: IfxPort_PinMap.c:269
IfxPort_P00_7
IfxPort_Pin IfxPort_P00_7
Definition: IfxPort_PinMap.c:58
IfxPort_P30_2
IfxPort_Pin IfxPort_P30_2
Definition: IfxPort_PinMap.c:253
IfxPort_P31_1
IfxPort_Pin IfxPort_P31_1
Definition: IfxPort_PinMap.c:262
IfxPort_P41_6
IfxPort_Pin IfxPort_P41_6
Definition: IfxPort_PinMap.c:328
IfxPort_P40_9
IfxPort_Pin IfxPort_P40_9
Definition: IfxPort_PinMap.c:321
IfxPort_P33_6
IfxPort_Pin IfxPort_P33_6
Definition: IfxPort_PinMap.c:297
IfxPort_P23_4
IfxPort_Pin IfxPort_P23_4
Definition: IfxPort_PinMap.c:208
IfxPort_P00_2
IfxPort_Pin IfxPort_P00_2
Definition: IfxPort_PinMap.c:53
IfxPort_P32_2
IfxPort_Pin IfxPort_P32_2
Definition: IfxPort_PinMap.c:279
IfxPort_P41_0
IfxPort_Pin IfxPort_P41_0
Definition: IfxPort_PinMap.c:322
IfxPort_P14_7
IfxPort_Pin IfxPort_P14_7
Definition: IfxPort_PinMap.c:154
IfxPort_P20_14
IfxPort_Pin IfxPort_P20_14
Definition: IfxPort_PinMap.c:178
IfxPort_P22_2
IfxPort_Pin IfxPort_P22_2
Definition: IfxPort_PinMap.c:196
IfxPort_P11_14
IfxPort_Pin IfxPort_P11_14
Definition: IfxPort_PinMap.c:114
IfxPort_P30_12
IfxPort_Pin IfxPort_P30_12
Definition: IfxPort_PinMap.c:249
IfxPort_P24_5
IfxPort_Pin IfxPort_P24_5
Definition: IfxPort_PinMap.c:223
IfxPort_P23_7
IfxPort_Pin IfxPort_P23_7
Definition: IfxPort_PinMap.c:211
IfxPort_P33_15
IfxPort_Pin IfxPort_P33_15
Definition: IfxPort_PinMap.c:292
IfxPort_P31_8
IfxPort_Pin IfxPort_P31_8
Definition: IfxPort_PinMap.c:275
IfxPort_P01_1
IfxPort_Pin IfxPort_P01_1
Definition: IfxPort_PinMap.c:62
IfxPort_P11_5
IfxPort_Pin IfxPort_P11_5
Definition: IfxPort_PinMap.c:119
IfxPort_P10_14
IfxPort_Pin IfxPort_P10_14
Definition: IfxPort_PinMap.c:98
IfxPort_P02_0
IfxPort_Pin IfxPort_P02_0
Definition: IfxPort_PinMap.c:77
IfxPort_P10_0
IfxPort_Pin IfxPort_P10_0
Definition: IfxPort_PinMap.c:93
IfxPort_P31_0
IfxPort_Pin IfxPort_P31_0
Definition: IfxPort_PinMap.c:261
IfxPort_P41_4
IfxPort_Pin IfxPort_P41_4
Definition: IfxPort_PinMap.c:326
IfxPort_P01_7
IfxPort_Pin IfxPort_P01_7
Definition: IfxPort_PinMap.c:74
IfxPort_P33_1
IfxPort_Pin IfxPort_P33_1
Definition: IfxPort_PinMap.c:286
IfxPort_P30_9
IfxPort_Pin IfxPort_P30_9
Definition: IfxPort_PinMap.c:260
IfxPort_P02_3
IfxPort_Pin IfxPort_P02_3
Definition: IfxPort_PinMap.c:86
IfxPort_P22_4
IfxPort_Pin IfxPort_P22_4
Definition: IfxPort_PinMap.c:198
IfxPort_P10_5
IfxPort_Pin IfxPort_P10_5
Definition: IfxPort_PinMap.c:103
IfxPort_P21_0
IfxPort_Pin IfxPort_P21_0
Definition: IfxPort_PinMap.c:184
IfxPort_P24_9
IfxPort_Pin IfxPort_P24_9
Definition: IfxPort_PinMap.c:227
IfxPort_P23_1
IfxPort_Pin IfxPort_P23_1
Definition: IfxPort_PinMap.c:205
IfxPort_P33_3
IfxPort_Pin IfxPort_P33_3
Definition: IfxPort_PinMap.c:294
IfxPort_P10_6
IfxPort_Pin IfxPort_P10_6
Definition: IfxPort_PinMap.c:104
IfxPort_P20_13
IfxPort_Pin IfxPort_P20_13
Definition: IfxPort_PinMap.c:177
IfxPort_P32_5
IfxPort_Pin IfxPort_P32_5
Definition: IfxPort_PinMap.c:282
IfxPort_P13_13
IfxPort_Pin IfxPort_P13_13
Definition: IfxPort_PinMap.c:131
IfxPort_P21_6
IfxPort_Pin IfxPort_P21_6
Definition: IfxPort_PinMap.c:190
IfxPort_P40_5
IfxPort_Pin IfxPort_P40_5
Definition: IfxPort_PinMap.c:317
IfxPort_P40_13
IfxPort_Pin IfxPort_P40_13
Definition: IfxPort_PinMap.c:311
IfxPort_P00_8
IfxPort_Pin IfxPort_P00_8
Definition: IfxPort_PinMap.c:59
IfxPort_P14_10
IfxPort_Pin IfxPort_P14_10
Definition: IfxPort_PinMap.c:143
IfxPort_P23_3
IfxPort_Pin IfxPort_P23_3
Definition: IfxPort_PinMap.c:207
IfxPort_P00_6
IfxPort_Pin IfxPort_P00_6
Definition: IfxPort_PinMap.c:57
IfxPort_P33_5
IfxPort_Pin IfxPort_P33_5
Definition: IfxPort_PinMap.c:296
IfxPort_P40_15
IfxPort_Pin IfxPort_P40_15
Definition: IfxPort_PinMap.c:313
IfxPort_P40_14
IfxPort_Pin IfxPort_P40_14
Definition: IfxPort_PinMap.c:312
IfxPort_P10_10
IfxPort_Pin IfxPort_P10_10
Definition: IfxPort_PinMap.c:95
IfxPort_P02_2
IfxPort_Pin IfxPort_P02_2
Definition: IfxPort_PinMap.c:85
IfxPort_P11_6
IfxPort_Pin IfxPort_P11_6
Definition: IfxPort_PinMap.c:120
IfxPort_P31_4
IfxPort_Pin IfxPort_P31_4
Definition: IfxPort_PinMap.c:271
IfxPort_P31_5
IfxPort_Pin IfxPort_P31_5
Definition: IfxPort_PinMap.c:272
IfxPort_P01_11
IfxPort_Pin IfxPort_P01_11
Definition: IfxPort_PinMap.c:64
IfxPort_P40_4
IfxPort_Pin IfxPort_P40_4
Definition: IfxPort_PinMap.c:316
IfxPort_P33_14
IfxPort_Pin IfxPort_P33_14
Definition: IfxPort_PinMap.c:291
IfxPort_P00_9
IfxPort_Pin IfxPort_P00_9
Definition: IfxPort_PinMap.c:60
IfxPort_P20_1
IfxPort_Pin IfxPort_P20_1
Definition: IfxPort_PinMap.c:173
IfxPort_P13_15
IfxPort_Pin IfxPort_P13_15
Definition: IfxPort_PinMap.c:133
IfxPort_P13_7
IfxPort_Pin IfxPort_P13_7
Definition: IfxPort_PinMap.c:139
IfxPort_P24_1
IfxPort_Pin IfxPort_P24_1
Definition: IfxPort_PinMap.c:213
IfxPort_P11_4
IfxPort_Pin IfxPort_P11_4
Definition: IfxPort_PinMap.c:118
IfxPort_P24_14
IfxPort_Pin IfxPort_P24_14
Definition: IfxPort_PinMap.c:218
IfxPort_P23_2
IfxPort_Pin IfxPort_P23_2
Definition: IfxPort_PinMap.c:206
IfxPort_P11_2
IfxPort_Pin IfxPort_P11_2
Definition: IfxPort_PinMap.c:116
IfxPort_P01_0
IfxPort_Pin IfxPort_P01_0
Definition: IfxPort_PinMap.c:61
IfxPort_P00_0
IfxPort_Pin IfxPort_P00_0
Definition: IfxPort_PinMap.c:45
IfxPort_P25_1
IfxPort_Pin IfxPort_P25_1
Definition: IfxPort_PinMap.c:229
IfxPort_P40_8
IfxPort_Pin IfxPort_P40_8
Definition: IfxPort_PinMap.c:320
IfxPort_P01_4
IfxPort_Pin IfxPort_P01_4
Definition: IfxPort_PinMap.c:71
IfxPort_P22_10
IfxPort_Pin IfxPort_P22_10
Definition: IfxPort_PinMap.c:194
IfxPort_P31_10
IfxPort_Pin IfxPort_P31_10
Definition: IfxPort_PinMap.c:263
IfxPort_P00_12
IfxPort_Pin IfxPort_P00_12
Definition: IfxPort_PinMap.c:49
IfxPort_P10_13
IfxPort_Pin IfxPort_P10_13
Definition: IfxPort_PinMap.c:97
IfxPort_P13_10
IfxPort_Pin IfxPort_P13_10
Definition: IfxPort_PinMap.c:128
IfxPort_P11_8
IfxPort_Pin IfxPort_P11_8
Definition: IfxPort_PinMap.c:122
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxPort_P14_3
IfxPort_Pin IfxPort_P14_3
Definition: IfxPort_PinMap.c:150
IfxPort_P23_0
IfxPort_Pin IfxPort_P23_0
Definition: IfxPort_PinMap.c:204
IfxPort_P15_15
IfxPort_Pin IfxPort_P15_15
Definition: IfxPort_PinMap.c:164
IfxPort_P31_12
IfxPort_Pin IfxPort_P31_12
Definition: IfxPort_PinMap.c:265
IfxPort_P40_10
IfxPort_Pin IfxPort_P40_10
Definition: IfxPort_PinMap.c:308
IfxPort_P25_8
IfxPort_Pin IfxPort_P25_8
Definition: IfxPort_PinMap.c:242
IfxPort_P40_11
IfxPort_Pin IfxPort_P40_11
Definition: IfxPort_PinMap.c:309
IfxPort_P21_5
IfxPort_Pin IfxPort_P21_5
Definition: IfxPort_PinMap.c:189
IfxPort_P32_3
IfxPort_Pin IfxPort_P32_3
Definition: IfxPort_PinMap.c:280
IfxPort_P20_12
IfxPort_Pin IfxPort_P20_12
Definition: IfxPort_PinMap.c:176
IfxPort_P14_2
IfxPort_Pin IfxPort_P14_2
Definition: IfxPort_PinMap.c:149
IfxPort_P31_13
IfxPort_Pin IfxPort_P31_13
Definition: IfxPort_PinMap.c:266
IfxPort_P33_10
IfxPort_Pin IfxPort_P33_10
Definition: IfxPort_PinMap.c:287
IfxPort_P33_9
IfxPort_Pin IfxPort_P33_9
Definition: IfxPort_PinMap.c:300
IfxPort_PinMap.h
PORT I/O map.
IfxPort_P02_7
IfxPort_Pin IfxPort_P02_7
Definition: IfxPort_PinMap.c:90
IfxPort_P02_10
IfxPort_Pin IfxPort_P02_10
Definition: IfxPort_PinMap.c:79
IfxPort_P11_9
IfxPort_Pin IfxPort_P11_9
Definition: IfxPort_PinMap.c:123
IfxPort_P34_3
IfxPort_Pin IfxPort_P34_3
Definition: IfxPort_PinMap.c:303
IfxPort_P40_0
IfxPort_Pin IfxPort_P40_0
Definition: IfxPort_PinMap.c:306
IfxPort_P25_2
IfxPort_Pin IfxPort_P25_2
Definition: IfxPort_PinMap.c:236
IfxPort_P25_12
IfxPort_Pin IfxPort_P25_12
Definition: IfxPort_PinMap.c:232
IfxPort_P11_3
IfxPort_Pin IfxPort_P11_3
Definition: IfxPort_PinMap.c:117
IfxPort_P00_10
IfxPort_Pin IfxPort_P00_10
Definition: IfxPort_PinMap.c:47
IfxPort_P30_8
IfxPort_Pin IfxPort_P30_8
Definition: IfxPort_PinMap.c:259
IfxPort_P30_13
IfxPort_Pin IfxPort_P30_13
Definition: IfxPort_PinMap.c:250
IfxPort_P00_15
IfxPort_Pin IfxPort_P00_15
Definition: IfxPort_PinMap.c:52
IfxPort_P25_9
IfxPort_Pin IfxPort_P25_9
Definition: IfxPort_PinMap.c:243
IfxPort_P15_1
IfxPort_Pin IfxPort_P15_1
Definition: IfxPort_PinMap.c:158
IfxPort_P24_10
IfxPort_Pin IfxPort_P24_10
Definition: IfxPort_PinMap.c:214
IfxPort_P30_6
IfxPort_Pin IfxPort_P30_6
Definition: IfxPort_PinMap.c:257
IfxPort_P01_9
IfxPort_Pin IfxPort_P01_9
Definition: IfxPort_PinMap.c:76
IfxPort_P15_10
IfxPort_Pin IfxPort_P15_10
Definition: IfxPort_PinMap.c:159
IfxPort_P01_3
IfxPort_Pin IfxPort_P01_3
Definition: IfxPort_PinMap.c:70
IfxPort_P10_3
IfxPort_Pin IfxPort_P10_3
Definition: IfxPort_PinMap.c:101
IfxPort_P33_13
IfxPort_Pin IfxPort_P33_13
Definition: IfxPort_PinMap.c:290
IfxPort_P40_2
IfxPort_Pin IfxPort_P40_2
Definition: IfxPort_PinMap.c:314
IfxPort_P34_1
IfxPort_Pin IfxPort_P34_1
Definition: IfxPort_PinMap.c:301
IfxPort_P30_15
IfxPort_Pin IfxPort_P30_15
Definition: IfxPort_PinMap.c:252
IfxPort_P25_3
IfxPort_Pin IfxPort_P25_3
Definition: IfxPort_PinMap.c:237
IfxPort_P11_7
IfxPort_Pin IfxPort_P11_7
Definition: IfxPort_PinMap.c:121
IfxPort_P02_15
IfxPort_Pin IfxPort_P02_15
Definition: IfxPort_PinMap.c:84
IfxPort_P14_9
IfxPort_Pin IfxPort_P14_9
Definition: IfxPort_PinMap.c:156
IfxPort_P30_14
IfxPort_Pin IfxPort_P30_14
Definition: IfxPort_PinMap.c:251
IfxPort_P10_11
IfxPort_Pin IfxPort_P10_11
Definition: IfxPort_PinMap.c:96
IfxPort_P10_2
IfxPort_Pin IfxPort_P10_2
Definition: IfxPort_PinMap.c:100
IfxPort_P00_5
IfxPort_Pin IfxPort_P00_5
Definition: IfxPort_PinMap.c:56
IfxPort_P14_11
IfxPort_Pin IfxPort_P14_11
Definition: IfxPort_PinMap.c:144
IfxPort_P01_13
IfxPort_Pin IfxPort_P01_13
Definition: IfxPort_PinMap.c:66
IfxPort_P31_3
IfxPort_Pin IfxPort_P31_3
Definition: IfxPort_PinMap.c:270
IfxPort_P02_5
IfxPort_Pin IfxPort_P02_5
Definition: IfxPort_PinMap.c:88
IfxPort_P32_1
IfxPort_Pin IfxPort_P32_1
Definition: IfxPort_PinMap.c:278
IfxPort_P24_7
IfxPort_Pin IfxPort_P24_7
Definition: IfxPort_PinMap.c:225
IfxPort_P21_4
IfxPort_Pin IfxPort_P21_4
Definition: IfxPort_PinMap.c:188
IFXPORT_PINMAP_PIN_NUM_ITEMS
#define IFXPORT_PINMAP_PIN_NUM_ITEMS
Definition: IfxPort_PinMap.h:343
IfxPort_P15_12
IfxPort_Pin IfxPort_P15_12
Definition: IfxPort_PinMap.c:161
IfxPort_P24_11
IfxPort_Pin IfxPort_P24_11
Definition: IfxPort_PinMap.c:215
IfxPort_P00_4
IfxPort_Pin IfxPort_P00_4
Definition: IfxPort_PinMap.c:55
IfxPort_P10_7
IfxPort_Pin IfxPort_P10_7
Definition: IfxPort_PinMap.c:105
IfxPort_P32_0
IfxPort_Pin IfxPort_P32_0
Definition: IfxPort_PinMap.c:277
IfxPort_P11_11
IfxPort_Pin IfxPort_P11_11
Definition: IfxPort_PinMap.c:111
IfxPort_P01_5
IfxPort_Pin IfxPort_P01_5
Definition: IfxPort_PinMap.c:72
IfxPort_P02_4
IfxPort_Pin IfxPort_P02_4
Definition: IfxPort_PinMap.c:87
IfxPort_P15_0
IfxPort_Pin IfxPort_P15_0
Definition: IfxPort_PinMap.c:157
IfxPort_P22_1
IfxPort_Pin IfxPort_P22_1
Definition: IfxPort_PinMap.c:193
IfxPort_P02_13
IfxPort_Pin IfxPort_P02_13
Definition: IfxPort_PinMap.c:82
IfxPort_P32_4
IfxPort_Pin IfxPort_P32_4
Definition: IfxPort_PinMap.c:281
IfxPort_P33_8
IfxPort_Pin IfxPort_P33_8
Definition: IfxPort_PinMap.c:299
IfxPort_P31_6
IfxPort_Pin IfxPort_P31_6
Definition: IfxPort_PinMap.c:273
IfxPort_P10_8
IfxPort_Pin IfxPort_P10_8
Definition: IfxPort_PinMap.c:106
IfxPort_P25_10
IfxPort_Pin IfxPort_P25_10
Definition: IfxPort_PinMap.c:230
IfxPort_P24_4
IfxPort_Pin IfxPort_P24_4
Definition: IfxPort_PinMap.c:222
IfxPort_P01_6
IfxPort_Pin IfxPort_P01_6
Definition: IfxPort_PinMap.c:73
IfxPort_P22_6
IfxPort_Pin IfxPort_P22_6
Definition: IfxPort_PinMap.c:200
IfxPort_P02_11
IfxPort_Pin IfxPort_P02_11
Definition: IfxPort_PinMap.c:80
IfxPort_P22_9
IfxPort_Pin IfxPort_P22_9
Definition: IfxPort_PinMap.c:203
IfxPort_P15_4
IfxPort_Pin IfxPort_P15_4
Definition: IfxPort_PinMap.c:167
IfxPort_P14_8
IfxPort_Pin IfxPort_P14_8
Definition: IfxPort_PinMap.c:155
IfxPort_P31_15
IfxPort_Pin IfxPort_P31_15
Definition: IfxPort_PinMap.c:268
IfxPort_P15_11
IfxPort_Pin IfxPort_P15_11
Definition: IfxPort_PinMap.c:160
IfxPort_P24_6
IfxPort_Pin IfxPort_P24_6
Definition: IfxPort_PinMap.c:224
IfxPort_P10_1
IfxPort_Pin IfxPort_P10_1
Definition: IfxPort_PinMap.c:94
IfxPort_P33_2
IfxPort_Pin IfxPort_P33_2
Definition: IfxPort_PinMap.c:293
IfxPort_P01_8
IfxPort_Pin IfxPort_P01_8
Definition: IfxPort_PinMap.c:75
IfxPort_P14_12
IfxPort_Pin IfxPort_P14_12
Definition: IfxPort_PinMap.c:145
IfxPort_P25_15
IfxPort_Pin IfxPort_P25_15
Definition: IfxPort_PinMap.c:235
IfxPort_P20_8
IfxPort_Pin IfxPort_P20_8
Definition: IfxPort_PinMap.c:182
IfxPort_P24_2
IfxPort_Pin IfxPort_P24_2
Definition: IfxPort_PinMap.c:220
IfxPort_P13_11
IfxPort_Pin IfxPort_P13_11
Definition: IfxPort_PinMap.c:129
IfxPort_P20_3
IfxPort_Pin IfxPort_P20_3
Definition: IfxPort_PinMap.c:179
IfxPort_Pin_pinTable
const IfxPort_Pin * IfxPort_Pin_pinTable[IFXPORT_PINMAP_NUM_MODULES][IFXPORT_PINMAP_PIN_NUM_ITEMS]
Definition: IfxPort_PinMap.c:333
IfxPort_P30_10
IfxPort_Pin IfxPort_P30_10
Definition: IfxPort_PinMap.c:247
IfxPort_P01_14
IfxPort_Pin IfxPort_P01_14
Definition: IfxPort_PinMap.c:67
IfxPort_P32_7
IfxPort_Pin IfxPort_P32_7
Definition: IfxPort_PinMap.c:284
IfxPort_P40_12
IfxPort_Pin IfxPort_P40_12
Definition: IfxPort_PinMap.c:310
IfxPort_P25_11
IfxPort_Pin IfxPort_P25_11
Definition: IfxPort_PinMap.c:231
IfxPort_P14_1
IfxPort_Pin IfxPort_P14_1
Definition: IfxPort_PinMap.c:142
IfxPort_P12_1
IfxPort_Pin IfxPort_P12_1
Definition: IfxPort_PinMap.c:125
IfxPort_P15_6
IfxPort_Pin IfxPort_P15_6
Definition: IfxPort_PinMap.c:169
IfxPort_P30_11
IfxPort_Pin IfxPort_P30_11
Definition: IfxPort_PinMap.c:248
IfxPort_P24_12
IfxPort_Pin IfxPort_P24_12
Definition: IfxPort_PinMap.c:216
IfxPort_P00_14
IfxPort_Pin IfxPort_P00_14
Definition: IfxPort_PinMap.c:51
IfxPort_P30_5
IfxPort_Pin IfxPort_P30_5
Definition: IfxPort_PinMap.c:256
IfxPort_P26_0
IfxPort_Pin IfxPort_P26_0
Definition: IfxPort_PinMap.c:244
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:246
IfxPort_P10_15
IfxPort_Pin IfxPort_P10_15
Definition: IfxPort_PinMap.c:99
IfxPort_P13_4
IfxPort_Pin IfxPort_P13_4
Definition: IfxPort_PinMap.c:136
IfxPort_P15_14
IfxPort_Pin IfxPort_P15_14
Definition: IfxPort_PinMap.c:163
IfxPort_P31_9
IfxPort_Pin IfxPort_P31_9
Definition: IfxPort_PinMap.c:276
IfxPort_P20_7
IfxPort_Pin IfxPort_P20_7
Definition: IfxPort_PinMap.c:181
IfxPort_P14_14
IfxPort_Pin IfxPort_P14_14
Definition: IfxPort_PinMap.c:147
IfxPort_P25_5
IfxPort_Pin IfxPort_P25_5
Definition: IfxPort_PinMap.c:239
IfxPort_P25_13
IfxPort_Pin IfxPort_P25_13
Definition: IfxPort_PinMap.c:233
IfxPort_P11_10
IfxPort_Pin IfxPort_P11_10
Definition: IfxPort_PinMap.c:110
IfxPort_P02_6
IfxPort_Pin IfxPort_P02_6
Definition: IfxPort_PinMap.c:89
IfxPort_P32_6
IfxPort_Pin IfxPort_P32_6
Definition: IfxPort_PinMap.c:283
IfxPort_P41_1
IfxPort_Pin IfxPort_P41_1
Definition: IfxPort_PinMap.c:323
IfxPort_P21_2
IfxPort_Pin IfxPort_P21_2
Definition: IfxPort_PinMap.c:186
IfxPort_P40_6
IfxPort_Pin IfxPort_P40_6
Definition: IfxPort_PinMap.c:318
IfxPort_P11_13
IfxPort_Pin IfxPort_P11_13
Definition: IfxPort_PinMap.c:113
IfxPort_P14_15
IfxPort_Pin IfxPort_P14_15
Definition: IfxPort_PinMap.c:148
IfxPort_P13_0
IfxPort_Pin IfxPort_P13_0
Definition: IfxPort_PinMap.c:126
IfxPort_P15_7
IfxPort_Pin IfxPort_P15_7
Definition: IfxPort_PinMap.c:170
IfxPort_P40_1
IfxPort_Pin IfxPort_P40_1
Definition: IfxPort_PinMap.c:307
IfxPort_P20_11
IfxPort_Pin IfxPort_P20_11
Definition: IfxPort_PinMap.c:175
IfxPort_P02_8
IfxPort_Pin IfxPort_P02_8
Definition: IfxPort_PinMap.c:91
IfxPort_P40_7
IfxPort_Pin IfxPort_P40_7
Definition: IfxPort_PinMap.c:319
IfxPort_P40_3
IfxPort_Pin IfxPort_P40_3
Definition: IfxPort_PinMap.c:315
IfxPort_P15_8
IfxPort_Pin IfxPort_P15_8
Definition: IfxPort_PinMap.c:171
IfxPort_P22_8
IfxPort_Pin IfxPort_P22_8
Definition: IfxPort_PinMap.c:202
IfxPort_P12_0
IfxPort_Pin IfxPort_P12_0
Definition: IfxPort_PinMap.c:124
IfxPort_P00_1
IfxPort_Pin IfxPort_P00_1
Definition: IfxPort_PinMap.c:46
IfxPort_P30_4
IfxPort_Pin IfxPort_P30_4
Definition: IfxPort_PinMap.c:255
IfxPort_P00_13
IfxPort_Pin IfxPort_P00_13
Definition: IfxPort_PinMap.c:50
IfxPort_P24_15
IfxPort_Pin IfxPort_P24_15
Definition: IfxPort_PinMap.c:219
IfxPort_P33_4
IfxPort_Pin IfxPort_P33_4
Definition: IfxPort_PinMap.c:295
IfxPort_P02_9
IfxPort_Pin IfxPort_P02_9
Definition: IfxPort_PinMap.c:92
IfxPort_P41_2
IfxPort_Pin IfxPort_P41_2
Definition: IfxPort_PinMap.c:324
IfxPort_P02_1
IfxPort_Pin IfxPort_P02_1
Definition: IfxPort_PinMap.c:78
IfxPort_P24_13
IfxPort_Pin IfxPort_P24_13
Definition: IfxPort_PinMap.c:217
IfxPort_P14_0
IfxPort_Pin IfxPort_P14_0
Definition: IfxPort_PinMap.c:141
IfxPort_P02_12
IfxPort_Pin IfxPort_P02_12
Definition: IfxPort_PinMap.c:81
IfxPort_P33_11
IfxPort_Pin IfxPort_P33_11
Definition: IfxPort_PinMap.c:288
IfxPort_P15_13
IfxPort_Pin IfxPort_P15_13
Definition: IfxPort_PinMap.c:162
IfxPort_P25_6
IfxPort_Pin IfxPort_P25_6
Definition: IfxPort_PinMap.c:240
IfxPort_P14_13
IfxPort_Pin IfxPort_P14_13
Definition: IfxPort_PinMap.c:146
IfxPort_P22_3
IfxPort_Pin IfxPort_P22_3
Definition: IfxPort_PinMap.c:197
IfxPort_P25_14
IfxPort_Pin IfxPort_P25_14
Definition: IfxPort_PinMap.c:234
IfxPort_P25_4
IfxPort_Pin IfxPort_P25_4
Definition: IfxPort_PinMap.c:238
IfxPort_P13_5
IfxPort_Pin IfxPort_P13_5
Definition: IfxPort_PinMap.c:137
IfxPort_P11_0
IfxPort_Pin IfxPort_P11_0
Definition: IfxPort_PinMap.c:108
IfxPort_P41_5
IfxPort_Pin IfxPort_P41_5
Definition: IfxPort_PinMap.c:327
IfxPort_P13_12
IfxPort_Pin IfxPort_P13_12
Definition: IfxPort_PinMap.c:130
IfxPort_P41_8
IfxPort_Pin IfxPort_P41_8
Definition: IfxPort_PinMap.c:330
IfxPort_P21_1
IfxPort_Pin IfxPort_P21_1
Definition: IfxPort_PinMap.c:185
IfxPort_P23_6
IfxPort_Pin IfxPort_P23_6
Definition: IfxPort_PinMap.c:210
IfxPort_P13_6
IfxPort_Pin IfxPort_P13_6
Definition: IfxPort_PinMap.c:138
IfxPort_P20_6
IfxPort_Pin IfxPort_P20_6
Definition: IfxPort_PinMap.c:180
IfxPort_P21_7
IfxPort_Pin IfxPort_P21_7
Definition: IfxPort_PinMap.c:191
IfxPort_P20_0
IfxPort_Pin IfxPort_P20_0
Definition: IfxPort_PinMap.c:172
IfxPort_P11_15
IfxPort_Pin IfxPort_P11_15
Definition: IfxPort_PinMap.c:115
IfxPort_P34_5
IfxPort_Pin IfxPort_P34_5
Definition: IfxPort_PinMap.c:305
IfxPort_P01_10
IfxPort_Pin IfxPort_P01_10
Definition: IfxPort_PinMap.c:63
IfxPort_P24_3
IfxPort_Pin IfxPort_P24_3
Definition: IfxPort_PinMap.c:221
IfxPort_P01_15
IfxPort_Pin IfxPort_P01_15
Definition: IfxPort_PinMap.c:68
IfxPort_P31_14
IfxPort_Pin IfxPort_P31_14
Definition: IfxPort_PinMap.c:267
IfxPort_P13_2
IfxPort_Pin IfxPort_P13_2
Definition: IfxPort_PinMap.c:134
IfxPort_P34_4
IfxPort_Pin IfxPort_P34_4
Definition: IfxPort_PinMap.c:304
IfxPort_P13_9
IfxPort_Pin IfxPort_P13_9
Definition: IfxPort_PinMap.c:140
IfxPort_P01_12
IfxPort_Pin IfxPort_P01_12
Definition: IfxPort_PinMap.c:65
IfxPort_P30_3
IfxPort_Pin IfxPort_P30_3
Definition: IfxPort_PinMap.c:254
IfxPort_P22_11
IfxPort_Pin IfxPort_P22_11
Definition: IfxPort_PinMap.c:195
IfxPort_P20_10
IfxPort_Pin IfxPort_P20_10
Definition: IfxPort_PinMap.c:174
IfxPort_P41_7
IfxPort_Pin IfxPort_P41_7
Definition: IfxPort_PinMap.c:329
IfxPort_P24_0
IfxPort_Pin IfxPort_P24_0
Definition: IfxPort_PinMap.c:212
IfxPort_P31_11
IfxPort_Pin IfxPort_P31_11
Definition: IfxPort_PinMap.c:264
IfxPort_P25_7
IfxPort_Pin IfxPort_P25_7
Definition: IfxPort_PinMap.c:241
IfxPort_P33_0
IfxPort_Pin IfxPort_P33_0
Definition: IfxPort_PinMap.c:285
IfxPort_P30_0
IfxPort_Pin IfxPort_P30_0
Definition: IfxPort_PinMap.c:245
IfxPort_P30_7
IfxPort_Pin IfxPort_P30_7
Definition: IfxPort_PinMap.c:258
IfxPort_P22_0
IfxPort_Pin IfxPort_P22_0
Definition: IfxPort_PinMap.c:192
IfxPort_P11_12
IfxPort_Pin IfxPort_P11_12
Definition: IfxPort_PinMap.c:112
IfxPort_P30_1
IfxPort_Pin IfxPort_P30_1
Definition: IfxPort_PinMap.c:246
IfxPort_P15_2
IfxPort_Pin IfxPort_P15_2
Definition: IfxPort_PinMap.c:165
IFXPORT_PINMAP_NUM_MODULES
#define IFXPORT_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxPort_PinMap.h:342
IfxPort_P10_4
IfxPort_Pin IfxPort_P10_4
Definition: IfxPort_PinMap.c:102
IfxPort_P41_3
IfxPort_Pin IfxPort_P41_3
Definition: IfxPort_PinMap.c:325
IfxPort_P20_9
IfxPort_Pin IfxPort_P20_9
Definition: IfxPort_PinMap.c:183
IfxPort_P00_11
IfxPort_Pin IfxPort_P00_11
Definition: IfxPort_PinMap.c:48
IfxPort_P10_9
IfxPort_Pin IfxPort_P10_9
Definition: IfxPort_PinMap.c:107
IfxPort_P33_7
IfxPort_Pin IfxPort_P33_7
Definition: IfxPort_PinMap.c:298
IfxPort_P14_6
IfxPort_Pin IfxPort_P14_6
Definition: IfxPort_PinMap.c:153


iLLD_TC38A: IfxPort_PinMap.h Source File

  • _PinMap
IfxPort_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxPort_PinMap.h
3 * \brief PORT I/O map
4 * \ingroup IfxLld_Port
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Port_pinmap PORT Pin Mapping
42 * \ingroup IfxLld_Port
43 */
44
45 #ifndef IFXPORT_PINMAP_H
46 #define IFXPORT_PINMAP_H
47
48 #include <Port/Std/IfxPort.h>
49
50 /** \addtogroup IfxLld_Port_pinmap
51 * \{ */
52
53
54 IFX_EXTERN IfxPort_Pin IfxPort_P00_0; /**< \brief IfxPort_P00_0 */
55 IFX_EXTERN IfxPort_Pin IfxPort_P00_1; /**< \brief IfxPort_P00_1 */
56 IFX_EXTERN IfxPort_Pin IfxPort_P00_10; /**< \brief IfxPort_P00_10 */
57 IFX_EXTERN IfxPort_Pin IfxPort_P00_11; /**< \brief IfxPort_P00_11 */
58 IFX_EXTERN IfxPort_Pin IfxPort_P00_12; /**< \brief IfxPort_P00_12 */
59 IFX_EXTERN IfxPort_Pin IfxPort_P00_13; /**< \brief IfxPort_P00_13 */
60 IFX_EXTERN IfxPort_Pin IfxPort_P00_14; /**< \brief IfxPort_P00_14 */
61 IFX_EXTERN IfxPort_Pin IfxPort_P00_15; /**< \brief IfxPort_P00_15 */
62 IFX_EXTERN IfxPort_Pin IfxPort_P00_2; /**< \brief IfxPort_P00_2 */
63 IFX_EXTERN IfxPort_Pin IfxPort_P00_3; /**< \brief IfxPort_P00_3 */
64 IFX_EXTERN IfxPort_Pin IfxPort_P00_4; /**< \brief IfxPort_P00_4 */
65 IFX_EXTERN IfxPort_Pin IfxPort_P00_5; /**< \brief IfxPort_P00_5 */
66 IFX_EXTERN IfxPort_Pin IfxPort_P00_6; /**< \brief IfxPort_P00_6 */
67 IFX_EXTERN IfxPort_Pin IfxPort_P00_7; /**< \brief IfxPort_P00_7 */
68 IFX_EXTERN IfxPort_Pin IfxPort_P00_8; /**< \brief IfxPort_P00_8 */
69 IFX_EXTERN IfxPort_Pin IfxPort_P00_9; /**< \brief IfxPort_P00_9 */
70 IFX_EXTERN IfxPort_Pin IfxPort_P01_0; /**< \brief IfxPort_P01_0 */
71 IFX_EXTERN IfxPort_Pin IfxPort_P01_1; /**< \brief IfxPort_P01_1 */
72 IFX_EXTERN IfxPort_Pin IfxPort_P01_10; /**< \brief IfxPort_P01_10 */
73 IFX_EXTERN IfxPort_Pin IfxPort_P01_11; /**< \brief IfxPort_P01_11 */
74 IFX_EXTERN IfxPort_Pin IfxPort_P01_12; /**< \brief IfxPort_P01_12 */
75 IFX_EXTERN IfxPort_Pin IfxPort_P01_13; /**< \brief IfxPort_P01_13 */
76 IFX_EXTERN IfxPort_Pin IfxPort_P01_14; /**< \brief IfxPort_P01_14 */
77 IFX_EXTERN IfxPort_Pin IfxPort_P01_15; /**< \brief IfxPort_P01_15 */
78 IFX_EXTERN IfxPort_Pin IfxPort_P01_2; /**< \brief IfxPort_P01_2 */
79 IFX_EXTERN IfxPort_Pin IfxPort_P01_3; /**< \brief IfxPort_P01_3 */
80 IFX_EXTERN IfxPort_Pin IfxPort_P01_4; /**< \brief IfxPort_P01_4 */
81 IFX_EXTERN IfxPort_Pin IfxPort_P01_5; /**< \brief IfxPort_P01_5 */
82 IFX_EXTERN IfxPort_Pin IfxPort_P01_6; /**< \brief IfxPort_P01_6 */
83 IFX_EXTERN IfxPort_Pin IfxPort_P01_7; /**< \brief IfxPort_P01_7 */
84 IFX_EXTERN IfxPort_Pin IfxPort_P01_8; /**< \brief IfxPort_P01_8 */
85 IFX_EXTERN IfxPort_Pin IfxPort_P01_9; /**< \brief IfxPort_P01_9 */
86 IFX_EXTERN IfxPort_Pin IfxPort_P02_0; /**< \brief IfxPort_P02_0 */
87 IFX_EXTERN IfxPort_Pin IfxPort_P02_1; /**< \brief IfxPort_P02_1 */
88 IFX_EXTERN IfxPort_Pin IfxPort_P02_10; /**< \brief IfxPort_P02_10 */
89 IFX_EXTERN IfxPort_Pin IfxPort_P02_11; /**< \brief IfxPort_P02_11 */
90 IFX_EXTERN IfxPort_Pin IfxPort_P02_12; /**< \brief IfxPort_P02_12 */
91 IFX_EXTERN IfxPort_Pin IfxPort_P02_13; /**< \brief IfxPort_P02_13 */
92 IFX_EXTERN IfxPort_Pin IfxPort_P02_14; /**< \brief IfxPort_P02_14 */
93 IFX_EXTERN IfxPort_Pin IfxPort_P02_15; /**< \brief IfxPort_P02_15 */
94 IFX_EXTERN IfxPort_Pin IfxPort_P02_2; /**< \brief IfxPort_P02_2 */
95 IFX_EXTERN IfxPort_Pin IfxPort_P02_3; /**< \brief IfxPort_P02_3 */
96 IFX_EXTERN IfxPort_Pin IfxPort_P02_4; /**< \brief IfxPort_P02_4 */
97 IFX_EXTERN IfxPort_Pin IfxPort_P02_5; /**< \brief IfxPort_P02_5 */
98 IFX_EXTERN IfxPort_Pin IfxPort_P02_6; /**< \brief IfxPort_P02_6 */
99 IFX_EXTERN IfxPort_Pin IfxPort_P02_7; /**< \brief IfxPort_P02_7 */
100 IFX_EXTERN IfxPort_Pin IfxPort_P02_8; /**< \brief IfxPort_P02_8 */
101 IFX_EXTERN IfxPort_Pin IfxPort_P02_9; /**< \brief IfxPort_P02_9 */
102 IFX_EXTERN IfxPort_Pin IfxPort_P10_0; /**< \brief IfxPort_P10_0 */
103 IFX_EXTERN IfxPort_Pin IfxPort_P10_1; /**< \brief IfxPort_P10_1 */
104 IFX_EXTERN IfxPort_Pin IfxPort_P10_10; /**< \brief IfxPort_P10_10 */
105 IFX_EXTERN IfxPort_Pin IfxPort_P10_11; /**< \brief IfxPort_P10_11 */
106 IFX_EXTERN IfxPort_Pin IfxPort_P10_13; /**< \brief IfxPort_P10_13 */
107 IFX_EXTERN IfxPort_Pin IfxPort_P10_14; /**< \brief IfxPort_P10_14 */
108 IFX_EXTERN IfxPort_Pin IfxPort_P10_15; /**< \brief IfxPort_P10_15 */
109 IFX_EXTERN IfxPort_Pin IfxPort_P10_2; /**< \brief IfxPort_P10_2 */
110 IFX_EXTERN IfxPort_Pin IfxPort_P10_3; /**< \brief IfxPort_P10_3 */
111 IFX_EXTERN IfxPort_Pin IfxPort_P10_4; /**< \brief IfxPort_P10_4 */
112 IFX_EXTERN IfxPort_Pin IfxPort_P10_5; /**< \brief IfxPort_P10_5 */
113 IFX_EXTERN IfxPort_Pin IfxPort_P10_6; /**< \brief IfxPort_P10_6 */
114 IFX_EXTERN IfxPort_Pin IfxPort_P10_7; /**< \brief IfxPort_P10_7 */
115 IFX_EXTERN IfxPort_Pin IfxPort_P10_8; /**< \brief IfxPort_P10_8 */
116 IFX_EXTERN IfxPort_Pin IfxPort_P10_9; /**< \brief IfxPort_P10_9 */
117 IFX_EXTERN IfxPort_Pin IfxPort_P11_0; /**< \brief IfxPort_P11_0 */
118 IFX_EXTERN IfxPort_Pin IfxPort_P11_1; /**< \brief IfxPort_P11_1 */
119 IFX_EXTERN IfxPort_Pin IfxPort_P11_10; /**< \brief IfxPort_P11_10 */
120 IFX_EXTERN IfxPort_Pin IfxPort_P11_11; /**< \brief IfxPort_P11_11 */
121 IFX_EXTERN IfxPort_Pin IfxPort_P11_12; /**< \brief IfxPort_P11_12 */
122 IFX_EXTERN IfxPort_Pin IfxPort_P11_13; /**< \brief IfxPort_P11_13 */
123 IFX_EXTERN IfxPort_Pin IfxPort_P11_14; /**< \brief IfxPort_P11_14 */
124 IFX_EXTERN IfxPort_Pin IfxPort_P11_15; /**< \brief IfxPort_P11_15 */
125 IFX_EXTERN IfxPort_Pin IfxPort_P11_2; /**< \brief IfxPort_P11_2 */
126 IFX_EXTERN IfxPort_Pin IfxPort_P11_3; /**< \brief IfxPort_P11_3 */
127 IFX_EXTERN IfxPort_Pin IfxPort_P11_4; /**< \brief IfxPort_P11_4 */
128 IFX_EXTERN IfxPort_Pin IfxPort_P11_5; /**< \brief IfxPort_P11_5 */
129 IFX_EXTERN IfxPort_Pin IfxPort_P11_6; /**< \brief IfxPort_P11_6 */
130 IFX_EXTERN IfxPort_Pin IfxPort_P11_7; /**< \brief IfxPort_P11_7 */
131 IFX_EXTERN IfxPort_Pin IfxPort_P11_8; /**< \brief IfxPort_P11_8 */
132 IFX_EXTERN IfxPort_Pin IfxPort_P11_9; /**< \brief IfxPort_P11_9 */
133 IFX_EXTERN IfxPort_Pin IfxPort_P12_0; /**< \brief IfxPort_P12_0 */
134 IFX_EXTERN IfxPort_Pin IfxPort_P12_1; /**< \brief IfxPort_P12_1 */
135 IFX_EXTERN IfxPort_Pin IfxPort_P13_0; /**< \brief IfxPort_P13_0 */
136 IFX_EXTERN IfxPort_Pin IfxPort_P13_1; /**< \brief IfxPort_P13_1 */
137 IFX_EXTERN IfxPort_Pin IfxPort_P13_10; /**< \brief IfxPort_P13_10 */
138 IFX_EXTERN IfxPort_Pin IfxPort_P13_11; /**< \brief IfxPort_P13_11 */
139 IFX_EXTERN IfxPort_Pin IfxPort_P13_12; /**< \brief IfxPort_P13_12 */
140 IFX_EXTERN IfxPort_Pin IfxPort_P13_13; /**< \brief IfxPort_P13_13 */
141 IFX_EXTERN IfxPort_Pin IfxPort_P13_14; /**< \brief IfxPort_P13_14 */
142 IFX_EXTERN IfxPort_Pin IfxPort_P13_15; /**< \brief IfxPort_P13_15 */
143 IFX_EXTERN IfxPort_Pin IfxPort_P13_2; /**< \brief IfxPort_P13_2 */
144 IFX_EXTERN IfxPort_Pin IfxPort_P13_3; /**< \brief IfxPort_P13_3 */
145 IFX_EXTERN IfxPort_Pin IfxPort_P13_4; /**< \brief IfxPort_P13_4 */
146 IFX_EXTERN IfxPort_Pin IfxPort_P13_5; /**< \brief IfxPort_P13_5 */
147 IFX_EXTERN IfxPort_Pin IfxPort_P13_6; /**< \brief IfxPort_P13_6 */
148 IFX_EXTERN IfxPort_Pin IfxPort_P13_7; /**< \brief IfxPort_P13_7 */
149 IFX_EXTERN IfxPort_Pin IfxPort_P13_9; /**< \brief IfxPort_P13_9 */
150 IFX_EXTERN IfxPort_Pin IfxPort_P14_0; /**< \brief IfxPort_P14_0 */
151 IFX_EXTERN IfxPort_Pin IfxPort_P14_1; /**< \brief IfxPort_P14_1 */
152 IFX_EXTERN IfxPort_Pin IfxPort_P14_10; /**< \brief IfxPort_P14_10 */
153 IFX_EXTERN IfxPort_Pin IfxPort_P14_11; /**< \brief IfxPort_P14_11 */
154 IFX_EXTERN IfxPort_Pin IfxPort_P14_12; /**< \brief IfxPort_P14_12 */
155 IFX_EXTERN IfxPort_Pin IfxPort_P14_13; /**< \brief IfxPort_P14_13 */
156 IFX_EXTERN IfxPort_Pin IfxPort_P14_14; /**< \brief IfxPort_P14_14 */
157 IFX_EXTERN IfxPort_Pin IfxPort_P14_15; /**< \brief IfxPort_P14_15 */
158 IFX_EXTERN IfxPort_Pin IfxPort_P14_2; /**< \brief IfxPort_P14_2 */
159 IFX_EXTERN IfxPort_Pin IfxPort_P14_3; /**< \brief IfxPort_P14_3 */
160 IFX_EXTERN IfxPort_Pin IfxPort_P14_4; /**< \brief IfxPort_P14_4 */
161 IFX_EXTERN IfxPort_Pin IfxPort_P14_5; /**< \brief IfxPort_P14_5 */
162 IFX_EXTERN IfxPort_Pin IfxPort_P14_6; /**< \brief IfxPort_P14_6 */
163 IFX_EXTERN IfxPort_Pin IfxPort_P14_7; /**< \brief IfxPort_P14_7 */
164 IFX_EXTERN IfxPort_Pin IfxPort_P14_8; /**< \brief IfxPort_P14_8 */
165 IFX_EXTERN IfxPort_Pin IfxPort_P14_9; /**< \brief IfxPort_P14_9 */
166 IFX_EXTERN IfxPort_Pin IfxPort_P15_0; /**< \brief IfxPort_P15_0 */
167 IFX_EXTERN IfxPort_Pin IfxPort_P15_1; /**< \brief IfxPort_P15_1 */
168 IFX_EXTERN IfxPort_Pin IfxPort_P15_10; /**< \brief IfxPort_P15_10 */
169 IFX_EXTERN IfxPort_Pin IfxPort_P15_11; /**< \brief IfxPort_P15_11 */
170 IFX_EXTERN IfxPort_Pin IfxPort_P15_12; /**< \brief IfxPort_P15_12 */
171 IFX_EXTERN IfxPort_Pin IfxPort_P15_13; /**< \brief IfxPort_P15_13 */
172 IFX_EXTERN IfxPort_Pin IfxPort_P15_14; /**< \brief IfxPort_P15_14 */
173 IFX_EXTERN IfxPort_Pin IfxPort_P15_15; /**< \brief IfxPort_P15_15 */
174 IFX_EXTERN IfxPort_Pin IfxPort_P15_2; /**< \brief IfxPort_P15_2 */
175 IFX_EXTERN IfxPort_Pin IfxPort_P15_3; /**< \brief IfxPort_P15_3 */
176 IFX_EXTERN IfxPort_Pin IfxPort_P15_4; /**< \brief IfxPort_P15_4 */
177 IFX_EXTERN IfxPort_Pin IfxPort_P15_5; /**< \brief IfxPort_P15_5 */
178 IFX_EXTERN IfxPort_Pin IfxPort_P15_6; /**< \brief IfxPort_P15_6 */
179 IFX_EXTERN IfxPort_Pin IfxPort_P15_7; /**< \brief IfxPort_P15_7 */
180 IFX_EXTERN IfxPort_Pin IfxPort_P15_8; /**< \brief IfxPort_P15_8 */
181 IFX_EXTERN IfxPort_Pin IfxPort_P20_0; /**< \brief IfxPort_P20_0 */
182 IFX_EXTERN IfxPort_Pin IfxPort_P20_1; /**< \brief IfxPort_P20_1 */
183 IFX_EXTERN IfxPort_Pin IfxPort_P20_10; /**< \brief IfxPort_P20_10 */
184 IFX_EXTERN IfxPort_Pin IfxPort_P20_11; /**< \brief IfxPort_P20_11 */
185 IFX_EXTERN IfxPort_Pin IfxPort_P20_12; /**< \brief IfxPort_P20_12 */
186 IFX_EXTERN IfxPort_Pin IfxPort_P20_13; /**< \brief IfxPort_P20_13 */
187 IFX_EXTERN IfxPort_Pin IfxPort_P20_14; /**< \brief IfxPort_P20_14 */
188 IFX_EXTERN IfxPort_Pin IfxPort_P20_3; /**< \brief IfxPort_P20_3 */
189 IFX_EXTERN IfxPort_Pin IfxPort_P20_6; /**< \brief IfxPort_P20_6 */
190 IFX_EXTERN IfxPort_Pin IfxPort_P20_7; /**< \brief IfxPort_P20_7 */
191 IFX_EXTERN IfxPort_Pin IfxPort_P20_8; /**< \brief IfxPort_P20_8 */
192 IFX_EXTERN IfxPort_Pin IfxPort_P20_9; /**< \brief IfxPort_P20_9 */
193 IFX_EXTERN IfxPort_Pin IfxPort_P21_0; /**< \brief IfxPort_P21_0 */
194 IFX_EXTERN IfxPort_Pin IfxPort_P21_1; /**< \brief IfxPort_P21_1 */
195 IFX_EXTERN IfxPort_Pin IfxPort_P21_2; /**< \brief IfxPort_P21_2 */
196 IFX_EXTERN IfxPort_Pin IfxPort_P21_3; /**< \brief IfxPort_P21_3 */
197 IFX_EXTERN IfxPort_Pin IfxPort_P21_4; /**< \brief IfxPort_P21_4 */
198 IFX_EXTERN IfxPort_Pin IfxPort_P21_5; /**< \brief IfxPort_P21_5 */
199 IFX_EXTERN IfxPort_Pin IfxPort_P21_6; /**< \brief IfxPort_P21_6 */
200 IFX_EXTERN IfxPort_Pin IfxPort_P21_7; /**< \brief IfxPort_P21_7 */
201 IFX_EXTERN IfxPort_Pin IfxPort_P22_0; /**< \brief IfxPort_P22_0 */
202 IFX_EXTERN IfxPort_Pin IfxPort_P22_1; /**< \brief IfxPort_P22_1 */
203 IFX_EXTERN IfxPort_Pin IfxPort_P22_10; /**< \brief IfxPort_P22_10 */
204 IFX_EXTERN IfxPort_Pin IfxPort_P22_11; /**< \brief IfxPort_P22_11 */
205 IFX_EXTERN IfxPort_Pin IfxPort_P22_2; /**< \brief IfxPort_P22_2 */
206 IFX_EXTERN IfxPort_Pin IfxPort_P22_3; /**< \brief IfxPort_P22_3 */
207 IFX_EXTERN IfxPort_Pin IfxPort_P22_4; /**< \brief IfxPort_P22_4 */
208 IFX_EXTERN IfxPort_Pin IfxPort_P22_5; /**< \brief IfxPort_P22_5 */
209 IFX_EXTERN IfxPort_Pin IfxPort_P22_6; /**< \brief IfxPort_P22_6 */
210 IFX_EXTERN IfxPort_Pin IfxPort_P22_7; /**< \brief IfxPort_P22_7 */
211 IFX_EXTERN IfxPort_Pin IfxPort_P22_8; /**< \brief IfxPort_P22_8 */
212 IFX_EXTERN IfxPort_Pin IfxPort_P22_9; /**< \brief IfxPort_P22_9 */
213 IFX_EXTERN IfxPort_Pin IfxPort_P23_0; /**< \brief IfxPort_P23_0 */
214 IFX_EXTERN IfxPort_Pin IfxPort_P23_1; /**< \brief IfxPort_P23_1 */
215 IFX_EXTERN IfxPort_Pin IfxPort_P23_2; /**< \brief IfxPort_P23_2 */
216 IFX_EXTERN IfxPort_Pin IfxPort_P23_3; /**< \brief IfxPort_P23_3 */
217 IFX_EXTERN IfxPort_Pin IfxPort_P23_4; /**< \brief IfxPort_P23_4 */
218 IFX_EXTERN IfxPort_Pin IfxPort_P23_5; /**< \brief IfxPort_P23_5 */
219 IFX_EXTERN IfxPort_Pin IfxPort_P23_6; /**< \brief IfxPort_P23_6 */
220 IFX_EXTERN IfxPort_Pin IfxPort_P23_7; /**< \brief IfxPort_P23_7 */
221 IFX_EXTERN IfxPort_Pin IfxPort_P24_0; /**< \brief IfxPort_P24_0 */
222 IFX_EXTERN IfxPort_Pin IfxPort_P24_1; /**< \brief IfxPort_P24_1 */
223 IFX_EXTERN IfxPort_Pin IfxPort_P24_10; /**< \brief IfxPort_P24_10 */
224 IFX_EXTERN IfxPort_Pin IfxPort_P24_11; /**< \brief IfxPort_P24_11 */
225 IFX_EXTERN IfxPort_Pin IfxPort_P24_12; /**< \brief IfxPort_P24_12 */
226 IFX_EXTERN IfxPort_Pin IfxPort_P24_13; /**< \brief IfxPort_P24_13 */
227 IFX_EXTERN IfxPort_Pin IfxPort_P24_14; /**< \brief IfxPort_P24_14 */
228 IFX_EXTERN IfxPort_Pin IfxPort_P24_15; /**< \brief IfxPort_P24_15 */
229 IFX_EXTERN IfxPort_Pin IfxPort_P24_2; /**< \brief IfxPort_P24_2 */
230 IFX_EXTERN IfxPort_Pin IfxPort_P24_3; /**< \brief IfxPort_P24_3 */
231 IFX_EXTERN IfxPort_Pin IfxPort_P24_4; /**< \brief IfxPort_P24_4 */
232 IFX_EXTERN IfxPort_Pin IfxPort_P24_5; /**< \brief IfxPort_P24_5 */
233 IFX_EXTERN IfxPort_Pin IfxPort_P24_6; /**< \brief IfxPort_P24_6 */
234 IFX_EXTERN IfxPort_Pin IfxPort_P24_7; /**< \brief IfxPort_P24_7 */
235 IFX_EXTERN IfxPort_Pin IfxPort_P24_8; /**< \brief IfxPort_P24_8 */
236 IFX_EXTERN IfxPort_Pin IfxPort_P24_9; /**< \brief IfxPort_P24_9 */
237 IFX_EXTERN IfxPort_Pin IfxPort_P25_0; /**< \brief IfxPort_P25_0 */
238 IFX_EXTERN IfxPort_Pin IfxPort_P25_1; /**< \brief IfxPort_P25_1 */
239 IFX_EXTERN IfxPort_Pin IfxPort_P25_10; /**< \brief IfxPort_P25_10 */
240 IFX_EXTERN IfxPort_Pin IfxPort_P25_11; /**< \brief IfxPort_P25_11 */
241 IFX_EXTERN IfxPort_Pin IfxPort_P25_12; /**< \brief IfxPort_P25_12 */
242 IFX_EXTERN IfxPort_Pin IfxPort_P25_13; /**< \brief IfxPort_P25_13 */
243 IFX_EXTERN IfxPort_Pin IfxPort_P25_14; /**< \brief IfxPort_P25_14 */
244 IFX_EXTERN IfxPort_Pin IfxPort_P25_15; /**< \brief IfxPort_P25_15 */
245 IFX_EXTERN IfxPort_Pin IfxPort_P25_2; /**< \brief IfxPort_P25_2 */
246 IFX_EXTERN IfxPort_Pin IfxPort_P25_3; /**< \brief IfxPort_P25_3 */
247 IFX_EXTERN IfxPort_Pin IfxPort_P25_4; /**< \brief IfxPort_P25_4 */
248 IFX_EXTERN IfxPort_Pin IfxPort_P25_5; /**< \brief IfxPort_P25_5 */
249 IFX_EXTERN IfxPort_Pin IfxPort_P25_6; /**< \brief IfxPort_P25_6 */
250 IFX_EXTERN IfxPort_Pin IfxPort_P25_7; /**< \brief IfxPort_P25_7 */
251 IFX_EXTERN IfxPort_Pin IfxPort_P25_8; /**< \brief IfxPort_P25_8 */
252 IFX_EXTERN IfxPort_Pin IfxPort_P25_9; /**< \brief IfxPort_P25_9 */
253 IFX_EXTERN IfxPort_Pin IfxPort_P26_0; /**< \brief IfxPort_P26_0 */
254 IFX_EXTERN IfxPort_Pin IfxPort_P30_0; /**< \brief IfxPort_P30_0 */
255 IFX_EXTERN IfxPort_Pin IfxPort_P30_1; /**< \brief IfxPort_P30_1 */
256 IFX_EXTERN IfxPort_Pin IfxPort_P30_10; /**< \brief IfxPort_P30_10 */
257 IFX_EXTERN IfxPort_Pin IfxPort_P30_11; /**< \brief IfxPort_P30_11 */
258 IFX_EXTERN IfxPort_Pin IfxPort_P30_12; /**< \brief IfxPort_P30_12 */
259 IFX_EXTERN IfxPort_Pin IfxPort_P30_13; /**< \brief IfxPort_P30_13 */
260 IFX_EXTERN IfxPort_Pin IfxPort_P30_14; /**< \brief IfxPort_P30_14 */
261 IFX_EXTERN IfxPort_Pin IfxPort_P30_15; /**< \brief IfxPort_P30_15 */
262 IFX_EXTERN IfxPort_Pin IfxPort_P30_2; /**< \brief IfxPort_P30_2 */
263 IFX_EXTERN IfxPort_Pin IfxPort_P30_3; /**< \brief IfxPort_P30_3 */
264 IFX_EXTERN IfxPort_Pin IfxPort_P30_4; /**< \brief IfxPort_P30_4 */
265 IFX_EXTERN IfxPort_Pin IfxPort_P30_5; /**< \brief IfxPort_P30_5 */
266 IFX_EXTERN IfxPort_Pin IfxPort_P30_6; /**< \brief IfxPort_P30_6 */
267 IFX_EXTERN IfxPort_Pin IfxPort_P30_7; /**< \brief IfxPort_P30_7 */
268 IFX_EXTERN IfxPort_Pin IfxPort_P30_8; /**< \brief IfxPort_P30_8 */
269 IFX_EXTERN IfxPort_Pin IfxPort_P30_9; /**< \brief IfxPort_P30_9 */
270 IFX_EXTERN IfxPort_Pin IfxPort_P31_0; /**< \brief IfxPort_P31_0 */
271 IFX_EXTERN IfxPort_Pin IfxPort_P31_1; /**< \brief IfxPort_P31_1 */
272 IFX_EXTERN IfxPort_Pin IfxPort_P31_10; /**< \brief IfxPort_P31_10 */
273 IFX_EXTERN IfxPort_Pin IfxPort_P31_11; /**< \brief IfxPort_P31_11 */
274 IFX_EXTERN IfxPort_Pin IfxPort_P31_12; /**< \brief IfxPort_P31_12 */
275 IFX_EXTERN IfxPort_Pin IfxPort_P31_13; /**< \brief IfxPort_P31_13 */
276 IFX_EXTERN IfxPort_Pin IfxPort_P31_14; /**< \brief IfxPort_P31_14 */
277 IFX_EXTERN IfxPort_Pin IfxPort_P31_15; /**< \brief IfxPort_P31_15 */
278 IFX_EXTERN IfxPort_Pin IfxPort_P31_2; /**< \brief IfxPort_P31_2 */
279 IFX_EXTERN IfxPort_Pin IfxPort_P31_3; /**< \brief IfxPort_P31_3 */
280 IFX_EXTERN IfxPort_Pin IfxPort_P31_4; /**< \brief IfxPort_P31_4 */
281 IFX_EXTERN IfxPort_Pin IfxPort_P31_5; /**< \brief IfxPort_P31_5 */
282 IFX_EXTERN IfxPort_Pin IfxPort_P31_6; /**< \brief IfxPort_P31_6 */
283 IFX_EXTERN IfxPort_Pin IfxPort_P31_7; /**< \brief IfxPort_P31_7 */
284 IFX_EXTERN IfxPort_Pin IfxPort_P31_8; /**< \brief IfxPort_P31_8 */
285 IFX_EXTERN IfxPort_Pin IfxPort_P31_9; /**< \brief IfxPort_P31_9 */
286 IFX_EXTERN IfxPort_Pin IfxPort_P32_0; /**< \brief IfxPort_P32_0 */
287 IFX_EXTERN IfxPort_Pin IfxPort_P32_1; /**< \brief IfxPort_P32_1 */
288 IFX_EXTERN IfxPort_Pin IfxPort_P32_2; /**< \brief IfxPort_P32_2 */
289 IFX_EXTERN IfxPort_Pin IfxPort_P32_3; /**< \brief IfxPort_P32_3 */
290 IFX_EXTERN IfxPort_Pin IfxPort_P32_4; /**< \brief IfxPort_P32_4 */
291 IFX_EXTERN IfxPort_Pin IfxPort_P32_5; /**< \brief IfxPort_P32_5 */
292 IFX_EXTERN IfxPort_Pin IfxPort_P32_6; /**< \brief IfxPort_P32_6 */
293 IFX_EXTERN IfxPort_Pin IfxPort_P32_7; /**< \brief IfxPort_P32_7 */
294 IFX_EXTERN IfxPort_Pin IfxPort_P33_0; /**< \brief IfxPort_P33_0 */
295 IFX_EXTERN IfxPort_Pin IfxPort_P33_1; /**< \brief IfxPort_P33_1 */
296 IFX_EXTERN IfxPort_Pin IfxPort_P33_10; /**< \brief IfxPort_P33_10 */
297 IFX_EXTERN IfxPort_Pin IfxPort_P33_11; /**< \brief IfxPort_P33_11 */
298 IFX_EXTERN IfxPort_Pin IfxPort_P33_12; /**< \brief IfxPort_P33_12 */
299 IFX_EXTERN IfxPort_Pin IfxPort_P33_13; /**< \brief IfxPort_P33_13 */
300 IFX_EXTERN IfxPort_Pin IfxPort_P33_14; /**< \brief IfxPort_P33_14 */
301 IFX_EXTERN IfxPort_Pin IfxPort_P33_15; /**< \brief IfxPort_P33_15 */
302 IFX_EXTERN IfxPort_Pin IfxPort_P33_2; /**< \brief IfxPort_P33_2 */
303 IFX_EXTERN IfxPort_Pin IfxPort_P33_3; /**< \brief IfxPort_P33_3 */
304 IFX_EXTERN IfxPort_Pin IfxPort_P33_4; /**< \brief IfxPort_P33_4 */
305 IFX_EXTERN IfxPort_Pin IfxPort_P33_5; /**< \brief IfxPort_P33_5 */
306 IFX_EXTERN IfxPort_Pin IfxPort_P33_6; /**< \brief IfxPort_P33_6 */
307 IFX_EXTERN IfxPort_Pin IfxPort_P33_7; /**< \brief IfxPort_P33_7 */
308 IFX_EXTERN IfxPort_Pin IfxPort_P33_8; /**< \brief IfxPort_P33_8 */
309 IFX_EXTERN IfxPort_Pin IfxPort_P33_9; /**< \brief IfxPort_P33_9 */
310 IFX_EXTERN IfxPort_Pin IfxPort_P34_1; /**< \brief IfxPort_P34_1 */
311 IFX_EXTERN IfxPort_Pin IfxPort_P34_2; /**< \brief IfxPort_P34_2 */
312 IFX_EXTERN IfxPort_Pin IfxPort_P34_3; /**< \brief IfxPort_P34_3 */
313 IFX_EXTERN IfxPort_Pin IfxPort_P34_4; /**< \brief IfxPort_P34_4 */
314 IFX_EXTERN IfxPort_Pin IfxPort_P34_5; /**< \brief IfxPort_P34_5 */
315 IFX_EXTERN IfxPort_Pin IfxPort_P40_0; /**< \brief IfxPort_P40_0 */
316 IFX_EXTERN IfxPort_Pin IfxPort_P40_1; /**< \brief IfxPort_P40_1 */
317 IFX_EXTERN IfxPort_Pin IfxPort_P40_10; /**< \brief IfxPort_P40_10 */
318 IFX_EXTERN IfxPort_Pin IfxPort_P40_11; /**< \brief IfxPort_P40_11 */
319 IFX_EXTERN IfxPort_Pin IfxPort_P40_12; /**< \brief IfxPort_P40_12 */
320 IFX_EXTERN IfxPort_Pin IfxPort_P40_13; /**< \brief IfxPort_P40_13 */
321 IFX_EXTERN IfxPort_Pin IfxPort_P40_14; /**< \brief IfxPort_P40_14 */
322 IFX_EXTERN IfxPort_Pin IfxPort_P40_15; /**< \brief IfxPort_P40_15 */
323 IFX_EXTERN IfxPort_Pin IfxPort_P40_2; /**< \brief IfxPort_P40_2 */
324 IFX_EXTERN IfxPort_Pin IfxPort_P40_3; /**< \brief IfxPort_P40_3 */
325 IFX_EXTERN IfxPort_Pin IfxPort_P40_4; /**< \brief IfxPort_P40_4 */
326 IFX_EXTERN IfxPort_Pin IfxPort_P40_5; /**< \brief IfxPort_P40_5 */
327 IFX_EXTERN IfxPort_Pin IfxPort_P40_6; /**< \brief IfxPort_P40_6 */
328 IFX_EXTERN IfxPort_Pin IfxPort_P40_7; /**< \brief IfxPort_P40_7 */
329 IFX_EXTERN IfxPort_Pin IfxPort_P40_8; /**< \brief IfxPort_P40_8 */
330 IFX_EXTERN IfxPort_Pin IfxPort_P40_9; /**< \brief IfxPort_P40_9 */
331 IFX_EXTERN IfxPort_Pin IfxPort_P41_0; /**< \brief IfxPort_P41_0 */
332 IFX_EXTERN IfxPort_Pin IfxPort_P41_1; /**< \brief IfxPort_P41_1 */
333 IFX_EXTERN IfxPort_Pin IfxPort_P41_2; /**< \brief IfxPort_P41_2 */
334 IFX_EXTERN IfxPort_Pin IfxPort_P41_3; /**< \brief IfxPort_P41_3 */
335 IFX_EXTERN IfxPort_Pin IfxPort_P41_4; /**< \brief IfxPort_P41_4 */
336 IFX_EXTERN IfxPort_Pin IfxPort_P41_5; /**< \brief IfxPort_P41_5 */
337 IFX_EXTERN IfxPort_Pin IfxPort_P41_6; /**< \brief IfxPort_P41_6 */
338 IFX_EXTERN IfxPort_Pin IfxPort_P41_7; /**< \brief IfxPort_P41_7 */
339 IFX_EXTERN IfxPort_Pin IfxPort_P41_8; /**< \brief IfxPort_P41_8 */
340
341 /** \brief Table dimensions */
342 #define IFXPORT_PINMAP_NUM_MODULES 42
343 #define IFXPORT_PINMAP_PIN_NUM_ITEMS 16
344
345
346 /** \brief IfxPort_Pin table */
347 IFX_EXTERN const IfxPort_Pin *IfxPort_Pin_pinTable[IFXPORT_PINMAP_NUM_MODULES][IFXPORT_PINMAP_PIN_NUM_ITEMS];
348
349 /** \} */
350
351 #endif /* IFXPORT_PINMAP_H */
IfxPort_P13_13
IFX_EXTERN IfxPort_Pin IfxPort_P13_13
IfxPort_P13_13.
Definition: IfxPort_PinMap.h:140
IfxPort_P10_13
IFX_EXTERN IfxPort_Pin IfxPort_P10_13
IfxPort_P10_13.
Definition: IfxPort_PinMap.h:106
IfxPort_P33_6
IFX_EXTERN IfxPort_Pin IfxPort_P33_6
IfxPort_P33_6.
Definition: IfxPort_PinMap.h:306
IfxPort_P41_7
IFX_EXTERN IfxPort_Pin IfxPort_P41_7
IfxPort_P41_7.
Definition: IfxPort_PinMap.h:338
IfxPort_P00_8
IFX_EXTERN IfxPort_Pin IfxPort_P00_8
IfxPort_P00_8.
Definition: IfxPort_PinMap.h:68
IfxPort_P30_15
IFX_EXTERN IfxPort_Pin IfxPort_P30_15
IfxPort_P30_15.
Definition: IfxPort_PinMap.h:261
IfxPort_P02_13
IFX_EXTERN IfxPort_Pin IfxPort_P02_13
IfxPort_P02_13.
Definition: IfxPort_PinMap.h:91
IfxPort_P02_15
IFX_EXTERN IfxPort_Pin IfxPort_P02_15
IfxPort_P02_15.
Definition: IfxPort_PinMap.h:93
IfxPort_P13_9
IFX_EXTERN IfxPort_Pin IfxPort_P13_9
IfxPort_P13_9.
Definition: IfxPort_PinMap.h:149
IfxPort_P14_1
IFX_EXTERN IfxPort_Pin IfxPort_P14_1
IfxPort_P14_1.
Definition: IfxPort_PinMap.h:151
IfxPort_P10_1
IFX_EXTERN IfxPort_Pin IfxPort_P10_1
IfxPort_P10_1.
Definition: IfxPort_PinMap.h:103
IfxPort_P30_10
IFX_EXTERN IfxPort_Pin IfxPort_P30_10
IfxPort_P30_10.
Definition: IfxPort_PinMap.h:256
IfxPort_P40_12
IFX_EXTERN IfxPort_Pin IfxPort_P40_12
IfxPort_P40_12.
Definition: IfxPort_PinMap.h:319
IfxPort_P25_9
IFX_EXTERN IfxPort_Pin IfxPort_P25_9
IfxPort_P25_9.
Definition: IfxPort_PinMap.h:252
IfxPort_P14_0
IFX_EXTERN IfxPort_Pin IfxPort_P14_0
IfxPort_P14_0.
Definition: IfxPort_PinMap.h:150
IfxPort_P14_4
IFX_EXTERN IfxPort_Pin IfxPort_P14_4
IfxPort_P14_4.
Definition: IfxPort_PinMap.h:160
IfxPort_P41_6
IFX_EXTERN IfxPort_Pin IfxPort_P41_6
IfxPort_P41_6.
Definition: IfxPort_PinMap.h:337
IfxPort_P01_7
IFX_EXTERN IfxPort_Pin IfxPort_P01_7
IfxPort_P01_7.
Definition: IfxPort_PinMap.h:83
IfxPort_P40_15
IFX_EXTERN IfxPort_Pin IfxPort_P40_15
IfxPort_P40_15.
Definition: IfxPort_PinMap.h:322
IfxPort_P10_4
IFX_EXTERN IfxPort_Pin IfxPort_P10_4
IfxPort_P10_4.
Definition: IfxPort_PinMap.h:111
IfxPort_P22_1
IFX_EXTERN IfxPort_Pin IfxPort_P22_1
IfxPort_P22_1.
Definition: IfxPort_PinMap.h:202
IfxPort_P00_5
IFX_EXTERN IfxPort_Pin IfxPort_P00_5
IfxPort_P00_5.
Definition: IfxPort_PinMap.h:65
IfxPort_P31_2
IFX_EXTERN IfxPort_Pin IfxPort_P31_2
IfxPort_P31_2.
Definition: IfxPort_PinMap.h:278
IfxPort_P10_10
IFX_EXTERN IfxPort_Pin IfxPort_P10_10
IfxPort_P10_10.
Definition: IfxPort_PinMap.h:104
IfxPort_P25_3
IFX_EXTERN IfxPort_Pin IfxPort_P25_3
IfxPort_P25_3.
Definition: IfxPort_PinMap.h:246
IfxPort_P30_6
IFX_EXTERN IfxPort_Pin IfxPort_P30_6
IfxPort_P30_6.
Definition: IfxPort_PinMap.h:266
IfxPort_P11_5
IFX_EXTERN IfxPort_Pin IfxPort_P11_5
IfxPort_P11_5.
Definition: IfxPort_PinMap.h:128
IfxPort_P10_6
IFX_EXTERN IfxPort_Pin IfxPort_P10_6
IfxPort_P10_6.
Definition: IfxPort_PinMap.h:113
IfxPort_P30_12
IFX_EXTERN IfxPort_Pin IfxPort_P30_12
IfxPort_P30_12.
Definition: IfxPort_PinMap.h:258
IfxPort_P14_13
IFX_EXTERN IfxPort_Pin IfxPort_P14_13
IfxPort_P14_13.
Definition: IfxPort_PinMap.h:155
IfxPort_P11_1
IFX_EXTERN IfxPort_Pin IfxPort_P11_1
IfxPort_P11_1.
Definition: IfxPort_PinMap.h:118
IfxPort_P02_4
IFX_EXTERN IfxPort_Pin IfxPort_P02_4
IfxPort_P02_4.
Definition: IfxPort_PinMap.h:96
IfxPort_P40_6
IFX_EXTERN IfxPort_Pin IfxPort_P40_6
IfxPort_P40_6.
Definition: IfxPort_PinMap.h:327
IfxPort_P31_11
IFX_EXTERN IfxPort_Pin IfxPort_P31_11
IfxPort_P31_11.
Definition: IfxPort_PinMap.h:273
IfxPort_P41_2
IFX_EXTERN IfxPort_Pin IfxPort_P41_2
IfxPort_P41_2.
Definition: IfxPort_PinMap.h:333
IfxPort_P33_5
IFX_EXTERN IfxPort_Pin IfxPort_P33_5
IfxPort_P33_5.
Definition: IfxPort_PinMap.h:305
IfxPort_P31_5
IFX_EXTERN IfxPort_Pin IfxPort_P31_5
IfxPort_P31_5.
Definition: IfxPort_PinMap.h:281
IfxPort_P31_13
IFX_EXTERN IfxPort_Pin IfxPort_P31_13
IfxPort_P31_13.
Definition: IfxPort_PinMap.h:275
IfxPort_P41_4
IFX_EXTERN IfxPort_Pin IfxPort_P41_4
IfxPort_P41_4.
Definition: IfxPort_PinMap.h:335
IfxPort_P15_2
IFX_EXTERN IfxPort_Pin IfxPort_P15_2
IfxPort_P15_2.
Definition: IfxPort_PinMap.h:174
IfxPort_P20_12
IFX_EXTERN IfxPort_Pin IfxPort_P20_12
IfxPort_P20_12.
Definition: IfxPort_PinMap.h:185
IfxPort_P33_11
IFX_EXTERN IfxPort_Pin IfxPort_P33_11
IfxPort_P33_11.
Definition: IfxPort_PinMap.h:297
IfxPort_P31_14
IFX_EXTERN IfxPort_Pin IfxPort_P31_14
IfxPort_P31_14.
Definition: IfxPort_PinMap.h:276
IfxPort_P13_7
IFX_EXTERN IfxPort_Pin IfxPort_P13_7
IfxPort_P13_7.
Definition: IfxPort_PinMap.h:148
IfxPort_P11_3
IFX_EXTERN IfxPort_Pin IfxPort_P11_3
IfxPort_P11_3.
Definition: IfxPort_PinMap.h:126
IfxPort_P14_2
IFX_EXTERN IfxPort_Pin IfxPort_P14_2
IfxPort_P14_2.
Definition: IfxPort_PinMap.h:158
IfxPort_P26_0
IFX_EXTERN IfxPort_Pin IfxPort_P26_0
IfxPort_P26_0.
Definition: IfxPort_PinMap.h:253
IfxPort_P32_6
IFX_EXTERN IfxPort_Pin IfxPort_P32_6
IfxPort_P32_6.
Definition: IfxPort_PinMap.h:292
IfxPort_P14_3
IFX_EXTERN IfxPort_Pin IfxPort_P14_3
IfxPort_P14_3.
Definition: IfxPort_PinMap.h:159
IfxPort_P13_0
IFX_EXTERN IfxPort_Pin IfxPort_P13_0
IfxPort_P13_0.
Definition: IfxPort_PinMap.h:135
IfxPort_P02_3
IFX_EXTERN IfxPort_Pin IfxPort_P02_3
IfxPort_P02_3.
Definition: IfxPort_PinMap.h:95
IfxPort_P24_7
IFX_EXTERN IfxPort_Pin IfxPort_P24_7
IfxPort_P24_7.
Definition: IfxPort_PinMap.h:234
IfxPort_P34_3
IFX_EXTERN IfxPort_Pin IfxPort_P34_3
IfxPort_P34_3.
Definition: IfxPort_PinMap.h:312
IfxPort_P02_14
IFX_EXTERN IfxPort_Pin IfxPort_P02_14
IfxPort_P02_14.
Definition: IfxPort_PinMap.h:92
IfxPort_P40_11
IFX_EXTERN IfxPort_Pin IfxPort_P40_11
IfxPort_P40_11.
Definition: IfxPort_PinMap.h:318
IfxPort_P31_4
IFX_EXTERN IfxPort_Pin IfxPort_P31_4
IfxPort_P31_4.
Definition: IfxPort_PinMap.h:280
IfxPort_P11_15
IFX_EXTERN IfxPort_Pin IfxPort_P11_15
IfxPort_P11_15.
Definition: IfxPort_PinMap.h:124
IfxPort_P31_8
IFX_EXTERN IfxPort_Pin IfxPort_P31_8
IfxPort_P31_8.
Definition: IfxPort_PinMap.h:284
IfxPort_P20_13
IFX_EXTERN IfxPort_Pin IfxPort_P20_13
IfxPort_P20_13.
Definition: IfxPort_PinMap.h:186
IfxPort_P00_15
IFX_EXTERN IfxPort_Pin IfxPort_P00_15
IfxPort_P00_15.
Definition: IfxPort_PinMap.h:61
IfxPort_P11_9
IFX_EXTERN IfxPort_Pin IfxPort_P11_9
IfxPort_P11_9.
Definition: IfxPort_PinMap.h:132
IfxPort_P11_4
IFX_EXTERN IfxPort_Pin IfxPort_P11_4
IfxPort_P11_4.
Definition: IfxPort_PinMap.h:127
IfxPort_P21_2
IFX_EXTERN IfxPort_Pin IfxPort_P21_2
IfxPort_P21_2.
Definition: IfxPort_PinMap.h:195
IfxPort_P02_10
IFX_EXTERN IfxPort_Pin IfxPort_P02_10
IfxPort_P02_10.
Definition: IfxPort_PinMap.h:88
IfxPort_P13_11
IFX_EXTERN IfxPort_Pin IfxPort_P13_11
IfxPort_P13_11.
Definition: IfxPort_PinMap.h:138
IfxPort_P11_11
IFX_EXTERN IfxPort_Pin IfxPort_P11_11
IfxPort_P11_11.
Definition: IfxPort_PinMap.h:120
IfxPort_P22_11
IFX_EXTERN IfxPort_Pin IfxPort_P22_11
IfxPort_P22_11.
Definition: IfxPort_PinMap.h:204
IfxPort_P31_1
IFX_EXTERN IfxPort_Pin IfxPort_P31_1
IfxPort_P31_1.
Definition: IfxPort_PinMap.h:271
IfxPort_P15_15
IFX_EXTERN IfxPort_Pin IfxPort_P15_15
IfxPort_P15_15.
Definition: IfxPort_PinMap.h:173
IfxPort_P25_5
IFX_EXTERN IfxPort_Pin IfxPort_P25_5
IfxPort_P25_5.
Definition: IfxPort_PinMap.h:248
IfxPort_P25_2
IFX_EXTERN IfxPort_Pin IfxPort_P25_2
IfxPort_P25_2.
Definition: IfxPort_PinMap.h:245
IfxPort_P02_6
IFX_EXTERN IfxPort_Pin IfxPort_P02_6
IfxPort_P02_6.
Definition: IfxPort_PinMap.h:98
IfxPort_P12_1
IFX_EXTERN IfxPort_Pin IfxPort_P12_1
IfxPort_P12_1.
Definition: IfxPort_PinMap.h:134
IfxPort_P01_6
IFX_EXTERN IfxPort_Pin IfxPort_P01_6
IfxPort_P01_6.
Definition: IfxPort_PinMap.h:82
IfxPort_P22_4
IFX_EXTERN IfxPort_Pin IfxPort_P22_4
IfxPort_P22_4.
Definition: IfxPort_PinMap.h:207
IfxPort_P00_13
IFX_EXTERN IfxPort_Pin IfxPort_P00_13
IfxPort_P00_13.
Definition: IfxPort_PinMap.h:59
IfxPort_P01_2
IFX_EXTERN IfxPort_Pin IfxPort_P01_2
IfxPort_P01_2.
Definition: IfxPort_PinMap.h:78
IfxPort_P00_2
IFX_EXTERN IfxPort_Pin IfxPort_P00_2
IfxPort_P00_2.
Definition: IfxPort_PinMap.h:62
IfxPort_P41_0
IFX_EXTERN IfxPort_Pin IfxPort_P41_0
IfxPort_P41_0.
Definition: IfxPort_PinMap.h:331
IfxPort_P33_13
IFX_EXTERN IfxPort_Pin IfxPort_P33_13
IfxPort_P33_13.
Definition: IfxPort_PinMap.h:299
IfxPort_P21_3
IFX_EXTERN IfxPort_Pin IfxPort_P21_3
IfxPort_P21_3.
Definition: IfxPort_PinMap.h:196
IfxPort_P00_7
IFX_EXTERN IfxPort_Pin IfxPort_P00_7
IfxPort_P00_7.
Definition: IfxPort_PinMap.h:67
IfxPort_P01_13
IFX_EXTERN IfxPort_Pin IfxPort_P01_13
IfxPort_P01_13.
Definition: IfxPort_PinMap.h:75
IfxPort_P01_8
IFX_EXTERN IfxPort_Pin IfxPort_P01_8
IfxPort_P01_8.
Definition: IfxPort_PinMap.h:84
IfxPort_P25_4
IFX_EXTERN IfxPort_Pin IfxPort_P25_4
IfxPort_P25_4.
Definition: IfxPort_PinMap.h:247
IfxPort_P20_3
IFX_EXTERN IfxPort_Pin IfxPort_P20_3
IfxPort_P20_3.
Definition: IfxPort_PinMap.h:188
IfxPort_P24_1
IFX_EXTERN IfxPort_Pin IfxPort_P24_1
IfxPort_P24_1.
Definition: IfxPort_PinMap.h:222
IfxPort_P24_12
IFX_EXTERN IfxPort_Pin IfxPort_P24_12
IfxPort_P24_12.
Definition: IfxPort_PinMap.h:225
IfxPort_P13_12
IFX_EXTERN IfxPort_Pin IfxPort_P13_12
IfxPort_P13_12.
Definition: IfxPort_PinMap.h:139
IfxPort_P24_6
IFX_EXTERN IfxPort_Pin IfxPort_P24_6
IfxPort_P24_6.
Definition: IfxPort_PinMap.h:233
IfxPort_P02_12
IFX_EXTERN IfxPort_Pin IfxPort_P02_12
IfxPort_P02_12.
Definition: IfxPort_PinMap.h:90
IfxPort_Pin_pinTable
IFX_EXTERN const IfxPort_Pin * IfxPort_Pin_pinTable[IFXPORT_PINMAP_NUM_MODULES][IFXPORT_PINMAP_PIN_NUM_ITEMS]
IfxPort_Pin table.
Definition: IfxPort_PinMap.h:347
IfxPort_P02_7
IFX_EXTERN IfxPort_Pin IfxPort_P02_7
IfxPort_P02_7.
Definition: IfxPort_PinMap.h:99
IfxPort_P32_3
IFX_EXTERN IfxPort_Pin IfxPort_P32_3
IfxPort_P32_3.
Definition: IfxPort_PinMap.h:289
IfxPort_P34_1
IFX_EXTERN IfxPort_Pin IfxPort_P34_1
IfxPort_P34_1.
Definition: IfxPort_PinMap.h:310
IfxPort_P14_12
IFX_EXTERN IfxPort_Pin IfxPort_P14_12
IfxPort_P14_12.
Definition: IfxPort_PinMap.h:154
IfxPort_P01_5
IFX_EXTERN IfxPort_Pin IfxPort_P01_5
IfxPort_P01_5.
Definition: IfxPort_PinMap.h:81
IfxPort_P01_11
IFX_EXTERN IfxPort_Pin IfxPort_P01_11
IfxPort_P01_11.
Definition: IfxPort_PinMap.h:73
IfxPort_P40_5
IFX_EXTERN IfxPort_Pin IfxPort_P40_5
IfxPort_P40_5.
Definition: IfxPort_PinMap.h:326
IfxPort_P11_10
IFX_EXTERN IfxPort_Pin IfxPort_P11_10
IfxPort_P11_10.
Definition: IfxPort_PinMap.h:119
IfxPort_P31_6
IFX_EXTERN IfxPort_Pin IfxPort_P31_6
IfxPort_P31_6.
Definition: IfxPort_PinMap.h:282
IfxPort_P33_3
IFX_EXTERN IfxPort_Pin IfxPort_P33_3
IfxPort_P33_3.
Definition: IfxPort_PinMap.h:303
IfxPort_P20_6
IFX_EXTERN IfxPort_Pin IfxPort_P20_6
IfxPort_P20_6.
Definition: IfxPort_PinMap.h:189
IfxPort_P24_8
IFX_EXTERN IfxPort_Pin IfxPort_P24_8
IfxPort_P24_8.
Definition: IfxPort_PinMap.h:235
IfxPort_P23_1
IFX_EXTERN IfxPort_Pin IfxPort_P23_1
IfxPort_P23_1.
Definition: IfxPort_PinMap.h:214
IfxPort_P22_0
IFX_EXTERN IfxPort_Pin IfxPort_P22_0
IfxPort_P22_0.
Definition: IfxPort_PinMap.h:201
IfxPort_P23_4
IFX_EXTERN IfxPort_Pin IfxPort_P23_4
IfxPort_P23_4.
Definition: IfxPort_PinMap.h:217
IfxPort_P30_9
IFX_EXTERN IfxPort_Pin IfxPort_P30_9
IfxPort_P30_9.
Definition: IfxPort_PinMap.h:269
IfxPort_P13_6
IFX_EXTERN IfxPort_Pin IfxPort_P13_6
IfxPort_P13_6.
Definition: IfxPort_PinMap.h:147
IfxPort_P22_3
IFX_EXTERN IfxPort_Pin IfxPort_P22_3
IfxPort_P22_3.
Definition: IfxPort_PinMap.h:206
IfxPort_P14_11
IFX_EXTERN IfxPort_Pin IfxPort_P14_11
IfxPort_P14_11.
Definition: IfxPort_PinMap.h:153
IfxPort_P11_12
IFX_EXTERN IfxPort_Pin IfxPort_P11_12
IfxPort_P11_12.
Definition: IfxPort_PinMap.h:121
IfxPort_P11_13
IFX_EXTERN IfxPort_Pin IfxPort_P11_13
IfxPort_P11_13.
Definition: IfxPort_PinMap.h:122
IfxPort_P33_1
IFX_EXTERN IfxPort_Pin IfxPort_P33_1
IfxPort_P33_1.
Definition: IfxPort_PinMap.h:295
IfxPort_P25_10
IFX_EXTERN IfxPort_Pin IfxPort_P25_10
IfxPort_P25_10.
Definition: IfxPort_PinMap.h:239
IfxPort_P33_2
IFX_EXTERN IfxPort_Pin IfxPort_P33_2
IfxPort_P33_2.
Definition: IfxPort_PinMap.h:302
IfxPort_P15_5
IFX_EXTERN IfxPort_Pin IfxPort_P15_5
IfxPort_P15_5.
Definition: IfxPort_PinMap.h:177
IfxPort_P15_8
IFX_EXTERN IfxPort_Pin IfxPort_P15_8
IfxPort_P15_8.
Definition: IfxPort_PinMap.h:180
IfxPort_P30_7
IFX_EXTERN IfxPort_Pin IfxPort_P30_7
IfxPort_P30_7.
Definition: IfxPort_PinMap.h:267
IfxPort_P33_7
IFX_EXTERN IfxPort_Pin IfxPort_P33_7
IfxPort_P33_7.
Definition: IfxPort_PinMap.h:307
IfxPort_P30_13
IFX_EXTERN IfxPort_Pin IfxPort_P30_13
IfxPort_P30_13.
Definition: IfxPort_PinMap.h:259
IfxPort_P41_8
IFX_EXTERN IfxPort_Pin IfxPort_P41_8
IfxPort_P41_8.
Definition: IfxPort_PinMap.h:339
IfxPort_P20_8
IFX_EXTERN IfxPort_Pin IfxPort_P20_8
IfxPort_P20_8.
Definition: IfxPort_PinMap.h:191
IfxPort_P40_13
IFX_EXTERN IfxPort_Pin IfxPort_P40_13
IfxPort_P40_13.
Definition: IfxPort_PinMap.h:320
IfxPort_P23_0
IFX_EXTERN IfxPort_Pin IfxPort_P23_0
IfxPort_P23_0.
Definition: IfxPort_PinMap.h:213
IfxPort_P15_11
IFX_EXTERN IfxPort_Pin IfxPort_P15_11
IfxPort_P15_11.
Definition: IfxPort_PinMap.h:169
IfxPort_P13_14
IFX_EXTERN IfxPort_Pin IfxPort_P13_14
IfxPort_P13_14.
Definition: IfxPort_PinMap.h:141
IfxPort_P20_7
IFX_EXTERN IfxPort_Pin IfxPort_P20_7
IfxPort_P20_7.
Definition: IfxPort_PinMap.h:190
IfxPort_P22_2
IFX_EXTERN IfxPort_Pin IfxPort_P22_2
IfxPort_P22_2.
Definition: IfxPort_PinMap.h:205
IfxPort_P30_8
IFX_EXTERN IfxPort_Pin IfxPort_P30_8
IfxPort_P30_8.
Definition: IfxPort_PinMap.h:268
IfxPort_P24_14
IFX_EXTERN IfxPort_Pin IfxPort_P24_14
IfxPort_P24_14.
Definition: IfxPort_PinMap.h:227
IfxPort_P24_0
IFX_EXTERN IfxPort_Pin IfxPort_P24_0
IfxPort_P24_0.
Definition: IfxPort_PinMap.h:221
IfxPort_P15_10
IFX_EXTERN IfxPort_Pin IfxPort_P15_10
IfxPort_P15_10.
Definition: IfxPort_PinMap.h:168
IfxPort_P41_3
IFX_EXTERN IfxPort_Pin IfxPort_P41_3
IfxPort_P41_3.
Definition: IfxPort_PinMap.h:334
IfxPort_P13_10
IFX_EXTERN IfxPort_Pin IfxPort_P13_10
IfxPort_P13_10.
Definition: IfxPort_PinMap.h:137
IfxPort_P33_8
IFX_EXTERN IfxPort_Pin IfxPort_P33_8
IfxPort_P33_8.
Definition: IfxPort_PinMap.h:308
IfxPort_P24_4
IFX_EXTERN IfxPort_Pin IfxPort_P24_4
IfxPort_P24_4.
Definition: IfxPort_PinMap.h:231
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxPort_P25_12
IFX_EXTERN IfxPort_Pin IfxPort_P25_12
IfxPort_P25_12.
Definition: IfxPort_PinMap.h:241
IfxPort_P33_12
IFX_EXTERN IfxPort_Pin IfxPort_P33_12
IfxPort_P33_12.
Definition: IfxPort_PinMap.h:298
IfxPort_P02_5
IFX_EXTERN IfxPort_Pin IfxPort_P02_5
IfxPort_P02_5.
Definition: IfxPort_PinMap.h:97
IfxPort_P00_0
IFX_EXTERN IfxPort_Pin IfxPort_P00_0
IfxPort_P00_0.
Definition: IfxPort_PinMap.h:54
IfxPort_P14_8
IFX_EXTERN IfxPort_Pin IfxPort_P14_8
IfxPort_P14_8.
Definition: IfxPort_PinMap.h:164
IfxPort_P30_3
IFX_EXTERN IfxPort_Pin IfxPort_P30_3
IfxPort_P30_3.
Definition: IfxPort_PinMap.h:263
IfxPort_P11_2
IFX_EXTERN IfxPort_Pin IfxPort_P11_2
IfxPort_P11_2.
Definition: IfxPort_PinMap.h:125
IfxPort_P32_4
IFX_EXTERN IfxPort_Pin IfxPort_P32_4
IfxPort_P32_4.
Definition: IfxPort_PinMap.h:290
IfxPort_P02_9
IFX_EXTERN IfxPort_Pin IfxPort_P02_9
IfxPort_P02_9.
Definition: IfxPort_PinMap.h:101
IfxPort_P15_14
IFX_EXTERN IfxPort_Pin IfxPort_P15_14
IfxPort_P15_14.
Definition: IfxPort_PinMap.h:172
IfxPort_P11_6
IFX_EXTERN IfxPort_Pin IfxPort_P11_6
IfxPort_P11_6.
Definition: IfxPort_PinMap.h:129
IfxPort_P25_13
IFX_EXTERN IfxPort_Pin IfxPort_P25_13
IfxPort_P25_13.
Definition: IfxPort_PinMap.h:242
IfxPort_P31_0
IFX_EXTERN IfxPort_Pin IfxPort_P31_0
IfxPort_P31_0.
Definition: IfxPort_PinMap.h:270
IfxPort_P02_8
IFX_EXTERN IfxPort_Pin IfxPort_P02_8
IfxPort_P02_8.
Definition: IfxPort_PinMap.h:100
IfxPort_P00_11
IFX_EXTERN IfxPort_Pin IfxPort_P00_11
IfxPort_P00_11.
Definition: IfxPort_PinMap.h:57
IfxPort_P30_11
IFX_EXTERN IfxPort_Pin IfxPort_P30_11
IfxPort_P30_11.
Definition: IfxPort_PinMap.h:257
IfxPort_P34_2
IFX_EXTERN IfxPort_Pin IfxPort_P34_2
IfxPort_P34_2.
Definition: IfxPort_PinMap.h:311
IfxPort_P22_10
IFX_EXTERN IfxPort_Pin IfxPort_P22_10
IfxPort_P22_10.
Definition: IfxPort_PinMap.h:203
IfxPort_P02_11
IFX_EXTERN IfxPort_Pin IfxPort_P02_11
IfxPort_P02_11.
Definition: IfxPort_PinMap.h:89
IfxPort_P01_1
IFX_EXTERN IfxPort_Pin IfxPort_P01_1
IfxPort_P01_1.
Definition: IfxPort_PinMap.h:71
IfxPort_P13_3
IFX_EXTERN IfxPort_Pin IfxPort_P13_3
IfxPort_P13_3.
Definition: IfxPort_PinMap.h:144
IfxPort_P23_5
IFX_EXTERN IfxPort_Pin IfxPort_P23_5
IfxPort_P23_5.
Definition: IfxPort_PinMap.h:218
IfxPort_P22_8
IFX_EXTERN IfxPort_Pin IfxPort_P22_8
IfxPort_P22_8.
Definition: IfxPort_PinMap.h:211
IfxPort_P32_1
IFX_EXTERN IfxPort_Pin IfxPort_P32_1
IfxPort_P32_1.
Definition: IfxPort_PinMap.h:287
IfxPort_P40_14
IFX_EXTERN IfxPort_Pin IfxPort_P40_14
IfxPort_P40_14.
Definition: IfxPort_PinMap.h:321
IfxPort_P10_3
IFX_EXTERN IfxPort_Pin IfxPort_P10_3
IfxPort_P10_3.
Definition: IfxPort_PinMap.h:110
IFXPORT_PINMAP_PIN_NUM_ITEMS
#define IFXPORT_PINMAP_PIN_NUM_ITEMS
Definition: IfxPort_PinMap.h:343
IfxPort_P13_4
IFX_EXTERN IfxPort_Pin IfxPort_P13_4
IfxPort_P13_4.
Definition: IfxPort_PinMap.h:145
IfxPort_P40_0
IFX_EXTERN IfxPort_Pin IfxPort_P40_0
IfxPort_P40_0.
Definition: IfxPort_PinMap.h:315
IfxPort_P00_10
IFX_EXTERN IfxPort_Pin IfxPort_P00_10
IfxPort_P00_10.
Definition: IfxPort_PinMap.h:56
IfxPort_P25_8
IFX_EXTERN IfxPort_Pin IfxPort_P25_8
IfxPort_P25_8.
Definition: IfxPort_PinMap.h:251
IfxPort_P24_15
IFX_EXTERN IfxPort_Pin IfxPort_P24_15
IfxPort_P24_15.
Definition: IfxPort_PinMap.h:228
IfxPort_P22_7
IFX_EXTERN IfxPort_Pin IfxPort_P22_7
IfxPort_P22_7.
Definition: IfxPort_PinMap.h:210
IfxPort_P10_5
IFX_EXTERN IfxPort_Pin IfxPort_P10_5
IfxPort_P10_5.
Definition: IfxPort_PinMap.h:112
IfxPort_P10_7
IFX_EXTERN IfxPort_Pin IfxPort_P10_7
IfxPort_P10_7.
Definition: IfxPort_PinMap.h:114
IfxPort_P25_0
IFX_EXTERN IfxPort_Pin IfxPort_P25_0
IfxPort_P25_0.
Definition: IfxPort_PinMap.h:237
IfxPort_P10_9
IFX_EXTERN IfxPort_Pin IfxPort_P10_9
IfxPort_P10_9.
Definition: IfxPort_PinMap.h:116
IfxPort_P01_3
IFX_EXTERN IfxPort_Pin IfxPort_P01_3
IfxPort_P01_3.
Definition: IfxPort_PinMap.h:79
IfxPort_P11_0
IFX_EXTERN IfxPort_Pin IfxPort_P11_0
IfxPort_P11_0.
Definition: IfxPort_PinMap.h:117
IfxPort_P31_7
IFX_EXTERN IfxPort_Pin IfxPort_P31_7
IfxPort_P31_7.
Definition: IfxPort_PinMap.h:283
IfxPort_P21_5
IFX_EXTERN IfxPort_Pin IfxPort_P21_5
IfxPort_P21_5.
Definition: IfxPort_PinMap.h:198
IfxPort_P25_14
IFX_EXTERN IfxPort_Pin IfxPort_P25_14
IfxPort_P25_14.
Definition: IfxPort_PinMap.h:243
IfxPort_P25_11
IFX_EXTERN IfxPort_Pin IfxPort_P25_11
IfxPort_P25_11.
Definition: IfxPort_PinMap.h:240
IfxPort_P23_7
IFX_EXTERN IfxPort_Pin IfxPort_P23_7
IfxPort_P23_7.
Definition: IfxPort_PinMap.h:220
IfxPort_P30_1
IFX_EXTERN IfxPort_Pin IfxPort_P30_1
IfxPort_P30_1.
Definition: IfxPort_PinMap.h:255
IfxPort_P15_1
IFX_EXTERN IfxPort_Pin IfxPort_P15_1
IfxPort_P15_1.
Definition: IfxPort_PinMap.h:167
IfxPort_P11_7
IFX_EXTERN IfxPort_Pin IfxPort_P11_7
IfxPort_P11_7.
Definition: IfxPort_PinMap.h:130
IfxPort_P20_11
IFX_EXTERN IfxPort_Pin IfxPort_P20_11
IfxPort_P20_11.
Definition: IfxPort_PinMap.h:184
IfxPort_P40_10
IFX_EXTERN IfxPort_Pin IfxPort_P40_10
IfxPort_P40_10.
Definition: IfxPort_PinMap.h:317
IfxPort_P34_5
IFX_EXTERN IfxPort_Pin IfxPort_P34_5
IfxPort_P34_5.
Definition: IfxPort_PinMap.h:314
IfxPort_P14_15
IFX_EXTERN IfxPort_Pin IfxPort_P14_15
IfxPort_P14_15.
Definition: IfxPort_PinMap.h:157
IfxPort_P33_10
IFX_EXTERN IfxPort_Pin IfxPort_P33_10
IfxPort_P33_10.
Definition: IfxPort_PinMap.h:296
IfxPort_P40_8
IFX_EXTERN IfxPort_Pin IfxPort_P40_8
IfxPort_P40_8.
Definition: IfxPort_PinMap.h:329
IfxPort_P01_14
IFX_EXTERN IfxPort_Pin IfxPort_P01_14
IfxPort_P01_14.
Definition: IfxPort_PinMap.h:76
IfxPort_P21_6
IFX_EXTERN IfxPort_Pin IfxPort_P21_6
IfxPort_P21_6.
Definition: IfxPort_PinMap.h:199
IfxPort_P02_0
IFX_EXTERN IfxPort_Pin IfxPort_P02_0
IfxPort_P02_0.
Definition: IfxPort_PinMap.h:86
IfxPort_P33_14
IFX_EXTERN IfxPort_Pin IfxPort_P33_14
IfxPort_P33_14.
Definition: IfxPort_PinMap.h:300
IfxPort_P25_7
IFX_EXTERN IfxPort_Pin IfxPort_P25_7
IfxPort_P25_7.
Definition: IfxPort_PinMap.h:250
IfxPort_P14_7
IFX_EXTERN IfxPort_Pin IfxPort_P14_7
IfxPort_P14_7.
Definition: IfxPort_PinMap.h:163
IfxPort_P15_12
IFX_EXTERN IfxPort_Pin IfxPort_P15_12
IfxPort_P15_12.
Definition: IfxPort_PinMap.h:170
IfxPort_P01_12
IFX_EXTERN IfxPort_Pin IfxPort_P01_12
IfxPort_P01_12.
Definition: IfxPort_PinMap.h:74
IfxPort_P00_1
IFX_EXTERN IfxPort_Pin IfxPort_P00_1
IfxPort_P00_1.
Definition: IfxPort_PinMap.h:55
IfxPort_P00_14
IFX_EXTERN IfxPort_Pin IfxPort_P00_14
IfxPort_P00_14.
Definition: IfxPort_PinMap.h:60
IfxPort_P20_10
IFX_EXTERN IfxPort_Pin IfxPort_P20_10
IfxPort_P20_10.
Definition: IfxPort_PinMap.h:183
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:246
IfxPort_P31_15
IFX_EXTERN IfxPort_Pin IfxPort_P31_15
IfxPort_P31_15.
Definition: IfxPort_PinMap.h:277
IfxPort_P32_5
IFX_EXTERN IfxPort_Pin IfxPort_P32_5
IfxPort_P32_5.
Definition: IfxPort_PinMap.h:291
IfxPort_P34_4
IFX_EXTERN IfxPort_Pin IfxPort_P34_4
IfxPort_P34_4.
Definition: IfxPort_PinMap.h:313
IfxPort_P41_1
IFX_EXTERN IfxPort_Pin IfxPort_P41_1
IfxPort_P41_1.
Definition: IfxPort_PinMap.h:332
IfxPort_P23_3
IFX_EXTERN IfxPort_Pin IfxPort_P23_3
IfxPort_P23_3.
Definition: IfxPort_PinMap.h:216
IfxPort_P02_2
IFX_EXTERN IfxPort_Pin IfxPort_P02_2
IfxPort_P02_2.
Definition: IfxPort_PinMap.h:94
IfxPort_P20_14
IFX_EXTERN IfxPort_Pin IfxPort_P20_14
IfxPort_P20_14.
Definition: IfxPort_PinMap.h:187
IfxPort_P33_0
IFX_EXTERN IfxPort_Pin IfxPort_P33_0
IfxPort_P33_0.
Definition: IfxPort_PinMap.h:294
IfxPort_P25_1
IFX_EXTERN IfxPort_Pin IfxPort_P25_1
IfxPort_P25_1.
Definition: IfxPort_PinMap.h:238
IfxPort_P30_5
IFX_EXTERN IfxPort_Pin IfxPort_P30_5
IfxPort_P30_5.
Definition: IfxPort_PinMap.h:265
IfxPort_P01_9
IFX_EXTERN IfxPort_Pin IfxPort_P01_9
IfxPort_P01_9.
Definition: IfxPort_PinMap.h:85
IfxPort_P02_1
IFX_EXTERN IfxPort_Pin IfxPort_P02_1
IfxPort_P02_1.
Definition: IfxPort_PinMap.h:87
IfxPort_P01_4
IFX_EXTERN IfxPort_Pin IfxPort_P01_4
IfxPort_P01_4.
Definition: IfxPort_PinMap.h:80
IfxPort_P20_9
IFX_EXTERN IfxPort_Pin IfxPort_P20_9
IfxPort_P20_9.
Definition: IfxPort_PinMap.h:192
IfxPort_P11_8
IFX_EXTERN IfxPort_Pin IfxPort_P11_8
IfxPort_P11_8.
Definition: IfxPort_PinMap.h:131
IfxPort_P13_15
IFX_EXTERN IfxPort_Pin IfxPort_P13_15
IfxPort_P13_15.
Definition: IfxPort_PinMap.h:142
IfxPort_P13_1
IFX_EXTERN IfxPort_Pin IfxPort_P13_1
IfxPort_P13_1.
Definition: IfxPort_PinMap.h:136
IfxPort_P11_14
IFX_EXTERN IfxPort_Pin IfxPort_P11_14
IfxPort_P11_14.
Definition: IfxPort_PinMap.h:123
IfxPort_P10_8
IFX_EXTERN IfxPort_Pin IfxPort_P10_8
IfxPort_P10_8.
Definition: IfxPort_PinMap.h:115
IfxPort_P12_0
IFX_EXTERN IfxPort_Pin IfxPort_P12_0
IfxPort_P12_0.
Definition: IfxPort_PinMap.h:133
IfxPort_P33_9
IFX_EXTERN IfxPort_Pin IfxPort_P33_9
IfxPort_P33_9.
Definition: IfxPort_PinMap.h:309
IfxPort_P24_5
IFX_EXTERN IfxPort_Pin IfxPort_P24_5
IfxPort_P24_5.
Definition: IfxPort_PinMap.h:232
IfxPort_P40_7
IFX_EXTERN IfxPort_Pin IfxPort_P40_7
IfxPort_P40_7.
Definition: IfxPort_PinMap.h:328
IfxPort_P14_6
IFX_EXTERN IfxPort_Pin IfxPort_P14_6
IfxPort_P14_6.
Definition: IfxPort_PinMap.h:162
IfxPort_P14_14
IFX_EXTERN IfxPort_Pin IfxPort_P14_14
IfxPort_P14_14.
Definition: IfxPort_PinMap.h:156
IfxPort_P10_11
IFX_EXTERN IfxPort_Pin IfxPort_P10_11
IfxPort_P10_11.
Definition: IfxPort_PinMap.h:105
IfxPort_P24_9
IFX_EXTERN IfxPort_Pin IfxPort_P24_9
IfxPort_P24_9.
Definition: IfxPort_PinMap.h:236
IfxPort_P14_5
IFX_EXTERN IfxPort_Pin IfxPort_P14_5
IfxPort_P14_5.
Definition: IfxPort_PinMap.h:161
IfxPort_P15_0
IFX_EXTERN IfxPort_Pin IfxPort_P15_0
IfxPort_P15_0.
Definition: IfxPort_PinMap.h:166
IfxPort_P15_4
IFX_EXTERN IfxPort_Pin IfxPort_P15_4
IfxPort_P15_4.
Definition: IfxPort_PinMap.h:176
IfxPort_P24_11
IFX_EXTERN IfxPort_Pin IfxPort_P24_11
IfxPort_P24_11.
Definition: IfxPort_PinMap.h:224
IfxPort_P40_2
IFX_EXTERN IfxPort_Pin IfxPort_P40_2
IfxPort_P40_2.
Definition: IfxPort_PinMap.h:323
IfxPort_P24_13
IFX_EXTERN IfxPort_Pin IfxPort_P24_13
IfxPort_P24_13.
Definition: IfxPort_PinMap.h:226
IfxPort_P33_4
IFX_EXTERN IfxPort_Pin IfxPort_P33_4
IfxPort_P33_4.
Definition: IfxPort_PinMap.h:304
IfxPort_P13_2
IFX_EXTERN IfxPort_Pin IfxPort_P13_2
IfxPort_P13_2.
Definition: IfxPort_PinMap.h:143
IfxPort_P24_2
IFX_EXTERN IfxPort_Pin IfxPort_P24_2
IfxPort_P24_2.
Definition: IfxPort_PinMap.h:229
IfxPort_P40_3
IFX_EXTERN IfxPort_Pin IfxPort_P40_3
IfxPort_P40_3.
Definition: IfxPort_PinMap.h:324
IfxPort_P22_5
IFX_EXTERN IfxPort_Pin IfxPort_P22_5
IfxPort_P22_5.
Definition: IfxPort_PinMap.h:208
IfxPort_P31_9
IFX_EXTERN IfxPort_Pin IfxPort_P31_9
IfxPort_P31_9.
Definition: IfxPort_PinMap.h:285
IfxPort_P00_9
IFX_EXTERN IfxPort_Pin IfxPort_P00_9
IfxPort_P00_9.
Definition: IfxPort_PinMap.h:69
IfxPort_P00_3
IFX_EXTERN IfxPort_Pin IfxPort_P00_3
IfxPort_P00_3.
Definition: IfxPort_PinMap.h:63
IfxPort_P14_9
IFX_EXTERN IfxPort_Pin IfxPort_P14_9
IfxPort_P14_9.
Definition: IfxPort_PinMap.h:165
IfxPort_P22_6
IFX_EXTERN IfxPort_Pin IfxPort_P22_6
IfxPort_P22_6.
Definition: IfxPort_PinMap.h:209
IfxPort_P25_15
IFX_EXTERN IfxPort_Pin IfxPort_P25_15
IfxPort_P25_15.
Definition: IfxPort_PinMap.h:244
IfxPort_P14_10
IFX_EXTERN IfxPort_Pin IfxPort_P14_10
IfxPort_P14_10.
Definition: IfxPort_PinMap.h:152
IfxPort_P00_4
IFX_EXTERN IfxPort_Pin IfxPort_P00_4
IfxPort_P00_4.
Definition: IfxPort_PinMap.h:64
IfxPort_P23_6
IFX_EXTERN IfxPort_Pin IfxPort_P23_6
IfxPort_P23_6.
Definition: IfxPort_PinMap.h:219
IfxPort_P30_2
IFX_EXTERN IfxPort_Pin IfxPort_P30_2
IfxPort_P30_2.
Definition: IfxPort_PinMap.h:262
IfxPort_P41_5
IFX_EXTERN IfxPort_Pin IfxPort_P41_5
IfxPort_P41_5.
Definition: IfxPort_PinMap.h:336
IfxPort_P00_12
IFX_EXTERN IfxPort_Pin IfxPort_P00_12
IfxPort_P00_12.
Definition: IfxPort_PinMap.h:58
IfxPort_P20_1
IFX_EXTERN IfxPort_Pin IfxPort_P20_1
IfxPort_P20_1.
Definition: IfxPort_PinMap.h:182
IfxPort_P10_0
IFX_EXTERN IfxPort_Pin IfxPort_P10_0
IfxPort_P10_0.
Definition: IfxPort_PinMap.h:102
IfxPort_P21_1
IFX_EXTERN IfxPort_Pin IfxPort_P21_1
IfxPort_P21_1.
Definition: IfxPort_PinMap.h:194
IfxPort_P01_10
IFX_EXTERN IfxPort_Pin IfxPort_P01_10
IfxPort_P01_10.
Definition: IfxPort_PinMap.h:72
IfxPort_P15_6
IFX_EXTERN IfxPort_Pin IfxPort_P15_6
IfxPort_P15_6.
Definition: IfxPort_PinMap.h:178
IfxPort_P25_6
IFX_EXTERN IfxPort_Pin IfxPort_P25_6
IfxPort_P25_6.
Definition: IfxPort_PinMap.h:249
IfxPort_P40_9
IFX_EXTERN IfxPort_Pin IfxPort_P40_9
IfxPort_P40_9.
Definition: IfxPort_PinMap.h:330
IfxPort_P23_2
IFX_EXTERN IfxPort_Pin IfxPort_P23_2
IfxPort_P23_2.
Definition: IfxPort_PinMap.h:215
IfxPort_P21_7
IFX_EXTERN IfxPort_Pin IfxPort_P21_7
IfxPort_P21_7.
Definition: IfxPort_PinMap.h:200
IfxPort_P13_5
IFX_EXTERN IfxPort_Pin IfxPort_P13_5
IfxPort_P13_5.
Definition: IfxPort_PinMap.h:146
IfxPort_P32_7
IFX_EXTERN IfxPort_Pin IfxPort_P32_7
IfxPort_P32_7.
Definition: IfxPort_PinMap.h:293
IfxPort_P31_3
IFX_EXTERN IfxPort_Pin IfxPort_P31_3
IfxPort_P31_3.
Definition: IfxPort_PinMap.h:279
IfxPort_P15_3
IFX_EXTERN IfxPort_Pin IfxPort_P15_3
IfxPort_P15_3.
Definition: IfxPort_PinMap.h:175
IfxPort_P40_1
IFX_EXTERN IfxPort_Pin IfxPort_P40_1
IfxPort_P40_1.
Definition: IfxPort_PinMap.h:316
IfxPort_P31_12
IFX_EXTERN IfxPort_Pin IfxPort_P31_12
IfxPort_P31_12.
Definition: IfxPort_PinMap.h:274
IfxPort_P30_0
IFX_EXTERN IfxPort_Pin IfxPort_P30_0
IfxPort_P30_0.
Definition: IfxPort_PinMap.h:254
IfxPort_P31_10
IFX_EXTERN IfxPort_Pin IfxPort_P31_10
IfxPort_P31_10.
Definition: IfxPort_PinMap.h:272
IfxPort_P20_0
IFX_EXTERN IfxPort_Pin IfxPort_P20_0
IfxPort_P20_0.
Definition: IfxPort_PinMap.h:181
IfxPort_P00_6
IFX_EXTERN IfxPort_Pin IfxPort_P00_6
IfxPort_P00_6.
Definition: IfxPort_PinMap.h:66
IfxPort_P21_0
IFX_EXTERN IfxPort_Pin IfxPort_P21_0
IfxPort_P21_0.
Definition: IfxPort_PinMap.h:193
IfxPort_P10_15
IFX_EXTERN IfxPort_Pin IfxPort_P10_15
IfxPort_P10_15.
Definition: IfxPort_PinMap.h:108
IfxPort_P21_4
IFX_EXTERN IfxPort_Pin IfxPort_P21_4
IfxPort_P21_4.
Definition: IfxPort_PinMap.h:197
IfxPort_P30_14
IFX_EXTERN IfxPort_Pin IfxPort_P30_14
IfxPort_P30_14.
Definition: IfxPort_PinMap.h:260
IfxPort_P01_0
IFX_EXTERN IfxPort_Pin IfxPort_P01_0
IfxPort_P01_0.
Definition: IfxPort_PinMap.h:70
IfxPort_P40_4
IFX_EXTERN IfxPort_Pin IfxPort_P40_4
IfxPort_P40_4.
Definition: IfxPort_PinMap.h:325
IfxPort_P33_15
IFX_EXTERN IfxPort_Pin IfxPort_P33_15
IfxPort_P33_15.
Definition: IfxPort_PinMap.h:301
IfxPort_P10_14
IFX_EXTERN IfxPort_Pin IfxPort_P10_14
IfxPort_P10_14.
Definition: IfxPort_PinMap.h:107
IfxPort_P30_4
IFX_EXTERN IfxPort_Pin IfxPort_P30_4
IfxPort_P30_4.
Definition: IfxPort_PinMap.h:264
IfxPort_P24_10
IFX_EXTERN IfxPort_Pin IfxPort_P24_10
IfxPort_P24_10.
Definition: IfxPort_PinMap.h:223
IfxPort_P10_2
IFX_EXTERN IfxPort_Pin IfxPort_P10_2
IfxPort_P10_2.
Definition: IfxPort_PinMap.h:109
IfxPort_P15_13
IFX_EXTERN IfxPort_Pin IfxPort_P15_13
IfxPort_P15_13.
Definition: IfxPort_PinMap.h:171
IfxPort_P32_2
IFX_EXTERN IfxPort_Pin IfxPort_P32_2
IfxPort_P32_2.
Definition: IfxPort_PinMap.h:288
IfxPort_P22_9
IFX_EXTERN IfxPort_Pin IfxPort_P22_9
IfxPort_P22_9.
Definition: IfxPort_PinMap.h:212
IfxPort_P15_7
IFX_EXTERN IfxPort_Pin IfxPort_P15_7
IfxPort_P15_7.
Definition: IfxPort_PinMap.h:179
IfxPort_P32_0
IFX_EXTERN IfxPort_Pin IfxPort_P32_0
IfxPort_P32_0.
Definition: IfxPort_PinMap.h:286
IfxPort_P24_3
IFX_EXTERN IfxPort_Pin IfxPort_P24_3
IfxPort_P24_3.
Definition: IfxPort_PinMap.h:230
IFXPORT_PINMAP_NUM_MODULES
#define IFXPORT_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxPort_PinMap.h:342
IfxPort.h
PORT basic functionality.
IfxPort_P01_15
IFX_EXTERN IfxPort_Pin IfxPort_P01_15
IfxPort_P01_15.
Definition: IfxPort_PinMap.h:77


iLLD_TC38A: IfxPort_cfg.c Source File

  • _Impl
IfxPort_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxPort_cfg.c
3 * \brief PORT on-chip implementation data
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 *
41 */
42
43 /******************************************************************************/
44 /*----------------------------------Includes----------------------------------*/
45 /******************************************************************************/
46
47 #include "IfxPort_cfg.h"
48
49 /******************************************************************************/
50 /*-----------------------Exported Variables/Constants-------------------------*/
51 /******************************************************************************/
52
53 IFX_CONST IfxPort_Esr_Masks IfxPort_cfg_esrMasks[IFXPORT_NUM_MODULES] = {
54 {&MODULE_P00, 0x0000FFFFUL}, // Port 00
55 {&MODULE_P01, 0x0000FFFFUL}, // Port 01
56 {&MODULE_P02, 0x0000FFFFUL}, // Port 02
57 {&MODULE_P10, 0x0000FFFFUL}, // Port 10
58 {&MODULE_P11, 0x0000FFFFUL}, // Port 11
59 {&MODULE_P12, 0x0000FFFFUL}, // Port 12
60 {&MODULE_P13, 0x0000FFFFUL}, // Port 13
61 {&MODULE_P14, 0x0000FFFFUL}, // Port 14
62 {&MODULE_P15, 0x0000FFFFUL}, // Port 15
63 {&MODULE_P20, 0x0000FFFFUL}, // Port 20
64 {&MODULE_P21, 0x0000FFFFUL}, // Port 21
65 {&MODULE_P22, 0x0000FFFFUL}, // Port 22
66 {&MODULE_P23, 0x0000FFFFUL}, // Port 23
67 {&MODULE_P24, 0x0000FFFFUL}, // Port 24
68 {&MODULE_P25, 0x0000FFFFUL}, // Port 25
69 {&MODULE_P26, 0x0000FFFFUL}, // Port 26
70 {&MODULE_P30, 0x0000FFFFUL}, // Port 30
71 {&MODULE_P31, 0x0000FFFFUL}, // Port 31
72 {&MODULE_P32, 0x0000FFFFUL}, // Port 32
73 {&MODULE_P33, 0x0000FFFFUL}, // Port 33
74 {&MODULE_P34, 0x0000FFFFUL}, // Port 34
75 {&MODULE_P40, 0x0000FFFFUL}, // Port 40
76 {&MODULE_P41, 0x0000FFFFUL}, // Port 41
77 };
78
79 IFX_CONST IfxModule_IndexMap IfxPort_cfg_indexMap[IFXPORT_NUM_MODULES] = {
80 {&MODULE_P00, IfxPort_Index_00}, // Port 00
81 {&MODULE_P01, IfxPort_Index_01}, // Port 01
82 {&MODULE_P02, IfxPort_Index_02}, // Port 02
83 {&MODULE_P10, IfxPort_Index_10}, // Port 10
84 {&MODULE_P11, IfxPort_Index_11}, // Port 11
85 {&MODULE_P12, IfxPort_Index_12}, // Port 12
86 {&MODULE_P13, IfxPort_Index_13}, // Port 13
87 {&MODULE_P14, IfxPort_Index_14}, // Port 14
88 {&MODULE_P15, IfxPort_Index_15}, // Port 15
89 {&MODULE_P20, IfxPort_Index_20}, // Port 20
90 {&MODULE_P21, IfxPort_Index_21}, // Port 21
91 {&MODULE_P22, IfxPort_Index_22}, // Port 22
92 {&MODULE_P23, IfxPort_Index_23}, // Port 23
93 {&MODULE_P24, IfxPort_Index_24}, // Port 24
94 {&MODULE_P25, IfxPort_Index_25}, // Port 25
95 {&MODULE_P26, IfxPort_Index_26}, // Port 26
96 {&MODULE_P30, IfxPort_Index_30}, // Port 30
97 {&MODULE_P31, IfxPort_Index_31}, // Port 31
98 {&MODULE_P32, IfxPort_Index_32}, // Port 32
99 {&MODULE_P33, IfxPort_Index_33}, // Port 33
100 {&MODULE_P34, IfxPort_Index_34}, // Port 34
101 {&MODULE_P40, IfxPort_Index_40}, // Port 40
102 {&MODULE_P41, IfxPort_Index_41} // Port 41
103 };
IfxPort_Esr_Masks
used by IfxPort_Esr_Masks table
Definition: IfxPort_cfg.h:110
IfxPort_Index_31
PORT 31.
Definition: IfxPort_cfg.h:95
IfxPort_Index_13
PORT 13.
Definition: IfxPort_cfg.h:84
IfxPort_Index_10
PORT 10.
Definition: IfxPort_cfg.h:81
IFXPORT_NUM_MODULES
#define IFXPORT_NUM_MODULES
Port count.
Definition: IfxPort_cfg.h:66
IfxPort_Index_00
PORT 00.
Definition: IfxPort_cfg.h:78
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxPort_Index_01
PORT 01.
Definition: IfxPort_cfg.h:79
IfxPort_Index_24
PORT 24.
Definition: IfxPort_cfg.h:91
IfxPort_Index_23
PORT 23.
Definition: IfxPort_cfg.h:90
IfxPort_Index_33
PORT 33.
Definition: IfxPort_cfg.h:97
IfxPort_Index_21
PORT 21.
Definition: IfxPort_cfg.h:88
IfxPort_Index_15
PORT 15.
Definition: IfxPort_cfg.h:86
IfxPort_Index_14
PORT 14.
Definition: IfxPort_cfg.h:85
IfxPort_Index_12
PORT 12.
Definition: IfxPort_cfg.h:83
IfxPort_Index_41
PORT 41.
Definition: IfxPort_cfg.h:100
IfxPort_Index_20
PORT 20.
Definition: IfxPort_cfg.h:87
IfxPort_Index_25
PORT 25.
Definition: IfxPort_cfg.h:92
IfxPort_Index_32
PORT 32.
Definition: IfxPort_cfg.h:96
IfxPort_Index_22
PORT 22.
Definition: IfxPort_cfg.h:89
IfxPort_cfg.h
PORT on-chip implementation data.
IfxPort_Index_02
PORT 02.
Definition: IfxPort_cfg.h:80
IfxPort_Index_30
PORT 30.
Definition: IfxPort_cfg.h:94
IfxPort_cfg_esrMasks
IFX_CONST IfxPort_Esr_Masks IfxPort_cfg_esrMasks[IFXPORT_NUM_MODULES]
Definition: IfxPort_cfg.c:53
IfxPort_Index_34
PORT 34.
Definition: IfxPort_cfg.h:98
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:140
IfxPort_Index_40
PORT 40.
Definition: IfxPort_cfg.h:99
IfxPort_Index_11
PORT 11.
Definition: IfxPort_cfg.h:82
IfxPort_Index_26
PORT 26.
Definition: IfxPort_cfg.h:93
IfxPort_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxPort_cfg_indexMap[IFXPORT_NUM_MODULES]
Definition: IfxPort_cfg.c:79


iLLD_TC38A: IfxPort_cfg.h Source File

  • _Impl
IfxPort_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxPort_cfg.h
3 * \brief PORT on-chip implementation data
4 * \ingroup IfxLld_Port
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 * \defgroup IfxLld_Port PORTS
43 * \ingroup IfxLld
44 * \defgroup IfxLld_Port_Impl Implementation
45 * \ingroup IfxLld_Port
46 * \defgroup IfxLld_Port_Std Standard Driver
47 * \ingroup IfxLld_Port
48 */
49
50 #ifndef IFXPORT_CFG_H
51 #define IFXPORT_CFG_H 1
52
53 /******************************************************************************/
54 /*----------------------------------Includes----------------------------------*/
55 /******************************************************************************/
56
57 #include "Cpu/Std/IfxCpu_Intrinsics.h"
58 #include "IfxPort_reg.h"
59
60 /******************************************************************************/
61 /*-----------------------------------Macros-----------------------------------*/
62 /******************************************************************************/
63
64 /** \brief Port count \ingroup IfxLld_port_cfg
65 */
66 #define IFXPORT_NUM_MODULES (23)
67
68 #define IFXPORT_OUTOUTFEATURE_NONE (0xFFFFFFFF)
69
70 /******************************************************************************/
71 /*-------------------------------Enumerations---------------------------------*/
72 /******************************************************************************/
73
74 /** \brief List of the available Port resources
75 */
76 typedef enum
77 {
78 IfxPort_Index_00 = 0, /**< \brief PORT 00 */
79 IfxPort_Index_01 = 1, /**< \brief PORT 01 */
80 IfxPort_Index_02 = 2, /**< \brief PORT 02 */
81 IfxPort_Index_10 = 10, /**< \brief PORT 10 */
82 IfxPort_Index_11 = 11, /**< \brief PORT 11 */
83 IfxPort_Index_12 = 12, /**< \brief PORT 12 */
84 IfxPort_Index_13 = 13, /**< \brief PORT 13 */
85 IfxPort_Index_14 = 14, /**< \brief PORT 14 */
86 IfxPort_Index_15 = 15, /**< \brief PORT 15 */
87 IfxPort_Index_20 = 20, /**< \brief PORT 20 */
88 IfxPort_Index_21 = 21, /**< \brief PORT 21 */
89 IfxPort_Index_22 = 22, /**< \brief PORT 22 */
90 IfxPort_Index_23 = 23, /**< \brief PORT 23 */
91 IfxPort_Index_24 = 24, /**< \brief PORT 24 */
92 IfxPort_Index_25 = 25, /**< \brief PORT 25 */
93 IfxPort_Index_26 = 26, /**< \brief PORT 26 */
94 IfxPort_Index_30 = 30, /**< \brief PORT 30 */
95 IfxPort_Index_31 = 31, /**< \brief PORT 31 */
96 IfxPort_Index_32 = 32, /**< \brief PORT 32 */
97 IfxPort_Index_33 = 33, /**< \brief PORT 33 */
98 IfxPort_Index_34 = 34, /**< \brief PORT 34 */
99 IfxPort_Index_40 = 40, /**< \brief PORT 40 */
100 IfxPort_Index_41 = 41, /**< \brief PORT 41 */
101 IfxPort_Index_none = -1 /**< \brief none */
102 } IfxPort_Index;
103
104 /******************************************************************************/
105 /*-----------------------------Data Structures--------------------------------*/
106 /******************************************************************************/
107
108 /** \brief used by IfxPort_Esr_Masks table
109 */
110 typedef struct
111 {
112 Ifx_P *port;
113 uint16 masks;
114 } IfxPort_Esr_Masks;
115
116 /******************************************************************************/
117 /*-------------------Global Exported Variables/Constants----------------------*/
118 /******************************************************************************/
119
120 IFX_EXTERN IFX_CONST IfxPort_Esr_Masks IfxPort_cfg_esrMasks[IFXPORT_NUM_MODULES];
121
122 IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxPort_cfg_indexMap[IFXPORT_NUM_MODULES];
123
124 #endif /* IFXPORT_CFG_H */
IfxPort_Esr_Masks
used by IfxPort_Esr_Masks table
Definition: IfxPort_cfg.h:110
IfxPort_Index_31
PORT 31.
Definition: IfxPort_cfg.h:95
IfxPort_Index
IfxPort_Index
List of the available Port resources.
Definition: IfxPort_cfg.h:76
IfxPort_cfg_indexMap
IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxPort_cfg_indexMap[IFXPORT_NUM_MODULES]
Definition: IfxPort_cfg.h:122
IfxPort_Index_13
PORT 13.
Definition: IfxPort_cfg.h:84
IfxPort_Index_10
PORT 10.
Definition: IfxPort_cfg.h:81
IFXPORT_NUM_MODULES
#define IFXPORT_NUM_MODULES
Port count.
Definition: IfxPort_cfg.h:66
IfxPort_Esr_Masks::port
Ifx_P * port
Definition: IfxPort_cfg.h:112
IfxCpu_Intrinsics.h
IfxPort_Index_00
PORT 00.
Definition: IfxPort_cfg.h:78
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxPort_Index_01
PORT 01.
Definition: IfxPort_cfg.h:79
IfxPort_Index_24
PORT 24.
Definition: IfxPort_cfg.h:91
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxPort_Index_23
PORT 23.
Definition: IfxPort_cfg.h:90
IfxPort_Index_33
PORT 33.
Definition: IfxPort_cfg.h:97
IfxPort_Index_21
PORT 21.
Definition: IfxPort_cfg.h:88
IfxPort_Index_15
PORT 15.
Definition: IfxPort_cfg.h:86
IfxPort_Index_14
PORT 14.
Definition: IfxPort_cfg.h:85
IfxPort_Index_12
PORT 12.
Definition: IfxPort_cfg.h:83
IfxPort_Index_41
PORT 41.
Definition: IfxPort_cfg.h:100
IfxPort_Index_20
PORT 20.
Definition: IfxPort_cfg.h:87
IfxPort_Index_25
PORT 25.
Definition: IfxPort_cfg.h:92
IfxPort_Index_32
PORT 32.
Definition: IfxPort_cfg.h:96
IfxPort_Index_22
PORT 22.
Definition: IfxPort_cfg.h:89
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxPort_Index_02
PORT 02.
Definition: IfxPort_cfg.h:80
IfxPort_Index_30
PORT 30.
Definition: IfxPort_cfg.h:94
IfxPort_cfg_esrMasks
IFX_EXTERN IFX_CONST IfxPort_Esr_Masks IfxPort_cfg_esrMasks[IFXPORT_NUM_MODULES]
Definition: IfxPort_cfg.h:120
IfxPort_Index_34
PORT 34.
Definition: IfxPort_cfg.h:98
IfxPort_Index_none
none
Definition: IfxPort_cfg.h:101
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:140
IfxPort_Index_40
PORT 40.
Definition: IfxPort_cfg.h:99
IfxPort_Index_11
PORT 11.
Definition: IfxPort_cfg.h:82
IfxPort_Index_26
PORT 26.
Definition: IfxPort_cfg.h:93
IfxPort_Esr_Masks::masks
uint16 masks
Definition: IfxPort_cfg.h:113


iLLD_TC38A: IfxPsi5.c Source File

  • Psi5
  • Std
IfxPsi5.c
Go to the documentation of this file.
1 /**
2 * \file IfxPsi5.c
3 * \brief PSI5 basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 */
43
44 /******************************************************************************/
45 /*----------------------------------Includes----------------------------------*/
46 /******************************************************************************/
47
48 #include "IfxPsi5.h"
49
50 /******************************************************************************/
51 /*-------------------------Function Implementations---------------------------*/
52 /******************************************************************************/
53
54 void IfxPsi5_disableModule(Ifx_PSI5 *psi5)
55 {
56 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
57 IfxScuWdt_clearCpuEndinit(passwd);
58 psi5->CLC.B.DISR = 1;
59 IfxScuWdt_setCpuEndinit(passwd);
60 }
61
62
63 void IfxPsi5_enableInterrupt(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel, IfxPsi5_InterruptSource interruptSource, IfxPsi5_InterruptRequest enabled)
64 {
65 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
66 IfxScuWdt_clearCpuEndinit(passwd);
67
68 if (interruptSource < IfxPsi5_InterruptSource_wsi0)
69 {
70 psi5->INTENA[channel].U = psi5->INTENA[channel].U | (enabled << interruptSource);
71 }
72 else
73 {
74 psi5->INTENB[channel].U = psi5->INTENB[channel].U | (enabled << (interruptSource - IfxPsi5_InterruptSource_wsi0));
75 }
76
77 IfxScuWdt_setCpuEndinit(passwd);
78 }
79
80
81 void IfxPsi5_resetModule(Ifx_PSI5 *psi5)
82 {
83 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
84 IfxScuWdt_clearCpuEndinit(passwd);
85
86 psi5->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
87 psi5->KRST1.B.RST = 1;
88 IfxScuWdt_setCpuEndinit(passwd);
89
90 while (0 == psi5->KRST0.B.RSTSTAT) /* Wait until reset is executed */
91 {}
92
93 IfxScuWdt_clearCpuEndinit(passwd);
94 psi5->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
95 IfxScuWdt_setCpuEndinit(passwd);
96 }
97
98
99 void IfxPsi5_enableModule(Ifx_PSI5 *psi5)
100 {
101 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
102 IfxScuWdt_clearCpuEndinit(passwd);
103 psi5->CLC.B.DISR = 0;
104 IfxScuWdt_setCpuEndinit(passwd);
105
106 if (psi5->CLC.U)
107 {}
108 }
IfxPsi5_InterruptRequest
IfxPsi5_InterruptRequest
Enable/Disable Interrupt Request.defined in MODULE_PSI5.INTENA[x].
Definition: IfxPsi5.h:167
IfxPsi5_enableModule
void IfxPsi5_enableModule(Ifx_PSI5 *psi5)
Definition: IfxPsi5.c:99
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxPsi5_enableInterrupt
void IfxPsi5_enableInterrupt(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel, IfxPsi5_InterruptSource interruptSource, IfxPsi5_InterruptRequest enabled)
enable/disable interrupt source
Definition: IfxPsi5.c:63
IfxPsi5_ChannelId
IfxPsi5_ChannelId
Channel Id.
Definition: IfxPsi5_cfg.h:90
IfxPsi5.h
PSI5 basic functionality.
IfxPsi5_InterruptSource_wsi0
Enable Interrupt Request WSi0.
Definition: IfxPsi5.h:194
IfxPsi5_InterruptSource
IfxPsi5_InterruptSource
enable the interrupt source of any interrupt of PSI5 Channel.specify in MODULE_PSI5.INTENA[x].U and MODULE_PSI5.INTENB[x].U
Definition: IfxPsi5.h:175
IfxPsi5_resetModule
void IfxPsi5_resetModule(Ifx_PSI5 *psi5)
resets PSI5 kernel
Definition: IfxPsi5.c:81
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxPsi5_disableModule
void IfxPsi5_disableModule(Ifx_PSI5 *psi5)
Disable PSI5 kernel.
Definition: IfxPsi5.c:54
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613


iLLD_TC38A: IfxPsi5.h Source File

  • Psi5
  • Std
IfxPsi5.h
Go to the documentation of this file.
1 /**
2 * \file IfxPsi5.h
3 * \brief PSI5 basic functionality
4 * \ingroup IfxLld_Psi5
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 *
43 * \defgroup IfxLld_Psi5_Std_Enumerations Enumerations
44 * \ingroup IfxLld_Psi5_Std
45 * \defgroup IfxLld_Psi5_Std_Channel Channel Status Functions
46 * \ingroup IfxLld_Psi5_Std
47 * \defgroup IfxLld_Psi5_Std_IO IO Pin Configuration Functions
48 * \ingroup IfxLld_Psi5_Std
49 * \defgroup IfxLld_Psi5_Std_Interrupt Interrupt configuration function
50 * \ingroup IfxLld_Psi5_Std
51 * \defgroup IfxLld_Psi5_Std_Operative Operative functions
52 * \ingroup IfxLld_Psi5_Std
53 */
54
55 #ifndef IFXPSI5_H
56 #define IFXPSI5_H 1
57
58 /******************************************************************************/
59 /*----------------------------------Includes----------------------------------*/
60 /******************************************************************************/
61
62 #include "_Impl/IfxPsi5_cfg.h"
63 #include "_PinMap/IfxPsi5_PinMap.h"
64 #include "IfxPsi5_reg.h"
65 #include "Scu/Std/IfxScuWdt.h"
66 #include "Cpu/Std/IfxCpu_Intrinsics.h"
67 #include "Src/Std/IfxSrc.h"
68
69 /******************************************************************************/
70 /*--------------------------------Enumerations--------------------------------*/
71 /******************************************************************************/
72
73 /** \addtogroup IfxLld_Psi5_Std_Enumerations
74 * \{ */
75 /** \brief MODULE_PSI5.IOCRx.ALTI(x = 0,1,2),Alternate input selection
76 */
77 typedef enum
78 {
79 IfxPsi5_AlternateInput_0 = 0, /**< \brief Alternate Input 0 */
80 IfxPsi5_AlternateInput_1, /**< \brief Alternate Input 1 */
81 IfxPsi5_AlternateInput_2, /**< \brief Alternate Input 2 */
82 IfxPsi5_AlternateInput_3 /**< \brief Alternate Input 3 */
83 } IfxPsi5_AlternateInput;
84
85 /** \brief MODULE_PSI5.RCRCx.BRS(x = 0,1,2),Baud rate selection
86 */
87 typedef enum
88 {
89 IfxPsi5_BaudRate_125 = 0, /**< \brief Slow 125 kHz clock */
90 IfxPsi5_BaudRate_189 = 1 /**< \brief Fast 189 kHz clock */
91 } IfxPsi5_BaudRate;
92
93 /** \brief MODULE_PSI5.RCRBx.CRCy(x = 0,1,2; y=0,1,2,3,4,5),CRC or parity selection
94 */
95 typedef enum
96 {
97 IfxPsi5_CRCorParity_parity = 0, /**< \brief parity selection */
98 IfxPsi5_CRCorParity_crc = 1 /**< \brief CRC selection */
99 } IfxPsi5_CRCorParity;
100
101 /** \brief Clock type
102 */
103 typedef enum
104 {
105 IfxPsi5_ClockType_fracDiv = 0, /**< \brief Fractional Divide clock */
106 IfxPsi5_ClockType_slowClock_125 = 1, /**< \brief Slow 125 kHz clock */
107 IfxPsi5_ClockType_fastClock_189 = 2, /**< \brief Fast 189 kHz clock */
108 IfxPsi5_ClockType_timeStamp = 3 /**< \brief Timestamp clock */
109 } IfxPsi5_ClockType;
110
111 /** \brief MODULE_PSI5.IOCRx.DEPTH(x = 0,1,2),Digital input filter depth
112 */
113 typedef enum
114 {
115 IfxPsi5_DigitalInputFilterDepth_0 = 0, /**< \brief Digital input filter depth is 0 */
116 IfxPsi5_DigitalInputFilterDepth_1, /**< \brief Digital input filter depth is 1 */
117 IfxPsi5_DigitalInputFilterDepth_2, /**< \brief Digital input filter depth is 2 */
118 IfxPsi5_DigitalInputFilterDepth_3, /**< \brief Digital input filter depth is 3 */
119 IfxPsi5_DigitalInputFilterDepth_4, /**< \brief Digital input filter depth is 4 */
120 IfxPsi5_DigitalInputFilterDepth_5, /**< \brief Digital input filter depth is 5 */
121 IfxPsi5_DigitalInputFilterDepth_6, /**< \brief Digital input filter depth is 6 */
122 IfxPsi5_DigitalInputFilterDepth_7, /**< \brief Digital input filter depth is 7 */
123 IfxPsi5_DigitalInputFilterDepth_8, /**< \brief Digital input filter depth is 8 */
124 IfxPsi5_DigitalInputFilterDepth_9, /**< \brief Digital input filter depth is 9 */
125 IfxPsi5_DigitalInputFilterDepth_10, /**< \brief Digital input filter depth is 10 */
126 IfxPsi5_DigitalInputFilterDepth_11, /**< \brief Digital input filter depth is 11 */
127 IfxPsi5_DigitalInputFilterDepth_12, /**< \brief Digital input filter depth is 12 */
128 IfxPsi5_DigitalInputFilterDepth_13, /**< \brief Digital input filter depth is 13 */
129 IfxPsi5_DigitalInputFilterDepth_14, /**< \brief Digital input filter depth is 14 */
130 IfxPsi5_DigitalInputFilterDepth_15 /**< \brief Digital input filter depth is 15 */
131 } IfxPsi5_DigitalInputFilterDepth;
132
133 /** \brief MODULE_PSI5.FDR.DM,Divider mode
134 */
135 typedef enum
136 {
137 IfxPsi5_DividerMode_spb = 0, /**< \brief divider mode is off */
138 IfxPsi5_DividerMode_normal = 1, /**< \brief divider mode is normal */
139 IfxPsi5_DividerMode_fractional = 2, /**< \brief divider mode is fractional */
140 IfxPsi5_DividerMode_off = 3 /**< \brief divider mode is off */
141 } IfxPsi5_DividerMode;
142
143 /** \brief MODULE_PSI5.RCRBx.FECy(x = 0,1,2; y=0,1,2,3,4,5),Frame expectation control
144 */
145 typedef enum
146 {
147 IfxPsi5_FrameExpectation_notExpected = 0, /**< \brief No frame is expected */
148 IfxPsi5_FrameExpectation_expected = 1 /**< \brief Frame is expected */
149 } IfxPsi5_FrameExpectation;
150
151 /** \brief specifies interrupt node pointer defined in MODULE_PSI5.INP[x].U
152 */
153 typedef enum
154 {
155 IfxPsi5_InterruptNodePointer_rsi = 0, /**< \brief Interrupt Node Pointer for Interrupt RSI */
156 IfxPsi5_InterruptNodePointer_rdi = 1, /**< \brief Interrupt Node Pointer for Interrupt RDI */
157 IfxPsi5_InterruptNodePointer_rbi = 2, /**< \brief Interrupt Node Pointer for Interrupt RBI */
158 IfxPsi5_InterruptNodePointer_tdi = 3, /**< \brief Interrupt Node Pointer for Interrupt TDI */
159 IfxPsi5_InterruptNodePointer_tbi = 4, /**< \brief Interrupt Node Pointer for Interrupt TBI */
160 IfxPsi5_InterruptNodePointer_erri = 5, /**< \brief Interrupt Node Pointer for Interrupt ERRI */
161 IfxPsi5_InterruptNodePointer_sdi = 6, /**< \brief Interrupt Node Pointer for Interrupt SDI */
162 IfxPsi5_InterruptNodePointer_fwi = 7 /**< \brief Interrupt Node Pointer for Interrupt FWI */
163 } IfxPsi5_InterruptNodePointer;
164
165 /** \brief Enable/Disable Interrupt Request.defined in MODULE_PSI5.INTENA[x]
166 */
167 typedef enum
168 {
169 IfxPsi5_InterruptRequest_disabled = 0, /**< \brief No Interrupt Request can be generated for respective source */
170 IfxPsi5_InterruptRequest_enabled = 1 /**< \brief An Interrupt Request can be generated for source */
171 } IfxPsi5_InterruptRequest;
172
173 /** \brief enable the interrupt source of any interrupt of PSI5 Channel.specify in MODULE_PSI5.INTENA[x].U and MODULE_PSI5.INTENB[x].U
174 */
175 typedef enum
176 {
177 IfxPsi5_InterruptSource_rsi = 0, /**< \brief Enable Interrupt Request RSI */
178 IfxPsi5_InterruptSource_rdi = 1, /**< \brief Enable Interrupt Request RDI */
179 IfxPsi5_InterruptSource_rbi = 2, /**< \brief Enable Interrupt Request RBI */
180 IfxPsi5_InterruptSource_tei = 3, /**< \brief Enable Interrupt Request TEI */
181 IfxPsi5_InterruptSource_nbi = 4, /**< \brief Enable Interrupt Request NBI */
182 IfxPsi5_InterruptSource_mei = 5, /**< \brief Enable Interrupt Request MEI */
183 IfxPsi5_InterruptSource_crci = 6, /**< \brief Enable Interrupt Request CRCI */
184 IfxPsi5_InterruptSource_fwi = 7, /**< \brief Enable Interrupt Request FWI */
185 IfxPsi5_InterruptSource_rui = 8, /**< \brief Enable Interrupt Request RUI */
186 IfxPsi5_InterruptSource_rmi = 9, /**< \brief Enable Interrupt Request RMI */
187 IfxPsi5_InterruptSource_tpi = 10, /**< \brief Enable Interrupt Request TPI */
188 IfxPsi5_InterruptSource_tpoi = 11, /**< \brief Enable Interrupt Request TPOI */
189 IfxPsi5_InterruptSource_tsi = 12, /**< \brief Enable Interrupt Request TSI */
190 IfxPsi5_InterruptSource_tsoi = 13, /**< \brief Enable Interrupt Request TSOI */
191 IfxPsi5_InterruptSource_toi = 14, /**< \brief Enable Interrupt Request TOI */
192 IfxPsi5_InterruptSource_tooi = 15, /**< \brief Enable Interrupt Request TOOI */
193 IfxPsi5_InterruptSource_nfi = 16, /**< \brief Enable Interrupt Request NFI */
194 IfxPsi5_InterruptSource_wsi0 = 17, /**< \brief Enable Interrupt Request WSi0 */
195 IfxPsi5_InterruptSource_wsi1 = 18, /**< \brief Enable Interrupt Request WSI1 */
196 IfxPsi5_InterruptSource_wsi2 = 19, /**< \brief Enable Interrupt Request WSI2 */
197 IfxPsi5_InterruptSource_wsi3 = 20, /**< \brief Enable Interrupt Request WSI3 */
198 IfxPsi5_InterruptSource_wsi4 = 21, /**< \brief Enable Interrupt Request WSI4 */
199 IfxPsi5_InterruptSource_wsi5 = 22, /**< \brief Enable Interrupt Request WSI */
200 IfxPsi5_InterruptSource_sdi0 = 23, /**< \brief Enable Interrupt Request SDI0 */
201 IfxPsi5_InterruptSource_sdi1 = 24, /**< \brief Enable Interrupt Request SDI1 */
202 IfxPsi5_InterruptSource_sdi2 = 25, /**< \brief Enable Interrupt Request SDI2 */
203 IfxPsi5_InterruptSource_sdi3 = 26, /**< \brief Enable Interrupt Request SDI3 */
204 IfxPsi5_InterruptSource_sdi4 = 27, /**< \brief Enable Interrupt Request SDI4 */
205 IfxPsi5_InterruptSource_sdi5 = 28, /**< \brief Enable Interrupt Request SDI5 */
206 IfxPsi5_InterruptSource_soi0 = 29, /**< \brief Enable Interrupt Request SOI0 */
207 IfxPsi5_InterruptSource_soi1 = 30, /**< \brief Enable Interrupt Request SOI1 */
208 IfxPsi5_InterruptSource_soi2 = 31, /**< \brief Enable Interrupt Request SOI2 */
209 IfxPsi5_InterruptSource_soi3 = 32, /**< \brief Enable Interrupt Request SOI3 */
210 IfxPsi5_InterruptSource_soi4 = 33, /**< \brief Enable Interrupt Request SOI4 */
211 IfxPsi5_InterruptSource_soi5 = 34, /**< \brief Enable Interrupt Request SOI4 */
212 IfxPsi5_InterruptSource_scri0 = 35, /**< \brief Enable Interrupt Request SCRI0 */
213 IfxPsi5_InterruptSource_scri1 = 36, /**< \brief Enable Interrupt Request SCRI1 */
214 IfxPsi5_InterruptSource_scri2 = 37, /**< \brief Enable Interrupt Request SCRI2 */
215 IfxPsi5_InterruptSource_scri3 = 38, /**< \brief Enable Interrupt Request SCRI3 */
216 IfxPsi5_InterruptSource_scri4 = 39, /**< \brief Enable Interrupt Request SCRI4 */
217 IfxPsi5_InterruptSource_scri5 = 40 /**< \brief Enable Interrupt Request SCRI5 */
218 } IfxPsi5_InterruptSource;
219
220 /** \brief MODULE_PSI5.RCRBx.MSGy(x = 0,1,2; y=0,1,2,3,4,5),Messaging bits presence
221 */
222 typedef enum
223 {
224 IfxPsi5_MessagingBits_absent = 0, /**< \brief No messaging bits */
225 IfxPsi5_MessagingBits_present = 1 /**< \brief 2 messaging bits */
226 } IfxPsi5_MessagingBits;
227
228 /** \brief MODULE_PSI5.RCRCx.TSR(x = 0,1,2),Timestamp select for receive data registers
229 */
230 typedef enum
231 {
232 IfxPsi5_ReceiveDataRegisterTimestamp_pulse = 0, /**< \brief Pulse based timestamp SPTSC to be stored in RDRHC */
233 IfxPsi5_ReceiveDataRegisterTimestamp_frame = 1 /**< \brief Start of frame based timestamp SPTSC to be stored in RDRHC */
234 } IfxPsi5_ReceiveDataRegisterTimestamp;
235
236 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
237 * Definition in Ifx_PSI5.CLC.B.EDIS
238 */
239 typedef enum
240 {
241 IfxPsi5_SleepMode_enable = 0, /**< \brief enables sleep mode */
242 IfxPsi5_SleepMode_disable = 1 /**< \brief disables sleep mode */
243 } IfxPsi5_SleepMode;
244
245 /** \brief MODULE_PSI5.RDRHx.SC(x = 0-2),Slot Id
246 */
247 typedef enum
248 {
249 IfxPsi5_Slot_0 = 0, /**< \brief slot 0 */
250 IfxPsi5_Slot_1, /**< \brief slot 1 */
251 IfxPsi5_Slot_2, /**< \brief slot 2 */
252 IfxPsi5_Slot_3, /**< \brief slot 3 */
253 IfxPsi5_Slot_4, /**< \brief slot 4 */
254 IfxPsi5_Slot_5 /**< \brief slot 5 */
255 } IfxPsi5_Slot;
256
257 /** \brief OCDS Suspend Control (OCDS.SUS)
258 */
259 typedef enum
260 {
261 IfxPsi5_SuspendMode_none = 0, /**< \brief No suspend */
262 IfxPsi5_SuspendMode_hard = 1, /**< \brief Hard Suspend */
263 IfxPsi5_SuspendMode_soft = 2 /**< \brief Soft Suspend */
264 } IfxPsi5_SuspendMode;
265
266 /** \brief MODULE_PSI5.PGCx.TBS(x = 0,1,2),Time base
267 */
268 typedef enum
269 {
270 IfxPsi5_TimeBase_internal = 0, /**< \brief Internal time stamp clock */
271 IfxPsi5_TimeBase_external = 1 /**< \brief External GTM inputs */
272 } IfxPsi5_TimeBase;
273
274 /** \brief MODULE_PSI5.RCRCx.TSP(x = 0,1,2),MODULE_PSI5.RCRCx.TSF(x = 0,1,2)Timestamp register type
275 */
276 typedef enum
277 {
278 IfxPsi5_TimestampRegister_a = 0, /**< \brief Timestamp register A */
279 IfxPsi5_TimestampRegister_b = 1, /**< \brief Timestamp register B */
280 IfxPsi5_TimestampRegister_c = 2 /**< \brief Timestamp register C */
281 } IfxPsi5_TimestampRegister;
282
283 /** \brief MODULE_PSI5.PGCx.ETS(x = 0,1,2),Trigger Id
284 */
285 typedef enum
286 {
287 IfxPsi5_Trigger_0 = 0, /**< \brief trigger 0 */
288 IfxPsi5_Trigger_1, /**< \brief trigger 1 */
289 IfxPsi5_Trigger_2, /**< \brief trigger 2 */
290 IfxPsi5_Trigger_3, /**< \brief trigger 3 */
291 IfxPsi5_Trigger_4, /**< \brief trigger 4 */
292 IfxPsi5_Trigger_5 /**< \brief trigger 5 */
293 } IfxPsi5_Trigger;
294
295 /** \brief Output line selected by node Pointer defined in MODULE_PSI5.INP[x].U
296 */
297 typedef enum
298 {
299 IfxPsi5_TriggerOutput_0 = 0, /**< \brief Triggered output line is TRIGO_0 */
300 IfxPsi5_TriggerOutput_1, /**< \brief Triggered output line is TRIGO_1 */
301 IfxPsi5_TriggerOutput_2, /**< \brief Triggered output line is TRIGO_2 */
302 IfxPsi5_TriggerOutput_3, /**< \brief Triggered output line is TRIGO_3 */
303 IfxPsi5_TriggerOutput_4, /**< \brief Triggered output line is TRIGO_4 */
304 IfxPsi5_TriggerOutput_5, /**< \brief Triggered output line is TRIGO_5 */
305 IfxPsi5_TriggerOutput_6, /**< \brief Triggered output line is TRIGO_6 */
306 IfxPsi5_TriggerOutput_7 /**< \brief Triggered output line is TRIGO_7 */
307 } IfxPsi5_TriggerOutput;
308
309 /** \brief Trigger type
310 */
311 typedef enum
312 {
313 IfxPsi5_TriggerType_periodic = 0, /**< \brief Periodic trigger */
314 IfxPsi5_TriggerType_external = 1, /**< \brief External trigger */
315 IfxPsi5_TriggerType_bypass = 2 /**< \brief Bypassed trigger */
316 } IfxPsi5_TriggerType;
317
318 /** \brief MODULE_PSI5.RCRBx.VBSy(x = 0,1,2; y=0,1,2,3,4,5),Verbose mode
319 */
320 typedef enum
321 {
322 IfxPsi5_Verbose_off = 0, /**< \brief Verbose mode is turned off */
323 IfxPsi5_Verbose_on = 1 /**< \brief Verbose mode is turned on */
324 } IfxPsi5_Verbose;
325
326 /** \} */
327
328 /** \brief Options for choosing different Fractional Divider Registers
329 */
330 typedef enum
331 {
332 IfxPsi5_FractionalDividerRegister_normal = 0, /**< \brief The Fractional Divider Register controls the input clock f_fracdiv. */
333 IfxPsi5_FractionalDividerRegister_lowbitrate = 1, /**< \brief The Fractional Divider Register for lower Bit Rate contains the pre-divider that defines the time resolution of the
334 * f_125.It divides f_fracdiv by a factor and provides f_125 to all channels. */
335 IfxPsi5_FractionalDividerRegister_highbitrate = 2, /**< \brief The Fractional Divider Register for Higher Bit Rate contains the pre-divider that defines the time resolution of f_189.
336 * It divides f_fracdiv by a factor and provides f_189 to all channels. */
337 IfxPsi5_FractionalDividerRegister_timestamp = 3 /**< \brief The PSI5 Module Time Stamp Predivider Register contains the pre-divider that defines the time resolution of the
338 * Time Stamp Registers TSRA/B/C and the Sync Pulse Time Base Counter SBC. It divides fPSI5 by a factor. It contains as well the bits for reset control of the time stamp counters. */
339 } IfxPsi5_FractionalDividerRegister;
340
341 typedef enum
342 {
343 IfxPsi5_InterruptServiceRequest_0 = 0,
344 IfxPsi5_InterruptServiceRequest_1 = 1,
345 IfxPsi5_InterruptServiceRequest_2 = 2,
346 IfxPsi5_InterruptServiceRequest_3 = 3,
347 IfxPsi5_InterruptServiceRequest_4 = 4,
348 IfxPsi5_InterruptServiceRequest_5 = 5,
349 IfxPsi5_InterruptServiceRequest_6 = 6,
350 IfxPsi5_InterruptServiceRequest_7 = 7
351 } IfxPsi5_InterruptServiceRequest;
352
353 typedef enum
354 {
355 IfxPsi5_InterruptStatusRegister_a = 0,
356 IfxPsi5_InterruptStatusRegister_b = 1
357 } IfxPsi5_InterruptStatusRegister;
358
359 /** \brief Optiond for different Receive Control Registers(RCRA,RCRB,RCRC)
360 */
361 typedef enum
362 {
363 IfxPsi5_ReceiverControlRegister_a = 0, /**< \brief Receiver Control Register A configures the payload length of the up to 6 frames in the up to 6 slots. */
364 IfxPsi5_ReceiverControlRegister_b = 1, /**< \brief Receiver Control Register B configures up to 6 frame types in the up to 6 slots */
365 IfxPsi5_ReceiverControlRegister_c = 2 /**< \brief Receiver Control Register C configures bit rate and time stamp sources */
366 } IfxPsi5_ReceiverControlRegister;
367
368 /** \addtogroup IfxLld_Psi5_Std_Channel
369 * \{ */
370
371 /******************************************************************************/
372 /*-------------------------Inline Function Prototypes-------------------------*/
373 /******************************************************************************/
374
375 /** \brief access function to get the CRCI status register contents for a channel
376 * \param psi5 pointer to the PSI5 register space
377 * \param channel channel Id
378 * \return Crci status register contents
379 */
380 IFX_INLINE uint32 IfxPsi5_getStatusCrci(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel);
381
382 /** \brief access function to get the MEI status register contents for a channel
383 * \param psi5 pointer to the PSI5 register space
384 * \param channel channel Id
385 * \return Mei status register contents
386 */
387 IFX_INLINE uint32 IfxPsi5_getStatusMei(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel);
388
389 /** \brief access function to get the NBI status register contents for a channel
390 * \param psi5 pointer to the PSI5 register space
391 * \param channel channel Id
392 * \return Nbi status register contents
393 */
394 IFX_INLINE uint32 IfxPsi5_getStatusNbi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel);
395
396 /** \brief access function to get the NFI status register contents for a channel
397 * \param psi5 pointer to the PSI5 register space
398 * \param channel channel Id
399 * \return Nfi status register contents
400 */
401 IFX_INLINE uint32 IfxPsi5_getStatusNfi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel);
402
403 /** \brief access function to get the RDI status register contents for a channel
404 * \param psi5 pointer to the PSI5 register space
405 * \param channel channel Id
406 * \return Rdi status register contents
407 */
408 IFX_INLINE uint32 IfxPsi5_getStatusRdi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel);
409
410 /** \brief access function to get the RMI status register contents for a channel
411 * \param psi5 pointer to the PSI5 register space
412 * \param channel channel Id
413 * \return Rmi status register contents
414 */
415 IFX_INLINE uint32 IfxPsi5_getStatusRmi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel);
416
417 /** \brief access function to get the RSI status register contents for a channel
418 * \param psi5 pointer to the PSI5 register space
419 * \param channel channel Id
420 * \return Rsi status register contents
421 */
422 IFX_INLINE uint32 IfxPsi5_getStatusRsi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel);
423
424 /** \brief access function to get the TEI status register contents for a channel
425 * \param psi5 pointer to the PSI5 register space
426 * \param channel channel Id
427 * \return Tei status register contents
428 */
429 IFX_INLINE uint32 IfxPsi5_getStatusTei(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel);
430
431 /** \brief Sets the sensitivity of the module to sleep signal
432 * \param psi5 pointer to PSI5 registers
433 * \param mode mode selection (enable / disable)
434 * \return None
435 */
436 IFX_INLINE void IfxPsi5_setSleepMode(Ifx_PSI5 *psi5, IfxPsi5_SleepMode mode);
437
438 /******************************************************************************/
439 /*-------------------------Global Function Prototypes-------------------------*/
440 /******************************************************************************/
441
442 /** \brief resets PSI5 kernel
443 * \param psi5 pointer to PSI5 registers
444 * \return None
445 */
446 IFX_EXTERN void IfxPsi5_resetModule(Ifx_PSI5 *psi5);
447
448 /** \} */
449
450 /** \addtogroup IfxLld_Psi5_Std_IO
451 * \{ */
452
453 /******************************************************************************/
454 /*-------------------------Inline Function Prototypes-------------------------*/
455 /******************************************************************************/
456
457 /** \brief Initializes a RX input
458 * \param rx the RX Pin which should be configured
459 * \param inputMode pin input mode which should be configured
460 * \param padDriver Pad Driver Configuration
461 * \return None
462 */
463 IFX_INLINE void IfxPsi5_initRxPin(const IfxPsi5_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
464
465 /** \brief Initializes a TX output
466 * \param tx the TX Pin which should be configured
467 * \param outputMode the pin output mode which should be configured
468 * \param padDriver the pad driver mode which should be configured
469 * \return None
470 */
471 IFX_INLINE void IfxPsi5_initTxPin(const IfxPsi5_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
472
473 /** \brief Sets the alternate RX input
474 * \param psi5Ch pointer to the PSI5 channel register space
475 * \param alternateInput Alternate RX input selection
476 * \return None
477 */
478 IFX_INLINE void IfxPsi5_setRxInput(Ifx_PSI5_CH *psi5Ch, IfxPsi5_AlternateInput alternateInput);
479
480 /** \} */
481
482 /** \addtogroup IfxLld_Psi5_Std_Interrupt
483 * \{ */
484
485 /******************************************************************************/
486 /*-------------------------Inline Function Prototypes-------------------------*/
487 /******************************************************************************/
488
489 /** \brief set respective service line for Interrupt source
490 * \param psi5 Pointer to PSI5 module
491 * \param channel specifies channel ID
492 * \param nodePointer specifies node pointer for respective interrupt source
493 * \param triggerOutputLine specifies trigger output line
494 * \return None
495 */
496 IFX_INLINE void IfxPsi5_setInterruptNodePointer(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel, IfxPsi5_InterruptNodePointer nodePointer, IfxPsi5_TriggerOutput triggerOutputLine);
497
498 /******************************************************************************/
499 /*-------------------------Global Function Prototypes-------------------------*/
500 /******************************************************************************/
501
502 /** \brief enable/disable interrupt source
503 * \param psi5 pointer to PSI5 module
504 * \param channel specifies channel ID
505 * \param interruptSource specifies the interrupt source
506 * \param enabled Enable/Disable the respective source
507 * \return None
508 */
509 IFX_EXTERN void IfxPsi5_enableInterrupt(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel, IfxPsi5_InterruptSource interruptSource, IfxPsi5_InterruptRequest enabled);
510
511 /** \} */
512
513 /** \addtogroup IfxLld_Psi5_Std_Operative
514 * \{ */
515
516 /******************************************************************************/
517 /*-------------------------Inline Function Prototypes-------------------------*/
518 /******************************************************************************/
519
520 /** \brief Returns the module's suspend state.
521 * TRUE :if module is suspended.
522 * FALSE:if module is not yet suspended.
523 * \param psi5 Pointer to PSI5 module registers
524 * \return Suspend status (TRUE / FALSE)
525 */
526 IFX_INLINE boolean IfxPsi5_isModuleSuspended(Ifx_PSI5 *psi5);
527
528 /** \brief Configure the Module to Hard/Soft suspend mode.
529 * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
530 * \param psi5 Pointer to PSI5 module registers
531 * \param mode Module suspend mode
532 * \return None
533 */
534 IFX_INLINE void IfxPsi5_setSuspendMode(Ifx_PSI5 *psi5, IfxPsi5_SuspendMode mode);
535
536 /******************************************************************************/
537 /*-------------------------Global Function Prototypes-------------------------*/
538 /******************************************************************************/
539
540 /** \brief Disable PSI5 kernel
541 * \param psi5 pointer to the base of PSI5 registers
542 * \return None
543 */
544 IFX_EXTERN void IfxPsi5_disableModule(Ifx_PSI5 *psi5);
545
546 /** \} */
547
548 /******************************************************************************/
549 /*-------------------------Inline Function Prototypes-------------------------*/
550 /******************************************************************************/
551
552 /**
553 * \param psi5 Pointer to PSI5 SFR base register
554 * \param channel Channel Id of PSI5 channel whose receiver operation has to be configured
555 */
556 IFX_INLINE uint32 IfxPsi5_getReceiveDataRegisterLow(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel);
557
558 /** \brief Clears interrupt flag for all sources
559 * \param psi5 Pointer to PSI5 SFR base register
560 * \param channel Channel Id of PSI5 channel whose receiver operation has to be configured
561 * \param intStatusReg The register to be selected depending on the interrupt source to be probed(slot specific sources are in INTSTATB)
562 * \param value
563 * \return None
564 */
565 IFX_INLINE void IfxPsi5_clearAllInterrupt(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel, IfxPsi5_InterruptStatusRegister intStatusReg, uint32 value);
566
567 /**
568 * \param psi5 Pointer to PSI5 SFR base register
569 * \param channel Channel Id of PSI5 channel whose receiver operation has to be configured
570 * \param intStatusReg The interrupt status register being probed(depending on the interrupt source being probed)
571 * \return Returns the register value encapsulating the status of different sources
572 */
573 IFX_INLINE uint32 IfxPsi5_getInterruptStatus(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel, IfxPsi5_InterruptStatusRegister intStatusReg);
574
575 /** \brief For a particular channel it gets the oldest data content of up to 32 received data frames. I.e.
576 * RFCx.REP is pointing at the buffer presented.
577 * \param psi5 Pointer to PSI5 SFR base register
578 * \param channel Channel Id of PSI5 channel whose receiver operation has to be configured
579 * \return Gives the oldest data content of up to 32 received data frames.
580 */
581 IFX_INLINE uint32 IfxPsi5_readReceiveFifoData(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel);
582
583 /** \brief Getting the FIFO write pointer for channel x
584 * \param psi5 Pointer to PSI5 SFR base register
585 * \param channel Channel Id of PSI5 channel whose receiver operation has to be configured
586 * \return Gives the address of the buffer written last.So before write to the buffer this value is incremented by 1.
587 */
588 IFX_INLINE uint16 IfxPsi5_getWriteFifoPointer(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel);
589
590 /** \brief Getting the FIFO read pointer for channel x
591 * \param psi5 Pointer to PSI5 SFR base register
592 * \param channel Channel Id of PSI5 channel whose receiver operation has to be configured
593 * \return Gives out pointer to the read buffer to be read next
594 */
595 IFX_INLINE uint16 IfxPsi5_getReadFifoPointer(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel);
596
597 /** \brief Clears the flag for a given interrupt source
598 * \param psi5 Pointer to PSI5 SFR base register
599 * \param channel Channel Id of PSI5 channel whose receiver operation has to be configured
600 * \param interruptSource Interrupt source to be cleared
601 * \return None
602 */
603 IFX_INLINE void IfxPsi5_clearInterrupt(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel, IfxPsi5_InterruptSource interruptSource);
604
605 /** \brief Gives the pointer to the SRC register for respective PSI5 interrupt source
606 * \param psi5 Pointer to PSI5 SFR base register
607 * \param intRequest Interrupt Source
608 * \return Address of the required SRC register
609 */
610 IFX_INLINE volatile Ifx_SRC_SRCR *IfxPsi5_getSrcPointer(Ifx_PSI5 *psi5, IfxPsi5_InterruptServiceRequest intRequest);
611
612 /** \brief Enabling all channels and error flags
613 * \param psi5 Pointer to PSI5 SFR base register
614 * \return None
615 */
616 IFX_INLINE void IfxPsi5_enableAllChannels(Ifx_PSI5 *psi5);
617
618 /** \brief Configures FIFO and Ring Buffer operation
619 * \param psi5 Pointer to PSI5 SFR's base address
620 * \param channel Channel Id of PSI5 channel whose receiver operation has to be configured
621 * \param value Values representing differnt settings for FIFO and Ring Buffer like FIFO Read Pointer,FIFO/Ring Buffer Write Pointer,FIFO Warning Level,Write Pointer WRAP Indicator and FIFO Flushing
622 * \return None
623 */
624 IFX_INLINE void IfxPsi5_setReceiveFifoWarningLevel(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel, uint32 value);
625
626 /**
627 * \param psi5 Pointer to PSI5 SFR's base address
628 * \param channel Channel Id of PSI5 channel whose receiver operation has to be configured
629 * \param rcr The reciever control registers for setting up different parameters for PSI5 receiver operation.
630 * Functionalities related to registers A, B and C can be found in the IfxPsi5_ReceiverControlRegister enum.
631 * \param value Value to be written into the RCRy(y = A,B,C) register.
632 * \return None
633 *
634 * Configures the payload length of the up to 6 frames in 6 slots.
635 *
636 */
637 IFX_INLINE void IfxPsi5_setReceiverControl(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel, IfxPsi5_ReceiverControlRegister rcr, uint32 value);
638
639 /**
640 * \param psi5 Pointer to PSI5 SFR base register
641 * \param fcd Select the appropriate divider register(see IfxPsi5_FractionalDividerRegister enum) for required functionality.
642 * \param value Contains value including divider values for different divider registers(FDR,FDRL,FDRH,FDRT)
643 * \return None
644 */
645 IFX_INLINE void IfxPsi5_setFractionalDivider(Ifx_PSI5 *psi5, IfxPsi5_FractionalDividerRegister fcd, uint32 value);
646
647 /******************************************************************************/
648 /*-------------------------Global Function Prototypes-------------------------*/
649 /******************************************************************************/
650
651 /**
652 * \return None
653 */
654 IFX_EXTERN void IfxPsi5_enableModule(Ifx_PSI5 *psi5);
655
656 /******************************************************************************/
657 /*---------------------Inline Function Implementations------------------------*/
658 /******************************************************************************/
659
660 IFX_INLINE uint32 IfxPsi5_getStatusCrci(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
661 {
662 return psi5->CRCIOV[channel].U;
663 }
664
665
666 IFX_INLINE uint32 IfxPsi5_getStatusMei(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
667 {
668 return psi5->MEIOV[channel].U;
669 }
670
671
672 IFX_INLINE uint32 IfxPsi5_getStatusNbi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
673 {
674 return psi5->NBIOV[channel].U;
675 }
676
677
678 IFX_INLINE uint32 IfxPsi5_getStatusNfi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
679 {
680 return psi5->NFIOV[channel].U;
681 }
682
683
684 IFX_INLINE uint32 IfxPsi5_getStatusRdi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
685 {
686 return psi5->RDIOV[channel].U;
687 }
688
689
690 IFX_INLINE uint32 IfxPsi5_getStatusRmi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
691 {
692 return psi5->RMIOV[channel].U;
693 }
694
695
696 IFX_INLINE uint32 IfxPsi5_getStatusRsi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
697 {
698 return psi5->RSIOV[channel].U;
699 }
700
701
702 IFX_INLINE uint32 IfxPsi5_getStatusTei(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
703 {
704 return psi5->TEIOV[channel].U;
705 }
706
707
708 IFX_INLINE void IfxPsi5_initRxPin(const IfxPsi5_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
709 {
710 if (rx->pin.port != NULL_PTR)
711 {
712 IfxPort_setPinModeInput(rx->pin.port, rx->pin.pinIndex, inputMode);
713 IfxPort_setPinPadDriver(rx->pin.port, rx->pin.pinIndex, padDriver);
714 Ifx_PSI5 *psi5 = rx->module;
715 Ifx_PSI5_CH *psi5Ch = &psi5->CH[rx->channelId];
716 IfxPsi5_setRxInput(psi5Ch, (IfxPsi5_AlternateInput)rx->select);
717 }
718 }
719
720
721 IFX_INLINE void IfxPsi5_initTxPin(const IfxPsi5_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
722 {
723 if (tx->pin.port != NULL_PTR)
724 {
725 IfxPort_setPinModeOutput(tx->pin.port, tx->pin.pinIndex, outputMode, tx->select);
726 IfxPort_setPinPadDriver(tx->pin.port, tx->pin.pinIndex, padDriver);
727 }
728 }
729
730
731 IFX_INLINE void IfxPsi5_setInterruptNodePointer(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel, IfxPsi5_InterruptNodePointer nodePointer, IfxPsi5_TriggerOutput triggerOutputLine)
732 {
733 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
734 IfxScuWdt_clearCpuEndinit(passwd);
735 psi5->INP[channel].U = psi5->INP[channel].U | (triggerOutputLine << (nodePointer * 4));
736 IfxScuWdt_setCpuEndinit(passwd);
737 }
738
739
740 IFX_INLINE void IfxPsi5_setRxInput(Ifx_PSI5_CH *psi5Ch, IfxPsi5_AlternateInput alternateInput)
741 {
742 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
743 IfxScuWdt_clearCpuEndinit(passwd);
744 psi5Ch->IOCR.B.ALTI = alternateInput;
745 IfxScuWdt_setCpuEndinit(passwd);
746 }
747
748
749 IFX_INLINE void IfxPsi5_setSleepMode(Ifx_PSI5 *psi5, IfxPsi5_SleepMode mode)
750 {
751 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
752 IfxScuWdt_clearCpuEndinit(passwd);
753 psi5->CLC.B.EDIS = mode;
754 IfxScuWdt_setCpuEndinit(passwd);
755 }
756
757
758 IFX_INLINE boolean IfxPsi5_isModuleSuspended(Ifx_PSI5 *psi5)
759 {
760 Ifx_PSI5_OCS ocs;
761
762 // read the status
763 ocs.U = psi5->OCS.U;
764
765 // return the status
766 return ocs.B.SUSSTA;
767 }
768
769
770 IFX_INLINE void IfxPsi5_setSuspendMode(Ifx_PSI5 *psi5, IfxPsi5_SuspendMode mode)
771 {
772 Ifx_PSI5_OCS ocs;
773
774 // remove protection and configure the suspend mode.
775 ocs.B.SUS_P = 1;
776 ocs.B.SUS = mode;
777 psi5->OCS.U = ocs.U;
778 }
779
780
781 IFX_INLINE uint32 IfxPsi5_getReceiveDataRegisterLow(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
782 {
783 return psi5->CH[channel].RDRL.U;
784 }
785
786
787 IFX_INLINE void IfxPsi5_clearAllInterrupt(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel, IfxPsi5_InterruptStatusRegister intStatusReg, uint32 value)
788 {
789 if (intStatusReg == IfxPsi5_InterruptStatusRegister_a)
790 {
791 psi5->INTCLRA[channel].U = value;
792 }
793 else
794 {
795 psi5->INTCLRB[channel].U = value;
796 }
797 }
798
799
800 IFX_INLINE uint32 IfxPsi5_getInterruptStatus(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel, IfxPsi5_InterruptStatusRegister intStatusReg)
801 {
802 if (intStatusReg == IfxPsi5_InterruptStatusRegister_a)
803 {
804 return psi5->INTSTATA[channel].U;
805 }
806 else
807 {
808 return psi5->INTSTATB[channel].U;
809 }
810 }
811
812
813 IFX_INLINE uint32 IfxPsi5_readReceiveFifoData(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
814 {
815 return psi5->RDF[channel].U;
816 }
817
818
819 IFX_INLINE uint16 IfxPsi5_getWriteFifoPointer(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
820 {
821 return psi5->RFC[channel].B.WRP;
822 }
823
824
825 IFX_INLINE uint16 IfxPsi5_getReadFifoPointer(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
826 {
827 return psi5->RFC[channel].B.REP;
828 }
829
830
831 IFX_INLINE void IfxPsi5_clearInterrupt(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel, IfxPsi5_InterruptSource interruptSource)
832 {
833 if (interruptSource < IfxPsi5_InterruptSource_wsi0)
834 {
835 psi5->INTCLRA[channel].U = (1 << interruptSource);
836 }
837 else
838 {
839 psi5->INTCLRB[channel].U = (1 << interruptSource);
840 }
841 }
842
843
844 IFX_INLINE volatile Ifx_SRC_SRCR *IfxPsi5_getSrcPointer(Ifx_PSI5 *psi5, IfxPsi5_InterruptServiceRequest intRequest)
845 {
846 IFX_UNUSED_PARAMETER(psi5);
847 return &MODULE_SRC.PSI5.PSI5[0].SR[intRequest];
848 }
849
850
851 IFX_INLINE void IfxPsi5_enableAllChannels(Ifx_PSI5 *psi5)
852 {
853 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
854 IfxScuWdt_clearCpuEndinit(passwd);
855 psi5->GCR.U = psi5->GCR.U | 0x000F001FU;
856 IfxScuWdt_setCpuEndinit(passwd);
857 }
858
859
860 IFX_INLINE void IfxPsi5_setReceiveFifoWarningLevel(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel, uint32 value)
861 {
862 psi5->RFC[channel].B.FWL = value;
863 }
864
865
866 IFX_INLINE void IfxPsi5_setReceiverControl(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel, IfxPsi5_ReceiverControlRegister rcr, uint32 value)
867 {
868 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
869 IfxScuWdt_clearCpuEndinit(passwd);
870
871 switch (rcr)
872 {
873 case IfxPsi5_ReceiverControlRegister_a:
874 psi5->CH[channel].RCRA.U = value;
875 break;
876 case IfxPsi5_ReceiverControlRegister_b:
877 psi5->CH[channel].RCRB.U = value;
878 break;
879 case IfxPsi5_ReceiverControlRegister_c:
880 psi5->CH[channel].RCRC.U = value;
881 break;
882 default:
883 break;
884 }
885
886 IfxScuWdt_setCpuEndinit(passwd);
887 }
888
889
890 IFX_INLINE void IfxPsi5_setFractionalDivider(Ifx_PSI5 *psi5, IfxPsi5_FractionalDividerRegister fcd, uint32 value)
891 {
892 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
893 IfxScuWdt_clearCpuEndinit(passwd);
894
895 switch (fcd)
896 {
897 case IfxPsi5_FractionalDividerRegister_normal:
898 psi5->FDR.I = value;
899 break;
900 case IfxPsi5_FractionalDividerRegister_lowbitrate:
901 psi5->FDRL.I = value;
902 break;
903 case IfxPsi5_FractionalDividerRegister_highbitrate:
904 psi5->FDRH.I = value;
905 break;
906 case IfxPsi5_FractionalDividerRegister_timestamp:
907 psi5->FDRT.I = value;
908 break;
909 default:
910 break;
911 }
912
913 IfxScuWdt_setCpuEndinit(passwd);
914 }
915
916
917 #endif /* IFXPSI5_H */
IfxPsi5_TriggerOutput_0
Triggered output line is TRIGO_0.
Definition: IfxPsi5.h:299
IfxPsi5_InterruptSource_rsi
Enable Interrupt Request RSI.
Definition: IfxPsi5.h:177
IfxPsi5_getStatusNbi
IFX_INLINE uint32 IfxPsi5_getStatusNbi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the NBI status register contents for a channel
Definition: IfxPsi5.h:672
IfxPsi5_DigitalInputFilterDepth_5
Digital input filter depth is 5.
Definition: IfxPsi5.h:120
IfxPsi5_InterruptNodePointer
IfxPsi5_InterruptNodePointer
specifies interrupt node pointer defined in MODULE_PSI5.INP[x].U
Definition: IfxPsi5.h:153
IfxPsi5_Trigger_5
trigger 5
Definition: IfxPsi5.h:292
IfxPsi5_TriggerOutput_7
Triggered output line is TRIGO_7.
Definition: IfxPsi5.h:306
IfxPsi5_InterruptSource_scri5
Enable Interrupt Request SCRI5.
Definition: IfxPsi5.h:217
IfxPsi5_TimestampRegister_c
Timestamp register C.
Definition: IfxPsi5.h:280
IfxPsi5_FractionalDividerRegister_normal
The Fractional Divider Register controls the input clock f_fracdiv.
Definition: IfxPsi5.h:332
IfxPsi5_DividerMode_normal
divider mode is normal
Definition: IfxPsi5.h:138
IfxPsi5_Trigger_0
trigger 0
Definition: IfxPsi5.h:287
IfxPsi5_ReceiverControlRegister_a
Receiver Control Register A configures the payload length of the up to 6 frames in the up to 6 slots...
Definition: IfxPsi5.h:363
IfxPsi5_InterruptRequest
IfxPsi5_InterruptRequest
Enable/Disable Interrupt Request.defined in MODULE_PSI5.INTENA[x].
Definition: IfxPsi5.h:167
IfxPsi5_Trigger_2
trigger 2
Definition: IfxPsi5.h:289
IfxPsi5_InterruptServiceRequest_7
Definition: IfxPsi5.h:350
IfxPsi5_SleepMode
IfxPsi5_SleepMode
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_PSI5.CLC.B.EDIS.
Definition: IfxPsi5.h:239
IfxPsi5_TriggerOutput
IfxPsi5_TriggerOutput
Output line selected by node Pointer defined in MODULE_PSI5.INP[x].U.
Definition: IfxPsi5.h:297
IfxPsi5_InterruptNodePointer_rdi
Interrupt Node Pointer for Interrupt RDI.
Definition: IfxPsi5.h:156
IfxPsi5_PinMap.h
PSI5 I/O map.
IfxPsi5_InterruptSource_wsi1
Enable Interrupt Request WSI1.
Definition: IfxPsi5.h:195
IfxPsi5_InterruptSource_scri3
Enable Interrupt Request SCRI3.
Definition: IfxPsi5.h:215
IfxPsi5_InterruptRequest_disabled
No Interrupt Request can be generated for respective source.
Definition: IfxPsi5.h:169
IfxPsi5_getStatusRdi
IFX_INLINE uint32 IfxPsi5_getStatusRdi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the RDI status register contents for a channel
Definition: IfxPsi5.h:684
IfxPsi5_Slot_1
slot 1
Definition: IfxPsi5.h:250
IfxPsi5_BaudRate_189
Fast 189 kHz clock.
Definition: IfxPsi5.h:90
IfxPsi5_AlternateInput_0
Alternate Input 0.
Definition: IfxPsi5.h:79
IfxPsi5_TriggerOutput_5
Triggered output line is TRIGO_5.
Definition: IfxPsi5.h:304
IfxPsi5_Trigger_1
trigger 1
Definition: IfxPsi5.h:288
IfxPsi5_InterruptSource_nbi
Enable Interrupt Request NBI.
Definition: IfxPsi5.h:181
IfxPsi5_InterruptStatusRegister
IfxPsi5_InterruptStatusRegister
Definition: IfxPsi5.h:353
IfxPsi5_InterruptSource_scri1
Enable Interrupt Request SCRI1.
Definition: IfxPsi5.h:213
IfxPsi5_AlternateInput_3
Alternate Input 3.
Definition: IfxPsi5.h:82
IfxPsi5_SuspendMode_soft
Soft Suspend.
Definition: IfxPsi5.h:263
IfxPsi5_CRCorParity_crc
CRC selection.
Definition: IfxPsi5.h:98
IfxPsi5_FractionalDividerRegister_highbitrate
The Fractional Divider Register for Higher Bit Rate contains the pre-divider that defines the time re...
Definition: IfxPsi5.h:335
IfxPsi5_Slot_2
slot 2
Definition: IfxPsi5.h:251
IfxPsi5_Rx_In::channelId
IfxPsi5_ChannelId channelId
Channel ID.
Definition: IfxPsi5_PinMap.h:59
IfxPsi5_getInterruptStatus
IFX_INLINE uint32 IfxPsi5_getInterruptStatus(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel, IfxPsi5_InterruptStatusRegister intStatusReg)
Definition: IfxPsi5.h:800
IfxPsi5_FrameExpectation_expected
Frame is expected.
Definition: IfxPsi5.h:148
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:140
IfxPsi5_Rx_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxPsi5_PinMap.h:61
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxPsi5_BaudRate_125
Slow 125 kHz clock.
Definition: IfxPsi5.h:89
IfxPsi5_setSleepMode
IFX_INLINE void IfxPsi5_setSleepMode(Ifx_PSI5 *psi5, IfxPsi5_SleepMode mode)
Sets the sensitivity of the module to sleep signal.
Definition: IfxPsi5.h:749
IfxPsi5_TimeBase
IfxPsi5_TimeBase
MODULE_PSI5.PGCx.TBS(x = 0,1,2),Time base.
Definition: IfxPsi5.h:268
IfxPsi5_getStatusNfi
IFX_INLINE uint32 IfxPsi5_getStatusNfi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the NFI status register contents for a channel
Definition: IfxPsi5.h:678
IfxPsi5_TimestampRegister
IfxPsi5_TimestampRegister
MODULE_PSI5.RCRCx.TSP(x = 0,1,2),MODULE_PSI5.RCRCx.TSF(x = 0,1,2)Timestamp register type...
Definition: IfxPsi5.h:276
IfxPsi5_DigitalInputFilterDepth_10
Digital input filter depth is 10.
Definition: IfxPsi5.h:125
IfxPsi5_InterruptSource_sdi4
Enable Interrupt Request SDI4.
Definition: IfxPsi5.h:204
IfxPsi5_InterruptSource_wsi3
Enable Interrupt Request WSI3.
Definition: IfxPsi5.h:197
IfxPsi5_AlternateInput_2
Alternate Input 2.
Definition: IfxPsi5.h:81
IfxPsi5_DividerMode
IfxPsi5_DividerMode
MODULE_PSI5.FDR.DM,Divider mode.
Definition: IfxPsi5.h:135
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:322
IfxPsi5_MessagingBits_absent
No messaging bits.
Definition: IfxPsi5.h:224
IfxPsi5_CRCorParity_parity
parity selection
Definition: IfxPsi5.h:97
IfxPsi5_SuspendMode_none
No suspend.
Definition: IfxPsi5.h:261
IfxPsi5_DigitalInputFilterDepth_1
Digital input filter depth is 1.
Definition: IfxPsi5.h:116
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxPsi5_Rx_In
RX pin mapping structure.
Definition: IfxPsi5_PinMap.h:56
IfxPsi5_isModuleSuspended
IFX_INLINE boolean IfxPsi5_isModuleSuspended(Ifx_PSI5 *psi5)
Returns the module&#39;s suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspende...
Definition: IfxPsi5.h:758
IfxSrc.h
SRC basic functionality.
IfxPsi5_ReceiveDataRegisterTimestamp
IfxPsi5_ReceiveDataRegisterTimestamp
MODULE_PSI5.RCRCx.TSR(x = 0,1,2),Timestamp select for receive data registers.
Definition: IfxPsi5.h:230
IfxPsi5_InterruptNodePointer_fwi
Interrupt Node Pointer for Interrupt FWI.
Definition: IfxPsi5.h:162
IfxPsi5_getStatusCrci
IFX_INLINE uint32 IfxPsi5_getStatusCrci(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the CRCI status register contents for a channel
Definition: IfxPsi5.h:660
IfxPsi5_FractionalDividerRegister_lowbitrate
The Fractional Divider Register for lower Bit Rate contains the pre-divider that defines the time res...
Definition: IfxPsi5.h:333
IfxPsi5_InterruptServiceRequest_2
Definition: IfxPsi5.h:345
IfxCpu_Intrinsics.h
IfxPsi5_Slot_4
slot 4
Definition: IfxPsi5.h:253
IfxPsi5_InterruptSource_sdi2
Enable Interrupt Request SDI2.
Definition: IfxPsi5.h:202
IfxPsi5_setSuspendMode
IFX_INLINE void IfxPsi5_setSuspendMode(Ifx_PSI5 *psi5, IfxPsi5_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and...
Definition: IfxPsi5.h:770
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxPsi5_Rx_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxPsi5_PinMap.h:60
IfxPsi5_InterruptSource_fwi
Enable Interrupt Request FWI.
Definition: IfxPsi5.h:184
IfxPsi5_InterruptSource_tsi
Enable Interrupt Request TSI.
Definition: IfxPsi5.h:189
IfxPsi5_TimestampRegister_b
Timestamp register B.
Definition: IfxPsi5.h:279
IfxPsi5_DigitalInputFilterDepth_12
Digital input filter depth is 12.
Definition: IfxPsi5.h:127
IfxPsi5_InterruptSource_sdi1
Enable Interrupt Request SDI1.
Definition: IfxPsi5.h:201
IfxPsi5_InterruptServiceRequest_1
Definition: IfxPsi5.h:344
IfxPsi5_InterruptSource_rmi
Enable Interrupt Request RMI.
Definition: IfxPsi5.h:186
IfxPort_setPinModeInput
IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode.
Definition: IfxPort.h:669
IfxPsi5_Trigger_3
trigger 3
Definition: IfxPsi5.h:290
IfxPsi5_InterruptSource_soi4
Enable Interrupt Request SOI4.
Definition: IfxPsi5.h:210
IfxPsi5_getStatusRmi
IFX_INLINE uint32 IfxPsi5_getStatusRmi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the RMI status register contents for a channel
Definition: IfxPsi5.h:690
IfxPsi5_clearInterrupt
IFX_INLINE void IfxPsi5_clearInterrupt(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel, IfxPsi5_InterruptSource interruptSource)
Clears the flag for a given interrupt source.
Definition: IfxPsi5.h:831
IfxPsi5_MessagingBits_present
2 messaging bits
Definition: IfxPsi5.h:225
IfxScuWdt.h
SCU basic functionality.
IfxPsi5_AlternateInput
IfxPsi5_AlternateInput
MODULE_PSI5.IOCRx.ALTI(x = 0,1,2),Alternate input selection.
Definition: IfxPsi5.h:77
IfxPsi5_Trigger_4
trigger 4
Definition: IfxPsi5.h:291
IfxPsi5_enableAllChannels
IFX_INLINE void IfxPsi5_enableAllChannels(Ifx_PSI5 *psi5)
Enabling all channels and error flags.
Definition: IfxPsi5.h:851
IfxPsi5_DigitalInputFilterDepth
IfxPsi5_DigitalInputFilterDepth
MODULE_PSI5.IOCRx.DEPTH(x = 0,1,2),Digital input filter depth.
Definition: IfxPsi5.h:113
IfxPsi5_InterruptSource_soi3
Enable Interrupt Request SOI3.
Definition: IfxPsi5.h:209
IfxPsi5_SuspendMode
IfxPsi5_SuspendMode
OCDS Suspend Control (OCDS.SUS)
Definition: IfxPsi5.h:259
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxPsi5_DigitalInputFilterDepth_4
Digital input filter depth is 4.
Definition: IfxPsi5.h:119
IfxPsi5_enableInterrupt
IFX_EXTERN void IfxPsi5_enableInterrupt(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel, IfxPsi5_InterruptSource interruptSource, IfxPsi5_InterruptRequest enabled)
enable/disable interrupt source
Definition: IfxPsi5.c:63
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxPsi5_getSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxPsi5_getSrcPointer(Ifx_PSI5 *psi5, IfxPsi5_InterruptServiceRequest intRequest)
Gives the pointer to the SRC register for respective PSI5 interrupt source.
Definition: IfxPsi5.h:844
IfxPsi5_clearAllInterrupt
IFX_INLINE void IfxPsi5_clearAllInterrupt(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel, IfxPsi5_InterruptStatusRegister intStatusReg, uint32 value)
Clears interrupt flag for all sources.
Definition: IfxPsi5.h:787
IfxPsi5_InterruptSource_soi2
Enable Interrupt Request SOI2.
Definition: IfxPsi5.h:208
IfxPsi5_TimestampRegister_a
Timestamp register A.
Definition: IfxPsi5.h:278
IfxPsi5_InterruptSource_rdi
Enable Interrupt Request RDI.
Definition: IfxPsi5.h:178
IfxPsi5_setReceiverControl
IFX_INLINE void IfxPsi5_setReceiverControl(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel, IfxPsi5_ReceiverControlRegister rcr, uint32 value)
Definition: IfxPsi5.h:866
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxPsi5_DividerMode_off
divider mode is off
Definition: IfxPsi5.h:140
IfxPsi5_setReceiveFifoWarningLevel
IFX_INLINE void IfxPsi5_setReceiveFifoWarningLevel(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel, uint32 value)
Configures FIFO and Ring Buffer operation.
Definition: IfxPsi5.h:860
IfxPsi5_DividerMode_spb
divider mode is off
Definition: IfxPsi5.h:137
IfxPsi5_TriggerType_external
External trigger.
Definition: IfxPsi5.h:314
IfxPsi5_DigitalInputFilterDepth_2
Digital input filter depth is 2.
Definition: IfxPsi5.h:117
IfxPsi5_InterruptNodePointer_tbi
Interrupt Node Pointer for Interrupt TBI.
Definition: IfxPsi5.h:159
IfxPsi5_initTxPin
IFX_INLINE void IfxPsi5_initTxPin(const IfxPsi5_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a TX output.
Definition: IfxPsi5.h:721
IfxPsi5_SuspendMode_hard
Hard Suspend.
Definition: IfxPsi5.h:262
IfxPsi5_AlternateInput_1
Alternate Input 1.
Definition: IfxPsi5.h:80
IfxPsi5_InterruptStatusRegister_a
Definition: IfxPsi5.h:355
IfxPsi5_InterruptServiceRequest_3
Definition: IfxPsi5.h:346
IfxPsi5_TriggerOutput_6
Triggered output line is TRIGO_6.
Definition: IfxPsi5.h:305
IfxPsi5_ChannelId
IfxPsi5_ChannelId
Channel Id.
Definition: IfxPsi5_cfg.h:90
IfxPsi5_ReceiveDataRegisterTimestamp_frame
Start of frame based timestamp SPTSC to be stored in RDRHC.
Definition: IfxPsi5.h:233
IfxPsi5_FrameExpectation_notExpected
No frame is expected.
Definition: IfxPsi5.h:147
IfxPsi5_InterruptSource_scri2
Enable Interrupt Request SCRI2.
Definition: IfxPsi5.h:214
IfxPsi5_Trigger
IfxPsi5_Trigger
MODULE_PSI5.PGCx.ETS(x = 0,1,2),Trigger Id.
Definition: IfxPsi5.h:285
IfxPsi5_CRCorParity
IfxPsi5_CRCorParity
MODULE_PSI5.RCRBx.CRCy(x = 0,1,2; y=0,1,2,3,4,5),CRC or parity selection.
Definition: IfxPsi5.h:95
IfxPsi5_Slot_0
slot 0
Definition: IfxPsi5.h:249
IfxPsi5_InterruptSource_soi5
Enable Interrupt Request SOI4.
Definition: IfxPsi5.h:211
IfxPsi5_InterruptSource_wsi0
Enable Interrupt Request WSi0.
Definition: IfxPsi5.h:194
IfxPsi5_InterruptNodePointer_rbi
Interrupt Node Pointer for Interrupt RBI.
Definition: IfxPsi5.h:157
IfxPsi5_enableModule
IFX_EXTERN void IfxPsi5_enableModule(Ifx_PSI5 *psi5)
Definition: IfxPsi5.c:99
IfxPsi5_DigitalInputFilterDepth_0
Digital input filter depth is 0.
Definition: IfxPsi5.h:115
IfxPsi5_Verbose
IfxPsi5_Verbose
MODULE_PSI5.RCRBx.VBSy(x = 0,1,2; y=0,1,2,3,4,5),Verbose mode.
Definition: IfxPsi5.h:320
IfxPsi5_InterruptNodePointer_tdi
Interrupt Node Pointer for Interrupt TDI.
Definition: IfxPsi5.h:158
IfxPsi5_TimeBase_internal
Internal time stamp clock.
Definition: IfxPsi5.h:270
IfxPsi5_InterruptSource_wsi4
Enable Interrupt Request WSI4.
Definition: IfxPsi5.h:198
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:249
IfxPsi5_ReceiverControlRegister
IfxPsi5_ReceiverControlRegister
Optiond for different Receive Control Registers(RCRA,RCRB,RCRC)
Definition: IfxPsi5.h:361
IfxPsi5_InterruptSource_scri0
Enable Interrupt Request SCRI0.
Definition: IfxPsi5.h:212
IfxPsi5_DigitalInputFilterDepth_9
Digital input filter depth is 9.
Definition: IfxPsi5.h:124
IfxPsi5_getReadFifoPointer
IFX_INLINE uint16 IfxPsi5_getReadFifoPointer(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
Getting the FIFO read pointer for channel x.
Definition: IfxPsi5.h:825
IfxPsi5_readReceiveFifoData
IFX_INLINE uint32 IfxPsi5_readReceiveFifoData(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
For a particular channel it gets the oldest data content of up to 32 received data frames...
Definition: IfxPsi5.h:813
IfxPsi5_InterruptSource
IfxPsi5_InterruptSource
enable the interrupt source of any interrupt of PSI5 Channel.specify in MODULE_PSI5.INTENA[x].U and MODULE_PSI5.INTENB[x].U
Definition: IfxPsi5.h:175
IfxPsi5_ReceiverControlRegister_c
Receiver Control Register C configures bit rate and time stamp sources.
Definition: IfxPsi5.h:365
IfxPsi5_DigitalInputFilterDepth_6
Digital input filter depth is 6.
Definition: IfxPsi5.h:121
IfxPsi5_InterruptSource_soi1
Enable Interrupt Request SOI1.
Definition: IfxPsi5.h:207
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:151
IfxPsi5_InterruptRequest_enabled
An Interrupt Request can be generated for source.
Definition: IfxPsi5.h:170
IfxPsi5_setInterruptNodePointer
IFX_INLINE void IfxPsi5_setInterruptNodePointer(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel, IfxPsi5_InterruptNodePointer nodePointer, IfxPsi5_TriggerOutput triggerOutputLine)
set respective service line for Interrupt source
Definition: IfxPsi5.h:731
IfxPsi5_InterruptNodePointer_sdi
Interrupt Node Pointer for Interrupt SDI.
Definition: IfxPsi5.h:161
IfxPsi5_getWriteFifoPointer
IFX_INLINE uint16 IfxPsi5_getWriteFifoPointer(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
Getting the FIFO write pointer for channel x.
Definition: IfxPsi5.h:819
IfxPsi5_DigitalInputFilterDepth_8
Digital input filter depth is 8.
Definition: IfxPsi5.h:123
IfxPsi5_InterruptSource_scri4
Enable Interrupt Request SCRI4.
Definition: IfxPsi5.h:216
IfxPsi5_ClockType_fastClock_189
Fast 189 kHz clock.
Definition: IfxPsi5.h:107
IfxPsi5_TriggerType_periodic
Periodic trigger.
Definition: IfxPsi5.h:313
IfxPsi5_cfg.h
PSI5 on-chip implementation data.
IfxPsi5_ReceiverControlRegister_b
Receiver Control Register B configures up to 6 frame types in the up to 6 slots.
Definition: IfxPsi5.h:364
IfxPsi5_InterruptServiceRequest_0
Definition: IfxPsi5.h:343
IfxPsi5_InterruptSource_toi
Enable Interrupt Request TOI.
Definition: IfxPsi5.h:191
IfxPsi5_InterruptSource_sdi5
Enable Interrupt Request SDI5.
Definition: IfxPsi5.h:205
IfxPsi5_InterruptServiceRequest_4
Definition: IfxPsi5.h:347
IfxPsi5_DigitalInputFilterDepth_14
Digital input filter depth is 14.
Definition: IfxPsi5.h:129
IfxPsi5_TriggerOutput_2
Triggered output line is TRIGO_2.
Definition: IfxPsi5.h:301
IfxPsi5_InterruptNodePointer_rsi
Interrupt Node Pointer for Interrupt RSI.
Definition: IfxPsi5.h:155
IfxPsi5_resetModule
IFX_EXTERN void IfxPsi5_resetModule(Ifx_PSI5 *psi5)
resets PSI5 kernel
Definition: IfxPsi5.c:81
IfxPsi5_FrameExpectation
IfxPsi5_FrameExpectation
MODULE_PSI5.RCRBx.FECy(x = 0,1,2; y=0,1,2,3,4,5),Frame expectation control.
Definition: IfxPsi5.h:145
IfxPsi5_setRxInput
IFX_INLINE void IfxPsi5_setRxInput(Ifx_PSI5_CH *psi5Ch, IfxPsi5_AlternateInput alternateInput)
Sets the alternate RX input.
Definition: IfxPsi5.h:740
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxPsi5_initRxPin
IFX_INLINE void IfxPsi5_initRxPin(const IfxPsi5_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a RX input.
Definition: IfxPsi5.h:708
IfxPsi5_TriggerOutput_1
Triggered output line is TRIGO_1.
Definition: IfxPsi5.h:300
IfxPsi5_DigitalInputFilterDepth_3
Digital input filter depth is 3.
Definition: IfxPsi5.h:118
IfxPsi5_setFractionalDivider
IFX_INLINE void IfxPsi5_setFractionalDivider(Ifx_PSI5 *psi5, IfxPsi5_FractionalDividerRegister fcd, uint32 value)
Definition: IfxPsi5.h:890
IfxPsi5_InterruptServiceRequest_6
Definition: IfxPsi5.h:349
IfxPsi5_TriggerOutput_3
Triggered output line is TRIGO_3.
Definition: IfxPsi5.h:302
IfxPsi5_InterruptSource_sdi0
Enable Interrupt Request SDI0.
Definition: IfxPsi5.h:200
IfxPsi5_MessagingBits
IfxPsi5_MessagingBits
MODULE_PSI5.RCRBx.MSGy(x = 0,1,2; y=0,1,2,3,4,5),Messaging bits presence.
Definition: IfxPsi5.h:222
IfxPsi5_InterruptSource_tei
Enable Interrupt Request TEI.
Definition: IfxPsi5.h:180
IfxPsi5_TimeBase_external
External GTM inputs.
Definition: IfxPsi5.h:271
IfxPsi5_FractionalDividerRegister
IfxPsi5_FractionalDividerRegister
Options for choosing different Fractional Divider Registers.
Definition: IfxPsi5.h:330
IfxPsi5_InterruptSource_rui
Enable Interrupt Request RUI.
Definition: IfxPsi5.h:185
IfxPsi5_Slot_3
slot 3
Definition: IfxPsi5.h:252
IfxPsi5_disableModule
IFX_EXTERN void IfxPsi5_disableModule(Ifx_PSI5 *psi5)
Disable PSI5 kernel.
Definition: IfxPsi5.c:54
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:81
IfxPsi5_DividerMode_fractional
divider mode is fractional
Definition: IfxPsi5.h:139
IfxPsi5_InterruptSource_nfi
Enable Interrupt Request NFI.
Definition: IfxPsi5.h:193
IfxPsi5_ClockType
IfxPsi5_ClockType
Clock type.
Definition: IfxPsi5.h:103
IfxPsi5_ClockType_timeStamp
Timestamp clock.
Definition: IfxPsi5.h:108
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:248
IfxPsi5_InterruptSource_crci
Enable Interrupt Request CRCI.
Definition: IfxPsi5.h:183
IfxPsi5_DigitalInputFilterDepth_15
Digital input filter depth is 15.
Definition: IfxPsi5.h:130
IfxPsi5_InterruptSource_wsi2
Enable Interrupt Request WSI2.
Definition: IfxPsi5.h:196
IfxPsi5_InterruptServiceRequest_5
Definition: IfxPsi5.h:348
IfxPsi5_TriggerOutput_4
Triggered output line is TRIGO_4.
Definition: IfxPsi5.h:303
IfxPsi5_DigitalInputFilterDepth_7
Digital input filter depth is 7.
Definition: IfxPsi5.h:122
IfxPsi5_SleepMode_disable
disables sleep mode
Definition: IfxPsi5.h:242
IfxPsi5_InterruptSource_tpi
Enable Interrupt Request TPI.
Definition: IfxPsi5.h:187
IfxPsi5_FractionalDividerRegister_timestamp
The PSI5 Module Time Stamp Predivider Register contains the pre-divider that defines the time resolut...
Definition: IfxPsi5.h:337
IfxPsi5_TriggerType
IfxPsi5_TriggerType
Trigger type.
Definition: IfxPsi5.h:311
IfxPsi5_BaudRate
IfxPsi5_BaudRate
MODULE_PSI5.RCRCx.BRS(x = 0,1,2),Baud rate selection.
Definition: IfxPsi5.h:87
IfxPsi5_Slot_5
slot 5
Definition: IfxPsi5.h:254
IfxPsi5_DigitalInputFilterDepth_13
Digital input filter depth is 13.
Definition: IfxPsi5.h:128
IfxPsi5_InterruptSource_wsi5
Enable Interrupt Request WSI.
Definition: IfxPsi5.h:199
IfxPsi5_InterruptSource_tsoi
Enable Interrupt Request TSOI.
Definition: IfxPsi5.h:190
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxPsi5_InterruptServiceRequest
IfxPsi5_InterruptServiceRequest
Definition: IfxPsi5.h:341
IfxPsi5_InterruptSource_mei
Enable Interrupt Request MEI.
Definition: IfxPsi5.h:182
IfxPsi5_InterruptSource_sdi3
Enable Interrupt Request SDI3.
Definition: IfxPsi5.h:203
IfxPsi5_DigitalInputFilterDepth_11
Digital input filter depth is 11.
Definition: IfxPsi5.h:126
IfxPsi5_ReceiveDataRegisterTimestamp_pulse
Pulse based timestamp SPTSC to be stored in RDRHC.
Definition: IfxPsi5.h:232
IfxPsi5_InterruptNodePointer_erri
Interrupt Node Pointer for Interrupt ERRI.
Definition: IfxPsi5.h:160
IfxPsi5_getStatusTei
IFX_INLINE uint32 IfxPsi5_getStatusTei(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the TEI status register contents for a channel
Definition: IfxPsi5.h:702
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
IfxPsi5_InterruptSource_tooi
Enable Interrupt Request TOOI.
Definition: IfxPsi5.h:192
IfxPsi5_Tx_Out
TX pin mapping structure.
Definition: IfxPsi5_PinMap.h:65
IfxPsi5_InterruptSource_tpoi
Enable Interrupt Request TPOI.
Definition: IfxPsi5.h:188
IfxPsi5_Verbose_off
Verbose mode is turned off.
Definition: IfxPsi5.h:322
IfxPsi5_getStatusRsi
IFX_INLINE uint32 IfxPsi5_getStatusRsi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the RSI status register contents for a channel
Definition: IfxPsi5.h:696
IfxPsi5_InterruptStatusRegister_b
Definition: IfxPsi5.h:356
IfxPsi5_Rx_In::module
Ifx_PSI5 * module
Base address.
Definition: IfxPsi5_PinMap.h:58
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:675
IfxPsi5_SleepMode_enable
enables sleep mode
Definition: IfxPsi5.h:241
IfxPsi5_getStatusMei
IFX_INLINE uint32 IfxPsi5_getStatusMei(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the MEI status register contents for a channel
Definition: IfxPsi5.h:666
IfxPsi5_ClockType_fracDiv
Fractional Divide clock.
Definition: IfxPsi5.h:105
IfxPsi5_InterruptSource_soi0
Enable Interrupt Request SOI0.
Definition: IfxPsi5.h:206
IfxPsi5_Slot
IfxPsi5_Slot
MODULE_PSI5.RDRHx.SC(x = 0-2),Slot Id.
Definition: IfxPsi5.h:247
IfxPsi5_getReceiveDataRegisterLow
IFX_INLINE uint32 IfxPsi5_getReceiveDataRegisterLow(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
Definition: IfxPsi5.h:781
IfxPsi5_ClockType_slowClock_125
Slow 125 kHz clock.
Definition: IfxPsi5.h:106
IfxPsi5_Tx_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxPsi5_PinMap.h:70
IfxPsi5_InterruptSource_rbi
Enable Interrupt Request RBI.
Definition: IfxPsi5.h:179
IfxPsi5_TriggerType_bypass
Bypassed trigger.
Definition: IfxPsi5.h:315
IfxPsi5_Verbose_on
Verbose mode is turned on.
Definition: IfxPsi5.h:323


iLLD_TC38A: IfxPsi5_PinMap.c Source File

  • _PinMap
IfxPsi5_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxPsi5_PinMap.c
3 * \brief PSI5 I/O map
4 * \ingroup IfxLld_Psi5
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "IfxPsi5_PinMap.h"
44
45 IfxPsi5_Rx_In IfxPsi5_RX0A_P00_1_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P00, 1}, Ifx_RxSel_a};
46 IfxPsi5_Rx_In IfxPsi5_RX0B_P02_3_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P02, 3}, Ifx_RxSel_b};
47 IfxPsi5_Rx_In IfxPsi5_RX0C_P33_1_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P33, 1}, Ifx_RxSel_c};
48 IfxPsi5_Rx_In IfxPsi5_RX1A_P00_3_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P00, 3}, Ifx_RxSel_a};
49 IfxPsi5_Rx_In IfxPsi5_RX1B_P02_5_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P02, 5}, Ifx_RxSel_b};
50 IfxPsi5_Rx_In IfxPsi5_RX1C_P33_3_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P33, 3}, Ifx_RxSel_c};
51 IfxPsi5_Rx_In IfxPsi5_RX2A_P00_5_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P00, 5}, Ifx_RxSel_a};
52 IfxPsi5_Rx_In IfxPsi5_RX2B_P02_7_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P02, 7}, Ifx_RxSel_b};
53 IfxPsi5_Rx_In IfxPsi5_RX2C_P33_5_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P33, 5}, Ifx_RxSel_c};
54 IfxPsi5_Rx_In IfxPsi5_RX3A_P13_10_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_3, {&MODULE_P13,10}, Ifx_RxSel_a};
55 IfxPsi5_Rx_In IfxPsi5_RX3B_P13_13_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_3, {&MODULE_P13,13}, Ifx_RxSel_b};
56 IfxPsi5_Rx_In IfxPsi5_RX3C_P10_6_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_3, {&MODULE_P10, 6}, Ifx_RxSel_c};
57 IfxPsi5_Tx_Out IfxPsi5_TX0_P00_2_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt4};
58 IfxPsi5_Tx_Out IfxPsi5_TX0_P02_2_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt4};
59 IfxPsi5_Tx_Out IfxPsi5_TX0_P33_2_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt4};
60 IfxPsi5_Tx_Out IfxPsi5_TX1_P00_4_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt4};
61 IfxPsi5_Tx_Out IfxPsi5_TX1_P02_6_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt4};
62 IfxPsi5_Tx_Out IfxPsi5_TX1_P33_4_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt4};
63 IfxPsi5_Tx_Out IfxPsi5_TX2_P00_6_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt4};
64 IfxPsi5_Tx_Out IfxPsi5_TX2_P02_8_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt4};
65 IfxPsi5_Tx_Out IfxPsi5_TX2_P33_6_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt4};
66 IfxPsi5_Tx_Out IfxPsi5_TX3_P10_5_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_3, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt7};
67 IfxPsi5_Tx_Out IfxPsi5_TX3_P13_11_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_3, {&MODULE_P13,11}, IfxPort_OutputIdx_alt4};
68 IfxPsi5_Tx_Out IfxPsi5_TX3_P13_15_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_3, {&MODULE_P13,15}, IfxPort_OutputIdx_alt4};
69
70
71 const IfxPsi5_Rx_In *IfxPsi5_Rx_In_pinTable[IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_RX_IN_NUM_ITEMS] = {
72 {
73 {
74 &IfxPsi5_RX0A_P00_1_IN,
75 &IfxPsi5_RX0B_P02_3_IN,
76 &IfxPsi5_RX0C_P33_1_IN
77 },
78 {
79 &IfxPsi5_RX1A_P00_3_IN,
80 &IfxPsi5_RX1B_P02_5_IN,
81 &IfxPsi5_RX1C_P33_3_IN
82 },
83 {
84 &IfxPsi5_RX2A_P00_5_IN,
85 &IfxPsi5_RX2B_P02_7_IN,
86 &IfxPsi5_RX2C_P33_5_IN
87 },
88 {
89 &IfxPsi5_RX3A_P13_10_IN,
90 &IfxPsi5_RX3B_P13_13_IN,
91 &IfxPsi5_RX3C_P10_6_IN
92 }
93 }
94 };
95
96 const IfxPsi5_Tx_Out *IfxPsi5_Tx_Out_pinTable[IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS] = {
97 {
98 {
99 &IfxPsi5_TX0_P00_2_OUT,
100 &IfxPsi5_TX0_P02_2_OUT,
101 &IfxPsi5_TX0_P33_2_OUT
102 },
103 {
104 &IfxPsi5_TX1_P00_4_OUT,
105 &IfxPsi5_TX1_P02_6_OUT,
106 &IfxPsi5_TX1_P33_4_OUT
107 },
108 {
109 &IfxPsi5_TX2_P00_6_OUT,
110 &IfxPsi5_TX2_P02_8_OUT,
111 &IfxPsi5_TX2_P33_6_OUT
112 },
113 {
114 &IfxPsi5_TX3_P10_5_OUT,
115 &IfxPsi5_TX3_P13_11_OUT,
116 &IfxPsi5_TX3_P13_15_OUT
117 }
118 }
119 };
IfxPsi5_Rx_In_pinTable
const IfxPsi5_Rx_In * IfxPsi5_Rx_In_pinTable[IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_RX_IN_NUM_ITEMS]
Definition: IfxPsi5_PinMap.c:71
IfxPsi5_PinMap.h
PSI5 I/O map.
IfxPsi5_ChannelId_0
Specifies PSI5 channel 0.
Definition: IfxPsi5_cfg.h:93
IfxPsi5_RX1C_P33_3_IN
IfxPsi5_Rx_In IfxPsi5_RX1C_P33_3_IN
Definition: IfxPsi5_PinMap.c:50
IfxPsi5_TX0_P02_2_OUT
IfxPsi5_Tx_Out IfxPsi5_TX0_P02_2_OUT
Definition: IfxPsi5_PinMap.c:58
IfxPsi5_TX3_P13_15_OUT
IfxPsi5_Tx_Out IfxPsi5_TX3_P13_15_OUT
Definition: IfxPsi5_PinMap.c:68
IFXPSI5_PINMAP_NUM_CHANNELS
#define IFXPSI5_PINMAP_NUM_CHANNELS
Definition: IfxPsi5_PinMap.h:100
IfxPsi5_TX0_P33_2_OUT
IfxPsi5_Tx_Out IfxPsi5_TX0_P33_2_OUT
Definition: IfxPsi5_PinMap.c:59
Ifx_RxSel_a
Definition: Ifx_Types.h:129
IfxPsi5_Rx_In
RX pin mapping structure.
Definition: IfxPsi5_PinMap.h:56
IfxPsi5_RX3C_P10_6_IN
IfxPsi5_Rx_In IfxPsi5_RX3C_P10_6_IN
Definition: IfxPsi5_PinMap.c:56
IfxPsi5_RX1A_P00_3_IN
IfxPsi5_Rx_In IfxPsi5_RX1A_P00_3_IN
Definition: IfxPsi5_PinMap.c:48
Ifx_RxSel_b
Definition: Ifx_Types.h:130
IfxPsi5_RX0B_P02_3_IN
IfxPsi5_Rx_In IfxPsi5_RX0B_P02_3_IN
Definition: IfxPsi5_PinMap.c:46
IfxPsi5_TX1_P33_4_OUT
IfxPsi5_Tx_Out IfxPsi5_TX1_P33_4_OUT
Definition: IfxPsi5_PinMap.c:62
IfxPsi5_TX3_P13_11_OUT
IfxPsi5_Tx_Out IfxPsi5_TX3_P13_11_OUT
Definition: IfxPsi5_PinMap.c:67
IfxPsi5_ChannelId_2
Specifies PSI5 channel 2.
Definition: IfxPsi5_cfg.h:95
IfxPsi5_RX3B_P13_13_IN
IfxPsi5_Rx_In IfxPsi5_RX3B_P13_13_IN
Definition: IfxPsi5_PinMap.c:55
IfxPsi5_TX2_P02_8_OUT
IfxPsi5_Tx_Out IfxPsi5_TX2_P02_8_OUT
Definition: IfxPsi5_PinMap.c:64
Ifx_RxSel_c
Definition: Ifx_Types.h:131
IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS
#define IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS
Definition: IfxPsi5_PinMap.h:102
IfxPsi5_ChannelId_3
Specifies PSI5 channel 3.
Definition: IfxPsi5_cfg.h:96
IfxPsi5_TX1_P00_4_OUT
IfxPsi5_Tx_Out IfxPsi5_TX1_P00_4_OUT
Definition: IfxPsi5_PinMap.c:60
IfxPsi5_RX0A_P00_1_IN
IfxPsi5_Rx_In IfxPsi5_RX0A_P00_1_IN
Definition: IfxPsi5_PinMap.c:45
IfxPsi5_TX2_P00_6_OUT
IfxPsi5_Tx_Out IfxPsi5_TX2_P00_6_OUT
Definition: IfxPsi5_PinMap.c:63
IfxPsi5_RX0C_P33_1_IN
IfxPsi5_Rx_In IfxPsi5_RX0C_P33_1_IN
Definition: IfxPsi5_PinMap.c:47
IfxPsi5_TX0_P00_2_OUT
IfxPsi5_Tx_Out IfxPsi5_TX0_P00_2_OUT
Definition: IfxPsi5_PinMap.c:57
IfxPort_OutputIdx_alt4
Definition: IfxPort.h:132
IfxPort_OutputIdx_alt7
Definition: IfxPort.h:135
IfxPsi5_RX2B_P02_7_IN
IfxPsi5_Rx_In IfxPsi5_RX2B_P02_7_IN
Definition: IfxPsi5_PinMap.c:52
IFXPSI5_PINMAP_RX_IN_NUM_ITEMS
#define IFXPSI5_PINMAP_RX_IN_NUM_ITEMS
Definition: IfxPsi5_PinMap.h:101
IFXPSI5_PINMAP_NUM_MODULES
#define IFXPSI5_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxPsi5_PinMap.h:99
IfxPsi5_RX2A_P00_5_IN
IfxPsi5_Rx_In IfxPsi5_RX2A_P00_5_IN
Definition: IfxPsi5_PinMap.c:51
IfxPsi5_ChannelId_1
Specifies PSI5 channel 1.
Definition: IfxPsi5_cfg.h:94
IfxPsi5_RX3A_P13_10_IN
IfxPsi5_Rx_In IfxPsi5_RX3A_P13_10_IN
Definition: IfxPsi5_PinMap.c:54
IfxPsi5_RX1B_P02_5_IN
IfxPsi5_Rx_In IfxPsi5_RX1B_P02_5_IN
Definition: IfxPsi5_PinMap.c:49
IfxPsi5_TX1_P02_6_OUT
IfxPsi5_Tx_Out IfxPsi5_TX1_P02_6_OUT
Definition: IfxPsi5_PinMap.c:61
IfxPsi5_Tx_Out
TX pin mapping structure.
Definition: IfxPsi5_PinMap.h:65
IfxPsi5_TX3_P10_5_OUT
IfxPsi5_Tx_Out IfxPsi5_TX3_P10_5_OUT
Definition: IfxPsi5_PinMap.c:66
IfxPsi5_RX2C_P33_5_IN
IfxPsi5_Rx_In IfxPsi5_RX2C_P33_5_IN
Definition: IfxPsi5_PinMap.c:53
IfxPsi5_TX2_P33_6_OUT
IfxPsi5_Tx_Out IfxPsi5_TX2_P33_6_OUT
Definition: IfxPsi5_PinMap.c:65
IfxPsi5_Tx_Out_pinTable
const IfxPsi5_Tx_Out * IfxPsi5_Tx_Out_pinTable[IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS]
Definition: IfxPsi5_PinMap.c:96


iLLD_TC38A: IfxPsi5_PinMap.h Source File

  • _PinMap
IfxPsi5_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxPsi5_PinMap.h
3 * \brief PSI5 I/O map
4 * \ingroup IfxLld_Psi5
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Psi5_pinmap PSI5 Pin Mapping
42 * \ingroup IfxLld_Psi5
43 */
44
45 #ifndef IFXPSI5_PINMAP_H
46 #define IFXPSI5_PINMAP_H
47
48 #include <IfxPsi5_reg.h>
49 #include <_Impl/IfxPsi5_cfg.h>
50 #include <Port/Std/IfxPort.h>
51
52 /** \addtogroup IfxLld_Psi5_pinmap
53 * \{ */
54
55 /** \brief RX pin mapping structure */
56 typedef const struct
57 {
58 Ifx_PSI5* module; /**< \brief Base address */
59 IfxPsi5_ChannelId channelId; /**< \brief Channel ID */
60 IfxPort_Pin pin; /**< \brief Port pin */
61 Ifx_RxSel select; /**< \brief Input multiplexer value */
62 } IfxPsi5_Rx_In;
63
64 /** \brief TX pin mapping structure */
65 typedef const struct
66 {
67 Ifx_PSI5* module; /**< \brief Base address */
68 IfxPsi5_ChannelId channelId; /**< \brief Channel ID */
69 IfxPort_Pin pin; /**< \brief Port pin */
70 IfxPort_OutputIdx select; /**< \brief Port control code */
71 } IfxPsi5_Tx_Out;
72
73 IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX0A_P00_1_IN; /**< \brief RXD inputs (receive data) channel 0 */
74 IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX0B_P02_3_IN; /**< \brief RXD inputs (receive data) channel 0 */
75 IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX0C_P33_1_IN; /**< \brief RXD inputs (receive data) channel 0 */
76 IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX1A_P00_3_IN; /**< \brief RXD inputs (receive data) channel 1 */
77 IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX1B_P02_5_IN; /**< \brief RXD inputs (receive data) channel 1 */
78 IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX1C_P33_3_IN; /**< \brief RXD inputs (receive data) channel 1 */
79 IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX2A_P00_5_IN; /**< \brief RXD inputs (receive data) channel 2 */
80 IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX2B_P02_7_IN; /**< \brief RXD inputs (receive data) channel 2 */
81 IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX2C_P33_5_IN; /**< \brief RXD inputs (receive data) channel 2 */
82 IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX3A_P13_10_IN; /**< \brief RXD inputs (receive data) channel 3 */
83 IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX3B_P13_13_IN; /**< \brief RXD inputs (receive data) channel 3 */
84 IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX3C_P10_6_IN; /**< \brief RXD inputs (receive data) channel 3 */
85 IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX0_P00_2_OUT; /**< \brief TXD outputs (send data) */
86 IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX0_P02_2_OUT; /**< \brief TXD outputs (send data) */
87 IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX0_P33_2_OUT; /**< \brief TXD outputs (send data) */
88 IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX1_P00_4_OUT; /**< \brief TXD outputs (send data) */
89 IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX1_P02_6_OUT; /**< \brief TXD outputs (send data) */
90 IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX1_P33_4_OUT; /**< \brief TXD outputs (send data) */
91 IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX2_P00_6_OUT; /**< \brief TXD outputs (send data) */
92 IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX2_P02_8_OUT; /**< \brief TXD outputs (send data) */
93 IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX2_P33_6_OUT; /**< \brief TXD outputs (send data) */
94 IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX3_P10_5_OUT; /**< \brief TXD outputs (send data) */
95 IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX3_P13_11_OUT; /**< \brief TXD outputs (send data) */
96 IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX3_P13_15_OUT; /**< \brief TXD outputs (send data) */
97
98 /** \brief Table dimensions */
99 #define IFXPSI5_PINMAP_NUM_MODULES 1
100 #define IFXPSI5_PINMAP_NUM_CHANNELS 4
101 #define IFXPSI5_PINMAP_RX_IN_NUM_ITEMS 3
102 #define IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS 3
103
104
105 /** \brief IfxPsi5_Rx_In table */
106 IFX_EXTERN const IfxPsi5_Rx_In *IfxPsi5_Rx_In_pinTable[IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_RX_IN_NUM_ITEMS];
107
108 /** \brief IfxPsi5_Tx_Out table */
109 IFX_EXTERN const IfxPsi5_Tx_Out *IfxPsi5_Tx_Out_pinTable[IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS];
110
111 /** \} */
112
113 #endif /* IFXPSI5_PINMAP_H */
IfxPsi5_Rx_In_pinTable
IFX_EXTERN const IfxPsi5_Rx_In * IfxPsi5_Rx_In_pinTable[IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_RX_IN_NUM_ITEMS]
IfxPsi5_Rx_In table.
Definition: IfxPsi5_PinMap.h:106
IfxPsi5_RX2B_P02_7_IN
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX2B_P02_7_IN
RXD inputs (receive data) channel 2.
Definition: IfxPsi5_PinMap.h:80
IfxPsi5_TX3_P13_15_OUT
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX3_P13_15_OUT
TXD outputs (send data)
Definition: IfxPsi5_PinMap.h:96
IfxPsi5_RX3A_P13_10_IN
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX3A_P13_10_IN
RXD inputs (receive data) channel 3.
Definition: IfxPsi5_PinMap.h:82
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:126
IFXPSI5_PINMAP_NUM_CHANNELS
#define IFXPSI5_PINMAP_NUM_CHANNELS
Definition: IfxPsi5_PinMap.h:100
IfxPsi5_Rx_In::channelId
IfxPsi5_ChannelId channelId
Channel ID.
Definition: IfxPsi5_PinMap.h:59
IfxPsi5_Rx_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxPsi5_PinMap.h:61
IfxPsi5_RX2A_P00_5_IN
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX2A_P00_5_IN
RXD inputs (receive data) channel 2.
Definition: IfxPsi5_PinMap.h:79
IfxPsi5_TX3_P10_5_OUT
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX3_P10_5_OUT
TXD outputs (send data)
Definition: IfxPsi5_PinMap.h:94
IfxPsi5_RX1A_P00_3_IN
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX1A_P00_3_IN
RXD inputs (receive data) channel 1.
Definition: IfxPsi5_PinMap.h:76
IfxPsi5_Rx_In
RX pin mapping structure.
Definition: IfxPsi5_PinMap.h:56
IfxPsi5_Rx_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxPsi5_PinMap.h:60
IfxPsi5_RX1C_P33_3_IN
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX1C_P33_3_IN
RXD inputs (receive data) channel 1.
Definition: IfxPsi5_PinMap.h:78
IfxPsi5_TX0_P02_2_OUT
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX0_P02_2_OUT
TXD outputs (send data)
Definition: IfxPsi5_PinMap.h:86
IfxPsi5_TX2_P02_8_OUT
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX2_P02_8_OUT
TXD outputs (send data)
Definition: IfxPsi5_PinMap.h:92
IfxPsi5_TX1_P33_4_OUT
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX1_P33_4_OUT
TXD outputs (send data)
Definition: IfxPsi5_PinMap.h:90
IfxPsi5_RX3C_P10_6_IN
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX3C_P10_6_IN
RXD inputs (receive data) channel 3.
Definition: IfxPsi5_PinMap.h:84
IfxPsi5_RX2C_P33_5_IN
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX2C_P33_5_IN
RXD inputs (receive data) channel 2.
Definition: IfxPsi5_PinMap.h:81
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxPsi5_TX1_P00_4_OUT
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX1_P00_4_OUT
TXD outputs (send data)
Definition: IfxPsi5_PinMap.h:88
IfxPsi5_RX0B_P02_3_IN
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX0B_P02_3_IN
RXD inputs (receive data) channel 0.
Definition: IfxPsi5_PinMap.h:74
IfxPsi5_TX0_P00_2_OUT
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX0_P00_2_OUT
TXD outputs (send data)
Definition: IfxPsi5_PinMap.h:85
IfxPsi5_ChannelId
IfxPsi5_ChannelId
Channel Id.
Definition: IfxPsi5_cfg.h:90
IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS
#define IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS
Definition: IfxPsi5_PinMap.h:102
IfxPsi5_TX1_P02_6_OUT
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX1_P02_6_OUT
TXD outputs (send data)
Definition: IfxPsi5_PinMap.h:89
IfxPsi5_RX3B_P13_13_IN
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX3B_P13_13_IN
RXD inputs (receive data) channel 3.
Definition: IfxPsi5_PinMap.h:83
IfxPsi5_TX2_P33_6_OUT
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX2_P33_6_OUT
TXD outputs (send data)
Definition: IfxPsi5_PinMap.h:93
IfxPsi5_TX2_P00_6_OUT
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX2_P00_6_OUT
TXD outputs (send data)
Definition: IfxPsi5_PinMap.h:91
IfxPsi5_cfg.h
PSI5 on-chip implementation data.
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:246
Ifx_RxSel
Ifx_RxSel
input multiplexer definition used in PinMaps
Definition: Ifx_Types.h:127
IfxPsi5_RX1B_P02_5_IN
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX1B_P02_5_IN
RXD inputs (receive data) channel 1.
Definition: IfxPsi5_PinMap.h:77
IfxPsi5_TX0_P33_2_OUT
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX0_P33_2_OUT
TXD outputs (send data)
Definition: IfxPsi5_PinMap.h:87
IfxPsi5_RX0A_P00_1_IN
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX0A_P00_1_IN
RXD inputs (receive data) channel 0.
Definition: IfxPsi5_PinMap.h:73
IfxPsi5_RX0C_P33_1_IN
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX0C_P33_1_IN
RXD inputs (receive data) channel 0.
Definition: IfxPsi5_PinMap.h:75
IFXPSI5_PINMAP_RX_IN_NUM_ITEMS
#define IFXPSI5_PINMAP_RX_IN_NUM_ITEMS
Definition: IfxPsi5_PinMap.h:101
IFXPSI5_PINMAP_NUM_MODULES
#define IFXPSI5_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxPsi5_PinMap.h:99
IfxPsi5_TX3_P13_11_OUT
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX3_P13_11_OUT
TXD outputs (send data)
Definition: IfxPsi5_PinMap.h:95
IfxPsi5_Tx_Out_pinTable
IFX_EXTERN const IfxPsi5_Tx_Out * IfxPsi5_Tx_Out_pinTable[IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS]
IfxPsi5_Tx_Out table.
Definition: IfxPsi5_PinMap.h:109
IfxPsi5_Tx_Out
TX pin mapping structure.
Definition: IfxPsi5_PinMap.h:65
IfxPsi5_Rx_In::module
Ifx_PSI5 * module
Base address.
Definition: IfxPsi5_PinMap.h:58
IfxPsi5_Tx_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxPsi5_PinMap.h:70
IfxPort.h
PORT basic functionality.


iLLD_TC38A: IfxPsi5_Psi5.c Source File

  • Psi5
  • Psi5
IfxPsi5_Psi5.c
Go to the documentation of this file.
1 /**
2 * \file IfxPsi5_Psi5.c
3 * \brief PSI5 PSI5 details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 */
43
44 /******************************************************************************/
45 /*----------------------------------Includes----------------------------------*/
46 /******************************************************************************/
47
48 #include "IfxPsi5_Psi5.h"
49
50 /******************************************************************************/
51 /*-------------------------Function Implementations---------------------------*/
52 /******************************************************************************/
53
54 void IfxPsi5_Psi5_deInitModule(IfxPsi5_Psi5 *psi5)
55 {
56 Ifx_PSI5 *psi5SFR = psi5->psi5;
57
58 IfxPsi5_Psi5_resetModule(psi5SFR);
59 }
60
61
62 void IfxPsi5_Psi5_enableModule(Ifx_PSI5 *psi5)
63 {
64 psi5->CLC.U = 0x00000000;
65 }
66
67
68 uint32 IfxPsi5_Psi5_getFracDivClock(Ifx_PSI5 *psi5)
69 {
70 uint32 result;
71 uint32 fPsi5 = IfxScuCcu_getSpbFrequency();
72
73 switch (psi5->FDR.B.DM)
74 {
75 case IfxPsi5_DividerMode_spb:
76 result = fPsi5;
77 break;
78 case IfxPsi5_DividerMode_normal:
79 result = fPsi5 / (IFXPSI5_STEP_RANGE - psi5->FDR.B.STEP);
80 break;
81 case IfxPsi5_DividerMode_fractional:
82 result = (fPsi5 * IFXPSI5_STEP_RANGE) / psi5->FDR.B.STEP;
83 break;
84 case IfxPsi5_DividerMode_off:
85 result = 0;
86 break;
87 default:
88 result = 0;
89 }
90
91 return result;
92 }
93
94
95 boolean IfxPsi5_Psi5_initChannel(IfxPsi5_Psi5_Channel *channel, const IfxPsi5_Psi5_ChannelConfig *config)
96 {
97 uint32 wdtIdx;
98 boolean status = TRUE;
99
100 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
101
102 IfxScuWdt_clearCpuEndinit(passwd);
103
104 Ifx_PSI5 *psi5 = config->module->psi5;
105 Ifx_PSI5_CH *psi5Ch = &psi5->CH[config->channelId];
106 channel->channel = psi5Ch;
107 channel->module = (IfxPsi5_Psi5 *)config->module;
108 channel->channelId = config->channelId;
109
110 Ifx_PSI5_CH_PGC tempPGC;
111 tempPGC.B.PLEN = config->pulseGeneration.pulseLength;
112 tempPGC.B.DEL = config->pulseGeneration.delayLength;
113 tempPGC.B.TBS = config->pulseGeneration.timeBaseSelect;
114 tempPGC.B.ETB = config->pulseGeneration.externalTimeBaseSelect;
115 tempPGC.B.ETS = config->pulseGeneration.externalTriggerSelect;
116 tempPGC.B.BOT = config->pulseGeneration.blankoutTime;
117
118 switch (config->pulseGeneration.periodicOrExternalOrBypass)
119 {
120 case IfxPsi5_TriggerType_periodic:
121 tempPGC.B.PTE = TRUE;
122 tempPGC.B.ETE = FALSE;
123 tempPGC.B.BYP = FALSE;
124 break;
125
126 case IfxPsi5_TriggerType_external:
127 tempPGC.B.PTE = FALSE;
128 tempPGC.B.ETE = TRUE;
129 tempPGC.B.BYP = FALSE;
130 break;
131
132 case IfxPsi5_TriggerType_bypass:
133 tempPGC.B.PTE = FALSE;
134 tempPGC.B.ETE = FALSE;
135 tempPGC.B.BYP = TRUE;
136 break;
137 }
138
139 psi5Ch->PGC.U = tempPGC.U;
140
141 Ifx_PSI5_CH_CTV tempCTV;
142 tempCTV.B.CTV = config->channelTrigger.channelTriggerValue;
143 tempCTV.B.CTC = config->channelTrigger.channelTriggerCounter;
144 psi5Ch->CTV.U = tempCTV.U;
145
146 for (wdtIdx = 0; wdtIdx < IFXPSI5_NUM_WDTS; wdtIdx++)
147 {
148 psi5Ch->WDT[wdtIdx].U = config->watchdogTimerLimit[wdtIdx];
149 }
150
151 Ifx_PSI5_CH_RCRA tempRCRA;
152 tempRCRA.B.PDL0 = config->receiveControl.payloadLength[0];
153 tempRCRA.B.PDL1 = config->receiveControl.payloadLength[1];
154 tempRCRA.B.PDL2 = config->receiveControl.payloadLength[2];
155 tempRCRA.B.PDL3 = config->receiveControl.payloadLength[3];
156 tempRCRA.B.PDL4 = config->receiveControl.payloadLength[4];
157 tempRCRA.B.PDL5 = config->receiveControl.payloadLength[5];
158 tempRCRA.B.ASYN = config->receiveControl.asynchronousModeSelected;
159 tempRCRA.B.AVBS = config->receiveControl.verboseForAsynchronousMode;
160 psi5Ch->RCRA.U = tempRCRA.U;
161
162 Ifx_PSI5_CH_RCRB tempRCRB;
163 tempRCRB.B.MSG0 = config->receiveControl.messagingBitsPresence[0];
164 tempRCRB.B.MSG1 = config->receiveControl.messagingBitsPresence[1];
165 tempRCRB.B.MSG2 = config->receiveControl.messagingBitsPresence[2];
166 tempRCRB.B.MSG3 = config->receiveControl.messagingBitsPresence[3];
167 tempRCRB.B.MSG4 = config->receiveControl.messagingBitsPresence[4];
168 tempRCRB.B.MSG5 = config->receiveControl.messagingBitsPresence[5];
169 tempRCRB.B.CRC0 = config->receiveControl.crcOrParity[0];
170 tempRCRB.B.CRC1 = config->receiveControl.crcOrParity[1];
171 tempRCRB.B.CRC2 = config->receiveControl.crcOrParity[2];
172 tempRCRB.B.CRC3 = config->receiveControl.crcOrParity[3];
173 tempRCRB.B.CRC4 = config->receiveControl.crcOrParity[4];
174 tempRCRB.B.CRC5 = config->receiveControl.crcOrParity[5];
175 tempRCRB.B.FEC0 = config->receiveControl.frameExpectation[0];
176 tempRCRB.B.FEC1 = config->receiveControl.frameExpectation[1];
177 tempRCRB.B.FEC2 = config->receiveControl.frameExpectation[2];
178 tempRCRB.B.FEC3 = config->receiveControl.frameExpectation[3];
179 tempRCRB.B.FEC4 = config->receiveControl.frameExpectation[4];
180 tempRCRB.B.FEC5 = config->receiveControl.frameExpectation[5];
181 tempRCRB.B.VBS0 = config->receiveControl.verbose[0];
182 tempRCRB.B.VBS1 = config->receiveControl.verbose[1];
183 tempRCRB.B.VBS2 = config->receiveControl.verbose[2];
184 tempRCRB.B.VBS3 = config->receiveControl.verbose[3];
185 tempRCRB.B.VBS4 = config->receiveControl.verbose[4];
186 tempRCRB.B.VBS5 = config->receiveControl.verbose[5];
187 psi5Ch->RCRB.U = tempRCRB.U;
188
189 Ifx_PSI5_CH_RCRC tempRCRC;
190 tempRCRC.B.BRS = config->receiveControl.baudrateSelect;
191 tempRCRC.B.TSP = config->receiveControl.pulseTimestampSelect;
192 tempRCRC.B.TSF = config->receiveControl.frameTimestampSelect;
193 tempRCRC.B.TSR = config->receiveControl.receiveDataRegisterTimestamp;
194 psi5Ch->RCRC.U = tempRCRC.U;
195
196 Ifx_PSI5_RFC tempRFC;
197 tempRFC.B.FWL = config->receiveControl.fifoWarningLevel;
198 psi5->RFC[config->channelId].U = tempRFC.U;
199
200 Ifx_PSI5_CH_SCR tempSCR;
201 tempSCR.B.PLL = config->sendControl.payloadLength;
202 tempSCR.B.EPS = config->sendControl.enhancedProtocolSelected;
203 tempSCR.B.BSC = config->sendControl.bitStuffingEnabled;
204 tempSCR.B.SSL = config->sendControl.ssrPayloadLength;
205 tempSCR.B.SOL = config->sendControl.sorPayloadLength;
206 tempSCR.B.CRC = config->sendControl.crcGenerationEnabled;
207 tempSCR.B.STA = config->sendControl.startSequenceGenerationEnabled;
208 tempSCR.B.INH = config->sendControl.inhibitingAutomaticTransferEnabled;
209 psi5Ch->SCR.U = tempSCR.U;
210
211 Ifx_PSI5_CH_IOCR tempIOCR;
212 tempIOCR.B.DEPTH = config->inputOutputControl.digitalInputFilterDepth;
213 tempIOCR.B.OIE = config->inputOutputControl.outputInverterEnabled;
214 tempIOCR.B.IIE = config->inputOutputControl.inputInverterEnabled;
215 psi5Ch->IOCR.U = tempIOCR.U;
216
217 psi5->GCR.U |=
218 ((IFXPSI5_ENABLE_CHANNELTRIGGER << config->channelId) | (IFXPSI5_ENABLE_CHANNEL << config->channelId));
219
220 IfxScuWdt_setCpuEndinit(passwd);
221
222 const IfxPsi5_Psi5_PinsConfig *pins = config->pinsConfig;
223
224 if (pins != NULL_PTR)
225 {
226 const IfxPsi5_Rx_In *rx = pins->in;
227
228 if (rx != NULL_PTR)
229 {
230 IfxPsi5_initRxPin(rx, pins->inMode, pins->pinDriver);
231 }
232
233 const IfxPsi5_Tx_Out *tx = pins->out;
234
235 if (tx != NULL_PTR)
236 {
237 IfxPsi5_initTxPin(tx, pins->outMode, pins->pinDriver);
238 }
239 }
240
241 return status;
242 }
243
244
245 void IfxPsi5_Psi5_initChannelConfig(IfxPsi5_Psi5_ChannelConfig *config, IfxPsi5_Psi5 *psi5)
246 {
247 IfxPsi5_Psi5_ChannelConfig IfxPsi5_Psi5_defaultChannelConfig = {
248 .channelId = IfxPsi5_ChannelId_0,
249 .module = NULL_PTR,
250 .pulseGeneration = {
251 .pulseLength = 5,
252 .delayLength = 1,
253 .timeBaseSelect = IfxPsi5_TimeBase_internal,
254 .externalTimeBaseSelect = IfxPsi5_Trigger_0,
255 .periodicOrExternalOrBypass = IfxPsi5_TriggerType_periodic,
256 .externalTriggerSelect = IfxPsi5_Trigger_0,
257 .blankoutTime = 5
258 },
259 .channelTrigger = {
260 .channelTriggerValue = 0x150,
261 .channelTriggerCounter = 0x130
262 },
263 .watchdogTimerLimit[0] = 0x0,
264 .watchdogTimerLimit[1] = 0x0,
265 .watchdogTimerLimit[2] = 0x0,
266 .watchdogTimerLimit[3] = 0x0,
267 .watchdogTimerLimit[4] = 0x0,
268 .watchdogTimerLimit[5] = 0x0,
269 .watchdogTimerLimit[6] = 0x0,
270 .receiveControl = {
271 .payloadLength[0] = 8,
272 .payloadLength[1] = 8,
273 .payloadLength[2] = 8,
274 .payloadLength[3] = 8,
275 .payloadLength[4] = 8,
276 .payloadLength[5] = 8,
277 .asynchronousModeSelected = FALSE,
278 .verboseForAsynchronousMode = IfxPsi5_Verbose_off,
279 .messagingBitsPresence[0] = IfxPsi5_MessagingBits_absent,
280 .messagingBitsPresence[1] = IfxPsi5_MessagingBits_absent,
281 .messagingBitsPresence[2] = IfxPsi5_MessagingBits_absent,
282 .messagingBitsPresence[3] = IfxPsi5_MessagingBits_absent,
283 .messagingBitsPresence[4] = IfxPsi5_MessagingBits_absent,
284 .messagingBitsPresence[5] = IfxPsi5_MessagingBits_absent,
285 .crcOrParity[0] = IfxPsi5_CRCorParity_parity,
286 .crcOrParity[1] = IfxPsi5_CRCorParity_parity,
287 .crcOrParity[2] = IfxPsi5_CRCorParity_parity,
288 .crcOrParity[3] = IfxPsi5_CRCorParity_parity,
289 .crcOrParity[4] = IfxPsi5_CRCorParity_parity,
290 .crcOrParity[5] = IfxPsi5_CRCorParity_parity,
291 .frameExpectation[0] = IfxPsi5_FrameExpectation_notExpected,
292 .frameExpectation[1] = IfxPsi5_FrameExpectation_notExpected,
293 .frameExpectation[2] = IfxPsi5_FrameExpectation_notExpected,
294 .frameExpectation[3] = IfxPsi5_FrameExpectation_notExpected,
295 .frameExpectation[4] = IfxPsi5_FrameExpectation_notExpected,
296 .frameExpectation[5] = IfxPsi5_FrameExpectation_notExpected,
297 .verbose[0] = IfxPsi5_Verbose_off,
298 .verbose[1] = IfxPsi5_Verbose_off,
299 .verbose[2] = IfxPsi5_Verbose_off,
300 .verbose[3] = IfxPsi5_Verbose_off,
301 .verbose[4] = IfxPsi5_Verbose_off,
302 .verbose[5] = IfxPsi5_Verbose_off,
303 .baudrateSelect = IfxPsi5_BaudRate_125,
304 .pulseTimestampSelect = IfxPsi5_TimestampRegister_a,
305 .frameTimestampSelect = IfxPsi5_TimestampRegister_a,
306 .receiveDataRegisterTimestamp = IfxPsi5_ReceiveDataRegisterTimestamp_pulse,
307 .fifoWarningLevel = 16
308 },
309 .sendControl = {
310 .payloadLength = 32,
311 .enhancedProtocolSelected = FALSE,
312 .bitStuffingEnabled = FALSE,
313 .ssrPayloadLength = 32,
314 .sorPayloadLength = 32,
315 .crcGenerationEnabled = FALSE,
316 .startSequenceGenerationEnabled = FALSE,
317 .inhibitingAutomaticTransferEnabled = FALSE
318 },
319 .inputOutputControl = {
320 .digitalInputFilterDepth = IfxPsi5_DigitalInputFilterDepth_0,
321 .outputInverterEnabled = FALSE,
322 .inputInverterEnabled = FALSE
323 }
324 };
325 *config = IfxPsi5_Psi5_defaultChannelConfig;
326 config->module = psi5;
327 }
328
329
330 boolean IfxPsi5_Psi5_initModule(IfxPsi5_Psi5 *psi5, const IfxPsi5_Psi5_Config *config)
331 {
332 boolean status = TRUE;
333 Ifx_PSI5 *psi5SFR = config->psi5;
334
335 psi5->psi5 = psi5SFR;
336
337 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
338 IfxScuWdt_clearCpuEndinit(passwd);
339 IfxPsi5_Psi5_enableModule(psi5SFR);
340
341 if (IfxPsi5_Psi5_initializeClock(psi5SFR, &config->fracDiv) == 0)
342 {
343 status = FALSE;
344
345 return status;
346 }
347 else
348 {}
349
350 if (IfxPsi5_Psi5_initializeClock(psi5SFR, &config->slowClock) == 0)
351 {
352 status = FALSE;
353
354 return status;
355 }
356 else
357 {}
358
359 if (IfxPsi5_Psi5_initializeClock(psi5SFR, &config->fastClock) == 0)
360 {
361 status = FALSE;
362
363 return status;
364 }
365 else
366 {}
367
368 if (IfxPsi5_Psi5_initializeClock(psi5SFR, &config->timestampClock) == 0)
369 {
370 status = FALSE;
371
372 return status;
373 }
374 else
375 {}
376
377 IfxScuWdt_setCpuEndinit(passwd);
378
379 return status;
380 }
381
382
383 void IfxPsi5_Psi5_initModuleConfig(IfxPsi5_Psi5_Config *config, Ifx_PSI5 *psi5)
384 {
385 uint32 spbFrequency = IfxScuCcu_getSpbFrequency();
386
387 config->psi5 = psi5;
388 config->fracDiv.frequency = spbFrequency;
389 config->fracDiv.mode = IfxPsi5_DividerMode_normal;
390 config->fracDiv.type = IfxPsi5_ClockType_fracDiv;
391 config->slowClock.frequency = IFXPSI5_DEFAULT_SLOWCLOCK_FREQ;
392 config->slowClock.mode = IfxPsi5_DividerMode_fractional;
393 config->slowClock.type = IfxPsi5_ClockType_slowClock_125;
394 config->fastClock.frequency = IFXPSI5_DEFAULT_FASTCLOCK_FREQ;
395 config->fastClock.mode = IfxPsi5_DividerMode_fractional;
396 config->fastClock.type = IfxPsi5_ClockType_fastClock_189;
397 config->timestampClock.frequency = IFXPSI5_DEFAULT_TIMESTAMP_FREQ;
398 config->timestampClock.mode = IfxPsi5_DividerMode_normal;
399 config->timestampClock.type = IfxPsi5_ClockType_timeStamp;
400 config->timestampCounterA.externalTimeBaseSelect = IfxPsi5_Trigger_0;
401 config->timestampCounterA.timeBaseSelect = IfxPsi5_TimeBase_internal;
402 config->timestampCounterB.externalTimeBaseSelect = IfxPsi5_Trigger_0;
403 config->timestampCounterB.timeBaseSelect = IfxPsi5_TimeBase_internal;
404 config->timestampCounterC.externalTimeBaseSelect = IfxPsi5_Trigger_0;
405 config->timestampCounterC.timeBaseSelect = IfxPsi5_TimeBase_internal;
406 }
407
408
409 uint32 IfxPsi5_Psi5_initializeClock(Ifx_PSI5 *psi5, const IfxPsi5_Psi5_Clock *clock)
410 {
411 uint64 step = 0;
412 uint32 result = 0;
413 IfxPsi5_DividerMode divMode = clock->mode;
414 IfxPsi5_ClockType clockType = clock->type;
415 uint32 clockFrequency = clock->frequency;
416 uint32 fInput;
417 Ifx_PSI5_FDR tempFDR, tempFDRL, tempFDRH, tempFDRT;
418
419 if (clockType == IfxPsi5_ClockType_fracDiv)
420 {
421 fInput = IfxScuCcu_getSpbFrequency();
422 }
423 else
424 {
425 fInput = IfxPsi5_Psi5_getFracDivClock(psi5);
426
427 if (fInput == 0)
428 {
429 result = 0;
430
431 return result;
432 }
433 else
434 {}
435 }
436
437 switch (divMode)
438 {
439 case IfxPsi5_DividerMode_normal:
440 step = IFXPSI5_STEP_RANGE - (fInput / clockFrequency);
441
442 if (step > (IFXPSI5_STEP_RANGE - 1))
443 {
444 step = IFXPSI5_STEP_RANGE - 1;
445 }
446 else
447 {
448 /* do nothing */
449 }
450
451 result = (uint32)(fInput / (IFXPSI5_STEP_RANGE - step));
452 break;
453
454 case IfxPsi5_DividerMode_fractional:
455 step = (uint64)((uint64)clockFrequency * IFXPSI5_STEP_RANGE) / fInput;
456
457 if (step > (IFXPSI5_STEP_RANGE - 1))
458 {
459 step = IFXPSI5_STEP_RANGE - 1;
460 }
461 else
462 {
463 /* do nothing */
464 }
465
466 result = (uint32)((uint64)((uint64)fInput * step)) / IFXPSI5_STEP_RANGE;
467 break;
468
469 case IfxPsi5_DividerMode_off:
470 default:
471 step = 0;
472 result = 0;
473 break;
474 }
475
476 if (result != 0)
477 {
478 switch (clockType)
479 {
480 case IfxPsi5_ClockType_fracDiv:
481 tempFDR.U = 0;
482 tempFDR.B.DM = divMode;
483 tempFDR.B.STEP = (uint32)step;
484 psi5->FDR.U = tempFDR.U;
485 break;
486
487 case IfxPsi5_ClockType_slowClock_125:
488 tempFDRL.U = 0;
489 tempFDRL.B.DM = divMode;
490 tempFDRL.B.STEP = (uint32)step;
491 psi5->FDRL.U = tempFDRL.U;
492 break;
493
494 case IfxPsi5_ClockType_fastClock_189:
495 tempFDRH.U = 0;
496 tempFDRH.B.DM = divMode;
497 tempFDRH.B.STEP = (uint32)step;
498 psi5->FDRH.U = tempFDRH.U;
499 break;
500
501 case IfxPsi5_ClockType_timeStamp:
502 tempFDRT.U = 0;
503 tempFDRT.B.DM = divMode;
504 tempFDRT.B.STEP = (uint32)step;
505 psi5->FDRT.U = tempFDRT.U;
506 break;
507 }
508 }
509
510 return result;
511 }
512
513
514 boolean IfxPsi5_Psi5_readChannelFrame(IfxPsi5_Psi5_Channel *channel, IfxPsi5_Psi5_Frame *frame)
515 {
516 if (channel->module->psi5->INTSTATA[channel->channelId].B.RDI == TRUE)
517 {
518 frame->rdm.lowWord = channel->channel->RDRL.U;
519 frame->rdm.highWord = channel->channel->RDRH.U;
520
521 channel->module->psi5->INTCLRA[channel->channelId].U |= (IFX_PSI5_INTCLRA_RDI_MSK << IFX_PSI5_INTCLRA_RDI_OFF) | (IFX_PSI5_INTCLRA_RSI_MSK << IFX_PSI5_INTCLRA_RSI_OFF);
522
523 return TRUE;
524 }
525 else
526 {
527 return FALSE;
528 }
529 }
530
531
532 boolean IfxPsi5_Psi5_readChannelSerialMessage(IfxPsi5_Psi5_Channel *channel, IfxPsi5_Slot slot, IfxPsi5_Psi5_SerialMessage *message)
533 {
534 message->rds.value = channel->channel->SDS[slot].U;
535
536 return TRUE;
537 }
538
539
540 void IfxPsi5_Psi5_resetModule(Ifx_PSI5 *psi5)
541 {
542 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
543
544 IfxScuWdt_clearSafetyEndinit(passwd);
545 psi5->KRST1.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
546 psi5->KRST0.B.RST = 1;
547
548 while (psi5->KRST0.B.RSTSTAT == 0)
549 {
550 /* Wait until reset is executed */
551 }
552
553 psi5->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
554 IfxScuWdt_setSafetyEndinit(passwd);
555 }
556
557
558 boolean IfxPsi5_Psi5_sendChannelData(IfxPsi5_Psi5_Channel *channel, uint64 data)
559 {
560 uint32 dataLowWord = (uint32)(data & 0xFFFFFFFF);
561 uint32 dataHighWord = (uint32)((data >> 32) & 0xFFFFFFFF);
562 channel->channel->SDRL.U = dataLowWord;
563 channel->channel->SDRH.U = dataHighWord;
564
565 if (channel->module->psi5->INTSTATA[channel->channelId].B.TPOI)
566 {
567 return FALSE;
568 }
569 else
570 {
571 return TRUE;
572 }
573 }
IFXPSI5_ENABLE_CHANNELTRIGGER
#define IFXPSI5_ENABLE_CHANNELTRIGGER
Definition: IfxPsi5_cfg.h:70
IfxPsi5_Psi5_initModule
boolean IfxPsi5_Psi5_initModule(IfxPsi5_Psi5 *psi5, const IfxPsi5_Psi5_Config *config)
Initialise the PSI5 with the supplied configureation.
Definition: IfxPsi5_Psi5.c:330
IfxPsi5_Psi5_Clock::type
IfxPsi5_ClockType type
Specifies the type of clock (fracDiv / slow 125kHz / fast 189 kHz / timestamp)
Definition: IfxPsi5_Psi5.h:182
IfxPsi5_Psi5_ReceiveControl::baudrateSelect
IfxPsi5_BaudRate baudrateSelect
Specifies the baudrate selection.
Definition: IfxPsi5_Psi5.h:261
IfxPsi5_Psi5_PulseGeneration::delayLength
uint32 delayLength
Specifies the additional length of the pulse width for coding a &#39;1&#39;.
Definition: IfxPsi5_Psi5.h:226
IfxScuCcu_getSpbFrequency
float32 IfxScuCcu_getSpbFrequency(void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider...
Definition: IfxScuCcu.c:479
IfxPsi5_DividerMode_normal
divider mode is normal
Definition: IfxPsi5.h:138
IfxPsi5_Psi5_ReceiveControl::pulseTimestampSelect
IfxPsi5_TimestampRegister pulseTimestampSelect
Specifies the timestamp register selection for pulses.
Definition: IfxPsi5_Psi5.h:262
IfxPsi5_Trigger_0
trigger 0
Definition: IfxPsi5.h:287
IfxPsi5_Psi5_Rdm::highWord
uint32 highWord
Upper 32 bits of the Psi5 frame.
Definition: IfxPsi5_Psi5.h:239
IfxPsi5_Psi5_InputOutputControl::digitalInputFilterDepth
IfxPsi5_DigitalInputFilterDepth digitalInputFilterDepth
Specifies the the number of port input samples considered for floating average.
Definition: IfxPsi5_Psi5.h:207
IfxPsi5_Psi5_ChannelConfig::pulseGeneration
IfxPsi5_Psi5_PulseGeneration pulseGeneration
Specifies the configuration for sync pulse generation.
Definition: IfxPsi5_Psi5.h:320
IfxPsi5_Psi5_resetModule
void IfxPsi5_Psi5_resetModule(Ifx_PSI5 *psi5)
Reset PSI5 kernel.
Definition: IfxPsi5_Psi5.c:540
IfxPsi5_Psi5_deInitModule
void IfxPsi5_Psi5_deInitModule(IfxPsi5_Psi5 *psi5)
Resets the PSI5 module.
Definition: IfxPsi5_Psi5.c:54
IfxPsi5_Psi5_Config::timestampCounterC
IfxPsi5_Psi5_TimeStampConfig timestampCounterC
Specifies the time stamp counter C properties.
Definition: IfxPsi5_Psi5.h:339
IfxPsi5_Psi5_sendChannelData
boolean IfxPsi5_Psi5_sendChannelData(IfxPsi5_Psi5_Channel *channel, uint64 data)
Transmit the data through the channel.
Definition: IfxPsi5_Psi5.c:558
IfxPsi5_Psi5_TransmitControl::ssrPayloadLength
uint32 ssrPayloadLength
Specifies the payload length of SSR.
Definition: IfxPsi5_Psi5.h:285
IfxPsi5_ChannelId_0
Specifies PSI5 channel 0.
Definition: IfxPsi5_cfg.h:93
IfxPsi5_Psi5_ChannelConfig
Channel configuration structure.
Definition: IfxPsi5_Psi5.h:315
IfxPsi5_Psi5_ReceiveControl::messagingBitsPresence
IfxPsi5_MessagingBits messagingBitsPresence[IFXPSI5_NUM_SLOTS]
Specifies the presence or absence of messaging bits in the slots 0 to 5.
Definition: IfxPsi5_Psi5.h:257
IfxPsi5_Psi5_Config::fracDiv
IfxPsi5_Psi5_Clock fracDiv
Specifies fractionally divided clock properties.
Definition: IfxPsi5_Psi5.h:333
IfxPsi5_Psi5_Config::timestampCounterB
IfxPsi5_Psi5_TimeStampConfig timestampCounterB
Specifies the time stamp counter B properties.
Definition: IfxPsi5_Psi5.h:338
IfxPsi5_Psi5_Config::fastClock
IfxPsi5_Psi5_Clock fastClock
Specifies the faster f189 clock properties.
Definition: IfxPsi5_Psi5.h:335
IfxPsi5_Psi5_PinsConfig::pinDriver
IfxPort_PadDriver pinDriver
The pad driver mode which should be configured.
Definition: IfxPsi5_Psi5.h:299
IFXPSI5_DEFAULT_FASTCLOCK_FREQ
#define IFXPSI5_DEFAULT_FASTCLOCK_FREQ
Definition: IfxPsi5_cfg.h:76
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxPsi5_BaudRate_125
Slow 125 kHz clock.
Definition: IfxPsi5.h:89
IfxPsi5_Psi5_ReceiveControl::asynchronousModeSelected
boolean asynchronousModeSelected
Specifies the asynchronous mode of operation.
Definition: IfxPsi5_Psi5.h:253
IfxPsi5_Psi5_PinsConfig::in
IFX_CONST IfxPsi5_Rx_In * in
The RX Pin which should be configured.
Definition: IfxPsi5_Psi5.h:295
IFXPSI5_STEP_RANGE
#define IFXPSI5_STEP_RANGE
Definition: IfxPsi5_cfg.h:64
IFXPSI5_NUM_WDTS
#define IFXPSI5_NUM_WDTS
Definition: IfxPsi5_cfg.h:66
IfxPsi5_Psi5_TransmitControl::crcGenerationEnabled
boolean crcGenerationEnabled
Specifies whether the crc generation is turned on or not.
Definition: IfxPsi5_Psi5.h:281
IfxPsi5_Psi5_TransmitControl::bitStuffingEnabled
boolean bitStuffingEnabled
Specifies whether the bit stuffing is turned on or not.
Definition: IfxPsi5_Psi5.h:280
IfxPsi5_Psi5_ChannelConfig::watchdogTimerLimit
uint32 watchdogTimerLimit[IFXPSI5_NUM_WDTS]
Specifies the watchdog timer limit for each of the slots 0 to 6.
Definition: IfxPsi5_Psi5.h:318
IfxPsi5_DividerMode
IfxPsi5_DividerMode
MODULE_PSI5.FDR.DM,Divider mode.
Definition: IfxPsi5.h:135
IfxPsi5_Psi5_ReceiveControl::fifoWarningLevel
uint32 fifoWarningLevel
Specifies the fifo warning level.
Definition: IfxPsi5_Psi5.h:254
IfxPsi5_MessagingBits_absent
No messaging bits.
Definition: IfxPsi5.h:224
IfxPsi5_CRCorParity_parity
parity selection
Definition: IfxPsi5.h:97
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxPsi5_Rx_In
RX pin mapping structure.
Definition: IfxPsi5_PinMap.h:56
IfxPsi5_Psi5_ReceiveControl::verboseForAsynchronousMode
IfxPsi5_Verbose verboseForAsynchronousMode
Specifies the verbose mode selection in asynchronous mode of operation.
Definition: IfxPsi5_Psi5.h:256
uint64
unsigned long long uint64
Definition: Platform_Types.h:121
IfxPsi5_Psi5_Frame::rdm
IfxPsi5_Psi5_Rdm rdm
Psi5 frame in double word format.
Definition: IfxPsi5_Psi5.h:346
IfxPsi5_Psi5_readChannelFrame
boolean IfxPsi5_Psi5_readChannelFrame(IfxPsi5_Psi5_Channel *channel, IfxPsi5_Psi5_Frame *frame)
Gets the received psi5 frame for the channel.
Definition: IfxPsi5_Psi5.c:514
IfxPsi5_Psi5_InputOutputControl::outputInverterEnabled
boolean outputInverterEnabled
Specifies the pulse polarity of the output.
Definition: IfxPsi5_Psi5.h:205
IfxPsi5_Psi5_initChannel
boolean IfxPsi5_Psi5_initChannel(IfxPsi5_Psi5_Channel *channel, const IfxPsi5_Psi5_ChannelConfig *config)
Initialize the channel with the supplied configuration.
Definition: IfxPsi5_Psi5.c:95
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxPsi5_Psi5_Channel
Channel handle data structure.
Definition: IfxPsi5_Psi5.h:306
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxPsi5_Psi5_SerialMessage
Psi5 serial message data structure.
Definition: IfxPsi5_Psi5.h:352
IfxPsi5_Psi5_initModuleConfig
void IfxPsi5_Psi5_initModuleConfig(IfxPsi5_Psi5_Config *config, Ifx_PSI5 *psi5)
Initialise buffer with default PSI5 configuration.
Definition: IfxPsi5_Psi5.c:383
IfxPsi5_Psi5_initChannelConfig
void IfxPsi5_Psi5_initChannelConfig(IfxPsi5_Psi5_ChannelConfig *config, IfxPsi5_Psi5 *psi5)
Get the current channel configuration (e.g. sample settings)
Definition: IfxPsi5_Psi5.c:245
IfxScuWdt_clearSafetyEndinit
void IfxScuWdt_clearSafetyEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:305
IfxPsi5_Psi5.h
PSI5 PSI5 details.
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxPsi5_Psi5_readChannelSerialMessage
boolean IfxPsi5_Psi5_readChannelSerialMessage(IfxPsi5_Psi5_Channel *channel, IfxPsi5_Slot slot, IfxPsi5_Psi5_SerialMessage *message)
Get the received serial message for the channel.
Definition: IfxPsi5_Psi5.c:532
IfxPsi5_Psi5_Config::timestampClock
IfxPsi5_Psi5_Clock timestampClock
Specifies the time stamp clock properties.
Definition: IfxPsi5_Psi5.h:336
IfxPsi5_Psi5_PulseGeneration::timeBaseSelect
IfxPsi5_TimeBase timeBaseSelect
Specifies the clock source for CTV as internal or external.
Definition: IfxPsi5_Psi5.h:227
IfxPsi5_Psi5_ChannelConfig::receiveControl
IfxPsi5_Psi5_ReceiveControl receiveControl
Specifies the configuration for reception.
Definition: IfxPsi5_Psi5.h:322
IfxPsi5_Psi5_InputOutputControl::inputInverterEnabled
boolean inputInverterEnabled
Specifies the pulse polarity of the input.
Definition: IfxPsi5_Psi5.h:206
IfxPsi5_Psi5::psi5
Ifx_PSI5 * psi5
Specifies the pointer to the PSI5 module registers.
Definition: IfxPsi5_Psi5.h:165
IfxPsi5_TimestampRegister_a
Timestamp register A.
Definition: IfxPsi5.h:278
IfxPsi5_DividerMode_off
divider mode is off
Definition: IfxPsi5.h:140
IfxPsi5_Psi5_PinsConfig
Pin Configuration structure.
Definition: IfxPsi5_Psi5.h:293
IfxPsi5_Psi5_PinsConfig::inMode
IfxPort_InputMode inMode
The pin input mode which should be configured.
Definition: IfxPsi5_Psi5.h:296
IfxPsi5_Psi5_ChannelConfig::channelTrigger
IfxPsi5_Psi5_ChannelTrigger channelTrigger
Specifies the configuration for channel trigger.
Definition: IfxPsi5_Psi5.h:321
IfxPsi5_DividerMode_spb
divider mode is off
Definition: IfxPsi5.h:137
IfxPsi5_TriggerType_external
External trigger.
Definition: IfxPsi5.h:314
IfxPsi5_Psi5_getFracDivClock
uint32 IfxPsi5_Psi5_getFracDivClock(Ifx_PSI5 *psi5)
Returns the configured fracDiv psi5 clock frequency in Hz.
Definition: IfxPsi5_Psi5.c:68
IfxPsi5_initTxPin
IFX_INLINE void IfxPsi5_initTxPin(const IfxPsi5_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a TX output.
Definition: IfxPsi5.h:721
IfxPsi5_Psi5_ReceiveControl::receiveDataRegisterTimestamp
IfxPsi5_ReceiveDataRegisterTimestamp receiveDataRegisterTimestamp
Specifies the pulse or start of frame based timestamp to be stored in receive data register RDRH...
Definition: IfxPsi5_Psi5.h:264
IfxPsi5_Psi5
PSI5 handle data structure.
Definition: IfxPsi5_Psi5.h:163
IfxPsi5_Psi5_PulseGeneration::periodicOrExternalOrBypass
IfxPsi5_TriggerType periodicOrExternalOrBypass
Specifies whether periodic trigger or external trigger or bypass is selected.
Definition: IfxPsi5_Psi5.h:229
IfxPsi5_Psi5_ReceiveControl::verbose
IfxPsi5_Verbose verbose[IFXPSI5_NUM_SLOTS]
Specifies the verbose is enabled or disabled for the slots 0 to 5.
Definition: IfxPsi5_Psi5.h:260
IfxPsi5_Psi5_PulseGeneration::blankoutTime
uint32 blankoutTime
Specifies the duration of blank out period.
Definition: IfxPsi5_Psi5.h:231
IfxPsi5_Psi5_TransmitControl::sorPayloadLength
uint32 sorPayloadLength
Specifies the payload length of SOR.
Definition: IfxPsi5_Psi5.h:286
IfxPsi5_Psi5_PinsConfig::out
IFX_CONST IfxPsi5_Tx_Out * out
The TX Pin which should be configured.
Definition: IfxPsi5_Psi5.h:297
IfxPsi5_FrameExpectation_notExpected
No frame is expected.
Definition: IfxPsi5.h:147
IfxPsi5_Psi5_TransmitControl::enhancedProtocolSelected
boolean enhancedProtocolSelected
Specifies whether the enhanced protocol is selected or not.
Definition: IfxPsi5_Psi5.h:279
IfxPsi5_Psi5_ChannelTrigger::channelTriggerCounter
uint32 channelTriggerCounter
Specifies the channel trigger counter.
Definition: IfxPsi5_Psi5.h:173
IfxPsi5_DigitalInputFilterDepth_0
Digital input filter depth is 0.
Definition: IfxPsi5.h:115
IfxPsi5_Psi5_Config::slowClock
IfxPsi5_Psi5_Clock slowClock
Specifies the slower f125 clock properties.
Definition: IfxPsi5_Psi5.h:334
IfxPsi5_TimeBase_internal
Internal time stamp clock.
Definition: IfxPsi5.h:270
IfxPsi5_Psi5_TransmitControl::payloadLength
uint32 payloadLength
Specifies the payload length to be sent.
Definition: IfxPsi5_Psi5.h:284
IfxPsi5_Psi5_Clock
Clock configuration data structure.
Definition: IfxPsi5_Psi5.h:178
IfxPsi5_Psi5_Clock::frequency
uint32 frequency
Specifies the frequency for the clock.
Definition: IfxPsi5_Psi5.h:180
IFXPSI5_ENABLE_CHANNEL
#define IFXPSI5_ENABLE_CHANNEL
Definition: IfxPsi5_cfg.h:72
IfxPsi5_Psi5_ReceiveControl::frameExpectation
IfxPsi5_FrameExpectation frameExpectation[IFXPSI5_NUM_SLOTS]
Specifies whether the frame is expected or not in the slots 0 to 5.
Definition: IfxPsi5_Psi5.h:259
IfxPsi5_Psi5_Frame
Psi5 frame data union.
Definition: IfxPsi5_Psi5.h:344
IfxPsi5_ClockType_fastClock_189
Fast 189 kHz clock.
Definition: IfxPsi5.h:107
IfxPsi5_TriggerType_periodic
Periodic trigger.
Definition: IfxPsi5.h:313
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxPsi5_initRxPin
IFX_INLINE void IfxPsi5_initRxPin(const IfxPsi5_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a RX input.
Definition: IfxPsi5.h:708
IfxScuWdt_setSafetyEndinit
void IfxScuWdt_setSafetyEndinit(uint16 password)
SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:668
IfxPsi5_Psi5_TransmitControl::inhibitingAutomaticTransferEnabled
boolean inhibitingAutomaticTransferEnabled
Specifies whether automatic transfer from the shift registers SSRL/H to SORL/H is inhibited or not...
Definition: IfxPsi5_Psi5.h:283
IfxPsi5_Psi5_Rdm::lowWord
uint32 lowWord
Lower 32 bits of the Psi5 frame.
Definition: IfxPsi5_Psi5.h:238
IfxPsi5_Psi5_Channel::channel
Ifx_PSI5_CH * channel
Pointer to the channel registers.
Definition: IfxPsi5_Psi5.h:309
IfxPsi5_Psi5_ChannelConfig::channelId
IfxPsi5_ChannelId channelId
Specifies the channel index.
Definition: IfxPsi5_Psi5.h:319
IfxPsi5_Psi5_ChannelTrigger::channelTriggerValue
uint32 channelTriggerValue
Specifies the channel trigger value CTV.
Definition: IfxPsi5_Psi5.h:172
IfxPsi5_DividerMode_fractional
divider mode is fractional
Definition: IfxPsi5.h:139
IfxPsi5_ClockType
IfxPsi5_ClockType
Clock type.
Definition: IfxPsi5.h:103
IfxPsi5_ClockType_timeStamp
Timestamp clock.
Definition: IfxPsi5.h:108
IfxPsi5_Psi5_Config
PSI5 module configuration structure.
Definition: IfxPsi5_Psi5.h:330
IfxPsi5_Psi5_ReceiveControl::crcOrParity
IfxPsi5_CRCorParity crcOrParity[IFXPSI5_NUM_SLOTS]
Specifies the crc or parity selection for the slots 0 to 5.
Definition: IfxPsi5_Psi5.h:258
IfxPsi5_Psi5_ChannelConfig::inputOutputControl
IfxPsi5_Psi5_InputOutputControl inputOutputControl
Specifies the configuration for input output control.
Definition: IfxPsi5_Psi5.h:324
IfxPsi5_Psi5_SerialMessage::rds
IfxPsi5_Psi5_Rds rds
Psi5 serial message as unsigned 32 bit value.
Definition: IfxPsi5_Psi5.h:354
IfxPsi5_Psi5_PulseGeneration::pulseLength
uint32 pulseLength
Specifies the standard pulse width without data coding for standard pulse width or for coding a &#39;0&#39;...
Definition: IfxPsi5_Psi5.h:225
IfxPsi5_Psi5_Rds::value
uint32 value
32 bit value of the Psi5 serial message
Definition: IfxPsi5_Psi5.h:246
IfxPsi5_Psi5_ChannelConfig::pinsConfig
IFX_CONST IfxPsi5_Psi5_PinsConfig * pinsConfig
Pin Configuration structure.
Definition: IfxPsi5_Psi5.h:325
IfxPsi5_Psi5_ReceiveControl::frameTimestampSelect
IfxPsi5_TimestampRegister frameTimestampSelect
Specifies the timestamp register selection for start of frames.
Definition: IfxPsi5_Psi5.h:263
IfxPsi5_Psi5_Config::timestampCounterA
IfxPsi5_Psi5_TimeStampConfig timestampCounterA
Specifies the time stamp counter A properties.
Definition: IfxPsi5_Psi5.h:337
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxPsi5_Psi5_ChannelConfig::sendControl
IfxPsi5_Psi5_TransmitControl sendControl
Specifies the configuration for transmission.
Definition: IfxPsi5_Psi5.h:323
IfxPsi5_Psi5_enableModule
void IfxPsi5_Psi5_enableModule(Ifx_PSI5 *psi5)
Enable PSI5 kernel.
Definition: IfxPsi5_Psi5.c:62
IfxPsi5_Psi5_Clock::mode
IfxPsi5_DividerMode mode
Specifies the mode of division for the clock.
Definition: IfxPsi5_Psi5.h:181
IfxPsi5_Psi5_PinsConfig::outMode
IfxPort_OutputMode outMode
The pin output mode which should be configured.
Definition: IfxPsi5_Psi5.h:298
IfxPsi5_Psi5_ReceiveControl::payloadLength
uint32 payloadLength[IFXPSI5_NUM_SLOTS]
Specifies the payload length for the slots 0 to 5.
Definition: IfxPsi5_Psi5.h:255
IfxPsi5_Psi5_PulseGeneration::externalTimeBaseSelect
IfxPsi5_Trigger externalTimeBaseSelect
Specifies the clock source for CTV in the case of external.
Definition: IfxPsi5_Psi5.h:228
IfxPsi5_ReceiveDataRegisterTimestamp_pulse
Pulse based timestamp SPTSC to be stored in RDRHC.
Definition: IfxPsi5.h:232
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxPsi5_Tx_Out
TX pin mapping structure.
Definition: IfxPsi5_PinMap.h:65
IfxPsi5_Verbose_off
Verbose mode is turned off.
Definition: IfxPsi5.h:322
IFXPSI5_DEFAULT_SLOWCLOCK_FREQ
#define IFXPSI5_DEFAULT_SLOWCLOCK_FREQ
Definition: IfxPsi5_cfg.h:74
IFXPSI5_DEFAULT_TIMESTAMP_FREQ
#define IFXPSI5_DEFAULT_TIMESTAMP_FREQ
Definition: IfxPsi5_cfg.h:78
IfxPsi5_ClockType_fracDiv
Fractional Divide clock.
Definition: IfxPsi5.h:105
IfxPsi5_Slot
IfxPsi5_Slot
MODULE_PSI5.RDRHx.SC(x = 0-2),Slot Id.
Definition: IfxPsi5.h:247
IfxPsi5_Psi5_initializeClock
uint32 IfxPsi5_Psi5_initializeClock(Ifx_PSI5 *psi5, const IfxPsi5_Psi5_Clock *clock)
Configure the fracDiv clock.
Definition: IfxPsi5_Psi5.c:409
IfxPsi5_ClockType_slowClock_125
Slow 125 kHz clock.
Definition: IfxPsi5.h:106
IfxPsi5_Psi5_Channel::module
IfxPsi5_Psi5 * module
The PSI5 handle structure.
Definition: IfxPsi5_Psi5.h:308
IfxPsi5_Psi5_ChannelConfig::module
IFX_CONST IfxPsi5_Psi5 * module
Specifies pointer to the IfxPsi5_Psi5 module handle.
Definition: IfxPsi5_Psi5.h:317
IfxPsi5_TriggerType_bypass
Bypassed trigger.
Definition: IfxPsi5.h:315
IfxPsi5_Psi5_TransmitControl::startSequenceGenerationEnabled
boolean startSequenceGenerationEnabled
Specifies whether the start sequence generation is turned on or not.
Definition: IfxPsi5_Psi5.h:282
IfxPsi5_Psi5_PulseGeneration::externalTriggerSelect
IfxPsi5_Trigger externalTriggerSelect
Specifies the trigger source in case of external triggerring.
Definition: IfxPsi5_Psi5.h:230


iLLD_TC38A: IfxPsi5_Psi5.h Source File

  • Psi5
  • Psi5
IfxPsi5_Psi5.h
Go to the documentation of this file.
1 /**
2 * \file IfxPsi5_Psi5.h
3 * \brief PSI5 PSI5 details
4 * \ingroup IfxLld_Psi5
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 *
43 * \defgroup IfxLld_Psi5_Psi5_Usage How to use the PSI5 PSI5 Interface driver?
44 * \ingroup IfxLld_Psi5
45 *
46 * PSI5 communicates with the external world via one input/output line for each channel.
47 *
48 * In the following sections it will be described, how to integrate the driver into the application framework.
49 *
50 * \section IfxLld_Psi5_Psi5_Preparation Preparation
51 * \subsection IfxLld_Psi5_Psi5_Include Include Files
52 *
53 * Include following header file into your C code:
54 * \code
55 * #include <Psi5/Psi5/IfxPsi5_Psi5.h>
56 * \endcode
57 *
58 * \subsection IfxLld_Psi5_Psi5_Variables Variables
59 * //used globally
60 * \code
61 * IfxPsi5_Psi5_Channel psi5Channel[IFXPSI5_PINMAP_NUM_CHANNELS];
62 * \endcode
63 *
64 * \subsection IfxLld_Psi5_Psi5_Module Module Initialisation
65 * \code
66 * // create module config
67 * IfxPsi5_Psi5_Config psi5Config;
68 * IfxPsi5_Psi5_initModuleConfig(&psi5Config, &MODULE_PSI5);
69 *
70 * // initialize module
71 * IfxPsi5_Psi5 psi5;
72 * IfxPsi5_Psi5_initModule(&psi5, &psi5Config);
73 * \endcode
74 *
75 * \subsection IfxLld_Psi5_Psi5_Channel Channel Initialisation
76 * \code
77 * // create channel config
78 * IfxPsi5_Psi5_ChannelConfig psi5ChannelConfig;
79 * IfxPsi5_Psi5_initChannelConfig(&psi5ChannelConfig, &psi5);
80 *
81 * psi5ChannelConfig.watchdogTimerLimit[0] = 0x32; // initial delay before slot 0 starts
82 * psi5ChannelConfig.watchdogTimerLimit[1] = 0x90;
83 * psi5ChannelConfig.watchdogTimerLimit[2] = 0x10;
84 * psi5ChannelConfig.watchdogTimerLimit[3] = 0x10;
85 * psi5ChannelConfig.watchdogTimerLimit[4] = 0x10;
86 * psi5ChannelConfig.watchdogTimerLimit[5] = 0x10;
87 * psi5ChannelConfig.watchdogTimerLimit[6] = 0x10;
88 *
89 * for(int slot=0; slot<6; ++slot) {
90 * psi5ChannelConfig.receiveControl.payloadLength[slot] = 8;
91 * if( slot == 0 )
92 * psi5ChannelConfig.receiveControl.frameExpectation[slot] = IfxPsi5_FrameExpectation_expected;
93 * else
94 * psi5ChannelConfig.receiveControl.frameExpectation[slot] = IfxPsi5_FrameExpectation_notExpected;
95 * }
96 *
97 * // initialize channels
98 * for(int chn=0; chn<IFXPSI5_PINMAP_NUM_CHANNELS; ++chn) {
99 * psi5ChannelConfig.channelId = (IfxPsi5_ChannelId)chn;
100 *
101 * // TODO: currently no IOCRx.ALTI config field
102 * unsigned alti = 0;
103 *
104 * IfxPsi5_Psi5_PinsConfig pinsConfig;
105 * for(int module=0;module<IFXPSI5_PINMAP_NUM_MODULES;module++)
106 * {
107 * pinsConfig.in = IfxPsi5_Rx_In_pinTable[module][chn][alti];
108 * pinsConfig.inMode = IfxPort_InputMode_pullUp;
109 * pinsConfig.out = IfxPsi5_Tx_Out_pinTable[module][chn][alti];
110 * }
111 * pinsConfig.outMode = IfxPort_OutputMode_pushPull;
112 * pinsConfig.pinDriver = IfxPort_PadDriver_cmosAutomotiveSpeed1;
113 *
114 * psi5ChannelConfig.pinsConfig = &pinsConfig;
115 *
116 * IfxPsi5_Psi5_initChannel(&psi5Channel[chn], &psi5ChannelConfig);
117 * }
118 * \endcode
119 *
120 * \subsection IfxLld_Psi5_Psi5_readChannelFrame read channel frame
121 * \code
122 * for(int i=0; i<5; ++i) {
123 * for(int chn=0; chn<IFXPSI5_PINMAP_NUM_CHANNELS; ++chn) {
124 * IfxPsi5_Psi5_Frame frame;
125 *
126 * while( !IfxPsi5_Psi5_readChannelFrame(&psi5Channel[chn], &frame) );
127 *
128 * }
129 * }
130 * \endcode
131 *
132 * \defgroup IfxLld_Psi5_Psi5 PSI5
133 * \ingroup IfxLld_Psi5
134 * \defgroup IfxLld_Psi5_Psi5_Structures Data Structures
135 * \ingroup IfxLld_Psi5_Psi5
136 * \defgroup IfxLld_Psi5_Psi5_Module Module Initialisation functions
137 * \ingroup IfxLld_Psi5_Psi5
138 * \defgroup IfxLld_Psi5_Psi5_Channel Channel functions
139 * \ingroup IfxLld_Psi5_Psi5
140 * \defgroup IfxLld_Psi5_Psi5_Clock Clock Intialisation functions
141 * \ingroup IfxLld_Psi5_Psi5
142 */
143
144 #ifndef IFXPSI5_PSI5_H
145 #define IFXPSI5_PSI5_H 1
146
147 /******************************************************************************/
148 /*----------------------------------Includes----------------------------------*/
149 /******************************************************************************/
150
151 #include "Psi5/Std/IfxPsi5.h"
152 #include "Scu/Std/IfxScuCcu.h"
153 #include "IfxPsi5_bf.h"
154
155 /******************************************************************************/
156 /*-----------------------------Data Structures--------------------------------*/
157 /******************************************************************************/
158
159 /** \addtogroup IfxLld_Psi5_Psi5_Structures
160 * \{ */
161 /** \brief PSI5 handle data structure
162 */
163 typedef struct
164 {
165 Ifx_PSI5 *psi5; /**< \brief Specifies the pointer to the PSI5 module registers */
166 } IfxPsi5_Psi5;
167
168 /** \brief channel trigger configuration structure
169 */
170 typedef struct
171 {
172 uint32 channelTriggerValue; /**< \brief Specifies the channel trigger value CTV */
173 uint32 channelTriggerCounter; /**< \brief Specifies the channel trigger counter */
174 } IfxPsi5_Psi5_ChannelTrigger;
175
176 /** \brief Clock configuration data structure
177 */
178 typedef struct
179 {
180 uint32 frequency; /**< \brief Specifies the frequency for the clock */
181 IfxPsi5_DividerMode mode; /**< \brief Specifies the mode of division for the clock */
182 IfxPsi5_ClockType type; /**< \brief Specifies the type of clock (fracDiv / slow 125kHz / fast 189 kHz / timestamp) */
183 } IfxPsi5_Psi5_Clock;
184
185 /** \brief Psi5 frame data structure with individual members
186 */
187 typedef struct
188 {
189 uint8 crcError : 1; /**< \brief Crc error flag */
190 uint8 crc : 3; /**< \brief Received crc */
191 uint32 readData : 28; /**< \brief Received data */
192 uint32 timestamp : 24; /**< \brief Timestamp */
193 uint8 slotCounter : 3; /**< \brief Slot counter */
194 uint8 timeslotError : 1; /**< \brief Time slot error flag */
195 uint8 numberOfBitsError : 1; /**< \brief Number of bits error flag */
196 uint8 messagingBitsError : 1; /**< \brief Messaging bits error flag */
197 uint8 noFrameReceivedError : 1; /**< \brief No frame received flag */
198 uint8 receiveMemoryOverflowError : 1; /**< \brief Receive buffer overflow error flag */
199 } IfxPsi5_Psi5_FrameData;
200
201 /** \brief Input output configuration structure
202 */
203 typedef struct
204 {
205 boolean outputInverterEnabled; /**< \brief Specifies the pulse polarity of the output */
206 boolean inputInverterEnabled; /**< \brief Specifies the pulse polarity of the input */
207 IfxPsi5_DigitalInputFilterDepth digitalInputFilterDepth; /**< \brief Specifies the the number of port input samples considered for floating average */
208 } IfxPsi5_Psi5_InputOutputControl;
209
210 /** \brief Psi5 serial message with individual members
211 */
212 typedef struct
213 {
214 uint16 serialData : 16; /**< \brief Serial message data */
215 uint8 messageId : 8; /**< \brief Serial message Id */
216 uint8 crc : 6; /**< \brief Serial message crc */
217 uint8 serialMessageCRCFailedError : 1; /**< \brief Serial message crc error flag */
218 uint8 configuration : 1; /**< \brief Serial message configuration */
219 } IfxPsi5_Psi5_Message;
220
221 /** \brief Sync pulse generation configuration structure
222 */
223 typedef struct
224 {
225 uint32 pulseLength; /**< \brief Specifies the standard pulse width without data coding for standard pulse width or for coding a '0' */
226 uint32 delayLength; /**< \brief Specifies the additional length of the pulse width for coding a '1' */
227 IfxPsi5_TimeBase timeBaseSelect; /**< \brief Specifies the clock source for CTV as internal or external */
228 IfxPsi5_Trigger externalTimeBaseSelect; /**< \brief Specifies the clock source for CTV in the case of external */
229 IfxPsi5_TriggerType periodicOrExternalOrBypass; /**< \brief Specifies whether periodic trigger or external trigger or bypass is selected */
230 IfxPsi5_Trigger externalTriggerSelect; /**< \brief Specifies the trigger source in case of external triggerring */
231 uint32 blankoutTime; /**< \brief Specifies the duration of blank out period */
232 } IfxPsi5_Psi5_PulseGeneration;
233
234 /** \brief Psi5 frame in double word format
235 */
236 typedef struct
237 {
238 uint32 lowWord; /**< \brief Lower 32 bits of the Psi5 frame */
239 uint32 highWord; /**< \brief Upper 32 bits of the Psi5 frame */
240 } IfxPsi5_Psi5_Rdm;
241
242 /** \brief Psi5 serial message as unsigned 32 bit value
243 */
244 typedef struct
245 {
246 uint32 value; /**< \brief 32 bit value of the Psi5 serial message */
247 } IfxPsi5_Psi5_Rds;
248
249 /** \brief Receive control configuration structure
250 */
251 typedef struct
252 {
253 boolean asynchronousModeSelected; /**< \brief Specifies the asynchronous mode of operation */
254 uint32 fifoWarningLevel; /**< \brief Specifies the fifo warning level */
255 uint32 payloadLength[IFXPSI5_NUM_SLOTS]; /**< \brief Specifies the payload length for the slots 0 to 5 */
256 IfxPsi5_Verbose verboseForAsynchronousMode; /**< \brief Specifies the verbose mode selection in asynchronous mode of operation */
257 IfxPsi5_MessagingBits messagingBitsPresence[IFXPSI5_NUM_SLOTS]; /**< \brief Specifies the presence or absence of messaging bits in the slots 0 to 5 */
258 IfxPsi5_CRCorParity crcOrParity[IFXPSI5_NUM_SLOTS]; /**< \brief Specifies the crc or parity selection for the slots 0 to 5 */
259 IfxPsi5_FrameExpectation frameExpectation[IFXPSI5_NUM_SLOTS]; /**< \brief Specifies whether the frame is expected or not in the slots 0 to 5 */
260 IfxPsi5_Verbose verbose[IFXPSI5_NUM_SLOTS]; /**< \brief Specifies the verbose is enabled or disabled for the slots 0 to 5 */
261 IfxPsi5_BaudRate baudrateSelect; /**< \brief Specifies the baudrate selection */
262 IfxPsi5_TimestampRegister pulseTimestampSelect; /**< \brief Specifies the timestamp register selection for pulses */
263 IfxPsi5_TimestampRegister frameTimestampSelect; /**< \brief Specifies the timestamp register selection for start of frames */
264 IfxPsi5_ReceiveDataRegisterTimestamp receiveDataRegisterTimestamp; /**< \brief Specifies the pulse or start of frame based timestamp to be stored in receive data register RDRH */
265 } IfxPsi5_Psi5_ReceiveControl;
266
267 /** \brief Timestamp configuration data structure
268 */
269 typedef struct
270 {
271 IfxPsi5_Trigger externalTimeBaseSelect; /**< \brief Specifies the clock base for counter CTS in the case of external */
272 IfxPsi5_TimeBase timeBaseSelect; /**< \brief Specifies the clock source for CTS as internal or external */
273 } IfxPsi5_Psi5_TimeStampConfig;
274
275 /** \brief Transmit control configuration structure
276 */
277 typedef struct
278 {
279 boolean enhancedProtocolSelected; /**< \brief Specifies whether the enhanced protocol is selected or not */
280 boolean bitStuffingEnabled; /**< \brief Specifies whether the bit stuffing is turned on or not */
281 boolean crcGenerationEnabled; /**< \brief Specifies whether the crc generation is turned on or not */
282 boolean startSequenceGenerationEnabled; /**< \brief Specifies whether the start sequence generation is turned on or not */
283 boolean inhibitingAutomaticTransferEnabled; /**< \brief Specifies whether automatic transfer from the shift registers SSRL/H to SORL/H is inhibited or not */
284 uint32 payloadLength; /**< \brief Specifies the payload length to be sent */
285 uint32 ssrPayloadLength; /**< \brief Specifies the payload length of SSR */
286 uint32 sorPayloadLength; /**< \brief Specifies the payload length of SOR */
287 } IfxPsi5_Psi5_TransmitControl;
288
289 /** \} */
290
291 /** \brief Pin Configuration structure
292 */
293 typedef struct
294 {
295 IFX_CONST IfxPsi5_Rx_In *in; /**< \brief The RX Pin which should be configured */
296 IfxPort_InputMode inMode; /**< \brief The pin input mode which should be configured */
297 IFX_CONST IfxPsi5_Tx_Out *out; /**< \brief The TX Pin which should be configured */
298 IfxPort_OutputMode outMode; /**< \brief The pin output mode which should be configured */
299 IfxPort_PadDriver pinDriver; /**< \brief The pad driver mode which should be configured */
300 } IfxPsi5_Psi5_PinsConfig;
301
302 /** \addtogroup IfxLld_Psi5_Psi5_Structures
303 * \{ */
304 /** \brief Channel handle data structure
305 */
306 typedef struct
307 {
308 IfxPsi5_Psi5 *module; /**< \brief The PSI5 handle structure */
309 Ifx_PSI5_CH *channel; /**< \brief Pointer to the channel registers */
310 IfxPsi5_ChannelId channelId; /**< \brief Specifies the channel index */
311 } IfxPsi5_Psi5_Channel;
312
313 /** \brief Channel configuration structure
314 */
315 typedef struct
316 {
317 IFX_CONST IfxPsi5_Psi5 *module; /**< \brief Specifies pointer to the IfxPsi5_Psi5 module handle */
318 uint32 watchdogTimerLimit[IFXPSI5_NUM_WDTS]; /**< \brief Specifies the watchdog timer limit for each of the slots 0 to 6 */
319 IfxPsi5_ChannelId channelId; /**< \brief Specifies the channel index */
320 IfxPsi5_Psi5_PulseGeneration pulseGeneration; /**< \brief Specifies the configuration for sync pulse generation */
321 IfxPsi5_Psi5_ChannelTrigger channelTrigger; /**< \brief Specifies the configuration for channel trigger */
322 IfxPsi5_Psi5_ReceiveControl receiveControl; /**< \brief Specifies the configuration for reception */
323 IfxPsi5_Psi5_TransmitControl sendControl; /**< \brief Specifies the configuration for transmission */
324 IfxPsi5_Psi5_InputOutputControl inputOutputControl; /**< \brief Specifies the configuration for input output control */
325 IFX_CONST IfxPsi5_Psi5_PinsConfig *pinsConfig; /**< \brief Pin Configuration structure */
326 } IfxPsi5_Psi5_ChannelConfig;
327
328 /** \brief PSI5 module configuration structure
329 */
330 typedef struct
331 {
332 Ifx_PSI5 *psi5; /**< \brief Specifies the pointer to the PSI5 module registers */
333 IfxPsi5_Psi5_Clock fracDiv; /**< \brief Specifies fractionally divided clock properties */
334 IfxPsi5_Psi5_Clock slowClock; /**< \brief Specifies the slower f125 clock properties */
335 IfxPsi5_Psi5_Clock fastClock; /**< \brief Specifies the faster f189 clock properties */
336 IfxPsi5_Psi5_Clock timestampClock; /**< \brief Specifies the time stamp clock properties */
337 IfxPsi5_Psi5_TimeStampConfig timestampCounterA; /**< \brief Specifies the time stamp counter A properties */
338 IfxPsi5_Psi5_TimeStampConfig timestampCounterB; /**< \brief Specifies the time stamp counter B properties */
339 IfxPsi5_Psi5_TimeStampConfig timestampCounterC; /**< \brief Specifies the time stamp counter C properties */
340 } IfxPsi5_Psi5_Config;
341
342 /** \brief Psi5 frame data union
343 */
344 typedef union
345 {
346 IfxPsi5_Psi5_Rdm rdm; /**< \brief Psi5 frame in double word format */
347 IfxPsi5_Psi5_FrameData frame; /**< \brief Psi5 frame data structure with individual members */
348 } IfxPsi5_Psi5_Frame;
349
350 /** \brief Psi5 serial message data structure
351 */
352 typedef union
353 {
354 IfxPsi5_Psi5_Rds rds; /**< \brief Psi5 serial message as unsigned 32 bit value */
355 IfxPsi5_Psi5_Message message; /**< \brief Psi5 serial message with individual members */
356 } IfxPsi5_Psi5_SerialMessage;
357
358 /** \brief startup related options TBD
359 */
360 typedef struct
361 {
362 uint8 a : 1; /**< \brief TBD */
363 uint32 b : 31; /**< \brief TBD */
364 } IfxPsi5_Psi5_StartupOptions;
365
366 /** \} */
367
368 /** \addtogroup IfxLld_Psi5_Psi5_Module
369 * \{ */
370
371 /******************************************************************************/
372 /*-------------------------Global Function Prototypes-------------------------*/
373 /******************************************************************************/
374
375 /** \brief Resets the PSI5 module
376 * \param psi5 pointer to the PSI5 module
377 * \return None
378 */
379 IFX_EXTERN void IfxPsi5_Psi5_deInitModule(IfxPsi5_Psi5 *psi5);
380
381 /** \brief Enable PSI5 kernel
382 * \param psi5 pointer to the base of PSI5 registers
383 * \return None
384 */
385 IFX_EXTERN void IfxPsi5_Psi5_enableModule(Ifx_PSI5 *psi5);
386
387 /** \brief Initialise the PSI5 with the supplied configureation
388 * \param psi5 pointer to the PSI5 module
389 * \param config pointer to the PSI5 configuration
390 * \return return TRUE on success & FALSE if configuration not valid
391 *
392 * A coding example can be found in \ref IfxLld_Psi5_Psi5_Usage
393 *
394 */
395 IFX_EXTERN boolean IfxPsi5_Psi5_initModule(IfxPsi5_Psi5 *psi5, const IfxPsi5_Psi5_Config *config);
396
397 /** \brief Initialise buffer with default PSI5 configuration
398 * \param config pointer to the PSI5 module configuration
399 * \param psi5 base address of the PSI5 register space
400 * \return None
401 *
402 * A coding example can be found in \ref IfxLld_Psi5_Psi5_Usage
403 *
404 */
405 IFX_EXTERN void IfxPsi5_Psi5_initModuleConfig(IfxPsi5_Psi5_Config *config, Ifx_PSI5 *psi5);
406
407 /** \brief Reset PSI5 kernel
408 * \param psi5 pointer to the base of PSI5 registers
409 * \return None
410 */
411 IFX_EXTERN void IfxPsi5_Psi5_resetModule(Ifx_PSI5 *psi5);
412
413 /** \} */
414
415 /** \addtogroup IfxLld_Psi5_Psi5_Channel
416 * \{ */
417
418 /******************************************************************************/
419 /*-------------------------Inline Function Prototypes-------------------------*/
420 /******************************************************************************/
421
422 /** \brief start the channel with the selected options
423 * \param channel pointer to the PSI5 channel
424 * \param options startup related options
425 * \return TRUE if successful; FALSE otherwise
426 *
427 * A coding example can be found in \ref IfxLld_Psi5_Psi5_Usage
428 *
429 */
430 IFX_INLINE boolean IfxPsi5_Psi5_startupChannel(IfxPsi5_Psi5_Channel *channel, IfxPsi5_Psi5_StartupOptions *options);
431
432 /******************************************************************************/
433 /*-------------------------Global Function Prototypes-------------------------*/
434 /******************************************************************************/
435
436 /** \brief Initialize the channel with the supplied configuration
437 * \param channel pointer to the PSI5 channel
438 * \param config pointer to the PSI5 channel configuration
439 * \return TRUE on success & FALSE if configuration not valid
440 *
441 * A coding example can be found in \ref IfxLld_Psi5_Psi5_Usage
442 *
443 */
444 IFX_EXTERN boolean IfxPsi5_Psi5_initChannel(IfxPsi5_Psi5_Channel *channel, const IfxPsi5_Psi5_ChannelConfig *config);
445
446 /** \brief Get the current channel configuration (e.g. sample settings)
447 * \param config pointer to the PSI5 channel configuration
448 * \param psi5 pointer to the PSI5 module
449 * \return None
450 *
451 * A coding example can be found in \ref IfxLld_Psi5_Psi5_Usage
452 *
453 */
454 IFX_EXTERN void IfxPsi5_Psi5_initChannelConfig(IfxPsi5_Psi5_ChannelConfig *config, IfxPsi5_Psi5 *psi5);
455
456 /** \brief Gets the received psi5 frame for the channel
457 * \param channel pointer to the PSI5 channel
458 * \param frame pointer to the PSI5 frame buffer
459 * \return TRUE if successful; FALSE if no frame available
460 *
461 * A coding example can be found in \ref IfxLld_Psi5_Psi5_Usage
462 *
463 */
464 IFX_EXTERN boolean IfxPsi5_Psi5_readChannelFrame(IfxPsi5_Psi5_Channel *channel, IfxPsi5_Psi5_Frame *frame);
465
466 /** \brief Get the received serial message for the channel
467 * \param channel pointer to the PSI5 channel
468 * \param slot Slot Id
469 * \param message pointer to the PSI5 serial message buffer
470 * \return TRUE if successful; FALSE if no serial message available
471 */
472 IFX_EXTERN boolean IfxPsi5_Psi5_readChannelSerialMessage(IfxPsi5_Psi5_Channel *channel, IfxPsi5_Slot slot, IfxPsi5_Psi5_SerialMessage *message);
473
474 /** \brief Transmit the data through the channel
475 * \param channel pointer to the PSI5 channel
476 * \param data data to be sent
477 * \return TRUE if successful; FALSE otherwise
478 *
479 * A coding example can be found in \ref IfxLld_Psi5_Psi5_Usage
480 *
481 */
482 IFX_EXTERN boolean IfxPsi5_Psi5_sendChannelData(IfxPsi5_Psi5_Channel *channel, uint64 data);
483
484 /** \} */
485
486 /** \addtogroup IfxLld_Psi5_Psi5_Clock
487 * \{ */
488
489 /******************************************************************************/
490 /*-------------------------Global Function Prototypes-------------------------*/
491 /******************************************************************************/
492
493 /** \brief Returns the configured fracDiv psi5 clock frequency in Hz.
494 * \param psi5 Pointer to the base of PSI5 registers
495 * \return Returns the configured fracDiv psi5 clock frequency in Hz.
496 */
497 IFX_EXTERN uint32 IfxPsi5_Psi5_getFracDivClock(Ifx_PSI5 *psi5);
498
499 /** \brief Configure the fracDiv clock.
500 * \param psi5 Pointer to the base of PSI5 registers
501 * \param clock Specifies the required clock frequency in Hz.
502 * \return Returns the configured clock frequency in Hz.
503 */
504 IFX_EXTERN uint32 IfxPsi5_Psi5_initializeClock(Ifx_PSI5 *psi5, const IfxPsi5_Psi5_Clock *clock);
505
506 /** \} */
507
508 /******************************************************************************/
509 /*---------------------Inline Function Implementations------------------------*/
510 /******************************************************************************/
511
512 IFX_INLINE boolean IfxPsi5_Psi5_startupChannel(IfxPsi5_Psi5_Channel *channel, IfxPsi5_Psi5_StartupOptions *options)
513 {
514 IFX_UNUSED_PARAMETER(channel);
515 IFX_UNUSED_PARAMETER(options);
516 return TRUE;
517 }
518
519
520 #endif /* IFXPSI5_PSI5_H */
IfxPsi5_Psi5_initModule
IFX_EXTERN boolean IfxPsi5_Psi5_initModule(IfxPsi5_Psi5 *psi5, const IfxPsi5_Psi5_Config *config)
Initialise the PSI5 with the supplied configureation.
Definition: IfxPsi5_Psi5.c:330
IfxPsi5_Psi5_Clock::type
IfxPsi5_ClockType type
Specifies the type of clock (fracDiv / slow 125kHz / fast 189 kHz / timestamp)
Definition: IfxPsi5_Psi5.h:182
IfxPsi5_Psi5_FrameData::messagingBitsError
uint8 messagingBitsError
Messaging bits error flag.
Definition: IfxPsi5_Psi5.h:196
IfxPsi5_Psi5_ReceiveControl::baudrateSelect
IfxPsi5_BaudRate baudrateSelect
Specifies the baudrate selection.
Definition: IfxPsi5_Psi5.h:261
IfxPsi5_Psi5_PulseGeneration::delayLength
uint32 delayLength
Specifies the additional length of the pulse width for coding a &#39;1&#39;.
Definition: IfxPsi5_Psi5.h:226
IfxPsi5_Psi5_ReceiveControl::pulseTimestampSelect
IfxPsi5_TimestampRegister pulseTimestampSelect
Specifies the timestamp register selection for pulses.
Definition: IfxPsi5_Psi5.h:262
IfxPsi5_Psi5_Rdm::highWord
uint32 highWord
Upper 32 bits of the Psi5 frame.
Definition: IfxPsi5_Psi5.h:239
IfxPsi5_Psi5_InputOutputControl::digitalInputFilterDepth
IfxPsi5_DigitalInputFilterDepth digitalInputFilterDepth
Specifies the the number of port input samples considered for floating average.
Definition: IfxPsi5_Psi5.h:207
IfxPsi5_Psi5_ChannelConfig::pulseGeneration
IfxPsi5_Psi5_PulseGeneration pulseGeneration
Specifies the configuration for sync pulse generation.
Definition: IfxPsi5_Psi5.h:320
IfxPsi5_Psi5_resetModule
IFX_EXTERN void IfxPsi5_Psi5_resetModule(Ifx_PSI5 *psi5)
Reset PSI5 kernel.
Definition: IfxPsi5_Psi5.c:540
IfxPsi5_Psi5_deInitModule
IFX_EXTERN void IfxPsi5_Psi5_deInitModule(IfxPsi5_Psi5 *psi5)
Resets the PSI5 module.
Definition: IfxPsi5_Psi5.c:54
IfxPsi5_Psi5_Config::timestampCounterC
IfxPsi5_Psi5_TimeStampConfig timestampCounterC
Specifies the time stamp counter C properties.
Definition: IfxPsi5_Psi5.h:339
IfxPsi5_Psi5_sendChannelData
IFX_EXTERN boolean IfxPsi5_Psi5_sendChannelData(IfxPsi5_Psi5_Channel *channel, uint64 data)
Transmit the data through the channel.
Definition: IfxPsi5_Psi5.c:558
IfxPsi5_Psi5_TransmitControl::ssrPayloadLength
uint32 ssrPayloadLength
Specifies the payload length of SSR.
Definition: IfxPsi5_Psi5.h:285
IfxPsi5_Psi5_ChannelConfig
Channel configuration structure.
Definition: IfxPsi5_Psi5.h:315
IfxPsi5_Psi5_Config::fracDiv
IfxPsi5_Psi5_Clock fracDiv
Specifies fractionally divided clock properties.
Definition: IfxPsi5_Psi5.h:333
IfxPsi5_Psi5_Message::serialMessageCRCFailedError
uint8 serialMessageCRCFailedError
Serial message crc error flag.
Definition: IfxPsi5_Psi5.h:217
IfxPsi5_Psi5_InputOutputControl
Input output configuration structure.
Definition: IfxPsi5_Psi5.h:203
IfxPsi5_Psi5_Config::timestampCounterB
IfxPsi5_Psi5_TimeStampConfig timestampCounterB
Specifies the time stamp counter B properties.
Definition: IfxPsi5_Psi5.h:338
IfxPsi5_Psi5_Config::fastClock
IfxPsi5_Psi5_Clock fastClock
Specifies the faster f189 clock properties.
Definition: IfxPsi5_Psi5.h:335
IfxPsi5_Psi5_PinsConfig::pinDriver
IfxPort_PadDriver pinDriver
The pad driver mode which should be configured.
Definition: IfxPsi5_Psi5.h:299
IfxPsi5_Psi5_Message
Psi5 serial message with individual members.
Definition: IfxPsi5_Psi5.h:212
IfxPsi5_Psi5_FrameData::numberOfBitsError
uint8 numberOfBitsError
Number of bits error flag.
Definition: IfxPsi5_Psi5.h:195
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:140
IfxPsi5_Psi5_FrameData::timestamp
uint32 timestamp
Timestamp.
Definition: IfxPsi5_Psi5.h:192
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxPsi5_Psi5_ReceiveControl::asynchronousModeSelected
boolean asynchronousModeSelected
Specifies the asynchronous mode of operation.
Definition: IfxPsi5_Psi5.h:253
IfxPsi5_Psi5_PinsConfig::in
IFX_CONST IfxPsi5_Rx_In * in
The RX Pin which should be configured.
Definition: IfxPsi5_Psi5.h:295
IfxPsi5_TimeBase
IfxPsi5_TimeBase
MODULE_PSI5.PGCx.TBS(x = 0,1,2),Time base.
Definition: IfxPsi5.h:268
IFXPSI5_NUM_WDTS
#define IFXPSI5_NUM_WDTS
Definition: IfxPsi5_cfg.h:66
IfxPsi5_TimestampRegister
IfxPsi5_TimestampRegister
MODULE_PSI5.RCRCx.TSP(x = 0,1,2),MODULE_PSI5.RCRCx.TSF(x = 0,1,2)Timestamp register type...
Definition: IfxPsi5.h:276
IfxPsi5_Psi5_TransmitControl::crcGenerationEnabled
boolean crcGenerationEnabled
Specifies whether the crc generation is turned on or not.
Definition: IfxPsi5_Psi5.h:281
IfxPsi5_Psi5_TransmitControl::bitStuffingEnabled
boolean bitStuffingEnabled
Specifies whether the bit stuffing is turned on or not.
Definition: IfxPsi5_Psi5.h:280
IfxPsi5_DividerMode
IfxPsi5_DividerMode
MODULE_PSI5.FDR.DM,Divider mode.
Definition: IfxPsi5.h:135
IfxPsi5_Psi5_ReceiveControl::fifoWarningLevel
uint32 fifoWarningLevel
Specifies the fifo warning level.
Definition: IfxPsi5_Psi5.h:254
IfxPsi5_Rx_In
RX pin mapping structure.
Definition: IfxPsi5_PinMap.h:56
IfxPsi5_ReceiveDataRegisterTimestamp
IfxPsi5_ReceiveDataRegisterTimestamp
MODULE_PSI5.RCRCx.TSR(x = 0,1,2),Timestamp select for receive data registers.
Definition: IfxPsi5.h:230
IfxPsi5_Psi5_ReceiveControl::verboseForAsynchronousMode
IfxPsi5_Verbose verboseForAsynchronousMode
Specifies the verbose mode selection in asynchronous mode of operation.
Definition: IfxPsi5_Psi5.h:256
uint64
unsigned long long uint64
Definition: Platform_Types.h:121
IfxPsi5_Psi5_Frame::rdm
IfxPsi5_Psi5_Rdm rdm
Psi5 frame in double word format.
Definition: IfxPsi5_Psi5.h:346
IfxPsi5_Psi5_readChannelFrame
IFX_EXTERN boolean IfxPsi5_Psi5_readChannelFrame(IfxPsi5_Psi5_Channel *channel, IfxPsi5_Psi5_Frame *frame)
Gets the received psi5 frame for the channel.
Definition: IfxPsi5_Psi5.c:514
IfxPsi5_Psi5_InputOutputControl::outputInverterEnabled
boolean outputInverterEnabled
Specifies the pulse polarity of the output.
Definition: IfxPsi5_Psi5.h:205
IfxPsi5_Psi5_initChannel
IFX_EXTERN boolean IfxPsi5_Psi5_initChannel(IfxPsi5_Psi5_Channel *channel, const IfxPsi5_Psi5_ChannelConfig *config)
Initialize the channel with the supplied configuration.
Definition: IfxPsi5_Psi5.c:95
IfxPsi5_Psi5_Channel
Channel handle data structure.
Definition: IfxPsi5_Psi5.h:306
IfxPsi5_Psi5_Message::serialData
uint16 serialData
Serial message data.
Definition: IfxPsi5_Psi5.h:214
IfxPsi5_Psi5_SerialMessage
Psi5 serial message data structure.
Definition: IfxPsi5_Psi5.h:352
IfxPsi5_Psi5_ReceiveControl
Receive control configuration structure.
Definition: IfxPsi5_Psi5.h:251
IfxPsi5_Psi5_initModuleConfig
IFX_EXTERN void IfxPsi5_Psi5_initModuleConfig(IfxPsi5_Psi5_Config *config, Ifx_PSI5 *psi5)
Initialise buffer with default PSI5 configuration.
Definition: IfxPsi5_Psi5.c:383
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxPsi5_DigitalInputFilterDepth
IfxPsi5_DigitalInputFilterDepth
MODULE_PSI5.IOCRx.DEPTH(x = 0,1,2),Digital input filter depth.
Definition: IfxPsi5.h:113
IfxPsi5_Psi5_initChannelConfig
IFX_EXTERN void IfxPsi5_Psi5_initChannelConfig(IfxPsi5_Psi5_ChannelConfig *config, IfxPsi5_Psi5 *psi5)
Get the current channel configuration (e.g. sample settings)
Definition: IfxPsi5_Psi5.c:245
IfxPsi5_Psi5_FrameData::timeslotError
uint8 timeslotError
Time slot error flag.
Definition: IfxPsi5_Psi5.h:194
IfxPsi5_Psi5_readChannelSerialMessage
IFX_EXTERN boolean IfxPsi5_Psi5_readChannelSerialMessage(IfxPsi5_Psi5_Channel *channel, IfxPsi5_Slot slot, IfxPsi5_Psi5_SerialMessage *message)
Get the received serial message for the channel.
Definition: IfxPsi5_Psi5.c:532
IfxPsi5_Psi5_Config::timestampClock
IfxPsi5_Psi5_Clock timestampClock
Specifies the time stamp clock properties.
Definition: IfxPsi5_Psi5.h:336
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxPsi5_Psi5_PulseGeneration::timeBaseSelect
IfxPsi5_TimeBase timeBaseSelect
Specifies the clock source for CTV as internal or external.
Definition: IfxPsi5_Psi5.h:227
IfxPsi5_Psi5_ChannelConfig::receiveControl
IfxPsi5_Psi5_ReceiveControl receiveControl
Specifies the configuration for reception.
Definition: IfxPsi5_Psi5.h:322
IfxPsi5_Psi5_InputOutputControl::inputInverterEnabled
boolean inputInverterEnabled
Specifies the pulse polarity of the input.
Definition: IfxPsi5_Psi5.h:206
IfxPsi5_Psi5::psi5
Ifx_PSI5 * psi5
Specifies the pointer to the PSI5 module registers.
Definition: IfxPsi5_Psi5.h:165
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxPsi5_Psi5_PinsConfig
Pin Configuration structure.
Definition: IfxPsi5_Psi5.h:293
IfxPsi5_Psi5_PinsConfig::inMode
IfxPort_InputMode inMode
The pin input mode which should be configured.
Definition: IfxPsi5_Psi5.h:296
IfxPsi5_Psi5_ChannelConfig::channelTrigger
IfxPsi5_Psi5_ChannelTrigger channelTrigger
Specifies the configuration for channel trigger.
Definition: IfxPsi5_Psi5.h:321
IfxPsi5_Psi5_FrameData::readData
uint32 readData
Received data.
Definition: IfxPsi5_Psi5.h:191
IfxPsi5_Psi5_getFracDivClock
IFX_EXTERN uint32 IfxPsi5_Psi5_getFracDivClock(Ifx_PSI5 *psi5)
Returns the configured fracDiv psi5 clock frequency in Hz.
Definition: IfxPsi5_Psi5.c:68
IfxPsi5_Psi5_FrameData::crcError
uint8 crcError
Crc error flag.
Definition: IfxPsi5_Psi5.h:189
IfxPsi5_Psi5_ReceiveControl::receiveDataRegisterTimestamp
IfxPsi5_ReceiveDataRegisterTimestamp receiveDataRegisterTimestamp
Specifies the pulse or start of frame based timestamp to be stored in receive data register RDRH...
Definition: IfxPsi5_Psi5.h:264
IfxPsi5_Psi5
PSI5 handle data structure.
Definition: IfxPsi5_Psi5.h:163
IfxPsi5_Psi5_PulseGeneration::periodicOrExternalOrBypass
IfxPsi5_TriggerType periodicOrExternalOrBypass
Specifies whether periodic trigger or external trigger or bypass is selected.
Definition: IfxPsi5_Psi5.h:229
IfxPsi5_Psi5_PulseGeneration::blankoutTime
uint32 blankoutTime
Specifies the duration of blank out period.
Definition: IfxPsi5_Psi5.h:231
IfxPsi5_Psi5_TransmitControl::sorPayloadLength
uint32 sorPayloadLength
Specifies the payload length of SOR.
Definition: IfxPsi5_Psi5.h:286
IfxPsi5_ChannelId
IfxPsi5_ChannelId
Channel Id.
Definition: IfxPsi5_cfg.h:90
IfxPsi5_Psi5_PinsConfig::out
IFX_CONST IfxPsi5_Tx_Out * out
The TX Pin which should be configured.
Definition: IfxPsi5_Psi5.h:297
IfxPsi5_Trigger
IfxPsi5_Trigger
MODULE_PSI5.PGCx.ETS(x = 0,1,2),Trigger Id.
Definition: IfxPsi5.h:285
IfxPsi5_CRCorParity
IfxPsi5_CRCorParity
MODULE_PSI5.RCRBx.CRCy(x = 0,1,2; y=0,1,2,3,4,5),CRC or parity selection.
Definition: IfxPsi5.h:95
IfxPsi5_Psi5_TransmitControl::enhancedProtocolSelected
boolean enhancedProtocolSelected
Specifies whether the enhanced protocol is selected or not.
Definition: IfxPsi5_Psi5.h:279
IfxPsi5.h
PSI5 basic functionality.
IfxPsi5_Psi5_ChannelTrigger::channelTriggerCounter
uint32 channelTriggerCounter
Specifies the channel trigger counter.
Definition: IfxPsi5_Psi5.h:173
IfxPsi5_Psi5_Message::configuration
uint8 configuration
Serial message configuration.
Definition: IfxPsi5_Psi5.h:218
IfxPsi5_Psi5_startupChannel
IFX_INLINE boolean IfxPsi5_Psi5_startupChannel(IfxPsi5_Psi5_Channel *channel, IfxPsi5_Psi5_StartupOptions *options)
start the channel with the selected options
Definition: IfxPsi5_Psi5.h:512
IfxPsi5_Psi5_Config::slowClock
IfxPsi5_Psi5_Clock slowClock
Specifies the slower f125 clock properties.
Definition: IfxPsi5_Psi5.h:334
IfxPsi5_Verbose
IfxPsi5_Verbose
MODULE_PSI5.RCRBx.VBSy(x = 0,1,2; y=0,1,2,3,4,5),Verbose mode.
Definition: IfxPsi5.h:320
IfxPsi5_Psi5_StartupOptions
startup related options TBD
Definition: IfxPsi5_Psi5.h:360
IfxPsi5_Psi5_TransmitControl::payloadLength
uint32 payloadLength
Specifies the payload length to be sent.
Definition: IfxPsi5_Psi5.h:284
IfxPsi5_Psi5_FrameData::slotCounter
uint8 slotCounter
Slot counter.
Definition: IfxPsi5_Psi5.h:193
IfxPsi5_Psi5_Clock
Clock configuration data structure.
Definition: IfxPsi5_Psi5.h:178
IfxPsi5_Psi5_Clock::frequency
uint32 frequency
Specifies the frequency for the clock.
Definition: IfxPsi5_Psi5.h:180
IfxPsi5_Psi5_PulseGeneration
Sync pulse generation configuration structure.
Definition: IfxPsi5_Psi5.h:223
IfxPsi5_Psi5_ChannelTrigger
channel trigger configuration structure
Definition: IfxPsi5_Psi5.h:170
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:151
IfxPsi5_Psi5_FrameData::crc
uint8 crc
Received crc.
Definition: IfxPsi5_Psi5.h:190
IFXPSI5_NUM_SLOTS
#define IFXPSI5_NUM_SLOTS
Definition: IfxPsi5_cfg.h:68
IfxPsi5_Psi5_FrameData::noFrameReceivedError
uint8 noFrameReceivedError
No frame received flag.
Definition: IfxPsi5_Psi5.h:197
IfxPsi5_Psi5_Frame
Psi5 frame data union.
Definition: IfxPsi5_Psi5.h:344
IfxPsi5_Psi5_TimeStampConfig
Timestamp configuration data structure.
Definition: IfxPsi5_Psi5.h:269
IfxPsi5_Psi5_TransmitControl
Transmit control configuration structure.
Definition: IfxPsi5_Psi5.h:277
IfxPsi5_FrameExpectation
IfxPsi5_FrameExpectation
MODULE_PSI5.RCRBx.FECy(x = 0,1,2; y=0,1,2,3,4,5),Frame expectation control.
Definition: IfxPsi5.h:145
IfxPsi5_Psi5_FrameData::receiveMemoryOverflowError
uint8 receiveMemoryOverflowError
Receive buffer overflow error flag.
Definition: IfxPsi5_Psi5.h:198
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxPsi5_Psi5_TransmitControl::inhibitingAutomaticTransferEnabled
boolean inhibitingAutomaticTransferEnabled
Specifies whether automatic transfer from the shift registers SSRL/H to SORL/H is inhibited or not...
Definition: IfxPsi5_Psi5.h:283
IfxPsi5_Psi5_Rdm::lowWord
uint32 lowWord
Lower 32 bits of the Psi5 frame.
Definition: IfxPsi5_Psi5.h:238
IfxPsi5_Psi5_Channel::channel
Ifx_PSI5_CH * channel
Pointer to the channel registers.
Definition: IfxPsi5_Psi5.h:309
IfxPsi5_MessagingBits
IfxPsi5_MessagingBits
MODULE_PSI5.RCRBx.MSGy(x = 0,1,2; y=0,1,2,3,4,5),Messaging bits presence.
Definition: IfxPsi5.h:222
IfxPsi5_Psi5_Rdm
Psi5 frame in double word format.
Definition: IfxPsi5_Psi5.h:236
IfxPsi5_Psi5_Rds
Psi5 serial message as unsigned 32 bit value.
Definition: IfxPsi5_Psi5.h:244
IfxPsi5_Psi5_Channel::channelId
IfxPsi5_ChannelId channelId
Specifies the channel index.
Definition: IfxPsi5_Psi5.h:310
IfxScuCcu.h
SCU basic functionality.
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:81
IfxPsi5_Psi5_ChannelTrigger::channelTriggerValue
uint32 channelTriggerValue
Specifies the channel trigger value CTV.
Definition: IfxPsi5_Psi5.h:172
IfxPsi5_ClockType
IfxPsi5_ClockType
Clock type.
Definition: IfxPsi5.h:103
IfxPsi5_Psi5_Config
PSI5 module configuration structure.
Definition: IfxPsi5_Psi5.h:330
IfxPsi5_Psi5_ChannelConfig::inputOutputControl
IfxPsi5_Psi5_InputOutputControl inputOutputControl
Specifies the configuration for input output control.
Definition: IfxPsi5_Psi5.h:324
IfxPsi5_Psi5_SerialMessage::rds
IfxPsi5_Psi5_Rds rds
Psi5 serial message as unsigned 32 bit value.
Definition: IfxPsi5_Psi5.h:354
IfxPsi5_Psi5_PulseGeneration::pulseLength
uint32 pulseLength
Specifies the standard pulse width without data coding for standard pulse width or for coding a &#39;0&#39;...
Definition: IfxPsi5_Psi5.h:225
IfxPsi5_Psi5_Rds::value
uint32 value
32 bit value of the Psi5 serial message
Definition: IfxPsi5_Psi5.h:246
IfxPsi5_Psi5_SerialMessage::message
IfxPsi5_Psi5_Message message
Psi5 serial message with individual members.
Definition: IfxPsi5_Psi5.h:355
IfxPsi5_Psi5_ChannelConfig::pinsConfig
IFX_CONST IfxPsi5_Psi5_PinsConfig * pinsConfig
Pin Configuration structure.
Definition: IfxPsi5_Psi5.h:325
IfxPsi5_TriggerType
IfxPsi5_TriggerType
Trigger type.
Definition: IfxPsi5.h:311
IfxPsi5_BaudRate
IfxPsi5_BaudRate
MODULE_PSI5.RCRCx.BRS(x = 0,1,2),Baud rate selection.
Definition: IfxPsi5.h:87
IfxPsi5_Psi5_ReceiveControl::frameTimestampSelect
IfxPsi5_TimestampRegister frameTimestampSelect
Specifies the timestamp register selection for start of frames.
Definition: IfxPsi5_Psi5.h:263
IfxPsi5_Psi5_Config::timestampCounterA
IfxPsi5_Psi5_TimeStampConfig timestampCounterA
Specifies the time stamp counter A properties.
Definition: IfxPsi5_Psi5.h:337
IfxPsi5_Psi5_ChannelConfig::sendControl
IfxPsi5_Psi5_TransmitControl sendControl
Specifies the configuration for transmission.
Definition: IfxPsi5_Psi5.h:323
IfxPsi5_Psi5_enableModule
IFX_EXTERN void IfxPsi5_Psi5_enableModule(Ifx_PSI5 *psi5)
Enable PSI5 kernel.
Definition: IfxPsi5_Psi5.c:62
IfxPsi5_Psi5_Message::messageId
uint8 messageId
Serial message Id.
Definition: IfxPsi5_Psi5.h:215
IfxPsi5_Psi5_Clock::mode
IfxPsi5_DividerMode mode
Specifies the mode of division for the clock.
Definition: IfxPsi5_Psi5.h:181
IfxPsi5_Psi5_PinsConfig::outMode
IfxPort_OutputMode outMode
The pin output mode which should be configured.
Definition: IfxPsi5_Psi5.h:298
IfxPsi5_Psi5_StartupOptions::a
uint8 a
TBD.
Definition: IfxPsi5_Psi5.h:362
IfxPsi5_Psi5_PulseGeneration::externalTimeBaseSelect
IfxPsi5_Trigger externalTimeBaseSelect
Specifies the clock source for CTV in the case of external.
Definition: IfxPsi5_Psi5.h:228
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxPsi5_Psi5_StartupOptions::b
uint32 b
TBD.
Definition: IfxPsi5_Psi5.h:363
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
IfxPsi5_Tx_Out
TX pin mapping structure.
Definition: IfxPsi5_PinMap.h:65
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxPsi5_Slot
IfxPsi5_Slot
MODULE_PSI5.RDRHx.SC(x = 0-2),Slot Id.
Definition: IfxPsi5.h:247
IfxPsi5_Psi5_initializeClock
IFX_EXTERN uint32 IfxPsi5_Psi5_initializeClock(Ifx_PSI5 *psi5, const IfxPsi5_Psi5_Clock *clock)
Configure the fracDiv clock.
Definition: IfxPsi5_Psi5.c:409
IfxPsi5_Psi5_Channel::module
IfxPsi5_Psi5 * module
The PSI5 handle structure.
Definition: IfxPsi5_Psi5.h:308
IfxPsi5_Psi5_Frame::frame
IfxPsi5_Psi5_FrameData frame
Psi5 frame data structure with individual members.
Definition: IfxPsi5_Psi5.h:347
IfxPsi5_Psi5_ChannelConfig::module
IFX_CONST IfxPsi5_Psi5 * module
Specifies pointer to the IfxPsi5_Psi5 module handle.
Definition: IfxPsi5_Psi5.h:317
IfxPsi5_Psi5_TransmitControl::startSequenceGenerationEnabled
boolean startSequenceGenerationEnabled
Specifies whether the start sequence generation is turned on or not.
Definition: IfxPsi5_Psi5.h:282
IfxPsi5_Psi5_FrameData
Psi5 frame data structure with individual members.
Definition: IfxPsi5_Psi5.h:187
IfxPsi5_Psi5_PulseGeneration::externalTriggerSelect
IfxPsi5_Trigger externalTriggerSelect
Specifies the trigger source in case of external triggerring.
Definition: IfxPsi5_Psi5.h:230


iLLD_TC38A: IfxPsi5_cfg.c Source File

  • _Impl
IfxPsi5_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxPsi5_cfg.c
3 * \brief PSI5 on-chip implementation data
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 */
43
44 /******************************************************************************/
45 /*----------------------------------Includes----------------------------------*/
46 /******************************************************************************/
47
48 #include "IfxPsi5_cfg.h"
IfxPsi5_cfg.h
PSI5 on-chip implementation data.


iLLD_TC38A: IfxPsi5_cfg.h Source File

  • _Impl
IfxPsi5_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxPsi5_cfg.h
3 * \brief PSI5 on-chip implementation data
4 * \ingroup IfxLld_Psi5
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 *
43 * \defgroup IfxLld_Psi5 PSI5
44 * \ingroup IfxLld
45 * \defgroup IfxLld_Psi5_Impl Implementation
46 * \ingroup IfxLld_Psi5
47 * \defgroup IfxLld_Psi5_Std Standard Driver
48 * \ingroup IfxLld_Psi5
49 * \defgroup IfxLld_Psi5_Impl_Enumerations Enumerations
50 * \ingroup IfxLld_Psi5_Impl
51 */
52
53 #ifndef IFXPSI5_CFG_H
54 #define IFXPSI5_CFG_H 1
55
56 /******************************************************************************/
57 /*----------------------------------Includes----------------------------------*/
58 /******************************************************************************/
59
60 /******************************************************************************/
61 /*-----------------------------------Macros-----------------------------------*/
62 /******************************************************************************/
63
64 #define IFXPSI5_STEP_RANGE 1024
65
66 #define IFXPSI5_NUM_WDTS 7
67
68 #define IFXPSI5_NUM_SLOTS 6
69
70 #define IFXPSI5_ENABLE_CHANNELTRIGGER (1 << 8)
71
72 #define IFXPSI5_ENABLE_CHANNEL (1 << 16)
73
74 #define IFXPSI5_DEFAULT_SLOWCLOCK_FREQ 4000000
75
76 #define IFXPSI5_DEFAULT_FASTCLOCK_FREQ 6000000
77
78 #define IFXPSI5_DEFAULT_TIMESTAMP_FREQ 1000000
79
80 #define IFXPSI5_NUM_CHANNELS 4
81
82 #define IFXPSI5_NUM_MODULES (1)
83
84 /******************************************************************************/
85 /*-------------------------------Enumerations---------------------------------*/
86 /******************************************************************************/
87
88 /** \brief Channel Id
89 */
90 typedef enum
91 {
92 IfxPsi5_ChannelId_none = -1, /**< \brief None of the Ifx_PSI5 Channels */
93 IfxPsi5_ChannelId_0 = 0, /**< \brief Specifies PSI5 channel 0 */
94 IfxPsi5_ChannelId_1 = 1, /**< \brief Specifies PSI5 channel 1 */
95 IfxPsi5_ChannelId_2 = 2, /**< \brief Specifies PSI5 channel 2 */
96 IfxPsi5_ChannelId_3 = 3 /**< \brief Specifies PSI5 channel 3 */
97 } IfxPsi5_ChannelId;
98
99 #endif /* IFXPSI5_CFG_H */
IfxPsi5_ChannelId_0
Specifies PSI5 channel 0.
Definition: IfxPsi5_cfg.h:93
IfxPsi5_ChannelId_2
Specifies PSI5 channel 2.
Definition: IfxPsi5_cfg.h:95
IfxPsi5_ChannelId
IfxPsi5_ChannelId
Channel Id.
Definition: IfxPsi5_cfg.h:90
IfxPsi5_ChannelId_3
Specifies PSI5 channel 3.
Definition: IfxPsi5_cfg.h:96
IfxPsi5_ChannelId_none
None of the Ifx_PSI5 Channels.
Definition: IfxPsi5_cfg.h:92
IfxPsi5_ChannelId_1
Specifies PSI5 channel 1.
Definition: IfxPsi5_cfg.h:94


iLLD_TC38A: IfxPsi5s.c Source File

  • Psi5s
  • Std
IfxPsi5s.c
Go to the documentation of this file.
1 /**
2 * \file IfxPsi5s.c
3 * \brief PSI5S basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 */
43
44 /******************************************************************************/
45 /*----------------------------------Includes----------------------------------*/
46 /******************************************************************************/
47
48 #include "IfxPsi5s.h"
49
50 /******************************************************************************/
51 /*-------------------------Function Implementations---------------------------*/
52 /******************************************************************************/
53
54 void IfxPsi5s_disableAscReceiver(Ifx_PSI5S *psi5s)
55 {
56 psi5s->WHBCON.B.CLRREN = 1;
57 }
58
59
60 void IfxPsi5s_disableModule(Ifx_PSI5S *psi5s)
61 {
62 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
63 IfxScuWdt_clearCpuEndinit(passwd);
64 psi5s->CLC.B.DISR = 1;
65 IfxScuWdt_setCpuEndinit(passwd);
66 }
67
68
69 void IfxPsi5s_enableAscReceiver(Ifx_PSI5S *psi5s)
70 {
71 psi5s->WHBCON.B.SETREN = 1;
72 }
73
74
75 void IfxPsi5s_enableDisableChannelTriggerCounters(Ifx_PSI5S *psi5s, uint32 channels, uint32 mask)
76 {
77 uint32 enableChannels = ((((psi5s->GCR.U >> IFX_PSI5S_GCR_ETC0_OFF) & ~mask) | channels) << IFX_PSI5S_GCR_ETC0_OFF);
78
79 psi5s->GCR.U = (psi5s->GCR.U & ~(IFXPSI5S_GCR_CHANNEL_TRIGGER_COUNTERS_ENABLE_MASK)) | enableChannels;
80 }
81
82
83 void IfxPsi5s_enableDisableChannels(Ifx_PSI5S *psi5s, uint32 channels, uint32 mask)
84 {
85 uint32 enableChannels = ((((psi5s->GCR.U >> IFX_PSI5S_GCR_CEN0_OFF) & ~mask) | channels) << IFX_PSI5S_GCR_CEN0_OFF);
86
87 psi5s->GCR.U = (psi5s->GCR.U & ~(IFXPSI5S_GCR_CHANNELS_ENABLE_MASK)) | enableChannels;
88 }
89
90
91 float32 IfxPsi5s_getBaudrate(Ifx_PSI5S *psi5s, boolean synchMode, boolean divMode, IfxPsi5s_AscBaudratePrescalar baudrateSelection)
92 {
93 float32 baudrate;
94 float32 fInput = 2 * IfxScuCcu_getSpbFrequency();
95
96 if (synchMode)
97 {
98 baudrate = fInput / ((baudrateSelection + 2) * 16 * (psi5s->BG.U + 1));
99 }
100 else if (divMode)
101 {
102 baudrate = fInput / ((baudrateSelection + 2) * 16 * (psi5s->BG.U + 1));
103 }
104 else
105 {
106 baudrate = (psi5s->FDV.U / IFXPSI5S_FDV_RANGE) * (fInput / (16 * (psi5s->BG.U + 1)));
107 }
108
109 return baudrate;
110 }
111
112
113 boolean IfxPsi5s_getReadFrameStatus(Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channelId)
114 {
115 return psi5s->INTSTAT[channelId].B.RDI;
116 }
117
118
119 boolean IfxPsi5s_getSuccessfullyReceivedFrameStatus(Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channelId)
120 {
121 return psi5s->INTSTAT[channelId].B.RSI;
122 }
123
124
125 void IfxPsi5s_resetModule(Ifx_PSI5S *psi5s)
126 {
127 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
128
129 IfxScuWdt_clearCpuEndinit(passwd);
130 psi5s->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
131 psi5s->KRST1.B.RST = 1;
132 IfxScuWdt_setCpuEndinit(passwd);
133
134 while (0 == psi5s->KRST0.B.RSTSTAT) /* Wait until reset is executed */
135
136 {}
137
138 IfxScuWdt_clearCpuEndinit(passwd);
139 psi5s->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
140 IfxScuWdt_setCpuEndinit(passwd);
141 }
142
143
144 void IfxPsi5s_startAscTransactions(Ifx_PSI5S *psi5s)
145 {
146 psi5s->CON.B.R = 1;
147 }
148
149
150 void IfxPsi5s_stopAscTransactions(Ifx_PSI5S *psi5s)
151 {
152 psi5s->CON.B.R = 0;
153 }
154
155
156 volatile Ifx_SRC_SRCR *IfxPsi5s_getSrcAddress(Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channel)
157 {
158 IFX_UNUSED_PARAMETER(psi5s);
159 volatile Ifx_SRC_SRCR *src;
160 src = &MODULE_SRC.PSI5S.PSI5S[0].SR[channel];
161 return src;
162 }
IfxPsi5s_getBaudrate
float32 IfxPsi5s_getBaudrate(Ifx_PSI5S *psi5s, boolean synchMode, boolean divMode, IfxPsi5s_AscBaudratePrescalar baudrateSelection)
Baudrate frequency in HZ.
Definition: IfxPsi5s.c:91
IfxScuCcu_getSpbFrequency
float32 IfxScuCcu_getSpbFrequency(void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider...
Definition: IfxScuCcu.c:479
IfxPsi5s_ChannelId
IfxPsi5s_ChannelId
PSI5S Channel Id defined in MODULE_PSI5S.RDS.B.CID.
Definition: IfxPsi5s.h:116
IfxPsi5s_AscBaudratePrescalar
IfxPsi5s_AscBaudratePrescalar
MODULE_PSI5S.BG.BR_VALUE:Baudrate prescalar select.
Definition: IfxPsi5s.h:88
IfxPsi5s.h
PSI5S basic functionality.
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxPsi5s_disableModule
void IfxPsi5s_disableModule(Ifx_PSI5S *psi5s)
Disable PSI5S kernel.
Definition: IfxPsi5s.c:60
float32
float float32
Definition: Platform_Types.h:170
IfxPsi5s_enableAscReceiver
void IfxPsi5s_enableAscReceiver(Ifx_PSI5S *psi5s)
Enable ASC receiver.
Definition: IfxPsi5s.c:69
IFXPSI5S_GCR_CHANNEL_TRIGGER_COUNTERS_ENABLE_MASK
#define IFXPSI5S_GCR_CHANNEL_TRIGGER_COUNTERS_ENABLE_MASK
Definition: IfxPsi5s_cfg.h:84
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IFXPSI5S_GCR_CHANNELS_ENABLE_MASK
#define IFXPSI5S_GCR_CHANNELS_ENABLE_MASK
//0x00FF0000
Definition: IfxPsi5s_cfg.h:82
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxPsi5s_getSuccessfullyReceivedFrameStatus
boolean IfxPsi5s_getSuccessfullyReceivedFrameStatus(Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channelId)
Indicates the successful reception of a frame.
Definition: IfxPsi5s.c:119
IfxPsi5s_startAscTransactions
void IfxPsi5s_startAscTransactions(Ifx_PSI5S *psi5s)
Start ASC transactions.
Definition: IfxPsi5s.c:144
IfxPsi5s_getReadFrameStatus
boolean IfxPsi5s_getReadFrameStatus(Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channelId)
Get the received psi5s frame for the channel.
Definition: IfxPsi5s.c:113
IfxPsi5s_disableAscReceiver
void IfxPsi5s_disableAscReceiver(Ifx_PSI5S *psi5s)
Asc receiver is disabled.
Definition: IfxPsi5s.c:54
IFXPSI5S_FDV_RANGE
#define IFXPSI5S_FDV_RANGE
Definition: IfxPsi5s_cfg.h:76
IfxPsi5s_stopAscTransactions
void IfxPsi5s_stopAscTransactions(Ifx_PSI5S *psi5s)
Definition: IfxPsi5s.c:150
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxPsi5s_resetModule
void IfxPsi5s_resetModule(Ifx_PSI5S *psi5s)
resets PSI5S kernel
Definition: IfxPsi5s.c:125
IfxPsi5s_getSrcAddress
volatile Ifx_SRC_SRCR * IfxPsi5s_getSrcAddress(Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channel)
Get address of the SRC register.
Definition: IfxPsi5s.c:156
IfxPsi5s_enableDisableChannelTriggerCounters
void IfxPsi5s_enableDisableChannelTriggerCounters(Ifx_PSI5S *psi5s, uint32 channels, uint32 mask)
Enable/disable any combination of channel trigger counters selected by mask parameter.
Definition: IfxPsi5s.c:75
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxPsi5s_enableDisableChannels
void IfxPsi5s_enableDisableChannels(Ifx_PSI5S *psi5s, uint32 channels, uint32 mask)
Enable/disable any combination of channels selected by mask parameter.
Definition: IfxPsi5s.c:83
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222


iLLD_TC38A: IfxPsi5s.h Source File

  • Psi5s
  • Std
IfxPsi5s.h
Go to the documentation of this file.
1 /**
2 * \file IfxPsi5s.h
3 * \brief PSI5S basic functionality
4 * \ingroup IfxLld_Psi5s
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 *
43 * \defgroup IfxLld_Psi5s_Std_Enumerations Enumerations
44 * \ingroup IfxLld_Psi5s_Std
45 * \defgroup IfxLld_Psi5s_Std_Channel Channel Operative Functions
46 * \ingroup IfxLld_Psi5s_Std
47 * \defgroup IfxLld_Psi5s_Std_IO IO Pin Configuration Functions
48 * \ingroup IfxLld_Psi5s_Std
49 * \defgroup IfxLld_Psi5s_Std_Interrupt Interrupt configuration functions
50 * \ingroup IfxLld_Psi5s_Std
51 * \defgroup IfxLld_Psi5s_Std_Module Module Functions
52 * \ingroup IfxLld_Psi5s_Std
53 */
54
55 #ifndef IFXPSI5S_H
56 #define IFXPSI5S_H 1
57
58 /******************************************************************************/
59 /*----------------------------------Includes----------------------------------*/
60 /******************************************************************************/
61
62 #include "_Impl/IfxPsi5s_cfg.h"
63 #include "_PinMap/IfxPsi5s_PinMap.h"
64 #include "Cpu/Std/IfxCpu_Intrinsics.h"
65 #include "IfxPsi5s_bf.h"
66 #include "IfxPsi5s_reg.h"
67 #include "Src/Std/IfxSrc.h"
68 #include "Scu/Std/IfxScuCcu.h"
69
70 /******************************************************************************/
71 /*--------------------------------Enumerations--------------------------------*/
72 /******************************************************************************/
73
74 /** \addtogroup IfxLld_Psi5s_Std_Enumerations
75 * \{ */
76 /** \brief MODULE_PSI5S.IOCR.ALTI:Alternate input
77 */
78 typedef enum
79 {
80 IfxPsi5s_AlternateInput_0 = 0, /**< \brief Alternate Input 0 */
81 IfxPsi5s_AlternateInput_1, /**< \brief Alternate Input 1 */
82 IfxPsi5s_AlternateInput_2, /**< \brief Alternate Input 2 */
83 IfxPsi5s_AlternateInput_3 /**< \brief Alternate Input 3 */
84 } IfxPsi5s_AlternateInput;
85
86 /** \brief MODULE_PSI5S.BG.BR_VALUE:Baudrate prescalar select
87 */
88 typedef enum
89 {
90 IfxPsi5s_AscBaudratePrescalar_divideBy2 = 0, /**< \brief Divide by 2 is selected for baudrate timer prescalar */
91 IfxPsi5s_AscBaudratePrescalar_divideBy3 = 1 /**< \brief Divide by 3 is selected for baudrate timer prescalar */
92 } IfxPsi5s_AscBaudratePrescalar;
93
94 /** \brief MODULE_PSI5S.CON.M:ASC mode of operation
95 */
96 typedef enum
97 {
98 IfxPsi5s_AscMode_sync = 0, /**< \brief Synchronous mode */
99 IfxPsi5s_AscMode_async_8bitData = 1, /**< \brief Asynchronous mode with 8 bit data */
100 IfxPsi5s_AscMode_async_7bitDataWithParity = 3, /**< \brief Asynchronous mode with 7 bit data with parity */
101 IfxPsi5s_AscMode_async_9bitData = 4, /**< \brief Asynchronous mode with 9 bit data */
102 IfxPsi5s_AscMode_async_8bitDataWithWakeup = 5, /**< \brief Asynchronous mode with 8 bit data with wakeup */
103 IfxPsi5s_AscMode_async_8bitDataWithParity = 7 /**< \brief Asynchronous mode with 8 bit data with parity */
104 } IfxPsi5s_AscMode;
105
106 /** \brief MODULE_PSI5S.CON.STP: Number of stop bits
107 */
108 typedef enum
109 {
110 IfxPsi5s_AscStopBits_1 = 0, /**< \brief 1 stop bit */
111 IfxPsi5s_AscStopBits_2 /**< \brief 2 stop bit */
112 } IfxPsi5s_AscStopBits;
113
114 /** \brief PSI5S Channel Id defined in MODULE_PSI5S.RDS.B.CID.
115 */
116 typedef enum
117 {
118 IfxPsi5s_ChannelId_0 = 0, /**< \brief Ifx_PSI5S Channel 0 */
119 IfxPsi5s_ChannelId_1, /**< \brief Ifx_PSI5S Channel 1 */
120 IfxPsi5s_ChannelId_2, /**< \brief Ifx_PSI5S Channel 2 */
121 IfxPsi5s_ChannelId_3, /**< \brief Ifx_PSI5S Channel 3 */
122 IfxPsi5s_ChannelId_4, /**< \brief Ifx_PSI5S Channel 4 */
123 IfxPsi5s_ChannelId_5, /**< \brief Ifx_PSI5S Channel 5 */
124 IfxPsi5s_ChannelId_6, /**< \brief Ifx_PSI5S Channel 6 */
125 IfxPsi5s_ChannelId_7, /**< \brief Ifx_PSI5S Channel 7 */
126 IfxPsi5s_ChannelId_none = -1 /**< \brief None of the Ifx_PSI5S Channels */
127 } IfxPsi5s_ChannelId;
128
129 /** \brief Clock Selection
130 */
131 typedef enum
132 {
133 IfxPsi5s_ClockType_fracDiv = 0, /**< \brief Fractional Divide clock */
134 IfxPsi5s_ClockType_timeStamp = 1, /**< \brief Timestamp clock */
135 IfxPsi5s_ClockType_ascFracDiv = 2, /**< \brief Asc Fractional divider clock */
136 IfxPsi5s_ClockType_ascOutput = 3 /**< \brief Asc output clock */
137 } IfxPsi5s_ClockType;
138
139 /** \brief MODULE_PSI5S.RCRAx.CRCy(x= 0,1,..7:y=0,1,..,5),MODULE_PSI5S.RCRBx.CRCy(x= 0,1,..7:y=0,1,..,5)CRC or parity
140 */
141 typedef enum
142 {
143 IfxPsi5s_CrcOrParity_parity = 0, /**< \brief parity selection */
144 IfxPsi5s_CrcOrParity_crc = 1 /**< \brief CRC selection */
145 } IfxPsi5s_CrcOrParity;
146
147 /** \brief MODULE_PSI5S.FDR.DM;MODULE_PSI5S.FDRT.B.DM:Divider mode
148 */
149 typedef enum
150 {
151 IfxPsi5s_DividerMode_spb = 0, /**< \brief divider mode is off */
152 IfxPsi5s_DividerMode_normal = 1, /**< \brief divider mode is normal */
153 IfxPsi5s_DividerMode_fractional = 2, /**< \brief divider mode is fractional */
154 IfxPsi5s_DividerMode_off = 3 /**< \brief divider mode is off */
155 } IfxPsi5s_DividerMode;
156
157 /** \brief MODULE_PSI5S.SCRx.EPS(x=0,1,...,7):Enhanced protocol types
158 */
159 typedef enum
160 {
161 IfxPsi5s_EnhancedProtocol_toothGapMethod = 0, /**< \brief toothGapMethod Enhanced protocol type */
162 IfxPsi5s_EnhancedProtocol_pulseWidth_frameFormat_1to3 = 1, /**< \brief pulseWidth_frameFormat_1to3 Enhanced protocol type */
163 IfxPsi5s_EnhancedProtocol_pulseWidth_frameFormat_4 = 3 /**< \brief pulseWidth_frameFormat_4 Enhanced protocol type */
164 } IfxPsi5s_EnhancedProtocol;
165
166 /** \brief MODULE_PSI5S.RCRAx.FIDS(x=0,1,....,7):.Frame ID updation
167 */
168 typedef enum
169 {
170 IfxPsi5s_FrameId_frameHeader = 0, /**< \brief Frame ID is updated from packet frame header (Sync mode) */
171 IfxPsi5s_FrameId_rollingNumber = 1 /**< \brief Frame ID is a rolling number 0 .. 5 copied from FCNT */
172 } IfxPsi5s_FrameId;
173
174 /** \brief MODULE_PSI5S.GCR.IDT:Idle time bit count
175 */
176 typedef enum
177 {
178 IfxPsi5s_IdleTime_1 = 0, /**< \brief 1 bit Idle time */
179 IfxPsi5s_IdleTime_2, /**< \brief 2 bit Idle time */
180 IfxPsi5s_IdleTime_3, /**< \brief 3 bit Idle time */
181 IfxPsi5s_IdleTime_4, /**< \brief 4 bit Idle time */
182 IfxPsi5s_IdleTime_5, /**< \brief 5 bit Idle time */
183 IfxPsi5s_IdleTime_6, /**< \brief 6 bit Idle time */
184 IfxPsi5s_IdleTime_7, /**< \brief 7 bit Idle time */
185 IfxPsi5s_IdleTime_8, /**< \brief 8 bit Idle time */
186 IfxPsi5s_IdleTime_9, /**< \brief 9 bit Idle time */
187 IfxPsi5s_IdleTime_10, /**< \brief 10 bit Idle time */
188 IfxPsi5s_IdleTime_11, /**< \brief 11 bit Idle time */
189 IfxPsi5s_IdleTime_12, /**< \brief 12 bit Idle time */
190 IfxPsi5s_IdleTime_13, /**< \brief 13 bit Idle time */
191 IfxPsi5s_IdleTime_14, /**< \brief 14 bit Idle time */
192 IfxPsi5s_IdleTime_15, /**< \brief 15 bit Idle time */
193 IfxPsi5s_IdleTime_16 /**< \brief 16 bit Idle time */
194 } IfxPsi5s_IdleTime;
195
196 /** \brief Enable/Disable interrupt request .defined in MODULE_PSI5S.INTEN[x]
197 */
198 typedef enum
199 {
200 IfxPsi5s_InterruptRequest_disabled = 0, /**< \brief no interrupt request can be generated for this source */
201 IfxPsi5s_InterruptRequest_enabled = 1 /**< \brief An Interrupt request can be generated for source */
202 } IfxPsi5s_InterruptRequest;
203
204 /** \brief Enable/Disable the interrupt and select interrupt source pointer defined in MODULE_PSI5S.INTEN[x].U
205 * and MODULE_PSI5S.INP[x].U
206 */
207 typedef enum
208 {
209 IfxPsi5s_InterruptSource_rsi = 0,
210 IfxPsi5s_InterruptSource_rdi = 1, /**< \brief Enable Interrupt Request RDI */
211 IfxPsi5s_InterruptSource_rbi = 2, /**< \brief Enable Interrupt Request RBI */
212 IfxPsi5s_InterruptSource_tei = 3, /**< \brief Enable Interrupt Request TEI */
213 IfxPsi5s_InterruptSource_chci = 4, /**< \brief Enable Interrupt Request CHCI */
214 IfxPsi5s_InterruptSource_crci = 5, /**< \brief Enable Interrupt Request CRCI */
215 IfxPsi5s_InterruptSource_tpi = 6, /**< \brief Enable Interrupt Request TPI */
216 IfxPsi5s_InterruptSource_tpoi = 7, /**< \brief Enable Interrupt Request TPOI */
217 IfxPsi5s_InterruptSource_hdi = 8 /**< \brief Enable Interrupt Request HDI */
218 } IfxPsi5s_InterruptSource;
219
220 /** \brief Enable/Disable Loop back Mode
221 */
222 typedef enum
223 {
224 IfxPsi5s_LoopBackMode_disable = 0, /**< \brief loop-back mode disabled */
225 IfxPsi5s_LoopBackMode_enable = 1 /**< \brief loop-back mode enabled */
226 } IfxPsi5s_LoopBackMode;
227
228 /** \brief Messaging bits presence
229 */
230 typedef enum
231 {
232 IfxPsi5s_MessagingBits_absent = 0, /**< \brief No messaging bits */
233 IfxPsi5s_MessagingBits_present = 1 /**< \brief 2 messaging bits */
234 } IfxPsi5s_MessagingBits;
235
236 /** \brief MODULE_PSI5S.NFC.NFx:Expected Psi5s frames
237 */
238 typedef enum
239 {
240 IfxPsi5s_NumberExpectedFrames_1 = 1, /**< \brief 1 psi5s frame expected */
241 IfxPsi5s_NumberExpectedFrames_2, /**< \brief 2 psi5s frame expected */
242 IfxPsi5s_NumberExpectedFrames_3, /**< \brief 3 psi5s frame expected */
243 IfxPsi5s_NumberExpectedFrames_4, /**< \brief 4 psi5s frame expected */
244 IfxPsi5s_NumberExpectedFrames_5, /**< \brief 5 psi5s frame expected */
245 IfxPsi5s_NumberExpectedFrames_6 /**< \brief 6 psi5s frame expected */
246 } IfxPsi5s_NumberExpectedFrames;
247
248 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
249 * Definition in Ifx_PSI5S.CLC.B.EDIS
250 */
251 typedef enum
252 {
253 IfxPsi5s_SleepMode_enable = 0, /**< \brief enables sleep mode */
254 IfxPsi5s_SleepMode_disable = 1 /**< \brief disables sleep mode */
255 } IfxPsi5s_SleepMode;
256
257 /** \brief OCDS Suspend Control (OCDS.SUS)
258 */
259 typedef enum
260 {
261 IfxPsi5s_SuspendMode_none = 0, /**< \brief No suspend */
262 IfxPsi5s_SuspendMode_hard = 1, /**< \brief Hard Suspend */
263 IfxPsi5s_SuspendMode_soft = 2 /**< \brief Soft Suspend */
264 } IfxPsi5s_SuspendMode;
265
266 /** \brief MODULE_PSI5S.TSCNTA.B.TBS;MODULE_PSI5S.TSCNTB.B.TBS:Time base
267 */
268 typedef enum
269 {
270 IfxPsi5s_TimeBase_internal = 0, /**< \brief Internal time stamp clock */
271 IfxPsi5s_TimeBase_external = 1 /**< \brief External GTM inputs */
272 } IfxPsi5s_TimeBase;
273
274 /** \brief Start/stop Current time stamp count
275 */
276 typedef enum
277 {
278 IfxPsi5s_TimeStampCount_stopped = 0, /**< \brief CTS stopped */
279 IfxPsi5s_TimeStampCount_started = 1 /**< \brief CTS Started */
280 } IfxPsi5s_TimeStampCount;
281
282 /** \brief MODULE_PSI5S.TSCNTx(x= A,B):Timestamp register
283 */
284 typedef enum
285 {
286 IfxPsi5s_TimestampRegister_a = 0, /**< \brief Timestamp register A */
287 IfxPsi5s_TimestampRegister_b = 1 /**< \brief Timestamp register B */
288 } IfxPsi5s_TimestampRegister;
289
290 /** \brief MODULE_PSI5S.RCRAx.TSTS:Timestamp trigger
291 */
292 typedef enum
293 {
294 IfxPsi5s_TimestampTrigger_syncPulse = 0, /**< \brief Timestamp trigger on sync pulse */
295 IfxPsi5s_TimestampTrigger_frame = 1 /**< \brief Timestamp trigger on any frame */
296 } IfxPsi5s_TimestampTrigger;
297
298 /** \brief MODULE_PSI5S.TSCNTA.B.ETB;MODULE_PSI5S.TSCNTB.B.ETB:Trigger Id
299 */
300 typedef enum
301 {
302 IfxPsi5s_Trigger_0 = 0, /**< \brief Trigger 0 */
303 IfxPsi5s_Trigger_1, /**< \brief Trigger 1 */
304 IfxPsi5s_Trigger_2, /**< \brief Trigger 2 */
305 IfxPsi5s_Trigger_3, /**< \brief Trigger 3 */
306 IfxPsi5s_Trigger_4, /**< \brief Trigger 4 */
307 IfxPsi5s_Trigger_5, /**< \brief Trigger 5 */
308 IfxPsi5s_Trigger_6, /**< \brief Trigger 6 */
309 IfxPsi5s_Trigger_7 /**< \brief Trigger 7 */
310 } IfxPsi5s_Trigger;
311
312 /** \brief specifies service request line defined in MODULE_PSI5S.INP[x].U
313 */
314 typedef enum
315 {
316 IfxPsi5s_TriggerOutput_0 = 0, /**< \brief Triggered output line is TRIGO_0 */
317 IfxPsi5s_TriggerOutput_1, /**< \brief Triggered output line is TRIGO_1 */
318 IfxPsi5s_TriggerOutput_2, /**< \brief Triggered output line is TRIGO_2 */
319 IfxPsi5s_TriggerOutput_3, /**< \brief Triggered output line is TRIGO_3 */
320 IfxPsi5s_TriggerOutput_4, /**< \brief Triggered output line is TRIGO_4 */
321 IfxPsi5s_TriggerOutput_5, /**< \brief Triggered output line is TRIGO_5 */
322 IfxPsi5s_TriggerOutput_6, /**< \brief Triggered output line is TRIGO_6 */
323 IfxPsi5s_TriggerOutput_7 /**< \brief Triggered output line is TRIGO_7 */
324 } IfxPsi5s_TriggerOutput;
325
326 /** \brief Trigger type defined in
327 */
328 typedef enum
329 {
330 IfxPsi5s_TriggerType_periodic = 0, /**< \brief Periodic trigger */
331 IfxPsi5s_TriggerType_external = 1 /**< \brief External trigger */
332 } IfxPsi5s_TriggerType;
333
334 /** \brief MODULE_PSI5S.RCRAx.UFCY(x=0,1,...7;y=0,1...5):UART frame count
335 */
336 typedef enum
337 {
338 IfxPsi5s_UartFrameCount_3 = 0, /**< \brief 3 UART frames */
339 IfxPsi5s_UartFrameCount_4, /**< \brief 4 UART frames */
340 IfxPsi5s_UartFrameCount_5, /**< \brief 5 UART frames */
341 IfxPsi5s_UartFrameCount_6 /**< \brief 6 UART frames */
342 } IfxPsi5s_UartFrameCount;
343
344 /** \brief MODULE_PSI5S.RCRAx.WDMS:Watchdog timer mode
345 */
346 typedef enum
347 {
348 IfxPsi5s_WatchdogTimerMode_frame = 0, /**< \brief Watch Dog Timer is restarted on reception of each recoverable frame (async mode) */
349 IfxPsi5s_WatchdogTimerMode_syncPulse = 1 /**< \brief Watch Dog Timer is restarted on Sync Pulse and stopped at reception of the last frame configured in NFC.NFx.(sync mode) */
350 } IfxPsi5s_WatchdogTimerMode;
351
352 /** \} */
353
354 /** \brief List of Global interrupt sources or registers INTxG
355 */
356 typedef enum
357 {
358 IfxPsi5s_GlobalInterruptSource_tir = 0, /**< \brief Enable Interrupt Request TIR */
359 IfxPsi5s_GlobalInterruptSource_rir = 1, /**< \brief Enable Interrupt Request RIR */
360 IfxPsi5s_GlobalInterruptSource_eir = 2, /**< \brief Enable Interrupt Request EIR */
361 IfxPsi5s_GlobalInterruptSource_tbir = 3, /**< \brief Enable Interrupt Request TBIR */
362 IfxPsi5s_GlobalInterruptSource_xcrci = 4, /**< \brief Enable Interrupt Request XCRCI */
363 IfxPsi5s_GlobalInterruptSource_foi = 5 /**< \brief Enable Interrupt Request FOI */
364 } IfxPsi5s_GlobalInterruptSource;
365
366 /** \addtogroup IfxLld_Psi5s_Std_Channel
367 * \{ */
368
369 /******************************************************************************/
370 /*-------------------------Inline Function Prototypes-------------------------*/
371 /******************************************************************************/
372
373 /** \brief fill data into tx buffer for direct transmission(in ASC mode)
374 * \param psi5s pointer to the PSI5S register space
375 * \param data Pointer to data
376 * \return None
377 */
378 IFX_INLINE void IfxPsi5s_fillAscTransmitBuffer(Ifx_PSI5S *psi5s, uint32 *data);
379
380 /** \brief received buffer in ASC mode
381 * \param psi5s Pointer to PSI5s register space
382 * \return recieved buffer value in asc mode
383 */
384 IFX_INLINE uint32 IfxPsi5s_getReceiveBuffer(Ifx_PSI5S *psi5s);
385
386 /******************************************************************************/
387 /*-------------------------Global Function Prototypes-------------------------*/
388 /******************************************************************************/
389
390 /** \brief Asc receiver is disabled
391 * \param psi5s Pointer to PSI5S module registers
392 * \return None
393 */
394 IFX_EXTERN void IfxPsi5s_disableAscReceiver(Ifx_PSI5S *psi5s);
395
396 /** \brief Enable ASC receiver
397 * \param psi5s pointer to the PSI5S register space
398 * \return None
399 */
400 IFX_EXTERN void IfxPsi5s_enableAscReceiver(Ifx_PSI5S *psi5s);
401
402 /** \brief Enable/disable any combination of channel trigger counters selected by mask parameter
403 * \param psi5s pointer to the PSI5S register space
404 * \param channels specifies the channel trigger counters which should be enabled/disabled
405 * \param mask specifies the channel trigger counters which should be modified
406 * \return None
407 */
408 IFX_EXTERN void IfxPsi5s_enableDisableChannelTriggerCounters(Ifx_PSI5S *psi5s, uint32 channels, uint32 mask);
409
410 /** \brief Enable/disable any combination of channels selected by mask parameter
411 * \param psi5s pointer to the PSI5S register space
412 * \param channels specifies the channels which should be enabled/disabled
413 * \param mask specifies the channels which should be modified
414 * \return None
415 */
416 IFX_EXTERN void IfxPsi5s_enableDisableChannels(Ifx_PSI5S *psi5s, uint32 channels, uint32 mask);
417
418 /** \brief Baudrate frequency in HZ
419 * \param psi5s Pointer to PSI5s Register space
420 * \param synchMode Pointer to the configuration structure of ASC
421 * \param divMode specifies fractional/normal divider mode
422 * \param baudrateSelection select sbaudrate prescaler
423 * \return baudrate in HZ
424 */
425 IFX_EXTERN float32 IfxPsi5s_getBaudrate(Ifx_PSI5S *psi5s, boolean synchMode, boolean divMode, IfxPsi5s_AscBaudratePrescalar baudrateSelection);
426
427 /** \brief Start ASC transactions
428 * \param psi5s pointer to the PSI5S register space
429 * \return None
430 */
431 IFX_EXTERN void IfxPsi5s_startAscTransactions(Ifx_PSI5S *psi5s);
432
433 /**
434 * \param psi5s Pointer to PSI5S module registers
435 * \return None
436 */
437 IFX_EXTERN void IfxPsi5s_stopAscTransactions(Ifx_PSI5S *psi5s);
438
439 /** \} */
440
441 /** \addtogroup IfxLld_Psi5s_Std_IO
442 * \{ */
443
444 /******************************************************************************/
445 /*-------------------------Inline Function Prototypes-------------------------*/
446 /******************************************************************************/
447
448 /** \brief Initializes a CLK output
449 * \param clk the CLK Pin which should be configured
450 * \param outputMode the pin output mode which should be configured
451 * \param padDriver the pad driver mode which should be configured
452 * \return None
453 */
454 IFX_INLINE void IfxPsi5s_initClkPin(const IfxPsi5s_Clk_Out *clk, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
455
456 /** \brief Initializes a RX input
457 * \param rx the RX Pin which should be configured
458 * \param inputMode the pin input mode which should be configured
459 * \param padDriver the pad driver mode which should be configured
460 * \return None
461 */
462 IFX_INLINE void IfxPsi5s_initRxPin(const IfxPsi5s_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
463
464 /** \brief Initializes a TX output
465 * \param tx the TX Pin which should be configured
466 * \param outputMode the pin output mode which should be configured
467 * \param padDriver the pad driver mode which should be configured
468 * \return None
469 */
470 IFX_INLINE void IfxPsi5s_initTxPin(const IfxPsi5s_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
471
472 /** \brief Selects the alternate input for Rx signal
473 * \param psi5s pointer to PSI5S registers
474 * \param alti alternate input selection of Rx signal
475 * \return None
476 */
477 IFX_INLINE void IfxPsi5s_setRxInput(Ifx_PSI5S *psi5s, IfxPsi5s_AlternateInput alti);
478
479 /** \} */
480
481 /** \addtogroup IfxLld_Psi5s_Std_Interrupt
482 * \{ */
483
484 /******************************************************************************/
485 /*-------------------------Inline Function Prototypes-------------------------*/
486 /******************************************************************************/
487
488 /** \brief Enable /Disable Global Interrupt Source
489 * \param psi5s Pointer to PSI5S Module space
490 * \param interruptSource specifies Global Interrupt Source
491 * \param enabled enable /disable Interrupt
492 * \return None
493 */
494 IFX_INLINE void IfxPsi5s_enableGlobalInterrupt(Ifx_PSI5S *psi5s, IfxPsi5s_GlobalInterruptSource interruptSource, IfxPsi5s_InterruptRequest enabled);
495
496 /** \brief enable / disable interrupt source
497 * \param psi5s pointer to psi5s register space
498 * \param channel specifies channel number
499 * \param interruptSource specifies interrupt source
500 * \param enabled Enable / Disable the interrupt
501 * \return None
502 */
503 IFX_INLINE void IfxPsi5s_enableInterrupt(Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channel, IfxPsi5s_InterruptSource interruptSource, IfxPsi5s_InterruptRequest enabled);
504
505 /** \brief Get Receive Interrupt status
506 * \param psi5s Pointer to PSI5S Register space
507 * \return Receive Interrupt status
508 */
509 IFX_INLINE boolean IfxPsi5s_getReceiveInterruptStatus(Ifx_PSI5S *psi5s);
510
511 /** \brief get Transmit Interrupt status
512 * \param psi5s Pointer to PSI5S Module space
513 * \return Transmit Interrupt status
514 */
515 IFX_INLINE boolean IfxPsi5s_getTransmitInterruptStatus(Ifx_PSI5S *psi5s);
516
517 /** \brief Sets the node pointers of PSI5-S ASC and for XCRCI and FOI
518 * \param psi5s Pointer to PSI5S Register Space
519 * \param nodePointer specifies node pointer source
520 * \param triggerOutputLine select trigger Output Line
521 * \return None
522 */
523 IFX_INLINE void IfxPsi5s_setGlobalInterruptNodePointer(Ifx_PSI5S *psi5s, IfxPsi5s_GlobalInterruptSource nodePointer, IfxPsi5s_Trigger triggerOutputLine);
524
525 /** \brief set interrupt node pointer
526 * \param psi5s specifies the pointer to PSI5S Module register space
527 * \param channel specifies channel number
528 * \param nodePointer specifies node pointer source
529 * \param triggerOutputLine select service request line
530 * \return None
531 */
532 IFX_INLINE void IfxPsi5s_setInterruptNodePointer(Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channel, IfxPsi5s_InterruptSource nodePointer, IfxPsi5s_Trigger triggerOutputLine);
533
534 /** \} */
535
536 /** \addtogroup IfxLld_Psi5s_Std_Module
537 * \{ */
538
539 /******************************************************************************/
540 /*-------------------------Inline Function Prototypes-------------------------*/
541 /******************************************************************************/
542
543 /** \brief clear time stamp counter A
544 * \param psi5s Pointer to PSI5S Module space
545 * \param clearTimeStampCounter clear time stamp counter A
546 * \return None
547 */
548 IFX_INLINE void IfxPsi5s_clearTimeStampCounterA(Ifx_PSI5S *psi5s, boolean clearTimeStampCounter);
549
550 /** \brief Clear Time Stamp Counter B
551 * \param psi5s Pointer to PSI5S Module space
552 * \param clearTimeStampCounter clear Time Stamp Counter B
553 * \return None
554 */
555 IFX_INLINE void IfxPsi5s_clearTimeStampCounterB(Ifx_PSI5S *psi5s, boolean clearTimeStampCounter);
556
557 /** \brief Returns the module's suspend state.
558 * TRUE :if module is suspended.
559 * FALSE:if module is not yet suspended.
560 * \param psi5s Pointer to PSI5S module registers
561 * \return Suspend status (TRUE / FALSE)
562 */
563 IFX_INLINE boolean IfxPsi5s_isModuleSuspended(Ifx_PSI5S *psi5s);
564
565 /** \brief enable /disable loop back mode
566 * \param psi5s pointer to PSI5S Register space
567 * \param enabled enable/disable loop back mode
568 * \return None
569 */
570 IFX_INLINE void IfxPsi5s_setLoopBackMode(Ifx_PSI5S *psi5s, IfxPsi5s_LoopBackMode enabled);
571
572 /** \brief enable / disable sleep mode
573 * \param psi5s Pointer to PSI5S register
574 * \param mode sleep mode (enable/disable)
575 * \return None
576 */
577 IFX_INLINE void IfxPsi5s_setSleepMode(Ifx_PSI5S *psi5s, IfxPsi5s_SleepMode mode);
578
579 /** \brief Configure the Module to Hard/Soft suspend mode.
580 * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
581 * \param psi5s Pointer to PSI5S module registers
582 * \param mode Module suspend mode
583 * \return None
584 */
585 IFX_INLINE void IfxPsi5s_setSuspendMode(Ifx_PSI5S *psi5s, IfxPsi5s_SuspendMode mode);
586
587 /** \brief start time stamp counter A
588 * \param psi5s Pointer to PSI5S Module space
589 * \param startTimeStamp Start/stop current time stamp count
590 * \return None
591 */
592 IFX_INLINE void IfxPsi5s_setTimeStampCounterA(Ifx_PSI5S *psi5s, IfxPsi5s_TimeStampCount startTimeStamp);
593
594 /** \brief Start Time Stamp Counter B
595 * \param psi5s Pointer to PSI5S Module Space
596 * \param startTimeStamp start time stamp
597 * \return None
598 */
599 IFX_INLINE void IfxPsi5s_setTimeStampCounterB(Ifx_PSI5S *psi5s, IfxPsi5s_TimeStampCount startTimeStamp);
600
601 /******************************************************************************/
602 /*-------------------------Global Function Prototypes-------------------------*/
603 /******************************************************************************/
604
605 /** \brief Disable PSI5S kernel
606 * \param psi5s pointer to the base of PSI5S register space
607 * \return None
608 */
609 IFX_EXTERN void IfxPsi5s_disableModule(Ifx_PSI5S *psi5s);
610
611 /** \brief Get the received psi5s frame for the channel
612 * \param psi5s Pointer to PSI5S Module
613 * \param channelId channel ID
614 * \return Frame Status
615 */
616 IFX_EXTERN boolean IfxPsi5s_getReadFrameStatus(Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channelId);
617
618 /** \brief Indicates the successful reception of a frame.
619 * \param psi5s Pointer to PSI5S module registers
620 * \param channelId Channel Number
621 */
622 IFX_EXTERN boolean IfxPsi5s_getSuccessfullyReceivedFrameStatus(Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channelId);
623
624 /** \brief resets PSI5S kernel
625 * \param psi5s pointer to PSI5S registers
626 * \return None
627 */
628 IFX_EXTERN void IfxPsi5s_resetModule(Ifx_PSI5S *psi5s);
629
630 /** \} */
631
632 /******************************************************************************/
633 /*-------------------------Inline Function Prototypes-------------------------*/
634 /******************************************************************************/
635
636 /** \brief Shows status of any interrupt in any channell in PSI5S.
637 * \param psi5s Pointer to PSI5S SFR's base address
638 * \param channel Channel ID of channel whose interrupt status is required
639 * \param interruptSource Interrupt Source to be cleared
640 */
641 IFX_INLINE boolean IfxPsi5s_getInterruptStatus(Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channel, IfxPsi5s_InterruptSource interruptSource);
642
643 /** \brief Clears the status of any interrupt of any PSI5-S channel
644 * \param psi5s Pointer to PSI5S SFR's base address
645 * \param channel Channel ID of channel whose interrupt needs to be cleared
646 * \param interruptSource Interrupt Source to be cleared
647 * \return None
648 */
649 IFX_INLINE void IfxPsi5s_clearInterruptStatus(Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channel, IfxPsi5s_InterruptSource interruptSource);
650
651 /** \brief Show the status of any global interrupt, i.e. of the ASC inside PSI5-S and XCRCI indicating a non recoverable message is received.
652 * \param psi5s Pointer to PSI5S SFR's base address
653 * \param interruptSource Interrupt source under consideration
654 */
655 IFX_INLINE boolean IfxPsi5s_getGlobalInterruptStatus(Ifx_PSI5S *psi5s, IfxPsi5s_GlobalInterruptSource interruptSource);
656
657 /** \brief Clears the status of any interrupt of the ASC
658 * integrated in PSI5-S and for XCRCI and FOI
659 * \param psi5s Pointer to PSI5S SFR's base address
660 * \param interruptSource Interrupt source under consideration
661 * \return None
662 */
663 IFX_INLINE void IfxPsi5s_clearGlobalInterruptStatus(Ifx_PSI5S *psi5s, IfxPsi5s_GlobalInterruptSource interruptSource);
664
665 /******************************************************************************/
666 /*-------------------------Global Function Prototypes-------------------------*/
667 /******************************************************************************/
668
669 /** \brief Get address of the SRC register
670 * \param psi5s Pointer to PSI5S SFR's base address
671 * \param channel Channel ID of the channel to get the corresponding SRC pointer
672 */
673 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxPsi5s_getSrcAddress(Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channel);
674
675 /******************************************************************************/
676 /*---------------------Inline Function Implementations------------------------*/
677 /******************************************************************************/
678
679 IFX_INLINE void IfxPsi5s_clearTimeStampCounterA(Ifx_PSI5S *psi5s, boolean clearTimeStampCounter)
680 {
681 psi5s->TSCNTA.B.CLRA = clearTimeStampCounter;
682 }
683
684
685 IFX_INLINE void IfxPsi5s_clearTimeStampCounterB(Ifx_PSI5S *psi5s, boolean clearTimeStampCounter)
686 {
687 psi5s->TSCNTA.B.CLRB = clearTimeStampCounter;
688 }
689
690
691 IFX_INLINE void IfxPsi5s_enableGlobalInterrupt(Ifx_PSI5S *psi5s, IfxPsi5s_GlobalInterruptSource interruptSource, IfxPsi5s_InterruptRequest enabled)
692 {
693 psi5s->INTENG.U |= (enabled << interruptSource);
694 }
695
696
697 IFX_INLINE void IfxPsi5s_enableInterrupt(Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channel, IfxPsi5s_InterruptSource interruptSource, IfxPsi5s_InterruptRequest enabled)
698 {
699 psi5s->INTEN[channel].U |= (enabled << interruptSource);
700 }
701
702
703 IFX_INLINE void IfxPsi5s_fillAscTransmitBuffer(Ifx_PSI5S *psi5s, uint32 *data)
704 {
705 psi5s->TBUF.U = *data;
706 }
707
708
709 IFX_INLINE uint32 IfxPsi5s_getReceiveBuffer(Ifx_PSI5S *psi5s)
710 {
711 return psi5s->RBUF.U;
712 }
713
714
715 IFX_INLINE boolean IfxPsi5s_getReceiveInterruptStatus(Ifx_PSI5S *psi5s)
716 {
717 return (boolean)psi5s->INTSTATG.B.RIR;
718 }
719
720
721 IFX_INLINE boolean IfxPsi5s_getTransmitInterruptStatus(Ifx_PSI5S *psi5s)
722 {
723 return (boolean)psi5s->INTSTATG.B.TIR;
724 }
725
726
727 IFX_INLINE void IfxPsi5s_initClkPin(const IfxPsi5s_Clk_Out *clk, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
728 {
729 if (clk->pin.port != NULL_PTR)
730 {
731 IfxPort_setPinModeOutput(clk->pin.port, clk->pin.pinIndex, outputMode, clk->select);
732 IfxPort_setPinPadDriver(clk->pin.port, clk->pin.pinIndex, padDriver);
733 }
734 }
735
736
737 IFX_INLINE void IfxPsi5s_initRxPin(const IfxPsi5s_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
738 {
739 if (rx->pin.port != NULL_PTR)
740 {
741 IfxPort_setPinModeInput(rx->pin.port, rx->pin.pinIndex, inputMode);
742 IfxPort_setPinPadDriver(rx->pin.port, rx->pin.pinIndex, padDriver);
743 IfxPsi5s_setRxInput(rx->module, (IfxPsi5s_AlternateInput)rx->select);
744 }
745 }
746
747
748 IFX_INLINE void IfxPsi5s_initTxPin(const IfxPsi5s_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
749 {
750 if (tx->pin.port != NULL_PTR)
751 {
752 IfxPort_setPinModeOutput(tx->pin.port, tx->pin.pinIndex, outputMode, tx->select);
753 IfxPort_setPinPadDriver(tx->pin.port, tx->pin.pinIndex, padDriver);
754 }
755 }
756
757
758 IFX_INLINE boolean IfxPsi5s_isModuleSuspended(Ifx_PSI5S *psi5s)
759 {
760 Ifx_PSI5S_OCS ocs;
761
762 // read the status
763 ocs.U = psi5s->OCS.U;
764
765 // return the status
766 return ocs.B.SUSSTA;
767 }
768
769
770 IFX_INLINE void IfxPsi5s_setGlobalInterruptNodePointer(Ifx_PSI5S *psi5s, IfxPsi5s_GlobalInterruptSource nodePointer, IfxPsi5s_Trigger triggerOutputLine)
771 {
772 psi5s->INPG.U |= (triggerOutputLine << (nodePointer * 3));
773 }
774
775
776 IFX_INLINE void IfxPsi5s_setInterruptNodePointer(Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channel, IfxPsi5s_InterruptSource nodePointer, IfxPsi5s_Trigger triggerOutputLine)
777 {
778 psi5s->INP[channel].U |= (triggerOutputLine << (nodePointer * 3));
779 }
780
781
782 IFX_INLINE void IfxPsi5s_setLoopBackMode(Ifx_PSI5S *psi5s, IfxPsi5s_LoopBackMode enabled)
783 {
784 psi5s->CON.B.LB = enabled;
785 }
786
787
788 IFX_INLINE void IfxPsi5s_setRxInput(Ifx_PSI5S *psi5s, IfxPsi5s_AlternateInput alti)
789 {
790 psi5s->IOCR.B.ALTI = alti;
791 }
792
793
794 IFX_INLINE void IfxPsi5s_setSleepMode(Ifx_PSI5S *psi5s, IfxPsi5s_SleepMode mode)
795 {
796 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
797 IfxScuWdt_clearCpuEndinit(passwd);
798 psi5s->CLC.B.EDIS = mode;
799 IfxScuWdt_setCpuEndinit(passwd);
800 }
801
802
803 IFX_INLINE void IfxPsi5s_setSuspendMode(Ifx_PSI5S *psi5s, IfxPsi5s_SuspendMode mode)
804 {
805 Ifx_PSI5S_OCS ocs;
806
807 // remove protection and configure the suspend mode.
808 ocs.B.SUS_P = 1;
809 ocs.B.SUS = mode;
810 psi5s->OCS.U = ocs.U;
811 }
812
813
814 IFX_INLINE void IfxPsi5s_setTimeStampCounterA(Ifx_PSI5S *psi5s, IfxPsi5s_TimeStampCount startTimeStamp)
815 {
816 psi5s->TSCNTA.B.TBEA = startTimeStamp;
817 }
818
819
820 IFX_INLINE void IfxPsi5s_setTimeStampCounterB(Ifx_PSI5S *psi5s, IfxPsi5s_TimeStampCount startTimeStamp)
821 {
822 psi5s->TSCNTA.B.TBEB = startTimeStamp;
823 }
824
825
826 IFX_INLINE boolean IfxPsi5s_getInterruptStatus(Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channel, IfxPsi5s_InterruptSource interruptSource)
827 {
828 return ((psi5s->INTSTAT[channel].U >> interruptSource) & 0x1) == 1;
829 }
830
831
832 IFX_INLINE void IfxPsi5s_clearInterruptStatus(Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channel, IfxPsi5s_InterruptSource interruptSource)
833 {
834 psi5s->INTCLR[channel].U = (1 << interruptSource);
835 }
836
837
838 IFX_INLINE boolean IfxPsi5s_getGlobalInterruptStatus(Ifx_PSI5S *psi5s, IfxPsi5s_GlobalInterruptSource interruptSource)
839 {
840 return ((psi5s->INTSTATG.U >> interruptSource) & 0x1) == 1;
841 }
842
843
844 IFX_INLINE void IfxPsi5s_clearGlobalInterruptStatus(Ifx_PSI5S *psi5s, IfxPsi5s_GlobalInterruptSource interruptSource)
845 {
846 psi5s->INTCLRG.U = (1 << interruptSource);
847 }
848
849
850 #endif /* IFXPSI5S_H */
IfxPsi5s_IdleTime_9
9 bit Idle time
Definition: IfxPsi5s.h:186
IfxPsi5s_getReceiveBuffer
IFX_INLINE uint32 IfxPsi5s_getReceiveBuffer(Ifx_PSI5S *psi5s)
received buffer in ASC mode
Definition: IfxPsi5s.h:709
IfxPsi5s_getTransmitInterruptStatus
IFX_INLINE boolean IfxPsi5s_getTransmitInterruptStatus(Ifx_PSI5S *psi5s)
get Transmit Interrupt status
Definition: IfxPsi5s.h:721
IfxPsi5s_IdleTime_1
1 bit Idle time
Definition: IfxPsi5s.h:178
IfxPsi5s_ClockType_fracDiv
Fractional Divide clock.
Definition: IfxPsi5s.h:133
IfxPsi5s_WatchdogTimerMode
IfxPsi5s_WatchdogTimerMode
MODULE_PSI5S.RCRAx.WDMS:Watchdog timer mode.
Definition: IfxPsi5s.h:346
IfxPsi5s_getBaudrate
IFX_EXTERN float32 IfxPsi5s_getBaudrate(Ifx_PSI5S *psi5s, boolean synchMode, boolean divMode, IfxPsi5s_AscBaudratePrescalar baudrateSelection)
Baudrate frequency in HZ.
Definition: IfxPsi5s.c:91
IfxPsi5s_UartFrameCount_4
4 UART frames
Definition: IfxPsi5s.h:339
IfxPsi5s_setInterruptNodePointer
IFX_INLINE void IfxPsi5s_setInterruptNodePointer(Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channel, IfxPsi5s_InterruptSource nodePointer, IfxPsi5s_Trigger triggerOutputLine)
set interrupt node pointer
Definition: IfxPsi5s.h:776
IfxPsi5s_ChannelId
IfxPsi5s_ChannelId
PSI5S Channel Id defined in MODULE_PSI5S.RDS.B.CID.
Definition: IfxPsi5s.h:116
IfxPsi5s_FrameId_frameHeader
Frame ID is updated from packet frame header (Sync mode)
Definition: IfxPsi5s.h:170
IfxPsi5s_ChannelId_3
Ifx_PSI5S Channel 3.
Definition: IfxPsi5s.h:121
IfxPsi5s_AscBaudratePrescalar_divideBy3
Divide by 3 is selected for baudrate timer prescalar.
Definition: IfxPsi5s.h:91
IfxPsi5s_UartFrameCount_6
6 UART frames
Definition: IfxPsi5s.h:341
IfxPsi5s_Trigger_6
Trigger 6.
Definition: IfxPsi5s.h:308
IfxPsi5s_InterruptSource_rbi
Enable Interrupt Request RBI.
Definition: IfxPsi5s.h:211
IfxPsi5s_EnhancedProtocol_pulseWidth_frameFormat_4
pulseWidth_frameFormat_4 Enhanced protocol type
Definition: IfxPsi5s.h:163
IfxPsi5s_CrcOrParity_crc
CRC selection.
Definition: IfxPsi5s.h:144
IfxPsi5s_AscBaudratePrescalar
IfxPsi5s_AscBaudratePrescalar
MODULE_PSI5S.BG.BR_VALUE:Baudrate prescalar select.
Definition: IfxPsi5s.h:88
IfxPsi5s_Rx_In
RX pin mapping structure.
Definition: IfxPsi5s_PinMap.h:56
IfxPsi5s_cfg.h
PSI5S on-chip implementation data.
IfxPsi5s_EnhancedProtocol
IfxPsi5s_EnhancedProtocol
MODULE_PSI5S.SCRx.EPS(x=0,1,...,7):Enhanced protocol types.
Definition: IfxPsi5s.h:159
IfxPsi5s_setSuspendMode
IFX_INLINE void IfxPsi5s_setSuspendMode(Ifx_PSI5S *psi5s, IfxPsi5s_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and...
Definition: IfxPsi5s.h:803
IfxPsi5s_ChannelId_4
Ifx_PSI5S Channel 4.
Definition: IfxPsi5s.h:122
IfxPsi5s_Rx_In::module
Ifx_PSI5S * module
Base address.
Definition: IfxPsi5s_PinMap.h:58
IfxPsi5s_AscMode_async_8bitData
Asynchronous mode with 8 bit data.
Definition: IfxPsi5s.h:99
IfxPsi5s_TimestampTrigger
IfxPsi5s_TimestampTrigger
MODULE_PSI5S.RCRAx.TSTS:Timestamp trigger.
Definition: IfxPsi5s.h:292
IfxPsi5s_TimestampRegister_b
Timestamp register B.
Definition: IfxPsi5s.h:287
IfxPsi5s_setTimeStampCounterB
IFX_INLINE void IfxPsi5s_setTimeStampCounterB(Ifx_PSI5S *psi5s, IfxPsi5s_TimeStampCount startTimeStamp)
Start Time Stamp Counter B.
Definition: IfxPsi5s.h:820
IfxPsi5s_TimestampRegister
IfxPsi5s_TimestampRegister
MODULE_PSI5S.TSCNTx(x= A,B):Timestamp register.
Definition: IfxPsi5s.h:284
IfxPsi5s_AscMode_async_9bitData
Asynchronous mode with 9 bit data.
Definition: IfxPsi5s.h:101
IfxPsi5s_TriggerOutput_2
Triggered output line is TRIGO_2.
Definition: IfxPsi5s.h:318
IfxPsi5s_DividerMode
IfxPsi5s_DividerMode
MODULE_PSI5S.FDR.DM;MODULE_PSI5S.FDRT.B.DM:Divider mode.
Definition: IfxPsi5s.h:149
IfxPsi5s_MessagingBits_absent
No messaging bits.
Definition: IfxPsi5s.h:232
IfxPsi5s_TriggerOutput_1
Triggered output line is TRIGO_1.
Definition: IfxPsi5s.h:317
IfxPsi5s_GlobalInterruptSource
IfxPsi5s_GlobalInterruptSource
List of Global interrupt sources or registers INTxG.
Definition: IfxPsi5s.h:356
IfxPsi5s_getSrcAddress
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxPsi5s_getSrcAddress(Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channel)
Get address of the SRC register.
Definition: IfxPsi5s.c:156
IfxPsi5s_NumberExpectedFrames_4
4 psi5s frame expected
Definition: IfxPsi5s.h:243
IfxPsi5s_setLoopBackMode
IFX_INLINE void IfxPsi5s_setLoopBackMode(Ifx_PSI5S *psi5s, IfxPsi5s_LoopBackMode enabled)
enable /disable loop back mode
Definition: IfxPsi5s.h:782
IfxPsi5s_IdleTime_11
11 bit Idle time
Definition: IfxPsi5s.h:188
IfxPsi5s_TimeStampCount_started
CTS Started.
Definition: IfxPsi5s.h:279
IfxPsi5s_AscStopBits_1
1 stop bit
Definition: IfxPsi5s.h:110
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:140
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxPsi5s_disableModule
IFX_EXTERN void IfxPsi5s_disableModule(Ifx_PSI5S *psi5s)
Disable PSI5S kernel.
Definition: IfxPsi5s.c:60
IfxPsi5s_NumberExpectedFrames_5
5 psi5s frame expected
Definition: IfxPsi5s.h:244
float32
float float32
Definition: Platform_Types.h:170
IfxPsi5s_DividerMode_normal
divider mode is normal
Definition: IfxPsi5s.h:152
IfxPsi5s_EnhancedProtocol_pulseWidth_frameFormat_1to3
pulseWidth_frameFormat_1to3 Enhanced protocol type
Definition: IfxPsi5s.h:162
IfxPsi5s_setSleepMode
IFX_INLINE void IfxPsi5s_setSleepMode(Ifx_PSI5S *psi5s, IfxPsi5s_SleepMode mode)
enable / disable sleep mode
Definition: IfxPsi5s.h:794
IfxPsi5s_IdleTime
IfxPsi5s_IdleTime
MODULE_PSI5S.GCR.IDT:Idle time bit count.
Definition: IfxPsi5s.h:176
IfxPsi5s_enableAscReceiver
IFX_EXTERN void IfxPsi5s_enableAscReceiver(Ifx_PSI5S *psi5s)
Enable ASC receiver.
Definition: IfxPsi5s.c:69
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:322
IfxPsi5s_initTxPin
IFX_INLINE void IfxPsi5s_initTxPin(const IfxPsi5s_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a TX output.
Definition: IfxPsi5s.h:748
IfxPsi5s_ChannelId_none
None of the Ifx_PSI5S Channels.
Definition: IfxPsi5s.h:126
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxPsi5s_ClockType_ascFracDiv
Asc Fractional divider clock.
Definition: IfxPsi5s.h:135
IfxPsi5s_NumberExpectedFrames
IfxPsi5s_NumberExpectedFrames
MODULE_PSI5S.NFC.NFx:Expected Psi5s frames.
Definition: IfxPsi5s.h:238
IfxPsi5s_EnhancedProtocol_toothGapMethod
toothGapMethod Enhanced protocol type
Definition: IfxPsi5s.h:161
IfxPsi5s_AscMode_sync
Synchronous mode.
Definition: IfxPsi5s.h:98
IfxSrc.h
SRC basic functionality.
IfxPsi5s_TimestampRegister_a
Timestamp register A.
Definition: IfxPsi5s.h:286
IfxPsi5s_clearTimeStampCounterB
IFX_INLINE void IfxPsi5s_clearTimeStampCounterB(Ifx_PSI5S *psi5s, boolean clearTimeStampCounter)
Clear Time Stamp Counter B.
Definition: IfxPsi5s.h:685
IfxPsi5s_Rx_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxPsi5s_PinMap.h:60
IfxCpu_Intrinsics.h
IfxPsi5s_AlternateInput_2
Alternate Input 2.
Definition: IfxPsi5s.h:82
IfxPsi5s_GlobalInterruptSource_eir
Enable Interrupt Request EIR.
Definition: IfxPsi5s.h:360
IfxPsi5s_AscMode_async_7bitDataWithParity
Asynchronous mode with 7 bit data with parity.
Definition: IfxPsi5s.h:100
IfxPsi5s_ClockType_timeStamp
Timestamp clock.
Definition: IfxPsi5s.h:134
IfxPsi5s_getGlobalInterruptStatus
IFX_INLINE boolean IfxPsi5s_getGlobalInterruptStatus(Ifx_PSI5S *psi5s, IfxPsi5s_GlobalInterruptSource interruptSource)
Show the status of any global interrupt, i.e. of the ASC inside PSI5-S and XCRCI indicating a non rec...
Definition: IfxPsi5s.h:838
IfxPsi5s_PinMap.h
PSI5S I/O map.
IfxPsi5s_enableGlobalInterrupt
IFX_INLINE void IfxPsi5s_enableGlobalInterrupt(Ifx_PSI5S *psi5s, IfxPsi5s_GlobalInterruptSource interruptSource, IfxPsi5s_InterruptRequest enabled)
Enable /Disable Global Interrupt Source.
Definition: IfxPsi5s.h:691
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxPsi5s_Clk_Out::pin
IfxPort_Pin pin
Port pin.
Definition: IfxPsi5s_PinMap.h:75
IfxPsi5s_IdleTime_7
7 bit Idle time
Definition: IfxPsi5s.h:184
IfxPsi5s_Trigger_3
Trigger 3.
Definition: IfxPsi5s.h:305
IfxPsi5s_NumberExpectedFrames_6
6 psi5s frame expected
Definition: IfxPsi5s.h:245
IfxPsi5s_clearGlobalInterruptStatus
IFX_INLINE void IfxPsi5s_clearGlobalInterruptStatus(Ifx_PSI5S *psi5s, IfxPsi5s_GlobalInterruptSource interruptSource)
Clears the status of any interrupt of the ASC integrated in PSI5-S and for XCRCI and FOI...
Definition: IfxPsi5s.h:844
IfxPsi5s_TimeStampCount
IfxPsi5s_TimeStampCount
Start/stop Current time stamp count.
Definition: IfxPsi5s.h:276
IfxPsi5s_AlternateInput_0
Alternate Input 0.
Definition: IfxPsi5s.h:80
IfxPsi5s_CrcOrParity_parity
parity selection
Definition: IfxPsi5s.h:143
IfxPort_setPinModeInput
IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode.
Definition: IfxPort.h:669
IfxPsi5s_IdleTime_8
8 bit Idle time
Definition: IfxPsi5s.h:185
IfxPsi5s_NumberExpectedFrames_2
2 psi5s frame expected
Definition: IfxPsi5s.h:241
IfxPsi5s_ChannelId_7
Ifx_PSI5S Channel 7.
Definition: IfxPsi5s.h:125
IfxPsi5s_AlternateInput_3
Alternate Input 3.
Definition: IfxPsi5s.h:83
IfxPsi5s_InterruptSource_hdi
Enable Interrupt Request HDI.
Definition: IfxPsi5s.h:217
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxPsi5s_TriggerOutput_0
Triggered output line is TRIGO_0.
Definition: IfxPsi5s.h:316
IfxPsi5s_LoopBackMode_enable
loop-back mode enabled
Definition: IfxPsi5s.h:225
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxPsi5s_MessagingBits
IfxPsi5s_MessagingBits
Messaging bits presence.
Definition: IfxPsi5s.h:230
IfxPsi5s_IdleTime_3
3 bit Idle time
Definition: IfxPsi5s.h:180
IfxPsi5s_TimeBase_external
External GTM inputs.
Definition: IfxPsi5s.h:271
IfxPsi5s_LoopBackMode
IfxPsi5s_LoopBackMode
Enable/Disable Loop back Mode.
Definition: IfxPsi5s.h:222
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxPsi5s_TriggerType
IfxPsi5s_TriggerType
Trigger type defined in.
Definition: IfxPsi5s.h:328
IfxPsi5s_FrameId
IfxPsi5s_FrameId
MODULE_PSI5S.RCRAx.FIDS(x=0,1,....,7):.Frame ID updation.
Definition: IfxPsi5s.h:168
IfxPsi5s_SuspendMode
IfxPsi5s_SuspendMode
OCDS Suspend Control (OCDS.SUS)
Definition: IfxPsi5s.h:259
IfxPsi5s_getSuccessfullyReceivedFrameStatus
IFX_EXTERN boolean IfxPsi5s_getSuccessfullyReceivedFrameStatus(Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channelId)
Indicates the successful reception of a frame.
Definition: IfxPsi5s.c:119
IfxPsi5s_setTimeStampCounterA
IFX_INLINE void IfxPsi5s_setTimeStampCounterA(Ifx_PSI5S *psi5s, IfxPsi5s_TimeStampCount startTimeStamp)
start time stamp counter A
Definition: IfxPsi5s.h:814
IfxPsi5s_InterruptSource_crci
Enable Interrupt Request CRCI.
Definition: IfxPsi5s.h:214
IfxPsi5s_clearTimeStampCounterA
IFX_INLINE void IfxPsi5s_clearTimeStampCounterA(Ifx_PSI5S *psi5s, boolean clearTimeStampCounter)
clear time stamp counter A
Definition: IfxPsi5s.h:679
IfxPsi5s_Trigger
IfxPsi5s_Trigger
MODULE_PSI5S.TSCNTA.B.ETB;MODULE_PSI5S.TSCNTB.B.ETB:Trigger Id.
Definition: IfxPsi5s.h:300
IfxPsi5s_InterruptRequest_enabled
An Interrupt request can be generated for source.
Definition: IfxPsi5s.h:201
IfxPsi5s_WatchdogTimerMode_syncPulse
Watch Dog Timer is restarted on Sync Pulse and stopped at reception of the last frame configured in N...
Definition: IfxPsi5s.h:349
IfxPsi5s_LoopBackMode_disable
loop-back mode disabled
Definition: IfxPsi5s.h:224
IfxPsi5s_DividerMode_off
divider mode is off
Definition: IfxPsi5s.h:154
IfxPsi5s_startAscTransactions
IFX_EXTERN void IfxPsi5s_startAscTransactions(Ifx_PSI5S *psi5s)
Start ASC transactions.
Definition: IfxPsi5s.c:144
IfxPsi5s_GlobalInterruptSource_rir
Enable Interrupt Request RIR.
Definition: IfxPsi5s.h:359
IfxPsi5s_TimeStampCount_stopped
CTS stopped.
Definition: IfxPsi5s.h:278
IfxPsi5s_getInterruptStatus
IFX_INLINE boolean IfxPsi5s_getInterruptStatus(Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channel, IfxPsi5s_InterruptSource interruptSource)
Shows status of any interrupt in any channell in PSI5S.
Definition: IfxPsi5s.h:826
IfxPsi5s_TriggerOutput_7
Triggered output line is TRIGO_7.
Definition: IfxPsi5s.h:323
IfxPsi5s_InterruptSource_rsi
Definition: IfxPsi5s.h:209
IfxPsi5s_DividerMode_spb
divider mode is off
Definition: IfxPsi5s.h:151
IfxPsi5s_IdleTime_16
16 bit Idle time
Definition: IfxPsi5s.h:193
IfxPsi5s_IdleTime_14
14 bit Idle time
Definition: IfxPsi5s.h:191
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:249
IfxPsi5s_TriggerOutput_3
Triggered output line is TRIGO_3.
Definition: IfxPsi5s.h:319
IfxPsi5s_ChannelId_6
Ifx_PSI5S Channel 6.
Definition: IfxPsi5s.h:124
IfxPsi5s_AscMode
IfxPsi5s_AscMode
MODULE_PSI5S.CON.M:ASC mode of operation.
Definition: IfxPsi5s.h:96
IfxPsi5s_IdleTime_10
10 bit Idle time
Definition: IfxPsi5s.h:187
IfxPsi5s_AscMode_async_8bitDataWithParity
Asynchronous mode with 8 bit data with parity.
Definition: IfxPsi5s.h:103
IfxPsi5s_getReadFrameStatus
IFX_EXTERN boolean IfxPsi5s_getReadFrameStatus(Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channelId)
Get the received psi5s frame for the channel.
Definition: IfxPsi5s.c:113
IfxPsi5s_disableAscReceiver
IFX_EXTERN void IfxPsi5s_disableAscReceiver(Ifx_PSI5S *psi5s)
Asc receiver is disabled.
Definition: IfxPsi5s.c:54
IfxPsi5s_TimestampTrigger_syncPulse
Timestamp trigger on sync pulse.
Definition: IfxPsi5s.h:294
IfxPsi5s_SuspendMode_soft
Soft Suspend.
Definition: IfxPsi5s.h:263
IfxPsi5s_TriggerType_periodic
Periodic trigger.
Definition: IfxPsi5s.h:330
IfxPsi5s_ChannelId_2
Ifx_PSI5S Channel 2.
Definition: IfxPsi5s.h:120
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:151
IfxPsi5s_AlternateInput
IfxPsi5s_AlternateInput
MODULE_PSI5S.IOCR.ALTI:Alternate input.
Definition: IfxPsi5s.h:78
IfxPsi5s_TimeBase_internal
Internal time stamp clock.
Definition: IfxPsi5s.h:270
IfxPsi5s_InterruptSource_tpi
Enable Interrupt Request TPI.
Definition: IfxPsi5s.h:215
IfxPsi5s_ChannelId_5
Ifx_PSI5S Channel 5.
Definition: IfxPsi5s.h:123
IfxPsi5s_getReceiveInterruptStatus
IFX_INLINE boolean IfxPsi5s_getReceiveInterruptStatus(Ifx_PSI5S *psi5s)
Get Receive Interrupt status.
Definition: IfxPsi5s.h:715
IfxPsi5s_SleepMode_enable
enables sleep mode
Definition: IfxPsi5s.h:253
IfxPsi5s_InterruptSource_chci
Enable Interrupt Request CHCI.
Definition: IfxPsi5s.h:213
IfxPsi5s_ChannelId_1
Ifx_PSI5S Channel 1.
Definition: IfxPsi5s.h:119
IfxPsi5s_IdleTime_4
4 bit Idle time
Definition: IfxPsi5s.h:181
IfxPsi5s_stopAscTransactions
IFX_EXTERN void IfxPsi5s_stopAscTransactions(Ifx_PSI5S *psi5s)
Definition: IfxPsi5s.c:150
IfxPsi5s_IdleTime_5
5 bit Idle time
Definition: IfxPsi5s.h:182
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxPsi5s_WatchdogTimerMode_frame
Watch Dog Timer is restarted on reception of each recoverable frame (async mode)
Definition: IfxPsi5s.h:348
IfxPsi5s_TriggerOutput_6
Triggered output line is TRIGO_6.
Definition: IfxPsi5s.h:322
IfxPsi5s_Trigger_7
Trigger 7.
Definition: IfxPsi5s.h:309
IfxPsi5s_AscStopBits_2
2 stop bit
Definition: IfxPsi5s.h:111
IfxPsi5s_TriggerType_external
External trigger.
Definition: IfxPsi5s.h:331
IfxPsi5s_SleepMode
IfxPsi5s_SleepMode
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_PSI5S.CLC.B.EDIS.
Definition: IfxPsi5s.h:251
IfxPsi5s_ClockType
IfxPsi5s_ClockType
Clock Selection.
Definition: IfxPsi5s.h:131
IfxPsi5s_AscMode_async_8bitDataWithWakeup
Asynchronous mode with 8 bit data with wakeup.
Definition: IfxPsi5s.h:102
IfxPsi5s_NumberExpectedFrames_3
3 psi5s frame expected
Definition: IfxPsi5s.h:242
IfxPsi5s_isModuleSuspended
IFX_INLINE boolean IfxPsi5s_isModuleSuspended(Ifx_PSI5S *psi5s)
Returns the module&#39;s suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspende...
Definition: IfxPsi5s.h:758
IfxPsi5s_Trigger_0
Trigger 0.
Definition: IfxPsi5s.h:302
IfxPsi5s_initClkPin
IFX_INLINE void IfxPsi5s_initClkPin(const IfxPsi5s_Clk_Out *clk, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a CLK output.
Definition: IfxPsi5s.h:727
IfxPsi5s_UartFrameCount_3
3 UART frames
Definition: IfxPsi5s.h:338
IfxScuCcu.h
SCU basic functionality.
IfxPsi5s_TimestampTrigger_frame
Timestamp trigger on any frame.
Definition: IfxPsi5s.h:295
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:81
IfxPsi5s_IdleTime_13
13 bit Idle time
Definition: IfxPsi5s.h:190
IfxPsi5s_setGlobalInterruptNodePointer
IFX_INLINE void IfxPsi5s_setGlobalInterruptNodePointer(Ifx_PSI5S *psi5s, IfxPsi5s_GlobalInterruptSource nodePointer, IfxPsi5s_Trigger triggerOutputLine)
Sets the node pointers of PSI5-S ASC and for XCRCI and FOI.
Definition: IfxPsi5s.h:770
IfxPsi5s_fillAscTransmitBuffer
IFX_INLINE void IfxPsi5s_fillAscTransmitBuffer(Ifx_PSI5S *psi5s, uint32 *data)
fill data into tx buffer for direct transmission(in ASC mode)
Definition: IfxPsi5s.h:703
IfxPsi5s_setRxInput
IFX_INLINE void IfxPsi5s_setRxInput(Ifx_PSI5S *psi5s, IfxPsi5s_AlternateInput alti)
Selects the alternate input for Rx signal.
Definition: IfxPsi5s.h:788
IfxPsi5s_MessagingBits_present
2 messaging bits
Definition: IfxPsi5s.h:233
IfxPsi5s_AscBaudratePrescalar_divideBy2
Divide by 2 is selected for baudrate timer prescalar.
Definition: IfxPsi5s.h:90
IfxPsi5s_resetModule
IFX_EXTERN void IfxPsi5s_resetModule(Ifx_PSI5S *psi5s)
resets PSI5S kernel
Definition: IfxPsi5s.c:125
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:248
IfxPsi5s_Clk_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxPsi5s_PinMap.h:76
IfxPsi5s_CrcOrParity
IfxPsi5s_CrcOrParity
MODULE_PSI5S.RCRAx.CRCy(x= 0,1,..7:y=0,1,..,5),MODULE_PSI5S.RCRBx.CRCy(x= 0,1,..7:y=0,1,..,5)CRC or parity.
Definition: IfxPsi5s.h:141
IfxPsi5s_UartFrameCount
IfxPsi5s_UartFrameCount
MODULE_PSI5S.RCRAx.UFCY(x=0,1,...7;y=0,1...5):UART frame count.
Definition: IfxPsi5s.h:336
IfxPsi5s_initRxPin
IFX_INLINE void IfxPsi5s_initRxPin(const IfxPsi5s_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a RX input.
Definition: IfxPsi5s.h:737
IfxPsi5s_NumberExpectedFrames_1
1 psi5s frame expected
Definition: IfxPsi5s.h:240
IfxPsi5s_ClockType_ascOutput
Asc output clock.
Definition: IfxPsi5s.h:136
IfxPsi5s_InterruptSource_tei
Enable Interrupt Request TEI.
Definition: IfxPsi5s.h:212
IfxPsi5s_AlternateInput_1
Alternate Input 1.
Definition: IfxPsi5s.h:81
IfxPsi5s_IdleTime_6
6 bit Idle time
Definition: IfxPsi5s.h:183
IfxPsi5s_UartFrameCount_5
5 UART frames
Definition: IfxPsi5s.h:340
IfxPsi5s_GlobalInterruptSource_tbir
Enable Interrupt Request TBIR.
Definition: IfxPsi5s.h:361
IfxPsi5s_enableDisableChannelTriggerCounters
IFX_EXTERN void IfxPsi5s_enableDisableChannelTriggerCounters(Ifx_PSI5S *psi5s, uint32 channels, uint32 mask)
Enable/disable any combination of channel trigger counters selected by mask parameter.
Definition: IfxPsi5s.c:75
IfxPsi5s_IdleTime_15
15 bit Idle time
Definition: IfxPsi5s.h:192
IfxPsi5s_Tx_Out
TX pin mapping structure.
Definition: IfxPsi5s_PinMap.h:64
IfxPsi5s_IdleTime_2
2 bit Idle time
Definition: IfxPsi5s.h:179
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxPsi5s_AscStopBits
IfxPsi5s_AscStopBits
MODULE_PSI5S.CON.STP: Number of stop bits.
Definition: IfxPsi5s.h:108
IfxPsi5s_ChannelId_0
Ifx_PSI5S Channel 0.
Definition: IfxPsi5s.h:118
IfxPsi5s_TriggerOutput_5
Triggered output line is TRIGO_5.
Definition: IfxPsi5s.h:321
IfxPsi5s_InterruptSource_rdi
Enable Interrupt Request RDI.
Definition: IfxPsi5s.h:210
IfxPsi5s_SuspendMode_hard
Hard Suspend.
Definition: IfxPsi5s.h:262
IfxPsi5s_clearInterruptStatus
IFX_INLINE void IfxPsi5s_clearInterruptStatus(Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channel, IfxPsi5s_InterruptSource interruptSource)
Clears the status of any interrupt of any PSI5-S channel.
Definition: IfxPsi5s.h:832
IfxPsi5s_Trigger_1
Trigger 1.
Definition: IfxPsi5s.h:303
IfxPsi5s_IdleTime_12
12 bit Idle time
Definition: IfxPsi5s.h:189
IfxPsi5s_GlobalInterruptSource_foi
Enable Interrupt Request FOI.
Definition: IfxPsi5s.h:363
IfxPsi5s_SuspendMode_none
No suspend.
Definition: IfxPsi5s.h:261
IfxPsi5s_enableDisableChannels
IFX_EXTERN void IfxPsi5s_enableDisableChannels(Ifx_PSI5S *psi5s, uint32 channels, uint32 mask)
Enable/disable any combination of channels selected by mask parameter.
Definition: IfxPsi5s.c:83
IfxPsi5s_SleepMode_disable
disables sleep mode
Definition: IfxPsi5s.h:254
IfxPsi5s_enableInterrupt
IFX_INLINE void IfxPsi5s_enableInterrupt(Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channel, IfxPsi5s_InterruptSource interruptSource, IfxPsi5s_InterruptRequest enabled)
enable / disable interrupt source
Definition: IfxPsi5s.h:697
IfxPsi5s_DividerMode_fractional
divider mode is fractional
Definition: IfxPsi5s.h:153
IfxPsi5s_InterruptSource_tpoi
Enable Interrupt Request TPOI.
Definition: IfxPsi5s.h:216
IfxPsi5s_Clk_Out
CLK pin mapping structure.
Definition: IfxPsi5s_PinMap.h:72
IfxPsi5s_Trigger_4
Trigger 4.
Definition: IfxPsi5s.h:306
IfxPsi5s_TimeBase
IfxPsi5s_TimeBase
MODULE_PSI5S.TSCNTA.B.TBS;MODULE_PSI5S.TSCNTB.B.TBS:Time base.
Definition: IfxPsi5s.h:268
IfxPsi5s_InterruptSource
IfxPsi5s_InterruptSource
Enable/Disable the interrupt and select interrupt source pointer defined in MODULE_PSI5S.INTEN[x].U and MODULE_PSI5S.INP[x].U.
Definition: IfxPsi5s.h:207
IfxPsi5s_InterruptRequest
IfxPsi5s_InterruptRequest
Enable/Disable interrupt request .defined in MODULE_PSI5S.INTEN[x].
Definition: IfxPsi5s.h:198
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:675
IfxPsi5s_FrameId_rollingNumber
Frame ID is a rolling number 0 .. 5 copied from FCNT.
Definition: IfxPsi5s.h:171
IfxPsi5s_InterruptRequest_disabled
no interrupt request can be generated for this source
Definition: IfxPsi5s.h:200
IfxPsi5s_Trigger_5
Trigger 5.
Definition: IfxPsi5s.h:307
IfxPsi5s_TriggerOutput_4
Triggered output line is TRIGO_4.
Definition: IfxPsi5s.h:320
IfxPsi5s_GlobalInterruptSource_xcrci
Enable Interrupt Request XCRCI.
Definition: IfxPsi5s.h:362
IfxPsi5s_Trigger_2
Trigger 2.
Definition: IfxPsi5s.h:304
IfxPsi5s_TriggerOutput
IfxPsi5s_TriggerOutput
specifies service request line defined in MODULE_PSI5S.INP[x].U
Definition: IfxPsi5s.h:314
IfxPsi5s_GlobalInterruptSource_tir
Enable Interrupt Request TIR.
Definition: IfxPsi5s.h:358


iLLD_TC38A: IfxPsi5s_PinMap.c Source File

  • _PinMap
IfxPsi5s_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxPsi5s_PinMap.c
3 * \brief PSI5S I/O map
4 * \ingroup IfxLld_Psi5s
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "IfxPsi5s_PinMap.h"
44
45 IfxPsi5s_Clk_Out IfxPsi5s_CLK_P02_4_OUT = {&MODULE_PSI5S, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt4};
46 IfxPsi5s_Clk_Out IfxPsi5s_CLK_P33_10_OUT = {&MODULE_PSI5S, {&MODULE_P33,10}, IfxPort_OutputIdx_alt5};
47 IfxPsi5s_Rx_In IfxPsi5s_RXA_P00_3_IN = {&MODULE_PSI5S, {&MODULE_P00, 3}, Ifx_RxSel_a};
48 IfxPsi5s_Rx_In IfxPsi5s_RXB_P02_5_IN = {&MODULE_PSI5S, {&MODULE_P02, 5}, Ifx_RxSel_b};
49 IfxPsi5s_Rx_In IfxPsi5s_RXC_P33_5_IN = {&MODULE_PSI5S, {&MODULE_P33, 5}, Ifx_RxSel_c};
50 IfxPsi5s_Tx_Out IfxPsi5s_TX_P00_4_OUT = {&MODULE_PSI5S, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt2};
51 IfxPsi5s_Tx_Out IfxPsi5s_TX_P02_6_OUT = {&MODULE_PSI5S, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt2};
52 IfxPsi5s_Tx_Out IfxPsi5s_TX_P33_6_OUT = {&MODULE_PSI5S, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt7};
53
54
55 const IfxPsi5s_Clk_Out *IfxPsi5s_Clk_Out_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS] = {
56 {
57 &IfxPsi5s_CLK_P02_4_OUT,
58 &IfxPsi5s_CLK_P33_10_OUT
59 }
60 };
61
62 const IfxPsi5s_Rx_In *IfxPsi5s_Rx_In_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS] = {
63 {
64 &IfxPsi5s_RXA_P00_3_IN,
65 &IfxPsi5s_RXB_P02_5_IN,
66 &IfxPsi5s_RXC_P33_5_IN
67 }
68 };
69
70 const IfxPsi5s_Tx_Out *IfxPsi5s_Tx_Out_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS] = {
71 {
72 &IfxPsi5s_TX_P00_4_OUT,
73 &IfxPsi5s_TX_P02_6_OUT,
74 &IfxPsi5s_TX_P33_6_OUT
75 }
76 };
IfxPsi5s_Tx_Out_pinTable
const IfxPsi5s_Tx_Out * IfxPsi5s_Tx_Out_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS]
Definition: IfxPsi5s_PinMap.c:70
IFXPSI5S_PINMAP_NUM_MODULES
#define IFXPSI5S_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxPsi5s_PinMap.h:90
IfxPsi5s_Rx_In
RX pin mapping structure.
Definition: IfxPsi5s_PinMap.h:56
IfxPort_OutputIdx_alt2
Definition: IfxPort.h:130
IfxPsi5s_RXC_P33_5_IN
IfxPsi5s_Rx_In IfxPsi5s_RXC_P33_5_IN
Definition: IfxPsi5s_PinMap.c:49
Ifx_RxSel_a
Definition: Ifx_Types.h:129
IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS
#define IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS
Definition: IfxPsi5s_PinMap.h:91
IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS
#define IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS
Definition: IfxPsi5s_PinMap.h:93
IfxPsi5s_PinMap.h
PSI5S I/O map.
Ifx_RxSel_b
Definition: Ifx_Types.h:130
IfxPsi5s_CLK_P33_10_OUT
IfxPsi5s_Clk_Out IfxPsi5s_CLK_P33_10_OUT
Definition: IfxPsi5s_PinMap.c:46
IfxPsi5s_RXA_P00_3_IN
IfxPsi5s_Rx_In IfxPsi5s_RXA_P00_3_IN
Definition: IfxPsi5s_PinMap.c:47
Ifx_RxSel_c
Definition: Ifx_Types.h:131
IfxPort_OutputIdx_alt4
Definition: IfxPort.h:132
IfxPsi5s_RXB_P02_5_IN
IfxPsi5s_Rx_In IfxPsi5s_RXB_P02_5_IN
Definition: IfxPsi5s_PinMap.c:48
IfxPsi5s_Clk_Out_pinTable
const IfxPsi5s_Clk_Out * IfxPsi5s_Clk_Out_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS]
Definition: IfxPsi5s_PinMap.c:55
IfxPort_OutputIdx_alt7
Definition: IfxPort.h:135
IfxPsi5s_Rx_In_pinTable
const IfxPsi5s_Rx_In * IfxPsi5s_Rx_In_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS]
Definition: IfxPsi5s_PinMap.c:62
IfxPsi5s_CLK_P02_4_OUT
IfxPsi5s_Clk_Out IfxPsi5s_CLK_P02_4_OUT
Definition: IfxPsi5s_PinMap.c:45
IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS
#define IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS
Definition: IfxPsi5s_PinMap.h:92
IfxPsi5s_TX_P33_6_OUT
IfxPsi5s_Tx_Out IfxPsi5s_TX_P33_6_OUT
Definition: IfxPsi5s_PinMap.c:52
IfxPsi5s_Tx_Out
TX pin mapping structure.
Definition: IfxPsi5s_PinMap.h:64
IfxPort_OutputIdx_alt5
Definition: IfxPort.h:133
IfxPsi5s_Clk_Out
CLK pin mapping structure.
Definition: IfxPsi5s_PinMap.h:72
IfxPsi5s_TX_P02_6_OUT
IfxPsi5s_Tx_Out IfxPsi5s_TX_P02_6_OUT
Definition: IfxPsi5s_PinMap.c:51
IfxPsi5s_TX_P00_4_OUT
IfxPsi5s_Tx_Out IfxPsi5s_TX_P00_4_OUT
Definition: IfxPsi5s_PinMap.c:50


iLLD_TC38A: IfxPsi5s_PinMap.h Source File

  • _PinMap
IfxPsi5s_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxPsi5s_PinMap.h
3 * \brief PSI5S I/O map
4 * \ingroup IfxLld_Psi5s
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Psi5s_pinmap PSI5S Pin Mapping
42 * \ingroup IfxLld_Psi5s
43 */
44
45 #ifndef IFXPSI5S_PINMAP_H
46 #define IFXPSI5S_PINMAP_H
47
48 #include <IfxPsi5s_reg.h>
49 #include <_Impl/IfxPsi5s_cfg.h>
50 #include <Port/Std/IfxPort.h>
51
52 /** \addtogroup IfxLld_Psi5s_pinmap
53 * \{ */
54
55 /** \brief RX pin mapping structure */
56 typedef const struct
57 {
58 Ifx_PSI5S* module; /**< \brief Base address */
59 IfxPort_Pin pin; /**< \brief Port pin */
60 Ifx_RxSel select; /**< \brief Input multiplexer value */
61 } IfxPsi5s_Rx_In;
62
63 /** \brief TX pin mapping structure */
64 typedef const struct
65 {
66 Ifx_PSI5S* module; /**< \brief Base address */
67 IfxPort_Pin pin; /**< \brief Port pin */
68 IfxPort_OutputIdx select; /**< \brief Port control code */
69 } IfxPsi5s_Tx_Out;
70
71 /** \brief CLK pin mapping structure */
72 typedef const struct
73 {
74 Ifx_PSI5S* module; /**< \brief Base address */
75 IfxPort_Pin pin; /**< \brief Port pin */
76 IfxPort_OutputIdx select; /**< \brief Port control code */
77 } IfxPsi5s_Clk_Out;
78
79
80 IFX_EXTERN IfxPsi5s_Clk_Out IfxPsi5s_CLK_P02_4_OUT; /**< \brief PSI5S CLK is a clock that can be used on a pin to drive the external PHY. */
81 IFX_EXTERN IfxPsi5s_Clk_Out IfxPsi5s_CLK_P33_10_OUT; /**< \brief PSI5S CLK is a clock that can be used on a pin to drive the external PHY. */
82 IFX_EXTERN IfxPsi5s_Rx_In IfxPsi5s_RXA_P00_3_IN; /**< \brief RX data input */
83 IFX_EXTERN IfxPsi5s_Rx_In IfxPsi5s_RXB_P02_5_IN; /**< \brief RX data input */
84 IFX_EXTERN IfxPsi5s_Rx_In IfxPsi5s_RXC_P33_5_IN; /**< \brief RX data input */
85 IFX_EXTERN IfxPsi5s_Tx_Out IfxPsi5s_TX_P00_4_OUT; /**< \brief TX data output */
86 IFX_EXTERN IfxPsi5s_Tx_Out IfxPsi5s_TX_P02_6_OUT; /**< \brief TX data output */
87 IFX_EXTERN IfxPsi5s_Tx_Out IfxPsi5s_TX_P33_6_OUT; /**< \brief TX data output */
88
89 /** \brief Table dimensions */
90 #define IFXPSI5S_PINMAP_NUM_MODULES 1
91 #define IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS 2
92 #define IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS 3
93 #define IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS 3
94
95
96 /** \brief IfxPsi5s_Clk_Out table */
97 IFX_EXTERN const IfxPsi5s_Clk_Out *IfxPsi5s_Clk_Out_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS];
98
99 /** \brief IfxPsi5s_Rx_In table */
100 IFX_EXTERN const IfxPsi5s_Rx_In *IfxPsi5s_Rx_In_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS];
101
102 /** \brief IfxPsi5s_Tx_Out table */
103 IFX_EXTERN const IfxPsi5s_Tx_Out *IfxPsi5s_Tx_Out_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS];
104
105 /** \} */
106
107 #endif /* IFXPSI5S_PINMAP_H */
IfxPsi5s_CLK_P33_10_OUT
IFX_EXTERN IfxPsi5s_Clk_Out IfxPsi5s_CLK_P33_10_OUT
PSI5S CLK is a clock that can be used on a pin to drive the external PHY.
Definition: IfxPsi5s_PinMap.h:81
IFXPSI5S_PINMAP_NUM_MODULES
#define IFXPSI5S_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxPsi5s_PinMap.h:90
IfxPsi5s_TX_P00_4_OUT
IFX_EXTERN IfxPsi5s_Tx_Out IfxPsi5s_TX_P00_4_OUT
TX data output.
Definition: IfxPsi5s_PinMap.h:85
IfxPsi5s_Rx_In
RX pin mapping structure.
Definition: IfxPsi5s_PinMap.h:56
IfxPsi5s_cfg.h
PSI5S on-chip implementation data.
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:126
IfxPsi5s_Rx_In::module
Ifx_PSI5S * module
Base address.
Definition: IfxPsi5s_PinMap.h:58
IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS
#define IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS
Definition: IfxPsi5s_PinMap.h:91
IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS
#define IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS
Definition: IfxPsi5s_PinMap.h:93
IfxPsi5s_Rx_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxPsi5s_PinMap.h:60
IfxPsi5s_CLK_P02_4_OUT
IFX_EXTERN IfxPsi5s_Clk_Out IfxPsi5s_CLK_P02_4_OUT
PSI5S CLK is a clock that can be used on a pin to drive the external PHY.
Definition: IfxPsi5s_PinMap.h:80
IfxPsi5s_Rx_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxPsi5s_PinMap.h:59
IfxPsi5s_RXB_P02_5_IN
IFX_EXTERN IfxPsi5s_Rx_In IfxPsi5s_RXB_P02_5_IN
RX data input.
Definition: IfxPsi5s_PinMap.h:83
IfxPsi5s_TX_P33_6_OUT
IFX_EXTERN IfxPsi5s_Tx_Out IfxPsi5s_TX_P33_6_OUT
TX data output.
Definition: IfxPsi5s_PinMap.h:87
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxPsi5s_Rx_In_pinTable
IFX_EXTERN const IfxPsi5s_Rx_In * IfxPsi5s_Rx_In_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS]
IfxPsi5s_Rx_In table.
Definition: IfxPsi5s_PinMap.h:100
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:246
Ifx_RxSel
Ifx_RxSel
input multiplexer definition used in PinMaps
Definition: Ifx_Types.h:127
IfxPsi5s_Tx_Out_pinTable
IFX_EXTERN const IfxPsi5s_Tx_Out * IfxPsi5s_Tx_Out_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS]
IfxPsi5s_Tx_Out table.
Definition: IfxPsi5s_PinMap.h:103
IfxPsi5s_Tx_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxPsi5s_PinMap.h:68
IfxPsi5s_RXC_P33_5_IN
IFX_EXTERN IfxPsi5s_Rx_In IfxPsi5s_RXC_P33_5_IN
RX data input.
Definition: IfxPsi5s_PinMap.h:84
IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS
#define IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS
Definition: IfxPsi5s_PinMap.h:92
IfxPsi5s_RXA_P00_3_IN
IFX_EXTERN IfxPsi5s_Rx_In IfxPsi5s_RXA_P00_3_IN
RX data input.
Definition: IfxPsi5s_PinMap.h:82
IfxPsi5s_Clk_Out_pinTable
IFX_EXTERN const IfxPsi5s_Clk_Out * IfxPsi5s_Clk_Out_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS]
IfxPsi5s_Clk_Out table.
Definition: IfxPsi5s_PinMap.h:97
IfxPsi5s_Tx_Out
TX pin mapping structure.
Definition: IfxPsi5s_PinMap.h:64
IfxPsi5s_TX_P02_6_OUT
IFX_EXTERN IfxPsi5s_Tx_Out IfxPsi5s_TX_P02_6_OUT
TX data output.
Definition: IfxPsi5s_PinMap.h:86
IfxPsi5s_Clk_Out
CLK pin mapping structure.
Definition: IfxPsi5s_PinMap.h:72
IfxPort.h
PORT basic functionality.


iLLD_TC38A: IfxPsi5s_Psi5s.c Source File

  • Psi5s
  • Psi5s
IfxPsi5s_Psi5s.c
Go to the documentation of this file.
1 /**
2 * \file IfxPsi5s_Psi5s.c
3 * \brief PSI5S PSI5S details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 */
43
44 /******************************************************************************/
45 /*----------------------------------Includes----------------------------------*/
46 /******************************************************************************/
47
48 #include "IfxPsi5s_Psi5s.h"
49
50 /** \addtogroup IfxLld_Psi5s_Psi5s_Utility
51 * \{ */
52
53 /******************************************************************************/
54 /*-----------------------Private Function Prototypes--------------------------*/
55 /******************************************************************************/
56
57 /** \brief get the fracDiv clock frequency
58 * \param psi5s Pointer to the base of PSI5S register space
59 * \return Returns the configured fracDiv psi5s clock frequency in Hz.
60 */
61 IFX_STATIC uint32 IfxPsi5s_Psi5s_getFracDivClock(Ifx_PSI5S *psi5s);
62
63 /** \brief Configure the fracDiv clock.
64 * \param psi5s Pointer to the base of PSI5S register space
65 * \param clock Specifies the required clock frequency in Hz.
66 * \return Returns the configured clock frequency in Hz.
67 */
68 IFX_STATIC uint32 IfxPsi5s_Psi5s_initializeClock(Ifx_PSI5S *psi5s, const IfxPsi5s_Psi5s_Clock *clock);
69
70 /** \brief Configure the baudrate at the ASC interface.
71 * \param psi5s Pointer to the base of PSI5S register space
72 * \param baudrate Frequency Specifies the required baudrate frequency in Hz.
73 * \param ascConfig pointer to the configuration structure for ASC
74 * \return Returns the configured baudrate frequency in Hz.
75 */
76 IFX_STATIC uint32 IfxPsi5s_Psi5s_setBaudrate(Ifx_PSI5S *psi5s, uint32 baudrate, IfxPsi5s_Psi5s_AscConfig *ascConfig);
77
78 /** \} */
79
80 /******************************************************************************/
81 /*-------------------------Function Implementations---------------------------*/
82 /******************************************************************************/
83
84 void IfxPsi5s_Psi5s_deInitModule(IfxPsi5s_Psi5s *psi5s)
85 {
86 Ifx_PSI5S *psi5sSFR = psi5s->psi5s;
87 IfxPsi5s_Psi5s_resetModule(psi5sSFR);
88 }
89
90
91 void IfxPsi5s_Psi5s_enableModule(Ifx_PSI5S *psi5s)
92 {
93 psi5s->CLC.U = 0x00000000;
94 }
95
96
97 void IfxPsi5s_Psi5s_getBaudrate(Ifx_PSI5S *psi5s, IfxPsi5s_Psi5s_AscConfig *ascConfig)
98 {
99 boolean synchMode = (ascConfig->receiveMode == IfxPsi5s_AscMode_sync) || (ascConfig->transmitMode == IfxPsi5s_AscMode_sync);
100 boolean divMode = (ascConfig->fractionalDividerEnabled == FALSE);
101 IfxPsi5s_getBaudrate(psi5s, synchMode, divMode, ascConfig->baudrateSelection);
102 }
103
104
105 IFX_STATIC uint32 IfxPsi5s_Psi5s_getFracDivClock(Ifx_PSI5S *psi5s)
106 {
107 uint32 result;
108 uint32 fPsi5s = IfxScuCcu_getSpbFrequency();
109
110 switch (psi5s->FDR.B.DM)
111 {
112 case IfxPsi5s_DividerMode_spb:
113 result = fPsi5s;
114 break;
115 case IfxPsi5s_DividerMode_normal:
116 result = fPsi5s / (IFXPSI5S_STEP_RANGE - psi5s->FDR.B.STEP);
117 break;
118 case IfxPsi5s_DividerMode_fractional:
119 result = (fPsi5s * IFXPSI5S_STEP_RANGE) / psi5s->FDR.B.STEP;
120 break;
121 case IfxPsi5s_DividerMode_off:
122 result = 0;
123 break;
124 default:
125 result = 0;
126 }
127
128 return result;
129 }
130
131
132 boolean IfxPsi5s_Psi5s_initChannel(IfxPsi5s_Psi5s_Channel *channel, const IfxPsi5s_Psi5s_ChannelConfig *config)
133 {
134 boolean status = TRUE;
135
136 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
137 IfxScuWdt_clearCpuEndinit(passwd);
138
139 Ifx_PSI5S *psi5s = config->module->psi5s;
140 channel->module = (IfxPsi5s_Psi5s *)config->module;
141 channel->channelId = config->channelId;
142
143 Ifx_PSI5S_PGC tempPGC;
144 tempPGC.U = psi5s->PGC[config->channelId].U;
145 tempPGC.B.TXCMD = config->pulseGeneration.codeforZero;
146 tempPGC.B.ATXCMD = config->pulseGeneration.codeforOne;
147 tempPGC.B.TBS = config->pulseGeneration.timeBaseSelect;
148 tempPGC.B.ETB = config->pulseGeneration.externalTimeBaseSelect;
149 tempPGC.B.ETS = config->pulseGeneration.externalTriggerSelect;
150
151 switch (config->pulseGeneration.periodicOrExternal)
152 {
153 case IfxPsi5s_TriggerType_periodic:
154 tempPGC.B.PTE = TRUE;
155 tempPGC.B.ETE = FALSE;
156 break;
157
158 case IfxPsi5s_TriggerType_external:
159 tempPGC.B.PTE = FALSE;
160 tempPGC.B.ETE = TRUE;
161 break;
162 }
163
164 psi5s->PGC[config->channelId].U = tempPGC.U;
165
166 Ifx_PSI5S_CTV tempCTV;
167 tempCTV.U = psi5s->CTV[config->channelId].U;
168 tempCTV.B.CTV = config->channelTrigger.channelTriggerValue;
169 tempCTV.B.CTC = config->channelTrigger.channelTriggerCounter;
170 psi5s->CTV[config->channelId].U = tempCTV.U;
171
172 psi5s->WDT[config->channelId].U = config->watchdogTimerLimit;
173
174 Ifx_PSI5S_RCRA tempRCRA;
175 tempRCRA.U = psi5s->RCRA[config->channelId].U;
176 tempRCRA.B.CRC0 = config->receiveControl.crcOrParity[0];
177 tempRCRA.B.CRC1 = config->receiveControl.crcOrParity[1];
178 tempRCRA.B.CRC2 = config->receiveControl.crcOrParity[2];
179 tempRCRA.B.CRC3 = config->receiveControl.crcOrParity[3];
180 tempRCRA.B.CRC4 = config->receiveControl.crcOrParity[4];
181 tempRCRA.B.CRC5 = config->receiveControl.crcOrParity[5];
182 tempRCRA.B.TSEN = config->receiveControl.timestampEnabled;
183 tempRCRA.B.TSP = config->receiveControl.timestampSelect;
184 tempRCRA.B.TSTS = config->receiveControl.timestampTriggerSelect;
185 tempRCRA.B.FIDS = config->receiveControl.frameIdSelect;
186 tempRCRA.B.WDMS = config->receiveControl.watchdogTimerModeSelect;
187 tempRCRA.B.UFC0 = config->receiveControl.uartFrameCount[0];
188 tempRCRA.B.UFC1 = config->receiveControl.uartFrameCount[1];
189 tempRCRA.B.UFC2 = config->receiveControl.uartFrameCount[2];
190 tempRCRA.B.UFC3 = config->receiveControl.uartFrameCount[3];
191 tempRCRA.B.UFC4 = config->receiveControl.uartFrameCount[4];
192 tempRCRA.B.UFC5 = config->receiveControl.uartFrameCount[5];
193 psi5s->RCRA[config->channelId].U = tempRCRA.U;
194
195 Ifx_PSI5S_RCRB tempRCRB;
196 tempRCRB.U = psi5s->RCRB[config->channelId].U;
197 tempRCRB.B.PDL0 = config->receiveControl.payloadLength[0];
198 tempRCRB.B.PDL1 = config->receiveControl.payloadLength[1];
199 tempRCRB.B.PDL2 = config->receiveControl.payloadLength[2];
200 tempRCRB.B.PDL3 = config->receiveControl.payloadLength[3];
201 tempRCRB.B.PDL4 = config->receiveControl.payloadLength[4];
202 tempRCRB.B.PDL5 = config->receiveControl.payloadLength[5];
203 psi5s->RCRB[config->channelId].U = tempRCRB.U;
204
205 psi5s->NFC.U = (config->receiveControl.numberOfFramesExpected << (config->channelId * 3));
206
207 Ifx_PSI5S_SCR tempSCR;
208 tempSCR.U = psi5s->SCR[config->channelId].U;
209 tempSCR.B.PLL = config->sendControl.payloadLength;
210 tempSCR.B.EPS = config->sendControl.enhancedProtocolSelection;
211 tempSCR.B.BSC = config->sendControl.bitStuffControl;
212 tempSCR.B.CRC = config->sendControl.crcGenerationControl;
213 tempSCR.B.STA = config->sendControl.startSequenceGenerationControl;
214 psi5s->SCR[config->channelId].U = tempSCR.U;
215
216 IfxScuWdt_setCpuEndinit(passwd);
217
218 return status;
219 }
220
221
222 void IfxPsi5s_Psi5s_initChannelConfig(IfxPsi5s_Psi5s_ChannelConfig *config, IfxPsi5s_Psi5s *psi5s)
223 {
224 IfxPsi5s_Psi5s_ChannelConfig IfxPsi5s_Psi5s_defaultChannelConfig = {
225 .channelId = IfxPsi5s_ChannelId_0,
226 .module = NULL_PTR,
227 .pulseGeneration = {
228 .codeforZero = 0,
229 .codeforOne = 1,
230 .timeBaseSelect = IfxPsi5s_TimeBase_internal,
231 .externalTimeBaseSelect = IfxPsi5s_Trigger_0,
232 .periodicOrExternal = IfxPsi5s_TriggerType_periodic,
233 .externalTriggerSelect = IfxPsi5s_Trigger_0,
234 },
235 .channelTrigger = {
236 .channelTriggerValue = 0x20,
237 .channelTriggerCounter = 0x0
238 },
239 .watchdogTimerLimit = 0x0,
240 .receiveControl = {
241 .crcOrParity[0] = IfxPsi5s_CrcOrParity_parity,
242 .crcOrParity[1] = IfxPsi5s_CrcOrParity_parity,
243 .crcOrParity[2] = IfxPsi5s_CrcOrParity_parity,
244 .crcOrParity[3] = IfxPsi5s_CrcOrParity_parity,
245 .crcOrParity[4] = IfxPsi5s_CrcOrParity_parity,
246 .crcOrParity[5] = IfxPsi5s_CrcOrParity_parity,
247 .timestampEnabled = FALSE,
248 .timestampSelect = IfxPsi5s_TimestampRegister_a,
249 .timestampTriggerSelect = IfxPsi5s_TimestampTrigger_syncPulse,
250 .frameIdSelect = IfxPsi5s_FrameId_frameHeader,
251 .watchdogTimerModeSelect = IfxPsi5s_WatchdogTimerMode_frame,
252 .uartFrameCount[0] = IfxPsi5s_UartFrameCount_3,
253 .uartFrameCount[1] = IfxPsi5s_UartFrameCount_3,
254 .uartFrameCount[2] = IfxPsi5s_UartFrameCount_3,
255 .uartFrameCount[3] = IfxPsi5s_UartFrameCount_3,
256 .uartFrameCount[4] = IfxPsi5s_UartFrameCount_3,
257 .uartFrameCount[5] = IfxPsi5s_UartFrameCount_3,
258 .payloadLength[0] = 0,
259 .payloadLength[1] = 0,
260 .payloadLength[2] = 0,
261 .payloadLength[3] = 0,
262 .payloadLength[4] = 0,
263 .payloadLength[5] = 0,
264 .numberOfFramesExpected = IfxPsi5s_NumberExpectedFrames_1,
265 },
266 .sendControl = {
267 .payloadLength = 6,
268 .enhancedProtocolSelection = IfxPsi5s_EnhancedProtocol_toothGapMethod,
269 .bitStuffControl = FALSE,
270 .crcGenerationControl = FALSE,
271 .startSequenceGenerationControl = FALSE
272 }
273 };
274 *config = IfxPsi5s_Psi5s_defaultChannelConfig;
275 config->module = psi5s;
276 }
277
278
279 boolean IfxPsi5s_Psi5s_initModule(IfxPsi5s_Psi5s *psi5s, const IfxPsi5s_Psi5s_Config *config)
280 {
281 boolean status = TRUE;
282
283 Ifx_PSI5S *psi5sSFR = config->module;
284 psi5s->psi5s = psi5sSFR;
285
286 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
287 IfxScuWdt_clearCpuEndinit(passwd);
288 IfxPsi5s_Psi5s_enableModule(psi5sSFR);
289
290 if (IfxPsi5s_Psi5s_initializeClock(psi5sSFR, &config->fracDiv) == 0)
291 {
292 status = FALSE;
293 return status;
294 }
295 else
296 {}
297
298 if (IfxPsi5s_Psi5s_initializeClock(psi5sSFR, &config->timestampClock) == 0)
299 {
300 status = FALSE;
301 return status;
302 }
303 else
304 {}
305
306 Ifx_PSI5S_CON tempCON;
307 tempCON.U = psi5sSFR->CON.U;
308 tempCON.B.M = config->ascConfig.receiveMode;
309 tempCON.B.STP = config->ascConfig.stopBits;
310 tempCON.B.PEN = config->ascConfig.parityCheckEnabled;
311 tempCON.B.FEN = config->ascConfig.framingCheckEnabled;
312 tempCON.B.OEN = config->ascConfig.overrunCheckEnabled;
313 tempCON.B.FDE = config->ascConfig.fractionalDividerEnabled;
314 tempCON.B.ODD = config->ascConfig.receiverOddParityEnabled;
315 tempCON.B.BRS = config->ascConfig.baudrateSelection;
316 tempCON.B.MTX = config->ascConfig.transmitMode;
317 tempCON.B.ODDTX = config->ascConfig.transmitterOddParityEnabled;
318 psi5sSFR->CON.U = tempCON.U;
319 IfxPsi5s_setLoopBackMode(psi5sSFR, config->ascConfig.loopbackEnabled);
320
321 if (IfxPsi5s_Psi5s_setBaudrate(psi5sSFR, config->ascConfig.baudrateFrequency, (IfxPsi5s_Psi5s_AscConfig *)&(config->ascConfig))
322 == 0)
323 {
324 status = FALSE;
325 return status;
326 }
327 else
328 {}
329
330 if (IfxPsi5s_Psi5s_initializeClock(psi5sSFR, &config->ascConfig.clockOutput) == 0)
331 {
332 status = FALSE;
333 return status;
334 }
335 else
336 {}
337
338 Ifx_PSI5S_TSCNTA tempTSCNTA;
339 tempTSCNTA.U = psi5sSFR->TSCNTA.U;
340 tempTSCNTA.B.ETB = config->timestampCounterA.externalTimeBaseSelect;
341 tempTSCNTA.B.TBS = config->timestampCounterA.timeBaseSelect;
342 psi5sSFR->TSCNTA.U = tempTSCNTA.U;
343
344 Ifx_PSI5S_TSCNTB tempTSCNTB;
345 tempTSCNTB.U = psi5sSFR->TSCNTB.U;
346 tempTSCNTB.B.ETB = config->timestampCounterB.externalTimeBaseSelect;
347 tempTSCNTB.B.TBS = config->timestampCounterB.timeBaseSelect;
348 psi5sSFR->TSCNTB.U = tempTSCNTB.U;
349
350 Ifx_PSI5S_GCR tempGCR;
351 tempGCR.U = psi5sSFR->GCR.U;
352 tempGCR.B.CRCI = config->globalControlConfig.crcErrorConsideredForRSI;
353 tempGCR.B.XCRCI = config->globalControlConfig.xcrcErrorConsideredForRSI;
354 tempGCR.B.TEI = config->globalControlConfig.transmitErrorConsideredForRSI;
355 tempGCR.B.PE = config->globalControlConfig.parityErrorConsideredForRSI;
356 tempGCR.B.FE = config->globalControlConfig.framingErrorConsideredForRSI;
357 tempGCR.B.OE = config->globalControlConfig.overrunErrorConsideredForRSI;
358 tempGCR.B.RBI = config->globalControlConfig.receiveBufferErrorConsideredForRSI;
359 tempGCR.B.HDI = config->globalControlConfig.headerErrorConsideredForRSI;
360 tempGCR.B.IDT = config->globalControlConfig.idleTime;
361 tempGCR.B.ASC = config->globalControlConfig.ascOnlyMode;
362 psi5sSFR->GCR.U = tempGCR.U;
363
364 IfxScuWdt_setCpuEndinit(passwd);
365
366 // Pin mapping //
367 const IfxPsi5s_Psi5s_Pins *pins = config->pins;
368
369 if (pins != NULL_PTR)
370 {
371 const IfxPsi5s_Rx_In *rx = pins->rx;
372
373 if (rx != NULL_PTR)
374 {
375 IfxPsi5s_initRxPin(rx, pins->rxMode, pins->pinDriver);
376 }
377
378 const IfxPsi5s_Tx_Out *tx = pins->tx;
379
380 if (tx != NULL_PTR)
381 {
382 IfxPsi5s_initTxPin(tx, pins->txMode, pins->pinDriver);
383 }
384
385 const IfxPsi5s_Clk_Out *clk = pins->clk;
386
387 if (clk != NULL_PTR)
388 {
389 IfxPsi5s_initClkPin(clk, pins->clkMode, pins->pinDriver);
390 }
391 }
392
393 return status;
394 }
395
396
397 void IfxPsi5s_Psi5s_initModuleConfig(IfxPsi5s_Psi5s_Config *config, Ifx_PSI5S *psi5s)
398 {
399 uint32 spbFrequency = IfxScuCcu_getSpbFrequency();
400 config->module = psi5s;
401 config->fracDiv.frequency = spbFrequency;
402 config->fracDiv.mode = IfxPsi5s_DividerMode_normal;
403 config->fracDiv.type = IfxPsi5s_ClockType_fracDiv;
404 config->timestampClock.frequency = spbFrequency;
405 config->timestampClock.mode = IfxPsi5s_DividerMode_normal;
406 config->timestampClock.type = IfxPsi5s_ClockType_timeStamp;
407 config->timestampCounterA.externalTimeBaseSelect = IfxPsi5s_Trigger_0;
408 config->timestampCounterA.timeBaseSelect = IfxPsi5s_TimeBase_internal;
409 config->timestampCounterB.externalTimeBaseSelect = IfxPsi5s_Trigger_0;
410 config->timestampCounterB.timeBaseSelect = IfxPsi5s_TimeBase_internal;
411 config->ascConfig.baudrateFrequency = IFXPSI5S_BAUDRATE_1562500;
412 config->ascConfig.clockOutput.frequency = spbFrequency;
413 config->ascConfig.clockOutput.mode = IfxPsi5s_DividerMode_normal;
414 config->ascConfig.clockOutput.type = IfxPsi5s_ClockType_ascOutput;
415 config->ascConfig.receiveMode = IfxPsi5s_AscMode_sync;
416 config->ascConfig.stopBits = IfxPsi5s_AscStopBits_1;
417 config->ascConfig.parityCheckEnabled = FALSE;
418 config->ascConfig.framingCheckEnabled = FALSE;
419 config->ascConfig.overrunCheckEnabled = FALSE;
420 config->ascConfig.fractionalDividerEnabled = FALSE;
421 config->ascConfig.receiverOddParityEnabled = FALSE;
422 config->ascConfig.baudrateSelection = IfxPsi5s_AscBaudratePrescalar_divideBy2;
423 config->ascConfig.loopbackEnabled = IfxPsi5s_LoopBackMode_disable;
424 config->ascConfig.transmitMode = IfxPsi5s_AscMode_sync;
425 config->ascConfig.transmitterOddParityEnabled = FALSE;
426 config->globalControlConfig.crcErrorConsideredForRSI = TRUE;
427 config->globalControlConfig.xcrcErrorConsideredForRSI = TRUE;
428 config->globalControlConfig.transmitErrorConsideredForRSI = TRUE;
429 config->globalControlConfig.parityErrorConsideredForRSI = TRUE;
430 config->globalControlConfig.framingErrorConsideredForRSI = TRUE;
431 config->globalControlConfig.overrunErrorConsideredForRSI = FALSE;
432 config->globalControlConfig.receiveBufferErrorConsideredForRSI = FALSE;
433 config->globalControlConfig.headerErrorConsideredForRSI = FALSE;
434 config->globalControlConfig.idleTime = IfxPsi5s_IdleTime_1;
435 config->globalControlConfig.ascOnlyMode = FALSE;
436 config->pins = NULL_PTR;
437 }
438
439
440 IFX_STATIC uint32 IfxPsi5s_Psi5s_initializeClock(Ifx_PSI5S *psi5s, const IfxPsi5s_Psi5s_Clock *clock)
441 {
442 uint64 step = 0;
443 uint32 stepRange = IFXPSI5S_STEP_RANGE;
444 uint32 result = 0;
445 IfxPsi5s_DividerMode divMode = clock->mode;
446 IfxPsi5s_ClockType clockType = clock->type;
447 uint32 clockFrequency = clock->frequency;
448 uint32 fInput;
449 Ifx_PSI5S_FDR tempFDR;
450 Ifx_PSI5S_FDRT tempFDRT;
451 Ifx_PSI5S_FDO tempFDO;
452
453 if (clockType == IfxPsi5s_ClockType_fracDiv)
454 {
455 fInput = IfxScuCcu_getSpbFrequency();
456 }
457 else if (clockType == IfxPsi5s_ClockType_ascOutput)
458 {
459 fInput = IfxScuCcu_getSpbFrequency(); // assumption here is that fBaud2 is equal to fSPB
460 stepRange = 2 * IFXPSI5S_STEP_RANGE;
461 }
462 else
463 {
464 fInput = IfxPsi5s_Psi5s_getFracDivClock(psi5s);
465
466 if (fInput == 0)
467 {
468 result = 0;
469 return result;
470 }
471 else
472 {}
473 }
474
475 switch (divMode)
476 {
477 case IfxPsi5s_DividerMode_normal:
478 step = stepRange - (fInput / clockFrequency);
479
480 if (step > (stepRange - 1))
481 {
482 step = stepRange - 1;
483 }
484 else
485 {
486 /* do nothing */
487 }
488
489 result = (uint32)(fInput / (stepRange - step));
490 break;
491
492 case IfxPsi5s_DividerMode_fractional:
493 step = (uint64)((uint64)clockFrequency * stepRange) / fInput;
494
495 if (step > (stepRange - 1))
496 {
497 step = stepRange - 1;
498 }
499 else
500 {
501 /* do nothing */
502 }
503
504 result = (uint32)((uint64)((uint64)fInput * step)) / stepRange;
505 break;
506
507 case IfxPsi5s_DividerMode_off:
508 default:
509 step = 0;
510 result = 0;
511 break;
512 }
513
514 if (result != 0)
515 {
516 switch (clockType)
517 {
518 case IfxPsi5s_ClockType_fracDiv:
519 tempFDR.U = 0;
520 tempFDR.B.DM = divMode;
521 tempFDR.B.STEP = (uint32)step;
522 psi5s->FDR.U = tempFDR.U;
523 break;
524
525 case IfxPsi5s_ClockType_timeStamp:
526 tempFDRT.U = 0;
527 tempFDRT.B.DM = divMode;
528 tempFDRT.B.STEP = (uint32)step;
529 psi5s->FDRT.U = tempFDRT.U;
530 break;
531
532 case IfxPsi5s_ClockType_ascOutput:
533 tempFDO.U = 0;
534 tempFDO.B.DM = divMode;
535 tempFDO.B.STEP = (uint32)step;
536 psi5s->FDO.U = tempFDO.U;
537 break;
538 default:
539 break;
540 }
541 }
542
543 return result;
544 }
545
546
547 void IfxPsi5s_Psi5s_readFrame(IfxPsi5s_Psi5s_Channel *channel, IfxPsi5s_Psi5s_Frame *frame)
548 {
549 frame->data.rdr = channel->module->psi5s->RDR.U;
550 frame->status.rds = channel->module->psi5s->RDS.U;
551 frame->timestamp.tsm = channel->module->psi5s->TSM.U;
552
553 channel->module->psi5s->INTCLR[channel->channelId].U |= (IFX_PSI5S_INTCLR_RDI_MSK << IFX_PSI5S_INTCLR_RDI_OFF) | (IFX_PSI5S_INTCLR_RSI_MSK << IFX_PSI5S_INTCLR_RSI_OFF);
554 }
555
556
557 void IfxPsi5s_Psi5s_resetModule(Ifx_PSI5S *psi5s)
558 {
559 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
560 IfxScuWdt_clearSafetyEndinit(passwd);
561 psi5s->KRST1.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
562 psi5s->KRST0.B.RST = 1;
563
564 while (psi5s->KRST0.B.RSTSTAT == 0)
565 {
566 /* Wait until reset is executed */
567 }
568
569 psi5s->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
570 IfxScuWdt_setSafetyEndinit(passwd);
571 }
572
573
574 boolean IfxPsi5s_Psi5s_sendChannelData(IfxPsi5s_Psi5s_Channel *channel, uint32 data)
575 {
576 channel->module->psi5s->SDR[channel->channelId].U = data & 0x00FFFFFF;
577
578 if (channel->module->psi5s->INTSTAT[channel->channelId].B.TPOI)
579 {
580 return FALSE;
581 }
582 else
583 {
584 return TRUE;
585 }
586 }
587
588
589 IFX_STATIC uint32 IfxPsi5s_Psi5s_setBaudrate(Ifx_PSI5S *psi5s, uint32 baudrate, IfxPsi5s_Psi5s_AscConfig *ascConfig)
590 {
591 uint32 bgValue = 0;
592 uint32 fdValue = 0;
593 uint32 result = 0;
594 uint32 fInput;
595
596 if (ascConfig->receiveMode == IfxPsi5s_AscMode_sync)
597 {
598 if (ascConfig->transmitMode != IfxPsi5s_AscMode_sync)
599 {
600 // sync modes must be set for both receive and transmit
601 }
602
603 fInput = 2 * IfxScuCcu_getSpbFrequency();
604 bgValue = (uint32)(fInput / ((ascConfig->baudrateSelection + 2) * 4 * (uint64)baudrate) - 1);
605
606 if (bgValue > (IFXPSI5S_BG_RANGE - 1))
607 {
608 bgValue = IFXPSI5S_BG_RANGE - 1;
609 }
610 else
611 {
612 /* do nothing */
613 }
614
615 result = fInput / ((ascConfig->baudrateSelection + 2) * 4 * (bgValue + 1));
616 }
617 else if (ascConfig->fractionalDividerEnabled == FALSE)
618 {
619 fInput = 2 * IfxScuCcu_getSpbFrequency();
620 bgValue = (uint32)(fInput / ((ascConfig->baudrateSelection + 2) * 16 * (uint64)baudrate) - 1);
621
622 if (bgValue > (IFXPSI5S_BG_RANGE - 1))
623 {
624 bgValue = IFXPSI5S_BG_RANGE - 1;
625 }
626 else
627 {
628 /* do nothing */
629 }
630
631 result = fInput / ((ascConfig->baudrateSelection + 2) * 16 * (bgValue + 1));
632 }
633 else
634 {
635 fInput = 2 * IfxScuCcu_getSpbFrequency();
636 fdValue = (((uint64)baudrate * IFXPSI5S_FDV_RANGE * 16)) / (float)fInput;
637
638 if (fdValue > (IFXPSI5S_FDV_RANGE - 1))
639 {
640 fdValue = IFXPSI5S_FDV_RANGE - 1;
641 bgValue = ((float)fdValue / IFXPSI5S_FDV_RANGE) * (fInput / (16 * baudrate)) - 1;
642
643 if (bgValue > (IFXPSI5S_BG_RANGE - 1))
644 {
645 bgValue = IFXPSI5S_BG_RANGE - 1;
646 }
647 else
648 {
649 /* do nothing */
650 }
651 }
652 else
653 {
654 bgValue = 0;
655 }
656
657 result = ((float)fdValue / IFXPSI5S_FDV_RANGE) * (fInput / (16 * (bgValue + 1)));
658 }
659
660 psi5s->FDV.U = fdValue;
661 psi5s->BG.U = bgValue;
662
663 return result;
664 }
IfxPsi5s_IdleTime_1
1 bit Idle time
Definition: IfxPsi5s.h:178
IfxPsi5s_ClockType_fracDiv
Fractional Divide clock.
Definition: IfxPsi5s.h:133
IfxPsi5s_Psi5s_initChannelConfig
void IfxPsi5s_Psi5s_initChannelConfig(IfxPsi5s_Psi5s_ChannelConfig *config, IfxPsi5s_Psi5s *psi5s)
Initialise buffer with default channel configuration.
Definition: IfxPsi5s_Psi5s.c:222
IfxPsi5s_getBaudrate
float32 IfxPsi5s_getBaudrate(Ifx_PSI5S *psi5s, boolean synchMode, boolean divMode, IfxPsi5s_AscBaudratePrescalar baudrateSelection)
Baudrate frequency in HZ.
Definition: IfxPsi5s.c:91
IfxPsi5s_Psi5s_ReceiveControl::numberOfFramesExpected
IfxPsi5s_NumberExpectedFrames numberOfFramesExpected
Specifies the number of psi5s frames expected.
Definition: IfxPsi5s_Psi5s.h:315
IFXPSI5S_BAUDRATE_1562500
#define IFXPSI5S_BAUDRATE_1562500
Definition: IfxPsi5s_cfg.h:78
IfxPsi5s_Psi5s_GlobalControlConfig::receiveBufferErrorConsideredForRSI
boolean receiveBufferErrorConsideredForRSI
Specifies whether RBI is considered for RSI assertion.
Definition: IfxPsi5s_Psi5s.h:273
IfxPsi5s_Psi5s_resetModule
void IfxPsi5s_Psi5s_resetModule(Ifx_PSI5S *psi5s)
Reset PSI5S kernel.
Definition: IfxPsi5s_Psi5s.c:557
IfxPsi5s_Psi5s_Pins::clk
IFX_CONST IfxPsi5s_Clk_Out * clk
PSI5S Clk Pin.
Definition: IfxPsi5s_Psi5s.h:286
IfxPsi5s_Psi5s_TransmitControl::payloadLength
uint32 payloadLength
Specifies the payload length to be sent.
Definition: IfxPsi5s_Psi5s.h:357
IfxScuCcu_getSpbFrequency
float32 IfxScuCcu_getSpbFrequency(void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider...
Definition: IfxScuCcu.c:479
IfxPsi5s_Psi5s.h
PSI5S PSI5S details.
IfxPsi5s_FrameId_frameHeader
Frame ID is updated from packet frame header (Sync mode)
Definition: IfxPsi5s.h:170
IfxPsi5s_Psi5s_TransmitControl::enhancedProtocolSelection
IfxPsi5s_EnhancedProtocol enhancedProtocolSelection
Specifies whether the enhanced protocol is selected or not.
Definition: IfxPsi5s_Psi5s.h:358
IfxPsi5s_Psi5s_AscConfig
PSI5S module configuration structure.
Definition: IfxPsi5s_Psi5s.h:237
IfxPsi5s_Psi5s_ChannelConfig::channelTrigger
IfxPsi5s_Psi5s_ChannelTrigger channelTrigger
Specifies the configuration for channel trigger.
Definition: IfxPsi5s_Psi5s.h:381
IfxPsi5s_Psi5s_initChannel
boolean IfxPsi5s_Psi5s_initChannel(IfxPsi5s_Psi5s_Channel *channel, const IfxPsi5s_Psi5s_ChannelConfig *config)
Initialize the channel with the supplied configuration.
Definition: IfxPsi5s_Psi5s.c:132
IfxPsi5s_Psi5s_ReceiveControl::crcOrParity
IfxPsi5s_CrcOrParity crcOrParity[IFXPSI5S_NUM_SLOTS]
Specifies the crc or parity selection for the slots 0 to 5.
Definition: IfxPsi5s_Psi5s.h:309
IfxPsi5s_Rx_In
RX pin mapping structure.
Definition: IfxPsi5s_PinMap.h:56
IfxPsi5s_Psi5s_ReceiveControl::timestampSelect
IfxPsi5s_TimestampRegister timestampSelect
Specifies the timestamp register selection for pulses.
Definition: IfxPsi5s_Psi5s.h:310
IfxPsi5s_Psi5s_AscConfig::receiverOddParityEnabled
boolean receiverOddParityEnabled
Specifies whether receiver parity check should be for even or odd.
Definition: IfxPsi5s_Psi5s.h:243
IfxPsi5s_Psi5s_Clock::frequency
uint32 frequency
Specifies the frequency for the clock.
Definition: IfxPsi5s_Psi5s.h:181
IfxPsi5s_Psi5s_PulseGeneration::codeforZero
uint32 codeforZero
Specifies the code used to represent &#39;0&#39; - referred as TXCMD.
Definition: IfxPsi5s_Psi5s.h:295
IfxPsi5s_Psi5s_Config::timestampClock
IfxPsi5s_Psi5s_Clock timestampClock
Specifies the time stamp clock properties.
Definition: IfxPsi5s_Psi5s.h:392
IfxPsi5s_Psi5s_ChannelTrigger::channelTriggerValue
uint32 channelTriggerValue
Specifies the channel trigger value CTV.
Definition: IfxPsi5s_Psi5s.h:258
IfxPsi5s_Psi5s_PulseGeneration::timeBaseSelect
IfxPsi5s_TimeBase timeBaseSelect
Specifies the clock source for CTV as internal or external.
Definition: IfxPsi5s_Psi5s.h:297
IfxPsi5s_Psi5s_setBaudrate
IFX_STATIC uint32 IfxPsi5s_Psi5s_setBaudrate(Ifx_PSI5S *psi5s, uint32 baudrate, IfxPsi5s_Psi5s_AscConfig *ascConfig)
Configure the baudrate at the ASC interface.
Definition: IfxPsi5s_Psi5s.c:589
IfxPsi5s_DividerMode
IfxPsi5s_DividerMode
MODULE_PSI5S.FDR.DM;MODULE_PSI5S.FDRT.B.DM:Divider mode.
Definition: IfxPsi5s.h:149
IfxPsi5s_Psi5s_Pins::tx
IFX_CONST IfxPsi5s_Tx_Out * tx
PSI5S Tx pin.
Definition: IfxPsi5s_Psi5s.h:284
IfxPsi5s_Psi5s_PulseGeneration::externalTriggerSelect
IfxPsi5s_Trigger externalTriggerSelect
Specifies the trigger source in case of external triggerring.
Definition: IfxPsi5s_Psi5s.h:300
IfxPsi5s_setLoopBackMode
IFX_INLINE void IfxPsi5s_setLoopBackMode(Ifx_PSI5S *psi5s, IfxPsi5s_LoopBackMode enabled)
enable /disable loop back mode
Definition: IfxPsi5s.h:782
IfxPsi5s_AscStopBits_1
1 stop bit
Definition: IfxPsi5s.h:110
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxPsi5s_Psi5s_GlobalControlConfig::ascOnlyMode
boolean ascOnlyMode
Specifies if the module is in ASC only mode.
Definition: IfxPsi5s_Psi5s.h:266
IfxPsi5s_DividerMode_normal
divider mode is normal
Definition: IfxPsi5s.h:152
IfxPsi5s_Psi5s_Config
PSI5S module configuration structure.
Definition: IfxPsi5s_Psi5s.h:388
IfxPsi5s_Psi5s_GlobalControlConfig::idleTime
uint32 idleTime
Specifies the number of stop bits in addition to last UART frame that is required for start of frame ...
Definition: IfxPsi5s_Psi5s.h:275
IfxPsi5s_initTxPin
IFX_INLINE void IfxPsi5s_initTxPin(const IfxPsi5s_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a TX output.
Definition: IfxPsi5s.h:748
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxPsi5s_EnhancedProtocol_toothGapMethod
toothGapMethod Enhanced protocol type
Definition: IfxPsi5s.h:161
IfxPsi5s_AscMode_sync
Synchronous mode.
Definition: IfxPsi5s.h:98
IfxPsi5s_TimestampRegister_a
Timestamp register A.
Definition: IfxPsi5s.h:286
IfxPsi5s_Psi5s_GlobalControlConfig::framingErrorConsideredForRSI
boolean framingErrorConsideredForRSI
Specifies whether FE is considered for RSI assertion.
Definition: IfxPsi5s_Psi5s.h:271
IfxPsi5s_Psi5s_AscConfig::loopbackEnabled
IfxPsi5s_LoopBackMode loopbackEnabled
Specifies whether loopback is enabled or not.
Definition: IfxPsi5s_Psi5s.h:251
IfxPsi5s_Psi5s_PulseGeneration::periodicOrExternal
IfxPsi5s_TriggerType periodicOrExternal
Specifies whether periodic trigger or external trigger or bypass is selected.
Definition: IfxPsi5s_Psi5s.h:299
IfxPsi5s_Psi5s
PSI5S handle data structure.
Definition: IfxPsi5s_Psi5s.h:230
uint64
unsigned long long uint64
Definition: Platform_Types.h:121
IfxPsi5s_ClockType_timeStamp
Timestamp clock.
Definition: IfxPsi5s.h:134
IfxPsi5s_Psi5s_ReceiveControl::timestampTriggerSelect
IfxPsi5s_TimestampTrigger timestampTriggerSelect
Specifies the timestamp register selection for pulses.
Definition: IfxPsi5s_Psi5s.h:311
IfxPsi5s_Psi5s_Pins::rx
IFX_CONST IfxPsi5s_Rx_In * rx
PSI5S Rx pin.
Definition: IfxPsi5s_Psi5s.h:282
IfxPsi5s_Psi5s_AscConfig::transmitMode
IfxPsi5s_AscMode transmitMode
Specifies the mode of operation for ASC transmitter.
Definition: IfxPsi5s_Psi5s.h:249
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxPsi5s_Psi5s_Frame::status
IfxPsi5s_Psi5s_ReceiveStatus status
Receiver status.
Definition: IfxPsi5s_Psi5s.h:405
IfxPsi5s_CrcOrParity_parity
parity selection
Definition: IfxPsi5s.h:143
IfxPsi5s_Psi5s_ChannelConfig::receiveControl
IfxPsi5s_Psi5s_ReceiveControl receiveControl
Specifies the configuration for reception.
Definition: IfxPsi5s_Psi5s.h:382
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxPsi5s_Psi5s_getBaudrate
void IfxPsi5s_Psi5s_getBaudrate(Ifx_PSI5S *psi5s, IfxPsi5s_Psi5s_AscConfig *ascConfig)
get Baud Rate
Definition: IfxPsi5s_Psi5s.c:97
IfxPsi5s_Psi5s_Frame::timestamp
IfxPsi5s_Psi5s_ReceiveTimestamp timestamp
Receiver timestamp.
Definition: IfxPsi5s_Psi5s.h:406
IfxPsi5s_Psi5s_TransmitControl::bitStuffControl
boolean bitStuffControl
Specifies whether the bit stuffing is turned on or not.
Definition: IfxPsi5s_Psi5s.h:354
IfxScuWdt_clearSafetyEndinit
void IfxScuWdt_clearSafetyEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:305
IfxPsi5s_Psi5s_ChannelTrigger::channelTriggerCounter
uint32 channelTriggerCounter
Specifies the channel trigger counter.
Definition: IfxPsi5s_Psi5s.h:259
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxPsi5s_Psi5s_initModule
boolean IfxPsi5s_Psi5s_initModule(IfxPsi5s_Psi5s *psi5s, const IfxPsi5s_Psi5s_Config *config)
Initialise the PSI5S with the supplied configureation.
Definition: IfxPsi5s_Psi5s.c:279
IfxPsi5s_Psi5s_Channel
Channel handle data structure.
Definition: IfxPsi5s_Psi5s.h:367
IfxPsi5s_Psi5s_Config::ascConfig
IfxPsi5s_Psi5s_AscConfig ascConfig
Specifies the configuration for ASC.
Definition: IfxPsi5s_Psi5s.h:395
IfxPsi5s_Psi5s_ChannelConfig
Channel configuration structure.
Definition: IfxPsi5s_Psi5s.h:375
IfxPsi5s_Psi5s_initModuleConfig
void IfxPsi5s_Psi5s_initModuleConfig(IfxPsi5s_Psi5s_Config *config, Ifx_PSI5S *psi5s)
Initialise buffer with default PSI5S configuration.
Definition: IfxPsi5s_Psi5s.c:397
IfxPsi5s_Psi5s::psi5s
Ifx_PSI5S * psi5s
Specifies the pointer to the PSI5S module registers.
Definition: IfxPsi5s_Psi5s.h:232
IfxPsi5s_Psi5s_PulseGeneration::externalTimeBaseSelect
IfxPsi5s_Trigger externalTimeBaseSelect
Specifies the clock source for CTV in the case of external.
Definition: IfxPsi5s_Psi5s.h:298
IfxPsi5s_Psi5s_ReceiveStatus::rds
uint32 rds
received status data.
Definition: IfxPsi5s_Psi5s.h:330
IfxPsi5s_Psi5s_ReceiveControl::watchdogTimerModeSelect
IfxPsi5s_WatchdogTimerMode watchdogTimerModeSelect
Specifies the watchdog timer restart is wrt frame or sync pulse reception.
Definition: IfxPsi5s_Psi5s.h:313
IfxPsi5s_Psi5s_AscConfig::stopBits
IfxPsi5s_AscStopBits stopBits
Specifies the number of stop bits.
Definition: IfxPsi5s_Psi5s.h:246
IFXPSI5S_BG_RANGE
#define IFXPSI5S_BG_RANGE
Definition: IfxPsi5s_cfg.h:74
IfxPsi5s_Psi5s_Clock::mode
IfxPsi5s_DividerMode mode
Specifies the mode of division for the clock.
Definition: IfxPsi5s_Psi5s.h:182
IfxPsi5s_Psi5s_AscConfig::framingCheckEnabled
boolean framingCheckEnabled
Specifies whether framing check is enabled or not.
Definition: IfxPsi5s_Psi5s.h:240
IfxPsi5s_Psi5s_AscConfig::receiveMode
IfxPsi5s_AscMode receiveMode
Specifies the mode of operation for ASC receiver.
Definition: IfxPsi5s_Psi5s.h:247
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:50
IfxPsi5s_LoopBackMode_disable
loop-back mode disabled
Definition: IfxPsi5s.h:224
IfxPsi5s_DividerMode_off
divider mode is off
Definition: IfxPsi5s.h:154
IfxPsi5s_Psi5s_PulseGeneration::codeforOne
uint32 codeforOne
Specifies the code used to represent &#39;1&#39; - referred as ATXCMD.
Definition: IfxPsi5s_Psi5s.h:296
IfxPsi5s_Psi5s_GlobalControlConfig::crcErrorConsideredForRSI
boolean crcErrorConsideredForRSI
Specifies whether CRCI is considered for RSI assertion.
Definition: IfxPsi5s_Psi5s.h:267
IfxPsi5s_Psi5s_getFracDivClock
IFX_STATIC uint32 IfxPsi5s_Psi5s_getFracDivClock(Ifx_PSI5S *psi5s)
get the fracDiv clock frequency
Definition: IfxPsi5s_Psi5s.c:105
IfxPsi5s_Psi5s_AscConfig::transmitterOddParityEnabled
boolean transmitterOddParityEnabled
Specifies whether transmit parity generation should be even or odd.
Definition: IfxPsi5s_Psi5s.h:244
IfxPsi5s_Psi5s_Config::globalControlConfig
IfxPsi5s_Psi5s_GlobalControlConfig globalControlConfig
Specifies the global control configuration.
Definition: IfxPsi5s_Psi5s.h:396
IfxPsi5s_DividerMode_spb
divider mode is off
Definition: IfxPsi5s.h:151
IfxPsi5s_Psi5s_GlobalControlConfig::parityErrorConsideredForRSI
boolean parityErrorConsideredForRSI
Specifies whether PE is considered for RSI assertion.
Definition: IfxPsi5s_Psi5s.h:270
IfxPsi5s_Psi5s_Config::timestampCounterB
IfxPsi5s_Psi5s_TimeStampConfig timestampCounterB
Specifies the time stamp counter B properties.
Definition: IfxPsi5s_Psi5s.h:394
IfxPsi5s_Psi5s_ChannelConfig::module
IFX_CONST IfxPsi5s_Psi5s * module
Specifies pointer to the IfxPsi5s_Psi5s module handle.
Definition: IfxPsi5s_Psi5s.h:377
IfxPsi5s_Psi5s_AscConfig::fractionalDividerEnabled
boolean fractionalDividerEnabled
Specifies whether fractional divider is enabled or not.
Definition: IfxPsi5s_Psi5s.h:242
IfxPsi5s_Psi5s_initializeClock
IFX_STATIC uint32 IfxPsi5s_Psi5s_initializeClock(Ifx_PSI5S *psi5s, const IfxPsi5s_Psi5s_Clock *clock)
Configure the fracDiv clock.
Definition: IfxPsi5s_Psi5s.c:440
IfxPsi5s_Psi5s_Frame::data
IfxPsi5s_Psi5s_ReceiveData data
Received data.
Definition: IfxPsi5s_Psi5s.h:404
IfxPsi5s_Psi5s_AscConfig::parityCheckEnabled
boolean parityCheckEnabled
Specifies whether parity check is enabled or not.
Definition: IfxPsi5s_Psi5s.h:239
IfxPsi5s_Psi5s_Channel::channelId
IfxPsi5s_ChannelId channelId
Specifies the channel index.
Definition: IfxPsi5s_Psi5s.h:370
IfxPsi5s_Psi5s_Config::fracDiv
IfxPsi5s_Psi5s_Clock fracDiv
Specifies fractionally divided clock properties.
Definition: IfxPsi5s_Psi5s.h:391
IfxPsi5s_TimestampTrigger_syncPulse
Timestamp trigger on sync pulse.
Definition: IfxPsi5s.h:294
IfxPsi5s_Psi5s_Pins::txMode
IfxPort_OutputMode txMode
Tx as output.
Definition: IfxPsi5s_Psi5s.h:285
IfxPsi5s_TriggerType_periodic
Periodic trigger.
Definition: IfxPsi5s.h:330
IfxPsi5s_Psi5s_AscConfig::baudrateSelection
IfxPsi5s_AscBaudratePrescalar baudrateSelection
Specifies whether divide-by-2 or divide-by-3 is selected for baudrate prescalar.
Definition: IfxPsi5s_Psi5s.h:248
IfxPsi5s_TimeBase_internal
Internal time stamp clock.
Definition: IfxPsi5s.h:270
IfxPsi5s_Psi5s_ChannelConfig::pulseGeneration
IfxPsi5s_Psi5s_PulseGeneration pulseGeneration
Specifies the configuration for sync pulse generation.
Definition: IfxPsi5s_Psi5s.h:380
IfxPsi5s_Psi5s_ReceiveData::rdr
uint32 rdr
received data with frame count
Definition: IfxPsi5s_Psi5s.h:322
IfxPsi5s_Psi5s_ReceiveControl::payloadLength
uint32 payloadLength[IFXPSI5S_NUM_SLOTS]
Specifies the payload length to be received for each slot.
Definition: IfxPsi5s_Psi5s.h:308
IfxPsi5s_Psi5s_enableModule
void IfxPsi5s_Psi5s_enableModule(Ifx_PSI5S *psi5s)
Enable PSI5S kernel.
Definition: IfxPsi5s_Psi5s.c:91
IfxPsi5s_Psi5s_Config::pins
IFX_CONST IfxPsi5s_Psi5s_Pins * pins
structure for PSI5S pin configuration
Definition: IfxPsi5s_Psi5s.h:397
IFXPSI5S_FDV_RANGE
#define IFXPSI5S_FDV_RANGE
Definition: IfxPsi5s_cfg.h:76
IfxPsi5s_Psi5s_Pins::rxMode
IfxPort_InputMode rxMode
Rx pin as input.
Definition: IfxPsi5s_Psi5s.h:283
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxPsi5s_WatchdogTimerMode_frame
Watch Dog Timer is restarted on reception of each recoverable frame (async mode)
Definition: IfxPsi5s.h:348
IfxPsi5s_TriggerType_external
External trigger.
Definition: IfxPsi5s.h:331
IfxScuWdt_setSafetyEndinit
void IfxScuWdt_setSafetyEndinit(uint16 password)
SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:668
IfxPsi5s_ClockType
IfxPsi5s_ClockType
Clock Selection.
Definition: IfxPsi5s.h:131
IfxPsi5s_Psi5s_GlobalControlConfig::xcrcErrorConsideredForRSI
boolean xcrcErrorConsideredForRSI
Specifies whether XCRCI is considered for RSI assertion.
Definition: IfxPsi5s_Psi5s.h:268
IfxPsi5s_Trigger_0
Trigger 0.
Definition: IfxPsi5s.h:302
IfxPsi5s_Psi5s_Pins::clkMode
IfxPort_OutputMode clkMode
Clk as output.
Definition: IfxPsi5s_Psi5s.h:287
IfxPsi5s_Psi5s_ReceiveControl::frameIdSelect
IfxPsi5s_FrameId frameIdSelect
Specifies if frame ID is updated from frame header or is a rolling number 0..5 copied from FCNT...
Definition: IfxPsi5s_Psi5s.h:312
IfxPsi5s_initClkPin
IFX_INLINE void IfxPsi5s_initClkPin(const IfxPsi5s_Clk_Out *clk, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a CLK output.
Definition: IfxPsi5s.h:727
IfxPsi5s_UartFrameCount_3
3 UART frames
Definition: IfxPsi5s.h:338
IfxPsi5s_Psi5s_readFrame
void IfxPsi5s_Psi5s_readFrame(IfxPsi5s_Psi5s_Channel *channel, IfxPsi5s_Psi5s_Frame *frame)
Get the received psi5s frame for the channel.
Definition: IfxPsi5s_Psi5s.c:547
IFXPSI5S_STEP_RANGE
#define IFXPSI5S_STEP_RANGE
Definition: IfxPsi5s_cfg.h:64
IfxPsi5s_Psi5s_AscConfig::overrunCheckEnabled
boolean overrunCheckEnabled
Specifies whether overrun check is enabled or not.
Definition: IfxPsi5s_Psi5s.h:241
IfxPsi5s_AscBaudratePrescalar_divideBy2
Divide by 2 is selected for baudrate timer prescalar.
Definition: IfxPsi5s.h:90
IfxPsi5s_Psi5s_ReceiveControl::uartFrameCount
IfxPsi5s_UartFrameCount uartFrameCount[IFXPSI5S_NUM_SLOTS]
Specifies the expected number of UART frames per packet frame for each slot.
Definition: IfxPsi5s_Psi5s.h:314
IfxPsi5s_Psi5s_Clock::type
IfxPsi5s_ClockType type
Specifies the type of clock (fracDiv / timestamp)
Definition: IfxPsi5s_Psi5s.h:183
IfxPsi5s_initRxPin
IFX_INLINE void IfxPsi5s_initRxPin(const IfxPsi5s_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a RX input.
Definition: IfxPsi5s.h:737
IfxPsi5s_Psi5s_GlobalControlConfig::headerErrorConsideredForRSI
boolean headerErrorConsideredForRSI
Specifies whether HDI is considered for RSI assertion.
Definition: IfxPsi5s_Psi5s.h:274
IfxPsi5s_NumberExpectedFrames_1
1 psi5s frame expected
Definition: IfxPsi5s.h:240
IfxPsi5s_ClockType_ascOutput
Asc output clock.
Definition: IfxPsi5s.h:136
IfxPsi5s_Psi5s_Pins::pinDriver
IfxPort_PadDriver pinDriver
pad driver
Definition: IfxPsi5s_Psi5s.h:288
IfxPsi5s_Psi5s_Config::module
Ifx_PSI5S * module
Specifies the pointer to the PSI5S module registers.
Definition: IfxPsi5s_Psi5s.h:390
IfxPsi5s_Tx_Out
TX pin mapping structure.
Definition: IfxPsi5s_PinMap.h:64
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxPsi5s_ChannelId_0
Ifx_PSI5S Channel 0.
Definition: IfxPsi5s.h:118
IfxPsi5s_Psi5s_GlobalControlConfig::transmitErrorConsideredForRSI
boolean transmitErrorConsideredForRSI
Specifies whether TEI is considered for RSI assertion.
Definition: IfxPsi5s_Psi5s.h:269
IfxPsi5s_Psi5s_Channel::module
IfxPsi5s_Psi5s * module
The PSI5S handle structure.
Definition: IfxPsi5s_Psi5s.h:369
IfxPsi5s_Psi5s_Clock
Clock configuration data structure.
Definition: IfxPsi5s_Psi5s.h:179
IfxPsi5s_Psi5s_AscConfig::clockOutput
IfxPsi5s_Psi5s_Clock clockOutput
Specifies the output clock properties.
Definition: IfxPsi5s_Psi5s.h:250
IfxPsi5s_Psi5s_deInitModule
void IfxPsi5s_Psi5s_deInitModule(IfxPsi5s_Psi5s *psi5s)
De-initialise the PSI5S module.
Definition: IfxPsi5s_Psi5s.c:84
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxPsi5s_Psi5s_AscConfig::baudrateFrequency
uint32 baudrateFrequency
Specifies the baudrate frequency.
Definition: IfxPsi5s_Psi5s.h:245
IfxPsi5s_DividerMode_fractional
divider mode is fractional
Definition: IfxPsi5s.h:153
IfxPsi5s_Clk_Out
CLK pin mapping structure.
Definition: IfxPsi5s_PinMap.h:72
IfxPsi5s_Psi5s_ChannelConfig::watchdogTimerLimit
uint32 watchdogTimerLimit
Specifies the watchdog timer limit for each of the slots 0 to 6.
Definition: IfxPsi5s_Psi5s.h:378
IfxPsi5s_Psi5s_Config::timestampCounterA
IfxPsi5s_Psi5s_TimeStampConfig timestampCounterA
Specifies the time stamp counter A properties.
Definition: IfxPsi5s_Psi5s.h:393
IfxPsi5s_Psi5s_TransmitControl::crcGenerationControl
boolean crcGenerationControl
Specifies whether the crc generation is turned on or not.
Definition: IfxPsi5s_Psi5s.h:355
IfxPsi5s_Psi5s_Pins
Structure for PSI5S pin configuration.
Definition: IfxPsi5s_Psi5s.h:280
IfxPsi5s_Psi5s_sendChannelData
boolean IfxPsi5s_Psi5s_sendChannelData(IfxPsi5s_Psi5s_Channel *channel, uint32 data)
Transmit the data through the channel.
Definition: IfxPsi5s_Psi5s.c:574
IfxPsi5s_Psi5s_ReceiveTimestamp::tsm
uint32 tsm
received timestamp along with frame count
Definition: IfxPsi5s_Psi5s.h:338
IfxPsi5s_Psi5s_ReceiveControl::timestampEnabled
boolean timestampEnabled
Specifies whether the timestamp is enabled or not.
Definition: IfxPsi5s_Psi5s.h:307
IfxPsi5s_Psi5s_TransmitControl::startSequenceGenerationControl
boolean startSequenceGenerationControl
Specifies whether the start sequence generation is turned on or not.
Definition: IfxPsi5s_Psi5s.h:356
IfxPsi5s_Psi5s_ChannelConfig::sendControl
IfxPsi5s_Psi5s_TransmitControl sendControl
Specifies the configuration for transmission.
Definition: IfxPsi5s_Psi5s.h:383
IfxPsi5s_Psi5s_Frame
Psi5s frame data structure.
Definition: IfxPsi5s_Psi5s.h:402
IfxPsi5s_Psi5s_GlobalControlConfig::overrunErrorConsideredForRSI
boolean overrunErrorConsideredForRSI
Specifies whether OE is considered for RSI assertion.
Definition: IfxPsi5s_Psi5s.h:272


iLLD_TC38A: IfxPsi5s_Psi5s.h Source File

  • Psi5s
  • Psi5s
IfxPsi5s_Psi5s.h
Go to the documentation of this file.
1 /**
2 * \file IfxPsi5s_Psi5s.h
3 * \brief PSI5S PSI5S details
4 * \ingroup IfxLld_Psi5s
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 *
43 * \defgroup IfxLld_Psi5s_Psi5s_Usage How to use the PSI5S PSI5S Interface driver?
44 * \ingroup IfxLld_Psi5s
45 *
46 * PSI5S defines a current loop based serial communication link typically used to connect airbag sensors or other peripheral devices.Data transmission and configuration of the sensor can be done by modulation of the Sync Pulses.
47 *
48 * In the following sections it will be described, how to integrate the driver into the application framework.
49 *
50 * \section IfxLld_Psi5s_Psi5s_Preparation Preparation
51 * \subsection IfxLld_Psi5s_Psi5s_Include Include Files
52 *
53 * Include following header file into your C code:
54 * \code
55 *
56 * #include <Psi5s/Psi5s/IfxPsi5s_Psi5s.h>
57 *
58 * \endcode
59 *
60 * \subsection IfxLld_Psi5s_Psi5s_Variables Variables
61 *
62 * \code
63 *
64 * // PSI5S handle
65 * IfxPsi5s_Psi5s psi5s;
66 *
67 * \endcode
68 *
69 * \subsection IfxLld_Psi5s_Psi5s_initModule Module Initialisation
70 * \code
71 *
72 * // create module config
73 * IfxPsi5s_Psi5s_Config psi5sModuleConfig;
74 * IfxPsi5s_Psi5s_initModuleConfig(&psi5sModuleConfig, &MODULE_PSI5S);
75 * IfxPsi5s_Psi5s_initModule(&psi5s, &psi5sModuleConfig);
76 *
77 * \endcode
78 *
79 * \subsection IfxLld_Psi5s_Psi5s_initChannel Channel Initialisation
80 * \code
81 *
82 * // create channel config
83 * IfxPsi5s_Psi5s_ChannelConfig psi5sChannelConfig;
84 * IfxPsi5s_Psi5s_initChannelConfig(&psi5sChannelConfig, &psi5s);
85 * // change channel (default is channel 0, change to channel 4)
86 * psi5sChannelConfig.channelId = IfxPsi5s_ChannelId_4;
87 *
88 * // change payloadlength (default is 0, i.e., no frame expecte; change to 8)
89 * for(int slot=0; slot<6; ++slot)
90 * {
91 * psi5sChannelConfig.receiveControl.payloadLength[slot] = 8;
92 * }
93 * // change channel (default is channel 0, change to channel 4)
94 * psi5sChannelConfig.channelId = IfxPsi5s_ChannelId_4;
95 *
96 * // initialize the channel
97 * IfxPsi5s_Psi5s_Channel psi5sChannel;
98 * IfxPsi5s_Psi5s_initChannel(&psi5sChannel, &psi5sChannelConfig);
99 *
100 * \endcode
101 *
102 * Now, PSI5S is ready. Then, call the below APIs to do operation.
103 *
104 * \subsection IfxLld_Psi5s_Psi5s_sendChannelData Send Channel Data
105 * \code
106 * uint32 channels = (1 << IfxPsi5s_ChannelId_4); // enable channel 4
107 * uint32 mask = (1 << IfxPsi5s_ChannelId_4); // modify the selection for channel 4
108 *
109 * // enable the channel trigger counter
110 * IfxPsi5s_Psi5s_enableDisableChannelTriggerCounters(&psi5s, channels, mask);
111 *
112 * // enable the channel
113 * IfxPsi5s_Psi5s_enableDisableChannels(&psi5s, channels, mask);
114 *
115 * // start ASC interface
116 * IfxPsi5s_Psi5s_startAscTransactions(&psi5s);
117 *
118 * uint32 data = 0x5;
119 * // send data
120 * if(IfxPsi5s_Psi5s_sendChannelData(&psi5sChannel, data))
121 * {
122 * // wait till data transfer is completed
123 * while(psi5s.psi5s->INTSTAT[IfxPsi5s_ChannelId_4].B.TPI == 0);
124 * }
125 *
126 * \endcode
127 *
128 * \subsection IfxLld_Psi5s_Psi5s_readFrame Read Channel Frame
129 * \code
130 * // enable ASC receiver
131 * IfxPsi5s_Psi5s_enableAscReceiver(&psi5s);
132 *
133 * // start ASC interface
134 * IfxPsi5s_Psi5s_startAscTransactions(&psi5s);
135 *
136 * // add the code below to initiate the sensor to transmit frames
137 * // end of code to initiate the sensor to transmit frames
138 *
139 * IfxPsi5s_Psi5s_Frame frame;
140 *
141 * while(!IfxPsi5s_Psi5s_getReadFrameStatus(psi5,IfxPsi5s_ChannelId_4));
142 *
143 * IfxPsi5s_Psi5s_readFrame(&psi5sChannel, &frame))
144 *
145 * \endcode
146 *
147 * \defgroup IfxLld_Psi5s_Psi5s PSI5S
148 * \ingroup IfxLld_Psi5s
149 * \defgroup IfxLld_Psi5s_Psi5s_Structures Data Structures
150 * \ingroup IfxLld_Psi5s_Psi5s
151 * \defgroup IfxLld_Psi5s_Psi5s_Module Module Initialise Functions
152 * \ingroup IfxLld_Psi5s_Psi5s
153 * \defgroup IfxLld_Psi5s_Psi5s_Channel Channel Functions
154 * \ingroup IfxLld_Psi5s_Psi5s
155 * \defgroup IfxLld_Psi5s_Psi5s_Utility Utility Functions
156 * \ingroup IfxLld_Psi5s_Psi5s
157 * \defgroup IfxLld_Psi5s_Psi5s_Interrupt Interrupt configuration Function
158 * \ingroup IfxLld_Psi5s_Psi5s
159 */
160
161 #ifndef IFXPSI5S_PSI5S_H
162 #define IFXPSI5S_PSI5S_H 1
163
164 /******************************************************************************/
165 /*----------------------------------Includes----------------------------------*/
166 /******************************************************************************/
167
168 #include "Psi5s/Std/IfxPsi5s.h"
169 #include "Scu/Std/IfxScuWdt.h"
170
171 /******************************************************************************/
172 /*-----------------------------Data Structures--------------------------------*/
173 /******************************************************************************/
174
175 /** \addtogroup IfxLld_Psi5s_Psi5s_Structures
176 * \{ */
177 /** \brief Clock configuration data structure
178 */
179 typedef struct
180 {
181 uint32 frequency; /**< \brief Specifies the frequency for the clock */
182 IfxPsi5s_DividerMode mode; /**< \brief Specifies the mode of division for the clock */
183 IfxPsi5s_ClockType type; /**< \brief Specifies the type of clock (fracDiv / timestamp) */
184 } IfxPsi5s_Psi5s_Clock;
185
186 /** \brief Received individual bits
187 */
188 typedef struct
189 {
190 uint8 xcrc : 6; /**< \brief Received XCRC */
191 uint8 xcrcError : 1; /**< \brief XCRC error flag */
192 uint8 crc : 3; /**< \brief Received CRC */
193 uint8 crcError : 1; /**< \brief CRC error flag */
194 uint8 errorFlag0 : 1; /**< \brief Error signalling flag 0 */
195 uint8 errorFlag1 : 1; /**< \brief Error signalling flag 1 */
196 uint8 headerErrorFlag : 1; /**< \brief Header error signalling flag */
197 uint8 ascParityErrorFlag : 1; /**< \brief ASC parity error flag */
198 uint8 ascFramingErrorFlag : 1; /**< \brief ASC framing error flag */
199 uint8 ascOverrunErrorFlag : 1; /**< \brief ASC overrun error flag */
200 uint8 watchdogTimeoutErrorFlag : 1; /**< \brief Watchdog timeout error flag */
201 uint8 receiveBufferOverflowFlag : 1; /**< \brief Receive buffer overflow flag */
202 uint8 frameId : 3; /**< \brief Frame ID */
203 uint8 channelId : 3; /**< \brief Channel ID */
204 uint8 actualUartFrameCount : 3; /**< \brief UART frames actually received */
205 uint8 packetFrameCount : 4; /**< \brief Packet frame count */
206 } IfxPsi5s_Psi5s_ReceivedBits;
207
208 /** \brief Receive data structure with different segments of data
209 */
210 typedef struct
211 {
212 uint32 readData : 28; /**< \brief Received data */
213 uint8 packetFrameCount; /**< \brief Packet frame count */
214 } IfxPsi5s_Psi5s_ReceivedData;
215
216 /** \brief Received timestamp contents structure
217 */
218 typedef struct
219 {
220 uint8 packetFrameCount : 4; /**< \brief Packet frame count */
221 uint32 timestamp : 24; /**< \brief Received data */
222 } IfxPsi5s_Psi5s_Timestamp;
223
224 /** \} */
225
226 /** \addtogroup IfxLld_Psi5s_Psi5s_Structures
227 * \{ */
228 /** \brief PSI5S handle data structure
229 */
230 typedef struct
231 {
232 Ifx_PSI5S *psi5s; /**< \brief Specifies the pointer to the PSI5S module registers */
233 } IfxPsi5s_Psi5s;
234
235 /** \brief PSI5S module configuration structure
236 */
237 typedef struct
238 {
239 boolean parityCheckEnabled; /**< \brief Specifies whether parity check is enabled or not */
240 boolean framingCheckEnabled; /**< \brief Specifies whether framing check is enabled or not */
241 boolean overrunCheckEnabled; /**< \brief Specifies whether overrun check is enabled or not */
242 boolean fractionalDividerEnabled; /**< \brief Specifies whether fractional divider is enabled or not */
243 boolean receiverOddParityEnabled; /**< \brief Specifies whether receiver parity check should be for even or odd */
244 boolean transmitterOddParityEnabled; /**< \brief Specifies whether transmit parity generation should be even or odd */
245 uint32 baudrateFrequency; /**< \brief Specifies the baudrate frequency */
246 IfxPsi5s_AscStopBits stopBits; /**< \brief Specifies the number of stop bits */
247 IfxPsi5s_AscMode receiveMode; /**< \brief Specifies the mode of operation for ASC receiver */
248 IfxPsi5s_AscBaudratePrescalar baudrateSelection; /**< \brief Specifies whether divide-by-2 or divide-by-3 is selected for baudrate prescalar */
249 IfxPsi5s_AscMode transmitMode; /**< \brief Specifies the mode of operation for ASC transmitter */
250 IfxPsi5s_Psi5s_Clock clockOutput; /**< \brief Specifies the output clock properties */
251 IfxPsi5s_LoopBackMode loopbackEnabled; /**< \brief Specifies whether loopback is enabled or not */
252 } IfxPsi5s_Psi5s_AscConfig;
253
254 /** \brief channel trigger configuration structure
255 */
256 typedef struct
257 {
258 uint32 channelTriggerValue; /**< \brief Specifies the channel trigger value CTV */
259 uint32 channelTriggerCounter; /**< \brief Specifies the channel trigger counter */
260 } IfxPsi5s_Psi5s_ChannelTrigger;
261
262 /** \brief PSI5S global control configuration structure
263 */
264 typedef struct
265 {
266 boolean ascOnlyMode; /**< \brief Specifies if the module is in ASC only mode */
267 boolean crcErrorConsideredForRSI; /**< \brief Specifies whether CRCI is considered for RSI assertion */
268 boolean xcrcErrorConsideredForRSI; /**< \brief Specifies whether XCRCI is considered for RSI assertion */
269 boolean transmitErrorConsideredForRSI; /**< \brief Specifies whether TEI is considered for RSI assertion */
270 boolean parityErrorConsideredForRSI; /**< \brief Specifies whether PE is considered for RSI assertion */
271 boolean framingErrorConsideredForRSI; /**< \brief Specifies whether FE is considered for RSI assertion */
272 boolean overrunErrorConsideredForRSI; /**< \brief Specifies whether OE is considered for RSI assertion */
273 boolean receiveBufferErrorConsideredForRSI; /**< \brief Specifies whether RBI is considered for RSI assertion */
274 boolean headerErrorConsideredForRSI; /**< \brief Specifies whether HDI is considered for RSI assertion */
275 uint32 idleTime; /**< \brief Specifies the number of stop bits in addition to last UART frame that is required for start of frame detection */
276 } IfxPsi5s_Psi5s_GlobalControlConfig;
277
278 /** \brief Structure for PSI5S pin configuration
279 */
280 typedef struct
281 {
282 IFX_CONST IfxPsi5s_Rx_In *rx; /**< \brief PSI5S Rx pin */
283 IfxPort_InputMode rxMode; /**< \brief Rx pin as input */
284 IFX_CONST IfxPsi5s_Tx_Out *tx; /**< \brief PSI5S Tx pin */
285 IfxPort_OutputMode txMode; /**< \brief Tx as output */
286 IFX_CONST IfxPsi5s_Clk_Out *clk; /**< \brief PSI5S Clk Pin */
287 IfxPort_OutputMode clkMode; /**< \brief Clk as output */
288 IfxPort_PadDriver pinDriver; /**< \brief pad driver */
289 } IfxPsi5s_Psi5s_Pins;
290
291 /** \brief Sync pulse generation configuration structure
292 */
293 typedef struct
294 {
295 uint32 codeforZero; /**< \brief Specifies the code used to represent '0' - referred as TXCMD */
296 uint32 codeforOne; /**< \brief Specifies the code used to represent '1' - referred as ATXCMD */
297 IfxPsi5s_TimeBase timeBaseSelect; /**< \brief Specifies the clock source for CTV as internal or external */
298 IfxPsi5s_Trigger externalTimeBaseSelect; /**< \brief Specifies the clock source for CTV in the case of external */
299 IfxPsi5s_TriggerType periodicOrExternal; /**< \brief Specifies whether periodic trigger or external trigger or bypass is selected */
300 IfxPsi5s_Trigger externalTriggerSelect; /**< \brief Specifies the trigger source in case of external triggerring */
301 } IfxPsi5s_Psi5s_PulseGeneration;
302
303 /** \brief Receive control configuration structure - covers control fields from RCRA, RCRB and NFC registers
304 */
305 typedef struct
306 {
307 boolean timestampEnabled; /**< \brief Specifies whether the timestamp is enabled or not */
308 uint32 payloadLength[IFXPSI5S_NUM_SLOTS]; /**< \brief Specifies the payload length to be received for each slot */
309 IfxPsi5s_CrcOrParity crcOrParity[IFXPSI5S_NUM_SLOTS]; /**< \brief Specifies the crc or parity selection for the slots 0 to 5 */
310 IfxPsi5s_TimestampRegister timestampSelect; /**< \brief Specifies the timestamp register selection for pulses */
311 IfxPsi5s_TimestampTrigger timestampTriggerSelect; /**< \brief Specifies the timestamp register selection for pulses */
312 IfxPsi5s_FrameId frameIdSelect; /**< \brief Specifies if frame ID is updated from frame header or is a rolling number 0..5 copied from FCNT */
313 IfxPsi5s_WatchdogTimerMode watchdogTimerModeSelect; /**< \brief Specifies the watchdog timer restart is wrt frame or sync pulse reception */
314 IfxPsi5s_UartFrameCount uartFrameCount[IFXPSI5S_NUM_SLOTS]; /**< \brief Specifies the expected number of UART frames per packet frame for each slot */
315 IfxPsi5s_NumberExpectedFrames numberOfFramesExpected; /**< \brief Specifies the number of psi5s frames expected */
316 } IfxPsi5s_Psi5s_ReceiveControl;
317
318 /** \brief "Received data" data structure
319 */
320 typedef union
321 {
322 uint32 rdr; /**< \brief received data with frame count */
323 IfxPsi5s_Psi5s_ReceivedData receivedData; /**< \brief Receive data structure with different segments of data */
324 } IfxPsi5s_Psi5s_ReceiveData;
325
326 /** \brief Receiver status data structure
327 */
328 typedef union
329 {
330 uint32 rds; /**< \brief received status data. */
331 IfxPsi5s_Psi5s_ReceivedBits receivedBits; /**< \brief Received individual bits */
332 } IfxPsi5s_Psi5s_ReceiveStatus;
333
334 /** \brief Receiver timestamp data structure
335 */
336 typedef union
337 {
338 uint32 tsm; /**< \brief received timestamp along with frame count */
339 IfxPsi5s_Psi5s_Timestamp timeStamp; /**< \brief Received timestamp contents structure */
340 } IfxPsi5s_Psi5s_ReceiveTimestamp;
341
342 /** \brief Timestamp configuration data structure
343 */
344 typedef struct
345 {
346 IfxPsi5s_Trigger externalTimeBaseSelect; /**< \brief Specifies the clock base for counter CTS in the case of external */
347 IfxPsi5s_TimeBase timeBaseSelect; /**< \brief Specifies the clock source for CTS as internal or external */
348 } IfxPsi5s_Psi5s_TimeStampConfig;
349
350 /** \brief Transmit control configuration structure
351 */
352 typedef struct
353 {
354 boolean bitStuffControl; /**< \brief Specifies whether the bit stuffing is turned on or not */
355 boolean crcGenerationControl; /**< \brief Specifies whether the crc generation is turned on or not */
356 boolean startSequenceGenerationControl; /**< \brief Specifies whether the start sequence generation is turned on or not */
357 uint32 payloadLength; /**< \brief Specifies the payload length to be sent */
358 IfxPsi5s_EnhancedProtocol enhancedProtocolSelection; /**< \brief Specifies whether the enhanced protocol is selected or not */
359 } IfxPsi5s_Psi5s_TransmitControl;
360
361 /** \} */
362
363 /** \addtogroup IfxLld_Psi5s_Psi5s_Structures
364 * \{ */
365 /** \brief Channel handle data structure
366 */
367 typedef struct
368 {
369 IfxPsi5s_Psi5s *module; /**< \brief The PSI5S handle structure */
370 IfxPsi5s_ChannelId channelId; /**< \brief Specifies the channel index */
371 } IfxPsi5s_Psi5s_Channel;
372
373 /** \brief Channel configuration structure
374 */
375 typedef struct
376 {
377 IFX_CONST IfxPsi5s_Psi5s *module; /**< \brief Specifies pointer to the IfxPsi5s_Psi5s module handle */
378 uint32 watchdogTimerLimit; /**< \brief Specifies the watchdog timer limit for each of the slots 0 to 6 */
379 IfxPsi5s_ChannelId channelId; /**< \brief Specifies the channel index */
380 IfxPsi5s_Psi5s_PulseGeneration pulseGeneration; /**< \brief Specifies the configuration for sync pulse generation */
381 IfxPsi5s_Psi5s_ChannelTrigger channelTrigger; /**< \brief Specifies the configuration for channel trigger */
382 IfxPsi5s_Psi5s_ReceiveControl receiveControl; /**< \brief Specifies the configuration for reception */
383 IfxPsi5s_Psi5s_TransmitControl sendControl; /**< \brief Specifies the configuration for transmission */
384 } IfxPsi5s_Psi5s_ChannelConfig;
385
386 /** \brief PSI5S module configuration structure
387 */
388 typedef struct
389 {
390 Ifx_PSI5S *module; /**< \brief Specifies the pointer to the PSI5S module registers */
391 IfxPsi5s_Psi5s_Clock fracDiv; /**< \brief Specifies fractionally divided clock properties */
392 IfxPsi5s_Psi5s_Clock timestampClock; /**< \brief Specifies the time stamp clock properties */
393 IfxPsi5s_Psi5s_TimeStampConfig timestampCounterA; /**< \brief Specifies the time stamp counter A properties */
394 IfxPsi5s_Psi5s_TimeStampConfig timestampCounterB; /**< \brief Specifies the time stamp counter B properties */
395 IfxPsi5s_Psi5s_AscConfig ascConfig; /**< \brief Specifies the configuration for ASC */
396 IfxPsi5s_Psi5s_GlobalControlConfig globalControlConfig; /**< \brief Specifies the global control configuration */
397 IFX_CONST IfxPsi5s_Psi5s_Pins *pins; /**< \brief structure for PSI5S pin configuration */
398 } IfxPsi5s_Psi5s_Config;
399
400 /** \brief Psi5s frame data structure
401 */
402 typedef struct
403 {
404 IfxPsi5s_Psi5s_ReceiveData data; /**< \brief Received data */
405 IfxPsi5s_Psi5s_ReceiveStatus status; /**< \brief Receiver status */
406 IfxPsi5s_Psi5s_ReceiveTimestamp timestamp; /**< \brief Receiver timestamp */
407 } IfxPsi5s_Psi5s_Frame;
408
409 /** \} */
410
411 /** \addtogroup IfxLld_Psi5s_Psi5s_Module
412 * \{ */
413
414 /******************************************************************************/
415 /*-------------------------Global Function Prototypes-------------------------*/
416 /******************************************************************************/
417
418 /** \brief De-initialise the PSI5S module
419 * \param psi5s pointer to the PSI5S module
420 * \return None
421 */
422 IFX_EXTERN void IfxPsi5s_Psi5s_deInitModule(IfxPsi5s_Psi5s *psi5s);
423
424 /** \brief Initialise the PSI5S with the supplied configureation
425 * \param psi5s pointer to the PSI5S module
426 * \param config pointer to the PSI5S configuration
427 * \return TRUE if valid otherwise FALSE
428 *
429 * Usage Example: \ref IfxLld_Psi5s_Psi5s_Usage
430 *
431 */
432 IFX_EXTERN boolean IfxPsi5s_Psi5s_initModule(IfxPsi5s_Psi5s *psi5s, const IfxPsi5s_Psi5s_Config *config);
433
434 /** \brief Initialise buffer with default PSI5S configuration
435 * \param config pointer to the PSI5S module configuration buffer
436 * \param psi5s pointer to the PSI5S register space
437 * \return None
438 *
439 * Usage Example: \ref IfxLld_Psi5s_Psi5s_Usage
440 *
441 */
442 IFX_EXTERN void IfxPsi5s_Psi5s_initModuleConfig(IfxPsi5s_Psi5s_Config *config, Ifx_PSI5S *psi5s);
443
444 /** \} */
445
446 /** \addtogroup IfxLld_Psi5s_Psi5s_Channel
447 * \{ */
448
449 /******************************************************************************/
450 /*-------------------------Inline Function Prototypes-------------------------*/
451 /******************************************************************************/
452
453 /** \brief Enable ASC interface receiver
454 * \param psi5s pointer to the PSI5S module
455 * \return None
456 *
457 * Usage Example: \ref IfxLld_Psi5s_Psi5s_Usage
458 *
459 */
460 IFX_INLINE void IfxPsi5s_Psi5s_enableAscReceiver(IfxPsi5s_Psi5s *psi5s);
461
462 /** \brief Access function to enable/disable any combination of channel trigger counters selected by mask parameter
463 * \param psi5s pointer to the PSI5S module
464 * \param channels specifies the channel trigger counters which should be enabled/disabled
465 * \param mask specifies the channel trigger counters which should be modified
466 * \return None
467 *
468 * Usage Example: \ref IfxLld_Psi5s_Psi5s_Usage
469 *
470 */
471 IFX_INLINE void IfxPsi5s_Psi5s_enableDisableChannelTriggerCounters(IfxPsi5s_Psi5s *psi5s, uint32 channels, uint32 mask);
472
473 /** \brief Access function to enable/disable any combination of channels selected by mask parameter
474 * \param psi5s pointer to the PSI5S module
475 * \param channels specifies the channels which should be enabled/disabled
476 * \param mask specifies the channels which should be modified
477 * \return None
478 *
479 * Usage Example: \ref IfxLld_Psi5s_Psi5s_Usage
480 *
481 */
482 IFX_INLINE void IfxPsi5s_Psi5s_enableDisableChannels(IfxPsi5s_Psi5s *psi5s, uint32 channels, uint32 mask);
483
484 /** \brief Start ASC transactions
485 * \param psi5s pointer to the PSI5S module
486 * \return None
487 *
488 * Usage Example: \ref IfxLld_Psi5s_Psi5s_Usage
489 *
490 */
491 IFX_INLINE void IfxPsi5s_Psi5s_startAscTransactions(IfxPsi5s_Psi5s *psi5s);
492
493 /******************************************************************************/
494 /*-------------------------Global Function Prototypes-------------------------*/
495 /******************************************************************************/
496
497 /** \brief Initialize the channel with the supplied configuration
498 * \param channel pointer to the PSI5S channel
499 * \param config pointer to the PSI5S channel configuration
500 * \return TRUE on success & FALSE if configuration not valid (e.g. missing resource)
501 *
502 * Usage Example: \ref IfxLld_Psi5s_Psi5s_Usage
503 *
504 */
505 IFX_EXTERN boolean IfxPsi5s_Psi5s_initChannel(IfxPsi5s_Psi5s_Channel *channel, const IfxPsi5s_Psi5s_ChannelConfig *config);
506
507 /** \brief Initialise buffer with default channel configuration
508 * \param config pointer to the PSI5S channel configuration
509 * \param psi5s pointer to the PSI5S module
510 * \return None
511 *
512 * Usage Example: \ref IfxLld_Psi5s_Psi5s_Usage
513 *
514 */
515 IFX_EXTERN void IfxPsi5s_Psi5s_initChannelConfig(IfxPsi5s_Psi5s_ChannelConfig *config, IfxPsi5s_Psi5s *psi5s);
516
517 /** \brief Get the received psi5s frame for the channel
518 * \param channel pointer to the PSI5S module
519 * \param frame pointer to the PSI5S frame buffer
520 * \return None
521 *
522 * Usage Example: \ref IfxLld_Psi5s_Psi5s_Usage
523 *
524 */
525 IFX_EXTERN void IfxPsi5s_Psi5s_readFrame(IfxPsi5s_Psi5s_Channel *channel, IfxPsi5s_Psi5s_Frame *frame);
526
527 /** \brief Transmit the data through the channel
528 * \param channel pointer to the PSI5S channel
529 * \param data data to be sent
530 * \return TRUE if Sends data otherwise FALSE
531 *
532 * Usage Example: \ref IfxLld_Psi5s_Psi5s_Usage
533 *
534 */
535 IFX_EXTERN boolean IfxPsi5s_Psi5s_sendChannelData(IfxPsi5s_Psi5s_Channel *channel, uint32 data);
536
537 /** \} */
538
539 /** \addtogroup IfxLld_Psi5s_Psi5s_Utility
540 * \{ */
541
542 /******************************************************************************/
543 /*-------------------------Global Function Prototypes-------------------------*/
544 /******************************************************************************/
545
546 /** \brief Enable PSI5S kernel
547 * \param psi5s pointer to the base of PSI5S register space
548 * \return None
549 */
550 IFX_EXTERN void IfxPsi5s_Psi5s_enableModule(Ifx_PSI5S *psi5s);
551
552 /** \brief get Baud Rate
553 * \param psi5s Pointer to PSI5S Module space
554 * \param ascConfig Pointer to ASC configuration structure
555 * \return None
556 */
557 IFX_EXTERN void IfxPsi5s_Psi5s_getBaudrate(Ifx_PSI5S *psi5s, IfxPsi5s_Psi5s_AscConfig *ascConfig);
558
559 /** \brief Reset PSI5S kernel
560 * \param psi5s pointer to the base of PSI5S registers
561 * \return None
562 */
563 IFX_EXTERN void IfxPsi5s_Psi5s_resetModule(Ifx_PSI5S *psi5s);
564
565 /** \} */
566
567 /******************************************************************************/
568 /*-------------------------Inline Function Prototypes-------------------------*/
569 /******************************************************************************/
570
571 /** \brief Get the received psi5s frame for the channel
572 * \param psi5s pointer to the PSI5S module
573 * \param channelId specifies channelID
574 * \return return the status of Frame
575 */
576 IFX_INLINE boolean IfxPsi5s_Psi5s_getReadFrameStatus(IfxPsi5s_Psi5s *psi5s, IfxPsi5s_ChannelId channelId);
577
578 /******************************************************************************/
579 /*---------------------Inline Function Implementations------------------------*/
580 /******************************************************************************/
581
582 IFX_INLINE void IfxPsi5s_Psi5s_enableAscReceiver(IfxPsi5s_Psi5s *psi5s)
583 {
584 IfxPsi5s_enableAscReceiver(psi5s->psi5s);
585 }
586
587
588 IFX_INLINE void IfxPsi5s_Psi5s_enableDisableChannelTriggerCounters(IfxPsi5s_Psi5s *psi5s, uint32 channels, uint32 mask)
589 {
590 IfxPsi5s_enableDisableChannelTriggerCounters(psi5s->psi5s, channels, mask);
591 }
592
593
594 IFX_INLINE void IfxPsi5s_Psi5s_enableDisableChannels(IfxPsi5s_Psi5s *psi5s, uint32 channels, uint32 mask)
595 {
596 IfxPsi5s_enableDisableChannels(psi5s->psi5s, channels, mask);
597 }
598
599
600 IFX_INLINE void IfxPsi5s_Psi5s_startAscTransactions(IfxPsi5s_Psi5s *psi5s)
601 {
602 IfxPsi5s_startAscTransactions(psi5s->psi5s);
603 }
604
605
606 IFX_INLINE boolean IfxPsi5s_Psi5s_getReadFrameStatus(IfxPsi5s_Psi5s *psi5s, IfxPsi5s_ChannelId channelId)
607 {
608 boolean flag = 0;
609 flag = IfxPsi5s_getReadFrameStatus(psi5s->psi5s, channelId);
610 return flag;
611 }
612
613
614 #endif /* IFXPSI5S_PSI5S_H */
IfxPsi5s_WatchdogTimerMode
IfxPsi5s_WatchdogTimerMode
MODULE_PSI5S.RCRAx.WDMS:Watchdog timer mode.
Definition: IfxPsi5s.h:346
IfxPsi5s_Psi5s_initChannelConfig
IFX_EXTERN void IfxPsi5s_Psi5s_initChannelConfig(IfxPsi5s_Psi5s_ChannelConfig *config, IfxPsi5s_Psi5s *psi5s)
Initialise buffer with default channel configuration.
Definition: IfxPsi5s_Psi5s.c:222
IfxPsi5s_Psi5s_ReceiveControl::numberOfFramesExpected
IfxPsi5s_NumberExpectedFrames numberOfFramesExpected
Specifies the number of psi5s frames expected.
Definition: IfxPsi5s_Psi5s.h:315
IfxPsi5s_Psi5s_ReceivedBits::packetFrameCount
uint8 packetFrameCount
Packet frame count.
Definition: IfxPsi5s_Psi5s.h:205
IfxPsi5s_Psi5s_ReceiveTimestamp::timeStamp
IfxPsi5s_Psi5s_Timestamp timeStamp
Received timestamp contents structure.
Definition: IfxPsi5s_Psi5s.h:339
IfxPsi5s_Psi5s_GlobalControlConfig::receiveBufferErrorConsideredForRSI
boolean receiveBufferErrorConsideredForRSI
Specifies whether RBI is considered for RSI assertion.
Definition: IfxPsi5s_Psi5s.h:273
IfxPsi5s_Psi5s_resetModule
IFX_EXTERN void IfxPsi5s_Psi5s_resetModule(Ifx_PSI5S *psi5s)
Reset PSI5S kernel.
Definition: IfxPsi5s_Psi5s.c:557
IfxPsi5s_Psi5s_Pins::clk
IFX_CONST IfxPsi5s_Clk_Out * clk
PSI5S Clk Pin.
Definition: IfxPsi5s_Psi5s.h:286
IfxPsi5s_Psi5s_TransmitControl::payloadLength
uint32 payloadLength
Specifies the payload length to be sent.
Definition: IfxPsi5s_Psi5s.h:357
IfxPsi5s_Psi5s_ReceivedData::readData
uint32 readData
Received data.
Definition: IfxPsi5s_Psi5s.h:212
IfxPsi5s_ChannelId
IfxPsi5s_ChannelId
PSI5S Channel Id defined in MODULE_PSI5S.RDS.B.CID.
Definition: IfxPsi5s.h:116
IfxPsi5s_Psi5s_TransmitControl::enhancedProtocolSelection
IfxPsi5s_EnhancedProtocol enhancedProtocolSelection
Specifies whether the enhanced protocol is selected or not.
Definition: IfxPsi5s_Psi5s.h:358
IfxPsi5s_Psi5s_AscConfig
PSI5S module configuration structure.
Definition: IfxPsi5s_Psi5s.h:237
IfxPsi5s_Psi5s_ChannelConfig::channelTrigger
IfxPsi5s_Psi5s_ChannelTrigger channelTrigger
Specifies the configuration for channel trigger.
Definition: IfxPsi5s_Psi5s.h:381
IfxPsi5s_Psi5s_initChannel
IFX_EXTERN boolean IfxPsi5s_Psi5s_initChannel(IfxPsi5s_Psi5s_Channel *channel, const IfxPsi5s_Psi5s_ChannelConfig *config)
Initialize the channel with the supplied configuration.
Definition: IfxPsi5s_Psi5s.c:132
IfxPsi5s_Psi5s_ReceivedBits::xcrc
uint8 xcrc
Received XCRC.
Definition: IfxPsi5s_Psi5s.h:190
IfxPsi5s_Psi5s_ReceivedBits::channelId
uint8 channelId
Channel ID.
Definition: IfxPsi5s_Psi5s.h:203
IfxPsi5s_AscBaudratePrescalar
IfxPsi5s_AscBaudratePrescalar
MODULE_PSI5S.BG.BR_VALUE:Baudrate prescalar select.
Definition: IfxPsi5s.h:88
IfxPsi5s_Psi5s_ReceivedBits::actualUartFrameCount
uint8 actualUartFrameCount
UART frames actually received.
Definition: IfxPsi5s_Psi5s.h:204
IfxPsi5s_Rx_In
RX pin mapping structure.
Definition: IfxPsi5s_PinMap.h:56
IfxPsi5s_EnhancedProtocol
IfxPsi5s_EnhancedProtocol
MODULE_PSI5S.SCRx.EPS(x=0,1,...,7):Enhanced protocol types.
Definition: IfxPsi5s.h:159
IfxPsi5s_Psi5s_ReceiveControl::timestampSelect
IfxPsi5s_TimestampRegister timestampSelect
Specifies the timestamp register selection for pulses.
Definition: IfxPsi5s_Psi5s.h:310
IfxPsi5s_Psi5s_AscConfig::receiverOddParityEnabled
boolean receiverOddParityEnabled
Specifies whether receiver parity check should be for even or odd.
Definition: IfxPsi5s_Psi5s.h:243
IfxPsi5s_Psi5s_Clock::frequency
uint32 frequency
Specifies the frequency for the clock.
Definition: IfxPsi5s_Psi5s.h:181
IfxPsi5s_Psi5s_ReceiveStatus
Receiver status data structure.
Definition: IfxPsi5s_Psi5s.h:328
IfxPsi5s_Psi5s_PulseGeneration::codeforZero
uint32 codeforZero
Specifies the code used to represent &#39;0&#39; - referred as TXCMD.
Definition: IfxPsi5s_Psi5s.h:295
IfxPsi5s_Psi5s_enableDisableChannelTriggerCounters
IFX_INLINE void IfxPsi5s_Psi5s_enableDisableChannelTriggerCounters(IfxPsi5s_Psi5s *psi5s, uint32 channels, uint32 mask)
Access function to enable/disable any combination of channel trigger counters selected by mask parame...
Definition: IfxPsi5s_Psi5s.h:588
IfxPsi5s_Psi5s_Config::timestampClock
IfxPsi5s_Psi5s_Clock timestampClock
Specifies the time stamp clock properties.
Definition: IfxPsi5s_Psi5s.h:392
IfxPsi5s_TimestampTrigger
IfxPsi5s_TimestampTrigger
MODULE_PSI5S.RCRAx.TSTS:Timestamp trigger.
Definition: IfxPsi5s.h:292
IfxPsi5s_Psi5s_ChannelTrigger::channelTriggerValue
uint32 channelTriggerValue
Specifies the channel trigger value CTV.
Definition: IfxPsi5s_Psi5s.h:258
IfxPsi5s_Psi5s_PulseGeneration::timeBaseSelect
IfxPsi5s_TimeBase timeBaseSelect
Specifies the clock source for CTV as internal or external.
Definition: IfxPsi5s_Psi5s.h:297
IfxPsi5s_TimestampRegister
IfxPsi5s_TimestampRegister
MODULE_PSI5S.TSCNTx(x= A,B):Timestamp register.
Definition: IfxPsi5s.h:284
IfxPsi5s_DividerMode
IfxPsi5s_DividerMode
MODULE_PSI5S.FDR.DM;MODULE_PSI5S.FDRT.B.DM:Divider mode.
Definition: IfxPsi5s.h:149
IfxPsi5s_Psi5s_Pins::tx
IFX_CONST IfxPsi5s_Tx_Out * tx
PSI5S Tx pin.
Definition: IfxPsi5s_Psi5s.h:284
IfxPsi5s.h
PSI5S basic functionality.
IfxPsi5s_Psi5s_ReceivedBits::receiveBufferOverflowFlag
uint8 receiveBufferOverflowFlag
Receive buffer overflow flag.
Definition: IfxPsi5s_Psi5s.h:201
IfxPsi5s_Psi5s_PulseGeneration::externalTriggerSelect
IfxPsi5s_Trigger externalTriggerSelect
Specifies the trigger source in case of external triggerring.
Definition: IfxPsi5s_Psi5s.h:300
IfxPsi5s_Psi5s_ReceivedBits::ascFramingErrorFlag
uint8 ascFramingErrorFlag
ASC framing error flag.
Definition: IfxPsi5s_Psi5s.h:198
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:140
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxPsi5s_Psi5s_GlobalControlConfig::ascOnlyMode
boolean ascOnlyMode
Specifies if the module is in ASC only mode.
Definition: IfxPsi5s_Psi5s.h:266
IfxPsi5s_Psi5s_Config
PSI5S module configuration structure.
Definition: IfxPsi5s_Psi5s.h:388
IfxPsi5s_Psi5s_GlobalControlConfig::idleTime
uint32 idleTime
Specifies the number of stop bits in addition to last UART frame that is required for start of frame ...
Definition: IfxPsi5s_Psi5s.h:275
IfxPsi5s_enableAscReceiver
void IfxPsi5s_enableAscReceiver(Ifx_PSI5S *psi5s)
Enable ASC receiver.
Definition: IfxPsi5s.c:69
IfxPsi5s_Psi5s_enableDisableChannels
IFX_INLINE void IfxPsi5s_Psi5s_enableDisableChannels(IfxPsi5s_Psi5s *psi5s, uint32 channels, uint32 mask)
Access function to enable/disable any combination of channels selected by mask parameter.
Definition: IfxPsi5s_Psi5s.h:594
IfxPsi5s_Psi5s_ReceivedBits::ascParityErrorFlag
uint8 ascParityErrorFlag
ASC parity error flag.
Definition: IfxPsi5s_Psi5s.h:197
IfxPsi5s_NumberExpectedFrames
IfxPsi5s_NumberExpectedFrames
MODULE_PSI5S.NFC.NFx:Expected Psi5s frames.
Definition: IfxPsi5s.h:238
IfxPsi5s_Psi5s_GlobalControlConfig::framingErrorConsideredForRSI
boolean framingErrorConsideredForRSI
Specifies whether FE is considered for RSI assertion.
Definition: IfxPsi5s_Psi5s.h:271
IfxPsi5s_Psi5s_AscConfig::loopbackEnabled
IfxPsi5s_LoopBackMode loopbackEnabled
Specifies whether loopback is enabled or not.
Definition: IfxPsi5s_Psi5s.h:251
IfxPsi5s_Psi5s_PulseGeneration::periodicOrExternal
IfxPsi5s_TriggerType periodicOrExternal
Specifies whether periodic trigger or external trigger or bypass is selected.
Definition: IfxPsi5s_Psi5s.h:299
IfxPsi5s_Psi5s
PSI5S handle data structure.
Definition: IfxPsi5s_Psi5s.h:230
IfxPsi5s_Psi5s_ReceivedData
Receive data structure with different segments of data.
Definition: IfxPsi5s_Psi5s.h:210
IfxPsi5s_Psi5s_ReceiveControl::timestampTriggerSelect
IfxPsi5s_TimestampTrigger timestampTriggerSelect
Specifies the timestamp register selection for pulses.
Definition: IfxPsi5s_Psi5s.h:311
IfxPsi5s_Psi5s_Pins::rx
IFX_CONST IfxPsi5s_Rx_In * rx
PSI5S Rx pin.
Definition: IfxPsi5s_Psi5s.h:282
IfxPsi5s_Psi5s_AscConfig::transmitMode
IfxPsi5s_AscMode transmitMode
Specifies the mode of operation for ASC transmitter.
Definition: IfxPsi5s_Psi5s.h:249
IfxPsi5s_Psi5s_Frame::status
IfxPsi5s_Psi5s_ReceiveStatus status
Receiver status.
Definition: IfxPsi5s_Psi5s.h:405
IfxPsi5s_Psi5s_ReceiveData
"Received data" data structure
Definition: IfxPsi5s_Psi5s.h:320
IfxPsi5s_Psi5s_ChannelConfig::receiveControl
IfxPsi5s_Psi5s_ReceiveControl receiveControl
Specifies the configuration for reception.
Definition: IfxPsi5s_Psi5s.h:382
IfxPsi5s_Psi5s_getBaudrate
IFX_EXTERN void IfxPsi5s_Psi5s_getBaudrate(Ifx_PSI5S *psi5s, IfxPsi5s_Psi5s_AscConfig *ascConfig)
get Baud Rate
Definition: IfxPsi5s_Psi5s.c:97
IfxPsi5s_Psi5s_PulseGeneration
Sync pulse generation configuration structure.
Definition: IfxPsi5s_Psi5s.h:293
IfxScuWdt.h
SCU basic functionality.
IfxPsi5s_Psi5s_Frame::timestamp
IfxPsi5s_Psi5s_ReceiveTimestamp timestamp
Receiver timestamp.
Definition: IfxPsi5s_Psi5s.h:406
IfxPsi5s_Psi5s_TransmitControl::bitStuffControl
boolean bitStuffControl
Specifies whether the bit stuffing is turned on or not.
Definition: IfxPsi5s_Psi5s.h:354
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxPsi5s_Psi5s_ReceivedBits::errorFlag0
uint8 errorFlag0
Error signalling flag 0.
Definition: IfxPsi5s_Psi5s.h:194
IfxPsi5s_Psi5s_ChannelTrigger::channelTriggerCounter
uint32 channelTriggerCounter
Specifies the channel trigger counter.
Definition: IfxPsi5s_Psi5s.h:259
IfxPsi5s_Psi5s_enableAscReceiver
IFX_INLINE void IfxPsi5s_Psi5s_enableAscReceiver(IfxPsi5s_Psi5s *psi5s)
Enable ASC interface receiver.
Definition: IfxPsi5s_Psi5s.h:582
IfxPsi5s_Psi5s_initModule
IFX_EXTERN boolean IfxPsi5s_Psi5s_initModule(IfxPsi5s_Psi5s *psi5s, const IfxPsi5s_Psi5s_Config *config)
Initialise the PSI5S with the supplied configureation.
Definition: IfxPsi5s_Psi5s.c:279
IfxPsi5s_Psi5s_Channel
Channel handle data structure.
Definition: IfxPsi5s_Psi5s.h:367
IfxPsi5s_Psi5s_Config::ascConfig
IfxPsi5s_Psi5s_AscConfig ascConfig
Specifies the configuration for ASC.
Definition: IfxPsi5s_Psi5s.h:395
IfxPsi5s_Psi5s_ChannelConfig
Channel configuration structure.
Definition: IfxPsi5s_Psi5s.h:375
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxPsi5s_Psi5s_initModuleConfig
IFX_EXTERN void IfxPsi5s_Psi5s_initModuleConfig(IfxPsi5s_Psi5s_Config *config, Ifx_PSI5S *psi5s)
Initialise buffer with default PSI5S configuration.
Definition: IfxPsi5s_Psi5s.c:397
IfxPsi5s_Psi5s::psi5s
Ifx_PSI5S * psi5s
Specifies the pointer to the PSI5S module registers.
Definition: IfxPsi5s_Psi5s.h:232
IfxPsi5s_Psi5s_ReceivedBits::xcrcError
uint8 xcrcError
XCRC error flag.
Definition: IfxPsi5s_Psi5s.h:191
IfxPsi5s_Psi5s_PulseGeneration::externalTimeBaseSelect
IfxPsi5s_Trigger externalTimeBaseSelect
Specifies the clock source for CTV in the case of external.
Definition: IfxPsi5s_Psi5s.h:298
IfxPsi5s_LoopBackMode
IfxPsi5s_LoopBackMode
Enable/Disable Loop back Mode.
Definition: IfxPsi5s.h:222
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxPsi5s_Psi5s_ReceiveStatus::rds
uint32 rds
received status data.
Definition: IfxPsi5s_Psi5s.h:330
IfxPsi5s_TriggerType
IfxPsi5s_TriggerType
Trigger type defined in.
Definition: IfxPsi5s.h:328
IfxPsi5s_FrameId
IfxPsi5s_FrameId
MODULE_PSI5S.RCRAx.FIDS(x=0,1,....,7):.Frame ID updation.
Definition: IfxPsi5s.h:168
IfxPsi5s_Psi5s_ReceivedBits::frameId
uint8 frameId
Frame ID.
Definition: IfxPsi5s_Psi5s.h:202
IfxPsi5s_Psi5s_ReceiveControl::watchdogTimerModeSelect
IfxPsi5s_WatchdogTimerMode watchdogTimerModeSelect
Specifies the watchdog timer restart is wrt frame or sync pulse reception.
Definition: IfxPsi5s_Psi5s.h:313
IfxPsi5s_Psi5s_ReceivedBits::errorFlag1
uint8 errorFlag1
Error signalling flag 1.
Definition: IfxPsi5s_Psi5s.h:195
IfxPsi5s_Psi5s_getReadFrameStatus
IFX_INLINE boolean IfxPsi5s_Psi5s_getReadFrameStatus(IfxPsi5s_Psi5s *psi5s, IfxPsi5s_ChannelId channelId)
Get the received psi5s frame for the channel.
Definition: IfxPsi5s_Psi5s.h:606
IfxPsi5s_Psi5s_AscConfig::stopBits
IfxPsi5s_AscStopBits stopBits
Specifies the number of stop bits.
Definition: IfxPsi5s_Psi5s.h:246
IfxPsi5s_Psi5s_Clock::mode
IfxPsi5s_DividerMode mode
Specifies the mode of division for the clock.
Definition: IfxPsi5s_Psi5s.h:182
IfxPsi5s_Psi5s_AscConfig::framingCheckEnabled
boolean framingCheckEnabled
Specifies whether framing check is enabled or not.
Definition: IfxPsi5s_Psi5s.h:240
IfxPsi5s_Trigger
IfxPsi5s_Trigger
MODULE_PSI5S.TSCNTA.B.ETB;MODULE_PSI5S.TSCNTB.B.ETB:Trigger Id.
Definition: IfxPsi5s.h:300
IfxPsi5s_Psi5s_AscConfig::receiveMode
IfxPsi5s_AscMode receiveMode
Specifies the mode of operation for ASC receiver.
Definition: IfxPsi5s_Psi5s.h:247
IfxPsi5s_Psi5s_PulseGeneration::codeforOne
uint32 codeforOne
Specifies the code used to represent &#39;1&#39; - referred as ATXCMD.
Definition: IfxPsi5s_Psi5s.h:296
IfxPsi5s_startAscTransactions
void IfxPsi5s_startAscTransactions(Ifx_PSI5S *psi5s)
Start ASC transactions.
Definition: IfxPsi5s.c:144
IfxPsi5s_Psi5s_GlobalControlConfig::crcErrorConsideredForRSI
boolean crcErrorConsideredForRSI
Specifies whether CRCI is considered for RSI assertion.
Definition: IfxPsi5s_Psi5s.h:267
IfxPsi5s_Psi5s_Timestamp
Received timestamp contents structure.
Definition: IfxPsi5s_Psi5s.h:218
IfxPsi5s_Psi5s_AscConfig::transmitterOddParityEnabled
boolean transmitterOddParityEnabled
Specifies whether transmit parity generation should be even or odd.
Definition: IfxPsi5s_Psi5s.h:244
IfxPsi5s_Psi5s_GlobalControlConfig
PSI5S global control configuration structure.
Definition: IfxPsi5s_Psi5s.h:264
IfxPsi5s_Psi5s_Config::globalControlConfig
IfxPsi5s_Psi5s_GlobalControlConfig globalControlConfig
Specifies the global control configuration.
Definition: IfxPsi5s_Psi5s.h:396
IfxPsi5s_Psi5s_GlobalControlConfig::parityErrorConsideredForRSI
boolean parityErrorConsideredForRSI
Specifies whether PE is considered for RSI assertion.
Definition: IfxPsi5s_Psi5s.h:270
IfxPsi5s_Psi5s_TimeStampConfig
Timestamp configuration data structure.
Definition: IfxPsi5s_Psi5s.h:344
IfxPsi5s_Psi5s_Config::timestampCounterB
IfxPsi5s_Psi5s_TimeStampConfig timestampCounterB
Specifies the time stamp counter B properties.
Definition: IfxPsi5s_Psi5s.h:394
IfxPsi5s_Psi5s_ChannelConfig::module
IFX_CONST IfxPsi5s_Psi5s * module
Specifies pointer to the IfxPsi5s_Psi5s module handle.
Definition: IfxPsi5s_Psi5s.h:377
IfxPsi5s_Psi5s_ReceiveTimestamp
Receiver timestamp data structure.
Definition: IfxPsi5s_Psi5s.h:336
IfxPsi5s_Psi5s_AscConfig::fractionalDividerEnabled
boolean fractionalDividerEnabled
Specifies whether fractional divider is enabled or not.
Definition: IfxPsi5s_Psi5s.h:242
IfxPsi5s_Psi5s_Frame::data
IfxPsi5s_Psi5s_ReceiveData data
Received data.
Definition: IfxPsi5s_Psi5s.h:404
IfxPsi5s_Psi5s_AscConfig::parityCheckEnabled
boolean parityCheckEnabled
Specifies whether parity check is enabled or not.
Definition: IfxPsi5s_Psi5s.h:239
IfxPsi5s_Psi5s_Channel::channelId
IfxPsi5s_ChannelId channelId
Specifies the channel index.
Definition: IfxPsi5s_Psi5s.h:370
IfxPsi5s_Psi5s_Config::fracDiv
IfxPsi5s_Psi5s_Clock fracDiv
Specifies fractionally divided clock properties.
Definition: IfxPsi5s_Psi5s.h:391
IFXPSI5S_NUM_SLOTS
#define IFXPSI5S_NUM_SLOTS
Definition: IfxPsi5s_cfg.h:68
IfxPsi5s_AscMode
IfxPsi5s_AscMode
MODULE_PSI5S.CON.M:ASC mode of operation.
Definition: IfxPsi5s.h:96
IfxPsi5s_getReadFrameStatus
boolean IfxPsi5s_getReadFrameStatus(Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channelId)
Get the received psi5s frame for the channel.
Definition: IfxPsi5s.c:113
IfxPsi5s_Psi5s_ReceivedBits::ascOverrunErrorFlag
uint8 ascOverrunErrorFlag
ASC overrun error flag.
Definition: IfxPsi5s_Psi5s.h:199
IfxPsi5s_Psi5s_Pins::txMode
IfxPort_OutputMode txMode
Tx as output.
Definition: IfxPsi5s_Psi5s.h:285
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:151
IfxPsi5s_Psi5s_AscConfig::baudrateSelection
IfxPsi5s_AscBaudratePrescalar baudrateSelection
Specifies whether divide-by-2 or divide-by-3 is selected for baudrate prescalar.
Definition: IfxPsi5s_Psi5s.h:248
IfxPsi5s_Psi5s_ChannelConfig::pulseGeneration
IfxPsi5s_Psi5s_PulseGeneration pulseGeneration
Specifies the configuration for sync pulse generation.
Definition: IfxPsi5s_Psi5s.h:380
IfxPsi5s_Psi5s_ReceiveData::rdr
uint32 rdr
received data with frame count
Definition: IfxPsi5s_Psi5s.h:322
IfxPsi5s_Psi5s_startAscTransactions
IFX_INLINE void IfxPsi5s_Psi5s_startAscTransactions(IfxPsi5s_Psi5s *psi5s)
Start ASC transactions.
Definition: IfxPsi5s_Psi5s.h:600
IfxPsi5s_Psi5s_enableModule
IFX_EXTERN void IfxPsi5s_Psi5s_enableModule(Ifx_PSI5S *psi5s)
Enable PSI5S kernel.
Definition: IfxPsi5s_Psi5s.c:91
IfxPsi5s_Psi5s_Timestamp::timestamp
uint32 timestamp
Received data.
Definition: IfxPsi5s_Psi5s.h:221
IfxPsi5s_Psi5s_Config::pins
IFX_CONST IfxPsi5s_Psi5s_Pins * pins
structure for PSI5S pin configuration
Definition: IfxPsi5s_Psi5s.h:397
IfxPsi5s_Psi5s_Pins::rxMode
IfxPort_InputMode rxMode
Rx pin as input.
Definition: IfxPsi5s_Psi5s.h:283
IfxPsi5s_Psi5s_ReceivedBits
Received individual bits.
Definition: IfxPsi5s_Psi5s.h:188
IfxPsi5s_ClockType
IfxPsi5s_ClockType
Clock Selection.
Definition: IfxPsi5s.h:131
IfxPsi5s_Psi5s_GlobalControlConfig::xcrcErrorConsideredForRSI
boolean xcrcErrorConsideredForRSI
Specifies whether XCRCI is considered for RSI assertion.
Definition: IfxPsi5s_Psi5s.h:268
IfxPsi5s_Psi5s_Pins::clkMode
IfxPort_OutputMode clkMode
Clk as output.
Definition: IfxPsi5s_Psi5s.h:287
IfxPsi5s_Psi5s_ReceiveControl::frameIdSelect
IfxPsi5s_FrameId frameIdSelect
Specifies if frame ID is updated from frame header or is a rolling number 0..5 copied from FCNT...
Definition: IfxPsi5s_Psi5s.h:312
IfxPsi5s_Psi5s_ReceiveData::receivedData
IfxPsi5s_Psi5s_ReceivedData receivedData
Receive data structure with different segments of data.
Definition: IfxPsi5s_Psi5s.h:323
IfxPsi5s_Psi5s_ChannelTrigger
channel trigger configuration structure
Definition: IfxPsi5s_Psi5s.h:256
IfxPsi5s_Psi5s_TransmitControl
Transmit control configuration structure.
Definition: IfxPsi5s_Psi5s.h:352
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:81
IfxPsi5s_Psi5s_readFrame
IFX_EXTERN void IfxPsi5s_Psi5s_readFrame(IfxPsi5s_Psi5s_Channel *channel, IfxPsi5s_Psi5s_Frame *frame)
Get the received psi5s frame for the channel.
Definition: IfxPsi5s_Psi5s.c:547
IfxPsi5s_Psi5s_AscConfig::overrunCheckEnabled
boolean overrunCheckEnabled
Specifies whether overrun check is enabled or not.
Definition: IfxPsi5s_Psi5s.h:241
IfxPsi5s_CrcOrParity
IfxPsi5s_CrcOrParity
MODULE_PSI5S.RCRAx.CRCy(x= 0,1,..7:y=0,1,..,5),MODULE_PSI5S.RCRBx.CRCy(x= 0,1,..7:y=0,1,..,5)CRC or parity.
Definition: IfxPsi5s.h:141
IfxPsi5s_UartFrameCount
IfxPsi5s_UartFrameCount
MODULE_PSI5S.RCRAx.UFCY(x=0,1,...7;y=0,1...5):UART frame count.
Definition: IfxPsi5s.h:336
IfxPsi5s_Psi5s_Clock::type
IfxPsi5s_ClockType type
Specifies the type of clock (fracDiv / timestamp)
Definition: IfxPsi5s_Psi5s.h:183
IfxPsi5s_Psi5s_GlobalControlConfig::headerErrorConsideredForRSI
boolean headerErrorConsideredForRSI
Specifies whether HDI is considered for RSI assertion.
Definition: IfxPsi5s_Psi5s.h:274
IfxPsi5s_Psi5s_ReceivedBits::crc
uint8 crc
Received CRC.
Definition: IfxPsi5s_Psi5s.h:192
IfxPsi5s_Psi5s_ReceiveControl
Receive control configuration structure - covers control fields from RCRA, RCRB and NFC registers...
Definition: IfxPsi5s_Psi5s.h:305
IfxPsi5s_Psi5s_Pins::pinDriver
IfxPort_PadDriver pinDriver
pad driver
Definition: IfxPsi5s_Psi5s.h:288
IfxPsi5s_enableDisableChannelTriggerCounters
void IfxPsi5s_enableDisableChannelTriggerCounters(Ifx_PSI5S *psi5s, uint32 channels, uint32 mask)
Enable/disable any combination of channel trigger counters selected by mask parameter.
Definition: IfxPsi5s.c:75
IfxPsi5s_Psi5s_Config::module
Ifx_PSI5S * module
Specifies the pointer to the PSI5S module registers.
Definition: IfxPsi5s_Psi5s.h:390
IfxPsi5s_Tx_Out
TX pin mapping structure.
Definition: IfxPsi5s_PinMap.h:64
IfxPsi5s_AscStopBits
IfxPsi5s_AscStopBits
MODULE_PSI5S.CON.STP: Number of stop bits.
Definition: IfxPsi5s.h:108
IfxPsi5s_Psi5s_GlobalControlConfig::transmitErrorConsideredForRSI
boolean transmitErrorConsideredForRSI
Specifies whether TEI is considered for RSI assertion.
Definition: IfxPsi5s_Psi5s.h:269
IfxPsi5s_Psi5s_Channel::module
IfxPsi5s_Psi5s * module
The PSI5S handle structure.
Definition: IfxPsi5s_Psi5s.h:369
IfxPsi5s_Psi5s_Clock
Clock configuration data structure.
Definition: IfxPsi5s_Psi5s.h:179
IfxPsi5s_Psi5s_AscConfig::clockOutput
IfxPsi5s_Psi5s_Clock clockOutput
Specifies the output clock properties.
Definition: IfxPsi5s_Psi5s.h:250
IfxPsi5s_Psi5s_ReceivedBits::headerErrorFlag
uint8 headerErrorFlag
Header error signalling flag.
Definition: IfxPsi5s_Psi5s.h:196
IfxPsi5s_Psi5s_deInitModule
IFX_EXTERN void IfxPsi5s_Psi5s_deInitModule(IfxPsi5s_Psi5s *psi5s)
De-initialise the PSI5S module.
Definition: IfxPsi5s_Psi5s.c:84
IfxPsi5s_enableDisableChannels
void IfxPsi5s_enableDisableChannels(Ifx_PSI5S *psi5s, uint32 channels, uint32 mask)
Enable/disable any combination of channels selected by mask parameter.
Definition: IfxPsi5s.c:83
IfxPsi5s_Psi5s_ReceivedBits::crcError
uint8 crcError
CRC error flag.
Definition: IfxPsi5s_Psi5s.h:193
IfxPsi5s_Psi5s_ReceivedBits::watchdogTimeoutErrorFlag
uint8 watchdogTimeoutErrorFlag
Watchdog timeout error flag.
Definition: IfxPsi5s_Psi5s.h:200
IfxPsi5s_Psi5s_AscConfig::baudrateFrequency
uint32 baudrateFrequency
Specifies the baudrate frequency.
Definition: IfxPsi5s_Psi5s.h:245
IfxPsi5s_Clk_Out
CLK pin mapping structure.
Definition: IfxPsi5s_PinMap.h:72
IfxPsi5s_Psi5s_ChannelConfig::watchdogTimerLimit
uint32 watchdogTimerLimit
Specifies the watchdog timer limit for each of the slots 0 to 6.
Definition: IfxPsi5s_Psi5s.h:378
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxPsi5s_Psi5s_Config::timestampCounterA
IfxPsi5s_Psi5s_TimeStampConfig timestampCounterA
Specifies the time stamp counter A properties.
Definition: IfxPsi5s_Psi5s.h:393
IfxPsi5s_TimeBase
IfxPsi5s_TimeBase
MODULE_PSI5S.TSCNTA.B.TBS;MODULE_PSI5S.TSCNTB.B.TBS:Time base.
Definition: IfxPsi5s.h:268
IfxPsi5s_Psi5s_TransmitControl::crcGenerationControl
boolean crcGenerationControl
Specifies whether the crc generation is turned on or not.
Definition: IfxPsi5s_Psi5s.h:355
IfxPsi5s_Psi5s_ReceiveStatus::receivedBits
IfxPsi5s_Psi5s_ReceivedBits receivedBits
Received individual bits.
Definition: IfxPsi5s_Psi5s.h:331
IfxPsi5s_Psi5s_Pins
Structure for PSI5S pin configuration.
Definition: IfxPsi5s_Psi5s.h:280
IfxPsi5s_Psi5s_sendChannelData
IFX_EXTERN boolean IfxPsi5s_Psi5s_sendChannelData(IfxPsi5s_Psi5s_Channel *channel, uint32 data)
Transmit the data through the channel.
Definition: IfxPsi5s_Psi5s.c:574
IfxPsi5s_Psi5s_ReceiveTimestamp::tsm
uint32 tsm
received timestamp along with frame count
Definition: IfxPsi5s_Psi5s.h:338
IfxPsi5s_Psi5s_ReceiveControl::timestampEnabled
boolean timestampEnabled
Specifies whether the timestamp is enabled or not.
Definition: IfxPsi5s_Psi5s.h:307
IfxPsi5s_Psi5s_TransmitControl::startSequenceGenerationControl
boolean startSequenceGenerationControl
Specifies whether the start sequence generation is turned on or not.
Definition: IfxPsi5s_Psi5s.h:356
IfxPsi5s_Psi5s_ChannelConfig::sendControl
IfxPsi5s_Psi5s_TransmitControl sendControl
Specifies the configuration for transmission.
Definition: IfxPsi5s_Psi5s.h:383
IfxPsi5s_Psi5s_Frame
Psi5s frame data structure.
Definition: IfxPsi5s_Psi5s.h:402
IfxPsi5s_Psi5s_GlobalControlConfig::overrunErrorConsideredForRSI
boolean overrunErrorConsideredForRSI
Specifies whether OE is considered for RSI assertion.
Definition: IfxPsi5s_Psi5s.h:272


iLLD_TC38A: IfxPsi5s_cfg.h Source File

  • _Impl
IfxPsi5s_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxPsi5s_cfg.h
3 * \brief PSI5S on-chip implementation data
4 * \ingroup IfxLld_Psi5s
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 *
43 * \defgroup IfxLld_Psi5s PSI5S
44 * \ingroup IfxLld
45 * \defgroup IfxLld_Psi5s_Impl Implementation
46 * \ingroup IfxLld_Psi5s
47 * \defgroup IfxLld_Psi5s_Std Standard Driver
48 * \ingroup IfxLld_Psi5s
49 */
50
51 #ifndef IFXPSI5S_CFG_H
52 #define IFXPSI5S_CFG_H 1
53
54 /******************************************************************************/
55 /*----------------------------------Includes----------------------------------*/
56 /******************************************************************************/
57
58 /******************************************************************************/
59 /*-----------------------------------Macros-----------------------------------*/
60 /******************************************************************************/
61
62 #define IFXPSI5S_NUM_CHANNELS 8
63
64 #define IFXPSI5S_STEP_RANGE 1024
65
66 #define IFXPSI5S_NUM_WDTS 7
67
68 #define IFXPSI5S_NUM_SLOTS 6
69
70 #define IFXPSI5S_ENABLE_CHANNELTRIGGER (1 << 8)
71
72 #define IFXPSI5S_ENABLE_CHANNEL (1 << 16)
73
74 #define IFXPSI5S_BG_RANGE 8192
75
76 #define IFXPSI5S_FDV_RANGE 2048
77
78 #define IFXPSI5S_BAUDRATE_1562500 1562500
79
80 /** \brief //0x00FF0000
81 */
82 #define IFXPSI5S_GCR_CHANNELS_ENABLE_MASK ((1 << IFXPSI5S_NUM_CHANNELS) - 1) << 16
83
84 #define IFXPSI5S_GCR_CHANNEL_TRIGGER_COUNTERS_ENABLE_MASK ((1 << IFXPSI5S_NUM_CHANNELS) - 1) << 8
85
86 #define IFXPSI5S_DEFAULT_SLOWCLOCK_FREQ 4000000
87
88 #define IFXPSI5S_DEFAULT_FASTCLOCK_FREQ 6000000
89
90 #define IFXPSI5S_DEFAULT_TIMESTAMP_FREQ 1000000
91
92 #define IFXPSI5S_NUM_MODULES (1)
93
94 #endif /* IFXPSI5S_CFG_H */


iLLD_TC38A: IfxQspi.c Source File

  • Qspi
  • Std
IfxQspi.c
Go to the documentation of this file.
1 /**
2 * \file IfxQspi.c
3 * \brief QSPI basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 */
43
44 /******************************************************************************/
45 /*----------------------------------Includes----------------------------------*/
46 /******************************************************************************/
47
48 #include "IfxQspi.h"
49
50 /******************************************************************************/
51 /*-------------------------Function Implementations---------------------------*/
52 /******************************************************************************/
53
54 float IfxQspi_calcRealBaudrate(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId)
55 {
56 int cs = channelId % 8;
57 float fQspi = IfxScuCcu_getQspiFrequency();
58 Ifx_QSPI_ECON econ[8];
59 econ[cs].U = qspi->ECON[cs].U;
60 fQspi = fQspi / (qspi->GLOBALCON.B.TQ + 1);
61 fQspi = fQspi / (econ[cs].B.Q + 1);
62 fQspi = fQspi / ((econ[cs].B.A + 1) + econ[cs].B.B + econ[cs].B.C);
63 return fQspi;
64 }
65
66
67 uint32 IfxQspi_calculateBasicConfigurationValue(Ifx_QSPI *qspi, const IfxQspi_ChannelId channelId, const SpiIf_ChMode *chMode, const float baudrate)
68 {
69 IFX_UNUSED_PARAMETER(baudrate);
70
71 Ifx_QSPI_BACON bacon;
72 IfxQspi_DelayConst delayConst[3];
73 bacon.U = 0;
74
75 IfxQspi_calculateDelayConstants(qspi, channelId, chMode, delayConst);
76
77 bacon.B.LAST = 0; /* 1-bits Last Word in a Frame, will be set via recalcBasicConfiguration before transfer */
78
79 bacon.B.IPRE = delayConst[0].pre; /* 3-bits Prescaler for the Idle Delay */
80 bacon.B.IDLE = delayConst[0].delay; /* 3-bits Idle Delay Length */
81 bacon.B.LPRE = delayConst[1].pre; /* 3-bits Prescaler for the Leading Delay */
82 bacon.B.LEAD = delayConst[1].delay; /* 3-bits Leading Delay Length */
83 bacon.B.TPRE = delayConst[2].pre; /* 3-bits Prescaler for the Trailing Delay */
84 bacon.B.TRAIL = delayConst[2].delay; /* 2-bits Trailing Delay Length */
85 bacon.B.PARTYP = (chMode->parityMode == Ifx_ParityMode_even) ? 0 : 1;
86 bacon.B.UINT = 0; /* 1-bits User Interrupt at the PT1 Event in the Subsequent Frames */
87 bacon.B.MSB = (chMode->dataHeading == SpiIf_DataHeading_lsbFirst) ? 0 : 1;
88 bacon.B.BYTE = 0; /* only support bitwise selection in B.DL */
89 bacon.B.DL = chMode->dataWidth - 1;
90 bacon.B.CS = channelId;
91
92 return bacon.U;
93 }
94
95
96 uint32 IfxQspi_calculateExtendedConfigurationValue(Ifx_QSPI *qspi, const uint8 cs, const SpiIf_ChConfig *chConfig)
97 {
98 IFX_UNUSED_PARAMETER(cs);
99
100 Ifx_QSPI_ECON econ;
101 econ.U = 0;
102
103 const int maxB = 3;
104 float32 tQspi = 1.0 / IfxQspi_getTimeQuantaFrequency(qspi);
105 float32 fBaud = (chConfig->baudrate);
106 int abcMin = (2);
107 int abcMax = (4 + 0 + 4);
108 int q, bestQ = 1, abc, bestAbc = abcMax, halfBaud = 0;
109 sint8 diffB = 0;
110 float32 error, bestError;
111 float32 tTmp, tBaudTmp;
112 boolean done = FALSE;
113
114 if (fBaud == 0.0)
115 {
116 IFX_ASSERT(IFX_VERBOSE_LEVEL_WARNING, FALSE); /* chosen baud rate is 0 */
117 fBaud = 1.0;
118 }
119
120 float32 tBaud = 1.0 / fBaud;
121
122 bestError = 1e6;
123
124 for (abc = abcMax; abc >= abcMin; abc--)
125 {
126 tTmp = tQspi * abc;
127 q = (int)((tBaud / tTmp) + 0.5);
128
129 if (q > 64)
130 {
131 q = 64;
132 }
133
134 else if ((q * abc) < 4)
135 {
136 q = 2;
137 }
138
139 else if (q < 1)
140 {
141 q = 1;
142 }
143
144 tBaudTmp = tTmp * q;
145 error = __absf(tBaudTmp - tBaud);
146
147 if (__leqf(error, bestError)) /* we have a equal/better error case */
148 {
149 /* process this case only if lesser error / or if ABC is even */
150 if (__neqf(error, bestError) || (((uint32)bestAbc & (uint32)0x1) == 0))
151 {
152 bestError = error;
153 bestAbc = abc;
154 bestQ = q;
155 }
156
157 /* break out if ABC is even and error = 0 */
158 if (((uint32)bestAbc & (uint32)0x1) == 0)
159 {
160 done = (__neqf(error, 0.0)) ? FALSE : TRUE;
161
162 if (done != FALSE)
163 {
164 break;
165 }
166 }
167 }
168 }
169
170 /* Exchange Q and ABC, if ABC is odd and Q is even.
171 * This is because: A+1+B+C is ideally even for
172 * achieving 50% duty cycle of the clock.
173 */
174 if ((bestQ <= abcMax)
175 && (((uint32)bestAbc & (uint32)0x1) != 0)
176 && (((uint32)bestQ & (uint32)0x1) == 0))
177 {
178 q = bestQ;
179 bestQ = bestAbc;
180 bestAbc = q;
181 }
182
183 /* NOTE: In assigning values to A,B,C:
184 * the "sampling point" (which is A+B) has to be as far as possible
185 * from the "shifting point" (end of A+B+C).
186 * The duty cycle is calculated as the ratio of A : B+C
187 * Therefore, to keep 50% duty cycle: A = B+C
188 * Thus, we cannot influence the value of A, once A+B+C is found out
189 * (A+1 is always (A+B+C)/2).
190 * However, in between B and C - we should try to maximize B (and minimize C).
191 * The goal will be to do this - keep max value of B always and keep only any remaining value for C .
192 */
193 halfBaud = bestAbc / 2;
194 diffB = halfBaud - maxB;
195
196 econ.B.Q = bestQ - 1;
197 econ.B.A = halfBaud + (bestAbc % 2) - 1; /* A + 1 = Half of Baud count */
198 econ.B.C = (diffB > 0) ? diffB : 0;
199 econ.B.B = (diffB > 0) ? maxB : halfBaud;
200
201 econ.B.CPH = (chConfig->mode.shiftClock == SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge) ? 1 : 0;
202 econ.B.CPOL = (chConfig->mode.clockPolarity == SpiIf_ClockPolarity_idleLow) ? 0 : 1;
203 econ.B.PAREN = chConfig->mode.parityCheck;
204
205 return econ.U;
206 }
207
208
209 uint32 IfxQspi_calculatePrescaler(Ifx_QSPI *qspi, float baudrate)
210 {
211 float error, bestError;
212 float halfBaud = baudrate / 2;
213 float fQspiIn = IfxQspi_getModuleFrequency(qspi);
214 bestError = 10e6;
215 uint32 i, bestPre = 0;
216
217 for (i = 0; i < 8; i++)
218 {
219 float tempHalfBaud = fQspiIn / (1U << (4 * i));
220 error = __absf(tempHalfBaud - halfBaud);
221
222 if (__leqf(error, bestError))
223 {
224 bestError = error;
225 bestPre = i;
226 }
227 }
228
229 return bestPre;
230 }
231
232
233 uint32 IfxQspi_calculateTimeQuantumLength(Ifx_QSPI *qspi, float maxBaudrate)
234 {
235 #define ABCQMIN (4)
236 #define ABCQMAX (8 * 63)
237
238 IFX_UNUSED_PARAMETER(qspi);
239
240 uint32 abcq = ABCQMIN, tq, bestTq;
241 float realTQ, deltaMax, bestDelta, achievedMax;
242 float fQspi = IfxScuCcu_getQspiFrequency();
243
244 if (__leqf(maxBaudrate, 0.0))
245 {
246 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE); /* Max baud rate is 0!! */
247 }
248
249 realTQ = fQspi / (4.0 * maxBaudrate);
250 bestTq = __max((uint32)__roundf(realTQ), 1);
251 bestDelta = __absf(maxBaudrate - (fQspi / bestTq));
252
253 for (abcq = ABCQMIN; abcq <= ABCQMAX; abcq++)
254 {
255 realTQ = fQspi / (maxBaudrate * abcq);
256 tq = (uint32)(realTQ + 0.5);
257 achievedMax = fQspi / (tq * abcq);
258 deltaMax = __absf(maxBaudrate - achievedMax);
259
260 if (__leqf(deltaMax, bestDelta) && (tq >= 1))
261 {
262 bestDelta = deltaMax;
263 bestTq = tq;
264 }
265
266 if ((bestDelta == 0) || (tq < 1))
267 {
268 break; //exit the for loop
269 }
270 }
271
272 return __max(bestTq - 1, 0);
273 }
274
275
276 Ifx_QSPI *IfxQspi_getAddress(IfxQspi_Index qspi)
277 {
278 Ifx_QSPI *module;
279
280 if (qspi < IFXQSPI_NUM_MODULES)
281 {
282 module = (Ifx_QSPI *)IfxQspi_cfg_indexMap[qspi].module;
283 }
284 else
285 {
286 module = NULL_PTR;
287 }
288
289 return module;
290 }
291
292
293 IfxQspi_Index IfxQspi_getIndex(Ifx_QSPI *qspi)
294 {
295 uint32 index;
296 IfxQspi_Index result;
297
298 result = IfxQspi_Index_none;
299
300 for (index = 0; index < IFXQSPI_NUM_MODULES; index++)
301 {
302 if (IfxQspi_cfg_indexMap[index].module == qspi)
303 {
304 result = (IfxQspi_Index)IfxQspi_cfg_indexMap[index].index;
305 break;
306 }
307 }
308
309 return result;
310 }
311
312
313 void IfxQspi_read16(Ifx_QSPI *qspi, uint16 *data, Ifx_SizeT count)
314 {
315 volatile Ifx_QSPI_RXEXIT *rxFifo = &qspi->RXEXIT;
316
317 while (count > 0)
318 {
319 *(data++) = (uint16)rxFifo->U;
320 count--;
321 }
322 }
323
324
325 void IfxQspi_read32(Ifx_QSPI *qspi, uint32 *data, Ifx_SizeT count)
326 {
327 volatile Ifx_QSPI_RXEXIT *rxFifo = &qspi->RXEXIT;
328
329 while (count > 0)
330 {
331 *(data++) = rxFifo->U;
332 count--;
333 }
334 }
335
336
337 void IfxQspi_read8(Ifx_QSPI *qspi, uint8 *data, Ifx_SizeT count)
338 {
339 volatile Ifx_QSPI_RXEXIT *rxFifo = &qspi->RXEXIT;
340
341 while (count > 0)
342 {
343 *(data++) = (uint8)rxFifo->U;
344 count--;
345 }
346 }
347
348
349 uint32 IfxQspi_recalcBasicConfiguration(uint32 oldBACON, Ifx_SizeT numOfData, boolean shortData, boolean lastData)
350 {
351 Ifx_QSPI_BACON bacon;
352 bacon.U = oldBACON;
353
354 if (shortData == FALSE)
355 {
356 bacon.B.DL = numOfData;
357 bacon.B.BYTE = 1;
358 }
359
360 bacon.B.LAST = lastData;
361 return bacon.U;
362 }
363
364
365 void IfxQspi_resetModule(Ifx_QSPI *qspi)
366 {
367 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
368 IfxScuWdt_clearCpuEndinit(passwd);
369 qspi->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
370 qspi->KRST1.B.RST = 1;
371 IfxScuWdt_setCpuEndinit(passwd);
372
373 while (0 == qspi->KRST0.B.RSTSTAT) /* Wait until reset is executed */
374
375 {}
376
377 IfxScuWdt_clearCpuEndinit(passwd);
378 qspi->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
379 IfxScuWdt_setCpuEndinit(passwd);
380 }
381
382
383 void IfxQspi_setSlaveSelectOutputControl(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, boolean outputEnable, boolean activeLevel)
384 {
385 uint16 mask = 1 << channelId;
386
387 Ifx_QSPI_SSOC ssoc;
388 ssoc.U = qspi->SSOC.U;
389
390 if (outputEnable)
391 {
392 ssoc.B.OEN |= mask;
393 }
394 else
395 {
396 ssoc.B.OEN &= ~mask;
397 }
398
399 if (activeLevel)
400 {
401 ssoc.B.AOL |= mask;
402 }
403 else
404 {
405 ssoc.B.AOL &= ~mask;
406 }
407
408 qspi->SSOC.U = ssoc.U;
409 }
410
411
412 void IfxQspi_write16(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint16 *data, Ifx_SizeT count)
413 {
414 int cs = channelId % 8;
415 volatile Ifx_QSPI_DATAENTRY *dataEntry = &qspi->DATAENTRY[cs];
416
417 while (count > 0)
418 {
419 dataEntry->U = *(data++);
420 count--;
421 }
422 }
423
424
425 void IfxQspi_write32(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 *data, Ifx_SizeT count)
426 {
427 int cs = channelId % 8;
428 volatile Ifx_QSPI_DATAENTRY *dataEntry = &qspi->DATAENTRY[cs];
429
430 while (count > 0)
431 {
432 dataEntry->U = *(data++);
433 count--;
434 }
435 }
436
437
438 void IfxQspi_write8(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 *data, Ifx_SizeT count)
439 {
440 int cs = channelId % 8;
441 volatile Ifx_QSPI_DATAENTRY *dataEntry = &qspi->DATAENTRY[cs];
442
443 while (count > 0)
444 {
445 dataEntry->U = *(data++);
446 count--;
447 }
448 }
449
450
451 void IfxQspi_calculateDelayConstants(const Ifx_QSPI *qspi, const IfxQspi_ChannelId channelId, const SpiIf_ChMode *chMode, IfxQspi_DelayConst *delayConst)
452 {
453 uint32 divFactor;
454 const SpiIf_SlsoTiming_HalfTsclk *dlyFactorPtr;
455 float32 scaleTemp;
456 uint8 preTemp;
457 uint8 preFinal = 0U;
458 uint8 delayTemp;
459 uint8 delayFinal = 0U;
460 boolean matchFound;
461 uint8 index;
462 uint8 cs = channelId % 8;
463
464 /* obtain the peripheral frequency / sclk frequency multiplication factor */
465 divFactor = (qspi->GLOBALCON.B.TQ + 1) * (qspi->ECON[cs].B.Q + 1) * (qspi->ECON[cs].B.A + 1 + qspi->ECON[cs].B.B + qspi->ECON[cs].B.C);
466
467 /* The user defined delay factor is here - point to it */
468 dlyFactorPtr = &(chMode->csInactiveDelay);
469
470 for (index = 0; index < 3; index++)
471 {
472 /* multiply the div_factor and delay_factor and divide by 2 - this is product of (4^pre)*(delay_mult) */
473 scaleTemp = (dlyFactorPtr[index] * divFactor) / (float32)2.0;
474
475 /* loop through the possible pre values to find pre and delay */
476 matchFound = FALSE;
477
478 for (preTemp = 0; preTemp < 8; preTemp++)
479 {
480 delayTemp = (uint8)((scaleTemp / (1 << (2 * preTemp))) + 0.5); /* divide the scale_temp by ( 4 ^ pre_temp) to find delay_temp */
481
482 if (delayTemp <= 8) /* if delay_temp is <= 8; we can get a good value pair */
483 {
484 if ((float32)(delayTemp << (2 * preTemp)) >= scaleTemp) /* greater delays are tolerated. less is not */
485 {
486 delayFinal = __max(delayTemp - 1, 0); /* subtract 1 to set to register */
487 preFinal = preTemp;
488 matchFound = TRUE;
489 break;
490 }
491 else if (delayTemp < (uint8)8) /* delay is less than 8 - add 1 and finalize parameters */
492 {
493 delayTemp += 1;
494 delayFinal = __max(delayTemp - 1, 0); /* subtract 1 to set to register */
495 preFinal = preTemp;
496 matchFound = TRUE;
497 break;
498 }
499 else
500 {
501 /* do nothing - proceed to next pre_temp value */
502 }
503 }
504 }
505
506 if (matchFound == FALSE)
507 {
508 /* max limit reached. set max values for pre and delay and exit */
509 delayFinal = 7;
510 preFinal = 7;
511 }
512
513 /* write back to delay const structure before looping to next factor */
514 delayConst[index].delay = delayFinal;
515 delayConst[index].pre = preFinal;
516 }
517 }
IfxQspi_calculateDelayConstants
void IfxQspi_calculateDelayConstants(const Ifx_QSPI *qspi, const IfxQspi_ChannelId channelId, const SpiIf_ChMode *chMode, IfxQspi_DelayConst *delayConst)
Calculates the Delay constants (pre and delay) from the user specified CS delays. ...
Definition: IfxQspi.c:451
SpiIf_ChMode::dataHeading
uint32 dataHeading
SpiIf_DataHeading
Definition: SpiIf.h:193
IfxQspi_calcRealBaudrate
float IfxQspi_calcRealBaudrate(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId)
Function to calculate baudrate of specified channel.
Definition: IfxQspi.c:54
__neqf
#define __neqf
Definition: IfxCpu_IntrinsicsDcc.h:1665
IfxQspi_read8
void IfxQspi_read8(Ifx_QSPI *qspi, uint8 *data, Ifx_SizeT count)
Reads 8bit data from the Rx FIFO.
Definition: IfxQspi.c:337
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxQspi_read16
void IfxQspi_read16(Ifx_QSPI *qspi, uint16 *data, Ifx_SizeT count)
Reads 16bit data from the Rx FIFO.
Definition: IfxQspi.c:313
SpiIf_ChConfig_::baudrate
float32 baudrate
Specifies the SPI baudrate.
Definition: SpiIf.h:228
SpiIf_ChConfig_
Definition: SpiIf.h:225
SpiIf_ChMode::dataWidth
uint32 dataWidth
range 2 .. 32 bits (note 2 = 2-bits, 3 = 3-bits ...
Definition: SpiIf.h:194
IfxQspi_Index
IfxQspi_Index
List of the available QSPI resources.
Definition: IfxQspi_cfg.h:79
IfxQspi_getIndex
IfxQspi_Index IfxQspi_getIndex(Ifx_QSPI *qspi)
Specifies the function to get Index.
Definition: IfxQspi.c:293
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxQspi_write16
void IfxQspi_write16(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint16 *data, Ifx_SizeT count)
Writes 16bit data into the Tx FIFO.
Definition: IfxQspi.c:412
Ifx_ParityMode_even
Definition: Ifx_Types.h:121
IfxQspi_resetModule
void IfxQspi_resetModule(Ifx_QSPI *qspi)
resets QSPI kernel
Definition: IfxQspi.c:365
SpiIf_ChMode::parityCheck
uint32 parityCheck
0 = disabled, 1 = enabled
Definition: SpiIf.h:198
float32
float float32
Definition: Platform_Types.h:170
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
IfxQspi_getAddress
Ifx_QSPI * IfxQspi_getAddress(IfxQspi_Index qspi)
Definition: IfxQspi.c:276
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxQspi_calculateExtendedConfigurationValue
uint32 IfxQspi_calculateExtendedConfigurationValue(Ifx_QSPI *qspi, const uint8 cs, const SpiIf_ChConfig *chConfig)
Function to calculate ECON register values.
Definition: IfxQspi.c:96
FALSE
#define FALSE
Definition: Platform_Types.h:93
SpiIf_ChMode::csInactiveDelay
SpiIf_SlsoTiming_HalfTsclk csInactiveDelay
CS Inactive Delay in Tsclk/2 units.
Definition: SpiIf.h:201
__leqf
#define __leqf
Definition: IfxCpu_IntrinsicsDcc.h:1669
IFX_VERBOSE_LEVEL_WARNING
#define IFX_VERBOSE_LEVEL_WARNING
Assertion level warning.
Definition: Ifx_Assert.h:59
IfxQspi_calculateBasicConfigurationValue
uint32 IfxQspi_calculateBasicConfigurationValue(Ifx_QSPI *qspi, const IfxQspi_ChannelId channelId, const SpiIf_ChMode *chMode, const float baudrate)
Function to calculate BACON register values.
Definition: IfxQspi.c:67
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxQspi_getTimeQuantaFrequency
IFX_INLINE float IfxQspi_getTimeQuantaFrequency(Ifx_QSPI *qspi)
Gets Time Quanta frequency.
Definition: IfxQspi.h:1080
__absf
#define __absf
Definition: IfxCpu_IntrinsicsDcc.h:1629
IfxQspi_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxQspi_cfg_indexMap[IFXQSPI_NUM_MODULES]
Definition: IfxQspi_cfg.c:54
SpiIf_ChMode::clockPolarity
uint32 clockPolarity
SpiIf_ClockPolarity
Definition: SpiIf.h:191
IfxQspi_ChannelId
IfxQspi_ChannelId
QSPI channel Number (BACON.CS)
Definition: IfxQspi.h:94
__max
sint32 __max(sint32, sint32) __attribute__((intrinsic_pseudo(3
SpiIf_SlsoTiming_HalfTsclk
uint32 SpiIf_SlsoTiming_HalfTsclk
Definition: SpiIf.h:138
IfxQspi_Index_none
Not Selected.
Definition: IfxQspi_cfg.h:81
SpiIf_ChMode::shiftClock
uint32 shiftClock
SpiIf_ShiftClock
Definition: SpiIf.h:192
IfxQspi_write32
void IfxQspi_write32(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 *data, Ifx_SizeT count)
Writes 32bit data into the Tx FIFO.
Definition: IfxQspi.c:425
IfxQspi_setSlaveSelectOutputControl
void IfxQspi_setSlaveSelectOutputControl(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, boolean outputEnable, boolean activeLevel)
Configures a Slave Select Output.
Definition: IfxQspi.c:383
SpiIf_ChMode
Definition: SpiIf.h:186
IfxQspi_DelayConst::pre
uint8 pre
specifies the prescalar value
Definition: IfxQspi.h:311
SpiIf_ChMode::parityMode
uint32 parityMode
Ifx_ParityMode
Definition: SpiIf.h:199
SpiIf_ClockPolarity_idleLow
Definition: SpiIf.h:103
IfxQspi_read32
void IfxQspi_read32(Ifx_QSPI *qspi, uint32 *data, Ifx_SizeT count)
Reads 32bit data from the Rx FIFO.
Definition: IfxQspi.c:325
SpiIf_DataHeading_lsbFirst
Definition: SpiIf.h:89
IFXQSPI_NUM_MODULES
#define IFXQSPI_NUM_MODULES
Definition: IfxQspi_cfg.h:69
ABCQMAX
#define ABCQMAX
IfxQspi_calculateTimeQuantumLength
uint32 IfxQspi_calculateTimeQuantumLength(Ifx_QSPI *qspi, float maxBaudrate)
Specifies the function to calculate Time quantum length.
Definition: IfxQspi.c:233
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxQspi_getModuleFrequency
IFX_INLINE float IfxQspi_getModuleFrequency(Ifx_QSPI *qspi)
Specifies function to get module frequency.
Definition: IfxQspi.h:1047
__roundf
#define __roundf
Definition: IfxCpu_IntrinsicsDcc.h:1625
ABCQMIN
#define ABCQMIN
SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge
Definition: SpiIf.h:96
IfxQspi_DelayConst
Structure holding the "pre" and "delay" values. To be populated into BACON register after delay calcu...
Definition: IfxQspi.h:309
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxQspi_calculatePrescaler
uint32 IfxQspi_calculatePrescaler(Ifx_QSPI *qspi, float baudrate)
Function to calculate prescaler.
Definition: IfxQspi.c:209
SpiIf_ChConfig_::mode
SpiIf_ChMode mode
Definition: SpiIf.h:229
IfxQspi_DelayConst::delay
uint8 delay
delay multiplier
Definition: IfxQspi.h:312
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxQspi_write8
void IfxQspi_write8(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 *data, Ifx_SizeT count)
Writes 8bit data into the Tx FIFO.
Definition: IfxQspi.c:438
IfxQspi.h
QSPI basic functionality.
IfxScuCcu_getQspiFrequency
float32 IfxScuCcu_getQspiFrequency(void)
API to get Qspi divider frequency. This API returns the based on the divider value in CCUCON register...
Definition: IfxScuCcu.c:406
IfxQspi_recalcBasicConfiguration
uint32 IfxQspi_recalcBasicConfiguration(uint32 oldBACON, Ifx_SizeT numOfData, boolean shortData, boolean lastData)
Re-calculated BACON from the oldBACON.
Definition: IfxQspi.c:349
TRUE
#define TRUE
Definition: Platform_Types.h:90
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
uint8
unsigned char uint8
Definition: Platform_Types.h:108
sint8
signed char sint8
Definition: Platform_Types.h:125


iLLD_TC38A: IfxQspi.h Source File

  • Qspi
  • Std
IfxQspi.h
Go to the documentation of this file.
1 /**
2 * \file IfxQspi.h
3 * \brief QSPI basic functionality
4 * \ingroup IfxLld_Qspi
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 *
43 * \defgroup IfxLld_Qspi_Std_Enum Enumerations
44 * \ingroup IfxLld_Qspi_Std
45 * \defgroup IfxLld_Qspi_Std_Operative Operative Functions
46 * \ingroup IfxLld_Qspi_Std
47 * \defgroup IfxLld_Qspi_Std_Support Support Functions
48 * \ingroup IfxLld_Qspi_Std
49 * \defgroup IfxLld_Qspi_Std_Interrupt Interrupt Functions
50 * \ingroup IfxLld_Qspi_Std
51 * \defgroup IfxLld_Qspi_Std_IO IO Pin Configuration Functions
52 * \ingroup IfxLld_Qspi_Std
53 */
54
55 #ifndef IFXQSPI_H
56 #define IFXQSPI_H 1
57
58 /******************************************************************************/
59 /*----------------------------------Includes----------------------------------*/
60 /******************************************************************************/
61
62 #include "_Impl/IfxQspi_cfg.h"
63 #include "Cpu/Std/IfxCpu_Intrinsics.h"
64 #include "If/SpiIf.h"
65 #include "Scu/Std/IfxScuCcu.h"
66 #include "Src/Std/IfxSrc.h"
67 #include "_PinMap/IfxQspi_PinMap.h"
68
69 /******************************************************************************/
70 /*-----------------------------------Macros-----------------------------------*/
71 /******************************************************************************/
72
73 /** \brief Get Fifo size required for Long / Long continous mode interms 32-bit
74 * LONG MODE FIFO size (data size in bytes) = (size for Bacon) + (Datasize converted to 32-bit)
75 */
76 #define IFXQSPI_BACONSIZE(Datasize) (((((Datasize) % 16) == 0) ? ((uint8)((Datasize) / 16)) : ((uint8)((Datasize) / 16) + 1)))
77
78 #define IFXQSPI_FIFO32BITSIZE(Datasize) ((((Datasize) % 4) == 0) ? ((uint8)((Datasize) / 4)) : ((uint8)((Datasize) / 4) + 1))
79
80 #define IFXQSPI_GETLONGMODEFIFOSIZE(Datasize) (IFXQSPI_BACONSIZE(Datasize) + IFXQSPI_FIFO32BITSIZE(Datasize))
81
82 /** \brief Errors enable mask for ERRORENS
83 */
84 #define IFXQSPI_ERRORENABLEMASK ((uint32)0x1FF)
85
86 /******************************************************************************/
87 /*--------------------------------Enumerations--------------------------------*/
88 /******************************************************************************/
89
90 /** \addtogroup IfxLld_Qspi_Std_Enum
91 * \{ */
92 /** \brief QSPI channel Number (BACON.CS)
93 */
94 typedef enum
95 {
96 IfxQspi_ChannelId_0, /**< \brief Channel #0 */
97 IfxQspi_ChannelId_1, /**< \brief Channel #1 */
98 IfxQspi_ChannelId_2, /**< \brief Channel #2 */
99 IfxQspi_ChannelId_3, /**< \brief Channel #3 */
100 IfxQspi_ChannelId_4, /**< \brief Channel #4 */
101 IfxQspi_ChannelId_5, /**< \brief Channel #5 */
102 IfxQspi_ChannelId_6, /**< \brief Channel #6 */
103 IfxQspi_ChannelId_7, /**< \brief Channel #7 */
104 IfxQspi_ChannelId_8, /**< \brief Channel #8 */
105 IfxQspi_ChannelId_9, /**< \brief Channel #9 */
106 IfxQspi_ChannelId_10, /**< \brief Channel #10 */
107 IfxQspi_ChannelId_11, /**< \brief Channel #11 */
108 IfxQspi_ChannelId_12, /**< \brief Channel #12 */
109 IfxQspi_ChannelId_13, /**< \brief Channel #13 */
110 IfxQspi_ChannelId_14 /**< \brief Channel #14 */
111 } IfxQspi_ChannelId;
112
113 /** \brief Data length unit of a frame (BACON.BYTE)
114 */
115 typedef enum
116 {
117 IfxQspi_DataLengthUnit_bit = 0, /**< \brief Data Length in Bits */
118 IfxQspi_DataLengthUnit_byte = 1 /**< \brief Data length in Bytes */
119 } IfxQspi_DataLengthUnit;
120
121 /** \brief QSPI Error Flags (STATUS.ERRORFLAGS)
122 */
123 typedef enum
124 {
125 IfxQspi_Error_none = 0, /**< \brief No Error */
126 IfxQspi_Error_parity = 1, /**< \brief Parity Error */
127 IfxQspi_Error_configuration = 2, /**< \brief Configuration Error */
128 IfxQspi_Error_baudrate = 4, /**< \brief BaudRate Error */
129 IfxQspi_Error_txfifoOverflow = 8, /**< \brief TX FIFO Overflow Error */
130 IfxQspi_Error_txfifoUnderflow = 16, /**< \brief TX FIFO Underflow Error */
131 IfxQspi_Error_rxfifoOverflow = 32, /**< \brief RX FIFO Overflow Error */
132 IfxQspi_Error_rxfifoUnderflow = 64, /**< \brief RX FIFO Underflow Error */
133 IfxQspi_Error_expectTimeout = 128, /**< \brief EXPECT Timeout Error */
134 IfxQspi_Error_slsiMisplacedInactivation = 256 /**< \brief SLSI misplaced inactivation (slave mode) */
135 } IfxQspi_Error;
136
137 /** \brief Frame Expect phase time out value
138 */
139 typedef enum
140 {
141 IfxQspi_ExpectTimeout_64 = 0, /**< \brief Expect phse time out 64 */
142 IfxQspi_ExpectTimeout_128 = 1, /**< \brief Expect phse time out 128 */
143 IfxQspi_ExpectTimeout_256 = 2, /**< \brief Expect phse time out 256 */
144 IfxQspi_ExpectTimeout_512 = 3, /**< \brief Expect phse time out 512 */
145 IfxQspi_ExpectTimeout_1024 = 4, /**< \brief Expect phse time out 1024 */
146 IfxQspi_ExpectTimeout_2048 = 5, /**< \brief Expect phse time out 2048 */
147 IfxQspi_ExpectTimeout_4096 = 6, /**< \brief Expect phse time out 4096 */
148 IfxQspi_ExpectTimeout_8192 = 7, /**< \brief Expect phse time out 8192 */
149 IfxQspi_ExpectTimeout_16384 = 8, /**< \brief Expect phse time out 16384 */
150 IfxQspi_ExpectTimeout_32768 = 9, /**< \brief Expect phse time out 32768 */
151 IfxQspi_ExpectTimeout_65536 = 10, /**< \brief Expect phse time out 65536 */
152 IfxQspi_ExpectTimeout_131072 = 11, /**< \brief Expect phse time out 131072 */
153 IfxQspi_ExpectTimeout_262144 = 12, /**< \brief Expect phse time out 262144 */
154 IfxQspi_ExpectTimeout_524288 = 13, /**< \brief Expect phse time out 524288 */
155 IfxQspi_ExpectTimeout_1048576 = 14, /**< \brief Expect phse time out 1048576 */
156 IfxQspi_ExpectTimeout_2097152 = 15 /**< \brief Expect phse time out 2097152 */
157 } IfxQspi_ExpectTimeout;
158
159 /** \brief QSPI controller mode (GLOBALCON.MODE)
160 */
161 typedef enum
162 {
163 IfxQspi_Mode_master = 0, /**< \brief QSPI in "master" mode */
164 IfxQspi_Mode_pwmOverQspi = 1, /**< \brief QSPI in "PWM over QSPI" mode */
165 IfxQspi_Mode_slave = 2 /**< \brief QSPI in "slave" mode */
166 } IfxQspi_Mode;
167
168 /** \brief Request between pause and Run transition
169 */
170 typedef enum
171 {
172 IfxQspi_PauseRunTransition_pause = 0, /**< \brief Request value for pause */
173 IfxQspi_PauseRunTransition_run = 1 /**< \brief Request value for Run */
174 } IfxQspi_PauseRunTransition;
175
176 /** \brief QSPI frame phase (STATUS.PHASE)
177 */
178 typedef enum
179 {
180 IfxQspi_Phase_wait = 0, /**< \brief Frame wait phase */
181 IfxQspi_Phase_idleA = 1, /**< \brief Frame idleA phase */
182 IfxQspi_Phase_idleB = 2, /**< \brief frame idleB phase */
183 IfxQspi_Phase_lead = 3, /**< \brief Frame lead phase */
184 IfxQspi_Phase_data = 4, /**< \brief Frame data phase */
185 IfxQspi_Phase_trail = 5, /**< \brief Frame trail phase */
186 IfxQspi_Phase_expect = 6, /**< \brief Frame expect phase */
187 IfxQspi_Phase_leadStrobe = 7, /**< \brief Frame leadstrobe phase */
188 IfxQspi_Phase_trailStrobe = 8 /**< \brief Frame trailstrobe phase */
189 } IfxQspi_Phase;
190
191 /** \brief Phase Transition Event
192 */
193 typedef enum
194 {
195 IfxQspi_PhaseTransitionEvent_endOfWait = 0, /**< \brief BUSY (end of WAIT phase) */
196 IfxQspi_PhaseTransitionEvent_serialClockPolarityChange = 1, /**< \brief SCLKPC (serial clock polarity change) */
197 IfxQspi_PhaseTransitionEvent_startOfFrame = 2, /**< \brief SOF (Start Of Frame ) */
198 IfxQspi_PhaseTransitionEvent_transmitBufferEmptied = 3, /**< \brief TBE (Transmit Buffer Emptied) */
199 IfxQspi_PhaseTransitionEvent_receiveBufferFilled = 4, /**< \brief RBF (Receive Buffer Filled) */
200 IfxQspi_PhaseTransitionEvent_endOfFrame = 5, /**< \brief EOF (End of Frame) */
201 IfxQspi_PhaseTransitionEvent_dataNotAvailable = 6, /**< \brief DNA (Data not Available = Start of Expect) */
202 IfxQspi_PhaseTransitionEvent_endOfExpect = 7 /**< \brief CONT (End of EXPECT phase) */
203 } IfxQspi_PhaseTransitionEvent;
204
205 /** \brief Reset Request (GLOBALCON.RESETS)
206 */
207 typedef enum
208 {
209 IfxQspi_Reset_none = 0, /**< \brief No Reset */
210 IfxQspi_Reset_stateMachineAndFifo = 1, /**< \brief State Machine, TXFIFO and RXFIFO reset, registers not reseted */
211 IfxQspi_Reset_registers = 2, /**< \brief Registers Reset */
212 IfxQspi_Reset_kernel = 3 /**< \brief Kernel / Module Reset */
213 } IfxQspi_Reset;
214
215 /** \brief Receive Fifo Interrupt Threshold
216 */
217 typedef enum
218 {
219 IfxQspi_RxFifoInt_0, /**< \brief RxFifo Interrupt Threshold #0 */
220 IfxQspi_RxFifoInt_1, /**< \brief RxFifo Interrupt Threshold #1 */
221 IfxQspi_RxFifoInt_2, /**< \brief RxFifo Interrupt Threshold #2 */
222 IfxQspi_RxFifoInt_3 /**< \brief RxFifo Interrupt Threshold #3 */
223 } IfxQspi_RxFifoInt;
224
225 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
226 * Definition in Ifx_QSPI.CLC.B.EDIS
227 */
228 typedef enum
229 {
230 IfxQspi_SleepMode_enable = 0, /**< \brief Sleep Mode enabled */
231 IfxQspi_SleepMode_disable = 1 /**< \brief Sleep Mode disabled */
232 } IfxQspi_SleepMode;
233
234 /** \brief STROBE delay for SLSO in delayed mode (GLOBALCON.STROBE)
235 */
236 typedef enum
237 {
238 IfxQspi_StrobeDelay_1, /**< \brief SLSO delay 1 cycle(s) */
239 IfxQspi_StrobeDelay_2, /**< \brief SLSO delay 2 cycle(s) */
240 IfxQspi_StrobeDelay_3, /**< \brief SLSO delay 3 cycle(s) */
241 IfxQspi_StrobeDelay_4, /**< \brief SLSO delay 4 cycle(s) */
242 IfxQspi_StrobeDelay_5, /**< \brief SLSO delay 5 cycle(s) */
243 IfxQspi_StrobeDelay_6, /**< \brief SLSO delay 6 cycle(s) */
244 IfxQspi_StrobeDelay_7, /**< \brief SLSO delay 7 cycle(s) */
245 IfxQspi_StrobeDelay_8, /**< \brief SLSO delay 8 cycle(s) */
246 IfxQspi_StrobeDelay_9, /**< \brief SLSO delay 9 cycle(s) */
247 IfxQspi_StrobeDelay_10, /**< \brief SLSO delay 10 cycle(s) */
248 IfxQspi_StrobeDelay_11, /**< \brief SLSO delay 11 cycle(s) */
249 IfxQspi_StrobeDelay_12, /**< \brief SLSO delay 12 cycle(s) */
250 IfxQspi_StrobeDelay_13, /**< \brief SLSO delay 13 cycle(s) */
251 IfxQspi_StrobeDelay_14, /**< \brief SLSO delay 14 cycle(s) */
252 IfxQspi_StrobeDelay_15, /**< \brief SLSO delay 15 cycle(s) */
253 IfxQspi_StrobeDelay_16, /**< \brief SLSO delay 16 cycle(s) */
254 IfxQspi_StrobeDelay_17, /**< \brief SLSO delay 17 cycle(s) */
255 IfxQspi_StrobeDelay_18, /**< \brief SLSO delay 18 cycle(s) */
256 IfxQspi_StrobeDelay_19, /**< \brief SLSO delay 19 cycle(s) */
257 IfxQspi_StrobeDelay_20, /**< \brief SLSO delay 20 cycle(s) */
258 IfxQspi_StrobeDelay_21, /**< \brief SLSO delay 21 cycle(s) */
259 IfxQspi_StrobeDelay_22, /**< \brief SLSO delay 22 cycle(s) */
260 IfxQspi_StrobeDelay_23, /**< \brief SLSO delay 23 cycle(s) */
261 IfxQspi_StrobeDelay_24, /**< \brief SLSO delay 24 cycle(s) */
262 IfxQspi_StrobeDelay_25, /**< \brief SLSO delay 25 cycle(s) */
263 IfxQspi_StrobeDelay_26, /**< \brief SLSO delay 26 cycle(s) */
264 IfxQspi_StrobeDelay_27, /**< \brief SLSO delay 27 cycle(s) */
265 IfxQspi_StrobeDelay_28, /**< \brief SLSO delay 28 cycle(s) */
266 IfxQspi_StrobeDelay_29, /**< \brief SLSO delay 29 cycle(s) */
267 IfxQspi_StrobeDelay_30, /**< \brief SLSO delay 30 cycle(s) */
268 IfxQspi_StrobeDelay_31, /**< \brief SLSO delay 31 cycle(s) */
269 IfxQspi_StrobeDelay_32 /**< \brief SLSO delay 32 cycle(s) */
270 } IfxQspi_StrobeDelay;
271
272 /** \brief Transmit Fifo Interrupt Threshold
273 */
274 typedef enum
275 {
276 IfxQspi_TxFifoInt_1, /**< \brief TxFifo Interrupt Threshold #1 */
277 IfxQspi_TxFifoInt_2, /**< \brief TxFifo Interrupt Threshold #2 */
278 IfxQspi_TxFifoInt_3, /**< \brief TxFifo Interrupt Threshold #3 */
279 IfxQspi_TxFifoInt_4 /**< \brief TxFifo Interrupt Threshold #4 */
280 } IfxQspi_TxFifoInt;
281
282 /** \} */
283
284 /** \brief Transmit FIFO mode.
285 */
286 typedef enum
287 {
288 IfxQspi_FifoMode_combinedMove = 0, /**< \brief Combined Move Mode */
289 IfxQspi_FifoMode_singleMove = 1, /**< \brief Single Move Mode */
290 IfxQspi_FifoMode_batchMove = 2 /**< \brief Batch Move Mode */
291 } IfxQspi_FifoMode;
292
293 /** \brief OCDS Suspend Control (OCDS.SUS)
294 */
295 typedef enum
296 {
297 IfxQspi_SuspendMode_none = 0, /**< \brief No suspend */
298 IfxQspi_SuspendMode_hard = 1, /**< \brief Hard Suspend */
299 IfxQspi_SuspendMode_soft = 2 /**< \brief Soft Suspend */
300 } IfxQspi_SuspendMode;
301
302 /******************************************************************************/
303 /*-----------------------------Data Structures--------------------------------*/
304 /******************************************************************************/
305
306 /** \brief Structure holding the "pre" and "delay" values.
307 * To be populated into BACON register after delay calculation.
308 */
309 typedef struct
310 {
311 uint8 pre; /**< \brief specifies the prescalar value */
312 uint8 delay; /**< \brief delay multiplier */
313 } IfxQspi_DelayConst;
314
315 /** \addtogroup IfxLld_Qspi_Std_Operative
316 * \{ */
317
318 /******************************************************************************/
319 /*-------------------------Inline Function Prototypes-------------------------*/
320 /******************************************************************************/
321
322 /** \brief Clear ALL service requests
323 * \param qspi Pointer to QSPI module registers
324 * \return None
325 */
326 IFX_INLINE void IfxQspi_clearAllEventFlags(Ifx_QSPI *qspi);
327
328 /** \brief clear the interrupt after last flag
329 * \param qspi Module register handler
330 * \param clearInterrupt clear the interrupt flag
331 * \return None
332 */
333 IFX_INLINE void IfxQspi_clearMoveCounterInterruptAfterLastFlag(Ifx_QSPI *qspi, boolean clearInterrupt);
334
335 /** \brief Clear the Interrupt before last flag
336 * \param qspi handle to Module register
337 * \param clearInterrupt clear the interrupt
338 * \return None
339 */
340 IFX_INLINE void IfxQspi_clearMoveCounterInterruptBeforeLastFlag(Ifx_QSPI *qspi, boolean clearInterrupt);
341
342 /** \brief Clear RX service requests
343 * \param qspi Pointer to QSPI module registers
344 * \return None
345 */
346 IFX_INLINE void IfxQspi_clearRxReq(Ifx_QSPI *qspi);
347
348 /** \brief Clear TX service requests
349 * \param qspi Pointer to QSPI module registers
350 * \return None
351 */
352 IFX_INLINE void IfxQspi_clearTxReq(Ifx_QSPI *qspi);
353
354 /** \brief Configure PT1 event (also USR event depending if USREN=1 )
355 * \param qspi Pointer to QSPI module registers
356 * \param pt1Config Phase Transition1 Event Config
357 * \return None
358 */
359 IFX_INLINE void IfxQspi_configPT1Event(Ifx_QSPI *qspi, IfxQspi_PhaseTransitionEvent pt1Config);
360
361 /** \brief Configure PT2 event
362 * \param qspi Pointer to QSPI module registers
363 * \param pt2Config Phase Transition2 Event Config
364 * \return None
365 */
366 IFX_INLINE void IfxQspi_configPT2Event(Ifx_QSPI *qspi, IfxQspi_PhaseTransitionEvent pt2Config);
367
368 /** \brief Enable/Disable Loopback mode.
369 * \param qspi Pointer to QSPI module registers
370 * \param enable Enable / Disable loopback
371 * \return None
372 */
373 IFX_INLINE void IfxQspi_enableLoopbackMode(Ifx_QSPI *qspi, boolean enable);
374
375 /** \brief enable Phase Transition1 Event
376 * \param qspi Pointer to QSPI module registers
377 * \param enable Enable (1) / Disable (0)
378 * \return None
379 */
380 IFX_INLINE void IfxQspi_enablePT1Event(Ifx_QSPI *qspi, boolean enable);
381
382 /** \brief enable Phase Transition2 Event
383 * \param qspi Pointer to QSPI module registers
384 * \param enable Enable (1) / Disable (0)
385 * \return None
386 */
387 IFX_INLINE void IfxQspi_enablePT2Event(Ifx_QSPI *qspi, boolean enable);
388
389 /** \brief enable User Event (Event selected by PT1)
390 * \param qspi Pointer to QSPI module registers
391 * \param enable Enable (1) / Disable (0)
392 * \return None
393 */
394 IFX_INLINE void IfxQspi_enableUsrEvent(Ifx_QSPI *qspi, boolean enable);
395
396 /**
397 * \param qspi Pointer to QSPI module registers
398 * \return Error Flags
399 */
400 IFX_INLINE uint16 IfxQspi_getErrorFlags(Ifx_QSPI *qspi);
401
402 /** \brief Request for Module in Pause state
403 * no interrupts
404 * no communication
405 * \param qspi Pointer to QSPI module registers
406 * \return None
407 */
408 IFX_INLINE void IfxQspi_pause(Ifx_QSPI *qspi);
409
410 /** \brief Read the oldest data from RXFIFO
411 * \param qspi Pointer to QSPI module registers
412 */
413 IFX_INLINE uint32 IfxQspi_readReceiveFifo(Ifx_QSPI *qspi);
414
415 /** \brief Request reset (State Machine & FIFO / Register / Module)
416 * \param qspi Pointer to QSPI module registers
417 * \param reset reset type (GLOBALCON.RESETS)
418 * \return None
419 */
420 IFX_INLINE void IfxQspi_requestReset(Ifx_QSPI *qspi, IfxQspi_Reset reset);
421
422 /** \brief Request for QSPI in Run state
423 * \param qspi Pointer to QSPI module registers
424 * \return None
425 */
426 IFX_INLINE void IfxQspi_run(Ifx_QSPI *qspi);
427
428 /** \brief Enable/Disable the Interrupt After last Byte
429 * \param qspi Module register handler
430 * \param interruptEnabled Enable/Disable the interrupt after last byte
431 * \return None
432 */
433 IFX_INLINE void IfxQspi_setMoveCounterInterruptAfterLastEnabled(Ifx_QSPI *qspi, boolean interruptEnabled);
434
435 /** \brief Set the Interrupt after last flag
436 * \param qspi Module register handler
437 * \param setInterrupt set the interrupt Flag
438 * \return None
439 */
440 IFX_INLINE void IfxQspi_setMoveCounterInterruptAfterLastFlag(Ifx_QSPI *qspi, boolean setInterrupt);
441
442 /** \brief Enable the interrupt before last byte
443 * \param qspi Pointer to Qspi Module Register
444 * \param interruptEnabled Specifies Interrupt is enable or disable
445 * \return None
446 */
447 IFX_INLINE void IfxQspi_setMoveCounterInterruptBeforeLastEnabled(Ifx_QSPI *qspi, boolean interruptEnabled);
448
449 /** \brief set the interrupt before last flag
450 * \param qspi Module register handler
451 * \param setInterrupt set the interrupt before last flag
452 * \return None
453 */
454 IFX_INLINE void IfxQspi_setMoveCounterInterruptBeforeLastFlag(Ifx_QSPI *qspi, boolean setInterrupt);
455
456 /** \brief Set the Trailing delay
457 * \param qspi handle of Module
458 * \param baudrate Baud rate
459 * \return None
460 */
461 IFX_INLINE void IfxQspi_setMoveCounterPrescalerTrailingDelay(Ifx_QSPI *qspi, const float baudrate);
462
463 /** \brief Set the threshold of RXFIFO for service request generation
464 * \param qspi Pointer to QSPI module registers
465 * \param rxFifoInt RxFIFO Interrupt threshold to set
466 * \return None
467 */
468 IFX_INLINE void IfxQspi_setReceiveFifoInterrruptThreshold(Ifx_QSPI *qspi, IfxQspi_RxFifoInt rxFifoInt);
469
470 /** \brief specifies whether to inject the trail2 from bacon configuration or mccon configuration registers
471 * \param qspi Module Register Handler
472 * \param trail2Enabled Enable/Disable Trail2 from MCCON register
473 * \return None
474 */
475 IFX_INLINE void IfxQspi_trail2InjectionEnabled(Ifx_QSPI *qspi, boolean trail2Enabled);
476
477 /** \brief Write Data into DATAENTRY register
478 * \param qspi Pointer to QSPI module registers
479 * \param data Data to be entered into TxFIFO
480 * \return None
481 */
482 IFX_INLINE void IfxQspi_writeTransmitFifo(Ifx_QSPI *qspi, uint32 data);
483
484 /** \brief Returns the module's suspend state.
485 * TRUE :if module is suspended.
486 * FALSE:if module is not yet suspended.
487 * \param qspi Pointer to QSPI module registers
488 * \return Suspend status (TRUE / FALSE)
489 */
490 IFX_INLINE boolean IfxQspi_isModuleSuspended(Ifx_QSPI *qspi);
491
492 /** \brief Configure the Module to Hard/Soft suspend mode.
493 * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
494 * \param qspi Pointer to QSPI module registers
495 * \param mode Module suspend mode
496 * \return None
497 */
498 IFX_INLINE void IfxQspi_setSuspendMode(Ifx_QSPI *qspi, IfxQspi_SuspendMode mode);
499
500 /******************************************************************************/
501 /*-------------------------Global Function Prototypes-------------------------*/
502 /******************************************************************************/
503
504 /** \brief Reads 16bit data from the Rx FIFO
505 * \param qspi Pointer to QSPI module registers
506 * \param data Received data will be copied into this array
507 * \param count Number of items to be received
508 * \return None
509 */
510 IFX_EXTERN void IfxQspi_read16(Ifx_QSPI *qspi, uint16 *data, Ifx_SizeT count);
511
512 /** \brief Reads 32bit data from the Rx FIFO
513 * \param qspi Pointer to QSPI module registers
514 * \param data Received data will be copied into this array
515 * \param count Number of items to be received
516 * \return None
517 */
518 IFX_EXTERN void IfxQspi_read32(Ifx_QSPI *qspi, uint32 *data, Ifx_SizeT count);
519
520 /** \brief Reads 8bit data from the Rx FIFO
521 * \param qspi Pointer to QSPI module registers
522 * \param data Received data will be copied into this array
523 * \param count Number of items to be received
524 * \return None
525 */
526 IFX_EXTERN void IfxQspi_read8(Ifx_QSPI *qspi, uint8 *data, Ifx_SizeT count);
527
528 /** \brief resets QSPI kernel
529 * \param qspi pointer to QSPI registers
530 * \return None
531 */
532 IFX_EXTERN void IfxQspi_resetModule(Ifx_QSPI *qspi);
533
534 /** \brief Writes 16bit data into the Tx FIFO
535 * \param qspi Pointer to QSPI module registers
536 * \param channelId Channel number to which econ val belongs
537 * \param data Array of data to be sent
538 * \param count Number of items to be sent
539 * \return None
540 */
541 IFX_EXTERN void IfxQspi_write16(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint16 *data, Ifx_SizeT count);
542
543 /** \brief Writes 32bit data into the Tx FIFO
544 * \param qspi Pointer to QSPI module registers
545 * \param channelId Channel number to which econ val belongs
546 * \param data Array of data to be sent
547 * \param count Number of items to be sent
548 * \return None
549 */
550 IFX_EXTERN void IfxQspi_write32(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 *data, Ifx_SizeT count);
551
552 /** \brief Writes 8bit data into the Tx FIFO
553 * \param qspi Pointer to QSPI module registers
554 * \param channelId Channel number to which econ val belongs
555 * \param data Array of data to be sent
556 * \param count Number of items to be sent
557 * \return None
558 */
559 IFX_EXTERN void IfxQspi_write8(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 *data, Ifx_SizeT count);
560
561 /** \} */
562
563 /** \addtogroup IfxLld_Qspi_Std_Support
564 * \{ */
565
566 /******************************************************************************/
567 /*-------------------------Inline Function Prototypes-------------------------*/
568 /******************************************************************************/
569
570 /** \brief Gets the current mode of QSPI
571 * \param qspi Pointer to QSPI module registers
572 * \return The current mode
573 */
574 IFX_INLINE IfxQspi_Mode IfxQspi_getMode(Ifx_QSPI *qspi);
575
576 /** \brief Specifies function to get module frequency
577 * \param qspi Pointer to QSPI module registers
578 * \return Module frequency in Float value
579 */
580 IFX_INLINE float IfxQspi_getModuleFrequency(Ifx_QSPI *qspi);
581
582 /** \brief Gets actual transmission phase
583 * \param qspi Pointer to QSPI module registers
584 * \return Actual transmission phase
585 */
586 IFX_INLINE IfxQspi_Phase IfxQspi_getPhase(Ifx_QSPI *qspi);
587
588 /** \brief Gets the filling level of RXFIFO
589 * \param qspi Pointer to QSPI module registers
590 * \return RxFIFO level
591 */
592 IFX_INLINE uint8 IfxQspi_getReceiveFifoLevel(Ifx_QSPI *qspi);
593
594 /** \brief Gets Time Quanta frequency
595 * \param qspi Pointer to QSPI module registers
596 * \return TQ frequency in float
597 */
598 IFX_INLINE float IfxQspi_getTimeQuantaFrequency(Ifx_QSPI *qspi);
599
600 /** \brief Gets the filling level of TXFIFO
601 * \param qspi Pointer to QSPI module registers
602 * \return TxFIFO level
603 */
604 IFX_INLINE uint8 IfxQspi_getTransmitFifoLevel(Ifx_QSPI *qspi);
605
606 /** \brief Specifies the Module enable or disable status
607 * \param qspi Pointer to QSPI module registers
608 * \return TRUE if module is enabled otherwise FALSE
609 */
610 IFX_INLINE boolean IfxQspi_isModuleEnabled(Ifx_QSPI *qspi);
611
612 /** \brief Sets the disable module request
613 * \param qspi Pointer to QSPI module registers
614 * \return None
615 */
616 IFX_INLINE void IfxQspi_setDisableModuleRequest(Ifx_QSPI *qspi);
617
618 /** \brief Sets the enable module request
619 * \param qspi Pointer to QSPI module registers
620 * \return None
621 */
622 IFX_INLINE void IfxQspi_setEnableModuleRequest(Ifx_QSPI *qspi);
623
624 /** \brief Sets the disable module request
625 * \param qspi Pointer to QSPI module registers
626 * \param mode Sleep mode selection
627 * \return None
628 */
629 IFX_INLINE void IfxQspi_setSleepMode(Ifx_QSPI *qspi, IfxQspi_SleepMode mode);
630
631 /** \brief Set the threshold of TXFIFO for service request generation
632 * \param qspi Pointer to QSPI module registers
633 * \param txFifoInt TxFifo Interrupt threshold to set
634 * \return None
635 */
636 IFX_INLINE void IfxQspi_setTransmitFifoInterrruptThreshold(Ifx_QSPI *qspi, IfxQspi_TxFifoInt txFifoInt);
637
638 /** \brief Write configuration into BACON register
639 * \param qspi Pointer to QSPI module registers
640 * \param baconVal baconVal Value to be entered in BACON register
641 * \return None
642 */
643 IFX_INLINE void IfxQspi_writeBasicConfiguration(Ifx_QSPI *qspi, uint32 baconVal);
644
645 /** \brief Write configuration into BACON register with .LAST flag set to 0
646 * \param qspi Pointer to QSPI module registers
647 * \param baconVal baconVal Value to be entered in BACON register
648 * \return None
649 */
650 IFX_INLINE void IfxQspi_writeBasicConfigurationBeginStream(Ifx_QSPI *qspi, uint32 baconVal);
651
652 /** \brief Write configuration into BACON register with .LAST flag set to 1
653 * \param qspi Pointer to QSPI module registers
654 * \param baconVal baconVal Value to be entered in BACON register
655 * \return None
656 */
657 IFX_INLINE void IfxQspi_writeBasicConfigurationEndStream(Ifx_QSPI *qspi, uint32 baconVal);
658
659 /** \brief Writes channel timing configuration into ECON register
660 * \param qspi Pointer to QSPI module registers
661 * \param channelId Channel number to which econ val belongs
662 * \param econVal Extended configuration value
663 * \return None
664 */
665 IFX_INLINE void IfxQspi_writeExtendedConfiguration(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 econVal);
666
667 /** \brief Writes Data and Configuration into MIXEDENTRY register
668 * \param qspi Pointer to QSPI module registers
669 * \param mixEntryVal Data and configuration in mixed
670 * \return None
671 */
672 IFX_INLINE void IfxQspi_writeMixedDataTransmitFifo(Ifx_QSPI *qspi, uint32 mixEntryVal);
673
674 /******************************************************************************/
675 /*-------------------------Global Function Prototypes-------------------------*/
676 /******************************************************************************/
677
678 /** \brief Function to calculate baudrate of specified channel
679 * \param qspi Pointer to QSPI module registers
680 * \param channelId QSPI channel number
681 * \return Actual baudrate in float
682 */
683 IFX_EXTERN float IfxQspi_calcRealBaudrate(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId);
684
685 /** \brief Function to calculate BACON register values
686 * \param qspi Pointer to QSPI module registers
687 * \param channelId QSPI Channel Number
688 * \param chMode Frame configuration
689 * \param baudrate The desired baudrate
690 * \return Calculated BACON value
691 */
692 IFX_EXTERN uint32 IfxQspi_calculateBasicConfigurationValue(Ifx_QSPI *qspi, const IfxQspi_ChannelId channelId, const SpiIf_ChMode *chMode, const float baudrate);
693
694 /** \brief Function to calculate ECON register values
695 * \param qspi Pointer to QSPI module registers
696 * \param cs QSPI channel Number : 8->0,9->1,.......
697 * \param chConfig SPI Channel Configuration
698 * \return Calculated ECON[CS] value
699 */
700 IFX_EXTERN uint32 IfxQspi_calculateExtendedConfigurationValue(Ifx_QSPI *qspi, const uint8 cs, const SpiIf_ChConfig *chConfig);
701
702 /** \brief Function to calculate prescaler
703 * \param qspi Pointer to QSPI module registers
704 * \param baudrate Maximum baudrate in Float
705 * \return Prescaler in integer
706 */
707 IFX_EXTERN uint32 IfxQspi_calculatePrescaler(Ifx_QSPI *qspi, float baudrate);
708
709 /** \brief Specifies the function to calculate Time quantum length
710 * \param qspi Pointer to QSPI module registers
711 * \param maxBaudrate Maximum baudrate in Float
712 * \return Time quantum length in integer
713 */
714 IFX_EXTERN uint32 IfxQspi_calculateTimeQuantumLength(Ifx_QSPI *qspi, float maxBaudrate);
715
716 /** \brief
717 * \param qspi Pointer to QSPI module registers
718 * \return QSPI module register address
719 */
720 IFX_EXTERN Ifx_QSPI *IfxQspi_getAddress(IfxQspi_Index qspi);
721
722 /** \brief Specifies the function to get Index
723 * \param qspi Pointer to QSPI module registers
724 * \return Index in Integer
725 */
726 IFX_EXTERN IfxQspi_Index IfxQspi_getIndex(Ifx_QSPI *qspi);
727
728 /** \brief Re-calculated BACON from the oldBACON
729 * \param oldBACON Old BACON value
730 * \param numOfData numOfData in LONG or CONTINUOUS mode
731 * \param shortData Specifies SHORT mode (TRUE) or other modes (FALSE)
732 * \param lastData Specifies last data in LONG or CONTINUOUS
733 * \return Re-calculated BACON
734 */
735 IFX_EXTERN uint32 IfxQspi_recalcBasicConfiguration(uint32 oldBACON, Ifx_SizeT numOfData, boolean shortData, boolean lastData);
736
737 /** \brief Configures a Slave Select Output
738 * \param qspi Pointer to QSPI module registers
739 * \param channelId Channel number to which econ val belongs
740 * \param outputEnable chip select output will be enabled during transaction
741 * \param activeLevel TRUE: active-high, FALSE: active-low
742 * \return None
743 */
744 IFX_EXTERN void IfxQspi_setSlaveSelectOutputControl(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, boolean outputEnable, boolean activeLevel);
745
746 /** \brief Calculates the Delay constants (pre and delay) from the user specified CS delays.
747 * \param qspi pointer to QSPI SFR
748 * \param channelId Channel ID no.
749 * \param chMode Pointer to Channel Mode
750 * \param delayConst Pointer to the Delay Consant Array
751 * \return None
752 */
753 IFX_EXTERN void IfxQspi_calculateDelayConstants(const Ifx_QSPI *qspi, const IfxQspi_ChannelId channelId, const SpiIf_ChMode *chMode, IfxQspi_DelayConst *delayConst);
754
755 /** \} */
756
757 /** \addtogroup IfxLld_Qspi_Std_Interrupt
758 * \{ */
759
760 /******************************************************************************/
761 /*-------------------------Inline Function Prototypes-------------------------*/
762 /******************************************************************************/
763
764 /** \brief Gets the Error request value
765 * \param qspi Pointer to QSPI module registers
766 * \return Error request value
767 */
768 IFX_INLINE volatile Ifx_SRC_SRCR *IfxQspi_getErrorSrc(Ifx_QSPI *qspi);
769
770 /** \brief Gets the RXFIFO service request
771 * \param qspi Pointer to QSPI module registers
772 * \return Receive service request value
773 */
774 IFX_INLINE volatile Ifx_SRC_SRCR *IfxQspi_getReceiveSrc(Ifx_QSPI *qspi);
775
776 /** \brief Gets the TXFIFO service request
777 * \param qspi Pointer to QSPI module registers
778 * \return Transmission service request value
779 */
780 IFX_INLINE volatile Ifx_SRC_SRCR *IfxQspi_getTransmitSrc(Ifx_QSPI *qspi);
781
782 /** \} */
783
784 /** \addtogroup IfxLld_Qspi_Std_IO
785 * \{ */
786
787 /******************************************************************************/
788 /*-------------------------Inline Function Prototypes-------------------------*/
789 /******************************************************************************/
790
791 /** \brief Initializes a MRST input
792 * \param mrstIn the MRST Pin which should be configured
793 * \param mrstInMode the pin input mode which should be configured
794 * \return None
795 */
796 IFX_INLINE void IfxQspi_initMrstInPin(const IfxQspi_Mrst_In *mrstIn, IfxPort_InputMode mrstInMode);
797
798 /** \brief Initializes a MRST output
799 * \param mrstOut the MRST Pin which should be configured
800 * \param mrstOutMode the pin output mode which should be configured
801 * \param padDriver the pad driver mode which should be configured
802 * \return None
803 */
804 IFX_INLINE void IfxQspi_initMrstOutPin(const IfxQspi_Mrst_Out *mrstOut, IfxPort_OutputMode mrstOutMode, IfxPort_PadDriver padDriver);
805
806 /** \brief Initializes a MTSR input
807 * \param mtsrIn the MTSR Pin which should be configured
808 * \param mtsrInMode the pin input mode which should be configured
809 * \return None
810 */
811 IFX_INLINE void IfxQspi_initMtsrInPin(const IfxQspi_Mtsr_In *mtsrIn, IfxPort_InputMode mtsrInMode);
812
813 /** \brief Initializes a MTSR output
814 * \param mtsrOut the MTSR Pin which should be configured
815 * \param mtsrOutMode the pin output mode which should be configured
816 * \param padDriver the pad driver mode which should be configured
817 * \return None
818 */
819 IFX_INLINE void IfxQspi_initMtsrOutPin(const IfxQspi_Mtsr_Out *mtsrOut, IfxPort_OutputMode mtsrOutMode, IfxPort_PadDriver padDriver);
820
821 /** \brief Initializes a SCLK input
822 * \param sclkIn the SCLK Pin which should be configured
823 * \param sclkInMode the pin input mode which should be configured
824 * \return None
825 */
826 IFX_INLINE void IfxQspi_initSclkInPin(const IfxQspi_Sclk_In *sclkIn, IfxPort_InputMode sclkInMode);
827
828 /** \brief Initializes a SCLK output
829 * \param sclkOut the SCLK Pin which should be configured
830 * \param sclkOutMode the pin output mode which should be configured
831 * \param padDriver the pad driver mode which should be configured
832 * \return None
833 */
834 IFX_INLINE void IfxQspi_initSclkOutPin(const IfxQspi_Sclk_Out *sclkOut, IfxPort_OutputMode sclkOutMode, IfxPort_PadDriver padDriver);
835
836 /** \brief Initializes a SLSI input
837 * \param slsi the SLSI Pin which should be configured
838 * \param slsiMode the pin input mode which should be configured
839 * \return None
840 */
841 IFX_INLINE void IfxQspi_initSlsi(const IfxQspi_Slsi_In *slsi, IfxPort_InputMode slsiMode);
842
843 /** \brief Initializes a SLSO output
844 * \param slso the SLSO Pin which should be configured
845 * \param slsoMode the pin output mode which should be configured
846 * \param padDriver the pad driver mode which should be configured
847 * \param outIndex Pin Pad driver index
848 * \return None
849 */
850 IFX_INLINE void IfxQspi_initSlso(const IfxQspi_Slso_Out *slso, IfxPort_OutputMode slsoMode, IfxPort_PadDriver padDriver, IfxPort_OutputIdx outIndex);
851
852 /** \} */
853
854 /******************************************************************************/
855 /*-------------------------Inline Function Prototypes-------------------------*/
856 /******************************************************************************/
857
858 /** \brief Get the Receive FIFO mode
859 * \param qspi Pointer to QSPI module registers
860 * \return Receive FIFO mode
861 */
862 IFX_INLINE IfxQspi_FifoMode IfxQspi_getRxFifoMode(Ifx_QSPI *qspi);
863
864 /** \brief Get the Transfer FIFO mode
865 * \param qspi Pointer to QSPI module registers
866 * \return Transfer FIFO mode
867 */
868 IFX_INLINE IfxQspi_FifoMode IfxQspi_getTxFifoMode(Ifx_QSPI *qspi);
869
870 /** \brief Permutate bytes to / from Big Endian
871 * \param qspi Pointer to QSPI module registers
872 * \param channelId Channel number to which econ val belongs
873 * \param bigEndian specifies to Permutate bytes to / from Big Endian
874 * \return None
875 */
876 IFX_INLINE void IfxQspi_permutateBigEndian(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bigEndian);
877
878 /** \brief Set the value of bit segment1 (A).
879 * \param qspi Pointer to QSPI module registers
880 * \param channelId Channel number to which econ val belongs
881 * \param bitSegment1 Length expressed in time quantums of ECONz.Q.
882 * \return None
883 */
884 IFX_INLINE void IfxQspi_setBitsegment1(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bitSegment1);
885
886 /** \brief Set the value of bit segment2 (B).
887 * \param qspi Pointer to QSPI module registers
888 * \param channelId Channel number to which econ val belongs
889 * \param bitSegment2 Length expressed in time quantums of ECONz.Q.
890 * \return None
891 */
892 IFX_INLINE void IfxQspi_setBitsegment2(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bitSegment2);
893
894 /** \brief Set the value of bit segment3 (C).
895 * \param qspi Pointer to QSPI module registers
896 * \param channelId Channel number to which econ val belongs
897 * \param bitSegment3 Length expressed in time quantums of ECONz.Q.
898 * \return None
899 */
900 IFX_INLINE void IfxQspi_setBitsegment3(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bitSegment3);
901
902 /**
903 * \param qspi Pointer to QSPI module registers
904 * \param mode select the transfer fifo mode
905 * \return None
906 */
907 IFX_INLINE void IfxQspi_setRxFifoMode(Ifx_QSPI *qspi, IfxQspi_FifoMode mode);
908
909 /** \brief Set the value of Time Quantum.
910 * \param qspi Pointer to QSPI module registers
911 * \param channelId Channel number to which econ val belongs
912 * \param timeQuantum specifies the value of Time Quantum.
913 * \return None
914 */
915 IFX_INLINE void IfxQspi_setTimeQuantum(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 timeQuantum);
916
917 /** \brief Set the transfer FIFO mode
918 * \param qspi Pointer to QSPI module registers
919 * \param mode select the transfer fifo mode
920 * \return None
921 */
922 IFX_INLINE void IfxQspi_setTxFifoMode(Ifx_QSPI *qspi, IfxQspi_FifoMode mode);
923
924 /** \brief Provides functionality for both setting of MRSTIN pin direction as input and configuring pad driver
925 * \param mrstIn the MRST Pin which should be configured
926 * \param mrstInMode the pin input mode which should be configured
927 * \param padDriver Pad Driver
928 * \return None
929 */
930 IFX_INLINE void IfxQspi_initMrstInPinWithPadLevel(const IfxQspi_Mrst_In *mrstIn, IfxPort_InputMode mrstInMode, IfxPort_PadDriver padDriver);
931
932 /** \brief Provides functionality for both setting of MTSRIN pin direction as input and configuring pad driver
933 * \param mtsrIn the MTSR Pin which should be configured
934 * \param mtsrInMode the pin input mode which should be configured
935 * \param padDriver Pad Driver
936 * \return None
937 */
938 IFX_INLINE void IfxQspi_initMtsrInPinWithPadLevel(const IfxQspi_Mtsr_In *mtsrIn, IfxPort_InputMode mtsrInMode, IfxPort_PadDriver padDriver);
939
940 /** \brief Provides functionality for both setting of SCLKIN pin direction as input and configuring pad driver
941 * \param sclkIn the SCLK Pin which should be configured
942 * \param sclkInMode the pin input mode which should be configured
943 * \param padDriver Pad Driver
944 * \return None
945 */
946 IFX_INLINE void IfxQspi_initSclkInPinWithPadLevel(const IfxQspi_Sclk_In *sclkIn, IfxPort_InputMode sclkInMode, IfxPort_PadDriver padDriver);
947
948 /** \brief Provides functionality for both setting of SLSI pin direction as input and configuring pad driver
949 * \param slsi the SLSI Pin which should be configured
950 * \param slsiMode the pin input mode which should be configured
951 * \param padDriver Pad Driver
952 * \return None
953 */
954 IFX_INLINE void IfxQspi_initSlsiWithPadLevel(const IfxQspi_Slsi_In *slsi, IfxPort_InputMode slsiMode, IfxPort_PadDriver padDriver);
955
956 /******************************************************************************/
957 /*---------------------Inline Function Implementations------------------------*/
958 /******************************************************************************/
959
960 IFX_INLINE void IfxQspi_clearAllEventFlags(Ifx_QSPI *qspi)
961 {
962 qspi->FLAGSCLEAR.U = 0xFFFFU;
963 }
964
965
966 IFX_INLINE void IfxQspi_clearMoveCounterInterruptAfterLastFlag(Ifx_QSPI *qspi, boolean clearInterrupt)
967 {
968 qspi->MCCON.B.IALC = clearInterrupt;
969 }
970
971
972 IFX_INLINE void IfxQspi_clearMoveCounterInterruptBeforeLastFlag(Ifx_QSPI *qspi, boolean clearInterrupt)
973 {
974 qspi->MCCON.B.IBLC = clearInterrupt;
975 }
976
977
978 IFX_INLINE void IfxQspi_clearRxReq(Ifx_QSPI *qspi)
979 {
980 qspi->FLAGSCLEAR.B.RXC = 1U;
981 }
982
983
984 IFX_INLINE void IfxQspi_clearTxReq(Ifx_QSPI *qspi)
985 {
986 qspi->FLAGSCLEAR.B.TXC = 1U;
987 }
988
989
990 IFX_INLINE void IfxQspi_configPT1Event(Ifx_QSPI *qspi, IfxQspi_PhaseTransitionEvent pt1Config)
991 {
992 qspi->GLOBALCON1.B.PT1 = pt1Config;
993 }
994
995
996 IFX_INLINE void IfxQspi_configPT2Event(Ifx_QSPI *qspi, IfxQspi_PhaseTransitionEvent pt2Config)
997 {
998 qspi->GLOBALCON1.B.PT2 = pt2Config;
999 }
1000
1001
1002 IFX_INLINE void IfxQspi_enableLoopbackMode(Ifx_QSPI *qspi, boolean enable)
1003 {
1004 IFX_UNUSED_PARAMETER(enable);
1005
1006 qspi->GLOBALCON.B.LB = 1;
1007 }
1008
1009
1010 IFX_INLINE void IfxQspi_enablePT1Event(Ifx_QSPI *qspi, boolean enable)
1011 {
1012 qspi->GLOBALCON1.B.PT1EN = enable;
1013 }
1014
1015
1016 IFX_INLINE void IfxQspi_enablePT2Event(Ifx_QSPI *qspi, boolean enable)
1017 {
1018 qspi->GLOBALCON1.B.PT2EN = enable;
1019 }
1020
1021
1022 IFX_INLINE void IfxQspi_enableUsrEvent(Ifx_QSPI *qspi, boolean enable)
1023 {
1024 qspi->GLOBALCON1.B.USREN = enable;
1025 }
1026
1027
1028 IFX_INLINE uint16 IfxQspi_getErrorFlags(Ifx_QSPI *qspi)
1029 {
1030 return qspi->STATUS.B.ERRORFLAGS;
1031 }
1032
1033
1034 IFX_INLINE volatile Ifx_SRC_SRCR *IfxQspi_getErrorSrc(Ifx_QSPI *qspi)
1035 {
1036 uint32 index = IfxQspi_getIndex(qspi);
1037 return &MODULE_SRC.QSPI.QSPI[index].ERR;
1038 }
1039
1040
1041 IFX_INLINE IfxQspi_Mode IfxQspi_getMode(Ifx_QSPI *qspi)
1042 {
1043 return (IfxQspi_Mode)qspi->GLOBALCON.B.MS;
1044 }
1045
1046
1047 IFX_INLINE float IfxQspi_getModuleFrequency(Ifx_QSPI *qspi)
1048 {
1049 IFX_UNUSED_PARAMETER(qspi->CLC.U != 0);
1050
1051 return IfxScuCcu_getQspiFrequency();
1052 }
1053
1054
1055 IFX_INLINE IfxQspi_Phase IfxQspi_getPhase(Ifx_QSPI *qspi)
1056 {
1057 return (IfxQspi_Phase)qspi->STATUS.B.PHASE;
1058 }
1059
1060
1061 IFX_INLINE uint8 IfxQspi_getReceiveFifoLevel(Ifx_QSPI *qspi)
1062 {
1063 return qspi->STATUS.B.RXFIFOLEVEL;
1064 }
1065
1066
1067 IFX_INLINE volatile Ifx_SRC_SRCR *IfxQspi_getReceiveSrc(Ifx_QSPI *qspi)
1068 {
1069 uint32 index = IfxQspi_getIndex(qspi);
1070 return &MODULE_SRC.QSPI.QSPI[index].RX;
1071 }
1072
1073
1074 IFX_INLINE IfxQspi_FifoMode IfxQspi_getRxFifoMode(Ifx_QSPI *qspi)
1075 {
1076 return (IfxQspi_FifoMode)qspi->GLOBALCON1.B.RXFM;
1077 }
1078
1079
1080 IFX_INLINE float IfxQspi_getTimeQuantaFrequency(Ifx_QSPI *qspi)
1081 {
1082 return IfxQspi_getModuleFrequency(qspi) / (qspi->GLOBALCON.B.TQ + 1);
1083 }
1084
1085
1086 IFX_INLINE uint8 IfxQspi_getTransmitFifoLevel(Ifx_QSPI *qspi)
1087 {
1088 return qspi->STATUS.B.TXFIFOLEVEL;
1089 }
1090
1091
1092 IFX_INLINE volatile Ifx_SRC_SRCR *IfxQspi_getTransmitSrc(Ifx_QSPI *qspi)
1093 {
1094 uint32 index = IfxQspi_getIndex(qspi);
1095 return &MODULE_SRC.QSPI.QSPI[index].TX;
1096 }
1097
1098
1099 IFX_INLINE IfxQspi_FifoMode IfxQspi_getTxFifoMode(Ifx_QSPI *qspi)
1100 {
1101 return (IfxQspi_FifoMode)qspi->GLOBALCON1.B.TXFM;
1102 }
1103
1104
1105 IFX_INLINE void IfxQspi_initMrstInPin(const IfxQspi_Mrst_In *mrstIn, IfxPort_InputMode mrstInMode)
1106 {
1107 IfxPort_setPinModeInput(mrstIn->pin.port, mrstIn->pin.pinIndex, mrstInMode);
1108 mrstIn->module->PISEL.B.MRIS = mrstIn->select;
1109 }
1110
1111
1112 IFX_INLINE void IfxQspi_initMrstOutPin(const IfxQspi_Mrst_Out *mrstOut, IfxPort_OutputMode mrstOutMode, IfxPort_PadDriver padDriver)
1113 {
1114 IfxPort_setPinModeOutput(mrstOut->pin.port, mrstOut->pin.pinIndex, mrstOutMode, mrstOut->select);
1115 IfxPort_setPinPadDriver(mrstOut->pin.port, mrstOut->pin.pinIndex, padDriver);
1116 }
1117
1118
1119 IFX_INLINE void IfxQspi_initMtsrInPin(const IfxQspi_Mtsr_In *mtsrIn, IfxPort_InputMode mtsrInMode)
1120 {
1121 IfxPort_setPinModeInput(mtsrIn->pin.port, mtsrIn->pin.pinIndex, mtsrInMode);
1122 mtsrIn->module->PISEL.B.SRIS = mtsrIn->select;
1123 }
1124
1125
1126 IFX_INLINE void IfxQspi_initMtsrOutPin(const IfxQspi_Mtsr_Out *mtsrOut, IfxPort_OutputMode mtsrOutMode, IfxPort_PadDriver padDriver)
1127 {
1128 IfxPort_setPinModeOutput(mtsrOut->pin.port, mtsrOut->pin.pinIndex, mtsrOutMode, mtsrOut->select);
1129 IfxPort_setPinPadDriver(mtsrOut->pin.port, mtsrOut->pin.pinIndex, padDriver);
1130 }
1131
1132
1133 IFX_INLINE void IfxQspi_initSclkInPin(const IfxQspi_Sclk_In *sclkIn, IfxPort_InputMode sclkInMode)
1134 {
1135 IfxPort_setPinModeInput(sclkIn->pin.port, sclkIn->pin.pinIndex, sclkInMode);
1136 sclkIn->module->PISEL.B.SCIS = sclkIn->select;
1137 }
1138
1139
1140 IFX_INLINE void IfxQspi_initSclkOutPin(const IfxQspi_Sclk_Out *sclkOut, IfxPort_OutputMode sclkOutMode, IfxPort_PadDriver padDriver)
1141 {
1142 IfxPort_setPinModeOutput(sclkOut->pin.port, sclkOut->pin.pinIndex, sclkOutMode, sclkOut->select);
1143 IfxPort_setPinPadDriver(sclkOut->pin.port, sclkOut->pin.pinIndex, padDriver);
1144 }
1145
1146
1147 IFX_INLINE void IfxQspi_initSlsi(const IfxQspi_Slsi_In *slsi, IfxPort_InputMode slsiMode)
1148 {
1149 IfxPort_setPinModeInput(slsi->pin.port, slsi->pin.pinIndex, slsiMode);
1150 /* PISEL */
1151 slsi->module->PISEL.B.SLSIS = slsi->select + 1;
1152 }
1153
1154
1155 IFX_INLINE void IfxQspi_initSlso(const IfxQspi_Slso_Out *slso, IfxPort_OutputMode slsoMode, IfxPort_PadDriver padDriver, IfxPort_OutputIdx outIndex)
1156 {
1157 IfxPort_setPinModeOutput(slso->pin.port, slso->pin.pinIndex, slsoMode, outIndex);
1158 IfxPort_setPinPadDriver(slso->pin.port, slso->pin.pinIndex, padDriver);
1159 }
1160
1161
1162 IFX_INLINE boolean IfxQspi_isModuleEnabled(Ifx_QSPI *qspi)
1163 {
1164 return (qspi->CLC.B.DISS == 0) ? TRUE : FALSE;
1165 }
1166
1167
1168 IFX_INLINE void IfxQspi_pause(Ifx_QSPI *qspi)
1169 {
1170 qspi->GLOBALCON.B.EN = 0;
1171
1172 while (IfxQspi_getPhase(qspi) != IfxQspi_Phase_wait)
1173 {}
1174 }
1175
1176
1177 IFX_INLINE void IfxQspi_permutateBigEndian(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bigEndian)
1178 {
1179 int cs = channelId % 8;
1180 qspi->ECON[cs].B.BE = bigEndian;
1181 }
1182
1183
1184 IFX_INLINE uint32 IfxQspi_readReceiveFifo(Ifx_QSPI *qspi)
1185 {
1186 return qspi->RXEXIT.U;
1187 }
1188
1189
1190 IFX_INLINE void IfxQspi_requestReset(Ifx_QSPI *qspi, IfxQspi_Reset reset)
1191 {
1192 qspi->GLOBALCON.B.RESETS = reset;
1193 }
1194
1195
1196 IFX_INLINE void IfxQspi_run(Ifx_QSPI *qspi)
1197 {
1198 qspi->GLOBALCON.B.EN = 1;
1199 }
1200
1201
1202 IFX_INLINE void IfxQspi_setBitsegment1(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bitSegment1)
1203 {
1204 int cs = channelId % 8;
1205 qspi->ECON[cs].B.A = bitSegment1;
1206 }
1207
1208
1209 IFX_INLINE void IfxQspi_setBitsegment2(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bitSegment2)
1210 {
1211 int cs = channelId % 8;
1212 qspi->ECON[cs].B.B = bitSegment2;
1213 }
1214
1215
1216 IFX_INLINE void IfxQspi_setBitsegment3(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bitSegment3)
1217 {
1218 int cs = channelId % 8;
1219 qspi->ECON[cs].B.C = bitSegment3;
1220 }
1221
1222
1223 IFX_INLINE void IfxQspi_setDisableModuleRequest(Ifx_QSPI *qspi)
1224 {
1225 qspi->CLC.B.DISR = 1;
1226 }
1227
1228
1229 IFX_INLINE void IfxQspi_setEnableModuleRequest(Ifx_QSPI *qspi)
1230 {
1231 qspi->CLC.B.DISR = 0;
1232 }
1233
1234
1235 IFX_INLINE void IfxQspi_setMoveCounterInterruptAfterLastEnabled(Ifx_QSPI *qspi, boolean interruptEnabled)
1236 {
1237 qspi->MCCON.B.IALEN = interruptEnabled;
1238 }
1239
1240
1241 IFX_INLINE void IfxQspi_setMoveCounterInterruptAfterLastFlag(Ifx_QSPI *qspi, boolean setInterrupt)
1242 {
1243 qspi->MCCON.B.IALS = setInterrupt;
1244 }
1245
1246
1247 IFX_INLINE void IfxQspi_setMoveCounterInterruptBeforeLastEnabled(Ifx_QSPI *qspi, boolean interruptEnabled)
1248 {
1249 qspi->MCCON.B.IBLEN = interruptEnabled;
1250 }
1251
1252
1253 IFX_INLINE void IfxQspi_setMoveCounterInterruptBeforeLastFlag(Ifx_QSPI *qspi, boolean setInterrupt)
1254 {
1255 qspi->MCCON.B.IBLS = setInterrupt;
1256 }
1257
1258
1259 IFX_INLINE void IfxQspi_setMoveCounterPrescalerTrailingDelay(Ifx_QSPI *qspi, const float baudrate)
1260 {
1261 qspi->MCCON.B.TPRE2 = IfxQspi_calculatePrescaler(qspi, baudrate);
1262 }
1263
1264
1265 IFX_INLINE void IfxQspi_setReceiveFifoInterrruptThreshold(Ifx_QSPI *qspi, IfxQspi_RxFifoInt rxFifoInt)
1266 {
1267 qspi->GLOBALCON1.B.RXFIFOINT = rxFifoInt;
1268 }
1269
1270
1271 IFX_INLINE void IfxQspi_setRxFifoMode(Ifx_QSPI *qspi, IfxQspi_FifoMode mode)
1272 {
1273 qspi->GLOBALCON1.B.RXFM = mode;
1274 }
1275
1276
1277 IFX_INLINE void IfxQspi_setSleepMode(Ifx_QSPI *qspi, IfxQspi_SleepMode mode)
1278 {
1279 qspi->CLC.B.EDIS = mode;
1280 }
1281
1282
1283 IFX_INLINE void IfxQspi_setTimeQuantum(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 timeQuantum)
1284 {
1285 int cs = channelId % 8;
1286 qspi->ECON[cs].B.Q = timeQuantum;
1287 }
1288
1289
1290 IFX_INLINE void IfxQspi_setTransmitFifoInterrruptThreshold(Ifx_QSPI *qspi, IfxQspi_TxFifoInt txFifoInt)
1291 {
1292 qspi->GLOBALCON1.B.TXFIFOINT = txFifoInt;
1293 }
1294
1295
1296 IFX_INLINE void IfxQspi_setTxFifoMode(Ifx_QSPI *qspi, IfxQspi_FifoMode mode)
1297 {
1298 qspi->GLOBALCON1.B.TXFM = mode;
1299 }
1300
1301
1302 IFX_INLINE void IfxQspi_trail2InjectionEnabled(Ifx_QSPI *qspi, boolean trail2Enabled)
1303 {
1304 qspi->MCCON.B.T2EN = trail2Enabled;
1305 }
1306
1307
1308 IFX_INLINE void IfxQspi_writeBasicConfiguration(Ifx_QSPI *qspi, uint32 baconVal)
1309 {
1310 qspi->BACONENTRY.U = baconVal;
1311 }
1312
1313
1314 IFX_INLINE void IfxQspi_writeBasicConfigurationBeginStream(Ifx_QSPI *qspi, uint32 baconVal)
1315 {
1316 Ifx_QSPI_BACON bacon;
1317 bacon.U = baconVal;
1318 bacon.B.LAST = 0;
1319
1320 qspi->BACONENTRY.U = bacon.U;
1321 }
1322
1323
1324 IFX_INLINE void IfxQspi_writeBasicConfigurationEndStream(Ifx_QSPI *qspi, uint32 baconVal)
1325 {
1326 Ifx_QSPI_BACON bacon;
1327 bacon.U = baconVal;
1328 bacon.B.LAST = 1;
1329
1330 qspi->BACONENTRY.U = bacon.U;
1331 }
1332
1333
1334 IFX_INLINE void IfxQspi_writeExtendedConfiguration(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 econVal)
1335 {
1336 int cs = channelId % 8;
1337 qspi->ECON[cs].U = econVal;
1338 }
1339
1340
1341 IFX_INLINE void IfxQspi_writeMixedDataTransmitFifo(Ifx_QSPI *qspi, uint32 mixEntryVal)
1342 {
1343 qspi->MIXENTRY.U = mixEntryVal;
1344 }
1345
1346
1347 IFX_INLINE void IfxQspi_writeTransmitFifo(Ifx_QSPI *qspi, uint32 data)
1348 {
1349 qspi->DATAENTRY[0].U = data;
1350 }
1351
1352
1353 IFX_INLINE boolean IfxQspi_isModuleSuspended(Ifx_QSPI *qspi)
1354 {
1355 Ifx_QSPI_OCS ocs;
1356
1357 // read the status
1358 ocs.U = qspi->OCS.U;
1359
1360 // return the status
1361 return ocs.B.SUSSTA;
1362 }
1363
1364
1365 IFX_INLINE void IfxQspi_setSuspendMode(Ifx_QSPI *qspi, IfxQspi_SuspendMode mode)
1366 {
1367 Ifx_QSPI_OCS ocs;
1368
1369 // remove protection and configure the suspend mode.
1370 ocs.B.SUS_P = 1;
1371 ocs.B.SUS = mode;
1372 qspi->OCS.U = ocs.U;
1373 }
1374
1375
1376 IFX_INLINE void IfxQspi_initMrstInPinWithPadLevel(const IfxQspi_Mrst_In *mrstIn, IfxPort_InputMode mrstInMode, IfxPort_PadDriver padDriver)
1377 {
1378 IfxPort_setPinModeInput(mrstIn->pin.port, mrstIn->pin.pinIndex, mrstInMode);
1379 IfxPort_setPinPadDriver(mrstIn->pin.port, mrstIn->pin.pinIndex, padDriver);
1380 mrstIn->module->PISEL.B.MRIS = mrstIn->select;
1381 }
1382
1383
1384 IFX_INLINE void IfxQspi_initMtsrInPinWithPadLevel(const IfxQspi_Mtsr_In *mtsrIn, IfxPort_InputMode mtsrInMode, IfxPort_PadDriver padDriver)
1385 {
1386 IfxPort_setPinModeInput(mtsrIn->pin.port, mtsrIn->pin.pinIndex, mtsrInMode);
1387 IfxPort_setPinPadDriver(mtsrIn->pin.port, mtsrIn->pin.pinIndex, padDriver);
1388 mtsrIn->module->PISEL.B.SRIS = mtsrIn->select;
1389 }
1390
1391
1392 IFX_INLINE void IfxQspi_initSclkInPinWithPadLevel(const IfxQspi_Sclk_In *sclkIn, IfxPort_InputMode sclkInMode, IfxPort_PadDriver padDriver)
1393 {
1394 IfxPort_setPinModeInput(sclkIn->pin.port, sclkIn->pin.pinIndex, sclkInMode);
1395 IfxPort_setPinPadDriver(sclkIn->pin.port, sclkIn->pin.pinIndex, padDriver);
1396 sclkIn->module->PISEL.B.SCIS = sclkIn->select;
1397 }
1398
1399
1400 IFX_INLINE void IfxQspi_initSlsiWithPadLevel(const IfxQspi_Slsi_In *slsi, IfxPort_InputMode slsiMode, IfxPort_PadDriver padDriver)
1401 {
1402 IfxPort_setPinModeInput(slsi->pin.port, slsi->pin.pinIndex, slsiMode);
1403 /* PISEL */
1404 IfxPort_setPinPadDriver(slsi->pin.port, slsi->pin.pinIndex, padDriver);
1405 slsi->module->PISEL.B.SLSIS = slsi->select + 1;
1406 }
1407
1408
1409 #endif /* IFXQSPI_H */
IfxQspi_FifoMode_batchMove
Batch Move Mode.
Definition: IfxQspi.h:290
IfxQspi_Mrst_Out
MRST pin mapping structure.
Definition: IfxQspi_PinMap.h:96
IfxQspi_Slsi_In
SLSI pin mapping structure.
Definition: IfxQspi_PinMap.h:80
IfxQspi_calculateDelayConstants
IFX_EXTERN void IfxQspi_calculateDelayConstants(const Ifx_QSPI *qspi, const IfxQspi_ChannelId channelId, const SpiIf_ChMode *chMode, IfxQspi_DelayConst *delayConst)
Calculates the Delay constants (pre and delay) from the user specified CS delays. ...
Definition: IfxQspi.c:451
IfxQspi_Error_txfifoOverflow
TX FIFO Overflow Error.
Definition: IfxQspi.h:129
IfxQspi_initMtsrInPinWithPadLevel
IFX_INLINE void IfxQspi_initMtsrInPinWithPadLevel(const IfxQspi_Mtsr_In *mtsrIn, IfxPort_InputMode mtsrInMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of MTSRIN pin direction as input and configuring pad driver...
Definition: IfxQspi.h:1384
IfxQspi_Phase_lead
Frame lead phase.
Definition: IfxQspi.h:183
IfxQspi_PhaseTransitionEvent_endOfWait
BUSY (end of WAIT phase)
Definition: IfxQspi.h:195
IfxQspi_Error_rxfifoUnderflow
RX FIFO Underflow Error.
Definition: IfxQspi.h:132
IfxQspi_FifoMode_singleMove
Single Move Mode.
Definition: IfxQspi.h:289
IfxQspi_calcRealBaudrate
IFX_EXTERN float IfxQspi_calcRealBaudrate(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId)
Function to calculate baudrate of specified channel.
Definition: IfxQspi.c:54
IfxQspi_StrobeDelay_9
SLSO delay 9 cycle(s)
Definition: IfxQspi.h:246
IfxQspi_read8
IFX_EXTERN void IfxQspi_read8(Ifx_QSPI *qspi, uint8 *data, Ifx_SizeT count)
Reads 8bit data from the Rx FIFO.
Definition: IfxQspi.c:337
IfxQspi_Error
IfxQspi_Error
QSPI Error Flags (STATUS.ERRORFLAGS)
Definition: IfxQspi.h:123
IfxQspi_Error_baudrate
BaudRate Error.
Definition: IfxQspi.h:128
IfxQspi_read16
IFX_EXTERN void IfxQspi_read16(Ifx_QSPI *qspi, uint16 *data, Ifx_SizeT count)
Reads 16bit data from the Rx FIFO.
Definition: IfxQspi.c:313
IfxQspi_DataLengthUnit
IfxQspi_DataLengthUnit
Data length unit of a frame (BACON.BYTE)
Definition: IfxQspi.h:115
IfxQspi_ExpectTimeout_2097152
Expect phse time out 2097152.
Definition: IfxQspi.h:156
IfxQspi_ExpectTimeout_512
Expect phse time out 512.
Definition: IfxQspi.h:144
SpiIf_ChConfig_
Definition: SpiIf.h:225
IfxQspi_PhaseTransitionEvent
IfxQspi_PhaseTransitionEvent
Phase Transition Event.
Definition: IfxQspi.h:193
IfxQspi_StrobeDelay_7
SLSO delay 7 cycle(s)
Definition: IfxQspi.h:244
IfxQspi_enablePT1Event
IFX_INLINE void IfxQspi_enablePT1Event(Ifx_QSPI *qspi, boolean enable)
enable Phase Transition1 Event
Definition: IfxQspi.h:1010
IfxQspi_Error_parity
Parity Error.
Definition: IfxQspi.h:126
IfxQspi_getErrorFlags
IFX_INLINE uint16 IfxQspi_getErrorFlags(Ifx_QSPI *qspi)
Definition: IfxQspi.h:1028
IfxQspi_clearTxReq
IFX_INLINE void IfxQspi_clearTxReq(Ifx_QSPI *qspi)
Clear TX service requests.
Definition: IfxQspi.h:984
IfxQspi_ChannelId_7
Channel #7.
Definition: IfxQspi.h:103
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:126
IfxQspi_DataLengthUnit_bit
Data Length in Bits.
Definition: IfxQspi.h:117
IfxQspi_TxFifoInt_1
TxFifo Interrupt Threshold #1.
Definition: IfxQspi.h:276
IfxQspi_Sclk_In
SCLK pin mapping structure.
Definition: IfxQspi_PinMap.h:72
IfxQspi_ExpectTimeout_2048
Expect phse time out 2048.
Definition: IfxQspi.h:146
IfxQspi_ExpectTimeout_64
Expect phse time out 64.
Definition: IfxQspi.h:141
IfxQspi_setDisableModuleRequest
IFX_INLINE void IfxQspi_setDisableModuleRequest(Ifx_QSPI *qspi)
Sets the disable module request.
Definition: IfxQspi.h:1223
IfxQspi_getMode
IFX_INLINE IfxQspi_Mode IfxQspi_getMode(Ifx_QSPI *qspi)
Gets the current mode of QSPI.
Definition: IfxQspi.h:1041
IfxQspi_Index
IfxQspi_Index
List of the available QSPI resources.
Definition: IfxQspi_cfg.h:79
IfxQspi_ExpectTimeout_8192
Expect phse time out 8192.
Definition: IfxQspi.h:148
IfxQspi_getIndex
IFX_EXTERN IfxQspi_Index IfxQspi_getIndex(Ifx_QSPI *qspi)
Specifies the function to get Index.
Definition: IfxQspi.c:293
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:140
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxQspi_write16
IFX_EXTERN void IfxQspi_write16(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint16 *data, Ifx_SizeT count)
Writes 16bit data into the Tx FIFO.
Definition: IfxQspi.c:412
IfxQspi_Error_rxfifoOverflow
RX FIFO Overflow Error.
Definition: IfxQspi.h:131
IfxQspi_Sclk_Out
SCLK pin mapping structure.
Definition: IfxQspi_PinMap.h:112
IfxQspi_resetModule
IFX_EXTERN void IfxQspi_resetModule(Ifx_QSPI *qspi)
resets QSPI kernel
Definition: IfxQspi.c:365
IfxQspi_writeMixedDataTransmitFifo
IFX_INLINE void IfxQspi_writeMixedDataTransmitFifo(Ifx_QSPI *qspi, uint32 mixEntryVal)
Writes Data and Configuration into MIXEDENTRY register.
Definition: IfxQspi.h:1341
IfxQspi_clearRxReq
IFX_INLINE void IfxQspi_clearRxReq(Ifx_QSPI *qspi)
Clear RX service requests.
Definition: IfxQspi.h:978
IfxQspi_StrobeDelay_1
SLSO delay 1 cycle(s)
Definition: IfxQspi.h:238
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
IfxQspi_getAddress
IFX_EXTERN Ifx_QSPI * IfxQspi_getAddress(IfxQspi_Index qspi)
Definition: IfxQspi.c:276
IfxQspi_setMoveCounterInterruptBeforeLastFlag
IFX_INLINE void IfxQspi_setMoveCounterInterruptBeforeLastFlag(Ifx_QSPI *qspi, boolean setInterrupt)
set the interrupt before last flag
Definition: IfxQspi.h:1253
IfxQspi_setBitsegment1
IFX_INLINE void IfxQspi_setBitsegment1(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bitSegment1)
Set the value of bit segment1 (A).
Definition: IfxQspi.h:1202
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:322
IfxQspi_FifoMode
IfxQspi_FifoMode
Transmit FIFO mode.
Definition: IfxQspi.h:286
IfxQspi_writeBasicConfigurationBeginStream
IFX_INLINE void IfxQspi_writeBasicConfigurationBeginStream(Ifx_QSPI *qspi, uint32 baconVal)
Write configuration into BACON register with .LAST flag set to 0.
Definition: IfxQspi.h:1314
IfxQspi_initMtsrInPin
IFX_INLINE void IfxQspi_initMtsrInPin(const IfxQspi_Mtsr_In *mtsrIn, IfxPort_InputMode mtsrInMode)
Initializes a MTSR input.
Definition: IfxQspi.h:1119
IfxSrc.h
SRC basic functionality.
IfxQspi_PauseRunTransition_run
Request value for Run.
Definition: IfxQspi.h:173
IfxQspi_StrobeDelay_14
SLSO delay 14 cycle(s)
Definition: IfxQspi.h:251
IfxQspi_FifoMode_combinedMove
Combined Move Mode.
Definition: IfxQspi.h:288
IfxCpu_Intrinsics.h
IfxQspi_trail2InjectionEnabled
IFX_INLINE void IfxQspi_trail2InjectionEnabled(Ifx_QSPI *qspi, boolean trail2Enabled)
specifies whether to inject the trail2 from bacon configuration or mccon configuration registers ...
Definition: IfxQspi.h:1302
IfxQspi_ExpectTimeout_131072
Expect phse time out 131072.
Definition: IfxQspi.h:152
IfxQspi_PhaseTransitionEvent_endOfFrame
EOF (End of Frame)
Definition: IfxQspi.h:200
IfxQspi_ChannelId_10
Channel #10.
Definition: IfxQspi.h:106
IfxQspi_Phase_data
Frame data phase.
Definition: IfxQspi.h:184
IfxQspi_StrobeDelay_5
SLSO delay 5 cycle(s)
Definition: IfxQspi.h:242
IfxQspi_ChannelId_1
Channel #1.
Definition: IfxQspi.h:97
IfxQspi_getRxFifoMode
IFX_INLINE IfxQspi_FifoMode IfxQspi_getRxFifoMode(Ifx_QSPI *qspi)
Get the Receive FIFO mode.
Definition: IfxQspi.h:1074
IfxQspi_clearMoveCounterInterruptAfterLastFlag
IFX_INLINE void IfxQspi_clearMoveCounterInterruptAfterLastFlag(Ifx_QSPI *qspi, boolean clearInterrupt)
clear the interrupt after last flag
Definition: IfxQspi.h:966
IfxQspi_SleepMode
IfxQspi_SleepMode
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_QSPI.CLC.B.EDIS.
Definition: IfxQspi.h:228
IfxQspi_run
IFX_INLINE void IfxQspi_run(Ifx_QSPI *qspi)
Request for QSPI in Run state.
Definition: IfxQspi.h:1196
IfxQspi_setSleepMode
IFX_INLINE void IfxQspi_setSleepMode(Ifx_QSPI *qspi, IfxQspi_SleepMode mode)
Sets the disable module request.
Definition: IfxQspi.h:1277
IfxPort_setPinModeInput
IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode.
Definition: IfxPort.h:669
IfxQspi_calculateExtendedConfigurationValue
IFX_EXTERN uint32 IfxQspi_calculateExtendedConfigurationValue(Ifx_QSPI *qspi, const uint8 cs, const SpiIf_ChConfig *chConfig)
Function to calculate ECON register values.
Definition: IfxQspi.c:96
SpiIf.h
SPI interface types.
IfxQspi_Phase_trailStrobe
Frame trailstrobe phase.
Definition: IfxQspi.h:188
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxQspi_TxFifoInt_2
TxFifo Interrupt Threshold #2.
Definition: IfxQspi.h:277
IfxQspi_writeExtendedConfiguration
IFX_INLINE void IfxQspi_writeExtendedConfiguration(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 econVal)
Writes channel timing configuration into ECON register.
Definition: IfxQspi.h:1334
IfxQspi_Mrst_In::module
Ifx_QSPI * module
Base address.
Definition: IfxQspi_PinMap.h:58
IfxQspi_StrobeDelay_21
SLSO delay 21 cycle(s)
Definition: IfxQspi.h:258
IfxQspi_Phase_wait
Frame wait phase.
Definition: IfxQspi.h:180
IfxQspi_StrobeDelay_6
SLSO delay 6 cycle(s)
Definition: IfxQspi.h:243
IfxQspi_setEnableModuleRequest
IFX_INLINE void IfxQspi_setEnableModuleRequest(Ifx_QSPI *qspi)
Sets the enable module request.
Definition: IfxQspi.h:1229
IfxQspi_Mrst_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxQspi_PinMap.h:60
IfxQspi_enablePT2Event
IFX_INLINE void IfxQspi_enablePT2Event(Ifx_QSPI *qspi, boolean enable)
enable Phase Transition2 Event
Definition: IfxQspi.h:1016
IfxQspi_Slso_Out
SLSO pin mapping structure.
Definition: IfxQspi_PinMap.h:120
IfxQspi_calculateBasicConfigurationValue
IFX_EXTERN uint32 IfxQspi_calculateBasicConfigurationValue(Ifx_QSPI *qspi, const IfxQspi_ChannelId channelId, const SpiIf_ChMode *chMode, const float baudrate)
Function to calculate BACON register values.
Definition: IfxQspi.c:67
IfxQspi_readReceiveFifo
IFX_INLINE uint32 IfxQspi_readReceiveFifo(Ifx_QSPI *qspi)
Read the oldest data from RXFIFO.
Definition: IfxQspi.h:1184
IfxQspi_SuspendMode_hard
Hard Suspend.
Definition: IfxQspi.h:298
IfxQspi_Phase_idleA
Frame idleA phase.
Definition: IfxQspi.h:181
IfxQspi_ExpectTimeout_128
Expect phse time out 128.
Definition: IfxQspi.h:142
IfxQspi_RxFifoInt_1
RxFifo Interrupt Threshold #1.
Definition: IfxQspi.h:220
IfxQspi_setMoveCounterInterruptAfterLastEnabled
IFX_INLINE void IfxQspi_setMoveCounterInterruptAfterLastEnabled(Ifx_QSPI *qspi, boolean interruptEnabled)
Enable/Disable the Interrupt After last Byte.
Definition: IfxQspi.h:1235
IfxQspi_SuspendMode_none
No suspend.
Definition: IfxQspi.h:297
IfxQspi_setMoveCounterPrescalerTrailingDelay
IFX_INLINE void IfxQspi_setMoveCounterPrescalerTrailingDelay(Ifx_QSPI *qspi, const float baudrate)
Set the Trailing delay.
Definition: IfxQspi.h:1259
IfxQspi_SuspendMode
IfxQspi_SuspendMode
OCDS Suspend Control (OCDS.SUS)
Definition: IfxQspi.h:295
IfxQspi_StrobeDelay_25
SLSO delay 25 cycle(s)
Definition: IfxQspi.h:262
IfxQspi_getTimeQuantaFrequency
IFX_INLINE float IfxQspi_getTimeQuantaFrequency(Ifx_QSPI *qspi)
Gets Time Quanta frequency.
Definition: IfxQspi.h:1080
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxQspi_ChannelId
IfxQspi_ChannelId
QSPI channel Number (BACON.CS)
Definition: IfxQspi.h:94
IfxQspi_ExpectTimeout_1024
Expect phse time out 1024.
Definition: IfxQspi.h:145
IfxQspi_PauseRunTransition_pause
Request value for pause.
Definition: IfxQspi.h:172
IfxQspi_ChannelId_12
Channel #12.
Definition: IfxQspi.h:108
IfxQspi_Mtsr_Out
MTSR pin mapping structure.
Definition: IfxQspi_PinMap.h:104
IfxQspi_ChannelId_11
Channel #11.
Definition: IfxQspi.h:107
IfxQspi_setReceiveFifoInterrruptThreshold
IFX_INLINE void IfxQspi_setReceiveFifoInterrruptThreshold(Ifx_QSPI *qspi, IfxQspi_RxFifoInt rxFifoInt)
Set the threshold of RXFIFO for service request generation.
Definition: IfxQspi.h:1265
IfxQspi_SuspendMode_soft
Soft Suspend.
Definition: IfxQspi.h:299
IfxQspi_getTransmitSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxQspi_getTransmitSrc(Ifx_QSPI *qspi)
Gets the TXFIFO service request.
Definition: IfxQspi.h:1092
IfxQspi_Mtsr_In
MTSR pin mapping structure.
Definition: IfxQspi_PinMap.h:64
IfxQspi_Mrst_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxQspi_PinMap.h:100
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxQspi_StrobeDelay_31
SLSO delay 31 cycle(s)
Definition: IfxQspi.h:268
IfxQspi_RxFifoInt_0
RxFifo Interrupt Threshold #0.
Definition: IfxQspi.h:219
IfxQspi_PauseRunTransition
IfxQspi_PauseRunTransition
Request between pause and Run transition.
Definition: IfxQspi.h:170
IfxQspi_RxFifoInt
IfxQspi_RxFifoInt
Receive Fifo Interrupt Threshold.
Definition: IfxQspi.h:217
IfxQspi_Phase_leadStrobe
Frame leadstrobe phase.
Definition: IfxQspi.h:187
IfxQspi_Mrst_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxQspi_PinMap.h:59
IfxQspi_TxFifoInt
IfxQspi_TxFifoInt
Transmit Fifo Interrupt Threshold.
Definition: IfxQspi.h:274
IfxQspi_ExpectTimeout_16384
Expect phse time out 16384.
Definition: IfxQspi.h:149
IfxQspi_permutateBigEndian
IFX_INLINE void IfxQspi_permutateBigEndian(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bigEndian)
Permutate bytes to / from Big Endian.
Definition: IfxQspi.h:1177
IfxQspi_Phase_trail
Frame trail phase.
Definition: IfxQspi.h:185
IfxQspi_StrobeDelay_15
SLSO delay 15 cycle(s)
Definition: IfxQspi.h:252
IfxQspi_initSclkInPin
IFX_INLINE void IfxQspi_initSclkInPin(const IfxQspi_Sclk_In *sclkIn, IfxPort_InputMode sclkInMode)
Initializes a SCLK input.
Definition: IfxQspi.h:1133
IfxQspi_Phase_expect
Frame expect phase.
Definition: IfxQspi.h:186
IfxQspi_getReceiveFifoLevel
IFX_INLINE uint8 IfxQspi_getReceiveFifoLevel(Ifx_QSPI *qspi)
Gets the filling level of RXFIFO.
Definition: IfxQspi.h:1061
IfxQspi_PhaseTransitionEvent_endOfExpect
CONT (End of EXPECT phase)
Definition: IfxQspi.h:202
IfxQspi_ChannelId_9
Channel #9.
Definition: IfxQspi.h:105
IfxQspi_setMoveCounterInterruptAfterLastFlag
IFX_INLINE void IfxQspi_setMoveCounterInterruptAfterLastFlag(Ifx_QSPI *qspi, boolean setInterrupt)
Set the Interrupt after last flag.
Definition: IfxQspi.h:1241
IfxQspi_initMtsrOutPin
IFX_INLINE void IfxQspi_initMtsrOutPin(const IfxQspi_Mtsr_Out *mtsrOut, IfxPort_OutputMode mtsrOutMode, IfxPort_PadDriver padDriver)
Initializes a MTSR output.
Definition: IfxQspi.h:1126
IfxQspi_write32
IFX_EXTERN void IfxQspi_write32(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 *data, Ifx_SizeT count)
Writes 32bit data into the Tx FIFO.
Definition: IfxQspi.c:425
IfxQspi_Error_txfifoUnderflow
TX FIFO Underflow Error.
Definition: IfxQspi.h:130
IfxQspi_StrobeDelay_17
SLSO delay 17 cycle(s)
Definition: IfxQspi.h:254
IfxQspi_getPhase
IFX_INLINE IfxQspi_Phase IfxQspi_getPhase(Ifx_QSPI *qspi)
Gets actual transmission phase.
Definition: IfxQspi.h:1055
IfxQspi_clearMoveCounterInterruptBeforeLastFlag
IFX_INLINE void IfxQspi_clearMoveCounterInterruptBeforeLastFlag(Ifx_QSPI *qspi, boolean clearInterrupt)
Clear the Interrupt before last flag.
Definition: IfxQspi.h:972
IfxQspi_StrobeDelay_13
SLSO delay 13 cycle(s)
Definition: IfxQspi.h:250
IfxQspi_initSclkOutPin
IFX_INLINE void IfxQspi_initSclkOutPin(const IfxQspi_Sclk_Out *sclkOut, IfxPort_OutputMode sclkOutMode, IfxPort_PadDriver padDriver)
Initializes a SCLK output.
Definition: IfxQspi.h:1140
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:249
IfxQspi_setSlaveSelectOutputControl
IFX_EXTERN void IfxQspi_setSlaveSelectOutputControl(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, boolean outputEnable, boolean activeLevel)
Configures a Slave Select Output.
Definition: IfxQspi.c:383
IfxQspi_getReceiveSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxQspi_getReceiveSrc(Ifx_QSPI *qspi)
Gets the RXFIFO service request.
Definition: IfxQspi.h:1067
IfxQspi_initSlsi
IFX_INLINE void IfxQspi_initSlsi(const IfxQspi_Slsi_In *slsi, IfxPort_InputMode slsiMode)
Initializes a SLSI input.
Definition: IfxQspi.h:1147
IfxQspi_StrobeDelay_32
SLSO delay 32 cycle(s)
Definition: IfxQspi.h:269
IfxQspi_Mode_slave
QSPI in "slave" mode.
Definition: IfxQspi.h:165
IfxQspi_Mrst_In
MRST pin mapping structure.
Definition: IfxQspi_PinMap.h:56
SpiIf_ChMode
Definition: SpiIf.h:186
IfxQspi_getTxFifoMode
IFX_INLINE IfxQspi_FifoMode IfxQspi_getTxFifoMode(Ifx_QSPI *qspi)
Get the Transfer FIFO mode.
Definition: IfxQspi.h:1099
IfxQspi_ExpectTimeout_524288
Expect phse time out 524288.
Definition: IfxQspi.h:154
IfxQspi_DelayConst::pre
uint8 pre
specifies the prescalar value
Definition: IfxQspi.h:311
IfxQspi_SleepMode_disable
Sleep Mode disabled.
Definition: IfxQspi.h:231
IfxQspi_Phase
IfxQspi_Phase
QSPI frame phase (STATUS.PHASE)
Definition: IfxQspi.h:178
IfxQspi_PhaseTransitionEvent_dataNotAvailable
DNA (Data not Available = Start of Expect)
Definition: IfxQspi.h:201
IfxQspi_ChannelId_3
Channel #3.
Definition: IfxQspi.h:99
IfxQspi_ChannelId_4
Channel #4.
Definition: IfxQspi.h:100
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:151
IfxQspi_PhaseTransitionEvent_transmitBufferEmptied
TBE (Transmit Buffer Emptied)
Definition: IfxQspi.h:198
IfxQspi_isModuleSuspended
IFX_INLINE boolean IfxQspi_isModuleSuspended(Ifx_QSPI *qspi)
Returns the module&#39;s suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspende...
Definition: IfxQspi.h:1353
IfxQspi_setTimeQuantum
IFX_INLINE void IfxQspi_setTimeQuantum(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 timeQuantum)
Set the value of Time Quantum.
Definition: IfxQspi.h:1283
IfxQspi_getErrorSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxQspi_getErrorSrc(Ifx_QSPI *qspi)
Gets the Error request value.
Definition: IfxQspi.h:1034
IfxQspi_ChannelId_14
Channel #14.
Definition: IfxQspi.h:110
IfxQspi_ChannelId_8
Channel #8.
Definition: IfxQspi.h:104
IfxQspi_ChannelId_2
Channel #2.
Definition: IfxQspi.h:98
IfxQspi_pause
IFX_INLINE void IfxQspi_pause(Ifx_QSPI *qspi)
Request for Module in Pause state no interrupts no communication.
Definition: IfxQspi.h:1168
IfxQspi_StrobeDelay_22
SLSO delay 22 cycle(s)
Definition: IfxQspi.h:259
IfxQspi_Reset_none
No Reset.
Definition: IfxQspi.h:209
IfxQspi_read32
IFX_EXTERN void IfxQspi_read32(Ifx_QSPI *qspi, uint32 *data, Ifx_SizeT count)
Reads 32bit data from the Rx FIFO.
Definition: IfxQspi.c:325
IfxQspi_setTxFifoMode
IFX_INLINE void IfxQspi_setTxFifoMode(Ifx_QSPI *qspi, IfxQspi_FifoMode mode)
Set the transfer FIFO mode.
Definition: IfxQspi.h:1296
IfxQspi_StrobeDelay_28
SLSO delay 28 cycle(s)
Definition: IfxQspi.h:265
IfxQspi_PhaseTransitionEvent_serialClockPolarityChange
SCLKPC (serial clock polarity change)
Definition: IfxQspi.h:196
IfxQspi_StrobeDelay_20
SLSO delay 20 cycle(s)
Definition: IfxQspi.h:257
IfxQspi_enableLoopbackMode
IFX_INLINE void IfxQspi_enableLoopbackMode(Ifx_QSPI *qspi, boolean enable)
Enable/Disable Loopback mode.
Definition: IfxQspi.h:1002
IfxQspi_calculateTimeQuantumLength
IFX_EXTERN uint32 IfxQspi_calculateTimeQuantumLength(Ifx_QSPI *qspi, float maxBaudrate)
Specifies the function to calculate Time quantum length.
Definition: IfxQspi.c:233
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxQspi_StrobeDelay_11
SLSO delay 11 cycle(s)
Definition: IfxQspi.h:248
IfxQspi_StrobeDelay_2
SLSO delay 2 cycle(s)
Definition: IfxQspi.h:239
IfxQspi_getModuleFrequency
IFX_INLINE float IfxQspi_getModuleFrequency(Ifx_QSPI *qspi)
Specifies function to get module frequency.
Definition: IfxQspi.h:1047
IfxQspi_ChannelId_6
Channel #6.
Definition: IfxQspi.h:102
IfxQspi_Mode_pwmOverQspi
QSPI in "PWM over QSPI" mode.
Definition: IfxQspi.h:164
IfxQspi_ExpectTimeout_65536
Expect phse time out 65536.
Definition: IfxQspi.h:151
IfxQspi_PinMap.h
QSPI I/O map.
IfxQspi_setBitsegment2
IFX_INLINE void IfxQspi_setBitsegment2(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bitSegment2)
Set the value of bit segment2 (B).
Definition: IfxQspi.h:1209
IfxQspi_TxFifoInt_3
TxFifo Interrupt Threshold #3.
Definition: IfxQspi.h:278
IfxQspi_TxFifoInt_4
TxFifo Interrupt Threshold #4.
Definition: IfxQspi.h:279
IfxQspi_requestReset
IFX_INLINE void IfxQspi_requestReset(Ifx_QSPI *qspi, IfxQspi_Reset reset)
Request reset (State Machine & FIFO / Register / Module)
Definition: IfxQspi.h:1190
IfxQspi_StrobeDelay_3
SLSO delay 3 cycle(s)
Definition: IfxQspi.h:240
IfxQspi_configPT1Event
IFX_INLINE void IfxQspi_configPT1Event(Ifx_QSPI *qspi, IfxQspi_PhaseTransitionEvent pt1Config)
Configure PT1 event (also USR event depending if USREN=1 )
Definition: IfxQspi.h:990
IfxQspi_DelayConst
Structure holding the "pre" and "delay" values. To be populated into BACON register after delay calcu...
Definition: IfxQspi.h:309
IfxQspi_setRxFifoMode
IFX_INLINE void IfxQspi_setRxFifoMode(Ifx_QSPI *qspi, IfxQspi_FifoMode mode)
Definition: IfxQspi.h:1271
IfxScuCcu.h
SCU basic functionality.
IfxQspi_initMrstInPin
IFX_INLINE void IfxQspi_initMrstInPin(const IfxQspi_Mrst_In *mrstIn, IfxPort_InputMode mrstInMode)
Initializes a MRST input.
Definition: IfxQspi.h:1105
IfxQspi_ChannelId_5
Channel #5.
Definition: IfxQspi.h:101
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:81
IfxQspi_initMrstInPinWithPadLevel
IFX_INLINE void IfxQspi_initMrstInPinWithPadLevel(const IfxQspi_Mrst_In *mrstIn, IfxPort_InputMode mrstInMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of MRSTIN pin direction as input and configuring pad driver...
Definition: IfxQspi.h:1376
IfxQspi_clearAllEventFlags
IFX_INLINE void IfxQspi_clearAllEventFlags(Ifx_QSPI *qspi)
Clear ALL service requests.
Definition: IfxQspi.h:960
enable
void enable
Definition: IfxCpu_IntrinsicsDcc.h:477
IfxQspi_writeTransmitFifo
IFX_INLINE void IfxQspi_writeTransmitFifo(Ifx_QSPI *qspi, uint32 data)
Write Data into DATAENTRY register.
Definition: IfxQspi.h:1347
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:248
IfxQspi_Mode_master
QSPI in "master" mode.
Definition: IfxQspi.h:163
IfxQspi_StrobeDelay_8
SLSO delay 8 cycle(s)
Definition: IfxQspi.h:245
IfxQspi_initSclkInPinWithPadLevel
IFX_INLINE void IfxQspi_initSclkInPinWithPadLevel(const IfxQspi_Sclk_In *sclkIn, IfxPort_InputMode sclkInMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of SCLKIN pin direction as input and configuring pad driver...
Definition: IfxQspi.h:1392
IfxQspi_StrobeDelay_24
SLSO delay 24 cycle(s)
Definition: IfxQspi.h:261
IfxQspi_writeBasicConfigurationEndStream
IFX_INLINE void IfxQspi_writeBasicConfigurationEndStream(Ifx_QSPI *qspi, uint32 baconVal)
Write configuration into BACON register with .LAST flag set to 1.
Definition: IfxQspi.h:1324
IfxQspi_StrobeDelay_23
SLSO delay 23 cycle(s)
Definition: IfxQspi.h:260
IfxQspi_Error_expectTimeout
EXPECT Timeout Error.
Definition: IfxQspi.h:133
IfxQspi_ExpectTimeout_256
Expect phse time out 256.
Definition: IfxQspi.h:143
IfxQspi_calculatePrescaler
IFX_EXTERN uint32 IfxQspi_calculatePrescaler(Ifx_QSPI *qspi, float baudrate)
Function to calculate prescaler.
Definition: IfxQspi.c:209
IfxQspi_initMrstOutPin
IFX_INLINE void IfxQspi_initMrstOutPin(const IfxQspi_Mrst_Out *mrstOut, IfxPort_OutputMode mrstOutMode, IfxPort_PadDriver padDriver)
Initializes a MRST output.
Definition: IfxQspi.h:1112
IfxQspi_DelayConst::delay
uint8 delay
delay multiplier
Definition: IfxQspi.h:312
IfxQspi_ExpectTimeout_4096
Expect phse time out 4096.
Definition: IfxQspi.h:147
IfxQspi_Error_configuration
Configuration Error.
Definition: IfxQspi.h:127
IfxQspi_cfg.h
QSPI on-chip implementation data.
IfxQspi_RxFifoInt_2
RxFifo Interrupt Threshold #2.
Definition: IfxQspi.h:221
IfxQspi_StrobeDelay_30
SLSO delay 30 cycle(s)
Definition: IfxQspi.h:267
IfxQspi_ExpectTimeout_1048576
Expect phse time out 1048576.
Definition: IfxQspi.h:155
IfxQspi_initSlso
IFX_INLINE void IfxQspi_initSlso(const IfxQspi_Slso_Out *slso, IfxPort_OutputMode slsoMode, IfxPort_PadDriver padDriver, IfxPort_OutputIdx outIndex)
Initializes a SLSO output.
Definition: IfxQspi.h:1155
IfxQspi_Reset
IfxQspi_Reset
Reset Request (GLOBALCON.RESETS)
Definition: IfxQspi.h:207
IfxQspi_PhaseTransitionEvent_receiveBufferFilled
RBF (Receive Buffer Filled)
Definition: IfxQspi.h:199
IfxQspi_write8
IFX_EXTERN void IfxQspi_write8(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 *data, Ifx_SizeT count)
Writes 8bit data into the Tx FIFO.
Definition: IfxQspi.c:438
IfxQspi_writeBasicConfiguration
IFX_INLINE void IfxQspi_writeBasicConfiguration(Ifx_QSPI *qspi, uint32 baconVal)
Write configuration into BACON register.
Definition: IfxQspi.h:1308
IfxQspi_setMoveCounterInterruptBeforeLastEnabled
IFX_INLINE void IfxQspi_setMoveCounterInterruptBeforeLastEnabled(Ifx_QSPI *qspi, boolean interruptEnabled)
Enable the interrupt before last byte.
Definition: IfxQspi.h:1247
IfxQspi_Phase_idleB
frame idleB phase
Definition: IfxQspi.h:182
IfxQspi_setBitsegment3
IFX_INLINE void IfxQspi_setBitsegment3(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bitSegment3)
Set the value of bit segment3 (C).
Definition: IfxQspi.h:1216
IfxScuCcu_getQspiFrequency
float32 IfxScuCcu_getQspiFrequency(void)
API to get Qspi divider frequency. This API returns the based on the divider value in CCUCON register...
Definition: IfxScuCcu.c:406
IfxQspi_StrobeDelay_19
SLSO delay 19 cycle(s)
Definition: IfxQspi.h:256
IfxQspi_getTransmitFifoLevel
IFX_INLINE uint8 IfxQspi_getTransmitFifoLevel(Ifx_QSPI *qspi)
Gets the filling level of TXFIFO.
Definition: IfxQspi.h:1086
IfxQspi_Error_none
No Error.
Definition: IfxQspi.h:125
IfxQspi_StrobeDelay_26
SLSO delay 26 cycle(s)
Definition: IfxQspi.h:263
IfxQspi_recalcBasicConfiguration
IFX_EXTERN uint32 IfxQspi_recalcBasicConfiguration(uint32 oldBACON, Ifx_SizeT numOfData, boolean shortData, boolean lastData)
Re-calculated BACON from the oldBACON.
Definition: IfxQspi.c:349
IfxQspi_Error_slsiMisplacedInactivation
SLSI misplaced inactivation (slave mode)
Definition: IfxQspi.h:134
IfxQspi_configPT2Event
IFX_INLINE void IfxQspi_configPT2Event(Ifx_QSPI *qspi, IfxQspi_PhaseTransitionEvent pt2Config)
Configure PT2 event.
Definition: IfxQspi.h:996
IfxQspi_Reset_stateMachineAndFifo
State Machine, TXFIFO and RXFIFO reset, registers not reseted.
Definition: IfxQspi.h:210
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxQspi_Mode
IfxQspi_Mode
QSPI controller mode (GLOBALCON.MODE)
Definition: IfxQspi.h:161
IfxQspi_isModuleEnabled
IFX_INLINE boolean IfxQspi_isModuleEnabled(Ifx_QSPI *qspi)
Specifies the Module enable or disable status.
Definition: IfxQspi.h:1162
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
IfxQspi_setTransmitFifoInterrruptThreshold
IFX_INLINE void IfxQspi_setTransmitFifoInterrruptThreshold(Ifx_QSPI *qspi, IfxQspi_TxFifoInt txFifoInt)
Set the threshold of TXFIFO for service request generation.
Definition: IfxQspi.h:1290
IfxQspi_SleepMode_enable
Sleep Mode enabled.
Definition: IfxQspi.h:230
IfxQspi_ExpectTimeout_262144
Expect phse time out 262144.
Definition: IfxQspi.h:153
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxQspi_StrobeDelay_16
SLSO delay 16 cycle(s)
Definition: IfxQspi.h:253
IfxQspi_Reset_registers
Registers Reset.
Definition: IfxQspi.h:211
IfxQspi_StrobeDelay_10
SLSO delay 10 cycle(s)
Definition: IfxQspi.h:247
IfxQspi_StrobeDelay_12
SLSO delay 12 cycle(s)
Definition: IfxQspi.h:249
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:675
IfxQspi_ChannelId_13
Channel #13.
Definition: IfxQspi.h:109
IfxQspi_Reset_kernel
Kernel / Module Reset.
Definition: IfxQspi.h:212
IfxQspi_StrobeDelay_29
SLSO delay 29 cycle(s)
Definition: IfxQspi.h:266
IfxQspi_DataLengthUnit_byte
Data length in Bytes.
Definition: IfxQspi.h:118
IfxQspi_setSuspendMode
IFX_INLINE void IfxQspi_setSuspendMode(Ifx_QSPI *qspi, IfxQspi_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and...
Definition: IfxQspi.h:1365
IfxQspi_StrobeDelay_4
SLSO delay 4 cycle(s)
Definition: IfxQspi.h:241
IfxQspi_PhaseTransitionEvent_startOfFrame
SOF (Start Of Frame )
Definition: IfxQspi.h:197
IfxQspi_StrobeDelay
IfxQspi_StrobeDelay
STROBE delay for SLSO in delayed mode (GLOBALCON.STROBE)
Definition: IfxQspi.h:236
IfxQspi_StrobeDelay_27
SLSO delay 27 cycle(s)
Definition: IfxQspi.h:264
IfxQspi_enableUsrEvent
IFX_INLINE void IfxQspi_enableUsrEvent(Ifx_QSPI *qspi, boolean enable)
enable User Event (Event selected by PT1)
Definition: IfxQspi.h:1022
IfxQspi_RxFifoInt_3
RxFifo Interrupt Threshold #3.
Definition: IfxQspi.h:222
IfxQspi_ExpectTimeout_32768
Expect phse time out 32768.
Definition: IfxQspi.h:150
IfxQspi_initSlsiWithPadLevel
IFX_INLINE void IfxQspi_initSlsiWithPadLevel(const IfxQspi_Slsi_In *slsi, IfxPort_InputMode slsiMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of SLSI pin direction as input and configuring pad driver...
Definition: IfxQspi.h:1400
IfxQspi_ExpectTimeout
IfxQspi_ExpectTimeout
Frame Expect phase time out value.
Definition: IfxQspi.h:139
IfxQspi_StrobeDelay_18
SLSO delay 18 cycle(s)
Definition: IfxQspi.h:255
IfxQspi_ChannelId_0
Channel #0.
Definition: IfxQspi.h:96


iLLD_TC38A: IfxQspi_PinMap.c Source File

  • _PinMap
IfxQspi_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxQspi_PinMap.c
3 * \brief QSPI I/O map
4 * \ingroup IfxLld_Qspi
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "IfxQspi_PinMap.h"
44
45 IfxQspi_Mrst_In IfxQspi0_MRSTA_P20_12_IN = {&MODULE_QSPI0, {&MODULE_P20,12}, Ifx_RxSel_a};
46 IfxQspi_Mrst_In IfxQspi0_MRSTB_P22_9_IN = {&MODULE_QSPI0, {&MODULE_P22, 9}, Ifx_RxSel_b};
47 IfxQspi_Mrst_In IfxQspi0_MRSTC_P22_6_IN = {&MODULE_QSPI0, {&MODULE_P22, 6}, Ifx_RxSel_c};
48 IfxQspi_Mrst_In IfxQspi1_MRSTA_P10_1_IN = {&MODULE_QSPI1, {&MODULE_P10, 1}, Ifx_RxSel_a};
49 IfxQspi_Mrst_In IfxQspi1_MRSTB_P11_3_IN = {&MODULE_QSPI1, {&MODULE_P11, 3}, Ifx_RxSel_b};
50 IfxQspi_Mrst_In IfxQspi2_MRSTA_P15_4_IN = {&MODULE_QSPI2, {&MODULE_P15, 4}, Ifx_RxSel_a};
51 IfxQspi_Mrst_In IfxQspi2_MRSTB_P15_7_IN = {&MODULE_QSPI2, {&MODULE_P15, 7}, Ifx_RxSel_b};
52 IfxQspi_Mrst_In IfxQspi2_MRSTCN_P21_2_IN = {&MODULE_QSPI2, {&MODULE_P21, 2}, Ifx_RxSel_c};
53 IfxQspi_Mrst_In IfxQspi2_MRSTCP_P21_3_IN = {&MODULE_QSPI2, {&MODULE_P21, 3}, Ifx_RxSel_c};
54 IfxQspi_Mrst_In IfxQspi2_MRSTD_P34_4_IN = {&MODULE_QSPI2, {&MODULE_P34, 4}, Ifx_RxSel_d};
55 IfxQspi_Mrst_In IfxQspi2_MRSTE_P15_2_IN = {&MODULE_QSPI2, {&MODULE_P15, 2}, Ifx_RxSel_e};
56 IfxQspi_Mrst_In IfxQspi2_MRSTFN_P14_9_IN = {&MODULE_QSPI2, {&MODULE_P14, 9}, Ifx_RxSel_f};
57 IfxQspi_Mrst_In IfxQspi2_MRSTFP_P14_10_IN = {&MODULE_QSPI2, {&MODULE_P14,10}, Ifx_RxSel_f};
58 IfxQspi_Mrst_In IfxQspi3_MRSTA_P02_5_IN = {&MODULE_QSPI3, {&MODULE_P02, 5}, Ifx_RxSel_a};
59 IfxQspi_Mrst_In IfxQspi3_MRSTB_P10_7_IN = {&MODULE_QSPI3, {&MODULE_P10, 7}, Ifx_RxSel_b};
60 IfxQspi_Mrst_In IfxQspi3_MRSTC_P01_5_IN = {&MODULE_QSPI3, {&MODULE_P01, 5}, Ifx_RxSel_c};
61 IfxQspi_Mrst_In IfxQspi4_MRSTA_P33_13_IN = {&MODULE_QSPI4, {&MODULE_P33,13}, Ifx_RxSel_a};
62 IfxQspi_Mrst_In IfxQspi4_MRSTB_P22_1_IN = {&MODULE_QSPI4, {&MODULE_P22, 1}, Ifx_RxSel_b};
63 IfxQspi_Mrst_In IfxQspi4_MRSTCN_P21_2_IN = {&MODULE_QSPI4, {&MODULE_P21, 2}, Ifx_RxSel_c};
64 IfxQspi_Mrst_In IfxQspi4_MRSTCP_P21_3_IN = {&MODULE_QSPI4, {&MODULE_P21, 3}, Ifx_RxSel_c};
65 IfxQspi_Mrst_In IfxQspi4_MRSTDN_P21_0_IN = {&MODULE_QSPI4, {&MODULE_P21, 0}, Ifx_RxSel_d};
66 IfxQspi_Mrst_In IfxQspi4_MRSTDP_P21_1_IN = {&MODULE_QSPI4, {&MODULE_P21, 1}, Ifx_RxSel_d};
67 IfxQspi_Mrst_Out IfxQspi0_MRST_P20_12_OUT = {&MODULE_QSPI0, {&MODULE_P20,12}, IfxPort_OutputIdx_alt3};
68 IfxQspi_Mrst_Out IfxQspi0_MRST_P22_6_OUT = {&MODULE_QSPI0, {&MODULE_P22, 6}, IfxPort_OutputIdx_alt4};
69 IfxQspi_Mrst_Out IfxQspi0_MRST_P22_9_OUT = {&MODULE_QSPI0, {&MODULE_P22, 9}, IfxPort_OutputIdx_alt4};
70 IfxQspi_Mrst_Out IfxQspi1_MRST_P10_1_OUT = {&MODULE_QSPI1, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt3};
71 IfxQspi_Mrst_Out IfxQspi1_MRST_P10_6_OUT = {&MODULE_QSPI1, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt6};
72 IfxQspi_Mrst_Out IfxQspi1_MRST_P11_3_OUT = {&MODULE_QSPI1, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt3};
73 IfxQspi_Mrst_Out IfxQspi2_MRST_P15_4_OUT = {&MODULE_QSPI2, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt3};
74 IfxQspi_Mrst_Out IfxQspi2_MRST_P15_7_OUT = {&MODULE_QSPI2, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt3};
75 IfxQspi_Mrst_Out IfxQspi2_MRST_P34_4_OUT = {&MODULE_QSPI2, {&MODULE_P34, 4}, IfxPort_OutputIdx_alt4};
76 IfxQspi_Mrst_Out IfxQspi3_MRST_P01_5_OUT = {&MODULE_QSPI3, {&MODULE_P01, 5}, IfxPort_OutputIdx_alt4};
77 IfxQspi_Mrst_Out IfxQspi3_MRST_P02_5_OUT = {&MODULE_QSPI3, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt3};
78 IfxQspi_Mrst_Out IfxQspi3_MRST_P10_7_OUT = {&MODULE_QSPI3, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt3};
79 IfxQspi_Mrst_Out IfxQspi4_MRST_P22_1_OUT = {&MODULE_QSPI4, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt3};
80 IfxQspi_Mrst_Out IfxQspi4_MRST_P33_13_OUT = {&MODULE_QSPI4, {&MODULE_P33,13}, IfxPort_OutputIdx_alt3};
81 IfxQspi_Mtsr_In IfxQspi0_MTSRA_P20_14_IN = {&MODULE_QSPI0, {&MODULE_P20,14}, Ifx_RxSel_a};
82 IfxQspi_Mtsr_In IfxQspi0_MTSRB_P22_10_IN = {&MODULE_QSPI0, {&MODULE_P22,10}, Ifx_RxSel_b};
83 IfxQspi_Mtsr_In IfxQspi0_MTSRC_P22_5_IN = {&MODULE_QSPI0, {&MODULE_P22, 5}, Ifx_RxSel_c};
84 IfxQspi_Mtsr_In IfxQspi1_MTSRA_P10_3_IN = {&MODULE_QSPI1, {&MODULE_P10, 3}, Ifx_RxSel_a};
85 IfxQspi_Mtsr_In IfxQspi1_MTSRB_P11_9_IN = {&MODULE_QSPI1, {&MODULE_P11, 9}, Ifx_RxSel_b};
86 IfxQspi_Mtsr_In IfxQspi1_MTSRC_P10_4_IN = {&MODULE_QSPI1, {&MODULE_P10, 4}, Ifx_RxSel_c};
87 IfxQspi_Mtsr_In IfxQspi2_MTSRA_P15_5_IN = {&MODULE_QSPI2, {&MODULE_P15, 5}, Ifx_RxSel_a};
88 IfxQspi_Mtsr_In IfxQspi2_MTSRB_P15_6_IN = {&MODULE_QSPI2, {&MODULE_P15, 6}, Ifx_RxSel_b};
89 IfxQspi_Mtsr_In IfxQspi2_MTSRD_P34_5_IN = {&MODULE_QSPI2, {&MODULE_P34, 5}, Ifx_RxSel_d};
90 IfxQspi_Mtsr_In IfxQspi3_MTSRA_P02_6_IN = {&MODULE_QSPI3, {&MODULE_P02, 6}, Ifx_RxSel_a};
91 IfxQspi_Mtsr_In IfxQspi3_MTSRB_P10_6_IN = {&MODULE_QSPI3, {&MODULE_P10, 6}, Ifx_RxSel_b};
92 IfxQspi_Mtsr_In IfxQspi3_MTSRC_P01_6_IN = {&MODULE_QSPI3, {&MODULE_P01, 6}, Ifx_RxSel_c};
93 IfxQspi_Mtsr_In IfxQspi4_MTSRA_P33_12_IN = {&MODULE_QSPI4, {&MODULE_P33,12}, Ifx_RxSel_a};
94 IfxQspi_Mtsr_In IfxQspi4_MTSRB_P22_0_IN = {&MODULE_QSPI4, {&MODULE_P22, 0}, Ifx_RxSel_b};
95 IfxQspi_Mtsr_Out IfxQspi0_MTSR_P20_12_OUT = {&MODULE_QSPI0, {&MODULE_P20,12}, IfxPort_OutputIdx_alt4};
96 IfxQspi_Mtsr_Out IfxQspi0_MTSR_P20_14_OUT = {&MODULE_QSPI0, {&MODULE_P20,14}, IfxPort_OutputIdx_alt3};
97 IfxQspi_Mtsr_Out IfxQspi0_MTSR_P22_10_OUT = {&MODULE_QSPI0, {&MODULE_P22,10}, IfxPort_OutputIdx_alt4};
98 IfxQspi_Mtsr_Out IfxQspi0_MTSR_P22_5_OUT = {&MODULE_QSPI0, {&MODULE_P22, 5}, IfxPort_OutputIdx_alt4};
99 IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_1_OUT = {&MODULE_QSPI1, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt2};
100 IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_3_OUT = {&MODULE_QSPI1, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt3};
101 IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_4_OUT = {&MODULE_QSPI1, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt4};
102 IfxQspi_Mtsr_Out IfxQspi1_MTSR_P11_9_OUT = {&MODULE_QSPI1, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt3};
103 IfxQspi_Mtsr_Out IfxQspi2_MTSRN_P13_2_OUT = {&MODULE_QSPI2, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt3};
104 IfxQspi_Mtsr_Out IfxQspi2_MTSRP_P13_3_OUT = {&MODULE_QSPI2, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt3};
105 IfxQspi_Mtsr_Out IfxQspi2_MTSR_P15_5_OUT = {&MODULE_QSPI2, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt3};
106 IfxQspi_Mtsr_Out IfxQspi2_MTSR_P15_6_OUT = {&MODULE_QSPI2, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt3};
107 IfxQspi_Mtsr_Out IfxQspi2_MTSR_P34_5_OUT = {&MODULE_QSPI2, {&MODULE_P34, 5}, IfxPort_OutputIdx_alt4};
108 IfxQspi_Mtsr_Out IfxQspi3_MTSR_P01_6_OUT = {&MODULE_QSPI3, {&MODULE_P01, 6}, IfxPort_OutputIdx_alt4};
109 IfxQspi_Mtsr_Out IfxQspi3_MTSR_P02_6_OUT = {&MODULE_QSPI3, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt3};
110 IfxQspi_Mtsr_Out IfxQspi3_MTSR_P10_6_OUT = {&MODULE_QSPI3, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt3};
111 IfxQspi_Mtsr_Out IfxQspi4_MTSRN_P22_2_OUT = {&MODULE_QSPI4, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt4};
112 IfxQspi_Mtsr_Out IfxQspi4_MTSRP_P22_3_OUT = {&MODULE_QSPI4, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt4};
113 IfxQspi_Mtsr_Out IfxQspi4_MTSR_P22_0_OUT = {&MODULE_QSPI4, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt3};
114 IfxQspi_Mtsr_Out IfxQspi4_MTSR_P33_12_OUT = {&MODULE_QSPI4, {&MODULE_P33,12}, IfxPort_OutputIdx_alt3};
115 IfxQspi_Sclk_In IfxQspi0_SCLKA_P20_11_IN = {&MODULE_QSPI0, {&MODULE_P20,11}, Ifx_RxSel_a};
116 IfxQspi_Sclk_In IfxQspi0_SCLKB_P22_8_IN = {&MODULE_QSPI0, {&MODULE_P22, 8}, Ifx_RxSel_b};
117 IfxQspi_Sclk_In IfxQspi0_SCLKC_P22_7_IN = {&MODULE_QSPI0, {&MODULE_P22, 7}, Ifx_RxSel_c};
118 IfxQspi_Sclk_In IfxQspi1_SCLKA_P10_2_IN = {&MODULE_QSPI1, {&MODULE_P10, 2}, Ifx_RxSel_a};
119 IfxQspi_Sclk_In IfxQspi1_SCLKB_P11_6_IN = {&MODULE_QSPI1, {&MODULE_P11, 6}, Ifx_RxSel_b};
120 IfxQspi_Sclk_In IfxQspi2_SCLKA_P15_3_IN = {&MODULE_QSPI2, {&MODULE_P15, 3}, Ifx_RxSel_a};
121 IfxQspi_Sclk_In IfxQspi2_SCLKB_P15_8_IN = {&MODULE_QSPI2, {&MODULE_P15, 8}, Ifx_RxSel_b};
122 IfxQspi_Sclk_In IfxQspi2_SCLKD_P33_14_IN = {&MODULE_QSPI2, {&MODULE_P33,14}, Ifx_RxSel_d};
123 IfxQspi_Sclk_In IfxQspi3_SCLKA_P02_7_IN = {&MODULE_QSPI3, {&MODULE_P02, 7}, Ifx_RxSel_a};
124 IfxQspi_Sclk_In IfxQspi3_SCLKB_P10_8_IN = {&MODULE_QSPI3, {&MODULE_P10, 8}, Ifx_RxSel_b};
125 IfxQspi_Sclk_In IfxQspi3_SCLKC_P01_7_IN = {&MODULE_QSPI3, {&MODULE_P01, 7}, Ifx_RxSel_c};
126 IfxQspi_Sclk_In IfxQspi4_SCLKA_P33_11_IN = {&MODULE_QSPI4, {&MODULE_P33,11}, Ifx_RxSel_a};
127 IfxQspi_Sclk_In IfxQspi4_SCLKB_P22_3_IN = {&MODULE_QSPI4, {&MODULE_P22, 3}, Ifx_RxSel_b};
128 IfxQspi_Sclk_Out IfxQspi0_SCLK_P20_11_OUT = {&MODULE_QSPI0, {&MODULE_P20,11}, IfxPort_OutputIdx_alt3};
129 IfxQspi_Sclk_Out IfxQspi0_SCLK_P20_13_OUT = {&MODULE_QSPI0, {&MODULE_P20,13}, IfxPort_OutputIdx_alt5};
130 IfxQspi_Sclk_Out IfxQspi0_SCLK_P22_7_OUT = {&MODULE_QSPI0, {&MODULE_P22, 7}, IfxPort_OutputIdx_alt4};
131 IfxQspi_Sclk_Out IfxQspi0_SCLK_P22_8_OUT = {&MODULE_QSPI0, {&MODULE_P22, 8}, IfxPort_OutputIdx_alt4};
132 IfxQspi_Sclk_Out IfxQspi1_SCLK_P10_2_OUT = {&MODULE_QSPI1, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt3};
133 IfxQspi_Sclk_Out IfxQspi1_SCLK_P11_6_OUT = {&MODULE_QSPI1, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt3};
134 IfxQspi_Sclk_Out IfxQspi2_SCLKN_P13_0_OUT = {&MODULE_QSPI2, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt3};
135 IfxQspi_Sclk_Out IfxQspi2_SCLKP_P13_1_OUT = {&MODULE_QSPI2, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt3};
136 IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_3_OUT = {&MODULE_QSPI2, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt3};
137 IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_6_OUT = {&MODULE_QSPI2, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt5};
138 IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_8_OUT = {&MODULE_QSPI2, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt3};
139 IfxQspi_Sclk_Out IfxQspi2_SCLK_P33_14_OUT = {&MODULE_QSPI2, {&MODULE_P33,14}, IfxPort_OutputIdx_alt3};
140 IfxQspi_Sclk_Out IfxQspi2_SCLK_P33_1_OUT = {&MODULE_QSPI2, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt3};
141 IfxQspi_Sclk_Out IfxQspi3_SCLK_P01_7_OUT = {&MODULE_QSPI3, {&MODULE_P01, 7}, IfxPort_OutputIdx_alt4};
142 IfxQspi_Sclk_Out IfxQspi3_SCLK_P02_7_OUT = {&MODULE_QSPI3, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt3};
143 IfxQspi_Sclk_Out IfxQspi3_SCLK_P10_8_OUT = {&MODULE_QSPI3, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt3};
144 IfxQspi_Sclk_Out IfxQspi4_SCLKN_P22_0_OUT = {&MODULE_QSPI4, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt4};
145 IfxQspi_Sclk_Out IfxQspi4_SCLKP_P22_1_OUT = {&MODULE_QSPI4, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt4};
146 IfxQspi_Sclk_Out IfxQspi4_SCLK_P22_3_OUT = {&MODULE_QSPI4, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt3};
147 IfxQspi_Sclk_Out IfxQspi4_SCLK_P33_11_OUT = {&MODULE_QSPI4, {&MODULE_P33,11}, IfxPort_OutputIdx_alt3};
148 IfxQspi_Slsi_In IfxQspi0_SLSIA_P20_13_IN = {&MODULE_QSPI0, {&MODULE_P20,13}, Ifx_RxSel_a};
149 IfxQspi_Slsi_In IfxQspi0_SLSIB_P20_9_IN = {&MODULE_QSPI0, {&MODULE_P20, 9}, Ifx_RxSel_b};
150 IfxQspi_Slsi_In IfxQspi1_SLSIA_P11_10_IN = {&MODULE_QSPI1, {&MODULE_P11,10}, Ifx_RxSel_a};
151 IfxQspi_Slsi_In IfxQspi2_SLSIA_P15_2_IN = {&MODULE_QSPI2, {&MODULE_P15, 2}, Ifx_RxSel_a};
152 IfxQspi_Slsi_In IfxQspi2_SLSIB_P15_1_IN = {&MODULE_QSPI2, {&MODULE_P15, 1}, Ifx_RxSel_b};
153 IfxQspi_Slsi_In IfxQspi3_SLSIA_P02_4_IN = {&MODULE_QSPI3, {&MODULE_P02, 4}, Ifx_RxSel_a};
154 IfxQspi_Slsi_In IfxQspi3_SLSIB_P01_3_IN = {&MODULE_QSPI3, {&MODULE_P01, 3}, Ifx_RxSel_b};
155 IfxQspi_Slsi_In IfxQspi4_SLSIA_P33_10_IN = {&MODULE_QSPI4, {&MODULE_P33,10}, Ifx_RxSel_a};
156 IfxQspi_Slsi_In IfxQspi4_SLSIB_P22_2_IN = {&MODULE_QSPI4, {&MODULE_P22, 2}, Ifx_RxSel_b};
157 IfxQspi_Slso_Out IfxQspi0_SLSO0_P20_8_OUT = {&MODULE_QSPI0, 0, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt3};
158 IfxQspi_Slso_Out IfxQspi0_SLSO10_P22_11_OUT = {&MODULE_QSPI0, 10, {&MODULE_P22,11}, IfxPort_OutputIdx_alt4};
159 IfxQspi_Slso_Out IfxQspi0_SLSO11_P23_6_OUT = {&MODULE_QSPI0, 11, {&MODULE_P23, 6}, IfxPort_OutputIdx_alt4};
160 IfxQspi_Slso_Out IfxQspi0_SLSO12_P22_4_OUT = {&MODULE_QSPI0, 12, {&MODULE_P22, 4}, IfxPort_OutputIdx_alt4};
161 IfxQspi_Slso_Out IfxQspi0_SLSO13_P15_0_OUT = {&MODULE_QSPI0, 13, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt3};
162 IfxQspi_Slso_Out IfxQspi0_SLSO1_P20_9_OUT = {&MODULE_QSPI0, 1, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt3};
163 IfxQspi_Slso_Out IfxQspi0_SLSO2_P20_13_OUT = {&MODULE_QSPI0, 2, {&MODULE_P20,13}, IfxPort_OutputIdx_alt3};
164 IfxQspi_Slso_Out IfxQspi0_SLSO3_P11_10_OUT = {&MODULE_QSPI0, 3, {&MODULE_P11,10}, IfxPort_OutputIdx_alt3};
165 IfxQspi_Slso_Out IfxQspi0_SLSO4_P11_11_OUT = {&MODULE_QSPI0, 4, {&MODULE_P11,11}, IfxPort_OutputIdx_alt3};
166 IfxQspi_Slso_Out IfxQspi0_SLSO5_P11_2_OUT = {&MODULE_QSPI0, 5, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt3};
167 IfxQspi_Slso_Out IfxQspi0_SLSO6_P20_10_OUT = {&MODULE_QSPI0, 6, {&MODULE_P20,10}, IfxPort_OutputIdx_alt3};
168 IfxQspi_Slso_Out IfxQspi0_SLSO7_P33_5_OUT = {&MODULE_QSPI0, 7, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt2};
169 IfxQspi_Slso_Out IfxQspi0_SLSO8_P20_6_OUT = {&MODULE_QSPI0, 8, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt3};
170 IfxQspi_Slso_Out IfxQspi0_SLSO9_P20_3_OUT = {&MODULE_QSPI0, 9, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt3};
171 IfxQspi_Slso_Out IfxQspi1_SLSO0_P20_8_OUT = {&MODULE_QSPI1, 0, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt4};
172 IfxQspi_Slso_Out IfxQspi1_SLSO10_P10_0_OUT = {&MODULE_QSPI1, 10, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt3};
173 IfxQspi_Slso_Out IfxQspi1_SLSO1_P20_9_OUT = {&MODULE_QSPI1, 1, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt4};
174 IfxQspi_Slso_Out IfxQspi1_SLSO2_P20_13_OUT = {&MODULE_QSPI1, 2, {&MODULE_P20,13}, IfxPort_OutputIdx_alt4};
175 IfxQspi_Slso_Out IfxQspi1_SLSO3_P11_10_OUT = {&MODULE_QSPI1, 3, {&MODULE_P11,10}, IfxPort_OutputIdx_alt4};
176 IfxQspi_Slso_Out IfxQspi1_SLSO4_P11_11_OUT = {&MODULE_QSPI1, 4, {&MODULE_P11,11}, IfxPort_OutputIdx_alt4};
177 IfxQspi_Slso_Out IfxQspi1_SLSO5_P11_2_OUT = {&MODULE_QSPI1, 5, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt4};
178 IfxQspi_Slso_Out IfxQspi1_SLSO6_P33_10_OUT = {&MODULE_QSPI1, 6, {&MODULE_P33,10}, IfxPort_OutputIdx_alt2};
179 IfxQspi_Slso_Out IfxQspi1_SLSO7_P33_5_OUT = {&MODULE_QSPI1, 7, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt3};
180 IfxQspi_Slso_Out IfxQspi1_SLSO8_P10_4_OUT = {&MODULE_QSPI1, 8, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt3};
181 IfxQspi_Slso_Out IfxQspi1_SLSO9_P10_5_OUT = {&MODULE_QSPI1, 9, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt4};
182 IfxQspi_Slso_Out IfxQspi2_SLSO0_P15_2_OUT = {&MODULE_QSPI2, 0, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt3};
183 IfxQspi_Slso_Out IfxQspi2_SLSO10_P33_2_OUT = {&MODULE_QSPI2, 10, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt3};
184 IfxQspi_Slso_Out IfxQspi2_SLSO10_P34_3_OUT = {&MODULE_QSPI2, 10, {&MODULE_P34, 3}, IfxPort_OutputIdx_alt4};
185 IfxQspi_Slso_Out IfxQspi2_SLSO11_P33_15_OUT = {&MODULE_QSPI2, 11, {&MODULE_P33,15}, IfxPort_OutputIdx_alt3};
186 IfxQspi_Slso_Out IfxQspi2_SLSO11_P33_6_OUT = {&MODULE_QSPI2, 11, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt3};
187 IfxQspi_Slso_Out IfxQspi2_SLSO12_P32_6_OUT = {&MODULE_QSPI2, 12, {&MODULE_P32, 6}, IfxPort_OutputIdx_alt4};
188 IfxQspi_Slso_Out IfxQspi2_SLSO12_P33_4_OUT = {&MODULE_QSPI2, 12, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt3};
189 IfxQspi_Slso_Out IfxQspi2_SLSO1_P14_2_OUT = {&MODULE_QSPI2, 1, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt3};
190 IfxQspi_Slso_Out IfxQspi2_SLSO2_P14_6_OUT = {&MODULE_QSPI2, 2, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt3};
191 IfxQspi_Slso_Out IfxQspi2_SLSO3_P14_3_OUT = {&MODULE_QSPI2, 3, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt3};
192 IfxQspi_Slso_Out IfxQspi2_SLSO4_P14_7_OUT = {&MODULE_QSPI2, 4, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt3};
193 IfxQspi_Slso_Out IfxQspi2_SLSO5_P15_1_OUT = {&MODULE_QSPI2, 5, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt3};
194 IfxQspi_Slso_Out IfxQspi2_SLSO6_P33_13_OUT = {&MODULE_QSPI2, 6, {&MODULE_P33,13}, IfxPort_OutputIdx_alt4};
195 IfxQspi_Slso_Out IfxQspi2_SLSO7_P20_10_OUT = {&MODULE_QSPI2, 7, {&MODULE_P20,10}, IfxPort_OutputIdx_alt4};
196 IfxQspi_Slso_Out IfxQspi2_SLSO8_P20_6_OUT = {&MODULE_QSPI2, 8, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt4};
197 IfxQspi_Slso_Out IfxQspi2_SLSO9_P20_3_OUT = {&MODULE_QSPI2, 9, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt4};
198 IfxQspi_Slso_Out IfxQspi3_SLSO0_P02_4_OUT = {&MODULE_QSPI3, 0, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt3};
199 IfxQspi_Slso_Out IfxQspi3_SLSO10_P01_4_OUT = {&MODULE_QSPI3, 10, {&MODULE_P01, 4}, IfxPort_OutputIdx_alt4};
200 IfxQspi_Slso_Out IfxQspi3_SLSO1_P02_0_OUT = {&MODULE_QSPI3, 1, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt3};
201 IfxQspi_Slso_Out IfxQspi3_SLSO2_P02_1_OUT = {&MODULE_QSPI3, 2, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt3};
202 IfxQspi_Slso_Out IfxQspi3_SLSO3_P00_5_OUT = {&MODULE_QSPI3, 3, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt3};
203 IfxQspi_Slso_Out IfxQspi3_SLSO3_P02_2_OUT = {&MODULE_QSPI3, 3, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt3};
204 IfxQspi_Slso_Out IfxQspi3_SLSO4_P00_2_OUT = {&MODULE_QSPI3, 4, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt6};
205 IfxQspi_Slso_Out IfxQspi3_SLSO4_P02_3_OUT = {&MODULE_QSPI3, 4, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt3};
206 IfxQspi_Slso_Out IfxQspi3_SLSO5_P02_12_OUT = {&MODULE_QSPI3, 5, {&MODULE_P02,12}, IfxPort_OutputIdx_alt2};
207 IfxQspi_Slso_Out IfxQspi3_SLSO5_P02_8_OUT = {&MODULE_QSPI3, 5, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt2};
208 IfxQspi_Slso_Out IfxQspi3_SLSO6_P00_8_OUT = {&MODULE_QSPI3, 6, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt2};
209 IfxQspi_Slso_Out IfxQspi3_SLSO6_P02_15_OUT = {&MODULE_QSPI3, 6, {&MODULE_P02,15}, IfxPort_OutputIdx_alt2};
210 IfxQspi_Slso_Out IfxQspi3_SLSO7_P00_9_OUT = {&MODULE_QSPI3, 7, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt2};
211 IfxQspi_Slso_Out IfxQspi3_SLSO7_P02_13_OUT = {&MODULE_QSPI3, 7, {&MODULE_P02,13}, IfxPort_OutputIdx_alt2};
212 IfxQspi_Slso_Out IfxQspi3_SLSO8_P10_5_OUT = {&MODULE_QSPI3, 8, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt3};
213 IfxQspi_Slso_Out IfxQspi3_SLSO9_P01_3_OUT = {&MODULE_QSPI3, 9, {&MODULE_P01, 3}, IfxPort_OutputIdx_alt4};
214 IfxQspi_Slso_Out IfxQspi4_SLSO0_P33_10_OUT = {&MODULE_QSPI4, 0, {&MODULE_P33,10}, IfxPort_OutputIdx_alt3};
215 IfxQspi_Slso_Out IfxQspi4_SLSO1_P33_9_OUT = {&MODULE_QSPI4, 1, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt3};
216 IfxQspi_Slso_Out IfxQspi4_SLSO2_P33_3_OUT = {&MODULE_QSPI4, 2, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt3};
217 IfxQspi_Slso_Out IfxQspi4_SLSO2_P33_8_OUT = {&MODULE_QSPI4, 2, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt3};
218 IfxQspi_Slso_Out IfxQspi4_SLSO3_P22_2_OUT = {&MODULE_QSPI4, 3, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt3};
219 IfxQspi_Slso_Out IfxQspi4_SLSO4_P02_12_OUT = {&MODULE_QSPI4, 4, {&MODULE_P02,12}, IfxPort_OutputIdx_alt3};
220 IfxQspi_Slso_Out IfxQspi4_SLSO4_P23_5_OUT = {&MODULE_QSPI4, 4, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt3};
221 IfxQspi_Slso_Out IfxQspi4_SLSO5_P02_15_OUT = {&MODULE_QSPI4, 5, {&MODULE_P02,15}, IfxPort_OutputIdx_alt3};
222 IfxQspi_Slso_Out IfxQspi4_SLSO5_P23_4_OUT = {&MODULE_QSPI4, 5, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt3};
223 IfxQspi_Slso_Out IfxQspi4_SLSO6_P02_13_OUT = {&MODULE_QSPI4, 6, {&MODULE_P02,13}, IfxPort_OutputIdx_alt3};
224 IfxQspi_Slso_Out IfxQspi4_SLSO6_P23_1_OUT = {&MODULE_QSPI4, 6, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt3};
225 IfxQspi_Slso_Out IfxQspi4_SLSO7_P02_1_OUT = {&MODULE_QSPI4, 7, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt2};
226 IfxQspi_Slso_Out IfxQspi4_SLSO7_P33_7_OUT = {&MODULE_QSPI4, 7, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt3};
227
228
229 const IfxQspi_Mrst_In *IfxQspi_Mrst_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS] = {
230 {
231 &IfxQspi0_MRSTA_P20_12_IN,
232 &IfxQspi0_MRSTB_P22_9_IN,
233 &IfxQspi0_MRSTC_P22_6_IN,
234 NULL_PTR,
235 NULL_PTR,
236 NULL_PTR
237 },
238 {
239 &IfxQspi1_MRSTA_P10_1_IN,
240 &IfxQspi1_MRSTB_P11_3_IN,
241 NULL_PTR,
242 NULL_PTR,
243 NULL_PTR,
244 NULL_PTR
245 },
246 {
247 &IfxQspi2_MRSTA_P15_4_IN,
248 &IfxQspi2_MRSTB_P15_7_IN,
249 &IfxQspi2_MRSTCN_P21_2_IN,
250 &IfxQspi2_MRSTD_P34_4_IN,
251 &IfxQspi2_MRSTE_P15_2_IN,
252 &IfxQspi2_MRSTFN_P14_9_IN
253 },
254 {
255 &IfxQspi3_MRSTA_P02_5_IN,
256 &IfxQspi3_MRSTB_P10_7_IN,
257 &IfxQspi3_MRSTC_P01_5_IN,
258 NULL_PTR,
259 NULL_PTR,
260 NULL_PTR
261 },
262 {
263 &IfxQspi4_MRSTA_P33_13_IN,
264 &IfxQspi4_MRSTB_P22_1_IN,
265 &IfxQspi4_MRSTCN_P21_2_IN,
266 &IfxQspi4_MRSTDN_P21_0_IN,
267 NULL_PTR,
268 NULL_PTR
269 }
270 };
271
272 const IfxQspi_Mrst_Out *IfxQspi_Mrst_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS] = {
273 {
274 &IfxQspi0_MRST_P20_12_OUT,
275 &IfxQspi0_MRST_P22_6_OUT,
276 &IfxQspi0_MRST_P22_9_OUT
277 },
278 {
279 &IfxQspi1_MRST_P10_1_OUT,
280 &IfxQspi1_MRST_P10_6_OUT,
281 &IfxQspi1_MRST_P11_3_OUT
282 },
283 {
284 &IfxQspi2_MRST_P15_4_OUT,
285 &IfxQspi2_MRST_P15_7_OUT,
286 &IfxQspi2_MRST_P34_4_OUT
287 },
288 {
289 &IfxQspi3_MRST_P01_5_OUT,
290 &IfxQspi3_MRST_P02_5_OUT,
291 &IfxQspi3_MRST_P10_7_OUT
292 },
293 {
294 &IfxQspi4_MRST_P22_1_OUT,
295 &IfxQspi4_MRST_P33_13_OUT,
296 NULL_PTR
297 }
298 };
299
300 const IfxQspi_Mtsr_In *IfxQspi_Mtsr_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS] = {
301 {
302 &IfxQspi0_MTSRA_P20_14_IN,
303 &IfxQspi0_MTSRB_P22_10_IN,
304 &IfxQspi0_MTSRC_P22_5_IN,
305 NULL_PTR
306 },
307 {
308 &IfxQspi1_MTSRA_P10_3_IN,
309 &IfxQspi1_MTSRB_P11_9_IN,
310 &IfxQspi1_MTSRC_P10_4_IN,
311 NULL_PTR
312 },
313 {
314 &IfxQspi2_MTSRA_P15_5_IN,
315 &IfxQspi2_MTSRB_P15_6_IN,
316 NULL_PTR,
317 &IfxQspi2_MTSRD_P34_5_IN
318 },
319 {
320 &IfxQspi3_MTSRA_P02_6_IN,
321 &IfxQspi3_MTSRB_P10_6_IN,
322 &IfxQspi3_MTSRC_P01_6_IN,
323 NULL_PTR
324 },
325 {
326 &IfxQspi4_MTSRA_P33_12_IN,
327 &IfxQspi4_MTSRB_P22_0_IN,
328 NULL_PTR,
329 NULL_PTR
330 }
331 };
332
333 const IfxQspi_Mtsr_Out *IfxQspi_Mtsr_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS] = {
334 {
335 &IfxQspi0_MTSR_P20_12_OUT,
336 &IfxQspi0_MTSR_P20_14_OUT,
337 &IfxQspi0_MTSR_P22_5_OUT,
338 &IfxQspi0_MTSR_P22_10_OUT,
339 NULL_PTR
340 },
341 {
342 &IfxQspi1_MTSR_P10_1_OUT,
343 &IfxQspi1_MTSR_P10_3_OUT,
344 &IfxQspi1_MTSR_P10_4_OUT,
345 &IfxQspi1_MTSR_P11_9_OUT,
346 NULL_PTR
347 },
348 {
349 &IfxQspi2_MTSRN_P13_2_OUT,
350 &IfxQspi2_MTSRP_P13_3_OUT,
351 &IfxQspi2_MTSR_P15_5_OUT,
352 &IfxQspi2_MTSR_P15_6_OUT,
353 &IfxQspi2_MTSR_P34_5_OUT
354 },
355 {
356 &IfxQspi3_MTSR_P01_6_OUT,
357 &IfxQspi3_MTSR_P02_6_OUT,
358 &IfxQspi3_MTSR_P10_6_OUT,
359 NULL_PTR,
360 NULL_PTR
361 },
362 {
363 &IfxQspi4_MTSR_P22_0_OUT,
364 &IfxQspi4_MTSRN_P22_2_OUT,
365 &IfxQspi4_MTSRP_P22_3_OUT,
366 &IfxQspi4_MTSR_P33_12_OUT,
367 NULL_PTR
368 }
369 };
370
371 const IfxQspi_Sclk_In *IfxQspi_Sclk_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS] = {
372 {
373 &IfxQspi0_SCLKA_P20_11_IN,
374 &IfxQspi0_SCLKB_P22_8_IN,
375 &IfxQspi0_SCLKC_P22_7_IN,
376 NULL_PTR
377 },
378 {
379 &IfxQspi1_SCLKA_P10_2_IN,
380 &IfxQspi1_SCLKB_P11_6_IN,
381 NULL_PTR,
382 NULL_PTR
383 },
384 {
385 &IfxQspi2_SCLKA_P15_3_IN,
386 &IfxQspi2_SCLKB_P15_8_IN,
387 NULL_PTR,
388 &IfxQspi2_SCLKD_P33_14_IN
389 },
390 {
391 &IfxQspi3_SCLKA_P02_7_IN,
392 &IfxQspi3_SCLKB_P10_8_IN,
393 &IfxQspi3_SCLKC_P01_7_IN,
394 NULL_PTR
395 },
396 {
397 &IfxQspi4_SCLKA_P33_11_IN,
398 &IfxQspi4_SCLKB_P22_3_IN,
399 NULL_PTR,
400 NULL_PTR
401 }
402 };
403
404 const IfxQspi_Sclk_Out *IfxQspi_Sclk_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS] = {
405 {
406 &IfxQspi0_SCLK_P20_11_OUT,
407 &IfxQspi0_SCLK_P20_13_OUT,
408 &IfxQspi0_SCLK_P22_7_OUT,
409 &IfxQspi0_SCLK_P22_8_OUT,
410 NULL_PTR,
411 NULL_PTR,
412 NULL_PTR
413 },
414 {
415 &IfxQspi1_SCLK_P10_2_OUT,
416 &IfxQspi1_SCLK_P11_6_OUT,
417 NULL_PTR,
418 NULL_PTR,
419 NULL_PTR,
420 NULL_PTR,
421 NULL_PTR
422 },
423 {
424 &IfxQspi2_SCLKN_P13_0_OUT,
425 &IfxQspi2_SCLKP_P13_1_OUT,
426 &IfxQspi2_SCLK_P15_3_OUT,
427 &IfxQspi2_SCLK_P15_6_OUT,
428 &IfxQspi2_SCLK_P15_8_OUT,
429 &IfxQspi2_SCLK_P33_1_OUT,
430 &IfxQspi2_SCLK_P33_14_OUT
431 },
432 {
433 &IfxQspi3_SCLK_P01_7_OUT,
434 &IfxQspi3_SCLK_P02_7_OUT,
435 &IfxQspi3_SCLK_P10_8_OUT,
436 NULL_PTR,
437 NULL_PTR,
438 NULL_PTR,
439 NULL_PTR
440 },
441 {
442 &IfxQspi4_SCLKN_P22_0_OUT,
443 &IfxQspi4_SCLKP_P22_1_OUT,
444 &IfxQspi4_SCLK_P22_3_OUT,
445 &IfxQspi4_SCLK_P33_11_OUT,
446 NULL_PTR,
447 NULL_PTR,
448 NULL_PTR
449 }
450 };
451
452 const IfxQspi_Slsi_In *IfxQspi_Slsi_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS] = {
453 {
454 &IfxQspi0_SLSIA_P20_13_IN,
455 &IfxQspi0_SLSIB_P20_9_IN
456 },
457 {
458 &IfxQspi1_SLSIA_P11_10_IN,
459 NULL_PTR
460 },
461 {
462 &IfxQspi2_SLSIA_P15_2_IN,
463 &IfxQspi2_SLSIB_P15_1_IN
464 },
465 {
466 &IfxQspi3_SLSIA_P02_4_IN,
467 &IfxQspi3_SLSIB_P01_3_IN
468 },
469 {
470 &IfxQspi4_SLSIA_P33_10_IN,
471 &IfxQspi4_SLSIB_P22_2_IN
472 }
473 };
474
475 const IfxQspi_Slso_Out *IfxQspi_Slso_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_NUM_SLAVESELECTS][IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS] = {
476 {
477 {
478 &IfxQspi0_SLSO0_P20_8_OUT,
479 NULL_PTR
480 },
481 {
482 &IfxQspi0_SLSO1_P20_9_OUT,
483 NULL_PTR
484 },
485 {
486 &IfxQspi0_SLSO2_P20_13_OUT,
487 NULL_PTR
488 },
489 {
490 &IfxQspi0_SLSO3_P11_10_OUT,
491 NULL_PTR
492 },
493 {
494 &IfxQspi0_SLSO4_P11_11_OUT,
495 NULL_PTR
496 },
497 {
498 &IfxQspi0_SLSO5_P11_2_OUT,
499 NULL_PTR
500 },
501 {
502 &IfxQspi0_SLSO6_P20_10_OUT,
503 NULL_PTR
504 },
505 {
506 &IfxQspi0_SLSO7_P33_5_OUT,
507 NULL_PTR
508 },
509 {
510 &IfxQspi0_SLSO8_P20_6_OUT,
511 NULL_PTR
512 },
513 {
514 &IfxQspi0_SLSO9_P20_3_OUT,
515 NULL_PTR
516 },
517 {
518 &IfxQspi0_SLSO10_P22_11_OUT,
519 NULL_PTR
520 },
521 {
522 &IfxQspi0_SLSO11_P23_6_OUT,
523 NULL_PTR
524 },
525 {
526 &IfxQspi0_SLSO12_P22_4_OUT,
527 NULL_PTR
528 },
529 {
530 &IfxQspi0_SLSO13_P15_0_OUT,
531 NULL_PTR
532 }
533 },
534 {
535 {
536 &IfxQspi1_SLSO0_P20_8_OUT,
537 NULL_PTR
538 },
539 {
540 &IfxQspi1_SLSO1_P20_9_OUT,
541 NULL_PTR
542 },
543 {
544 &IfxQspi1_SLSO2_P20_13_OUT,
545 NULL_PTR
546 },
547 {
548 &IfxQspi1_SLSO3_P11_10_OUT,
549 NULL_PTR
550 },
551 {
552 &IfxQspi1_SLSO4_P11_11_OUT,
553 NULL_PTR
554 },
555 {
556 &IfxQspi1_SLSO5_P11_2_OUT,
557 NULL_PTR
558 },
559 {
560 &IfxQspi1_SLSO6_P33_10_OUT,
561 NULL_PTR
562 },
563 {
564 &IfxQspi1_SLSO7_P33_5_OUT,
565 NULL_PTR
566 },
567 {
568 &IfxQspi1_SLSO8_P10_4_OUT,
569 NULL_PTR
570 },
571 {
572 &IfxQspi1_SLSO9_P10_5_OUT,
573 NULL_PTR
574 },
575 {
576 &IfxQspi1_SLSO10_P10_0_OUT,
577 NULL_PTR
578 },
579 {
580 NULL_PTR,
581 NULL_PTR
582 },
583 {
584 NULL_PTR,
585 NULL_PTR
586 },
587 {
588 NULL_PTR,
589 NULL_PTR
590 }
591 },
592 {
593 {
594 &IfxQspi2_SLSO0_P15_2_OUT,
595 NULL_PTR
596 },
597 {
598 &IfxQspi2_SLSO1_P14_2_OUT,
599 NULL_PTR
600 },
601 {
602 &IfxQspi2_SLSO2_P14_6_OUT,
603 NULL_PTR
604 },
605 {
606 &IfxQspi2_SLSO3_P14_3_OUT,
607 NULL_PTR
608 },
609 {
610 &IfxQspi2_SLSO4_P14_7_OUT,
611 NULL_PTR
612 },
613 {
614 &IfxQspi2_SLSO5_P15_1_OUT,
615 NULL_PTR
616 },
617 {
618 &IfxQspi2_SLSO6_P33_13_OUT,
619 NULL_PTR
620 },
621 {
622 &IfxQspi2_SLSO7_P20_10_OUT,
623 NULL_PTR
624 },
625 {
626 &IfxQspi2_SLSO8_P20_6_OUT,
627 NULL_PTR
628 },
629 {
630 &IfxQspi2_SLSO9_P20_3_OUT,
631 NULL_PTR
632 },
633 {
634 &IfxQspi2_SLSO10_P33_2_OUT,
635 &IfxQspi2_SLSO10_P34_3_OUT
636 },
637 {
638 &IfxQspi2_SLSO11_P33_6_OUT,
639 &IfxQspi2_SLSO11_P33_15_OUT
640 },
641 {
642 &IfxQspi2_SLSO12_P32_6_OUT,
643 &IfxQspi2_SLSO12_P33_4_OUT
644 },
645 {
646 NULL_PTR,
647 NULL_PTR
648 }
649 },
650 {
651 {
652 &IfxQspi3_SLSO0_P02_4_OUT,
653 NULL_PTR
654 },
655 {
656 &IfxQspi3_SLSO1_P02_0_OUT,
657 NULL_PTR
658 },
659 {
660 &IfxQspi3_SLSO2_P02_1_OUT,
661 NULL_PTR
662 },
663 {
664 &IfxQspi3_SLSO3_P00_5_OUT,
665 &IfxQspi3_SLSO3_P02_2_OUT
666 },
667 {
668 &IfxQspi3_SLSO4_P00_2_OUT,
669 &IfxQspi3_SLSO4_P02_3_OUT
670 },
671 {
672 &IfxQspi3_SLSO5_P02_8_OUT,
673 &IfxQspi3_SLSO5_P02_12_OUT
674 },
675 {
676 &IfxQspi3_SLSO6_P00_8_OUT,
677 &IfxQspi3_SLSO6_P02_15_OUT
678 },
679 {
680 &IfxQspi3_SLSO7_P00_9_OUT,
681 &IfxQspi3_SLSO7_P02_13_OUT
682 },
683 {
684 &IfxQspi3_SLSO8_P10_5_OUT,
685 NULL_PTR
686 },
687 {
688 &IfxQspi3_SLSO9_P01_3_OUT,
689 NULL_PTR
690 },
691 {
692 &IfxQspi3_SLSO10_P01_4_OUT,
693 NULL_PTR
694 },
695 {
696 NULL_PTR,
697 NULL_PTR
698 },
699 {
700 NULL_PTR,
701 NULL_PTR
702 },
703 {
704 NULL_PTR,
705 NULL_PTR
706 }
707 },
708 {
709 {
710 &IfxQspi4_SLSO0_P33_10_OUT,
711 NULL_PTR
712 },
713 {
714 &IfxQspi4_SLSO1_P33_9_OUT,
715 NULL_PTR
716 },
717 {
718 &IfxQspi4_SLSO2_P33_3_OUT,
719 &IfxQspi4_SLSO2_P33_8_OUT
720 },
721 {
722 &IfxQspi4_SLSO3_P22_2_OUT,
723 NULL_PTR
724 },
725 {
726 &IfxQspi4_SLSO4_P02_12_OUT,
727 &IfxQspi4_SLSO4_P23_5_OUT
728 },
729 {
730 &IfxQspi4_SLSO5_P02_15_OUT,
731 &IfxQspi4_SLSO5_P23_4_OUT
732 },
733 {
734 &IfxQspi4_SLSO6_P02_13_OUT,
735 &IfxQspi4_SLSO6_P23_1_OUT
736 },
737 {
738 &IfxQspi4_SLSO7_P02_1_OUT,
739 &IfxQspi4_SLSO7_P33_7_OUT
740 },
741 {
742 NULL_PTR,
743 NULL_PTR
744 },
745 {
746 NULL_PTR,
747 NULL_PTR
748 },
749 {
750 NULL_PTR,
751 NULL_PTR
752 },
753 {
754 NULL_PTR,
755 NULL_PTR
756 },
757 {
758 NULL_PTR,
759 NULL_PTR
760 },
761 {
762 NULL_PTR,
763 NULL_PTR
764 }
765 }
766 };
IfxQspi4_SLSO6_P23_1_OUT
IfxQspi_Slso_Out IfxQspi4_SLSO6_P23_1_OUT
Definition: IfxQspi_PinMap.c:224
IfxQspi1_MTSR_P10_4_OUT
IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_4_OUT
Definition: IfxQspi_PinMap.c:101
IfxQspi2_SLSO1_P14_2_OUT
IfxQspi_Slso_Out IfxQspi2_SLSO1_P14_2_OUT
Definition: IfxQspi_PinMap.c:189
IfxQspi_Mrst_Out
MRST pin mapping structure.
Definition: IfxQspi_PinMap.h:96
IfxQspi4_MRSTDP_P21_1_IN
IfxQspi_Mrst_In IfxQspi4_MRSTDP_P21_1_IN
Definition: IfxQspi_PinMap.c:66
IfxQspi_Slsi_In
SLSI pin mapping structure.
Definition: IfxQspi_PinMap.h:80
IfxQspi2_MRST_P34_4_OUT
IfxQspi_Mrst_Out IfxQspi2_MRST_P34_4_OUT
Definition: IfxQspi_PinMap.c:75
IfxQspi3_MRSTB_P10_7_IN
IfxQspi_Mrst_In IfxQspi3_MRSTB_P10_7_IN
Definition: IfxQspi_PinMap.c:59
IfxQspi0_MTSRB_P22_10_IN
IfxQspi_Mtsr_In IfxQspi0_MTSRB_P22_10_IN
Definition: IfxQspi_PinMap.c:82
IfxQspi3_SLSO4_P02_3_OUT
IfxQspi_Slso_Out IfxQspi3_SLSO4_P02_3_OUT
Definition: IfxQspi_PinMap.c:205
IfxQspi4_MTSRP_P22_3_OUT
IfxQspi_Mtsr_Out IfxQspi4_MTSRP_P22_3_OUT
Definition: IfxQspi_PinMap.c:112
IfxQspi2_MRSTCN_P21_2_IN
IfxQspi_Mrst_In IfxQspi2_MRSTCN_P21_2_IN
Definition: IfxQspi_PinMap.c:52
IfxQspi0_SLSO4_P11_11_OUT
IfxQspi_Slso_Out IfxQspi0_SLSO4_P11_11_OUT
Definition: IfxQspi_PinMap.c:165
IfxQspi2_SCLKB_P15_8_IN
IfxQspi_Sclk_In IfxQspi2_SCLKB_P15_8_IN
Definition: IfxQspi_PinMap.c:121
IfxQspi3_SLSO7_P02_13_OUT
IfxQspi_Slso_Out IfxQspi3_SLSO7_P02_13_OUT
Definition: IfxQspi_PinMap.c:211
IfxQspi0_SLSO1_P20_9_OUT
IfxQspi_Slso_Out IfxQspi0_SLSO1_P20_9_OUT
Definition: IfxQspi_PinMap.c:162
IfxQspi3_SLSO8_P10_5_OUT
IfxQspi_Slso_Out IfxQspi3_SLSO8_P10_5_OUT
Definition: IfxQspi_PinMap.c:212
IfxQspi4_MTSRB_P22_0_IN
IfxQspi_Mtsr_In IfxQspi4_MTSRB_P22_0_IN
Definition: IfxQspi_PinMap.c:94
Ifx_RxSel_e
Definition: Ifx_Types.h:133
IfxQspi2_SLSO10_P34_3_OUT
IfxQspi_Slso_Out IfxQspi2_SLSO10_P34_3_OUT
Definition: IfxQspi_PinMap.c:184
Ifx_RxSel_d
Definition: Ifx_Types.h:132
IfxQspi2_MRSTE_P15_2_IN
IfxQspi_Mrst_In IfxQspi2_MRSTE_P15_2_IN
Definition: IfxQspi_PinMap.c:55
IfxQspi4_SCLKB_P22_3_IN
IfxQspi_Sclk_In IfxQspi4_SCLKB_P22_3_IN
Definition: IfxQspi_PinMap.c:127
IfxQspi2_MTSRD_P34_5_IN
IfxQspi_Mtsr_In IfxQspi2_MTSRD_P34_5_IN
Definition: IfxQspi_PinMap.c:89
IfxQspi3_SLSO0_P02_4_OUT
IfxQspi_Slso_Out IfxQspi3_SLSO0_P02_4_OUT
Definition: IfxQspi_PinMap.c:198
IfxQspi3_SLSIA_P02_4_IN
IfxQspi_Slsi_In IfxQspi3_SLSIA_P02_4_IN
Definition: IfxQspi_PinMap.c:153
IfxQspi2_MRST_P15_7_OUT
IfxQspi_Mrst_Out IfxQspi2_MRST_P15_7_OUT
Definition: IfxQspi_PinMap.c:74
IfxQspi1_SLSO5_P11_2_OUT
IfxQspi_Slso_Out IfxQspi1_SLSO5_P11_2_OUT
Definition: IfxQspi_PinMap.c:177
IfxQspi0_SLSO12_P22_4_OUT
IfxQspi_Slso_Out IfxQspi0_SLSO12_P22_4_OUT
Definition: IfxQspi_PinMap.c:160
IfxQspi0_SLSO3_P11_10_OUT
IfxQspi_Slso_Out IfxQspi0_SLSO3_P11_10_OUT
Definition: IfxQspi_PinMap.c:164
IfxQspi2_SLSO11_P33_6_OUT
IfxQspi_Slso_Out IfxQspi2_SLSO11_P33_6_OUT
Definition: IfxQspi_PinMap.c:186
IfxQspi4_MRSTDN_P21_0_IN
IfxQspi_Mrst_In IfxQspi4_MRSTDN_P21_0_IN
Definition: IfxQspi_PinMap.c:65
IfxQspi4_SLSO3_P22_2_OUT
IfxQspi_Slso_Out IfxQspi4_SLSO3_P22_2_OUT
Definition: IfxQspi_PinMap.c:218
IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS
#define IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS
Definition: IfxQspi_PinMap.h:318
IfxQspi4_SLSO7_P33_7_OUT
IfxQspi_Slso_Out IfxQspi4_SLSO7_P33_7_OUT
Definition: IfxQspi_PinMap.c:226
IfxQspi3_SCLK_P01_7_OUT
IfxQspi_Sclk_Out IfxQspi3_SCLK_P01_7_OUT
Definition: IfxQspi_PinMap.c:141
IfxQspi4_SLSO5_P02_15_OUT
IfxQspi_Slso_Out IfxQspi4_SLSO5_P02_15_OUT
Definition: IfxQspi_PinMap.c:221
IfxQspi_Sclk_In
SCLK pin mapping structure.
Definition: IfxQspi_PinMap.h:72
IfxQspi2_MRSTFP_P14_10_IN
IfxQspi_Mrst_In IfxQspi2_MRSTFP_P14_10_IN
Definition: IfxQspi_PinMap.c:57
IfxQspi2_SLSO6_P33_13_OUT
IfxQspi_Slso_Out IfxQspi2_SLSO6_P33_13_OUT
Definition: IfxQspi_PinMap.c:194
IfxQspi2_MTSR_P15_6_OUT
IfxQspi_Mtsr_Out IfxQspi2_MTSR_P15_6_OUT
Definition: IfxQspi_PinMap.c:106
IfxQspi3_SCLKC_P01_7_IN
IfxQspi_Sclk_In IfxQspi3_SCLKC_P01_7_IN
Definition: IfxQspi_PinMap.c:125
IfxQspi2_MRSTB_P15_7_IN
IfxQspi_Mrst_In IfxQspi2_MRSTB_P15_7_IN
Definition: IfxQspi_PinMap.c:51
IfxQspi0_MTSRC_P22_5_IN
IfxQspi_Mtsr_In IfxQspi0_MTSRC_P22_5_IN
Definition: IfxQspi_PinMap.c:83
IfxQspi2_MTSR_P34_5_OUT
IfxQspi_Mtsr_Out IfxQspi2_MTSR_P34_5_OUT
Definition: IfxQspi_PinMap.c:107
IfxQspi0_SLSO0_P20_8_OUT
IfxQspi_Slso_Out IfxQspi0_SLSO0_P20_8_OUT
Definition: IfxQspi_PinMap.c:157
IfxQspi2_SLSIA_P15_2_IN
IfxQspi_Slsi_In IfxQspi2_SLSIA_P15_2_IN
Definition: IfxQspi_PinMap.c:151
IfxQspi1_MRST_P10_6_OUT
IfxQspi_Mrst_Out IfxQspi1_MRST_P10_6_OUT
Definition: IfxQspi_PinMap.c:71
IfxQspi3_MTSR_P01_6_OUT
IfxQspi_Mtsr_Out IfxQspi3_MTSR_P01_6_OUT
Definition: IfxQspi_PinMap.c:108
IfxQspi3_MRST_P02_5_OUT
IfxQspi_Mrst_Out IfxQspi3_MRST_P02_5_OUT
Definition: IfxQspi_PinMap.c:77
IfxQspi4_SLSO1_P33_9_OUT
IfxQspi_Slso_Out IfxQspi4_SLSO1_P33_9_OUT
Definition: IfxQspi_PinMap.c:215
IfxQspi0_SLSO8_P20_6_OUT
IfxQspi_Slso_Out IfxQspi0_SLSO8_P20_6_OUT
Definition: IfxQspi_PinMap.c:169
IfxQspi1_SLSO7_P33_5_OUT
IfxQspi_Slso_Out IfxQspi1_SLSO7_P33_5_OUT
Definition: IfxQspi_PinMap.c:179
IfxQspi1_SCLKB_P11_6_IN
IfxQspi_Sclk_In IfxQspi1_SCLKB_P11_6_IN
Definition: IfxQspi_PinMap.c:119
IfxQspi_Sclk_Out
SCLK pin mapping structure.
Definition: IfxQspi_PinMap.h:112
IfxQspi3_SLSO5_P02_12_OUT
IfxQspi_Slso_Out IfxQspi3_SLSO5_P02_12_OUT
Definition: IfxQspi_PinMap.c:206
IfxQspi4_SLSO2_P33_8_OUT
IfxQspi_Slso_Out IfxQspi4_SLSO2_P33_8_OUT
Definition: IfxQspi_PinMap.c:217
IfxPort_OutputIdx_alt2
Definition: IfxPort.h:130
IfxQspi4_MRST_P22_1_OUT
IfxQspi_Mrst_Out IfxQspi4_MRST_P22_1_OUT
Definition: IfxQspi_PinMap.c:79
IfxQspi3_MRSTC_P01_5_IN
IfxQspi_Mrst_In IfxQspi3_MRSTC_P01_5_IN
Definition: IfxQspi_PinMap.c:60
IfxQspi2_SCLK_P15_8_OUT
IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_8_OUT
Definition: IfxQspi_PinMap.c:138
Ifx_RxSel_a
Definition: Ifx_Types.h:129
IfxQspi4_MTSRA_P33_12_IN
IfxQspi_Mtsr_In IfxQspi4_MTSRA_P33_12_IN
Definition: IfxQspi_PinMap.c:93
IfxQspi1_SLSO2_P20_13_OUT
IfxQspi_Slso_Out IfxQspi1_SLSO2_P20_13_OUT
Definition: IfxQspi_PinMap.c:174
IfxQspi4_SLSO7_P02_1_OUT
IfxQspi_Slso_Out IfxQspi4_SLSO7_P02_1_OUT
Definition: IfxQspi_PinMap.c:225
IfxQspi2_SCLK_P33_1_OUT
IfxQspi_Sclk_Out IfxQspi2_SCLK_P33_1_OUT
Definition: IfxQspi_PinMap.c:140
IfxQspi3_SCLK_P02_7_OUT
IfxQspi_Sclk_Out IfxQspi3_SCLK_P02_7_OUT
Definition: IfxQspi_PinMap.c:142
IfxQspi2_SCLK_P33_14_OUT
IfxQspi_Sclk_Out IfxQspi2_SCLK_P33_14_OUT
Definition: IfxQspi_PinMap.c:139
IfxQspi4_MRSTCP_P21_3_IN
IfxQspi_Mrst_In IfxQspi4_MRSTCP_P21_3_IN
Definition: IfxQspi_PinMap.c:64
IfxQspi2_SCLKD_P33_14_IN
IfxQspi_Sclk_In IfxQspi2_SCLKD_P33_14_IN
Definition: IfxQspi_PinMap.c:122
IfxQspi2_SCLK_P15_6_OUT
IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_6_OUT
Definition: IfxQspi_PinMap.c:137
IfxQspi2_MTSR_P15_5_OUT
IfxQspi_Mtsr_Out IfxQspi2_MTSR_P15_5_OUT
Definition: IfxQspi_PinMap.c:105
IfxQspi0_MTSR_P20_14_OUT
IfxQspi_Mtsr_Out IfxQspi0_MTSR_P20_14_OUT
Definition: IfxQspi_PinMap.c:96
IfxQspi3_SLSO1_P02_0_OUT
IfxQspi_Slso_Out IfxQspi3_SLSO1_P02_0_OUT
Definition: IfxQspi_PinMap.c:200
IfxQspi2_SLSO4_P14_7_OUT
IfxQspi_Slso_Out IfxQspi2_SLSO4_P14_7_OUT
Definition: IfxQspi_PinMap.c:192
IfxQspi3_MRST_P01_5_OUT
IfxQspi_Mrst_Out IfxQspi3_MRST_P01_5_OUT
Definition: IfxQspi_PinMap.c:76
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
Ifx_RxSel_b
Definition: Ifx_Types.h:130
IfxQspi4_MTSRN_P22_2_OUT
IfxQspi_Mtsr_Out IfxQspi4_MTSRN_P22_2_OUT
Definition: IfxQspi_PinMap.c:111
IfxQspi2_SCLK_P15_3_OUT
IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_3_OUT
Definition: IfxQspi_PinMap.c:136
IfxQspi2_SLSO9_P20_3_OUT
IfxQspi_Slso_Out IfxQspi2_SLSO9_P20_3_OUT
Definition: IfxQspi_PinMap.c:197
IfxQspi1_MRST_P11_3_OUT
IfxQspi_Mrst_Out IfxQspi1_MRST_P11_3_OUT
Definition: IfxQspi_PinMap.c:72
IfxQspi4_SLSO4_P23_5_OUT
IfxQspi_Slso_Out IfxQspi4_SLSO4_P23_5_OUT
Definition: IfxQspi_PinMap.c:220
IfxQspi2_SLSO7_P20_10_OUT
IfxQspi_Slso_Out IfxQspi2_SLSO7_P20_10_OUT
Definition: IfxQspi_PinMap.c:195
IfxQspi3_MRST_P10_7_OUT
IfxQspi_Mrst_Out IfxQspi3_MRST_P10_7_OUT
Definition: IfxQspi_PinMap.c:78
IfxQspi4_SCLKN_P22_0_OUT
IfxQspi_Sclk_Out IfxQspi4_SCLKN_P22_0_OUT
Definition: IfxQspi_PinMap.c:144
IfxQspi3_SLSO5_P02_8_OUT
IfxQspi_Slso_Out IfxQspi3_SLSO5_P02_8_OUT
Definition: IfxQspi_PinMap.c:207
IfxQspi3_SLSO9_P01_3_OUT
IfxQspi_Slso_Out IfxQspi3_SLSO9_P01_3_OUT
Definition: IfxQspi_PinMap.c:213
IfxQspi_Slso_Out
SLSO pin mapping structure.
Definition: IfxQspi_PinMap.h:120
IfxPort_OutputIdx_alt6
Definition: IfxPort.h:134
IfxQspi3_MTSRB_P10_6_IN
IfxQspi_Mtsr_In IfxQspi3_MTSRB_P10_6_IN
Definition: IfxQspi_PinMap.c:91
IfxQspi2_SCLKA_P15_3_IN
IfxQspi_Sclk_In IfxQspi2_SCLKA_P15_3_IN
Definition: IfxQspi_PinMap.c:120
IfxQspi3_MRSTA_P02_5_IN
IfxQspi_Mrst_In IfxQspi3_MRSTA_P02_5_IN
Definition: IfxQspi_PinMap.c:58
IfxQspi0_SCLK_P22_7_OUT
IfxQspi_Sclk_Out IfxQspi0_SCLK_P22_7_OUT
Definition: IfxQspi_PinMap.c:130
IfxQspi2_MTSRA_P15_5_IN
IfxQspi_Mtsr_In IfxQspi2_MTSRA_P15_5_IN
Definition: IfxQspi_PinMap.c:87
IfxQspi4_MRSTB_P22_1_IN
IfxQspi_Mrst_In IfxQspi4_MRSTB_P22_1_IN
Definition: IfxQspi_PinMap.c:62
IfxQspi4_SLSO0_P33_10_OUT
IfxQspi_Slso_Out IfxQspi4_SLSO0_P33_10_OUT
Definition: IfxQspi_PinMap.c:214
IfxQspi0_SLSO6_P20_10_OUT
IfxQspi_Slso_Out IfxQspi0_SLSO6_P20_10_OUT
Definition: IfxQspi_PinMap.c:167
IFXQSPI_PINMAP_NUM_MODULES
#define IFXQSPI_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxQspi_PinMap.h:312
IfxQspi_Mtsr_Out
MTSR pin mapping structure.
Definition: IfxQspi_PinMap.h:104
IfxQspi4_SLSO4_P02_12_OUT
IfxQspi_Slso_Out IfxQspi4_SLSO4_P02_12_OUT
Definition: IfxQspi_PinMap.c:219
IfxQspi0_SLSO10_P22_11_OUT
IfxQspi_Slso_Out IfxQspi0_SLSO10_P22_11_OUT
Definition: IfxQspi_PinMap.c:158
IfxQspi3_MTSRC_P01_6_IN
IfxQspi_Mtsr_In IfxQspi3_MTSRC_P01_6_IN
Definition: IfxQspi_PinMap.c:92
IfxQspi3_SLSO10_P01_4_OUT
IfxQspi_Slso_Out IfxQspi3_SLSO10_P01_4_OUT
Definition: IfxQspi_PinMap.c:199
IfxQspi_Mtsr_In
MTSR pin mapping structure.
Definition: IfxQspi_PinMap.h:64
IfxPort_OutputIdx_alt3
Definition: IfxPort.h:131
IfxQspi2_MRSTA_P15_4_IN
IfxQspi_Mrst_In IfxQspi2_MRSTA_P15_4_IN
Definition: IfxQspi_PinMap.c:50
IfxQspi2_SLSO3_P14_3_OUT
IfxQspi_Slso_Out IfxQspi2_SLSO3_P14_3_OUT
Definition: IfxQspi_PinMap.c:191
IfxQspi1_MTSR_P11_9_OUT
IfxQspi_Mtsr_Out IfxQspi1_MTSR_P11_9_OUT
Definition: IfxQspi_PinMap.c:102
IfxQspi0_SLSIB_P20_9_IN
IfxQspi_Slsi_In IfxQspi0_SLSIB_P20_9_IN
Definition: IfxQspi_PinMap.c:149
IfxQspi4_MTSR_P33_12_OUT
IfxQspi_Mtsr_Out IfxQspi4_MTSR_P33_12_OUT
Definition: IfxQspi_PinMap.c:114
Ifx_RxSel_c
Definition: Ifx_Types.h:131
IfxQspi1_SCLK_P11_6_OUT
IfxQspi_Sclk_Out IfxQspi1_SCLK_P11_6_OUT
Definition: IfxQspi_PinMap.c:133
IfxQspi1_MTSRB_P11_9_IN
IfxQspi_Mtsr_In IfxQspi1_MTSRB_P11_9_IN
Definition: IfxQspi_PinMap.c:85
IfxQspi1_MTSR_P10_1_OUT
IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_1_OUT
Definition: IfxQspi_PinMap.c:99
IfxQspi4_SLSO2_P33_3_OUT
IfxQspi_Slso_Out IfxQspi4_SLSO2_P33_3_OUT
Definition: IfxQspi_PinMap.c:216
IfxQspi0_MRST_P22_6_OUT
IfxQspi_Mrst_Out IfxQspi0_MRST_P22_6_OUT
Definition: IfxQspi_PinMap.c:68
IfxQspi2_SLSO8_P20_6_OUT
IfxQspi_Slso_Out IfxQspi2_SLSO8_P20_6_OUT
Definition: IfxQspi_PinMap.c:196
IfxQspi4_SCLKA_P33_11_IN
IfxQspi_Sclk_In IfxQspi4_SCLKA_P33_11_IN
Definition: IfxQspi_PinMap.c:126
IfxQspi0_SCLK_P20_11_OUT
IfxQspi_Sclk_Out IfxQspi0_SCLK_P20_11_OUT
Definition: IfxQspi_PinMap.c:128
IfxQspi2_SCLKN_P13_0_OUT
IfxQspi_Sclk_Out IfxQspi2_SCLKN_P13_0_OUT
Definition: IfxQspi_PinMap.c:134
IfxQspi3_SCLK_P10_8_OUT
IfxQspi_Sclk_Out IfxQspi3_SCLK_P10_8_OUT
Definition: IfxQspi_PinMap.c:143
IfxQspi3_MTSR_P02_6_OUT
IfxQspi_Mtsr_Out IfxQspi3_MTSR_P02_6_OUT
Definition: IfxQspi_PinMap.c:109
IfxQspi1_SCLKA_P10_2_IN
IfxQspi_Sclk_In IfxQspi1_SCLKA_P10_2_IN
Definition: IfxQspi_PinMap.c:118
IfxQspi1_SLSO10_P10_0_OUT
IfxQspi_Slso_Out IfxQspi1_SLSO10_P10_0_OUT
Definition: IfxQspi_PinMap.c:172
IfxQspi1_MRST_P10_1_OUT
IfxQspi_Mrst_Out IfxQspi1_MRST_P10_1_OUT
Definition: IfxQspi_PinMap.c:70
IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS
#define IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS
Definition: IfxQspi_PinMap.h:315
IfxQspi4_SCLK_P22_3_OUT
IfxQspi_Sclk_Out IfxQspi4_SCLK_P22_3_OUT
Definition: IfxQspi_PinMap.c:146
IfxQspi_Slsi_In_pinTable
const IfxQspi_Slsi_In * IfxQspi_Slsi_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS]
Definition: IfxQspi_PinMap.c:452
IfxQspi3_SLSIB_P01_3_IN
IfxQspi_Slsi_In IfxQspi3_SLSIB_P01_3_IN
Definition: IfxQspi_PinMap.c:154
IfxQspi4_SCLKP_P22_1_OUT
IfxQspi_Sclk_Out IfxQspi4_SCLKP_P22_1_OUT
Definition: IfxQspi_PinMap.c:145
IfxQspi0_SLSO13_P15_0_OUT
IfxQspi_Slso_Out IfxQspi0_SLSO13_P15_0_OUT
Definition: IfxQspi_PinMap.c:161
IfxQspi_Mrst_In
MRST pin mapping structure.
Definition: IfxQspi_PinMap.h:56
IfxQspi2_MTSRB_P15_6_IN
IfxQspi_Mtsr_In IfxQspi2_MTSRB_P15_6_IN
Definition: IfxQspi_PinMap.c:88
IfxQspi4_MRST_P33_13_OUT
IfxQspi_Mrst_Out IfxQspi4_MRST_P33_13_OUT
Definition: IfxQspi_PinMap.c:80
IfxQspi_Mtsr_In_pinTable
const IfxQspi_Mtsr_In * IfxQspi_Mtsr_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS]
Definition: IfxQspi_PinMap.c:300
IfxPort_OutputIdx_alt4
Definition: IfxPort.h:132
IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS
#define IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS
Definition: IfxQspi_PinMap.h:319
IfxQspi2_SLSO5_P15_1_OUT
IfxQspi_Slso_Out IfxQspi2_SLSO5_P15_1_OUT
Definition: IfxQspi_PinMap.c:193
IfxQspi1_SLSO9_P10_5_OUT
IfxQspi_Slso_Out IfxQspi1_SLSO9_P10_5_OUT
Definition: IfxQspi_PinMap.c:181
IfxQspi2_MTSRP_P13_3_OUT
IfxQspi_Mtsr_Out IfxQspi2_MTSRP_P13_3_OUT
Definition: IfxQspi_PinMap.c:104
IfxQspi1_SCLK_P10_2_OUT
IfxQspi_Sclk_Out IfxQspi1_SCLK_P10_2_OUT
Definition: IfxQspi_PinMap.c:132
IfxQspi3_SCLKB_P10_8_IN
IfxQspi_Sclk_In IfxQspi3_SCLKB_P10_8_IN
Definition: IfxQspi_PinMap.c:124
IfxQspi1_SLSO1_P20_9_OUT
IfxQspi_Slso_Out IfxQspi1_SLSO1_P20_9_OUT
Definition: IfxQspi_PinMap.c:173
IfxQspi1_MRSTB_P11_3_IN
IfxQspi_Mrst_In IfxQspi1_MRSTB_P11_3_IN
Definition: IfxQspi_PinMap.c:49
IfxQspi0_MRST_P20_12_OUT
IfxQspi_Mrst_Out IfxQspi0_MRST_P20_12_OUT
Definition: IfxQspi_PinMap.c:67
IfxQspi1_MTSRC_P10_4_IN
IfxQspi_Mtsr_In IfxQspi1_MTSRC_P10_4_IN
Definition: IfxQspi_PinMap.c:86
IfxQspi4_SLSO6_P02_13_OUT
IfxQspi_Slso_Out IfxQspi4_SLSO6_P02_13_OUT
Definition: IfxQspi_PinMap.c:223
IfxQspi1_MRSTA_P10_1_IN
IfxQspi_Mrst_In IfxQspi1_MRSTA_P10_1_IN
Definition: IfxQspi_PinMap.c:48
IfxQspi1_SLSO6_P33_10_OUT
IfxQspi_Slso_Out IfxQspi1_SLSO6_P33_10_OUT
Definition: IfxQspi_PinMap.c:178
IfxQspi0_SCLK_P22_8_OUT
IfxQspi_Sclk_Out IfxQspi0_SCLK_P22_8_OUT
Definition: IfxQspi_PinMap.c:131
IfxQspi3_SLSO2_P02_1_OUT
IfxQspi_Slso_Out IfxQspi3_SLSO2_P02_1_OUT
Definition: IfxQspi_PinMap.c:201
IfxQspi2_MRSTCP_P21_3_IN
IfxQspi_Mrst_In IfxQspi2_MRSTCP_P21_3_IN
Definition: IfxQspi_PinMap.c:53
IfxQspi3_SLSO6_P00_8_OUT
IfxQspi_Slso_Out IfxQspi3_SLSO6_P00_8_OUT
Definition: IfxQspi_PinMap.c:208
Ifx_RxSel_f
Definition: Ifx_Types.h:134
IfxQspi0_SLSO2_P20_13_OUT
IfxQspi_Slso_Out IfxQspi0_SLSO2_P20_13_OUT
Definition: IfxQspi_PinMap.c:163
IfxQspi4_MRSTA_P33_13_IN
IfxQspi_Mrst_In IfxQspi4_MRSTA_P33_13_IN
Definition: IfxQspi_PinMap.c:61
IfxQspi4_SLSIA_P33_10_IN
IfxQspi_Slsi_In IfxQspi4_SLSIA_P33_10_IN
Definition: IfxQspi_PinMap.c:155
IfxQspi0_MRST_P22_9_OUT
IfxQspi_Mrst_Out IfxQspi0_MRST_P22_9_OUT
Definition: IfxQspi_PinMap.c:69
IfxQspi0_SLSIA_P20_13_IN
IfxQspi_Slsi_In IfxQspi0_SLSIA_P20_13_IN
Definition: IfxQspi_PinMap.c:148
IfxQspi4_MRSTCN_P21_2_IN
IfxQspi_Mrst_In IfxQspi4_MRSTCN_P21_2_IN
Definition: IfxQspi_PinMap.c:63
IfxQspi_Mrst_Out_pinTable
const IfxQspi_Mrst_Out * IfxQspi_Mrst_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS]
Definition: IfxQspi_PinMap.c:272
IfxQspi0_MRSTB_P22_9_IN
IfxQspi_Mrst_In IfxQspi0_MRSTB_P22_9_IN
Definition: IfxQspi_PinMap.c:46
IfxQspi2_SLSO0_P15_2_OUT
IfxQspi_Slso_Out IfxQspi2_SLSO0_P15_2_OUT
Definition: IfxQspi_PinMap.c:182
IfxQspi_PinMap.h
QSPI I/O map.
IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS
#define IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS
Definition: IfxQspi_PinMap.h:314
IfxQspi0_SCLKC_P22_7_IN
IfxQspi_Sclk_In IfxQspi0_SCLKC_P22_7_IN
Definition: IfxQspi_PinMap.c:117
IfxQspi0_SCLK_P20_13_OUT
IfxQspi_Sclk_Out IfxQspi0_SCLK_P20_13_OUT
Definition: IfxQspi_PinMap.c:129
IfxQspi1_SLSO0_P20_8_OUT
IfxQspi_Slso_Out IfxQspi1_SLSO0_P20_8_OUT
Definition: IfxQspi_PinMap.c:171
IfxQspi1_MTSR_P10_3_OUT
IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_3_OUT
Definition: IfxQspi_PinMap.c:100
IfxQspi3_SLSO3_P02_2_OUT
IfxQspi_Slso_Out IfxQspi3_SLSO3_P02_2_OUT
Definition: IfxQspi_PinMap.c:203
IfxQspi4_SLSO5_P23_4_OUT
IfxQspi_Slso_Out IfxQspi4_SLSO5_P23_4_OUT
Definition: IfxQspi_PinMap.c:222
IfxQspi0_SLSO5_P11_2_OUT
IfxQspi_Slso_Out IfxQspi0_SLSO5_P11_2_OUT
Definition: IfxQspi_PinMap.c:166
IfxQspi0_MRSTA_P20_12_IN
IfxQspi_Mrst_In IfxQspi0_MRSTA_P20_12_IN
Definition: IfxQspi_PinMap.c:45
IfxQspi0_SCLKB_P22_8_IN
IfxQspi_Sclk_In IfxQspi0_SCLKB_P22_8_IN
Definition: IfxQspi_PinMap.c:116
IfxQspi2_SLSO12_P32_6_OUT
IfxQspi_Slso_Out IfxQspi2_SLSO12_P32_6_OUT
Definition: IfxQspi_PinMap.c:187
IfxQspi1_MTSRA_P10_3_IN
IfxQspi_Mtsr_In IfxQspi1_MTSRA_P10_3_IN
Definition: IfxQspi_PinMap.c:84
IfxQspi0_MTSR_P22_10_OUT
IfxQspi_Mtsr_Out IfxQspi0_MTSR_P22_10_OUT
Definition: IfxQspi_PinMap.c:97
IfxQspi0_SLSO11_P23_6_OUT
IfxQspi_Slso_Out IfxQspi0_SLSO11_P23_6_OUT
Definition: IfxQspi_PinMap.c:159
IfxQspi2_MRSTFN_P14_9_IN
IfxQspi_Mrst_In IfxQspi2_MRSTFN_P14_9_IN
Definition: IfxQspi_PinMap.c:56
IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS
#define IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS
Definition: IfxQspi_PinMap.h:316
IfxQspi0_MTSR_P20_12_OUT
IfxQspi_Mtsr_Out IfxQspi0_MTSR_P20_12_OUT
Definition: IfxQspi_PinMap.c:95
IfxQspi_Sclk_In_pinTable
const IfxQspi_Sclk_In * IfxQspi_Sclk_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS]
Definition: IfxQspi_PinMap.c:371
IfxQspi2_MRSTD_P34_4_IN
IfxQspi_Mrst_In IfxQspi2_MRSTD_P34_4_IN
Definition: IfxQspi_PinMap.c:54
IfxQspi0_MTSR_P22_5_OUT
IfxQspi_Mtsr_Out IfxQspi0_MTSR_P22_5_OUT
Definition: IfxQspi_PinMap.c:98
IfxQspi4_SCLK_P33_11_OUT
IfxQspi_Sclk_Out IfxQspi4_SCLK_P33_11_OUT
Definition: IfxQspi_PinMap.c:147
IfxQspi0_SCLKA_P20_11_IN
IfxQspi_Sclk_In IfxQspi0_SCLKA_P20_11_IN
Definition: IfxQspi_PinMap.c:115
IfxQspi3_SLSO4_P00_2_OUT
IfxQspi_Slso_Out IfxQspi3_SLSO4_P00_2_OUT
Definition: IfxQspi_PinMap.c:204
IfxQspi3_SLSO6_P02_15_OUT
IfxQspi_Slso_Out IfxQspi3_SLSO6_P02_15_OUT
Definition: IfxQspi_PinMap.c:209
IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS
#define IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS
Definition: IfxQspi_PinMap.h:320
IfxQspi1_SLSO4_P11_11_OUT
IfxQspi_Slso_Out IfxQspi1_SLSO4_P11_11_OUT
Definition: IfxQspi_PinMap.c:176
IfxQspi2_SCLKP_P13_1_OUT
IfxQspi_Sclk_Out IfxQspi2_SCLKP_P13_1_OUT
Definition: IfxQspi_PinMap.c:135
IfxQspi_Mrst_In_pinTable
const IfxQspi_Mrst_In * IfxQspi_Mrst_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS]
Definition: IfxQspi_PinMap.c:229
IfxQspi0_MTSRA_P20_14_IN
IfxQspi_Mtsr_In IfxQspi0_MTSRA_P20_14_IN
Definition: IfxQspi_PinMap.c:81
IfxQspi1_SLSO3_P11_10_OUT
IfxQspi_Slso_Out IfxQspi1_SLSO3_P11_10_OUT
Definition: IfxQspi_PinMap.c:175
IfxQspi2_SLSO10_P33_2_OUT
IfxQspi_Slso_Out IfxQspi2_SLSO10_P33_2_OUT
Definition: IfxQspi_PinMap.c:183
IfxQspi2_SLSO12_P33_4_OUT
IfxQspi_Slso_Out IfxQspi2_SLSO12_P33_4_OUT
Definition: IfxQspi_PinMap.c:188
IfxQspi2_SLSO2_P14_6_OUT
IfxQspi_Slso_Out IfxQspi2_SLSO2_P14_6_OUT
Definition: IfxQspi_PinMap.c:190
IfxQspi3_SLSO7_P00_9_OUT
IfxQspi_Slso_Out IfxQspi3_SLSO7_P00_9_OUT
Definition: IfxQspi_PinMap.c:210
IfxQspi3_SCLKA_P02_7_IN
IfxQspi_Sclk_In IfxQspi3_SCLKA_P02_7_IN
Definition: IfxQspi_PinMap.c:123
IfxPort_OutputIdx_alt5
Definition: IfxPort.h:133
IfxQspi_Slso_Out_pinTable
const IfxQspi_Slso_Out * IfxQspi_Slso_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_NUM_SLAVESELECTS][IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS]
Definition: IfxQspi_PinMap.c:475
IfxQspi_Sclk_Out_pinTable
const IfxQspi_Sclk_Out * IfxQspi_Sclk_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS]
Definition: IfxQspi_PinMap.c:404
IfxQspi0_SLSO9_P20_3_OUT
IfxQspi_Slso_Out IfxQspi0_SLSO9_P20_3_OUT
Definition: IfxQspi_PinMap.c:170
IfxQspi2_SLSIB_P15_1_IN
IfxQspi_Slsi_In IfxQspi2_SLSIB_P15_1_IN
Definition: IfxQspi_PinMap.c:152
IfxQspi0_SLSO7_P33_5_OUT
IfxQspi_Slso_Out IfxQspi0_SLSO7_P33_5_OUT
Definition: IfxQspi_PinMap.c:168
IfxQspi2_SLSO11_P33_15_OUT
IfxQspi_Slso_Out IfxQspi2_SLSO11_P33_15_OUT
Definition: IfxQspi_PinMap.c:185
IfxQspi_Mtsr_Out_pinTable
const IfxQspi_Mtsr_Out * IfxQspi_Mtsr_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS]
Definition: IfxQspi_PinMap.c:333
IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS
#define IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS
Definition: IfxQspi_PinMap.h:317
IfxQspi4_MTSR_P22_0_OUT
IfxQspi_Mtsr_Out IfxQspi4_MTSR_P22_0_OUT
Definition: IfxQspi_PinMap.c:113
IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS
#define IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS
Definition: IfxQspi_PinMap.h:321
IfxQspi1_SLSO8_P10_4_OUT
IfxQspi_Slso_Out IfxQspi1_SLSO8_P10_4_OUT
Definition: IfxQspi_PinMap.c:180
IfxQspi3_SLSO3_P00_5_OUT
IfxQspi_Slso_Out IfxQspi3_SLSO3_P00_5_OUT
Definition: IfxQspi_PinMap.c:202
IfxQspi0_MRSTC_P22_6_IN
IfxQspi_Mrst_In IfxQspi0_MRSTC_P22_6_IN
Definition: IfxQspi_PinMap.c:47
IfxQspi4_SLSIB_P22_2_IN
IfxQspi_Slsi_In IfxQspi4_SLSIB_P22_2_IN
Definition: IfxQspi_PinMap.c:156
IfxQspi3_MTSRA_P02_6_IN
IfxQspi_Mtsr_In IfxQspi3_MTSRA_P02_6_IN
Definition: IfxQspi_PinMap.c:90
IfxQspi2_MRST_P15_4_OUT
IfxQspi_Mrst_Out IfxQspi2_MRST_P15_4_OUT
Definition: IfxQspi_PinMap.c:73
IfxQspi3_MTSR_P10_6_OUT
IfxQspi_Mtsr_Out IfxQspi3_MTSR_P10_6_OUT
Definition: IfxQspi_PinMap.c:110
IfxQspi2_MTSRN_P13_2_OUT
IfxQspi_Mtsr_Out IfxQspi2_MTSRN_P13_2_OUT
Definition: IfxQspi_PinMap.c:103
IfxQspi1_SLSIA_P11_10_IN
IfxQspi_Slsi_In IfxQspi1_SLSIA_P11_10_IN
Definition: IfxQspi_PinMap.c:150
IFXQSPI_PINMAP_NUM_SLAVESELECTS
#define IFXQSPI_PINMAP_NUM_SLAVESELECTS
Definition: IfxQspi_PinMap.h:313


iLLD_TC38A: IfxQspi_PinMap.h Source File

  • _PinMap
IfxQspi_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxQspi_PinMap.h
3 * \brief QSPI I/O map
4 * \ingroup IfxLld_Qspi
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Qspi_pinmap QSPI Pin Mapping
42 * \ingroup IfxLld_Qspi
43 */
44
45 #ifndef IFXQSPI_PINMAP_H
46 #define IFXQSPI_PINMAP_H
47
48 #include <IfxQspi_reg.h>
49 #include <_Impl/IfxQspi_cfg.h>
50 #include <Port/Std/IfxPort.h>
51
52 /** \addtogroup IfxLld_Qspi_pinmap
53 * \{ */
54
55 /** \brief MRST pin mapping structure */
56 typedef const struct
57 {
58 Ifx_QSPI* module; /**< \brief Base address */
59 IfxPort_Pin pin; /**< \brief Port pin */
60 Ifx_RxSel select; /**< \brief Input multiplexer value */
61 } IfxQspi_Mrst_In;
62
63 /** \brief MTSR pin mapping structure */
64 typedef const struct
65 {
66 Ifx_QSPI* module; /**< \brief Base address */
67 IfxPort_Pin pin; /**< \brief Port pin */
68 Ifx_RxSel select; /**< \brief Input multiplexer value */
69 } IfxQspi_Mtsr_In;
70
71 /** \brief SCLK pin mapping structure */
72 typedef const struct
73 {
74 Ifx_QSPI* module; /**< \brief Base address */
75 IfxPort_Pin pin; /**< \brief Port pin */
76 Ifx_RxSel select; /**< \brief Input multiplexer value */
77 } IfxQspi_Sclk_In;
78
79 /** \brief SLSI pin mapping structure */
80 typedef const struct
81 {
82 Ifx_QSPI* module; /**< \brief Base address */
83 IfxPort_Pin pin; /**< \brief Port pin */
84 Ifx_RxSel select; /**< \brief Input multiplexer value */
85 } IfxQspi_Slsi_In;
86
87 /** \brief HSICIN pin mapping structure */
88 typedef const struct
89 {
90 Ifx_QSPI* module; /**< \brief Base address */
91 IfxPort_Pin pin; /**< \brief Port pin */
92 Ifx_RxSel select; /**< \brief Input multiplexer value */
93 } IfxQspi_Hsicin_In;
94
95 /** \brief MRST pin mapping structure */
96 typedef const struct
97 {
98 Ifx_QSPI* module; /**< \brief Base address */
99 IfxPort_Pin pin; /**< \brief Port pin */
100 IfxPort_OutputIdx select; /**< \brief Port control code */
101 } IfxQspi_Mrst_Out;
102
103 /** \brief MTSR pin mapping structure */
104 typedef const struct
105 {
106 Ifx_QSPI* module; /**< \brief Base address */
107 IfxPort_Pin pin; /**< \brief Port pin */
108 IfxPort_OutputIdx select; /**< \brief Port control code */
109 } IfxQspi_Mtsr_Out;
110
111 /** \brief SCLK pin mapping structure */
112 typedef const struct
113 {
114 Ifx_QSPI* module; /**< \brief Base address */
115 IfxPort_Pin pin; /**< \brief Port pin */
116 IfxPort_OutputIdx select; /**< \brief Port control code */
117 } IfxQspi_Sclk_Out;
118
119 /** \brief SLSO pin mapping structure */
120 typedef const struct
121 {
122 Ifx_QSPI* module; /**< \brief Base address */
123 sint32 slsoNr; /**< \brief Slave Select */
124 IfxPort_Pin pin; /**< \brief Port pin */
125 IfxPort_OutputIdx select; /**< \brief Port control code */
126 } IfxQspi_Slso_Out;
127
128 IFX_EXTERN IfxQspi_Mrst_In IfxQspi0_MRSTA_P20_12_IN; /**< \brief Master SPI data input */
129 IFX_EXTERN IfxQspi_Mrst_In IfxQspi0_MRSTB_P22_9_IN; /**< \brief Master SPI data input */
130 IFX_EXTERN IfxQspi_Mrst_In IfxQspi0_MRSTC_P22_6_IN; /**< \brief Master SPI data input */
131 IFX_EXTERN IfxQspi_Mrst_In IfxQspi1_MRSTA_P10_1_IN; /**< \brief Master SPI data input */
132 IFX_EXTERN IfxQspi_Mrst_In IfxQspi1_MRSTB_P11_3_IN; /**< \brief Master SPI data input */
133 IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTA_P15_4_IN; /**< \brief Master SPI data input */
134 IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTB_P15_7_IN; /**< \brief Master SPI data input */
135 IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTCN_P21_2_IN; /**< \brief Master SPI data input (LVDS N line) */
136 IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTCP_P21_3_IN; /**< \brief Master SPI data input (LVDS P line) */
137 IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTD_P34_4_IN; /**< \brief Master SPI data input */
138 IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTE_P15_2_IN; /**< \brief Master SPI data input */
139 IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTFN_P14_9_IN; /**< \brief Master SPI data input (LVDS N line) */
140 IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTFP_P14_10_IN; /**< \brief Master SPI data input (LVDS P line) */
141 IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTA_P02_5_IN; /**< \brief Master SPI data input */
142 IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTB_P10_7_IN; /**< \brief Master SPI data input */
143 IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTC_P01_5_IN; /**< \brief Master SPI data input */
144 IFX_EXTERN IfxQspi_Mrst_In IfxQspi4_MRSTA_P33_13_IN; /**< \brief Master SPI data input */
145 IFX_EXTERN IfxQspi_Mrst_In IfxQspi4_MRSTB_P22_1_IN; /**< \brief Master SPI data input */
146 IFX_EXTERN IfxQspi_Mrst_In IfxQspi4_MRSTCN_P21_2_IN; /**< \brief Master SPI data input (LVDS N line) */
147 IFX_EXTERN IfxQspi_Mrst_In IfxQspi4_MRSTCP_P21_3_IN; /**< \brief Master SPI data input (LVDS P line) */
148 IFX_EXTERN IfxQspi_Mrst_In IfxQspi4_MRSTDN_P21_0_IN; /**< \brief Master SPI data input (LVDS N line) */
149 IFX_EXTERN IfxQspi_Mrst_In IfxQspi4_MRSTDP_P21_1_IN; /**< \brief Master SPI data input (LVDS P line) */
150 IFX_EXTERN IfxQspi_Mrst_Out IfxQspi0_MRST_P20_12_OUT; /**< \brief Slave SPI data output */
151 IFX_EXTERN IfxQspi_Mrst_Out IfxQspi0_MRST_P22_6_OUT; /**< \brief Slave SPI data output */
152 IFX_EXTERN IfxQspi_Mrst_Out IfxQspi0_MRST_P22_9_OUT; /**< \brief Slave SPI data output */
153 IFX_EXTERN IfxQspi_Mrst_Out IfxQspi1_MRST_P10_1_OUT; /**< \brief Slave SPI data output */
154 IFX_EXTERN IfxQspi_Mrst_Out IfxQspi1_MRST_P10_6_OUT; /**< \brief Slave SPI data output */
155 IFX_EXTERN IfxQspi_Mrst_Out IfxQspi1_MRST_P11_3_OUT; /**< \brief Slave SPI data output */
156 IFX_EXTERN IfxQspi_Mrst_Out IfxQspi2_MRST_P15_4_OUT; /**< \brief Slave SPI data output */
157 IFX_EXTERN IfxQspi_Mrst_Out IfxQspi2_MRST_P15_7_OUT; /**< \brief Slave SPI data output */
158 IFX_EXTERN IfxQspi_Mrst_Out IfxQspi2_MRST_P34_4_OUT; /**< \brief Slave SPI data output */
159 IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P01_5_OUT; /**< \brief Slave SPI data output */
160 IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P02_5_OUT; /**< \brief Slave SPI data output */
161 IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P10_7_OUT; /**< \brief Slave SPI data output */
162 IFX_EXTERN IfxQspi_Mrst_Out IfxQspi4_MRST_P22_1_OUT; /**< \brief Slave SPI data output */
163 IFX_EXTERN IfxQspi_Mrst_Out IfxQspi4_MRST_P33_13_OUT; /**< \brief Slave SPI data output */
164 IFX_EXTERN IfxQspi_Mtsr_In IfxQspi0_MTSRA_P20_14_IN; /**< \brief Slave SPI data input */
165 IFX_EXTERN IfxQspi_Mtsr_In IfxQspi0_MTSRB_P22_10_IN; /**< \brief Slave SPI data input */
166 IFX_EXTERN IfxQspi_Mtsr_In IfxQspi0_MTSRC_P22_5_IN; /**< \brief Slave SPI data input */
167 IFX_EXTERN IfxQspi_Mtsr_In IfxQspi1_MTSRA_P10_3_IN; /**< \brief Slave SPI data input */
168 IFX_EXTERN IfxQspi_Mtsr_In IfxQspi1_MTSRB_P11_9_IN; /**< \brief Slave SPI data input */
169 IFX_EXTERN IfxQspi_Mtsr_In IfxQspi1_MTSRC_P10_4_IN; /**< \brief Slave SPI data input */
170 IFX_EXTERN IfxQspi_Mtsr_In IfxQspi2_MTSRA_P15_5_IN; /**< \brief Slave SPI data input */
171 IFX_EXTERN IfxQspi_Mtsr_In IfxQspi2_MTSRB_P15_6_IN; /**< \brief Slave SPI data input */
172 IFX_EXTERN IfxQspi_Mtsr_In IfxQspi2_MTSRD_P34_5_IN; /**< \brief Slave SPI data input */
173 IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRA_P02_6_IN; /**< \brief Slave SPI data input */
174 IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRB_P10_6_IN; /**< \brief Slave SPI data input */
175 IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRC_P01_6_IN; /**< \brief Slave SPI data input */
176 IFX_EXTERN IfxQspi_Mtsr_In IfxQspi4_MTSRA_P33_12_IN; /**< \brief Slave SPI data input */
177 IFX_EXTERN IfxQspi_Mtsr_In IfxQspi4_MTSRB_P22_0_IN; /**< \brief Slave SPI data input */
178 IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi0_MTSR_P20_12_OUT; /**< \brief Master SPI data output */
179 IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi0_MTSR_P20_14_OUT; /**< \brief Master SPI data output */
180 IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi0_MTSR_P22_10_OUT; /**< \brief Master SPI data output */
181 IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi0_MTSR_P22_5_OUT; /**< \brief Master SPI data output */
182 IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_1_OUT; /**< \brief Master SPI data output */
183 IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_3_OUT; /**< \brief Master SPI data output */
184 IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_4_OUT; /**< \brief Master SPI data output */
185 IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P11_9_OUT; /**< \brief Master SPI data output */
186 IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSRN_P13_2_OUT; /**< \brief Master SPI data output (LVDS N line) */
187 IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSRP_P13_3_OUT; /**< \brief Master SPI data output (LVDS P line) */
188 IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSR_P15_5_OUT; /**< \brief Master SPI data output */
189 IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSR_P15_6_OUT; /**< \brief Master SPI data output */
190 IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSR_P34_5_OUT; /**< \brief Master SPI data output */
191 IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P01_6_OUT; /**< \brief Master SPI data output */
192 IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P02_6_OUT; /**< \brief Master SPI data output */
193 IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P10_6_OUT; /**< \brief Master SPI data output */
194 IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi4_MTSRN_P22_2_OUT; /**< \brief Master SPI data output (LVDS N line) */
195 IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi4_MTSRP_P22_3_OUT; /**< \brief Master SPI data output (LVDS P line) */
196 IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi4_MTSR_P22_0_OUT; /**< \brief Master SPI data output */
197 IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi4_MTSR_P33_12_OUT; /**< \brief Master SPI data output */
198 IFX_EXTERN IfxQspi_Sclk_In IfxQspi0_SCLKA_P20_11_IN; /**< \brief Slave SPI clock inputs */
199 IFX_EXTERN IfxQspi_Sclk_In IfxQspi0_SCLKB_P22_8_IN; /**< \brief Slave SPI clock inputs */
200 IFX_EXTERN IfxQspi_Sclk_In IfxQspi0_SCLKC_P22_7_IN; /**< \brief Slave SPI clock inputs */
201 IFX_EXTERN IfxQspi_Sclk_In IfxQspi1_SCLKA_P10_2_IN; /**< \brief Slave SPI clock inputs */
202 IFX_EXTERN IfxQspi_Sclk_In IfxQspi1_SCLKB_P11_6_IN; /**< \brief Slave SPI clock inputs */
203 IFX_EXTERN IfxQspi_Sclk_In IfxQspi2_SCLKA_P15_3_IN; /**< \brief Slave SPI clock inputs */
204 IFX_EXTERN IfxQspi_Sclk_In IfxQspi2_SCLKB_P15_8_IN; /**< \brief Slave SPI clock inputs */
205 IFX_EXTERN IfxQspi_Sclk_In IfxQspi2_SCLKD_P33_14_IN; /**< \brief Slave SPI clock inputs */
206 IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKA_P02_7_IN; /**< \brief Slave SPI clock inputs */
207 IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKB_P10_8_IN; /**< \brief Slave SPI clock inputs */
208 IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKC_P01_7_IN; /**< \brief Slave SPI clock inputs */
209 IFX_EXTERN IfxQspi_Sclk_In IfxQspi4_SCLKA_P33_11_IN; /**< \brief Slave SPI clock inputs */
210 IFX_EXTERN IfxQspi_Sclk_In IfxQspi4_SCLKB_P22_3_IN; /**< \brief Slave SPI clock inputs */
211 IFX_EXTERN IfxQspi_Sclk_Out IfxQspi0_SCLK_P20_11_OUT; /**< \brief Master SPI clock output */
212 IFX_EXTERN IfxQspi_Sclk_Out IfxQspi0_SCLK_P20_13_OUT; /**< \brief Master SPI clock output */
213 IFX_EXTERN IfxQspi_Sclk_Out IfxQspi0_SCLK_P22_7_OUT; /**< \brief Master SPI clock output */
214 IFX_EXTERN IfxQspi_Sclk_Out IfxQspi0_SCLK_P22_8_OUT; /**< \brief Master SPI clock output */
215 IFX_EXTERN IfxQspi_Sclk_Out IfxQspi1_SCLK_P10_2_OUT; /**< \brief Master SPI clock output */
216 IFX_EXTERN IfxQspi_Sclk_Out IfxQspi1_SCLK_P11_6_OUT; /**< \brief Master SPI clock output */
217 IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLKN_P13_0_OUT; /**< \brief Master SPI clock output (LVDS N line) */
218 IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLKP_P13_1_OUT; /**< \brief Master SPI clock output (LVDS P line) */
219 IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_3_OUT; /**< \brief Master SPI clock output */
220 IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_6_OUT; /**< \brief Master SPI clock output */
221 IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_8_OUT; /**< \brief Master SPI clock output */
222 IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P33_14_OUT; /**< \brief Master SPI clock output */
223 IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P33_1_OUT; /**< \brief Master SPI clock output */
224 IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P01_7_OUT; /**< \brief Master SPI clock output */
225 IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P02_7_OUT; /**< \brief Master SPI clock output */
226 IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P10_8_OUT; /**< \brief Master SPI clock output */
227 IFX_EXTERN IfxQspi_Sclk_Out IfxQspi4_SCLKN_P22_0_OUT; /**< \brief Master SPI clock output (LVDS N line) */
228 IFX_EXTERN IfxQspi_Sclk_Out IfxQspi4_SCLKP_P22_1_OUT; /**< \brief Master SPI clock output (LVDS P line) */
229 IFX_EXTERN IfxQspi_Sclk_Out IfxQspi4_SCLK_P22_3_OUT; /**< \brief Master SPI clock output */
230 IFX_EXTERN IfxQspi_Sclk_Out IfxQspi4_SCLK_P33_11_OUT; /**< \brief Master SPI clock output */
231 IFX_EXTERN IfxQspi_Slsi_In IfxQspi0_SLSIA_P20_13_IN; /**< \brief Slave select input */
232 IFX_EXTERN IfxQspi_Slsi_In IfxQspi0_SLSIB_P20_9_IN; /**< \brief Slave select input */
233 IFX_EXTERN IfxQspi_Slsi_In IfxQspi1_SLSIA_P11_10_IN; /**< \brief Slave select input */
234 IFX_EXTERN IfxQspi_Slsi_In IfxQspi2_SLSIA_P15_2_IN; /**< \brief Slave select input */
235 IFX_EXTERN IfxQspi_Slsi_In IfxQspi2_SLSIB_P15_1_IN; /**< \brief Slave select input */
236 IFX_EXTERN IfxQspi_Slsi_In IfxQspi3_SLSIA_P02_4_IN; /**< \brief Slave select input */
237 IFX_EXTERN IfxQspi_Slsi_In IfxQspi3_SLSIB_P01_3_IN; /**< \brief Slave select input */
238 IFX_EXTERN IfxQspi_Slsi_In IfxQspi4_SLSIA_P33_10_IN; /**< \brief Slave select input */
239 IFX_EXTERN IfxQspi_Slsi_In IfxQspi4_SLSIB_P22_2_IN; /**< \brief Slave select input */
240 IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO0_P20_8_OUT; /**< \brief Master slave select output */
241 IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO10_P22_11_OUT; /**< \brief Master slave select output */
242 IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO11_P23_6_OUT; /**< \brief Master slave select output */
243 IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO12_P22_4_OUT; /**< \brief Master slave select output */
244 IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO13_P15_0_OUT; /**< \brief Master slave select output */
245 IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO1_P20_9_OUT; /**< \brief Master slave select output */
246 IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO2_P20_13_OUT; /**< \brief Master slave select output */
247 IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO3_P11_10_OUT; /**< \brief Master slave select output */
248 IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO4_P11_11_OUT; /**< \brief Master slave select output */
249 IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO5_P11_2_OUT; /**< \brief Master slave select output */
250 IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO6_P20_10_OUT; /**< \brief Master slave select output */
251 IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO7_P33_5_OUT; /**< \brief Master slave select output */
252 IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO8_P20_6_OUT; /**< \brief Master slave select output */
253 IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO9_P20_3_OUT; /**< \brief Master slave select output */
254 IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO0_P20_8_OUT; /**< \brief Master slave select output */
255 IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO10_P10_0_OUT; /**< \brief Master slave select output */
256 IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO1_P20_9_OUT; /**< \brief Master slave select output */
257 IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO2_P20_13_OUT; /**< \brief Master slave select output */
258 IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO3_P11_10_OUT; /**< \brief Master slave select output */
259 IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO4_P11_11_OUT; /**< \brief Master slave select output */
260 IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO5_P11_2_OUT; /**< \brief Master slave select output */
261 IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO6_P33_10_OUT; /**< \brief Master slave select output */
262 IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO7_P33_5_OUT; /**< \brief Master slave select output */
263 IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO8_P10_4_OUT; /**< \brief Master slave select output */
264 IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO9_P10_5_OUT; /**< \brief Master slave select output */
265 IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO0_P15_2_OUT; /**< \brief Master slave select output */
266 IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO10_P33_2_OUT; /**< \brief Master slave select output */
267 IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO10_P34_3_OUT; /**< \brief Master slave select output */
268 IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO11_P33_15_OUT; /**< \brief Master slave select output */
269 IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO11_P33_6_OUT; /**< \brief Master slave select output */
270 IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO12_P32_6_OUT; /**< \brief Master slave select output */
271 IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO12_P33_4_OUT; /**< \brief Master slave select output */
272 IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO1_P14_2_OUT; /**< \brief Master slave select output */
273 IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO2_P14_6_OUT; /**< \brief Master slave select output */
274 IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO3_P14_3_OUT; /**< \brief Master slave select output */
275 IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO4_P14_7_OUT; /**< \brief Master slave select output */
276 IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO5_P15_1_OUT; /**< \brief Master slave select output */
277 IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO6_P33_13_OUT; /**< \brief Master slave select output */
278 IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO7_P20_10_OUT; /**< \brief Master slave select output */
279 IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO8_P20_6_OUT; /**< \brief Master slave select output */
280 IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO9_P20_3_OUT; /**< \brief Master slave select output */
281 IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO0_P02_4_OUT; /**< \brief Master slave select output */
282 IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO10_P01_4_OUT; /**< \brief Master slave select output */
283 IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO1_P02_0_OUT; /**< \brief Master slave select output */
284 IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO2_P02_1_OUT; /**< \brief Master slave select output */
285 IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO3_P00_5_OUT; /**< \brief Master slave select output */
286 IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO3_P02_2_OUT; /**< \brief Master slave select output */
287 IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO4_P00_2_OUT; /**< \brief Master slave select output */
288 IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO4_P02_3_OUT; /**< \brief Master slave select output */
289 IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO5_P02_12_OUT; /**< \brief Master slave select output */
290 IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO5_P02_8_OUT; /**< \brief Master slave select output */
291 IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO6_P00_8_OUT; /**< \brief Master slave select output */
292 IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO6_P02_15_OUT; /**< \brief Master slave select output */
293 IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO7_P00_9_OUT; /**< \brief Master slave select output */
294 IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO7_P02_13_OUT; /**< \brief Master slave select output */
295 IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO8_P10_5_OUT; /**< \brief Master slave select output */
296 IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO9_P01_3_OUT; /**< \brief Master slave select output */
297 IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO0_P33_10_OUT; /**< \brief Master slave select output */
298 IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO1_P33_9_OUT; /**< \brief Master slave select output */
299 IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO2_P33_3_OUT; /**< \brief Master slave select output */
300 IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO2_P33_8_OUT; /**< \brief Master slave select output */
301 IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO3_P22_2_OUT; /**< \brief Master slave select output */
302 IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO4_P02_12_OUT; /**< \brief Master slave select output */
303 IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO4_P23_5_OUT; /**< \brief Master slave select output */
304 IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO5_P02_15_OUT; /**< \brief Master slave select output */
305 IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO5_P23_4_OUT; /**< \brief Master slave select output */
306 IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO6_P02_13_OUT; /**< \brief Master slave select output */
307 IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO6_P23_1_OUT; /**< \brief Master slave select output */
308 IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO7_P02_1_OUT; /**< \brief Master slave select output */
309 IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO7_P33_7_OUT; /**< \brief Master slave select output */
310
311 /** \brief Table dimensions */
312 #define IFXQSPI_PINMAP_NUM_MODULES 5
313 #define IFXQSPI_PINMAP_NUM_SLAVESELECTS 14
314 #define IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS 6
315 #define IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS 3
316 #define IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS 4
317 #define IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS 5
318 #define IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS 4
319 #define IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS 7
320 #define IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS 2
321 #define IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS 2
322
323
324 /** \brief IfxQspi_Mrst_In table */
325 IFX_EXTERN const IfxQspi_Mrst_In *IfxQspi_Mrst_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS];
326
327 /** \brief IfxQspi_Mrst_Out table */
328 IFX_EXTERN const IfxQspi_Mrst_Out *IfxQspi_Mrst_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS];
329
330 /** \brief IfxQspi_Mtsr_In table */
331 IFX_EXTERN const IfxQspi_Mtsr_In *IfxQspi_Mtsr_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS];
332
333 /** \brief IfxQspi_Mtsr_Out table */
334 IFX_EXTERN const IfxQspi_Mtsr_Out *IfxQspi_Mtsr_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS];
335
336 /** \brief IfxQspi_Sclk_In table */
337 IFX_EXTERN const IfxQspi_Sclk_In *IfxQspi_Sclk_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS];
338
339 /** \brief IfxQspi_Sclk_Out table */
340 IFX_EXTERN const IfxQspi_Sclk_Out *IfxQspi_Sclk_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS];
341
342 /** \brief IfxQspi_Slsi_In table */
343 IFX_EXTERN const IfxQspi_Slsi_In *IfxQspi_Slsi_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS];
344
345 /** \brief IfxQspi_Slso_Out table */
346 IFX_EXTERN const IfxQspi_Slso_Out *IfxQspi_Slso_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_NUM_SLAVESELECTS][IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS];
347
348 /** \} */
349
350 #endif /* IFXQSPI_PINMAP_H */
IfxQspi1_MRSTA_P10_1_IN
IFX_EXTERN IfxQspi_Mrst_In IfxQspi1_MRSTA_P10_1_IN
Master SPI data input.
Definition: IfxQspi_PinMap.h:131
IfxQspi_Mrst_Out
MRST pin mapping structure.
Definition: IfxQspi_PinMap.h:96
IfxQspi2_SCLKP_P13_1_OUT
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLKP_P13_1_OUT
Master SPI clock output (LVDS P line)
Definition: IfxQspi_PinMap.h:218
IfxQspi2_SLSO6_P33_13_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO6_P33_13_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:277
IfxQspi4_MRST_P22_1_OUT
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi4_MRST_P22_1_OUT
Slave SPI data output.
Definition: IfxQspi_PinMap.h:162
IfxQspi4_MRSTDP_P21_1_IN
IFX_EXTERN IfxQspi_Mrst_In IfxQspi4_MRSTDP_P21_1_IN
Master SPI data input (LVDS P line)
Definition: IfxQspi_PinMap.h:149
IfxQspi_Slsi_In
SLSI pin mapping structure.
Definition: IfxQspi_PinMap.h:80
IfxQspi0_MTSRB_P22_10_IN
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi0_MTSRB_P22_10_IN
Slave SPI data input.
Definition: IfxQspi_PinMap.h:165
IfxQspi1_SLSO4_P11_11_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO4_P11_11_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:259
IfxQspi2_SCLK_P33_14_OUT
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P33_14_OUT
Master SPI clock output.
Definition: IfxQspi_PinMap.h:222
IfxQspi4_SCLK_P33_11_OUT
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi4_SCLK_P33_11_OUT
Master SPI clock output.
Definition: IfxQspi_PinMap.h:230
IfxQspi4_MRST_P33_13_OUT
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi4_MRST_P33_13_OUT
Slave SPI data output.
Definition: IfxQspi_PinMap.h:163
IfxQspi1_MTSR_P10_3_OUT
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_3_OUT
Master SPI data output.
Definition: IfxQspi_PinMap.h:183
IfxQspi3_SLSO1_P02_0_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO1_P02_0_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:283
IfxQspi4_SCLKN_P22_0_OUT
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi4_SCLKN_P22_0_OUT
Master SPI clock output (LVDS N line)
Definition: IfxQspi_PinMap.h:227
IfxQspi2_MRSTA_P15_4_IN
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTA_P15_4_IN
Master SPI data input.
Definition: IfxQspi_PinMap.h:133
IfxQspi3_SLSO4_P00_2_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO4_P00_2_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:287
IfxQspi3_SLSO7_P02_13_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO7_P02_13_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:294
IfxQspi4_MTSRP_P22_3_OUT
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi4_MTSRP_P22_3_OUT
Master SPI data output (LVDS P line)
Definition: IfxQspi_PinMap.h:195
IfxQspi1_MRST_P10_1_OUT
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi1_MRST_P10_1_OUT
Slave SPI data output.
Definition: IfxQspi_PinMap.h:153
IfxQspi3_MTSRC_P01_6_IN
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRC_P01_6_IN
Slave SPI data input.
Definition: IfxQspi_PinMap.h:175
IfxQspi0_SLSO0_P20_8_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO0_P20_8_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:240
IfxQspi3_SLSO3_P02_2_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO3_P02_2_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:286
IfxQspi0_MRSTA_P20_12_IN
IFX_EXTERN IfxQspi_Mrst_In IfxQspi0_MRSTA_P20_12_IN
Master SPI data input.
Definition: IfxQspi_PinMap.h:128
IfxQspi3_MTSR_P02_6_OUT
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P02_6_OUT
Master SPI data output.
Definition: IfxQspi_PinMap.h:192
IfxQspi3_SLSIA_P02_4_IN
IFX_EXTERN IfxQspi_Slsi_In IfxQspi3_SLSIA_P02_4_IN
Slave select input.
Definition: IfxQspi_PinMap.h:236
IfxQspi0_SCLKC_P22_7_IN
IFX_EXTERN IfxQspi_Sclk_In IfxQspi0_SCLKC_P22_7_IN
Slave SPI clock inputs.
Definition: IfxQspi_PinMap.h:200
IfxQspi0_SCLK_P20_11_OUT
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi0_SCLK_P20_11_OUT
Master SPI clock output.
Definition: IfxQspi_PinMap.h:211
IfxQspi1_SLSO1_P20_9_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO1_P20_9_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:256
IfxQspi4_SLSO2_P33_3_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO2_P33_3_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:299
IfxQspi0_MTSRA_P20_14_IN
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi0_MTSRA_P20_14_IN
Slave SPI data input.
Definition: IfxQspi_PinMap.h:164
IfxQspi2_SLSO2_P14_6_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO2_P14_6_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:273
IfxQspi_Mrst_In_pinTable
IFX_EXTERN const IfxQspi_Mrst_In * IfxQspi_Mrst_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS]
IfxQspi_Mrst_In table.
Definition: IfxQspi_PinMap.h:325
IfxQspi4_SLSO3_P22_2_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO3_P22_2_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:301
IfxQspi0_SLSO8_P20_6_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO8_P20_6_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:252
IfxQspi2_SCLK_P33_1_OUT
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P33_1_OUT
Master SPI clock output.
Definition: IfxQspi_PinMap.h:223
IfxQspi3_SLSO8_P10_5_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO8_P10_5_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:295
IfxQspi1_MTSRC_P10_4_IN
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi1_MTSRC_P10_4_IN
Slave SPI data input.
Definition: IfxQspi_PinMap.h:169
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:126
IfxQspi_Mrst_Out_pinTable
IFX_EXTERN const IfxQspi_Mrst_Out * IfxQspi_Mrst_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS]
IfxQspi_Mrst_Out table.
Definition: IfxQspi_PinMap.h:328
IfxQspi0_SLSO12_P22_4_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO12_P22_4_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:243
IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS
#define IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS
Definition: IfxQspi_PinMap.h:318
IfxQspi_Sclk_In
SCLK pin mapping structure.
Definition: IfxQspi_PinMap.h:72
IfxQspi2_MTSRB_P15_6_IN
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi2_MTSRB_P15_6_IN
Slave SPI data input.
Definition: IfxQspi_PinMap.h:171
IfxQspi0_MTSR_P22_5_OUT
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi0_MTSR_P22_5_OUT
Master SPI data output.
Definition: IfxQspi_PinMap.h:181
IfxQspi1_SCLK_P11_6_OUT
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi1_SCLK_P11_6_OUT
Master SPI clock output.
Definition: IfxQspi_PinMap.h:216
IfxQspi0_SLSO4_P11_11_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO4_P11_11_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:248
IfxQspi3_MTSRA_P02_6_IN
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRA_P02_6_IN
Slave SPI data input.
Definition: IfxQspi_PinMap.h:173
IfxQspi1_MTSR_P11_9_OUT
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P11_9_OUT
Master SPI data output.
Definition: IfxQspi_PinMap.h:185
IfxQspi_Sclk_Out
SCLK pin mapping structure.
Definition: IfxQspi_PinMap.h:112
IfxQspi1_SLSO9_P10_5_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO9_P10_5_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:264
IfxQspi2_SCLKB_P15_8_IN
IFX_EXTERN IfxQspi_Sclk_In IfxQspi2_SCLKB_P15_8_IN
Slave SPI clock inputs.
Definition: IfxQspi_PinMap.h:204
IfxQspi0_SCLK_P22_8_OUT
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi0_SCLK_P22_8_OUT
Master SPI clock output.
Definition: IfxQspi_PinMap.h:214
IfxQspi1_SLSO7_P33_5_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO7_P33_5_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:262
IfxQspi0_MTSRC_P22_5_IN
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi0_MTSRC_P22_5_IN
Slave SPI data input.
Definition: IfxQspi_PinMap.h:166
IfxQspi3_SCLKB_P10_8_IN
IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKB_P10_8_IN
Slave SPI clock inputs.
Definition: IfxQspi_PinMap.h:207
IfxQspi2_SLSO12_P33_4_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO12_P33_4_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:271
IfxQspi2_MRSTB_P15_7_IN
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTB_P15_7_IN
Master SPI data input.
Definition: IfxQspi_PinMap.h:134
IfxQspi_Mtsr_Out_pinTable
IFX_EXTERN const IfxQspi_Mtsr_Out * IfxQspi_Mtsr_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS]
IfxQspi_Mtsr_Out table.
Definition: IfxQspi_PinMap.h:334
IfxQspi3_SLSO10_P01_4_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO10_P01_4_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:282
IfxQspi2_SCLKD_P33_14_IN
IFX_EXTERN IfxQspi_Sclk_In IfxQspi2_SCLKD_P33_14_IN
Slave SPI clock inputs.
Definition: IfxQspi_PinMap.h:205
IfxQspi0_SCLK_P22_7_OUT
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi0_SCLK_P22_7_OUT
Master SPI clock output.
Definition: IfxQspi_PinMap.h:213
IfxQspi0_MRST_P22_6_OUT
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi0_MRST_P22_6_OUT
Slave SPI data output.
Definition: IfxQspi_PinMap.h:151
IfxQspi3_MRSTB_P10_7_IN
IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTB_P10_7_IN
Master SPI data input.
Definition: IfxQspi_PinMap.h:142
IfxQspi0_SLSO2_P20_13_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO2_P20_13_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:246
IfxQspi1_SLSO6_P33_10_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO6_P33_10_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:261
IfxQspi2_SLSO11_P33_6_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO11_P33_6_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:269
IfxQspi_Slso_Out_pinTable
IFX_EXTERN const IfxQspi_Slso_Out * IfxQspi_Slso_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_NUM_SLAVESELECTS][IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS]
IfxQspi_Slso_Out table.
Definition: IfxQspi_PinMap.h:346
IfxQspi3_MRSTA_P02_5_IN
IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTA_P02_5_IN
Master SPI data input.
Definition: IfxQspi_PinMap.h:141
IfxQspi3_MTSRB_P10_6_IN
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRB_P10_6_IN
Slave SPI data input.
Definition: IfxQspi_PinMap.h:174
IfxQspi2_SLSIA_P15_2_IN
IFX_EXTERN IfxQspi_Slsi_In IfxQspi2_SLSIA_P15_2_IN
Slave select input.
Definition: IfxQspi_PinMap.h:234
IfxQspi2_MRSTCP_P21_3_IN
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTCP_P21_3_IN
Master SPI data input (LVDS P line)
Definition: IfxQspi_PinMap.h:136
IfxQspi_Mrst_In::module
Ifx_QSPI * module
Base address.
Definition: IfxQspi_PinMap.h:58
IfxQspi1_MRSTB_P11_3_IN
IFX_EXTERN IfxQspi_Mrst_In IfxQspi1_MRSTB_P11_3_IN
Master SPI data input.
Definition: IfxQspi_PinMap.h:132
IfxQspi2_SCLK_P15_8_OUT
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_8_OUT
Master SPI clock output.
Definition: IfxQspi_PinMap.h:221
IfxQspi4_SCLKB_P22_3_IN
IFX_EXTERN IfxQspi_Sclk_In IfxQspi4_SCLKB_P22_3_IN
Slave SPI clock inputs.
Definition: IfxQspi_PinMap.h:210
IfxQspi4_MTSR_P22_0_OUT
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi4_MTSR_P22_0_OUT
Master SPI data output.
Definition: IfxQspi_PinMap.h:196
IfxQspi_Mrst_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxQspi_PinMap.h:60
IfxQspi4_SLSO7_P02_1_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO7_P02_1_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:308
IfxQspi_Slso_Out
SLSO pin mapping structure.
Definition: IfxQspi_PinMap.h:120
IfxQspi2_SLSO8_P20_6_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO8_P20_6_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:279
IfxQspi4_MTSR_P33_12_OUT
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi4_MTSR_P33_12_OUT
Master SPI data output.
Definition: IfxQspi_PinMap.h:197
IfxQspi0_SCLK_P20_13_OUT
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi0_SCLK_P20_13_OUT
Master SPI clock output.
Definition: IfxQspi_PinMap.h:212
IfxQspi1_SLSO5_P11_2_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO5_P11_2_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:260
IfxQspi0_MRSTB_P22_9_IN
IFX_EXTERN IfxQspi_Mrst_In IfxQspi0_MRSTB_P22_9_IN
Master SPI data input.
Definition: IfxQspi_PinMap.h:129
IfxQspi2_MRST_P34_4_OUT
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi2_MRST_P34_4_OUT
Slave SPI data output.
Definition: IfxQspi_PinMap.h:158
IfxQspi0_SLSIB_P20_9_IN
IFX_EXTERN IfxQspi_Slsi_In IfxQspi0_SLSIB_P20_9_IN
Slave select input.
Definition: IfxQspi_PinMap.h:232
IfxQspi3_MRSTC_P01_5_IN
IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTC_P01_5_IN
Master SPI data input.
Definition: IfxQspi_PinMap.h:143
IfxQspi3_SLSO6_P00_8_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO6_P00_8_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:291
IfxQspi4_SLSO7_P33_7_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO7_P33_7_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:309
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxQspi4_SLSO4_P02_12_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO4_P02_12_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:302
IfxQspi2_MRSTFP_P14_10_IN
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTFP_P14_10_IN
Master SPI data input (LVDS P line)
Definition: IfxQspi_PinMap.h:140
IFXQSPI_PINMAP_NUM_MODULES
#define IFXQSPI_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxQspi_PinMap.h:312
IfxQspi_Mtsr_Out
MTSR pin mapping structure.
Definition: IfxQspi_PinMap.h:104
IfxQspi0_SLSO9_P20_3_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO9_P20_3_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:253
IfxQspi_Mtsr_In
MTSR pin mapping structure.
Definition: IfxQspi_PinMap.h:64
IfxQspi2_MTSRN_P13_2_OUT
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSRN_P13_2_OUT
Master SPI data output (LVDS N line)
Definition: IfxQspi_PinMap.h:186
IfxQspi_Mrst_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxQspi_PinMap.h:100
IfxQspi0_MTSR_P20_14_OUT
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi0_MTSR_P20_14_OUT
Master SPI data output.
Definition: IfxQspi_PinMap.h:179
IfxQspi3_SLSO5_P02_8_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO5_P02_8_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:290
IfxQspi4_SLSO5_P02_15_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO5_P02_15_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:304
IfxQspi1_SCLKB_P11_6_IN
IFX_EXTERN IfxQspi_Sclk_In IfxQspi1_SCLKB_P11_6_IN
Slave SPI clock inputs.
Definition: IfxQspi_PinMap.h:202
IfxQspi4_MRSTB_P22_1_IN
IFX_EXTERN IfxQspi_Mrst_In IfxQspi4_MRSTB_P22_1_IN
Master SPI data input.
Definition: IfxQspi_PinMap.h:145
IfxQspi2_MTSR_P34_5_OUT
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSR_P34_5_OUT
Master SPI data output.
Definition: IfxQspi_PinMap.h:190
IfxQspi3_MTSR_P10_6_OUT
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P10_6_OUT
Master SPI data output.
Definition: IfxQspi_PinMap.h:193
IfxQspi1_SLSO3_P11_10_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO3_P11_10_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:258
IfxQspi2_SCLK_P15_6_OUT
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_6_OUT
Master SPI clock output.
Definition: IfxQspi_PinMap.h:220
IfxQspi_Mrst_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxQspi_PinMap.h:59
IfxQspi4_SLSIA_P33_10_IN
IFX_EXTERN IfxQspi_Slsi_In IfxQspi4_SLSIA_P33_10_IN
Slave select input.
Definition: IfxQspi_PinMap.h:238
IfxQspi4_SLSO0_P33_10_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO0_P33_10_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:297
IfxQspi0_SLSO13_P15_0_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO13_P15_0_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:244
IfxQspi4_SLSO6_P23_1_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO6_P23_1_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:307
IfxQspi2_SLSO10_P34_3_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO10_P34_3_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:267
IfxQspi4_MRSTA_P33_13_IN
IFX_EXTERN IfxQspi_Mrst_In IfxQspi4_MRSTA_P33_13_IN
Master SPI data input.
Definition: IfxQspi_PinMap.h:144
IfxQspi0_SLSO7_P33_5_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO7_P33_5_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:251
IfxQspi3_SLSIB_P01_3_IN
IFX_EXTERN IfxQspi_Slsi_In IfxQspi3_SLSIB_P01_3_IN
Slave select input.
Definition: IfxQspi_PinMap.h:237
IfxQspi0_SLSO6_P20_10_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO6_P20_10_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:250
IfxQspi4_SLSO6_P02_13_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO6_P02_13_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:306
IfxQspi2_SLSO10_P33_2_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO10_P33_2_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:266
IfxQspi1_MTSR_P10_1_OUT
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_1_OUT
Master SPI data output.
Definition: IfxQspi_PinMap.h:182
IfxQspi3_SLSO6_P02_15_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO6_P02_15_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:292
IfxQspi2_SLSO11_P33_15_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO11_P33_15_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:268
IfxQspi2_SCLK_P15_3_OUT
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_3_OUT
Master SPI clock output.
Definition: IfxQspi_PinMap.h:219
IfxQspi4_SLSO1_P33_9_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO1_P33_9_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:298
IfxQspi0_SLSO1_P20_9_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO1_P20_9_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:245
IfxQspi3_MRST_P02_5_OUT
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P02_5_OUT
Slave SPI data output.
Definition: IfxQspi_PinMap.h:160
IfxQspi4_MTSRB_P22_0_IN
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi4_MTSRB_P22_0_IN
Slave SPI data input.
Definition: IfxQspi_PinMap.h:177
IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS
#define IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS
Definition: IfxQspi_PinMap.h:315
IfxQspi4_MRSTCN_P21_2_IN
IFX_EXTERN IfxQspi_Mrst_In IfxQspi4_MRSTCN_P21_2_IN
Master SPI data input (LVDS N line)
Definition: IfxQspi_PinMap.h:146
IfxQspi_Mtsr_In_pinTable
IFX_EXTERN const IfxQspi_Mtsr_In * IfxQspi_Mtsr_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS]
IfxQspi_Mtsr_In table.
Definition: IfxQspi_PinMap.h:331
IfxQspi4_SCLKP_P22_1_OUT
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi4_SCLKP_P22_1_OUT
Master SPI clock output (LVDS P line)
Definition: IfxQspi_PinMap.h:228
IfxQspi3_SLSO5_P02_12_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO5_P02_12_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:289
IfxQspi4_SLSO2_P33_8_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO2_P33_8_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:300
IfxQspi4_MTSRN_P22_2_OUT
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi4_MTSRN_P22_2_OUT
Master SPI data output (LVDS N line)
Definition: IfxQspi_PinMap.h:194
IfxQspi1_MTSRB_P11_9_IN
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi1_MTSRB_P11_9_IN
Slave SPI data input.
Definition: IfxQspi_PinMap.h:168
IfxQspi0_SLSO10_P22_11_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO10_P22_11_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:241
IfxQspi2_MTSR_P15_6_OUT
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSR_P15_6_OUT
Master SPI data output.
Definition: IfxQspi_PinMap.h:189
IfxQspi_Mrst_In
MRST pin mapping structure.
Definition: IfxQspi_PinMap.h:56
IfxQspi3_SLSO7_P00_9_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO7_P00_9_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:293
IfxQspi0_SCLKA_P20_11_IN
IFX_EXTERN IfxQspi_Sclk_In IfxQspi0_SCLKA_P20_11_IN
Slave SPI clock inputs.
Definition: IfxQspi_PinMap.h:198
IfxQspi0_SLSO5_P11_2_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO5_P11_2_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:249
IfxQspi3_SLSO3_P00_5_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO3_P00_5_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:285
IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS
#define IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS
Definition: IfxQspi_PinMap.h:319
IfxQspi2_MRSTD_P34_4_IN
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTD_P34_4_IN
Master SPI data input.
Definition: IfxQspi_PinMap.h:137
IfxQspi2_SLSO4_P14_7_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO4_P14_7_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:275
IfxQspi4_MRSTCP_P21_3_IN
IFX_EXTERN IfxQspi_Mrst_In IfxQspi4_MRSTCP_P21_3_IN
Master SPI data input (LVDS P line)
Definition: IfxQspi_PinMap.h:147
IfxQspi0_SCLKB_P22_8_IN
IFX_EXTERN IfxQspi_Sclk_In IfxQspi0_SCLKB_P22_8_IN
Slave SPI clock inputs.
Definition: IfxQspi_PinMap.h:199
IfxQspi1_MTSR_P10_4_OUT
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_4_OUT
Master SPI data output.
Definition: IfxQspi_PinMap.h:184
IfxQspi4_MTSRA_P33_12_IN
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi4_MTSRA_P33_12_IN
Slave SPI data input.
Definition: IfxQspi_PinMap.h:176
IfxQspi0_SLSO3_P11_10_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO3_P11_10_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:247
IfxQspi1_SLSO8_P10_4_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO8_P10_4_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:263
IfxQspi1_SLSO0_P20_8_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO0_P20_8_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:254
IfxQspi1_SCLK_P10_2_OUT
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi1_SCLK_P10_2_OUT
Master SPI clock output.
Definition: IfxQspi_PinMap.h:215
IfxQspi3_SCLK_P02_7_OUT
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P02_7_OUT
Master SPI clock output.
Definition: IfxQspi_PinMap.h:225
IfxQspi3_SLSO0_P02_4_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO0_P02_4_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:281
IfxQspi2_MTSRP_P13_3_OUT
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSRP_P13_3_OUT
Master SPI data output (LVDS P line)
Definition: IfxQspi_PinMap.h:187
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:246
IfxQspi3_SCLKC_P01_7_IN
IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKC_P01_7_IN
Slave SPI clock inputs.
Definition: IfxQspi_PinMap.h:208
Ifx_RxSel
Ifx_RxSel
input multiplexer definition used in PinMaps
Definition: Ifx_Types.h:127
IfxQspi0_SLSO11_P23_6_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO11_P23_6_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:242
IfxQspi2_MTSRA_P15_5_IN
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi2_MTSRA_P15_5_IN
Slave SPI data input.
Definition: IfxQspi_PinMap.h:170
IfxQspi_Sclk_Out_pinTable
IFX_EXTERN const IfxQspi_Sclk_Out * IfxQspi_Sclk_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS]
IfxQspi_Sclk_Out table.
Definition: IfxQspi_PinMap.h:340
IfxQspi4_SLSIB_P22_2_IN
IFX_EXTERN IfxQspi_Slsi_In IfxQspi4_SLSIB_P22_2_IN
Slave select input.
Definition: IfxQspi_PinMap.h:239
IfxQspi2_SLSO7_P20_10_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO7_P20_10_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:278
IfxQspi0_MRST_P22_9_OUT
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi0_MRST_P22_9_OUT
Slave SPI data output.
Definition: IfxQspi_PinMap.h:152
IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS
#define IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS
Definition: IfxQspi_PinMap.h:314
IfxQspi1_SLSO2_P20_13_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO2_P20_13_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:257
IfxQspi2_SCLKN_P13_0_OUT
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLKN_P13_0_OUT
Master SPI clock output (LVDS N line)
Definition: IfxQspi_PinMap.h:217
sint32
long sint32
Definition: Platform_Types.h:134
IfxQspi2_MTSR_P15_5_OUT
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSR_P15_5_OUT
Master SPI data output.
Definition: IfxQspi_PinMap.h:188
IfxQspi3_MRST_P01_5_OUT
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P01_5_OUT
Slave SPI data output.
Definition: IfxQspi_PinMap.h:159
IfxQspi_Hsicin_In
HSICIN pin mapping structure.
Definition: IfxQspi_PinMap.h:88
IfxQspi3_SCLK_P01_7_OUT
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P01_7_OUT
Master SPI clock output.
Definition: IfxQspi_PinMap.h:224
IfxQspi0_MTSR_P20_12_OUT
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi0_MTSR_P20_12_OUT
Master SPI data output.
Definition: IfxQspi_PinMap.h:178
IfxQspi_Sclk_In_pinTable
IFX_EXTERN const IfxQspi_Sclk_In * IfxQspi_Sclk_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS]
IfxQspi_Sclk_In table.
Definition: IfxQspi_PinMap.h:337
IfxQspi2_SLSO1_P14_2_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO1_P14_2_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:272
IfxQspi3_MTSR_P01_6_OUT
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P01_6_OUT
Master SPI data output.
Definition: IfxQspi_PinMap.h:191
IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS
#define IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS
Definition: IfxQspi_PinMap.h:316
IfxQspi4_SLSO4_P23_5_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO4_P23_5_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:303
IfxQspi2_SLSO9_P20_3_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO9_P20_3_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:280
IfxQspi3_SLSO9_P01_3_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO9_P01_3_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:296
IfxQspi2_MRSTFN_P14_9_IN
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTFN_P14_9_IN
Master SPI data input (LVDS N line)
Definition: IfxQspi_PinMap.h:139
IfxQspi1_SCLKA_P10_2_IN
IFX_EXTERN IfxQspi_Sclk_In IfxQspi1_SCLKA_P10_2_IN
Slave SPI clock inputs.
Definition: IfxQspi_PinMap.h:201
IfxQspi2_MRSTCN_P21_2_IN
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTCN_P21_2_IN
Master SPI data input (LVDS N line)
Definition: IfxQspi_PinMap.h:135
IfxQspi2_MTSRD_P34_5_IN
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi2_MTSRD_P34_5_IN
Slave SPI data input.
Definition: IfxQspi_PinMap.h:172
IfxQspi4_SCLKA_P33_11_IN
IFX_EXTERN IfxQspi_Sclk_In IfxQspi4_SCLKA_P33_11_IN
Slave SPI clock inputs.
Definition: IfxQspi_PinMap.h:209
IfxQspi0_MRST_P20_12_OUT
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi0_MRST_P20_12_OUT
Slave SPI data output.
Definition: IfxQspi_PinMap.h:150
IfxQspi4_SLSO5_P23_4_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi4_SLSO5_P23_4_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:305
IfxQspi3_SLSO4_P02_3_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO4_P02_3_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:288
IfxQspi_cfg.h
QSPI on-chip implementation data.
IfxQspi2_SLSO0_P15_2_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO0_P15_2_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:265
IfxQspi3_SLSO2_P02_1_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO2_P02_1_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:284
IfxQspi4_SCLK_P22_3_OUT
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi4_SCLK_P22_3_OUT
Master SPI clock output.
Definition: IfxQspi_PinMap.h:229
IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS
#define IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS
Definition: IfxQspi_PinMap.h:320
IfxQspi2_SLSO12_P32_6_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO12_P32_6_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:270
IfxQspi2_SLSIB_P15_1_IN
IFX_EXTERN IfxQspi_Slsi_In IfxQspi2_SLSIB_P15_1_IN
Slave select input.
Definition: IfxQspi_PinMap.h:235
IfxQspi3_SCLK_P10_8_OUT
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P10_8_OUT
Master SPI clock output.
Definition: IfxQspi_PinMap.h:226
IfxQspi1_SLSO10_P10_0_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO10_P10_0_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:255
IfxQspi1_MRST_P10_6_OUT
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi1_MRST_P10_6_OUT
Slave SPI data output.
Definition: IfxQspi_PinMap.h:154
IfxQspi0_MRSTC_P22_6_IN
IFX_EXTERN IfxQspi_Mrst_In IfxQspi0_MRSTC_P22_6_IN
Master SPI data input.
Definition: IfxQspi_PinMap.h:130
IfxQspi1_MRST_P11_3_OUT
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi1_MRST_P11_3_OUT
Slave SPI data output.
Definition: IfxQspi_PinMap.h:155
IfxQspi2_MRSTE_P15_2_IN
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTE_P15_2_IN
Master SPI data input.
Definition: IfxQspi_PinMap.h:138
IfxQspi1_MTSRA_P10_3_IN
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi1_MTSRA_P10_3_IN
Slave SPI data input.
Definition: IfxQspi_PinMap.h:167
IfxQspi1_SLSIA_P11_10_IN
IFX_EXTERN IfxQspi_Slsi_In IfxQspi1_SLSIA_P11_10_IN
Slave select input.
Definition: IfxQspi_PinMap.h:233
IfxQspi2_SLSO5_P15_1_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO5_P15_1_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:276
IfxQspi2_SLSO3_P14_3_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO3_P14_3_OUT
Master slave select output.
Definition: IfxQspi_PinMap.h:274
IfxQspi4_MRSTDN_P21_0_IN
IFX_EXTERN IfxQspi_Mrst_In IfxQspi4_MRSTDN_P21_0_IN
Master SPI data input (LVDS N line)
Definition: IfxQspi_PinMap.h:148
IfxQspi2_MRST_P15_7_OUT
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi2_MRST_P15_7_OUT
Slave SPI data output.
Definition: IfxQspi_PinMap.h:157
IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS
#define IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS
Definition: IfxQspi_PinMap.h:317
IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS
#define IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS
Definition: IfxQspi_PinMap.h:321
IfxQspi0_SLSIA_P20_13_IN
IFX_EXTERN IfxQspi_Slsi_In IfxQspi0_SLSIA_P20_13_IN
Slave select input.
Definition: IfxQspi_PinMap.h:231
IfxQspi_Slso_Out::slsoNr
sint32 slsoNr
Slave Select.
Definition: IfxQspi_PinMap.h:123
IfxQspi0_MTSR_P22_10_OUT
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi0_MTSR_P22_10_OUT
Master SPI data output.
Definition: IfxQspi_PinMap.h:180
IfxQspi2_MRST_P15_4_OUT
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi2_MRST_P15_4_OUT
Slave SPI data output.
Definition: IfxQspi_PinMap.h:156
IfxQspi_Slsi_In_pinTable
IFX_EXTERN const IfxQspi_Slsi_In * IfxQspi_Slsi_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS]
IfxQspi_Slsi_In table.
Definition: IfxQspi_PinMap.h:343
IfxQspi3_SCLKA_P02_7_IN
IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKA_P02_7_IN
Slave SPI clock inputs.
Definition: IfxQspi_PinMap.h:206
IfxQspi3_MRST_P10_7_OUT
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P10_7_OUT
Slave SPI data output.
Definition: IfxQspi_PinMap.h:161
IfxQspi2_SCLKA_P15_3_IN
IFX_EXTERN IfxQspi_Sclk_In IfxQspi2_SCLKA_P15_3_IN
Slave SPI clock inputs.
Definition: IfxQspi_PinMap.h:203
IfxPort.h
PORT basic functionality.
IFXQSPI_PINMAP_NUM_SLAVESELECTS
#define IFXQSPI_PINMAP_NUM_SLAVESELECTS
Definition: IfxQspi_PinMap.h:313


iLLD_TC38A: IfxQspi_SpiMaster.c Source File

  • Qspi
  • SpiMaster
IfxQspi_SpiMaster.c
Go to the documentation of this file.
1 /**
2 * \file IfxQspi_SpiMaster.c
3 * \brief QSPI SPIMASTER details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 */
43
44 /******************************************************************************/
45 /*----------------------------------Includes----------------------------------*/
46 /******************************************************************************/
47
48 #include "IfxQspi_SpiMaster.h"
49
50 /** \addtogroup IfxLld_Qspi_SpiMaster_Channel
51 * \{ */
52
53 /******************************************************************************/
54 /*-----------------------Private Function Prototypes--------------------------*/
55 /******************************************************************************/
56
57 /** \brief Gets current active channel
58 * \param handle Module handle
59 * \return current active channel
60 */
61 IFX_STATIC IfxQspi_SpiMaster_Channel *IfxQspi_SpiMaster_activeChannel(IfxQspi_SpiMaster *handle);
62
63 /** \} */
64
65 /** \addtogroup IfxLld_Qspi_SpiMaster_Support
66 * \{ */
67
68 /******************************************************************************/
69 /*-----------------------Private Function Prototypes--------------------------*/
70 /******************************************************************************/
71
72 /** \brief Active the SLSO pin.
73 * \param chHandle Module Channel handle
74 * \return None
75 */
76 IFX_STATIC void IfxQspi_SpiMaster_activateSlso(IfxQspi_SpiMaster_Channel *chHandle);
77
78 /** \brief Deactive the SLSO pin.
79 * \param chHandle Module Channel handle
80 * \return None
81 */
82 IFX_STATIC void IfxQspi_SpiMaster_deactivateSlso(IfxQspi_SpiMaster_Channel *chHandle);
83
84 /** \brief Locks the transfer and gets the current status of it.
85 * \param handle Module handle
86 * \return SpiIf_Status_ok if sending is done otherwise SpiIf_Status_busy.
87 */
88 IFX_STATIC SpiIf_Status IfxQspi_SpiMaster_lock(IfxQspi_SpiMaster *handle);
89
90 /** \brief Reads data from the Rx FIFO
91 * \param chHandle Module Channel handle
92 * \return None
93 */
94 IFX_STATIC void IfxQspi_SpiMaster_read(IfxQspi_SpiMaster_Channel *chHandle);
95
96 /** \brief Unlocks the transfers
97 * \param handle Module handle
98 * \return None
99 */
100 IFX_STATIC void IfxQspi_SpiMaster_unlock(IfxQspi_SpiMaster *handle);
101
102 /** \brief Writes data into the Tx FIFO
103 * \param chHandle Module Channel handle
104 * \return None
105 */
106 IFX_STATIC void IfxQspi_SpiMaster_write(IfxQspi_SpiMaster_Channel *chHandle);
107
108 /** \brief Writes Long/xxl data into the Tx FIFO
109 * \param chHandle Module Channel handle
110 * \return None
111 */
112 IFX_STATIC void IfxQspi_SpiMaster_writeLong(IfxQspi_SpiMaster_Channel *chHandle);
113
114 /** \} */
115
116 /******************************************************************************/
117 /*-------------------------Function Implementations---------------------------*/
118 /******************************************************************************/
119
120 IFX_STATIC void IfxQspi_SpiMaster_activateSlso(IfxQspi_SpiMaster_Channel *chHandle)
121 {
122 IfxPort_State action = (chHandle->slsoActiveState == Ifx_ActiveState_low) ? IfxPort_State_low : IfxPort_State_high;
123 IfxPort_setPinState(chHandle->slso.port, chHandle->slso.pinIndex, action);
124 }
125
126
127 IFX_STATIC IfxQspi_SpiMaster_Channel *IfxQspi_SpiMaster_activeChannel(IfxQspi_SpiMaster *handle)
128 {
129 return (IfxQspi_SpiMaster_Channel *)handle->base.activeChannel;
130 }
131
132
133 IFX_STATIC void IfxQspi_SpiMaster_deactivateSlso(IfxQspi_SpiMaster_Channel *chHandle)
134 {
135 IfxPort_State action = (chHandle->slsoActiveState == Ifx_ActiveState_low) ? IfxPort_State_high : IfxPort_State_low;
136 IfxPort_setPinState(chHandle->slso.port, chHandle->slso.pinIndex, action);
137 }
138
139
140 SpiIf_Status IfxQspi_SpiMaster_exchange(IfxQspi_SpiMaster_Channel *chHandle, const void *src, void *dest, Ifx_SizeT count)
141 {
142 IfxQspi_SpiMaster *handle = (IfxQspi_SpiMaster *)chHandle->base.driver;
143 SpiIf_Status status = IfxQspi_SpiMaster_lock(handle);
144
145 if (status == SpiIf_Status_ok)
146 {
147 /* initiate transfer when resource is free */
148 handle->base.activeChannel = &chHandle->base;
149 chHandle->base.flags.onTransfer = 1;
150 chHandle->base.tx.data = (void *)src;
151 chHandle->base.tx.remaining = count;
152 chHandle->firstWrite = TRUE;
153 chHandle->base.rx.data = dest;
154 chHandle->base.rx.remaining = count;
155
156 if (chHandle->activateSlso != NULL_PTR)
157 {
158 chHandle->activateSlso(chHandle);
159 }
160
161 if ((chHandle->mode == IfxQspi_SpiMaster_Mode_long) ||
162 (chHandle->mode == IfxQspi_SpiMaster_Mode_longContinuous))
163 {
164 IfxQspi_SpiMaster_writeLong((IfxQspi_SpiMaster_Channel *)chHandle);
165 }
166 else if (chHandle->mode == IfxQspi_SpiMaster_Mode_xxl)
167 {
168 handle->qspi->XXLCON.B.XDL = count - 1;
169 IfxQspi_SpiMaster_writeLong((IfxQspi_SpiMaster_Channel *)chHandle);
170 }
171 else
172 {
173 /* chHandle->mode == IfxQspi_SpiMaster_Mode_ShortCont*/
174 chHandle->base.txHandler(handle->base.activeChannel);
175 }
176 }
177
178 return status;
179 }
180
181
182 SpiIf_ChConfig IfxQspi_SpiMaster_getChannelConfig(IfxQspi_SpiMaster_Channel *chHandle)
183 {
184 {
185 SpiIf_ChConfig chConfig;
186 IfxQspi_SpiMaster *handle = (IfxQspi_SpiMaster *)chHandle->base.driver->driver;
187 Ifx_QSPI *qspiSFR = handle->qspi;
188 Ifx_QSPI_ECON econ;
189 econ.U = qspiSFR->ECON[chHandle->channelId % 8].U;
190
191 chConfig.baudrate = IfxQspi_calcRealBaudrate(qspiSFR, (IfxQspi_ChannelId)(chHandle->channelId % 8));
192 chConfig.driver = chHandle->base.driver;
193 chConfig.errorChecks.baudrate = 0;
194 chConfig.errorChecks.phase = 0;
195 chConfig.errorChecks.receive = 0;
196 chConfig.errorChecks.reserved = 0;
197 chConfig.errorChecks.transmit = 0;
198 chConfig.mode.autoCS = (chHandle->activateSlso == NULL_PTR) && (chHandle->deactivateSlso == NULL_PTR);
199 chConfig.mode.clockPolarity = econ.B.CPOL == 0 ? SpiIf_ClockPolarity_idleLow : SpiIf_ClockPolarity_idleHigh;
200 chConfig.mode.csActiveLevel = chHandle->slsoActiveState;
201 chConfig.mode.csInactiveDelay = chHandle->bacon.B.IDLE;
202 chConfig.mode.csLeadDelay = chHandle->bacon.B.LEAD;
203 chConfig.mode.csTrailDelay = chHandle->bacon.B.TRAIL;
204 chConfig.mode.dataHeading = chHandle->bacon.B.MSB == 0 ? SpiIf_DataHeading_lsbFirst : SpiIf_DataHeading_msbFirst;
205 chConfig.mode.dataWidth = chHandle->bacon.B.DL + 1;
206 chConfig.mode.enabled = 0;
207 chConfig.mode.loopback = qspiSFR->GLOBALCON.B.LB;
208 chConfig.mode.parityCheck = econ.B.PAREN;
209 chConfig.mode.parityMode = chHandle->bacon.B.PARTYP == 0 ? Ifx_ParityMode_even : Ifx_ParityMode_odd;
210 chConfig.mode.shiftClock = econ.B.CPH == 1 ? SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge : SpiIf_ShiftClock_shiftTransmitDataOnTrailingEdge;
211
212 return chConfig;
213 }
214 }
215
216
217 SpiIf_Status IfxQspi_SpiMaster_getStatus(IfxQspi_SpiMaster_Channel *chHandle)
218 {
219 SpiIf_Status status = SpiIf_Status_ok;
220
221 if ((chHandle->base.flags.onTransfer != 0) || (chHandle->base.driver->sending != 0))
222 {
223 status = SpiIf_Status_busy;
224 }
225
226 return status;
227 }
228
229
230 SpiIf_Status IfxQspi_SpiMaster_initChannel(IfxQspi_SpiMaster_Channel *chHandle, const IfxQspi_SpiMaster_ChannelConfig *chConfig)
231 {
232 IfxQspi_SpiMaster *handle = chConfig->base.driver->driver;
233 Ifx_QSPI *qspiSFR = handle->qspi;
234
235 chHandle->base.driver = chConfig->base.driver;
236 chHandle->base.flags.onTransfer = FALSE;
237 chHandle->channelBasedCs = chConfig->channelBasedCs;
238 chHandle->mode = chConfig->mode;
239
240 chHandle->dummyTxValue = chConfig->dummyTxValue;
241 chHandle->dummyRxValue = chConfig->dummyRxValue;
242
243 //Loop back configuration.
244 uint32 loopback = chConfig->base.mode.loopback;
245 qspiSFR->GLOBALCON.B.LB = loopback;
246
247 /* chip-select output pin */
248 const IfxQspi_SpiMaster_Output *slso = &(chConfig->sls.output);
249
250 if ((loopback == 1) && (slso->pin == NULL_PTR)) /* if loopback is enabled && no pin is specified */
251 {
252 chHandle->channelId = (IfxQspi_ChannelId)0; /* select 0 as default, if not specified */
253 }
254 else /* not loop back - pin must be configured */
255 {
256 chHandle->channelId = (IfxQspi_ChannelId)chConfig->sls.output.pin->slsoNr;
257 }
258
259 uint8 cs = chHandle->channelId % 8;
260
261 {
262 /* assert warning if desired baud rate is more than max baud rate */
263 IFX_ASSERT(IFX_VERBOSE_LEVEL_WARNING, handle->maximumBaudrate > chConfig->base.baudrate);
264
265 qspiSFR->ECON[cs].U = IfxQspi_calculateExtendedConfigurationValue(qspiSFR, cs, &chConfig->base);
266 chHandle->bacon.U = IfxQspi_calculateBasicConfigurationValue(qspiSFR, chHandle->channelId, &chConfig->base.mode, chConfig->base.baudrate);
267
268 if (chHandle->moveCounterControl.moveCounterEnabled == TRUE)
269 {
270 IfxQspi_setMoveCounterPrescalerTrailingDelay(qspiSFR, chConfig->base.baudrate);
271 IfxQspi_SpiMaster_moveCounterControlConfiguration(qspiSFR, &chHandle->moveCounterControl);
272 }
273
274 { /* QSPI chip-select line */
275 uint32 mask = 1U << chHandle->channelId;
276 uint32 oen = mask << 16;
277 uint32 aol = (((chConfig->base.mode.csActiveLevel == Ifx_ActiveState_low) ? 0 : 1) << chHandle->channelId);
278 __ldmst(&qspiSFR->SSOC.U, (mask | (mask << 16)), (aol | oen));
279 }
280 }
281 chHandle->base.baudrate = IfxQspi_calcRealBaudrate(qspiSFR, (IfxQspi_ChannelId)(chHandle->bacon.B.CS & 0x7U));
282
283 /* Select the chip select activate and de-activate functions */
284 if (slso->pin == NULL_PTR)
285 {
286 chHandle->activateSlso = NULL_PTR;
287 chHandle->deactivateSlso = NULL_PTR;
288 }
289 else
290 {
291 chHandle->slso = slso->pin->pin;
292 chHandle->slsoActiveState = (Ifx_ActiveState)chConfig->base.mode.csActiveLevel;
293
294 if (!chConfig->base.mode.autoCS)
295 {
296 chHandle->activateSlso = &IfxQspi_SpiMaster_activateSlso;
297 chHandle->deactivateSlso = &IfxQspi_SpiMaster_deactivateSlso;
298
299 /** - Override the SLSO manually as general-purpose output */
300 chHandle->deactivateSlso(chHandle);
301 IfxQspi_initSlso(slso->pin, chConfig->sls.output.mode, chConfig->sls.output.driver, IfxPort_OutputIdx_general);
302 }
303 else
304 {
305 chHandle->activateSlso = NULL_PTR;
306 chHandle->deactivateSlso = NULL_PTR;
307 IfxQspi_initSlso(slso->pin, chConfig->sls.output.mode, chConfig->sls.output.driver, slso->pin->select);
308 }
309 }
310
311 chHandle->dataWidth = chConfig->base.mode.dataWidth;
312 chHandle->base.txHandler = (TxRxHandler) & IfxQspi_SpiMaster_write;
313 chHandle->base.rxHandler = (TxRxHandler) & IfxQspi_SpiMaster_read;
314
315 if (handle->dma.useDma)
316 {
317 Ifx_DMA *dmaSFR = &MODULE_DMA;
318 IfxDma_setChannelDestinationAddress(dmaSFR, handle->dma.txDmaChannelId, (uint32 *)&qspiSFR->DATAENTRY[cs].U);
319 }
320
321 return SpiIf_Status_ok;
322 }
323
324
325 void IfxQspi_SpiMaster_initChannelConfig(IfxQspi_SpiMaster_ChannelConfig *chConfig, IfxQspi_SpiMaster *handle)
326 {
327 SpiIf_initChannelConfig(&chConfig->base, &handle->base);
328 chConfig->sls.output.pin = NULL_PTR;
329 chConfig->sls.output.mode = IfxPort_OutputMode_pushPull;
330 chConfig->sls.output.driver = IfxPort_PadDriver_cmosAutomotiveSpeed1;
331 chConfig->sls.input.pin = NULL_PTR;
332 chConfig->sls.input.mode = IfxPort_InputMode_noPullDevice;
333 chConfig->channelBasedCs = IfxQspi_SpiMaster_ChannelBasedCs_disabled;
334 chConfig->mode = IfxQspi_SpiMaster_Mode_shortContinuous;
335 chConfig->dummyTxValue = (uint32)~0;
336 chConfig->dummyRxValue = (uint32)0;
337 }
338
339
340 void IfxQspi_SpiMaster_initModule(IfxQspi_SpiMaster *handle, const IfxQspi_SpiMaster_Config *config)
341 {
342 Ifx_QSPI *qspiSFR = config->qspi;
343
344 Ifx_DMA *dmaSFR = &MODULE_DMA;
345
346 /* handle.base must be at offset 0 to be compatible with the standard interface SscIf */
347 {
348 uint16 password = IfxScuWdt_getCpuWatchdogPassword();
349 IfxScuWdt_clearCpuEndinit(password);
350 IfxQspi_setEnableModuleRequest(qspiSFR);
351 IfxQspi_setSleepMode(qspiSFR, (config->allowSleepMode != FALSE) ? IfxQspi_SleepMode_enable : IfxQspi_SleepMode_disable);
352 IfxScuWdt_setCpuEndinit(password);
353 }
354
355 { /* Configure GLOBAL, Note: at the moment default values for GLOBAL */
356 Ifx_QSPI_GLOBALCON globalcon;
357 globalcon.U = 0;
358 globalcon.B.TQ = IfxQspi_calculateTimeQuantumLength(qspiSFR, config->base.maximumBaudrate);
359 globalcon.B.EXPECT = IfxQspi_ExpectTimeout_2097152; /* 2^(EXPECT+6) : timeout for expect phase in Tqspi */
360 //globalcon.B.LB = 0 ; /* 0 : disable loop-back w*/
361 //globalcon.B.DEL0 = 0; /* 0 : disable delayed mode for SLSO 0 */
362 //globalcon.B.STROBE = 0; /* (STROBE+1) : strobe delay for SLSO 0 in Tq */
363 //globalcon.B.SRF = 0; /* 0 : disable stop-on-RXFIFO full feature */
364 //globalcon.B.STIP = 0; /* 0 : MRST = 0 when QSPI is deselected in slave mode */
365 //globalcon.B.EN = 0; /* 0 : PAUSE requested, 1 : RUN requested */
366 globalcon.B.MS = IfxQspi_Mode_master; /* select master mode */
367 globalcon.B.AREN = (config->pauseOnBaudrateSpikeErrors != FALSE) ? 1U : 0U;
368 globalcon.B.RESETS = 1;
369 globalcon.B.CLKSEL = 1;
370 qspiSFR->GLOBALCON.U = globalcon.U;
371 }
372
373 /* Read maximum baud rate into the handle */
374 handle->maximumBaudrate = config->base.maximumBaudrate;
375
376 { /* Configure interrupt requests */
377 Ifx_QSPI_GLOBALCON1 globalcon1;
378 globalcon1.U = 0;
379 globalcon1.B.ERRORENS = (config->base.erPriority > 0) ? IFXQSPI_ERRORENABLEMASK : 0;
380 globalcon1.B.TXEN = (config->base.txPriority > 0) || (config->dma.useDma);
381 globalcon1.B.RXEN = (config->base.rxPriority > 0) || (config->dma.useDma);
382 globalcon1.B.TXFIFOINT = config->txFifoThreshold;
383 globalcon1.B.RXFIFOINT = config->rxFifoThreshold;
384 globalcon1.B.TXFM = config->txFifoMode;
385 globalcon1.B.RXFM = config->rxFifoMode;
386
387 qspiSFR->GLOBALCON1.U = globalcon1.U;
388 }
389
390 /* Configure I/O pins for master mode */
391 const IfxQspi_SpiMaster_Pins *pins = config->pins;
392
393 if (pins != NULL_PTR)
394 {
395 const IfxQspi_Sclk_Out *sclkOut = pins->sclk;
396
397 if (sclkOut != NULL_PTR)
398 {
399 IfxQspi_initSclkOutPin(sclkOut, pins->sclkMode, pins->pinDriver);
400 }
401
402 const IfxQspi_Mtsr_Out *mtsrOut = pins->mtsr;
403
404 if (mtsrOut != NULL_PTR)
405 {
406 IfxQspi_initMtsrOutPin(mtsrOut, pins->mtsrMode, pins->pinDriver);
407 }
408
409 const IfxQspi_Mrst_In *mrstIn = pins->mrst;
410
411 if (mrstIn != NULL_PTR)
412 {
413 IfxQspi_initMrstInPinWithPadLevel(mrstIn, pins->mrstMode, pins->pinDriver);
414 }
415 }
416
417 handle->qspi = qspiSFR;
418 handle->base.driver = handle;
419 handle->base.sending = 0U;
420 handle->base.activeChannel = NULL_PTR;
421
422 handle->base.functions.exchange = (SpiIf_Exchange) & IfxQspi_SpiMaster_exchange;
423 handle->base.functions.getStatus = (SpiIf_GetStatus) & IfxQspi_SpiMaster_getStatus;
424
425 if (config->dma.useDma)
426 {
427 handle->base.functions.onTx = (SpiIf_OnEvent) & IfxQspi_SpiMaster_isrDmaTransmit;
428 handle->base.functions.onRx = (SpiIf_OnEvent) & IfxQspi_SpiMaster_isrDmaReceive;
429 }
430 else
431 {
432 handle->base.functions.onTx = (SpiIf_OnEvent) & IfxQspi_SpiMaster_isrTransmit;
433 handle->base.functions.onRx = (SpiIf_OnEvent) & IfxQspi_SpiMaster_isrReceive;
434 }
435
436 handle->base.functions.onError = (SpiIf_OnEvent) & IfxQspi_SpiMaster_isrError;
437
438 if (config->dma.useDma)
439 {
440 handle->dma.useDma = TRUE;
441 IfxDma_Dma dma;
442 IfxDma_Dma_createModuleHandle(&dma, dmaSFR);
443
444 IfxDma_Dma_ChannelConfig dmaCfg;
445 IfxDma_Dma_initChannelConfig(&dmaCfg, &dma);
446
447 {
448 handle->dma.txDmaChannelId = config->dma.txDmaChannelId;
449 dmaCfg.channelId = handle->dma.txDmaChannelId;
450 dmaCfg.hardwareRequestEnabled = FALSE; // will be triggered from FFT service request
451 dmaCfg.channelInterruptEnabled = TRUE; // trigger interrupt after transaction
452
453 // source address and transfer count will be configured during runtime
454 dmaCfg.sourceAddress = 0;
455 dmaCfg.sourceAddressCircularRange = IfxDma_ChannelIncrementCircular_none;
456 dmaCfg.sourceCircularBufferEnabled = FALSE;
457 dmaCfg.transferCount = 0;
458 dmaCfg.moveSize = IfxDma_ChannelMoveSize_8bit;
459
460 // destination address is fixed; use circular mode to stay at this address for each move
461 dmaCfg.destinationAddress = (uint32)&qspiSFR->DATAENTRY[0].U;
462 dmaCfg.destinationAddressCircularRange = IfxDma_ChannelIncrementCircular_none;
463 dmaCfg.destinationCircularBufferEnabled = TRUE;
464
465 dmaCfg.requestMode = IfxDma_ChannelRequestMode_oneTransferPerRequest;
466 dmaCfg.operationMode = IfxDma_ChannelOperationMode_single;
467 dmaCfg.blockMode = IfxDma_ChannelMove_1;
468
469 // initialize interrupt for tx
470 dmaCfg.channelInterruptTypeOfService = config->base.isrProvider;
471 dmaCfg.channelInterruptPriority = config->base.txPriority;
472
473 IfxDma_Dma_initChannel(&handle->dma.txDmaChannel, &dmaCfg);
474 }
475
476 {
477 handle->dma.rxDmaChannelId = config->dma.rxDmaChannelId;
478 dmaCfg.channelId = handle->dma.rxDmaChannelId;
479 dmaCfg.hardwareRequestEnabled = FALSE; // will be triggered from qspi service request
480 dmaCfg.channelInterruptEnabled = TRUE; // trigger interrupt after transaction
481
482 // source address is fixed; use circular mode to stay at this address for each move
483 dmaCfg.sourceAddress = (uint32)&qspiSFR->RXEXIT.U;
484 dmaCfg.sourceAddressCircularRange = IfxDma_ChannelIncrementCircular_none;
485 dmaCfg.sourceCircularBufferEnabled = TRUE;
486
487 // destination address and transfer count will be configured during runtime
488 dmaCfg.destinationAddress = 0;
489 dmaCfg.destinationAddressCircularRange = IfxDma_ChannelIncrementCircular_none;
490 dmaCfg.destinationCircularBufferEnabled = FALSE;
491 dmaCfg.transferCount = 0;
492
493 dmaCfg.requestMode = IfxDma_ChannelRequestMode_oneTransferPerRequest;
494 dmaCfg.operationMode = IfxDma_ChannelOperationMode_single;
495 dmaCfg.moveSize = IfxDma_ChannelMoveSize_8bit;
496 dmaCfg.blockMode = IfxDma_ChannelMove_1;
497
498 // initialize interrupt for rx
499 dmaCfg.channelInterruptTypeOfService = config->base.isrProvider;
500 dmaCfg.channelInterruptPriority = config->base.rxPriority;
501
502 IfxDma_Dma_initChannel(&handle->dma.rxDmaChannel, &dmaCfg);
503 }
504 }
505 else /* Don't use DMA */
506 {
507 handle->dma.useDma = FALSE;
508 }
509
510 /* Qspi interrupt configuration */
511 {
512 IfxQspi_clearAllEventFlags(qspiSFR);
513
514 if (handle->dma.useDma)
515 {
516 volatile Ifx_SRC_SRCR *src = IfxQspi_getTransmitSrc(qspiSFR);
517 IfxSrc_init(src, IfxSrc_Tos_dma, (Ifx_Priority)config->dma.txDmaChannelId);
518 IfxSrc_enable(src);
519
520 src = IfxQspi_getReceiveSrc(qspiSFR);
521 IfxSrc_init(src, IfxSrc_Tos_dma, (Ifx_Priority)config->dma.rxDmaChannelId);
522 IfxSrc_enable(src);
523 }
524 else
525 {
526 if (config->base.txPriority != 0)
527 {
528 volatile Ifx_SRC_SRCR *src = IfxQspi_getTransmitSrc(qspiSFR);
529 IfxSrc_init(src, config->base.isrProvider, config->base.txPriority);
530 IfxSrc_enable(src);
531 }
532
533 if (config->base.rxPriority != 0)
534 {
535 volatile Ifx_SRC_SRCR *src = IfxQspi_getReceiveSrc(qspiSFR);
536 IfxSrc_init(src, config->base.isrProvider, config->base.rxPriority);
537 IfxSrc_enable(src);
538 }
539
540 if (config->base.erPriority != 0)
541 {
542 volatile Ifx_SRC_SRCR *src = IfxQspi_getErrorSrc(qspiSFR);
543 IfxSrc_init(src, config->base.isrProvider, config->base.erPriority);
544 IfxSrc_enable(src);
545 }
546 }
547 }
548
549 IfxQspi_run(qspiSFR);
550 }
551
552
553 void IfxQspi_SpiMaster_initModuleConfig(IfxQspi_SpiMaster_Config *config, Ifx_QSPI *qspi)
554 {
555 SpiIf_initConfig(&config->base);
556 config->qspi = qspi;
557 config->allowSleepMode = FALSE;
558 config->pauseOnBaudrateSpikeErrors = FALSE,
559 config->pauseRunTransition = IfxQspi_PauseRunTransition_pause;
560 config->txFifoThreshold = IfxQspi_TxFifoInt_1;
561 config->rxFifoThreshold = IfxQspi_RxFifoInt_0;
562 config->txFifoMode = IfxQspi_FifoMode_combinedMove;
563 config->rxFifoMode = IfxQspi_FifoMode_combinedMove;
564 config->pins = NULL_PTR;
565 config->dma.rxDmaChannelId = IfxDma_ChannelId_none;
566 config->dma.txDmaChannelId = IfxDma_ChannelId_none;
567 config->dma.useDma = FALSE;
568 config->base.maximumBaudrate = 50000000;
569 }
570
571
572 void IfxQspi_SpiMaster_isrDmaReceive(IfxQspi_SpiMaster *qspiHandle)
573 {
574 Ifx_DMA *dmaSFR = &MODULE_DMA;
575 IfxDma_ChannelId rxDmaChannelId = qspiHandle->dma.rxDmaChannelId;
576 IfxQspi_SpiMaster_Channel *chHandle = IfxQspi_SpiMaster_activeChannel(qspiHandle);
577
578 if (IfxDma_getAndClearChannelInterrupt(dmaSFR, rxDmaChannelId))
579 {
580 if (chHandle->deactivateSlso != NULL_PTR)
581 {
582 chHandle->deactivateSlso(chHandle);
583 }
584
585 chHandle->base.flags.onTransfer = 0;
586 IfxQspi_SpiMaster_unlock((IfxQspi_SpiMaster *)chHandle->base.driver);
587 }
588
589 IfxDma_getAndClearChannelPatternDetectionInterrupt(dmaSFR, rxDmaChannelId);
590 }
591
592
593 void IfxQspi_SpiMaster_isrDmaTransmit(IfxQspi_SpiMaster *qspiHandle)
594 {
595 IfxQspi_SpiMaster_Channel *chHandle = IfxQspi_SpiMaster_activeChannel(qspiHandle);
596 Ifx_DMA *dmaSFR = &MODULE_DMA;
597 IfxDma_ChannelId txDmaChannelId = qspiHandle->dma.txDmaChannelId;
598 Ifx_QSPI *qspiSFR = qspiHandle->qspi;
599 SpiIf_Job *job = &chHandle->base.tx;
600
601 if (IfxDma_getAndClearChannelPatternDetectionInterrupt(dmaSFR, txDmaChannelId))
602 {
603 // DMA_TC.031 workaround ..
604 IfxDma_getAndClearChannelInterrupt(dmaSFR, txDmaChannelId);
605 }
606 else if ((chHandle->mode == IfxQspi_SpiMaster_Mode_long) ||
607 (chHandle->mode == IfxQspi_SpiMaster_Mode_longContinuous))
608 {
609 IfxDma_getAndClearChannelInterrupt(dmaSFR, txDmaChannelId);
610 IfxDma_disableChannelTransaction(dmaSFR, txDmaChannelId);
611 }
612 else if (chHandle->mode == IfxQspi_SpiMaster_Mode_xxl)
613 {
614 IfxDma_getAndClearChannelInterrupt(dmaSFR, txDmaChannelId);
615 IfxDma_disableChannelTransaction(dmaSFR, txDmaChannelId);
616 }
617 else if (IfxDma_getAndClearChannelInterrupt(dmaSFR, txDmaChannelId) && (job->remaining > 1))
618 {
619 IfxDma_clearChannelInterrupt(dmaSFR, txDmaChannelId);
620 IfxDma_disableChannelTransaction(dmaSFR, txDmaChannelId);
621
622 if (job->data == NULL_PTR)
623 {
624 IfxQspi_writeBasicConfigurationEndStream(qspiSFR, chHandle->bacon.U);
625 IfxQspi_writeTransmitFifo(qspiSFR, chHandle->dummyTxValue);
626 }
627 else
628 {
629 IfxQspi_writeBasicConfigurationEndStream(qspiSFR, chHandle->bacon.U);
630
631 if (chHandle->dataWidth <= 8)
632 {
633 IfxQspi_writeTransmitFifo(qspiSFR, ((uint8 *)job->data)[job->remaining - 1]);
634 }
635 else if (chHandle->dataWidth <= 16)
636 {
637 IfxQspi_writeTransmitFifo(qspiSFR, ((uint16 *)job->data)[job->remaining - 1]);
638 }
639 else
640 {
641 IfxQspi_writeTransmitFifo(qspiSFR, ((uint32 *)job->data)[job->remaining - 1]);
642 }
643 }
644 }
645 }
646
647
648 void IfxQspi_SpiMaster_isrError(IfxQspi_SpiMaster *handle)
649 {
650 Ifx_QSPI *qspiSFR = handle->qspi;
651 uint16 errorFlags = IfxQspi_getErrorFlags(qspiSFR);
652 IfxQspi_clearAllEventFlags(qspiSFR);
653 IfxQspi_SpiMaster_Channel *chHandle = IfxQspi_SpiMaster_activeChannel(handle);
654 Ifx_DMA *dmaSFR = &MODULE_DMA;
655
656 /* store all the flags in the variable */
657
658 if ((errorFlags & IfxQspi_Error_parity))
659 {
660 chHandle->errorFlags.parityError = 1;
661 }
662
663 if ((errorFlags & IfxQspi_Error_configuration))
664 {
665 chHandle->errorFlags.configurationError = 1;
666 }
667
668 if ((errorFlags & IfxQspi_Error_baudrate))
669 {
670 chHandle->errorFlags.baudrateError = 1;
671 }
672
673 if ((errorFlags & IfxQspi_Error_expectTimeout))
674 {
675 chHandle->errorFlags.expectTimeoutError = 1;
676 }
677
678 if ((errorFlags & IfxQspi_Error_txfifoOverflow))
679 {
680 chHandle->errorFlags.txFifoOverflowError = 1;
681 }
682
683 if ((errorFlags & IfxQspi_Error_txfifoUnderflow))
684 {
685 chHandle->errorFlags.txFifoUnderflowError = 1;
686 }
687
688 if ((errorFlags & IfxQspi_Error_rxfifoOverflow))
689 {
690 chHandle->errorFlags.rxFifoOverflowError = 1;
691 }
692
693 if ((errorFlags & IfxQspi_Error_rxfifoUnderflow))
694 {
695 chHandle->errorFlags.rxFifoUnderflowError = 1;
696 }
697
698 if (errorFlags)
699 {
700 if (chHandle->deactivateSlso != NULL_PTR)
701 {
702 chHandle->deactivateSlso(chHandle);
703 }
704
705 chHandle->base.flags.onTransfer = 0;
706 IfxQspi_SpiMaster_unlock((IfxQspi_SpiMaster *)chHandle->base.driver);
707 }
708
709 if (handle->dma.useDma)
710 {
711 IfxDma_getAndClearChannelInterrupt(dmaSFR, handle->dma.rxDmaChannelId);
712 IfxDma_getAndClearChannelInterrupt(dmaSFR, handle->dma.txDmaChannelId);
713 }
714 }
715
716
717 IfxQspi_PhaseTransitionEvent IfxQspi_SpiMaster_isrPhaseTransition(IfxQspi_SpiMaster *handle)
718 {
719 Ifx_QSPI *qspiSFR = handle->qspi;
720 IfxQspi_PhaseTransitionEvent ptEvent = IfxQspi_PhaseTransitionEvent_endOfWait; /* default to 0 */
721
722 if (qspiSFR->STATUS.B.PT1F)
723 {
724 qspiSFR->FLAGSCLEAR.B.PT1C = 1;
725 ptEvent = (IfxQspi_PhaseTransitionEvent)(qspiSFR->GLOBALCON1.B.PT1);
726 }
727 else if (qspiSFR->STATUS.B.PT2F)
728 {
729 qspiSFR->FLAGSCLEAR.B.PT2C = 1;
730 ptEvent = (IfxQspi_PhaseTransitionEvent)(qspiSFR->GLOBALCON1.B.PT2);
731 }
732
733 return ptEvent;
734 }
735
736
737 void IfxQspi_SpiMaster_isrReceive(IfxQspi_SpiMaster *handle)
738 {
739 IfxQspi_SpiMaster_Channel *chHandle = IfxQspi_SpiMaster_activeChannel(handle);
740 chHandle->base.rxHandler(&chHandle->base);
741 handle->base.rxCount++;
742 }
743
744
745 void IfxQspi_SpiMaster_isrTransmit(IfxQspi_SpiMaster *handle)
746 {
747 IfxQspi_SpiMaster_Channel *chHandle = IfxQspi_SpiMaster_activeChannel(handle);
748 chHandle->base.txHandler(&chHandle->base);
749 handle->base.txCount++;
750 }
751
752
753 IfxQspi_PhaseTransitionEvent IfxQspi_SpiMaster_isrUserDefined(IfxQspi_SpiMaster *handle)
754 {
755 Ifx_QSPI *qspiSFR = handle->qspi;
756 IfxQspi_PhaseTransitionEvent ptEvent = IfxQspi_PhaseTransitionEvent_endOfWait; /* default to 0 */
757
758 if (qspiSFR->STATUS.B.USRF)
759 {
760 qspiSFR->FLAGSCLEAR.B.USRC = 1;
761 ptEvent = (IfxQspi_PhaseTransitionEvent)qspiSFR->GLOBALCON1.B.PT1; //
762 }
763
764 return ptEvent;
765 }
766
767
768 IFX_STATIC SpiIf_Status IfxQspi_SpiMaster_lock(IfxQspi_SpiMaster *handle)
769 {
770 sint32 sending = __swap((void *)&handle->base.sending, 1UL);
771 return (sending == 0) ? SpiIf_Status_ok : SpiIf_Status_busy;
772 }
773
774
775 void IfxQspi_SpiMaster_moveCounterControlConfiguration(Ifx_QSPI *qspi, IfxQspi_SpiMaster_MoveCounterControl *moveCounter)
776 {
777 IfxQspi_setMoveCounterInterruptBeforeLastEnabled(qspi, moveCounter->interruptBeforeLastEnabled);
778 IfxQspi_clearMoveCounterInterruptBeforeLastFlag(qspi, moveCounter->clearInterruptBeforeLastFlag);
779 IfxQspi_setMoveCounterInterruptBeforeLastFlag(qspi, moveCounter->setInterruptBeforeLastFlag);
780 IfxQspi_setMoveCounterInterruptAfterLastEnabled(qspi, moveCounter->interruptAfterLastEnabled);
781 IfxQspi_clearMoveCounterInterruptAfterLastFlag(qspi, moveCounter->clearInterruptAfterLastFlag);
782 IfxQspi_setMoveCounterInterruptAfterLastFlag(qspi, moveCounter->setInterruptAfterLastFlag);
783 IfxQspi_trail2InjectionEnabled(qspi, moveCounter->trail2InjectionEnabled);
784 }
785
786
787 void IfxQspi_SpiMaster_packLongModeBuffer(IfxQspi_SpiMaster_Channel *chHandle, void *data, uint32 *longFifoBuffer, Ifx_SizeT dataLength)
788 {
789 boolean isFirst = 0;
790 uint8 *src = (uint8 *)data;
791 uint32 i, baconDL;
792
793 baconDL = 16;
794
795 if (chHandle->mode == IfxQspi_SpiMaster_Mode_longContinuous)
796 {
797 chHandle->bacon.B.BYTE = 1;
798 chHandle->bacon.B.LAST = 0;
799 }
800 else if (chHandle->mode == IfxQspi_SpiMaster_Mode_long)
801 {
802 chHandle->bacon.B.BYTE = 1;
803 chHandle->bacon.B.LAST = 1;
804 }
805 else
806 {
807 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, IFX_ASSERT_FEATURE_NOT_IMPLEMENTED);
808 }
809
810 while (dataLength > 0)
811 {
812 if (dataLength <= 16)
813 {
814 baconDL = dataLength;
815 chHandle->bacon.B.LAST = 1;
816 }
817
818 dataLength -= (Ifx_SizeT)baconDL;
819
820 /* FILL BACON */
821 if (isFirst == 0)
822 {
823 isFirst = 1;
824 }
825 else
826 {
827 chHandle->bacon.B.DL = baconDL - 1;
828 *longFifoBuffer = chHandle->bacon.U;
829 longFifoBuffer++;
830 }
831
832 for (i = 0; i < baconDL / 4; i++)
833 {
834 *longFifoBuffer = *((uint32 *)src);
835 longFifoBuffer++;
836 src += 4;
837 }
838
839 /* Copy Last bytes */
840 switch (baconDL % 4)
841 {
842 case 1:
843 *longFifoBuffer = *src;
844 break;
845 case 2:
846 *longFifoBuffer = *src | (*(src + 1) << 8);
847 break;
848 case 3:
849 *longFifoBuffer = *src | (*(src + 1) << 8) | (*(src + 2) << 16);
850 break;
851 }
852 }
853 }
854
855
856 IFX_STATIC void IfxQspi_SpiMaster_read(IfxQspi_SpiMaster_Channel *chHandle)
857 {
858 IfxQspi_SpiMaster *handle = chHandle->base.driver->driver;
859 Ifx_QSPI *qspiSFR = handle->qspi;
860 SpiIf_Job *job = &chHandle->base.rx;
861
862 Ifx_SizeT count = (Ifx_SizeT)IfxQspi_getReceiveFifoLevel(qspiSFR);
863 count = __min(job->remaining, count);
864
865 if (job->data == NULL_PTR)
866 {
867 // no data should be buffered: do dummy reads
868 int i;
869
870 for (i = 0; i < count; ++i)
871 {
872 IfxQspi_readReceiveFifo(qspiSFR);
873 }
874 }
875 else
876 {
877 if (chHandle->dataWidth <= 8)
878 {
879 IfxQspi_read8(qspiSFR, job->data, count);
880 job->data = &(((uint8 *)job->data)[count]);
881 }
882 else if (chHandle->dataWidth <= 16)
883 {
884 IfxQspi_read16(qspiSFR, job->data, count);
885 job->data = &(((uint16 *)job->data)[count]);
886 }
887 else
888 {
889 IfxQspi_read32(qspiSFR, job->data, count);
890 job->data = &(((uint32 *)job->data)[count]);
891 }
892 }
893
894 job->remaining = job->remaining - count;
895
896 if (job->remaining == 0)
897 {
898 if (chHandle->deactivateSlso != NULL_PTR)
899 {
900 chHandle->deactivateSlso(chHandle);
901 }
902
903 chHandle->base.flags.onTransfer = 0;
904 IfxQspi_SpiMaster_unlock((IfxQspi_SpiMaster *)chHandle->base.driver);
905 }
906 }
907
908
909 SpiIf_Status IfxQspi_SpiMaster_setChannelBaudrate(IfxQspi_SpiMaster_Channel *chHandle, float32 baudrate)
910 {
911 IfxQspi_SpiMaster *handle = (IfxQspi_SpiMaster *)chHandle->base.driver->driver;
912 Ifx_QSPI *qspiSFR = handle->qspi;
913 SpiIf_ChConfig chConfig;
914 chConfig = IfxQspi_SpiMaster_getChannelConfig(chHandle);
915 chConfig.baudrate = baudrate;
916 IfxQspi_ChannelId cs = (IfxQspi_ChannelId)(chHandle->channelId % 8);
917 qspiSFR->ECON[cs].U = IfxQspi_calculateExtendedConfigurationValue(qspiSFR, (uint8)cs, &chConfig);
918 chHandle->bacon.U = IfxQspi_calculateBasicConfigurationValue(qspiSFR, chHandle->channelId, &chConfig.mode, chConfig.baudrate);
919 chHandle->base.baudrate = IfxQspi_calcRealBaudrate(qspiSFR, cs);
920 return SpiIf_Status_ok;
921 }
922
923
924 IFX_STATIC void IfxQspi_SpiMaster_unlock(IfxQspi_SpiMaster *handle)
925 {
926 handle->base.sending = 0UL;
927 }
928
929
930 IFX_STATIC void IfxQspi_SpiMaster_write(IfxQspi_SpiMaster_Channel *chHandle)
931 {
932 SpiIf_Job *job = &chHandle->base.tx;
933 IfxQspi_SpiMaster *handle = chHandle->base.driver->driver;
934
935 if (handle->dma.useDma)
936 {
937 Ifx_DMA *dmaSFR = &MODULE_DMA;
938
939 Ifx_QSPI *qspiSFR = handle->qspi;
940 volatile Ifx_SRC_SRCR *src = IfxQspi_getTransmitSrc(qspiSFR);
941
942 IfxDma_ChannelId txDmaChannelId = handle->dma.txDmaChannelId;
943 IfxDma_ChannelId rxDmaChannelId = handle->dma.rxDmaChannelId;
944
945 boolean interruptState = IfxCpu_disableInterrupts();
946
947 if (job->remaining > 1)
948 {
949 IfxDma_setChannelTransferCount(dmaSFR, txDmaChannelId, job->remaining - 1);
950
951 if (chHandle->dataWidth <= 8)
952 {
953 IfxDma_setChannelMoveSize(dmaSFR, txDmaChannelId, IfxDma_ChannelMoveSize_8bit);
954 }
955 else if (chHandle->dataWidth <= 16)
956 {
957 IfxDma_setChannelMoveSize(dmaSFR, txDmaChannelId, IfxDma_ChannelMoveSize_16bit);
958 }
959 else
960 {
961 IfxDma_setChannelMoveSize(dmaSFR, txDmaChannelId, IfxDma_ChannelMoveSize_32bit);
962 }
963
964 if (job->data == NULL_PTR)
965 {
966 IfxDma_setChannelSourceAddress(dmaSFR, txDmaChannelId, (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &(chHandle->dummyTxValue)));
967 IfxDma_setChannelSourceIncrementStep(dmaSFR, txDmaChannelId, IfxDma_ChannelIncrementStep_1,
968 IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_4);
969 /* need to enable circular buffering to avoid increment higher than 4 bytes */
970 /* we must do this direct why we don't have function for this */
971 dmaSFR->CH[txDmaChannelId].ADICR.B.SCBE = TRUE;
972 }
973 else
974 {
975 IfxDma_setChannelSourceAddress(dmaSFR, txDmaChannelId, (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), job->data));
976 IfxDma_setChannelSourceIncrementStep(dmaSFR, txDmaChannelId, IfxDma_ChannelIncrementStep_1,
977 IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_none);
978 /* maybe circular buffering was enabled by other call, we disable the circular buffering */
979 /* we must do this direct why we don't have function for this */
980 dmaSFR->CH[txDmaChannelId].ADICR.B.SCBE = FALSE;
981 }
982
983 IfxDma_setChannelDestinationAddress(dmaSFR, txDmaChannelId, (void *)&qspiSFR->DATAENTRY[0].U);
984 IfxDma_setChannelDestinationIncrementStep(dmaSFR, txDmaChannelId, IfxDma_ChannelIncrementStep_1,
985 IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_none);
986
987 IfxDma_clearChannelInterrupt(dmaSFR, txDmaChannelId);
988 }
989
990 /* Receive config */
991 IfxDma_setChannelTransferCount(dmaSFR, rxDmaChannelId, job->remaining);
992
993 if (chHandle->dataWidth <= 8)
994 {
995 IfxDma_setChannelMoveSize(dmaSFR, rxDmaChannelId, IfxDma_ChannelMoveSize_8bit);
996 }
997 else if (chHandle->dataWidth <= 16)
998 {
999 IfxDma_setChannelMoveSize(dmaSFR, rxDmaChannelId, IfxDma_ChannelMoveSize_16bit);
1000 }
1001 else
1002 {
1003 IfxDma_setChannelMoveSize(dmaSFR, rxDmaChannelId, IfxDma_ChannelMoveSize_32bit);
1004 }
1005
1006 if (chHandle->base.rx.data == NULL_PTR)
1007 {
1008 IfxDma_setChannelDestinationAddress(dmaSFR, rxDmaChannelId, (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &(chHandle->dummyRxValue)));
1009 IfxDma_setChannelDestinationIncrementStep(dmaSFR, rxDmaChannelId, IfxDma_ChannelIncrementStep_1,
1010 IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_4);
1011 /* need to enable circular buffering to avoid increment higher than 4 bytes */
1012 /* we must do this direct why we don't have function for this */
1013 dmaSFR->CH[rxDmaChannelId].ADICR.B.DCBE = TRUE;
1014 }
1015 else
1016 {
1017 IfxDma_setChannelDestinationAddress(dmaSFR, rxDmaChannelId, (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), chHandle->base.rx.data));
1018 IfxDma_setChannelDestinationIncrementStep(dmaSFR, rxDmaChannelId, IfxDma_ChannelIncrementStep_1,
1019 IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_none);
1020 /* maybe circular buffering was enabled by other call, we disable the circular buffering */
1021 /* we must do this direct why we don't have function for this */
1022 dmaSFR->CH[rxDmaChannelId].ADICR.B.DCBE = FALSE;
1023 }
1024
1025 IfxDma_clearChannelInterrupt(dmaSFR, rxDmaChannelId);
1026 IfxQspi_clearAllEventFlags(qspiSFR);
1027 src = IfxQspi_getTransmitSrc(qspiSFR);
1028 IfxSrc_clearRequest(src);
1029 src = IfxQspi_getReceiveSrc(qspiSFR);
1030 IfxSrc_clearRequest(src);
1031 src = IfxQspi_getErrorSrc(qspiSFR);
1032 IfxSrc_clearRequest(src);
1033 IfxDma_clearChannelInterrupt(dmaSFR, rxDmaChannelId);
1034 IfxDma_enableChannelTransaction(dmaSFR, rxDmaChannelId);
1035
1036 if (job->remaining > 1)
1037 {
1038 IfxDma_clearChannelInterrupt(dmaSFR, txDmaChannelId);
1039 IfxDma_enableChannelTransaction(dmaSFR, txDmaChannelId);
1040
1041 if (chHandle->channelBasedCs == IfxQspi_SpiMaster_ChannelBasedCs_disabled)
1042 {
1043 IfxQspi_writeBasicConfigurationBeginStream(qspiSFR, chHandle->bacon.U);
1044 }
1045 else
1046 {
1047 IfxQspi_writeBasicConfigurationEndStream(qspiSFR, chHandle->bacon.U);
1048 }
1049 }
1050 else
1051 {
1052 if (job->data == NULL_PTR)
1053 {
1054 IfxQspi_writeBasicConfigurationEndStream(qspiSFR, chHandle->bacon.U);
1055 IfxQspi_writeTransmitFifo(qspiSFR, chHandle->dummyTxValue);
1056 }
1057 else
1058 {
1059 IfxQspi_writeBasicConfigurationEndStream(qspiSFR, chHandle->bacon.U);
1060
1061 if (chHandle->dataWidth <= 8)
1062 {
1063 IfxQspi_writeTransmitFifo(qspiSFR, ((uint8 *)job->data)[job->remaining - 1]);
1064 }
1065 else if (chHandle->dataWidth <= 16)
1066 {
1067 IfxQspi_writeTransmitFifo(qspiSFR, ((uint16 *)job->data)[job->remaining - 1]);
1068 }
1069 else
1070 {
1071 IfxQspi_writeTransmitFifo(qspiSFR, ((uint32 *)job->data)[job->remaining - 1]);
1072 }
1073 }
1074 }
1075
1076 IfxCpu_restoreInterrupts(interruptState);
1077 }
1078
1079 else
1080 {
1081 if (job->remaining > 0)
1082 {
1083 IfxQspi_SpiMaster *handle = chHandle->base.driver->driver;
1084 Ifx_QSPI *qspiSFR = handle->qspi;
1085 IfxQspi_ChannelId cs = (IfxQspi_ChannelId)(chHandle->bacon.B.CS);
1086
1087 Ifx_SizeT count = (Ifx_SizeT)(IFXQSPI_HWFIFO_DEPTH - IfxQspi_getTransmitFifoLevel(qspiSFR));
1088
1089 if (chHandle->firstWrite == TRUE)
1090 {
1091 // -1, since BACON allocates one FIFO entry
1092 count--;
1093 }
1094
1095 if (job->remaining == count)
1096 {
1097 // Need to write BACON next time
1098 count--;
1099 }
1100
1101 count = __min(job->remaining, count);
1102
1103 if (count > 0)
1104 {
1105 job->remaining = job->remaining - count;
1106
1107 // we have to push another BACON into FIFO before the last data word
1108 boolean lastWrite = (job->remaining == 0) ? TRUE : FALSE;
1109 boolean interruptState;
1110
1111 /*Disable interrupts only if conditions a, b and c are satisfied.
1112 * a.)first write is true(i.e call from exchange only and not from transmit ISR) and
1113 * b.)on multi-byte write(no need to disable for single byte write) and
1114 * c.)this is not last write(Condition needed for 2 byte write from exchange in firstwrite)
1115 *
1116 * 1.Call from ISR no need to disable.
1117 * 2.Call from exchange and write_count(here write_count=count) is 1 or 2, no need to disable,
1118 * because when ISR call happens job->remaining=0.
1119 * 3.Call from exchange and write_count=3,(count=2, job->remaining=1), disable interrupt.
1120 * 4.Multi-byte write call from exchange disable interrupt.*/
1121 if ((chHandle->firstWrite == TRUE) && (count > 1) && (job->remaining != 0))
1122 {
1123 interruptState = IfxCpu_disableInterrupts();
1124 }
1125 else
1126 {
1127 interruptState = IfxCpu_areInterruptsEnabled();
1128 }
1129
1130 // push BACON into FIFO before first data word
1131 if (chHandle->firstWrite == TRUE)
1132 {
1133 chHandle->firstWrite = FALSE;
1134
1135 if (chHandle->channelBasedCs == IfxQspi_SpiMaster_ChannelBasedCs_disabled)
1136 {
1137 IfxQspi_writeBasicConfigurationBeginStream(qspiSFR, chHandle->bacon.U);
1138 }
1139 else
1140 {
1141 IfxQspi_writeBasicConfigurationEndStream(qspiSFR, chHandle->bacon.U);
1142 }
1143 }
1144
1145 if (job->data == NULL_PTR)
1146 {
1147 // no data should be sent (only received): send all-1
1148 int i;
1149 uint32 writeVal = chHandle->dummyTxValue;
1150
1151 if (lastWrite)
1152 {
1153 for (i = 0; i < count - 1; ++i)
1154 {
1155 IfxQspi_writeTransmitFifo(qspiSFR, writeVal);
1156 }
1157
1158 IfxQspi_writeBasicConfigurationEndStream(qspiSFR, chHandle->bacon.U);
1159 IfxQspi_writeTransmitFifo(qspiSFR, writeVal);
1160 }
1161 else
1162 {
1163 for (i = 0; i < count; ++i)
1164 {
1165 IfxQspi_writeTransmitFifo(qspiSFR, writeVal);
1166 }
1167 }
1168 }
1169 else
1170 {
1171 if (chHandle->dataWidth <= 8)
1172 {
1173 if (lastWrite)
1174 {
1175 if (count > 1)
1176 {
1177 IfxQspi_write8(qspiSFR, cs, job->data, count - 1);
1178 }
1179
1180 IfxQspi_writeBasicConfigurationEndStream(qspiSFR, chHandle->bacon.U);
1181 IfxQspi_writeTransmitFifo(qspiSFR, ((uint8 *)job->data)[count - 1]);
1182 }
1183 else
1184 {
1185 IfxQspi_write8(qspiSFR, cs, job->data, count);
1186 }
1187
1188 job->data = &(((uint8 *)job->data)[count]);
1189 }
1190 else if (chHandle->dataWidth <= 16)
1191 {
1192 if (lastWrite)
1193 {
1194 if (count > 1)
1195 {
1196 IfxQspi_write16(qspiSFR, cs, job->data, count - 1);
1197 }
1198
1199 IfxQspi_writeBasicConfigurationEndStream(qspiSFR, chHandle->bacon.U);
1200 IfxQspi_writeTransmitFifo(qspiSFR, ((uint16 *)job->data)[count - 1]);
1201 }
1202 else
1203 {
1204 IfxQspi_write16(qspiSFR, cs, job->data, count);
1205 job->data = &(((uint16 *)job->data)[count]);
1206 }
1207 }
1208 else
1209 {
1210 if (lastWrite)
1211 {
1212 if (count > 1)
1213 {
1214 IfxQspi_write32(qspiSFR, cs, job->data, count - 1);
1215 }
1216
1217 IfxQspi_writeBasicConfigurationEndStream(qspiSFR, chHandle->bacon.U);
1218 IfxQspi_writeTransmitFifo(qspiSFR, ((uint32 *)job->data)[count - 1]);
1219 }
1220 else
1221 {
1222 IfxQspi_write32(qspiSFR, cs, job->data, count);
1223 job->data = &(((uint32 *)job->data)[count]);
1224 }
1225 }
1226 }
1227
1228 IfxCpu_restoreInterrupts(interruptState);
1229 }
1230 }
1231 }
1232 }
1233
1234
1235 IFX_STATIC void IfxQspi_SpiMaster_writeLong(IfxQspi_SpiMaster_Channel *chHandle)
1236 {
1237 SpiIf_Job *job = &chHandle->base.tx;
1238 IfxQspi_SpiMaster *handle = chHandle->base.driver->driver;
1239 uint8 fifosize = IFXQSPI_FIFO32BITSIZE(job->remaining);
1240
1241 if (chHandle->mode != IfxQspi_SpiMaster_Mode_xxl)
1242 {
1243 fifosize = fifosize + IFXQSPI_BACONSIZE(job->remaining) - 1; // combining this line and above doesn't work
1244 }
1245
1246 if (handle->dma.useDma)
1247 {
1248 Ifx_DMA *dmaSFR = &MODULE_DMA;
1249
1250 Ifx_QSPI *qspiSFR = handle->qspi;
1251 volatile Ifx_SRC_SRCR *src = IfxQspi_getTransmitSrc(qspiSFR);
1252
1253 IfxDma_ChannelId txDmaChannelId = handle->dma.txDmaChannelId;
1254 IfxDma_ChannelId rxDmaChannelId = handle->dma.rxDmaChannelId;
1255
1256 boolean interruptState = IfxCpu_disableInterrupts();
1257
1258 {
1259 IfxDma_setChannelTransferCount(dmaSFR, txDmaChannelId, fifosize);
1260
1261 IfxDma_setChannelMoveSize(dmaSFR, txDmaChannelId, IfxDma_ChannelMoveSize_32bit);
1262
1263 {
1264 IfxDma_setChannelSourceAddress(dmaSFR, txDmaChannelId, (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), job->data));
1265 IfxDma_setChannelSourceIncrementStep(dmaSFR, txDmaChannelId, IfxDma_ChannelIncrementStep_1,
1266 IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_none);
1267 /* maybe circular buffering was enabled by other call, we disable the circular buffering */
1268 /* we must do this direct why we don't have function for this */
1269 dmaSFR->CH[txDmaChannelId].ADICR.B.SCBE = FALSE;
1270
1271 if (chHandle->mode != IfxQspi_SpiMaster_Mode_xxl)
1272 {
1273 IfxDma_setChannelDestinationAddress(dmaSFR, txDmaChannelId, (uint32 *)&qspiSFR->MIXENTRY.U);
1274 IfxDma_setChannelDestinationIncrementStep(dmaSFR, txDmaChannelId, IfxDma_ChannelIncrementStep_1,
1275 IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_none);
1276 }
1277 }
1278
1279 IfxDma_clearChannelInterrupt(dmaSFR, txDmaChannelId);
1280 }
1281
1282 /* Receive config */
1283 IfxDma_setChannelTransferCount(dmaSFR, rxDmaChannelId, IFXQSPI_FIFO32BITSIZE(job->remaining));
1284 IfxDma_setChannelMoveSize(dmaSFR, rxDmaChannelId, IfxDma_ChannelMoveSize_32bit);
1285
1286 if (chHandle->base.rx.data == NULL_PTR)
1287 {
1288 IfxDma_setChannelDestinationAddress(dmaSFR, rxDmaChannelId, (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &(chHandle->dummyRxValue)));
1289 IfxDma_setChannelDestinationIncrementStep(dmaSFR, rxDmaChannelId, IfxDma_ChannelIncrementStep_1,
1290 IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_4);
1291 /* need to enable circular buffering to avoid increment higher than 4 bytes */
1292 /* we must do this direct why we don't have function for this */
1293 dmaSFR->CH[rxDmaChannelId].ADICR.B.DCBE = TRUE;
1294 }
1295 else
1296 {
1297 IfxDma_setChannelDestinationAddress(dmaSFR, rxDmaChannelId, (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), chHandle->base.rx.data));
1298 IfxDma_setChannelDestinationIncrementStep(dmaSFR, rxDmaChannelId, IfxDma_ChannelIncrementStep_1,
1299 IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_none);
1300 /* maybe circular buffering was enabled by other call, we disable the circular buffering */
1301 /* we must do this direct why we don't have function for this */
1302 dmaSFR->CH[rxDmaChannelId].ADICR.B.DCBE = FALSE;
1303 }
1304
1305 IfxDma_clearChannelInterrupt(dmaSFR, rxDmaChannelId);
1306 IfxQspi_clearAllEventFlags(qspiSFR);
1307 src = IfxQspi_getTransmitSrc(qspiSFR);
1308 IfxSrc_clearRequest(src);
1309 src = IfxQspi_getReceiveSrc(qspiSFR);
1310 IfxSrc_clearRequest(src);
1311 src = IfxQspi_getErrorSrc(qspiSFR);
1312 IfxSrc_clearRequest(src);
1313 IfxDma_clearChannelInterrupt(dmaSFR, rxDmaChannelId);
1314 IfxDma_enableChannelTransaction(dmaSFR, rxDmaChannelId);
1315
1316 if (chHandle->mode == IfxQspi_SpiMaster_Mode_longContinuous)
1317 {
1318 (job->remaining >= 16) ? (chHandle->bacon.B.DL = 16 - 1) : (chHandle->bacon.B.DL = job->remaining - 1);
1319 (job->remaining >= 16) ? (chHandle->bacon.B.LAST = 0) : (chHandle->bacon.B.LAST = 1);
1320 chHandle->bacon.B.BYTE = 1;
1321 }
1322 else if (chHandle->mode == IfxQspi_SpiMaster_Mode_long)
1323 {
1324 (job->remaining >= 16) ? (chHandle->bacon.B.DL = 16 - 1) : (chHandle->bacon.B.DL = job->remaining - 1);
1325 chHandle->bacon.B.LAST = 1;
1326 chHandle->bacon.B.BYTE = 1;
1327 }
1328 else
1329 {
1330 chHandle->bacon.B.LAST = 1;
1331 chHandle->bacon.B.BYTE = 1;
1332 chHandle->bacon.B.DL = 0;
1333 }
1334
1335 {
1336 IfxDma_clearChannelInterrupt(dmaSFR, txDmaChannelId);
1337 IfxDma_enableChannelTransaction(dmaSFR, txDmaChannelId);
1338 }
1339
1340 if (chHandle->mode != IfxQspi_SpiMaster_Mode_xxl)
1341 {
1342 qspiSFR->MIXENTRY.U = chHandle->bacon.U;
1343 }
1344 else
1345 {
1346 qspiSFR->BACONENTRY.U = chHandle->bacon.U;
1347 }
1348
1349 IfxCpu_restoreInterrupts(interruptState);
1350 }
1351 else
1352 {
1353 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, IFX_ASSERT_FEATURE_NOT_IMPLEMENTED);
1354 }
1355 }
IfxQspi_SpiMaster_Channel_s::bacon
Ifx_QSPI_BACON bacon
basic configuration register
Definition: IfxQspi_SpiMaster.h:673
IfxQspi_SpiMaster_Pins::pinDriver
IfxPort_PadDriver pinDriver
The pad driver mode which should be configured.
Definition: IfxQspi_SpiMaster.h:639
IfxQspi_SpiMaster_ChannelBasedCs_disabled
Slso will be low for complete frame.
Definition: IfxQspi_SpiMaster.h:531
IfxQspi_SpiMaster_MoveCounterControl::clearInterruptAfterLastFlag
boolean clearInterruptAfterLastFlag
Clear Interrupt After Last Flag.
Definition: IfxQspi_SpiMaster.h:623
IfxQspi_SpiMaster_Mode_shortContinuous
Short Continous Mode.
Definition: IfxQspi_SpiMaster.h:539
IfxDma_ChannelId
IfxDma_ChannelId
DMA channel resources definition.
Definition: IfxDma_cfg.h:102
IfxQspi_Error_txfifoOverflow
TX FIFO Overflow Error.
Definition: IfxQspi.h:129
Ifx_ActiveState_low
The signal is low active.
Definition: Ifx_Types.h:115
IfxQspi_SpiMaster
Module handle data structure.
Definition: IfxQspi_SpiMaster.h:648
IfxQspi_SpiMaster_Output::mode
IfxPort_OutputMode mode
The SLSO pin output mode.
Definition: IfxQspi_SpiMaster.h:565
IfxQspi_PhaseTransitionEvent_endOfWait
BUSY (end of WAIT phase)
Definition: IfxQspi.h:195
SpiIf_ChMode::dataHeading
uint32 dataHeading
SpiIf_DataHeading
Definition: SpiIf.h:193
IfxDma_Dma_ChannelConfig::moveSize
IfxDma_ChannelMoveSize moveSize
Read/write data size.
Definition: IfxDma_Dma.h:493
SpiIf_funcs::getStatus
SpiIf_GetStatus getStatus
Definition: SpiIf.h:144
IfxQspi_Error_rxfifoUnderflow
RX FIFO Underflow Error.
Definition: IfxQspi.h:132
IfxQspi_SpiMaster_Pins::mrstMode
IfxPort_InputMode mrstMode
The MRST pin input mode.
Definition: IfxQspi_SpiMaster.h:638
IfxQspi_calcRealBaudrate
float IfxQspi_calcRealBaudrate(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId)
Function to calculate baudrate of specified channel.
Definition: IfxQspi.c:54
IfxQspi_SpiMaster_Output
SLSO pin configuration structure.
Definition: IfxQspi_SpiMaster.h:562
IfxDma_Dma_ChannelConfig::sourceAddressCircularRange
IfxDma_ChannelIncrementCircular sourceAddressCircularRange
Determines which part of the source address remains unchanged and therby not updated after each move...
Definition: IfxDma_Dma.h:500
IfxDma_Dma_ChannelConfig::channelId
IfxDma_ChannelId channelId
Specifies the channel being used.
Definition: IfxDma_Dma.h:483
SpiIf_funcs::onRx
SpiIf_OnEvent onRx
Definition: SpiIf.h:146
IfxQspi_SpiMaster_Channel_s::slsoActiveState
Ifx_ActiveState slsoActiveState
Specifies the current state of SLSO.
Definition: IfxQspi_SpiMaster.h:681
IfxQspi_read8
void IfxQspi_read8(Ifx_QSPI *qspi, uint8 *data, Ifx_SizeT count)
Reads 8bit data from the Rx FIFO.
Definition: IfxQspi.c:337
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxQspi_SpiMaster_Channel_s::deactivateSlso
IfxQspi_SpiMaster_AutoSlso deactivateSlso
Specifies function for Auto SLSO deactivation.
Definition: IfxQspi_SpiMaster.h:676
IfxQspi_Error_baudrate
BaudRate Error.
Definition: IfxQspi.h:128
IfxQspi_read16
void IfxQspi_read16(Ifx_QSPI *qspi, uint16 *data, Ifx_SizeT count)
Reads 16bit data from the Rx FIFO.
Definition: IfxQspi.c:313
IfxQspi_SpiMaster_Channel_s::channelId
IfxQspi_ChannelId channelId
QSPI channel Number.
Definition: IfxQspi_SpiMaster.h:679
SpiIf_ChConfig_::baudrate
float32 baudrate
Specifies the SPI baudrate.
Definition: SpiIf.h:228
IfxQspi_ExpectTimeout_2097152
Expect phse time out 2097152.
Definition: IfxQspi.h:156
IFXQSPI_HWFIFO_DEPTH
#define IFXQSPI_HWFIFO_DEPTH
Definition: IfxQspi_cfg.h:67
SpiIf_ChConfig_
Definition: SpiIf.h:225
IfxQspi_SpiMaster_MoveCounterControl::moveCounterEnabled
boolean moveCounterEnabled
Enable the Move Counter.
Definition: IfxQspi_SpiMaster.h:626
SpiIf_ChMode::csLeadDelay
SpiIf_SlsoTiming_HalfTsclk csLeadDelay
CS Lead Delay in Tsclk/2 units.
Definition: SpiIf.h:202
IfxQspi_SpiMaster_Config::pauseRunTransition
IfxQspi_PauseRunTransition pauseRunTransition
Specifies module run or pause mode.
Definition: IfxQspi_SpiMaster.h:697
IfxQspi_PhaseTransitionEvent
IfxQspi_PhaseTransitionEvent
Phase Transition Event.
Definition: IfxQspi.h:193
SpiIf_Ch_::tx
SpiIf_Job tx
Definition: SpiIf.h:217
IfxPort_OutputMode_pushPull
Definition: IfxPort.h:142
IfxQspi_Error_parity
Parity Error.
Definition: IfxQspi.h:126
IfxQspi_SpiMaster_Pins::mtsrMode
IfxPort_OutputMode mtsrMode
The MTSR pin output mode.
Definition: IfxQspi_SpiMaster.h:636
IfxQspi_SpiMaster_isrError
void IfxQspi_SpiMaster_isrError(IfxQspi_SpiMaster *handle)
Error Interrupt handler.
Definition: IfxQspi_SpiMaster.c:648
IfxQspi_SpiMaster_activeChannel
IFX_STATIC IfxQspi_SpiMaster_Channel * IfxQspi_SpiMaster_activeChannel(IfxQspi_SpiMaster *handle)
Gets current active channel.
Definition: IfxQspi_SpiMaster.c:127
IfxQspi_getErrorFlags
IFX_INLINE uint16 IfxQspi_getErrorFlags(Ifx_QSPI *qspi)
Definition: IfxQspi.h:1028
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:100
SpiIf_ChMode::loopback
uint32 loopback
0 = normal mode, 1 = loopback mode
Definition: SpiIf.h:190
IfxDma_setChannelSourceAddress
IFX_INLINE void IfxDma_setChannelSourceAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId, const void *address)
Configure the source address.
Definition: IfxDma.h:1656
IfxQspi_SpiMaster_MoveCounterControl::clearInterruptBeforeLastFlag
boolean clearInterruptBeforeLastFlag
Clear Interrupt Before Last Flag.
Definition: IfxQspi_SpiMaster.h:620
IfxQspi_SpiMaster_Dma::rxDmaChannel
IfxDma_Dma_Channel rxDmaChannel
receive DMA channel handle
Definition: IfxQspi_SpiMaster.h:577
IfxQspi_TxFifoInt_1
TxFifo Interrupt Threshold #1.
Definition: IfxQspi.h:276
SpiIf_ChMode::dataWidth
uint32 dataWidth
range 2 .. 32 bits (note 2 = 2-bits, 3 = 3-bits ...
Definition: SpiIf.h:194
IfxQspi_SpiMaster_Channel_s::slso
IfxPort_Pin slso
Defines SLSO pin.
Definition: IfxQspi_SpiMaster.h:674
IfxDma_Dma_initChannelConfig
void IfxDma_Dma_initChannelConfig(IfxDma_Dma_ChannelConfig *config, IfxDma_Dma *dma)
initialize the DMA module channel configuration
Definition: IfxDma_Dma.c:182
IfxQspi_SpiMaster_Config::txFifoMode
IfxQspi_FifoMode txFifoMode
Specifies the transmit FIFO mode.
Definition: IfxQspi_SpiMaster.h:702
SpiIf_::driver
pvoid driver
Spi specific driver.
Definition: SpiIf.h:152
IfxDma_ChannelMoveSize_16bit
1 DMA move is 16 bit wide
Definition: IfxDma.h:175
IfxQspi_SpiMaster_writeLong
IFX_STATIC void IfxQspi_SpiMaster_writeLong(IfxQspi_SpiMaster_Channel *chHandle)
Writes Long/xxl data into the Tx FIFO.
Definition: IfxQspi_SpiMaster.c:1235
IfxDma_ChannelMoveSize_8bit
1 DMA move is 8 bit wide
Definition: IfxDma.h:174
IfxQspi_SpiMaster_MoveCounterControl::interruptAfterLastEnabled
boolean interruptAfterLastEnabled
Enable bit for Interrupt after last word.
Definition: IfxQspi_SpiMaster.h:622
IfxPort_State_high
Ifx_P pin is set to high.
Definition: IfxPort.h:190
IfxQspi_SpiMaster_isrDmaReceive
void IfxQspi_SpiMaster_isrDmaReceive(IfxQspi_SpiMaster *qspiHandle)
Transmit interrupt handler.
Definition: IfxQspi_SpiMaster.c:572
IfxQspi_SpiMaster_moveCounterControlConfiguration
void IfxQspi_SpiMaster_moveCounterControlConfiguration(Ifx_QSPI *qspi, IfxQspi_SpiMaster_MoveCounterControl *moveCounter)
Definition: IfxQspi_SpiMaster.c:775
IfxDma_Dma_ChannelConfig::sourceAddress
uint32 sourceAddress
Source address for the DMA channel.
Definition: IfxDma_Dma.h:484
TxRxHandler
void(* TxRxHandler)(SpiIf_Ch *handle)
Definition: SpiIf.h:209
IfxQspi_SpiMaster_Config::pins
IFX_CONST IfxQspi_SpiMaster_Pins * pins
structure for QSPI Master pins
Definition: IfxQspi_SpiMaster.h:700
IfxQspi_SpiMaster_Mode_xxl
XXL Mode.
Definition: IfxQspi_SpiMaster.h:541
SpiIf_::activeChannel
SpiIf_Ch * activeChannel
Channel actually transmitting / receiving.
Definition: SpiIf.h:154
IfxQspi_SpiMaster_isrPhaseTransition
IfxQspi_PhaseTransitionEvent IfxQspi_SpiMaster_isrPhaseTransition(IfxQspi_SpiMaster *handle)
Phase Transition interrupt handler.
Definition: IfxQspi_SpiMaster.c:717
IfxQspi_SpiMaster_Input::mode
IfxPort_InputMode mode
The SLSI pin input mode.
Definition: IfxQspi_SpiMaster.h:557
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxQspi_write16
void IfxQspi_write16(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint16 *data, Ifx_SizeT count)
Writes 16bit data into the Tx FIFO.
Definition: IfxQspi.c:412
Spi_ErrorChecks::reserved
uint32 reserved
Definition: SpiIf.h:182
IfxQspi_Error_rxfifoOverflow
RX FIFO Overflow Error.
Definition: IfxQspi.h:131
IfxQspi_Sclk_Out
SCLK pin mapping structure.
Definition: IfxQspi_PinMap.h:112
IfxQspi_SpiMaster_Config::dma
IfxQspi_SpiMaster_DmaConfig dma
Dma configuration.
Definition: IfxQspi_SpiMaster.h:701
Ifx_ParityMode_even
Definition: Ifx_Types.h:121
IfxDma_Dma_ChannelConfig::blockMode
IfxDma_ChannelMove blockMode
Number of moves in a transfer.
Definition: IfxDma_Dma.h:490
SpiIf_ChMode::parityCheck
uint32 parityCheck
0 = disabled, 1 = enabled
Definition: SpiIf.h:198
IfxQspi_SpiMaster_setChannelBaudrate
SpiIf_Status IfxQspi_SpiMaster_setChannelBaudrate(IfxQspi_SpiMaster_Channel *chHandle, float32 baudrate)
Set the channel baudrate.
Definition: IfxQspi_SpiMaster.c:909
float32
float float32
Definition: Platform_Types.h:170
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
IfxDma_setChannelDestinationIncrementStep
IFX_INLINE void IfxDma_setChannelDestinationIncrementStep(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size)
Configure a DMA channel destination pointer.
Definition: IfxDma.h:1603
IfxQspi_SpiMaster_Config::rxFifoMode
IfxQspi_FifoMode rxFifoMode
Specifies the Receive FIFO mode.
Definition: IfxQspi_SpiMaster.h:703
IfxDma_Dma_ChannelConfig::sourceCircularBufferEnabled
boolean sourceCircularBufferEnabled
Enables/Disables the source circular buffering.
Definition: IfxDma_Dma.h:505
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
IfxQspi_setMoveCounterInterruptBeforeLastFlag
IFX_INLINE void IfxQspi_setMoveCounterInterruptBeforeLastFlag(Ifx_QSPI *qspi, boolean setInterrupt)
set the interrupt before last flag
Definition: IfxQspi.h:1253
IfxQspi_writeBasicConfigurationBeginStream
IFX_INLINE void IfxQspi_writeBasicConfigurationBeginStream(Ifx_QSPI *qspi, uint32 baconVal)
Write configuration into BACON register with .LAST flag set to 0.
Definition: IfxQspi.h:1314
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxDma_enableChannelTransaction
IFX_INLINE void IfxDma_enableChannelTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Enable a DMA channel hardware transaction request.
Definition: IfxDma.h:1351
IfxQspi_SpiMaster_Output::driver
IfxPort_PadDriver driver
The pad driver mode which should be configured.
Definition: IfxQspi_SpiMaster.h:566
IfxQspi_SpiMaster_Config::allowSleepMode
boolean allowSleepMode
Specifies module sleep mode.
Definition: IfxQspi_SpiMaster.h:695
IfxQspi_SpiMaster_exchange
SpiIf_Status IfxQspi_SpiMaster_exchange(IfxQspi_SpiMaster_Channel *chHandle, const void *src, void *dest, Ifx_SizeT count)
Exchanges data between source and data.
Definition: IfxQspi_SpiMaster.c:140
IfxDma_Dma_ChannelConfig::destinationCircularBufferEnabled
boolean destinationCircularBufferEnabled
Enables/Disables the destination circular buffering.
Definition: IfxDma_Dma.h:506
IfxQspi_FifoMode_combinedMove
Combined Move Mode.
Definition: IfxQspi.h:288
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:113
SpiIf_ClockPolarity_idleHigh
Definition: SpiIf.h:104
IfxDma_Dma_ChannelConfig::hardwareRequestEnabled
boolean hardwareRequestEnabled
Enabling channel transaction via hardware request.
Definition: IfxDma_Dma.h:497
IfxQspi_trail2InjectionEnabled
IFX_INLINE void IfxQspi_trail2InjectionEnabled(Ifx_QSPI *qspi, boolean trail2Enabled)
specifies whether to inject the trail2 from bacon configuration or mccon configuration registers ...
Definition: IfxQspi.h:1302
IfxQspi_SpiMaster_ErrorFlags::rxFifoOverflowError
uint16 rxFifoOverflowError
[5:5] RxFifo Overflow Error
Definition: IfxQspi_SpiMaster.h:602
Spi_ErrorChecks::baudrate
uint32 baudrate
TRUE = checked, FALSE = ignored.
Definition: SpiIf.h:178
IfxCpu_restoreInterrupts
IFX_INLINE void IfxCpu_restoreInterrupts(boolean enabled)
API to restore global interrupt with that of the passed parameter.
Definition: IfxCpu.h:1026
IfxDma_setChannelSourceIncrementStep
IFX_INLINE void IfxDma_setChannelSourceIncrementStep(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size)
Configure a DMA channel source pointer.
Definition: IfxDma.h:1662
IfxPort_State
IfxPort_State
Ifx_P output modification modes definition.
Definition: IfxPort.h:187
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
SpiIf_Ch_::baudrate
sint32 baudrate
Real baudrate.
Definition: SpiIf.h:216
IFX_ASSERT_FEATURE_NOT_IMPLEMENTED
#define IFX_ASSERT_FEATURE_NOT_IMPLEMENTED
Constant to be used to indicate not implemented feature.
Definition: Ifx_Assert.h:64
IfxQspi_SpiMaster_Config::pauseOnBaudrateSpikeErrors
boolean pauseOnBaudrateSpikeErrors
Specifies module pause on baudrate or spike errors.
Definition: IfxQspi_SpiMaster.h:696
IfxQspi_clearMoveCounterInterruptAfterLastFlag
IFX_INLINE void IfxQspi_clearMoveCounterInterruptAfterLastFlag(Ifx_QSPI *qspi, boolean clearInterrupt)
clear the interrupt after last flag
Definition: IfxQspi.h:966
IfxQspi_SpiMaster_Config
Module configuration structure.
Definition: IfxQspi_SpiMaster.h:691
IfxQspi_run
IFX_INLINE void IfxQspi_run(Ifx_QSPI *qspi)
Request for QSPI in Run state.
Definition: IfxQspi.h:1196
IfxQspi_SpiMaster_isrTransmit
void IfxQspi_SpiMaster_isrTransmit(IfxQspi_SpiMaster *handle)
Transmit interrupt handler.
Definition: IfxQspi_SpiMaster.c:745
IfxQspi_setSleepMode
IFX_INLINE void IfxQspi_setSleepMode(Ifx_QSPI *qspi, IfxQspi_SleepMode mode)
Sets the disable module request.
Definition: IfxQspi.h:1277
IfxQspi_calculateExtendedConfigurationValue
uint32 IfxQspi_calculateExtendedConfigurationValue(Ifx_QSPI *qspi, const uint8 cs, const SpiIf_ChConfig *chConfig)
Function to calculate ECON register values.
Definition: IfxQspi.c:96
IfxDma_Dma_ChannelConfig::channelInterruptPriority
Ifx_Priority channelInterruptPriority
Priority of the channel interrupt trigger.
Definition: IfxDma_Dma.h:514
FALSE
#define FALSE
Definition: Platform_Types.h:93
SpiIf_ChMode::csInactiveDelay
SpiIf_SlsoTiming_HalfTsclk csInactiveDelay
CS Inactive Delay in Tsclk/2 units.
Definition: SpiIf.h:201
IfxDma_getAndClearChannelInterrupt
IFX_INLINE boolean IfxDma_getAndClearChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return and clear a channel transfer interrupt flag The flag is automatically cleared with the call to...
Definition: IfxDma.h:1389
IfxQspi_SpiMaster_ErrorFlags::txFifoOverflowError
uint16 txFifoOverflowError
[3:3] TxFifo Overflow Error
Definition: IfxQspi_SpiMaster.h:600
IFX_VERBOSE_LEVEL_WARNING
#define IFX_VERBOSE_LEVEL_WARNING
Assertion level warning.
Definition: Ifx_Assert.h:59
IfxQspi_setEnableModuleRequest
IFX_INLINE void IfxQspi_setEnableModuleRequest(Ifx_QSPI *qspi)
Sets the enable module request.
Definition: IfxQspi.h:1229
IfxQspi_calculateBasicConfigurationValue
uint32 IfxQspi_calculateBasicConfigurationValue(Ifx_QSPI *qspi, const IfxQspi_ChannelId channelId, const SpiIf_ChMode *chMode, const float baudrate)
Function to calculate BACON register values.
Definition: IfxQspi.c:67
IfxQspi_readReceiveFifo
IFX_INLINE uint32 IfxQspi_readReceiveFifo(Ifx_QSPI *qspi)
Read the oldest data from RXFIFO.
Definition: IfxQspi.h:1184
IfxQspi_SpiMaster_MoveCounterControl::setInterruptAfterLastFlag
boolean setInterruptAfterLastFlag
Sets the Interrupt After Last Flag.
Definition: IfxQspi_SpiMaster.h:624
IfxQspi_SpiMaster_initChannelConfig
void IfxQspi_SpiMaster_initChannelConfig(IfxQspi_SpiMaster_ChannelConfig *chConfig, IfxQspi_SpiMaster *handle)
Fills the config structure with default values.
Definition: IfxQspi_SpiMaster.c:325
IfxQspi_SpiMaster_Dma::txDmaChannelId
IfxDma_ChannelId txDmaChannelId
DMA channel no for the Spi transmit.
Definition: IfxQspi_SpiMaster.h:580
SpiIf_DataHeading_msbFirst
Definition: SpiIf.h:90
IfxQspi_SpiMaster_Input::pin
IFX_CONST IfxQspi_Slsi_In * pin
Pointer to SLSI in pin.
Definition: IfxQspi_SpiMaster.h:556
IfxQspi_setMoveCounterInterruptAfterLastEnabled
IFX_INLINE void IfxQspi_setMoveCounterInterruptAfterLastEnabled(Ifx_QSPI *qspi, boolean interruptEnabled)
Enable/Disable the Interrupt After last Byte.
Definition: IfxQspi.h:1235
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxQspi_setMoveCounterPrescalerTrailingDelay
IFX_INLINE void IfxQspi_setMoveCounterPrescalerTrailingDelay(Ifx_QSPI *qspi, const float baudrate)
Set the Trailing delay.
Definition: IfxQspi.h:1259
IfxQspi_SpiMaster.h
QSPI SPIMASTER details.
IfxPort_OutputIdx_general
Definition: IfxPort.h:128
IfxQspi_SpiMaster_Channel_s::firstWrite
boolean firstWrite
Specifies whether the data id first write or not.
Definition: IfxQspi_SpiMaster.h:683
IfxQspi_SpiMaster_Config::txFifoThreshold
IfxQspi_TxFifoInt txFifoThreshold
Specifies the TXFIFO interrupt threshold.
Definition: IfxQspi_SpiMaster.h:698
SpiIf_Status_ok
Definition: SpiIf.h:68
SpiIf_ChMode::clockPolarity
uint32 clockPolarity
SpiIf_ClockPolarity
Definition: SpiIf.h:191
IfxQspi_ChannelId
IfxQspi_ChannelId
QSPI channel Number (BACON.CS)
Definition: IfxQspi.h:94
SpiIf_Config::maximumBaudrate
float32 maximumBaudrate
Maximum baudrate used by the channels, this value is used to optimise the SPI internal clock...
Definition: SpiIf.h:173
IfxQspi_PauseRunTransition_pause
Request value for pause.
Definition: IfxQspi.h:172
IfxQspi_Mtsr_Out
MTSR pin mapping structure.
Definition: IfxQspi_PinMap.h:104
IfxQspi_getTransmitSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxQspi_getTransmitSrc(Ifx_QSPI *qspi)
Gets the TXFIFO service request.
Definition: IfxQspi.h:1092
IfxQspi_Slso_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxQspi_PinMap.h:125
IfxQspi_SpiMaster_Channel_s::moveCounterControl
IfxQspi_SpiMaster_MoveCounterControl moveCounterControl
config move counter control register
Definition: IfxQspi_SpiMaster.h:680
IfxQspi_RxFifoInt_0
RxFifo Interrupt Threshold #0.
Definition: IfxQspi.h:219
IfxCpu_disableInterrupts
IFX_INLINE boolean IfxCpu_disableInterrupts(void)
API to disable global interrupt and return the previous status.
Definition: IfxCpu.h:749
IfxPort_PadDriver_cmosAutomotiveSpeed1
Speed grade 1.
Definition: IfxPort.h:153
IfxDma_ChannelMove_1
1 DMA move per DMA transfer
Definition: IfxDma.h:159
SpiIf_funcs::onTx
SpiIf_OnEvent onTx
Definition: SpiIf.h:145
IfxQspi_SpiMaster_Pins::mtsr
IFX_CONST IfxQspi_Mtsr_Out * mtsr
Pointer to MTSR out pin.
Definition: IfxQspi_SpiMaster.h:635
IfxDma_ChannelMoveSize_32bit
1 DMA move is 32 bit wide
Definition: IfxDma.h:176
IfxQspi_Slso_Out::pin
IfxPort_Pin pin
Port pin.
Definition: IfxQspi_PinMap.h:124
IfxDma_Dma_ChannelConfig::transferCount
uint16 transferCount
Number of transfers in a transaction.
Definition: IfxDma_Dma.h:489
SpiIf_funcs::exchange
SpiIf_Exchange exchange
Definition: SpiIf.h:143
__swap
#define __swap
Definition: IfxCpu_IntrinsicsDcc.h:2085
IfxQspi_SpiMaster_Pins::sclkMode
IfxPort_OutputMode sclkMode
The SCLK pin output mode.
Definition: IfxQspi_SpiMaster.h:634
IfxQspi_SpiMaster::qspi
Ifx_QSPI * qspi
Pointer to QSPI module registers.
Definition: IfxQspi_SpiMaster.h:651
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:50
IfxSrc_Tos_dma
DMA interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:69
SpiIf_::functions
SpiIf_funcs functions
Definition: SpiIf.h:157
IfxQspi_getReceiveFifoLevel
IFX_INLINE uint8 IfxQspi_getReceiveFifoLevel(Ifx_QSPI *qspi)
Gets the filling level of RXFIFO.
Definition: IfxQspi.h:1061
IfxDma_ChannelIncrementStep_1
increment by 1 width
Definition: IfxDma.h:135
IfxQspi_SpiMaster::maximumBaudrate
float32 maximumBaudrate
Maximum Baud Rate for the SPI Module.
Definition: IfxQspi_SpiMaster.h:653
SpiIf_ChMode::shiftClock
uint32 shiftClock
SpiIf_ShiftClock
Definition: SpiIf.h:192
IfxQspi_SpiMaster_ErrorFlags::txFifoUnderflowError
uint16 txFifoUnderflowError
[4:4] TxFifo underflow Error
Definition: IfxQspi_SpiMaster.h:601
IfxPort_InputMode_noPullDevice
Definition: IfxPort.h:84
SpiIf_initChannelConfig
void SpiIf_initChannelConfig(SpiIf_ChConfig *config, SpiIf *driver)
Definition: SpiIf.c:57
IfxQspi_setMoveCounterInterruptAfterLastFlag
IFX_INLINE void IfxQspi_setMoveCounterInterruptAfterLastFlag(Ifx_QSPI *qspi, boolean setInterrupt)
Set the Interrupt after last flag.
Definition: IfxQspi.h:1241
IfxQspi_initMtsrOutPin
IFX_INLINE void IfxQspi_initMtsrOutPin(const IfxQspi_Mtsr_Out *mtsrOut, IfxPort_OutputMode mtsrOutMode, IfxPort_PadDriver padDriver)
Initializes a MTSR output.
Definition: IfxQspi.h:1126
IFXCPU_GLB_ADDR_DSPR
#define IFXCPU_GLB_ADDR_DSPR(cpu, address)
Convert local DSPR address to global DSPR address which can be accessed from the SRI bus...
Definition: IfxCpu.h:90
IfxQspi_write32
void IfxQspi_write32(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 *data, Ifx_SizeT count)
Writes 32bit data into the Tx FIFO.
Definition: IfxQspi.c:425
IfxQspi_Error_txfifoUnderflow
TX FIFO Underflow Error.
Definition: IfxQspi.h:130
IfxQspi_clearMoveCounterInterruptBeforeLastFlag
IFX_INLINE void IfxQspi_clearMoveCounterInterruptBeforeLastFlag(Ifx_QSPI *qspi, boolean clearInterrupt)
Clear the Interrupt before last flag.
Definition: IfxQspi.h:972
IfxPort_setPinState
IFX_INLINE void IfxPort_setPinState(Ifx_P *port, uint8 pinIndex, IfxPort_State action)
Set / Resets / Toggle the port output.
Definition: IfxPort.h:681
IfxQspi_initSclkOutPin
IFX_INLINE void IfxQspi_initSclkOutPin(const IfxQspi_Sclk_Out *sclkOut, IfxPort_OutputMode sclkOutMode, IfxPort_PadDriver padDriver)
Initializes a SCLK output.
Definition: IfxQspi.h:1140
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:249
IfxQspi_SpiMaster_ErrorFlags::configurationError
uint16 configurationError
[1:1] Configuration Error
Definition: IfxQspi_SpiMaster.h:598
SpiIf_::txCount
uint32 txCount
Definition: SpiIf.h:155
IfxDma_ChannelRequestMode_oneTransferPerRequest
a request initiates a single transfer
Definition: IfxDma.h:220
IfxQspi_getReceiveSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxQspi_getReceiveSrc(Ifx_QSPI *qspi)
Gets the RXFIFO service request.
Definition: IfxQspi.h:1067
IfxQspi_SpiMaster_Output::pin
IFX_CONST IfxQspi_Slso_Out * pin
Pointer to SLSO out pin.
Definition: IfxQspi_SpiMaster.h:564
IfxDma_ChannelIncrementCircular_4
circular buffer size is 4 byte
Definition: IfxDma.h:105
IfxDma_Dma_createModuleHandle
void IfxDma_Dma_createModuleHandle(IfxDma_Dma *dmaHandle, Ifx_DMA *dma)
initializes a DMA module handle based on the current configuration. Can be used in code where it&#39;s en...
Definition: IfxDma_Dma.c:127
SpiIf_Status_busy
Definition: SpiIf.h:69
IfxQspi_SpiMaster_Channel_s::dummyTxValue
uint32 dummyTxValue
Dummy TX value, which will be sent for "recieve only" mode.
Definition: IfxQspi_SpiMaster.h:677
SpiIf_Flags::onTransfer
uint32 onTransfer
Channel status: On transfer.
Definition: SpiIf.h:117
IfxQspi_SpiMaster_Channel_s::errorFlags
IfxQspi_SpiMaster_ErrorFlags errorFlags
Spi Master Error Flags.
Definition: IfxQspi_SpiMaster.h:686
IfxQspi_SpiMaster_Dma::useDma
boolean useDma
use Dma for Data transfer/s
Definition: IfxQspi_SpiMaster.h:581
IfxDma_Dma
DMA base address data structure (Module handle)
Definition: IfxDma_Dma.h:460
IfxQspi_SpiMaster_MoveCounterControl::setInterruptBeforeLastFlag
boolean setInterruptBeforeLastFlag
Sets the Interrupt Before Last Flag.
Definition: IfxQspi_SpiMaster.h:621
IfxQspi_Mrst_In
MRST pin mapping structure.
Definition: IfxQspi_PinMap.h:56
SpiIf_ChMode::enabled
uint32 enabled
1 = channel enabled, 0 = channel disabled
Definition: SpiIf.h:188
SpiIf_Ch_::flags
SpiIf_Flags flags
Definition: SpiIf.h:214
IfxQspi_SleepMode_disable
Sleep Mode disabled.
Definition: IfxQspi.h:231
IfxQspi_SpiMaster_Mode_long
Long Mode.
Definition: IfxQspi_SpiMaster.h:538
IfxDma_disableChannelTransaction
IFX_INLINE void IfxDma_disableChannelTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Disable a DMA channel hardware transaction request.
Definition: IfxDma.h:1307
IfxQspi_SpiMaster_read
IFX_STATIC void IfxQspi_SpiMaster_read(IfxQspi_SpiMaster_Channel *chHandle)
Reads data from the Rx FIFO.
Definition: IfxQspi_SpiMaster.c:856
SpiIf_Exchange
SpiIf_Status(* SpiIf_Exchange)(SpiIf_Ch *handle, const void *src, void *dest, Ifx_SizeT numOfData)
Definition: SpiIf.h:135
IFXQSPI_ERRORENABLEMASK
#define IFXQSPI_ERRORENABLEMASK
Errors enable mask for ERRORENS.
Definition: IfxQspi.h:84
IfxDma_ChannelOperationMode_single
channel disabled after transaction
Definition: IfxDma.h:187
IfxQspi_SpiMaster_Config::base
SpiIf_Config base
SPI interface configuration structure.
Definition: IfxQspi_SpiMaster.h:693
SpiIf_ChMode::parityMode
uint32 parityMode
Ifx_ParityMode
Definition: SpiIf.h:199
Spi_ErrorChecks::transmit
uint32 transmit
TRUE = checked, FALSE = ignored.
Definition: SpiIf.h:181
IfxDma_getAndClearChannelPatternDetectionInterrupt
IFX_INLINE boolean IfxDma_getAndClearChannelPatternDetectionInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns and clears the pattern detection interrupt flag.
Definition: IfxDma.h:1404
IfxQspi_SpiMaster_Channel_s::channelBasedCs
IfxQspi_SpiMaster_ChannelBasedCs channelBasedCs
define the slso behaviour
Definition: IfxQspi_SpiMaster.h:684
SpiIf_initConfig
void SpiIf_initConfig(SpiIf_Config *config)
Definition: SpiIf.c:44
IfxQspi_SpiMaster_Channel_s::dataWidth
uint8 dataWidth
Number of bits which will be written into the FIFO.
Definition: IfxQspi_SpiMaster.h:682
IfxQspi_getErrorSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxQspi_getErrorSrc(Ifx_QSPI *qspi)
Gets the Error request value.
Definition: IfxQspi.h:1034
IfxQspi_SpiMaster::base
SpiIf base
Module SPI interface handle.
Definition: IfxQspi_SpiMaster.h:650
SpiIf_Config::erPriority
Ifx_Priority erPriority
Specifies the priority of the error interrupt.
Definition: SpiIf.h:165
SpiIf_ClockPolarity_idleLow
Definition: SpiIf.h:103
IfxDma_setChannelTransferCount
IFX_INLINE void IfxDma_setChannelTransferCount(Ifx_DMA *dma, IfxDma_ChannelId channelId, uint32 transferCount)
Configure the move count of a DMA channel transaction.
Definition: IfxDma.h:1679
SpiIf_Ch_::rx
SpiIf_Job rx
Definition: SpiIf.h:218
__ldmst
#define __ldmst
Definition: IfxCpu_IntrinsicsDcc.h:2065
SpiIf_::rxCount
uint32 rxCount
Definition: SpiIf.h:156
IfxQspi_read32
void IfxQspi_read32(Ifx_QSPI *qspi, uint32 *data, Ifx_SizeT count)
Reads 32bit data from the Rx FIFO.
Definition: IfxQspi.c:325
IfxPort_State_low
Ifx_P pin is set to low.
Definition: IfxPort.h:191
SpiIf_GetStatus
SpiIf_Status(* SpiIf_GetStatus)(SpiIf_Ch *handle)
Definition: SpiIf.h:136
IfxQspi_SpiMaster_Channel_s::mode
IfxQspi_SpiMaster_Mode mode
Qspi Operating Mode.
Definition: IfxQspi_SpiMaster.h:685
SpiIf_DataHeading_lsbFirst
Definition: SpiIf.h:89
IfxDma_Dma_ChannelConfig::operationMode
IfxDma_ChannelOperationMode operationMode
keep enable/disable the hardware channel request after a transaction
Definition: IfxDma_Dma.h:492
SpiIf_Job::remaining
Ifx_SizeT remaining
Definition: SpiIf.h:124
IfxDma_ChannelIncrementDirection_positive
pointer is incremented
Definition: IfxDma.h:127
SpiIf_::sending
uint32 sending
Definition: SpiIf.h:153
IfxQspi_SpiMaster_Mode_longContinuous
Long Continous Mode.
Definition: IfxQspi_SpiMaster.h:540
IfxSrc_clearRequest
IFX_INLINE void IfxSrc_clearRequest(volatile Ifx_SRC_SRCR *src)
Resets a specific interrupt service by software.
Definition: IfxSrc.h:247
IfxQspi_SpiMaster_Pins::mrst
IFX_CONST IfxQspi_Mrst_In * mrst
Pointer to MRST in pin.
Definition: IfxQspi_SpiMaster.h:637
IfxQspi_calculateTimeQuantumLength
uint32 IfxQspi_calculateTimeQuantumLength(Ifx_QSPI *qspi, float maxBaudrate)
Specifies the function to calculate Time quantum length.
Definition: IfxQspi.c:233
IfxQspi_SpiMaster_packLongModeBuffer
void IfxQspi_SpiMaster_packLongModeBuffer(IfxQspi_SpiMaster_Channel *chHandle, void *data, uint32 *longFifoBuffer, Ifx_SizeT dataLength)
pack data to Long mode buffer
Definition: IfxQspi_SpiMaster.c:787
uint16
unsigned short uint16
Definition: Platform_Types.h:112
__min
sint32 __min(sint32, sint32) __attribute__((intrinsic_pseudo(3
IfxDma_Dma_ChannelConfig
Configuration data structure of the channel.
Definition: IfxDma_Dma.h:480
IfxQspi_SpiMaster_isrUserDefined
IfxQspi_PhaseTransitionEvent IfxQspi_SpiMaster_isrUserDefined(IfxQspi_SpiMaster *handle)
User defined interrupt handler.
Definition: IfxQspi_SpiMaster.c:753
IfxQspi_SpiMaster_InputOutput::input
IfxQspi_SpiMaster_Input input
SLSI pin configuration structure.
Definition: IfxQspi_SpiMaster.h:611
SpiIf_Ch_::txHandler
TxRxHandler txHandler
Definition: SpiIf.h:221
IfxQspi_SpiMaster_isrDmaTransmit
void IfxQspi_SpiMaster_isrDmaTransmit(IfxQspi_SpiMaster *qspiHandle)
Transmit interrupt handler.
Definition: IfxQspi_SpiMaster.c:593
SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge
Definition: SpiIf.h:96
IfxDma_clearChannelInterrupt
IFX_INLINE void IfxDma_clearChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Clear a channel transfer interrupt flag.
Definition: IfxDma.h:1276
IfxDma_Dma_initChannel
void IfxDma_Dma_initChannel(IfxDma_Dma_Channel *channel, const IfxDma_Dma_ChannelConfig *config)
initialize the DMA channel
Definition: IfxDma_Dma.c:147
IfxQspi_SpiMaster_Dma::txDmaChannel
IfxDma_Dma_Channel txDmaChannel
transmit DMA channel handle
Definition: IfxQspi_SpiMaster.h:578
IfxQspi_SpiMaster_isrReceive
void IfxQspi_SpiMaster_isrReceive(IfxQspi_SpiMaster *handle)
Receive Interrupt handler.
Definition: IfxQspi_SpiMaster.c:737
SpiIf_Config::isrProvider
IfxSrc_Tos isrProvider
Specifies the handler of the interrupts.
Definition: SpiIf.h:166
SpiIf_Job
Definition: SpiIf.h:121
SpiIf_ChMode::autoCS
uint32 autoCS
1 = chip select is controlled by the hardware module or, 0 = by software.
Definition: SpiIf.h:189
IfxQspi_SpiMaster_Channel_s::activateSlso
IfxQspi_SpiMaster_AutoSlso activateSlso
Specifies function for Auto SLSO activation.
Definition: IfxQspi_SpiMaster.h:675
SpiIf_Ch_::driver
SpiIf * driver
Pointer to the SPI interface driver.
Definition: SpiIf.h:213
SpiIf_Config::rxPriority
Ifx_Priority rxPriority
Specifies the priority of the receive interrupt.
Definition: SpiIf.h:163
IfxQspi_SpiMaster_Config::rxFifoThreshold
IfxQspi_RxFifoInt rxFifoThreshold
Specifies the RXFIFO interrupt threshold.
Definition: IfxQspi_SpiMaster.h:699
Spi_ErrorChecks::phase
uint32 phase
TRUE = checked, FALSE = ignored.
Definition: SpiIf.h:179
IfxQspi_SpiMaster_unlock
IFX_STATIC void IfxQspi_SpiMaster_unlock(IfxQspi_SpiMaster *handle)
Unlocks the transfers.
Definition: IfxQspi_SpiMaster.c:924
IFXQSPI_FIFO32BITSIZE
#define IFXQSPI_FIFO32BITSIZE(Datasize)
Definition: IfxQspi.h:78
IfxQspi_SpiMaster_ChannelConfig::base
SpiIf_ChConfig base
SPI interface channel configuration structure.
Definition: IfxQspi_SpiMaster.h:660
IfxDma_setChannelDestinationAddress
IFX_INLINE void IfxDma_setChannelDestinationAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId, void *address)
Configure the destination address.
Definition: IfxDma.h:1597
sint32
long sint32
Definition: Platform_Types.h:134
IfxQspi_initMrstInPinWithPadLevel
IFX_INLINE void IfxQspi_initMrstInPinWithPadLevel(const IfxQspi_Mrst_In *mrstIn, IfxPort_InputMode mrstInMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of MRSTIN pin direction as input and configuring pad driver...
Definition: IfxQspi.h:1376
IfxQspi_clearAllEventFlags
IFX_INLINE void IfxQspi_clearAllEventFlags(Ifx_QSPI *qspi)
Clear ALL service requests.
Definition: IfxQspi.h:960
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxQspi_SpiMaster_write
IFX_STATIC void IfxQspi_SpiMaster_write(IfxQspi_SpiMaster_Channel *chHandle)
Writes data into the Tx FIFO.
Definition: IfxQspi_SpiMaster.c:930
IfxQspi_SpiMaster_initModule
void IfxQspi_SpiMaster_initModule(IfxQspi_SpiMaster *handle, const IfxQspi_SpiMaster_Config *config)
Initialises the module.
Definition: IfxQspi_SpiMaster.c:340
IfxQspi_SpiMaster_initModuleConfig
void IfxQspi_SpiMaster_initModuleConfig(IfxQspi_SpiMaster_Config *config, Ifx_QSPI *qspi)
Fills the config structure with default values.
Definition: IfxQspi_SpiMaster.c:553
IfxQspi_writeTransmitFifo
IFX_INLINE void IfxQspi_writeTransmitFifo(Ifx_QSPI *qspi, uint32 data)
Write Data into DATAENTRY register.
Definition: IfxQspi.h:1347
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:248
IfxDma_setChannelMoveSize
IFX_INLINE void IfxDma_setChannelMoveSize(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelMoveSize moveSize)
Configure a DMA channel move.
Definition: IfxDma.h:1626
IfxQspi_Mode_master
QSPI in "master" mode.
Definition: IfxQspi.h:163
IfxDma_ChannelId_none
None of the Ifx_DMA Channels.
Definition: IfxDma_cfg.h:104
IfxQspi_writeBasicConfigurationEndStream
IFX_INLINE void IfxQspi_writeBasicConfigurationEndStream(Ifx_QSPI *qspi, uint32 baconVal)
Write configuration into BACON register with .LAST flag set to 1.
Definition: IfxQspi.h:1324
IfxQspi_SpiMaster_Channel_s::dummyRxValue
uint32 dummyRxValue
Dummy Rx value, for "transmit only" modes.
Definition: IfxQspi_SpiMaster.h:678
SpiIf_Ch_::rxHandler
TxRxHandler rxHandler
Definition: SpiIf.h:222
IfxCpu_areInterruptsEnabled
IFX_INLINE boolean IfxCpu_areInterruptsEnabled(void)
API to get the status of global interrupt enable (ICR.IE) for the CPU which calls this API This API p...
Definition: IfxCpu.h:741
IfxDma_Dma_ChannelConfig::destinationAddress
uint32 destinationAddress
Destination address for the DMA channel.
Definition: IfxDma_Dma.h:485
IfxQspi_Error_expectTimeout
EXPECT Timeout Error.
Definition: IfxQspi.h:133
IfxQspi_SpiMaster_Pins::sclk
IFX_CONST IfxQspi_Sclk_Out * sclk
Pointer to SLCK out pin.
Definition: IfxQspi_SpiMaster.h:633
SpiIf_ChMode::csTrailDelay
SpiIf_SlsoTiming_HalfTsclk csTrailDelay
CS Trail Delay in Tsclk/2 units.
Definition: SpiIf.h:203
IfxQspi_SpiMaster_deactivateSlso
IFX_STATIC void IfxQspi_SpiMaster_deactivateSlso(IfxQspi_SpiMaster_Channel *chHandle)
Deactive the SLSO pin.
Definition: IfxQspi_SpiMaster.c:133
SpiIf_ChConfig_::mode
SpiIf_ChMode mode
Definition: SpiIf.h:229
IfxCpu_getCoreId
IFX_INLINE IfxCpu_Id IfxCpu_getCoreId(void)
API to get core id of the CPU of the caller. Caution: Core id of the cpu&#39;s may not be continguous and...
Definition: IfxCpu.h:863
SpiIf_ShiftClock_shiftTransmitDataOnTrailingEdge
Definition: SpiIf.h:97
IfxQspi_SpiMaster_MoveCounterControl::trail2InjectionEnabled
boolean trail2InjectionEnabled
Trail 2 Injection Enable.
Definition: IfxQspi_SpiMaster.h:625
IfxQspi_SpiMaster_ErrorFlags::baudrateError
uint16 baudrateError
[2:2] baudrate Error
Definition: IfxQspi_SpiMaster.h:599
IfxDma_Dma_ChannelConfig::requestMode
IfxDma_ChannelRequestMode requestMode
A service request initiates a single transfer, or the complete transaction.
Definition: IfxDma_Dma.h:491
IfxDma_Dma_ChannelConfig::destinationAddressCircularRange
IfxDma_ChannelIncrementCircular destinationAddressCircularRange
Determines which part of the destination address remains unchanged and therby not updated after each ...
Definition: IfxDma_Dma.h:503
IfxQspi_Error_configuration
Configuration Error.
Definition: IfxQspi.h:127
IfxQspi_SpiMaster_ChannelConfig::sls
IfxQspi_SpiMaster_InputOutput sls
Union of Slave Select pins.
Definition: IfxQspi_SpiMaster.h:663
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxQspi_initSlso
IFX_INLINE void IfxQspi_initSlso(const IfxQspi_Slso_Out *slso, IfxPort_OutputMode slsoMode, IfxPort_PadDriver padDriver, IfxPort_OutputIdx outIndex)
Initializes a SLSO output.
Definition: IfxQspi.h:1155
IfxQspi_write8
void IfxQspi_write8(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 *data, Ifx_SizeT count)
Writes 8bit data into the Tx FIFO.
Definition: IfxQspi.c:438
IfxQspi_setMoveCounterInterruptBeforeLastEnabled
IFX_INLINE void IfxQspi_setMoveCounterInterruptBeforeLastEnabled(Ifx_QSPI *qspi, boolean interruptEnabled)
Enable the interrupt before last byte.
Definition: IfxQspi.h:1247
IfxQspi_SpiMaster_Channel_s::base
SpiIf_Ch base
SPI interface channel handle structure.
Definition: IfxQspi_SpiMaster.h:672
IfxQspi_SpiMaster_activateSlso
IFX_STATIC void IfxQspi_SpiMaster_activateSlso(IfxQspi_SpiMaster_Channel *chHandle)
Active the SLSO pin.
Definition: IfxQspi_SpiMaster.c:120
IfxQspi_SpiMaster_getStatus
SpiIf_Status IfxQspi_SpiMaster_getStatus(IfxQspi_SpiMaster_Channel *chHandle)
Gets the transmission status.
Definition: IfxQspi_SpiMaster.c:217
SpiIf_Status
SpiIf_Status
SPI Interface Status.
Definition: SpiIf.h:66
IfxDma_Dma_ChannelConfig::channelInterruptEnabled
boolean channelInterruptEnabled
The channel transfer interrupt should be triggered. See also channelInterruptControl.
Definition: IfxDma_Dma.h:510
IfxQspi_SpiMaster_ErrorFlags::rxFifoUnderflowError
uint16 rxFifoUnderflowError
[6:6] RxFifo underflow Error
Definition: IfxQspi_SpiMaster.h:603
IfxQspi_getTransmitFifoLevel
IFX_INLINE uint8 IfxQspi_getTransmitFifoLevel(Ifx_QSPI *qspi)
Gets the filling level of TXFIFO.
Definition: IfxQspi.h:1086
IfxQspi_SpiMaster_MoveCounterControl
Definition: IfxQspi_SpiMaster.h:615
IfxQspi_SpiMaster_initChannel
SpiIf_Status IfxQspi_SpiMaster_initChannel(IfxQspi_SpiMaster_Channel *chHandle, const IfxQspi_SpiMaster_ChannelConfig *chConfig)
Initializes the channel.
Definition: IfxQspi_SpiMaster.c:230
Ifx_ParityMode_odd
Definition: Ifx_Types.h:122
IfxQspi_SpiMaster_Pins
Master pin IO configuration structure.
Definition: IfxQspi_SpiMaster.h:631
SpiIf_funcs::onError
SpiIf_OnEvent onError
Definition: SpiIf.h:147
TRUE
#define TRUE
Definition: Platform_Types.h:90
SpiIf_ChMode::csActiveLevel
uint32 csActiveLevel
Ifx_ActiveState
Definition: SpiIf.h:196
IfxQspi_SpiMaster_getChannelConfig
SpiIf_ChConfig IfxQspi_SpiMaster_getChannelConfig(IfxQspi_SpiMaster_Channel *chHandle)
Gets the channel configuration.
Definition: IfxQspi_SpiMaster.c:182
SpiIf_Config::txPriority
Ifx_Priority txPriority
Specifies the priority of the transmit interrupt.
Definition: SpiIf.h:164
IfxQspi_SleepMode_enable
Sleep Mode enabled.
Definition: IfxQspi.h:230
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxQspi_SpiMaster_ChannelConfig
Module Channel configuration structure.
Definition: IfxQspi_SpiMaster.h:658
IfxQspi_Slso_Out::slsoNr
sint32 slsoNr
Slave Select.
Definition: IfxQspi_PinMap.h:123
IfxQspi_SpiMaster_ErrorFlags::expectTimeoutError
uint16 expectTimeoutError
[7:7] Expect Timeout Error
Definition: IfxQspi_SpiMaster.h:604
IfxQspi_SpiMaster_lock
IFX_STATIC SpiIf_Status IfxQspi_SpiMaster_lock(IfxQspi_SpiMaster *handle)
Locks the transfer and gets the current status of it.
Definition: IfxQspi_SpiMaster.c:768
IfxQspi_SpiMaster_ErrorFlags::parityError
uint16 parityError
[0:0] Parity Error
Definition: IfxQspi_SpiMaster.h:597
IfxQspi_SpiMaster_Dma::rxDmaChannelId
IfxDma_ChannelId rxDmaChannelId
DMA channel no for the Spi recieve.
Definition: IfxQspi_SpiMaster.h:579
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxDma_Dma_ChannelConfig::channelInterruptTypeOfService
IfxSrc_Tos channelInterruptTypeOfService
Interrupt service provider.
Definition: IfxDma_Dma.h:515
IfxQspi_SpiMaster_MoveCounterControl::interruptBeforeLastEnabled
boolean interruptBeforeLastEnabled
Enable bit for Interrupt before last word.
Definition: IfxQspi_SpiMaster.h:619
IFXQSPI_BACONSIZE
#define IFXQSPI_BACONSIZE(Datasize)
Get Fifo size required for Long / Long continous mode interms 32-bit LONG MODE FIFO size (data size i...
Definition: IfxQspi.h:76
IfxQspi_SpiMaster::dma
IfxQspi_SpiMaster_Dma dma
dma handle
Definition: IfxQspi_SpiMaster.h:652
SpiIf_ChConfig_::errorChecks
Spi_ErrorChecks errorChecks
Definition: SpiIf.h:230
IfxQspi_SpiMaster_InputOutput::output
IfxQspi_SpiMaster_Output output
SLSO pin configuration structure.
Definition: IfxQspi_SpiMaster.h:612
SpiIf_Job::data
void * data
Definition: SpiIf.h:123
SpiIf_OnEvent
void(* SpiIf_OnEvent)(SpiIf *handle)
Definition: SpiIf.h:137
IfxDma_ChannelIncrementCircular_none
no circular buffer operation
Definition: IfxDma.h:103
Spi_ErrorChecks::receive
uint32 receive
TRUE = checked, FALSE = ignored.
Definition: SpiIf.h:180
IfxQspi_SpiMaster_Channel_s
Module Channel handle structure.
Definition: IfxQspi_SpiMaster.h:670


iLLD_TC38A: IfxQspi_SpiMaster.h Source File

  • Qspi
  • SpiMaster
IfxQspi_SpiMaster.h
Go to the documentation of this file.
1 /**
2 * \file IfxQspi_SpiMaster.h
3 * \brief QSPI SPIMASTER details
4 * \ingroup IfxLld_Qspi
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 *
43 * \defgroup IfxLld_Qspi_SpiMaster_Usage How to use the SPI Master Interface driver?
44 * \ingroup IfxLld_Qspi
45 *
46 * The SPI Master interface driver provides a default QSPI configuration for a bidirectional serial communication of data words.
47 *
48 * Data transactions are buffered by the hardware based FIFOs. Incoming and outgoing data is transfered in background from/to the QSPI peripheral by interrupt service handlers, which are part of this driver as well. This allows a nonblocking communication without stalling the thread(s) from where data is sent and received.
49 * Optionally Dma can be used for data transfers. Only the interrupt configuration and Module initialisation are different when dma is used.
50 *
51 * In the following sections it will be described, how to integrate the driver into the application framework.
52 *
53 * \section IfxLld_Qspi_SpiMaster_Preparation Preparation
54 * \subsection IfxLld_Qspi_SpiMaster_Include Include Files
55 *
56 * Include following header file into your C code:
57 * \code
58 * #include <Qspi/SpiMaster/IfxQspi_SpiMaster.h>
59 * \endcode
60 *
61 * \subsection IfxLld_Qspi_SpiMaster_Variables Variables
62 *
63 * Declare QSPI module and channel handles:
64 *
65 * \code
66 * IfxQspi_SpiMaster spi;
67 * IfxQspi_SpiMaster_Channel spiChannel;
68 * \endcode
69 *
70 * In addition, declare global transmit and receive buffers for the data transfers:
71 * \code
72 * #define SPI_BUFFER_SIZE 8
73 * uint8 spiTxBuffer[SPI_BUFFER_SIZE];
74 * uint8 spiRxBuffer[SPI_BUFFER_SIZE];
75 * \endcode
76 *
77 * \subsection IfxLld_Qspi_SpiMaster_Interrupt Interrupt Handler Installation (without dma use)
78 *
79 * See also \ref IfxLld_Cpu_Irq_Usage
80 *
81 * Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:
82 * \code
83 * // priorities are normally defined in Ifx_IntPrioDef.h
84 * #define IFX_INTPRIO_QSPI0_TX 1
85 * #define IFX_INTPRIO_QSPI0_RX 2
86 * #define IFX_INTPRIO_QSPI0_ER 5
87 * \endcode
88 *
89 * Add the interrupt service routines to your C code. They have to call the QSPI interrupt handlers by passing the spi handle:
90 * \code
91 * IFX_INTERRUPT(qspi0TxISR, 0, IFX_INTPRIO_QSPI0_TX)
92 * {
93 * IfxQspi_SpiMaster_isrTransmit(&spi);
94 * }
95 *
96 * IFX_INTERRUPT(qspi0RxISR, 0, IFX_INTPRIO_QSPI0_RX)
97 * {
98 * IfxQspi_SpiMaster_isrReceive(&spi);
99 * }
100 *
101 * IFX_INTERRUPT(qspi0ErISR, 0, IFX_INTPRIO_QSPI0_ER)
102 * {
103 * IfxQspi_SpiMaster_isrError(&spi);
104 *
105 * // Process errors. Eg: parity Error is checked below
106 * IfxQspi_SpiMaster_Channel *chHandle = IfxQspi_SpiMaster_activeChannel(&spi);
107 * if( chHandle->errorFlags.parityError == 1)
108 * {
109 * // Parity Error
110 * }
111 * }
112 * \endcode
113 *
114 * Finally install the interrupt handlers in your initialisation function:
115 * \code
116 * // install interrupt handlers
117 * IfxCpu_Irq_installInterruptHandler(&qspi0TxISR, IFX_INTPRIO_QSPI0_TX);
118 * IfxCpu_Irq_installInterruptHandler(&qspi0RxISR, IFX_INTPRIO_QSPI0_RX);
119 * IfxCpu_Irq_installInterruptHandler(&qspi0ErISR, IFX_INTPRIO_QSPI0_ER);
120 * IfxCpu_enableInterrupts();
121 * \endcode
122 *
123 * \subsection IfxLld_Qspi_SpiMaster_Interrupt_dma Interrupt Handler Installation (with dma use)
124 *
125 * See also \ref IfxLld_Cpu_Irq_Usage
126 *
127 * Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:
128 * \code
129 * // qspi priorities
130 * #define IFX_INTPRIO_QSPI0_TX 1 // DMA channel 1
131 * #define IFX_INTPRIO_QSPI0_RX 2 // DMA channel 2
132 * #define IFX_INTPRIO_QSPI0_ER 0x30
133 *
134 * // dma priorities
135 * #define IFX_INTPRIO_DMA_CH1 10
136 * #define IFX_INTPRIO_DMA_CH2 11
137 * \endcode
138 *
139 * Add the interrupt service routines to your C code. They have to call the QSPI interrupt handlers by passing the spi handle:
140 * \code
141 * IFX_INTERRUPT(qspi0DmaTxISR, 0, IFX_INTPRIO_DMA_CH1 )
142 * {
143 * IfxQspi_SpiMaster_isrDmaTransmit(&spi);
144 * }
145 *
146 * IFX_INTERRUPT(qspi0DmaRxISR, 0, IFX_INTPRIO_DMA_CH2)
147 * {
148 * IfxQspi_SpiMaster_isrDmaReceive(&spi);
149 * }
150 *
151 * IFX_INTERRUPT(qspi0ErISR, 0, IFX_INTPRIO_QSPI0_ER)
152 * {
153 * IfxQspi_SpiMaster_isrError(&spi);
154 *
155 * // Process errors. Eg: parity Error is checked below
156 * IfxQspi_SpiMaster_Channel *chHandle = IfxQspi_SpiMaster_activeChannel(&spi);
157 * if( chHandle->errorFlags.parityError == 1)
158 * {
159 * // Parity Error
160 * }
161 * }
162 * \endcode
163 *
164 * Finally install the interrupt handlers in your initialisation function:
165 * \code
166 * // install interrupt handlers
167 * IfxCpu_Irq_installInterruptHandler(&qspi0DmaTxISR, IFX_INTPRIO_DMA_CH1);
168 * IfxCpu_Irq_installInterruptHandler(&qspi0DmaRxISR, IFX_INTPRIO_DMA_CH2);
169 * IfxCpu_Irq_installInterruptHandler(&qspi0ErISR, IFX_INTPRIO_QSPI0_ER);
170 * IfxCpu_enableInterrupts();
171 * \endcode
172 *
173 *
174 * \subsection IfxLld_Qspi_SpiMaster_Init Module Initialisation (without dma use)
175 *
176 * The module initialisation can be done in the same function.
177 *
178 * Here an example for master mode:
179 * \code
180 * // create module config
181 * IfxQspi_SpiMaster_Config spiMasterConfig;
182 * IfxQspi_SpiMaster_initModuleConfig(&spiMasterConfig, &MODULE_QSPI0);
183 *
184 * // set the desired mode and maximum baudrate
185 * spiMasterConfig.base.mode = SpiIf_Mode_master;
186 * spiMasterConfig.base.maximumBaudrate = 10000000;
187 *
188 * // ISR priorities and interrupt target
189 * spiMasterConfig.base.txPriority = IFX_INTPRIO_QSPI0_TX;
190 * spiMasterConfig.base.rxPriority = IFX_INTPRIO_QSPI0_RX;
191 * spiMasterConfig.base.erPriority = IFX_INTPRIO_QSPI0_ER;
192 * spiMasterConfig.base.isrProvider = IfxCpu_Irq_getTos(IfxCpu_getCoreIndex());
193 *
194 * // pin configuration
195 * const IfxQspi_SpiMaster_Pins pins = {
196 * &IfxQspi0_SCLK_P20_11_OUT, IfxPort_OutputMode_pushPull, // SCLK
197 * &IfxQspi0_MTSR_P20_14_OUT, IfxPort_OutputMode_pushPull, // MTSR
198 * &IfxQspi0_MRSTA_P20_12_IN, IfxPort_InputMode_pullDown, // MRST
199 * IfxPort_PadDriver_cmosAutomotiveSpeed3 // pad driver mode
200 * };
201 * spiMasterConfig.pins = &pins;
202 *
203 * // initialize module
204 * //IfxQspi_SpiMaster spi; // defined globally
205 * IfxQspi_SpiMaster_initModule(&spi, &spiMasterConfig);
206 * \endcode
207 *
208 * \subsection IfxLld_Qspi_SpiMaster_Init_dma Module Initialisation (with dma use)
209 *
210 * The module initialisation can be done in the same function.
211 *
212 * Here an example for master mode:
213 * \code
214 * // create module config
215 * IfxQspi_SpiMaster_Config spiMasterConfig;
216 * IfxQspi_SpiMaster_initModuleConfig(&spiMasterConfig, &MODULE_QSPI0);
217 *
218 * // set the desired mode and maximum baudrate
219 * spiMasterConfig.base.mode = SpiIf_Mode_master;
220 * spiMasterConfig.base.maximumBaudrate = 10000000;
221 *
222 * // ISR priorities and interrupt target (with Dma usage)
223 * spiMasterConfig.base.txPriority = IFX_INTPRIO_DMA_CH1;
224 * spiMasterConfig.base.rxPriority = IFX_INTPRIO_DMA_CH2;
225 * spiMasterConfig.base.erPriority = IFX_INTPRIO_QSPI0_ER;
226 *
227 * // dma configuration.
228 * spiMasterConfig.dma.txDmaChannelId = IfxDma_ChannelId_1;
229 * spiMasterConfig.dma.rxDmaChannelId = IfxDma_ChannelId_2;
230 * spiMasterConfig.dma.useDma = 1;
231 *
232 * // pin configuration
233 * const IfxQspi_SpiMaster_Pins pins = {
234 * &IfxQspi0_SCLK_P20_11_OUT, IfxPort_OutputMode_pushPull, // SCLK
235 * &IfxQspi0_MTSR_P20_14_OUT, IfxPort_OutputMode_pushPull, // MTSR
236 * &IfxQspi0_MRSTA_P20_12_IN, IfxPort_InputMode_pullDown, // MRST
237 * IfxPort_PadDriver_cmosAutomotiveSpeed3 // pad driver mode
238 * };
239 * spiMasterConfig.pins = &Pins;
240 *
241 *
242 * // initialize module
243 * //IfxQspi_SpiMaster spi; // defined globally
244 * IfxQspi_SpiMaster_initModule(&spi, &spiMasterConfig);
245 * \endcode
246 *
247 *
248 * \subsection IfxLld_Qspi_SpiMaster_ChannelInit SPI Channel Initialisation
249 *
250 * After the module has been initialized, one or more SPI channels can be configured.
251 * Each channel has a dedicated select line.
252 *
253 * Here an example for a SPI channel in master mode:
254 * \code
255 * // create channel config
256 * IfxQspi_SpiMaster_ChannelConfig spiMasterChannelConfig;
257 * IfxQspi_SpiMaster_initChannelConfig(&spiMasterChannelConfig, &spi);
258 *
259 * // set the baudrate for this channel
260 * spiMasterChannelConfig.base.baudrate = 5000000;
261 *
262 * // select pin configuration
263 * const IfxQspi_SpiMaster_Output slsOutput = {
264 * &IfxQspi0_SLSO7_P33_5_OUT,
265 * IfxPort_OutputMode_pushPull,
266 * IfxPort_PadDriver_cmosAutomotiveSpeed1
267 * };
268 * spiMasterChannelConfig.sls.output = (IfxQspi_SpiMaster_Output)slsOutput;
269 *
270 * // initialize channel
271 * //IfxQspi_SpiMaster_Channel spiChannel; // defined globally
272 * IfxQspi_SpiMaster_initChannel(&spiChannel, &spiMasterChannelConfig);
273 * \endcode
274 *
275 * The QSPI is ready for use now!
276 *
277 *
278 * \section IfxLld_Qspi_SpiMaster_DataTransfers Data Transfers
279 *
280 * In following examples we assume, that following buffers are declared globally:
281 * \code
282 * // declared somewhere globally
283 * #define SPI_BUFFER_SIZE 8
284 * uint8 spiTxBuffer[SPI_BUFFER_SIZE] = { 1, 2, 3, 4, 5, 6, 7, 8 };
285 * uint8 spiRxBuffer[SPI_BUFFER_SIZE] = { 0, 0, 0, 0, 0, 0, 0, 0 };
286 * \endcode
287 *
288 * Sending and Receiving a data stream:
289 * \code
290 * int i=0;
291 * // wait until transfer of previous data stream is finished
292 * while( IfxQspi_SpiMaster_getStatus(&spiChannel) == SpiIf_Status_busy );
293 *
294 * // send/receive new stream
295 * IfxQspi_SpiMaster_exchange(&spiChannel, &spiTxBuffer[i], &spiRxBuffer[i], SPI_BUFFER_SIZE);
296 * \endcode
297 *
298 * Send only, discard received data:
299 * \code
300 *
301 * // wait until transfer of previous data stream is finished
302 * while( IfxQspi_SpiMaster_getStatus(&spiChannel) == SpiIf_Status_busy );
303 *
304 * // send new stream
305 * IfxQspi_SpiMaster_exchange(&spiChannel, &spiTxBuffer[i], NULL_PTR, SPI_BUFFER_SIZE);
306 * \endcode
307 *
308 * Receive only, send all-1
309 * \code
310 * // wait until transfer of previous data stream is finished
311 * while( IfxQspi_SpiMaster_getStatus(&spiChannel) == SpiIf_Status_busy );
312 *
313 * // receive new stream
314 * IfxQspi_SpiMaster_exchange(&spiChannel, NULL_PTR, &spiRxBuffer[i], SPI_BUFFER_SIZE);
315 * \endcode
316 *
317 * \section IfxLld_Qspi_SpiMaster_PhaseTransition Phase transition and User Interrupt usage
318 *
319 * Phase transition and user defined interrupts are not configured internal to Driver.
320 *
321 * Example usage of Phase transition interrupt is given below
322 * \code
323 * IfxCpu_Irq_installInterruptHandler(&qspi0PtISR, IFX_INTPRIO_QSPI0_PT);
324 * IfxQspi_pause(&MODULE_QSPI0);
325 * IfxQspi_configPT1Event(&MODULE_QSPI0, IfxQspi_PhaseTransitionEvent_startOfFrame); // Configured for PT1 SOF event
326 * IfxQspi_enablePT1Event(&MODULE_QSPI0,TRUE);
327 * IfxQspi_run(&MODULE_QSPI0);
328 * \endcode
329 *
330 * Add the interrupt service routines to your C code. They have to call the QSPI interrupt handlers by passing the spi handle:
331 * \code
332 * IFX_INTERRUPT(qspi0PtISR, 0, IFX_INTPRIO_QSPI0_PT )
333 * {
334 * IfxQspi_PhaseTransitionEvent event;
335 * event = IfxQspi_SpiMaster_isrPhaseTransition(&spiMaster);
336 * // process event
337 * switch (event)
338 * {
339 * case IfxQspi_PhaseTransitionEvent_startOfFrame:
340 * // SOF event
341 * break;
342 * // add other events if needed.
343 * }
344 * }
345 * \endcode
346 *
347 * \section IfxLld_Qspi_SpiMaster_XXLMode How to use XXL Mode with Dma
348 *
349 * The Qspi XXL mode is similar to Short mode with the exception to configure mode to xxl before calling IfxQspi_SpiMaster_initChannel() function. The remaining usage is similar to Short / ShortContinuous Mode (default one) with Dma
350 *
351 * \code
352 * spiMasterChannelConfig.mode = IfxQspi_SpiMaster_Mode_xxl;
353 * \endcode
354 *
355 *
356 * \section IfxLld_Qspi_SpiMaster_LongMode How to use Long / Long Continuous Mode with Dma
357 *
358 * The qspi Long mode is similar to short mode Except for below additional changes.
359 * 1. Transmit buffer need to be defined (this is in addition to source/TX data buffer. This buffer is used to store the DATA + CONFIG for dma usage).
360 * 2. Configure the Spi Channel configuration mode (new one) to long or longContinuous mode
361 * 3. Preparing Transmit buffer content for long/long Continuous mode
362 *
363 * Example Code is provided below.
364 *
365 * \subsection IfxLld_Qspi_SpiMaster_Include Include Files
366 *
367 * Include following header file into your C code:
368 * \code
369 * #include <Qspi/SpiMaster/IfxQspi_SpiMaster.h>
370 * \endcode
371 *
372 * \subsection IfxLld_Qspi_SpiMaster_Variables Variables
373 *
374 * Declare QSPI module and channel handles:
375 *
376 * \code
377 * IfxQspi_SpiMaster spi;
378 * IfxQspi_SpiMaster_Channel spiChannel;
379 * \endcode
380 *
381 * In addition, declare global transmit and receive buffers for the data transfers:
382 * \code
383 * #define SPI_BUFFER_SIZE 50
384 * #define BACON_SIZE IFXQSPI_BACONSIZE(SPI_BUFFER_SIZE)
385 * #define FIFO_SIZE IFXQSPI_FIFO32BITSIZE(SPI_BUFFER_SIZE)
386 * // This should be 32 bit ; use addition of macros as shown
387 * __attribute__ ((aligned(64))) uint32 spi0TxLongBuffer[BACON_SIZE + FIFO_SIZE];
388 *
389 * uint8 spiTxBuffer[SPI_BUFFER_SIZE];
390 * uint8 spiRxBuffer[SPI_BUFFER_SIZE];
391 * \endcode
392 *
393 * \subsection IfxLld_Qspi_SpiMaster_Init_dma Module Initialisation (with dma use)
394 *
395 * The module initialisation can be done in the same function.
396 *
397 * Here an example for master mode:
398 * \code
399 * // create module config
400 * IfxQspi_SpiMaster_Config spiMasterConfig;
401 * IfxQspi_SpiMaster_initModuleConfig(&spiMasterConfig, &MODULE_QSPI0);
402 *
403 * // set the desired mode and maximum baudrate
404 * spiMasterConfig.base.mode = SpiIf_Mode_master;
405 * spiMasterConfig.base.maximumBaudrate = 10000000;
406 *
407 * // ISR priorities and interrupt target (with Dma usage)
408 * spiMasterConfig.base.txPriority = IFX_INTPRIO_DMA_CH1;
409 * spiMasterConfig.base.rxPriority = IFX_INTPRIO_DMA_CH2;
410 * spiMasterConfig.base.erPriority = IFX_INTPRIO_QSPI0_ER;
411 *
412 * // dma configuration.
413 * spiMasterConfig.dma.txDmaChannelId = IfxDma_ChannelId_1;
414 * spiMasterConfig.dma.rxDmaChannelId = IfxDma_ChannelId_2;
415 * spiMasterConfig.dma.useDma = 1;
416 *
417 * // pin configuration
418 * const IfxQspi_SpiMaster_Pins pins = {
419 * &IfxQspi0_SCLK_P20_11_OUT, IfxPort_OutputMode_pushPull, // SCLK
420 * &IfxQspi0_MTSR_P20_14_OUT, IfxPort_OutputMode_pushPull, // MTSR
421 * &IfxQspi0_MRSTA_P20_12_IN, IfxPort_InputMode_pullDown, // MRST
422 * IfxPort_PadDriver_cmosAutomotiveSpeed3 // pad driver mode
423 * };
424 * spiMasterConfig.pins = &Pins;
425 *
426 *
427 * // initialize module
428 * //IfxQspi_SpiMaster spi; // defined globally
429 * IfxQspi_SpiMaster_initModule(&spi, &spiMasterConfig);
430 * \endcode
431 *
432 *
433 * \subsection IfxLld_Qspi_SpiMaster_ChannelInit SPI Channel Initialisation
434 *
435 * After the module has been initialized, one or more SPI channels can be configured.
436 * Each channel has a dedicated select line.
437 *
438 * Here an example for a SPI channel in master mode:
439 * \code
440 * // create channel config
441 * IfxQspi_SpiMaster_ChannelConfig spiMasterChannelConfig;
442 * IfxQspi_SpiMaster_initChannelConfig(&spiMasterChannelConfig, &spi);
443 *
444 * // set the baudrate for this channel
445 * spiMasterChannelConfig.base.baudrate = 5000000;
446 *
447 * // select pin configuration
448 * const IfxQspi_SpiMaster_Output slsOutput = {
449 * &IfxQspi0_SLSO7_P33_5_OUT,
450 * IfxPort_OutputMode_pushPull,
451 * IfxPort_PadDriver_cmosAutomotiveSpeed1
452 * };
453 * spiMasterChannelConfig.sls.output = (IfxQspi_SpiMaster_Output)slsOutput;
454 *
455 * spiMasterChannelConfig.mode = IfxQspi_SpiMaster_Mode_longContinuous; // Select Long Continuous Mode
456 *
457 * // initialize channel
458 * //IfxQspi_SpiMaster_Channel spiChannel; // defined globally
459 * IfxQspi_SpiMaster_initChannel(&spiChannel, &spiMasterChannelConfig);
460 * \endcode
461 *
462 * Sending and Receiving a Long data stream:
463 * \code
464 * int i=0;
465 * // Pack data and Configuration to Transmit buffer (Only for Long / Long Continuous Mode(s))
466 * IfxQspi_SpiMaster_packLongModeBuffer(&spiMasterChannel, spi0TxBuffer, spi0TxLongBuffer, SPI_BUFFER_SIZE);
467 *
468 * // wait until transfer of previous data stream is finished
469 * while( IfxQspi_SpiMaster_getStatus(&spiChannel) == SpiIf_Status_busy );
470 *
471 * // send/receive new stream
472 * IfxQspi_SpiMaster_exchange(&spiChannel, &spiTxBuffer[i], &spiRxBuffer[i], SPI_BUFFER_SIZE);
473 * \endcode
474 *
475 * ** NOTE for loopback mode **
476 * In case you want to configure and test a SPI channel in loopback, you have to
477 * select:
478 * spiMasterChannelConfig.base.mode.loopback = 1
479 *
480 * If an output pin is configured in loopback mode, the SPI channel number will be extracted from the pin map configuration.
481 *
482 * If an output pin is not configured in loopback, the default SPI channel selected
483 * will be 0.
484 *
485 * \defgroup IfxLld_Qspi_SpiMaster SPI Master Driver
486 * \ingroup IfxLld_Qspi
487 * \defgroup IfxLld_Qspi_SpiMaster_DataStructures Data Structures
488 * \ingroup IfxLld_Qspi_SpiMaster
489 * \defgroup IfxLld_Qspi_SpiMaster_Module Module Functions
490 * \ingroup IfxLld_Qspi_SpiMaster
491 * \defgroup IfxLld_Qspi_SpiMaster_Channel Channel Functions
492 * \ingroup IfxLld_Qspi_SpiMaster
493 * \defgroup IfxLld_Qspi_SpiMaster_Support Support Functions
494 * \ingroup IfxLld_Qspi_SpiMaster
495 * \defgroup IfxLld_Qspi_SpiMaster_Com Communication
496 * \ingroup IfxLld_Qspi_SpiMaster
497 * \defgroup IfxLld_Qspi_SpiMaster_InterruptFunctions Interrupt Functions
498 * \ingroup IfxLld_Qspi_SpiMaster
499 * \defgroup IfxLld_Qspi_SpiMaster_DirectFifo Direct FIFO Access
500 * \ingroup IfxLld_Qspi_SpiMaster
501 */
502
503 #ifndef IFXQSPI_SPIMASTER_H
504 #define IFXQSPI_SPIMASTER_H 1
505
506 /******************************************************************************/
507 /*----------------------------------Includes----------------------------------*/
508 /******************************************************************************/
509
510 #include "Cpu/Irq/IfxCpu_Irq.h"
511 #include "Dma/Dma/IfxDma_Dma.h"
512 #include "Qspi/Std/IfxQspi.h"
513 #include "Scu/Std/IfxScuWdt.h"
514
515 /******************************************************************************/
516 /*------------------------------Type Definitions------------------------------*/
517 /******************************************************************************/
518
519 typedef struct IfxQspi_SpiMaster_Channel_s IfxQspi_SpiMaster_Channel;
520
521 typedef void (*IfxQspi_SpiMaster_AutoSlso)(IfxQspi_SpiMaster_Channel *chHandle);
522
523 /******************************************************************************/
524 /*--------------------------------Enumerations--------------------------------*/
525 /******************************************************************************/
526
527 /** \addtogroup IfxLld_Qspi_SpiMaster_DataStructures
528 * \{ */
529 typedef enum
530 {
531 IfxQspi_SpiMaster_ChannelBasedCs_disabled = 0, /**< \brief Slso will be low for complete frame */
532 IfxQspi_SpiMaster_ChannelBasedCs_enabled = 1 /**< \brief Slso will toggle with every byte */
533 } IfxQspi_SpiMaster_ChannelBasedCs;
534
535 typedef enum
536 {
537 IfxQspi_SpiMaster_Mode_short = 0, /**< \brief Short Mode */
538 IfxQspi_SpiMaster_Mode_long = 1, /**< \brief Long Mode */
539 IfxQspi_SpiMaster_Mode_shortContinuous = 2, /**< \brief Short Continous Mode */
540 IfxQspi_SpiMaster_Mode_longContinuous = 3, /**< \brief Long Continous Mode */
541 IfxQspi_SpiMaster_Mode_xxl = 4 /**< \brief XXL Mode */
542 } IfxQspi_SpiMaster_Mode;
543
544 /** \} */
545
546 /******************************************************************************/
547 /*-----------------------------Data Structures--------------------------------*/
548 /******************************************************************************/
549
550 /** \addtogroup IfxLld_Qspi_SpiMaster_DataStructures
551 * \{ */
552 /** \brief SLSI pin configuration structure
553 */
554 typedef struct
555 {
556 IFX_CONST IfxQspi_Slsi_In *pin; /**< \brief Pointer to SLSI in pin */
557 IfxPort_InputMode mode; /**< \brief The SLSI pin input mode */
558 } IfxQspi_SpiMaster_Input;
559
560 /** \brief SLSO pin configuration structure
561 */
562 typedef struct
563 {
564 IFX_CONST IfxQspi_Slso_Out *pin; /**< \brief Pointer to SLSO out pin */
565 IfxPort_OutputMode mode; /**< \brief The SLSO pin output mode */
566 IfxPort_PadDriver driver; /**< \brief The pad driver mode which should be configured */
567 } IfxQspi_SpiMaster_Output;
568
569 /** \} */
570
571 /** \addtogroup IfxLld_Qspi_SpiMaster_DataStructures
572 * \{ */
573 /** \brief Dma handle
574 */
575 typedef struct
576 {
577 IfxDma_Dma_Channel rxDmaChannel; /**< \brief receive DMA channel handle */
578 IfxDma_Dma_Channel txDmaChannel; /**< \brief transmit DMA channel handle */
579 IfxDma_ChannelId rxDmaChannelId; /**< \brief DMA channel no for the Spi recieve */
580 IfxDma_ChannelId txDmaChannelId; /**< \brief DMA channel no for the Spi transmit */
581 boolean useDma; /**< \brief use Dma for Data transfer/s */
582 } IfxQspi_SpiMaster_Dma;
583
584 /** \brief Dma configuration
585 */
586 typedef struct
587 {
588 IfxDma_ChannelId rxDmaChannelId; /**< \brief DMA channel no for the Spi recieve */
589 IfxDma_ChannelId txDmaChannelId; /**< \brief DMA channel no for the Spi transmit */
590 boolean useDma; /**< \brief use Dma for Data transfer/s */
591 } IfxQspi_SpiMaster_DmaConfig;
592
593 /** \brief Qspi Master Mode Error Flags
594 */
595 typedef struct
596 {
597 uint16 parityError : 1; /**< \brief [0:0] Parity Error */
598 uint16 configurationError : 1; /**< \brief [1:1] Configuration Error */
599 uint16 baudrateError : 1; /**< \brief [2:2] baudrate Error */
600 uint16 txFifoOverflowError : 1; /**< \brief [3:3] TxFifo Overflow Error */
601 uint16 txFifoUnderflowError : 1; /**< \brief [4:4] TxFifo underflow Error */
602 uint16 rxFifoOverflowError : 1; /**< \brief [5:5] RxFifo Overflow Error */
603 uint16 rxFifoUnderflowError : 1; /**< \brief [6:6] RxFifo underflow Error */
604 uint16 expectTimeoutError : 1; /**< \brief [7:7] Expect Timeout Error */
605 } IfxQspi_SpiMaster_ErrorFlags;
606
607 /** \brief Union of Slave Select pins
608 */
609 typedef union
610 {
611 IfxQspi_SpiMaster_Input input; /**< \brief SLSI pin configuration structure */
612 IfxQspi_SpiMaster_Output output; /**< \brief SLSO pin configuration structure */
613 } IfxQspi_SpiMaster_InputOutput;
614
615 typedef struct
616 {
617 uint16 trailingDelay2Prescaler : 3; /**< \brief Inject the trailing delay for last data */
618 uint16 lastTrailingDelay : 3; /**< \brief Last Trailing delay */
619 boolean interruptBeforeLastEnabled; /**< \brief Enable bit for Interrupt before last word */
620 boolean clearInterruptBeforeLastFlag; /**< \brief Clear Interrupt Before Last Flag */
621 boolean setInterruptBeforeLastFlag; /**< \brief Sets the Interrupt Before Last Flag */
622 boolean interruptAfterLastEnabled; /**< \brief Enable bit for Interrupt after last word */
623 boolean clearInterruptAfterLastFlag; /**< \brief Clear Interrupt After Last Flag */
624 boolean setInterruptAfterLastFlag; /**< \brief Sets the Interrupt After Last Flag */
625 boolean trail2InjectionEnabled; /**< \brief Trail 2 Injection Enable */
626 boolean moveCounterEnabled; /**< \brief Enable the Move Counter */
627 } IfxQspi_SpiMaster_MoveCounterControl;
628
629 /** \brief Master pin IO configuration structure
630 */
631 typedef struct
632 {
633 IFX_CONST IfxQspi_Sclk_Out *sclk; /**< \brief Pointer to SLCK out pin */
634 IfxPort_OutputMode sclkMode; /**< \brief The SCLK pin output mode */
635 IFX_CONST IfxQspi_Mtsr_Out *mtsr; /**< \brief Pointer to MTSR out pin */
636 IfxPort_OutputMode mtsrMode; /**< \brief The MTSR pin output mode */
637 IFX_CONST IfxQspi_Mrst_In *mrst; /**< \brief Pointer to MRST in pin */
638 IfxPort_InputMode mrstMode; /**< \brief The MRST pin input mode */
639 IfxPort_PadDriver pinDriver; /**< \brief The pad driver mode which should be configured */
640 } IfxQspi_SpiMaster_Pins;
641
642 /** \} */
643
644 /** \addtogroup IfxLld_Qspi_SpiMaster_DataStructures
645 * \{ */
646 /** \brief Module handle data structure
647 */
648 typedef struct
649 {
650 SpiIf base; /**< \brief Module SPI interface handle */
651 Ifx_QSPI *qspi; /**< \brief Pointer to QSPI module registers */
652 IfxQspi_SpiMaster_Dma dma; /**< \brief dma handle */
653 float32 maximumBaudrate; /**< \brief Maximum Baud Rate for the SPI Module. */
654 } IfxQspi_SpiMaster;
655
656 /** \brief Module Channel configuration structure
657 */
658 typedef struct
659 {
660 SpiIf_ChConfig base; /**< \brief SPI interface channel configuration structure */
661 uint32 dummyTxValue; /**< \brief Dummy TX value to be sent for "recieve only" modes */
662 uint32 dummyRxValue; /**< \brief Dummy RX value for transmit only modes */
663 IfxQspi_SpiMaster_InputOutput sls; /**< \brief Union of Slave Select pins */
664 IfxQspi_SpiMaster_ChannelBasedCs channelBasedCs; /**< \brief define the slso behaviour */
665 IfxQspi_SpiMaster_Mode mode; /**< \brief Qspi Operating Mode */
666 } IfxQspi_SpiMaster_ChannelConfig;
667
668 /** \brief Module Channel handle structure
669 */
670 struct IfxQspi_SpiMaster_Channel_s
671 {
672 SpiIf_Ch base; /**< \brief SPI interface channel handle structure */
673 Ifx_QSPI_BACON bacon; /**< \brief basic configuration register */
674 IfxPort_Pin slso; /**< \brief Defines SLSO pin */
675 IfxQspi_SpiMaster_AutoSlso activateSlso; /**< \brief Specifies function for Auto SLSO activation */
676 IfxQspi_SpiMaster_AutoSlso deactivateSlso; /**< \brief Specifies function for Auto SLSO deactivation */
677 uint32 dummyTxValue; /**< \brief Dummy TX value, which will be sent for "recieve only" mode. */
678 uint32 dummyRxValue; /**< \brief Dummy Rx value, for "transmit only" modes */
679 IfxQspi_ChannelId channelId; /**< \brief QSPI channel Number */
680 IfxQspi_SpiMaster_MoveCounterControl moveCounterControl; /**< \brief config move counter control register */
681 Ifx_ActiveState slsoActiveState; /**< \brief Specifies the current state of SLSO */
682 uint8 dataWidth; /**< \brief Number of bits which will be written into the FIFO */
683 boolean firstWrite; /**< \brief Specifies whether the data id first write or not. */
684 IfxQspi_SpiMaster_ChannelBasedCs channelBasedCs; /**< \brief define the slso behaviour */
685 IfxQspi_SpiMaster_Mode mode; /**< \brief Qspi Operating Mode */
686 IfxQspi_SpiMaster_ErrorFlags errorFlags; /**< \brief Spi Master Error Flags */
687 };
688
689 /** \brief Module configuration structure
690 */
691 typedef struct
692 {
693 SpiIf_Config base; /**< \brief SPI interface configuration structure */
694 Ifx_QSPI *qspi; /**< \brief Pointer to QSPI module registers */
695 boolean allowSleepMode; /**< \brief Specifies module sleep mode */
696 boolean pauseOnBaudrateSpikeErrors; /**< \brief Specifies module pause on baudrate or spike errors */
697 IfxQspi_PauseRunTransition pauseRunTransition; /**< \brief Specifies module run or pause mode */
698 IfxQspi_TxFifoInt txFifoThreshold; /**< \brief Specifies the TXFIFO interrupt threshold */
699 IfxQspi_RxFifoInt rxFifoThreshold; /**< \brief Specifies the RXFIFO interrupt threshold */
700 IFX_CONST IfxQspi_SpiMaster_Pins *pins; /**< \brief structure for QSPI Master pins */
701 IfxQspi_SpiMaster_DmaConfig dma; /**< \brief Dma configuration */
702 IfxQspi_FifoMode txFifoMode; /**< \brief Specifies the transmit FIFO mode */
703 IfxQspi_FifoMode rxFifoMode; /**< \brief Specifies the Receive FIFO mode */
704 } IfxQspi_SpiMaster_Config;
705
706 /** \} */
707
708 /** \addtogroup IfxLld_Qspi_SpiMaster_Module
709 * \{ */
710
711 /******************************************************************************/
712 /*-------------------------Global Function Prototypes-------------------------*/
713 /******************************************************************************/
714
715 /** \brief Initialises the module
716 * \param handle Module handle
717 * \param config Predefined configuration structure of the module
718 * \return None
719 *
720 * Usage example: see \ref IfxLld_Qspi_SpiMaster_Usage
721 *
722 */
723 IFX_EXTERN void IfxQspi_SpiMaster_initModule(IfxQspi_SpiMaster *handle, const IfxQspi_SpiMaster_Config *config);
724
725 /** \brief Fills the config structure with default values
726 * \param config Configuration structure which should be initialized.
727 * \param qspi pointer to QSPI registers
728 * \return None
729 *
730 * Usage example: see \ref IfxLld_Qspi_SpiMaster_Usage
731 *
732 */
733 IFX_EXTERN void IfxQspi_SpiMaster_initModuleConfig(IfxQspi_SpiMaster_Config *config, Ifx_QSPI *qspi);
734
735 /** \} */
736
737 /** \addtogroup IfxLld_Qspi_SpiMaster_Channel
738 * \{ */
739
740 /******************************************************************************/
741 /*-------------------------Global Function Prototypes-------------------------*/
742 /******************************************************************************/
743
744 /** \brief Initializes the channel
745 * \param chHandle Module Channel handle
746 * \param chConfig Channel configuration structure
747 * \return Status of Channel (busy or ok or failure)
748 *
749 * Usage example: see \ref IfxLld_Qspi_SpiMaster_Usage
750 *
751 */
752 IFX_EXTERN SpiIf_Status IfxQspi_SpiMaster_initChannel(IfxQspi_SpiMaster_Channel *chHandle, const IfxQspi_SpiMaster_ChannelConfig *chConfig);
753
754 /** \brief Fills the config structure with default values
755 * \param chConfig Configuration structure which should be initialized.
756 * \param handle Module handle
757 * \return None
758 *
759 * Usage example: see \ref IfxLld_Qspi_SpiMaster_Usage
760 *
761 */
762 IFX_EXTERN void IfxQspi_SpiMaster_initChannelConfig(IfxQspi_SpiMaster_ChannelConfig *chConfig, IfxQspi_SpiMaster *handle);
763
764 /** \} */
765
766 /** \addtogroup IfxLld_Qspi_SpiMaster_Com
767 * \{ */
768
769 /******************************************************************************/
770 /*-------------------------Global Function Prototypes-------------------------*/
771 /******************************************************************************/
772
773 /** \brief Exchanges data between source and data
774 * \param chHandle Module Channel handle
775 * \param src Source of data. Can be set to NULL_PTR if nothing to transmit (receive only) - in this case, all-1 will be sent.
776 * \param dest Destination to which to be sent.Can be set to NULL_PTR if nothing to receive(transmit only).
777 * \param count Number of data in pending
778 * \return Status of exchange of data
779 *
780 * Usage example: see \ref IfxLld_Qspi_SpiMaster_Usage
781 *
782 */
783 IFX_EXTERN SpiIf_Status IfxQspi_SpiMaster_exchange(IfxQspi_SpiMaster_Channel *chHandle, const void *src, void *dest, Ifx_SizeT count);
784
785 /** \brief Gets the transmission status
786 * \param chHandle Module Channel handle
787 * \return Transmission status
788 *
789 * Usage example: see \ref IfxLld_Qspi_SpiMaster_Usage
790 *
791 */
792 IFX_EXTERN SpiIf_Status IfxQspi_SpiMaster_getStatus(IfxQspi_SpiMaster_Channel *chHandle);
793
794 /** \} */
795
796 /** \addtogroup IfxLld_Qspi_SpiMaster_InterruptFunctions
797 * \{ */
798
799 /******************************************************************************/
800 /*-------------------------Global Function Prototypes-------------------------*/
801 /******************************************************************************/
802
803 /** \brief Transmit interrupt handler
804 * \param qspiHandle Module handle
805 * \return None
806 */
807 IFX_EXTERN void IfxQspi_SpiMaster_isrDmaReceive(IfxQspi_SpiMaster *qspiHandle);
808
809 /** \brief Transmit interrupt handler
810 * \param qspiHandle Module handle
811 * \return None
812 */
813 IFX_EXTERN void IfxQspi_SpiMaster_isrDmaTransmit(IfxQspi_SpiMaster *qspiHandle);
814
815 /** \brief Error Interrupt handler
816 * \param handle Module handle
817 * \return None
818 */
819 IFX_EXTERN void IfxQspi_SpiMaster_isrError(IfxQspi_SpiMaster *handle);
820
821 /** \brief Phase Transition interrupt handler
822 * \param handle Module handle
823 * \return Phase Transition Event
824 */
825 IFX_EXTERN IfxQspi_PhaseTransitionEvent IfxQspi_SpiMaster_isrPhaseTransition(IfxQspi_SpiMaster *handle);
826
827 /** \brief Receive Interrupt handler
828 * \param handle Module handle
829 * \return None
830 */
831 IFX_EXTERN void IfxQspi_SpiMaster_isrReceive(IfxQspi_SpiMaster *handle);
832
833 /** \brief Transmit interrupt handler
834 * \param handle Module handle
835 * \return None
836 */
837 IFX_EXTERN void IfxQspi_SpiMaster_isrTransmit(IfxQspi_SpiMaster *handle);
838
839 /** \brief User defined interrupt handler
840 * \param handle Module handle
841 * \return User Event
842 */
843 IFX_EXTERN IfxQspi_PhaseTransitionEvent IfxQspi_SpiMaster_isrUserDefined(IfxQspi_SpiMaster *handle);
844
845 /** \} */
846
847 /** \addtogroup IfxLld_Qspi_SpiMaster_DirectFifo
848 * \{ */
849
850 /******************************************************************************/
851 /*-------------------------Inline Function Prototypes-------------------------*/
852 /******************************************************************************/
853
854 /** \brief Reads data or status in RxFIFO
855 * \param handle Module handle
856 * \return Data or Status in RxFIFO
857 */
858 IFX_INLINE uint32 IfxQspi_SpiMaster_readReceiveFifo(IfxQspi_SpiMaster *handle);
859
860 /** \brief Writes Basic configuration value to Tx FIFO
861 * \param handle Module handle
862 * \param baconVal Basic configuration value to be entered in TxFIFO
863 * \return None
864 */
865 IFX_INLINE void IfxQspi_SpiMaster_writeBasicConfiguration(IfxQspi_SpiMaster *handle, uint32 baconVal);
866
867 /** \brief Writes extended configuration of the channel
868 * \param chHandle Module Channel handle
869 * \param econVal Channel Timing configuration value
870 * \return None
871 */
872 IFX_INLINE void IfxQspi_SpiMaster_writeExtendedConfiguration(IfxQspi_SpiMaster_Channel *chHandle, uint32 econVal);
873
874 /** \brief Writes data and configuration mixed value to Tx FIFO
875 * \param handle Module handle
876 * \param mixEntryVal Mixed of Data and configuration
877 * \return None
878 */
879 IFX_INLINE void IfxQspi_SpiMaster_writeMixedDataConfiguration(IfxQspi_SpiMaster *handle, uint32 mixEntryVal);
880
881 /** \brief Writes the data to TxFIFO
882 * \param chHandle Module Channel handle
883 * \param data Data to be entered in Tx FIFO
884 * \return None
885 */
886 IFX_INLINE void IfxQspi_SpiMaster_writeTransmitFifo(IfxQspi_SpiMaster_Channel *chHandle, uint32 data);
887
888 /******************************************************************************/
889 /*-------------------------Global Function Prototypes-------------------------*/
890 /******************************************************************************/
891
892 /** \brief pack data to Long mode buffer
893 * \param chHandle Module Channel handle
894 * \param data source Data buffer to be packed
895 * \param longFifoBuffer destination buffer for data and configuration
896 * \param dataLength size of data in source buffer (in bytes)
897 * \return None
898 */
899 IFX_EXTERN void IfxQspi_SpiMaster_packLongModeBuffer(IfxQspi_SpiMaster_Channel *chHandle, void *data, uint32 *longFifoBuffer, Ifx_SizeT dataLength);
900
901 /** \} */
902
903 /******************************************************************************/
904 /*-------------------------Global Function Prototypes-------------------------*/
905 /******************************************************************************/
906
907 /** \brief Gets the channel configuration
908 * \param chHandle Module Channel handle
909 * \return Channel configuration
910 */
911 IFX_EXTERN SpiIf_ChConfig IfxQspi_SpiMaster_getChannelConfig(IfxQspi_SpiMaster_Channel *chHandle);
912
913 /**
914 * \param qspi module register handler
915 * \param moveCounter Pointer to move counter structure
916 * \return None
917 */
918 IFX_EXTERN void IfxQspi_SpiMaster_moveCounterControlConfiguration(Ifx_QSPI *qspi, IfxQspi_SpiMaster_MoveCounterControl *moveCounter);
919
920 /** \brief Set the channel baudrate
921 * \param chHandle Module Channel handle
922 * \param baudrate Baudrate to be configured (in Baud)
923 * \return Status of Channel (busy or ok or failure)
924 */
925 IFX_EXTERN SpiIf_Status IfxQspi_SpiMaster_setChannelBaudrate(IfxQspi_SpiMaster_Channel *chHandle, float32 baudrate);
926
927 /******************************************************************************/
928 /*---------------------Inline Function Implementations------------------------*/
929 /******************************************************************************/
930
931 IFX_INLINE uint32 IfxQspi_SpiMaster_readReceiveFifo(IfxQspi_SpiMaster *handle)
932 {
933 Ifx_QSPI *qspiSFR = handle->qspi;
934 uint32 data = IfxQspi_readReceiveFifo(qspiSFR);
935 return data;
936 }
937
938
939 IFX_INLINE void IfxQspi_SpiMaster_writeBasicConfiguration(IfxQspi_SpiMaster *handle, uint32 baconVal)
940 {
941 Ifx_QSPI *qspiSFR = handle->qspi;
942 IfxQspi_writeBasicConfiguration(qspiSFR, baconVal);
943 }
944
945
946 IFX_INLINE void IfxQspi_SpiMaster_writeExtendedConfiguration(IfxQspi_SpiMaster_Channel *chHandle, uint32 econVal)
947 {
948 IfxQspi_SpiMaster *handle = (IfxQspi_SpiMaster *)chHandle->base.driver;
949 IfxQspi_writeExtendedConfiguration(handle->qspi, chHandle->channelId, econVal);
950 }
951
952
953 IFX_INLINE void IfxQspi_SpiMaster_writeMixedDataConfiguration(IfxQspi_SpiMaster *handle, uint32 mixEntryVal)
954 {
955 Ifx_QSPI *qspiSFR = handle->qspi;
956 IfxQspi_writeMixedDataTransmitFifo(qspiSFR, mixEntryVal);
957 }
958
959
960 IFX_INLINE void IfxQspi_SpiMaster_writeTransmitFifo(IfxQspi_SpiMaster_Channel *chHandle, uint32 data)
961 {
962 IfxQspi_SpiMaster *handle = (IfxQspi_SpiMaster *)chHandle->base.driver;
963 IfxQspi_writeTransmitFifo(handle->qspi, data);
964 }
965
966
967 #endif /* IFXQSPI_SPIMASTER_H */
IfxQspi_SpiMaster_Channel_s::bacon
Ifx_QSPI_BACON bacon
basic configuration register
Definition: IfxQspi_SpiMaster.h:673
IfxQspi_SpiMaster_Pins::pinDriver
IfxPort_PadDriver pinDriver
The pad driver mode which should be configured.
Definition: IfxQspi_SpiMaster.h:639
IfxQspi_SpiMaster_ChannelBasedCs_disabled
Slso will be low for complete frame.
Definition: IfxQspi_SpiMaster.h:531
IfxQspi_SpiMaster_MoveCounterControl::clearInterruptAfterLastFlag
boolean clearInterruptAfterLastFlag
Clear Interrupt After Last Flag.
Definition: IfxQspi_SpiMaster.h:623
IfxQspi_Slsi_In
SLSI pin mapping structure.
Definition: IfxQspi_PinMap.h:80
IfxQspi_SpiMaster_Mode_shortContinuous
Short Continous Mode.
Definition: IfxQspi_SpiMaster.h:539
IfxDma_ChannelId
IfxDma_ChannelId
DMA channel resources definition.
Definition: IfxDma_cfg.h:102
IfxQspi_SpiMaster
Module handle data structure.
Definition: IfxQspi_SpiMaster.h:648
IfxQspi_SpiMaster_Output::mode
IfxPort_OutputMode mode
The SLSO pin output mode.
Definition: IfxQspi_SpiMaster.h:565
IfxQspi_SpiMaster_MoveCounterControl::lastTrailingDelay
uint16 lastTrailingDelay
Last Trailing delay.
Definition: IfxQspi_SpiMaster.h:618
IfxQspi_SpiMaster_Pins::mrstMode
IfxPort_InputMode mrstMode
The MRST pin input mode.
Definition: IfxQspi_SpiMaster.h:638
IfxQspi_SpiMaster_Output
SLSO pin configuration structure.
Definition: IfxQspi_SpiMaster.h:562
IfxQspi_SpiMaster_Channel_s::slsoActiveState
Ifx_ActiveState slsoActiveState
Specifies the current state of SLSO.
Definition: IfxQspi_SpiMaster.h:681
IfxQspi_SpiMaster_writeBasicConfiguration
IFX_INLINE void IfxQspi_SpiMaster_writeBasicConfiguration(IfxQspi_SpiMaster *handle, uint32 baconVal)
Writes Basic configuration value to Tx FIFO.
Definition: IfxQspi_SpiMaster.h:939
IfxQspi_SpiMaster_Channel_s::deactivateSlso
IfxQspi_SpiMaster_AutoSlso deactivateSlso
Specifies function for Auto SLSO deactivation.
Definition: IfxQspi_SpiMaster.h:676
IfxQspi_SpiMaster_Channel_s::channelId
IfxQspi_ChannelId channelId
QSPI channel Number.
Definition: IfxQspi_SpiMaster.h:679
SpiIf_ChConfig_
Definition: SpiIf.h:225
IfxQspi_SpiMaster_MoveCounterControl::moveCounterEnabled
boolean moveCounterEnabled
Enable the Move Counter.
Definition: IfxQspi_SpiMaster.h:626
IfxQspi_SpiMaster_Config::pauseRunTransition
IfxQspi_PauseRunTransition pauseRunTransition
Specifies module run or pause mode.
Definition: IfxQspi_SpiMaster.h:697
IfxQspi_PhaseTransitionEvent
IfxQspi_PhaseTransitionEvent
Phase Transition Event.
Definition: IfxQspi.h:193
IfxQspi_SpiMaster_Pins::mtsrMode
IfxPort_OutputMode mtsrMode
The MTSR pin output mode.
Definition: IfxQspi_SpiMaster.h:636
IfxQspi_SpiMaster_isrError
IFX_EXTERN void IfxQspi_SpiMaster_isrError(IfxQspi_SpiMaster *handle)
Error Interrupt handler.
Definition: IfxQspi_SpiMaster.c:648
IfxQspi_SpiMaster_setChannelBaudrate
IFX_EXTERN SpiIf_Status IfxQspi_SpiMaster_setChannelBaudrate(IfxQspi_SpiMaster_Channel *chHandle, float32 baudrate)
Set the channel baudrate.
Definition: IfxQspi_SpiMaster.c:909
IfxQspi_SpiMaster_MoveCounterControl::clearInterruptBeforeLastFlag
boolean clearInterruptBeforeLastFlag
Clear Interrupt Before Last Flag.
Definition: IfxQspi_SpiMaster.h:620
IfxQspi_SpiMaster_Dma::rxDmaChannel
IfxDma_Dma_Channel rxDmaChannel
receive DMA channel handle
Definition: IfxQspi_SpiMaster.h:577
IfxQspi_SpiMaster_Channel_s::slso
IfxPort_Pin slso
Defines SLSO pin.
Definition: IfxQspi_SpiMaster.h:674
IfxQspi_SpiMaster_Config::txFifoMode
IfxQspi_FifoMode txFifoMode
Specifies the transmit FIFO mode.
Definition: IfxQspi_SpiMaster.h:702
IfxQspi_SpiMaster_Dma
Dma handle.
Definition: IfxQspi_SpiMaster.h:575
SpiIf_Config
Definition: SpiIf.h:160
IfxQspi_SpiMaster_MoveCounterControl::interruptAfterLastEnabled
boolean interruptAfterLastEnabled
Enable bit for Interrupt after last word.
Definition: IfxQspi_SpiMaster.h:622
IfxQspi_SpiMaster_isrDmaReceive
IFX_EXTERN void IfxQspi_SpiMaster_isrDmaReceive(IfxQspi_SpiMaster *qspiHandle)
Transmit interrupt handler.
Definition: IfxQspi_SpiMaster.c:572
IfxDma_Dma.h
DMA DMA details.
IfxQspi_SpiMaster_Config::pins
IFX_CONST IfxQspi_SpiMaster_Pins * pins
structure for QSPI Master pins
Definition: IfxQspi_SpiMaster.h:700
IfxQspi_SpiMaster_Mode_xxl
XXL Mode.
Definition: IfxQspi_SpiMaster.h:541
IfxQspi_SpiMaster_writeTransmitFifo
IFX_INLINE void IfxQspi_SpiMaster_writeTransmitFifo(IfxQspi_SpiMaster_Channel *chHandle, uint32 data)
Writes the data to TxFIFO.
Definition: IfxQspi_SpiMaster.h:960
IfxQspi_SpiMaster_isrPhaseTransition
IFX_EXTERN IfxQspi_PhaseTransitionEvent IfxQspi_SpiMaster_isrPhaseTransition(IfxQspi_SpiMaster *handle)
Phase Transition interrupt handler.
Definition: IfxQspi_SpiMaster.c:717
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:140
IfxQspi_SpiMaster_Input::mode
IfxPort_InputMode mode
The SLSI pin input mode.
Definition: IfxQspi_SpiMaster.h:557
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxQspi_Sclk_Out
SCLK pin mapping structure.
Definition: IfxQspi_PinMap.h:112
IfxQspi_SpiMaster_Config::dma
IfxQspi_SpiMaster_DmaConfig dma
Dma configuration.
Definition: IfxQspi_SpiMaster.h:701
IfxQspi_writeMixedDataTransmitFifo
IFX_INLINE void IfxQspi_writeMixedDataTransmitFifo(Ifx_QSPI *qspi, uint32 mixEntryVal)
Writes Data and Configuration into MIXEDENTRY register.
Definition: IfxQspi.h:1341
float32
float float32
Definition: Platform_Types.h:170
IfxQspi_SpiMaster_Config::rxFifoMode
IfxQspi_FifoMode rxFifoMode
Specifies the Receive FIFO mode.
Definition: IfxQspi_SpiMaster.h:703
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
IfxQspi_FifoMode
IfxQspi_FifoMode
Transmit FIFO mode.
Definition: IfxQspi.h:286
IfxQspi_SpiMaster_Output::driver
IfxPort_PadDriver driver
The pad driver mode which should be configured.
Definition: IfxQspi_SpiMaster.h:566
IfxQspi_SpiMaster_Config::allowSleepMode
boolean allowSleepMode
Specifies module sleep mode.
Definition: IfxQspi_SpiMaster.h:695
IfxQspi_SpiMaster_exchange
IFX_EXTERN SpiIf_Status IfxQspi_SpiMaster_exchange(IfxQspi_SpiMaster_Channel *chHandle, const void *src, void *dest, Ifx_SizeT count)
Exchanges data between source and data.
Definition: IfxQspi_SpiMaster.c:140
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:113
IfxQspi_SpiMaster_getChannelConfig
IFX_EXTERN SpiIf_ChConfig IfxQspi_SpiMaster_getChannelConfig(IfxQspi_SpiMaster_Channel *chHandle)
Gets the channel configuration.
Definition: IfxQspi_SpiMaster.c:182
IfxQspi_SpiMaster_ErrorFlags::rxFifoOverflowError
uint16 rxFifoOverflowError
[5:5] RxFifo Overflow Error
Definition: IfxQspi_SpiMaster.h:602
SpiIf_
Definition: SpiIf.h:150
IfxQspi_SpiMaster_Mode
IfxQspi_SpiMaster_Mode
Definition: IfxQspi_SpiMaster.h:535
IfxQspi_SpiMaster_Config::pauseOnBaudrateSpikeErrors
boolean pauseOnBaudrateSpikeErrors
Specifies module pause on baudrate or spike errors.
Definition: IfxQspi_SpiMaster.h:696
IfxQspi_SpiMaster_Config
Module configuration structure.
Definition: IfxQspi_SpiMaster.h:691
IfxQspi_SpiMaster_isrTransmit
IFX_EXTERN void IfxQspi_SpiMaster_isrTransmit(IfxQspi_SpiMaster *handle)
Transmit interrupt handler.
Definition: IfxQspi_SpiMaster.c:745
IfxQspi_writeExtendedConfiguration
IFX_INLINE void IfxQspi_writeExtendedConfiguration(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 econVal)
Writes channel timing configuration into ECON register.
Definition: IfxQspi.h:1334
IfxQspi_SpiMaster_ErrorFlags::txFifoOverflowError
uint16 txFifoOverflowError
[3:3] TxFifo Overflow Error
Definition: IfxQspi_SpiMaster.h:600
IfxScuWdt.h
SCU basic functionality.
IfxQspi_SpiMaster_writeMixedDataConfiguration
IFX_INLINE void IfxQspi_SpiMaster_writeMixedDataConfiguration(IfxQspi_SpiMaster *handle, uint32 mixEntryVal)
Writes data and configuration mixed value to Tx FIFO.
Definition: IfxQspi_SpiMaster.h:953
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxQspi_Slso_Out
SLSO pin mapping structure.
Definition: IfxQspi_PinMap.h:120
IfxQspi_readReceiveFifo
IFX_INLINE uint32 IfxQspi_readReceiveFifo(Ifx_QSPI *qspi)
Read the oldest data from RXFIFO.
Definition: IfxQspi.h:1184
IfxQspi_SpiMaster_MoveCounterControl::setInterruptAfterLastFlag
boolean setInterruptAfterLastFlag
Sets the Interrupt After Last Flag.
Definition: IfxQspi_SpiMaster.h:624
IfxQspi_SpiMaster_initChannelConfig
IFX_EXTERN void IfxQspi_SpiMaster_initChannelConfig(IfxQspi_SpiMaster_ChannelConfig *chConfig, IfxQspi_SpiMaster *handle)
Fills the config structure with default values.
Definition: IfxQspi_SpiMaster.c:325
IfxQspi_SpiMaster_Dma::txDmaChannelId
IfxDma_ChannelId txDmaChannelId
DMA channel no for the Spi transmit.
Definition: IfxQspi_SpiMaster.h:580
IfxQspi_SpiMaster_Input::pin
IFX_CONST IfxQspi_Slsi_In * pin
Pointer to SLSI in pin.
Definition: IfxQspi_SpiMaster.h:556
IfxQspi_SpiMaster_Channel_s::firstWrite
boolean firstWrite
Specifies whether the data id first write or not.
Definition: IfxQspi_SpiMaster.h:683
IfxQspi_SpiMaster_Config::txFifoThreshold
IfxQspi_TxFifoInt txFifoThreshold
Specifies the TXFIFO interrupt threshold.
Definition: IfxQspi_SpiMaster.h:698
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxQspi_ChannelId
IfxQspi_ChannelId
QSPI channel Number (BACON.CS)
Definition: IfxQspi.h:94
IfxQspi_Mtsr_Out
MTSR pin mapping structure.
Definition: IfxQspi_PinMap.h:104
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxQspi_SpiMaster_Channel_s::moveCounterControl
IfxQspi_SpiMaster_MoveCounterControl moveCounterControl
config move counter control register
Definition: IfxQspi_SpiMaster.h:680
IfxQspi_PauseRunTransition
IfxQspi_PauseRunTransition
Request between pause and Run transition.
Definition: IfxQspi.h:170
IfxQspi_RxFifoInt
IfxQspi_RxFifoInt
Receive Fifo Interrupt Threshold.
Definition: IfxQspi.h:217
IfxQspi_SpiMaster_Pins::mtsr
IFX_CONST IfxQspi_Mtsr_Out * mtsr
Pointer to MTSR out pin.
Definition: IfxQspi_SpiMaster.h:635
IfxQspi_TxFifoInt
IfxQspi_TxFifoInt
Transmit Fifo Interrupt Threshold.
Definition: IfxQspi.h:274
IfxQspi_SpiMaster_Pins::sclkMode
IfxPort_OutputMode sclkMode
The SCLK pin output mode.
Definition: IfxQspi_SpiMaster.h:634
IfxQspi_SpiMaster::qspi
Ifx_QSPI * qspi
Pointer to QSPI module registers.
Definition: IfxQspi_SpiMaster.h:651
IfxQspi_SpiMaster::maximumBaudrate
float32 maximumBaudrate
Maximum Baud Rate for the SPI Module.
Definition: IfxQspi_SpiMaster.h:653
IfxQspi_SpiMaster_MoveCounterControl::trailingDelay2Prescaler
uint16 trailingDelay2Prescaler
Inject the trailing delay for last data.
Definition: IfxQspi_SpiMaster.h:617
IfxQspi_SpiMaster_ErrorFlags::txFifoUnderflowError
uint16 txFifoUnderflowError
[4:4] TxFifo underflow Error
Definition: IfxQspi_SpiMaster.h:601
IfxQspi_SpiMaster_ErrorFlags::configurationError
uint16 configurationError
[1:1] Configuration Error
Definition: IfxQspi_SpiMaster.h:598
IfxQspi_SpiMaster_Output::pin
IFX_CONST IfxQspi_Slso_Out * pin
Pointer to SLSO out pin.
Definition: IfxQspi_SpiMaster.h:564
IfxQspi_SpiMaster_ChannelConfig::dummyTxValue
uint32 dummyTxValue
Dummy TX value to be sent for "recieve only" modes.
Definition: IfxQspi_SpiMaster.h:661
IfxQspi_SpiMaster_Channel_s::errorFlags
IfxQspi_SpiMaster_ErrorFlags errorFlags
Spi Master Error Flags.
Definition: IfxQspi_SpiMaster.h:686
IfxQspi_SpiMaster_Dma::useDma
boolean useDma
use Dma for Data transfer/s
Definition: IfxQspi_SpiMaster.h:581
IfxQspi_SpiMaster_MoveCounterControl::setInterruptBeforeLastFlag
boolean setInterruptBeforeLastFlag
Sets the Interrupt Before Last Flag.
Definition: IfxQspi_SpiMaster.h:621
IfxQspi_Mrst_In
MRST pin mapping structure.
Definition: IfxQspi_PinMap.h:56
IfxQspi_SpiMaster_Mode_long
Long Mode.
Definition: IfxQspi_SpiMaster.h:538
IfxQspi_SpiMaster_InputOutput
Union of Slave Select pins.
Definition: IfxQspi_SpiMaster.h:609
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:151
IfxQspi_SpiMaster_Config::base
SpiIf_Config base
SPI interface configuration structure.
Definition: IfxQspi_SpiMaster.h:693
IfxQspi_SpiMaster_ChannelConfig::channelBasedCs
IfxQspi_SpiMaster_ChannelBasedCs channelBasedCs
define the slso behaviour
Definition: IfxQspi_SpiMaster.h:664
IfxQspi_SpiMaster_Input
SLSI pin configuration structure.
Definition: IfxQspi_SpiMaster.h:554
IfxQspi_SpiMaster_Channel_s::dataWidth
uint8 dataWidth
Number of bits which will be written into the FIFO.
Definition: IfxQspi_SpiMaster.h:682
IfxQspi_SpiMaster::base
SpiIf base
Module SPI interface handle.
Definition: IfxQspi_SpiMaster.h:650
IfxQspi_SpiMaster_DmaConfig
Dma configuration.
Definition: IfxQspi_SpiMaster.h:586
IfxQspi_SpiMaster_ChannelConfig::mode
IfxQspi_SpiMaster_Mode mode
Qspi Operating Mode.
Definition: IfxQspi_SpiMaster.h:665
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:246
IfxQspi_SpiMaster_Mode_longContinuous
Long Continous Mode.
Definition: IfxQspi_SpiMaster.h:540
IfxQspi_SpiMaster_Pins::mrst
IFX_CONST IfxQspi_Mrst_In * mrst
Pointer to MRST in pin.
Definition: IfxQspi_SpiMaster.h:637
IfxQspi_SpiMaster_packLongModeBuffer
IFX_EXTERN void IfxQspi_SpiMaster_packLongModeBuffer(IfxQspi_SpiMaster_Channel *chHandle, void *data, uint32 *longFifoBuffer, Ifx_SizeT dataLength)
pack data to Long mode buffer
Definition: IfxQspi_SpiMaster.c:787
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxQspi_SpiMaster_isrUserDefined
IFX_EXTERN IfxQspi_PhaseTransitionEvent IfxQspi_SpiMaster_isrUserDefined(IfxQspi_SpiMaster *handle)
User defined interrupt handler.
Definition: IfxQspi_SpiMaster.c:753
IfxQspi_SpiMaster_InputOutput::input
IfxQspi_SpiMaster_Input input
SLSI pin configuration structure.
Definition: IfxQspi_SpiMaster.h:611
IfxQspi_SpiMaster_isrDmaTransmit
IFX_EXTERN void IfxQspi_SpiMaster_isrDmaTransmit(IfxQspi_SpiMaster *qspiHandle)
Transmit interrupt handler.
Definition: IfxQspi_SpiMaster.c:593
IfxQspi_SpiMaster_Dma::txDmaChannel
IfxDma_Dma_Channel txDmaChannel
transmit DMA channel handle
Definition: IfxQspi_SpiMaster.h:578
IfxQspi_SpiMaster_isrReceive
IFX_EXTERN void IfxQspi_SpiMaster_isrReceive(IfxQspi_SpiMaster *handle)
Receive Interrupt handler.
Definition: IfxQspi_SpiMaster.c:737
IfxQspi_SpiMaster_Channel_s::activateSlso
IfxQspi_SpiMaster_AutoSlso activateSlso
Specifies function for Auto SLSO activation.
Definition: IfxQspi_SpiMaster.h:675
IfxQspi_SpiMaster_ErrorFlags
Qspi Master Mode Error Flags.
Definition: IfxQspi_SpiMaster.h:595
SpiIf_Ch_::driver
SpiIf * driver
Pointer to the SPI interface driver.
Definition: SpiIf.h:213
IfxQspi_SpiMaster_Config::rxFifoThreshold
IfxQspi_RxFifoInt rxFifoThreshold
Specifies the RXFIFO interrupt threshold.
Definition: IfxQspi_SpiMaster.h:699
IfxQspi_SpiMaster_ChannelConfig::base
SpiIf_ChConfig base
SPI interface channel configuration structure.
Definition: IfxQspi_SpiMaster.h:660
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:81
IfxQspi_SpiMaster_initModule
IFX_EXTERN void IfxQspi_SpiMaster_initModule(IfxQspi_SpiMaster *handle, const IfxQspi_SpiMaster_Config *config)
Initialises the module.
Definition: IfxQspi_SpiMaster.c:340
IfxQspi_SpiMaster_initModuleConfig
IFX_EXTERN void IfxQspi_SpiMaster_initModuleConfig(IfxQspi_SpiMaster_Config *config, Ifx_QSPI *qspi)
Fills the config structure with default values.
Definition: IfxQspi_SpiMaster.c:553
IfxQspi_writeTransmitFifo
IFX_INLINE void IfxQspi_writeTransmitFifo(Ifx_QSPI *qspi, uint32 data)
Write Data into DATAENTRY register.
Definition: IfxQspi.h:1347
IfxQspi_SpiMaster_writeExtendedConfiguration
IFX_INLINE void IfxQspi_SpiMaster_writeExtendedConfiguration(IfxQspi_SpiMaster_Channel *chHandle, uint32 econVal)
Writes extended configuration of the channel.
Definition: IfxQspi_SpiMaster.h:946
IfxQspi_SpiMaster_ChannelConfig::dummyRxValue
uint32 dummyRxValue
Dummy RX value for transmit only modes.
Definition: IfxQspi_SpiMaster.h:662
IfxQspi_SpiMaster_AutoSlso
void(* IfxQspi_SpiMaster_AutoSlso)(IfxQspi_SpiMaster_Channel *chHandle)
Definition: IfxQspi_SpiMaster.h:521
IfxQspi_SpiMaster_Pins::sclk
IFX_CONST IfxQspi_Sclk_Out * sclk
Pointer to SLCK out pin.
Definition: IfxQspi_SpiMaster.h:633
IfxQspi_SpiMaster_Mode_short
Short Mode.
Definition: IfxQspi_SpiMaster.h:537
IfxCpu_Irq.h
This file contains the APIs for Interrupt related functions.
IfxQspi_SpiMaster_MoveCounterControl::trail2InjectionEnabled
boolean trail2InjectionEnabled
Trail 2 Injection Enable.
Definition: IfxQspi_SpiMaster.h:625
IfxQspi_SpiMaster_ErrorFlags::baudrateError
uint16 baudrateError
[2:2] baudrate Error
Definition: IfxQspi_SpiMaster.h:599
IfxQspi_SpiMaster_ChannelBasedCs_enabled
Slso will toggle with every byte.
Definition: IfxQspi_SpiMaster.h:532
IfxQspi_SpiMaster_ChannelConfig::sls
IfxQspi_SpiMaster_InputOutput sls
Union of Slave Select pins.
Definition: IfxQspi_SpiMaster.h:663
IfxQspi_writeBasicConfiguration
IFX_INLINE void IfxQspi_writeBasicConfiguration(Ifx_QSPI *qspi, uint32 baconVal)
Write configuration into BACON register.
Definition: IfxQspi.h:1308
IfxQspi.h
QSPI basic functionality.
IfxQspi_SpiMaster_Channel_s::base
SpiIf_Ch base
SPI interface channel handle structure.
Definition: IfxQspi_SpiMaster.h:672
IfxQspi_SpiMaster_getStatus
IFX_EXTERN SpiIf_Status IfxQspi_SpiMaster_getStatus(IfxQspi_SpiMaster_Channel *chHandle)
Gets the transmission status.
Definition: IfxQspi_SpiMaster.c:217
SpiIf_Status
SpiIf_Status
SPI Interface Status.
Definition: SpiIf.h:66
IfxQspi_SpiMaster_ErrorFlags::rxFifoUnderflowError
uint16 rxFifoUnderflowError
[6:6] RxFifo underflow Error
Definition: IfxQspi_SpiMaster.h:603
IfxQspi_SpiMaster_MoveCounterControl
Definition: IfxQspi_SpiMaster.h:615
IfxQspi_SpiMaster_initChannel
IFX_EXTERN SpiIf_Status IfxQspi_SpiMaster_initChannel(IfxQspi_SpiMaster_Channel *chHandle, const IfxQspi_SpiMaster_ChannelConfig *chConfig)
Initializes the channel.
Definition: IfxQspi_SpiMaster.c:230
IfxQspi_SpiMaster_ChannelBasedCs
IfxQspi_SpiMaster_ChannelBasedCs
Definition: IfxQspi_SpiMaster.h:529
IfxQspi_SpiMaster_moveCounterControlConfiguration
IFX_EXTERN void IfxQspi_SpiMaster_moveCounterControlConfiguration(Ifx_QSPI *qspi, IfxQspi_SpiMaster_MoveCounterControl *moveCounter)
Definition: IfxQspi_SpiMaster.c:775
IfxQspi_SpiMaster_Pins
Master pin IO configuration structure.
Definition: IfxQspi_SpiMaster.h:631
IfxDma_Dma_Channel
Channel handle.
Definition: IfxDma_Dma.h:471
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxQspi_SpiMaster_ChannelConfig
Module Channel configuration structure.
Definition: IfxQspi_SpiMaster.h:658
IfxQspi_SpiMaster_ErrorFlags::expectTimeoutError
uint16 expectTimeoutError
[7:7] Expect Timeout Error
Definition: IfxQspi_SpiMaster.h:604
IfxQspi_SpiMaster_ErrorFlags::parityError
uint16 parityError
[0:0] Parity Error
Definition: IfxQspi_SpiMaster.h:597
IfxQspi_SpiMaster_readReceiveFifo
IFX_INLINE uint32 IfxQspi_SpiMaster_readReceiveFifo(IfxQspi_SpiMaster *handle)
Reads data or status in RxFIFO.
Definition: IfxQspi_SpiMaster.h:931
IfxQspi_SpiMaster_Dma::rxDmaChannelId
IfxDma_ChannelId rxDmaChannelId
DMA channel no for the Spi recieve.
Definition: IfxQspi_SpiMaster.h:579
IfxQspi_SpiMaster_MoveCounterControl::interruptBeforeLastEnabled
boolean interruptBeforeLastEnabled
Enable bit for Interrupt before last word.
Definition: IfxQspi_SpiMaster.h:619
IfxQspi_SpiMaster::dma
IfxQspi_SpiMaster_Dma dma
dma handle
Definition: IfxQspi_SpiMaster.h:652
IfxQspi_SpiMaster_InputOutput::output
IfxQspi_SpiMaster_Output output
SLSO pin configuration structure.
Definition: IfxQspi_SpiMaster.h:612
SpiIf_Ch_
Definition: SpiIf.h:211
IfxQspi_SpiMaster_Channel_s
Module Channel handle structure.
Definition: IfxQspi_SpiMaster.h:670


iLLD_TC38A: IfxQspi_SpiSlave.c Source File

  • Qspi
  • SpiSlave
IfxQspi_SpiSlave.c
Go to the documentation of this file.
1 /**
2 * \file IfxQspi_SpiSlave.c
3 * \brief QSPI SPISLAVE details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 */
43
44 /******************************************************************************/
45 /*----------------------------------Includes----------------------------------*/
46 /******************************************************************************/
47
48 #include "IfxQspi_SpiSlave.h"
49
50 /** \addtogroup IfxLld_Qspi_SpiSlave_Support
51 * \{ */
52
53 /******************************************************************************/
54 /*-----------------------Private Function Prototypes--------------------------*/
55 /******************************************************************************/
56
57 /** \brief Reads data from the Rx FIFO
58 * \param handle Module handle
59 * \return None
60 */
61 IFX_STATIC void IfxQspi_SpiSlave_read(IfxQspi_SpiSlave *handle);
62
63 /** \brief Writes data into the Tx FIFO
64 * \param handle Module handle
65 * \return None
66 */
67 IFX_STATIC void IfxQspi_SpiSlave_write(IfxQspi_SpiSlave *handle);
68
69 /** \} */
70
71 /** \addtogroup IfxLld_Qspi_SpiSlave_DataStructures
72 * \{ */
73
74 /******************************************************************************/
75 /*------------------------Private Variables/Constants-------------------------*/
76 /******************************************************************************/
77
78 /** \brief dummy variable where recived data is placed
79 */
80 IFX_STATIC uint32 IfxQspi_SpiSlave_dummyRxValue = 0;
81
82 /** \brief dummy value to be transmitted
83 */
84 IFX_STATIC IFX_CONST uint32 IfxQspi_SpiSlave_dummyTxValue = ~0;
85
86 /** \} */
87
88 /******************************************************************************/
89 /*-------------------------Function Implementations---------------------------*/
90 /******************************************************************************/
91
92 SpiIf_Status IfxQspi_SpiSlave_exchange(IfxQspi_SpiSlave *handle, const void *src, void *dest, Ifx_SizeT count)
93 {
94 SpiIf_Status status = SpiIf_Status_busy;
95
96 /* initiate transfer when resource is free */
97 if (handle->onTransfer == FALSE)
98 {
99 status = SpiIf_Status_ok;
100
101 handle->onTransfer = TRUE;
102 handle->txJob.data = (void *)src;
103 handle->txJob.remaining = count;
104 handle->rxJob.data = dest;
105 handle->rxJob.remaining = count;
106 IfxQspi_SpiSlave_write(handle);
107 }
108
109 return status;
110 }
111
112
113 SpiIf_Status IfxQspi_SpiSlave_getStatus(IfxQspi_SpiSlave *handle)
114 {
115 SpiIf_Status status = SpiIf_Status_ok;
116
117 if (handle->onTransfer != 0)
118 {
119 status = SpiIf_Status_busy;
120 }
121
122 return status;
123 }
124
125
126 void IfxQspi_SpiSlave_initModule(IfxQspi_SpiSlave *handle, const IfxQspi_SpiSlave_Config *config)
127 {
128 Ifx_QSPI *qspiSFR = config->qspi;
129 Ifx_DMA *dmaSFR = &MODULE_DMA;
130
131 /* handle.base must be at offset 0 to be compatible with the standard interface SscIf */
132 {
133 uint16 password = IfxScuWdt_getCpuWatchdogPassword();
134 IfxScuWdt_clearCpuEndinit(password);
135 IfxQspi_setEnableModuleRequest(qspiSFR);
136 IfxQspi_setSleepMode(qspiSFR, (config->allowSleepMode != FALSE) ? IfxQspi_SleepMode_enable : IfxQspi_SleepMode_disable);
137 IfxScuWdt_setCpuEndinit(password);
138 }
139
140 { /* Configure GLOBAL, Note: at the moment default values for GLOBAL */
141 Ifx_QSPI_GLOBALCON globalcon;
142 globalcon.U = 0;
143 globalcon.B.TQ = IfxQspi_calculateTimeQuantumLength(qspiSFR, config->base.maximumBaudrate);
144 globalcon.B.EXPECT = IfxQspi_ExpectTimeout_2097152; /* 2^(EXPECT+6) : timeout for expect phase in Tqspi */
145 //globalcon.B.LB = 0; /* 0 : disable loop-back w*/
146 //globalcon.B.DEL0 = 0; /* 0 : disable delayed mode for SLSO 0 */
147 //globalcon.B.STROBE = 0; /* (STROBE+1) : strobe delay for SLSO 0 in Tq */
148 //globalcon.B.SRF = 0; /* 0 : disable stop-on-RXFIFO full feature */
149 //globalcon.B.STIP = 0; /* 0 : MRST = 0 when QSPI is deselected in slave mode */
150 //globalcon.B.EN = 0; /* 0 : PAUSE requested, 1 : RUN requested */
151 globalcon.B.MS = IfxQspi_Mode_master; /* select master mode during configuration - we will switch to slave mode at the end of this function */
152 globalcon.B.AREN = (config->pauseOnBaudrateSpikeErrors != FALSE) ? 1U : 0U;
153 globalcon.B.RESETS = 1; /* Reset SM and FIFOs */
154 globalcon.B.CLKSEL = 1;
155 qspiSFR->GLOBALCON.U = globalcon.U;
156 }
157
158 { /* Configure interrupt requests */
159 Ifx_QSPI_GLOBALCON1 globalcon1;
160 globalcon1.U = 0;
161 globalcon1.B.ERRORENS = (config->base.erPriority > 0) ? IFXQSPI_ERRORENABLEMASK : 0;
162 globalcon1.B.TXEN = (config->base.txPriority > 0) || (config->dma.useDma);
163 globalcon1.B.RXEN = (config->base.rxPriority > 0) || (config->dma.useDma);
164 globalcon1.B.TXFIFOINT = config->txFifoThreshold;
165 globalcon1.B.RXFIFOINT = config->rxFifoThreshold;
166 globalcon1.B.TXFM = config->txFifoMode;
167 globalcon1.B.RXFM = config->rxFifoMode;
168
169 qspiSFR->GLOBALCON1.U = globalcon1.U;
170 }
171
172 handle->qspi = qspiSFR;
173 handle->base.driver = handle;
174 handle->base.sending = 0U;
175 handle->base.activeChannel = NULL_PTR;
176
177 /* Protocol Configuration */
178 {
179 IfxQspi_SpiSlave_Protocol *protocol = (IfxQspi_SpiSlave_Protocol *)&config->protocol;
180
181 SpiIf_ChConfig chConfig;
182 SpiIf_initChannelConfig(&chConfig, NULL_PTR);
183 chConfig.mode.clockPolarity = protocol->clockPolarity;
184 chConfig.mode.shiftClock = protocol->shiftClock;
185 chConfig.mode.dataHeading = protocol->dataHeading;
186 chConfig.mode.dataWidth = protocol->dataWidth;
187 chConfig.mode.parityMode = protocol->parityMode;
188
189 {
190 Ifx_QSPI_BACON bacon;
191 uint8 cs = 0; // not relevant for slave
192
193 qspiSFR->ECON[cs].U = IfxQspi_calculateExtendedConfigurationValue(qspiSFR, cs, &chConfig);
194 bacon.U = IfxQspi_calculateBasicConfigurationValue(qspiSFR, IfxQspi_ChannelId_0, &chConfig.mode, config->base.maximumBaudrate);
195 IfxQspi_writeBasicConfigurationBeginStream(qspiSFR, bacon.U);
196 }
197 handle->dataWidth = protocol->dataWidth;
198 }
199
200 handle->rxJob.data = NULL_PTR;
201 handle->rxJob.remaining = 0;
202 handle->txJob.data = NULL_PTR;
203 handle->txJob.remaining = 0;
204 handle->onTransfer = FALSE;
205
206 /* Configure I/O pins for slave mode */
207 const IfxQspi_SpiSlave_Pins *pins = config->pins;
208
209 if (pins != NULL_PTR)
210 {
211 const IfxQspi_Sclk_In *sclkIn = pins->sclk;
212
213 if (sclkIn != NULL_PTR)
214 {
215 IfxQspi_initSclkInPinWithPadLevel(sclkIn, pins->sclkMode, pins->pinDriver);
216 }
217
218 const IfxQspi_Mtsr_In *mtsrIn = pins->mtsr;
219
220 if (mtsrIn != NULL_PTR)
221 {
222 IfxQspi_initMtsrInPinWithPadLevel(mtsrIn, pins->mtsrMode, pins->pinDriver);
223 }
224
225 const IfxQspi_Mrst_Out *mrstOut = pins->mrst;
226
227 if (mrstOut != NULL_PTR)
228 {
229 IfxQspi_initMrstOutPin(mrstOut, pins->mrstMode, pins->pinDriver);
230 }
231
232 const IfxQspi_Slsi_In *slsiIn = pins->slsi;
233
234 if (slsiIn != NULL_PTR)
235 {
236 IfxQspi_initSlsiWithPadLevel(slsiIn, pins->slsiMode, pins->pinDriver);
237 }
238 }
239
240 if (config->dma.useDma)
241 {
242 IfxDma_Dma dma;
243 IfxDma_Dma_createModuleHandle(&dma, dmaSFR);
244
245 IfxDma_Dma_ChannelConfig dmaCfg;
246 IfxDma_Dma_initChannelConfig(&dmaCfg, &dma);
247 handle->dma.useDma = TRUE;
248 {
249 handle->dma.txDmaChannelId = config->dma.txDmaChannelId;
250 dmaCfg.channelId = handle->dma.txDmaChannelId;
251 dmaCfg.hardwareRequestEnabled = FALSE; // will be triggered from qspi service request
252 dmaCfg.channelInterruptEnabled = TRUE; // trigger interrupt after transaction
253
254 // source address and transfer count will be configured during runtime
255 dmaCfg.sourceAddress = 0;
256 dmaCfg.sourceAddressCircularRange = IfxDma_ChannelIncrementCircular_none;
257 dmaCfg.sourceCircularBufferEnabled = FALSE;
258 dmaCfg.transferCount = 0;
259 dmaCfg.moveSize = IfxDma_ChannelMoveSize_8bit;
260
261 // destination address is fixed; use circular mode to stay at this address for each move
262 dmaCfg.destinationAddress = (uint32)&qspiSFR->DATAENTRY[0].U;
263 dmaCfg.destinationAddressCircularRange = IfxDma_ChannelIncrementCircular_none;
264 dmaCfg.destinationCircularBufferEnabled = TRUE;
265
266 dmaCfg.requestMode = IfxDma_ChannelRequestMode_oneTransferPerRequest;
267 dmaCfg.operationMode = IfxDma_ChannelOperationMode_single;
268 dmaCfg.blockMode = IfxDma_ChannelMove_1;
269
270 IfxDma_Dma_initChannel(&handle->dma.txDmaChannel, &dmaCfg);
271 }
272
273 {
274 handle->dma.rxDmaChannelId = config->dma.rxDmaChannelId;
275 dmaCfg.channelId = handle->dma.rxDmaChannelId;
276 dmaCfg.hardwareRequestEnabled = FALSE; // will be triggered from qspi service request
277 dmaCfg.channelInterruptEnabled = TRUE; // trigger interrupt after transaction
278
279 // source address is fixed; use circular mode to stay at this address for each move
280 dmaCfg.sourceAddress = (uint32)&qspiSFR->RXEXIT.U;
281 dmaCfg.sourceAddressCircularRange = IfxDma_ChannelIncrementCircular_none;
282 dmaCfg.sourceCircularBufferEnabled = TRUE;
283
284 // destination address and transfer count will be configured during runtime
285 dmaCfg.destinationAddress = 0;
286 dmaCfg.destinationAddressCircularRange = IfxDma_ChannelIncrementCircular_none;
287 dmaCfg.destinationCircularBufferEnabled = FALSE;
288 dmaCfg.transferCount = 0;
289
290 dmaCfg.requestMode = IfxDma_ChannelRequestMode_oneTransferPerRequest;
291 dmaCfg.operationMode = IfxDma_ChannelOperationMode_single;
292 dmaCfg.moveSize = IfxDma_ChannelMoveSize_8bit;
293 dmaCfg.blockMode = IfxDma_ChannelMove_1;
294
295 IfxDma_Dma_initChannel(&handle->dma.rxDmaChannel, &dmaCfg);
296 }
297 /* Dma channel interrupt configuration */
298 {
299 volatile Ifx_SRC_SRCR *src = IfxDma_getSrcPointer(dmaSFR, (IfxDma_ChannelId)config->dma.txDmaChannelId);
300 IfxSrc_init(src, config->base.isrProvider, config->base.txPriority);
301 IfxSrc_enable(src);
302
303 src = IfxDma_getSrcPointer(dmaSFR, (IfxDma_ChannelId)config->dma.rxDmaChannelId);
304 IfxSrc_init(src, config->base.isrProvider, config->base.rxPriority);
305 IfxSrc_enable(src);
306 }
307 }
308
309 /* interrupt configuration */
310 {
311 IfxQspi_clearAllEventFlags(qspiSFR);
312
313 if (handle->dma.useDma)
314 {
315 volatile Ifx_SRC_SRCR *src = IfxQspi_getTransmitSrc(qspiSFR);
316 IfxSrc_init(src, IfxSrc_Tos_dma, (Ifx_Priority)config->dma.txDmaChannelId);
317 IfxSrc_enable(src);
318
319 src = IfxQspi_getReceiveSrc(qspiSFR);
320 IfxSrc_init(src, IfxSrc_Tos_dma, (Ifx_Priority)config->dma.rxDmaChannelId);
321 IfxSrc_enable(src);
322 }
323 else
324 {
325 if (config->base.txPriority != 0)
326 {
327 volatile Ifx_SRC_SRCR *src = IfxQspi_getTransmitSrc(qspiSFR);
328 IfxSrc_init(src, config->base.isrProvider, config->base.txPriority);
329 IfxSrc_enable(src);
330 }
331
332 if (config->base.rxPriority != 0)
333 {
334 volatile Ifx_SRC_SRCR *src = IfxQspi_getReceiveSrc(qspiSFR);
335 IfxSrc_init(src, config->base.isrProvider, config->base.rxPriority);
336 IfxSrc_enable(src);
337 }
338
339 if (config->base.erPriority != 0)
340 {
341 volatile Ifx_SRC_SRCR *src = IfxQspi_getErrorSrc(qspiSFR);
342 IfxSrc_init(src, config->base.isrProvider, config->base.erPriority);
343 IfxSrc_enable(src);
344 }
345 }
346 }
347 /* finally switch to slave mode */
348 qspiSFR->GLOBALCON.B.MS = IfxQspi_Mode_slave;
349 IfxQspi_run(qspiSFR);
350 }
351
352
353 void IfxQspi_SpiSlave_initModuleConfig(IfxQspi_SpiSlave_Config *config, Ifx_QSPI *qspi)
354 {
355 const IfxQspi_SpiSlave_Protocol defaultProtocol = {
356 .clockPolarity = SpiIf_ClockPolarity_idleLow,
357 .shiftClock = SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge,
358 .dataHeading = SpiIf_DataHeading_msbFirst,
359 .dataWidth = 8,
360 .parityMode = Ifx_ParityMode_even
361 };
362
363 SpiIf_initConfig(&config->base);
364
365 config->qspi = qspi;
366 config->allowSleepMode = FALSE;
367 config->pauseOnBaudrateSpikeErrors = FALSE,
368 config->pauseRunTransition = IfxQspi_PauseRunTransition_pause;
369 config->txFifoThreshold = IfxQspi_TxFifoInt_1;
370 config->rxFifoThreshold = IfxQspi_RxFifoInt_0;
371 config->txFifoMode = IfxQspi_FifoMode_combinedMove;
372 config->rxFifoMode = IfxQspi_FifoMode_combinedMove;
373 config->pins = NULL_PTR;
374 config->protocol = defaultProtocol;
375
376 config->dma.rxDmaChannelId = IfxDma_ChannelId_none;
377 config->dma.txDmaChannelId = IfxDma_ChannelId_none;
378 config->dma.useDma = FALSE;
379 }
380
381
382 void IfxQspi_SpiSlave_isrDmaReceive(IfxQspi_SpiSlave *qspiHandle)
383 {
384 Ifx_DMA *dmaSFR = &MODULE_DMA;
385 IfxDma_ChannelId rxDmaChannelId = qspiHandle->dma.rxDmaChannelId;
386
387 if (IfxDma_getAndClearChannelInterrupt(dmaSFR, rxDmaChannelId))
388 {
389 qspiHandle->onTransfer = FALSE;
390 }
391
392 IfxDma_getAndClearChannelPatternDetectionInterrupt(dmaSFR, rxDmaChannelId);
393 }
394
395
396 void IfxQspi_SpiSlave_isrDmaTransmit(IfxQspi_SpiSlave *qspiHandle)
397 {
398 Ifx_DMA *dmaSFR = &MODULE_DMA;
399 IfxDma_ChannelId txDmaChannelId = qspiHandle->dma.txDmaChannelId;
400 // TODO
401 IfxDma_getAndClearChannelPatternDetectionInterrupt(dmaSFR, txDmaChannelId);
402 IfxDma_getAndClearChannelInterrupt(dmaSFR, txDmaChannelId);
403 }
404
405
406 void IfxQspi_SpiSlave_isrError(IfxQspi_SpiSlave *handle)
407 {
408 Ifx_QSPI *qspiSFR = handle->qspi;
409 uint16 errorFlags = IfxQspi_getErrorFlags(qspiSFR);
410 IfxQspi_clearAllEventFlags(qspiSFR);
411 Ifx_DMA *dmaSFR = &MODULE_DMA;
412
413 /* store all the flags in the variable */
414
415 if ((errorFlags & IfxQspi_Error_parity))
416 {
417 handle->errorFlags.parityError = 1;
418 }
419
420 if ((errorFlags & IfxQspi_Error_configuration))
421 {
422 handle->errorFlags.configurationError = 1;
423 }
424
425 if ((errorFlags & IfxQspi_Error_baudrate))
426 {
427 handle->errorFlags.baudrateError = 1;
428 }
429
430 if ((errorFlags & IfxQspi_Error_expectTimeout))
431 {
432 handle->errorFlags.expectTimeoutError = 1;
433 }
434
435 if ((errorFlags & IfxQspi_Error_txfifoOverflow))
436 {
437 handle->errorFlags.txFifoOverflowError = 1;
438 }
439
440 if ((errorFlags & IfxQspi_Error_txfifoUnderflow))
441 {
442 handle->errorFlags.txFifoUnderflowError = 1;
443 }
444
445 if ((errorFlags & IfxQspi_Error_rxfifoOverflow))
446 {
447 handle->errorFlags.rxFifoOverflowError = 1;
448 }
449
450 if ((errorFlags & IfxQspi_Error_rxfifoUnderflow))
451 {
452 handle->errorFlags.rxFifoUnderflowError = 1;
453 }
454
455 if ((errorFlags & IfxQspi_Error_slsiMisplacedInactivation))
456 {
457 handle->errorFlags.slsiMisplacedInactivation = 1;
458 }
459
460 if (errorFlags)
461 {
462 handle->onTransfer = FALSE;
463 }
464
465 if (handle->dma.useDma)
466 {
467 IfxDma_getAndClearChannelInterrupt(dmaSFR, handle->dma.rxDmaChannelId);
468 IfxDma_getAndClearChannelInterrupt(dmaSFR, handle->dma.txDmaChannelId);
469 }
470 }
471
472
473 void IfxQspi_SpiSlave_isrReceive(IfxQspi_SpiSlave *handle)
474 {
475 IfxQspi_SpiSlave_read(handle);
476 }
477
478
479 void IfxQspi_SpiSlave_isrTransmit(IfxQspi_SpiSlave *handle)
480 {
481 IfxQspi_SpiSlave_write(handle);
482 }
483
484
485 IFX_STATIC void IfxQspi_SpiSlave_read(IfxQspi_SpiSlave *handle)
486 {
487 Ifx_QSPI *qspiSFR = handle->qspi;
488 SpiIf_Job *job = &handle->rxJob;
489 Ifx_SizeT count = (Ifx_SizeT)IfxQspi_getReceiveFifoLevel(qspiSFR);
490 count = __min(job->remaining, count);
491
492 if (job->data == NULL_PTR)
493 {
494 // no data should be buffered: do dummy reads
495 int i;
496
497 for (i = 0; i < count; ++i)
498 {
499 IfxQspi_readReceiveFifo(qspiSFR);
500 }
501 }
502 else
503 {
504 if (handle->dataWidth <= 8)
505 {
506 IfxQspi_read8(qspiSFR, job->data, count);
507 job->data = &(((uint8 *)job->data)[count]);
508 }
509 else if (handle->dataWidth <= 16)
510 {
511 IfxQspi_read16(qspiSFR, job->data, count);
512 job->data = &(((uint16 *)job->data)[count]);
513 }
514 else
515 {
516 IfxQspi_read32(qspiSFR, job->data, count);
517 job->data = &(((uint32 *)job->data)[count]);
518 }
519 }
520
521 job->remaining = job->remaining - count;
522
523 if (job->remaining == 0)
524 {
525 handle->onTransfer = FALSE;
526 }
527 }
528
529
530 IFX_STATIC void IfxQspi_SpiSlave_write(IfxQspi_SpiSlave *handle)
531 {
532 SpiIf_Job *job = &handle->txJob;
533
534 if (handle->dma.useDma)
535 {
536 Ifx_DMA *dmaSFR = &MODULE_DMA;
537 SpiIf_Job *jobrx = &handle->rxJob;
538
539 Ifx_QSPI *qspiSFR = handle->qspi;
540 volatile Ifx_SRC_SRCR *src = IfxQspi_getTransmitSrc(qspiSFR);
541
542 IfxDma_ChannelId txDmaChannelId = handle->dma.txDmaChannelId;
543 IfxDma_ChannelId rxDmaChannelId = handle->dma.rxDmaChannelId;
544
545 boolean interruptState = IfxCpu_disableInterrupts();
546 IfxDma_setChannelTransferCount(dmaSFR, txDmaChannelId, job->remaining);
547
548 if (handle->dataWidth <= 8)
549 {
550 IfxDma_setChannelMoveSize(dmaSFR, txDmaChannelId, IfxDma_ChannelMoveSize_8bit);
551 }
552 else if (handle->dataWidth <= 16)
553 {
554 IfxDma_setChannelMoveSize(dmaSFR, txDmaChannelId, IfxDma_ChannelMoveSize_16bit);
555 }
556 else
557 {
558 IfxDma_setChannelMoveSize(dmaSFR, txDmaChannelId, IfxDma_ChannelMoveSize_32bit);
559 }
560
561 if (job->data == NULL_PTR)
562 {
563 IfxDma_setChannelSourceAddress(dmaSFR, txDmaChannelId, (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &IfxQspi_SpiSlave_dummyTxValue));
564 IfxDma_setChannelSourceIncrementStep(dmaSFR, txDmaChannelId, IfxDma_ChannelIncrementStep_1,
565 IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_4);
566 }
567 else
568 {
569 IfxDma_setChannelSourceAddress(dmaSFR, txDmaChannelId, (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), job->data));
570 IfxDma_setChannelSourceIncrementStep(dmaSFR, txDmaChannelId, IfxDma_ChannelIncrementStep_1,
571 IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_none);
572 }
573
574 IfxDma_clearChannelInterrupt(dmaSFR, txDmaChannelId);
575
576 /* Receive config */
577 IfxDma_setChannelTransferCount(dmaSFR, rxDmaChannelId, job->remaining);
578
579 if (handle->dataWidth <= 8)
580 {
581 IfxDma_setChannelMoveSize(dmaSFR, rxDmaChannelId, IfxDma_ChannelMoveSize_8bit);
582 }
583 else if (handle->dataWidth <= 16)
584 {
585 IfxDma_setChannelMoveSize(dmaSFR, rxDmaChannelId, IfxDma_ChannelMoveSize_16bit);
586 }
587 else
588 {
589 IfxDma_setChannelMoveSize(dmaSFR, rxDmaChannelId, IfxDma_ChannelMoveSize_32bit);
590 }
591
592 if (jobrx->data == NULL_PTR)
593 {
594 IfxDma_setChannelDestinationAddress(dmaSFR, rxDmaChannelId, (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &IfxQspi_SpiSlave_dummyRxValue));
595 IfxDma_setChannelDestinationIncrementStep(dmaSFR, rxDmaChannelId, IfxDma_ChannelIncrementStep_1,
596 IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_4);
597 }
598 else
599 {
600 IfxDma_setChannelDestinationAddress(dmaSFR, rxDmaChannelId, (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), jobrx->data));
601 IfxDma_setChannelDestinationIncrementStep(dmaSFR, rxDmaChannelId, IfxDma_ChannelIncrementStep_1,
602 IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_none);
603 }
604
605 IfxDma_clearChannelInterrupt(dmaSFR, rxDmaChannelId);
606 IfxQspi_clearAllEventFlags(qspiSFR);
607 src = IfxQspi_getTransmitSrc(qspiSFR);
608 IfxSrc_clearRequest(src);
609 src = IfxQspi_getReceiveSrc(qspiSFR);
610 IfxSrc_clearRequest(src);
611 src = IfxQspi_getErrorSrc(qspiSFR);
612 IfxSrc_clearRequest(src);
613
614 IfxDma_clearChannelInterrupt(dmaSFR, rxDmaChannelId);
615 IfxDma_clearChannelInterrupt(dmaSFR, txDmaChannelId);
616 IfxDma_setChannelInterruptServiceRequest(dmaSFR, txDmaChannelId);
617 IfxDma_setChannelInterruptServiceRequest(dmaSFR, rxDmaChannelId);
618 IfxDma_enableChannelTransaction(dmaSFR, rxDmaChannelId);
619 IfxDma_enableChannelTransaction(dmaSFR, txDmaChannelId);
620 IfxDma_startChannelTransaction(dmaSFR, txDmaChannelId);
621
622 IfxCpu_restoreInterrupts(interruptState);
623 }
624 else
625 {
626 IfxQspi_ChannelId cs = IfxQspi_ChannelId_0;
627
628 if (job->remaining > 0)
629 {
630 Ifx_QSPI *qspiSFR = handle->qspi;
631 boolean interruptState = IfxCpu_disableInterrupts();
632 Ifx_SizeT count = (Ifx_SizeT)(IFXQSPI_HWFIFO_DEPTH - 1 - IfxQspi_getTransmitFifoLevel(qspiSFR)); // -1, since BACON allocates one FIFO entry
633 count = __min(job->remaining, count);
634
635 if (count > 0)
636 {
637 job->remaining = job->remaining - count;
638
639 if (job->data == NULL_PTR)
640 {
641 // no data should be sent (only received): send all
642 int i;
643
644 for (i = 0; i < count; ++i)
645 {
646 IfxQspi_writeTransmitFifo(qspiSFR, ~0);
647 }
648 }
649 else
650 {
651 if (handle->dataWidth <= 8)
652 {
653 IfxQspi_write8(qspiSFR, cs, job->data, count);
654 job->data = &(((uint8 *)job->data)[count]);
655 }
656 else if (handle->dataWidth <= 16)
657 {
658 IfxQspi_write16(qspiSFR, cs, job->data, count);
659 job->data = &(((uint16 *)job->data)[count]);
660 }
661 else
662 {
663 IfxQspi_write32(qspiSFR, cs, job->data, count);
664 job->data = &(((uint32 *)job->data)[count]);
665 }
666 }
667 }
668
669 IfxCpu_restoreInterrupts(interruptState);
670 }
671 }
672 }
IfxQspi_SpiSlave_Pins::mrstMode
IfxPort_OutputMode mrstMode
The MRST pin output mode.
Definition: IfxQspi_SpiSlave.h:361
IfxQspi_Mrst_Out
MRST pin mapping structure.
Definition: IfxQspi_PinMap.h:96
IfxQspi_SpiSlave_Protocol::dataHeading
SpiIf_DataHeading dataHeading
Specifies MSB or LSB first.
Definition: IfxQspi_SpiSlave.h:373
IfxQspi_Slsi_In
SLSI pin mapping structure.
Definition: IfxQspi_PinMap.h:80
IfxDma_ChannelId
IfxDma_ChannelId
DMA channel resources definition.
Definition: IfxDma_cfg.h:102
IfxQspi_Error_txfifoOverflow
TX FIFO Overflow Error.
Definition: IfxQspi.h:129
IfxQspi_SpiSlave_Config::base
SpiIf_Config base
SPI interface configuration structure.
Definition: IfxQspi_SpiSlave.h:400
IfxQspi_SpiSlave_ErrorFlags::rxFifoOverflowError
uint16 rxFifoOverflowError
[5:5] RxFifo Overflow Error
Definition: IfxQspi_SpiSlave.h:346
IfxQspi_initMtsrInPinWithPadLevel
IFX_INLINE void IfxQspi_initMtsrInPinWithPadLevel(const IfxQspi_Mtsr_In *mtsrIn, IfxPort_InputMode mtsrInMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of MTSRIN pin direction as input and configuring pad driver...
Definition: IfxQspi.h:1384
IfxQspi_SpiSlave_Config::rxFifoThreshold
IfxQspi_RxFifoInt rxFifoThreshold
Specifies the RXFIFO interrupt threshold.
Definition: IfxQspi_SpiSlave.h:406
IfxQspi_SpiSlave_Config::pauseOnBaudrateSpikeErrors
boolean pauseOnBaudrateSpikeErrors
Specifies module pause on baudrate or spike errors.
Definition: IfxQspi_SpiSlave.h:403
IfxDma_Dma_ChannelConfig::moveSize
IfxDma_ChannelMoveSize moveSize
Read/write data size.
Definition: IfxDma_Dma.h:493
IfxQspi_Error_rxfifoUnderflow
RX FIFO Underflow Error.
Definition: IfxQspi.h:132
IfxDma_Dma_ChannelConfig::sourceAddressCircularRange
IfxDma_ChannelIncrementCircular sourceAddressCircularRange
Determines which part of the source address remains unchanged and therby not updated after each move...
Definition: IfxDma_Dma.h:500
IfxDma_Dma_ChannelConfig::channelId
IfxDma_ChannelId channelId
Specifies the channel being used.
Definition: IfxDma_Dma.h:483
IfxQspi_read8
void IfxQspi_read8(Ifx_QSPI *qspi, uint8 *data, Ifx_SizeT count)
Reads 8bit data from the Rx FIFO.
Definition: IfxQspi.c:337
IfxQspi_SpiSlave_Config::pauseRunTransition
IfxQspi_PauseRunTransition pauseRunTransition
Specifies module run or pause mode.
Definition: IfxQspi_SpiSlave.h:404
IfxQspi_Error_baudrate
BaudRate Error.
Definition: IfxQspi.h:128
IfxQspi_SpiSlave_Pins::sclkMode
IfxPort_InputMode sclkMode
The SCLK pin input mode.
Definition: IfxQspi_SpiSlave.h:357
IfxQspi_read16
void IfxQspi_read16(Ifx_QSPI *qspi, uint16 *data, Ifx_SizeT count)
Reads 16bit data from the Rx FIFO.
Definition: IfxQspi.c:313
IfxQspi_ExpectTimeout_2097152
Expect phse time out 2097152.
Definition: IfxQspi.h:156
IFXQSPI_HWFIFO_DEPTH
#define IFXQSPI_HWFIFO_DEPTH
Definition: IfxQspi_cfg.h:67
SpiIf_ChConfig_
Definition: SpiIf.h:225
IfxQspi_Error_parity
Parity Error.
Definition: IfxQspi.h:126
IfxQspi_getErrorFlags
IFX_INLINE uint16 IfxQspi_getErrorFlags(Ifx_QSPI *qspi)
Definition: IfxQspi.h:1028
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:100
IfxDma_setChannelSourceAddress
IFX_INLINE void IfxDma_setChannelSourceAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId, const void *address)
Configure the source address.
Definition: IfxDma.h:1656
IfxQspi_SpiSlave_Pins::pinDriver
IfxPort_PadDriver pinDriver
The pad driver mode which should be configured.
Definition: IfxQspi_SpiSlave.h:364
IfxQspi_TxFifoInt_1
TxFifo Interrupt Threshold #1.
Definition: IfxQspi.h:276
IfxDma_Dma_initChannelConfig
void IfxDma_Dma_initChannelConfig(IfxDma_Dma_ChannelConfig *config, IfxDma_Dma *dma)
initialize the DMA module channel configuration
Definition: IfxDma_Dma.c:182
IfxQspi_Sclk_In
SCLK pin mapping structure.
Definition: IfxQspi_PinMap.h:72
SpiIf_::driver
pvoid driver
Spi specific driver.
Definition: SpiIf.h:152
IfxDma_ChannelMoveSize_16bit
1 DMA move is 16 bit wide
Definition: IfxDma.h:175
IfxQspi_SpiSlave_getStatus
SpiIf_Status IfxQspi_SpiSlave_getStatus(IfxQspi_SpiSlave *handle)
Gets the transmission status.
Definition: IfxQspi_SpiSlave.c:113
IfxQspi_SpiSlave_initModule
void IfxQspi_SpiSlave_initModule(IfxQspi_SpiSlave *handle, const IfxQspi_SpiSlave_Config *config)
Initialises the module.
Definition: IfxQspi_SpiSlave.c:126
IfxDma_ChannelMoveSize_8bit
1 DMA move is 8 bit wide
Definition: IfxDma.h:174
IfxDma_Dma_ChannelConfig::sourceAddress
uint32 sourceAddress
Source address for the DMA channel.
Definition: IfxDma_Dma.h:484
SpiIf_::activeChannel
SpiIf_Ch * activeChannel
Channel actually transmitting / receiving.
Definition: SpiIf.h:154
IfxQspi_SpiSlave_Config::qspi
Ifx_QSPI * qspi
Pointer to QSPI module registers.
Definition: IfxQspi_SpiSlave.h:401
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxQspi_write16
void IfxQspi_write16(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint16 *data, Ifx_SizeT count)
Writes 16bit data into the Tx FIFO.
Definition: IfxQspi.c:412
IfxQspi_Error_rxfifoOverflow
RX FIFO Overflow Error.
Definition: IfxQspi.h:131
Ifx_ParityMode_even
Definition: Ifx_Types.h:121
IfxDma_Dma_ChannelConfig::blockMode
IfxDma_ChannelMove blockMode
Number of moves in a transfer.
Definition: IfxDma_Dma.h:490
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
IfxDma_setChannelDestinationIncrementStep
IFX_INLINE void IfxDma_setChannelDestinationIncrementStep(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size)
Configure a DMA channel destination pointer.
Definition: IfxDma.h:1603
IfxDma_Dma_ChannelConfig::sourceCircularBufferEnabled
boolean sourceCircularBufferEnabled
Enables/Disables the source circular buffering.
Definition: IfxDma_Dma.h:505
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
IfxQspi_writeBasicConfigurationBeginStream
IFX_INLINE void IfxQspi_writeBasicConfigurationBeginStream(Ifx_QSPI *qspi, uint32 baconVal)
Write configuration into BACON register with .LAST flag set to 0.
Definition: IfxQspi.h:1314
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxDma_enableChannelTransaction
IFX_INLINE void IfxDma_enableChannelTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Enable a DMA channel hardware transaction request.
Definition: IfxDma.h:1351
IfxDma_startChannelTransaction
IFX_INLINE void IfxDma_startChannelTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Request a DMA channel transaction.
Definition: IfxDma.h:1694
IfxDma_Dma_ChannelConfig::destinationCircularBufferEnabled
boolean destinationCircularBufferEnabled
Enables/Disables the destination circular buffering.
Definition: IfxDma_Dma.h:506
IfxQspi_SpiSlave_Pins::slsiMode
IfxPort_InputMode slsiMode
The SLSI pin input mode.
Definition: IfxQspi_SpiSlave.h:363
IfxQspi_FifoMode_combinedMove
Combined Move Mode.
Definition: IfxQspi.h:288
IfxQspi_SpiSlave_exchange
SpiIf_Status IfxQspi_SpiSlave_exchange(IfxQspi_SpiSlave *handle, const void *src, void *dest, Ifx_SizeT count)
Exchanges data between source and data.
Definition: IfxQspi_SpiSlave.c:92
IfxDma_Dma_ChannelConfig::hardwareRequestEnabled
boolean hardwareRequestEnabled
Enabling channel transaction via hardware request.
Definition: IfxDma_Dma.h:497
IfxCpu_restoreInterrupts
IFX_INLINE void IfxCpu_restoreInterrupts(boolean enabled)
API to restore global interrupt with that of the passed parameter.
Definition: IfxCpu.h:1026
IfxDma_setChannelSourceIncrementStep
IFX_INLINE void IfxDma_setChannelSourceIncrementStep(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size)
Configure a DMA channel source pointer.
Definition: IfxDma.h:1662
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxQspi_SpiSlave_ErrorFlags::txFifoOverflowError
uint16 txFifoOverflowError
[3:3] TxFifo Overflow Error
Definition: IfxQspi_SpiSlave.h:344
IfxQspi_run
IFX_INLINE void IfxQspi_run(Ifx_QSPI *qspi)
Request for QSPI in Run state.
Definition: IfxQspi.h:1196
IfxQspi_setSleepMode
IFX_INLINE void IfxQspi_setSleepMode(Ifx_QSPI *qspi, IfxQspi_SleepMode mode)
Sets the disable module request.
Definition: IfxQspi.h:1277
IfxQspi_calculateExtendedConfigurationValue
uint32 IfxQspi_calculateExtendedConfigurationValue(Ifx_QSPI *qspi, const uint8 cs, const SpiIf_ChConfig *chConfig)
Function to calculate ECON register values.
Definition: IfxQspi.c:96
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxQspi_SpiSlave_isrDmaReceive
void IfxQspi_SpiSlave_isrDmaReceive(IfxQspi_SpiSlave *qspiHandle)
Dma receive interrupt handler.
Definition: IfxQspi_SpiSlave.c:382
IfxDma_getAndClearChannelInterrupt
IFX_INLINE boolean IfxDma_getAndClearChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return and clear a channel transfer interrupt flag The flag is automatically cleared with the call to...
Definition: IfxDma.h:1389
IfxQspi_SpiSlave_Dma::rxDmaChannelId
IfxDma_ChannelId rxDmaChannelId
DMA channel no for the Spi recieve.
Definition: IfxQspi_SpiSlave.h:323
IfxQspi_SpiSlave_isrError
void IfxQspi_SpiSlave_isrError(IfxQspi_SpiSlave *handle)
Error Interrupt handler.
Definition: IfxQspi_SpiSlave.c:406
IfxQspi_setEnableModuleRequest
IFX_INLINE void IfxQspi_setEnableModuleRequest(Ifx_QSPI *qspi)
Sets the enable module request.
Definition: IfxQspi.h:1229
IfxQspi_SpiSlave_Pins
Slave pin IO configuration structure.
Definition: IfxQspi_SpiSlave.h:354
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxQspi_calculateBasicConfigurationValue
uint32 IfxQspi_calculateBasicConfigurationValue(Ifx_QSPI *qspi, const IfxQspi_ChannelId channelId, const SpiIf_ChMode *chMode, const float baudrate)
Function to calculate BACON register values.
Definition: IfxQspi.c:67
IfxQspi_readReceiveFifo
IFX_INLINE uint32 IfxQspi_readReceiveFifo(Ifx_QSPI *qspi)
Read the oldest data from RXFIFO.
Definition: IfxQspi.h:1184
SpiIf_DataHeading_msbFirst
Definition: SpiIf.h:90
IfxDma_getSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxDma_getSrcPointer(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns the SRC pointer for given DMA channel.
Definition: IfxDma.h:1541
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxQspi_SpiSlave_Dma::txDmaChannel
IfxDma_Dma_Channel txDmaChannel
transmit DMA channel handle
Definition: IfxQspi_SpiSlave.h:322
IfxQspi_SpiSlave
Module handle data structure.
Definition: IfxQspi_SpiSlave.h:384
IfxQspi_SpiSlave_Config::dma
IfxQspi_SpiSlave_DmaConfig dma
Dma configuration.
Definition: IfxQspi_SpiSlave.h:409
IfxQspi_SpiSlave_isrTransmit
void IfxQspi_SpiSlave_isrTransmit(IfxQspi_SpiSlave *handle)
Transmit interrupt handler.
Definition: IfxQspi_SpiSlave.c:479
SpiIf_Status_ok
Definition: SpiIf.h:68
IfxQspi_SpiSlave_dummyRxValue
IFX_STATIC uint32 IfxQspi_SpiSlave_dummyRxValue
dummy variable where recived data is placed
Definition: IfxQspi_SpiSlave.c:80
IfxQspi_ChannelId
IfxQspi_ChannelId
QSPI channel Number (BACON.CS)
Definition: IfxQspi.h:94
SpiIf_Config::maximumBaudrate
float32 maximumBaudrate
Maximum baudrate used by the channels, this value is used to optimise the SPI internal clock...
Definition: SpiIf.h:173
IfxQspi_PauseRunTransition_pause
Request value for pause.
Definition: IfxQspi.h:172
IfxQspi_getTransmitSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxQspi_getTransmitSrc(Ifx_QSPI *qspi)
Gets the TXFIFO service request.
Definition: IfxQspi.h:1092
IfxQspi_SpiSlave_Pins::sclk
IFX_CONST IfxQspi_Sclk_In * sclk
Pointer to SLCK in pin.
Definition: IfxQspi_SpiSlave.h:356
IfxQspi_Mtsr_In
MTSR pin mapping structure.
Definition: IfxQspi_PinMap.h:64
IfxQspi_RxFifoInt_0
RxFifo Interrupt Threshold #0.
Definition: IfxQspi.h:219
IfxCpu_disableInterrupts
IFX_INLINE boolean IfxCpu_disableInterrupts(void)
API to disable global interrupt and return the previous status.
Definition: IfxCpu.h:749
IfxDma_ChannelMove_1
1 DMA move per DMA transfer
Definition: IfxDma.h:159
IfxDma_ChannelMoveSize_32bit
1 DMA move is 32 bit wide
Definition: IfxDma.h:176
IfxDma_Dma_ChannelConfig::transferCount
uint16 transferCount
Number of transfers in a transaction.
Definition: IfxDma_Dma.h:489
IfxQspi_SpiSlave_Config::rxFifoMode
IfxQspi_FifoMode rxFifoMode
Specifies the receive FIFO mode.
Definition: IfxQspi_SpiSlave.h:411
IfxQspi_SpiSlave_Dma::rxDmaChannel
IfxDma_Dma_Channel rxDmaChannel
receive DMA channel handle
Definition: IfxQspi_SpiSlave.h:321
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:50
IfxQspi_SpiSlave_Config::protocol
IfxQspi_SpiSlave_Protocol protocol
Definition: IfxQspi_SpiSlave.h:408
IfxSrc_Tos_dma
DMA interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:69
IfxQspi_getReceiveFifoLevel
IFX_INLINE uint8 IfxQspi_getReceiveFifoLevel(Ifx_QSPI *qspi)
Gets the filling level of RXFIFO.
Definition: IfxQspi.h:1061
IfxDma_ChannelIncrementStep_1
increment by 1 width
Definition: IfxDma.h:135
SpiIf_initChannelConfig
void SpiIf_initChannelConfig(SpiIf_ChConfig *config, SpiIf *driver)
Definition: SpiIf.c:57
IFXCPU_GLB_ADDR_DSPR
#define IFXCPU_GLB_ADDR_DSPR(cpu, address)
Convert local DSPR address to global DSPR address which can be accessed from the SRI bus...
Definition: IfxCpu.h:90
IfxQspi_write32
void IfxQspi_write32(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 *data, Ifx_SizeT count)
Writes 32bit data into the Tx FIFO.
Definition: IfxQspi.c:425
IfxQspi_Error_txfifoUnderflow
TX FIFO Underflow Error.
Definition: IfxQspi.h:130
IfxQspi_SpiSlave_Config::pins
IFX_CONST IfxQspi_SpiSlave_Pins * pins
structure for QSPI Slave pins
Definition: IfxQspi_SpiSlave.h:407
IfxQspi_SpiSlave_Protocol::dataWidth
uint8 dataWidth
range 2 .. 32 bits (note 2 = 2-bits, 3 = 3-bits ...
Definition: IfxQspi_SpiSlave.h:374
IfxQspi_SpiSlave.h
QSPI SPISLAVE details.
IfxDma_ChannelRequestMode_oneTransferPerRequest
a request initiates a single transfer
Definition: IfxDma.h:220
IfxQspi_getReceiveSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxQspi_getReceiveSrc(Ifx_QSPI *qspi)
Gets the RXFIFO service request.
Definition: IfxQspi.h:1067
IfxDma_ChannelIncrementCircular_4
circular buffer size is 4 byte
Definition: IfxDma.h:105
IfxDma_Dma_createModuleHandle
void IfxDma_Dma_createModuleHandle(IfxDma_Dma *dmaHandle, Ifx_DMA *dma)
initializes a DMA module handle based on the current configuration. Can be used in code where it&#39;s en...
Definition: IfxDma_Dma.c:127
SpiIf_Status_busy
Definition: SpiIf.h:69
IfxQspi_SpiSlave::rxJob
SpiIf_Job rxJob
Rx Stream which has been received.
Definition: IfxQspi_SpiSlave.h:389
IfxDma_Dma
DMA base address data structure (Module handle)
Definition: IfxDma_Dma.h:460
IfxQspi_Mode_slave
QSPI in "slave" mode.
Definition: IfxQspi.h:165
IfxQspi_SpiSlave_read
IFX_STATIC void IfxQspi_SpiSlave_read(IfxQspi_SpiSlave *handle)
Reads data from the Rx FIFO.
Definition: IfxQspi_SpiSlave.c:485
IfxQspi_SpiSlave_write
IFX_STATIC void IfxQspi_SpiSlave_write(IfxQspi_SpiSlave *handle)
Writes data into the Tx FIFO.
Definition: IfxQspi_SpiSlave.c:530
IfxQspi_SleepMode_disable
Sleep Mode disabled.
Definition: IfxQspi.h:231
IfxQspi_SpiSlave_Config
Module configuration structure.
Definition: IfxQspi_SpiSlave.h:398
IfxQspi_SpiSlave::onTransfer
boolean onTransfer
set to TRUE during ongoing transfer
Definition: IfxQspi_SpiSlave.h:391
IFXQSPI_ERRORENABLEMASK
#define IFXQSPI_ERRORENABLEMASK
Errors enable mask for ERRORENS.
Definition: IfxQspi.h:84
IfxQspi_SpiSlave_dummyTxValue
IFX_STATIC IFX_CONST uint32 IfxQspi_SpiSlave_dummyTxValue
dummy value to be transmitted
Definition: IfxQspi_SpiSlave.c:84
IfxDma_ChannelOperationMode_single
channel disabled after transaction
Definition: IfxDma.h:187
IfxDma_getAndClearChannelPatternDetectionInterrupt
IFX_INLINE boolean IfxDma_getAndClearChannelPatternDetectionInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns and clears the pattern detection interrupt flag.
Definition: IfxDma.h:1404
SpiIf_initConfig
void SpiIf_initConfig(SpiIf_Config *config)
Definition: SpiIf.c:44
IfxQspi_SpiSlave_Pins::mrst
IFX_CONST IfxQspi_Mrst_Out * mrst
Pointer to MRST out pin.
Definition: IfxQspi_SpiSlave.h:360
IfxQspi_getErrorSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxQspi_getErrorSrc(Ifx_QSPI *qspi)
Gets the Error request value.
Definition: IfxQspi.h:1034
SpiIf_Config::erPriority
Ifx_Priority erPriority
Specifies the priority of the error interrupt.
Definition: SpiIf.h:165
SpiIf_ClockPolarity_idleLow
Definition: SpiIf.h:103
IfxDma_setChannelTransferCount
IFX_INLINE void IfxDma_setChannelTransferCount(Ifx_DMA *dma, IfxDma_ChannelId channelId, uint32 transferCount)
Configure the move count of a DMA channel transaction.
Definition: IfxDma.h:1679
IfxQspi_read32
void IfxQspi_read32(Ifx_QSPI *qspi, uint32 *data, Ifx_SizeT count)
Reads 32bit data from the Rx FIFO.
Definition: IfxQspi.c:325
IfxQspi_SpiSlave_Protocol::parityMode
Ifx_ParityMode parityMode
Specifies the parity mode.
Definition: IfxQspi_SpiSlave.h:375
IfxQspi_SpiSlave_DmaConfig::useDma
boolean useDma
use Dma for Data transfers
Definition: IfxQspi_SpiSlave.h:334
IfxQspi_SpiSlave_ErrorFlags::slsiMisplacedInactivation
uint16 slsiMisplacedInactivation
[8:8] SLSI misplaced inactivation (slave mode)
Definition: IfxQspi_SpiSlave.h:349
IfxDma_Dma_ChannelConfig::operationMode
IfxDma_ChannelOperationMode operationMode
keep enable/disable the hardware channel request after a transaction
Definition: IfxDma_Dma.h:492
SpiIf_Job::remaining
Ifx_SizeT remaining
Definition: SpiIf.h:124
IfxDma_ChannelIncrementDirection_positive
pointer is incremented
Definition: IfxDma.h:127
SpiIf_::sending
uint32 sending
Definition: SpiIf.h:153
IfxSrc_clearRequest
IFX_INLINE void IfxSrc_clearRequest(volatile Ifx_SRC_SRCR *src)
Resets a specific interrupt service by software.
Definition: IfxSrc.h:247
IfxQspi_calculateTimeQuantumLength
uint32 IfxQspi_calculateTimeQuantumLength(Ifx_QSPI *qspi, float maxBaudrate)
Specifies the function to calculate Time quantum length.
Definition: IfxQspi.c:233
uint16
unsigned short uint16
Definition: Platform_Types.h:112
__min
sint32 __min(sint32, sint32) __attribute__((intrinsic_pseudo(3
IfxQspi_SpiSlave_Pins::slsi
IFX_CONST IfxQspi_Slsi_In * slsi
Pointer to SLSI in pin.
Definition: IfxQspi_SpiSlave.h:362
IfxDma_Dma_ChannelConfig
Configuration data structure of the channel.
Definition: IfxDma_Dma.h:480
SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge
Definition: SpiIf.h:96
IfxDma_clearChannelInterrupt
IFX_INLINE void IfxDma_clearChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Clear a channel transfer interrupt flag.
Definition: IfxDma.h:1276
IfxDma_Dma_initChannel
void IfxDma_Dma_initChannel(IfxDma_Dma_Channel *channel, const IfxDma_Dma_ChannelConfig *config)
initialize the DMA channel
Definition: IfxDma_Dma.c:147
IfxQspi_SpiSlave::txJob
SpiIf_Job txJob
Tx Stream which should be sent.
Definition: IfxQspi_SpiSlave.h:390
SpiIf_Config::isrProvider
IfxSrc_Tos isrProvider
Specifies the handler of the interrupts.
Definition: SpiIf.h:166
SpiIf_Job
Definition: SpiIf.h:121
SpiIf_Config::rxPriority
Ifx_Priority rxPriority
Specifies the priority of the receive interrupt.
Definition: SpiIf.h:163
IfxQspi_SpiSlave_ErrorFlags::txFifoUnderflowError
uint16 txFifoUnderflowError
[4:4] TxFifo underflow Error
Definition: IfxQspi_SpiSlave.h:345
IfxQspi_SpiSlave_Protocol::shiftClock
SpiIf_ShiftClock shiftClock
Specifies the clock phase.
Definition: IfxQspi_SpiSlave.h:372
IfxQspi_SpiSlave_ErrorFlags::expectTimeoutError
uint16 expectTimeoutError
[7:7] Expect Timeout Error
Definition: IfxQspi_SpiSlave.h:348
IfxQspi_SpiSlave::base
SpiIf base
Module SPI interface handle.
Definition: IfxQspi_SpiSlave.h:386
IfxDma_setChannelDestinationAddress
IFX_INLINE void IfxDma_setChannelDestinationAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId, void *address)
Configure the destination address.
Definition: IfxDma.h:1597
IfxQspi_clearAllEventFlags
IFX_INLINE void IfxQspi_clearAllEventFlags(Ifx_QSPI *qspi)
Clear ALL service requests.
Definition: IfxQspi.h:960
IfxQspi_SpiSlave::errorFlags
IfxQspi_SpiSlave_ErrorFlags errorFlags
Spi Slave Error Flags.
Definition: IfxQspi_SpiSlave.h:393
IfxQspi_SpiSlave_Config::txFifoMode
IfxQspi_FifoMode txFifoMode
Specifies the transfer FIFO mode.
Definition: IfxQspi_SpiSlave.h:410
IfxQspi_writeTransmitFifo
IFX_INLINE void IfxQspi_writeTransmitFifo(Ifx_QSPI *qspi, uint32 data)
Write Data into DATAENTRY register.
Definition: IfxQspi.h:1347
IfxQspi_SpiSlave_ErrorFlags::configurationError
uint16 configurationError
[1:1] Configuration Error
Definition: IfxQspi_SpiSlave.h:342
IfxDma_setChannelMoveSize
IFX_INLINE void IfxDma_setChannelMoveSize(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelMoveSize moveSize)
Configure a DMA channel move.
Definition: IfxDma.h:1626
IfxQspi_Mode_master
QSPI in "master" mode.
Definition: IfxQspi.h:163
IfxQspi_SpiSlave_ErrorFlags::parityError
uint16 parityError
[0:0] Parity Error
Definition: IfxQspi_SpiSlave.h:341
IfxDma_ChannelId_none
None of the Ifx_DMA Channels.
Definition: IfxDma_cfg.h:104
IfxQspi_initSclkInPinWithPadLevel
IFX_INLINE void IfxQspi_initSclkInPinWithPadLevel(const IfxQspi_Sclk_In *sclkIn, IfxPort_InputMode sclkInMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of SCLKIN pin direction as input and configuring pad driver...
Definition: IfxQspi.h:1392
IfxDma_Dma_ChannelConfig::destinationAddress
uint32 destinationAddress
Destination address for the DMA channel.
Definition: IfxDma_Dma.h:485
IfxQspi_Error_expectTimeout
EXPECT Timeout Error.
Definition: IfxQspi.h:133
IfxQspi_SpiSlave_isrReceive
void IfxQspi_SpiSlave_isrReceive(IfxQspi_SpiSlave *handle)
Receive Interrupt handler.
Definition: IfxQspi_SpiSlave.c:473
IfxQspi_SpiSlave_ErrorFlags::baudrateError
uint16 baudrateError
[2:2] baudrate Error
Definition: IfxQspi_SpiSlave.h:343
IfxCpu_getCoreId
IFX_INLINE IfxCpu_Id IfxCpu_getCoreId(void)
API to get core id of the CPU of the caller. Caution: Core id of the cpu&#39;s may not be continguous and...
Definition: IfxCpu.h:863
IfxQspi_initMrstOutPin
IFX_INLINE void IfxQspi_initMrstOutPin(const IfxQspi_Mrst_Out *mrstOut, IfxPort_OutputMode mrstOutMode, IfxPort_PadDriver padDriver)
Initializes a MRST output.
Definition: IfxQspi.h:1112
IfxDma_Dma_ChannelConfig::requestMode
IfxDma_ChannelRequestMode requestMode
A service request initiates a single transfer, or the complete transaction.
Definition: IfxDma_Dma.h:491
IfxDma_Dma_ChannelConfig::destinationAddressCircularRange
IfxDma_ChannelIncrementCircular destinationAddressCircularRange
Determines which part of the destination address remains unchanged and therby not updated after each ...
Definition: IfxDma_Dma.h:503
IfxQspi_Error_configuration
Configuration Error.
Definition: IfxQspi.h:127
IfxQspi_SpiSlave_Config::txFifoThreshold
IfxQspi_TxFifoInt txFifoThreshold
Specifies the TXFIFO interrupt threshold.
Definition: IfxQspi_SpiSlave.h:405
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxQspi_write8
void IfxQspi_write8(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 *data, Ifx_SizeT count)
Writes 8bit data into the Tx FIFO.
Definition: IfxQspi.c:438
IfxDma_setChannelInterruptServiceRequest
IFX_INLINE void IfxDma_setChannelInterruptServiceRequest(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Setting of channel interrupt service request by software.
Definition: IfxDma.h:1620
IfxQspi_SpiSlave_Dma::txDmaChannelId
IfxDma_ChannelId txDmaChannelId
DMA channel no for the Spi transmit.
Definition: IfxQspi_SpiSlave.h:324
IfxQspi_SpiSlave::dma
IfxQspi_SpiSlave_Dma dma
Dma handle.
Definition: IfxQspi_SpiSlave.h:392
SpiIf_Status
SpiIf_Status
SPI Interface Status.
Definition: SpiIf.h:66
IfxDma_Dma_ChannelConfig::channelInterruptEnabled
boolean channelInterruptEnabled
The channel transfer interrupt should be triggered. See also channelInterruptControl.
Definition: IfxDma_Dma.h:510
IfxQspi_getTransmitFifoLevel
IFX_INLINE uint8 IfxQspi_getTransmitFifoLevel(Ifx_QSPI *qspi)
Gets the filling level of TXFIFO.
Definition: IfxQspi.h:1086
IfxQspi_Error_slsiMisplacedInactivation
SLSI misplaced inactivation (slave mode)
Definition: IfxQspi.h:134
IfxQspi_SpiSlave_Protocol
Configures the SPI Protocol.
Definition: IfxQspi_SpiSlave.h:369
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxQspi_SpiSlave_Pins::mtsr
IFX_CONST IfxQspi_Mtsr_In * mtsr
Pointer to MTSR in pin.
Definition: IfxQspi_SpiSlave.h:358
IfxQspi_SpiSlave_Protocol::clockPolarity
SpiIf_ClockPolarity clockPolarity
Specifies the clock polarity.
Definition: IfxQspi_SpiSlave.h:371
SpiIf_Config::txPriority
Ifx_Priority txPriority
Specifies the priority of the transmit interrupt.
Definition: SpiIf.h:164
IfxQspi_SleepMode_enable
Sleep Mode enabled.
Definition: IfxQspi.h:230
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxQspi_SpiSlave_isrDmaTransmit
void IfxQspi_SpiSlave_isrDmaTransmit(IfxQspi_SpiSlave *qspiHandle)
Transmit interrupt handler.
Definition: IfxQspi_SpiSlave.c:396
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxQspi_SpiSlave_Config::allowSleepMode
boolean allowSleepMode
Specifies module sleep mode.
Definition: IfxQspi_SpiSlave.h:402
IfxQspi_SpiSlave_initModuleConfig
void IfxQspi_SpiSlave_initModuleConfig(IfxQspi_SpiSlave_Config *config, Ifx_QSPI *qspi)
Fills the config structure with default values.
Definition: IfxQspi_SpiSlave.c:353
IfxQspi_initSlsiWithPadLevel
IFX_INLINE void IfxQspi_initSlsiWithPadLevel(const IfxQspi_Slsi_In *slsi, IfxPort_InputMode slsiMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of SLSI pin direction as input and configuring pad driver...
Definition: IfxQspi.h:1400
IfxQspi_SpiSlave_Pins::mtsrMode
IfxPort_InputMode mtsrMode
The MTSR pin input mode.
Definition: IfxQspi_SpiSlave.h:359
SpiIf_Job::data
void * data
Definition: SpiIf.h:123
IfxDma_ChannelIncrementCircular_none
no circular buffer operation
Definition: IfxDma.h:103
IfxQspi_ChannelId_0
Channel #0.
Definition: IfxQspi.h:96
IfxQspi_SpiSlave_ErrorFlags::rxFifoUnderflowError
uint16 rxFifoUnderflowError
[6:6] RxFifo underflow Error
Definition: IfxQspi_SpiSlave.h:347


iLLD_TC38A: IfxQspi_SpiSlave.h Source File

  • Qspi
  • SpiSlave
IfxQspi_SpiSlave.h
Go to the documentation of this file.
1 /**
2 * \file IfxQspi_SpiSlave.h
3 * \brief QSPI SPISLAVE details
4 * \ingroup IfxLld_Qspi
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 *
43 * \defgroup IfxLld_Qspi_SpiSlave_Usage How to use the SPI Slave Interface driver?
44 * \ingroup IfxLld_Qspi
45 *
46 * The SPI Slave interface driver provides a default QSPI configuration for a bidirectional serial communication of data words.
47 *
48 * Data transactions are buffered by the hardware based FIFOs. Incoming and outgoing data is transfered in background from/to the QSPI peripheral by interrupt service handlers, which are part of this driver as well. This allows a nonblocking communication without stalling the thread(s) from where data is sent and received.
49 * Optionally Dma can be used for data transfers. Only the interrupt configuration and Module initialisation are different when dma is used.
50 *
51 * In the following sections it will be described, how to integrate the driver into the application framework.
52 *
53 * \section IfxLld_Qspi_SpiSlave_Preparation Preparation
54 * \subsection IfxLld_Qspi_SpiSlave_Include Include Files
55 *
56 * Include following header file into your C code:
57 * \code
58 * #include <Qspi/SpiSlave/IfxQspi_SpiSlave.h>
59 * \endcode
60 *
61 * \subsection IfxLld_Qspi_SpiSlave_Variables Variables
62 *
63 * Declare QSPI module handle:
64 *
65 * \code
66 * IfxQspi_SpiSlave spi;
67 * \endcode
68 *
69 * In addition, declare global transmit and receive buffers for the data transfers:
70 * \code
71 * #define SPI_BUFFER_SIZE 8
72 * uint8 spiTxBuffer[SPI_BUFFER_SIZE];
73 * uint8 spiRxBuffer[SPI_BUFFER_SIZE];
74 * \endcode
75 *
76 * \subsection IfxLld_Qspi_SpiSlave_Interrupt Interrupt Handler Installation (without dma use)
77 *
78 * See also \ref IfxLld_Cpu_Irq_Usage
79 *
80 * Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:
81 * \code
82 * // priorities are normally defined in Ifx_IntPrioDef.h
83 * #define IFX_INTPRIO_QSPI2_TX 1
84 * #define IFX_INTPRIO_QSPI2_RX 2
85 * #define IFX_INTPRIO_QSPI2_ER 5
86 * \endcode
87 *
88 * Add the interrupt service routines to your C code. They have to call the QSPI interrupt handlers by passing the spi handle:
89 * \code
90 * IFX_INTERRUPT(qspi2TxISR, 0, IFX_INTPRIO_QSPI2_TX)
91 * {
92 * IfxQspi_SpiSlave_isrTransmit(&spi);
93 * }
94 *
95 * IFX_INTERRUPT(qspi2RxISR, 0, IFX_INTPRIO_QSPI2_RX)
96 * {
97 * IfxQspi_SpiSlave_isrReceive(&spi);
98 * }
99 *
100 * IFX_INTERRUPT(qspi2ErISR, 0, IFX_INTPRIO_QSPI2_ER)
101 * {
102 * IfxQspi_SpiSlave_isrError(&spi);
103 * // Process errors. Eg: parity Error is checked below
104 * if( spi.errorFlags.parityError == 1)
105 * {
106 * // Parity Error
107 * }
108 * }
109 * \endcode
110 *
111 * Finally install the interrupt handlers in your initialisation function:
112 * \code
113 * // install interrupt handlers
114 * IfxCpu_Irq_installInterruptHandler(&qspi2TxISR, IFX_INTPRIO_QSPI2_TX);
115 * IfxCpu_Irq_installInterruptHandler(&qspi2RxISR, IFX_INTPRIO_QSPI2_RX);
116 * IfxCpu_Irq_installInterruptHandler(&qspi2ErISR, IFX_INTPRIO_QSPI2_ER);
117 * IfxCpu_enableInterrupts();
118 * \endcode
119 *
120 * \subsection IfxLld_Qspi_SpiSlave_Interrupt_dma Interrupt Handler Installation (with dma use)
121 *
122 * See also \ref IfxLld_Cpu_Irq_Usage
123 *
124 * Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:
125 * \code
126 * // priorities are normally defined in Ifx_IntPrioDef.h
127 * // qspi priorities
128 * #define IFX_INTPRIO_QSPI2_TX 3 // DMA channel 3
129 * #define IFX_INTPRIO_QSPI2_RX 4 // DMA channel 4
130 * #define IFX_INTPRIO_QSPI2_ER 0x31
131 * // dma priorities
132 * #define IFX_INTPRIO_DMA_CH3 12
133 * #define IFX_INTPRIO_DMA_CH4 13
134 * \endcode
135 *
136 * Add the interrupt service routines to your C code. They have to call the QSPI interrupt handlers by passing the spi handle:
137 * \code
138 * IFX_INTERRUPT(qspi2DmaTxISR, 0, IFX_INTPRIO_DMA_CH3)
139 * {
140 * IfxQspi_SpiSlave_isrDmaTransmit(&spi);
141 *
142 * }
143 *
144 * IFX_INTERRUPT(qspi2DmaRxISR, 0, IFX_INTPRIO_DMA_CH4)
145 * {
146 * IfxQspi_SpiSlave_isrDmaReceive(&spi);
147 * }
148 *
149 * IFX_INTERRUPT(qspi2ErISR, 0, IFX_INTPRIO_QSPI2_ER)
150 * {
151 * IfxQspi_SpiSlave_isrError(&spi);
152 * // Process errors. Eg: parity Error is checked below
153 * if( spi.errorFlags.parityError == 1)
154 * {
155 * // Parity Error
156 * }
157 *
158 * }
159 * \endcode
160 *
161 * Finally install the interrupt handlers in your initialisation function:
162 * \code
163 * // install interrupt handlers
164 * IfxCpu_Irq_installInterruptHandler(&qspi2DmaTxISR, IFX_INTPRIO_DMA_CH3);
165 * IfxCpu_Irq_installInterruptHandler(&qspi2DmaRxISR, IFX_INTPRIO_DMA_CH4);
166 * IfxCpu_Irq_installInterruptHandler(&qspi2ErISR, IFX_INTPRIO_QSPI2_ER);
167 * IfxCpu_enableInterrupts();
168 * \endcode
169 *
170 * \subsection IfxLld_Qspi_SpiSlave_Init Module Initialisation (without dma use)
171 *
172 * The module initialisation can be done in the same function.
173 *
174 * Here an example for slave mode:
175 * \code
176 * // create module config
177 * IfxQspi_SpiSlave_Config spiSlaveConfig;
178 * IfxQspi_SpiSlave_initModuleConfig(&spiSlaveConfig, &MODULE_QSPI2);
179 *
180 * // set the maximum baudrate
181 * spiSlaveConfig.base.maximumBaudrate = 10000000;
182 *
183 * // ISR priorities and interrupt target
184 * spiSlaveConfig.base.txPriority = IFX_INTPRIO_QSPI2_TX;
185 * spiSlaveConfig.base.rxPriority = IFX_INTPRIO_QSPI2_RX;
186 * spiSlaveConfig.base.erPriority = IFX_INTPRIO_QSPI2_ER;
187 * spiSlaveConfig.base.isrProvider = IfxCpu_Irq_getTos(IfxCpu_getCoreIndex());
188 *
189 * // pin configuration
190 * const IfxQspi_SpiSlave_Pins slavePins = {
191 * &IfxQspi2_SCLKA_P15_3_IN, IfxPort_InputMode_pullDown, // SCLK Pin
192 * &IfxQspi2_MTSRA_P15_5_IN, IfxPort_InputMode_pullDown, // MTSR Pin
193 * &IfxQspi2_MRST_P15_7_OUT, IfxPort_OutputMode_pushPull, // MRST Pin
194 * &IfxQspi2_SLSIA_P15_2_IN, IfxPort_InputMode_pullDown, // SLSI Pin
195 * IfxPort_PadDriver_cmosAutomotiveSpeed3 // pad driver mode
196 * };
197 * spiSlaveConfig.pins = &slavePins;
198 *
199 * // initialize module
200 * //IfxQspi_Spi spi; // defined globally
201 * IfxQspi_SpiSlave_initModule(&spi, &spiSlaveConfig);
202 * \endcode
203 *
204 * \subsection IfxLld_Qspi_SpiSlave_Init_dma Module Initialisation (with dma use)
205 *
206 * The module initialisation can be done in the same function.
207 *
208 * Here an example for slave mode:
209 * \code
210 * // create module config
211 * IfxQspi_SpiSlave_Config spiSlaveConfig;
212 * IfxQspi_SpiSlave_initModuleConfig(&spiSlaveConfig, &MODULE_QSPI2);
213 *
214 * // set the maximum baudrate
215 * spiSlaveConfig.base.maximumBaudrate = 10000000;
216 *
217 * // ISR priorities and interrupt target (with dma usage)
218 * spiSlaveConfig.base.txPriority = IFX_INTPRIO_DMA_CH3;
219 * spiSlaveConfig.base.rxPriority = IFX_INTPRIO_DMA_CH4;
220 * spiSlaveConfig.base.erPriority = IFX_INTPRIO_QSPI2_ER;
221 *
222 * spiSlaveConfig.dma.txDmaChannelId = IfxDma_ChannelId_3;
223 * spiSlaveConfig.dma.rxDmaChannelId = IfxDma_ChannelId_4;
224 * spiSlaveConfig.dma.useDma = 1;
225 *
226 * // pin configuration
227 * const IfxQspi_SpiSlave_Pins slavePins = {
228 * &IfxQspi2_SCLKA_P15_3_IN, IfxPort_InputMode_pullDown, // SCLK Pin
229 * &IfxQspi2_MTSRA_P15_5_IN, IfxPort_InputMode_pullDown, // MTSR Pin
230 * &IfxQspi2_MRST_P15_7_OUT, IfxPort_OutputMode_pushPull, // MRST Pin
231 * &IfxQspi2_SLSIA_P15_2_IN, IfxPort_InputMode_pullDown, // SLSI Pin
232 * IfxPort_PadDriver_cmosAutomotiveSpeed3 // pad driver mode
233 * };
234 * spiSlaveConfig.pins = &slavePins;
235 *
236 * // initialize module
237 * //IfxQspi_Spi spi; // defined globally
238 * IfxQspi_SpiSlave_initModule(&spi, &spiSlaveConfig);
239 * \endcode
240 *
241 * The QSPI is ready for use now!
242 *
243 *
244 * \section IfxLld_Qspi_SpiSlave_DataTransfers Data Transfers
245 *
246 * In following examples we assume, that following buffers are declared globally:
247 * \code
248 * // declared somewhere globally
249 * #define SPI_BUFFER_SIZE 8
250 * uint8 spiTxBuffer[SPI_BUFFER_SIZE] = { 1, 2, 3, 4, 5, 6, 7, 8 };
251 * uint8 spiRxBuffer[SPI_BUFFER_SIZE] = { 0, 0, 0, 0, 0, 0, 0, 0 };
252 * \endcode
253 *
254 * Sending and Receiving a data stream:
255 * \code
256 * int i = 0;
257 * // wait until transfer of previous data stream is finished
258 * while( IfxQspi_SpiSlave_getStatus(&spi) == SpiIf_Status_busy );
259 *
260 * // send/receive new stream
261 * IfxQspi_SpiSlave_exchange(&spi, &spiTxBuffer[i], &spiRxBuffer[i], SPI_BUFFER_SIZE);
262 * \endcode
263 *
264 * Send only, discard received data:
265 * \code
266 *
267 * // wait until transfer of previous data stream is finished
268 * while( IfxQspi_SpiSlave_getStatus(&spi) == SpiIf_Status_busy );
269 *
270 * // send new stream
271 * IfxQspi_SpiSlave_exchange(&spi, &spiTxBuffer[i], NULL_PTR, SPI_BUFFER_SIZE);
272 * \endcode
273 *
274 * Receive only, send all-1
275 * \code
276 * // wait until transfer of previous data stream is finished
277 * while( IfxQspi_SpiSlave_getStatus(&spi) == SpiIf_Status_busy );
278 *
279 * // receive new stream
280 * IfxQspi_SpiSlave_exchange(&spi, NULL_PTR, &spiRxBuffer[i], SPI_BUFFER_SIZE);
281 * \endcode
282 *
283 * \defgroup IfxLld_Qspi_SpiSlave SPI Slave Driver
284 * \ingroup IfxLld_Qspi
285 * \defgroup IfxLld_Qspi_SpiSlave_DataStructures Data Structures
286 * \ingroup IfxLld_Qspi_SpiSlave
287 * \defgroup IfxLld_Qspi_SpiSlave_Module Module Functions
288 * \ingroup IfxLld_Qspi_SpiSlave
289 * \defgroup IfxLld_Qspi_SpiSlave_Support Support Functions
290 * \ingroup IfxLld_Qspi_SpiSlave
291 * \defgroup IfxLld_Qspi_SpiSlave_Com Communication
292 * \ingroup IfxLld_Qspi_SpiSlave
293 * \defgroup IfxLld_Qspi_SpiSlave_InterruptFunctions Interrupt Functions
294 * \ingroup IfxLld_Qspi_SpiSlave
295 * \defgroup IfxLld_Qspi_SpiSlave_DirectFifo Direct FIFO Access
296 * \ingroup IfxLld_Qspi_SpiSlave
297 */
298
299 #ifndef IFXQSPI_SPISLAVE_H
300 #define IFXQSPI_SPISLAVE_H 1
301
302 /******************************************************************************/
303 /*----------------------------------Includes----------------------------------*/
304 /******************************************************************************/
305
306 #include "Cpu/Irq/IfxCpu_Irq.h"
307 #include "Dma/Dma/IfxDma_Dma.h"
308 #include "Qspi/Std/IfxQspi.h"
309 #include "Scu/Std/IfxScuWdt.h"
310
311 /******************************************************************************/
312 /*-----------------------------Data Structures--------------------------------*/
313 /******************************************************************************/
314
315 /** \addtogroup IfxLld_Qspi_SpiSlave_DataStructures
316 * \{ */
317 /** \brief Dma handle
318 */
319 typedef struct
320 {
321 IfxDma_Dma_Channel rxDmaChannel; /**< \brief receive DMA channel handle */
322 IfxDma_Dma_Channel txDmaChannel; /**< \brief transmit DMA channel handle */
323 IfxDma_ChannelId rxDmaChannelId; /**< \brief DMA channel no for the Spi recieve */
324 IfxDma_ChannelId txDmaChannelId; /**< \brief DMA channel no for the Spi transmit */
325 boolean useDma; /**< \brief use Dma for Data transfers */
326 } IfxQspi_SpiSlave_Dma;
327
328 /** \brief Dma configuration
329 */
330 typedef struct
331 {
332 IfxDma_ChannelId rxDmaChannelId; /**< \brief DMA channel no for the Spi receive */
333 IfxDma_ChannelId txDmaChannelId; /**< \brief DMA channel no for the Spi transmit */
334 boolean useDma; /**< \brief use Dma for Data transfers */
335 } IfxQspi_SpiSlave_DmaConfig;
336
337 /** \brief Qspi Slave Mode Error Flags
338 */
339 typedef struct
340 {
341 uint16 parityError : 1; /**< \brief [0:0] Parity Error */
342 uint16 configurationError : 1; /**< \brief [1:1] Configuration Error */
343 uint16 baudrateError : 1; /**< \brief [2:2] baudrate Error */
344 uint16 txFifoOverflowError : 1; /**< \brief [3:3] TxFifo Overflow Error */
345 uint16 txFifoUnderflowError : 1; /**< \brief [4:4] TxFifo underflow Error */
346 uint16 rxFifoOverflowError : 1; /**< \brief [5:5] RxFifo Overflow Error */
347 uint16 rxFifoUnderflowError : 1; /**< \brief [6:6] RxFifo underflow Error */
348 uint16 expectTimeoutError : 1; /**< \brief [7:7] Expect Timeout Error */
349 uint16 slsiMisplacedInactivation : 1; /**< \brief [8:8] SLSI misplaced inactivation (slave mode) */
350 } IfxQspi_SpiSlave_ErrorFlags;
351
352 /** \brief Slave pin IO configuration structure
353 */
354 typedef struct
355 {
356 IFX_CONST IfxQspi_Sclk_In *sclk; /**< \brief Pointer to SLCK in pin */
357 IfxPort_InputMode sclkMode; /**< \brief The SCLK pin input mode */
358 IFX_CONST IfxQspi_Mtsr_In *mtsr; /**< \brief Pointer to MTSR in pin */
359 IfxPort_InputMode mtsrMode; /**< \brief The MTSR pin input mode */
360 IFX_CONST IfxQspi_Mrst_Out *mrst; /**< \brief Pointer to MRST out pin */
361 IfxPort_OutputMode mrstMode; /**< \brief The MRST pin output mode */
362 IFX_CONST IfxQspi_Slsi_In *slsi; /**< \brief Pointer to SLSI in pin */
363 IfxPort_InputMode slsiMode; /**< \brief The SLSI pin input mode */
364 IfxPort_PadDriver pinDriver; /**< \brief The pad driver mode which should be configured */
365 } IfxQspi_SpiSlave_Pins;
366
367 /** \brief Configures the SPI Protocol
368 */
369 typedef struct
370 {
371 SpiIf_ClockPolarity clockPolarity; /**< \brief Specifies the clock polarity */
372 SpiIf_ShiftClock shiftClock; /**< \brief Specifies the clock phase */
373 SpiIf_DataHeading dataHeading; /**< \brief Specifies MSB or LSB first */
374 uint8 dataWidth; /**< \brief range 2 .. 32 bits (note 2 = 2-bits, 3 = 3-bits ... */
375 Ifx_ParityMode parityMode; /**< \brief Specifies the parity mode */
376 } IfxQspi_SpiSlave_Protocol;
377
378 /** \} */
379
380 /** \addtogroup IfxLld_Qspi_SpiSlave_DataStructures
381 * \{ */
382 /** \brief Module handle data structure
383 */
384 typedef struct
385 {
386 SpiIf base; /**< \brief Module SPI interface handle */
387 Ifx_QSPI *qspi; /**< \brief Pointer to QSPI module registers */
388 uint8 dataWidth; /**< \brief Number of bits which will be written into the FIFO */
389 SpiIf_Job rxJob; /**< \brief Rx Stream which has been received */
390 SpiIf_Job txJob; /**< \brief Tx Stream which should be sent */
391 boolean onTransfer; /**< \brief set to TRUE during ongoing transfer */
392 IfxQspi_SpiSlave_Dma dma; /**< \brief Dma handle */
393 IfxQspi_SpiSlave_ErrorFlags errorFlags; /**< \brief Spi Slave Error Flags */
394 } IfxQspi_SpiSlave;
395
396 /** \brief Module configuration structure
397 */
398 typedef struct
399 {
400 SpiIf_Config base; /**< \brief SPI interface configuration structure */
401 Ifx_QSPI *qspi; /**< \brief Pointer to QSPI module registers */
402 boolean allowSleepMode; /**< \brief Specifies module sleep mode */
403 boolean pauseOnBaudrateSpikeErrors; /**< \brief Specifies module pause on baudrate or spike errors */
404 IfxQspi_PauseRunTransition pauseRunTransition; /**< \brief Specifies module run or pause mode */
405 IfxQspi_TxFifoInt txFifoThreshold; /**< \brief Specifies the TXFIFO interrupt threshold */
406 IfxQspi_RxFifoInt rxFifoThreshold; /**< \brief Specifies the RXFIFO interrupt threshold */
407 IFX_CONST IfxQspi_SpiSlave_Pins *pins; /**< \brief structure for QSPI Slave pins */
408 IfxQspi_SpiSlave_Protocol protocol;
409 IfxQspi_SpiSlave_DmaConfig dma; /**< \brief Dma configuration */
410 IfxQspi_FifoMode txFifoMode; /**< \brief Specifies the transfer FIFO mode. */
411 IfxQspi_FifoMode rxFifoMode; /**< \brief Specifies the receive FIFO mode */
412 } IfxQspi_SpiSlave_Config;
413
414 /** \} */
415
416 /** \addtogroup IfxLld_Qspi_SpiSlave_Module
417 * \{ */
418
419 /******************************************************************************/
420 /*-------------------------Global Function Prototypes-------------------------*/
421 /******************************************************************************/
422
423 /** \brief Initialises the module
424 * \param handle Module handle
425 * \param config Predefined configuration structure of the module
426 * \return None
427 *
428 * Usage example: see \ref IfxLld_Qspi_SpiSlave_Usage
429 *
430 */
431 IFX_EXTERN void IfxQspi_SpiSlave_initModule(IfxQspi_SpiSlave *handle, const IfxQspi_SpiSlave_Config *config);
432
433 /** \brief Fills the config structure with default values
434 * \param config Configuration structure which should be initialized.
435 * \param qspi pointer to QSPI registers
436 * \return None
437 *
438 * Usage example: see \ref IfxLld_Qspi_SpiSlave_Usage
439 *
440 */
441 IFX_EXTERN void IfxQspi_SpiSlave_initModuleConfig(IfxQspi_SpiSlave_Config *config, Ifx_QSPI *qspi);
442
443 /** \} */
444
445 /** \addtogroup IfxLld_Qspi_SpiSlave_Com
446 * \{ */
447
448 /******************************************************************************/
449 /*-------------------------Global Function Prototypes-------------------------*/
450 /******************************************************************************/
451
452 /** \brief Exchanges data between source and data
453 * \param handle Module handle
454 * \param src Source of data. Can be set to NULL_PTR if nothing to receive (transmit only)
455 * \param dest Destination to which to be sent. Can be set to NULL_PTR if nothing to transmit (receive only) - in this case, all-1 will be sent.
456 * \param count Number of data in pending
457 * \return Status of exchange of data
458 *
459 * Usage example: see \ref IfxLld_Qspi_SpiSlave_Usage
460 *
461 */
462 IFX_EXTERN SpiIf_Status IfxQspi_SpiSlave_exchange(IfxQspi_SpiSlave *handle, const void *src, void *dest, Ifx_SizeT count);
463
464 /** \brief Gets the transmission status
465 * \param handle Module handle
466 * \return Transmission status
467 *
468 * Usage example: see \ref IfxLld_Qspi_SpiSlave_Usage
469 *
470 */
471 IFX_EXTERN SpiIf_Status IfxQspi_SpiSlave_getStatus(IfxQspi_SpiSlave *handle);
472
473 /** \} */
474
475 /** \addtogroup IfxLld_Qspi_SpiSlave_InterruptFunctions
476 * \{ */
477
478 /******************************************************************************/
479 /*-------------------------Global Function Prototypes-------------------------*/
480 /******************************************************************************/
481
482 /** \brief Dma receive interrupt handler
483 * \param qspiHandle Module handle
484 * \return None
485 */
486 IFX_EXTERN void IfxQspi_SpiSlave_isrDmaReceive(IfxQspi_SpiSlave *qspiHandle);
487
488 /** \brief Transmit interrupt handler
489 * \param qspiHandle Module handle
490 * \return None
491 */
492 IFX_EXTERN void IfxQspi_SpiSlave_isrDmaTransmit(IfxQspi_SpiSlave *qspiHandle);
493
494 /** \brief Error Interrupt handler
495 * \param handle Module handle
496 * \return None
497 */
498 IFX_EXTERN void IfxQspi_SpiSlave_isrError(IfxQspi_SpiSlave *handle);
499
500 /** \brief Receive Interrupt handler
501 * \param handle Module handle
502 * \return None
503 */
504 IFX_EXTERN void IfxQspi_SpiSlave_isrReceive(IfxQspi_SpiSlave *handle);
505
506 /** \brief Transmit interrupt handler
507 * \param handle Module handle
508 * \return None
509 */
510 IFX_EXTERN void IfxQspi_SpiSlave_isrTransmit(IfxQspi_SpiSlave *handle);
511
512 /** \} */
513
514 /** \addtogroup IfxLld_Qspi_SpiSlave_DirectFifo
515 * \{ */
516
517 /******************************************************************************/
518 /*-------------------------Inline Function Prototypes-------------------------*/
519 /******************************************************************************/
520
521 /** \brief Reads data or status in RxFIFO
522 * \param handle QSpi Slave handle
523 * \return Data or Status in RxFIFO
524 */
525 IFX_INLINE uint32 IfxQspi_SpiSlave_readReceiveFifo(IfxQspi_SpiSlave *handle);
526
527 /** \brief Writes the data to TxFIFO
528 * \param handle QSpi slave handle
529 * \param data Data to be entered in Tx FIFO
530 * \return None
531 */
532 IFX_INLINE void IfxQspi_SpiSlave_writeTransmitFifo(IfxQspi_SpiSlave *handle, uint32 data);
533
534 /** \} */
535
536 /******************************************************************************/
537 /*---------------------Inline Function Implementations------------------------*/
538 /******************************************************************************/
539
540 IFX_INLINE uint32 IfxQspi_SpiSlave_readReceiveFifo(IfxQspi_SpiSlave *handle)
541 {
542 Ifx_QSPI *qspiSFR = handle->qspi;
543 uint32 data = IfxQspi_readReceiveFifo(qspiSFR);
544 return data;
545 }
546
547
548 IFX_INLINE void IfxQspi_SpiSlave_writeTransmitFifo(IfxQspi_SpiSlave *handle, uint32 data)
549 {
550 IfxQspi_writeTransmitFifo(handle->qspi, data);
551 }
552
553
554 #endif /* IFXQSPI_SPISLAVE_H */
IfxQspi_SpiSlave_Pins::mrstMode
IfxPort_OutputMode mrstMode
The MRST pin output mode.
Definition: IfxQspi_SpiSlave.h:361
IfxQspi_Mrst_Out
MRST pin mapping structure.
Definition: IfxQspi_PinMap.h:96
IfxQspi_SpiSlave_Protocol::dataHeading
SpiIf_DataHeading dataHeading
Specifies MSB or LSB first.
Definition: IfxQspi_SpiSlave.h:373
IfxQspi_Slsi_In
SLSI pin mapping structure.
Definition: IfxQspi_PinMap.h:80
IfxDma_ChannelId
IfxDma_ChannelId
DMA channel resources definition.
Definition: IfxDma_cfg.h:102
IfxQspi_SpiSlave_Config::base
SpiIf_Config base
SPI interface configuration structure.
Definition: IfxQspi_SpiSlave.h:400
IfxQspi_SpiSlave_ErrorFlags::rxFifoOverflowError
uint16 rxFifoOverflowError
[5:5] RxFifo Overflow Error
Definition: IfxQspi_SpiSlave.h:346
IfxQspi_SpiSlave_Config::rxFifoThreshold
IfxQspi_RxFifoInt rxFifoThreshold
Specifies the RXFIFO interrupt threshold.
Definition: IfxQspi_SpiSlave.h:406
IfxQspi_SpiSlave_Config::pauseOnBaudrateSpikeErrors
boolean pauseOnBaudrateSpikeErrors
Specifies module pause on baudrate or spike errors.
Definition: IfxQspi_SpiSlave.h:403
SpiIf_DataHeading
SpiIf_DataHeading
Heading.
Definition: SpiIf.h:87
IfxQspi_SpiSlave_Config::pauseRunTransition
IfxQspi_PauseRunTransition pauseRunTransition
Specifies module run or pause mode.
Definition: IfxQspi_SpiSlave.h:404
IfxQspi_SpiSlave_Pins::sclkMode
IfxPort_InputMode sclkMode
The SCLK pin input mode.
Definition: IfxQspi_SpiSlave.h:357
IfxQspi_SpiSlave_Pins::pinDriver
IfxPort_PadDriver pinDriver
The pad driver mode which should be configured.
Definition: IfxQspi_SpiSlave.h:364
IfxQspi_SpiSlave_Dma
Dma handle.
Definition: IfxQspi_SpiSlave.h:319
IfxQspi_Sclk_In
SCLK pin mapping structure.
Definition: IfxQspi_PinMap.h:72
SpiIf_Config
Definition: SpiIf.h:160
IfxQspi_SpiSlave_getStatus
IFX_EXTERN SpiIf_Status IfxQspi_SpiSlave_getStatus(IfxQspi_SpiSlave *handle)
Gets the transmission status.
Definition: IfxQspi_SpiSlave.c:113
IfxQspi_SpiSlave_initModule
IFX_EXTERN void IfxQspi_SpiSlave_initModule(IfxQspi_SpiSlave *handle, const IfxQspi_SpiSlave_Config *config)
Initialises the module.
Definition: IfxQspi_SpiSlave.c:126
IfxDma_Dma.h
DMA DMA details.
IfxQspi_SpiSlave::qspi
Ifx_QSPI * qspi
Pointer to QSPI module registers.
Definition: IfxQspi_SpiSlave.h:387
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:140
uint32
unsigned long uint32
Definition: Platform_Types.h:116
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
IfxQspi_FifoMode
IfxQspi_FifoMode
Transmit FIFO mode.
Definition: IfxQspi.h:286
IfxQspi_SpiSlave_Pins::slsiMode
IfxPort_InputMode slsiMode
The SLSI pin input mode.
Definition: IfxQspi_SpiSlave.h:363
IfxQspi_SpiSlave_exchange
IFX_EXTERN SpiIf_Status IfxQspi_SpiSlave_exchange(IfxQspi_SpiSlave *handle, const void *src, void *dest, Ifx_SizeT count)
Exchanges data between source and data.
Definition: IfxQspi_SpiSlave.c:92
SpiIf_
Definition: SpiIf.h:150
IfxQspi_SpiSlave_ErrorFlags::txFifoOverflowError
uint16 txFifoOverflowError
[3:3] TxFifo Overflow Error
Definition: IfxQspi_SpiSlave.h:344
IfxQspi_SpiSlave_isrDmaReceive
IFX_EXTERN void IfxQspi_SpiSlave_isrDmaReceive(IfxQspi_SpiSlave *qspiHandle)
Dma receive interrupt handler.
Definition: IfxQspi_SpiSlave.c:382
SpiIf_ShiftClock
SpiIf_ShiftClock
Clock phase.
Definition: SpiIf.h:94
IfxQspi_SpiSlave_Dma::rxDmaChannelId
IfxDma_ChannelId rxDmaChannelId
DMA channel no for the Spi recieve.
Definition: IfxQspi_SpiSlave.h:323
IfxScuWdt.h
SCU basic functionality.
IfxQspi_SpiSlave_isrError
IFX_EXTERN void IfxQspi_SpiSlave_isrError(IfxQspi_SpiSlave *handle)
Error Interrupt handler.
Definition: IfxQspi_SpiSlave.c:406
IfxQspi_SpiSlave_Pins
Slave pin IO configuration structure.
Definition: IfxQspi_SpiSlave.h:354
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxQspi_readReceiveFifo
IFX_INLINE uint32 IfxQspi_readReceiveFifo(Ifx_QSPI *qspi)
Read the oldest data from RXFIFO.
Definition: IfxQspi.h:1184
IfxQspi_SpiSlave_Dma::txDmaChannel
IfxDma_Dma_Channel txDmaChannel
transmit DMA channel handle
Definition: IfxQspi_SpiSlave.h:322
IfxQspi_SpiSlave
Module handle data structure.
Definition: IfxQspi_SpiSlave.h:384
IfxQspi_SpiSlave_Config::dma
IfxQspi_SpiSlave_DmaConfig dma
Dma configuration.
Definition: IfxQspi_SpiSlave.h:409
IfxQspi_SpiSlave_isrTransmit
IFX_EXTERN void IfxQspi_SpiSlave_isrTransmit(IfxQspi_SpiSlave *handle)
Transmit interrupt handler.
Definition: IfxQspi_SpiSlave.c:479
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxQspi_SpiSlave_Pins::sclk
IFX_CONST IfxQspi_Sclk_In * sclk
Pointer to SLCK in pin.
Definition: IfxQspi_SpiSlave.h:356
IfxQspi_Mtsr_In
MTSR pin mapping structure.
Definition: IfxQspi_PinMap.h:64
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxQspi_PauseRunTransition
IfxQspi_PauseRunTransition
Request between pause and Run transition.
Definition: IfxQspi.h:170
IfxQspi_RxFifoInt
IfxQspi_RxFifoInt
Receive Fifo Interrupt Threshold.
Definition: IfxQspi.h:217
IfxQspi_TxFifoInt
IfxQspi_TxFifoInt
Transmit Fifo Interrupt Threshold.
Definition: IfxQspi.h:274
IfxQspi_SpiSlave_Config::rxFifoMode
IfxQspi_FifoMode rxFifoMode
Specifies the receive FIFO mode.
Definition: IfxQspi_SpiSlave.h:411
IfxQspi_SpiSlave_Dma::rxDmaChannel
IfxDma_Dma_Channel rxDmaChannel
receive DMA channel handle
Definition: IfxQspi_SpiSlave.h:321
IfxQspi_SpiSlave_Config::protocol
IfxQspi_SpiSlave_Protocol protocol
Definition: IfxQspi_SpiSlave.h:408
SpiIf_ClockPolarity
SpiIf_ClockPolarity
Clock polarity.
Definition: SpiIf.h:101
IfxQspi_SpiSlave_Config::pins
IFX_CONST IfxQspi_SpiSlave_Pins * pins
structure for QSPI Slave pins
Definition: IfxQspi_SpiSlave.h:407
IfxQspi_SpiSlave_Protocol::dataWidth
uint8 dataWidth
range 2 .. 32 bits (note 2 = 2-bits, 3 = 3-bits ...
Definition: IfxQspi_SpiSlave.h:374
IfxQspi_SpiSlave::rxJob
SpiIf_Job rxJob
Rx Stream which has been received.
Definition: IfxQspi_SpiSlave.h:389
IfxQspi_SpiSlave_Config
Module configuration structure.
Definition: IfxQspi_SpiSlave.h:398
IfxQspi_SpiSlave::onTransfer
boolean onTransfer
set to TRUE during ongoing transfer
Definition: IfxQspi_SpiSlave.h:391
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:151
IfxQspi_SpiSlave_Pins::mrst
IFX_CONST IfxQspi_Mrst_Out * mrst
Pointer to MRST out pin.
Definition: IfxQspi_SpiSlave.h:360
IfxQspi_SpiSlave_DmaConfig
Dma configuration.
Definition: IfxQspi_SpiSlave.h:330
IfxQspi_SpiSlave_writeTransmitFifo
IFX_INLINE void IfxQspi_SpiSlave_writeTransmitFifo(IfxQspi_SpiSlave *handle, uint32 data)
Writes the data to TxFIFO.
Definition: IfxQspi_SpiSlave.h:548
IfxQspi_SpiSlave_Protocol::parityMode
Ifx_ParityMode parityMode
Specifies the parity mode.
Definition: IfxQspi_SpiSlave.h:375
IfxQspi_SpiSlave_Dma::useDma
boolean useDma
use Dma for Data transfers
Definition: IfxQspi_SpiSlave.h:325
IfxQspi_SpiSlave_ErrorFlags::slsiMisplacedInactivation
uint16 slsiMisplacedInactivation
[8:8] SLSI misplaced inactivation (slave mode)
Definition: IfxQspi_SpiSlave.h:349
IfxQspi_SpiSlave_ErrorFlags
Qspi Slave Mode Error Flags.
Definition: IfxQspi_SpiSlave.h:339
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxQspi_SpiSlave_Pins::slsi
IFX_CONST IfxQspi_Slsi_In * slsi
Pointer to SLSI in pin.
Definition: IfxQspi_SpiSlave.h:362
IfxQspi_SpiSlave_readReceiveFifo
IFX_INLINE uint32 IfxQspi_SpiSlave_readReceiveFifo(IfxQspi_SpiSlave *handle)
Reads data or status in RxFIFO.
Definition: IfxQspi_SpiSlave.h:540
IfxQspi_SpiSlave::txJob
SpiIf_Job txJob
Tx Stream which should be sent.
Definition: IfxQspi_SpiSlave.h:390
SpiIf_Job
Definition: SpiIf.h:121
IfxQspi_SpiSlave_ErrorFlags::txFifoUnderflowError
uint16 txFifoUnderflowError
[4:4] TxFifo underflow Error
Definition: IfxQspi_SpiSlave.h:345
IfxQspi_SpiSlave_Protocol::shiftClock
SpiIf_ShiftClock shiftClock
Specifies the clock phase.
Definition: IfxQspi_SpiSlave.h:372
IfxQspi_SpiSlave_ErrorFlags::expectTimeoutError
uint16 expectTimeoutError
[7:7] Expect Timeout Error
Definition: IfxQspi_SpiSlave.h:348
IfxQspi_SpiSlave::base
SpiIf base
Module SPI interface handle.
Definition: IfxQspi_SpiSlave.h:386
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:81
IfxQspi_SpiSlave::errorFlags
IfxQspi_SpiSlave_ErrorFlags errorFlags
Spi Slave Error Flags.
Definition: IfxQspi_SpiSlave.h:393
IfxQspi_SpiSlave_Config::txFifoMode
IfxQspi_FifoMode txFifoMode
Specifies the transfer FIFO mode.
Definition: IfxQspi_SpiSlave.h:410
IfxQspi_writeTransmitFifo
IFX_INLINE void IfxQspi_writeTransmitFifo(Ifx_QSPI *qspi, uint32 data)
Write Data into DATAENTRY register.
Definition: IfxQspi.h:1347
IfxQspi_SpiSlave_ErrorFlags::configurationError
uint16 configurationError
[1:1] Configuration Error
Definition: IfxQspi_SpiSlave.h:342
IfxQspi_SpiSlave_ErrorFlags::parityError
uint16 parityError
[0:0] Parity Error
Definition: IfxQspi_SpiSlave.h:341
IfxQspi_SpiSlave_isrReceive
IFX_EXTERN void IfxQspi_SpiSlave_isrReceive(IfxQspi_SpiSlave *handle)
Receive Interrupt handler.
Definition: IfxQspi_SpiSlave.c:473
IfxQspi_SpiSlave_ErrorFlags::baudrateError
uint16 baudrateError
[2:2] baudrate Error
Definition: IfxQspi_SpiSlave.h:343
IfxCpu_Irq.h
This file contains the APIs for Interrupt related functions.
IfxQspi_SpiSlave_Config::txFifoThreshold
IfxQspi_TxFifoInt txFifoThreshold
Specifies the TXFIFO interrupt threshold.
Definition: IfxQspi_SpiSlave.h:405
IfxQspi.h
QSPI basic functionality.
IfxQspi_SpiSlave_Dma::txDmaChannelId
IfxDma_ChannelId txDmaChannelId
DMA channel no for the Spi transmit.
Definition: IfxQspi_SpiSlave.h:324
IfxQspi_SpiSlave::dma
IfxQspi_SpiSlave_Dma dma
Dma handle.
Definition: IfxQspi_SpiSlave.h:392
SpiIf_Status
SpiIf_Status
SPI Interface Status.
Definition: SpiIf.h:66
IfxQspi_SpiSlave_Protocol
Configures the SPI Protocol.
Definition: IfxQspi_SpiSlave.h:369
IfxQspi_SpiSlave_Pins::mtsr
IFX_CONST IfxQspi_Mtsr_In * mtsr
Pointer to MTSR in pin.
Definition: IfxQspi_SpiSlave.h:358
IfxDma_Dma_Channel
Channel handle.
Definition: IfxDma_Dma.h:471
IfxQspi_SpiSlave_Protocol::clockPolarity
SpiIf_ClockPolarity clockPolarity
Specifies the clock polarity.
Definition: IfxQspi_SpiSlave.h:371
uint8
unsigned char uint8
Definition: Platform_Types.h:108
Ifx_ParityMode
Ifx_ParityMode
Definition: Ifx_Types.h:119
IfxQspi_SpiSlave_isrDmaTransmit
IFX_EXTERN void IfxQspi_SpiSlave_isrDmaTransmit(IfxQspi_SpiSlave *qspiHandle)
Transmit interrupt handler.
Definition: IfxQspi_SpiSlave.c:396
IfxQspi_SpiSlave_Config::allowSleepMode
boolean allowSleepMode
Specifies module sleep mode.
Definition: IfxQspi_SpiSlave.h:402
IfxQspi_SpiSlave_initModuleConfig
IFX_EXTERN void IfxQspi_SpiSlave_initModuleConfig(IfxQspi_SpiSlave_Config *config, Ifx_QSPI *qspi)
Fills the config structure with default values.
Definition: IfxQspi_SpiSlave.c:353
IfxQspi_SpiSlave_Pins::mtsrMode
IfxPort_InputMode mtsrMode
The MTSR pin input mode.
Definition: IfxQspi_SpiSlave.h:359
IfxQspi_SpiSlave_ErrorFlags::rxFifoUnderflowError
uint16 rxFifoUnderflowError
[6:6] RxFifo underflow Error
Definition: IfxQspi_SpiSlave.h:347


iLLD_TC38A: IfxQspi_cfg.c Source File

  • _Impl
IfxQspi_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxQspi_cfg.c
3 * \brief QSPI on-chip implementation data
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 */
43
44 /******************************************************************************/
45 /*----------------------------------Includes----------------------------------*/
46 /******************************************************************************/
47
48 #include "IfxQspi_cfg.h"
49
50 /******************************************************************************/
51 /*-----------------------Exported Variables/Constants-------------------------*/
52 /******************************************************************************/
53
54 IFX_CONST IfxModule_IndexMap IfxQspi_cfg_indexMap[IFXQSPI_NUM_MODULES] = {
55 {&MODULE_QSPI0, IfxQspi_Index_0},
56 {&MODULE_QSPI1, IfxQspi_Index_1},
57 {&MODULE_QSPI2, IfxQspi_Index_2},
58 {&MODULE_QSPI3, IfxQspi_Index_3},
59 {&MODULE_QSPI4, IfxQspi_Index_4}
60 };
IfxQspi_Index_2
QSPI index 2.
Definition: IfxQspi_cfg.h:84
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxQspi_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxQspi_cfg_indexMap[IFXQSPI_NUM_MODULES]
Definition: IfxQspi_cfg.c:54
IfxQspi_Index_1
QSPI index 1.
Definition: IfxQspi_cfg.h:83
IfxQspi_Index_3
QSPI index 3.
Definition: IfxQspi_cfg.h:85
IFXQSPI_NUM_MODULES
#define IFXQSPI_NUM_MODULES
Definition: IfxQspi_cfg.h:69
IfxQspi_Index_4
QSPI index 4.
Definition: IfxQspi_cfg.h:86
IfxQspi_Index_0
QSPI index 0.
Definition: IfxQspi_cfg.h:82
IfxQspi_cfg.h
QSPI on-chip implementation data.
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:140


iLLD_TC38A: IfxQspi_cfg.h Source File

  • _Impl
IfxQspi_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxQspi_cfg.h
3 * \brief QSPI on-chip implementation data
4 * \ingroup IfxLld_Qspi
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 *
43 * \defgroup IfxLld_Qspi QSPI
44 * \ingroup IfxLld
45 * \defgroup IfxLld_Qspi_Impl Implementation
46 * \ingroup IfxLld_Qspi
47 * \defgroup IfxLld_Qspi_Std Standard Driver
48 * \ingroup IfxLld_Qspi
49 * \defgroup IfxLld_Qspi_Impl_Enumerations Enumerations
50 * \ingroup IfxLld_Qspi_Impl
51 */
52
53 #ifndef IFXQSPI_CFG_H
54 #define IFXQSPI_CFG_H 1
55
56 /******************************************************************************/
57 /*----------------------------------Includes----------------------------------*/
58 /******************************************************************************/
59
60 #include "Cpu/Std/Ifx_Types.h"
61 #include "IfxQspi_reg.h"
62
63 /******************************************************************************/
64 /*-----------------------------------Macros-----------------------------------*/
65 /******************************************************************************/
66
67 #define IFXQSPI_HWFIFO_DEPTH (4)
68
69 #define IFXQSPI_NUM_MODULES (5)
70
71 #define IFXQSPI_NUM_CHANNELS (16)
72
73 /******************************************************************************/
74 /*-------------------------------Enumerations---------------------------------*/
75 /******************************************************************************/
76
77 /** \brief List of the available QSPI resources
78 */
79 typedef enum
80 {
81 IfxQspi_Index_none = -1, /**< \brief Not Selected */
82 IfxQspi_Index_0 = 0, /**< \brief QSPI index 0 */
83 IfxQspi_Index_1, /**< \brief QSPI index 1 */
84 IfxQspi_Index_2, /**< \brief QSPI index 2 */
85 IfxQspi_Index_3, /**< \brief QSPI index 3 */
86 IfxQspi_Index_4 /**< \brief QSPI index 4 */
87 } IfxQspi_Index;
88
89 /******************************************************************************/
90 /*-------------------Global Exported Variables/Constants----------------------*/
91 /******************************************************************************/
92 IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxQspi_cfg_indexMap[IFXQSPI_NUM_MODULES];
93
94 #endif /* IFXQSPI_CFG_H */
IfxQspi_Index_2
QSPI index 2.
Definition: IfxQspi_cfg.h:84
IfxQspi_Index
IfxQspi_Index
List of the available QSPI resources.
Definition: IfxQspi_cfg.h:79
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxQspi_Index_none
Not Selected.
Definition: IfxQspi_cfg.h:81
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxQspi_cfg_indexMap
IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxQspi_cfg_indexMap[IFXQSPI_NUM_MODULES]
Definition: IfxQspi_cfg.h:92
IfxQspi_Index_1
QSPI index 1.
Definition: IfxQspi_cfg.h:83
IfxQspi_Index_3
QSPI index 3.
Definition: IfxQspi_cfg.h:85
IFXQSPI_NUM_MODULES
#define IFXQSPI_NUM_MODULES
Definition: IfxQspi_cfg.h:69
IfxQspi_Index_4
QSPI index 4.
Definition: IfxQspi_cfg.h:86
IfxQspi_Index_0
QSPI index 0.
Definition: IfxQspi_cfg.h:82
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:140


iLLD_TC38A: IfxScu_PinMap.c Source File

  • _PinMap
IfxScu_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxScu_PinMap.c
3 * \brief SCU I/O map
4 * \ingroup IfxLld_Scu
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "IfxScu_PinMap.h"
44
45 IfxScu_Emgstop_In IfxScu_EMGSTOPA_P33_8_IN = {&MODULE_SCU, {&MODULE_P33, 8}, Ifx_RxSel_a};
46 IfxScu_Emgstop_In IfxScu_EMGSTOPB_P21_2_IN = {&MODULE_SCU, {&MODULE_P21, 2}, Ifx_RxSel_b};
47 IfxScu_Extclk_Out IfxScu_EXTCLK0_P00_15_OUT = {&MODULE_SCU, {&MODULE_P00,15}, IfxPort_OutputIdx_alt4};
48 IfxScu_Extclk_Out IfxScu_EXTCLK0_P23_1_OUT = {&MODULE_SCU, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt6};
49 IfxScu_Extclk_Out IfxScu_EXTCLK1_P00_13_OUT = {&MODULE_SCU, {&MODULE_P00,13}, IfxPort_OutputIdx_alt4};
50 IfxScu_Extclk_Out IfxScu_EXTCLK1_P11_12_OUT = {&MODULE_SCU, {&MODULE_P11,12}, IfxPort_OutputIdx_alt6};
51 IfxScu_Extclk_Out IfxScu_EXTCLK1_P32_4_OUT = {&MODULE_SCU, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt6};
52 IfxScu_Req_In IfxScu_REQ0A_P15_4_IN = {&MODULE_SCU, 0, {&MODULE_P15, 4}, Ifx_RxSel_a};
53 IfxScu_Req_In IfxScu_REQ0C_P10_7_IN = {&MODULE_SCU, 0, {&MODULE_P10, 7}, Ifx_RxSel_c};
54 IfxScu_Req_In IfxScu_REQ1A_P14_3_IN = {&MODULE_SCU, 1, {&MODULE_P14, 3}, Ifx_RxSel_a};
55 IfxScu_Req_In IfxScu_REQ1C_P10_8_IN = {&MODULE_SCU, 1, {&MODULE_P10, 8}, Ifx_RxSel_c};
56 IfxScu_Req_In IfxScu_REQ2A_P10_2_IN = {&MODULE_SCU, 2, {&MODULE_P10, 2}, Ifx_RxSel_a};
57 IfxScu_Req_In IfxScu_REQ2B_P02_1_IN = {&MODULE_SCU, 2, {&MODULE_P02, 1}, Ifx_RxSel_b};
58 IfxScu_Req_In IfxScu_REQ2C_P00_4_IN = {&MODULE_SCU, 2, {&MODULE_P00, 4}, Ifx_RxSel_c};
59 IfxScu_Req_In IfxScu_REQ3A_P10_3_IN = {&MODULE_SCU, 3, {&MODULE_P10, 3}, Ifx_RxSel_a};
60 IfxScu_Req_In IfxScu_REQ3B_P14_1_IN = {&MODULE_SCU, 3, {&MODULE_P14, 1}, Ifx_RxSel_b};
61 IfxScu_Req_In IfxScu_REQ3C_P02_0_IN = {&MODULE_SCU, 3, {&MODULE_P02, 0}, Ifx_RxSel_c};
62 IfxScu_Req_In IfxScu_REQ4A_P33_7_IN = {&MODULE_SCU, 4, {&MODULE_P33, 7}, Ifx_RxSel_a};
63 IfxScu_Req_In IfxScu_REQ4D_P15_5_IN = {&MODULE_SCU, 4, {&MODULE_P15, 5}, Ifx_RxSel_d};
64 IfxScu_Req_In IfxScu_REQ5A_P15_8_IN = {&MODULE_SCU, 5, {&MODULE_P15, 8}, Ifx_RxSel_a};
65 IfxScu_Req_In IfxScu_REQ6A_P20_0_IN = {&MODULE_SCU, 6, {&MODULE_P20, 0}, Ifx_RxSel_a};
66 IfxScu_Req_In IfxScu_REQ6D_P11_10_IN = {&MODULE_SCU, 6, {&MODULE_P11,10}, Ifx_RxSel_d};
67 IfxScu_Req_In IfxScu_REQ7A_P20_9_IN = {&MODULE_SCU, 7, {&MODULE_P20, 9}, Ifx_RxSel_a};
68 IfxScu_Req_In IfxScu_REQ7C_P15_1_IN = {&MODULE_SCU, 7, {&MODULE_P15, 1}, Ifx_RxSel_c};
69
70
71 const IfxScu_Emgstop_In *IfxScu_Emgstop_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS] = {
72 {
73 &IfxScu_EMGSTOPA_P33_8_IN,
74 &IfxScu_EMGSTOPB_P21_2_IN
75 }
76 };
77
78 const IfxScu_Extclk_Out *IfxScu_Extclk_Out_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS] = {
79 {
80 &IfxScu_EXTCLK1_P00_13_OUT,
81 &IfxScu_EXTCLK0_P00_15_OUT,
82 &IfxScu_EXTCLK1_P11_12_OUT,
83 &IfxScu_EXTCLK0_P23_1_OUT,
84 &IfxScu_EXTCLK1_P32_4_OUT
85 }
86 };
87
88 const IfxScu_Req_In *IfxScu_Req_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_NUM_REQUESTS][IFXSCU_PINMAP_REQ_IN_NUM_ITEMS] = {
89 {
90 {
91 &IfxScu_REQ0A_P15_4_IN,
92 NULL_PTR,
93 &IfxScu_REQ0C_P10_7_IN,
94 NULL_PTR
95 },
96 {
97 &IfxScu_REQ1A_P14_3_IN,
98 NULL_PTR,
99 &IfxScu_REQ1C_P10_8_IN,
100 NULL_PTR
101 },
102 {
103 &IfxScu_REQ2A_P10_2_IN,
104 &IfxScu_REQ2B_P02_1_IN,
105 &IfxScu_REQ2C_P00_4_IN,
106 NULL_PTR
107 },
108 {
109 &IfxScu_REQ3A_P10_3_IN,
110 &IfxScu_REQ3B_P14_1_IN,
111 &IfxScu_REQ3C_P02_0_IN,
112 NULL_PTR
113 },
114 {
115 &IfxScu_REQ4A_P33_7_IN,
116 NULL_PTR,
117 NULL_PTR,
118 &IfxScu_REQ4D_P15_5_IN
119 },
120 {
121 &IfxScu_REQ5A_P15_8_IN,
122 NULL_PTR,
123 NULL_PTR,
124 NULL_PTR
125 },
126 {
127 &IfxScu_REQ6A_P20_0_IN,
128 NULL_PTR,
129 NULL_PTR,
130 &IfxScu_REQ6D_P11_10_IN
131 },
132 {
133 &IfxScu_REQ7A_P20_9_IN,
134 NULL_PTR,
135 &IfxScu_REQ7C_P15_1_IN,
136 NULL_PTR
137 }
138 }
139 };
IfxScu_Extclk_Out
External Clock pin mapping structure.
Definition: IfxScu_PinMap.h:97
IFXSCU_PINMAP_NUM_MODULES
#define IFXSCU_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxScu_PinMap.h:130
IfxScu_EXTCLK1_P32_4_OUT
IfxScu_Extclk_Out IfxScu_EXTCLK1_P32_4_OUT
Definition: IfxScu_PinMap.c:51
Ifx_RxSel_d
Definition: Ifx_Types.h:132
IfxScu_Emgstop_In
Emergency Stop pin mapping structure.
Definition: IfxScu_PinMap.h:81
IfxScu_PinMap.h
SCU I/O map.
IfxScu_REQ1A_P14_3_IN
IfxScu_Req_In IfxScu_REQ1A_P14_3_IN
Definition: IfxScu_PinMap.c:54
IfxScu_REQ4A_P33_7_IN
IfxScu_Req_In IfxScu_REQ4A_P33_7_IN
Definition: IfxScu_PinMap.c:62
IfxScu_REQ3C_P02_0_IN
IfxScu_Req_In IfxScu_REQ3C_P02_0_IN
Definition: IfxScu_PinMap.c:61
IfxScu_REQ6A_P20_0_IN
IfxScu_Req_In IfxScu_REQ6A_P20_0_IN
Definition: IfxScu_PinMap.c:65
IfxScu_EXTCLK0_P00_15_OUT
IfxScu_Extclk_Out IfxScu_EXTCLK0_P00_15_OUT
Definition: IfxScu_PinMap.c:47
Ifx_RxSel_a
Definition: Ifx_Types.h:129
IfxScu_EMGSTOPA_P33_8_IN
IfxScu_Emgstop_In IfxScu_EMGSTOPA_P33_8_IN
Definition: IfxScu_PinMap.c:45
IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS
#define IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS
Definition: IfxScu_PinMap.h:133
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
Ifx_RxSel_b
Definition: Ifx_Types.h:130
IfxScu_REQ0C_P10_7_IN
IfxScu_Req_In IfxScu_REQ0C_P10_7_IN
Definition: IfxScu_PinMap.c:53
IfxScu_Req_In_pinTable
const IfxScu_Req_In * IfxScu_Req_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_NUM_REQUESTS][IFXSCU_PINMAP_REQ_IN_NUM_ITEMS]
Definition: IfxScu_PinMap.c:88
IfxPort_OutputIdx_alt6
Definition: IfxPort.h:134
IfxScu_REQ2B_P02_1_IN
IfxScu_Req_In IfxScu_REQ2B_P02_1_IN
Definition: IfxScu_PinMap.c:57
IfxScu_REQ2A_P10_2_IN
IfxScu_Req_In IfxScu_REQ2A_P10_2_IN
Definition: IfxScu_PinMap.c:56
IfxScu_EXTCLK1_P00_13_OUT
IfxScu_Extclk_Out IfxScu_EXTCLK1_P00_13_OUT
Definition: IfxScu_PinMap.c:49
IfxScu_EXTCLK1_P11_12_OUT
IfxScu_Extclk_Out IfxScu_EXTCLK1_P11_12_OUT
Definition: IfxScu_PinMap.c:50
Ifx_RxSel_c
Definition: Ifx_Types.h:131
IfxScu_REQ7C_P15_1_IN
IfxScu_Req_In IfxScu_REQ7C_P15_1_IN
Definition: IfxScu_PinMap.c:68
IfxPort_OutputIdx_alt4
Definition: IfxPort.h:132
IfxScu_REQ6D_P11_10_IN
IfxScu_Req_In IfxScu_REQ6D_P11_10_IN
Definition: IfxScu_PinMap.c:66
IfxScu_REQ3B_P14_1_IN
IfxScu_Req_In IfxScu_REQ3B_P14_1_IN
Definition: IfxScu_PinMap.c:60
IfxScu_REQ4D_P15_5_IN
IfxScu_Req_In IfxScu_REQ4D_P15_5_IN
Definition: IfxScu_PinMap.c:63
IfxScu_REQ2C_P00_4_IN
IfxScu_Req_In IfxScu_REQ2C_P00_4_IN
Definition: IfxScu_PinMap.c:58
IfxScu_REQ7A_P20_9_IN
IfxScu_Req_In IfxScu_REQ7A_P20_9_IN
Definition: IfxScu_PinMap.c:67
IfxScu_Extclk_Out_pinTable
const IfxScu_Extclk_Out * IfxScu_Extclk_Out_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS]
Definition: IfxScu_PinMap.c:78
IFXSCU_PINMAP_NUM_REQUESTS
#define IFXSCU_PINMAP_NUM_REQUESTS
Definition: IfxScu_PinMap.h:131
IfxScu_REQ1C_P10_8_IN
IfxScu_Req_In IfxScu_REQ1C_P10_8_IN
Definition: IfxScu_PinMap.c:55
IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS
#define IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS
Definition: IfxScu_PinMap.h:132
IfxScu_EMGSTOPB_P21_2_IN
IfxScu_Emgstop_In IfxScu_EMGSTOPB_P21_2_IN
Definition: IfxScu_PinMap.c:46
IfxScu_REQ3A_P10_3_IN
IfxScu_Req_In IfxScu_REQ3A_P10_3_IN
Definition: IfxScu_PinMap.c:59
IfxScu_REQ5A_P15_8_IN
IfxScu_Req_In IfxScu_REQ5A_P15_8_IN
Definition: IfxScu_PinMap.c:64
IfxScu_Req_In
External Request pin mapping structure.
Definition: IfxScu_PinMap.h:64
IfxScu_REQ0A_P15_4_IN
IfxScu_Req_In IfxScu_REQ0A_P15_4_IN
Definition: IfxScu_PinMap.c:52
IfxScu_EXTCLK0_P23_1_OUT
IfxScu_Extclk_Out IfxScu_EXTCLK0_P23_1_OUT
Definition: IfxScu_PinMap.c:48
IfxScu_Emgstop_In_pinTable
const IfxScu_Emgstop_In * IfxScu_Emgstop_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS]
Definition: IfxScu_PinMap.c:71
IFXSCU_PINMAP_REQ_IN_NUM_ITEMS
#define IFXSCU_PINMAP_REQ_IN_NUM_ITEMS
Definition: IfxScu_PinMap.h:134


iLLD_TC38A: IfxScu_PinMap.h Source File

  • _PinMap
IfxScu_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxScu_PinMap.h
3 * \brief SCU I/O map
4 * \ingroup IfxLld_Scu
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Scu_pinmap SCU Pin Mapping
42 * \ingroup IfxLld_Scu
43 */
44
45 #ifndef IFXSCU_PINMAP_H
46 #define IFXSCU_PINMAP_H
47
48 #include <IfxScu_reg.h>
49 #include <_Impl/IfxScu_cfg.h>
50 #include <Port/Std/IfxPort.h>
51
52 /** \addtogroup IfxLld_Scu_pinmap
53 * \{ */
54
55 /** \brief EVR Wakeup pin mapping structure */
56 typedef const struct
57 {
58 Ifx_SCU* module; /**< \brief Base address */
59 IfxPort_Pin pin; /**< \brief Port pin */
60 Ifx_RxSel select; /**< \brief Input multiplexer value */
61 } IfxScu_Evrwup_In;
62
63 /** \brief External Request pin mapping structure */
64 typedef const struct
65 {
66 Ifx_SCU* module; /**< \brief Base address */
67 uint8 channelId; /**< \brief ERU Channel ID */
68 IfxPort_Pin pin; /**< \brief Port pin */
69 Ifx_RxSel select; /**< \brief Input multiplexer value */
70 } IfxScu_Req_In;
71
72 /** \brief DCDC Sync pin mapping structure */
73 typedef const struct
74 {
75 Ifx_SCU* module; /**< \brief Base address */
76 IfxPort_Pin pin; /**< \brief Port pin */
77 IfxPort_OutputIdx select; /**< \brief Port control code */
78 } IfxScu_Dcdcsync_Out;
79
80 /** \brief Emergency Stop pin mapping structure */
81 typedef const struct
82 {
83 Ifx_SCU* module; /**< \brief Base address */
84 IfxPort_Pin pin; /**< \brief Port pin */
85 Ifx_RxSel select; /**< \brief Input multiplexer value */
86 } IfxScu_Emgstop_In;
87
88 /** \brief Watchdog Timer Lock pin mapping structure */
89 typedef const struct
90 {
91 Ifx_SCU* module; /**< \brief Base address */
92 IfxPort_Pin pin; /**< \brief Port pin */
93 IfxPort_OutputIdx select; /**< \brief Port control code */
94 } IfxScu_Wdtlck_Out;
95
96 /** \brief External Clock pin mapping structure */
97 typedef const struct
98 {
99 Ifx_SCU* module; /**< \brief Base address */
100 IfxPort_Pin pin; /**< \brief Port pin */
101 IfxPort_OutputIdx select; /**< \brief Port control code */
102 } IfxScu_Extclk_Out;
103
104 IFX_EXTERN IfxScu_Emgstop_In IfxScu_EMGSTOPA_P33_8_IN; /**< \brief Emergency stop Port Pin A input request */
105 IFX_EXTERN IfxScu_Emgstop_In IfxScu_EMGSTOPB_P21_2_IN; /**< \brief Emergency stop Port Pin B input request */
106 IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK0_P00_15_OUT; /**< \brief External Clock 0 */
107 IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK0_P23_1_OUT; /**< \brief External Clock 0 */
108 IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK1_P00_13_OUT; /**< \brief External Clock 1 */
109 IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK1_P11_12_OUT; /**< \brief External Clock 1 */
110 IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK1_P32_4_OUT; /**< \brief External Clock 1 */
111 IFX_EXTERN IfxScu_Req_In IfxScu_REQ0A_P15_4_IN; /**< \brief ERU Channel 0 inputs 0 to 5 (0 is the LSB and 5 is the MSB) */
112 IFX_EXTERN IfxScu_Req_In IfxScu_REQ0C_P10_7_IN; /**< \brief ERU Channel 0 inputs 0 to 5 (0 is the LSB and 5 is the MSB) */
113 IFX_EXTERN IfxScu_Req_In IfxScu_REQ1A_P14_3_IN; /**< \brief ERU Channel 1 inputs 0 to 5 (0 is the LSB and 5 is the MSB) */
114 IFX_EXTERN IfxScu_Req_In IfxScu_REQ1C_P10_8_IN; /**< \brief ERU Channel 1 inputs 0 to 5 (0 is the LSB and 5 is the MSB) */
115 IFX_EXTERN IfxScu_Req_In IfxScu_REQ2A_P10_2_IN; /**< \brief ERU Channel 2 inputs 0 to 5 (0 is the LSB and 5 is the MSB) */
116 IFX_EXTERN IfxScu_Req_In IfxScu_REQ2B_P02_1_IN; /**< \brief ERU Channel 2 inputs 0 to 5 (0 is the LSB and 5 is the MSB) */
117 IFX_EXTERN IfxScu_Req_In IfxScu_REQ2C_P00_4_IN; /**< \brief ERU Channel 2 inputs 0 to 5 (0 is the LSB and 5 is the MSB) */
118 IFX_EXTERN IfxScu_Req_In IfxScu_REQ3A_P10_3_IN; /**< \brief ERU Channel 3 inputs 0 to 5 (0 is the LSB and 5 is the MSB) */
119 IFX_EXTERN IfxScu_Req_In IfxScu_REQ3B_P14_1_IN; /**< \brief ERU Channel 3 inputs 0 to 5 (0 is the LSB and 5 is the MSB) */
120 IFX_EXTERN IfxScu_Req_In IfxScu_REQ3C_P02_0_IN; /**< \brief ERU Channel 3 inputs 0 to 5 (0 is the LSB and 5 is the MSB) */
121 IFX_EXTERN IfxScu_Req_In IfxScu_REQ4A_P33_7_IN; /**< \brief ERU Channel 4 inputs 0 to 5 (0 is the LSB and 5 is the MSB) */
122 IFX_EXTERN IfxScu_Req_In IfxScu_REQ4D_P15_5_IN; /**< \brief ERU Channel 4 inputs 0 to 5 (0 is the LSB and 5 is the MSB) */
123 IFX_EXTERN IfxScu_Req_In IfxScu_REQ5A_P15_8_IN; /**< \brief ERU Channel 5 inputs 0 to 5 (0 is the LSB and 5 is the MSB) */
124 IFX_EXTERN IfxScu_Req_In IfxScu_REQ6A_P20_0_IN; /**< \brief ERU Channel 6 inputs 0 to 5 (0 is the LSB and 5 is the MSB) */
125 IFX_EXTERN IfxScu_Req_In IfxScu_REQ6D_P11_10_IN; /**< \brief ERU Channel 6 inputs 0 to 5 (0 is the LSB and 5 is the MSB) */
126 IFX_EXTERN IfxScu_Req_In IfxScu_REQ7A_P20_9_IN; /**< \brief ERU Channel 7 inputs 0 to 5 (0 is the LSB and 5 is the MSB) */
127 IFX_EXTERN IfxScu_Req_In IfxScu_REQ7C_P15_1_IN; /**< \brief ERU Channel 7 inputs 0 to 5 (0 is the LSB and 5 is the MSB) */
128
129 /** \brief Table dimensions */
130 #define IFXSCU_PINMAP_NUM_MODULES 1
131 #define IFXSCU_PINMAP_NUM_REQUESTS 8
132 #define IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS 2
133 #define IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS 5
134 #define IFXSCU_PINMAP_REQ_IN_NUM_ITEMS 4
135
136
137 /** \brief IfxScu_Emgstop_In table */
138 IFX_EXTERN const IfxScu_Emgstop_In *IfxScu_Emgstop_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS];
139
140 /** \brief IfxScu_Extclk_Out table */
141 IFX_EXTERN const IfxScu_Extclk_Out *IfxScu_Extclk_Out_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS];
142
143 /** \brief IfxScu_Req_In table */
144 IFX_EXTERN const IfxScu_Req_In *IfxScu_Req_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_NUM_REQUESTS][IFXSCU_PINMAP_REQ_IN_NUM_ITEMS];
145
146 /** \} */
147
148 #endif /* IFXSCU_PINMAP_H */
IfxScu_REQ1C_P10_8_IN
IFX_EXTERN IfxScu_Req_In IfxScu_REQ1C_P10_8_IN
ERU Channel 1 inputs 0 to 5 (0 is the LSB and 5 is the MSB)
Definition: IfxScu_PinMap.h:114
IfxScu_Extclk_Out
External Clock pin mapping structure.
Definition: IfxScu_PinMap.h:97
IFXSCU_PINMAP_NUM_MODULES
#define IFXSCU_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxScu_PinMap.h:130
IfxScu_Emgstop_In
Emergency Stop pin mapping structure.
Definition: IfxScu_PinMap.h:81
IfxScu_Req_In::channelId
uint8 channelId
ERU Channel ID.
Definition: IfxScu_PinMap.h:67
IfxScu_EXTCLK0_P23_1_OUT
IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK0_P23_1_OUT
External Clock 0.
Definition: IfxScu_PinMap.h:107
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:126
IfxScu_Req_In_pinTable
IFX_EXTERN const IfxScu_Req_In * IfxScu_Req_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_NUM_REQUESTS][IFXSCU_PINMAP_REQ_IN_NUM_ITEMS]
IfxScu_Req_In table.
Definition: IfxScu_PinMap.h:144
IfxScu_Evrwup_In::module
Ifx_SCU * module
Base address.
Definition: IfxScu_PinMap.h:58
IfxScu_REQ2A_P10_2_IN
IFX_EXTERN IfxScu_Req_In IfxScu_REQ2A_P10_2_IN
ERU Channel 2 inputs 0 to 5 (0 is the LSB and 5 is the MSB)
Definition: IfxScu_PinMap.h:115
IfxScu_Dcdcsync_Out
DCDC Sync pin mapping structure.
Definition: IfxScu_PinMap.h:73
IfxScu_REQ6A_P20_0_IN
IFX_EXTERN IfxScu_Req_In IfxScu_REQ6A_P20_0_IN
ERU Channel 6 inputs 0 to 5 (0 is the LSB and 5 is the MSB)
Definition: IfxScu_PinMap.h:124
IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS
#define IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS
Definition: IfxScu_PinMap.h:133
IfxScu_EMGSTOPA_P33_8_IN
IFX_EXTERN IfxScu_Emgstop_In IfxScu_EMGSTOPA_P33_8_IN
Emergency stop Port Pin A input request.
Definition: IfxScu_PinMap.h:104
IfxScu_Dcdcsync_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxScu_PinMap.h:77
IfxScu_REQ0C_P10_7_IN
IFX_EXTERN IfxScu_Req_In IfxScu_REQ0C_P10_7_IN
ERU Channel 0 inputs 0 to 5 (0 is the LSB and 5 is the MSB)
Definition: IfxScu_PinMap.h:112
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxScu_REQ1A_P14_3_IN
IFX_EXTERN IfxScu_Req_In IfxScu_REQ1A_P14_3_IN
ERU Channel 1 inputs 0 to 5 (0 is the LSB and 5 is the MSB)
Definition: IfxScu_PinMap.h:113
IfxScu_REQ3A_P10_3_IN
IFX_EXTERN IfxScu_Req_In IfxScu_REQ3A_P10_3_IN
ERU Channel 3 inputs 0 to 5 (0 is the LSB and 5 is the MSB)
Definition: IfxScu_PinMap.h:118
IfxScu_REQ2B_P02_1_IN
IFX_EXTERN IfxScu_Req_In IfxScu_REQ2B_P02_1_IN
ERU Channel 2 inputs 0 to 5 (0 is the LSB and 5 is the MSB)
Definition: IfxScu_PinMap.h:116
IfxScu_EMGSTOPB_P21_2_IN
IFX_EXTERN IfxScu_Emgstop_In IfxScu_EMGSTOPB_P21_2_IN
Emergency stop Port Pin B input request.
Definition: IfxScu_PinMap.h:105
IfxScu_EXTCLK0_P00_15_OUT
IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK0_P00_15_OUT
External Clock 0.
Definition: IfxScu_PinMap.h:106
IfxScu_cfg.h
SCU on-chip implementation data.
IfxScu_REQ3C_P02_0_IN
IFX_EXTERN IfxScu_Req_In IfxScu_REQ3C_P02_0_IN
ERU Channel 3 inputs 0 to 5 (0 is the LSB and 5 is the MSB)
Definition: IfxScu_PinMap.h:120
IfxScu_EXTCLK1_P00_13_OUT
IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK1_P00_13_OUT
External Clock 1.
Definition: IfxScu_PinMap.h:108
IfxScu_EXTCLK1_P11_12_OUT
IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK1_P11_12_OUT
External Clock 1.
Definition: IfxScu_PinMap.h:109
IfxScu_REQ4A_P33_7_IN
IFX_EXTERN IfxScu_Req_In IfxScu_REQ4A_P33_7_IN
ERU Channel 4 inputs 0 to 5 (0 is the LSB and 5 is the MSB)
Definition: IfxScu_PinMap.h:121
IfxScu_REQ5A_P15_8_IN
IFX_EXTERN IfxScu_Req_In IfxScu_REQ5A_P15_8_IN
ERU Channel 5 inputs 0 to 5 (0 is the LSB and 5 is the MSB)
Definition: IfxScu_PinMap.h:123
IfxScu_Extclk_Out_pinTable
IFX_EXTERN const IfxScu_Extclk_Out * IfxScu_Extclk_Out_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS]
IfxScu_Extclk_Out table.
Definition: IfxScu_PinMap.h:141
IfxScu_EXTCLK1_P32_4_OUT
IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK1_P32_4_OUT
External Clock 1.
Definition: IfxScu_PinMap.h:110
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:246
IFXSCU_PINMAP_NUM_REQUESTS
#define IFXSCU_PINMAP_NUM_REQUESTS
Definition: IfxScu_PinMap.h:131
IfxScu_REQ0A_P15_4_IN
IFX_EXTERN IfxScu_Req_In IfxScu_REQ0A_P15_4_IN
ERU Channel 0 inputs 0 to 5 (0 is the LSB and 5 is the MSB)
Definition: IfxScu_PinMap.h:111
Ifx_RxSel
Ifx_RxSel
input multiplexer definition used in PinMaps
Definition: Ifx_Types.h:127
IfxScu_REQ4D_P15_5_IN
IFX_EXTERN IfxScu_Req_In IfxScu_REQ4D_P15_5_IN
ERU Channel 4 inputs 0 to 5 (0 is the LSB and 5 is the MSB)
Definition: IfxScu_PinMap.h:122
IfxScu_Wdtlck_Out
Watchdog Timer Lock pin mapping structure.
Definition: IfxScu_PinMap.h:89
IfxScu_Evrwup_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxScu_PinMap.h:59
IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS
#define IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS
Definition: IfxScu_PinMap.h:132
IfxScu_REQ6D_P11_10_IN
IFX_EXTERN IfxScu_Req_In IfxScu_REQ6D_P11_10_IN
ERU Channel 6 inputs 0 to 5 (0 is the LSB and 5 is the MSB)
Definition: IfxScu_PinMap.h:125
IfxScu_Req_In
External Request pin mapping structure.
Definition: IfxScu_PinMap.h:64
IfxScu_REQ2C_P00_4_IN
IFX_EXTERN IfxScu_Req_In IfxScu_REQ2C_P00_4_IN
ERU Channel 2 inputs 0 to 5 (0 is the LSB and 5 is the MSB)
Definition: IfxScu_PinMap.h:117
IfxScu_REQ7C_P15_1_IN
IFX_EXTERN IfxScu_Req_In IfxScu_REQ7C_P15_1_IN
ERU Channel 7 inputs 0 to 5 (0 is the LSB and 5 is the MSB)
Definition: IfxScu_PinMap.h:127
IfxScu_Evrwup_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxScu_PinMap.h:60
IfxScu_REQ3B_P14_1_IN
IFX_EXTERN IfxScu_Req_In IfxScu_REQ3B_P14_1_IN
ERU Channel 3 inputs 0 to 5 (0 is the LSB and 5 is the MSB)
Definition: IfxScu_PinMap.h:119
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxScu_REQ7A_P20_9_IN
IFX_EXTERN IfxScu_Req_In IfxScu_REQ7A_P20_9_IN
ERU Channel 7 inputs 0 to 5 (0 is the LSB and 5 is the MSB)
Definition: IfxScu_PinMap.h:126
IfxScu_Evrwup_In
EVR Wakeup pin mapping structure.
Definition: IfxScu_PinMap.h:56
IfxScu_Emgstop_In_pinTable
IFX_EXTERN const IfxScu_Emgstop_In * IfxScu_Emgstop_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS]
IfxScu_Emgstop_In table.
Definition: IfxScu_PinMap.h:138
IFXSCU_PINMAP_REQ_IN_NUM_ITEMS
#define IFXSCU_PINMAP_REQ_IN_NUM_ITEMS
Definition: IfxScu_PinMap.h:134
IfxPort.h
PORT basic functionality.


iLLD_TC38A: IfxScu_cfg.c Source File

  • _Impl
IfxScu_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxScu_cfg.c
3 * \brief SCU on-chip implementation data
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxScu_cfg.h"
IfxScu_cfg.h
SCU on-chip implementation data.


iLLD_TC38A: IfxScu_cfg.h Source File

  • _Impl
IfxScu_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxScu_cfg.h
3 * \brief SCU on-chip implementation data
4 * \ingroup IfxLld_Scu
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Scu SCU
42 * \ingroup IfxLld
43 * \defgroup IfxLld_Scu_Impl Implementation
44 * \ingroup IfxLld_Scu
45 * \defgroup IfxLld_Scu_Std Standard Driver
46 * \ingroup IfxLld_Scu
47 */
48
49 #ifndef IFXSCU_CFG_H
50 #define IFXSCU_CFG_H
51 /******************************************************************************/
52 #include "Ifx_Cfg.h"
53 #include "IfxScu_bf.h"
54
55 /******************************************************************************/
56 /* Macro */
57 /******************************************************************************/
58 #ifndef IFX_CFG_SCU_XTAL_FREQUENCY
59 # define IFX_CFG_SCU_XTAL_FREQUENCY 20000000 /**< \brief Default External oscillator frequency */
60 # warning "IFX_CFG_SCU_XTAL_FREQUENCY not specified in your IfxCfg.h file."
61 # warning "Please double check the external XTAL frequency with the default setting of 20 MHz!"
62 #endif
63
64 #ifndef IFX_CFG_SCU_SYSCLK_FREQUENCY
65 # define IFX_CFG_SCU_SYSCLK_FREQUENCY 20000000 /**< \brief Default External SysClk pin frequency */
66 #endif
67
68 #ifndef IFX_CFG_SCU_PLL_FREQUENCY
69 # define IFX_CFG_SCU_PLL_FREQUENCY 300000000 /**< \brief Default PLL frequency */
70 #endif
71
72 #ifndef IFX_CFG_SCU_PLL1_FREQUENCY
73 # define IFX_CFG_SCU_PLL1_FREQUENCY 320000000 /**< \brief Default PER PLL1 frequency */
74 #endif
75
76 #ifndef IFX_CFG_SCU_PLL2_FREQUENCY
77 # define IFX_CFG_SCU_PLL2_FREQUENCY 200000000 /**< \brief Default PER PLL2 frequency */
78 #endif
79
80 #define IFXSCU_VCO_BASE_FREQUENCY (100000000.0)
81 #define IFXSCU_EVR_OSC_FREQUENCY (100000000.0)
82
83 /*The following frequency is the PLL free running frequency */
84
85
86 #define IFXSCU_PLL_FREERUNNING_FREQUENCY (100000000.0)
87
88 /* By Default - external crystal is chosen as input */
89 /* This can be set to external clock input by user */
90 #ifndef IFX_CFG_SCU_EXT_CLOCK
91 # define IFX_CFG_SCU_EXT_CLOCK 0 /**< \brief Default External Crystal input */
92 #endif
93
94
95 /* iLLD Configs from Master CFG file */
96 /*Utility macros for the configuration structure */
97 #if (IFX_CFG_SCU_XTAL_FREQUENCY == (20000000))
98 #define IFXSCU_CFG_XTAL_FREQ 20MHZ
99 #elif (IFX_CFG_SCU_XTAL_FREQUENCY == (25000000))
100 #define IFXSCU_CFG_XTAL_FREQ 25MHZ
101 #elif (IFX_CFG_SCU_XTAL_FREQUENCY == (40000000))
102 #define IFXSCU_CFG_XTAL_FREQ 40MHZ
103 #elif (IFX_CFG_SCU_XTAL_FREQUENCY == (16000000))
104 #define IFXSCU_CFG_XTAL_FREQ 16MHZ
105 #else
106 #error "Wrong XTAL frequency configuration! check IFX_CFG_SCU_XTAL_FREQUENCY configuration in Ifx_Cfg.h."
107 #error "AurixPlus Triboard supported crystal frequencies are 16MHz, 20MHz, 25MHz and 40MHz"
108 #endif
109
110 #if (IFX_CFG_SCU_PLL_FREQUENCY == (80000000))
111 #define IFXSCU_CFG_PLL_FREQ 80MHZ
112 #elif (IFX_CFG_SCU_PLL_FREQUENCY == (133000000)) && (IFX_CFG_SCU_XTAL_FREQUENCY != (8000000))
113 #define IFXSCU_CFG_PLL_FREQ 133MHZ
114 #elif (IFX_CFG_SCU_PLL_FREQUENCY == (160000000))
115 #define IFXSCU_CFG_PLL_FREQ 160MHZ
116 #elif (IFX_CFG_SCU_PLL_FREQUENCY == (200000000))
117 #define IFXSCU_CFG_PLL_FREQ 200MHZ
118 #elif (IFX_CFG_SCU_PLL_FREQUENCY == (240000000))
119 #define IFXSCU_CFG_PLL_FREQ 240MHZ
120 #elif (IFX_CFG_SCU_PLL_FREQUENCY == (300000000))
121 #define IFXSCU_CFG_PLL_FREQ 300MHZ
122 #else
123 #error "Wrong PLL frequency configuration!, check IFX_CFG_SCU_PLL_FREQUENCY configuration in Ifx_Cfg.h."
124 #error "Supported PLL frequencies are 80MHz, 133MHz (8MHz XTAL doesn't support), 160Mhz, 200MHz, 240Mhz, and 300MHz."
125 #endif
126 /******************************************************************************/
127 /* Per PLL Config */
128 /******************************************************************************/
129
130 #if (IFX_CFG_SCU_PLL1_FREQUENCY == (320000000))
131 #define IFXSCU_CFG_PLL1_FREQ 320MHZ
132 #elif (IFX_CFG_SCU_PLL1_FREQUENCY == (160000000))
133 #define IFXSCU_CFG_PLL1_FREQ 160MHZ
134 #else
135 #error "Wrong PLL1 frequency configuration!, check IFX_CFG_SCU_PLL1_FREQUENCY configuration in Ifx_Cfg.h."
136 #error "Supported PLL1 frequencies are 160MHz and 320MHz."
137 #endif
138
139 #if (IFX_CFG_SCU_PLL2_FREQUENCY == (200000000))
140 #define IFXSCU_CFG_PLL2_FREQ 200MHZ
141 #else
142 #error "Wrong PLL2 frequency configuration!, check IFX_CFG_SCU_PLL2_FREQUENCY configuration in Ifx_Cfg.h."
143 #error "Supported PLL2 frequency is 200MHz."
144 #endif
145
146
147
148 /***************************************************************************************************/
149 /*************************MACROS To Configure SYSPLL Steps******************************************/
150 /* These Macros are used to Configure different profiles of frequency jump from FOsc to Target Freq*/
151 /* This is Important for the current jump Control during Clock Throttling */
152 /***************************************************************************************************/
153
154 #ifndef IFXSCU_CFG_PLL_STEPS_FDCO_640MHZ_TO_TARGET_80MHZ
155 #define IFXSCU_CFG_PLL_STEPS_FDCO_640MHZ_TO_TARGET_80MHZ \
156 { /*Step 1 Config: 80MHz*/ \
157 (8 - 1), /*uint8 k2Step;*/ \
158 0.000100, /*float32 waitTime;*/ \
159 }
160 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_FDCO_640MHZ_TO_TARGET_80MHZ */
161
162
163 #ifndef IFXSCU_CFG_PLL_STEPS_FDCO_800MHZ_TO_TARGET_133MHZ
164 #define IFXSCU_CFG_PLL_STEPS_FDCO_800MHZ_TO_TARGET_133MHZ \
165 { /*Step 1 Config: 133.333333333333MHz*/ \
166 (6 - 1), /*uint8 k2Step;*/ \
167 0.000100, /*float32 waitTime;*/ \
168 }
169 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_FDCO_800MHZ_TO_TARGET_133MHZ */
170
171
172 #ifndef IFXSCU_CFG_PLL_STEPS_FDCO_720MHZ_TO_TARGET_240MHZ
173 #define IFXSCU_CFG_PLL_STEPS_FDCO_720MHZ_TO_TARGET_240MHZ \
174 { /*Step 1 Config: 120MHz*/ \
175 (6 - 1), /*uint8 k2Step;*/ \
176 0.000100, /*float32 waitTime;*/ \
177 }, \
178 { /*Step 2 Config: 180MHz*/ \
179 (4 - 1), /*uint8 k2Step;*/ \
180 0.000100, /*float32 waitTime;*/ \
181 }, \
182 { /*Step 3 Config: 240MHz*/ \
183 (3 - 1), /*uint8 k2Step;*/ \
184 0.000100, /*float32 waitTime;*/ \
185 }
186 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_FDCO_720MHZ_TO_TARGET_240MHZ */
187
188
189 #ifndef IFXSCU_CFG_PLL_STEPS_FDCO_600MHZ_TO_TARGET_300MHZ
190 #define IFXSCU_CFG_PLL_STEPS_FDCO_600MHZ_TO_TARGET_300MHZ \
191 { /*Step 1 Config: 150MHz*/ \
192 (4 - 1), /*uint8 k2Step;*/ \
193 0.000100, /*float32 waitTime;*/ \
194 }, \
195 { /*Step 2 Config: 200MHz*/ \
196 (3 - 1), /*uint8 k2Step;*/ \
197 0.000100, /*float32 waitTime;*/ \
198 }, \
199 { /*Step 3 Config: 300MHz*/ \
200 (2 - 1), /*uint8 k2Step;*/ \
201 0.000100, /*float32 waitTime;*/ \
202 }
203 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_FDCO_600MHZ_TO_TARGET_300MHZ */
204
205
206 #ifndef IFXSCU_CFG_PLL_STEPS_FDCO_600MHZ_TO_TARGET_200MHZ
207 #define IFXSCU_CFG_PLL_STEPS_FDCO_600MHZ_TO_TARGET_200MHZ \
208 { /*Step 1 Config: 150MHz*/ \
209 (4 - 1), /*uint8 k2Step;*/ \
210 0.000100, /*float32 waitTime;*/ \
211 }, \
212 { /*Step 2 Config: 200MHz*/ \
213 (3 - 1), /*uint8 k2Step;*/ \
214 0.000100, /*float32 waitTime;*/ \
215 }
216 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_FDCO_600MHZ_TO_TARGET_200MHZ */
217
218
219
220 /***************************************************************************************************/
221 /*********************** SYSPLL CONFIGURATIONS *****************************************************/
222 /***************************************************************************************************/
223
224 /*******************************16MHz Oscillator Frequency******************************************/
225
226
227 /************** Target = 80MHz *****************/
228
229 #ifndef IFXSCU_CFG_SYS_PLL_16MHZ_80MHZ
230 /**** Macro for Initial Pll step, for profile with 16MHz Crystal and 80MHz target (fDCO= 640)*/
231 #define IFXSCU_CFG_SYS_PLL_16MHZ_80MHZ \
232 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial }*/ \
233 {(1 - 1), (40 - 1), (6 - 1)}
234 #endif /*#ifndef IFXSCU_CFG_SYS_PLL_16MHZ_80MHZ */
235
236 #ifndef IFXSCU_CFG_WAIT_INITIAL_STEP_16MHZ_80MHZ
237 #define IFXSCU_CFG_WAIT_INITIAL_STEP_16MHZ_80MHZ 0.000200F
238 #endif /*#ifndef IFXSCU_CFG_WAIT_INITIAL_STEP_16MHZ_80MHZ */
239
240 #ifndef IFXSCU_CFG_PLL_STEPS_16MHZ_80MHZ
241 /**** Macro for Pll step for profile with 16MHz Crystal and 80MHz target (fDCO= 640MHz)*/
242 #define IFXSCU_CFG_PLL_STEPS_16MHZ_80MHZ IFXSCU_CFG_PLL_STEPS_FDCO_640MHZ_TO_TARGET_80MHZ
243 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_16MHZ_80MHZ */
244
245 /************** Target = 133MHz *****************/
246
247 #ifndef IFXSCU_CFG_SYS_PLL_16MHZ_133MHZ
248 /**** Macro for Initial Pll step, for profile with 16MHz Crystal and 133MHz target (fDCO= 800)*/
249 #define IFXSCU_CFG_SYS_PLL_16MHZ_133MHZ \
250 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial }*/ \
251 {(1 - 1), (50 - 1), (8 - 1)}
252 #endif /*#ifndef IFXSCU_CFG_SYS_PLL_16MHZ_133MHZ */
253
254 #ifndef IFXSCU_CFG_WAIT_INITIAL_STEP_16MHZ_133MHZ
255 #define IFXSCU_CFG_WAIT_INITIAL_STEP_16MHZ_133MHZ 0.000200F
256 #endif /*#ifndef IFXSCU_CFG_WAIT_INITIAL_STEP_16MHZ_133MHZ */
257
258 #ifndef IFXSCU_CFG_PLL_STEPS_16MHZ_133MHZ
259 /**** Macro for Pll step for profile with 16MHz Crystal and 133MHz target (fDCO= 800MHz)*/
260 #define IFXSCU_CFG_PLL_STEPS_16MHZ_133MHZ IFXSCU_CFG_PLL_STEPS_FDCO_800MHZ_TO_TARGET_133MHZ
261 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_16MHZ_133MHZ */
262
263 /************** Target = 240MHz *****************/
264
265 #ifndef IFXSCU_CFG_SYS_PLL_16MHZ_240MHZ
266 /**** Macro for Initial Pll step, for profile with 16MHz Crystal and 240MHz target (fDCO= 720)*/
267 #define IFXSCU_CFG_SYS_PLL_16MHZ_240MHZ \
268 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial }*/ \
269 {(1 - 1), (45 - 1), (8 - 1)}
270 #endif /*#ifndef IFXSCU_CFG_SYS_PLL_16MHZ_240MHZ */
271
272 #ifndef IFXSCU_CFG_WAIT_INITIAL_STEP_16MHZ_240MHZ
273 #define IFXSCU_CFG_WAIT_INITIAL_STEP_16MHZ_240MHZ 0.000200F
274 #endif /*#ifndef IFXSCU_CFG_WAIT_INITIAL_STEP_16MHZ_240MHZ */
275
276 #ifndef IFXSCU_CFG_PLL_STEPS_16MHZ_240MHZ
277 /**** Macro for Pll step for profile with 16MHz Crystal and 240MHz target (fDCO= 720MHz)*/
278 #define IFXSCU_CFG_PLL_STEPS_16MHZ_240MHZ IFXSCU_CFG_PLL_STEPS_FDCO_720MHZ_TO_TARGET_240MHZ
279 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_16MHZ_240MHZ */
280
281 /************** Target = 300MHz *****************/
282
283 #ifndef IFXSCU_CFG_SYS_PLL_16MHZ_300MHZ
284 /**** Macro for Initial Pll step, for profile with 16MHz Crystal and 300MHz target (fDCO= 600)*/
285 #define IFXSCU_CFG_SYS_PLL_16MHZ_300MHZ \
286 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial }*/ \
287 {(2 - 1), (75 - 1), (6 - 1)}
288 #endif /*#ifndef IFXSCU_CFG_SYS_PLL_16MHZ_300MHZ */
289
290 #ifndef IFXSCU_CFG_WAIT_INITIAL_STEP_16MHZ_300MHZ
291 #define IFXSCU_CFG_WAIT_INITIAL_STEP_16MHZ_300MHZ 0.000200F
292 #endif /*#ifndef IFXSCU_CFG_WAIT_INITIAL_STEP_16MHZ_300MHZ */
293
294 #ifndef IFXSCU_CFG_PLL_STEPS_16MHZ_300MHZ
295 /**** Macro for Pll step for profile with 16MHz Crystal and 300MHz target (fDCO= 600MHz)*/
296 #define IFXSCU_CFG_PLL_STEPS_16MHZ_300MHZ IFXSCU_CFG_PLL_STEPS_FDCO_600MHZ_TO_TARGET_300MHZ
297 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_16MHZ_300MHZ */
298
299 /*******************************20MHz Oscillator Frequency******************************************/
300
301
302 /************** Target = 200MHz *****************/
303
304 #ifndef IFXSCU_CFG_SYS_PLL_20MHZ_200MHZ
305 /**** Macro for Initial Pll step, for profile with 20MHz Crystal and 200MHz target (fDCO= 600)*/
306 #define IFXSCU_CFG_SYS_PLL_20MHZ_200MHZ \
307 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial }*/ \
308 {(1 - 1), (30 - 1), (6 - 1)}
309 #endif /*#ifndef IFXSCU_CFG_SYS_PLL_20MHZ_200MHZ */
310
311 #ifndef IFXSCU_CFG_WAIT_INITIAL_STEP_20MHZ_200MHZ
312 #define IFXSCU_CFG_WAIT_INITIAL_STEP_20MHZ_200MHZ 0.000200F
313 #endif /*#ifndef IFXSCU_CFG_WAIT_INITIAL_STEP_20MHZ_200MHZ */
314
315 #ifndef IFXSCU_CFG_PLL_STEPS_20MHZ_200MHZ
316 /**** Macro for Pll step for profile with 20MHz Crystal and 200MHz target (fDCO= 600MHz)*/
317 #define IFXSCU_CFG_PLL_STEPS_20MHZ_200MHZ IFXSCU_CFG_PLL_STEPS_FDCO_600MHZ_TO_TARGET_200MHZ
318 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_20MHZ_200MHZ */
319
320 /************** Target = 240MHz *****************/
321
322 #ifndef IFXSCU_CFG_SYS_PLL_20MHZ_240MHZ
323 /**** Macro for Initial Pll step, for profile with 20MHz Crystal and 240MHz target (fDCO= 720)*/
324 #define IFXSCU_CFG_SYS_PLL_20MHZ_240MHZ \
325 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial }*/ \
326 {(1 - 1), (36 - 1), (8 - 1)}
327 #endif /*#ifndef IFXSCU_CFG_SYS_PLL_20MHZ_240MHZ */
328
329 #ifndef IFXSCU_CFG_WAIT_INITIAL_STEP_20MHZ_240MHZ
330 #define IFXSCU_CFG_WAIT_INITIAL_STEP_20MHZ_240MHZ 0.000200F
331 #endif /*#ifndef IFXSCU_CFG_WAIT_INITIAL_STEP_20MHZ_240MHZ */
332
333 #ifndef IFXSCU_CFG_PLL_STEPS_20MHZ_240MHZ
334 /**** Macro for Pll step for profile with 20MHz Crystal and 240MHz target (fDCO= 720MHz)*/
335 #define IFXSCU_CFG_PLL_STEPS_20MHZ_240MHZ IFXSCU_CFG_PLL_STEPS_FDCO_720MHZ_TO_TARGET_240MHZ
336 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_20MHZ_240MHZ */
337
338 /************** Target = 300MHz *****************/
339
340 #ifndef IFXSCU_CFG_SYS_PLL_20MHZ_300MHZ
341 /**** Macro for Initial Pll step, for profile with 20MHz Crystal and 300MHz target (fDCO= 600)*/
342 #define IFXSCU_CFG_SYS_PLL_20MHZ_300MHZ \
343 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial }*/ \
344 {(1 - 1), (30 - 1), (6 - 1)}
345 #endif /*#ifndef IFXSCU_CFG_SYS_PLL_20MHZ_300MHZ */
346
347 #ifndef IFXSCU_CFG_WAIT_INITIAL_STEP_20MHZ_300MHZ
348 #define IFXSCU_CFG_WAIT_INITIAL_STEP_20MHZ_300MHZ 0.000200F
349 #endif /*#ifndef IFXSCU_CFG_WAIT_INITIAL_STEP_20MHZ_300MHZ */
350
351 #ifndef IFXSCU_CFG_PLL_STEPS_20MHZ_300MHZ
352 /**** Macro for Pll step for profile with 20MHz Crystal and 300MHz target (fDCO= 600MHz)*/
353 #define IFXSCU_CFG_PLL_STEPS_20MHZ_300MHZ IFXSCU_CFG_PLL_STEPS_FDCO_600MHZ_TO_TARGET_300MHZ
354 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_20MHZ_300MHZ */
355
356 /*******************************25MHz Oscillator Frequency******************************************/
357
358
359 /************** Target = 200MHz *****************/
360
361 #ifndef IFXSCU_CFG_SYS_PLL_25MHZ_200MHZ
362 /**** Macro for Initial Pll step, for profile with 25MHz Crystal and 200MHz target (fDCO= 600)*/
363 #define IFXSCU_CFG_SYS_PLL_25MHZ_200MHZ \
364 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial }*/ \
365 {(1 - 1), (24 - 1), (6 - 1)}
366 #endif /*#ifndef IFXSCU_CFG_SYS_PLL_25MHZ_200MHZ */
367
368 #ifndef IFXSCU_CFG_WAIT_INITIAL_STEP_25MHZ_200MHZ
369 #define IFXSCU_CFG_WAIT_INITIAL_STEP_25MHZ_200MHZ 0.000200F
370 #endif /*#ifndef IFXSCU_CFG_WAIT_INITIAL_STEP_25MHZ_200MHZ */
371
372 #ifndef IFXSCU_CFG_PLL_STEPS_25MHZ_200MHZ
373 /**** Macro for Pll step for profile with 25MHz Crystal and 200MHz target (fDCO= 600MHz)*/
374 #define IFXSCU_CFG_PLL_STEPS_25MHZ_200MHZ IFXSCU_CFG_PLL_STEPS_FDCO_600MHZ_TO_TARGET_200MHZ
375 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_25MHZ_200MHZ */
376
377 /************** Target = 300MHz *****************/
378
379 #ifndef IFXSCU_CFG_SYS_PLL_25MHZ_300MHZ
380 /**** Macro for Initial Pll step, for profile with 25MHz Crystal and 300MHz target (fDCO= 600)*/
381 #define IFXSCU_CFG_SYS_PLL_25MHZ_300MHZ \
382 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial }*/ \
383 {(1 - 1), (24 - 1), (6 - 1)}
384 #endif /*#ifndef IFXSCU_CFG_SYS_PLL_25MHZ_300MHZ */
385
386 #ifndef IFXSCU_CFG_WAIT_INITIAL_STEP_25MHZ_300MHZ
387 #define IFXSCU_CFG_WAIT_INITIAL_STEP_25MHZ_300MHZ 0.000200F
388 #endif /*#ifndef IFXSCU_CFG_WAIT_INITIAL_STEP_25MHZ_300MHZ */
389
390 #ifndef IFXSCU_CFG_PLL_STEPS_25MHZ_300MHZ
391 /**** Macro for Pll step for profile with 25MHz Crystal and 300MHz target (fDCO= 600MHz)*/
392 #define IFXSCU_CFG_PLL_STEPS_25MHZ_300MHZ IFXSCU_CFG_PLL_STEPS_FDCO_600MHZ_TO_TARGET_300MHZ
393 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_25MHZ_300MHZ */
394
395 /*******************************40MHz Oscillator Frequency******************************************/
396
397
398 /************** Target = 200MHz *****************/
399
400 #ifndef IFXSCU_CFG_SYS_PLL_40MHZ_200MHZ
401 /**** Macro for Initial Pll step, for profile with 40MHz Crystal and 200MHz target (fDCO= 600)*/
402 #define IFXSCU_CFG_SYS_PLL_40MHZ_200MHZ \
403 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial }*/ \
404 {(1 - 1), (15 - 1), (6 - 1)}
405 #endif /*#ifndef IFXSCU_CFG_SYS_PLL_40MHZ_200MHZ */
406
407 #ifndef IFXSCU_CFG_WAIT_INITIAL_STEP_40MHZ_200MHZ
408 #define IFXSCU_CFG_WAIT_INITIAL_STEP_40MHZ_200MHZ 0.000200F
409 #endif /*#ifndef IFXSCU_CFG_WAIT_INITIAL_STEP_40MHZ_200MHZ */
410
411 #ifndef IFXSCU_CFG_PLL_STEPS_40MHZ_200MHZ
412 /**** Macro for Pll step for profile with 40MHz Crystal and 200MHz target (fDCO= 600MHz)*/
413 #define IFXSCU_CFG_PLL_STEPS_40MHZ_200MHZ IFXSCU_CFG_PLL_STEPS_FDCO_600MHZ_TO_TARGET_200MHZ
414 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_40MHZ_200MHZ */
415
416 /************** Target = 240MHz *****************/
417
418 #ifndef IFXSCU_CFG_SYS_PLL_40MHZ_240MHZ
419 /**** Macro for Initial Pll step, for profile with 40MHz Crystal and 240MHz target (fDCO= 720)*/
420 #define IFXSCU_CFG_SYS_PLL_40MHZ_240MHZ \
421 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial }*/ \
422 {(2 - 1), (36 - 1), (8 - 1)}
423 #endif /*#ifndef IFXSCU_CFG_SYS_PLL_40MHZ_240MHZ */
424
425 #ifndef IFXSCU_CFG_WAIT_INITIAL_STEP_40MHZ_240MHZ
426 #define IFXSCU_CFG_WAIT_INITIAL_STEP_40MHZ_240MHZ 0.000200F
427 #endif /*#ifndef IFXSCU_CFG_WAIT_INITIAL_STEP_40MHZ_240MHZ */
428
429 #ifndef IFXSCU_CFG_PLL_STEPS_40MHZ_240MHZ
430 /**** Macro for Pll step for profile with 40MHz Crystal and 240MHz target (fDCO= 720MHz)*/
431 #define IFXSCU_CFG_PLL_STEPS_40MHZ_240MHZ IFXSCU_CFG_PLL_STEPS_FDCO_720MHZ_TO_TARGET_240MHZ
432 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_40MHZ_240MHZ */
433
434 /************** Target = 300MHz *****************/
435
436 #ifndef IFXSCU_CFG_SYS_PLL_40MHZ_300MHZ
437 /**** Macro for Initial Pll step, for profile with 40MHz Crystal and 300MHz target (fDCO= 600)*/
438 #define IFXSCU_CFG_SYS_PLL_40MHZ_300MHZ \
439 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial }*/ \
440 {(1 - 1), (15 - 1), (6 - 1)}
441 #endif /*#ifndef IFXSCU_CFG_SYS_PLL_40MHZ_300MHZ */
442
443 #ifndef IFXSCU_CFG_WAIT_INITIAL_STEP_40MHZ_300MHZ
444 #define IFXSCU_CFG_WAIT_INITIAL_STEP_40MHZ_300MHZ 0.000200F
445 #endif /*#ifndef IFXSCU_CFG_WAIT_INITIAL_STEP_40MHZ_300MHZ */
446
447 #ifndef IFXSCU_CFG_PLL_STEPS_40MHZ_300MHZ
448 /**** Macro for Pll step for profile with 40MHz Crystal and 300MHz target (fDCO= 600MHz)*/
449 #define IFXSCU_CFG_PLL_STEPS_40MHZ_300MHZ IFXSCU_CFG_PLL_STEPS_FDCO_600MHZ_TO_TARGET_300MHZ
450 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_40MHZ_300MHZ */
451
452 /***************************************************************************************************/
453 /*********************** PERPLL CONFIGURATIONS *****************************************************/
454 /***************************************************************************************************/
455
456 /*******************************16MHz Oscillator Frequency******************************************/
457
458
459 /************** Fpll1 = 320MHz, Fpll2 = 200MHz *****************/
460
461 #ifndef IFXSCU_CFG_PER_PLL_16MHZ_320MHZ_200MHZ
462 /** \brief Macro for Initial Pll step, for profile with 16MHz Crystal and 320/200MHz target (fDCO= 640)*/
463 #define IFXSCU_CFG_PER_PLL_16MHZ_320MHZ_200MHZ \
464 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, uint8 k3Initial, uint8 k3DividerBypass }*/\
465 {(1 - 1), (40 - 1), (2 - 1), (2 - 1), 0}
466 #endif /*#ifndef IFXSCU_CFG_PER_PLL_16MHZ_320MHZ_200MHZ */
467
468 /************** Fpll1 = 160MHz, Fpll2 = 200MHz *****************/
469
470 #ifndef IFXSCU_CFG_PER_PLL_16MHZ_160MHZ_200MHZ
471 /** \brief Macro for Initial Pll step, for profile with 16MHz Crystal and 160/200MHz target (fDCO= 640)*/
472 #define IFXSCU_CFG_PER_PLL_16MHZ_160MHZ_200MHZ \
473 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, uint8 k3Initial, uint8 k3DividerBypass }*/\
474 {(1 - 1), (40 - 1), (4 - 1), (2 - 1), 0}
475 #endif /*#ifndef IFXSCU_CFG_PER_PLL_16MHZ_160MHZ_200MHZ */
476
477 /*******************************20MHz Oscillator Frequency******************************************/
478
479
480 /************** Fpll1 = 320MHz, Fpll2 = 200MHz *****************/
481
482 #ifndef IFXSCU_CFG_PER_PLL_20MHZ_320MHZ_200MHZ
483 /** \brief Macro for Initial Pll step, for profile with 20MHz Crystal and 320/200MHz target (fDCO= 640)*/
484 #define IFXSCU_CFG_PER_PLL_20MHZ_320MHZ_200MHZ \
485 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, uint8 k3Initial, uint8 k3DividerBypass }*/\
486 {(1 - 1), (32 - 1), (2 - 1), (2 - 1), 0}
487 #endif /*#ifndef IFXSCU_CFG_PER_PLL_20MHZ_320MHZ_200MHZ */
488
489 /************** Fpll1 = 160MHz, Fpll2 = 200MHz *****************/
490
491 #ifndef IFXSCU_CFG_PER_PLL_20MHZ_160MHZ_200MHZ
492 /** \brief Macro for Initial Pll step, for profile with 20MHz Crystal and 160/200MHz target (fDCO= 640)*/
493 #define IFXSCU_CFG_PER_PLL_20MHZ_160MHZ_200MHZ \
494 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, uint8 k3Initial, uint8 k3DividerBypass }*/\
495 {(1 - 1), (32 - 1), (4 - 1), (2 - 1), 0}
496 #endif /*#ifndef IFXSCU_CFG_PER_PLL_20MHZ_160MHZ_200MHZ */
497
498 /*******************************25MHz Oscillator Frequency******************************************/
499
500
501 /************** Fpll1 = 160MHz, Fpll2 = 200MHz *****************/
502
503 #ifndef IFXSCU_CFG_PER_PLL_25MHZ_160MHZ_200MHZ
504 /** \brief Macro for Initial Pll step, for profile with 25MHz Crystal and 160/200MHz target (fDCO= 800)*/
505 #define IFXSCU_CFG_PER_PLL_25MHZ_160MHZ_200MHZ \
506 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, uint8 k3Initial, uint8 k3DividerBypass }*/\
507 {(1 - 1), (32 - 1), (5 - 1), (2 - 1), 1}
508 #endif /*#ifndef IFXSCU_CFG_PER_PLL_25MHZ_160MHZ_200MHZ */
509
510 /*******************************40MHz Oscillator Frequency******************************************/
511
512
513 /************** Fpll1 = 320MHz, Fpll2 = 200MHz *****************/
514
515 #ifndef IFXSCU_CFG_PER_PLL_40MHZ_320MHZ_200MHZ
516 /** \brief Macro for Initial Pll step, for profile with 40MHz Crystal and 320/200MHz target (fDCO= 640)*/
517 #define IFXSCU_CFG_PER_PLL_40MHZ_320MHZ_200MHZ \
518 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, uint8 k3Initial, uint8 k3DividerBypass }*/\
519 {(1 - 1), (16 - 1), (2 - 1), (2 - 1), 0}
520 #endif /*#ifndef IFXSCU_CFG_PER_PLL_40MHZ_320MHZ_200MHZ */
521
522 /************** Fpll1 = 160MHz, Fpll2 = 200MHz *****************/
523
524 #ifndef IFXSCU_CFG_PER_PLL_40MHZ_160MHZ_200MHZ
525 /** \brief Macro for Initial Pll step, for profile with 40MHz Crystal and 160/200MHz target (fDCO= 640)*/
526 #define IFXSCU_CFG_PER_PLL_40MHZ_160MHZ_200MHZ \
527 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, uint8 k3Initial, uint8 k3DividerBypass }*/\
528 {(1 - 1), (16 - 1), (4 - 1), (2 - 1), 0}
529 #endif /*#ifndef IFXSCU_CFG_PER_PLL_40MHZ_160MHZ_200MHZ */
530
531 /***************************** Final Macro Setting for PLL ****************************************/
532 #define IFXSCU_CFG_PLL_STEPS_BASIC_(xtalFreq, pll0Freq) IFXSCU_CFG_PLL_STEPS_##xtalFreq##_##pll0Freq
533 #define IFXSCU_CFG_PLL_STEPS_BASIC(xtalFreq, pll0Freq) IFXSCU_CFG_PLL_STEPS_BASIC_(xtalFreq, pll0Freq)
534 #define IFXSCU_CFG_PLL_STEPS IFXSCU_CFG_PLL_STEPS_BASIC(IFXSCU_CFG_XTAL_FREQ, IFXSCU_CFG_PLL_FREQ)
535
536 /****************** initial step configuration definitions ******************************/
537 /*macro for sys pll initial step configuration */
538 #define IFXSCU_CFG_SYS_PLL_INITIAL_STEP_BASIC_(xtalFreq, pll0Freq) IFXSCU_CFG_SYS_PLL_##xtalFreq##_##pll0Freq
539 #define IFXSCU_CFG_SYS_PLL_INITIAL_STEP_BASIC(xtalFreq, pll0Freq) IFXSCU_CFG_SYS_PLL_INITIAL_STEP_BASIC_(xtalFreq, pll0Freq)
540 #define IFXSCU_CFG_SYS_PLL_INITIAL_STEP IFXSCU_CFG_SYS_PLL_INITIAL_STEP_BASIC(IFXSCU_CFG_XTAL_FREQ, IFXSCU_CFG_PLL_FREQ)
541
542 /*macro for per pll initial step configuration */
543 #define IFXSCU_CFG_PER_PLL_INITIAL_STEP_BASIC_(xtalFreq, pll1Freq, pll2Freq) IFXSCU_CFG_PER_PLL_##xtalFreq##_##pll1Freq##_##pll2Freq
544 #define IFXSCU_CFG_PER_PLL_INITIAL_STEP_BASIC(xtalFreq, pll1Freq, pll2Freq) IFXSCU_CFG_PER_PLL_INITIAL_STEP_BASIC_(xtalFreq, pll1Freq, pll2Freq)
545 #define IFXSCU_CFG_PER_PLL_INITIAL_STEP IFXSCU_CFG_PER_PLL_INITIAL_STEP_BASIC(IFXSCU_CFG_XTAL_FREQ, IFXSCU_CFG_PLL1_FREQ, IFXSCU_CFG_PLL2_FREQ)
546
547 /*macro for wait at initial step configuration */
548 #define IFXSCU_CFG_WAIT_INITIAL_STEP_BASIC_(xtalFreq, pll0Freq) IFXSCU_CFG_WAIT_INITIAL_STEP_##xtalFreq##_##pll0Freq
549 #define IFXSCU_CFG_WAIT_INITIAL_STEP_BASIC(xtalFreq, pll0Freq) IFXSCU_CFG_WAIT_INITIAL_STEP_BASIC_(xtalFreq, pll0Freq)
550 #define IFXSCU_CFG_WAIT_INITIAL_STEP IFXSCU_CFG_WAIT_INITIAL_STEP_BASIC(IFXSCU_CFG_XTAL_FREQ, IFXSCU_CFG_PLL_FREQ)
551
552 /*macro for sys pll initial step configuration */
553 #define IFXSCU_CFG_PLL_INITIAL_STEP \
554 {\
555 {\
556 IFX_CFG_SCU_XTAL_FREQUENCY,\
557 IfxScuCcu_PllInputClockSelection_fOsc0,\
558 IFXSCU_CFG_SYS_PLL_INITIAL_STEP, \
559 IFXSCU_CFG_PER_PLL_INITIAL_STEP, \
560 },\
561 IFXSCU_CFG_WAIT_INITIAL_STEP \
562 }
563
564 /***************************************************************************************************/
565 /*********************** DIVIDER CONFIGURATIONS ****************************************************/
566 /***************************************************************************************************/
567
568 /**************** DIVIDERS DEPENDING ON FSource0 (Fpll0) *******************************************/
569
570 /**************** Fsource = Fpll0 = 80MHz **********************************************************/
571
572 /************** CCUCON0 : STMDIV (Output : fSTM)**************/
573 /* Target = 80 MHz AND Source = Fsource0 */
574 #ifndef IFXSCU_CFG_STMDIV_80MHZ
575 #define IFXSCU_CFG_STMDIV_80MHZ (1)
576 #endif /*#ifndef IFXSCU_CFG_STMDIV_80MHZ */
577
578 /************** CCUCON0 : GTMDIV (Output : fGTM)**************/
579 /* Target = 80 MHz AND Source = Fsource0 */
580 #ifndef IFXSCU_CFG_GTMDIV_80MHZ
581 #define IFXSCU_CFG_GTMDIV_80MHZ (1)
582 #endif /*#ifndef IFXSCU_CFG_GTMDIV_80MHZ */
583
584 /************** CCUCON0 : SRIDIV (Output : fSRI)**************/
585 /* Target = 80 MHz AND Source = Fsource0 */
586 #ifndef IFXSCU_CFG_SRIDIV_80MHZ
587 #define IFXSCU_CFG_SRIDIV_80MHZ (1)
588 #endif /*#ifndef IFXSCU_CFG_SRIDIV_80MHZ */
589
590 /************** CCUCON0 : SPBDIV (Output : fSPB)**************/
591 /* Target = 40 MHz AND Source = Fsource0 */
592 #ifndef IFXSCU_CFG_SPBDIV_80MHZ
593 #define IFXSCU_CFG_SPBDIV_80MHZ (2)
594 #endif /*#ifndef IFXSCU_CFG_SPBDIV_80MHZ */
595
596 /************** CCUCON0 : BBBDIV (Output : fBBB)**************/
597 /* Target = 40 MHz AND Source = Fsource0 */
598 #ifndef IFXSCU_CFG_BBBDIV_80MHZ
599 #define IFXSCU_CFG_BBBDIV_80MHZ (2)
600 #endif /*#ifndef IFXSCU_CFG_BBBDIV_80MHZ */
601
602 /************** CCUCON0 : FSIDIV (Output : fFSI)**************/
603 /* Target = 80 MHz AND Source = Fsri */
604 #ifndef IFXSCU_CFG_FSIDIV_80MHZ
605 #define IFXSCU_CFG_FSIDIV_80MHZ (IFXSCU_CFG_SRIDIV_80MHZ * 1)
606 #endif /*#ifndef IFXSCU_CFG_FSIDIV_80MHZ */
607
608 /************** CCUCON0 : FSI2DIV (Output : fFSI2)**************/
609 /* Target = 80 MHz AND Source = Fsri */
610 #ifndef IFXSCU_CFG_FSI2DIV_80MHZ
611 #define IFXSCU_CFG_FSI2DIV_80MHZ (IFXSCU_CFG_SRIDIV_80MHZ * 1)
612 #endif /*#ifndef IFXSCU_CFG_FSI2DIV_80MHZ */
613
614 /************** CCUCON5 : GETHDIV (Output : fGETH)**************/
615 /* Target = 80 MHz AND Source = Fsource0 */
616 #ifndef IFXSCU_CFG_GETHDIV_80MHZ
617 #define IFXSCU_CFG_GETHDIV_80MHZ (1)
618 #endif /*#ifndef IFXSCU_CFG_GETHDIV_80MHZ */
619
620 /************** CCUCON5 : MCANHDIV (Output : fMCANH)**************/
621 /* Target = 40 MHz AND Source = Fsource0 */
622 #ifndef IFXSCU_CFG_MCANHDIV_80MHZ
623 #define IFXSCU_CFG_MCANHDIV_80MHZ (2)
624 #endif /*#ifndef IFXSCU_CFG_MCANHDIV_80MHZ */
625
626 /************** CCUCON6 : CPU0DIV (Output : fCPU0)**************/
627 /* Target = 80 MHz AND Source = Fsri */
628 #ifndef IFXSCU_CFG_CPU0DIV_80MHZ
629 #define IFXSCU_CFG_CPU0DIV_80MHZ (0)
630 #endif /*#ifndef IFXSCU_CFG_CPU0DIV_80MHZ */
631
632 /************** CCUCON7 : CPU1DIV (Output : fCPU1)**************/
633 /* Target = 80 MHz AND Source = Fsri */
634 #ifndef IFXSCU_CFG_CPU1DIV_80MHZ
635 #define IFXSCU_CFG_CPU1DIV_80MHZ (0)
636 #endif /*#ifndef IFXSCU_CFG_CPU1DIV_80MHZ */
637
638 /************** CCUCON8 : CPU2DIV (Output : fCPU2)**************/
639 /* Target = 80 MHz AND Source = Fsri */
640 #ifndef IFXSCU_CFG_CPU2DIV_80MHZ
641 #define IFXSCU_CFG_CPU2DIV_80MHZ (0)
642 #endif /*#ifndef IFXSCU_CFG_CPU2DIV_80MHZ */
643
644 /************** CCUCON9 : CPU3DIV (Output : fCPU3)**************/
645 /* Target = 80 MHz AND Source = Fsri */
646 #ifndef IFXSCU_CFG_CPU3DIV_80MHZ
647 #define IFXSCU_CFG_CPU3DIV_80MHZ (0)
648 #endif /*#ifndef IFXSCU_CFG_CPU3DIV_80MHZ */
649
650 /**************** Fsource = Fpll0 = 133MHz **********************************************************/
651
652 /************** CCUCON0 : STMDIV (Output : fSTM)**************/
653 /* Target = 66.5 MHz AND Source = Fsource0 */
654 #ifndef IFXSCU_CFG_STMDIV_133MHZ
655 #define IFXSCU_CFG_STMDIV_133MHZ (2)
656 #endif /*#ifndef IFXSCU_CFG_STMDIV_133MHZ */
657
658 /************** CCUCON0 : GTMDIV (Output : fGTM)**************/
659 /* Target = 133 MHz AND Source = Fsource0 */
660 #ifndef IFXSCU_CFG_GTMDIV_133MHZ
661 #define IFXSCU_CFG_GTMDIV_133MHZ (1)
662 #endif /*#ifndef IFXSCU_CFG_GTMDIV_133MHZ */
663
664 /************** CCUCON0 : SRIDIV (Output : fSRI)**************/
665 /* Target = 133 MHz AND Source = Fsource0 */
666 #ifndef IFXSCU_CFG_SRIDIV_133MHZ
667 #define IFXSCU_CFG_SRIDIV_133MHZ (1)
668 #endif /*#ifndef IFXSCU_CFG_SRIDIV_133MHZ */
669
670 /************** CCUCON0 : SPBDIV (Output : fSPB)**************/
671 /* Target = 66.5 MHz AND Source = Fsource0 */
672 #ifndef IFXSCU_CFG_SPBDIV_133MHZ
673 #define IFXSCU_CFG_SPBDIV_133MHZ (2)
674 #endif /*#ifndef IFXSCU_CFG_SPBDIV_133MHZ */
675
676 /************** CCUCON0 : BBBDIV (Output : fBBB)**************/
677 /* Target = 66.5 MHz AND Source = Fsource0 */
678 #ifndef IFXSCU_CFG_BBBDIV_133MHZ
679 #define IFXSCU_CFG_BBBDIV_133MHZ (2)
680 #endif /*#ifndef IFXSCU_CFG_BBBDIV_133MHZ */
681
682 /************** CCUCON0 : FSIDIV (Output : fFSI)**************/
683 /* Target = 66.5 MHz AND Source = Fsri */
684 #ifndef IFXSCU_CFG_FSIDIV_133MHZ
685 #define IFXSCU_CFG_FSIDIV_133MHZ (IFXSCU_CFG_SRIDIV_133MHZ * 2)
686 #endif /*#ifndef IFXSCU_CFG_FSIDIV_133MHZ */
687
688 /************** CCUCON0 : FSI2DIV (Output : fFSI2)**************/
689 /* Target = 133 MHz AND Source = Fsri */
690 #ifndef IFXSCU_CFG_FSI2DIV_133MHZ
691 #define IFXSCU_CFG_FSI2DIV_133MHZ (IFXSCU_CFG_SRIDIV_133MHZ * 1)
692 #endif /*#ifndef IFXSCU_CFG_FSI2DIV_133MHZ */
693
694 /************** CCUCON5 : GETHDIV (Output : fGETH)**************/
695 /* Target = 133 MHz AND Source = Fsource0 */
696 #ifndef IFXSCU_CFG_GETHDIV_133MHZ
697 #define IFXSCU_CFG_GETHDIV_133MHZ (1)
698 #endif /*#ifndef IFXSCU_CFG_GETHDIV_133MHZ */
699
700 /************** CCUCON5 : MCANHDIV (Output : fMCANH)**************/
701 /* Target = 66.5 MHz AND Source = Fsource0 */
702 #ifndef IFXSCU_CFG_MCANHDIV_133MHZ
703 #define IFXSCU_CFG_MCANHDIV_133MHZ (2)
704 #endif /*#ifndef IFXSCU_CFG_MCANHDIV_133MHZ */
705
706 /************** CCUCON6 : CPU0DIV (Output : fCPU0)**************/
707 /* Target = 133 MHz AND Source = Fsri */
708 #ifndef IFXSCU_CFG_CPU0DIV_133MHZ
709 #define IFXSCU_CFG_CPU0DIV_133MHZ (0)
710 #endif /*#ifndef IFXSCU_CFG_CPU0DIV_133MHZ */
711
712 /************** CCUCON7 : CPU1DIV (Output : fCPU1)**************/
713 /* Target = 133 MHz AND Source = Fsri */
714 #ifndef IFXSCU_CFG_CPU1DIV_133MHZ
715 #define IFXSCU_CFG_CPU1DIV_133MHZ (0)
716 #endif /*#ifndef IFXSCU_CFG_CPU1DIV_133MHZ */
717
718 /************** CCUCON8 : CPU2DIV (Output : fCPU2)**************/
719 /* Target = 133 MHz AND Source = Fsri */
720 #ifndef IFXSCU_CFG_CPU2DIV_133MHZ
721 #define IFXSCU_CFG_CPU2DIV_133MHZ (0)
722 #endif /*#ifndef IFXSCU_CFG_CPU2DIV_133MHZ */
723
724 /************** CCUCON9 : CPU3DIV (Output : fCPU3)**************/
725 /* Target = 133 MHz AND Source = Fsri */
726 #ifndef IFXSCU_CFG_CPU3DIV_133MHZ
727 #define IFXSCU_CFG_CPU3DIV_133MHZ (0)
728 #endif /*#ifndef IFXSCU_CFG_CPU3DIV_133MHZ */
729
730 /**************** Fsource = Fpll0 = 200MHz **********************************************************/
731
732 /************** CCUCON0 : STMDIV (Output : fSTM)**************/
733 /* Target = 100 MHz AND Source = Fsource0 */
734 #ifndef IFXSCU_CFG_STMDIV_200MHZ
735 #define IFXSCU_CFG_STMDIV_200MHZ (2)
736 #endif /*#ifndef IFXSCU_CFG_STMDIV_200MHZ */
737
738 /************** CCUCON0 : GTMDIV (Output : fGTM)**************/
739 /* Target = 200 MHz AND Source = Fsource0 */
740 #ifndef IFXSCU_CFG_GTMDIV_200MHZ
741 #define IFXSCU_CFG_GTMDIV_200MHZ (1)
742 #endif /*#ifndef IFXSCU_CFG_GTMDIV_200MHZ */
743
744 /************** CCUCON0 : SRIDIV (Output : fSRI)**************/
745 /* Target = 200 MHz AND Source = Fsource0 */
746 #ifndef IFXSCU_CFG_SRIDIV_200MHZ
747 #define IFXSCU_CFG_SRIDIV_200MHZ (1)
748 #endif /*#ifndef IFXSCU_CFG_SRIDIV_200MHZ */
749
750 /************** CCUCON0 : SPBDIV (Output : fSPB)**************/
751 /* Target = 100 MHz AND Source = Fsource0 */
752 #ifndef IFXSCU_CFG_SPBDIV_200MHZ
753 #define IFXSCU_CFG_SPBDIV_200MHZ (2)
754 #endif /*#ifndef IFXSCU_CFG_SPBDIV_200MHZ */
755
756 /************** CCUCON0 : BBBDIV (Output : fBBB)**************/
757 /* Target = 100 MHz AND Source = Fsource0 */
758 #ifndef IFXSCU_CFG_BBBDIV_200MHZ
759 #define IFXSCU_CFG_BBBDIV_200MHZ (2)
760 #endif /*#ifndef IFXSCU_CFG_BBBDIV_200MHZ */
761
762 /************** CCUCON0 : FSIDIV (Output : fFSI)**************/
763 /* Target = 100 MHz AND Source = Fsri */
764 #ifndef IFXSCU_CFG_FSIDIV_200MHZ
765 #define IFXSCU_CFG_FSIDIV_200MHZ (IFXSCU_CFG_SRIDIV_200MHZ * 2)
766 #endif /*#ifndef IFXSCU_CFG_FSIDIV_200MHZ */
767
768 /************** CCUCON0 : FSI2DIV (Output : fFSI2)**************/
769 /* Target = 200 MHz AND Source = Fsri */
770 #ifndef IFXSCU_CFG_FSI2DIV_200MHZ
771 #define IFXSCU_CFG_FSI2DIV_200MHZ (IFXSCU_CFG_SRIDIV_200MHZ * 1)
772 #endif /*#ifndef IFXSCU_CFG_FSI2DIV_200MHZ */
773
774 /************** CCUCON5 : GETHDIV (Output : fGETH)**************/
775 /* Target = 200 MHz AND Source = Fsource0 */
776 #ifndef IFXSCU_CFG_GETHDIV_200MHZ
777 #define IFXSCU_CFG_GETHDIV_200MHZ (1)
778 #endif /*#ifndef IFXSCU_CFG_GETHDIV_200MHZ */
779
780 /************** CCUCON5 : MCANHDIV (Output : fMCANH)**************/
781 /* Target = 100 MHz AND Source = Fsource0 */
782 #ifndef IFXSCU_CFG_MCANHDIV_200MHZ
783 #define IFXSCU_CFG_MCANHDIV_200MHZ (2)
784 #endif /*#ifndef IFXSCU_CFG_MCANHDIV_200MHZ */
785
786 /************** CCUCON6 : CPU0DIV (Output : fCPU0)**************/
787 /* Target = 200 MHz AND Source = Fsri */
788 #ifndef IFXSCU_CFG_CPU0DIV_200MHZ
789 #define IFXSCU_CFG_CPU0DIV_200MHZ (0)
790 #endif /*#ifndef IFXSCU_CFG_CPU0DIV_200MHZ */
791
792 /************** CCUCON7 : CPU1DIV (Output : fCPU1)**************/
793 /* Target = 200 MHz AND Source = Fsri */
794 #ifndef IFXSCU_CFG_CPU1DIV_200MHZ
795 #define IFXSCU_CFG_CPU1DIV_200MHZ (0)
796 #endif /*#ifndef IFXSCU_CFG_CPU1DIV_200MHZ */
797
798 /************** CCUCON8 : CPU2DIV (Output : fCPU2)**************/
799 /* Target = 200 MHz AND Source = Fsri */
800 #ifndef IFXSCU_CFG_CPU2DIV_200MHZ
801 #define IFXSCU_CFG_CPU2DIV_200MHZ (0)
802 #endif /*#ifndef IFXSCU_CFG_CPU2DIV_200MHZ */
803
804 /************** CCUCON9 : CPU3DIV (Output : fCPU3)**************/
805 /* Target = 200 MHz AND Source = Fsri */
806 #ifndef IFXSCU_CFG_CPU3DIV_200MHZ
807 #define IFXSCU_CFG_CPU3DIV_200MHZ (0)
808 #endif /*#ifndef IFXSCU_CFG_CPU3DIV_200MHZ */
809
810 /**************** Fsource = Fpll0 = 240MHz **********************************************************/
811
812 /************** CCUCON0 : STMDIV (Output : fSTM)**************/
813 /* Target = 80 MHz AND Source = Fsource0 */
814 #ifndef IFXSCU_CFG_STMDIV_240MHZ
815 #define IFXSCU_CFG_STMDIV_240MHZ (3)
816 #endif /*#ifndef IFXSCU_CFG_STMDIV_240MHZ */
817
818 /************** CCUCON0 : GTMDIV (Output : fGTM)**************/
819 /* Target = 200 MHz AND Source = Fsource0 */
820 #ifndef IFXSCU_CFG_GTMDIV_240MHZ
821 #define IFXSCU_CFG_GTMDIV_240MHZ (1)
822 #endif /*#ifndef IFXSCU_CFG_GTMDIV_240MHZ */
823
824 /************** CCUCON0 : SRIDIV (Output : fSRI)**************/
825 /* Target = 240 MHz AND Source = Fsource0 */
826 #ifndef IFXSCU_CFG_SRIDIV_240MHZ
827 #define IFXSCU_CFG_SRIDIV_240MHZ (1)
828 #endif /*#ifndef IFXSCU_CFG_SRIDIV_240MHZ */
829
830 /************** CCUCON0 : SPBDIV (Output : fSPB)**************/
831 /* Target = 80 MHz AND Source = Fsource0 */
832 #ifndef IFXSCU_CFG_SPBDIV_240MHZ
833 #define IFXSCU_CFG_SPBDIV_240MHZ (3)
834 #endif /*#ifndef IFXSCU_CFG_SPBDIV_240MHZ */
835
836 /************** CCUCON0 : BBBDIV (Output : fBBB)**************/
837 /* Target = 120 MHz AND Source = Fsource0 */
838 #ifndef IFXSCU_CFG_BBBDIV_240MHZ
839 #define IFXSCU_CFG_BBBDIV_240MHZ (2)
840 #endif /*#ifndef IFXSCU_CFG_BBBDIV_240MHZ */
841
842 /************** CCUCON0 : FSIDIV (Output : fFSI)**************/
843 /* Target = 80 MHz AND Source = Fsri */
844 #ifndef IFXSCU_CFG_FSIDIV_240MHZ
845 #define IFXSCU_CFG_FSIDIV_240MHZ (IFXSCU_CFG_SRIDIV_240MHZ * 3)
846 #endif /*#ifndef IFXSCU_CFG_FSIDIV_240MHZ */
847
848 /************** CCUCON0 : FSI2DIV (Output : fFSI2)**************/
849 /* Target = 240 MHz AND Source = Fsri */
850 #ifndef IFXSCU_CFG_FSI2DIV_240MHZ
851 #define IFXSCU_CFG_FSI2DIV_240MHZ (IFXSCU_CFG_SRIDIV_240MHZ * 1)
852 #endif /*#ifndef IFXSCU_CFG_FSI2DIV_240MHZ */
853
854 /************** CCUCON5 : GETHDIV (Output : fGETH)**************/
855 /* Target = 120 MHz AND Source = Fsource0 */
856 #ifndef IFXSCU_CFG_GETHDIV_240MHZ
857 #define IFXSCU_CFG_GETHDIV_240MHZ (2)
858 #endif /*#ifndef IFXSCU_CFG_GETHDIV_240MHZ */
859
860 /************** CCUCON5 : MCANHDIV (Output : fMCANH)**************/
861 /* Target = 80 MHz AND Source = Fsource0 */
862 #ifndef IFXSCU_CFG_MCANHDIV_240MHZ
863 #define IFXSCU_CFG_MCANHDIV_240MHZ (3)
864 #endif /*#ifndef IFXSCU_CFG_MCANHDIV_240MHZ */
865
866 /************** CCUCON6 : CPU0DIV (Output : fCPU0)**************/
867 /* Target = 240 MHz AND Source = Fsri */
868 #ifndef IFXSCU_CFG_CPU0DIV_240MHZ
869 #define IFXSCU_CFG_CPU0DIV_240MHZ (0)
870 #endif /*#ifndef IFXSCU_CFG_CPU0DIV_240MHZ */
871
872 /************** CCUCON7 : CPU1DIV (Output : fCPU1)**************/
873 /* Target = 240 MHz AND Source = Fsri */
874 #ifndef IFXSCU_CFG_CPU1DIV_240MHZ
875 #define IFXSCU_CFG_CPU1DIV_240MHZ (0)
876 #endif /*#ifndef IFXSCU_CFG_CPU1DIV_240MHZ */
877
878 /************** CCUCON8 : CPU2DIV (Output : fCPU2)**************/
879 /* Target = 240 MHz AND Source = Fsri */
880 #ifndef IFXSCU_CFG_CPU2DIV_240MHZ
881 #define IFXSCU_CFG_CPU2DIV_240MHZ (0)
882 #endif /*#ifndef IFXSCU_CFG_CPU2DIV_240MHZ */
883
884 /************** CCUCON9 : CPU3DIV (Output : fCPU3)**************/
885 /* Target = 240 MHz AND Source = Fsri */
886 #ifndef IFXSCU_CFG_CPU3DIV_240MHZ
887 #define IFXSCU_CFG_CPU3DIV_240MHZ (0)
888 #endif /*#ifndef IFXSCU_CFG_CPU3DIV_240MHZ */
889
890 /**************** Fsource = Fpll0 = 300MHz **********************************************************/
891
892 /************** CCUCON0 : STMDIV (Output : fSTM)**************/
893 /* Target = 100 MHz AND Source = Fsource0 */
894 #ifndef IFXSCU_CFG_STMDIV_300MHZ
895 #define IFXSCU_CFG_STMDIV_300MHZ (3)
896 #endif /*#ifndef IFXSCU_CFG_STMDIV_300MHZ */
897
898 /************** CCUCON0 : GTMDIV (Output : fGTM)**************/
899 /* Target = 200 MHz AND Source = Fsource0 */
900 #ifndef IFXSCU_CFG_GTMDIV_300MHZ
901 #define IFXSCU_CFG_GTMDIV_300MHZ (1)
902 #endif /*#ifndef IFXSCU_CFG_GTMDIV_300MHZ */
903
904 /************** CCUCON0 : SRIDIV (Output : fSRI)**************/
905 /* Target = 300 MHz AND Source = Fsource0 */
906 #ifndef IFXSCU_CFG_SRIDIV_300MHZ
907 #define IFXSCU_CFG_SRIDIV_300MHZ (1)
908 #endif /*#ifndef IFXSCU_CFG_SRIDIV_300MHZ */
909
910 /************** CCUCON0 : SPBDIV (Output : fSPB)**************/
911 /* Target = 100 MHz AND Source = Fsource0 */
912 #ifndef IFXSCU_CFG_SPBDIV_300MHZ
913 #define IFXSCU_CFG_SPBDIV_300MHZ (3)
914 #endif /*#ifndef IFXSCU_CFG_SPBDIV_300MHZ */
915
916 /************** CCUCON0 : BBBDIV (Output : fBBB)**************/
917 /* Target = 150 MHz AND Source = Fsource0 */
918 #ifndef IFXSCU_CFG_BBBDIV_300MHZ
919 #define IFXSCU_CFG_BBBDIV_300MHZ (2)
920 #endif /*#ifndef IFXSCU_CFG_BBBDIV_300MHZ */
921
922 /************** CCUCON0 : FSIDIV (Output : fFSI)**************/
923 /* Target = 100 MHz AND Source = Fsri */
924 #ifndef IFXSCU_CFG_FSIDIV_300MHZ
925 #define IFXSCU_CFG_FSIDIV_300MHZ (IFXSCU_CFG_SRIDIV_300MHZ * 3)
926 #endif /*#ifndef IFXSCU_CFG_FSIDIV_300MHZ */
927
928 /************** CCUCON0 : FSI2DIV (Output : fFSI2)**************/
929 /* Target = 300 MHz AND Source = Fsri */
930 #ifndef IFXSCU_CFG_FSI2DIV_300MHZ
931 #define IFXSCU_CFG_FSI2DIV_300MHZ (IFXSCU_CFG_SRIDIV_300MHZ * 1)
932 #endif /*#ifndef IFXSCU_CFG_FSI2DIV_300MHZ */
933
934 /************** CCUCON5 : GETHDIV (Output : fGETH)**************/
935 /* Target = 150 MHz AND Source = Fsource0 */
936 #ifndef IFXSCU_CFG_GETHDIV_300MHZ
937 #define IFXSCU_CFG_GETHDIV_300MHZ (2)
938 #endif /*#ifndef IFXSCU_CFG_GETHDIV_300MHZ */
939
940 /************** CCUCON5 : MCANHDIV (Output : fMCANH)**************/
941 /* Target = 100 MHz AND Source = Fsource0 */
942 #ifndef IFXSCU_CFG_MCANHDIV_300MHZ
943 #define IFXSCU_CFG_MCANHDIV_300MHZ (3)
944 #endif /*#ifndef IFXSCU_CFG_MCANHDIV_300MHZ */
945
946 /************** CCUCON6 : CPU0DIV (Output : fCPU0)**************/
947 /* Target = 300 MHz AND Source = Fsri */
948 #ifndef IFXSCU_CFG_CPU0DIV_300MHZ
949 #define IFXSCU_CFG_CPU0DIV_300MHZ (0)
950 #endif /*#ifndef IFXSCU_CFG_CPU0DIV_300MHZ */
951
952 /************** CCUCON7 : CPU1DIV (Output : fCPU1)**************/
953 /* Target = 300 MHz AND Source = Fsri */
954 #ifndef IFXSCU_CFG_CPU1DIV_300MHZ
955 #define IFXSCU_CFG_CPU1DIV_300MHZ (0)
956 #endif /*#ifndef IFXSCU_CFG_CPU1DIV_300MHZ */
957
958 /************** CCUCON8 : CPU2DIV (Output : fCPU2)**************/
959 /* Target = 300 MHz AND Source = Fsri */
960 #ifndef IFXSCU_CFG_CPU2DIV_300MHZ
961 #define IFXSCU_CFG_CPU2DIV_300MHZ (0)
962 #endif /*#ifndef IFXSCU_CFG_CPU2DIV_300MHZ */
963
964 /************** CCUCON9 : CPU3DIV (Output : fCPU3)**************/
965 /* Target = 300 MHz AND Source = Fsri */
966 #ifndef IFXSCU_CFG_CPU3DIV_300MHZ
967 #define IFXSCU_CFG_CPU3DIV_300MHZ (0)
968 #endif /*#ifndef IFXSCU_CFG_CPU3DIV_300MHZ */
969
970 /**************** DIVIDERS DEPENDING ON FSource1,2 (Fpll1_Fpll2) ***********************************/
971
972 /**************** Fpll1 = 320MHz, Fpll2 = 200MHz ***************************************************/
973
974 /************** CCUCON1 : MCANDIV (Output : fMCAN)**************/
975 /* Target = 80 MHz AND Source = Fsource1 */
976 #ifndef IFXSCU_CFG_MCANDIV_320MHZ_200MHZ
977 #define IFXSCU_CFG_MCANDIV_320MHZ_200MHZ (2)
978 #endif /*#ifndef IFXSCU_CFG_MCANDIV_320MHZ_200MHZ */
979
980 /************** CCUCON1 : CLKSELMCAN (Output : fMCANI)**************/
981 /* Target = Fmcani MHz AND Source = Fmcani/Fosc0 */
982 #ifndef IFXSCU_CFG_CLKSELMCAN_320MHZ_200MHZ
983 #define IFXSCU_CFG_CLKSELMCAN_320MHZ_200MHZ (1)
984 #endif /*#ifndef IFXSCU_CFG_CLKSELMCAN_320MHZ_200MHZ */
985
986 /************** CCUCON1 : PLL1DIVDIS (Output : fsource1)**************/
987 /* Target = Fpll1by2 MHz AND Source = Fpll1 */
988 #ifndef IFXSCU_CFG_PLL1DIVDIS_320MHZ_200MHZ
989 #define IFXSCU_CFG_PLL1DIVDIS_320MHZ_200MHZ (0)
990 #endif /*#ifndef IFXSCU_CFG_PLL1DIVDIS_320MHZ_200MHZ */
991
992 /************** CCUCON1 : I2CDIV (Output : fI2C)**************/
993 /* Target = 100 MHz AND Source = Fsource2 */
994 #ifndef IFXSCU_CFG_I2CDIV_320MHZ_200MHZ
995 #define IFXSCU_CFG_I2CDIV_320MHZ_200MHZ (2)
996 #endif /*#ifndef IFXSCU_CFG_I2CDIV_320MHZ_200MHZ */
997
998 /************** CCUCON1 : MSCDIV (Output : fMSC)**************/
999 /* Target = 160 MHz AND Source = Fsource2 */
1000 #ifndef IFXSCU_CFG_MSCDIV_320MHZ_200MHZ
1001 #define IFXSCU_CFG_MSCDIV_320MHZ_200MHZ (1)
1002 #endif /*#ifndef IFXSCU_CFG_MSCDIV_320MHZ_200MHZ */
1003
1004 /************** CCUCON1 : CLKSELMSC (Output : fSOURCEMSC)**************/
1005 /* Target = Fsource1 MHz AND Source = Fsource1/Fsource2 */
1006 #ifndef IFXSCU_CFG_CLKSELMSC_320MHZ_200MHZ
1007 #define IFXSCU_CFG_CLKSELMSC_320MHZ_200MHZ (1)
1008 #endif /*#ifndef IFXSCU_CFG_CLKSELMSC_320MHZ_200MHZ */
1009
1010 /************** CCUCON1 : QSPIDIV (Output : fQSPI)**************/
1011 /* Target = 200 MHz AND Source = Fsource2 */
1012 #ifndef IFXSCU_CFG_QSPIDIV_320MHZ_200MHZ
1013 #define IFXSCU_CFG_QSPIDIV_320MHZ_200MHZ (1)
1014 #endif /*#ifndef IFXSCU_CFG_QSPIDIV_320MHZ_200MHZ */
1015
1016 /************** CCUCON1 : CLKSELQSPI (Output : fSOURCESPI)**************/
1017 /* Target = Fsource2 MHz AND Source = Fsource1/Fsource2 */
1018 #ifndef IFXSCU_CFG_CLKSELQSPI_320MHZ_200MHZ
1019 #define IFXSCU_CFG_CLKSELQSPI_320MHZ_200MHZ (2)
1020 #endif /*#ifndef IFXSCU_CFG_CLKSELQSPI_320MHZ_200MHZ */
1021
1022 /************** CCUCON2 : ASCLINFDIV (Output : fASCLINF)**************/
1023 /* Target = 200 MHz AND Source = Fsource2 */
1024 #ifndef IFXSCU_CFG_ASCLINFDIV_320MHZ_200MHZ
1025 #define IFXSCU_CFG_ASCLINFDIV_320MHZ_200MHZ (1)
1026 #endif /*#ifndef IFXSCU_CFG_ASCLINFDIV_320MHZ_200MHZ */
1027
1028 /************** CCUCON2 : ASCLINSDIV (Output : fASCLINSI)**************/
1029 /* Target = 80 MHz AND Source = Fsource1 */
1030 #ifndef IFXSCU_CFG_ASCLINSDIV_320MHZ_200MHZ
1031 #define IFXSCU_CFG_ASCLINSDIV_320MHZ_200MHZ (2)
1032 #endif /*#ifndef IFXSCU_CFG_ASCLINSDIV_320MHZ_200MHZ */
1033
1034 /************** CCUCON2 : CLKSELASCLINS (Output : fASCLINS)**************/
1035 /* Target = Fasclinsi MHz AND Source = Fasclinsi/Fosc0 */
1036 #ifndef IFXSCU_CFG_CLKSELASCLINS_320MHZ_200MHZ
1037 #define IFXSCU_CFG_CLKSELASCLINS_320MHZ_200MHZ (1)
1038 #endif /*#ifndef IFXSCU_CFG_CLKSELASCLINS_320MHZ_200MHZ */
1039
1040 /**************** Fpll1 = 160MHz, Fpll2 = 200MHz ***************************************************/
1041
1042 /************** CCUCON1 : MCANDIV (Output : fMCAN)**************/
1043 /* Target = 80 MHz AND Source = Fsource1 */
1044 #ifndef IFXSCU_CFG_MCANDIV_160MHZ_200MHZ
1045 #define IFXSCU_CFG_MCANDIV_160MHZ_200MHZ (1)
1046 #endif /*#ifndef IFXSCU_CFG_MCANDIV_160MHZ_200MHZ */
1047
1048 /************** CCUCON1 : CLKSELMCAN (Output : fMCANI)**************/
1049 /* Target = Fmcani MHz AND Source = Fmcani/Fosc0 */
1050 #ifndef IFXSCU_CFG_CLKSELMCAN_160MHZ_200MHZ
1051 #define IFXSCU_CFG_CLKSELMCAN_160MHZ_200MHZ (1)
1052 #endif /*#ifndef IFXSCU_CFG_CLKSELMCAN_160MHZ_200MHZ */
1053
1054 /************** CCUCON1 : PLL1DIVDIS (Output : fsource1)**************/
1055 /* Target = Fpll1by2 MHz AND Source = Fpll1 */
1056 #ifndef IFXSCU_CFG_PLL1DIVDIS_160MHZ_200MHZ
1057 #define IFXSCU_CFG_PLL1DIVDIS_160MHZ_200MHZ (0)
1058 #endif /*#ifndef IFXSCU_CFG_PLL1DIVDIS_160MHZ_200MHZ */
1059
1060 /************** CCUCON1 : I2CDIV (Output : fI2C)**************/
1061 /* Target = 100 MHz AND Source = Fsource2 */
1062 #ifndef IFXSCU_CFG_I2CDIV_160MHZ_200MHZ
1063 #define IFXSCU_CFG_I2CDIV_160MHZ_200MHZ (2)
1064 #endif /*#ifndef IFXSCU_CFG_I2CDIV_160MHZ_200MHZ */
1065
1066 /************** CCUCON1 : MSCDIV (Output : fMSC)**************/
1067 /* Target = 80 MHz AND Source = Fsource2 */
1068 #ifndef IFXSCU_CFG_MSCDIV_160MHZ_200MHZ
1069 #define IFXSCU_CFG_MSCDIV_160MHZ_200MHZ (1)
1070 #endif /*#ifndef IFXSCU_CFG_MSCDIV_160MHZ_200MHZ */
1071
1072 /************** CCUCON1 : CLKSELMSC (Output : fSOURCEMSC)**************/
1073 /* Target = Fsource1 MHz AND Source = Fsource1/Fsource2 */
1074 #ifndef IFXSCU_CFG_CLKSELMSC_160MHZ_200MHZ
1075 #define IFXSCU_CFG_CLKSELMSC_160MHZ_200MHZ (1)
1076 #endif /*#ifndef IFXSCU_CFG_CLKSELMSC_160MHZ_200MHZ */
1077
1078 /************** CCUCON1 : QSPIDIV (Output : fQSPI)**************/
1079 /* Target = 200 MHz AND Source = Fsource2 */
1080 #ifndef IFXSCU_CFG_QSPIDIV_160MHZ_200MHZ
1081 #define IFXSCU_CFG_QSPIDIV_160MHZ_200MHZ (1)
1082 #endif /*#ifndef IFXSCU_CFG_QSPIDIV_160MHZ_200MHZ */
1083
1084 /************** CCUCON1 : CLKSELQSPI (Output : fSOURCESPI)**************/
1085 /* Target = Fsource2 MHz AND Source = Fsource1/Fsource2 */
1086 #ifndef IFXSCU_CFG_CLKSELQSPI_160MHZ_200MHZ
1087 #define IFXSCU_CFG_CLKSELQSPI_160MHZ_200MHZ (2)
1088 #endif /*#ifndef IFXSCU_CFG_CLKSELQSPI_160MHZ_200MHZ */
1089
1090 /************** CCUCON2 : ASCLINFDIV (Output : fASCLINF)**************/
1091 /* Target = 200 MHz AND Source = Fsource2 */
1092 #ifndef IFXSCU_CFG_ASCLINFDIV_160MHZ_200MHZ
1093 #define IFXSCU_CFG_ASCLINFDIV_160MHZ_200MHZ (1)
1094 #endif /*#ifndef IFXSCU_CFG_ASCLINFDIV_160MHZ_200MHZ */
1095
1096 /************** CCUCON2 : ASCLINSDIV (Output : fASCLINSI)**************/
1097 /* Target = 80 MHz AND Source = Fsource1 */
1098 #ifndef IFXSCU_CFG_ASCLINSDIV_160MHZ_200MHZ
1099 #define IFXSCU_CFG_ASCLINSDIV_160MHZ_200MHZ (1)
1100 #endif /*#ifndef IFXSCU_CFG_ASCLINSDIV_160MHZ_200MHZ */
1101
1102 /************** CCUCON2 : CLKSELASCLINS (Output : fASCLINS)**************/
1103 /* Target = Fasclinsi MHz AND Source = Fasclinsi/Fosc0 */
1104 #ifndef IFXSCU_CFG_CLKSELASCLINS_160MHZ_200MHZ
1105 #define IFXSCU_CFG_CLKSELASCLINS_160MHZ_200MHZ (1)
1106 #endif /*#ifndef IFXSCU_CFG_CLKSELASCLINS_160MHZ_200MHZ */
1107
1108 /***************************************************************************************************/
1109 /*********************** REGISTER DEFAULT VALUES ***************************************************/
1110 /***************************************************************************************************/
1111
1112 /************************** CCUCON0 **************************/
1113 #define IFXSCU_CFG_CCUCON0_MASK \
1114 (uint32)( \
1115 (IFX_SCU_CCUCON0_STMDIV_MSK << IFX_SCU_CCUCON0_STMDIV_OFF) | \
1116 (IFX_SCU_CCUCON0_GTMDIV_MSK << IFX_SCU_CCUCON0_GTMDIV_OFF) | \
1117 (IFX_SCU_CCUCON0_SRIDIV_MSK << IFX_SCU_CCUCON0_SRIDIV_OFF) | \
1118 (IFX_SCU_CCUCON0_SPBDIV_MSK << IFX_SCU_CCUCON0_SPBDIV_OFF) | \
1119 (IFX_SCU_CCUCON0_BBBDIV_MSK << IFX_SCU_CCUCON0_BBBDIV_OFF) | \
1120 (IFX_SCU_CCUCON0_FSIDIV_MSK << IFX_SCU_CCUCON0_FSIDIV_OFF) | \
1121 (IFX_SCU_CCUCON0_FSI2DIV_MSK << IFX_SCU_CCUCON0_FSI2DIV_OFF))
1122
1123 #define IFXSCU_CFG_CCUCON0_BASIC_(pll0Freq, pll1Freq, pll2Freq) \
1124 (uint32)( \
1125 (IFXSCU_CFG_STMDIV_##pll0Freq << IFX_SCU_CCUCON0_STMDIV_OFF) | \
1126 (IFXSCU_CFG_GTMDIV_##pll0Freq << IFX_SCU_CCUCON0_GTMDIV_OFF) | \
1127 (IFXSCU_CFG_SRIDIV_##pll0Freq << IFX_SCU_CCUCON0_SRIDIV_OFF) | \
1128 (IFXSCU_CFG_SPBDIV_##pll0Freq << IFX_SCU_CCUCON0_SPBDIV_OFF) | \
1129 (IFXSCU_CFG_BBBDIV_##pll0Freq << IFX_SCU_CCUCON0_BBBDIV_OFF) | \
1130 (IFXSCU_CFG_FSIDIV_##pll0Freq << IFX_SCU_CCUCON0_FSIDIV_OFF) | \
1131 (IFXSCU_CFG_FSI2DIV_##pll0Freq << IFX_SCU_CCUCON0_FSI2DIV_OFF))
1132
1133 #define IFXSCU_CFG_CCUCON0_BASIC(pll0Freq, pll1Freq, pll2Freq) IFXSCU_CFG_CCUCON0_BASIC_(pll0Freq, pll1Freq, pll2Freq)
1134
1135 #define IFXSCU_CFG_CCUCON0 IFXSCU_CFG_CCUCON0_BASIC(IFXSCU_CFG_PLL_FREQ, IFXSCU_CFG_PLL1_FREQ, IFXSCU_CFG_PLL2_FREQ)
1136
1137 /************************** CCUCON1 **************************/
1138 #define IFXSCU_CFG_CCUCON1_MASK \
1139 (uint32)( \
1140 (IFX_SCU_CCUCON1_MCANDIV_MSK << IFX_SCU_CCUCON1_MCANDIV_OFF) | \
1141 (IFX_SCU_CCUCON1_CLKSELMCAN_MSK << IFX_SCU_CCUCON1_CLKSELMCAN_OFF) | \
1142 (IFX_SCU_CCUCON1_PLL1DIVDIS_MSK << IFX_SCU_CCUCON1_PLL1DIVDIS_OFF) | \
1143 (IFX_SCU_CCUCON1_I2CDIV_MSK << IFX_SCU_CCUCON1_I2CDIV_OFF) | \
1144 (IFX_SCU_CCUCON1_MSCDIV_MSK << IFX_SCU_CCUCON1_MSCDIV_OFF) | \
1145 (IFX_SCU_CCUCON1_CLKSELMSC_MSK << IFX_SCU_CCUCON1_CLKSELMSC_OFF) | \
1146 (IFX_SCU_CCUCON1_QSPIDIV_MSK << IFX_SCU_CCUCON1_QSPIDIV_OFF) | \
1147 (IFX_SCU_CCUCON1_CLKSELQSPI_MSK << IFX_SCU_CCUCON1_CLKSELQSPI_OFF))
1148
1149 #define IFXSCU_CFG_CCUCON1_BASIC_(pll0Freq, pll1Freq, pll2Freq) \
1150 (uint32)( \
1151 (IFXSCU_CFG_MCANDIV_##pll1Freq##_##pll2Freq << IFX_SCU_CCUCON1_MCANDIV_OFF) | \
1152 (IFXSCU_CFG_CLKSELMCAN_##pll1Freq##_##pll2Freq << IFX_SCU_CCUCON1_CLKSELMCAN_OFF) | \
1153 (IFXSCU_CFG_PLL1DIVDIS_##pll1Freq##_##pll2Freq << IFX_SCU_CCUCON1_PLL1DIVDIS_OFF) | \
1154 (IFXSCU_CFG_I2CDIV_##pll1Freq##_##pll2Freq << IFX_SCU_CCUCON1_I2CDIV_OFF) | \
1155 (IFXSCU_CFG_MSCDIV_##pll1Freq##_##pll2Freq << IFX_SCU_CCUCON1_MSCDIV_OFF) | \
1156 (IFXSCU_CFG_CLKSELMSC_##pll1Freq##_##pll2Freq << IFX_SCU_CCUCON1_CLKSELMSC_OFF) | \
1157 (IFXSCU_CFG_QSPIDIV_##pll1Freq##_##pll2Freq << IFX_SCU_CCUCON1_QSPIDIV_OFF) | \
1158 (IFXSCU_CFG_CLKSELQSPI_##pll1Freq##_##pll2Freq << IFX_SCU_CCUCON1_CLKSELQSPI_OFF))
1159
1160 #define IFXSCU_CFG_CCUCON1_BASIC(pll0Freq, pll1Freq, pll2Freq) IFXSCU_CFG_CCUCON1_BASIC_(pll0Freq, pll1Freq, pll2Freq)
1161
1162 #define IFXSCU_CFG_CCUCON1 IFXSCU_CFG_CCUCON1_BASIC(IFXSCU_CFG_PLL_FREQ, IFXSCU_CFG_PLL1_FREQ, IFXSCU_CFG_PLL2_FREQ)
1163
1164 /************************** CCUCON2 **************************/
1165 #define IFXSCU_CFG_CCUCON2_MASK \
1166 (uint32)( \
1167 (IFX_SCU_CCUCON2_ASCLINFDIV_MSK << IFX_SCU_CCUCON2_ASCLINFDIV_OFF) | \
1168 (IFX_SCU_CCUCON2_ASCLINSDIV_MSK << IFX_SCU_CCUCON2_ASCLINSDIV_OFF) | \
1169 (IFX_SCU_CCUCON2_CLKSELASCLINS_MSK << IFX_SCU_CCUCON2_CLKSELASCLINS_OFF))
1170
1171 #define IFXSCU_CFG_CCUCON2_BASIC_(pll0Freq, pll1Freq, pll2Freq) \
1172 (uint32)( \
1173 (IFXSCU_CFG_ASCLINFDIV_##pll1Freq##_##pll2Freq << IFX_SCU_CCUCON2_ASCLINFDIV_OFF) | \
1174 (IFXSCU_CFG_ASCLINSDIV_##pll1Freq##_##pll2Freq << IFX_SCU_CCUCON2_ASCLINSDIV_OFF) | \
1175 (IFXSCU_CFG_CLKSELASCLINS_##pll1Freq##_##pll2Freq << IFX_SCU_CCUCON2_CLKSELASCLINS_OFF))
1176
1177 #define IFXSCU_CFG_CCUCON2_BASIC(pll0Freq, pll1Freq, pll2Freq) IFXSCU_CFG_CCUCON2_BASIC_(pll0Freq, pll1Freq, pll2Freq)
1178
1179 #define IFXSCU_CFG_CCUCON2 IFXSCU_CFG_CCUCON2_BASIC(IFXSCU_CFG_PLL_FREQ, IFXSCU_CFG_PLL1_FREQ, IFXSCU_CFG_PLL2_FREQ)
1180
1181 /************************** CCUCON5 **************************/
1182 #define IFXSCU_CFG_CCUCON5_MASK \
1183 (uint32)( \
1184 (IFX_SCU_CCUCON5_GETHDIV_MSK << IFX_SCU_CCUCON5_GETHDIV_OFF) | \
1185 (IFX_SCU_CCUCON5_MCANHDIV_MSK << IFX_SCU_CCUCON5_MCANHDIV_OFF))
1186
1187 #define IFXSCU_CFG_CCUCON5_BASIC_(pll0Freq, pll1Freq, pll2Freq) \
1188 (uint32)( \
1189 (IFXSCU_CFG_GETHDIV_##pll0Freq << IFX_SCU_CCUCON5_GETHDIV_OFF) | \
1190 (IFXSCU_CFG_MCANHDIV_##pll0Freq << IFX_SCU_CCUCON5_MCANHDIV_OFF))
1191
1192 #define IFXSCU_CFG_CCUCON5_BASIC(pll0Freq, pll1Freq, pll2Freq) IFXSCU_CFG_CCUCON5_BASIC_(pll0Freq, pll1Freq, pll2Freq)
1193
1194 #define IFXSCU_CFG_CCUCON5 IFXSCU_CFG_CCUCON5_BASIC(IFXSCU_CFG_PLL_FREQ, IFXSCU_CFG_PLL1_FREQ, IFXSCU_CFG_PLL2_FREQ)
1195
1196 /************************** CCUCON6 **************************/
1197 #define IFXSCU_CFG_CCUCON6_MASK \
1198 (uint32)( \
1199 (IFX_SCU_CCUCON6_CPU0DIV_MSK << IFX_SCU_CCUCON6_CPU0DIV_OFF))
1200
1201 #define IFXSCU_CFG_CCUCON6_BASIC_(pll0Freq, pll1Freq, pll2Freq) \
1202 (uint32)( \
1203 (IFXSCU_CFG_CPU0DIV_##pll0Freq << IFX_SCU_CCUCON6_CPU0DIV_OFF))
1204
1205 #define IFXSCU_CFG_CCUCON6_BASIC(pll0Freq, pll1Freq, pll2Freq) IFXSCU_CFG_CCUCON6_BASIC_(pll0Freq, pll1Freq, pll2Freq)
1206
1207 #define IFXSCU_CFG_CCUCON6 IFXSCU_CFG_CCUCON6_BASIC(IFXSCU_CFG_PLL_FREQ, IFXSCU_CFG_PLL1_FREQ, IFXSCU_CFG_PLL2_FREQ)
1208
1209 /************************** CCUCON7 **************************/
1210 #define IFXSCU_CFG_CCUCON7_MASK \
1211 (uint32)( \
1212 (IFX_SCU_CCUCON7_CPU1DIV_MSK << IFX_SCU_CCUCON7_CPU1DIV_OFF))
1213
1214 #define IFXSCU_CFG_CCUCON7_BASIC_(pll0Freq, pll1Freq, pll2Freq) \
1215 (uint32)( \
1216 (IFXSCU_CFG_CPU1DIV_##pll0Freq << IFX_SCU_CCUCON7_CPU1DIV_OFF))
1217
1218 #define IFXSCU_CFG_CCUCON7_BASIC(pll0Freq, pll1Freq, pll2Freq) IFXSCU_CFG_CCUCON7_BASIC_(pll0Freq, pll1Freq, pll2Freq)
1219
1220 #define IFXSCU_CFG_CCUCON7 IFXSCU_CFG_CCUCON7_BASIC(IFXSCU_CFG_PLL_FREQ, IFXSCU_CFG_PLL1_FREQ, IFXSCU_CFG_PLL2_FREQ)
1221
1222 /************************** CCUCON8 **************************/
1223 #define IFXSCU_CFG_CCUCON8_MASK \
1224 (uint32)( \
1225 (IFX_SCU_CCUCON8_CPU2DIV_MSK << IFX_SCU_CCUCON8_CPU2DIV_OFF))
1226
1227 #define IFXSCU_CFG_CCUCON8_BASIC_(pll0Freq, pll1Freq, pll2Freq) \
1228 (uint32)( \
1229 (IFXSCU_CFG_CPU2DIV_##pll0Freq << IFX_SCU_CCUCON8_CPU2DIV_OFF))
1230
1231 #define IFXSCU_CFG_CCUCON8_BASIC(pll0Freq, pll1Freq, pll2Freq) IFXSCU_CFG_CCUCON8_BASIC_(pll0Freq, pll1Freq, pll2Freq)
1232
1233 #define IFXSCU_CFG_CCUCON8 IFXSCU_CFG_CCUCON8_BASIC(IFXSCU_CFG_PLL_FREQ, IFXSCU_CFG_PLL1_FREQ, IFXSCU_CFG_PLL2_FREQ)
1234
1235 /************************** CCUCON9 **************************/
1236 #define IFXSCU_CFG_CCUCON9_MASK \
1237 (uint32)( \
1238 (IFX_SCU_CCUCON9_CPU3DIV_MSK << IFX_SCU_CCUCON9_CPU3DIV_OFF))
1239
1240 #define IFXSCU_CFG_CCUCON9_BASIC_(pll0Freq, pll1Freq, pll2Freq) \
1241 (uint32)( \
1242 (IFXSCU_CFG_CPU3DIV_##pll0Freq << IFX_SCU_CCUCON9_CPU3DIV_OFF))
1243
1244 #define IFXSCU_CFG_CCUCON9_BASIC(pll0Freq, pll1Freq, pll2Freq) IFXSCU_CFG_CCUCON9_BASIC_(pll0Freq, pll1Freq, pll2Freq)
1245
1246 #define IFXSCU_CFG_CCUCON9 IFXSCU_CFG_CCUCON9_BASIC(IFXSCU_CFG_PLL_FREQ, IFXSCU_CFG_PLL1_FREQ, IFXSCU_CFG_PLL2_FREQ)
1247
1248 /**************** Final Clock Distribution ******************/
1249
1250 #define IFXSCU_CFG_CLK_DISTRIBUTION \
1251 { \
1252 /* { uint32 value, uint32 mask }*/ \
1253 {IFXSCU_CFG_CCUCON0, IFXSCU_CFG_CCUCON0_MASK}, /*IfxScuCcu_CcuconRegConfig CCUCON0;*/ \
1254 {IFXSCU_CFG_CCUCON1, IFXSCU_CFG_CCUCON1_MASK}, /*IfxScuCcu_CcuconRegConfig CCUCON1;*/ \
1255 {IFXSCU_CFG_CCUCON2, IFXSCU_CFG_CCUCON2_MASK}, /*IfxScuCcu_CcuconRegConfig CCUCON2;*/ \
1256 {IFXSCU_CFG_CCUCON5, IFXSCU_CFG_CCUCON5_MASK}, /*IfxScuCcu_CcuconRegConfig CCUCON5;*/ \
1257 {IFXSCU_CFG_CCUCON6, IFXSCU_CFG_CCUCON6_MASK}, /*IfxScuCcu_CcuconRegConfig CCUCON6;*/ \
1258 {IFXSCU_CFG_CCUCON7, IFXSCU_CFG_CCUCON7_MASK}, /*IfxScuCcu_CcuconRegConfig CCUCON7;*/ \
1259 {IFXSCU_CFG_CCUCON8, IFXSCU_CFG_CCUCON8_MASK}, /*IfxScuCcu_CcuconRegConfig CCUCON8;*/ \
1260 {IFXSCU_CFG_CCUCON9, IFXSCU_CFG_CCUCON9_MASK}, /*IfxScuCcu_CcuconRegConfig CCUCON9;*/ \
1261 }
1262
1263 /** \brief Macros to configure FLASH.FCON registers */
1264 #define IFXSCU_CFG_FLASH_WAITSTATE_MSK 0
1265
1266 #define IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC_(pll0Freq) 0
1267
1268 #define IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC(pll0Freq) IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC_(pll0Freq)
1269
1270 #define IFXSCU_CFG_FLASH_WAITSTATE_VAL IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC(IFXSCU_CFG_PLL_FREQ)
1271
1272
1273 #define IFXSCU_CFG_FLASH_WAITSTATE \
1274 /* { uint32 value, uint32 mask }*/\
1275 {IFXSCU_CFG_FLASH_WAITSTATE_VAL, IFXSCU_CFG_FLASH_WAITSTATE_MSK}
1276 /******************************************************************************/
1277 /*---------------------------LBIST Config Macros------------------------------*/
1278 /******************************************************************************/
1279 #ifndef IFXSCULBIST_CFG_SIGNATURE_A
1280 #ifndef IFX_CFG_LBIST_BODY_ENABLED
1281 #define IFXSCULBIST_CFG_SIGNATURE_A (0xF936A7A8U)
1282 #else
1283 #define IFXSCULBIST_CFG_SIGNATURE_A (0x4072038CU)
1284 #endif
1285 #endif
1286
1287 #ifndef IFXSCULBIST_CFG_SIGNATURE_B
1288 #ifndef IFX_CFG_LBIST_BODY_ENABLED
1289 #define IFXSCULBIST_CFG_SIGNATURE_B (0xCB6D495EU)
1290 #else
1291 #define IFXSCULBIST_CFG_SIGNATURE_B (0x6E400D9CU)
1292 #endif
1293 #endif
1294
1295 #ifndef IFXSCULBIST_CFG_PATTERN_A
1296 #define IFXSCULBIST_CFG_PATTERN_A (0xC0U)
1297 #endif
1298
1299 #ifndef IFXSCULBIST_CFG_PATTERN_B
1300 #define IFXSCULBIST_CFG_PATTERN_B (0x780U)
1301 #endif
1302
1303 #ifndef IFXSCULBIST_CFG_SCANCHAINLENGTH
1304 #define IFXSCULBIST_CFG_SCANCHAINLENGTH (0x4FU)
1305 #endif
1306
1307 #ifndef IFXSCULBIST_CFG_SEED
1308 #define IFXSCULBIST_CFG_SEED (0x07U)
1309 #endif
1310
1311 /******************************************************************************/
1312 /* Enum */
1313 /******************************************************************************/
1314 /** Clock selection */
1315 typedef enum
1316 {
1317 IfxScu_CCUCON0_CLKSEL_fBack = 0,
1318 IfxScu_CCUCON0_CLKSEL_fPll = 1
1319 } IfxScu_CCUCON0_CLKSEL;
1320
1321 /** Input frequency request control */
1322 typedef enum
1323 {
1324 IfxScu_WDTCON1_IR_divBy16384 = 0,
1325 IfxScu_WDTCON1_IR_divBy256 = 1,
1326 IfxScu_WDTCON1_IR_divBy64 = 2
1327 } IfxScu_WDTCON1_IR;
1328
1329 typedef enum
1330 {
1331 IfxScu_PMCSR_REQSLP_Run = 0U, /* 00 Request CPU Run Mode */
1332 IfxScu_PMCSR_REQSLP_Idle = 1U, /* 01 Request CPU Idle Mode */
1333 IfxScu_PMCSR_REQSLP_Sleep = 2U, /* 10 Request CPU System Sleep Mode */
1334 IfxScu_PMCSR_REQSLP_Stby = 3U /* 11 Request System Standby Mode */
1335 } IfxScu_PMCSR_REQSLP;
1336
1337 /******************************************************************************/
1338
1339 #endif /* IFXSCU_CFG_H */
IfxScu_PMCSR_REQSLP_Idle
Definition: IfxScu_cfg.h:1332
IfxScu_CCUCON0_CLKSEL_fPll
Definition: IfxScu_cfg.h:1318
IfxScu_WDTCON1_IR_divBy256
Definition: IfxScu_cfg.h:1325
IfxScu_WDTCON1_IR
IfxScu_WDTCON1_IR
Definition: IfxScu_cfg.h:1322
IfxScu_PMCSR_REQSLP
IfxScu_PMCSR_REQSLP
Definition: IfxScu_cfg.h:1329
IfxScu_PMCSR_REQSLP_Run
Definition: IfxScu_cfg.h:1331
IfxScu_CCUCON0_CLKSEL
IfxScu_CCUCON0_CLKSEL
Definition: IfxScu_cfg.h:1315
IfxScu_PMCSR_REQSLP_Stby
Definition: IfxScu_cfg.h:1334
IfxScu_CCUCON0_CLKSEL_fBack
Definition: IfxScu_cfg.h:1317
IfxScu_PMCSR_REQSLP_Sleep
Definition: IfxScu_cfg.h:1333
IfxScu_WDTCON1_IR_divBy64
Definition: IfxScu_cfg.h:1326
IfxScu_WDTCON1_IR_divBy16384
Definition: IfxScu_cfg.h:1324


iLLD_TC38A: IfxScuCcu.c Source File

  • Scu
  • Std
IfxScuCcu.c
Go to the documentation of this file.
1 /**
2 * \file IfxScuCcu.c
3 * \brief SCU basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 *
41 */
42
43 /******************************************************************************/
44 /*----------------------------------Includes----------------------------------*/
45 /******************************************************************************/
46
47 #include "IfxScuCcu.h"
48
49 /******************************************************************************/
50 /*------------------------Private Variables/Constants-------------------------*/
51 /******************************************************************************/
52
53 /** \brief Flash wait state config
54 */
55 IFX_STATIC IFX_CONST IfxScuCcu_FlashWaitstateConfig IfxScuCcu_defaultFlashWaitstateConfig = IFXSCU_CFG_FLASH_WAITSTATE;
56
57 /** \brief This is a structure array and the values are defined at the Scu implementation as a macro
58 */
59 IFX_STATIC IFX_CONST IfxScuCcu_PllStepConfig IfxScuCcu_defaultPllConfigSteps[] = {
60 IFXSCU_CFG_PLL_STEPS
61 };
62
63 /******************************************************************************/
64 /*-----------------------Exported Variables/Constants-------------------------*/
65 /******************************************************************************/
66
67 IFX_CONST float32 IfxScuCcu_MA_percent[IfxScuCcu_ModulationAmplitude_count] = {
68 0.5,
69 1.0,
70 1.25,
71 1.5,
72 2.0,
73 2.5
74 };
75
76 IFX_CONST IfxScuCcu_Config IfxScuCcu_defaultClockConfig = {
77 /*IfxScuCcu_InitialStepConfig: Configuration of first step which is same as internal osc frequency. */
78 IFXSCU_CFG_PLL_INITIAL_STEP,
79 /*IfxScuCcu_PllThrottleConfig: Configuration of PLL throttling. */
80 {
81 sizeof(IfxScuCcu_defaultPllConfigSteps) / sizeof(IfxScuCcu_PllStepConfig),
82 IfxScuCcu_defaultPllConfigSteps
83 },
84 IFXSCU_CFG_CLK_DISTRIBUTION,
85 &IfxScuCcu_defaultFlashWaitstateConfig,
86 &IfxScuCcu_defaultModConfig
87 };
88
89 IFX_CONST IfxScuCcu_Mod_Config IfxScuCcu_defaultModConfig = {
90 IfxScuCcu_ModEn_disabled, /* disable is default */
91 IfxScuCcu_ModulationAmplitude_0p5, /* default 0 value */
92 };
93
94 uint32 IfxScuCcu_xtalFrequency = IFX_CFG_SCU_XTAL_FREQUENCY;
95
96 /******************************************************************************/
97 /*-------------------------Function Implementations---------------------------*/
98 /******************************************************************************/
99
100 void IfxScuCcu_calRGainParameters(IfxScuCcu_ModulationAmplitude modamp, IfxScuCcu_RGain_Values *RGain_P)
101 {
102 float32 mod_amp = IfxScuCcu_MA_percent[modamp];
103 float32 *RGainNom_Temp = &(RGain_P->RGainNom);
104 uint16 *RGain_Temp = &(RGain_P->RGainHex);
105
106 Ifx_SCU *scu = &MODULE_SCU;
107 float32 Fosc_Hz = IfxScuCcu_getOscFrequency();
108 float32 Fdco_hz = (Fosc_Hz * (scu->SYSPLLCON0.B.NDIV + 1)) / (scu->SYSPLLCON0.B.PDIV + 1);
109
110 *RGainNom_Temp = IFXSCUCCU_GET_RGAIN_NOM(mod_amp, Fdco_hz);
111 *RGain_Temp = IFXSCUCCU_GET_RGAIN_HEX(*RGainNom_Temp);
112 }
113
114
115 void IfxScuCcu_distributeClock(IfxScuCcu_ClockDistributionConfig *clockDistributionConfig)
116 {
117 IfxScuCcu_distributeClockInline(clockDistributionConfig);
118 }
119
120
121 float32 IfxScuCcu_getAsclinSFrequency(void)
122 {
123 float32 freq = 0;
124 float32 source = 0;
125
126 uint8 asclindiv[16] = {1, 1, 2, 3, 4, 5, 6, 6, 8, 8, 10, 10, 12, 12, 12, 15};
127
128 switch (SCU_CCUCON2.B.CLKSELASCLINS)
129 {
130 case 1:
131 {
132 source = IfxScuCcu_getSourceFrequency(IfxScuCcu_Fsource_1);
133
134 if (SCU_CCUCON2.B.ASCLINSDIV)
135 {
136 freq = source / asclindiv[SCU_CCUCON2.B.ASCLINSDIV];
137 }
138 }
139 break;
140 case 2:
141 {
142 freq = IfxScuCcu_getOsc0Frequency();
143 }
144 break;
145 default:
146 break;
147 }
148
149 return freq;
150 }
151
152
153 float32 IfxScuCcu_getBbbFrequency(void)
154 {
155 float32 bbbFrequency;
156 float32 sourceFrequency;
157
158 sourceFrequency = IfxScuCcu_getSourceFrequency(IfxScuCcu_Fsource_0);
159
160 switch (SCU_CCUCON0.B.LPDIV)
161 {
162 case 0: /*Not in low power mode */
163
164 if (SCU_CCUCON0.B.BBBDIV == 0)
165
166 {
167 bbbFrequency = 0.0;
168 }
169 else
170 {
171 bbbFrequency = sourceFrequency / SCU_CCUCON0.B.BBBDIV;
172 }
173
174 break;
175 case 1:
176 bbbFrequency = sourceFrequency / 30;
177 break;
178 case 2:
179 bbbFrequency = sourceFrequency / 60;
180 break;
181 case 3:
182 bbbFrequency = sourceFrequency / 120;
183 break;
184 case 4:
185 bbbFrequency = sourceFrequency / 240;
186 break;
187 default:
188 bbbFrequency = 0.0;
189 break;
190 }
191
192 return bbbFrequency;
193 }
194
195
196 float32 IfxScuCcu_getCpuFrequency(const IfxCpu_ResourceCpu cpu)
197 {
198 float32 frequency = IfxScuCcu_getSriFrequency();
199 uint32 cpuDiv = 0;
200
201 switch (cpu)
202 {
203 case IfxCpu_ResourceCpu_0:
204 cpuDiv = SCU_CCUCON6.U;
205 break;
206 case IfxCpu_ResourceCpu_1:
207 cpuDiv = SCU_CCUCON7.U;
208 break;
209 case IfxCpu_ResourceCpu_2:
210 cpuDiv = SCU_CCUCON8.U;
211 break;
212 case IfxCpu_ResourceCpu_3:
213 cpuDiv = SCU_CCUCON9.U;
214 break;
215
216 default:
217 frequency = 0.0;
218 break;
219 }
220
221 if (cpuDiv != 0)
222 {
223 frequency = frequency * ((64 - cpuDiv) / 64.0f);
224 }
225
226 return frequency;
227 }
228
229
230 float32 IfxScuCcu_getFsi2Frequency(void)
231 {
232 float32 frequency;
233 Ifx_SCU_CCUCON0 ccucon0 = SCU_CCUCON0;
234
235 if (ccucon0.B.FSI2DIV == 0)
236 {
237 frequency = 0;
238 }
239 else
240 {
241 frequency = IfxScuCcu_getSriFrequency();
242
243 if ((ccucon0.B.SRIDIV == 1) || (ccucon0.B.SRIDIV == 2))
244 {
245 frequency = frequency / ccucon0.B.FSI2DIV;
246 }
247 }
248
249 return frequency;
250 }
251
252
253 float32 IfxScuCcu_getFsiFrequency(void)
254 {
255 float32 frequency;
256 Ifx_SCU_CCUCON0 ccucon0 = SCU_CCUCON0;
257
258 if (ccucon0.B.FSIDIV == 0)
259 {
260 frequency = 0;
261 }
262 else
263 {
264 frequency = IfxScuCcu_getSriFrequency();
265
266 if ((ccucon0.B.SRIDIV == 1) || (ccucon0.B.SRIDIV == 2))
267 {
268 frequency = frequency / ccucon0.B.FSIDIV;
269 }
270 }
271
272 return frequency;
273 }
274
275
276 float32 IfxScuCcu_getMcanFrequency(void)
277 {
278 float32 mcanFreq = 0;
279 float32 mcanSource = 0;
280
281 switch (SCU_CCUCON1.B.CLKSELMCAN)
282 {
283 case 1:
284 {
285 mcanSource = IfxScuCcu_getSourceFrequency(IfxScuCcu_Fsource_1);
286
287 if (SCU_CCUCON1.B.MCANDIV)
288 {
289 mcanFreq = mcanSource / SCU_CCUCON1.B.MCANDIV;
290 }
291 }
292 break;
293 case 2:
294 {
295 mcanFreq = IfxScuCcu_getOsc0Frequency();
296 }
297 break;
298 default:
299 break;
300 }
301
302 return mcanFreq;
303 }
304
305
306 float32 IfxScuCcu_getModuleFrequency(void)
307 {
308 float32 spbFreq;
309 float32 moduleFreq;
310 Ifx_SCU_FDR scuFdr;
311 scuFdr = SCU_FDR;
312 spbFreq = IfxScuCcu_getSpbFrequency();
313
314 if (scuFdr.B.DM == 1)
315 {
316 moduleFreq = spbFreq / (1024 - scuFdr.B.STEP);
317 }
318 else if (scuFdr.B.DM == 2)
319 {
320 moduleFreq = (spbFreq * scuFdr.B.STEP) / 1024;
321 }
322 else
323 {
324 moduleFreq = 0;
325 }
326
327 return moduleFreq;
328 }
329
330
331 float32 IfxScuCcu_getMscFrequency(void)
332 {
333 float32 mscFreq = 0;
334 float32 mscSource = 0;
335
336 switch (SCU_CCUCON1.B.CLKSELMSC)
337 {
338 case 1:
339 {
340 mscSource = IfxScuCcu_getSourceFrequency(IfxScuCcu_Fsource_1);
341 }
342 break;
343 case 2:
344 {
345 mscSource = IfxScuCcu_getSourceFrequency(IfxScuCcu_Fsource_2);
346 }
347 break;
348 default:
349 break;
350 }
351
352 if (SCU_CCUCON1.B.MSCDIV)
353 {
354 mscFreq = mscSource / SCU_CCUCON1.B.MSCDIV;
355 }
356
357 return mscFreq;
358 }
359
360
361 float32 IfxScuCcu_getPerPllFrequency1(void)
362 {
363 Ifx_SCU *scu = &MODULE_SCU;
364 float32 pllFrequency1;
365 float32 oscFreq;
366 oscFreq = IfxScuCcu_getOscFrequency();
367
368 pllFrequency1 = (oscFreq * (scu->PERPLLCON0.B.NDIV + 1)) / ((scu->PERPLLCON0.B.PDIV + 1) * (scu->PERPLLCON1.B.K2DIV + 1));
369
370 return pllFrequency1;
371 }
372
373
374 float32 IfxScuCcu_getPerPllFrequency2(void)
375 {
376 Ifx_SCU *scu = &MODULE_SCU;
377 float32 pllFrequency2;
378 float32 oscFreq;
379 oscFreq = IfxScuCcu_getOscFrequency();
380
381 if (!(scu->PERPLLCON0.B.DIVBY))
382 {
383 pllFrequency2 = (oscFreq * (scu->PERPLLCON0.B.NDIV + 1)) / ((scu->PERPLLCON0.B.PDIV + 1) * (scu->PERPLLCON1.B.K3DIV + 1) * 1.6);
384 }
385 else
386 {
387 pllFrequency2 = (oscFreq * (scu->PERPLLCON0.B.NDIV + 1)) / ((scu->PERPLLCON0.B.PDIV + 1) * (scu->PERPLLCON1.B.K3DIV + 1) * 2);
388 }
389
390 return pllFrequency2;
391 }
392
393
394 float32 IfxScuCcu_getPllFrequency(void)
395 {
396 Ifx_SCU *scu = &MODULE_SCU;
397 float32 oscFreq;
398 float32 freq;
399
400 oscFreq = IfxScuCcu_getOscFrequency();
401 freq = (oscFreq * (scu->SYSPLLCON0.B.NDIV + 1)) / ((scu->SYSPLLCON1.B.K2DIV + 1) * (scu->SYSPLLCON0.B.PDIV + 1));
402 return freq;
403 }
404
405
406 float32 IfxScuCcu_getQspiFrequency(void)
407 {
408 float32 freq = 0;
409 float32 source = 0;
410
411 switch (SCU_CCUCON1.B.CLKSELQSPI)
412 {
413 case 1:
414 {
415 source = IfxScuCcu_getSourceFrequency(IfxScuCcu_Fsource_1);
416 }
417 break;
418 case 2:
419 {
420 source = IfxScuCcu_getSourceFrequency(IfxScuCcu_Fsource_2);
421 }
422 break;
423 default:
424 break;
425 }
426
427 if (SCU_CCUCON1.B.QSPIDIV)
428 {
429 freq = source / SCU_CCUCON1.B.QSPIDIV;
430 }
431
432 return freq;
433 }
434
435
436 float32 IfxScuCcu_getSourceFrequency(IfxScuCcu_Fsource fsource)
437 {
438 float32 sourcefreq;
439
440 switch (SCU_CCUCON0.B.CLKSEL)
441 {
442 case IfxScu_CCUCON0_CLKSEL_fBack:
443 sourcefreq = IfxScuCcu_getEvrFrequency();
444 break;
445 case IfxScu_CCUCON0_CLKSEL_fPll:
446
447 switch (fsource)
448 {
449 case IfxScuCcu_Fsource_0:
450 sourcefreq = IfxScuCcu_getPllFrequency();
451 break;
452 case IfxScuCcu_Fsource_1:
453 sourcefreq = IfxScuCcu_getPerPllFrequency1();
454
455 if (SCU_CCUCON1.B.PLL1DIVDIS == 0)
456 {
457 sourcefreq = sourcefreq / 2.0f;
458 }
459
460 break;
461 case IfxScuCcu_Fsource_2:
462 sourcefreq = IfxScuCcu_getPerPllFrequency2();
463 break;
464 default:
465 sourcefreq = 0;
466 break;
467 }
468
469 break;
470 default:
471 sourcefreq = 0;
472 break;
473 }
474
475 return sourcefreq;
476 }
477
478
479 float32 IfxScuCcu_getSpbFrequency(void)
480 {
481 float32 spbFrequency;
482 float32 sourceFrequency;
483 sourceFrequency = IfxScuCcu_getSourceFrequency(IfxScuCcu_Fsource_0);
484
485 switch (SCU_CCUCON0.B.LPDIV)
486 {
487 case 0: /*Not in low power mode */
488
489 if ((SCU_CCUCON0.B.SPBDIV == 0) ||
490 (SCU_CCUCON0.B.SPBDIV == 1))
491
492 {
493 spbFrequency = 0.0;
494 }
495 else
496 {
497 spbFrequency = sourceFrequency / SCU_CCUCON0.B.SPBDIV;
498 }
499
500 break;
501 case 1:
502 spbFrequency = sourceFrequency / 30;
503 break;
504 case 2:
505 spbFrequency = sourceFrequency / 60;
506 break;
507 case 3:
508 spbFrequency = sourceFrequency / 120;
509 break;
510 case 4:
511 spbFrequency = sourceFrequency / 240;
512 break;
513 default:
514 spbFrequency = 0.0;
515 break;
516 }
517
518 return spbFrequency;
519 }
520
521
522 float32 IfxScuCcu_getSriFrequency(void)
523 {
524 float32 sriFrequency;
525 float32 sourceFrequency;
526 sourceFrequency = IfxScuCcu_getSourceFrequency(IfxScuCcu_Fsource_0);
527
528 switch (SCU_CCUCON0.B.LPDIV)
529 {
530 case 0: /*Not in low power mode */
531
532 if (SCU_CCUCON0.B.SRIDIV == 0)
533 {
534 sriFrequency = 0.0;
535 }
536 else
537 {
538 sriFrequency = sourceFrequency / SCU_CCUCON0.B.SRIDIV;
539 }
540
541 break;
542 case 1:
543 sriFrequency = sourceFrequency / 30;
544 break;
545 case 2:
546 sriFrequency = sourceFrequency / 60;
547 break;
548 case 3:
549 sriFrequency = sourceFrequency / 120;
550 break;
551 case 4:
552 sriFrequency = sourceFrequency / 240;
553 break;
554 default:
555 sriFrequency = 0.0;
556 break;
557 }
558
559 return sriFrequency;
560 }
561
562
563 boolean IfxScuCcu_init(const IfxScuCcu_Config *config)
564 {
565 boolean status = 0;
566 status = IfxScuCcu_configureCcuInitialStep(&config->pllInitialStepConfig);
567
568 if (!status)
569 {
570 IfxScuCcu_modulation_init(config->modulationConfig); /* initialize modulation */
571 }
572
573 if (!status)
574 {
575 status = IfxScuCcu_distributeClockInline(&config->clockDistribution);
576 }
577
578 #if (IFX_SCU_FLASHWAITSTATECHECK == 1)
579
580 if (&config->flashFconWaitStateConfig != ((void *)0))
581 {}
582
583 #endif
584
585 if (!status)
586 {
587 status = IfxScuCcu_throttleSysPllClockInline(&config->sysPllThrottleConfig);
588 }
589
590 return status;
591 }
592
593
594 void IfxScuCcu_initConfig(IfxScuCcu_Config *cfg)
595 {
596 *cfg = IfxScuCcu_defaultClockConfig;
597 }
598
599
600 void IfxScuCcu_modulation_init(const IfxScuCcu_Mod_Config *Mod_Cfg)
601 {
602 uint16 endinitSfty_pw;
603 IfxScuCcu_RGain_Values RGain_P;
604 IfxScuCcu_ModEn mod_enable = Mod_Cfg->Mod_Enable;
605 IfxScuCcu_ModulationAmplitude Mod_Amp = Mod_Cfg->Mod_Amp;
606
607 Ifx_SCU_SYSPLLCON0 syspllcon0;
608 Ifx_SCU_SYSPLLCON2 syspllcon2;
609
610 if (mod_enable == IfxScuCcu_ModEn_enabled) /* do this only if modulation is enabled */
611 {
612 /* Get the parameters */
613 IfxScuCcu_calRGainParameters(Mod_Amp, &RGain_P);
614
615 /* clear endinit protection */
616 endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPassword();
617 IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
618
619 /* write all registers here */
620
621 /* Write SYSPLLCON2 with RGain */
622 syspllcon2.U = SCU_SYSPLLCON2.U;
623 syspllcon2.B.MODCFG = IFXSCUCCU_GET_MODCFG(RGain_P.RGainHex);
624 SCU_SYSPLLCON2.U = syspllcon2.U;
625
626 /* enable modulation now */
627 syspllcon0.U = SCU_SYSPLLCON0.U;
628 syspllcon0.B.MODEN = (uint32)IfxScuCcu_ModEn_enabled;
629 SCU_SYSPLLCON0.U = syspllcon0.U;
630
631 /* set the endinit protection again */
632 IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
633 }
634 }
635
636
637 float32 IfxScuCcu_setAsclinFFrequency(float32 asclinFFreq)
638 {
639 float32 freq = 0;
640 float32 source = IfxScuCcu_getSourceFrequency(IfxScuCcu_Fsource_2);
641 uint16 l_SEndInitPW;
642 Ifx_SCU_CCUCON2 ccucon2 = SCU_CCUCON2;
643
644 uint32 asclinFDiv = (uint32)__roundf(source / asclinFFreq);
645 asclinFDiv = __maxu(asclinFDiv, 1);
646
647 if ((asclinFDiv >= 7) && (asclinFDiv < 14) && ((asclinFDiv & 1) == 1))
648 {
649 asclinFDiv = asclinFDiv - 1;
650 }
651
652 if (asclinFDiv == 14)
653 {
654 asclinFDiv = 12;
655 }
656
657 l_SEndInitPW = IfxScuWdt_getSafetyWatchdogPassword();
658 IfxScuWdt_clearSafetyEndinit(l_SEndInitPW);
659
660 ccucon2.B.ASCLINFDIV = asclinFDiv;
661
662 while (SCU_CCUCON2.B.LCK != 0U)
663 {}
664
665 SCU_CCUCON2.U = ccucon2.U;
666
667 IfxScuWdt_setSafetyEndinit(l_SEndInitPW);
668 freq = IfxScuCcu_getAsclinFFrequency();
669 return freq;
670 }
671
672
673 float32 IfxScuCcu_setAsclinSFrequency(float32 asclinSFreq)
674 {
675 float32 freq = 0;
676 float32 source = 0;
677 uint16 l_SEndInitPW;
678 Ifx_SCU_CCUCON2 ccucon2 = SCU_CCUCON2;
679
680 switch (ccucon2.B.CLKSELASCLINS)
681 {
682 case 1:
683 {
684 source = IfxScuCcu_getSourceFrequency(IfxScuCcu_Fsource_1);
685 }
686 break;
687 case 2:
688 {
689 source = IfxScuCcu_getOsc0Frequency();
690 }
691 break;
692 default:
693 break;
694 }
695
696 uint32 asclinSDiv = (uint32)__roundf(source / asclinSFreq);
697 asclinSDiv = __maxu(asclinSDiv, 1);
698
699 if ((asclinSDiv >= 7) && (asclinSDiv < 14) && ((asclinSDiv & 1) == 1))
700 {
701 asclinSDiv = asclinSDiv - 1;
702 }
703
704 if (asclinSDiv == 14)
705 {
706 asclinSDiv = 12;
707 }
708
709 l_SEndInitPW = IfxScuWdt_getSafetyWatchdogPassword();
710 IfxScuWdt_clearSafetyEndinit(l_SEndInitPW);
711
712 ccucon2.B.ASCLINSDIV = asclinSDiv;
713
714 while (SCU_CCUCON2.B.LCK != 0U)
715 {}
716
717 SCU_CCUCON2.U = ccucon2.U;
718
719 IfxScuWdt_setSafetyEndinit(l_SEndInitPW);
720 freq = IfxScuCcu_getAsclinSFrequency();
721 return freq;
722 }
723
724
725 float32 IfxScuCcu_setBbbFrequency(float32 bbbFreq)
726 {
727 float32 freq = 0;
728 float32 source = IfxScuCcu_getSourceFrequency(IfxScuCcu_Fsource_0);
729 Ifx_SCU_CCUCON0 ccucon0;
730 uint16 l_SEndInitPW;
731 uint32 bbbDiv = (uint32)__roundf(source / bbbFreq);
732 bbbDiv = __maxu(bbbDiv, 1);
733
734 if ((bbbDiv >= 7) && (bbbDiv < 14) && ((bbbDiv & 1) == 1))
735 {
736 bbbDiv = bbbDiv - 1;
737 }
738
739 if (bbbDiv == 14)
740 {
741 bbbDiv = 12;
742 }
743
744 l_SEndInitPW = IfxScuWdt_getSafetyWatchdogPassword();
745 IfxScuWdt_clearSafetyEndinit(l_SEndInitPW);
746
747 ccucon0.U = SCU_CCUCON0.U;
748 ccucon0.B.BBBDIV = bbbDiv;
749 ccucon0.B.UP = 1;
750
751 while (SCU_CCUCON0.B.LCK != 0U)
752 {}
753
754 SCU_CCUCON0.U = ccucon0.U;
755
756 IfxScuWdt_setSafetyEndinit(l_SEndInitPW);
757
758 while (SCU_CCUCON0.B.LCK != 0U)
759 {}
760
761 freq = IfxScuCcu_getBbbFrequency();
762 return freq;
763 }
764
765
766 float32 IfxScuCcu_setCpuFrequency(IfxCpu_ResourceCpu cpu, float32 cpuFreq)
767 {
768 uint16 endinitSfty_pw;
769 float32 sriFreq;
770 uint32 cpuDiv;
771
772 sriFreq = IfxScuCcu_getSriFrequency();
773
774 if (cpuFreq >= sriFreq)
775 {
776 cpuDiv = 0;
777 }
778 else
779 {
780 cpuDiv = (uint32)(64 - ((64 * cpuFreq) / sriFreq));
781 }
782
783 endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPassword();
784
785 {
786 IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
787
788 switch (cpu)
789 {
790 case IfxCpu_ResourceCpu_0:
791 SCU_CCUCON6.U = cpuDiv;
792 break;
793 case IfxCpu_ResourceCpu_1:
794 SCU_CCUCON7.U = cpuDiv;
795 break;
796 case IfxCpu_ResourceCpu_2:
797 SCU_CCUCON8.U = cpuDiv;
798 break;
799 case IfxCpu_ResourceCpu_3:
800 SCU_CCUCON9.U = cpuDiv;
801 break;
802 default:
803 sriFreq = 0;
804 break;
805 }
806
807 IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
808 }
809
810 if (cpuDiv != 0)
811 {
812 sriFreq = sriFreq * ((64 - cpuDiv) / 64.0f);
813 }
814
815 return sriFreq;
816 }
817
818
819 float32 IfxScuCcu_setFsi2Frequency(float32 fsi2Freq)
820 {
821 float32 frequency = 0;
822 uint16 l_SEndInitPW;
823 Ifx_SCU_CCUCON0 ccucon0 = SCU_CCUCON0;
824
825 if ((ccucon0.B.SRIDIV == 1) || (ccucon0.B.SRIDIV == 2))
826 {
827 uint32 fsi2Div;
828 frequency = IfxScuCcu_getSriFrequency();
829 fsi2Div = (uint32)__roundf(frequency / fsi2Freq);
830 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (fsi2Div <= 3));
831 l_SEndInitPW = IfxScuWdt_getSafetyWatchdogPassword();
832 IfxScuWdt_clearSafetyEndinit(l_SEndInitPW);
833
834 ccucon0.U = SCU_CCUCON0.U;
835 ccucon0.B.FSI2DIV = fsi2Div;
836 ccucon0.B.UP = 1;
837
838 while (SCU_CCUCON0.B.LCK != 0U)
839 {}
840
841 SCU_CCUCON0.U = ccucon0.U;
842
843 IfxScuWdt_setSafetyEndinit(l_SEndInitPW);
844
845 while (SCU_CCUCON0.B.LCK != 0U)
846 {}
847 }
848
849 frequency = IfxScuCcu_getFsi2Frequency();
850
851 return frequency;
852 }
853
854
855 float32 IfxScuCcu_setFsiFrequency(float32 fsiFreq)
856 {
857 float32 frequency = 0;
858 uint16 l_SEndInitPW;
859 Ifx_SCU_CCUCON0 ccucon0 = SCU_CCUCON0;
860
861 if ((ccucon0.B.SRIDIV == 1) || (ccucon0.B.SRIDIV == 2))
862 {
863 uint32 fsiDiv;
864 frequency = IfxScuCcu_getSriFrequency();
865 fsiDiv = (uint32)__roundf(frequency / fsiFreq);
866 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (fsiDiv <= 3));
867 l_SEndInitPW = IfxScuWdt_getSafetyWatchdogPassword();
868 IfxScuWdt_clearSafetyEndinit(l_SEndInitPW);
869
870 ccucon0.U = SCU_CCUCON0.U;
871 ccucon0.B.FSIDIV = fsiDiv;
872 ccucon0.B.UP = 1;
873
874 while (SCU_CCUCON0.B.LCK != 0U)
875 {}
876
877 SCU_CCUCON0.U = ccucon0.U;
878
879 IfxScuWdt_setSafetyEndinit(l_SEndInitPW);
880
881 while (SCU_CCUCON0.B.LCK != 0U)
882 {}
883 }
884
885 frequency = IfxScuCcu_getFsiFrequency();
886
887 return frequency;
888 }
889
890
891 float32 IfxScuCcu_setGethFrequency(float32 gethFreq)
892 {
893 float32 freq = 0;
894 float32 source = IfxScuCcu_getSourceFrequency(IfxScuCcu_Fsource_0);
895 Ifx_SCU_CCUCON5 ccucon5;
896 uint16 l_SEndInitPW;
897 uint32 gethDiv = (uint32)__roundf(source / gethFreq);
898 gethDiv = __maxu(gethDiv, 1);
899
900 if ((gethDiv >= 7) && (gethDiv < 14) && ((gethDiv & 1) == 1))
901 {
902 gethDiv = gethDiv - 1;
903 }
904
905 if (gethDiv == 14)
906 {
907 gethDiv = 12;
908 }
909
910 l_SEndInitPW = IfxScuWdt_getSafetyWatchdogPassword();
911 IfxScuWdt_clearSafetyEndinit(l_SEndInitPW);
912
913 ccucon5.U = SCU_CCUCON5.U;
914 ccucon5.B.GETHDIV = gethDiv;
915 ccucon5.B.UP = 1;
916
917 while (SCU_CCUCON5.B.LCK != 0U)
918 {}
919
920 SCU_CCUCON5.U = ccucon5.U;
921
922 IfxScuWdt_setSafetyEndinit(l_SEndInitPW);
923
924 while (SCU_CCUCON5.B.LCK != 0U)
925 {}
926
927 freq = IfxScuCcu_getGethFrequency();
928 return freq;
929 }
930
931
932 float32 IfxScuCcu_setGtmFrequency(float32 gtmFreq)
933 {
934 uint16 l_SEndInitPW;
935 Ifx_SCU_CCUCON0 ccucon0 = SCU_CCUCON0;
936 uint32 gtmDiv = 0;
937
938 if (gtmFreq == (IfxScuCcu_getSpbFrequency() * 2))
939 {
940 gtmDiv = 1; // if GtmDiv ==1, source Freq is (IfxScuCcu_getSpbFrequency() * 2);
941 }
942 else
943 {
944 float32 inputFreq = IfxScuCcu_getSourceFrequency(IfxScuCcu_Fsource_0);
945 gtmDiv = (uint32)__roundf(inputFreq / gtmFreq);
946 gtmDiv = __maxu(gtmDiv, 1);
947 }
948
949 if ((gtmDiv >= 7) && (gtmDiv < 14) && ((gtmDiv & 1) == 1))
950 {
951 gtmDiv = gtmDiv - 1;
952 }
953
954 if (gtmDiv == 14)
955 {
956 gtmDiv = 12;
957 }
958
959 l_SEndInitPW = IfxScuWdt_getSafetyWatchdogPassword();
960 IfxScuWdt_clearSafetyEndinit(l_SEndInitPW);
961 ccucon0.B.GTMDIV = gtmDiv;
962 ccucon0.B.UP = 1;
963
964 while (SCU_CCUCON0.B.LCK != 0U)
965 {}
966
967 SCU_CCUCON0.U = ccucon0.U;
968
969 IfxScuWdt_setSafetyEndinit(l_SEndInitPW);
970
971 while (SCU_CCUCON0.B.LCK != 0U)
972 {}
973
974 return IfxScuCcu_getGtmFrequency();
975 }
976
977
978 float32 IfxScuCcu_setI2cFrequency(float32 i2cFreq)
979 {
980 float32 freq = 0;
981 float32 source = IfxScuCcu_getSourceFrequency(IfxScuCcu_Fsource_2);
982 Ifx_SCU_CCUCON1 ccucon1;
983 uint16 l_SEndInitPW;
984 uint32 i2cDiv = (uint32)__roundf(source / i2cFreq);
985 i2cDiv = __maxu(i2cDiv, 1);
986
987 if ((i2cDiv >= 7) && (i2cDiv < 14) && ((i2cDiv & 1) == 1))
988 {
989 i2cDiv = i2cDiv - 1;
990 }
991
992 if (i2cDiv == 14)
993 {
994 i2cDiv = 12;
995 }
996
997 l_SEndInitPW = IfxScuWdt_getSafetyWatchdogPassword();
998 IfxScuWdt_clearSafetyEndinit(l_SEndInitPW);
999
1000 ccucon1.U = SCU_CCUCON1.U;
1001 ccucon1.B.I2CDIV = i2cDiv;
1002
1003 while (SCU_CCUCON1.B.LCK != 0U)
1004 {}
1005
1006 SCU_CCUCON1.U = ccucon1.U;
1007
1008 IfxScuWdt_setSafetyEndinit(l_SEndInitPW);
1009
1010 while (SCU_CCUCON1.B.LCK != 0U)
1011 {}
1012
1013 freq = IfxScuCcu_getI2cFrequency();
1014 return freq;
1015 }
1016
1017
1018 float32 IfxScuCcu_setMcanFrequency(float32 mcanFreq)
1019 {
1020 float32 source = 0;
1021 Ifx_SCU_CCUCON1 ccucon1 = SCU_CCUCON1;
1022 uint16 l_SEndInitPW;
1023
1024 switch (ccucon1.B.CLKSELMCAN)
1025 {
1026 case 1:
1027 {
1028 source = IfxScuCcu_getSourceFrequency(IfxScuCcu_Fsource_1);
1029 }
1030 break;
1031 case 2:
1032 {
1033 source = IfxScuCcu_getOsc0Frequency();
1034 }
1035 break;
1036 default:
1037 break;
1038 }
1039
1040 uint32 mcanDiv = (uint32)__roundf(source / mcanFreq);
1041 mcanDiv = __maxu(mcanDiv, 1);
1042
1043 if ((mcanDiv >= 7) && (mcanDiv < 14) && ((mcanDiv & 1) == 1))
1044 {
1045 mcanDiv = mcanDiv - 1;
1046 }
1047
1048 if (mcanDiv == 14)
1049 {
1050 mcanDiv = 12;
1051 }
1052
1053 l_SEndInitPW = IfxScuWdt_getSafetyWatchdogPassword();
1054 IfxScuWdt_clearSafetyEndinit(l_SEndInitPW);
1055
1056 ccucon1.B.MCANDIV = mcanDiv;
1057
1058 while (SCU_CCUCON1.B.LCK != 0U)
1059 {}
1060
1061 SCU_CCUCON1.U = ccucon1.U;
1062
1063 IfxScuWdt_setSafetyEndinit(l_SEndInitPW);
1064
1065 while (SCU_CCUCON1.B.LCK != 0U)
1066 {}
1067
1068 return IfxScuCcu_getMcanFrequency();
1069 }
1070
1071
1072 float32 IfxScuCcu_setMcanhFrequency(float32 mcanhFreq)
1073 {
1074 float32 freq = 0;
1075 float32 source = IfxScuCcu_getSourceFrequency(IfxScuCcu_Fsource_0);
1076 Ifx_SCU_CCUCON5 ccucon5;
1077 uint16 l_SEndInitPW;
1078 uint32 mcanhDiv = (uint32)__roundf(source / mcanhFreq);
1079 mcanhDiv = __maxu(mcanhDiv, 1);
1080
1081 if ((mcanhDiv >= 7) && (mcanhDiv < 14) && ((mcanhDiv & 1) == 1))
1082 {
1083 mcanhDiv = mcanhDiv - 1;
1084 }
1085
1086 if (mcanhDiv == 14)
1087 {
1088 mcanhDiv = 12;
1089 }
1090
1091 l_SEndInitPW = IfxScuWdt_getSafetyWatchdogPassword();
1092 IfxScuWdt_clearSafetyEndinit(l_SEndInitPW);
1093
1094 ccucon5.U = SCU_CCUCON5.U;
1095 ccucon5.B.MCANHDIV = mcanhDiv;
1096 ccucon5.B.UP = 1;
1097
1098 while (SCU_CCUCON5.B.LCK != 0U)
1099 {}
1100
1101 SCU_CCUCON5.U = ccucon5.U;
1102
1103 IfxScuWdt_setSafetyEndinit(l_SEndInitPW);
1104
1105 while (SCU_CCUCON5.B.LCK != 0U)
1106 {}
1107
1108 freq = IfxScuCcu_getMcanhFrequency();
1109 return freq;
1110 }
1111
1112
1113 float32 IfxScuCcu_setMscFrequency(float32 mscFreq)
1114 {
1115 float32 mscSource = 0;
1116 Ifx_SCU_CCUCON1 ccucon1 = SCU_CCUCON1;
1117 uint16 l_SEndInitPW;
1118
1119 switch (ccucon1.B.CLKSELMSC)
1120 {
1121 case 1:
1122 {
1123 mscSource = IfxScuCcu_getSourceFrequency(IfxScuCcu_Fsource_1);
1124 }
1125 break;
1126 case 2:
1127 {
1128 mscSource = IfxScuCcu_getSourceFrequency(IfxScuCcu_Fsource_2);
1129 }
1130 break;
1131 default:
1132 break;
1133 }
1134
1135 uint32 mscDiv = (uint32)__roundf(mscSource / mscFreq);
1136 mscDiv = __maxu(mscDiv, 1);
1137
1138 if ((mscDiv >= 7) && (mscDiv < 14) && ((mscDiv & 1) == 1))
1139 {
1140 mscDiv = mscDiv - 1;
1141 }
1142
1143 if (mscDiv == 14)
1144 {
1145 mscDiv = 12;
1146 }
1147
1148 l_SEndInitPW = IfxScuWdt_getSafetyWatchdogPassword();
1149 IfxScuWdt_clearSafetyEndinit(l_SEndInitPW);
1150
1151 ccucon1.B.MSCDIV = mscDiv;
1152
1153 while (SCU_CCUCON1.B.LCK != 0U)
1154 {}
1155
1156 SCU_CCUCON1.U = ccucon1.U;
1157
1158 IfxScuWdt_setSafetyEndinit(l_SEndInitPW);
1159
1160 while (SCU_CCUCON1.B.LCK != 0U)
1161 {}
1162
1163 return IfxScuCcu_getMscFrequency();
1164 }
1165
1166
1167 float32 IfxScuCcu_setQspiFrequency(float32 qspiFreq)
1168 {
1169 float32 source = 0;
1170 Ifx_SCU_CCUCON1 ccucon1 = SCU_CCUCON1;
1171 uint16 l_SEndInitPW;
1172
1173 switch (SCU_CCUCON1.B.CLKSELQSPI)
1174 {
1175 case 1:
1176 {
1177 source = IfxScuCcu_getSourceFrequency(IfxScuCcu_Fsource_1);
1178 }
1179 break;
1180 case 2:
1181 {
1182 source = IfxScuCcu_getSourceFrequency(IfxScuCcu_Fsource_2);
1183 }
1184 break;
1185 default:
1186 break;
1187 }
1188
1189 uint32 qspiDiv = (uint32)__roundf(source / qspiFreq);
1190 qspiDiv = __maxu(qspiDiv, 1);
1191
1192 if ((qspiDiv >= 7) && (qspiDiv < 14) && ((qspiDiv & 1) == 1))
1193 {
1194 qspiDiv = qspiDiv - 1;
1195 }
1196
1197 if (qspiDiv == 14)
1198 {
1199 qspiDiv = 12;
1200 }
1201
1202 l_SEndInitPW = IfxScuWdt_getSafetyWatchdogPassword();
1203 IfxScuWdt_clearSafetyEndinit(l_SEndInitPW);
1204
1205 ccucon1.B.QSPIDIV = qspiDiv;
1206
1207 while (SCU_CCUCON1.B.LCK != 0U)
1208 {}
1209
1210 SCU_CCUCON1.U = ccucon1.U;
1211
1212 IfxScuWdt_setSafetyEndinit(l_SEndInitPW);
1213
1214 while (SCU_CCUCON1.B.LCK != 0U)
1215 {}
1216
1217 return IfxScuCcu_getQspiFrequency();
1218 }
1219
1220
1221 float32 IfxScuCcu_setSpbFrequency(float32 spbFreq)
1222 {
1223 /* TODO: check whether it is necessary to disable trap and/or the safety */
1224 uint16 l_EndInitPW;
1225 uint16 l_SEndInitPW;
1226 Ifx_SCU_CCUCON0 ccucon0;
1227 float32 inputFreq = IfxScuCcu_getSourceFrequency(IfxScuCcu_Fsource_0);
1228 uint32 spbDiv = (uint32)(inputFreq / spbFreq);
1229 spbDiv = __maxu(spbDiv, 2);
1230
1231 if ((spbDiv >= 7) && (spbDiv < 14) && ((spbDiv & 1) == 1))
1232 {
1233 spbDiv = spbDiv - 1;
1234 }
1235
1236 if (spbDiv == 14)
1237 {
1238 spbDiv = 12;
1239 }
1240
1241 l_EndInitPW = IfxScuWdt_getCpuWatchdogPassword();
1242 l_SEndInitPW = IfxScuWdt_getSafetyWatchdogPassword();
1243
1244 IfxScuWdt_clearCpuEndinit(l_EndInitPW);
1245 Ifx_SCU_TRAPDIS0 trapdis0;
1246 trapdis0.U = SCU_TRAPDIS0.U;
1247 SCU_TRAPDIS0.U |= 0x3E0U;
1248 IfxScuWdt_setCpuEndinit(l_EndInitPW);
1249
1250 IfxScuWdt_clearSafetyEndinit(l_SEndInitPW);
1251 ccucon0.U = SCU_CCUCON0.U;
1252 ccucon0.B.SPBDIV = spbDiv;
1253 ccucon0.B.UP = 1;
1254
1255 while (SCU_CCUCON0.B.LCK != 0U)
1256 {}
1257
1258 SCU_CCUCON0.U = ccucon0.U;
1259 IfxScuWdt_setSafetyEndinit(l_SEndInitPW);
1260
1261 IfxScuWdt_clearCpuEndinit(l_EndInitPW);
1262 SCU_TRAPDIS0.U = trapdis0.U;
1263 IfxScuWdt_setCpuEndinit(l_EndInitPW);
1264
1265 while (SCU_CCUCON0.B.LCK != 0U)
1266 {}
1267
1268 return IfxScuCcu_getSpbFrequency();
1269 }
1270
1271
1272 float32 IfxScuCcu_setSriFrequency(float32 sriFreq)
1273 {
1274 float32 freq = 0;
1275 float32 source = IfxScuCcu_getSourceFrequency(IfxScuCcu_Fsource_0);
1276 Ifx_SCU_CCUCON0 ccucon0;
1277 uint16 l_SEndInitPW;
1278 uint32 sriDiv = (uint32)__roundf(source / sriFreq);
1279 sriDiv = __maxu(sriDiv, 1);
1280
1281 if ((sriDiv >= 7) && (sriDiv < 14) && ((sriDiv & 1) == 1))
1282 {
1283 sriDiv = sriDiv - 1;
1284 }
1285
1286 if (sriDiv == 14)
1287 {
1288 sriDiv = 12;
1289 }
1290
1291 l_SEndInitPW = IfxScuWdt_getSafetyWatchdogPassword();
1292 IfxScuWdt_clearSafetyEndinit(l_SEndInitPW);
1293
1294 ccucon0.U = SCU_CCUCON0.U;
1295 ccucon0.B.SRIDIV = sriDiv;
1296 ccucon0.B.UP = 1;
1297
1298 while (SCU_CCUCON0.B.LCK != 0U)
1299 {}
1300
1301 SCU_CCUCON0.U = ccucon0.U;
1302
1303 IfxScuWdt_setSafetyEndinit(l_SEndInitPW);
1304
1305 while (SCU_CCUCON0.B.LCK != 0U)
1306 {}
1307
1308 freq = IfxScuCcu_getSriFrequency();
1309 return freq;
1310 }
1311
1312
1313 float32 IfxScuCcu_setStmFrequency(float32 stmFreq)
1314 {
1315 float32 freq = 0;
1316 float32 source = IfxScuCcu_getSourceFrequency(IfxScuCcu_Fsource_0);
1317 Ifx_SCU_CCUCON0 ccucon0;
1318 uint16 l_SEndInitPW;
1319 uint32 stmDiv = (uint32)__roundf(source / stmFreq);
1320 stmDiv = __maxu(stmDiv, 1);
1321
1322 if ((stmDiv >= 7) && (stmDiv < 14) && ((stmDiv & 1) == 1))
1323 {
1324 stmDiv = stmDiv - 1;
1325 }
1326
1327 if (stmDiv == 14)
1328 {
1329 stmDiv = 12;
1330 }
1331
1332 l_SEndInitPW = IfxScuWdt_getSafetyWatchdogPassword();
1333 IfxScuWdt_clearSafetyEndinit(l_SEndInitPW);
1334
1335 ccucon0.U = SCU_CCUCON0.U;
1336 ccucon0.B.STMDIV = stmDiv;
1337 ccucon0.B.UP = 1;
1338
1339 while (SCU_CCUCON0.B.LCK != 0U)
1340 {}
1341
1342 SCU_CCUCON0.U = ccucon0.U;
1343
1344 IfxScuWdt_setSafetyEndinit(l_SEndInitPW);
1345
1346 while (SCU_CCUCON0.B.LCK != 0U)
1347 {}
1348
1349 freq = IfxScuCcu_getStmFrequency();
1350 return freq;
1351 }
1352
1353
1354 void IfxScuCcu_switchToBackupClock(const IfxScuCcu_Config *cfg)
1355 {
1356 uint16 endinitSfty_pw;
1357 int pllStepsCount;
1358 IfxScuCcu_PllThrottleConfig pllThrottleConfig = cfg->sysPllThrottleConfig;
1359
1360 if (SCU_CCUCON0.B.CLKSEL == 0) /* Already source is backup clock */
1361 {
1362 return;
1363 }
1364
1365 endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPassword();
1366
1367 /*Start Pll ramp down sequence */
1368 for (pllStepsCount = pllThrottleConfig.numOfSteps; pllStepsCount > 0; pllStepsCount--)
1369 { /*iterate through number of pll steps */
1370 {
1371 IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
1372
1373 /*Configure K2 divider */
1374 while (SCU_SYSPLLSTAT.B.K2RDY == 0U)
1375 {
1376 /*Wait until K2 divider is ready */
1377 /*No "timeout" required, because if it hangs, Safety Endinit will give a trap */
1378 }
1379
1380 /*Now set the K2 divider value for the step corresponding to step count */
1381 SCU_SYSPLLCON1.B.K2DIV = pllThrottleConfig.pllSteps[pllStepsCount - 1].k2Step;
1382 IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
1383
1384 /*Wait for waitCounter corresponding to the pll step */
1385 //IfxScuCcu_wait(pllThrottleConfig.pllSteps[pllStepsCount - 1].waitTime);
1386 }
1387 }
1388
1389 /* Reset Safety ENDINIT, SCU_CCUCON registers are protected*/
1390 IfxScuWdt_clearSafetyEndinitInline(endinitSfty_pw);
1391
1392 while (SCU_CCUCON0.B.LCK != 0U)
1393 {} /*Wait till ccucon0 lock is set, No "timeout" required, ENDINIT watch-dog is active! */
1394
1395 {
1396 Ifx_SCU_CCUCON0 scu_ccucon0;
1397 scu_ccucon0.U = SCU_CCUCON0.U;
1398 scu_ccucon0.B.CLKSEL = 0; /*Select the EVR as fsource0/1/2 for the clock distribution */
1399 scu_ccucon0.B.UP = 1; /*Update the ccucon0 register */
1400 SCU_CCUCON0.U = scu_ccucon0.U;
1401 }
1402 }
1403
1404
1405 void IfxScuCcu_throttleSysPllClock(IfxScuCcu_PllThrottleConfig *pllThrottleConfig)
1406 {
1407 IfxScuCcu_throttleSysPllClockInline(pllThrottleConfig);
1408 }
IfxScuCcu_setGtmFrequency
float32 IfxScuCcu_setGtmFrequency(float32 gtmFreq)
API to set GTM frequency (with GTM divider) This API configure GTM divider values in CCUCON registers...
Definition: IfxScuCcu.c:932
IfxScuCcu_setMcanFrequency
float32 IfxScuCcu_setMcanFrequency(float32 mcanFreq)
API to set MCAN frequency (with MCAN divider) This API configure MCAN divider values in CCUCON regist...
Definition: IfxScuCcu.c:1018
IfxScuCcu_Config::sysPllThrottleConfig
IfxScuCcu_PllThrottleConfig sysPllThrottleConfig
Configuration of PLL throttling.
Definition: IfxScuCcu.h:660
IfxScuCcu_getSpbFrequency
float32 IfxScuCcu_getSpbFrequency(void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider...
Definition: IfxScuCcu.c:479
IfxScuCcu_setStmFrequency
float32 IfxScuCcu_setStmFrequency(float32 stmFreq)
API to set STM frequency (with STM divider) This API configure Stm divider values in CCUCON registers...
Definition: IfxScuCcu.c:1313
IfxScuCcu_Config::modulationConfig
IFX_CONST IfxScuCcu_Mod_Config * modulationConfig
modulation configuration
Definition: IfxScuCcu.h:663
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxScuCcu_Config::clockDistribution
IfxScuCcu_ClockDistributionConfig clockDistribution
Configuration of of bus clocks and other module clock distribution.
Definition: IfxScuCcu.h:661
IfxScuCcu_getAsclinFFrequency
IFX_INLINE float32 IfxScuCcu_getAsclinFFrequency(void)
API to get ASCLINF divider frequency. This API returns the based on the divider value in CCUCON regis...
Definition: IfxScuCcu.h:1570
IfxScuWdt_clearSafetyEndinitInline
IFX_INLINE void IfxScuWdt_clearSafetyEndinitInline(uint16 password)
SCUWDT Inline API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.h:581
IfxScu_CCUCON0_CLKSEL_fPll
Definition: IfxScu_cfg.h:1318
IfxScuCcu_getAsclinSFrequency
float32 IfxScuCcu_getAsclinSFrequency(void)
API to get ASCLINS divider frequency. This API returns the ASCLINS frequency based on the divider val...
Definition: IfxScuCcu.c:121
IfxScuCcu_setQspiFrequency
float32 IfxScuCcu_setQspiFrequency(float32 qspiFreq)
API to set QSPI frequency (with QSPI divider) This API configure Qspi divider values in CCUCON regist...
Definition: IfxScuCcu.c:1167
IfxScuCcu_Config
Configuration structure SCU module.
Definition: IfxScuCcu.h:657
IfxScuCcu_PllStepConfig::k2Step
uint8 k2Step
K2 divider value for this step.
Definition: IfxScuCcu.h:583
IfxScuCcu_throttleSysPllClock
void IfxScuCcu_throttleSysPllClock(IfxScuCcu_PllThrottleConfig *pllThrottleConfig)
Definition: IfxScuCcu.c:1405
IfxScuCcu_distributeClock
void IfxScuCcu_distributeClock(IfxScuCcu_ClockDistributionConfig *clockDistributionConfig)
API for clock distribution.
Definition: IfxScuCcu.c:115
uint32
unsigned long uint32
Definition: Platform_Types.h:116
float32
float float32
Definition: Platform_Types.h:170
IfxScuCcu_Fsource_0
fSource0
Definition: IfxScuCcu.h:302
IfxScuCcu_Mod_Config::Mod_Amp
IfxScuCcu_ModulationAmplitude Mod_Amp
modulation amplitude
Definition: IfxScuCcu.h:650
IfxScuCcu_PllThrottleConfig::numOfSteps
uint8 numOfSteps
Number of PLL divider steps during clock throttling.
Definition: IfxScuCcu.h:639
IFXSCU_CFG_PLL_STEPS
#define IFXSCU_CFG_PLL_STEPS
Definition: IfxScu_cfg.h:534
IfxScuCcu_setAsclinSFrequency
float32 IfxScuCcu_setAsclinSFrequency(float32 asclinSFreq)
API to set ASCLINS frequency (with ASCLINS divider) This API configure ASCLINS divider values in CCUC...
Definition: IfxScuCcu.c:673
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxScuCcu_distributeClockInline
IFX_INLINE boolean IfxScuCcu_distributeClockInline(const IfxScuCcu_ClockDistributionConfig *clockDistributionConfig)
Inlined API for clock distribution For each CCUCON register update the configured value with the mask...
Definition: IfxScuCcu.h:1360
IfxScuCcu_getPerPllFrequency2
float32 IfxScuCcu_getPerPllFrequency2(void)
API to get actual PER PLL2 (K3 Divider) frequency This API returns the PER PLL2 frequency based on th...
Definition: IfxScuCcu.c:374
IfxScuCcu_defaultClockConfig
IFX_CONST IfxScuCcu_Config IfxScuCcu_defaultClockConfig
Definition: IfxScuCcu.c:76
IfxScuCcu_getStmFrequency
IFX_INLINE float32 IfxScuCcu_getStmFrequency(void)
API to get STM divider frequency. This API returns the based on the divider value in CCUCON register ...
Definition: IfxScuCcu.h:1673
IfxScuCcu_setFsiFrequency
float32 IfxScuCcu_setFsiFrequency(float32 fsiFreq)
API to set FSI frequency (with FSI divider) This API configure Fsi divider values in CCUCON registers...
Definition: IfxScuCcu.c:855
IfxScuCcu_getPllFrequency
float32 IfxScuCcu_getPllFrequency(void)
API to get actual Sys PLL output frequency. This API returns the based on the divider values in CCUCO...
Definition: IfxScuCcu.c:394
IfxScuCcu_setCpuFrequency
float32 IfxScuCcu_setCpuFrequency(IfxCpu_ResourceCpu cpu, float32 cpuFreq)
API to set CPU frequency (with CPU divider) This API configure CPU divider values in CCUCON registers...
Definition: IfxScuCcu.c:766
IFXSCU_CFG_FLASH_WAITSTATE
#define IFXSCU_CFG_FLASH_WAITSTATE
Definition: IfxScu_cfg.h:1273
IfxScuCcu_RGain_Values::RGainNom
float32 RGainNom
RGain Nominal value.
Definition: IfxScuCcu.h:672
IfxScuCcu_xtalFrequency
uint32 IfxScuCcu_xtalFrequency
Definition: IfxScuCcu.c:94
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxScuWdt_clearSafetyEndinit
void IfxScuWdt_clearSafetyEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:305
IfxCpu_ResourceCpu
IfxCpu_ResourceCpu
List of the available CPU resources.
Definition: IfxCpu_cfg.h:157
IfxScuCcu_ClockDistributionConfig
Configuration structure type for all the CCUCON registers to configure clock distribution.
Definition: IfxScuCcu.h:615
IfxScuCcu_ModEn
IfxScuCcu_ModEn
modulation enable
Definition: IfxScuCcu.h:531
IfxScuCcu_getEvrFrequency
IFX_INLINE float32 IfxScuCcu_getEvrFrequency(void)
API to get EVR Oscillator frequency. This API returns the constant which is specific to the ScuCcu of...
Definition: IfxScuCcu.h:1585
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxScuCcu_RGain_Values::RGainHex
uint16 RGainHex
RGain Hex value.
Definition: IfxScuCcu.h:673
IfxScuCcu_configureCcuInitialStep
IFX_INLINE boolean IfxScuCcu_configureCcuInitialStep(const IfxScuCcu_InitialStepConfig *pllInitStepCfg)
This inline function configures the Ccu SYS PLLs initial step and PER PLL.
Definition: IfxScuCcu.h:1172
IfxScuCcu_initConfig
void IfxScuCcu_initConfig(IfxScuCcu_Config *cfg)
Initializes the clock configuration with default values.
Definition: IfxScuCcu.c:594
IfxScuCcu_getMcanhFrequency
IFX_INLINE float32 IfxScuCcu_getMcanhFrequency(void)
API to get MCANH divider frequency. This API returns the based on the divider value in CCUCON registe...
Definition: IfxScuCcu.h:1629
IfxScuCcu_defaultFlashWaitstateConfig
IFX_STATIC IFX_CONST IfxScuCcu_FlashWaitstateConfig IfxScuCcu_defaultFlashWaitstateConfig
Flash wait state config.
Definition: IfxScuCcu.c:55
IfxScuCcu_ModulationAmplitude_count
range
Definition: IfxScuCcu.h:356
IfxScuCcu_setBbbFrequency
float32 IfxScuCcu_setBbbFrequency(float32 bbbFreq)
API to set BBB frequency (with Bbb divider) This API configure Bbb divider values in CCUCON registers...
Definition: IfxScuCcu.c:725
IfxScuCcu_setAsclinFFrequency
float32 IfxScuCcu_setAsclinFFrequency(float32 asclinFFreq)
API to set ASCLINF frequency (with ASCLINF divider) This API configure ASCLINF divider values in CCUC...
Definition: IfxScuCcu.c:637
IfxScuCcu_getOscFrequency
IFX_INLINE float32 IfxScuCcu_getOscFrequency(void)
API to get Oscillator 0 frequency. This API returns the fOsc0 frequency based on the divider value in...
Definition: IfxScuCcu.h:1641
IfxScuCcu_getCpuFrequency
float32 IfxScuCcu_getCpuFrequency(const IfxCpu_ResourceCpu cpu)
This API returns the Cpu frequency based on the divider value in CCUCON register and fSource frequenc...
Definition: IfxScuCcu.c:196
IfxCpu_ResourceCpu_2
CPU 2.
Definition: IfxCpu_cfg.h:161
IfxScuCcu_ModulationAmplitude_0p5
0.5%
Definition: IfxScuCcu.h:350
IfxScuCcu_getFsi2Frequency
float32 IfxScuCcu_getFsi2Frequency(void)
API to get FSI2 divider frequency in Hz. This API returns the fFSI2 frequency based on the divider va...
Definition: IfxScuCcu.c:230
IfxScuCcu_setFsi2Frequency
float32 IfxScuCcu_setFsi2Frequency(float32 fsi2Freq)
API to set FSI2 frequency (with FSI2 divider) This API configure Fsi2 divider values in CCUCON regist...
Definition: IfxScuCcu.c:819
IFXSCU_CFG_CLK_DISTRIBUTION
#define IFXSCU_CFG_CLK_DISTRIBUTION
Definition: IfxScu_cfg.h:1250
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:50
IfxScuCcu_Fsource
IfxScuCcu_Fsource
clock source selection
Definition: IfxScuCcu.h:300
IfxScuCcu_calRGainParameters
void IfxScuCcu_calRGainParameters(IfxScuCcu_ModulationAmplitude modamp, IfxScuCcu_RGain_Values *RGain_P)
Definition: IfxScuCcu.c:100
IfxScuCcu_getPerPllFrequency1
float32 IfxScuCcu_getPerPllFrequency1(void)
API to get actual PER PLL1 frequency This API returns the PER PLL1 frequency based on the K2 divider ...
Definition: IfxScuCcu.c:361
IfxScuCcu_getModuleFrequency
float32 IfxScuCcu_getModuleFrequency(void)
get source frequency fSOURCE. This API returns the source frequency based on the configurations with ...
Definition: IfxScuCcu.c:306
IfxScuCcu_getSourceFrequency
float32 IfxScuCcu_getSourceFrequency(IfxScuCcu_Fsource fsource)
get source frequency fSOURCE. This API returns the source frequency based on the configurations with ...
Definition: IfxScuCcu.c:436
IFXSCUCCU_GET_RGAIN_HEX
#define IFXSCUCCU_GET_RGAIN_HEX(RGain_Nom)
Get RGAin HEX from RGain Nominal value.
Definition: IfxScuCcu.h:267
IfxScuCcu_getGtmFrequency
IFX_INLINE float32 IfxScuCcu_getGtmFrequency(void)
API to get GTMdivider frequency This API returns the based on the divider value in CCUCON register an...
Definition: IfxScuCcu.h:1597
IfxScuCcu_ModulationAmplitude
IfxScuCcu_ModulationAmplitude
ENUM for MA (%) values.
Definition: IfxScuCcu.h:348
IfxScuCcu_PllThrottleConfig
Definition: IfxScuCcu.h:637
IfxScuCcu_MA_percent
IFX_CONST float32 IfxScuCcu_MA_percent[IfxScuCcu_ModulationAmplitude_count]
Definition: IfxScuCcu.c:67
IfxScuCcu_PllThrottleConfig::pllSteps
IFX_CONST IfxScuCcu_PllStepConfig * pllSteps
Pointer to the array of Pll divider step configuration.
Definition: IfxScuCcu.h:640
IfxScuCcu_Config::flashFconWaitStateConfig
IFX_CONST IfxScuCcu_FlashWaitstateConfig * flashFconWaitStateConfig
Configuration of flash waitstate.
Definition: IfxScuCcu.h:662
IfxScu_CCUCON0_CLKSEL_fBack
Definition: IfxScu_cfg.h:1317
IfxScuCcu_setI2cFrequency
float32 IfxScuCcu_setI2cFrequency(float32 i2cFreq)
API to set I2C frequency (with I2C divider) This API configure adas divider values in CCUCON register...
Definition: IfxScuCcu.c:978
IFXSCU_CFG_PLL_INITIAL_STEP
#define IFXSCU_CFG_PLL_INITIAL_STEP
Definition: IfxScu_cfg.h:553
IfxScuCcu_ModEn_enabled
enable modulation
Definition: IfxScuCcu.h:534
IfxScuCcu_FlashWaitstateConfig
Configuration structure type for the Flash waitstate configuration.
Definition: IfxScuCcu.h:603
IfxScuCcu_setSpbFrequency
float32 IfxScuCcu_setSpbFrequency(float32 spbFreq)
API to set SPB frequency (with SPB divider) This API configure SPB divider values in CCUCON registers...
Definition: IfxScuCcu.c:1221
IFXSCUCCU_GET_RGAIN_NOM
#define IFXSCUCCU_GET_RGAIN_NOM(MA, FDco)
get Rgain from MA and FDco
Definition: IfxScuCcu.h:263
IfxScuCcu_getMcanFrequency
float32 IfxScuCcu_getMcanFrequency(void)
API to get MCAN divider frequency. This API returns the based on the divider value in CCUCON register...
Definition: IfxScuCcu.c:276
IfxScuCcu_setMscFrequency
float32 IfxScuCcu_setMscFrequency(float32 mscFreq)
API to set MSC frequency (with MSC divider) This API configure MSC divider values in CCUCON registers...
Definition: IfxScuCcu.c:1113
IfxScuCcu_init
boolean IfxScuCcu_init(const IfxScuCcu_Config *config)
API to initialize the SCU Clock Control Unit. This API initialize the Sys PLL with ramp steps...
Definition: IfxScuCcu.c:563
IfxScuCcu_Fsource_1
fSource1
Definition: IfxScuCcu.h:303
IfxCpu_ResourceCpu_3
CPU 3.
Definition: IfxCpu_cfg.h:162
IfxScuCcu_setGethFrequency
float32 IfxScuCcu_setGethFrequency(float32 gethFreq)
API to set GETH frequency (with GETH divider) This API configure geth divider values in CCUCON regist...
Definition: IfxScuCcu.c:891
uint16
unsigned short uint16
Definition: Platform_Types.h:112
__roundf
#define __roundf
Definition: IfxCpu_IntrinsicsDcc.h:1625
IfxScuWdt_setSafetyEndinit
void IfxScuWdt_setSafetyEndinit(uint16 password)
SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:668
IfxScuCcu_getFsiFrequency
float32 IfxScuCcu_getFsiFrequency(void)
API to get FSI divider frequency in Hz. This API returns the fFSI based on the divider value in CCUCO...
Definition: IfxScuCcu.c:253
IfxScuCcu_Fsource_2
fSource2
Definition: IfxScuCcu.h:304
IfxScuWdt_getSafetyWatchdogPassword
uint16 IfxScuWdt_getSafetyWatchdogPassword(void)
SCUWDT API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.c:393
IfxScuCcu_setMcanhFrequency
float32 IfxScuCcu_setMcanhFrequency(float32 mcanhFreq)
API to set MCANH frequency (with MCANH divider) This API configure mcanh divider values in CCUCON reg...
Definition: IfxScuCcu.c:1072
IfxScuCcu_getOsc0Frequency
IFX_INLINE float32 IfxScuCcu_getOsc0Frequency(void)
API to get Oscillator 0 frequency. This API returns the fOsc0 frequency based on the divider value in...
Definition: IfxScuCcu.h:1635
IfxScuCcu_getMscFrequency
float32 IfxScuCcu_getMscFrequency(void)
API to get MSC divider frequency. This API returns the based on the divider value in CCUCON register ...
Definition: IfxScuCcu.c:331
IfxCpu_ResourceCpu_0
CPU 0.
Definition: IfxCpu_cfg.h:159
__maxu
uint32 __maxu(uint32, uint32) __attribute__((intrinsic_pseudo(3
IfxScuCcu.h
SCU basic functionality.
IfxScuCcu_throttleSysPllClockInline
IFX_INLINE boolean IfxScuCcu_throttleSysPllClockInline(const IfxScuCcu_PllThrottleConfig *pllThrottleConfig)
Definition: IfxScuCcu.h:1713
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxScuCcu_getI2cFrequency
IFX_INLINE float32 IfxScuCcu_getI2cFrequency(void)
API to get I2C frequency. This API returns the based on the divider value in CCUCON register and fSOU...
Definition: IfxScuCcu.h:1623
IfxScuCcu_setSriFrequency
float32 IfxScuCcu_setSriFrequency(float32 sriFreq)
API to set SRI frequency (with SRI divider) This API configure Sri divider values in CCUCON registers...
Definition: IfxScuCcu.c:1272
IfxScuCcu_Mod_Config
modulation config
Definition: IfxScuCcu.h:647
IfxScuCcu_defaultPllConfigSteps
IFX_STATIC IFX_CONST IfxScuCcu_PllStepConfig IfxScuCcu_defaultPllConfigSteps[]
This is a structure array and the values are defined at the Scu implementation as a macro...
Definition: IfxScuCcu.c:59
IfxScuCcu_getBbbFrequency
float32 IfxScuCcu_getBbbFrequency(void)
API to get BBB divider frequency. This API returns the BBBDivider frequency based on the divider valu...
Definition: IfxScuCcu.c:153
IfxScuCcu_modulation_init
void IfxScuCcu_modulation_init(const IfxScuCcu_Mod_Config *Mod_Cfg)
initialize modulation parameters
Definition: IfxScuCcu.c:600
IFX_CFG_SCU_XTAL_FREQUENCY
#define IFX_CFG_SCU_XTAL_FREQUENCY
Default External oscillator frequency.
Definition: IfxScu_cfg.h:59
IFXSCUCCU_GET_MODCFG
#define IFXSCUCCU_GET_MODCFG(RGain_Hex)
Get MODCFG from RGAIN_HEX.
Definition: IfxScuCcu.h:271
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxScuCcu_RGain_Values
structure holding the RGain parameters for modulation
Definition: IfxScuCcu.h:670
IfxScuCcu_defaultModConfig
IFX_CONST IfxScuCcu_Mod_Config IfxScuCcu_defaultModConfig
Definition: IfxScuCcu.c:89
IfxScuCcu_getQspiFrequency
float32 IfxScuCcu_getQspiFrequency(void)
API to get Qspi divider frequency. This API returns the based on the divider value in CCUCON register...
Definition: IfxScuCcu.c:406
IfxScuCcu_switchToBackupClock
void IfxScuCcu_switchToBackupClock(const IfxScuCcu_Config *cfg)
API to switch to Backup clock from the current PLL frequency.
Definition: IfxScuCcu.c:1354
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxScuCcu_ModEn_disabled
disable modulation
Definition: IfxScuCcu.h:533
IfxScuCcu_getSriFrequency
float32 IfxScuCcu_getSriFrequency(void)
API to get SRI divider frequency. This API returns the Sri frequency based on the divider values in C...
Definition: IfxScuCcu.c:522
IfxScuCcu_Config::pllInitialStepConfig
IfxScuCcu_InitialStepConfig pllInitialStepConfig
Configuration of first step which is same as internal osc frequency.
Definition: IfxScuCcu.h:659
IfxScuCcu_PllStepConfig
Configuration structure type for the Pll Steps for current jump control.
Definition: IfxScuCcu.h:581
IfxCpu_ResourceCpu_1
CPU 1.
Definition: IfxCpu_cfg.h:160
IfxScuCcu_Mod_Config::Mod_Enable
IfxScuCcu_ModEn Mod_Enable
modulation enable
Definition: IfxScuCcu.h:649
IfxScuCcu_getGethFrequency
IFX_INLINE float32 IfxScuCcu_getGethFrequency(void)
API to get GETH divider frequency. This API returns the based on the divider value in CCUCON register...
Definition: IfxScuCcu.h:1591


iLLD_TC38A: IfxScuCcu.h Source File

  • Scu
  • Std
IfxScuCcu.h
Go to the documentation of this file.
1 /**
2 * \file IfxScuCcu.h
3 * \brief SCU basic functionality
4 * \ingroup IfxLld_Scu
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 * \defgroup IfxLld_Scu SCU
43 * \addtogroup IfxLld_Scu
44 * \{
45 * \defgroup IfxLld_ScuCcu How to use the Scu Clock driver?
46 * \addtogroup IfxLld_ScuCcu
47 * \{
48 *
49 * The Scu Clock control unit driver provides a default configuration for pll and Clock initialisation and set of peripheral clock configuration functions.
50 *
51 * In the following sections it will be described, how to integrate the driver into the application framework.
52 *
53 * \section IfxLld_ScuCcu_Std_Preparation Preparation
54 * \subsection IfxLld_ScuCcu_Std_Include Include Files
55 *
56 * Include following header file into your C code:
57 * \code
58 * #include <Scu/Std/IfxScuCcu.h>
59 * \endcode
60 *
61 * \subsection IfxLld_ScuCcu_Std_Variables Variables
62 *
63 * Declare the Clock Configuration variables in your C code:
64 *
65 * \code
66 * // used globally
67 *
68 * // configuration for the PLL steps
69 * static IfxScuCcu_PllStepsConfig IfxScuCcu_testPllConfigSteps[] = {
70 * IFXSCU_CFG_PLL_STEPS
71 * };
72 *
73 * static const IfxScuCcu_FlashWaitstateConfig IfxScuCcu_defaultFlashWaitstateConfig = IFXSCU_CFG_FLASH_WAITSTATE;
74 * // Default configuration for the Clock Configuration
75 * IfxScuCcu_Config IfxScuCcu_testClockConfig = {
76 * // IfxScuCcu_InitialStepConfig: Configuration of first step which is same as internal osc frequency.
77 * IFXSCU_CFG_PLL_INITIAL_STEP,
78 * //IfxScuCcu_PllThrottleConfig: Configuration of PLL throttling.
79 * {
80 * sizeof(IfxScuCcu_defaultPllConfigSteps) / sizeof(IfxScuCcu_PllStepConfig),
81 * IfxScuCcu_defaultPllConfigSteps
82 * },
83 * IFXSCU_CFG_CLK_DISTRIBUTION,
84 * &IfxScuCcu_defaultFlashWaitstateConfig,
85 * &IfxScuCcu_defaultModConfig
86 * };
87 *
88 * \endcode
89 *
90 * \subsection IfxLld_ScuCcu_Std_Init Module Initialisation
91 *
92 * The module initialisation can be done in the same function. Here an example:
93 * \code
94 *
95 * // standard PLL & clock initialisation
96 * IfxScuCcu_init(&IfxScuCcu_testClockConfig);
97 * \endcode
98 *
99 * The SYS PLL, PER PLL1 , PLL2 and clocks are now initialised based on the XTAL and PLL values configured in Ifx_Cfg.h and are ready for use now!
100 *
101 * Alternately the PLL and clocks can be initialised using below method which provides greater control on the configuration.
102 *
103 * \code
104 * static const IfxScuCcu_PllStepConfig IfxScuCcu_defaultPllConfigSteps[] = {
105 * { //Step 0 Config: 150MHz
106 * (4 - 1), //uint8 k2Step;
107 * 0.000100, //float32 waitTime;
108 * },
109 * { //Step 1 Config: 200MHz
110 * (3 - 1), //uint8 k2Step;
111 * 0.000100, //float32 waitTime;
112 * },
113 * { //Step 2 Config: 300MHz
114 * (2 - 1), //uint8 k2Step;
115 * 0.000100, //float32 waitTime;
116 * }
117 * };
118 * IfxScuCcu_Config IfxScuCcu_sampleClockConfig;
119 *
120 * IfxScuCcu_initConfig(&IfxScuCcu_sampleClockConfig);
121 *
122 *
123 *
124 * IfxScuCcu_sampleClockConfig.pllInitialStepConfig.pllsParameters.pllInputClockSelection = IfxScuCcu_PllInputClockSelection_fOsc0;
125 *
126 * //SYS PLL = 300Mhz, XTAL = 20Mhz
127 * IfxScuCcu_sampleClockConfig.pllInitialStepConfig.pllsParameters.sysPllConfig.k2Divider = IfxScuCcu_K2divider_2;
128 * IfxScuCcu_sampleClockConfig.pllInitialStepConfig.pllsParameters.sysPllConfig.nDivider = IfxScuCcu_Ndivider_60;
129 * IfxScuCcu_sampleClockConfig.pllInitialStepConfig.pllsParameters.sysPllConfig.pDivider = IfxScuCcu_Pdivider_2;
130 * IfxScuCcu_sampleClockConfig.pllInitialStepConfig.waitTime = 0.000200F; // wait time
131 *
132 * IfxScuCcu_sampleClockConfig.sysPllThrottleConfig.numOfSteps = sizeof(IfxScuCcu_defaultPllConfigSteps) / sizeof(IfxScuCcu_PllStepConfig); // step clock incr
133 * IfxScuCcu_sampleClockConfig.sysPllThrottleConfig.pllSteps = IfxScuCcu_defaultPllConfigSteps;
134 *
135 * // PER PLL1 = 240Mhz, PERPLL2 = 50Mhz
136 * IfxScuCcu_sampleClockConfig.pllInitialStepConfig.pllsParameters.perPllConfig.k2Divider = IfxScuCcu_K2divider_2;
137 * IfxScuCcu_sampleClockConfig.pllInitialStepConfig.pllsParameters.perPllConfig.k3Divider = IfxScuCcu_K3divider_6;
138 * IfxScuCcu_sampleClockConfig.pllInitialStepConfig.pllsParameters.perPllConfig.k3DividerBypass = 0;
139 * IfxScuCcu_sampleClockConfig.pllInitialStepConfig.pllsParameters.perPllConfig.nDivider = IfxScuCcu_Ndivider_24;
140 * IfxScuCcu_sampleClockConfig.pllInitialStepConfig.pllsParameters.perPllConfig.pDivider = IfxScuCcu_Pdivider_1;
141 *
142 * // update CCUCON Config use mask and value as below
143 * IfxScuCcu_sampleClockConfig.clockDistribution.ccucon0.mask =IFXSCU_CFG_CCUCON0_MASK;
144 * IfxScuCcu_sampleClockConfig.clockDistribution.ccucon0.value = IFXSCU_CFG_CCUCON0;
145 *
146 * // standard PLL & clock initialisation
147 * IfxScuCcu_init(&IfxScuCcu_sampleClockConfig);
148 *
149 * \endcode
150 *
151 * ** Modulation Configuration **
152 * The SCU CCU module also provides an option to Frequency Modulate the clock.
153 * The Modulation configuration can be done as follows:
154 *
155 * \code
156 *
157 * //define your modulation configuration structure:
158 *
159 * IFX_CONST IfxScuCcu_Mod_Config IfxScuCcu_SampleModConfig = {
160 * IfxScuCcu_ModEn_disabled, // disable is default //enable / disable modulation
161 * IfxScuCcu_ModulationAmplitude_0p5, // default 0 value // specify the modulation amplitude %
162 *
163 * }
164 * // put this as part of the CCU configuration:
165 * IfxScuCcu_sampleClockConfig.modulationConfig = &IfxScuCcu_SampleModConfig;
166 *
167 * // now initalize the CCU PLL and clock with the init function
168 * IfxScuCcu_init(&IfxScuCcu_sampleClockConfig)
169 * \endcode
170 *
171 * \}
172 * \}
173 *
174 * \defgroup IfxLld_Scu_Std_Ccu Ccu Basic Functionality
175 * \ingroup IfxLld_Scu_Std
176 * \defgroup IfxLld_Scu_Std_Ccu_Ccu Clock Control Functions
177 * \ingroup IfxLld_Scu_Std_Ccu
178 * \defgroup IfxLld_Scu_Std_Ccu_Ccu_Operative Clock Control Operative Functions
179 * \ingroup IfxLld_Scu_Std_Ccu
180 * \defgroup IfxLld_Scu_Std_Ccu_Ccu_Configuration Clock Control Configuration Functions
181 * \ingroup IfxLld_Scu_Std_Ccu
182 * \defgroup IfxLld_Scu_Std_Ccu_Enum Enumerations
183 * \ingroup IfxLld_Scu_Std_Ccu
184 */
185
186 #ifndef IFXSCUCCU_H
187 #define IFXSCUCCU_H 1
188
189 /******************************************************************************/
190 /*----------------------------------Includes----------------------------------*/
191 /******************************************************************************/
192
193 #include "_Impl/IfxScu_cfg.h"
194 #include "Scu/Std/IfxScuWdt.h"
195 #include "Cpu/Std/IfxCpu.h"
196 #include "IfxStm_reg.h"
197 #include "IfxScu_reg.h"
198 #include "_PinMap/IfxScu_PinMap.h"
199 #include "IfxSmu_reg.h"
200
201 /******************************************************************************/
202 /*-----------------------------------Macros-----------------------------------*/
203 /******************************************************************************/
204
205 /** \brief Oscillator stability check timeout count
206 */
207 #ifndef IFXSCUCCU_OSC_STABLECHK_TIME
208 #define IFXSCUCCU_OSC_STABLECHK_TIME (640)
209 #endif
210
211 /** \brief
212 */
213 #define IFXSCUCCU_SMUALARM_MASK (0x1DU)
214
215 /** \brief ~40uS max wait time
216 */
217 #ifndef IFXSCUCCU_CCUCON_LCK_BIT_TIMEOUT_COUNT
218 #define IFXSCUCCU_CCUCON_LCK_BIT_TIMEOUT_COUNT (0x1000U)
219 #endif
220
221 /** \brief ~122uS max wait time for PLL locking
222 */
223 #define IFXSCUCCU_PLL_LOCK_TIMEOUT_COUNT (0x3000U)
224
225 /** \brief ~122uS max wait time for PLL power down/up state update
226 */
227 #define IFXSCUCCU_SYSPLLSTAT_PWDSTAT_TIMEOUT_COUNT (0x3000U)
228
229 /** \brief ~244uS max wait time
230 */
231 #define IFXSCUCCU_PLL_KRDY_TIMEOUT_COUNT (0x6000U)
232
233 /** \brief 3mS max wait time for PLL power down/up state update
234 */
235 #define IFXSCUCCU_OSCCON_PLLLV_OR_HV_TIMEOUT_COUNT (0x493E0U)
236
237 #define IFXSCUCCU_LOOP_TIMEOUT_CHECK(tVar, tErr) \
238 { \
239 if (((sint32)--tVar) <= 0) \
240 { \
241 tErr = (uint8)1; \
242 break; \
243 } \
244 else \
245 { \
246 } \
247 }
248
249 /** \brief Modulation frequency
250 */
251 #define IFXSCUCCU_MODULATION_FREQ_HZ (3600000)
252
253 /** \brief MODCFG shift value for SYSPLLCON2
254 */
255 #define IFXSCUCCU_MODCFG_DEFAULT_SHIFT (10)
256
257 /** \brief MODCFG default value - for SYSPLLCON2[15:10]
258 */
259 #define IFXSCUCCU_MODCFG_DEFAULT_VAL ((uint32)0x3D)
260
261 /** \brief get Rgain from MA and FDco
262 */
263 #define IFXSCUCCU_GET_RGAIN_NOM(MA, FDco) ((2 * (MA / 100) * (FDco / IFXSCUCCU_MODULATION_FREQ_HZ)))
264
265 /** \brief Get RGAin HEX from RGain Nominal value
266 */
267 #define IFXSCUCCU_GET_RGAIN_HEX(RGain_Nom) ((uint16)((RGain_Nom * 32) + 0.5))
268
269 /** \brief Get MODCFG from RGAIN_HEX
270 */
271 #define IFXSCUCCU_GET_MODCFG(RGain_Hex) ((uint16)(IFXSCUCCU_MODCFG_DEFAULT_VAL << IFXSCUCCU_MODCFG_DEFAULT_SHIFT) | (uint16)(RGain_Hex))
272
273 /** \brief Define to include the flash wait state check in ScuCcu_init()
274 */
275 #define IFXSCUCCU_FLASHWAITSTATECHECK (0)
276
277 /** \brief 10 microsecond wait time between steps to jump back to normal mode.
278 */
279 #ifndef IFXSCUCCU_LPTONORMAL_WAITTIME
280 #define IFXSCUCCU_LPTONORMAL_WAITTIME (0.00001f)
281 #endif
282
283 /******************************************************************************/
284 /*------------------------------Type Definitions------------------------------*/
285 /******************************************************************************/
286
287 /** \brief Function pointer type for the hooks
288 * \return None
289 */
290 typedef void (*IfxScuCcu_PllStepsFunctionHook)(void);
291
292 /******************************************************************************/
293 /*--------------------------------Enumerations--------------------------------*/
294 /******************************************************************************/
295
296 /** \addtogroup IfxLld_Scu_Std_Ccu_Enum
297 * \{ */
298 /** \brief clock source selection
299 */
300 typedef enum
301 {
302 IfxScuCcu_Fsource_0 = 0, /**< \brief fSource0 */
303 IfxScuCcu_Fsource_1, /**< \brief fSource1 */
304 IfxScuCcu_Fsource_2 /**< \brief fSource2 */
305 } IfxScuCcu_Fsource;
306
307 /** \brief MODULE_SCU.PLLCON1.B.K2DIV, specifies the K2-Divider
308 */
309 typedef enum
310 {
311 IfxScuCcu_K2divider_1 = 0, /**< \brief K2-Divider 1 */
312 IfxScuCcu_K2divider_2, /**< \brief K2-Divider 2 */
313 IfxScuCcu_K2divider_3, /**< \brief K2-Divider 3 */
314 IfxScuCcu_K2divider_4, /**< \brief K2-Divider 4 */
315 IfxScuCcu_K2divider_5, /**< \brief K2-Divider 5 */
316 IfxScuCcu_K2divider_6, /**< \brief K2-Divider 6 */
317 IfxScuCcu_K2divider_7, /**< \brief K2-Divider 7 */
318 IfxScuCcu_K2divider_8 /**< \brief K2-Divider 8 */
319 } IfxScuCcu_K2divider;
320
321 /** \brief MODULE_SCU.PLLCON1.B.K3DIV, specifies the K3-Divider
322 */
323 typedef enum
324 {
325 IfxScuCcu_K3divider_1 = 0, /**< \brief K3-Divider 1 */
326 IfxScuCcu_K3divider_2, /**< \brief K3-Divider 2 */
327 IfxScuCcu_K3divider_3, /**< \brief K3-Divider 3 */
328 IfxScuCcu_K3divider_4, /**< \brief K3-Divider 4 */
329 IfxScuCcu_K3divider_5, /**< \brief K3-Divider 5 */
330 IfxScuCcu_K3divider_6, /**< \brief K3-Divider 6 */
331 IfxScuCcu_K3divider_7, /**< \brief K3-Divider 7 */
332 IfxScuCcu_K3divider_8 /**< \brief K3-Divider 8 */
333 } IfxScuCcu_K3divider;
334
335 /** \brief Low Power Division Ratios.
336 * Corresponds to values of LPDIV in CCUCON0.
337 */
338 typedef enum
339 {
340 IfxScuCcu_LowPowerDivRatio_divBy30 = 1, /**< \brief Divide by 30 */
341 IfxScuCcu_LowPowerDivRatio_divBy60, /**< \brief Divide by 60 */
342 IfxScuCcu_LowPowerDivRatio_divBy120, /**< \brief Divide by 120 */
343 IfxScuCcu_LowPowerDivRatio_divBy240 /**< \brief Divide by 240 */
344 } IfxScuCcu_LowPowerDivRatio;
345
346 /** \brief ENUM for MA (%) values
347 */
348 typedef enum
349 {
350 IfxScuCcu_ModulationAmplitude_0p5 = 0, /**< \brief 0.5% */
351 IfxScuCcu_ModulationAmplitude_1p0, /**< \brief 1.0% */
352 IfxScuCcu_ModulationAmplitude_1p25, /**< \brief 1.25% */
353 IfxScuCcu_ModulationAmplitude_1p5, /**< \brief 1.5% */
354 IfxScuCcu_ModulationAmplitude_2p0, /**< \brief 2% */
355 IfxScuCcu_ModulationAmplitude_2p5, /**< \brief 2.5% */
356 IfxScuCcu_ModulationAmplitude_count, /**< \brief range */
357 } IfxScuCcu_ModulationAmplitude;
358
359 /** \brief MODULE_SCU.PLLCON0.B.NDIV, specifies the N-Divider
360 */
361 typedef enum
362 {
363 IfxScuCcu_Ndivider_1 = 0, /**< \brief N-divider 1 */
364 IfxScuCcu_Ndivider_2, /**< \brief N-divider 2 */
365 IfxScuCcu_Ndivider_3, /**< \brief N-divider 3 */
366 IfxScuCcu_Ndivider_4, /**< \brief N-divider 4 */
367 IfxScuCcu_Ndivider_5, /**< \brief N-divider 5 */
368 IfxScuCcu_Ndivider_6, /**< \brief N-divider 6 */
369 IfxScuCcu_Ndivider_7, /**< \brief N-divider 7 */
370 IfxScuCcu_Ndivider_8, /**< \brief N-divider 8 */
371 IfxScuCcu_Ndivider_9, /**< \brief N-divider 9 */
372 IfxScuCcu_Ndivider_10, /**< \brief N-divider 10 */
373 IfxScuCcu_Ndivider_11, /**< \brief N-divider 11 */
374 IfxScuCcu_Ndivider_12, /**< \brief N-divider 12 */
375 IfxScuCcu_Ndivider_13, /**< \brief N-divider 13 */
376 IfxScuCcu_Ndivider_14, /**< \brief N-divider 14 */
377 IfxScuCcu_Ndivider_15, /**< \brief N-divider 15 */
378 IfxScuCcu_Ndivider_16, /**< \brief N-divider 16 */
379 IfxScuCcu_Ndivider_17, /**< \brief N-divider 17 */
380 IfxScuCcu_Ndivider_18, /**< \brief N-divider 18 */
381 IfxScuCcu_Ndivider_19, /**< \brief N-divider 19 */
382 IfxScuCcu_Ndivider_20, /**< \brief N-divider 20 */
383 IfxScuCcu_Ndivider_21, /**< \brief N-divider 21 */
384 IfxScuCcu_Ndivider_22, /**< \brief N-divider 22 */
385 IfxScuCcu_Ndivider_23, /**< \brief N-divider 23 */
386 IfxScuCcu_Ndivider_24, /**< \brief N-divider 24 */
387 IfxScuCcu_Ndivider_25, /**< \brief N-divider 25 */
388 IfxScuCcu_Ndivider_26, /**< \brief N-divider 26 */
389 IfxScuCcu_Ndivider_27, /**< \brief N-divider 27 */
390 IfxScuCcu_Ndivider_28, /**< \brief N-divider 28 */
391 IfxScuCcu_Ndivider_29, /**< \brief N-divider 29 */
392 IfxScuCcu_Ndivider_30, /**< \brief N-divider 30 */
393 IfxScuCcu_Ndivider_31, /**< \brief N-divider 31 */
394 IfxScuCcu_Ndivider_32, /**< \brief N-divider 32 */
395 IfxScuCcu_Ndivider_33, /**< \brief N-divider 33 */
396 IfxScuCcu_Ndivider_34, /**< \brief N-divider 34 */
397 IfxScuCcu_Ndivider_35, /**< \brief N-divider 35 */
398 IfxScuCcu_Ndivider_36, /**< \brief N-divider 36 */
399 IfxScuCcu_Ndivider_37, /**< \brief N-divider 37 */
400 IfxScuCcu_Ndivider_38, /**< \brief N-divider 38 */
401 IfxScuCcu_Ndivider_39, /**< \brief N-divider 39 */
402 IfxScuCcu_Ndivider_40, /**< \brief N-divider 40 */
403 IfxScuCcu_Ndivider_41, /**< \brief N-divider 41 */
404 IfxScuCcu_Ndivider_42, /**< \brief N-divider 42 */
405 IfxScuCcu_Ndivider_43, /**< \brief N-divider 43 */
406 IfxScuCcu_Ndivider_44, /**< \brief N-divider 44 */
407 IfxScuCcu_Ndivider_45, /**< \brief N-divider 45 */
408 IfxScuCcu_Ndivider_46, /**< \brief N-divider 46 */
409 IfxScuCcu_Ndivider_47, /**< \brief N-divider 47 */
410 IfxScuCcu_Ndivider_48, /**< \brief N-divider 48 */
411 IfxScuCcu_Ndivider_49, /**< \brief N-divider 49 */
412 IfxScuCcu_Ndivider_50, /**< \brief N-divider 50 */
413 IfxScuCcu_Ndivider_51, /**< \brief N-divider 51 */
414 IfxScuCcu_Ndivider_52, /**< \brief N-divider 52 */
415 IfxScuCcu_Ndivider_53, /**< \brief N-divider 53 */
416 IfxScuCcu_Ndivider_54, /**< \brief N-divider 54 */
417 IfxScuCcu_Ndivider_55, /**< \brief N-divider 55 */
418 IfxScuCcu_Ndivider_56, /**< \brief N-divider 56 */
419 IfxScuCcu_Ndivider_57, /**< \brief N-divider 57 */
420 IfxScuCcu_Ndivider_58, /**< \brief N-divider 58 */
421 IfxScuCcu_Ndivider_59, /**< \brief N-divider 59 */
422 IfxScuCcu_Ndivider_60, /**< \brief N-divider 60 */
423 IfxScuCcu_Ndivider_61, /**< \brief N-divider 61 */
424 IfxScuCcu_Ndivider_62, /**< \brief N-divider 62 */
425 IfxScuCcu_Ndivider_63, /**< \brief N-divider 63 */
426 IfxScuCcu_Ndivider_64, /**< \brief N-divider 64 */
427 IfxScuCcu_Ndivider_65, /**< \brief N-divider 65 */
428 IfxScuCcu_Ndivider_66, /**< \brief N-divider 66 */
429 IfxScuCcu_Ndivider_67, /**< \brief N-divider 67 */
430 IfxScuCcu_Ndivider_68, /**< \brief N-divider 68 */
431 IfxScuCcu_Ndivider_69, /**< \brief N-divider 69 */
432 IfxScuCcu_Ndivider_70, /**< \brief N-divider 70 */
433 IfxScuCcu_Ndivider_71, /**< \brief N-divider 71 */
434 IfxScuCcu_Ndivider_72, /**< \brief N-divider 72 */
435 IfxScuCcu_Ndivider_73, /**< \brief N-divider 73 */
436 IfxScuCcu_Ndivider_74, /**< \brief N-divider 74 */
437 IfxScuCcu_Ndivider_75, /**< \brief N-divider 75 */
438 IfxScuCcu_Ndivider_76, /**< \brief N-divider 76 */
439 IfxScuCcu_Ndivider_77, /**< \brief N-divider 77 */
440 IfxScuCcu_Ndivider_78, /**< \brief N-divider 78 */
441 IfxScuCcu_Ndivider_79, /**< \brief N-divider 79 */
442 IfxScuCcu_Ndivider_80, /**< \brief N-divider 80 */
443 IfxScuCcu_Ndivider_81, /**< \brief N-divider 81 */
444 IfxScuCcu_Ndivider_82, /**< \brief N-divider 82 */
445 IfxScuCcu_Ndivider_83, /**< \brief N-divider 83 */
446 IfxScuCcu_Ndivider_84, /**< \brief N-divider 84 */
447 IfxScuCcu_Ndivider_85, /**< \brief N-divider 85 */
448 IfxScuCcu_Ndivider_86, /**< \brief N-divider 86 */
449 IfxScuCcu_Ndivider_87, /**< \brief N-divider 87 */
450 IfxScuCcu_Ndivider_88, /**< \brief N-divider 88 */
451 IfxScuCcu_Ndivider_89, /**< \brief N-divider 89 */
452 IfxScuCcu_Ndivider_90, /**< \brief N-divider 90 */
453 IfxScuCcu_Ndivider_91, /**< \brief N-divider 91 */
454 IfxScuCcu_Ndivider_92, /**< \brief N-divider 92 */
455 IfxScuCcu_Ndivider_93, /**< \brief N-divider 93 */
456 IfxScuCcu_Ndivider_94, /**< \brief N-divider 94 */
457 IfxScuCcu_Ndivider_95, /**< \brief N-divider 95 */
458 IfxScuCcu_Ndivider_96, /**< \brief N-divider 96 */
459 IfxScuCcu_Ndivider_97, /**< \brief N-divider 97 */
460 IfxScuCcu_Ndivider_98, /**< \brief N-divider 98 */
461 IfxScuCcu_Ndivider_99, /**< \brief N-divider 99 */
462 IfxScuCcu_Ndivider_100, /**< \brief N-divider 100 */
463 IfxScuCcu_Ndivider_101, /**< \brief N-divider 101 */
464 IfxScuCcu_Ndivider_102, /**< \brief N-divider 102 */
465 IfxScuCcu_Ndivider_103, /**< \brief N-divider 103 */
466 IfxScuCcu_Ndivider_104, /**< \brief N-divider 104 */
467 IfxScuCcu_Ndivider_105, /**< \brief N-divider 105 */
468 IfxScuCcu_Ndivider_106, /**< \brief N-divider 106 */
469 IfxScuCcu_Ndivider_107, /**< \brief N-divider 107 */
470 IfxScuCcu_Ndivider_108, /**< \brief N-divider 108 */
471 IfxScuCcu_Ndivider_109, /**< \brief N-divider 109 */
472 IfxScuCcu_Ndivider_110, /**< \brief N-divider 110 */
473 IfxScuCcu_Ndivider_111, /**< \brief N-divider 111 */
474 IfxScuCcu_Ndivider_112, /**< \brief N-divider 112 */
475 IfxScuCcu_Ndivider_113, /**< \brief N-divider 113 */
476 IfxScuCcu_Ndivider_114, /**< \brief N-divider 114 */
477 IfxScuCcu_Ndivider_115, /**< \brief N-divider 115 */
478 IfxScuCcu_Ndivider_116, /**< \brief N-divider 116 */
479 IfxScuCcu_Ndivider_117, /**< \brief N-divider 117 */
480 IfxScuCcu_Ndivider_118, /**< \brief N-divider 118 */
481 IfxScuCcu_Ndivider_119, /**< \brief N-divider 119 */
482 IfxScuCcu_Ndivider_120, /**< \brief N-divider 120 */
483 IfxScuCcu_Ndivider_121, /**< \brief N-divider 121 */
484 IfxScuCcu_Ndivider_122, /**< \brief N-divider 122 */
485 IfxScuCcu_Ndivider_123, /**< \brief N-divider 123 */
486 IfxScuCcu_Ndivider_124, /**< \brief N-divider 124 */
487 IfxScuCcu_Ndivider_125, /**< \brief N-divider 125 */
488 IfxScuCcu_Ndivider_126, /**< \brief N-divider 126 */
489 IfxScuCcu_Ndivider_127, /**< \brief N-divider 127 */
490 IfxScuCcu_Ndivider_128 /**< \brief N-divider 128 */
491 } IfxScuCcu_Ndivider;
492
493 /** \brief MODULE_SCU.PLLCON0.B.PDIV, specifies the P-Divider
494 */
495 typedef enum
496 {
497 IfxScuCcu_Pdivider_1 = 0, /**< \brief P-divider 1 */
498 IfxScuCcu_Pdivider_2, /**< \brief P-divider 2 */
499 IfxScuCcu_Pdivider_3, /**< \brief P-divider 3 */
500 IfxScuCcu_Pdivider_4, /**< \brief P-divider 4 */
501 IfxScuCcu_Pdivider_5, /**< \brief P-divider 5 */
502 IfxScuCcu_Pdivider_6, /**< \brief P-divider 6 */
503 IfxScuCcu_Pdivider_7, /**< \brief P-divider 7 */
504 IfxScuCcu_Pdivider_8 /**< \brief P-divider 8 */
505 } IfxScuCcu_Pdivider;
506
507 /** \brief SysPll & Per Pll input clock selection.
508 * SYSPLLCON0.B.INSEL
509 */
510 typedef enum
511 {
512 IfxScuCcu_PllInputClockSelection_fOsc1 = 0, /**< \brief Backup clock select */
513 IfxScuCcu_PllInputClockSelection_fOsc0 = 1, /**< \brief fOsc0 or XTAL clock select */
514 IfxScuCcu_PllInputClockSelection_fSysclk = 2 /**< \brief fOsc1 */
515 } IfxScuCcu_PllInputClockSelection;
516
517 /** \brief trap request type
518 */
519 typedef enum
520 {
521 IfxScuCcu_Traprequest_esr0 = 0, /**< \brief external service request 0 */
522 IfxScuCcu_Traprequest_esr1, /**< \brief external service request 1 */
523 IfxScuCcu_Traprequest_trap2, /**< \brief trap2 */
524 IfxScuCcu_Traprequest_smu /**< \brief safety management unit */
525 } IfxScuCcu_Traprequest;
526
527 /** \} */
528
529 /** \brief modulation enable
530 */
531 typedef enum
532 {
533 IfxScuCcu_ModEn_disabled = 0, /**< \brief disable modulation */
534 IfxScuCcu_ModEn_enabled = 1 /**< \brief enable modulation */
535 } IfxScuCcu_ModEn;
536
537 /******************************************************************************/
538 /*-----------------------------Data Structures--------------------------------*/
539 /******************************************************************************/
540
541 /** \addtogroup IfxLld_Scu_Std_Ccu_Ccu_Configuration
542 * \{ */
543 /** \brief Configuration structure type for the Per Pll step.
544 * This structure must be used to configure the P, N and K2, K3 dividers .
545 */
546 typedef struct
547 {
548 uint8 pDivider; /**< \brief P divider value for basic (initial) step */
549 uint8 nDivider; /**< \brief N divider value for basic (initial) step */
550 uint8 k2Divider; /**< \brief K2 divider value */
551 uint8 k3Divider; /**< \brief K3 divider value */
552 uint8 k3DividerBypass; /**< \brief Divider Bypass
553 * 0 - The divide by block in front of the K3-Divider is not bypassed.
554 * 1- The divide by block in front of the K3-Divider is bypassed. */
555 } IfxScuCcu_PerPllConfig;
556
557 /** \brief Configuration structure type for the Pll initial step.
558 * This structure must be used to configure the P, N and K2 dividers for initial step.
559 */
560 typedef struct
561 {
562 uint8 pDivider; /**< \brief P divider value */
563 uint8 nDivider; /**< \brief N divider value */
564 uint8 k2Divider; /**< \brief K2 divider value */
565 } IfxScuCcu_SysPllConfig;
566
567 /** \} */
568
569 /** \addtogroup IfxLld_Scu_Std_Ccu_Ccu_Configuration
570 * \{ */
571 /** \brief Configuration structure type for CCUCON registers.
572 */
573 typedef struct
574 {
575 uint32 value; /**< \brief CCUCON Register value to be updated. */
576 uint32 mask; /**< \brief CCUCON Mask to select the bit fields to be updated. */
577 } IfxScuCcu_CcuconRegConfig;
578
579 /** \brief Configuration structure type for the Pll Steps for current jump control.
580 */
581 typedef struct
582 {
583 uint8 k2Step; /**< \brief K2 divider value for this step. */
584 float32 waitTime; /**< \brief Wait time for for this step. */
585 } IfxScuCcu_PllStepConfig;
586
587 /** \brief Configuration structure type for the Pll Parameters.
588 */
589 typedef struct
590 {
591 uint32 xtalFrequency; /**< \brief Xtal frequency */
592 IfxScuCcu_PllInputClockSelection pllInputClockSelection; /**< \brief Pll input clock selection */
593 IfxScuCcu_SysPllConfig sysPllConfig; /**< \brief System PLL Configurations */
594 IfxScuCcu_PerPllConfig perPllConfig; /**< \brief Peripheral PLL Configurations */
595 } IfxScuCcu_pllsParameterConfig;
596
597 /** \} */
598
599 /** \addtogroup IfxLld_Scu_Std_Ccu_Ccu
600 * \{ */
601 /** \brief Configuration structure type for the Flash waitstate configuration.
602 */
603 typedef struct
604 {
605 uint32 value; /**< \brief FLASH.FCON Register value to be updated. */
606 uint32 mask; /**< \brief FLASH.FCON Mask to select the bit fields to be updated. */
607 } IfxScuCcu_FlashWaitstateConfig;
608
609 /** \} */
610
611 /** \addtogroup IfxLld_Scu_Std_Ccu_Ccu_Configuration
612 * \{ */
613 /** \brief Configuration structure type for all the CCUCON registers to configure clock distribution.
614 */
615 typedef struct
616 {
617 IfxScuCcu_CcuconRegConfig ccucon0; /**< \brief CCUCON0 Register configuration */
618 IfxScuCcu_CcuconRegConfig ccucon1; /**< \brief CCUCON1 Register configuration */
619 IfxScuCcu_CcuconRegConfig ccucon2; /**< \brief CCUCON2 Register configuration */
620 IfxScuCcu_CcuconRegConfig ccucon5; /**< \brief CCUCON5 Register configuration */
621 IfxScuCcu_CcuconRegConfig ccucon6; /**< \brief CCUCON6 Register configuration */
622 IfxScuCcu_CcuconRegConfig ccucon7; /**< \brief CCUCON7 Register configuration */
623 IfxScuCcu_CcuconRegConfig ccucon8; /**< \brief CCUCON8 Register configuration */
624 IfxScuCcu_CcuconRegConfig ccucon9; /**< \brief CCUCON9 Register configuration */
625 } IfxScuCcu_ClockDistributionConfig;
626
627 /** \brief Configuration structure type for the Pll Initial Step Configuration.
628 */
629 typedef struct
630 {
631 IfxScuCcu_pllsParameterConfig pllsParameters; /**< \brief Configuration Parameters for both PLLs */
632 float32 waitTime; /**< \brief Wait time for for basic (initial) step */
633 } IfxScuCcu_InitialStepConfig;
634
635 /** \brief
636 */
637 typedef struct
638 {
639 uint8 numOfSteps; /**< \brief Number of PLL divider steps during clock throttling */
640 IFX_CONST IfxScuCcu_PllStepConfig *pllSteps; /**< \brief Pointer to the array of Pll divider step configuration. */
641 } IfxScuCcu_PllThrottleConfig;
642
643 /** \} */
644
645 /** \brief modulation config
646 */
647 typedef struct
648 {
649 IfxScuCcu_ModEn Mod_Enable; /**< \brief modulation enable */
650 IfxScuCcu_ModulationAmplitude Mod_Amp; /**< \brief modulation amplitude */
651 } IfxScuCcu_Mod_Config;
652
653 /** \addtogroup IfxLld_Scu_Std_Ccu_Ccu_Configuration
654 * \{ */
655 /** \brief Configuration structure SCU module
656 */
657 typedef struct
658 {
659 IfxScuCcu_InitialStepConfig pllInitialStepConfig; /**< \brief Configuration of first step which is same as internal osc frequency. */
660 IfxScuCcu_PllThrottleConfig sysPllThrottleConfig; /**< \brief Configuration of PLL throttling. */
661 IfxScuCcu_ClockDistributionConfig clockDistribution; /**< \brief Configuration of of bus clocks and other module clock distribution. */
662 IFX_CONST IfxScuCcu_FlashWaitstateConfig *flashFconWaitStateConfig; /**< \brief Configuration of flash waitstate */
663 IFX_CONST IfxScuCcu_Mod_Config *modulationConfig; /**< \brief modulation configuration */
664 } IfxScuCcu_Config;
665
666 /** \} */
667
668 /** \brief structure holding the RGain parameters for modulation
669 */
670 typedef struct
671 {
672 float32 RGainNom; /**< \brief RGain Nominal value */
673 uint16 RGainHex; /**< \brief RGain Hex value */
674 } IfxScuCcu_RGain_Values;
675
676 /** \addtogroup IfxLld_Scu_Std_Ccu_Ccu
677 * \{ */
678
679 /******************************************************************************/
680 /*-------------------------Inline Function Prototypes-------------------------*/
681 /******************************************************************************/
682
683 /** \brief API to wait for requested duration.
684 * Note: IfxScuCcu_wait shall not use STM in future, because we can guarantee that STM is enabled after reset but If PLL init is called for changing the frequency during runtime, there is no guarantee that STM is enabled
685 * \return None
686 */
687 IFX_INLINE void IfxScuCcu_wait(float32 timeSec);
688
689 /** \brief API to wait for requested duration along with watchdog service to avoid any reset case during startup of the chip.
690 * Note: IfxScuCcu_wait shall not use STM in future, because we can guarantee that STM is enabled after reset but If PLL init is called for changing the frequency during runtime, there is no guarantee that STM is enabled
691 * \return None
692 */
693 IFX_INLINE void IfxScuCcu_waitWithWdtService(float32 timeSec);
694
695 /** \brief API to configure the LPDIV value to enter into Low Power mode.
696 *
697 * Caution:
698 * write to LPDIV with non-zero division ratio will cause system to enter low power mode.
699 * Low power mode will affect different SPBDIV and SRIDIV ratios.
700 *
701 * The original CCUCON0 ratios should be preserved by user prior to calling this function.
702 * The "normal" CCUCON0 ratios have to be passed to API: "IfxScuCcu_switchToNormalMode" to go back to the original division ratios.
703 * \param lpDiv Low Power Division Ratio
704 * \return None
705 */
706 IFX_INLINE void IfxScuCcu_switchToLowPowerMode(IfxScuCcu_LowPowerDivRatio lpDiv);
707
708 /** \brief API to switch back to normal mode from low power mode.
709 *
710 * Caution:
711 * The original CCUCON0 setting has to be saved by user prior to entering Low Power mode.
712 * Pass the original CCUCON0 register as a whole word to this function to restore the normal settings.
713 *
714 * Ramp back to normal mode is done in steps to avoid sudden jump in frequency and power usage.
715 * \param ccucon0 CCUCON0 values at normal mode
716 * \return None
717 *
718 * Switch to low power mode and back using iLLD functions as below
719 * \code
720 * uint32 ccucon0 = SCU_CCUCON0.U;
721 * IfxScuCcu_LowPowerDivRatio lpDiv = IfxScuCcu_LowPowerDivRatio_divBy30;
722 * IfxScuCcu_switchToLowPowerMode(lpDiv);
723 * \endcode
724 *
725 * Switch back to normal mode with the saved ccucon0 value
726 * \code
727 * IfxScuCcu_switchToNormalMode(ccucon0);
728 * \endcode
729 *
730 */
731 IFX_INLINE void IfxScuCcu_switchToNormalMode(const uint32 ccucon0);
732
733 /** \} */
734
735 /** \addtogroup IfxLld_Scu_Std_Ccu_Ccu_Operative
736 * \{ */
737
738 /******************************************************************************/
739 /*-------------------------Inline Function Prototypes-------------------------*/
740 /******************************************************************************/
741
742 /** \brief API to get Adc (EVADC, EDSADC) frequency.
743 * This API returns the based on the divider value in CCUCON register and fSOURCE.
744 * \return Adc frequency (fADC) in Hz
745 */
746 IFX_INLINE float32 IfxScuCcu_getAdcFrequency(void);
747
748 /** \brief API to get ASCLINF divider frequency.
749 * This API returns the based on the divider value in CCUCON register and fSOURCE.
750 * \return AsclinF frequency (fASCLINF) in Hz
751 */
752 IFX_INLINE float32 IfxScuCcu_getAsclinFFrequency(void);
753
754 /** \brief API to get EVR Oscillator frequency.
755 * This API returns the constant which is specific to the ScuCcu of the controller.
756 * \return EVR Oscillator frequency (fBACK or fEVR) in Hz.
757 */
758 IFX_INLINE float32 IfxScuCcu_getEvrFrequency(void);
759
760 /** \brief API to get GETH divider frequency.
761 * This API returns the based on the divider value in CCUCON register and fSOURCE.
762 * \return GETH frequency (fGETH) in Hz
763 */
764 IFX_INLINE float32 IfxScuCcu_getGethFrequency(void);
765
766 /** \brief API to get GTMdivider frequency
767 * This API returns the based on the divider value in CCUCON register and fSOURCE.
768 * return GTM frequency (fGTM) in Hz
769 * \return Gtm Frequency
770 */
771 IFX_INLINE float32 IfxScuCcu_getGtmFrequency(void);
772
773 /** \brief API to get I2C frequency.
774 * This API returns the based on the divider value in CCUCON register and fSOURCE.
775 * \return I2C frequency (fI2C) in Hz
776 */
777 IFX_INLINE float32 IfxScuCcu_getI2cFrequency(void);
778
779 /** \brief API to get MCANH divider frequency.
780 * This API returns the based on the divider value in CCUCON register and fSOURCE.
781 * \return MCANH frequency (fMCANH) in Hz
782 */
783 IFX_INLINE float32 IfxScuCcu_getMcanhFrequency(void);
784
785 /** \brief API to get Oscillator 0 frequency.
786 * This API returns the fOsc0 frequency based on the divider value in CCUCON register and the input oscillator.
787 * \return Osc0 frequency (fOSC0) in Hz.
788 */
789 IFX_INLINE float32 IfxScuCcu_getOsc0Frequency(void);
790
791 /** \brief API to get Oscillator 0 frequency.
792 * This API returns the fOsc0 frequency based on the divider value in CCUCON register and the input oscillator.
793 * \return Osc frequency (fOSC) in Hz.
794 */
795 IFX_INLINE float32 IfxScuCcu_getOscFrequency(void);
796
797 /** \brief Returns the clock source selection
798 * \return Clock source selection
799 */
800 IFX_INLINE IfxScuCcu_PllInputClockSelection IfxScuCcu_getSourceSelection(void);
801
802 /** \brief API to get STM divider frequency.
803 * This API returns the based on the divider value in CCUCON register and fSOURCE.
804 * \return STM frequency (fSTM) in Hz
805 */
806 IFX_INLINE float32 IfxScuCcu_getStmFrequency(void);
807
808 /******************************************************************************/
809 /*-------------------------Global Function Prototypes-------------------------*/
810 /******************************************************************************/
811
812 /** \brief API to get ASCLINS divider frequency.
813 * This API returns the ASCLINS frequency based on the divider value in CCUCON register and fSOURCE.
814 * \return AsclinS frequency (fASCLINS) in Hz
815 */
816 IFX_EXTERN float32 IfxScuCcu_getAsclinSFrequency(void);
817
818 /** \brief API to get BBB divider frequency.
819 * This API returns the BBBDivider frequency based on the divider value in CCUCON register and the input oscillator.
820 * \return BBB frequency (fBBB) in Hz
821 */
822 IFX_EXTERN float32 IfxScuCcu_getBbbFrequency(void);
823
824 /** \brief This API returns the Cpu frequency based on the divider value in CCUCON register and fSource frequency
825 * \param cpu CPU number for which effective fCPU is sought
826 * \return Cpu[x] frequency in Hz, where x is cpu number passed as parameter
827 */
828 IFX_EXTERN float32 IfxScuCcu_getCpuFrequency(const IfxCpu_ResourceCpu cpu);
829
830 /** \brief API to get FSI2 divider frequency in Hz.
831 * This API returns the fFSI2 frequency based on the divider value in CCUCON register and the input oscillator.
832 * \return FSI2 frequency (fFSI2) in Hz.
833 */
834 IFX_EXTERN float32 IfxScuCcu_getFsi2Frequency(void);
835
836 /** \brief API to get FSI divider frequency in Hz.
837 * This API returns the fFSI based on the divider value in CCUCON register and the input oscillator.
838 * \return FSI frequency (fFSI) in Hz.
839 */
840 IFX_EXTERN float32 IfxScuCcu_getFsiFrequency(void);
841
842 /** \brief API to get MCAN divider frequency.
843 * This API returns the based on the divider value in CCUCON register and fSOURCE.
844 * \return Mcan frequency (fMCAN) in Hz
845 */
846 IFX_EXTERN float32 IfxScuCcu_getMcanFrequency(void);
847
848 /** \brief get source frequency fSOURCE.
849 * This API returns the source frequency based on the configurations with CCUCON register configuration.
850 * \return Module frequency in Hz
851 */
852 IFX_EXTERN float32 IfxScuCcu_getModuleFrequency(void);
853
854 /** \brief API to get MSC divider frequency.
855 * This API returns the based on the divider value in CCUCON register and fSOURCE.
856 * \return Msc frequency (fMSC) in Hz
857 */
858 IFX_EXTERN float32 IfxScuCcu_getMscFrequency(void);
859
860 /** \brief API to get actual PER PLL1 frequency
861 * This API returns the PER PLL1 frequency based on the K2 divider value in PLLCON and the VCO frequency.
862 * Fpll1= (Fosc*N)/(P*K2)
863 * \return PER PLL1 (K2 Divider) frequency in Hz
864 */
865 IFX_EXTERN float32 IfxScuCcu_getPerPllFrequency1(void);
866
867 /** \brief API to get actual PER PLL2 (K3 Divider) frequency
868 * This API returns the PER PLL2 frequency based on the K3 divider value in PLLCON and the VCO frequency.
869 * Fpll2= (Fosc*N)/(P*K3*1.6) // DIVBY = 0,
870 * Fpll2= (Fosc*N)/(P*K3*2) // DIVBY = 1
871 * \return PER PLL2 (K3 Divider ) frequency in Hz
872 */
873 IFX_EXTERN float32 IfxScuCcu_getPerPllFrequency2(void);
874
875 /** \brief API to get actual Sys PLL output frequency.
876 * This API returns the based on the divider values in CCUCON, PLLCON registers and the input oscillator.
877 * \return System Pll (fSysPLL) frequency in Hz
878 */
879 IFX_EXTERN float32 IfxScuCcu_getPllFrequency(void);
880
881 /** \brief API to get Qspi divider frequency.
882 * This API returns the based on the divider value in CCUCON register and fSOURCE.
883 * \return Qspi frequency (fQspi) in Hz
884 */
885 IFX_EXTERN float32 IfxScuCcu_getQspiFrequency(void);
886
887 /** \brief get source frequency fSOURCE.
888 * This API returns the source frequency based on the configurations with CCUCON register configuration.
889 * \param fsource fsource selection
890 * \return Effective fSOURCE in Hz
891 */
892 IFX_EXTERN float32 IfxScuCcu_getSourceFrequency(IfxScuCcu_Fsource fsource);
893
894 /** \brief API to get SPB divider frequency.
895 * This API returns the based on fSOURCE and also on Low power divider mode and/or SPBDIV divider value in CCUCON registers.
896 * \return SPB frequency (fSPB) in Hz
897 */
898 IFX_EXTERN float32 IfxScuCcu_getSpbFrequency(void);
899
900 /** \brief API to get SRI divider frequency.
901 * This API returns the Sri frequency based on the divider values in CCUCON registers and fSOURCE.
902 * \return Sri frequency (fSRI) in Hz
903 */
904 IFX_EXTERN float32 IfxScuCcu_getSriFrequency(void);
905
906 /** \brief API to set ASCLINF frequency (with ASCLINF divider)
907 * This API configure ASCLINF divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value
908 * \param asclinFFreq AsclinF frequency (fASCLINF) in Hz
909 * \return Actual AsclinF frequency (fASCLINF) in Hz
910 */
911 IFX_EXTERN float32 IfxScuCcu_setAsclinFFrequency(float32 asclinFFreq);
912
913 /** \brief API to set ASCLINS frequency (with ASCLINS divider)
914 * This API configure ASCLINS divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value
915 * \param asclinSFreq Desired AscLinS frequency in Hz
916 * \return Actual AsclinS frequency (fASCLINS) in Hz
917 */
918 IFX_EXTERN float32 IfxScuCcu_setAsclinSFrequency(float32 asclinSFreq);
919
920 /** \brief API to set BBB frequency (with Bbb divider)
921 * This API configure Bbb divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value
922 * \param bbbFreq Bbb frequency (fBBB) in Hz
923 * \return Actual Bbb frequency (fBBB) in Hz
924 */
925 IFX_EXTERN float32 IfxScuCcu_setBbbFrequency(float32 bbbFreq);
926
927 /** \brief API to set CPU frequency (with CPU divider)
928 * This API configure CPU divider values in CCUCON registers. The actual frequency is always depends on the feasibility with the divider value
929 * \param cpu CPU number for which fCPU to be configured
930 * \param cpuFreq Desired CPU frequency in Hz
931 * \return Actual CPU[x] frequency in Hz, where x is the cpu number passed as parameter
932 */
933 IFX_EXTERN float32 IfxScuCcu_setCpuFrequency(IfxCpu_ResourceCpu cpu, float32 cpuFreq);
934
935 /** \brief API to set FSI2 frequency (with FSI2 divider)
936 * This API configure Fsi2 divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value
937 * \param fsi2Freq FSI2 frequency (fFSI) in Hz
938 * \return Actual Fsi2 frequency (fFSI2) in Hz
939 */
940 IFX_EXTERN float32 IfxScuCcu_setFsi2Frequency(float32 fsi2Freq);
941
942 /** \brief API to set FSI frequency (with FSI divider)
943 * This API configure Fsi divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value
944 * \param fsiFreq FSI frequency (fFSI) in Hz
945 * \return Actual Fsi frequency (fFSI) in Hz
946 */
947 IFX_EXTERN float32 IfxScuCcu_setFsiFrequency(float32 fsiFreq);
948
949 /** \brief API to set GETH frequency (with GETH divider)
950 * This API configure geth divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value
951 * \param gethFreq GETH frequency (fGETH) in Hz
952 * \return Actual Geth frequency (fGETH) in Hz
953 */
954 IFX_EXTERN float32 IfxScuCcu_setGethFrequency(float32 gethFreq);
955
956 /** \brief API to set GTM frequency (with GTM divider)
957 * This API configure GTM divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value
958 * \param gtmFreq Desired GTM frequency in Hz
959 * \return Actual GTM frequency in HZ
960 */
961 IFX_EXTERN float32 IfxScuCcu_setGtmFrequency(float32 gtmFreq);
962
963 /** \brief API to set I2C frequency (with I2C divider)
964 * This API configure adas divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value
965 * \param i2cFreq I2C frequency (fI2C) in Hz
966 * \return Actual I2C frequency (fI2C) in Hz
967 */
968 IFX_EXTERN float32 IfxScuCcu_setI2cFrequency(float32 i2cFreq);
969
970 /** \brief API to set MCAN frequency (with MCAN divider)
971 * This API configure MCAN divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value
972 * \param mcanFreq Desired MSC frequency in Hz
973 * \return Actual Mcan frequency (fMCAN) in Hz
974 */
975 IFX_EXTERN float32 IfxScuCcu_setMcanFrequency(float32 mcanFreq);
976
977 /** \brief API to set MCANH frequency (with MCANH divider)
978 * This API configure mcanh divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value
979 * \param mcanhFreq MCANH frequency (fMCANH) in Hz
980 * \return Actual MCanh frequency (fMCANH) in Hz
981 */
982 IFX_EXTERN float32 IfxScuCcu_setMcanhFrequency(float32 mcanhFreq);
983
984 /** \brief API to set MSC frequency (with MSC divider)
985 * This API configure MSC divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value
986 * \param mscFreq Desired MSC frequency in Hz
987 * \return Actual Msc frequency (fMSC) in Hz
988 */
989 IFX_EXTERN float32 IfxScuCcu_setMscFrequency(float32 mscFreq);
990
991 /** \brief API to set QSPI frequency (with QSPI divider)
992 * This API configure Qspi divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value
993 * \param qspiFreq Desired QSPI frequency in Hz
994 * \return Actual Qspi frequency (fQspi) in Hz
995 */
996 IFX_EXTERN float32 IfxScuCcu_setQspiFrequency(float32 qspiFreq);
997
998 /** \brief API to set SPB frequency (with SPB divider)
999 * This API configure SPB divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value
1000 * \param spbFreq Desired SPB frequency in Hz
1001 * \return Actual SPB frequency in Hz
1002 */
1003 IFX_EXTERN float32 IfxScuCcu_setSpbFrequency(float32 spbFreq);
1004
1005 /** \brief API to set SRI frequency (with SRI divider)
1006 * This API configure Sri divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value
1007 * \param sriFreq Sri frequency (fSRI) in Hz
1008 * \return Actual Sri frequency (fSRI) in Hz
1009 */
1010 IFX_EXTERN float32 IfxScuCcu_setSriFrequency(float32 sriFreq);
1011
1012 /** \brief API to set STM frequency (with STM divider)
1013 * This API configure Stm divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value
1014 * \param stmFreq Stm frequency (fASCLINF) in Hz
1015 * \return Actual Stm frequency (fSTM) in Hz
1016 */
1017 IFX_EXTERN float32 IfxScuCcu_setStmFrequency(float32 stmFreq);
1018
1019 /** \} */
1020
1021 /** \addtogroup IfxLld_Scu_Std_Ccu_Ccu_Configuration
1022 * \{ */
1023
1024 /******************************************************************************/
1025 /*-------------------------Inline Function Prototypes-------------------------*/
1026 /******************************************************************************/
1027
1028 /** \brief This inline function configures the Ccu SYS PLLs initial step and PER PLL.
1029 */
1030 IFX_INLINE boolean IfxScuCcu_configureCcuInitialStep(const IfxScuCcu_InitialStepConfig *pllInitStepCfg);
1031
1032 /** \brief Inlined API for clock distribution
1033 * For each CCUCON register update the configured value with the mask.
1034 * \param clockDistributionConfig pointer to clock distribution structure
1035 * \return TRUE: Operation successful, FALSE: Operation Failure
1036 */
1037 IFX_INLINE boolean IfxScuCcu_distributeClockInline(const IfxScuCcu_ClockDistributionConfig *clockDistributionConfig);
1038
1039 /******************************************************************************/
1040 /*-------------------------Global Function Prototypes-------------------------*/
1041 /******************************************************************************/
1042
1043 /** \brief API for clock distribution.
1044 * \return None
1045 */
1046 IFX_EXTERN void IfxScuCcu_distributeClock(IfxScuCcu_ClockDistributionConfig *clockDistributionConfig);
1047
1048 /** \brief API to initialize the SCU Clock Control Unit.
1049 * This API initialize the Sys PLL with ramp steps, BUS dividers and Per PLL for the configuration provided by the configuration structure.
1050 * FSyspll = (Fosc * Nsys)/(Psys * K2sys);
1051 * Fpll1= (Fosc * Nper)/(Pper * K2per);
1052 * Fpll2= (Fosc * Nper)/(Pper * K3per * 1.6); // if DIVBY = 0, else Fpll2= (Fosc * Nper)/(Pper * K3per * 2) // if DIVBY = 1
1053 *
1054 * Note: Following SMU alarms are disabled before the PLL configuration and Enabled at the end of PLL lock in the function.
1055 * PLL0,1,2 clock out of range frequency
1056 * PLL0,1 VCO loss of lock event
1057 * System PLL Oscillator Watchdog, input clock out of range
1058 * The application should store/restore these alarm configurations if required.
1059 * \param config Pointer to the configuration structure of the ScuCcu
1060 * \return Error status of the ScuCcu initialization process.
1061 * \retval TRUE: If an error occurred during initialization.
1062 * \retval FALSE: If initialization was successful.
1063 */
1064 IFX_EXTERN boolean IfxScuCcu_init(const IfxScuCcu_Config *config);
1065
1066 /** \brief Initializes the clock configuration with default values
1067 * \param cfg Pointer to the configuration structure of the ScuCcu
1068 * \return None
1069 */
1070 IFX_EXTERN void IfxScuCcu_initConfig(IfxScuCcu_Config *cfg);
1071
1072 /** \brief API to switch to Backup clock from the current PLL frequency.
1073 * \param cfg Pointer to the configuration structure of the ScuCcu
1074 * \return None
1075 */
1076 IFX_EXTERN void IfxScuCcu_switchToBackupClock(const IfxScuCcu_Config *cfg);
1077
1078 /** \} */
1079
1080 /******************************************************************************/
1081 /*-------------------------Inline Function Prototypes-------------------------*/
1082 /******************************************************************************/
1083
1084 /** \brief Clear the trap status flag.
1085 * \param request Trap request type.
1086 * \return None
1087 */
1088 IFX_INLINE void IfxScuCcu_clearTrapStatusFlag(IfxScuCcu_Traprequest request);
1089
1090 /** \brief Get trap disable flag.
1091 * \param cpuIndex Cpu index
1092 * \param request Trap request type.
1093 * \return Trap request can be generated or not.
1094 */
1095 IFX_INLINE boolean IfxScuCcu_getTrapDisableFlag(IfxCpu_ResourceCpu cpuIndex, IfxScuCcu_Traprequest request);
1096
1097 /** \brief Get the trap status.
1098 * \param request Trap request type.
1099 * \return Trap was requested or not.
1100 */
1101 IFX_INLINE boolean IfxScuCcu_getTrapStatusFlag(IfxScuCcu_Traprequest request);
1102
1103 /** \brief Set the trap disable flag
1104 * \param cpuIndex Cpu index.
1105 * \param request Trap request type.
1106 * \return None
1107 */
1108 IFX_INLINE void IfxScuCcu_setTrapDisableFlag(IfxCpu_ResourceCpu cpuIndex, IfxScuCcu_Traprequest request);
1109
1110 /** \brief Set the trap status flag.
1111 * \param request Trap request type.
1112 * \return None
1113 */
1114 IFX_INLINE void IfxScuCcu_setTrapStatusFlag(IfxScuCcu_Traprequest request);
1115
1116 /**
1117 */
1118 IFX_INLINE boolean IfxScuCcu_throttleSysPllClockInline(const IfxScuCcu_PllThrottleConfig *pllThrottleConfig);
1119
1120 /******************************************************************************/
1121 /*-------------------------Global Function Prototypes-------------------------*/
1122 /******************************************************************************/
1123
1124 /**
1125 * \param modamp modulation amplitude
1126 * \param RGain_P RGain values
1127 * \return None
1128 */
1129 IFX_EXTERN void IfxScuCcu_calRGainParameters(IfxScuCcu_ModulationAmplitude modamp, IfxScuCcu_RGain_Values *RGain_P);
1130
1131 /** \brief initialize modulation parameters
1132 * \param Mod_Cfg modulation configuration
1133 * \return None
1134 */
1135 IFX_EXTERN void IfxScuCcu_modulation_init(const IfxScuCcu_Mod_Config *Mod_Cfg);
1136
1137 /**
1138 * \return None
1139 */
1140 IFX_EXTERN void IfxScuCcu_throttleSysPllClock(IfxScuCcu_PllThrottleConfig *pllThrottleConfig);
1141
1142 /******************************************************************************/
1143 /*-------------------Global Exported Variables/Constants----------------------*/
1144 /******************************************************************************/
1145
1146 /** \brief maps to the IfxScuCcu_ModulationAmplitude enum
1147 */
1148 IFX_EXTERN IFX_CONST float32 IfxScuCcu_MA_percent[IfxScuCcu_ModulationAmplitude_count];
1149
1150 /** \brief Configuration structure for SCU CCU driver.
1151 * The values of this structure are defined as # defined macros in the implementation of Scu
1152 */
1153 IFX_EXTERN IFX_CONST IfxScuCcu_Config IfxScuCcu_defaultClockConfig;
1154
1155 /** \brief default modulation config
1156 */
1157 IFX_EXTERN IFX_CONST IfxScuCcu_Mod_Config IfxScuCcu_defaultModConfig;
1158
1159 IFX_EXTERN uint32 IfxScuCcu_xtalFrequency;
1160
1161 /******************************************************************************/
1162 /*---------------------Inline Function Implementations------------------------*/
1163 /******************************************************************************/
1164
1165 IFX_INLINE void IfxScuCcu_clearTrapStatusFlag(IfxScuCcu_Traprequest request)
1166 {
1167 uint32 trapclear = 1;
1168 SCU_TRAPCLR.U |= (trapclear << request);
1169 }
1170
1171
1172 IFX_INLINE boolean IfxScuCcu_configureCcuInitialStep(const IfxScuCcu_InitialStepConfig *pllInitStepCfg)
1173 {
1174 uint8 initError = 0;
1175 uint16 endinitSfty_pw;
1176
1177 uint32 timeoutCycleCount;
1178 const IfxScuCcu_pllsParameterConfig *pllsParamCfg;
1179 pllsParamCfg = &pllInitStepCfg->pllsParameters;
1180 /*get the watch-dog passwords for usage with this function*/
1181 endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPasswordInline();
1182
1183 /* Reset Safety ENDINIT, SCU_CCUCON registers are protected*/
1184 IfxScuWdt_clearSafetyEndinitInline(endinitSfty_pw);
1185
1186 timeoutCycleCount = IFXSCUCCU_CCUCON_LCK_BIT_TIMEOUT_COUNT;
1187
1188 while (SCU_CCUCON0.B.LCK != 0U)
1189 {
1190 IFXSCUCCU_LOOP_TIMEOUT_CHECK(timeoutCycleCount, initError);
1191 }
1192
1193 {
1194 Ifx_SCU_CCUCON0 scuCcucon0;
1195 scuCcucon0.U = SCU_CCUCON0.U;
1196 scuCcucon0.B.CLKSEL = 0; /*Select the EVR as fsource0/1/2 for the clock distribution */
1197 scuCcucon0.B.UP = 1; /*Update the ccucon0 register */
1198 SCU_CCUCON0.U = scuCcucon0.U;
1199 }
1200
1201 timeoutCycleCount = IFXSCUCCU_CCUCON_LCK_BIT_TIMEOUT_COUNT;
1202
1203 while (SCU_CCUCON0.B.LCK != 0U)
1204 {
1205 IFXSCUCCU_LOOP_TIMEOUT_CHECK(timeoutCycleCount, initError);
1206 }
1207
1208 /*Disable SMU Alarms */
1209 {
1210 SMU_KEYS.U = (uint32)0xBCU; /* Enable access to SMU registers */
1211 SMU_AG8CF0.U &= ~IFXSCUCCU_SMUALARM_MASK;
1212 SMU_AG8CF1.U &= ~IFXSCUCCU_SMUALARM_MASK;
1213 SMU_AG8CF2.U &= ~IFXSCUCCU_SMUALARM_MASK;
1214 SMU_KEYS.U = (uint32)0U;
1215 }
1216
1217 /* Power down the both the PLLs before configuring registers*/
1218 /* Both the PLLs are powered down to be sure for asynchronous PLL registers update cause no glitches */
1219 SCU_SYSPLLCON0.B.PLLPWD = 0;
1220 SCU_PERPLLCON0.B.PLLPWD = 0;
1221
1222 timeoutCycleCount = IFXSCUCCU_SYSPLLSTAT_PWDSTAT_TIMEOUT_COUNT;
1223
1224 while ((SCU_SYSPLLSTAT.B.PWDSTAT == 0) || (SCU_PERPLLSTAT.B.PWDSTAT == 0))
1225 {
1226 IFXSCUCCU_LOOP_TIMEOUT_CHECK(timeoutCycleCount, initError);
1227 }
1228
1229 /* Now configure the oscillator, required oscillator mode is external crystal */
1230
1231 if ((pllsParamCfg->pllInputClockSelection == IfxScuCcu_PllInputClockSelection_fOsc0) || (pllsParamCfg->pllInputClockSelection == IfxScuCcu_PllInputClockSelection_fSysclk))
1232
1233 {
1234 Ifx_SCU_OSCCON scuOsccon;
1235 scuOsccon.U = SCU_OSCCON.U;
1236 #if (IFX_CFG_SCU_EXT_CLOCK == 1)
1237 scuOsccon.B.MODE = 2U; /* external clock selected */
1238 #else
1239 scuOsccon.B.MODE = 0U;
1240 #endif
1241
1242 scuOsccon.B.OSCVAL = (uint32)(pllsParamCfg->xtalFrequency / 1000000U) - 15; /*XTAL range 16MHz to 40MHz*/
1243 /*Note: Oscillator Watchdog Reset (OSCRES) is not required when the PLLs are powered down*/
1244 SCU_OSCCON.U = scuOsccon.U;
1245 }
1246
1247 /* Configure the initial steps for the system PLL*/
1248 {
1249 Ifx_SCU_SYSPLLCON0 sysPllCon0;
1250 sysPllCon0.U = SCU_SYSPLLCON0.U;
1251 sysPllCon0.B.PDIV = pllsParamCfg->sysPllConfig.pDivider;
1252 sysPllCon0.B.NDIV = pllsParamCfg->sysPllConfig.nDivider;
1253 sysPllCon0.B.INSEL = pllsParamCfg->pllInputClockSelection;
1254 SCU_SYSPLLCON0.U = sysPllCon0.U;
1255 }
1256
1257 /* Configure the initial steps for the peripheral PLL*/
1258 {
1259 Ifx_SCU_PERPLLCON0 scuPerPllCon0;
1260 scuPerPllCon0.U = SCU_PERPLLCON0.U;
1261 scuPerPllCon0.B.DIVBY = pllsParamCfg->perPllConfig.k3DividerBypass;
1262 scuPerPllCon0.B.PDIV = pllsParamCfg->perPllConfig.pDivider;
1263 scuPerPllCon0.B.NDIV = pllsParamCfg->perPllConfig.nDivider;
1264 SCU_PERPLLCON0.U = scuPerPllCon0.U;
1265 }
1266
1267 /* Power up the both the PLLs before configuring registers*/
1268 SCU_SYSPLLCON0.B.PLLPWD = 1;
1269 SCU_PERPLLCON0.B.PLLPWD = 1;
1270
1271 timeoutCycleCount = IFXSCUCCU_SYSPLLSTAT_PWDSTAT_TIMEOUT_COUNT;
1272
1273 while ((SCU_SYSPLLSTAT.B.PWDSTAT == 1) || (SCU_PERPLLSTAT.B.PWDSTAT == 1))
1274 {
1275 IFXSCUCCU_LOOP_TIMEOUT_CHECK(timeoutCycleCount, initError);
1276 }
1277
1278 timeoutCycleCount = IFXSCUCCU_PLL_KRDY_TIMEOUT_COUNT;
1279
1280 while ((SCU_SYSPLLSTAT.B.K2RDY == 0U) ||
1281 (SCU_PERPLLSTAT.B.K2RDY == 0U) ||
1282 (SCU_PERPLLSTAT.B.K3RDY == 0U))
1283 {
1284 IFXSCUCCU_LOOP_TIMEOUT_CHECK(timeoutCycleCount, initError);
1285 }
1286
1287 SCU_SYSPLLCON1.B.K2DIV = pllsParamCfg->sysPllConfig.k2Divider;
1288 {
1289 Ifx_SCU_PERPLLCON1 scuPerPllCon1;
1290 scuPerPllCon1.U = SCU_PERPLLCON1.U;
1291 scuPerPllCon1.B.K2DIV = pllsParamCfg->perPllConfig.k2Divider;
1292 scuPerPllCon1.B.K3DIV = pllsParamCfg->perPllConfig.k3Divider;
1293 SCU_PERPLLCON1.U = scuPerPllCon1.U;
1294 }
1295
1296 timeoutCycleCount = IFXSCUCCU_PLL_KRDY_TIMEOUT_COUNT;
1297
1298 while ((SCU_SYSPLLSTAT.B.K2RDY == 0U) ||
1299 (SCU_PERPLLSTAT.B.K2RDY == 0U) ||
1300 (SCU_PERPLLSTAT.B.K3RDY == 0U))
1301 {
1302 IFXSCUCCU_LOOP_TIMEOUT_CHECK(timeoutCycleCount, initError);
1303 }
1304
1305 /*Check if the OSC frequencies are in the limit*/
1306 timeoutCycleCount = IFXSCUCCU_OSCCON_PLLLV_OR_HV_TIMEOUT_COUNT;
1307
1308 while ((SCU_OSCCON.B.PLLLV == 0) && (SCU_OSCCON.B.PLLHV == 0))
1309 {
1310 IFXSCUCCU_LOOP_TIMEOUT_CHECK(timeoutCycleCount, initError);
1311 }
1312
1313 /* Now start PLL locking for latest set values*/
1314 {
1315 SCU_SYSPLLCON0.B.RESLD = 1; /* Restart Sys PLL lock detection */
1316 SCU_PERPLLCON0.B.RESLD = 1; /* Restart Per PLL lock detection */
1317
1318 timeoutCycleCount = IFXSCUCCU_PLL_LOCK_TIMEOUT_COUNT;
1319
1320 while ((SCU_SYSPLLSTAT.B.LOCK == 0) || (SCU_PERPLLSTAT.B.LOCK == 0))
1321 {
1322 IFXSCUCCU_LOOP_TIMEOUT_CHECK(timeoutCycleCount, initError);
1323 }
1324 }
1325 /*Enable SMU Alarms */
1326 {
1327 SMU_KEYS.U = (uint32)0xBCU; /* Enable access to SMU registers */
1328 SMU_CMD.U = (uint32)0x00000005;
1329 SMU_AG8.U = IFXSCUCCU_SMUALARM_MASK; /* Clear SMU Alarms*/
1330 SMU_KEYS.U = (uint32)0U;
1331 }
1332 {
1333 Ifx_SCU_CCUCON0 scu_ccucon0;
1334 scu_ccucon0.U = SCU_CCUCON0.U;
1335 scu_ccucon0.B.CLKSEL = 1; /*Select the PLLs for fsource0/1/2 */
1336 scu_ccucon0.B.UP = 1; /*Update the ccucon0 register */
1337
1338 timeoutCycleCount = IFXSCUCCU_CCUCON_LCK_BIT_TIMEOUT_COUNT;
1339
1340 while (SCU_CCUCON0.B.LCK != 0U)
1341 {
1342 IFXSCUCCU_LOOP_TIMEOUT_CHECK(timeoutCycleCount, initError);
1343 }
1344
1345 SCU_CCUCON0.U = scu_ccucon0.U;
1346
1347 timeoutCycleCount = IFXSCUCCU_CCUCON_LCK_BIT_TIMEOUT_COUNT;
1348
1349 while (SCU_CCUCON0.B.LCK != 0U)
1350 {
1351 IFXSCUCCU_LOOP_TIMEOUT_CHECK(timeoutCycleCount, initError);
1352 }
1353 }
1354
1355 IfxScuWdt_setSafetyEndinitInline(endinitSfty_pw);
1356 return (boolean)initError;
1357 }
1358
1359
1360 IFX_INLINE boolean IfxScuCcu_distributeClockInline(const IfxScuCcu_ClockDistributionConfig *clockDistributionConfig)
1361 {
1362 uint16 endinitSfty_pw;
1363 uint32 timeoutCycleCount;
1364 uint32 initError = 0;
1365
1366 /*get the watch-dog passwords for usage with this function*/
1367 endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPasswordInline();
1368
1369 /* Reset Safety ENDINIT, SCU_CCUCON registers are protected*/
1370 IfxScuWdt_clearSafetyEndinitInline(endinitSfty_pw);
1371
1372 /*Configure the clock distribution */
1373 { /*Write CCUCON0 configuration */
1374 Ifx_SCU_CCUCON0 ccucon0;
1375 ccucon0.U = SCU_CCUCON0.U & ~clockDistributionConfig->ccucon0.mask;
1376 /*update with configured value */
1377 ccucon0.U |= (clockDistributionConfig->ccucon0.mask & clockDistributionConfig->ccucon0.value);
1378 timeoutCycleCount = IFXSCUCCU_CCUCON_LCK_BIT_TIMEOUT_COUNT;
1379
1380 while (SCU_CCUCON0.B.LCK != 0U)
1381 {
1382 IFXSCUCCU_LOOP_TIMEOUT_CHECK(timeoutCycleCount, initError);
1383 }
1384
1385 SCU_CCUCON0.U = ccucon0.U; /*Set update bit explicitly to make above configurations effective */
1386 timeoutCycleCount = IFXSCUCCU_CCUCON_LCK_BIT_TIMEOUT_COUNT;
1387
1388 while (SCU_CCUCON0.B.LCK != 0U)
1389 {
1390 IFXSCUCCU_LOOP_TIMEOUT_CHECK(timeoutCycleCount, initError);
1391 }
1392 }
1393 {
1394 /*Write CCUCON1 configuration */
1395 Ifx_SCU_CCUCON1 ccucon1;
1396 ccucon1.U = SCU_CCUCON1.U;
1397
1398 if (ccucon1.B.CLKSELMCAN
1399 || ccucon1.B.CLKSELMSC
1400 || ccucon1.B.CLKSELQSPI)
1401 {
1402 /* Non Zero ClockSel exists - set to Zero */
1403 /* CAUTION: this would briefly reset and set all clocks in CCUCON1! */
1404 ccucon1.U = SCU_CCUCON1.U & ~clockDistributionConfig->ccucon1.mask;
1405 /*update with configured value */
1406 ccucon1.U |= (clockDistributionConfig->ccucon1.mask & clockDistributionConfig->ccucon1.value);
1407
1408 /* set Clock selects to 0 */
1409 ccucon1.B.CLKSELMCAN = (uint32)0;
1410 ccucon1.B.CLKSELMSC = (uint32)0;
1411 ccucon1.B.CLKSELQSPI = (uint32)0;
1412
1413 timeoutCycleCount = IFXSCUCCU_CCUCON_LCK_BIT_TIMEOUT_COUNT;
1414
1415 while (SCU_CCUCON1.B.LCK != 0U)
1416 {
1417 IFXSCUCCU_LOOP_TIMEOUT_CHECK(timeoutCycleCount, initError);
1418 }
1419
1420 SCU_CCUCON1.U = ccucon1.U;
1421
1422 timeoutCycleCount = IFXSCUCCU_CCUCON_LCK_BIT_TIMEOUT_COUNT;
1423
1424 while (SCU_CCUCON1.B.LCK != 0U)
1425 {
1426 IFXSCUCCU_LOOP_TIMEOUT_CHECK(timeoutCycleCount, initError);
1427 }
1428 }
1429
1430 ccucon1.U = SCU_CCUCON1.U & ~clockDistributionConfig->ccucon1.mask;
1431 /*update with configured value */
1432 ccucon1.U |= (clockDistributionConfig->ccucon1.mask & clockDistributionConfig->ccucon1.value);
1433
1434 timeoutCycleCount = IFXSCUCCU_CCUCON_LCK_BIT_TIMEOUT_COUNT;
1435
1436 while (SCU_CCUCON1.B.LCK != 0U)
1437 {
1438 IFXSCUCCU_LOOP_TIMEOUT_CHECK(timeoutCycleCount, initError);
1439 }
1440
1441 SCU_CCUCON1.U = ccucon1.U;
1442
1443 timeoutCycleCount = IFXSCUCCU_CCUCON_LCK_BIT_TIMEOUT_COUNT;
1444
1445 while (SCU_CCUCON1.B.LCK != 0U)
1446 {
1447 IFXSCUCCU_LOOP_TIMEOUT_CHECK(timeoutCycleCount, initError);
1448 }
1449 }
1450
1451 {
1452 /*Write CCUCON2 configuration */
1453 Ifx_SCU_CCUCON2 ccucon2;
1454 ccucon2.U = SCU_CCUCON2.U;
1455
1456 if (ccucon2.B.CLKSELASCLINS)
1457 {
1458 /* Non Zero ClockSel exists - set to Zero */
1459 /* CAUTION: this would briefly reset and set ASCLINS clock in CCUCON2! */
1460 ccucon2.U = SCU_CCUCON2.U & ~clockDistributionConfig->ccucon2.mask;
1461 /*update with configured value */
1462 ccucon2.U |= (clockDistributionConfig->ccucon2.mask & clockDistributionConfig->ccucon2.value);
1463
1464 ccucon2.B.CLKSELASCLINS = (uint32)0;
1465
1466 timeoutCycleCount = IFXSCUCCU_CCUCON_LCK_BIT_TIMEOUT_COUNT;
1467
1468 while (SCU_CCUCON2.B.LCK != 0U)
1469 {
1470 IFXSCUCCU_LOOP_TIMEOUT_CHECK(timeoutCycleCount, initError);
1471 }
1472
1473 SCU_CCUCON2.U = ccucon2.U;
1474
1475 timeoutCycleCount = IFXSCUCCU_CCUCON_LCK_BIT_TIMEOUT_COUNT;
1476
1477 while (SCU_CCUCON2.B.LCK != 0U)
1478 {
1479 IFXSCUCCU_LOOP_TIMEOUT_CHECK(timeoutCycleCount, initError);
1480 }
1481 }
1482
1483 ccucon2.U = SCU_CCUCON2.U & ~clockDistributionConfig->ccucon2.mask;
1484 /*update with configured value */
1485 ccucon2.U |= (clockDistributionConfig->ccucon2.mask & clockDistributionConfig->ccucon2.value);
1486
1487 timeoutCycleCount = IFXSCUCCU_CCUCON_LCK_BIT_TIMEOUT_COUNT;
1488
1489 while (SCU_CCUCON2.B.LCK != 0U)
1490 {
1491 IFXSCUCCU_LOOP_TIMEOUT_CHECK(timeoutCycleCount, initError);
1492 }
1493
1494 SCU_CCUCON2.U = ccucon2.U;
1495
1496 timeoutCycleCount = IFXSCUCCU_CCUCON_LCK_BIT_TIMEOUT_COUNT;
1497
1498 while (SCU_CCUCON2.B.LCK != 0U)
1499 {
1500 IFXSCUCCU_LOOP_TIMEOUT_CHECK(timeoutCycleCount, initError);
1501 }
1502 }
1503 {
1504 /*Write CCUCON5 configuration */
1505 Ifx_SCU_CCUCON5 ccucon5;
1506 ccucon5.U = SCU_CCUCON5.U & ~clockDistributionConfig->ccucon5.mask;
1507 /*update with configured value */
1508 ccucon5.U |= (clockDistributionConfig->ccucon5.mask & clockDistributionConfig->ccucon5.value);
1509 ccucon5.B.UP = 1;
1510 timeoutCycleCount = IFXSCUCCU_CCUCON_LCK_BIT_TIMEOUT_COUNT;
1511
1512 while (SCU_CCUCON5.B.LCK != 0U)
1513 {
1514 IFXSCUCCU_LOOP_TIMEOUT_CHECK(timeoutCycleCount, initError);
1515 }
1516
1517 SCU_CCUCON5.U = ccucon5.U;
1518 timeoutCycleCount = IFXSCUCCU_CCUCON_LCK_BIT_TIMEOUT_COUNT;
1519
1520 while (SCU_CCUCON5.B.LCK != 0U)
1521 {
1522 IFXSCUCCU_LOOP_TIMEOUT_CHECK(timeoutCycleCount, initError);
1523 }
1524 }
1525 {
1526 /*Write CCUCON6 configuration */
1527 Ifx_SCU_CCUCON6 ccucon6;
1528 ccucon6.U = SCU_CCUCON6.U & ~clockDistributionConfig->ccucon6.mask;
1529 /*update with configured value */
1530 ccucon6.U |= (clockDistributionConfig->ccucon6.mask & clockDistributionConfig->ccucon6.value);
1531 SCU_CCUCON6.U = ccucon6.U;
1532 }
1533
1534 {
1535 /*Write CCUCON7 configuration */
1536 Ifx_SCU_CCUCON7 ccucon7;
1537 ccucon7.U = SCU_CCUCON7.U & ~clockDistributionConfig->ccucon7.mask;
1538 /*update with configured value */
1539 ccucon7.U |= (clockDistributionConfig->ccucon7.mask & clockDistributionConfig->ccucon7.value);
1540 SCU_CCUCON7.U = ccucon7.U;
1541 }
1542
1543 {
1544 /*Write CCUCON8 configuration */
1545 Ifx_SCU_CCUCON8 ccucon8;
1546 ccucon8.U = SCU_CCUCON8.U & ~clockDistributionConfig->ccucon8.mask;
1547 /*update with configured value */
1548 ccucon8.U |= (clockDistributionConfig->ccucon8.mask & clockDistributionConfig->ccucon8.value);
1549 SCU_CCUCON8.U = ccucon8.U;
1550 }
1551 {
1552 /*Write CCUCON9 configuration */
1553 Ifx_SCU_CCUCON9 ccucon9;
1554 ccucon9.U = SCU_CCUCON9.U & ~clockDistributionConfig->ccucon9.mask;
1555 /*update with configured value */
1556 ccucon9.U |= (clockDistributionConfig->ccucon9.mask & clockDistributionConfig->ccucon9.value);
1557 SCU_CCUCON9.U = ccucon9.U;
1558 }
1559 IfxScuWdt_setSafetyEndinitInline(endinitSfty_pw);
1560 return (boolean)initError;
1561 }
1562
1563
1564 IFX_INLINE float32 IfxScuCcu_getAdcFrequency(void)
1565 {
1566 return IfxScuCcu_getSourceFrequency(IfxScuCcu_Fsource_1);
1567 }
1568
1569
1570 IFX_INLINE float32 IfxScuCcu_getAsclinFFrequency(void)
1571 {
1572 float32 freq = 0;
1573
1574 uint8 asclindiv[16] = {1, 1, 2, 3, 4, 5, 6, 6, 8, 8, 10, 10, 12, 12, 12, 15};
1575
1576 if (SCU_CCUCON2.B.ASCLINFDIV)
1577 {
1578 freq = IfxScuCcu_getSourceFrequency(IfxScuCcu_Fsource_2) / asclindiv[SCU_CCUCON2.B.ASCLINFDIV];
1579 }
1580
1581 return freq;
1582 }
1583
1584
1585 IFX_INLINE float32 IfxScuCcu_getEvrFrequency(void)
1586 {
1587 return IFXSCU_EVR_OSC_FREQUENCY;
1588 }
1589
1590
1591 IFX_INLINE float32 IfxScuCcu_getGethFrequency(void)
1592 {
1593 return IfxScuCcu_getSourceFrequency(IfxScuCcu_Fsource_0) / SCU_CCUCON5.B.GETHDIV;
1594 }
1595
1596
1597 IFX_INLINE float32 IfxScuCcu_getGtmFrequency(void)
1598 {
1599 /* fGTM = fSOURCEGTM / GTMDIV ;
1600 * fSOURCEGTM = fSPB *2
1601 */
1602 uint8 gtmDiv = SCU_CCUCON0.B.GTMDIV;
1603 float32 gtmFreq = 0;
1604
1605 if (gtmDiv == 0u)
1606 {
1607 gtmFreq = 0.0;
1608 }
1609 else if (gtmDiv == 1U)
1610 {
1611 gtmFreq = IfxScuCcu_getSpbFrequency() * 2;
1612 }
1613 else
1614
1615 {
1616 gtmFreq = IfxScuCcu_getSourceFrequency(IfxScuCcu_Fsource_0) / gtmDiv;
1617 }
1618
1619 return gtmFreq;
1620 }
1621
1622
1623 IFX_INLINE float32 IfxScuCcu_getI2cFrequency(void)
1624 {
1625 return IfxScuCcu_getSourceFrequency(IfxScuCcu_Fsource_2) / SCU_CCUCON1.B.I2CDIV;
1626 }
1627
1628
1629 IFX_INLINE float32 IfxScuCcu_getMcanhFrequency(void)
1630 {
1631 return IfxScuCcu_getSourceFrequency(IfxScuCcu_Fsource_0) / SCU_CCUCON5.B.MCANHDIV;
1632 }
1633
1634
1635 IFX_INLINE float32 IfxScuCcu_getOsc0Frequency(void)
1636 {
1637 return (float32)IFX_CFG_SCU_XTAL_FREQUENCY;
1638 }
1639
1640
1641 IFX_INLINE float32 IfxScuCcu_getOscFrequency(void)
1642 {
1643 float32 freq;
1644
1645 if (SCU_SYSPLLCON0.B.INSEL == IfxScuCcu_PllInputClockSelection_fOsc1)
1646 {
1647 freq = IFXSCU_EVR_OSC_FREQUENCY;
1648 }
1649 else if (SCU_SYSPLLCON0.B.INSEL == IfxScuCcu_PllInputClockSelection_fOsc0)
1650 {
1651 freq = (float32)IFX_CFG_SCU_XTAL_FREQUENCY;
1652 }
1653 else if (SCU_SYSPLLCON0.B.INSEL == IfxScuCcu_PllInputClockSelection_fSysclk)
1654 {
1655 freq = IFX_CFG_SCU_SYSCLK_FREQUENCY;
1656 }
1657 else
1658 {
1659 /* Reserved values, this */
1660 freq = 0.0;
1661 }
1662
1663 return freq;
1664 }
1665
1666
1667 IFX_INLINE IfxScuCcu_PllInputClockSelection IfxScuCcu_getSourceSelection(void)
1668 {
1669 return (IfxScuCcu_PllInputClockSelection)SCU_CCUCON0.B.CLKSEL;
1670 }
1671
1672
1673 IFX_INLINE float32 IfxScuCcu_getStmFrequency(void)
1674 {
1675 return IfxScuCcu_getSourceFrequency(IfxScuCcu_Fsource_0) / SCU_CCUCON0.B.STMDIV;
1676 }
1677
1678
1679 IFX_INLINE boolean IfxScuCcu_getTrapDisableFlag(IfxCpu_ResourceCpu cpuIndex, IfxScuCcu_Traprequest request)
1680 {
1681 boolean trapdisable = 0;
1682
1683 trapdisable = ((SCU_TRAPDIS0.U >> ((cpuIndex << 3) + request)) & 0x1);
1684 return trapdisable;
1685 }
1686
1687
1688 IFX_INLINE boolean IfxScuCcu_getTrapStatusFlag(IfxScuCcu_Traprequest request)
1689 {
1690 boolean trapstatus = 0;
1691
1692 trapstatus = (((SCU_TRAPSTAT.U) >> request) & (0x1));
1693
1694 return trapstatus;
1695 }
1696
1697
1698 IFX_INLINE void IfxScuCcu_setTrapDisableFlag(IfxCpu_ResourceCpu cpuIndex, IfxScuCcu_Traprequest request)
1699 {
1700 uint32 trapdis = 1;
1701 trapdis = (trapdis << (cpuIndex << 3));
1702 SCU_TRAPDIS0.U |= (trapdis << request);
1703 }
1704
1705
1706 IFX_INLINE void IfxScuCcu_setTrapStatusFlag(IfxScuCcu_Traprequest request)
1707 {
1708 uint32 trapset = 1;
1709 SCU_TRAPSET.U |= (trapset << request);
1710 }
1711
1712
1713 IFX_INLINE boolean IfxScuCcu_throttleSysPllClockInline(const IfxScuCcu_PllThrottleConfig *pllThrottleConfig)
1714 {
1715 uint8 initError = 0;
1716 uint8 pllStepsCount;
1717 uint16 endinitSfty_pw;
1718 uint32 timeoutCycleCount;
1719
1720 /*get the watch-dog passwords for usage with this function*/
1721 endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPasswordInline();
1722
1723 /*Start Pll ramp up sequence */
1724 for (pllStepsCount = 0; pllStepsCount < pllThrottleConfig->numOfSteps; pllStepsCount++)
1725 { /*iterate through number of pll steps */
1726 {
1727 IfxScuWdt_clearSafetyEndinitInline(endinitSfty_pw);
1728
1729 /*Configure K2 divider */
1730 timeoutCycleCount = IFXSCUCCU_PLL_KRDY_TIMEOUT_COUNT;
1731
1732 while (SCU_SYSPLLSTAT.B.K2RDY == 0U)
1733 {
1734 IFXSCUCCU_LOOP_TIMEOUT_CHECK(timeoutCycleCount, initError);
1735 }
1736
1737 /*Now set the K2 divider value for the step corresponding to step count */
1738 SCU_SYSPLLCON1.B.K2DIV = pllThrottleConfig->pllSteps[pllStepsCount].k2Step;
1739 IfxScuWdt_setSafetyEndinitInline(endinitSfty_pw);
1740 }
1741
1742 /*Wait for waitCounter corresponding to the pll step */
1743 IfxScuCcu_wait(pllThrottleConfig->pllSteps[pllStepsCount].waitTime);
1744 }
1745
1746 return (boolean)initError;
1747 }
1748
1749
1750 IFX_INLINE void IfxScuCcu_wait(float32 timeSec)
1751 {
1752 uint32 stmCount = (uint32)(IfxScuCcu_getStmFrequency() * timeSec);
1753 uint32 stmCountBegin = STM0_TIM0.U;
1754
1755 while ((uint32)(STM0_TIM0.U - stmCountBegin) < stmCount)
1756 {
1757 /* There is no need to check overflow of the STM timer.
1758 * When counter after overflow subtracted with counter before overflow,
1759 * the subtraction result will be as expected, as long as both are unsigned 32 bits
1760 * eg: stmCountBegin= 0xFFFFFFFE (before overflow)
1761 * stmCountNow = 0x00000002 (before overflow)
1762 * diff= stmCountNow - stmCountBegin = 4 as expected.*/
1763 }
1764 }
1765
1766
1767 IFX_INLINE void IfxScuCcu_waitWithWdtService(float32 timeSec)
1768 {
1769 uint32 stmCount = (uint32)(IfxScuCcu_getStmFrequency() * timeSec);
1770 uint32 stmCountBegin = STM0_TIM0.U;
1771 uint16 cpuWdtPassword = IfxScuWdt_getCpuWatchdogPassword();
1772 uint16 safetyWdtPassword = IfxScuWdt_getSafetyWatchdogPassword();
1773
1774 while ((uint32)(STM0_TIM0.U - stmCountBegin) < stmCount)
1775 {
1776 /* There is no need to check overflow of the STM timer.
1777 * When counter after overflow subtracted with counter before overflow,
1778 * the subtraction result will be as expected, as long as both are unsigned 32 bits
1779 * eg: stmCountBegin= 0xFFFFFFFE (before overflow)
1780 * stmCountNow = 0x00000002 (before overflow)
1781 * diff= stmCountNow - stmCountBegin = 4 as expected.*/
1782 IfxScuWdt_serviceCpuWatchdog(cpuWdtPassword);
1783 IfxScuWdt_serviceSafetyWatchdog(safetyWdtPassword);
1784 }
1785 }
1786
1787
1788 IFX_INLINE void IfxScuCcu_switchToLowPowerMode(IfxScuCcu_LowPowerDivRatio lpDiv)
1789 {
1790 uint16 endinitSfty_pw;
1791
1792 endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPassword();
1793
1794 /* clear safety ENDINIT prior to write to SCU_CCUCON0 */
1795 IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
1796
1797 /* wait for unlock status - safety watchdog ensures timeout */
1798 while (SCU_CCUCON0.B.LCK != 0U)
1799 {} /*Wait till ccucon0 lock is set, No "timeout" required, ENDINIT watch-dog is active! */
1800
1801 Ifx_SCU_CCUCON0 scu_ccucon0;
1802 scu_ccucon0.U = SCU_CCUCON0.U; /* read ccucon0*/
1803 scu_ccucon0.B.LPDIV = lpDiv; /* write Div ratio to LPDIV */
1804 scu_ccucon0.B.UP = 1; /*Update the ccucon0 register */
1805 SCU_CCUCON0.U = scu_ccucon0.U; /* write back */
1806
1807 IfxScuWdt_setSafetyEndinit(endinitSfty_pw); /* set Safety ENDINIT */
1808 }
1809
1810
1811 IFX_INLINE void IfxScuCcu_switchToNormalMode(const uint32 ccucon0)
1812 {
1813 uint16 endinitSfty_pw;
1814
1815 endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPassword();
1816
1817 /* clear safety ENDINIT prior to write to SCU_CCUCON0 */
1818 IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
1819
1820 /* wait for unlock status - safety watchdog ensures timeout */
1821 while (SCU_CCUCON0.B.LCK != 0U)
1822 {} /*Wait till ccucon0 lock is set, No "timeout" required, ENDINIT watch-dog is active! */
1823
1824 /* Intermediate step : SPBDIV = 12 and SRIDIV = 3
1825 * NOTE: This intermediate step in division ratio is done to avoid a sudden jump in clock frequency
1826 * while jumping back from Low Power to Normal mode. The division ratios used in this step is hard
1827 * coded into this function after proving on HW.
1828 */
1829 Ifx_SCU_CCUCON0 scu_ccucon0;
1830 scu_ccucon0.U = SCU_CCUCON0.U; /* read ccucon0*/
1831 scu_ccucon0.B.SRIDIV = 3; /* SRIDIV = 1:3*/
1832 scu_ccucon0.B.SPBDIV = 12; /* SPBDIV = 1:12 */
1833 scu_ccucon0.B.LPDIV = 0; /* Exit Low Power Mode */
1834 scu_ccucon0.B.UP = 1;
1835 SCU_CCUCON0.U = scu_ccucon0.U; /* write back */
1836 IfxScuWdt_setSafetyEndinit(endinitSfty_pw); /* set Safety ENDINIT */
1837
1838 /* wait */
1839 IfxScuCcu_wait(IFXSCUCCU_LPTONORMAL_WAITTIME); /* wait */
1840
1841 /* Now back to original settings for normal mode */
1842 /* clear safety ENDINIT prior to write to SCU_CCUCON0 */
1843 IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
1844
1845 /* wait for unlock status - safety watchdog ensures timeout */
1846 while (SCU_CCUCON0.B.LCK != 0U)
1847 {} /*Wait till ccucon0 lock is set, No "timeout" required, ENDINIT watch-dog is active! */
1848
1849 scu_ccucon0.U = SCU_CCUCON0.U; /* read ccucon0*/
1850 scu_ccucon0.U = ccucon0; /* original setting */
1851 scu_ccucon0.B.UP = 1; /* update */
1852 SCU_CCUCON0.U = scu_ccucon0.U; /* write back */
1853 IfxScuWdt_setSafetyEndinit(endinitSfty_pw); /* set Safety ENDINIT */
1854 }
1855
1856
1857 #endif /* IFXSCUCCU_H */
IfxScuCcu_K3divider_5
K3-Divider 5.
Definition: IfxScuCcu.h:329
IFXSCUCCU_SMUALARM_MASK
#define IFXSCUCCU_SMUALARM_MASK
Definition: IfxScuCcu.h:213
IfxScuCcu_Ndivider_5
N-divider 5.
Definition: IfxScuCcu.h:367
IfxScuWdt_setSafetyEndinitInline
IFX_INLINE void IfxScuWdt_setSafetyEndinitInline(uint16 password)
SCUWDT Inline API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.h:689
IfxScuCcu_wait
IFX_INLINE void IfxScuCcu_wait(float32 timeSec)
API to wait for requested duration. Note: IfxScuCcu_wait shall not use STM in future, because we can guarantee that STM is enabled after reset but If PLL init is called for changing the frequency during runtime, there is no guarantee that STM is enabled.
Definition: IfxScuCcu.h:1750
IfxScuWdt_getSafetyWatchdogPasswordInline
IFX_INLINE uint16 IfxScuWdt_getSafetyWatchdogPasswordInline(void)
SCUWDT Inline API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.h:641
IfxScuCcu_Ndivider_33
N-divider 33.
Definition: IfxScuCcu.h:395
IfxScuCcu_setGtmFrequency
IFX_EXTERN float32 IfxScuCcu_setGtmFrequency(float32 gtmFreq)
API to set GTM frequency (with GTM divider) This API configure GTM divider values in CCUCON registers...
Definition: IfxScuCcu.c:932
IfxScuCcu_setMcanFrequency
IFX_EXTERN float32 IfxScuCcu_setMcanFrequency(float32 mcanFreq)
API to set MCAN frequency (with MCAN divider) This API configure MCAN divider values in CCUCON regist...
Definition: IfxScuCcu.c:1018
IfxScuCcu_Ndivider_23
N-divider 23.
Definition: IfxScuCcu.h:385
IfxScuCcu_Ndivider_77
N-divider 77.
Definition: IfxScuCcu.h:439
IfxScuCcu_Config::sysPllThrottleConfig
IfxScuCcu_PllThrottleConfig sysPllThrottleConfig
Configuration of PLL throttling.
Definition: IfxScuCcu.h:660
IfxScuCcu_ClockDistributionConfig::ccucon2
IfxScuCcu_CcuconRegConfig ccucon2
CCUCON2 Register configuration.
Definition: IfxScuCcu.h:619
IfxScuCcu_getSpbFrequency
IFX_EXTERN float32 IfxScuCcu_getSpbFrequency(void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider...
Definition: IfxScuCcu.c:479
IfxScuCcu_Ndivider_11
N-divider 11.
Definition: IfxScuCcu.h:373
IfxScuCcu_setStmFrequency
IFX_EXTERN float32 IfxScuCcu_setStmFrequency(float32 stmFreq)
API to set STM frequency (with STM divider) This API configure Stm divider values in CCUCON registers...
Definition: IfxScuCcu.c:1313
IfxScuCcu_Config::modulationConfig
IFX_CONST IfxScuCcu_Mod_Config * modulationConfig
modulation configuration
Definition: IfxScuCcu.h:663
IfxScuCcu_Ndivider_31
N-divider 31.
Definition: IfxScuCcu.h:393
IfxScuCcu_Ndivider_56
N-divider 56.
Definition: IfxScuCcu.h:418
IfxScuCcu_defaultClockConfig
IFX_EXTERN IFX_CONST IfxScuCcu_Config IfxScuCcu_defaultClockConfig
Configuration structure for SCU CCU driver. The values of this structure are defined as # defined mac...
Definition: IfxScuCcu.h:1153
IfxScuCcu_Config::clockDistribution
IfxScuCcu_ClockDistributionConfig clockDistribution
Configuration of of bus clocks and other module clock distribution.
Definition: IfxScuCcu.h:661
IfxScuCcu_Ndivider_102
N-divider 102.
Definition: IfxScuCcu.h:464
IfxScuCcu_K3divider_6
K3-Divider 6.
Definition: IfxScuCcu.h:330
IfxScuCcu_Ndivider_108
N-divider 108.
Definition: IfxScuCcu.h:470
IfxScuCcu_Ndivider_27
N-divider 27.
Definition: IfxScuCcu.h:389
IfxScuCcu_getAdcFrequency
IFX_INLINE float32 IfxScuCcu_getAdcFrequency(void)
API to get Adc (EVADC, EDSADC) frequency. This API returns the based on the divider value in CCUCON r...
Definition: IfxScuCcu.h:1564
IfxScuCcu_clearTrapStatusFlag
IFX_INLINE void IfxScuCcu_clearTrapStatusFlag(IfxScuCcu_Traprequest request)
Clear the trap status flag.
Definition: IfxScuCcu.h:1165
IfxScuCcu_getAsclinFFrequency
IFX_INLINE float32 IfxScuCcu_getAsclinFFrequency(void)
API to get ASCLINF divider frequency. This API returns the based on the divider value in CCUCON regis...
Definition: IfxScuCcu.h:1570
IfxScuCcu_Ndivider_41
N-divider 41.
Definition: IfxScuCcu.h:403
IfxScuCcu_xtalFrequency
IFX_EXTERN uint32 IfxScuCcu_xtalFrequency
Definition: IfxScuCcu.h:1159
IfxScuWdt_clearSafetyEndinitInline
IFX_INLINE void IfxScuWdt_clearSafetyEndinitInline(uint16 password)
SCUWDT Inline API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.h:581
IfxScuCcu_Ndivider_113
N-divider 113.
Definition: IfxScuCcu.h:475
IfxScuCcu_pllsParameterConfig
Configuration structure type for the Pll Parameters.
Definition: IfxScuCcu.h:589
IfxScuCcu_getAsclinSFrequency
IFX_EXTERN float32 IfxScuCcu_getAsclinSFrequency(void)
API to get ASCLINS divider frequency. This API returns the ASCLINS frequency based on the divider val...
Definition: IfxScuCcu.c:121
IfxScuCcu_Ndivider_28
N-divider 28.
Definition: IfxScuCcu.h:390
IfxScuCcu_setQspiFrequency
IFX_EXTERN float32 IfxScuCcu_setQspiFrequency(float32 qspiFreq)
API to set QSPI frequency (with QSPI divider) This API configure Qspi divider values in CCUCON regist...
Definition: IfxScuCcu.c:1167
IfxScu_PinMap.h
SCU I/O map.
IfxScuCcu_waitWithWdtService
IFX_INLINE void IfxScuCcu_waitWithWdtService(float32 timeSec)
API to wait for requested duration along with watchdog service to avoid any reset case during startup...
Definition: IfxScuCcu.h:1767
IfxScuCcu_K3divider_7
K3-Divider 7.
Definition: IfxScuCcu.h:331
IfxScuCcu_switchToNormalMode
IFX_INLINE void IfxScuCcu_switchToNormalMode(const uint32 ccucon0)
API to switch back to normal mode from low power mode.
Definition: IfxScuCcu.h:1811
IFXSCUCCU_SYSPLLSTAT_PWDSTAT_TIMEOUT_COUNT
#define IFXSCUCCU_SYSPLLSTAT_PWDSTAT_TIMEOUT_COUNT
~122uS max wait time for PLL power down/up state update
Definition: IfxScuCcu.h:227
IfxScuCcu_Traprequest
IfxScuCcu_Traprequest
trap request type
Definition: IfxScuCcu.h:519
IfxScuCcu_Config
Configuration structure SCU module.
Definition: IfxScuCcu.h:657
IfxScuCcu_Ndivider_6
N-divider 6.
Definition: IfxScuCcu.h:368
IfxScuCcu_InitialStepConfig::pllsParameters
IfxScuCcu_pllsParameterConfig pllsParameters
Configuration Parameters for both PLLs.
Definition: IfxScuCcu.h:631
IfxScuCcu_Ndivider_29
N-divider 29.
Definition: IfxScuCcu.h:391
IfxScuCcu_Ndivider_93
N-divider 93.
Definition: IfxScuCcu.h:455
IfxScuCcu_Ndivider_107
N-divider 107.
Definition: IfxScuCcu.h:469
IfxScuCcu_K2divider_4
K2-Divider 4.
Definition: IfxScuCcu.h:314
IfxScuCcu_Ndivider_10
N-divider 10.
Definition: IfxScuCcu.h:372
IfxScuCcu_Ndivider_15
N-divider 15.
Definition: IfxScuCcu.h:377
IfxScuCcu_Ndivider_119
N-divider 119.
Definition: IfxScuCcu.h:481
IfxScuCcu_ClockDistributionConfig::ccucon9
IfxScuCcu_CcuconRegConfig ccucon9
CCUCON9 Register configuration.
Definition: IfxScuCcu.h:624
IfxScuCcu_K2divider_2
K2-Divider 2.
Definition: IfxScuCcu.h:312
IfxScuCcu_MA_percent
IFX_EXTERN IFX_CONST float32 IfxScuCcu_MA_percent[IfxScuCcu_ModulationAmplitude_count]
maps to the IfxScuCcu_ModulationAmplitude enum
Definition: IfxScuCcu.h:1148
IfxScuCcu_PllInputClockSelection_fOsc0
fOsc0 or XTAL clock select
Definition: IfxScuCcu.h:513
IfxScuCcu_Ndivider_117
N-divider 117.
Definition: IfxScuCcu.h:479
IfxScuCcu_defaultModConfig
IFX_EXTERN IFX_CONST IfxScuCcu_Mod_Config IfxScuCcu_defaultModConfig
default modulation config
Definition: IfxScuCcu.h:1157
IfxScuCcu_CcuconRegConfig::mask
uint32 mask
CCUCON Mask to select the bit fields to be updated.
Definition: IfxScuCcu.h:576
IfxScuCcu_PllStepConfig::k2Step
uint8 k2Step
K2 divider value for this step.
Definition: IfxScuCcu.h:583
IfxScuCcu_distributeClock
IFX_EXTERN void IfxScuCcu_distributeClock(IfxScuCcu_ClockDistributionConfig *clockDistributionConfig)
API for clock distribution.
Definition: IfxScuCcu.c:115
IfxScuCcu_Ndivider_86
N-divider 86.
Definition: IfxScuCcu.h:448
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxScuCcu_Ndivider_21
N-divider 21.
Definition: IfxScuCcu.h:383
IfxScuCcu_Ndivider_109
N-divider 109.
Definition: IfxScuCcu.h:471
IfxScuCcu_Ndivider_120
N-divider 120.
Definition: IfxScuCcu.h:482
IfxScuCcu_throttleSysPllClock
IFX_EXTERN void IfxScuCcu_throttleSysPllClock(IfxScuCcu_PllThrottleConfig *pllThrottleConfig)
Definition: IfxScuCcu.c:1405
float32
float float32
Definition: Platform_Types.h:170
IfxScuCcu_Fsource_0
fSource0
Definition: IfxScuCcu.h:302
IfxScuCcu_Ndivider_58
N-divider 58.
Definition: IfxScuCcu.h:420
IfxScuCcu_K3divider_1
K3-Divider 1.
Definition: IfxScuCcu.h:325
IfxScuCcu_Ndivider_65
N-divider 65.
Definition: IfxScuCcu.h:427
IfxScuCcu_Mod_Config::Mod_Amp
IfxScuCcu_ModulationAmplitude Mod_Amp
modulation amplitude
Definition: IfxScuCcu.h:650
IfxScuCcu_PllStepConfig::waitTime
float32 waitTime
Wait time for for this step.
Definition: IfxScuCcu.h:584
IfxScuCcu_Ndivider_39
N-divider 39.
Definition: IfxScuCcu.h:401
IfxScuCcu_PllThrottleConfig::numOfSteps
uint8 numOfSteps
Number of PLL divider steps during clock throttling.
Definition: IfxScuCcu.h:639
IfxScuCcu_setAsclinSFrequency
IFX_EXTERN float32 IfxScuCcu_setAsclinSFrequency(float32 asclinSFreq)
API to set ASCLINS frequency (with ASCLINS divider) This API configure ASCLINS divider values in CCUC...
Definition: IfxScuCcu.c:673
IfxScuCcu_ModulationAmplitude_1p25
1.25%
Definition: IfxScuCcu.h:352
IfxScuCcu_K3divider_8
K3-Divider 8.
Definition: IfxScuCcu.h:332
IfxScuCcu_distributeClockInline
IFX_INLINE boolean IfxScuCcu_distributeClockInline(const IfxScuCcu_ClockDistributionConfig *clockDistributionConfig)
Inlined API for clock distribution For each CCUCON register update the configured value with the mask...
Definition: IfxScuCcu.h:1360
IfxScuCcu_Ndivider_116
N-divider 116.
Definition: IfxScuCcu.h:478
IfxScuCcu_LowPowerDivRatio_divBy120
Divide by 120.
Definition: IfxScuCcu.h:342
IfxScuCcu_Traprequest_esr0
external service request 0
Definition: IfxScuCcu.h:521
IfxScuCcu_LowPowerDivRatio_divBy60
Divide by 60.
Definition: IfxScuCcu.h:341
IfxScuCcu_Ndivider_18
N-divider 18.
Definition: IfxScuCcu.h:380
IfxScuCcu_Ndivider_123
N-divider 123.
Definition: IfxScuCcu.h:485
IfxScuCcu_getPerPllFrequency2
IFX_EXTERN float32 IfxScuCcu_getPerPllFrequency2(void)
API to get actual PER PLL2 (K3 Divider) frequency This API returns the PER PLL2 frequency based on th...
Definition: IfxScuCcu.c:374
IfxScuCcu_Ndivider_47
N-divider 47.
Definition: IfxScuCcu.h:409
IfxScuCcu_Ndivider_45
N-divider 45.
Definition: IfxScuCcu.h:407
IfxScuCcu_Ndivider_44
N-divider 44.
Definition: IfxScuCcu.h:406
IfxScuCcu_getStmFrequency
IFX_INLINE float32 IfxScuCcu_getStmFrequency(void)
API to get STM divider frequency. This API returns the based on the divider value in CCUCON register ...
Definition: IfxScuCcu.h:1673
IfxScuCcu_ModulationAmplitude_1p5
1.5%
Definition: IfxScuCcu.h:353
IfxScuCcu_PerPllConfig::k3DividerBypass
uint8 k3DividerBypass
Divider Bypass 0 - The divide by block in front of the K3-Divider is not bypassed. 1- The divide by block in front of the K3-Divider is bypassed.
Definition: IfxScuCcu.h:552
IfxScuCcu_Ndivider_104
N-divider 104.
Definition: IfxScuCcu.h:466
IfxScuCcu_Ndivider_50
N-divider 50.
Definition: IfxScuCcu.h:412
IfxScuCcu_setTrapStatusFlag
IFX_INLINE void IfxScuCcu_setTrapStatusFlag(IfxScuCcu_Traprequest request)
Set the trap status flag.
Definition: IfxScuCcu.h:1706
IfxScuCcu_Ndivider_52
N-divider 52.
Definition: IfxScuCcu.h:414
IFXSCU_EVR_OSC_FREQUENCY
#define IFXSCU_EVR_OSC_FREQUENCY
Definition: IfxScu_cfg.h:81
IfxScuCcu_setFsiFrequency
IFX_EXTERN float32 IfxScuCcu_setFsiFrequency(float32 fsiFreq)
API to set FSI frequency (with FSI divider) This API configure Fsi divider values in CCUCON registers...
Definition: IfxScuCcu.c:855
IfxScuCcu_K2divider
IfxScuCcu_K2divider
MODULE_SCU.PLLCON1.B.K2DIV, specifies the K2-Divider.
Definition: IfxScuCcu.h:309
IfxScuCcu_Ndivider_101
N-divider 101.
Definition: IfxScuCcu.h:463
IfxScuCcu_getPllFrequency
IFX_EXTERN float32 IfxScuCcu_getPllFrequency(void)
API to get actual Sys PLL output frequency. This API returns the based on the divider values in CCUCO...
Definition: IfxScuCcu.c:394
IfxScuCcu_K2divider_1
K2-Divider 1.
Definition: IfxScuCcu.h:311
IfxScuCcu_setCpuFrequency
IFX_EXTERN float32 IfxScuCcu_setCpuFrequency(IfxCpu_ResourceCpu cpu, float32 cpuFreq)
API to set CPU frequency (with CPU divider) This API configure CPU divider values in CCUCON registers...
Definition: IfxScuCcu.c:766
IfxScuCcu_Ndivider_26
N-divider 26.
Definition: IfxScuCcu.h:388
IfxScuCcu_RGain_Values::RGainNom
float32 RGainNom
RGain Nominal value.
Definition: IfxScuCcu.h:672
IfxScuCcu_K3divider
IfxScuCcu_K3divider
MODULE_SCU.PLLCON1.B.K3DIV, specifies the K3-Divider.
Definition: IfxScuCcu.h:323
IfxScuCcu_setTrapDisableFlag
IFX_INLINE void IfxScuCcu_setTrapDisableFlag(IfxCpu_ResourceCpu cpuIndex, IfxScuCcu_Traprequest request)
Set the trap disable flag.
Definition: IfxScuCcu.h:1698
IfxScuCcu_ModulationAmplitude_2p5
2.5%
Definition: IfxScuCcu.h:355
IfxScuWdt.h
SCU basic functionality.
IfxScuWdt_serviceCpuWatchdog
void IfxScuWdt_serviceCpuWatchdog(uint16 password)
SCUWDT API to service CPU Watchdog functionality.
Definition: IfxScuWdt.c:601
IfxScuCcu_Ndivider_88
N-divider 88.
Definition: IfxScuCcu.h:450
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxScuCcu_Ndivider_96
N-divider 96.
Definition: IfxScuCcu.h:458
IfxScuWdt_serviceSafetyWatchdog
void IfxScuWdt_serviceSafetyWatchdog(uint16 password)
SCUWDT API to service Safety Watchdog functionality.
Definition: IfxScuWdt.c:607
IfxScuCcu_switchToLowPowerMode
IFX_INLINE void IfxScuCcu_switchToLowPowerMode(IfxScuCcu_LowPowerDivRatio lpDiv)
API to configure the LPDIV value to enter into Low Power mode.
Definition: IfxScuCcu.h:1788
IfxScuWdt_clearSafetyEndinit
void IfxScuWdt_clearSafetyEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:305
IfxScuCcu_Ndivider_124
N-divider 124.
Definition: IfxScuCcu.h:486
IfxScuCcu_Ndivider_128
N-divider 128.
Definition: IfxScuCcu.h:490
IfxCpu_ResourceCpu
IfxCpu_ResourceCpu
List of the available CPU resources.
Definition: IfxCpu_cfg.h:157
IfxScuCcu_PerPllConfig::nDivider
uint8 nDivider
N divider value for basic (initial) step.
Definition: IfxScuCcu.h:549
IfxScuCcu_PllInputClockSelection
IfxScuCcu_PllInputClockSelection
SysPll & Per Pll input clock selection. SYSPLLCON0.B.INSEL.
Definition: IfxScuCcu.h:510
IfxScuCcu_ClockDistributionConfig
Configuration structure type for all the CCUCON registers to configure clock distribution.
Definition: IfxScuCcu.h:615
IfxScuCcu_ModEn
IfxScuCcu_ModEn
modulation enable
Definition: IfxScuCcu.h:531
IfxScuCcu_getEvrFrequency
IFX_INLINE float32 IfxScuCcu_getEvrFrequency(void)
API to get EVR Oscillator frequency. This API returns the constant which is specific to the ScuCcu of...
Definition: IfxScuCcu.h:1585
IfxScuCcu_LowPowerDivRatio_divBy240
Divide by 240.
Definition: IfxScuCcu.h:343
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxScuCcu_RGain_Values::RGainHex
uint16 RGainHex
RGain Hex value.
Definition: IfxScuCcu.h:673
IfxScuCcu_PerPllConfig
Configuration structure type for the Per Pll step. This structure must be used to configure the P...
Definition: IfxScuCcu.h:546
IfxScuCcu_Ndivider_90
N-divider 90.
Definition: IfxScuCcu.h:452
IfxScuCcu_configureCcuInitialStep
IFX_INLINE boolean IfxScuCcu_configureCcuInitialStep(const IfxScuCcu_InitialStepConfig *pllInitStepCfg)
This inline function configures the Ccu SYS PLLs initial step and PER PLL.
Definition: IfxScuCcu.h:1172
IfxScuCcu_Ndivider_76
N-divider 76.
Definition: IfxScuCcu.h:438
IfxScuCcu_Traprequest_smu
safety management unit
Definition: IfxScuCcu.h:524
IfxScuCcu_Traprequest_trap2
trap2
Definition: IfxScuCcu.h:523
IfxScuCcu_Ndivider_60
N-divider 60.
Definition: IfxScuCcu.h:422
IfxScuCcu_Ndivider_59
N-divider 59.
Definition: IfxScuCcu.h:421
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxScuCcu_Ndivider_54
N-divider 54.
Definition: IfxScuCcu.h:416
IfxScuCcu_initConfig
IFX_EXTERN void IfxScuCcu_initConfig(IfxScuCcu_Config *cfg)
Initializes the clock configuration with default values.
Definition: IfxScuCcu.c:594
IfxScuCcu_Ndivider_69
N-divider 69.
Definition: IfxScuCcu.h:431
IfxScuCcu_getMcanhFrequency
IFX_INLINE float32 IfxScuCcu_getMcanhFrequency(void)
API to get MCANH divider frequency. This API returns the based on the divider value in CCUCON registe...
Definition: IfxScuCcu.h:1629
IfxScuCcu_modulation_init
IFX_EXTERN void IfxScuCcu_modulation_init(const IfxScuCcu_Mod_Config *Mod_Cfg)
initialize modulation parameters
Definition: IfxScuCcu.c:600
IfxScuCcu_Pdivider_8
P-divider 8.
Definition: IfxScuCcu.h:504
IfxScuCcu_Ndivider_126
N-divider 126.
Definition: IfxScuCcu.h:488
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxScuCcu_Ndivider_64
N-divider 64.
Definition: IfxScuCcu.h:426
IfxScuCcu_ModulationAmplitude_count
range
Definition: IfxScuCcu.h:356
IfxScuCcu_setBbbFrequency
IFX_EXTERN float32 IfxScuCcu_setBbbFrequency(float32 bbbFreq)
API to set BBB frequency (with Bbb divider) This API configure Bbb divider values in CCUCON registers...
Definition: IfxScuCcu.c:725
IFXSCUCCU_PLL_KRDY_TIMEOUT_COUNT
#define IFXSCUCCU_PLL_KRDY_TIMEOUT_COUNT
~244uS max wait time
Definition: IfxScuCcu.h:231
IfxScuCcu_Ndivider_42
N-divider 42.
Definition: IfxScuCcu.h:404
IfxScuCcu_SysPllConfig
Configuration structure type for the Pll initial step. This structure must be used to configure the P...
Definition: IfxScuCcu.h:560
IfxScuCcu_Ndivider_57
N-divider 57.
Definition: IfxScuCcu.h:419
IfxScuCcu_setAsclinFFrequency
IFX_EXTERN float32 IfxScuCcu_setAsclinFFrequency(float32 asclinFFreq)
API to set ASCLINF frequency (with ASCLINF divider) This API configure ASCLINF divider values in CCUC...
Definition: IfxScuCcu.c:637
IfxScuCcu_Ndivider_49
N-divider 49.
Definition: IfxScuCcu.h:411
IfxScuCcu_getOscFrequency
IFX_INLINE float32 IfxScuCcu_getOscFrequency(void)
API to get Oscillator 0 frequency. This API returns the fOsc0 frequency based on the divider value in...
Definition: IfxScuCcu.h:1641
IfxScuCcu_Ndivider_30
N-divider 30.
Definition: IfxScuCcu.h:392
IfxScuCcu_getCpuFrequency
IFX_EXTERN float32 IfxScuCcu_getCpuFrequency(const IfxCpu_ResourceCpu cpu)
This API returns the Cpu frequency based on the divider value in CCUCON register and fSource frequenc...
Definition: IfxScuCcu.c:196
IFXSCUCCU_LOOP_TIMEOUT_CHECK
#define IFXSCUCCU_LOOP_TIMEOUT_CHECK(tVar, tErr)
Definition: IfxScuCcu.h:237
IfxScuCcu_Ndivider_97
N-divider 97.
Definition: IfxScuCcu.h:459
IfxScuCcu_Ndivider_43
N-divider 43.
Definition: IfxScuCcu.h:405
IfxScu_cfg.h
SCU on-chip implementation data.
IfxScuCcu_ModulationAmplitude_0p5
0.5%
Definition: IfxScuCcu.h:350
IfxScuCcu_getFsi2Frequency
IFX_EXTERN float32 IfxScuCcu_getFsi2Frequency(void)
API to get FSI2 divider frequency in Hz. This API returns the fFSI2 frequency based on the divider va...
Definition: IfxScuCcu.c:230
IfxScuCcu_setFsi2Frequency
IFX_EXTERN float32 IfxScuCcu_setFsi2Frequency(float32 fsi2Freq)
API to set FSI2 frequency (with FSI2 divider) This API configure Fsi2 divider values in CCUCON regist...
Definition: IfxScuCcu.c:819
IfxScuCcu_Ndivider_46
N-divider 46.
Definition: IfxScuCcu.h:408
IFX_CFG_SCU_SYSCLK_FREQUENCY
#define IFX_CFG_SCU_SYSCLK_FREQUENCY
Default External SysClk pin frequency.
Definition: IfxScu_cfg.h:65
IfxScuCcu_Ndivider_115
N-divider 115.
Definition: IfxScuCcu.h:477
IfxScuCcu_pllsParameterConfig::perPllConfig
IfxScuCcu_PerPllConfig perPllConfig
Peripheral PLL Configurations.
Definition: IfxScuCcu.h:594
IfxScuCcu_ClockDistributionConfig::ccucon0
IfxScuCcu_CcuconRegConfig ccucon0
CCUCON0 Register configuration.
Definition: IfxScuCcu.h:617
IfxScuCcu_InitialStepConfig
Configuration structure type for the Pll Initial Step Configuration.
Definition: IfxScuCcu.h:629
IfxScuCcu_Ndivider_84
N-divider 84.
Definition: IfxScuCcu.h:446
IfxScuCcu_Ndivider_70
N-divider 70.
Definition: IfxScuCcu.h:432
IfxScuCcu_Ndivider_36
N-divider 36.
Definition: IfxScuCcu.h:398
IfxScuCcu_PllStepsFunctionHook
void(* IfxScuCcu_PllStepsFunctionHook)(void)
Function pointer type for the hooks.
Definition: IfxScuCcu.h:290
IfxScuCcu_Ndivider_121
N-divider 121.
Definition: IfxScuCcu.h:483
IfxScuCcu_Ndivider_91
N-divider 91.
Definition: IfxScuCcu.h:453
IfxScuCcu_Ndivider_13
N-divider 13.
Definition: IfxScuCcu.h:375
IfxScuCcu_Fsource
IfxScuCcu_Fsource
clock source selection
Definition: IfxScuCcu.h:300
IfxScuCcu_K2divider_7
K2-Divider 7.
Definition: IfxScuCcu.h:317
IFXSCUCCU_LPTONORMAL_WAITTIME
#define IFXSCUCCU_LPTONORMAL_WAITTIME
10 microsecond wait time between steps to jump back to normal mode.
Definition: IfxScuCcu.h:280
IfxScuCcu_Ndivider_61
N-divider 61.
Definition: IfxScuCcu.h:423
IfxScuCcu_getTrapDisableFlag
IFX_INLINE boolean IfxScuCcu_getTrapDisableFlag(IfxCpu_ResourceCpu cpuIndex, IfxScuCcu_Traprequest request)
Get trap disable flag.
Definition: IfxScuCcu.h:1679
IfxScuCcu_getPerPllFrequency1
IFX_EXTERN float32 IfxScuCcu_getPerPllFrequency1(void)
API to get actual PER PLL1 frequency This API returns the PER PLL1 frequency based on the K2 divider ...
Definition: IfxScuCcu.c:361
IfxScuCcu_getModuleFrequency
IFX_EXTERN float32 IfxScuCcu_getModuleFrequency(void)
get source frequency fSOURCE. This API returns the source frequency based on the configurations with ...
Definition: IfxScuCcu.c:306
IfxScuCcu_ClockDistributionConfig::ccucon1
IfxScuCcu_CcuconRegConfig ccucon1
CCUCON1 Register configuration.
Definition: IfxScuCcu.h:618
IfxScuCcu_getSourceFrequency
IFX_EXTERN float32 IfxScuCcu_getSourceFrequency(IfxScuCcu_Fsource fsource)
get source frequency fSOURCE. This API returns the source frequency based on the configurations with ...
Definition: IfxScuCcu.c:436
IfxScuCcu_getGtmFrequency
IFX_INLINE float32 IfxScuCcu_getGtmFrequency(void)
API to get GTMdivider frequency This API returns the based on the divider value in CCUCON register an...
Definition: IfxScuCcu.h:1597
IfxScuCcu_K2divider_5
K2-Divider 5.
Definition: IfxScuCcu.h:315
IfxScuCcu_ModulationAmplitude
IfxScuCcu_ModulationAmplitude
ENUM for MA (%) values.
Definition: IfxScuCcu.h:348
IfxScuCcu_PllThrottleConfig
Definition: IfxScuCcu.h:637
IfxScuCcu_ModulationAmplitude_2p0
2%
Definition: IfxScuCcu.h:354
IfxScuCcu_FlashWaitstateConfig::value
uint32 value
FLASH.FCON Register value to be updated.
Definition: IfxScuCcu.h:605
IfxScuCcu_calRGainParameters
IFX_EXTERN void IfxScuCcu_calRGainParameters(IfxScuCcu_ModulationAmplitude modamp, IfxScuCcu_RGain_Values *RGain_P)
Definition: IfxScuCcu.c:100
IfxScuCcu_LowPowerDivRatio_divBy30
Divide by 30.
Definition: IfxScuCcu.h:340
IfxScuCcu_Config::flashFconWaitStateConfig
IFX_CONST IfxScuCcu_FlashWaitstateConfig * flashFconWaitStateConfig
Configuration of flash waitstate.
Definition: IfxScuCcu.h:662
IfxScuCcu_PllThrottleConfig::pllSteps
IFX_CONST IfxScuCcu_PllStepConfig * pllSteps
Pointer to the array of Pll divider step configuration.
Definition: IfxScuCcu.h:640
IfxScuCcu_setI2cFrequency
IFX_EXTERN float32 IfxScuCcu_setI2cFrequency(float32 i2cFreq)
API to set I2C frequency (with I2C divider) This API configure adas divider values in CCUCON register...
Definition: IfxScuCcu.c:978
IfxScuCcu_Ndivider_63
N-divider 63.
Definition: IfxScuCcu.h:425
IfxScuCcu_Ndivider_1
N-divider 1.
Definition: IfxScuCcu.h:363
IfxScuCcu_CcuconRegConfig::value
uint32 value
CCUCON Register value to be updated.
Definition: IfxScuCcu.h:575
IfxScuCcu_ClockDistributionConfig::ccucon6
IfxScuCcu_CcuconRegConfig ccucon6
CCUCON6 Register configuration.
Definition: IfxScuCcu.h:621
IfxScuCcu_Ndivider_72
N-divider 72.
Definition: IfxScuCcu.h:434
IfxScuCcu_ModEn_enabled
enable modulation
Definition: IfxScuCcu.h:534
IfxScuCcu_FlashWaitstateConfig
Configuration structure type for the Flash waitstate configuration.
Definition: IfxScuCcu.h:603
IfxScuCcu_Ndivider_19
N-divider 19.
Definition: IfxScuCcu.h:381
IfxScuCcu_setSpbFrequency
IFX_EXTERN float32 IfxScuCcu_setSpbFrequency(float32 spbFreq)
API to set SPB frequency (with SPB divider) This API configure SPB divider values in CCUCON registers...
Definition: IfxScuCcu.c:1221
IfxScuCcu_K2divider_6
K2-Divider 6.
Definition: IfxScuCcu.h:316
IfxScuCcu_Ndivider_53
N-divider 53.
Definition: IfxScuCcu.h:415
IfxScuCcu_getMcanFrequency
IFX_EXTERN float32 IfxScuCcu_getMcanFrequency(void)
API to get MCAN divider frequency. This API returns the based on the divider value in CCUCON register...
Definition: IfxScuCcu.c:276
IfxScuCcu_Ndivider_68
N-divider 68.
Definition: IfxScuCcu.h:430
IfxScuCcu_Ndivider_105
N-divider 105.
Definition: IfxScuCcu.h:467
IfxScuCcu_setMscFrequency
IFX_EXTERN float32 IfxScuCcu_setMscFrequency(float32 mscFreq)
API to set MSC frequency (with MSC divider) This API configure MSC divider values in CCUCON registers...
Definition: IfxScuCcu.c:1113
IfxScuCcu_FlashWaitstateConfig::mask
uint32 mask
FLASH.FCON Mask to select the bit fields to be updated.
Definition: IfxScuCcu.h:606
IfxScuCcu_init
IFX_EXTERN boolean IfxScuCcu_init(const IfxScuCcu_Config *config)
API to initialize the SCU Clock Control Unit. This API initialize the Sys PLL with ramp steps...
Definition: IfxScuCcu.c:563
IfxScuCcu_Ndivider_2
N-divider 2.
Definition: IfxScuCcu.h:364
IfxScuCcu_K3divider_4
K3-Divider 4.
Definition: IfxScuCcu.h:328
IfxScuCcu_Pdivider_4
P-divider 4.
Definition: IfxScuCcu.h:500
IfxScuCcu_Ndivider_32
N-divider 32.
Definition: IfxScuCcu.h:394
IfxScuCcu_Ndivider_83
N-divider 83.
Definition: IfxScuCcu.h:445
IfxScuCcu_Ndivider_100
N-divider 100.
Definition: IfxScuCcu.h:462
IfxScuCcu_Ndivider_12
N-divider 12.
Definition: IfxScuCcu.h:374
IfxScuCcu_Fsource_1
fSource1
Definition: IfxScuCcu.h:303
IfxCpu.h
CPU basic functionality.
IfxScuCcu_Ndivider_74
N-divider 74.
Definition: IfxScuCcu.h:436
IfxScuCcu_K2divider_8
K2-Divider 8.
Definition: IfxScuCcu.h:318
IfxScuCcu_setGethFrequency
IFX_EXTERN float32 IfxScuCcu_setGethFrequency(float32 gethFreq)
API to set GETH frequency (with GETH divider) This API configure geth divider values in CCUCON regist...
Definition: IfxScuCcu.c:891
IfxScuCcu_PllInputClockSelection_fSysclk
fOsc1
Definition: IfxScuCcu.h:514
IfxScuCcu_Ndivider_82
N-divider 82.
Definition: IfxScuCcu.h:444
IfxScuCcu_Ndivider_62
N-divider 62.
Definition: IfxScuCcu.h:424
IfxScuCcu_Ndivider_87
N-divider 87.
Definition: IfxScuCcu.h:449
u
uint32 min u
Definition: IfxCpu_IntrinsicsDcc.h:143
IfxScuCcu_getSourceSelection
IFX_INLINE IfxScuCcu_PllInputClockSelection IfxScuCcu_getSourceSelection(void)
Returns the clock source selection.
Definition: IfxScuCcu.h:1667
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxScuCcu_Ndivider_94
N-divider 94.
Definition: IfxScuCcu.h:456
IfxScuCcu_Ndivider_38
N-divider 38.
Definition: IfxScuCcu.h:400
IfxScuWdt_setSafetyEndinit
void IfxScuWdt_setSafetyEndinit(uint16 password)
SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:668
IfxScuCcu_getFsiFrequency
IFX_EXTERN float32 IfxScuCcu_getFsiFrequency(void)
API to get FSI divider frequency in Hz. This API returns the fFSI based on the divider value in CCUCO...
Definition: IfxScuCcu.c:253
IfxScuCcu_Fsource_2
fSource2
Definition: IfxScuCcu.h:304
IfxScuWdt_getSafetyWatchdogPassword
uint16 IfxScuWdt_getSafetyWatchdogPassword(void)
SCUWDT API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.c:393
IfxScuCcu_Ndivider_112
N-divider 112.
Definition: IfxScuCcu.h:474
IfxScuCcu_setMcanhFrequency
IFX_EXTERN float32 IfxScuCcu_setMcanhFrequency(float32 mcanhFreq)
API to set MCANH frequency (with MCANH divider) This API configure mcanh divider values in CCUCON reg...
Definition: IfxScuCcu.c:1072
IfxScuCcu_Ndivider_81
N-divider 81.
Definition: IfxScuCcu.h:443
IfxScuCcu_getOsc0Frequency
IFX_INLINE float32 IfxScuCcu_getOsc0Frequency(void)
API to get Oscillator 0 frequency. This API returns the fOsc0 frequency based on the divider value in...
Definition: IfxScuCcu.h:1635
IfxScuCcu_Ndivider_16
N-divider 16.
Definition: IfxScuCcu.h:378
IfxScuCcu_Ndivider_4
N-divider 4.
Definition: IfxScuCcu.h:366
IfxScuCcu_Ndivider_125
N-divider 125.
Definition: IfxScuCcu.h:487
IFXSCUCCU_PLL_LOCK_TIMEOUT_COUNT
#define IFXSCUCCU_PLL_LOCK_TIMEOUT_COUNT
~122uS max wait time for PLL locking
Definition: IfxScuCcu.h:223
IfxScuCcu_getMscFrequency
IFX_EXTERN float32 IfxScuCcu_getMscFrequency(void)
API to get MSC divider frequency. This API returns the based on the divider value in CCUCON register ...
Definition: IfxScuCcu.c:331
IfxScuCcu_ClockDistributionConfig::ccucon7
IfxScuCcu_CcuconRegConfig ccucon7
CCUCON7 Register configuration.
Definition: IfxScuCcu.h:622
IfxScuCcu_Ndivider_7
N-divider 7.
Definition: IfxScuCcu.h:369
IfxScuCcu_K3divider_3
K3-Divider 3.
Definition: IfxScuCcu.h:327
IfxScuCcu_throttleSysPllClockInline
IFX_INLINE boolean IfxScuCcu_throttleSysPllClockInline(const IfxScuCcu_PllThrottleConfig *pllThrottleConfig)
Definition: IfxScuCcu.h:1713
IfxScuCcu_Ndivider_85
N-divider 85.
Definition: IfxScuCcu.h:447
IFXSCUCCU_CCUCON_LCK_BIT_TIMEOUT_COUNT
#define IFXSCUCCU_CCUCON_LCK_BIT_TIMEOUT_COUNT
~40uS max wait time
Definition: IfxScuCcu.h:218
IfxScuCcu_getI2cFrequency
IFX_INLINE float32 IfxScuCcu_getI2cFrequency(void)
API to get I2C frequency. This API returns the based on the divider value in CCUCON register and fSOU...
Definition: IfxScuCcu.h:1623
IfxScuCcu_Ndivider_114
N-divider 114.
Definition: IfxScuCcu.h:476
IfxScuCcu_setSriFrequency
IFX_EXTERN float32 IfxScuCcu_setSriFrequency(float32 sriFreq)
API to set SRI frequency (with SRI divider) This API configure Sri divider values in CCUCON registers...
Definition: IfxScuCcu.c:1272
IfxScuCcu_Ndivider_78
N-divider 78.
Definition: IfxScuCcu.h:440
IfxScuCcu_PerPllConfig::k2Divider
uint8 k2Divider
K2 divider value.
Definition: IfxScuCcu.h:550
IfxScuCcu_Ndivider_75
N-divider 75.
Definition: IfxScuCcu.h:437
IfxScuCcu_Mod_Config
modulation config
Definition: IfxScuCcu.h:647
IfxScuCcu_Ndivider_48
N-divider 48.
Definition: IfxScuCcu.h:410
IfxScuCcu_Ndivider_40
N-divider 40.
Definition: IfxScuCcu.h:402
IfxScuCcu_Ndivider_37
N-divider 37.
Definition: IfxScuCcu.h:399
IfxScuCcu_Ndivider_55
N-divider 55.
Definition: IfxScuCcu.h:417
IfxScuCcu_pllsParameterConfig::xtalFrequency
uint32 xtalFrequency
Xtal frequency.
Definition: IfxScuCcu.h:591
IfxScuCcu_Ndivider_24
N-divider 24.
Definition: IfxScuCcu.h:386
IfxScuCcu_getBbbFrequency
IFX_EXTERN float32 IfxScuCcu_getBbbFrequency(void)
API to get BBB divider frequency. This API returns the BBBDivider frequency based on the divider valu...
Definition: IfxScuCcu.c:153
IfxScuCcu_Ndivider_9
N-divider 9.
Definition: IfxScuCcu.h:371
IfxScuCcu_Ndivider_89
N-divider 89.
Definition: IfxScuCcu.h:451
IfxScuCcu_Ndivider_14
N-divider 14.
Definition: IfxScuCcu.h:376
IFX_CFG_SCU_XTAL_FREQUENCY
#define IFX_CFG_SCU_XTAL_FREQUENCY
Default External oscillator frequency.
Definition: IfxScu_cfg.h:59
IfxScuCcu_Ndivider_66
N-divider 66.
Definition: IfxScuCcu.h:428
IfxScuCcu_Ndivider_106
N-divider 106.
Definition: IfxScuCcu.h:468
IfxScuCcu_ModulationAmplitude_1p0
1.0%
Definition: IfxScuCcu.h:351
IfxScuCcu_Ndivider_73
N-divider 73.
Definition: IfxScuCcu.h:435
IfxScuCcu_K3divider_2
K3-Divider 2.
Definition: IfxScuCcu.h:326
IfxScuCcu_Ndivider_98
N-divider 98.
Definition: IfxScuCcu.h:460
IfxScuCcu_Ndivider_122
N-divider 122.
Definition: IfxScuCcu.h:484
IfxScuCcu_Ndivider_71
N-divider 71.
Definition: IfxScuCcu.h:433
IfxScuCcu_PllInputClockSelection_fOsc1
Backup clock select.
Definition: IfxScuCcu.h:512
IfxScuCcu_Ndivider_22
N-divider 22.
Definition: IfxScuCcu.h:384
IfxScuCcu_Ndivider_8
N-divider 8.
Definition: IfxScuCcu.h:370
IfxScuCcu_Ndivider_34
N-divider 34.
Definition: IfxScuCcu.h:396
IFXSCUCCU_OSCCON_PLLLV_OR_HV_TIMEOUT_COUNT
#define IFXSCUCCU_OSCCON_PLLLV_OR_HV_TIMEOUT_COUNT
3mS max wait time for PLL power down/up state update
Definition: IfxScuCcu.h:235
IfxScuCcu_Ndivider_51
N-divider 51.
Definition: IfxScuCcu.h:413
IfxScuCcu_Ndivider_92
N-divider 92.
Definition: IfxScuCcu.h:454
IfxScuCcu_Ndivider_67
N-divider 67.
Definition: IfxScuCcu.h:429
IfxScuCcu_Ndivider_127
N-divider 127.
Definition: IfxScuCcu.h:489
IfxScuCcu_RGain_Values
structure holding the RGain parameters for modulation
Definition: IfxScuCcu.h:670
IfxScuCcu_getTrapStatusFlag
IFX_INLINE boolean IfxScuCcu_getTrapStatusFlag(IfxScuCcu_Traprequest request)
Get the trap status.
Definition: IfxScuCcu.h:1688
IfxScuCcu_Ndivider_110
N-divider 110.
Definition: IfxScuCcu.h:472
IfxScuCcu_PerPllConfig::k3Divider
uint8 k3Divider
K3 divider value.
Definition: IfxScuCcu.h:551
IfxScuCcu_Ndivider_118
N-divider 118.
Definition: IfxScuCcu.h:480
IfxScuCcu_getQspiFrequency
IFX_EXTERN float32 IfxScuCcu_getQspiFrequency(void)
API to get Qspi divider frequency. This API returns the based on the divider value in CCUCON register...
Definition: IfxScuCcu.c:406
IfxScuCcu_pllsParameterConfig::pllInputClockSelection
IfxScuCcu_PllInputClockSelection pllInputClockSelection
Pll input clock selection.
Definition: IfxScuCcu.h:592
IfxScuCcu_Pdivider
IfxScuCcu_Pdivider
MODULE_SCU.PLLCON0.B.PDIV, specifies the P-Divider.
Definition: IfxScuCcu.h:495
IfxScuCcu_Pdivider_5
P-divider 5.
Definition: IfxScuCcu.h:501
IfxScuCcu_PerPllConfig::pDivider
uint8 pDivider
P divider value for basic (initial) step.
Definition: IfxScuCcu.h:548
IfxScuCcu_pllsParameterConfig::sysPllConfig
IfxScuCcu_SysPllConfig sysPllConfig
System PLL Configurations.
Definition: IfxScuCcu.h:593
IfxScuCcu_switchToBackupClock
IFX_EXTERN void IfxScuCcu_switchToBackupClock(const IfxScuCcu_Config *cfg)
API to switch to Backup clock from the current PLL frequency.
Definition: IfxScuCcu.c:1354
IfxScuCcu_Ndivider_17
N-divider 17.
Definition: IfxScuCcu.h:379
IfxScuCcu_Traprequest_esr1
external service request 1
Definition: IfxScuCcu.h:522
IfxScuCcu_K2divider_3
K2-Divider 3.
Definition: IfxScuCcu.h:313
IfxScuCcu_Ndivider_95
N-divider 95.
Definition: IfxScuCcu.h:457
IfxScuCcu_CcuconRegConfig
Configuration structure type for CCUCON registers.
Definition: IfxScuCcu.h:573
IfxScuCcu_Ndivider_35
N-divider 35.
Definition: IfxScuCcu.h:397
IfxScuCcu_ClockDistributionConfig::ccucon8
IfxScuCcu_CcuconRegConfig ccucon8
CCUCON8 Register configuration.
Definition: IfxScuCcu.h:623
IfxScuCcu_Ndivider_80
N-divider 80.
Definition: IfxScuCcu.h:442
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxScuCcu_Ndivider_79
N-divider 79.
Definition: IfxScuCcu.h:441
IfxScuCcu_Pdivider_1
P-divider 1.
Definition: IfxScuCcu.h:497
IfxScuCcu_ModEn_disabled
disable modulation
Definition: IfxScuCcu.h:533
IfxScuCcu_getSriFrequency
IFX_EXTERN float32 IfxScuCcu_getSriFrequency(void)
API to get SRI divider frequency. This API returns the Sri frequency based on the divider values in C...
Definition: IfxScuCcu.c:522
IfxScuCcu_Config::pllInitialStepConfig
IfxScuCcu_InitialStepConfig pllInitialStepConfig
Configuration of first step which is same as internal osc frequency.
Definition: IfxScuCcu.h:659
IfxScuCcu_Ndivider
IfxScuCcu_Ndivider
MODULE_SCU.PLLCON0.B.NDIV, specifies the N-Divider.
Definition: IfxScuCcu.h:361
IfxScuCcu_Ndivider_111
N-divider 111.
Definition: IfxScuCcu.h:473
IfxScuCcu_Pdivider_2
P-divider 2.
Definition: IfxScuCcu.h:498
IfxScuCcu_Ndivider_99
N-divider 99.
Definition: IfxScuCcu.h:461
IfxScuCcu_LowPowerDivRatio
IfxScuCcu_LowPowerDivRatio
Low Power Division Ratios. Corresponds to values of LPDIV in CCUCON0.
Definition: IfxScuCcu.h:338
IfxScuCcu_Pdivider_3
P-divider 3.
Definition: IfxScuCcu.h:499
IfxScuCcu_Ndivider_3
N-divider 3.
Definition: IfxScuCcu.h:365
IfxScuCcu_Ndivider_25
N-divider 25.
Definition: IfxScuCcu.h:387
IfxScuCcu_PllStepConfig
Configuration structure type for the Pll Steps for current jump control.
Definition: IfxScuCcu.h:581
IfxScuCcu_Ndivider_103
N-divider 103.
Definition: IfxScuCcu.h:465
IfxScuCcu_Mod_Config::Mod_Enable
IfxScuCcu_ModEn Mod_Enable
modulation enable
Definition: IfxScuCcu.h:649
IfxScuCcu_ClockDistributionConfig::ccucon5
IfxScuCcu_CcuconRegConfig ccucon5
CCUCON5 Register configuration.
Definition: IfxScuCcu.h:620
IfxScuCcu_Pdivider_7
P-divider 7.
Definition: IfxScuCcu.h:503
IfxScuCcu_Pdivider_6
P-divider 6.
Definition: IfxScuCcu.h:502
IfxScuCcu_getGethFrequency
IFX_INLINE float32 IfxScuCcu_getGethFrequency(void)
API to get GETH divider frequency. This API returns the based on the divider value in CCUCON register...
Definition: IfxScuCcu.h:1591
IfxScuCcu_Ndivider_20
N-divider 20.
Definition: IfxScuCcu.h:382


iLLD_TC38A: IfxScuEru.c Source File

  • Scu
  • Std
IfxScuEru.c
Go to the documentation of this file.
1 /**
2 * \file IfxScuEru.c
3 * \brief SCU basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 *
41 */
42
43 /******************************************************************************/
44 /*----------------------------------Includes----------------------------------*/
45 /******************************************************************************/
46
47 #include "IfxScuEru.h"
48
49 /******************************************************************************/
50 /*----------------------------------Macros------------------------------------*/
51 /******************************************************************************/
52
53 #define IFXSCUERU_CHANNEL_NUMBER_ODD 1
54
55 #define IFXSCUERU_TO_REGISTER_BASE 1
56
57 /******************************************************************************/
58 /*-------------------------Function Implementations---------------------------*/
59 /******************************************************************************/
60
61 void IfxScuEru_clearAllEventFlags(void)
62 {
63 uint32 mask = (0xFF << 16);
64 MODULE_SCU.FMR.U = mask;
65 }
66
67
68 void IfxScuEru_clearEventFlag(IfxScuEru_InputChannel inputChannel)
69 {
70 uint32 mask = 1 << (inputChannel + 16);
71 SCU_FMR.U = mask;
72 }
73
74
75 void IfxScuEru_clearInputChannelConfiguration(IfxScuEru_InputChannel inputChannel)
76 {
77 // select appropriate EICRi register for the given input channel X ( i = 0,1,2,3 and X = 0 to 7 )
78 uint32 index = (inputChannel >> IFXSCUERU_TO_REGISTER_BASE);
79 uint32 mask = 0xFFFF;
80 uint16 password = IfxScuWdt_getSafetyWatchdogPasswordInline();
81 IfxScuWdt_clearSafetyEndinitInline(password);
82
83 if (inputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
84 {
85 MODULE_SCU.EICR[index].U = (MODULE_SCU.EICR[index].U & mask);
86 }
87 else // for channels 0, 2, 4 and 6
88 {
89 mask = (mask << 16);
90 MODULE_SCU.EICR[index].U = (MODULE_SCU.EICR[index].U & mask);
91 }
92
93 IfxScuWdt_setSafetyEndinitInline(password);
94 }
95
96
97 void IfxScuEru_clearOutputChannelConfiguration(IfxScuEru_OutputChannel outputChannel)
98 {
99 // select appropriate IGCRj register for the given output channel Y ( j = 0,1,2,3 and Y = 0 to 7 )
100 uint32 index = (outputChannel >> IFXSCUERU_TO_REGISTER_BASE);
101 uint32 mask = 0xFFFF;
102 uint16 password = IfxScuWdt_getSafetyWatchdogPasswordInline();
103 IfxScuWdt_clearSafetyEndinitInline(password);
104
105 if (outputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
106 {
107 MODULE_SCU.IGCR[index].U = (MODULE_SCU.IGCR[index].U & mask);
108 }
109 else // for channels 0, 2, 4 and 6
110 {
111 mask = (mask << 16);
112 MODULE_SCU.IGCR[index].U = (MODULE_SCU.IGCR[index].U & mask);
113 }
114
115 IfxScuWdt_setSafetyEndinitInline(password);
116 }
117
118
119 void IfxScuEru_connectTrigger(IfxScuEru_InputChannel inputChannel, IfxScuEru_InputNodePointer triggerSelect)
120 {
121 // select appropriate EICRi register for the given input channel X ( i = 0,1,2,3 and X = 0 to 7 )
122 uint32 index = (inputChannel >> IFXSCUERU_TO_REGISTER_BASE);
123 uint16 password = IfxScuWdt_getSafetyWatchdogPasswordInline();
124 IfxScuWdt_clearSafetyEndinitInline(password);
125
126 if (inputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
127 {
128 MODULE_SCU.EICR[index].B.INP1 = triggerSelect;
129 }
130 else // for channels 0, 2, 4 and 6
131 {
132 MODULE_SCU.EICR[index].B.INP0 = triggerSelect;
133 }
134
135 IfxScuWdt_setSafetyEndinitInline(password);
136 }
137
138
139 void IfxScuEru_disableAutoClear(IfxScuEru_InputChannel inputChannel)
140 {
141 // select appropriate EICRi register for the given input channel X ( i = 0,1,2,3 and X = 0 to 7 )
142 uint32 index = (inputChannel >> IFXSCUERU_TO_REGISTER_BASE);
143 uint16 password = IfxScuWdt_getSafetyWatchdogPasswordInline();
144 IfxScuWdt_clearSafetyEndinitInline(password);
145
146 if (inputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
147 {
148 MODULE_SCU.EICR[index].B.LDEN1 = FALSE;
149 }
150 else // for channels 0, 2, 4 and 6
151 {
152 MODULE_SCU.EICR[index].B.LDEN0 = FALSE;
153 }
154
155 IfxScuWdt_setSafetyEndinitInline(password);
156 }
157
158
159 void IfxScuEru_disableFallingEdgeDetection(IfxScuEru_InputChannel inputChannel)
160 {
161 // select appropriate EICRi register for the given input channel X ( i = 0,1,2,3 and X = 0 to 7 )
162 uint32 index = (inputChannel >> IFXSCUERU_TO_REGISTER_BASE);
163 uint16 password = IfxScuWdt_getSafetyWatchdogPasswordInline();
164 IfxScuWdt_clearSafetyEndinitInline(password);
165
166 if (inputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
167 {
168 MODULE_SCU.EICR[index].B.FEN1 = FALSE;
169 }
170 else // for channels 0, 2, 4 and 6
171 {
172 MODULE_SCU.EICR[index].B.FEN0 = FALSE;
173 }
174
175 IfxScuWdt_setSafetyEndinitInline(password);
176 }
177
178
179 void IfxScuEru_disablePatternDetectionTrigger(IfxScuEru_OutputChannel outputChannel)
180 {
181 // select appropriate IGCRj register for the given output channel Y ( j = 0,1,2,3 and Y = 0 to 7 )
182 uint32 index = (outputChannel >> IFXSCUERU_TO_REGISTER_BASE);
183 uint16 password = IfxScuWdt_getSafetyWatchdogPasswordInline();
184 IfxScuWdt_clearSafetyEndinitInline(password);
185
186 if (outputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
187 {
188 MODULE_SCU.IGCR[index].B.GEEN1 = FALSE;
189 }
190 else // for channels 0, 2, 4 and 6
191 {
192 MODULE_SCU.IGCR[index].B.GEEN0 = FALSE;
193 }
194
195 IfxScuWdt_setSafetyEndinitInline(password);
196 }
197
198
199 void IfxScuEru_disableRisingEdgeDetection(IfxScuEru_InputChannel inputChannel)
200 {
201 // select appropriate EICRi register for the given input channel X ( i = 0,1,2,3 and X = 0 to 7 )
202 uint32 index = (inputChannel >> IFXSCUERU_TO_REGISTER_BASE);
203 uint16 password = IfxScuWdt_getSafetyWatchdogPasswordInline();
204 IfxScuWdt_clearSafetyEndinitInline(password);
205
206 if (inputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
207 {
208 MODULE_SCU.EICR[index].B.REN1 = FALSE;
209 }
210 else // for channels 0, 2, 4 and 6
211 {
212 MODULE_SCU.EICR[index].B.REN0 = FALSE;
213 }
214
215 IfxScuWdt_setSafetyEndinitInline(password);
216 }
217
218
219 void IfxScuEru_disableTriggerPulse(IfxScuEru_InputChannel inputChannel)
220 {
221 // select appropriate EICRi register for the given input channel X ( i = 0,1,2,3 and X = 0 to 7 )
222 uint32 index = (inputChannel >> IFXSCUERU_TO_REGISTER_BASE);
223 uint16 password = IfxScuWdt_getSafetyWatchdogPasswordInline();
224 IfxScuWdt_clearSafetyEndinitInline(password);
225
226 if (inputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
227 {
228 MODULE_SCU.EICR[index].B.EIEN1 = FALSE;
229 }
230 else // for channels 0, 2, 4 and 6
231 {
232 MODULE_SCU.EICR[index].B.EIEN0 = FALSE;
233 }
234
235 IfxScuWdt_setSafetyEndinitInline(password);
236 }
237
238
239 void IfxScuEru_enableAutoClear(IfxScuEru_InputChannel inputChannel)
240 {
241 // select appropriate EICRi register for the given input channel X ( i = 0,1,2,3 and X = 0 to 7 )
242 uint32 index = (inputChannel >> IFXSCUERU_TO_REGISTER_BASE);
243 uint16 password = IfxScuWdt_getSafetyWatchdogPasswordInline();
244 IfxScuWdt_clearSafetyEndinitInline(password);
245
246 if (inputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
247 {
248 MODULE_SCU.EICR[index].B.LDEN1 = TRUE;
249 }
250 else // for channels 0, 2, 4 and 6
251 {
252 MODULE_SCU.EICR[index].B.LDEN0 = TRUE;
253 }
254
255 IfxScuWdt_setSafetyEndinitInline(password);
256 }
257
258
259 void IfxScuEru_enableFallingEdgeDetection(IfxScuEru_InputChannel inputChannel)
260 {
261 // select appropriate EICRi register for the given input channel X ( i = 0,1,2,3 and X = 0 to 7 )
262 uint32 index = (inputChannel >> IFXSCUERU_TO_REGISTER_BASE);
263 uint16 password = IfxScuWdt_getSafetyWatchdogPasswordInline();
264 IfxScuWdt_clearSafetyEndinitInline(password);
265
266 if (inputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
267 {
268 MODULE_SCU.EICR[index].B.FEN1 = TRUE;
269 }
270 else // for channels 0, 2, 4 and 6
271 {
272 MODULE_SCU.EICR[index].B.FEN0 = TRUE;
273 }
274
275 IfxScuWdt_setSafetyEndinitInline(password);
276 }
277
278
279 void IfxScuEru_enablePatternDetectionTrigger(IfxScuEru_OutputChannel outputChannel)
280 {
281 // select appropriate IGCRj register for the given output channel Y ( j = 0,1,2,3 and Y = 0 to 7 )
282 uint32 index = (outputChannel >> IFXSCUERU_TO_REGISTER_BASE);
283 uint16 password = IfxScuWdt_getSafetyWatchdogPasswordInline();
284 IfxScuWdt_clearSafetyEndinitInline(password);
285
286 if (outputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
287 {
288 MODULE_SCU.IGCR[index].B.GEEN1 = TRUE;
289 }
290 else // for channels 0, 2, 4 and 6
291 {
292 MODULE_SCU.IGCR[index].B.GEEN0 = TRUE;
293 }
294
295 IfxScuWdt_setSafetyEndinitInline(password);
296 }
297
298
299 void IfxScuEru_enableRisingEdgeDetection(IfxScuEru_InputChannel inputChannel)
300 {
301 // select appropriate EICRi register for the given input channel X ( i = 0,1,2,3 and X = 0 to 7 )
302 uint32 index = (inputChannel >> IFXSCUERU_TO_REGISTER_BASE);
303 uint16 password = IfxScuWdt_getSafetyWatchdogPasswordInline();
304 IfxScuWdt_clearSafetyEndinitInline(password);
305
306 if (inputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
307 {
308 MODULE_SCU.EICR[index].B.REN1 = TRUE;
309 }
310 else // for channels 0, 2, 4 and 6
311 {
312 MODULE_SCU.EICR[index].B.REN0 = TRUE;
313 }
314
315 IfxScuWdt_setSafetyEndinitInline(password);
316 }
317
318
319 void IfxScuEru_enableTriggerPulse(IfxScuEru_InputChannel inputChannel)
320 {
321 // select appropriate EICRi register for the given input channel X ( i = 0,1,2,3 and X = 0 to 7 )
322 uint32 index = (inputChannel >> IFXSCUERU_TO_REGISTER_BASE);
323 uint16 password = IfxScuWdt_getSafetyWatchdogPasswordInline();
324 IfxScuWdt_clearSafetyEndinitInline(password);
325
326 if (inputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
327 {
328 MODULE_SCU.EICR[index].B.EIEN1 = TRUE;
329 }
330 else // for channels 0, 2, 4 and 6
331 {
332 MODULE_SCU.EICR[index].B.EIEN0 = TRUE;
333 }
334
335 IfxScuWdt_setSafetyEndinitInline(password);
336 }
337
338
339 uint32 IfxScuEru_getAllEventFlagsStatus(void)
340 {
341 return MODULE_SCU.EIFR.U;
342 }
343
344
345 boolean IfxScuEru_getEventFlagStatus(IfxScuEru_InputChannel inputChannel)
346 {
347 uint32 mask = (1U << inputChannel);
348 return (MODULE_SCU.EIFR.U & mask) ? TRUE : FALSE;
349 }
350
351
352 uint32 IfxScuEru_getInputChannelConfiguration(IfxScuEru_InputChannel inputChannel)
353 {
354 // select appropriate EICRi register for the given input channel X ( i = 0,1,2,3 and X = 0 to 7 )
355 uint32 index = (inputChannel >> IFXSCUERU_TO_REGISTER_BASE);
356 uint32 status, mask = 0xFFFF;
357
358 if (inputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
359 {
360 mask = (mask << 16);
361 status = (MODULE_SCU.EICR[index].U & mask);
362 }
363 else // for channels 0, 2, 4 and 6
364 {
365 status = (MODULE_SCU.EICR[index].U & mask);
366 }
367
368 return status;
369 }
370
371
372 uint32 IfxScuEru_getOutputChannelConfiguration(IfxScuEru_OutputChannel outputChannel)
373 {
374 // select appropriate IGCRj register for the given output channel Y ( j = 0,1,2,3 and Y = 0 to 7 )
375 uint32 index = (outputChannel >> IFXSCUERU_TO_REGISTER_BASE);
376 uint32 status, mask = 0xFFFF;
377
378 if (outputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
379 {
380 mask = (mask << 16);
381 status = (MODULE_SCU.IGCR[index].U & mask);
382 }
383 else // for channels 0, 2, 4 and 6
384 {
385 status = (MODULE_SCU.IGCR[index].U & mask);
386 }
387
388 return status;
389 }
390
391
392 boolean IfxScuEru_getPatternDetectionResult(IfxScuEru_OutputChannel outputChannel)
393 {
394 uint32 mask = (1U << outputChannel);
395 return (MODULE_SCU.PDRR.U & mask) ? TRUE : FALSE;
396 }
397
398
399 uint32 IfxScuEru_getWholePatternDetectionResult(void)
400 {
401 return MODULE_SCU.PDRR.U;
402 }
403
404
405 void IfxScuEru_selectExternalInput(IfxScuEru_InputChannel inputChannel, IfxScuEru_ExternalInputSelection inputSignal)
406 {
407 // select appropriate EICRi register for the given input channel X ( i = 0,1,2,3 and X = 0 to 7 )
408 uint32 index = (inputChannel >> IFXSCUERU_TO_REGISTER_BASE);
409 uint16 password = IfxScuWdt_getSafetyWatchdogPasswordInline();
410 IfxScuWdt_clearSafetyEndinitInline(password);
411
412 if (inputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
413 {
414 MODULE_SCU.EICR[index].B.EXIS1 = inputSignal;
415 }
416 else // for channels 0, 2, 4 and 6
417 {
418 MODULE_SCU.EICR[index].B.EXIS0 = inputSignal;
419 }
420
421 IfxScuWdt_setSafetyEndinitInline(password);
422 }
423
424
425 void IfxScuEru_setEventFlag(IfxScuEru_InputChannel inputChannel)
426 {
427 uint32 mask = 1 << inputChannel;
428 SCU_FMR.U = mask;
429 }
430
431
432 void IfxScuEru_setFlagPatternDetection(IfxScuEru_OutputChannel outputChannel, IfxScuEru_InputChannel inputChannel, boolean state)
433 {
434 uint32 shift, mask;
435 uint16 password = IfxScuWdt_getSafetyWatchdogPasswordInline();
436 IfxScuWdt_clearSafetyEndinitInline(password);
437
438 if (outputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
439 {
440 shift = (inputChannel + 16); // offset at location IPEN10
441 mask = (1 << shift);
442 // select appropriate IGCRj register for the given output channel Y ( j = 0,1,2,3 and Y = 0 to 7 )
443 uint32 index = (outputChannel >> IFXSCUERU_TO_REGISTER_BASE);
444 MODULE_SCU.IGCR[index].U = (MODULE_SCU.IGCR[index].U & ~mask) | ((uint32)state << shift);
445 }
446 else // for channels 0, 2, 4 and 6
447 {
448 shift = inputChannel;
449 mask = (1 << shift);
450 // select appropriate IGCRj register for the given output channel Y ( j = 0,1,2,3 and Y = 0 to 7 )
451 uint32 index = (outputChannel >> IFXSCUERU_TO_REGISTER_BASE);
452 MODULE_SCU.IGCR[index].U = (MODULE_SCU.IGCR[index].U & ~mask) | ((uint32)state << shift);
453 }
454
455 IfxScuWdt_setSafetyEndinitInline(password);
456 }
457
458
459 void IfxScuEru_setInterruptGatingPattern(IfxScuEru_OutputChannel outputChannel, IfxScuEru_InterruptGatingPattern gatingPattern)
460 {
461 // select appropriate IGCRj register for the given output channel Y ( j = 0,1,2,3 and Y = 0 to 7 )
462 uint32 index = (outputChannel >> IFXSCUERU_TO_REGISTER_BASE);
463 uint16 password = IfxScuWdt_getSafetyWatchdogPasswordInline();
464 IfxScuWdt_clearSafetyEndinitInline(password);
465
466 if (outputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
467 {
468 MODULE_SCU.IGCR[index].B.IGP1 = gatingPattern;
469 }
470 else // for channels 0, 2, 4 and 6
471 {
472 MODULE_SCU.IGCR[index].B.IGP0 = gatingPattern;
473 }
474
475 IfxScuWdt_setSafetyEndinitInline(password);
476 }
IfxScuWdt_setSafetyEndinitInline
IFX_INLINE void IfxScuWdt_setSafetyEndinitInline(uint16 password)
SCUWDT Inline API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.h:689
IfxScuWdt_getSafetyWatchdogPasswordInline
IFX_INLINE uint16 IfxScuWdt_getSafetyWatchdogPasswordInline(void)
SCUWDT Inline API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.h:641
IfxScuEru_disableTriggerPulse
void IfxScuEru_disableTriggerPulse(IfxScuEru_InputChannel inputChannel)
Disables the generation of a trigger event for input channel x when the selected edge is detected...
Definition: IfxScuEru.c:219
IfxScuEru_enableTriggerPulse
void IfxScuEru_enableTriggerPulse(IfxScuEru_InputChannel inputChannel)
Enables the generation of a trigger event for input channel x when the selected edge is detected...
Definition: IfxScuEru.c:319
IfxScuEru_ExternalInputSelection
IfxScuEru_ExternalInputSelection
Input line selection for input channel Definition in Ifx_SCU.EICR[i].B.EXIS(j) (i = 0...
Definition: IfxScuEru.h:82
IfxScuEru_disableFallingEdgeDetection
void IfxScuEru_disableFallingEdgeDetection(IfxScuEru_InputChannel inputChannel)
Disables the falling edge of input channel to set the bit INTF x.
Definition: IfxScuEru.c:159
IfxScuEru_getWholePatternDetectionResult
uint32 IfxScuEru_getWholePatternDetectionResult(void)
Returns the whole pattern detection result of all the selcted output channels.
Definition: IfxScuEru.c:399
IfxScuWdt_clearSafetyEndinitInline
IFX_INLINE void IfxScuWdt_clearSafetyEndinitInline(uint16 password)
SCUWDT Inline API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.h:581
IfxScuEru_clearOutputChannelConfiguration
void IfxScuEru_clearOutputChannelConfiguration(IfxScuEru_OutputChannel outputChannel)
Clears all the configuration for the given input channel y.
Definition: IfxScuEru.c:97
IfxScuEru_enablePatternDetectionTrigger
void IfxScuEru_enablePatternDetectionTrigger(IfxScuEru_OutputChannel outputChannel)
Enables the generation of a trigger event for output channel y when the result of the pattern detecti...
Definition: IfxScuEru.c:279
IfxScuEru_clearInputChannelConfiguration
void IfxScuEru_clearInputChannelConfiguration(IfxScuEru_InputChannel inputChannel)
Clears all the configuration for the given input channel x.
Definition: IfxScuEru.c:75
IfxScuEru_setEventFlag
void IfxScuEru_setEventFlag(IfxScuEru_InputChannel inputChannel)
Sets the external event flag of input channel x (INTFx)
Definition: IfxScuEru.c:425
IfxScuEru_InputNodePointer
IfxScuEru_InputNodePointer
Determines the destination (output channel) for trigger event (if enabled by Ifx_SCU.EICR[i].B.EIEN(j)). Definition in Ifx_SCU.EICR[i].B.INP(j) (i = 0,1,2,3 and j = 0,1)
Definition: IfxScuEru.h:180
IfxScuEru_disablePatternDetectionTrigger
void IfxScuEru_disablePatternDetectionTrigger(IfxScuEru_OutputChannel outputChannel)
Disables the generation of a trigger event for output channel y when the result of the pattern detect...
Definition: IfxScuEru.c:179
IfxScuEru_getOutputChannelConfiguration
uint32 IfxScuEru_getOutputChannelConfiguration(IfxScuEru_OutputChannel outputChannel)
Clears all the configuration for the given input channel y.
Definition: IfxScuEru.c:372
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxScuEru_clearAllEventFlags
void IfxScuEru_clearAllEventFlags(void)
Clears the external event flag of input channel x (INTFx)
Definition: IfxScuEru.c:61
IfxScuEru_setInterruptGatingPattern
void IfxScuEru_setInterruptGatingPattern(IfxScuEru_OutputChannel outputChannel, IfxScuEru_InterruptGatingPattern gatingPattern)
Sets the gating pattern of a ouput channel y to determine how the pattern detection influences the ou...
Definition: IfxScuEru.c:459
IfxScuEru.h
SCU basic functionality.
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxScuEru_connectTrigger
void IfxScuEru_connectTrigger(IfxScuEru_InputChannel inputChannel, IfxScuEru_InputNodePointer triggerSelect)
Determines the destination (output channel) for trigger event (if enabled by Ifx_SCU.EICR[i].B.EIEN(j), i = 0,1,2,3 and j = 0,1).
Definition: IfxScuEru.c:119
IfxScuEru_OutputChannel
IfxScuEru_OutputChannel
Output channel for combination of events, definition of their effects and distribution to the system ...
Definition: IfxScuEru.h:205
IfxScuEru_InterruptGatingPattern
IfxScuEru_InterruptGatingPattern
Determines the pattern detection influence on the ouput lines ERU_GOUTy and ERU_IOUTy Definition in I...
Definition: IfxScuEru.h:195
IfxScuEru_getEventFlagStatus
boolean IfxScuEru_getEventFlagStatus(IfxScuEru_InputChannel inputChannel)
Returns the status of the external event flag of input channel x (INTFx)
Definition: IfxScuEru.c:345
IfxScuEru_setFlagPatternDetection
void IfxScuEru_setFlagPatternDetection(IfxScuEru_OutputChannel outputChannel, IfxScuEru_InputChannel inputChannel, boolean state)
Enables the flag INTFx to take part in the pattern detection for output gating.
Definition: IfxScuEru.c:432
IfxScuEru_disableRisingEdgeDetection
void IfxScuEru_disableRisingEdgeDetection(IfxScuEru_InputChannel inputChannel)
Disables the rising edge of input channel to set the bit INTF x.
Definition: IfxScuEru.c:199
IfxScuEru_getPatternDetectionResult
boolean IfxScuEru_getPatternDetectionResult(IfxScuEru_OutputChannel outputChannel)
Returns the status of the pattern detection result of output channel y (PDRy)
Definition: IfxScuEru.c:392
IFXSCUERU_TO_REGISTER_BASE
#define IFXSCUERU_TO_REGISTER_BASE
Definition: IfxScuEru.c:55
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxScuEru_getInputChannelConfiguration
uint32 IfxScuEru_getInputChannelConfiguration(IfxScuEru_InputChannel inputChannel)
Returns all the configuration for the given input channel x.
Definition: IfxScuEru.c:352
IfxScuEru_InputChannel
IfxScuEru_InputChannel
Input channel for input selection and conditioning of trigger or gating functions.
Definition: IfxScuEru.h:94
IfxScuEru_disableAutoClear
void IfxScuEru_disableAutoClear(IfxScuEru_InputChannel inputChannel)
Disables the automatic clearing of INTFx when the edge of input channel which has not been selected...
Definition: IfxScuEru.c:139
IFXSCUERU_CHANNEL_NUMBER_ODD
#define IFXSCUERU_CHANNEL_NUMBER_ODD
Definition: IfxScuEru.c:53
IfxScuEru_selectExternalInput
void IfxScuEru_selectExternalInput(IfxScuEru_InputChannel inputChannel, IfxScuEru_ExternalInputSelection inputSignal)
Determines which input line is selcted for input channel x.
Definition: IfxScuEru.c:405
IfxScuEru_enableFallingEdgeDetection
void IfxScuEru_enableFallingEdgeDetection(IfxScuEru_InputChannel inputChannel)
Enables the falling edge of input channel to set the bit INTF x.
Definition: IfxScuEru.c:259
IfxScuEru_clearEventFlag
void IfxScuEru_clearEventFlag(IfxScuEru_InputChannel inputChannel)
Clears the external event flag of input channel x (INTFx)
Definition: IfxScuEru.c:68
IfxScuEru_enableRisingEdgeDetection
void IfxScuEru_enableRisingEdgeDetection(IfxScuEru_InputChannel inputChannel)
Enables the rising edge of input channel to set the bit INTF x.
Definition: IfxScuEru.c:299
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxScuEru_enableAutoClear
void IfxScuEru_enableAutoClear(IfxScuEru_InputChannel inputChannel)
Enables the automatic clearing of INTFx when the edge of input channel which has not been selected...
Definition: IfxScuEru.c:239
IfxScuEru_getAllEventFlagsStatus
uint32 IfxScuEru_getAllEventFlagsStatus(void)
Returns the status of the flags of all input channels.
Definition: IfxScuEru.c:339


iLLD_TC38A: IfxScuEru.h Source File

  • Scu
  • Std
IfxScuEru.h
Go to the documentation of this file.
1 /**
2 * \file IfxScuEru.h
3 * \brief SCU basic functionality
4 * \ingroup IfxLld_Scu
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 * \defgroup IfxLld_Scu_Std_Eru Eru Basic Functionality
43 * \ingroup IfxLld_Scu_Std
44 * \defgroup IfxLld_Scu_Std_Eru_Enum ERU: Enumerations
45 * \ingroup IfxLld_Scu_Std_Eru
46 * \defgroup IfxLld_Scu_Std_Eru_External_Request_Selection ERU: External Request Selection
47 * \ingroup IfxLld_Scu_Std_Eru
48 * \defgroup IfxLld_Scu_Std_Eru_Event_Trigger_Logic ERU: Event Trigger Logic
49 * \ingroup IfxLld_Scu_Std_Eru
50 * \defgroup IfxLld_Scu_Std_Eru_Connecting_Matrix ERU: Connecting Matrix
51 * \ingroup IfxLld_Scu_Std_Eru
52 * \defgroup IfxLld_Scu_Std_Eru_Output_Gating_Unit ERU: Output Gating Unit
53 * \ingroup IfxLld_Scu_Std_Eru
54 * \defgroup IfxLld_Scu_Std_Eru_Data_Structures ERU: Data Structures
55 * \ingroup IfxLld_Scu_Std_Eru
56 * \defgroup IfxLld_Scu_Std_Eru_Input_Filtering ERU: Input Filtering
57 * \ingroup IfxLld_Scu_Std_Eru
58 */
59
60 #ifndef IFXSCUERU_H
61 #define IFXSCUERU_H 1
62
63 /******************************************************************************/
64 /*----------------------------------Includes----------------------------------*/
65 /******************************************************************************/
66
67 #include "_Impl/IfxScu_cfg.h"
68 #include "IfxScu_reg.h"
69 #include "Cpu/Std/IfxCpu.h"
70 #include "_PinMap/IfxScu_PinMap.h"
71 #include "Scu/Std/IfxScuWdt.h"
72
73 /******************************************************************************/
74 /*--------------------------------Enumerations--------------------------------*/
75 /******************************************************************************/
76
77 /** \addtogroup IfxLld_Scu_Std_Eru_Enum
78 * \{ */
79 /** \brief Input line selection for input channel\n
80 * Definition in Ifx_SCU.EICR[i].B.EXIS(j) (i = 0,1,2,3 and j = 0,1)
81 */
82 typedef enum
83 {
84 IfxScuEru_ExternalInputSelection_0 = 0, /**< \brief External input 0 is selected */
85 IfxScuEru_ExternalInputSelection_1, /**< \brief External input 1 is selected */
86 IfxScuEru_ExternalInputSelection_2, /**< \brief External input 2 is selected */
87 IfxScuEru_ExternalInputSelection_3, /**< \brief External input 3 is selected */
88 IfxScuEru_ExternalInputSelection_4, /**< \brief External input 4 is selected */
89 IfxScuEru_ExternalInputSelection_5 /**< \brief External input 5 is selected */
90 } IfxScuEru_ExternalInputSelection;
91
92 /** \brief Input channel for input selection and conditioning of trigger or gating functions
93 */
94 typedef enum
95 {
96 IfxScuEru_InputChannel_0 = 0, /**< \brief External Input channel 0 */
97 IfxScuEru_InputChannel_1, /**< \brief External Input channel 1 */
98 IfxScuEru_InputChannel_2, /**< \brief External Input channel 2 */
99 IfxScuEru_InputChannel_3, /**< \brief External Input channel 3 */
100 IfxScuEru_InputChannel_4, /**< \brief External Input channel 4 */
101 IfxScuEru_InputChannel_5, /**< \brief External Input channel 5 */
102 IfxScuEru_InputChannel_6, /**< \brief External Input channel 6 */
103 IfxScuEru_InputChannel_7 /**< \brief External Input channel 7 */
104 } IfxScuEru_InputChannel;
105
106 /** \brief Digital Glitch Filter Clock Depth determines the number of port input samples considered\n
107 * in the calculation of the floating average digital filter output for all enabled FLRQ filters.\n
108 * Definition in Ifx_SCU.EIFILT.B.DEPTH
109 */
110 typedef enum
111 {
112 IfxScuEru_InputFilterDepth_disable = 0, /**< \brief Disable all glitch filtering */
113 IfxScuEru_InputFilterDepth_1, /**< \brief glitch filter depth 1 */
114 IfxScuEru_InputFilterDepth_2, /**< \brief glitch filter depth 2 */
115 IfxScuEru_InputFilterDepth_3, /**< \brief glitch filter depth 3 */
116 IfxScuEru_InputFilterDepth_4, /**< \brief glitch filter depth 4 */
117 IfxScuEru_InputFilterDepth_5, /**< \brief glitch filter depth 5 */
118 IfxScuEru_InputFilterDepth_6, /**< \brief glitch filter depth 6 */
119 IfxScuEru_InputFilterDepth_7, /**< \brief glitch filter depth 7 */
120 IfxScuEru_InputFilterDepth_8, /**< \brief glitch filter depth 8 */
121 IfxScuEru_InputFilterDepth_9, /**< \brief glitch filter depth 9 */
122 IfxScuEru_InputFilterDepth_10, /**< \brief glitch filter depth 10 */
123 IfxScuEru_InputFilterDepth_11, /**< \brief glitch filter depth 11 */
124 IfxScuEru_InputFilterDepth_12, /**< \brief glitch filter depth 12 */
125 IfxScuEru_InputFilterDepth_13, /**< \brief glitch filter depth 13 */
126 IfxScuEru_InputFilterDepth_14, /**< \brief glitch filter depth 14 */
127 IfxScuEru_InputFilterDepth_15 /**< \brief glitch filter depth 15 */
128 } IfxScuEru_InputFilterDepth;
129
130 /** \brief Digital Glitch Filter Clock Predivider to generate the digital filter sample clock\n
131 * Definition in Ifx_SCU.EIFILT.B.FILTDIV
132 */
133 typedef enum
134 {
135 IfxScuEru_InputFilterPredivider_disable = 0, /**< \brief Disable all glitch filtering */
136 IfxScuEru_InputFilterPredivider_1, /**< \brief glitch filter predivider 1 */
137 IfxScuEru_InputFilterPredivider_2, /**< \brief glitch filter predivider 2 */
138 IfxScuEru_InputFilterPredivider_3, /**< \brief glitch filter predivider 3 */
139 IfxScuEru_InputFilterPredivider_4, /**< \brief glitch filter predivider 4 */
140 IfxScuEru_InputFilterPredivider_5, /**< \brief glitch filter predivider 5 */
141 IfxScuEru_InputFilterPredivider_6, /**< \brief glitch filter predivider 6 */
142 IfxScuEru_InputFilterPredivider_7, /**< \brief glitch filter predivider 7 */
143 IfxScuEru_InputFilterPredivider_8, /**< \brief glitch filter predivider 8 */
144 IfxScuEru_InputFilterPredivider_9, /**< \brief glitch filter predivider 9 */
145 IfxScuEru_InputFilterPredivider_10, /**< \brief glitch filter predivider 10 */
146 IfxScuEru_InputFilterPredivider_11, /**< \brief glitch filter predivider 11 */
147 IfxScuEru_InputFilterPredivider_12, /**< \brief glitch filter predivider 12 */
148 IfxScuEru_InputFilterPredivider_13, /**< \brief glitch filter predivider 13 */
149 IfxScuEru_InputFilterPredivider_14, /**< \brief glitch filter predivider 14 */
150 IfxScuEru_InputFilterPredivider_15 /**< \brief glitch filter predivider 15 */
151 } IfxScuEru_InputFilterPredivider;
152
153 /** \brief Digital port pin selection for input filter\n
154 * Definition in Ifx_SCU.EIFILT.B.FILRQ(i)(j) (i = 0 to7 and j = A, B, C, D)
155 */
156 typedef enum
157 {
158 IfxScuEru_InputFilterRequestSelection_0A, /**< \brief REQ0A */
159 IfxScuEru_InputFilterRequestSelection_5A, /**< \brief REQ5A */
160 IfxScuEru_InputFilterRequestSelection_2A, /**< \brief REQ2A */
161 IfxScuEru_InputFilterRequestSelection_3A, /**< \brief REQ3A */
162 IfxScuEru_InputFilterRequestSelection_0C, /**< \brief REQ0C */
163 IfxScuEru_InputFilterRequestSelection_1C, /**< \brief REQ1C */
164 IfxScuEru_InputFilterRequestSelection_3C, /**< \brief REQ3C */
165 IfxScuEru_InputFilterRequestSelection_2C, /**< \brief REQ2C */
166 IfxScuEru_InputFilterRequestSelection_4A, /**< \brief REQ4A */
167 IfxScuEru_InputFilterRequestSelection_6A, /**< \brief REQ6A */
168 IfxScuEru_InputFilterRequestSelection_1A, /**< \brief REQ1A */
169 IfxScuEru_InputFilterRequestSelection_7A, /**< \brief REQ7A */
170 IfxScuEru_InputFilterRequestSelection_6D, /**< \brief REQ6D */
171 IfxScuEru_InputFilterRequestSelection_4D, /**< \brief REQ4D */
172 IfxScuEru_InputFilterRequestSelection_2D, /**< \brief REQ2D */
173 IfxScuEru_InputFilterRequestSelection_3D, /**< \brief REQ3D */
174 IfxScuEru_InputFilterRequestSelection_7C /**< \brief REQ7C */
175 } IfxScuEru_InputFilterRequestSelection;
176
177 /** \brief Determines the destination (output channel) for trigger event (if enabled by Ifx_SCU.EICR[i].B.EIEN(j)).\n
178 * Definition in Ifx_SCU.EICR[i].B.INP(j) (i = 0,1,2,3 and j = 0,1)
179 */
180 typedef enum
181 {
182 IfxScuEru_InputNodePointer_0 = 0, /**< \brief Event from input ETLx triggers output OGU0 (signal TRx0) */
183 IfxScuEru_InputNodePointer_1, /**< \brief Event from input ETLx triggers output OGU1 (signal TRx1) */
184 IfxScuEru_InputNodePointer_2, /**< \brief Event from input ETLx triggers output OGU2 (signal TRx2) */
185 IfxScuEru_InputNodePointer_3, /**< \brief Event from input ETLx triggers output OGU3 (signal TRx3) */
186 IfxScuEru_InputNodePointer_4, /**< \brief Event from input ETLx triggers output OGU4 (signal TRx4) */
187 IfxScuEru_InputNodePointer_5, /**< \brief Event from input ETLx triggers output OGU5 (signal TRx5) */
188 IfxScuEru_InputNodePointer_6, /**< \brief Event from input ETLx triggers output OGU6 (signal TRx6) */
189 IfxScuEru_InputNodePointer_7 /**< \brief Event from input ETLx triggers output OGU7 (signal TRx7) */
190 } IfxScuEru_InputNodePointer;
191
192 /** \brief Determines the pattern detection influence on the ouput lines ERU_GOUTy and ERU_IOUTy\n
193 * Definition in Ifx_SCU.IGCR[i].B.IGP(j) (i = 0,1,2,3 and j = 0,1)
194 */
195 typedef enum
196 {
197 IfxScuEru_InterruptGatingPattern_none = 0, /**< \brief IOUTy is inactive, (the pattern is not considered) */
198 IfxScuEru_InterruptGatingPattern_alwaysActive = 1, /**< \brief IOUTy is activated in response to a trigger event, (the pattern is not considered) */
199 IfxScuEru_InterruptGatingPattern_patternMatch = 2, /**< \brief IOUTy is activated if a trigger event occures while the pattern is present, (the pattern is considered) */
200 IfxScuEru_InterruptGatingPattern_patternMiss = 3 /**< \brief IOUTy is activated if a trigger event occures while the pattern is not present, (the pattern is not considered) */
201 } IfxScuEru_InterruptGatingPattern;
202
203 /** \brief Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
204 */
205 typedef enum
206 {
207 IfxScuEru_OutputChannel_0 = 0, /**< \brief Output channel 0 */
208 IfxScuEru_OutputChannel_1, /**< \brief Output channel 1 */
209 IfxScuEru_OutputChannel_2, /**< \brief Output channel 2 */
210 IfxScuEru_OutputChannel_3, /**< \brief Output channel 3 */
211 IfxScuEru_OutputChannel_4, /**< \brief Output channel 4 */
212 IfxScuEru_OutputChannel_5, /**< \brief Output channel 5 */
213 IfxScuEru_OutputChannel_6, /**< \brief Output channel 6 */
214 IfxScuEru_OutputChannel_7 /**< \brief Output channel 7 */
215 } IfxScuEru_OutputChannel;
216
217 /** \} */
218
219 /** \addtogroup IfxLld_Scu_Std_Eru_External_Request_Selection
220 * \{ */
221
222 /******************************************************************************/
223 /*-------------------------Inline Function Prototypes-------------------------*/
224 /******************************************************************************/
225
226 /** \brief Initialises the External request Pin
227 * \param req External request pin
228 * \param inputMode Port Input mode
229 * \return None
230 */
231 IFX_INLINE void IfxScuEru_initReqPin(IfxScu_Req_In *req, IfxPort_InputMode inputMode);
232
233 /******************************************************************************/
234 /*-------------------------Global Function Prototypes-------------------------*/
235 /******************************************************************************/
236
237 /** \brief Determines which input line is selcted for input channel x
238 * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
239 * \param inputSignal Input line selection for input channel
240 * \return None
241 */
242 IFX_EXTERN void IfxScuEru_selectExternalInput(IfxScuEru_InputChannel inputChannel, IfxScuEru_ExternalInputSelection inputSignal);
243
244 /** \} */
245
246 /** \addtogroup IfxLld_Scu_Std_Eru_Event_Trigger_Logic
247 * \{ */
248
249 /******************************************************************************/
250 /*-------------------------Global Function Prototypes-------------------------*/
251 /******************************************************************************/
252
253 /** \brief Clears the external event flag of input channel x (INTFx)
254 * \return None
255 */
256 IFX_EXTERN void IfxScuEru_clearAllEventFlags(void);
257
258 /** \brief Clears the external event flag of input channel x (INTFx)
259 * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
260 * \return None
261 */
262 IFX_EXTERN void IfxScuEru_clearEventFlag(IfxScuEru_InputChannel inputChannel);
263
264 /** \brief Clears all the configuration for the given input channel x
265 * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
266 * \return None
267 */
268 IFX_EXTERN void IfxScuEru_clearInputChannelConfiguration(IfxScuEru_InputChannel inputChannel);
269
270 /** \brief Disables the automatic clearing of INTFx when the edge of input channel which has not been selected, is detected
271 * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
272 * \return None
273 */
274 IFX_EXTERN void IfxScuEru_disableAutoClear(IfxScuEru_InputChannel inputChannel);
275
276 /** \brief Disables the falling edge of input channel to set the bit INTF x
277 * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
278 * \return None
279 */
280 IFX_EXTERN void IfxScuEru_disableFallingEdgeDetection(IfxScuEru_InputChannel inputChannel);
281
282 /** \brief Disables the rising edge of input channel to set the bit INTF x
283 * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
284 * \return None
285 */
286 IFX_EXTERN void IfxScuEru_disableRisingEdgeDetection(IfxScuEru_InputChannel inputChannel);
287
288 /** \brief Enables the automatic clearing of INTFx when the edge of input channel which has not been selected, is detected
289 * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
290 * \return None
291 */
292 IFX_EXTERN void IfxScuEru_enableAutoClear(IfxScuEru_InputChannel inputChannel);
293
294 /** \brief Enables the falling edge of input channel to set the bit INTF x
295 * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
296 * \return None
297 */
298 IFX_EXTERN void IfxScuEru_enableFallingEdgeDetection(IfxScuEru_InputChannel inputChannel);
299
300 /** \brief Enables the rising edge of input channel to set the bit INTF x
301 * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
302 * \return None
303 */
304 IFX_EXTERN void IfxScuEru_enableRisingEdgeDetection(IfxScuEru_InputChannel inputChannel);
305
306 /** \brief Returns the status of the flags of all input channels
307 * \return All flags Status
308 */
309 IFX_EXTERN uint32 IfxScuEru_getAllEventFlagsStatus(void);
310
311 /** \brief Returns the status of the external event flag of input channel x (INTFx)
312 * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
313 * \return Status (TRUE / FALSE)
314 */
315 IFX_EXTERN boolean IfxScuEru_getEventFlagStatus(IfxScuEru_InputChannel inputChannel);
316
317 /** \brief Returns all the configuration for the given input channel x
318 * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
319 * \return Input channel configuration
320 */
321 IFX_EXTERN uint32 IfxScuEru_getInputChannelConfiguration(IfxScuEru_InputChannel inputChannel);
322
323 /** \brief Sets the external event flag of input channel x (INTFx)
324 * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
325 * \return None
326 */
327 IFX_EXTERN void IfxScuEru_setEventFlag(IfxScuEru_InputChannel inputChannel);
328
329 /** \} */
330
331 /** \addtogroup IfxLld_Scu_Std_Eru_Connecting_Matrix
332 * \{ */
333
334 /******************************************************************************/
335 /*-------------------------Global Function Prototypes-------------------------*/
336 /******************************************************************************/
337
338 /** \brief Determines the destination (output channel) for trigger event (if enabled by Ifx_SCU.EICR[i].B.EIEN(j), i = 0,1,2,3 and j = 0,1).
339 * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
340 * \param triggerSelect Trigger event selection
341 * \return None
342 */
343 IFX_EXTERN void IfxScuEru_connectTrigger(IfxScuEru_InputChannel inputChannel, IfxScuEru_InputNodePointer triggerSelect);
344
345 /** \brief Disables the generation of a trigger event for input channel x when the selected edge is detected
346 * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
347 * \return None
348 */
349 IFX_EXTERN void IfxScuEru_disableTriggerPulse(IfxScuEru_InputChannel inputChannel);
350
351 /** \brief Enables the generation of a trigger event for input channel x when the selected edge is detected
352 * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
353 * \return None
354 */
355 IFX_EXTERN void IfxScuEru_enableTriggerPulse(IfxScuEru_InputChannel inputChannel);
356
357 /** \brief Enables the flag INTFx to take part in the pattern detection for output gating
358 * \param outputChannel Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
359 * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
360 * \param state FALSE: the bit INTFx does not take part in the pattern detection IPENjy = 0\n
361 * TRUE : the bit INTFx is taken into consideration for the pattern detection IPENjy = 1
362 * \return None
363 */
364 IFX_EXTERN void IfxScuEru_setFlagPatternDetection(IfxScuEru_OutputChannel outputChannel, IfxScuEru_InputChannel inputChannel, boolean state);
365
366 /** \} */
367
368 /** \addtogroup IfxLld_Scu_Std_Eru_Output_Gating_Unit
369 * \{ */
370
371 /******************************************************************************/
372 /*-------------------------Global Function Prototypes-------------------------*/
373 /******************************************************************************/
374
375 /** \brief Clears all the configuration for the given input channel y
376 * \param outputChannel Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
377 * \return None
378 */
379 IFX_EXTERN void IfxScuEru_clearOutputChannelConfiguration(IfxScuEru_OutputChannel outputChannel);
380
381 /** \brief Disables the generation of a trigger event for output channel y when the result of the pattern detection changes
382 * \param outputChannel Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
383 * \return None
384 */
385 IFX_EXTERN void IfxScuEru_disablePatternDetectionTrigger(IfxScuEru_OutputChannel outputChannel);
386
387 /** \brief Enables the generation of a trigger event for output channel y when the result of the pattern detection changes
388 * \param outputChannel Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
389 * \return None
390 */
391 IFX_EXTERN void IfxScuEru_enablePatternDetectionTrigger(IfxScuEru_OutputChannel outputChannel);
392
393 /** \brief Clears all the configuration for the given input channel y
394 * \param outputChannel Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
395 * \return Output channel configuration
396 */
397 IFX_EXTERN uint32 IfxScuEru_getOutputChannelConfiguration(IfxScuEru_OutputChannel outputChannel);
398
399 /** \brief Returns the status of the pattern detection result of output channel y (PDRy)
400 * \param outputChannel Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
401 * \return Status (TRUE / FALSE)
402 */
403 IFX_EXTERN boolean IfxScuEru_getPatternDetectionResult(IfxScuEru_OutputChannel outputChannel);
404
405 /** \brief Returns the whole pattern detection result of all the selcted output channels
406 * \return Detected pattern
407 */
408 IFX_EXTERN uint32 IfxScuEru_getWholePatternDetectionResult(void);
409
410 /** \brief Sets the gating pattern of a ouput channel y to determine how the pattern detection influences the output lines GOUT and IOUT
411 * \param outputChannel Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
412 * \param gatingPattern Interrupt gating pattern to determine how the pattern detection influences the ouput lines GOUT and IOUT
413 * \return None
414 */
415 IFX_EXTERN void IfxScuEru_setInterruptGatingPattern(IfxScuEru_OutputChannel outputChannel, IfxScuEru_InterruptGatingPattern gatingPattern);
416
417 /** \} */
418
419 /** \addtogroup IfxLld_Scu_Std_Eru_Input_Filtering
420 * \{ */
421
422 /******************************************************************************/
423 /*-------------------------Inline Function Prototypes-------------------------*/
424 /******************************************************************************/
425
426 /** \brief Enables the input filter for the selected digital pin (REQxy)
427 * \param requestSelection Digital port pin selection for input filter
428 * \return None
429 */
430 IFX_INLINE void IfxScuEru_disableInputFilter(IfxScuEru_InputFilterRequestSelection requestSelection);
431
432 /** \brief Enables the input filter for the selected digital pin (REQxy)
433 * \param requestSelection Digital port pin selection for input filter
434 * \return None
435 */
436 IFX_INLINE void IfxScuEru_enableInputFilter(IfxScuEru_InputFilterRequestSelection requestSelection);
437
438 /** \brief Sets the digital glitch filter depth
439 * \param depth Digital Glitch Filter depth
440 * \return None
441 */
442 IFX_INLINE void IfxScuEru_setInputFilterDepth(IfxScuEru_InputFilterDepth depth);
443
444 /** \brief Sets the digital glitch filter predivider
445 * \param predivider Digital Glitch Filter Predivider
446 * \return None
447 */
448 IFX_INLINE void IfxScuEru_setInputFilterPredivider(IfxScuEru_InputFilterPredivider predivider);
449
450 /** \} */
451
452 /******************************************************************************/
453 /*---------------------Inline Function Implementations------------------------*/
454 /******************************************************************************/
455
456 IFX_INLINE void IfxScuEru_disableInputFilter(IfxScuEru_InputFilterRequestSelection requestSelection)
457 {
458 uint32 value = 1 << requestSelection;
459 uint16 password = IfxScuWdt_getSafetyWatchdogPasswordInline();
460 IfxScuWdt_clearSafetyEndinitInline(password);
461
462 SCU_EIFILT.U &= ~(value);
463 IfxScuWdt_setSafetyEndinitInline(password);
464 }
465
466
467 IFX_INLINE void IfxScuEru_enableInputFilter(IfxScuEru_InputFilterRequestSelection requestSelection)
468 {
469 uint32 value = 1 << requestSelection;
470 uint16 password = IfxScuWdt_getSafetyWatchdogPasswordInline();
471 IfxScuWdt_clearSafetyEndinitInline(password);
472
473 SCU_EIFILT.U |= value;
474 IfxScuWdt_setSafetyEndinitInline(password);
475 }
476
477
478 IFX_INLINE void IfxScuEru_initReqPin(IfxScu_Req_In *req, IfxPort_InputMode inputMode)
479 {
480 IfxPort_setPinModeInput(req->pin.port, req->pin.pinIndex, inputMode);
481 IfxScuEru_selectExternalInput((IfxScuEru_InputChannel)req->channelId, (IfxScuEru_ExternalInputSelection)req->select);
482 }
483
484
485 IFX_INLINE void IfxScuEru_setInputFilterDepth(IfxScuEru_InputFilterDepth depth)
486 {
487 uint16 password = IfxScuWdt_getSafetyWatchdogPasswordInline();
488 IfxScuWdt_clearSafetyEndinitInline(password);
489
490 SCU_EIFILT.B.DEPTH = depth;
491 IfxScuWdt_setSafetyEndinitInline(password);
492 }
493
494
495 IFX_INLINE void IfxScuEru_setInputFilterPredivider(IfxScuEru_InputFilterPredivider predivider)
496 {
497 uint16 password = IfxScuWdt_getSafetyWatchdogPasswordInline();
498 IfxScuWdt_clearSafetyEndinitInline(password);
499
500 SCU_EIFILT.B.FILTDIV = predivider;
501 IfxScuWdt_setSafetyEndinitInline(password);
502 }
503
504
505 #endif /* IFXSCUERU_H */
IfxScuWdt_setSafetyEndinitInline
IFX_INLINE void IfxScuWdt_setSafetyEndinitInline(uint16 password)
SCUWDT Inline API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.h:689
IfxScuWdt_getSafetyWatchdogPasswordInline
IFX_INLINE uint16 IfxScuWdt_getSafetyWatchdogPasswordInline(void)
SCUWDT Inline API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.h:641
IfxScuEru_InputFilterRequestSelection_6A
REQ6A.
Definition: IfxScuEru.h:167
IfxScuEru_OutputChannel_2
Output channel 2.
Definition: IfxScuEru.h:209
IfxScuEru_disableTriggerPulse
IFX_EXTERN void IfxScuEru_disableTriggerPulse(IfxScuEru_InputChannel inputChannel)
Disables the generation of a trigger event for input channel x when the selected edge is detected...
Definition: IfxScuEru.c:219
IfxScuEru_InputFilterPredivider_7
glitch filter predivider 7
Definition: IfxScuEru.h:142
IfxScuEru_InputFilterDepth
IfxScuEru_InputFilterDepth
Digital Glitch Filter Clock Depth determines the number of port input samples considered in the calcu...
Definition: IfxScuEru.h:110
IfxScuEru_enableTriggerPulse
IFX_EXTERN void IfxScuEru_enableTriggerPulse(IfxScuEru_InputChannel inputChannel)
Enables the generation of a trigger event for input channel x when the selected edge is detected...
Definition: IfxScuEru.c:319
IfxScuEru_InputFilterPredivider_5
glitch filter predivider 5
Definition: IfxScuEru.h:140
IfxScuEru_ExternalInputSelection
IfxScuEru_ExternalInputSelection
Input line selection for input channel Definition in Ifx_SCU.EICR[i].B.EXIS(j) (i = 0...
Definition: IfxScuEru.h:82
IfxScuEru_InputChannel_0
External Input channel 0.
Definition: IfxScuEru.h:96
IfxScuEru_disableFallingEdgeDetection
IFX_EXTERN void IfxScuEru_disableFallingEdgeDetection(IfxScuEru_InputChannel inputChannel)
Disables the falling edge of input channel to set the bit INTF x.
Definition: IfxScuEru.c:159
IfxScuEru_InputFilterPredivider_10
glitch filter predivider 10
Definition: IfxScuEru.h:145
IfxScuEru_getWholePatternDetectionResult
IFX_EXTERN uint32 IfxScuEru_getWholePatternDetectionResult(void)
Returns the whole pattern detection result of all the selcted output channels.
Definition: IfxScuEru.c:399
IfxScuEru_InputFilterRequestSelection_0A
REQ0A.
Definition: IfxScuEru.h:158
IfxScu_Req_In::channelId
uint8 channelId
ERU Channel ID.
Definition: IfxScu_PinMap.h:67
IfxScuWdt_clearSafetyEndinitInline
IFX_INLINE void IfxScuWdt_clearSafetyEndinitInline(uint16 password)
SCUWDT Inline API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.h:581
IfxScuEru_InputFilterPredivider
IfxScuEru_InputFilterPredivider
Digital Glitch Filter Clock Predivider to generate the digital filter sample clock Definition in Ifx_...
Definition: IfxScuEru.h:133
IfxScu_PinMap.h
SCU I/O map.
IfxScuEru_InputFilterPredivider_9
glitch filter predivider 9
Definition: IfxScuEru.h:144
IfxScuEru_OutputChannel_5
Output channel 5.
Definition: IfxScuEru.h:212
IfxScuEru_InputFilterPredivider_3
glitch filter predivider 3
Definition: IfxScuEru.h:138
IfxScuEru_InputFilterDepth_4
glitch filter depth 4
Definition: IfxScuEru.h:116
IfxScuEru_clearOutputChannelConfiguration
IFX_EXTERN void IfxScuEru_clearOutputChannelConfiguration(IfxScuEru_OutputChannel outputChannel)
Clears all the configuration for the given input channel y.
Definition: IfxScuEru.c:97
IfxScuEru_enablePatternDetectionTrigger
IFX_EXTERN void IfxScuEru_enablePatternDetectionTrigger(IfxScuEru_OutputChannel outputChannel)
Enables the generation of a trigger event for output channel y when the result of the pattern detecti...
Definition: IfxScuEru.c:279
IfxScuEru_setInputFilterPredivider
IFX_INLINE void IfxScuEru_setInputFilterPredivider(IfxScuEru_InputFilterPredivider predivider)
Sets the digital glitch filter predivider.
Definition: IfxScuEru.h:495
IfxScuEru_clearInputChannelConfiguration
IFX_EXTERN void IfxScuEru_clearInputChannelConfiguration(IfxScuEru_InputChannel inputChannel)
Clears all the configuration for the given input channel x.
Definition: IfxScuEru.c:75
IfxScuEru_InputNodePointer_0
Event from input ETLx triggers output OGU0 (signal TRx0)
Definition: IfxScuEru.h:182
IfxScuEru_InputChannel_4
External Input channel 4.
Definition: IfxScuEru.h:100
IfxScuEru_InputFilterPredivider_6
glitch filter predivider 6
Definition: IfxScuEru.h:141
IfxScuEru_setEventFlag
IFX_EXTERN void IfxScuEru_setEventFlag(IfxScuEru_InputChannel inputChannel)
Sets the external event flag of input channel x (INTFx)
Definition: IfxScuEru.c:425
IfxScuEru_InputChannel_5
External Input channel 5.
Definition: IfxScuEru.h:101
IfxScuEru_InputFilterRequestSelection_3C
REQ3C.
Definition: IfxScuEru.h:164
IfxScuEru_InputNodePointer
IfxScuEru_InputNodePointer
Determines the destination (output channel) for trigger event (if enabled by Ifx_SCU.EICR[i].B.EIEN(j)). Definition in Ifx_SCU.EICR[i].B.INP(j) (i = 0,1,2,3 and j = 0,1)
Definition: IfxScuEru.h:180
IfxScuEru_disablePatternDetectionTrigger
IFX_EXTERN void IfxScuEru_disablePatternDetectionTrigger(IfxScuEru_OutputChannel outputChannel)
Disables the generation of a trigger event for output channel y when the result of the pattern detect...
Definition: IfxScuEru.c:179
IfxScuEru_InterruptGatingPattern_patternMatch
IOUTy is activated if a trigger event occures while the pattern is present, (the pattern is considere...
Definition: IfxScuEru.h:199
IfxScuEru_getOutputChannelConfiguration
IFX_EXTERN uint32 IfxScuEru_getOutputChannelConfiguration(IfxScuEru_OutputChannel outputChannel)
Clears all the configuration for the given input channel y.
Definition: IfxScuEru.c:372
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxScuEru_InputFilterDepth_2
glitch filter depth 2
Definition: IfxScuEru.h:114
IfxScuEru_InputFilterPredivider_15
glitch filter predivider 15
Definition: IfxScuEru.h:150
IfxScuEru_InputFilterRequestSelection_1C
REQ1C.
Definition: IfxScuEru.h:163
IfxScuEru_clearAllEventFlags
IFX_EXTERN void IfxScuEru_clearAllEventFlags(void)
Clears the external event flag of input channel x (INTFx)
Definition: IfxScuEru.c:61
IfxScuEru_InputNodePointer_7
Event from input ETLx triggers output OGU7 (signal TRx7)
Definition: IfxScuEru.h:189
IfxScuEru_InputFilterDepth_15
glitch filter depth 15
Definition: IfxScuEru.h:127
IfxScuEru_ExternalInputSelection_1
External input 1 is selected.
Definition: IfxScuEru.h:85
IfxScuEru_setInputFilterDepth
IFX_INLINE void IfxScuEru_setInputFilterDepth(IfxScuEru_InputFilterDepth depth)
Sets the digital glitch filter depth.
Definition: IfxScuEru.h:485
IfxScuEru_setInterruptGatingPattern
IFX_EXTERN void IfxScuEru_setInterruptGatingPattern(IfxScuEru_OutputChannel outputChannel, IfxScuEru_InterruptGatingPattern gatingPattern)
Sets the gating pattern of a ouput channel y to determine how the pattern detection influences the ou...
Definition: IfxScuEru.c:459
IfxScuEru_InputFilterRequestSelection_2D
REQ2D.
Definition: IfxScuEru.h:172
IfxScuEru_InputFilterDepth_10
glitch filter depth 10
Definition: IfxScuEru.h:122
IfxScuEru_InputFilterDepth_disable
Disable all glitch filtering.
Definition: IfxScuEru.h:112
IfxScuEru_InputFilterRequestSelection_4D
REQ4D.
Definition: IfxScuEru.h:171
IfxScuEru_InputFilterPredivider_13
glitch filter predivider 13
Definition: IfxScuEru.h:148
IfxScuEru_OutputChannel_6
Output channel 6.
Definition: IfxScuEru.h:213
IfxScuEru_InterruptGatingPattern_alwaysActive
IOUTy is activated in response to a trigger event, (the pattern is not considered) ...
Definition: IfxScuEru.h:198
IfxPort_setPinModeInput
IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode.
Definition: IfxPort.h:669
IfxScuEru_InputFilterDepth_11
glitch filter depth 11
Definition: IfxScuEru.h:123
IfxScuEru_ExternalInputSelection_5
External input 5 is selected.
Definition: IfxScuEru.h:89
IfxScuEru_ExternalInputSelection_0
External input 0 is selected.
Definition: IfxScuEru.h:84
IfxScuWdt.h
SCU basic functionality.
IfxScuEru_OutputChannel_0
Output channel 0.
Definition: IfxScuEru.h:207
IfxScuEru_InputFilterDepth_12
glitch filter depth 12
Definition: IfxScuEru.h:124
IfxScuEru_InputFilterDepth_14
glitch filter depth 14
Definition: IfxScuEru.h:126
IfxScuEru_InputFilterDepth_6
glitch filter depth 6
Definition: IfxScuEru.h:118
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxScuEru_InputFilterRequestSelection_3D
REQ3D.
Definition: IfxScuEru.h:173
IfxScuEru_InputFilterPredivider_11
glitch filter predivider 11
Definition: IfxScuEru.h:146
IfxScuEru_ExternalInputSelection_4
External input 4 is selected.
Definition: IfxScuEru.h:88
IfxScuEru_InputFilterRequestSelection_4A
REQ4A.
Definition: IfxScuEru.h:166
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxScuEru_InputNodePointer_6
Event from input ETLx triggers output OGU6 (signal TRx6)
Definition: IfxScuEru.h:188
IfxScuEru_InputFilterPredivider_disable
Disable all glitch filtering.
Definition: IfxScuEru.h:135
IfxScuEru_InputNodePointer_5
Event from input ETLx triggers output OGU5 (signal TRx5)
Definition: IfxScuEru.h:187
IfxScuEru_InputChannel_3
External Input channel 3.
Definition: IfxScuEru.h:99
IfxScu_cfg.h
SCU on-chip implementation data.
IfxScuEru_connectTrigger
IFX_EXTERN void IfxScuEru_connectTrigger(IfxScuEru_InputChannel inputChannel, IfxScuEru_InputNodePointer triggerSelect)
Determines the destination (output channel) for trigger event (if enabled by Ifx_SCU.EICR[i].B.EIEN(j), i = 0,1,2,3 and j = 0,1).
Definition: IfxScuEru.c:119
IfxScuEru_enableInputFilter
IFX_INLINE void IfxScuEru_enableInputFilter(IfxScuEru_InputFilterRequestSelection requestSelection)
Enables the input filter for the selected digital pin (REQxy)
Definition: IfxScuEru.h:467
IfxScuEru_InputFilterDepth_13
glitch filter depth 13
Definition: IfxScuEru.h:125
IfxScuEru_InputChannel_6
External Input channel 6.
Definition: IfxScuEru.h:102
IfxScuEru_disableInputFilter
IFX_INLINE void IfxScuEru_disableInputFilter(IfxScuEru_InputFilterRequestSelection requestSelection)
Enables the input filter for the selected digital pin (REQxy)
Definition: IfxScuEru.h:456
IfxScuEru_ExternalInputSelection_3
External input 3 is selected.
Definition: IfxScuEru.h:87
IfxScuEru_OutputChannel
IfxScuEru_OutputChannel
Output channel for combination of events, definition of their effects and distribution to the system ...
Definition: IfxScuEru.h:205
IfxScuEru_InterruptGatingPattern
IfxScuEru_InterruptGatingPattern
Determines the pattern detection influence on the ouput lines ERU_GOUTy and ERU_IOUTy Definition in I...
Definition: IfxScuEru.h:195
IfxScuEru_InputFilterPredivider_8
glitch filter predivider 8
Definition: IfxScuEru.h:143
IfxScuEru_InputFilterRequestSelection_5A
REQ5A.
Definition: IfxScuEru.h:159
IfxScuEru_InterruptGatingPattern_none
IOUTy is inactive, (the pattern is not considered)
Definition: IfxScuEru.h:197
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:249
IfxScuEru_InputFilterRequestSelection_7A
REQ7A.
Definition: IfxScuEru.h:169
IfxScuEru_getEventFlagStatus
IFX_EXTERN boolean IfxScuEru_getEventFlagStatus(IfxScuEru_InputChannel inputChannel)
Returns the status of the external event flag of input channel x (INTFx)
Definition: IfxScuEru.c:345
IfxScuEru_setFlagPatternDetection
IFX_EXTERN void IfxScuEru_setFlagPatternDetection(IfxScuEru_OutputChannel outputChannel, IfxScuEru_InputChannel inputChannel, boolean state)
Enables the flag INTFx to take part in the pattern detection for output gating.
Definition: IfxScuEru.c:432
IfxScuEru_OutputChannel_1
Output channel 1.
Definition: IfxScuEru.h:208
IfxScuEru_InputFilterRequestSelection
IfxScuEru_InputFilterRequestSelection
Digital port pin selection for input filter Definition in Ifx_SCU.EIFILT.B.FILRQ(i)(j) (i = 0 to7 and...
Definition: IfxScuEru.h:156
IfxScuEru_disableRisingEdgeDetection
IFX_EXTERN void IfxScuEru_disableRisingEdgeDetection(IfxScuEru_InputChannel inputChannel)
Disables the rising edge of input channel to set the bit INTF x.
Definition: IfxScuEru.c:199
IfxScuEru_InputFilterPredivider_12
glitch filter predivider 12
Definition: IfxScuEru.h:147
IfxScuEru_InputFilterPredivider_4
glitch filter predivider 4
Definition: IfxScuEru.h:139
IfxScuEru_getPatternDetectionResult
IFX_EXTERN boolean IfxScuEru_getPatternDetectionResult(IfxScuEru_OutputChannel outputChannel)
Returns the status of the pattern detection result of output channel y (PDRy)
Definition: IfxScuEru.c:392
IfxCpu.h
CPU basic functionality.
IfxScuEru_InputChannel_1
External Input channel 1.
Definition: IfxScuEru.h:97
IfxScuEru_ExternalInputSelection_2
External input 2 is selected.
Definition: IfxScuEru.h:86
IfxScuEru_InputFilterRequestSelection_2C
REQ2C.
Definition: IfxScuEru.h:165
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxScuEru_InputChannel_7
External Input channel 7.
Definition: IfxScuEru.h:103
IfxScuEru_InputFilterRequestSelection_2A
REQ2A.
Definition: IfxScuEru.h:160
IfxScuEru_InputNodePointer_2
Event from input ETLx triggers output OGU2 (signal TRx2)
Definition: IfxScuEru.h:184
IfxScuEru_getInputChannelConfiguration
IFX_EXTERN uint32 IfxScuEru_getInputChannelConfiguration(IfxScuEru_InputChannel inputChannel)
Returns all the configuration for the given input channel x.
Definition: IfxScuEru.c:352
IfxScu_Req_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxScu_PinMap.h:68
IfxScuEru_InputChannel
IfxScuEru_InputChannel
Input channel for input selection and conditioning of trigger or gating functions.
Definition: IfxScuEru.h:94
IfxScuEru_InputFilterDepth_1
glitch filter depth 1
Definition: IfxScuEru.h:113
IfxScuEru_InputFilterRequestSelection_3A
REQ3A.
Definition: IfxScuEru.h:161
IfxScuEru_OutputChannel_3
Output channel 3.
Definition: IfxScuEru.h:210
IfxScuEru_initReqPin
IFX_INLINE void IfxScuEru_initReqPin(IfxScu_Req_In *req, IfxPort_InputMode inputMode)
Initialises the External request Pin.
Definition: IfxScuEru.h:478
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:81
IfxScuEru_disableAutoClear
IFX_EXTERN void IfxScuEru_disableAutoClear(IfxScuEru_InputChannel inputChannel)
Disables the automatic clearing of INTFx when the edge of input channel which has not been selected...
Definition: IfxScuEru.c:139
IfxScu_Req_In
External Request pin mapping structure.
Definition: IfxScu_PinMap.h:64
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:248
IfxScuEru_selectExternalInput
IFX_EXTERN void IfxScuEru_selectExternalInput(IfxScuEru_InputChannel inputChannel, IfxScuEru_ExternalInputSelection inputSignal)
Determines which input line is selcted for input channel x.
Definition: IfxScuEru.c:405
IfxScuEru_OutputChannel_7
Output channel 7.
Definition: IfxScuEru.h:214
IfxScuEru_InputFilterPredivider_1
glitch filter predivider 1
Definition: IfxScuEru.h:136
IfxScuEru_InputFilterRequestSelection_0C
REQ0C.
Definition: IfxScuEru.h:162
IfxScuEru_InputFilterPredivider_2
glitch filter predivider 2
Definition: IfxScuEru.h:137
IfxScuEru_enableFallingEdgeDetection
IFX_EXTERN void IfxScuEru_enableFallingEdgeDetection(IfxScuEru_InputChannel inputChannel)
Enables the falling edge of input channel to set the bit INTF x.
Definition: IfxScuEru.c:259
IfxScuEru_InputFilterRequestSelection_6D
REQ6D.
Definition: IfxScuEru.h:170
IfxScuEru_InputFilterDepth_5
glitch filter depth 5
Definition: IfxScuEru.h:117
IfxScuEru_clearEventFlag
IFX_EXTERN void IfxScuEru_clearEventFlag(IfxScuEru_InputChannel inputChannel)
Clears the external event flag of input channel x (INTFx)
Definition: IfxScuEru.c:68
IfxScu_Req_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxScu_PinMap.h:69
IfxScuEru_enableRisingEdgeDetection
IFX_EXTERN void IfxScuEru_enableRisingEdgeDetection(IfxScuEru_InputChannel inputChannel)
Enables the rising edge of input channel to set the bit INTF x.
Definition: IfxScuEru.c:299
IfxScuEru_InputNodePointer_1
Event from input ETLx triggers output OGU1 (signal TRx1)
Definition: IfxScuEru.h:183
IfxScuEru_InputFilterRequestSelection_1A
REQ1A.
Definition: IfxScuEru.h:168
IfxScuEru_InputFilterDepth_7
glitch filter depth 7
Definition: IfxScuEru.h:119
IfxScuEru_InputFilterRequestSelection_7C
REQ7C.
Definition: IfxScuEru.h:174
IfxScuEru_InputFilterDepth_3
glitch filter depth 3
Definition: IfxScuEru.h:115
IfxScuEru_OutputChannel_4
Output channel 4.
Definition: IfxScuEru.h:211
IfxScuEru_InputFilterDepth_9
glitch filter depth 9
Definition: IfxScuEru.h:121
IfxScuEru_InterruptGatingPattern_patternMiss
IOUTy is activated if a trigger event occures while the pattern is not present, (the pattern is not c...
Definition: IfxScuEru.h:200
IfxScuEru_enableAutoClear
IFX_EXTERN void IfxScuEru_enableAutoClear(IfxScuEru_InputChannel inputChannel)
Enables the automatic clearing of INTFx when the edge of input channel which has not been selected...
Definition: IfxScuEru.c:239
IfxScuEru_getAllEventFlagsStatus
IFX_EXTERN uint32 IfxScuEru_getAllEventFlagsStatus(void)
Returns the status of the flags of all input channels.
Definition: IfxScuEru.c:339
IfxScuEru_InputNodePointer_4
Event from input ETLx triggers output OGU4 (signal TRx4)
Definition: IfxScuEru.h:186
IfxScuEru_InputFilterPredivider_14
glitch filter predivider 14
Definition: IfxScuEru.h:149
IfxScuEru_InputChannel_2
External Input channel 2.
Definition: IfxScuEru.h:98
IfxScuEru_InputNodePointer_3
Event from input ETLx triggers output OGU3 (signal TRx3)
Definition: IfxScuEru.h:185
IfxScuEru_InputFilterDepth_8
glitch filter depth 8
Definition: IfxScuEru.h:120


iLLD_TC38A: IfxScuLbist.c Source File

  • Scu
  • Std
IfxScuLbist.c
Go to the documentation of this file.
1 /**
2 * \file IfxScuLbist.c
3 * \brief SCU basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 *
41 */
42
43 /******************************************************************************/
44 /*----------------------------------Includes----------------------------------*/
45 /******************************************************************************/
46
47 #include "IfxScuLbist.h"
48
49 /******************************************************************************/
50 /*-----------------------Exported Variables/Constants-------------------------*/
51 /******************************************************************************/
52
53 IFX_CONST IfxScuLbist_ParameterSet IfxScuLbist_defaultConfig = {
54 #ifndef IFX_CFG_LBIST_BODY_ENABLED
55 #ifndef IFX_CFG_LBIST_CFG_B_ENABLED
56 .application = IfxScuLbist_Application_pt,
57 .freq = IfxScuLbist_Freq_div6,
58 .splitShiftSel = IfxScuLbist_SplitShiftSel_fourScanPartitions,
59 .seed = IFXSCULBIST_CFG_SEED,
60 .pattern = IFXSCULBIST_CFG_PATTERN_A,
61 .scanChainLength = IFXSCULBIST_CFG_SCANCHAINLENGTH,
62 .signature = IFXSCULBIST_CFG_SIGNATURE_A,
63 #else
64 .application = IfxScuLbist_Application_pt,
65 .freq = IfxScuLbist_Freq_div6,
66 .splitShiftSel = IfxScuLbist_SplitShiftSel_fourScanPartitions,
67 .seed = IFXSCULBIST_CFG_SEED,
68 .pattern = IFXSCULBIST_CFG_PATTERN_B,
69 .scanChainLength = IFXSCULBIST_CFG_SCANCHAINLENGTH,
70 .signature = IFXSCULBIST_CFG_SIGNATURE_B,
71 #endif
72 #else
73 #ifndef IFX_CFG_LBIST_CFG_B_ENABLED
74 .application = IfxScuLbist_Application_body,
75 .freq = IfxScuLbist_Freq_div6,
76 .splitShiftSel = IfxScuLbist_SplitShiftSel_fourScanPartitions,
77 .seed = IFXSCULBIST_CFG_SEED,
78 .pattern = IFXSCULBIST_CFG_PATTERN_A,
79 .scanChainLength = IFXSCULBIST_CFG_SCANCHAINLENGTH,
80 .signature = IFXSCULBIST_CFG_SIGNATURE_A,
81 #else
82 .application = IfxScuLbist_Application_body,
83 .freq = IfxScuLbist_Freq_div6,
84 .splitShiftSel = IfxScuLbist_SplitShiftSel_fourScanPartitions,
85 .seed = IFXSCULBIST_CFG_SEED,
86 .pattern = IFXSCULBIST_CFG_PATTERN_B,
87 .scanChainLength = IFXSCULBIST_CFG_SCANCHAINLENGTH,
88 .signature = IFXSCULBIST_CFG_SIGNATURE_B,
89 #endif
90 #endif
91 };
IFXSCULBIST_CFG_SCANCHAINLENGTH
#define IFXSCULBIST_CFG_SCANCHAINLENGTH
Definition: IfxScu_cfg.h:1304
IfxScuLbist_SplitShiftSel_fourScanPartitions
LBIST Split-Shift Four Scan-Shift Selection.
Definition: IfxScuLbist.h:103
IFXSCULBIST_CFG_PATTERN_A
#define IFXSCULBIST_CFG_PATTERN_A
Definition: IfxScu_cfg.h:1296
IfxScuLbist_ParameterSet::application
IfxScuLbist_Application application
LBIST application selection.
Definition: IfxScuLbist.h:115
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxScuLbist_ParameterSet
configuration data structure for the LBIST parameters
Definition: IfxScuLbist.h:113
IFXSCULBIST_CFG_PATTERN_B
#define IFXSCULBIST_CFG_PATTERN_B
Definition: IfxScu_cfg.h:1300
IfxScuLbist_defaultConfig
IFX_CONST IfxScuLbist_ParameterSet IfxScuLbist_defaultConfig
Definition: IfxScuLbist.c:53
IfxScuLbist_Freq_div6
LBIST Frequency, EVR Clock Divided by 6.
Definition: IfxScuLbist.h:85
IFXSCULBIST_CFG_SIGNATURE_A
#define IFXSCULBIST_CFG_SIGNATURE_A
Definition: IfxScu_cfg.h:1281
IfxScuLbist_Application_body
LBIST Body Application.
Definition: IfxScuLbist.h:73
IFXSCULBIST_CFG_SEED
#define IFXSCULBIST_CFG_SEED
Definition: IfxScu_cfg.h:1308
IFXSCULBIST_CFG_SIGNATURE_B
#define IFXSCULBIST_CFG_SIGNATURE_B
Definition: IfxScu_cfg.h:1289
IfxScuLbist.h
SCU basic functionality.
IfxScuLbist_Application_pt
LBIST Power-train Application.
Definition: IfxScuLbist.h:72


iLLD_TC38A: IfxScuLbist.h Source File

  • Scu
  • Std
IfxScuLbist.h
Go to the documentation of this file.
1 /**
2 * \file IfxScuLbist.h
3 * \brief SCU basic functionality
4 * \ingroup IfxLld_Scu
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 * LBIST module scans and tests the digital circutary within the microcontroller.
43 * This driver provides LBIST APIs which are used to trigger the Logic BIST module.
44 * Caution: Draft implementation, APIs may change.
45 *
46 * \defgroup IfxLld_Scu_Std_Lbist Lbist Basic Functionality
47 * \ingroup IfxLld_Scu_Std
48 */
49
50 #ifndef IFXSCULBIST_H
51 #define IFXSCULBIST_H 1
52
53 /******************************************************************************/
54 /*----------------------------------Includes----------------------------------*/
55 /******************************************************************************/
56
57 #include "_Impl/IfxScu_cfg.h"
58 #include "Cpu/Std/Ifx_Types.h"
59 #include "IfxScu_reg.h"
60 #include "Scu/Std/IfxScuWdt.h"
61 #include "Cpu/Std/IfxCpu.h"
62 #include "IfxScu_bf.h"
63
64 /******************************************************************************/
65 /*-------------------------------Enumerations---------------------------------*/
66 /******************************************************************************/
67
68 /** \brief Application selection bit for LBIST
69 */
70 typedef enum
71 {
72 IfxScuLbist_Application_pt = 0, /**< \brief LBIST Power-train Application */
73 IfxScuLbist_Application_body = 1 /**< \brief LBIST Body Application */
74 } IfxScuLbist_Application;
75
76 /** \brief prescaler values to divide the EVR frequency for the LBIST operational clock
77 */
78 typedef enum
79 {
80 IfxScuLbist_Freq_div1 = 0, /**< \brief LBIST Frequency, EVR Clock Divided by 1 */
81 IfxScuLbist_Freq_div2 = 1, /**< \brief LBIST Frequency, EVR Clock Divided by 2 */
82 IfxScuLbist_Freq_div3 = 2, /**< \brief LBIST Frequency, EVR Clock Divided by 3 */
83 IfxScuLbist_Freq_div4 = 3, /**< \brief LBIST Frequency, EVR Clock Divided by 4 */
84 IfxScuLbist_Freq_div5 = 4, /**< \brief LBIST Frequency, EVR Clock Divided by 5 */
85 IfxScuLbist_Freq_div6 = 5, /**< \brief LBIST Frequency, EVR Clock Divided by 6 */
86 IfxScuLbist_Freq_div7 = 6, /**< \brief LBIST Frequency, EVR Clock Divided by 7 */
87 IfxScuLbist_Freq_div8 = 7, /**< \brief LBIST Frequency, EVR Clock Divided by 8 */
88 IfxScuLbist_Freq_div9 = 8, /**< \brief LBIST Frequency, EVR Clock Divided by 9 */
89 IfxScuLbist_Freq_div10 = 9, /**< \brief LBIST Frequency, EVR Clock Divided by 10 */
90 IfxScuLbist_Freq_div11 = 10, /**< \brief LBIST Frequency, EVR Clock Divided by 11 */
91 IfxScuLbist_Freq_div12 = 11, /**< \brief LBIST Frequency, EVR Clock Divided by 12 */
92 IfxScuLbist_Freq_div13 = 12, /**< \brief LBIST Frequency, EVR Clock Divided by 13 */
93 IfxScuLbist_Freq_div14 = 13, /**< \brief LBIST Frequency, EVR Clock Divided by 14 */
94 IfxScuLbist_Freq_div15 = 14, /**< \brief LBIST Frequency, EVR Clock Divided by 15 */
95 IfxScuLbist_Freq_div16 = 15 /**< \brief LBIST Frequency, EVR Clock Divided by 16 */
96 } IfxScuLbist_Freq;
97
98 /** \brief Split Shift Selection
99 */
100 typedef enum
101 {
102 IfxScuLbist_SplitShiftSel_allScanPartitions = 0, /**< \brief LBIST Split-Shift Concurrent Scan-Shift Selection */
103 IfxScuLbist_SplitShiftSel_fourScanPartitions = 4, /**< \brief LBIST Split-Shift Four Scan-Shift Selection */
104 IfxScuLbist_SplitShiftSel_twoScanPartitions = 5 /**< \brief LBIST Split-Shift Two Scan-Shift Selection */
105 } IfxScuLbist_SplitShiftSel;
106
107 /******************************************************************************/
108 /*-----------------------------Data Structures--------------------------------*/
109 /******************************************************************************/
110
111 /** \brief configuration data structure for the LBIST parameters
112 */
113 typedef struct
114 {
115 IfxScuLbist_Application application; /**< \brief LBIST application selection */
116 IfxScuLbist_Freq freq; /**< \brief LBIST Frequency Selection. Pre-scaler value to derive LBIST operation clock from EVR oscillator */
117 IfxScuLbist_SplitShiftSel splitShiftSel; /**< \brief LBIST Split-Shift Selection */
118 uint32 seed; /**< \brief LBIST Seed value (start value for the random pattern generator) */
119 uint32 pattern; /**< \brief LBIST Pattern Number for the scan loads */
120 uint32 scanChainLength; /**< \brief LBIST maximum scan chain length */
121 uint32 signature; /**< \brief LBIST Signature Value to compare with MISR signature from the last LBIST */
122 } IfxScuLbist_ParameterSet;
123
124 typedef struct
125 {
126 uint8 numOfConfigSets; /**< \brief Number of LBIST configuration sets */
127 IfxScuLbist_ParameterSet *parameterSets; /**< \brief Pointer to LBIST configuration set array */
128 } IfxScuLbist_MultiTriggerConfig;
129
130 /******************************************************************************/
131 /*-------------------------Inline Function Prototypes-------------------------*/
132 /******************************************************************************/
133
134 /** \brief Evaluate Previous LBIST result.
135 * Note: LBIST trigger normally resets the controller to have warm power on reset.
136 * \param signature result signature to be evaulated
137 * \return False :If the previous LBIST is not done or if the previous LBIST signature did not match with configured value.
138 * True : If the previous LBIST is done and signature did match with the configured value
139 */
140 IFX_INLINE boolean IfxScuLbist_evaluateResult(const uint32 signature);
141
142 /** \brief Init the default config parameter set
143 * \param parameterSet pointer to the datastructure which is used for triggering the latest LBIST activity.
144 * \return None
145 */
146 IFX_INLINE void IfxScuLbist_initParameterSetInline(IfxScuLbist_ParameterSet *parameterSet);
147
148 /** \brief the api returns Lbist done status
149 * \return True: Lbist done. False: Lbist not done
150 */
151 IFX_INLINE boolean IfxScuLbist_isDone(void);
152
153 /** \brief API is to trigger an LBIST test multiple times for all the configured parameters sets. This API could be triggered only if the firmware LBIST is disabled.
154 * \param multiTriggerConfig pointer to the datastructure which is used for triggering the latest LBIST activity.
155 * \return True - All the LBIST signatures are matching to the corresponding parameterSets
156 * False - If one of the the signatures from multiple LBIST triggers did not match with configured signature within corresponding parameterSet
157 */
158 IFX_INLINE boolean IfxScuLbist_multiTriggersInline(const IfxScuLbist_MultiTriggerConfig *multiTriggerConfig);
159
160 /** \brief API to re trigger an LBIST test with new parameters configured to the LBIST controller.
161 * \param parameterSet pointer to the datastructure which is used for triggering the latest LBIST activity.
162 * \return None
163 */
164 IFX_INLINE void IfxScuLbist_retriggerInline(const IfxScuLbist_ParameterSet *parameterSet);
165
166 /** \brief trigger a fresh LBIST irrespective of previous LBIST
167 * \param parameterSet pointer to the datastructure which is used for triggering the latest LBIST activity.
168 * \return None
169 */
170 IFX_INLINE void IfxScuLbist_triggerInline(const IfxScuLbist_ParameterSet *parameterSet);
171
172 /******************************************************************************/
173 /*-------------------Global Exported Variables/Constants----------------------*/
174 /******************************************************************************/
175
176 IFX_EXTERN IFX_CONST IfxScuLbist_ParameterSet IfxScuLbist_defaultConfig;
177
178 /******************************************************************************/
179 /*---------------------Inline Function Implementations------------------------*/
180 /******************************************************************************/
181
182 IFX_INLINE boolean IfxScuLbist_evaluateResult(const uint32 signature)
183 {
184 return (signature == MODULE_SCU.LBISTCTRL3.B.SIGNATURE) && (MODULE_SCU.RSTSTAT.B.LBTERM == 1U);
185 }
186
187
188 IFX_INLINE void IfxScuLbist_initParameterSetInline(IfxScuLbist_ParameterSet *parameterSet)
189 {
190 *parameterSet = IfxScuLbist_defaultConfig;
191 }
192
193
194 IFX_INLINE boolean IfxScuLbist_isDone(void)
195 {
196 return (boolean)MODULE_SCU.LBISTCTRL0.B.LBISTDONE;
197 }
198
199
200 IFX_INLINE boolean IfxScuLbist_multiTriggersInline(const IfxScuLbist_MultiTriggerConfig *multiTriggerConfig)
201 {
202 boolean returnVal = 0;
203 uint16 password;
204
205 password = IfxScuWdt_getCpuWatchdogPasswordInline(&MODULE_SCU.WDTCPU[IfxCpu_getCoreIndex()]);
206
207 /* Previous LBIST done?*/
208 if (MODULE_SCU.LBISTCTRL0.B.LBISTDONE == 1U)
209 {
210 /* Does Signature match with the param sets? */
211 if (multiTriggerConfig->parameterSets[MODULE_SCU.RSTCON2.B.USRINFO].signature == MODULE_SCU.LBISTCTRL3.B.SIGNATURE)
212 {
213 /* Is config sets which matched - the Last one in 'param set List'? */
214 if (MODULE_SCU.RSTCON2.B.USRINFO == 0)
215 {
216 returnVal = 1;
217 }
218 else
219 {
220 /* Store the "number of Config sets" to RSTCON2.USRINFO for the first time. */
221 IfxScuWdt_clearCpuEndinitInline(&MODULE_SCU.WDTCPU[IfxCpu_getCoreIndex()], password);
222 MODULE_SCU.RSTCON2.B.USRINFO -= 1;
223 IfxScuWdt_setCpuEndinitInline(&MODULE_SCU.WDTCPU[IfxCpu_getCoreIndex()], password);
224
225 /* Configure next param set and re-trigger LBIST */
226 IfxScuLbist_retriggerInline(&multiTriggerConfig->parameterSets[MODULE_SCU.RSTCON2.B.USRINFO]);
227 }
228 }
229 else
230 {
231 /* Signature failed */
232 returnVal = 0;
233 }
234 }
235 else
236 {
237 /* Store the "number of Config sets" to RSTCON2.USRINFO for the first time. */
238 IfxScuWdt_clearCpuEndinitInline(&MODULE_SCU.WDTCPU[IfxCpu_getCoreIndex()], password);
239 MODULE_SCU.RSTCON2.B.USRINFO = multiTriggerConfig->numOfConfigSets;
240 IfxScuWdt_setCpuEndinitInline(&MODULE_SCU.WDTCPU[IfxCpu_getCoreIndex()], password);
241
242 /* Configure LBIST for param set0 and trigger LBIST */
243 IfxScuLbist_triggerInline(&multiTriggerConfig->parameterSets[MODULE_SCU.RSTCON2.B.USRINFO]);
244
245 while (1)
246 {
247 __nop(); /* Wait till warm reset */
248 }
249 }
250
251 return returnVal;
252 }
253
254
255 IFX_INLINE void IfxScuLbist_retriggerInline(const IfxScuLbist_ParameterSet *parameterSet)
256 {
257 Ifx_SCU_LBISTCTRL1 LBISTCTRL1;
258 uint16 password = IfxScuWdt_getSafetyWatchdogPasswordInline();
259 IfxScuWdt_clearSafetyEndinitInline(password);
260
261 /* Reset the LBIST before re-trigger and wait till it's done */
262 MODULE_SCU.LBISTCTRL0.B.LBISTRES = 1;
263 IfxScuWdt_setSafetyEndinitInline(password);
264
265 while (MODULE_SCU.LBISTCTRL0.B.LBISTDONE == 1U)
266 {}
267
268 LBISTCTRL1.U = MODULE_SCU.LBISTCTRL1.U;
269 LBISTCTRL1.B.BODY = parameterSet->application;
270 LBISTCTRL1.B.SEED = parameterSet->seed;
271 LBISTCTRL1.B.SPLITSH = parameterSet->splitShiftSel;
272 LBISTCTRL1.B.LBISTFREQU = parameterSet->freq;
273
274 IfxScuWdt_clearSafetyEndinitInline(password);
275 MODULE_SCU.LBISTCTRL1.U = LBISTCTRL1.U;
276
277 MODULE_SCU.LBISTCTRL0.B.PATTERNS = parameterSet->pattern;
278 MODULE_SCU.LBISTCTRL0.B.LBISTREQ = 1;
279
280 while (1)
281 {
282 __nop(); /* Wait till warm reset */
283 }
284 }
285
286
287 IFX_INLINE void IfxScuLbist_triggerInline(const IfxScuLbist_ParameterSet *parameterSet)
288 {
289 IfxScuWdt_clearGlobalSafetyEndinitInline(IfxScuWdt_getGlobalSafetyEndinitPasswordInline());
290
291 MODULE_SCU.LBISTCTRL1.U =
292 (parameterSet->application << IFX_SCU_LBISTCTRL1_BODY_OFF) |
293 (parameterSet->seed << IFX_SCU_LBISTCTRL1_SEED_OFF) |
294 (parameterSet->splitShiftSel << IFX_SCU_LBISTCTRL1_SPLITSH_OFF) |
295 (parameterSet->freq << IFX_SCU_LBISTCTRL1_LBISTFREQU_OFF);
296
297 MODULE_SCU.LBISTCTRL0.B.PATTERNS = parameterSet->pattern;
298 MODULE_SCU.LBISTCTRL2.B.LENGTH = parameterSet->scanChainLength;
299 MODULE_SCU.LBISTCTRL0.U |=
300 (IFX_SCU_LBISTCTRL0_LBISTREQRED_MSK << IFX_SCU_LBISTCTRL0_LBISTREQRED_OFF) |
301 (IFX_SCU_LBISTCTRL0_LBISTREQ_MSK << IFX_SCU_LBISTCTRL0_LBISTREQ_OFF);
302 }
303
304
305 #endif /* IFXSCULBIST_H */
IfxScuWdt_setSafetyEndinitInline
IFX_INLINE void IfxScuWdt_setSafetyEndinitInline(uint16 password)
SCUWDT Inline API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.h:689
IfxScuWdt_getSafetyWatchdogPasswordInline
IFX_INLINE uint16 IfxScuWdt_getSafetyWatchdogPasswordInline(void)
SCUWDT Inline API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.h:641
IfxScuLbist_SplitShiftSel
IfxScuLbist_SplitShiftSel
Split Shift Selection.
Definition: IfxScuLbist.h:100
IfxScuLbist_ParameterSet::pattern
uint32 pattern
LBIST Pattern Number for the scan loads.
Definition: IfxScuLbist.h:119
IfxScuWdt_clearSafetyEndinitInline
IFX_INLINE void IfxScuWdt_clearSafetyEndinitInline(uint16 password)
SCUWDT Inline API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.h:581
IfxScuLbist_Freq_div7
LBIST Frequency, EVR Clock Divided by 7.
Definition: IfxScuLbist.h:86
IfxScuLbist_ParameterSet::splitShiftSel
IfxScuLbist_SplitShiftSel splitShiftSel
LBIST Split-Shift Selection.
Definition: IfxScuLbist.h:117
IfxScuLbist_Freq_div3
LBIST Frequency, EVR Clock Divided by 3.
Definition: IfxScuLbist.h:82
IfxScuLbist_SplitShiftSel_twoScanPartitions
LBIST Split-Shift Two Scan-Shift Selection.
Definition: IfxScuLbist.h:104
IfxScuLbist_defaultConfig
IFX_EXTERN IFX_CONST IfxScuLbist_ParameterSet IfxScuLbist_defaultConfig
Definition: IfxScuLbist.h:176
IfxScuLbist_Freq_div12
LBIST Frequency, EVR Clock Divided by 12.
Definition: IfxScuLbist.h:91
IfxScuLbist_Freq_div4
LBIST Frequency, EVR Clock Divided by 4.
Definition: IfxScuLbist.h:83
IfxScuLbist_SplitShiftSel_fourScanPartitions
LBIST Split-Shift Four Scan-Shift Selection.
Definition: IfxScuLbist.h:103
IfxScuWdt_clearCpuEndinitInline
IFX_INLINE void IfxScuWdt_clearCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, uint16 password)
SCUWDT Inline API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.h:548
IfxScuWdt_getCpuWatchdogPasswordInline
IFX_INLINE uint16 IfxScuWdt_getCpuWatchdogPasswordInline(Ifx_SCU_WDTCPU *watchdog)
SCUWDT Inline API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.h:604
__nop
void __nop(void) __attribute__((intrinsic_function(0x103
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxScuLbist_isDone
IFX_INLINE boolean IfxScuLbist_isDone(void)
the api returns Lbist done status
Definition: IfxScuLbist.h:194
IfxScuLbist_retriggerInline
IFX_INLINE void IfxScuLbist_retriggerInline(const IfxScuLbist_ParameterSet *parameterSet)
API to re trigger an LBIST test with new parameters configured to the LBIST controller.
Definition: IfxScuLbist.h:255
IfxScuLbist_ParameterSet::seed
uint32 seed
LBIST Seed value (start value for the random pattern generator)
Definition: IfxScuLbist.h:118
IfxScuLbist_Freq_div2
LBIST Frequency, EVR Clock Divided by 2.
Definition: IfxScuLbist.h:81
IfxScuLbist_ParameterSet::application
IfxScuLbist_Application application
LBIST application selection.
Definition: IfxScuLbist.h:115
IfxScuLbist_Freq_div15
LBIST Frequency, EVR Clock Divided by 15.
Definition: IfxScuLbist.h:94
IfxScuWdt.h
SCU basic functionality.
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxScuLbist_ParameterSet
configuration data structure for the LBIST parameters
Definition: IfxScuLbist.h:113
IfxScuLbist_MultiTriggerConfig::numOfConfigSets
uint8 numOfConfigSets
Number of LBIST configuration sets.
Definition: IfxScuLbist.h:126
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxScuLbist_Freq_div13
LBIST Frequency, EVR Clock Divided by 13.
Definition: IfxScuLbist.h:92
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxScuLbist_initParameterSetInline
IFX_INLINE void IfxScuLbist_initParameterSetInline(IfxScuLbist_ParameterSet *parameterSet)
Init the default config parameter set.
Definition: IfxScuLbist.h:188
IfxScuLbist_Freq_div16
LBIST Frequency, EVR Clock Divided by 16.
Definition: IfxScuLbist.h:95
IfxScu_cfg.h
SCU on-chip implementation data.
IfxScuLbist_Freq_div9
LBIST Frequency, EVR Clock Divided by 9.
Definition: IfxScuLbist.h:88
IfxScuLbist_Application
IfxScuLbist_Application
Application selection bit for LBIST.
Definition: IfxScuLbist.h:70
IfxScuLbist_Freq_div6
LBIST Frequency, EVR Clock Divided by 6.
Definition: IfxScuLbist.h:85
IfxScuLbist_Freq_div10
LBIST Frequency, EVR Clock Divided by 10.
Definition: IfxScuLbist.h:89
IfxScuLbist_MultiTriggerConfig
Definition: IfxScuLbist.h:124
IfxScuLbist_ParameterSet::scanChainLength
uint32 scanChainLength
LBIST maximum scan chain length.
Definition: IfxScuLbist.h:120
IfxScuLbist_multiTriggersInline
IFX_INLINE boolean IfxScuLbist_multiTriggersInline(const IfxScuLbist_MultiTriggerConfig *multiTriggerConfig)
API is to trigger an LBIST test multiple times for all the configured parameters sets. This API could be triggered only if the firmware LBIST is disabled.
Definition: IfxScuLbist.h:200
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxScuLbist_Freq
IfxScuLbist_Freq
prescaler values to divide the EVR frequency for the LBIST operational clock
Definition: IfxScuLbist.h:78
IfxScuWdt_clearGlobalSafetyEndinitInline
IFX_INLINE void IfxScuWdt_clearGlobalSafetyEndinitInline(uint16 password)
Clear the Global safety Endinit password (Inline)
Definition: IfxScuWdt.h:571
IfxScuLbist_MultiTriggerConfig::parameterSets
IfxScuLbist_ParameterSet * parameterSets
Pointer to LBIST configuration set array.
Definition: IfxScuLbist.h:127
IfxScuLbist_Application_body
LBIST Body Application.
Definition: IfxScuLbist.h:73
IfxCpu.h
CPU basic functionality.
IfxScuWdt_getGlobalSafetyEndinitPasswordInline
IFX_INLINE uint16 IfxScuWdt_getGlobalSafetyEndinitPasswordInline(void)
API to fetch current password of global safety endinit Watchdog module.
Definition: IfxScuWdt.h:624
IfxScuLbist_SplitShiftSel_allScanPartitions
LBIST Split-Shift Concurrent Scan-Shift Selection.
Definition: IfxScuLbist.h:102
IfxScuLbist_Freq_div8
LBIST Frequency, EVR Clock Divided by 8.
Definition: IfxScuLbist.h:87
IfxScuWdt_setCpuEndinitInline
IFX_INLINE void IfxScuWdt_setCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, uint16 password)
SCUWDT Inline API to Set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.h:656
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxScuLbist_evaluateResult
IFX_INLINE boolean IfxScuLbist_evaluateResult(const uint32 signature)
Evaluate Previous LBIST result. Note: LBIST trigger normally resets the controller to have warm power...
Definition: IfxScuLbist.h:182
IfxScuLbist_Freq_div11
LBIST Frequency, EVR Clock Divided by 11.
Definition: IfxScuLbist.h:90
IfxCpu_getCoreIndex
IFX_INLINE IfxCpu_ResourceCpu IfxCpu_getCoreIndex(void)
API to get cpu index of the caller CPU. Note: This api can be used whereever cpu no/index is needed...
Definition: IfxCpu.h:871
IfxScuLbist_Freq_div5
LBIST Frequency, EVR Clock Divided by 5.
Definition: IfxScuLbist.h:84
IfxScuLbist_triggerInline
IFX_INLINE void IfxScuLbist_triggerInline(const IfxScuLbist_ParameterSet *parameterSet)
trigger a fresh LBIST irrespective of previous LBIST
Definition: IfxScuLbist.h:287
IfxScuLbist_Freq_div14
LBIST Frequency, EVR Clock Divided by 14.
Definition: IfxScuLbist.h:93
IfxScuLbist_ParameterSet::freq
IfxScuLbist_Freq freq
LBIST Frequency Selection. Pre-scaler value to derive LBIST operation clock from EVR oscillator...
Definition: IfxScuLbist.h:116
IfxScuLbist_Freq_div1
LBIST Frequency, EVR Clock Divided by 1.
Definition: IfxScuLbist.h:80
IfxScuLbist_ParameterSet::signature
uint32 signature
LBIST Signature Value to compare with MISR signature from the last LBIST.
Definition: IfxScuLbist.h:121
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxScuLbist_Application_pt
LBIST Power-train Application.
Definition: IfxScuLbist.h:72


iLLD_TC38A: IfxScuRcu.c Source File

  • Scu
  • Std
IfxScuRcu.c
Go to the documentation of this file.
1 /**
2 * \file IfxScuRcu.c
3 * \brief SCU basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 *
41 */
42
43 /******************************************************************************/
44 /*----------------------------------Includes----------------------------------*/
45 /******************************************************************************/
46
47 #include "IfxScuRcu.h"
48
49 /******************************************************************************/
50 /*----------------------------------Macros------------------------------------*/
51 /******************************************************************************/
52
53 #define IFXSCURCU_PERFORM_RESET_DELAY (90000U)
54
55 /******************************************************************************/
56 /*-------------------------Function Implementations---------------------------*/
57 /******************************************************************************/
58
59 IfxScuRcu_ResetCode IfxScuRcu_evaluateReset(void)
60 {
61 Ifx_SCU_RSTCON Rstcon;
62 Ifx_SCU_RSTSTAT RstStat;
63 IfxScuRcu_ResetCode resetCode;
64 resetCode.cpuSafeState = (((MODULE_SCU.RSTCON2.U >> IFX_SCU_RSTCON2_CSSX_OFF) & IFX_SCU_RSTCON2_CSSX_MSK) == IFX_SCU_RSTCON2_CSSX_MSK);
65 resetCode.resetType = IfxScuRcu_ResetType_undefined;
66 resetCode.resetTrigger = IfxScuRcu_Trigger_undefined;
67 resetCode.resetReason = 0;
68
69 RstStat.U = MODULE_SCU.RSTSTAT.U;
70 Rstcon.U = MODULE_SCU.RSTCON.U;
71
72 /* Evaluate the warm reset conditions first */
73 if (RstStat.B.ESR0)
74 {
75 resetCode.resetType = (IfxScuRcu_ResetType)Rstcon.B.ESR0;
76 resetCode.resetTrigger = IfxScuRcu_Trigger_esr0;
77 resetCode.resetReason = 0;
78 }
79 else if (RstStat.B.ESR1)
80 {
81 resetCode.resetType = (IfxScuRcu_ResetType)Rstcon.B.ESR1;
82 resetCode.resetTrigger = IfxScuRcu_Trigger_esr1;
83 resetCode.resetReason = 0;
84 }
85 else if (RstStat.B.SMU)
86 {
87 resetCode.resetType = (IfxScuRcu_ResetType)Rstcon.B.SMU;
88 resetCode.resetTrigger = IfxScuRcu_Trigger_smu;
89 resetCode.resetReason = 0;
90 }
91 else if (RstStat.B.SW)
92 {
93 resetCode.resetType = (IfxScuRcu_ResetType)Rstcon.B.SW;
94 resetCode.resetTrigger = IfxScuRcu_Trigger_sw;
95 resetCode.resetReason = MODULE_SCU.RSTCON2.B.USRINFO;
96 }
97 else if (RstStat.B.STM0)
98 {
99 resetCode.resetType = (IfxScuRcu_ResetType)Rstcon.B.STM0;
100 resetCode.resetTrigger = IfxScuRcu_Trigger_stm0;
101 resetCode.resetReason = 0;
102 }
103 else if (RstStat.B.STM1)
104 {
105 resetCode.resetType = (IfxScuRcu_ResetType)Rstcon.B.STM1;
106 resetCode.resetTrigger = IfxScuRcu_Trigger_stm1;
107 resetCode.resetReason = 0;
108 }
109 else if (RstStat.B.STM2)
110 {
111 resetCode.resetType = (IfxScuRcu_ResetType)Rstcon.B.STM2;
112 resetCode.resetTrigger = IfxScuRcu_Trigger_stm2;
113 resetCode.resetReason = 0;
114 }
115 else if (RstStat.B.STM3)
116 {
117 resetCode.resetType = (IfxScuRcu_ResetType)Rstcon.B.STM3;
118 resetCode.resetTrigger = IfxScuRcu_Trigger_stm3;
119 resetCode.resetReason = 0;
120 }
121
122 else if (RstStat.B.CB0)
123 {
124 resetCode.resetType = IfxScuRcu_ResetType_system;
125 resetCode.resetTrigger = IfxScuRcu_Trigger_cb0;
126 resetCode.resetReason = 0;
127 }
128 else if (RstStat.B.CB1)
129 {
130 resetCode.resetType = IfxScuRcu_ResetType_debug;
131 resetCode.resetTrigger = IfxScuRcu_Trigger_cb1;
132 resetCode.resetReason = 0;
133 }
134 else if (RstStat.B.CB3)
135 {
136 resetCode.resetType = IfxScuRcu_ResetType_application;
137 resetCode.resetTrigger = IfxScuRcu_Trigger_cb3;
138 resetCode.resetReason = 0;
139 }
140 else
141 {
142 /* Now evaluate for Cold reset conditions */
143 if (RstStat.B.EVRC)
144 {
145 resetCode.resetType = IfxScuRcu_ResetType_coldpoweron;
146 resetCode.resetTrigger = IfxScuRcu_Trigger_evrc;
147 resetCode.resetReason = 0;
148 }
149 else if (RstStat.B.EVR33)
150 {
151 resetCode.resetType = IfxScuRcu_ResetType_coldpoweron;
152 resetCode.resetTrigger = IfxScuRcu_Trigger_evr33;
153 resetCode.resetReason = 0;
154 }
155 else if (RstStat.B.SWD)
156 {
157 resetCode.resetType = IfxScuRcu_ResetType_coldpoweron;
158 resetCode.resetTrigger = IfxScuRcu_Trigger_swd;
159 resetCode.resetReason = 0;
160 }
161 else if (RstStat.B.STBYR)
162 {
163 resetCode.resetType = IfxScuRcu_ResetType_coldpoweron;
164 resetCode.resetTrigger = IfxScuRcu_Trigger_stbyr;
165 resetCode.resetReason = 0;
166 }
167 }
168
169 /* Finally - Evaluate selectively for PORST */
170 if (RstStat.B.PORST)
171 {
172 if (resetCode.resetType != IfxScuRcu_ResetType_coldpoweron)
173 {
174 resetCode.resetType = IfxScuRcu_ResetType_warmpoweron;
175 resetCode.resetTrigger = IfxScuRcu_Trigger_portst;
176 }
177
178 resetCode.resetReason = 0;
179 }
180
181 return resetCode;
182 }
183
184
185 void IfxScuRcu_performReset(IfxScuRcu_ResetType resetType, uint16 userResetInfo)
186 {
187 uint32 index;
188 uint16 password;
189
190 password = IfxScuWdt_getSafetyWatchdogPassword();
191 IfxScuWdt_clearSafetyEndinitInline(password);
192
193 /* Write the Reset Type - Application or System Reset */
194 if (IfxScuRcu_ResetType_system == resetType)
195 {
196 MODULE_SCU.RSTCON.B.SW = 1; /* System Reset */
197 }
198 else
199 {
200 MODULE_SCU.RSTCON.B.SW = 2; /* Application Reset */
201 }
202
203 /* SWRSTCON and RSTCON2 are CPU endinit protected - clear end init protection */
204 password = IfxScuWdt_getCpuWatchdogPasswordInline(&MODULE_SCU.WDTCPU[IfxCpu_getCoreIndex()]);
205
206 IfxScuWdt_clearCpuEndinitInline(&MODULE_SCU.WDTCPU[IfxCpu_getCoreIndex()], password);
207 /* Write the user DATA to reset evaluation */
208 MODULE_SCU.RSTCON2.B.USRINFO = userResetInfo;
209
210 /* software Reset can be performed by writing to Reset Request register SWRSTCON */
211 MODULE_SCU.SWRSTCON.B.SWRSTREQ = 1U;
212
213 /* Add some delay for HW to reset */
214 for (index = 0U; index < (uint32)IFXSCURCU_PERFORM_RESET_DELAY; index++)
215 {}
216
217 /*IfxScu_Wdt_enableSafetyEndinit() is not needed, as the micro would RESET */
218 /* IfxScuWdt_setCpuEndinitInline() is not needed, as the micro would RESET */
219 }
IfxScuRcu_ResetCode::resetTrigger
IfxScuRcu_Trigger resetTrigger
reset Trigger
Definition: IfxScuRcu.h:140
IfxScuRcu_Trigger_evrc
EVRC.
Definition: IfxScuRcu.h:123
IfxScuRcu_Trigger_portst
PORTST.
Definition: IfxScuRcu.h:117
IfxScuWdt_clearSafetyEndinitInline
IFX_INLINE void IfxScuWdt_clearSafetyEndinitInline(uint16 password)
SCUWDT Inline API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.h:581
IfxScuRcu.h
SCU basic functionality.
IfxScuRcu_ResetCode::cpuSafeState
boolean cpuSafeState
CPU Safe state ( 1- Safe, 0 - Non-Safe)
Definition: IfxScuRcu.h:138
IfxScuWdt_clearCpuEndinitInline
IFX_INLINE void IfxScuWdt_clearCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, uint16 password)
SCUWDT Inline API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.h:548
IfxScuRcu_ResetType_undefined
Undefined Reset.
Definition: IfxScuRcu.h:102
IfxScuRcu_Trigger_esr1
ESR1.
Definition: IfxScuRcu.h:110
IfxScuWdt_getCpuWatchdogPasswordInline
IFX_INLINE uint16 IfxScuWdt_getCpuWatchdogPasswordInline(Ifx_SCU_WDTCPU *watchdog)
SCUWDT Inline API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.h:604
IfxScuRcu_Trigger_cb0
Cerberus System Reset.
Definition: IfxScuRcu.h:118
IFXSCURCU_PERFORM_RESET_DELAY
#define IFXSCURCU_PERFORM_RESET_DELAY
Definition: IfxScuRcu.c:53
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxScuRcu_ResetType_warmpoweron
Warm Power On Reset.
Definition: IfxScuRcu.h:100
IfxScuRcu_Trigger_stm1
STM1 Compare Match.
Definition: IfxScuRcu.h:114
IfxScuRcu_Trigger_swd
Supply Watchdog.
Definition: IfxScuRcu.h:125
IfxScuRcu_Trigger_esr0
ESR0.
Definition: IfxScuRcu.h:109
IfxScuRcu_Trigger_sw
SW.
Definition: IfxScuRcu.h:112
IfxScuRcu_ResetCode::resetType
IfxScuRcu_ResetType resetType
Reset Type.
Definition: IfxScuRcu.h:139
IfxScuRcu_Trigger_cb1
Cerberus Debug Reset.
Definition: IfxScuRcu.h:119
IfxScuRcu_Trigger_stm3
STM3 Compare Match.
Definition: IfxScuRcu.h:116
IfxScuRcu_ResetCode::resetReason
uint16 resetReason
Reset Reason.
Definition: IfxScuRcu.h:141
IfxScuRcu_ResetType_application
application reset
Definition: IfxScuRcu.h:99
IfxScuRcu_ResetType_debug
debug reset
Definition: IfxScuRcu.h:101
IfxScuRcu_Trigger_cb3
Cerberus Application Reset.
Definition: IfxScuRcu.h:120
IfxScuRcu_Trigger_stm0
STM0 Compare Match.
Definition: IfxScuRcu.h:113
IfxScuRcu_ResetType
IfxScuRcu_ResetType
Reset type.
Definition: IfxScuRcu.h:95
IfxScuRcu_Trigger_evr33
EVR33.
Definition: IfxScuRcu.h:124
IfxScuRcu_ResetType_coldpoweron
Cold Power On Reset.
Definition: IfxScuRcu.h:97
IfxScuRcu_performReset
void IfxScuRcu_performReset(IfxScuRcu_ResetType resetType, uint16 userResetInfo)
This function triggers system/application reset via software.
Definition: IfxScuRcu.c:185
IfxScuRcu_evaluateReset
IfxScuRcu_ResetCode IfxScuRcu_evaluateReset(void)
This function Evaluate the Reset and returns the reset cause/details.
Definition: IfxScuRcu.c:59
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxScuWdt_getSafetyWatchdogPassword
uint16 IfxScuWdt_getSafetyWatchdogPassword(void)
SCUWDT API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.c:393
IfxScuRcu_ResetType_system
system Reset
Definition: IfxScuRcu.h:98
IfxCpu_getCoreIndex
IFX_INLINE IfxCpu_ResourceCpu IfxCpu_getCoreIndex(void)
API to get cpu index of the caller CPU. Note: This api can be used whereever cpu no/index is needed...
Definition: IfxCpu.h:871
IfxScuRcu_Trigger_undefined
Undefined Value.
Definition: IfxScuRcu.h:129
IfxScuRcu_Trigger_smu
SMU.
Definition: IfxScuRcu.h:111
IfxScuRcu_Trigger_stbyr
Standby Regulator Watchdog.
Definition: IfxScuRcu.h:128
IfxScuRcu_ResetCode
Definition: IfxScuRcu.h:136
IfxScuRcu_Trigger_stm2
STM2 Compare Match.
Definition: IfxScuRcu.h:115


iLLD_TC38A: IfxScuRcu.h Source File

  • Scu
  • Std
IfxScuRcu.h
Go to the documentation of this file.
1 /**
2 * \file IfxScuRcu.h
3 * \brief SCU basic functionality
4 * \ingroup IfxLld_Scu
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 * This file contains the APIs for Reset related functions.
43 * Caution: Draft implementation, APIs may change.
44 *
45 * \defgroup IfxLld_Scu_Std_Rcu Rcu Basic Functionality
46 * \ingroup IfxLld_Scu_Std
47 */
48
49 #ifndef IFXSCURCU_H
50 #define IFXSCURCU_H 1
51
52 /******************************************************************************/
53 /*----------------------------------Includes----------------------------------*/
54 /******************************************************************************/
55
56 #include "_Impl/IfxScu_cfg.h"
57 #include "Cpu/Std/Ifx_Types.h"
58 #include "IfxScu_reg.h"
59 #include "Scu/Std/IfxScuWdt.h"
60 #include "Cpu/Std/IfxCpu.h"
61
62 /******************************************************************************/
63 /*-----------------------------------Macros-----------------------------------*/
64 /******************************************************************************/
65
66 /** \brief PowerOn Reset Mask
67 */
68 #define IFXSCURCU_POWERONRESET_MASK \
69 ((IFX_SCU_RSTSTAT_STBYR_MSK << IFX_SCU_RSTSTAT_STBYR_OFF) | \
70 (IFX_SCU_RSTSTAT_SWD_MSK << IFX_SCU_RSTSTAT_SWD_OFF) | \
71 (IFX_SCU_RSTSTAT_EVR33_MSK << IFX_SCU_RSTSTAT_EVR33_OFF) | \
72 (IFX_SCU_RSTSTAT_EVRC_MSK << IFX_SCU_RSTSTAT_EVRC_OFF) | \
73 (IFX_SCU_RSTSTAT_CB1_MSK << IFX_SCU_RSTSTAT_CB1_OFF) | \
74 (IFX_SCU_RSTSTAT_CB0_MSK << IFX_SCU_RSTSTAT_CB0_OFF) | \
75 (IFX_SCU_RSTSTAT_PORST_MSK << IFX_SCU_RSTSTAT_PORST_OFF))
76
77 /** \brief Application Reset Mask
78 */
79 #define IFXSCURCU_APPLICATIONRESET_MASK \
80 ((IFX_SCU_RSTSTAT_SW_MSK << IFX_SCU_RSTSTAT_SW_OFF) | \
81 (IFX_SCU_RSTSTAT_STM3_MSK << IFX_SCU_RSTSTAT_STM3_OFF) | \
82 (IFX_SCU_RSTSTAT_STM2_MSK << IFX_SCU_RSTSTAT_STM2_OFF) | \
83 (IFX_SCU_RSTSTAT_STM1_MSK << IFX_SCU_RSTSTAT_STM1_OFF) | \
84 (IFX_SCU_RSTSTAT_STM0_MSK << IFX_SCU_RSTSTAT_STM0_OFF) | \
85 (IFX_SCU_RSTSTAT_SMU_MSK << IFX_SCU_RSTSTAT_SMU_OFF) | \
86 (IFX_SCU_RSTSTAT_ESR1_MSK << IFX_SCU_RSTSTAT_ESR1_OFF) | \
87 (IFX_SCU_RSTSTAT_ESR0_MSK << IFX_SCU_RSTSTAT_ESR0_OFF))
88
89 /******************************************************************************/
90 /*-------------------------------Enumerations---------------------------------*/
91 /******************************************************************************/
92
93 /** \brief Reset type
94 */
95 typedef enum
96 {
97 IfxScuRcu_ResetType_coldpoweron = 0, /**< \brief Cold Power On Reset */
98 IfxScuRcu_ResetType_system = 1, /**< \brief system Reset */
99 IfxScuRcu_ResetType_application = 2, /**< \brief application reset */
100 IfxScuRcu_ResetType_warmpoweron = 3, /**< \brief Warm Power On Reset */
101 IfxScuRcu_ResetType_debug = 4, /**< \brief debug reset */
102 IfxScuRcu_ResetType_undefined = 5 /**< \brief Undefined Reset */
103 } IfxScuRcu_ResetType;
104
105 /** \brief Reset Trigger
106 */
107 typedef enum
108 {
109 IfxScuRcu_Trigger_esr0 = 0, /**< \brief ESR0 */
110 IfxScuRcu_Trigger_esr1 = 1, /**< \brief ESR1 */
111 IfxScuRcu_Trigger_smu = 3, /**< \brief SMU */
112 IfxScuRcu_Trigger_sw = 4, /**< \brief SW */
113 IfxScuRcu_Trigger_stm0 = 5, /**< \brief STM0 Compare Match */
114 IfxScuRcu_Trigger_stm1 = 6, /**< \brief STM1 Compare Match */
115 IfxScuRcu_Trigger_stm2 = 7, /**< \brief STM2 Compare Match */
116 IfxScuRcu_Trigger_stm3 = 8, /**< \brief STM3 Compare Match */
117 IfxScuRcu_Trigger_portst = 16, /**< \brief PORTST */
118 IfxScuRcu_Trigger_cb0 = 18, /**< \brief Cerberus System Reset */
119 IfxScuRcu_Trigger_cb1 = 19, /**< \brief Cerberus Debug Reset */
120 IfxScuRcu_Trigger_cb3 = 20, /**< \brief Cerberus Application Reset */
121 IfxScuRcu_Trigger_tp = 21, /**< \brief Tuning protection */
122 IfxScuRcu_Trigger_tcu = 22, /**< \brief TCU */
123 IfxScuRcu_Trigger_evrc = 23, /**< \brief EVRC */
124 IfxScuRcu_Trigger_evr33 = 24, /**< \brief EVR33 */
125 IfxScuRcu_Trigger_swd = 25, /**< \brief Supply Watchdog */
126 IfxScuRcu_Trigger_hsms = 26, /**< \brief HSM System Reset */
127 IfxScuRcu_Trigger_hsma = 27, /**< \brief HSM Application Reset */
128 IfxScuRcu_Trigger_stbyr = 28, /**< \brief Standby Regulator Watchdog */
129 IfxScuRcu_Trigger_undefined = 255 /**< \brief Undefined Value */
130 } IfxScuRcu_Trigger;
131
132 /******************************************************************************/
133 /*-----------------------------Data Structures--------------------------------*/
134 /******************************************************************************/
135
136 typedef struct
137 {
138 boolean cpuSafeState; /**< \brief CPU Safe state ( 1- Safe, 0 - Non-Safe) */
139 IfxScuRcu_ResetType resetType; /**< \brief Reset Type */
140 IfxScuRcu_Trigger resetTrigger; /**< \brief reset Trigger */
141 uint16 resetReason; /**< \brief Reset Reason */
142 } IfxScuRcu_ResetCode;
143
144 /******************************************************************************/
145 /*-------------------------Inline Function Prototypes-------------------------*/
146 /******************************************************************************/
147
148 /** \brief API to clear the Cold Reset Status
149 * \return None
150 */
151 IFX_INLINE void IfxScuRcu_clearColdResetStatus(void);
152
153 /** \brief This function configures the request trigger in the Reset Configuration Register
154 * \return None
155 */
156 IFX_INLINE void IfxScuRcu_configureResetRequestTrigger(IfxScuRcu_Trigger trigger, IfxScuRcu_ResetType resetType);
157
158 /** \brief API to check if the previous reset is application reset or not.
159 * \return returns application reset (1) or not (0)
160 */
161 IFX_INLINE boolean IfxScuRcu_isApplicationReset(uint32 rawResetStatus);
162
163 /** \brief API reads and returns the raw reset value from the hardware register.
164 * \return Raw reset status
165 */
166 IFX_INLINE uint32 IfxScuRcu_readRawResetStatus(void);
167
168 /******************************************************************************/
169 /*-------------------------Global Function Prototypes-------------------------*/
170 /******************************************************************************/
171
172 /** \brief This function Evaluate the Reset and returns the reset cause/details.
173 * \return Reset code which contains Reset type, trigger and reason details.
174 */
175 IFX_EXTERN IfxScuRcu_ResetCode IfxScuRcu_evaluateReset(void);
176
177 /** \brief This function triggers system/application reset via software.
178 * \param resetType reset type (only application and system reset are valid)
179 * \param userResetInfo user Reset Information
180 * \return None
181 */
182 IFX_EXTERN void IfxScuRcu_performReset(IfxScuRcu_ResetType resetType, uint16 userResetInfo);
183
184 /******************************************************************************/
185 /*---------------------Inline Function Implementations------------------------*/
186 /******************************************************************************/
187
188 IFX_INLINE void IfxScuRcu_clearColdResetStatus(void)
189 {
190 uint16 password;
191
192 password = IfxScuWdt_getCpuWatchdogPasswordInline(&MODULE_SCU.WDTCPU[IfxCpu_getCoreIndex()]);
193 IfxScuWdt_clearCpuEndinitInline(&MODULE_SCU.WDTCPU[IfxCpu_getCoreIndex()], password);
194 /* Clear Cold Reset status */
195 MODULE_SCU.RSTCON2.B.CLRC = 1U;
196 IfxScuWdt_setCpuEndinitInline(&MODULE_SCU.WDTCPU[IfxCpu_getCoreIndex()], password);
197 }
198
199
200 IFX_INLINE void IfxScuRcu_configureResetRequestTrigger(IfxScuRcu_Trigger trigger, IfxScuRcu_ResetType resetType)
201 {
202 Ifx_SCU_RSTCON Rstcon;
203 uint8 resetConfig = 2; /* Default - Application reset */
204 uint16 password;
205 password = IfxScuWdt_getSafetyWatchdogPassword();
206 Rstcon.U = MODULE_SCU.RSTCON.U;
207
208 if (resetType == IfxScuRcu_ResetType_system)
209 {
210 resetConfig = 1;
211 }
212
213 switch (trigger)
214 {
215 case IfxScuRcu_Trigger_esr0:
216 Rstcon.B.ESR0 = resetConfig;
217 break;
218 case IfxScuRcu_Trigger_esr1:
219 Rstcon.B.ESR1 = resetConfig;
220 break;
221 case IfxScuRcu_Trigger_smu:
222 Rstcon.B.SMU = resetConfig;
223 break;
224 case IfxScuRcu_Trigger_sw:
225 Rstcon.B.SW = resetConfig;
226 break;
227 case IfxScuRcu_Trigger_stm0:
228 Rstcon.B.STM0 = resetConfig;
229 break;
230 case IfxScuRcu_Trigger_stm1:
231 Rstcon.B.STM1 = resetConfig;
232 break;
233 case IfxScuRcu_Trigger_stm2:
234 Rstcon.B.STM2 = resetConfig;
235 break;
236 case IfxScuRcu_Trigger_stm3:
237 Rstcon.B.STM3 = resetConfig;
238 break;
239 default:
240 break;
241 }
242
243 IfxScuWdt_clearSafetyEndinitInline(password);
244
245 MODULE_SCU.RSTCON.U = Rstcon.U;
246 IfxScuWdt_setSafetyEndinit(password);
247 }
248
249
250 IFX_INLINE boolean IfxScuRcu_isApplicationReset(uint32 rawResetStatus)
251 {
252 boolean returnVal;
253 uint32 tempValue;
254
255 if ((rawResetStatus & IFXSCURCU_POWERONRESET_MASK) > 0)
256 {
257 returnVal = 0;
258 }
259 else if ((rawResetStatus & IFXSCURCU_APPLICATIONRESET_MASK) > 0) // CB3 TP HSMA ??
260 {
261 // get the bit which is set at RSTSTAT (assumption: RSTSTAT register was cleared before and only one bit can be set)
262 tempValue = rawResetStatus & IFXSCURCU_APPLICATIONRESET_MASK;
263 tempValue = (SCU_RSTCON.U >> ((31U - __clz(tempValue)) * 2)) & 3U;
264
265 if (tempValue == 2)
266 {
267 returnVal = 1;
268 }
269 else
270 {
271 returnVal = 0;
272 }
273 }
274 else if ((rawResetStatus & (IFX_SCU_RSTSTAT_CB3_MSK << IFX_SCU_RSTSTAT_CB3_OFF)))
275 {
276 // CB3 reset is not configurable and is always application reset
277 returnVal = 1;
278 }
279 else if (CPU0_KRST0.B.RSTSTAT != 0) /*CPU0 KRST status */
280 {
281 returnVal = 1;
282 }
283 else
284 {
285 returnVal = 0;
286 }
287
288 return returnVal;
289 }
290
291
292 IFX_INLINE uint32 IfxScuRcu_readRawResetStatus(void)
293 {
294 return MODULE_SCU.RSTSTAT.U;
295 }
296
297
298 #endif /* IFXSCURCU_H */
IfxScuRcu_ResetCode::resetTrigger
IfxScuRcu_Trigger resetTrigger
reset Trigger
Definition: IfxScuRcu.h:140
IfxScuRcu_Trigger_evrc
EVRC.
Definition: IfxScuRcu.h:123
IfxScuRcu_Trigger_tcu
TCU.
Definition: IfxScuRcu.h:122
IfxScuRcu_Trigger_portst
PORTST.
Definition: IfxScuRcu.h:117
__clz
sint32 __clz(sint32) __attribute__((intrinsic_pseudo(1
IfxScuWdt_clearSafetyEndinitInline
IFX_INLINE void IfxScuWdt_clearSafetyEndinitInline(uint16 password)
SCUWDT Inline API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.h:581
IfxScuRcu_Trigger_hsms
HSM System Reset.
Definition: IfxScuRcu.h:126
IfxScuRcu_readRawResetStatus
IFX_INLINE uint32 IfxScuRcu_readRawResetStatus(void)
API reads and returns the raw reset value from the hardware register.
Definition: IfxScuRcu.h:292
IfxScuRcu_ResetCode::cpuSafeState
boolean cpuSafeState
CPU Safe state ( 1- Safe, 0 - Non-Safe)
Definition: IfxScuRcu.h:138
IfxScuWdt_clearCpuEndinitInline
IFX_INLINE void IfxScuWdt_clearCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, uint16 password)
SCUWDT Inline API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.h:548
IfxScuRcu_evaluateReset
IFX_EXTERN IfxScuRcu_ResetCode IfxScuRcu_evaluateReset(void)
This function Evaluate the Reset and returns the reset cause/details.
Definition: IfxScuRcu.c:59
IfxScuRcu_ResetType_undefined
Undefined Reset.
Definition: IfxScuRcu.h:102
IfxScuRcu_Trigger_esr1
ESR1.
Definition: IfxScuRcu.h:110
IfxScuWdt_getCpuWatchdogPasswordInline
IFX_INLINE uint16 IfxScuWdt_getCpuWatchdogPasswordInline(Ifx_SCU_WDTCPU *watchdog)
SCUWDT Inline API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.h:604
IfxScuRcu_Trigger_cb0
Cerberus System Reset.
Definition: IfxScuRcu.h:118
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxScuRcu_ResetType_warmpoweron
Warm Power On Reset.
Definition: IfxScuRcu.h:100
IfxScuRcu_isApplicationReset
IFX_INLINE boolean IfxScuRcu_isApplicationReset(uint32 rawResetStatus)
API to check if the previous reset is application reset or not.
Definition: IfxScuRcu.h:250
IfxScuRcu_Trigger_stm1
STM1 Compare Match.
Definition: IfxScuRcu.h:114
IfxScuRcu_Trigger_hsma
HSM Application Reset.
Definition: IfxScuRcu.h:127
IfxScuRcu_Trigger_swd
Supply Watchdog.
Definition: IfxScuRcu.h:125
IfxScuRcu_Trigger_esr0
ESR0.
Definition: IfxScuRcu.h:109
IfxScuRcu_Trigger_sw
SW.
Definition: IfxScuRcu.h:112
IfxScuRcu_ResetCode::resetType
IfxScuRcu_ResetType resetType
Reset Type.
Definition: IfxScuRcu.h:139
IfxScuRcu_clearColdResetStatus
IFX_INLINE void IfxScuRcu_clearColdResetStatus(void)
API to clear the Cold Reset Status.
Definition: IfxScuRcu.h:188
IfxScuRcu_Trigger_cb1
Cerberus Debug Reset.
Definition: IfxScuRcu.h:119
IfxScuRcu_Trigger_stm3
STM3 Compare Match.
Definition: IfxScuRcu.h:116
IfxScuRcu_ResetCode::resetReason
uint16 resetReason
Reset Reason.
Definition: IfxScuRcu.h:141
IFXSCURCU_POWERONRESET_MASK
#define IFXSCURCU_POWERONRESET_MASK
PowerOn Reset Mask.
Definition: IfxScuRcu.h:68
IfxScuRcu_ResetType_application
application reset
Definition: IfxScuRcu.h:99
IfxScuRcu_performReset
IFX_EXTERN void IfxScuRcu_performReset(IfxScuRcu_ResetType resetType, uint16 userResetInfo)
This function triggers system/application reset via software.
Definition: IfxScuRcu.c:185
IfxScuWdt.h
SCU basic functionality.
IfxScuRcu_Trigger_tp
Tuning protection.
Definition: IfxScuRcu.h:121
IfxScuRcu_Trigger
IfxScuRcu_Trigger
Reset Trigger.
Definition: IfxScuRcu.h:107
IfxScuRcu_ResetType_debug
debug reset
Definition: IfxScuRcu.h:101
IfxScuRcu_Trigger_cb3
Cerberus Application Reset.
Definition: IfxScuRcu.h:120
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxScuRcu_configureResetRequestTrigger
IFX_INLINE void IfxScuRcu_configureResetRequestTrigger(IfxScuRcu_Trigger trigger, IfxScuRcu_ResetType resetType)
This function configures the request trigger in the Reset Configuration Register. ...
Definition: IfxScuRcu.h:200
IfxScu_cfg.h
SCU on-chip implementation data.
IFXSCURCU_APPLICATIONRESET_MASK
#define IFXSCURCU_APPLICATIONRESET_MASK
Application Reset Mask.
Definition: IfxScuRcu.h:79
IfxScuRcu_Trigger_stm0
STM0 Compare Match.
Definition: IfxScuRcu.h:113
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxScuRcu_ResetType
IfxScuRcu_ResetType
Reset type.
Definition: IfxScuRcu.h:95
IfxScuRcu_Trigger_evr33
EVR33.
Definition: IfxScuRcu.h:124
IfxScuRcu_ResetType_coldpoweron
Cold Power On Reset.
Definition: IfxScuRcu.h:97
IfxCpu.h
CPU basic functionality.
IfxScuWdt_setCpuEndinitInline
IFX_INLINE void IfxScuWdt_setCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, uint16 password)
SCUWDT Inline API to Set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.h:656
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxScuWdt_setSafetyEndinit
void IfxScuWdt_setSafetyEndinit(uint16 password)
SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:668
IfxScuWdt_getSafetyWatchdogPassword
uint16 IfxScuWdt_getSafetyWatchdogPassword(void)
SCUWDT API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.c:393
IfxScuRcu_ResetType_system
system Reset
Definition: IfxScuRcu.h:98
IfxCpu_getCoreIndex
IFX_INLINE IfxCpu_ResourceCpu IfxCpu_getCoreIndex(void)
API to get cpu index of the caller CPU. Note: This api can be used whereever cpu no/index is needed...
Definition: IfxCpu.h:871
IfxScuRcu_Trigger_undefined
Undefined Value.
Definition: IfxScuRcu.h:129
IfxScuRcu_Trigger_smu
SMU.
Definition: IfxScuRcu.h:111
IfxScuRcu_Trigger_stbyr
Standby Regulator Watchdog.
Definition: IfxScuRcu.h:128
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxScuRcu_ResetCode
Definition: IfxScuRcu.h:136
IfxScuRcu_Trigger_stm2
STM2 Compare Match.
Definition: IfxScuRcu.h:115


iLLD_TC38A: IfxScuWdt.asm.h Source File

  • Scu
  • Std
IfxScuWdt.asm.h
Go to the documentation of this file.
1 /**
2 * \file IfxScuWdt.asm.h
3 * \brief SCU basic functionality
4 * \ingroup IfxLld_Scu
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Scu_Std_Wdt_Operative Wdt Operative Functionality
42 * \ingroup IfxLld_Scu_Std_Wdt
43 */
44 #ifndef IFXSCUWDT_ASM_H
45 #define IFXSCUWDT_ASM_H 1
46
47 #include "Cpu/Std/Ifx_Types.h"
48 #include "IfxScu_reg.h"
49
50 /** \addtogroup IfxLld_Scu_Std_Wdt_Operative
51 * \{ */
52 #define IFXSCUWDT_CALCULATELFSR(pwd) ((((((pwd) >> 13) ^ ((pwd) >> 12) ^ ((pwd) >> 11) ^ ((pwd) >> 1 )) & 1)) | (((pwd)<<1) & 0x3FFF))
53 /**
54 * \brief SCUWDT Inline API utility to Calculte new 14-bit LFSR.
55 *
56 * This API will Calculte new 14-bit LFSR (Linear Feedback Shift Register) with characteristic polynomial
57 * x14+x13+x12+x2+1.
58 *
59 * \param password Password for which LFSR value to be calculated.
60 * \return New LFSR.
61 */
62 IFX_INLINE uint16 IfxScuWdt_calculateLfsr(uint16 password);
63 /** \} */
64
65 /**
66 * \brief SCUWDT Inline API utility to Calculte new 14-bit LFSR.
67 */
68 #if defined(__HIGHTEC__)
69 IFX_INLINE uint16 IfxScuWdt_calculateLfsr(uint16 pwd)
70 {
71 /* *INDENT-OFF* */
72 uint32 temp = pwd;
73 uint16 res;
74
75 __asm("xor.t %0,%1,13,%1,12 \n\
76 xor.t %0,%0,0,%1,11 \n\
77 sh.xor.t %1,%0,0,%1,1 \n\
78 extr.u %0,%1,0,14 \n" : "=&d" (res) : "d" (temp));
79 return res;
80 /* *INDENT-ON* */
81 }
82 #endif
83 #if defined(__TASKING__)
84 IFX_INLINE uint16 IfxScuWdt_calculateLfsr(uint16 pwd)
85 {
86 /* *INDENT-OFF* */
87 uint32 temp = pwd;
88 uint16 res;
89
90 __asm("xor.t %0,%1,13,%1,12 \n\
91 xor.t %0,%0,0,%1,11 \n\
92 sh.xor.t %1,%0,0,%1,1 \n\
93 mov d4,#0 \n\
94 mov d5,#14 \n\
95 extr.u %0,%1,e4 \n" : "=&d" (res) : "d" (temp));
96 return res;
97 /* *INDENT-ON* */
98 }
99 #endif
100 #if defined(__DCC__)
101 /* *INDENT-OFF* */
102 asm uint16 IfxScuWdt_calculateLfsr_asm(uint16 password)
103 {
104 %reg password
105 !"%d2"
106 xor.t %d2, password, 13, password, 12
107 xor.t %d2, %d2, 0, password, 11
108 sh.xor.t password,%d2,0,password,1
109 extr.u %d2,password,0,14
110 }
111 /* *INDENT-ON* */
112 IFX_INLINE uint16 IfxScuWdt_calculateLfsr(uint16 pwd)
113 {
114 return IfxScuWdt_calculateLfsr_asm(pwd);
115 }
116 #endif
117 #if defined(__ghs__)
118 IFX_INLINE uint16 IfxScuWdt_calculateLfsr(uint16 pwd)
119 {
120 /* *INDENT-OFF* */
121 uint32 temp = pwd;
122 uint16 res;
123
124 __asm("xor.t %0,%1,13,%1,12 \n\
125 xor.t %0,%0,0,%1,11 \n\
126 sh.xor.t %1,%0,0,%1,1 \n\
127 extr.u %0,%1,0,14 \n" : "=&d" (res) : "d" (temp));
128 return res;
129 /* *INDENT-ON* */
130 }
131 #endif
132 #endif
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxScuWdt_calculateLfsr
IFX_INLINE uint16 IfxScuWdt_calculateLfsr(uint16 password)
SCUWDT Inline API utility to Calculte new 14-bit LFSR.
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
uint16
unsigned short uint16
Definition: Platform_Types.h:112
extr
sint32 extr
Definition: IfxCpu_IntrinsicsDcc.h:398


iLLD_TC38A: IfxScuWdt.c Source File

  • Scu
  • Std
IfxScuWdt.c
Go to the documentation of this file.
1 /**
2 * \file IfxScuWdt.c
3 * \brief SCU basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 *
41 */
42
43 /******************************************************************************/
44 /*----------------------------------Includes----------------------------------*/
45 /******************************************************************************/
46
47 #include "IfxScuWdt.h"
48 #include "Cpu/Std/IfxCpu.h"
49
50 /******************************************************************************/
51 /*----------------------------------Macros------------------------------------*/
52 /******************************************************************************/
53
54 /** \brief Reset password of watchdog module.
55 */
56 #define IFXSCUWDT_RESET_PASSWORD (0x3CU)
57
58 /******************************************************************************/
59 /*-------------------------Function Implementations---------------------------*/
60 /******************************************************************************/
61
62 void IfxScuWdt_changeCpuWatchdogPassword(uint16 password, uint16 newPassword)
63 {
64 Ifx_SCU_WDTCPU *watchdog = &MODULE_SCU.WDTCPU[IfxCpu_getCoreIndex()];
65
66 /* Read Config_0 register */
67 Ifx_SCU_WDTCPU_CON0 wdt_con0;
68 wdt_con0.U = watchdog->CON0.U;
69
70 if (wdt_con0.B.LCK)
71 {
72 /* see Table 1 (Password Access Bit Pattern Requirements) */
73 wdt_con0.B.ENDINIT = 1;
74 wdt_con0.B.LCK = 0;
75 wdt_con0.B.PW = password;
76
77 /* Password ready. Store it to WDT_CON0 to unprotect the register */
78 watchdog->CON0.U = wdt_con0.U;
79 }
80
81 /* Set new Password, ENDINT and LCK bit in Config_0 register */
82 wdt_con0.B.ENDINIT = 1;
83 wdt_con0.B.LCK = 1;
84 wdt_con0.B.PW = newPassword;
85 watchdog->CON0.U = wdt_con0.U;
86
87 /* read back ENDINIT and wait until it has been set */
88 while (watchdog->CON0.B.ENDINIT == 0)
89 {}
90 }
91
92
93 void IfxScuWdt_changeCpuWatchdogReload(uint16 password, uint16 reload)
94 {
95 /* Select CPU Watchdog based on Core Id */
96 uint32 coreId = IfxCpu_getCoreIndex();
97 Ifx_SCU_WDTCPU *wdt = &MODULE_SCU.WDTCPU[coreId];
98
99 /* Read Config_0 register */
100 Ifx_SCU_WDTCPU_CON0 wdt_con0;
101 wdt_con0.U = wdt->CON0.U;
102
103 if (wdt_con0.B.LCK)
104 {
105 /* see Table 1 (Password Access Bit Pattern Requirements) */
106 wdt_con0.B.ENDINIT = 1;
107 wdt_con0.B.LCK = 0;
108 wdt_con0.B.PW = password;
109
110 /* Password ready. Store it to WDT_CON0 to unprotect the register */
111 wdt->CON0.U = wdt_con0.U;
112 }
113
114 /* Set new Reload value, set ENDINT and LCK bit in Config_0 register */
115 wdt_con0.B.ENDINIT = 1;
116 wdt_con0.B.LCK = 1;
117 wdt_con0.B.REL = reload;
118 wdt->CON0.U = wdt_con0.U;
119
120 /* read back ENDINIT and wait until it has been set */
121 while (wdt->CON0.B.ENDINIT == 0)
122 {}
123 }
124
125
126 void IfxScuWdt_changeGlobalEndinitPassword(uint16 password, uint16 newPassword)
127 {
128 Ifx_SCU *scu = &MODULE_SCU;
129
130 /* Read EICON0 register */
131 Ifx_SCU_EICON0 eicon0;
132 eicon0.U = scu->EICON0.U;
133
134 if (scu->EICON0.B.ENDINIT == 1)
135 {
136 /* see Table 1 (Password Access Bit Pattern Requirements) */
137 eicon0.B.ENDINIT = 0;
138 eicon0.B.EPW = password;
139
140 /* Password ready. Store it to WDT_CON0 to unprotect the register */
141 scu->EICON0.U = eicon0.U;
142 }
143
144 /* Set new Password, ENDINT in EICON0 register */
145 eicon0.U = scu->EICON0.U;
146 eicon0.B.ENDINIT = 1;
147 eicon0.B.EPW = newPassword;
148 scu->EICON0.U = eicon0.U;
149
150 /* read back ENDINIT and wait until it has been set */
151 while (scu->EICON0.B.ENDINIT == 0)
152 {}
153 }
154
155
156 void IfxScuWdt_changeGlobalSafetyEndinitPassword(uint16 password, uint16 newPassword)
157 {
158 Ifx_SCU *scu = &MODULE_SCU;
159
160 /* Read SEICON0 register */
161 Ifx_SCU_SEICON0 seicon0;
162 seicon0.U = scu->SEICON0.U;
163
164 if (scu->SEICON0.B.ENDINIT == 1)
165 {
166 /* see Table 1 (Password Access Bit Pattern Requirements) */
167 seicon0.B.ENDINIT = 0;
168 seicon0.B.EPW = password;
169
170 /* Password ready. Store it to SEICON0 to unprotect the register */
171 scu->SEICON0.U = seicon0.U;
172 }
173
174 /* Set new Password, ENDINT in SEICON0 register */
175 seicon0.U = scu->SEICON0.U;
176 seicon0.B.ENDINIT = 1;
177 seicon0.B.EPW = newPassword;
178 scu->SEICON0.U = seicon0.U;
179
180 /* read back ENDINIT and wait until it has been set */
181 while (scu->SEICON0.B.ENDINIT == 0)
182 {}
183 }
184
185
186 void IfxScuWdt_changeSafetyWatchdogPassword(uint16 password, uint16 newPassword)
187 {
188 Ifx_SCU_WDTS *watchdog = &MODULE_SCU.WDTS;
189
190 /* Read Config_0 register */
191 Ifx_SCU_WDTS_CON0 wdt_con0;
192 wdt_con0.U = watchdog->CON0.U;
193
194 if (wdt_con0.B.LCK)
195 {
196 /* see Table 1 (Password Access Bit Pattern Requirements) */
197 wdt_con0.B.ENDINIT = 1;
198 wdt_con0.B.LCK = 0;
199 wdt_con0.B.PW = password;
200
201 /* Password ready. Store it to WDT_CON0 to unprotect the register */
202 watchdog->CON0.U = wdt_con0.U;
203 }
204
205 /* Set new Password, ENDINT and LCK bit in Config_0 register */
206 wdt_con0.B.ENDINIT = 1;
207 wdt_con0.B.LCK = 1;
208 wdt_con0.B.PW = newPassword;
209 watchdog->CON0.U = wdt_con0.U;
210
211 /* read back ENDINIT and wait until it has been set */
212 while (watchdog->CON0.B.ENDINIT == 0)
213 {}
214 }
215
216
217 void IfxScuWdt_changeSafetyWatchdogReload(uint16 password, uint16 reload)
218 {
219 /* Initialize pointer to Safety Watchdog */
220 Ifx_SCU_WDTS *wdt = &MODULE_SCU.WDTS;
221
222 /* Read Config_0 register */
223 Ifx_SCU_WDTS_CON0 wdt_con0;
224 wdt_con0.U = wdt->CON0.U;
225
226 if (wdt_con0.B.LCK)
227 {
228 /* see Table 1 (Password Access Bit Pattern Requirements) */
229 wdt_con0.B.ENDINIT = 1;
230 wdt_con0.B.LCK = 0;
231 wdt_con0.B.PW = password;
232
233 /* Password ready. Store it to WDT_CON0 to unprotect the register */
234 wdt->CON0.U = wdt_con0.U;
235 }
236
237 /* Set new Reload value, set ENDINT and LCK bit in Config_0 register */
238 wdt_con0.B.ENDINIT = 1;
239 wdt_con0.B.LCK = 1;
240 wdt_con0.B.REL = reload;
241 wdt->CON0.U = wdt_con0.U;
242
243 /* read back ENDINIT and wait until it has been set */
244 while (wdt->CON0.B.ENDINIT == 0)
245 {}
246 }
247
248
249 void IfxScuWdt_clearCpuEndinit(uint16 password)
250 {
251 IfxScuWdt_clearCpuEndinitInline(&MODULE_SCU.WDTCPU[IfxCpu_getCoreIndex()], password);
252 }
253
254
255 void IfxScuWdt_clearGlobalEndinit(uint16 password)
256 {
257 Ifx_SCU *scu = &MODULE_SCU;
258
259 /* Read EICON0 register */
260 Ifx_SCU_EICON0 eicon0;
261 eicon0.U = scu->EICON0.U;
262
263 if (scu->EICON0.B.ENDINIT == 1)
264 {
265 /* Clear ENDINT a bit in EICON0 register */
266 /* see Table 1 (Pass.word Access Bit Pattern Requirements) */
267 eicon0.B.ENDINIT = 0;
268 eicon0.B.EPW = password;
269
270 /* Password ready. Store it to EICON0 to unprotect the register */
271 scu->EICON0.U = eicon0.U;
272 }
273
274 /* read back ENDINIT and wait until it has been cleared */
275 while (scu->EICON0.B.ENDINIT == 1)
276 {}
277 }
278
279
280 void IfxScuWdt_clearGlobalSafetyEndinit(uint16 password)
281 {
282 Ifx_SCU *scu = &MODULE_SCU;
283
284 /* Read SEICON0 register */
285 Ifx_SCU_SEICON0 seicon0;
286 seicon0.U = scu->SEICON0.U;
287
288 if (scu->SEICON0.B.ENDINIT == 1)
289 {
290 /* Clear ENDINT a bit in SEICON0 register */
291 /* see Table 1 (Pass.word Access Bit Pattern Requirements) */
292 seicon0.B.ENDINIT = 0;
293 seicon0.B.EPW = password;
294
295 /* Password ready. Store it to SEICON0 to unprotect the register */
296 scu->SEICON0.U = seicon0.U;
297 }
298
299 /* read back ENDINIT and wait until it has been cleared */
300 while (scu->SEICON0.B.ENDINIT == 1)
301 {}
302 }
303
304
305 void IfxScuWdt_clearSafetyEndinit(uint16 password)
306 {
307 IfxScuWdt_clearSafetyEndinitInline(password);
308 }
309
310
311 void IfxScuWdt_disableCpuWatchdog(uint16 password)
312 {
313 /* Select CPU Watchdog based on Core Id */
314 uint32 coreId = (uint32)IfxCpu_getCoreIndex();
315 Ifx_SCU_WDTCPU *wdt = &MODULE_SCU.WDTCPU[coreId];
316
317 IfxScuWdt_clearCpuEndinitInline(wdt, password);
318 wdt->CON1.B.DR = 1; //Set DR bit in Config_1 register
319 IfxScuWdt_setCpuEndinitInline(wdt, password);
320 }
321
322
323 void IfxScuWdt_disableSafetyWatchdog(uint16 password)
324 {
325 IfxScuWdt_clearSafetyEndinitInline(password);
326 SCU_WDTS_CON1.B.DR = 1; //Set DR bit in Config_1 register
327 IfxScuWdt_setSafetyEndinitInline(password);
328 }
329
330
331 void IfxScuWdt_enableCpuWatchdog(uint16 password)
332 {
333 /* Select CPU Watchdog based on Core Id */
334 uint32 coreId = (uint32)IfxCpu_getCoreIndex();
335 Ifx_SCU_WDTCPU *wdt = &MODULE_SCU.WDTCPU[coreId];
336
337 IfxScuWdt_clearCpuEndinitInline(wdt, password);
338 wdt->CON1.B.DR = 0; //Clear DR bit in Config_1 register
339 IfxScuWdt_setCpuEndinitInline(wdt, password);
340 }
341
342
343 void IfxScuWdt_enableSafetyWatchdog(uint16 password)
344 {
345 IfxScuWdt_clearSafetyEndinitInline(password);
346 SCU_WDTS_CON1.B.DR = 0; //Clear DR bit in Config_1 register
347 IfxScuWdt_setSafetyEndinitInline(password);
348 }
349
350
351 uint16 IfxScuWdt_getCpuWatchdogPassword(void)
352 {
353 return IfxScuWdt_getCpuWatchdogPasswordInline(&MODULE_SCU.WDTCPU[IfxCpu_getCoreIndex()]);
354 }
355
356
357 boolean IfxScuWdt_getCpuWatchdogEndInit(void)
358 {
359 return (boolean)IfxScuWdt_getCpuWatchdogEndInitInline(&MODULE_SCU.WDTCPU[IfxCpu_getCoreIndex()]);
360 }
361
362
363 uint16 IfxScuWdt_getGlobalEndinitPassword(void)
364 {
365 Ifx_SCU *scu = &MODULE_SCU;
366 uint16 password;
367
368 /* Read Password from CON0 register
369 * !!! NOTE: !!! when read bottom six bit of password are inverted so we have
370 * to toggle them before returning password */
371 password = scu->EICON0.B.EPW;
372 password ^= 0x003F;
373
374 return password;
375 }
376
377
378 uint16 IfxScuWdt_getGlobalSafetyEndinitPassword(void)
379 {
380 Ifx_SCU *scu = &MODULE_SCU;
381 uint16 password;
382
383 /* Read Password from CON0 register
384 * !!! NOTE: !!! when read bottom six bit of password are inverted so we have
385 * to toggle them before returning password */
386 password = scu->SEICON0.B.EPW;
387 password ^= 0x003F;
388
389 return password;
390 }
391
392
393 uint16 IfxScuWdt_getSafetyWatchdogPassword(void)
394 {
395 return IfxScuWdt_getSafetyWatchdogPasswordInline();
396 }
397
398
399 void IfxScuWdt_initConfig(IfxScuWdt_Config *config)
400 {
401 config->password = IFXSCUWDT_RESET_PASSWORD;
402 config->reload = 0xFFFC;
403 config->inputFrequency = IfxScu_WDTCON1_IR_divBy16384;
404 config->disableWatchdog = FALSE;
405 config->enableSmuRestriction = FALSE;
406 config->enableAutomaticPasswordChange = FALSE;
407 config->enableTimerCheck = FALSE;
408 config->enableTimerCheckTolerance = FALSE;
409 config->clrInternalResetFlag = FALSE;
410 config->globalEndInitInputFrequency = IfxScu_WDTCON1_IR_divBy16384;
411 }
412
413
414 void IfxScuWdt_initCpuWatchdog(Ifx_SCU_WDTCPU *wdt, const IfxScuWdt_Config *config)
415 {
416 Ifx_SCU_WDTCPU_CON0 wdt_con0;
417 Ifx_SCU_WDTCPU_CON1 wdt_con1;
418
419 /* Read Config_0 register and clear wdt_con1 variable */
420 wdt_con0.U = wdt->CON0.U;
421 wdt_con1.U = 0;
422
423 if (wdt_con0.B.LCK)
424 {
425 /* see Table 1 (Password Access Bit Pattern Requirements) */
426 wdt_con0.B.ENDINIT = 1;
427 wdt_con0.B.LCK = 0;
428 wdt_con0.B.PW ^= 0x003F;
429
430 /* Password ready. Store it to WDT_CON0 to unprotect the register */
431 wdt->CON0.U = wdt_con0.U;
432 }
433
434 /* Initialize CON0 register, with modify access, with user defined parameters
435 * Clear ENDINT bit to unprotect CON1 register for initialization
436 * see Table 3 (Modify Access Bit Pattern Requirements) */
437 wdt_con0.B.ENDINIT = 0;
438 wdt_con0.B.LCK = 1;
439 wdt_con0.B.PW = config->password; //user defined password
440 wdt_con0.B.REL = config->reload; //user defined reload value
441
442 /* Modify access ready - write WDT_CON0 register */
443 wdt->CON0.U = wdt_con0.U;
444
445 /* read back ENDINIT and wait until it has been cleared */
446 while (wdt->CON0.B.ENDINIT == 1)
447 {}
448
449 /* Initialize CON1 register */
450 switch (config->inputFrequency)
451 {
452 case IfxScu_WDTCON1_IR_divBy16384:
453 wdt_con1.B.IR0 = 0;
454 wdt_con1.B.IR1 = 0;
455 break;
456 case IfxScu_WDTCON1_IR_divBy256:
457 wdt_con1.B.IR0 = 1;
458 wdt_con1.B.IR1 = 0;
459 break;
460 case IfxScu_WDTCON1_IR_divBy64:
461 wdt_con1.B.IR0 = 0;
462 wdt_con1.B.IR1 = 1;
463 break;
464 }
465
466 wdt_con1.B.DR = config->disableWatchdog ? 1 : 0;
467 wdt_con1.B.UR = config->enableSmuRestriction ? 1 : 0;
468 wdt_con1.B.PAR = config->enableAutomaticPasswordChange ? 1 : 0;
469 wdt_con1.B.TCR = config->enableTimerCheck ? 1 : 0;
470 wdt_con1.B.TCTR = config->enableTimerCheckTolerance ? 1 : 0;
471
472 /* Finally write CON1 with user defined configuration */
473 wdt->CON1.U = wdt_con1.U;
474
475 /* Global EI register initialisation */
476 {
477 Ifx_SCU_EICON1 eicon1;
478 Ifx_SCU *scu = &MODULE_SCU;
479
480 eicon1.U = 0;
481
482 switch (config->globalEndInitInputFrequency)
483 {
484 case IfxScu_WDTCON1_IR_divBy16384:
485 eicon1.B.IR0 = 0;
486 eicon1.B.IR1 = 0;
487 break;
488 case IfxScu_WDTCON1_IR_divBy256:
489 eicon1.B.IR0 = 1;
490 eicon1.B.IR1 = 0;
491 break;
492 case IfxScu_WDTCON1_IR_divBy64:
493 eicon1.B.IR0 = 0;
494 eicon1.B.IR1 = 1;
495 break;
496 }
497
498 eicon1.B.DR = config->disableWatchdog ? 1 : 0;
499 scu->EICON1.U = eicon1.U;
500 }
501
502 /* Initialization finished - set CPU ENDINIT protection */
503 IfxScuWdt_setCpuEndinit(config->password);
504 }
505
506
507 void IfxScuWdt_initSafetyWatchdog(Ifx_SCU_WDTS *wdt, const IfxScuWdt_Config *config)
508 {
509 Ifx_SCU_WDTS_CON0 wdt_con0;
510 Ifx_SCU_WDTS_CON1 wdt_con1;
511
512 /* Read Config_0 register and clear wdt_con1 variable */
513 wdt_con0.U = wdt->CON0.U;
514 wdt_con1.U = 0;
515
516 if (wdt_con0.B.LCK)
517 {
518 /* see Table 1 (Password Access Bit Pattern Requirements) */
519 wdt_con0.B.ENDINIT = 1;
520 wdt_con0.B.LCK = 0;
521 wdt_con0.B.PW ^= 0x003F;
522
523 /* Password ready. Store it to WDT_CON0 to unprotect the register */
524 wdt->CON0.U = wdt_con0.U;
525 }
526
527 /* Initialize CON0 register, with modify access, with user defined parameters
528 * Clear ENDINT bit to unprotect CON1 register for initialization
529 * see Table 3 (Modify Access Bit Pattern Requirements) */
530 wdt_con0.B.ENDINIT = 0;
531 wdt_con0.B.LCK = 1;
532 wdt_con0.B.PW = config->password; //user defined password
533 wdt_con0.B.REL = config->reload; //user defined reload value
534
535 /* Modify access ready - write WDT_CON0 register */
536 wdt->CON0.U = wdt_con0.U;
537
538 /* read back ENDINIT and wait until it has been cleared */
539 while (wdt->CON0.B.ENDINIT == 1)
540 {}
541
542 /* Initialize CON1 register */
543 switch (config->inputFrequency)
544 {
545 case IfxScu_WDTCON1_IR_divBy16384:
546 wdt_con1.B.IR0 = 0;
547 wdt_con1.B.IR1 = 0;
548 break;
549 case IfxScu_WDTCON1_IR_divBy256:
550 wdt_con1.B.IR0 = 1;
551 wdt_con1.B.IR1 = 0;
552 break;
553 case IfxScu_WDTCON1_IR_divBy64:
554 wdt_con1.B.IR0 = 0;
555 wdt_con1.B.IR1 = 1;
556 break;
557 }
558
559 wdt_con1.B.DR = config->disableWatchdog ? 1 : 0;
560 wdt_con1.B.UR = config->enableSmuRestriction ? 1 : 0;
561 wdt_con1.B.PAR = config->enableAutomaticPasswordChange ? 1 : 0;
562 wdt_con1.B.TCR = config->enableTimerCheck ? 1 : 0;
563 wdt_con1.B.TCTR = config->enableTimerCheckTolerance ? 1 : 0;
564 wdt_con1.B.CLRIRF = config->clrInternalResetFlag ? 0 : 1;
565
566 /* Finally write CON1 with user defined configuration */
567 wdt->CON1.U = wdt_con1.U;
568
569 /* Global EI register initialisation */
570 {
571 Ifx_SCU_SEICON1 seicon1;
572 Ifx_SCU *scu = &MODULE_SCU;
573
574 seicon1.U = 0;
575
576 switch (config->globalEndInitInputFrequency)
577 {
578 case IfxScu_WDTCON1_IR_divBy16384:
579 seicon1.B.IR0 = 0;
580 seicon1.B.IR1 = 0;
581 break;
582 case IfxScu_WDTCON1_IR_divBy256:
583 seicon1.B.IR0 = 1;
584 seicon1.B.IR1 = 0;
585 break;
586 case IfxScu_WDTCON1_IR_divBy64:
587 seicon1.B.IR0 = 0;
588 seicon1.B.IR1 = 1;
589 break;
590 }
591
592 seicon1.B.DR = config->disableWatchdog ? 1 : 0;
593 scu->SEICON1.U = seicon1.U;
594 }
595
596 /* Initialization finished - set Safety ENDINIT protection */
597 IfxScuWdt_setSafetyEndinit(config->password);
598 }
599
600
601 void IfxScuWdt_serviceCpuWatchdog(uint16 password)
602 {
603 IfxScuWdt_setCpuEndinit(password);
604 }
605
606
607 void IfxScuWdt_serviceSafetyWatchdog(uint16 password)
608 {
609 IfxScuWdt_setSafetyEndinit(password);
610 }
611
612
613 void IfxScuWdt_setCpuEndinit(uint16 password)
614 {
615 IfxScuWdt_setCpuEndinitInline(&MODULE_SCU.WDTCPU[IfxCpu_getCoreIndex()], password);
616 }
617
618
619 void IfxScuWdt_setGlobalEndinit(uint16 password)
620 {
621 Ifx_SCU *scu = &MODULE_SCU;
622 /* Read EICON0 register */
623 Ifx_SCU_EICON0 eicon0;
624 eicon0.U = scu->EICON0.U;
625
626 /* Set ENDINT bit in EICON register */
627 if (scu->EICON0.B.ENDINIT == 0)
628 {
629 /* see Table 1 (Password Access Bit Pattern Requirements) */
630 eicon0.B.ENDINIT = 1;
631 eicon0.B.EPW = password;
632
633 /* Password ready. Store it to EICON0 to unprotect the register */
634 scu->EICON0.U = eicon0.U;
635 }
636
637 /* read back ENDINIT and wait until it has been set */
638 while (scu->EICON0.B.ENDINIT == 0)
639 {}
640 }
641
642
643 void IfxScuWdt_setGlobalSafetyEndinit(uint16 password)
644 {
645 Ifx_SCU *scu = &MODULE_SCU;
646
647 /* Read SEICON0 register */
648 Ifx_SCU_SEICON0 seicon0;
649 seicon0.U = scu->SEICON0.U;
650
651 if (scu->SEICON0.B.ENDINIT == 0)
652 {
653 /* Set ENDINT bit in SEICON register */
654 /* see Table 1 (Password Access Bit Pattern Requirements) */
655 seicon0.B.ENDINIT = 1;
656 seicon0.B.EPW = password;
657
658 /* Password ready. Store it to SEICON0 to unprotect the register */
659 scu->SEICON0.U = seicon0.U;
660 }
661
662 /* read back ENDINIT and wait until it has been set */
663 while (scu->SEICON0.B.ENDINIT == 0)
664 {}
665 }
666
667
668 void IfxScuWdt_setSafetyEndinit(uint16 password)
669 {
670 IfxScuWdt_setSafetyEndinitInline(password);
671 }
672
673
674 boolean IfxScuWdt_enableWatchdogWithDebugger(void)
675 {
676 boolean status = 0, oenEnabled = 0, watchdogEnabled = 0;
677 uint32 ostateValue;
678
679 volatile uint32 *oecPtr = (volatile uint32 *)0xF0000478;
680 volatile uint32 *ostatePtr = (volatile uint32 *)0xF0000480;
681 volatile uint32 *ocntrlPtr = (volatile uint32 *)0xF000047C;
682
683 /* read OSTATE.OEN */
684 ostateValue = *ostatePtr;
685 oenEnabled = (ostateValue & 0x00000001);
686
687 if (!oenEnabled)
688 {
689 /* enable the debug interface (OSTATE.OEN )if it is not already enabled */
690 /* pattern for enabling OSTATE.OEN */
691 *oecPtr = 0xA1;
692 *oecPtr = 0x5E;
693 *oecPtr = 0xA1;
694 *oecPtr = 0x5E;
695
696 /* read OSTATE.OEN again*/
697 ostateValue = *ostatePtr;
698 oenEnabled = (ostateValue & 0x00000001);
699 }
700
701 if (oenEnabled)
702 {
703 /* set watchdog suspend bit in OSTATE reg, by writing OCNTRL.WDTSUS and OCNTRL.WDTSUS_P together */
704 *ocntrlPtr = 0x00003000;
705 }
706 else
707 {
708 status = 1;
709 }
710
711 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, oenEnabled == 1);
712
713 /* read OSTATE.WDTSUS */
714 ostateValue = *ostatePtr;
715 watchdogEnabled = (ostateValue & 0x00000080);
716
717 if (!watchdogEnabled)
718 {
719 status = 1;
720 }
721
722 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, watchdogEnabled == 1);
723
724 return status;
725 }
726
727
728 uint8 IfxScuWdt_getCpuWatchdogStatus(void)
729 {
730 Ifx_SCU *scu = &MODULE_SCU;
731 return scu->WDTCPU[IfxCpu_getCoreIndex()].SR.B.DS;
732 }
IfxScuWdt_setSafetyEndinitInline
IFX_INLINE void IfxScuWdt_setSafetyEndinitInline(uint16 password)
SCUWDT Inline API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.h:689
IfxScuWdt_getSafetyWatchdogPasswordInline
IFX_INLINE uint16 IfxScuWdt_getSafetyWatchdogPasswordInline(void)
SCUWDT Inline API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.h:641
IfxScuWdt_clearGlobalEndinit
void IfxScuWdt_clearGlobalEndinit(uint16 password)
API to Clear global ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:255
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxScuWdt_clearSafetyEndinitInline
IFX_INLINE void IfxScuWdt_clearSafetyEndinitInline(uint16 password)
SCUWDT Inline API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.h:581
IfxScuWdt_Config::clrInternalResetFlag
boolean clrInternalResetFlag
Clear Internal Reset Flag.
Definition: IfxScuWdt.h:96
IfxScuWdt_setGlobalEndinit
void IfxScuWdt_setGlobalEndinit(uint16 password)
API to set global ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:619
IfxScuWdt_getGlobalSafetyEndinitPassword
uint16 IfxScuWdt_getGlobalSafetyEndinitPassword(void)
API to fetch current password of global safety endinit Watchdog module.
Definition: IfxScuWdt.c:378
IfxScuWdt_getCpuWatchdogStatus
uint8 IfxScuWdt_getCpuWatchdogStatus(void)
SCUWDT API to fetch current status of CPU Watchdog module.
Definition: IfxScuWdt.c:728
IfxScuWdt_setGlobalSafetyEndinit
void IfxScuWdt_setGlobalSafetyEndinit(uint16 password)
API to set global safety ENDINIT bit provided by safety WDT Hardware module.
Definition: IfxScuWdt.c:643
IfxScuWdt_changeGlobalEndinitPassword
void IfxScuWdt_changeGlobalEndinitPassword(uint16 password, uint16 newPassword)
API to change global endinit password.
Definition: IfxScuWdt.c:126
IfxScuWdt_enableWatchdogWithDebugger
boolean IfxScuWdt_enableWatchdogWithDebugger(void)
Enables the watchdog functionality with debugger connected, debug interface will also be enabled...
Definition: IfxScuWdt.c:674
IfxScuWdt_clearCpuEndinitInline
IFX_INLINE void IfxScuWdt_clearCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, uint16 password)
SCUWDT Inline API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.h:548
IfxScuWdt_getCpuWatchdogPasswordInline
IFX_INLINE uint16 IfxScuWdt_getCpuWatchdogPasswordInline(Ifx_SCU_WDTCPU *watchdog)
SCUWDT Inline API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.h:604
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxScuWdt_initCpuWatchdog
void IfxScuWdt_initCpuWatchdog(Ifx_SCU_WDTCPU *wdt, const IfxScuWdt_Config *config)
SCUWDT API to initialize an instance of WDT Driver which corresponds to CPU WDT Hardware module...
Definition: IfxScuWdt.c:414
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxScuWdt_disableSafetyWatchdog
void IfxScuWdt_disableSafetyWatchdog(uint16 password)
SCUWDT API to disable Safety Watchdog functionality.
Definition: IfxScuWdt.c:323
IfxScu_WDTCON1_IR_divBy256
Definition: IfxScu_cfg.h:1325
IfxScuWdt_enableSafetyWatchdog
void IfxScuWdt_enableSafetyWatchdog(uint16 password)
SCUWDT API to enable Safety Watchdog functionality.
Definition: IfxScuWdt.c:343
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxScuWdt.h
SCU basic functionality.
IfxScuWdt_serviceCpuWatchdog
void IfxScuWdt_serviceCpuWatchdog(uint16 password)
SCUWDT API to service CPU Watchdog functionality.
Definition: IfxScuWdt.c:601
IfxScuWdt_serviceSafetyWatchdog
void IfxScuWdt_serviceSafetyWatchdog(uint16 password)
SCUWDT API to service Safety Watchdog functionality.
Definition: IfxScuWdt.c:607
IfxScuWdt_clearSafetyEndinit
void IfxScuWdt_clearSafetyEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:305
IfxScuWdt_initSafetyWatchdog
void IfxScuWdt_initSafetyWatchdog(Ifx_SCU_WDTS *wdt, const IfxScuWdt_Config *config)
SCUWDT API to initialize an instance of WDT Driver which corresponds to Safety WDT Hardware module...
Definition: IfxScuWdt.c:507
IfxScuWdt_enableCpuWatchdog
void IfxScuWdt_enableCpuWatchdog(uint16 password)
SCUWDT API to enable CPU Watchdog functionality.
Definition: IfxScuWdt.c:331
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IFXSCUWDT_RESET_PASSWORD
#define IFXSCUWDT_RESET_PASSWORD
Reset password of watchdog module.
Definition: IfxScuWdt.c:56
IfxScuWdt_Config::inputFrequency
IfxScu_WDTCON1_IR inputFrequency
input frequency of the WDT
Definition: IfxScuWdt.h:90
IfxScuWdt_getCpuWatchdogEndInit
boolean IfxScuWdt_getCpuWatchdogEndInit(void)
SCUWDT API to fetch current endinit of CPU Watchdog module.
Definition: IfxScuWdt.c:357
IfxScuWdt_Config
Configuration structure for Scu Watchdog. IfxScuWdt_Config is a type describing configuration structu...
Definition: IfxScuWdt.h:86
IfxScuWdt_getGlobalEndinitPassword
uint16 IfxScuWdt_getGlobalEndinitPassword(void)
API to fetch current password of global endinit Watchdog module.
Definition: IfxScuWdt.c:363
IfxScuWdt_Config::password
uint16 password
password for access to WDTxCON0 reg
Definition: IfxScuWdt.h:88
IfxScuWdt_Config::enableSmuRestriction
boolean enableSmuRestriction
Unlock Restriction Request Control Bit.
Definition: IfxScuWdt.h:92
IfxScuWdt_Config::enableTimerCheckTolerance
boolean enableTimerCheckTolerance
Timer Check Tolerance Request.
Definition: IfxScuWdt.h:95
IfxScuWdt_changeCpuWatchdogReload
void IfxScuWdt_changeCpuWatchdogReload(uint16 password, uint16 reload)
SCUWDT API to change CPU Watchdog timer reload value.
Definition: IfxScuWdt.c:93
IfxScuWdt_disableCpuWatchdog
void IfxScuWdt_disableCpuWatchdog(uint16 password)
SCUWDT API to disable CPU Watchdog functionality.
Definition: IfxScuWdt.c:311
IfxScuWdt_getCpuWatchdogEndInitInline
IFX_INLINE boolean IfxScuWdt_getCpuWatchdogEndInitInline(Ifx_SCU_WDTCPU *watchdog)
SCUWDT API to fetch current endinit of CPU Watchdog module.
Definition: IfxScuWdt.h:618
IfxScuWdt_Config::globalEndInitInputFrequency
IfxScu_WDTCON1_IR globalEndInitInputFrequency
input frequency of the global End init WDT
Definition: IfxScuWdt.h:97
IfxScuWdt_Config::enableAutomaticPasswordChange
boolean enableAutomaticPasswordChange
Password Auto-sequence Request Bit.
Definition: IfxScuWdt.h:93
IfxScu_WDTCON1_IR_divBy64
Definition: IfxScu_cfg.h:1326
IfxCpu.h
CPU basic functionality.
IfxScuWdt_setCpuEndinitInline
IFX_INLINE void IfxScuWdt_setCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, uint16 password)
SCUWDT Inline API to Set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.h:656
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxScuWdt_initConfig
void IfxScuWdt_initConfig(IfxScuWdt_Config *config)
SCUWDT API to initialize WDT configuration structure - Constructor This API initialize the ScuWdt con...
Definition: IfxScuWdt.c:399
IfxScuWdt_setSafetyEndinit
void IfxScuWdt_setSafetyEndinit(uint16 password)
SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:668
IfxScuWdt_getSafetyWatchdogPassword
uint16 IfxScuWdt_getSafetyWatchdogPassword(void)
SCUWDT API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.c:393
IfxScuWdt_changeCpuWatchdogPassword
void IfxScuWdt_changeCpuWatchdogPassword(uint16 password, uint16 newPassword)
SCUWDT API to change CPU Watchdog password.
Definition: IfxScuWdt.c:62
IfxScuWdt_Config::enableTimerCheck
boolean enableTimerCheck
Counter Check Request Bit.
Definition: IfxScuWdt.h:94
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxScuWdt_Config::reload
uint16 reload
WDT reload value.
Definition: IfxScuWdt.h:89
IfxCpu_getCoreIndex
IFX_INLINE IfxCpu_ResourceCpu IfxCpu_getCoreIndex(void)
API to get cpu index of the caller CPU. Note: This api can be used whereever cpu no/index is needed...
Definition: IfxCpu.h:871
IfxScu_WDTCON1_IR_divBy16384
Definition: IfxScu_cfg.h:1324
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxScuWdt_clearGlobalSafetyEndinit
void IfxScuWdt_clearGlobalSafetyEndinit(uint16 password)
API to Clear global safety ENDINIT bit provided by safety WDT Hardware module.
Definition: IfxScuWdt.c:280
IfxScuWdt_changeGlobalSafetyEndinitPassword
void IfxScuWdt_changeGlobalSafetyEndinitPassword(uint16 password, uint16 newPassword)
API to change global safety endinit password.
Definition: IfxScuWdt.c:156
IfxScuWdt_Config::disableWatchdog
boolean disableWatchdog
Disable Request Control Bit.
Definition: IfxScuWdt.h:91
IfxScuWdt_changeSafetyWatchdogPassword
void IfxScuWdt_changeSafetyWatchdogPassword(uint16 password, uint16 newPassword)
SCUWDT API to change Safety Watchdog password.
Definition: IfxScuWdt.c:186
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxScuWdt_changeSafetyWatchdogReload
void IfxScuWdt_changeSafetyWatchdogReload(uint16 password, uint16 reload)
SCUWDT API to change Safety Watchdog timer reload value.
Definition: IfxScuWdt.c:217


iLLD_TC38A: IfxScuWdt.h Source File

  • Scu
  • Std
IfxScuWdt.h
Go to the documentation of this file.
1 /**
2 * \file IfxScuWdt.h
3 * \brief SCU basic functionality
4 * \ingroup IfxLld_Scu
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 * This file contains the APIs for SCU Watchdog and Endinit related functions.
43 *
44 * \defgroup IfxLld_Scu_Std_Wdt Wdt Basic Functionality
45 * \ingroup IfxLld_Scu_Std
46 * \defgroup IfxLld_Scu_Std_Wdt_Wdt_Configuration Watchdog Configuration functions
47 * \ingroup IfxLld_Scu_Std_Wdt
48 * \defgroup IfxLld_Scu_Std_Wdt_Wdt_Endinit Watchdog Endinit functions
49 * \ingroup IfxLld_Scu_Std_Wdt
50 * \defgroup IfxLld_Scu_Std_Wdt_Wdt_Operative Watchdog Operative functions
51 * \ingroup IfxLld_Scu_Std_Wdt
52 * \defgroup IfxLld_Scu_Std_Wdt_Wdt_Endinit_Usage How to use Endinit APIs?
53 * \ingroup IfxLld_Scu_Std_Wdt
54 */
55
56 #ifndef IFXSCUWDT_H
57 #define IFXSCUWDT_H 1
58
59 /******************************************************************************/
60 /*----------------------------------Includes----------------------------------*/
61 /******************************************************************************/
62
63 #include "_Impl/IfxScu_cfg.h"
64 #include "Cpu/Std/Ifx_Types.h"
65 #include "IfxScu_reg.h"
66 #include "IfxScu_bf.h"
67 #include "IfxScuWdt.asm.h"
68 #include "Cpu/Std/IfxCpu_Intrinsics.h"
69
70 /******************************************************************************/
71 /*-----------------------------------Macros-----------------------------------*/
72 /******************************************************************************/
73
74 /** \brief Endinit operation Timeout counter
75 */
76 #define IFXSCUWDT_ENDINIT_WAIT_TIMEOUTCOUNT (0x100)
77
78 /******************************************************************************/
79 /*-----------------------------Data Structures--------------------------------*/
80 /******************************************************************************/
81
82 /** \brief Configuration structure for Scu Watchdog.
83 * IfxScuWdt_Config is a type describing configuration structure of CPU and
84 * Safety WDT registers defined in IfxScuWdt.h file.
85 */
86 typedef struct
87 {
88 uint16 password; /**< \brief password for access to WDTxCON0 reg */
89 uint16 reload; /**< \brief WDT reload value */
90 IfxScu_WDTCON1_IR inputFrequency; /**< \brief input frequency of the WDT */
91 boolean disableWatchdog; /**< \brief Disable Request Control Bit */
92 boolean enableSmuRestriction; /**< \brief Unlock Restriction Request Control Bit */
93 boolean enableAutomaticPasswordChange; /**< \brief Password Auto-sequence Request Bit */
94 boolean enableTimerCheck; /**< \brief Counter Check Request Bit */
95 boolean enableTimerCheckTolerance; /**< \brief Timer Check Tolerance Request */
96 boolean clrInternalResetFlag; /**< \brief Clear Internal Reset Flag */
97 IfxScu_WDTCON1_IR globalEndInitInputFrequency; /**< \brief input frequency of the global End init WDT */
98 } IfxScuWdt_Config;
99
100 /** \addtogroup IfxLld_Scu_Std_Wdt_Wdt_Configuration
101 * \{ */
102
103 /******************************************************************************/
104 /*-------------------------Global Function Prototypes-------------------------*/
105 /******************************************************************************/
106
107 /** \brief SCUWDT API to initialize WDT configuration structure - Constructor
108 * This API initialize the ScuWdt configuration structure to default values, these default
109 * values are for software specific, not necessarily hardware reset values.
110 * User must use this API call before IfxScuWdt_Init API call
111 * \param config ScuWdt configuration structure to be initialized
112 * \return None
113 */
114 IFX_EXTERN void IfxScuWdt_initConfig(IfxScuWdt_Config *config);
115
116 /** \brief SCUWDT API to initialize an instance of WDT Driver which corresponds to CPU WDT Hardware module.
117 *
118 * This API initialize the ScuWdt software driver and corresponding CPU WDT hardware module.
119 * User can configure project specific Watchdog password, Watchdog timer period and other settings
120 * with this interface.
121 * API corresponds to one instance of the hardware module.
122 * User must use this API call for each instance of the WDT hardware module used.
123 * \param wdt reference to register map of CPU WDT hardware instance
124 * \param config ScuWdt configuration structure
125 * \return None
126 */
127 IFX_EXTERN void IfxScuWdt_initCpuWatchdog(Ifx_SCU_WDTCPU *wdt, const IfxScuWdt_Config *config);
128
129 /** \brief SCUWDT API to initialize an instance of WDT Driver which corresponds to Safety WDT Hardware module.
130 *
131 * This API initialize the ScuWdt software driver and corresponding safety WDT hardware module.
132 * User can configure project specific Watchdog password, Watchdog timer period and other settings
133 * with this interface.
134 * API corresponds to one instance of the hardware module.
135 * User must use this API call for each instance of the WDT hardware module used.
136 * \param wdt reference to register map of Safety WDT hardware instance
137 * \param config ScuWdt configuration structure
138 * \return None
139 */
140 IFX_EXTERN void IfxScuWdt_initSafetyWatchdog(Ifx_SCU_WDTS *wdt, const IfxScuWdt_Config *config);
141
142 /** \} */
143
144 /** \addtogroup IfxLld_Scu_Std_Wdt_Wdt_Endinit
145 * \{ */
146
147 /******************************************************************************/
148 /*-------------------------Inline Function Prototypes-------------------------*/
149 /******************************************************************************/
150
151 /** \brief SCUWDT Inline API to Clear ENDINIT bit provided by CPU WDT Hardware module.
152 *
153 * This Inline API will disable ENDINIT functionality provided by CPU WDT Hardware module.
154 * This API is only meant to be used with startup routines where function call is not possible.
155 * User need to use this API call before modifying any ENDINIT protected register. User must
156 * always set the ENDINIT bit using other API IfxScuWdt_setCpuEndinit. The sequence clear and set
157 * ENDINIT shall not be interrupted by another interrupt/call.
158 * User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword).
159 * \param watchdog pointer to the watchdog register map of CPU WDT hardware instance
160 * \param password Existing (Application specific) password for the Watchdog module.
161 * \return None
162 */
163 IFX_INLINE void IfxScuWdt_clearCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, uint16 password);
164
165 /** \brief Clear the Global safety Endinit password (Inline)
166 * \param password Existing (Application specific) password for the Watchdog module.
167 * \return None
168 */
169 IFX_INLINE void IfxScuWdt_clearGlobalSafetyEndinitInline(uint16 password);
170
171 /** \brief SCUWDT Inline API to Clear ENDINIT bit provided by Safety WDT Hardware module.
172 *
173 * This API will disable ENDINIT functionality provided by Safety WDT Hardware module.
174 * This API is only meant to be used with startup routines where function call is not possible.
175 * User need to use this API call before modifying any ENDINIT protected register. User must
176 * always set the ENDINIT bit using other API IfxScuWdt_setCpuEndinit. The sequence clear and set
177 * ENDINIT shall not be interrupted by another interrupt/call.
178 * User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).
179 * \param password Existing (Application specific) password for the Watchdog module.
180 * \return None
181 */
182 IFX_INLINE void IfxScuWdt_clearSafetyEndinitInline(uint16 password);
183
184 /** \brief API to fetch current password of global safety endinit Watchdog module.
185 *
186 * This API will fetch current global endinit password for Safety WDT Hardware module. password is needed to be passed
187 * with most of the WDT APIs. Normally this API can be used to store the password locally in the caller function
188 * or store the password globally in a global variable at the application memory.
189 * This API is only meant to be used with startup routines where function call is not possible.
190 * \return password Existing (Application specific) password for the Watchdog module.
191 */
192 IFX_INLINE uint16 IfxScuWdt_getGlobalSafetyEndinitPasswordInline(void);
193
194 /** \brief SCUWDT Inline API to Set ENDINIT bit provided by CPU WDT Hardware module.
195 *
196 * This API will enable ENDINIT functionality provided by CPU WDT Hardware module.
197 * This API is only meant to be used with startup routines where function call is not possible.
198 * User need to use this API call after modifying any ENDINIT protected register.
199 * User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword).
200 * \param watchdog pointer to the watchdog register map of CPU WDT hardware instance
201 * \param password Existing (Application specific) password for the Watchdog module.
202 * \return None
203 */
204 IFX_INLINE void IfxScuWdt_setCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, uint16 password);
205
206 /** \brief Set the Global safety Endinit password (Inline)
207 * \param password Existing (Application specific) password for the Watchdog module.
208 * \return None
209 */
210 IFX_INLINE void IfxScuWdt_setGlobalSafetyEndinitInline(uint16 password);
211
212 /** \brief SCUWDT Inline API to Set ENDINIT bit provided by Safety WDT Hardware module.
213 *
214 * This API will enable ENDINIT functionality provided by Safety WDT Hardware module.
215 * This API is only meant to be used with startup routines where function call is not possible.
216 * User need to use this API call after modifying any ENDINIT protected register.
217 * User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).
218 * \param password Existing (Application specific) password for the Watchdog module.
219 * \return None
220 */
221 IFX_INLINE void IfxScuWdt_setSafetyEndinitInline(uint16 password);
222
223 /******************************************************************************/
224 /*-------------------------Global Function Prototypes-------------------------*/
225 /******************************************************************************/
226
227 /** \brief SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
228 *
229 * This API will disable ENDINIT functionality provided by CPU WDT Hardware module.
230 * User need to use this API call before modifying any ENDINIT protected register. User must
231 * always set the ENDINIT bit using other API IfxScuWdt_setCpuEndinit. The sequence clear and set
232 * ENDINIT shall not be interrupted by another interrupt/call.
233 * User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword)
234 * \param password Existing (Application specific) password for the Watchdog module.
235 * \return None
236 */
237 IFX_EXTERN void IfxScuWdt_clearCpuEndinit(uint16 password);
238
239 /** \brief API to Clear global ENDINIT bit provided by CPU WDT Hardware module.
240 *
241 * This API will disable ENDINIT functionality provided by CPU WDT Hardware module.
242 * This API is only meant to be used with startup routines where function call is not possible.
243 * User need to use this API call before modifying any ENDINIT protected register. User must
244 * always set the ENDINIT bit using other API IfxScuWdt_setGlobalEndinit. The sequence clear and set
245 * ENDINIT shall not be interrupted by another interrupt/call.
246 * User need to have the password stored locally in the caller function, (use IfxScuWdt_getGlobalEndinitPassword).
247 * \param password Existing (Application specific) password for the Watchdog module.
248 * \return None
249 */
250 IFX_EXTERN void IfxScuWdt_clearGlobalEndinit(uint16 password);
251
252 /** \brief API to Clear global safety ENDINIT bit provided by safety WDT Hardware module.
253 *
254 * This API will disable ENDINIT functionality provided by Safety WDT Hardware module.
255 * This API is only meant to be used with startup routines where function call is not possible.
256 * User need to use this API call before modifying any ENDINIT protected register. User must
257 * always set the ENDINIT bit using other API IfxScuWdt_setGlobalSafetyEndinit. The sequence clear and set
258 * ENDINIT shall not be interrupted by another interrupt/call.
259 * User need to have the password stored locally in the caller function, (use IfxScuWdt_getGlobalSafetyEndinitPassword).
260 * \param password Existing (Application specific) password for the Watchdog module.
261 * \return None
262 */
263 IFX_EXTERN void IfxScuWdt_clearGlobalSafetyEndinit(uint16 password);
264
265 /** \brief SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module.
266 *
267 * This API will disable ENDINIT functionality provided by Safety WDT Hardware module.
268 * User need to use this API call before modifying any ENDINIT protected register. User must
269 * always set the ENDINIT bit using other API IfxScuWdt_setCpuEndinit. The sequence clear and set
270 * ENDINIT shall not be interrupted by another interrupt/call.
271 * User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).
272 * \param password Existing (Application specific) password for the Watchdog module.
273 * \return None
274 */
275 IFX_EXTERN void IfxScuWdt_clearSafetyEndinit(uint16 password);
276
277 /** \brief SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
278 *
279 * This API will enable ENDINIT functionality provided by CPU WDT Hardware module.
280 * User need to use this API call after modifying any ENDINIT protected register.
281 * User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword)
282 * \param password Existing (Application specific) password for the Watchdog module.
283 * \return None
284 */
285 IFX_EXTERN void IfxScuWdt_setCpuEndinit(uint16 password);
286
287 /** \brief API to set global ENDINIT bit provided by CPU WDT Hardware module.
288 *
289 * This API will enable ENDINIT functionality provided by CPU WDT Hardware module.
290 * User need to use this API call after modifying any ENDINIT protected register.
291 * User need to have the password stored locally in the caller function, (use IfxScuWdt_getGlobalEndinitPassword)
292 * \param password Existing (Application specific) password for the Watchdog module.
293 * \return None
294 */
295 IFX_EXTERN void IfxScuWdt_setGlobalEndinit(uint16 password);
296
297 /** \brief API to set global safety ENDINIT bit provided by safety WDT Hardware module.
298 *
299 * This API will enable ENDINIT functionality provided by Safety WDT Hardware module.
300 * User need to use this API call after modifying any ENDINIT protected register.
301 * User need to have the password stored locally in the caller function, (use IfxScuWdt_getGlobalSafetyEndinitPassword)
302 * \param password Existing (Application specific) password for the Watchdog module.
303 * \return None
304 */
305 IFX_EXTERN void IfxScuWdt_setGlobalSafetyEndinit(uint16 password);
306
307 /** \brief SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module.
308 *
309 * This API will enable ENDINIT functionality provided by Safety WDT Hardware module.
310 * User need to use this API call after modifying any ENDINIT protected register.
311 * User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).
312 * \param password Existing (Application specific) password for the Watchdog module.
313 * \return None
314 */
315 IFX_EXTERN void IfxScuWdt_setSafetyEndinit(uint16 password);
316
317 /** \} */
318
319 /** \addtogroup IfxLld_Scu_Std_Wdt_Wdt_Operative
320 * \{ */
321
322 /******************************************************************************/
323 /*-------------------------Inline Function Prototypes-------------------------*/
324 /******************************************************************************/
325
326 /** \brief SCUWDT Inline API to fetch current password of CPU Watchdog module.
327 *
328 * This API will fetch current Watchdog password for CPU WDT Hardware module. password is needed to be passed
329 * with most of the WDT APIs. Normally this API can be used to store the password locally in the caller function
330 * or store the password globally in a global variable at the application memory.
331 * This API is only meant to be used with startup routines where function call is not possible.
332 * \param watchdog pointer to the watchdog register map of CPU WDT hardware instance
333 * \return password Existing (Application specific) password for the Watchdog module.
334 */
335 IFX_INLINE uint16 IfxScuWdt_getCpuWatchdogPasswordInline(Ifx_SCU_WDTCPU *watchdog);
336
337 /** \brief SCUWDT API to fetch current endinit of CPU Watchdog module.
338 * \param watchdog pointer to the watchdog register map of CPU WDT hardware instance
339 * \return Endinit status for the CPU Watchdog module.
340 */
341 IFX_INLINE boolean IfxScuWdt_getCpuWatchdogEndInitInline(Ifx_SCU_WDTCPU *watchdog);
342
343 /** \brief SCUWDT API to fetch current endinit of Safety/System Watchdog module.
344 * \return Endinit status for the Safety Watchdog module.
345 */
346 IFX_INLINE boolean IfxScuWdt_getSafetyWatchdogEndInit(void);
347
348 /** \brief SCUWDT Inline API to fetch current password of Safety Watchdog module.
349 *
350 * This API will fetch current Watchdog password for Safety WDT Hardware module. password is needed to be passed
351 * with most of the WDT APIs. Normally this API can be used to store the password locally in the caller function
352 * or store the password globally in a global variable at the application memory.
353 * This API is only meant to be used with startup routines where function call is not possible.
354 * \return password Existing (Application specific) password for the Watchdog module.
355 */
356 IFX_INLINE uint16 IfxScuWdt_getSafetyWatchdogPasswordInline(void);
357
358 /******************************************************************************/
359 /*-------------------------Global Function Prototypes-------------------------*/
360 /******************************************************************************/
361
362 /** \brief SCUWDT API to change CPU Watchdog password.
363 *
364 * This API will change password to new one for the corresponding to CPU WDT Hardware module.
365 * User need to have the old password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword).
366 * \param password Existing (Application specific) password for the Watchdog module.
367 * \param newPassword Application specific new password to be changed for the Watchdog module.
368 * \return None
369 */
370 IFX_EXTERN void IfxScuWdt_changeCpuWatchdogPassword(uint16 password, uint16 newPassword);
371
372 /** \brief SCUWDT API to change CPU Watchdog timer reload value.
373 *
374 * This API will change Watchdog timer reload value to new one for CPU WDT Hardware module.
375 * The Watchdog timers will be reloaded with this value after every serice of Watchdog.
376 * User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword).
377 * \param password Existing (Application specific) password for the Watchdog module.
378 * \param reload Reload value for the timer.
379 * \return None
380 */
381 IFX_EXTERN void IfxScuWdt_changeCpuWatchdogReload(uint16 password, uint16 reload);
382
383 /** \brief API to change global endinit password.
384 *
385 * This API will change password to new one for the corresponding to CPU WDT Hardware module.
386 * User need to have the old password stored locally in the caller function, (use IfxScuWdt_getGlobalEndinitPassword).
387 * \param password Existing (Application specific) password for the Watchdog module.
388 * \param newPassword Application specific new password to be changed for the Watchdog module.
389 * \return None
390 */
391 IFX_EXTERN void IfxScuWdt_changeGlobalEndinitPassword(uint16 password, uint16 newPassword);
392
393 /** \brief API to change global safety endinit password.
394 *
395 * This API will change password to new one for the corresponding to Safety WDT Hardware module.
396 * User need to have the old password stored locally in the caller function, (use IfxScuWdt_getGlobalSafetyEndinitPassword).
397 * \param password Existing (Application specific) password for the Watchdog module.
398 * \param newPassword Application specific new password to be changed for the Watchdog module.
399 * \return None
400 */
401 IFX_EXTERN void IfxScuWdt_changeGlobalSafetyEndinitPassword(uint16 password, uint16 newPassword);
402
403 /** \brief SCUWDT API to change Safety Watchdog password.
404 *
405 * This API will change password to new one for the corresponding to Safety WDT Hardware module.
406 * User need to have the old password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).
407 * \param password Existing (Application specific) password for the Watchdog module.
408 * \param newPassword Application specific new password to be changed for the Watchdog module.
409 * \return None
410 */
411 IFX_EXTERN void IfxScuWdt_changeSafetyWatchdogPassword(uint16 password, uint16 newPassword);
412
413 /** \brief SCUWDT API to change Safety Watchdog timer reload value.
414 *
415 * This API will change Watchdog timer reload value to new one for Safety WDT Hardware module.
416 * The Watchdog timers will be reloaded with this value after every serice of Watchdog.
417 * User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).
418 * \param password Existing (Application specific) password for the Watchdog module.
419 * \param reload Reload value for the timer.
420 * \return None
421 */
422 IFX_EXTERN void IfxScuWdt_changeSafetyWatchdogReload(uint16 password, uint16 reload);
423
424 /** \brief SCUWDT API to disable CPU Watchdog functionality.
425 *
426 * This API will disable Watchdog functionality of CPU WDT Hardware module. The Watchdog timers will stop counting
427 * after this API call.
428 * User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword).
429 * \param password Existing (Application specific) password for the Watchdog module.
430 * \return None
431 */
432 IFX_EXTERN void IfxScuWdt_disableCpuWatchdog(uint16 password);
433
434 /** \brief SCUWDT API to disable Safety Watchdog functionality.
435 *
436 * This API will disable Watchdog functionality of Safety WDT Hardware module. The Watchdog timers will stop counting
437 * after this API call.
438 * User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).
439 * \param password Existing (Application specific) password for the Watchdog module.
440 * \return None
441 */
442 IFX_EXTERN void IfxScuWdt_disableSafetyWatchdog(uint16 password);
443
444 /** \brief SCUWDT API to enable CPU Watchdog functionality.
445 *
446 * This API will enable Watchdog functionality of CPU WDT Hardware module. The Watchdog timers need to be serviced
447 * periodically after this API call.
448 * User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword).
449 * \param password Existing (Application specific) password for the Watchdog module.
450 * \return None
451 */
452 IFX_EXTERN void IfxScuWdt_enableCpuWatchdog(uint16 password);
453
454 /** \brief SCUWDT API to enable Safety Watchdog functionality.
455 *
456 * This API will enable Watchdog functionality of Safety WDT Hardware module. The Watchdog timers need to be serviced
457 * periodically after this API call.
458 * User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).
459 * \param password Existing (Application specific) password for the Watchdog module.
460 * \return None
461 */
462 IFX_EXTERN void IfxScuWdt_enableSafetyWatchdog(uint16 password);
463
464 /** \brief SCUWDT API to fetch current password of CPU Watchdog module.
465 *
466 * This API will fetch current Watchdog password for CPU WDT Hardware module. password is needed to be passed
467 * with most of the WDT APIs. Normally this API can be used to store the password locally in the caller function
468 * or store the password globally in a global variable at the application memory.
469 * \return password Existing (Application specific) password for the Watchdog module.
470 */
471 IFX_EXTERN uint16 IfxScuWdt_getCpuWatchdogPassword(void);
472
473 /** \brief SCUWDT API to fetch current endinit of CPU Watchdog module.
474 * \return Endinit status for the CPU Watchdog module.
475 */
476 IFX_EXTERN boolean IfxScuWdt_getCpuWatchdogEndInit(void);
477
478 /** \brief API to fetch current password of global endinit Watchdog module.
479 *
480 * This API will fetch current global endinit password for CPU WDT Hardware module. password is needed to be passed
481 * with most of the WDT APIs. Normally this API can be used to store the password locally in the caller function
482 * or store the password globally in a global variable at the application memory.
483 * This API is only meant to be used with startup routines where function call is not possible.
484 * \return password Existing (Application specific) password for the Watchdog module.
485 */
486 IFX_EXTERN uint16 IfxScuWdt_getGlobalEndinitPassword(void);
487
488 /** \brief API to fetch current password of global safety endinit Watchdog module.
489 *
490 * This API will fetch current global endinit password for Safety WDT Hardware module. password is needed to be passed
491 * with most of the WDT APIs. Normally this API can be used to store the password locally in the caller function
492 * or store the password globally in a global variable at the application memory.
493 * This API is only meant to be used with startup routines where function call is not possible.
494 * \return password Existing (Application specific) password for the Watchdog module.
495 */
496 IFX_EXTERN uint16 IfxScuWdt_getGlobalSafetyEndinitPassword(void);
497
498 /** \brief SCUWDT API to fetch current password of Safety Watchdog module.
499 *
500 * This API will fetch current Watchdog password for Safety WDT Hardware module. password is needed to be passed
501 * with most of the WDT APIs. Normally this API can be used to store the password locally in the caller function
502 * or store the password globally in a global variable at the application memory.
503 * \return password Existing (Application specific) password for the Watchdog module.
504 */
505 IFX_EXTERN uint16 IfxScuWdt_getSafetyWatchdogPassword(void);
506
507 /** \brief SCUWDT API to service CPU Watchdog functionality.
508 *
509 * This API will service Watchdog functionality corresponding to CPU WDT Hardware module.
510 * User need to use this API call periodically. This API results in reloading of the Watchdog Timer.
511 * User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword).
512 * \param password Existing (Application specific) password for the Watchdog module.
513 * \return None
514 */
515 IFX_EXTERN void IfxScuWdt_serviceCpuWatchdog(uint16 password);
516
517 /** \brief SCUWDT API to service Safety Watchdog functionality.
518 *
519 * This API will service Watchdog functionality corresponding to Safety WDT Hardware module.
520 * User need to use this API call periodically. This API results in reloading of the Watchdog Timer.
521 * User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).
522 * \param password Existing (Application specific) password for the Watchdog module.
523 * \return None
524 */
525 IFX_EXTERN void IfxScuWdt_serviceSafetyWatchdog(uint16 password);
526
527 /** \brief SCUWDT API to fetch current status of CPU Watchdog module.
528 * \return status
529 */
530 IFX_EXTERN uint8 IfxScuWdt_getCpuWatchdogStatus(void);
531
532 /** \} */
533
534 /******************************************************************************/
535 /*-------------------------Global Function Prototypes-------------------------*/
536 /******************************************************************************/
537
538 /** \brief Enables the watchdog functionality with debugger connected,\n
539 * debug interface will also be enabled, if not enabled already.
540 * \return Status, Success = 0, Failure = 1.
541 */
542 IFX_EXTERN boolean IfxScuWdt_enableWatchdogWithDebugger(void);
543
544 /******************************************************************************/
545 /*---------------------Inline Function Implementations------------------------*/
546 /******************************************************************************/
547
548 IFX_INLINE void IfxScuWdt_clearCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, uint16 password)
549 {
550 if (watchdog->CON0.B.LCK)
551 {
552 /* see Table 1 (Password Access Bit Pattern Requirements) */
553 watchdog->CON0.U = (1 << IFX_SCU_WDTCPU_CON0_ENDINIT_OFF) |
554 (0 << IFX_SCU_WDTCPU_CON0_LCK_OFF) |
555 (password << IFX_SCU_WDTCPU_CON0_PW_OFF) |
556 (watchdog->CON0.B.REL << IFX_SCU_WDTCPU_CON0_REL_OFF);
557 }
558
559 /* Clear ENDINT and set LCK bit in Config_0 register */
560 watchdog->CON0.U = (0 << IFX_SCU_WDTCPU_CON0_ENDINIT_OFF) |
561 (1 << IFX_SCU_WDTCPU_CON0_LCK_OFF) |
562 (password << IFX_SCU_WDTCPU_CON0_PW_OFF) |
563 (watchdog->CON0.B.REL << IFX_SCU_WDTCPU_CON0_REL_OFF);
564
565 /* read back ENDINIT and wait until it has been cleared */
566 while (watchdog->CON0.B.ENDINIT == 1)
567 {}
568 }
569
570
571 IFX_INLINE void IfxScuWdt_clearGlobalSafetyEndinitInline(uint16 password)
572 {
573 /* Clear EndInit Watch-dog*/
574 MODULE_SCU.SEICON0.U = (0xFFFCU << 16U) | (password << IFX_SCU_SEICON0_EPW_OFF);
575
576 while (MODULE_SCU.SEICON0.B.ENDINIT == 1)
577 {}
578 }
579
580
581 IFX_INLINE void IfxScuWdt_clearSafetyEndinitInline(uint16 password)
582 {
583 if (SCU_WDTS_CON0.B.LCK)
584 {
585 /* see Table 1 (Password Access Bit Pattern Requirements) */
586 SCU_WDTS_CON0.U = (1 << IFX_SCU_WDTS_CON0_ENDINIT_OFF) |
587 (0 << IFX_SCU_WDTS_CON0_LCK_OFF) |
588 (password << IFX_SCU_WDTS_CON0_PW_OFF) |
589 (SCU_WDTS_CON0.B.REL << IFX_SCU_WDTS_CON0_REL_OFF);
590 }
591
592 /* Clear ENDINT and set LCK bit in Config_0 register */
593 SCU_WDTS_CON0.U = (0 << IFX_SCU_WDTS_CON0_ENDINIT_OFF) |
594 (1 << IFX_SCU_WDTS_CON0_LCK_OFF) |
595 (password << IFX_SCU_WDTS_CON0_PW_OFF) |
596 (SCU_WDTS_CON0.B.REL << IFX_SCU_WDTS_CON0_REL_OFF);
597
598 /* read back ENDINIT and wait until it has been cleared */
599 while (SCU_WDTS_CON0.B.ENDINIT == 1)
600 {}
601 }
602
603
604 IFX_INLINE uint16 IfxScuWdt_getCpuWatchdogPasswordInline(Ifx_SCU_WDTCPU *watchdog)
605 {
606 uint16 password;
607
608 /* Read Password from CON0 register
609 * !!! NOTE: !!! when read bottom six bit of password are inverted so we have
610 * to toggle them before returning password */
611 password = watchdog->CON0.B.PW;
612 password ^= 0x003F;
613
614 return password;
615 }
616
617
618 IFX_INLINE boolean IfxScuWdt_getCpuWatchdogEndInitInline(Ifx_SCU_WDTCPU *watchdog)
619 {
620 return (boolean)watchdog->CON0.B.ENDINIT;
621 }
622
623
624 IFX_INLINE uint16 IfxScuWdt_getGlobalSafetyEndinitPasswordInline(void)
625 {
626 /* Read Password from CON0 register
627 * !!! NOTE: !!! when read bottom six bit of password are inverted so we have
628 * to toggle them before returning password */
629
630 uint16 password = MODULE_SCU.SEICON0.B.EPW ^ 0x003F;
631 return password;
632 }
633
634
635 IFX_INLINE boolean IfxScuWdt_getSafetyWatchdogEndInit(void)
636 {
637 return (boolean)MODULE_SCU.WDTS.CON0.B.ENDINIT;
638 }
639
640
641 IFX_INLINE uint16 IfxScuWdt_getSafetyWatchdogPasswordInline(void)
642 {
643 uint16 password;
644 Ifx_SCU_WDTS *watchdog = &MODULE_SCU.WDTS;
645
646 /* Read Password from Safety WDT CON0 register
647 * !!! NOTE: !!! when read bottom six bit of password are inverted so we have
648 * to toggle them before returning password */
649 password = watchdog->CON0.B.PW;
650 password ^= 0x003F;
651
652 return password;
653 }
654
655
656 IFX_INLINE void IfxScuWdt_setCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, uint16 password)
657 {
658 if (watchdog->CON0.B.LCK)
659 {
660 /* see Table 1 (Pass.word Access Bit Pattern Requirements) */
661 watchdog->CON0.U = (1 << IFX_SCU_WDTCPU_CON0_ENDINIT_OFF) |
662 (0 << IFX_SCU_WDTCPU_CON0_LCK_OFF) |
663 (password << IFX_SCU_WDTCPU_CON0_PW_OFF) |
664 (watchdog->CON0.B.REL << IFX_SCU_WDTCPU_CON0_REL_OFF);
665 }
666
667 /* Set ENDINT and set LCK bit in Config_0 register */
668 watchdog->CON0.U = (1 << IFX_SCU_WDTCPU_CON0_ENDINIT_OFF) |
669 (1 << IFX_SCU_WDTCPU_CON0_LCK_OFF) |
670 (password << IFX_SCU_WDTCPU_CON0_PW_OFF) |
671 (watchdog->CON0.B.REL << IFX_SCU_WDTCPU_CON0_REL_OFF);
672
673 /* read back ENDINIT and wait until it has been set */
674 while (watchdog->CON0.B.ENDINIT == 0)
675 {}
676 }
677
678
679 IFX_INLINE void IfxScuWdt_setGlobalSafetyEndinitInline(uint16 password)
680 {
681 /* Set EndInit Watch-dog*/
682 MODULE_SCU.SEICON0.U = (0xFFFCU << 16U) | (password << IFX_SCU_SEICON0_EPW_OFF) | (1 << IFX_SCU_SEICON0_ENDINIT_OFF);
683
684 while (MODULE_SCU.SEICON0.B.ENDINIT == 0)
685 {}
686 }
687
688
689 IFX_INLINE void IfxScuWdt_setSafetyEndinitInline(uint16 password)
690 {
691 if (SCU_WDTS_CON0.B.LCK)
692 {
693 /* see Table 1 (Password Access Bit Pattern Requirements) */
694 SCU_WDTS_CON0.U = (1 << IFX_SCU_WDTS_CON0_ENDINIT_OFF) |
695 (0 << IFX_SCU_WDTS_CON0_LCK_OFF) |
696 (password << IFX_SCU_WDTS_CON0_PW_OFF) |
697 (SCU_WDTS_CON0.B.REL << IFX_SCU_WDTS_CON0_REL_OFF);
698 }
699
700 /* Set ENDINT and set LCK bit in Config_0 register */
701 SCU_WDTS_CON0.U = (1 << IFX_SCU_WDTS_CON0_ENDINIT_OFF) |
702 (1 << IFX_SCU_WDTS_CON0_LCK_OFF) |
703 (password << IFX_SCU_WDTS_CON0_PW_OFF) |
704 (SCU_WDTS_CON0.B.REL << IFX_SCU_WDTS_CON0_REL_OFF);
705
706 /* read back ENDINIT and wait until it has been cleared */
707 while (SCU_WDTS_CON0.B.ENDINIT == 0)
708 {}
709 }
710
711
712 #endif /* IFXSCUWDT_H */
IfxScuWdt_setSafetyEndinitInline
IFX_INLINE void IfxScuWdt_setSafetyEndinitInline(uint16 password)
SCUWDT Inline API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.h:689
IfxScuWdt_getSafetyWatchdogPasswordInline
IFX_INLINE uint16 IfxScuWdt_getSafetyWatchdogPasswordInline(void)
SCUWDT Inline API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.h:641
IfxScuWdt_clearGlobalEndinit
IFX_EXTERN void IfxScuWdt_clearGlobalEndinit(uint16 password)
API to Clear global ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:255
IfxScuWdt_clearSafetyEndinitInline
IFX_INLINE void IfxScuWdt_clearSafetyEndinitInline(uint16 password)
SCUWDT Inline API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.h:581
IfxScuWdt_Config::clrInternalResetFlag
boolean clrInternalResetFlag
Clear Internal Reset Flag.
Definition: IfxScuWdt.h:96
IfxScuWdt_setGlobalEndinit
IFX_EXTERN void IfxScuWdt_setGlobalEndinit(uint16 password)
API to set global ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:619
IfxScuWdt_getGlobalSafetyEndinitPassword
IFX_EXTERN uint16 IfxScuWdt_getGlobalSafetyEndinitPassword(void)
API to fetch current password of global safety endinit Watchdog module.
Definition: IfxScuWdt.c:378
IfxScuWdt_getCpuWatchdogStatus
IFX_EXTERN uint8 IfxScuWdt_getCpuWatchdogStatus(void)
SCUWDT API to fetch current status of CPU Watchdog module.
Definition: IfxScuWdt.c:728
IfxScuWdt_setGlobalSafetyEndinit
IFX_EXTERN void IfxScuWdt_setGlobalSafetyEndinit(uint16 password)
API to set global safety ENDINIT bit provided by safety WDT Hardware module.
Definition: IfxScuWdt.c:643
IfxScuWdt_changeGlobalEndinitPassword
IFX_EXTERN void IfxScuWdt_changeGlobalEndinitPassword(uint16 password, uint16 newPassword)
API to change global endinit password.
Definition: IfxScuWdt.c:126
IfxScuWdt.asm.h
SCU basic functionality.
IfxScuWdt_clearCpuEndinitInline
IFX_INLINE void IfxScuWdt_clearCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, uint16 password)
SCUWDT Inline API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.h:548
IfxScuWdt_getCpuWatchdogPasswordInline
IFX_INLINE uint16 IfxScuWdt_getCpuWatchdogPasswordInline(Ifx_SCU_WDTCPU *watchdog)
SCUWDT Inline API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.h:604
IfxScuWdt_initCpuWatchdog
IFX_EXTERN void IfxScuWdt_initCpuWatchdog(Ifx_SCU_WDTCPU *wdt, const IfxScuWdt_Config *config)
SCUWDT API to initialize an instance of WDT Driver which corresponds to CPU WDT Hardware module...
Definition: IfxScuWdt.c:414
IfxScuWdt_clearCpuEndinit
IFX_EXTERN void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxScuWdt_disableSafetyWatchdog
IFX_EXTERN void IfxScuWdt_disableSafetyWatchdog(uint16 password)
SCUWDT API to disable Safety Watchdog functionality.
Definition: IfxScuWdt.c:323
IfxCpu_Intrinsics.h
IfxScu_WDTCON1_IR
IfxScu_WDTCON1_IR
Definition: IfxScu_cfg.h:1322
IfxScuWdt_enableSafetyWatchdog
IFX_EXTERN void IfxScuWdt_enableSafetyWatchdog(uint16 password)
SCUWDT API to enable Safety Watchdog functionality.
Definition: IfxScuWdt.c:343
IfxScuWdt_setGlobalSafetyEndinitInline
IFX_INLINE void IfxScuWdt_setGlobalSafetyEndinitInline(uint16 password)
Set the Global safety Endinit password (Inline)
Definition: IfxScuWdt.h:679
IfxScuWdt_serviceCpuWatchdog
IFX_EXTERN void IfxScuWdt_serviceCpuWatchdog(uint16 password)
SCUWDT API to service CPU Watchdog functionality.
Definition: IfxScuWdt.c:601
IfxScuWdt_serviceSafetyWatchdog
IFX_EXTERN void IfxScuWdt_serviceSafetyWatchdog(uint16 password)
SCUWDT API to service Safety Watchdog functionality.
Definition: IfxScuWdt.c:607
IfxScuWdt_clearSafetyEndinit
IFX_EXTERN void IfxScuWdt_clearSafetyEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:305
IfxScuWdt_initSafetyWatchdog
IFX_EXTERN void IfxScuWdt_initSafetyWatchdog(Ifx_SCU_WDTS *wdt, const IfxScuWdt_Config *config)
SCUWDT API to initialize an instance of WDT Driver which corresponds to Safety WDT Hardware module...
Definition: IfxScuWdt.c:507
IfxScuWdt_enableCpuWatchdog
IFX_EXTERN void IfxScuWdt_enableCpuWatchdog(uint16 password)
SCUWDT API to enable CPU Watchdog functionality.
Definition: IfxScuWdt.c:331
IfxScuWdt_getCpuWatchdogPassword
IFX_EXTERN uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxScuWdt_Config::inputFrequency
IfxScu_WDTCON1_IR inputFrequency
input frequency of the WDT
Definition: IfxScuWdt.h:90
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxScuWdt_getCpuWatchdogEndInit
IFX_EXTERN boolean IfxScuWdt_getCpuWatchdogEndInit(void)
SCUWDT API to fetch current endinit of CPU Watchdog module.
Definition: IfxScuWdt.c:357
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxScuWdt_Config
Configuration structure for Scu Watchdog. IfxScuWdt_Config is a type describing configuration structu...
Definition: IfxScuWdt.h:86
IfxScu_cfg.h
SCU on-chip implementation data.
IfxScuWdt_getGlobalEndinitPassword
IFX_EXTERN uint16 IfxScuWdt_getGlobalEndinitPassword(void)
API to fetch current password of global endinit Watchdog module.
Definition: IfxScuWdt.c:363
IfxScuWdt_Config::password
uint16 password
password for access to WDTxCON0 reg
Definition: IfxScuWdt.h:88
IfxScuWdt_Config::enableSmuRestriction
boolean enableSmuRestriction
Unlock Restriction Request Control Bit.
Definition: IfxScuWdt.h:92
IfxScuWdt_Config::enableTimerCheckTolerance
boolean enableTimerCheckTolerance
Timer Check Tolerance Request.
Definition: IfxScuWdt.h:95
IfxScuWdt_changeCpuWatchdogReload
IFX_EXTERN void IfxScuWdt_changeCpuWatchdogReload(uint16 password, uint16 reload)
SCUWDT API to change CPU Watchdog timer reload value.
Definition: IfxScuWdt.c:93
IfxScuWdt_disableCpuWatchdog
IFX_EXTERN void IfxScuWdt_disableCpuWatchdog(uint16 password)
SCUWDT API to disable CPU Watchdog functionality.
Definition: IfxScuWdt.c:311
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxScuWdt_getCpuWatchdogEndInitInline
IFX_INLINE boolean IfxScuWdt_getCpuWatchdogEndInitInline(Ifx_SCU_WDTCPU *watchdog)
SCUWDT API to fetch current endinit of CPU Watchdog module.
Definition: IfxScuWdt.h:618
IfxScuWdt_clearGlobalSafetyEndinitInline
IFX_INLINE void IfxScuWdt_clearGlobalSafetyEndinitInline(uint16 password)
Clear the Global safety Endinit password (Inline)
Definition: IfxScuWdt.h:571
IfxScuWdt_Config::globalEndInitInputFrequency
IfxScu_WDTCON1_IR globalEndInitInputFrequency
input frequency of the global End init WDT
Definition: IfxScuWdt.h:97
IfxScuWdt_Config::enableAutomaticPasswordChange
boolean enableAutomaticPasswordChange
Password Auto-sequence Request Bit.
Definition: IfxScuWdt.h:93
IfxScuWdt_getGlobalSafetyEndinitPasswordInline
IFX_INLINE uint16 IfxScuWdt_getGlobalSafetyEndinitPasswordInline(void)
API to fetch current password of global safety endinit Watchdog module.
Definition: IfxScuWdt.h:624
IfxScuWdt_setCpuEndinitInline
IFX_INLINE void IfxScuWdt_setCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, uint16 password)
SCUWDT Inline API to Set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.h:656
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxScuWdt_initConfig
IFX_EXTERN void IfxScuWdt_initConfig(IfxScuWdt_Config *config)
SCUWDT API to initialize WDT configuration structure - Constructor This API initialize the ScuWdt con...
Definition: IfxScuWdt.c:399
IfxScuWdt_setSafetyEndinit
IFX_EXTERN void IfxScuWdt_setSafetyEndinit(uint16 password)
SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:668
IfxScuWdt_getSafetyWatchdogPassword
IFX_EXTERN uint16 IfxScuWdt_getSafetyWatchdogPassword(void)
SCUWDT API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.c:393
IfxScuWdt_changeCpuWatchdogPassword
IFX_EXTERN void IfxScuWdt_changeCpuWatchdogPassword(uint16 password, uint16 newPassword)
SCUWDT API to change CPU Watchdog password.
Definition: IfxScuWdt.c:62
IfxScuWdt_Config::enableTimerCheck
boolean enableTimerCheck
Counter Check Request Bit.
Definition: IfxScuWdt.h:94
IfxScuWdt_Config::reload
uint16 reload
WDT reload value.
Definition: IfxScuWdt.h:89
IfxScuWdt_setCpuEndinit
IFX_EXTERN void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxScuWdt_enableWatchdogWithDebugger
IFX_EXTERN boolean IfxScuWdt_enableWatchdogWithDebugger(void)
Enables the watchdog functionality with debugger connected, debug interface will also be enabled...
Definition: IfxScuWdt.c:674
IfxScuWdt_clearGlobalSafetyEndinit
IFX_EXTERN void IfxScuWdt_clearGlobalSafetyEndinit(uint16 password)
API to Clear global safety ENDINIT bit provided by safety WDT Hardware module.
Definition: IfxScuWdt.c:280
IfxScuWdt_changeGlobalSafetyEndinitPassword
IFX_EXTERN void IfxScuWdt_changeGlobalSafetyEndinitPassword(uint16 password, uint16 newPassword)
API to change global safety endinit password.
Definition: IfxScuWdt.c:156
IfxScuWdt_Config::disableWatchdog
boolean disableWatchdog
Disable Request Control Bit.
Definition: IfxScuWdt.h:91
IfxScuWdt_changeSafetyWatchdogPassword
IFX_EXTERN void IfxScuWdt_changeSafetyWatchdogPassword(uint16 password, uint16 newPassword)
SCUWDT API to change Safety Watchdog password.
Definition: IfxScuWdt.c:186
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxScuWdt_changeSafetyWatchdogReload
IFX_EXTERN void IfxScuWdt_changeSafetyWatchdogReload(uint16 password, uint16 reload)
SCUWDT API to change Safety Watchdog timer reload value.
Definition: IfxScuWdt.c:217
IfxScuWdt_getSafetyWatchdogEndInit
IFX_INLINE boolean IfxScuWdt_getSafetyWatchdogEndInit(void)
SCUWDT API to fetch current endinit of Safety/System Watchdog module.
Definition: IfxScuWdt.h:635


iLLD_TC38A: IfxSent.c Source File

  • Sent
  • Std
IfxSent.c
Go to the documentation of this file.
1 /**
2 * \file IfxSent.c
3 * \brief SENT basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 *
43 */
44
45 /******************************************************************************/
46 /*----------------------------------Includes----------------------------------*/
47 /******************************************************************************/
48
49 #include "IfxSent.h"
50
51 /******************************************************************************/
52 /*-------------------------Function Implementations---------------------------*/
53 /******************************************************************************/
54
55 float32 IfxSent_getChannelUnitTime(Ifx_SENT *sent, IfxSent_ChannelId channelId)
56 {
57 float32 fFracDiv = IfxSent_getModuleClock(sent);
58 float32 fPdiv = fFracDiv / (float32)(sent->CH[channelId].CPDR.B.PDIV + 1);
59
60 uint32 div = sent->CH[channelId].CFDR.B.DIV;
61
62 if (div > 0)
63 {
64 float32 fTick = (fPdiv * 56) / div;
65 return 1 / fTick;
66 }
67 else
68 {
69 return 0.0;
70 }
71 }
72
73
74 float32 IfxSent_getModuleClock(Ifx_SENT *sent)
75 {
76 float32 fsys = IfxScuCcu_getSpbFrequency();
77
78 Ifx_SENT_FDR fdr;
79 fdr.U = sent->FDR.U;
80
81 float32 kernelFreq = 0.0;
82
83 if (fdr.B.DM == 1)
84 {
85 kernelFreq = fsys / (1024 - fdr.B.STEP);
86 }
87 else if (fdr.B.DM == 2)
88 {
89 kernelFreq = (fsys * fdr.B.STEP) / 1024;
90 }
91
92 return kernelFreq;
93 }
94
95
96 void IfxSent_initializeChannelUnitTime(Ifx_SENT *sent, IfxSent_ChannelId channelId, float32 tUnit)
97 {
98 float32 fFracDiv = IfxSent_getModuleClock(sent);
99
100 /* const uint32 divMin = 560; */
101 const uint32 divMax = 3276;
102
103 uint32 pDiv;
104 uint32 fDiv;
105
106 float32 tResult;
107 tResult = fFracDiv * 56 * tUnit;
108 pDiv = tResult / divMax;
109 fDiv = tResult / pDiv;
110
111 if (fDiv > divMax)
112 {
113 pDiv = pDiv + 1;
114 fDiv = tResult / pDiv;
115 }
116
117 if ((pDiv > 1024) || (pDiv < 1))
118 {
119 pDiv = 1025;
120 fDiv = tResult / 1024;
121 }
122
123 IfxSent_setChannelPreDivider(sent, channelId, (uint16)pDiv - 1);
124 IfxSent_setChannelFractionalDivider(sent, channelId, (uint16)fDiv);
125 }
126
127
128 void IfxSent_initializeModuleClock(Ifx_SENT *sent, IfxSent_ClockDividerMode dividerMode, uint16 stepValue)
129 {
130 Ifx_SENT_FDR tempFDR;
131 tempFDR.U = 0;
132 tempFDR.B.STEP = stepValue;
133 tempFDR.B.DM = dividerMode;
134 sent->FDR.U = tempFDR.U;
135 }
136
137
138 void IfxSent_resetModule(Ifx_SENT *sent)
139 {
140 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
141
142 IfxScuWdt_clearCpuEndinit(passwd);
143 sent->KRST1.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
144 sent->KRST0.B.RST = 1;
145 IfxScuWdt_setCpuEndinit(passwd);
146
147 while (0 == sent->KRST0.B.RSTSTAT) /* Wait until reset is executed */
148
149 {}
150
151 IfxScuWdt_clearCpuEndinit(passwd);
152 sent->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
153 IfxScuWdt_setCpuEndinit(passwd);
154 }
IfxScuCcu_getSpbFrequency
float32 IfxScuCcu_getSpbFrequency(void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider...
Definition: IfxScuCcu.c:479
IfxSent_resetModule
void IfxSent_resetModule(Ifx_SENT *sent)
Resets the SENT module.
Definition: IfxSent.c:138
uint32
unsigned long uint32
Definition: Platform_Types.h:116
float32
float float32
Definition: Platform_Types.h:170
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxSent_getChannelUnitTime
float32 IfxSent_getChannelUnitTime(Ifx_SENT *sent, IfxSent_ChannelId channelId)
Returns the current unit time (f_tick) of the given channel.
Definition: IfxSent.c:55
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxSent_setChannelFractionalDivider
IFX_INLINE void IfxSent_setChannelFractionalDivider(Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 divider)
Sets the channel fractional baudrate divider.
Definition: IfxSent.h:694
IfxSent_setChannelPreDivider
IFX_INLINE void IfxSent_setChannelPreDivider(Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 preDivider)
Sets the channel baudrate pre-divider.
Definition: IfxSent.h:700
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxSent.h
SENT basic functionality.
IfxSent_ClockDividerMode
IfxSent_ClockDividerMode
SENT.FDR.DM , Specifies clock divider mode.
Definition: IfxSent.h:107
IfxSent_initializeChannelUnitTime
void IfxSent_initializeChannelUnitTime(Ifx_SENT *sent, IfxSent_ChannelId channelId, float32 tUnit)
Initializes the desired unit time (f_tick) for the external SENT device connected to the given channe...
Definition: IfxSent.c:96
IfxSent_initializeModuleClock
void IfxSent_initializeModuleClock(Ifx_SENT *sent, IfxSent_ClockDividerMode dividerMode, uint16 stepValue)
Initialize and get the clock for SENT kernel.
Definition: IfxSent.c:128
IfxSent_ChannelId
IfxSent_ChannelId
Specifies the channel Id.
Definition: IfxSent_cfg.h:85
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxSent_getModuleClock
float32 IfxSent_getModuleClock(Ifx_SENT *sent)
Returns the current module frequency in Hertz.
Definition: IfxSent.c:74


iLLD_TC38A: IfxSent.h Source File

  • Sent
  • Std
IfxSent.h
Go to the documentation of this file.
1 /**
2 * \file IfxSent.h
3 * \brief SENT basic functionality
4 * \ingroup IfxLld_Sent
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 *
43 *
44 * \defgroup IfxLld_Sent_Std_Enumerations Enumerations
45 * \ingroup IfxLld_Sent_Std
46 * \defgroup IfxLld_Sent_Std_Configuration Configuration Functions
47 * \ingroup IfxLld_Sent_Std
48 * \defgroup IfxLld_Sent_Std_Interrupts Interrupts
49 * \ingroup IfxLld_Sent_Std
50 * \defgroup IfxLld_Sent_Std_Operative Operative Functions
51 * \ingroup IfxLld_Sent_Std
52 * \defgroup IfxLld_Sent_Std_Baudrate Baudrate Configuration
53 * \ingroup IfxLld_Sent_Std
54 * \defgroup IfxLld_Sent_Std_IO IO Pin Configuration Functions
55 * \ingroup IfxLld_Sent_Std
56 */
57
58 #ifndef IFXSENT_H
59 #define IFXSENT_H 1
60
61 /******************************************************************************/
62 /*----------------------------------Includes----------------------------------*/
63 /******************************************************************************/
64
65 #include "_Impl/IfxSent_cfg.h"
66 #include "Src/Std/IfxSrc.h"
67 #include "Scu/Std/IfxScuCcu.h"
68 #include "_PinMap/IfxSent_PinMap.h"
69 #include "Cpu/Std/IfxCpu_Intrinsics.h"
70 #include "IfxSent_bf.h"
71 #include "IfxSent_reg.h"
72
73 /******************************************************************************/
74 /*-----------------------------------Macros-----------------------------------*/
75 /******************************************************************************/
76
77 #define IFXSENT_INTERRUPT_STATUS_ERROR_FLAGS (0x000037f4)
78
79 /******************************************************************************/
80 /*--------------------------------Enumerations--------------------------------*/
81 /******************************************************************************/
82
83 /** \addtogroup IfxLld_Sent_Std_Enumerations
84 * \{ */
85 /** \brief SENT.CH[channelId].IOCR.ALTI , Specifies alternate input for channel
86 */
87 typedef enum
88 {
89 IfxSent_AlternateInput_0 = 0, /**< \brief Specifies alternate input 0 */
90 IfxSent_AlternateInput_1, /**< \brief Specifies alternate input 1 */
91 IfxSent_AlternateInput_2, /**< \brief Specifies alternate input 2 */
92 IfxSent_AlternateInput_3 /**< \brief Specifies alternate input 3 */
93 } IfxSent_AlternateInput;
94
95 /** \brief SENT.CH[channelId].RSR.CST, Specifies the current channel status
96 */
97 typedef enum
98 {
99 IfxSent_ChannelStatus_stop = 0, /**< \brief Specifies the channel is stopped */
100 IfxSent_ChannelStatus_initialize = 1, /**< \brief Specifies the channel is initialized */
101 IfxSent_ChannelStatus_running = 2, /**< \brief Specifies the channel is running */
102 IfxSent_ChannelStatus_synchronize = 3 /**< \brief Specifies the channel is synchronized */
103 } IfxSent_ChannelStatus;
104
105 /** \brief SENT.FDR.DM , Specifies clock divider mode
106 */
107 typedef enum
108 {
109 IfxSent_ClockDividerMode_off = 0, /**< \brief Specifies clock divider mode off */
110 IfxSent_ClockDividerMode_normal = 1, /**< \brief Specifies clock normal divider mode */
111 IfxSent_ClockDividerMode_fractional = 2 /**< \brief Specifies clock fractional divider mode */
112 } IfxSent_ClockDividerMode;
113
114 /** \brief SENT.CH[channelId].SDS.CON , Specifies received configuration bit value
115 */
116 typedef enum
117 {
118 IfxSent_ConfigBit_0 = 0, /**< \brief Specifies received configuration bit value 0 */
119 IfxSent_ConfigBit_1 /**< \brief Specifies received configuration bit value 1 */
120 } IfxSent_ConfigBit;
121
122 /** \brief SENT.CH[channelId].IOCR.DEPTH , Specifies number of port input samples
123 */
124 typedef enum
125 {
126 IfxSent_DigitalGlitchesLength_off = 0, /**< \brief Specifies port input samples off */
127 IfxSent_DigitalGlitchesLength_1 = 1, /**< \brief Specifies 1 port input samples */
128 IfxSent_DigitalGlitchesLength_2, /**< \brief Specifies 2 port input samples */
129 IfxSent_DigitalGlitchesLength_3, /**< \brief Specifies 3 port input samples */
130 IfxSent_DigitalGlitchesLength_4, /**< \brief Specifies 4 port input samples */
131 IfxSent_DigitalGlitchesLength_5, /**< \brief Specifies 5 port input samples */
132 IfxSent_DigitalGlitchesLength_6, /**< \brief Specifies 6 port input samples */
133 IfxSent_DigitalGlitchesLength_7, /**< \brief Specifies 7 port input samples */
134 IfxSent_DigitalGlitchesLength_8, /**< \brief Specifies 8 port input samples */
135 IfxSent_DigitalGlitchesLength_9, /**< \brief Specifies 9 port input samples */
136 IfxSent_DigitalGlitchesLength_10, /**< \brief Specifies 10 port input samples */
137 IfxSent_DigitalGlitchesLength_11, /**< \brief Specifies 11 port input samples */
138 IfxSent_DigitalGlitchesLength_12, /**< \brief Specifies 12 port input samples */
139 IfxSent_DigitalGlitchesLength_13, /**< \brief Specifies 13 port input samples */
140 IfxSent_DigitalGlitchesLength_14, /**< \brief Specifies 14 port input samples */
141 IfxSent_DigitalGlitchesLength_15 /**< \brief Specifies 15 port input samples */
142 } IfxSent_DigitalGlitchesLength;
143
144 /** \brief SENT.CH[channelId].RCR.ESF , Specifies the serial frame structure
145 */
146 typedef enum
147 {
148 IfxSent_ExtendedSerialFrameMode_standard = 0, /**< \brief Specifies the standard serial frame structure */
149 IfxSent_ExtendedSerialFrameMode_extended = 1 /**< \brief Specifies the extended serial frame structure */
150 } IfxSent_ExtendedSerialFrameMode;
151
152 /** \brief SENT.CH[channelId].IOCR.ETS , Specifies the external trigger line
153 */
154 typedef enum
155 {
156 IfxSent_ExternalTrigger_0 = 0, /**< \brief Specifies the external trigger line 0 */
157 IfxSent_ExternalTrigger_1, /**< \brief Specifies the external trigger line 1 */
158 IfxSent_ExternalTrigger_2, /**< \brief Specifies the external trigger line 2 */
159 IfxSent_ExternalTrigger_3, /**< \brief Specifies the external trigger line 3 */
160 IfxSent_ExternalTrigger_4, /**< \brief Specifies the external trigger line 4 */
161 IfxSent_ExternalTrigger_5, /**< \brief Specifies the external trigger line 5 */
162 IfxSent_ExternalTrigger_6, /**< \brief Specifies the external trigger line 6 */
163 IfxSent_ExternalTrigger_7, /**< \brief Specifies the external trigger line 7 */
164 IfxSent_ExternalTrigger_8, /**< \brief Specifies the external trigger line 8 */
165 IfxSent_ExternalTrigger_9, /**< \brief Specifies the external trigger line 9 */
166 IfxSent_ExternalTrigger_10, /**< \brief Specifies the external trigger line 10 */
167 IfxSent_ExternalTrigger_11, /**< \brief Specifies the external trigger line 11 */
168 IfxSent_ExternalTrigger_12, /**< \brief Specifies the external trigger line 12 */
169 IfxSent_ExternalTrigger_13, /**< \brief Specifies the external trigger line 13 */
170 IfxSent_ExternalTrigger_14, /**< \brief Specifies the external trigger line 14 */
171 IfxSent_ExternalTrigger_15 /**< \brief Specifies the external trigger line 15 */
172 } IfxSent_ExternalTrigger;
173
174 /** \brief SENT.CH[channelId].RCR.CFC, Specifies received frame check mode
175 */
176 typedef enum
177 {
178 IfxSent_FrameCheckMode_pastSyncPulse = 0, /**< \brief Specifies frame check mode against past sync pulse */
179 IfxSent_FrameCheckMode_futureSuncPulse = 1 /**< \brief Specifies frame check mode against future sync pulse */
180 } IfxSent_FrameCheckMode;
181
182 /** \brief SENT.CH[channelId].INP.X(X= RSI,RDI,RBI,TDI,TBI,ERRI,SDI,WDI),Specifies interrupt requested node for respective interrupt
183 */
184 typedef enum
185 {
186 IfxSent_InterruptNodePointer_trigo0 = 0, /**< \brief Specifies interrupt requested node TRIGO 0 */
187 IfxSent_InterruptNodePointer_trigo1, /**< \brief Specifies interrupt requested node TRIGO 1 */
188 IfxSent_InterruptNodePointer_trigo2, /**< \brief Specifies interrupt requested node TRIGO 2 */
189 IfxSent_InterruptNodePointer_trigo3, /**< \brief Specifies interrupt requested node TRIGO 3 */
190 IfxSent_InterruptNodePointer_trigo4, /**< \brief Specifies interrupt requested node TRIGO 4 */
191 IfxSent_InterruptNodePointer_trigo5, /**< \brief Specifies interrupt requested node TRIGO 5 */
192 IfxSent_InterruptNodePointer_trigo6, /**< \brief Specifies interrupt requested node TRIGO 6 */
193 IfxSent_InterruptNodePointer_trigo7, /**< \brief Specifies interrupt requested node TRIGO 7 */
194 IfxSent_InterruptNodePointer_trigo8, /**< \brief Specifies interrupt requested node TRIGO 8 */
195 IfxSent_InterruptNodePointer_trigo9 /**< \brief Specifies interrupt requested node TRIGO 9 */
196 } IfxSent_InterruptNodePointer;
197
198 /** \brief SENT.CH[channelId].VIEW.RDNPy( y=0,1,..7 ).Specifies receive data target nibble pointer
199 */
200 typedef enum
201 {
202 IfxSent_Nibble_0 = 0, /**< \brief Specifies receive data target nibble pointer to nibble 0 */
203 IfxSent_Nibble_1, /**< \brief Specifies receive data target nibble pointer to nibble 1 */
204 IfxSent_Nibble_2, /**< \brief Specifies receive data target nibble pointer to nibble 2 */
205 IfxSent_Nibble_3, /**< \brief Specifies receive data target nibble pointer to nibble 3 */
206 IfxSent_Nibble_4, /**< \brief Specifies receive data target nibble pointer to nibble 4 */
207 IfxSent_Nibble_5, /**< \brief Specifies receive data target nibble pointer to nibble 5 */
208 IfxSent_Nibble_6, /**< \brief Specifies receive data target nibble pointer to nibble 6 */
209 IfxSent_Nibble_7 /**< \brief Specifies receive data target nibble pointer to nibble 7 */
210 } IfxSent_Nibble;
211
212 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
213 * Definition in Ifx_SENT.CLC.B.EDIS
214 */
215 typedef enum
216 {
217 IfxSent_SleepMode_enable = 0, /**< \brief enables sleep mode */
218 IfxSent_SleepMode_disable = 1 /**< \brief disables sleep mode */
219 } IfxSent_SleepMode;
220
221 /** \brief Specifies the SENT SPC operational mode
222 */
223 typedef enum
224 {
225 IfxSent_SpcMode_sync = 0, /**< \brief Specifies synchronous SPC mode */
226 IfxSent_SpcMode_range = 1, /**< \brief Specifies range selection SPC mode */
227 IfxSent_SpcMode_bidirectional = 2 /**< \brief Specifies bidirectional transmit SPC mode */
228 } IfxSent_SpcMode;
229
230 /** \brief OCDS Suspend Control (OCDS.SUS)
231 */
232 typedef enum
233 {
234 IfxSent_SuspendMode_none = 0, /**< \brief No suspend */
235 IfxSent_SuspendMode_hard = 1, /**< \brief Hard Suspend */
236 IfxSent_SuspendMode_soft = 2 /**< \brief Soft Suspend */
237 } IfxSent_SuspendMode;
238
239 /** \brief SENT.CH[channelId].SCR.BASE, Specifies selection of pulse based on time
240 */
241 typedef enum
242 {
243 IfxSent_TimeBase_measuredFrequency = 0, /**< \brief Specifies selection of pulse based on measured frequency */
244 IfxSent_TimeBase_nominalFrequency = 1 /**< \brief Specifies selection of pulse based on nomianl frequency */
245 } IfxSent_TimeBase;
246
247 /** \brief SENT.CH[channelId].SCR.TRIG, Specifies trigger source for pulse generation
248 */
249 typedef enum
250 {
251 IfxSent_TriggerSource_off = 0, /**< \brief Specifies no pulse generation */
252 IfxSent_TriggerSource_immediate = 1, /**< \brief Specifies immediate pulse generation */
253 IfxSent_TriggerSource_fallingEdge = 2, /**< \brief Specifies pulse generation at fallingEdge */
254 IfxSent_TriggerSource_externalTrigger = 3 /**< \brief Specifies pulse generation after each external trigger */
255 } IfxSent_TriggerSource;
256
257 /** \} */
258
259 /** \brief Sent Interrupt Source
260 */
261 typedef enum
262 {
263 IfxSent_InterruptSource_rsi = 0, /**< \brief Enable Interrupt Request RSI */
264 IfxSent_InterruptSource_rdi = 1, /**< \brief Enable Interrupt Request RDI */
265 IfxSent_InterruptSource_rbi = 2, /**< \brief Enable Interrupt Request RBI */
266 IfxSent_InterruptSource_tdi = 3, /**< \brief Enable Interrupt Request TDI */
267 IfxSent_InterruptSource_tbi = 4, /**< \brief Enable Interrupt Request TBI */
268 IfxSent_InterruptSource_fri = 5, /**< \brief Enable Interrupt Request FRI */
269 IfxSent_InterruptSource_fdi = 6, /**< \brief Enable Interrupt Request FDI */
270 IfxSent_InterruptSource_nni = 7, /**< \brief Enable Interrupt Request NNI */
271 IfxSent_InterruptSource_nvi = 8, /**< \brief Enable Interrupt Request NVI */
272 IfxSent_InterruptSource_crci = 9, /**< \brief Enable Interrupt Request crci */
273 IfxSent_InterruptSource_wsi = 10, /**< \brief Enable Interrupt Request wsi */
274 IfxSent_InterruptSource_sdi = 11, /**< \brief Enable Interrupt Request sdi */
275 IfxSent_InterruptSource_scri = 12, /**< \brief Enable Interrupt Request scri */
276 IfxSent_InterruptSource_wdi = 13 /**< \brief Enable Interrupt Request wdi */
277 } IfxSent_InterruptSource;
278
279 /** \addtogroup IfxLld_Sent_Std_Configuration
280 * \{ */
281
282 /******************************************************************************/
283 /*-------------------------Inline Function Prototypes-------------------------*/
284 /******************************************************************************/
285
286 /** \brief Sets the operation mode of SENT kernel
287 * \param sent base address of the SENT register space
288 * \param channelId SENT channel number
289 * \param alternateInput alternate input/output pin for SENT operation
290 * \return None
291 */
292 IFX_INLINE void IfxSent_setAltiInput(Ifx_SENT *sent, IfxSent_ChannelId channelId, IfxSent_AlternateInput alternateInput);
293
294 /** \brief Set the module time stamp pre-divider
295 * \param sent base address of the SENT register space
296 * \param timeStampPreDivider time stamp pre-divider value
297 * \return None
298 */
299 IFX_INLINE void IfxSent_setTimeStampPredivider(Ifx_SENT *sent, uint32 timeStampPreDivider);
300
301 /** \} */
302
303 /** \addtogroup IfxLld_Sent_Std_Interrupts
304 * \{ */
305
306 /******************************************************************************/
307 /*-------------------------Inline Function Prototypes-------------------------*/
308 /******************************************************************************/
309
310 /** \brief Copies the current interrupt flags into the Ifx_SENT_CH_INTSTAT structure, and clears the flags in hardware.
311 *
312 * This function should be used in an ISR to retrieve the events which triggered the interrupt.
313 * \param sent base address of the SENT register space
314 * \param channelId SENT channel number
315 * \return Interrupt flags which have been cleared.
316 */
317 IFX_INLINE Ifx_SENT_CH_INTSTAT IfxSent_getAndClearInterruptStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId);
318
319 /** \brief Gets the current channel status
320 * \param sent base address of the SENT register space
321 * \param channelId SENT channel number
322 * \return current channel interrupt status
323 */
324 IFX_INLINE Ifx_SENT_CH_INTSTAT IfxSent_getChannelInterruptStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId);
325
326 /** \brief gets the source for channel interrupt handler
327 * \param channelId SENT channel number
328 * \return interrupt source
329 */
330 IFX_INLINE volatile Ifx_SRC_SRCR *IfxSent_getChannelSrc(IfxSent_ChannelId channelId);
331
332 /** \} */
333
334 /** \addtogroup IfxLld_Sent_Std_Operative
335 * \{ */
336
337 /******************************************************************************/
338 /*-------------------------Inline Function Prototypes-------------------------*/
339 /******************************************************************************/
340
341 /** \brief Disable the channel with the channel number
342 * \param sent base address of the SENT register space
343 * \param channelId SENT channel number
344 * \return None
345 */
346 IFX_INLINE void IfxSent_disableChannel(Ifx_SENT *sent, IfxSent_ChannelId channelId);
347
348 /** \brief Disable the SENT module
349 * \param sent base address of the SENT register space
350 * \return None
351 */
352 IFX_INLINE void IfxSent_disableModule(Ifx_SENT *sent);
353
354 /** \brief Enable the channel with the channel number
355 * \param sent base address of the SENT register space
356 * \param channelId SENT channel number
357 * \return None
358 */
359 IFX_INLINE void IfxSent_enableChannel(Ifx_SENT *sent, IfxSent_ChannelId channelId);
360
361 /** \brief Enable the SENT module
362 * \param sent base address of the SENT register space
363 * \return None
364 */
365 IFX_INLINE void IfxSent_enableModule(Ifx_SENT *sent);
366
367 /** \brief Returns the module's suspend state.
368 * TRUE :if module is suspended.
369 * FALSE:if module is not yet suspended.
370 * \param sent Pointer to SENT module registers
371 * \return Suspend status (TRUE / FALSE)
372 */
373 IFX_INLINE boolean IfxSent_isModuleSuspended(Ifx_SENT *sent);
374
375 /** \brief Sets the sensitivity of the module to sleep signal
376 * \param sent pointer to SENT registers
377 * \param mode mode selection (enable / disable)
378 * \return None
379 */
380 IFX_INLINE void IfxSent_setSleepMode(Ifx_SENT *sent, IfxSent_SleepMode mode);
381
382 /** \brief Configure the Module to Hard/Soft suspend mode.
383 * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
384 * \param sent Pointer to SENT module registers
385 * \param mode Module suspend mode
386 * \return None
387 */
388 IFX_INLINE void IfxSent_setSuspendMode(Ifx_SENT *sent, IfxSent_SuspendMode mode);
389
390 /******************************************************************************/
391 /*-------------------------Global Function Prototypes-------------------------*/
392 /******************************************************************************/
393
394 /** \brief Resets the SENT module
395 * \param sent base address of the SENT register space
396 * \return None
397 */
398 IFX_EXTERN void IfxSent_resetModule(Ifx_SENT *sent);
399
400 /** \} */
401
402 /** \addtogroup IfxLld_Sent_Std_Baudrate
403 * \{ */
404
405 /******************************************************************************/
406 /*-------------------------Inline Function Prototypes-------------------------*/
407 /******************************************************************************/
408
409 /** \brief Sets the channel fractional baudrate divider
410 * \param sent base address of the SENT register space
411 * \param channelId SENT channel number
412 * \param divider channel baudrate fractional divider
413 * \return None
414 */
415 IFX_INLINE void IfxSent_setChannelFractionalDivider(Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 divider);
416
417 /** \brief Sets the channel baudrate pre-divider
418 * \param sent base address of the SENT register space
419 * \param channelId SENT channel number
420 * \param preDivider channel baudrate pre-divider
421 * \return None
422 */
423 IFX_INLINE void IfxSent_setChannelPreDivider(Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 preDivider);
424
425 /******************************************************************************/
426 /*-------------------------Global Function Prototypes-------------------------*/
427 /******************************************************************************/
428
429 /** \brief Returns the current module frequency in Hertz.
430 * \param sent base address of the SENT register space
431 * \return The current module frequency in Hertz
432 */
433 IFX_EXTERN float32 IfxSent_getModuleClock(Ifx_SENT *sent);
434
435 /** \brief Initializes the desired unit time (f_tick) for the external SENT device connected to the given channel
436 * \param sent base address of the SENT register space
437 * \param channelId SENT channel number
438 * \param tUnit desired unit time (f_tick), e.g. 3E-6 for 3 uS
439 * \return None
440 */
441 IFX_EXTERN void IfxSent_initializeChannelUnitTime(Ifx_SENT *sent, IfxSent_ChannelId channelId, float32 tUnit);
442
443 /** \brief Initialize and get the clock for SENT kernel
444 * \param sent base address of the SENT register space
445 * \param dividerMode Divider mode for clock output
446 * \param stepValue clock frequency for for module fractional divider
447 * \return None
448 */
449 IFX_EXTERN void IfxSent_initializeModuleClock(Ifx_SENT *sent, IfxSent_ClockDividerMode dividerMode, uint16 stepValue);
450
451 /** \} */
452
453 /** \addtogroup IfxLld_Sent_Std_IO
454 * \{ */
455
456 /******************************************************************************/
457 /*-------------------------Inline Function Prototypes-------------------------*/
458 /******************************************************************************/
459
460 /** \brief Initializes a SENT input
461 * \param sentIn the SENT Pin which should be configured
462 * \param inputMode the pin input mode which should be configured
463 * \param padDriver the pad driver mode which should be configured
464 * \return None
465 */
466 IFX_INLINE void IfxSent_initSentPin(const IfxSent_Sent_In *sentIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
467
468 /** \brief Initializes a SPC output
469 * \param spcOut the SPC Pin which should be configured
470 * \param spcOutMode Port Output Mode
471 * \param padDriver the pad driver mode which should be configured
472 * \return None
473 */
474 IFX_INLINE void IfxSent_initSpcPin(const IfxSent_Spc_Out *spcOut, IfxPort_OutputMode spcOutMode, IfxPort_PadDriver padDriver);
475
476 /** \} */
477
478 /******************************************************************************/
479 /*-------------------------Inline Function Prototypes-------------------------*/
480 /******************************************************************************/
481
482 /** \brief Returns the Frame length with pause pulse
483 * \param sent base address of the SENT register space
484 * \param channelId SENT channel number
485 */
486 IFX_INLINE uint16 IfxSent_getFrameLengthWithPausePulse(Ifx_SENT *sent, IfxSent_ChannelId channelId);
487
488 /** \brief Set the watch dog timer limit value for sent channel.
489 * \param sent base address of the SENT register space
490 * \param channelId SENT channel number
491 * \param watchDogTimerLimit Specifies the watch dog timer limit value.
492 * \return None
493 */
494 IFX_INLINE void IfxSent_setWatchDogTimerLimit(Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 watchDogTimerLimit);
495
496 /** \brief Return TRUE if SENT module is enabled
497 * \param sent base address of the SENT register space
498 * \return The status of whether clock for sent is enabled or disabled
499 */
500 IFX_INLINE boolean IfxSent_isModuleEnabled(Ifx_SENT *sent);
501
502 /** \brief Return the Interrupt Status of the SENT channel
503 * \param sent base address of the SENT register space
504 * \param channelId SENT channel number
505 * \param source enable the interrupt source of any interrupt of SENT Channel
506 * \return The Interrupt Status of SENT channel
507 */
508 IFX_INLINE boolean IfxSent_getInterruptStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId, IfxSent_InterruptSource source);
509
510 /**
511 * \param sent base address of the SENT register space
512 * \param channelId SENT channel number
513 * \param source enable the interrupt source of any interrupt of SENT Channel
514 * \return None
515 */
516 IFX_INLINE void IfxSent_clearInterruptStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId, IfxSent_InterruptSource source);
517
518 /**
519 * \param sent base address of the SENT register space
520 * \param channelId SENT channel number
521 * \return The Data content of a recieved Data Frame
522 */
523 IFX_INLINE uint32 IfxSent_readReceivedData(Ifx_SENT *sent, IfxSent_ChannelId channelId);
524
525 /** \brief Reads and returns value in RSR (Received Status Register).
526 * \param sent base address of the SENT register space
527 * \param channelId SENT channel number
528 * \return Returns 32 bit RSR
529 */
530 IFX_INLINE uint32 IfxSent_readReceivedStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId);
531
532 /** \brief Returns 4 bit CRC value in Receive Status Register
533 * \param sent base address of the SENT register space
534 * \param channelId SENT channel number
535 * \return 4 bit CRC
536 */
537 IFX_INLINE uint8 IfxSent_readReceivedCrc(Ifx_SENT *sent, IfxSent_ChannelId channelId);
538
539 /** \brief Returns 2 bit CST value in Receive Status Register
540 * \param sent base address of the SENT register space
541 * \param channelId SENT channel number
542 * \return 2 bit CST
543 */
544 IFX_INLINE uint8 IfxSent_readReceivedChannelStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId);
545
546 /** \brief Returns 4 bit SCN value in Receive Status Register
547 * \param sent base address of the SENT register space
548 * \param channelId SENT channel number
549 * \return 4 bit SCN
550 */
551 IFX_INLINE uint8 IfxSent_readReceivedStatusAndCommunicationNibble(Ifx_SENT *sent, IfxSent_ChannelId channelId);
552
553 /** \brief Returns 32 bit Received Time Stamp Value
554 * \param sent base address of the SENT register space
555 * \param channelId SENT channel number
556 * \return 32 bit Time Stamp
557 */
558 IFX_INLINE uint32 IfxSent_readReceivedTimeStamp(Ifx_SENT *sent, IfxSent_ChannelId channelId);
559
560 /** \brief Returns 6 bit PLEN value in SCR Register
561 * \param sent base address of the SENT register space
562 * \param channelId SENT channel number
563 * \return 6 bit PLEN
564 */
565 IFX_INLINE uint8 IfxSent_readSpcPulseLength(Ifx_SENT *sent, IfxSent_ChannelId channelId);
566
567 /** \brief Returns 6 bit Delay length value in SCR Register
568 * \param sent base address of the SENT register space
569 * \param channelId SENT channel number
570 * \return 6 bit DEL
571 */
572 IFX_INLINE uint8 IfxSent_readSpcDelayLength(Ifx_SENT *sent, IfxSent_ChannelId channelId);
573
574 /******************************************************************************/
575 /*-------------------------Global Function Prototypes-------------------------*/
576 /******************************************************************************/
577
578 /** \brief Returns the current unit time (f_tick) of the given channel
579 * \param sent base address of the SENT register space
580 * \param channelId SENT channel number
581 * \return The current unit time in seconds
582 */
583 IFX_EXTERN float32 IfxSent_getChannelUnitTime(Ifx_SENT *sent, IfxSent_ChannelId channelId);
584
585 /******************************************************************************/
586 /*---------------------Inline Function Implementations------------------------*/
587 /******************************************************************************/
588
589 IFX_INLINE void IfxSent_disableChannel(Ifx_SENT *sent, IfxSent_ChannelId channelId)
590 {
591 sent->CH[channelId].RCR.B.CEN = 0;
592 }
593
594
595 IFX_INLINE void IfxSent_disableModule(Ifx_SENT *sent)
596 {
597 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
598 IfxScuWdt_clearCpuEndinit(passwd);
599 sent->CLC.B.DISR = 1;
600 IfxScuWdt_setCpuEndinit(passwd);
601 }
602
603
604 IFX_INLINE void IfxSent_enableChannel(Ifx_SENT *sent, IfxSent_ChannelId channelId)
605 {
606 sent->CH[channelId].RCR.B.CEN = 1;
607 }
608
609
610 IFX_INLINE void IfxSent_enableModule(Ifx_SENT *sent)
611 {
612 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
613 IfxScuWdt_clearCpuEndinit(passwd);
614 sent->CLC.B.DISR = 0;
615 IfxScuWdt_setCpuEndinit(passwd);
616
617 if (sent->CLC.U)
618 {}
619 }
620
621
622 IFX_INLINE Ifx_SENT_CH_INTSTAT IfxSent_getAndClearInterruptStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId)
623 {
624 Ifx_SENT_CH_INTSTAT interruptFlags;
625 interruptFlags.U = sent->CH[channelId].INTSTAT.U;
626 sent->CH[channelId].INTCLR.U = interruptFlags.U;
627 return interruptFlags;
628 }
629
630
631 IFX_INLINE Ifx_SENT_CH_INTSTAT IfxSent_getChannelInterruptStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId)
632 {
633 Ifx_SENT_CH_INTSTAT interruptFlags;
634 interruptFlags.U = sent->CH[channelId].INTSTAT.U;
635 return interruptFlags;
636 }
637
638
639 IFX_INLINE volatile Ifx_SRC_SRCR *IfxSent_getChannelSrc(IfxSent_ChannelId channelId)
640 {
641 Ifx_SENT_CH_INP tempINP;
642 tempINP.U = MODULE_SENT.CH[channelId].INP.U;
643 return &MODULE_SRC.SENT.SENT[tempINP.B.RSI].SR;
644 }
645
646
647 IFX_INLINE uint16 IfxSent_getFrameLengthWithPausePulse(Ifx_SENT *sent, IfxSent_ChannelId channelId)
648 {
649 uint16 frameLength;
650 frameLength = sent->CH[channelId].RSR.B.FRLEN;
651 return frameLength;
652 }
653
654
655 IFX_INLINE void IfxSent_initSentPin(const IfxSent_Sent_In *sentIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
656 {
657 if (sentIn->pin.port != NULL_PTR)
658 {
659 IfxPort_setPinModeInput(sentIn->pin.port, sentIn->pin.pinIndex, inputMode);
660 IfxPort_setPinPadDriver(sentIn->pin.port, sentIn->pin.pinIndex, padDriver);
661 IfxSent_setAltiInput(sentIn->module, sentIn->channelId, (IfxSent_AlternateInput)sentIn->select);
662 }
663 }
664
665
666 IFX_INLINE void IfxSent_initSpcPin(const IfxSent_Spc_Out *spcOut, IfxPort_OutputMode spcOutMode, IfxPort_PadDriver padDriver)
667 {
668 if (spcOut->pin.port != NULL_PTR)
669 {
670 IfxPort_setPinModeOutput(spcOut->pin.port, spcOut->pin.pinIndex, spcOutMode, spcOut->select);
671 IfxPort_setPinPadDriver(spcOut->pin.port, spcOut->pin.pinIndex, padDriver);
672 }
673 }
674
675
676 IFX_INLINE boolean IfxSent_isModuleSuspended(Ifx_SENT *sent)
677 {
678 Ifx_SENT_OCS ocs;
679
680 // read the status
681 ocs.U = sent->OCS.U;
682
683 // return the status
684 return ocs.B.SUSSTA;
685 }
686
687
688 IFX_INLINE void IfxSent_setAltiInput(Ifx_SENT *sent, IfxSent_ChannelId channelId, IfxSent_AlternateInput alternateInput)
689 {
690 sent->CH[channelId].IOCR.B.ALTI = alternateInput;
691 }
692
693
694 IFX_INLINE void IfxSent_setChannelFractionalDivider(Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 divider)
695 {
696 sent->CH[channelId].CFDR.B.DIV = divider;
697 }
698
699
700 IFX_INLINE void IfxSent_setChannelPreDivider(Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 preDivider)
701 {
702 sent->CH[channelId].CPDR.B.PDIV = preDivider;
703 }
704
705
706 IFX_INLINE void IfxSent_setSleepMode(Ifx_SENT *sent, IfxSent_SleepMode mode)
707 {
708 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
709 IfxScuWdt_clearCpuEndinit(passwd);
710 sent->CLC.B.EDIS = mode;
711 IfxScuWdt_setCpuEndinit(passwd);
712 }
713
714
715 IFX_INLINE void IfxSent_setSuspendMode(Ifx_SENT *sent, IfxSent_SuspendMode mode)
716 {
717 Ifx_SENT_OCS ocs;
718
719 // remove protection and configure the suspend mode.
720 ocs.B.SUS_P = 1;
721 ocs.B.SUS = mode;
722 sent->OCS.U = ocs.U;
723 }
724
725
726 IFX_INLINE void IfxSent_setTimeStampPredivider(Ifx_SENT *sent, uint32 timeStampPreDivider)
727 {
728 sent->TPD.B.TDIV = timeStampPreDivider;
729 }
730
731
732 IFX_INLINE void IfxSent_setWatchDogTimerLimit(Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 watchDogTimerLimit)
733 {
734 sent->CH[channelId].WDT.B.WDL = watchDogTimerLimit;
735 }
736
737
738 IFX_INLINE boolean IfxSent_isModuleEnabled(Ifx_SENT *sent)
739 {
740 return sent->CLC.B.DISS == 0;
741 }
742
743
744 IFX_INLINE boolean IfxSent_getInterruptStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId, IfxSent_InterruptSource source)
745 {
746 return (sent->CH[channelId].INTSTAT.U >> source) == 1;
747 }
748
749
750 IFX_INLINE void IfxSent_clearInterruptStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId, IfxSent_InterruptSource source)
751 {
752 sent->CH[channelId].INTCLR.U = (1 << source);
753 }
754
755
756 IFX_INLINE uint32 IfxSent_readReceivedData(Ifx_SENT *sent, IfxSent_ChannelId channelId)
757 {
758 return sent->RDR[channelId].U;
759 }
760
761
762 IFX_INLINE uint32 IfxSent_readReceivedStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId)
763 {
764 return sent->CH[channelId].RSR.U;
765 }
766
767
768 IFX_INLINE uint8 IfxSent_readReceivedCrc(Ifx_SENT *sent, IfxSent_ChannelId channelId)
769 {
770 return sent->CH[channelId].RSR.B.CRC;
771 }
772
773
774 IFX_INLINE uint8 IfxSent_readReceivedChannelStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId)
775 {
776 return sent->CH[channelId].RSR.B.CST;
777 }
778
779
780 IFX_INLINE uint8 IfxSent_readReceivedStatusAndCommunicationNibble(Ifx_SENT *sent, IfxSent_ChannelId channelId)
781 {
782 return sent->CH[channelId].RSR.B.SCN;
783 }
784
785
786 IFX_INLINE uint32 IfxSent_readReceivedTimeStamp(Ifx_SENT *sent, IfxSent_ChannelId channelId)
787 {
788 return sent->RTS[channelId].U;
789 }
790
791
792 IFX_INLINE uint8 IfxSent_readSpcPulseLength(Ifx_SENT *sent, IfxSent_ChannelId channelId)
793 {
794 return sent->CH[channelId].SCR.B.PLEN;
795 }
796
797
798 IFX_INLINE uint8 IfxSent_readSpcDelayLength(Ifx_SENT *sent, IfxSent_ChannelId channelId)
799 {
800 return sent->CH[channelId].SCR.B.DEL;
801 }
802
803
804 #endif /* IFXSENT_H */
IfxSent_FrameCheckMode
IfxSent_FrameCheckMode
SENT.CH[channelId].RCR.CFC, Specifies received frame check mode.
Definition: IfxSent.h:176
IfxSent_FrameCheckMode_pastSyncPulse
Specifies frame check mode against past sync pulse.
Definition: IfxSent.h:178
IfxSent_ExternalTrigger_5
Specifies the external trigger line 5.
Definition: IfxSent.h:161
IfxSent_DigitalGlitchesLength_10
Specifies 10 port input samples.
Definition: IfxSent.h:136
IfxSent_getChannelSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxSent_getChannelSrc(IfxSent_ChannelId channelId)
gets the source for channel interrupt handler
Definition: IfxSent.h:639
IfxSent_disableModule
IFX_INLINE void IfxSent_disableModule(Ifx_SENT *sent)
Disable the SENT module.
Definition: IfxSent.h:595
IfxSent_InterruptSource_fdi
Enable Interrupt Request FDI.
Definition: IfxSent.h:269
IfxSent_InterruptNodePointer_trigo9
Specifies interrupt requested node TRIGO 9.
Definition: IfxSent.h:195
IfxSent_SuspendMode_soft
Soft Suspend.
Definition: IfxSent.h:236
IfxSent_getChannelUnitTime
IFX_EXTERN float32 IfxSent_getChannelUnitTime(Ifx_SENT *sent, IfxSent_ChannelId channelId)
Returns the current unit time (f_tick) of the given channel.
Definition: IfxSent.c:55
IfxSent_ExternalTrigger_8
Specifies the external trigger line 8.
Definition: IfxSent.h:164
IfxSent_ExternalTrigger_15
Specifies the external trigger line 15.
Definition: IfxSent.h:171
IfxSent_TriggerSource_off
Specifies no pulse generation.
Definition: IfxSent.h:251
IfxSent_InterruptSource_nvi
Enable Interrupt Request NVI.
Definition: IfxSent.h:271
IfxSent_Spc_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxSent_PinMap.h:70
IfxSent_AlternateInput
IfxSent_AlternateInput
SENT.CH[channelId].IOCR.ALTI , Specifies alternate input for channel.
Definition: IfxSent.h:87
IfxSent_ExternalTrigger_3
Specifies the external trigger line 3.
Definition: IfxSent.h:159
IfxSent_resetModule
IFX_EXTERN void IfxSent_resetModule(Ifx_SENT *sent)
Resets the SENT module.
Definition: IfxSent.c:138
IfxSent_TriggerSource_immediate
Specifies immediate pulse generation.
Definition: IfxSent.h:252
IfxSent_Sent_In::channelId
IfxSent_ChannelId channelId
Channel ID.
Definition: IfxSent_PinMap.h:59
IfxSent_TriggerSource_externalTrigger
Specifies pulse generation after each external trigger.
Definition: IfxSent.h:254
IfxSent_setSuspendMode
IFX_INLINE void IfxSent_setSuspendMode(Ifx_SENT *sent, IfxSent_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and...
Definition: IfxSent.h:715
IfxSent_ExternalTrigger_12
Specifies the external trigger line 12.
Definition: IfxSent.h:168
IfxSent_InterruptNodePointer
IfxSent_InterruptNodePointer
SENT.CH[channelId].INP.X(X= RSI,RDI,RBI,TDI,TBI,ERRI,SDI,WDI),Specifies interrupt requested node for ...
Definition: IfxSent.h:184
IfxSent_SleepMode
IfxSent_SleepMode
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_SENT.CLC.B.EDIS.
Definition: IfxSent.h:215
IfxSent_DigitalGlitchesLength_12
Specifies 12 port input samples.
Definition: IfxSent.h:138
IfxSent_ChannelStatus
IfxSent_ChannelStatus
SENT.CH[channelId].RSR.CST, Specifies the current channel status.
Definition: IfxSent.h:97
IfxSent_Nibble_2
Specifies receive data target nibble pointer to nibble 2.
Definition: IfxSent.h:204
IfxSent_SpcMode_sync
Specifies synchronous SPC mode.
Definition: IfxSent.h:225
IfxSent_InterruptSource_rdi
Enable Interrupt Request RDI.
Definition: IfxSent.h:264
IfxSent_InterruptSource_sdi
Enable Interrupt Request sdi.
Definition: IfxSent.h:274
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:140
IfxSent_InterruptNodePointer_trigo6
Specifies interrupt requested node TRIGO 6.
Definition: IfxSent.h:192
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxSent_readSpcDelayLength
IFX_INLINE uint8 IfxSent_readSpcDelayLength(Ifx_SENT *sent, IfxSent_ChannelId channelId)
Returns 6 bit Delay length value in SCR Register.
Definition: IfxSent.h:798
IfxSent_DigitalGlitchesLength_4
Specifies 4 port input samples.
Definition: IfxSent.h:130
IfxSent_getFrameLengthWithPausePulse
IFX_INLINE uint16 IfxSent_getFrameLengthWithPausePulse(Ifx_SENT *sent, IfxSent_ChannelId channelId)
Returns the Frame length with pause pulse.
Definition: IfxSent.h:647
float32
float float32
Definition: Platform_Types.h:170
IfxSent_enableChannel
IFX_INLINE void IfxSent_enableChannel(Ifx_SENT *sent, IfxSent_ChannelId channelId)
Enable the channel with the channel number.
Definition: IfxSent.h:604
IfxSent_InterruptSource_nni
Enable Interrupt Request NNI.
Definition: IfxSent.h:270
IfxSent_Nibble_4
Specifies receive data target nibble pointer to nibble 4.
Definition: IfxSent.h:206
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:322
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxSent_getChannelInterruptStatus
IFX_INLINE Ifx_SENT_CH_INTSTAT IfxSent_getChannelInterruptStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId)
Gets the current channel status.
Definition: IfxSent.h:631
IfxSent_Nibble_0
Specifies receive data target nibble pointer to nibble 0.
Definition: IfxSent.h:202
IfxSrc.h
SRC basic functionality.
IfxCpu_Intrinsics.h
IfxSent_InterruptNodePointer_trigo1
Specifies interrupt requested node TRIGO 1.
Definition: IfxSent.h:187
IfxSent_ExternalTrigger_2
Specifies the external trigger line 2.
Definition: IfxSent.h:158
IfxSent_ExternalTrigger_0
Specifies the external trigger line 0.
Definition: IfxSent.h:156
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxSent_Sent_In
SENT pin mapping structure.
Definition: IfxSent_PinMap.h:56
IfxSent_readSpcPulseLength
IFX_INLINE uint8 IfxSent_readSpcPulseLength(Ifx_SENT *sent, IfxSent_ChannelId channelId)
Returns 6 bit PLEN value in SCR Register.
Definition: IfxSent.h:792
IfxSent_ExtendedSerialFrameMode_extended
Specifies the extended serial frame structure.
Definition: IfxSent.h:149
IfxPort_setPinModeInput
IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode.
Definition: IfxPort.h:669
IfxSent_InterruptSource_tbi
Enable Interrupt Request TBI.
Definition: IfxSent.h:267
IfxSent_Spc_Out
SPC pin mapping structure.
Definition: IfxSent_PinMap.h:65
IfxSent_ExternalTrigger_9
Specifies the external trigger line 9.
Definition: IfxSent.h:165
IfxSent_InterruptNodePointer_trigo5
Specifies interrupt requested node TRIGO 5.
Definition: IfxSent.h:191
IfxSent_initSpcPin
IFX_INLINE void IfxSent_initSpcPin(const IfxSent_Spc_Out *spcOut, IfxPort_OutputMode spcOutMode, IfxPort_PadDriver padDriver)
Initializes a SPC output.
Definition: IfxSent.h:666
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxSent_ExternalTrigger_13
Specifies the external trigger line 13.
Definition: IfxSent.h:169
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxSent_DigitalGlitchesLength_14
Specifies 14 port input samples.
Definition: IfxSent.h:140
IfxSent_cfg.h
SENT on-chip implementation data.
IfxSent_Nibble_1
Specifies receive data target nibble pointer to nibble 1.
Definition: IfxSent.h:203
IfxSent_ConfigBit_0
Specifies received configuration bit value 0.
Definition: IfxSent.h:118
IfxSent_ChannelStatus_stop
Specifies the channel is stopped.
Definition: IfxSent.h:99
IfxSent_Sent_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxSent_PinMap.h:61
IfxSent_ExternalTrigger_1
Specifies the external trigger line 1.
Definition: IfxSent.h:157
IfxSent_readReceivedCrc
IFX_INLINE uint8 IfxSent_readReceivedCrc(Ifx_SENT *sent, IfxSent_ChannelId channelId)
Returns 4 bit CRC value in Receive Status Register.
Definition: IfxSent.h:768
IfxSent_DigitalGlitchesLength_7
Specifies 7 port input samples.
Definition: IfxSent.h:133
IfxSent_DigitalGlitchesLength_1
Specifies 1 port input samples.
Definition: IfxSent.h:127
IfxSent_DigitalGlitchesLength_15
Specifies 15 port input samples.
Definition: IfxSent.h:141
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxSent_setWatchDogTimerLimit
IFX_INLINE void IfxSent_setWatchDogTimerLimit(Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 watchDogTimerLimit)
Set the watch dog timer limit value for sent channel.
Definition: IfxSent.h:732
IfxSent_ExternalTrigger_7
Specifies the external trigger line 7.
Definition: IfxSent.h:163
IfxSent_InterruptNodePointer_trigo4
Specifies interrupt requested node TRIGO 4.
Definition: IfxSent.h:190
IfxSent_DigitalGlitchesLength_13
Specifies 13 port input samples.
Definition: IfxSent.h:139
IfxSent_ClockDividerMode_fractional
Specifies clock fractional divider mode.
Definition: IfxSent.h:111
IfxSent_InterruptSource_scri
Enable Interrupt Request scri.
Definition: IfxSent.h:275
IfxSent_InterruptSource_wsi
Enable Interrupt Request wsi.
Definition: IfxSent.h:273
IfxSent_InterruptSource_fri
Enable Interrupt Request FRI.
Definition: IfxSent.h:268
IfxSent_setChannelFractionalDivider
IFX_INLINE void IfxSent_setChannelFractionalDivider(Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 divider)
Sets the channel fractional baudrate divider.
Definition: IfxSent.h:694
IfxSent_InterruptNodePointer_trigo2
Specifies interrupt requested node TRIGO 2.
Definition: IfxSent.h:188
IfxSent_DigitalGlitchesLength_2
Specifies 2 port input samples.
Definition: IfxSent.h:128
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:249
IfxSent_clearInterruptStatus
IFX_INLINE void IfxSent_clearInterruptStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId, IfxSent_InterruptSource source)
Definition: IfxSent.h:750
IfxSent_readReceivedData
IFX_INLINE uint32 IfxSent_readReceivedData(Ifx_SENT *sent, IfxSent_ChannelId channelId)
Definition: IfxSent.h:756
IfxSent_disableChannel
IFX_INLINE void IfxSent_disableChannel(Ifx_SENT *sent, IfxSent_ChannelId channelId)
Disable the channel with the channel number.
Definition: IfxSent.h:589
IfxSent_setSleepMode
IFX_INLINE void IfxSent_setSleepMode(Ifx_SENT *sent, IfxSent_SleepMode mode)
Sets the sensitivity of the module to sleep signal.
Definition: IfxSent.h:706
IfxSent_ExternalTrigger
IfxSent_ExternalTrigger
SENT.CH[channelId].IOCR.ETS , Specifies the external trigger line.
Definition: IfxSent.h:154
IfxSent_InterruptNodePointer_trigo0
Specifies interrupt requested node TRIGO 0.
Definition: IfxSent.h:186
IfxSent_SuspendMode
IfxSent_SuspendMode
OCDS Suspend Control (OCDS.SUS)
Definition: IfxSent.h:232
IfxSent_TimeBase_nominalFrequency
Specifies selection of pulse based on nomianl frequency.
Definition: IfxSent.h:244
IfxSent_Nibble
IfxSent_Nibble
SENT.CH[channelId].VIEW.RDNPy( y=0,1,..7 ).Specifies receive data target nibble pointer.
Definition: IfxSent.h:200
IfxSent_Nibble_5
Specifies receive data target nibble pointer to nibble 5.
Definition: IfxSent.h:207
IfxSent_ExtendedSerialFrameMode
IfxSent_ExtendedSerialFrameMode
SENT.CH[channelId].RCR.ESF , Specifies the serial frame structure.
Definition: IfxSent.h:146
IfxSent_ClockDividerMode_normal
Specifies clock normal divider mode.
Definition: IfxSent.h:110
IfxSent_SuspendMode_none
No suspend.
Definition: IfxSent.h:234
IfxSent_setAltiInput
IFX_INLINE void IfxSent_setAltiInput(Ifx_SENT *sent, IfxSent_ChannelId channelId, IfxSent_AlternateInput alternateInput)
Sets the operation mode of SENT kernel.
Definition: IfxSent.h:688
IfxSent_TriggerSource_fallingEdge
Specifies pulse generation at fallingEdge.
Definition: IfxSent.h:253
IfxSent_SpcMode
IfxSent_SpcMode
Specifies the SENT SPC operational mode.
Definition: IfxSent.h:223
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:151
IfxSent_readReceivedTimeStamp
IFX_INLINE uint32 IfxSent_readReceivedTimeStamp(Ifx_SENT *sent, IfxSent_ChannelId channelId)
Returns 32 bit Received Time Stamp Value.
Definition: IfxSent.h:786
IfxSent_Sent_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxSent_PinMap.h:60
IfxSent_TimeBase_measuredFrequency
Specifies selection of pulse based on measured frequency.
Definition: IfxSent.h:243
IfxSent_ConfigBit
IfxSent_ConfigBit
SENT.CH[channelId].SDS.CON , Specifies received configuration bit value.
Definition: IfxSent.h:116
IfxSent_isModuleSuspended
IFX_INLINE boolean IfxSent_isModuleSuspended(Ifx_SENT *sent)
Returns the module&#39;s suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspende...
Definition: IfxSent.h:676
IfxSent_ChannelStatus_initialize
Specifies the channel is initialized.
Definition: IfxSent.h:100
IfxSent_InterruptSource_rsi
Enable Interrupt Request RSI.
Definition: IfxSent.h:263
IfxSent_AlternateInput_1
Specifies alternate input 1.
Definition: IfxSent.h:90
IfxSent_SpcMode_bidirectional
Specifies bidirectional transmit SPC mode.
Definition: IfxSent.h:227
IfxSent_AlternateInput_3
Specifies alternate input 3.
Definition: IfxSent.h:92
IfxSent_InterruptNodePointer_trigo8
Specifies interrupt requested node TRIGO 8.
Definition: IfxSent.h:194
IfxSent_DigitalGlitchesLength
IfxSent_DigitalGlitchesLength
SENT.CH[channelId].IOCR.DEPTH , Specifies number of port input samples.
Definition: IfxSent.h:124
IfxSent_setChannelPreDivider
IFX_INLINE void IfxSent_setChannelPreDivider(Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 preDivider)
Sets the channel baudrate pre-divider.
Definition: IfxSent.h:700
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxSent_AlternateInput_0
Specifies alternate input 0.
Definition: IfxSent.h:89
IfxSent_ChannelStatus_synchronize
Specifies the channel is synchronized.
Definition: IfxSent.h:102
IfxSent_getInterruptStatus
IFX_INLINE boolean IfxSent_getInterruptStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId, IfxSent_InterruptSource source)
Return the Interrupt Status of the SENT channel.
Definition: IfxSent.h:744
IfxSent_readReceivedStatusAndCommunicationNibble
IFX_INLINE uint8 IfxSent_readReceivedStatusAndCommunicationNibble(Ifx_SENT *sent, IfxSent_ChannelId channelId)
Returns 4 bit SCN value in Receive Status Register.
Definition: IfxSent.h:780
IfxSent_SleepMode_disable
disables sleep mode
Definition: IfxSent.h:218
IfxSent_ClockDividerMode
IfxSent_ClockDividerMode
SENT.FDR.DM , Specifies clock divider mode.
Definition: IfxSent.h:107
IfxSent_TriggerSource
IfxSent_TriggerSource
SENT.CH[channelId].SCR.TRIG, Specifies trigger source for pulse generation.
Definition: IfxSent.h:249
IfxSent_SpcMode_range
Specifies range selection SPC mode.
Definition: IfxSent.h:226
IfxSent_ClockDividerMode_off
Specifies clock divider mode off.
Definition: IfxSent.h:109
IfxSent_DigitalGlitchesLength_off
Specifies port input samples off.
Definition: IfxSent.h:126
IfxSent_InterruptNodePointer_trigo3
Specifies interrupt requested node TRIGO 3.
Definition: IfxSent.h:189
IfxSent_Nibble_7
Specifies receive data target nibble pointer to nibble 7.
Definition: IfxSent.h:209
IfxSent_ExternalTrigger_6
Specifies the external trigger line 6.
Definition: IfxSent.h:162
IfxSent_ExtendedSerialFrameMode_standard
Specifies the standard serial frame structure.
Definition: IfxSent.h:148
IfxSent_DigitalGlitchesLength_6
Specifies 6 port input samples.
Definition: IfxSent.h:132
IfxSent_DigitalGlitchesLength_5
Specifies 5 port input samples.
Definition: IfxSent.h:131
IfxSent_ChannelStatus_running
Specifies the channel is running.
Definition: IfxSent.h:101
IfxSent_ExternalTrigger_4
Specifies the external trigger line 4.
Definition: IfxSent.h:160
IfxSent_Sent_In::module
Ifx_SENT * module
Base address.
Definition: IfxSent_PinMap.h:58
IfxSent_InterruptSource_tdi
Enable Interrupt Request TDI.
Definition: IfxSent.h:266
IfxSent_InterruptNodePointer_trigo7
Specifies interrupt requested node TRIGO 7.
Definition: IfxSent.h:193
IfxScuCcu.h
SCU basic functionality.
IfxSent_DigitalGlitchesLength_8
Specifies 8 port input samples.
Definition: IfxSent.h:134
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:81
IfxSent_FrameCheckMode_futureSuncPulse
Specifies frame check mode against future sync pulse.
Definition: IfxSent.h:179
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:248
IfxSent_setTimeStampPredivider
IFX_INLINE void IfxSent_setTimeStampPredivider(Ifx_SENT *sent, uint32 timeStampPreDivider)
Set the module time stamp pre-divider.
Definition: IfxSent.h:726
IfxSent_InterruptSource_rbi
Enable Interrupt Request RBI.
Definition: IfxSent.h:265
IfxSent_DigitalGlitchesLength_9
Specifies 9 port input samples.
Definition: IfxSent.h:135
IfxSent_initializeChannelUnitTime
IFX_EXTERN void IfxSent_initializeChannelUnitTime(Ifx_SENT *sent, IfxSent_ChannelId channelId, float32 tUnit)
Initializes the desired unit time (f_tick) for the external SENT device connected to the given channe...
Definition: IfxSent.c:96
IfxSent_ExternalTrigger_10
Specifies the external trigger line 10.
Definition: IfxSent.h:166
IfxSent_initializeModuleClock
IFX_EXTERN void IfxSent_initializeModuleClock(Ifx_SENT *sent, IfxSent_ClockDividerMode dividerMode, uint16 stepValue)
Initialize and get the clock for SENT kernel.
Definition: IfxSent.c:128
IfxSent_getAndClearInterruptStatus
IFX_INLINE Ifx_SENT_CH_INTSTAT IfxSent_getAndClearInterruptStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId)
Copies the current interrupt flags into the Ifx_SENT_CH_INTSTAT structure, and clears the flags in ha...
Definition: IfxSent.h:622
IfxSent_ChannelId
IfxSent_ChannelId
Specifies the channel Id.
Definition: IfxSent_cfg.h:85
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxSent_InterruptSource_crci
Enable Interrupt Request crci.
Definition: IfxSent.h:272
IfxSent_readReceivedStatus
IFX_INLINE uint32 IfxSent_readReceivedStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId)
Reads and returns value in RSR (Received Status Register).
Definition: IfxSent.h:762
IfxSent_TimeBase
IfxSent_TimeBase
SENT.CH[channelId].SCR.BASE, Specifies selection of pulse based on time.
Definition: IfxSent.h:241
IfxSent_AlternateInput_2
Specifies alternate input 2.
Definition: IfxSent.h:91
IfxSent_ExternalTrigger_14
Specifies the external trigger line 14.
Definition: IfxSent.h:170
IfxSent_ExternalTrigger_11
Specifies the external trigger line 11.
Definition: IfxSent.h:167
IfxSent_SleepMode_enable
enables sleep mode
Definition: IfxSent.h:217
IfxSent_initSentPin
IFX_INLINE void IfxSent_initSentPin(const IfxSent_Sent_In *sentIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a SENT input.
Definition: IfxSent.h:655
IfxSent_DigitalGlitchesLength_11
Specifies 11 port input samples.
Definition: IfxSent.h:137
IfxSent_Nibble_6
Specifies receive data target nibble pointer to nibble 6.
Definition: IfxSent.h:208
IfxSent_getModuleClock
IFX_EXTERN float32 IfxSent_getModuleClock(Ifx_SENT *sent)
Returns the current module frequency in Hertz.
Definition: IfxSent.c:74
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxSent_InterruptSource
IfxSent_InterruptSource
Sent Interrupt Source.
Definition: IfxSent.h:261
IfxSent_isModuleEnabled
IFX_INLINE boolean IfxSent_isModuleEnabled(Ifx_SENT *sent)
Return TRUE if SENT module is enabled.
Definition: IfxSent.h:738
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:675
IfxSent_readReceivedChannelStatus
IFX_INLINE uint8 IfxSent_readReceivedChannelStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId)
Returns 2 bit CST value in Receive Status Register.
Definition: IfxSent.h:774
IfxSent_SuspendMode_hard
Hard Suspend.
Definition: IfxSent.h:235
IfxSent_InterruptSource_wdi
Enable Interrupt Request wdi.
Definition: IfxSent.h:276
IfxSent_PinMap.h
SENT I/O map.
IfxSent_ConfigBit_1
Specifies received configuration bit value 1.
Definition: IfxSent.h:119
IfxSent_enableModule
IFX_INLINE void IfxSent_enableModule(Ifx_SENT *sent)
Enable the SENT module.
Definition: IfxSent.h:610
IfxSent_DigitalGlitchesLength_3
Specifies 3 port input samples.
Definition: IfxSent.h:129
IfxSent_Nibble_3
Specifies receive data target nibble pointer to nibble 3.
Definition: IfxSent.h:205


iLLD_TC38A: IfxSent_PinMap.c Source File

  • _PinMap
IfxSent_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxSent_PinMap.c
3 * \brief SENT I/O map
4 * \ingroup IfxLld_Sent
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "IfxSent_PinMap.h"
44
45 IfxSent_Sent_In IfxSent_SENT0A_P40_0_IN = {&MODULE_SENT, IfxSent_ChannelId_0, {&MODULE_P40, 0}, Ifx_RxSel_a};
46 IfxSent_Sent_In IfxSent_SENT0B_P00_1_IN = {&MODULE_SENT, IfxSent_ChannelId_0, {&MODULE_P00, 1}, Ifx_RxSel_b};
47 IfxSent_Sent_In IfxSent_SENT0C_P02_8_IN = {&MODULE_SENT, IfxSent_ChannelId_0, {&MODULE_P02, 8}, Ifx_RxSel_c};
48 IfxSent_Sent_In IfxSent_SENT10A_P40_10_IN = {&MODULE_SENT, IfxSent_ChannelId_10, {&MODULE_P40,10}, Ifx_RxSel_a};
49 IfxSent_Sent_In IfxSent_SENT10B_P00_11_IN = {&MODULE_SENT, IfxSent_ChannelId_10, {&MODULE_P00,11}, Ifx_RxSel_b};
50 IfxSent_Sent_In IfxSent_SENT10C_P32_5_IN = {&MODULE_SENT, IfxSent_ChannelId_10, {&MODULE_P32, 5}, Ifx_RxSel_c};
51 IfxSent_Sent_In IfxSent_SENT10D_P15_2_IN = {&MODULE_SENT, IfxSent_ChannelId_10, {&MODULE_P15, 2}, Ifx_RxSel_d};
52 IfxSent_Sent_In IfxSent_SENT11A_P40_11_IN = {&MODULE_SENT, IfxSent_ChannelId_11, {&MODULE_P40,11}, Ifx_RxSel_a};
53 IfxSent_Sent_In IfxSent_SENT11B_P00_12_IN = {&MODULE_SENT, IfxSent_ChannelId_11, {&MODULE_P00,12}, Ifx_RxSel_b};
54 IfxSent_Sent_In IfxSent_SENT11C_P32_6_IN = {&MODULE_SENT, IfxSent_ChannelId_11, {&MODULE_P32, 6}, Ifx_RxSel_c};
55 IfxSent_Sent_In IfxSent_SENT11D_P15_4_IN = {&MODULE_SENT, IfxSent_ChannelId_11, {&MODULE_P15, 4}, Ifx_RxSel_d};
56 IfxSent_Sent_In IfxSent_SENT12A_P40_12_IN = {&MODULE_SENT, IfxSent_ChannelId_12, {&MODULE_P40,12}, Ifx_RxSel_a};
57 IfxSent_Sent_In IfxSent_SENT12B_P02_4_IN = {&MODULE_SENT, IfxSent_ChannelId_12, {&MODULE_P02, 4}, Ifx_RxSel_b};
58 IfxSent_Sent_In IfxSent_SENT12C_P32_7_IN = {&MODULE_SENT, IfxSent_ChannelId_12, {&MODULE_P32, 7}, Ifx_RxSel_c};
59 IfxSent_Sent_In IfxSent_SENT13A_P40_13_IN = {&MODULE_SENT, IfxSent_ChannelId_13, {&MODULE_P40,13}, Ifx_RxSel_a};
60 IfxSent_Sent_In IfxSent_SENT13B_P02_3_IN = {&MODULE_SENT, IfxSent_ChannelId_13, {&MODULE_P02, 3}, Ifx_RxSel_b};
61 IfxSent_Sent_In IfxSent_SENT13C_P33_0_IN = {&MODULE_SENT, IfxSent_ChannelId_13, {&MODULE_P33, 0}, Ifx_RxSel_c};
62 IfxSent_Sent_In IfxSent_SENT14A_P40_14_IN = {&MODULE_SENT, IfxSent_ChannelId_14, {&MODULE_P40,14}, Ifx_RxSel_a};
63 IfxSent_Sent_In IfxSent_SENT14B_P02_2_IN = {&MODULE_SENT, IfxSent_ChannelId_14, {&MODULE_P02, 2}, Ifx_RxSel_b};
64 IfxSent_Sent_In IfxSent_SENT14C_P33_7_IN = {&MODULE_SENT, IfxSent_ChannelId_14, {&MODULE_P33, 7}, Ifx_RxSel_c};
65 IfxSent_Sent_In IfxSent_SENT15A_P40_15_IN = {&MODULE_SENT, IfxSent_ChannelId_15, {&MODULE_P40,15}, Ifx_RxSel_a};
66 IfxSent_Sent_In IfxSent_SENT15B_P01_1_IN = {&MODULE_SENT, IfxSent_ChannelId_15, {&MODULE_P01, 1}, Ifx_RxSel_b};
67 IfxSent_Sent_In IfxSent_SENT15C_P10_9_IN = {&MODULE_SENT, IfxSent_ChannelId_15, {&MODULE_P10, 9}, Ifx_RxSel_c};
68 IfxSent_Sent_In IfxSent_SENT16A_P41_0_IN = {&MODULE_SENT, IfxSent_ChannelId_16, {&MODULE_P41, 0}, Ifx_RxSel_a};
69 IfxSent_Sent_In IfxSent_SENT16B_P01_9_IN = {&MODULE_SENT, IfxSent_ChannelId_16, {&MODULE_P01, 9}, Ifx_RxSel_b};
70 IfxSent_Sent_In IfxSent_SENT16C_P10_10_IN = {&MODULE_SENT, IfxSent_ChannelId_16, {&MODULE_P10,10}, Ifx_RxSel_c};
71 IfxSent_Sent_In IfxSent_SENT17A_P41_1_IN = {&MODULE_SENT, IfxSent_ChannelId_17, {&MODULE_P41, 1}, Ifx_RxSel_a};
72 IfxSent_Sent_In IfxSent_SENT17B_P01_8_IN = {&MODULE_SENT, IfxSent_ChannelId_17, {&MODULE_P01, 8}, Ifx_RxSel_b};
73 IfxSent_Sent_In IfxSent_SENT17C_P10_14_IN = {&MODULE_SENT, IfxSent_ChannelId_17, {&MODULE_P10,14}, Ifx_RxSel_c};
74 IfxSent_Sent_In IfxSent_SENT17D_P14_0_IN = {&MODULE_SENT, IfxSent_ChannelId_17, {&MODULE_P14, 0}, Ifx_RxSel_d};
75 IfxSent_Sent_In IfxSent_SENT18A_P41_2_IN = {&MODULE_SENT, IfxSent_ChannelId_18, {&MODULE_P41, 2}, Ifx_RxSel_a};
76 IfxSent_Sent_In IfxSent_SENT18B_P01_10_IN = {&MODULE_SENT, IfxSent_ChannelId_18, {&MODULE_P01,10}, Ifx_RxSel_b};
77 IfxSent_Sent_In IfxSent_SENT18C_P10_13_IN = {&MODULE_SENT, IfxSent_ChannelId_18, {&MODULE_P10,13}, Ifx_RxSel_c};
78 IfxSent_Sent_In IfxSent_SENT18D_P14_1_IN = {&MODULE_SENT, IfxSent_ChannelId_18, {&MODULE_P14, 1}, Ifx_RxSel_d};
79 IfxSent_Sent_In IfxSent_SENT19A_P41_3_IN = {&MODULE_SENT, IfxSent_ChannelId_19, {&MODULE_P41, 3}, Ifx_RxSel_a};
80 IfxSent_Sent_In IfxSent_SENT19B_P01_11_IN = {&MODULE_SENT, IfxSent_ChannelId_19, {&MODULE_P01,11}, Ifx_RxSel_b};
81 IfxSent_Sent_In IfxSent_SENT19C_P10_11_IN = {&MODULE_SENT, IfxSent_ChannelId_19, {&MODULE_P10,11}, Ifx_RxSel_c};
82 IfxSent_Sent_In IfxSent_SENT1A_P40_1_IN = {&MODULE_SENT, IfxSent_ChannelId_1, {&MODULE_P40, 1}, Ifx_RxSel_a};
83 IfxSent_Sent_In IfxSent_SENT1B_P00_2_IN = {&MODULE_SENT, IfxSent_ChannelId_1, {&MODULE_P00, 2}, Ifx_RxSel_b};
84 IfxSent_Sent_In IfxSent_SENT1C_P02_7_IN = {&MODULE_SENT, IfxSent_ChannelId_1, {&MODULE_P02, 7}, Ifx_RxSel_c};
85 IfxSent_Sent_In IfxSent_SENT20A_P41_4_IN = {&MODULE_SENT, IfxSent_ChannelId_20, {&MODULE_P41, 4}, Ifx_RxSel_a};
86 IfxSent_Sent_In IfxSent_SENT20B_P02_9_IN = {&MODULE_SENT, IfxSent_ChannelId_20, {&MODULE_P02, 9}, Ifx_RxSel_b};
87 IfxSent_Sent_In IfxSent_SENT20C_P31_8_IN = {&MODULE_SENT, IfxSent_ChannelId_20, {&MODULE_P31, 8}, Ifx_RxSel_c};
88 IfxSent_Sent_In IfxSent_SENT21A_P41_5_IN = {&MODULE_SENT, IfxSent_ChannelId_21, {&MODULE_P41, 5}, Ifx_RxSel_a};
89 IfxSent_Sent_In IfxSent_SENT21B_P02_10_IN = {&MODULE_SENT, IfxSent_ChannelId_21, {&MODULE_P02,10}, Ifx_RxSel_b};
90 IfxSent_Sent_In IfxSent_SENT21C_P31_9_IN = {&MODULE_SENT, IfxSent_ChannelId_21, {&MODULE_P31, 9}, Ifx_RxSel_c};
91 IfxSent_Sent_In IfxSent_SENT22A_P41_6_IN = {&MODULE_SENT, IfxSent_ChannelId_22, {&MODULE_P41, 6}, Ifx_RxSel_a};
92 IfxSent_Sent_In IfxSent_SENT22B_P02_11_IN = {&MODULE_SENT, IfxSent_ChannelId_22, {&MODULE_P02,11}, Ifx_RxSel_b};
93 IfxSent_Sent_In IfxSent_SENT22C_P31_10_IN = {&MODULE_SENT, IfxSent_ChannelId_22, {&MODULE_P31,10}, Ifx_RxSel_c};
94 IfxSent_Sent_In IfxSent_SENT23A_P41_7_IN = {&MODULE_SENT, IfxSent_ChannelId_23, {&MODULE_P41, 7}, Ifx_RxSel_a};
95 IfxSent_Sent_In IfxSent_SENT23B_P02_12_IN = {&MODULE_SENT, IfxSent_ChannelId_23, {&MODULE_P02,12}, Ifx_RxSel_b};
96 IfxSent_Sent_In IfxSent_SENT23C_P31_11_IN = {&MODULE_SENT, IfxSent_ChannelId_23, {&MODULE_P31,11}, Ifx_RxSel_c};
97 IfxSent_Sent_In IfxSent_SENT24A_P41_8_IN = {&MODULE_SENT, IfxSent_ChannelId_24, {&MODULE_P41, 8}, Ifx_RxSel_a};
98 IfxSent_Sent_In IfxSent_SENT24B_P02_13_IN = {&MODULE_SENT, IfxSent_ChannelId_24, {&MODULE_P02,13}, Ifx_RxSel_b};
99 IfxSent_Sent_In IfxSent_SENT24C_P31_12_IN = {&MODULE_SENT, IfxSent_ChannelId_24, {&MODULE_P31,12}, Ifx_RxSel_c};
100 IfxSent_Sent_In IfxSent_SENT2A_P40_2_IN = {&MODULE_SENT, IfxSent_ChannelId_2, {&MODULE_P40, 2}, Ifx_RxSel_a};
101 IfxSent_Sent_In IfxSent_SENT2B_P00_3_IN = {&MODULE_SENT, IfxSent_ChannelId_2, {&MODULE_P00, 3}, Ifx_RxSel_b};
102 IfxSent_Sent_In IfxSent_SENT2C_P02_6_IN = {&MODULE_SENT, IfxSent_ChannelId_2, {&MODULE_P02, 6}, Ifx_RxSel_c};
103 IfxSent_Sent_In IfxSent_SENT3A_P40_3_IN = {&MODULE_SENT, IfxSent_ChannelId_3, {&MODULE_P40, 3}, Ifx_RxSel_a};
104 IfxSent_Sent_In IfxSent_SENT3B_P00_4_IN = {&MODULE_SENT, IfxSent_ChannelId_3, {&MODULE_P00, 4}, Ifx_RxSel_b};
105 IfxSent_Sent_In IfxSent_SENT3C_P02_5_IN = {&MODULE_SENT, IfxSent_ChannelId_3, {&MODULE_P02, 5}, Ifx_RxSel_c};
106 IfxSent_Sent_In IfxSent_SENT4A_P40_4_IN = {&MODULE_SENT, IfxSent_ChannelId_4, {&MODULE_P40, 4}, Ifx_RxSel_a};
107 IfxSent_Sent_In IfxSent_SENT4B_P00_5_IN = {&MODULE_SENT, IfxSent_ChannelId_4, {&MODULE_P00, 5}, Ifx_RxSel_b};
108 IfxSent_Sent_In IfxSent_SENT4C_P33_6_IN = {&MODULE_SENT, IfxSent_ChannelId_4, {&MODULE_P33, 6}, Ifx_RxSel_c};
109 IfxSent_Sent_In IfxSent_SENT5A_P40_5_IN = {&MODULE_SENT, IfxSent_ChannelId_5, {&MODULE_P40, 5}, Ifx_RxSel_a};
110 IfxSent_Sent_In IfxSent_SENT5B_P00_6_IN = {&MODULE_SENT, IfxSent_ChannelId_5, {&MODULE_P00, 6}, Ifx_RxSel_b};
111 IfxSent_Sent_In IfxSent_SENT5C_P33_5_IN = {&MODULE_SENT, IfxSent_ChannelId_5, {&MODULE_P33, 5}, Ifx_RxSel_c};
112 IfxSent_Sent_In IfxSent_SENT6A_P40_6_IN = {&MODULE_SENT, IfxSent_ChannelId_6, {&MODULE_P40, 6}, Ifx_RxSel_a};
113 IfxSent_Sent_In IfxSent_SENT6B_P00_7_IN = {&MODULE_SENT, IfxSent_ChannelId_6, {&MODULE_P00, 7}, Ifx_RxSel_b};
114 IfxSent_Sent_In IfxSent_SENT6C_P33_4_IN = {&MODULE_SENT, IfxSent_ChannelId_6, {&MODULE_P33, 4}, Ifx_RxSel_c};
115 IfxSent_Sent_In IfxSent_SENT7A_P40_7_IN = {&MODULE_SENT, IfxSent_ChannelId_7, {&MODULE_P40, 7}, Ifx_RxSel_a};
116 IfxSent_Sent_In IfxSent_SENT7B_P00_8_IN = {&MODULE_SENT, IfxSent_ChannelId_7, {&MODULE_P00, 8}, Ifx_RxSel_b};
117 IfxSent_Sent_In IfxSent_SENT7C_P33_3_IN = {&MODULE_SENT, IfxSent_ChannelId_7, {&MODULE_P33, 3}, Ifx_RxSel_c};
118 IfxSent_Sent_In IfxSent_SENT8A_P40_8_IN = {&MODULE_SENT, IfxSent_ChannelId_8, {&MODULE_P40, 8}, Ifx_RxSel_a};
119 IfxSent_Sent_In IfxSent_SENT8B_P00_9_IN = {&MODULE_SENT, IfxSent_ChannelId_8, {&MODULE_P00, 9}, Ifx_RxSel_b};
120 IfxSent_Sent_In IfxSent_SENT8C_P33_2_IN = {&MODULE_SENT, IfxSent_ChannelId_8, {&MODULE_P33, 2}, Ifx_RxSel_c};
121 IfxSent_Sent_In IfxSent_SENT9A_P40_9_IN = {&MODULE_SENT, IfxSent_ChannelId_9, {&MODULE_P40, 9}, Ifx_RxSel_a};
122 IfxSent_Sent_In IfxSent_SENT9B_P00_10_IN = {&MODULE_SENT, IfxSent_ChannelId_9, {&MODULE_P00,10}, Ifx_RxSel_b};
123 IfxSent_Sent_In IfxSent_SENT9C_P33_1_IN = {&MODULE_SENT, IfxSent_ChannelId_9, {&MODULE_P33, 1}, Ifx_RxSel_c};
124 IfxSent_Spc_Out IfxSent_SPC0_P00_1_OUT = {&MODULE_SENT, IfxSent_ChannelId_0, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt6};
125 IfxSent_Spc_Out IfxSent_SPC1_P02_7_OUT = {&MODULE_SENT, IfxSent_ChannelId_1, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt6};
126 IfxSent_Spc_Out IfxSent_SPC2_P00_3_OUT = {&MODULE_SENT, IfxSent_ChannelId_2, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt6};
127 IfxSent_Spc_Out IfxSent_SPC3_P00_4_OUT = {&MODULE_SENT, IfxSent_ChannelId_3, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt6};
128 IfxSent_Spc_Out IfxSent_SPC4_P00_5_OUT = {&MODULE_SENT, IfxSent_ChannelId_4, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt6};
129 IfxSent_Spc_Out IfxSent_SPC5_P00_6_OUT = {&MODULE_SENT, IfxSent_ChannelId_5, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt6};
130 IfxSent_Spc_Out IfxSent_SPC6_P00_7_OUT = {&MODULE_SENT, IfxSent_ChannelId_6, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt6};
131 IfxSent_Spc_Out IfxSent_SPC7_P00_8_OUT = {&MODULE_SENT, IfxSent_ChannelId_7, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt6};
132 IfxSent_Spc_Out IfxSent_SPC8_P00_9_OUT = {&MODULE_SENT, IfxSent_ChannelId_8, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt6};
133 IfxSent_Spc_Out IfxSent_SPC9_P00_10_OUT = {&MODULE_SENT, IfxSent_ChannelId_9, {&MODULE_P00,10}, IfxPort_OutputIdx_alt6};
134
135
136 const IfxSent_Sent_In *IfxSent_Sent_In_pinTable[IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SENT_IN_NUM_ITEMS] = {
137 {
138 {
139 &IfxSent_SENT0A_P40_0_IN,
140 &IfxSent_SENT0B_P00_1_IN,
141 &IfxSent_SENT0C_P02_8_IN,
142 NULL_PTR
143 },
144 {
145 &IfxSent_SENT1A_P40_1_IN,
146 &IfxSent_SENT1B_P00_2_IN,
147 &IfxSent_SENT1C_P02_7_IN,
148 NULL_PTR
149 },
150 {
151 &IfxSent_SENT2A_P40_2_IN,
152 &IfxSent_SENT2B_P00_3_IN,
153 &IfxSent_SENT2C_P02_6_IN,
154 NULL_PTR
155 },
156 {
157 &IfxSent_SENT3A_P40_3_IN,
158 &IfxSent_SENT3B_P00_4_IN,
159 &IfxSent_SENT3C_P02_5_IN,
160 NULL_PTR
161 },
162 {
163 &IfxSent_SENT4A_P40_4_IN,
164 &IfxSent_SENT4B_P00_5_IN,
165 &IfxSent_SENT4C_P33_6_IN,
166 NULL_PTR
167 },
168 {
169 &IfxSent_SENT5A_P40_5_IN,
170 &IfxSent_SENT5B_P00_6_IN,
171 &IfxSent_SENT5C_P33_5_IN,
172 NULL_PTR
173 },
174 {
175 &IfxSent_SENT6A_P40_6_IN,
176 &IfxSent_SENT6B_P00_7_IN,
177 &IfxSent_SENT6C_P33_4_IN,
178 NULL_PTR
179 },
180 {
181 &IfxSent_SENT7A_P40_7_IN,
182 &IfxSent_SENT7B_P00_8_IN,
183 &IfxSent_SENT7C_P33_3_IN,
184 NULL_PTR
185 },
186 {
187 &IfxSent_SENT8A_P40_8_IN,
188 &IfxSent_SENT8B_P00_9_IN,
189 &IfxSent_SENT8C_P33_2_IN,
190 NULL_PTR
191 },
192 {
193 &IfxSent_SENT9A_P40_9_IN,
194 &IfxSent_SENT9B_P00_10_IN,
195 &IfxSent_SENT9C_P33_1_IN,
196 NULL_PTR
197 },
198 {
199 &IfxSent_SENT10A_P40_10_IN,
200 &IfxSent_SENT10B_P00_11_IN,
201 &IfxSent_SENT10C_P32_5_IN,
202 &IfxSent_SENT10D_P15_2_IN
203 },
204 {
205 &IfxSent_SENT11A_P40_11_IN,
206 &IfxSent_SENT11B_P00_12_IN,
207 &IfxSent_SENT11C_P32_6_IN,
208 &IfxSent_SENT11D_P15_4_IN
209 },
210 {
211 &IfxSent_SENT12A_P40_12_IN,
212 &IfxSent_SENT12B_P02_4_IN,
213 &IfxSent_SENT12C_P32_7_IN,
214 NULL_PTR
215 },
216 {
217 &IfxSent_SENT13A_P40_13_IN,
218 &IfxSent_SENT13B_P02_3_IN,
219 &IfxSent_SENT13C_P33_0_IN,
220 NULL_PTR
221 },
222 {
223 &IfxSent_SENT14A_P40_14_IN,
224 &IfxSent_SENT14B_P02_2_IN,
225 &IfxSent_SENT14C_P33_7_IN,
226 NULL_PTR
227 },
228 {
229 &IfxSent_SENT15A_P40_15_IN,
230 &IfxSent_SENT15B_P01_1_IN,
231 &IfxSent_SENT15C_P10_9_IN,
232 NULL_PTR
233 },
234 {
235 &IfxSent_SENT16A_P41_0_IN,
236 &IfxSent_SENT16B_P01_9_IN,
237 &IfxSent_SENT16C_P10_10_IN,
238 NULL_PTR
239 },
240 {
241 &IfxSent_SENT17A_P41_1_IN,
242 &IfxSent_SENT17B_P01_8_IN,
243 &IfxSent_SENT17C_P10_14_IN,
244 &IfxSent_SENT17D_P14_0_IN
245 },
246 {
247 &IfxSent_SENT18A_P41_2_IN,
248 &IfxSent_SENT18B_P01_10_IN,
249 &IfxSent_SENT18C_P10_13_IN,
250 &IfxSent_SENT18D_P14_1_IN
251 },
252 {
253 &IfxSent_SENT19A_P41_3_IN,
254 &IfxSent_SENT19B_P01_11_IN,
255 &IfxSent_SENT19C_P10_11_IN,
256 NULL_PTR
257 },
258 {
259 &IfxSent_SENT20A_P41_4_IN,
260 &IfxSent_SENT20B_P02_9_IN,
261 &IfxSent_SENT20C_P31_8_IN,
262 NULL_PTR
263 },
264 {
265 &IfxSent_SENT21A_P41_5_IN,
266 &IfxSent_SENT21B_P02_10_IN,
267 &IfxSent_SENT21C_P31_9_IN,
268 NULL_PTR
269 },
270 {
271 &IfxSent_SENT22A_P41_6_IN,
272 &IfxSent_SENT22B_P02_11_IN,
273 &IfxSent_SENT22C_P31_10_IN,
274 NULL_PTR
275 },
276 {
277 &IfxSent_SENT23A_P41_7_IN,
278 &IfxSent_SENT23B_P02_12_IN,
279 &IfxSent_SENT23C_P31_11_IN,
280 NULL_PTR
281 },
282 {
283 &IfxSent_SENT24A_P41_8_IN,
284 &IfxSent_SENT24B_P02_13_IN,
285 &IfxSent_SENT24C_P31_12_IN,
286 NULL_PTR
287 }
288 }
289 };
290
291 const IfxSent_Spc_Out *IfxSent_Spc_Out_pinTable[IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS] = {
292 {
293 {
294 &IfxSent_SPC0_P00_1_OUT
295 },
296 {
297 &IfxSent_SPC1_P02_7_OUT
298 },
299 {
300 &IfxSent_SPC2_P00_3_OUT
301 },
302 {
303 &IfxSent_SPC3_P00_4_OUT
304 },
305 {
306 &IfxSent_SPC4_P00_5_OUT
307 },
308 {
309 &IfxSent_SPC5_P00_6_OUT
310 },
311 {
312 &IfxSent_SPC6_P00_7_OUT
313 },
314 {
315 &IfxSent_SPC7_P00_8_OUT
316 },
317 {
318 &IfxSent_SPC8_P00_9_OUT
319 },
320 {
321 &IfxSent_SPC9_P00_10_OUT
322 },
323 {
324 NULL_PTR
325 },
326 {
327 NULL_PTR
328 },
329 {
330 NULL_PTR
331 },
332 {
333 NULL_PTR
334 },
335 {
336 NULL_PTR
337 },
338 {
339 NULL_PTR
340 },
341 {
342 NULL_PTR
343 },
344 {
345 NULL_PTR
346 },
347 {
348 NULL_PTR
349 },
350 {
351 NULL_PTR
352 },
353 {
354 NULL_PTR
355 },
356 {
357 NULL_PTR
358 },
359 {
360 NULL_PTR
361 },
362 {
363 NULL_PTR
364 },
365 {
366 NULL_PTR
367 }
368 }
369 };
IfxSent_SENT9A_P40_9_IN
IfxSent_Sent_In IfxSent_SENT9A_P40_9_IN
Definition: IfxSent_PinMap.c:121
IfxSent_SENT12B_P02_4_IN
IfxSent_Sent_In IfxSent_SENT12B_P02_4_IN
Definition: IfxSent_PinMap.c:57
IfxSent_SPC6_P00_7_OUT
IfxSent_Spc_Out IfxSent_SPC6_P00_7_OUT
Definition: IfxSent_PinMap.c:130
IfxSent_SPC5_P00_6_OUT
IfxSent_Spc_Out IfxSent_SPC5_P00_6_OUT
Definition: IfxSent_PinMap.c:129
IfxSent_SENT0B_P00_1_IN
IfxSent_Sent_In IfxSent_SENT0B_P00_1_IN
Definition: IfxSent_PinMap.c:46
IfxSent_SPC7_P00_8_OUT
IfxSent_Spc_Out IfxSent_SPC7_P00_8_OUT
Definition: IfxSent_PinMap.c:131
IfxSent_ChannelId_0
Specifies the channel Id 0.
Definition: IfxSent_cfg.h:87
IFXSENT_PINMAP_NUM_MODULES
#define IFXSENT_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxSent_PinMap.h:164
Ifx_RxSel_d
Definition: Ifx_Types.h:132
IfxSent_SENT5A_P40_5_IN
IfxSent_Sent_In IfxSent_SENT5A_P40_5_IN
Definition: IfxSent_PinMap.c:109
IfxSent_SENT24C_P31_12_IN
IfxSent_Sent_In IfxSent_SENT24C_P31_12_IN
Definition: IfxSent_PinMap.c:99
IfxSent_SENT24A_P41_8_IN
IfxSent_Sent_In IfxSent_SENT24A_P41_8_IN
Definition: IfxSent_PinMap.c:97
IfxSent_SENT19A_P41_3_IN
IfxSent_Sent_In IfxSent_SENT19A_P41_3_IN
Definition: IfxSent_PinMap.c:79
IfxSent_SENT16C_P10_10_IN
IfxSent_Sent_In IfxSent_SENT16C_P10_10_IN
Definition: IfxSent_PinMap.c:70
IfxSent_SENT2C_P02_6_IN
IfxSent_Sent_In IfxSent_SENT2C_P02_6_IN
Definition: IfxSent_PinMap.c:102
IfxSent_ChannelId_4
Specifies the channel Id 4.
Definition: IfxSent_cfg.h:91
IfxSent_SENT20B_P02_9_IN
IfxSent_Sent_In IfxSent_SENT20B_P02_9_IN
Definition: IfxSent_PinMap.c:86
IfxSent_SENT21A_P41_5_IN
IfxSent_Sent_In IfxSent_SENT21A_P41_5_IN
Definition: IfxSent_PinMap.c:88
IfxSent_ChannelId_9
Specifies the channel Id 9.
Definition: IfxSent_cfg.h:96
IfxSent_SENT12A_P40_12_IN
IfxSent_Sent_In IfxSent_SENT12A_P40_12_IN
Definition: IfxSent_PinMap.c:56
IfxSent_SENT13A_P40_13_IN
IfxSent_Sent_In IfxSent_SENT13A_P40_13_IN
Definition: IfxSent_PinMap.c:59
IfxSent_ChannelId_12
Specifies the channel Id 12.
Definition: IfxSent_cfg.h:99
IfxSent_SENT4A_P40_4_IN
IfxSent_Sent_In IfxSent_SENT4A_P40_4_IN
Definition: IfxSent_PinMap.c:106
IfxSent_Spc_Out_pinTable
const IfxSent_Spc_Out * IfxSent_Spc_Out_pinTable[IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS]
Definition: IfxSent_PinMap.c:291
IfxSent_ChannelId_22
Specifies the Channel ID 22.
Definition: IfxSent_cfg.h:109
IfxSent_ChannelId_24
Specifies the Channel ID 24.
Definition: IfxSent_cfg.h:111
IfxSent_SENT19B_P01_11_IN
IfxSent_Sent_In IfxSent_SENT19B_P01_11_IN
Definition: IfxSent_PinMap.c:80
IfxSent_SENT16A_P41_0_IN
IfxSent_Sent_In IfxSent_SENT16A_P41_0_IN
Definition: IfxSent_PinMap.c:68
IfxSent_SENT15B_P01_1_IN
IfxSent_Sent_In IfxSent_SENT15B_P01_1_IN
Definition: IfxSent_PinMap.c:66
IfxSent_SENT13B_P02_3_IN
IfxSent_Sent_In IfxSent_SENT13B_P02_3_IN
Definition: IfxSent_PinMap.c:60
IfxSent_SENT6B_P00_7_IN
IfxSent_Sent_In IfxSent_SENT6B_P00_7_IN
Definition: IfxSent_PinMap.c:113
IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS
#define IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS
Definition: IfxSent_PinMap.h:167
Ifx_RxSel_a
Definition: Ifx_Types.h:129
IfxSent_ChannelId_5
Specifies the channel Id 5.
Definition: IfxSent_cfg.h:92
IfxSent_SENT11A_P40_11_IN
IfxSent_Sent_In IfxSent_SENT11A_P40_11_IN
Definition: IfxSent_PinMap.c:52
IfxSent_ChannelId_7
Specifies the channel Id 7.
Definition: IfxSent_cfg.h:94
IfxSent_SENT18C_P10_13_IN
IfxSent_Sent_In IfxSent_SENT18C_P10_13_IN
Definition: IfxSent_PinMap.c:77
IfxSent_ChannelId_2
Specifies the channel Id 2.
Definition: IfxSent_cfg.h:89
IfxSent_ChannelId_23
Specifies the Channel ID 23.
Definition: IfxSent_cfg.h:110
IfxSent_SENT0A_P40_0_IN
IfxSent_Sent_In IfxSent_SENT0A_P40_0_IN
Definition: IfxSent_PinMap.c:45
IfxSent_ChannelId_19
Specifies the Channel ID 19.
Definition: IfxSent_cfg.h:106
IfxSent_Sent_In_pinTable
const IfxSent_Sent_In * IfxSent_Sent_In_pinTable[IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SENT_IN_NUM_ITEMS]
Definition: IfxSent_PinMap.c:136
IfxSent_SENT20A_P41_4_IN
IfxSent_Sent_In IfxSent_SENT20A_P41_4_IN
Definition: IfxSent_PinMap.c:85
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxSent_Sent_In
SENT pin mapping structure.
Definition: IfxSent_PinMap.h:56
IfxSent_ChannelId_18
Specifies the channel ID 18.
Definition: IfxSent_cfg.h:105
Ifx_RxSel_b
Definition: Ifx_Types.h:130
IfxSent_Spc_Out
SPC pin mapping structure.
Definition: IfxSent_PinMap.h:65
IfxSent_SENT0C_P02_8_IN
IfxSent_Sent_In IfxSent_SENT0C_P02_8_IN
Definition: IfxSent_PinMap.c:47
IfxSent_SENT18A_P41_2_IN
IfxSent_Sent_In IfxSent_SENT18A_P41_2_IN
Definition: IfxSent_PinMap.c:75
IfxSent_SENT19C_P10_11_IN
IfxSent_Sent_In IfxSent_SENT19C_P10_11_IN
Definition: IfxSent_PinMap.c:81
IfxSent_SENT9C_P33_1_IN
IfxSent_Sent_In IfxSent_SENT9C_P33_1_IN
Definition: IfxSent_PinMap.c:123
IfxPort_OutputIdx_alt6
Definition: IfxPort.h:134
IfxSent_SENT1A_P40_1_IN
IfxSent_Sent_In IfxSent_SENT1A_P40_1_IN
Definition: IfxSent_PinMap.c:82
IfxSent_SENT11D_P15_4_IN
IfxSent_Sent_In IfxSent_SENT11D_P15_4_IN
Definition: IfxSent_PinMap.c:55
IfxSent_SENT7B_P00_8_IN
IfxSent_Sent_In IfxSent_SENT7B_P00_8_IN
Definition: IfxSent_PinMap.c:116
IfxSent_SPC1_P02_7_OUT
IfxSent_Spc_Out IfxSent_SPC1_P02_7_OUT
Definition: IfxSent_PinMap.c:125
IfxSent_SENT4B_P00_5_IN
IfxSent_Sent_In IfxSent_SENT4B_P00_5_IN
Definition: IfxSent_PinMap.c:107
IfxSent_ChannelId_20
Specifies the Channel ID 20.
Definition: IfxSent_cfg.h:107
IfxSent_SENT17D_P14_0_IN
IfxSent_Sent_In IfxSent_SENT17D_P14_0_IN
Definition: IfxSent_PinMap.c:74
IfxSent_SENT22A_P41_6_IN
IfxSent_Sent_In IfxSent_SENT22A_P41_6_IN
Definition: IfxSent_PinMap.c:91
IfxSent_SENT18D_P14_1_IN
IfxSent_Sent_In IfxSent_SENT18D_P14_1_IN
Definition: IfxSent_PinMap.c:78
IfxSent_SENT10C_P32_5_IN
IfxSent_Sent_In IfxSent_SENT10C_P32_5_IN
Definition: IfxSent_PinMap.c:50
IfxSent_SENT1B_P00_2_IN
IfxSent_Sent_In IfxSent_SENT1B_P00_2_IN
Definition: IfxSent_PinMap.c:83
IfxSent_SENT7A_P40_7_IN
IfxSent_Sent_In IfxSent_SENT7A_P40_7_IN
Definition: IfxSent_PinMap.c:115
Ifx_RxSel_c
Definition: Ifx_Types.h:131
IfxSent_SENT5C_P33_5_IN
IfxSent_Sent_In IfxSent_SENT5C_P33_5_IN
Definition: IfxSent_PinMap.c:111
IfxSent_ChannelId_17
Specifies the channel Id 17.
Definition: IfxSent_cfg.h:104
IfxSent_SENT10D_P15_2_IN
IfxSent_Sent_In IfxSent_SENT10D_P15_2_IN
Definition: IfxSent_PinMap.c:51
IfxSent_SENT13C_P33_0_IN
IfxSent_Sent_In IfxSent_SENT13C_P33_0_IN
Definition: IfxSent_PinMap.c:61
IfxSent_SENT15A_P40_15_IN
IfxSent_Sent_In IfxSent_SENT15A_P40_15_IN
Definition: IfxSent_PinMap.c:65
IfxSent_SPC4_P00_5_OUT
IfxSent_Spc_Out IfxSent_SPC4_P00_5_OUT
Definition: IfxSent_PinMap.c:128
IfxSent_SENT17C_P10_14_IN
IfxSent_Sent_In IfxSent_SENT17C_P10_14_IN
Definition: IfxSent_PinMap.c:73
IfxSent_SENT22B_P02_11_IN
IfxSent_Sent_In IfxSent_SENT22B_P02_11_IN
Definition: IfxSent_PinMap.c:92
IfxSent_SENT3C_P02_5_IN
IfxSent_Sent_In IfxSent_SENT3C_P02_5_IN
Definition: IfxSent_PinMap.c:105
IfxSent_ChannelId_1
Specifies the channel Id 1.
Definition: IfxSent_cfg.h:88
IfxSent_SENT22C_P31_10_IN
IfxSent_Sent_In IfxSent_SENT22C_P31_10_IN
Definition: IfxSent_PinMap.c:93
IfxSent_ChannelId_10
Specifies the channel Id 10.
Definition: IfxSent_cfg.h:97
IfxSent_SPC8_P00_9_OUT
IfxSent_Spc_Out IfxSent_SPC8_P00_9_OUT
Definition: IfxSent_PinMap.c:132
IfxSent_SENT14A_P40_14_IN
IfxSent_Sent_In IfxSent_SENT14A_P40_14_IN
Definition: IfxSent_PinMap.c:62
IfxSent_ChannelId_15
Specifies the channel Id 15.
Definition: IfxSent_cfg.h:102
IfxSent_SENT11B_P00_12_IN
IfxSent_Sent_In IfxSent_SENT11B_P00_12_IN
Definition: IfxSent_PinMap.c:53
IfxSent_SENT2A_P40_2_IN
IfxSent_Sent_In IfxSent_SENT2A_P40_2_IN
Definition: IfxSent_PinMap.c:100
IfxSent_SENT11C_P32_6_IN
IfxSent_Sent_In IfxSent_SENT11C_P32_6_IN
Definition: IfxSent_PinMap.c:54
IfxSent_SENT23C_P31_11_IN
IfxSent_Sent_In IfxSent_SENT23C_P31_11_IN
Definition: IfxSent_PinMap.c:96
IfxSent_SENT3A_P40_3_IN
IfxSent_Sent_In IfxSent_SENT3A_P40_3_IN
Definition: IfxSent_PinMap.c:103
IfxSent_SENT4C_P33_6_IN
IfxSent_Sent_In IfxSent_SENT4C_P33_6_IN
Definition: IfxSent_PinMap.c:108
IfxSent_SENT14B_P02_2_IN
IfxSent_Sent_In IfxSent_SENT14B_P02_2_IN
Definition: IfxSent_PinMap.c:63
IfxSent_SENT1C_P02_7_IN
IfxSent_Sent_In IfxSent_SENT1C_P02_7_IN
Definition: IfxSent_PinMap.c:84
IFXSENT_PINMAP_NUM_CHANNELS
#define IFXSENT_PINMAP_NUM_CHANNELS
Definition: IfxSent_PinMap.h:165
IfxSent_SENT17B_P01_8_IN
IfxSent_Sent_In IfxSent_SENT17B_P01_8_IN
Definition: IfxSent_PinMap.c:72
IfxSent_SENT14C_P33_7_IN
IfxSent_Sent_In IfxSent_SENT14C_P33_7_IN
Definition: IfxSent_PinMap.c:64
IfxSent_SENT23B_P02_12_IN
IfxSent_Sent_In IfxSent_SENT23B_P02_12_IN
Definition: IfxSent_PinMap.c:95
IfxSent_ChannelId_16
Specifies the channel Id 16.
Definition: IfxSent_cfg.h:103
IfxSent_SENT23A_P41_7_IN
IfxSent_Sent_In IfxSent_SENT23A_P41_7_IN
Definition: IfxSent_PinMap.c:94
IfxSent_ChannelId_11
Specifies the channel Id 11.
Definition: IfxSent_cfg.h:98
IfxSent_SENT5B_P00_6_IN
IfxSent_Sent_In IfxSent_SENT5B_P00_6_IN
Definition: IfxSent_PinMap.c:110
IfxSent_SPC0_P00_1_OUT
IfxSent_Spc_Out IfxSent_SPC0_P00_1_OUT
Definition: IfxSent_PinMap.c:124
IfxSent_SENT6C_P33_4_IN
IfxSent_Sent_In IfxSent_SENT6C_P33_4_IN
Definition: IfxSent_PinMap.c:114
IfxSent_SENT21C_P31_9_IN
IfxSent_Sent_In IfxSent_SENT21C_P31_9_IN
Definition: IfxSent_PinMap.c:90
IfxSent_SENT20C_P31_8_IN
IfxSent_Sent_In IfxSent_SENT20C_P31_8_IN
Definition: IfxSent_PinMap.c:87
IfxSent_SENT2B_P00_3_IN
IfxSent_Sent_In IfxSent_SENT2B_P00_3_IN
Definition: IfxSent_PinMap.c:101
IfxSent_SENT12C_P32_7_IN
IfxSent_Sent_In IfxSent_SENT12C_P32_7_IN
Definition: IfxSent_PinMap.c:58
IfxSent_SENT8C_P33_2_IN
IfxSent_Sent_In IfxSent_SENT8C_P33_2_IN
Definition: IfxSent_PinMap.c:120
IfxSent_SENT21B_P02_10_IN
IfxSent_Sent_In IfxSent_SENT21B_P02_10_IN
Definition: IfxSent_PinMap.c:89
IfxSent_SPC9_P00_10_OUT
IfxSent_Spc_Out IfxSent_SPC9_P00_10_OUT
Definition: IfxSent_PinMap.c:133
IFXSENT_PINMAP_SENT_IN_NUM_ITEMS
#define IFXSENT_PINMAP_SENT_IN_NUM_ITEMS
Definition: IfxSent_PinMap.h:166
IfxSent_SENT15C_P10_9_IN
IfxSent_Sent_In IfxSent_SENT15C_P10_9_IN
Definition: IfxSent_PinMap.c:67
IfxSent_ChannelId_6
Specifies the channel Id 6.
Definition: IfxSent_cfg.h:93
IfxSent_SENT6A_P40_6_IN
IfxSent_Sent_In IfxSent_SENT6A_P40_6_IN
Definition: IfxSent_PinMap.c:112
IfxSent_SENT16B_P01_9_IN
IfxSent_Sent_In IfxSent_SENT16B_P01_9_IN
Definition: IfxSent_PinMap.c:69
IfxSent_SPC2_P00_3_OUT
IfxSent_Spc_Out IfxSent_SPC2_P00_3_OUT
Definition: IfxSent_PinMap.c:126
IfxSent_SENT8B_P00_9_IN
IfxSent_Sent_In IfxSent_SENT8B_P00_9_IN
Definition: IfxSent_PinMap.c:119
IfxSent_SENT3B_P00_4_IN
IfxSent_Sent_In IfxSent_SENT3B_P00_4_IN
Definition: IfxSent_PinMap.c:104
IfxSent_SENT7C_P33_3_IN
IfxSent_Sent_In IfxSent_SENT7C_P33_3_IN
Definition: IfxSent_PinMap.c:117
IfxSent_ChannelId_21
Specifies the Channel ID 21.
Definition: IfxSent_cfg.h:108
IfxSent_SENT10B_P00_11_IN
IfxSent_Sent_In IfxSent_SENT10B_P00_11_IN
Definition: IfxSent_PinMap.c:49
IfxSent_ChannelId_3
Specifies the channel Id 3.
Definition: IfxSent_cfg.h:90
IfxSent_SENT17A_P41_1_IN
IfxSent_Sent_In IfxSent_SENT17A_P41_1_IN
Definition: IfxSent_PinMap.c:71
IfxSent_SENT18B_P01_10_IN
IfxSent_Sent_In IfxSent_SENT18B_P01_10_IN
Definition: IfxSent_PinMap.c:76
IfxSent_ChannelId_8
Specifies the channel Id 8.
Definition: IfxSent_cfg.h:95
IfxSent_ChannelId_13
Specifies the channel Id 13.
Definition: IfxSent_cfg.h:100
IfxSent_SENT10A_P40_10_IN
IfxSent_Sent_In IfxSent_SENT10A_P40_10_IN
Definition: IfxSent_PinMap.c:48
IfxSent_ChannelId_14
Specifies the channel Id 14.
Definition: IfxSent_cfg.h:101
IfxSent_SPC3_P00_4_OUT
IfxSent_Spc_Out IfxSent_SPC3_P00_4_OUT
Definition: IfxSent_PinMap.c:127
IfxSent_SENT9B_P00_10_IN
IfxSent_Sent_In IfxSent_SENT9B_P00_10_IN
Definition: IfxSent_PinMap.c:122
IfxSent_SENT24B_P02_13_IN
IfxSent_Sent_In IfxSent_SENT24B_P02_13_IN
Definition: IfxSent_PinMap.c:98
IfxSent_PinMap.h
SENT I/O map.
IfxSent_SENT8A_P40_8_IN
IfxSent_Sent_In IfxSent_SENT8A_P40_8_IN
Definition: IfxSent_PinMap.c:118


iLLD_TC38A: IfxSent_PinMap.h Source File

  • _PinMap
IfxSent_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxSent_PinMap.h
3 * \brief SENT I/O map
4 * \ingroup IfxLld_Sent
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Sent_pinmap SENT Pin Mapping
42 * \ingroup IfxLld_Sent
43 */
44
45 #ifndef IFXSENT_PINMAP_H
46 #define IFXSENT_PINMAP_H
47
48 #include <IfxSent_reg.h>
49 #include <_Impl/IfxSent_cfg.h>
50 #include <Port/Std/IfxPort.h>
51
52 /** \addtogroup IfxLld_Sent_pinmap
53 * \{ */
54
55 /** \brief SENT pin mapping structure */
56 typedef const struct
57 {
58 Ifx_SENT* module; /**< \brief Base address */
59 IfxSent_ChannelId channelId; /**< \brief Channel ID */
60 IfxPort_Pin pin; /**< \brief Port pin */
61 Ifx_RxSel select; /**< \brief Input multiplexer value */
62 } IfxSent_Sent_In;
63
64 /** \brief SPC pin mapping structure */
65 typedef const struct
66 {
67 Ifx_SENT* module; /**< \brief Base address */
68 IfxSent_ChannelId channelId; /**< \brief Channel ID */
69 IfxPort_Pin pin; /**< \brief Port pin */
70 IfxPort_OutputIdx select; /**< \brief Port control code */
71 } IfxSent_Spc_Out;
72
73 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0A_P40_0_IN; /**< \brief Receive input channel 0 */
74 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0B_P00_1_IN; /**< \brief Receive input channel 0 */
75 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0C_P02_8_IN; /**< \brief Receive input channel 0 */
76 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT10A_P40_10_IN; /**< \brief Receive input channel 10 */
77 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT10B_P00_11_IN; /**< \brief Receive input channel 10 */
78 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT10C_P32_5_IN; /**< \brief Receive input channel 10 */
79 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT10D_P15_2_IN; /**< \brief Receive input channel 10 */
80 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT11A_P40_11_IN; /**< \brief Receive input channel 11 */
81 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT11B_P00_12_IN; /**< \brief Receive input channel 11 */
82 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT11C_P32_6_IN; /**< \brief Receive input channel 11 */
83 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT11D_P15_4_IN; /**< \brief Receive input channel 11 */
84 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT12A_P40_12_IN; /**< \brief Receive input channel 12 */
85 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT12B_P02_4_IN; /**< \brief Receive input channel 12 */
86 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT12C_P32_7_IN; /**< \brief Receive input channel 12 */
87 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT13A_P40_13_IN; /**< \brief Receive input channel 13 */
88 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT13B_P02_3_IN; /**< \brief Receive input channel 13 */
89 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT13C_P33_0_IN; /**< \brief Receive input channel 13 */
90 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT14A_P40_14_IN; /**< \brief Receive input channel 14 */
91 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT14B_P02_2_IN; /**< \brief Receive input channel 14 */
92 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT14C_P33_7_IN; /**< \brief Receive input channel 14 */
93 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT15A_P40_15_IN; /**< \brief Receive input channel 15 */
94 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT15B_P01_1_IN; /**< \brief Receive input channel 15 */
95 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT15C_P10_9_IN; /**< \brief Receive input channel 15 */
96 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT16A_P41_0_IN; /**< \brief Receive input channel 16 */
97 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT16B_P01_9_IN; /**< \brief Receive input channel 16 */
98 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT16C_P10_10_IN; /**< \brief Receive input channel 16 */
99 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT17A_P41_1_IN; /**< \brief Receive input channel 17 */
100 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT17B_P01_8_IN; /**< \brief Receive input channel 17 */
101 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT17C_P10_14_IN; /**< \brief Receive input channel 17 */
102 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT17D_P14_0_IN; /**< \brief Receive input channel 17 */
103 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT18A_P41_2_IN; /**< \brief Receive input channel 18 */
104 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT18B_P01_10_IN; /**< \brief Receive input channel 18 */
105 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT18C_P10_13_IN; /**< \brief Receive input channel 18 */
106 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT18D_P14_1_IN; /**< \brief Receive input channel 18 */
107 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT19A_P41_3_IN; /**< \brief Receive input channel 19 */
108 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT19B_P01_11_IN; /**< \brief Receive input channel 19 */
109 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT19C_P10_11_IN; /**< \brief Receive input channel 19 */
110 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1A_P40_1_IN; /**< \brief Receive input channel 1 */
111 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1B_P00_2_IN; /**< \brief Receive input channel 1 */
112 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1C_P02_7_IN; /**< \brief Receive input channel 1 */
113 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT20A_P41_4_IN; /**< \brief Receive input channel 20 */
114 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT20B_P02_9_IN; /**< \brief Receive input channel 20 */
115 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT20C_P31_8_IN; /**< \brief Receive input channel 20 */
116 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT21A_P41_5_IN; /**< \brief Receive input channel 21 */
117 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT21B_P02_10_IN; /**< \brief Receive input channel 21 */
118 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT21C_P31_9_IN; /**< \brief Receive input channel 21 */
119 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT22A_P41_6_IN; /**< \brief Receive input channel 22 */
120 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT22B_P02_11_IN; /**< \brief Receive input channel 22 */
121 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT22C_P31_10_IN; /**< \brief Receive input channel 22 */
122 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT23A_P41_7_IN; /**< \brief Receive input channel 23 */
123 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT23B_P02_12_IN; /**< \brief Receive input channel 23 */
124 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT23C_P31_11_IN; /**< \brief Receive input channel 23 */
125 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT24A_P41_8_IN; /**< \brief Receive input channel 24 */
126 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT24B_P02_13_IN; /**< \brief Receive input channel 24 */
127 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT24C_P31_12_IN; /**< \brief Receive input channel 24 */
128 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2A_P40_2_IN; /**< \brief Receive input channel 2 */
129 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2B_P00_3_IN; /**< \brief Receive input channel 2 */
130 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2C_P02_6_IN; /**< \brief Receive input channel 2 */
131 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3A_P40_3_IN; /**< \brief Receive input channel 3 */
132 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3B_P00_4_IN; /**< \brief Receive input channel 3 */
133 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3C_P02_5_IN; /**< \brief Receive input channel 3 */
134 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4A_P40_4_IN; /**< \brief Receive input channel 4 */
135 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4B_P00_5_IN; /**< \brief Receive input channel 4 */
136 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4C_P33_6_IN; /**< \brief Receive input channel 4 */
137 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5A_P40_5_IN; /**< \brief Receive input channel 5 */
138 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5B_P00_6_IN; /**< \brief Receive input channel 5 */
139 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5C_P33_5_IN; /**< \brief Receive input channel 5 */
140 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT6A_P40_6_IN; /**< \brief Receive input channel 6 */
141 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT6B_P00_7_IN; /**< \brief Receive input channel 6 */
142 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT6C_P33_4_IN; /**< \brief Receive input channel 6 */
143 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT7A_P40_7_IN; /**< \brief Receive input channel 7 */
144 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT7B_P00_8_IN; /**< \brief Receive input channel 7 */
145 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT7C_P33_3_IN; /**< \brief Receive input channel 7 */
146 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT8A_P40_8_IN; /**< \brief Receive input channel 8 */
147 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT8B_P00_9_IN; /**< \brief Receive input channel 8 */
148 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT8C_P33_2_IN; /**< \brief Receive input channel 8 */
149 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT9A_P40_9_IN; /**< \brief Receive input channel 9 */
150 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT9B_P00_10_IN; /**< \brief Receive input channel 9 */
151 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT9C_P33_1_IN; /**< \brief Receive input channel 9 */
152 IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC0_P00_1_OUT; /**< \brief Transmit output */
153 IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC1_P02_7_OUT; /**< \brief Transmit output */
154 IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC2_P00_3_OUT; /**< \brief Transmit output */
155 IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC3_P00_4_OUT; /**< \brief Transmit output */
156 IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC4_P00_5_OUT; /**< \brief Transmit output */
157 IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC5_P00_6_OUT; /**< \brief Transmit output */
158 IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC6_P00_7_OUT; /**< \brief Transmit output */
159 IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC7_P00_8_OUT; /**< \brief Transmit output */
160 IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC8_P00_9_OUT; /**< \brief Transmit output */
161 IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC9_P00_10_OUT; /**< \brief Transmit output */
162
163 /** \brief Table dimensions */
164 #define IFXSENT_PINMAP_NUM_MODULES 1
165 #define IFXSENT_PINMAP_NUM_CHANNELS 25
166 #define IFXSENT_PINMAP_SENT_IN_NUM_ITEMS 4
167 #define IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS 1
168
169
170 /** \brief IfxSent_Sent_In table */
171 IFX_EXTERN const IfxSent_Sent_In *IfxSent_Sent_In_pinTable[IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SENT_IN_NUM_ITEMS];
172
173 /** \brief IfxSent_Spc_Out table */
174 IFX_EXTERN const IfxSent_Spc_Out *IfxSent_Spc_Out_pinTable[IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS];
175
176 /** \} */
177
178 #endif /* IFXSENT_PINMAP_H */
IfxSent_SENT10B_P00_11_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT10B_P00_11_IN
Receive input channel 10.
Definition: IfxSent_PinMap.h:77
IfxSent_SENT0C_P02_8_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0C_P02_8_IN
Receive input channel 0.
Definition: IfxSent_PinMap.h:75
IfxSent_SENT2C_P02_6_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2C_P02_6_IN
Receive input channel 2.
Definition: IfxSent_PinMap.h:130
IFXSENT_PINMAP_NUM_MODULES
#define IFXSENT_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxSent_PinMap.h:164
IfxSent_SPC8_P00_9_OUT
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC8_P00_9_OUT
Transmit output.
Definition: IfxSent_PinMap.h:160
IfxSent_SENT17D_P14_0_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT17D_P14_0_IN
Receive input channel 17.
Definition: IfxSent_PinMap.h:102
IfxSent_SENT1A_P40_1_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1A_P40_1_IN
Receive input channel 1.
Definition: IfxSent_PinMap.h:110
IfxSent_SENT8A_P40_8_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT8A_P40_8_IN
Receive input channel 8.
Definition: IfxSent_PinMap.h:146
IfxSent_SENT19C_P10_11_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT19C_P10_11_IN
Receive input channel 19.
Definition: IfxSent_PinMap.h:109
IfxSent_SENT17C_P10_14_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT17C_P10_14_IN
Receive input channel 17.
Definition: IfxSent_PinMap.h:101
IfxSent_Spc_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxSent_PinMap.h:70
IfxSent_SPC3_P00_4_OUT
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC3_P00_4_OUT
Transmit output.
Definition: IfxSent_PinMap.h:155
IfxSent_SENT8C_P33_2_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT8C_P33_2_IN
Receive input channel 8.
Definition: IfxSent_PinMap.h:148
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:126
IfxSent_SENT21B_P02_10_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT21B_P02_10_IN
Receive input channel 21.
Definition: IfxSent_PinMap.h:117
IfxSent_Sent_In::channelId
IfxSent_ChannelId channelId
Channel ID.
Definition: IfxSent_PinMap.h:59
IfxSent_SPC6_P00_7_OUT
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC6_P00_7_OUT
Transmit output.
Definition: IfxSent_PinMap.h:158
IfxSent_SENT2A_P40_2_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2A_P40_2_IN
Receive input channel 2.
Definition: IfxSent_PinMap.h:128
IfxSent_SENT11B_P00_12_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT11B_P00_12_IN
Receive input channel 11.
Definition: IfxSent_PinMap.h:81
IfxSent_SENT6A_P40_6_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT6A_P40_6_IN
Receive input channel 6.
Definition: IfxSent_PinMap.h:140
IfxSent_SENT10A_P40_10_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT10A_P40_10_IN
Receive input channel 10.
Definition: IfxSent_PinMap.h:76
IfxSent_SENT12B_P02_4_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT12B_P02_4_IN
Receive input channel 12.
Definition: IfxSent_PinMap.h:85
IfxSent_Spc_Out_pinTable
IFX_EXTERN const IfxSent_Spc_Out * IfxSent_Spc_Out_pinTable[IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS]
IfxSent_Spc_Out table.
Definition: IfxSent_PinMap.h:174
IfxSent_SENT13A_P40_13_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT13A_P40_13_IN
Receive input channel 13.
Definition: IfxSent_PinMap.h:87
IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS
#define IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS
Definition: IfxSent_PinMap.h:167
IfxSent_SENT5C_P33_5_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5C_P33_5_IN
Receive input channel 5.
Definition: IfxSent_PinMap.h:139
IfxSent_SENT11C_P32_6_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT11C_P32_6_IN
Receive input channel 11.
Definition: IfxSent_PinMap.h:82
IfxSent_SENT8B_P00_9_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT8B_P00_9_IN
Receive input channel 8.
Definition: IfxSent_PinMap.h:147
IfxSent_SENT5A_P40_5_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5A_P40_5_IN
Receive input channel 5.
Definition: IfxSent_PinMap.h:137
IfxSent_Sent_In
SENT pin mapping structure.
Definition: IfxSent_PinMap.h:56
IfxSent_SENT3C_P02_5_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3C_P02_5_IN
Receive input channel 3.
Definition: IfxSent_PinMap.h:133
IfxSent_Spc_Out
SPC pin mapping structure.
Definition: IfxSent_PinMap.h:65
IfxSent_SENT4C_P33_6_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4C_P33_6_IN
Receive input channel 4.
Definition: IfxSent_PinMap.h:136
IfxSent_SENT23B_P02_12_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT23B_P02_12_IN
Receive input channel 23.
Definition: IfxSent_PinMap.h:123
IfxSent_SENT14B_P02_2_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT14B_P02_2_IN
Receive input channel 14.
Definition: IfxSent_PinMap.h:91
IfxSent_SPC9_P00_10_OUT
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC9_P00_10_OUT
Transmit output.
Definition: IfxSent_PinMap.h:161
IfxSent_SENT21A_P41_5_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT21A_P41_5_IN
Receive input channel 21.
Definition: IfxSent_PinMap.h:116
IfxSent_SENT22A_P41_6_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT22A_P41_6_IN
Receive input channel 22.
Definition: IfxSent_PinMap.h:119
IfxSent_SENT24A_P41_8_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT24A_P41_8_IN
Receive input channel 24.
Definition: IfxSent_PinMap.h:125
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxSent_cfg.h
SENT on-chip implementation data.
IfxSent_SPC0_P00_1_OUT
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC0_P00_1_OUT
Transmit output.
Definition: IfxSent_PinMap.h:152
IfxSent_SENT3B_P00_4_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3B_P00_4_IN
Receive input channel 3.
Definition: IfxSent_PinMap.h:132
IfxSent_SENT15A_P40_15_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT15A_P40_15_IN
Receive input channel 15.
Definition: IfxSent_PinMap.h:93
IfxSent_SENT20B_P02_9_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT20B_P02_9_IN
Receive input channel 20.
Definition: IfxSent_PinMap.h:114
IfxSent_SENT22C_P31_10_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT22C_P31_10_IN
Receive input channel 22.
Definition: IfxSent_PinMap.h:121
IfxSent_Sent_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxSent_PinMap.h:61
IfxSent_SENT16A_P41_0_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT16A_P41_0_IN
Receive input channel 16.
Definition: IfxSent_PinMap.h:96
IfxSent_SENT19B_P01_11_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT19B_P01_11_IN
Receive input channel 19.
Definition: IfxSent_PinMap.h:108
IfxSent_SENT6B_P00_7_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT6B_P00_7_IN
Receive input channel 6.
Definition: IfxSent_PinMap.h:141
IfxSent_SENT23C_P31_11_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT23C_P31_11_IN
Receive input channel 23.
Definition: IfxSent_PinMap.h:124
IfxSent_SENT2B_P00_3_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2B_P00_3_IN
Receive input channel 2.
Definition: IfxSent_PinMap.h:129
IfxSent_SENT13C_P33_0_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT13C_P33_0_IN
Receive input channel 13.
Definition: IfxSent_PinMap.h:89
IfxSent_SPC7_P00_8_OUT
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC7_P00_8_OUT
Transmit output.
Definition: IfxSent_PinMap.h:159
IfxSent_SENT5B_P00_6_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5B_P00_6_IN
Receive input channel 5.
Definition: IfxSent_PinMap.h:138
IfxSent_SPC4_P00_5_OUT
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC4_P00_5_OUT
Transmit output.
Definition: IfxSent_PinMap.h:156
IfxSent_Sent_In_pinTable
IFX_EXTERN const IfxSent_Sent_In * IfxSent_Sent_In_pinTable[IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SENT_IN_NUM_ITEMS]
IfxSent_Sent_In table.
Definition: IfxSent_PinMap.h:171
IfxSent_SENT12C_P32_7_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT12C_P32_7_IN
Receive input channel 12.
Definition: IfxSent_PinMap.h:86
IfxSent_SENT18C_P10_13_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT18C_P10_13_IN
Receive input channel 18.
Definition: IfxSent_PinMap.h:105
IfxSent_SENT23A_P41_7_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT23A_P41_7_IN
Receive input channel 23.
Definition: IfxSent_PinMap.h:122
IfxSent_SENT7C_P33_3_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT7C_P33_3_IN
Receive input channel 7.
Definition: IfxSent_PinMap.h:145
IfxSent_SPC1_P02_7_OUT
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC1_P02_7_OUT
Transmit output.
Definition: IfxSent_PinMap.h:153
IfxSent_SENT17A_P41_1_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT17A_P41_1_IN
Receive input channel 17.
Definition: IfxSent_PinMap.h:99
IfxSent_SENT15C_P10_9_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT15C_P10_9_IN
Receive input channel 15.
Definition: IfxSent_PinMap.h:95
IfxSent_Sent_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxSent_PinMap.h:60
IfxSent_SENT4A_P40_4_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4A_P40_4_IN
Receive input channel 4.
Definition: IfxSent_PinMap.h:134
IfxSent_SENT1C_P02_7_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1C_P02_7_IN
Receive input channel 1.
Definition: IfxSent_PinMap.h:112
IfxSent_SENT1B_P00_2_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1B_P00_2_IN
Receive input channel 1.
Definition: IfxSent_PinMap.h:111
IFXSENT_PINMAP_NUM_CHANNELS
#define IFXSENT_PINMAP_NUM_CHANNELS
Definition: IfxSent_PinMap.h:165
IfxSent_SENT22B_P02_11_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT22B_P02_11_IN
Receive input channel 22.
Definition: IfxSent_PinMap.h:120
IfxSent_SENT0B_P00_1_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0B_P00_1_IN
Receive input channel 0.
Definition: IfxSent_PinMap.h:74
IfxSent_SENT12A_P40_12_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT12A_P40_12_IN
Receive input channel 12.
Definition: IfxSent_PinMap.h:84
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:246
IfxSent_SENT3A_P40_3_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3A_P40_3_IN
Receive input channel 3.
Definition: IfxSent_PinMap.h:131
IfxSent_SENT7B_P00_8_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT7B_P00_8_IN
Receive input channel 7.
Definition: IfxSent_PinMap.h:144
IfxSent_SENT19A_P41_3_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT19A_P41_3_IN
Receive input channel 19.
Definition: IfxSent_PinMap.h:107
IfxSent_SENT16B_P01_9_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT16B_P01_9_IN
Receive input channel 16.
Definition: IfxSent_PinMap.h:97
Ifx_RxSel
Ifx_RxSel
input multiplexer definition used in PinMaps
Definition: Ifx_Types.h:127
IfxSent_SENT18B_P01_10_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT18B_P01_10_IN
Receive input channel 18.
Definition: IfxSent_PinMap.h:104
IfxSent_SENT7A_P40_7_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT7A_P40_7_IN
Receive input channel 7.
Definition: IfxSent_PinMap.h:143
IfxSent_SPC2_P00_3_OUT
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC2_P00_3_OUT
Transmit output.
Definition: IfxSent_PinMap.h:154
IfxSent_SENT17B_P01_8_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT17B_P01_8_IN
Receive input channel 17.
Definition: IfxSent_PinMap.h:100
IfxSent_SENT18A_P41_2_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT18A_P41_2_IN
Receive input channel 18.
Definition: IfxSent_PinMap.h:103
IfxSent_SENT9B_P00_10_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT9B_P00_10_IN
Receive input channel 9.
Definition: IfxSent_PinMap.h:150
IfxSent_SENT0A_P40_0_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0A_P40_0_IN
Receive input channel 0.
Definition: IfxSent_PinMap.h:73
IfxSent_SENT10C_P32_5_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT10C_P32_5_IN
Receive input channel 10.
Definition: IfxSent_PinMap.h:78
IfxSent_SENT21C_P31_9_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT21C_P31_9_IN
Receive input channel 21.
Definition: IfxSent_PinMap.h:118
IFXSENT_PINMAP_SENT_IN_NUM_ITEMS
#define IFXSENT_PINMAP_SENT_IN_NUM_ITEMS
Definition: IfxSent_PinMap.h:166
IfxSent_SENT24B_P02_13_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT24B_P02_13_IN
Receive input channel 24.
Definition: IfxSent_PinMap.h:126
IfxSent_Sent_In::module
Ifx_SENT * module
Base address.
Definition: IfxSent_PinMap.h:58
IfxSent_SENT24C_P31_12_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT24C_P31_12_IN
Receive input channel 24.
Definition: IfxSent_PinMap.h:127
IfxSent_SENT15B_P01_1_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT15B_P01_1_IN
Receive input channel 15.
Definition: IfxSent_PinMap.h:94
IfxSent_SENT14C_P33_7_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT14C_P33_7_IN
Receive input channel 14.
Definition: IfxSent_PinMap.h:92
IfxSent_SENT14A_P40_14_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT14A_P40_14_IN
Receive input channel 14.
Definition: IfxSent_PinMap.h:90
IfxSent_SENT20C_P31_8_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT20C_P31_8_IN
Receive input channel 20.
Definition: IfxSent_PinMap.h:115
IfxSent_SENT10D_P15_2_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT10D_P15_2_IN
Receive input channel 10.
Definition: IfxSent_PinMap.h:79
IfxSent_SENT6C_P33_4_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT6C_P33_4_IN
Receive input channel 6.
Definition: IfxSent_PinMap.h:142
IfxSent_ChannelId
IfxSent_ChannelId
Specifies the channel Id.
Definition: IfxSent_cfg.h:85
IfxSent_SENT9A_P40_9_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT9A_P40_9_IN
Receive input channel 9.
Definition: IfxSent_PinMap.h:149
IfxSent_SPC5_P00_6_OUT
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC5_P00_6_OUT
Transmit output.
Definition: IfxSent_PinMap.h:157
IfxSent_SENT16C_P10_10_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT16C_P10_10_IN
Receive input channel 16.
Definition: IfxSent_PinMap.h:98
IfxSent_SENT11D_P15_4_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT11D_P15_4_IN
Receive input channel 11.
Definition: IfxSent_PinMap.h:83
IfxSent_SENT4B_P00_5_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4B_P00_5_IN
Receive input channel 4.
Definition: IfxSent_PinMap.h:135
IfxSent_SENT20A_P41_4_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT20A_P41_4_IN
Receive input channel 20.
Definition: IfxSent_PinMap.h:113
IfxSent_SENT18D_P14_1_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT18D_P14_1_IN
Receive input channel 18.
Definition: IfxSent_PinMap.h:106
IfxSent_SENT13B_P02_3_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT13B_P02_3_IN
Receive input channel 13.
Definition: IfxSent_PinMap.h:88
IfxPort.h
PORT basic functionality.
IfxSent_SENT11A_P40_11_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT11A_P40_11_IN
Receive input channel 11.
Definition: IfxSent_PinMap.h:80
IfxSent_SENT9C_P33_1_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT9C_P33_1_IN
Receive input channel 9.
Definition: IfxSent_PinMap.h:151


iLLD_TC38A: IfxSent_Sent.c Source File

  • Sent
  • Sent
IfxSent_Sent.c
Go to the documentation of this file.
1 /**
2 * \file IfxSent_Sent.c
3 * \brief SENT SENT details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 *
43 */
44
45 /******************************************************************************/
46 /*----------------------------------Includes----------------------------------*/
47 /******************************************************************************/
48
49 #include "IfxSent_Sent.h"
50
51 /******************************************************************************/
52 /*-------------------------Function Implementations---------------------------*/
53 /******************************************************************************/
54
55 void IfxSent_Sent_deInitModule(IfxSent_Sent *driver)
56 {
57 Ifx_SENT *sentSFR = driver->sent;
58 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
59 IfxScuWdt_clearCpuEndinit(passwd);
60 IfxSent_resetModule(sentSFR);
61 IfxScuWdt_setCpuEndinit(passwd);
62 }
63
64
65 boolean IfxSent_Sent_initChannel(IfxSent_Sent_Channel *channel, const IfxSent_Sent_ChannelConfig *config)
66 {
67 boolean result = TRUE;
68
69 channel->driver = config->driver;
70 Ifx_SENT *sentSFR = config->driver->sent;
71 Ifx_SENT_CH *sentCh = &sentSFR->CH[config->channelId];
72 channel->channel = sentCh;
73 channel->channelId = config->channelId;
74
75 IfxSent_disableChannel(sentSFR, config->channelId);
76 IfxSent_initializeChannelUnitTime(sentSFR, config->channelId, config->tUnit);
77
78 Ifx_SENT_CH_WDT tempWDT;
79 tempWDT.U = 0;
80 tempWDT.B.WDL = config->watchDogTimerLimit;
81 sentCh->WDT.U = tempWDT.U;
82
83 Ifx_SENT_CH_RCR tempRCR;
84 tempRCR.U = 0;
85 tempRCR.B.IEP = config->receiveControl.endPulseIgnored;
86 tempRCR.B.ACE = config->receiveControl.alternateCrcSelected;
87 tempRCR.B.SNI = config->receiveControl.statusNibbleEnabled;
88 tempRCR.B.SDP = config->receiveControl.serialDataProcessingEnabled;
89 tempRCR.B.SCDIS = config->receiveControl.serialDataDisabledCrcDisabled;
90 tempRCR.B.CDIS = config->receiveControl.crcModeDisabled;
91 tempRCR.B.CFC = config->receiveControl.frameCheckMode;
92 tempRCR.B.FRL = config->receiveControl.frameLength;
93 tempRCR.B.CRZ = config->receiveControl.crcMethodDisabled;
94 tempRCR.B.ESF = config->receiveControl.extendedSerialFrameMode;
95 tempRCR.B.IDE = config->receiveControl.driftErrorsDisabled;
96 tempRCR.B.SUSEN = config->receiveControl.suspendTriggered;
97 tempRCR.B.FDFL = config->receiveControl.frequencyDriftCheckEnabled;
98 sentCh->RCR.U = tempRCR.U;
99
100 IfxSent_enableChannel(sentSFR, config->channelId);
101
102 Ifx_SENT_CH_VIEW tempVIEW;
103 tempVIEW.U = 0;
104 tempVIEW.B.RDNP0 = config->nibbleControl.nibblePointer0;
105 tempVIEW.B.RDNP1 = config->nibbleControl.nibblePointer1;
106 tempVIEW.B.RDNP2 = config->nibbleControl.nibblePointer2;
107 tempVIEW.B.RDNP3 = config->nibbleControl.nibblePointer3;
108 tempVIEW.B.RDNP4 = config->nibbleControl.nibblePointer4;
109 tempVIEW.B.RDNP5 = config->nibbleControl.nibblePointer5;
110 tempVIEW.B.RDNP6 = config->nibbleControl.nibblePointer6;
111 tempVIEW.B.RDNP7 = config->nibbleControl.nibblePointer7;
112 sentCh->VIEW.U = tempVIEW.U;
113
114 Ifx_SENT_CH_IOCR tempIOCR;
115 tempIOCR.U = 0;
116 tempIOCR.B.DEPTH = config->inputOutputControl.digitalGlitchFilterDepth;
117 tempIOCR.B.OIE = config->inputOutputControl.outputPulsePolarityHigh;
118 tempIOCR.B.IIE = config->inputOutputControl.inputPulsePolarityHigh;
119 tempIOCR.B.CEC = config->inputOutputControl.edgeCounterCleared;
120 tempIOCR.B.CREG = config->inputOutputControl.glitchRisingCleared;
121 tempIOCR.B.CFEG = config->inputOutputControl.glitchFallingCleared;
122 tempIOCR.B.ETS = config->inputOutputControl.externalTrigger;
123 tempIOCR.B.CTR = config->inputOutputControl.triggerMonitorCleared;
124 sentCh->IOCR.U = tempIOCR.U;
125
126 Ifx_SENT_CH_INP tempINP;
127 tempINP.U = 0;
128 tempINP.B.RSI = config->interuptNodeControl.receiveSuccessInterruptNode;
129 tempINP.B.RDI = config->interuptNodeControl.receiveDataInterruptNode;
130 tempINP.B.RBI = config->interuptNodeControl.receiveBufferOverflowInterruptNode;
131 tempINP.B.TDI = config->interuptNodeControl.transferDataInterruptNode;
132 tempINP.B.TBI = config->interuptNodeControl.transferBufferUnderflowInterruptNode;
133 tempINP.B.ERRI = config->interuptNodeControl.errorInterruptNode;
134 tempINP.B.SDI = config->interuptNodeControl.serialDataReceiveInterruptNode;
135 tempINP.B.WDI = config->interuptNodeControl.watchdogErrorInterruptNode;
136 sentCh->INP.U = tempINP.U;
137
138 sentCh->INTEN.U = config->enabledInterrupts.ALL;
139
140 if (config->receiveControl.frameLength > 8)
141 {
142 /* Clear RSI and enable only RDI interrupt */
143 sentCh->INTEN.B.RSI = 0;
144 sentCh->INTEN.B.RDI = 1;
145 }
146
147 if (config->spcModeOn == TRUE)
148 {
149 uint16 timeOut = IFXSENT_CFG_TIMEOUT_VALUE;
150 uint8 error = 0;
151
152 /* check if Transaction is in progress, before proceeding !!! */
153 while ((sentCh->SCR.B.TRQ == 1) && (timeOut > 0))
154 {
155 /* Wait for Transaction to be completed */
156 timeOut--;
157 }
158
159 if (timeOut == 0U)
160 {
161 error = 1U;
162 }
163
164 if (error == 0U)
165 {
166 Ifx_SENT_CH_SCR tempSCR;
167 tempSCR.U = 0;
168 tempSCR.B.PLEN = config->transmitControl.pulseLength;
169 tempSCR.B.TRIG = config->transmitControl.triggerSource;
170 tempSCR.B.DEL = config->transmitControl.pulseDelayLength;
171 tempSCR.B.BASE = config->transmitControl.timeBase;
172 sentCh->SCR.U = tempSCR.U;
173
174 if (config->transmitControl.spcMode == IfxSent_SpcMode_bidirectional)
175 {
176 /* Enable Buffer Underflow interrupt also */
177 sentCh->INTEN.B.TBI = 1U;
178 }
179 }
180 }
181
182 const IfxSent_Sent_Pins *pinsConfig = (const IfxSent_Sent_Pins *)config->pins;
183
184 if (pinsConfig != NULL_PTR)
185 {
186 const IfxSent_Sent_In *sentIn = pinsConfig->in;
187
188 if (sentIn != NULL_PTR)
189 {
190 IfxSent_initSentPin(sentIn, pinsConfig->inMode, pinsConfig->pinDriver);
191 }
192
193 const IfxSent_Spc_Out *spcOut = pinsConfig->out;
194
195 if (spcOut != NULL_PTR)
196 {
197 IfxSent_initSpcPin(spcOut, pinsConfig->outMode, pinsConfig->pinDriver);
198 }
199 }
200
201 {
202 IfxSrc_Tos tos = config->interrupt.isrProvider;
203
204 if ((config->interrupt.priority != 0) || (tos == IfxSrc_Tos_dma))
205 {
206 volatile Ifx_SRC_SRCR *src = IfxSent_getChannelSrc(config->channelId);
207 IfxSrc_init(src, tos, config->interrupt.priority);
208 IfxSrc_enable(src);
209 }
210 }
211
212 return result;
213 }
214
215
216 void IfxSent_Sent_initChannelConfig(IfxSent_Sent_ChannelConfig *config, IfxSent_Sent *driver)
217 {
218 const IfxSent_Sent_ChannelConfig defaultChannelConfig = {
219 .driver = NULL_PTR,
220 .channelId = IfxSent_ChannelId_none,
221 .tUnit = 3E-6, /* 3 uS */
222
223 .watchDogTimerLimit = 0,
224
225 .receiveControl = {
226 .endPulseIgnored = FALSE,
227 .alternateCrcSelected = FALSE,
228 .statusNibbleEnabled = FALSE,
229 .serialDataProcessingEnabled = FALSE,
230 .serialDataDisabledCrcDisabled = FALSE,
231 .crcModeDisabled = FALSE,
232 .frameCheckMode = IfxSent_FrameCheckMode_pastSyncPulse,
233 .frameLength = 6,
234 .crcMethodDisabled = FALSE,
235 .extendedSerialFrameMode = IfxSent_ExtendedSerialFrameMode_standard,
236 .driftErrorsDisabled = FALSE,
237 .suspendTriggered = FALSE,
238 .frequencyDriftCheckEnabled = FALSE,
239 },
240
241 .nibbleControl = {
242 .nibblePointer0 = IfxSent_Nibble_0,
243 .nibblePointer1 = IfxSent_Nibble_1,
244 .nibblePointer2 = IfxSent_Nibble_2,
245 .nibblePointer3 = IfxSent_Nibble_3,
246 .nibblePointer4 = IfxSent_Nibble_4,
247 .nibblePointer5 = IfxSent_Nibble_5,
248 .nibblePointer6 = IfxSent_Nibble_6,
249 .nibblePointer7 = IfxSent_Nibble_7,
250 },
251
252 .inputOutputControl = {
253 .digitalGlitchFilterDepth = IfxSent_DigitalGlitchesLength_2,
254 .outputPulsePolarityHigh = FALSE,
255 .inputPulsePolarityHigh = FALSE,
256 .edgeCounterCleared = TRUE,
257 .glitchRisingCleared = TRUE,
258 .glitchFallingCleared = TRUE,
259 .externalTrigger = IfxSent_ExternalTrigger_0,
260 .triggerMonitorCleared = FALSE,
261 },
262
263 .enabledInterrupts.ALL = IFXSENT_CFG_CHANNEL_INTEN,
264 .interuptNodeControl = {
265 .receiveDataInterruptNode = IfxSent_InterruptNodePointer_trigo0,
266 .receiveSuccessInterruptNode = IfxSent_InterruptNodePointer_trigo0,
267 .receiveBufferOverflowInterruptNode = IfxSent_InterruptNodePointer_trigo0,
268 .transferDataInterruptNode = IfxSent_InterruptNodePointer_trigo0,
269 .transferBufferUnderflowInterruptNode = IfxSent_InterruptNodePointer_trigo0,
270 .errorInterruptNode = IfxSent_InterruptNodePointer_trigo0,
271 .serialDataReceiveInterruptNode = IfxSent_InterruptNodePointer_trigo0,
272 .watchdogErrorInterruptNode = IfxSent_InterruptNodePointer_trigo0,
273 },
274
275 .pins = NULL_PTR,
276
277 /* SPC mode enable/disable */
278 .spcModeOn = FALSE,
279 };
280 *config = defaultChannelConfig;
281 config->driver = driver;
282 }
283
284
285 boolean IfxSent_Sent_initModule(IfxSent_Sent *driver, const IfxSent_Sent_Config *config)
286 {
287 boolean result = TRUE;
288 Ifx_SENT *sentSFR = config->module;
289 driver->sent = sentSFR;
290
291 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
292
293 if (IfxSent_isModuleEnabled(sentSFR) == FALSE)
294 {
295 IfxSent_enableModule(sentSFR);
296 }
297
298 IfxScuWdt_clearCpuEndinit(passwd);
299 sentSFR->CLC.B.EDIS = (config->sleepModeEnabled != FALSE) ? 0 : 1;
300
301 IfxSent_initializeModuleClock(sentSFR, IfxSent_ClockDividerMode_normal, 1023); /* Fractional divider not required, pass 1:1*/
302 IfxSent_setTimeStampPredivider(sentSFR, config->timeStampPreDivider);
303
304 IfxScuWdt_setCpuEndinit(passwd);
305
306 return result;
307 }
308
309
310 void IfxSent_Sent_initModuleConfig(IfxSent_Sent_Config *config, Ifx_SENT *sent)
311 {
312 /* Default module initialization */
313 const IfxSent_Sent_Config defaultModuleConfig = {
314 .module = NULL_PTR,
315 .sleepModeEnabled = TRUE,
316 .timeStampPreDivider = 0,
317 };
318 *config = defaultModuleConfig;
319 config->module = sent;
320 }
321
322
323 boolean IfxSent_Sent_readChannelSerialDataFrame(IfxSent_Sent_Channel *channel, IfxSent_Sent_Frame *frame)
324 {
325 boolean result = TRUE;
326
327 Ifx_SENT *sentSFR = channel->driver->sent;
328 IfxSent_ChannelId ChanIdx = channel->channelId;
329 frame->data = sentSFR->RDR[ChanIdx].U;
330 frame->timeStamp = sentSFR->RTS[ChanIdx].U;
331 frame->statusNibble = channel->channel->RSR.B.SCN;
332
333 return result;
334 }
335
336
337 boolean IfxSent_Sent_readChannelSerialMessageFrame(IfxSent_Sent_Channel *channel, IfxSent_Sent_SerialMessageFrame *message)
338 {
339 boolean result = TRUE;
340
341 Ifx_SENT_CH *sentCh = channel->channel;
342 Ifx_SENT_CH_SDS sds;
343
344 sds.U = sentCh->SDS.U;
345
346 message->serialData = sds.B.SD;
347 message->messageId = sds.B.MID;
348 message->configBit = (IfxSent_ConfigBit)sds.B.CON;
349 message->crc = sds.B.SCRC;
350
351 return result;
352 }
IfxSent_Sent_InterruptNodeControl::serialDataReceiveInterruptNode
IfxSent_InterruptNodePointer serialDataReceiveInterruptNode
Specifies the interrupt node for sdi request.
Definition: IfxSent_Sent.h:465
IfxSent_Sent_Frame::timeStamp
uint32 timeStamp
Contains the timestamp of last received frame.
Definition: IfxSent_Sent.h:570
IfxSent_Sent_readChannelSerialMessageFrame
boolean IfxSent_Sent_readChannelSerialMessageFrame(IfxSent_Sent_Channel *channel, IfxSent_Sent_SerialMessageFrame *message)
reads the Serial data recieved and collected over several SENT frames
Definition: IfxSent_Sent.c:337
IfxSent_Sent_InterruptNodeControl::transferBufferUnderflowInterruptNode
IfxSent_InterruptNodePointer transferBufferUnderflowInterruptNode
Specifies the interrupt node for tbi request.
Definition: IfxSent_Sent.h:463
IfxSent_FrameCheckMode_pastSyncPulse
Specifies frame check mode against past sync pulse.
Definition: IfxSent.h:178
IfxSent_getChannelSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxSent_getChannelSrc(IfxSent_ChannelId channelId)
gets the source for channel interrupt handler
Definition: IfxSent.h:639
IfxSent_Sent_EnabledInterrupts::ALL
uint32 ALL
Specifies to write and read to/from all flags as once via the ALL member.
Definition: IfxSent_Sent.h:429
IfxSent_Sent_TransmitControl::spcMode
IfxSent_SpcMode spcMode
Specifies the SENT SPC operational mode.
Definition: IfxSent_Sent.h:521
IfxSent_Sent_SerialMessageFrame
Specifies received message frame.
Definition: IfxSent_Sent.h:576
IfxSent_Sent_ReceiveControl::suspendTriggered
boolean suspendTriggered
Specifies the suspend trigger disables the channel or not.
Definition: IfxSent_Sent.h:506
IfxSent_Sent_SerialMessageFrame::messageId
uint8 messageId
Contains the received message ID value.
Definition: IfxSent_Sent.h:579
IfxSent_Sent_Frame
Specifies the frame configuration structure for a channel.
Definition: IfxSent_Sent.h:567
IfxSent_resetModule
void IfxSent_resetModule(Ifx_SENT *sent)
Resets the SENT module.
Definition: IfxSent.c:138
IfxSent_Sent_NibbleControl::nibblePointer2
IfxSent_Nibble nibblePointer2
Specifies the received nibble2 control.
Definition: IfxSent_Sent.h:475
IfxSent_Sent_ReceiveControl::frequencyDriftCheckEnabled
boolean frequencyDriftCheckEnabled
Specifies the frequency drift check based on frame length is enable or disable.
Definition: IfxSent_Sent.h:510
IfxSent_Sent_ReceiveControl::serialDataDisabledCrcDisabled
boolean serialDataDisabledCrcDisabled
Specifies the CRC disable for serial data disabled mode.
Definition: IfxSent_Sent.h:502
IfxSent_Sent_NibbleControl::nibblePointer5
IfxSent_Nibble nibblePointer5
Specifies the received nibble5 control.
Definition: IfxSent_Sent.h:478
IfxSent_Nibble_2
Specifies receive data target nibble pointer to nibble 2.
Definition: IfxSent.h:204
IfxSent_Sent_InputOutputControl::triggerMonitorCleared
boolean triggerMonitorCleared
Specifies the trigger monitor reset.
Definition: IfxSent_Sent.h:442
IfxSent_Sent_InputOutputControl::digitalGlitchFilterDepth
IfxSent_DigitalGlitchesLength digitalGlitchFilterDepth
Specifies the Digital Glitch Filter depth for input signal delay.
Definition: IfxSent_Sent.h:443
IfxSent_Sent_ChannelConfig::spcModeOn
boolean spcModeOn
Specifies the SENT SPC mode enable/disable.
Definition: IfxSent_Sent.h:552
IfxSent_Sent_InterruptNodeControl::watchdogErrorInterruptNode
IfxSent_InterruptNodePointer watchdogErrorInterruptNode
Specifies the interrupt node for wdi request.
Definition: IfxSent_Sent.h:466
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
IfxSent_Sent_InterruptNodeControl::transferDataInterruptNode
IfxSent_InterruptNodePointer transferDataInterruptNode
Specifies the interrupt node for tdi request.
Definition: IfxSent_Sent.h:462
IfxSent_enableChannel
IFX_INLINE void IfxSent_enableChannel(Ifx_SENT *sent, IfxSent_ChannelId channelId)
Enable the channel with the channel number.
Definition: IfxSent.h:604
IfxSent_Nibble_4
Specifies receive data target nibble pointer to nibble 4.
Definition: IfxSent.h:206
IfxSent_Sent_InterruptNodeControl::receiveBufferOverflowInterruptNode
IfxSent_InterruptNodePointer receiveBufferOverflowInterruptNode
Specifies the interrupt node for rbi request.
Definition: IfxSent_Sent.h:461
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxSent_Sent_Pins::inMode
IfxPort_InputMode inMode
Specifies input pin mode.
Definition: IfxSent_Sent.h:488
IFXSENT_CFG_CHANNEL_INTEN
#define IFXSENT_CFG_CHANNEL_INTEN
Specifies all interrupt events.
Definition: IfxSent_cfg.h:65
IfxSent_Nibble_0
Specifies receive data target nibble pointer to nibble 0.
Definition: IfxSent.h:202
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxSent_ExternalTrigger_0
Specifies the external trigger line 0.
Definition: IfxSent.h:156
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxSent_Sent_In
SENT pin mapping structure.
Definition: IfxSent_PinMap.h:56
IfxSent_Sent_Channel::driver
IfxSent_Sent * driver
Specifies the pointer to SENT module handler.
Definition: IfxSent_Sent.h:532
IfxSent_Sent_NibbleControl::nibblePointer3
IfxSent_Nibble nibblePointer3
Specifies the received nibble3 control.
Definition: IfxSent_Sent.h:476
IfxSent_Spc_Out
SPC pin mapping structure.
Definition: IfxSent_PinMap.h:65
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxSent_Sent_TransmitControl::triggerSource
IfxSent_TriggerSource triggerSource
Specifies the trigger source and mode.
Definition: IfxSent_Sent.h:519
IfxSent_Sent_InputOutputControl::outputPulsePolarityHigh
boolean outputPulsePolarityHigh
Specifies the polarity of input of each channel.
Definition: IfxSent_Sent.h:438
IfxSent_initSpcPin
IFX_INLINE void IfxSent_initSpcPin(const IfxSent_Spc_Out *spcOut, IfxPort_OutputMode spcOutMode, IfxPort_PadDriver padDriver)
Initializes a SPC output.
Definition: IfxSent.h:666
IfxSent_Sent_deInitModule
void IfxSent_Sent_deInitModule(IfxSent_Sent *driver)
Reset the SENT module.
Definition: IfxSent_Sent.c:55
IfxSent_Sent_Interrupt::priority
uint16 priority
Specifies the interrupt priority. Always 1 since all interrupts are handled at a time.
Definition: IfxSent_Sent.h:451
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxSent_Sent_ChannelConfig
Specifies the SENT Channel configuration structure.
Definition: IfxSent_Sent.h:539
IfxSent_Sent_Config
Specifies the SENT module configuration structure.
Definition: IfxSent_Sent.h:558
IfxSent_Sent_initModuleConfig
void IfxSent_Sent_initModuleConfig(IfxSent_Sent_Config *config, Ifx_SENT *sent)
Initialise buffer with default SENT configuration.
Definition: IfxSent_Sent.c:310
IfxSent_Sent::sent
Ifx_SENT * sent
Specifies pointer to SENT registers.
Definition: IfxSent_Sent.h:422
IfxSent_Sent_Config::module
Ifx_SENT * module
Specifies pointer to SENT registers.
Definition: IfxSent_Sent.h:560
IfxSent_Nibble_1
Specifies receive data target nibble pointer to nibble 1.
Definition: IfxSent.h:203
IfxSent_Sent_NibbleControl::nibblePointer6
IfxSent_Nibble nibblePointer6
Specifies the received nibble6 control.
Definition: IfxSent_Sent.h:479
IfxSent_Sent_ReceiveControl::serialDataProcessingEnabled
boolean serialDataProcessingEnabled
Specifies the serial data processing mode.
Definition: IfxSent_Sent.h:501
IfxSent_Sent_Frame::data
uint32 data
Contains the data from last received frame.
Definition: IfxSent_Sent.h:569
IfxSent_Sent_Pins::in
IFX_CONST IfxSent_Sent_In * in
Specifies input pin configuration.
Definition: IfxSent_Sent.h:487
IfxSent_Sent
Specifies SENT handle structure.
Definition: IfxSent_Sent.h:420
IfxSent_Sent_NibbleControl::nibblePointer0
IfxSent_Nibble nibblePointer0
Specifies the received nibble0 control.
Definition: IfxSent_Sent.h:473
IfxSent_Sent_ReceiveControl::alternateCrcSelected
boolean alternateCrcSelected
Specifies the CRC is calculated for both fast and serial messages.
Definition: IfxSent_Sent.h:500
IfxSent_Sent_ReceiveControl::frameCheckMode
IfxSent_FrameCheckMode frameCheckMode
Specifies the frame check mode for valid frame.
Definition: IfxSent_Sent.h:508
IfxSent_Sent_ChannelConfig::interuptNodeControl
IfxSent_Sent_InterruptNodeControl interuptNodeControl
Specifies the interrupt control properties structure.
Definition: IfxSent_Sent.h:547
IfxSent_Sent_Pins::outMode
IfxPort_OutputMode outMode
Specifies output pin mode.
Definition: IfxSent_Sent.h:490
IfxSent_Sent_Pins::out
IFX_CONST IfxSent_Spc_Out * out
Specifies output pin configuration.
Definition: IfxSent_Sent.h:489
IfxSent_Sent.h
SENT SENT details.
IfxSent_Sent_ReceiveControl::frameLength
uint8 frameLength
Specifies frame length in nibbles.
Definition: IfxSent_Sent.h:507
IfxSrc_Tos_dma
DMA interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:69
IfxSent_Sent_ReceiveControl::endPulseIgnored
boolean endPulseIgnored
Specifies the pause pulse during synchronization.
Definition: IfxSent_Sent.h:505
IfxSent_Sent_initChannelConfig
void IfxSent_Sent_initChannelConfig(IfxSent_Sent_ChannelConfig *config, IfxSent_Sent *driver)
Initialise channel buffer with default SENT channel configuration.
Definition: IfxSent_Sent.c:216
IfxSent_Sent_InputOutputControl::glitchRisingCleared
boolean glitchRisingCleared
Specifies the glitch rising edge clear.
Definition: IfxSent_Sent.h:441
IfxSent_Sent_ReceiveControl::driftErrorsDisabled
boolean driftErrorsDisabled
Specifies the drift errors enabled or disabled.
Definition: IfxSent_Sent.h:504
IfxSent_Sent_ChannelConfig::enabledInterrupts
IfxSent_Sent_EnabledInterrupts enabledInterrupts
Definition: IfxSent_Sent.h:553
IfxSent_DigitalGlitchesLength_2
Specifies 2 port input samples.
Definition: IfxSent.h:128
IfxSent_Sent_InterruptNodeControl::receiveDataInterruptNode
IfxSent_InterruptNodePointer receiveDataInterruptNode
Specifies the interrupt node for rdi request.
Definition: IfxSent_Sent.h:460
IfxSent_Sent_TransmitControl::pulseDelayLength
uint8 pulseDelayLength
Specifies the pulse delay length.
Definition: IfxSent_Sent.h:518
IfxSent_disableChannel
IFX_INLINE void IfxSent_disableChannel(Ifx_SENT *sent, IfxSent_ChannelId channelId)
Disable the channel with the channel number.
Definition: IfxSent.h:589
IfxSent_InterruptNodePointer_trigo0
Specifies interrupt requested node TRIGO 0.
Definition: IfxSent.h:186
IfxSent_Sent_ChannelConfig::inputOutputControl
IfxSent_Sent_InputOutputControl inputOutputControl
Specifies the input output controllable properties.
Definition: IfxSent_Sent.h:544
IfxSent_Sent_ChannelConfig::receiveControl
IfxSent_Sent_ReceiveControl receiveControl
Specifies the receive control properties.
Definition: IfxSent_Sent.h:545
IfxSent_Nibble_5
Specifies receive data target nibble pointer to nibble 5.
Definition: IfxSent.h:207
IfxSent_Sent_Config::timeStampPreDivider
uint32 timeStampPreDivider
Specifies the pre-divider to get clock in time stamp.
Definition: IfxSent_Sent.h:562
IfxSent_Sent_ChannelConfig::watchDogTimerLimit
uint16 watchDogTimerLimit
Speciifes the enabled interrupts for each Channel.
Definition: IfxSent_Sent.h:542
IfxSent_Sent_ChannelConfig::transmitControl
IfxSent_Sent_TransmitControl transmitControl
Specifies the transmit control properties.
Definition: IfxSent_Sent.h:546
IfxSent_ClockDividerMode_normal
Specifies clock normal divider mode.
Definition: IfxSent.h:110
IfxSent_ChannelId_none
None Sent channels.
Definition: IfxSent_cfg.h:112
IfxSent_Sent_SerialMessageFrame::configBit
IfxSent_ConfigBit configBit
Contains the received configuration bit value.
Definition: IfxSent_Sent.h:581
IfxSent_Sent_ChannelConfig::pins
IFX_CONST IfxSent_Sent_Pins * pins
Specifies the pins configuration for SENT channel.
Definition: IfxSent_Sent.h:548
IfxSent_Sent_readChannelSerialDataFrame
boolean IfxSent_Sent_readChannelSerialDataFrame(IfxSent_Sent_Channel *channel, IfxSent_Sent_Frame *frame)
Reads the nibbles recieved in the Data register.
Definition: IfxSent_Sent.c:323
IfxSent_Sent_ReceiveControl::crcMethodDisabled
boolean crcMethodDisabled
Specifies the CRC with zero nibbles disabled or enabled.
Definition: IfxSent_Sent.h:499
IfxSent_Sent_InputOutputControl::edgeCounterCleared
boolean edgeCounterCleared
Specifies the edge counter reset.
Definition: IfxSent_Sent.h:439
IfxSent_ConfigBit
IfxSent_ConfigBit
SENT.CH[channelId].SDS.CON , Specifies received configuration bit value.
Definition: IfxSent.h:116
IfxSent_Sent_TransmitControl::timeBase
IfxSent_TimeBase timeBase
Specifies the pulse time base.
Definition: IfxSent_Sent.h:520
IfxSent_Sent_InterruptNodeControl::errorInterruptNode
IfxSent_InterruptNodePointer errorInterruptNode
Specifies the interrupt node for erri request.
Definition: IfxSent_Sent.h:464
IfxSent_Sent_ReceiveControl::crcModeDisabled
boolean crcModeDisabled
Specifies the CRC mode disabled mode.
Definition: IfxSent_Sent.h:498
IfxSent_SpcMode_bidirectional
Specifies bidirectional transmit SPC mode.
Definition: IfxSent.h:227
IfxSent_Sent_SerialMessageFrame::crc
uint8 crc
Contains the received CRC value.
Definition: IfxSent_Sent.h:578
IfxSent_Sent_Channel
Specifies the SENT Channel handle structure.
Definition: IfxSent_Sent.h:530
IfxSent_Sent_ChannelConfig::channelId
IfxSent_ChannelId channelId
Specifies the SENT channel number.
Definition: IfxSent_Sent.h:543
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxSent_Sent_Channel::channel
Ifx_SENT_CH * channel
Specifies the pointer SENT channel registers.
Definition: IfxSent_Sent.h:533
IfxSent_Sent_Config::sleepModeEnabled
boolean sleepModeEnabled
Specifies SENT enable/disable.
Definition: IfxSent_Sent.h:561
IFXSENT_CFG_TIMEOUT_VALUE
#define IFXSENT_CFG_TIMEOUT_VALUE
Specifies timeout value in transmission.
Definition: IfxSent_cfg.h:73
IfxSent_Sent_InputOutputControl::externalTrigger
IfxSent_ExternalTrigger externalTrigger
Specifies the external trigger line source.
Definition: IfxSent_Sent.h:444
IfxSent_Nibble_7
Specifies receive data target nibble pointer to nibble 7.
Definition: IfxSent.h:209
IfxSent_ExtendedSerialFrameMode_standard
Specifies the standard serial frame structure.
Definition: IfxSent.h:148
IfxSent_Sent_NibbleControl::nibblePointer1
IfxSent_Nibble nibblePointer1
Specifies the received nibble1 control.
Definition: IfxSent_Sent.h:474
IfxSent_Sent_ChannelConfig::tUnit
float32 tUnit
desired unit time (f_tick), e.g. 3E-6 for 3 uS
Definition: IfxSent_Sent.h:549
IfxSent_Sent_TransmitControl::pulseLength
uint8 pulseLength
Specifies the pulse length in ticktimes.
Definition: IfxSent_Sent.h:517
IfxSent_Sent_InterruptNodeControl::receiveSuccessInterruptNode
IfxSent_InterruptNodePointer receiveSuccessInterruptNode
Specifies the interrupt node for rsi request.
Definition: IfxSent_Sent.h:459
IfxSent_Sent_Pins::pinDriver
IfxPort_PadDriver pinDriver
Pad driver mode definition.
Definition: IfxSent_Sent.h:491
IfxSent_setTimeStampPredivider
IFX_INLINE void IfxSent_setTimeStampPredivider(Ifx_SENT *sent, uint32 timeStampPreDivider)
Set the module time stamp pre-divider.
Definition: IfxSent.h:726
IfxSent_initializeChannelUnitTime
void IfxSent_initializeChannelUnitTime(Ifx_SENT *sent, IfxSent_ChannelId channelId, float32 tUnit)
Initializes the desired unit time (f_tick) for the external SENT device connected to the given channe...
Definition: IfxSent.c:96
IfxSent_Sent_SerialMessageFrame::serialData
uint16 serialData
Contains the received serial data value.
Definition: IfxSent_Sent.h:580
IfxSent_initializeModuleClock
void IfxSent_initializeModuleClock(Ifx_SENT *sent, IfxSent_ClockDividerMode dividerMode, uint16 stepValue)
Initialize and get the clock for SENT kernel.
Definition: IfxSent.c:128
IfxSent_Sent_NibbleControl::nibblePointer7
IfxSent_Nibble nibblePointer7
Specifies the received nibble7 control.
Definition: IfxSent_Sent.h:480
IfxSent_Sent_ChannelConfig::nibbleControl
IfxSent_Sent_NibbleControl nibbleControl
Specifies the received nibbles control properties.
Definition: IfxSent_Sent.h:550
IfxSent_ChannelId
IfxSent_ChannelId
Specifies the channel Id.
Definition: IfxSent_cfg.h:85
IfxSent_Sent_Interrupt::isrProvider
IfxSrc_Tos isrProvider
Specifies the interrupt service provider. CPU or DMA.
Definition: IfxSent_Sent.h:452
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxSent_Sent_ChannelConfig::interrupt
IfxSent_Sent_Interrupt interrupt
Specifies the interrupt control properties structure.
Definition: IfxSent_Sent.h:551
IfxSent_Sent_Pins
Specifies the pins configuration for SENT channel.
Definition: IfxSent_Sent.h:485
IfxSent_Sent_InputOutputControl::glitchFallingCleared
boolean glitchFallingCleared
Specifies the glitch falling edge clear.
Definition: IfxSent_Sent.h:440
IfxSent_Sent_ReceiveControl::statusNibbleEnabled
boolean statusNibbleEnabled
Specifies the status nibble to include in CRC.
Definition: IfxSent_Sent.h:503
IfxSent_Sent_initChannel
boolean IfxSent_Sent_initChannel(IfxSent_Sent_Channel *channel, const IfxSent_Sent_ChannelConfig *config)
Initialize the channel with the supplied configuration.
Definition: IfxSent_Sent.c:65
IfxSent_initSentPin
IFX_INLINE void IfxSent_initSentPin(const IfxSent_Sent_In *sentIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a SENT input.
Definition: IfxSent.h:655
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxSent_Sent_NibbleControl::nibblePointer4
IfxSent_Nibble nibblePointer4
Specifies the received nibble4 control.
Definition: IfxSent_Sent.h:477
IfxSent_Sent_Frame::statusNibble
uint8 statusNibble
Contains the status and communication Nibble of last received frame.
Definition: IfxSent_Sent.h:571
IfxSent_Nibble_6
Specifies receive data target nibble pointer to nibble 6.
Definition: IfxSent.h:208
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxSent_Sent_InputOutputControl::inputPulsePolarityHigh
boolean inputPulsePolarityHigh
Specifies the polarity of input of each channel.
Definition: IfxSent_Sent.h:437
IfxSent_Sent_initModule
boolean IfxSent_Sent_initModule(IfxSent_Sent *driver, const IfxSent_Sent_Config *config)
Initialise the SENT with the supplied configureation.
Definition: IfxSent_Sent.c:285
IfxSent_isModuleEnabled
IFX_INLINE boolean IfxSent_isModuleEnabled(Ifx_SENT *sent)
Return TRUE if SENT module is enabled.
Definition: IfxSent.h:738
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxSent_Sent_ReceiveControl::extendedSerialFrameMode
IfxSent_ExtendedSerialFrameMode extendedSerialFrameMode
Specifies the extended serial frame mode.
Definition: IfxSent_Sent.h:509
IfxSent_enableModule
IFX_INLINE void IfxSent_enableModule(Ifx_SENT *sent)
Enable the SENT module.
Definition: IfxSent.h:610
IfxSent_Nibble_3
Specifies receive data target nibble pointer to nibble 3.
Definition: IfxSent.h:205


iLLD_TC38A: IfxSent_Sent.h Source File

  • Sent
  • Sent
IfxSent_Sent.h
Go to the documentation of this file.
1 /**
2 * \file IfxSent_Sent.h
3 * \brief SENT SENT details
4 * \ingroup IfxLld_Sent
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 *
43 *
44 * \defgroup IfxLld_Sent_Sent_Usage How to use the SENT Interface driver?
45 * \ingroup IfxLld_Sent
46 *
47 * This SENT interface driver provides functions to communicate with external sensors.
48 *
49 * \section IfxLld_Sent_Sent_Preparation Preparation
50 * \subsection IfxLld_Sent_Sent_Include Include Files
51 *
52 * Include following header file into your C code:
53 * \code
54 * #include <Sent/Sent/IfxSent_Sent.h>
55 *
56 * \endcode
57 *
58 * \subsection IfxLld_Sent_Sent_Variables Variables
59 *
60 * Declare SENT module and channel handles as global variables in your C code.
61 * If multiple SENT channels should be serviced, it makes sense to declare the SENT channel handle as an array:
62 * \code
63 * #define TESTED_SENT_CHANNELS 3
64 *
65 * static IfxSent_Sent sent;
66 * static IfxSent_Sent_Channel sentChannel[TESTED_SENT_CHANNELS];
67 * \endcode
68 *
69 * \subsection IfxLld_Sent_Sent_Interrupt Interrupt Handler Installation
70 *
71 * See also \ref IfxLld_Cpu_Irq_Usage
72 *
73 * Define priorities for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:
74 * \code
75 * #define IFX_INTPRIO_SENT_CHANNEL 1
76 * \endcode
77 *
78 * Add the interrupt service routine to your C code. It has to call the SENT interrupt handler by passing the SENT channel handle:
79 * \code
80 * void SentInterruptHandler(IfxSent_Sent_Channel *channel);
81 *
82 * IFX_INTERRUPT(sentChannelISR, 0, IFX_INTPRIO_SENT_CHANNEL)
83 * {
84 * int i;
85 *
86 * for(i=0; i<TESTED_SENT_CHANNELS; ++i)
87 * {
88 * SentInterruptHandler(&sentChannel[i]);
89 * }
90 * }
91 * \endcode
92 *
93 * Note: the SentInterruptHandler function is not part of the interface driver, but has to be
94 * implemented in the application. A template can be found below under \ref IfxLld_Sent_Sent_ISR
95 *
96 * Finally install the interrupt handlers in your initialisation function:
97 * \code
98 * // install interrupt handler
99 * IfxCpu_Irq_installInterruptHandler(&sentChannelISR, IFX_INTPRIO_SENT_CHANNEL);
100 * IfxCpu_enableInterrupts();
101 * \endcode
102 *
103 *
104 * \subsection IfxLld_Sent_Sent_Init Module Initialisation
105 *
106 * The module initialisation can be done in the same function.
107 * Here an example for SENT and SPC mode:
108 *
109 * \code
110 * // create module config
111 * IfxSent_Sent_Config sentConfig;
112 * IfxSent_Sent_initModuleConfig(&sentConfig, &MODULE_SENT);
113 *
114 * // initialize module
115 * //IfxSent_Sent sent; // defined globally
116 * IfxSent_Sent_initModule(&sent, &sentConfig);
117 * \endcode
118 *
119 * \subsection IfxLld_Sent_Sent_InitChannel Channel Initialisation
120 * After the module has been initialized, one or more SENT channels can be configured.
121 *
122 * Here an example for three SENT channels in SENT and SPC mode:
123 * \code
124 * // create channel config
125 * IfxSent_Sent_ChannelConfig sentChannelConfig;
126 * IfxSent_Sent_initChannelConfig(&sentChannelConfig, &sent);
127 *
128 * // define tUnit of the external sensor
129 * sentChannelConfig.tUnit = 3.0E-6;
130 *
131 * // ISR priorities and interrupt target
132 * sentChannelConfig.interrupt.priority = IFX_INTPRIO_SENT_CHANNEL;
133 * sentChannelConfig.interrupt.isrProvider = IfxCpu_Irq_getTos(IfxCpu_getCoreIndex());
134 *
135 * int i;
136 * for(i=0; i<TESTED_SENT_CHANNELS; ++i)
137 * {
138 * // pin configuration
139 * const IfxSent_Sent_Pins sentPins[TESTED_SENT_CHANNELS] =
140 * {
141 * { // Channel 0
142 * &IfxSent_SENT0C_P02_8_IN, IfxPort_InputMode_noPullDevice, // SENT input
143 * &IfxSent_SPC0_P00_1_OUT, IfxPort_OutputMode_openDrain, // SENT output
144 * IfxPort_PadDriver_cmosAutomotiveSpeed1
145 * },
146 *
147 * { // Channel 1
148 * &IfxSent_SENT1C_P02_7_IN, IfxPort_InputMode_noPullDevice, // SENT input
149 * &IfxSent_SPC1_P02_7_OUT, IfxPort_OutputMode_openDrain, // SENT output
150 * IfxPort_PadDriver_cmosAutomotiveSpeed1
151 * },
152 *
153 * { // Channel 2
154 * &IfxSent_SENT2C_P02_6_IN, IfxPort_InputMode_noPullDevice, // SENT input
155 * &IfxSent_SPC2_P00_3_OUT, IfxPort_OutputMode_openDrain, // SENT output
156 * IfxPort_PadDriver_cmosAutomotiveSpeed1
157 * },
158 * };
159 *
160 * sentChannelConfig.pins = &sentPins[i];
161 *
162 * // set channel
163 * sentChannelConfig.channelId = (IfxSent_ChannelId)i;
164 *
165 * // initialize channel
166 * IfxSent_Sent_initChannel(&sentChannel[i], &sentChannelConfig);
167 * }
168 * \endcode
169 *
170 * \subsection IfxLld_Sent_Sent_ISR Interrupt Service Handler
171 * The ISR has to be implemented in the application. Following template can be used
172 * to react on the events:
173 *
174 * \code
175 * void SentInterruptHandler(IfxSent_Sent_Channel *channel)
176 * {
177 * Ifx_SENT_CH_INTSTAT interruptStatus = IfxSent_Sent_getAndClearInterruptStatus(channel);
178 *
179 * if( interruptStatus.U )
180 * {
181 * // check for error conditions
182 * if (interruptStatus.U & IFXSENT_INTERRUPT_STATUS_ERROR_FLAGS)
183 * {
184 * // * Receive Buffer Overflow
185 * // * This bit is set after a frame has been received while the old one was
186 * // * not read from RDRx. I.e. the kernel wants to set any of the two
187 * // * interrupts RSI and RDI and finds any of these two interrupts already
188 * // * set. The old data is overwritten by the new data.
189 * // *
190 * if (interruptStatus.B.RBI)
191 * {
192 * // insert your error handling code here
193 * __debug();
194 * }
195 *
196 * // * Transmit Buffer Underflow
197 * // * This bit is set after data has been completely transferred (PLEN
198 * // * exceeded) and no new data was written to SCRx.
199 * // *
200 * if (interruptStatus.B.TBI)
201 * {
202 * // insert your error handling code here
203 * __debug();
204 * }
205 *
206 * // * Frequency Range Error
207 * // * This bit is set after a Synchronization / Calibration pulse was
208 * // * received that deviates more than +- 25% from the nominal value.
209 * // * The referring data is ignored.
210 * // *
211 * if (interruptStatus.B.FRI)
212 * {
213 * // insert your error handling code here
214 * __debug();
215 * }
216 *
217 * // * Frequency Drift Error
218 * // * This bit is set after a subsequent Synchronization / Calibration
219 * // * pulse was received that deviates more than 1.5625% (1/64) from its
220 * // * predecessor.
221 * // *
222 * if (interruptStatus.B.FDI)
223 * {
224 * // insert your error handling code here
225 * __debug();
226 * }
227 *
228 * // * Wrong Number of Nibbles
229 * // * This bit is set after a more nibbles have been received than expected
230 * // * or a Synchronization / Calibration Pulse is received too early thus
231 * // * too few nibbles have been received
232 * // *
233 * if (interruptStatus.B.NNI)
234 * {
235 * // insert your error handling code here
236 * __debug();
237 * }
238 *
239 * // * Nibbles Value out of Range
240 * // * This bit is set after a too long or too short nibble pulse has been
241 * // * received. I.e. value < 0 or value > 15.
242 * // *
243 * if (interruptStatus.B.NVI)
244 * {
245 * // insert your error handling code here
246 * __debug();
247 * }
248 *
249 * // * CRC Error
250 * // * This bit is set if the CRC check fails.
251 * // *
252 * if (interruptStatus.B.CRCI)
253 * {
254 * // insert your error handling code here
255 * __debug();
256 * }
257 *
258 * // * Wrong Status and Communication Nibble Error
259 * // * In standard Serial Frame Mode (RCR.ESF is cleared), this bit is set
260 * // * if the Status and Communication nibble shows a start bit in a frame
261 * // * other than frame number n x 16.
262 * // * In Extended Serial Frame Mode this bit is without function.
263 * // *
264 * if (interruptStatus.B.WSI)
265 * {
266 * // insert your error handling code here
267 * __debug();
268 * }
269 *
270 * // * Serial Data CRC Error
271 * // * This bit is set if the CRC of the serial message fails.
272 * // * In Extended Serial Message Format, this includes a check of the Serial
273 * // * Communication Nibble for correct 0 values of bit 3 in frames 7, 13 and 18.
274 * // *
275 * if (interruptStatus.B.SCRI)
276 * {
277 * // insert your error handling code here
278 * __debug();
279 * }
280 *
281 * // * Watch Dog Error
282 * // * This bit is set if the Watch Dog Timer of the channel expires.
283 * // *
284 * if (interruptStatus.B.WDI)
285 * {
286 * // insert your error handling code here
287 * __debug();
288 * }
289 * }
290 *
291 * // transaction events
292 *
293 * // * Receive Data
294 * // * RDI is activated when a received frame is moved to a Receive Data
295 * // * Register RDR. Both RDI and RSI will be issued together in normal use
296 * // * cases where the frame size is not bigger than 8 nibbles and CRC is
297 * // * correct or not checked (if RCRx.CDIS is cleared).
298 * // *
299 * if (interruptStatus.B.RDI)
300 * {
301 * // * Ignore RDI bit, useful only when Frame Length is greater than
302 * // * 8 nibbles since it can indicate that end of frame
303 * // *
304 * }
305 *
306 * // * Receive Success
307 * // * This bit is set at the successfully received end of a frame.
308 * // * Depending on bit RCRx.CDIS this indicates a successful check of the CRC.
309 * // *
310 * if (interruptStatus.B.RSI)
311 * {
312 * // here you could handle the incoming frame:
313 * IfxSent_Sent_Frame frame;
314 * IfxSent_Sent_readChannelSerialDataFrame(channel, &frame);
315 *
316 * // do something with the incoming data
317 * }
318 *
319 * // * Transfer Data
320 * // * This bit is set after the trigger condition was detected. Data to be
321 * // * transferred has been moved internally. Thus a new value can be written
322 * // * to SCRx. This can be used for back to back transfers.
323 * // *
324 * if (interruptStatus.B.TDI)
325 * {
326 * }
327 *
328 * // * Serial Data Received
329 * // * This bit is set after all serial data bits have been received via the
330 * // * Status and Communication nibble. Depending on bit RCRx.SCDIS this
331 * // * indicates a successful check of the CRC.
332 * // *
333 * if (interruptStatus.B.SDI)
334 * {
335 * // here you could handle the incoming message:
336 *
337 * // decode incoming message
338 * IfxSent_Sent_SerialMessageFrame message;
339 * IfxSent_Sent_readChannelSerialMessageFrame(channel, &message);
340 *
341 * // do something with the incoming message
342 * }
343 * }
344 * }
345 * \endcode
346 *
347 * \subsection IfxLld_Sent_Sent_Frame Frame Decoding
348 * Following code snippet shows, how incoming data of a TLE4998S device can be decoded:
349 *
350 * \code
351 * static void parseSensorData(IfxSent_Sent_Frame *frame)
352 * {
353 * uint32 data = frame->data;
354 * uint8 statusNibble = frame->statusNibble;
355 *
356 * // select B range [mT]
357 * const uint8 rangeValTable[4] = { 200, 100, 50, 0 };
358 * uint8 rangeVal = rangeValTable[statusNibble & 3];
359 *
360 * uint16 hallVal = (short)((((data & 0xFFFF) * rangeVal) / 0x7FFF) - rangeVal);
361 * uint16 temperature = ((short)((data >> 16) & 0x00FF) - 55);
362 *
363 * // do something with the values here...
364 * }
365 * \endcode
366 *
367 * \defgroup IfxLld_Sent_Sent Interface Driver
368 * \ingroup IfxLld_Sent
369 * \defgroup IfxLld_Sent_Sent_Structures Data Structures
370 * \ingroup IfxLld_Sent_Sent
371 * \defgroup IfxLld_Sent_Sent_Module Module Functions
372 * \ingroup IfxLld_Sent_Sent
373 * \defgroup IfxLld_Sent_Sent_Channel Channel Functions
374 * \ingroup IfxLld_Sent_Sent
375 */
376
377 #ifndef IFXSENT_SENT_H
378 #define IFXSENT_SENT_H 1
379
380 /******************************************************************************/
381 /*----------------------------------Includes----------------------------------*/
382 /******************************************************************************/
383
384 #include "Scu/Std/IfxScuWdt.h"
385 #include "Sent/Std/IfxSent.h"
386 #include "Cpu/Irq/IfxCpu_Irq.h"
387
388 /******************************************************************************/
389 /*-----------------------------Data Structures--------------------------------*/
390 /******************************************************************************/
391
392 /** \addtogroup IfxLld_Sent_Sent_Structures
393 * \{ */
394 /** \brief Specifies the Interrupt type enables structure
395 */
396 typedef struct
397 {
398 uint8 receiveDataInterrupt; /**< \brief Specifies receive data interrupt enable */
399 uint8 receiveSuccessInterrupt; /**< \brief Specifies receive success interrupt enable */
400 uint8 receiveBufferOverflowInterrupt; /**< \brief Specifies receive buffer overflow interrupt enable */
401 uint8 transferDataInterrupt; /**< \brief Specifies transfer data interrupt enable */
402 uint8 transferBufferUnderflowInterrupt; /**< \brief Specifies transfer buffer underflow interrupt enable */
403 uint8 serialDataReceiveInterrupt; /**< \brief Specifies serial data interrupt enable */
404 uint8 watchdogErrorInterrupt; /**< \brief Specifies watchdog error interrupt enable */
405 uint8 serialDataCrcErrorInterrupt; /**< \brief Specifies serial data CRC error interrupt enable */
406 uint8 wrongStatusNibbleErrorInterrupt; /**< \brief Specifies wrong status nibble error interrupt enable */
407 uint8 crcErrorInterrupt; /**< \brief Specifies CRC error interrupt enable */
408 uint8 nibblesValueOutOfRangeErrorInterrupt; /**< \brief Specifies nibble value out of range error interrupt enable */
409 uint8 nibblesWrongErrorInterrupt; /**< \brief Specifies nibbles wrong error interrupt enable */
410 uint8 frequencyDriftErrorInterrupt; /**< \brief Specifies frequency drift error interrupt enable */
411 uint8 frequencyRangeErrorInterrupt; /**< \brief Specifies frequency not in the range error interrupt enable */
412 } IfxSent_Sent_Enable;
413
414 /** \} */
415
416 /** \addtogroup IfxLld_Sent_Sent_Structures
417 * \{ */
418 /** \brief Specifies SENT handle structure
419 */
420 typedef struct
421 {
422 Ifx_SENT *sent; /**< \brief Specifies pointer to SENT registers */
423 } IfxSent_Sent;
424
425 /** \brief Specifies interrupt flags union . In addition it allows to write and read to/from all flags as once via the ALL member.
426 */
427 typedef union
428 {
429 uint32 ALL; /**< \brief Specifies to write and read to/from all flags as once via the ALL member. */
430 IfxSent_Sent_Enable enable; /**< \brief Structure contains the interrupt flags */
431 } IfxSent_Sent_EnabledInterrupts;
432
433 /** \brief Specifies the input output control properties
434 */
435 typedef struct
436 {
437 boolean inputPulsePolarityHigh; /**< \brief Specifies the polarity of input of each channel */
438 boolean outputPulsePolarityHigh; /**< \brief Specifies the polarity of input of each channel */
439 boolean edgeCounterCleared; /**< \brief Specifies the edge counter reset */
440 boolean glitchFallingCleared; /**< \brief Specifies the glitch falling edge clear */
441 boolean glitchRisingCleared; /**< \brief Specifies the glitch rising edge clear */
442 boolean triggerMonitorCleared; /**< \brief Specifies the trigger monitor reset */
443 IfxSent_DigitalGlitchesLength digitalGlitchFilterDepth; /**< \brief Specifies the Digital Glitch Filter depth for input signal delay */
444 IfxSent_ExternalTrigger externalTrigger; /**< \brief Specifies the external trigger line source */
445 } IfxSent_Sent_InputOutputControl;
446
447 /** \brief Specifies the interrupt control properties
448 */
449 typedef struct
450 {
451 uint16 priority; /**< \brief Specifies the interrupt priority. Always 1 since all interrupts are handled at a time */
452 IfxSrc_Tos isrProvider; /**< \brief Specifies the interrupt service provider. CPU or DMA. */
453 } IfxSent_Sent_Interrupt;
454
455 /** \brief Specifies the interrupt control properties structure
456 */
457 typedef struct
458 {
459 IfxSent_InterruptNodePointer receiveSuccessInterruptNode; /**< \brief Specifies the interrupt node for rsi request */
460 IfxSent_InterruptNodePointer receiveDataInterruptNode; /**< \brief Specifies the interrupt node for rdi request */
461 IfxSent_InterruptNodePointer receiveBufferOverflowInterruptNode; /**< \brief Specifies the interrupt node for rbi request */
462 IfxSent_InterruptNodePointer transferDataInterruptNode; /**< \brief Specifies the interrupt node for tdi request */
463 IfxSent_InterruptNodePointer transferBufferUnderflowInterruptNode; /**< \brief Specifies the interrupt node for tbi request */
464 IfxSent_InterruptNodePointer errorInterruptNode; /**< \brief Specifies the interrupt node for erri request */
465 IfxSent_InterruptNodePointer serialDataReceiveInterruptNode; /**< \brief Specifies the interrupt node for sdi request */
466 IfxSent_InterruptNodePointer watchdogErrorInterruptNode; /**< \brief Specifies the interrupt node for wdi request */
467 } IfxSent_Sent_InterruptNodeControl;
468
469 /** \brief Specifies the received nibbles control properties
470 */
471 typedef struct
472 {
473 IfxSent_Nibble nibblePointer0; /**< \brief Specifies the received nibble0 control */
474 IfxSent_Nibble nibblePointer1; /**< \brief Specifies the received nibble1 control */
475 IfxSent_Nibble nibblePointer2; /**< \brief Specifies the received nibble2 control */
476 IfxSent_Nibble nibblePointer3; /**< \brief Specifies the received nibble3 control */
477 IfxSent_Nibble nibblePointer4; /**< \brief Specifies the received nibble4 control */
478 IfxSent_Nibble nibblePointer5; /**< \brief Specifies the received nibble5 control */
479 IfxSent_Nibble nibblePointer6; /**< \brief Specifies the received nibble6 control */
480 IfxSent_Nibble nibblePointer7; /**< \brief Specifies the received nibble7 control */
481 } IfxSent_Sent_NibbleControl;
482
483 /** \brief Specifies the pins configuration for SENT channel
484 */
485 typedef struct
486 {
487 IFX_CONST IfxSent_Sent_In *in; /**< \brief Specifies input pin configuration */
488 IfxPort_InputMode inMode; /**< \brief Specifies input pin mode */
489 IFX_CONST IfxSent_Spc_Out *out; /**< \brief Specifies output pin configuration */
490 IfxPort_OutputMode outMode; /**< \brief Specifies output pin mode */
491 IfxPort_PadDriver pinDriver; /**< \brief Pad driver mode definition */
492 } IfxSent_Sent_Pins;
493
494 /** \brief Specifies the receive control properties
495 */
496 typedef struct
497 {
498 boolean crcModeDisabled; /**< \brief Specifies the CRC mode disabled mode */
499 boolean crcMethodDisabled; /**< \brief Specifies the CRC with zero nibbles disabled or enabled */
500 boolean alternateCrcSelected; /**< \brief Specifies the CRC is calculated for both fast and serial messages */
501 boolean serialDataProcessingEnabled; /**< \brief Specifies the serial data processing mode */
502 boolean serialDataDisabledCrcDisabled; /**< \brief Specifies the CRC disable for serial data disabled mode */
503 boolean statusNibbleEnabled; /**< \brief Specifies the status nibble to include in CRC */
504 boolean driftErrorsDisabled; /**< \brief Specifies the drift errors enabled or disabled */
505 boolean endPulseIgnored; /**< \brief Specifies the pause pulse during synchronization */
506 boolean suspendTriggered; /**< \brief Specifies the suspend trigger disables the channel or not */
507 uint8 frameLength; /**< \brief Specifies frame length in nibbles */
508 IfxSent_FrameCheckMode frameCheckMode; /**< \brief Specifies the frame check mode for valid frame */
509 IfxSent_ExtendedSerialFrameMode extendedSerialFrameMode; /**< \brief Specifies the extended serial frame mode */
510 boolean frequencyDriftCheckEnabled; /**< \brief Specifies the frequency drift check based on frame length is enable or disable */
511 } IfxSent_Sent_ReceiveControl;
512
513 /** \brief Specifies the SPC channel properties structure
514 */
515 typedef struct
516 {
517 uint8 pulseLength; /**< \brief Specifies the pulse length in ticktimes */
518 uint8 pulseDelayLength; /**< \brief Specifies the pulse delay length */
519 IfxSent_TriggerSource triggerSource; /**< \brief Specifies the trigger source and mode */
520 IfxSent_TimeBase timeBase; /**< \brief Specifies the pulse time base */
521 IfxSent_SpcMode spcMode; /**< \brief Specifies the SENT SPC operational mode */
522 } IfxSent_Sent_TransmitControl;
523
524 /** \} */
525
526 /** \addtogroup IfxLld_Sent_Sent_Structures
527 * \{ */
528 /** \brief Specifies the SENT Channel handle structure
529 */
530 typedef struct
531 {
532 IfxSent_Sent *driver; /**< \brief Specifies the pointer to SENT module handler */
533 Ifx_SENT_CH *channel; /**< \brief Specifies the pointer SENT channel registers */
534 IfxSent_ChannelId channelId; /**< \brief Specifies the SENT channel number */
535 } IfxSent_Sent_Channel;
536
537 /** \brief Specifies the SENT Channel configuration structure
538 */
539 typedef struct
540 {
541 IfxSent_Sent *driver; /**< \brief Specifies the pointer to SENT module handler */
542 uint16 watchDogTimerLimit; /**< \brief Speciifes the enabled interrupts for each Channel */
543 IfxSent_ChannelId channelId; /**< \brief Specifies the SENT channel number */
544 IfxSent_Sent_InputOutputControl inputOutputControl; /**< \brief Specifies the input output controllable properties */
545 IfxSent_Sent_ReceiveControl receiveControl; /**< \brief Specifies the receive control properties */
546 IfxSent_Sent_TransmitControl transmitControl; /**< \brief Specifies the transmit control properties */
547 IfxSent_Sent_InterruptNodeControl interuptNodeControl; /**< \brief Specifies the interrupt control properties structure */
548 IFX_CONST IfxSent_Sent_Pins *pins; /**< \brief Specifies the pins configuration for SENT channel */
549 float32 tUnit; /**< \brief desired unit time (f_tick), e.g. 3E-6 for 3 uS */
550 IfxSent_Sent_NibbleControl nibbleControl; /**< \brief Specifies the received nibbles control properties */
551 IfxSent_Sent_Interrupt interrupt; /**< \brief Specifies the interrupt control properties structure */
552 boolean spcModeOn; /**< \brief Specifies the SENT SPC mode enable/disable */
553 IfxSent_Sent_EnabledInterrupts enabledInterrupts;
554 } IfxSent_Sent_ChannelConfig;
555
556 /** \brief Specifies the SENT module configuration structure
557 */
558 typedef struct
559 {
560 Ifx_SENT *module; /**< \brief Specifies pointer to SENT registers */
561 boolean sleepModeEnabled; /**< \brief Specifies SENT enable/disable */
562 uint32 timeStampPreDivider; /**< \brief Specifies the pre-divider to get clock in time stamp */
563 } IfxSent_Sent_Config;
564
565 /** \brief Specifies the frame configuration structure for a channel
566 */
567 typedef struct
568 {
569 uint32 data; /**< \brief Contains the data from last received frame */
570 uint32 timeStamp; /**< \brief Contains the timestamp of last received frame */
571 uint8 statusNibble; /**< \brief Contains the status and communication Nibble of last received frame */
572 } IfxSent_Sent_Frame;
573
574 /** \brief Specifies received message frame
575 */
576 typedef struct
577 {
578 uint8 crc; /**< \brief Contains the received CRC value */
579 uint8 messageId; /**< \brief Contains the received message ID value */
580 uint16 serialData; /**< \brief Contains the received serial data value */
581 IfxSent_ConfigBit configBit; /**< \brief Contains the received configuration bit value */
582 } IfxSent_Sent_SerialMessageFrame;
583
584 /** \} */
585
586 /** \addtogroup IfxLld_Sent_Sent_Module
587 * \{ */
588
589 /******************************************************************************/
590 /*-------------------------Global Function Prototypes-------------------------*/
591 /******************************************************************************/
592
593 /** \brief Reset the SENT module
594 * \param driver pointer to the SENT module handler
595 * \return None
596 */
597 IFX_EXTERN void IfxSent_Sent_deInitModule(IfxSent_Sent *driver);
598
599 /** \brief Initialise the SENT with the supplied configureation
600 * \param driver pointer to the SENT module handler
601 * \param config pointer to the SENT module configuration
602 * \return TRUE if valid configuration otherwise FALSE
603 *
604 * Usage example: see \ref IfxLld_Sent_Sent_Usage
605 *
606 */
607 IFX_EXTERN boolean IfxSent_Sent_initModule(IfxSent_Sent *driver, const IfxSent_Sent_Config *config);
608
609 /** \brief Initialise buffer with default SENT configuration
610 * \param config pointer to the SENT module configuration
611 * \param sent base address of the SENT register space
612 * \return None
613 *
614 * Usage example: see \ref IfxLld_Sent_Sent_Usage
615 *
616 */
617 IFX_EXTERN void IfxSent_Sent_initModuleConfig(IfxSent_Sent_Config *config, Ifx_SENT *sent);
618
619 /** \} */
620
621 /** \addtogroup IfxLld_Sent_Sent_Channel
622 * \{ */
623
624 /******************************************************************************/
625 /*-------------------------Inline Function Prototypes-------------------------*/
626 /******************************************************************************/
627
628 /** \brief Copies the current interrupt flags into the Ifx_SENT_CH_INTSTAT structure, and clears the flags in hardware.
629 *
630 * This function should be used in an ISR to retrieve the events which triggered the interrupt.
631 * \param channel Specifies the SENT Channel handle structure
632 * \return Interrupt flags which have been cleared.
633 *
634 * Usage example: see \ref IfxLld_Sent_Sent_Usage
635 *
636 */
637 IFX_INLINE Ifx_SENT_CH_INTSTAT IfxSent_Sent_getAndClearInterruptStatus(IfxSent_Sent_Channel *channel);
638
639 /******************************************************************************/
640 /*-------------------------Global Function Prototypes-------------------------*/
641 /******************************************************************************/
642
643 /** \brief Initialize the channel with the supplied configuration
644 * \param channel pointer to the SENT channel
645 * \param config pointer to the SENT channel configuration
646 * \return TRUE if valid configuration otherwise FALSE
647 *
648 * Usage example: see \ref IfxLld_Sent_Sent_Usage
649 *
650 */
651 IFX_EXTERN boolean IfxSent_Sent_initChannel(IfxSent_Sent_Channel *channel, const IfxSent_Sent_ChannelConfig *config);
652
653 /** \brief Initialise channel buffer with default SENT channel configuration
654 * \param config pointer to the SENT channel configuration
655 * \param driver pointer to the SENT module handler
656 * \return None
657 *
658 * Usage example: see \ref IfxLld_Sent_Sent_Usage
659 *
660 */
661 IFX_EXTERN void IfxSent_Sent_initChannelConfig(IfxSent_Sent_ChannelConfig *config, IfxSent_Sent *driver);
662
663 /** \brief Reads the nibbles recieved in the Data register
664 * \param channel SENT Channel whose data has to be read
665 * \param frame Data read from the SENT Channel
666 * \return TRUE if data received otherwise false
667 *
668 * Usage example: see \ref IfxLld_Sent_Sent_Usage
669 *
670 */
671 IFX_EXTERN boolean IfxSent_Sent_readChannelSerialDataFrame(IfxSent_Sent_Channel *channel, IfxSent_Sent_Frame *frame);
672
673 /** \brief reads the Serial data recieved and collected over several SENT frames
674 * \param channel reads the Serial data recieved and collected over several SENT frames
675 * \param message Data pointer pointing to the serial data read from the SENT Channel
676 * \return TRUE if serial message received otherwise false
677 *
678 * Usage example: see \ref IfxLld_Sent_Sent_Usage
679 *
680 */
681 IFX_EXTERN boolean IfxSent_Sent_readChannelSerialMessageFrame(IfxSent_Sent_Channel *channel, IfxSent_Sent_SerialMessageFrame *message);
682
683 /** \} */
684
685 /******************************************************************************/
686 /*---------------------Inline Function Implementations------------------------*/
687 /******************************************************************************/
688
689 IFX_INLINE Ifx_SENT_CH_INTSTAT IfxSent_Sent_getAndClearInterruptStatus(IfxSent_Sent_Channel *channel)
690 {
691 return IfxSent_getAndClearInterruptStatus(channel->driver->sent, channel->channelId);
692 }
693
694
695 #endif /* IFXSENT_SENT_H */
IfxSent_Sent_InterruptNodeControl::serialDataReceiveInterruptNode
IfxSent_InterruptNodePointer serialDataReceiveInterruptNode
Specifies the interrupt node for sdi request.
Definition: IfxSent_Sent.h:465
IfxSent_Sent_Frame::timeStamp
uint32 timeStamp
Contains the timestamp of last received frame.
Definition: IfxSent_Sent.h:570
IfxSent_FrameCheckMode
IfxSent_FrameCheckMode
SENT.CH[channelId].RCR.CFC, Specifies received frame check mode.
Definition: IfxSent.h:176
IfxSent_Sent_readChannelSerialMessageFrame
IFX_EXTERN boolean IfxSent_Sent_readChannelSerialMessageFrame(IfxSent_Sent_Channel *channel, IfxSent_Sent_SerialMessageFrame *message)
reads the Serial data recieved and collected over several SENT frames
Definition: IfxSent_Sent.c:337
IfxSent_Sent_Enable
Specifies the Interrupt type enables structure.
Definition: IfxSent_Sent.h:396
IfxSent_Sent_InterruptNodeControl::transferBufferUnderflowInterruptNode
IfxSent_InterruptNodePointer transferBufferUnderflowInterruptNode
Specifies the interrupt node for tbi request.
Definition: IfxSent_Sent.h:463
IfxSent_Sent_EnabledInterrupts::ALL
uint32 ALL
Specifies to write and read to/from all flags as once via the ALL member.
Definition: IfxSent_Sent.h:429
IfxSent_Sent_TransmitControl::spcMode
IfxSent_SpcMode spcMode
Specifies the SENT SPC operational mode.
Definition: IfxSent_Sent.h:521
IfxSent_Sent_Enable::nibblesWrongErrorInterrupt
uint8 nibblesWrongErrorInterrupt
Specifies nibbles wrong error interrupt enable.
Definition: IfxSent_Sent.h:409
IfxSent_Sent_Enable::crcErrorInterrupt
uint8 crcErrorInterrupt
Specifies CRC error interrupt enable.
Definition: IfxSent_Sent.h:407
IfxSent_Sent_SerialMessageFrame
Specifies received message frame.
Definition: IfxSent_Sent.h:576
IfxSent_Sent_ReceiveControl::suspendTriggered
boolean suspendTriggered
Specifies the suspend trigger disables the channel or not.
Definition: IfxSent_Sent.h:506
IfxSent_Sent_SerialMessageFrame::messageId
uint8 messageId
Contains the received message ID value.
Definition: IfxSent_Sent.h:579
IfxSent_Sent_Frame
Specifies the frame configuration structure for a channel.
Definition: IfxSent_Sent.h:567
IfxSent_Sent_NibbleControl::nibblePointer2
IfxSent_Nibble nibblePointer2
Specifies the received nibble2 control.
Definition: IfxSent_Sent.h:475
IfxSent_Sent_ReceiveControl::frequencyDriftCheckEnabled
boolean frequencyDriftCheckEnabled
Specifies the frequency drift check based on frame length is enable or disable.
Definition: IfxSent_Sent.h:510
IfxSent_Sent_ReceiveControl::serialDataDisabledCrcDisabled
boolean serialDataDisabledCrcDisabled
Specifies the CRC disable for serial data disabled mode.
Definition: IfxSent_Sent.h:502
IfxSent_Sent_NibbleControl::nibblePointer5
IfxSent_Nibble nibblePointer5
Specifies the received nibble5 control.
Definition: IfxSent_Sent.h:478
IfxSent_Sent_TransmitControl
Specifies the SPC channel properties structure.
Definition: IfxSent_Sent.h:515
IfxSent_InterruptNodePointer
IfxSent_InterruptNodePointer
SENT.CH[channelId].INP.X(X= RSI,RDI,RBI,TDI,TBI,ERRI,SDI,WDI),Specifies interrupt requested node for ...
Definition: IfxSent.h:184
IfxSent_Sent_Enable::receiveBufferOverflowInterrupt
uint8 receiveBufferOverflowInterrupt
Specifies receive buffer overflow interrupt enable.
Definition: IfxSent_Sent.h:400
IfxSent_Sent_InputOutputControl::triggerMonitorCleared
boolean triggerMonitorCleared
Specifies the trigger monitor reset.
Definition: IfxSent_Sent.h:442
IfxSent_Sent_InputOutputControl::digitalGlitchFilterDepth
IfxSent_DigitalGlitchesLength digitalGlitchFilterDepth
Specifies the Digital Glitch Filter depth for input signal delay.
Definition: IfxSent_Sent.h:443
IfxSent_Sent_ChannelConfig::spcModeOn
boolean spcModeOn
Specifies the SENT SPC mode enable/disable.
Definition: IfxSent_Sent.h:552
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:140
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxSent_Sent_InterruptNodeControl::watchdogErrorInterruptNode
IfxSent_InterruptNodePointer watchdogErrorInterruptNode
Specifies the interrupt node for wdi request.
Definition: IfxSent_Sent.h:466
float32
float float32
Definition: Platform_Types.h:170
IfxSent_Sent_EnabledInterrupts::enable
IfxSent_Sent_Enable enable
Structure contains the interrupt flags.
Definition: IfxSent_Sent.h:430
IfxSent_Sent_InterruptNodeControl::transferDataInterruptNode
IfxSent_InterruptNodePointer transferDataInterruptNode
Specifies the interrupt node for tdi request.
Definition: IfxSent_Sent.h:462
IfxSent_Sent_InterruptNodeControl
Specifies the interrupt control properties structure.
Definition: IfxSent_Sent.h:457
IfxSent_Sent_InterruptNodeControl::receiveBufferOverflowInterruptNode
IfxSent_InterruptNodePointer receiveBufferOverflowInterruptNode
Specifies the interrupt node for rbi request.
Definition: IfxSent_Sent.h:461
IfxSent_Sent_Interrupt
Specifies the interrupt control properties.
Definition: IfxSent_Sent.h:449
IfxSent_Sent_Pins::inMode
IfxPort_InputMode inMode
Specifies input pin mode.
Definition: IfxSent_Sent.h:488
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxSent_Sent_In
SENT pin mapping structure.
Definition: IfxSent_PinMap.h:56
IfxSent_Sent_Channel::driver
IfxSent_Sent * driver
Specifies the pointer to SENT module handler.
Definition: IfxSent_Sent.h:532
IfxSent_Sent_Enable::wrongStatusNibbleErrorInterrupt
uint8 wrongStatusNibbleErrorInterrupt
Specifies wrong status nibble error interrupt enable.
Definition: IfxSent_Sent.h:406
IfxSent_Sent_Enable::watchdogErrorInterrupt
uint8 watchdogErrorInterrupt
Specifies watchdog error interrupt enable.
Definition: IfxSent_Sent.h:404
IfxSent_Sent_NibbleControl::nibblePointer3
IfxSent_Nibble nibblePointer3
Specifies the received nibble3 control.
Definition: IfxSent_Sent.h:476
IfxSent_Spc_Out
SPC pin mapping structure.
Definition: IfxSent_PinMap.h:65
IfxSent_Sent_TransmitControl::triggerSource
IfxSent_TriggerSource triggerSource
Specifies the trigger source and mode.
Definition: IfxSent_Sent.h:519
IfxSent_Sent_InputOutputControl::outputPulsePolarityHigh
boolean outputPulsePolarityHigh
Specifies the polarity of input of each channel.
Definition: IfxSent_Sent.h:438
IfxSent_Sent_Enable::transferBufferUnderflowInterrupt
uint8 transferBufferUnderflowInterrupt
Specifies transfer buffer underflow interrupt enable.
Definition: IfxSent_Sent.h:402
IfxScuWdt.h
SCU basic functionality.
IfxSent_Sent_deInitModule
IFX_EXTERN void IfxSent_Sent_deInitModule(IfxSent_Sent *driver)
Reset the SENT module.
Definition: IfxSent_Sent.c:55
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxSent_Sent_Interrupt::priority
uint16 priority
Specifies the interrupt priority. Always 1 since all interrupts are handled at a time.
Definition: IfxSent_Sent.h:451
IfxSent_Sent_ChannelConfig
Specifies the SENT Channel configuration structure.
Definition: IfxSent_Sent.h:539
IfxSent_Sent_Config
Specifies the SENT module configuration structure.
Definition: IfxSent_Sent.h:558
IfxSent_Sent_initModuleConfig
IFX_EXTERN void IfxSent_Sent_initModuleConfig(IfxSent_Sent_Config *config, Ifx_SENT *sent)
Initialise buffer with default SENT configuration.
Definition: IfxSent_Sent.c:310
IfxSent_Sent_Enable::frequencyDriftErrorInterrupt
uint8 frequencyDriftErrorInterrupt
Specifies frequency drift error interrupt enable.
Definition: IfxSent_Sent.h:410
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxSent_Sent::sent
Ifx_SENT * sent
Specifies pointer to SENT registers.
Definition: IfxSent_Sent.h:422
IfxSent_Sent_Config::module
Ifx_SENT * module
Specifies pointer to SENT registers.
Definition: IfxSent_Sent.h:560
IfxSent_Sent_NibbleControl::nibblePointer6
IfxSent_Nibble nibblePointer6
Specifies the received nibble6 control.
Definition: IfxSent_Sent.h:479
IfxSent_Sent_ReceiveControl::serialDataProcessingEnabled
boolean serialDataProcessingEnabled
Specifies the serial data processing mode.
Definition: IfxSent_Sent.h:501
IfxSent_Sent_Frame::data
uint32 data
Contains the data from last received frame.
Definition: IfxSent_Sent.h:569
IfxSent_Sent_Pins::in
IFX_CONST IfxSent_Sent_In * in
Specifies input pin configuration.
Definition: IfxSent_Sent.h:487
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxSent_Sent
Specifies SENT handle structure.
Definition: IfxSent_Sent.h:420
IfxSent_Sent_NibbleControl::nibblePointer0
IfxSent_Nibble nibblePointer0
Specifies the received nibble0 control.
Definition: IfxSent_Sent.h:473
IfxSent_Sent_ReceiveControl::alternateCrcSelected
boolean alternateCrcSelected
Specifies the CRC is calculated for both fast and serial messages.
Definition: IfxSent_Sent.h:500
IfxSent_Sent_ReceiveControl::frameCheckMode
IfxSent_FrameCheckMode frameCheckMode
Specifies the frame check mode for valid frame.
Definition: IfxSent_Sent.h:508
IfxSent_Sent_ChannelConfig::interuptNodeControl
IfxSent_Sent_InterruptNodeControl interuptNodeControl
Specifies the interrupt control properties structure.
Definition: IfxSent_Sent.h:547
IfxSent_Sent_Pins::outMode
IfxPort_OutputMode outMode
Specifies output pin mode.
Definition: IfxSent_Sent.h:490
IfxSent_Sent_Pins::out
IFX_CONST IfxSent_Spc_Out * out
Specifies output pin configuration.
Definition: IfxSent_Sent.h:489
IfxSent_Sent_ReceiveControl::frameLength
uint8 frameLength
Specifies frame length in nibbles.
Definition: IfxSent_Sent.h:507
IfxSent_Sent_Enable::receiveDataInterrupt
uint8 receiveDataInterrupt
Specifies receive data interrupt enable.
Definition: IfxSent_Sent.h:398
IfxSent_Sent_ReceiveControl::endPulseIgnored
boolean endPulseIgnored
Specifies the pause pulse during synchronization.
Definition: IfxSent_Sent.h:505
IfxSent_Sent_initChannelConfig
IFX_EXTERN void IfxSent_Sent_initChannelConfig(IfxSent_Sent_ChannelConfig *config, IfxSent_Sent *driver)
Initialise channel buffer with default SENT channel configuration.
Definition: IfxSent_Sent.c:216
IfxSent_Sent_InputOutputControl::glitchRisingCleared
boolean glitchRisingCleared
Specifies the glitch rising edge clear.
Definition: IfxSent_Sent.h:441
IfxSent_Sent_ReceiveControl::driftErrorsDisabled
boolean driftErrorsDisabled
Specifies the drift errors enabled or disabled.
Definition: IfxSent_Sent.h:504
IfxSent_Sent_ChannelConfig::enabledInterrupts
IfxSent_Sent_EnabledInterrupts enabledInterrupts
Definition: IfxSent_Sent.h:553
IfxSent_Sent_InterruptNodeControl::receiveDataInterruptNode
IfxSent_InterruptNodePointer receiveDataInterruptNode
Specifies the interrupt node for rdi request.
Definition: IfxSent_Sent.h:460
IfxSent_Sent_TransmitControl::pulseDelayLength
uint8 pulseDelayLength
Specifies the pulse delay length.
Definition: IfxSent_Sent.h:518
IfxSent_ExternalTrigger
IfxSent_ExternalTrigger
SENT.CH[channelId].IOCR.ETS , Specifies the external trigger line.
Definition: IfxSent.h:154
IfxSent_Sent_ChannelConfig::inputOutputControl
IfxSent_Sent_InputOutputControl inputOutputControl
Specifies the input output controllable properties.
Definition: IfxSent_Sent.h:544
IfxSent_Sent_ChannelConfig::receiveControl
IfxSent_Sent_ReceiveControl receiveControl
Specifies the receive control properties.
Definition: IfxSent_Sent.h:545
IfxSent_Nibble
IfxSent_Nibble
SENT.CH[channelId].VIEW.RDNPy( y=0,1,..7 ).Specifies receive data target nibble pointer.
Definition: IfxSent.h:200
IfxSent_Sent_Config::timeStampPreDivider
uint32 timeStampPreDivider
Specifies the pre-divider to get clock in time stamp.
Definition: IfxSent_Sent.h:562
IfxSent_ExtendedSerialFrameMode
IfxSent_ExtendedSerialFrameMode
SENT.CH[channelId].RCR.ESF , Specifies the serial frame structure.
Definition: IfxSent.h:146
IfxSent_Sent_ChannelConfig::watchDogTimerLimit
uint16 watchDogTimerLimit
Speciifes the enabled interrupts for each Channel.
Definition: IfxSent_Sent.h:542
IfxSent_Sent_ChannelConfig::transmitControl
IfxSent_Sent_TransmitControl transmitControl
Specifies the transmit control properties.
Definition: IfxSent_Sent.h:546
IfxSent_Sent_SerialMessageFrame::configBit
IfxSent_ConfigBit configBit
Contains the received configuration bit value.
Definition: IfxSent_Sent.h:581
IfxSent_Sent_ChannelConfig::pins
IFX_CONST IfxSent_Sent_Pins * pins
Specifies the pins configuration for SENT channel.
Definition: IfxSent_Sent.h:548
IfxSent_Sent_readChannelSerialDataFrame
IFX_EXTERN boolean IfxSent_Sent_readChannelSerialDataFrame(IfxSent_Sent_Channel *channel, IfxSent_Sent_Frame *frame)
Reads the nibbles recieved in the Data register.
Definition: IfxSent_Sent.c:323
IfxSent_SpcMode
IfxSent_SpcMode
Specifies the SENT SPC operational mode.
Definition: IfxSent.h:223
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:151
IfxSent_Sent_ReceiveControl::crcMethodDisabled
boolean crcMethodDisabled
Specifies the CRC with zero nibbles disabled or enabled.
Definition: IfxSent_Sent.h:499
IfxSent_Sent_InputOutputControl::edgeCounterCleared
boolean edgeCounterCleared
Specifies the edge counter reset.
Definition: IfxSent_Sent.h:439
IfxSent_Sent_EnabledInterrupts
Specifies interrupt flags union . In addition it allows to write and read to/from all flags as once v...
Definition: IfxSent_Sent.h:427
IfxSent_ConfigBit
IfxSent_ConfigBit
SENT.CH[channelId].SDS.CON , Specifies received configuration bit value.
Definition: IfxSent.h:116
IfxSent_Sent_TransmitControl::timeBase
IfxSent_TimeBase timeBase
Specifies the pulse time base.
Definition: IfxSent_Sent.h:520
IfxSent_Sent_Enable::frequencyRangeErrorInterrupt
uint8 frequencyRangeErrorInterrupt
Specifies frequency not in the range error interrupt enable.
Definition: IfxSent_Sent.h:411
IfxSent_Sent_Enable::serialDataCrcErrorInterrupt
uint8 serialDataCrcErrorInterrupt
Specifies serial data CRC error interrupt enable.
Definition: IfxSent_Sent.h:405
IfxSent_Sent_InterruptNodeControl::errorInterruptNode
IfxSent_InterruptNodePointer errorInterruptNode
Specifies the interrupt node for erri request.
Definition: IfxSent_Sent.h:464
IfxSent_Sent_ReceiveControl::crcModeDisabled
boolean crcModeDisabled
Specifies the CRC mode disabled mode.
Definition: IfxSent_Sent.h:498
IfxSent_DigitalGlitchesLength
IfxSent_DigitalGlitchesLength
SENT.CH[channelId].IOCR.DEPTH , Specifies number of port input samples.
Definition: IfxSent.h:124
IfxSent_Sent_SerialMessageFrame::crc
uint8 crc
Contains the received CRC value.
Definition: IfxSent_Sent.h:578
IfxSent_Sent_Channel
Specifies the SENT Channel handle structure.
Definition: IfxSent_Sent.h:530
IfxSent_Sent_Channel::channelId
IfxSent_ChannelId channelId
Specifies the SENT channel number.
Definition: IfxSent_Sent.h:534
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxSent.h
SENT basic functionality.
IfxSent_Sent_Channel::channel
Ifx_SENT_CH * channel
Specifies the pointer SENT channel registers.
Definition: IfxSent_Sent.h:533
IfxSent_Sent_ReceiveControl
Specifies the receive control properties.
Definition: IfxSent_Sent.h:496
IfxSent_Sent_Enable::serialDataReceiveInterrupt
uint8 serialDataReceiveInterrupt
Specifies serial data interrupt enable.
Definition: IfxSent_Sent.h:403
IfxSent_TriggerSource
IfxSent_TriggerSource
SENT.CH[channelId].SCR.TRIG, Specifies trigger source for pulse generation.
Definition: IfxSent.h:249
IfxSent_Sent_Config::sleepModeEnabled
boolean sleepModeEnabled
Specifies SENT enable/disable.
Definition: IfxSent_Sent.h:561
IfxSent_Sent_InputOutputControl::externalTrigger
IfxSent_ExternalTrigger externalTrigger
Specifies the external trigger line source.
Definition: IfxSent_Sent.h:444
IfxSent_Sent_NibbleControl::nibblePointer1
IfxSent_Nibble nibblePointer1
Specifies the received nibble1 control.
Definition: IfxSent_Sent.h:474
IfxSent_Sent_Enable::receiveSuccessInterrupt
uint8 receiveSuccessInterrupt
Specifies receive success interrupt enable.
Definition: IfxSent_Sent.h:399
IfxSent_Sent_ChannelConfig::tUnit
float32 tUnit
desired unit time (f_tick), e.g. 3E-6 for 3 uS
Definition: IfxSent_Sent.h:549
IfxSent_Sent_TransmitControl::pulseLength
uint8 pulseLength
Specifies the pulse length in ticktimes.
Definition: IfxSent_Sent.h:517
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:81
IfxSent_Sent_InterruptNodeControl::receiveSuccessInterruptNode
IfxSent_InterruptNodePointer receiveSuccessInterruptNode
Specifies the interrupt node for rsi request.
Definition: IfxSent_Sent.h:459
IfxSent_Sent_getAndClearInterruptStatus
IFX_INLINE Ifx_SENT_CH_INTSTAT IfxSent_Sent_getAndClearInterruptStatus(IfxSent_Sent_Channel *channel)
Copies the current interrupt flags into the Ifx_SENT_CH_INTSTAT structure, and clears the flags in ha...
Definition: IfxSent_Sent.h:689
IfxSent_Sent_InputOutputControl
Specifies the input output control properties.
Definition: IfxSent_Sent.h:435
IfxSent_Sent_Pins::pinDriver
IfxPort_PadDriver pinDriver
Pad driver mode definition.
Definition: IfxSent_Sent.h:491
IfxSent_Sent_SerialMessageFrame::serialData
uint16 serialData
Contains the received serial data value.
Definition: IfxSent_Sent.h:580
IfxSent_getAndClearInterruptStatus
IFX_INLINE Ifx_SENT_CH_INTSTAT IfxSent_getAndClearInterruptStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId)
Copies the current interrupt flags into the Ifx_SENT_CH_INTSTAT structure, and clears the flags in ha...
Definition: IfxSent.h:622
IfxSent_Sent_NibbleControl::nibblePointer7
IfxSent_Nibble nibblePointer7
Specifies the received nibble7 control.
Definition: IfxSent_Sent.h:480
IfxCpu_Irq.h
This file contains the APIs for Interrupt related functions.
IfxSent_Sent_ChannelConfig::nibbleControl
IfxSent_Sent_NibbleControl nibbleControl
Specifies the received nibbles control properties.
Definition: IfxSent_Sent.h:550
IfxSent_ChannelId
IfxSent_ChannelId
Specifies the channel Id.
Definition: IfxSent_cfg.h:85
IfxSent_Sent_Interrupt::isrProvider
IfxSrc_Tos isrProvider
Specifies the interrupt service provider. CPU or DMA.
Definition: IfxSent_Sent.h:452
IfxSent_Sent_ChannelConfig::interrupt
IfxSent_Sent_Interrupt interrupt
Specifies the interrupt control properties structure.
Definition: IfxSent_Sent.h:551
IfxSent_Sent_Pins
Specifies the pins configuration for SENT channel.
Definition: IfxSent_Sent.h:485
IfxSent_Sent_NibbleControl
Specifies the received nibbles control properties.
Definition: IfxSent_Sent.h:471
IfxSent_Sent_InputOutputControl::glitchFallingCleared
boolean glitchFallingCleared
Specifies the glitch falling edge clear.
Definition: IfxSent_Sent.h:440
IfxSent_TimeBase
IfxSent_TimeBase
SENT.CH[channelId].SCR.BASE, Specifies selection of pulse based on time.
Definition: IfxSent.h:241
IfxSent_Sent_Enable::transferDataInterrupt
uint8 transferDataInterrupt
Specifies transfer data interrupt enable.
Definition: IfxSent_Sent.h:401
IfxSent_Sent_ReceiveControl::statusNibbleEnabled
boolean statusNibbleEnabled
Specifies the status nibble to include in CRC.
Definition: IfxSent_Sent.h:503
IfxSent_Sent_initChannel
IFX_EXTERN boolean IfxSent_Sent_initChannel(IfxSent_Sent_Channel *channel, const IfxSent_Sent_ChannelConfig *config)
Initialize the channel with the supplied configuration.
Definition: IfxSent_Sent.c:65
IfxSent_Sent_Enable::nibblesValueOutOfRangeErrorInterrupt
uint8 nibblesValueOutOfRangeErrorInterrupt
Specifies nibble value out of range error interrupt enable.
Definition: IfxSent_Sent.h:408
IfxSent_Sent_NibbleControl::nibblePointer4
IfxSent_Nibble nibblePointer4
Specifies the received nibble4 control.
Definition: IfxSent_Sent.h:477
IfxSent_Sent_Frame::statusNibble
uint8 statusNibble
Contains the status and communication Nibble of last received frame.
Definition: IfxSent_Sent.h:571
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxSent_Sent_InputOutputControl::inputPulsePolarityHigh
boolean inputPulsePolarityHigh
Specifies the polarity of input of each channel.
Definition: IfxSent_Sent.h:437
IfxSent_Sent_initModule
IFX_EXTERN boolean IfxSent_Sent_initModule(IfxSent_Sent *driver, const IfxSent_Sent_Config *config)
Initialise the SENT with the supplied configureation.
Definition: IfxSent_Sent.c:285
IfxSent_Sent_ReceiveControl::extendedSerialFrameMode
IfxSent_ExtendedSerialFrameMode extendedSerialFrameMode
Specifies the extended serial frame mode.
Definition: IfxSent_Sent.h:509


iLLD_TC38A: IfxSent_cfg.c Source File

  • _Impl
IfxSent_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxSent_cfg.c
3 * \brief SENT on-chip implementation data
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 *
43 */
44
45 /******************************************************************************/
46 /*----------------------------------Includes----------------------------------*/
47 /******************************************************************************/
48
49 #include "IfxSent_cfg.h"
IfxSent_cfg.h
SENT on-chip implementation data.


iLLD_TC38A: IfxSent_cfg.h Source File

  • _Impl
IfxSent_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxSent_cfg.h
3 * \brief SENT on-chip implementation data
4 * \ingroup IfxLld_Sent
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 *
43 *
44 * \defgroup IfxLld_Sent SENT
45 * \ingroup IfxLld
46 * \defgroup IfxLld_Sent_Impl Implementation
47 * \ingroup IfxLld_Sent
48 * \defgroup IfxLld_Sent_Std Standard Driver
49 * \ingroup IfxLld_Sent
50 */
51
52 #ifndef IFXSENT_CFG_H
53 #define IFXSENT_CFG_H 1
54
55 /******************************************************************************/
56 /*----------------------------------Includes----------------------------------*/
57 /******************************************************************************/
58
59 /******************************************************************************/
60 /*-----------------------------------Macros-----------------------------------*/
61 /******************************************************************************/
62
63 /** \brief Specifies all interrupt events
64 */
65 #define IFXSENT_CFG_CHANNEL_INTEN (0x1FEDU)
66
67 /** \brief Specifies the step range for calculating module clock
68 */
69 #define IFXSENT_CFG_STEP_RANGE (1024)
70
71 /** \brief Specifies timeout value in transmission
72 */
73 #define IFXSENT_CFG_TIMEOUT_VALUE ((uint16)0xFFFFU)
74
75 #define IFXSENT_NUM_CHANNELS (25)
76
77 #define IFXSENT_NUM_MODULES (1)
78
79 /******************************************************************************/
80 /*-------------------------------Enumerations---------------------------------*/
81 /******************************************************************************/
82
83 /** \brief Specifies the channel Id
84 */
85 typedef enum
86 {
87 IfxSent_ChannelId_0 = 0, /**< \brief Specifies the channel Id 0 */
88 IfxSent_ChannelId_1 = 1, /**< \brief Specifies the channel Id 1 */
89 IfxSent_ChannelId_2 = 2, /**< \brief Specifies the channel Id 2 */
90 IfxSent_ChannelId_3 = 3, /**< \brief Specifies the channel Id 3 */
91 IfxSent_ChannelId_4 = 4, /**< \brief Specifies the channel Id 4 */
92 IfxSent_ChannelId_5 = 5, /**< \brief Specifies the channel Id 5 */
93 IfxSent_ChannelId_6 = 6, /**< \brief Specifies the channel Id 6 */
94 IfxSent_ChannelId_7 = 7, /**< \brief Specifies the channel Id 7 */
95 IfxSent_ChannelId_8 = 8, /**< \brief Specifies the channel Id 8 */
96 IfxSent_ChannelId_9 = 9, /**< \brief Specifies the channel Id 9 */
97 IfxSent_ChannelId_10 = 10, /**< \brief Specifies the channel Id 10 */
98 IfxSent_ChannelId_11 = 11, /**< \brief Specifies the channel Id 11 */
99 IfxSent_ChannelId_12 = 12, /**< \brief Specifies the channel Id 12 */
100 IfxSent_ChannelId_13 = 13, /**< \brief Specifies the channel Id 13 */
101 IfxSent_ChannelId_14 = 14, /**< \brief Specifies the channel Id 14 */
102 IfxSent_ChannelId_15 = 15, /**< \brief Specifies the channel Id 15 */
103 IfxSent_ChannelId_16 = 16, /**< \brief Specifies the channel Id 16 */
104 IfxSent_ChannelId_17 = 17, /**< \brief Specifies the channel Id 17 */
105 IfxSent_ChannelId_18 = 18, /**< \brief Specifies the channel ID 18 */
106 IfxSent_ChannelId_19 = 19, /**< \brief Specifies the Channel ID 19 */
107 IfxSent_ChannelId_20 = 20, /**< \brief Specifies the Channel ID 20 */
108 IfxSent_ChannelId_21 = 21, /**< \brief Specifies the Channel ID 21 */
109 IfxSent_ChannelId_22 = 22, /**< \brief Specifies the Channel ID 22 */
110 IfxSent_ChannelId_23 = 23, /**< \brief Specifies the Channel ID 23 */
111 IfxSent_ChannelId_24 = 24, /**< \brief Specifies the Channel ID 24 */
112 IfxSent_ChannelId_none = -1 /**< \brief None Sent channels */
113 } IfxSent_ChannelId;
114
115 #endif /* IFXSENT_CFG_H */
IfxSent_ChannelId_0
Specifies the channel Id 0.
Definition: IfxSent_cfg.h:87
IfxSent_ChannelId_4
Specifies the channel Id 4.
Definition: IfxSent_cfg.h:91
IfxSent_ChannelId_9
Specifies the channel Id 9.
Definition: IfxSent_cfg.h:96
IfxSent_ChannelId_12
Specifies the channel Id 12.
Definition: IfxSent_cfg.h:99
IfxSent_ChannelId_22
Specifies the Channel ID 22.
Definition: IfxSent_cfg.h:109
IfxSent_ChannelId_24
Specifies the Channel ID 24.
Definition: IfxSent_cfg.h:111
IfxSent_ChannelId_5
Specifies the channel Id 5.
Definition: IfxSent_cfg.h:92
IfxSent_ChannelId_7
Specifies the channel Id 7.
Definition: IfxSent_cfg.h:94
IfxSent_ChannelId_2
Specifies the channel Id 2.
Definition: IfxSent_cfg.h:89
IfxSent_ChannelId_23
Specifies the Channel ID 23.
Definition: IfxSent_cfg.h:110
IfxSent_ChannelId_19
Specifies the Channel ID 19.
Definition: IfxSent_cfg.h:106
IfxSent_ChannelId_18
Specifies the channel ID 18.
Definition: IfxSent_cfg.h:105
IfxSent_ChannelId_20
Specifies the Channel ID 20.
Definition: IfxSent_cfg.h:107
IfxSent_ChannelId_17
Specifies the channel Id 17.
Definition: IfxSent_cfg.h:104
IfxSent_ChannelId_1
Specifies the channel Id 1.
Definition: IfxSent_cfg.h:88
IfxSent_ChannelId_10
Specifies the channel Id 10.
Definition: IfxSent_cfg.h:97
IfxSent_ChannelId_15
Specifies the channel Id 15.
Definition: IfxSent_cfg.h:102
IfxSent_ChannelId_none
None Sent channels.
Definition: IfxSent_cfg.h:112
IfxSent_ChannelId_16
Specifies the channel Id 16.
Definition: IfxSent_cfg.h:103
IfxSent_ChannelId_11
Specifies the channel Id 11.
Definition: IfxSent_cfg.h:98
IfxSent_ChannelId_6
Specifies the channel Id 6.
Definition: IfxSent_cfg.h:93
IfxSent_ChannelId
IfxSent_ChannelId
Specifies the channel Id.
Definition: IfxSent_cfg.h:85
IfxSent_ChannelId_21
Specifies the Channel ID 21.
Definition: IfxSent_cfg.h:108
IfxSent_ChannelId_3
Specifies the channel Id 3.
Definition: IfxSent_cfg.h:90
IfxSent_ChannelId_8
Specifies the channel Id 8.
Definition: IfxSent_cfg.h:95
IfxSent_ChannelId_13
Specifies the channel Id 13.
Definition: IfxSent_cfg.h:100
IfxSent_ChannelId_14
Specifies the channel Id 14.
Definition: IfxSent_cfg.h:101


iLLD_TC38A: IfxSmu.c Source File

  • Smu
  • Std
IfxSmu.c
Go to the documentation of this file.
1 /**
2 * \file IfxSmu.c
3 * \brief SMU basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxSmu.h"
47
48 /******************************************************************************/
49 /*-------------------------Function Implementations---------------------------*/
50 /******************************************************************************/
51
52 boolean IfxSmu_activateFSP(void)
53 {
54 /* Activate FSP by Writing SMU_ActivateFSP(0) in CMD register */
55 MODULE_SMU.CMD.U = IfxSmu_Command_activateFSP;
56
57 /* Check if Activate FSP command is successfully accepted */
58 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (MODULE_SMU.STS.B.RES == 0));
59
60 return MODULE_SMU.STS.B.RES;
61 }
62
63
64 boolean IfxSmu_activateRunState(void)
65 {
66 /* Check if SMU is in START state */
67 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (MODULE_SMU.DBG.B.SSM == IfxSmu_SmuState_start));
68 /* Write CMD for RUN */
69 MODULE_SMU.CMD.U = IfxSmu_Command_start;
70
71 return MODULE_SMU.STS.B.RES;
72 }
73
74
75 boolean IfxSmu_clearAlarmStatus(IfxSmu_Alarm alarm)
76 {
77 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
78 uint16 alarmGroup = (int)alarm / 32;
79 uint8 alarmPos = (int)alarm % 32;
80
81 /* Write SMU_ASCE(0) in CMD register */
82 MODULE_SMU.CMD.U = IfxSmu_Command_alarmStatusClear;
83
84 /* disable the write-protection for registers */
85 IfxScuWdt_clearSafetyEndinit(passwd);
86
87 /* Write 1 in AG bit to clear alarm */
88 MODULE_SMU.AG[alarmGroup].U =
89 (uint32)((uint32)0x1U << alarmPos);
90
91 /* Restore back the write-protection for registers */
92 IfxScuWdt_setSafetyEndinit(passwd);
93
94 return MODULE_SMU.STS.B.RES;
95 }
96
97
98 void IfxSmu_configAlarmActionPES(uint8 pesAction)
99 {
100 uint16 passwd;
101
102 {
103 passwd = IfxScuWdt_getSafetyWatchdogPassword();
104 /* disable the write-protection for registers */
105 IfxScuWdt_clearSafetyEndinit(passwd);
106
107 /*
108 * Port Emergency Stop: enables control of the Port Emergency Stop (PES) feature
109 * independently for each internal action. When an action is triggered and if the
110 * corresponding bit (as defined below) is set, the hardware triggers
111 * automatically a port emergency stop request. Each bit of PES is allocated to
112 * an action as follows:
113 * 1H SMU_IGCS0 activates PES
114 * 2H SMU_IGCS1 activates PES
115 * 4H SMU_IGCS2 activates PES
116 * 8H SMU_NMI activates PES
117 * 10H SMU_CPU_RESET activates PES
118 */
119 MODULE_SMU.AGC.B.PES = pesAction;
120
121 /* Restore back the write-protection for registers */
122 IfxScuWdt_setSafetyEndinit(passwd);
123 }
124 }
125
126
127 void IfxSmu_enableFaultToRunState(boolean enable)
128 {
129 uint16 passwd;
130
131 {
132 passwd = IfxScuWdt_getSafetyWatchdogPassword();
133 /* disable the write-protection for registers */
134 IfxScuWdt_clearSafetyEndinit(passwd);
135
136 /*Enable FAULT to RUN State Transition in Alarm Global Configuration . */
137 MODULE_SMU.AGC.B.EFRST = enable;
138
139 /* Restore back the write-protection for registers */
140 IfxScuWdt_setSafetyEndinit(passwd);
141 }
142 }
143
144
145 void IfxSmu_enablePortEmergencyStop(boolean enable)
146 {
147 uint16 passwd;
148
149 {
150 passwd = IfxScuWdt_getSafetyWatchdogPassword();
151 /* disable the write-protection for registers */
152 IfxScuWdt_clearSafetyEndinit(passwd);
153
154 /*Configure FSP (fault Signalling Protocol) Port Emergency Stop. */
155 MODULE_SMU.FSP.B.PES = enable;
156
157 /* Restore back the write-protection for registers */
158 IfxScuWdt_setSafetyEndinit(passwd);
159 }
160 }
161
162
163 boolean IfxSmu_getAlarmAction(IfxSmu_Alarm alarm, IfxSmu_InternalAlarmAction *intAlarmAction)
164 {
165 uint16 alarmGroup = (int)alarm / 32;
166 uint8 alarmPos = (int)alarm % 32;
167 boolean alarmFSPAction;
168 /* Read Alarm configuration from SMU alarm CFx (x=0-2) registers
169 * and align them to combine to get 3 bit value
170 */
171 *intAlarmAction = (IfxSmu_InternalAlarmAction)(MODULE_SMU.AGCF[alarmGroup][0].U |
172 MODULE_SMU.AGCF[alarmGroup][1].U << 1 |
173 MODULE_SMU.AGCF[alarmGroup][2].U << 2);
174
175 /* Assign the FSP action configured to out parameter */
176 alarmFSPAction = (MODULE_SMU.AGFSP[alarmGroup].U >> alarmPos);
177 return alarmFSPAction;
178 }
179
180
181 uint32 IfxSmu_getAlarmGroupDebugStatus(uint8 alarmGroup)
182 {
183 uint32 alarmStatus;
184 /*
185 * Read the alarm status from SMU_ADx (x: 0..6) register
186 */
187 alarmStatus = MODULE_SMU.AD[alarmGroup].U;
188 return alarmStatus;
189 }
190
191
192 boolean IfxSmu_getAlarmStatus(IfxSmu_Alarm alarm)
193 {
194 uint16 alarmGroup = (int)alarm / 32;
195 uint8 alarmPos = (int)alarm % 32;
196 /* Read Alarm status */
197 boolean alarmStatus = (boolean)((MODULE_SMU.AG[alarmGroup].U >> alarmPos) & 0x1);
198
199 return alarmStatus;
200 }
201
202
203 boolean IfxSmu_getRTMissedEvent(uint8 timerNum)
204 {
205 boolean timerMissEvent = 0;
206
207 switch (timerNum)
208 {
209 case 0:
210 timerMissEvent = MODULE_SMU.STS.B.RTME0;
211 break;
212 case 1:
213 timerMissEvent = MODULE_SMU.STS.B.RTME1;
214 break;
215 default:
216 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
217 break;
218 }
219
220 return timerMissEvent;
221 }
222
223
224 IfxSmu_SmuState IfxSmu_getSmuState(void)
225 {
226 /* Return SMU state read from DBG register */
227 return (IfxSmu_SmuState)(MODULE_SMU.DBG.B.SSM);
228 }
229
230
231 void IfxSmu_lockConfigRegisters(void)
232 {
233 uint16 passwd;
234
235 /* Check if SMU cfg registers is not locked */
236 if (MODULE_SMU.KEYS.B.PERLCK != 0xFFU)
237 {
238 passwd = IfxScuWdt_getSafetyWatchdogPassword();
239 /* disable the write-protection for registers */
240 IfxScuWdt_clearSafetyEndinit(passwd);
241
242 /* Write the key reg to lock config registers */
243 MODULE_SMU.KEYS.B.PERLCK = 0xFFU;
244
245 /* Restore back the write-protection for registers */
246 IfxScuWdt_setSafetyEndinit(passwd);
247 }
248 }
249
250
251 boolean IfxSmu_releaseFSP(void)
252 {
253 /* Check if SMU is in FAULT state and EFRST is enabled*/
254 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (IfxSmu_getSmuState() != IfxSmu_SmuState_fault) || (MODULE_SMU.AGC.B.EFRST != 0));
255
256 /* SMU is in START state or (FAULT state with EFRST enabled) */
257 /* Release FSP to Fault Free state */
258 MODULE_SMU.CMD.U = IfxSmu_Command_releaseFSP;
259
260 /* Check if Release FSP command is accepted by reading the Status reg
261 */
262 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (MODULE_SMU.STS.B.RES == 0));
263
264 return MODULE_SMU.STS.B.RES;
265 }
266
267
268 void IfxSmu_setAlarmAction(IfxSmu_Alarm alarm, IfxSmu_InternalAlarmAction intAlarmAction)
269 {
270 uint32 alarmGroupCF2;
271 uint32 alarmGroupCF1;
272 uint32 alarmGroupCF0;
273 uint32 alarmGroupCFMask;
274 uint16 alarmGroup = (int)alarm / 32;
275 uint8 alarmPos = (int)alarm % 32;
276 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
277
278 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (MODULE_SMU.KEYS.B.PERLCK != 0xFFU));
279
280 /* Get the mask for configuration registers to set the perticular
281 * bits
282 */
283 alarmGroupCFMask = ~((uint32)0x1U << alarmPos);
284
285 /* Extract Alarm configuration for 3 CFG registers
286 * from input parameter
287 */
288 alarmGroupCF0 = (intAlarmAction & 0x01) << alarmPos;
289 alarmGroupCF1 = ((intAlarmAction >> 1) & 0x01) << alarmPos;
290 alarmGroupCF2 = ((intAlarmAction >> 2) & 0x01) << alarmPos;
291
292 /* disable the write-protection for registers */
293 IfxScuWdt_clearSafetyEndinit(passwd);
294
295 /*Write Config key to configure the SMU registers. */
296 MODULE_SMU.KEYS.U = (uint32)0x000000bc;
297
298 /* Write Alarm configuration into corresponding
299 * SMU alarm CFx (x=0-2) registers
300 */
301 MODULE_SMU.AGCF[alarmGroup][0].U = (MODULE_SMU.AGCF[alarmGroup][0].U & alarmGroupCFMask) | alarmGroupCF0;
302 MODULE_SMU.AGCF[alarmGroup][1].U = (MODULE_SMU.AGCF[alarmGroup][1].U & alarmGroupCFMask) | alarmGroupCF1;
303 MODULE_SMU.AGCF[alarmGroup][2].U = (MODULE_SMU.AGCF[alarmGroup][2].U & alarmGroupCFMask) | alarmGroupCF2;
304 /* After configuration set temporary lock of SMU configuration */
305 MODULE_SMU.KEYS.U = 0;
306
307 /* Restore back the write-protection for registers */
308 IfxScuWdt_setSafetyEndinit(passwd);
309 }
310
311
312 boolean IfxSmu_setAlarmStatus(IfxSmu_Alarm alarm)
313 {
314 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
315 uint16 alarmGroup = (int)alarm / 32;
316 uint8 alarmPos = (int)alarm % 32;
317 IfxSmu_SmuState smuState;
318 boolean status = 0U;
319
320 /* Read the SMU state from module DBG register */
321 smuState = (IfxSmu_SmuState)(MODULE_SMU.DBG.B.SSM);
322
323 if (smuState == IfxSmu_SmuState_start)
324 {
325 /* SMU is in START state */
326 /* All SMU Groups are allowed to set alarm status */
327
328 /* disable the write-protection for registers */
329 IfxScuWdt_clearSafetyEndinit(passwd);
330
331 /* Write 1 in AG bit to set alarm */
332 MODULE_SMU.AG[alarmGroup].U =
333 ((uint32)0x1U << alarmPos);
334 /* Restore back the write-protection for registers */
335 IfxScuWdt_setSafetyEndinit(passwd);
336 }
337 else /* Alarm is in RUN state or FAULT state */
338 {
339 /* SW Alarm Group/s are only allowed to set alarm status */
340 /* Write SMU_ALARM(ARG), where ARG:alarmPos in CMD register to set the Alarm */
341 Ifx_SMU_CMD cmdSfr;
342 cmdSfr.U = MODULE_SMU.CMD.U;
343 cmdSfr.B.CMD = IfxSmu_Command_triggerAlarm;
344 cmdSfr.B.ARG = alarmPos;
345 MODULE_SMU.CMD.U = cmdSfr.U;
346 status = MODULE_SMU.STS.B.RES;
347 }
348
349 return status;
350 }
351
352
353 void IfxSmu_setFspMode(IfxSmu_FspMode mode)
354 {
355 uint16 passwd;
356 {
357 passwd = IfxScuWdt_getSafetyWatchdogPassword();
358 /* disable the write-protection for registers */
359 IfxScuWdt_clearSafetyEndinit(passwd);
360
361 /*Write Config key to configure the SMU registers. */
362 MODULE_SMU.FSP.B.MODE = mode;
363
364 /* Restore back the write-protection for registers */
365 IfxScuWdt_setSafetyEndinit(passwd);
366 }
367 }
368
369
370 boolean IfxSmu_stopRT(uint8 timerNum)
371 {
372 /* Write CMD for Stop Recovery Timer */
373 Ifx_SMU_CMD cmdSfr;
374 cmdSfr.U = MODULE_SMU.CMD.U;
375 cmdSfr.B.CMD = IfxSmu_Command_stopRT;
376 cmdSfr.B.ARG = timerNum;
377 MODULE_SMU.CMD.U = cmdSfr.U;
378
379 return MODULE_SMU.STS.B.RES;
380 }
381
382
383 boolean IfxSmu_unlockConfigRegisters(void)
384 {
385 uint16 passwd;
386 boolean status = 1U;
387
388 /* Check if SMU cfg registers is not locked */
389 if (MODULE_SMU.KEYS.B.PERLCK != 0xFFU)
390 {
391 passwd = IfxScuWdt_getSafetyWatchdogPassword();
392 /* disable the write-protection for registers */
393 IfxScuWdt_clearSafetyEndinit(passwd);
394
395 /*Write Config key to configure the SMU registers. */
396 MODULE_SMU.KEYS.U = (uint32)0x000000bc;
397
398 /* Restore back the write-protection for registers */
399 IfxScuWdt_setSafetyEndinit(passwd);
400 }
401 else
402 {
403 /* If SMU config is permanently locked then return false */
404 status = 0U;
405 }
406
407 return status;
408 }
409
410
411 void IfxSmu_ConfigureInterruptGeneration(IfxSmu_InterruptGenerationConfiguration config, IfxSmu_InterruptRequest intRequest)
412 {
413 uint16 passwd;
414 uint8 shift = 0, value = 0;
415 uint32 mask = 0;
416 Ifx_SMU_AGC agc;
417
418 agc.U = MODULE_SMU.AGC.U;
419 shift = (config << 2);
420 value = (1 << intRequest);
421 mask = ~(7 << shift);
422
423 passwd = IfxScuWdt_getSafetyWatchdogPassword();
424
425 /* disable the write-protection for registers */
426 IfxScuWdt_clearSafetyEndinit(passwd);
427
428 /*Write Config key to configure the SMU registers. */
429 MODULE_SMU.KEYS.U = (uint32)0x000000bc;
430
431 /* Clear the specific bits */
432 agc.U &= mask;
433
434 /* Write into the specific bits */
435 agc.U |= ((value) << (shift));
436
437 MODULE_SMU.AGC.U = agc.U;
438
439 MODULE_SMU.KEYS.U = 0x0U;
440
441 /* Restore back the write-protection for registers */
442 IfxScuWdt_setSafetyEndinit(passwd);
443 }
444
445
446 void IfxSmu_temporaryLockConfigRegisters(void)
447 {
448 uint16 passwd;
449
450 {
451 passwd = IfxScuWdt_getSafetyWatchdogPassword();
452 /* disable the write-protection for registers */
453 IfxScuWdt_clearSafetyEndinit(passwd);
454
455 /*Write Config key to configure temporary lock of the SMU registers. */
456 MODULE_SMU.KEYS.U = 0U;
457
458 /* Restore back the write-protection for registers */
459 IfxScuWdt_setSafetyEndinit(passwd);
460 }
461 }
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxSmu_stopRT
boolean IfxSmu_stopRT(uint8 timerNum)
The API stops the requested recovery timer unit.
Definition: IfxSmu.c:370
IfxSmu_unlockConfigRegisters
boolean IfxSmu_unlockConfigRegisters(void)
The function unlocks the SMU configuration registers for modification.
Definition: IfxSmu.c:383
IfxSmu_Command_start
Forces the SSM to go to the RUN state from the START state.
Definition: IfxSmu.h:82
IfxSmu_clearAlarmStatus
boolean IfxSmu_clearAlarmStatus(IfxSmu_Alarm alarm)
This function clears SMU alarm status of the requested alarm. It needs to be called after alarm statu...
Definition: IfxSmu.c:75
IfxSmu_lockConfigRegisters
void IfxSmu_lockConfigRegisters(void)
The function locks the SMU configuration registers to prevent any modification to configuration regis...
Definition: IfxSmu.c:231
IfxSmu_SmuState
IfxSmu_SmuState
Running state of the SMU State Machine.
Definition: IfxSmu.h:174
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxSmu_configAlarmActionPES
void IfxSmu_configAlarmActionPES(uint8 pesAction)
This function configures the PES feature for internal action. Bit0/1/2/3 - SMU_IGCS0/SMU_IGCS1/SMU_IG...
Definition: IfxSmu.c:98
IfxSmu_setFspMode
void IfxSmu_setFspMode(IfxSmu_FspMode mode)
Configure FSP (fault Signalling Protocol) mode.
Definition: IfxSmu.c:353
IfxSmu_getRTMissedEvent
boolean IfxSmu_getRTMissedEvent(uint8 timerNum)
The function returns if any alarms requiring the requested recovery timer was SET while the recovery ...
Definition: IfxSmu.c:203
IfxSmu_getSmuState
IfxSmu_SmuState IfxSmu_getSmuState(void)
The function provides the current state of the SMU.
Definition: IfxSmu.c:224
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxSmu_activateFSP
boolean IfxSmu_activateFSP(void)
This function activates the FSP to indicate a FAULT state on the error pin to the safe state switchin...
Definition: IfxSmu.c:52
IfxScuWdt_clearSafetyEndinit
void IfxScuWdt_clearSafetyEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:305
IfxSmu_Command_activateFSP
Activates the Fault Signaling Protocol.
Definition: IfxSmu.h:83
IfxSmu_releaseFSP
boolean IfxSmu_releaseFSP(void)
The function switches the SMU peripheral from the FAULT state to the RUN state.
Definition: IfxSmu.c:251
IfxSmu_Command_stopRT
Stop the recovery Timer.
Definition: IfxSmu.h:86
IfxSmu.h
SMU basic functionality.
IfxSmu_FspMode
IfxSmu_FspMode
Fault Signaling Protocol configuration.
Definition: IfxSmu.h:94
IfxSmu_activateRunState
boolean IfxSmu_activateRunState(void)
The function allows to switch the SMU peripheral into the RUN fault-free state as requested by the ca...
Definition: IfxSmu.c:64
IfxSmu_temporaryLockConfigRegisters
void IfxSmu_temporaryLockConfigRegisters(void)
The function temporarily locks the SMU configuration registers for modification.
Definition: IfxSmu.c:446
IfxSmu_setAlarmAction
void IfxSmu_setAlarmAction(IfxSmu_Alarm alarm, IfxSmu_InternalAlarmAction intAlarmAction)
The function sets the alarm action for the desired alarm.
Definition: IfxSmu.c:268
IfxSmu_enableFaultToRunState
void IfxSmu_enableFaultToRunState(boolean enable)
Enable FAULT to RUN State Transition.
Definition: IfxSmu.c:127
IfxSmu_ConfigureInterruptGeneration
void IfxSmu_ConfigureInterruptGeneration(IfxSmu_InterruptGenerationConfiguration config, IfxSmu_InterruptRequest intRequest)
Configures The Interrupt Generation.
Definition: IfxSmu.c:411
boolean
unsigned char boolean
Definition: Platform_Types.h:104
IfxSmu_Command_triggerAlarm
Triggers a software based alarm.
Definition: IfxSmu.h:88
IfxSmu_Command_releaseFSP
Turns the FSP into the inactive fault free state.
Definition: IfxSmu.h:84
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxScuWdt_setSafetyEndinit
void IfxScuWdt_setSafetyEndinit(uint16 password)
SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:668
IfxScuWdt_getSafetyWatchdogPassword
uint16 IfxScuWdt_getSafetyWatchdogPassword(void)
SCUWDT API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.c:393
IfxSmu_InternalAlarmAction
IfxSmu_InternalAlarmAction
Definition: IfxSmu.h:125
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
enable
void enable
Definition: IfxCpu_IntrinsicsDcc.h:477
IfxSmu_setAlarmStatus
boolean IfxSmu_setAlarmStatus(IfxSmu_Alarm alarm)
The API sets the requested alarm. This function can be used by the user software to trigger SW SMU al...
Definition: IfxSmu.c:312
IfxSmu_InterruptRequest
IfxSmu_InterruptRequest
Interrupt Request.
Definition: IfxSmu.h:147
IfxSmu_enablePortEmergencyStop
void IfxSmu_enablePortEmergencyStop(boolean enable)
Configure FSP (fault Signalling Protocol) Port Emergency Stop.
Definition: IfxSmu.c:145
IfxSmu_Alarm
IfxSmu_Alarm
SMU Alarms.
Definition: IfxSmu_cfg.h:76
IfxSmu_SmuState_fault
FAULT State.
Definition: IfxSmu.h:178
IfxSmu_InterruptGenerationConfiguration
IfxSmu_InterruptGenerationConfiguration
Interrupt Generation Configuration.
Definition: IfxSmu.h:138
IfxSmu_getAlarmGroupDebugStatus
uint32 IfxSmu_getAlarmGroupDebugStatus(uint8 alarmGroup)
The function provides the alarm group status from the stored debug registers.
Definition: IfxSmu.c:181
IfxSmu_Command_alarmStatusClear
Alarm Status Clear Enable Command.
Definition: IfxSmu.h:87
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxSmu_SmuState_start
START state.
Definition: IfxSmu.h:176
IfxSmu_getAlarmAction
boolean IfxSmu_getAlarmAction(IfxSmu_Alarm alarm, IfxSmu_InternalAlarmAction *intAlarmAction)
The function provides the FSP action currently configured for the requested alarm.
Definition: IfxSmu.c:163
IfxSmu_getAlarmStatus
boolean IfxSmu_getAlarmStatus(IfxSmu_Alarm alarm)
The function returns the alarm status of requested alarm.
Definition: IfxSmu.c:192


iLLD_TC38A: IfxSmu.h Source File

  • Smu
  • Std
IfxSmu.h
Go to the documentation of this file.
1 /**
2 * \file IfxSmu.h
3 * \brief SMU basic functionality
4 * \ingroup IfxLld_Smu
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Smu_Std_Enumerations Enumerations
42 * \ingroup IfxLld_Smu_Std
43 * \defgroup IfxLld_Smu_Std_ModuleFunctions Module Functions
44 * \ingroup IfxLld_Smu_Std
45 */
46
47 #ifndef IFXSMU_H
48 #define IFXSMU_H 1
49
50 /******************************************************************************/
51 /*----------------------------------Includes----------------------------------*/
52 /******************************************************************************/
53
54 #include "_Impl/IfxSmu_cfg.h"
55 #include "IfxSmu_reg.h"
56 #include "Scu/Std/IfxScuWdt.h"
57 #include "_Utilities/Ifx_Assert.h"
58 #include "IfxSrc_reg.h"
59
60 /******************************************************************************/
61 /*-----------------------------------Macros-----------------------------------*/
62 /******************************************************************************/
63
64 /** \brief Argument to start Alive test
65 */
66 #define IFXSMU_START_ALIVE_TEST_ARG (5)
67
68 /** \brief Argument to stop Alive test
69 */
70 #define IFXSMU_STOP_ALIVE_TEST_ARG (0xA)
71
72 /******************************************************************************/
73 /*--------------------------------Enumerations--------------------------------*/
74 /******************************************************************************/
75
76 /** \addtogroup IfxLld_Smu_Std_Enumerations
77 * \{ */
78 /** \brief Command interface
79 */
80 typedef enum
81 {
82 IfxSmu_Command_start = 0, /**< \brief Forces the SSM to go to the RUN state from the START state */
83 IfxSmu_Command_activateFSP = 1, /**< \brief Activates the Fault Signaling Protocol. */
84 IfxSmu_Command_releaseFSP = 2, /**< \brief Turns the FSP into the inactive fault free state */
85 IfxSmu_Command_activatePES = 3, /**< \brief Triggers the activation of the Port Emergency Stop (PES). */
86 IfxSmu_Command_stopRT = 4, /**< \brief Stop the recovery Timer. */
87 IfxSmu_Command_alarmStatusClear = 5, /**< \brief Alarm Status Clear Enable Command */
88 IfxSmu_Command_triggerAlarm = 6, /**< \brief Triggers a software based alarm */
89 IfxSmu_Command_aliveTest = 7 /**< \brief Triggers a SMU alive alarm */
90 } IfxSmu_Command;
91
92 /** \brief Fault Signaling Protocol configuration
93 */
94 typedef enum
95 {
96 IfxSmu_FspMode_BiStableProtocol = 0, /**< \brief Bi-stable protocol */
97 IfxSmu_FspMode_dualRailProtocol = 1, /**< \brief dualRailProtocol */
98 IfxSmu_FspMode_TimeSwitchingProtocol = 2 /**< \brief Time switching protocol */
99 } IfxSmu_FspMode;
100
101 /** \brief Dividing factor to apply to the reference clock fBACK. The divided clock is used as reference to generate the timing of the fault signaling protocol fault state.
102 */
103 typedef enum
104 {
105 IfxSmu_FspPrescalar1_referenceClockDiv2 = 0, /**< \brief FSMU_FS = reference clock frequency divided by 2 */
106 IfxSmu_FspPrescalar1_referenceClockDiv4 = 1, /**< \brief FSMU_FS = reference clock frequency divided by 4 */
107 IfxSmu_FspPrescalar1_referenceClockDiv8 = 2, /**< \brief FSMU_FS = reference clock frequency divided by 8 */
108 IfxSmu_FspPrescalar1_referenceClockDiv16 = 3, /**< \brief FSMU_FS = reference clock frequency divided by 16 */
109 IfxSmu_FspPrescalar1_referenceClockDiv32 = 4, /**< \brief FSMU_FS = reference clock frequency divided by 32 */
110 IfxSmu_FspPrescalar1_referenceClockDiv64 = 5, /**< \brief FSMU_FS = reference clock frequency divided by 64 */
111 IfxSmu_FspPrescalar1_referenceClockDiv128 = 6, /**< \brief FSMU_FS = reference clock frequency divided by 128 */
112 IfxSmu_FspPrescalar1_referenceClockDiv256 = 7 /**< \brief FSMU_FS = reference clock frequency divided by 256 */
113 } IfxSmu_FspPrescalar1;
114
115 /** \brief Dividing factor to apply to the reference clock fBACK in order to generate the timing of the fault free state for the time switching modes of the fault signaling protocol.
116 */
117 typedef enum
118 {
119 IfxSmu_FspPrescalar2_referenceClockDiv512 = 0, /**< \brief FSMU_FS = reference clock frequency divided by 512 */
120 IfxSmu_FspPrescalar2_referenceClockDiv1024 = 1, /**< \brief FSMU_FS = reference clock frequency divided by 1024 */
121 IfxSmu_FspPrescalar2_referenceClockDiv2048 = 2, /**< \brief FSMU_FS = reference clock frequency divided by 2048 */
122 IfxSmu_FspPrescalar2_referenceClockDiv4096 = 3 /**< \brief FSMU_FS = reference clock frequency divided by 4096 */
123 } IfxSmu_FspPrescalar2;
124
125 typedef enum
126 {
127 IfxSmu_InternalAlarmAction_disabled = 0, /**< \brief Alarm disabled. */
128 IfxSmu_InternalAlarmAction_igcs0 = 2, /**< \brief Sends an interrupt request to the interrupt system according to the IGCS0 */
129 IfxSmu_InternalAlarmAction_igcs1 = 3, /**< \brief Sends an interrupt request to the interrupt system according to the IGCS1 */
130 IfxSmu_InternalAlarmAction_igcs2 = 4, /**< \brief Sends an interrupt request to the interrupt system according to the IGCS2 */
131 IfxSmu_InternalAlarmAction_nmi = 5, /**< \brief Sends an NMI request to the SCU */
132 IfxSmu_InternalAlarmAction_reset = 6, /**< \brief Sends a reset request to the SCU. */
133 IfxSmu_InternalAlarmAction_cpureset = 7 /**< \brief Triggers a CPU reset request using CPU Reset Configuration Set */
134 } IfxSmu_InternalAlarmAction;
135
136 /** \brief Interrupt Generation Configuration
137 */
138 typedef enum
139 {
140 IfxSmu_InterruptGenerationConfiguration_0 = 0, /**< \brief Interrupt Generation Configuration 0 */
141 IfxSmu_InterruptGenerationConfiguration_1, /**< \brief Interrupt Generation Configuration 1 */
142 IfxSmu_InterruptGenerationConfiguration_2 /**< \brief Interrupt Generation Configuration 2 */
143 } IfxSmu_InterruptGenerationConfiguration;
144
145 /** \brief Interrupt Request
146 */
147 typedef enum
148 {
149 IfxSmu_InterruptRequest_0 = 0, /**< \brief Interrupt Request 0 */
150 IfxSmu_InterruptRequest_1, /**< \brief Interrupt Request 1 */
151 IfxSmu_InterruptRequest_2 /**< \brief Interrupt Request 2 */
152 } IfxSmu_InterruptRequest;
153
154 /** \brief Enum for the FSP_DIR output port control direction
155 */
156 typedef enum
157 {
158 IfxSmu_PortControlHwDir_fsp0AndFsp1Input = 0, /**< \brief fsp0InputAndFsp1Input */
159 IfxSmu_PortControlHwDir_fsp0OutputAndFsp1Input = 1, /**< \brief fsp0OutputAndFsp1Input */
160 IfxSmu_PortControlHwDir_fsp0AndFsp1Output = 3 /**< \brief fsp0OutputAndFsp1Input */
161 } IfxSmu_PortControlHwDir;
162
163 /** \brief Enum for the FSP_DIR output port control enable
164 */
165 typedef enum
166 {
167 IfxSmu_PortControlHwEnable_fsp0AndFsp1Disabled = 0, /**< \brief fsp0AndFsp1Disabled */
168 IfxSmu_PortControlHwEnable_fsp0EnabledAndFsp1Disabled = 1, /**< \brief fsp0EnabledAndFsp1Disabled */
169 IfxSmu_PortControlHwEnable_fsp0AndFsp1Enabled = 3 /**< \brief fsp0AndFsp1Enabled */
170 } IfxSmu_PortControlHwEnable;
171
172 /** \brief Running state of the SMU State Machine
173 */
174 typedef enum
175 {
176 IfxSmu_SmuState_start = 0, /**< \brief START state */
177 IfxSmu_SmuState_run = 1, /**< \brief RUN State */
178 IfxSmu_SmuState_fault = 2, /**< \brief FAULT State */
179 IfxSmu_SmuState_unspecified = 3 /**< \brief unspecified State */
180 } IfxSmu_SmuState;
181
182 /** \brief OCDS Suspend Control (OCDS.SUS)
183 */
184 typedef enum
185 {
186 IfxSmu_SuspendMode_none = 0, /**< \brief No suspend */
187 IfxSmu_SuspendMode_hard = 1, /**< \brief Hard Suspend */
188 IfxSmu_SuspendMode_soft = 2 /**< \brief Soft Suspend */
189 } IfxSmu_SuspendMode;
190
191 /** \} */
192
193 /** \brief Alarm Executed Status
194 */
195 typedef enum
196 {
197 IfxSmu_AlarmExecutionStatus_irq0 = 0, /**< \brief IRQ0 Request Status */
198 IfxSmu_AlarmExecutionStatus_irq1 = 1, /**< \brief IRQ1 Request Status */
199 IfxSmu_AlarmExecutionStatus_irq2 = 2, /**< \brief IRQ2 Request Status */
200 IfxSmu_AlarmExecutionStatus_rst0 = 3, /**< \brief RST0 Request Status */
201 IfxSmu_AlarmExecutionStatus_rst1 = 4, /**< \brief RST1 Request Status */
202 IfxSmu_AlarmExecutionStatus_rst2 = 5, /**< \brief RST2 Request Status */
203 IfxSmu_AlarmExecutionStatus_rst3 = 6, /**< \brief RST3 Request Status */
204 IfxSmu_AlarmExecutionStatus_rst4 = 7, /**< \brief RST4 Request Status */
205 IfxSmu_AlarmExecutionStatus_rst5 = 8, /**< \brief RST5 Request Status */
206 IfxSmu_AlarmExecutionStatus_nmi = 9, /**< \brief NMI Request Status */
207 IfxSmu_AlarmExecutionStatus_rst = 10, /**< \brief RST Request Status */
208 IfxSmu_AlarmExecutionStatus_ems = 11, /**< \brief EMS Request Status */
209 IfxSmu_AlarmExecutionStatus_irq0aem = 16, /**< \brief IRQ0 AEM Request Status */
210 IfxSmu_AlarmExecutionStatus_irq1aem = 17, /**< \brief IRQ1 AEM Request Status */
211 IfxSmu_AlarmExecutionStatus_irq2aem = 18, /**< \brief IRQ2 AEM Request Status */
212 IfxSmu_AlarmExecutionStatus_rst0aem = 19, /**< \brief RST0 AEM Request Status */
213 IfxSmu_AlarmExecutionStatus_rst1aem = 20, /**< \brief RST1 AEM Request Status */
214 IfxSmu_AlarmExecutionStatus_rst2aem = 21, /**< \brief RST2 AEM Request Status */
215 IfxSmu_AlarmExecutionStatus_rst3aem = 22, /**< \brief RST3 AEM Request Status */
216 IfxSmu_AlarmExecutionStatus_rst4aem = 23, /**< \brief RST4 AEM Request Status */
217 IfxSmu_AlarmExecutionStatus_rst5aem = 24, /**< \brief RST5 AEM Request Status */
218 IfxSmu_AlarmExecutionStatus_nmiaem = 25, /**< \brief NMI AEM Request Status */
219 IfxSmu_AlarmExecutionStatus_rstaem = 26, /**< \brief RST AEM Request Status */
220 IfxSmu_AlarmExecutionStatus_emsaem = 27 /**< \brief EMS AEM Request Status */
221 } IfxSmu_AlarmExecutionStatus;
222
223 /** \addtogroup IfxLld_Smu_Std_ModuleFunctions
224 * \{ */
225
226 /******************************************************************************/
227 /*-------------------------Inline Function Prototypes-------------------------*/
228 /******************************************************************************/
229
230 /** \brief This function clears SMU alarm exected status of the requested alarm mechanism
231 * \param alarmEx alarm mechanism
232 * \return None
233 */
234 IFX_INLINE void IfxSmu_clearAlarmExecutedStatus(IfxSmu_AlarmExecutionStatus alarmEx);
235
236 /** \brief Function clears the Register monitor test mode enable Flag.
237 *
238 * The RMCTL register needs to be unlocked by using IfxSmu_unlockConfigRegisters() before calling this function.
239 * \param testModeEnable Test Mode Flag
240 * \return None
241 */
242 IFX_INLINE void IfxSmu_clearRegMonTestModeEnable(uint8 testModeEnable);
243
244 /** \brief Function clears the Register Monitor Error Flag (RMEF.EFz).
245 * \param errorFlag Error Flag
246 * \return None
247 */
248 IFX_INLINE void IfxSmu_clearRegisterMonitorErrorFlag(uint8 errorFlag);
249
250 /** \brief Function clears the Register Monitor status register.
251 * \param statusFlag status Flag
252 * \return None
253 */
254 IFX_INLINE void IfxSmu_clearRegisterMonitorStatus(uint8 statusFlag);
255
256 /** \brief The function returns the alarm Executed status of requested alarm mechanism
257 * \param alarmEx alarm mechanism
258 * \return alarm executed status of requested alarm mechanism
259 */
260 IFX_INLINE boolean IfxSmu_getAlarmExecutedStatus(IfxSmu_AlarmExecutionStatus alarmEx);
261
262 /** \brief Function returns the Port control hardware direction.
263 * \return port Conrol HW direction
264 */
265 IFX_INLINE IfxSmu_PortControlHwDir IfxSmu_getPortControlHwDir(void);
266
267 /** \brief Function returns the Port control hardware enable.
268 * \return port Control HW enable
269 */
270 IFX_INLINE IfxSmu_PortControlHwEnable IfxSmu_getPortControlHwEnable(void);
271
272 /** \brief Function returns the value ofRegister Monitor Error Flags register.
273 * \return Returns the Register Monitor Error Flags register value.
274 */
275 IFX_INLINE uint32 IfxSmu_getRegisterMonitorErrorFlag(void);
276
277 /** \brief Function returns the value of Register Monitor Self Test Status register.
278 * \return Returns the Register monitor self Test Status register value.
279 */
280 IFX_INLINE uint32 IfxSmu_getRegisterMonitorStatus(void);
281
282 /** \brief Returns the module's suspend state.
283 * TRUE :if module is suspended.
284 * FALSE:if module is not yet suspended.
285 * \param smu Pointer to SMU module registers
286 * \return Suspend status (TRUE / FALSE)
287 */
288 IFX_INLINE boolean IfxSmu_isModuleSuspended(Ifx_SMU *smu);
289
290 /** \brief Function sets the Port control hardware Enable and direction.
291 *
292 * The PCTL register needs to be unlocked by using IfxSmu_unlockConfigRegisters() before calling this function.
293 * \param portEnable port enable
294 * \param hwDir Hardware direction
295 * \return None
296 */
297 IFX_INLINE void IfxSmu_setPortControlHwEnableAndDir(IfxSmu_PortControlHwEnable portEnable, IfxSmu_PortControlHwDir hwDir);
298
299 /** \brief Function sets the Register monitor test mode enable Flag.
300 *
301 * The RMCTL register needs to be unlocked by using IfxSmu_unlockConfigRegisters() before calling this function.
302 * \param testModeEnable Test Mode Flag
303 * \return None
304 */
305 IFX_INLINE void IfxSmu_setRegMonTestModeEnable(uint8 testModeEnable);
306
307 /** \brief Configure the Module to Hard/Soft suspend mode.
308 * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
309 * \param smu Pointer to SMU module registers
310 * \param mode Module suspend mode
311 * \return None
312 */
313 IFX_INLINE void IfxSmu_setSuspendMode(Ifx_SMU *smu, IfxSmu_SuspendMode mode);
314
315 /** \brief This function starts the SMU alive test
316 * \return None
317 */
318 IFX_INLINE void IfxSmu_startAliveTest(void);
319
320 /** \brief This function Stops the SMU alive test
321 * \return None
322 */
323 IFX_INLINE void IfxSmu_stopAliveTest(void);
324
325 /** \brief This function waits for SMU alarm to be set and then clears it..
326 * \param alarm smu alarm group and position
327 * \return None
328 */
329 IFX_INLINE void IfxSmu_waitForAlarm(IfxSmu_Alarm alarm);
330
331 /** \brief Returns The SRCR pointer for the selected Interrupt
332 * \param intRequest Interrupt Request
333 * \return Pointer to SRCR register
334 */
335 IFX_INLINE volatile Ifx_SRC_SRCR *IfxSmu_getSrcPointer(IfxSmu_InterruptRequest intRequest);
336
337 /******************************************************************************/
338 /*-------------------------Global Function Prototypes-------------------------*/
339 /******************************************************************************/
340
341 /** \brief This function activates the FSP to indicate a FAULT state on the error pin to the safe state switching device.
342 * \return Return 0 if successfull and 1 if failed.
343 */
344 IFX_EXTERN boolean IfxSmu_activateFSP(void);
345
346 /** \brief The function allows to switch the SMU peripheral into the RUN fault-free state as requested by the caller.
347 * \return Return 0 if successfull and 1 if failed.
348 */
349 IFX_EXTERN boolean IfxSmu_activateRunState(void);
350
351 /** \brief This function clears SMU alarm status of the requested alarm. It needs to be called after alarm status is read.
352 * \param alarm smu alarm group and position
353 * \return Return 0 if successfull and 1 if failed.
354 */
355 IFX_EXTERN boolean IfxSmu_clearAlarmStatus(IfxSmu_Alarm alarm);
356
357 /** \brief This function configures the PES feature for internal action.
358 * Bit0/1/2/3 - SMU_IGCS0/SMU_IGCS1/SMU_IGCS2/SMU_NMI/SMU_CPU_RESET activates PES correspondingly.
359 *
360 * The AGC register needs to be unlocked by using IfxSmu_unlockConfigRegisters() before calling this function.
361 * \param pesAction PES action bit0/1/2/3 - SMU_IGCS0/SMU_IGCS1/SMU_IGCS2/SMU_NMI/SMU_CPU_RESET activates PES correspondingly.
362 * \return None
363 */
364 IFX_EXTERN void IfxSmu_configAlarmActionPES(uint8 pesAction);
365
366 /** \brief Enable FAULT to RUN State Transition.
367 *
368 * The AGC register needs to be unlocked by using IfxSmu_unlockConfigRegisters() before calling this function.
369 * \param enable Enable / Disable Fault to Run Transition ( True - Enable, False - Disable)
370 * \return None
371 */
372 IFX_EXTERN void IfxSmu_enableFaultToRunState(boolean enable);
373
374 /** \brief Configure FSP (fault Signalling Protocol) Port Emergency Stop.
375 *
376 * The FSP register needs to be unlocked by using IfxSmu_unlockConfigRegisters() before calling this function.
377 * \param enable Enable / Disable PES ( True - Enable, False - Disable)
378 * \return None
379 */
380 IFX_EXTERN void IfxSmu_enablePortEmergencyStop(boolean enable);
381
382 /** \brief The function provides the FSP action currently configured for the requested alarm.
383 * \param alarm smu alarm group and position
384 * \param intAlarmAction internal alarm action
385 * \return FSP enabled/disabled for the particular alarm
386 */
387 IFX_EXTERN boolean IfxSmu_getAlarmAction(IfxSmu_Alarm alarm, IfxSmu_InternalAlarmAction *intAlarmAction);
388
389 /** \brief The function provides the alarm group status from the stored debug registers
390 * \param alarmGroup smu alarm group
391 * \return alarm group status from the stored debug registers
392 */
393 IFX_EXTERN uint32 IfxSmu_getAlarmGroupDebugStatus(uint8 alarmGroup);
394
395 /** \brief The function returns the alarm status of requested alarm.
396 * \param alarm smu alarm group and position
397 * \return alarm status of requested alarm.
398 */
399 IFX_EXTERN boolean IfxSmu_getAlarmStatus(IfxSmu_Alarm alarm);
400
401 /** \brief The function returns if any alarms requiring the requested recovery timer was SET while the recovery timer was running.
402 * \param timerNum Recovery Timer unit
403 * \return returns status of missed event (0 - no missed event, 1 - missed event)
404 */
405 IFX_EXTERN boolean IfxSmu_getRTMissedEvent(uint8 timerNum);
406
407 /** \brief The function provides the current state of the SMU.
408 * \return return the current state of SMU
409 */
410 IFX_EXTERN IfxSmu_SmuState IfxSmu_getSmuState(void);
411
412 /** \brief The function locks the SMU configuration registers to prevent any modification to configuration register content
413 * \return None
414 */
415 IFX_EXTERN void IfxSmu_lockConfigRegisters(void);
416
417 /** \brief The function switches the SMU peripheral from the FAULT state to the RUN state.
418 * \return Return 0 if successfull and 1 if failed.
419 */
420 IFX_EXTERN boolean IfxSmu_releaseFSP(void);
421
422 /** \brief The function sets the alarm action for the desired alarm.
423 * \param alarm smu alarm group and position
424 * \param intAlarmAction internal alarm action
425 * \return None
426 */
427 IFX_EXTERN void IfxSmu_setAlarmAction(IfxSmu_Alarm alarm, IfxSmu_InternalAlarmAction intAlarmAction);
428
429 /** \brief The API sets the requested alarm.
430 * This function can be used by the user software to trigger SW SMU alarm. During the START state of the SMU, it shall be possible to set any of the alarms. However, during the RUN state, only the SW alarms shall be set
431 * \param alarm smu alarm group and position
432 * \return Return 0 if successfull and 1 if failed.
433 */
434 IFX_EXTERN boolean IfxSmu_setAlarmStatus(IfxSmu_Alarm alarm);
435
436 /** \brief Configure FSP (fault Signalling Protocol) mode.
437 *
438 * The FSP register needs to be unlocked by using IfxSmu_unlockConfigRegisters() before calling this function.
439 * \param mode FSP mode
440 * \return None
441 */
442 IFX_EXTERN void IfxSmu_setFspMode(IfxSmu_FspMode mode);
443
444 /** \brief The API stops the requested recovery timer unit.
445 * \param timerNum Recovery Timer unit to be stopped
446 * \return Return 0 if successfull and 1 if failed.
447 */
448 IFX_EXTERN boolean IfxSmu_stopRT(uint8 timerNum);
449
450 /** \brief The function unlocks the SMU configuration registers for modification.
451 * \return Return 0 if SMU configurations is locked permanently and unlock not possible, 1 if unlocked successfully.
452 */
453 IFX_EXTERN boolean IfxSmu_unlockConfigRegisters(void);
454
455 /** \brief Configures The Interrupt Generation
456 * \param config Configuration Selection
457 * \param intRequest Interrupt Request
458 * \return None
459 */
460 IFX_EXTERN void IfxSmu_ConfigureInterruptGeneration(IfxSmu_InterruptGenerationConfiguration config, IfxSmu_InterruptRequest intRequest);
461
462 /** \brief The function temporarily locks the SMU configuration registers for modification.
463 * \return None
464 */
465 IFX_EXTERN void IfxSmu_temporaryLockConfigRegisters(void);
466
467 /** \} */
468
469 /******************************************************************************/
470 /*---------------------Inline Function Implementations------------------------*/
471 /******************************************************************************/
472
473 IFX_INLINE void IfxSmu_clearAlarmExecutedStatus(IfxSmu_AlarmExecutionStatus alarmEx)
474 {
475 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
476
477 /* disable the write-protection for registers */
478 IfxScuWdt_clearSafetyEndinit(passwd);
479
480 /* Write 1 in AEX bit to clear alarm Executed mechanism */
481 MODULE_SMU.AEXCLR.U = (uint32)((uint32)0x1U << alarmEx);
482
483 /* Restore back the write-protection for registers */
484 IfxScuWdt_setSafetyEndinit(passwd);
485 }
486
487
488 IFX_INLINE void IfxSmu_clearRegMonTestModeEnable(uint8 testModeEnable)
489 {
490 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
491
492 /* disable the write-protection for registers */
493 IfxScuWdt_clearSafetyEndinit(passwd);
494
495 MODULE_SMU.RMCTL.U &= ~(1U << testModeEnable);
496 /* Restore back the write-protection for registers */
497 IfxScuWdt_setSafetyEndinit(passwd);
498 }
499
500
501 IFX_INLINE void IfxSmu_clearRegisterMonitorErrorFlag(uint8 errorFlag)
502 {
503 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
504
505 /* disable the write-protection for registers */
506 IfxScuWdt_clearSafetyEndinit(passwd);
507
508 MODULE_SMU.RMEF.U &= ~(1U << errorFlag);
509
510 /* Restore back the write-protection for registers */
511 IfxScuWdt_setSafetyEndinit(passwd);
512 }
513
514
515 IFX_INLINE void IfxSmu_clearRegisterMonitorStatus(uint8 statusFlag)
516 {
517 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
518
519 /* disable the write-protection for registers */
520 IfxScuWdt_clearSafetyEndinit(passwd);
521
522 MODULE_SMU.RMSTS.U &= ~(1U << statusFlag);
523
524 /* Restore back the write-protection for registers */
525 IfxScuWdt_setSafetyEndinit(passwd);
526 }
527
528
529 IFX_INLINE boolean IfxSmu_getAlarmExecutedStatus(IfxSmu_AlarmExecutionStatus alarmEx)
530 {
531 boolean alarmExecuteStatus = (boolean)((MODULE_SMU.AEX.U >> alarmEx) & 0x1);
532 return alarmExecuteStatus;
533 }
534
535
536 IFX_INLINE IfxSmu_PortControlHwDir IfxSmu_getPortControlHwDir(void)
537 {
538 return (IfxSmu_PortControlHwDir)MODULE_SMU.PCTL.B.HWDIR;
539 }
540
541
542 IFX_INLINE IfxSmu_PortControlHwEnable IfxSmu_getPortControlHwEnable(void)
543 {
544 return (IfxSmu_PortControlHwEnable)MODULE_SMU.PCTL.B.HWEN;
545 }
546
547
548 IFX_INLINE uint32 IfxSmu_getRegisterMonitorErrorFlag(void)
549 {
550 uint32 errorFlags = 0;
551 errorFlags = MODULE_SMU.RMEF.U;
552 return errorFlags;
553 }
554
555
556 IFX_INLINE uint32 IfxSmu_getRegisterMonitorStatus(void)
557 {
558 uint32 selfTestStatus = 0;
559 selfTestStatus = MODULE_SMU.RMSTS.U;
560 return selfTestStatus;
561 }
562
563
564 IFX_INLINE boolean IfxSmu_isModuleSuspended(Ifx_SMU *smu)
565 {
566 Ifx_SMU_OCS ocs;
567
568 // read the status
569 ocs.U = smu->OCS.U;
570
571 // return the status
572 return ocs.B.SUSSTA;
573 }
574
575
576 IFX_INLINE void IfxSmu_setPortControlHwEnableAndDir(IfxSmu_PortControlHwEnable portEnable, IfxSmu_PortControlHwDir hwDir)
577 {
578 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
579 Ifx_SMU_PCTL pctl;
580 /* disable the write-protection for registers */
581 IfxScuWdt_clearSafetyEndinit(passwd);
582
583 pctl.U = MODULE_SMU.PCTL.U;
584 pctl.B.HWEN = portEnable;
585 pctl.B.HWDIR = hwDir;
586 pctl.B.PCS = 1;
587 MODULE_SMU.PCTL.U = pctl.U;
588
589 /* Restore back the write-protection for registers */
590 IfxScuWdt_setSafetyEndinit(passwd);
591 }
592
593
594 IFX_INLINE void IfxSmu_setRegMonTestModeEnable(uint8 testModeEnable)
595 {
596 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
597
598 /* disable the write-protection for registers */
599 IfxScuWdt_clearSafetyEndinit(passwd);
600
601 MODULE_SMU.RMCTL.U |= (1U << testModeEnable);
602 /* Restore back the write-protection for registers */
603 IfxScuWdt_setSafetyEndinit(passwd);
604 }
605
606
607 IFX_INLINE void IfxSmu_setSuspendMode(Ifx_SMU *smu, IfxSmu_SuspendMode mode)
608 {
609 Ifx_SMU_OCS ocs;
610
611 // remove protection and configure the suspend mode.
612 ocs.B.SUS_P = 1;
613 ocs.B.SUS = mode;
614 smu->OCS.U = ocs.U;
615 }
616
617
618 IFX_INLINE void IfxSmu_startAliveTest(void)
619 {
620 Ifx_SMU_CMD cmdSfr;
621 cmdSfr.U = MODULE_SMU.CMD.U;
622 cmdSfr.B.CMD = IfxSmu_Command_aliveTest;
623 cmdSfr.B.ARG = IFXSMU_START_ALIVE_TEST_ARG;
624 MODULE_SMU.CMD.U = cmdSfr.U;
625 }
626
627
628 IFX_INLINE void IfxSmu_stopAliveTest(void)
629 {
630 Ifx_SMU_CMD cmdSfr;
631 cmdSfr.U = MODULE_SMU.CMD.U;
632 cmdSfr.B.CMD = IfxSmu_Command_aliveTest;
633 cmdSfr.B.ARG = IFXSMU_STOP_ALIVE_TEST_ARG;
634 MODULE_SMU.CMD.U = cmdSfr.U;
635 }
636
637
638 IFX_INLINE void IfxSmu_waitForAlarm(IfxSmu_Alarm alarm)
639 {
640 while (!IfxSmu_getAlarmStatus(alarm))
641 {}
642
643 IfxSmu_clearAlarmStatus(alarm);
644 }
645
646
647 IFX_INLINE volatile Ifx_SRC_SRCR *IfxSmu_getSrcPointer(IfxSmu_InterruptRequest intRequest)
648 {
649 return &MODULE_SRC.SMU.SMU[0].SR[intRequest];
650 }
651
652
653 #endif /* IFXSMU_H */
IfxSmu_SuspendMode
IfxSmu_SuspendMode
OCDS Suspend Control (OCDS.SUS)
Definition: IfxSmu.h:184
IfxSmu_AlarmExecutionStatus
IfxSmu_AlarmExecutionStatus
Alarm Executed Status.
Definition: IfxSmu.h:195
IfxSmu_FspPrescalar2_referenceClockDiv512
FSMU_FS = reference clock frequency divided by 512.
Definition: IfxSmu.h:119
IfxSmu_SmuState_run
RUN State.
Definition: IfxSmu.h:177
IfxSmu_AlarmExecutionStatus_rst1aem
RST1 AEM Request Status.
Definition: IfxSmu.h:213
IfxSmu_Command_aliveTest
Triggers a SMU alive alarm.
Definition: IfxSmu.h:89
IfxSmu_AlarmExecutionStatus_rst5aem
RST5 AEM Request Status.
Definition: IfxSmu.h:217
IfxSmu_AlarmExecutionStatus_irq0aem
IRQ0 AEM Request Status.
Definition: IfxSmu.h:209
IfxSmu_stopRT
IFX_EXTERN boolean IfxSmu_stopRT(uint8 timerNum)
The API stops the requested recovery timer unit.
Definition: IfxSmu.c:370
IfxSmu_SmuState_unspecified
unspecified State
Definition: IfxSmu.h:179
IfxSmu_InternalAlarmAction_disabled
Alarm disabled.
Definition: IfxSmu.h:127
IfxSmu_unlockConfigRegisters
IFX_EXTERN boolean IfxSmu_unlockConfigRegisters(void)
The function unlocks the SMU configuration registers for modification.
Definition: IfxSmu.c:383
IfxSmu_AlarmExecutionStatus_rst0aem
RST0 AEM Request Status.
Definition: IfxSmu.h:212
IfxSmu_getRegisterMonitorStatus
IFX_INLINE uint32 IfxSmu_getRegisterMonitorStatus(void)
Function returns the value of Register Monitor Self Test Status register.
Definition: IfxSmu.h:556
IfxSmu_cfg.h
Smu on-chip implementation data.
IfxSmu_getRegisterMonitorErrorFlag
IFX_INLINE uint32 IfxSmu_getRegisterMonitorErrorFlag(void)
Function returns the value ofRegister Monitor Error Flags register.
Definition: IfxSmu.h:548
IfxSmu_Command_start
Forces the SSM to go to the RUN state from the START state.
Definition: IfxSmu.h:82
IfxSmu_clearAlarmStatus
IFX_EXTERN boolean IfxSmu_clearAlarmStatus(IfxSmu_Alarm alarm)
This function clears SMU alarm status of the requested alarm. It needs to be called after alarm statu...
Definition: IfxSmu.c:75
IfxSmu_FspPrescalar1_referenceClockDiv128
FSMU_FS = reference clock frequency divided by 128.
Definition: IfxSmu.h:111
IfxSmu_AlarmExecutionStatus_irq0
IRQ0 Request Status.
Definition: IfxSmu.h:197
IfxSmu_InterruptRequest_0
Interrupt Request 0.
Definition: IfxSmu.h:149
IfxSmu_AlarmExecutionStatus_rst2
RST2 Request Status.
Definition: IfxSmu.h:202
IfxSmu_lockConfigRegisters
IFX_EXTERN void IfxSmu_lockConfigRegisters(void)
The function locks the SMU configuration registers to prevent any modification to configuration regis...
Definition: IfxSmu.c:231
IfxSmu_SmuState
IfxSmu_SmuState
Running state of the SMU State Machine.
Definition: IfxSmu.h:174
IfxSmu_AlarmExecutionStatus_rst3aem
RST3 AEM Request Status.
Definition: IfxSmu.h:215
IfxSmu_AlarmExecutionStatus_rst5
RST5 Request Status.
Definition: IfxSmu.h:205
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxSmu_InternalAlarmAction_nmi
Sends an NMI request to the SCU.
Definition: IfxSmu.h:131
IfxSmu_FspMode_BiStableProtocol
Bi-stable protocol.
Definition: IfxSmu.h:96
IFXSMU_STOP_ALIVE_TEST_ARG
#define IFXSMU_STOP_ALIVE_TEST_ARG
Argument to stop Alive test.
Definition: IfxSmu.h:70
Ifx_Assert.h
Assert functions.
IfxSmu_PortControlHwEnable_fsp0EnabledAndFsp1Disabled
fsp0EnabledAndFsp1Disabled
Definition: IfxSmu.h:168
IfxSmu_InternalAlarmAction_igcs0
Sends an interrupt request to the interrupt system according to the IGCS0.
Definition: IfxSmu.h:128
IfxSmu_InterruptGenerationConfiguration_1
Interrupt Generation Configuration 1.
Definition: IfxSmu.h:141
IfxSmu_FspPrescalar1_referenceClockDiv256
FSMU_FS = reference clock frequency divided by 256.
Definition: IfxSmu.h:112
IfxSmu_configAlarmActionPES
IFX_EXTERN void IfxSmu_configAlarmActionPES(uint8 pesAction)
This function configures the PES feature for internal action. Bit0/1/2/3 - SMU_IGCS0/SMU_IGCS1/SMU_IG...
Definition: IfxSmu.c:98
IfxSmu_FspPrescalar1_referenceClockDiv2
FSMU_FS = reference clock frequency divided by 2.
Definition: IfxSmu.h:105
IfxSmu_PortControlHwEnable
IfxSmu_PortControlHwEnable
Enum for the FSP_DIR output port control enable.
Definition: IfxSmu.h:165
IfxSmu_SuspendMode_soft
Soft Suspend.
Definition: IfxSmu.h:188
IfxSmu_setFspMode
IFX_EXTERN void IfxSmu_setFspMode(IfxSmu_FspMode mode)
Configure FSP (fault Signalling Protocol) mode.
Definition: IfxSmu.c:353
IfxSmu_getPortControlHwDir
IFX_INLINE IfxSmu_PortControlHwDir IfxSmu_getPortControlHwDir(void)
Function returns the Port control hardware direction.
Definition: IfxSmu.h:536
IfxSmu_PortControlHwDir_fsp0AndFsp1Input
fsp0InputAndFsp1Input
Definition: IfxSmu.h:158
IFXSMU_START_ALIVE_TEST_ARG
#define IFXSMU_START_ALIVE_TEST_ARG
Argument to start Alive test.
Definition: IfxSmu.h:66
IfxSmu_PortControlHwEnable_fsp0AndFsp1Enabled
fsp0AndFsp1Enabled
Definition: IfxSmu.h:169
IfxSmu_getRTMissedEvent
IFX_EXTERN boolean IfxSmu_getRTMissedEvent(uint8 timerNum)
The function returns if any alarms requiring the requested recovery timer was SET while the recovery ...
Definition: IfxSmu.c:203
IfxSmu_getSmuState
IFX_EXTERN IfxSmu_SmuState IfxSmu_getSmuState(void)
The function provides the current state of the SMU.
Definition: IfxSmu.c:224
IfxSmu_activateFSP
IFX_EXTERN boolean IfxSmu_activateFSP(void)
This function activates the FSP to indicate a FAULT state on the error pin to the safe state switchin...
Definition: IfxSmu.c:52
IfxSmu_PortControlHwDir
IfxSmu_PortControlHwDir
Enum for the FSP_DIR output port control direction.
Definition: IfxSmu.h:156
IfxSmu_AlarmExecutionStatus_irq1
IRQ1 Request Status.
Definition: IfxSmu.h:198
IfxSmu_AlarmExecutionStatus_nmiaem
NMI AEM Request Status.
Definition: IfxSmu.h:218
IfxScuWdt.h
SCU basic functionality.
IfxSmu_Command_activatePES
Triggers the activation of the Port Emergency Stop (PES).
Definition: IfxSmu.h:85
IfxScuWdt_clearSafetyEndinit
void IfxScuWdt_clearSafetyEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:305
IfxSmu_FspPrescalar1
IfxSmu_FspPrescalar1
Dividing factor to apply to the reference clock fBACK. The divided clock is used as reference to gene...
Definition: IfxSmu.h:103
IfxSmu_Command_activateFSP
Activates the Fault Signaling Protocol.
Definition: IfxSmu.h:83
IfxSmu_getSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxSmu_getSrcPointer(IfxSmu_InterruptRequest intRequest)
Returns The SRCR pointer for the selected Interrupt.
Definition: IfxSmu.h:647
IfxSmu_SuspendMode_none
No suspend.
Definition: IfxSmu.h:186
IfxSmu_releaseFSP
IFX_EXTERN boolean IfxSmu_releaseFSP(void)
The function switches the SMU peripheral from the FAULT state to the RUN state.
Definition: IfxSmu.c:251
IfxSmu_AlarmExecutionStatus_ems
EMS Request Status.
Definition: IfxSmu.h:208
IfxSmu_FspPrescalar2_referenceClockDiv4096
FSMU_FS = reference clock frequency divided by 4096.
Definition: IfxSmu.h:122
IfxSmu_AlarmExecutionStatus_rst0
RST0 Request Status.
Definition: IfxSmu.h:200
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxSmu_InternalAlarmAction_igcs1
Sends an interrupt request to the interrupt system according to the IGCS1.
Definition: IfxSmu.h:129
IfxSmu_AlarmExecutionStatus_irq1aem
IRQ1 AEM Request Status.
Definition: IfxSmu.h:210
IfxSmu_InterruptRequest_1
Interrupt Request 1.
Definition: IfxSmu.h:150
IfxSmu_PortControlHwDir_fsp0OutputAndFsp1Input
fsp0OutputAndFsp1Input
Definition: IfxSmu.h:159
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxSmu_Command_stopRT
Stop the recovery Timer.
Definition: IfxSmu.h:86
IfxSmu_SuspendMode_hard
Hard Suspend.
Definition: IfxSmu.h:187
IfxSmu_PortControlHwDir_fsp0AndFsp1Output
fsp0OutputAndFsp1Input
Definition: IfxSmu.h:160
IfxSmu_FspMode_dualRailProtocol
dualRailProtocol
Definition: IfxSmu.h:97
IfxSmu_getPortControlHwEnable
IFX_INLINE IfxSmu_PortControlHwEnable IfxSmu_getPortControlHwEnable(void)
Function returns the Port control hardware enable.
Definition: IfxSmu.h:542
IfxSmu_FspMode
IfxSmu_FspMode
Fault Signaling Protocol configuration.
Definition: IfxSmu.h:94
IfxSmu_setRegMonTestModeEnable
IFX_INLINE void IfxSmu_setRegMonTestModeEnable(uint8 testModeEnable)
Function sets the Register monitor test mode enable Flag.
Definition: IfxSmu.h:594
IfxSmu_activateRunState
IFX_EXTERN boolean IfxSmu_activateRunState(void)
The function allows to switch the SMU peripheral into the RUN fault-free state as requested by the ca...
Definition: IfxSmu.c:64
IfxSmu_getAlarmExecutedStatus
IFX_INLINE boolean IfxSmu_getAlarmExecutedStatus(IfxSmu_AlarmExecutionStatus alarmEx)
The function returns the alarm Executed status of requested alarm mechanism.
Definition: IfxSmu.h:529
IfxSmu_AlarmExecutionStatus_rst4aem
RST4 AEM Request Status.
Definition: IfxSmu.h:216
IfxSmu_FspPrescalar1_referenceClockDiv64
FSMU_FS = reference clock frequency divided by 64.
Definition: IfxSmu.h:110
IfxSmu_temporaryLockConfigRegisters
IFX_EXTERN void IfxSmu_temporaryLockConfigRegisters(void)
The function temporarily locks the SMU configuration registers for modification.
Definition: IfxSmu.c:446
IfxSmu_stopAliveTest
IFX_INLINE void IfxSmu_stopAliveTest(void)
This function Stops the SMU alive test.
Definition: IfxSmu.h:628
IfxSmu_FspPrescalar2_referenceClockDiv2048
FSMU_FS = reference clock frequency divided by 2048.
Definition: IfxSmu.h:121
IfxSmu_clearRegisterMonitorStatus
IFX_INLINE void IfxSmu_clearRegisterMonitorStatus(uint8 statusFlag)
Function clears the Register Monitor status register.
Definition: IfxSmu.h:515
IfxSmu_waitForAlarm
IFX_INLINE void IfxSmu_waitForAlarm(IfxSmu_Alarm alarm)
This function waits for SMU alarm to be set and then clears it..
Definition: IfxSmu.h:638
IfxSmu_setAlarmAction
IFX_EXTERN void IfxSmu_setAlarmAction(IfxSmu_Alarm alarm, IfxSmu_InternalAlarmAction intAlarmAction)
The function sets the alarm action for the desired alarm.
Definition: IfxSmu.c:268
IfxSmu_InternalAlarmAction_cpureset
Triggers a CPU reset request using CPU Reset Configuration Set.
Definition: IfxSmu.h:133
IfxSmu_AlarmExecutionStatus_emsaem
EMS AEM Request Status.
Definition: IfxSmu.h:220
IfxSmu_isModuleSuspended
IFX_INLINE boolean IfxSmu_isModuleSuspended(Ifx_SMU *smu)
Returns the module&#39;s suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspende...
Definition: IfxSmu.h:564
IfxSmu_enableFaultToRunState
IFX_EXTERN void IfxSmu_enableFaultToRunState(boolean enable)
Enable FAULT to RUN State Transition.
Definition: IfxSmu.c:127
IfxSmu_setSuspendMode
IFX_INLINE void IfxSmu_setSuspendMode(Ifx_SMU *smu, IfxSmu_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and...
Definition: IfxSmu.h:607
IfxSmu_ConfigureInterruptGeneration
IFX_EXTERN void IfxSmu_ConfigureInterruptGeneration(IfxSmu_InterruptGenerationConfiguration config, IfxSmu_InterruptRequest intRequest)
Configures The Interrupt Generation.
Definition: IfxSmu.c:411
IfxSmu_AlarmExecutionStatus_rst3
RST3 Request Status.
Definition: IfxSmu.h:203
IfxSmu_FspMode_TimeSwitchingProtocol
Time switching protocol.
Definition: IfxSmu.h:98
IfxSmu_clearRegisterMonitorErrorFlag
IFX_INLINE void IfxSmu_clearRegisterMonitorErrorFlag(uint8 errorFlag)
Function clears the Register Monitor Error Flag (RMEF.EFz).
Definition: IfxSmu.h:501
boolean
unsigned char boolean
Definition: Platform_Types.h:104
IfxSmu_AlarmExecutionStatus_rst2aem
RST2 AEM Request Status.
Definition: IfxSmu.h:214
IfxSmu_FspPrescalar1_referenceClockDiv32
FSMU_FS = reference clock frequency divided by 32.
Definition: IfxSmu.h:109
IfxSmu_FspPrescalar1_referenceClockDiv8
FSMU_FS = reference clock frequency divided by 8.
Definition: IfxSmu.h:107
IfxSmu_Command_triggerAlarm
Triggers a software based alarm.
Definition: IfxSmu.h:88
IfxSmu_AlarmExecutionStatus_irq2aem
IRQ2 AEM Request Status.
Definition: IfxSmu.h:211
IfxSmu_clearAlarmExecutedStatus
IFX_INLINE void IfxSmu_clearAlarmExecutedStatus(IfxSmu_AlarmExecutionStatus alarmEx)
This function clears SMU alarm exected status of the requested alarm mechanism.
Definition: IfxSmu.h:473
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxSmu_Command_releaseFSP
Turns the FSP into the inactive fault free state.
Definition: IfxSmu.h:84
IfxScuWdt_setSafetyEndinit
void IfxScuWdt_setSafetyEndinit(uint16 password)
SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:668
IfxScuWdt_getSafetyWatchdogPassword
uint16 IfxScuWdt_getSafetyWatchdogPassword(void)
SCUWDT API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.c:393
IfxSmu_AlarmExecutionStatus_rst4
RST4 Request Status.
Definition: IfxSmu.h:204
IfxSmu_FspPrescalar2
IfxSmu_FspPrescalar2
Dividing factor to apply to the reference clock fBACK in order to generate the timing of the fault fr...
Definition: IfxSmu.h:117
IfxSmu_InternalAlarmAction_igcs2
Sends an interrupt request to the interrupt system according to the IGCS2.
Definition: IfxSmu.h:130
IfxSmu_InternalAlarmAction
IfxSmu_InternalAlarmAction
Definition: IfxSmu.h:125
IfxSmu_InternalAlarmAction_reset
Sends a reset request to the SCU.
Definition: IfxSmu.h:132
enable
void enable
Definition: IfxCpu_IntrinsicsDcc.h:477
IfxSmu_setAlarmStatus
IFX_EXTERN boolean IfxSmu_setAlarmStatus(IfxSmu_Alarm alarm)
The API sets the requested alarm. This function can be used by the user software to trigger SW SMU al...
Definition: IfxSmu.c:312
IfxSmu_startAliveTest
IFX_INLINE void IfxSmu_startAliveTest(void)
This function starts the SMU alive test.
Definition: IfxSmu.h:618
IfxSmu_InterruptRequest
IfxSmu_InterruptRequest
Interrupt Request.
Definition: IfxSmu.h:147
IfxSmu_Command
IfxSmu_Command
Command interface.
Definition: IfxSmu.h:80
IfxSmu_InterruptGenerationConfiguration_0
Interrupt Generation Configuration 0.
Definition: IfxSmu.h:140
IfxSmu_enablePortEmergencyStop
IFX_EXTERN void IfxSmu_enablePortEmergencyStop(boolean enable)
Configure FSP (fault Signalling Protocol) Port Emergency Stop.
Definition: IfxSmu.c:145
IfxSmu_InterruptRequest_2
Interrupt Request 2.
Definition: IfxSmu.h:151
IfxSmu_Alarm
IfxSmu_Alarm
SMU Alarms.
Definition: IfxSmu_cfg.h:76
IfxSmu_AlarmExecutionStatus_rst
RST Request Status.
Definition: IfxSmu.h:207
IfxSmu_SmuState_fault
FAULT State.
Definition: IfxSmu.h:178
IfxSmu_InterruptGenerationConfiguration
IfxSmu_InterruptGenerationConfiguration
Interrupt Generation Configuration.
Definition: IfxSmu.h:138
IfxSmu_PortControlHwEnable_fsp0AndFsp1Disabled
fsp0AndFsp1Disabled
Definition: IfxSmu.h:167
IfxSmu_AlarmExecutionStatus_rst1
RST1 Request Status.
Definition: IfxSmu.h:201
IfxSmu_getAlarmGroupDebugStatus
IFX_EXTERN uint32 IfxSmu_getAlarmGroupDebugStatus(uint8 alarmGroup)
The function provides the alarm group status from the stored debug registers.
Definition: IfxSmu.c:181
IfxSmu_Command_alarmStatusClear
Alarm Status Clear Enable Command.
Definition: IfxSmu.h:87
IfxSmu_FspPrescalar1_referenceClockDiv16
FSMU_FS = reference clock frequency divided by 16.
Definition: IfxSmu.h:108
IfxSmu_setPortControlHwEnableAndDir
IFX_INLINE void IfxSmu_setPortControlHwEnableAndDir(IfxSmu_PortControlHwEnable portEnable, IfxSmu_PortControlHwDir hwDir)
Function sets the Port control hardware Enable and direction.
Definition: IfxSmu.h:576
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxSmu_FspPrescalar1_referenceClockDiv4
FSMU_FS = reference clock frequency divided by 4.
Definition: IfxSmu.h:106
IfxSmu_AlarmExecutionStatus_irq2
IRQ2 Request Status.
Definition: IfxSmu.h:199
IfxSmu_SmuState_start
START state.
Definition: IfxSmu.h:176
IfxSmu_getAlarmAction
IFX_EXTERN boolean IfxSmu_getAlarmAction(IfxSmu_Alarm alarm, IfxSmu_InternalAlarmAction *intAlarmAction)
The function provides the FSP action currently configured for the requested alarm.
Definition: IfxSmu.c:163
IfxSmu_AlarmExecutionStatus_rstaem
RST AEM Request Status.
Definition: IfxSmu.h:219
IfxSmu_FspPrescalar2_referenceClockDiv1024
FSMU_FS = reference clock frequency divided by 1024.
Definition: IfxSmu.h:120
IfxSmu_InterruptGenerationConfiguration_2
Interrupt Generation Configuration 2.
Definition: IfxSmu.h:142
IfxSmu_getAlarmStatus
IFX_EXTERN boolean IfxSmu_getAlarmStatus(IfxSmu_Alarm alarm)
The function returns the alarm status of requested alarm.
Definition: IfxSmu.c:192
IfxSmu_AlarmExecutionStatus_nmi
NMI Request Status.
Definition: IfxSmu.h:206
IfxSmu_clearRegMonTestModeEnable
IFX_INLINE void IfxSmu_clearRegMonTestModeEnable(uint8 testModeEnable)
Function clears the Register monitor test mode enable Flag.
Definition: IfxSmu.h:488


iLLD_TC38A: IfxSmu_PinMap.c Source File

  • _PinMap
IfxSmu_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxSmu_PinMap.c
3 * \brief SMU I/O map
4 * \ingroup IfxLld_Smu
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "IfxSmu_PinMap.h"
44
45 IfxSmu_Fsp_Out IfxSmu_FSP0_P33_8_OUT = {&MODULE_SMU, {&MODULE_P33, 8}, IfxPort_OutputIdx_general};
46 IfxSmu_Fsp_Out IfxSmu_FSP1_P33_10_OUT = {&MODULE_SMU, {&MODULE_P33,10}, IfxPort_OutputIdx_general};
47
48
49 const IfxSmu_Fsp_Out *IfxSmu_Fsp_Out_pinTable[IFXSMU_PINMAP_NUM_MODULES][IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS] = {
50 {
51 &IfxSmu_FSP0_P33_8_OUT,
52 &IfxSmu_FSP1_P33_10_OUT
53 }
54 };
IfxSmu_FSP1_P33_10_OUT
IfxSmu_Fsp_Out IfxSmu_FSP1_P33_10_OUT
Definition: IfxSmu_PinMap.c:46
IfxSmu_FSP0_P33_8_OUT
IfxSmu_Fsp_Out IfxSmu_FSP0_P33_8_OUT
Definition: IfxSmu_PinMap.c:45
IfxPort_OutputIdx_general
Definition: IfxPort.h:128
IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS
#define IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS
Definition: IfxSmu_PinMap.h:67
IfxSmu_Fsp_Out_pinTable
const IfxSmu_Fsp_Out * IfxSmu_Fsp_Out_pinTable[IFXSMU_PINMAP_NUM_MODULES][IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS]
Definition: IfxSmu_PinMap.c:49
IfxSmu_Fsp_Out
Fault Signal Protocol Pin.
Definition: IfxSmu_PinMap.h:55
IfxSmu_PinMap.h
SMU I/O map.
IFXSMU_PINMAP_NUM_MODULES
#define IFXSMU_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxSmu_PinMap.h:66


iLLD_TC38A: IfxSmu_PinMap.h Source File

  • _PinMap
IfxSmu_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxSmu_PinMap.h
3 * \brief SMU I/O map
4 * \ingroup IfxLld_Smu
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Smu_pinmap SMU Pin Mapping
42 * \ingroup IfxLld_Smu
43 */
44
45 #ifndef IFXSMU_PINMAP_H
46 #define IFXSMU_PINMAP_H
47
48 #include <IfxSmu_reg.h>
49 #include <Port/Std/IfxPort.h>
50
51 /** \addtogroup IfxLld_Smu_pinmap
52 * \{ */
53
54 /** \brief Fault Signal Protocol Pin */
55 typedef const struct
56 {
57 Ifx_SMU* module; /**< \brief Base address */
58 IfxPort_Pin pin; /**< \brief Port pin */
59 IfxPort_OutputIdx select; /**< \brief Port control code */
60 } IfxSmu_Fsp_Out;
61
62 IFX_EXTERN IfxSmu_Fsp_Out IfxSmu_FSP0_P33_8_OUT; /**< \brief FSP[1..0] Output Signals - Generated by SMU_core */
63 IFX_EXTERN IfxSmu_Fsp_Out IfxSmu_FSP1_P33_10_OUT; /**< \brief FSP[1..0] Output Signals - Generated by SMU_core */
64
65 /** \brief Table dimensions */
66 #define IFXSMU_PINMAP_NUM_MODULES 1
67 #define IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS 2
68
69
70 /** \brief IfxSmu_Fsp_Out table */
71 IFX_EXTERN const IfxSmu_Fsp_Out *IfxSmu_Fsp_Out_pinTable[IFXSMU_PINMAP_NUM_MODULES][IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS];
72
73 /** \} */
74
75 #endif /* IFXSMU_PINMAP_H */
IfxSmu_Fsp_Out::module
Ifx_SMU * module
Base address.
Definition: IfxSmu_PinMap.h:57
IfxSmu_Fsp_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxSmu_PinMap.h:59
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:126
IfxSmu_Fsp_Out::pin
IfxPort_Pin pin
Port pin.
Definition: IfxSmu_PinMap.h:58
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS
#define IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS
Definition: IfxSmu_PinMap.h:67
IfxSmu_FSP0_P33_8_OUT
IFX_EXTERN IfxSmu_Fsp_Out IfxSmu_FSP0_P33_8_OUT
FSP[1..0] Output Signals - Generated by SMU_core.
Definition: IfxSmu_PinMap.h:62
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:246
IfxSmu_Fsp_Out_pinTable
IFX_EXTERN const IfxSmu_Fsp_Out * IfxSmu_Fsp_Out_pinTable[IFXSMU_PINMAP_NUM_MODULES][IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS]
IfxSmu_Fsp_Out table.
Definition: IfxSmu_PinMap.h:71
IfxSmu_Fsp_Out
Fault Signal Protocol Pin.
Definition: IfxSmu_PinMap.h:55
IfxSmu_FSP1_P33_10_OUT
IFX_EXTERN IfxSmu_Fsp_Out IfxSmu_FSP1_P33_10_OUT
FSP[1..0] Output Signals - Generated by SMU_core.
Definition: IfxSmu_PinMap.h:63
IFXSMU_PINMAP_NUM_MODULES
#define IFXSMU_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxSmu_PinMap.h:66
IfxPort.h
PORT basic functionality.


iLLD_TC38A: IfxSmu_Smu.c Source File

  • Smu
  • Smu
IfxSmu_Smu.c
Go to the documentation of this file.
1 /**
2 * \file IfxSmu_Smu.c
3 * \brief SMU SMU details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxSmu_Smu.h"
47
48 /******************************************************************************/
49 /*-------------------------Function Implementations---------------------------*/
50 /******************************************************************************/
51
52 void IfxSmu_Smu_initModuleConfig(IfxSmu_Smu_Config *config)
53 {
54 const IfxSmu_Smu_Config IfxSmu_Smu_defaultConfig = {
55 .fsp = {
56 .prescalar1 = IfxSmu_FspPrescalar1_referenceClockDiv2,
57 .prescalar2 = IfxSmu_FspPrescalar2_referenceClockDiv512,
58 .mode = IfxSmu_FspMode_BiStableProtocol,
59 .portEmergencyStop = 0,
60 .faultStateDurationHigh = 0,
61 .faultStateDurationLow = 0
62 },
63 .alarmGlobalConfig = {
64 .igcs0 = 0,
65 .igcs1 = 0,
66 .igcs2 = 0,
67 .resetConfigSet = 0,
68 .portEmergencyStop = 0,
69 .enableFaultToRunTransition = FALSE
70 },
71 .recoveryTimerConfig = {
72 .enableRecoveryTimer0 = FALSE,
73 .enableRecoveryTimer1 = FALSE,
74 .recoveryTimerDuration = 0
75 },
76 .recoveryTimerAlarmConfig = {
77 {
78 .groupIndex0 = 0,
79 .alarmId0 = 0,
80 .groupIndex1 = 0,
81 .alarmId1 = 0,
82 .groupIndex2 = 0,
83 .alarmId2 = 0,
84 .groupIndex3 = 0,
85 .alarmId3 = 0
86 },
87 {
88 .groupIndex0 = 0,
89 .alarmId0 = 0,
90 .groupIndex1 = 0,
91 .alarmId1 = 0,
92 .groupIndex2 = 0,
93 .alarmId2 = 0,
94 .groupIndex3 = 0,
95 .alarmId3 = 0
96 },
97 },
98 .alarmConfigRegister[0][0] = 0,
99 .alarmConfigRegister[0][1] = 0,
100 .alarmConfigRegister[0][2] = 0,
101 .alarmConfigRegister[1][0] = 0,
102 .alarmConfigRegister[1][1] = 0,
103 .alarmConfigRegister[1][2] = 0,
104 .alarmConfigRegister[2][0] = 0,
105 .alarmConfigRegister[2][1] = 0,
106 .alarmConfigRegister[2][2] = 0,
107 .alarmConfigRegister[3][0] = 0,
108 .alarmConfigRegister[3][1] = 0,
109 .alarmConfigRegister[3][2] = 0,
110 .alarmConfigRegister[4][0] = 0,
111 .alarmConfigRegister[4][1] = 0,
112 .alarmConfigRegister[4][2] = 0,
113 .alarmConfigRegister[5][0] = 0,
114 .alarmConfigRegister[5][1] = 0,
115 .alarmConfigRegister[5][2] = 0,
116 .alarmConfigRegister[6][0] = 0,
117 .alarmConfigRegister[6][1] = 0,
118 .alarmConfigRegister[6][2] = 0,
119 .alarmConfigRegister[7][0] = 0,
120 .alarmConfigRegister[7][1] = 0,
121 .alarmConfigRegister[7][2] = 0,
122 .alarmConfigRegister[8][0] = 0,
123 .alarmConfigRegister[8][1] = 0,
124 .alarmConfigRegister[8][2] = 0,
125 .alarmConfigRegister[9][0] = 0,
126 .alarmConfigRegister[9][1] = 0,
127 .alarmConfigRegister[9][2] = 0,
128 .alarmConfigRegister[10][0] = 0,
129 .alarmConfigRegister[10][1] = 0,
130 .alarmConfigRegister[10][2] = 0,
131 .alarmConfigRegister[11][0] = 0,
132 .alarmConfigRegister[11][1] = 0,
133 .alarmConfigRegister[11][2] = 0,
134 .fspConfigRegister[0] = 0,
135 .fspConfigRegister[1] = 0,
136 .fspConfigRegister[2] = 0,
137 .fspConfigRegister[3] = 0,
138 .fspConfigRegister[4] = 0,
139 .fspConfigRegister[5] = 0,
140 .fspConfigRegister[6] = 0,
141 .fspConfigRegister[7] = 0,
142 .fspConfigRegister[8] = 0,
143 .fspConfigRegister[9] = 0,
144 .fspConfigRegister[10] = 0,
145 .fspConfigRegister[11] = 0,
146 };
147
148 *config = IfxSmu_Smu_defaultConfig;
149 }
150
151
152 void IfxSmu_Smu_initModule(IfxSmu_Smu_Config *config)
153 {
154 Ifx_SMU_FSP fspSfr;
155 Ifx_SMU_AGC agcSfr;
156 Ifx_SMU_RTC rtcSfr;
157
158 Ifx_SMU_RTAC00 rtacSfr0;
159 Ifx_SMU_RTAC01 rtacSfr1;
160
161 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
162 uint8 alarmGroupIndex = 0;
163
164 /* disable the write-protection for registers */
165 IfxScuWdt_clearSafetyEndinit(passwd);
166
167 /*Write Config key to configure the SMU registers. */
168 MODULE_SMU.KEYS.U = (uint32)0x000000bc;
169
170 /* Configure SMU module register as per the requested configuration */
171 fspSfr.U = MODULE_SMU.FSP.U;
172 fspSfr.B.PRE1 = config->fsp.prescalar1;
173 fspSfr.B.PRE2 = config->fsp.prescalar2;
174 fspSfr.B.MODE = config->fsp.mode;
175 fspSfr.B.PES = config->fsp.portEmergencyStop;
176 fspSfr.B.TFSP_LOW = config->fsp.faultStateDurationLow;
177 fspSfr.B.TFSP_HIGH = config->fsp.faultStateDurationHigh;
178 MODULE_SMU.FSP.U = fspSfr.U;
179
180 agcSfr.U = MODULE_SMU.AGC.U;
181 agcSfr.B.IGCS0 = config->alarmGlobalConfig.igcs0;
182 agcSfr.B.IGCS1 = config->alarmGlobalConfig.igcs1;
183 agcSfr.B.IGCS2 = config->alarmGlobalConfig.igcs2;
184 agcSfr.B.RCS = config->alarmGlobalConfig.resetConfigSet;
185 agcSfr.B.PES = config->alarmGlobalConfig.portEmergencyStop;
186 agcSfr.B.EFRST = config->alarmGlobalConfig.enableFaultToRunTransition;
187 MODULE_SMU.AGC.U = agcSfr.U;
188
189 rtcSfr.U = MODULE_SMU.RTC.U;
190 rtcSfr.B.RT0E = config->recoveryTimerConfig.enableRecoveryTimer0;
191 rtcSfr.B.RT1E = config->recoveryTimerConfig.enableRecoveryTimer1;
192 rtcSfr.B.RTD = config->recoveryTimerConfig.recoveryTimerDuration;
193 MODULE_SMU.RTC.U = rtcSfr.U;
194
195 // Recovery Timer 0 Alarm Configuration 0
196
197 rtacSfr0.U = MODULE_SMU.RTAC00.U;
198
199 rtacSfr0.B.GID0 = config->recoveryTimerAlarmConfig[0].groupIndex0;
200 rtacSfr0.B.ALID0 = config->recoveryTimerAlarmConfig[0].alarmId0;
201 rtacSfr0.B.GID1 = config->recoveryTimerAlarmConfig[0].groupIndex1;
202 rtacSfr0.B.ALID1 = config->recoveryTimerAlarmConfig[0].alarmId1;
203
204 MODULE_SMU.RTAC00.U = rtacSfr0.U;
205
206 // Recovery Timer 0 Alarm Configuration 1
207
208 rtacSfr1.U = MODULE_SMU.RTAC01.U;
209
210 rtacSfr1.B.GID2 = config->recoveryTimerAlarmConfig[0].groupIndex2;
211 rtacSfr1.B.ALID2 = config->recoveryTimerAlarmConfig[0].alarmId2;
212 rtacSfr1.B.GID3 = config->recoveryTimerAlarmConfig[0].groupIndex3;
213 rtacSfr1.B.ALID3 = config->recoveryTimerAlarmConfig[0].alarmId3;
214
215 MODULE_SMU.RTAC01.U = rtacSfr1.U;
216
217 // Recovery Timer 1 Alarm Configuration 0
218
219 rtacSfr0.U = MODULE_SMU.RTAC10.U;
220
221 rtacSfr0.B.GID0 = config->recoveryTimerAlarmConfig[1].groupIndex0;
222 rtacSfr0.B.ALID0 = config->recoveryTimerAlarmConfig[1].alarmId0;
223 rtacSfr0.B.GID1 = config->recoveryTimerAlarmConfig[1].groupIndex1;
224 rtacSfr0.B.ALID1 = config->recoveryTimerAlarmConfig[1].alarmId1;
225
226 MODULE_SMU.RTAC10.U = rtacSfr0.U;
227
228 // Recovery Timer 1 Alarm Configuration 1
229
230 rtacSfr1.U = MODULE_SMU.RTAC11.U;
231
232 rtacSfr1.B.GID2 = config->recoveryTimerAlarmConfig[1].groupIndex2;
233 rtacSfr1.B.ALID2 = config->recoveryTimerAlarmConfig[1].alarmId2;
234 rtacSfr1.B.GID3 = config->recoveryTimerAlarmConfig[1].groupIndex3;
235 rtacSfr1.B.ALID3 = config->recoveryTimerAlarmConfig[1].alarmId3;
236
237 MODULE_SMU.RTAC11.U = rtacSfr1.U;
238
239 for (alarmGroupIndex = 0U; alarmGroupIndex < IFXSMU_NUM_ALARM_GROUPS; alarmGroupIndex++)
240 {
241 MODULE_SMU.AGCF[alarmGroupIndex][0].U = config->alarmConfigRegister[alarmGroupIndex][0];
242 MODULE_SMU.AGCF[alarmGroupIndex][1].U = config->alarmConfigRegister[alarmGroupIndex][1];
243 MODULE_SMU.AGCF[alarmGroupIndex][2].U = config->alarmConfigRegister[alarmGroupIndex][2];
244 }
245
246 for (alarmGroupIndex = 0U; alarmGroupIndex < IFXSMU_NUM_ALARM_GROUPS; alarmGroupIndex++)
247 {
248 MODULE_SMU.AGFSP[alarmGroupIndex].U = config->fspConfigRegister[alarmGroupIndex];
249 }
250
251 /* After configuration set temporary lock of SMU configuration */
252 MODULE_SMU.KEYS.U = 0;
253
254 /* Restore back the write-protection for registers */
255 IfxScuWdt_setSafetyEndinit(passwd);
256
257 /* Clear all SMU Alarms */
258 for (alarmGroupIndex = 0U; alarmGroupIndex < IFXSMU_NUM_ALARM_GROUPS; alarmGroupIndex++)
259 {
260 /* Write SMU_ASCE(0) in CMD register */
261 MODULE_SMU.CMD.U = IfxSmu_Command_alarmStatusClear;
262
263 /* disable the write-protection for registers */
264 IfxScuWdt_clearSafetyEndinit(passwd);
265
266 /* Write 1 in AG bit to clear alarm */
267 MODULE_SMU.AG[alarmGroupIndex].U = 0xFFFFFFFFU;
268
269 /* Restore back the write-protection for registers */
270 IfxScuWdt_setSafetyEndinit(passwd);
271 }
272 }
273
274
275 boolean IfxSmu_Smu_isAlarmTriggered(void)
276 {
277 boolean result = FALSE;
278 uint32 groups;
279
280 for (groups = 0; groups < IFXSMU_NUM_ALARM_GROUPS; groups++)
281 {
282 if ((MODULE_SMU.AG[groups].U != 0))
283 {
284 result = TRUE;
285 break;
286 }
287 else
288 {
289 result = FALSE;
290 }
291 }
292
293 return result;
294 }
IfxSmu_FspPrescalar2_referenceClockDiv512
FSMU_FS = reference clock frequency divided by 512.
Definition: IfxSmu.h:119
IfxSmu_Smu_initModule
void IfxSmu_Smu_initModule(IfxSmu_Smu_Config *config)
Initialises the SMU Module.
Definition: IfxSmu_Smu.c:152
IFXSMU_NUM_ALARM_GROUPS
#define IFXSMU_NUM_ALARM_GROUPS
Number of SMU Alarm Groups.
Definition: IfxSmu_cfg.h:68
IfxSmu_Smu_FaultSignalingProtocol::prescalar1
IfxSmu_FspPrescalar1 prescalar1
FSP.B.PRE1.
Definition: IfxSmu_Smu.h:81
IfxSmu_Smu_Config::recoveryTimerAlarmConfig
IfxSmu_Smu_RecoveryTimerAlarmConfiguration recoveryTimerAlarmConfig[2]
recovery Timer Alarm 0/1 configuration
Definition: IfxSmu_Smu.h:121
IfxSmu_Smu_AlarmGlobalConfiguration::resetConfigSet
uint8 resetConfigSet
AGC.B.RCS.
Definition: IfxSmu_Smu.h:72
IfxSmu_Smu_Config::alarmGlobalConfig
IfxSmu_Smu_AlarmGlobalConfiguration alarmGlobalConfig
Definition: IfxSmu_Smu.h:119
IfxSmu_Smu_AlarmGlobalConfiguration::enableFaultToRunTransition
boolean enableFaultToRunTransition
AGC.B.EFRST.
Definition: IfxSmu_Smu.h:74
IfxSmu_Smu_Config::recoveryTimerConfig
IfxSmu_Smu_RecoveryTimerConfig recoveryTimerConfig
Definition: IfxSmu_Smu.h:120
IfxSmu_Smu_Config::alarmConfigRegister
uint32 alarmConfigRegister[IFXSMU_NUM_ALARM_GROUPS][3]
AGCF.
Definition: IfxSmu_Smu.h:122
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxSmu_FspMode_BiStableProtocol
Bi-stable protocol.
Definition: IfxSmu.h:96
IfxSmu_Smu_FaultSignalingProtocol::faultStateDurationLow
uint16 faultStateDurationLow
FSP.B.TFSP_LOW.
Definition: IfxSmu_Smu.h:86
IfxSmu_FspPrescalar1_referenceClockDiv2
FSMU_FS = reference clock frequency divided by 2.
Definition: IfxSmu.h:105
IfxSmu_Smu_Config::fspConfigRegister
uint32 fspConfigRegister[IFXSMU_NUM_ALARM_GROUPS]
AGFSP.
Definition: IfxSmu_Smu.h:123
IfxSmu_Smu_initModuleConfig
void IfxSmu_Smu_initModuleConfig(IfxSmu_Smu_Config *config)
Fills the configuration stucture of the SMU Module with default values.
Definition: IfxSmu_Smu.c:52
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxScuWdt_clearSafetyEndinit
void IfxScuWdt_clearSafetyEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:305
IfxSmu_Smu_RecoveryTimerAlarmConfiguration::groupIndex3
uint8 groupIndex3
Definition: IfxSmu_Smu.h:99
IfxSmu_Smu.h
SMU SMU details.
IfxSmu_Smu_RecoveryTimerAlarmConfiguration::alarmId1
uint8 alarmId1
Definition: IfxSmu_Smu.h:96
IfxSmu_Smu_RecoveryTimerConfig::enableRecoveryTimer1
boolean enableRecoveryTimer1
RTC.B.RT1E.
Definition: IfxSmu_Smu.h:108
IfxSmu_Smu_RecoveryTimerAlarmConfiguration::groupIndex1
uint8 groupIndex1
Definition: IfxSmu_Smu.h:95
IfxSmu_Smu_AlarmGlobalConfiguration::igcs0
uint8 igcs0
AGC.B.IGCS0.
Definition: IfxSmu_Smu.h:69
IfxSmu_Smu_AlarmGlobalConfiguration::igcs2
uint8 igcs2
AGC.B.IGCS2.
Definition: IfxSmu_Smu.h:71
IfxSmu_Smu_isAlarmTriggered
boolean IfxSmu_Smu_isAlarmTriggered(void)
Check if any alarm is Triggered.
Definition: IfxSmu_Smu.c:275
IfxSmu_Smu_AlarmGlobalConfiguration::igcs1
uint8 igcs1
AGC.B.IGCS1.
Definition: IfxSmu_Smu.h:70
IfxSmu_Smu_RecoveryTimerAlarmConfiguration::groupIndex0
uint8 groupIndex0
Definition: IfxSmu_Smu.h:93
IfxSmu_Smu_FaultSignalingProtocol::prescalar2
IfxSmu_FspPrescalar2 prescalar2
FSP.B.PRE2.
Definition: IfxSmu_Smu.h:82
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxScuWdt_setSafetyEndinit
void IfxScuWdt_setSafetyEndinit(uint16 password)
SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:668
IfxScuWdt_getSafetyWatchdogPassword
uint16 IfxScuWdt_getSafetyWatchdogPassword(void)
SCUWDT API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.c:393
IfxSmu_Smu_FaultSignalingProtocol::faultStateDurationHigh
uint16 faultStateDurationHigh
FSP.B.TFSP_HIGH.
Definition: IfxSmu_Smu.h:85
IfxSmu_Smu_RecoveryTimerAlarmConfiguration::groupIndex2
uint8 groupIndex2
Definition: IfxSmu_Smu.h:97
IfxSmu_Smu_RecoveryTimerConfig::recoveryTimerDuration
uint32 recoveryTimerDuration
RTC.B.RTD.
Definition: IfxSmu_Smu.h:109
IfxSmu_Smu_RecoveryTimerAlarmConfiguration::alarmId3
uint8 alarmId3
Definition: IfxSmu_Smu.h:100
IfxSmu_Smu_FaultSignalingProtocol::mode
IfxSmu_FspMode mode
Definition: IfxSmu_Smu.h:83
IfxSmu_Smu_RecoveryTimerAlarmConfiguration::alarmId0
uint8 alarmId0
Definition: IfxSmu_Smu.h:94
IfxSmu_Smu_FaultSignalingProtocol::portEmergencyStop
boolean portEmergencyStop
FSP.B.PES.
Definition: IfxSmu_Smu.h:84
IfxSmu_Smu_AlarmGlobalConfiguration::portEmergencyStop
uint8 portEmergencyStop
AGC.B.PES.
Definition: IfxSmu_Smu.h:73
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxSmu_Command_alarmStatusClear
Alarm Status Clear Enable Command.
Definition: IfxSmu.h:87
IfxSmu_Smu_Config
Definition: IfxSmu_Smu.h:116
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxSmu_Smu_RecoveryTimerAlarmConfiguration::alarmId2
uint8 alarmId2
Definition: IfxSmu_Smu.h:98
IfxSmu_Smu_Config::fsp
IfxSmu_Smu_FaultSignalingProtocol fsp
Definition: IfxSmu_Smu.h:118
IfxSmu_Smu_RecoveryTimerConfig::enableRecoveryTimer0
boolean enableRecoveryTimer0
RTC.B.RT0E.
Definition: IfxSmu_Smu.h:107


iLLD_TC38A: IfxSmu_Smu.h Source File

  • Smu
  • Smu
IfxSmu_Smu.h
Go to the documentation of this file.
1 /**
2 * \file IfxSmu_Smu.h
3 * \brief SMU SMU details
4 * \ingroup IfxLld_Smu
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Smu_Smu SMU
42 * \ingroup IfxLld_Smu
43 * \defgroup IfxLld_Smu_Smu_DataStructures Data Structures
44 * \ingroup IfxLld_Smu_Smu
45 * \defgroup IfxLld_Smu_Smu_SmuFunctions Smu Functions
46 * \ingroup IfxLld_Smu_Smu
47 */
48
49 #ifndef IFXSMU_SMU_H
50 #define IFXSMU_SMU_H 1
51
52 /******************************************************************************/
53 /*----------------------------------Includes----------------------------------*/
54 /******************************************************************************/
55
56 #include "Smu/Std/IfxSmu.h"
57 #include "_Impl/IfxSmu_cfg.h"
58
59 /******************************************************************************/
60 /*-----------------------------Data Structures--------------------------------*/
61 /******************************************************************************/
62
63 /** \addtogroup IfxLld_Smu_Smu_DataStructures
64 * \{ */
65 /** \brief Alarm Global Configuration
66 */
67 typedef struct
68 {
69 uint8 igcs0; /**< \brief AGC.B.IGCS0 */
70 uint8 igcs1; /**< \brief AGC.B.IGCS1 */
71 uint8 igcs2; /**< \brief AGC.B.IGCS2 */
72 uint8 resetConfigSet; /**< \brief AGC.B.RCS */
73 uint8 portEmergencyStop; /**< \brief AGC.B.PES */
74 boolean enableFaultToRunTransition; /**< \brief AGC.B.EFRST */
75 } IfxSmu_Smu_AlarmGlobalConfiguration;
76
77 /** \brief FSP configuration
78 */
79 typedef struct
80 {
81 IfxSmu_FspPrescalar1 prescalar1; /**< \brief FSP.B.PRE1 */
82 IfxSmu_FspPrescalar2 prescalar2; /**< \brief FSP.B.PRE2 */
83 IfxSmu_FspMode mode;
84 boolean portEmergencyStop; /**< \brief FSP.B.PES */
85 uint16 faultStateDurationHigh; /**< \brief FSP.B.TFSP_HIGH */
86 uint16 faultStateDurationLow; /**< \brief FSP.B.TFSP_LOW */
87 } IfxSmu_Smu_FaultSignalingProtocol;
88
89 /** \brief Recovery Timer/s Alarm Configuration
90 */
91 typedef struct
92 {
93 uint8 groupIndex0;
94 uint8 alarmId0;
95 uint8 groupIndex1;
96 uint8 alarmId1;
97 uint8 groupIndex2;
98 uint8 alarmId2;
99 uint8 groupIndex3;
100 uint8 alarmId3;
101 } IfxSmu_Smu_RecoveryTimerAlarmConfiguration;
102
103 /** \brief Recovery Timer Configuration
104 */
105 typedef struct
106 {
107 boolean enableRecoveryTimer0; /**< \brief RTC.B.RT0E */
108 boolean enableRecoveryTimer1; /**< \brief RTC.B.RT1E */
109 uint32 recoveryTimerDuration; /**< \brief RTC.B.RTD */
110 } IfxSmu_Smu_RecoveryTimerConfig;
111
112 /** \} */
113
114 /** \addtogroup IfxLld_Smu_Smu_DataStructures
115 * \{ */
116 typedef struct
117 {
118 IfxSmu_Smu_FaultSignalingProtocol fsp;
119 IfxSmu_Smu_AlarmGlobalConfiguration alarmGlobalConfig;
120 IfxSmu_Smu_RecoveryTimerConfig recoveryTimerConfig;
121 IfxSmu_Smu_RecoveryTimerAlarmConfiguration recoveryTimerAlarmConfig[2]; /**< \brief recovery Timer Alarm 0/1 configuration */
122 uint32 alarmConfigRegister[IFXSMU_NUM_ALARM_GROUPS][3]; /**< \brief AGCF */
123 uint32 fspConfigRegister[IFXSMU_NUM_ALARM_GROUPS]; /**< \brief AGFSP */
124 } IfxSmu_Smu_Config;
125
126 /** \} */
127
128 /** \addtogroup IfxLld_Smu_Smu_SmuFunctions
129 * \{ */
130
131 /******************************************************************************/
132 /*-------------------------Global Function Prototypes-------------------------*/
133 /******************************************************************************/
134
135 /** \brief Fills the configuration stucture of the SMU Module with default values
136 * \param config configuration structure of the module
137 * \return None
138 */
139 IFX_EXTERN void IfxSmu_Smu_initModuleConfig(IfxSmu_Smu_Config *config);
140
141 /** \brief Initialises the SMU Module
142 * \param config configuration structure of the module
143 * \return None
144 */
145 IFX_EXTERN void IfxSmu_Smu_initModule(IfxSmu_Smu_Config *config);
146
147 /** \brief Check if any alarm is Triggered.
148 * \return Returns True if any alarm is set
149 */
150 IFX_EXTERN boolean IfxSmu_Smu_isAlarmTriggered(void);
151
152 /** \} */
153
154 #endif /* IFXSMU_SMU_H */
IfxSmu_Smu_AlarmGlobalConfiguration
Alarm Global Configuration.
Definition: IfxSmu_Smu.h:67
IfxSmu_Smu_initModule
IFX_EXTERN void IfxSmu_Smu_initModule(IfxSmu_Smu_Config *config)
Initialises the SMU Module.
Definition: IfxSmu_Smu.c:152
IFXSMU_NUM_ALARM_GROUPS
#define IFXSMU_NUM_ALARM_GROUPS
Number of SMU Alarm Groups.
Definition: IfxSmu_cfg.h:68
IfxSmu_Smu_FaultSignalingProtocol::prescalar1
IfxSmu_FspPrescalar1 prescalar1
FSP.B.PRE1.
Definition: IfxSmu_Smu.h:81
IfxSmu_cfg.h
Smu on-chip implementation data.
IfxSmu_Smu_AlarmGlobalConfiguration::resetConfigSet
uint8 resetConfigSet
AGC.B.RCS.
Definition: IfxSmu_Smu.h:72
IfxSmu_Smu_RecoveryTimerAlarmConfiguration
Recovery Timer/s Alarm Configuration.
Definition: IfxSmu_Smu.h:91
IfxSmu_Smu_Config::alarmGlobalConfig
IfxSmu_Smu_AlarmGlobalConfiguration alarmGlobalConfig
Definition: IfxSmu_Smu.h:119
IfxSmu_Smu_AlarmGlobalConfiguration::enableFaultToRunTransition
boolean enableFaultToRunTransition
AGC.B.EFRST.
Definition: IfxSmu_Smu.h:74
IfxSmu_Smu_Config::recoveryTimerConfig
IfxSmu_Smu_RecoveryTimerConfig recoveryTimerConfig
Definition: IfxSmu_Smu.h:120
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxSmu_Smu_FaultSignalingProtocol::faultStateDurationLow
uint16 faultStateDurationLow
FSP.B.TFSP_LOW.
Definition: IfxSmu_Smu.h:86
IfxSmu_Smu_initModuleConfig
IFX_EXTERN void IfxSmu_Smu_initModuleConfig(IfxSmu_Smu_Config *config)
Fills the configuration stucture of the SMU Module with default values.
Definition: IfxSmu_Smu.c:52
IfxSmu_FspPrescalar1
IfxSmu_FspPrescalar1
Dividing factor to apply to the reference clock fBACK. The divided clock is used as reference to gene...
Definition: IfxSmu.h:103
IfxSmu_Smu_RecoveryTimerAlarmConfiguration::groupIndex3
uint8 groupIndex3
Definition: IfxSmu_Smu.h:99
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxSmu.h
SMU basic functionality.
IfxSmu_FspMode
IfxSmu_FspMode
Fault Signaling Protocol configuration.
Definition: IfxSmu.h:94
IfxSmu_Smu_RecoveryTimerAlarmConfiguration::alarmId1
uint8 alarmId1
Definition: IfxSmu_Smu.h:96
IfxSmu_Smu_RecoveryTimerConfig::enableRecoveryTimer1
boolean enableRecoveryTimer1
RTC.B.RT1E.
Definition: IfxSmu_Smu.h:108
IfxSmu_Smu_RecoveryTimerAlarmConfiguration::groupIndex1
uint8 groupIndex1
Definition: IfxSmu_Smu.h:95
IfxSmu_Smu_AlarmGlobalConfiguration::igcs0
uint8 igcs0
AGC.B.IGCS0.
Definition: IfxSmu_Smu.h:69
IfxSmu_Smu_AlarmGlobalConfiguration::igcs2
uint8 igcs2
AGC.B.IGCS2.
Definition: IfxSmu_Smu.h:71
IfxSmu_Smu_isAlarmTriggered
IFX_EXTERN boolean IfxSmu_Smu_isAlarmTriggered(void)
Check if any alarm is Triggered.
Definition: IfxSmu_Smu.c:275
IfxSmu_Smu_AlarmGlobalConfiguration::igcs1
uint8 igcs1
AGC.B.IGCS1.
Definition: IfxSmu_Smu.h:70
IfxSmu_Smu_RecoveryTimerAlarmConfiguration::groupIndex0
uint8 groupIndex0
Definition: IfxSmu_Smu.h:93
IfxSmu_Smu_FaultSignalingProtocol
FSP configuration.
Definition: IfxSmu_Smu.h:79
IfxSmu_Smu_FaultSignalingProtocol::prescalar2
IfxSmu_FspPrescalar2 prescalar2
FSP.B.PRE2.
Definition: IfxSmu_Smu.h:82
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxSmu_FspPrescalar2
IfxSmu_FspPrescalar2
Dividing factor to apply to the reference clock fBACK in order to generate the timing of the fault fr...
Definition: IfxSmu.h:117
IfxSmu_Smu_FaultSignalingProtocol::faultStateDurationHigh
uint16 faultStateDurationHigh
FSP.B.TFSP_HIGH.
Definition: IfxSmu_Smu.h:85
IfxSmu_Smu_RecoveryTimerConfig
Recovery Timer Configuration.
Definition: IfxSmu_Smu.h:105
IfxSmu_Smu_RecoveryTimerAlarmConfiguration::groupIndex2
uint8 groupIndex2
Definition: IfxSmu_Smu.h:97
IfxSmu_Smu_RecoveryTimerConfig::recoveryTimerDuration
uint32 recoveryTimerDuration
RTC.B.RTD.
Definition: IfxSmu_Smu.h:109
IfxSmu_Smu_RecoveryTimerAlarmConfiguration::alarmId3
uint8 alarmId3
Definition: IfxSmu_Smu.h:100
IfxSmu_Smu_FaultSignalingProtocol::mode
IfxSmu_FspMode mode
Definition: IfxSmu_Smu.h:83
IfxSmu_Smu_RecoveryTimerAlarmConfiguration::alarmId0
uint8 alarmId0
Definition: IfxSmu_Smu.h:94
IfxSmu_Smu_FaultSignalingProtocol::portEmergencyStop
boolean portEmergencyStop
FSP.B.PES.
Definition: IfxSmu_Smu.h:84
IfxSmu_Smu_AlarmGlobalConfiguration::portEmergencyStop
uint8 portEmergencyStop
AGC.B.PES.
Definition: IfxSmu_Smu.h:73
IfxSmu_Smu_Config
Definition: IfxSmu_Smu.h:116
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxSmu_Smu_RecoveryTimerAlarmConfiguration::alarmId2
uint8 alarmId2
Definition: IfxSmu_Smu.h:98
IfxSmu_Smu_Config::fsp
IfxSmu_Smu_FaultSignalingProtocol fsp
Definition: IfxSmu_Smu.h:118
IfxSmu_Smu_RecoveryTimerConfig::enableRecoveryTimer0
boolean enableRecoveryTimer0
RTC.B.RT0E.
Definition: IfxSmu_Smu.h:107


iLLD_TC38A: IfxSmu_cfg.c Source File

  • _Impl
IfxSmu_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxSmu_cfg.c
3 * \brief Smu on-chip implementation data
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2014 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "_Impl/IfxSmu_cfg.h"
47
48 /******************************************************************************/
49 /*-----------------------Exported Variables/Constants-------------------------*/
50 /******************************************************************************/
IfxSmu_cfg.h
Smu on-chip implementation data.


iLLD_TC38A: IfxSmu_cfg.h Source File

  • _Impl
IfxSmu_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxSmu_cfg.h
3 * \brief Smu on-chip implementation data
4 * \ingroup IfxLld_Smu
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Smu SMU
42 * \ingroup IfxLld
43 * \defgroup IfxLld_Smu_Impl Implementation
44 * \ingroup IfxLld_Smu
45 * \defgroup IfxLld_Smu_Std Standard Driver
46 * \ingroup IfxLld_Smu
47 * \defgroup IfxLld_Smu_Impl_Enum_AlarmGroup Alarm Group Enumeration
48 * \ingroup IfxLld_Smu_Impl
49 * \defgroup IfxLld_Smu_Impl_Enum_ListAlarms List of Alarms Enumeration
50 * \ingroup IfxLld_Smu_Impl
51 */
52
53 #ifndef IFXSMU_CFG_H
54 #define IFXSMU_CFG_H 1
55
56 /******************************************************************************/
57 /*----------------------------------Includes----------------------------------*/
58 /******************************************************************************/
59
60 #include "Cpu/Std/Ifx_Types.h"
61
62 /******************************************************************************/
63 /*-----------------------------------Macros-----------------------------------*/
64 /******************************************************************************/
65
66 /** \brief Number of SMU Alarm Groups
67 */
68 #define IFXSMU_NUM_ALARM_GROUPS (12)
69
70 /******************************************************************************/
71 /*-------------------------------Enumerations---------------------------------*/
72 /******************************************************************************/
73
74 /** \brief SMU Alarms
75 */
76 typedef enum
77 {
78 IfxSmu_Alarm_CPU0_Lockstep_ComparatorError = 0, /**< \brief ALM0[0] : Safety Mechanism: Lockstep CPU Alarm: Lockstep Comparator Error*/
79 IfxSmu_Alarm_CPU0_Buslevel_MpuViolation = 1, /**< \brief ALM0[1] : Safety Mechanism: Bus-level Memory Protection Unit Alarm: Bus-level MPU violation.*/
80 IfxSmu_Alarm_CPU0_PFI0_PFLASH0_ReadPathError = 2, /**< \brief ALM0[2] : Safety Mechanism: PFLASH Read Path Monitor Alarm: PFLASH0 Read Path Error*/
81 IfxSmu_Alarm_CPU0_PCACHETAG_UncorrectableErrorDetection = 4, /**< \brief ALM0[4] : Safety Mechanism: SRAM Monitor Alarm: PCACHE TAG Uncorrectable error detection */
82 IfxSmu_Alarm_CPU0_PCACHETAG_MiscellaneousErrorDetection = 5, /**< \brief ALM0[5] : Safety Mechanism: SRAM Monitor Alarm: PCACHE TAG Miscellaneous error detection*/
83 IfxSmu_Alarm_CPU0_PSPRPCACHE_SingleBitErrorCorrection = 6, /**< \brief ALM0[6] : Safety Mechanism: SRAM Monitor Alarm: PSPR/PCACHE Single bit error correction*/
84 IfxSmu_Alarm_CPU0_PSPRPCACHE_UncorrectableErrorDetection = 7, /**< \brief ALM0[7] : Safety Mechanism: SRAM Monitor Alarm: PSPR/PCACHE Uncorrectable error detection */
85 IfxSmu_Alarm_CPU0_PSPRPCACHE_MiscellaneousErrorDetection = 8, /**< \brief ALM0[8] : Safety Mechanism: SRAM Monitor Alarm: PSPR/PCACHE Miscellaneous error detection*/
86 IfxSmu_Alarm_CPU0_DSPRDCACHEDLMU_SingleBitErrorCorrection = 9, /**< \brief ALM0[9] : Safety Mechanism: SRAM Monitor Alarm: DSPR/DCACHE/DLMU Single bit error correction*/
87 IfxSmu_Alarm_CPU0_DSPRDCACHEDLMU_UncorrectableErrorDetection = 10, /**< \brief ALM0[10] : Safety Mechanism(s): SRAM Monitor Alarm: DSPR/DCACHE/DLMU Uncorrectable error detection */
88 IfxSmu_Alarm_CPU0_DSPRDCACHEDLMU_MiscelleniousErrorDetection = 11, /**< \brief ALM0[11] : Safety Mechanism(s): SRAM Monitor Alarm: DSPR/DCACHE/DLMU Miscellenious error detection*/
89 IfxSmu_Alarm_CPU0_DCACHETAG_SingleBitErrorCorrection = 12, /**< \brief ALM0[12] : Safety Mechanism: SRAM Monitor Alarm: DCACHE TAG Single bit error correction*/
90 IfxSmu_Alarm_CPU0_DCACHETAG_UncorrectableErrorDetection = 13, /**< \brief ALM0[13] : Safety Mechanism: SRAM Monitor Alarm: DCACHE TAG Uncorrectable error detection */
91 IfxSmu_Alarm_CPU0_DCACHETAG_MiscellaneousErrorDetection = 14, /**< \brief ALM0[14] : Safety Mechanism: SRAM Monitor Alarm: DCACHE TAG Miscellaneous error detection*/
92 IfxSmu_Alarm_CPU0_CPU_InstructionFetchSriInterfaceEdcError = 22, /**< \brief ALM0[22] : Safety Mechanism: SRI End-to-End EDC Alarm: CPU Instruction Fetch SRI Interface EDC Error*/
93 IfxSmu_Alarm_CPU0_CPU_DataSriInterfaceLoadStoreEdcError = 23, /**< \brief ALM0[23] : Safety Mechanism: SRI End-to-End EDC Alarm: CPU Data SRI Interface (Load/Store) EDC Error*/
94 IfxSmu_Alarm_CPU0_CPU_ExceptionInterruptTrap = 24, /**< \brief ALM0[24] : Safety Mechanism: Exception Monitor Alarm: CPU exception (interrupt/trap) */
95 IfxSmu_Alarm_CPU1_Lockstep_ComparatorError = 32, /**< \brief ALM1[0] : Safety Mechanism: Lockstep CPU Alarm: Lockstep Comparator Error*/
96 IfxSmu_Alarm_CPU1_Buslevel_MpuViolation = 33, /**< \brief ALM1[1] : Safety Mechanism: Bus-level Memory Protection Unit Alarm: Bus-level MPU violation.*/
97 IfxSmu_Alarm_CPU1_PFI1_PFLASH1_ReadPathError = 34, /**< \brief ALM1[2] : Safety Mechanism: PFLASH Read Path Monitor Alarm: PFLASH1 Read Path Error*/
98 IfxSmu_Alarm_CPU1_PCACHETAG_UncorrectableErrorDetection = 36, /**< \brief ALM1[4] : Safety Mechanism: SRAM Monitor Alarm: PCACHE TAG Uncorrectable error detection */
99 IfxSmu_Alarm_CPU1_PCACHETAG_MiscellaneousErrorDetection = 37, /**< \brief ALM1[5] : Safety Mechanism: SRAM Monitor Alarm: PCACHE TAG Miscellaneous error detection*/
100 IfxSmu_Alarm_CPU1_PSPRPCACHE_SingleBitErrorCorrection = 38, /**< \brief ALM1[6] : Safety Mechanism: SRAM Monitor Alarm: PSPR/PCACHE Single bit error correction*/
101 IfxSmu_Alarm_CPU1_PSPRPCACHE_UncorrectableErrorDetection = 39, /**< \brief ALM1[7] : Safety Mechanism: SRAM Monitor Alarm: PSPR/PCACHE Uncorrectable error detection */
102 IfxSmu_Alarm_CPU1_PSPRPCACHE_MiscellaneousErrorDetection = 40, /**< \brief ALM1[8] : Safety Mechanism: SRAM Monitor Alarm: PSPR/PCACHE Miscellaneous error detection*/
103 IfxSmu_Alarm_CPU1_DSPRDCACHEDLMU_SingleBitErrorCorrection = 41, /**< \brief ALM1[9] : Safety Mechanism: SRAM Monitor Alarm: DSPR/DCACHE/DLMU Single bit error correction*/
104 IfxSmu_Alarm_CPU1_DSPRDCACHEDLMU_UncorrectableErrorDetection = 42, /**< \brief ALM1[10] : Safety Mechanism(s): SRAM Monitor Alarm: DSPR/DCACHE/DLMU Uncorrectable error detection */
105 IfxSmu_Alarm_CPU1_DSPRDCACHEDLMU_MiscellaneousErrorDetection = 43, /**< \brief ALM1[11] : Safety Mechanism(s): SRAM Monitor Alarm: DSPR/DCACHE/DLMU Miscellaneous error detection*/
106 IfxSmu_Alarm_CPU1_DCACHETAG_SingleBitErrorCorrection = 44, /**< \brief ALM1[12] : Safety Mechanism: SRAM Monitor Alarm: DCACHE TAG Single bit error correction*/
107 IfxSmu_Alarm_CPU1_DCACHETAG_UncorrectableErrorDetection = 45, /**< \brief ALM1[13] : Safety Mechanism: SRAM Monitor Alarm: DCACHE TAG Uncorrectable error detection */
108 IfxSmu_Alarm_CPU1_DCACHETAG_MiscellaneousErrorDetection = 46, /**< \brief ALM1[14] : Safety Mechanism: SRAM Monitor Alarm: DCACHE TAG Miscellaneous error detection*/
109 IfxSmu_Alarm_CPU1_CPU_InstructionFetchSriInterfaceEdcError = 54, /**< \brief ALM1[22] : Safety Mechanism: SRI End-to-End EDC Alarm: CPU Instruction Fetch SRI Interface EDC Error*/
110 IfxSmu_Alarm_CPU1_CPU_DataSriInterfaceLoadStoreEdcError = 55, /**< \brief ALM1[23] : Safety Mechanism: SRI End-to-End EDC Alarm: CPU Data SRI Interface (Load/Store) EDC Error*/
111 IfxSmu_Alarm_CPU1_CPU_ExceptionInterruptTrap = 56, /**< \brief ALM1[24] : Safety Mechanism: Exception Monitor Alarm: CPU exception (interrupt/trap) */
112 IfxSmu_Alarm_CPU2_Lockstep_ComparatorError = 64, /**< \brief ALM2[0] : Safety Mechanism: Lockstep CPU Alarm: Lockstep Comparator Error*/
113 IfxSmu_Alarm_CPU2_Buslevel_MpuViolation = 65, /**< \brief ALM2[1] : Safety Mechanism: Bus-level Memory Protection Unit Alarm: Bus-level MPU violation.*/
114 IfxSmu_Alarm_CPU2_PFI2_PFLASH2_ReadPathError = 66, /**< \brief ALM2[2] : Safety Mechanism: PFLASH Read Path Monitor Alarm: PFLASH2 Read Path Error*/
115 IfxSmu_Alarm_CPU2_PCACHETAG_UncorrectableErrorDetection = 68, /**< \brief ALM2[4] : Safety Mechanism: SRAM Monitor Alarm: PCACHE TAG Uncorrectable error detection */
116 IfxSmu_Alarm_CPU2_PCACHETAG_MiscellaneousErrorDetection = 69, /**< \brief ALM2[5] : Safety Mechanism: SRAM Monitor Alarm: PCACHE TAG Miscellaneous error detection*/
117 IfxSmu_Alarm_CPU2_PSPRPCACHE_SingleBitErrorCorrection = 70, /**< \brief ALM2[6] : Safety Mechanism: SRAM Monitor Alarm: PSPR/PCACHE Single bit error correction*/
118 IfxSmu_Alarm_CPU2_PSPRPCACHE_UncorrectableErrorDetection = 71, /**< \brief ALM2[7] : Safety Mechanism: SRAM Monitor Alarm: PSPR/PCACHE Uncorrectable error detection */
119 IfxSmu_Alarm_CPU2_PSPRPCACHE_MiscellaneousErrorDetection = 72, /**< \brief ALM2[8] : Safety Mechanism: SRAM Monitor Alarm: PSPR/PCACHE Miscellaneous error detection*/
120 IfxSmu_Alarm_CPU2_DSPRDCACHEDLMU_SingleBitErrorCorrection = 73, /**< \brief ALM2[9] : Safety Mechanism: SRAM Monitor Alarm: DSPR/DCACHE/DLMU Single bit error correction*/
121 IfxSmu_Alarm_CPU2_DSPRDCACHEDLMU_UncorrectableErrorDetection = 74, /**< \brief ALM2[10] : Safety Mechanism(s): SRAM Monitor Alarm: DSPR/DCACHE/DLMU Uncorrectable error detection */
122 IfxSmu_Alarm_CPU2_DSPRDCACHEDLMU_MiscellaneousErrorDetection = 75, /**< \brief ALM2[11] : Safety Mechanism(s): SRAM Monitor Alarm: DSPR/DCACHE/DLMU Miscellaneous error detection*/
123 IfxSmu_Alarm_CPU2_DCACHETAG_SingleBitErrorCorrection = 76, /**< \brief ALM2[12] : Safety Mechanism: SRAM Monitor Alarm: DCACHE TAG Single bit error correction*/
124 IfxSmu_Alarm_CPU2_DCACHETAG_UncorrectableErrorDetection = 77, /**< \brief ALM2[13] : Safety Mechanism: SRAM Monitor Alarm: DCACHE TAG Uncorrectable error detection */
125 IfxSmu_Alarm_CPU2_DCACHETAG_MiscellaneousErrorDetection = 78, /**< \brief ALM2[14] : Safety Mechanism: SRAM Monitor Alarm: DCACHE TAG Miscellaneous error detection*/
126 IfxSmu_Alarm_CPU2_CPU_InstructionFetchSriInterfaceEdcError = 86, /**< \brief ALM2[22] : Safety Mechanism: SRI End-to-End EDC Alarm: CPU Instruction Fetch SRI Interface EDC Error*/
127 IfxSmu_Alarm_CPU2_CPU_DataSriInterfaceLoadStoreEdcError = 87, /**< \brief ALM2[23] : Safety Mechanism: SRI End-to-End EDC Alarm: CPU Data SRI Interface (Load/Store) EDC Error*/
128 IfxSmu_Alarm_CPU2_CPU_ExceptionInterruptTrap = 88, /**< \brief ALM2[24] : Safety Mechanism: Exception Monitor Alarm: CPU exception (interrupt/trap) */
129 IfxSmu_Alarm_CPU3_Lockstep_ComparatorError = 96, /**< \brief ALM3[0] : Safety Mechanism: Lockstep CPU Alarm: Lockstep Comparator Error*/
130 IfxSmu_Alarm_CPU3_Buslevel_MpuViolation = 97, /**< \brief ALM3[1] : Safety Mechanism: Bus-level Memory Protection Unit Alarm: Bus-level MPU violation.*/
131 IfxSmu_Alarm_CPU3_PFI3_PFLASH3_ReadPathError = 98, /**< \brief ALM3[2] : Safety Mechanism: PFLASH Read Path Monitor Alarm: PFLASH3 Read Path Error*/
132 IfxSmu_Alarm_CPU3_PCACHETAG_UncorrectableErrorDetection = 100, /**< \brief ALM3[4] : Safety Mechanism: SRAM Monitor Alarm: PCACHE TAG Uncorrectable error detection */
133 IfxSmu_Alarm_CPU3_PCACHETAG_MiscellaneousErrorDetection = 101, /**< \brief ALM3[5] : Safety Mechanism: SRAM Monitor Alarm: PCACHE TAG Miscellaneous error detection*/
134 IfxSmu_Alarm_CPU3_PSPRPCACHE_SingleBitErrorCorrection = 102, /**< \brief ALM3[6] : Safety Mechanism: SRAM Monitor Alarm: PSPR/PCACHE Single bit error correction*/
135 IfxSmu_Alarm_CPU3_PSPRPCACHE_UncorrectableErrorDetection = 103, /**< \brief ALM3[7] : Safety Mechanism: SRAM Monitor Alarm: PSPR/PCACHE Uncorrectable error detection */
136 IfxSmu_Alarm_CPU3_PSPRPCACHE_MiscellaneousErrorDetection = 104, /**< \brief ALM3[8] : Safety Mechanism: SRAM Monitor Alarm: PSPR/PCACHE Miscellaneous error detection*/
137 IfxSmu_Alarm_CPU3_DSPRDCACHEDLMU_SingleBitErrorCorrection = 105, /**< \brief ALM3[9] : Safety Mechanism: SRAM Monitor Alarm: DSPR/DCACHE/DLMU Single bit error correction*/
138 IfxSmu_Alarm_CPU3_DSPRDCACHEDLMU_UncorrectableErrorDetection = 106, /**< \brief ALM3[10] : Safety Mechanism(s): SRAM Monitor Alarm: DSPR/DCACHE/DLMU Uncorrectable error detection */
139 IfxSmu_Alarm_CPU3_DSPRDCACHEDLMU_MiscellaneousErrorDetection = 107, /**< \brief ALM3[11] : Safety Mechanism(s): SRAM Monitor Alarm: DSPR/DCACHE/DLMU Miscellaneous error detection*/
140 IfxSmu_Alarm_CPU3_DCACHETAG_SingleBitErrorCorrection = 108, /**< \brief ALM3[12] : Safety Mechanism: SRAM Monitor Alarm: DCACHE TAG Single bit error correction*/
141 IfxSmu_Alarm_CPU3_DCACHETAG_UncorrectableErrorDetection = 109, /**< \brief ALM3[13] : Safety Mechanism: SRAM Monitor Alarm: DCACHE TAG Uncorrectable error detection */
142 IfxSmu_Alarm_CPU3_DCACHETAG_MiscellaneousErrorDetection = 110, /**< \brief ALM3[14] : Safety Mechanism: SRAM Monitor Alarm: DCACHE TAG Miscellaneous error detection*/
143 IfxSmu_Alarm_CPU3_CPU_InstructionFetchSriInterfaceEdcError = 118, /**< \brief ALM3[22] : Safety Mechanism: SRI End-to-End EDC Alarm: CPU Instruction Fetch SRI Interface EDC Error*/
144 IfxSmu_Alarm_CPU3_CPU_DataSriInterfaceLoadStoreEdcError = 119, /**< \brief ALM3[23] : Safety Mechanism: SRI End-to-End EDC Alarm: CPU Data SRI Interface (Load/Store) EDC Error*/
145 IfxSmu_Alarm_CPU3_CPU_ExceptionInterruptTrap = 120, /**< \brief ALM3[24] : Safety Mechanism: Exception Monitor Alarm: CPU exception (interrupt/trap) */
146 IfxSmu_Alarm_MTU_Safety_FfUncorrectableErrorDetected = 192, /**< \brief ALM6[0] : Safety Mechanism: Safety FlipFlop Alarm: Safety FF uncorrectable error detected*/
147 IfxSmu_Alarm_IOM_Safety_FfUncorrectableErrorDetected = 193, /**< \brief ALM6[1] : Safety Mechanism: Safety FlipFlop Alarm: Safety FF uncorrectable error detected*/
148 IfxSmu_Alarm_IR_Safety_FfUncorrectableErrorDetected = 194, /**< \brief ALM6[2] : Safety Mechanism: Safety FlipFlop Alarm: Safety FF uncorrectable error detected*/
149 IfxSmu_Alarm_EMEM_Safety_FfUncorrectableErrorDetected = 195, /**< \brief ALM6[3] : Safety Mechanism: Safety FlipFlop Alarm: Safety FF uncorrectable error detected*/
150 IfxSmu_Alarm_SCU_Safety_FfUncorrectableErrorDetected = 196, /**< \brief ALM6[4] : Safety Mechanism: Safety FlipFlop Alarm: Safety FF uncorrectable error detected*/
151 IfxSmu_Alarm_PMS_Safety_FfUncorrectableErrorDetected = 197, /**< \brief ALM6[5] : Safety Mechanism: Safety FlipFlop Alarm: Safety FF uncorrectable error detected*/
152 IfxSmu_Alarm_DMA_Safety_FfUncorrectableErrorDetected = 198, /**< \brief ALM6[6] : Safety Mechanism: Safety FlipFlop Alarm: Safety FF uncorrectable error detected*/
153 IfxSmu_Alarm_SMU_core_Safety_FfUncorrectableErrorDetected = 199, /**< \brief ALM6[7] : Safety Mechanism: Safety FlipFlop Alarm: Safety FF uncorrectable error detected*/
154 IfxSmu_Alarm_SYS_PLL_PER_PLL_Safety_FfUncorrectableErrorDetected = 200, /**< \brief ALM6[8] : Safety Mechanism: Safety FlipFlop Alarm: Safety FF uncorrectable error detected*/
155 IfxSmu_Alarm_GTM_GTM_SingleBitErrorCorrection = 202, /**< \brief ALM6[10] : Safety Mechanism: SRAM Monitor Alarm: GTM Single bit error correction*/
156 IfxSmu_Alarm_GTM_GTM_UncorrectableErrorDetection = 203, /**< \brief ALM6[11] : Safety Mechanism: SRAM Monitor Alarm: GTM Uncorrectable error detection */
157 IfxSmu_Alarm_GTM_GTM_MiscellaneousErrorDetection = 204, /**< \brief ALM6[12] : Safety Mechanism: SRAM Monitor Alarm: GTM Miscellaneous error detection*/
158 IfxSmu_Alarm_ERAY_ERAY_SingleBitErrorCorrection = 205, /**< \brief ALM6[13] : Safety Mechanism: SRAM Monitor Alarm: ERAY Single bit error correction*/
159 IfxSmu_Alarm_ERAY_ERAY_UncorrectableErrorDetection = 206, /**< \brief ALM6[14] : Safety Mechanism: SRAM Monitor Alarm: ERAY Uncorrectable error detection */
160 IfxSmu_Alarm_ERAY_ERAY_MiscellaneousErrorDetection = 207, /**< \brief ALM6[15] : Safety Mechanism: SRAM Monitor Alarm: ERAY Miscellaneous error detection*/
161 IfxSmu_Alarm_CAN_CAN_SingleBitErrorCorrection = 208, /**< \brief ALM6[16] : Safety Mechanism: SRAM Monitor Alarm: CAN Single bit error correction*/
162 IfxSmu_Alarm_CAN_CAN_UncorrectableErrorDetection = 209, /**< \brief ALM6[17] : Safety Mechanism: SRAM Monitor Alarm: CAN Uncorrectable error detection */
163 IfxSmu_Alarm_CAN_CAN_MiscellaneousErrorDetection = 210, /**< \brief ALM6[18] : Safety Mechanism: SRAM Monitor Alarm: CAN Miscellaneous error detection*/
164 IfxSmu_Alarm_Misc_MISC_SingleBitErrorCorrection = 211, /**< \brief ALM6[19] : Safety Mechanism: SRAM Monitor Alarm: MISC Single bit error correction*/
165 IfxSmu_Alarm_Misc_MISC_UncorrectableErrorDetection = 212, /**< \brief ALM6[20] : Safety Mechanism: SRAM Monitor Alarm: MISC Uncorrectable error detection */
166 IfxSmu_Alarm_Misc_MISC_MiscellaneousErrorDetection = 213, /**< \brief ALM6[21] : Safety Mechanism: SRAM Monitor Alarm: MISC Miscellaneous error detection*/
167 IfxSmu_Alarm_CERBERUS_Safety_FfUncorrectableErrorDetected = 215, /**< \brief ALM6[23] : Safety Mechanism: Safety FlipFlop Alarm: Safety FF uncorrectable error detected*/
168 IfxSmu_Alarm_CCU_Safety_FfCorrectableErrorDetected = 216, /**< \brief ALM6[24] : Safety Mechanism: Safety FlipFlop Alarm: Safety FF correctable error detected*/
169 IfxSmu_Alarm_CCU_Safety_FfUncorrectableErrorDetected = 217, /**< \brief ALM6[25] : Safety Mechanism: Safety FlipFlop Alarm: Safety FF uncorrectable error detected*/
170 IfxSmu_Alarm_LMU_FSI_RAM_LMUDMU_SingleBitErrorCorrection = 224, /**< \brief ALM7[0] : Safety Mechanism: SRAM Monitor Alarm: LMU/DMU Single bit error correction*/
171 IfxSmu_Alarm_LMU_FSI_RAM_LMUDMU_UncorrectableErrorDetection = 225, /**< \brief ALM7[1] : Safety Mechanism: SRAM Monitor Alarm: LMU/DMU Uncorrectable error detection */
172 IfxSmu_Alarm_LMU_FSI_RAM_LMUDMU_MiscellaneousErrorDetection = 226, /**< \brief ALM7[2] : Safety Mechanism: SRAM Monitor Alarm: LMU/DMU Miscellaneous error detection*/
173 IfxSmu_Alarm_LMU_Lockstep_ComparatorError = 236, /**< \brief ALM7[12] : Safety Mechanism: LMU Lockstep Alarm: Lockstep Comparator Error*/
174 IfxSmu_Alarm_LMU_Lockstep_ControlError = 237, /**< \brief ALM7[13] : Safety Mechanism: LMU Lockstep Alarm: Lockstep Control Error*/
175 IfxSmu_Alarm_LMU_ECC_Error = 238, /**< \brief ALM7[14] : Safety Mechanism: SRAM ECC Monitor Alarm: ECC Error*/
176 IfxSmu_Alarm_LMU_Buslevel_MpuError = 239, /**< \brief ALM7[15] : Safety Mechanism: Bus-level MPU Alarm: Bus-level MPU error*/
177 IfxSmu_Alarm_LMU_EDC_ReadPhaseError = 240, /**< \brief ALM7[16] : Safety Mechanism: LMU Error Detection Code (EDC) Alarm: EDC Read Phase Error*/
178 IfxSmu_Alarm_XBAR0_SRI_BusErrorEvent = 241, /**< \brief ALM7[17] : Safety Mechanism: Built-in SRI Error Detection Alarm: SRI Bus Error Event*/
179 IfxSmu_Alarm_XBAR1_SRI_BusErrorEvent = 242, /**< \brief ALM7[18] : Safety Mechanism: Built-in SRI Error Detection Alarm: SRI Bus Error Event*/
180 IfxSmu_Alarm_XBAR2_SRI_BusErrorEvent = 243, /**< \brief ALM7[19] : Safety Mechanism: Built-in SRI Error Detection Alarm: SRI Bus Error Event*/
181 IfxSmu_Alarm_SPB_BusErrorEvent = 244, /**< \brief ALM7[20] : Safety Mechanism: Built-in SPB Error Detection Alarm: SPB Bus Error Event */
182 IfxSmu_Alarm_BBB_BusErrorEvent = 245, /**< \brief ALM7[21] : Safety Mechanism: Built-in BBB Error Detection Alarm: BBB Bus Error Event */
183 IfxSmu_Alarm_FSI_PFlash_SingleBitError = 246, /**< \brief ALM7[22] : Safety Mechanism: PFlash ECC Alarm: PFlash Single Bit Error*/
184 IfxSmu_Alarm_FSI_PFlash_DoubleBitError = 247, /**< \brief ALM7[23] : Safety Mechanism: PFlash ECC Alarm: PFlash Double Bit Error*/
185 IfxSmu_Alarm_FSI_Single_BitCorrectionTrackingBufferFull = 248, /**< \brief ALM7[24] : Safety Mechanism: PFlash ECC Alarm: Single Bit Correction Tracking Buffer Full*/
186 IfxSmu_Alarm_FSI_Double_BitCorrectionTrackingBufferFull = 249, /**< \brief ALM7[25] : Safety Mechanism: PFlash ECC Alarm: Double Bit Correction Tracking Buffer Full*/
187 IfxSmu_Alarm_FSI_Multiple_BitErrorDetectionTrackingBufferFull = 250, /**< \brief ALM7[26] : Safety Mechanism: PFlash ECC Alarm: Multiple Bit Error Detection Tracking Buffer Full */
188 IfxSmu_Alarm_FSI_Zero_BitErrorTrackingBufferFull = 251, /**< \brief ALM7[27] : Safety Mechanism: PFlash ECC Alarm: Zero Bit Error Tracking Buffer Full*/
189 IfxSmu_Alarm_FSI_PFlash_EccError = 252, /**< \brief ALM7[28] : Safety Mechanism: PFlash ECC Monitor Alarm: PFlash ECC Error*/
190 IfxSmu_Alarm_FSI_PFlash_EdcError = 253, /**< \brief ALM7[29] : Safety Mechanism: PFlash EDC Monitor Alarm: PFlash EDC Error*/
191 IfxSmu_Alarm_FSI_CPUFLASHCON_ConfigurationError = 254, /**< \brief ALM7[30] : Safety Mechanism: PFlash Configuration Monitor Alarm: CPU FLASHCON Configuration Error*/
192 IfxSmu_Alarm_FSI_Flash_StoredConfigurationError = 255, /**< \brief ALM7[31] : Safety Mechanism: PFlash Configuration Monitor Alarm: Flash Stored Configuration Error*/
193 IfxSmu_Alarm_SCU_OS_CClockFrequencyOutOfRange = 256, /**< \brief ALM8[0] : Safety Mechanism: Clock Monitor Alarm: OSC clock frequency out of range */
194 IfxSmu_Alarm_CCU_Backup_ClockOutOfRangeAlarm = 257, /**< \brief ALM8[1] : Safety Mechanism: Clock Monitor Alarm: Back-up clock out-of-range alarm */
195 IfxSmu_Alarm_CCU_Backup_ClockAliveAlarm = 258, /**< \brief ALM8[2] : Safety Mechanism: Clock Alive Monitor Alarm: Back-up clock alive alarm */
196 IfxSmu_Alarm_SCU_System_PllDcoLossOfLockEvent = 259, /**< \brief ALM8[3] : Safety Mechanism: PLL loss of lock detection Alarm: System PLL DCO loss of lock event*/
197 IfxSmu_Alarm_SCU_Peripheral_PllDcoLossOfLockEvent = 260, /**< \brief ALM8[4] : Safety Mechanism: PLL loss of lock detection Alarm: Peripheral PLL DCO loss of lock event*/
198 IfxSmu_Alarm_SCU_LBIST_Alarm = 261, /**< \brief ALM8[5] : Safety Mechanism: LBIST Safe Reset State Alarm: LBIST Alarm*/
199 IfxSmu_Alarm_SCU_External_RequestUnitAlarm0 = 262, /**< \brief ALM8[6] : Safety Mechanism: External Alarm Alarm: External Request Unit Alarm 0*/
200 IfxSmu_Alarm_SCU_External_RequestUnitAlarm1 = 263, /**< \brief ALM8[7] : Safety Mechanism: External Alarm Alarm: External Request Unit Alarm 1*/
201 IfxSmu_Alarm_SCU_External_RequestUnitAlarm2 = 264, /**< \brief ALM8[8] : Safety Mechanism: External Alarm Alarm: External Request Unit Alarm 2*/
202 IfxSmu_Alarm_SCU_External_RequestUnitAlarm3 = 265, /**< \brief ALM8[9] : Safety Mechanism: External Alarm Alarm: External Request Unit Alarm 3*/
203 IfxSmu_Alarm_SCU_CPU0_WatchdogTimeOut = 266, /**< \brief ALM8[10] : Safety Mechanism: Watchdog Alarm: CPU0 Watchdog time-out*/
204 IfxSmu_Alarm_SCU_CPU1_WatchdogTimeOut = 267, /**< \brief ALM8[11] : Safety Mechanism: Watchdog Alarm: CPU1 Watchdog time-out*/
205 IfxSmu_Alarm_SCU_CPU2_WatchdogTimeOut = 268, /**< \brief ALM8[12] : Safety Mechanism: Watchdog Alarm: CPU2 Watchdog time-out*/
206 IfxSmu_Alarm_SCU_CPU3_WatchdogTimeOut = 269, /**< \brief ALM8[13] : Safety Mechanism: Watchdog Alarm: CPU3 Watchdog time-out*/
207 IfxSmu_Alarm_SCU_Safety_WatchdogTimeOut = 272, /**< \brief ALM8[16] : Safety Mechanism: Watchdog Alarm: Safety Watchdog time-out*/
208 IfxSmu_Alarm_SCU_Watchdog_TimeOut = 273, /**< \brief ALM8[17] : Safety Mechanism: All Watchdogs Alarm: watchdog time-out */
209 IfxSmu_Alarm_SCU_Lockstep_DualRailError = 274, /**< \brief ALM8[18] : Safety Mechanism: Lockstep Dual Rail Monitor Alarm: dual rail error */
210 IfxSmu_Alarm_SCU_External_EmergencyStopSignalEvent = 275, /**< \brief ALM8[19] : Safety Mechanism: Emergency Stop Alarm: External Emergency Stop Signal Event*/
211 IfxSmu_Alarm_SCU_Pad_HeatingAlarm = 276, /**< \brief ALM8[20] : Safety Mechanism: Pad Monitor Alarm: Pad heating alarm*/
212 IfxSmu_Alarm_SCU_LBIST_TestModeAlarm = 277, /**< \brief ALM8[21] : Safety Mechanism: LBIST Test Mode Alarm: LBIST Test Mode Alarm*/
213 IfxSmu_Alarm_IR_EDC_ConfigurationDataPathError = 278, /**< \brief ALM8[22] : Safety Mechanism: Interrupt Monitor Alarm: EDC Configuration Data Path Error */
214 IfxSmu_Alarm_DMA_DMASRI_EccError = 279, /**< \brief ALM8[23] : Safety Mechanism: DMA SRI ECC Alarm: DMA SRI ECC Error */
215 IfxSmu_Alarm_IOM_Pin_MismatchIndication = 281, /**< \brief ALM8[25] : Safety Mechanism: External Alarm Alarm: Pin Mismatch Indication*/
216 IfxSmu_Alarm_SCU_External_RequestUnitAlarm4 = 282, /**< \brief ALM8[26] : Safety Mechanism: External Alarm Alarm: External Request Unit Alarm 4*/
217 IfxSmu_Alarm_SCU_External_RequestUnitAlarm5 = 283, /**< \brief ALM8[27] : Safety Mechanism: External Alarm Alarm: External Request Unit Alarm 5*/
218 IfxSmu_Alarm_SCU_External_RequestUnitAlarm6 = 284, /**< \brief ALM8[28] : Safety Mechanism: External Alarm Alarm: External Request Unit Alarm 6*/
219 IfxSmu_Alarm_SCU_External_RequestUnitAlarm7 = 285, /**< \brief ALM8[29] : Safety Mechanism: External Alarm Alarm: External Request Unit Alarm 7*/
220 IfxSmu_Alarm_DTS_core_Under_TemperatureAlarm = 286, /**< \brief ALM8[30] : Safety Mechanism: Core Domain Die Temperature Sensor Alarm: Under Temperature Alarm*/
221 IfxSmu_Alarm_DTS_core_Over_TemperatureAlarm = 287, /**< \brief ALM8[31] : Safety Mechanism: Core Domain Die Temperature Sensor Alarm: Over Temperature Alarm*/
222 IfxSmu_Alarm_DTS_Temperature_Overflow = 288, /**< \brief ALM9[0] : Safety Mechanism: Die Temperature Sensor Alarm: Temperature overflow */
223 IfxSmu_Alarm_DTS_Temperature_Underflow = 289, /**< \brief ALM9[1] : Safety Mechanism: Die Temperature Sensor Alarm: Temperature underflow*/
224 IfxSmu_Alarm_EVR_Overvoltage_Alarm = 291, /**< \brief ALM9[3] : Safety Mechanism: Voltage Monitor Alarm: Over-voltage Alarm*/
225 IfxSmu_Alarm_EVR_Undervoltage_Alarm = 293, /**< \brief ALM9[5] : Safety Mechanism: Voltage Monitor Alarm: Under-voltage Alarm*/
226 IfxSmu_Alarm_EVR_Short_ToLowHightAlarm = 303, /**< \brief ALM9[15] : Safety Mechanism: Voltage Monitor Alarm: Short to low/hight Alarm*/
227 IfxSmu_Alarm_HSM_Overvoltage_Alarm = 304, /**< \brief ALM9[16] : Safety Mechanism: Voltage Monitor Alarm: Over-voltage Alarm*/
228 IfxSmu_Alarm_HSM_Undervoltage_Alarm = 305, /**< \brief ALM9[17] : Safety Mechanism: Voltage Monitor Alarm: Under-voltage Alarm*/
229 IfxSmu_Alarm_EMEM_Unexpected_WriteToEmemAlarm = 308, /**< \brief ALM9[20] : Safety Mechanism: EMEM Monitor Alarm: Unexpected Write to EMEM Alarm*/
230 IfxSmu_Alarm_EMEM_SEP_ControlLogicAlarm = 309, /**< \brief ALM9[21] : Safety Mechanism: SEP Control Logic Monitor Alarm: SEP Control Logic Alarm*/
231 IfxSmu_Alarm_EMEM_Lockstep_ControlLogicInputAlarm = 310, /**< \brief ALM9[22] : Safety Mechanism: Lockstep Control Logic Input Monitor Alarm: Lockstep Control Logic Input Alarm*/
232 IfxSmu_Alarm_Software_Alarm0 = 320, /**< \brief ALM10[0] : Safety Mechanism: Software Monitor Alarm: Software Alarm 0*/
233 IfxSmu_Alarm_Software_Alarm1 = 321, /**< \brief ALM10[1] : Safety Mechanism: Software Monitor Alarm: Software Alarm 1*/
234 IfxSmu_Alarm_Software_Alarm2 = 322, /**< \brief ALM10[2] : Safety Mechanism: Software Monitor Alarm: Software Alarm 2*/
235 IfxSmu_Alarm_Software_Alarm3 = 323, /**< \brief ALM10[3] : Safety Mechanism: Software Monitor Alarm: Software Alarm 3*/
236 IfxSmu_Alarm_Software_Alarm4 = 324, /**< \brief ALM10[4] : Safety Mechanism: Software Monitor Alarm: Software Alarm 4*/
237 IfxSmu_Alarm_Software_Alarm5 = 325, /**< \brief ALM10[5] : Safety Mechanism: Software Monitor Alarm: Software Alarm 5*/
238 IfxSmu_Alarm_Software_Alarm6 = 326, /**< \brief ALM10[6] : Safety Mechanism: Software Monitor Alarm: Software Alarm 6*/
239 IfxSmu_Alarm_Software_Alarm7 = 327, /**< \brief ALM10[7] : Safety Mechanism: Software Monitor Alarm: Software Alarm 7*/
240 IfxSmu_Alarm_Software_Alarm8 = 328, /**< \brief ALM10[8] : Safety Mechanism: Software Monitor Alarm: Software Alarm 8*/
241 IfxSmu_Alarm_Software_Alarm9 = 329, /**< \brief ALM10[9] : Safety Mechanism: Software Monitor Alarm: Software Alarm 9*/
242 IfxSmu_Alarm_Software_Alarm10 = 330, /**< \brief ALM10[10] : Safety Mechanism: Software Monitor Alarm: Software Alarm 10*/
243 IfxSmu_Alarm_Software_Alarm11 = 331, /**< \brief ALM10[11] : Safety Mechanism: Software Monitor Alarm: Software Alarm 11*/
244 IfxSmu_Alarm_Software_Alarm12 = 332, /**< \brief ALM10[12] : Safety Mechanism: Software Monitor Alarm: Software Alarm 12*/
245 IfxSmu_Alarm_Software_Alarm13 = 333, /**< \brief ALM10[13] : Safety Mechanism: Software Monitor Alarm: Software Alarm 13*/
246 IfxSmu_Alarm_Software_Alarm14 = 334, /**< \brief ALM10[14] : Safety Mechanism: Software Monitor Alarm: Software Alarm 14*/
247 IfxSmu_Alarm_Software_Alarm15 = 335, /**< \brief ALM10[15] : Safety Mechanism: Software Monitor Alarm: Software Alarm 15*/
248 IfxSmu_Alarm_SMU_Timer0_TimeOut = 336, /**< \brief ALM10[16] : Safety Mechanism: Recovery Timer 0 Alarm: Timer time-out */
249 IfxSmu_Alarm_SMU_Timer1_TimeOut = 337, /**< \brief ALM10[17] : Safety Mechanism: Recovery Timer 1 Alarm: Timer time-out */
250 IfxSmu_Alarm_SMU_Error_PinFaultStateActivation = 338, /**< \brief ALM10[18] : Safety Mechanism: ErrorPin Alarm: Error Pin fault state activation*/
251 IfxSmu_Alarm_SMU_Safety_FfCorrectableErrorDetected = 340, /**< \brief ALM10[20] : Safety Mechanism: Safety FlipFlop Alarm: Safety FF correctable error detected*/
252 IfxSmu_Alarm_SMU_Safety_FfUncorrectableErrorDetected = 341, /**< \brief ALM10[21] : Safety Mechanism: Safety FlipFlop Alarm: Safety FF uncorrectable error detected*/
253 IfxSmu_Alarm_SMU_Access_EnableErrorDetected = 342, /**< \brief ALM10[22] : Safety Mechanism: Access Enable Protection Alarm: Access Enable error detected*/
254 IfxSmu_Alarm_LMU_EDC_AddressPhaseError = 352, /**< \brief ALM11[0] : Safety Mechanism: SRI Error Detection Code (EDC) Alarm: EDC Address Phase Error*/
255 IfxSmu_Alarm_LMU_EDC_WritePhaseError = 353, /**< \brief ALM11[1] : Safety Mechanism: SRI Error Detection Code (EDC) Alarm: EDC Write Phase Error*/
256 IfxSmu_Alarm_XBAR_EDC_AddressPhaseError = 354, /**< \brief ALM11[2] : Safety Mechanism: SRI Error Detection Code (EDC) Alarm: EDC Address Phase Error*/
257 IfxSmu_Alarm_XBAR_EDC_WritePhaseError = 355, /**< \brief ALM11[3] : Safety Mechanism: SRI Error Detection Code (EDC) Alarm: EDC Write Phase Error*/
258 IfxSmu_Alarm_DMU_EDC_AddressPhaseError = 356, /**< \brief ALM11[4] : Safety Mechanism: SRI Error Detection Code (EDC) Alarm: EDC Address Phase Error*/
259 IfxSmu_Alarm_DMU_EDC_WritePhaseError = 357, /**< \brief ALM11[5] : Safety Mechanism: SRI Error Detection Code (EDC) Alarm: EDC Write Phase Error*/
260 IfxSmu_Alarm_SFI_BBB_EDC_AddressPhaseError = 358, /**< \brief ALM11[6] : Safety Mechanism: SRI Error Detection Code (EDC) Alarm: EDC Address Phase Error*/
261 IfxSmu_Alarm_SFI_BBB_EDC_WritePhaseError = 359, /**< \brief ALM11[7] : Safety Mechanism: SRI Error Detection Code (EDC) Alarm: EDC Write Phase Error*/
262 IfxSmu_Alarm_SRI_EDC_ReadPhaseError = 360, /**< \brief ALM11[8] : Safety Mechanism: SRI Error Detection Code (EDC) Alarm: EDC Read Phase Error */
263 IfxSmu_Alarm_SFI_SPB_EDC_ReadPhaseError = 361, /**< \brief ALM11[9] : Safety Mechanism: SRI Error Detection Code (EDC) Alarm: EDC Read Phase Error*/
264 IfxSmu_Alarm_HSSL_HSSL0EDC_ReadPhaseError = 362, /**< \brief ALM11[10] : Safety Mechanism: SRI Error Detection Code (EDC) Alarm: HSSL0 EDC Read Phase Error*/
265 IfxSmu_Alarm_CONVERTER_Phase_SyncronizerError = 364, /**< \brief ALM11[12] : Safety Mechanism: Converter Alarm: Phase Syncronizer Error*/
266 IfxSmu_Alarm_XBAR_SOTA_SwapError = 365, /**< \brief ALM11[13] : Safety Mechanism: SRI SOTA Monitor Alarm: SOTA Swap Error*/
267 } IfxSmu_Alarm;
268
269 /******************************************************************************/
270 /*-----------------------------Data Structures--------------------------------*/
271 /******************************************************************************/
272
273 #endif /* IFXSMU_CFG_H */
IfxSmu_Alarm_CPU0_PCACHETAG_UncorrectableErrorDetection
ALM0[4] : Safety Mechanism: SRAM Monitor Alarm: PCACHE TAG Uncorrectable error detection.
Definition: IfxSmu_cfg.h:81
IfxSmu_Alarm_CPU2_DCACHETAG_SingleBitErrorCorrection
ALM2[12] : Safety Mechanism: SRAM Monitor Alarm: DCACHE TAG Single bit error correction.
Definition: IfxSmu_cfg.h:123
IfxSmu_Alarm_CPU3_CPU_InstructionFetchSriInterfaceEdcError
ALM3[22] : Safety Mechanism: SRI End-to-End EDC Alarm: CPU Instruction Fetch SRI Interface EDC Error...
Definition: IfxSmu_cfg.h:143
IfxSmu_Alarm_CPU0_PFI0_PFLASH0_ReadPathError
ALM0[2] : Safety Mechanism: PFLASH Read Path Monitor Alarm: PFLASH0 Read Path Error.
Definition: IfxSmu_cfg.h:80
IfxSmu_Alarm_LMU_FSI_RAM_LMUDMU_MiscellaneousErrorDetection
ALM7[2] : Safety Mechanism: SRAM Monitor Alarm: LMU/DMU Miscellaneous error detection.
Definition: IfxSmu_cfg.h:172
IfxSmu_Alarm_LMU_ECC_Error
ALM7[14] : Safety Mechanism: SRAM ECC Monitor Alarm: ECC Error.
Definition: IfxSmu_cfg.h:175
IfxSmu_Alarm_SCU_External_RequestUnitAlarm6
ALM8[28] : Safety Mechanism: External Alarm Alarm: External Request Unit Alarm 6. ...
Definition: IfxSmu_cfg.h:218
IfxSmu_Alarm_XBAR1_SRI_BusErrorEvent
ALM7[18] : Safety Mechanism: Built-in SRI Error Detection Alarm: SRI Bus Error Event.
Definition: IfxSmu_cfg.h:179
IfxSmu_Alarm_FSI_Single_BitCorrectionTrackingBufferFull
ALM7[24] : Safety Mechanism: PFlash ECC Alarm: Single Bit Correction Tracking Buffer Full...
Definition: IfxSmu_cfg.h:185
IfxSmu_Alarm_CPU1_DSPRDCACHEDLMU_SingleBitErrorCorrection
ALM1[9] : Safety Mechanism: SRAM Monitor Alarm: DSPR/DCACHE/DLMU Single bit error correction...
Definition: IfxSmu_cfg.h:103
IfxSmu_Alarm_CPU3_CPU_DataSriInterfaceLoadStoreEdcError
ALM3[23] : Safety Mechanism: SRI End-to-End EDC Alarm: CPU Data SRI Interface (Load/Store) EDC Error...
Definition: IfxSmu_cfg.h:144
IfxSmu_Alarm_LMU_EDC_WritePhaseError
ALM11[1] : Safety Mechanism: SRI Error Detection Code (EDC) Alarm: EDC Write Phase Error...
Definition: IfxSmu_cfg.h:255
IfxSmu_Alarm_IOM_Safety_FfUncorrectableErrorDetected
ALM6[1] : Safety Mechanism: Safety FlipFlop Alarm: Safety FF uncorrectable error detected.
Definition: IfxSmu_cfg.h:147
IfxSmu_Alarm_SCU_CPU3_WatchdogTimeOut
ALM8[13] : Safety Mechanism: Watchdog Alarm: CPU3 Watchdog time-out.
Definition: IfxSmu_cfg.h:206
IfxSmu_Alarm_CPU1_PCACHETAG_UncorrectableErrorDetection
ALM1[4] : Safety Mechanism: SRAM Monitor Alarm: PCACHE TAG Uncorrectable error detection.
Definition: IfxSmu_cfg.h:98
IfxSmu_Alarm_CERBERUS_Safety_FfUncorrectableErrorDetected
ALM6[23] : Safety Mechanism: Safety FlipFlop Alarm: Safety FF uncorrectable error detected...
Definition: IfxSmu_cfg.h:167
IfxSmu_Alarm_CPU0_PSPRPCACHE_UncorrectableErrorDetection
ALM0[7] : Safety Mechanism: SRAM Monitor Alarm: PSPR/PCACHE Uncorrectable error detection.
Definition: IfxSmu_cfg.h:84
IfxSmu_Alarm_SCU_OS_CClockFrequencyOutOfRange
ALM8[0] : Safety Mechanism: Clock Monitor Alarm: OSC clock frequency out of range.
Definition: IfxSmu_cfg.h:193
IfxSmu_Alarm_CPU2_DSPRDCACHEDLMU_UncorrectableErrorDetection
ALM2[10] : Safety Mechanism(s): SRAM Monitor Alarm: DSPR/DCACHE/DLMU Uncorrectable error detection...
Definition: IfxSmu_cfg.h:121
IfxSmu_Alarm_Software_Alarm12
ALM10[12] : Safety Mechanism: Software Monitor Alarm: Software Alarm 12.
Definition: IfxSmu_cfg.h:244
IfxSmu_Alarm_CPU3_CPU_ExceptionInterruptTrap
ALM3[24] : Safety Mechanism: Exception Monitor Alarm: CPU exception (interrupt/trap) ...
Definition: IfxSmu_cfg.h:145
IfxSmu_Alarm_CPU2_Lockstep_ComparatorError
ALM2[0] : Safety Mechanism: Lockstep CPU Alarm: Lockstep Comparator Error.
Definition: IfxSmu_cfg.h:112
IfxSmu_Alarm_SCU_CPU0_WatchdogTimeOut
ALM8[10] : Safety Mechanism: Watchdog Alarm: CPU0 Watchdog time-out.
Definition: IfxSmu_cfg.h:203
IfxSmu_Alarm_SMU_Error_PinFaultStateActivation
ALM10[18] : Safety Mechanism: ErrorPin Alarm: Error Pin fault state activation.
Definition: IfxSmu_cfg.h:250
IfxSmu_Alarm_LMU_Lockstep_ComparatorError
ALM7[12] : Safety Mechanism: LMU Lockstep Alarm: Lockstep Comparator Error.
Definition: IfxSmu_cfg.h:173
IfxSmu_Alarm_IR_Safety_FfUncorrectableErrorDetected
ALM6[2] : Safety Mechanism: Safety FlipFlop Alarm: Safety FF uncorrectable error detected.
Definition: IfxSmu_cfg.h:148
IfxSmu_Alarm_SCU_Safety_WatchdogTimeOut
ALM8[16] : Safety Mechanism: Watchdog Alarm: Safety Watchdog time-out.
Definition: IfxSmu_cfg.h:207
IfxSmu_Alarm_CPU2_CPU_InstructionFetchSriInterfaceEdcError
ALM2[22] : Safety Mechanism: SRI End-to-End EDC Alarm: CPU Instruction Fetch SRI Interface EDC Error...
Definition: IfxSmu_cfg.h:126
IfxSmu_Alarm_CPU1_PSPRPCACHE_SingleBitErrorCorrection
ALM1[6] : Safety Mechanism: SRAM Monitor Alarm: PSPR/PCACHE Single bit error correction.
Definition: IfxSmu_cfg.h:100
IfxSmu_Alarm_CAN_CAN_UncorrectableErrorDetection
ALM6[17] : Safety Mechanism: SRAM Monitor Alarm: CAN Uncorrectable error detection.
Definition: IfxSmu_cfg.h:162
IfxSmu_Alarm_XBAR_EDC_WritePhaseError
ALM11[3] : Safety Mechanism: SRI Error Detection Code (EDC) Alarm: EDC Write Phase Error...
Definition: IfxSmu_cfg.h:257
IfxSmu_Alarm_SCU_External_RequestUnitAlarm4
ALM8[26] : Safety Mechanism: External Alarm Alarm: External Request Unit Alarm 4. ...
Definition: IfxSmu_cfg.h:216
IfxSmu_Alarm_EMEM_Lockstep_ControlLogicInputAlarm
ALM9[22] : Safety Mechanism: Lockstep Control Logic Input Monitor Alarm: Lockstep Control Logic Input...
Definition: IfxSmu_cfg.h:231
IfxSmu_Alarm_EMEM_Unexpected_WriteToEmemAlarm
ALM9[20] : Safety Mechanism: EMEM Monitor Alarm: Unexpected Write to EMEM Alarm.
Definition: IfxSmu_cfg.h:229
IfxSmu_Alarm_HSM_Undervoltage_Alarm
ALM9[17] : Safety Mechanism: Voltage Monitor Alarm: Under-voltage Alarm.
Definition: IfxSmu_cfg.h:228
IfxSmu_Alarm_DMA_Safety_FfUncorrectableErrorDetected
ALM6[6] : Safety Mechanism: Safety FlipFlop Alarm: Safety FF uncorrectable error detected.
Definition: IfxSmu_cfg.h:152
IfxSmu_Alarm_CPU2_CPU_DataSriInterfaceLoadStoreEdcError
ALM2[23] : Safety Mechanism: SRI End-to-End EDC Alarm: CPU Data SRI Interface (Load/Store) EDC Error...
Definition: IfxSmu_cfg.h:127
IfxSmu_Alarm_SCU_External_RequestUnitAlarm7
ALM8[29] : Safety Mechanism: External Alarm Alarm: External Request Unit Alarm 7. ...
Definition: IfxSmu_cfg.h:219
IfxSmu_Alarm_SMU_Timer0_TimeOut
ALM10[16] : Safety Mechanism: Recovery Timer 0 Alarm: Timer time-out.
Definition: IfxSmu_cfg.h:248
IfxSmu_Alarm_SYS_PLL_PER_PLL_Safety_FfUncorrectableErrorDetected
ALM6[8] : Safety Mechanism: Safety FlipFlop Alarm: Safety FF uncorrectable error detected.
Definition: IfxSmu_cfg.h:154
IfxSmu_Alarm_XBAR2_SRI_BusErrorEvent
ALM7[19] : Safety Mechanism: Built-in SRI Error Detection Alarm: SRI Bus Error Event.
Definition: IfxSmu_cfg.h:180
IfxSmu_Alarm_SCU_Lockstep_DualRailError
ALM8[18] : Safety Mechanism: Lockstep Dual Rail Monitor Alarm: dual rail error.
Definition: IfxSmu_cfg.h:209
IfxSmu_Alarm_SCU_Safety_FfUncorrectableErrorDetected
ALM6[4] : Safety Mechanism: Safety FlipFlop Alarm: Safety FF uncorrectable error detected.
Definition: IfxSmu_cfg.h:150
IfxSmu_Alarm_EVR_Undervoltage_Alarm
ALM9[5] : Safety Mechanism: Voltage Monitor Alarm: Under-voltage Alarm.
Definition: IfxSmu_cfg.h:225
IfxSmu_Alarm_CPU1_PFI1_PFLASH1_ReadPathError
ALM1[2] : Safety Mechanism: PFLASH Read Path Monitor Alarm: PFLASH1 Read Path Error.
Definition: IfxSmu_cfg.h:97
IfxSmu_Alarm_BBB_BusErrorEvent
ALM7[21] : Safety Mechanism: Built-in BBB Error Detection Alarm: BBB Bus Error Event.
Definition: IfxSmu_cfg.h:182
IfxSmu_Alarm_CPU0_CPU_InstructionFetchSriInterfaceEdcError
ALM0[22] : Safety Mechanism: SRI End-to-End EDC Alarm: CPU Instruction Fetch SRI Interface EDC Error...
Definition: IfxSmu_cfg.h:92
IfxSmu_Alarm_LMU_EDC_AddressPhaseError
ALM11[0] : Safety Mechanism: SRI Error Detection Code (EDC) Alarm: EDC Address Phase Error...
Definition: IfxSmu_cfg.h:254
IfxSmu_Alarm_CPU3_Buslevel_MpuViolation
ALM3[1] : Safety Mechanism: Bus-level Memory Protection Unit Alarm: Bus-level MPU violation...
Definition: IfxSmu_cfg.h:130
IfxSmu_Alarm_FSI_PFlash_EccError
ALM7[28] : Safety Mechanism: PFlash ECC Monitor Alarm: PFlash ECC Error.
Definition: IfxSmu_cfg.h:189
IfxSmu_Alarm_CPU1_Lockstep_ComparatorError
ALM1[0] : Safety Mechanism: Lockstep CPU Alarm: Lockstep Comparator Error.
Definition: IfxSmu_cfg.h:95
IfxSmu_Alarm_CPU3_DCACHETAG_UncorrectableErrorDetection
ALM3[13] : Safety Mechanism: SRAM Monitor Alarm: DCACHE TAG Uncorrectable error detection.
Definition: IfxSmu_cfg.h:141
IfxSmu_Alarm_CPU1_DCACHETAG_SingleBitErrorCorrection
ALM1[12] : Safety Mechanism: SRAM Monitor Alarm: DCACHE TAG Single bit error correction.
Definition: IfxSmu_cfg.h:106
IfxSmu_Alarm_GTM_GTM_UncorrectableErrorDetection
ALM6[11] : Safety Mechanism: SRAM Monitor Alarm: GTM Uncorrectable error detection.
Definition: IfxSmu_cfg.h:156
IfxSmu_Alarm_SCU_Pad_HeatingAlarm
ALM8[20] : Safety Mechanism: Pad Monitor Alarm: Pad heating alarm.
Definition: IfxSmu_cfg.h:211
IfxSmu_Alarm_CPU2_PSPRPCACHE_SingleBitErrorCorrection
ALM2[6] : Safety Mechanism: SRAM Monitor Alarm: PSPR/PCACHE Single bit error correction.
Definition: IfxSmu_cfg.h:117
IfxSmu_Alarm_SMU_core_Safety_FfUncorrectableErrorDetected
ALM6[7] : Safety Mechanism: Safety FlipFlop Alarm: Safety FF uncorrectable error detected.
Definition: IfxSmu_cfg.h:153
IfxSmu_Alarm_LMU_EDC_ReadPhaseError
ALM7[16] : Safety Mechanism: LMU Error Detection Code (EDC) Alarm: EDC Read Phase Error...
Definition: IfxSmu_cfg.h:177
IfxSmu_Alarm_SMU_Safety_FfUncorrectableErrorDetected
ALM10[21] : Safety Mechanism: Safety FlipFlop Alarm: Safety FF uncorrectable error detected...
Definition: IfxSmu_cfg.h:252
IfxSmu_Alarm_CCU_Backup_ClockAliveAlarm
ALM8[2] : Safety Mechanism: Clock Alive Monitor Alarm: Back-up clock alive alarm. ...
Definition: IfxSmu_cfg.h:195
IfxSmu_Alarm_XBAR_SOTA_SwapError
ALM11[13] : Safety Mechanism: SRI SOTA Monitor Alarm: SOTA Swap Error.
Definition: IfxSmu_cfg.h:266
IfxSmu_Alarm_CPU1_PSPRPCACHE_MiscellaneousErrorDetection
ALM1[8] : Safety Mechanism: SRAM Monitor Alarm: PSPR/PCACHE Miscellaneous error detection.
Definition: IfxSmu_cfg.h:102
IfxSmu_Alarm_SCU_System_PllDcoLossOfLockEvent
ALM8[3] : Safety Mechanism: PLL loss of lock detection Alarm: System PLL DCO loss of lock event...
Definition: IfxSmu_cfg.h:196
IfxSmu_Alarm_SPB_BusErrorEvent
ALM7[20] : Safety Mechanism: Built-in SPB Error Detection Alarm: SPB Bus Error Event.
Definition: IfxSmu_cfg.h:181
IfxSmu_Alarm_LMU_FSI_RAM_LMUDMU_SingleBitErrorCorrection
ALM7[0] : Safety Mechanism: SRAM Monitor Alarm: LMU/DMU Single bit error correction.
Definition: IfxSmu_cfg.h:170
IfxSmu_Alarm_Software_Alarm8
ALM10[8] : Safety Mechanism: Software Monitor Alarm: Software Alarm 8.
Definition: IfxSmu_cfg.h:240
IfxSmu_Alarm_Software_Alarm5
ALM10[5] : Safety Mechanism: Software Monitor Alarm: Software Alarm 5.
Definition: IfxSmu_cfg.h:237
IfxSmu_Alarm_ERAY_ERAY_SingleBitErrorCorrection
ALM6[13] : Safety Mechanism: SRAM Monitor Alarm: ERAY Single bit error correction.
Definition: IfxSmu_cfg.h:158
IfxSmu_Alarm_XBAR0_SRI_BusErrorEvent
ALM7[17] : Safety Mechanism: Built-in SRI Error Detection Alarm: SRI Bus Error Event.
Definition: IfxSmu_cfg.h:178
IfxSmu_Alarm_EVR_Short_ToLowHightAlarm
ALM9[15] : Safety Mechanism: Voltage Monitor Alarm: Short to low/hight Alarm.
Definition: IfxSmu_cfg.h:226
IfxSmu_Alarm_CPU1_PCACHETAG_MiscellaneousErrorDetection
ALM1[5] : Safety Mechanism: SRAM Monitor Alarm: PCACHE TAG Miscellaneous error detection.
Definition: IfxSmu_cfg.h:99
IfxSmu_Alarm_SCU_External_RequestUnitAlarm3
ALM8[9] : Safety Mechanism: External Alarm Alarm: External Request Unit Alarm 3.
Definition: IfxSmu_cfg.h:202
IfxSmu_Alarm_CPU3_PSPRPCACHE_UncorrectableErrorDetection
ALM3[7] : Safety Mechanism: SRAM Monitor Alarm: PSPR/PCACHE Uncorrectable error detection.
Definition: IfxSmu_cfg.h:135
IfxSmu_Alarm_CPU3_DSPRDCACHEDLMU_MiscellaneousErrorDetection
ALM3[11] : Safety Mechanism(s): SRAM Monitor Alarm: DSPR/DCACHE/DLMU Miscellaneous error detection...
Definition: IfxSmu_cfg.h:139
IfxSmu_Alarm_CPU2_PCACHETAG_UncorrectableErrorDetection
ALM2[4] : Safety Mechanism: SRAM Monitor Alarm: PCACHE TAG Uncorrectable error detection.
Definition: IfxSmu_cfg.h:115
IfxSmu_Alarm_CPU1_CPU_DataSriInterfaceLoadStoreEdcError
ALM1[23] : Safety Mechanism: SRI End-to-End EDC Alarm: CPU Data SRI Interface (Load/Store) EDC Error...
Definition: IfxSmu_cfg.h:110
IfxSmu_Alarm_CPU1_Buslevel_MpuViolation
ALM1[1] : Safety Mechanism: Bus-level Memory Protection Unit Alarm: Bus-level MPU violation...
Definition: IfxSmu_cfg.h:96
IfxSmu_Alarm_CPU2_DSPRDCACHEDLMU_MiscellaneousErrorDetection
ALM2[11] : Safety Mechanism(s): SRAM Monitor Alarm: DSPR/DCACHE/DLMU Miscellaneous error detection...
Definition: IfxSmu_cfg.h:122
IfxSmu_Alarm_SRI_EDC_ReadPhaseError
ALM11[8] : Safety Mechanism: SRI Error Detection Code (EDC) Alarm: EDC Read Phase Error...
Definition: IfxSmu_cfg.h:262
IfxSmu_Alarm_SMU_Safety_FfCorrectableErrorDetected
ALM10[20] : Safety Mechanism: Safety FlipFlop Alarm: Safety FF correctable error detected.
Definition: IfxSmu_cfg.h:251
IfxSmu_Alarm_MTU_Safety_FfUncorrectableErrorDetected
ALM6[0] : Safety Mechanism: Safety FlipFlop Alarm: Safety FF uncorrectable error detected.
Definition: IfxSmu_cfg.h:146
IfxSmu_Alarm_HSSL_HSSL0EDC_ReadPhaseError
ALM11[10] : Safety Mechanism: SRI Error Detection Code (EDC) Alarm: HSSL0 EDC Read Phase Error...
Definition: IfxSmu_cfg.h:264
IfxSmu_Alarm_SMU_Access_EnableErrorDetected
ALM10[22] : Safety Mechanism: Access Enable Protection Alarm: Access Enable error detected...
Definition: IfxSmu_cfg.h:253
IfxSmu_Alarm_Software_Alarm13
ALM10[13] : Safety Mechanism: Software Monitor Alarm: Software Alarm 13.
Definition: IfxSmu_cfg.h:245
IfxSmu_Alarm_CPU2_PFI2_PFLASH2_ReadPathError
ALM2[2] : Safety Mechanism: PFLASH Read Path Monitor Alarm: PFLASH2 Read Path Error.
Definition: IfxSmu_cfg.h:114
IfxSmu_Alarm_CPU2_DSPRDCACHEDLMU_SingleBitErrorCorrection
ALM2[9] : Safety Mechanism: SRAM Monitor Alarm: DSPR/DCACHE/DLMU Single bit error correction...
Definition: IfxSmu_cfg.h:120
IfxSmu_Alarm_CCU_Safety_FfUncorrectableErrorDetected
ALM6[25] : Safety Mechanism: Safety FlipFlop Alarm: Safety FF uncorrectable error detected...
Definition: IfxSmu_cfg.h:169
IfxSmu_Alarm_CPU3_PCACHETAG_UncorrectableErrorDetection
ALM3[4] : Safety Mechanism: SRAM Monitor Alarm: PCACHE TAG Uncorrectable error detection.
Definition: IfxSmu_cfg.h:132
IfxSmu_Alarm_CPU2_DCACHETAG_MiscellaneousErrorDetection
ALM2[14] : Safety Mechanism: SRAM Monitor Alarm: DCACHE TAG Miscellaneous error detection.
Definition: IfxSmu_cfg.h:125
IfxSmu_Alarm_CPU2_DCACHETAG_UncorrectableErrorDetection
ALM2[13] : Safety Mechanism: SRAM Monitor Alarm: DCACHE TAG Uncorrectable error detection.
Definition: IfxSmu_cfg.h:124
IfxSmu_Alarm_Software_Alarm10
ALM10[10] : Safety Mechanism: Software Monitor Alarm: Software Alarm 10.
Definition: IfxSmu_cfg.h:242
IfxSmu_Alarm_Misc_MISC_SingleBitErrorCorrection
ALM6[19] : Safety Mechanism: SRAM Monitor Alarm: MISC Single bit error correction.
Definition: IfxSmu_cfg.h:164
IfxSmu_Alarm_DTS_Temperature_Underflow
ALM9[1] : Safety Mechanism: Die Temperature Sensor Alarm: Temperature underflow.
Definition: IfxSmu_cfg.h:223
IfxSmu_Alarm_CPU3_PSPRPCACHE_SingleBitErrorCorrection
ALM3[6] : Safety Mechanism: SRAM Monitor Alarm: PSPR/PCACHE Single bit error correction.
Definition: IfxSmu_cfg.h:134
IfxSmu_Alarm_CPU1_CPU_InstructionFetchSriInterfaceEdcError
ALM1[22] : Safety Mechanism: SRI End-to-End EDC Alarm: CPU Instruction Fetch SRI Interface EDC Error...
Definition: IfxSmu_cfg.h:109
IfxSmu_Alarm_CPU3_PCACHETAG_MiscellaneousErrorDetection
ALM3[5] : Safety Mechanism: SRAM Monitor Alarm: PCACHE TAG Miscellaneous error detection.
Definition: IfxSmu_cfg.h:133
IfxSmu_Alarm_CPU2_PCACHETAG_MiscellaneousErrorDetection
ALM2[5] : Safety Mechanism: SRAM Monitor Alarm: PCACHE TAG Miscellaneous error detection.
Definition: IfxSmu_cfg.h:116
IfxSmu_Alarm_CPU2_CPU_ExceptionInterruptTrap
ALM2[24] : Safety Mechanism: Exception Monitor Alarm: CPU exception (interrupt/trap) ...
Definition: IfxSmu_cfg.h:128
IfxSmu_Alarm_SCU_LBIST_Alarm
ALM8[5] : Safety Mechanism: LBIST Safe Reset State Alarm: LBIST Alarm.
Definition: IfxSmu_cfg.h:198
IfxSmu_Alarm_EMEM_Safety_FfUncorrectableErrorDetected
ALM6[3] : Safety Mechanism: Safety FlipFlop Alarm: Safety FF uncorrectable error detected.
Definition: IfxSmu_cfg.h:149
IfxSmu_Alarm_FSI_Zero_BitErrorTrackingBufferFull
ALM7[27] : Safety Mechanism: PFlash ECC Alarm: Zero Bit Error Tracking Buffer Full.
Definition: IfxSmu_cfg.h:188
IfxSmu_Alarm_SCU_Watchdog_TimeOut
ALM8[17] : Safety Mechanism: All Watchdogs Alarm: watchdog time-out.
Definition: IfxSmu_cfg.h:208
IfxSmu_Alarm_CPU1_DSPRDCACHEDLMU_UncorrectableErrorDetection
ALM1[10] : Safety Mechanism(s): SRAM Monitor Alarm: DSPR/DCACHE/DLMU Uncorrectable error detection...
Definition: IfxSmu_cfg.h:104
IfxSmu_Alarm_CPU0_DCACHETAG_MiscellaneousErrorDetection
ALM0[14] : Safety Mechanism: SRAM Monitor Alarm: DCACHE TAG Miscellaneous error detection.
Definition: IfxSmu_cfg.h:91
IfxSmu_Alarm_EVR_Overvoltage_Alarm
ALM9[3] : Safety Mechanism: Voltage Monitor Alarm: Over-voltage Alarm.
Definition: IfxSmu_cfg.h:224
IfxSmu_Alarm_SFI_BBB_EDC_WritePhaseError
ALM11[7] : Safety Mechanism: SRI Error Detection Code (EDC) Alarm: EDC Write Phase Error...
Definition: IfxSmu_cfg.h:261
IfxSmu_Alarm_FSI_Multiple_BitErrorDetectionTrackingBufferFull
ALM7[26] : Safety Mechanism: PFlash ECC Alarm: Multiple Bit Error Detection Tracking Buffer Full...
Definition: IfxSmu_cfg.h:187
IfxSmu_Alarm_DMA_DMASRI_EccError
ALM8[23] : Safety Mechanism: DMA SRI ECC Alarm: DMA SRI ECC Error.
Definition: IfxSmu_cfg.h:214
IfxSmu_Alarm_IOM_Pin_MismatchIndication
ALM8[25] : Safety Mechanism: External Alarm Alarm: Pin Mismatch Indication.
Definition: IfxSmu_cfg.h:215
IfxSmu_Alarm_CPU1_DCACHETAG_MiscellaneousErrorDetection
ALM1[14] : Safety Mechanism: SRAM Monitor Alarm: DCACHE TAG Miscellaneous error detection.
Definition: IfxSmu_cfg.h:108
IfxSmu_Alarm_SCU_CPU1_WatchdogTimeOut
ALM8[11] : Safety Mechanism: Watchdog Alarm: CPU1 Watchdog time-out.
Definition: IfxSmu_cfg.h:204
IfxSmu_Alarm_CPU0_DCACHETAG_SingleBitErrorCorrection
ALM0[12] : Safety Mechanism: SRAM Monitor Alarm: DCACHE TAG Single bit error correction.
Definition: IfxSmu_cfg.h:89
IfxSmu_Alarm_LMU_Lockstep_ControlError
ALM7[13] : Safety Mechanism: LMU Lockstep Alarm: Lockstep Control Error.
Definition: IfxSmu_cfg.h:174
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxSmu_Alarm_CONVERTER_Phase_SyncronizerError
ALM11[12] : Safety Mechanism: Converter Alarm: Phase Syncronizer Error.
Definition: IfxSmu_cfg.h:265
IfxSmu_Alarm_CCU_Backup_ClockOutOfRangeAlarm
ALM8[1] : Safety Mechanism: Clock Monitor Alarm: Back-up clock out-of-range alarm.
Definition: IfxSmu_cfg.h:194
IfxSmu_Alarm_SCU_External_RequestUnitAlarm1
ALM8[7] : Safety Mechanism: External Alarm Alarm: External Request Unit Alarm 1.
Definition: IfxSmu_cfg.h:200
IfxSmu_Alarm_SFI_SPB_EDC_ReadPhaseError
ALM11[9] : Safety Mechanism: SRI Error Detection Code (EDC) Alarm: EDC Read Phase Error...
Definition: IfxSmu_cfg.h:263
IfxSmu_Alarm_XBAR_EDC_AddressPhaseError
ALM11[2] : Safety Mechanism: SRI Error Detection Code (EDC) Alarm: EDC Address Phase Error...
Definition: IfxSmu_cfg.h:256
IfxSmu_Alarm_Software_Alarm9
ALM10[9] : Safety Mechanism: Software Monitor Alarm: Software Alarm 9.
Definition: IfxSmu_cfg.h:241
IfxSmu_Alarm_CPU1_DSPRDCACHEDLMU_MiscellaneousErrorDetection
ALM1[11] : Safety Mechanism(s): SRAM Monitor Alarm: DSPR/DCACHE/DLMU Miscellaneous error detection...
Definition: IfxSmu_cfg.h:105
IfxSmu_Alarm_FSI_Flash_StoredConfigurationError
ALM7[31] : Safety Mechanism: PFlash Configuration Monitor Alarm: Flash Stored Configuration Error...
Definition: IfxSmu_cfg.h:192
IfxSmu_Alarm_Software_Alarm4
ALM10[4] : Safety Mechanism: Software Monitor Alarm: Software Alarm 4.
Definition: IfxSmu_cfg.h:236
IfxSmu_Alarm_CPU0_PCACHETAG_MiscellaneousErrorDetection
ALM0[5] : Safety Mechanism: SRAM Monitor Alarm: PCACHE TAG Miscellaneous error detection.
Definition: IfxSmu_cfg.h:82
IfxSmu_Alarm_CAN_CAN_SingleBitErrorCorrection
ALM6[16] : Safety Mechanism: SRAM Monitor Alarm: CAN Single bit error correction. ...
Definition: IfxSmu_cfg.h:161
IfxSmu_Alarm_LMU_FSI_RAM_LMUDMU_UncorrectableErrorDetection
ALM7[1] : Safety Mechanism: SRAM Monitor Alarm: LMU/DMU Uncorrectable error detection.
Definition: IfxSmu_cfg.h:171
IfxSmu_Alarm_CPU3_DSPRDCACHEDLMU_SingleBitErrorCorrection
ALM3[9] : Safety Mechanism: SRAM Monitor Alarm: DSPR/DCACHE/DLMU Single bit error correction...
Definition: IfxSmu_cfg.h:137
IfxSmu_Alarm_GTM_GTM_SingleBitErrorCorrection
ALM6[10] : Safety Mechanism: SRAM Monitor Alarm: GTM Single bit error correction. ...
Definition: IfxSmu_cfg.h:155
IfxSmu_Alarm_Software_Alarm7
ALM10[7] : Safety Mechanism: Software Monitor Alarm: Software Alarm 7.
Definition: IfxSmu_cfg.h:239
IfxSmu_Alarm_FSI_CPUFLASHCON_ConfigurationError
ALM7[30] : Safety Mechanism: PFlash Configuration Monitor Alarm: CPU FLASHCON Configuration Error...
Definition: IfxSmu_cfg.h:191
IfxSmu_Alarm_Software_Alarm0
ALM10[0] : Safety Mechanism: Software Monitor Alarm: Software Alarm 0.
Definition: IfxSmu_cfg.h:232
IfxSmu_Alarm_SCU_External_EmergencyStopSignalEvent
ALM8[19] : Safety Mechanism: Emergency Stop Alarm: External Emergency Stop Signal Event...
Definition: IfxSmu_cfg.h:210
IfxSmu_Alarm_CPU0_PSPRPCACHE_MiscellaneousErrorDetection
ALM0[8] : Safety Mechanism: SRAM Monitor Alarm: PSPR/PCACHE Miscellaneous error detection.
Definition: IfxSmu_cfg.h:85
IfxSmu_Alarm_DMU_EDC_AddressPhaseError
ALM11[4] : Safety Mechanism: SRI Error Detection Code (EDC) Alarm: EDC Address Phase Error...
Definition: IfxSmu_cfg.h:258
IfxSmu_Alarm_Misc_MISC_MiscellaneousErrorDetection
ALM6[21] : Safety Mechanism: SRAM Monitor Alarm: MISC Miscellaneous error detection.
Definition: IfxSmu_cfg.h:166
IfxSmu_Alarm_CPU0_DSPRDCACHEDLMU_UncorrectableErrorDetection
ALM0[10] : Safety Mechanism(s): SRAM Monitor Alarm: DSPR/DCACHE/DLMU Uncorrectable error detection...
Definition: IfxSmu_cfg.h:87
IfxSmu_Alarm_CPU1_PSPRPCACHE_UncorrectableErrorDetection
ALM1[7] : Safety Mechanism: SRAM Monitor Alarm: PSPR/PCACHE Uncorrectable error detection.
Definition: IfxSmu_cfg.h:101
IfxSmu_Alarm_CPU3_DCACHETAG_SingleBitErrorCorrection
ALM3[12] : Safety Mechanism: SRAM Monitor Alarm: DCACHE TAG Single bit error correction.
Definition: IfxSmu_cfg.h:140
IfxSmu_Alarm_CPU3_DCACHETAG_MiscellaneousErrorDetection
ALM3[14] : Safety Mechanism: SRAM Monitor Alarm: DCACHE TAG Miscellaneous error detection.
Definition: IfxSmu_cfg.h:142
IfxSmu_Alarm_PMS_Safety_FfUncorrectableErrorDetected
ALM6[5] : Safety Mechanism: Safety FlipFlop Alarm: Safety FF uncorrectable error detected.
Definition: IfxSmu_cfg.h:151
IfxSmu_Alarm_FSI_PFlash_EdcError
ALM7[29] : Safety Mechanism: PFlash EDC Monitor Alarm: PFlash EDC Error.
Definition: IfxSmu_cfg.h:190
IfxSmu_Alarm_CPU3_Lockstep_ComparatorError
ALM3[0] : Safety Mechanism: Lockstep CPU Alarm: Lockstep Comparator Error.
Definition: IfxSmu_cfg.h:129
IfxSmu_Alarm_FSI_PFlash_DoubleBitError
ALM7[23] : Safety Mechanism: PFlash ECC Alarm: PFlash Double Bit Error.
Definition: IfxSmu_cfg.h:184
IfxSmu_Alarm_CPU3_PSPRPCACHE_MiscellaneousErrorDetection
ALM3[8] : Safety Mechanism: SRAM Monitor Alarm: PSPR/PCACHE Miscellaneous error detection.
Definition: IfxSmu_cfg.h:136
IfxSmu_Alarm_CPU1_CPU_ExceptionInterruptTrap
ALM1[24] : Safety Mechanism: Exception Monitor Alarm: CPU exception (interrupt/trap) ...
Definition: IfxSmu_cfg.h:111
IfxSmu_Alarm_CPU2_PSPRPCACHE_MiscellaneousErrorDetection
ALM2[8] : Safety Mechanism: SRAM Monitor Alarm: PSPR/PCACHE Miscellaneous error detection.
Definition: IfxSmu_cfg.h:119
IfxSmu_Alarm_Software_Alarm15
ALM10[15] : Safety Mechanism: Software Monitor Alarm: Software Alarm 15.
Definition: IfxSmu_cfg.h:247
IfxSmu_Alarm_IR_EDC_ConfigurationDataPathError
ALM8[22] : Safety Mechanism: Interrupt Monitor Alarm: EDC Configuration Data Path Error...
Definition: IfxSmu_cfg.h:213
IfxSmu_Alarm_SCU_LBIST_TestModeAlarm
ALM8[21] : Safety Mechanism: LBIST Test Mode Alarm: LBIST Test Mode Alarm.
Definition: IfxSmu_cfg.h:212
IfxSmu_Alarm_CPU0_PSPRPCACHE_SingleBitErrorCorrection
ALM0[6] : Safety Mechanism: SRAM Monitor Alarm: PSPR/PCACHE Single bit error correction.
Definition: IfxSmu_cfg.h:83
IfxSmu_Alarm_Misc_MISC_UncorrectableErrorDetection
ALM6[20] : Safety Mechanism: SRAM Monitor Alarm: MISC Uncorrectable error detection.
Definition: IfxSmu_cfg.h:165
IfxSmu_Alarm_FSI_Double_BitCorrectionTrackingBufferFull
ALM7[25] : Safety Mechanism: PFlash ECC Alarm: Double Bit Correction Tracking Buffer Full...
Definition: IfxSmu_cfg.h:186
IfxSmu_Alarm_DTS_Temperature_Overflow
ALM9[0] : Safety Mechanism: Die Temperature Sensor Alarm: Temperature overflow.
Definition: IfxSmu_cfg.h:222
IfxSmu_Alarm_ERAY_ERAY_UncorrectableErrorDetection
ALM6[14] : Safety Mechanism: SRAM Monitor Alarm: ERAY Uncorrectable error detection.
Definition: IfxSmu_cfg.h:159
IfxSmu_Alarm_SCU_CPU2_WatchdogTimeOut
ALM8[12] : Safety Mechanism: Watchdog Alarm: CPU2 Watchdog time-out.
Definition: IfxSmu_cfg.h:205
IfxSmu_Alarm_CPU3_DSPRDCACHEDLMU_UncorrectableErrorDetection
ALM3[10] : Safety Mechanism(s): SRAM Monitor Alarm: DSPR/DCACHE/DLMU Uncorrectable error detection...
Definition: IfxSmu_cfg.h:138
IfxSmu_Alarm_FSI_PFlash_SingleBitError
ALM7[22] : Safety Mechanism: PFlash ECC Alarm: PFlash Single Bit Error.
Definition: IfxSmu_cfg.h:183
IfxSmu_Alarm_ERAY_ERAY_MiscellaneousErrorDetection
ALM6[15] : Safety Mechanism: SRAM Monitor Alarm: ERAY Miscellaneous error detection.
Definition: IfxSmu_cfg.h:160
IfxSmu_Alarm_Software_Alarm1
ALM10[1] : Safety Mechanism: Software Monitor Alarm: Software Alarm 1.
Definition: IfxSmu_cfg.h:233
IfxSmu_Alarm_CPU0_DSPRDCACHEDLMU_MiscelleniousErrorDetection
ALM0[11] : Safety Mechanism(s): SRAM Monitor Alarm: DSPR/DCACHE/DLMU Miscellenious error detection...
Definition: IfxSmu_cfg.h:88
IfxSmu_Alarm_Software_Alarm14
ALM10[14] : Safety Mechanism: Software Monitor Alarm: Software Alarm 14.
Definition: IfxSmu_cfg.h:246
IfxSmu_Alarm_CPU3_PFI3_PFLASH3_ReadPathError
ALM3[2] : Safety Mechanism: PFLASH Read Path Monitor Alarm: PFLASH3 Read Path Error.
Definition: IfxSmu_cfg.h:131
IfxSmu_Alarm_DMU_EDC_WritePhaseError
ALM11[5] : Safety Mechanism: SRI Error Detection Code (EDC) Alarm: EDC Write Phase Error...
Definition: IfxSmu_cfg.h:259
IfxSmu_Alarm_CPU0_DCACHETAG_UncorrectableErrorDetection
ALM0[13] : Safety Mechanism: SRAM Monitor Alarm: DCACHE TAG Uncorrectable error detection.
Definition: IfxSmu_cfg.h:90
IfxSmu_Alarm_HSM_Overvoltage_Alarm
ALM9[16] : Safety Mechanism: Voltage Monitor Alarm: Over-voltage Alarm.
Definition: IfxSmu_cfg.h:227
IfxSmu_Alarm_SCU_Peripheral_PllDcoLossOfLockEvent
ALM8[4] : Safety Mechanism: PLL loss of lock detection Alarm: Peripheral PLL DCO loss of lock event...
Definition: IfxSmu_cfg.h:197
IfxSmu_Alarm_SFI_BBB_EDC_AddressPhaseError
ALM11[6] : Safety Mechanism: SRI Error Detection Code (EDC) Alarm: EDC Address Phase Error...
Definition: IfxSmu_cfg.h:260
IfxSmu_Alarm_SCU_External_RequestUnitAlarm2
ALM8[8] : Safety Mechanism: External Alarm Alarm: External Request Unit Alarm 2.
Definition: IfxSmu_cfg.h:201
IfxSmu_Alarm
IfxSmu_Alarm
SMU Alarms.
Definition: IfxSmu_cfg.h:76
IfxSmu_Alarm_CPU0_Lockstep_ComparatorError
ALM0[0] : Safety Mechanism: Lockstep CPU Alarm: Lockstep Comparator Error.
Definition: IfxSmu_cfg.h:78
IfxSmu_Alarm_CPU2_PSPRPCACHE_UncorrectableErrorDetection
ALM2[7] : Safety Mechanism: SRAM Monitor Alarm: PSPR/PCACHE Uncorrectable error detection.
Definition: IfxSmu_cfg.h:118
IfxSmu_Alarm_GTM_GTM_MiscellaneousErrorDetection
ALM6[12] : Safety Mechanism: SRAM Monitor Alarm: GTM Miscellaneous error detection.
Definition: IfxSmu_cfg.h:157
IfxSmu_Alarm_CPU1_DCACHETAG_UncorrectableErrorDetection
ALM1[13] : Safety Mechanism: SRAM Monitor Alarm: DCACHE TAG Uncorrectable error detection.
Definition: IfxSmu_cfg.h:107
IfxSmu_Alarm_SCU_External_RequestUnitAlarm5
ALM8[27] : Safety Mechanism: External Alarm Alarm: External Request Unit Alarm 5. ...
Definition: IfxSmu_cfg.h:217
IfxSmu_Alarm_CPU0_CPU_ExceptionInterruptTrap
ALM0[24] : Safety Mechanism: Exception Monitor Alarm: CPU exception (interrupt/trap) ...
Definition: IfxSmu_cfg.h:94
IfxSmu_Alarm_SCU_External_RequestUnitAlarm0
ALM8[6] : Safety Mechanism: External Alarm Alarm: External Request Unit Alarm 0.
Definition: IfxSmu_cfg.h:199
IfxSmu_Alarm_Software_Alarm11
ALM10[11] : Safety Mechanism: Software Monitor Alarm: Software Alarm 11.
Definition: IfxSmu_cfg.h:243
IfxSmu_Alarm_Software_Alarm3
ALM10[3] : Safety Mechanism: Software Monitor Alarm: Software Alarm 3.
Definition: IfxSmu_cfg.h:235
IfxSmu_Alarm_DTS_core_Under_TemperatureAlarm
ALM8[30] : Safety Mechanism: Core Domain Die Temperature Sensor Alarm: Under Temperature Alarm...
Definition: IfxSmu_cfg.h:220
IfxSmu_Alarm_EMEM_SEP_ControlLogicAlarm
ALM9[21] : Safety Mechanism: SEP Control Logic Monitor Alarm: SEP Control Logic Alarm.
Definition: IfxSmu_cfg.h:230
IfxSmu_Alarm_LMU_Buslevel_MpuError
ALM7[15] : Safety Mechanism: Bus-level MPU Alarm: Bus-level MPU error.
Definition: IfxSmu_cfg.h:176
IfxSmu_Alarm_SMU_Timer1_TimeOut
ALM10[17] : Safety Mechanism: Recovery Timer 1 Alarm: Timer time-out.
Definition: IfxSmu_cfg.h:249
IfxSmu_Alarm_CPU2_Buslevel_MpuViolation
ALM2[1] : Safety Mechanism: Bus-level Memory Protection Unit Alarm: Bus-level MPU violation...
Definition: IfxSmu_cfg.h:113
IfxSmu_Alarm_Software_Alarm2
ALM10[2] : Safety Mechanism: Software Monitor Alarm: Software Alarm 2.
Definition: IfxSmu_cfg.h:234
IfxSmu_Alarm_Software_Alarm6
ALM10[6] : Safety Mechanism: Software Monitor Alarm: Software Alarm 6.
Definition: IfxSmu_cfg.h:238
IfxSmu_Alarm_CCU_Safety_FfCorrectableErrorDetected
ALM6[24] : Safety Mechanism: Safety FlipFlop Alarm: Safety FF correctable error detected.
Definition: IfxSmu_cfg.h:168
IfxSmu_Alarm_CPU0_Buslevel_MpuViolation
ALM0[1] : Safety Mechanism: Bus-level Memory Protection Unit Alarm: Bus-level MPU violation...
Definition: IfxSmu_cfg.h:79
IfxSmu_Alarm_CPU0_CPU_DataSriInterfaceLoadStoreEdcError
ALM0[23] : Safety Mechanism: SRI End-to-End EDC Alarm: CPU Data SRI Interface (Load/Store) EDC Error...
Definition: IfxSmu_cfg.h:93
IfxSmu_Alarm_CAN_CAN_MiscellaneousErrorDetection
ALM6[18] : Safety Mechanism: SRAM Monitor Alarm: CAN Miscellaneous error detection.
Definition: IfxSmu_cfg.h:163
IfxSmu_Alarm_DTS_core_Over_TemperatureAlarm
ALM8[31] : Safety Mechanism: Core Domain Die Temperature Sensor Alarm: Over Temperature Alarm...
Definition: IfxSmu_cfg.h:221
IfxSmu_Alarm_CPU0_DSPRDCACHEDLMU_SingleBitErrorCorrection
ALM0[9] : Safety Mechanism: SRAM Monitor Alarm: DSPR/DCACHE/DLMU Single bit error correction...
Definition: IfxSmu_cfg.h:86


iLLD_TC38A: IfxSmuStdby.c Source File

  • Smu
  • Std
IfxSmuStdby.c
Go to the documentation of this file.
1 /**
2 * \file IfxSmuStdby.c
3 * \brief SMU basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxSmuStdby.h"
47
48 /******************************************************************************/
49 /*-------------------------Function Implementations---------------------------*/
50 /******************************************************************************/
51
52 void IfxSmuStdby_setFaultSignalAGConfigEventFlags(uint8 alarmGroup, uint32 flags)
53 {
54 Ifx_PMS_AGFSP_STDBY0 AgfspStdby20;
55 Ifx_PMS_AGFSP_STDBY1 AgfspStdby21;
56 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
57 /* disable the write-protection for registers */
58 IfxScuWdt_clearSafetyEndinit(passwd);
59
60 if (alarmGroup == 20U)
61 {
62 AgfspStdby20.U = PMS_AGFSP_STDBY0.U;
63 AgfspStdby20.U = flags & 0x0000FFFFU;
64 AgfspStdby20.B.BITPROT = 1;
65 PMS_AGFSP_STDBY0.U = AgfspStdby20.U;
66 }
67 else if (alarmGroup == 21U)
68 {
69 AgfspStdby21.U = PMS_AGFSP_STDBY1.U;
70 AgfspStdby21.U = flags & 0x0001FFFFU;
71 AgfspStdby21.B.BITPROT = 1;
72 PMS_AGFSP_STDBY1.U = AgfspStdby21.U;
73 }
74 else
75 {
76 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
77 }
78
79 /* Restore back the write-protection for registers */
80 IfxScuWdt_setSafetyEndinit(passwd);
81 }
82
83
84 void IfxSmuStdby_setFaultSignalAlarmConfigEventFlag(uint8 alarmGroup, uint8 alarmNum, IfxSmuStdby_FaultSignalAlarmConfigFlagEvent enable)
85 {
86 Ifx_PMS_AGFSP_STDBY0 AgfspStdby20;
87 Ifx_PMS_AGFSP_STDBY1 AgfspStdby21;
88 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
89 /* disable the write-protection for registers */
90 IfxScuWdt_clearSafetyEndinit(passwd);
91
92 if (alarmGroup == 20U)
93 {
94 AgfspStdby20.U = PMS_AGFSP_STDBY0.U;
95
96 if (enable)
97 {
98 AgfspStdby20.U |= 1U << alarmNum;
99 }
100 else
101 {
102 AgfspStdby20.U &= ~(1U << alarmNum);
103 }
104
105 AgfspStdby20.B.BITPROT = 1;
106 PMS_AGFSP_STDBY0.U = AgfspStdby20.U;
107 }
108 else if (alarmGroup == 21U)
109 {
110 AgfspStdby21.U = PMS_AGFSP_STDBY1.U;
111
112 if (enable)
113 {
114 AgfspStdby21.U |= 1U << alarmNum;
115 }
116 else
117 {
118 AgfspStdby21.U &= ~(1U << alarmNum);
119 }
120
121 AgfspStdby21.B.BITPROT = 1;
122 PMS_AGFSP_STDBY1.U = AgfspStdby21.U;
123 }
124 else
125 {
126 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
127 }
128
129 /* Restore back the write-protection for registers */
130 IfxScuWdt_setSafetyEndinit(passwd);
131 }
132
133
134 void IfxSmuStdby_setSmuStdbyAlarmStatusFlag(uint8 alarmGroup, uint8 alarmNum, IfxSmuStdby_AlarmStatusFlag status)
135 {
136 Ifx_PMS_AG_STDBY0 AgStdby20;
137 Ifx_PMS_AG_STDBY1 AgStdby21;
138 Ifx_PMS_CMD_STDBY cmdStdby;
139
140 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
141 /* disable the write-protection for registers */
142 IfxScuWdt_clearSafetyEndinit(passwd);
143
144 cmdStdby.U = PMS_CMD_STDBY.U;
145 cmdStdby.B.ASCE = 1;
146 cmdStdby.B.BITPROT = 1;
147 PMS_CMD_STDBY.U = cmdStdby.U;
148
149 if (alarmGroup == 20U)
150 {
151 AgStdby20.U = PMS_AG_STDBY0.U;
152
153 if (status == IfxSmuStdby_AlarmStatusFlag_faultExist)
154 {
155 AgStdby20.U |= 1U << alarmNum;
156 }
157 else
158 {
159 AgStdby20.U &= ~(1U << alarmNum);
160 }
161
162 PMS_AG_STDBY0.U = AgStdby20.U;
163 }
164 else if (alarmGroup == 21U)
165 {
166 AgStdby21.U = PMS_AG_STDBY1.U;
167
168 if (status == IfxSmuStdby_AlarmStatusFlag_faultExist)
169 {
170 AgStdby21.U |= 1U << alarmNum;
171 }
172 else
173 {
174 AgStdby21.U &= ~(1U << alarmNum);
175 }
176
177 PMS_AG_STDBY1.U = AgStdby21.U;
178 }
179 else
180 {
181 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
182 }
183
184 /* Restore back the write-protection for registers */
185 IfxScuWdt_setSafetyEndinit(passwd);
186 }
187
188
189 void IfxSmuStdby_startSmuStdbyMonBist(void)
190 {
191 IfxSmuStdby_clearSmuStdbyMonBistFlags();
192 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
193 volatile uint32 timeout = 0x1000U;
194 /* disable the write-protection for registers */
195 IfxScuWdt_clearSafetyEndinit(passwd);
196
197 PMS_MONFILT.U = 0x20000000U;
198
199 while ((PMS_MONFILT.U != 0x20000000U) && (timeout--)) // TO DO: Is wait needed? added based on SoC Ver request , to be confirmed from Concept
200 {}
201
202 PMS_MONCTRL.U = 0xa5a5a5U;
203 timeout = 0x1000U;
204
205 while ((PMS_MONCTRL.U != 0xa5a5a5U) && (timeout--)) // TO DO: Is wait needed? added based on SoC Ver request , to be confirmed from Concept
206
207 {}
208
209 PMS_PMSIEN.U &= ~0x00000FFFU;
210 /* Restore back the write-protection for registers */
211 IfxScuWdt_setSafetyEndinit(passwd);
212
213 IfxSmuStdby_setFaultSignalAGConfigEventFlags(20, 0U);
214 IfxSmuStdby_setFaultSignalAGConfigEventFlags(21, 0U);
215 IfxSmuStdby_setFsp0ErrorPinActive(IfxSmuStdby_FspErrorPinState_inactive);
216 IfxSmuStdby_setFsp1ErrorPinActive(IfxSmuStdby_FspErrorPinState_inactive);
217 IfxSmuStdby_enableAlarmStatusClear();
218 IfxScuWdt_clearSafetyEndinit(passwd);
219 PMS_MONFILT.U = 0x00000000U;
220 IfxScuWdt_setSafetyEndinit(passwd);
221 IfxSmuStdby_enableSmuStdbyMonBist();
222 }
IfxSmuStdby_FspErrorPinState_inactive
SMU_stdby Error Pin fault indication function on pin inactive.
Definition: IfxSmuStdby.h:109
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxSmuStdby_setFaultSignalAGConfigEventFlags
void IfxSmuStdby_setFaultSignalAGConfigEventFlags(uint8 alarmGroup, uint32 flags)
Function to configure FSP Alarm group functionality.
Definition: IfxSmuStdby.c:52
uint32
unsigned long uint32
Definition: Platform_Types.h:116
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxScuWdt_clearSafetyEndinit
void IfxScuWdt_clearSafetyEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:305
IfxSmuStdby_setFaultSignalAlarmConfigEventFlag
void IfxSmuStdby_setFaultSignalAlarmConfigEventFlag(uint8 alarmGroup, uint8 alarmNum, IfxSmuStdby_FaultSignalAlarmConfigFlagEvent enable)
Function to configure FSP functionality , FaultSignalAlarmConfigEventFlag (AG2iFSP_STDBY.B.FEz)
Definition: IfxSmuStdby.c:84
IfxSmuStdby_enableAlarmStatusClear
IFX_INLINE void IfxSmuStdby_enableAlarmStatusClear(void)
This function enable / disables he Alarm status clear in the Smu Standby command register ...
Definition: IfxSmuStdby.h:264
IfxSmuStdby_clearSmuStdbyMonBistFlags
IFX_INLINE void IfxSmuStdby_clearSmuStdbyMonBistFlags(void)
This function clears the TSTEN, TSTRUN, TSTDONE, TSTOK, SMUERR and PMSERR flags.
Definition: IfxSmuStdby.h:246
IfxSmuStdby.h
SMU basic functionality.
IfxSmuStdby_setFsp1ErrorPinActive
IFX_INLINE void IfxSmuStdby_setFsp1ErrorPinActive(IfxSmuStdby_FspErrorPinState active)
This function sets FSP1 Error pin fault indication function.
Definition: IfxSmuStdby.h:407
IfxSmuStdby_setSmuStdbyAlarmStatusFlag
void IfxSmuStdby_setSmuStdbyAlarmStatusFlag(uint8 alarmGroup, uint8 alarmNum, IfxSmuStdby_AlarmStatusFlag status)
Function to configure alarm status. (AG2i_STDBY.B.SFz)
Definition: IfxSmuStdby.c:134
IfxSmuStdby_FaultSignalAlarmConfigFlagEvent
IfxSmuStdby_FaultSignalAlarmConfigFlagEvent
Fault signaling configuration flag (AG2iFSP_STDBY.B.FEz)
Definition: IfxSmuStdby.h:91
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxScuWdt_setSafetyEndinit
void IfxScuWdt_setSafetyEndinit(uint16 password)
SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:668
IfxSmuStdby_setFsp0ErrorPinActive
IFX_INLINE void IfxSmuStdby_setFsp0ErrorPinActive(IfxSmuStdby_FspErrorPinState active)
This function sets FSP0 Error pin fault indication function .
Definition: IfxSmuStdby.h:391
IfxScuWdt_getSafetyWatchdogPassword
uint16 IfxScuWdt_getSafetyWatchdogPassword(void)
SCUWDT API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.c:393
IfxSmuStdby_enableSmuStdbyMonBist
IFX_INLINE void IfxSmuStdby_enableSmuStdbyMonBist(void)
This function enables the Smu standby Built-in Self test.
Definition: IfxSmuStdby.h:296
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
enable
void enable
Definition: IfxCpu_IntrinsicsDcc.h:477
IfxSmuStdby_startSmuStdbyMonBist
void IfxSmuStdby_startSmuStdbyMonBist(void)
This function enables the Smu standby Built-in Self test.
Definition: IfxSmuStdby.c:189
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxSmuStdby_AlarmStatusFlag
IfxSmuStdby_AlarmStatusFlag
Status flag for alarm (AG2i_STDBY.B.SFz) 0B Status flag does not report a fault condition 1B Status f...
Definition: IfxSmuStdby.h:83
IfxSmuStdby_AlarmStatusFlag_faultExist
Status flag reports a fault condition.
Definition: IfxSmuStdby.h:86


iLLD_TC38A: IfxSmuStdby.h Source File

  • Smu
  • Std
IfxSmuStdby.h
Go to the documentation of this file.
1 /**
2 * \file IfxSmuStdby.h
3 * \brief SMU basic functionality
4 * \ingroup IfxLld_Smu
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Smu_Std_Stdby STDBY
42 * \ingroup IfxLld_Smu_Std
43 * \defgroup IfxLld_Smu_Std_Stdby_Enumerations Enumerations
44 * \ingroup IfxLld_Smu_Std_Stdby
45 * \defgroup IfxLld_Smu_Std_Stdby_StdByFunctions StdBy Functions
46 * \ingroup IfxLld_Smu_Std_Stdby
47 */
48
49 #ifndef IFXSMUSTDBY_H
50 #define IFXSMUSTDBY_H 1
51
52 /******************************************************************************/
53 /*----------------------------------Includes----------------------------------*/
54 /******************************************************************************/
55
56 #include "_Impl/IfxSmu_cfg.h"
57 #include "IfxSmu_reg.h"
58 #include "Scu/Std/IfxScuWdt.h"
59 #include "_Utilities/Ifx_Assert.h"
60 #include "IfxPms_reg.h"
61
62 /******************************************************************************/
63 /*--------------------------------Enumerations--------------------------------*/
64 /******************************************************************************/
65
66 /** \addtogroup IfxLld_Smu_Std_Stdby_Enumerations
67 * \{ */
68 /** \brief This bit (CMD_STDBY.B.ASCE) controls if a status flag set in an AGx register upon detection of the alarm event can be cleared by software or not. When ASCE is enabled, software shall write a 1 to bit position in AGx to clear the bit
69 * (W1C). When a W1C action takes place the ASCE bit is automatically cleared to 0 by hardware and software shall set the ASCE bit again.
70 * 0B SMU_stdby alarm status bits in AGi cannot be cleared.
71 * 1B SMU_stdby alarm status bits in AGi can be cleared
72 */
73 typedef enum
74 {
75 IfxSmuStdby_AlarmStatusClear_disable = 0, /**< \brief SMU_stdby alarm status bits in AGi cannot be cleared. */
76 IfxSmuStdby_AlarmStatusClear_enable = 1 /**< \brief SMU_stdby alarm status bits in AGi can be cleared */
77 } IfxSmuStdby_AlarmStatusClear;
78
79 /** \brief Status flag for alarm (AG2i_STDBY.B.SFz)
80 * 0B Status flag does not report a fault condition
81 * 1B Status flag reports a fault condition
82 */
83 typedef enum
84 {
85 IfxSmuStdby_AlarmStatusFlag_noFaultExist = 0, /**< \brief Status flag does not report a fault condition */
86 IfxSmuStdby_AlarmStatusFlag_faultExist = 1 /**< \brief Status flag reports a fault condition */
87 } IfxSmuStdby_AlarmStatusFlag;
88
89 /** \brief Fault signaling configuration flag (AG2iFSP_STDBY.B.FEz)
90 */
91 typedef enum
92 {
93 IfxSmuStdby_FaultSignalAlarmConfigFlagEvent_disable = 0, /**< \brief FSP disabled for this alarm event */
94 IfxSmuStdby_FaultSignalAlarmConfigFlagEvent_enable = 1 /**< \brief FSP enabled for this alarm event. */
95 } IfxSmuStdby_FaultSignalAlarmConfigFlagEvent;
96
97 /** \brief Error Pin Fault State Status (AG2i_STDBY.B.FSPERR)
98 */
99 typedef enum
100 {
101 IfxSmuStdby_FspErrorPinFaultState_noFault = 0, /**< \brief Error pin was not set into fault state */
102 IfxSmuStdby_FspErrorPinFaultState_fault = 1 /**< \brief The Error pin was set into fault state */
103 } IfxSmuStdby_FspErrorPinFaultState;
104
105 /** \brief SMU_stdby Error pin function to be able set Pin to fault state. (CMD_STDBY.B.FSP0EN or CMD_STDBY.B.FSP1EN)
106 */
107 typedef enum
108 {
109 IfxSmuStdby_FspErrorPinState_inactive = 0, /**< \brief SMU_stdby Error Pin fault indication function on pin inactive. */
110 IfxSmuStdby_FspErrorPinState_active = 1 /**< \brief SMU_stdby Error Pin fault indication function on pin inactive. */
111 } IfxSmuStdby_FspErrorPinState;
112
113 /** \brief SMU_stdby Module Enable(CMD_STDBY.B.SMUEN)
114 */
115 typedef enum
116 {
117 IfxSmuStdby_SmuStdbyModuleState_disable = 0, /**< \brief SMU_stdby disabled. */
118 IfxSmuStdby_SmuStdbyModuleState_enable = 1 /**< \brief SMU_stdby enabled. */
119 } IfxSmuStdby_SmuStdbyModuleState;
120
121 /** \} */
122
123 /** \addtogroup IfxLld_Smu_Std_Stdby_StdByFunctions
124 * \{ */
125
126 /******************************************************************************/
127 /*-------------------------Inline Function Prototypes-------------------------*/
128 /******************************************************************************/
129
130 /** \brief This function clears the TSTEN, TSTRUN, TSTDONE, TSTOK, SMUERR and PMSERR flags
131 * \return None
132 */
133 IFX_INLINE void IfxSmuStdby_clearSmuStdbyMonBistFlags(void);
134
135 /** \brief This function enable / disables he Alarm status clear in the Smu Standby command register .
136 * This controls if a status flag set in an AGx register upon detection of the alarm event can be cleared by software or not. When ASCE is enabled, software shall write a 1 to bit position in AGx to clear the bit
137 * (W1C). When a W1C action takes place the ASCE bit is automatically cleared to 0 by hardware and software shall set the ASCE bit again.
138 * \return None
139 */
140 IFX_INLINE void IfxSmuStdby_enableAlarmStatusClear(void);
141
142 /** \brief This function enables the Smu Standby module
143 * \param enable SMU standby enable/disable Module
144 * \return None
145 */
146 IFX_INLINE void IfxSmuStdby_enableSmuStdby(IfxSmuStdby_SmuStdbyModuleState enable);
147
148 /** \brief This function enables the Smu standby Built-in Self test
149 * \return None
150 */
151 IFX_INLINE void IfxSmuStdby_enableSmuStdbyMonBist(void);
152
153 /** \brief Funtion returns Smu Standby Alarm Group status
154 * \param alarmGroup Smu standby Alarm group
155 * \return Smu standby status
156 */
157 IFX_INLINE uint32 IfxSmuStdby_getSmuStdbyAlarmGroupStatus(uint8 alarmGroup);
158
159 /** \brief Funtion returns Smu Standby Alarm status
160 * \param alarmGroup Smu standby Alarm group
161 * \param alarmNum alarm number
162 * \return Smu standby status
163 */
164 IFX_INLINE uint32 IfxSmuStdby_getSmuStdbyAlarmStatus(uint8 alarmGroup, uint8 alarmNum);
165
166 /** \brief This function returns the SMU standby module status (enabled/disabled).
167 * \return Smu standby status
168 */
169 IFX_INLINE IfxSmuStdby_SmuStdbyModuleState IfxSmuStdby_getSmuStdbyModuleStatus(void);
170
171 /** \brief This function returns the Smu Stdby BIST PMSERR flag
172 * \return Smu Stdby BIST PMSERR flag
173 */
174 IFX_INLINE boolean IfxSmuStdby_getSmuStdbyMonBistPmsErrorFlag(void);
175
176 /** \brief This function returns the Smu Stdby BIST SMUERR flag
177 * \return Smu Stdby BIST SMUERR flag
178 */
179 IFX_INLINE boolean IfxSmuStdby_getSmuStdbyMonBistSmuErrorFlag(void);
180
181 /** \brief This function returns the Smu Stdby BIST TSTDONE flag
182 * \return Smu Stdby BIST TSTDONE flag
183 */
184 IFX_INLINE boolean IfxSmuStdby_getSmuStdbyMonBistTestDoneFlag(void);
185
186 /** \brief This function returns the Smu Stdby BIST TSTOK flag
187 * \return Smu Stdby BIST TSTOK flag
188 */
189 IFX_INLINE boolean IfxSmuStdby_getSmuStdbyMonBistTestOkFlag(void);
190
191 /** \brief This function returns the Smu Stdby BIST TSTRUN flag
192 * \return Smu Stdby BIST TSTRUN flag
193 */
194 IFX_INLINE boolean IfxSmuStdby_getSmuStdbyMonBistTestRunFlag(void);
195
196 /** \brief This function sets FSP0 Error pin fault indication function .
197 * \param active Set FSP0 Error pin fault indication function to active / inactive
198 * \return None
199 */
200 IFX_INLINE void IfxSmuStdby_setFsp0ErrorPinActive(IfxSmuStdby_FspErrorPinState active);
201
202 /** \brief This function sets FSP1 Error pin fault indication function.
203 * \param active Set FSP1 Error pin fault indication function to active / inactive
204 * \return None
205 */
206 IFX_INLINE void IfxSmuStdby_setFsp1ErrorPinActive(IfxSmuStdby_FspErrorPinState active);
207
208 /******************************************************************************/
209 /*-------------------------Global Function Prototypes-------------------------*/
210 /******************************************************************************/
211
212 /** \brief Function to configure FSP Alarm group functionality
213 * \param alarmGroup alarm group
214 * \param flags Fault Signal Alarm Group config event flags
215 * \return None
216 */
217 IFX_EXTERN void IfxSmuStdby_setFaultSignalAGConfigEventFlags(uint8 alarmGroup, uint32 flags);
218
219 /** \brief Function to configure FSP functionality , FaultSignalAlarmConfigEventFlag (AG2iFSP_STDBY.B.FEz)
220 * \param alarmGroup alarm group
221 * \param alarmNum alarm number
222 * \param enable enable/disable Fault Signal Alarm config event flag
223 * \return None
224 */
225 IFX_EXTERN void IfxSmuStdby_setFaultSignalAlarmConfigEventFlag(uint8 alarmGroup, uint8 alarmNum, IfxSmuStdby_FaultSignalAlarmConfigFlagEvent enable);
226
227 /** \brief Function to configure alarm status. (AG2i_STDBY.B.SFz)
228 * \param alarmGroup alarm group
229 * \param alarmNum alarm number
230 * \param status enable/disable Alarm status flag
231 * \return None
232 */
233 IFX_EXTERN void IfxSmuStdby_setSmuStdbyAlarmStatusFlag(uint8 alarmGroup, uint8 alarmNum, IfxSmuStdby_AlarmStatusFlag status);
234
235 /** \brief This function enables the Smu standby Built-in Self test
236 * \return None
237 */
238 IFX_EXTERN void IfxSmuStdby_startSmuStdbyMonBist(void);
239
240 /** \} */
241
242 /******************************************************************************/
243 /*---------------------Inline Function Implementations------------------------*/
244 /******************************************************************************/
245
246 IFX_INLINE void IfxSmuStdby_clearSmuStdbyMonBistFlags(void)
247 {
248 Ifx_PMS_MONBISTCTRL monBistCtrl;
249 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
250
251 /* disable the write-protection for registers */
252 IfxScuWdt_clearSafetyEndinit(passwd);
253
254 monBistCtrl.U = PMS_MONBISTCTRL.U;
255 monBistCtrl.B.TSTCLR = 1;
256 monBistCtrl.B.BITPROT = 1;
257 PMS_MONBISTCTRL.U = monBistCtrl.U;
258
259 /* Restore back the write-protection for registers */
260 IfxScuWdt_setSafetyEndinit(passwd);
261 }
262
263
264 IFX_INLINE void IfxSmuStdby_enableAlarmStatusClear(void)
265 {
266 Ifx_PMS_CMD_STDBY cmdStdby;
267 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
268 /* disable the write-protection for registers */
269 IfxScuWdt_clearSafetyEndinit(passwd);
270 cmdStdby.U = PMS_CMD_STDBY.U;
271 cmdStdby.B.ASCE = 1;
272 cmdStdby.B.BITPROT = 1;
273 PMS_CMD_STDBY.U = cmdStdby.U;
274 /* Restore back the write-protection for registers */
275 IfxScuWdt_setSafetyEndinit(passwd);
276 }
277
278
279 IFX_INLINE void IfxSmuStdby_enableSmuStdby(IfxSmuStdby_SmuStdbyModuleState enable)
280 {
281 Ifx_PMS_CMD_STDBY cmdStdby;
282 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
283 /* disable the write-protection for registers */
284 IfxScuWdt_clearSafetyEndinit(passwd);
285
286 cmdStdby.U = PMS_CMD_STDBY.U;
287 cmdStdby.B.SMUEN = enable;
288 cmdStdby.B.BITPROT = 1;
289 PMS_CMD_STDBY.U = cmdStdby.U;
290
291 /* Restore back the write-protection for registers */
292 IfxScuWdt_setSafetyEndinit(passwd);
293 }
294
295
296 IFX_INLINE void IfxSmuStdby_enableSmuStdbyMonBist(void)
297 {
298 Ifx_PMS_MONBISTCTRL monBistCtrl;
299 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
300 /* disable the write-protection for registers */
301 IfxScuWdt_clearSafetyEndinit(passwd);
302
303 monBistCtrl.U = PMS_MONBISTCTRL.U;
304 monBistCtrl.B.TSTEN = 1;
305 monBistCtrl.B.BITPROT = 1;
306 PMS_MONBISTCTRL.U = monBistCtrl.U;
307
308 /* Restore back the write-protection for registers */
309 IfxScuWdt_setSafetyEndinit(passwd);
310 }
311
312
313 IFX_INLINE uint32 IfxSmuStdby_getSmuStdbyAlarmGroupStatus(uint8 alarmGroup)
314 {
315 uint32 alarmGroupStatus = 0;
316
317 if (alarmGroup == 20U)
318 {
319 alarmGroupStatus = PMS_AG_STDBY0.U & 0x0000FFFFU;
320 }
321 else if (alarmGroup == 21U)
322 {
323 alarmGroupStatus = PMS_AG_STDBY1.U;
324 }
325 else
326 {
327 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
328 }
329
330 return alarmGroupStatus;
331 }
332
333
334 IFX_INLINE uint32 IfxSmuStdby_getSmuStdbyAlarmStatus(uint8 alarmGroup, uint8 alarmNum)
335 {
336 uint32 alarmStatus = 0;
337
338 if (alarmGroup == 20U)
339 {
340 alarmStatus = (PMS_AG_STDBY0.U >> alarmNum) & 0x01U;
341 }
342 else if (alarmGroup == 21U)
343 {
344 alarmStatus = (PMS_AG_STDBY1.U >> alarmNum) & 0x01U;
345 }
346 else
347 {
348 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
349 }
350
351 return alarmStatus;
352 }
353
354
355 IFX_INLINE IfxSmuStdby_SmuStdbyModuleState IfxSmuStdby_getSmuStdbyModuleStatus(void)
356 {
357 return (IfxSmuStdby_SmuStdbyModuleState)PMS_CMD_STDBY.B.SMUEN;
358 }
359
360
361 IFX_INLINE boolean IfxSmuStdby_getSmuStdbyMonBistPmsErrorFlag(void)
362 {
363 return PMS_MONBISTSTAT.B.PMSERR;
364 }
365
366
367 IFX_INLINE boolean IfxSmuStdby_getSmuStdbyMonBistSmuErrorFlag(void)
368 {
369 return PMS_MONBISTSTAT.B.SMUERR;
370 }
371
372
373 IFX_INLINE boolean IfxSmuStdby_getSmuStdbyMonBistTestDoneFlag(void)
374 {
375 return PMS_MONBISTSTAT.B.TSTDONE;
376 }
377
378
379 IFX_INLINE boolean IfxSmuStdby_getSmuStdbyMonBistTestOkFlag(void)
380 {
381 return PMS_MONBISTSTAT.B.TSTOK;
382 }
383
384
385 IFX_INLINE boolean IfxSmuStdby_getSmuStdbyMonBistTestRunFlag(void)
386 {
387 return PMS_MONBISTSTAT.B.TSTRUN;
388 }
389
390
391 IFX_INLINE void IfxSmuStdby_setFsp0ErrorPinActive(IfxSmuStdby_FspErrorPinState active)
392 {
393 Ifx_PMS_CMD_STDBY cmdStdby;
394 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
395 /* disable the write-protection for registers */
396 IfxScuWdt_clearSafetyEndinit(passwd);
397
398 cmdStdby.U = PMS_CMD_STDBY.U;
399 cmdStdby.B.FSP0EN = (boolean)active;
400 cmdStdby.B.BITPROT = 1;
401 PMS_CMD_STDBY.U = cmdStdby.U;
402 /* Restore back the write-protection for registers */
403 IfxScuWdt_setSafetyEndinit(passwd);
404 }
405
406
407 IFX_INLINE void IfxSmuStdby_setFsp1ErrorPinActive(IfxSmuStdby_FspErrorPinState active)
408 {
409 Ifx_PMS_CMD_STDBY cmdStdby;
410 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
411 /* disable the write-protection for registers */
412 IfxScuWdt_clearSafetyEndinit(passwd);
413
414 cmdStdby.U = PMS_CMD_STDBY.U;
415 cmdStdby.B.FSP1EN = (boolean)active;
416 cmdStdby.B.BITPROT = 1;
417 PMS_CMD_STDBY.U = cmdStdby.U;
418 /* Restore back the write-protection for registers */
419 IfxScuWdt_setSafetyEndinit(passwd);
420 }
421
422
423 #endif /* IFXSMUSTDBY_H */
IfxSmuStdby_getSmuStdbyMonBistSmuErrorFlag
IFX_INLINE boolean IfxSmuStdby_getSmuStdbyMonBistSmuErrorFlag(void)
This function returns the Smu Stdby BIST SMUERR flag.
Definition: IfxSmuStdby.h:367
IfxSmuStdby_AlarmStatusClear
IfxSmuStdby_AlarmStatusClear
This bit (CMD_STDBY.B.ASCE) controls if a status flag set in an AGx register upon detection of the al...
Definition: IfxSmuStdby.h:73
IfxSmuStdby_FspErrorPinState_inactive
SMU_stdby Error Pin fault indication function on pin inactive.
Definition: IfxSmuStdby.h:109
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxSmu_cfg.h
Smu on-chip implementation data.
IfxSmuStdby_getSmuStdbyMonBistTestRunFlag
IFX_INLINE boolean IfxSmuStdby_getSmuStdbyMonBistTestRunFlag(void)
This function returns the Smu Stdby BIST TSTRUN flag.
Definition: IfxSmuStdby.h:385
IfxSmuStdby_setFaultSignalAGConfigEventFlags
IFX_EXTERN void IfxSmuStdby_setFaultSignalAGConfigEventFlags(uint8 alarmGroup, uint32 flags)
Function to configure FSP Alarm group functionality.
Definition: IfxSmuStdby.c:52
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxSmuStdby_FspErrorPinState
IfxSmuStdby_FspErrorPinState
SMU_stdby Error pin function to be able set Pin to fault state. (CMD_STDBY.B.FSP0EN or CMD_STDBY...
Definition: IfxSmuStdby.h:107
IfxSmuStdby_getSmuStdbyMonBistPmsErrorFlag
IFX_INLINE boolean IfxSmuStdby_getSmuStdbyMonBistPmsErrorFlag(void)
This function returns the Smu Stdby BIST PMSERR flag.
Definition: IfxSmuStdby.h:361
Ifx_Assert.h
Assert functions.
IfxSmuStdby_getSmuStdbyAlarmStatus
IFX_INLINE uint32 IfxSmuStdby_getSmuStdbyAlarmStatus(uint8 alarmGroup, uint8 alarmNum)
Funtion returns Smu Standby Alarm status.
Definition: IfxSmuStdby.h:334
IfxSmuStdby_AlarmStatusClear_disable
SMU_stdby alarm status bits in AGi cannot be cleared.
Definition: IfxSmuStdby.h:75
IfxSmuStdby_getSmuStdbyMonBistTestOkFlag
IFX_INLINE boolean IfxSmuStdby_getSmuStdbyMonBistTestOkFlag(void)
This function returns the Smu Stdby BIST TSTOK flag.
Definition: IfxSmuStdby.h:379
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxSmuStdby_FaultSignalAlarmConfigFlagEvent_enable
FSP enabled for this alarm event.
Definition: IfxSmuStdby.h:94
IfxScuWdt.h
SCU basic functionality.
IfxScuWdt_clearSafetyEndinit
void IfxScuWdt_clearSafetyEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:305
IfxSmuStdby_setFaultSignalAlarmConfigEventFlag
IFX_EXTERN void IfxSmuStdby_setFaultSignalAlarmConfigEventFlag(uint8 alarmGroup, uint8 alarmNum, IfxSmuStdby_FaultSignalAlarmConfigFlagEvent enable)
Function to configure FSP functionality , FaultSignalAlarmConfigEventFlag (AG2iFSP_STDBY.B.FEz)
Definition: IfxSmuStdby.c:84
IfxSmuStdby_AlarmStatusFlag_noFaultExist
Status flag does not report a fault condition.
Definition: IfxSmuStdby.h:85
IfxSmuStdby_enableAlarmStatusClear
IFX_INLINE void IfxSmuStdby_enableAlarmStatusClear(void)
This function enable / disables he Alarm status clear in the Smu Standby command register ...
Definition: IfxSmuStdby.h:264
IfxSmuStdby_clearSmuStdbyMonBistFlags
IFX_INLINE void IfxSmuStdby_clearSmuStdbyMonBistFlags(void)
This function clears the TSTEN, TSTRUN, TSTDONE, TSTOK, SMUERR and PMSERR flags.
Definition: IfxSmuStdby.h:246
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxSmuStdby_FspErrorPinState_active
SMU_stdby Error Pin fault indication function on pin inactive.
Definition: IfxSmuStdby.h:110
IfxSmuStdby_setFsp1ErrorPinActive
IFX_INLINE void IfxSmuStdby_setFsp1ErrorPinActive(IfxSmuStdby_FspErrorPinState active)
This function sets FSP1 Error pin fault indication function.
Definition: IfxSmuStdby.h:407
IfxSmuStdby_getSmuStdbyAlarmGroupStatus
IFX_INLINE uint32 IfxSmuStdby_getSmuStdbyAlarmGroupStatus(uint8 alarmGroup)
Funtion returns Smu Standby Alarm Group status.
Definition: IfxSmuStdby.h:313
IfxSmuStdby_FspErrorPinFaultState_noFault
Error pin was not set into fault state.
Definition: IfxSmuStdby.h:101
IfxSmuStdby_setSmuStdbyAlarmStatusFlag
IFX_EXTERN void IfxSmuStdby_setSmuStdbyAlarmStatusFlag(uint8 alarmGroup, uint8 alarmNum, IfxSmuStdby_AlarmStatusFlag status)
Function to configure alarm status. (AG2i_STDBY.B.SFz)
Definition: IfxSmuStdby.c:134
IfxSmuStdby_FaultSignalAlarmConfigFlagEvent
IfxSmuStdby_FaultSignalAlarmConfigFlagEvent
Fault signaling configuration flag (AG2iFSP_STDBY.B.FEz)
Definition: IfxSmuStdby.h:91
IfxSmuStdby_FaultSignalAlarmConfigFlagEvent_disable
FSP disabled for this alarm event.
Definition: IfxSmuStdby.h:93
IfxSmuStdby_FspErrorPinFaultState_fault
The Error pin was set into fault state.
Definition: IfxSmuStdby.h:102
boolean
unsigned char boolean
Definition: Platform_Types.h:104
IfxSmuStdby_AlarmStatusClear_enable
SMU_stdby alarm status bits in AGi can be cleared.
Definition: IfxSmuStdby.h:76
IfxSmuStdby_getSmuStdbyModuleStatus
IFX_INLINE IfxSmuStdby_SmuStdbyModuleState IfxSmuStdby_getSmuStdbyModuleStatus(void)
This function returns the SMU standby module status (enabled/disabled).
Definition: IfxSmuStdby.h:355
IfxSmuStdby_enableSmuStdby
IFX_INLINE void IfxSmuStdby_enableSmuStdby(IfxSmuStdby_SmuStdbyModuleState enable)
This function enables the Smu Standby module.
Definition: IfxSmuStdby.h:279
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxScuWdt_setSafetyEndinit
void IfxScuWdt_setSafetyEndinit(uint16 password)
SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:668
IfxSmuStdby_setFsp0ErrorPinActive
IFX_INLINE void IfxSmuStdby_setFsp0ErrorPinActive(IfxSmuStdby_FspErrorPinState active)
This function sets FSP0 Error pin fault indication function .
Definition: IfxSmuStdby.h:391
IfxScuWdt_getSafetyWatchdogPassword
uint16 IfxScuWdt_getSafetyWatchdogPassword(void)
SCUWDT API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.c:393
IfxSmuStdby_enableSmuStdbyMonBist
IFX_INLINE void IfxSmuStdby_enableSmuStdbyMonBist(void)
This function enables the Smu standby Built-in Self test.
Definition: IfxSmuStdby.h:296
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
enable
void enable
Definition: IfxCpu_IntrinsicsDcc.h:477
IfxSmuStdby_SmuStdbyModuleState_enable
SMU_stdby enabled.
Definition: IfxSmuStdby.h:118
IfxSmuStdby_startSmuStdbyMonBist
IFX_EXTERN void IfxSmuStdby_startSmuStdbyMonBist(void)
This function enables the Smu standby Built-in Self test.
Definition: IfxSmuStdby.c:189
IfxSmuStdby_SmuStdbyModuleState_disable
SMU_stdby disabled.
Definition: IfxSmuStdby.h:117
IfxSmuStdby_SmuStdbyModuleState
IfxSmuStdby_SmuStdbyModuleState
SMU_stdby Module Enable(CMD_STDBY.B.SMUEN)
Definition: IfxSmuStdby.h:115
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxSmuStdby_FspErrorPinFaultState
IfxSmuStdby_FspErrorPinFaultState
Error Pin Fault State Status (AG2i_STDBY.B.FSPERR)
Definition: IfxSmuStdby.h:99
IfxSmuStdby_AlarmStatusFlag
IfxSmuStdby_AlarmStatusFlag
Status flag for alarm (AG2i_STDBY.B.SFz) 0B Status flag does not report a fault condition 1B Status f...
Definition: IfxSmuStdby.h:83
IfxSmuStdby_AlarmStatusFlag_faultExist
Status flag reports a fault condition.
Definition: IfxSmuStdby.h:86
IfxSmuStdby_getSmuStdbyMonBistTestDoneFlag
IFX_INLINE boolean IfxSmuStdby_getSmuStdbyMonBistTestDoneFlag(void)
This function returns the Smu Stdby BIST TSTDONE flag.
Definition: IfxSmuStdby.h:373


iLLD_TC38A: IfxSrc.c Source File

  • Src
  • Std
IfxSrc.c
Go to the documentation of this file.
1 /**
2 * \file IfxSrc.c
3 * \brief SRC basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxSrc.h"
IfxSrc.h
SRC basic functionality.


iLLD_TC38A: IfxSrc.h Source File

  • Src
  • Std
IfxSrc.h
Go to the documentation of this file.
1 /**
2 * \file IfxSrc.h
3 * \brief SRC basic functionality
4 * \ingroup IfxLld_Src
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Src SRC
42 * \addtogroup IfxLld_Src
43 * \{
44 * \defgroup IfxLld_Src_Usage How to use Service Request Mechanism?
45 * \addtogroup IfxLld_Src_Usage
46 * \{
47 *
48 * For Aurix controller peripherals that can generate service requests is connected to one
49 * or more Service Request Nodes (SRNs) in the central Interrupt Router(IR) module. Refer to Controller User Manual for more details\n
50 *
51 * IfxSrc driver provides the APIs to configure and control service requests. Refer \ref IfxLld_Src_Usage for
52 * details of these APIs.
53 *
54 *
55 * \section Ifx_Src_UsageInit Initialize the Service Request Node
56 *
57 * Service request node is initialized to configure the following,\n
58 * 1) Route the interrupt trigger to service provider, which are:\n
59 * __a. One of the available CPUs or\n
60 * __b. DMA controller\n
61 *
62 * 2) Priority of CPU Interrupt or DMA Trigger.
63 *
64 * For Interrupt or DMA to be correctly triggered, following steps are to be done in the user code:
65 *
66 * \subsection Ifx_Src_UsageInitStep1 Step1: Configure the Node
67 *
68 * User must configure the service request node in the application / driver files.
69 *
70 * \subsection Ifx_Src_UsageInitStep2 Step2: Enable the Trigger
71 *
72 * Enable the service request node to connect the trigger event from the hardware to service provider.
73 *
74 * Example:
75 * Following example show the configuration for STM0 Service request 0 trigger configured to trigger
76 * CPU1 with the priority specified by IFX_INTPRIO_STM0 (from the example at IfxCpu_Irq)
77 *
78 * \code
79 * //file: myApplication.c
80 *
81 * #include "Ifx_IntPrioDef.h" // to get the priority numbers
82 *
83 * void myDriverInitFunction(void)
84 * {
85 * // driver init code
86 *
87 * // Step1: Call the function to route the trigger from for SRC_STM0_SR0 to CPU1
88 * // and priority specified at Ifx_IntPrioDef.h globally
89 * IfxSrc_init(&MODULE_SRC.STM.STM[0].SR[0], IfxSrc_Tos_cpu1, IFX_INTPRIO_STM0);
90 *
91 * // Step2: Enable the service request node
92 * IfxSrc_enable(&MODULE_SRC.STM.STM[0].SR[0]);
93 * }
94 * \endcode
95 *
96 * \}
97 * \}
98 *
99 * \defgroup IfxLld_Src_Std_Service_Request Service Request Functions
100 * \ingroup IfxLld_Src_Std
101 * \defgroup IfxLld_Src_Std_Module Module Functions
102 * \ingroup IfxLld_Src_Std
103 */
104
105 #ifndef IFXSRC_H
106 #define IFXSRC_H 1
107
108 /******************************************************************************/
109 /*----------------------------------Includes----------------------------------*/
110 /******************************************************************************/
111
112 #include "_Impl/IfxSrc_cfg.h"
113 #include "Cpu/Std/IfxCpu_Intrinsics.h"
114 #include "IfxSrc_reg.h"
115 /** \addtogroup IfxLld_Src_Std_Service_Request
116 * \{ */
117
118 /******************************************************************************/
119 /*-------------------------Inline Function Prototypes-------------------------*/
120 /******************************************************************************/
121
122 /** \brief Resets the overrun flag of the Service Request.
123 * \param src pointer to the Service Request Control register which the overrun flag should be cleared.
124 * \return None
125 *
126 * Usage example: see \ref IfxSrc_init
127 *
128 */
129 IFX_INLINE void IfxSrc_clearOverrun(volatile Ifx_SRC_SRCR *src);
130
131 /** \brief Resets a specific interrupt service by software.
132 * \param src pointer to the Service Request Control register which the request should be cleared.
133 * \return None
134 *
135 * Usage example: see \ref IfxSrc_init
136 *
137 */
138 IFX_INLINE void IfxSrc_clearRequest(volatile Ifx_SRC_SRCR *src);
139
140 /** \brief Gets the current overrun status.
141 * \param src pointer to the Service Request Control register for which the overrun status should be returned.
142 * \return current service request control overrun status.
143 *
144 * Usage example: see \ref IfxSrc_init
145 *
146 */
147 IFX_INLINE boolean IfxSrc_isOverrun(volatile Ifx_SRC_SRCR *src);
148
149 /** \brief Gets the current request status.
150 * \param src pointer to the Service Request Control register for which the request status should be returned.
151 * \return current service request control request status.
152 *
153 * Usage example: see \ref IfxSrc_init
154 *
155 */
156 IFX_INLINE boolean IfxSrc_isRequested(volatile Ifx_SRC_SRCR *src);
157
158 /** \brief Requests a specific interrupt service by software
159 * \param src pointer to the Service Request Control register which the interrupt has to be requested.
160 * \return None
161 *
162 * Usage example: see \ref IfxSrc_init
163 *
164 */
165 IFX_INLINE void IfxSrc_setRequest(volatile Ifx_SRC_SRCR *src);
166
167 /** \} */
168
169 /** \addtogroup IfxLld_Src_Std_Module
170 * \{ */
171
172 /******************************************************************************/
173 /*-------------------------Inline Function Prototypes-------------------------*/
174 /******************************************************************************/
175
176 /** \brief DeInitializes the service request control register.
177 * \param src pointer to the Service Request Control register which should be deinitialised.
178 * \return None
179 *
180 * Usage example: see \ref IfxSrc_init
181 *
182 */
183 IFX_INLINE void IfxSrc_deinit(volatile Ifx_SRC_SRCR *src);
184
185 /** \brief Disables a specific interrupt service request.
186 * \param src pointer to the Service Request Control register for which the interrupt has to be disabled.
187 * \return None
188 *
189 * Usage example: see \ref IfxSrc_init
190 *
191 */
192 IFX_INLINE void IfxSrc_disable(volatile Ifx_SRC_SRCR *src);
193
194 /** \brief Enables a specific interrupt service request.
195 * \param src pointer to the Service Request Control register for which the interrupt has to be enabled.
196 * \return None
197 *
198 * Usage example: see \ref IfxSrc_init
199 *
200 */
201 IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src);
202
203 /** \brief Initializes the service request control register.
204 * \param src pointer to the Service Request Control register which should be initialised.
205 * \param typOfService type of interrupt service provider.
206 * \param priority Interrupt priority.
207 * \return None
208 *
209 * Get the peripheral service control register which request need to be serviced and assign this service to any of service providers.
210 * \code
211 * //define the interrupt priority
212 * #define IFXASCLIN0_TX_INTPRIO 2
213 * //get the service request
214 * volatile Ifx_SRC_SRCR *src = IfxAsclin_getSrcPointerRx( &MODULE_ASCLIN0 );
215 * //initlaise the service request
216 * IfxSrc_init( src, IfxSrc_Tos_cpu0, IFXASCLIN0_TX_INTPRIO );
217 * // enable the service
218 * IfxSrc_enable( src );
219 * //check for service request flags and clear if they occur
220 * if ( IfxSrc_isRequested( src ) == TRUE )
221 * {
222 * IfxSrc_clearRequest( src );
223 * }
224 * if ( IfxSrc_isOverrun( src ) == TRUE )
225 * {
226 * IfxSrc_clearOverrun( src );
227 * }
228 * // Atlast deinitialise the service control
229 * IfxSrc_deinit( src );
230 * \endcode
231 *
232 */
233 IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority);
234
235 /** \} */
236
237 /******************************************************************************/
238 /*---------------------Inline Function Implementations------------------------*/
239 /******************************************************************************/
240
241 IFX_INLINE void IfxSrc_clearOverrun(volatile Ifx_SRC_SRCR *src)
242 {
243 src->B.IOVCLR = 1;
244 }
245
246
247 IFX_INLINE void IfxSrc_clearRequest(volatile Ifx_SRC_SRCR *src)
248 {
249 src->B.CLRR = 1;
250 }
251
252
253 IFX_INLINE void IfxSrc_deinit(volatile Ifx_SRC_SRCR *src)
254 {
255 src->U = 0;
256 }
257
258
259 IFX_INLINE void IfxSrc_disable(volatile Ifx_SRC_SRCR *src)
260 {
261 src->B.SRE = 0;
262 }
263
264
265 IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
266 {
267 src->B.SRE = 1;
268 }
269
270
271 IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
272 {
273 src->B.SRPN = priority;
274 src->B.TOS = typOfService;
275 IfxSrc_clearRequest(src);
276 }
277
278
279 IFX_INLINE boolean IfxSrc_isOverrun(volatile Ifx_SRC_SRCR *src)
280 {
281 return src->B.IOV ? TRUE : FALSE;
282 }
283
284
285 IFX_INLINE boolean IfxSrc_isRequested(volatile Ifx_SRC_SRCR *src)
286 {
287 return src->B.SRR ? TRUE : FALSE;
288 }
289
290
291 IFX_INLINE void IfxSrc_setRequest(volatile Ifx_SRC_SRCR *src)
292 {
293 src->B.SETR = 1;
294 }
295
296
297 #endif /* IFXSRC_H */
IfxSrc_clearOverrun
IFX_INLINE void IfxSrc_clearOverrun(volatile Ifx_SRC_SRCR *src)
Resets the overrun flag of the Service Request.
Definition: IfxSrc.h:241
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:100
IfxSrc_disable
IFX_INLINE void IfxSrc_disable(volatile Ifx_SRC_SRCR *src)
Disables a specific interrupt service request.
Definition: IfxSrc.h:259
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxCpu_Intrinsics.h
FALSE
#define FALSE
Definition: Platform_Types.h:93
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxSrc_deinit
IFX_INLINE void IfxSrc_deinit(volatile Ifx_SRC_SRCR *src)
DeInitializes the service request control register.
Definition: IfxSrc.h:253
IfxSrc_cfg.h
SRC on-chip implementation data.
IfxSrc_isRequested
IFX_INLINE boolean IfxSrc_isRequested(volatile Ifx_SRC_SRCR *src)
Gets the current request status.
Definition: IfxSrc.h:285
IfxSrc_isOverrun
IFX_INLINE boolean IfxSrc_isOverrun(volatile Ifx_SRC_SRCR *src)
Gets the current overrun status.
Definition: IfxSrc.h:279
IfxSrc_clearRequest
IFX_INLINE void IfxSrc_clearRequest(volatile Ifx_SRC_SRCR *src)
Resets a specific interrupt service by software.
Definition: IfxSrc.h:247
IfxSrc_setRequest
IFX_INLINE void IfxSrc_setRequest(volatile Ifx_SRC_SRCR *src)
Requests a specific interrupt service by software.
Definition: IfxSrc.h:291
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271


iLLD_TC38A: IfxSrc_cfg.c Source File

  • _Impl
IfxSrc_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxSrc_cfg.c
3 * \brief SRC on-chip implementation data
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxSrc_cfg.h"
IfxSrc_cfg.h
SRC on-chip implementation data.


iLLD_TC38A: IfxSrc_cfg.h Source File

  • _Impl
IfxSrc_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxSrc_cfg.h
3 * \brief SRC on-chip implementation data
4 * \ingroup IfxLld_Src
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Src SRC
42 * \ingroup IfxLld
43 * \defgroup IfxLld_Src_Impl Implementation
44 * \ingroup IfxLld_Src
45 * \defgroup IfxLld_Src_Std Standard Driver
46 * \ingroup IfxLld_Src
47 * \defgroup IfxLld_Src_Impl_Enumerations Enumerations
48 * \ingroup IfxLld_Src_Impl
49 */
50
51 #ifndef IFXSRC_CFG_H
52 #define IFXSRC_CFG_H 1
53
54 /******************************************************************************/
55 /*----------------------------------Includes----------------------------------*/
56 /******************************************************************************/
57
58 /******************************************************************************/
59 /*--------------------------------Enumerations--------------------------------*/
60 /******************************************************************************/
61
62 /** \addtogroup IfxLld_Src_Impl_Enumerations
63 * \{ */
64 /** \brief Identifier of interrupt service provider, which handles the interrupt service request.
65 */
66 typedef enum
67 {
68 IfxSrc_Tos_cpu0 = 0, /**< \brief CPU0 interrupt service provider, which handles the interrupt service request. */
69 IfxSrc_Tos_dma = 1, /**< \brief DMA interrupt service provider, which handles the interrupt service request. */
70 IfxSrc_Tos_cpu1 = 2, /**< \brief CPU1 interrupt service provider, which handles the interrupt service request. */
71 IfxSrc_Tos_cpu2 = 3, /**< \brief CPU2 interrupt service provider, which handles the interrupt service request. */
72 IfxSrc_Tos_cpu3 = 4 /**< \brief CPU3 interrupt service provider, which handles the interrupt service request. */
73 } IfxSrc_Tos;
74
75 /** \} */
76
77 #endif /* IFXSRC_CFG_H */
IfxSrc_Tos_cpu1
CPU1 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:70
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxSrc_Tos_dma
DMA interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:69
IfxSrc_Tos_cpu2
CPU2 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:71
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:68
IfxSrc_Tos_cpu3
CPU3 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:72


iLLD_TC38A: IfxStdIf.h Source File

  • Service
  • CpuGeneric
  • StdIf
IfxStdIf.h
Go to the documentation of this file.
1 /**
2 * \file IfxStdIf.h
3 * \brief Standard interface types
4 * \ingroup IfxLld
5 *
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 * $Date: 2014-02-27 20:08:23 GMT$
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 * \defgroup library_srvsw_stdif Standard interface
43 * \ingroup library_srvsw
44 *
45 *
46 *
47 * \par Terms
48 *
49 * Term | Description
50 * ------------------------- | -------
51 * Standard Interface | Interface defined in this document
52 * Interface Driver | Specific device driver as defined by the iLLD
53 * Standard Interface Driver | Specific interface driver which implements the Standard Interface
54 * API used at runtime | API that are used after initialization
55 * Module | Hardware functional block / IP
56 *
57 * \par Overview
58 * The Standard Interface provides generic runtime API written in C for common use case application. It abstracts the underlaying Interface Driver,
59 * i.e. the runtime API is completely device independent. It provides generic API for common use case application.
60 *
61 * Example of Standard Interface:
62 * - Serial communication interface
63 * - PWM interface
64 * - Position sensor interface
65 * - Timer interface
66 * - EEPROM interface
67 *
68 * The target is to be able to exchange the microcontroller or external connected devices on which the application is based with a minimal impact
69 * on the application code, to reduce the application software development and maintenance effort. This is archived by the Standard Interface,
70 * for which, changing the hardware only requires the update of the device configuration settings and the device initialization code. The API used
71 * at runtime, which represents the majority and the complexitity of the related code keep unchanged.
72 *
73 * Motivation: because the current software developed for the automotive applications mainly don’t use C++, the Standard Interface provides a common
74 * definition for the device driver and an alternative layer for different hardware instead of using C++ interface wrapper class.
75 *
76 *
77 * The below figure shows the layers used and an example of APIs used by the application.
78 * \image html "StandardInterfaceLayers.png" "Standard interface layers"
79 * \image html "StandardInterfaceDataPipeExample.png" "Standard interface example: Serial interface as data pipe"
80 * \image html "StandardInterfaceTimerExample.png" "Standard interface example: Timer"
81 *
82 * The Standard Interface is implemented by Standard Interface wrapper by providing the function pointer to the custom functions. This gives
83 * the possibility to the programmer to use it or not. When used, it increases the code portability but slightly decreases the performance in
84 * term of run time execution and code size. When not used, the performance is not affected.
85 *
86 *
87 * \par Definition
88 * The standard interface requires the definition of at least two components: the standard interface component and the standard interface wrapper
89 * component. The standard interface component defines for each standard interface a standard interface object and a set of standard APIs used at
90 * runtime by the application. The standard interface wrapper component initializes the standard interface component by linking it to the interface
91 * driver.
92 *
93 * \attention: The application shall explicitly use the API provided by the standard interface component at runtime to access driver’s parameters
94 * (setter/ getter) or action (methods). Trying to access members of the standard interface component directly though the object may not guaranty
95 * future code compatibility. The same applies to the interface driver (reminder).
96 *
97 *
98 * \par Convention
99 *
100 * The Standard interface defines the following files:
101 * Path/File | Description
102 * ----------------------------------------------- | -----------------
103 * 1_SrvSw/StdIf/IfxStdIf.h | Global standard interface definitions
104 * 1_SrvSw/StdIf/IfxStdIf_<standard interface>.h | Specific standard interface definitions
105 * TCxxx/<Module>/Ifx<Module>_<interface>.h/c | Specific standard interface wrapper initialization API are reconized by the name Ifx<Module>_<interface>_StdIf<std interface>Init()
106 * TCxxx/<Module>/Ifx<Module>_<interface>.h/c | Specific standard interface wrapper function API are named according to the interface driver naming rules
107 *
108 */
109
110 #ifndef IFXSTDIF_H_
111 #define IFXSTDIF_H_ 1
112
113 #include "Cpu/Std/Ifx_Types.h"
114
115 typedef void *IfxStdIf_InterfaceDriver; /**< \brief Pointer to the specific interface driver */
116
117 #endif /* IFXSTDIF_H_ */
IfxStdIf_InterfaceDriver
void * IfxStdIf_InterfaceDriver
Pointer to the specific interface driver.
Definition: IfxStdIf.h:115
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.


iLLD_TC38A: IfxStdIf_DPipe.c Source File

  • Service
  • CpuGeneric
  • StdIf
IfxStdIf_DPipe.c
Go to the documentation of this file.
1 /**
2 * \file IfxStdIf_DPipe.c
3 * \brief Standard interface: Data Pipe
4 * \ingroup IfxStdIf
5 *
6 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7 *
8 * $Date: 2014-02-27 20:08:23 GMT$
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "IfxStdIf_DPipe.h"
44 #include "_Utilities/Ifx_Assert.h"
45
46 #include <string.h>
47 #include <stdio.h>
48 #include <stdarg.h>
49
50 void IfxStdIf_DPipe_print(IfxStdIf_DPipe *stdIf, pchar format, ...)
51 {
52 if (!stdIf->txDisabled)
53 {
54 char message[STDIF_DPIPE_MAX_PRINT_SIZE + 1];
55 Ifx_SizeT count;
56 va_list args;
57 va_start(args, format);
58 vsprintf((char *)message, format, args);
59 va_end(args);
60 count = (Ifx_SizeT)strlen(message);
61 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, count < STDIF_DPIPE_MAX_PRINT_SIZE);
62 //return
63 IfxStdIf_DPipe_write(stdIf, (void *)message, &count, TIME_INFINITE);
64 }
65 else
66 {
67 //return TRUE;
68 }
69 }
IfxStdIf_DPipe_::txDisabled
boolean txDisabled
If disabled is set to TRUE, the output is disabled, else enabled.
Definition: IfxStdIf_DPipe.h:233
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxStdIf_DPipe_
Standard interface object.
Definition: IfxStdIf_DPipe.h:230
STDIF_DPIPE_MAX_PRINT_SIZE
#define STDIF_DPIPE_MAX_PRINT_SIZE
Size of the buffer allocated on the stack for the print function.
Definition: IfxStdIf_DPipe.h:74
Ifx_Assert.h
Assert functions.
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
IfxStdIf_DPipe_print
void IfxStdIf_DPipe_print(IfxStdIf_DPipe *stdIf, pchar format,...)
Definition: IfxStdIf_DPipe.c:50
IfxStdIf_DPipe_write
IFX_INLINE boolean IfxStdIf_DPipe_write(IfxStdIf_DPipe *stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Write binary data into the IfxStdIf_DPipe.
Definition: IfxStdIf_DPipe.h:259
IfxStdIf_DPipe.h
Standard interface: Data Pipe.
TIME_INFINITE
#define TIME_INFINITE
Definition: Ifx_Types.h:77
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
pchar
const char * pchar
const char pointer
Definition: Ifx_Types.h:53


iLLD_TC38A: IfxStdIf_DPipe.h Source File

  • Service
  • CpuGeneric
  • StdIf
IfxStdIf_DPipe.h
Go to the documentation of this file.
1 /**
2 * \file IfxStdIf_DPipe.h
3 * \brief Standard interface: Data Pipe
4 * \ingroup IfxStdIf
5 *
6 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7 *
8 * $Date: 2014-02-27 20:08:24 GMT$
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 * \defgroup library_srvsw_stdif_dpipe Standard interface: Data Pipe
43 * \ingroup library_srvsw_stdif
44 *
45 * The standard interafce data pipe (DPipe) abstract the hardware used for data transfer. It provide, after proper initialization an hardware independant way to write
46 * and read data to/from as communciation channel.
47 *
48 * \par Porting StandardIo to DPipe
49 * replace all
50 * - StandardIo type with IfxStdIf_DPipe
51 * - StandardIo_print with IfxStdIf_DPipe_print
52 * delete StandardIo.c and StandardIo.h
53 * Include "StdIf/IfxStdIf_DPipe.h" instead of "SysSe/Bsp/StandardIo.h"
54 *
55 * The following files are already ported: Ifx_Console, Ifx_Shell
56 *
57 */
58 #ifndef STDIF_DPIPE_H_
59 #define STDIF_DPIPE_H_ 1
60
61 #include "IfxStdIf.h"
62 //----------------------------------------------------------------------------------------
63 #ifndef ENDL
64 # define ENDL "\r\n"
65 #endif
66
67 /** \brief Forward declaration */
68 typedef struct IfxStdIf_DPipe_ IfxStdIf_DPipe;
69
70 typedef volatile boolean *IfxStdIf_DPipe_WriteEvent;
71 typedef volatile boolean *IfxStdIf_DPipe_ReadEvent;
72
73 /** \brief Size of the buffer allocated on the stack for the print function */
74 #define STDIF_DPIPE_MAX_PRINT_SIZE (255)
75
76 /** \brief Write binary data into the \ref IfxStdIf_DPipe.
77 *
78 * Initially the parameter 'count' specifies count of data to write.
79 * After execution the data pointed by 'count' specifies the data actually written
80 *
81 * \param stdif Pointer to the interface driver object
82 * \param data Pointer to the start of data
83 * \param count Pointer to the count of data (in bytes).
84 * \param timeout in system timer ticks
85 *
86 * \retval TRUE Returns TRUE if all items could be written
87 * \retval FALSE Returns FALSE if not all the items could be written
88 */
89 typedef boolean (*IfxStdIf_DPipe_Write)(IfxStdIf_InterfaceDriver stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout);
90
91 /** \brief Read data from the \ref IfxStdIf_DPipe object
92 *
93 * Initially the parameter 'count' specifies count of data to read.
94 * After execution the data pointed by 'count' specifies the data actually read.
95 *
96 * \param stdif Pointer to the interface driver object
97 * \param data Pointer to the start of data
98 * \param count Pointer to the count of data (in bytes).
99 * \param timeout in system timer ticks
100 *
101 * \retval TRUE Returns TRUE if all items could be read
102 * \retval FALSE Returns FALSE if not all the items could be read
103 */
104 typedef boolean (*IfxStdIf_DPipe_Read)(IfxStdIf_InterfaceDriver stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout);
105
106 /** \brief Returns the number of bytes in the rx buffer
107 *
108 * \param stdif Pointer to the interface driver object
109 *
110 * \return Returns the number of bytes in the rx buffer
111 */
112 typedef sint32 (*IfxStdIf_DPipe_GetReadCount)(IfxStdIf_InterfaceDriver stdIf);
113
114 /** \brief Returns read event object
115 *
116 * \param stdif Pointer to the interface driver object
117 *
118 * \return Returns read event object
119 */
120 typedef IfxStdIf_DPipe_ReadEvent (*IfxStdIf_DPipe_GetReadEvent)(IfxStdIf_InterfaceDriver stdIf);
121
122 /** \brief Returns number of bytes send
123 *
124 * \param stdif Pointer to the interface driver object
125 *
126 * \return Returns number of bytes send
127 */
128 typedef uint32 (*IfxStdIf_DPipe_GetSendCount)(IfxStdIf_InterfaceDriver stdIf);
129
130 /** \brief Returns the time stamp of the last transmit data
131 *
132 * \param stdif Pointer to the interface driver object
133 *
134 * \return Returns the time stamp of the last transmit data
135 */
136 typedef Ifx_TickTime (*IfxStdIf_DPipe_GetTxTimeStamp)(IfxStdIf_InterfaceDriver stdIf);
137
138 /** \brief Returns the number of free bytes (free space) in the tx buffer
139 *
140 * \param stdif Pointer to the interface driver object
141 *
142 * \return Returns the number of free bytes in the tx buffer
143 */
144 typedef sint32 (*IfxStdIf_DPipe_GetWriteCount)(IfxStdIf_InterfaceDriver stdIf);
145
146 /** \brief Returns write event object
147 *
148 * \param stdif Pointer to the interface driver object
149 *
150 * \return Returns write event object
151 */
152 typedef IfxStdIf_DPipe_WriteEvent (*IfxStdIf_DPipe_GetWriteEvent)(IfxStdIf_InterfaceDriver stdIf);
153
154 /** \brief Indicates if the required number of bytes are available for read in the buffer
155 *
156 * \param stdif Pointer to the interface driver object
157 * \param count Pointer to the count of data (in bytes).
158 * \param timeout in system timer ticks
159 *
160 * \return Returns TRUE if at least count bytes are available for read in the rx buffer,
161 * if not the Event is armed to be set when the buffer count is bigger or equal to the requested count
162 */
163 typedef boolean (*IfxStdIf_DPipe_CanReadCount)(IfxStdIf_InterfaceDriver stdIf, Ifx_SizeT count, Ifx_TickTime timeout);
164
165 /** \brief Indicates if there is enough free space to write the data in the buffer
166 *
167 * \param stdif Pointer to the interface driver object
168 * \param count Pointer to the count of data (in bytes).
169 * \param timeout in system timer ticks
170 *
171 * \return Returns TRUE if at least count bytes can be written to the tx buffer,
172 * if not the Event is armed to be set when the buffer free count is bigger or equal to the requested count
173 */
174 typedef boolean (*IfxStdIf_DPipe_CanWriteCount)(IfxStdIf_InterfaceDriver stdIf, Ifx_SizeT count, Ifx_TickTime timeout);
175
176 /** \brief Flush the transmit buffer by transmitting all data
177 *
178 * \param stdif Pointer to the interface driver object
179 * \param timeout timeout for the flush operation
180 *
181 * \return Returns TRUE if the FIFO is empty
182 */
183 typedef boolean (*IfxStdIf_DPipe_FlushTx)(IfxStdIf_InterfaceDriver stdIf, Ifx_TickTime timeout);
184
185 /** \brief Clears the RX buffer by removing all data
186 *
187 * \param stdif Pointer to the interface driver object
188 * \return void
189 */
190 typedef void (*IfxStdIf_DPipe_ClearRx)(IfxStdIf_InterfaceDriver stdIf);
191
192 /** \brief Clears the TX buffer by removing all data
193 *
194 * \param stdif Pointer to the interface driver object
195 * \return void
196 */
197 typedef void (*IfxStdIf_DPipe_ClearTx)(IfxStdIf_InterfaceDriver stdIf);
198
199 /** \brief handler called on reveive event
200 *
201 * \param stdif Pointer to the interface driver object
202 *
203 * \return none
204 */
205 typedef void (*IfxStdIf_DPipe_OnReceive)(IfxStdIf_InterfaceDriver stdIf);
206 /** \brief handler called on transmit event
207 *
208 * \param stdif Pointer to the interface driver object
209 *
210 * \return none
211 */
212 typedef void (*IfxStdIf_DPipe_OnTransmit)(IfxStdIf_InterfaceDriver stdIf);
213 /** \brief handler called on error event
214 *
215 * \param stdif Pointer to the interface driver object
216 *
217 * \return none
218 */
219 typedef void (*IfxStdIf_DPipe_OnError)(IfxStdIf_InterfaceDriver stdIf);
220 /** \brief Reset the sendCount counter
221 *
222 * \param stdif Pointer to the interface driver object
223 *
224 * \return none
225 */
226 typedef void (*IfxStdIf_DPipe_ResetSendCount)(IfxStdIf_InterfaceDriver stdIf);
227
228 /** \brief Standard interface object
229 */
230 struct IfxStdIf_DPipe_
231 {
232 IfxStdIf_InterfaceDriver driver; /**< \brief Pointer to the specific driver object */
233 boolean txDisabled; /**< \brief If disabled is set to TRUE, the output is disabled, else enabled */
234
235 /* Standard interface APIs */
236 IfxStdIf_DPipe_Write write; /**< \brief \see IfxStdIf_DPipe_Write */
237 IfxStdIf_DPipe_Read read; /**< \brief \see IfxStdIf_DPipe_Read */
238 IfxStdIf_DPipe_GetReadCount getReadCount; /**< \brief \see IfxStdIf_DPipe_GetReadCount */
239 IfxStdIf_DPipe_GetReadEvent getReadEvent; /**< \brief \see IfxStdIf_DPipe_GetReadEvent */
240 IfxStdIf_DPipe_GetWriteCount getWriteCount; /**< \brief \see IfxStdIf_DPipe_GetWriteCount */
241 IfxStdIf_DPipe_GetWriteEvent getWriteEvent; /**< \brief \see IfxStdIf_DPipe_GetWriteEvent */
242 IfxStdIf_DPipe_CanReadCount canReadCount; /**< \brief \see IfxStdIf_DPipe_CanReadCount */
243 IfxStdIf_DPipe_CanWriteCount canWriteCount; /**< \brief \see IfxStdIf_DPipe_CanWriteCount */
244 IfxStdIf_DPipe_FlushTx flushTx; /**< \brief \see IfxStdIf_DPipe_FlushTx */
245 IfxStdIf_DPipe_ClearTx clearTx; /**< \brief \see IfxStdIf_DPipe_ClearTx */
246 IfxStdIf_DPipe_ClearRx clearRx; /**< \brief \see IfxStdIf_DPipe_ClearRx */
247 IfxStdIf_DPipe_OnReceive onReceive; /**< \brief \see IfxStdIf_DPipe_OnReceive */
248 IfxStdIf_DPipe_OnTransmit onTransmit; /**< \brief \see IfxStdIf_DPipe_OnTransmit */
249 IfxStdIf_DPipe_OnError onError; /**< \brief \see IfxStdIf_DPipe_OnError */
250
251 IfxStdIf_DPipe_GetSendCount getSendCount; /**< \brief \see IfxStdIf_DPipe_GetSendCount */
252 IfxStdIf_DPipe_GetTxTimeStamp getTxTimeStamp; /**< \brief \see IfxStdIf_DPipe_GetTxTimeStamp */
253 IfxStdIf_DPipe_ResetSendCount resetSendCount; /**< \brief \see IfxStdIf_DPipe_ResetSendCount */
254 };
255 /** \addtogroup library_srvsw_stdif_dpipe
256 * \{ */
257 /** \copydoc IfxStdIf_DPipe_Write
258 */
259 IFX_INLINE boolean IfxStdIf_DPipe_write(IfxStdIf_DPipe *stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
260 {
261 return stdIf->write(stdIf->driver, data, count, timeout);
262 }
263
264
265 /** \copydoc IfxStdIf_DPipe_Read
266 */
267 IFX_INLINE boolean IfxStdIf_DPipe_read(IfxStdIf_DPipe *stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
268 {
269 return stdIf->read(stdIf->driver, data, count, timeout);
270 }
271
272
273 /** \copydoc IfxStdIf_DPipe_GetReadCount
274 */
275 IFX_INLINE sint32 IfxStdIf_DPipe_getReadCount(IfxStdIf_DPipe *stdIf)
276 {
277 return stdIf->getReadCount(stdIf->driver);
278 }
279
280
281 /** \copydoc IfxStdIf_DPipe_GetWriteCount
282 */
283 IFX_INLINE sint32 IfxStdIf_DPipe_getWriteCount(IfxStdIf_DPipe *stdIf)
284 {
285 return stdIf->getWriteCount(stdIf->driver);
286 }
287
288
289 /** \copydoc IfxStdIf_DPipe_CanReadCount
290 */
291 IFX_INLINE boolean IfxStdIf_DPipe_canReadCount(IfxStdIf_DPipe *stdIf, Ifx_SizeT count, Ifx_TickTime timeout)
292 {
293 return stdIf->canReadCount(stdIf->driver, count, timeout);
294 }
295
296
297 /** \copydoc IfxStdIf_DPipe_CanWriteCount
298 */
299 IFX_INLINE boolean IfxStdIf_DPipe_canWriteCount(IfxStdIf_DPipe *stdIf, Ifx_SizeT count, Ifx_TickTime timeout)
300 {
301 return stdIf->canWriteCount(stdIf->driver, count, timeout);
302 }
303
304
305 /** \copydoc IfxStdIf_DPipe_GetReadEvent
306 */
307 IFX_INLINE IfxStdIf_DPipe_ReadEvent IfxStdIf_DPipe_getReadEvent(IfxStdIf_DPipe *stdIf)
308 {
309 return stdIf->getReadEvent(stdIf->driver);
310 }
311
312
313 /** \copydoc IfxStdIf_DPipe_GetWriteEvent
314 */
315 IFX_INLINE IfxStdIf_DPipe_WriteEvent IfxStdIf_DPipe_getWriteEvent(IfxStdIf_DPipe *stdIf)
316 {
317 return stdIf->getWriteEvent(stdIf->driver);
318 }
319
320
321 /** \copydoc IfxStdIf_DPipe_FlushTx
322 */
323 IFX_INLINE boolean IfxStdIf_DPipe_flushTx(IfxStdIf_DPipe *stdIf, Ifx_TickTime timeout)
324 {
325 return stdIf->flushTx(stdIf->driver, timeout);
326 }
327
328
329 /** \copydoc IfxStdIf_DPipe_ClearTx
330 */
331 IFX_INLINE void IfxStdIf_DPipe_clearTx(IfxStdIf_DPipe *stdIf)
332 {
333 stdIf->clearTx(stdIf->driver);
334 }
335
336
337 /** \copydoc IfxStdIf_DPipe_ClearRx
338 */
339 IFX_INLINE void IfxStdIf_DPipe_clearRx(IfxStdIf_DPipe *stdIf)
340 {
341 stdIf->clearRx(stdIf->driver);
342 }
343
344
345 /** \copydoc IfxStdIf_DPipe_OnReceive
346 */
347 IFX_INLINE void IfxStdIf_DPipe_onReceive(IfxStdIf_DPipe *stdIf)
348 {
349 stdIf->onReceive(stdIf->driver);
350 }
351
352
353 /** \copydoc IfxStdIf_DPipe_OnTransmit
354 */
355 IFX_INLINE void IfxStdIf_DPipe_onTransmit(IfxStdIf_DPipe *stdIf)
356 {
357 stdIf->onTransmit(stdIf->driver);
358 }
359
360
361 /** \copydoc IfxStdIf_DPipe_OnError
362 */
363 IFX_INLINE void IfxStdIf_DPipe_onError(IfxStdIf_DPipe *stdIf)
364 {
365 stdIf->onError(stdIf->driver);
366 }
367
368
369 /** \copydoc IfxStdIf_DPipe_GetSendCount
370 */
371 IFX_INLINE uint32 IfxStdIf_DPipe_getSendCount(IfxStdIf_DPipe *stdIf)
372 {
373 return stdIf->getSendCount(stdIf->driver);
374 }
375
376
377 /** \copydoc IfxStdIf_DPipe_GetTxTimeStamp
378 */
379 IFX_INLINE Ifx_TickTime IfxStdIf_DPipe_getTxTimeStamp(IfxStdIf_DPipe *stdIf)
380 {
381 return stdIf->getTxTimeStamp(stdIf->driver);
382 }
383
384
385 /** \copydoc IfxStdIf_DPipe_ResetSendCount
386 */
387 IFX_INLINE void IfxStdIf_DPipe_resetSendCount(IfxStdIf_DPipe *stdIf)
388 {
389 stdIf->resetSendCount(stdIf->driver);
390 }
391
392
393 IFX_EXTERN void IfxStdIf_DPipe_print(IfxStdIf_DPipe *stdIf, pchar format, ...);
394
395 /** \} */
396 //----------------------------------------------------------------------------------------
397
398 #endif /* STDIF_DPIPE_H_ */
IfxStdIf_DPipe_::resetSendCount
IfxStdIf_DPipe_ResetSendCount resetSendCount
Definition: IfxStdIf_DPipe.h:253
IfxStdIf_DPipe_::canWriteCount
IfxStdIf_DPipe_CanWriteCount canWriteCount
Definition: IfxStdIf_DPipe.h:243
IfxStdIf_DPipe_canWriteCount
IFX_INLINE boolean IfxStdIf_DPipe_canWriteCount(IfxStdIf_DPipe *stdIf, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if there is enough free space to write the data in the buffer.
Definition: IfxStdIf_DPipe.h:299
IfxStdIf_DPipe_ResetSendCount
void(* IfxStdIf_DPipe_ResetSendCount)(IfxStdIf_InterfaceDriver stdIf)
Reset the sendCount counter.
Definition: IfxStdIf_DPipe.h:226
IfxStdIf_DPipe_onTransmit
IFX_INLINE void IfxStdIf_DPipe_onTransmit(IfxStdIf_DPipe *stdIf)
handler called on transmit event
Definition: IfxStdIf_DPipe.h:355
IfxStdIf_DPipe_clearTx
IFX_INLINE void IfxStdIf_DPipe_clearTx(IfxStdIf_DPipe *stdIf)
Clears the TX buffer by removing all data.
Definition: IfxStdIf_DPipe.h:331
IfxStdIf_DPipe_::txDisabled
boolean txDisabled
If disabled is set to TRUE, the output is disabled, else enabled.
Definition: IfxStdIf_DPipe.h:233
Ifx_TickTime
sint64 Ifx_TickTime
Time in ticks.
Definition: Ifx_Types.h:76
IfxStdIf_DPipe_::getTxTimeStamp
IfxStdIf_DPipe_GetTxTimeStamp getTxTimeStamp
Definition: IfxStdIf_DPipe.h:252
IfxStdIf_InterfaceDriver
void * IfxStdIf_InterfaceDriver
Pointer to the specific interface driver.
Definition: IfxStdIf.h:115
IfxStdIf_DPipe_::onTransmit
IfxStdIf_DPipe_OnTransmit onTransmit
Definition: IfxStdIf_DPipe.h:248
IfxStdIf_DPipe_
Standard interface object.
Definition: IfxStdIf_DPipe.h:230
IfxStdIf_DPipe_getReadEvent
IFX_INLINE IfxStdIf_DPipe_ReadEvent IfxStdIf_DPipe_getReadEvent(IfxStdIf_DPipe *stdIf)
Returns read event object.
Definition: IfxStdIf_DPipe.h:307
IfxStdIf_DPipe_::getWriteEvent
IfxStdIf_DPipe_GetWriteEvent getWriteEvent
Definition: IfxStdIf_DPipe.h:241
IfxStdIf_DPipe_getWriteCount
IFX_INLINE sint32 IfxStdIf_DPipe_getWriteCount(IfxStdIf_DPipe *stdIf)
Returns the number of free bytes (free space) in the tx buffer.
Definition: IfxStdIf_DPipe.h:283
IfxStdIf_DPipe_resetSendCount
IFX_INLINE void IfxStdIf_DPipe_resetSendCount(IfxStdIf_DPipe *stdIf)
Reset the sendCount counter.
Definition: IfxStdIf_DPipe.h:387
IfxStdIf_DPipe_::getWriteCount
IfxStdIf_DPipe_GetWriteCount getWriteCount
Definition: IfxStdIf_DPipe.h:240
IfxStdIf_DPipe_GetSendCount
uint32(* IfxStdIf_DPipe_GetSendCount)(IfxStdIf_InterfaceDriver stdIf)
Returns number of bytes send.
Definition: IfxStdIf_DPipe.h:128
IfxStdIf_DPipe_OnTransmit
void(* IfxStdIf_DPipe_OnTransmit)(IfxStdIf_InterfaceDriver stdIf)
handler called on transmit event
Definition: IfxStdIf_DPipe.h:212
IfxStdIf.h
Standard interface types.
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxStdIf_DPipe_::onError
IfxStdIf_DPipe_OnError onError
Definition: IfxStdIf_DPipe.h:249
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
IfxStdIf_DPipe_::read
IfxStdIf_DPipe_Read read
Definition: IfxStdIf_DPipe.h:237
IfxStdIf_DPipe_::getSendCount
IfxStdIf_DPipe_GetSendCount getSendCount
Definition: IfxStdIf_DPipe.h:251
IfxStdIf_DPipe_::canReadCount
IfxStdIf_DPipe_CanReadCount canReadCount
Definition: IfxStdIf_DPipe.h:242
IfxStdIf_DPipe_print
IFX_EXTERN void IfxStdIf_DPipe_print(IfxStdIf_DPipe *stdIf, pchar format,...)
Definition: IfxStdIf_DPipe.c:50
IfxStdIf_DPipe_CanWriteCount
boolean(* IfxStdIf_DPipe_CanWriteCount)(IfxStdIf_InterfaceDriver stdIf, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if there is enough free space to write the data in the buffer.
Definition: IfxStdIf_DPipe.h:174
IfxStdIf_DPipe_::write
IfxStdIf_DPipe_Write write
Definition: IfxStdIf_DPipe.h:236
IfxStdIf_DPipe_getReadCount
IFX_INLINE sint32 IfxStdIf_DPipe_getReadCount(IfxStdIf_DPipe *stdIf)
Returns the number of bytes in the rx buffer.
Definition: IfxStdIf_DPipe.h:275
IfxStdIf_DPipe_GetWriteEvent
IfxStdIf_DPipe_WriteEvent(* IfxStdIf_DPipe_GetWriteEvent)(IfxStdIf_InterfaceDriver stdIf)
Returns write event object.
Definition: IfxStdIf_DPipe.h:152
IfxStdIf_DPipe_GetReadEvent
IfxStdIf_DPipe_ReadEvent(* IfxStdIf_DPipe_GetReadEvent)(IfxStdIf_InterfaceDriver stdIf)
Returns read event object.
Definition: IfxStdIf_DPipe.h:120
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxStdIf_DPipe_::flushTx
IfxStdIf_DPipe_FlushTx flushTx
Definition: IfxStdIf_DPipe.h:244
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxStdIf_DPipe_getWriteEvent
IFX_INLINE IfxStdIf_DPipe_WriteEvent IfxStdIf_DPipe_getWriteEvent(IfxStdIf_DPipe *stdIf)
Returns write event object.
Definition: IfxStdIf_DPipe.h:315
IfxStdIf_DPipe_::onReceive
IfxStdIf_DPipe_OnReceive onReceive
Definition: IfxStdIf_DPipe.h:247
IfxStdIf_DPipe_Write
boolean(* IfxStdIf_DPipe_Write)(IfxStdIf_InterfaceDriver stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Write binary data into the IfxStdIf_DPipe.
Definition: IfxStdIf_DPipe.h:89
IfxStdIf_DPipe_OnReceive
void(* IfxStdIf_DPipe_OnReceive)(IfxStdIf_InterfaceDriver stdIf)
handler called on reveive event
Definition: IfxStdIf_DPipe.h:205
IfxStdIf_DPipe_::driver
IfxStdIf_InterfaceDriver driver
Pointer to the specific driver object.
Definition: IfxStdIf_DPipe.h:232
IfxStdIf_DPipe_CanReadCount
boolean(* IfxStdIf_DPipe_CanReadCount)(IfxStdIf_InterfaceDriver stdIf, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if the required number of bytes are available for read in the buffer.
Definition: IfxStdIf_DPipe.h:163
IfxStdIf_DPipe_write
IFX_INLINE boolean IfxStdIf_DPipe_write(IfxStdIf_DPipe *stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Write binary data into the IfxStdIf_DPipe.
Definition: IfxStdIf_DPipe.h:259
IfxStdIf_DPipe_::getReadEvent
IfxStdIf_DPipe_GetReadEvent getReadEvent
Definition: IfxStdIf_DPipe.h:239
IfxStdIf_DPipe_clearRx
IFX_INLINE void IfxStdIf_DPipe_clearRx(IfxStdIf_DPipe *stdIf)
Clears the RX buffer by removing all data.
Definition: IfxStdIf_DPipe.h:339
IfxStdIf_DPipe_GetWriteCount
sint32(* IfxStdIf_DPipe_GetWriteCount)(IfxStdIf_InterfaceDriver stdIf)
Returns the number of free bytes (free space) in the tx buffer.
Definition: IfxStdIf_DPipe.h:144
IfxStdIf_DPipe_onReceive
IFX_INLINE void IfxStdIf_DPipe_onReceive(IfxStdIf_DPipe *stdIf)
handler called on reveive event
Definition: IfxStdIf_DPipe.h:347
boolean
unsigned char boolean
Definition: Platform_Types.h:104
IfxStdIf_DPipe_::getReadCount
IfxStdIf_DPipe_GetReadCount getReadCount
Definition: IfxStdIf_DPipe.h:238
IfxStdIf_DPipe_flushTx
IFX_INLINE boolean IfxStdIf_DPipe_flushTx(IfxStdIf_DPipe *stdIf, Ifx_TickTime timeout)
Flush the transmit buffer by transmitting all data.
Definition: IfxStdIf_DPipe.h:323
IfxStdIf_DPipe_FlushTx
boolean(* IfxStdIf_DPipe_FlushTx)(IfxStdIf_InterfaceDriver stdIf, Ifx_TickTime timeout)
Flush the transmit buffer by transmitting all data.
Definition: IfxStdIf_DPipe.h:183
IfxStdIf_DPipe_::clearRx
IfxStdIf_DPipe_ClearRx clearRx
Definition: IfxStdIf_DPipe.h:246
IfxStdIf_DPipe_Read
boolean(* IfxStdIf_DPipe_Read)(IfxStdIf_InterfaceDriver stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Read data from the IfxStdIf_DPipe object.
Definition: IfxStdIf_DPipe.h:104
sint32
long sint32
Definition: Platform_Types.h:134
IfxStdIf_DPipe_WriteEvent
volatile boolean * IfxStdIf_DPipe_WriteEvent
Definition: IfxStdIf_DPipe.h:70
IfxStdIf_DPipe_GetReadCount
sint32(* IfxStdIf_DPipe_GetReadCount)(IfxStdIf_InterfaceDriver stdIf)
Returns the number of bytes in the rx buffer.
Definition: IfxStdIf_DPipe.h:112
IfxStdIf_DPipe_GetTxTimeStamp
Ifx_TickTime(* IfxStdIf_DPipe_GetTxTimeStamp)(IfxStdIf_InterfaceDriver stdIf)
Returns the time stamp of the last transmit data.
Definition: IfxStdIf_DPipe.h:136
IfxStdIf_DPipe_getTxTimeStamp
IFX_INLINE Ifx_TickTime IfxStdIf_DPipe_getTxTimeStamp(IfxStdIf_DPipe *stdIf)
Returns the time stamp of the last transmit data.
Definition: IfxStdIf_DPipe.h:379
IfxStdIf_DPipe_getSendCount
IFX_INLINE uint32 IfxStdIf_DPipe_getSendCount(IfxStdIf_DPipe *stdIf)
Returns number of bytes send.
Definition: IfxStdIf_DPipe.h:371
IfxStdIf_DPipe_ClearTx
void(* IfxStdIf_DPipe_ClearTx)(IfxStdIf_InterfaceDriver stdIf)
Clears the TX buffer by removing all data.
Definition: IfxStdIf_DPipe.h:197
IfxStdIf_DPipe_OnError
void(* IfxStdIf_DPipe_OnError)(IfxStdIf_InterfaceDriver stdIf)
handler called on error event
Definition: IfxStdIf_DPipe.h:219
IfxStdIf_DPipe_read
IFX_INLINE boolean IfxStdIf_DPipe_read(IfxStdIf_DPipe *stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Read data from the IfxStdIf_DPipe object.
Definition: IfxStdIf_DPipe.h:267
IfxStdIf_DPipe_canReadCount
IFX_INLINE boolean IfxStdIf_DPipe_canReadCount(IfxStdIf_DPipe *stdIf, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if the required number of bytes are available for read in the buffer.
Definition: IfxStdIf_DPipe.h:291
IfxStdIf_DPipe_onError
IFX_INLINE void IfxStdIf_DPipe_onError(IfxStdIf_DPipe *stdIf)
handler called on error event
Definition: IfxStdIf_DPipe.h:363
pchar
const char * pchar
const char pointer
Definition: Ifx_Types.h:53
IfxStdIf_DPipe_::clearTx
IfxStdIf_DPipe_ClearTx clearTx
Definition: IfxStdIf_DPipe.h:245
IfxStdIf_DPipe_ReadEvent
volatile boolean * IfxStdIf_DPipe_ReadEvent
Definition: IfxStdIf_DPipe.h:71
IfxStdIf_DPipe_ClearRx
void(* IfxStdIf_DPipe_ClearRx)(IfxStdIf_InterfaceDriver stdIf)
Clears the RX buffer by removing all data.
Definition: IfxStdIf_DPipe.h:190


iLLD_TC38A: IfxStdIf_Pos.c Source File

  • Service
  • CpuGeneric
  • StdIf
IfxStdIf_Pos.c
Go to the documentation of this file.
1 /**
2 * \file IfxStdIf_Pos.c
3 * \brief Standard interface: Position interface
4 * \ingroup IfxStdIf
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "IfxStdIf_Pos.h"
44
45 void IfxStdIf_Pos_initConfig (IfxStdIf_Pos_Config * config)
46 {
47 config->offset = 0;
48 config->reversed = FALSE;
49 config->resolution = 0;
50 config->periodPerRotation = 1;
51 config->resolutionFactor = IfxStdIf_Pos_ResolutionFactor_oneFold;
52 config->updatePeriod = 0.001;
53 config->speedModeThreshold = 0;
54 config->minSpeed = 0; // 0 rpm
55 config->maxSpeed = 20000.0 / 60.0 * (2 * IFX_PI); // 20000 rpm
56 config->speedFilterEnabled = FALSE;
57 config->speedFilerCutOffFrequency = 0;
58
59 }
60
61 void IfxStdIf_Pos_printStatus(IfxStdIf_Pos *driver, IfxStdIf_DPipe *io)
62 {
63 IfxStdIf_Pos_Status status;
64 status = IfxStdIf_Pos_getFault(driver);
65
66 IfxStdIf_DPipe_print(io, "DSADC RDC status:" ENDL);
67 if (status.status != 0)
68 {
69 if (status.B.commError)
70 {
71 IfxStdIf_DPipe_print(io, "- Communication error" ENDL);
72 }
73 if (status.B.notSynchronised)
74 {
75 IfxStdIf_DPipe_print(io, "- Synchronization error" ENDL);
76 }
77 if (status.B.signalDegradation)
78 {
79 IfxStdIf_DPipe_print(io, "- Signal degradation error" ENDL);
80 }
81 if (status.B.signalLoss)
82 {
83 IfxStdIf_DPipe_print(io, "- Signal loss error" ENDL);
84 }
85 if (status.B.trackingLoss)
86 {
87 IfxStdIf_DPipe_print(io, "- Tracking error" ENDL);
88 }
89 }
90 else
91 {
92 IfxStdIf_DPipe_print(io, "- Ready" ENDL);
93 }
94 }
IfxStdIf_Pos_Config::speedModeThreshold
float32 speedModeThreshold
Speed threshold used for the speed calculation mode. For encoder, above the threshold the pulse count...
Definition: IfxStdIf_Pos.h:319
IfxStdIf_Pos_Config::resolution
sint32 resolution
Sensor resolution. For encoder with 1024 pulse per revolution, the value should be 1024...
Definition: IfxStdIf_Pos.h:315
IfxStdIf_DPipe_
Standard interface object.
Definition: IfxStdIf_DPipe.h:230
IfxStdIf_Pos_initConfig
void IfxStdIf_Pos_initConfig(IfxStdIf_Pos_Config *config)
Definition: IfxStdIf_Pos.c:45
ENDL
#define ENDL
Definition: IfxStdIf_DPipe.h:64
IfxStdIf_Pos_Config::minSpeed
float32 minSpeed
Absolute minimal allowed speed. below speed is recognized as 0rad/s.
Definition: IfxStdIf_Pos.h:320
IfxStdIf_Pos_Config::resolutionFactor
IfxStdIf_Pos_ResolutionFactor resolutionFactor
Resolution multiplier for encoder interface, valid is 2, 4.
Definition: IfxStdIf_Pos.h:317
IfxStdIf_Pos_getFault
IFX_INLINE IfxStdIf_Pos_Status IfxStdIf_Pos_getFault(IfxStdIf_Pos *stdIf)
Return the sensor status. MCMETILLD-521
Definition: IfxStdIf_Pos.h:350
IfxStdIf_Pos_Status::status
uint32 status
Global status access.
Definition: IfxStdIf_Pos.h:102
IfxStdIf_DPipe_print
void IfxStdIf_DPipe_print(IfxStdIf_DPipe *stdIf, pchar format,...)
Definition: IfxStdIf_DPipe.c:50
IfxStdIf_Pos_Config::maxSpeed
float32 maxSpeed
Absolute maximal allowed speed. Above speed is recognized as error.
Definition: IfxStdIf_Pos.h:321
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxStdIf_Pos_Status::B
struct IfxStdIf_Pos_Status::@0 B
Bitfielf status access.
IFX_PI
#define IFX_PI
Definition: Ifx_Types.h:217
IfxStdIf_Pos_Config::reversed
boolean reversed
If true, the sensor direction is reversed.
Definition: IfxStdIf_Pos.h:314
IfxStdIf_Pos.h
Standard interface: Position interface.
IfxStdIf_Pos_printStatus
void IfxStdIf_Pos_printStatus(IfxStdIf_Pos *driver, IfxStdIf_DPipe *io)
Print the device status.
Definition: IfxStdIf_Pos.c:61
IfxStdIf_Pos_Config::updatePeriod
float32 updatePeriod
period in seconds, at which the application calls IfxStdIf_Pos_update()
Definition: IfxStdIf_Pos.h:318
IfxStdIf_Pos_Config
Position interface configuration.
Definition: IfxStdIf_Pos.h:311
IfxStdIf_Pos_
Standard interface object.
Definition: IfxStdIf_Pos.h:283
IfxStdIf_Pos_Config::offset
sint32 offset
Position sensor offset.
Definition: IfxStdIf_Pos.h:313
IfxStdIf_Pos_Config::speedFilerCutOffFrequency
float32 speedFilerCutOffFrequency
Speed low pass filter cut off frequency.
Definition: IfxStdIf_Pos.h:323
IfxStdIf_Pos_ResolutionFactor_oneFold
Default, no multipluication factor.
Definition: IfxStdIf_Pos.h:75
IfxStdIf_Pos_Status
Position sensor status definition.
Definition: IfxStdIf_Pos.h:100
IfxStdIf_Pos_Config::speedFilterEnabled
boolean speedFilterEnabled
Enable / disable the speed low pass filter.
Definition: IfxStdIf_Pos.h:322
IfxStdIf_Pos_Config::periodPerRotation
uint16 periodPerRotation
Number of period per rotation. Is usually 1 for encoder.
Definition: IfxStdIf_Pos.h:316


iLLD_TC38A: IfxStdIf_Pos.h Source File

  • Service
  • CpuGeneric
  • StdIf
IfxStdIf_Pos.h
Go to the documentation of this file.
1 /**
2 * \file IfxStdIf_Pos.h
3 * \brief Standard interface: Position interface
4 * \ingroup IfxStdIf
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 * \defgroup library_srvsw_stdif_posif Standard interface: Position interface
43 * \ingroup library_srvsw_stdif
44 *
45 * The standard interface position interface (IfxStdIf_Pos) abstract the hardware used for position interface feature like encoder, hall, resolver, ... It provide, after proper initialization an hardware
46 * Independent way to interact with the position sensor like getting position, speed, direction, ...
47 *
48 * The figure below shows the standard position interface.
49 *
50 * \image html "stdif_PosIf.png" "Standard position interface"
51 *
52 * This interface defines the following features:
53 * -
54 *
55 *
56 */
57
58 #ifndef IFXSTDIF_POSIF_H
59 #define IFXSTDIF_POSIF_H 1
60
61 #include "Cpu/Std/Ifx_Types.h"
62 #include "IfxStdIf.h"
63 #include "IfxStdIf_DPipe.h"
64
65 /** \brief Output event enable / disable */
66 typedef enum
67 {
68 IfxStdIf_Pos_MotionType_rotating, /**< \brief Rotating sensor */
69 IfxStdIf_Pos_MotionType_linear /**< \brief Linear sensor */
70 } IfxStdIf_Pos_MotionType;
71
72 /** \brief Output event enable / disable */
73 typedef enum
74 {
75 IfxStdIf_Pos_ResolutionFactor_oneFold = 1, /**< \brief Default, no multipluication factor */
76 IfxStdIf_Pos_ResolutionFactor_twoFold = 2, /**< \brief 2-fold resolution. Valid for encoder */
77 IfxStdIf_Pos_ResolutionFactor_fourFold = 4 /**< \brief 4-fold resolution. Valid for encoder */
78 } IfxStdIf_Pos_ResolutionFactor;
79
80 /** \brief Position sensor Types */
81 typedef enum
82 {
83 IfxStdIf_Pos_SensorType_encoder,
84 IfxStdIf_Pos_SensorType_hall,
85 IfxStdIf_Pos_SensorType_resolver,
86 IfxStdIf_Pos_SensorType_angletrk,
87 IfxStdIf_Pos_SensorType_igmr,
88 IfxStdIf_Pos_SensorType_virtual
89 } IfxStdIf_Pos_SensorType;
90
91 /** \brief Position sensor direction definition */
92 typedef enum
93 {
94 IfxStdIf_Pos_Dir_forward, /**< \brief Forward direction. For rotating position sensor, forward is clockwise rotation */
95 IfxStdIf_Pos_Dir_backward, /**< \brief Backward direction. For rotating position sensor, fackward is counter-clockwise rotation */
96 IfxStdIf_Pos_Dir_unknown /**< \brief Unknown direction */
97 } IfxStdIf_Pos_Dir;
98
99 /** \brief Position sensor status definition */
100 typedef union
101 {
102 uint32 status; /**< \brief Global status access */
103 struct
104 {
105 uint32 notSynchronised : 1; /**< \brief Sensor is not synchronized */
106 uint32 signalLoss : 1; /**< \brief Loss of signal error */
107 uint32 signalDegradation : 1; /**< \brief Signal degradation warning */
108 uint32 trackingLoss : 1; /**< \brief Tracking loss error */
109 uint32 commError : 1; /**< \brief Communication error*/
110 } B; /**< \brief Bitfielf status access */
111 } IfxStdIf_Pos_Status;
112
113 typedef sint32 IfxStdIf_Pos_RawAngle;
114
115 /** \brief Forward declaration */
116 typedef struct IfxStdIf_Pos_ IfxStdIf_Pos;
117
118 /** \brief Return the position, inclusive turns
119 *
120 * Return the sensor position in rad for rotating sensor inclusive turns, or in m for linear sensors.
121 * For linear sensor the effect is the same as IfxStdIf_Pos_GetPosition.
122 *
123 * \param stdIf Pointer to the interface driver object
124 * \return Return the position inclusive turns in rad
125 */
126 typedef float32 (*IfxStdIf_Pos_GetAbsolutePosition)(IfxStdIf_InterfaceDriver stdIf);
127
128 /** \brief Handles the zero interrupt
129 * \param stdIf Pointer to the interface driver object
130 * \return none
131 */
132 typedef void (*IfxStdIf_Pos_OnZeroIrq)(IfxStdIf_InterfaceDriver stdIf);
133
134 /** \brief Return the raw position sensor offset
135 *
136 * \param stdIf Pointer to the interface driver object
137 * \return Return the raw position sensor offset sensor in ticks
138 */
139 typedef sint32 (*IfxStdIf_Pos_GetOffset)(IfxStdIf_InterfaceDriver stdIf);
140
141 /** \brief Return the position
142 *
143 * Return the sensor position in rad for rotating sensor or in m for linear sensors.
144 * For rotating sensor, the position is always between 0 and 2*IFX_PI.
145 *
146 * \param stdIf Pointer to the interface driver object
147 * \return Return the position in rad or m
148 */
149 typedef float32 (*IfxStdIf_Pos_GetPosition)(IfxStdIf_InterfaceDriver stdIf);
150
151 /** \brief Return the direction
152 *
153 * Return the sensor direction.
154 *
155 * \param stdIf Pointer to the interface driver object
156 * \return Return the direction
157 */
158 typedef IfxStdIf_Pos_Dir (*IfxStdIf_Pos_GetDirection)(IfxStdIf_InterfaceDriver stdIf);
159
160 /** \brief Return the sensor status
161 *
162 * \param stdIf Pointer to the interface driver object
163 * \return Return the sensor status
164 */
165 typedef IfxStdIf_Pos_Status (*IfxStdIf_Pos_GetFault)(IfxStdIf_InterfaceDriver stdIf);
166
167 /** \brief Return the period per rotation setting
168 *
169 * \param stdIf Pointer to the interface driver object
170 * \return Return the period per rotation setting
171 */
172 typedef uint16 (*IfxStdIf_Pos_GetPeriodPerRotation)(IfxStdIf_InterfaceDriver stdIf);
173
174 /** \brief Return the raw position in ticks
175 *
176 * Return the sensor raw position in ticks.
177 *
178 * \param stdIf Pointer to the interface driver object
179 * \return Return the raw position in ticks
180 */
181 typedef sint32 (*IfxStdIf_Pos_GetRawPosition)(IfxStdIf_InterfaceDriver stdIf);
182
183 /** \brief Get the update period
184 * \param stdIf Pointer to the interface driver object
185 * \return Return the update period in s
186 */
187 typedef float32 (*IfxStdIf_Pos_GetRefreshPeriod)(IfxStdIf_InterfaceDriver stdIf);
188
189 /** \brief Get the resolution
190 * \param stdIf Pointer to the interface driver object
191 * \return Return the resolution
192 */
193 typedef sint32 (*IfxStdIf_Pos_GetResolution)(IfxStdIf_InterfaceDriver stdIf);
194
195 /** \brief Get the sensor type
196 * \param stdIf Pointer to the interface driver object
197 * \return Return the sensor type
198 */
199 typedef IfxStdIf_Pos_SensorType (*IfxStdIf_Pos_GetSensorType)(IfxStdIf_InterfaceDriver stdIf);
200
201 /** \brief Return the speed
202 * \param stdIf Pointer to the interface driver object
203 * \return Return the speed in rad/s or m/s
204 */
205 typedef float32 (*IfxStdIf_Pos_GetSpeed)(IfxStdIf_InterfaceDriver stdIf);
206
207 /** \brief Return position in turn
208 * \param stdIf Pointer to the interface driver object
209 * \return Return position in turn
210 */
211 typedef sint32 (*IfxStdIf_Pos_GetTurn)(IfxStdIf_InterfaceDriver stdIf);
212
213 /** \brief Handles the A sensor event
214 * Event A is a sensor defined event. it is optional.
215 * \param stdIf Pointer to the interface driver object
216 * \return none
217 */
218 typedef void (*IfxStdIf_Pos_OnEventA)(IfxStdIf_InterfaceDriver stdIf);
219
220 /** \brief Refresh the status
221 *
222 * Update the stdIf state like speed, position, status, taking into account the updatePeriod
223 *
224 * \param stdIf Pointer to the interface driver object
225 * \return None
226 */
227 typedef void (*IfxStdIf_Pos_Update)(IfxStdIf_InterfaceDriver stdIf);
228
229 /** \brief Reset the driver
230 *
231 * Clear faults, reset speed and position to 0
232 *
233 * \param stdIf Pointer to the interface driver object
234 * \return None
235 */
236 typedef void (*IfxStdIf_Pos_Reset)(IfxStdIf_InterfaceDriver stdIf);
237
238 /** \brief Reset the driver fault
239 *
240 * Clear faults
241 *
242 * \param stdIf Pointer to the interface driver object
243 * \return None
244 */
245 typedef void (*IfxStdIf_Pos_ResetFaults)(IfxStdIf_InterfaceDriver stdIf);
246
247 /** \brief Set the sensor offset
248 * \param stdIf Pointer to the interface driver object
249 * \param offset Offset in sensor ticks
250 * \return None
251 */
252 typedef void (*IfxStdIf_Pos_SetOffset)(IfxStdIf_InterfaceDriver stdIf, sint32 offset);
253
254 /** \brief Set the sensor position (virtual sensor)
255 * \param stdIf Pointer to the interface driver object
256 * \param position Position sensor rad
257 * \return None
258 */
259 typedef void (*IfxStdIf_Pos_SetPosition)(IfxStdIf_InterfaceDriver stdIf, float32 position);
260 /** \brief Set the sensor position (virtual sensor)
261 * \param stdIf Pointer to the interface driver object
262 * \param position Position sensor ticks
263 * \return None
264 */
265 typedef void (*IfxStdIf_Pos_SetRawPosition)(IfxStdIf_InterfaceDriver stdIf, sint32 position);
266
267 /** \brief Set the sensor speed (virtual sensor)
268 * \param stdIf Pointer to the interface driver object
269 * \param speed speed in rad/s
270 * \return None
271 */
272 typedef void (*IfxStdIf_Pos_SetSpeed)(IfxStdIf_InterfaceDriver stdIf, float32 speed);
273
274 /** \brief Set the update period
275 * \param stdIf Pointer to the interface driver object
276 * \param updatePeriod Refresh period in s
277 * \return None
278 */
279 typedef void (*IfxStdIf_Pos_SetRefreshPeriod)(IfxStdIf_InterfaceDriver stdIf, float32 updatePeriod);
280
281 /** \brief Standard interface object
282 */
283 struct IfxStdIf_Pos_
284 {
285 IfxStdIf_InterfaceDriver driver; /**< \brief Interface driver object */
286 IfxStdIf_Pos_OnZeroIrq onZeroIrq; /**< \brief \see IfxStdIf_Pos_OnZeroIrq */
287 IfxStdIf_Pos_GetAbsolutePosition getAbsolutePosition; /**< \brief Return the absolute position */
288 IfxStdIf_Pos_GetOffset getOffset; /**< \brief \see IfxStdIf_Pos_GetOffset */
289 IfxStdIf_Pos_GetPosition getPosition; /**< \brief \see IfxStdIf_Pos_GetPosition */
290 IfxStdIf_Pos_GetDirection getDirection; /**< \brief \see IfxStdIf_Pos_GetDirection */
291 IfxStdIf_Pos_GetFault getFault; /**< \brief \see IfxStdIf_Pos_GetFault */
292 IfxStdIf_Pos_GetRawPosition getRawPosition; /**< \brief \see IfxStdIf_Pos_GetRawPosition */
293 IfxStdIf_Pos_GetPeriodPerRotation getPeriodPerRotation; /**< \brief \see IfxStdIf_Pos_GetPeriodPerRotation */
294 IfxStdIf_Pos_GetRefreshPeriod getRefreshPeriod; /**< \brief \see IfxStdIf_Pos_GetRefreshPeriod */
295 IfxStdIf_Pos_GetResolution getResolution; /**< \brief \see IfxStdIf_Pos_GetResolution */
296 IfxStdIf_Pos_GetSensorType getSensorType; /**< \brief \see IfxStdIf_Pos_GetSensorType */
297 IfxStdIf_Pos_GetTurn getTurn; /**< \brief \see IfxStdIf_Pos_GetTurn */
298 IfxStdIf_Pos_OnEventA onEventA; /**< \brief \see IfxStdIf_Pos_OnEventA */
299 IfxStdIf_Pos_Reset reset; /**< \brief \see IfxStdIf_Pos_Reset */
300 IfxStdIf_Pos_ResetFaults resetFaults; /**< \brief \see IfxStdIf_Pos_ResetFaults */
301 IfxStdIf_Pos_GetSpeed getSpeed; /**< \brief \see IfxStdIf_Pos_GetSpeed */
302 IfxStdIf_Pos_Update update; /**< \brief \see IfxStdIf_Pos_Update */
303 IfxStdIf_Pos_SetOffset setOffset; /**< \brief \see IfxStdIf_Pos_SetOffset */
304 IfxStdIf_Pos_SetPosition setPosition; /**< \brief \see IfxStdIf_Pos_SetPosition */
305 IfxStdIf_Pos_SetRawPosition setRawPosition; /**< \brief \see IfxStdIf_Pos_SetRawPosition */
306 IfxStdIf_Pos_SetSpeed setSpeed; /**< \brief \see IfxStdIf_Pos_SetSpeed */
307 IfxStdIf_Pos_SetRefreshPeriod setRefreshPeriod; /**< \brief \see IfxStdIf_Pos_SetRefreshPeriod */
308 };
309
310 /** \brief Position interface configuration */
311 typedef struct
312 {
313 sint32 offset; /**< \brief Position sensor offset */
314 boolean reversed; /**< \brief If true, the sensor direction is reversed */
315 sint32 resolution; /**< \brief Sensor resolution. For encoder with 1024 pulse per revolution, the value should be 1024 */
316 uint16 periodPerRotation; /**< \brief Number of period per rotation. Is usually 1 for encoder */
317 IfxStdIf_Pos_ResolutionFactor resolutionFactor; /**< \brief Resolution multiplier for encoder interface, valid is 2, 4. */
318 float32 updatePeriod; /**< \brief period in seconds, at which the application calls IfxStdIf_Pos_update() */
319 float32 speedModeThreshold; /**< \brief Speed threshold used for the speed calculation mode. For encoder, above the threshold the pulse count mode is used, below the threshold, the time delta is used */
320 float32 minSpeed; /**< \brief Absolute minimal allowed speed. below speed is recognized as 0rad/s */
321 float32 maxSpeed; /**< \brief Absolute maximal allowed speed. Above speed is recognized as error */
322 boolean speedFilterEnabled; /**< \brief Enable / disable the speed low pass filter */
323 float32 speedFilerCutOffFrequency; /**< \brief Speed low pass filter cut off frequency */
324 } IfxStdIf_Pos_Config;
325
326 /** \addtogroup library_srvsw_stdif_posif
327 * \{
328 */
329
330 /** \copydoc IfxStdIf_Pos_OnZeroIrq
331 */
332 IFX_INLINE void IfxStdIf_Pos_onZeroIrq(IfxStdIf_Pos *stdIf)
333 {
334 stdIf->onZeroIrq(stdIf->driver);
335 }
336
337
338 /** \copydoc IfxStdIf_Pos_GetAbsolutePosition
339 * \param stdIf Standard interface pointer
340 */
341 IFX_INLINE float32 IfxStdIf_Pos_getAbsolutePosition(IfxStdIf_Pos *stdIf)
342 {
343 return stdIf->getAbsolutePosition(stdIf->driver);
344 }
345
346
347 /** \copydoc IfxStdIf_Pos_GetFault MCMETILLD-521
348 * \param stdIf Standard interface pointer
349 */
350 IFX_INLINE IfxStdIf_Pos_Status IfxStdIf_Pos_getFault(IfxStdIf_Pos *stdIf)
351 {
352 return stdIf->getFault(stdIf->driver);
353 }
354
355
356 /** \copydoc IfxStdIf_Pos_GetOffset
357 * \param stdIf Standard interface pointer
358 */
359 IFX_INLINE sint32 IfxStdIf_Pos_getOffset(IfxStdIf_Pos *stdIf)
360 {
361 return stdIf->getOffset(stdIf->driver);
362 }
363
364
365 /** \copydoc IfxStdIf_Pos_GetPosition
366 * \param stdIf Standard interface pointer
367 */
368 IFX_INLINE float32 IfxStdIf_Pos_getPosition(IfxStdIf_Pos *stdIf)
369 {
370 return stdIf->getPosition(stdIf->driver);
371 }
372
373
374 /** \copydoc IfxStdIf_Pos_GetDirection
375 * \param stdIf Standard interface pointer
376 */
377 IFX_INLINE IfxStdIf_Pos_Dir IfxStdIf_Pos_getDirection(IfxStdIf_Pos *stdIf)
378 {
379 return stdIf->getDirection(stdIf->driver);
380 }
381
382
383 /** \copydoc IfxStdIf_Pos_GetPeriodPerRotation
384 * \param stdIf Standard interface pointer
385 */
386 IFX_INLINE uint16 IfxStdIf_Pos_getPeriodPerRotation(IfxStdIf_Pos *stdIf)
387 {
388 return stdIf->getPeriodPerRotation(stdIf->driver);
389 }
390
391
392 /** \copydoc IfxStdIf_Pos_GetRawPosition
393 * \param stdIf Standard interface pointer
394 */
395 IFX_INLINE sint32 IfxStdIf_Pos_getRawPosition(IfxStdIf_Pos *stdIf)
396 {
397 return stdIf->getRawPosition(stdIf->driver);
398 }
399
400
401 /** \copydoc IfxStdIf_Pos_GetRefreshPeriod
402 * \param stdIf Standard interface pointer
403 */
404 IFX_INLINE float32 IfxStdIf_Pos_getRefreshPeriod(IfxStdIf_Pos *stdIf)
405 {
406 return stdIf->getRefreshPeriod(stdIf->driver);
407 }
408
409
410 /** \copydoc IfxStdIf_Pos_GetResolution
411 * \param stdIf Standard interface pointer
412 */
413 IFX_INLINE sint32 IfxStdIf_Pos_getResolution(IfxStdIf_Pos *stdIf)
414 {
415 return stdIf->getResolution(stdIf->driver);
416 }
417
418
419 /** \copydoc IfxStdIf_Pos_GetTurn
420 * \param stdIf Standard interface pointer
421 */
422 IFX_INLINE sint32 IfxStdIf_Pos_getTurn(IfxStdIf_Pos *stdIf)
423 {
424 return stdIf->getTurn(stdIf->driver);
425 }
426
427
428 /** \copydoc IfxStdIf_Pos_GetSensorType
429 * \param stdIf Standard interface pointer
430 */
431 IFX_INLINE IfxStdIf_Pos_SensorType IfxStdIf_Pos_getSensorType(IfxStdIf_Pos *stdIf)
432 {
433 return stdIf->getSensorType(stdIf->driver);
434 }
435
436
437 /** \copydoc IfxStdIf_Pos_GetSpeed
438 * \param stdIf Standard interface pointer
439 */
440 IFX_INLINE float32 IfxStdIf_Pos_getSpeed(IfxStdIf_Pos *stdIf)
441 {
442 return stdIf->getSpeed(stdIf->driver);
443 }
444
445
446 /** Check whether the sensor is faulty
447 * \param stdIf Standard interface pointer
448 */
449 IFX_INLINE boolean IfxStdIf_Pos_isFault(IfxStdIf_Pos *stdIf)
450 {
451 return IfxStdIf_Pos_getFault(stdIf).status != 0;
452 }
453
454
455 /** \copydoc IfxStdIf_Pos_OnEventA
456 * \param stdIf Standard interface pointer
457 */
458 IFX_INLINE void IfxStdIf_Pos_onEventA(IfxStdIf_Pos *stdIf)
459 {
460 stdIf->onEventA(stdIf->driver);
461 }
462
463
464 /** \copydoc IfxStdIf_Pos_Update
465 * \param stdIf Standard interface pointer
466 */
467 IFX_INLINE void IfxStdIf_Pos_update(IfxStdIf_Pos *stdIf)
468 {
469 stdIf->update(stdIf->driver);
470 }
471
472
473 /** \copydoc IfxStdIf_Pos_Reset
474 * \param stdIf Standard interface pointer
475 */
476 IFX_INLINE void IfxStdIf_Pos_reset(IfxStdIf_Pos *stdIf)
477 {
478 stdIf->reset(stdIf->driver);
479 }
480
481
482 /** \copydoc IfxStdIf_Pos_ResetFaults
483 * \param stdIf Standard interface pointer
484 */
485 IFX_INLINE void IfxStdIf_Pos_resetFaults(IfxStdIf_Pos *stdIf)
486 {
487 stdIf->resetFaults(stdIf->driver);
488 }
489
490
491 /** \copydoc IfxStdIf_Pos_SetOffset
492 * \param stdIf Standard interface pointer
493 */
494 IFX_INLINE void IfxStdIf_Pos_setOffset(IfxStdIf_Pos *stdIf, sint32 offset)
495 {
496 stdIf->setOffset(stdIf->driver, offset);
497 }
498
499
500 /** \copydoc IfxStdIf_Pos_SetPosition
501 * \param stdIf Standard interface pointer
502 */
503 IFX_INLINE void IfxStdIf_Pos_setPosition(IfxStdIf_Pos *stdIf, float32 position)
504 {
505 stdIf->setPosition(stdIf->driver, position);
506 }
507
508
509 /** \copydoc IfxStdIf_Pos_SetRawPosition
510 * \param stdIf Standard interface pointer
511 */
512 IFX_INLINE void IfxStdIf_Pos_setRawPosition(IfxStdIf_Pos *stdIf, sint32 position)
513 {
514 stdIf->setRawPosition(stdIf->driver, position);
515 }
516
517
518 /** \copydoc IfxStdIf_Pos_SetSpeed
519 * \param stdIf Standard interface pointer
520 */
521 IFX_INLINE void IfxStdIf_Pos_setSpeed(IfxStdIf_Pos *stdIf, float32 speed)
522 {
523 stdIf->setSpeed(stdIf->driver, speed);
524 }
525
526
527 /** \copydoc IfxStdIf_Pos_SetRefreshPeriod
528 * \param stdIf Standard interface pointer
529 */
530 IFX_INLINE void IfxStdIf_Pos_setRefreshPeriod(IfxStdIf_Pos *stdIf, float32 updatePeriod)
531 {
532 stdIf->setRefreshPeriod(stdIf->driver, updatePeriod);
533 }
534
535
536 /** \} */
537
538 /** \brief Converts from rad/s to rpm
539 *
540 * \param speed Specifies the speed in rad/s.
541 *
542 * \return returns the converted speed in rpm.
543 * \see IfxStdIf_Pos_rpmToRads()
544 */
545 IFX_INLINE float32 IfxStdIf_Pos_radsToRpm(float32 speed)
546 {
547 return (60.0 / (2.0 * IFX_PI)) * speed;
548 }
549
550
551 /** \brief Converts from rpm to rad/s
552 *
553 * \param speed Specifies the speed in rpm.
554 *
555 * \return returns the converted speed in rad/s.
556 * \see IfxStdIf_Pos_radsToRpm()
557 */
558 IFX_INLINE float32 IfxStdIf_Pos_rpmToRads(float32 speed)
559 {
560 return speed * ((2.0 * IFX_PI) / 60.0);
561 }
562
563
564 /** Initialize the configuration structure to default
565 *
566 * \param config Position interface configuration. This parameter is initialized by the function
567 *
568 */
569 IFX_EXTERN void IfxStdIf_Pos_initConfig(IfxStdIf_Pos_Config *config);
570
571 /** \brief Print the device status
572 *
573 * \param driver driver handle
574 * \param io Interface to which the status is output
575 * \return none
576 */
577 IFX_EXTERN void IfxStdIf_Pos_printStatus(IfxStdIf_Pos *driver, IfxStdIf_DPipe *io);
578
579
580 #endif /* IFXSTDIF_POSIF_H */
IfxStdIf_Pos_Config::speedModeThreshold
float32 speedModeThreshold
Speed threshold used for the speed calculation mode. For encoder, above the threshold the pulse count...
Definition: IfxStdIf_Pos.h:319
IfxStdIf_Pos_getPosition
IFX_INLINE float32 IfxStdIf_Pos_getPosition(IfxStdIf_Pos *stdIf)
Return the position.
Definition: IfxStdIf_Pos.h:368
IfxStdIf_Pos_Config::resolution
sint32 resolution
Sensor resolution. For encoder with 1024 pulse per revolution, the value should be 1024...
Definition: IfxStdIf_Pos.h:315
IfxStdIf_Pos_resetFaults
IFX_INLINE void IfxStdIf_Pos_resetFaults(IfxStdIf_Pos *stdIf)
Reset the driver fault.
Definition: IfxStdIf_Pos.h:485
IfxStdIf_Pos_GetRefreshPeriod
float32(* IfxStdIf_Pos_GetRefreshPeriod)(IfxStdIf_InterfaceDriver stdIf)
Get the update period.
Definition: IfxStdIf_Pos.h:187
IfxStdIf_Pos_::setRefreshPeriod
IfxStdIf_Pos_SetRefreshPeriod setRefreshPeriod
Definition: IfxStdIf_Pos.h:307
IfxStdIf_InterfaceDriver
void * IfxStdIf_InterfaceDriver
Pointer to the specific interface driver.
Definition: IfxStdIf.h:115
IfxStdIf_Pos_setSpeed
IFX_INLINE void IfxStdIf_Pos_setSpeed(IfxStdIf_Pos *stdIf, float32 speed)
Set the sensor speed (virtual sensor)
Definition: IfxStdIf_Pos.h:521
IfxStdIf_Pos_getPeriodPerRotation
IFX_INLINE uint16 IfxStdIf_Pos_getPeriodPerRotation(IfxStdIf_Pos *stdIf)
Return the period per rotation setting.
Definition: IfxStdIf_Pos.h:386
IfxStdIf_Pos_GetOffset
sint32(* IfxStdIf_Pos_GetOffset)(IfxStdIf_InterfaceDriver stdIf)
Return the raw position sensor offset.
Definition: IfxStdIf_Pos.h:139
IfxStdIf_DPipe_
Standard interface object.
Definition: IfxStdIf_DPipe.h:230
IfxStdIf_Pos_SetRawPosition
void(* IfxStdIf_Pos_SetRawPosition)(IfxStdIf_InterfaceDriver stdIf, sint32 position)
Set the sensor position (virtual sensor)
Definition: IfxStdIf_Pos.h:265
IfxStdIf_Pos_SensorType_angletrk
Definition: IfxStdIf_Pos.h:86
IfxStdIf_Pos_SensorType_hall
Definition: IfxStdIf_Pos.h:84
IfxStdIf_Pos_::setOffset
IfxStdIf_Pos_SetOffset setOffset
Definition: IfxStdIf_Pos.h:303
IfxStdIf_Pos_::setPosition
IfxStdIf_Pos_SetPosition setPosition
Definition: IfxStdIf_Pos.h:304
IfxStdIf_Pos_GetSpeed
float32(* IfxStdIf_Pos_GetSpeed)(IfxStdIf_InterfaceDriver stdIf)
Return the speed.
Definition: IfxStdIf_Pos.h:205
IfxStdIf_Pos_::driver
IfxStdIf_InterfaceDriver driver
Interface driver object.
Definition: IfxStdIf_Pos.h:285
IfxStdIf_Pos_Dir_unknown
Unknown direction.
Definition: IfxStdIf_Pos.h:96
IfxStdIf_Pos_setRawPosition
IFX_INLINE void IfxStdIf_Pos_setRawPosition(IfxStdIf_Pos *stdIf, sint32 position)
Set the sensor position (virtual sensor)
Definition: IfxStdIf_Pos.h:512
IfxStdIf.h
Standard interface types.
IfxStdIf_Pos_update
IFX_INLINE void IfxStdIf_Pos_update(IfxStdIf_Pos *stdIf)
Refresh the status.
Definition: IfxStdIf_Pos.h:467
IfxStdIf_Pos_getSpeed
IFX_INLINE float32 IfxStdIf_Pos_getSpeed(IfxStdIf_Pos *stdIf)
Return the speed.
Definition: IfxStdIf_Pos.h:440
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxStdIf_Pos_Config::minSpeed
float32 minSpeed
Absolute minimal allowed speed. below speed is recognized as 0rad/s.
Definition: IfxStdIf_Pos.h:320
IfxStdIf_Pos_reset
IFX_INLINE void IfxStdIf_Pos_reset(IfxStdIf_Pos *stdIf)
Reset the driver.
Definition: IfxStdIf_Pos.h:476
float32
float float32
Definition: Platform_Types.h:170
IfxStdIf_Pos_::getRawPosition
IfxStdIf_Pos_GetRawPosition getRawPosition
Definition: IfxStdIf_Pos.h:292
IfxStdIf_Pos_Config::resolutionFactor
IfxStdIf_Pos_ResolutionFactor resolutionFactor
Resolution multiplier for encoder interface, valid is 2, 4.
Definition: IfxStdIf_Pos.h:317
IfxStdIf_Pos_::getPeriodPerRotation
IfxStdIf_Pos_GetPeriodPerRotation getPeriodPerRotation
Definition: IfxStdIf_Pos.h:293
IfxStdIf_Pos_getFault
IFX_INLINE IfxStdIf_Pos_Status IfxStdIf_Pos_getFault(IfxStdIf_Pos *stdIf)
Return the sensor status. MCMETILLD-521
Definition: IfxStdIf_Pos.h:350
IfxStdIf_Pos_Status::status
uint32 status
Global status access.
Definition: IfxStdIf_Pos.h:102
IfxStdIf_Pos_RawAngle
sint32 IfxStdIf_Pos_RawAngle
Definition: IfxStdIf_Pos.h:113
IfxStdIf_Pos_::getSensorType
IfxStdIf_Pos_GetSensorType getSensorType
Definition: IfxStdIf_Pos.h:296
IfxStdIf_Pos_getOffset
IFX_INLINE sint32 IfxStdIf_Pos_getOffset(IfxStdIf_Pos *stdIf)
Return the raw position sensor offset.
Definition: IfxStdIf_Pos.h:359
IfxStdIf_Pos_::getDirection
IfxStdIf_Pos_GetDirection getDirection
Definition: IfxStdIf_Pos.h:290
IfxStdIf_Pos_OnZeroIrq
void(* IfxStdIf_Pos_OnZeroIrq)(IfxStdIf_InterfaceDriver stdIf)
Handles the zero interrupt.
Definition: IfxStdIf_Pos.h:132
IfxStdIf_Pos_ResolutionFactor_twoFold
2-fold resolution. Valid for encoder
Definition: IfxStdIf_Pos.h:76
IfxStdIf_Pos_setRefreshPeriod
IFX_INLINE void IfxStdIf_Pos_setRefreshPeriod(IfxStdIf_Pos *stdIf, float32 updatePeriod)
Set the update period.
Definition: IfxStdIf_Pos.h:530
IfxStdIf_Pos_Config::maxSpeed
float32 maxSpeed
Absolute maximal allowed speed. Above speed is recognized as error.
Definition: IfxStdIf_Pos.h:321
IfxStdIf_Pos_::setRawPosition
IfxStdIf_Pos_SetRawPosition setRawPosition
Definition: IfxStdIf_Pos.h:305
IfxStdIf_Pos_::getRefreshPeriod
IfxStdIf_Pos_GetRefreshPeriod getRefreshPeriod
Definition: IfxStdIf_Pos.h:294
IfxStdIf_Pos_::getPosition
IfxStdIf_Pos_GetPosition getPosition
Definition: IfxStdIf_Pos.h:289
IfxStdIf_Pos_onEventA
IFX_INLINE void IfxStdIf_Pos_onEventA(IfxStdIf_Pos *stdIf)
Handles the A sensor event Event A is a sensor defined event. it is optional.
Definition: IfxStdIf_Pos.h:458
IFX_PI
#define IFX_PI
Definition: Ifx_Types.h:217
IfxStdIf_Pos_SensorType_igmr
Definition: IfxStdIf_Pos.h:87
IfxStdIf_Pos_::getFault
IfxStdIf_Pos_GetFault getFault
Definition: IfxStdIf_Pos.h:291
IfxStdIf_Pos_Config::reversed
boolean reversed
If true, the sensor direction is reversed.
Definition: IfxStdIf_Pos.h:314
IfxStdIf_Pos_GetSensorType
IfxStdIf_Pos_SensorType(* IfxStdIf_Pos_GetSensorType)(IfxStdIf_InterfaceDriver stdIf)
Get the sensor type.
Definition: IfxStdIf_Pos.h:199
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxStdIf_Pos_SetPosition
void(* IfxStdIf_Pos_SetPosition)(IfxStdIf_InterfaceDriver stdIf, float32 position)
Set the sensor position (virtual sensor)
Definition: IfxStdIf_Pos.h:259
IfxStdIf_Pos_GetRawPosition
sint32(* IfxStdIf_Pos_GetRawPosition)(IfxStdIf_InterfaceDriver stdIf)
Return the raw position in ticks.
Definition: IfxStdIf_Pos.h:181
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxStdIf_Pos_GetDirection
IfxStdIf_Pos_Dir(* IfxStdIf_Pos_GetDirection)(IfxStdIf_InterfaceDriver stdIf)
Return the direction.
Definition: IfxStdIf_Pos.h:158
IfxStdIf_Pos_Config::updatePeriod
float32 updatePeriod
period in seconds, at which the application calls IfxStdIf_Pos_update()
Definition: IfxStdIf_Pos.h:318
IfxStdIf_Pos_initConfig
IFX_EXTERN void IfxStdIf_Pos_initConfig(IfxStdIf_Pos_Config *config)
Definition: IfxStdIf_Pos.c:45
IfxStdIf_Pos_SensorType_encoder
Definition: IfxStdIf_Pos.h:83
IfxStdIf_Pos_SetRefreshPeriod
void(* IfxStdIf_Pos_SetRefreshPeriod)(IfxStdIf_InterfaceDriver stdIf, float32 updatePeriod)
Set the update period.
Definition: IfxStdIf_Pos.h:279
IfxStdIf_Pos_MotionType_linear
Linear sensor.
Definition: IfxStdIf_Pos.h:69
IfxStdIf_Pos_MotionType_rotating
Rotating sensor.
Definition: IfxStdIf_Pos.h:68
IfxStdIf_Pos_Dir
IfxStdIf_Pos_Dir
Position sensor direction definition.
Definition: IfxStdIf_Pos.h:92
IfxStdIf_Pos_OnEventA
void(* IfxStdIf_Pos_OnEventA)(IfxStdIf_InterfaceDriver stdIf)
Handles the A sensor event Event A is a sensor defined event. it is optional.
Definition: IfxStdIf_Pos.h:218
IfxStdIf_Pos_getResolution
IFX_INLINE sint32 IfxStdIf_Pos_getResolution(IfxStdIf_Pos *stdIf)
Get the resolution.
Definition: IfxStdIf_Pos.h:413
IfxStdIf_Pos_GetPeriodPerRotation
uint16(* IfxStdIf_Pos_GetPeriodPerRotation)(IfxStdIf_InterfaceDriver stdIf)
Return the period per rotation setting.
Definition: IfxStdIf_Pos.h:172
IfxStdIf_Pos_Dir_backward
Backward direction. For rotating position sensor, fackward is counter-clockwise rotation.
Definition: IfxStdIf_Pos.h:95
IfxStdIf_Pos_::getResolution
IfxStdIf_Pos_GetResolution getResolution
Definition: IfxStdIf_Pos.h:295
IfxStdIf_Pos_getRefreshPeriod
IFX_INLINE float32 IfxStdIf_Pos_getRefreshPeriod(IfxStdIf_Pos *stdIf)
Get the update period.
Definition: IfxStdIf_Pos.h:404
IfxStdIf_Pos_Config
Position interface configuration.
Definition: IfxStdIf_Pos.h:311
IfxStdIf_Pos_
Standard interface object.
Definition: IfxStdIf_Pos.h:283
IfxStdIf_Pos_Dir_forward
Forward direction. For rotating position sensor, forward is clockwise rotation.
Definition: IfxStdIf_Pos.h:94
IfxStdIf_Pos_SensorType
IfxStdIf_Pos_SensorType
Position sensor Types.
Definition: IfxStdIf_Pos.h:81
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxStdIf_Pos_SensorType_virtual
Definition: IfxStdIf_Pos.h:88
IfxStdIf_DPipe.h
Standard interface: Data Pipe.
IfxStdIf_Pos_GetFault
IfxStdIf_Pos_Status(* IfxStdIf_Pos_GetFault)(IfxStdIf_InterfaceDriver stdIf)
Return the sensor status.
Definition: IfxStdIf_Pos.h:165
IfxStdIf_Pos_SetSpeed
void(* IfxStdIf_Pos_SetSpeed)(IfxStdIf_InterfaceDriver stdIf, float32 speed)
Set the sensor speed (virtual sensor)
Definition: IfxStdIf_Pos.h:272
IfxStdIf_Pos_::getSpeed
IfxStdIf_Pos_GetSpeed getSpeed
Definition: IfxStdIf_Pos.h:301
IfxStdIf_Pos_SetOffset
void(* IfxStdIf_Pos_SetOffset)(IfxStdIf_InterfaceDriver stdIf, sint32 offset)
Set the sensor offset.
Definition: IfxStdIf_Pos.h:252
IfxStdIf_Pos_rpmToRads
IFX_INLINE float32 IfxStdIf_Pos_rpmToRads(float32 speed)
Converts from rpm to rad/s.
Definition: IfxStdIf_Pos.h:558
IfxStdIf_Pos_Reset
void(* IfxStdIf_Pos_Reset)(IfxStdIf_InterfaceDriver stdIf)
Reset the driver.
Definition: IfxStdIf_Pos.h:236
IfxStdIf_Pos_Config::offset
sint32 offset
Position sensor offset.
Definition: IfxStdIf_Pos.h:313
IfxStdIf_Pos_printStatus
IFX_EXTERN void IfxStdIf_Pos_printStatus(IfxStdIf_Pos *driver, IfxStdIf_DPipe *io)
Print the device status.
Definition: IfxStdIf_Pos.c:61
IfxStdIf_Pos_getTurn
IFX_INLINE sint32 IfxStdIf_Pos_getTurn(IfxStdIf_Pos *stdIf)
Return position in turn.
Definition: IfxStdIf_Pos.h:422
IfxStdIf_Pos_::getOffset
IfxStdIf_Pos_GetOffset getOffset
Definition: IfxStdIf_Pos.h:288
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxStdIf_Pos_::getAbsolutePosition
IfxStdIf_Pos_GetAbsolutePosition getAbsolutePosition
Return the absolute position.
Definition: IfxStdIf_Pos.h:287
IfxStdIf_Pos_ResolutionFactor
IfxStdIf_Pos_ResolutionFactor
Output event enable / disable.
Definition: IfxStdIf_Pos.h:73
IfxStdIf_Pos_::update
IfxStdIf_Pos_Update update
Definition: IfxStdIf_Pos.h:302
IfxStdIf_Pos_GetTurn
sint32(* IfxStdIf_Pos_GetTurn)(IfxStdIf_InterfaceDriver stdIf)
Return position in turn.
Definition: IfxStdIf_Pos.h:211
sint32
long sint32
Definition: Platform_Types.h:134
IfxStdIf_Pos_GetAbsolutePosition
float32(* IfxStdIf_Pos_GetAbsolutePosition)(IfxStdIf_InterfaceDriver stdIf)
Return the position, inclusive turns.
Definition: IfxStdIf_Pos.h:126
IfxStdIf_Pos_radsToRpm
IFX_INLINE float32 IfxStdIf_Pos_radsToRpm(float32 speed)
Converts from rad/s to rpm.
Definition: IfxStdIf_Pos.h:545
IfxStdIf_Pos_isFault
IFX_INLINE boolean IfxStdIf_Pos_isFault(IfxStdIf_Pos *stdIf)
Definition: IfxStdIf_Pos.h:449
IfxStdIf_Pos_getSensorType
IFX_INLINE IfxStdIf_Pos_SensorType IfxStdIf_Pos_getSensorType(IfxStdIf_Pos *stdIf)
Get the sensor type.
Definition: IfxStdIf_Pos.h:431
IfxStdIf_Pos_::resetFaults
IfxStdIf_Pos_ResetFaults resetFaults
Definition: IfxStdIf_Pos.h:300
IfxStdIf_Pos_Update
void(* IfxStdIf_Pos_Update)(IfxStdIf_InterfaceDriver stdIf)
Refresh the status.
Definition: IfxStdIf_Pos.h:227
IfxStdIf_Pos_setOffset
IFX_INLINE void IfxStdIf_Pos_setOffset(IfxStdIf_Pos *stdIf, sint32 offset)
Set the sensor offset.
Definition: IfxStdIf_Pos.h:494
IfxStdIf_Pos_Config::speedFilerCutOffFrequency
float32 speedFilerCutOffFrequency
Speed low pass filter cut off frequency.
Definition: IfxStdIf_Pos.h:323
IfxStdIf_Pos_::onZeroIrq
IfxStdIf_Pos_OnZeroIrq onZeroIrq
Definition: IfxStdIf_Pos.h:286
IfxStdIf_Pos_ResolutionFactor_oneFold
Default, no multipluication factor.
Definition: IfxStdIf_Pos.h:75
IfxStdIf_Pos_::onEventA
IfxStdIf_Pos_OnEventA onEventA
Definition: IfxStdIf_Pos.h:298
IfxStdIf_Pos_SensorType_resolver
Definition: IfxStdIf_Pos.h:85
IfxStdIf_Pos_ResolutionFactor_fourFold
4-fold resolution. Valid for encoder
Definition: IfxStdIf_Pos.h:77
IfxStdIf_Pos_getDirection
IFX_INLINE IfxStdIf_Pos_Dir IfxStdIf_Pos_getDirection(IfxStdIf_Pos *stdIf)
Return the direction.
Definition: IfxStdIf_Pos.h:377
IfxStdIf_Pos_Status
Position sensor status definition.
Definition: IfxStdIf_Pos.h:100
IfxStdIf_Pos_::getTurn
IfxStdIf_Pos_GetTurn getTurn
Definition: IfxStdIf_Pos.h:297
IfxStdIf_Pos_getAbsolutePosition
IFX_INLINE float32 IfxStdIf_Pos_getAbsolutePosition(IfxStdIf_Pos *stdIf)
Return the position, inclusive turns.
Definition: IfxStdIf_Pos.h:341
IfxStdIf_Pos_::reset
IfxStdIf_Pos_Reset reset
Definition: IfxStdIf_Pos.h:299
IfxStdIf_Pos_onZeroIrq
IFX_INLINE void IfxStdIf_Pos_onZeroIrq(IfxStdIf_Pos *stdIf)
Handles the zero interrupt.
Definition: IfxStdIf_Pos.h:332
IfxStdIf_Pos_getRawPosition
IFX_INLINE sint32 IfxStdIf_Pos_getRawPosition(IfxStdIf_Pos *stdIf)
Return the raw position in ticks.
Definition: IfxStdIf_Pos.h:395
IfxStdIf_Pos_MotionType
IfxStdIf_Pos_MotionType
Output event enable / disable.
Definition: IfxStdIf_Pos.h:66
IfxStdIf_Pos_GetPosition
float32(* IfxStdIf_Pos_GetPosition)(IfxStdIf_InterfaceDriver stdIf)
Return the position.
Definition: IfxStdIf_Pos.h:149
IfxStdIf_Pos_GetResolution
sint32(* IfxStdIf_Pos_GetResolution)(IfxStdIf_InterfaceDriver stdIf)
Get the resolution.
Definition: IfxStdIf_Pos.h:193
IfxStdIf_Pos_ResetFaults
void(* IfxStdIf_Pos_ResetFaults)(IfxStdIf_InterfaceDriver stdIf)
Reset the driver fault.
Definition: IfxStdIf_Pos.h:245
IfxStdIf_Pos_::setSpeed
IfxStdIf_Pos_SetSpeed setSpeed
Definition: IfxStdIf_Pos.h:306
IfxStdIf_Pos_Config::speedFilterEnabled
boolean speedFilterEnabled
Enable / disable the speed low pass filter.
Definition: IfxStdIf_Pos.h:322
IfxStdIf_Pos_Config::periodPerRotation
uint16 periodPerRotation
Number of period per rotation. Is usually 1 for encoder.
Definition: IfxStdIf_Pos.h:316
IfxStdIf_Pos_setPosition
IFX_INLINE void IfxStdIf_Pos_setPosition(IfxStdIf_Pos *stdIf, float32 position)
Set the sensor position (virtual sensor)
Definition: IfxStdIf_Pos.h:503


iLLD_TC38A: IfxStdIf_PwmHl.c Source File

  • Service
  • CpuGeneric
  • StdIf
IfxStdIf_PwmHl.c
Go to the documentation of this file.
1 /**
2 * \file IfxStdIf_PwmHl.c
3 * \brief Standard interface: Multi-channels, dual-complementary PWM interface
4 * \ingroup IfxStdIf
5 *
6 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7 *
8 * $Date: 2014-02-27 20:08:24 GMT$
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "IfxStdIf_PwmHl.h"
44
45 void IfxStdIf_PwmHl_initConfig(IfxStdIf_PwmHl_Config *config)
46 {
47 config->deadtime = 0;
48 config->minPulse = 0;
49 config->channelCount = 0;
50 config->emergencyEnabled = FALSE;
51 config->outputMode = IfxPort_OutputMode_pushPull;
52 config->outputDriver = IfxPort_PadDriver_cmosAutomotiveSpeed1;
53 config->ccxActiveState = Ifx_ActiveState_high;
54 config->coutxActiveState = Ifx_ActiveState_high;
55 }
Ifx_ActiveState_high
The signal is high active.
Definition: Ifx_Types.h:116
IfxPort_OutputMode_pushPull
Definition: IfxPort.h:142
IfxStdIf_PwmHl_initConfig
void IfxStdIf_PwmHl_initConfig(IfxStdIf_PwmHl_Config *config)
Definition: IfxStdIf_PwmHl.c:45
IfxStdIf_PwmHl_Config::deadtime
float32 deadtime
Dead time between the top and bottom channels in seconds.
Definition: IfxStdIf_PwmHl.h:202
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxPort_PadDriver_cmosAutomotiveSpeed1
Speed grade 1.
Definition: IfxPort.h:153
IfxStdIf_PwmHl_Config::outputDriver
IfxPort_PadDriver outputDriver
Output pad driver of ccx and coutx pins.
Definition: IfxStdIf_PwmHl.h:208
IfxStdIf_PwmHl_Config::ccxActiveState
Ifx_ActiveState ccxActiveState
Top PWM active state.
Definition: IfxStdIf_PwmHl.h:211
IfxStdIf_PwmHl_Config
Multi-channels PWM object configuration.
Definition: IfxStdIf_PwmHl.h:200
IfxStdIf_PwmHl_Config::minPulse
float32 minPulse
Min pulse allowed as active state for the top and bottom PWM in seconds.
Definition: IfxStdIf_PwmHl.h:203
IfxStdIf_PwmHl_Config::outputMode
IfxPort_OutputMode outputMode
Output mode of ccx and coutx pins.
Definition: IfxStdIf_PwmHl.h:207
IfxStdIf_PwmHl.h
Standard interface: Multi-channels, dual-complementary PWM interface.
IfxStdIf_PwmHl_Config::emergencyEnabled
boolean emergencyEnabled
Specifies if the emergency stop should be enabled or not.
Definition: IfxStdIf_PwmHl.h:205
IfxStdIf_PwmHl_Config::channelCount
uint8 channelCount
Number of PWM channels, one channel is made of a top and bottom channel.
Definition: IfxStdIf_PwmHl.h:204
IfxStdIf_PwmHl_Config::coutxActiveState
Ifx_ActiveState coutxActiveState
Bottom PWM active state.
Definition: IfxStdIf_PwmHl.h:212


iLLD_TC38A: IfxStdIf_PwmHl.h Source File

  • Service
  • CpuGeneric
  • StdIf
IfxStdIf_PwmHl.h
Go to the documentation of this file.
1 /**
2 * \file IfxStdIf_PwmHl.h
3 * \brief Standard interface: Multi-channels, dual-complementary PWM interface
4 * \ingroup IfxStdIf
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 * \defgroup library_srvsw_stdif_pwmhl Standard interface: Multi-channels, dual-complementary PWM interface
43 * \ingroup library_srvsw_stdif
44 *
45 * The standard interface pwm high/low (PwmHl) abstract the hardware used for pwm feature. It provide, after proper initialization an hardware
46 * independant way to interact with the PWM functionallity like setting duty cycles, dead time,timer functionalities, ...
47 *
48 * The figure below shows the standard Multi-channels, dual-complementary PWM interface.
49 *
50 * \image html "PwmHl-overview.png" "Standard Multi-channels, dual-complementary PWM interface"
51 *
52 * This PWM interface provides multiple dual-complementary PWM channels.
53 * Each dual-complementary PWM channel is made of two PWM channels, a top channel CCx and a bottom channel COUTx.
54 * The interface implements the \ref library_srvsw_stdif_timer.
55 *
56 * This interface defines the following features:
57 * - Configurable duty cycle from 0% to 100%
58 * - Adjustable dead-time between top and bottom channels
59 * - Center aligned, left aligned, right aligned PWM
60 * - Optional minimal pulse cancellation
61 * - Optional emergency stop
62 * - Configurable signal active state for top and bottom PWM
63 * - Configurable output ports
64 * - Inherit the features from library_srvsw_stdif_timer
65 *
66 * Example of signal generation in center aligned mode:
67 *
68 * \image html "PwmHl-centerAligned.png" "Standard Multi-channels, dual-complementary PWM interface - Center aligned mode"
69 */
70
71 #ifndef IFXSTDIF_PWMHL_H
72 #define IFXSTDIF_PWMHL_H 1
73
74 #include "IfxStdIf.h"
75 #include "IfxStdIf_Timer.h"
76
77 /** \brief Forward declaration */
78 typedef struct IfxStdIf_PwmHl_ IfxStdIf_PwmHl;
79
80 /** \brief Set the dead time in s
81 * \param stdIf Pointer to the interface driver object
82 * \param deadtime deadtime in second
83 * \retval TRUE In case of success
84 * \retval FALSE In case of failure
85 */
86 typedef boolean (*IfxStdIf_PwmHl_SetDeadtime)(IfxStdIf_InterfaceDriver stdIf, float32 deadtime);
87
88 /** \brief Return the dead time in s
89 *
90 * It returns the last dead time values set by IfxStdIf_PwmHl_SetDeadtime() or during initialisation
91 * \param stdIf Pointer to the interface driver object
92 * \return Returns the deadtime in second
93 */
94 typedef float32 (*IfxStdIf_PwmHl_GetDeadtime)(IfxStdIf_InterfaceDriver stdIf);
95 /** \brief Return the dead time ticks in s
96 *
97 * It returns the last dead time tick values set by IfxStdIf_PwmHl_SetDeadtime() or during initialisation
98 * \param stdIf Pointer to the interface driver object
99 * \return Returns the deadtime in second
100 */
101
102 typedef float32 (*IfxStdIf_PwmHl_GetDeadtimeTick)(IfxStdIf_InterfaceDriver stdIf);
103 /** \brief Set the minimum pulse time in s
104 * \param stdIf Pointer to the interface driver object
105 * \param minPulse minimal pulse in second
106 * \retval TRUE In case of success
107 * \retval FALSE In case of failure
108 */
109 typedef boolean (*IfxStdIf_PwmHl_SetMinPulse)(IfxStdIf_InterfaceDriver stdIf, float32 minPulse);
110
111 /** \brief Return the minimum pulse time in s
112 *
113 * It returns the last minimum pulse time values set by IfxStdIf_PwmHl_SetMinPulse() or during initialisation
114 * \param stdIf Pointer to the interface driver object
115 * \return Returns the minimum pulse time in second
116 */
117 typedef float32 (*IfxStdIf_PwmHl_GetMinPulse)(IfxStdIf_InterfaceDriver stdIf);
118
119 /** \brief Return the PWM mode
120 *
121 * It returns the last pwm mode set by IfxStdIf_PwmHl_SetMode() or during initialisation
122 * \param stdIf Pointer to the interface driver object
123 * \return Returns the pwm mode
124 */
125 typedef Ifx_Pwm_Mode (*IfxStdIf_PwmHl_GetMode)(IfxStdIf_InterfaceDriver stdIf);
126
127 /** \brief Set the pwm mode
128 * \param stdIf Pointer to the interface driver object
129 * \param mode PWM mode
130 * \retval TRUE In case of success
131 * \retval FALSE In case of failure (feature not supported)
132 */
133 typedef boolean (*IfxStdIf_PwmHl_SetMode)(IfxStdIf_InterfaceDriver stdIf, Ifx_Pwm_Mode mode);
134
135 /** \brief Set the pwm ON time
136 * \param stdIf Pointer to the interface driver object
137 * \param tOn Pointer to an array of ON times in ticks. The array size must be equal to the number of PWM channels
138 * \return none
139 */
140 typedef void (*IfxStdIf_PwmHl_SetOnTime)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue *tOn);
141
142 /** \brief Set the pwm ON time and shift value
143 * \param stdIf Pointer to the interface driver object
144 * \param tOn Pointer to an array of ON times in ticks. The array size must be equal to the number of PWM channels
145 * \param shift Pointer to an array of shift values in ticks. The array size must be equal to the number of PWM channels
146 * \return none
147 */
148 typedef void (*IfxStdIf_PwmHl_SetOnTimeAndShift)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue *tOn, Ifx_TimerValue *shift);
149
150 /** \brief Set the pwm pulse of all switched independently
151 * \param stdIf Pointer to the interface driver object
152 * \param tOn Pointer to an array of ON times in s. The array size must be equal to the number of PWM channels times 2. Parameters order is Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
153 * \param offset Pointer to an array of offset values in s. The array size must be equal to the number of PWM channels times 2. Parameters order is Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
154 * \return none
155 */
156 typedef void (*IfxStdIf_PwmHl_SetPulse)(IfxStdIf_InterfaceDriver stdIf, float32 *tOn, float32 *offset);
157
158 /** \brief Set channels which are generating PWM or in "stuck-at" state.
159 *
160 * \param stdIf Pointer to the interface driver object
161 * \param activeCh Pointer to boolean array containing values for PWM channels.
162 * If FALSE, the channel will be in stuck-at state, else the channel will generate PWM.
163 *
164 * \param stuckSt Pointer to boolean array containing values for active channels.
165 * If FALSE, the stuck-at state is passive level, else the stuck-at state is active level.
166 *
167 * \note The values for the parameters are arranged as follows:
168 * index = 0 --> phase 0 top
169 * index = 1 --> phase 0 bottom
170 * index = 2 --> phase 1 top
171 * index = 3 --> phase 1 bottom
172 * index = 4 --> phase 2 top
173 * index = 5 --> phase 2 bottom
174 */
175 typedef void (*IfxStdIf_PwmHl_SetupChannels)(IfxStdIf_InterfaceDriver stdIf, boolean *activeCh, boolean *stuckSt);
176
177 /** \brief Standard interface object
178 */
179 struct IfxStdIf_PwmHl_
180 {
181 IfxStdIf_InterfaceDriver driver; /**< \brief Interface driver object */
182
183 /* PWM related APIs*/
184 IfxStdIf_PwmHl_SetDeadtime setDeadtime; /**< \brief IfxStdIf_PwmHl_SetDeadtime */
185 IfxStdIf_PwmHl_GetDeadtime getDeadtime; /**< \brief IfxStdIf_PwmHl_GetDeadtime */
186 IfxStdIf_PwmHl_GetDeadtimeTick getDeadtimeTick; /**< \breif IfxStdIf_PwmHl_GetDeadtimetick */
187 IfxStdIf_PwmHl_SetMinPulse setMinPulse; /**< \brief IfxStdIf_PwmHl_SetMinPulse */
188 IfxStdIf_PwmHl_GetMinPulse getMinPulse; /**< \brief IfxStdIf_PwmHl_GetMinPulse */
189 IfxStdIf_PwmHl_GetMode getMode; /**< \brief IfxStdIf_PwmHl_GetMode */
190 IfxStdIf_PwmHl_SetMode setMode; /**< \brief IfxStdIf_PwmHl_SetMode */
191 IfxStdIf_PwmHl_SetOnTime setOnTime; /**< \brief IfxStdIf_PwmHl_SetOnTime */
192 IfxStdIf_PwmHl_SetOnTimeAndShift setOnTimeAndShift; /**< \brief IfxStdIf_PwmHl_SetOnTime */
193 IfxStdIf_PwmHl_SetPulse setPulse; /**< \brief IfxStdIf_PwmHl_Pulse */
194 IfxStdIf_PwmHl_SetupChannels setupChannels; /**< \brief IfxStdIf_PwmHl_SetupChannels */
195
196 IfxStdIf_Timer timer; /**< \brief Timer related standard interface */
197 };
198
199 /** \brief Multi-channels PWM object configuration */
200 typedef struct
201 {
202 float32 deadtime; /**< \brief Dead time between the top and bottom channels in seconds */
203 float32 minPulse; /**< \brief Min pulse allowed as active state for the top and bottom PWM in seconds */
204 uint8 channelCount; /**< \brief Number of PWM channels, one channel is made of a top and bottom channel */
205 boolean emergencyEnabled; /**< \brief Specifies if the emergency stop should be enabled or not */
206
207 IfxPort_OutputMode outputMode; /**< \brief Output mode of ccx and coutx pins */
208 IfxPort_PadDriver outputDriver; /**< \brief Output pad driver of ccx and coutx pins */
209 Ifx_ActiveState ccxOutputEnabled;
210 Ifx_ActiveState coutxOutputEnabled;
211 Ifx_ActiveState ccxActiveState; /**< \brief Top PWM active state */
212 Ifx_ActiveState coutxActiveState; /**< \brief Bottom PWM active state */
213 } IfxStdIf_PwmHl_Config;
214
215 /** \addtogroup library_srvsw_stdif_pwmhl
216 * \{
217 */
218
219 /** \copydoc IfxStdIf_PwmHl_SetDeadtime
220 * \param stdIf Standard interface pointer
221 */
222 IFX_INLINE boolean IfxStdIf_PwmHl_setDeadtime(IfxStdIf_PwmHl *stdIf, float32 deadtime)
223 {
224 return stdIf->setDeadtime(stdIf->driver, deadtime);
225 }
226
227 /** \addtogroup library_srvsw_stdif_pwmhl
228 * \{
229 */
230
231 /** \copydoc IfxStdIf_PwmHl_SetDeadtime
232 * \param stdIf Standard interface pointer
233 */
234 IFX_INLINE float32 IfxStdIf_PwmHl_getDeadtimetick(IfxStdIf_PwmHl *stdIf)
235 {
236 return stdIf->getDeadtimeTick(stdIf->driver);
237 }
238
239 /** \copydoc IfxStdIf_PwmHl_GetDeadtime
240 * \param stdIf Standard interface pointer
241 */
242 IFX_INLINE float32 IfxStdIf_PwmHl_getDeadtime(IfxStdIf_PwmHl *stdIf)
243 {
244 return stdIf->getDeadtime(stdIf->driver);
245 }
246
247
248 /** \copydoc IfxStdIf_PwmHl_SetMinPulse
249 * \param stdIf Standard interface pointer
250 */
251 IFX_INLINE boolean IfxStdIf_PwmHl_setMinPulse(IfxStdIf_PwmHl *stdIf, float32 minPulse)
252 {
253 return stdIf->setMinPulse(stdIf->driver, minPulse);
254 }
255
256
257 /** \copydoc IfxStdIf_PwmHl_GetMinPulse
258 * \param stdIf Standard interface pointer
259 */
260 IFX_INLINE float32 IfxStdIf_PwmHl_getMinPulse(IfxStdIf_PwmHl *stdIf)
261 {
262 return stdIf->getMinPulse(stdIf->driver);
263 }
264
265
266 /** \copydoc IfxStdIf_PwmHl_GetMode
267 * \param stdIf Standard interface pointer
268 */
269 IFX_INLINE Ifx_Pwm_Mode IfxStdIf_PwmHl_getMode(IfxStdIf_PwmHl *stdIf)
270 {
271 return stdIf->getMode(stdIf->driver);
272 }
273
274
275 /** \copydoc IfxStdIf_PwmHl_SetMode
276 * \param stdIf Standard interface pointer
277 */
278 IFX_INLINE boolean IfxStdIf_PwmHl_setMode(IfxStdIf_PwmHl *stdIf, Ifx_Pwm_Mode mode)
279 {
280 return stdIf->setMode(stdIf->driver, mode);
281 }
282
283
284 /** \copydoc IfxStdIf_PwmHl_SetOnTime
285 * \param stdIf Standard interface pointer
286 */
287 IFX_INLINE void IfxStdIf_PwmHl_setOnTime(IfxStdIf_PwmHl *stdIf, Ifx_TimerValue *tOn)
288 {
289 stdIf->setOnTime(stdIf->driver, tOn);
290 }
291
292
293 /** \copydoc IfxStdIf_PwmHl_SetOnTimeAndShift
294 * \param stdIf Standard interface pointer
295 */
296 IFX_INLINE void IfxStdIf_PwmHl_setOnTimeAndShift(IfxStdIf_PwmHl *stdIf, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
297 {
298 stdIf->setOnTimeAndShift(stdIf->driver, tOn, shift);
299 }
300
301
302 /** \copydoc IfxStdIf_PwmHl_SetPulse
303 * \param stdIf Standard interface pointer
304 */
305 IFX_INLINE void IfxStdIf_PwmHl_setPulse(IfxStdIf_PwmHl *stdIf, float32 *tOn, float32 *offset)
306 {
307 stdIf->setPulse(stdIf->driver, tOn, offset);
308 }
309
310
311 /** \copydoc IfxStdIf_PwmHl_SetupChannels
312 */
313 IFX_INLINE void IfxStdIf_PwmHl_setupChannels(IfxStdIf_PwmHl *stdIf, boolean *activeCh, boolean *stuckSt)
314 {
315 IFX_UNUSED_PARAMETER(stdIf);
316 IFX_UNUSED_PARAMETER(activeCh);
317 IFX_UNUSED_PARAMETER(stuckSt);
318 }
319
320 /** \brief Return the timer standard interface used by the IfxStdIf_PwmHl standard interface
321 * \param stdIf Standard interface pointer
322 * \return Returns the pointer to the IfxStdIf_Timer object
323 */
324 IFX_INLINE IfxStdIf_Timer *IfxStdIf_PwmHl_getTimer(IfxStdIf_PwmHl *stdIf)
325 {
326 return &stdIf->timer;
327 }
328
329
330 /** \} */
331
332 /** Initialize the configuration structure to default
333 *
334 * \param config Timer configuration. This parameter is initialised by the function
335 *
336 */
337 IFX_EXTERN void IfxStdIf_PwmHl_initConfig(IfxStdIf_PwmHl_Config *config);
338
339 #endif /* IFXSTDIF_PWMHL_H */
IfxStdIf_PwmHl_::timer
IfxStdIf_Timer timer
Timer related standard interface.
Definition: IfxStdIf_PwmHl.h:196
Ifx_Pwm_Mode
Ifx_Pwm_Mode
Definition: Ifx_Types.h:175
IfxStdIf_PwmHl_GetDeadtimeTick
float32(* IfxStdIf_PwmHl_GetDeadtimeTick)(IfxStdIf_InterfaceDriver stdIf)
Return the dead time ticks in s.
Definition: IfxStdIf_PwmHl.h:102
IfxStdIf_PwmHl_::setupChannels
IfxStdIf_PwmHl_SetupChannels setupChannels
IfxStdIf_PwmHl_SetupChannels.
Definition: IfxStdIf_PwmHl.h:194
IfxStdIf_InterfaceDriver
void * IfxStdIf_InterfaceDriver
Pointer to the specific interface driver.
Definition: IfxStdIf.h:115
IfxStdIf_PwmHl_::getMinPulse
IfxStdIf_PwmHl_GetMinPulse getMinPulse
IfxStdIf_PwmHl_GetMinPulse.
Definition: IfxStdIf_PwmHl.h:188
IfxStdIf_PwmHl_::getDeadtime
IfxStdIf_PwmHl_GetDeadtime getDeadtime
IfxStdIf_PwmHl_GetDeadtime.
Definition: IfxStdIf_PwmHl.h:185
IfxStdIf_PwmHl_SetupChannels
void(* IfxStdIf_PwmHl_SetupChannels)(IfxStdIf_InterfaceDriver stdIf, boolean *activeCh, boolean *stuckSt)
Set channels which are generating PWM or in "stuck-at" state.
Definition: IfxStdIf_PwmHl.h:175
IfxStdIf.h
Standard interface types.
IfxStdIf_PwmHl_GetMode
Ifx_Pwm_Mode(* IfxStdIf_PwmHl_GetMode)(IfxStdIf_InterfaceDriver stdIf)
Return the PWM mode.
Definition: IfxStdIf_PwmHl.h:125
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:140
IfxStdIf_PwmHl_initConfig
IFX_EXTERN void IfxStdIf_PwmHl_initConfig(IfxStdIf_PwmHl_Config *config)
Definition: IfxStdIf_PwmHl.c:45
float32
float float32
Definition: Platform_Types.h:170
IfxStdIf_Timer_
Standard interface object.
Definition: IfxStdIf_Timer.h:237
IfxStdIf_PwmHl_setMinPulse
IFX_INLINE boolean IfxStdIf_PwmHl_setMinPulse(IfxStdIf_PwmHl *stdIf, float32 minPulse)
Set the minimum pulse time in s.
Definition: IfxStdIf_PwmHl.h:251
IfxStdIf_PwmHl_::setPulse
IfxStdIf_PwmHl_SetPulse setPulse
IfxStdIf_PwmHl_Pulse.
Definition: IfxStdIf_PwmHl.h:193
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:113
IfxStdIf_PwmHl_setupChannels
IFX_INLINE void IfxStdIf_PwmHl_setupChannels(IfxStdIf_PwmHl *stdIf, boolean *activeCh, boolean *stuckSt)
Set channels which are generating PWM or in "stuck-at" state.
Definition: IfxStdIf_PwmHl.h:313
IfxStdIf_PwmHl_Config::deadtime
float32 deadtime
Dead time between the top and bottom channels in seconds.
Definition: IfxStdIf_PwmHl.h:202
IfxStdIf_PwmHl_::driver
IfxStdIf_InterfaceDriver driver
Interface driver object.
Definition: IfxStdIf_PwmHl.h:181
IfxStdIf_PwmHl_setOnTime
IFX_INLINE void IfxStdIf_PwmHl_setOnTime(IfxStdIf_PwmHl *stdIf, Ifx_TimerValue *tOn)
Set the pwm ON time.
Definition: IfxStdIf_PwmHl.h:287
IfxStdIf_PwmHl_setPulse
IFX_INLINE void IfxStdIf_PwmHl_setPulse(IfxStdIf_PwmHl *stdIf, float32 *tOn, float32 *offset)
Set the pwm pulse of all switched independently.
Definition: IfxStdIf_PwmHl.h:305
IfxStdIf_PwmHl_SetPulse
void(* IfxStdIf_PwmHl_SetPulse)(IfxStdIf_InterfaceDriver stdIf, float32 *tOn, float32 *offset)
Set the pwm pulse of all switched independently.
Definition: IfxStdIf_PwmHl.h:156
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxStdIf_PwmHl_GetMinPulse
float32(* IfxStdIf_PwmHl_GetMinPulse)(IfxStdIf_InterfaceDriver stdIf)
Return the minimum pulse time in s.
Definition: IfxStdIf_PwmHl.h:117
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxStdIf_PwmHl_Config::outputDriver
IfxPort_PadDriver outputDriver
Output pad driver of ccx and coutx pins.
Definition: IfxStdIf_PwmHl.h:208
IfxStdIf_PwmHl_Config::ccxActiveState
Ifx_ActiveState ccxActiveState
Top PWM active state.
Definition: IfxStdIf_PwmHl.h:211
IfxStdIf_PwmHl_Config
Multi-channels PWM object configuration.
Definition: IfxStdIf_PwmHl.h:200
IfxStdIf_PwmHl_
Standard interface object.
Definition: IfxStdIf_PwmHl.h:179
IfxStdIf_PwmHl_setMode
IFX_INLINE boolean IfxStdIf_PwmHl_setMode(IfxStdIf_PwmHl *stdIf, Ifx_Pwm_Mode mode)
Set the pwm mode.
Definition: IfxStdIf_PwmHl.h:278
IfxStdIf_PwmHl_::setOnTime
IfxStdIf_PwmHl_SetOnTime setOnTime
IfxStdIf_PwmHl_SetOnTime.
Definition: IfxStdIf_PwmHl.h:191
IfxStdIf_PwmHl_getTimer
IFX_INLINE IfxStdIf_Timer * IfxStdIf_PwmHl_getTimer(IfxStdIf_PwmHl *stdIf)
Return the timer standard interface used by the IfxStdIf_PwmHl standard interface.
Definition: IfxStdIf_PwmHl.h:324
IfxStdIf_PwmHl_SetMinPulse
boolean(* IfxStdIf_PwmHl_SetMinPulse)(IfxStdIf_InterfaceDriver stdIf, float32 minPulse)
Set the minimum pulse time in s.
Definition: IfxStdIf_PwmHl.h:109
IfxStdIf_PwmHl_Config::minPulse
float32 minPulse
Min pulse allowed as active state for the top and bottom PWM in seconds.
Definition: IfxStdIf_PwmHl.h:203
IfxStdIf_PwmHl_setDeadtime
IFX_INLINE boolean IfxStdIf_PwmHl_setDeadtime(IfxStdIf_PwmHl *stdIf, float32 deadtime)
Set the dead time in s.
Definition: IfxStdIf_PwmHl.h:222
IfxStdIf_Timer.h
Standard interface: Timer.
IfxStdIf_PwmHl_::setMode
IfxStdIf_PwmHl_SetMode setMode
IfxStdIf_PwmHl_SetMode.
Definition: IfxStdIf_PwmHl.h:190
IfxStdIf_PwmHl_Config::outputMode
IfxPort_OutputMode outputMode
Output mode of ccx and coutx pins.
Definition: IfxStdIf_PwmHl.h:207
IfxStdIf_PwmHl_Config::ccxOutputEnabled
Ifx_ActiveState ccxOutputEnabled
Definition: IfxStdIf_PwmHl.h:209
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:151
boolean
unsigned char boolean
Definition: Platform_Types.h:104
IfxStdIf_PwmHl_SetDeadtime
boolean(* IfxStdIf_PwmHl_SetDeadtime)(IfxStdIf_InterfaceDriver stdIf, float32 deadtime)
Set the dead time in s.
Definition: IfxStdIf_PwmHl.h:86
IfxStdIf_PwmHl_getMode
IFX_INLINE Ifx_Pwm_Mode IfxStdIf_PwmHl_getMode(IfxStdIf_PwmHl *stdIf)
Return the PWM mode.
Definition: IfxStdIf_PwmHl.h:269
IfxStdIf_PwmHl_Config::emergencyEnabled
boolean emergencyEnabled
Specifies if the emergency stop should be enabled or not.
Definition: IfxStdIf_PwmHl.h:205
IfxStdIf_PwmHl_::getDeadtimeTick
IfxStdIf_PwmHl_GetDeadtimeTick getDeadtimeTick
Definition: IfxStdIf_PwmHl.h:186
IfxStdIf_PwmHl_Config::channelCount
uint8 channelCount
Number of PWM channels, one channel is made of a top and bottom channel.
Definition: IfxStdIf_PwmHl.h:204
IfxStdIf_PwmHl_getDeadtime
IFX_INLINE float32 IfxStdIf_PwmHl_getDeadtime(IfxStdIf_PwmHl *stdIf)
Return the dead time in s.
Definition: IfxStdIf_PwmHl.h:242
IfxStdIf_PwmHl_::setMinPulse
IfxStdIf_PwmHl_SetMinPulse setMinPulse
IfxStdIf_PwmHl_SetMinPulse.
Definition: IfxStdIf_PwmHl.h:187
IfxStdIf_PwmHl_::setOnTimeAndShift
IfxStdIf_PwmHl_SetOnTimeAndShift setOnTimeAndShift
IfxStdIf_PwmHl_SetOnTime.
Definition: IfxStdIf_PwmHl.h:192
IfxStdIf_PwmHl_SetOnTime
void(* IfxStdIf_PwmHl_SetOnTime)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue *tOn)
Set the pwm ON time.
Definition: IfxStdIf_PwmHl.h:140
IfxStdIf_PwmHl_::getMode
IfxStdIf_PwmHl_GetMode getMode
IfxStdIf_PwmHl_GetMode.
Definition: IfxStdIf_PwmHl.h:189
IfxStdIf_PwmHl_SetOnTimeAndShift
void(* IfxStdIf_PwmHl_SetOnTimeAndShift)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Set the pwm ON time and shift value.
Definition: IfxStdIf_PwmHl.h:148
IfxStdIf_PwmHl_GetDeadtime
float32(* IfxStdIf_PwmHl_GetDeadtime)(IfxStdIf_InterfaceDriver stdIf)
Return the dead time in s.
Definition: IfxStdIf_PwmHl.h:94
IfxStdIf_PwmHl_::setDeadtime
IfxStdIf_PwmHl_SetDeadtime setDeadtime
IfxStdIf_PwmHl_SetDeadtime.
Definition: IfxStdIf_PwmHl.h:184
IfxStdIf_PwmHl_Config::coutxOutputEnabled
Ifx_ActiveState coutxOutputEnabled
Definition: IfxStdIf_PwmHl.h:210
IfxStdIf_PwmHl_Config::coutxActiveState
Ifx_ActiveState coutxActiveState
Bottom PWM active state.
Definition: IfxStdIf_PwmHl.h:212
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxStdIf_PwmHl_setOnTimeAndShift
IFX_INLINE void IfxStdIf_PwmHl_setOnTimeAndShift(IfxStdIf_PwmHl *stdIf, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Set the pwm ON time and shift value.
Definition: IfxStdIf_PwmHl.h:296
IfxStdIf_PwmHl_SetMode
boolean(* IfxStdIf_PwmHl_SetMode)(IfxStdIf_InterfaceDriver stdIf, Ifx_Pwm_Mode mode)
Set the pwm mode.
Definition: IfxStdIf_PwmHl.h:133
IfxStdIf_PwmHl_getDeadtimetick
IFX_INLINE float32 IfxStdIf_PwmHl_getDeadtimetick(IfxStdIf_PwmHl *stdIf)
Set the dead time in s.
Definition: IfxStdIf_PwmHl.h:234
IfxStdIf_PwmHl_getMinPulse
IFX_INLINE float32 IfxStdIf_PwmHl_getMinPulse(IfxStdIf_PwmHl *stdIf)
Return the minimum pulse time in s.
Definition: IfxStdIf_PwmHl.h:260


iLLD_TC38A: IfxStdIf_Timer.c Source File

  • Service
  • CpuGeneric
  • StdIf
IfxStdIf_Timer.c
Go to the documentation of this file.
1 /**
2 * \file IfxStdIf_Timer.c
3 * \brief Standard interface: Timer
4 * \ingroup IfxStdIf
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "IfxStdIf_Timer.h"
44
45 void IfxStdIf_Timer_initConfig(IfxStdIf_Timer_Config *config)
46 {
47 config->frequency = 1000;
48 config->isrPriority = 0;
49 config->isrProvider = IfxSrc_Tos_cpu0;
50 config->minResolution = 0;
51 config->trigger.outputMode = IfxPort_OutputMode_pushPull;
52 config->trigger.outputDriver = IfxPort_PadDriver_cmosAutomotiveSpeed1;
53 config->trigger.risingEdgeAtPeriod = FALSE;
54 config->trigger.outputEnabled = FALSE;
55 config->trigger.enabled = FALSE;
56 config->trigger.triggerPoint = 0;
57 config->trigger.isrPriority = 0;
58 config->trigger.isrProvider = IfxSrc_Tos_cpu0;
59 config->countDir = IfxStdIf_Timer_CountDir_up;
60 config->startOffset = 0.0;
61 }
62
63
64 static float32 IfxStdIf_Timer_nopGetFrequency(IfxStdIf_InterfaceDriver stdIf)
65 {
66 IFX_UNUSED_PARAMETER(stdIf);
67 return 0.0;
68 }
69 static Ifx_TimerValue IfxStdIf_Timer_nopGetPeriod(IfxStdIf_InterfaceDriver stdIf)
70 {
71 IFX_UNUSED_PARAMETER(stdIf);
72 return 0;
73 }
74 static float32 IfxStdIf_Timer_nopGetResolution(IfxStdIf_InterfaceDriver stdIf)
75 {
76 IFX_UNUSED_PARAMETER(stdIf);
77 return 0.0;
78 }
79 static Ifx_TimerValue IfxStdIf_Timer_nopGetTrigger(IfxStdIf_InterfaceDriver stdIf)
80 {
81 IFX_UNUSED_PARAMETER(stdIf);
82 return 0;
83 }
84 static boolean IfxStdIf_Timer_nopSetFrequency(IfxStdIf_InterfaceDriver stdIf, float32 frequency)
85 {
86 IFX_UNUSED_PARAMETER(stdIf);
87 IFX_UNUSED_PARAMETER(frequency);
88 return FALSE;
89 }
90 static void IfxStdIf_Timer_nopUpdateInputFrequency(IfxStdIf_InterfaceDriver stdIf)
91 {
92 IFX_UNUSED_PARAMETER(stdIf);
93 }
94 static void IfxStdIf_Timer_nopApplyUpdate(IfxStdIf_InterfaceDriver stdIf)
95 {
96 IFX_UNUSED_PARAMETER(stdIf);
97 }
98 static void IfxStdIf_Timer_nopDisableUpdate(IfxStdIf_InterfaceDriver stdIf)
99 {
100 IFX_UNUSED_PARAMETER(stdIf);
101 }
102 static float32 IfxStdIf_Timer_nopGetInputFrequency(IfxStdIf_InterfaceDriver stdIf)
103 {
104 IFX_UNUSED_PARAMETER(stdIf);
105 return 0.0;
106 }
107 static void IfxStdIf_Timer_nopRun(IfxStdIf_InterfaceDriver stdIf)
108 {
109 IFX_UNUSED_PARAMETER(stdIf);
110 }
111 static boolean IfxStdIf_Timer_nopSetPeriod(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue period)
112 {
113 IFX_UNUSED_PARAMETER(stdIf);
114 IFX_UNUSED_PARAMETER(period);
115 return FALSE;
116 }
117 static void IfxStdIf_Timer_nopSetSingleMode(IfxStdIf_InterfaceDriver stdIf, boolean enabled)
118 {
119 IFX_UNUSED_PARAMETER(stdIf);
120 IFX_UNUSED_PARAMETER(enabled);
121 }
122 static void IfxStdIf_Timer_nopSetTrigger(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue triggerPoint)
123 {
124 IFX_UNUSED_PARAMETER(stdIf);
125 IFX_UNUSED_PARAMETER(triggerPoint);
126 }
127 static void IfxStdIf_Timer_nopStop(IfxStdIf_InterfaceDriver stdIf)
128 {
129 IFX_UNUSED_PARAMETER(stdIf);
130 }
131 static boolean IfxStdIf_Timer_nopAckTimerIrq(IfxStdIf_InterfaceDriver stdIf)
132 {
133 IFX_UNUSED_PARAMETER(stdIf);
134 return FALSE;
135 }
136 static boolean IfxStdIf_Timer_nopAckTriggerIrq(IfxStdIf_InterfaceDriver stdIf)
137 {
138 IFX_UNUSED_PARAMETER(stdIf);
139 return FALSE;
140 }
141
142
143 void IfxStdIf_Timer_initStdIf(IfxStdIf_Timer *stdIf, IfxStdIf_InterfaceDriver driver)
144 {
145 stdIf->driver = driver;
146 stdIf->getFrequency =&IfxStdIf_Timer_nopGetFrequency ;
147 stdIf->getPeriod =&IfxStdIf_Timer_nopGetPeriod ;
148 stdIf->getResolution =&IfxStdIf_Timer_nopGetResolution ;
149 stdIf->getTrigger =&IfxStdIf_Timer_nopGetTrigger ;
150 stdIf->setFrequency =&IfxStdIf_Timer_nopSetFrequency ;
151 stdIf->updateInputFrequency =&IfxStdIf_Timer_nopUpdateInputFrequency;
152 stdIf->applyUpdate =&IfxStdIf_Timer_nopApplyUpdate ;
153 stdIf->disableUpdate =&IfxStdIf_Timer_nopDisableUpdate ;
154 stdIf->getInputFrequency =&IfxStdIf_Timer_nopGetInputFrequency ;
155 stdIf->run =&IfxStdIf_Timer_nopRun ;
156 stdIf->setPeriod =&IfxStdIf_Timer_nopSetPeriod ;
157 stdIf->setSingleMode =&IfxStdIf_Timer_nopSetSingleMode ;
158 stdIf->setTrigger =&IfxStdIf_Timer_nopSetTrigger ;
159 stdIf->stop =&IfxStdIf_Timer_nopStop ;
160 stdIf->ackTimerIrq =&IfxStdIf_Timer_nopAckTimerIrq ;
161 stdIf->ackTriggerIrq =&IfxStdIf_Timer_nopAckTriggerIrq ;
162 }
IfxStdIf_Timer_::getTrigger
IfxStdIf_Timer_GetTrigger getTrigger
Definition: IfxStdIf_Timer.h:243
IfxStdIf_Timer_Config::isrProvider
IfxSrc_Tos isrProvider
Interrupt service provider for the timer interrupt.
Definition: IfxStdIf_Timer.h:276
IfxStdIf_InterfaceDriver
void * IfxStdIf_InterfaceDriver
Pointer to the specific interface driver.
Definition: IfxStdIf.h:115
IfxPort_OutputMode_pushPull
Definition: IfxPort.h:142
IfxStdIf_Timer_::stop
IfxStdIf_Timer_Stop stop
Definition: IfxStdIf_Timer.h:253
IfxStdIf_Timer_::setSingleMode
IfxStdIf_Timer_SetSingleMode setSingleMode
Definition: IfxStdIf_Timer.h:251
IfxStdIf_Timer_::driver
IfxStdIf_InterfaceDriver driver
Interface driver object.
Definition: IfxStdIf_Timer.h:239
IfxStdIf_Timer_TrigConfig::outputDriver
IfxPort_PadDriver outputDriver
Output pad driver.
Definition: IfxStdIf_Timer.h:266
float32
float float32
Definition: Platform_Types.h:170
IfxStdIf_Timer_
Standard interface object.
Definition: IfxStdIf_Timer.h:237
IfxStdIf_Timer_::getFrequency
IfxStdIf_Timer_GetFrequency getFrequency
Definition: IfxStdIf_Timer.h:240
IfxStdIf_Timer_Config
Timer configuration.
Definition: IfxStdIf_Timer.h:272
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxStdIf_Timer_Config::isrPriority
Ifx_Priority isrPriority
Interrupt isrPriority of the timer interrupt, if 0 the interrupt is disable.
Definition: IfxStdIf_Timer.h:275
IfxStdIf_Timer_::disableUpdate
IfxStdIf_Timer_DisableUpdate disableUpdate
Definition: IfxStdIf_Timer.h:247
IfxPort_PadDriver_cmosAutomotiveSpeed1
Speed grade 1.
Definition: IfxPort.h:153
IfxStdIf_Timer_Config::countDir
IfxStdIf_Timer_CountDir countDir
Timer counting mode.
Definition: IfxStdIf_Timer.h:279
IfxStdIf_Timer_TrigConfig::risingEdgeAtPeriod
boolean risingEdgeAtPeriod
Set the clock signal polarity, if TRUE, the rising edge is at the period, else at the trigger offset...
Definition: IfxStdIf_Timer.h:267
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:68
IfxStdIf_Timer_initConfig
void IfxStdIf_Timer_initConfig(IfxStdIf_Timer_Config *config)
Definition: IfxStdIf_Timer.c:45
IfxStdIf_Timer.h
Standard interface: Timer.
IfxStdIf_Timer_initStdIf
void IfxStdIf_Timer_initStdIf(IfxStdIf_Timer *stdIf, IfxStdIf_InterfaceDriver driver)
Definition: IfxStdIf_Timer.c:143
IfxStdIf_Timer_CountDir_up
Timer is counting up.
Definition: IfxStdIf_Timer.h:87
IfxStdIf_Timer_::getInputFrequency
IfxStdIf_Timer_GetInputFrequency getInputFrequency
Definition: IfxStdIf_Timer.h:248
IfxStdIf_Timer_TrigConfig::triggerPoint
Ifx_TimerValue triggerPoint
Trigger point in timer ticks.
Definition: IfxStdIf_Timer.h:262
IfxStdIf_Timer_::setTrigger
IfxStdIf_Timer_SetTrigger setTrigger
Definition: IfxStdIf_Timer.h:252
IfxStdIf_Timer_::setFrequency
IfxStdIf_Timer_SetFrequency setFrequency
Definition: IfxStdIf_Timer.h:244
IfxStdIf_Timer_::run
IfxStdIf_Timer_Run run
Definition: IfxStdIf_Timer.h:249
IfxStdIf_Timer_::updateInputFrequency
IfxStdIf_Timer_UpdateInputFrequency updateInputFrequency
Definition: IfxStdIf_Timer.h:245
IfxStdIf_Timer_::setPeriod
IfxStdIf_Timer_SetPeriod setPeriod
Definition: IfxStdIf_Timer.h:250
IfxStdIf_Timer_::ackTriggerIrq
IfxStdIf_Timer_AckTriggerIrq ackTriggerIrq
Definition: IfxStdIf_Timer.h:255
IfxStdIf_Timer_Config::frequency
float32 frequency
PWM frequency in Hz. This parameter is only used to initialise the timer structure. An additional cell is required to build the timer.
Definition: IfxStdIf_Timer.h:274
IfxStdIf_Timer_::getResolution
IfxStdIf_Timer_GetResolution getResolution
Definition: IfxStdIf_Timer.h:242
IfxStdIf_Timer_Config::trigger
IfxStdIf_Timer_TrigConfig trigger
Trigger configuration.
Definition: IfxStdIf_Timer.h:278
IfxStdIf_Timer_Config::startOffset
float32 startOffset
FIXME make startOffset as Ifx_TimerValue. Timer initial offset in % of the period.
Definition: IfxStdIf_Timer.h:280
IfxStdIf_Timer_::applyUpdate
IfxStdIf_Timer_ApplyUpdate applyUpdate
Definition: IfxStdIf_Timer.h:246
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
IfxStdIf_Timer_TrigConfig::enabled
boolean enabled
If true, the trigger functionality is Initialised, else ignored.
Definition: IfxStdIf_Timer.h:261
IfxStdIf_Timer_TrigConfig::outputEnabled
boolean outputEnabled
If TRUE, the output pin is enabled, else disabled. In case the output is disabled, the output pin is not initialized.
Definition: IfxStdIf_Timer.h:268
IfxStdIf_Timer_Config::minResolution
float32 minResolution
Minimum resolution of the timer in seconds. if 0, this parameter is ignored. If the configuration doe...
Definition: IfxStdIf_Timer.h:277
IfxStdIf_Timer_TrigConfig::outputMode
IfxPort_OutputMode outputMode
Output mode.
Definition: IfxStdIf_Timer.h:265
IfxStdIf_Timer_::ackTimerIrq
IfxStdIf_Timer_AckTimerIrq ackTimerIrq
Definition: IfxStdIf_Timer.h:254
IfxStdIf_Timer_::getPeriod
IfxStdIf_Timer_GetPeriod getPeriod
Definition: IfxStdIf_Timer.h:241


iLLD_TC38A: IfxStdIf_Timer.h Source File

  • Service
  • CpuGeneric
  • StdIf
IfxStdIf_Timer.h
Go to the documentation of this file.
1 /**
2 * \file IfxStdIf_Timer.h
3 * \brief Standard interface: Timer
4 * \ingroup IfxStdIf
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 * \defgroup library_srvsw_stdif_timer Standard interface: Timer
43 * \ingroup library_srvsw_stdif
44 *
45 * The standard interface timer (Timer) abstract the hardware used for timer feature. It provide, after proper initialization an hardware
46 * independant way to interact with the timer functionallity like setting period, trigger points, ...
47 *
48 * The figure below shows the standard timer interface.
49 *
50 * \image html "Timer.png" "Standard timer interface"
51 *
52 * This interface defines the following features:
53 * - Timer with configurable frequency
54 * - Configurable counting direction
55 * - Optional interrupt on timer event with configurable service request provider and priority
56 * - Optional trigger signal with:
57 * - Optional interrupt on trigger event with configurable service request provider and priority
58 * - Configurable trigger point
59 * - Configurable trigger edge
60 * - trigger signal can be internal only or forwarded to a port pin
61 */
62
63 #ifndef IFXSTDIF_TIMER_H
64 #define IFXSTDIF_TIMER_H 1
65
66 #include "Cpu/Std/Ifx_Types.h"
67 #include "Src/Std/IfxSrc.h"
68 #include "Port/Std/IfxPort.h"
69 #include "IfxStdIf.h"
70 /** \brief Output event enable / disable */
71 typedef enum
72 {
73 IfxStdIf_Timer_Output_disabled, /**< \brief Timer output is set to the inactive, no change in the output */
74 IfxStdIf_Timer_Output_enabled /**< \brief In case the trigger is enabled,
75 * the output is set to active between time 0 to the trigger point,
76 * and is set to inactive between the trigger point and the period.
77 * In case the trigger is disabled and counting direction if IfxStdIf_Timer_CountDir_up, the output is toggled when the timer is reset
78 * In case the trigger is disabled and counting direction if IfxStdIf_Timer_CountDir_down, the output is toggled when the timer is reloaded
79 * In case the trigger is disabled and counting direction if IfxStdIf_Timer_CountDir_upAndDown, the output is toggled when the timer reach 0
80 * In case the trigger is enabled the trigger is active before the trigger point and inactive after the trigger point.
81 */
82 } IfxStdIf_Timer_OutputEvent;
83
84 /** \brief Timer increment direction */
85 typedef enum
86 {
87 IfxStdIf_Timer_CountDir_up, /**< \brief Timer is counting up */
88 IfxStdIf_Timer_CountDir_upAndDown, /**< \brief Timer is counting up and down */
89 IfxStdIf_Timer_CountDir_down /**< \brief Timer is counting down */
90 } IfxStdIf_Timer_CountDir;
91
92 /** \brief Forward declaration */
93 typedef struct IfxStdIf_Timer_ IfxStdIf_Timer;
94
95 /** \brief Return the timer frequency in Hz
96 * \param stdIf Pointer to the interface driver object
97 * \return Return the timer frequency in Hz
98 */
99 typedef float32 (*IfxStdIf_Timer_GetFrequency)(IfxStdIf_InterfaceDriver stdIf);
100
101 /** \brief Return the timer period in ticks
102 * \param stdIf Pointer to the interface driver object
103 * \return Return the timer period in ticks
104 */
105 typedef Ifx_TimerValue (*IfxStdIf_Timer_GetPeriod)(IfxStdIf_InterfaceDriver stdIf);
106
107 /** \brief Return the timer resolution in seconds
108 * \param stdIf Pointer to the interface driver object
109 * \return Return the timer resolution in seconds
110 */
111 typedef float32 (*IfxStdIf_Timer_GetResolution)(IfxStdIf_InterfaceDriver stdIf);
112
113 /** \brief Return the timer trigger point
114 * \param stdIf Pointer to the interface driver object
115 * \return Return the timer timer point
116 */
117 typedef Ifx_TimerValue (*IfxStdIf_Timer_GetTrigger)(IfxStdIf_InterfaceDriver stdIf);
118
119 /** \brief Set the timer frequency in Hz
120 * \param stdIf Pointer to the interface driver object
121 * \param frequency Requested timer frequency in Hz
122 * \retval TRUE The requested frequency could be set
123 * \retval FALSE The requested frequency is out of range
124 */
125 typedef boolean (*IfxStdIf_Timer_SetFrequency)(IfxStdIf_InterfaceDriver stdIf, float32 frequency);
126
127 /** \brief Indicates the stdIf that the imput frequency has changed and that it should be taken in account
128 * \param stdIf Pointer to the interface driver object
129 * \return None
130 */
131 typedef void (*IfxStdIf_Timer_UpdateInputFrequency)(IfxStdIf_InterfaceDriver stdIf);
132
133 /** \brief Apply requested updates.
134 *
135 * Such requested update are calls to:
136 * - IfxStdIf_Timer_setSingleMode()
137 * - IfxStdIf_Timer_setTrigger()
138 * - IfxStdIf_Timer_setPeriod() or IfxStdIf_Timer_setFrequency()
139 * as well as PWM generation related calls such as:
140 * - IfxStdIf_PwmHl_setDeadtime()
141 * - IfxStdIf_PwmHl_setMode()
142 * - IfxStdIf_PwmHl_setOnTime()
143 * - IfxStdIf_PwmHl_setupChannels()
144 *
145 * It is important to note, that only one call to Timer_applyUpdate() is allowed within
146 * one timer period!!!
147 * In order to ensure correct update synchronisation, disableUpdate() should have been called previously.
148 *
149 * \param stdIf Pointer to the interface driver object
150 * \return None
151 */
152 typedef void (*IfxStdIf_Timer_ApplyUpdate)(IfxStdIf_InterfaceDriver stdIf);
153
154 /** \brief Disable updates
155 *
156 * The following API action will not be taken in account before applyUpdate is called:
157 * - IfxStdIf_Timer_setSingleMode()
158 * - IfxStdIf_Timer_setTrigger()
159 * - IfxStdIf_Timer_setPeriod() or IfxStdIf_Timer_setFrequency()
160 * as well as PWM generation related calls such as:
161 * - IfxStdIf_PwmHl_setDeadtime()
162 * - IfxStdIf_PwmHl_setMode()
163 * - IfxStdIf_PwmHl_setOnTime()
164 * - IfxStdIf_PwmHl_setupChannels()
165 *
166 * \param stdIf Pointer to the interface driver object
167 * \return None
168 */
169 typedef void (*IfxStdIf_Timer_DisableUpdate)(IfxStdIf_InterfaceDriver stdIf);
170
171 /** \brief Return the timer input frequency in Hz
172 * \param stdIf Pointer to the interface driver object
173 * \return Return the timer input frequency in Hz
174 */
175 typedef float32 (*IfxStdIf_Timer_GetInputFrequency)(IfxStdIf_InterfaceDriver stdIf);
176
177 /** \brief Immediately start the timer.
178 *
179 * Please note that other mechanism may avoid the timer to tick, such as when the
180 * global (input) clock to the timer block is inactive.
181 * \param stdIf Pointer to the interface driver object
182 * \return none
183 */
184 typedef void (*IfxStdIf_Timer_Run)(IfxStdIf_InterfaceDriver stdIf);
185
186 /** \brief Set the timer period.
187 *
188 * Timer_applyUpdate() shall be invoked in order this to take effect.
189 * \param stdIf Pointer to the interface driver object
190 * \param period Period value in ticks
191 * \retval TRUE The requested period could be set
192 * \retval FALSE The requested period is out of range
193 */
194 typedef boolean (*IfxStdIf_Timer_SetPeriod)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue period);
195
196 /** \brief Stop timer at the end of the period
197 *
198 * Timer_applyUpdate() shall be invoked in order this to take effect.
199 * \param stdIf Pointer to the interface driver object
200 * \param enabled If TRUE, enable the single mode, else disable the single mode (continuous mode)
201 * \return none
202 */
203 typedef void (*IfxStdIf_Timer_SetSingleMode)(IfxStdIf_InterfaceDriver stdIf, boolean enabled);
204
205 /** \brief Set trigger point.
206 *
207 * \see Timer_OutputEvent for the definition of the output level.
208 * Active state is defined by Timer_Config::outputActiveState.
209 *
210 * Timer_applyUpdate() shall be invoked in order this to take effect.
211 * \param stdIf Pointer to the interface driver object
212 * \param triggerPoint Trigger point in ticks from the period start.
213 * \return none
214 */
215 typedef void (*IfxStdIf_Timer_SetTrigger)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue triggerPoint);
216
217 /** \brief Immediately stops the timer
218 * \param stdIf Pointer to the interface driver object
219 * \return none
220 */
221 typedef void (*IfxStdIf_Timer_Stop)(IfxStdIf_InterfaceDriver stdIf);
222
223 /** \brief Return the timer interrupt flag and reset it
224 * \param stdIf Pointer to the interface driver object
225 * \return Return the timer interrupt flag
226 */
227 typedef boolean (*IfxStdIf_Timer_AckTimerIrq)(IfxStdIf_InterfaceDriver stdIf);
228
229 /** \brief Return the trigger interrupt flag and reset it
230 * \param stdIf Pointer to the interface driver object
231 * \return Return the trigger interrupt flag
232 */
233 typedef boolean (*IfxStdIf_Timer_AckTriggerIrq)(IfxStdIf_InterfaceDriver stdIf);
234
235 /** \brief Standard interface object
236 */
237 struct IfxStdIf_Timer_
238 {
239 IfxStdIf_InterfaceDriver driver; /**< \brief Interface driver object */
240 IfxStdIf_Timer_GetFrequency getFrequency; /**< \brief \see IfxStdIf_Timer_GetFrequency */
241 IfxStdIf_Timer_GetPeriod getPeriod; /**< \brief \see IfxStdIf_Timer_GetPeriod */
242 IfxStdIf_Timer_GetResolution getResolution; /**< \brief \see IfxStdIf_Timer_GetResolution */
243 IfxStdIf_Timer_GetTrigger getTrigger; /**< \brief \see IfxStdIf_Timer_GetTrigger */
244 IfxStdIf_Timer_SetFrequency setFrequency; /**< \brief \see IfxStdIf_Timer_SetFrequency */
245 IfxStdIf_Timer_UpdateInputFrequency updateInputFrequency; /**< \brief \see IfxStdIf_Timer_UpdateInputFrequency */
246 IfxStdIf_Timer_ApplyUpdate applyUpdate; /**< \brief \see IfxStdIf_Timer_ApplyUpdate */
247 IfxStdIf_Timer_DisableUpdate disableUpdate; /**< \brief \see IfxStdIf_Timer_DisableUpdate */
248 IfxStdIf_Timer_GetInputFrequency getInputFrequency; /**< \brief \see IfxStdIf_Timer_GetInputFrequency */
249 IfxStdIf_Timer_Run run; /**< \brief \see IfxStdIf_Timer_Run */
250 IfxStdIf_Timer_SetPeriod setPeriod; /**< \brief \see IfxStdIf_Timer_SetPeriod */
251 IfxStdIf_Timer_SetSingleMode setSingleMode; /**< \brief \see IfxStdIf_Timer_SetSingleMode */
252 IfxStdIf_Timer_SetTrigger setTrigger; /**< \brief \see IfxStdIf_Timer_SetTrigger */
253 IfxStdIf_Timer_Stop stop; /**< \brief \see IfxStdIf_Timer_Stop */
254 IfxStdIf_Timer_AckTimerIrq ackTimerIrq; /**< \brief \see IfxStdIf_Timer_AckTimerIrq */
255 IfxStdIf_Timer_AckTriggerIrq ackTriggerIrq; /**< \brief \see IfxStdIf_Timer_AckTriggerIrq */
256 };
257
258 /** \brief Trigger configuration */
259 typedef struct
260 {
261 boolean enabled; /**< \brief If true, the trigger functionality is Initialised, else ignored */
262 Ifx_TimerValue triggerPoint; /**< \brief Trigger point in timer ticks */
263 Ifx_Priority isrPriority; /**< \brief Interrupt isrPriority of the trigger interrupt, if 0 the interrupt is disable */
264 IfxSrc_Tos isrProvider; /**< \brief Interrupt service provider for the trigger interrupt */
265 IfxPort_OutputMode outputMode; /**< \brief Output mode */
266 IfxPort_PadDriver outputDriver; /**< \brief Output pad driver */
267 boolean risingEdgeAtPeriod; /**< \brief Set the clock signal polarity, if TRUE, the rising edge is at the period, else at the trigger offset. When the timer is stopped, the output is set to high */
268 boolean outputEnabled; /**< \brief If TRUE, the output pin is enabled, else disabled. In case the output is disabled, the output pin is not initialized. */
269 } IfxStdIf_Timer_TrigConfig;
270
271 /** \brief Timer configuration */
272 typedef struct
273 {
274 float32 frequency; /**< \brief PWM frequency in Hz. This parameter is only used to initialise the timer structure. An additional cell is required to build the timer. */
275 Ifx_Priority isrPriority; /**< \brief Interrupt isrPriority of the timer interrupt, if 0 the interrupt is disable */
276 IfxSrc_Tos isrProvider; /**< \brief Interrupt service provider for the timer interrupt */
277 float32 minResolution; /**< \brief Minimum resolution of the timer in seconds. if 0, this parameter is ignored. If the configuration does not enable this setting a warning is given */
278 IfxStdIf_Timer_TrigConfig trigger; /**< \brief Trigger configuration */
279 IfxStdIf_Timer_CountDir countDir; /**< \brief Timer counting mode */
280 float32 startOffset; /**< \brief FIXME make startOffset as Ifx_TimerValue. Timer initial offset in % of the period */
281 } IfxStdIf_Timer_Config;
282
283 /** \addtogroup library_srvsw_stdif_timer
284 * \{
285 */
286 /** \copydoc IfxStdIf_Timer_GetFrequency
287 * \param stdIf Standard interface pointer
288 */
289 IFX_INLINE float32 IfxStdIf_Timer_getFrequency(IfxStdIf_Timer *stdIf)
290 {
291 return stdIf->getFrequency(stdIf->driver);
292 }
293
294
295 /** \copydoc IfxStdIf_Timer_GetPeriod
296 * \param stdIf Standard interface pointer
297 */
298 IFX_INLINE Ifx_TimerValue IfxStdIf_Timer_getPeriod(IfxStdIf_Timer *stdIf)
299 {
300 return stdIf->getPeriod(stdIf->driver);
301 }
302
303
304 /** \copydoc IfxStdIf_Timer_GetTrigger
305 * \param stdIf Standard interface pointer
306 */
307 IFX_INLINE Ifx_TimerValue IfxStdIf_Timer_getTrigger(IfxStdIf_Timer *stdIf)
308 {
309 return stdIf->getTrigger(stdIf->driver);
310 }
311
312
313 /** \copydoc IfxStdIf_Timer_GetResolution
314 * \param stdIf Standard interface pointer
315 */
316 IFX_INLINE float32 IfxStdIf_Timer_getResolution(IfxStdIf_Timer *stdIf)
317 {
318 return stdIf->getResolution(stdIf->driver);
319 }
320
321
322 /** \copydoc IfxStdIf_Timer_SetFrequency
323 * \param stdIf Standard interface pointer
324 */
325 IFX_INLINE boolean IfxStdIf_Timer_setFrequency(IfxStdIf_Timer *stdIf, float32 frequency)
326 {
327 return stdIf->setFrequency(stdIf->driver, frequency);
328 }
329
330
331 /** \copydoc IfxStdIf_Timer_UpdateInputFrequency
332 * \param stdIf Standard interface pointer
333 */
334 IFX_INLINE void IfxStdIf_Timer_updateInputFrequency(IfxStdIf_Timer *stdIf)
335 {
336 stdIf->updateInputFrequency(stdIf->driver);
337 }
338
339
340 /** \copydoc IfxStdIf_Timer_ApplyUpdate
341 * \param stdIf Standard interface pointer
342 */
343 IFX_INLINE void IfxStdIf_Timer_applyUpdate(IfxStdIf_Timer *stdIf)
344 {
345 stdIf->applyUpdate(stdIf->driver);
346 }
347
348
349 /** \copydoc IfxStdIf_Timer_DisableUpdate
350 * \param stdIf Standard interface pointer
351 */
352 IFX_INLINE void IfxStdIf_Timer_disableUpdate(IfxStdIf_Timer *stdIf)
353 {
354 stdIf->disableUpdate(stdIf->driver);
355 }
356
357
358 /** \copydoc IfxStdIf_Timer_GetInputFrequency
359 * \param stdIf Standard interface pointer
360 */
361 IFX_INLINE float32 IfxStdIf_Timer_getInputFrequency(IfxStdIf_Timer *stdIf)
362 {
363 return stdIf->getInputFrequency(stdIf->driver);
364 }
365
366
367 /** \copydoc IfxStdIf_Timer_Run
368 * \param stdIf Standard interface pointer
369 */
370 IFX_INLINE void IfxStdIf_Timer_run(IfxStdIf_Timer *stdIf)
371 {
372 stdIf->run(stdIf->driver);
373 }
374
375
376 /** \copydoc IfxStdIf_Timer_SetPeriod
377 * \param stdIf Standard interface pointer
378 */
379 IFX_INLINE boolean IfxStdIf_Timer_setPeriod(IfxStdIf_Timer *stdIf, Ifx_TimerValue period)
380 {
381 return stdIf->setPeriod(stdIf->driver, period);
382 }
383
384
385 /** \copydoc IfxStdIf_Timer_SetSingleMode
386 * \param stdIf Standard interface pointer
387 */
388 IFX_INLINE void IfxStdIf_Timer_setSingleMode(IfxStdIf_Timer *stdIf, boolean enabled)
389 {
390 stdIf->setSingleMode(stdIf->driver, enabled);
391 }
392
393
394 /** \copydoc IfxStdIf_Timer_SetTrigger
395 * \param stdIf Standard interface pointer
396 */
397 IFX_INLINE void IfxStdIf_Timer_setTrigger(IfxStdIf_Timer *stdIf, Ifx_TimerValue triggerPoint)
398 {
399 stdIf->setTrigger(stdIf->driver, triggerPoint);
400 }
401
402
403 /** \copydoc IfxStdIf_Timer_Stop
404 * \param stdIf Standard interface pointer
405 */
406 IFX_INLINE void IfxStdIf_Timer_stop(IfxStdIf_Timer *stdIf)
407 {
408 stdIf->stop(stdIf->driver);
409 }
410
411
412 /** \copydoc IfxStdIf_Timer_AckTimerIrq
413 * \param stdIf Standard interface pointer
414 */
415 IFX_INLINE boolean IfxStdIf_Timer_ackTimerIrq(IfxStdIf_Timer *stdIf)
416 {
417 return stdIf->ackTimerIrq(stdIf->driver);
418 }
419
420
421 /** \copydoc IfxStdIf_Timer_AckTriggerIrq
422 * \param stdIf Standard interface pointer
423 */
424 IFX_INLINE boolean IfxStdIf_Timer_ackTriggerIrq(IfxStdIf_Timer *stdIf)
425 {
426 return stdIf->ackTriggerIrq(stdIf->driver);
427 }
428
429
430 /** \brief Convert timer ticks to seconds
431 * \param clockFreq Timer clock frequency
432 * \param ticks time value in ticks to be converted
433 * \return Return the converted time in s
434 */
435 IFX_INLINE float32 IfxStdIf_Timer_tickToS(float32 clockFreq, Ifx_TimerValue ticks)
436 {
437 return ticks / clockFreq;
438 }
439
440
441 /** \brief Convert seconds to timer ticks
442 * \param clockFreq Timer clock frequency
443 * \param seconds time value in seconds to be converted
444 * \return Return the converted time in timer ticks
445 */
446 IFX_INLINE Ifx_TimerValue IfxStdIf_Timer_sToTick(float32 clockFreq, float32 seconds)
447 {
448 return seconds * clockFreq;
449 }
450
451
452 /** \brief Return the timer period in second
453 * \param stdIf Pointer to the interface driver object
454 */
455 IFX_INLINE float32 IfxStdIf_Timer_getPeriodSecond(IfxStdIf_Timer *stdIf)
456 {
457 return IfxStdIf_Timer_tickToS(IfxStdIf_Timer_getInputFrequency(stdIf), stdIf->getPeriod(stdIf->driver));
458 }
459
460
461 /** \} */
462
463 /** Initialize the configuration structure to default
464 *
465 * \param config Timer configuration. This parameter is initialised by the function
466 *
467 */
468 IFX_EXTERN void IfxStdIf_Timer_initConfig(IfxStdIf_Timer_Config *config);
469
470 /** Initialize the stdIf so that all call back function default to no operation
471 *
472 * \param stdIf Pointer to the interface driver object
473 * \param driver Interface driver object
474 *
475 */
476 IFX_EXTERN void IfxStdIf_Timer_initStdIf(IfxStdIf_Timer *stdIf, IfxStdIf_InterfaceDriver driver);
477
478 #endif /* IFXSTDIF_TIMER_H */
IfxStdIf_Timer_::getTrigger
IfxStdIf_Timer_GetTrigger getTrigger
Definition: IfxStdIf_Timer.h:243
IfxStdIf_Timer_setTrigger
IFX_INLINE void IfxStdIf_Timer_setTrigger(IfxStdIf_Timer *stdIf, Ifx_TimerValue triggerPoint)
Set trigger point.
Definition: IfxStdIf_Timer.h:397
IfxStdIf_Timer_GetTrigger
Ifx_TimerValue(* IfxStdIf_Timer_GetTrigger)(IfxStdIf_InterfaceDriver stdIf)
Return the timer trigger point.
Definition: IfxStdIf_Timer.h:117
IfxStdIf_Timer_TrigConfig::isrProvider
IfxSrc_Tos isrProvider
Interrupt service provider for the trigger interrupt.
Definition: IfxStdIf_Timer.h:264
IfxStdIf_InterfaceDriver
void * IfxStdIf_InterfaceDriver
Pointer to the specific interface driver.
Definition: IfxStdIf.h:115
IfxStdIf_Timer_getPeriod
IFX_INLINE Ifx_TimerValue IfxStdIf_Timer_getPeriod(IfxStdIf_Timer *stdIf)
Return the timer period in ticks.
Definition: IfxStdIf_Timer.h:298
IfxStdIf_Timer_GetFrequency
float32(* IfxStdIf_Timer_GetFrequency)(IfxStdIf_InterfaceDriver stdIf)
Return the timer frequency in Hz.
Definition: IfxStdIf_Timer.h:99
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:100
IfxStdIf_Timer_stop
IFX_INLINE void IfxStdIf_Timer_stop(IfxStdIf_Timer *stdIf)
Immediately stops the timer.
Definition: IfxStdIf_Timer.h:406
IfxStdIf_Timer_AckTriggerIrq
boolean(* IfxStdIf_Timer_AckTriggerIrq)(IfxStdIf_InterfaceDriver stdIf)
Return the trigger interrupt flag and reset it.
Definition: IfxStdIf_Timer.h:233
IfxStdIf_Timer_UpdateInputFrequency
void(* IfxStdIf_Timer_UpdateInputFrequency)(IfxStdIf_InterfaceDriver stdIf)
Indicates the stdIf that the imput frequency has changed and that it should be taken in account...
Definition: IfxStdIf_Timer.h:131
IfxStdIf_Timer_::stop
IfxStdIf_Timer_Stop stop
Definition: IfxStdIf_Timer.h:253
IfxStdIf_Timer_::setSingleMode
IfxStdIf_Timer_SetSingleMode setSingleMode
Definition: IfxStdIf_Timer.h:251
IfxStdIf_Timer_::driver
IfxStdIf_InterfaceDriver driver
Interface driver object.
Definition: IfxStdIf_Timer.h:239
IfxStdIf_Timer_tickToS
IFX_INLINE float32 IfxStdIf_Timer_tickToS(float32 clockFreq, Ifx_TimerValue ticks)
Convert timer ticks to seconds.
Definition: IfxStdIf_Timer.h:435
IfxStdIf_Timer_Output_disabled
Timer output is set to the inactive, no change in the output.
Definition: IfxStdIf_Timer.h:73
IfxStdIf_Timer_TrigConfig::outputDriver
IfxPort_PadDriver outputDriver
Output pad driver.
Definition: IfxStdIf_Timer.h:266
IfxStdIf.h
Standard interface types.
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:140
IfxStdIf_Timer_SetFrequency
boolean(* IfxStdIf_Timer_SetFrequency)(IfxStdIf_InterfaceDriver stdIf, float32 frequency)
Set the timer frequency in Hz.
Definition: IfxStdIf_Timer.h:125
IfxStdIf_Timer_updateInputFrequency
IFX_INLINE void IfxStdIf_Timer_updateInputFrequency(IfxStdIf_Timer *stdIf)
Indicates the stdIf that the imput frequency has changed and that it should be taken in account...
Definition: IfxStdIf_Timer.h:334
IfxStdIf_Timer_sToTick
IFX_INLINE Ifx_TimerValue IfxStdIf_Timer_sToTick(float32 clockFreq, float32 seconds)
Convert seconds to timer ticks.
Definition: IfxStdIf_Timer.h:446
float32
float float32
Definition: Platform_Types.h:170
IfxStdIf_Timer_initStdIf
IFX_EXTERN void IfxStdIf_Timer_initStdIf(IfxStdIf_Timer *stdIf, IfxStdIf_InterfaceDriver driver)
Definition: IfxStdIf_Timer.c:143
IfxStdIf_Timer_
Standard interface object.
Definition: IfxStdIf_Timer.h:237
IfxStdIf_Timer_run
IFX_INLINE void IfxStdIf_Timer_run(IfxStdIf_Timer *stdIf)
Immediately start the timer.
Definition: IfxStdIf_Timer.h:370
IfxStdIf_Timer_::getFrequency
IfxStdIf_Timer_GetFrequency getFrequency
Definition: IfxStdIf_Timer.h:240
IfxSrc.h
SRC basic functionality.
IfxStdIf_Timer_GetResolution
float32(* IfxStdIf_Timer_GetResolution)(IfxStdIf_InterfaceDriver stdIf)
Return the timer resolution in seconds.
Definition: IfxStdIf_Timer.h:111
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxStdIf_Timer_Config
Timer configuration.
Definition: IfxStdIf_Timer.h:272
IfxStdIf_Timer_getInputFrequency
IFX_INLINE float32 IfxStdIf_Timer_getInputFrequency(IfxStdIf_Timer *stdIf)
Return the timer input frequency in Hz.
Definition: IfxStdIf_Timer.h:361
IfxStdIf_Timer_OutputEvent
IfxStdIf_Timer_OutputEvent
Output event enable / disable.
Definition: IfxStdIf_Timer.h:71
IfxStdIf_Timer_initConfig
IFX_EXTERN void IfxStdIf_Timer_initConfig(IfxStdIf_Timer_Config *config)
Definition: IfxStdIf_Timer.c:45
IfxStdIf_Timer_TrigConfig::isrPriority
Ifx_Priority isrPriority
Interrupt isrPriority of the trigger interrupt, if 0 the interrupt is disable.
Definition: IfxStdIf_Timer.h:263
IfxStdIf_Timer_CountDir_upAndDown
Timer is counting up and down.
Definition: IfxStdIf_Timer.h:88
IfxStdIf_Timer_setSingleMode
IFX_INLINE void IfxStdIf_Timer_setSingleMode(IfxStdIf_Timer *stdIf, boolean enabled)
Stop timer at the end of the period.
Definition: IfxStdIf_Timer.h:388
IfxStdIf_Timer_ackTriggerIrq
IFX_INLINE boolean IfxStdIf_Timer_ackTriggerIrq(IfxStdIf_Timer *stdIf)
Return the trigger interrupt flag and reset it.
Definition: IfxStdIf_Timer.h:424
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxStdIf_Timer_TrigConfig
Trigger configuration.
Definition: IfxStdIf_Timer.h:259
IfxStdIf_Timer_::disableUpdate
IfxStdIf_Timer_DisableUpdate disableUpdate
Definition: IfxStdIf_Timer.h:247
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxStdIf_Timer_Output_enabled
In case the trigger is enabled, the output is set to active between time 0 to the trigger point...
Definition: IfxStdIf_Timer.h:74
IfxStdIf_Timer_applyUpdate
IFX_INLINE void IfxStdIf_Timer_applyUpdate(IfxStdIf_Timer *stdIf)
Apply requested updates.
Definition: IfxStdIf_Timer.h:343
IfxStdIf_Timer_GetInputFrequency
float32(* IfxStdIf_Timer_GetInputFrequency)(IfxStdIf_InterfaceDriver stdIf)
Return the timer input frequency in Hz.
Definition: IfxStdIf_Timer.h:175
IfxStdIf_Timer_SetTrigger
void(* IfxStdIf_Timer_SetTrigger)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue triggerPoint)
Set trigger point.
Definition: IfxStdIf_Timer.h:215
IfxStdIf_Timer_Config::countDir
IfxStdIf_Timer_CountDir countDir
Timer counting mode.
Definition: IfxStdIf_Timer.h:279
IfxStdIf_Timer_TrigConfig::risingEdgeAtPeriod
boolean risingEdgeAtPeriod
Set the clock signal polarity, if TRUE, the rising edge is at the period, else at the trigger offset...
Definition: IfxStdIf_Timer.h:267
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxStdIf_Timer_CountDir_up
Timer is counting up.
Definition: IfxStdIf_Timer.h:87
IfxStdIf_Timer_::getInputFrequency
IfxStdIf_Timer_GetInputFrequency getInputFrequency
Definition: IfxStdIf_Timer.h:248
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:151
IfxStdIf_Timer_CountDir
IfxStdIf_Timer_CountDir
Timer increment direction.
Definition: IfxStdIf_Timer.h:85
IfxStdIf_Timer_CountDir_down
Timer is counting down.
Definition: IfxStdIf_Timer.h:89
IfxStdIf_Timer_setPeriod
IFX_INLINE boolean IfxStdIf_Timer_setPeriod(IfxStdIf_Timer *stdIf, Ifx_TimerValue period)
Set the timer period.
Definition: IfxStdIf_Timer.h:379
boolean
unsigned char boolean
Definition: Platform_Types.h:104
IfxStdIf_Timer_TrigConfig::triggerPoint
Ifx_TimerValue triggerPoint
Trigger point in timer ticks.
Definition: IfxStdIf_Timer.h:262
IfxStdIf_Timer_getTrigger
IFX_INLINE Ifx_TimerValue IfxStdIf_Timer_getTrigger(IfxStdIf_Timer *stdIf)
Return the timer trigger point.
Definition: IfxStdIf_Timer.h:307
IfxStdIf_Timer_::setTrigger
IfxStdIf_Timer_SetTrigger setTrigger
Definition: IfxStdIf_Timer.h:252
IfxStdIf_Timer_::setFrequency
IfxStdIf_Timer_SetFrequency setFrequency
Definition: IfxStdIf_Timer.h:244
IfxStdIf_Timer_getResolution
IFX_INLINE float32 IfxStdIf_Timer_getResolution(IfxStdIf_Timer *stdIf)
Return the timer resolution in seconds.
Definition: IfxStdIf_Timer.h:316
IfxStdIf_Timer_::run
IfxStdIf_Timer_Run run
Definition: IfxStdIf_Timer.h:249
IfxStdIf_Timer_::updateInputFrequency
IfxStdIf_Timer_UpdateInputFrequency updateInputFrequency
Definition: IfxStdIf_Timer.h:245
IfxStdIf_Timer_ackTimerIrq
IFX_INLINE boolean IfxStdIf_Timer_ackTimerIrq(IfxStdIf_Timer *stdIf)
Return the timer interrupt flag and reset it.
Definition: IfxStdIf_Timer.h:415
IfxStdIf_Timer_GetPeriod
Ifx_TimerValue(* IfxStdIf_Timer_GetPeriod)(IfxStdIf_InterfaceDriver stdIf)
Return the timer period in ticks.
Definition: IfxStdIf_Timer.h:105
IfxStdIf_Timer_DisableUpdate
void(* IfxStdIf_Timer_DisableUpdate)(IfxStdIf_InterfaceDriver stdIf)
Disable updates.
Definition: IfxStdIf_Timer.h:169
IfxStdIf_Timer_::setPeriod
IfxStdIf_Timer_SetPeriod setPeriod
Definition: IfxStdIf_Timer.h:250
IfxStdIf_Timer_disableUpdate
IFX_INLINE void IfxStdIf_Timer_disableUpdate(IfxStdIf_Timer *stdIf)
Disable updates.
Definition: IfxStdIf_Timer.h:352
IfxStdIf_Timer_::ackTriggerIrq
IfxStdIf_Timer_AckTriggerIrq ackTriggerIrq
Definition: IfxStdIf_Timer.h:255
IfxStdIf_Timer_Config::frequency
float32 frequency
PWM frequency in Hz. This parameter is only used to initialise the timer structure. An additional cell is required to build the timer.
Definition: IfxStdIf_Timer.h:274
IfxStdIf_Timer_ApplyUpdate
void(* IfxStdIf_Timer_ApplyUpdate)(IfxStdIf_InterfaceDriver stdIf)
Apply requested updates.
Definition: IfxStdIf_Timer.h:152
IfxStdIf_Timer_getFrequency
IFX_INLINE float32 IfxStdIf_Timer_getFrequency(IfxStdIf_Timer *stdIf)
Return the timer frequency in Hz.
Definition: IfxStdIf_Timer.h:289
IfxStdIf_Timer_Run
void(* IfxStdIf_Timer_Run)(IfxStdIf_InterfaceDriver stdIf)
Immediately start the timer.
Definition: IfxStdIf_Timer.h:184
IfxStdIf_Timer_::getResolution
IfxStdIf_Timer_GetResolution getResolution
Definition: IfxStdIf_Timer.h:242
IfxStdIf_Timer_Config::trigger
IfxStdIf_Timer_TrigConfig trigger
Trigger configuration.
Definition: IfxStdIf_Timer.h:278
IfxStdIf_Timer_getPeriodSecond
IFX_INLINE float32 IfxStdIf_Timer_getPeriodSecond(IfxStdIf_Timer *stdIf)
Return the timer period in second.
Definition: IfxStdIf_Timer.h:455
IfxStdIf_Timer_Config::startOffset
float32 startOffset
FIXME make startOffset as Ifx_TimerValue. Timer initial offset in % of the period.
Definition: IfxStdIf_Timer.h:280
IfxStdIf_Timer_Stop
void(* IfxStdIf_Timer_Stop)(IfxStdIf_InterfaceDriver stdIf)
Immediately stops the timer.
Definition: IfxStdIf_Timer.h:221
IfxStdIf_Timer_::applyUpdate
IfxStdIf_Timer_ApplyUpdate applyUpdate
Definition: IfxStdIf_Timer.h:246
IfxStdIf_Timer_AckTimerIrq
boolean(* IfxStdIf_Timer_AckTimerIrq)(IfxStdIf_InterfaceDriver stdIf)
Return the timer interrupt flag and reset it.
Definition: IfxStdIf_Timer.h:227
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
IfxStdIf_Timer_TrigConfig::enabled
boolean enabled
If true, the trigger functionality is Initialised, else ignored.
Definition: IfxStdIf_Timer.h:261
IfxStdIf_Timer_TrigConfig::outputEnabled
boolean outputEnabled
If TRUE, the output pin is enabled, else disabled. In case the output is disabled, the output pin is not initialized.
Definition: IfxStdIf_Timer.h:268
IfxStdIf_Timer_SetPeriod
boolean(* IfxStdIf_Timer_SetPeriod)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue period)
Set the timer period.
Definition: IfxStdIf_Timer.h:194
IfxStdIf_Timer_Config::minResolution
float32 minResolution
Minimum resolution of the timer in seconds. if 0, this parameter is ignored. If the configuration doe...
Definition: IfxStdIf_Timer.h:277
IfxStdIf_Timer_setFrequency
IFX_INLINE boolean IfxStdIf_Timer_setFrequency(IfxStdIf_Timer *stdIf, float32 frequency)
Set the timer frequency in Hz.
Definition: IfxStdIf_Timer.h:325
IfxStdIf_Timer_TrigConfig::outputMode
IfxPort_OutputMode outputMode
Output mode.
Definition: IfxStdIf_Timer.h:265
IfxStdIf_Timer_::ackTimerIrq
IfxStdIf_Timer_AckTimerIrq ackTimerIrq
Definition: IfxStdIf_Timer.h:254
IfxStdIf_Timer_SetSingleMode
void(* IfxStdIf_Timer_SetSingleMode)(IfxStdIf_InterfaceDriver stdIf, boolean enabled)
Stop timer at the end of the period.
Definition: IfxStdIf_Timer.h:203
IfxStdIf_Timer_::getPeriod
IfxStdIf_Timer_GetPeriod getPeriod
Definition: IfxStdIf_Timer.h:241
IfxPort.h
PORT basic functionality.


iLLD_TC38A: IfxStm.c Source File

  • Stm
  • Std
IfxStm.c
Go to the documentation of this file.
1 /**
2 * \file IfxStm.c
3 * \brief STM basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxStm.h"
47
48 /******************************************************************************/
49 /*-------------------------Function Implementations---------------------------*/
50 /******************************************************************************/
51
52 void IfxStm_clearCompareFlag(Ifx_STM *stm, IfxStm_Comparator comparator)
53 {
54 if (comparator == IfxStm_Comparator_0)
55 {
56 stm->ISCR.B.CMP0IRR = 1U;
57 }
58 else if (comparator == IfxStm_Comparator_1)
59 {
60 stm->ISCR.B.CMP1IRR = 1U;
61 }
62 }
63
64
65 void IfxStm_disableComparatorInterrupt(Ifx_STM *stm, IfxStm_Comparator comparator)
66 {
67 if (comparator == IfxStm_Comparator_0)
68 {
69 stm->ICR.B.CMP0EN = 0U;
70 }
71 else // if (comparator == IfxStm_Comparator_1)
72 {
73 stm->ICR.B.CMP1EN = 0U;
74 }
75 }
76
77
78 void IfxStm_disableModule(Ifx_STM *stm)
79 {
80 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
81
82 IfxScuWdt_clearCpuEndinit(passwd);
83 stm->CLC.B.DISR = 1;
84 IfxScuWdt_setCpuEndinit(passwd);
85 }
86
87
88 void IfxStm_enableComparatorInterrupt(Ifx_STM *stm, IfxStm_Comparator comparator)
89 {
90 if (comparator == IfxStm_Comparator_0)
91 {
92 stm->ICR.B.CMP0EN = 1U;
93 }
94 else if (comparator == IfxStm_Comparator_1)
95 {
96 stm->ICR.B.CMP1EN = 1U;
97 }
98 }
99
100
101 void IfxStm_enableOcdsSuspend(Ifx_STM *stm)
102 {
103 Ifx_STM_OCS ocs = stm->OCS;
104
105 /* Only if OCDS is enabled write into the OCS register */
106 if (MODULE_CBS.OSTATE.B.OEN == 1U)
107 {
108 ocs.B.SUS_P = 1;
109 ocs.B.SUS = 2;
110 stm->OCS = ocs;
111 stm->OCS.B.SUS_P = 0;
112 }
113 }
114
115
116 Ifx_STM *IfxStm_getAddress(IfxStm_Index stm)
117 {
118 Ifx_STM *module;
119
120 if (stm < IFXSTM_NUM_MODULES)
121 {
122 module = (Ifx_STM *)IfxStm_cfg_indexMap[stm].module;
123 }
124 else
125 {
126 module = NULL_PTR;
127 }
128
129 return module;
130 }
131
132
133 IfxStm_Index IfxStm_getIndex(Ifx_STM *stm)
134 {
135 uint32 index;
136 IfxStm_Index result;
137
138 result = IfxStm_Index_none;
139
140 for (index = 0; index < IFXSTM_NUM_MODULES; index++)
141 {
142 if (IfxStm_cfg_indexMap[index].module == stm)
143 {
144 result = (IfxStm_Index)IfxStm_cfg_indexMap[index].index;
145 break;
146 }
147 }
148
149 return result;
150 }
151
152
153 volatile Ifx_SRC_SRCR *IfxStm_getSrcPointer(Ifx_STM *stm, IfxStm_Comparator comparator)
154 {
155 IfxStm_Index index;
156 index = IfxStm_getIndex(stm);
157 return comparator == IfxStm_Comparator_0 ? &MODULE_SRC.STM.STM[index].SR[0] : &MODULE_SRC.STM.STM[index].SR[1];
158 }
159
160
161 boolean IfxStm_initCompare(Ifx_STM *stm, const IfxStm_CompareConfig *config)
162 {
163 sint32 index;
164 boolean result;
165 Ifx_STM_CMCON comcon = stm->CMCON;
166 Ifx_STM_ICR icr = stm->ICR;
167
168 if (config->comparator == 0)
169 {
170 comcon.B.MSIZE0 = config->compareSize;
171 comcon.B.MSTART0 = config->compareOffset;
172 icr.B.CMP0OS = config->comparatorInterrupt;
173 result = TRUE;
174 }
175 else if (config->comparator == 1)
176 {
177 comcon.B.MSIZE1 = config->compareSize;
178 comcon.B.MSTART1 = config->compareOffset;
179 icr.B.CMP1OS = config->comparatorInterrupt;
180 result = TRUE;
181 }
182 else
183 {
184 /*Invalid value */
185 result = FALSE;
186 }
187
188 stm->ICR.U = icr.U;
189 stm->CMCON.U = comcon.U;
190
191 /* configure interrupt */
192 index = IfxStm_getIndex(stm);
193
194 if (config->triggerPriority > 0)
195 {
196 volatile Ifx_SRC_SRCR *srcr;
197
198 if (config->comparatorInterrupt == IfxStm_ComparatorInterrupt_ir0)
199 {
200 srcr = &(MODULE_SRC.STM.STM[index].SR[0]);
201 }
202 else
203 {
204 srcr = &(MODULE_SRC.STM.STM[index].SR[1]);
205 }
206
207 IfxSrc_init(srcr, config->typeOfService, config->triggerPriority);
208 IfxSrc_enable(srcr);
209 }
210
211 /*Configure the comparator ticks to current value to avoid any wrong triggering*/
212 stm->CMP[config->comparator].U = IfxStm_getOffsetTimer(stm, (uint8)config->compareOffset);
213
214 /* clear the interrupt flag of the selected comparator before enabling the interrupt */
215 /* this is to avaoid the unneccesary interrupt for the compare match of reset values of the registers */
216 IfxStm_clearCompareFlag(stm, config->comparator);
217 /* enable the interrupt for the selected comparator */
218 IfxStm_enableComparatorInterrupt(stm, config->comparator);
219
220 /*Configure the comparator ticks */
221 stm->CMP[config->comparator].U = IfxStm_getOffsetTimer(stm, (uint8)config->compareOffset) + config->ticks;
222
223 return result;
224 }
225
226
227 void IfxStm_initCompareConfig(IfxStm_CompareConfig *config)
228 {
229 config->comparator = IfxStm_Comparator_0;
230 config->compareOffset = IfxStm_ComparatorOffset_0;
231 config->compareSize = IfxStm_ComparatorSize_32Bits;
232 config->comparatorInterrupt = IfxStm_ComparatorInterrupt_ir0; /*User must select the interrupt output */
233 config->ticks = 0xFFFFFFFF;
234 config->triggerPriority = 0;
235 config->typeOfService = IfxSrc_Tos_cpu0;
236 }
237
238
239 boolean IfxStm_isCompareFlagSet(Ifx_STM *stm, IfxStm_Comparator comparator)
240 {
241 if (comparator == IfxStm_Comparator_0)
242 {
243 return stm->ICR.B.CMP0IR;
244 }
245 else // if (comparator == IfxStm_Comparator_1)
246 {
247 return stm->ICR.B.CMP1IR;
248 }
249 }
250
251
252 void IfxStm_resetModule(Ifx_STM *stm)
253 {
254 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
255
256 IfxScuWdt_clearCpuEndinit(passwd);
257 stm->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
258 stm->KRST1.B.RST = 1;
259 IfxScuWdt_setCpuEndinit(passwd);
260
261 while (0 == stm->KRST0.B.RSTSTAT) /* Wait until reset is executed */
262
263 {}
264
265 IfxScuWdt_clearCpuEndinit(passwd);
266 stm->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
267
268 IfxScuWdt_setCpuEndinit(passwd);
269 }
270
271
272 void IfxStm_setCompareControl(Ifx_STM *stm, IfxStm_Comparator comparator, IfxStm_ComparatorOffset offset, IfxStm_ComparatorSize size, IfxStm_ComparatorInterrupt interrupt)
273 {
274 Ifx_STM_CMCON comcon = stm->CMCON;
275 Ifx_STM_ICR icr = stm->ICR;
276
277 if (comparator == 0)
278 {
279 comcon.B.MSIZE0 = size;
280 comcon.B.MSTART0 = offset;
281 icr.B.CMP0OS = interrupt;
282 }
283 else // if (comparator == 1)
284 {
285 comcon.B.MSIZE1 = size;
286 comcon.B.MSTART1 = offset;
287 icr.B.CMP1OS = interrupt;
288 }
289
290 stm->ICR.U = icr.U;
291 stm->CMCON.U = comcon.U;
292 }
IfxStm_ComparatorSize
IfxStm_ComparatorSize
Size of compare value to compare with timer defined in MODULE_STMx.CMCON.B.MSIZE0(x = 0...
Definition: IfxStm.h:211
IfxStm.h
STM basic functionality.
IfxStm_Comparator_1
Comparator Id 1.
Definition: IfxStm.h:160
IfxStm_CompareConfig::compareOffset
IfxStm_ComparatorOffset compareOffset
Comparator start bit position defined in MODULE_STMx.CMCON.B.MSTART0(x = 0,1,2).
Definition: IfxStm.h:279
IfxStm_isCompareFlagSet
boolean IfxStm_isCompareFlagSet(Ifx_STM *stm, IfxStm_Comparator comparator)
Indicates if the compare interrupt flag is set.
Definition: IfxStm.c:239
IfxStm_enableOcdsSuspend
void IfxStm_enableOcdsSuspend(Ifx_STM *stm)
enable suspend by debugger. Note: The API will write into the OCS register only if OCDS is enabled ...
Definition: IfxStm.c:101
IfxStm_Index
IfxStm_Index
List of the available STM resources.
Definition: IfxStm_cfg.h:84
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxStm_Comparator
IfxStm_Comparator
Comparator Id defined in MODULE_STMx.ISCR.B.CMP0IRR(x = 0, 1, 2)
Definition: IfxStm.h:157
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
IfxStm_getAddress
Ifx_STM * IfxStm_getAddress(IfxStm_Index stm)
Returns the module index of the selected STM module.
Definition: IfxStm.c:116
IfxStm_getOffsetTimer
IFX_INLINE uint32 IfxStm_getOffsetTimer(Ifx_STM *stm, uint8 offset)
Returns the timer value shifted right by offset.
Definition: IfxStm.h:646
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxStm_initCompareConfig
void IfxStm_initCompareConfig(IfxStm_CompareConfig *config)
Initialise compare configuration with default values.
Definition: IfxStm.c:227
IfxStm_CompareConfig::triggerPriority
Ifx_Priority triggerPriority
Interrupt priority. Range = 0 .. 255. 0 = interrupt is disabled.
Definition: IfxStm.h:282
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IFXSTM_NUM_MODULES
#define IFXSTM_NUM_MODULES
STM count.
Definition: IfxStm_cfg.h:70
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxStm_ComparatorInterrupt_ir0
Select STMIR0.
Definition: IfxStm.h:167
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxStm_CompareConfig::ticks
uint32 ticks
count for next comparison from current timer count.
Definition: IfxStm.h:281
IfxStm_disableModule
void IfxStm_disableModule(Ifx_STM *stm)
Disables the Stm module.
Definition: IfxStm.c:78
IfxStm_ComparatorSize_32Bits
Size of compare value to compare with timer: 32 bits.
Definition: IfxStm.h:244
IfxStm_CompareConfig::comparatorInterrupt
IfxStm_ComparatorInterrupt comparatorInterrupt
Comparator Interrupt request source defined in MODULE_SRC.STM.STM[index].SRx (x =0, 1).
Definition: IfxStm.h:278
IfxStm_CompareConfig
Comparator Configuration Structure.
Definition: IfxStm.h:275
IfxStm_initCompare
boolean IfxStm_initCompare(Ifx_STM *stm, const IfxStm_CompareConfig *config)
Initialise stm compare register.
Definition: IfxStm.c:161
IfxStm_getIndex
IfxStm_Index IfxStm_getIndex(Ifx_STM *stm)
API to get the resource index of the STM specified.
Definition: IfxStm.c:133
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:68
IfxStm_setCompareControl
void IfxStm_setCompareControl(Ifx_STM *stm, IfxStm_Comparator comparator, IfxStm_ComparatorOffset offset, IfxStm_ComparatorSize size, IfxStm_ComparatorInterrupt interrupt)
Set the compare behavior.
Definition: IfxStm.c:272
IfxStm_ComparatorOffset_0
Comparator start bit position 0 with 64 bit timer.
Definition: IfxStm.h:175
IfxStm_Comparator_0
Comparator Id 0.
Definition: IfxStm.h:159
IfxStm_getSrcPointer
volatile Ifx_SRC_SRCR * IfxStm_getSrcPointer(Ifx_STM *stm, IfxStm_Comparator comparator)
get the interrupt source pointer for the comparator.
Definition: IfxStm.c:153
IfxStm_clearCompareFlag
void IfxStm_clearCompareFlag(Ifx_STM *stm, IfxStm_Comparator comparator)
Clear the compare interrupt flag.
Definition: IfxStm.c:52
IfxStm_ComparatorOffset
IfxStm_ComparatorOffset
Comparator start bit position defined in MODULE_STMx.CMCON.B.MSTART0(x = 0,1,2)
Definition: IfxStm.h:173
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxStm_CompareConfig::typeOfService
IfxSrc_Tos typeOfService
Type of service.
Definition: IfxStm.h:283
IfxStm_enableComparatorInterrupt
void IfxStm_enableComparatorInterrupt(Ifx_STM *stm, IfxStm_Comparator comparator)
Enables the compare interrupt .
Definition: IfxStm.c:88
sint32
long sint32
Definition: Platform_Types.h:134
IfxStm_resetModule
void IfxStm_resetModule(Ifx_STM *stm)
Definition: IfxStm.c:252
IfxStm_ComparatorInterrupt
IfxStm_ComparatorInterrupt
Comparator Interrupt request source defined in MODULE_SRC.STM.STM[index].SRx (x =0, 1)
Definition: IfxStm.h:165
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxStm_Index_none
Not Selected.
Definition: IfxStm_cfg.h:86
IfxStm_CompareConfig::compareSize
IfxStm_ComparatorSize compareSize
Size of compare value to compare with timer defined in MODULE_STMx.CMCON.B.MSIZE0(x = 0...
Definition: IfxStm.h:280
TRUE
#define TRUE
Definition: Platform_Types.h:90
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxStm_disableComparatorInterrupt
void IfxStm_disableComparatorInterrupt(Ifx_STM *stm, IfxStm_Comparator comparator)
Disables the compare interrupt.
Definition: IfxStm.c:65
IfxStm_CompareConfig::comparator
IfxStm_Comparator comparator
Comparator Id defined in MODULE_STMx.ISCR.B.CMP0IRR(x = 0, 1, 2).
Definition: IfxStm.h:277
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxStm_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxStm_cfg_indexMap[IFXSTM_NUM_MODULES]
Definition: IfxStm_cfg.c:52


iLLD_TC38A: IfxStm.h Source File

  • Stm
  • Std
IfxStm.h
Go to the documentation of this file.
1 /**
2 * \file IfxStm.h
3 * \brief STM basic functionality
4 * \ingroup IfxLld_Stm
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Stm_Usage How to use the Stm driver?
42 * \ingroup IfxLld_Stm
43 *
44 * The Stm Standard driver provides APIs to initialize, configure and control the Stm.
45 *
46 * In the following sections it will be described, how to integrate the driver into the application framework.
47 *
48 * \section IfxLld_Stm_Preparation Preparation
49 * \subsection IfxLld_Stm_Include Include Files
50 *
51 * Include following header file into your C code:
52 * \code
53 * #include <Stm/Std/IfxStm.h>
54 * \endcode
55 *
56 * \subsection IfxLld_Stm_Variables Variables
57 *
58 * Declare STM variables :
59 * \code
60 * Ifx_STM *stmSfr;
61 * IfxStm_CompareConfig stmConfig;
62 * \endcode
63 *
64 * \subsection IfxLld_Stm_Interrupt Interrupt Handler Installation
65 *
66 * See also \ref IfxLld_Cpu_Irq_Usage
67 *
68 * Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:
69 * \code
70 * // priorities are normally defined in Ifx_IntPrioDef.h
71 * #define IFX_INTPRIO_STM0_SR0 10
72 * \endcode
73 *
74 * Add the interrupt service routines to your C code. They have to call the Stm interrupt handlers:
75 * please take care in choosing number of ticks, the below example code will raise an interrupt
76 * evry time the specified number of ticks have been elapsed.
77 * \code
78 * IFX_INTERRUPT(stm0Sr0ISR, 0, IFX_INTPRIO_STM0_SR0)
79 * {
80 * IfxStm_clearCompareFlag(stmSfr, stmConfig.comparator);
81 * IfxStm_increaseCompare(stmSfr, stmConfig.comparator, stmConfig.ticks);
82 * }
83 * \endcode
84 *
85 * Finally install the interrupt handlers in your initialisation function:
86 * \code
87 * // install interrupt handlers
88 * IfxCpu_Irq_installInterruptHandler(&stm0Sr0ISR, IFX_INTPRIO_STM0_SR0);
89 * IfxCpu_enableInterrupts();
90 * \endcode
91 *
92 * \subsection IfxLld_Stm_Init Module Initialisation
93 *
94 * The STM module can be configured to generate an interrupt at every compare match of the selected comaparator with the desired compare value, the interrupt can further be routed to other comparator.
95 *
96 * The module initialisation can be done as followed.
97 *
98 * \code
99 * stmSfr = &MODULE_STM0;
100 *
101 * IfxStm_initCompareConfig(&stmConfig);
102 *
103 * // configure to generate interrupt every 10 us
104 * sint32 ticks = IfxStm_getTicksFromMicroseconds(10);
105 *
106 * stmConfig.ticks = ticks;
107 *
108 * stmConfig.triggerPriority = IFX_INTPRIO_STM0_SR0;
109 * stmConfig.typeOfService = IfxSrc_Tos_cpu0;
110 *
111 * IfxStm_initCompare(stmSfr, &stmConfig);
112 *
113 * \endcode
114 *
115 * Now the Stm shall generate interrupts regularly based on the configured time !
116 *
117 * \defgroup IfxLld_Stm_Std_Enumerations Enumerations
118 * \ingroup IfxLld_Stm_Std
119 * \defgroup IfxLld_Stm_Std_Structures Data Structures
120 * \ingroup IfxLld_Stm_Std
121 * \defgroup IfxLld_Stm_Std_Module Module Functions
122 * \ingroup IfxLld_Stm_Std
123 * \defgroup IfxLld_Stm_Std_Timer Timer Functions
124 * \ingroup IfxLld_Stm_Std
125 * \defgroup IfxLld_Stm_Std_Comparator Comparator Functions
126 * \ingroup IfxLld_Stm_Std
127 */
128
129 #ifndef IFXSTM_H
130 #define IFXSTM_H 1
131
132 /******************************************************************************/
133 /*----------------------------------Includes----------------------------------*/
134 /******************************************************************************/
135
136 #include "_Impl/IfxStm_cfg.h"
137 #include "Scu/Std/IfxScuCcu.h"
138 #include "Src/Std/IfxSrc.h"
139 #include "IfxCbs_reg.h"
140
141 /******************************************************************************/
142 /*-----------------------------------Macros-----------------------------------*/
143 /******************************************************************************/
144
145 #ifndef IFXSTM_DEFAULT_TIMER
146 #define IFXSTM_DEFAULT_TIMER (&MODULE_STM0)
147 #endif
148
149 /******************************************************************************/
150 /*--------------------------------Enumerations--------------------------------*/
151 /******************************************************************************/
152
153 /** \addtogroup IfxLld_Stm_Std_Enumerations
154 * \{ */
155 /** \brief Comparator Id defined in MODULE_STMx.ISCR.B.CMP0IRR(x = 0, 1, 2)
156 */
157 typedef enum
158 {
159 IfxStm_Comparator_0 = 0, /**< \brief Comparator Id 0 */
160 IfxStm_Comparator_1 /**< \brief Comparator Id 1 */
161 } IfxStm_Comparator;
162
163 /** \brief Comparator Interrupt request source defined in MODULE_SRC.STM.STM[index].SRx (x =0, 1)
164 */
165 typedef enum
166 {
167 IfxStm_ComparatorInterrupt_ir0 = 0, /**< \brief Select STMIR0 */
168 IfxStm_ComparatorInterrupt_ir1 = 1 /**< \brief Select STMIR1 */
169 } IfxStm_ComparatorInterrupt;
170
171 /** \brief Comparator start bit position defined in MODULE_STMx.CMCON.B.MSTART0(x = 0,1,2)
172 */
173 typedef enum
174 {
175 IfxStm_ComparatorOffset_0 = 0, /**< \brief Comparator start bit position 0 with 64 bit timer */
176 IfxStm_ComparatorOffset_1, /**< \brief Comparator start bit position 1 with 64 bit timer */
177 IfxStm_ComparatorOffset_2, /**< \brief Comparator start bit position 2 with 64 bit timer */
178 IfxStm_ComparatorOffset_3, /**< \brief Comparator start bit position 3 with 64 bit timer */
179 IfxStm_ComparatorOffset_4, /**< \brief Comparator start bit position 4 with 64 bit timer */
180 IfxStm_ComparatorOffset_5, /**< \brief Comparator start bit position 5 with 64 bit timer */
181 IfxStm_ComparatorOffset_6, /**< \brief Comparator start bit position 6 with 64 bit timer */
182 IfxStm_ComparatorOffset_7, /**< \brief Comparator start bit position 7 with 64 bit timer */
183 IfxStm_ComparatorOffset_8, /**< \brief Comparator start bit position 8 with 64 bit timer */
184 IfxStm_ComparatorOffset_9, /**< \brief Comparator start bit position 9 with 64 bit timer */
185 IfxStm_ComparatorOffset_10, /**< \brief Comparator start bit position 10 with 64 bit timer */
186 IfxStm_ComparatorOffset_11, /**< \brief Comparator start bit position 11 with 64 bit timer */
187 IfxStm_ComparatorOffset_12, /**< \brief Comparator start bit position 12 with 64 bit timer */
188 IfxStm_ComparatorOffset_13, /**< \brief Comparator start bit position 13 with 64 bit timer */
189 IfxStm_ComparatorOffset_14, /**< \brief Comparator start bit position 14 with 64 bit timer */
190 IfxStm_ComparatorOffset_15, /**< \brief Comparator start bit position 15 with 64 bit timer */
191 IfxStm_ComparatorOffset_16, /**< \brief Comparator start bit position 16 with 64 bit timer */
192 IfxStm_ComparatorOffset_17, /**< \brief Comparator start bit position 17 with 64 bit timer */
193 IfxStm_ComparatorOffset_18, /**< \brief Comparator start bit position 18 with 64 bit timer */
194 IfxStm_ComparatorOffset_19, /**< \brief Comparator start bit position 19 with 64 bit timer */
195 IfxStm_ComparatorOffset_20, /**< \brief Comparator start bit position 20 with 64 bit timer */
196 IfxStm_ComparatorOffset_21, /**< \brief Comparator start bit position 21 with 64 bit timer */
197 IfxStm_ComparatorOffset_22, /**< \brief Comparator start bit position 22 with 64 bit timer */
198 IfxStm_ComparatorOffset_23, /**< \brief Comparator start bit position 23 with 64 bit timer */
199 IfxStm_ComparatorOffset_24, /**< \brief Comparator start bit position 24 with 64 bit timer */
200 IfxStm_ComparatorOffset_25, /**< \brief Comparator start bit position 25 with 64 bit timer */
201 IfxStm_ComparatorOffset_26, /**< \brief Comparator start bit position 26 with 64 bit timer */
202 IfxStm_ComparatorOffset_27, /**< \brief Comparator start bit position 27 with 64 bit timer */
203 IfxStm_ComparatorOffset_28, /**< \brief Comparator start bit position 28 with 64 bit timer */
204 IfxStm_ComparatorOffset_29, /**< \brief Comparator start bit position 29 with 64 bit timer */
205 IfxStm_ComparatorOffset_30, /**< \brief Comparator start bit position 30 with 64 bit timer */
206 IfxStm_ComparatorOffset_31 /**< \brief Comparator start bit position 31 with 64 bit timer */
207 } IfxStm_ComparatorOffset;
208
209 /** \brief Size of compare value to compare with timer defined in MODULE_STMx.CMCON.B.MSIZE0(x = 0,1,2)
210 */
211 typedef enum
212 {
213 IfxStm_ComparatorSize_1Bit = 0, /**< \brief Size of compare value to compare with timer: 1 bit */
214 IfxStm_ComparatorSize_2Bits = 1, /**< \brief Size of compare value to compare with timer: 2 bits */
215 IfxStm_ComparatorSize_3Bits = 2, /**< \brief Size of compare value to compare with timer: 3 bits */
216 IfxStm_ComparatorSize_4Bits = 3, /**< \brief Size of compare value to compare with timer: 4 bits */
217 IfxStm_ComparatorSize_5Bits = 4, /**< \brief Size of compare value to compare with timer: 5 bits */
218 IfxStm_ComparatorSize_6Bits = 5, /**< \brief Size of compare value to compare with timer: 6 bits */
219 IfxStm_ComparatorSize_7Bits = 6, /**< \brief Size of compare value to compare with timer: 7 bits */
220 IfxStm_ComparatorSize_8Bits = 7, /**< \brief Size of compare value to compare with timer: 8 bits */
221 IfxStm_ComparatorSize_9Bits = 8, /**< \brief Size of compare value to compare with timer: 9 bits */
222 IfxStm_ComparatorSize_10Bits = 9, /**< \brief Size of compare value to compare with timer: 10 bits */
223 IfxStm_ComparatorSize_11Bits = 10, /**< \brief Size of compare value to compare with timer: 11 bits */
224 IfxStm_ComparatorSize_12Bits = 11, /**< \brief Size of compare value to compare with timer: 12 bits */
225 IfxStm_ComparatorSize_13Bits = 12, /**< \brief Size of compare value to compare with timer: 13 bits */
226 IfxStm_ComparatorSize_14Bits = 13, /**< \brief Size of compare value to compare with timer: 14 bits */
227 IfxStm_ComparatorSize_15Bits = 14, /**< \brief Size of compare value to compare with timer: 15 bits */
228 IfxStm_ComparatorSize_16Bits = 15, /**< \brief Size of compare value to compare with timer: 16 bits */
229 IfxStm_ComparatorSize_17Bits = 16, /**< \brief Size of compare value to compare with timer: 17 bits */
230 IfxStm_ComparatorSize_18Bits = 17, /**< \brief Size of compare value to compare with timer: 18 bits */
231 IfxStm_ComparatorSize_19Bits = 18, /**< \brief Size of compare value to compare with timer: 19 bits */
232 IfxStm_ComparatorSize_20Bits = 19, /**< \brief Size of compare value to compare with timer: 20 bits */
233 IfxStm_ComparatorSize_21Bits = 20, /**< \brief Size of compare value to compare with timer: 21 bits */
234 IfxStm_ComparatorSize_22Bits = 21, /**< \brief Size of compare value to compare with timer: 22 bits */
235 IfxStm_ComparatorSize_23Bits = 22, /**< \brief Size of compare value to compare with timer: 23 bits */
236 IfxStm_ComparatorSize_24Bits = 23, /**< \brief Size of compare value to compare with timer: 24 bits */
237 IfxStm_ComparatorSize_25Bits = 24, /**< \brief Size of compare value to compare with timer: 25 bits */
238 IfxStm_ComparatorSize_26Bits = 25, /**< \brief Size of compare value to compare with timer: 26 bits */
239 IfxStm_ComparatorSize_27Bits = 26, /**< \brief Size of compare value to compare with timer: 27 bits */
240 IfxStm_ComparatorSize_28Bits = 27, /**< \brief Size of compare value to compare with timer: 28 bits */
241 IfxStm_ComparatorSize_29Bits = 28, /**< \brief Size of compare value to compare with timer: 29 bits */
242 IfxStm_ComparatorSize_30Bits = 29, /**< \brief Size of compare value to compare with timer: 30 bits */
243 IfxStm_ComparatorSize_31Bits = 30, /**< \brief Size of compare value to compare with timer: 31 bits */
244 IfxStm_ComparatorSize_32Bits = 31 /**< \brief Size of compare value to compare with timer: 32 bits */
245 } IfxStm_ComparatorSize;
246
247 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
248 * Definition in Ifx_STM.CLC.B.EDIS
249 */
250 typedef enum
251 {
252 IfxStm_SleepMode_enable = 0, /**< \brief enables sleep mode */
253 IfxStm_SleepMode_disable = 1 /**< \brief disables sleep mode */
254 } IfxStm_SleepMode;
255
256 /** \brief OCDS Suspend Control (OCDS.SUS)
257 */
258 typedef enum
259 {
260 IfxStm_SuspendMode_none = 0, /**< \brief No suspend */
261 IfxStm_SuspendMode_hard = 1, /**< \brief Hard Suspend */
262 IfxStm_SuspendMode_soft = 2 /**< \brief Soft Suspend */
263 } IfxStm_SuspendMode;
264
265 /** \} */
266
267 /******************************************************************************/
268 /*-----------------------------Data Structures--------------------------------*/
269 /******************************************************************************/
270
271 /** \addtogroup IfxLld_Stm_Std_Structures
272 * \{ */
273 /** \brief Comparator Configuration Structure
274 */
275 typedef struct
276 {
277 IfxStm_Comparator comparator; /**< \brief Comparator Id defined in MODULE_STMx.ISCR.B.CMP0IRR(x = 0, 1, 2). */
278 IfxStm_ComparatorInterrupt comparatorInterrupt; /**< \brief Comparator Interrupt request source defined in MODULE_SRC.STM.STM[index].SRx (x =0, 1). */
279 IfxStm_ComparatorOffset compareOffset; /**< \brief Comparator start bit position defined in MODULE_STMx.CMCON.B.MSTART0(x = 0,1,2). */
280 IfxStm_ComparatorSize compareSize; /**< \brief Size of compare value to compare with timer defined in MODULE_STMx.CMCON.B.MSIZE0(x = 0,1,2). */
281 uint32 ticks; /**< \brief count for next comparison from current timer count. */
282 Ifx_Priority triggerPriority; /**< \brief Interrupt priority. Range = 0 .. 255. 0 = interrupt is disabled. */
283 IfxSrc_Tos typeOfService; /**< \brief Type of service. */
284 } IfxStm_CompareConfig;
285
286 /** \} */
287
288 /** \addtogroup IfxLld_Stm_Std_Module
289 * \{ */
290
291 /******************************************************************************/
292 /*-------------------------Inline Function Prototypes-------------------------*/
293 /******************************************************************************/
294
295 /** \brief Returns system timer value.
296 * \param stm pointer to System timer module registers.
297 * \return system timer value.
298 */
299 IFX_INLINE uint64 IfxStm_get(Ifx_STM *stm);
300
301 /** \brief Returns the system timer frequency.
302 * \param stm pointer to System timer module registers.
303 * \return the system timer frequency in Hz.
304 */
305 IFX_INLINE float32 IfxStm_getFrequency(Ifx_STM *stm);
306
307 /** \brief Returns the module's suspend state.
308 * TRUE :if module is suspended.
309 * FALSE:if module is not yet suspended.
310 * \param stm Pointer to STM module registers
311 * \return Suspend status (TRUE / FALSE)
312 */
313 IFX_INLINE boolean IfxStm_isModuleSuspended(Ifx_STM *stm);
314
315 /** \brief Configure the Module to Hard/Soft suspend mode.
316 * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
317 * \param stm Pointer to STM module registers
318 * \param mode Module suspend mode
319 * \return None
320 */
321 IFX_INLINE void IfxStm_setSuspendMode(Ifx_STM *stm, IfxStm_SuspendMode mode);
322
323 /******************************************************************************/
324 /*-------------------------Global Function Prototypes-------------------------*/
325 /******************************************************************************/
326
327 /** \brief Disables the Stm module
328 * \param stm pointer to STM registers
329 * \return None
330 */
331 IFX_EXTERN void IfxStm_disableModule(Ifx_STM *stm);
332
333 /** \brief enable suspend by debugger.
334 * Note: The API will write into the OCS register only if OCDS is enabled
335 * \param stm pointer to System timer module registers.
336 * \return None
337 */
338 IFX_EXTERN void IfxStm_enableOcdsSuspend(Ifx_STM *stm);
339
340 /** \brief Returns the module index of the selected STM module
341 * \param stm Pointer to STM module registers
342 * \return STM module register address
343 */
344 IFX_EXTERN Ifx_STM *IfxStm_getAddress(IfxStm_Index stm);
345
346 /** \brief API to get the resource index of the STM specified.
347 * \param stm pointer to System timer module registers.
348 * \return system timer module index.
349 */
350 IFX_EXTERN IfxStm_Index IfxStm_getIndex(Ifx_STM *stm);
351
352 /** \} */
353
354 /** \addtogroup IfxLld_Stm_Std_Timer
355 * \{ */
356
357 /******************************************************************************/
358 /*-------------------------Inline Function Prototypes-------------------------*/
359 /******************************************************************************/
360
361 /** \brief Returns the lower system timer value.
362 * \param stm pointer to System timer module registers.
363 * \return the lower system timer value.
364 */
365 IFX_INLINE uint32 IfxStm_getLower(Ifx_STM *stm);
366
367 /** \brief Gets the TIM3 couter value.
368 * \param stm pointer to System timer module registers.
369 * \return TIM3 counter value.
370 */
371 IFX_INLINE uint32 IfxStm_getOffset12Timer(Ifx_STM *stm);
372
373 /** \brief Gets the TIM4 couter value.
374 * \param stm pointer to System timer module registers.
375 * \return TIM4 counter value.
376 */
377 IFX_INLINE uint32 IfxStm_getOffset16Timer(Ifx_STM *stm);
378
379 /** \brief Gets the TIM5 couter value.
380 * \param stm pointer to System timer module registers.
381 * \return TIM5 counter value.
382 */
383 IFX_INLINE uint32 IfxStm_getOffset20Timer(Ifx_STM *stm);
384
385 /** \brief Gets the TIM6 couter value.
386 * \param stm pointer to System timer module registers.
387 * \return TIM6 counter value.
388 */
389 IFX_INLINE uint32 IfxStm_getOffset32Timer(Ifx_STM *stm);
390
391 /** \brief Gets the TIM1 couter value.
392 * \param stm pointer to System timer module registers.
393 * \return TIM1 counter value.
394 */
395 IFX_INLINE uint32 IfxStm_getOffset4Timer(Ifx_STM *stm);
396
397 /** \brief Gets the TIM2 couter value.
398 * \param stm pointer to System timer module registers.
399 * \return TIM2 counter value.
400 */
401 IFX_INLINE uint32 IfxStm_getOffset8Timer(Ifx_STM *stm);
402
403 /** \brief Returns the timer value shifted right by offset.
404 * \param stm pointer to System timer module registers.
405 * \param offset offset value.
406 * \return the lower system timer value shifted by offset.
407 */
408 IFX_INLINE uint32 IfxStm_getOffsetTimer(Ifx_STM *stm, uint8 offset);
409
410 /** \brief Wait for requested time.
411 * The macro waits in while loop for the specified time in system timer ticks.
412 * \param stm pointer to System timer module registers.
413 * \param ticks ticks Wait time in system timer ticks.
414 * \return None
415 */
416 IFX_INLINE void IfxStm_waitTicks(Ifx_STM *stm, uint32 ticks);
417
418 /** \} */
419
420 /** \addtogroup IfxLld_Stm_Std_Comparator
421 * \{ */
422
423 /******************************************************************************/
424 /*-------------------------Inline Function Prototypes-------------------------*/
425 /******************************************************************************/
426
427 /** \brief Returns the updated compare register value.
428 * \param stm pointer to System timer module registers.
429 * \param comparator comparator selection comparator.
430 * \return The compare value
431 */
432 IFX_INLINE uint32 IfxStm_getCompare(Ifx_STM *stm, IfxStm_Comparator comparator);
433
434 /** \brief Returns the number of ticks for the selected micro seconds based on the STM frequency.
435 * \param stm pointer to System timer module registers.
436 * \param microSeconds Number of micro seconds that need to be converted to ticks
437 * \return ticks
438 */
439 IFX_INLINE sint32 IfxStm_getTicksFromMicroseconds(Ifx_STM *stm, uint32 microSeconds);
440
441 /** \brief Returns the number of ticks for the selected milli seconds based on the STM frequency.
442 * \param stm pointer to System timer module registers.
443 * \param milliSeconds Number of micro seconds that need to be converted to ticks
444 * \return ticks
445 */
446 IFX_INLINE sint32 IfxStm_getTicksFromMilliseconds(Ifx_STM *stm, uint32 milliSeconds);
447
448 /** \brief Update the compare register value increased with given ticks.
449 * \param stm pointer to System timer module registers.
450 * \param comparator comparator selection comparator.
451 * \param ticks count for next comparison from current timer count.
452 * \return None
453 */
454 IFX_INLINE void IfxStm_increaseCompare(Ifx_STM *stm, IfxStm_Comparator comparator, uint32 ticks);
455
456 /** \brief Update the compare register value.
457 * \param stm pointer to System timer module registers.
458 * \param comparator comparator selection comparator.
459 * \param ticks count for next comparison.
460 * \return None
461 */
462 IFX_INLINE void IfxStm_updateCompare(Ifx_STM *stm, IfxStm_Comparator comparator, uint32 ticks);
463
464 /******************************************************************************/
465 /*-------------------------Global Function Prototypes-------------------------*/
466 /******************************************************************************/
467
468 /** \brief Clear the compare interrupt flag.
469 * \param stm pointer to System timer module registers.
470 * \param comparator comparator selection comparator.
471 * \return None
472 */
473 IFX_EXTERN void IfxStm_clearCompareFlag(Ifx_STM *stm, IfxStm_Comparator comparator);
474
475 /** \brief Disables the compare interrupt
476 * \param stm pointer to System timer module registers.
477 * \param comparator comparator selection comparator.
478 * \return None
479 */
480 IFX_EXTERN void IfxStm_disableComparatorInterrupt(Ifx_STM *stm, IfxStm_Comparator comparator);
481
482 /** \brief Enables the compare interrupt .
483 * \param stm pointer to System timer module registers.
484 * \param comparator comparator selection comparator.
485 * \return None
486 */
487 IFX_EXTERN void IfxStm_enableComparatorInterrupt(Ifx_STM *stm, IfxStm_Comparator comparator);
488
489 /** \brief get the interrupt source pointer for the comparator.
490 * \param stm pointer to the STM registers
491 * \param comparator comparator selection comparator
492 * \return pointer to the interrupt source
493 */
494 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxStm_getSrcPointer(Ifx_STM *stm, IfxStm_Comparator comparator);
495
496 /** \brief Initialise stm compare register.
497 * \param stm pointer to System timer module registers.
498 * \param config pointer to configuration structure.
499 * \return TRUE if Comparator successful otherwise FLASE.
500 */
501 IFX_EXTERN boolean IfxStm_initCompare(Ifx_STM *stm, const IfxStm_CompareConfig *config);
502
503 /** \brief Initialise compare configuration with default values.
504 * \param config pointer to configuration structure.
505 * \return None
506 */
507 IFX_EXTERN void IfxStm_initCompareConfig(IfxStm_CompareConfig *config);
508
509 /** \brief Indicates if the compare interrupt flag is set.
510 * \param stm pointer to System timer module registers.
511 * \param comparator comparator selection comparator.
512 * \return TRUE if the comparator flag is set
513 */
514 IFX_EXTERN boolean IfxStm_isCompareFlagSet(Ifx_STM *stm, IfxStm_Comparator comparator);
515
516 /** \brief Set the compare behavior
517 * \param stm pointer to System timer module registers
518 * \param comparator comparator selection comparator
519 * \param offset Comparator start bit position
520 * \param size Size of compare value to compare with timer
521 * \param interrupt Comparator Interrupt request source defined
522 * \return None
523 */
524 IFX_EXTERN void IfxStm_setCompareControl(Ifx_STM *stm, IfxStm_Comparator comparator, IfxStm_ComparatorOffset offset, IfxStm_ComparatorSize size, IfxStm_ComparatorInterrupt interrupt);
525
526 /** \} */
527
528 /******************************************************************************/
529 /*-------------------------Inline Function Prototypes-------------------------*/
530 /******************************************************************************/
531
532 /**
533 * \param stm pointer STM registers
534 * \param mode mode selection (enable/ disable)
535 * \return None
536 */
537 IFX_INLINE void IfxStm_setSleepMode(Ifx_STM *stm, IfxStm_SleepMode mode);
538
539 /** \brief Returns the STM counter value
540 * \return Returns the STM counter value
541 */
542 IFX_INLINE sint64 IfxStm_now(void);
543
544 /** \brief Get the deadline value
545 * \param timeout timeout value
546 * \return Return the deadline
547 */
548 IFX_INLINE sint64 IfxStm_getDeadLine(sint64 timeout);
549
550 /** \brief Checked if deadline has occured
551 * \param deadLine Deadline value
552 * \return Return if deadline occured or not
553 */
554 IFX_INLINE boolean IfxStm_isDeadLine(sint64 deadLine);
555
556 /** \brief Waits for a specific time
557 * \param timeout timeout value
558 * \return None
559 */
560 IFX_INLINE void IfxStm_wait(sint64 timeout);
561
562 /******************************************************************************/
563 /*-------------------------Global Function Prototypes-------------------------*/
564 /******************************************************************************/
565
566 /**
567 * \param stm pointer to STM registers
568 * \return None
569 */
570 IFX_EXTERN void IfxStm_resetModule(Ifx_STM *stm);
571
572 /******************************************************************************/
573 /*---------------------Inline Function Implementations------------------------*/
574 /******************************************************************************/
575
576 IFX_INLINE uint64 IfxStm_get(Ifx_STM *stm)
577 {
578 uint64 result;
579
580 result = stm->TIM0.U;
581 result |= ((uint64)stm->CAP.U) << 32;
582
583 return result;
584 }
585
586
587 IFX_INLINE uint32 IfxStm_getCompare(Ifx_STM *stm, IfxStm_Comparator comparator)
588 {
589 return stm->CMP[comparator].B.CMPVAL;
590 }
591
592
593 IFX_INLINE float32 IfxStm_getFrequency(Ifx_STM *stm)
594 {
595 IFX_UNUSED_PARAMETER(stm);
596 float32 result;
597
598 result = IfxScuCcu_getStmFrequency();
599
600 return result;
601 }
602
603
604 IFX_INLINE uint32 IfxStm_getLower(Ifx_STM *stm)
605 {
606 return stm->TIM0.U;
607 }
608
609
610 IFX_INLINE uint32 IfxStm_getOffset12Timer(Ifx_STM *stm)
611 {
612 return stm->TIM3.U;
613 }
614
615
616 IFX_INLINE uint32 IfxStm_getOffset16Timer(Ifx_STM *stm)
617 {
618 return stm->TIM4.U;
619 }
620
621
622 IFX_INLINE uint32 IfxStm_getOffset20Timer(Ifx_STM *stm)
623 {
624 return stm->TIM5.U;
625 }
626
627
628 IFX_INLINE uint32 IfxStm_getOffset32Timer(Ifx_STM *stm)
629 {
630 return stm->TIM6.U;
631 }
632
633
634 IFX_INLINE uint32 IfxStm_getOffset4Timer(Ifx_STM *stm)
635 {
636 return stm->TIM1.U;
637 }
638
639
640 IFX_INLINE uint32 IfxStm_getOffset8Timer(Ifx_STM *stm)
641 {
642 return stm->TIM2.U;
643 }
644
645
646 IFX_INLINE uint32 IfxStm_getOffsetTimer(Ifx_STM *stm, uint8 offset)
647 {
648 uint64 now;
649
650 now = IfxStm_get(stm);
651
652 return (uint32)(now >> offset);
653 }
654
655
656 IFX_INLINE sint32 IfxStm_getTicksFromMicroseconds(Ifx_STM *stm, uint32 microSeconds)
657 {
658 sint32 freq = (sint32)IfxStm_getFrequency(stm);
659 return (freq / (1000000)) * microSeconds;
660 }
661
662
663 IFX_INLINE sint32 IfxStm_getTicksFromMilliseconds(Ifx_STM *stm, uint32 milliSeconds)
664 {
665 sint32 freq = (sint32)IfxStm_getFrequency(stm);
666 return (freq / (1000)) * milliSeconds;
667 }
668
669
670 IFX_INLINE void IfxStm_increaseCompare(Ifx_STM *stm, IfxStm_Comparator comparator, uint32 ticks)
671 {
672 stm->CMP[comparator].B.CMPVAL = stm->CMP[comparator].B.CMPVAL + ticks;
673 }
674
675
676 IFX_INLINE boolean IfxStm_isModuleSuspended(Ifx_STM *stm)
677 {
678 Ifx_STM_OCS ocs;
679
680 // read the status
681 ocs.U = stm->OCS.U;
682
683 // return the status
684 return ocs.B.SUSSTA;
685 }
686
687
688 IFX_INLINE void IfxStm_setSleepMode(Ifx_STM *stm, IfxStm_SleepMode mode)
689 {
690 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
691 IfxScuWdt_clearCpuEndinit(passwd);
692 stm->CLC.B.EDIS = mode;
693 IfxScuWdt_setCpuEndinit(passwd);
694 }
695
696
697 IFX_INLINE void IfxStm_setSuspendMode(Ifx_STM *stm, IfxStm_SuspendMode mode)
698 {
699 Ifx_STM_OCS ocs;
700
701 /* Only if OCDS is enabled write into the OCS register */
702 if (MODULE_CBS.OSTATE.B.OEN == 1U)
703 {
704 // remove protection and configure the suspend mode.
705 ocs.B.SUS_P = 1;
706 ocs.B.SUS = mode;
707 stm->OCS.U = ocs.U;
708 stm->OCS.B.SUS_P = 0;
709 }
710 }
711
712
713 IFX_INLINE void IfxStm_updateCompare(Ifx_STM *stm, IfxStm_Comparator comparator, uint32 ticks)
714 {
715 stm->CMP[comparator].B.CMPVAL = ticks;
716 }
717
718
719 IFX_INLINE void IfxStm_waitTicks(Ifx_STM *stm, uint32 ticks)
720 {
721 uint32 beginTime;
722
723 beginTime = IfxStm_getLower(stm);
724
725 /*below code will work because of unsigned 32 bit calculation even at timer wrapping condition
726 * As an example if beginTime = 0xFFFFFFFE and current time = 2 (after overflow), unsigned calculation
727 * 2 - 0xFFFFFFFE will be 4*/
728 while ((IfxStm_getLower(stm) - beginTime) < ticks)
729 {}
730 }
731
732
733 IFX_INLINE sint64 IfxStm_now(void)
734 {
735 sint64 stmNow;
736 boolean interruptState;
737
738 interruptState = IfxCpu_disableInterrupts();
739 stmNow = (Ifx_TickTime)IfxStm_get(IFXSTM_DEFAULT_TIMER) & TIME_INFINITE;
740 IfxCpu_restoreInterrupts(interruptState);
741
742 return stmNow;
743 }
744
745
746 IFX_INLINE sint64 IfxStm_getDeadLine(sint64 timeout)
747 {
748 sint64 deadLine;
749
750 if (timeout == TIME_INFINITE)
751 {
752 deadLine = TIME_INFINITE;
753 }
754 else
755 {
756 deadLine = IfxStm_now() + timeout;
757 }
758
759 return deadLine;
760 }
761
762
763 IFX_INLINE boolean IfxStm_isDeadLine(sint64 deadLine)
764 {
765 boolean result;
766
767 if (deadLine == TIME_INFINITE)
768 {
769 result = FALSE;
770 }
771 else
772 {
773 result = IfxStm_now() >= deadLine;
774 }
775
776 return result;
777 }
778
779
780 IFX_INLINE void IfxStm_wait(sint64 timeout)
781 {
782 sint64 deadLine = IfxStm_getDeadLine(timeout);
783
784 while (IfxStm_isDeadLine(deadLine) == FALSE)
785 {}
786 }
787
788
789 #endif /* IFXSTM_H */
IfxStm_ComparatorSize_25Bits
Size of compare value to compare with timer: 25 bits.
Definition: IfxStm.h:237
IfxStm_SleepMode_disable
disables sleep mode
Definition: IfxStm.h:253
IfxStm_SuspendMode_soft
Soft Suspend.
Definition: IfxStm.h:262
Ifx_TickTime
sint64 Ifx_TickTime
Time in ticks.
Definition: Ifx_Types.h:76
IfxStm_ComparatorOffset_2
Comparator start bit position 2 with 64 bit timer.
Definition: IfxStm.h:177
IfxStm_ComparatorOffset_17
Comparator start bit position 17 with 64 bit timer.
Definition: IfxStm.h:192
IfxStm_ComparatorSize_5Bits
Size of compare value to compare with timer: 5 bits.
Definition: IfxStm.h:217
IfxStm_getLower
IFX_INLINE uint32 IfxStm_getLower(Ifx_STM *stm)
Returns the lower system timer value.
Definition: IfxStm.h:604
IfxStm_ComparatorSize
IfxStm_ComparatorSize
Size of compare value to compare with timer defined in MODULE_STMx.CMCON.B.MSIZE0(x = 0...
Definition: IfxStm.h:211
IfxStm_ComparatorSize_23Bits
Size of compare value to compare with timer: 23 bits.
Definition: IfxStm.h:235
IfxStm_getTicksFromMilliseconds
IFX_INLINE sint32 IfxStm_getTicksFromMilliseconds(Ifx_STM *stm, uint32 milliSeconds)
Returns the number of ticks for the selected milli seconds based on the STM frequency.
Definition: IfxStm.h:663
IfxStm_Comparator_1
Comparator Id 1.
Definition: IfxStm.h:160
IfxStm_CompareConfig::compareOffset
IfxStm_ComparatorOffset compareOffset
Comparator start bit position defined in MODULE_STMx.CMCON.B.MSTART0(x = 0,1,2).
Definition: IfxStm.h:279
IfxStm_ComparatorSize_11Bits
Size of compare value to compare with timer: 11 bits.
Definition: IfxStm.h:223
IfxStm_isCompareFlagSet
IFX_EXTERN boolean IfxStm_isCompareFlagSet(Ifx_STM *stm, IfxStm_Comparator comparator)
Indicates if the compare interrupt flag is set.
Definition: IfxStm.c:239
IfxStm_ComparatorOffset_3
Comparator start bit position 3 with 64 bit timer.
Definition: IfxStm.h:178
IfxStm_ComparatorOffset_24
Comparator start bit position 24 with 64 bit timer.
Definition: IfxStm.h:199
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:100
IfxStm_cfg.h
STM on-chip implementation data.
IfxStm_waitTicks
IFX_INLINE void IfxStm_waitTicks(Ifx_STM *stm, uint32 ticks)
Wait for requested time. The macro waits in while loop for the specified time in system timer ticks...
Definition: IfxStm.h:719
IfxStm_ComparatorSize_12Bits
Size of compare value to compare with timer: 12 bits.
Definition: IfxStm.h:224
IfxStm_enableOcdsSuspend
IFX_EXTERN void IfxStm_enableOcdsSuspend(Ifx_STM *stm)
enable suspend by debugger. Note: The API will write into the OCS register only if OCDS is enabled ...
Definition: IfxStm.c:101
now
IFX_INLINE Ifx_TickTime now(void)
Return system timer value (critical section).
Definition: Bsp.h:218
IfxStm_ComparatorOffset_31
Comparator start bit position 31 with 64 bit timer.
Definition: IfxStm.h:206
IfxStm_getOffset32Timer
IFX_INLINE uint32 IfxStm_getOffset32Timer(Ifx_STM *stm)
Gets the TIM6 couter value.
Definition: IfxStm.h:628
IfxStm_ComparatorOffset_20
Comparator start bit position 20 with 64 bit timer.
Definition: IfxStm.h:195
IfxStm_ComparatorSize_2Bits
Size of compare value to compare with timer: 2 bits.
Definition: IfxStm.h:214
IfxStm_ComparatorOffset_15
Comparator start bit position 15 with 64 bit timer.
Definition: IfxStm.h:190
IfxStm_SuspendMode
IfxStm_SuspendMode
OCDS Suspend Control (OCDS.SUS)
Definition: IfxStm.h:258
IfxStm_getDeadLine
IFX_INLINE sint64 IfxStm_getDeadLine(sint64 timeout)
Get the deadline value.
Definition: IfxStm.h:746
IfxStm_Index
IfxStm_Index
List of the available STM resources.
Definition: IfxStm_cfg.h:84
IfxStm_wait
IFX_INLINE void IfxStm_wait(sint64 timeout)
Waits for a specific time.
Definition: IfxStm.h:780
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxStm_ComparatorInterrupt_ir1
Select STMIR1.
Definition: IfxStm.h:168
IfxStm_Comparator
IfxStm_Comparator
Comparator Id defined in MODULE_STMx.ISCR.B.CMP0IRR(x = 0, 1, 2)
Definition: IfxStm.h:157
float32
float float32
Definition: Platform_Types.h:170
IfxStm_getAddress
IFX_EXTERN Ifx_STM * IfxStm_getAddress(IfxStm_Index stm)
Returns the module index of the selected STM module.
Definition: IfxStm.c:116
IfxStm_getOffsetTimer
IFX_INLINE uint32 IfxStm_getOffsetTimer(Ifx_STM *stm, uint8 offset)
Returns the timer value shifted right by offset.
Definition: IfxStm.h:646
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:249
IfxStm_ComparatorOffset_19
Comparator start bit position 19 with 64 bit timer.
Definition: IfxStm.h:194
IfxStm_initCompareConfig
IFX_EXTERN void IfxStm_initCompareConfig(IfxStm_CompareConfig *config)
Initialise compare configuration with default values.
Definition: IfxStm.c:227
IfxSrc.h
SRC basic functionality.
IfxStm_ComparatorSize_8Bits
Size of compare value to compare with timer: 8 bits.
Definition: IfxStm.h:220
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxStm_CompareConfig::triggerPriority
Ifx_Priority triggerPriority
Interrupt priority. Range = 0 .. 255. 0 = interrupt is disabled.
Definition: IfxStm.h:282
uint64
unsigned long long uint64
Definition: Platform_Types.h:121
IfxStm_ComparatorOffset_14
Comparator start bit position 14 with 64 bit timer.
Definition: IfxStm.h:189
IfxCpu_restoreInterrupts
IFX_INLINE void IfxCpu_restoreInterrupts(boolean enabled)
API to restore global interrupt with that of the passed parameter.
Definition: IfxCpu.h:1026
IfxStm_ComparatorSize_24Bits
Size of compare value to compare with timer: 24 bits.
Definition: IfxStm.h:236
IfxStm_SuspendMode_hard
Hard Suspend.
Definition: IfxStm.h:261
IfxScuCcu_getStmFrequency
IFX_INLINE float32 IfxScuCcu_getStmFrequency(void)
API to get STM divider frequency. This API returns the based on the divider value in CCUCON register ...
Definition: IfxScuCcu.h:1673
IfxStm_ComparatorOffset_22
Comparator start bit position 22 with 64 bit timer.
Definition: IfxStm.h:197
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxStm_ComparatorOffset_16
Comparator start bit position 16 with 64 bit timer.
Definition: IfxStm.h:191
IfxStm_ComparatorOffset_6
Comparator start bit position 6 with 64 bit timer.
Definition: IfxStm.h:181
IfxStm_ComparatorOffset_11
Comparator start bit position 11 with 64 bit timer.
Definition: IfxStm.h:186
IfxStm_ComparatorSize_4Bits
Size of compare value to compare with timer: 4 bits.
Definition: IfxStm.h:216
IfxStm_ComparatorInterrupt_ir0
Select STMIR0.
Definition: IfxStm.h:167
IfxStm_ComparatorOffset_10
Comparator start bit position 10 with 64 bit timer.
Definition: IfxStm.h:185
IfxStm_getCompare
IFX_INLINE uint32 IfxStm_getCompare(Ifx_STM *stm, IfxStm_Comparator comparator)
Returns the updated compare register value.
Definition: IfxStm.h:587
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:351
IfxStm_ComparatorSize_19Bits
Size of compare value to compare with timer: 19 bits.
Definition: IfxStm.h:231
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxStm_now
IFX_INLINE sint64 IfxStm_now(void)
Returns the STM counter value.
Definition: IfxStm.h:733
IfxStm_ComparatorOffset_9
Comparator start bit position 9 with 64 bit timer.
Definition: IfxStm.h:184
IfxStm_CompareConfig::ticks
uint32 ticks
count for next comparison from current timer count.
Definition: IfxStm.h:281
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxStm_ComparatorOffset_29
Comparator start bit position 29 with 64 bit timer.
Definition: IfxStm.h:204
IfxStm_disableModule
IFX_EXTERN void IfxStm_disableModule(Ifx_STM *stm)
Disables the Stm module.
Definition: IfxStm.c:78
IfxStm_ComparatorSize_32Bits
Size of compare value to compare with timer: 32 bits.
Definition: IfxStm.h:244
IfxStm_CompareConfig::comparatorInterrupt
IfxStm_ComparatorInterrupt comparatorInterrupt
Comparator Interrupt request source defined in MODULE_SRC.STM.STM[index].SRx (x =0, 1).
Definition: IfxStm.h:278
IfxStm_CompareConfig
Comparator Configuration Structure.
Definition: IfxStm.h:275
IfxCpu_disableInterrupts
IFX_INLINE boolean IfxCpu_disableInterrupts(void)
API to disable global interrupt and return the previous status.
Definition: IfxCpu.h:749
IfxStm_isDeadLine
IFX_INLINE boolean IfxStm_isDeadLine(sint64 deadLine)
Checked if deadline has occured.
Definition: IfxStm.h:763
IfxStm_updateCompare
IFX_INLINE void IfxStm_updateCompare(Ifx_STM *stm, IfxStm_Comparator comparator, uint32 ticks)
Update the compare register value.
Definition: IfxStm.h:713
IfxStm_ComparatorSize_15Bits
Size of compare value to compare with timer: 15 bits.
Definition: IfxStm.h:227
IfxStm_ComparatorSize_29Bits
Size of compare value to compare with timer: 29 bits.
Definition: IfxStm.h:241
IfxStm_ComparatorSize_27Bits
Size of compare value to compare with timer: 27 bits.
Definition: IfxStm.h:239
IfxStm_ComparatorSize_28Bits
Size of compare value to compare with timer: 28 bits.
Definition: IfxStm.h:240
IfxStm_initCompare
IFX_EXTERN boolean IfxStm_initCompare(Ifx_STM *stm, const IfxStm_CompareConfig *config)
Initialise stm compare register.
Definition: IfxStm.c:161
IfxStm_getIndex
IFX_EXTERN IfxStm_Index IfxStm_getIndex(Ifx_STM *stm)
API to get the resource index of the STM specified.
Definition: IfxStm.c:133
IfxStm_ComparatorSize_1Bit
Size of compare value to compare with timer: 1 bit.
Definition: IfxStm.h:213
IfxStm_ComparatorSize_3Bits
Size of compare value to compare with timer: 3 bits.
Definition: IfxStm.h:215
IfxStm_ComparatorSize_17Bits
Size of compare value to compare with timer: 17 bits.
Definition: IfxStm.h:229
IfxStm_ComparatorOffset_25
Comparator start bit position 25 with 64 bit timer.
Definition: IfxStm.h:200
IfxStm_ComparatorOffset_27
Comparator start bit position 27 with 64 bit timer.
Definition: IfxStm.h:202
IfxStm_SleepMode_enable
enables sleep mode
Definition: IfxStm.h:252
IfxStm_ComparatorSize_26Bits
Size of compare value to compare with timer: 26 bits.
Definition: IfxStm.h:238
IFXSTM_DEFAULT_TIMER
#define IFXSTM_DEFAULT_TIMER
Definition: IfxStm.h:146
IfxStm_SuspendMode_none
No suspend.
Definition: IfxStm.h:260
IfxStm_ComparatorSize_7Bits
Size of compare value to compare with timer: 7 bits.
Definition: IfxStm.h:219
IfxStm_getOffset8Timer
IFX_INLINE uint32 IfxStm_getOffset8Timer(Ifx_STM *stm)
Gets the TIM2 couter value.
Definition: IfxStm.h:640
IfxStm_ComparatorOffset_1
Comparator start bit position 1 with 64 bit timer.
Definition: IfxStm.h:176
IfxStm_setCompareControl
IFX_EXTERN void IfxStm_setCompareControl(Ifx_STM *stm, IfxStm_Comparator comparator, IfxStm_ComparatorOffset offset, IfxStm_ComparatorSize size, IfxStm_ComparatorInterrupt interrupt)
Set the compare behavior.
Definition: IfxStm.c:272
sint64
long long sint64
Definition: Platform_Types.h:141
IfxStm_ComparatorSize_22Bits
Size of compare value to compare with timer: 22 bits.
Definition: IfxStm.h:234
IfxStm_ComparatorOffset_0
Comparator start bit position 0 with 64 bit timer.
Definition: IfxStm.h:175
IfxStm_Comparator_0
Comparator Id 0.
Definition: IfxStm.h:159
IfxStm_getOffset20Timer
IFX_INLINE uint32 IfxStm_getOffset20Timer(Ifx_STM *stm)
Gets the TIM5 couter value.
Definition: IfxStm.h:622
IfxStm_getSrcPointer
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxStm_getSrcPointer(Ifx_STM *stm, IfxStm_Comparator comparator)
get the interrupt source pointer for the comparator.
Definition: IfxStm.c:153
IfxStm_ComparatorOffset_26
Comparator start bit position 26 with 64 bit timer.
Definition: IfxStm.h:201
IfxStm_ComparatorSize_21Bits
Size of compare value to compare with timer: 21 bits.
Definition: IfxStm.h:233
IfxStm_isModuleSuspended
IFX_INLINE boolean IfxStm_isModuleSuspended(Ifx_STM *stm)
Returns the module&#39;s suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspende...
Definition: IfxStm.h:676
IfxStm_ComparatorOffset_8
Comparator start bit position 8 with 64 bit timer.
Definition: IfxStm.h:183
IfxStm_resetModule
IFX_EXTERN void IfxStm_resetModule(Ifx_STM *stm)
Definition: IfxStm.c:252
IfxStm_clearCompareFlag
IFX_EXTERN void IfxStm_clearCompareFlag(Ifx_STM *stm, IfxStm_Comparator comparator)
Clear the compare interrupt flag.
Definition: IfxStm.c:52
IfxStm_ComparatorOffset_7
Comparator start bit position 7 with 64 bit timer.
Definition: IfxStm.h:182
IfxStm_ComparatorOffset
IfxStm_ComparatorOffset
Comparator start bit position defined in MODULE_STMx.CMCON.B.MSTART0(x = 0,1,2)
Definition: IfxStm.h:173
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxStm_CompareConfig::typeOfService
IfxSrc_Tos typeOfService
Type of service.
Definition: IfxStm.h:283
IfxStm_ComparatorSize_18Bits
Size of compare value to compare with timer: 18 bits.
Definition: IfxStm.h:230
IfxStm_enableComparatorInterrupt
IFX_EXTERN void IfxStm_enableComparatorInterrupt(Ifx_STM *stm, IfxStm_Comparator comparator)
Enables the compare interrupt .
Definition: IfxStm.c:88
IfxStm_ComparatorOffset_23
Comparator start bit position 23 with 64 bit timer.
Definition: IfxStm.h:198
IfxStm_getFrequency
IFX_INLINE float32 IfxStm_getFrequency(Ifx_STM *stm)
Returns the system timer frequency.
Definition: IfxStm.h:593
IfxStm_ComparatorOffset_30
Comparator start bit position 30 with 64 bit timer.
Definition: IfxStm.h:205
TIME_INFINITE
#define TIME_INFINITE
Definition: Ifx_Types.h:77
IfxStm_ComparatorOffset_18
Comparator start bit position 18 with 64 bit timer.
Definition: IfxStm.h:193
IfxStm_ComparatorOffset_5
Comparator start bit position 5 with 64 bit timer.
Definition: IfxStm.h:180
IfxScuCcu.h
SCU basic functionality.
sint32
long sint32
Definition: Platform_Types.h:134
IfxStm_increaseCompare
IFX_INLINE void IfxStm_increaseCompare(Ifx_STM *stm, IfxStm_Comparator comparator, uint32 ticks)
Update the compare register value increased with given ticks.
Definition: IfxStm.h:670
IfxStm_getOffset4Timer
IFX_INLINE uint32 IfxStm_getOffset4Timer(Ifx_STM *stm)
Gets the TIM1 couter value.
Definition: IfxStm.h:634
IfxStm_ComparatorSize_13Bits
Size of compare value to compare with timer: 13 bits.
Definition: IfxStm.h:225
IfxStm_SleepMode
IfxStm_SleepMode
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_STM.CLC.B.EDIS.
Definition: IfxStm.h:250
IfxStm_ComparatorInterrupt
IfxStm_ComparatorInterrupt
Comparator Interrupt request source defined in MODULE_SRC.STM.STM[index].SRx (x =0, 1)
Definition: IfxStm.h:165
IfxStm_ComparatorOffset_28
Comparator start bit position 28 with 64 bit timer.
Definition: IfxStm.h:203
IfxStm_ComparatorSize_9Bits
Size of compare value to compare with timer: 9 bits.
Definition: IfxStm.h:221
IfxStm_ComparatorSize_16Bits
Size of compare value to compare with timer: 16 bits.
Definition: IfxStm.h:228
IfxStm_ComparatorOffset_4
Comparator start bit position 4 with 64 bit timer.
Definition: IfxStm.h:179
IfxStm_ComparatorSize_10Bits
Size of compare value to compare with timer: 10 bits.
Definition: IfxStm.h:222
IfxStm_getTicksFromMicroseconds
IFX_INLINE sint32 IfxStm_getTicksFromMicroseconds(Ifx_STM *stm, uint32 microSeconds)
Returns the number of ticks for the selected micro seconds based on the STM frequency.
Definition: IfxStm.h:656
IfxStm_ComparatorOffset_12
Comparator start bit position 12 with 64 bit timer.
Definition: IfxStm.h:187
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:613
IfxStm_getOffset12Timer
IFX_INLINE uint32 IfxStm_getOffset12Timer(Ifx_STM *stm)
Gets the TIM3 couter value.
Definition: IfxStm.h:610
IfxStm_ComparatorOffset_21
Comparator start bit position 21 with 64 bit timer.
Definition: IfxStm.h:196
IfxStm_ComparatorSize_30Bits
Size of compare value to compare with timer: 30 bits.
Definition: IfxStm.h:242
IfxStm_CompareConfig::compareSize
IfxStm_ComparatorSize compareSize
Size of compare value to compare with timer defined in MODULE_STMx.CMCON.B.MSIZE0(x = 0...
Definition: IfxStm.h:280
IfxStm_ComparatorSize_31Bits
Size of compare value to compare with timer: 31 bits.
Definition: IfxStm.h:243
IfxStm_ComparatorSize_6Bits
Size of compare value to compare with timer: 6 bits.
Definition: IfxStm.h:218
IfxStm_ComparatorSize_20Bits
Size of compare value to compare with timer: 20 bits.
Definition: IfxStm.h:232
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
IfxStm_ComparatorOffset_13
Comparator start bit position 13 with 64 bit timer.
Definition: IfxStm.h:188
IfxStm_setSuspendMode
IFX_INLINE void IfxStm_setSuspendMode(Ifx_STM *stm, IfxStm_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and...
Definition: IfxStm.h:697
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxStm_disableComparatorInterrupt
IFX_EXTERN void IfxStm_disableComparatorInterrupt(Ifx_STM *stm, IfxStm_Comparator comparator)
Disables the compare interrupt.
Definition: IfxStm.c:65
IfxStm_CompareConfig::comparator
IfxStm_Comparator comparator
Comparator Id defined in MODULE_STMx.ISCR.B.CMP0IRR(x = 0, 1, 2).
Definition: IfxStm.h:277
IfxStm_get
IFX_INLINE uint64 IfxStm_get(Ifx_STM *stm)
Returns system timer value.
Definition: IfxStm.h:576
IfxStm_ComparatorSize_14Bits
Size of compare value to compare with timer: 14 bits.
Definition: IfxStm.h:226
IfxStm_setSleepMode
IFX_INLINE void IfxStm_setSleepMode(Ifx_STM *stm, IfxStm_SleepMode mode)
Definition: IfxStm.h:688
IfxStm_getOffset16Timer
IFX_INLINE uint32 IfxStm_getOffset16Timer(Ifx_STM *stm)
Gets the TIM4 couter value.
Definition: IfxStm.h:616


iLLD_TC38A: IfxStm_Timer.c Source File

  • Stm
  • Timer
IfxStm_Timer.c
Go to the documentation of this file.
1 /**
2 * \file IfxStm_Timer.c
3 * \brief STM TIMER details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxStm_Timer.h"
47 #include "_Utilities/Ifx_Assert.h"
48
49 /******************************************************************************/
50 /*-------------------------Function Implementations---------------------------*/
51 /******************************************************************************/
52
53 boolean IfxStm_Timer_acknowledgeTimerIrq(IfxStm_Timer *driver)
54 {
55 boolean event;
56 event = IfxStm_isCompareFlagSet(driver->stm, driver->comparator);
57
58 if (event)
59 {
60 IfxStm_clearCompareFlag(driver->stm, driver->comparator);
61
62 if (!driver->base.singleShot)
63 {
64 driver->comparatorValue += driver->base.period;
65 IfxStm_updateCompare(driver->stm, driver->comparator, driver->comparatorValue);
66 }
67 else
68 {
69 IfxStm_disableComparatorInterrupt(driver->stm, driver->comparator);
70 }
71 }
72 else
73 {}
74
75 return event;
76 }
77
78
79 float32 IfxStm_Timer_getFrequency(IfxStm_Timer *driver)
80 {
81 return 1.0 / IfxStdIf_Timer_tickToS(driver->base.clockFreq, driver->base.period);
82 }
83
84
85 float32 IfxStm_Timer_getInputFrequency(IfxStm_Timer *driver)
86 {
87 return driver->base.clockFreq;
88 }
89
90
91 Ifx_TimerValue IfxStm_Timer_getPeriod(IfxStm_Timer *driver)
92 {
93 return driver->base.period;
94 }
95
96
97 float32 IfxStm_Timer_getResolution(IfxStm_Timer *driver)
98 {
99 return 1.0 / driver->base.clockFreq;
100 }
101
102
103 void IfxStm_Timer_run(IfxStm_Timer *driver)
104 {
105 boolean interruptState;
106 uint64 timer;
107
108 interruptState = IfxCpu_disableInterrupts();
109 timer = IfxStm_get(driver->stm);
110 IfxCpu_restoreInterrupts(interruptState);
111
112 driver->comparatorValue = (Ifx_TimerValue)(timer >> driver->comparatorShift) + driver->base.period;
113
114 IfxStm_updateCompare(driver->stm, driver->comparator, driver->comparatorValue);
115 IfxStm_enableComparatorInterrupt(driver->stm, driver->comparator);
116 }
117
118
119 boolean IfxStm_Timer_setFrequency(IfxStm_Timer *driver, float32 frequency)
120 {
121 Ifx_TimerValue period = IfxStdIf_Timer_sToTick(driver->base.clockFreq, 1.0 / frequency);
122
123 return IfxStm_Timer_setPeriod(driver, period);
124 }
125
126
127 boolean IfxStm_Timer_setPeriod(IfxStm_Timer *driver, Ifx_TimerValue period)
128 {
129 driver->base.period = period;
130
131 return TRUE;
132 }
133
134
135 void IfxStm_Timer_setSingleMode(IfxStm_Timer *driver, boolean enabled)
136 {
137 driver->base.singleShot = enabled;
138 }
139
140
141 boolean IfxStm_Timer_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxStm_Timer *driver)
142 {
143 IfxStdIf_Timer_initStdIf(stdif, driver);
144 /* Set the API link */
145 stdif->getFrequency = (IfxStdIf_Timer_GetFrequency) & IfxStm_Timer_getFrequency;
146 stdif->getPeriod = (IfxStdIf_Timer_GetPeriod) & IfxStm_Timer_getPeriod;
147 stdif->getResolution = (IfxStdIf_Timer_GetResolution) & IfxStm_Timer_getResolution;
148 //stdif->getTrigger
149 stdif->setFrequency = (IfxStdIf_Timer_SetFrequency) & IfxStm_Timer_setFrequency;
150 stdif->updateInputFrequency = (IfxStdIf_Timer_UpdateInputFrequency) & IfxStm_Timer_updateInputFrequency;
151 //stdif->applyUpdate
152 //stdif->disableUpdate
153 stdif->getInputFrequency = (IfxStdIf_Timer_GetInputFrequency) & IfxStm_Timer_getInputFrequency;
154 stdif->run = (IfxStdIf_Timer_Run) & IfxStm_Timer_run;
155 stdif->setPeriod = (IfxStdIf_Timer_SetPeriod) & IfxStm_Timer_setPeriod;
156 stdif->setSingleMode = (IfxStdIf_Timer_SetSingleMode) & IfxStm_Timer_setSingleMode;
157 //stdif->setTrigger
158 stdif->stop = (IfxStdIf_Timer_Stop) & IfxStm_Timer_stop;
159 stdif->ackTimerIrq = (IfxStdIf_Timer_AckTimerIrq) & IfxStm_Timer_acknowledgeTimerIrq;
160 //stdif->ackTriggerIrq
161
162 return TRUE;
163 }
164
165
166 void IfxStm_Timer_stop(IfxStm_Timer *driver)
167 {
168 IfxStm_disableComparatorInterrupt(driver->stm, driver->comparator);
169 }
170
171
172 void IfxStm_Timer_updateInputFrequency(IfxStm_Timer *driver)
173 {
174 float32 freqency;
175 freqency = IfxStm_getFrequency(driver->stm);
176 driver->base.clockFreq = freqency / (1 << driver->comparatorShift);
177 }
178
179
180 boolean IfxStm_Timer_init(IfxStm_Timer *driver, const IfxStm_Timer_Config *config)
181 {
182 boolean result = TRUE;
183 IfxStm_Timer_Base *base = &driver->base;
184
185 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->base.countDir == IfxStdIf_Timer_CountDir_up); /* only this mode is supported */
186
187 driver->stm = config->stm;
188 driver->comparator = config->comparator;
189
190 base->triggerEnabled = config->base.trigger.enabled;
191 base->singleShot = FALSE;
192
193 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->base.trigger.enabled == FALSE); /* Trigger feature not supported */
194 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->base.startOffset == 0); /* Trigger feature not supported */
195
196 /* Initialize the timer part */
197 // STM timer is already running after reset (free running timer)
198
199 // Calculate shift
200 driver->comparatorShift = 32 - __clz((uint32)(config->base.minResolution * IfxStm_getFrequency(driver->stm)));
201
202 if (driver->comparatorShift > 0)
203 {
204 driver->comparatorShift--;
205 }
206
207 IfxStm_Timer_updateInputFrequency(driver);
208
209 if ((config->base.minResolution > 0) && ((1.0 / base->clockFreq) > config->base.minResolution))
210 {
211 result = FALSE;
212 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
213 }
214 else
215 {}
216
217 IfxStm_Timer_setFrequency(driver, config->base.frequency);
218
219 IfxStm_setCompareControl(driver->stm, driver->comparator,
220 (IfxStm_ComparatorOffset)driver->comparatorShift,
221 IfxStm_ComparatorSize_32Bits,
222 driver->comparator == IfxStm_Comparator_0 ? IfxStm_ComparatorInterrupt_ir0 : IfxStm_ComparatorInterrupt_ir1);
223
224 /* Interrupt configuration */
225 if (config->base.isrPriority > 0)
226 {
227 /* clear the interrupt flag of the selected comparator */
228 IfxStm_clearCompareFlag(driver->stm, driver->comparator);
229
230 volatile Ifx_SRC_SRCR *src;
231 src = IfxStm_getSrcPointer(driver->stm, config->comparator);
232 IfxSrc_init(src, config->base.isrProvider, config->base.isrPriority);
233 IfxSrc_enable(src);
234 }
235
236 return result;
237 }
238
239
240 void IfxStm_Timer_initConfig(IfxStm_Timer_Config *config, Ifx_STM *stm)
241 {
242 IfxStdIf_Timer_initConfig(&config->base);
243 config->stm = stm;
244 config->comparator = IfxStm_Comparator_0;
245 }
IfxStm_Timer_getFrequency
float32 IfxStm_Timer_getFrequency(IfxStm_Timer *driver)
Returns the frequency see IfxStdIf_Timer_GetFrequency.
Definition: IfxStm_Timer.c:79
IfxStm_Timer_getPeriod
Ifx_TimerValue IfxStm_Timer_getPeriod(IfxStm_Timer *driver)
Returns the period of the timer see IfxStdIf_Timer_GetPeriod.
Definition: IfxStm_Timer.c:91
IfxStm_Timer_stdIfTimerInit
boolean IfxStm_Timer_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxStm_Timer *driver)
Initializes the standard interface timer.
Definition: IfxStm_Timer.c:141
IfxStm_Timer_Base::singleShot
boolean singleShot
If TRUE, the timer will stop after 1st event.
Definition: IfxStm_Timer.h:132
IfxStm_Timer_Config::base
IfxStdIf_Timer_Config base
Standard interface timer configuration.
Definition: IfxStm_Timer.h:154
__clz
sint32 __clz(sint32) __attribute__((intrinsic_pseudo(1
IfxStdIf_Timer_Config::isrProvider
IfxSrc_Tos isrProvider
Interrupt service provider for the timer interrupt.
Definition: IfxStdIf_Timer.h:276
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxStdIf_Timer_GetFrequency
float32(* IfxStdIf_Timer_GetFrequency)(IfxStdIf_InterfaceDriver stdIf)
Return the timer frequency in Hz.
Definition: IfxStdIf_Timer.h:99
IfxStm_isCompareFlagSet
boolean IfxStm_isCompareFlagSet(Ifx_STM *stm, IfxStm_Comparator comparator)
Indicates if the compare interrupt flag is set.
Definition: IfxStm.c:239
IfxStm_Timer_setPeriod
boolean IfxStm_Timer_setPeriod(IfxStm_Timer *driver, Ifx_TimerValue period)
Sets the period for the timer see IfxStdIf_Timer_SetPeriod.
Definition: IfxStm_Timer.c:127
IfxStm_Timer_Base
Structure for the timer base.
Definition: IfxStm_Timer.h:126
IfxStdIf_Timer_UpdateInputFrequency
void(* IfxStdIf_Timer_UpdateInputFrequency)(IfxStdIf_InterfaceDriver stdIf)
Indicates the stdIf that the imput frequency has changed and that it should be taken in account...
Definition: IfxStdIf_Timer.h:131
IfxStdIf_Timer_::stop
IfxStdIf_Timer_Stop stop
Definition: IfxStdIf_Timer.h:253
IfxStdIf_Timer_::setSingleMode
IfxStdIf_Timer_SetSingleMode setSingleMode
Definition: IfxStdIf_Timer.h:251
IfxStdIf_Timer_tickToS
IFX_INLINE float32 IfxStdIf_Timer_tickToS(float32 clockFreq, Ifx_TimerValue ticks)
Convert timer ticks to seconds.
Definition: IfxStdIf_Timer.h:435
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxStm_ComparatorInterrupt_ir1
Select STMIR1.
Definition: IfxStm.h:168
IfxStm_Timer_Config
configuration structure for Timer
Definition: IfxStm_Timer.h:152
IfxStdIf_Timer_SetFrequency
boolean(* IfxStdIf_Timer_SetFrequency)(IfxStdIf_InterfaceDriver stdIf, float32 frequency)
Set the timer frequency in Hz.
Definition: IfxStdIf_Timer.h:125
IfxStm_Timer_setSingleMode
void IfxStm_Timer_setSingleMode(IfxStm_Timer *driver, boolean enabled)
Sets the single shot mode of the timer see IfxStdIf_Timer_SetSingleMode.
Definition: IfxStm_Timer.c:135
IfxStdIf_Timer_sToTick
IFX_INLINE Ifx_TimerValue IfxStdIf_Timer_sToTick(float32 clockFreq, float32 seconds)
Convert seconds to timer ticks.
Definition: IfxStdIf_Timer.h:446
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
float32
float float32
Definition: Platform_Types.h:170
IfxStdIf_Timer_
Standard interface object.
Definition: IfxStdIf_Timer.h:237
IfxStm_Timer_Base::period
Ifx_TimerValue period
Timer period in ticks (cached value)
Definition: IfxStm_Timer.h:128
Ifx_Assert.h
Assert functions.
IfxStdIf_Timer_::getFrequency
IfxStdIf_Timer_GetFrequency getFrequency
Definition: IfxStdIf_Timer.h:240
IfxStdIf_Timer_GetResolution
float32(* IfxStdIf_Timer_GetResolution)(IfxStdIf_InterfaceDriver stdIf)
Return the timer resolution in seconds.
Definition: IfxStdIf_Timer.h:111
uint64
unsigned long long uint64
Definition: Platform_Types.h:121
IfxCpu_restoreInterrupts
IFX_INLINE void IfxCpu_restoreInterrupts(boolean enabled)
API to restore global interrupt with that of the passed parameter.
Definition: IfxCpu.h:1026
IfxStm_Timer_setFrequency
boolean IfxStm_Timer_setFrequency(IfxStm_Timer *driver, float32 frequency)
Sets the Frequency see IfxStdIf_Timer_SetFrequency.
Definition: IfxStm_Timer.c:119
IfxStm_Timer::comparator
IfxStm_Comparator comparator
Comparator used for the timer functionality.
Definition: IfxStm_Timer.h:145
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxStm_ComparatorInterrupt_ir0
Select STMIR0.
Definition: IfxStm.h:167
IfxStdIf_Timer_Config::isrPriority
Ifx_Priority isrPriority
Interrupt isrPriority of the timer interrupt, if 0 the interrupt is disable.
Definition: IfxStdIf_Timer.h:275
IfxStm_Timer::base
IfxStm_Timer_Base base
Timer interface.
Definition: IfxStm_Timer.h:143
IfxStm_ComparatorSize_32Bits
Size of compare value to compare with timer: 32 bits.
Definition: IfxStm.h:244
IfxCpu_disableInterrupts
IFX_INLINE boolean IfxCpu_disableInterrupts(void)
API to disable global interrupt and return the previous status.
Definition: IfxCpu.h:749
IfxStm_updateCompare
IFX_INLINE void IfxStm_updateCompare(Ifx_STM *stm, IfxStm_Comparator comparator, uint32 ticks)
Update the compare register value.
Definition: IfxStm.h:713
IfxStm_Timer::stm
Ifx_STM * stm
STM module used for the timer functionality.
Definition: IfxStm_Timer.h:144
IfxStdIf_Timer_GetInputFrequency
float32(* IfxStdIf_Timer_GetInputFrequency)(IfxStdIf_InterfaceDriver stdIf)
Return the timer input frequency in Hz.
Definition: IfxStdIf_Timer.h:175
IfxStm_Timer_acknowledgeTimerIrq
boolean IfxStm_Timer_acknowledgeTimerIrq(IfxStm_Timer *driver)
Returns the timer event see IfxStdIf_Timer_AckTimerIrq.
Definition: IfxStm_Timer.c:53
IfxStdIf_Timer_Config::countDir
IfxStdIf_Timer_CountDir countDir
Timer counting mode.
Definition: IfxStdIf_Timer.h:279
IfxStm_Timer.h
STM TIMER details.
IfxStdIf_Timer_initConfig
void IfxStdIf_Timer_initConfig(IfxStdIf_Timer_Config *config)
Definition: IfxStdIf_Timer.c:45
IfxStdIf_Timer_initStdIf
void IfxStdIf_Timer_initStdIf(IfxStdIf_Timer *stdIf, IfxStdIf_InterfaceDriver driver)
Definition: IfxStdIf_Timer.c:143
IfxStdIf_Timer_CountDir_up
Timer is counting up.
Definition: IfxStdIf_Timer.h:87
IfxStm_Timer_updateInputFrequency
void IfxStm_Timer_updateInputFrequency(IfxStm_Timer *driver)
Updates the input frequency see IfxStdIf_Timer_UpdateInputFrequency.
Definition: IfxStm_Timer.c:172
IfxStm_setCompareControl
void IfxStm_setCompareControl(Ifx_STM *stm, IfxStm_Comparator comparator, IfxStm_ComparatorOffset offset, IfxStm_ComparatorSize size, IfxStm_ComparatorInterrupt interrupt)
Set the compare behavior.
Definition: IfxStm.c:272
IfxStdIf_Timer_::getInputFrequency
IfxStdIf_Timer_GetInputFrequency getInputFrequency
Definition: IfxStdIf_Timer.h:248
IfxStm_Timer
Timer interface.
Definition: IfxStm_Timer.h:141
IfxStm_Timer_run
void IfxStm_Timer_run(IfxStm_Timer *driver)
Runs the timer see IfxStdIf_Timer_Run.
Definition: IfxStm_Timer.c:103
IfxStm_Timer_init
boolean IfxStm_Timer_init(IfxStm_Timer *driver, const IfxStm_Timer_Config *config)
Initialises the timer object.
Definition: IfxStm_Timer.c:180
IfxStm_Comparator_0
Comparator Id 0.
Definition: IfxStm.h:159
IfxStm_getSrcPointer
volatile Ifx_SRC_SRCR * IfxStm_getSrcPointer(Ifx_STM *stm, IfxStm_Comparator comparator)
get the interrupt source pointer for the comparator.
Definition: IfxStm.c:153
IfxStm_clearCompareFlag
void IfxStm_clearCompareFlag(Ifx_STM *stm, IfxStm_Comparator comparator)
Clear the compare interrupt flag.
Definition: IfxStm.c:52
IfxStm_ComparatorOffset
IfxStm_ComparatorOffset
Comparator start bit position defined in MODULE_STMx.CMCON.B.MSTART0(x = 0,1,2)
Definition: IfxStm.h:173
IfxStm_enableComparatorInterrupt
void IfxStm_enableComparatorInterrupt(Ifx_STM *stm, IfxStm_Comparator comparator)
Enables the compare interrupt .
Definition: IfxStm.c:88
IfxStm_getFrequency
IFX_INLINE float32 IfxStm_getFrequency(Ifx_STM *stm)
Returns the system timer frequency.
Definition: IfxStm.h:593
IfxStdIf_Timer_::setFrequency
IfxStdIf_Timer_SetFrequency setFrequency
Definition: IfxStdIf_Timer.h:244
IfxStdIf_Timer_::run
IfxStdIf_Timer_Run run
Definition: IfxStdIf_Timer.h:249
IfxStdIf_Timer_::updateInputFrequency
IfxStdIf_Timer_UpdateInputFrequency updateInputFrequency
Definition: IfxStdIf_Timer.h:245
IfxStdIf_Timer_GetPeriod
Ifx_TimerValue(* IfxStdIf_Timer_GetPeriod)(IfxStdIf_InterfaceDriver stdIf)
Return the timer period in ticks.
Definition: IfxStdIf_Timer.h:105
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxStdIf_Timer_::setPeriod
IfxStdIf_Timer_SetPeriod setPeriod
Definition: IfxStdIf_Timer.h:250
IfxStm_Timer_getResolution
float32 IfxStm_Timer_getResolution(IfxStm_Timer *driver)
Return the resolution of the Timer counters see IfxStdIf_Timer_GetResolution.
Definition: IfxStm_Timer.c:97
IfxStdIf_Timer_Config::frequency
float32 frequency
PWM frequency in Hz. This parameter is only used to initialise the timer structure. An additional cell is required to build the timer.
Definition: IfxStdIf_Timer.h:274
IfxStm_Timer_Base::clockFreq
float32 clockFreq
Timer input clock frequency (cached value)
Definition: IfxStm_Timer.h:130
IfxStm_Timer_Base::triggerEnabled
boolean triggerEnabled
If TRUE, the trigger functionality is Initialized.
Definition: IfxStm_Timer.h:129
IfxStm_Timer_initConfig
void IfxStm_Timer_initConfig(IfxStm_Timer_Config *config, Ifx_STM *stm)
Initializes the configuration structure to default.
Definition: IfxStm_Timer.c:240
IfxStdIf_Timer_Run
void(* IfxStdIf_Timer_Run)(IfxStdIf_InterfaceDriver stdIf)
Immediately start the timer.
Definition: IfxStdIf_Timer.h:184
IfxStdIf_Timer_::getResolution
IfxStdIf_Timer_GetResolution getResolution
Definition: IfxStdIf_Timer.h:242
IfxStdIf_Timer_Config::trigger
IfxStdIf_Timer_TrigConfig trigger
Trigger configuration.
Definition: IfxStdIf_Timer.h:278
IfxStdIf_Timer_Config::startOffset
float32 startOffset
FIXME make startOffset as Ifx_TimerValue. Timer initial offset in % of the period.
Definition: IfxStdIf_Timer.h:280
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxStdIf_Timer_Stop
void(* IfxStdIf_Timer_Stop)(IfxStdIf_InterfaceDriver stdIf)
Immediately stops the timer.
Definition: IfxStdIf_Timer.h:221
IfxStdIf_Timer_AckTimerIrq
boolean(* IfxStdIf_Timer_AckTimerIrq)(IfxStdIf_InterfaceDriver stdIf)
Return the timer interrupt flag and reset it.
Definition: IfxStdIf_Timer.h:227
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
IfxStm_Timer_stop
void IfxStm_Timer_stop(IfxStm_Timer *driver)
Stops the timer see IfxStdIf_Timer_Stop.
Definition: IfxStm_Timer.c:166
IfxStdIf_Timer_TrigConfig::enabled
boolean enabled
If true, the trigger functionality is Initialised, else ignored.
Definition: IfxStdIf_Timer.h:261
IfxStm_disableComparatorInterrupt
void IfxStm_disableComparatorInterrupt(Ifx_STM *stm, IfxStm_Comparator comparator)
Disables the compare interrupt.
Definition: IfxStm.c:65
IfxStdIf_Timer_SetPeriod
boolean(* IfxStdIf_Timer_SetPeriod)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue period)
Set the timer period.
Definition: IfxStdIf_Timer.h:194
IfxStdIf_Timer_Config::minResolution
float32 minResolution
Minimum resolution of the timer in seconds. if 0, this parameter is ignored. If the configuration doe...
Definition: IfxStdIf_Timer.h:277
IfxStm_get
IFX_INLINE uint64 IfxStm_get(Ifx_STM *stm)
Returns system timer value.
Definition: IfxStm.h:576
IfxStm_Timer::comparatorShift
uint8 comparatorShift
Comparator shift.
Definition: IfxStm_Timer.h:147
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxStm_Timer_getInputFrequency
float32 IfxStm_Timer_getInputFrequency(IfxStm_Timer *driver)
Returns the input frequency see IfxStdIf_Timer_GetInputFrequency.
Definition: IfxStm_Timer.c:85
IfxStdIf_Timer_::ackTimerIrq
IfxStdIf_Timer_AckTimerIrq ackTimerIrq
Definition: IfxStdIf_Timer.h:254
IfxStdIf_Timer_SetSingleMode
void(* IfxStdIf_Timer_SetSingleMode)(IfxStdIf_InterfaceDriver stdIf, boolean enabled)
Stop timer at the end of the period.
Definition: IfxStdIf_Timer.h:203
IfxStdIf_Timer_::getPeriod
IfxStdIf_Timer_GetPeriod getPeriod
Definition: IfxStdIf_Timer.h:241
IfxStm_Timer::comparatorValue
uint32 comparatorValue
Value of the comparator for the next event.
Definition: IfxStm_Timer.h:146


iLLD_TC38A: IfxStm_Timer.h Source File

  • Stm
  • Timer
IfxStm_Timer.h
Go to the documentation of this file.
1 /**
2 * \file IfxStm_Timer.h
3 * \brief STM TIMER details
4 * \ingroup IfxLld_Stm
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * The timer driver enabled the generation of periodical interrupt based on the STM module.
42 *
43 * The driver is initialized with \ref IfxStm_Timer_init(). After initialization, the
44 * timer is started with \ref IfxStm_Timer_run() and stopped with \ref IfxStm_Timer_stop().
45 * Single shot can be set with \ref IfxStm_Timer_setSingleMode(), in case the timer is
46 * already running it will stop after the next event, else the timer event will occur only once.
47 *
48 * The timer interrupt must call the \ref IfxStm_Timer_acknowledgeTimerIrq() function which
49 * clears the interrupt flag and set the next compare value.
50 *
51 * Changing the period with \ref IfxStm_Timer_setPeriod() or \ref IfxStm_Timer_setFrequency() will
52 * take effect only after the next timer event.
53 *
54 *
55 * This driver implements a subset of the functionalities defined by \ref library_srvsw_stdif_timer.
56 * If does supports the timer with interrupt but not the trigger signal.
57 *
58 * The user is free to use either the driver specific APIs below or to used the \ref library_srvsw_stdif_timer "standard interface APIs".
59 *
60 * \section Specific Specific implementation
61 * For a detailed configuration of the microcontroller, see \ref IfxStm_Timer_init().
62 *
63 * \section Example Usage example
64 * Initialization and interrupt:
65 * \code
66 * #define ISR_PRIORITY_TIMER_1MS (2)
67 * #define ISR_PROVIDER_TIMER_1MS IfxSrc_Tos_cpu0
68 * #define INTERRUPT_TIMER_1MS ISR_ASSIGN(ISR_PRIORITY_TIMER_1MS, ISR_PROVIDER_TIMER_1MS)
69 *
70 * IfxStm_Timer myTimer;
71 *
72 * boolean AppInit_1ms(void)
73 * {
74 * boolean result = TRUE;
75 * IfxStm_Timer_Config timerConfig;
76 * IfxStm_Timer_initConfig(&timerConfig, &MODULE_STM0);
77 * timerConfig.base.frequency = 1000;
78 * timerConfig.base.isrPriority = ISR_PRIORITY(INTERRUPT_TIMER_1MS);
79 * timerConfig.base.isrProvider = ISR_PROVIDER(INTERRUPT_TIMER_1MS);
80 * timerConfig.base.minResolution = (1.0 / timerConfig.base.frequency) / 1000;
81 * timerConfig.comparator = IfxStm_Comparator_0;
82 * result = IfxStm_Timer_init(&myTimer, &timerConfig);
83 *
84 * return result;
85 * }
86 *
87 * IFX_INTERRUPT(ISR_TIMER_1ms, 0, ISR_PRIORITY_TIMER_1MS)
88 * {
89 * __enable();
90 * IfxStm_Timer_acknowledgeTimerIrq(&myTimer);
91 * }
92 * \endcode
93 *
94 * During run-time, the timer can be started / stopped as follow:
95 * \code
96 * IfxStm_Timer_run(&myTimer);
97 * IfxStm_Timer_stop(&myTimer);
98 * \endcode
99 *
100 * \defgroup IfxLld_Stm_Timer STM Timer Interface
101 * \ingroup IfxLld_Stm
102 * \defgroup IfxLld_Stm_Timer_STMTimerDataStructures STM Timer Data Structures
103 * \ingroup IfxLld_Stm_Timer
104 * \defgroup IfxLld_Stm_Timer_globalfunction global function
105 * \ingroup IfxLld_Stm_Timer
106 */
107
108 #ifndef IFXSTM_TIMER_H
109 #define IFXSTM_TIMER_H 1
110
111 /******************************************************************************/
112 /*----------------------------------Includes----------------------------------*/
113 /******************************************************************************/
114
115 #include "Stm/Std/IfxStm.h"
116 #include "StdIf/IfxStdIf_Timer.h"
117
118 /******************************************************************************/
119 /*-----------------------------Data Structures--------------------------------*/
120 /******************************************************************************/
121
122 /** \addtogroup IfxLld_Stm_Timer_STMTimerDataStructures
123 * \{ */
124 /** \brief Structure for the timer base
125 */
126 typedef struct
127 {
128 Ifx_TimerValue period; /**< \brief Timer period in ticks (cached value) */
129 boolean triggerEnabled; /**< \brief If TRUE, the trigger functionality is Initialized */
130 float32 clockFreq; /**< \brief Timer input clock frequency (cached value) */
131 IfxStdIf_Timer_CountDir countDir; /**< \brief Timer counting mode */
132 boolean singleShot; /**< \brief If TRUE, the timer will stop after 1st event */
133 } IfxStm_Timer_Base;
134
135 /** \} */
136
137 /** \addtogroup IfxLld_Stm_Timer_STMTimerDataStructures
138 * \{ */
139 /** \brief Timer interface
140 */
141 typedef struct
142 {
143 IfxStm_Timer_Base base; /**< \brief Timer interface */
144 Ifx_STM *stm; /**< \brief STM module used for the timer functionality */
145 IfxStm_Comparator comparator; /**< \brief Comparator used for the timer functionality */
146 uint32 comparatorValue; /**< \brief Value of the comparator for the next event */
147 uint8 comparatorShift; /**< \brief Comparator shift */
148 } IfxStm_Timer;
149
150 /** \brief configuration structure for Timer
151 */
152 typedef struct
153 {
154 IfxStdIf_Timer_Config base; /**< \brief Standard interface timer configuration */
155 Ifx_STM *stm; /**< \brief STM module used for the timer functionality */
156 IfxStm_Comparator comparator; /**< \brief Comparator used for the timer functionality */
157 } IfxStm_Timer_Config;
158
159 /** \} */
160
161 /** \addtogroup IfxLld_Stm_Timer_globalfunction
162 * \{ */
163
164 /******************************************************************************/
165 /*-------------------------Global Function Prototypes-------------------------*/
166 /******************************************************************************/
167
168 /** \brief Returns the timer event
169 * see IfxStdIf_Timer_AckTimerIrq
170 * \param driver STM Timer interface Handle
171 * \return Timer interrupt event
172 */
173 IFX_EXTERN boolean IfxStm_Timer_acknowledgeTimerIrq(IfxStm_Timer *driver);
174
175 /** \brief Returns the frequency
176 * see IfxStdIf_Timer_GetFrequency
177 * \param driver STM Timer interface Handle
178 * \return Frequency
179 */
180 IFX_EXTERN float32 IfxStm_Timer_getFrequency(IfxStm_Timer *driver);
181
182 /** \brief Returns the input frequency
183 * see IfxStdIf_Timer_GetInputFrequency
184 * \param driver STM Timer interface Handle
185 * \return Frequency
186 */
187 IFX_EXTERN float32 IfxStm_Timer_getInputFrequency(IfxStm_Timer *driver);
188
189 /** \brief Returns the period of the timer
190 * see IfxStdIf_Timer_GetPeriod
191 * \param driver STM Timer interface Handle
192 * \return Period
193 */
194 IFX_EXTERN Ifx_TimerValue IfxStm_Timer_getPeriod(IfxStm_Timer *driver);
195
196 /** \brief Return the resolution of the Timer counters
197 * see IfxStdIf_Timer_GetResolution
198 * \param driver STM Timer interface handle
199 * \return Resolution
200 */
201 IFX_EXTERN float32 IfxStm_Timer_getResolution(IfxStm_Timer *driver);
202
203 /** \brief Runs the timer
204 * see IfxStdIf_Timer_Run
205 * \param driver STM Timer interface Handle
206 * \return None
207 */
208 IFX_EXTERN void IfxStm_Timer_run(IfxStm_Timer *driver);
209
210 /** \brief Sets the Frequency
211 * see IfxStdIf_Timer_SetFrequency
212 * \param driver STM Timer interface Handle
213 * \param frequency frequency
214 * \return TRUE on success else FALSE
215 */
216 IFX_EXTERN boolean IfxStm_Timer_setFrequency(IfxStm_Timer *driver, float32 frequency);
217
218 /** \brief Sets the period for the timer
219 * see IfxStdIf_Timer_SetPeriod
220 * \param driver STM Timer interface handle
221 * \param period Period value
222 * \return TRUE on success else FALSE
223 */
224 IFX_EXTERN boolean IfxStm_Timer_setPeriod(IfxStm_Timer *driver, Ifx_TimerValue period);
225
226 /** \brief Sets the single shot mode of the timer
227 * see IfxStdIf_Timer_SetSingleMode
228 * \param driver STM Timer interface Handle
229 * \param enabled If TRUE, sets the single shot mode
230 * \return None
231 */
232 IFX_EXTERN void IfxStm_Timer_setSingleMode(IfxStm_Timer *driver, boolean enabled);
233
234 /** \brief Initializes the standard interface timer
235 * \param stdif Standard interface object, will be initialized by the function
236 * \param driver driver Interface driver to be used by the standard interface. must be initialised separately
237 * \return TRUE on success else FALSE
238 */
239 IFX_EXTERN boolean IfxStm_Timer_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxStm_Timer *driver);
240
241 /** \brief Stops the timer
242 * see IfxStdIf_Timer_Stop
243 * \param driver STM Timer interface Handle
244 * \return None
245 */
246 IFX_EXTERN void IfxStm_Timer_stop(IfxStm_Timer *driver);
247
248 /** \brief Updates the input frequency
249 * see IfxStdIf_Timer_UpdateInputFrequency
250 * \param driver STM Timer interface Handle
251 * \return None
252 */
253 IFX_EXTERN void IfxStm_Timer_updateInputFrequency(IfxStm_Timer *driver);
254
255 /** \brief Initialises the timer object
256 * \param driver STM Timer interface Handle
257 * \param config Configuration structure for STM Timer
258 * \return TRUE on success else FALSE
259 */
260 IFX_EXTERN boolean IfxStm_Timer_init(IfxStm_Timer *driver, const IfxStm_Timer_Config *config);
261
262 /** \brief Initializes the configuration structure to default
263 * \param config Configuration structure for STM Timer
264 * \param stm Pointer to STM module
265 * \return None
266 */
267 IFX_EXTERN void IfxStm_Timer_initConfig(IfxStm_Timer_Config *config, Ifx_STM *stm);
268
269 /** \} */
270
271 #endif /* IFXSTM_TIMER_H */
IfxStm_Timer_getFrequency
IFX_EXTERN float32 IfxStm_Timer_getFrequency(IfxStm_Timer *driver)
Returns the frequency see IfxStdIf_Timer_GetFrequency.
Definition: IfxStm_Timer.c:79
IfxStm_Timer_getPeriod
IFX_EXTERN Ifx_TimerValue IfxStm_Timer_getPeriod(IfxStm_Timer *driver)
Returns the period of the timer see IfxStdIf_Timer_GetPeriod.
Definition: IfxStm_Timer.c:91
IfxStm_Timer_stdIfTimerInit
IFX_EXTERN boolean IfxStm_Timer_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxStm_Timer *driver)
Initializes the standard interface timer.
Definition: IfxStm_Timer.c:141
IfxStm_Timer_Base::singleShot
boolean singleShot
If TRUE, the timer will stop after 1st event.
Definition: IfxStm_Timer.h:132
IfxStm_Timer_Config::base
IfxStdIf_Timer_Config base
Standard interface timer configuration.
Definition: IfxStm_Timer.h:154
IfxStm.h
STM basic functionality.
IfxStm_Timer_setPeriod
IFX_EXTERN boolean IfxStm_Timer_setPeriod(IfxStm_Timer *driver, Ifx_TimerValue period)
Sets the period for the timer see IfxStdIf_Timer_SetPeriod.
Definition: IfxStm_Timer.c:127
IfxStm_Timer_Base
Structure for the timer base.
Definition: IfxStm_Timer.h:126
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxStm_Timer_Config
configuration structure for Timer
Definition: IfxStm_Timer.h:152
IfxStm_Comparator
IfxStm_Comparator
Comparator Id defined in MODULE_STMx.ISCR.B.CMP0IRR(x = 0, 1, 2)
Definition: IfxStm.h:157
IfxStm_Timer_setSingleMode
IFX_EXTERN void IfxStm_Timer_setSingleMode(IfxStm_Timer *driver, boolean enabled)
Sets the single shot mode of the timer see IfxStdIf_Timer_SetSingleMode.
Definition: IfxStm_Timer.c:135
float32
float float32
Definition: Platform_Types.h:170
IfxStdIf_Timer_
Standard interface object.
Definition: IfxStdIf_Timer.h:237
IfxStm_Timer_Base::period
Ifx_TimerValue period
Timer period in ticks (cached value)
Definition: IfxStm_Timer.h:128
IfxStdIf_Timer_Config
Timer configuration.
Definition: IfxStdIf_Timer.h:272
IfxStm_Timer_setFrequency
IFX_EXTERN boolean IfxStm_Timer_setFrequency(IfxStm_Timer *driver, float32 frequency)
Sets the Frequency see IfxStdIf_Timer_SetFrequency.
Definition: IfxStm_Timer.c:119
IfxStm_Timer::comparator
IfxStm_Comparator comparator
Comparator used for the timer functionality.
Definition: IfxStm_Timer.h:145
IfxStm_Timer_Base::countDir
IfxStdIf_Timer_CountDir countDir
Timer counting mode.
Definition: IfxStm_Timer.h:131
IfxStm_Timer::base
IfxStm_Timer_Base base
Timer interface.
Definition: IfxStm_Timer.h:143
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxStm_Timer::stm
Ifx_STM * stm
STM module used for the timer functionality.
Definition: IfxStm_Timer.h:144
IfxStm_Timer_acknowledgeTimerIrq
IFX_EXTERN boolean IfxStm_Timer_acknowledgeTimerIrq(IfxStm_Timer *driver)
Returns the timer event see IfxStdIf_Timer_AckTimerIrq.
Definition: IfxStm_Timer.c:53
IfxStdIf_Timer.h
Standard interface: Timer.
IfxStm_Timer_updateInputFrequency
IFX_EXTERN void IfxStm_Timer_updateInputFrequency(IfxStm_Timer *driver)
Updates the input frequency see IfxStdIf_Timer_UpdateInputFrequency.
Definition: IfxStm_Timer.c:172
IfxStm_Timer
Timer interface.
Definition: IfxStm_Timer.h:141
IfxStdIf_Timer_CountDir
IfxStdIf_Timer_CountDir
Timer increment direction.
Definition: IfxStdIf_Timer.h:85
IfxStm_Timer_run
IFX_EXTERN void IfxStm_Timer_run(IfxStm_Timer *driver)
Runs the timer see IfxStdIf_Timer_Run.
Definition: IfxStm_Timer.c:103
IfxStm_Timer_init
IFX_EXTERN boolean IfxStm_Timer_init(IfxStm_Timer *driver, const IfxStm_Timer_Config *config)
Initialises the timer object.
Definition: IfxStm_Timer.c:180
IfxStm_Timer_getResolution
IFX_EXTERN float32 IfxStm_Timer_getResolution(IfxStm_Timer *driver)
Return the resolution of the Timer counters see IfxStdIf_Timer_GetResolution.
Definition: IfxStm_Timer.c:97
IfxStm_Timer_Base::clockFreq
float32 clockFreq
Timer input clock frequency (cached value)
Definition: IfxStm_Timer.h:130
IfxStm_Timer_Base::triggerEnabled
boolean triggerEnabled
If TRUE, the trigger functionality is Initialized.
Definition: IfxStm_Timer.h:129
IfxStm_Timer_initConfig
IFX_EXTERN void IfxStm_Timer_initConfig(IfxStm_Timer_Config *config, Ifx_STM *stm)
Initializes the configuration structure to default.
Definition: IfxStm_Timer.c:240
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
IfxStm_Timer_stop
IFX_EXTERN void IfxStm_Timer_stop(IfxStm_Timer *driver)
Stops the timer see IfxStdIf_Timer_Stop.
Definition: IfxStm_Timer.c:166
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxStm_Timer::comparatorShift
uint8 comparatorShift
Comparator shift.
Definition: IfxStm_Timer.h:147
IfxStm_Timer_getInputFrequency
IFX_EXTERN float32 IfxStm_Timer_getInputFrequency(IfxStm_Timer *driver)
Returns the input frequency see IfxStdIf_Timer_GetInputFrequency.
Definition: IfxStm_Timer.c:85
IfxStm_Timer::comparatorValue
uint32 comparatorValue
Value of the comparator for the next event.
Definition: IfxStm_Timer.h:146


iLLD_TC38A: IfxStm_cfg.c Source File

  • _Impl
IfxStm_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxStm_cfg.c
3 * \brief STM on-chip implementation data
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxStm_cfg.h"
47
48 /******************************************************************************/
49 /*-----------------------Exported Variables/Constants-------------------------*/
50 /******************************************************************************/
51
52 IFX_CONST IfxModule_IndexMap IfxStm_cfg_indexMap[IFXSTM_NUM_MODULES] = {
53 {&MODULE_STM0, IfxStm_Index_0},
54 {&MODULE_STM1, IfxStm_Index_1},
55 {&MODULE_STM2, IfxStm_Index_2},
56 {&MODULE_STM3, IfxStm_Index_3}
57 };
IfxStm_cfg.h
STM on-chip implementation data.
IFXSTM_NUM_MODULES
#define IFXSTM_NUM_MODULES
STM count.
Definition: IfxStm_cfg.h:70
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxStm_Index_2
STM index 2.
Definition: IfxStm_cfg.h:89
IfxStm_Index_1
STM index 1.
Definition: IfxStm_cfg.h:88
IfxStm_Index_3
STM index 3.
Definition: IfxStm_cfg.h:90
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:140
IfxStm_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxStm_cfg_indexMap[IFXSTM_NUM_MODULES]
Definition: IfxStm_cfg.c:52
IfxStm_Index_0
STM index 0.
Definition: IfxStm_cfg.h:87


iLLD_TC38A: IfxStm_cfg.h Source File

  • _Impl
IfxStm_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxStm_cfg.h
3 * \brief STM on-chip implementation data
4 * \ingroup IfxLld_Stm
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Stm STM
42 * \ingroup IfxLld
43 * \defgroup IfxLld_Stm_Impl Implementation
44 * \ingroup IfxLld_Stm
45 * \defgroup IfxLld_Stm_Std Standard Driver
46 * \ingroup IfxLld_Stm
47 * \defgroup IfxLld_Stm_Impl_Enumerations Enumerations
48 * \ingroup IfxLld_Stm_Impl
49 * \defgroup IfxLld_Stm_Impl_Variables Global Variables
50 * \ingroup IfxLld_Stm_Impl
51 */
52
53 #ifndef IFXSTM_CFG_H
54 #define IFXSTM_CFG_H 1
55
56 /******************************************************************************/
57 /*----------------------------------Includes----------------------------------*/
58 /******************************************************************************/
59
60 #include "Cpu/Std/IfxCpu_Intrinsics.h"
61 #include "IfxStm_reg.h"
62 #include "Cpu/Std/Ifx_Types.h"
63
64 /******************************************************************************/
65 /*-----------------------------------Macros-----------------------------------*/
66 /******************************************************************************/
67
68 /** \brief STM count
69 */
70 #define IFXSTM_NUM_MODULES 4
71
72 /** \brief No Of Comparators per Stm
73 */
74 #define IFXSTM_NUM_COMPARATORS (2)
75
76 /******************************************************************************/
77 /*--------------------------------Enumerations--------------------------------*/
78 /******************************************************************************/
79
80 /** \addtogroup IfxLld_Stm_Impl_Enumerations
81 * \{ */
82 /** \brief List of the available STM resources
83 */
84 typedef enum
85 {
86 IfxStm_Index_none = -1, /**< \brief Not Selected */
87 IfxStm_Index_0 = 0, /**< \brief STM index 0 */
88 IfxStm_Index_1, /**< \brief STM index 1 */
89 IfxStm_Index_2, /**< \brief STM index 2 */
90 IfxStm_Index_3 /**< \brief STM index 3 */
91 } IfxStm_Index;
92
93 /** \} */
94
95 /** \addtogroup IfxLld_Stm_Impl_Variables
96 * \{ */
97
98 /******************************************************************************/
99 /*-------------------Global Exported Variables/Constants----------------------*/
100 /******************************************************************************/
101
102 IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxStm_cfg_indexMap[IFXSTM_NUM_MODULES];
103
104 /** \} */
105
106 #endif /* IFXSTM_CFG_H */
IfxStm_cfg_indexMap
IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxStm_cfg_indexMap[IFXSTM_NUM_MODULES]
Definition: IfxStm_cfg.h:102
IfxStm_Index
IfxStm_Index
List of the available STM resources.
Definition: IfxStm_cfg.h:84
IfxCpu_Intrinsics.h
IFXSTM_NUM_MODULES
#define IFXSTM_NUM_MODULES
STM count.
Definition: IfxStm_cfg.h:70
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxStm_Index_2
STM index 2.
Definition: IfxStm_cfg.h:89
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxStm_Index_1
STM index 1.
Definition: IfxStm_cfg.h:88
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxStm_Index_3
STM index 3.
Definition: IfxStm_cfg.h:90
IfxStm_Index_none
Not Selected.
Definition: IfxStm_cfg.h:86
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:140
IfxStm_Index_0
STM index 0.
Definition: IfxStm_cfg.h:87


iLLD_TC38A: Platform_Types.h Source File

  • Cpu
  • Std
Platform_Types.h
Go to the documentation of this file.
1 /**
2 * \file Platform_Types.h
3 *
4 * \version iLLD_1_0_1_12_0
5 * \copyright Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
6 *
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41 #ifndef PLATFORM_TYPES_H
42 #define PLATFORM_TYPES_H
43
44 /******************************************************************************
45 ** Includes **
46 ******************************************************************************/
47
48 /******************************************************************************
49 ** Global Macro Definitions **
50 ******************************************************************************/
51 #define PLATFORM_VENDOR_ID (17u)
52 #define PLATFORM_AR_RELEASE_MAJOR_VERSION (4u)
53 #define PLATFORM_AR_RELEASE_MINOR_VERSION (2u)
54 #define PLATFORM_AR_RELEASE_REVISION_VERSION (2u)
55 #define PLATFORM_SW_MAJOR_VERSION (1u)
56 #define PLATFORM_SW_MINOR_VERSION (0u)
57 #define PLATFORM_SW_PATCH_VERSION (0u)
58
59 /* [cover parentID={5294D975-045A-4d91-9A1A-B1765FAB4653}] */
60 /* CPU register width type definition */
61 #define CPU_TYPE_8 (8u)
62 #define CPU_TYPE_16 (16u)
63 #define CPU_TYPE_32 (32u)
64 /* Register width of CPU*/
65 #define CPU_TYPE CPU_TYPE_32 /* 32 bit */
66 /* [/cover] */
67
68
69 /* [cover parentID={FBA2FA55-430B-4dfb-82B1-C791F0878F9B}] */
70 /* Bit order type definition*/
71 #define MSB_FIRST (0u) /* Big Endian bit ordering */
72 #define LSB_FIRST (1u) /* Little Endian bit ordering */
73 /* Bit order of Register level*/
74 #define CPU_BIT_ORDER LSB_FIRST /* Little Endian */
75 /* [/cover] */
76
77
78 /* [cover parentID={0E2E6A28-264A-4d32-96EE-5F5C93286311}] */
79 /* Byte order type definition*/
80 #define HIGH_BYTE_FIRST (0u) /* Big Endian byte ordering */
81 #define LOW_BYTE_FIRST (1u) /* Little Endian byte ordering */
82 /* Byte order on Memory level*/
83 #define CPU_BYTE_ORDER LOW_BYTE_FIRST /* Little Endian */
84 /* [/cover] */
85
86
87 /* TRUE, FALSE symbol for Boolean types*/
88 /* [cover parentID={FF7F9840-8904-4b7d-83A7-988524B795DE}] */
89 #ifndef TRUE
90 #define TRUE (1u)
91 #endif
92 #ifndef FALSE
93 #define FALSE (0u)
94 #endif
95 /* [/cover] */
96 /******************************************************************************
97 ** Global Type Definitions **
98 ******************************************************************************/
99 /* AUTOSAR integer data types*/
100
101 /* unsigned char with a bit length that is the shortest one natively supported
102 by the platform.*/
103 /* [cover parentID={F7B51F71-6687-4e05-8408-7F5AAC55C638}] boolean [/cover]*/
104 typedef unsigned char boolean; /* for use with TRUE/FALSE */
105
106 /* 8bit unsigned : 0 .. 255 [0X00 .. 0XFF]*/
107 /* [cover parentID={4269E5AB-7F28-4803-8D60-7B4EC91CB087}] uint8 [/cover] */
108 typedef unsigned char uint8;
109
110 /* 16bit unsigned: 0..65535 [0x0000..0xFFFF]*/
111 /* [cover parentID={66E964CA-35D5-4013-BB61-1E824636D713}] uint16 [/cover] */
112 typedef unsigned short uint16;
113
114 /* 32bit unsigned: 0..4294967295 [0x00000000..0xFFFFFFFF]*/
115 /* [cover parentID={DA33B7A0-7CD3-45e7-9C9A-6D63FB8BA3DC}] uint32 [/cover] */
116 typedef unsigned long uint32;
117
118 /* 64bit unsigned
119 * 0..18446744073709551615 [0x0000000000000000..0xFFFFFFFFFFFFFFFF]*/
120 /* [cover parentID={3409E2A3-BF2D-44a5-9B00-A72300848166}] uint64 */
121 typedef unsigned long long uint64;
122
123 /* 8bit signed, 7 bit + 1 bit sign -128..+127 [0x80..0x7F]*/
124 /* [cover parentID={94E0756B-993D-4cae-9499-416CDFD6FEAF}] sint8[/cover]*/
125 typedef signed char sint8;
126
127 /* 16bit signed, 15 bit + 1 bit sign -32768..+32767 [0x8000..0x7FFF]*/
128 /* [cover parentID={B3482DFF-8DFF-41bd-95E0-0406E2451CB0}] sint16 [/cover]*/
129 typedef short sint16;
130
131 /* 32bit signed, 31 bit + 1 bit sign
132 -2147483648..+2147483647 [0x80000000..0x7FFFFFFF]*/
133 /* [cover parentID={B027B471-A1A2-456c-A015-35F4A34A88EF}] sint32 [/cover]*/
134 typedef long sint32;
135 /*
136 * 64bit signed, 63 bit + 1 bit sign
137 * -9223372036854775808..9223372036854775807
138 * [0x8000000000000000..0x7FFFFFFFFFFFFFFF]
139 */
140 /* [cover parentID={3CF3471C-EB1A-450c-B78F-4B96D226A1F5}] sint64 [/cover]*/
141 typedef long long sint64;
142
143 /* At least 8 bit*/
144 /* [cover parentID={F8719785-0A16-486e-AB85-0A2859402037}] uint8_least[/cover]*/
145 typedef unsigned long uint8_least;
146
147 /* At least 16 bit*/
148 /* [cover parentID={BEAD868D-0EC1-44f0-AFEE-B57401CC9E65}]uint16_least[/cover]*/
149 typedef unsigned long uint16_least;
150
151 /* least 32 bit*/
152 /* [cover parentID={9B9CC46A-0F61-4d25-8001-679CF210C135}]uint32_least[/cover]*/
153 typedef unsigned long uint32_least;
154
155 /* At least 7 bit + 1 bit sign*/
156 /* [cover parentID={5C0DE046-8407-4708-8D26-41B96731D89D}]sint8_least[/cover]*/
157 typedef signed long sint8_least;
158
159 /* At least 15 bit + 1 bit sign*/
160 /* [cover parentID={0A83DB6E-ECD8-42f0-B97C-057F9FBFEB6E}]sint16_least[/cover]*/
161 typedef signed long sint16_least;
162
163 /* At least 31 bit + 1 bit sign*/
164 /* [cover parentID={A65F0248-A0A7-4ab7-BAFA-A5428F4E8A96}]sint32_least[/cover]*/
165 typedef signed long sint32_least;
166
167 /* IEEE754-2008 single precision
168 * -3.4028235e+38..+3.4028235e+38*/
169 /* [cover parentID={BBC4F70E-DA81-4d37-BCA4-628A89B29517}] float32 [/cover]*/
170 typedef float float32; /* IEEE754-2008 single precision */
171
172 /* IEEE754-2008 double precision
173 * -1.7976931348623157e+308..+1.7976931348623157e+308*/
174 /* [cover parentID={0D62172C-9309-493a-8028-06A7299D7906}] float64 [/cover]*/
175 typedef double float64; /* IEEE754-2008 double precision */
176
177
178 /******************************************************************************
179 ** Global Constant Declarations **
180 ******************************************************************************/
181
182 /******************************************************************************
183 ** Global Variable Declarations **
184 ******************************************************************************/
185
186 /******************************************************************************
187 ** Global Function Declarations **
188 ******************************************************************************/
189
190 #endif /* PLATFORM_TYPES_H */
uint32
unsigned long uint32
Definition: Platform_Types.h:116
float32
float float32
Definition: Platform_Types.h:170
sint16_least
signed long sint16_least
Definition: Platform_Types.h:161
uint64
unsigned long long uint64
Definition: Platform_Types.h:121
sint16
short sint16
Definition: Platform_Types.h:129
sint32_least
signed long sint32_least
Definition: Platform_Types.h:165
uint8_least
unsigned long uint8_least
Definition: Platform_Types.h:145
sint64
long long sint64
Definition: Platform_Types.h:141
boolean
unsigned char boolean
Definition: Platform_Types.h:104
uint32_least
unsigned long uint32_least
Definition: Platform_Types.h:153
float64
double float64
Definition: Platform_Types.h:175
uint16
unsigned short uint16
Definition: Platform_Types.h:112
sint8_least
signed long sint8_least
Definition: Platform_Types.h:157
sint32
long sint32
Definition: Platform_Types.h:134
uint8
unsigned char uint8
Definition: Platform_Types.h:108
uint16_least
unsigned long uint16_least
Definition: Platform_Types.h:149
sint8
signed char sint8
Definition: Platform_Types.h:125


iLLD_TC38A: PwmHl.h Source File

  • Service
  • CpuGeneric
  • If
  • Ccu6If
PwmHl.h
Go to the documentation of this file.
1 /**
2 * \file PwmHl.h
3 * \brief Multi-channels, dual-complementary PWM interface
4 *
5 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
6 *
7 * $Date: 2014-02-27 20:08:18 GMT$
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 * \defgroup library_srvsw_if_pwmhl PWM HL interface
41 * \ingroup library_srvsw_if
42 *
43 */
44
45 #ifndef PWMHL_H_
46 #define PWMHL_H_ 1
47
48 #include "Cpu/Std/Ifx_Types.h"
49
50 typedef struct PwmHl_s PwmHl;
51 typedef void (*PwmHl_Start)(PwmHl *handle);
52 typedef void (*PwmHl_Pause)(PwmHl *handle);
53 typedef void (*PwmHl_Resume)(PwmHl *handle);
54 typedef void (*PwmHl_Stop)(PwmHl *handle);
55
56 typedef struct
57 {
58 PwmHl_Start start;
59 PwmHl_Stop stop;
60 } PwmHl_Functions;
61
62 /** \brief Structure of the TPwm interface */
63 struct PwmHl_s
64 {
65 float32 t12Frequency; /**< \brief Actual timer12 frequency */
66 Ifx_TimerValue t12Period; /**< \brief Actual timer 12 period */
67 float32 t13Frequency; /**< \brief Actual timer13 frequency */
68 Ifx_TimerValue t13Period; /**< \brief Actual timer 13 period */
69 #if IFX_CFG_USE_STANDARD_INTERFACE
70 PwmHl_Functions functions; /**< \brief Actual timer period */
71 #endif
72 };
73
74 /** \brief Configuration structure of the TPwm interface */
75 typedef struct
76 {
77 float32 t12Frequency; /**< \brief Specify expected T12 PWM frequency in Hertz */
78 Ifx_TimerValue t12Period; /**< \brief Specify expected T12 PWM period in ticks. */
79 float32 t13Frequency; /**< \brief Specify expected T13 PWM frequency in Hertz */
80 Ifx_TimerValue t13Period; /**< \brief Specify expected T13 PWM period in ticks. */
81 Ifx_TimerValue phaseDelay; /**< \brief Specify the ticks before before updating each ouput hall pattern */
82 Ifx_TimerValue noiseFilter; /**< \brief Specify hall sensor noise filter */
83
84 Ifx_ActiveState activeState; /**< \brief Active state select for PWM output. Active high means that the PWM edge is rising at the elapsed of waitingTicks */
85 } PwmHl_Config;
86
87 #if IFX_CFG_USE_STANDARD_INTERFACE
88 IFX_INLINE void PwmHl_start(PwmHl *handle) {handle->functions.start(handle); }
89 IFX_INLINE void PwmHl_stop(PwmHl *handle) {handle->functions.stop(handle); }
90 #endif
91
92 #endif /* TPWM_H_ */
PwmHl_s::t13Frequency
float32 t13Frequency
Actual timer13 frequency.
Definition: PwmHl.h:67
PwmHl_Config::phaseDelay
Ifx_TimerValue phaseDelay
Specify the ticks before before updating each ouput hall pattern.
Definition: PwmHl.h:81
PwmHl_Resume
void(* PwmHl_Resume)(PwmHl *handle)
Definition: PwmHl.h:53
PwmHl_Functions::stop
PwmHl_Stop stop
Definition: PwmHl.h:59
PwmHl_s::t12Frequency
float32 t12Frequency
Actual timer12 frequency.
Definition: PwmHl.h:65
float32
float float32
Definition: Platform_Types.h:170
PwmHl_Config
Configuration structure of the TPwm interface.
Definition: PwmHl.h:75
PwmHl_Config::activeState
Ifx_ActiveState activeState
Active state select for PWM output. Active high means that the PWM edge is rising at the elapsed of w...
Definition: PwmHl.h:84
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:113
PwmHl_s
Structure of the TPwm interface.
Definition: PwmHl.h:63
PwmHl_Config::noiseFilter
Ifx_TimerValue noiseFilter
Specify hall sensor noise filter.
Definition: PwmHl.h:82
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
PwmHl_Stop
void(* PwmHl_Stop)(PwmHl *handle)
Definition: PwmHl.h:54
PwmHl_Functions::start
PwmHl_Start start
Definition: PwmHl.h:58
PwmHl_Start
void(* PwmHl_Start)(PwmHl *handle)
Definition: PwmHl.h:51
PwmHl_s::t12Period
Ifx_TimerValue t12Period
Actual timer 12 period.
Definition: PwmHl.h:66
PwmHl_s::t13Period
Ifx_TimerValue t13Period
Actual timer 13 period.
Definition: PwmHl.h:68
PwmHl_Functions
Definition: PwmHl.h:56
PwmHl_Pause
void(* PwmHl_Pause)(PwmHl *handle)
Definition: PwmHl.h:52
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101


iLLD_TC38A: info.dox File Reference

info.dox File Reference


iLLD_TC38A: SpiIf.c Source File

  • Service
  • CpuGeneric
  • If
SpiIf.c
Go to the documentation of this file.
1 /**
2 * \file SpiIf.c
3 * \brief SPI interface
4 *
5 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
6 *
7 * $Date: 2014-02-27 20:08:21 GMT$
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 #include "SpiIf.h"
43
44 void SpiIf_initConfig(SpiIf_Config *config)
45 {
46 config->mode = SpiIf_Mode_master;
47 config->rxPriority = 0;
48 config->txPriority = 0;
49 config->erPriority = 0;
50 config->isrProvider = IfxSrc_Tos_cpu0;
51 config->bufferSize = 0;
52 config->buffer = NULL_PTR;
53 config->maximumBaudrate = 0;
54 }
55
56
57 void SpiIf_initChannelConfig(SpiIf_ChConfig *config, SpiIf *driver)
58 {
59 config->driver = driver;
60 config->baudrate = 0;
61 config->mode.enabled = 1;
62 config->mode.autoCS = 1;
63 config->mode.loopback = 0;
64 config->mode.clockPolarity = SpiIf_ClockPolarity_idleLow;
65 config->mode.shiftClock = SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge;
66 config->mode.dataHeading = SpiIf_DataHeading_msbFirst;
67 config->mode.dataWidth = 8;
68 config->mode.csActiveLevel = Ifx_ActiveState_low;
69 config->mode.csLeadDelay = SpiIf_SlsoTiming_0;
70 config->mode.csTrailDelay = SpiIf_SlsoTiming_0;
71 config->mode.csInactiveDelay = SpiIf_SlsoTiming_0;
72 config->mode.parityCheck = 0;
73 config->mode.parityMode = Ifx_ParityMode_even;
74 config->errorChecks.baudrate = 0;
75 config->errorChecks.phase = 0;
76 config->errorChecks.receive = 0;
77 config->errorChecks.transmit = 0;
78 }
Ifx_ActiveState_low
The signal is low active.
Definition: Ifx_Types.h:115
SpiIf_ChMode::dataHeading
uint32 dataHeading
SpiIf_DataHeading
Definition: SpiIf.h:193
SpiIf_ChConfig_::baudrate
float32 baudrate
Specifies the SPI baudrate.
Definition: SpiIf.h:228
SpiIf_ChConfig_
Definition: SpiIf.h:225
SpiIf_ChMode::csLeadDelay
SpiIf_SlsoTiming_HalfTsclk csLeadDelay
CS Lead Delay in Tsclk/2 units.
Definition: SpiIf.h:202
SpiIf_ChMode::loopback
uint32 loopback
0 = normal mode, 1 = loopback mode
Definition: SpiIf.h:190
SpiIf_ChMode::dataWidth
uint32 dataWidth
range 2 .. 32 bits (note 2 = 2-bits, 3 = 3-bits ...
Definition: SpiIf.h:194
SpiIf_Config
Definition: SpiIf.h:160
Ifx_ParityMode_even
Definition: Ifx_Types.h:121
SpiIf_ChMode::parityCheck
uint32 parityCheck
0 = disabled, 1 = enabled
Definition: SpiIf.h:198
Spi_ErrorChecks::baudrate
uint32 baudrate
TRUE = checked, FALSE = ignored.
Definition: SpiIf.h:178
SpiIf_
Definition: SpiIf.h:150
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
SpiIf.h
SPI interface types.
SpiIf_ChMode::csInactiveDelay
SpiIf_SlsoTiming_HalfTsclk csInactiveDelay
CS Inactive Delay in Tsclk/2 units.
Definition: SpiIf.h:201
SpiIf_DataHeading_msbFirst
Definition: SpiIf.h:90
SpiIf_ChMode::clockPolarity
uint32 clockPolarity
SpiIf_ClockPolarity
Definition: SpiIf.h:191
SpiIf_Config::maximumBaudrate
float32 maximumBaudrate
Maximum baudrate used by the channels, this value is used to optimise the SPI internal clock...
Definition: SpiIf.h:173
SpiIf_ChMode::shiftClock
uint32 shiftClock
SpiIf_ShiftClock
Definition: SpiIf.h:192
SpiIf_initChannelConfig
void SpiIf_initChannelConfig(SpiIf_ChConfig *config, SpiIf *driver)
Definition: SpiIf.c:57
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:68
SpiIf_Mode_master
Master mode.
Definition: SpiIf.h:130
SpiIf_Config::bufferSize
Ifx_SizeT bufferSize
Specifies the number of channels that can be buffered. If 0, buffering is disabled.
Definition: SpiIf.h:167
SpiIf_ChMode::enabled
uint32 enabled
1 = channel enabled, 0 = channel disabled
Definition: SpiIf.h:188
SpiIf_ChMode::parityMode
uint32 parityMode
Ifx_ParityMode
Definition: SpiIf.h:199
Spi_ErrorChecks::transmit
uint32 transmit
TRUE = checked, FALSE = ignored.
Definition: SpiIf.h:181
SpiIf_initConfig
void SpiIf_initConfig(SpiIf_Config *config)
Definition: SpiIf.c:44
SpiIf_Config::erPriority
Ifx_Priority erPriority
Specifies the priority of the error interrupt.
Definition: SpiIf.h:165
SpiIf_ClockPolarity_idleLow
Definition: SpiIf.h:103
SpiIf_SlsoTiming_0
Definition: SpiIf.h:76
SpiIf_Config::buffer
void * buffer
Specifies the buffer location.The buffer parameter must point on a free memory location where the buf...
Definition: SpiIf.h:168
SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge
Definition: SpiIf.h:96
SpiIf_Config::isrProvider
IfxSrc_Tos isrProvider
Specifies the handler of the interrupts.
Definition: SpiIf.h:166
SpiIf_ChMode::autoCS
uint32 autoCS
1 = chip select is controlled by the hardware module or, 0 = by software.
Definition: SpiIf.h:189
SpiIf_ChConfig_::driver
SpiIf * driver
Pointer to an implementation of SPI interface driver, e.g. IfxQspi_SpiMaster_ChannelConfig.
Definition: SpiIf.h:227
SpiIf_Config::rxPriority
Ifx_Priority rxPriority
Specifies the priority of the receive interrupt.
Definition: SpiIf.h:163
SpiIf_Config::mode
SpiIf_Mode mode
Specifies the interface operation mode.
Definition: SpiIf.h:162
Spi_ErrorChecks::phase
uint32 phase
TRUE = checked, FALSE = ignored.
Definition: SpiIf.h:179
SpiIf_ChMode::csTrailDelay
SpiIf_SlsoTiming_HalfTsclk csTrailDelay
CS Trail Delay in Tsclk/2 units.
Definition: SpiIf.h:203
SpiIf_ChConfig_::mode
SpiIf_ChMode mode
Definition: SpiIf.h:229
SpiIf_ChMode::csActiveLevel
uint32 csActiveLevel
Ifx_ActiveState
Definition: SpiIf.h:196
SpiIf_Config::txPriority
Ifx_Priority txPriority
Specifies the priority of the transmit interrupt.
Definition: SpiIf.h:164
SpiIf_ChConfig_::errorChecks
Spi_ErrorChecks errorChecks
Definition: SpiIf.h:230
Spi_ErrorChecks::receive
uint32 receive
TRUE = checked, FALSE = ignored.
Definition: SpiIf.h:180


iLLD_TC38A: SpiIf.h Source File

  • Service
  • CpuGeneric
  • If
SpiIf.h
Go to the documentation of this file.
1 /**
2 * \file SpiIf.h
3 * \brief SPI interface types
4 *
5 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
6 *
7 * $Date: 2014-02-27 20:08:22 GMT$
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 * \defgroup library_srvsw_if_spi SPI interface
41 * \ingroup library_srvsw_if
42 *
43 */
44
45 #ifndef SPIIF_H
46 #define SPIIF_H 1
47
48 //________________________________________________________________________________________
49 // INCLUDES
50
51 #include "Src/Std/IfxSrc.h" /* FIXME interface should not have dependencies to the HAL, an If type needs to be defined */
52
53 /** \addtogroup library_srvsw_if_spi
54 * \{ */
55
56 //________________________________________________________________________________________
57 // CONFIGURATION SWITCHES
58
59 //________________________________________________________________________________________
60 // HELPER MACROS
61
62 //________________________________________________________________________________________
63 // BASIC TYPES
64
65 /** \brief SPI Interface Status */
66 typedef enum
67 {
68 SpiIf_Status_ok,
69 SpiIf_Status_busy,
70 SpiIf_Status_unknown
71 } SpiIf_Status;
72
73 /** \brief Slave select output timing */
74 typedef enum
75 {
76 SpiIf_SlsoTiming_0 = 0, /**< zero delay clock */
77 SpiIf_SlsoTiming_1, /**< 1 half-clock delay */
78 SpiIf_SlsoTiming_2, /**< 2 half-clock delay */
79 SpiIf_SlsoTiming_3, /**< 3 half-clock delay */
80 SpiIf_SlsoTiming_4, /**< 4 half-clock delay */
81 SpiIf_SlsoTiming_5, /**< 5 half-clock delay */
82 SpiIf_SlsoTiming_6, /**< 6 half-clock delay */
83 SpiIf_SlsoTiming_7 /**< 7 half-clock delay */
84 } SpiIf_SlsoTiming;
85
86 /** \brief Heading */
87 typedef enum
88 {
89 SpiIf_DataHeading_lsbFirst = 0, /**< LSB first */
90 SpiIf_DataHeading_msbFirst /**< MSB first */
91 } SpiIf_DataHeading;
92
93 /** \brief Clock phase */
94 typedef enum
95 {
96 SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge = 0, /**< Shift Tx data on leading edge */
97 SpiIf_ShiftClock_shiftTransmitDataOnTrailingEdge /**< Shift Tx data on training edge */
98 } SpiIf_ShiftClock;
99
100 /** \brief Clock polarity */
101 typedef enum
102 {
103 SpiIf_ClockPolarity_idleLow = 0, /**< Idle clock line is low */
104 SpiIf_ClockPolarity_idleHigh /**< Idle clock line is high */
105 } SpiIf_ClockPolarity;
106
107 //________________________________________________________________________________________
108 // DATA STRUCTURES
109
110 /** \brief Alias to the channel structure */
111 typedef struct SpiIf_Ch_ SpiIf_Ch;
112 typedef struct SpiIf_ChConfig_ SpiIf_ChConfig;
113 typedef struct SpiIf_ SpiIf;
114
115 typedef volatile struct
116 {
117 uint32 onTransfer : 1; /**< \brief Channel status: On transfer */
118 uint32 byteAccess : 1; /**< \brief Channel status: 8bit / 16 bit access */
119 } SpiIf_Flags;
120
121 typedef struct
122 {
123 void *data;
124 Ifx_SizeT remaining;
125 } SpiIf_Job;
126
127 /** SPI operation modes */
128 typedef enum
129 { /* FIXME check conflicts with IfxQspi_Mode */
130 SpiIf_Mode_master, /**< \brief Master mode */
131 SpiIf_Mode_slave, /**< \brief Slave mode */
132 SpiIf_Mode_undefined /**< \brief Undefined mode */
133 } SpiIf_Mode;
134
135 typedef SpiIf_Status (*SpiIf_Exchange)(SpiIf_Ch *handle, const void *src, void *dest, Ifx_SizeT numOfData);
136 typedef SpiIf_Status (*SpiIf_GetStatus)(SpiIf_Ch *handle);
137 typedef void (*SpiIf_OnEvent)(SpiIf *handle);
138 typedef uint32 SpiIf_SlsoTiming_HalfTsclk; /* SPI slave select output delay - in half-clock (1/(2*baudrate)) units. */
139 /* A value of 0 would set a delay of 1/Fqspi */
140
141 typedef struct
142 {
143 SpiIf_Exchange exchange;
144 SpiIf_GetStatus getStatus;
145 SpiIf_OnEvent onTx;
146 SpiIf_OnEvent onRx;
147 SpiIf_OnEvent onError;
148 } SpiIf_funcs;
149
150 struct SpiIf_
151 {
152 pvoid driver; /**< \brief Spi specific driver */
153 uint32 sending; /**< \brief */
154 SpiIf_Ch *activeChannel; /**< \brief Channel actually transmitting / receiving */
155 uint32 txCount;
156 uint32 rxCount;
157 SpiIf_funcs functions;
158 };
159
160 typedef struct
161 {
162 SpiIf_Mode mode; /**< \brief Specifies the interface operation mode */
163 Ifx_Priority rxPriority; /**< \brief Specifies the priority of the receive interrupt */
164 Ifx_Priority txPriority; /**< \brief Specifies the priority of the transmit interrupt */
165 Ifx_Priority erPriority; /**< \brief Specifies the priority of the error interrupt */
166 IfxSrc_Tos isrProvider; /**< \brief Specifies the handler of the interrupts */
167 Ifx_SizeT bufferSize; /**< \brief Specifies the number of channels that can be buffered. If 0, buffering is disabled */
168 void *buffer; /**< \brief Specifies the buffer location.The buffer parameter must point on a free memory location where the
169 * buffer object will be initialised. The Size of this area must be at least
170 * equals to "Size + sizeof(Ifx_Fifo) + 8",
171 * with "Size=config->bufferSize * Ifx_AlignOn32(sizeof(Spi_Ch*))". Not tacking
172 * this in account may result in unpredictable behaviour. */
173 float32 maximumBaudrate; /**< \brief Maximum baudrate used by the channels, this value is used to optimise the SPI internal clock */
174 } SpiIf_Config;
175
176 typedef struct
177 {
178 uint32 baudrate : 1; /**< \brief TRUE = checked, FALSE = ignored */
179 uint32 phase : 1; /**< \brief TRUE = checked, FALSE = ignored */
180 uint32 receive : 1; /**< \brief TRUE = checked, FALSE = ignored */
181 uint32 transmit : 1; /**< \brief TRUE = checked, FALSE = ignored */
182 uint32 reserved : 28;
183 } Spi_ErrorChecks;
184
185 /** Channel operation mode */
186 typedef struct
187 {
188 uint32 enabled : 1; /**< \brief 1 = channel enabled, 0 = channel disabled */
189 uint32 autoCS : 1; /**< \brief 1 = chip select is controlled by the hardware module or, 0 = by software. */
190 uint32 loopback : 1; /**< \brief 0 = normal mode, 1 = loopback mode */
191 uint32 clockPolarity : 1; /**< \brief \ref SpiIf_ClockPolarity*/
192 uint32 shiftClock : 1; /**< \brief \ref SpiIf_ShiftClock */
193 uint32 dataHeading : 1; /**< \brief \ref SpiIf_DataHeading */
194 uint32 dataWidth : 6; /**< \brief range 2 .. 32 bits (note 2 = 2-bits, 3 = 3-bits ... */
195
196 uint32 csActiveLevel : 1; /**< \brief \ref Ifx_ActiveState */
197
198 uint32 parityCheck : 1; /**< \brief 0 = disabled, 1 = enabled */
199 uint32 parityMode : 1; /**< \brief \ref Ifx_ParityMode */
200
201 SpiIf_SlsoTiming_HalfTsclk csInactiveDelay; /**< \brief CS Inactive Delay in Tsclk/2 units */
202 SpiIf_SlsoTiming_HalfTsclk csLeadDelay; /**< \brief CS Lead Delay in Tsclk/2 units */
203 SpiIf_SlsoTiming_HalfTsclk csTrailDelay; /**< \brief CS Trail Delay in Tsclk/2 units */
204
205 } SpiIf_ChMode;
206
207 /** \brief SPI channel callback prototype */
208 typedef void (*SpiIf_Cbk)(void *data);
209 typedef void (*TxRxHandler)(SpiIf_Ch *handle);
210
211 struct SpiIf_Ch_
212 {
213 SpiIf *driver; /**< \brief Pointer to the SPI interface driver */
214 SpiIf_Flags flags;
215 Spi_ErrorChecks errorChecks; /**< \brief Error checks */
216 sint32 baudrate; /**< \brief Real baudrate */
217 SpiIf_Job tx;
218 SpiIf_Job rx;
219 SpiIf_Cbk onExchangeEnd; /**< \brief Specifies the callback function on end of exchange */
220 void *callbackData; /**< \brief Specifies pointer to the user specific data on transmit end */
221 TxRxHandler txHandler;
222 TxRxHandler rxHandler;
223 };
224
225 struct SpiIf_ChConfig_
226 {
227 SpiIf *driver; /**< \brief Pointer to an implementation of SPI interface driver, e.g. \ref IfxQspi_SpiMaster_ChannelConfig */
228 float32 baudrate; /**< \brief Specifies the SPI baudrate */
229 SpiIf_ChMode mode; /**< \brief */
230 Spi_ErrorChecks errorChecks; /**< \brief */
231 };
232
233 //________________________________________________________________________________________
234 // EXPORTED VARIABLES
235
236 //________________________________________________________________________________________
237 // FUNCTION PROTOTYPES
238
239 IFX_INLINE void SpiIf_wait(SpiIf_Ch *handle);
240 IFX_EXTERN void SpiIf_initConfig(SpiIf_Config *config);
241 IFX_EXTERN void SpiIf_initChannelConfig(SpiIf_ChConfig *config, SpiIf *driver);
242
243 /** \name Virtual functions
244 * These functions are implemented by a driver.
245 * \{ */
246 IFX_INLINE SpiIf_Status SpiIf_exchange(SpiIf_Ch *handle, const void *src, void *dest, Ifx_SizeT numOfData);
247 IFX_INLINE SpiIf_Status SpiIf_getStatus(SpiIf_Ch *handle);
248 /** \} */
249
250 /** \} */
251 //________________________________________________________________________________________
252 // INLINE FUNCTION IMPLEMENTATIONS
253
254 /** Wait as long as the transmission is on-going
255 * \note This function blocks CPU for some-time */
256 IFX_INLINE void SpiIf_wait(SpiIf_Ch *handle)
257 {
258 while (handle->flags.onTransfer != FALSE)
259 {}
260 }
261
262
263 /** Perform the SPI exchange operation.
264 * \param handle Pointer to an implementation of SPI interface driver
265 * \param src Pointer to the start of data buffer for data to transmit
266 * \param dest Pointer to the start of data buffer for received data
267 * \param numOfData specifies number of byte/bit to transfer
268 * \return STATUS of SPI
269 * \note the src and dest may be the same data location.
270 */
271 IFX_INLINE SpiIf_Status SpiIf_exchange(SpiIf_Ch *handle, const void *src, void *dest, Ifx_SizeT numOfData)
272 {
273 return handle->driver->functions.exchange(handle, src, dest, numOfData);
274 }
275
276
277 /** get the SPI status
278 * * \param handle Pointer to an implementation of SPI interface driver
279 * \return STATUS of SPI
280 * */
281 IFX_INLINE SpiIf_Status SpiIf_getStatus(SpiIf_Ch *handle)
282 {
283 return handle->driver->functions.getStatus(handle);
284 }
285
286
287 //________________________________________________________________________________________
288 #endif
SpiIf_DataHeading
SpiIf_DataHeading
Heading.
Definition: SpiIf.h:87
SpiIf_ChMode::dataHeading
uint32 dataHeading
SpiIf_DataHeading
Definition: SpiIf.h:193
SpiIf_funcs::getStatus
SpiIf_GetStatus getStatus
Definition: SpiIf.h:144
SpiIf_funcs::onRx
SpiIf_OnEvent onRx
Definition: SpiIf.h:146
SpiIf_funcs
Definition: SpiIf.h:141
SpiIf_ChConfig_::baudrate
float32 baudrate
Specifies the SPI baudrate.
Definition: SpiIf.h:228
SpiIf_ChConfig_
Definition: SpiIf.h:225
SpiIf_ChMode::csLeadDelay
SpiIf_SlsoTiming_HalfTsclk csLeadDelay
CS Lead Delay in Tsclk/2 units.
Definition: SpiIf.h:202
SpiIf_Ch_::tx
SpiIf_Job tx
Definition: SpiIf.h:217
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:100
SpiIf_ChMode::loopback
uint32 loopback
0 = normal mode, 1 = loopback mode
Definition: SpiIf.h:190
Spi_ErrorChecks
Definition: SpiIf.h:176
SpiIf_ChMode::dataWidth
uint32 dataWidth
range 2 .. 32 bits (note 2 = 2-bits, 3 = 3-bits ...
Definition: SpiIf.h:194
SpiIf_::driver
pvoid driver
Spi specific driver.
Definition: SpiIf.h:152
SpiIf_Config
Definition: SpiIf.h:160
TxRxHandler
void(* TxRxHandler)(SpiIf_Ch *handle)
Definition: SpiIf.h:209
SpiIf_SlsoTiming_7
Definition: SpiIf.h:83
SpiIf_::activeChannel
SpiIf_Ch * activeChannel
Channel actually transmitting / receiving.
Definition: SpiIf.h:154
SpiIf_SlsoTiming_5
Definition: SpiIf.h:81
uint32
unsigned long uint32
Definition: Platform_Types.h:116
Spi_ErrorChecks::reserved
uint32 reserved
Definition: SpiIf.h:182
SpiIf_Ch_::callbackData
void * callbackData
Specifies pointer to the user specific data on transmit end.
Definition: SpiIf.h:220
SpiIf_ChMode::parityCheck
uint32 parityCheck
0 = disabled, 1 = enabled
Definition: SpiIf.h:198
float32
float float32
Definition: Platform_Types.h:170
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
pvoid
void * pvoid
void pointer
Definition: Ifx_Types.h:54
IfxSrc.h
SRC basic functionality.
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
SpiIf_ClockPolarity_idleHigh
Definition: SpiIf.h:104
SpiIf_wait
IFX_INLINE void SpiIf_wait(SpiIf_Ch *handle)
Definition: SpiIf.h:256
Spi_ErrorChecks::baudrate
uint32 baudrate
TRUE = checked, FALSE = ignored.
Definition: SpiIf.h:178
SpiIf_
Definition: SpiIf.h:150
SpiIf_Ch_::baudrate
sint32 baudrate
Real baudrate.
Definition: SpiIf.h:216
SpiIf_SlsoTiming
SpiIf_SlsoTiming
Slave select output timing.
Definition: SpiIf.h:74
FALSE
#define FALSE
Definition: Platform_Types.h:93
SpiIf_ChMode::csInactiveDelay
SpiIf_SlsoTiming_HalfTsclk csInactiveDelay
CS Inactive Delay in Tsclk/2 units.
Definition: SpiIf.h:201
SpiIf_ShiftClock
SpiIf_ShiftClock
Clock phase.
Definition: SpiIf.h:94
SpiIf_Flags::byteAccess
uint32 byteAccess
Channel status: 8bit / 16 bit access.
Definition: SpiIf.h:118
SpiIf_Mode_slave
Slave mode.
Definition: SpiIf.h:131
SpiIf_Status_unknown
Definition: SpiIf.h:70
SpiIf_DataHeading_msbFirst
Definition: SpiIf.h:90
SpiIf_Status_ok
Definition: SpiIf.h:68
SpiIf_ChMode::clockPolarity
uint32 clockPolarity
SpiIf_ClockPolarity
Definition: SpiIf.h:191
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
SpiIf_Config::maximumBaudrate
float32 maximumBaudrate
Maximum baudrate used by the channels, this value is used to optimise the SPI internal clock...
Definition: SpiIf.h:173
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
SpiIf_funcs::onTx
SpiIf_OnEvent onTx
Definition: SpiIf.h:145
SpiIf_funcs::exchange
SpiIf_Exchange exchange
Definition: SpiIf.h:143
SpiIf_SlsoTiming_HalfTsclk
uint32 SpiIf_SlsoTiming_HalfTsclk
Definition: SpiIf.h:138
SpiIf_::functions
SpiIf_funcs functions
Definition: SpiIf.h:157
SpiIf_ChMode::shiftClock
uint32 shiftClock
SpiIf_ShiftClock
Definition: SpiIf.h:192
SpiIf_initChannelConfig
IFX_EXTERN void SpiIf_initChannelConfig(SpiIf_ChConfig *config, SpiIf *driver)
Definition: SpiIf.c:57
SpiIf_ClockPolarity
SpiIf_ClockPolarity
Clock polarity.
Definition: SpiIf.h:101
SpiIf_SlsoTiming_2
Definition: SpiIf.h:78
SpiIf_::txCount
uint32 txCount
Definition: SpiIf.h:155
SpiIf_Status_busy
Definition: SpiIf.h:69
SpiIf_Flags::onTransfer
uint32 onTransfer
Channel status: On transfer.
Definition: SpiIf.h:117
SpiIf_Mode_master
Master mode.
Definition: SpiIf.h:130
SpiIf_SlsoTiming_4
Definition: SpiIf.h:80
SpiIf_Config::bufferSize
Ifx_SizeT bufferSize
Specifies the number of channels that can be buffered. If 0, buffering is disabled.
Definition: SpiIf.h:167
SpiIf_ChMode::enabled
uint32 enabled
1 = channel enabled, 0 = channel disabled
Definition: SpiIf.h:188
SpiIf_ChMode
Definition: SpiIf.h:186
SpiIf_Ch_::flags
SpiIf_Flags flags
Definition: SpiIf.h:214
SpiIf_Exchange
SpiIf_Status(* SpiIf_Exchange)(SpiIf_Ch *handle, const void *src, void *dest, Ifx_SizeT numOfData)
Definition: SpiIf.h:135
SpiIf_Ch_::onExchangeEnd
SpiIf_Cbk onExchangeEnd
Specifies the callback function on end of exchange.
Definition: SpiIf.h:219
SpiIf_ChMode::parityMode
uint32 parityMode
Ifx_ParityMode
Definition: SpiIf.h:199
Spi_ErrorChecks::transmit
uint32 transmit
TRUE = checked, FALSE = ignored.
Definition: SpiIf.h:181
SpiIf_initConfig
IFX_EXTERN void SpiIf_initConfig(SpiIf_Config *config)
Definition: SpiIf.c:44
SpiIf_Config::erPriority
Ifx_Priority erPriority
Specifies the priority of the error interrupt.
Definition: SpiIf.h:165
SpiIf_ClockPolarity_idleLow
Definition: SpiIf.h:103
SpiIf_Ch_::rx
SpiIf_Job rx
Definition: SpiIf.h:218
SpiIf_SlsoTiming_0
Definition: SpiIf.h:76
SpiIf_::rxCount
uint32 rxCount
Definition: SpiIf.h:156
SpiIf_GetStatus
SpiIf_Status(* SpiIf_GetStatus)(SpiIf_Ch *handle)
Definition: SpiIf.h:136
SpiIf_DataHeading_lsbFirst
Definition: SpiIf.h:89
SpiIf_Job::remaining
Ifx_SizeT remaining
Definition: SpiIf.h:124
SpiIf_::sending
uint32 sending
Definition: SpiIf.h:153
SpiIf_Config::buffer
void * buffer
Specifies the buffer location.The buffer parameter must point on a free memory location where the buf...
Definition: SpiIf.h:168
SpiIf_Ch_::txHandler
TxRxHandler txHandler
Definition: SpiIf.h:221
SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge
Definition: SpiIf.h:96
SpiIf_Config::isrProvider
IfxSrc_Tos isrProvider
Specifies the handler of the interrupts.
Definition: SpiIf.h:166
SpiIf_Job
Definition: SpiIf.h:121
SpiIf_ChMode::autoCS
uint32 autoCS
1 = chip select is controlled by the hardware module or, 0 = by software.
Definition: SpiIf.h:189
SpiIf_Ch_::driver
SpiIf * driver
Pointer to the SPI interface driver.
Definition: SpiIf.h:213
SpiIf_Config::rxPriority
Ifx_Priority rxPriority
Specifies the priority of the receive interrupt.
Definition: SpiIf.h:163
SpiIf_Config::mode
SpiIf_Mode mode
Specifies the interface operation mode.
Definition: SpiIf.h:162
Spi_ErrorChecks::phase
uint32 phase
TRUE = checked, FALSE = ignored.
Definition: SpiIf.h:179
sint32
long sint32
Definition: Platform_Types.h:134
SpiIf_exchange
IFX_INLINE SpiIf_Status SpiIf_exchange(SpiIf_Ch *handle, const void *src, void *dest, Ifx_SizeT numOfData)
Definition: SpiIf.h:271
SpiIf_Ch_::rxHandler
TxRxHandler rxHandler
Definition: SpiIf.h:222
SpiIf_SlsoTiming_6
Definition: SpiIf.h:82
SpiIf_ChMode::csTrailDelay
SpiIf_SlsoTiming_HalfTsclk csTrailDelay
CS Trail Delay in Tsclk/2 units.
Definition: SpiIf.h:203
SpiIf_ChConfig_::mode
SpiIf_ChMode mode
Definition: SpiIf.h:229
SpiIf_ShiftClock_shiftTransmitDataOnTrailingEdge
Definition: SpiIf.h:97
SpiIf_SlsoTiming_3
Definition: SpiIf.h:79
SpiIf_Mode_undefined
Undefined mode.
Definition: SpiIf.h:132
SpiIf_Status
SpiIf_Status
SPI Interface Status.
Definition: SpiIf.h:66
SpiIf_funcs::onError
SpiIf_OnEvent onError
Definition: SpiIf.h:147
SpiIf_ChMode::csActiveLevel
uint32 csActiveLevel
Ifx_ActiveState
Definition: SpiIf.h:196
SpiIf_Mode
SpiIf_Mode
Definition: SpiIf.h:128
SpiIf_Config::txPriority
Ifx_Priority txPriority
Specifies the priority of the transmit interrupt.
Definition: SpiIf.h:164
SpiIf_getStatus
IFX_INLINE SpiIf_Status SpiIf_getStatus(SpiIf_Ch *handle)
Definition: SpiIf.h:281
SpiIf_Flags
Definition: SpiIf.h:115
SpiIf_Cbk
void(* SpiIf_Cbk)(void *data)
SPI channel callback prototype.
Definition: SpiIf.h:208
SpiIf_Ch_::errorChecks
Spi_ErrorChecks errorChecks
Error checks.
Definition: SpiIf.h:215
SpiIf_SlsoTiming_1
Definition: SpiIf.h:77
SpiIf_Job::data
void * data
Definition: SpiIf.h:123
SpiIf_OnEvent
void(* SpiIf_OnEvent)(SpiIf *handle)
Definition: SpiIf.h:137
SpiIf_Ch_
Definition: SpiIf.h:211
Spi_ErrorChecks::receive
uint32 receive
TRUE = checked, FALSE = ignored.
Definition: SpiIf.h:180


iLLD_TC38A: TPwm.h Source File

  • Service
  • CpuGeneric
  • If
  • Ccu6If
TPwm.h
Go to the documentation of this file.
1 /**
2 * \file TPwm.h
3 * \brief TPWM interface
4 *
5 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
6 *
7 * $Date: 2014-02-27 20:08:18 GMT$
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 * \defgroup library_srvsw_if_tpwm TPWM interface
41 * \ingroup library_srvsw_if
42 *
43 */
44
45 #ifndef TPWM_H_
46 #define TPWM_H_ 1
47
48 #include "Cpu/Std/Ifx_Types.h"
49
50 typedef struct TPwm_s TPwm;
51 typedef void (*TPwm_Start)(TPwm *handle);
52 typedef void (*TPwm_Pause)(TPwm *handle);
53 typedef void (*TPwm_Resume)(TPwm *handle);
54 typedef void (*TPwm_Stop)(TPwm *handle);
55
56 typedef struct
57 {
58 TPwm_Start start;
59 TPwm_Pause pause;
60 TPwm_Resume resume;
61 TPwm_Stop stop;
62 } TPwm_Functions;
63
64 /** \brief Structure of the TPwm interface */
65 struct TPwm_s
66 {
67 float32 frequency; /**< \brief Actual frequency */
68 Ifx_TimerValue period; /**< \brief Actual timer period */
69 #if IFX_CFG_USE_STANDARD_INTERFACE
70 TPwm_Functions functions; /**< \brief Actual timer period */
71 #endif
72 };
73
74 /** \brief Configuration structure of the TPwm interface */
75 typedef struct
76 {
77 float32 frequency; /**< \brief Specify expected PWM frequency in Hertz */
78 Ifx_TimerValue waitingTime; /**< \brief Specify the expected ticks before timer starts (TWAIT) */
79 Ifx_TimerValue activeCount; /**< \brief Specify active PWM period (TCOUNT) */
80 Ifx_TimerValue period; /**< \brief Specify expected PWM period in ticks. */
81 Ifx_ActiveState activeState; /**< \brief Active state select for PWM output. Active high means that the PWM edge is rising at the elapsed of waitingTicks */
82 } TPwm_Config;
83
84 #if IFX_CFG_USE_STANDARD_INTERFACE
85 IFX_INLINE void TPwm_start(TPwm *handle) {handle->functions.start(handle); }
86 IFX_INLINE void TPwm_pause(TPwm *handle) {handle->functions.pause(handle); }
87 IFX_INLINE void TPwm_resume(TPwm *handle) {handle->functions.resume(handle); }
88 IFX_INLINE void TPwm_stop(TPwm *handle) {handle->functions.stop(handle); }
89 #endif
90
91 #endif /* TPWM_H_ */
TPwm_Pause
void(* TPwm_Pause)(TPwm *handle)
Definition: TPwm.h:52
TPwm_Config::activeState
Ifx_ActiveState activeState
Active state select for PWM output. Active high means that the PWM edge is rising at the elapsed of w...
Definition: TPwm.h:81
float32
float float32
Definition: Platform_Types.h:170
TPwm_Config
Configuration structure of the TPwm interface.
Definition: TPwm.h:75
TPwm_Functions::start
TPwm_Start start
Definition: TPwm.h:58
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:113
TPwm_Start
void(* TPwm_Start)(TPwm *handle)
Definition: TPwm.h:51
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
TPwm_Functions::stop
TPwm_Stop stop
Definition: TPwm.h:61
TPwm_Config::activeCount
Ifx_TimerValue activeCount
Specify active PWM period (TCOUNT)
Definition: TPwm.h:79
TPwm_Functions::pause
TPwm_Pause pause
Definition: TPwm.h:59
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
TPwm_Functions::resume
TPwm_Resume resume
Definition: TPwm.h:60
TPwm_s
Structure of the TPwm interface.
Definition: TPwm.h:65
TPwm_s::frequency
float32 frequency
Actual frequency.
Definition: TPwm.h:67
TPwm_s::period
Ifx_TimerValue period
Actual timer period.
Definition: TPwm.h:68
TPwm_Config::waitingTime
Ifx_TimerValue waitingTime
Specify the expected ticks before timer starts (TWAIT)
Definition: TPwm.h:78
TPwm_Functions
Definition: TPwm.h:56
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
TPwm_Resume
void(* TPwm_Resume)(TPwm *handle)
Definition: TPwm.h:53
TPwm_Stop
void(* TPwm_Stop)(TPwm *handle)
Definition: TPwm.h:54


iLLD_TC38A: Timer.h Source File

  • Service
  • CpuGeneric
  • If
  • Ccu6If
Timer.h
Go to the documentation of this file.
1 /**
2 * \file Timer.h
3 * \brief Timer interface
4 *
5 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
6 *
7 * $Date: 2014-02-27 20:08:19 GMT$
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 * \defgroup library_srvsw_if_timer Timer interface
41 * \ingroup library_srvsw_if
42 *
43 */
44
45 #ifndef TIMER_H_
46 #define TIMER_H_ 1
47
48 #include "Cpu/Std/Ifx_Types.h"
49
50 typedef struct Timer_s Timer;
51 typedef void (*Timer_Start)(Timer *handle);
52 typedef void (*Timer_Stop)(Timer *handle);
53 typedef void (*Timer_SynchronousStart)(Timer *handle);
54 typedef void (*Timer_SynchronousStop)(Timer *handle);
55 typedef void (*Timer_CountOneStep)(Timer *handle);
56 typedef void (*Timer_StartSingleShotMode)(Timer *handle);
57
58 typedef struct
59 {
60 Timer_Start start;
61 Timer_Stop stop;
62 Timer_SynchronousStart synchronousStart;
63 Timer_SynchronousStop synchronousStop;
64 Timer_CountOneStep countOneStep;
65 Timer_StartSingleShotMode startSingleShotMode;
66 } Timer_Functions;
67
68 /** \brief Structure of the Timer interface */
69 struct Timer_s
70 {
71 float32 t12Frequency; /**< \brief Actual timer12 frequency */
72 Ifx_TimerValue t12Period; /**< \brief Actual timer 12 period */
73 float32 t13Frequency; /**< \brief Actual timer13 frequency */
74 Ifx_TimerValue t13Period; /**< \brief Actual timer 13 period */
75 #if IFX_CFG_USE_STANDARD_INTERFACE
76 Timer_Functions functions; /**< \brief timer functions */
77 #endif
78 };
79
80 /** \brief Configuration structure of the Timer interface */
81 typedef struct
82 {
83 float32 t12Frequency; /**< \brief Specify expected T12 PWM frequency in Hertz */
84 Ifx_TimerValue t12Period; /**< \brief Specify expected T12 PWM period in ticks. */
85 float32 t13Frequency; /**< \brief Specify expected T13 PWM frequency in Hertz */
86 Ifx_TimerValue t13Period; /**< \brief Specify expected T13 PWM period in ticks. */
87 Ifx_TimerValue waitingTime; /**< \brief Specify the expected ticks before timer starts (TWAIT) */
88 Ifx_TimerValue activeCount; /**< \brief Specify active PWM period (TCOUNT) */
89 } Timer_Config;
90
91 #if IFX_CFG_USE_STANDARD_INTERFACE
92 IFX_INLINE void Timer_start(Timer *handle) {handle->functions.start(handle); }
93 IFX_INLINE void Timer_stop(Timer *handle) {handle->functions.stop(handle); }
94 IFX_INLINE void Timer_synchronousStart(Timer *handle) {handle->functions.synchronousStart(handle); }
95 IFX_INLINE void Timer_synchronousStop(Timer *handle) {handle->functions.synchronousStop(handle); }
96 IFX_INLINE void Timer_countOneStep(Timer *handle) {handle->functions.countOneStep(handle); }
97 IFX_INLINE void Timer_startSingleShotMode(Timer *handle) {handle->functions.startSingleShotMode(handle); }
98 #endif
99
100 #endif /* TIMER_H_ */
Timer_StartSingleShotMode
void(* Timer_StartSingleShotMode)(Timer *handle)
Definition: Timer.h:56
Timer_CountOneStep
void(* Timer_CountOneStep)(Timer *handle)
Definition: Timer.h:55
Timer_Functions::startSingleShotMode
Timer_StartSingleShotMode startSingleShotMode
Definition: Timer.h:65
Timer_Functions::countOneStep
Timer_CountOneStep countOneStep
Definition: Timer.h:64
Timer_Start
void(* Timer_Start)(Timer *handle)
Definition: Timer.h:51
Timer_Config::activeCount
Ifx_TimerValue activeCount
Specify active PWM period (TCOUNT)
Definition: Timer.h:88
Timer_Functions::start
Timer_Start start
Definition: Timer.h:60
float32
float float32
Definition: Platform_Types.h:170
Timer_s::t12Frequency
float32 t12Frequency
Actual timer12 frequency.
Definition: Timer.h:71
Timer_Config
Configuration structure of the Timer interface.
Definition: Timer.h:81
Timer_Stop
void(* Timer_Stop)(Timer *handle)
Definition: Timer.h:52
Timer_Functions::stop
Timer_Stop stop
Definition: Timer.h:61
Timer_SynchronousStop
void(* Timer_SynchronousStop)(Timer *handle)
Definition: Timer.h:54
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
Timer_Functions::synchronousStop
Timer_SynchronousStop synchronousStop
Definition: Timer.h:63
Timer_Functions::synchronousStart
Timer_SynchronousStart synchronousStart
Definition: Timer.h:62
Timer_s
Structure of the Timer interface.
Definition: Timer.h:69
Timer_s::t12Period
Ifx_TimerValue t12Period
Actual timer 12 period.
Definition: Timer.h:72
Timer_SynchronousStart
void(* Timer_SynchronousStart)(Timer *handle)
Definition: Timer.h:53
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
Timer_s::t13Frequency
float32 t13Frequency
Actual timer13 frequency.
Definition: Timer.h:73
Timer_s::t13Period
Ifx_TimerValue t13Period
Actual timer 13 period.
Definition: Timer.h:74
Timer_Functions
Definition: Timer.h:58
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
Timer_Config::waitingTime
Ifx_TimerValue waitingTime
Specify the expected ticks before timer starts (TWAIT)
Definition: Timer.h:87


iLLD_TC38A: Std Directory Reference

  • Mtu
  • Std
Std Directory Reference

Files

file | IfxMtu.c [code]
MTU basic functionality.
file | IfxMtu.h [code]
MTU basic functionality.


iLLD_TC38A: I2c Directory Reference

  • I2c
I2c Directory Reference

Directories

directory | I2c
directory | Std


iLLD_TC38A: _Lib Directory Reference

  • _Lib
_Lib Directory Reference

Directories

directory | DataHandling
directory | InternalMux


iLLD_TC38A: Msc Directory Reference

  • Msc
  • Msc
Msc Directory Reference

Files

file | IfxMsc_Msc.c [code]
MSC MSC details.
file | IfxMsc_Msc.h [code]
MSC MSC details.


iLLD_TC38A: Tom Directory Reference

  • Gtm
  • Tom
Tom Directory Reference

Directories

directory | Dtm_PwmHl
directory | Pwm
directory | PwmHl
directory | Timer


iLLD_TC38A: Psi5s Directory Reference

  • Psi5s
  • Psi5s
Psi5s Directory Reference

Files

file | IfxPsi5s_Psi5s.c [code]
PSI5S PSI5S details.
file | IfxPsi5s_Psi5s.h [code]
PSI5S PSI5S details.


iLLD_TC38A: dosAndDont Directory Reference

  • bollusai
  • illd_development
  • internal
  • tools
  • doc
  • doxygen
  • common
  • dosAndDont
dosAndDont Directory Reference

Files

file | lld_dosanddont.c [code]
file | lld_dosanddont_enumUsage.c [code]
file | lld_dosanddont_namingConvention.c [code]
file | lld_dosanddont_optimisation.c [code]


iLLD_TC38A: InternalMux Directory Reference

  • _Lib
  • InternalMux
InternalMux Directory Reference

Files

file | Ifx_InternalMux.c [code]
Mux configuration functions.
file | Ifx_InternalMux.h [code]
Mux configuration functions.


iLLD_TC38A: Iom Directory Reference

  • Iom
  • Iom
Iom Directory Reference

Files

file | IfxIom_Iom.c [code]
IOM IOM details.
file | IfxIom_Iom.h [code]
IOM IOM details.


iLLD_TC38A: Edsadc Directory Reference

  • Edsadc
Edsadc Directory Reference

Directories

directory | Edsadc
directory | Std


iLLD_TC38A: Trig Directory Reference

  • Gtm
  • Trig
Trig Directory Reference

Files

file | IfxGtm_Trig.c [code]
GTM TRIG details.
file | IfxGtm_Trig.h [code]
GTM TRIG details.


iLLD_TC38A: Comm Directory Reference

  • Service
  • CpuGeneric
  • SysSe
  • Comm
Comm Directory Reference

Files

file | Ifx_Console.c [code]
Main Ifx_Console module implementation file.
file | Ifx_Console.h [code]
Main Console module header file.
file | Ifx_Shell.c [code]
shell functions.
file | Ifx_Shell.h [code]
Shell functions.


iLLD_TC38A: Sent Directory Reference

  • Sent
  • Sent
Sent Directory Reference

Files

file | IfxSent_Sent.c [code]
SENT SENT details.
file | IfxSent_Sent.h [code]
SENT SENT details.


iLLD_TC38A: Atom Directory Reference

  • Gtm
  • Atom
Atom Directory Reference

Directories

directory | Dtm_PwmHl
directory | Pwm
directory | PwmHl
directory | Timer


iLLD_TC38A: Std Directory Reference

  • Hssl
  • Std
Std Directory Reference

Files

file | IfxHssl.c [code]
HSSL basic functionality.
file | IfxHssl.h [code]
HSSL basic functionality.


iLLD_TC38A: Std Directory Reference

  • Pms
  • Std
Std Directory Reference

Files

file | IfxPmsEvr.c [code]
PMS basic functionality.
file | IfxPmsEvr.h [code]
PMS basic functionality.
file | IfxPmsPm.c [code]
PMS basic functionality.
file | IfxPmsPm.h [code]
PMS basic functionality.


iLLD_TC38A: doxygen Directory Reference

  • bollusai
  • illd_development
  • internal
  • tools
  • doc
  • doxygen
doxygen Directory Reference

Directories

directory common


iLLD_TC38A: Io Directory Reference

  • Port
  • Io
Io Directory Reference

Files

file | IfxPort_Io.c [code]
PORT IO details.
file | IfxPort_Io.h [code]
PORT IO details.


iLLD_TC38A: PwmHl Directory Reference

  • Gtm
  • Tom
  • PwmHl
PwmHl Directory Reference

Files

file | IfxGtm_Tom_PwmHl.c [code]
GTM PWMHL details.
file | IfxGtm_Tom_PwmHl.h [code]
GTM PWMHL details.


iLLD_TC38A: Psi5s Directory Reference

  • Psi5s
Psi5s Directory Reference

Directories

directory | Psi5s
directory | Std


iLLD_TC38A: PwmHl Directory Reference

  • Gtm
  • Atom
  • PwmHl
PwmHl Directory Reference

Files

file | IfxGtm_Atom_PwmHl.c [code]
GTM PWMHL details.
file | IfxGtm_Atom_PwmHl.h [code]
GTM PWMHL details.


iLLD_TC38A: Qspi Directory Reference

  • Qspi
Qspi Directory Reference

Directories

directory | SpiMaster
directory | SpiSlave
directory | Std


iLLD_TC38A: Std Directory Reference

  • Eray
  • Std
Std Directory Reference

Files

file | IfxEray.c [code]
ERAY basic functionality.
file | IfxEray.h [code]
ERAY basic functionality.


iLLD_TC38A: Convctrl Directory Reference

  • Convctrl
Convctrl Directory Reference

Directories

directory Std


iLLD_TC38A: PwmBc Directory Reference

  • Ccu6
  • PwmBc
PwmBc Directory Reference

Files

file | IfxCcu6_PwmBc.c [code]
CCU6 PWMBC details.
file | IfxCcu6_PwmBc.h [code]
CCU6 PWMBC details.


iLLD_TC38A: Dts Directory Reference

  • Dts
  • Dts
Dts Directory Reference

Files

file | IfxDts_Dts.c [code]
DTS DTS details.
file | IfxDts_Dts.h [code]
DTS DTS details.


iLLD_TC38A: Timer Directory Reference

  • Gtm
  • Tom
  • Timer
Timer Directory Reference

Files

file | IfxGtm_Tom_Timer.c [code]
GTM TIMER details.
file | IfxGtm_Tom_Timer.h [code]
GTM TIMER details.


iLLD_TC38A: Tricore Directory Reference

  • Infra
  • Ssw
  • TC38A
  • Tricore
Tricore Directory Reference

Files

file | Ifx_Ssw.h [code]
Startup Software configuration. Can configure which core to be enabled.
file | Ifx_Ssw_Compilers.h [code]
Startup Software for compiler options.
file | Ifx_Ssw_CompilersDcc.h [code]
Startup Software for DCC compiler options.
file | Ifx_Ssw_CompilersGhs.h [code]
Startup Software for GHS compiler options.
file | Ifx_Ssw_CompilersGnuc.h [code]
Startup Software for GNU compiler options.
file | Ifx_Ssw_CompilersTasking.h [code]
Startup Software for Tasking compiler options.
file | Ifx_Ssw_Infra.c [code]
Startup Software support functions.
file | Ifx_Ssw_Infra.h [code]
Startup Software support functions.
file | Ifx_Ssw_LegacySwCfg.h [code]
Startup Software to support legacy controller options.
file | Ifx_Ssw_Tc0.c [code]
Startup Software for Core0.
file | Ifx_Ssw_Tc1.c [code]
Startup Software for Core1.
file | Ifx_Ssw_Tc2.c [code]
Startup Software for Core2.
file | Ifx_Ssw_Tc3.c [code]
Startup Software for Core3.


iLLD_TC38A: Std Directory Reference

  • Edsadc
  • Std
Std Directory Reference

Files

file | IfxEdsadc.c [code]
EDSADC basic functionality.
file | IfxEdsadc.h [code]
EDSADC basic functionality.


iLLD_TC38A: SysSe Directory Reference

  • Service
  • CpuGeneric
  • SysSe
SysSe Directory Reference

Directories

directory | Bsp
directory | Comm
directory | General
directory | Math
directory | Time


iLLD_TC38A: DataHandling Directory Reference

  • _Lib
  • DataHandling
DataHandling Directory Reference

Files

file | Ifx_CircularBuffer.asm.c [code]
Circular buffer functions (assembler implementation).
file | Ifx_CircularBuffer.c [code]
Circular buffer functions in C language.
file | Ifx_CircularBuffer.h [code]
Circular buffer functions.
file | Ifx_Fifo.c [code]
FIFO functions.
file | Ifx_Fifo.h [code]
FIFO buffer functions.


iLLD_TC38A: Spi Directory Reference

  • Asclin
  • Spi
Spi Directory Reference

Files

file | IfxAsclin_Spi.c [code]
ASCLIN SPI details.
file | IfxAsclin_Spi.h [code]
ASCLIN SPI details.


iLLD_TC38A: Std Directory Reference

  • Psi5
  • Std
Std Directory Reference

Files

file | IfxPsi5.c [code]
PSI5 basic functionality.
file | IfxPsi5.h [code]
PSI5 basic functionality.


iLLD_TC38A: _PinMap Directory Reference

  • _PinMap
_PinMap Directory Reference

Files

file | IfxAsclin_PinMap.c [code]
ASCLIN I/O map.
file | IfxAsclin_PinMap.h [code]
ASCLIN I/O map.
file | IfxCan_PinMap.c [code]
CAN I/O map.
file | IfxCan_PinMap.h [code]
CAN I/O map.
file | IfxCcu6_PinMap.c [code]
CCU6 I/O map.
file | IfxCcu6_PinMap.h [code]
CCU6 I/O map.
file | IfxDmu_PinMap.c [code]
DMU I/O map.
file | IfxDmu_PinMap.h [code]
DMU I/O map.
file | IfxEdsadc_PinMap.c [code]
EDSADC I/O map.
file | IfxEdsadc_PinMap.h [code]
EDSADC I/O map.
file | IfxEray_PinMap.c [code]
ERAY I/O map.
file | IfxEray_PinMap.h [code]
ERAY I/O map.
file | IfxEvadc_PinMap.c [code]
EVADC I/O map.
file | IfxEvadc_PinMap.h [code]
EVADC I/O map.
file | IfxGeth_PinMap.c [code]
GETH I/O map.
file | IfxGeth_PinMap.h [code]
GETH I/O map.
file | IfxGpt12_PinMap.c [code]
GPT12 I/O map.
file | IfxGpt12_PinMap.h [code]
GPT12 I/O map.
file | IfxGtm_PinMap.c [code]
GTM I/O map.
file | IfxGtm_PinMap.h [code]
GTM I/O map.
file | IfxI2c_PinMap.c [code]
I2C I/O map.
file | IfxI2c_PinMap.h [code]
I2C I/O map.
file | IfxMsc_PinMap.c [code]
MSC I/O map.
file | IfxMsc_PinMap.h [code]
MSC I/O map.
file | IfxPms_PinMap.c [code]
PMS I/O map.
file | IfxPms_PinMap.h [code]
PMS I/O map.
file | IfxPort_PinMap.c [code]
PORT I/O map.
file | IfxPort_PinMap.h [code]
PORT I/O map.
file | IfxPsi5_PinMap.c [code]
PSI5 I/O map.
file | IfxPsi5_PinMap.h [code]
PSI5 I/O map.
file | IfxPsi5s_PinMap.c [code]
PSI5S I/O map.
file | IfxPsi5s_PinMap.h [code]
PSI5S I/O map.
file | IfxQspi_PinMap.c [code]
QSPI I/O map.
file | IfxQspi_PinMap.h [code]
QSPI I/O map.
file | IfxScu_PinMap.c [code]
SCU I/O map.
file | IfxScu_PinMap.h [code]
SCU I/O map.
file | IfxSent_PinMap.c [code]
SENT I/O map.
file | IfxSent_PinMap.h [code]
SENT I/O map.
file | IfxSmu_PinMap.c [code]
SMU I/O map.
file | IfxSmu_PinMap.h [code]
SMU I/O map.


iLLD_TC38A: StdIf Directory Reference

  • Service
  • CpuGeneric
  • StdIf
StdIf Directory Reference

Files

file | IfxStdIf.h [code]
Standard interface types.
file | IfxStdIf_DPipe.c [code]
Standard interface: Data Pipe.
file | IfxStdIf_DPipe.h [code]
Standard interface: Data Pipe.
file | IfxStdIf_Pos.c [code]
Standard interface: Position interface.
file | IfxStdIf_Pos.h [code]
Standard interface: Position interface.
file | IfxStdIf_PwmHl.c [code]
Standard interface: Multi-channels, dual-complementary PWM interface.
file | IfxStdIf_PwmHl.h [code]
Standard interface: Multi-channels, dual-complementary PWM interface.
file | IfxStdIf_Timer.c [code]
Standard interface: Timer.
file | IfxStdIf_Timer.h [code]
Standard interface: Timer.


iLLD_TC38A: Std Directory Reference

  • Msc
  • Std
Std Directory Reference

Files

file | IfxMsc.c [code]
MSC basic functionality.
file | IfxMsc.h [code]
MSC basic functionality.


iLLD_TC38A: Mtu Directory Reference

  • Mtu
Mtu Directory Reference

Directories

directory Std


iLLD_TC38A: TPwm Directory Reference

  • Ccu6
  • TPwm
TPwm Directory Reference

Files

file | IfxCcu6_TPwm.c [code]
CCU6 TPWM details.
file | IfxCcu6_TPwm.h [code]
CCU6 TPWM details.


iLLD_TC38A: Dma Directory Reference

  • Dma
Dma Directory Reference

Directories

directory | Dma
directory | Std


iLLD_TC38A: Std Directory Reference

  • Asclin
  • Std
Std Directory Reference

Files

file | IfxAsclin.c [code]
ASCLIN basic functionality.
file | IfxAsclin.h [code]
ASCLIN basic functionality.


iLLD_TC38A: Gpt12 Directory Reference

  • Gpt12
Gpt12 Directory Reference

Directories

directory | IncrEnc
directory | Std


iLLD_TC38A: Std Directory Reference

  • Fce
  • Std
Std Directory Reference

Files

file | IfxFce.c [code]
FCE basic functionality.
file | IfxFce.h [code]
FCE basic functionality.


iLLD_TC38A: Stm Directory Reference

  • Stm
Stm Directory Reference

Directories

directory | Std
directory | Timer


iLLD_TC38A: Timer Directory Reference

  • Gtm
  • Atom
  • Timer
Timer Directory Reference

Files

file | IfxGtm_Atom_Timer.c [code]
GTM TIMER details.
file | IfxGtm_Atom_Timer.h [code]
GTM TIMER details.


iLLD_TC38A: Psi5 Directory Reference

  • Psi5
  • Psi5
Psi5 Directory Reference

Files

file | IfxPsi5_Psi5.c [code]
PSI5 PSI5 details.
file | IfxPsi5_Psi5.h [code]
PSI5 PSI5 details.


iLLD_TC38A: Pwm Directory Reference

  • Gtm
  • Atom
  • Pwm
Pwm Directory Reference

Files

file | IfxGtm_Atom_Pwm.c [code]
GTM PWM details.
file | IfxGtm_Atom_Pwm.h [code]
GTM PWM details.


iLLD_TC38A: Eray Directory Reference

  • Eray
Eray Directory Reference

Directories

directory | Eray
directory | Std


iLLD_TC38A: PwmHl Directory Reference

  • Ccu6
  • PwmHl
PwmHl Directory Reference

Files

file | IfxCcu6_PwmHl.c [code]
CCU6 PWMHL details.
file | IfxCcu6_PwmHl.h [code]
CCU6 PWMHL details.


iLLD_TC38A: Infra Directory Reference

  • Infra
Infra Directory Reference

Directories

directory | Platform
directory | Ssw


iLLD_TC38A: Std Directory Reference

  • Dma
  • Std
Std Directory Reference

Files

file | IfxDma.c [code]
DMA basic functionality.
file | IfxDma.h [code]
DMA basic functionality.


iLLD_TC38A: Ccu6 Directory Reference

  • Ccu6
Ccu6 Directory Reference

Directories

directory | Icu
directory | PwmBc
directory | PwmHl
directory | Std
directory | Timer
directory | TimerWithTrigger
directory | TPwm


iLLD_TC38A: Dma Directory Reference

  • Dma
  • Dma
Dma Directory Reference

Files

file | IfxDma_Dma.c [code]
DMA DMA details.
file | IfxDma_Dma.h [code]
DMA DMA details.


iLLD_TC38A: bollusai Directory Reference

  • bollusai
bollusai Directory Reference

Directories

directory illd_development


iLLD_TC38A: Port Directory Reference

  • Port
Port Directory Reference

Directories

directory | Io
directory | Std


iLLD_TC38A: Std Directory Reference

  • Geth
  • Std
Std Directory Reference

Files

file | IfxGeth.c [code]
GETH basic functionality.
file | IfxGeth.h [code]
GETH basic functionality.


iLLD_TC38A: TimerWithTrigger Directory Reference

  • Ccu6
  • TimerWithTrigger
TimerWithTrigger Directory Reference

Files

file | IfxCcu6_TimerWithTrigger.c [code]
CCU6 TIMERWITHTRIGGER details.
file | IfxCcu6_TimerWithTrigger.h [code]
CCU6 TIMERWITHTRIGGER details.


iLLD_TC38A: Std Directory Reference

  • Flash
  • Std
Std Directory Reference

Files

file | IfxFlash.c [code]
FLASH basic functionality.
file | IfxFlash.h [code]
FLASH basic functionality.


iLLD_TC38A: Irq Directory Reference

  • Cpu
  • Irq
Irq Directory Reference

Files

file | IfxCpu_Irq.c [code]
This file contains the APIs for Interrupt related functions.
file | IfxCpu_Irq.h [code]
This file contains the APIs for Interrupt related functions.


iLLD_TC38A: Std Directory Reference

  • Qspi
  • Std
Std Directory Reference

Files

file | IfxQspi.c [code]
QSPI basic functionality.
file | IfxQspi.h [code]
QSPI basic functionality.


iLLD_TC38A: Geth Directory Reference

  • Geth
Geth Directory Reference

Directories

directory | Eth
directory | Std


iLLD_TC38A: Std Directory Reference

  • Gtm
  • Std
Std Directory Reference

Files

file | IfxGtm.c [code]
GTM basic functionality.
file | IfxGtm.h [code]
GTM basic functionality.
file | IfxGtm_Atom.c [code]
GTM basic functionality.
file | IfxGtm_Atom.h [code]
GTM basic functionality.
file | IfxGtm_Cmu.c [code]
GTM basic functionality.
file | IfxGtm_Cmu.h [code]
GTM basic functionality.
file | IfxGtm_Dpll.c [code]
GTM basic functionality.
file | IfxGtm_Dpll.h [code]
GTM basic functionality.
file | IfxGtm_Dtm.c [code]
GTM basic functionality.
file | IfxGtm_Dtm.h [code]
GTM basic functionality.
file | IfxGtm_Psm.c [code]
GTM basic functionality.
file | IfxGtm_Psm.h [code]
GTM basic functionality.
file | IfxGtm_Spe.c [code]
GTM basic functionality.
file | IfxGtm_Spe.h [code]
GTM basic functionality.
file | IfxGtm_Tbu.c [code]
GTM basic functionality.
file | IfxGtm_Tbu.h [code]
GTM basic functionality.
file | IfxGtm_Tim.c [code]
GTM basic functionality.
file | IfxGtm_Tim.h [code]
GTM basic functionality.
file | IfxGtm_Tom.c [code]
GTM basic functionality.
file | IfxGtm_Tom.h [code]
GTM basic functionality.


iLLD_TC38A: Asclin Directory Reference

  • Asclin
Asclin Directory Reference

Directories

directory | Asc
directory | Lin
directory | Spi
directory | Std


iLLD_TC38A: Iom Directory Reference

  • Iom
Iom Directory Reference

Directories

directory | Driver
directory | Iom
directory | Std


iLLD_TC38A: Dts Directory Reference

  • Dts
Dts Directory Reference

Directories

directory | Dts
directory | Std


iLLD_TC38A: Scu Directory Reference

  • Scu
Scu Directory Reference

Directories

directory Std


iLLD_TC38A: Dtm_PwmHl Directory Reference

  • Gtm
  • Atom
  • Dtm_PwmHl
Dtm_PwmHl Directory Reference

Files

file | IfxGtm_Atom_Dtm_PwmHl.c [code]
GTM DTM_PWMHL details.
file | IfxGtm_Atom_Dtm_PwmHl.h [code]
GTM DTM_PWMHL details.


iLLD_TC38A: Tricore Directory Reference

  • Infra
  • Platform
  • Tricore
Tricore Directory Reference

Directories

directory Compilers


iLLD_TC38A: Std Directory Reference

  • Smu
  • Std
Std Directory Reference

Files

file | IfxSmu.c [code]
SMU basic functionality.
file | IfxSmu.h [code]
SMU basic functionality.
file | IfxSmuStdby.c [code]
SMU basic functionality.
file | IfxSmuStdby.h [code]
SMU basic functionality.


iLLD_TC38A: _Impl Directory Reference

  • _Impl
_Impl Directory Reference

Files

file | IfxAsclin_cfg.c [code]
ASCLIN on-chip implementation data.
file | IfxAsclin_cfg.h [code]
ASCLIN on-chip implementation data.
file | IfxCan_cfg.c [code]
CAN on-chip implementation data.
file | IfxCan_cfg.h [code]
CAN on-chip implementation data.
file | IfxCcu6_cfg.c [code]
CCU6 on-chip implementation data.
file | IfxCcu6_cfg.h [code]
CCU6 on-chip implementation data.
file | IfxConvctrl_cfg.h [code]
CONVCTRL on-chip implementation data.
file | IfxCpu_cfg.c [code]
CPU on-chip implementation data.
file | IfxCpu_cfg.h [code]
CPU on-chip implementation data.
file | IfxDma_cfg.c [code]
DMA on-chip implementation data.
file | IfxDma_cfg.h [code]
DMA on-chip implementation data.
file | IfxDts_cfg.h [code]
DTS on-chip implementation data.
file | IfxEdsadc_cfg.h [code]
EDSADC on-chip implementation data.
file | IfxEray_cfg.c [code]
ERAY on-chip implementation data.
file | IfxEray_cfg.h [code]
ERAY on-chip implementation data.
file | IfxEvadc_cfg.c [code]
EVADC on-chip implementation data.
file | IfxEvadc_cfg.h [code]
EVADC on-chip implementation data.
file | IfxFce_cfg.h [code]
FCE on-chip implementation data.
file | IfxFlash_cfg.c [code]
FLASH on-chip implementation data.
file | IfxFlash_cfg.h [code]
FLASH on-chip implementation data.
file | IfxGeth_cfg.c [code]
GETH on-chip implementation data.
file | IfxGeth_cfg.h [code]
GETH on-chip implementation data.
file | IfxGlobal_cfg.h [code]
Global definitions.
file | IfxGpt12_cfg.h [code]
GPT12 on-chip implementation data.
file | IfxGtm_cfg.c [code]
GTM on-chip implementation data.
file | IfxGtm_cfg.h [code]
GTM on-chip implementation data.
file | IfxHssl_cfg.c [code]
HSSL on-chip implementation data.
file | IfxHssl_cfg.h [code]
HSSL on-chip implementation data.
file | IfxI2c_cfg.c [code]
I2C on-chip implementation data.
file | IfxI2c_cfg.h [code]
I2C on-chip implementation data.
file | IfxIom_cfg.h [code]
IOM on-chip implementation data.
file | IfxLmu_cfg.h [code]
Lmu on-chip implementation data.
file | IfxMsc_cfg.c [code]
MSC on-chip implementation data.
file | IfxMsc_cfg.h [code]
MSC on-chip implementation data.
file | IfxMtu_cfg.c [code]
Mtu on-chip implementation data.
file | IfxMtu_cfg.h [code]
Mtu on-chip implementation data.
file | IfxPms_cfg.h [code]
PMS on-chip implementation data.
file | IfxPort_cfg.c [code]
PORT on-chip implementation data.
file | IfxPort_cfg.h [code]
PORT on-chip implementation data.
file | IfxPsi5_cfg.c [code]
PSI5 on-chip implementation data.
file | IfxPsi5_cfg.h [code]
PSI5 on-chip implementation data.
file | IfxPsi5s_cfg.h [code]
PSI5S on-chip implementation data.
file | IfxQspi_cfg.c [code]
QSPI on-chip implementation data.
file | IfxQspi_cfg.h [code]
QSPI on-chip implementation data.
file | IfxScu_cfg.c [code]
SCU on-chip implementation data.
file | IfxScu_cfg.h [code]
SCU on-chip implementation data.
file | IfxSent_cfg.c [code]
SENT on-chip implementation data.
file | IfxSent_cfg.h [code]
SENT on-chip implementation data.
file | IfxSmu_cfg.c [code]
Smu on-chip implementation data.
file | IfxSmu_cfg.h [code]
Smu on-chip implementation data.
file | IfxSrc_cfg.c [code]
SRC on-chip implementation data.
file | IfxSrc_cfg.h [code]
SRC on-chip implementation data.
file | IfxStm_cfg.c [code]
STM on-chip implementation data.
file | IfxStm_cfg.h [code]
STM on-chip implementation data.


iLLD_TC38A: Trap Directory Reference

  • Cpu
  • Trap
Trap Directory Reference

Files

file | IfxCpu_Trap.c [code]
This file contains the APIs for Trap related functions.
file | IfxCpu_Trap.h [code]


iLLD_TC38A: Hssl Directory Reference

  • Hssl
Hssl Directory Reference

Directories

directory | Hssl
directory | Std


iLLD_TC38A: Std Directory Reference

  • Port
  • Std
Std Directory Reference

Files

file | IfxPort.c [code]
PORT basic functionality.
file | IfxPort.h [code]
PORT basic functionality.


iLLD_TC38A: If Directory Reference

  • Service
  • CpuGeneric
  • If
If Directory Reference

Directories

directory Ccu6If

Files

file | SpiIf.c [code]
SPI interface.
file | SpiIf.h [code]
SPI interface types.


iLLD_TC38A: Icu Directory Reference

  • Ccu6
  • Icu
Icu Directory Reference

Files

file | IfxCcu6_Icu.c [code]
CCU6 ICU details.
file | IfxCcu6_Icu.h [code]
CCU6 ICU details.


iLLD_TC38A: SpiMaster Directory Reference

  • Qspi
  • SpiMaster
SpiMaster Directory Reference

Files

file | IfxQspi_SpiMaster.c [code]
QSPI SPIMASTER details.
file | IfxQspi_SpiMaster.h [code]
QSPI SPIMASTER details.


iLLD_TC38A: Std Directory Reference

  • Stm
  • Std
Std Directory Reference

Files

file | IfxStm.c [code]
STM basic functionality.
file | IfxStm.h [code]
STM basic functionality.


iLLD_TC38A: Ssw Directory Reference

  • Infra
  • Ssw
Ssw Directory Reference

Directories

directory TC38A


iLLD_TC38A: Std Directory Reference

  • Convctrl
  • Std
Std Directory Reference

Files

file | IfxConvctrl.c [code]
CONVCTRL basic functionality.
file | IfxConvctrl.h [code]
CONVCTRL basic functionality.


iLLD_TC38A: Std Directory Reference

  • Sent
  • Std
Std Directory Reference

Files

file | IfxSent.c [code]
SENT basic functionality.
file | IfxSent.h [code]
SENT basic functionality.


iLLD_TC38A: Asc Directory Reference

  • Asclin
  • Asc
Asc Directory Reference

Files

file | IfxAsclin_Asc.c [code]
ASCLIN ASC details.
file | IfxAsclin_Asc.h [code]
ASCLIN ASC details.


iLLD_TC38A: Evadc Directory Reference

  • Evadc
Evadc Directory Reference

Directories

directory | Adc
directory | Std


iLLD_TC38A: Math Directory Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Math Directory Reference

Files

file | Ifx_AngleTrkF32.c [code]
Angle-tracking observer for sin/cos analog position sensor.
file | Ifx_AngleTrkF32.h [code]
Angle-tracking observer for sin/cos analog position sensor.
file | Ifx_Cf32.c [code]
Floating point signal, vector, and matrix library.
file | Ifx_Cf32.h [code]
Floating point signal, vector, and matrix library.
file | Ifx_Crc.c [code]
CRC algorithm.
file | Ifx_Crc.h [code]
CRC algorithm.
file | Ifx_FftF32.c [code]
Floating-point Fast Fourier Transform.
file | Ifx_FftF32.h [code]
Floating-point Fast Fourier Transform.
file | Ifx_FftF32_BitReverseTable.c [code]
Bit-reversal lookup for Floating-point Fast Fourier Transform.
file | Ifx_FftF32_TwiddleTable.c [code]
Floating-point Fast Fourier Transform Twiddle-Factors.
file | Ifx_IntegralF32.c [code]
Discrete integral approximation.
file | Ifx_IntegralF32.h [code]
Discrete integral approximation.
file | Ifx_LowPassPt1F32.c [code]
Low pass filter PT1.
file | Ifx_LowPassPt1F32.h [code]
Low pass filter PT1.
file | Ifx_Lut.h [code]
Lookup defintion with fixed-point angle data type.
file | Ifx_LutAtan2F32.c [code]
ATAN2 lookup functions with fixed-point angle data type.
file | Ifx_LutAtan2F32.h [code]
Floating point signal, vector, and matrix library.
file | Ifx_LutAtan2F32_Table.c [code]
Table data for ATAN2 lookup functions.
file | Ifx_LutIndexedLinearF32.h [code]
Look-up functionality.
file | Ifx_LutLinearF32.c [code]
Linear look-up function.
file | Ifx_LutLinearF32.h [code]
Look-up functionality.
file | Ifx_LutLSincosF32.c [code]
Table data for linear interpolation Sin/Cos lookup functions.
file | Ifx_LutLSincosF32.h [code]
Sin/Cos linear approximated lookup functions with fixed-point angle data type.
file | Ifx_LutSincosF32.c [code]
Sin/Cos lookup functions with fixed-point angle data type.
file | Ifx_LutSincosF32.h [code]
Sin/Cos lookup functions with fixed-point angle data type.
file | Ifx_LutSincosF32_Table.c [code]
Table data for Sin/Cos lookup functions.
file | Ifx_RampF32.c [code]
Ramp function.
file | Ifx_RampF32.h [code]
Ramp function.
file | Ifx_WndF32.h [code]
Windowing function.
file | Ifx_WndF32_BlackmanHarrisTable.c [code]
Lookup table for Blackman-Harris window function.
file | Ifx_WndF32_HannTable.c [code]
Lookup table for Hann window function.


iLLD_TC38A: I2c Directory Reference

  • I2c
  • I2c
I2c Directory Reference

Files

file | IfxI2c_I2c.c [code]
I2C I2C details.
file | IfxI2c_I2c.h [code]
I2C I2C details.


iLLD_TC38A: Edsadc Directory Reference

  • Edsadc
  • Edsadc
Edsadc Directory Reference

Files

file | IfxEdsadc_Edsadc.c [code]
EDSADC EDSADC details.
file | IfxEdsadc_Edsadc.h [code]
EDSADC EDSADC details.


iLLD_TC38A: Psi5 Directory Reference

  • Psi5
Psi5 Directory Reference

Directories

directory | Psi5
directory | Std


iLLD_TC38A: Std Directory Reference

  • Dts
  • Std
Std Directory Reference

Files

file | IfxDts.c [code]
DTS basic functionality.
file | IfxDts.h [code]
DTS basic functionality.


iLLD_TC38A: Std Directory Reference

  • Cpu
  • Std
Std Directory Reference

Files

file | Ifx_Types.h [code]
This files defines all types used by the IFX HAL and libraries.
file | Ifx_TypesDcc.h [code]
file | Ifx_TypesGhs.h [code]
file | Ifx_TypesGnuc.h [code]
file | Ifx_TypesTasking.h [code]
file | IfxCpu.c [code]
CPU basic functionality.
file | IfxCpu.h [code]
CPU basic functionality.
file | IfxCpu_Intrinsics.h [code]
file | IfxCpu_IntrinsicsDcc.h [code]
file | IfxCpu_IntrinsicsGhs.h [code]
file | IfxCpu_IntrinsicsGnuc.h [code]
file | IfxCpu_IntrinsicsTasking.h [code]
file | Platform_Types.h [code]


iLLD_TC38A: Timer Directory Reference

  • Stm
  • Timer
Timer Directory Reference

Files

file | IfxStm_Timer.c [code]
STM TIMER details.
file | IfxStm_Timer.h [code]
STM TIMER details.


iLLD_TC38A: Tim Directory Reference

  • Gtm
  • Tim
Tim Directory Reference

Directories

directory | In
directory | Timer


iLLD_TC38A: Can Directory Reference

  • Can
Can Directory Reference

Directories

directory | Can
directory | Std


iLLD_TC38A: In Directory Reference

  • Gtm
  • Tim
  • In
In Directory Reference

Files

file | IfxGtm_Tim_In.c [code]
GTM IN details.
file | IfxGtm_Tim_In.h [code]
GTM IN details.


iLLD_TC38A: Std Directory Reference

  • Src
  • Std
Std Directory Reference

Files

file | IfxSrc.c [code]
SRC basic functionality.
file | IfxSrc.h [code]
SRC basic functionality.


iLLD_TC38A: _Utilities Directory Reference

  • Service
  • CpuGeneric
  • _Utilities
_Utilities Directory Reference

Files

file Ifx_Assert.h [code]
Assert functions.


iLLD_TC38A: Pms Directory Reference

  • Pms
Pms Directory Reference

Directories

directory Std


iLLD_TC38A: illd_development Directory Reference

  • bollusai
  • illd_development
illd_development Directory Reference

Directories

directory internal


iLLD_TC38A: Pwm Directory Reference

  • Gtm
  • Tom
  • Pwm
Pwm Directory Reference

Files

file | IfxGtm_Tom_Pwm.c [code]
GTM PWM details.
file | IfxGtm_Tom_Pwm.h [code]
GTM PWM details.


iLLD_TC38A: Timer Directory Reference

  • Gtm
  • Tim
  • Timer
Timer Directory Reference

Files

file | IfxGtm_Tim_Timer.c [code]
GTM TIMER details.
file | IfxGtm_Tim_Timer.h [code]
GTM TIMER details.


iLLD_TC38A: IncrEnc Directory Reference

  • Gpt12
  • IncrEnc
IncrEnc Directory Reference

Files

file | IfxGpt12_IncrEnc.c [code]
GPT12 INCRENC details.
file | IfxGpt12_IncrEnc.h [code]
GPT12 INCRENC details.


iLLD_TC38A: Gtm Directory Reference

  • Gtm
Gtm Directory Reference

Directories

directory | Atom
directory | Std
directory | Tim
directory | Tom
directory | Trig


iLLD_TC38A: Ccu6If Directory Reference

  • Service
  • CpuGeneric
  • If
  • Ccu6If
Ccu6If Directory Reference

Files

file | Icu.h [code]
ICU interface.
file | PwmHl.h [code]
Multi-channels, dual-complementary PWM interface.
file | Timer.h [code]
Timer interface.
file | TPwm.h [code]
TPWM interface.


iLLD_TC38A: CpuGeneric Directory Reference

  • Service
  • CpuGeneric
CpuGeneric Directory Reference

Directories

directory | _Utilities
directory | If
directory | StdIf
directory | SysSe


iLLD_TC38A: Cpu Directory Reference

  • Cpu
Cpu Directory Reference

Directories

directory | Irq
directory | Std
directory | Trap


iLLD_TC38A: Std Directory Reference

  • Can
  • Std
Std Directory Reference

Files

file | IfxCan.c [code]
CAN basic functionality.
file | IfxCan.h [code]
CAN basic functionality.


iLLD_TC38A: Compilers Directory Reference

  • Infra
  • Platform
  • Tricore
  • Compilers
Compilers Directory Reference

Files

file | CompilerDcc.c [code]
file | CompilerDcc.h [code]
file | CompilerGhs.c [code]
file | CompilerGhs.h [code]
file | CompilerGnuc.c [code]
file | CompilerGnuc.h [code]
file | Compilers.h [code]
file | CompilerTasking.c [code]
file | CompilerTasking.h [code]


iLLD_TC38A: General Directory Reference

  • Service
  • CpuGeneric
  • SysSe
  • General
General Directory Reference

Files

file | Ifx_GlobalResources.c [code]
file | Ifx_GlobalResources.h [code]
Handling of global resources.


iLLD_TC38A: Std Directory Reference

  • Ccu6
  • Std
Std Directory Reference

Files

file | IfxCcu6.c [code]
CCU6 basic functionality.
file | IfxCcu6.h [code]
CCU6 basic functionality.


iLLD_TC38A: Dtm_PwmHl Directory Reference

  • Gtm
  • Tom
  • Dtm_PwmHl
Dtm_PwmHl Directory Reference

Files

file | IfxGtm_Tom_Dtm_PwmHl.c [code]
GTM DTM_PWMHL details.
file | IfxGtm_Tom_Dtm_PwmHl.h [code]
GTM DTM_PWMHL details.


iLLD_TC38A: Std Directory Reference

  • Scu
  • Std
Std Directory Reference

Files

file | IfxScuCcu.c [code]
SCU basic functionality.
file | IfxScuCcu.h [code]
SCU basic functionality.
file | IfxScuEru.c [code]
SCU basic functionality.
file | IfxScuEru.h [code]
SCU basic functionality.
file | IfxScuLbist.c [code]
SCU basic functionality.
file | IfxScuLbist.h [code]
SCU basic functionality.
file | IfxScuRcu.c [code]
SCU basic functionality.
file | IfxScuRcu.h [code]
SCU basic functionality.
file | IfxScuWdt.asm.h [code]
SCU basic functionality.
file | IfxScuWdt.c [code]
SCU basic functionality.
file | IfxScuWdt.h [code]
SCU basic functionality.


iLLD_TC38A: Msc Directory Reference

  • Msc
Msc Directory Reference

Directories

directory | Msc
directory | Std


iLLD_TC38A: internal Directory Reference

  • bollusai
  • illd_development
  • internal
internal Directory Reference

Directories

directory tools


iLLD_TC38A: tools Directory Reference

  • bollusai
  • illd_development
  • internal
  • tools
tools Directory Reference

Directories

directory doc


iLLD_TC38A: Platform Directory Reference

  • Infra
  • Platform
Platform Directory Reference

Directories

directory Tricore


iLLD_TC38A: Std Directory Reference

  • Gpt12
  • Std
Std Directory Reference

Files

file | IfxGpt12.c [code]
GPT12 basic functionality.
file | IfxGpt12.h [code]
GPT12 basic functionality.


iLLD_TC38A: doc Directory Reference

  • bollusai
  • illd_development
  • internal
  • tools
  • doc
doc Directory Reference

Directories

directory doxygen


iLLD_TC38A: Crc Directory Reference

  • Fce
  • Crc
Crc Directory Reference

Files

file | IfxFce_Crc.c [code]
FCE CRC details.
file | IfxFce_Crc.h [code]
FCE CRC details.


iLLD_TC38A: Std Directory Reference

  • Evadc
  • Std
Std Directory Reference

Files

file | IfxEvadc.c [code]
EVADC basic functionality.
file | IfxEvadc.h [code]
EVADC basic functionality.


iLLD_TC38A: Service Directory Reference

  • Service
Service Directory Reference

Directories

directory CpuGeneric


iLLD_TC38A: Flash Directory Reference

  • Flash
Flash Directory Reference

Directories

directory Std


iLLD_TC38A: TC38A Directory Reference

  • Infra
  • Ssw
  • TC38A
TC38A Directory Reference

Directories

directory Tricore


iLLD_TC38A: codingRules Directory Reference

  • bollusai
  • illd_development
  • internal
  • tools
  • doc
  • doxygen
  • common
  • codingRules
codingRules Directory Reference

Files

file | lld_codingRules.c [code]
file | lld_codingRules_codeFormating.c [code]
file | lld_codingRules_commonApis.c [code]


iLLD_TC38A: Bsp Directory Reference

  • Service
  • CpuGeneric
  • SysSe
  • Bsp
Bsp Directory Reference

Files

file | Assert.c [code]
Assert functions.
file | Assert.h [code]
Assert functions.
file | Bsp.c [code]
Board support package.
file | Bsp.h [code]
Board support package.


iLLD_TC38A: Src Directory Reference

  • Src
Src Directory Reference

Directories

directory Std


iLLD_TC38A: Std Directory Reference

  • I2c
  • Std
Std Directory Reference

Files

file | IfxI2c.c [code]
I2C basic functionality.
file | IfxI2c.h [code]
I2C basic functionality.


iLLD_TC38A: Smu Directory Reference

  • Smu
Smu Directory Reference

Directories

directory | Smu
directory | Std


iLLD_TC38A: Eray Directory Reference

  • Eray
  • Eray
Eray Directory Reference

Files

file | IfxEray_Eray.c [code]
ERAY ERAY details.
file | IfxEray_Eray.h [code]
ERAY ERAY details.


iLLD_TC38A: Can Directory Reference

  • Can
  • Can
Can Directory Reference

Files

file | IfxCan_Can.c [code]
CAN CAN details.
file | IfxCan_Can.h [code]
CAN CAN details.


iLLD_TC38A: Sent Directory Reference

  • Sent
Sent Directory Reference

Directories

directory | Sent
directory | Std


iLLD_TC38A: common Directory Reference

  • bollusai
  • illd_development
  • internal
  • tools
  • doc
  • doxygen
  • common
common Directory Reference

Directories

directory | codingRules
directory | dosAndDont

Files

file | lld_api.c [code]
file | lld_conventions.c [code]
file | lld_conventionsDoxygen.c [code]
file | lld_filesAndConfig.c [code]
file | lld_structure.c [code]
file | lld_versioning.c [code]
file | mainpage.c [code]


iLLD_TC38A: SpiSlave Directory Reference

  • Qspi
  • SpiSlave
SpiSlave Directory Reference

Files

file | IfxQspi_SpiSlave.c [code]
QSPI SPISLAVE details.
file | IfxQspi_SpiSlave.h [code]
QSPI SPISLAVE details.


iLLD_TC38A: Time Directory Reference

  • Service
  • CpuGeneric
  • SysSe
  • Time
Time Directory Reference

Files

file | Ifx_DateTime.c [code]
Date and time functions.
file | Ifx_DateTime.h [code]
Date and time functions.


iLLD_TC38A: Lin Directory Reference

  • Asclin
  • Lin
Lin Directory Reference

Files

file | IfxAsclin_Lin.c [code]
ASCLIN LIN details.
file | IfxAsclin_Lin.h [code]
ASCLIN LIN details.


iLLD_TC38A: Std Directory Reference

  • Iom
  • Std
Std Directory Reference

Files

file | IfxIom.c [code]
IOM basic functionality.
file | IfxIom.h [code]
IOM basic functionality.


iLLD_TC38A: Fce Directory Reference

  • Fce
Fce Directory Reference

Directories

directory | Crc
directory | Std


iLLD_TC38A: Std Directory Reference

  • Psi5s
  • Std
Std Directory Reference

Files

file | IfxPsi5s.c [code]
PSI5S basic functionality.
file | IfxPsi5s.h [code]
PSI5S basic functionality.


iLLD_TC38A: Hssl Directory Reference

  • Hssl
  • Hssl
Hssl Directory Reference

Files

file | IfxHssl_Hssl.c [code]
HSSL HSSL details.
file | IfxHssl_Hssl.h [code]
HSSL HSSL details.


iLLD_TC38A: Driver Directory Reference

  • Iom
  • Driver
Driver Directory Reference

Files

file | IfxIom_Driver.c [code]
IOM DRIVER details.
file | IfxIom_Driver.h [code]
IOM DRIVER details.


iLLD_TC38A: Smu Directory Reference

  • Smu
  • Smu
Smu Directory Reference

Files

file | IfxSmu_Smu.c [code]
SMU SMU details.
file | IfxSmu_Smu.h [code]
SMU SMU details.


iLLD_TC38A: Eth Directory Reference

  • Geth
  • Eth
Eth Directory Reference

Files

file | IfxGeth_Eth.c [code]
GETH ETH details.
file | IfxGeth_Eth.h [code]
GETH ETH details.


iLLD_TC38A: Timer Directory Reference

  • Ccu6
  • Timer
Timer Directory Reference

Files

file | IfxCcu6_Timer.c [code]
CCU6 TIMER details.
file | IfxCcu6_Timer.h [code]
CCU6 TIMER details.


iLLD_TC38A: Adc Directory Reference

  • Evadc
  • Adc
Adc Directory Reference

Files

file | IfxEvadc_Adc.c [code]
EVADC ADC details.
file | IfxEvadc_Adc.h [code]
EVADC ADC details.


iLLD_TC38A: Graph Legend

Graph Legend

This page explains how to interpret the graphs that are generated by doxygen.

Consider the following example:

/*! Invisible class because of truncation */
class Invisible { };
/*! Truncated class, inheritance relation is hidden */
class Truncated : public Invisible { };
/* Class not documented with doxygen comments */
class Undocumented { };
/*! Class that is inherited using public inheritance */
class PublicBase : public Truncated { };
/*! A template class */
template<class T> class Templ { };
/*! Class that is inherited using protected inheritance */
class ProtectedBase { };
/*! Class that is inherited using private inheritance */
class PrivateBase { };
/*! Class that is used by the Inherited class */
class Used { };
/*! Super class that inherits a number of other classes */
class Inherited : public PublicBase,
protected ProtectedBase,
private PrivateBase,
public Undocumented,
public Templ<int>
{
private:
Used *m_usedClass;
};

This will result in the following graph:

The boxes in the above graph have the following meaning:

  • A filled gray box represents the struct or class for which the graph is generated.
  • A box with a black border denotes a documented struct or class.
  • A box with a gray border denotes an undocumented struct or class.
  • A box with a red border denotes a documented struct or class forwhich not all inheritance/containment relations are shown. A graph is truncated if it does not fit within the specified boundaries.

The arrows have the following meaning:

  • A dark blue arrow is used to visualize a public inheritance relation between two classes.
  • A dark green arrow is used for protected inheritance.
  • A dark red arrow is used for private inheritance.
  • A purple dashed arrow is used if a class is contained or used by another class. The arrow is labelled with the variable(s) through which the pointed class or struct is accessible.
  • A yellow dashed arrow denotes a relation between a template instance and the template class it was instantiated from. The arrow is labelled with the template parameters of the instance.


iLLD_TC38A: lld_api.c Source File

  • bollusai
  • illd_development
  • internal
  • tools
  • doc
  • doxygen
  • common
lld_api.c
Go to the documentation of this file.
1 /** \page lld_api iLLD APIs
2
3 This section provides the generic overview of APIs required for a iLLD
4
5 \section lldinitapi iLLD Init APIs
6
7 iLLDs which need the user configuration data, shall declare the data type for configuration. These data structures are instantiated by the higher level software. Following are the requirements for the driver.
8
9 \section lldcfgapi Initialization of configuration data structure
10
11 Any driver which uses the configuration data structure shall provide an interface to initialize these data structure elements to their default values. Main used case of such implementation is, when a driver is upgraded with an additional configuration parameter, such initialization would provide correct value to the variable so that the driver works correctly when used with legacy application software which used the previous version of the driver. The API shall be made as one instance in the flash but shall be able to function on any number of identical peripherals.
12
13 Data structure shall be instantiated per HW instance for which the driver is targeted
14
15 The generic prototype shall be as\n
16 <B><Driver Prefix>_initConfig(<Driver Prefix>_Config *cfg);</B>\n
17 where Driver Prefix example is IfxVadc or IfxGtmTom_Pwm.
18
19 \section driverinit Driver Initialization
20
21 The iLLD shall provide an API to initialize the driver peripheral based on the user configuration. Configuration data shall be previously initialized to default values with init config interface. The API shall be made as one instance in the flash but shall be able to function on any number of identical peripherals.
22
23 The driver initialization API shall initialize the peripheral registers to make the peripheral to work as drivers functionality. This API shall also initialize the driver internal data structure to their required init values.
24
25 The generic prototype shall be as\n
26 <B><Driver Prefix>_init(<Driver Prefix>_Handle *handle, <Driver Prefix>_Config *cfg);</B>\n
27 where Driver Prefix example is IfxVadc or IfxGtmTom_Pwm.
28
29 \section driverdeinit Driver De-Initialization
30
31 iLLD may provide an API to reset the driver to default reset state and to make to consume least power. The API shall be made as one instance in the flash but shall be able to function on any number of identical peripherals.
32 The generic prototype shall be as\n
33 <B><Driver Prefix>_deInit(<Driver Prefix>_Handle *handle);</B>\n
34 where Driver Prefix example is IfxVadc or IfxGtmTom_Pwm.
35
36 \section funct_api iLLD functional APIs
37
38 iLLD shall provide API for each of the needed functionality the user may use. The API shall be made as one instance in the flash but shall be able to function on any number of identical peripherals. For each of the peripherals instances the parameter passed will be deferring.
39
40 The generic prototype shall be as\n
41 <B><Driver Prefix>_<functionality>(<Driver Prefix>_Handle *handle);</B>
42 where Driver Prefix example is IfxVadc or IfxGtmTom_Pwm.
43
44 \section lld_internal iLLD internal methods
45
46 For better modularisation readability reasons the driver implementations shall use the internal static functions. In such cases the function definitions shall be defined in the similar way as iLLD functional APIs
47
48
49 [\ref lld_structure "Previous page"] [\ref lld_conventions "Next page"]
50 */


iLLD_TC38A: lld_codingRules.c Source File

  • bollusai
  • illd_development
  • internal
  • tools
  • doc
  • doxygen
  • common
  • codingRules
lld_codingRules.c
Go to the documentation of this file.
1 /**
2 \page lld_codingRules Coding rules
3
4 -# \subpage lld_codingRules_codeFormating
5 -# \subpage lld_codingRules_general
6 -# \subpage lld_codingRules_codeChecking
7 -# \subpage lld_dosanddont_commonApis
8
9 [\ref lld_conventions "Previous page"] [\ref lld_codingRules_codeFormating "Next page"]
10
11 \page lld_codingRules_general General rules
12
13 \section curlyBraces Always use curly braces for if, for, while, do, ...
14
15 Correct:
16 \code
17 static void IfxDma_Dma_configureTransactionSet(Ifx_DMA_CH* channel, IfxDma_Dma_ChannelConfig* config)
18 {
19 ...
20 if( config->shadowControl != 0)
21 {
22 channel->SHADR.U = config->shadowAddress;
23 }
24 }
25 \endcode
26
27 Wrong:
28 \code
29 static void IfxDma_Dma_configureTransactionSet(Ifx_DMA_CH* channel, IfxDma_Dma_ChannelConfig* config)
30 {
31 ...
32 if( config->shadowControl != 0)
33 channel->SHADR.U = config->shadowAddress;
34 }
35 \endcode
36
37
38
39
40 [\ref lld_codingRules_codeFormating "Previous page"] [\ref lld_codingRules_codeChecking "Next page"]
41
42
43
44
45 \page lld_codingRules_codeChecking Code checking
46 \section parameterCheck Parameter check
47 In case the parameter can not be checked by the compiler for valid values, it shall be checked using the assertion function.
48
49 Example:
50 \code
51 IFX_INLINE void IfxDma_setChannelTransaction(Ifx_DMA* dma,IfxDma_ChannelId channelId, uint32 transferCount)
52 {
53 IFX_ASSERT(VERBOSE_LEVEL_ERROR,transferCount < 32);
54 }
55 \endcode
56
57
58
59
60
61 [\ref lld_codingRules_general "Previous page"] [\ref lld_dosanddont_commonApis "Next page"]
62
63
64
65
66 */


iLLD_TC38A: lld_codingRules_codeFormating.c Source File

  • bollusai
  • illd_development
  • internal
  • tools
  • doc
  • doxygen
  • common
  • codingRules
lld_codingRules_codeFormating.c
Go to the documentation of this file.
1 /**
2
3 \page lld_codingRules_codeFormating Code formating
4 \section autoformating Auto-formating
5 Only use the code formating as defined by following script: $VERIF_LLD/bin/indent_rec
6
7 \section ignoreautoformating Ignore auto-formating
8 In case the source code shall not be formated by the formating tool the following command can be used:
9 \code
10 // *INDENT-OFF* Note: this file was indented manually by the author.
11 ... place here code that shall not be formated by the tool
12 // *INDENT-ON*
13 \endcode
14
15 \section fileStructure File structure
16 The source code in a file should be grouped using doxygen groups.
17 Groups should be sorted in the file by alphabetical order of the group name.
18 Inside a group, code shall be sorted by alphabetical order of the API names.
19
20
21
22 [\ref lld_codingRules "Previous page"] [\ref lld_codingRules_general "Next page"]
23
24 */


iLLD_TC38A: lld_codingRules_commonApis.c Source File

  • bollusai
  • illd_development
  • internal
  • tools
  • doc
  • doxygen
  • common
  • codingRules
lld_codingRules_commonApis.c
Go to the documentation of this file.
1 /**
2 \page lld_dosanddont_commonApis APIs common to many module drivers
3
4 \section lld_dosanddont_commonApis_getSrc <modue>_get<Interrupt>Src()
5 For each interrupt service request control register, an API that returns the register address shall be available. The API syntax is as follow:
6 volatile Ifx_SRC_SRCR* <driverName>_get<Interrupt>Src(<ModuleType>*module);
7
8 Example: The transmit interrupt of the QSPI driver has the following API:
9
10 volatile Ifx_SRC_SRCR* IfxQspi_getTransmitSrc(Ifx_QSPI* module);
11
12
13
14 \section lld_dosanddont_commonApis_get_index <modue>_getIndex()
15 The API Ifx<Module>_getIndex(Ifx_<MODULE>* module) shall be implemented in the file Ifx<Module>.c/h and use an array define in Ifx<Module>_cfg.c/h;
16
17 Example:
18
19 In file Ifxcpu.h
20 \code
21 IFX_EXTERN IfxCpu_ResourceCpu IfxCpu_getIndex(Ifx_CPU* cpu);
22 \endcode
23
24 In file Ifxcpu.c
25 \code
26 // brief Return cpu index
27 //
28 // \param cpu Specifies cpu module
29 //
30 // \return Return cpu index.
31 //
32 IfxCpu_ResourceCpu IfxCpu_getIndex(Ifx_CPU* cpu)
33 {
34 IfxCpu_ResourceCpu result = IfxCpu_ResourceCpu_none, index;
35 for (index = 0; index < IFXCPU_COUNT; index++)
36 {
37 if (IfxCpu_cfg_indexMap[index].module == cpu)
38 {
39 result = IfxCpu_cfg_indexMap[index].index;
40 break;
41 }
42 }
43 return result;
44 }
45
46 \endcode
47
48 In file Ifxcpu_cfg.h
49 \code
50 // List of the available CPU resources
51 typedef enum
52 {
53 IfxCpu_ResourceCpu_0 = 0, // CPU 0
54 IfxCpu_ResourceCpu_1, // CPU 1
55 IfxCpu_ResourceCpu_2, // CPU 2
56 IfxCpu_ResourceCpu_none // None of the CPU
57 } IfxCpu_ResourceCpu;
58
59 IFX_EXTERN IfxCpu_ResourceCpu IfxCpu_getIndex(Ifx_CPU* cpu);
60 \endcode
61
62 In file Ifxcpu_cfg.c
63 \code
64 const IfxModule_IndexMap IfxCpu_cfg_indexMap[IFXCPU_COUNT] =
65 {
66 {&MODULE_CPU0, IfxCpu_ResourceCpu_0},
67 {&MODULE_CPU1, IfxCpu_ResourceCpu_1},
68 {&MODULE_CPU2, IfxCpu_ResourceCpu_2},
69 };
70 \endcode
71
72
73
74 [\ref lld_codingRules_codeChecking "Previous page"] [\ref lld_doxygenRules "Next page"]
75
76
77
78 */


iLLD_TC38A: lld_conventions.c Source File

  • bollusai
  • illd_development
  • internal
  • tools
  • doc
  • doxygen
  • common
lld_conventions.c
Go to the documentation of this file.
1 /** \page lld_conventions Naming Conventions
2
3 This section provides the naming convention to be followed during development.
4
5 As general rule all the "exported" types/definitions/class/objects (i.e. Function, enum, typedef, constant, variable, ...) should start with the filename + underscore "_".
6
7 Example: in file IfxScuWdt.c/h the function shall be:
8 \li IfxScuWdt_enableEndinit()
9 \li IfxScuWdt_disableEndinit()
10
11
12 \section files iLLD Files
13
14 Ifx<HW Module name>[<HW Sub module name>][_SW Driver if special][sub SW module name].c/h
15
16 Example:
17 \li 1) With HW module only without sub-module: IfxPort.c/.h
18 \li 2) With HW module and sub-module: IfxScuWdt.c/.h
19 \li 3) With HW module sub-module and SW driver: IfxGtmTom_Pwm.c/.h
20 \li 4) With HW module sub-module and SW driver + SW sub module: IfxGtmTom_PwmHl.c/.h (only if it makes sense to split the 10:files to make it modular)
21
22 Important things to check during review/ or with static code check tools:
23 \li 1) Prefix: Ifx (in title case)
24 \li 2) <module name>[<HW Sub module name>] (in camel case)
25 \li 3) [_SW Driver if special] (an underscore to separate and title case SW driver name)
26 \li 4) .c and .h in the small case
27
28
29 \section types Data Types
30 <B>typedef <standard type> Ifx<HW Module name>[<HW Sub module name>][_SW Driver if special]_<user type name>;</B>
31
32 <Standard type> structure/union/enum definitions with its elements, and other C data types
33
34 Example:
35 \code
36 typedef struct
37 {
38 uint32 pllFreqInHz;
39 uint32 stepFreqInHz;
40 uint8 stepPerIn_uSec;
41 uint8 pDivider;
42 uint8 nDivider;
43 uint8 k2Divider;
44 } IfxScu_Pll_Config;
45 \endcode
46
47 Important things to check:
48 \li 1) Points 1 to 3 for filenames
49 \li 2) _<user type name >: an underscore to separate with the rest and Camel case letters (first letter also capital).
50
51
52 \section struct Structures
53
54 To define structure types the convention shall be followed as in type defines above.
55
56 For structure elements simple name with camel case letters with first letter small shall be used.
57
58 Refer to the example for naming convention for type defines
59
60
61 \section enum Enumerated Types
62 To define enum types the convention shall be followed as in type defines above.
63
64 For enum elements following naming convention to be followed:\n
65 <B>Ifx<HW Module name>[<HW Sub module name>][_SW Driver if special]_<Enum Name>_<Enum element></B>
66
67 <Enum element> camel case letter
68 <Enum Name> Camel case letter
69
70 Example:
71 \code
72 typedef enum {
73 IfxDma_ChannelPriority_low = 0,
74 IfxDma_ChannelPriority_medium,
75 IfxDma_ChannelPriority_high
76 } IfxDma_ChannelPriority;
77 \endcode
78
79 Important things to check:
80 \li 1) Points 1 to 3 for filenames
81 \li 2) _<Enum Element>: an underscore to separate with the rest and Camel case letters (first letter lower case).
82
83
84
85 \section defines #define Constants or Macros
86
87 <B>#define IFX<MODULE>[<HW SUB MODULE NAME>][_SW DRIVER]_<FUNCTIONALITY NAME></B>
88
89 <FUNCTIONALITY NAME>: Meaningful name to represent the functionality. With "_" to separate words
90
91 Example:
92 \code
93 #define IFXSCUCCU_PLL_FREE_RUNNING_FREQ (100000000U)
94 \endcode
95
96 Important things to check:
97 \li 1) all capital letters
98
99
100 \section function Functions
101
102 All exported functions:
103 <B>Ifx<HW Module name>[<HW Sub module name>][_SW Driver if special]_<Functionality></B>
104
105 Example:
106
107 \code
108 IfxGtmTom_Pwm_setDutyCycle(..)
109 \endcode
110
111 Important things to check:
112 \li 1) Points 1 to 3 for filenames
113 \li 2)_<Functionality>: an underscore to separate and Camel case letters with first letter small. (Convention used with object oriented programming). Functionality shall start with the main action (verb) to be fulfilled with the interface.
114
115 For example:
116 \li An interface to set pin level high, the function name is setPinHigh.
117 \li An interface to read the result of ADC conversion is readResult
118 \li An interface to send the data byte over communication peripheral sendByte
119
120 \section parameter Function's parameter & struct members
121 Function parameter are not doing an action done but does set values for confiuguration, then there is no verb in the name.
122
123 Examples:
124 \code
125 typedef struct
126 {
127 boolean hardwareRequestEnabled; // \brief Enabling the hardware channel request
128 } IfxDma_Dma_ChannelConfig;
129 \endcode
130
131 \section inline Inline Functions
132
133 All inline functions as:\n
134 <B>IFX_INLINE <function definition></B>
135
136 Shall follow the naming conventions as in Functions
137
138
139 \section standard Infineon definitions for Standard Data Types
140
141 Located in \ref Cpu/Std/Platform_Types.h
142
143
144 [\ref lld_api "Previous page"] [\ref lld_codingRules "Next page"]
145 */


iLLD_TC38A: lld_conventionsDoxygen.c Source File

  • bollusai
  • illd_development
  • internal
  • tools
  • doc
  • doxygen
  • common
lld_conventionsDoxygen.c
Go to the documentation of this file.
1 /**
2 \page lld_doxygenRules Doxygen rules
3
4 \section ucRootGroup Microcontroller root group
5 The microcontroller documentation root group is IfxLld. The group is defined in the file info.dox located in the microcontroller derivative root directory.
6
7 Example:
8 \code
9 * \defgroup IfxLld TC27x B-Step Microcontroller
10 \endcode
11
12 \section moduleGroup Modules group
13 Module's group names have the follwing syntax: '\\defgroup IfxLld_<Module>'.
14 The group is direct child of the \ref ucRootGroup.
15
16 v <Module> is the module short name in with the 1st letter upper case and then lower case. The group name is defined in the Ifx<Module>_regdef.h file. Example:
17 \code
18 * \defgroup IfxLld_Dma DMA
19 * \ingroup IfxLld
20 \endcode
21
22 The following groups are also defined in the Ifx<Module>_regdef.h file for each modules:
23 - IfxLld_<Module>_Bitfields : Bitfield macro definition
24 - IfxLld_<Module>_Union : module union types
25 - IfxLld_<Module>_Struct : module struct types
26
27 \section moduleStdGroup Module standard driver group
28 Module's standard driver group have the follwing syntax: '\\defgroup IfxLld_<Module>_Std'.
29 The group is direct child of the \ref moduleGroup.
30
31 Example:
32 \code
33 * \defgroup IfxLld_Asclin_Std Basic functionality
34 * \ingroup IfxLld_Asclin
35 \endcode
36
37
38 \section moduleInterfaceGroup Module interface driver group
39 Module's interface driver group have the follwing syntax: '\\defgroup IfxLld_<Module>_<Interface>'.
40 The group is direct child of the \ref moduleGroup.
41
42 <Interface> is the interface driver name.
43
44 Example:
45 \code
46 * \defgroup IfxLld_Asclin_AscIf ASC interface driver
47 * Implements the standard ASC interface
48 * \ingroup IfxLld_Asclin
49 \endcode
50
51 \section generalRules General rules
52 - As group name are global names, a group name shall start with the parent group name.
53 - Group names are 1st letter upper case, then camel case, group levels are separated by underscore
54
55 Example:
56 - |--IfxLld
57 - | |--IfxLld_Dma
58 - | | |--IfxLld_Dma_Std
59 - | | |--IfxLld_Dma_Std_ChannelTransaction
60 - | | |--IfxLld_Dma_Dma
61
62
63 \section docReturnValue Documentation of return values
64 The return value shall be documented using \\return when docuementation is provided for a single case.
65
66 The return value shall be documented using \\retval when docuementation is provided for a multiple case.
67
68 Example (single case):
69 \code
70 * \return Return the raw converted analog value.
71 \endcode
72 Output:
73 * \return Return the raw converted analog value.
74
75 Example (multiple case):
76 \code
77 * \retval TRUE in case of success
78 * \retval FALSE in case of error
79 \endcode
80 Output:
81 * \retval TRUE in case of success
82 * \retval FALSE in case of error
83
84
85 \section parameterDocumentation
86 Documentation shall provide range for parameters when not entirely defined.
87
88 Example:
89 \code
90 // \param transferCount Number of transaction, Range=[0,32]
91 IFX_INLINE void IfxDma_setChannelTransaction(Ifx_DMA* dma,IfxDma_ChannelId channelId, uint32 transferCount)
92 { ... }
93 \endcode
94
95 [\ref lld_dosanddont_if "Previous page"] [\ref lld_filesAndConfig "Next page"]
96
97 */


iLLD_TC38A: lld_dosanddont.c Source File

  • bollusai
  • illd_development
  • internal
  • tools
  • doc
  • doxygen
  • common
  • dosAndDont
lld_dosanddont.c
Go to the documentation of this file.
1 /**
2 \page lld_dosanddont Do's and don't
3
4 -# \subpage lld_dosanddont_namingConvention
5 -# \subpage lld_dosanddont_codingRules
6 -# \subpage lld_dosanddont_documentation
7 -# \subpage lld_dosanddont_optimisation
8 -# \subpage lld_dosanddont_enumUsage
9
10
11
12 [\ref lld_versioning "Previous page"] [\ref lld_dosanddont_namingConvention "Next page"]
13
14
15 \page lld_dosanddont_codingRules Coding rules
16
17 \section typeAssumption Type assumption
18 <SPAN style="font-family:courier;font-size:small;">[link: \ref typeAssumption]</SPAN>
19
20 Bitfield values should not be assumed as Boolean.
21
22 Correct:
23 \code
24 IFX_INLINE boolean IfxDma_getChannelPatternDetectionOldValue(Ifx_DMA* dma,IfxDma_ChannelId channelId)
25 {
26 return dma->CH[channelId].CHCSR.B.LXO != 0;
27 }
28 \endcode
29
30 Wrong:
31 \code
32 IFX_INLINE boolean IfxDma_getChannelPatternDetectionOldValue(Ifx_DMA* dma,IfxDma_ChannelId channelId)
33 {
34 return dma->CH[channelId].CHCSR.B.LXO;
35 }
36 \endcode
37
38
39 \section variableNmaes Variable names
40 <SPAN style="font-family:courier;font-size:small;">[link: \ref variableNmaes]</SPAN>
41
42 Use explicit names for variable.
43 Example:
44 With
45 \code
46 Ifx_DMA* dma;
47 dma->source = 0x123;
48 \endcode
49 the code can be easier understand than with
50 \code
51 Ifx_DMA* baseAddr;
52 baseAddr->source = 0x123;
53 \endcode
54
55 \section numbers Avoid numbers, use constant instead
56 <SPAN style="font-family:courier;font-size:small;">[link: \ref numbers]</SPAN>
57
58
59 Correct:
60 \code
61 #define IFXDMA_DMA_ENABLE_SHADOW_ADDRESS (2) // Position of the shadow address enable bit
62
63 static void IfxDma_Dma_configureTransactionSet(Ifx_DMA_CH* channel, IfxDma_Dma_ChannelConfig* config)
64 {
65 ...
66 if( config->shadowControl & (1 << IFXDMA_DMA_ENABLE_SHADOW_ADDRESS) )
67 {
68 channel->SHADR.U = config->shadowAddress;
69 }
70 }
71 \endcode
72
73 Wrong:
74 \code
75 static void IfxDma_Dma_configureTransactionSet(Ifx_DMA_CH* channel, IfxDma_Dma_ChannelConfig* config)
76 {
77 ...
78 if( config->shadowControl & (1 << 2) )
79 {
80 channel->SHADR.U = config->shadowAddress;
81 }
82 }
83 \endcode
84
85 . Example(1 << 2) below
86
87
88 [\ref lld_dosanddont_namingConvention "Previous page"] [\ref lld_dosanddont_documentation "Next page"]
89
90 \page lld_dosanddont_documentation Documentation
91
92 \section theSame Avoid 'the same' in documentation
93 <SPAN style="font-family:courier;font-size:small;">[link: \ref theSame]</SPAN>
94
95 Correct:
96 \code
97 boolean channelInterrupt; // \brief Determines the setting of the channel transfer interrupt flag and interrupt service request
98 \endcode
99
100 Wrong(<SPAN style="font-family:courier"><SPAN style="color:red">for the same</SPAN></SPAN>):
101 \code
102 boolean channelInterrupt; // \brief Determines the setting of the channel transfer interrupt flag and interrupt service request for the same
103 \endcode
104
105
106
107 [\ref lld_dosanddont_codingRules "Previous page"] [\ref lld_dosanddont_optimisation "Next page"]
108
109
110 */


iLLD_TC38A: lld_dosanddont_enumUsage.c Source File

  • bollusai
  • illd_development
  • internal
  • tools
  • doc
  • doxygen
  • common
  • dosAndDont
lld_dosanddont_enumUsage.c
Go to the documentation of this file.
1 /**
2
3 \page lld_dosanddont_enumUsage Usage of enums
4 \section convention_in_std enum convention in microcontroller /Std drivers
5 <SPAN style="font-family:courier;font-size:small;">[link: \ref convention_in_std]</SPAN>
6
7
8 \todo Discuss and agree on the enum naming convention
9
10 In case an enum represents a register bitfield value, then the following rules apply:
11 - The enum type shall have an explicit name. The name shall not include register or bitfield short names. This is to abstract the setting when passed as a parameter to a function in the same way the function APIs names does.
12 - Each enum member shall define explicitly an enum value with '='.
13 - The enum documentation shall state for which register bitfield the enum has been defined with "Definition for <ModuleType>.<REGISTER NAME>.B.<BITFIELDNAME>", this to avoid misuse of the enum.
14 - Each of the member shall have a documentation, that explain to users what is the enum for without reading the user manual.
15 - Only enum defined in the current Std or base drivers shall be used.
16
17 Correct:
18 \code
19 // File Std/IfxQspi.h
20
21 // QSPI controller mode
22 // Definition for Ifx_QSPI.GLOBALCON.B.MS
23 typedef enum
24 {
25 IfxQspi_Mode_master = 0, // QSPI in "master" mode
26 IfxQspi_Mode_pwmOverSpi = 1, // QSPI in "PWM over SPI" mode
27 IfxQspi_Mode_slave = 2 // QSPI in "slave" mode
28 } IfxQspi_Mode;
29
30 void IfxQspi_foo(IfxQSPI* module)
31 {
32 if (module->GLOBALCON.B.MS != IfxQspi_Mode_slave)
33 { //...
34 }
35 else
36 { // ...
37 }
38 }
39
40 \endcode
41
42 Wrong:
43 \code
44 // File 1_SrvSw/If/SscIf.h
45
46 // SSC operation modes
47 typedef enum
48 {
49 SscIf_Mode_master, // Master mode
50 SscIf_Mode_slave, // Slave mode
51 SscIf_Mode_undefined // Undefined mode
52 } SscIf_Mode;
53
54 // File Std/IfxQspi.h
55
56 // QSPI controller mode
57 typedef enum
58 {
59 IfxQspi_GLOBALCON_MS_master = 0, // Corresponds with GLOBALCON.B.MS == 0
60 IfxQspi_GLOBALCON_MS_pwmOverSpi, // Corresponds with GLOBALCON.B.MS == 1
61 IfxQspi_GLOBALCON_MS_slave // Corresponds with GLOBALCON.B.MS == 2
62 } IfxQspi_GLOBALCON_MS;
63
64 void IfxQspi_foo(IfxQSPI* module)
65 {
66 if (module->GLOBALCON.B.MS != SscIf_Mode_slave)
67 { //...
68 }
69 else
70 { // ...
71 }
72 }
73
74 \endcode
75
76
77 \section enum_in_std Usage of enums in microcontroller interface drivers
78 <SPAN style="font-family:courier;font-size:small;">[link: \ref enum_in_std]</SPAN>
79
80
81 The code dependencies shall be limited to the microcontroller HAL and service software interface /1_SrvSw/If, therefore only enums from this files can be used.
82
83 \code
84 // File 1_SrvSw/If/SscIf.h
85
86 // SSC operation modes
87 typedef enum
88 {
89 SscIf_Mode_master, // Master mode
90 SscIf_Mode_slave, // Slave mode
91 SscIf_Mode_undefined // Undefined mode
92 } SscIf_Mode;
93
94 // File Ssc/IfxQspi_Ssc.h
95
96 // QSPI controller mode
97 // Definition for Ifx_QSPI.GLOBALCON.B.MS
98 typedef enum
99 {
100 IfxQspi_Mode_master = 0, // QSPI in "master" mode
101 IfxQspi_Mode_pwmOverSpi = 1, // QSPI in "PWM over SPI" mode
102 IfxQspi_Mode_slave = 2 // QSPI in "slave" mode
103 } IfxQspi_Mode;
104
105
106
107 SscIf_Mode IfxQspi_Ssc_foo(void)
108 {
109 SscIf_Mode mode;
110 switch ( IfxQspi_getMode(&MODULE_QSPI0))
111 {
112 case IfxQspi_Mode_master:
113 mode = SscIf_Mode_master;
114 break;
115 case IfxQspi_Mode_slave:
116 mode = IfxQspi_Mode_slave;
117 break;
118 default:
119 mode = SscIf_Mode_undefined;
120 break;
121 }
122 }
123 \endcode
124
125 \section enumIndex Enum name with index
126 <SPAN style="font-family:courier;font-size:small;">[link: \ref enumIndex]</SPAN>
127
128 Do not use left zero padding for enum names, because the highest index number can not be assumed to be fixed.
129
130 Correct:
131 \code
132 typedef enum
133 {
134 Dma_Channel_0 = 0,
135 Dma_Channel_1 = 1,
136 Dma_Channel_2 = 2,
137 Dma_Channel_3 = 3
138 } IfxQspi_Mode;
139 \endcode
140
141 Wrong:
142 \code
143 typedef enum
144 {
145 Dma_Channel_00 = 0,
146 Dma_Channel_01 = 1,
147 Dma_Channel_02 = 2,
148 Dma_Channel_03 = 3
149 } IfxQspi_Mode;
150 \endcode
151
152 \section enumPrefix Enum members shall be prefixed with the enum type
153 <SPAN style="font-family:courier;font-size:small;">[link: \ref enumPrefix]</SPAN>
154
155
156 Correct:
157 \code
158 typedef enum
159 {
160 IfxDma_Channel_0 = 0,
161 } IfxDma_Channel;
162 \endcode
163
164 Wrong(<SPAN style="font-family:courier">IfxDma_Channel<SPAN style="color:red">Id</SPAN></SPAN>):
165 \code
166 typedef enum
167 {
168 Dma_Channel_0 = 0,
169 } IfxDma_ChannelId;
170 \endcode
171
172
173
174
175 [\ref lld_dosanddont_optimisation "Previous page"]
176
177
178
179 */


iLLD_TC38A: lld_dosanddont_namingConvention.c Source File

  • bollusai
  • illd_development
  • internal
  • tools
  • doc
  • doxygen
  • common
  • dosAndDont
lld_dosanddont_namingConvention.c
Go to the documentation of this file.
1 /**
2
3 \page lld_dosanddont_namingConvention Naming convention
4 \section enum Enum
5 <SPAN style="font-family:courier;font-size:small;">[link: \ref enum]</SPAN>
6
7 Enumeration items must be prefixed with the enumeration type.
8
9 Correct:
10 \code
11 typedef enum
12 {
13 IfxDma_ChannelPriority_low = 0,
14 IfxDma_ChannelPriority_medium,
15 IfxDma_ChannelPriority_high
16 } IfxDma_ChannelPriority;
17 \endcode
18 Wrong (<SPAN style="font-family:courier">IfxDma_ChannelPriority<SPAN style="color:red">Select</SPAN></SPAN>):
19 \code
20 typedef enum
21 {
22 IfxDma_ChannelPriority_low = 0,
23 IfxDma_ChannelPriority_medium,
24 IfxDma_ChannelPriority_high
25 } IfxDma_ChannelPrioritySelect;
26 \endcode
27
28
29
30 \section directoryName Directory name
31 <SPAN style="font-family:courier;font-size:small;">[link: \ref directoryName]</SPAN>
32
33 Dirtectory shall have the same name as the driver name without the Ifx prefix.
34
35 Correct:
36 - Dma
37 - Dma
38 - IfxDma.c
39 - IfxDma.h
40
41 Wrong:
42 - Dma
43 - <SPAN style="color:red">Interface</SPAN>
44 - IfxDma.c
45 - IfxDma.h
46
47
48 \section parameter Function's parameter & struct members
49 <SPAN style="font-family:courier;font-size:small;">[link: \ref parameter]</SPAN>
50
51 Function parameter are not doing an action done but does set values for confiuguration, then there is no verb in the name.
52
53 Correct:
54 \code
55 typedef struct
56 {
57 boolean hardwareRequestEnabled; // \brief Enabling the hardware channel request
58 } IfxDma_Dma_ChannelConfig;
59 \endcode
60
61 Wrong(<SPAN style="font-family:courier"><SPAN style="color:red">enable</SPAN>HardwareRequest</SPAN>):
62 \code
63 typedef struct
64 {
65 boolean enableHardwareRequest; // \brief Enabling the hardware channel request
66 } IfxDma_Dma_ChannelConfig;
67 \endcode
68
69 \section staticFunctionNames Static function names shall also be prefixed
70 <SPAN style="font-family:courier;font-size:small;">[link: \ref staticFunctionNames]</SPAN>
71
72
73 Correct:
74 \code
75 static void IfxDma_Dma_configureTransactionSet(Ifx_DMA_CH* channel, IfxDma_Dma_ChannelConfig* config)
76 \endcode
77
78 Wrong:
79 \code
80 static void configureTransactionSet(Ifx_DMA_CH* channel, IfxDma_Dma_ChannelConfig* config)
81 \endcode
82
83 \section parameterhandle Do not explicitely use 'handle' in the parameter name
84 <SPAN style="font-family:courier;font-size:small;">[link: \ref parameterhandle]</SPAN>
85
86 Remove the name ‘handle’ from the parameter’s name, even we hnow that it is an handle. It does not add information but increase the source code length.
87
88 Correct:
89 \code
90 IFX_EXTERN void IfxDma_Dma_initChannelConfig(IfxDma_Dma_ChannelConfig* config, IfxDma_Dma* dma);
91 \endcode
92
93 Wrong(<SPAN style="font-family:courier">dma<SPAN style="color:red">Handle</SPAN></SPAN>):
94 \code
95 IFX_EXTERN void IfxDma_Dma_initChannelConfig(IfxDma_Dma_ChannelConfig* config, IfxDma_Dma* dmaHandle);
96 \endcode
97
98
99 [\ref lld_dosanddont "Previous page"] [\ref lld_dosanddont_codingRules "Next page"]
100
101 */


iLLD_TC38A: lld_dosanddont_optimisation.c Source File

  • bollusai
  • illd_development
  • internal
  • tools
  • doc
  • doxygen
  • common
  • dosAndDont
lld_dosanddont_optimisation.c
Go to the documentation of this file.
1 /**
2 \page lld_dosanddont_optimisation Optimisation
3 \section moduleRegisterAccessByArray Module register access (array)
4 <SPAN style="font-family:courier;font-size:small;">[link: \ref moduleRegisterAccessByArray]</SPAN>
5
6 Code should be optimised by using array index instead of if..else.
7
8 Correct:
9 \code
10 dma->BLK[index]. ...
11 \endcode
12
13 Wrong:
14 \code
15 if( moveEngine == IfxDma_MoveEngine_1 )
16 {
17 dma->BLK1. ...
18 }
19 else
20 {
21 dma->BLK0. ...
22 }
23 \endcode
24
25 In case the array is not available in the module structure definition, please request for implementation. The reasons could be:
26 - it has been forgotten to build the array during the register header file generation
27 - the module address map does not currently supports the array access
28
29 \section moduleRegisterAccess Module register access (read modify write)
30 <SPAN style="font-family:courier;font-size:small;">[link: \ref moduleRegisterAccess]</SPAN>
31
32 Runtime optimisation should be done by utilizing a local variable when more than one bitfield of a register is to be modified.
33
34 Correct:
35 \code
36 IFX_INLINE void IfxDma_setChannelSourceIncrementStep(Ifx_DMA* dma,IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size)
37 {
38 Ifx_DMA_BLK_ME_ADICR adicr;
39 adicr.U = dma->CH[channelId].ADICR.U;
40 adicr.B.SMF = incStep;
41 adicr.B.INCS = direction;
42 adicr.B.CBLS = size;
43 dma->CH[channelId].ADICR.U = adicr.U;
44 }
45 \endcode
46
47 Wrong:
48 \code
49 IFX_INLINE void IfxDma_setChannelSourceIncrementStep(Ifx_DMA* dma,IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size)
50 {
51 dma->CH[channelId].ADICR.B.SMF = incStep;
52 dma->CH[channelId].ADICR.B.INCS = direction;
53 dma->CH[channelId].ADICR.B.CBLS = size;
54 }
55 \endcode
56
57 [\ref lld_dosanddont_documentation "Previous page"] [\ref lld_dosanddont_enumUsage "Next page"]
58
59
60
61 */


iLLD_TC38A: lld_filesAndConfig.c Source File

  • bollusai
  • illd_development
  • internal
  • tools
  • doc
  • doxygen
  • common
lld_filesAndConfig.c
Go to the documentation of this file.
1 /** \page lld_filesAndConfig Files and Configuration
2
3 \section folders Folder structure
4
5 Starting from <B>Src/BaseSw/</B>:
6 <li> <B>iLLD</B> contains the iLLD files for all derivatives
7 <ol>
8 <li> Inside <B>Src/BaseSw/iLLD/<DUT>/Tricore</B>:
9 <li> <B>_Build</B> contains the set of files to be included to build the specific driver. Mostly used by internal tools
10 <li> <B>_Impl</B> contains derivative specific configuration which could also be adapted by the user
11 <li> <B>_PinMap</B> contains I/O configurations in pin tables
12 <li> <B>_Lib</B> contains derivative dependent library functions
13 <li> <B><module></B> contains the actual peripheral driver
14 </ol>
15 <li> <B>Infra</B> contains the header files for all derivatives, compiler specific files and application start-up software files for Aurix2G derivatives
16 <ol>
17 <li> Inside <B>Src/BaseSw/Infra/Platform/Tricore/Compilers</B> contains the compiler specific files
18 <li> Inside <B>Src/BaseSw/Infra/Sfr/<DUT></B> contains the header files
19 <li> Inside <B>Src/BaseSw/Infra/Ssw/<DUT>/Tricore</B> contains the application start-up software files
20 </ol>
21 <li> <B>Service</B> contains derivative independent service software sources
22
23 <li> <B>VERIF_DUT</B> stands for the derivative which should be selected
24
25
26 \section ifxCfgH Ifx_Cfg.h
27
28 Please create a configuration file with the name "Ifx_Cfg.h" in your application to
29 configure the iLLD library components.
30
31 Currently it only requires to select the external oscillator frequency (XTAL)
32 and the desired system frequency.
33
34 In addition, this file allows you to specify how assertions should be print out.
35
36 Minimal Ifx_Cfg.h file:
37 \code
38 #ifndef IFX_CFG_H
39 #define IFX_CFG_H
40
41 // XTAL/PLL frequency
42 #define IFX_CFG_SCU_XTAL_FREQUENCY (20000000)
43 #define IFX_CFG_SCU_PLL_FREQUENCY (200000000)
44
45 // Assertions
46 #define IFX_ASSERT(level, expr)
47
48 #endif /* IFX_CFG_H */
49 \endcode
50
51 The configuration macros mentioned below can be overridden in Ifx_Cfg.h:
52 \li IFX_CFG_DISABLE_DEFAULT_INTRINSICS - IFX_CFG_DISABLE_DEFAULT_INTRINSICS shall be defined in Ifx_Cfg.h to disable the default intrinsics provided For Ex. NOP,CRC
53 \li IFX_CFG_USE_COMPILER_DEFAULT_LINKER - IFX_CFG_USE_COMPILER_DEFAULT_LINKER shall be defined in Ifx_Cfg.h to use the default compiler provided linker varaibles and startup
54 \li IFX_USE_SW_MANAGED_INT - IFX_USE_SW_MANAGED_INT shall be defined in Ifx_Cfg.h to use the software based interrupts
55 SCU related Macros:
56 \li IFX_CFG_SCU_XTAL_FREQUENCY - IFX_CFG_SCU_XTAL_FREQUENCY shall be defined to respective XTAL frequency in Ifx_Cfg.h \li IFX_CFG_SCU_PLL_FREQUENCY - IFX_CFG_SCU_PLL_FREQUENCY shall be defined to desired PLL frequency in Ifx_Cfg.h \li IFX_CFG_SCU_PLL1_FREQUENCY - IFX_CFG_SCU_PLL1_FREQUENCY shall be defined to desired PLL1 frequency in Ifx_Cfg.h \li IFX_CFG_SCU_PLL2_FREQUENCY - IFX_CFG_SCU_PLL2_FREQUENCY shall be defined to desired PLL2 frequency in Ifx_Cfg.h \li <B>Applicable for only Aurix2G devices</B>:
57 \li Application Start-up related Macros:
58 \li IFX_CFG_SSW_ENABLE_TRICOREx (x=0-5) - IFX_CFG_SSW_ENABLE_TRICOREx shall be defined to 0 in Ifx_Cfg.h to disable the CPUx.
59 \li IFX_CFG_SSW_ENABLE_TRICOREx_PCACHE (x=0-5) - IFX_CFG_SSW_ENABLE_TRICOREx_PCACHE shall be defined to 0 in Ifx_Cfg.h to disable the PCACHE of CPUx
60 \li IFX_CFG_SSW_ENABLE_TRICOREx_DCACHE (x=0-5) - IFX_CFG_SSW_ENABLE_TRICOREx_DCACHE shall be defined to 0 in Ifx_Cfg.h to disable the DCACHE of CPUx
61
62 Example for Assertion output via printf:
63 \code
64 #ifdef __cplusplus
65 extern "C" {
66 #endif
67 // defined in main.c
68 extern const char* verboseLevelStr[6];
69
70 #define IFX_ASSERT(level, expr) (((expr) || (level > IFX_VERBOSE_LEVEL_ERROR)) ? ((void)0) : (void)printf("[ASSERT:%s] '%s' in %s:%d (function '%s')\n", verboseLevelStr[level], #expr, __FILE__, __LINE__, __func__))
71
72 #endif
73 \endcode
74
75
76 And in your main.c file (or somewhere else):
77
78 \code
79 //! this global array is used by IFX_ASSERT of iLLDs
80 const char* verboseLevelStr[6] = {
81 "OFF",
82 "FAILURE",
83 "ERROR",
84 "WARNING",
85 "INFO",
86 "DEBUG"
87 };
88 \endcode
89
90
91 \section minimalSetup Minimal Set of Driver sources
92
93 If you prefer to use (resp. compile) only a minimal set of drivers for your application, please add at least following "infrastructural resources":
94
95 \li <B>Src/BaseSw/Infra/Sfr/<DUT>/_Reg</B> directory
96 \li <B>Src/BaseSw/iLLD/<DUT>/Tricore/_Lib</B> directory
97 \li <B>Src/BaseSw/Service</B> directory
98 \li CPU driver: <B>Src/BaseSw/iLLD/<DUT>/Tricore/Cpu</B> and <B>Src/BaseSw/iLLD/<DUT>/Tricore/_Impl/IfxCpu_cfg.*</B>
99 \li DMA driver: <B>Src/BaseSw/iLLD/<DUT>/Tricore/Dma</B> and <B>Src/BaseSw/iLLD/<DUT>/Tricore/_Impl/IfxDma_cfg.*</B>
100 \li Port driver: <B>Src/BaseSw/iLLD/<DUT>/Tricore/Port</B>, <B>Src/BaseSw/iLLD/<DUT>/Tricore/_Impl/IfxPort_cfg.*</B> and <B>src/ifx/\$(VERIF_DUT)/_PinMap/IfxPort_PinMap.*</B>
101 \li SCU driver: <B>Src/BaseSw/iLLD/<DUT>/Tricore/Scu</B> and <B>Src/BaseSw/iLLD/<DUT>/Tricore/_Impl/IfxScu_cfg.*</B>
102 \li Src driver: <B>Src/BaseSw/iLLD/<DUT>/Tricore/Src</B> and <B>Src/BaseSw/iLLD/<DUT>/Tricore/_Impl/IfxSrc_cfg.*</B>
103 \li Stm driver: <B>Src/BaseSw/iLLD/<DUT>/Tricore/Stm</B> and <B>Src/BaseSw/iLLD/<DUT>/Tricore/_Impl/IfxStm_cfg.*</B>
104
105 Whenever additional drivers should be added, you typically have to copy following files/directories:
106
107 \li <B>Src/BaseSw/iLLD/<DUT>/Tricore/<driver></B>
108 \li <B>Src/BaseSw/iLLD/<DUT>/Tricore/_Impl/<driver>_cfg.*</B>
109 \li <B>Src/BaseSw/iLLD/<DUT>/Tricore/_PinMap/<driver>_cfg.*</B>
110
111
112 \li For more information you can refer the BIFACES User Manual.
113
114 [\ref lld_doxygenRules "Previous page"] [\ref lld_versioning "Next page"]
115
116
117 */
118
NOP
#define NOP
Definition: IfxCpu_IntrinsicsDcc.h:2073
IFX_CFG_SCU_PLL_FREQUENCY
#define IFX_CFG_SCU_PLL_FREQUENCY
Default PLL frequency.
Definition: IfxScu_cfg.h:69
IFX_CFG_SCU_PLL1_FREQUENCY
#define IFX_CFG_SCU_PLL1_FREQUENCY
Default PER PLL1 frequency.
Definition: IfxScu_cfg.h:73
IFX_CFG_SCU_XTAL_FREQUENCY
#define IFX_CFG_SCU_XTAL_FREQUENCY
Default External oscillator frequency.
Definition: IfxScu_cfg.h:59
disable
void disable
Definition: IfxCpu_IntrinsicsDcc.h:465
IFX_CFG_SCU_PLL2_FREQUENCY
#define IFX_CFG_SCU_PLL2_FREQUENCY
Default PER PLL2 frequency.
Definition: IfxScu_cfg.h:77


iLLD_TC38A: lld_structure.c Source File

  • bollusai
  • illd_development
  • internal
  • tools
  • doc
  • doxygen
  • common
lld_structure.c
Go to the documentation of this file.
1 /** \page lld_structure General Structure of iLLDs
2
3 We can basically differ between two types of iLLDs:
4
5 \section unifunctional Unifunctional Peripheral Drivers
6
7 Unifunctional peripheral drivers are simple modules where the target peripheral is able to carry out one type of functionality.
8
9 Example: VADC peripheral for analog-to-digital conversion. Multican for CAN protocol communication, DMA for DMA functionality, etc.
10
11 \image html "unifunctional.png" Unifunctional Peripheral Driver
12
13 \section multifunctional Multifunctional Peripheral Drivers
14
15 These kind of peripheral drivers are complex to handle, and here the target peripheral can carry out multiple functionalities ("use cases").
16
17 Example: AscLin peripheral can be configured as a common UART, but also as a LIN or even a SPI.\n
18 GTM TOM/ATOM can be used as PWM generator, complex waveform generator and any generic timer, etc.
19
20 \image html "multifunctional.png" Multifunctional Peripheral Driver
21
22
23 \section lldcontent Content of Peripheral Drivers
24
25 iLLDs consist of following components:
26 \li Peripheral Register Memory Map (SFR header file)
27 \li a Standard Layer with (verbose) access functions to SFRs which are changed during application runtime
28 \li an Interface Layer with configuration and handling functions\n
29 Multiple Interface Layers could be available if the peripheral is used for different purposes.
30 \li Pinmaps to configure I/O multiplexers
31
32
33
34 \section configdata Configuration Data Structures
35
36 A configuration structure, which is part of an interface layer, holds the parameters to configure the driver. Depending on the iLLD and its associated peripheral there could be multiple levels of configuration data structures. As in case of VADC there could be data structure to configure the VADC module, a structure for the configuring the group and another for the channels.
37
38 The data structure shall be defined in a memory optimised way considering the structures are non-packed in the memory map. All the structure elements shall be organised in a way that they are ordered in the descending order of their physical memory size.
39
40 <B>Usage:</B> In normal cases configuration data structures are locally stored (on the stack) inside specific initialization routines. They can also be placed in the flash/ROM
41
42
43 <B>Example for a configuration struct:</B>
44 \code
45 typedef struct
46 {
47 const IfxVadc_Adc *module; /**< \brief Specifies pointer to the IfxVadc_Adc module handle */
48 IfxVadc_GroupId groupId; /**< \brief Specifies the group/kernel id */
49 IfxVadc_GroupId master; /**< \brief Specifies the master group if own group is different master slave is configured */
50 IfxVadc_Adc_ArbiterConfig arbiter; /**< \brief Specifies arbiter configuration */
51 IfxVadc_Adc_ClassConfig inputClass[IFXVADC_NUMBER_OF_INPUTCLASS]; /**< \brief Specifies conversion settings one and two */
52 IfxVadc_Adc_ScanConfig scanRequest; /**< \brief Specifies scan mode configuration */
53 IfxVadc_Adc_QueueConfig queueRequest; /**< \brief Specifies queued mode configuration */
54 IfxVadc_Adc_ScanConfig backgroundScanReq; /**< \brief Specifies back ground scan configuration */
55 boolean disablePostCalibration; /**< \brief Specifies if calibration after conversion (post calibration) should be disabled */
56 } IfxVadc_Adc_GroupConfig;
57 \endcode
58
59 \section runtimevars Runtime Variables (Handles)
60
61 Runtime variables are usually stored in so called "handles". This structure is separated from the configuration structure mentioned above (because such structures are only needed during initialization phase).
62
63 Handles are used to reference resources of a peripheral by interface functions without unnecessary calculation or parameter passing overhead. A handle struct contains at least a pointer to the base address of the peripheral which should be accessed, pointers to peripheral subcomponents where required, and/or indices (such as a channel or timer number).
64
65 Handles are to be instantiated per instance of the used peripheral. Higher SW layers store knows number of instances required for the intended application and it reserves the memory for these many data structures.
66
67 The data structure must be made to be available in the DMI RAM of the Cpu from which lld API calls are more frequently done.
68
69 <B>Example for an handle:</B>
70 \code
71 typedef struct
72 {
73 IfxVadc_Adc module; /**< \brief The VADC handle structure */
74 Ifx_VADC_G *group; /**< \brief Pointer to the group registers */
75 IfxVadc_GroupId groupId; /**< \brief Specifies the group index */
76 } IfxVadc_Adc_Group;
77 \endcode
78
79
80 [\ref introduction "Previous page"] [\ref lld_api "Next page"]
81 */


iLLD_TC38A: lld_versioning.c Source File

  • bollusai
  • illd_development
  • internal
  • tools
  • doc
  • doxygen
  • common
lld_versioning.c
Go to the documentation of this file.
1 /**
2 \page lld_versioning Package versioning
3
4 \section versionNumber Package version number
5 Each released package is assigned a unique identifier that consists of four numbers that represent the major and the minor version numbers separated by underscores '_'.
6
7 For example: version 1_0_0_0_0
8
9 With each new release:
10 - either the minor version is incremented
11 - or the major version number is incremented and the minor and "major update" version number reset
12
13 the increment step for the minor and major number is >= 1.
14
15 \note The package version number is independent from the clearcase file version numbers
16 \endnote
17
18 The version number is available in the IfxLldVersion.h header file, so that it can be referenced (and compared) by application software. The content:
19 \code
20 #define IFX_LLD_VERSION_GENERATION 1 /**< \brief Indicates the driver generation */
21 #define IFX_LLD_VERSION_MAJOR 0 /**< \brief Informs about changes which could lead to incompatibilities */
22 #define IFX_LLD_VERSION_MAJOR_UPDATE 0 /**< \brief Informs about a release for a new derivative without further API changes */
23 #define IFX_LLD_VERSION_MINOR 0 /**< \brief Informs about new additions to the library */
24 #define IFX_LLD_VERSION_REVISION 0 /**< \brief Informs about patches and/or documentation changes */
25 \endcode
26
27 \section changeSignificance Change significance
28 \subsection changeSignificanceMajor Change in the major version number
29 Change in the major version number indicates that the version may not be fully compatible with other major version numbers.
30 The reason for the incompatibility could be:
31 - changes in the API names, parameters...
32
33 \subsection changeSignificanceMajorUpdate Change in the "major update" version number
34 This part of the version number indicates that the library has been released for a new derivative without further API changes.
35
36 \subsection changeSignificanceMinor Change in the minor version number
37 Change in the minor version number indicates that the version is backward compatible with smaller minor version number with identical major version number.
38 The difference between minor version number are:
39 - new feature introduced
40 - bug fix
41 - update of documentation
42
43
44 [\ref lld_filesAndConfig "Previous page"] [\ref lld_dosanddont "Next page"]
45
46
47 */


iLLD_TC38A: mainpage.c Source File

  • bollusai
  • illd_development
  • internal
  • tools
  • doc
  • doxygen
  • common
mainpage.c
Go to the documentation of this file.
1 /** \mainpage IFX Low Level Drivers
2
3 \section introduction Introduction
4
5 The aim of the IFX Low Level Driver library (iLLD) is to provide access and configuration functions for the integrated peripherals of Infineon microcontrollers - from a simple timer register access up to 3 phases PWM driver for inverter applications. Together with SFR header files they are a fundamental part of the infrastructure for tests and applications which are developed by several teams at IFX ATV.
6
7 All drivers follow the same coding style to ensure a common "Look&Feel". The application interfaces (APIs) are defined and implemented by Hardware/Software experts, already tested pre-silicon with a virtual prototype or in RTL simulations, and then shared by all teams which are involved in programming software:
8
9 \image html "lld_usage.png" "iLLD Usage at Infineon"
10
11 This cross usage model should not only help to reduce development efforts, but also improve the quality/reliability of the drivers.
12
13 The strict iLLD coding guidelines allow layering of drivers for multi-dimensional system scenarios. There is no dependency between the peripheral drivers. Optionally they can be isolated from the library and provided as a separate package (e.g. for application notes delivered to customers).
14
15 iLLDs are currently planned for Aurix and Aurix 2G derivatives.
16
17 Each derivative has its own set of iLLD sources, which are located in GIT. Versionized packages are also distributed via MyICP.
18
19
20 \section toc Table Of Contents
21
22 \li \subpage lld_structure
23 \li \subpage lld_api
24 \li \subpage lld_conventions
25 \li \subpage lld_codingRules
26 \li \subpage lld_doxygenRules
27 \li \subpage lld_filesAndConfig
28 \li \subpage lld_versioning
29 \li \subpage lld_dosanddont
30
31 [\ref lld_structure "Next page"]
32
33 */
34
35 /**
36 * \defgroup IfxLld iLLD
37 */


iLLD_TC38A: Related Pages

Related Pages
Here is a list of all related documentation pages: